Push-push resonant power inverter

A DC-to-AC inverter includes first and second resonant circuit loops each including a capacitor, a primary coil of an output circuit, a silicon control rectifier providing a current path in one direction around the loop, and a conventional diode providing a current path in the opposite direction around the loop. A DC source is connected to supply a charging current through charging chokes to the capacitors in the resonant circuit loops. The silicon control rectifiers are periodically and alternately rendered conductive each to start a cycle of oscillation in one resonant circuit loops, while the DC source provides current to charge the capacitor in the other resonant circuit loop. The charging chokes and primary coils are phased to supply voltages which add to the voltage of the DC source during the charging of the capacitors.

This invention relates to DC-to-AC power inverters by which DC power at one 
voltage is translated to AC power, usually at a different voltage. The AC 
power may then be rectified to produce DC power at the different voltage. 
The DC-to-DC system of the invention is useful, for example, in converting 
kilowatts of power at 140-volts DC to 48-volt DC in a telephone plant. The 
DC-to-AC system is useful for powering electronic arc welding equipment 
and other industrial equipment which needs high-frequency AC power. 
According to an example of the invention, a capacitor in one of two 
resonant circuit loops is charged from the input DC source while the 
capacitor in the other loop is discharged. Charging chokes and the primary 
windings of an output transformer are poled so that voltages induced in 
the chokes and windings add to the input DC voltage during a capacitor 
charging cycle, whereby the converter operates with improved efficiency.

Referring in greater detail to FIG. 1, there is shown a first resonant 
circuit loop including a capacitor C.sub.1, the primary winding L.sub.2 of 
an output transformer T.sub.2, and a rectifier circuit including an 
asymmetrical silicon control rectifier SCR.sub.1 for forward loop current 
in the positive direction, a conventional rectifier CR.sub.1 for reverse 
loop current in the opposite or negative direction, and a capacitor 
C.sub.o and a resistor R constituting a snubber network for the purpose of 
minimizing the peak transient voltage and the critical rate of rise of the 
off-state voltage. A second resonant circuit loop includes a capacitor 
C'.sub.1, the primary winding L'.sub.2 of the output transformer T.sub.2, 
and a rectifier circuit including an asymmetrical silicon control 
rectifier SCR.sub.2 for loop current in the positive direction, a 
conventional diode CR.sub.2 for loop current in the opposite negative 
direction, and a capacitor C'.sub.o and a resistor R'. An input voltage 
source represented by a battery V.sub.cc is connected in a charging loop 
for capacitor C.sub.1 including a charging choke coil L.sub.1 and the 
primary winding L.sub.2. The input voltage V.sub.cc is also connected in a 
charging loop for capacitor C'.sub.1 including a charging choke coil 
L'.sub. 1 and the primary winding L'.sub.2. The coils L.sub.1 and L'.sub.1 
are wound on a common core of a choke T.sub.1. The coils L.sub.1, 
L'.sub.1, L.sub.2 and L'.sub.2 are poled as represented by the dots near 
the bottom ends of coils L.sub.1 and L'.sub.1, and near the connected ends 
of coils L.sub.2 and L'.sub.2. The coils L.sub.1 and L'.sub.1 are 
connected together in an aiding fashion, and the coils L.sub.2 and 
L'.sub.2 are connected together in a bucking fashion. 
The secondary winding L.sub.3 of the output transformer is connected to a 
conventional full-wave rectifier circuit including rectifiers CR.sub.3, 
CR.sub.4, CR.sub.5 and CR.sub.6, which is in turn connected to a 
conventional voltage-smoothing circuit including capacitors C.sub.2 and 
C.sub.3 and resistor R.sub.o. 
A converter according to FIG. 1 for operation at 70,000 Hz in converting 
140-volt battery power to 48-volt DC may have circuit components as 
follows: 
L.sub.1 =L'.sub.1 =250 .mu.H 
L.sub.2 =L'.sub.2 =L.sub.leakage =17 .mu.H 
C.sub.1, C'.sub.1 =0.32 .mu.F (1000 V) 
C.sub.o, C'.sub.o =0.003 .mu.F (1000V) 
R.sub.o, R'.sub.o =120 Ohms (10W) 
C.sub.2 =500 .mu.F (100V) Electrolytic 
C.sub.3 =2 .mu.F (100V) High Frequency Cap. 
SCR.sub.1, SCR.sub.2 =S731OM 
CR.sub.1 -CR.sub.2 =D 254OM 
CR.sub.3 -CR.sub.6 =D 2540A 
the input choke T.sub.1 may be constructed using quadrafilar 50-36 Litz 
wire with two 40-turn windings put on each leg of two U-shaped cores 
manufactured by Indiana General (IR-8307). With a 100-mil air gap, the 
choke can handle 30A before saturation. The primaries of transformer 
T.sub.2 may be comprised of two 14-turn coils made with quadrafilar 50-36 
Litz wire. Over each primary coil a three-turn secondary is wound. The 
secondaries are then connected in series for a total of six turns. Eight 
strands of 50-36 Litz wire are twisted together for the secondary winding 
to minimize the IR drop, the IR8206 U-shaped cores are used with an air 
gap of 100 mils. The transformer has a leakage inductance of 17 .mu.H, a 
mutual inductance of 33.7 .mu.H and a coupling factor of K, of 0.86. In 
designing the output transformer, the proper transformed value of 
R.sub.in, of the output load resistance, R.sub.o, must be present at the 
primary, where R.sub.o is determined by the output power voltage 
requirements and R.sub.in is the optimum series resistance that yields the 
best efficiency. 
If the T-equivalent circuit of the transformer is used as shown in FIG. 2, 
the series R.sub.in and L.sub.in can be determined as follows: 
##EQU1## 
The asymmetrical silicon control rectifiers SCR.sub.1 and SCR.sub.2 are 
alternately rendered conductive by pulses applied to their control 
electrodes from a circuit which may be a gate pulse generator and voltage 
regulator circuit as shown in FIG. 3. The gate pulse generator utilizes 
one integrated circuit, CA3524G with additional 2N6107 PNP stages needed 
to increase the peak current to about 1A as required by the ASCR to 
minimize turn-on dissipation. The two outputs, for triggering the two 
silicon-controlled rectifiers, are activated alternately and are isolated 
through the use of 1:1 transformers. The generator is adjusted for a pulse 
width of 2.mu. seconds or longer. 
Regulation of the output voltage V.sub.o from the DC-to-DC converter of 
FIG. 1 is provided by the circuit of FIG. 3 which senses the voltage at a 
tap 30 on a voltage divider connected across the output voltage V.sub.o. 
The CA3140 operational amplifier is used as an active resistor in 
providing a changing voltage to vary the RC time constant which determines 
the oscillator frequency of the voltage regulator. As the load current is 
varied between 18.5A and 57A at a nominal output voltage of 48V, the 
repetition rate will change from 27 to 42 KHz to maintain voltage 
regulation. System efficiency with voltage regulation is 85% with light 
loads and decreasing to 81% at P.sub.o =2.5 KW. The lower efficiency can 
be attributed mainly to a higher diode loss in the rectifier bridge. 
The operation of the circuit of FIG. 1 will be described with references 
also to the simplified circuit diagram of FIG. 2 in which the silicon 
control rectifiers and conventional diodes are replaced by switches 
SW.sub.1 and SW.sub.2. Initially, it is assumed that the switches are open 
and that the capacitors C.sub.1 and C'.sub.1 are charged to the input 
voltage level V.sub.cc. As switch SW.sub.1 is closed (by an enabling pulse 
10 in FIG. 4a applied to the asymmetrical silicon control rectifier 
SCR.sub.1 in FIG. 1), input choke L.sub.1 is shorted to ground causing 
i.sub.1 in FIG. 2 to flow. Simultaneously, C.sub.1 is also shorted to 
ground which provides a discharge path for the capacitor to dissipate its 
stored energy in R.sub.1 through L.sub.2. The combination of C.sub.1, 
L.sub.2 and R.sub.1 forms a series resonant circuit whose natural 
frequency is 1/2.pi..sqroot.LC, assuming R.sub.1 is small. During the 
first half cycle of oscillation, current i.sub.1 +i.sub.2 shown at 12 in 
FIG. 4b flows through assymmetrical silicon control rectifier SCR.sub.1, 
followed by a second half cycle of current 14 through the conventional 
diode CR.sub.1. 
During the described first cycle of oscillation in the upper circuit 
including capacitor C.sub.1, there is an initial small current flow 16 in 
FIG. 4c through switch SW.sub.2, followed by a period between times 
t'.sub.o and t.sub.3 when capacitor C'.sub.1 is charged as shown at 18 in 
FIG. 4e. The capacitor is charged to a peak voltage equal to V.sub.cc 
+eL'.sub.1 +eL'.sub.2. All three voltages add when L'.sub.1 and L'.sub.2 
are properly phased in the manner indicated by the dots at the ends of 
coils L'.sub.1 and L'.sub.2 in FIGS. 1 and 2. 
The increased charging voltages available to C.sub.1 and C'.sub.1 result in 
higher stored energy in these capacitors. The peak charging voltage is 
limited by design to an amplitude not exceeding the forward blocking 
voltage rating the SCR. 
One important advantage of the circuit is that when SCR.sub.1 is fired, 
SW.sub.2 is in the open mode with SCR.sub.2 and CR.sub.2 non-conducting. 
At time t.sub.o, C.sub.1 is fully charged to V.sub.c (max) while C'.sub.1 
is in its recharging cycle with SW.sub.1 closed. This results in voltage 
differential that is more positive on the anode of CR.sub.2 than at the 
cathode of CR.sub.2. Consequently, CR.sub.2 will conduct momentarily until 
VCR.sub.2 .ltoreq.0.6V at time t'.sub.o. The voltage across SCR.sub.2 
therefore, will show a voltage drop equal to the forward drop of CR.sub.2 
during the period between times t.sub.o and t'.sub.o and a voltage 
build-up starting at time t'.sub.o and reaching approximately V.sub.c 
(max) at time t.sub.3, as shown in FIG. 4d. 
During the interval from time t.sub.o to time t'.sub.o, not only is the 
current through diode CR.sub.2 delivered to the load, it also serves to 
greatly reduce the turn-off time of the SCR. When the repetition period, 
between time t.sub.o and t.sub.3 in FIG. 4b, is decreased to be equal to 
or less than the period between times t.sub.o and t.sub.2 the diode 
current 16 of CR.sub.2 will be added to the diode current 14 of CR.sub.1. 
This permits the push-push converter to be operated at a gate repetition 
rate equal to or greater than 50 percent of the resonant frequency as 
determined by 1/2.pi..sqroot.LC which is a higher operating frequency than 
is possible with a push-pull circuit of the prior art. 
At the end of the cycle of operation initiated by the application of pulse 
10 to rectifier SCR.sub.1, a pulse 20 is applied to the rectifier 
SCR.sub.2 to initiate the oscillation 22, 24 (FIG. 4c) in the circuit 
including capacitor C'.sub.1, while the capacitor C.sub.1 in the other 
circuit is charged during 26 (FIG. 4d). Capacitor C.sub.1 is charged to a 
voltage equal to V.sub.cc plus the voltages across inductors L.sub.1 and 
L.sub.2 because of the way in which the inductors L.sub.1 and L.sub.2 are 
poled. The upper and lower circuits operate alternately with one 
oscillating while the capacitor in the other is charged.