Common mode filter, signal passing module and method of manufacturing common mode filter

Disclosed herein is a common mode filter including: at least four coil layers, each layer having a primary coil and a secondary coil; and discontinuous parts made of an insulating material each extending between starting points of each of the primary coil and the secondary coil positioned on the lowest layer among the coil layers to ending points of each of the primary coil and the secondary coil positioned on the highest layer among the coil layers. The primary coils are connected in series from the lowest layer to the highest layer, and the secondary coils are connected in series from the lowest layer to the highest layer. The common mode filter is able to be miniaturized and has improved impedance characteristics.

CROSS REFERENCE(S) TO RELATED APPLICATIONS

This application claims the benefit under 35 U.S.C. Section 119 of Korean Patent Application Serial No. 10-2014-0052485 entitled “Common Mode Filter, Signal Passing Module and Method of Manufacturing Common Mode Filter” filed on Apr. 30, 2014, which is hereby incorporated by reference in its entirety into this application.

BACKGROUND OF THE INVENTION

1. Technical Field

The present disclosure relates to a common mode filter.

2. Description of the Related Art

A common mode filter is an electronic component that has been widely used in order to remove common mode noise in various electronic devices.

In accordance with the recent trend toward miniaturization, slimness, and multi-functionalization of electronic components, research has been conducted toward a common mode filter capable of being miniaturized and thinned simultaneously with improving noise removing performance.

SUMMARY OF THE INVENTION

An object of the present invention is to miniaturize a common mode filter and improve impedance characteristics.

Objects of the present invention are not limited to the above-mentioned objects. That is, other objects that are not mentioned may be obviously understood by those skilled in the art to which the present invention pertains from the following description.

According to an exemplary embodiment of the present invention, there is provided a common mode filter having four coil layers or more, each layer including a primary coil and a secondary coil, and the size of the common mode filter may be reduced and impedance characteristics may be improved.

The primary coils of the common mode filter may be connected in series from a starting point thereof to an ending point thereof; and the secondary coils of the common mode filter may be connected in series from a starting point thereof to an ending point thereof.

Each of the primary coil and the secondary coil of the respective coil layers may be connected to each of the primary coil and the secondary coil, respectively, of adjacent coil layers through an internal terminal or an external terminal

A discontinuous part made of an insulating material may be provided between one coil layer and external terminals provided on a coil layer of an upper portion thereof to allow all of the primary coils and all of the secondary coils to be connected with each other, respectively, in series from the lowest layer to the highest layer.

Meanwhile, the common mode filter may further include an external electrode or an external plating terminal. The external terminals positioned on both surfaces of the discontinuous part need not to be directly in contact with the external plating terminal.

According to another exemplary embodiment of the present invention, there is provided a signal passing module including the common mode filter as described above provided between a first terminal and a second terminal.

According to another exemplary embodiment of the present invention, there is provided a method of manufacturing a common mode filter capable of manufacturing the common mode filter.

A layer including the discontinuous part as described above may be referred to as a function layer, and the function layer may be formed between a third coil layer and a fourth coil layer.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Various advantages and features of the present invention and methods accomplishing thereof will become apparent from the following description of exemplary embodiments with reference to the accompanying drawings. However, the present invention may be modified in many different forms and it should not be limited to exemplary embodiments set forth herein. These exemplary embodiments may be provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Meanwhile, like reference numerals throughout the specification denote like elements.

Terms used in the present specification are for explaining exemplary embodiments rather than limiting the present invention. Unless explicitly described to the contrary, a singular form includes a plural form in the present specification. The words ‘comprise’ and/or ‘comprising’, and the like will be understood to imply the inclusion of stated constituents, steps, operations and/or elements but not the exclusion of any other constituents, steps, operations and/or elements.

For purpose of simplification and clearness of illustration, a general configuration scheme will be shown in the accompanying drawings, and a detailed description of the feature and the technology which are well known in the art will be omitted. Additionally, components shown in the accompanying drawings are not necessarily shown to scale. For example, sizes of some components shown in the accompanying drawings may be exaggerated as compared with other components in order to assist in understanding of exemplary embodiments of the present invention. Like reference numerals on different drawings will denote like components, and similar reference numerals on different drawings will denote similar components, but are not necessarily limited thereto.

In the specification and the claims, terms such as “first”, “second”, “third”, “fourth”, and the like, if any, will be used to distinguish similar components from each other and be used to describe a specific sequence or a generation sequence, but is not necessarily limited thereto. For example, it may be understood that these terms are compatible with each other under an appropriate environment so that exemplary embodiments of the present invention to be described below may be operated in a sequence different from a sequence shown or described herein. Likewise, in the present specification, in the case in which it is described that a method includes a series of steps, a sequence of these steps suggested herein is not necessarily a sequence in which these steps may be executed. That is, any described step may be omitted or any other step that is not described herein may be added to the method.

In the specification and the claims, terms such as “left”, “right”, “front”, “rear”, “top”, “bottom”, “over”, “under”, and the like, if any, do not necessarily indicate relative positions that are not changed, but are used for description. It may be understood that these terms are compatible with each other under an appropriate environment so that exemplary embodiments of the present invention to be described below may be operated in a direction different from a direction shown or described herein. A term “connected” used herein is defined as being directly or indirectly connected in an electrical or non-electrical scheme. Targets described as being “adjacent to” each other may physically contact each other, be close to each other, or be in the same general range or region, in the context in which the above phrase is used. Here, a phrase “in an exemplary embodiment” means the same exemplary embodiment, but is not necessarily limited thereto.

Hereinafter, a configuration and an acting effect of exemplary embodiments of the present invention will be described in more detail with reference to the accompanying drawings.

FIG. 1is a perspective view schematically showing a common mode filter100according to an exemplary embodiment of the present invention,FIG. 2is a cross-sectional view taken along line I-I′ ofFIG. 1,FIG. 3Ais a cross-sectional view taken along line II-II′ ofFIG. 1,FIG. 3Bis a cross-sectional view taken along the line III-III′ ofFIG. 1, andFIG. 3Cis a cross-sectional view taken along the line IV-IV′ ofFIG. 1.

In addition,FIG. 4Ais a plan view schematically illustrating a first coil layer L1of the common mode filter100according to the exemplary embodiment of the present invention,FIG. 4Bis a plan view schematically illustrating a second coil layer L2of the common mode filter100according to the exemplary embodiment of the present invention,FIG. 4Cis a plan view schematically illustrating a third coil layer L3of the common mode filter100according to the exemplary embodiment of the present invention, andFIG. 4Dis a plan view schematically illustrating a fourth coil layer L4of the common mode filter100according to the exemplary embodiment of the present invention.

In addition,FIG. 5is a view schematically illustrating a connection relationship between primary coils PC according to an exemplary embodiment of the present invention.

Referring toFIGS. 1 to 5, the common mode filter100according to the exemplary embodiment of the present invention may include four coil layers L1, L2, L3and L4including primary coils PC and secondary coils SC. Here, a component including the four coil layer L1, L2, L3and L4may be referred to as a coil part120.

In addition to the four coil layers, the common mode filter100may include a substrate110made of a magnetic material such as ferrite or the like, a magnetic body part130, an insulating part122, external electrodes141,142,143and144, an external plating terminal150, and the like.

Here, a scheme in which the primary coil PC and the secondary coil SC are formed in a spiral shape on the same planar surface may be referred to as a simultaneous coil scheme. This simultaneous coil scheme is different from a so-called single coil scheme in which the primary coil and the second coil are formed to be included in different layers from each other.

In this case, when predetermined impedance characteristics is implemented by forming the coil on the same area using a conducive pattern having the same line width, the common mode filter of the simultaneous coil scheme may be implemented by the number of layers smaller than the common mode filter of the single coil scheme.

For example, in the case in which an impedance of 30 to 35Ω is implemented by the common mode filter having an area of 0.4 mm×0.3 mm, when the simultaneous coil scheme is used, the impedance may be implemented by two coil layers, while when the single coil scheme is used, four coil layers may be required.

Meanwhile, the existing common mode filter of the simultaneous coil scheme has been generally implemented in a form including two coil layers or less.

However, in order to improve the impedance characteristics while performing miniaturization, the common mode filter100according to the exemplary embodiment of the present invention may include four coil layers or more including the primary coil PC and the secondary coil SC.

In this case, the primary coil and the secondary coil included in each of the coil layers need not directly contact the primary coil and the secondary coil, respectively, formed on the adjacent layer. To this end, the insulating part122may be provided between the conductive patterns. In addition, the primary coil and the secondary coil included in each of the coil layers may be connected to the primary coils and the secondary coils, respectively, included in adjacent coil layers through internal terminals or external terminals.

Planar shapes of the first coil layer L1to the fourth coil layer L4may be understood with reference toFIGS. 4A to 4D.

For example, according to an exemplary embodiment of the present invention, a first primary coil PC1and a first secondary coil SC1may be formed together in a spiral shape on the first coil layer L1in a state in which they are spaced apart from each other by a predetermined distance, a first primary external terminal P1may be connected to one end of the first primary coil PC1, and a first primary internal terminal PI1may be connected to the other end of the first primary coil PC1. Similarly, a first secondary external terminal S1may be connected to one end of the first secondary coil SC1and a first secondary internal terminal SI1may be connected to the other end of the first secondary coil SC1.

Meanwhile, the second coil layer L2to the fourth coil layer L4may also be implemented in the form similar to that as described above.

Here, referring toFIG. 5, according to an exemplary embodiment of the present invention, it may be understood that the primary coil may be connected in series from a starting point thereof to an ending point thereof, since the first primary external terminal P1, the first primary coil PC1, the first primary internal terminal PI1, a first primary via PV1, a second primary internal terminal PI2, a second primary coil PC2, a second primary external terminal P2, a third primary external terminal P3, a third primary coil PC3, a third primary internal terminal PI3, a second primary via PV2, a fourth primary internal terminal PI4, a fourth primary coil PC4, and the fourth primary external terminal P4are sequentially connected in the above-mentioned order.

Of course, although not shown, the secondary coil may also be connected in series by the same manner. That is, it may be understood that the secondary coil may be connected in series from a starting point thereof to an ending point thereof, since the first secondary external terminal S1, the first secondary coil SC1, the first secondary internal terminal SI1, a first secondary via SV1, a second secondary internal terminal SI2, a second secondary coil SC2, a second secondary external terminal S2, a third secondary external terminal S3, a third secondary coil SC3, a third secondary internal terminal S13, a second secondary via SV2, a fourth secondary internal terminal SI4, a fourth secondary coil SC4, and the fourth secondary external terminal S4are sequentially connected in the above-mentioned order.

Meanwhile,FIG. 8is a block diagram schematically illustrating a signal passing module1000according to an exemplary embodiment of the present invention andFIG. 9is a circuit diagram schematically illustrating a common mode filter100according to an exemplary embodiment of the present invention.

Referring toFIG. 8, the signal passing module1000according to the exemplary embodiment of the present invention may include a first terminal200, a common mode filter100, and a second terminal300. Various filters400such as an LC filter, and the like may be further provided between the common mode filter100and the second terminal300, if necessary.

The signal passing module1000mentioned above may be provided in a first electronic device ED to serve to transmit and receive signals to and from another external device, for example, a second electronic device illustrated inFIG. 8.

Here, if it is assumed that the first electronic device ED and the second electronic device transmits and receives a differential mode signal to transmit and receive predetermined data to and from each other, a common mode signal which is interposed during the signal transmission and reception process may be considered as noise, and the common mode filter100may serve to reduce the common mode noise as described above.

First, the first terminal200may be selectively connected or blocked to or from the second electronic device.

In addition, the common mode filter100as described above or to be described below may be connected to the first terminal200.

In addition, the second terminal300may be directly connected to the common mode filter100or connected to the common mode filter100via a filter400to serve to output a signal in which at least a portion of the common mode noise is removed.

Referring toFIG. 9, in the common mode filter100according to the exemplary embodiment of the present invention, the starting point of the primary coil PC may be the first primary external terminal P1and the ending point of the primary coil PC may be the fourth primary external terminal P4. In addition, the starting point of the secondary coil SC may be the first secondary external terminal S1and the ending point of the secondary coil SC may be the fourth secondary external terminal S4.

As such, only if both ends of the primary coil and both ends of the secondary coil are each provided with the terminals, the common mode filter100may be connected onto a signal transmission and reception path to perform a function of removing the common mode noise.

In addition, referring toFIGS. 1 to 3C, according to an exemplary embodiment of the present invention, the first primary external terminal P1may be connected to a first primary external electrode141, the fourth primary external terminal P4may be connected to a second primary external electrode142, the first secondary external terminal S1may be connected to a first secondary externally electrode143, and the fourth secondary external terminal S4may be connected to a second secondary external electrode144. Further, the first primary external electrode141may be connected to a first primary external plating terminal151, the second primary external electrode142may be connected to a second primary external plating terminal152, the first secondary external electrode143may be connected to a first secondary external plating terminal153, and the second secondary external electrode144may be connected to the second secondary external plating terminal154. As a result, the first primary external plating terminal151may be connected to the first primary external terminal P1, the second primary external plating terminal152may be fourth primary external terminal P4, the first secondary external plating terminal153may be connected to the first secondary external terminal S1, and the second secondary external plating terminal154may be connected to the fourth primary external terminal P4.

Accordingly, the first primary external electrode141or the first primary external plating terminal151may be connected to the first terminal200, and the first secondary external electrode143or the first secondary external plating terminal153may be connected to the first terminal200.

In addition, the second primary external electrode142or the second primary external plating terminal152may be connected to the second terminal300, and the second secondary external electrode144or the second secondary external plating terminal154may be connected to the second terminal300.

Meanwhile, referring toFIGS. 4A to 5, in the common mode filter100according to an exemplary embodiment of the present invention, the first primary external terminal P1and the second primary external terminal P2are provided to a position at which they are not overlapped with each other in a vertical projection region, while the second primary external terminal P2, the third primary external terminal P3and the fourth primary external terminal P4are provided to a position at which they are overlapped with one another in the vertical projection region. As a result, the common mode filter100as illustrated inFIG. 9may be implemented.

Here, referring toFIG. 5, it may be understood that the second primary external terminal P2and the third primary external terminal P3are directly connected to each other, while the third primary external terminal P3and the fourth primary external terminal P4need not to be directly connected to each other.

As described above, since the second primary external terminal P2, the third primary external terminal P3, and the fourth primary external terminal P4are provided to the position at which they are overlapped with each other in the vertical projection region, the second primary external terminal P2and the third primary external terminal P3may be directly connected to each other. However, since the third primary external terminal P3and the fourth primary external terminal P4need not to be directly connected to each other while being overlapped with each other in the vertical projection region, a separate unit may be required. In the common mode filter100according to the exemplary embodiment of the present invention, as the separate unit, a first discontinuous part DC1made of an insulating material may be provided between the third primary external terminal P3and the fourth primary external terminal P4.

Although the view such asFIG. 5is not separately shown with respect to the secondary coil, the secondary coil may include a second discontinuous part DC2according to a principle similar to the case of the first discontinuous part DC1of the primary coil as set forth.

Referring toFIGS. 1 and 4D, the common mode filter100according to the exemplary embodiment of the present invention may further include the external electrodes141,142,143and144and the external plating terminal150.

The external electrodes may be provided on the fourth coil layer L4. That is, the second primary external electrode142contacting an upper surface of the fourth primary external terminal P4and the second secondary external electrode144contacting an upper surface of the fourth secondary external terminal S4may be provided.

Meanwhile, the first primary external electrode141may be provided on the first primary external terminal P1and the first secondary external electrode143may be provided on the first secondary external terminal S1. However, the first primary external electrode141and the first primary external terminal P1are not directly in contact with each other, the first secondary external electrode143and the first secondary external terminal S1are not directly in contact with each other. Accordingly, in the vertical projection region of the first primary external terminal P1, the second coil layer L2may be further provided with a second dummy primary external terminal DP2, the third coil layer L3may be further provided with a third dummy primary external terminal DP3, and the fourth coil layer L4may be further provided with a fourth dummy primary external terminal DP4. In addition, in the vertical projection region of the first secondary external terminal S1, the second coil layer L2may be further provided with a second dummy secondary external terminal DS2, the third coil layer L3may be further provided with a third dummy secondary external terminal DS3, and the fourth coil layer L4may be further provided with a fourth dummy secondary external terminal DS4. In this case, the term Each of the first primary external terminal P1and the first secondary external terminal S1provided to the first coil layer L1may be connected to each of the first primary external electrode141and the second primary external electrode142through the dummy terminals as described above.

In addition, the external plating terminal150may be provided on surfaces of the external electrodes141,142,143and144, and may serve to improve efficiency of work in which the common mode filter100is mounted on a circuit board (not shown) of the electronic device, or the like and to improve adhesion between the common mode filter100and the circuit board (not shown). In addition, the external plating terminal150may be implemented using typical nickel or a nickel alloy.

Meanwhile, the external plating terminal150may be formed on an upper surface of the external electrode as well as a side thereof. However, it has been described in the common mode filter100according to the exemplary embodiment of the present invention that the first discontinuous part DC1may be provided to a vertically downward region of the second primary external electrode142, and the second discontinuous part DC2may be provided to a vertically downward region of the second secondary external electrode144. The first discontinuous part DC1and the second discontinuous part DC2may perform an insulating function enabling each of the primary coil and the secondary coil to be connected in series from the starting point to the ending point. Accordingly, at least the second primary external plating terminal152contacting the second primary external electrode142and the second secondary external plating terminal154contacting the second secondary external electrode144need not to be directly in contact with the external terminals provided to downward regions of at least the first discontinuous part DC1and the second discontinuous part DC2. That is, the second primary external plating terminal152contacting the second primary external electrode142need not to be directly in contact with the third primary external terminal P3and the second primary external terminal P2, and the second primary external plating terminal152contacting the second primary external electrode142need not to be directly in contact with the third secondary external terminal S3and the second secondary external terminal S2. To this end, a first insulating wall IW1formed of an insulating material may be provided at least between the third primary external terminal P3and the second primary external terminal P2, and the second primary external plating terminal152. In addition, a second insulating wall IW2formed of an insulating material may be provided at least between the third secondary external terminal S3and the second secondary external terminal S2, and the second secondary external plating terminal154.

FIG. 6is a perspective view schematically illustrating a common mode filter100′ according to another exemplary embodiment of the present invention andFIG. 7is a cross-sectional view taken along line I-I′ ofFIG. 6.

Referring toFIGS. 6 and 7, it may be understood that the same object may be implemented without having the first insulating wall IW1and the second insulating wall IW2as describe above by providing a second primary external plating terminal152′ and a second secondary external plating terminal154′ to only on an upper surface of the common mode filer100.

FIGS. 10A to 10Eillustrate a method of manufacturing a common mode filter100according to an exemplary embodiment of the present invention, where:FIG. 10Ais a cross-sectional view schematically illustrating a process of forming a first coil layer L1with respect to a cross-section taken along line I-I′ ofFIG. 1,FIG. 10Bis a cross-sectional view schematically illustrating a process of forming a second coil layer L2with respect to a cross-section taken along line I-I′ ofFIG. 1,FIG. 10Cis a cross-sectional view schematically illustrating a process of forming a third coil layer L3with respect to a cross-section taken along line I-I′ ofFIG. 1,FIG. 10Dis a cross-sectional view schematically illustrating a process of forming a fourth coil layer L4with respect to a cross-section taken along line I-I′ ofFIG. 1, andFIG. 10Eis a cross-sectional view schematically illustrating a process of forming a fourth coil layer L4with respect to a cross-section taken along line III-III′ ofFIG. 1.

FIGS. 11A to 11Iare plan views of the respective masks which are used in a method of manufacturing a common mode filter100according to an exemplary embodiment of the present invention, where:FIG. 11Ais a plan view of a mask for a first layer ML1,FIG. 11Bis a plan view of a mask for a second layer ML2,FIG. 11Cis a plan view of a mask for a third layer ML3,FIG. 11Dis a plan view of a mask for a fourth layer ML4,FIG. 11Eis a plan view of a first mask M1,FIG. 11Fis a plan view of a second mask M2,FIG. 11Gis a plan view of a third mask M3,FIG. 11His a plan view of a state in which the third mask M3ofFIG. 11Gis rotated counterclockwise by 90°, andFIG. 11Iis a plan view of a state in which the mask for the fourth layer ML4ofFIG. 11Dis rotated counterclockwise by 90°.

Meanwhile, although the present specification describes the respective processes based on a lithography method of a negative scheme, it may be understood that the common mode filter may be manufactured by a lithography method or a laminate method of a positive scheme.

In addition, sinceFIGS. 10A to 10Dare the cross-sectional views for the cross-section taken along line I-I′ ofFIG. 1andFIG. 10Eis the process cross-sectional view for the cross-section taken along line III-III′ ofFIG. 1, portions which are not visible from the cross-section taken along line I-I′ and the cross-section taken along line III-III′ are not indicated. However, referring toFIGS. 1 to 11Itogether, processes of performing the method of manufacturing the common mode filter according to the exemplary embodiment of the present invention may be sufficiently understood.

Referring toFIGS. 10A to 11Itogether withFIGS. 1 to 9, the method of manufacturing the common mode filter100according to the exemplary embodiment of the present invention may include forming first coil layer L1to fourth coil layer L4.

In this case, the first coil layer L1may be formed on a substrate110made of a magnetic material such as ferrite, or the like.

First, referring toFIG. 10A, a seed layer SE may be formed on an upper surface of the substrate110and a photoresist PR may be formed on an upper surface of the seed layer SE. Next, an exposure process is performed using the mask for the first layer ML1and the photoresist PR in the exposed region may be then removed. In this case, the mask for the first layer ML1may be a mask formed to allow light to penetrate through a portion corresponding to a region which will be provided with the first primary coil PC1, the second secondary coil SC2, the first primary internal terminal PI1, the first primary external terminal P1, the first secondary internal terminal SI1, and the second secondary external terminal S2which configure the first coil layer L1as described above, and one example of the mask for the first layer ML1is illustrated inFIG. 11A.

Next, a plating process may be performed on a region in which the photoresist PR is removed, and the photoresist PR and the seed layer SE of portions except for regions having the first dummy primary external terminal DP1, the first dummy secondary external terminal DS1, and the like formed thereon may be then removed. As a result, the first coil layer L1having a planar shape as illustrated inFIG. 4Amay be formed.

Referring toFIG. 10B, in a state in which the photoresist PR is formed on the upper surface of the first coil layer L1, the exposure process may be performed using the first mask M1and the photoresist PR in the exposed region may be then removed. In this case, one example of the first mask M1is illustrated inFIG. 11E, and the first mask M1may be formed to allow the light to penetrate through a position corresponding to each of the four external terminals or dummy external terminals and positions corresponding to the primary via and the secondary via.

Next, the seed layer SE may be formed on regions in which the photoresist PR exposed by the first mask M1is removed and an upper region of the remaining photoresist PR.

Next, in a state in which the photoresist PR covering an upper portion of the seed layer SE is formed, an exposure process is performed using the mask for the second layer ML2and the photoresist PR in the exposed region may be then removed.

Next, a plating process may be performed on a region in which the photoresist PR is removed, and the photoresist PR and the seed layer SE of portions except for regions having the second primary external terminal P2, the second secondary coil SC2, the second secondary external terminal S2, and the like formed thereon may be then removed. As a result, the second coil layer L2having a planar shape as illustrated inFIG. 4Bmay be formed.

Referring toFIG. 10C, in a state in which the photoresist PR is formed on the second coil layer L2, the exposure process may be performed using the second mask M2and the photoresist PR in the exposed region may be then removed. In this case, the second mask M2may be formed to allow the light to penetrate through a position corresponding to each of the four external terminals or dummy external terminals, similar to the first mask M1used in the process of forming the second coil layer L2. However, there is a difference in that the first mask M1is formed so as to allow the light to penetrate through the regions corresponding to the primary via and the secondary via, but the second mask M2is formed so as not to allow the light to penetrate through the regions corresponding to the primary via and the secondary via, and one example of the second mask M2is illustrated inFIG. 11F.

Next, the seed layer SE may be formed on regions in which the photoresist PR exposed by the second mask M2is removed and an upper region of the remaining photoresist PR.

Next, in a state in which the photoresist PR covering an upper portion of the seed layer SE is formed, an exposure process is performed using the mask for the third layer ML3and the photoresist PR in the exposed region may be then removed.

Next, a plating process may be performed on a region in which the photoresist PR is removed, and the photoresist PR and the seed layer SE of portions except for regions having the third primary external terminal P3, the third primary coil PC3, the third secondary external terminal S3, and the like formed thereon may be then removed. As a result, the third coil layer L3having a planar shape as illustrated inFIG. 4Cmay be formed.

Referring toFIGS. 10D and 10E, in a state in which the photoresist PR is formed on the upper surface of the third coil layer L3, the exposure process may be performed using the third mask M3and the photoresist PR in the exposed region may be then removed. In this case, unlike the first mask M1, the third mask M3is formed so as not to allow the light to penetrate through the position corresponding to each of the third primary external terminal P3and the third secondary external terminal S3and is formed so as to allow the light to penetrate through only the position corresponding to each of the third primary dummy external terminal and the third secondary dummy external terminal and the position corresponding to each of the primary via and the secondary via, and one example of the third mask M3is illustrated inFIGS. 11G and 11H.

Next, the seed layer SE may be formed on regions in which the photoresist PR exposed by the third mask M3is removed and an upper region of the remaining photoresist PR.

Next, in a state in which the photoresist PR covering an upper portion of the seed layer SE is formed, an exposure process is performed using the mask for the fourth layer ML4and the photoresist PR in the exposed region may be then removed.

Next, a plating process may be performed on a region in which the photoresist PR is removed, and the photoresist PR and the seed layer SE of portions except for regions having the fourth primary external terminal P4, the fourth secondary coil SC4, the fourth secondary external terminal S4, the fourth dummy secondary external terminal DS4, and the like formed thereon may be then removed. As a result, the fourth coil layer L4having a planar shape as illustrated inFIG. 4Dmay be formed.

Here, referring toFIGS. 10D and 10E, the photoresist PR remains between the third primary external terminal P3and the fourth primary external terminal P4and between the third secondary external terminal S3and the fourth secondary external terminal S4to thereby prevent the external terminals from being directly in contact with each other. These portions correspond to the first discontinuous part DC1and the second discontinuous part DC2described above with reference toFIGS. 1 to 4D. That is, althoughFIGS. 1 to 4Dindicate a different kind of hatching from the insulating part122in order to allow the first discontinuous part DC1and the second discontinuous part DC2to be clearly understood, it may be appreciated that the first discontinuous part DC1and the second discontinuous part DC2may be implemented together with the insulating part122by the photoresist PR. Meanwhile, a layer including the first discontinuous part DC1and the second discontinuous part DC2may be separately referred to as a function layer L4′. That is, the function layer L4′ may be provided between the third coil layer L3and the fourth coil layer L4, and may mean a layer preventing the third primary external terminal P3and the fourth primary external terminal P4from being directly in contact with each other and preventing the third secondary external terminal S3and the fourth secondary external terminal S4from being directly in contact with each other, and allowing the third dummy primary external terminal DP3and the fourth dummy primary external terminal DP4to be directly in contact with each other and allowing the third dummy secondary external terminal DS3and the fourth dummy secondary external terminal DS4to be directly in contact with each other.

In addition, althoughFIGS. 10A to 10Ehave explicitly indicated the seed layer SE to assist in understanding for the process,FIGS. 2to3C have indicated the seed layer SE without being classified for purpose of simplification of the drawings.

In addition, althoughFIG. 3A, and the like illustrate a case in which the primary coil and the secondary coil in each coil layer are aligned in a vertical direction, coil patterns in an upper layer and a lower layer may be provided to be alternated with each other, thereby reducing parasitic capacitance between coils in the upper layer and the lower layer.

Meanwhile, although not shown, after the fourth coil layer L4is formed, a process of forming the external electrodes on the fourth coil layer L4, a process of forming the magnetic body part130, a process of forming the external plating terminal, and the like may be further performed. Referring toFIGS. 1 to 11Itogether, the process of manufacturing the above-mentioned components may be sufficiently understood.

FIG. 12is a cross-sectional view schematically illustrating a cross-section which is obtained by cutting the common mode filter according to another exemplary embodiment of the present invention along line I-I′ ofFIG. 1,FIG. 13Ais a cross-sectional view schematically illustrating a cross-section which is obtained by cutting the common mode filter according to another exemplary embodiment of the present invention along line II-IP ofFIG. 1,FIG. 13Bis a cross-sectional view schematically illustrating a cross-section which is obtained by cutting a common mode filter according to still another exemplary embodiment of the present invention along line II-II′ ofFIG. 1,FIG. 14Ais a plan view schematically illustrating a (2N−1)-th coil layer of the common mode filter according to another exemplary embodiment of the present invention,FIG. 14Bis a plan view schematically illustrating a 2N-th coil layer of the common mode filter according to another exemplary embodiment of the present invention,FIG. 14Cis a plan view schematically illustrating a 2N-th coil layer of the common mode filter according to still another exemplary embodiment of the present invention, andFIG. 15is a view schematically illustrating a connection relationship between primary coils according to another exemplary embodiment of the present invention.

Referring toFIGS. 12 to 15together withFIGS. 1 to 11Ias described above, it may be appreciated that the common mode filter according to the exemplary embodiment of the present invention may have the coil layer formed of more layers such as six layers, eight layers, or the like.

FIG. 12, or the like illustrates the four or more coil layers as a (2N−1)-th coil layer L2N−1 and a 2N-th coil layer L2N, where N is a natural number of 3 or more. That is, if N is 3, the common mode filter200according to the exemplary embodiment of the present invention may include first through sixth coil layers. In addition, if N is 4, the common mode filter200according to the exemplary embodiment of the present invention may include first through eighth coil layers.

However, only two layers of the highest portion among the four or more coil layers are shown for purpose of simplification of illustration. Although not shown, it may be appreciated that if N is the natural number of 4 or more, a (2N−2)-th coil layer, a (2N−3)-th coil layer, and the like may be further provided below the (2N−1)-th coil layer L2N−1.

Meanwhile, a (2N−1)-th primary coil PC2N−1 and a (2N−1)-th secondary coil SC2N−1 may be formed together in a spiral shape on the (2N−1)-th coil layer in a state in which they are spaced apart from each other by a predetermined distance, a (2N−1)-th primary external terminal P2N−1 may be connected to one end of the (2N−1)-th primary coil PC2N−1, and a (2N−1)-th primary internal terminal PI2N−1 may be connected to the other end of the (2N−1)-th primary coil PC2N−1. Similarly, a (2N−1)-th secondary external terminal S2N−1 may be connected to one end of the (2N−1)-th secondary coil SC2N−1 and a (2N−1)-th secondary internal terminal SI2N−1 may be connected to the other end of the (2N−1)-th secondary coil SC2N−1.

In addition, a 2N-th coil layer L2N may also be implemented in the form similar to that as described above.

However, if the fifth coil layer to the 2N-th coil layer are further provided on the fourth coil layer, discontinuous parts DC2N−1 and DC2N need to be provided between the fifth coil layer and the sixth coil layer, and between the (2N−1)-th coil layer L2N−1 and the 2N-th coil layer L2N, respectively.

Here, it was described above with reference toFIG. 5that the first primary external terminal P1to the fourth primary external terminal P4are sequentially connected. Further, referring toFIG. 15, it may be understood that the primary coil may be connected in series from a starting point thereof to an ending point thereof, since the (2N−1)-th primary external terminal P2N−1, the (2N−1)-th primary coil PC2N−1, the (2N−1) primary internal terminal PI2N−1, an N-th primary via PVN, a 2N-th primary internal terminal PI2N, a 2N-th primary coil PC2N, and a 2N-th primary external terminal P2N are sequentially connected in the above-mentioned order.

In this case, the (2N−1)-th discontinuous part may be provided to a region between the (2N−1)-th primary external terminal P2N−1 and the 2N-th primary external terminal P2N.

Although not shown, the secondary coil may also be connected in series by the same manner. That is, it may be understood that the secondary coil may be connected in series from a starting point thereof to an ending point thereof by sequentially connecting a (2N−1)-th secondary external terminal S2N−1, a (2N−1)-th secondary coil SC2N−1, a (2N−1)-th secondary internal terminal SI2N−1, an N-th secondary via SVN, a 2N-th secondary internal terminal, a 2N-th secondary coil SC2N, and a 2N-th secondary external terminal S2N in the above-mentioned order.

In this case, the 2N-th discontinuous part may be provided to a region between the (2N−1)-th secondary external terminal S2N−1 and the 2N-th secondary external terminal S2N.

FIG. 14Cillustrates a planar shape of a 2N-th coil layer of the common mode filter according to still another exemplary embodiment of the present invention.

In the common mode filter according to the exemplary embodiment of the present invention, the 2N-th primary internal terminal PI2N and the 2N-th primary external terminal P2N of the 2N-th coil layer may be connected to each other by a primary lead pattern PL, which is shorter than a spiral coil, instead of the primary coil formed in a spiral shape. The 2N-th secondary internal terminal SI2N and the 2N-th secondary external terminal S2N may be connected to each other by a secondary lead pattern SL, which is shorter than the spiral coil, instead of the secondary coil.

Although the exemplary embodiment of the present invention illustratively describes a case in which the primary lead pattern PL and the secondary lead pattern SL are provided on the 2N-th coil layer, the primary lead pattern and the secondary lead pattern may be provided on even-numbered layers such as the second coil layer, the fourth coil layer, and the like, instead of the primary coil or the secondary coil, if necessary.

An overlapped description for the similar matters as described above will be omitted.

According to the exemplary embodiment of the present invention, the common mode filter may be miniaturized and the impedance characteristics may be improved.