DA converter

A low power consumption DA converter includes a segment type DA converter and an R-2R resistance ladder DA converter. The segment type DA converter is coupled to a power source voltage VDD and outputs a current signal changing in a stepwise manner according to inputted upper bits D[7 to 5]. The R-2R resistance ladder DA converter is coupled to the segment type DA converter in series between the power source voltage VDD and a ground voltage GND, and outputs an output voltage Vout changing in a stepwise manner. The R-2R resistance ladder DA converter changes the output voltage Vout by raising or lowering a reference voltage Vref according to the lower bits D[4 to 0] and the current signal from the segment type DA converter.

CROSS-REFERENCES TO RELATED APPLICATIONS

The disclosure of Japanese Patent Application No. 2010-192647 filed on Aug. 30, 2010 including the specification, drawings and abstract is incorporated herein by reference in its entirety.

BACKGROUND

The present invention relates to a DA converter, and in particular to a low power consumption DA converter.

As high performance and low power consumption of large scale integration (LSI) are required, high performance (reduction in the amount of glitches) and low current consumption of DA converter are increasingly required. Generally, a current summing DA converter (for example, Japanese Unexamined Patent Application Publication No. Sho 62 (1987)-5729) is used as a DA converter in which the amount of glitches is reduced. However, an ordinary current summing DA converter has a problem that the current consumption is large. Therefore, a DA converter that can reduce current consumption is desired to be developed.

An example of the current summing DA converter as mentioned above will be described.FIG. 10is a circuit block diagram showing a configuration of an eclectic DA converter900in which a current summing DA converter is mounted. As shown inFIG. 10, the eclectic DA converter900includes a driver unit91, a segment decoder unit92, an R-2R driver unit93, a segment type (current summing) DA converter94, and an R-2R resistance ladder DA converter95. The eclectic DA converter900processes the upper m bits of inputted (m+n) bits (m and n are integers of 2 or more) by the segment type (current summing) DA converter94and processes the lower n bits by the R-2R resistance ladder DA converter95. The upper m bits are inputted into the segment decoder unit92via the driver unit91. The lower n bits are inputted into the R-2R resistance ladder DA converter95via the R-2R driver unit93.

The segment decoder unit92has (2m−1) decoders (not shown inFIG. 10). Thereby, a digital signal of the upper m bits inputted into the segment decoder unit92is decoded into a signal of (2m−1) bits. The segment type DA converter94A has (2m−1) current sources and current switches. The (2m−1) current sources (current value I0) and current switches are switched to an off state or an on state according to the signal of (2m−1) bits outputted from the segment decoder unit92. Thereby, the digital signal of the upper m bits is converted into an analog amount in a range from 0 [V] to −(2m−1)×I0×(⅔)×R [V].

The R-2R resistance ladder DA converter95has n current sources (current value I0) and current switches, and a resistance ladder. The resistance ladder includes resistances R (resistance value is R) and resistances 2R (resistance value is 2R). Each of the n current sources and current switches is switched to an off state or an on state according to one bit of a lower n-bit signal. Thereby, the lower n-bit signal is converted into an analog amount in a range from 0 [V] to −(1−(½′))×I0×(⅔)×R [V] by the resistance ladder.

An analog output corresponding to a digital signal of (m+n) bits inputted into the eclectic DA converter900has an analog amount obtained by summing up the analog amounts generated by the segment type DA converter94and the R-2R resistance ladder DA converter95.

SUMMARY

However, inventors found that the aforementioned DA convertor causes a problem as described below. The aforementioned eclectic DA convertor900sums up currents flowing in the segment type DA converter94and the R-2R resistance ladder DA converter95, and converts the summed-up result into a voltage. Therefore, an eclectic DA convertor such as the eclectic DA convertor900causes a problem that current consumption increases.

A DA converter according to an aspect of the present invention includes: a first DA conversion unit that is coupled to a first voltage source and outputs a current signal changing in a stepwise manner according to an inputted first digital signal; and a second DA conversion unit that is coupled to the first DA conversion unit in series between a second voltage source different from the first voltage source and the first voltage source and outputs a current signal changing in a stepwise manner, in which the second DA conversion unit changes the output voltage by raising or lowering a reference voltage supplied from a reference voltage source coupled to the second DA conversion unit according to an inputted second digital signal and the current signal. In this DA converter, the first DA conversion unit and the second DA conversion unit are coupled in series. Therefore, it is possible to reduce current flowing in the DA converter compared with a case in which the first DA conversion unit and the second DA conversion unit are coupled in parallel.

A DA converter according to another aspect of the present invention includes:

a first constant current cell unit including multiple first constant current sources;

a second constant current cell unit which is coupled to the first constant current cell unit in series via a first node and includes multiple second constant current sources, the number of which is the same as that of the first constant current sources; and

a resistance circuit which is coupled between the first node and an output terminal and outputs an output voltage changing in a stepwise manner according to a flowing current and a voltage of the first node from the output terminal,

in which, when the value of the most significant bit of an inputted digital signal is a first value, the first constant current cell unit changes an output current in a stepwise manner by controlling the number of the first constant current sources that output current according to q (q is an integer of 1 or more) bits excluding the most significant bit included in the digital signal, and the second constant current cell unit couples the second constant current sources to the first node either directly or via the resistance circuit according to r (r is an integer of 2 or more) bits excluding the most significant bit and the q bits included in the digital signal,

when the value of the most significant bit is a second value different from the first value, the second constant current cell unit changes the output current in a stepwise manner by controlling the number of the second constant current sources that output current according to the q bits, and the first constant current cell unit couples the first constant current sources to the first node either directly or via the resistance circuit according to the r bits included in the digital signal,

the voltage of the first node changes in a stepwise manner according to the change of the output current of the first constant current cell unit or the output current of the second constant current cell unit, and

the resistance circuit changes the output voltage by raising or lowering the voltage of the first node according to a combination of the first constant current sources or the second constant current sources coupled to the resistance circuit. In this DA converter, the first constant current cell unit and the second constant current cell unit are coupled in series.

Therefore, it is possible to reduce current flowing in the DA converter compared with a case in which the first constant current cell unit and the second constant current cell unit are coupled in parallel.

According to the aspects of the present configuration, it is possible to provide a low power consumption DA converter.

DETAILED DESCRIPTION

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the drawings, the same elements are given the same reference numerals and repetitive descriptions will be omitted as necessary.

First Embodiment

First, a DA converter according to a first embodiment will be described.FIG. 1is a circuit block diagram showing a configuration of a DA converter100according to the first embodiment. The DA converter100includes a segment type DA converter11and an R-2R resistance ladder DA converter21. The segment type DA converter11and the R-2R resistance ladder DA converter21are coupled in series between a power source voltage VDD and a ground voltage GND. A digital signal of (m+n) bits is inputted into the DA converter100. Here, n and m are integers larger than or equal to 2. The upper m bits of the digital signal of (m+n) bits are inputted into the segment type DA converter11. The lower n bits of the digital signal of (m+n) bits are inputted into the R-2R resistance ladder DA converter21.

The segment type DA converter11includes a driver unit1a, a segment decoder unit2a, and a constant current cell unit3a. The upper m bits are inputted into the segment decoder unit2avia the driver unit1a. The segment decoder unit2adecodes the upper m bits and outputs a generated decode signal. The constant current cell unit3aincludes (2m−1) constant current sources Ia1to Ia(2m−1) and (2m−1) switches Sa1to Sa(2m−1). A constant current source Iak (k is an integer satisfying 1≦k≦2m−1) and a switch Sak are coupled in series between the power source voltage VDD and the R-2R resistance ladder DA converter21(node Va of the R-2R resistance ladder DA converter21). A corresponding decode signal from the segment decoder unit2ais inputted into the control terminal of the switch Sak.

The R-2R resistance ladder DA converter21includes an R-2R driver unit4, a constant current cell unit5a, an R-2R resistance ladder6a, and a resistance Rc. The node Va of the R-2R resistance ladder DA converter21is coupled to the segment type DA converter11. The lower n bits are inputted into the constant current cell unit5avia the R-2R driver unit4. The constant current cell unit5aincludes n constant current sources Ib1to Ibn, n switches Sb1to Sbn, n switches Sc1to Scn, and n inverters IVa1to IVan. The positive terminal of a constant current source Ibj (j is an integer satisfying 1≦j≦n) is coupled to a node Nj of the R-2R resistance ladder6adescribed below via a switch Sbj. The negative terminal of the constant current source Ibj is coupled to the ground voltage GND. A corresponding lower bit is inputted into the control terminal of the switch Sbj. The switch Scj is coupled between the positive terminal of the constant current source Ibj and the node Va. An inverted signal of a corresponding lower bit is inputted into the control terminal of the switch Scj via the inverter IVaj.

The R-2R resistance ladder6aincludes resistances Ra1to Ra(n−1) and resistances Rb1to Rbn. Here, the resistance value of the resistances Ra1to Ra(n−1) is 2R. The resistance value of the resistances Rb1to Rbn is R. An output voltage Vout is outputted from the output terminal of the R-2R resistance ladder6a. The resistances Rb1to Rbn are coupled in series between the node Va and the output terminal. Terminals on the output terminal sides of the resistances Rb1to Rbn are respectively defined as nodes N1to Nn. The resistances Ra1to Ra(n−1) are respectively coupled between the nodes N1to N(n−1) and the node Va. Therefore, a combined resistance value between the node Va and the output terminal of the R-2R resistance ladder6ais R. The resistance Rc is coupled between the node Va of the R-2R resistance ladder6aand a reference voltage source that generates a reference voltage Vref. The resistance value of the resistance Rc is R.

The current value of the constant current sources Ia1to Ia(2m−1) of the segment type DA converter11and the current value of the constant current sources Ib1to Ibn of the R-2R resistance ladder DA converter21are I.

Next, an operation of the DA converter100will be described. When the voltage at the node Va is Va, the voltage Va is determined by a current value obtained by adding an output current βI of the constant current cell unit3ato an output current nI of the constant current cell unit5aand the R-2R resistance ladder6a. Here, β is the number of the constant current sources that are turned on in the constant current cell unit3a, and β is an integer from 0 to (2m−1). In this case, the voltage Va is represented by the following formula (1):
Va=Vref+(β−n)×I×2R(1)

The output voltage Vout outputted from the DA converter100is represented by the following formula (2):

Vout=Va-12n×α×I×2⁢R(2)
Here, α is an integer from 0 to 2n−1.

Next, a current flow in the DA converter100will be described. The output current βI of the constant current cell unit3aflows into the node Va. The current value of the output current βI varies in a range from 0 to (2m−1)I according to variation of data of the upper m bits. The output current nI of the constant current cell unit5aand the R-2R resistance ladder6aalso flows into the node Va. The current value of the output current nI is always nI and constant. When the output current βI and the output current nI have the same value, an equilibrium state is generated, and no current flows in the resistance Rc.

When the output current βI is larger than the output current nI, a current having a current value (β−n)I flows from the node Va to the reference voltage Vref in the resistance Rc. On the other hand, when the output current βI is smaller than the output current nI, a current having a current value (n−β)I flows from the reference voltage Vref to the node Va in the resistance Rc. The maximum current that flows in the DA converter100is (2m−1)I.

Here, a current flow in an eclectic DA converter900which handles (m+n) bits including the upper m bits and the lower n bits will be discussed. In this case, the maximum current that flows in a segment type DA converter94is (2m−1)I. A current that flows in an R-2R resistance ladder DA converter95is nI. Therefore, the maximum current that flows in the eclectic DA converter900is {(2m−1)+n}I.

Therefore, the DA converter100can reduce current consumption by nI compared with the eclectic DA converter900. Thus, according to the present configuration, it is possible to provide a low power consumption DA converter.

Specifically, in the eclectic DA converter900, the segment type DA converter94and the R-2R resistance ladder DA converter95are coupled in parallel. Further, the segment type DA converter94and the R-2R resistance ladder DA converter95include constant current sources coupled to the power source in the same polarity. Therefore, it is necessary to supply current respectively and separately to the segment type DA converter94and the R-2R resistance ladder DA converter95.

On the other hand, in the DA converter100according to the present embodiment, the segment type DA converter11and the R-2R resistance ladder DA converter21are coupled in series. In other words, the constant current sources Ib1to Ibn of the constant current cell unit5auses all or part of the current outputted from the constant current sources Ia1to Ia(2m−1) of the constant current cell unit3a. Thereby, the DA converter100can reduce consumption current compared with the eclectic DA converter900.

Next, as a specific example, a case in which the DA converter100is an 8-bit DA converter will be described. Hereinafter, the 8-bit DA converter100is referred to as a DA converter101.FIG. 2is a circuit block diagram showing a configuration of the DA converter101. An 8-bit digital signal is divided into the upper 3 bits D[7 to 5] and the lower 5 bits D[4 to 0], and inputted into the DA converter101. The constant current cell unit3ais provided with 7(23−1) constant current sources Ia1to Ia7. The constant current cell unit5ais provided with 5 constant current sources Ib1to Ib5. The R-2R resistance ladder6aincludes resistances Ra1to Ra4iand resistances Rb1to Rb5.

FIG. 3is a graph showing an output voltage Vout of the DA converter101. InFIG. 3, the horizontal axis indicates 8-bit code and the vertical axis indicates the value of the output voltage Vout. The DA converter101outputs 256 steps (8 bits) of output voltages in a range shown by the following formula (3):

Next, the current flow in the DA converter101will be described. The output current βI of the constant current cell unit3aflows into the node Va. The current value of the output current βI varies in a range from 0 to 7I according to variation of data of the upper 3 bits. The output current nI of the constant current cell unit5aand the R-2R resistance ladder6aalso flows into the node Va. The current value of the output current nI is always 5I and constant. When the output current βI and the output current nI have the same current value of 5I, an equilibrium state is generated, and no current flows in the resistance Rc.

When the output current βI is larger than the output current nI, a current having a current value up to (7−5)I=2I flows from the node Va to the reference voltage Vref in the resistance Rc. When the output current βI is smaller than the output current nI, a current having a current value up to (5−0)I=5I flows from the reference voltage Vref to the node Va in the resistance Rc. The maximum current that flows in the DA converter101is 7I.

Here, a current flow in the eclectic DA converter900which handles 8 bits including the upper 3 bits and the lower 5 bits will be discussed. In this case, the maximum current that flows in the segment type DA converter94is 7I. The current that flows in the R-2R resistance ladder DA converter95is 5I. Therefore, the maximum current that flows in the eclectic DA converter900is 12I.

Thus, it is possible to specifically confirm that the DA converter101can reduce current consumption by nI compared with the eclectic DA converter900.

Second Embodiment

Next, a DA converter according to a second embodiment will be described.FIG. 4is a circuit block diagram showing a configuration of a DA converter200according to the second embodiment. The DA converter200is a modified DA converter100of the first embodiment in which the segment type DA converter11is replaced by a segment type DA converter12.

The segment type DA converter12is a modified segment type DA converter11in which the constant current cell unit3ais replaced by a constant current cell unit3b. The constant current cell unit3bis a modified constant current cell unit3aof the DA converter100to which switches Sd1to Sd(2m−1) and inverters IVb1to IVb(2m−1) are added.

In the constant current cell unit3b, a switch Sdk (k is an integer satisfying 1≦k≦2m−1) is coupled between the negative terminal of a constant current source Iak and the reference voltage Vref. An inverted signal of a corresponding output signal of the segment decoder unit2ais inputted into the control terminal of the switch Sdk via the inverter IVbk. The other configuration of the DA converter200is the same as that of the DA converter100, so the description is omitted.

Next, an operation of the DA converter200will be described. In the constant current cell unit3a, when the switch Sak is turned off, the switch Sdk is turned on. In this case, a current flows from the constant current source Iak to the reference voltage Vref. On the other hand, when the switch Sak is turned on, the switch Sdk is turned off. In this case, a current flows from the constant current source Iak to the node Va.

Therefore, the constant current cell unit3balways outputs a current having a value of (2m−1)I. On the other hand, in the same manner as in the first embodiment, the constant current cell unit5boutputs a current having a value of nI. In other words, in the DA converter200, a current having a current value (β-n)I always flows from the reference voltage Vref to the node Va in the resistance Rc. In this case, even when there is a parasitic resistance between the reference voltage source (not shown inFIG. 4) that generates the reference voltage Vref and the resistance Rc, the value of the current (β-n)I flowing in the resistance Rc is constant, so it is possible to prevent the reference voltage Vref from fluctuating. Therefore, according to the present configuration, it is possible to output a stable output voltage by preventing the reference voltage Vref from fluctuating. In other words, the DA converter200can generate an output voltage whose fluctuation amplitude is constant.

Third Embodiment

Next, a DA converter according to a third embodiment will be described.FIG. 5is a circuit block diagram showing a configuration of a DA converter300according to the third embodiment. The DA converter300is a modified DA converter100of the first embodiment in which the segment type DA converter11and the R-2R resistance ladder DA converter21are respectively replaced by a segment type DA converter13and an R-2R resistance ladder DA converter22.

The segment type DA converter13is a modified segment type DA converter11in which the constant current cell unit3ais replaced by a constant current cell unit3c. The constant current cell unit3cis a modified constant current cell unit3afrom which the constant current source Ia(2m−1) and the switch Sa(2m−1) are deleted. Among the (2m−1) decode signals generated by the segment decoder unit2a, (2m−2) decode signals are inputted into the constant current cell unit3c. The decode signal other than the decode signals inputted into the constant current cell unit3cis inputted into the R-2R resistance ladder DA converter22.

The R-2R resistance ladder DA converter22is a modified R-2R resistance ladder DA converter21in which the constant current cell unit5aand the R-2R resistance ladder6aare respectively replaced by a constant current cell unit5cand the R-2R resistance ladder6b.

The constant current cell unit5bis a modified constant current cell unit5aof the R-2R resistance ladder DA converter21to which a constant current source Ib(n+1), a switch Sb(n+1), a switch Sc(n+1), and an inverter IVa(n+1) are added. The positive terminal of the constant current source Ib(n+1) is coupled to the output voltage Vout via the switch Sb(n+1). The positive terminal of the constant current source Ib(n+1) is also coupled to the node Va via the switch Sc(n+1). The negative terminal of the constant current source Ib(n+1) is coupled to the ground voltage GND. A corresponding decode signal from the segment decoder unit2ais inputted into the control terminal of the switch Sb(n+1). An inverted signal of a corresponding decode signal from the segment decoder unit2ais inputted into the control terminal of the switch Sc(n+1).

The R-2R resistance ladder DA converter22is a modified R-2R resistance ladder DA converter21in which the constant current cell unit5ais replaced by the constant current cell unit5cand further the R-2R resistance ladder6ais replaced by the R-2R resistance ladder6b. The R-2R resistance ladder6bis a modified R-2R resistance ladder6ato which a resistance Ran and a resistance Rb(n+1) are added on the side of the output voltage Vout. The resistance value of the resistance Ran is 2R. The resistance value of the resistances Rb(n+1) is R. Therefore, in the same way in the R-2R resistance ladder6a, a combined resistance value between the node Va and the output terminal of the R-2R resistance ladder6bis R.

In other words, it can be said that the DA converter300is a modified DA converter100in which one of the constant current sources in the segment type DA converter is moved into the R-2R resistance ladder DA converter.

Next, an operation of the DA converter300will be described. In the description below, as an example, a case in which the DA converter300is an 8-bit DA converter will be described. Hereinafter, the 8-bit DA converter300is referred to as a DA converter301. Here, among the 7 decode signals generated by decoding the upper 3 bits (m=3), 6 decode signals are inputted into the segment type DA converter13. The lower 5 bits (n=5) and one decode signal other than those inputted into the segment type DA converter13are inputted into the R-2R resistance ladder DA converter22.

In this case, the voltage at the node Va is determined by a current value obtained by adding an output current βI of the constant current cell unit3cto an output current (n+1)I of the constant current cell unit5b. Here, β is an integer from 0 to 6 (=2m−2). In this case, the voltage Va is represented by the following formula (4):
Va=Vref+{β−(n+1)}×I×2R(4)

The output voltage Vout outputted from the DA converter300is represented by the following formula (5). Here, α is the same as that in the formula (2):

Next, the current flow in the DA converter301will be described. The output current βI of the constant current sources Ia1to Ia(2m−2) of the constant current cell unit3cflows into the node Va. The output current βI varies in a range from 0 to 6I according to variation of data of the upper 3 bits. A current (n+1)I flows from the node Va to the constant current cell unit5b. Since n is 5, the current value of the output current (n+1)I is always 6I and constant.

When the output current βI is 6I, an equilibrium state is generated, and no current flows in the resistance Rc. When the output current βI is larger than 6I, a current having a current value (β-6)I flows from the node Va to the reference voltage Vref in the resistance Rc. On the other hand, when the output current βI is smaller than the output current 6I, a current having a current value (6−β)I flows from the reference voltage Vref to the node Va in the resistance Rc. Therefore, the maximum current that flows in the DA converter300is 6I.

Therefore, in the DA converter301, the maximum current consumption can be reduced to 6I. Thus, according to the present configuration, it is possible to further reduce the current consumption compared with the DA converter101according to the first embodiment.

FIG. 6is a graph showing an output voltage Vout of the DA converter301. InFIG. 6, the horizontal axis indicates 8-bit code and the vertical axis indicates the value of the output voltage Vout. The DA converter301outputs256steps (8 bits) of output voltages in a range shown by the following formula (6):
Vref≦Vout≦Vref−16IR(6)

In the DA converter300, a part of the constant current sources in the segment type DA converter is moved into the R-2R resistance ladder DA converter. At this time, the number of constant current sources that can be moved is not limited to one, but multiple constant current sources can be moved. However, in order to minimize the current consumption in the entire DA converter, it is desired that the number of the constant current sources included in the segment type DA converter is the same as the number of the constant current sources included in the R-2R resistance ladder DA converter. Specifically, when the number of the constant current sources moved from the segment type DA converter to the R-2R resistance ladder DA converter is p, p is desired to be an integer of 1 or more satisfying p=(2m−n−1)/2. In this case, among (2m−1) decode signals generated by decoding the upper m bits, (2m−1−p) decode signals are inputted into the segment type DA converter13. The lower n bits and p decode signals other than those inputted into the segment type DA converter13are inputted into the R-2R resistance ladder DA converter22.

Fourth Embodiment

Next, a DA converter according to a fourth embodiment will be described.FIG. 7is a circuit block diagram showing a configuration of a DA converter400according to the fourth embodiment. As shown inFIG. 7, the DA converter400includes a driver unit1b, a segment decoder unit2b, a constant current cell unit3d, an R-2R driver unit4, a constant current cell unit5c, an R-2R resistance ladder6a, a resistance Rc, and selectors8and9. In the present embodiment, to simplify the description, a case in which 8-bit digital signal is inputted into the DA converter400will be described. In this case, an 8-bit digital signal is divided into the upper 3 bits D[7 to 5] and the lower 5 bits D[4 to 0], and inputted into the DA converter400. However, the digital signal inputted into the DA converter400is not limited to an 8-bit signal. In the same way as in the first to the third embodiments, a digital signal of (m+n) bits can be inputted into the DA converter400. The R-2R driver unit4and the R-2R resistance ladder6aof the DA converter400are the same as those of the DA converter100according to the first embodiment, so the description is omitted.

The upper 3 bits D[7 to 5] is inputted into the driver unit1b. The driver unit1bdivides the inputted upper 3 bits D[7 to 5] into the most significant bit D[7] and the other upper bits D[6 and 5] and outputs them.

The most significant bit D[7] and the other upper bits D[6 and 5] are inputted into the segment decoder unit2bfrom the driver unit1b. The segment decoder unit2bdecodes the other upper bits D[6 and 5] according to the most significant bit D[7]. The signals decoded in the segment decoder unit2bare outputted to the selectors8and9as output signals.

The most significant bit D[7], the lower 5 bits [4 to 0], and the output signals of the segment decoder unit2bare inputted into the selector8. Further, an inverted signal of the lower 5 bits [4 to 0] is inputted into the selector8via the inverter INV1. The selector8outputs output signals Xa1to Xa5and Xb1to Xb5according to the most significant bit D[7].

The lower 5 bits [4 to 0] and the output signals of the segment decoder unit2bare inputted into the selector9. Further, an inverted signal of the lower 5 bits [4 to 0] is inputted into the selector9via the inverter INV1. Furthermore, an inverted signal of the most significant bit D[7] is inputted into the selector9via the inverter INV2. The selector9outputs output signals Ya1to Ya5and Yb1to Yb5according to the inverted signal of the most significant bit D[7] (in other words, according to the most significant bit D[7]).

The constant current cell unit3dincludes constant current sources Ia1to Ia5, switches Sa1to Sa5, and switches Sf1to Sf5. The constant current cell unit5cincludes constant current sources Ib1to Ib5, switches Sb1to Sb5, and switches Sg1to Sg5.

A constant current source Iah (h is an integer satisfying 1≦h≦5), a switch Sah, a switch Sbh, and a constant current source Ibh are coupled in series in this order between the power source voltage VDD and the ground voltage GND. The switch Sah and the switch Sbh are coupled to each other via a corresponding node Nh of the R-2R resistance ladder6a. The negative terminal of the constant current source Iah is coupled to the node Va via the switch Sfh. The positive terminal of the constant current source Ibh is coupled to the node Va via the switch Sgh.

An output signal Xah is inputted into the control terminal of the switch Sah. An output signal Xbh is inputted into the control terminal of the switch Sfh. An output signal Yah is inputted into the control terminal of the switch Sbh. An output signal Ybh is inputted into the control terminal of the switch Sgh.

Next, the operation of the DA converter400will be described. The operation of the DA converter400is controlled by the most significant bit D[7].FIG. 8is an operation table showing the operation of the DA converter400.

The operation of the segment decoder unit2bis controlled by the most significant bit D[7]. First, the operation when the most significant bit D[7] is “0” will be described. In this case, when the other upper bits D[6 and 5] are [00], the segment decoder unit2boutputs [00011]. When the other upper bits D[6 and 5] are [01], the segment decoder unit2boutputs [00111]. When the other upper bits D[6 and 5] are [10], the segment decoder unit2boutputs [01111]. When the other upper bits D[6 and 5] are [11], the segment decoder unit2boutputs [11111].

Next, the operation when the most significant bit D[7] is “1” will be described. In this case, when the other upper bits D[6 and 5] are [00], the segment decoder unit2boutputs [11111]. When the other upper bits D[6 and 5] are [01], the segment decoder unit2boutputs [01111]. When the other upper bits D[6 and 5] are [10], the segment decoder unit2boutputs [00111]. When the other upper bits D[6 and 5] are [11], the segment decoder unit2boutputs [00011].

In summary, signals corresponding to the other upper bits [6 and 5] outputted by the segment decoder unit2bare inverted when the most significant bit D[7] is inverted.

Next, the operation of the selector8will be described. The operation of the selector8is controlled by the most significant bit D[7]. When the most significant bit D[7] is “0”, the selector8outputs the output data of the segment decoder unit2bas the output signals Xb1to Xb5. The selector8also outputs the output signals Xa1to Xa5as signals to turn off the switches Sa1to Sa5. Thus, in this case, the number of the constant current sources that are turned on in the constant current cell unit3dis controlled by the output data of the segment decoder unit2b. Therefore, the constant current cell unit3dfunctions as a constant current cell unit of the segment type DA converter.

On the other hand, when the most significant bit D[7] is “1”, the selector8outputs the output data of the R-2R driver unit4as the output signals Xa1to Xa5. The selector8also outputs the inverted data of the output data of the R-2R driver unit4as the output signals Xb1to Xb5. Thus, in this case, the coupling relationship between the constant current cell unit3dand the R-2R resistance ladder6ais controlled by the output data of the R-2R driver unit4. Therefore, the constant current cell unit3dfunctions as a constant current cell unit of the R-2R resistance ladder DA converter.

Next, the operation of the selector9will be described. The inverted signal of the most significant bit D[7] is inputted into the selector9. Therefore, the selector9operates complementarily with the selector8. When the most significant bit D[7] is “1”, the selector9outputs the output data of the segment decoder unit2bas the output signals Yb1to Yb5. The selector9also outputs the output signals Ya1to Ya5as signals to turn off the switches Sb1to Sb5. Thus, in this case, the number of the constant current sources that are turned on in the constant current cell unit5cis controlled by the output data of the segment decoder unit2b. Therefore, the constant current cell unit5cfunctions as a constant current cell unit of the segment type DA converter.

On the other hand, when the most significant bit D[7] is “0”, the selector9outputs the output data of the R-2R driver unit4as the output signals Ya1to Ya5. The selector9also outputs the inverted data of the output data of the R-2R driver unit4as the output signals Yb1to Yb5. Thus, in this case, the coupling relationship between the constant current cell unit5cand the R-2R resistance ladder6ais controlled by the output data of the R-2R driver unit4. Therefore, the constant current cell unit5cfunctions as a constant current cell unit of the R-2R resistance ladder DA converter.

Therefore, in the DA converter400, when the most significant bit D[7] is “0”, the constant current cell unit3dfunctions as a constant current cell unit of the segment type DA converter, and the constant current cell unit5cfunctions as a constant current cell unit of the R-2R resistance ladder DA converter. On the other hand, when the most significant bit D[7] is “1”, the constant current cell unit3dfunctions as a constant current cell unit of the R-2R resistance ladder DA converter, and the constant current cell unit5cfunctions as a constant current cell unit of the segment type DA converter.

In this way, the DA converter400can replace the segment type DA converter with the R-2R resistance ladder DA converter and vice versa in their coupling relationships on the basis of the most significant bit.

In the DA converter400, when the most significant bit D[7] is “0”, as the other upper bits D[6 and 5] changes from [00] to [01] to [10] to [11], the number of the constant current sources that are turned on in the constant current cell unit3dchanges from 2 to 3 to 4 to 5. On the other hand, when the most significant bit D[7] is “1”, as the other upper bits D[6 and 5] changes from [00] to [01] to [10] to [11], the number of the constant current sources that are turned on in the constant current cell unit5cchanges from 5 to 4 to 3 to 2.

Thereby, when the most significant bit D[7] is “0”, the voltage Va at the node Va of the DA converter400is determined by a current value obtained by adding the output current βI of the constant current cell unit3dto the output current nI of the constant current cell unit5cand the R-2R resistance ladder6a. Here, the number of the upper bits is m, and the number of the lower bits is n. β is an integer from {n−(2m−1−1)} to n. The voltage Va at this time is represented by the following formula (7):
Va=Vref+(β−n)×I×2R(7)
Here, α is an integer from 0 to (2n−1).

In this case, the output voltage Vout outputted from the DA converter400is represented by the following formula (8):

When the most significant bit D[7] is “1”, the voltage Va at the node Va of the DA converter400is determined by a current value obtained by adding the output current βI of the constant current cell unit5cto the output current nI of the constant current cell unit3dand the R-2R resistance ladder6a. The voltage Va at this time is represented by the following formula (9):
Va=Vref+(n−β)×I×2R(9)

In this case, the output voltage Vout outputted from the DA converter400is represented by the following formula (10):

Since digital signals of the upper 3 bits and the lower 5 bits are inputted into the DA converter400, m is 3 and n is 5 in the above formula.FIG. 9is a graph showing an output voltage Vout of the DA converter400. InFIG. 9, the horizontal axis indicates 8-bit code and the vertical axis indicates the value of the output voltage Vout. The DA converter400outputs an 8-bit voltage in a range shown by the following formula (11):

Next, the current flow in the DA converter400will be described. When one of the constant current cell unit3dand the constant current cell unit5cfunctions as a segment type DA converter, as shown inFIG. 8, a current having a value of 2I to 5I flows in the constant current cell unit3dor the constant current cell unit5c. When one of the constant current cell unit3dand the constant current cell unit5cfunctions as an R-2R resistance ladder DA converter, a current having a value of 5I flows in the constant current cell unit3dor the constant current cell unit5c. Therefore, the maximum value of the current that flows in the constant current cell unit3dand the constant current cell unit5cof the DA converter400is 5I.

In further generalization, when one of the constant current cell unit3dand the constant current cell unit5cfunctions as a segment type DA converter, a current having a value from {n−(2m−1−1)}I to nI flows in the constant current cell unit3dor the constant current cell unit5c. When one of the constant current cell unit3dand the constant current cell unit5cfunctions as an R-2R resistance ladder DA converter, a current having a value of nI flows in the constant current cell unit3dor the constant current cell unit5c. Therefore, the maximum value of the current that flows in the constant current cell unit3dand the constant current cell unit5cis nI.

Therefore, in the DA converter400, the maximum current consumption can be reduced to nI. Thus, according to the present configuration, it is possible to further reduce the current consumption compared with the DA converters100,200, and300.

Here, the number of bits of a signal provided to a constant current cell unit that functions as the segment type DA converter is assumed to be N (N is an integer of 1 or more). The number of bits of a signal provided to a constant current cell unit that functions as the R-2R resistance ladder DA converter is assumed to be M (M is an integer of 1 or more). The number of bits of a digital signal provided to the DA converter400is assumed to be K (K=1+M+N). In this case, the number of constant current sources required for the constant current cell unit that functions as the segment type DA converter is 2N−1. The number of constant current sources required for the constant current cell unit that functions as the R-2R resistance ladder DA converter is M. In this case, it is required to satisfy M≧2N−1 for the DA converter400to function as a DA converter.

The present invention is not limited to the above-described embodiments, but may be appropriately modified without departing from the scope of the invention. For example, in the DA converter300according to the third embodiment, the constant current sources of the constant current cell unit3ccan be coupled to the terminal of the resistance Rc on the side of the reference voltage Vref. Thereby, in the same manner as the DA converter200according to the second embodiment, the DA converter300can generate an output voltage whose fluctuation amplitude is constant.

In the DA converter400according to the fourth embodiment, the constant current sources of one of the constant current cell unit3dand the constant current cell unit5c, which functions as the segment type DA converter, can be coupled to the terminal of the resistance Rc on the side of the reference voltage Vref. Thereby, in the same manner as the DA converter200according to the second embodiment, the DA converter400can generate an output voltage whose fluctuation amplitude is constant. Further, in the DA converter400according to the fourth embodiment, the replacement of the segment type DA converter with the R-2R resistance ladder DA converter and vice versa can be performed based on any bit other than the most significant bit.

The resistance value of the resistance Rc of the above embodiments is not limited to 2R. The resistance value of the resistance Rc may be two times the combined resistance value of the R-2R resistance ladder circuit. The resistance value of the resistance Ra1of the R-2R resistance ladder6aor the resistance Ra(n+1) of the R-2R resistance ladder6bmay be R. In this case, the combined resistance value of the R-2R resistance ladder is (⅔)R. Therefore, the resistance value of the resistance Rc may be ( 4/3)R.

The current value of the constant current sources included in a segment type DA converter is not limited to I, but may be a value different from the current value of the constant current sources included in an R-2R resistance ladder DA converter. For example, the current value of the constant current sources included in a segment type DA converter can be xI (x is an arbitrary positive value). In this case, the resistance value of the resistance Rc may be 1/x. In other words, it is only required that a value obtained by multiplying the current value of the constant current sources included in a segment type DA converter by the resistance value of the resistance Rc is a constant value. Thereby, the same function as that of the above described DA converters100,101,200,300, and400can be realized.

Although, in the above embodiments, the R-2R resistance ladder6aor6bis used, another resistance ladder can be used. For example, a resistance ladder can be used in which the resistance Ra1to Ran of the R-2R resistance ladder6aor the resistances Ra1to Ra(n+1) of the R-2R resistance ladder6bare replaced by resistances having a resistance value of R.