Dual clock spread for low clock emissions with recovery

A method and apparatus provides for the generation and recovery of a stable clock signal having harmonic emission suppressions using dual spread spectrum clock signals. The transmission frequencies of non-mixed, spread spectrum lower frequency clock signals may be varied and, upon receipt of these non-mixed signals, they are mixed into sum and difference signals. The sum signal thus generated is representative of the desired clock signal to be recovered. Such conditioning of the non-mixed signals need only occur within the receiver, thereby allow the channel that transmits the non-mixed lower frequency clock signals to the receiver to be lower bandwidth than would be required to carry the final, recovered, and higher frequency clock signal produced by the receiver.

BACKGROUND

The present invention relates to clock generation in general, and, in particular, to a method and apparatus for generating recovered clock signals with harmonic emission suppression.

Many electronic devices employ processors and/or other digital circuits that require clock signals for synchronization. Clock signals may be generated by a free-running oscillator driven by a crystal, an LC-tuned circuit, or an external clock source. Parameters of such clock signals may include maximum and minimum allowable clock frequencies, tolerances at high and low voltage levels, maximum rise and fall times on waveform edges, pulse-width tolerance for a non-square wave, and the timing relationship between clock phases if two-clock phase signals are needed.

High-speed electronic circuits are particularly susceptible to generating and radiating electromagnetic interference (EMI). Accordingly, many regulatory agencies, such as the Federal Communication Commission (FCC) and the Comite International Special Des Perturbations Radioelectriques (CISPR), have established maximum allowable EMI emission standards for electronic equipments, and promulgate guidelines concerning measurement equipment and techniques for determining EMI compliance.

The spectral components of the EMI emissions typically have peak amplitudes at harmonics of the fundamental frequency of a clock circuit. In order to comply with the above-mentioned governmental limits on EMI emissions, costly suppression measures or extensive shielding may need to be utilized. Other approaches for reducing EMI emissions include careful routing of signal traces on printed circuit boards to minimize loops and other potentially radiating structures. However, EMI emissions are made worse at higher clock speeds. Consequently, it would be desirable to provide an improved method and apparatus for generating high-speed clock signals having relatively low EMI emissions.

BRIEF SUMMARY

In accordance with embodiments consistent with the present invention, a method and apparatus provides for the generation and recovery of a stable clock signal having harmonic emission suppressions using a dual spread spectrum clock signals. The method comprises: generating first and second lower frequency dual clock signals from a high frequency clock signal, wherein said first and second lower frequency dual clock signals have respective frequencies that are less than a frequency of the high frequency clock signal; frequency modulating said first and second lower frequency dual clock signals to generate first and second modulated clock signals that sweep in opposing directions with respect to one another in a spectrum of operation; a receiver receiving said first and second modulated clock signals; the receiver generating a sum signal and a difference signal from said first and second modulated clock signals; the receiver filtering out the difference signal; and outputting the sum signal as a stable recovered clock signal of the receiver, said stable recovered clock signal having the frequency of the high frequency clock signal.

DETAILED DESCRIPTION

In accordance with embodiments consistent with the present invention, a method and apparatus provides for the generation and recovery of a stable clock signal having harmonic emission suppressions using dual spread spectrum clock signals. The transmission frequencies of non-mixed, spread spectrum lower frequency clock signals may be varied and, upon receipt of these non-mixed signals, they are mixed into sum and difference signals. The sum signal thus generated is representative of the desired clock signal to be recovered. Such conditioning of the non-mixed signals need only occur within the receiver, thereby allow the channel that transmits the non-mixed lower frequency clock signals to the receiver to be lower bandwidth than would be required to carry the final, recovered, and higher frequency clock signal produced by the receiver.

Referring now to the drawings, inFIG. 1, a flowchart100illustrates a method for generation and recovery of a stable clock signal using dual spread spectrum clock signals. First, first and second lower frequency dual clock signals, named Clock A and Clock B, are provided at Blocks130,150, which will be modulated as will be discussed; these first and second lower frequency dual clock signals at Blocks130,150have respective frequencies that are less than a frequency of the high frequency clock signal at Block115to be recovered by a receiver (shown inFIG. 2). As shown in the figure, the lower frequency clock signals at Blocks130,150can be simply supplied, as indicated by the flow from Block105to Block130and from Block110to Block150, or, optionally, they may be generated from a high frequency clock signal at Block115. In the later case, the high frequency clock signal115is divided by two divisors, such as by M in Block120and by N in Block125, to generate the first and second lower frequency dual clock signals at Blocks130,150, that are coherent with respect to one another, thereby making them easier to recover later by the receiver. These lower frequency clock signals, are presented to respective mixers at Blocks135,155, to generate modulated clock signals, named Modulated Clock A and Modulated Block B, respectively, at Blocks145,160as shown. Mixers at Blocks135,155frequency modulate (FM) Clock A and Clock B to cause them to sweep in the frequency spectrum of operation in opposite directions with respect to one another; i.e. while one signal is sweeping in an upward frequency direction, the other signal is sweeping in a downward frequency direction. The modulated clock signals Modulated Clock A, Modulated Clock B generated at Blocks145,160do not, therefore, combine since they are linear coherent signals.

Moreover, a spread modulation Clock C may be generated at Block140. The spread modulation Clock C may be a simple sinusoidal signal or a triangle wave that may be optimized depending on the portion of the spectrum to be addressed; for instance, it may be optimized at approximately 120 kHz or 1 MHz. Or, the signal can be optimized by the “Hershey Kiss” pattern known in the industry to have a benefit to reducing the rise in spectral amplitude near the edges of the spread signal. The modulation clock signal255may be as law as 20 kHz but often does not go lower due to the risk of producing audible effects in some circumstances.

Both the first and second modulated clock signals at Blocks145,160are sent to a receiver via a channel, as illustrated at Blocks165and170. AT Block175, the receiver mixes both first and second modulated clock signals to obtain a sum signal and a difference signal. AT Block180, the sum signal is given by f(A)+da+f(B)−db, since Clock B is inverted with respect to Clock A in this particular example. Or, in the event that Clock A and Clock B are not inverted, the sum may be given simply as f(A)+da+f(B). This sum signal generated at Block180is the stable recovered clock signal output by the receiver at Block195and has a frequency that matches that of the original high frequency clock signal at Block115. At Block185, the difference signal is given by f(A)−f(B) and 3da, since da=db. This difference signal may be filtered out by the receiver at Block190as shown.FIG. 3is a frequency/spectral diagram that illustrates the relationships between the clock, sum and difference signals.

Referring now toFIG. 2, Block diagram200illustrates an apparatus that provides for generation and recovery of a stable clock signal having harmonic emission suppressions using dual spread spectrum clock signals. High frequency clock205(it may also be referred to as a main clock) is provided to Blocks210and230. As previously discussed, the first and second lower frequency dual clock signals may be derived from the main high frequency clock205, such as by dividers, or indirectly; this is reflected in the functionality associated with Blocks210,230. These first and second lower frequency dual clock signals215,235have respective frequencies that are less than a frequency of the high frequency clock signal205.

At any rate, first and second lower frequency dual clock signals215and235are presented to modulators220and240, respectively, to generate first and second modulated clock signals225,245, respectively. Modulators220,240may be mixers that frequency modulate (FM) the signals in order to cause them to sweep the frequency spectrum of operation in opposing directions with respect to one another. First and second modulated clock signals225,245will not combine since they are linear, coherent signals derived from main frequency clock205in this manner. These signals225,245, may further be inverse with respect to each other, in indicated by inverter250. Also, modulators220and240work together to generate a spread modulation Clock C, shown as signal255. As previously mentioned, the spread modulation Clock C may be a simple sinusoidal signal or a triangle wave that may be optimized depending on the portion of the spectrum to be addressed; for instance, it may be optimized at approximately 120 kHz or 1 MHz. Or, the signal can be optimized by the “Hershey Kiss” pattern known in the industry to have a benefit to reducing the rise in spectral amplitude near the edges of the spread signal. The modulation clock signal255may be as law as 20 kHz but often does not go lower due to the risk of producing audible effects in some circumstances.

The first and second modulated clock signals225,245may be combined260into a single net or channel265for communication to the receiver270. Upon the combined signal260representative of the first and second modulated clock signals being received by the receiver270, the signal may be filtered to keep the mixed output290from coupling back onto the channel265; the filter275may be a low pass filter. The filtered first and second modulated signals are then mixed by mixer280to generate a sum signal and a difference signal from the first and second modulated clock signals. Mixer280need only be a simple non-linear device, such as a diode, to produce the sum and difference signals. The difference signal is then filtered out by filter285, which may be a bandpass or high-pass filter, leaving the recovered clock signal290that is output from the receiver.

It is noted that channel265need only have the bandwidth necessary to accommodate the two modulated clock signals225,245that are spread spectrum, i.e. separated in frequency. Channel265does not need to have the bandwidth that would be necessary to accommodate the final derived, recovered and stable clock290.