Distance measuring device

Provided is a distance measuring device which allows the measurement accuracy to be improved while the memory size is reduced. A distance measuring device includes a light emitting element which emits range-finding light as pulse light, a light receiving element which receives reflected range-finding light obtained as the range-finding light is reflected on a measurement object, an AD converter which converts the light reception signal output from the light receiving element from an analogue signal to a digital signal, multiple memories which have different memory sizes from each other and store sampled data output from the AD converter, and a rough distance calculator which calculates a distance on the basis of the sampled data stored in the multiple memories.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is based upon and claims benefit of priority from Japanese Patent Application No. 2019-031897, filed Feb. 25, 2019, the disclosure of which is incorporated herein by reference in its entirety.

TECHNICAL FIELD

The present invention relates to a distance measuring device which irradiates a measurement object with pulse light and measures the distance to the measurement object on the basis of time for the pulse light to make a round trip.

BACKGROUND

Japanese Patent Application Publication No. 2016-161411 discloses an electronic distance meter which has range-finding light emitted from a light emitting element as pulse light using a pulsed signal produced by pulsing a signal with a prescribed frequency, receives, by a light receiving element, reflected range-finding light as the reflection of the range-finding light which is emitted on the measurement object, and measures a distance to the measurement object on the basis of a light reception signal output from the light receiving element. The electronic distance meter disclosed in Japanese Patent Application Publication No. 2016-161411 measures a long distance on the basis of the round trip time of the pulse light (a time delay) (TOF: Time of Flight).

The distance measuring device based on the TOF (Time of Flight) principle such as the electronic distance meter disclosed in Japanese Patent Application Publication No. 2016-161411, for example, typically samples the waveform of pulse light reflected back by the measurement object by an AD converter and stores the sampled data output from the AD converter in a memory. The AD converter starts sampling simultaneously with the light emission by the light emitting element and ends sampling after a period of time equivalent or more than the maximum measurement distance set as a specification of the distance measuring device. Therefore, in order to store all the sampled data output from the AD converter in the memory, the memory size must be larger than the value obtained by dividing the maximum measurement distance by the sampling interval (in terms of distance). The sampling interval is a value obtained by converting the sampling rate (Hz) into a distance using the velocity (3×108m/s) of the range-finding light (the pulse light).

There has been a demand for improvement in the measurement accuracy (distance calculation accuracy) in the distance measuring device which measures the distance to a measurement object using a pulse signal. For example, the sampling interval may be reduced or the width of the pulse light (pulse width) may be reduced in order to improve the distance calculation accuracy. When the sampling interval is small, the shape of the waveform of returned pulse light reflected on a measurement object can be stored in more detail. As a result, the distance calculation accuracy may be improved. However, when the sampling interval is reduced, a larger memory size is required.

When the pulse width is reduced, the range of pulse fluctuations is reduced. Therefore, the distance calculation accuracy is improved. In recent years, it has become possible to generate pulse light with a pulse width for example of one nanosecond or less. However, as the pulse width is reduced, a greater memory size is necessary.

SUMMARY

The present invention is directed to a solution to the problem, and it is an object of the present invention to provide a distance measuring device which allows the measurement accuracy to be improved while the memory size is reduced.

According to the present invention, the object is achieved by a distance measuring device which irradiates a measurement object with range-finding light as pulse light and measures a distance to the measurement object on the basis of time required for the pulse light to make a round trip, and the device includes a light emitting element which emits the range-finding light as the pulse light, a light receiving element which receives reflected range-finding light obtained as the range-finding light is reflected on the measurement object and outputs a light reception signal corresponding to the reflected range-finding light, an AD converter which converts the light reception signal output from the light receiving element from an analog signal to a digital signal, multiple memories which have different memory sizes from one another and store sampled data output from the AD converter, and a distance calculator which calculates the distance on the basis of the sampled data stored in the multiple memories.

In the distance measuring device according to the present invention, the AD converter converts a light reception signal output from the light receiving element from an analogue signal to a digital signal and outputs sampled data and has the sampled data stored in the multiple memories. The multiple memories have different memory sizes from one another. The distance calculator calculates a distance on the basis of the sampled data stored in the multiple memories. Here, since the multiple memories have different memory sizes from one another and the sampled data is stored in the multiple memories, so that the distance calculator can calculate the distance to the measurement object on the basis of the address in the memory at which pulse data on the light reception signal is stored. Therefore, the memories do not have to have a memory size necessary for storing the sampled data for the maximum measurement distance. For example, the memory sizes of the memories may be smaller than the memory size necessary for storing the sampled data for the maximum measurement distance. More sampled data pieces may be stored in the multiple memories having a smaller memory size by reducing the sampling interval or the optical width (pulse width). In this way, the measurement accuracy can be improved while the memory size is reduced.

In the distance measuring device according to the invention, each of the multiple memories preferably has a memory size smaller than a memory size necessary for storing the sampled data for the maximum measurement distance.

In the distance measuring device according to the present invention, the memories each have a memory size smaller than a memory size necessary for storing the sampled data for the maximum measurement distance. More sampled data pieces may be stored in the multiple memories having a smaller memory size by reducing the sampling interval or the pulse width. In this way, the measurement accuracy can be improved more surely while the memory size is reduced. Since the memories each have a smaller size than a memory size necessary for storing the sampled data for the maximum measurement distance, the distance measuring device may operate with smaller power consumption and have its size and heat radiation reduced.

The distance measuring device according to the present invention further preferably includes a controller which executes such control that the multiple memories simultaneously store the same sampled data each sequentially from the first address to the last address, and then perform overwriting with the sampled data back from the first address, and during the overwriting, the sampled data already stored in the memory and the sampled data to be newly stored in the memory are added.

In the distance measuring device according to the present invention, even when the memories do not have a memory size necessary for storing the sampled data for the maximum measurement distance, the controller has the same sampled data simultaneously stored in the multiple memories each sequentially from the first address to the last address, and then performs overwriting with the sampled data back from the first address. During the overwriting, the controller performs such control that the sampled data already stored in the memory and the sampled data to be newly stored in the memory are added. Therefore, every time the first address of the first memory is again overwritten with sampled data, the sampled data to be newly stored at the addresses of the first memory is added up to the sampled data already stored at the addresses of the first memory. The distance calculator calculates the distance to the measurement object on the basis of the sampled data added up to the addresses in the memories until at least a time period corresponding to the maximum measurement distance elapses. Therefore, even when the memories do not have a memory size necessary for storing the sampled data for the maximum measurement distance, the distance calculator can calculate a longer distance to a measurement object with a higher accuracy on the basis of the address in the memory at which the pulse data on the light reception signal is stored. In this way, the measurement accuracy and the maximum measurement distance can be improved while the memory size is reduced.

In the distance measuring device according to the present invention, the controller preferably divides each of the multiple memories into blocks having a prescribed size, specifies the address at which pulse data on the light reception signal is stored on the basis of a combination of the blocks in the multiple memories in which the pulse data on the light reception signal is stored, and the distance calculator calculates the distance on the basis of the address at which the pulse data on the light reception signal is stored.

In the distance measuring device according to the present invention, the address in the memory at which the pulse data on the light reception signal is specified on the basis of a combination of blocks in the memories in which the pulse data on the light reception signal is stored. Therefore, even when the memories do not have a memory size necessary for storing the sampled data for the maximum measurement distance, the controller can specify the address in the memory at which the pulse data on the light reception signal is stored. The distance calculator calculates a distance on the basis of the address of the memory at which the pulse data on the light reception signal is stored. In this way, the measurement accuracy can be improved more reliably while the memory size is reduced.

In the distance measuring device according to the present invention, the controller preferably has the memory store a value obtained by subtracting a DC component from the sampled data output from the AD converter.

In the distance measuring device according to the present invention, a value obtained by subtracting a DC component from the sampled data output from the AD converter is stored in the memory. Therefore, when the controller performs such control that the sampled data already stored in the memory and the sampled data to be newly stored in the memory are added, the memory can be prevented from being saturated due to increase in the addition result. In this way, the measurement accuracy can be improved while the memory size is even more reduced.

According to the present invention, a distance measuring device which allows the memory size to be kept small and the measurement accuracy to be improved can be provided.

DETAILED DESCRIPTION

Hereinafter, a preferred embodiment of the present invention will be described in detail in conjunction with the accompanying drawings. Note that the following embodiment is a specific preferred example of the present invention and includes various technically preferable limitations, while the described features are not intended to limit the scope of the present invention unless otherwise specified in the following description. In the drawings, the same elements are designated by the same reference characters and their descriptions may not be repeated as appropriate.

FIG.1is a schematic view of a range-finding optical system in a distance measuring device according to an embodiment of the present invention. As shown inFIG.1, the range-finding optical system1includes an emitting optical system2, a light receiving optical system3, and a collimating optical system4. InFIG.1, a prism as a retroreflector is shown as a measurement object5for ease of illustration. However, the measurement object5is not limited to the prism. The range-finding optical system1shown inFIG.1is an exemplary range-finding optical system in the distance measuring device according to the embodiment. In other words, the range-finding optical system in the distance measuring device according to the embodiment is not limited to the range-finding optical system1shown inFIG.1.

The range-finding optical system1has a range-finding optical axis6directed to the measurement object5. The emitting optical system2has an emission optical axis7. The light receiving optical system3includes a light receiving optical axis8. The collimating optical system4has a collimation optical axis9. A light emitting element11, a condenser lens12, a half mirror13, and deflecting mirrors15and16are provided on the emission optical axis7. The range-finding light passing through the emission optical axis7is deflected by the deflecting mirrors15and16and matches the range-finding optical axis6. The light emitting element11such as a laser diode, a pulse laser diode, and a pulsed fiber laser emits range-finding light on the basis of a pulsed signal (pulse signal) as pulse light. The waveform of the pulse signal is not particularly limited, and the signal may have a rectangular waveform or a triangular waveform.

An objective lens17and a dichroic mirror18are provided on the range-finding optical axis6. The dichroic mirror18transmits visible light and reflects range-finding light. The part of the range-finding optical axis6transmitted through the dichroic mirror18corresponds to the collimation optical axis9. An eyepiece19is provided on the collimation optical axis9.

The objective lens17, the dichroic mirror18, the eyepiece19, and the like form the collimating optical system4. The condenser lens12, the half mirror13, the deflecting mirror15and16, the objective lens17, and the like form the emitting optical system2.

The part of the range-finding optical axis6reflected on the dichroic mirror18corresponds to the light receiving optical axis8. A light quantity regulator14and a light receiving element21are provided on the light receiving optical axis8. For example, a photodiode or an avalanche photodiode (APD) is used as the light receiving element21. The objective lens17, the dichroic mirror18, the light quantity regulator14, and the like form the light receiving optical system3.

The reflection optical axis of the half mirror13is guided, as an internal reference optical axis23, to the light receiving element21through a reflecting mirror22. The half mirror13and the reflecting mirror22form an internal reference optical system24. The light emitting element11and the light receiving element21are each electrically connected to the arithmetic processing unit27.

An optical path switching unit25is provided at the emission optical axis7and an internal reference optical axis23. The optical path switching unit25selectively shuts off or opens the emission optical axis7and the internal reference optical axis23. The optical path switching unit25switches between the state in which the range-finding light transmitted through the half mirror13is emitted toward the measurement object5and the state in which that the range-finding light reflected on the half mirror13is partly emitted toward the internal reference optical system24.

Now, the function of the range-finding optical system1will be described. Range-finding light28emitted from the light emitting element11as pulse light and formed into a parallel beam by the condenser lens12is transmitted through the center of the objective lens17and emitted upon the measurement object5.

The range-finding light reflected on the measurement object5enters the objective lens17as reflected range-finding light28′, is collected by the objective lens17, and reflected on the dichroic mirror18, and has its light quantity regulated by the light quantity regulator14, and then the light enters the light receiving element21. The light receiving element21outputs a light reception signal29corresponding to the received reflected range-finding light28′.

A part of the range-finding light28(internal reference light28″) emitted from the light emitting element11is reflected on the half mirror13. When the optical path switching unit25switches the optical path and the internal reference optical axis23is opened, the internal reference light28″ enters the light receiving element21through the internal reference optical system24. The light receiving element21outputs a light reception signal corresponding to the received internal reference light28″. Upon receiving the reflected range-finding light28′, the light receiving element21carries out the same processing as when the light receiving element21receives the internal reference light28″. Therefore, how the light reception signal corresponding to the reflected range-finding light28′ is processed will be described by way of illustration.

Visible light entering through the objective lens17is transmitted through the dichroic mirror18and collected by the eyepiece19. A surveyor can collimate the measurement object5by the visible light entering through the eyepiece19.

Now, the arithmetic processing unit27in the distance measuring device according to the embodiment will be described.FIG.2is a schematic diagram of the arithmetic processing unit in the distance measuring device according to the embodiment.FIG.3is a timing chart for illustrating a light emission signal and a light reception signal in the distance measuring device according to the embodiment. Note that the upper timing chart inFIG.3shows the generation timing for the pulse signal (the light emission signal) output from the driver33. In other words, the upper timing chart inFIG.3shows the emission timing for the light emission signal output from the light emitting element11. The lower timing chart inFIG.3shows the generation timing for the light reception signal output from the light receiving element21.

The arithmetic processing unit27according to the embodiment includes a field programmable gate array (FPGA)31, the driver33, an amplifier34, an AD converter35, an oscillator36, and a processing unit52. The processing unit52may be for example a central processing unit (CPU) or a digital signal processor (DSP).

The FPGA31includes a controller32, a register37, a first selector38, a first adder39, a first memory41, a first address counter42, a first pulse detector43, a second selector44, a second adder45, a second memory46, a second address counter47, a second pulse detector48, a precise distance calculator49, and a rough distance calculator51. Note that the FPGA31may be a known microcomputer. The rough distance calculator51according to the embodiment is an example of the “distance calculator” according to the present invention.

As shown inFIG.2, the FPGA31according to the embodiment has multiple memories. The number of memories is not limited to two and may be three or more. In the description of the embodiment, the FPGA31has two memories (a first memory41and a second memory46) for ease of illustration. The memory size of the first memory41is different from the memory size of the second memory46. In other words, the first memory41and the second memory46have different memory sizes from each other. The memory size of each of the first memory41and second memory46may be smaller than the memory size required to store sampled data for the maximum measurement distance set as a specification of the distance measuring device according to the embodiment.

The controller32outputs, to the driver33, a pulse signal having a prescribed frequency on the basis of a signal output from the AD converter35and the oscillator36. The oscillator36may be a temperature compensated crystal oscillator (TCXO). The driver33drives the light emitting element11on the basis of the pulse signal output from the controller32, so that the range-finding light28is emitted as pulse light at prescribed time intervals.

The light emitting element11emits the range-finding light28as pulse light at prescribed time intervals on the basis of the pulse signal (light emission signal) output from the driver33, as in the upper timing chart shown inFIG.3. The light emitting element11emits the range-finding light28at prescribed time intervals until at least a time period corresponding to the maximum measurement distance elapses and ends emitting of the range-finding light28after at least the time period corresponding to the maximum measurement distance elapses. For ease of illustration,FIG.3shows only the generation timing for the pulse signal output from the driver33for the first time after the start of the light emission.

The range-finding light28reflected on the measurement object5(i.e., the reflected range-finding light28′) enters the light receiving element21as pulse light. The light receiving element21outputs a light reception signal29corresponding to the received reflected range-finding light28′. Therefore, as in the lower timing chart inFIG.3, the light reception signal29from the light receiving element21is a pulse output. For ease of illustration,FIG.3shows only the generation timing for the light reception signal29output from the light receiving element21for the first time after the start of the light emission. As shown inFIG.3, a time delay td corresponding to the direct distance between the distance measuring device and the measurement object5is generated between the light reception signal and the light emission signal.

The light reception signal29output from the light receiving element21is amplified by the amplifier34. The signal amplified by the amplifier34is input to the AD converter35. The AD converter35converts the light reception signal output from the light receiving element21and amplified by the amplifier34from an analog signal into a digital signal and outputs the resultant signal as sampled data. The sampling by the AD converter35starts simultaneously with light emission by the light emitting element11and ends after at least a time period corresponding to the maximum measurement distance elapses.

The sampled data output from the AD converter is stored in the first memory41through the register37and the first adder39and in the second memory46through the register37and the second adder45. More specifically, the first memory41and the second memory46each store the sampled data output from the AD converter. At the time, the first memory41and the second memory46simultaneously store the same sampled data.

The register37functions for example as a latch circuit and holds prescribed information. The register37is a flip-flop which latches digital data as sampled data output from the AD converter, so that it is ensured that data entered at high speed can be captured. The controller32may control the register37and input the value obtained by subtracting the DC component from the sampled data output from the AD converter35to the first adder39and the second adder45. In this case, the value obtained by subtracting the DC component from the sampled data output from the AD converter35is stored in each of the first memory41and the second memory46.

The first adder39adds sampled data already stored in the first memory41and sampled data to be newly stored in the first memory41. Herein, the “sampled data to be newly stored” corresponds to the sampled data output from the AD converter. More specifically, when the sampled data is stored in the first memory41from the first address to the last address of the memory41, the first selector38outputs “0” in response to a control signal transmitted from the controller32. Meanwhile, when the sampled data is stored in the first memory41from the first address to the last address of the first memory41and overwriting is performed back to the first address, the first selector38outputs the sampled data already stored in the first memory41in response to a control signal transmitted from the controller32. Therefore, every time the first address of the first memory41is again overwritten with sampled data, the sampled data to be newly stored at the addresses of the first memory41is added to the sampled data already stored at the addresses of the first memory41.

Herein, the wording “stored for the first time” refers to storing for the first time in the step of measuring the distance to any arbitrary measurement object5and does not indicate that the storing occurs for the first time since the distance measuring device according to the embodiment starts to be used.

The second adder45adds sampled data already stored in the second memory46and sampled data to be newly stored in the second memory46. More specifically, when the sampled data is stored for the first time from the first address to the last address of the second memory46, the second selector44outputs “0” in response to a control signal transmitted from the controller32. Meanwhile, when the sampled data is stored from the first address to the last address of the second memory46and the first address is again overwritten, the second selector44outputs the sampled data already stored in the second memory46in response to a control signal transmitted from the controller32. Therefore, every time the second memory46is overwritten with sampled data again from the first address, the sampled data to be newly stored at the addresses of the second memory46is added up to the sampled data already stored at the addresses of the second memory46.

The first address counter42calculates the addresses of the first memory41in response to a control signal transmitted from the controller32and outputs the calculation result to the first memory41and the first pulse detector43. The second address counter47calculates the addresses of the second memory46in response to a control signal transmitted from the controller32and outputs the calculation result to the second memory46and the second pulse detector48.

The first pulse detector43detects pulse data on a light reception signal on the basis of sampled data stored in the first memory41and outputs the detected data to the precise distance calculator49and the rough distance calculator51. The second pulse detector48detects pulse data on the light reception signal on the basis of sampled data stored in the second memory46and outputs the detected data to the rough distance calculator51.

The rough distance calculator51calculates a rough distance to the measurement object5on the basis of the pulse data on the light reception signal output from the first pulse detector43and the second pulse detector48. More specifically, the rough distance calculator51calculates a rough distance to the measurement object5on the basis of the sampled data stored in the first memory41and the second memory46. Specifically, the rough distance calculator51calculates the distance between the distance measuring device and the measurement object5on the basis of the time delay td shown inFIG.3(TOF: Time of Flight). At the time, the rough distance calculator51subtracts the calculated rough distance calculated from the light reception signal of the internal reference light28″ from the rough distance calculated from the light reception signal of the reflected range-finding light28′. In this way, the rough distance calculator51can eliminate the influence of temperature drift or the like by the arithmetic processing unit27as an electrical circuit by determining the difference between the rough distance calculated from the reflected range-finding light28′ and the rough distance calculated from the internal reference light28″. The rough distance calculator51outputs a signal related to the calculation result of the rough distance to the processing unit52.

The precise distance calculator49calculates a precise distance not more than the sampling interval on the basis of pulse data on a light reception signal output from the first pulse detector43. For example, the precise distance calculator49calculates the precise distance using a Fourier transform. At the time, the precise distance calculator49subtracts a precise distance calculated from the light reception signal of the internal reference light28″ from a precise distance calculated from the light reception signal of the reflected range-finding light28′. As described above, the precise distance calculator49can eliminate the influence of temperature drift or the like by the arithmetic processing unit27as an electrical circuit by determining the difference between the precise distance calculated from the reflected range-finding light28′ and the precise distance calculated from the internal reference light28″. Then, the precise distance calculator49outputs a signal related to the calculation result of the precise distance to the processing unit52.

The processing unit52performs arithmetic processing for calculating a distance value from the distance measuring device to the measurement object5by adding the rough distance value output from the rough distance calculator51and the precise distance value output from the precise distance calculator49.

As described above, the AD converter35starts sampling simultaneously with the light emission by the light emitting element11and ends sampling when at least a time period corresponding to the maximum measurement distance elapses. Therefore, in a comparative example with only one memory for storing sampled data, the memory size must be larger than the value obtained by dividing the maximum measurement distance by the sampling interval (in terms of distance) in order to store all the sampled data output from the AD converter in the memory. The sampling interval is a value obtained by converting the sampling rate (Hz) into a distance using the velocity (3×108m/s) of range-finding light (pulse light). In the distance measuring device which measures the distance to a measurement object using a pulse signal, it is desirable to improve the measurement accuracy (the distance calculation accuracy) while a larger memory size is necessary to improve the distance calculation accuracy.

In contrast, the distance measuring device according to the embodiment includes multiple memories. The multiple memories have different memory sizes from one another. In the example of the arithmetic processing unit27shown inFIG.2, the FPGA31has the two memories (the first memory41and the second memory46). The first memory41and the second memory46have different memory sizes from each other. The rough distance calculator51then calculates a rough distance to the measurement object5on the basis of sampled data stored in the first memory41and the second memory46.

Since the first memory41and the second memory46have different memory sizes from each other and sampled data output from the AD converter35is stored in the first memory41and the second memory46, the rough distance calculator51can calculate the distance to the measurement object5on the basis of the addresses of the first memory41and the second memory46in which the pulse data on the light reception signal is stored. Therefore, neither of the first memory41and the second memory46has to have a memory size necessary for storing the sampled data for the maximum measurement distance. For example, the memory sizes of the first memory41and the second memory46may each be smaller than the memory size necessary for storing the sampled data for the maximum measurement distance. The sampling interval may be reduced and the width (pulse width) of the pulse light may be reduced, so that more sampled data can be stored in the first memory41and the second memory46having a smaller memory size. In this way, the measurement accuracy can be improved while the memory size is reduced.

Also, when the memory sizes of the first memory41and the second memory46are each smaller than the memory size required to store the sampled data for the maximum measurement distance, the measurement accuracy can be improved more surely while the memory size is reduced. When the memory sizes of the first memory41and the second memory46are each smaller than the memory size necessary for storing the sampled data for the maximum measurement distance, the distance measuring device can operate with smaller power consumption and have its size and heat radiation reduced.

Now, a first specific example in which the distance measuring device according to the embodiment calculates the distance to a measurement object will be described with reference to the drawings.FIG.4is a schematic diagram illustrating the memory sizes of memories according to the embodiment.FIG.5is a schematic diagram illustrating how the memories according to the embodiment are divided into blocks.FIG.6schematically illustrates a relation between a pulse data on a light reception signal and memory blocks.FIG.7is a schematic diagram illustrating a combination of memory blocks in which the pulse data on the light reception signal is stored.FIG.8is a schematic diagram illustrating another relation between pulse data on a light reception signal and memory blocks.FIGS.9and10are flow charts for illustrating a first specific example of how the distance measuring device according to the embodiment calculates the distance to a measurement object.

The upper timing chart shown in each ofFIGS.6and8corresponds to the upper timing chart shown inFIG.3. The timing chart shown in the middle of each ofFIGS.6and8corresponds to the lower timing chart shown inFIG.3. The lower timing chart shown in each ofFIGS.6and8schematically illustrates a combination of multiple block memories.

The first memory41and the second memory46having different memory sizes from each other as shown inFIG.4are prepared (step S11inFIG.9). As described above with respect toFIG.2, the number of memories is not limited to two and may be three or more. In the description of the specific example, the two memories (the first memory41and the second memory46) are provided for ease of illustration.

In the specific example, the number of addresses of the first memory41is 10240. The addresses of the first memory41are sequentially from 0 as the first address to 10239 as the last address. The number of addresses of the second memory46is 8192. The addresses of the second memory46are sequentially from 0 as the first address to 8191 as the last address. The difference between the number of addresses of the first memory41and the number of addresses of the second memory46is denoted by d (=2048) (step S11inFIG.9).

Note that when the quantization decomposition by the AD converter35is constant, the number of addresses of each memory is equivalent to the memory size of the memory. When the quantization decomposition by the AD converter35is constant, the address difference among the multiple memories is equivalent to the memory size difference among the multiple memories. Therefore, in the following description of the specific example, the number of addresses of each memory is considered equivalent to the memory size of the memory, and the address difference among the multiple memories is considered equivalent to the memory size difference among the multiple memories.

In the example, the number of addresses of each of the first memory41and the second memory46is an integral multiple of the address number difference d between the first memory41and the second memory46. In other words, the number of addresses (10240) of the first memory41is equal to five times the address number difference d (2048). The number of addresses of the second memory46(8192) is equal to four times the address number difference d (2048). Note that the number of addresses of the first memory41(10240) and the number of addresses of the second memory46(8192) do not have to be an integer multiple of the address number difference d (2048).

Subsequently, as shown inFIG.5, the first memory41and the second memory46are each divided into blocks on the basis of the address number difference d (step S12inFIG.9). In the specific example, the first memory41is divided into five blocks X0to X4because the number of addresses of the first memory41is five times the address number difference d. Further, since the number of addresses of the second memory46is four times the address number difference d, the second memory46is divided into four blocks Y0to Y3.

Note that the size of each block does not have to be equal to the address number difference d. The size of each block may also be different between the first memory41and the second memory46. In the following description of this specific example, the size of each block is equal to the address number difference d.

In the example, the number of addresses of each of the blocks X0to X4and Y0to Y3is equal to the address number difference d. When for example the sampling rate of the AD converter35is 500 MHz, the sampling interval (in terms of distance) is 300 mm. Therefore, the address number difference d (2048) in this example corresponds to a distance of 300×2048=614400 mm (614.4 m).

The addresses of the block X0are 0 to d−1 (0 to 2047). The addresses of the block X1are d to 2d−1 (2048 to 4095). The addresses of the block X2are 2d to 3d−1 (4096 to 6143). The addresses of the block X3are 3d to 4d−1 (6144 to 8191). The addresses of the block X4are 4d to 5d−1 (8192 to 10239).

In addition, the addresses of the block Y0are 0 to d−1 (0 to 2047). The addresses of the block Y1are d to 2d−1 (2048 to 4095). The addresses of the block Y2are 2d to 3d−1 (4096 to 6143). The addresses of the block Y3are 3d to 4d−1 (6144 to 8191).

Subsequently, simultaneously with light emission by the light emitting element11, the AD converter35starts to sample a light reception signal (step S13inFIG.9). The controller32stores the same sampled data output from the AD converter35simultaneously sequentially from the first address of the first memory41and the first address of the second memory46(step S14inFIG.9). More specifically, the controller32stores the sampled data output from the AD converter35sequentially from the first address (0) of the first memory41to the last address (10239) of the first memory41. The controller32stores the sampled data output from the AD converter35sequentially from the first address (0) of the second memory46to the last address (8191) of the second memory46.

Subsequently, when the sampled data is stored in the second memory46up to the last address (8191), the entire second memory46is used. Further, when the sampled data is stored in the first memory41up to the last address (10239), all of the first memory41will be used. Therefore, the controller32determines whether the sampled data output from the AD converter35has been stored sequentially up to the last address of the first memory41and the last address of the second memory46(step S15inFIG.9).

When the sampled data has not been stored up to the last address (8191) of the second memory46(NO in step S15inFIG.9), the controller32continues to store the sampled data output from the AD converter35sequentially from the first address (0) of the second memory46to the last address (8191) of the second memory46(step S14inFIG.9).

Meanwhile, when the sampled data has been stored in the second memory46up to the last address (8191) (YES in step S15inFIG.9), as shown inFIG.6, the controller32returns to the first address (0) of the second memory46and the first address (0) of the second memory46to the last address (8191) of the second memory46are sequentially overwritten with the sampled data output from the AD converter35(step S16inFIG.10). During the overwriting, the controller32adds the sampled data already stored in the second memory46and the sampled data to be newly stored in the second memory46and stores the addition result in the second memory46(step S16inFIG.10).

More specifically, when the sampled data is stored in the second memory46from the first address (0) of to the last address (8191) of the second memory46for the first time (storage in the “first round” shown inFIG.6), the second selector44outputs “0” in response to a control signal transmitted from the controller32. Meanwhile, when the sampled data is stored in the second memory46from the first address (0) to the last address (8191) of the second memory46, and the memory is overwritten back again from the first address (0) (in the “second round” and on inFIG.6), the second selector44outputs the sampled data already stored in the second memory46in response to a control signal transmitted from the controller32. Therefore, in the second round and on, every time overwriting with the sampled data is performed, the sampled data to be newly stored at the address in the second memory46is added to the sampled data already stored at the address in the second memory46.

During the overwriting, the controller32may input the sampled data output from the AD converter35removed of the DC component into the first adder39and the second adder45and store the value in each of the first memory41and the second memory46. In this case, the value obtained by subtracting the DC component from the sampled data output from the AD converter35is stored in each of the first memory41and the second memory46. In this way, even when the sampled data already stored in the second memory46and the sampled data newly stored in the second memory46are added and stored in the second memory46, the second memory46can be prevented from becoming saturated due to the increase in the addition result.

FIG.6illustrates how the controller32performs overwriting while adding the sampled data already stored in each of the first memory41and the second memory46and the sampled data to be newly stored in each of the first memory41and the second memory46. The control described above with respect to step S14(NO in step S15inFIG.10) following step S15inFIG.10and the control described above with respect to step S16inFIG.10are similarly performed with respect to the first memory41.

Subsequently, the controller32determines whether at least a time period corresponding to the maximum measurement distance has elapsed in (step S17inFIG.10) after the start of light emission by the light emitting element11. When at least the time period corresponding to the maximum measurement distance has not elapsed (NO in step S17inFIG.10), the controller32continues to perform the control described above with respect to step S16inFIG.10.

Meanwhile, when at least the time corresponding to the maximum measurement distance has elapsed (YES in step S17inFIG.10), the controller32stops the light emission by the light emitting element11and the sampling of the light reception signal by the AD converter35and determines the combination of blocks in the first memory41and the second memory46in which the pulse data on the light reception signal is stored (step S18inFIG.10).

In the example shown inFIG.6, the pulse data on the light reception signal is stored in the block X2of the first memory41in the third round and stored in the block Y0of the second memory46in the fourth round. Therefore, as shown inFIG.7, the combination of blocks in the first memory41and the second memory46in which the pulse data on the light reception signal is stored is “the block X2in the first memory41—the block Y0in the second memory46.” As shown inFIG.6, the combination of blocks in the first memory41and the second memory46is only one combination during at least the time period corresponding to the maximum measurement distance after the start of the light emission by the light emitting element11.

In the distance measuring device according to the embodiment, it is desirable that the memory size (or the address number) of the first memory41, the memory size (or the address number) of the second memory46, and the memory size difference (or the address number difference d) between the first memory41and the second memory46are adjusted as appropriate, so that only one combination of blocks in the first memory41and the second memory46is obtained until at least the time period corresponding to the maximum measurement distance elapses after the start of the light emission by the light emitting element11.

Subsequently, the controller32controls the first address counter42and calculates the address in the first memory41in which the pulse data on the light reception signal is stored on the basis of the combination of the block in the first memory41and the block in the second memory46in which the pulse data on the light reception signal is stored (step S19inFIG.10). For example, in the specific example, the first address of the block X2in the first memory41in the third round is (5×d)×(3−1)+(2×d)=5×2048×2+2×2048=24576. The controller32may control the second address counter47and calculate the address in the second memory46at which the pulse data on the light reception signal is stored. The first address of the block Y0in the second memory46in the fourth round is the same as the first address of the block X2in the first memory41in the third round.

In this way, the controller32can specify the address in the memory at which the pulse data on the light reception signal is stored by using a plurality of memories having smaller and different memory sizes. Then, the rough distance calculator51calculates the rough distance to the measurement object5on the basis of the address at which the pulse data on the light reception signal is stored (step S19inFIG.10). Stated differently, the rough distance calculator51calculates the rough distance to the measurement object5on the basis of the sampled data added up at the memory address until at least the time period corresponding to the maximum measurement distance elapses. For example, the rough distance calculator51calculates the rough distance to the measurement object5by calculating the product of the address in the memory at which the pulse data on the light reception signal is stored and the sampling interval (in terms of distance).

As shown inFIG.8, the controller32may divide the combination of blocks in the first memory41and blocks in the second memory46into patterns to calculate the address in the memory at which the pulse data on the light reception signal is stored (step S19inFIG.10).

More specifically, in the specific example inFIG.8, the blocks in the first memory41and the blocks in the second memory46are the same in the first pattern. When the pulse data on the light reception signal is in the first pattern, the controller32directly uses the address in the first memory41or the second memory46and calculates the address at which the pulse data on the light reception signal is stored.

In the second pattern, the combination includes the block X4in the first memory41and the block Y0of the second memory46. When the pulse data on the light reception signal is in the second pattern, the controller32uses the address in the first memory41and calculates the address at which the pulse data on the light reception signal is stored.

In the third pattern, the combination includes the blocks X0to X2in the first memory41and the blocks Y1to Y3in the second memory46. When the pulse data on the light reception signal is in the third pattern, the controller32uses the address obtained by adding the address in the first memory41and the memory size of the first memory41(the number of addresses is 10240 in this example) to calculate the address at which the pulse data on the light reception signal is stored.

In the fourth pattern, the combination includes the blocks X3to X4in the first memory41and the blocks Y0to Y1in the second memory46. When the pulse data on the light reception signal is in the fourth pattern, the controller32uses the address obtained by adding the address in the first memory41and the memory size of the first memory41(the number of addresses is 10240 in this example) to calculate the address at which the pulse data on the light reception signal is stored.

In the fifth pattern, the combination includes blocks X0to X1in the first memory41and blocks Y2to Y3in the second memory46. When the pulse data on the light reception signal is present in the fifth pattern, the controller32uses an address obtained by adding the address in the first memory41and two times the memory size of the first memory41(the number of addresses is 10240 in the example) and calculates the address at which the pulse data on the light reception signal is stored.

In the sixth pattern, the combination includes blocks X2to X4in the first memory41and blocks Y0to Y2in the second memory46. When the pulse data on the light reception signal is in the sixth pattern, the controller32uses an address obtained by adding the address in the first memory41and two times the memory size of the first memory41(according to the embodiment, the number of addresses: 10240) and calculates the address at which the pulse data on the light reception signal is stored.

The method for calculating the addresses shown inFIG.8also allows the controller32to specify the address in the memory at which the pulse data on the light reception signal is stored by using a plurality of memories having different smaller memory sizes. Then, the rough distance calculator51calculates a rough distance to the measurement object5on the basis of the address at which the pulse data on the light reception signal is stored (step S19inFIG.10).

Then, the precise distance calculator49calculates a precise distance equal to or less than the sampling interval using a Fourier transform (step S21inFIG.10).

Known calculation methods can be used in the calculation of precise distances using a Fourier transform. The precise distance calculator49may calculate the precise distance using a method other than a Fourier Transform.

Subsequently, the processing unit52calculates a distance value from the distance measuring device to the measurement object5by adding the rough distance value calculated by the rough distance calculator51and the precise distance value calculated by the precise distance calculator49(step S22inFIG.10).

In the specific example, the controller32stores the same sampled data simultaneously from the first address of the first memory41and the first address of the second memory46and returns to the first address to overwrite the first address with the sampled data when the sampled data is stored up to the last address of each of the first memory41and the second memory46. During the overwriting, the controller32executes such control that the sampled data already stored in each of the memories41and46and the sampled data to be newly stored in each of the memories41and46are added. Therefore, every time overwriting with the sampled data is performed back from the first address, the sampled data to be newly stored at the addresses of each of the memories41and46is added up to the sampled data already stored at the addresses of each of the memories41and46. The rough distance calculator51calculates a rough distance to the measurement object5on the basis of the sampled data added up at the addresses of each of the memories41and46until at least a time period corresponding to the maximum measurement distance has elapsed. Therefore, even when neither of the memories41and46has a memory size necessary for storing the sampled data for the maximum measurement distance, the rough distance calculator51can calculate a longer rough distance to the measurement object5with greater accuracy on the basis of the address in the memory at which the pulse data on the light reception signal is stored. This improves the measurement accuracy and the maximum measurement distance while the memory size is reduced.

The controller32also specifies the address in the memory at which the pulse data on the light reception signal is stored on the basis of a combination of blocks of the first memory41and the second memory46in which the pulse data on the light reception signal is stored. Therefore, when neither of memories41and46has the memory size necessary for storing the sampled data for the maximum measurement distance, the controller32may specify the address in the memory at which the pulse data on the light reception signal is stored. The rough distance calculator51then calculates the rough distance on the basis of the address in the memory at which the pulse data on the light reception signal is stored. This ensures that the measurement accuracy is improved while the memory size is reduced.

Also, when the value of the sampled data output from the AD converter35removed of the DC component is stored in each of the first memory41and the second memory46, the first memory41and the second memory46can be prevented from being saturated due to an increase in the addition result. Therefore, the measurement accuracy can be improved while the memory size is further reduced.

Note in the description of the example, only one piece of pulse data on a light reception signal is provided, however, multiple pieces of pulse data on a light reception signal may be present. For example, pulse data on a first light reception signal may be present with respect to a measurement object5(e.g., a tree) located at a relatively small distance to the distance measuring device, and pulse data on a second light reception signal may be present with respect to a measurement object5(e.g., a cliff) located at a relatively large distance from the distance measuring device. Even when pulse data on multiple light reception signals is present, the controller32may specify the addresses of the memory at which the pulse data on the multiple light reception signals is stored on the basis of a combination of blocks of the first memory41and the second memory46in which the pulse data on the multiple light reception signals is stored. This will be described in detail later.

Also in this specific example, when the pulse data on the light reception signal extends over adjacent blocks in the first memory41and adjacent blocks in the second memory46, the controller32may estimate an apparent address by using the pulse data before and after the blocks over which the pulse data on the light reception signal extends in each of the first memory41and the second memory46.

Now, second and third specific examples in which the distance measuring device according to the embodiment calculates the distance to a measurement object will be described with reference to the drawings. Note that when the components of the distance measuring device in the second and third specific examples are the same as those of the distance measuring device in the first specific example described above in conjunction withFIGS.4to10, their descriptions are omitted as appropriate, and the different features will be mainly described.

FIG.11is a schematic diagram illustrating a relation between pulse data on a light reception signal and memory blocks.FIG.12is a schematic diagram illustrating a combination of memory blocks in which the pulse data on the light reception signal is stored. The upper timing chart inFIG.11corresponds to the upper timing chart inFIG.3. The timing chart shown in the middle inFIG.11corresponds to the lower timing chart inFIG.3. The lower timing chart inFIG.11schematically illustrates a combination of multiple memory blocks.

In the following description of the second specific example, multiple light reception signals are present. Specifically, as shown inFIG.11, the case in which there are pulse data on a first light reception signal by a first measurement object and pulse data on a second light reception signal by a second measurement object will be described. A first time delay td1is generated between the first light reception signal and the light emission signal due to the direct distance between the distance measuring device and the first measurement object. In addition, a second time delay td2is generated between the second light reception signal and the light emission signal due to the distance between the distance measuring device and the second measurement object. The process of calculating the distance to the measurement object by the distance measuring device in this example is the same as the process in the flowchart shown inFIGS.9and10.

In the example shown inFIG.11, the pulse data on the first light reception signal is stored in the block X2of the first memory41in the second round and the block Y3of the second memory46in the second round. The pulse data on the second light reception signal is stored in the block X2of the first memory41in the third round and in the block Y0of the second memory46in the fourth round. Therefore, as shown inFIG.12, the combination of blocks of the first memory41and the second memory46in which the pulse data on the first light reception signal is stored is “the block X2of the first memory41—the block Y3of the second memory46.” The combination of blocks of the first memory41and the second memory46in which the pulse data on the second light reception signal is stored is “the block X2of the first memory41—the block Y0of the second memory46.”

In this way, even when pulse data on multiple light reception signals is stored in the same block in one of the first memory41and the second memory46(the first memory41in this example), the presence of the pulse data on the multiple light reception signals in one of the first memory41and the second memory46(the second memory46in this example) may be checked. The controller32controls the address counter (the second address counter47in this example) of the memory in which the presence of the pulse data on the plurality of light reception signals is determined (the second memory46in this example) or the memory having a greater number of pulse data pieces on the light reception signals (the second memory46in this example) and calculates multiple addresses in the memory (the second memory46in this example) in which the pulse data on the multiple light reception signals is stored.

In this example, even when pulse data on multiple light reception signals is stored in the same block of one of the first memory41and the second memory46, the controller32can use multiple memories having different and smaller memory sizes and can specify multiple addresses in the memory in which the pulse data on the multiple light reception signals are stored by referring to the memory (the memory having a greater number of pulse data pieces on the light reception signals) in which the presence of the pulse data on the multiple light reception signals is determined. The rough distance calculator51can then calculate rough distances to the first and second measurement objects on the basis of the multiple addresses in which the pulse data on the multiple light reception signals are stored.

FIGS.13and14are flowcharts for illustrating the third specific example in which the distance measuring device according to the embodiment calculates the distance to a measurement object. In the following description of the third specific example, the reflectance of the measurement object5is relatively low. More specifically, in this example, the SN ratio (signal-noise ratio) of the light reception signal29corresponding to the reflected range-finding light28′ is relatively low. For example, the measurement object5may have a relatively low reflectance when a long distance is measured without using a prism as a retroreflector or when the angle of incidence of the range-finding light28relative to the measurement object5is relatively small. Examples of long-distance measurement without using a prism as a retroreflector may include non-prism measurement (distance measurement without using a prism as a retroreflector) performed on a building as a measurement object5located about a few kilometers apart from the distance measuring device. The angle of incidence of the range-finding light28relative to the measurement object5may be relatively small for example when distance measurement is performed on a manhole lid as the measurement object5present about several tens of meters apart from the distance measuring device.

When the reflectance of the measurement object5is relatively low, the light reception signal29with a size (intensity) necessary for calculating the distance may not be obtained only by a single emission operation by the light emitting element11. In order to address such distance measurement, there is an approach for adding up sampled data until the waveform of a pulse signal appears on the memory by repeating the steps of “(1) emitting light by the light emitting element11, (2) sampling a light reception signal by the AD converter35, and (3) storing (adding up) the sampled data.” The purpose of the approach for adding up sampled data is both to make the waveform of the pulse signal appear when the SN ratio is so low that the light reception signal29is completely hidden in noise and to improve the SN ratio and the distance calculation accuracy when the light reception signal29having a size necessary for calculating the distance is not obtainable while the outer shape of the waveform of the pulse signal is available.

In the approach, it is unknown at which address on a memory the waveform of the pulse signal appears until the waveform of the pulse signal appears on the memory. Therefore, in the approach, the memory typically needs to have a memory size necessary for storing the entire sampled data for the maximum measurement distance.

In contrast, in the distance measuring device according to the embodiment, the rough distance calculator51can calculate a rough distance to the measurement object5on the basis of the address in the memory at which the pulse data on the light reception signal is stored, even when neither of the memories41and46has the memory size necessary for storing the sampled data for the maximum measurement distance.

Specifically, steps S31to S37shown inFIGS.13and14are identical to the control described above with respect to steps S11to S17inFIGS.9and10. In step S38following step S37, the controller32checks the sampled data stored in the first memory41or the second memory46(step S38inFIG.14). Subsequently, the controller32determines whether the size of the pulse data on the light reception signal based on the sampled data stored in the first memory41or the second memory46exceeds a prescribed value (step S39inFIG.14). At the time, the controller32checks the presence or absence of the pulse signal when the waveform of the pulse signal is made to appear as the SN ratio is so low that the light reception signal is completely hidden in noise (step S39inFIG.14).

When the pulse data on the light reception signal does not exceed the prescribed value (NO in step S39inFIG.14), the controller32starts sampling the light reception signal by the AD converter35simultaneously with light emission by the light emitting element11(step S33inFIG.13). Meanwhile, when the pulse data on the light reception signal exceeds the prescribed value (YES in step S39inFIG.14), the controller32stops the light emission by the light emitting element11and stops sampling the light reception signal by the AD converter35and determines a combination of blocks of the first memory41and the second memory46in which the pulse data on the light reception signal is stored (step S41inFIG.14). Steps S42to S44shown inFIG.14are the same as the control described above with respect to steps S19to S22inFIG.10.

In this example, when the size of the pulse data on the light reception signal based on the sampled data stored in the first memory41or the second memory46exceeds a prescribed value, the rough distance calculator51calculates a rough distance to the measurement object5on the basis of the address at which the pulse data on the light reception signal is stored. In this way, even when the SN ratio of the light reception signal is relatively low, the measurement accuracy and the maximum measurement distance can be improved while the memory size is reduced.

The embodiment of the present invention has been described. However, the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the claims. The features of the embodiment may be partly omitted or optionally combined to differ from the above.