Electronic component and method of fabricating the same

An electronic component includes: a substrate formed of ceramic and including one or more pads on an upper surface thereof; a component flip-chip mounted on the upper surface of the substrate with one or more bumps bonded to the one or more pads; and an additional film located on a lower surface of the substrate and overlapping with at least a part of a smaller one of the pad and the bump in each of one or more pad/bump pairs, the one or more pad/bump pairs being composed of the one or more pads and the one or more bumps bonded to each other.

CROSS-REFERENCE TO RELATED APPLICATION

This application is based upon and claims the benefit of priority of the prior Japanese Patent Application No. 2013-104570, filed on May 16, 2013, and the prior Japanese Patent Application No. 2013-164474, filed on Aug. 7, 2013, the entire contents of which are incorporated herein by reference.

FIELD

A certain aspect of the present invention relates to an electronic component and a method of fabricating the same.

BACKGROUND

Communication devices such as mobile phones employ an acoustic wave device such as a surface acoustic wave (SAW) device functioning as a filter or a duplexer, a chip component including an inductor and a capacitor, and an electronic component including semiconductor devices such as a power amplifier (PA) and a switch. To reduce the size and the height of the electronic component, a SAW device and a semiconductor device are sometimes flip-chip mounted on a substrate. Japanese Patent Application Publication No. 2003-60334 discloses an invention in which an LC filter and a chip component are mounted on a substrate. Japanese Patent Application Publication No. 2010-10165 discloses an electronic component module equipped with a sensor element and a semiconductor element and used to measure a pressure of a tire.

When a component such as a SAW device or a semiconductor device is flip-chip mounted, heat is applied for connecting bumps, and pressure is further applied to the component. Stress is also applied to the substrate due to the pressure, and the substrate may be damaged.

SUMMARY OF THE INVENTION

According to an aspect of the present invention, there is provided an electronic component including: a substrate formed of ceramic and including one or more pads on an upper surface thereof; a component flip-chip mounted on the upper surface of the substrate with one or more bumps bonded to the one or more pads; and an additional film located on a lower surface of the substrate and overlapping with at least a part of a smaller one of the pad and the bump in each of one or more pad/bump pairs composed of the one or more pads and the one or more bumps bonded to each other.

According to another aspect of the present invention, there is provided a method of fabricating an electronic component including: forming an additional film on a lower surface of a substrate formed of ceramic; and flip-chip mounting a component so that the additional film overlaps with at least a part of a smaller one of a pad and a bump in each of one or more pad/bump pairs by bonding one or more bumps to one or more pads located on an upper surface of the substrate after the forming of the additional film, the one or more pad/bump pairs being composed of the one or more pads and the one or more bumps bonded to each other.

DETAILED DESCRIPTION

A description will now be given of embodiments with reference to the drawings.

First Embodiment

FIG. 1Ais a cross-sectional view illustrating an electronic component100in accordance with a first embodiment, and illustrates a cross-section taken along line A-A inFIG. 1B.FIG. 1Bis a top view illustrating the electronic component100.FIG. 1Cis a bottom view illustrating the electronic component100.

As illustrated inFIG. 1AandFIG. 1B, the electronic component100includes a substrate10, a semiconductor device20, SAW devices22, and chip components30. Pads12are located on the upper surface of the substrate10, and pads14,16and18are located on the lower surface. On the upper surface of the substrate10, flip-chip mounted are the semiconductor device20and the SAW devices22, and also mounted are the chip components30. The semiconductor device20and the SAW devices22are electrically connected to the pads12by bumps24while the chip components30are electrically connected to the pads12by solder32. The bump24has a diameter R1 less than the width W1 of the pad12. As illustrated inFIG. 1AandFIG. 1C, the pad14are located below the semiconductor device20, and each of the pad16is located below the corresponding SAW device22. The pads18are located along the edge of the substrate10to surround the pads14and16. The pads18are electrically connected to the semiconductor device20, the SAW devices22, and the chip components30, and used for inputting and outputting signals between the electronic component100and an external substrate. The SAW device22is, for example, a SAW filter or a duplexer including a receive filter and a transmit filter. The semiconductor device20function as a power amplifier or a switch. The chip component30includes passive elements such as an inductor and a capacitor, and matches impedance between an unillustrated antenna and the semiconductor device20and the SAW devices22.

FIG. 2Ais a diagram illustrating the lower surface of the SAW device22. As illustrated inFIG. 2A, the bumps24are located on the lower surface of the SAW device22. A region surrounded by the bumps24of the SAW device22is referred to as a region23, and indicated by a dotted line inFIG. 2A.FIG. 2Bis an enlarged cross-sectional view of the SAW device22. As illustrated inFIG. 2B, the pad16has a width W2 equal to the width of the region23. The SAW device22has a width W3 greater than the width W2. Although the illustration is omitted, the bumps24are also located on the lower surface of the semiconductor device20. The pad14has a width equal to the width of the region surrounded by the bumps24in the semiconductor device20.

The substrate10is formed of an insulating material such as ceramic. The bump24is formed of solder composed mostly of, for example, tin silver (Sn—Ag). The pads12,14,16and18include, for example, copper (Cu), silver (Ag), tungsten (W), and molybdenum (Mo), and their surfaces are formed of gold (Au) having high wettability with solder.

FIG. 3Ais a cross-sectional view illustrating a method of fabricating the electronic component100. As illustrated inFIG. 3A, the semiconductor device20and the SAW devices22are sucked by tools25, and arranged on the substrate10. While the tools25brings downward pressure (pressure toward the substrate10) on the semiconductor device20and the SAW devices22as indicated by arrow B, heat is applied. Thermocompression melts solder, and the bumps24are bonded to the pads12.FIG. 3Bis an enlarged cross-sectional view of the SAW device22. As illustratedFIG. 3B, the SAW device22is arranged on the substrate10so that the whole of the region23overlaps with the pad16, and then flip-chip mounted.

In the first embodiment, the pads14and16reduce stress applied to the substrate10during flip-chip mounting. Therefore, the substrate10is prevented from being damaged. As illustrated inFIG. 2BandFIG. 3B, the pad16preferably has a width W2 equal to or greater than the width of the region23. The pad16overlaps with the whole of the region23, i.e. all the bumps24bonded to the SAW device22. This enables to effectively reduce the stress applied to the substrate10under the SAW devices22. As with the pad16, the pad14preferably has a width equal to or greater than the width of a region (not illustrated) surrounded by the bumps24in the semiconductor device20. The substrate10does not need to be thickened to be prevented from being damaged, and thus the height of the electronic component100can be reduced.

The pad14corresponding to the semiconductor device20is provided, and the pads16corresponding to the SAW devices22are provided. Thus, the stress applied to the substrate10when the components are flip-chip mounted is reduced, and the substrate10is prevented from being damaged. Moreover, suppressed is the warpage of the substrate10due to the difference in thermal expansion coefficient between the pads14and16and the substrate10. The suppression of the warpage of the substrate10improves the reliability of the connection between the bump24and the pad12. For example, as described in a second comparative example, the provision of a large pad overlapping with the SAW devices22increases the warpage of the substrate10. The warpage decreases the reliability of the connection between the bump24and the pad12.

The pads14and16may be used as a terminal for inputting and outputting a signal or a ground terminal, or may be a dummy pad that does not have an electrical function. Instead of the pads14and16, an insulating layer formed of a resin may be provided. That is to say, provision of an additional film made of a metal or an insulating material on the lower surface of the substrate10can prevent the substrate10from being damaged.

A description will now be given of comparative examples.FIG. 4Ais a cross-sectional view illustrating an electronic component100R in accordance with a first comparative example.FIG. 4Bis a bottom view illustrating the electronic component100R. As illustrated inFIG. 4AandFIG. 4B, the pads14and16are not located on the lower surface of the substrate10.FIG. 4Cis a cross-sectional view illustrating a method of fabricating the electronic component100R. The semiconductor device20and the SAW devices22are flip-chip mounted on the substrate10. As indicated by arrow B, downward pressure is applied from the tools25. The pads14and16are not located in the locations overlapping with the semiconductor device20and the SAW devices22. Therefore, the stress applied to the substrate10is greater than that in the first embodiment. As indicated by cross marks inFIG. 4C, the pressure causes cracks in the substrate10or breaks the substrate10, and thus the substrate10is damaged.

FIG. 5Ais a cross-sectional view illustrating an electronic component200R in accordance with a second comparative example.FIG. 5Bis a bottom view illustrating the electronic component200R. As illustrated inFIG. 5AandFIG. 5B, a single pad17is located on the lower surface of the substrate10. The pad17overlaps with the semiconductor device20and two SAW devices22locating adjacent to the semiconductor device20. A pad is not located on the lower surface of the substrate10in the locations overlapping with other two SAW devices22.FIG. 5Cis a cross-sectional view illustrating a method of fabricating the electronic component200R. As indicated by arrow B, downward pressure is applied from the tools25. The substrate10is hardly damaged in the part in which the pad17is located. However, the stress applied to the substrate10is high in the part in which the pad17is not located. Therefore, the substrate10is damaged as indicated by cross marks inFIG. 5C. In addition, the pad17is large, and therefore temperature change causes the warpage of the substrate10due to the difference in thermal expansion coefficient between the substrate10and the pad17. The warpage decreases the reliability of the connection between the bump24and the pad12.

FIG. 6Ais a cross-sectional view illustrating an electronic component300R in accordance with a third comparative example.FIG. 6Bis a bottom view illustrating the electronic component300R. As illustrated inFIG. 6AandFIG. 6B, two pads17are located on the lower surface of the substrate10. Each of the pads17overlaps with two SAW devices22. A pad is not located on the lower surface of the substrate10in the location overlapping with the semiconductor device20.FIG. 6Cis a cross-sectional view illustrating a method of fabricating the electronic component300R. As indicated by a cross mark inFIG. 6C, the substrate10under the semiconductor device20is damaged. In addition, the pad17is large, and thus the warpage of the substrate10is easily caused by temperature change. As the substrate10becomes thinner, the substrate10is more easily damaged in the first through third comparative examples. Furthermore, the effect of the warpage of the substrate10(due to the difference in thermal expansion coefficient between a component mounted on the upper surface and a pad formed on the lower surface) increases. Therefore, in the first through third comparative examples, it is difficult to thin the substrate10and thereby reduce the height of the electronic component. Especially, the substrate10formed of ceramic is fragile, and easily damaged.

A description will now be given of a simulation of the stress applied to the substrate10. Calculated is the stress applied to the substrate10when the pads12and the bumps24are not provided and the substrate10is placed into directly contact with the SAW device22. Stresses of five models are compared.

FIG. 7is a perspective view illustrating an overview of the simulation. As illustrated inFIG. 7, the substrate10is located on a base27. The SAW device22is located in the center of the upper surface of the substrate10, and pressed downward by the tool25. The tool25and the base27are made from steel, and the pressure force is 40 N. The pads18located on the lower surface of the substrate10are illustrated by a dotted line. The pad18has a size of 0.5×0.5×0.02 mm3. The substrate10is High Temperature Cofired Ceramics (HTCC) with a thickness of 30 μm.

The simulation uses five models. Table 1 presents the sizes of the SAW device22and the pad16used in the simulation, whether the SAW device22and the pad16overlap with each other, and calculation results of the maximum value of stress.

As presented in Table 1, the pad16is not provided in model A. In models B, C and E, the pad16with the same size as the SAW device22is provided. The pad16in model D is smaller than the SAW device22. With reference to cross-sectional views and bottom views, a description will now be given of a detailed structure and stress of each mode.

FIG. 8Ais a cross-sectional view illustrating model A.FIG. 8Bis a bottom view illustrating stress distribution in model A. Regions29indicated by hatching inFIG. 8Bare regions in which the stress is 5.0×107Pa or greater. As illustrated inFIG. 8A, the pad16is not located, and thus the pad16and the SAW device22do not overlap with each other as presented in Table 1. As illustrated inFIG. 8B, the regions29are formed in the center of the substrate10and near some of the pads18. As presented in Table 1, the maximum value of the stress is 4.1×108Pa.

FIG. 9Ais a cross-sectional view illustrating model B.FIG. 9Bis a bottom view illustrating stress distribution in model B. As illustrated inFIG. 9A, the pad16is located 0.32 mm aside from the SAW device22toward the left inFIG. 9A. Therefore, as presented in Table 1, the pad16does not overlap with the whole of the SAW device22but overlaps with a part thereof. At the right side of the pad16inFIG. 9B, the SAW device22does not overlap with the pad16and the stress is high. As presented in Table 1, the maximum value of the stress is 8.6×107Pa.

FIG. 10Ais a cross-sectional view illustrating model C.FIG. 10Bis a bottom view illustrating stress distribution in model C. As presented inFIG. 10Aand Table 1, the pad16does not overlap with the SAW device22. As illustrated inFIG. 10B, the region29is formed in the center of the substrate10. In addition, the regions29appear near some of the pads18. As presented in Table 1, the maximum value of the stress is 3.7×108Pa.

FIG. 11Ais a cross-sectional view illustrating model D.FIG. 11Bis a bottom view illustrating stress distribution in model D. As illustrated inFIG. 11A, the pad16is smaller than the SAW device22, and thus overlaps with a part of the SAW device22but does not overlap with the whole of the SAW device22as presented in Table 1. As illustrated inFIG. 11B, the region29including the pad16is formed. As presented in Table 1, the maximum value of the stress is 5.7×107Pa.

FIG. 12Ais a cross-sectional view illustrating model E.FIG. 12Bis a bottom view illustrating stress distribution in model E. As presented inFIG. 12Aand Table 1, the pad16overlaps with the whole of the SAW device22. As illustrated inFIG. 12B, the region29is not formed. As presented in Table 1, the maximum value of the stress is 2.8×107Pa.

The above-described simulation reveals that the stress can be reduced by providing the pad immediately below a part pressed by the tool25. When the bumps24are used for flip-chip mounting, the stress can be reduced by making the pad16overlap with the region23surrounded by the bumps24as described in the first embodiment.

Second Embodiment

A second embodiment described a case where the pads14and16are enlarged.FIG. 13Ais a cross-sectional view illustrating an electronic component200in accordance with a second embodiment.FIG. 13Bis an enlarged cross-sectional view of the SAW device22.

As illustrated inFIG. 13A, the widths of the pads14and16in the second embodiment are greater than those in the first embodiment. As illustrated inFIG. 13B, the pad16is wider than the region23, and has a width W3 equal to, for example, that of the SAW device22. The pad14has a width equal to, for example, that of the semiconductor device20. The bump24is formed of Au.

FIG. 14Ais a cross-sectional view illustrating a method of fabricating the electronic component200. As illustrated inFIG. 14A, ultrasonic waves are applied to the semiconductor device20and the SAW devices22with the tools25to vibrate them in the lateral direction as indicated by arrow C. While vibrating the semiconductor device20and the SAW devices22, downward pressure (pressure toward the substrate10) indicated by arrow B is applied and heat is also applied. This process bonds the bumps24to the pads12, both made of Au. The amount of displacement of the semiconductor device20and the SAW device22in the lateral direction by ultrasonic waves is, for example, a few micrometers.FIG. 14Bis an enlarged cross-sectional view of the SAW device22. A dashed line inFIG. 14Bindicates the SAW device22displaced to the left by the ultrasonic wave. The region surrounded by the bumps24of the SAW device22at this time is referred to as a region23a. A dotted line indicates the SAW device22displaced to the right by the ultrasonic wave. The region surrounded by the bumps24of the SAW device22at this time is referred to as a region23b. The width of the pad16is wide, and thus the pad16overlaps with the regions23aand23beven when the SAW device22is displaced. Therefore, the stress applied to the substrate10is reduced in flip-chip mounting using ultrasonic waves.

To reduce the stress, it is sufficient if the width of the pad16is greater than that of the region23, and the width of the pad14is greater than the width of the region surrounded by the bumps24of the semiconductor device20. However, as the pads14and16becomes larger, the warpage of the substrate10increases. To suppress the warpage, the width of the pad16is made to be equal to or less than that of the SAW device22and the width of the pad14is made to be equal to or less than that of the semiconductor device20, for example. The widths of the pads14and16may be changed depending on the thermal expansion coefficients of the substrate10and the pads14and16, and the width of the pad16may be made to be equal to or greater than that of the SAW device22and the width of the pad14may be equal to or greater than that of the semiconductor device20.

A description will now be given of a simulation. In the structure illustrated inFIG. 7, the SAW device22is pressed and vibrated in the lateral direction by ultrasonic waves. Two models having different sizes of the pad16are used. Table 2 presents the sizes of the SAW device22and the pad16used in the simulation, whether the SAW device22and the pad16overlap with each other, and calculation results of the maximum value of the stress.

As presented in Table 2, the pad16in model F has the same size as the SAW device22. The pad16in model G is 50 μm larger than the pad16in model F to the right and left sides, i.e. 100 μm larger in total.

FIG. 15Ais a cross-sectional view illustrating model F.FIG. 15Bis a bottom view illustrating stress distribution in model F, and illustrates a case where the SAW device22is displaced to the right. As withFIG. 8B, the region in which the stress is 5.0×107Pa or greater is referred to as the region29, and indicated by hatching inFIG. 15B. As illustrated inFIG. 15A, the pad16overlaps with the SAW device22. However, when the SAW device22vibrates, a part of the SAW device22is displaced from the pad16in the horizontal direction. Thus, as presented in Table 2, the pad16overlaps with a part of the SAW device22but does not overlap with the whole of it. As the SAW device22protrudes from the right edge of the pad16, the stress applied to the substrate10increases at the right side of the pad16. As a result, the region29is formed at the right side of the pad16as illustrated inFIG. 15B. As presented in Table 2, the maximum value of the stress is 5.2×107Pa.

FIG. 16Ais a cross-sectional view illustrating model G.FIG. 16Bis a bottom view illustrating stress distribution in model G, and illustrates a case in which the SAW device22is displaced to the right. The width of the pad16is wide, and thus the pad16overlaps with the SAW device22even when the SAW device22vibrates as presented in Table 2. Thus, the region29is not formed as illustrated inFIG. 16B. As presented in Table 2, the maximum value of the stress is 4.2×107Pa. The above-described simulation reveals that the stress can be reduced, even when the semiconductor device20and the SAW device22vibrate, by making the widths of the pads14and16wide. Although the illustration is omitted, the pads14and16may be made to be large in the direction vertical to the vibration direction, i.e. the depth direction. The stress in the depth direction can be reduced.

Third Embodiment

FIG. 17is an enlarged cross-sectional view of the SAW device22of an electronic component300in accordance with a third embodiment. Although the illustration is omitted, the electronic component300includes the semiconductor device20as with the electronic components100and200. As illustrated inFIG. 17, the pad12has a width W1 less than the diameter R1 of the bump24. Thus, a region23csurrounded by the pads12has a width W4 less than the width W2 of the region23surrounded by the bumps24. The pad16has a width W4 equal to, for example, that of the region23c. The overlap between the pad16and the region23cenables to reduce the stress. Although the illustration is omitted, it is sufficient if the pad14overlaps with the region surrounded by the pads12of the semiconductor device20. The bump24is formed of solder composed mostly of Sn—Ag, and flip-chip mounted without using ultrasonic waves.

Even when the bumps24are formed of solder as described in the first and third embodiments, the semiconductor device20and the SAW device22may be flip-chip mounted by vibrating them by ultrasonic waves as described in the second embodiment. The stress can be reduced by making the widths of the pads14and16wide. As described in the first through third embodiments, it is sufficient if the pads14and16overlap with a smaller one of the pad12and the bump24in all the pad12/bump24pairs. For example, when the SAW device22is bonded to the single pad12by the single bump24, it is sufficient if the pad16overlaps with a smaller one of the pad12and the bump24.

Fourth Embodiment

A fourth embodiment describes a case in which the pad16overlaps with at least a part of the pad12and the bump24.FIG. 18Ais a diagram illustrating the lower surface of the SAW device22of the fourth embodiment. A dotted line inFIG. 18Aindicates the pad16located on the lower surface of the substrate10.FIG. 18Bis a cross-sectional view illustrating the SAW device22. As illustrated inFIG. 18AandFIG. 18B, the pad16is smaller than the region23, and overlaps with a part of or the whole of the single bump24.

Even when the pad16overlaps with at least a part of the bump24, the stress can be reduced. Multiple locations in the substrate10were pressed, and the maximum stresses generated at the locations were measured.FIG. 19Ais a plan view illustrating the pressed locations in the experiment. P1˜P10 illustrated inFIG. 19Aare pressed with a force of 10 N. P1˜P4 do not overlap with the pad16. A part of each of P5˜P7 overlaps with the pad16. The whole of each of P8˜P10 overlaps with the pad16.

FIG. 19Bis a diagram presenting the maximum stress. The horizontal axis represents pressed locations, and the vertical axis represents the maximum stress. As illustrated inFIG. 19B, the maximum stresses at P1˜P4 are 1.4˜1.8×108Pa. As the pressed location is closer to the pad16, the stress decreases. The maximum stresses at P5˜P7 are 5.6˜6.6×108Pa, and less than the maximum stresses at P1˜P4. When a part of the pressed location overlaps with the pad16, the maximum stress decreases to a half of or more than a half of the maximum stress generated when the pressed location does not overlap with the pad16. The maximum stresses at P8˜P10 are 2.1˜2.9×108Pa, and are less than the maximum stresses at P5˜P7. When the whole of the pressed location overlaps with the pad16, the maximum stress decreases to tenth part of the maximum stress generated when the pressed location does not overlap with the pad16.

As revealed by the experiment, to reduce the stress, it is sufficient if at least a part of the bump24overlaps with the pad16as illustrated inFIG. 18AandFIG. 18B. To greatly reduce the stress, the whole of the bump24is to overlap with the pad16as illustrated inFIG. 2AandFIG. 2B. When the pad12has a width W1 less than the diameter R1 of the bump24as illustrated inFIG. 17, it is sufficient if at least a part of the pad12overlaps with the pad16. As described above, it is sufficient if the pad16overlaps with at least a smaller one of the pad12and the bump24in each of the pad12/bump24pairs, the pad12and the bump24of the pad12/bump24pair being bonded to each other. In the examples ofFIG. 2AandFIG. 18A, the single pad16overlaps with the bumps24. The pads16may be provided to correspond to the respective bumps24.

The component to be flip-chip mounted may be one. The component to be flip-chip mounted is not limited to the semiconductor device20or the SAW device22. For example, acoustic wave devices such as a boundary acoustic wave device and a Film Bulk Acoustic Resonator (FBAR) may be flip-chip mounted. The first through fourth embodiments can be applied to an electronic component including at least one component flip-chip mounted on the substrate10.