Device for differential-mode information transmission between at least two elements of a motor vehicle

This device in which the elements are linked by two information transmission lines (2, 3) and each of which includes information sending and reception circuits (4, 5), linked to a protocol handler (6), is characterized in that the reception circuit (5) of each element (1) comprise three comparators (7, 8, 9), a first comparator (7) receiving the signals transiting on the two lines (2, 3), a second comparator (8) receiving the signals transiting on a line (2) and a third comparator (9) receiving the signals transiting on the other line (3) and, interposed between the output of these comparators (7, 8, 9) and the information input (RC) of the handler (6), a circuit (10) for selective connection of the output (R0) of the first comparator (7) or of the output of a circuit for logically combining the outputs (R1, R2) of the second and third comparators (8, 9), to the input of the protocol handler (6), under the control of the latter as a function of the state of the signals present at its input, in order to permit operation of the device in normal differential mode and in degraded mode on the basis of information transiting on one of the lines.

BACKGROUND OF THE INVENTION 
1) Field of the Invention 
The present invention relates to a device for differential-mode information 
transmission between at least two elements of a motor vehicle, linked by 
two information transmission lines. 
2) Discussion of Related Art 
In these devices, each element comprises information sending means and 
information reception means, linked to a protocol handler. 
These differential-mode information transmission devices have been 
developed during the definition of transmission systems for motor 
vehicles, because of a certain number of problems linked to these 
applications and especially parasites which are capable of disturbing 
these transmissions. 
The use of differential transmission makes it possible to obtain a good 
immunity to these parasites but it exhibits a certain number of drawbacks 
in the matter of its reliability. 
In fact, the latter is linked to the reliability of the connections 
(microbreaks, oxidation of contacts, etc), to the possibilities for 
putting one of the transmission wires to the potential of the bodywork or 
to the battery plus, which has the effect of preventing correct operation 
of this type of transmission system. 
One response to this problem is already known from the document 
EP-A-0,318,354 in the names of AUTOMOBILES PEUGEOT, AUTOMOBILES CITROEN 
and REGIE NATIONALE DES USINES RENAULT. In this document, capacitive 
coupling of the transmission in Polling mode between the various elements 
of the vehicle is used. 
Hence it is possible to make the device described in this document operate 
according to a normal, differential, or degraded, mode on the basis of the 
information transiting on one of the information transmission lines. 
However, this device is limited to certain applications and is not 
applicable, for example, to a multi-master information transmission 
network. 
In fact, in a network of this type, all the elements linked to the network 
can access the transmission lines in order to impose their message on 
the-latter and it is therefore important to ensure good diffusion of the 
message and good coherence thereof for all the elements. 
The solution proposed in the preceding document cannot resolve the 
different problems linked to the different defect modes in this type of 
network. 
SUMMARY OF THE INVENTION 
The object of the invention is thus to resolve these problems by proposing 
an information transmission device which is simple, reliable and makes it 
possible to ensure adequate information transmission even when one of the 
transmission lines is disturbed and which is applicable, in particular, to 
a multi-master network. 
To this end, the subject of the invention is a device for differential-mode 
information transmission between at least two elements of a motor vehicle, 
linked by two information transmission lines each of which comprises 
information sending means and information reception means, linked to a 
protocol handler, characterised in that the reception means of each 
element comprise three comparators, a first receiving as input the signals 
transiting on the two information transmission lines, a second receiving 
as input the signals transiting on an information transmission line and a 
third receiving as input the signals transiting on the other information 
transmission line and, interposed between the output of these comparators 
and the information input of the protocol handler, means of selective 
connection of the output of the first comparator or of the output of means 
for logically combining the outputs of the second and third comparators, 
to the information input of the protocol handler, under the control of the 
latter as a function of the state of the signals present at its 
information input, in order to permit operation of the device in normal 
differential mode and in degraded mode on the basis of information 
transiting on one of the transmission lines. 
According to one embodiment, the selective connection means comprise a 
multiplexer whose output is linked to the information input of the 
protocol handler, whose inputs receive the output of the first comparator 
and the output of the means for logically combining the outputs of the 
second and third comparators and driven by a control output of the 
protocol handler.

DESCRIPTION OF THE PREFERRED EMBODIMENTS 
As can be seen in these figures, a differential-mode information 
transmission device, according to the invention, makes it possible to 
transmit information between at least two elements of a motor vehicle 
linked by two information transmission lines. For reasons of clarity, only 
one element is represented in FIG. 1 and is designated by the general 
reference 1. The other element or elements of the device exhibit a similar 
structure. The differential-mode information transmission lines are 
designated by the references 2 and 3. 
Each element comprises information sending means 4 and information 
reception means 5 linked to a protocol handler designated by the general 
reference 6 in these figures and well known in the state of the art. 
According to the invention, the information reception means of each element 
comprise three comparators 7, 8 and 9 which receive as inputs the signals 
transiting on the information transmission lines 2 and 3 through filter 
22, and are biased by bias amplifier 23. 
A first comparator, designated by the reference 7, receives as input the 
signals transiting on the two information transmission lines 2 and 3. 
A second comparator, designated by the reference 8, receives as input the 
signals D transiting on an information transmission line and, more 
particularly, on line 2. A third comparator designated by the reference 9, 
received as input the signals D transiting on the other information 
transmission line, that is to say on line 3. 
The outputs of these comparators 7, 8 and 9 are referenced R0, R1 and R2, 
respectively. 
Moreover, these information reception means 5 also comprise, interposed 
between the output of these comparators and the information input RC of 
the protocol handler 6, means 10 for selective connection of the output R0 
of the first comparator 7 or of the output of means for logically 
combining the outputs R1 and R2 of the second and third comparators 8 and 
9, to the information input RC of the protocol handler 6. 
This selective connection of one or the other of these outputs to the 
information input of the protocol handler 6, is controlled by the latter 
as a function of the state of the signals present at its information 
input, in order to permit operation of the device in normal differential 
mode and in degraded mode on the basis of information transiting on one of 
the information transmission lines 2 and 3, as will be described in more 
detail below. 
This control results from the detection, by the protocol handler 6, of 
defects in the signals present at its information input, these defects 
possibly resulting either from the absence of coherent transmission during 
a predetermined time, for example 150 ms, or from a blocking of the 
information item in a dominant state. 
As can be seen in FIG. 2, the selective connection means 6 in fact comprise 
a multiplexer 11 whose output is linked to the information input RC of the 
protocol handler 6 and whose inputs receive the output R0 of the first 
comparator 7 and the output of means 12 for logically combining the 
outputs R1 and R2 of the second and third comparators 8 and 9, this 
multiplexer 11 being driven by a control output of the protocol handler 6. 
More particularly, the multiplexer 11 comprises a first and a second AND 
gate designated by the references 13 and 14, respectively. One input of 
the first AND gate 13 is linked to the Q output of a D flip-flop 15 while 
the other input of this first AND gate 13 is linked to the output R0 of 
the first comparator 7. 
One input of the second AND gate 14 is linked to the Q inverted output of 
the D flip-flop 15 while the other input of this second AND gate 14 is 
linked to the output of the logic combination means 12. 
Moreover, the clock input of the flip-flop 15 is linked to the control 
output of the protocol handler 6 and the outputs of the first and second 
AND gates 13 and 14 are linked to the inputs of a first OR gate 16 whose 
output is linked to the information input RC of the protocol handler 6. 
The means of combining 12 the outputs of the second and third comparators 8 
and 9 produce logic AND and OR combinations of these outputs R1 and R2. 
As can be seen in this FIG. 2, the combination means 12 comprises a third 
AND gate 17 whose output is linked to the corresponding input of the 
second AND gate 14 of the multiplexer 11 and whose inputs are linked to 
the outputs of second and third OR gates 18 and 19. One input of the 
second OR gate 18 is linked to the output R1 of the second comparator 8, 
while the other input of this second OR gate 18 is linked to the Q output 
of a first RS flip-flop 20, whose R input is also linked to the output R1 
of the second comparator 8. 
Moreover, one input of the third OR gate 19 is linked to the output R2 of 
the third comparator 9 while the other input of this third OR gate 19 is 
linked to the Q output of a second RS flip-flop 21, whose R input is 
linked to the output R2 of the third comparator 9. 
The S inputs of the first and second RS flip-flops 20 and 21 are linked to 
the control output of the protocol handler 6. 
Hence, the gates 13, 14 and 16 form a multiplexer 11 making it possible to 
obtain, at the output of the gate 16 either the output R0 of the first 
comparator 7 or the result of the combination of the outputs R1 and R2 of 
the second and third comparators 8 and 9. 
This multiplexer 11 is controlled by the flip-flop 15 mounted as a 
divide-by-two circuit, its Q output being linked to its D input and driven 
by the protocol handler 6. 
On each pulse of the control signal from the protocol handler 6, the Q and 
Q outputs of this flip-flop 15 change value, thus connecting either the 
signal R0 or a logic combination of the signals R1 and R2 to the 
information input of the protocol handler 6. 
The set of gates and of RS flip-flops forming part of the combination means 
12 make it possible to produce a logic AND between the signals R1 and R2 
or to select the signal R1 or the signal R2. 
On each pulse of the control signal, the flip-flops 20 and 21 are 
initialised, thus holding the OR gates 18 and 19 in the 1 state. 
If the signal R1 is held at 0 (dominant), this signal cannot pass through 
the flip-flop 20. 
In the event that the signal transiting on the other line, that is to say 
the signal R2, is correct, a level 1 of this signal R2 unblocks the 
corresponding flip-flop 21 and the gate 19, such that this signal can pass 
through the gate 17 towards the rest of the circuit and thus the protocol 
handler 6. 
The choice of the signal used depends on the state of the signals on the 
transmission lines 2 and 3, that is to say D and D. 
The table below summarises the various possible defect cases: 
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violent parasites R0 
ground offset R0 
break in a .sup.-- D (.sup.-- D.sup.-- A.sup.-- T.sup.-- A) 
R1, R1 and R2 
break in a D (DATA) wire 
R2, R1 and R2 
putting D to the plus R2, R1 and R2 
putting .sup.-- D to the plus 
R1, R1 and R2 
grounding of D R2 
grounding of .sup.-- D 
R1 
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Hence, by using the R0, R1 and R2 signals, it is possible to treat six 
defect cases out of eight and the two latter cases are treated by using 
the signal R1 or the signal R2. 
The choice of the output signal thus follows the logic: 
1) Choice between R0 and (R1 and R2) 
2) In the event that (R1 and R2) has been chosen, and that operation is 
still not provided, a choice is made between R1 or R2, which permits the 
device still to operate, at least in degraded mode.