Endoscope apparatus

An endoscope apparatus has a transmission device of an endoscope and a reception device of a processor. The transmission device calculates a DC balance value of input data, compares the DC balance value and a cumulative value thereof, and compares the sign of the DC balance value and the sign of the cumulative value. When the signs are the same sign, the transmission device generates intermediate data by exchanging a first value and a second value with each other for all the bits of the input data, and generates predetermined information indicating that all the bits have been inverted. When the signs are different signs, the transmission device performs a process of setting the input data as the intermediate data and transmits the intermediate data by a serial signal.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to an endoscope apparatus, and in particular to an endoscope apparatus using a communication device capable of performing communication for which DC balance is ensured.

2. Description of the Related Art

Conventionally, an endoscope apparatus has been widely used in a medical field and an industrial field. The endoscope apparatus makes it possible to perform observation, image recording and the like of an endoscopy object site by inserting an endoscope insertion portion of the endoscope apparatus into a body cavity of a patient or an inside of an endoscopy object.

The endoscope apparatus is configured such that it includes the endoscope insertion portion, a processor and a monitor. Image data of an object obtained by picking up an image by an image pickup device provided at a distal end portion of the endoscope insertion portion is transmitted from the endoscope insertion portion to the processor. The processor performs image processing of received image data, generates an endoscopic image and displays the endoscopic image on the monitor. Therefore, an endoscope has an image data transmission device, and the processor has an image data reception device.

In the endoscope apparatus, a signal transmitted from the endoscope is transmitted to the processor via an insulating circuit from the viewpoint of electrical safety. However, since a DC component of the transmitted signal is blocked, it is necessary to ensure DC balance.

For example, as disclosed in Japanese Patent Application Laid-Open Publication No. 2009-111497, code conversion methods, such as the so-called Manchester encoding method and 8B 10B, have been conventionally used as a method for ensuring DC balance.

SUMMARY OF THE INVENTION

An endoscope apparatus of an aspect of the present invention is an endoscope apparatus provided with an endoscope including an image pickup device and a transmission device, and a processor including a reception device communicating with the transmission device. The transmission device of the endoscope is provided with: a first subtraction section calculating a first subtraction value obtained by subtracting a number of bits having a second value from a number of bits having a first value in input data constituted by a collection of a predetermined number of bits each of which has the first or the second value; a first data processing section performing a first predetermined process for the input data to generate intermediate data constituted by the predetermined number of bits; a second subtraction section calculating a second subtraction value obtained by subtracting the number of bits having the second value from the number of bits having the first value in the intermediate data; a first accumulation section calculating a cumulative value of the second subtraction value; and a transmission section transmitting the intermediate data by a serial signal; wherein the first predetermined process is a process of: comparing a sign of the first subtraction value of the input data and a sign of the cumulative value of the first accumulation section; generating the intermediate data by exchanging the first value and the second value with each other for all the bits of the input data and generating predetermined information indicating inversion of all the bits when the sign of the first subtraction value and the sign of the cumulative value are the same sign; and setting the input data as the intermediate data when the sign of the first subtraction value and the sign of the cumulative value are different signs. The reception device of the processor is provided with: a serial reception section receiving the serial signal and outputting the serial signal as received data for each predetermined number of bits; a second data processing section generating, for the received data, output data by exchanging the first value and the second value with each other for all the bits of the received data when the predetermined information is generated, and generating the received data which is received as the output data when the predetermined information is not generated; a third subtraction section calculating a third subtraction value obtained by subtracting the number of bits having the second value from the number of bits having the first value in the received data; a second accumulation section calculating a cumulative value of the third subtraction value; and an abnormality detection section comparing a sign of the third subtraction value of the received data and a sign of the cumulative value of the second accumulation section, and, when the sign of the third subtraction value and the sign of the cumulative value of the second accumulation section are the same sign, generating predetermined error information.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

First Embodiment

FIG. 1is a configuration diagram showing a configuration of an endoscope apparatus according to the present embodiment. An endoscope apparatus1is configured such that it includes an endoscope11, a processor12, and a cable13connecting both of them. The endoscope11includes an elongated insertion portion14and an operation section15, and an image pickup device14a, such as a CCD, is provided at the distal end portion of the insertion portion14. The operation section15is provided with an analog-digital converter (hereinafter referred to as an ADC)16and a transmission device17. The processor12is provided with an insulating portion (PT)18, a reception device19and an image processing section20. The insulating portion18is a pulse transformer (PT). Thus, the endoscope apparatus1is configured such that it includes the endoscope11having the transmission device17and the processor12having the reception device19. A communication device is configured with the transmission device17and the reception device19which communicates with the transmission device17.

An image signal, which is a video signal from the image pickup device14a, is converted to a digital signal at the ADC16and provided to the transmission device17as input data. The transmission device17and the insulating portion18are connected via multiple signal lines13ain the cable13. The signal outputted from the transmission device17is provided to the reception device19via the signal lines13ahaving the insulating portion18. The reception device19extracts image data from the received signal and provides the image data to the image processing section20. A monitor not shown is connected to the processor12, and an endoscopic image based on an image signal from the image processing section20is displayed on the monitor.

Note that only components involved in transmission and reception are shown inFIG. 1, and other components for operation signals from the operation section15, control signals from a light source apparatus (not shown) and the like are omitted.

Next, configurations of the transmission device17of the endoscope11and the reception device19of the processor12will be described with the use ofFIGS. 2 and 3.FIG. 2is a block diagram showing the configuration of the transmission device17. The transmission device17includes a control section17awhich includes a central processing unit (hereinafter referred to as a CPU), and the functions of the transmission device17are realized by processing by a software program executed by the control section17a. The transmission device17inputs input data and transmits intermediate data by a serial signal.FIG. 3is a block diagram showing the configuration of the reception device19. The reception device19includes a control section19awhich includes a CPU, and the functions of the reception device19are realized by processing by a software program executed by the control section19a. The reception device19obtains output data which is the same as the input data inputted to the transmission device17, from the received serial signal. Note that the CPUs of the respective control sections17aand19aof the transmission device17and the reception device19may be realized, for example, by field programmable gate arrays (hereinafter referred to as FPGAs).

Next, the content of a process by the control section17aof the transmission device17will be described.

FIG. 4is a flowchart showing an example of the content of the process by the control section17aof the transmission device17.

Parallel input data from the ADC16is stored into a register not shown. The input data is, for example, 16-bit image data. Here, image data of an endoscopic image is transmitted as transmitted data in units of 16 bits. The control section17areads the input data from the register (S1) and calculates DC balance (S2).

In the DC balance calculation, a DC balance value is determined by subtracting the number of bits having “1” as a second value from the number of bits having “0” as a first value in input data of a predetermined number of bits, for example, 16 bits. For example, if the number of bits having the value of “0” is 6, and the number of bits having the value of “1” is 10, then the DC balance value is “−4”. The sign of the DC balance value “−4” is “−” (minus). For example, if the number of bits having the value of “0” is 11, and the number of bits having the value of “1” is 5, then the DC balance value is “6”, and the sign of the DC balance “6” is “+” (plus).

The process of S2constitutes a subtraction section for calculating a subtraction value obtained by subtracting the number of bits having a second value from the number of bits having a first value in input data constituted by a collection of a predetermined number of bits each of which has the first or the second value.

The control section17acompares the sign of the DC balance value of the input data and the sign of a cumulative value of the cumulative DC balance value in the past and judges whether the sign of the DC balance value of the input data is the same as the sign of the cumulative value (S3).

For example, if the sign of the cumulative value is minus, and the sign of input data is also minus, then the signs are judged to be the same sign.

When the sign of the cumulative value of the DC balance value and the sign of the DC balance value of the input data are the same sign (S3: YES), the control section17ainverts all the bits of the input data to generate intermediate data (S4). Then, the control section17agenerates inversion information indicating that all the bits of the input data have been inverted, as predetermined information (S5). When the sign of the cumulative value of the DC balance value and the sign of the DC balance value of the input data are not the same sign (S3: NO), the input data is set as intermediate data (S9).

The process of performing the processes of S3, S4, S5and S9for input data to generate intermediate data constituted by a predetermined number of bits constitutes a data processing section.

When the sign of the cumulative value of the DC balance value and the sign of the DC balance value of the input data are not the same sign (S3: NO), and after all the bits are inverted, the control section17acalculates the DC balance of the intermediate data (S6). The control section17acalculates the DC balance of the intermediate data generated at S4. Otherwise, in the case of NO at S3, the control section17asets the input data as intermediate data and calculates the DC balance thereof. That is, the control section17acalculates a subtraction value obtained by subtracting the number of bits having the second value from the number of bits having the first value in the intermediate data.

The process of S6constitutes a subtraction section for calculating a subtraction value obtained by subtracting the number of bits having the second value from the number of bits having the first value in the intermediate data.

That is, the control section17aperforms a predetermined process for input data to generate intermediate data constituted by a predetermined number of bits. Then, as the predetermined process, the control section17aperforms a process of: comparing the sign of the subtraction value obtained for the input data and the sign of the cumulative value described above; generating the intermediate data by exchanging the first value and the second value with each other for all the bits of the input data and generating predetermined information indicating inversion of all the bits when the sign of the subtraction value and the sign of the cumulative value are the same sign; and setting the input data as intermediate data when the sign of the subtraction value and the sign of the cumulative value are different signs.

Then, the control section17aupdates the cumulative value to a latest value by adding the DC balance value of the intermediate data (the input data the bits of which have been inverted or the input data the bits of which have not been inverted) to a cumulative value in the past (S7). That is, the control section17aexecutes an accumulation process for calculating a cumulative value of the calculated subtraction value. The process of S7constitutes an accumulation section for calculating a cumulative value of the subtraction value.

Then, the control section17atransmits the intermediate data by a serial signal (S8). In the case where the inversion information is generated, the control section17aalso transmits the inversion information. The process of S8constitutes a transmission section for transmitting the intermediate data by a serial signal.

For example, if the intermediate data is constituted by 16 bits, the inversion information requires only addition of 1 bit. Therefore, the amount of communication between the transmission device17and the reception device19does not increase much for the number of bits of input data.

In the case where the input data is image information, the control section17aperforms control to include inversion information about each input data during a so-called blanking period in a video signal so that the inversion information is collectively transmitted. To transmit inversion information during a blanking period in a video signal as described above is advantageous in that it is unnecessary to add a bit for each unit of 16 bits of input data.

Next, the content of a process by the control section19aof the reception device19will be described.

FIG. 5is a flowchart showing an example of the content of the process by the control section19aof the reception device19.

The serial signal transmitted via the cable13is received by the control section19avia the insulating portion18(S11). The process of S11constitutes a serial reception section for receiving a serial signal and outputting the serial signals as received data for each predetermined number of bits.

The control section19ajudges whether there is inversion information about the received data which have been received (S12), and, if the inversion information is included (S12: YES), inverts all the bits of the received data (S13). If the inversion information is not included (S12: NO), inversion of the received data is not performed, and the received data is set as output data (S15). The process of performing the processes of S12, S13and S15for received data to generate output data constituted by a predetermined number of bits constitutes a data processing section.

As described above, in the case of receiving image information, the control section19ajudges whether inversion information about each received data exists or not, on the basis of inversion information received during a blanking period in a video signal.

If the inversion information does not exist (S12: NO), the control section19awrites the received data into a predetermined register or memory as output data (S14). If the inversion information exists (S12: YES), the control section19ainverts all the bits of the received data and writes the data into the predetermined register or memory as output data (S14).

That is, the control section19aperforms a predetermined process for received data obtained by deserializing a serial signal to generate output data constituted by a predetermined number of bits. Especially, as the predetermined process, the control section19agenerates output data by exchanging the first value and the second value with each other for all the bits of received data when predetermined information is generated, and sets the received data as the output data when the predetermined information is not generated.

As described above, according to the transmission device17and the reception device19according to the embodiment described above, the transmission device17judges whether the sign of the DC balance value of input data and the sign of a cumulative DC balance value are the same or not, inverts the input data on the basis of a result of the judgment, and transmits the input data to the reception device19by a serial signal. Then, inversion information indicating that the input data has been inverted is added to the inverted input data or separately generated, and transmitted to the reception device19.

The reception device19judges whether the received data obtained by deserializing the serial signal is inverted or not, on the basis of the received inversion information. If the inversion information is added to the received data or generated, the received data which has been received is inverted, and the same output data as the input data inputted to the transmission device17is outputted.

Thus, according to the transmission device17and the reception device19described above, much increase in the number of bits of input data does not accompany, and, therefore, it is possible to perform communication for which DC balance is ensured without increasing the transmission rate. Since there is a great demand for reduction of the diameter of the insertion portion of an endoscope, it is not possible to thicken signal lines, and, therefore, it is difficult to increase the transmission rate. According to the present embodiment, it is possible to perform communication without increasing the transmission rate.

Note that, as a variation of the present embodiment, the cumulative value of the DC balance value may be initialized in a predetermined cycle because there is a possibility that the cumulative value of the DC balance value may be calculated with error data due to communication errors and the like included.

FIG. 6is a flowchart showing an example of the content of a process by each control section of the transmission device17in the case where a cumulative value initialization process is included. The same processes as inFIG. 4are given the same reference numerals, and description thereof will be omitted. InFIG. 6, after S6, it is judged whether an initialization request has been received or not (S21). If the initialization request has been received (S21: YES), a cumulative value is initialized (S22).

As for the initialization request in the case where input data is image information, for example, a signal such as a horizontal synchronizing signal and a vertical synchronizing signal may be a signal indicating existence or nonexistence of the initialization request.

Otherwise, a timer circuit for counting a predetermined time period may be provided so that a timeout signal in a predetermined cycle outputted by the timer circuit may be a signal indicating existence or nonexistence of the initialization request. Thus, the process of S22constitutes an initialization section for initializing the cumulative value of the accumulation section in a predetermined cycle.

By adding such an initialization process, it is possible to eliminate errors of the cumulative value and perform correct DC balance adjustment.

Note that, though the process described above is realized by a software program at the control sections17aand19aof the transmission device17and the reception device19, the process may be realized by a hardware circuit.

FIG. 7is a block diagram showing a configuration of the hardware circuit of the transmission device17in that case. The transmission device17is configured such that it includes a subtracter21, a data processing circuit22, a subtracter23, a cumulative addition circuit24and a transmission circuit25. The subtracter21is a circuit for inputting input data to calculate DC balance. The subtracter21calculates DC balance, which is a subtraction value, by subtracting the number of bits of “1” as a second value from the number of bits of “0” as a first value in input data constituted by a predetermined number of bits.

InFIG. 7, the subtracter21constitutes a first subtraction section for calculating a first subtraction value obtained by subtracting the number of bits having a second value from the number of bits having a first value in input data constituted by a collection of a predetermined number of bits each of which has the first or the second value.

The data processing circuit22constitutes a first data processing section for performing a first predetermined process for the input data to generate intermediate data constituted by the predetermined number of bits.

The subtracter23constitutes a second subtraction section for calculating a second subtraction value obtained by subtracting the number of bits having the second value from the number of bits having the first value in the intermediate data.

The cumulative addition circuit24constitutes a first accumulation section for calculating a cumulative value of the second subtraction value.

The transmission circuit25constitutes a transmission section for transmitting the intermediate data by a serial signal.

Note that, in the DC balance calculation, the number of bits having the value of “0” as a second value may be subtracted from the number of bits having the value of “1” as a first value. That is, the subtracter21is a circuit for calculating a subtraction value obtained by subtracting the number of bits having a second value from the number of bits having a first value in input data constituted by a collection of a predetermined number of bits each of which has the first or the second value.

The data processing circuit22compares a sign obtained as a result of the DC balance calculation and the sign of the cumulative value, performs a necessary bit inversion process for the input data to generate intermediate data, and performs a process of generating predetermined information indicating inversion of all the bits.

The subtracter23is a circuit for calculating the DC balance of the bit-inverted data.

The cumulative addition circuit24is a circuit for adding the DC balance value of the intermediate data (bit-inverted input data or bit-uninverted input data) to a cumulative value in the past to calculate a cumulative value of DC balance.

The transmission circuit25is a circuit for transmitting the intermediate data via the signal lines13aof the cable13by a serial signal.

FIG. 8is a block diagram showing a configuration of a hardware circuit of the reception device19. The reception device19is configured such that it includes a reception circuit31and a data processing circuit32. The reception circuit31is a circuit for receiving a serial signal of intermediate data from the transmission device17and outputs the serial signals as received data for each predetermined number of bits.

The reception circuit31constitutes a serial reception section for receiving a serial signal and outputting the serial signals as received data for each predetermined number of bits.

The data processing circuit32constitutes a second data processing section for performing a second predetermined process for received data to generate output data constituted by a predetermined number of bits.

The data processing circuit32is a circuit for performing a necessary bit inversion process to generate output data on the basis of predetermined information, as described above.

As described above, the content of the processes shown inFIGS. 4 and 5may be realized by circuits as shown inFIGS. 7 and 8.

Second Embodiment

In the first embodiment, the transmission device17compares the sign of the DC balance value of input data and the sign of a cumulative value of the DC balance value and performs inversion of the input data. In a second embodiment, furthermore, a reception device is provided with a function of judging whether the DC balance of received data to be received is correctly adjusted or not.

A transmission device of the present embodiment is configured the same as the transmission device17of the first embodiment. Therefore, description thereof will be omitted, and description will be made mainly on a reception device. Though the configuration of a reception device19A of the present embodiment is similar to the configuration shown inFIG. 3, the content of a process by the reception device19A is different. Therefore, the different content of the process will be described.

FIG. 9is a flowchart showing an example of the content of the process by a control section19aof the reception device19A. InFIG. 9, the same processes as the processes inFIG. 5are given the same reference numerals, and description thereof will be simplified.

A serial signal of intermediate data transmitted via a cable13is received by the control section19avia an insulating portion18(S11). The control section19acalculates the DC balance of the received data which has been received (S31). The process of S31constitutes a subtraction section for calculating a subtraction value obtained by subtracting the number of bits having a second value from the number of bits having a first value in the received data.

The control section19acompares the sign of the DC balance value of the received data which has been received and the sign of a cumulative value of the cumulative DC balance value in the past and judges whether the sign of the DC balance value of the received data is the same as the sign of the cumulative value (S32). The cumulative value is a cumulative value of the DC balance value of the received data which has been received. The process of S32constitutes an accumulation section for calculating a cumulative value of the subtraction value.

When the sign of the cumulative value of the DC balance value and the sign of the DC balance value of the received data are the same sign (S32: YES), the control section19agenerates and transmits error information (S33). That is, the control section19acompares the sign of a subtraction value of the received data and the sign of the cumulative value, and, when the sign of the subtraction value and the sign of the cumulative value are the same sign, generates and outputs predetermined error information. The process of S33constitutes an abnormality detection section for comparing the sign of the subtraction value of received data and the sign of a cumulative value of the accumulation section, and, when the sign of the subtraction value and the sign of the cumulative value are the same sign, generating predetermined error information.

When the sign of the cumulative value of the DC balance value and the sign of the DC balance value of the received data are not the same sign (S32: NO), the control section19aadds the DC balance value of the received data to the cumulative value in the past to update the cumulative value to a latest cumulative value (S34).

As described above, according to the transmission device17and the reception device19A of the present embodiment, it is possible to perform communication for which DC balance is ensured without being accompanied by much increase in the number of bits of input data, and it is also possible to detect DC balance adjustment and communication abnormalities at the reception device19A in real time without being accompanied by much increase in the number of input bits.

Note that, at the reception device19A also, the cumulative value of the DC balance value may be initialized in a predetermined cycle because there is a possibility that the cumulative value of the DC balance value may be calculated with error data due to communication errors and the like included, similarly to the variation of the first embodiment.

The reception device19A of the present embodiment can be also realized by a hardware circuit.FIG. 10is a block diagram showing a configuration of the hardware circuit of the reception device19A in that case. The reception device19A is configured such that it includes a reception circuit31, a subtracter41, an abnormality detection circuit42, a cumulative addition circuit43and a data processing circuit32. InFIG. 10, the same components as inFIG. 8are given the same reference numerals, and description thereof will be omitted. Note that a transmission device and a reception device in the present embodiment are also circuit devices realized by FPGAs.

That is, the subtracter41constitutes a third subtraction section for calculating a third subtraction value obtained by subtracting the number of bits having a second value from the number of bits having a first value in received data.

The cumulative addition circuit43constitutes a second accumulation section for calculating a cumulative value of the third subtraction value.

The abnormality detection circuit42constitutes an abnormality detection section for comparing the sign of the third subtraction value of received data and the sign of a cumulative value of the second accumulation section, and, when the sign of the third subtraction value and the sign of the cumulative value of the second accumulation section are the same sign, generating predetermined error information.

The subtracter41is a circuit which has the same functions as the subtracter21and is for inputting received data to calculate DC balance. That is, the subtracter41calculates a subtraction value obtained by subtracting the number of bits having a second value from the number of bits having a first value in the received data.

The abnormality detection circuit42is a circuit for detecting whether DC balance adjustment is normal or not from a DC balance value calculated by the subtracter41as described later.

The cumulative addition circuit43is a circuit which has the same functions as the cumulative addition circuit24and is for calculating a cumulative value of DC balance by adding the DC balance value of received data which has been received to a cumulative value in the past. That is, the cumulative addition circuit43calculates a cumulative value of the subtraction value of the subtracter41.

As described above, the content of the process shown inFIG. 9may be realized by a circuit as shown inFIG. 10.

The various cables13used for the endoscope apparatus1are generally designed and manufactured so that they are provided with sufficient mechanical resistance in consideration of various use states. However, when the cables are used beyond the scope of assumption, there is a possibility that the cables are broken, but, conventionally, the cables are not provided with means for predicting such breakage.

Therefore, the means for predicting breakage of a cable constituted by multiple cables which makes connection between devices or between boards will be described. Here, description will be made with the multiple signal lines13ain the cable13as an example.

FIG. 11is a cross-sectional view of the cable13. The cable13is configured such that it includes a cable51for a driving signal which drives the image pickup device14aprovided at the distal end portion of the endoscope11, a cable52for an image signal from the image pickup device14a, a cable53for an operation signal related to the operation section15, and a detection line54for detection of breakage. The detection line54is a conductor wire thinner than the cables51,52and53.

Each of the cables51,52and53is constituted by multiple conductor wires55twisted together. The multiple conductor wires55correspond to the multiple signal lines13adescribed above. The cable13is configured by the three cables51,52and53and the one detection line54being twisted together. Therefore, the cable13has a high bending resistance due to the double twists.

If the cable13having such a configuration is used beyond the scope of assumption, the detection line54is damaged earlier than the conductor wires55in the cables51,52and53because the detection line54is thinner and has a strength lower than the strength of the cables51,52and53.

Therefore, by detecting the voltage or current of the detection line54, breakage of the conductor wires55in the cables51,52and53responsible for main functions of the endoscope apparatus can be predicted. For example, if it is detected that the voltage or current of the detection line54is above or below a predetermined voltage or current, a detection signal for the detection is transmitted to the processor12, and a message or the like to the effect that there is a possibility of breakage of the cable13is displayed on a monitor (not shown) connected to the processor12so that a user is notified thereof.

Note that, though description has been made on the example of the cable13which includes three cables here, the number of cables targeted by prediction by the breakage prediction means is not limited to three.

Furthermore, it is also possible to, when the cable13includes multiple cables, detect which cable may be possibly broken.

FIG. 12is a diagram for illustrating a configuration example making it possible to, when multiple cables are connected in series, identify a cable which may be possibly broken. As shown inFIG. 12, four circuit boards61,62,63and64are connected via three cables65. The circuit boards61and62, the circuit boards62and63, the circuit boards63and64are connected via the cables65, respectively.

Each cable65is a signal line having the same structure. Each cable65is configured such that it includes cables71and72, and a detection line73for detection of breakage. The cables71and72are covered cables each of which includes a conductor wire74, and the detection line73is a conductor wire thinner than the cables71and72.

Each cable65inFIG. 12is configured by the two cables71and72and the one detection line73which are twisted together. Furthermore, each of the cables71and72is constituted by multiple conductor wires74twisted together. Therefore, each of the cables65has a high bending resistance due to the double twists.

Thus, two circuit boards are connected via a signal line, and the detection line73is included in the signal line. Therefore, if the cable65is used beyond the scope of assumption, the detection line73in the cable65is damaged earlier than the conductor wires74in the cables71and72.

Therefore, by detecting the voltage or current of the detection line74, breakage of the other cables71and72can be predicted. For example, if breakage of the detection line73between the circuit boards61and62is detected, prediction of breakage of the cable65between the circuit boards61and62can be judged.

By connecting such multiple circuit boards in series via such cables as described above, it is also possible to detect which cable may be possibly broken. Since breakage can be predicted, it becomes possible, for example, to shorten an unusable period of the endoscope apparatus to be of the minimum length, and an advantage can be obtained that breakage examination of the endoscope apparatus can be simplified and realized at a low cost.

As described above, according to the communication device according to the embodiment described above, the transmission device judges whether the sign of the DC balance value of input data and the sign of a cumulative DC balance value are the same or not, inverts the input data on the basis of a result of the judgment, and transmits the input data to the reception device. Then, the inverted input data is transmitted to the reception device with inversion information indicating that the input data has been inverted added thereto or separately generated. Thus, according to the embodiment described above, it is possible to provide a communication device capable of performing communication for which DC balance is ensured, without being accompanied by much increase in the number of bits of input data, an endoscope apparatus and a communication method.

The present invention is not limited to the embodiments described above, and various modifications, alterations and the like are possible within a range not departing from the spirit of the present invention.