Method and apparatus for coordinated multipoint receiver processing acceleration and latency reduction

Methods and apparatus for coordinated multipoint receiver processing acceleration and latency reduction. In an exemplary embodiment, an apparatus includes a receiver that receives symbols from a wireless transmission and stores the symbols in a memory. The receiver also outputs an indicator that indicates that storage of the symbols in the memory has begun. The apparatus also includes a controller that outputs control signaling in response to the indicator. The apparatus also includes a link that acquires the symbols and remote scheduling and control information (RSCI) from the memory in response to receiving the control signaling. The link combines the symbols with the RSCI to form packets and transmits the packets to an external system.

FIELD

The present invention relates to the operation of communications networks. More specifically, the present invention relates to methods and apparatus for processing data in a communication system.

BACKGROUND

With the rapidly growing trend of mobile and remote data access over high-speed communication networks, such as 3G, 4G, or LTE cellular services, accurately delivering data has become increasingly challenging and difficult. A high-speed communication network that is capable of delivering information includes, but is not limited to, a wireless network, a cellular network, wireless personal area network (“WPAN”), wireless local area network (“WLAN”), wireless metropolitan area network (“MAN”), or the like. These networks typically utilize different transmission or network protocols based on industry standards for each protocol.

One technique used to address the challenges of high-speed wireless data communication is referred to as Coordinated Multipoint (CoMP) processing. CoMP processing enables dynamic transmission and reception between user equipment (UE) and multiple geographically separated antennas. For example, UE signals received by multiple antennas can be evaluated so that the best signal is selected for processing. In another example, UE signals received by multiple antennas can be combined and processed to produce a final output signal, which improves processing for weak signals or signals that include interference.

CoMP processing is based on receiving multiple versions of the same signal at multiple antennas. One or more of the multiple versions are transmitted to a single processing system to give that processing system access to the one or more versions of the signal for processing. Thus, one problem associated with CoMP processing is signal latency (or delay) that occurs when transferring the different versions of the received signal to the central processing system. For example, delays may be introduced by the need for additional processing to transfer the different versions to a central processor, and by the communication delay from the different receiving sites. If there is too much latency, the central processing system may not be able to process the multiple versions of the received signal within the available time interval.

Therefore, it would be desirable to have a way to provide low latency CoMP processing in a wireless communications network, thereby overcoming the problems of latency associated with conventional systems.

SUMMARY

In various exemplary embodiments, methods and apparatus are provided for CoMP receiver processing acceleration and latency reduction. In an exemplary embodiment, a CoMP baseband architecture is provided that includes multiple baseband processing systems that communicate with each other using a high-speed communication channel. Each baseband processing system accepts symbols received at a particular antenna. Symbols transmitted by user equipment (UE) and received at a first antenna are accepted by a first baseband processing system. These received symbols are transferred with little delay to a link that combines the symbols with associated remote scheduling control information (RSCI) to generate packets.

The link transmits the packets over the high-speed communication channel from the first baseband processing system to a second baseband processing system. At the second baseband processing system, the symbols from the packets are transferred with little delay from a receiving link to a memory. At least a portion of the remote scheduling control information is transferred to a scheduler at the second baseband processing system. In one exemplary embodiment, the scheduler at the second baseband processor uses the remote scheduling control information it receives to schedule processing of the symbols stored in the memory.

In another exemplary embodiment, the same symbols transmitted by the user equipment (UE) and received at a second antenna are accepted by the second baseband processing system and also stored in the memory. Thus, the second baseband processing system has access to two versions of the symbols transmitted by the UE and received at different antennas. Due to the high-speed transfer of the symbols from the first baseband processing system to the second baseband processing system, the latency between the two versions of the symbols stored in the memory is less than one symbol time, and typically less than one microsecond. The two versions are then individually or jointly processed at the second baseband processing system according to the remote scheduling control information. For example, the symbols are processed either individually or in combination to provide the best communication result.

In an exemplary embodiment, an apparatus is provided that includes a receiver that receives symbols from a wireless transmission and stores the symbols in a memory. The receiver also outputs an indicator that indicates that storage of the symbols in the memory has begun. The apparatus also includes a controller that outputs control signaling in response to the indicator. The apparatus also includes a link that acquires the symbols and remote scheduling and control information (RSCI) from the memory in response to receiving the control signaling. The link combines the symbols with the RSCI to form packets and transmits the packets to an external system.

In an exemplary embodiment, a method is provided that includes operations of receiving symbols from a wireless transmission, storing the symbols in a memory, and signaling that the symbols are available in the memory. The method also includes operations of acquiring the symbols and remote scheduling control information RSCI in response to the signaling, combining the symbols with the RSCI to form packets, and transmitting the packets to an external system.

DETAILED DESCRIPTION

The purpose of the following detailed description is to provide an understanding of one or more embodiments of the present invention. Those of ordinary skill in the art will realize that the following detailed description is illustrative only and is not intended to be in any way limiting. Other embodiments will readily suggest themselves to such skilled persons having the benefit of this disclosure and/or description.

In the interest of clarity, not all of the routine features of the implementations described herein are shown and described. It will, of course, be understood that in the development of any such actual implementation, numerous implementation-specific decisions may be made in order to achieve the developer's specific goals, such as compliance with application and business-related constraints, and that these specific goals will vary from one implementation to another and from one developer to another. Moreover, it will be understood that such a development effort might be complex and time-consuming, but would nevertheless be a routine undertaking of engineering for those of ordinary skill in the art having the benefit of the embodiments of this disclosure.

Various exemplary embodiments of the present invention illustrated in the drawings may not be drawn to scale. Rather, the dimensions of the various features may be expanded or reduced for clarity. In addition, some of the drawings may be simplified for clarity. Thus, the drawings may not depict all of the components of a given apparatus (e.g., device) or method. The same reference indicators will be used throughout the drawings and the following detailed description to refer to the same or like parts.

The term “system” or “device” is used generically herein to describe any number of components, elements, sub-systems, devices, packet switch elements, packet switches, access switches, routers, networks, modems, base stations, E-UTRAN Node B (eNodeB or eNB), computer and/or communication devices or mechanisms, or combinations of components thereof. The term “computer” includes a processor, memory, and buses capable of executing instructions wherein the computer refers to one or a cluster of computers, personal computers, workstations, mainframes, or combinations of computers thereof.

FIG. 1shows a communications network100that includes an exemplary embodiment of a novel CoMP architecture constructed in accordance with exemplary embodiments of the present invention. Network100includes two baseband processing system102and104that are in communication with eNBs106and108in cell sites110and112, respectively. In an exemplary embodiment, the baseband processing systems102and104are constructed using system-on-chip (SOC) technology and are located in a central processing facility. The SOCs of the systems102and104may also be located in separate facilities.

The baseband processing system102comprises CPU subsystem) and baseband subsystem). The baseband processing system104comprises CPU subsystem2and baseband subsystem2. The baseband processing system102includes link) and the baseband processing system104includes link2. Link) and link2comprise circuits and/or components to support communication over one or more high speed channels. In this exemplary embodiment, a high-speed channel114is coupled between link) and link2. The baseband subsystem) includes memory (M1) and the baseband subsystem2includes memory (M2).

The eNBs106and108are further coupled to various user equipment (UE), such as tablets and/or iPad®116, cellular phone118, and handheld device120, via wireless communications links122,124, and126. Cell site110facilitates network communication between mobile devices such as UEs116and118and the baseband processing system102via eNB106, and cell site112facilitates network communication between baseband processing system104and UEs118and120via eNB108. It should be noted that the cell sites110and112can include additional radio towers as well as other land switching circuitry.

In an exemplary embodiment, an advantage of using the CoMP architecture shown inFIG. 1is to improve the processing of uplink transmissions from a UE device that are received at different antennas. For example, it will be assumed that an uplink transmission from device118is received by both eNBs106and108. The uplink transmission from device118to the baseband processing system102is shown by symbols128and that same uplink transmission from device118is received by the baseband processing system104, as shown by symbols130. Thus, both baseband processing systems102and104receive the same transmitted symbols from the device118, however, due to the reception of the transmission by different antennas, the signal characteristics of the two received transmissions may be different. For example, the symbols128received by baseband processing system102may have more or less signal strength than the symbols130received by baseband processing system104. Thus, it would be desirable to process the received transmitted symbols with the better quality.

In an exemplary embodiment, the symbols130of the uplink transmission are received by the baseband processing system104and stored in the memory M2. The symbols128of the uplink transmission are received by the baseband processing system102and stored in the memory M1. As the symbols128are stored in the memory M1, the memory M1transfers the symbols128to the link1. In an exemplary embodiment, the transfer takes place over a direct connection134from the memory M1to the link1. In another exemplary embodiment, the transfer of the received symbols from M1to the link1takes place over a high-speed bus132. In an exemplary embodiment, the bus132connects the baseband subsystem1, the CPU subsystem1, and the link1.

As the symbols128are received by the link1, remote scheduling control information is sent to the link1. In one embodiment, the RSCI138is sent over the bus132, and in another embodiment, the RSCI is sent from the memory M1. In exemplary embodiments, the remote scheduling control information138define how the symbols128are to be processed at a remote processing system, such as the baseband processing system104.

The link1combines the symbols128it receives from the memory M1with the remote scheduling control information138to generate packets136. The packets136then flow from link1over the high-speed channel114to link2of the baseband processing system104. The link2separates the symbols128from the packets136and stores the symbols in the memory M2. The remote scheduling control information138also may be stored in the memory M2. The link2sends the symbols128to the memory M2using a direct connection140, and sends at least a portion of the remote scheduling control information138to the baseband subsystem2over bus142. In another exemplary embodiment, the symbols128received by the link2flow over a high-speed bus142to the memory M2.

Thus, the baseband processing system104now has stored in memory M2two versions of the symbols transmitted by device118and received by the eNBs106and108. For example, symbols128represent a first version of the symbols and symbols130represent a second version of the symbols. In addition, the baseband subsystem2has obtained the remote scheduling control information138from the baseband processing system102. Using the remote scheduling control information, the baseband processing system104can determine how to process the symbol transmissions stored in the memory M2. For example, either version of the symbols can be selected for processing, in whole or in part, or the symbols may be combined before processing to improve signal quality. For example, the baseband processing system104can compute a signal-to-noise ratio (SNR) for each version of the symbols in the memory M2and use this SNR value to determine which symbols to process. The computations can be compared on a frame by frame basis to pick the better symbols to process.

In order to reduce or minimize latency, the direct connections134and136provide fast transfers of symbol data from the memory M1to the link1and from the link2to the memory M2, respectively. In addition, the high-speed channel114provides high speed transmission of the symbol data between link1and link2. Thus, the overall delay in receiving both versions of the symbols at the baseband processing system104is much less than one symbol time. In an exemplary embodiment, the delay is less than one microsecond.

It should also be noted that the transfer of symbol data from link1can be extended to any number of additional baseband processing systems, for example, a plurality of additional processing systems are shown at144. Thus, the novel CoMP architecture disclosed herein allows the reception of symbol data and the processing of the symbol data to take place at separate processing systems. In addition, a selected baseband processing system can generate the RSCI that controls processing of the symbols at other baseband processing systems.

It should also be noted that similar processing and data handling can be performed to support the transmission of symbol data and remote scheduling control information from the baseband processing system104to the baseband processing system102. For example, in an exemplary embodiment, the received symbols can be exchanged over the high-speed channel114so that both systems102and104receive both versions of the transmitted symbols. A more detailed description of the exemplary embodiments of the CoMP architecture is provided below.

FIG. 2shows a detailed exemplary embodiment of a novel baseband processing system200for use in the CoMP architecture shown inFIG. 1. For example, the baseband processing system200shown inFIG. 2is suitable for use as the baseband processing system102shown inFIG. 1to receive transmitted symbols and forwards these symbols and remote scheduling control information to a second baseband processing system (e.g., system104) with low latency.

The baseband processing system200includes two primary subsystems, namely the CPU subsystem228and the baseband processing subsystem230. The CPU subsystem228includes a pool of general purpose CPUs202that provided layer 2 through layer 7 OSI layer packet processing functions. The CPU subsystem228also includes one or more interfaces (I/F)206that support various high-speed links246, such as Ethernet, SRIO, 10GE, or PCIe to a backhaul network.

In an exemplary embodiment, the CPU subsystem228creates job requests224(e.g., job descriptors) and radio data sets in a system memory204or in a shared memory216and these job requests are scheduled to be processed by the baseband processing subsystem230.

The CPU subsystem228is connected to the baseband processing subsystem230over one or more high speed fully pipelined I/O busses208. Each of the busses208is a shared, full duplex bus allowing simultaneous reads and writes. The CPUs202can communicate directly with baseband processing subsystem230using memory mapped I/O reads and writes. The baseband processing subsystem230can also communicate with the CPU subsystem228using coherent memory reads and writes to system memory204as well as through programmable interrupts.

The baseband processing subsystem230includes a pool of resource blocks comprising fixed functional elements (FFE)212and/or programmable functional elements (PFE)214that are used to carry out signal processing tasks required for symbol processing. The baseband processing subsystem230also includes an uplink front end (ULFE)218, which interfaces with at least one radio front end222that is coupled to at least one antenna220.

To execute processing tasks, the baseband processing subsystem230includes a flexible job scheduler (PSM)210that receives job requests224from the CPUs202over the busses208and queues these job requests until they are processed into one or more scheduled jobs226that are sent to the FFE212and/or the PFE214for completion. Thus, the CPUs202are able to implement one or more processing pipelines by generating the appropriate sequence of job requests and sending this sequence of job requests to the baseband processing subsystem230, which schedules the job requests to be processed by the fixed and/or programmable functional elements.

During CoMP operation, wirelessly transmitted symbols232are received by the antenna220and flow through the radio front end222to the ULFE218. The ULFE218stores these symbols into the shared memory216. At the same time, the ULFE218sends an indicator242to the scheduler210to indicate that the storage of received symbol data into the memory216has begun. The memory also contains RSCI that is pre-stored and/or configured during system startup.

In response to receiving the indicator242, the scheduler210outputs control signaling240to the link248. The control signaling240control the link248to obtain the symbols232and RSCI248from the shared memory216over direct connection234. In another exemplary embodiment, the control signaling240controls the link248to obtain the symbols and RSCI stored in the memory216over the bus208(as indicated by path244). The link248operates to combine the symbols232with the remote scheduling control information248to generate packets238that are transmitted over high-speed channel236to one or more other baseband processing systems.

Thus, the baseband processing system200operates to forward symbols232received at the antenna220, combined with remote scheduling control information248to other baseband processing with very little latency, thereby allowing the symbols to be processed in a CoMP architecture. The remote scheduling control information248controls how the symbols are processed by other baseband processing systems. Thus, remote scheduling of symbol processing is controlled by the baseband processing system200.

FIG. 3shows a detailed exemplary embodiment of a novel baseband processing system300for use in the CoMP architecture shown inFIG. 1. For example, the baseband processing system300shown inFIG. 3is suitable for use the baseband processing system104to receive symbols and remote scheduling control information forwarded from a first baseband processing system (e.g., system102) with low latency.

The structure of the baseband processing system300shown inFIG. 3is similar to the structure of the baseband processing system200shown inFIG. 2and so to avoid redundancy, the descriptions of these structures will not be repeated here. During CoMP operation, wirelessly transmitted symbols232are received by the antenna220and flow through the radio front end222to the ULFE218. The ULFE218stores these symbols232into the shared memory216. At the same time, the ULFE218sends an indicator242to the scheduler210to indicate that the storage of received symbol data into the memory216has begun.

Shortly after symbols are received by the ULFE218, packets302are received over channel236by the link248. In an exemplary embodiment, the packets302include symbols that were received by a different antenna and communicated to the link248from a second baseband processing system. In an exemplary embodiment, the packets302include remote scheduling control information that is also received from the second baseband processing system. For example, the packets302may have been received from the baseband processing system102shown inFIG. 1.

In an exemplary embodiment, the packets302are transmitted over the high-speed channel236to the link248with very little delay. In an exemplary embodiment, the link248decodes the received packets302and stores the received symbols304in the memory216using the direct connection234. The link248also transfers all or part of the received RSCI310to the memory216. In another exemplary embodiment, the link248sends the received symbols and the RSCI over the bus208for storage in the memory216, as shown by path306. Thus, the memory216now contains two versions of symbols (e.g., symbols232and symbols304) received from two antennas, which can be processed by the operation of the scheduler210.

The packet302include RSCI that indicates how the symbols are to be processed. The link248decodes the RSCI from the received packets and sends at least a portion of this information over the bus208to the scheduler210as indicated at308. For example, the portion of the RSCI sent to the scheduler includes commands that can be interpreted by the scheduler210to control how the symbols stored in the memory216are processed. The scheduler210then schedules processing tasks226to process the symbols stored in the memory216based on the received commands decoded from the remote scheduling control information.

Thus, the baseband processing system300shown inFIG. 3operates to receive symbols232over the antenna220and symbols304through the high-speed channel236. Both sets of symbols were originally transmitted from a UE device and received by at least two antennas. In an exemplary embodiment, the latency between the symbols is very low (e.g., less than one symbol time). Thus, the baseband processing system300is able to select and process symbols having the better quality. The baseband processing system300also operates to receive remote scheduling control information attached to symbols received by the link interface248. The command portion308of the remote scheduling control information is used by the scheduler210to control how symbols are processed.

FIG. 4Ashows a detailed exemplary embodiment of the job scheduler (PSM)210shown inFIGS. 2-3. The PSM210comprises a controller402, bus interface404, one or more hardware queues406, job resource pool408, and memory410. The controller402receives the job requests on the bus208from the CPUs202through the bus interface404and queues these requests in the hardware queues406. This dynamic hardware job queuing mechanism is used to service jobs from the same queue in strict order, or to allow jobs from different hardware queues to execute in parallel and out of order giving a high degree of freedom and control for job scheduling of radio timeline events. Jobs from the same queue can also be serialized to delay the launch of the next job until a previous job has completed.

The PSM210maintains a resource pool408to assign job types to specific resources (e.g., functional elements). When a pending job reaches the head of a hardware queue, and a functional element is available for the intended job type, the PSM210will dispatch the scheduled job to the functional element and track the job to its completion. New job requests can also be initiated by previous job completions or by other external events (e.g., radio frame or delay timer values).

As the jobs exit the queues, the controller402routes them (e.g., as scheduled jobs) to the appropriate functional element (e.g., FFE212or PFE214) for completion. In an exemplary embodiment, once an FFE or PFE completes a job it sends back a corresponding job completion indicator. The controller402can schedule additional jobs for the functional element in response to receiving the job completion indicator associated with the current job.

The following description describes operation of the PSM210when located in a baseband processing system that is operating to transmit packets, such as the baseband processing system200shown inFIG. 2. During operation, the controller402receives the indicator242from the ULFE218when receiving the symbols232. The indicator242indicates that symbols232received by the ULFE218are being written into the memory216. In response to receiving the indicator242, the controller402outputs control signaling240to control the link248to acquire these symbols from the memory216. The transfer can be done using either the direct connection234or the bus208.

The PSM210transmits the control signaling240over the bus208to the link248. In an exemplary embodiment, the remote scheduling control information (RSCI)248is stored at the memory216and is available for transmission to the link248when the indicator242is detected. For example, the RSCI is stored in the memory216at start up. The link248acquired the remote scheduling control information248and the symbols232from the memory216and combines the symbols232and the RSCI248to form packets238that are transmitted over the channel236to one or more other baseband processing systems. Thus, the transmitted remote scheduling control information240allows the PSM210to control the types of processing and tasks performed to process the symbols at a second baseband processor.

The following description describes operation of the PSM210when located in a baseband processing system that is operating to receive packets, such as the baseband processing system300shown inFIG. 3. In an exemplary embodiment, the packets302are received at the link248. The link248transfers the symbols304and the RSCI310to the memory216using direct connection234. The link248then transfers at least a portion of the RSCI308comprising commands to the controller402over the bus208. For example, packets302are received over the channel236from a second baseband processing system and include the remote scheduling control information. The link248separates the remote scheduling control information from the symbols and passes the commands from the remote scheduling control information308to the scheduler210using the bus208. The controller402queues the commands308in the queues406for processing the received symbols. Thus, the received remote scheduling control information308allows a second baseband processing system to control the types of processing and tasks the scheduler210performs to process the received symbols.

FIG. 4Bshows a detailed exemplary embodiment of the link248shown inFIGS. 2-3. The link248comprises a link controller410, packet transceiver412, packet separator414, and packet combiner416. The link controller410controls the operation of the components of the link248using bus418. The link controller410is coupled to the bus208to receive control signaling240from the scheduler210. The link controller410also outputs RSCI commands308over the bus208.

The packet transceiver412transmits and receives packets over the high-speed channel236. The packet separator414processes received packets to separate the symbols and the RSCI information. The received symbols and the RSCI information are stored in the memory216using the memory interface418. At least a portion of the RSCI information that comprises commands308are sent to the link controller410and thereafter output on the bus208to the scheduler210. In response to the receiving the control signaling240, the link controller410controls the packet combiner416to acquire symbols and RSCI information from the memory216using the memory interface418. The acquired symbols and RSCI information are combined to form packets that are passed to the packet transceiver for transmission on the high-speed channel236.

FIG. 5shows an exemplary embodiment of a CoMP architecture comprising two baseband processing systems. For example, a first baseband processing system is configured within a first system-on-chip (SOC1)502, and a second baseband processing system is configured within a second SOC2504. The first baseband processing system502comprises baseband processing subsystem228(1) and CPU processing subsystem230(1). The second baseband processing system504comprises baseband processing subsystem228(2) and CPU processing subsystem230(2). In exemplary embodiments, the SOCs502and504can be located at the same physical location or in different physical locations.

During operation of the CoMP architecture, the ULFE(1) receives symbols506from a UE that are received at a first antenna through a first radio front end. For example, the symbols506from the first antenna are received at the IN1input. The ULFE(1) writes the received symbols506to the SMEM(1), and activates indicator242(1) to inform the PSM(1) that the received symbols506are now being written to the SMEM(1). In an exemplary embodiment, in response to receiving the indicator242(1), the PSM(1) can process the received symbols using the FFE(1) and PFE(1) resources by obtaining the symbols from memory as indicated by path508and sending out the appropriate job tasks510.

In another exemplary embodiment, in response to receiving the indicator242(1), the PSM(1) outputs control signaling516to control the link(1) to acquire the symbols and associated RSCI information from the SMEM(1) over the direct connection234(1). In still another exemplary embodiment, in response to receiving the control signaling516, the link(1) acquires the symbols and the RSCI information from the SMEM(1) over bus208(1). Thus, link(1) receives the symbols506and the RSCI information from the SMEM(1) soon after the storage of symbols begins.

The remote scheduling control information describes how the symbols506are to be processed at a second baseband processing system. The link(1) combines the remote scheduling control information with the symbols506to form packets518. The packets518are then transmitted by the link(1) to the link(2) over the connection236.

In an exemplary embodiment, when the packets518are received, link(2) separates the symbols518and the RSCI information. Link(2) writes the symbol data506and the RSCI information to the SMEM(2) as described above. The link(2) then transfers the command portion516of the RSCI over the bus208(2) to the PSM(2). At this point the symbols received by the link(2) are stored in the SMEM(2) and the commands516included in the remote scheduling control information are queued for processing at the PSM(2).

Concurrently with the above processes, the ULFE(2) receives symbols528from the UE that are received at a second antenna through a second radio front end. For example, the symbols528from the second antenna are received at the input IN2. The ULFE(2) writes the symbols528to the SMEM(2), and then sends indicator242(2) to the PSM(2) to indicate the start of the symbols being written into the SMEM(2). The PSM(2) now has access to symbols (506and528) received from two antennas that are now stored in the MEM(2). The PSM(2) can now determine which symbols provide the better characteristics and process those symbols utilizing the remote scheduling and control command516. For example, the PSM(2) sends jobs526to the FFE(2) and the PFE(2) to obtain the selected symbols from the MEM(2) as shown by path530. In another embodiment, the PSM(2) can send out jobs that combine the symbols to obtain improved signal quality and/or noise reduction.

Thus, the baseband processing systems502and504operate in a CoMP architecture to provide coordinated multipoint receiver processing acceleration and latency reduction. It should be noted that althoughFIG. 5illustrates how symbols are transferred from SOC1502for processing at SOC1504, the same processes can be used to transfer symbols from SOC2504for processing at SOC1502to achieve the same low latency. In still another embedment, symbols can be transferred in both directions (e.g., from SOC1to SOC2, and from SOC2to SOC1) to allow processing of symbols receive by multiple antennas at both baseband processing systems simultaneously with low latency.

FIG. 6shows an exemplary embodiment of a timing diagram600that illustrates low latency resulting from operation of exemplary embodiments of the CoMP architecture. For example, the timing diagram600illustrates symbol timing for symbols received by the CoMP architecture shown inFIG. 5.

A symbol602is transmitted from a UE and received at a second antenna. The symbol is input to the ULFE(2), as shown inFIG. 5. The ULFE(2) stores the symbol602in the memory SMEM(2) beginning at time TO. The symbol storage is complete at time T2.

A symbol604is the same symbol as the symbol602. The symbol604is received at a first antenna and is input to the ULFE(1), as shown inFIG. 5. The symbol604is written into SMEM(1) and then read out from the SMEM(1) using direct connection234(1) and input to the link(1). The link(1) transfers the symbol604over the high speed channel236where it is received by the link(2). The link2transfers the symbol604to the SMEM(2) over the direction connection234(2). The symbol604is written into the SMEM(2) at time T1. The storage of symbol604is completed at time T3.

The timing diagram600illustrates the delay606(or latency) between the symbols as they arrive at the SMEM(2). In various exemplary embodiments, the delay606in receiving the two symbols at the SMEM(2) is less than one symbol time and typically less than one microsecond.

FIG. 7shows an exemplary embodiment of a combined symbol700that illustrates remote scheduling and control information used in an exemplary embodiment of the CoMP architecture. For example, the combined symbol700includes a symbol702and remote scheduling and control information704attached at the end of the symbol702. The control information704comprises a priority identifier706, queue identifier708, command identifier710and time identifier712. In an exemplary embodiment, the remote scheduling and control information704is placed before the symbol702(e.g., their order is reversed).

In an exemplary embodiment, the priority identifier706identifies a priority associated with the processing of the symbol702. The queue identifier708identifies a processing queue to be used to process the symbol702. For example, queue identifier708identifies one of the queues406in the scheduler210. The command identifier710identifies a command or job that the scheduler210will schedule to begin processing of the symbol702. The time identifier712identifies a time stamp within the current frame when the symbol702is to be processed.

FIG. 8shows an exemplary embodiment of a timing diagram800that illustrates the low latency operation of the CoMP architecture. As illustrated inFIG. 8, a symbol in a transmission from UE is received at a first antenna and transferred to the ULFE(1). A time interval (1A) of approximately 400 nanoseconds (ns) is used to store the received symbol in the memory SMEM(1). A time interval (1B) of approximately 100 ns is used to pass a symbol from the SMEM(1) and output that symbol from the link(1). A time interval (1C) of less than one microsecond is used to transfer the stored symbol from the memory SMEM(1) to the link(1), transfer the symbol from the link(1) to the link(2), and transfer the symbol from the link(2) to the SMEM(2).

Concurrently with the above operations, the same symbol is received at a second antenna and transferred to the ULFE(2) of a second baseband processing system. A time interval (2A) of approximately 400 ns is used to transfer the symbol from the ULFE(2) to the SMEM(2). At this point, symbols received by both baseband processing systems are now stored in the memory SMEM(2). As a result of the above time intervals, the latency between storing both received symbols in the SMEM(2) is less than one symbol time and typically less than one microsecond.

FIG. 9shows an exemplary embodiment of a method900for operating a CoMP architecture in accordance with one embodiment of the present invention. For example, the method is suitable for use with the CoMP architecture shown inFIG. 5to receive symbols at a first baseband processing system and process those symbols at a second baseband processing system.

At block902, transmitted symbols are received at a first baseband processing system. For example, as illustrated inFIG. 5, symbols received at a first antenna are input to the ULFE(1) of a first baseband processing system502configured on SOC1.

At block904, the received symbols are stored in a memory of the first baseband processing system. For example, as illustrated inFIG. 5, the ULFE(1) stores the received symbols506in SMEM(1).

At block906, an indicator is signaled to a job scheduler to indicate that storage of the symbols in the memory has begun. For example, as illustrated inFIG. 5, the ULFE(1) outputs indicator242(1) to PSM(1) to indicate that the storage of received symbols506in SMEM(1) has begun.

At block908, in response to the indicator, control signaling is output. For example, as illustrated inFIG. 5, in response to receiving the indicator242(1), the PSM(1) outputs control signaling516to control the link(1) to access the memory to obtain the symbols and remote scheduling control information. In an exemplary embodiment, the RSCI is preconfigured in the SMEM(1) at start up.

At block910, the stored symbols and RSCI are read from memory in response to the control signaling. For example, as illustrated inFIG. 5, the PSM(1) outputs control signaling516that controls the link(1) to acquire the symbols and RSCI stored in SMEM(1) over the direction connection234(1).

At block912, the symbols and remote scheduling control information are combined into packets. As illustrated inFIG. 5, the link(1) combines the symbols with the remote scheduling control information to the generate packet518. For example, in an exemplary embodiment, the packets are generated as illustrated inFIG. 7wherein the remote scheduling and control information is either prepended or appended to the data symbol.

At block914, the packets are transmitted over a high-speed channel to a link at a second baseband processing system. For example, as illustrated inFIG. 5, the link(1) transfers the packets518to the link(2) over the high speed channel236.

At block916, the transmitted packets are received at a link interface of the second baseband processing system. For example, as illustrated inFIG. 5, the link(2) receives the packets518from the high speed channel236.

At block918, the symbols and remote scheduling control information are separated from the packets at the receiving link. For example, as illustrated inFIG. 5, the link(2) separates the symbol data506and the remote scheduling control information516from the packets518.

At block920, the separated symbols are stored in a memory of the second baseband processing system. For example, as illustrated inFIG. 5, the link(2) stores the received symbols506in SMEM(2) using the direct connection234(2). The link(2) may also store the RSCI information in the SMEM(2).

At block922, at least a portion of the remote scheduling control information is passed to a job scheduler of the second baseband processing system. For example, as illustrated inFIG. 5, the link(2) passes a command portion of the remote scheduling control information516to the PSM(2) using the bus208(2).

At block924, processing jobs are scheduled to process the symbols based on the remote scheduling control information. For example, as illustrated inFIG. 5, the PSM(2) schedules processing jobs to process the symbols in the SMEM(2) based on the received command portion of the RSCI. For example, the PSM(2) uses the commands portion of the RSCI to schedule jobs associated with selected job queues406(FIG. 4A). The scheduled jobs are output to the FFE(2) and/or the PFE(2) using the bus208(2).

At block926, the scheduled jobs are executed to process the symbols at the second baseband processing system. For example, the scheduled jobs are performed by the FFE(2) and the PFE(2). Thus, symbols received at the first baseband processing system502are sent with low latency (e.g., less than one half symbol time) to the second baseband processing system504for processing.

Thus, the method900operates in a CoMP architecture in accordance with one embodiment of the present invention. For example, the method900operates in a CoMP architecture to receive symbols at a first baseband processing system and schedule the processing of those symbols at a second baseband processing system. It should also be noted that the operations of the method900may be changed, modified, added to, subtracted from, or otherwise rearranged within the scope of the embodiments.

FIG. 10shows an exemplary embodiment of a method1000for operating a CoMP architecture in accordance with one embodiment of the present invention. For example, the method is suitable for use with the CoMP architecture shown inFIG. 5to process multiple versions of transmitted symbols at one baseband processor. In an exemplary embodiment, the method1000operates in parallel with the method900.

At block1002, transmitted symbols are received at a front end of a second baseband processing system. For example, as illustrated inFIG. 5, symbols received at a second antenna are input to the ULFE(2) of the second baseband processing system504. In an exemplary embodiment, the received symbols528represent a second version the symbols506. Although transmitted by the same UE, this second version is received by a different antenna.

At block1004, the received symbols are stored in a memory of the second baseband processing system. For example, as illustrated inFIG. 5, the ULFE(2) stores the received symbols528in SMEM(2).

At block1006, an indicator is signaled to a job scheduler that storage of the symbols in the memory has begun. For example, as illustrated inFIG. 5, the ULFE(2) outputs indicator242(2) to PSM(2) to indicate that the storage of received symbols528in SMEM(2) has begun.

When the methods900and1000run in parallel, block926is replaced with block1008below, since the MEM(2) now stores two versions of the symbols for processing.

At block1008, the symbols received over the link and the symbols received in the wireless transmission are processed jointly or separately. In an exemplary embodiment, the PSM(2) jointly processes the first506and second528sets of symbols stored in SMEM(2). In an exemplary embodiment, the PSM(2) enqueues jobs for a PFE or FFE to determine which symbols to process by comparing key metrics, such as the SNR of the received symbols or available resource elements, and picking the symbols with the better metric for processing. The PSM(2) may also enqueues jobs for a PFE or FFE to combine the symbols for processing. The PSM(2) controls the PFE or FFE to implement virtually any type of signal processing on the first506and second528sets of symbols stored in the SMEM(2).

Thus, the method1000operates a CoMP architecture in accordance with one embodiment of the present invention. It should also be noted that the operations of the method1000may be changed, modified, added to, subtracted from, or otherwise rearranged within the scope of the embodiments.