Array substrate, display panel, and display device

The present disclosure provides an array substrate, a display panel, and a display device. The array substrate includes a base plate, the sub zone common electrode, the compensation electrode, and the sub zone pixel electrode are formed on the base plate in sequence, the projection area of the compensation electrode on the base plate is spaced from the projection area of the sub zone pixel electrode on the base plate.

FIELD

The disclosure generally relates to the technical field of display, and more particularly relates to an array substrate, a display panel, and a display device.

BACKGROUND

Currently, a multi-domain technology is normally adopted to divide one sub pixel into a plurality of regions, enabling the liquid crystals in each of the regions to rotate to different directions when being applied with voltage, therefore the display effects observed from every directions tend towards average and uniform, as such the view angle of the liquid crystal display is enlarged. In order to improve the visual color difference or visual color shift, the current technology would divide one sub pixel into a main zone and a sub zone, an independent main zone pixel electrode is defined in the main zone, and an independent sub zone pixel electrode is defined in the sub zone, the main zone pixel electrode and the sub zone pixel electrode are both a slit electrode with a shape like “”, to form eight domains to display. Two many thin film transistors (TFT) would cause the aperture ratio of the pixel decreasing, and a difference may generate between the voltage of the main zone and the voltage of the sub zone as adopting the charge sharing technology, the difference may further increase the difficulty of controlling the balance of the best common voltages (best Vcom) of the main zone and the sub zone. With the increasing of the quantity of TFT and the multi-domain, much more space is occupied. In order to effectively utilize the design space, the distance between the wires are designed to be much smaller, which may cause the compensation electrode overlapping with the pixel electrode, then common electrode signals may be shielded, thus poor liquid crystal alignment would occur.

SUMMARY

It is therefore one main object of the present disclosure to provide an array substrate, which aims to improve the liquid crystal alignment.

To achieve the above aim, the array substrate provided by the present disclosure includes:

a base plate, a plurality of scan lines and a plurality of data lines all formed on the base plate, the plurality of scan lines insulate and cross with the plurality of data lines to define a plurality of sub-pixels;

each of the sub-pixels includes a main zone and a sub zone, the scan lines are defined between the main zone and the sub zone, the main zone includes a main zone pixel electrode and a main zone common electrode, the sub zone includes a sub zone pixel electrode, a sub zone common electrode, and a compensation electrode, the sub zone common electrode skips the scan lines to electrically connect the main zone common electrode; and

the sub zone common electrode, the compensation electrode, and the sub zone pixel electrode are formed on the base plate in sequence, the compensation electrode insulates with the sub zone common electrode, and electrically connects with the sub zone pixel electrode through a through hole, a projection area of the compensation electrode on the base plate is not larger than a projection area of the sub zone common electrode on the base plate, the projection area of the sub zone common electrode on the base plate at least partially overlaps with a projection area of the sub zone pixel electrode on the base plate, the projection area of the compensation electrode on the base plate is spaced from the projection area of the sub zone pixel electrode on the base plate.

Electively, the sub zone common electrode includes a first common electrode parallel to the data lines and a second common electrode parallel to the scan lines, the first common electrode electrically connects to the second common electrode, the compensation electrode is defined on the second common electrode, and the projection area of the compensation electrode on the base plate is not larger than a projection area of the second common electrode on the base plate.

Electively, when the width of the compensation electrode along an extending direction of the data line gradually decreases,

the width of the first common electrode along an extending direction of the scan line increases; or

the width of the second common electrode along the extending direction of the data line increases, to balance common voltages of the main zone and the sub zone.

Electively, a change amount of an overlapping area of the compensation electrode and the sub zone common electrode is recorded as ΔS1, the vertical distance between the compensation electrode and the sub zone common electrode is recorded as D1, a change amount of an overlapping area of the sub zone pixel electrode and the sub zone common electrode is recorded as ΔS2, the vertical distance between the sub zone pixel electrode and the sub zone common electrode is recorded as D2, ΔS1/D1=ΔS2/D2.

Electively, the compensation electrode and the sub zone pixel electrode have the same voltage, the sub zone common electrode and the main zone common electrode have the same voltage, and the voltage of the main zone pixel electrode is greater than the voltage of the sub zone pixel electrode.

Electively, the array substrate further includes a first thin film transistor, a second thin film transistor, and a third thin film transistor spaced from each other and all defined on the scan line, gate electrodes of the first thin film transistor, the second thin film transistor, and the third thin film transistor all electrically connect to the scan line, source electrodes of the first thin film transistor, the second thin film transistor, and the third thin film transistor all electrically connect to the data line, drain electrodes of the first thin film transistor electrically connect to the main zone pixel electrode, drain electrodes of the second thin film transistor and the third thin film transistor all electrically connect to the compensation electrode.

Electively, the array substrate further includes a first insulating layer defined between the sub zone common electrode and the compensation electrode.

Electively, the array substrate further includes a second insulating layer defined between the compensation electrode and the sub zone pixel electrode, the first insulating layer stacks with the second insulating layer.

The present disclosure further provides a display panel, which includes: an array substrate, a color film substrate facing the array substrate, and a liquid crystal layer located between the array substrate and the color film substrate, the array substrate includes:

a base plate, a plurality of scan lines and a plurality of data lines all formed on the base plate, the plurality of scan lines insulate and cross with the plurality of data lines to define a plurality of sub-pixels;

each of the sub-pixels includes a main zone and a sub zone, the scan lines are defined between the main zone and the sub zone, the main zone includes a main zone pixel electrode and a main zone common electrode, the sub zone includes a sub zone pixel electrode, a sub zone common electrode, and a compensation electrode, the sub zone common electrode skips the scan lines to electrically connect the main zone common electrode; and

the sub zone common electrode, the compensation electrode, and the sub zone pixel electrode are formed on the base plate in sequence, the compensation electrode insulates with the sub zone common electrode, and electrically connects with the sub zone pixel electrode through a through hole, a projection area of the compensation electrode on the base plate is not larger than a projection area of the sub zone common electrode on the base plate, the projection area of the sub zone common electrode on the base plate at least partially overlaps with a projection area of the sub zone pixel electrode on the base plate, the projection area of the compensation electrode on the base plate is spaced from the projection area of the sub zone pixel electrode on the base plate.

The present disclosure further provides a display device, which includes display device, the display device includes a display panel, which includes an array substrate, a color film substrate facing the array substrate, and a liquid crystal layer located between the array substrate and the color film substrate, the array substrate includes:

a base plate, a plurality of scan lines and a plurality of data lines all formed on the base plate, the plurality of scan lines insulate and cross with the plurality of data lines to define a plurality of sub-pixels;

each of the sub-pixels includes a main zone and a sub zone, the scan lines are defined between the main zone and the sub zone, the main zone includes a main zone pixel electrode and a main zone common electrode, the sub zone includes a sub zone pixel electrode, a sub zone common electrode, and a compensation electrode, the sub zone common electrode skips the scan lines to electrically connect the main zone common electrode; and

the sub zone common electrode, the compensation electrode, and the sub zone pixel electrode are formed on the base plate in sequence, the compensation electrode insulates with the sub zone common electrode, and electrically connects with the sub zone pixel electrode through a through hole, a projection area of the compensation electrode on the base plate is not larger than a projection area of the sub zone common electrode on the base plate, the projection area of the sub zone common electrode on the base plate at least partially overlaps with a projection area of the sub zone pixel electrode on the base plate, the projection area of the compensation electrode on the base plate is spaced from the projection area of the sub zone pixel electrode on the base plate.

For the array substrate in the present disclosure, the sub zone common electrode, the compensation electrode, and the sub zone pixel electrode are formed on the base plate in sequence, the compensation electrode insulates with the sub zone common electrode, and electrically connects with the sub zone pixel electrode through a through hole, the projection area of the compensation electrode on the base plate is not larger than the projection area of the sub zone common electrode on the base plate, the projection area of the sub zone common electrode on the base plate at least partially overlaps with a projection area of the sub zone pixel electrode on the base plate, the projection area of the compensation electrode on the base plate spaces from the projection area of the sub zone pixel electrode on the base plate, thus the compensation electrode would not shield the sub zone common electrode, and the rotating of the liquid crystals would also not be affected, the alignment of liquid crystals is improved.

Labels illustration for drawings:

The realization of the aim, functional characteristics, advantages of the present disclosure are further described specifically with reference to the accompanying drawings and embodiments.

DETAILED DESCRIPTION

The technical solutions of the embodiments of the present disclosure will be clearly and completely described in the following with reference to the accompanying drawings. It is obvious that the embodiments to be described are only a part rather than all of the embodiments of the present disclosure. All other embodiments obtained by persons skilled in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

It is to be understood that, all of the directional instructions in the exemplary embodiments of the present disclosure (such as top, down, left, right, front, back) can only be used for explaining relative position relations, moving condition of the elements under a special form (referring to figures), and so on, if the special form changes, the directional instructions changes accordingly.

In addition, the descriptions, such as the “first”, the “second” in the present disclosure, can only be used for describing the aim of description, and cannot be understood as indicating or suggesting relative importance or impliedly indicating the number of the indicated technical character. Therefore, the character indicated by the “first”, the “second” can express or impliedly include at least one character. In addition, the technical proposal of each exemplary embodiment can be combined with each other, however the technical proposal must base on that the ordinary skill in that art can realize the technical proposal, when the combination of the technical proposals occurs contradiction or cannot realize, it should consider that the combination of the technical proposals does not existed, and is not contained in the protection scope required by the present disclosure.

Referring toFIGS. 1-3, in the exemplary embodiment of the present disclosure, the array substrate100includes: a base plate10, a plurality of scan lines20and a plurality of data lines30all formed on the base plate10, the plurality of scan lines20insulate and cross with the plurality of data lines30to define a plurality of sub-pixels40.

Each of the sub-pixels40includes a main zone41and a sub zone42, the scan lines20are defined between the main zone41and the sub zone42, the main zone41includes a main zone pixel electrode411and a main zone common electrode412, the sub zone32includes a sub zone pixel electrode421, a sub zone common electrode422, and a compensation electrode423, the sub zone common electrode422skips the scan lines20to electrically connect the main zone common electrode412.

The sub zone common electrode422, the compensation electrode423, and the sub zone pixel electrode421are formed on the base plate10in sequence, the compensation electrode423insulates with the sub zone common electrode422, and electrically connects with the sub zone pixel electrode421through a through hole, a projection area of the compensation electrode423on the base plate10is not larger than a projection area of the sub zone common electrode422on the base plate10, the projection area of the sub zone common electrode422on the base plate10at least partially overlaps with a projection area of the sub zone pixel electrode421on the base plate10, the projection area of the compensation electrode423on the base plate10spaces from the projection area of the sub zone pixel electrode421on the base plate10.

In detail, the base plate10is a transparent substrate, such as, a glass substrate, or a quartz substrate, etc. The scan line20and the data line30are both made of conducting material, for example, aluminum alloy, or chromium metal, etc. The array substrate100includes a plurality of sub-pixels40arranged in matrix. The plurality of scan lines20insulate and cross with the plurality of data lines30to define the plurality of sub-pixels40, the scan lines20are perpendicular to the data lines30, and the plurality of scan lines20are parallel to each other and spaced from each other, the plurality of data lines30are parallel to each other and spaced from each other, two adjacent data lines30and two adjacent scan lines20cooperatively defines one sub-pixel40.

The sub-pixel40includes a main zone41and a sub zone42, the scan lines20are defined between the main zone41and the sub zone42, the main zone41includes a main zone pixel electrode411and a main zone common electrode412, the sub zone32includes a sub zone pixel electrode421, a sub zone common electrode422, and a compensation electrode423, the sub zone common electrode422skips the scan lines20to electrically connect the main zone common electrode412. The array substrate100defines the compensation electrode423, which electrically connects with the sub zone pixel electrode421and insulates with the sub zone common electrode422, in the sub zone42of each sub-pixel40, and the projection area of the compensation electrode423on the base plate10does not overlap with the projection area of the sub zone pixel electrode421on the base plate10, such the sub zone common electrode422and the sub zone pixel electrode421can generate a horizontal electric field that affects the liquid crystal molecules, therefore the storage capacitance between the sub zone pixel electrode421and the sub zone common electrode422is compensated, furthermore, the problems of flicker, interference, and ghost shadow occurred in the display panel100, which are caused by a small storage capacitance between the sub zone pixel electrode421and the sub zone common electrode422, can be avoided.

In detail, the voltage Vftis generated due to the capacitance coupling effect (Feedthrough effect),

Vf⁢⁢t=cgs(cst+clc+cpd+cgt)*(vgh-vgl)(formula⁢⁢1)
(Vftaffect the charging effect of the pixel electrode, smaller value of Vftequates to better performance), Cgsis the capacitance generated by the scan line20and the source electrode of the thin film transistor, Clcis the liquid crystal capacitance, Cpd is the capacitance generated between the pixel electrode and the data line, Vghand Vglare the highest voltage and the lowest voltage of the scan signal of the scan line20respectively. The formula 1 shows that, the larger Cgs, the higher the voltage of the capacitance coupling effect, which is not good for charging the corresponding pixel electrode.

In the exemplary embodiment, the array substrate100further includes a first thin film transistor431, a second thin film transistor432, and a third thin film transistor433spaced from each other and all defined on the scan line20, gate electrodes of the first thin film transistor431, the second thin film transistor432, and the third thin film transistor433all electrically connect to the scan line20, source electrodes of the first thin film transistor431, the second thin film transistor432, and the third thin film transistor433all electrically connect to the data line30, the drain electrode of the first thin film transistor431connects to the main zone pixel electrode411, the drain electrodes of the second thin film transistor432, and the third thin film transistor433all electrically connect to the compensation electrode423.

The sub zone pixel electrode421includes two drain electrodes which can be the second thin film transistor432and the third thin film transistor433, while the main zone pixel electrode only has one drain electrode which is the first thin film transistor431, therefore, the Cgsvoltage of the sub zone pixel electrode421is twice the Cgsvoltage of the main zone pixel electrode411, such the Vftvoltage of the sub zone pixel electrode421is also twice the Vftvoltage of the main zone pixel electrode411. The formula 1 shows that, the value of Cstin the increased denominator can be used for decreasing Vftvoltage, thus the Vftvoltage of the main zone pixel electrode411may be almost the same with the Vftvoltage of the sub zone pixel electrode421, the difference between the best common voltages (best Vcom) of the main zone pixel electrode411and the sub zone pixel electrode421is reduced, as such the flicker is reduced, and the entail display effect of the display panel1000is improved. Therefore, the compensation electrode423is increased to compensate the structure of the compensation capacitance, the Cstof the sub zone pixel electrode421is increased, the Vftvoltage of the sub zone pixel electrode421is decreased.

As the compensation electrode423has the same signal with the sub zone pixel electrode421, which may seriously affected the liquid crystal alignment of the sub zone pixel electrode421. In order to solve the problem, the projection area of the compensation electrode423on the base plate10is set to be not greater than the projection area of the sun zone pixel electrode422on the base plate10, the projection area of the sub zone common electrode422on the base plate10at least partially overlaps with a projection area of the sub zone pixel electrode421on the base plate10, the projection area of the compensation electrode423on the base plate10spaces from the projection area of the sub zone pixel electrode421on the base plate10, such the signal of the sub zone common electrode422can be used for separating the signal of the compensation electrode423from the signal of the sub zone pixel electrode421, therefore the liquid crystals can be set to rotate correctly.

The sub zone pixel electrode421and the main zone pixel electrode411can both be a translucent electrode or a reflecting electrode. When the sub zone pixel electrode421and the main zone pixel electrode411is the translucent electrode, the sub zone pixel electrode421and the main zone pixel electrode411may both include a transparent conductive layer. For example, the transparent conductive layer may include at least one selected from a group consisting of indium tin oxide (ITO), indium oxide zinc (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), and alumina zinc (AZO). Apart from the transparent conductive layer, the sub zone pixel electrode421and the main zone pixel electrode411may includes a translucent reflecting layer which can improve luminous efficiency. The translucent reflecting layer can be a thin layer (for example, the thin layer has a thickness of several nanometers to dozens of nanometers), and the thin layer may include at least one selected from a group consisting of Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Jr, Cr, Li, Ca, and Yb. The compensation electrode423and the sub zone pixel electrode421can be made of the same material or different materials, the present disclosure does not limit this.

For the array substrate100in the present disclosure, the sub zone common electrode422, the compensation electrode423, and the sub zone pixel electrode421are formed on the base plate10in sequence, the compensation electrode423insulates with the sub zone common electrode422, and electrically connects with the sub zone pixel electrode421through a through hole, the projection area of the compensation electrode423on the base plate is not more than the projection area of the sub zone common electrode422on the base plate10, the projection area of the sub zone common electrode422on the base plate10at least partially overlaps with a projection area of the sub zone pixel electrode421on the base plate10, the projection area of the compensation electrode423on the base plate10spaces from the projection area of the sub zone pixel electrode421on the base plate10, thus the compensation electrode423would not shield the sub zone common electrode422, and the rotating of the liquid crystals would also not be affected, the alignment of liquid crystals is improved.

Referring toFIG. 1, the sub zone common electrode422includes a first common electrode422aparalleled to the data lines30and a second common electrode422bparalleled to the scan lines20, the first common electrode422aelectrically connects to the second common electrode422b, the compensation electrode423is defined on the second common electrode422b, and the projection area of the compensation electrode423on the base plate10is not more than a projection area of the second common electrode422bon the base plate10.

In the exemplary embodiment, in the region of the sub zone42of each sub-pixel40, the part of the sub zone pixel electrode421located in the photic area does not overlap with the compensation electrode423and the sub zone common electrode422. The shading area is defined as an area defined on the array substrate100and covered by the black matrix, the shading area mainly includes routing of metal and components which are opaque to light, while the photic area is the other area other than the shading area. The photic area is an effective display area of the display panel. The sub zone common electrode422includes a first common electrode422aparalleled to the data lines30and a second common electrode422bparalleled to the scan lines20, the first common electrode422a, the second common electrode422b, and the sub zone pixel electrode421cooperatively form a storage capacitor, the second common electrode422bis defined at the lower edge of the sub zone pixel electrode421, the second common electrode422bis larger than the first common electrode422ain area. The compensation electrode423is defined on the second common electrode422b, and the compensation electrode423insulates with the second common electrode422b, the projection area of the compensation electrode423on the base plate10is not greater than the projection area of the second common electrode422bon the base plate10, to reduce the capacitance coupling effect between the main zone and the sub zone.

Furthermore, when the width of the compensation electrode423gradually decreases along the extending direction of the data line30.

The width of the first common electrode422agradually increases along the extending direction of the scan line20.

Or, the width of the second common electrode422bgradually increases along the extending direction of the data line30to balance the common voltages of the main zone41and the sub zone42.

In the exemplary embodiment, before modified, as the projection area of the compensation electrode423on the base plate10overlaps with the projection area of the sub zone pixel electrode421on the base plate10, the compensation electrode423would shield the electrical field of the sub zone common electrode422, to affect the rotation of the liquid crystal, therefore, the present disclosure reduces the area of the compensation electrode423, the electrode signal of the sub zone common electrode422is exposed, such the liquid crystal can rotate normally. And the reduced Cstis compensated by increasing an overlapping area of the sub zone common electrode422and the sub zone pixel electrode421.

In detail, as the projection area of the compensation electrode423on the base plate10is not greater than the projection area of the second common electrode422bon the base plate10, such the storage capacitance of the sub zone pixel electrode421decreases, in order to further decrease the Vft, and balance the common voltage between the main zone41and the sub zone42, the overlapping area of the sub zone pixel electrode421and the sub zone common electrode422. There are two implementation methods, the first method is that the width of the first common electrode422ais set to gradually increase along the extending direction of the scan line20, that is, the overlapping area of the shield area of the sub zone pixel electrode421and the first common electrode422ais increased; the second method is that the width of the second common electrode422bis set to gradually increase along the extending direction of the data line30, that is, the overlapping area of the shield area of the sub zone pixel electrode421and the second common electrode422b, such the reduced storage capacitance of the sub zone pixel electrode421is compensated. In the exemplary embodiment, it is prefer to adopt the first method, as it is easier to implement the first method.

Furthermore, a change amount of an overlapping area of the compensation electrode and the sub zone common electrode is recorded as ΔS1, the vertical distance between the compensation electrode and the sub zone common electrode is recorded as D1, a change amount of an overlapping area of the sub zone pixel electrode and the sub zone common electrode is recorded as ΔS2, the vertical distance between the sub zone pixel electrode and the sub zone common electrode is recorded as D2, ΔS1/D1=ΔS2/D2.

In the exemplary embodiment, before decreasing the overlapping area of the compensation electrode423and the sub zone common electrode422, the capacitance between the compensation electrode423and the sub zone common electrode422can be that:

C⁢⁢1=ɛ0⁢ɛr⁢S⁢⁢1D⁢⁢1,
S1 is the overlapping area of the compensation electrode423and the sub zone common electrode422, D1 is the vertical distance between the compensation electrode423and the sub zone common electrode422, ε0is a vacuum dielectric constant, εris a medium relative dielectric constant between the compensation electrode423and the sub zone common electrode422, after the area of the compensation electrode423is reduced, the capacitance between the compensation423and the sub zone common electrode422can be

C⁢⁢1′=ɛ0⁢ɛr⁢S⁢⁢1′D⁢⁢1,
S1′ is the overlapping area of the compensation423and the sub zone common electrode422after the area of the compensation electrode423is reduced, the change amount of the capacitance is ΔC1=C1−C1′, the change amount of the overlapping area of the compensation423and the sub zone common electrode422is that: ΔS1=S1−S1′.

Before reducing the overlapping area of the compensation423and the sub zone common electrode422, the capacitance between the sub zone pixel electrode421and the sub zone common electrode422can be that:

C⁢⁢2=ɛ0⁢ɛr′⁢S⁢⁢2D⁢⁢2,
S2 is defined as the overlapping area of the sub zone pixel electrode421and the sub zone common electrode422, D2 vertical distance between the sub zone pixel electrode421and the sub zone common electrode422, ε0is a vacuum dielectric constant, εris a medium relative dielectric constant between the sub zone pixel electrode421and the sub zone common electrode422, as the insulating material between the compensation423and the sub zone common electrode422is the same as the insulating material between the sub zone pixel electrode421and the sub zone common electrode422, thus εris almost the same with εr′. After the area of the compensation electrode423is reduced and the overlapping area of the sub zone pixel electrode421and the sub zone common electrode422is increased, the capacitance between the sub zone pixel electrode421and the sub zone common electrode422can be

C⁢⁢2′=ɛ0⁢ɛr′⁢⁢S⁢⁢2′D⁢⁢2,
S2′ is the overlapping area of the sub zone pixel electrode421and the sub zone common electrode422after the area of the sub zone common electrode422is increased, the change amount of the capacitance is ΔC2=C2−C2′, the change amount of the overlapping area of the sub zone pixel electrode421and the sub zone common electrode422is that: ΔS2=S2−S2′. As ΔC1=ΔC2, so that ΔS1/D1=ΔS2/D2.

Furthermore, the compensation electrode423and the sub zone pixel electrode421have the same voltage, and the sub zone common electrode422and the main zone common electrode412have the same voltage, the voltage if the main zone pixel voltage411is larger than the voltage of the sub zone pixel electrode421.

In the exemplary embodiment, the compensation electrode423and the sub zone pixel electrode421have the same voltage, and the sub zone common electrode422and the main zone common electrode412have the same voltage, the voltage if the main zone pixel voltage411is larger than the voltage of the sub zone pixel electrode421. The voltage of the main zone41mainly includes the voltage generated by the main zone pixel voltage411, the voltage of the sub zone42mainly includes the voltages generated by the compensation electrode423and the sub zone pixel electrode421. The voltage of the main zone41is set to be different from the voltage of the sub zone42to enlarge the view angle.

Referring toFIGS. 2-3, the array substrate100further includes a first insulating layer50between the sub zone common electrode422and the compensation electrode423.

In the exemplary embodiment, the array substrate100further includes the first insulating layer50between the sub zone common electrode422and the compensation electrode423, the first insulating layer50is configured to insulate with the sub zone common electrode422and the compensation electrode423, the first insulating layer50can be a gate insulating layer.

Referring toFIGS. 2-3, the array substrate100further includes a second insulating layer60defined between the compensation electrode423and the sub zone pixel electrode421, the first insulating layer50stacks with the second insulating layer60.

In the exemplary embodiment, the array substrate100further includes the second insulating layer60defined between the compensation electrode423and the sub zone pixel electrode421, the first insulating layer50stacks with the second insulating layer60, the second insulating layer60is configured to make the compensation electrode423to insulate with the sub zone pixel electrode421, and the compensation electrode423is electrically connected with the sub zone pixel electrode421through the through hole, the second insulating layer70is an insulating layer made of polyvinyl chloride. The insulating layer made of polyvinyl chloride has the properties of anti-violent ability, low temperature flexible, thicker, and flame resistance.

The present disclosure also provides a display panel1000, the display panel1000includes an array substrate. The detail structure of the array substrate1000can be referred to the foregoing exemplary embodiments. As the display panel1000adopts all the technical proposals of the above exemplary embodiments, the display panel at least has all of the beneficial effects of the technical proposals of the above exemplary embodiments, no need to repeat again.

A display panel1000includes an array substrate100, a color film substrate200facing the array substrate100, and a liquid crystal layer300located between the array substrate100and the color film substrate200. The liquid crystal layer300can adopt positive liquid crystals, such as, MJ121791. The liquid crystal layer300can also adopt negative liquid crystals, such as, MJ131496.

The present disclosure also provides a display device, the display device includes a display panel1000. The detail structure of the display panel1000can be referred to the foregoing exemplary embodiments. As the display device adopts all the technical proposals of the above exemplary embodiments, the display device at least has all of the beneficial effects of the technical proposals of the above exemplary embodiments, no need to repeat again.

The foregoing description merely depicts some embodiments of the present application and therefore is not intended to limit the scope of the application. An equivalent structural or flow changes made by using the content of the specification and drawings of the present application, or any direct or indirect applications of the disclosure on any other related fields shall all fall in the scope of the application.