Methods of forming a masking pattern for integrated circuits

In some embodiments, methods for forming a masking pattern for an integrated circuit are disclosed. In one embodiment, mandrels defining a first pattern are formed in a first masking layer over a target layer. A second masking layer is deposited to at least partially fill spaces of the first pattern. Sacrificial structures are formed between the mandrels and the second masking layer. After depositing the second masking layer and forming the sacrificial structures, the sacrificial structures are removed to define gaps between the mandrels and the second masking layer, thereby defining a second pattern. The second pattern includes at least parts of the mandrels and intervening mask features alternating with the mandrels. The second pattern may be transferred into the target layer. In some embodiments, the method allows the formation of features having a high density and a small pitch while also allowing the formation of features having various shapes and sizes.

BACKGROUND

1. Field of the Invention

This invention relates generally to integrated circuit fabrication and, more particularly, to masking techniques.

2. Description of the Related Art

As a consequence of many factors, including demand for increased portability, computing power, memory capacity and energy efficiency, integrated circuits are continuously being made more dense. The sizes of the constituent features that form the integrated circuits, e.g., electrical devices and interconnect lines, are constantly being decreased to facilitate this scaling.

The trend of decreasing feature size is evident, for example, in memory circuits or devices such as dynamic random access memories (DRAMs), flash memory, static random access memories (SRAMs), ferroelectric (FE) memories, etc. To take one example, DRAM typically comprises millions of identical circuit elements, known as memory cells. In general, a capacitor-based memory cell, such as in conventional DRAM, typically consists of two electrical devices: a storage capacitor and an access field effect transistor. Each memory cell is an addressable location that can store one bit (binary digit) of data. A bit can be written to a cell through the transistor and can be read by sensing charge in the capacitor. Some memory technologies employ elements that can act as both a storage device and a switch (e.g., dendritic memory employing silver-doped chalcogenide glass) and some nonvolatile memories do not require switches for each cell (e.g., magnetoresistive RAM). In addition, in some technologies, some elements can act as both charge storage and charge sensing devices. For example, this is the case with flash memory, thus, allowing this type of memory to have one of the smallest cell sizes (4F2) of all memory technologies. In general, by decreasing the sizes of the electrical devices that constitute a memory cell and the sizes of the conducting lines that access the memory cells, the memory devices can be made smaller. Additionally, storage capacities can be increased by fitting more memory cells on a given area in the memory devices.

The continual reduction in feature sizes places ever greater demands on the techniques used to form the features. For example, photolithography is commonly used to pattern features, such as conductive lines. The concept of pitch can be used to describe the sizes of these features. Pitch is defined as the distance between an identical point in two neighboring features when the pattern includes repeating features, as in arrays. These features are typically defined by spaces between adjacent features, which spaces are typically filled by a material, such as an insulator. As a result, pitch can be viewed as the sum of the width of a feature and of the width of the space on one side of the feature separating that feature from a neighboring feature. However, due to factors such as optics and light or radiation wavelength, photolithography techniques each have a minimum pitch below which a particular photolithographic technique cannot reliably form features. Thus, the minimum pitch of a photolithographic technique is an obstacle to continued feature size reduction.

“Pitch doubling” or “pitch multiplication” is one method for extending the capabilities of photolithographic techniques beyond their minimum pitch. A pitch multiplication method is illustrated inFIGS. 1A-1Fand described in U.S. Pat. No. 5,328,810, issued to Lowrey et al., the entire disclosure of which is incorporated herein by reference. With reference toFIG. 1A, a pattern of lines10is photolithographically formed in a photoresist layer, which overlies a layer20of an expendable material, which in turn overlies a substrate30. As shown inFIG. 1B, the pattern is then transferred using an etch (for example, an anisotropic etch) to the layer20, thereby forming placeholders, or mandrels,40. The photoresist lines10can be stripped and the mandrels40can be isotropically etched to increase the distance between neighboring mandrels40, as shown inFIG. 1C. A layer50of spacer material is subsequently deposited over the mandrels40, as shown inFIG. 1D. Spacers60, i.e., the material extending or originally formed extending from sidewalls of another material, are then formed on the sides of the mandrels40. The spacer formation is accomplished by preferentially etching the spacer material from the horizontal surfaces70and80in a directional spacer etch, as shown inFIG. 1E. The remaining mandrels40are then removed, leaving behind only the spacers60, which together act as a mask for patterning, as shown inFIG. 1F. Thus, where a given pitch previously included a pattern defining one feature and one space, the same width now includes two features and two spaces, with the spaces defined by, e.g., the spacers60. As a result, the smallest feature size possible with a photolithographic technique is effectively decreased.

While the pitch is actually halved in the example above, this reduction in pitch is conventionally referred to as pitch “doubling,” or, more generally, pitch “multiplication.” Thus, conventionally, “multiplication” of pitch by a certain factor actually involves reducing the pitch by that factor. The conventional terminology is retained herein.

Because a spacer pattern typically follows the outlines of mandrels, pitch multiplication is generally useful for forming regularly spaced linear features, such as conductive interconnect lines in a memory array. However, in addition to features which extend linearly over relatively large distances (e.g., conductive interconnect lines), integrated circuits typically contain features having various shapes and sizes which can be difficult to form by conventional pitch multiplication processes. In addition, the continuing reduction in the sizes of integrated circuits has provided a continuing demand for reductions in the sizes of features.

Accordingly, there is a continuing need for methods of forming features having a small pitch and high density.

DETAILED DESCRIPTION

In the context of this document, the term “integrated circuit (IC) device” refers to a semiconductor device, including, but not limited to, a memory device and a microprocessor. The memory device may be a volatile memory such as a random access memory (RAM) or non-volatile memory such as a read-only memory (ROM). Examples of RAMs include dynamic random access memories (DRAMs) and static random access memories (SRAMs). Examples of ROMs include programmable read-only memories (PROMs), erasable programmable read-only memories (EPROMs), electrically-erasable programmable read-only memories (EEPROMs), and flash memories.

The term “semiconductor substrate” is defined to mean any construction comprising semiconductor materials, including, but not limited to, bulk semiconductor materials such as a semiconductor wafer (either alone or in integrated assemblies comprising other materials thereon) and semiconductor material layers (either alone or in integrated assemblies comprising other materials). The term “substrate” refers to any supporting substrate, including, but not limited to, the semiconductor substrates described above. Also in the context of this document, the term “layer” encompasses both the singular and the plural unless otherwise indicated. A layer may overlie a portion of, or the entirety of, a substrate.

The term, “features,” as used herein, refers to parts of a pattern, such as lines, spaces, via, pillars, trenches, troughs, or moats. The term, “mandrels,” as used herein, refers to mask features formed at a vertical level. The term, “intervening mask features, as used herein, refers to mask features that are formed between two immediately neighboring mandrels.

The term “array” refers to a regularly repeating pattern of IC elements on a semiconductor substrate. For example, a memory array typically has a number of identical memory cells in a matrix form. Logic arrays may similarly include repeating patterns of conductive lines and/or transistors.

The term, “target layer,” as used herein, refers to a layer in which a pattern of features is formed. A target layer may be part of a semiconductor substrate. A target layer may include metal, semiconductor, and/or insulator.

It will also be appreciated that transferring a pattern from a first (e.g., masking) level to a second level involves forming features in the second level that generally correspond to features on the first level. For example, the path of lines in the second level will generally follow the path of lines on the first level. The location of other features on the second level will correspond to the location of similar features on the first level. The precise shapes and sizes of corresponding features can vary from the first level to the second level, however due, for example, to trim and growth steps. As another example, depending upon etch chemistries and conditions, the sizes of and relative spacings between the features forming the transferred pattern can be enlarged or diminished relative to the pattern on the first level, while still resembling the same initial “pattern.”

While “processing” through masks is described for some embodiments as etching to transfer a hard mask pattern into a target layer, the skilled artisan will appreciate that processing in other embodiments can comprise, e.g., oxidation, nitridation, selective deposition, doping, etc. through the masks.

In some embodiments, methods are provided for forming a masking pattern for an electronic device, such as an integrated circuit. First, mandrels defining a first pattern are formed in a first masking layer provided over a target layer. As nonlimiting examples, the mandrels may be formed of a resist, a hard mask material, or part of a substrate. A second masking layer is deposited in spaces between the mandrels. The second masking layer at least partly fills the spaces between the mandrels. In some embodiments, the second masking layer may bury the first pattern.

Before or after depositing the second masking layer, one or more sacrificial structures are formed to define a second pattern having a smaller pitch than the first pattern. In some embodiments, the one or more sacrificial structures may be formed by altering, e.g., chemically altering, portions of either or both of the mandrels and the second masking layer. In other embodiments, the one or more sacrificial structures may be formed by growing or depositing a layer of a material that is different, or selectively etchable relative to, those of the first and second masking layers before depositing the second masking layer. The resulting intermediate masking structures according to some embodiments are shown inFIGS. 2A and 2B.

InFIG. 2A, an intermediate masking structure200A includes mandrels130, a second masking layer140, and sacrificial structures150that are formed on a target layer110. The mandrels130are spaced apart. The sacrificial structures150are formed on top and side surfaces130a,130bof the mandrels130. The second masking layer140fills the remainder of the spaces between the mandrels130.

Referring toFIG. 2B, another intermediate masking structure200B includes mandrels130, a second masking layer140, sacrificial structures150, and partial gap fillers155formed on a target layer110. The mandrels130are spaced apart from one another on the target layer110. The sacrificial structures150are conformally formed on top and side surfaces130a,130bof the mandrels130. The partial gap fillers155are formed of the same material as the material of the sacrificial structures. The partial gap fillers155are formed on top surfaces112of the target layer110between the mandrels130covered with the sacrificial structures150. In some embodiments, the partial gap fillers155may be formed simultaneously with the sacrificial structures150. The second masking layer140fills the remaining spaces between the mandrels130.

The sacrificial structures150are removed to create gaps between the mandrels130and the second masking layer140. Such sacrificial structures are referred to as “anti-spacers” in the context of this document. The resulting masking structure may include the mandrels130and intervening mask features formed of the second masking layer140(FIG. 2A). Alternatively, the resulting masking structure may include the mandrels130and intervening mask features including the second masking layer140and the partial gap fillers (FIG. 2B). In some embodiments, the mandrels130and the intervening mask features alternate with each other, and together define a second pattern.

In some embodiments, the mandrels in the second pattern have a first pitch between two adjacent mandrels. The intervening mask features in the second pattern have a pitch substantially the same as the first pitch. The mandrels and intervening mask features are both used as masking features for the second pattern. The second pattern has a second pitch defined by the mandrels and an immediately adjacent one of the intervening mask features. The second pitch is about a half of the first pitch. Thus, the foregoing process and features provide pitch doubling, that is, the second pattern has a pitch that is half of the pitch of the first pattern. In other embodiments, the pitch of the second pattern may be further reduced by performing an additional process employing anti-spacers as described herein, or by blanket depositing and etching spacer material to form spacers on sidewalls of the mandrels and intervening mask features.

The methods described herein can be used for forming three dimensional structures in a target layer. The three dimensional structures include, but are not limited to, lines, trenches, vias, posts, pillars, troughs, moats, and two or more of the foregoing. In addition, the methods can form structures having different sizes and shapes, for example, variable width conductive lines and landing pads.

The methods discussed above and described below in the context of certain embodiments allow decreases in pitch and increases in the density of features. In addition, the methods allow forming features having various shapes and sizes with a low number of patterning steps.

With reference again toFIGS. 2A and 2B, various processes can be adapted for forming the mandrels130, the second masking layer140, the sacrificial structures150, and/or partial gap fillers155. Examples of such processes include, but are not limited to, those listed in Table 1.

The processes and materials of Tables 1 and 2 will be understood by those of skill in the art, particularly in view of the present disclosure. In Table 1, the term “single level etch” refers to a process in which a single layer is provided and etched to form features of a pattern. The term “multi level etch” refers to a process in which multiple layers are provided and etched to form features of a pattern. The term “diffusion limited shrink” refers to a process in which a solubility change in a feature is caused by a coat, thereby allowing a decrease in a dimension of the feature. The term “diffusion limited growth” refers to a process in which a material is chemically attached to a pre-existing feature, e.g., through a reaction or adsorption, thereby increasing the dimension of the feature.

The term “freeze” refers to a surface treatment that protects a pattern by maintaining the integrity of the boundaries of the features forming the pattern; for example, freezing a pattern formed by a photoresist to prevent it from dissolving into an overlying photoresist layer. In some instances, a “freeze” process can be performed to change the chemical solubility of a material that is being “frozen.” After the freeze process, the frozen material no longer exhibits solubility to solvents which would otherwise dissolve the material before the freeze process. For example, a photoresist, after being subjected to a freeze process, would be insoluble to solvents, such as propylene glycol monomethyl ether acetate (PGMEA) or ethyl lactate.

The term “reflow” refers to a process inducing a feature size change, a line increase, and a space decrease, for example, a thermal process that is designed for such a feature size shift to occur. The term “deprotection process” refers to a process in which a feature protected from a chemical reaction or dissolution by a solvent is released and allowed to become reactive or soluble. The term “furnace” refers to a process that includes a thermal bake at a temperature ranging typically, but not limited to, from about 250° C. to about 1000° C. The term “solvent development” refers to a process in which an unconventional solvent-based developer (e.g., a solvent other than tetramethylammonium hydroxide (TMAH)) is used to define a pattern.

The term “descum” refers to a process for removing small portions or residues of a material. The term “slim process” refers to a process that induces a feature size change, namely, a size decrease and a space increase. The term “overcoating” refers to a process of depositing or spinning-on a layer over an existing layer. The term “anti-spacer formation” refers to a process of forming anti-spacers, as described herein. The term “selectivity change” refers to an etch process having the ability to differentiate the etch rate of a target material from the etch rate of a non-target material. The term “plating process” refers to an electrochemical process of depositing a metal on an existing layer(s). The term “shrink” refers to a process for reducing a size of a feature. The term “plasma growth” refers to a process designed to add additional material to an existing feature, with assistance of a plasma operation. The term “vapor treatment” refers to a process in which a gas phase material is used to interact with a substrate. The term “silation process” refers to a process of forming a silane compound. The term “phase change” refers to a process in which a substrate undergoes a phase change during the process. The term “solubility change” refers to a process that changes the solubility of a material in a specific solution.

The mandrels130, the second masking layer140, the sacrificial structures150, and/or partial gap fillers155may be formed of various materials. Examples of such materials include, but are not limited to, those listed in Table 2.

In Table 2, the term “specific development chemistry” refers to a chemical or material, such as butyl acetate or other customized solvents for development. The term “underlayer” refers to a layer of material used for a pattern transfer into an underlying layer. The term “reactivity promoter” refers to a chemical agent that promotes the growth of an organic material on a feature. A reactivity promoter may or may not act as a catalyst to a reaction which it promotes. A reactivity promoter may contribute to the attachment of one material to the surface of another material. Thus, it will be appreciated that the various materials of Table 2 may be formed by one or more of the processes of Table 1. Advantageously, the materials can be combined together and possibly with other materials to form masks for defining patterns. This list is for illustrative purposes only, such that the application of the processes noted herein to some embodiments of the invention may be expressed. The list is not intended to be exhaustive, and as such materials and techniques used in the anti-spacer formation are not limited to this list.

For example, in certain embodiments, a method is provided for forming a masking pattern for an electronic device, such as an integrated circuit. First, mandrels defining a first pattern are formed in a first masking layer deposited over a target layer. As nonlimiting examples, the mandrels may be formed of a resist or a hard mask material. A second masking layer is deposited on and over the first masking layer to at least partly bury the first pattern while maintaining the first pattern. The first pattern may be maintained by subjecting the first pattern to a surface treatment using, for example, a so-called freeze technique, prior to depositing the second masking layer.

Portions of the second masking layer proximate to the mandrels are chemically altered such that the portions are more chemically removable (have higher etchability) than unaltered parts of the second masking layer. The chemically altered portions are immediately adjacent the mandrels and have a selected width, and can be referred to as “anti-spacers” in the context of this document. In some embodiments, the chemical alteration can be achieved by a bake that drives an acid- or base-initiated reaction using an acid or base diffused from the mandrels. The anti-spacers may not expand into the mandrels in this embodiment.

In some other embodiments, both portions of the mandrels immediately adjacent to the second masking layer and portions of the second masking layer immediately adjacent to the mandrels may be chemically altered. In such embodiments, the altered portions of both the mandrels and the second masking layer form anti-spacers. In yet other embodiments, portions of the mandrels immediately adjacent to the second masking layer may be chemically altered while substantially no portion of the second masking layer is chemically altered, thereby forming anti-spacers only in the altered portions of the mandrels.

The chemically altered portions are removed, exposing the mandrels. In certain embodiments, an additional step(s) can be performed to remove any material over the chemically altered portions to expose top surfaces of the chemically altered portions before removing the chemically altered portions. The remainder of the second masking layer forms intervening mask features. The mandrels and the intervening mask features together define a second pattern. The second pattern is transferred into the target layer.

Reference will now be made to the Figures, in which like numerals refer to like parts throughout.

FIGS. 3A-3Killustrate a method of forming a masking pattern using anti-spacers in accordance with some embodiments. Referring toFIG. 3A, a hard mask layer120is provided over a target layer110. In addition, a first resist layer230is provided over the hard mask layer120.

The target layer110may be a layer in which various IC components, parts, and structures are to be formed through IC fabrication processes. Examples of the components, parts, and structures include transistors, capacitors, resistors, diodes, conductive lines, electrodes, spacers, trenches, etc. The identity of the target layer material depends on the type of device to be formed in the target layer110. Examples of target layer materials include, but are not limited to, insulators, semiconductors, and metals. The target layer110may be formed over a substrate, for example, a semiconductor substrate in certain embodiments. In certain other embodiments, at least a portion of a semiconductor substrate forms the target layer110.

The hard mask layer120is a layer that provides a pattern to be transferred into the target layer110. As described herein, the hard mask layer120is patterned to form an array of features that serve as a mask for the target layer110, e.g., in an etch step. While illustrated with one hard mask layer, the processes described herein can employ two or more hard mask layers. In certain embodiments, the hard mask layer120may be omitted.

In some embodiments, the hard mask layer120may be formed of an inorganic material. In the illustrated embodiment, the hard mask layer120is formed of a dielectric anti-reflective coating (DARC), for example, silicon-rich silicon oxynitride (SiOxNy). The DARC layer may contain silicon in an amount from about 30 wt % to about 80 wt % with reference to the total weight of the layer. The DARC layer may contain silicon in an amount from 35 wt % to about 70 wt % with reference to the total weight of the layer. In other embodiments, the hard mask layer120may be formed of silicon, silicon oxide (SiO2) or silicon nitride (Si3N4). In yet other embodiments, the hard mask layer120may be formed of an organic material. For example, the hard mask layer120may be formed of amorphous carbon. The skilled artisan will appreciate that various other hard mask materials can be used for the hard mask layer120. In some embodiments, the hard mask layer120may have a thickness of between about 80 nm and about 800 nm, optionally between about 1 μm and about 3 μm.

The first resist layer230may be formed of a first resist material. The first resist material is selected based on the type of lithography used for patterning the first resist layer230. Examples of such lithography include, but are not limited to, ultraviolet (UV) lithography, extreme ultraviolet (EUV) lithography, X-ray lithography and imprint contact lithography. In the illustrated embodiment, the first resist material is a photoresist, such as a positive resist. The skilled artisan will, however, appreciate that the material of the first resist layer230may be varied depending on lithography, availability of selective etch chemistries and IC design.

Optionally, a bottom anti-reflective coating (BARC) layer (not shown) may be provided between the first resist layer230and the hard mask layer120. BARCs, which are typically organic, enhance resolution by preventing reflections of the ultraviolet (UV) radiation that activates the photoresist. BARCs are widely available, and are usually selected based upon the selection of the resist material and the UV wavelength. BARCs, which are typically polymer-based, are usually removed along with the overlying photoresist. The optional BARC layer may have a thickness of between about 200 Å and about 600 Å, optionally between about 300 Å and about 500 Å.

Referring toFIG. 3B, the first resist layer230is exposed to a pattern of light directed through a photomask over the first resist layer230. In the illustrated embodiment, the first resist layer230is formed of a positive photoresist. Exposed portions232of the first resist layer230become soluble in a developer while unexposed portions234of the first resist layer230remain insoluble in the developer. In other embodiments, the first resist layer230may be formed of a negative photoresist. In such embodiments, exposed portions234of the first resist layer230become insoluble in a developer while unexposed portions232of the first resist layer230remain soluble in the developer.

After the exposure to the pattern of light, the first resist layer230is subjected to development using any suitable developer. Examples of developers include, but are not limited to, sodium hydroxide and tetramethylammonium hydroxide (TMAH). In certain embodiments, rinsing solutions (e.g., propylene glycol monomethyl ether acetate (PGMEA) and/or propylene glycol monomethyl ether (PGME)) can also be used for the development. In certain embodiments, a post-exposure bake (PEB) may be performed after the exposure and before the development. In the illustrated embodiment, the exposed portions232of the first resist layer230are removed by the development.

Referring toFIG. 3C, the remaining unexposed portions234of the first resist layer230form mandrels234. The mandrels234provide a first pattern231while exposing surfaces122of the hard mask layer120. The first pattern231has a first pitch P1between two neighboring mandrels234, as shown inFIG. 3B. Each of the mandrels234has a top surface236and a side surface238. The illustrated mandrels234have a substantially rectangular or square cross-section. The skilled artisan will, however, appreciate that the cross-sectional shape of the mandrels234can be different from that illustrated. For example, the cross-sectional slope can be rounded.

Referring toFIG. 3D, a chemically active species, for example, an acid solution, is deposited over the structure shown inFIG. 3C. In one embodiment, the acid solution can be a spin-on coating that covers the mandrels234and the exposed portions122of the hard mask layer120. The acid solution can include an acid such as a conventional photo resist PAG or other organic acid. Subsequently, a bake process is conducted to thermally diffuse the acid into at least portions of the features234that are proximate to the top and side surfaces236,238thereof. In some embodiments, the acid may coat the top and side surfaces236,238of the features234without being diffused into the features234. In other embodiments where the features234are formed of a material containing a selected amount of acid, this step may be omitted. In certain embodiments, a base solution may be deposited over the structure in place of the acid solution.

Referring toFIG. 3E, the mandrels234may be subjected to a surface treatment. The surfaces236,238of the mandrels234are modified such that the integrity of the mandrels234is maintained while a second resist layer is formed and patterned thereon. The surface treatment may form a barrier coat or protective layer236on the surfaces236,238of the mandrels234. Such a surface treatment can be referred to as “freeze” in the context of this document. The surface treatment may or may not change the lateral dimensions of the mandrels234, and may or may not change the spacings between adjacent mandrels234.

The mandrels234can be frozen by various freeze techniques. In one embodiment, the mandrels234can be frozen by chemical freeze, using a commercially available fluid overcoat. An example of a chemical freeze technique is disclosed by JSR corporation of Tokyo, Japan in their present product line.

In another embodiment, the mandrels234can be frozen by a plasma freeze. A plasma freeze can be conducted, using a plasma directed to the mandrels234. Examples of plasmas include a fluorine-containing plasma generated from, e.g., a fluorocarbon (e.g., CF4, C4F6, and/or C4F8), a hydrofluorocarbon (e.g., CH2F2, and/or CHF3), or NF3. An example plasma freeze technique is disclosed by U.S. patent application Ser. No. 12/201,744, filed Aug. 29, 2008, entitled “METHODS OF FORMING A PHOTORESIST-COMPRISING PATTERN ON A SUBSTRATE” (Inventors: Zhang et al.). In yet another embodiment, the mandrels234can be frozen by a thermal freeze. The thermal freeze can be conducted at a temperature between about 110° C. and about 180° C. An example of a thermal freeze technique is disclosed by Tokyo Ohka Kogyo Co., Ltd. of Kawasaki-shi, Kanagawa Prefecture, Japan in their commercially available products.

Referring toFIG. 3F, a second resist layer240is blanket deposited over the mandrels234and the exposed surfaces122of the hard mask layer120. The second resist layer240can have a substantially planar top surface244. The second resist layer240may be formed of a second resist material. The second resist material may be of the same composition as the first resist material or of a different composition from the first resist material. The first and second resist materials may be of the same or different type with regard to being positive or negative photoresist.

In some embodiments, the second resist material may include a chemically amplified photoresist. The chemically amplified photoresist may be an acid-catalyzed or base-catalyzed material. Examples of chemically amplified photoresists include, but are not limited to, 193 nm and 248 nm photo resists. Some I-line materials are also chemically amplified.

In certain embodiments, the second resist material may include a bottom anti-reflective coating (BARC) material modified to be suitable for a solubility change by acid or base diffusion. The skilled artisan will appreciate that any material showing a solubility change caused by the acid or base diffusion can be used in place of the second resist material.

The second resist layer240may be formed to have a thickness sufficient to cover the top surface236of the mandrels234. Portions242of the second resist layer240overlying the top surfaces236of the mandrels234can be referred to as “top coat” in the context of this document. The top coats242may have a thickness selected such that all the resulting masking features have substantially the same height after the frozen mandrels234and other features that will be formed from portions of the second resist layer240are subjected to development. The resulting masking features will form a pattern to be transferred into the underlying target layer110.

Referring toFIG. 3G, the structure ofFIG. 3Fis subjected to a bake. In one embodiment, the bake may be conducted at a temperature of about 110° C. to about 220° C. for about 0.5 min. to about 3 min. In another embodiment, the bake may be conducted at a temperature of about 110° C. to about 160° C. In embodiments where the second resist layer240is formed of an acid-catalyzed chemically amplified resist, the bake drives an acid-catalyzed reaction that alters the solubility of the second resist layer240in a developer. The acid-catalyzed reaction changes portions250of the second resist layer240that are proximate to the mandrels234, causing those changed portions to become soluble in the developer. The portions250of the second resist layer240may include the top coats242of the second resist layer240and portions244adjoining the side surfaces238of the mandrels234. The portions250that become soluble can be referred to as “anti-spacers.”

The acid-catalyzed reaction is initiated at or near the top and side surfaces236,238of the mandrels234during the bake step. For example, an acid diffused into the mandrels234during the step ofFIG. 3Dnow diffuses into the top coats242and the adjoining portions244of the second resist layer240(as indicated by arrows inFIG. 3G), and changes the solubility of the portions242,244, thereby forming anti-spacers250around and on top of the mandrels234. The width WI of the anti-spacers250can be controlled by changing, for example, the bake time and/or temperature, the porosity of layer240, and the size of acid species.

In other embodiments where the second resist layer240is formed of a base-catalyzed chemically amplified resist, the bake drives a base-catalyzed reaction that may alter the solubility of the second resist layer240in a developer. In such an embodiment, a base solution is provided in the step ofFIG. 3D, rather than an acid solution. The skilled artisan will appreciate that anti-spacers can be formed in the same manner as in the embodiment described herein in connection withFIG. 3G.

In certain embodiments, other portions (not shown) of the second resist layer240may be optionally exposed to a pattern of light before or after the bake step. This exposure step can be used to form patterns in the other areas by photolithography, rather than by forming anti-spacers. During this optional exposure step, the structure shown inFIG. 3For3G may be blocked from light, if the structures are formed of a positive photoresist. This optional exposure step can form structures larger in width than the structures shown inFIG. 3H. In certain embodiments, the optional exposure step can be used to form structures in a peripheral region of an IC device or substrate while methods employing anti-spacers can be used to form structures in an array region of the IC device or substrate.

Referring toFIG. 3H, the structure resulting from the step ofFIG. 3Gis subjected to development which serves to selectively remove the anti-spacers250. Any suitable developer may be used to remove the anti-spacers250(FIG. 3G). Examples of developers include, but are not limited to, sodium hydroxide and tetramethylammonium hydroxide (TMAH). In certain embodiments, rinsing solutions (e.g., propylene glycol monomethyl ether acetate (PGMEA) and/or propylene glycol monomethyl ether (PGME)) can also be used for the development. In one embodiment, this development step can be performed at room temperature for about 0.5 min. to about 3 min.

This step exposes the pre-existing mandrels234while defining intervening mask features248formed of the second resist material. The illustrated intervening mask features248have a T-shaped top portion, but the skilled artisan will appreciate that the shape of the intervening mask features248can vary, depending on the conditions (e.g., temperature, duration, etc.) of the development. The mandrels234may have a first height H1and the intervening mask features248may have a second height H2that is greater than the first height H1.

Referring toFIG. 3I, the developer may also anisotropically remove at least part of top portions of the mandrels234and the intervening mask features248. The mandrels234, which have been frozen, may be developed at a slower rate than the intervening mask features248. Thus, after the completion of the development, the mandrels234and the intervening mask features248can have substantially the same height H3as each other if the thicknesses of the top coats242of the second layer240have been selected such that the heights of the mandrels234and the intervening mask features248are substantially the same as each other after the development. As shown inFIG. 3I, both of the mandrels234and the intervening mask features248can have rounded top portions. In certain embodiments, an isotropic etch process may be conducted after the development to reduce the widths of the mandrels234and the intervening mask features248.

The mandrels234and the intervening mask features248together provide a second pattern260, as shown inFIG. 3I. The second pattern260has a second pitch P2between neighboring features. The second pitch P2is about half of the first pitch P1in the illustrated embodiment.

Referring toFIG. 3J, an etch step is conducted to transfer the second pattern260into the underlying hard mask layer120. The second pattern260may be transferred into the hard mask layer120using any suitable etch process. The etch process can be a dry or wet etch process. In one embodiment, the etch process can be a plasma etch process, for example, a high density plasma etch process. The plasma etch process may be an anisotropic etch process.

Referring toFIG. 3K, the target layer110is etched through the hard mask layer120. As a result, trenches or troughs205are formed in the target layer110. In some embodiments, through-holes can be formed through the target layer110.

In certain embodiments, an etch stop layer (not pictured) can be used between the hard mask layer120and the target layer110. The etch stop can be made of, for example, DARC or silicon nitride, depending upon the composition of the target layer110. The etch stop avoids damage to the target layer110during the etching of the hard mask layer120, such as during pattern transfer to the hard mask layer120or during removal of the hard mask layer120. This may be particularly desirable when the target layer110is a metal, such as a metallization layer.

When processing (e.g., etching) of the target layer is completed, the hard mask layer120and the overlying features234,248may be removed by etch processes, such as a wet etch. Subsequently, additional steps such as metallizations may be conducted to form integrated circuits.

FIGS. 4A-4Hillustrate a method of forming a masking pattern using anti-spacers in accordance with other embodiments. In these embodiments, the mandrels are formed from a hard mask layer or other material other than a photoresist layer. Referring toFIG. 4A, the method includes providing the target layer110. Details of the target layer110can be as described above in connection withFIG. 3A.

A hard mask layer is formed over the target layer110. In some embodiments, the hard mask layer may be formed of a silicon-containing organic material. The silicon-containing organic layer may contain silicon in an amount from about 10 wt % to about 35 wt % with reference to the total weight of the layer. An example of a silicon-containing organic materials includes, but is not limited to, SHB-A629 (available from Shin Etsu, Tokyo, Japan). In such an embodiment, the hard mask layer may have a thickness of between about 40 nm and about 800 nm, optionally between about 1 μm and about 3 μm.

The hard mask layer is then patterned to form mandrels330, as shown inFIG. 4A. The hard mask layer can be patterned using any suitable process, including, but not limited to, a photolithographic process in which photoresist is patterned and the pattern is transferred to the hard mask layer. The mandrels330are spaced apart from one another and have a first pitch P1and expose surfaces112of the target layer110.

Referring toFIG. 4B, a chemically active species, for example, an acid solution, is deposited on the structure shown inFIG. 4A. In one embodiment, the acid solution can be spin-on deposited on the structure to cover the mandrels330and the exposed surfaces112of the target layer110. The acid solution can include any organic acid, such as a PAG. Subsequently, a bake process is conducted to thermally diffuse the acid into at least portions of the mandrels330proximate to the top and side surfaces332,334of the mandrels330. In this embodiment, the mandrels330are at least partially permeable to the acid while the target layer110is substantially impermeable to the acid. Thus, the mandrels330can have an acid coat336on the surfaces332,334thereof while the exposed portions112of the target layer110do not have an acid coat formed thereon, as shown inFIG. 4C. In other embodiments, the chemically active species may be in the form of a gas or may be in the solid state.

Referring toFIG. 4D, a resist layer340is formed over the mandrels330and the exposed portions112of the target layer110and may have a substantially planar top surface344. The resist layer340may be formed of a resist material that is the same as the second resist material described above in connection withFIG. 3F. In one embodiment, the resist material may include a chemically amplified resist. The chemically amplified resist may be either acid-catalyzed or base-catalyzed. In other embodiments where the resist material is a base-catalyzed resist, a base coat (rather than an acid coat) is provided over the mandrels330and the exposed portions112of the target layer110in the step ofFIG. 4C. Other details of forming the resist layer340can be as described above in connection withFIG. 3F.

Referring toFIG. 4E, the structure resulting from the step ofFIG. 4Dis subjected to a bake. The bake forms anti-spacers350at the sides and on top of the mandrels330. Other details of the bake step can be as described in connection withFIG. 3G.

In certain embodiments, other portions (not shown) of the resist layer340may be optionally exposed to a pattern of light before or after the bake step ofFIG. 4E. This exposure step can be used to form patterns in the other portions by photolithography, rather than by forming anti-spacers. During this optional exposure step, the structure shown inFIG. 4Emay be blocked from light, if the structures are formed of a positive photoresist. This optional exposure step can form structures larger in width than the structures shown inFIG. 4F. In certain embodiments, the optional exposure step can be used form structures in a peripheral region of an IC device or substrate while methods employing anti-spacers can be used to form structures in an array region of the IC device or substrate.

Referring toFIG. 4F, the structure resulting from the step ofFIG. 4Eis subjected to development to remove the anti-spacers350. This step exposes the pre-existing mandrels330formed of the hard mask material while forming intervening mask features345formed of the resist material. The illustrated intervening mask features345have a T-shaped top portion, but the skilled artisan will appreciate that the shape of the intervening mask features345can vary, depending on the conditions (e.g., temperature, duration, etc.) of the development. The mandrels330may have a first height H1and the intervening mask features345have a second height H2that is greater than the first height H1.

The developer can also remove at least part of the top portions of the intervening mask features345. However, the mandrels330, which are formed of a hard mask material, may not be eroded by the developer. Thus, after the completion of the development, the mandrels330and the intervening mask features345may have substantially the same height H3as each other. As shown inFIG. 4G, the mandrels330may retain their original shape while the intervening mask features345may have rounded top portions.

The mandrels330and the intervening mask features345together provide a second pattern360, as shown inFIG. 4G. The second pattern360has a second pitch P2between a mandrel330and a neighboring intervening mask feature345. The second pitch P2is about half of the first pitch P1in the illustrated embodiment.

Referring toFIG. 4H, an etch step is conducted to transfer the second pattern360into the target layer110. The second pattern360may be transferred into the target layer110using any suitable etch process. The etch process can be a dry or wet etch process. In one embodiment, the etch process can be a plasma etch process, optionally a high density plasma etch process. The plasma etch process may be an anisotropic etch process. Other details of this step can be as described above in connection withFIG. 3K.

In the illustrated embodiment, trenches or troughs305(or through-holes in other embodiments) are formed in the target layer110. Because the mandrels330(formed of a hard mask material) may be etched at a faster rate than the intervening mask features345(formed of a photoresist) during the transfer step ofFIG. 4H, the height H4of the remaining mandrels330may be greater than the height H5of the remaining intervening mask features345after the completion of the transfer step.

When processing (e.g., etching) of the target layer110is completed, the mandrels330and the intervening mask features345may be removed by known etch processes, such as a wet etch step. Subsequently, additional steps such as metallization may be conducted to complete integrated circuits.

FIGS. 5A-5Dillustrate a method of forming a masking pattern using anti-spacers in accordance with yet other embodiments. Referring toFIG. 5A, the method includes providing the target layer110. Details of the target layer110can be as described above in connection withFIG. 3A. Hard mask layer120is formed on the target layer110. Details of the hard mask layer120can be as described above in connection withFIG. 3A. In certain embodiments, the hard mask layer120may be omitted.

Then, mandrels430are formed of a photoresist material on the hard mask layer120. Details of forming the mandrels430can be as described above in connection withFIGS. 3A-3C. The mandrels430provide a first pattern431while exposing surfaces122of the hard mask layer120. The first pattern431has a first pitch P1between two neighboring mandrels430, as shown inFIG. 5A. Each of the mandrels430has a top surface436and a side surface438. The illustrated mandrels430have a substantially rectangular or square cross-section. The skilled artisan will, however, appreciate that the cross-sectional shape of the mandrels430can be different from that illustrated.

Then, a chemically active species432, for example, an acid or base solution, is deposited on the structure shown inFIG. 5A. In some embodiments, the acid or base solution can be spin-on deposited on the structure to cover the mandrels430and the exposed portions122of the hard mask layer120. The details of the acid or base solution can be as described above in connection withFIG. 3D.

Referring toFIG. 5B, the structure ofFIG. 5Ais subjected to a bake. The details of the bake can be as described above in connection withFIG. 3G. The bake drives an acid- or base-catalyzed reaction that alters the solubility of portions452,454of the mandrels430. The acid- or base-catalyzed reaction changes top portions452and side portions454of the mandrels430, causing those changed portions to become soluble in a developer. The top and side portions452,454of the mandrels430form anti-spacers450. Thus, the resulting mandrels430′ have a reduced size both vertically and horizontally. Such mandrels430′ can be referred to as reduced mandrels in the context of this document.

Subsequently, the reduced mandrels430′ covered with the anti-spacers450may be subjected to a surface treatment. Surfaces of the anti-spacers450are modified such that the integrity of the mandrels is maintained while a second resist layer is formed thereon. The details of the surface treatment can be as described above in connection withFIG. 3E.

Referring toFIG. 5C, a second masking layer440is blanket deposited over the anti-spacers450and the exposed surfaces122of the hard mask layer120. In other embodiments, the second masking layer may have a smaller height than the anti-spacers such that the second masking layer surrounds sidewalls of the anti-spacers while exposing top surfaces of the anti-spacers. The second masking layer440may be formed of an image reversal material, such as an Image Reversal Overcoat (IROC) material and other similar materials, e.g., as outlined in US Patent Application Publication No. 2009/0081595 from Shin-Etsu Chemical Co., Ltd (Tokyo, Japan). Bottom Anti-Reflection Coating (BARC) materials can also be used for the second masking layer440. Other details of this step can be as described above in connection withFIG. 3F.

In the illustrated embodiment, the second masking layer440may be formed to have a thickness sufficient to cover the top portions452of the anti-spacers450. Portions of the second masking layer440overlying the top portions452of the anti-spacers450may be referred to as “top coats” in the context of this document.

Referring toFIG. 5D, the structure resulting from the step ofFIG. 5Cis subjected to development. Any suitable developer may be used to remove the anti-spacers450(FIG. 5C). This step exposes the reduced mandrels430′ while defining intervening mask features448formed of the material of the second masking layer440.

The reduced mandrels430′ and the intervening mask features448together provide a second pattern460. The second pattern460has a second pitch P2between a reduced mandrel430′ and a neighboring intervening mask feature448. The second pitch P2is about half of the first pitch P1(FIG. 5A) in the illustrated embodiment. Other details of this step can be as described above in connection withFIG. 3H. The step shown inFIG. 5Dcan be followed by steps as described above in connection withFIGS. 3I to 3Kto transfer the second pattern460into the target layer110.

In some other embodiments, mandrels defining a first pattern are formed in a first masking layer provided over a target layer. One or more sacrificial structures may be formed by conformally growing or depositing a layer to cover at least exposed sidewall surfaces of the mandrels. The layer may be formed of a material that is different from that of the first masking layer.

A second masking layer is deposited to fill spaces defined by the mandrels covered with the sacrificial structures. In some embodiments, the second masking layer may cover top surfaces and sidewalls of the mandrels covered with the sacrificial structures. In such embodiments, an additional step(s), e.g., a descum step, can be performed to remove portions of the second masking layer over the sacrificial structures to expose top surfaces of the sacrificial structures. In other embodiments, the second masking layer may have a smaller height than the anti-spacers such that the second masking layer surrounds sidewalls of the anti-spacers while exposing top surfaces of the anti-spacers. The second masking layer may be formed of a material different from the material of the sacrificial structures.

Then, the sacrificial structures are removed, exposing the mandrels. The remaining parts of the second masking layer form intervening masking features. The mandrels and the intervening mask features together define a second pattern. The second pattern is transferred into the target layer.

FIGS. 6A-6Eillustrate a method of forming a masking pattern by growing anti-spacers. In these embodiments, mandrels may be formed from a hard mask layer or other material other than a photoresist layer, as discussed with reference toFIG. 4A.

Referring toFIG. 6A, the target layer110is provided. Details of the target layer110can be as described above in connection withFIG. 3A. A hard mask layer is formed over the target layer110, and is patterned to form mandrels330, as shown inFIG. 6A. The mandrels330are spaced apart from one another with a first pitch P1while exposing surfaces112of the target layer110. Each of the mandrels330has a top surface332and side surfaces334. Other details of this step can be as described above in connection withFIG. 4A.

Referring toFIG. 6B, a sacrificial material, such as an organic material, is grown on the top and side surfaces332,334of the mandrels330, while exposing substantial portions of the exposed surfaces112of the target layer110. Examples of such organic materials include, but are not limited to, perhydropolysilazane (PHPS) or polyhedral oligomeric silsesquioxanes (POSS). The organic material can be grown by a diffusion limited growth technique. In some embodiments, the reaction temperature may be between about 100° C. and about 180° C., which may be below the glass transition temperature Tg of the original mandrel material. Attachment of the sacrificial material may be catalyzed by another wet treatment or a material that may be present in the chemical formulation of the mandrel. Critical dimensions can then be modulated by controlling reaction temperature in combination with the chemical compositions used in the sacrificial material. The organic material forms anti-spacers650that include top portions652and side portions654covering the top and side surfaces332,334, respectively, of the mandrels330.

Referring toFIG. 6C, a second masking layer640is blanket deposited by, for example, spin-on deposition, over the anti-spacers650and the exposed surfaces112of the target layer110. The second masking layer440may be formed of a silicon hard mask material, such as STH1125B manufactured by Shin-Etsu Chemical Co., Ltd (Tokyo, Japan) or similar commercial hardmask material readily available to those versed in the art. Other details of this step can be as described above in connection withFIG. 5C. In the illustrated embodiment, the second masking layer640may be formed to have a thickness sufficient to slightly cover top portions652of the anti-spacers650. Portions of the second masking layer640overlying the top portions652of the anti-spacers650may be referred to as “top coats” in the context of this document.

Referring toFIG. 6D, the structure resulting from the step ofFIG. 6Cis subjected to a chemical descum process. The chemical descum process serves to remove the top coats of the second masking layer640, thereby exposing the top portions652of the anti-spacers650. As non-limiting examples, the chemical descum may be performed using a wet etch or a plasma etch such as a buffered oxide etch (BOE) dip process or Argon sputter etch. Tetramethylammonium hydroxide (TMAH) developer can also be used to clean up these feature areas at a temperature ranging from about 10° C. to about 50° C.

Referring toFIG. 6E, the structure resulting from the step ofFIG. 6Dis subjected to an etch process to remove the anti-spacers650. Any suitable etchant may be used to remove the anti-spacers650, depending on the organic material. In some embodiments where the organic material is a pure hydrocarbon-based material, the etchant can be a dry etchant, such as O2or halide-based plasma, or a wet etchant, such as tetramethylammonium hydroxide (TMAH), propylene glycol monomethyl ether (PGME), propylene glycol monomethyl ether acetate (PGMEA), or any other suitable organic solvent. This step exposes the mandrels330formed of the hard mask material while defining intervening mask features645formed of the silicon hard mask material or mandrel material that may have used a process to ensure that its solubility is compatible with the wet etch. For the purpose of this document, such processes can be “freeze” techniques and they serve to limit the solubility of the mandrels in a wet etch process. These “freeze” techniques can take on various forms, for example, a thermal cross linking agent in a resist.

The mandrels330and the intervening mask features645together define a second pattern660. The second pattern660has a second pitch P2between a mandrel330and a neighboring intervening mask feature645. The second pitch P2is about half of the first pitch P1in the illustrated embodiment. Other details of this step can be as described above in connection withFIG. 3H. The step shown inFIG. 6Ecan be followed by steps as described above in connection withFIGS. 3I to 3Kto transfer the second pattern660into the target layer110.

FIGS. 7A-7Fillustrate a method of forming a masking pattern using anti-spacers in accordance with yet other embodiments. In these embodiments, mandrels may be formed from a hard mask layer or any other suitable material, using a process that allows selective growth of anti-spacers. A photoresist can be used in the step shown inFIG. 7Aas long as it is appropriately mated to the processing requirements, e.g., with regard to solubility. In such an embodiment, a photoresist used herein can withstand subsequent process steps. This can be achieved with a different solvent resist system, such as an alcohol-based resist or can be achieved with a “freeze” technique.

Referring toFIG. 7A, the method includes providing the target layer110. Details of the target layer110can be as described above in connection withFIG. 3A. A hard mask layer is formed over the target layer110, and is patterned to form mandrels330, as shown inFIG. 7A. The mandrels330are spaced apart from one another with a first pitch P1while exposing surfaces112of the target layer110. Each of the mandrels330has a top surface332and side surfaces334. Other details of this step can be as described above in connection withFIG. 4A.

Referring toFIG. 7B, a reactivity promoter655is deposited on the top and side surfaces332,334of the mandrels330without covering the exposed surfaces112of the target layer110. The reactivity promoter serves to facilitate the growth of an organic material on the surfaces of the mandrels330at the next step. Examples of such reactivity promoters include, but are not limited to, AZ materials used in RELACS (Resolution Enhancement Lithography Assisted by Chemical Shrink) processes, and a material including a hydroxyl group or organic acid designed to condition the reactivity of the mandrels to a material that covers the mandrels.

Referring toFIG. 7C, a sacrificial material, such as an organic material, is grown on the top and side surfaces332,334of the mandrels330that are covered with the reactivity promoter655. The organic material does not cover the exposed surfaces112of the target layer110except for portions112aof the exposed surfaces112proximate to the mandrels330. Examples of such organic materials include, but are not limited to, PHPS or a chain hydrocarbon with a bonding affinity to the mandrels covered with the reactivity promoter. The organic material can be grown by a diffusion limited growth technique by means of a fluid overcoat at a controlled temperature, for example, in a range between about 10° C. and about 180° C. The organic material forms anti-spacers650that cover the top and side surfaces332,334of the mandrels330.

Referring toFIG. 7D, a second masking layer640is blanket deposited by, for example, spin-on deposition, over the anti-spacers650and the exposed surfaces112of the target layer110. The second masking layer640can optionally cover top surfaces of the anti-spacers650. The second masking layer640may be formed of, for example, a silicon hard mask material. The details of this step can be as described above in connection withFIG. 6C.

Referring toFIG. 7E, the structure resulting from the step ofFIG. 7Dis subjected to a chemical descum process. The details of this step can be as described above in connection withFIG. 6D.

Referring toFIG. 7F, the structure resulting from the step ofFIG. 7Eis subjected to an etch process to remove the anti-spacers650. The details of this step can be as described above in connection withFIG. 6E. This step exposes the mandrels330formed of the hard mask material while defining intervening mask features645formed of the material forming the second masking layer640, e.g., a silicon hard mask material.

The mandrels330and the intervening mask features645together define a second pattern660. The second pattern660has a second pitch P2between a mandrel330and a neighboring intervening mask feature645. The second pitch P2is about half of the first pitch P1in the illustrated embodiment. Other details of this step can be as described above in connection withFIG. 3H. The step shown inFIG. 7Fcan be followed by steps as described above in connection withFIGS. 3I to 3Kto transfer the second pattern660into the target layer110.

FIGS. 8A-8Fillustrate a method of forming a masking pattern using anti-spacers in accordance with yet other embodiments. In these embodiments, mandrels may be formed from a hard mask layer or any other suitable material compatible with blanket deposition of an anti-spacer material, including materials discussed with reference toFIG. 4A.

Referring toFIG. 8A, the method includes providing a target layer110. Details of the target layer110can be as described above in connection withFIG. 3A. A hard mask layer is formed over the target layer110, and is patterned to form mandrels330, as shown inFIG. 8A. The mandrels330are spaced apart from one another with a first pitch P1while exposing surfaces112of the target layer110. Each of the mandrels330has a top surface332and side surfaces334. Other details of this step can be as described above in connection withFIG. 4A.

Referring toFIG. 8B, a sacrificial material is conformally deposited on the top and side surfaces332,334of the mandrels330and the exposed surfaces112of the target layer110. Examples of such sacrificial materials include, but are not limited to, BARC, DARC, photoresist, silicon-on-glass (SOG), and hardmask type material. The sacrificial material can be deposited by, for example, spin-on coat or deposition. Portions852,854of the sacrificial material that cover the top and side surfaces332,334, respectively, of the mandrels330form anti-spacers850. Portions855of the sacrificial material formed on the surfaces112of the target layer110may be referred to as “partial gap fillers” in the context of this document.

Referring toFIG. 8C, a second masking layer640is deposited over the partial gap fillers855and can also extend over the anti-spacers850. Other details of this step can be as described above in connection withFIG. 6C.

Referring toFIG. 8D, to expose anti-spacers850in embodiments where the anti-spacers850are covered, the structure resulting from the step ofFIG. 8Cis subjected to a chemical descum process. The details of this step can be as described above in connection withFIG. 6D.

Referring toFIG. 8E, the structure resulting from the step ofFIG. 8Dis subjected to an etch process to remove the anti-spacers850. The etch process may use an anisotropic etch process, using any suitable dry etchant, such as C2F4, O2, Hbr, or F2. In one embodiment where the organic material is a photoresist, the etchant can be a dry etchant, such as C2F4, O2, Hbr, and F2. This step exposes the mandrels330formed of the hard mask material while defining intervening mask features845between the mandrels330. Each of the features845includes a structure645formed of the silicon hard mask material and a partial gap filler855underlying the structure645.

The mandrels330and the intervening mask features845together define a second pattern860. The second pattern860has a second pitch P2between a mandrel330and a neighboring intervening mask feature845. The second pitch P2is about half of the first pitch P1in the illustrated embodiment. Other details of this step can be as described above in connection withFIG. 3H. The step shown inFIG. 8Ecan be followed by steps as described above in connection withFIGS. 3I to 3Kto transfer the second pattern860into the target layer110.

In some embodiments, a masking pattern formed by the methods described herein may be used for further pitch multiplication. The pitch of the masking pattern may be further reduced by conducting an additional process using anti-spacers. For example, anti-spacers may be formed around the mask features left after anti-spacer removal, e.g., including the mandrels234and intervening mask features248, as shown inFIG. 3I, and the pitch of the resulting features can be reduced to about half of the second pitch P2.

In such embodiments, a second set of anti-spacers are formed around and optionally over the mask features by repeating the steps ofFIGS. 3D-3I,FIGS. 4A-4E,FIGS. 5A-5C,FIGS. 6A-6D,FIGS. 7A-7E, orFIGS. 8A-8D. In some embodiments, the second set of anti-spacers may be formed by depositing a third masking layer to at least partially bury the second pattern and chemically altering portions of the third masking layer to form the second set of anti-spacers, as in the steps shown inFIGS. 3D-3I,FIGS. 4A-4E, orFIGS. 5A-5C. In other embodiments, the second set of anti-spacers may be formed by growing a second set of anti-spacers on the mask features, as in the steps shown inFIGS. 6A-6D,FIGS. 7A-7E, orFIGS. 8A-8D, and a third masking layer is deposited to fill spaces between the mask features covered with the anti-spacers.

Subsequently, the second set of anti-spacers are removed while leaving at least portions of the third masking layer to form additional intervening mask features. The mandrels, the intervening mask features, and the additional intervening mask features together define a third pattern having a pitch that is about a half of the pitch of the second pattern. The skilled artisan will appreciate that further pitch multiplication is also possible by repeating the process of forming and removing anti-spacers. The steps described above can be repeated if desired for more pitch reduction.

In other embodiments, a masking pattern formed by the methods described above may be used for additional pitch multiplication in combination with a process employing so-called spacers.

FIGS. 9A-9Dillustrate a method of forming a masking pattern, using anti-spacers and spacers in accordance with one embodiment. In the illustrated embodiment, features forming a masking pattern can have a smaller pitch than the pitches P2of the second patterns260,360,460,660, and860described above in connection withFIGS. 3I,4G,5D,6E,7F, and8E.

Referring toFIG. 9A, the target layer110is provided. The details of the target layer110can be as described above in connection withFIGS. 3A,4A,5A,6A,7A, and8A.

A first pattern920is formed on the target layer110. The first pattern920may include mandrels922and intervening mask features924. In the context of this embodiment, the mandrels922and the intervening mask features924may be collectively referred to as “first masking features.” The mandrels922and the intervening mask features924can be formed by the method described above in connection withFIGS. 3A-3I,FIGS. 4A-4G,FIGS. 5A-5D,FIGS. 6A-6E,FIGS. 7A-7F, orFIGS. 8A-8E. In certain embodiments, one or more hard mask layers (not shown) can be formed on the target layer110, and the first pattern920can be formed on the one or more hard mask layers. The first pattern920may correspond to any one of the second patterns260,360,460,660, and860described above in connection withFIGS. 3I,4G,5D,6E,7F, and8E.

As shown inFIG. 9A, the mandrels922have a first pitch P1therebetween. In the first pattern920, however, two neighboring first masking features (i.e., a mandrel922and a neighboring intervening mask feature924) have a second pitch P2that is about half of the first pitch P1. In some embodiments, the first masking features922,924in the first pattern920may be trimmed or shrunk by an isotropic etching process to increase the distance between neighboring features.

Next, as shown inFIG. 9B, a layer930of spacer material may be blanket-deposited conformally over exposed surfaces, including the target layer110and the tops and sidewalls of the first masking features922,924.

The spacer material can be any material capable of use as a mask to transfer a pattern to the underlying target layer110. The spacer material preferably: 1) can be deposited with good step coverage, 2) can be deposited at a temperature compatible with the target layer110and 3) can be selectively etched relative to the target layer110. In one embodiment, the spacer material930is silicon oxide. In other non-limiting embodiments, the spacer material may be polysilicon or a low temperature oxide (LTO).

The spacer material may be deposited by any suitable method, including, but not limited to, chemical vapor deposition (CVD), atomic layer deposition (ALD), spin-coating, or casting. ALD may have the advantages of both low temperature deposition and high conformality. The thickness of the layer930corresponds to the width of the spacers935and may be determined based upon the desired width of those spacers935(FIG. 9C). For example, in some embodiments, the layer930may be deposited to a thickness of about 20-80 nm and, optionally, about 40-60 nm. In some embodiments, the step coverage is about 80% or greater and, optionally, about 90% or greater.

In certain embodiments, the spacer material may be one of a class of materials available from Clariant International, Ltd. (so-called “AZ R” materials), such as the materials designated as AZ R200™, AZ R500™, and AZ R600™. In other embodiments, the spacer material may be an “AZ R” material with one or more inorganic components (e.g., one or more of titanium, carbon, fluorine, bromine, silicon, and germanium) dispersed therein. The “AZ R” materials contain organic compositions which cross-link upon exposure to acid released from chemically-amplified resist. Specifically, an “AZ R” material may be coated across photoresist, and subsequently the resist may be baked at a temperature of about 100° C. to about 120° C. to diffuse acid from the resist and into the “AZ R” material to form chemical cross-links within regions of the material proximate the resist. Portions of the material adjacent the resist are thus selectively hardened relative to other portions of material in which acids have not diffused. The material may then be exposed to conditions which selectively remove the non-hardened portions relative to the hardened portions. Such removal may be accomplished using, for example, 10% isopropyl alcohol in the ionized water, or a solution marketed as “SOLUTION C™” by Clariant International, Ltd. The processes using the “AZ R” materials are sometimes considered examples of RELACS (Resolution Enhancement Lithography Assisted by Chemical Shrink) processes. Examples of spacers formed by RELACS processes are disclosed by U.S. patent application Ser. No. 12/125,725, filed May 22, 2008, entitled “METHODS OF FORMING STRUCTURES SUPPORTED BY SEMICONDUCTOR SUBSTRATES” (inventor: Anton deVilliers).

Referring toFIG. 9C, the spacer layer930is then subjected to an anisotropic etch to remove spacer material from horizontal surfaces912of the target layer110and the first masking features922,924. In an embodiment where the spacer layer930is formed of a silicon oxide material, an etch, also known as a spacer etch, can be performed on the silicon oxide material, using a fluorocarbon plasma, e.g., containing CF4/CHF3, C4F8/CH2F2or CHF3/Ar plasma. The etchants are chosen to be selective for the spacer material relative to the target layer110.

Referring toFIG. 9D, the first masking features922,924are removed to leave freestanding spacers935. In one embodiment, the first masking features922,924may be removed by an oxygen-containing plasma etch, such as an etch using HBr/O2/N2and SO2/O2.

In the illustrated embodiment, the spacers935form a second pattern950having a third pitch P3. The third pitch P3is roughly half of the second pitch P2between neighboring first masking features922,924in the first pattern920. For example, where the first pitch P1is about 200 nm, spacers935having a pitch of about 50 nm or less can be formed.

Next, the second pattern950provided by the spacers935is transferred into the target layer110(not shown). The pattern transfer can be performed using any suitable etch process selective for the target layer110relative to the spacers935. Other details of this step can be as described above with reference toFIG. 3Kor4H. The target layer110may be further processed to form complete IC devices.

In some embodiments, three dimensional structures can be formed by the methods described above. The three dimensional structures can include, but are not limited to, lines, trenches, vias, pillars, posts, troughs, and moats.

FIGS. 10A-12Cillustrate a method of forming an array of isolated trenches or vias in a target layer, using anti-spacers in accordance with some embodiments. In one embodiment, referring toFIGS. 10A and 10B, mandrels1020extending in the y-direction are formed by, for example, depositing and patterning a first resist layer on the target layer110, as described above in connection withFIG. 3C. A second resist layer1040is formed over the mandrels1020and the target layer110. First anti-spacers1050extending in the y-direction are formed around and on top of the mandrels1020, thereby defining intervening mask features1048extending in the y-direction. The details of these steps can be as described above in connection withFIGS. 3D-3G.

Subsequently, the structure shown inFIGS. 10A and 10Bis subjected to a freeze step such that the top surface of the second resist layer1040is maintained during a subsequent step. The details of this freeze step can be as described above in connection withFIG. 3E.

Referring toFIGS. 11A-11C, mandrels1120extending in the x-direction are formed by depositing and patterning a third resist layer on the second resist layer1040in the manner described above in connection withFIG. 3C. A fourth resist layer1140is formed over the mandrels1120and the second resist layer1040. Second anti-spacers1150extending in the x-direction are formed around and on top of the mandrels1120, thereby defining intervening mask features1148extending in the x-direction. The details of this process can be as described above in connection withFIGS. 3D-3G.

Subsequently, the structure shown inFIGS. 11A-11Cis subjected to development using a suitable developer. The developer removes the second anti-spacers1150, thereby exposing parts of the first anti-spacers1050and the intervening mask features1048. Then, the developer further removes the exposed parts of the first anti-spacers1050, thereby creating an array of holes1160defined by the features1020,1048,1120,1148, as shown inFIGS. 12A and 12B. Then, a pattern formed by the array of holes1160is transferred into the target layer110in the manner described above in connection with FIG.3K. The mask features520,548are sequentially removed. A resulting structure of the target layer110, which includes an array of isolated holes1005, is shown inFIG. 12C.

In certain embodiments, the holes1005can be filled with a material (e.g., a dielectric material, a conductive material, or a semiconductor) such that structures formed in the holes1005can serve as posts or pillars in a resulting electronic circuit. In other embodiments, the method described above may be adapted for forming isolated holes, e.g., contact vias or trenches, depending on the design of the electronic circuit.

In other embodiments, the mandrels1020and the intervening mask features1048extending in the y-direction can be formed by any of the methods described above in connection withFIGS. 3A-3I,FIGS. 4A-4G,FIGS. 5A-5D,FIGS. 6A-6E,FIGS. 7A-7F, orFIGS. 8A-8E. Then, the mandrels1120and the intervening mask features1148extending in the x-direction can be formed over the mandrels1020and the intervening mask features1048by any of the methods described above in connection withFIGS. 3A-3I,FIGS. 4A-4G,FIGS. 5A-5D,FIGS. 6A-6E,FIGS. 7A-7F, orFIGS. 8A-8E. In some embodiments, a freeze step is required after forming the mandrels1020and the intervening mask features1048and before forming the mandrels1120and the intervening mask features1148. In other embodiments, no freeze step is required after forming the mandrels1020and the intervening mask features1048and before forming the mandrels1120and the intervening mask features1148.

FIGS. 13A-15Billustrate a method of forming an array of pillars or posts in a target layer using anti-spacers. In one embodiment, referring toFIGS. 13A and 13B, mandrels1320extending in the y-direction are formed by depositing and patterning a first resist layer on the target layer110, as described above in connection withFIG. 3C. Intervening mask features1348extending in the y-direction and alternating with the mandrels1320are formed by forming and removing anti-spacers as described above in connection withFIGS. 3D-3I. Subsequently, a pattern defined by the mandrels1320and intervening mask features1348is transferred into the target layer110in the manner described above in connection withFIG. 3K. Exposed portions of the target layer110are etched, as shown inFIG. 13B, defining elongated trenches or troughs1302alternating with elongated mesas1301(unetched portions) in the target layer110.

Referring toFIGS. 14A-14C, mandrels1420extending in the x-direction are formed by depositing and patterning a third resist layer over the target layer110in the manner described above in connection withFIG. 3C. During this step, because the mandrels1320and the intervening mask features1348have not been subjected to a freeze step, the deposition of the third resist layer wipes the pattern formed by the mandrels1320and the intervening mask features1348(the deposited resist blends with the existing resist). Subsequently, intervening mask features1448extending in the x-direction and alternating with the mandrels1420are formed by forming and removing anti-spacers in the manner described above in connection withFIGS. 3D-3I. A pattern defined by the mandrels1420and the intervening mask features1448is transferred into the target layer110, as shown inFIGS. 15A and 15B, in the manner described above in connection withFIG. 3K. Exposed portions of the elongated trenches or troughs1302of the target layer110are etched, as shown inFIG. 15A, defining isolated holes or vias1303in the target layer110. Simultaneously, exposed portions of the mesas1301of the target layer110are etched, defining pillars or posts1305, as shown inFIG. 15B. A resulting structure in the target layer110, which includes an array of isolated pillars or posts1305and isolated holes1303, is shown inFIG. 15C.

In other embodiments, the mandrels1320and the intervening mask features1348extending in the y-direction can be formed by any of the methods described above in connection withFIGS. 3A-3I,FIGS. 4A-4G,FIGS. 5A-5D,FIGS. 6A-6E,FIGS. 7A-7F, orFIGS. 8A-8E. Then, the mandrels1420and the intervening mask features1448extending in the x-direction can be formed over the mandrels1320and the intervening mask features1348by any of the methods described above in connection withFIGS. 3A-3I,FIGS. 4A-4G,FIGS. 5A-5D,FIGS. 6A-6E,FIGS. 7A-7F, orFIGS. 8A-8E.

Electronic devices, such as IC devices, typically include a plurality of conductive lines (for example, interconnects) and landing contact pads that electrically connect the conductive lines to other levels in the IC. The “landing contact pads” may also be referred to as “landing pads” or “contact tabs.” The conductive lines typically have a width narrower than the widths of the landing pads. A conventional pitch multiplication process using spacers allows formation of conductive lines having a narrower line-width than that allowed by an available photolithographic process. However, because a masking pattern defined by such spacers can only provide features having such a narrow line-width, it can be difficult to form larger width landing pads using spacers.

In some embodiments, a process involving anti-spacers may be used to simultaneously form conductive lines and landing pads integrated with the conductive lines. Such a process can provide a single masking pattern for forming pitch-multiplied conductive lines as well as landing pads wider than the conductive lines.

FIGS. 16A-16Cillustrate a method of forming conductive lines and landing pads in an electronic device (for example, an IC circuit), using anti-spacers in accordance with some embodiments. Referring toFIG. 16A, mandrels1620are formed over a target layer110that is formed of a conductive material, such as copper, gold, silver, or an alloy thereof. Each of the mandrels1620may include a line mask feature1622that has a first width LW1, and a landing pad mask feature1624that has a second width LW2. The landing pad mask feature1624is connected to one end of the line mask feature1622.

In the illustrated embodiment, the line mask features1622of the mandrels1620extend parallel to one another. In other embodiments, the configurations of the line mask features1622of the mandrels1620can vary, depending on the design of the electronic device formed by the method. The second width LW2can be selected, depending on the size of a landing pad to be formed in the target layer110, and is greater than the first width LW1. In one embodiment, the second width LW2is about 0.5 to about 5 times greater than the first width LW1. The illustrated landing pad mask feature1624has a substantially circular shape, but the skilled artisan will appreciate the landing pad mask feature1624can have various other shapes such as a square shape, a rectangular shape, an oval shape, or the like, depending on the desired shape of the landing pad. The mandrels1620can be formed as described above in connection withFIGS. 3A-3C.

Referring toFIG. 16B, intervening mask features1630are formed between two neighboring ones of the mandrels1620by forming and removing anti-spacers (not shown). Each of the intervening mask features1630may include a line mask feature1632that has a third width LW3, and a landing pad mask feature1634that has a fourth width LW4. The line mask features1632of the intervening mask features1630extend parallel to one another and to the line mask features1622of the mandrels1620. In the illustrated embodiment, the third width LW3is substantially the same as the first width LW1, and the fourth width LW4is substantially the same as the second width LW2. In other embodiments, the third width LW3can be different from the first width LW1, and/or the fourth width LW4can be different from the second width LW2. The intervening mask features1630can be formed as described above in connection withFIGS. 3D-3I.

In other embodiments, the mandrels1620and the intervening mask features1630can be formed by any of the methods described above in connection withFIGS. 4A-4G,FIGS. 5A-5D,FIGS. 6A-6E,FIGS. 7A-7F, orFIGS. 8A-8E.

Referring toFIG. 16C, a cut mask1650is provided over the structure ofFIG. 16B. The cut mask1650includes an opening1652that exposes parts of the landing pad mask features1634of the intervening mask features1630(and optionally end parts of the landing pad mask features1624of the mandrels1620) while blocking the other portions of the features1620,1630. The opening1652is shaped such that the landing pad mask features1634of the intervening mask features1630are electrically separated from one another by a subsequent etch process. The exposed parts of the landing pad mask features1624,1634of the features1620,1630are removed by any suitable etch process that can remove the materials of the landing pad mask features selectively relative to the target layer110.

The mask1650is removed and the resulting features1620,1630after the etch process are shown inFIG. 16D. A pattern defined by the mandrels and intervening mask features1620,1630is transferred into the target layer110in the manner described above in connection withFIG. 3K.

In another embodiment, a pattern formed by the features1620,1630shown inFIG. 16Bis first transferred into the target layer110, and then landing pads are defined by another etch step so as to be electrically isolated from one another. The skilled artisan will appreciate that various modifications can be made to the methods described above, depending on the design of the electronic device.

In the embodiments described above, the landing pads can be formed simultaneously with conductive lines, thus eliminating separate steps for defining and connecting the landing pads to conductive lines. Yet, the pitch of the conductive lines can be reduced at least to the same extent as in a conventional pitch multiplication process using spacers. While the embodiments above were described in connection with forming conductive lines and landing pads, the skilled artisan will appreciate that the embodiments can be adapted for forming various other structures or parts of electronic devices where different shapes or sizes of features are formed simultaneously.

In some embodiments, electronic devices, such as arrays in IC's, can be made by the methods described above. The electronic devices may also include a system including a microprocessor and/or a memory device, each of which includes features arranged in an array. Such a system may be a computer system, an electronic system, or an electromechanical system.

Examples of electronic devices include, but are not limited to, consumer electronic products, electronic circuits, electronic circuit components, parts of the consumer electronic products, electronic test equipments, etc. The consumer electronic products may include, but are not limited to, a mobile phone, a telephone, a television, a computer monitor, a computer, a hand-held computer, a personal digital assistant (PDA), a microwave, a refrigerator, a stereo system, a cassette recorder or player, a DVD player, a CD player, a VCR, an MP3 player, a radio, a camcorder, a camera, a digital camera, a portable memory chip, a washer, a dryer, a washer/dryer, a copier, a facsimile machine, a scanner, a multi functional peripheral device, a wrist watch, a clock, etc. Further, the electronic device may include unfinished intermediate products.

Thus, it will be understood that the invention can take the form of various embodiments, some of which are discussed above and below.

In one embodiment, a method of forming features in an electronic device includes forming mandrels defining a first pattern in a first masking layer on one or more underlying layers comprising a target layer. The first pattern includes spaces between the mandrels, and has a first pitch. The method also includes depositing a second masking layer to at least partly fill the spaces of the first pattern. The second masking layer contacts the one or more underlying layers through the spaces between the mandrels. The method further includes forming sacrificial structures to define gaps between at least parts of the mandrels and at least parts of the second masking layer; and after depositing the second masking layer and forming the sacrificial structures, removing the sacrificial structures to define a second pattern having a second pitch smaller than the first pitch. The second pattern includes the at least parts of the mandrels and intervening mask features alternating with the at least parts of the mandrels.

In another embodiment, a method of forming features in an electronic device includes photolithographically forming mandrels defining a first pattern in a first masking layer over a target layer. The first pattern includes spaces between the mandrels, and has a first pitch. The method also includes depositing a second masking layer to at least partially fill the spaces of the first pattern; forming sacrificial structures to define gaps between at least parts of the mandrels and at least parts of the second masking layer; and after depositing the second masking layer and forming the sacrificial structures, removing the sacrificial structures to define a second pattern having a second pitch smaller than the first pitch. The second pattern includes the at least parts of the mandrels and intervening mask features alternating with the at least parts of the mandrels.

In yet another embodiment, a method of forming an integrated circuit includes forming a first pattern comprising first lines extending substantially parallel to one another in a first direction over a target layer. Forming the first pattern includes: providing first mandrels in a first masking layer over the target layer, the first mandrels having spaces therebetween; depositing a second masking layer to at least partially fill the spaces between the first mandrels; and forming first sacrificial structures to define gaps between at least parts of the first mandrels and at least parts of the second masking layer. The method also includes forming a second pattern comprising second lines extending substantially parallel to one another in a second direction over the first pattern, the second direction being different from the first direction. Forming the second pattern includes: providing second mandrels in a third masking layer over the second masking layer, the second mandrels having spaces therebetween; depositing a fourth masking layer to at least partially fill the spaces between the second mandrels; and forming second sacrificial structures to define gaps between at least parts of the second mandrels and at least parts of the fourth masking layer. The method further includes: removing the first sacrificial structures; removing the second sacrificial structures; and etching the target layer through the first pattern, the second pattern, or a combination of the first and second patterns.

Although this invention has been described in terms of certain preferred embodiments, other embodiments that are apparent to those of ordinary skill in the art, including embodiments that do not provide all of the features and advantages set forth herein, are also within the scope of this invention. Accordingly, the scope of the present invention is defined only by reference to the appended claims.