Method and apparatus for reading a magnetic tunnel junction using a sequence of short pulses

A magnetic random access memory (MRAM) array having a magnetic tunnel junction (MTJ) to be read using a magnetic state of the MTJ, the MTJ being read by applying a current therethrough. Further, the MRAM array has a reference MTJ, a sense amplifier coupled to the MTJ and the reference MTJ, the sense amplifier operable to compare the voltage of the MTJ to the reference MTJ in determining the state of the MTJ; a first capacitor coupled to the sense amplifier at a first end and to ground at a second end; and a second capacitor coupled to the sense amplifier at a first end and to ground at a second end, the first capacitor storing the, wherein short voltage pulses are applied to the first end of each of the first and second capacitors when reading the MTJ thereby makes the current flowing through the MTJ therethrough for small time intervals thereby avoiding read disturbance to the MTJ.

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates generally to magnetic tunnel junctions (MTJs) and particularly to reading MTJs.

2. Description of the Prior Art

Magnetic random access memory (MRAM) is foreseen as a candidate for many applications in the coming years. Its non-volatility is attributed to a magnetic tunnel junction (MTJ) making up the primary component of the MRAM because its magnetic orientation switches to save data. However, to gain further acceptance, MTJs must be made to scale.

Currently, programming of the MTJ is achieved by the application of a current through the MTJ for the time duration of ‘t’. For times larger than 5 nano-seconds (ns), the relationship between programming current and time is logarithmic. This region is commonly referred to as the “thermally activated region”. Below 5 ns, the programming current is almost proportional to T, and this region is commonly referred to as the “processional switching region”.

As the size of the MTJ scales down, which is required for many applications employing high-capacity non-volatile memory, the programming current required for programming or writing to the MTJ decreases. Normally the current required for reading an MTJ is a small fraction of the program current. This is needed to prevent accidentally programming the MTJ during the read operation and is commonly referred to as “read disturbance”. Read disturbance obviously leads to defective MRAMs and can not be tolerated. With the MTJ scaling to small sizes, the required programming current goes down, which increases the probability of read disturbance. At the same time for larger and faster dice, the read current requirements increase. At some point, these two competing requirements make it difficult to prevent read disturbance leading to unintentional programming during read operations and therefore unreliability of the memory.

What is needed is a magnetic random access memory (MRAM) including magnetic tunnel junction (MTJ) with increased reliability particularly during reading operations.

SUMMARY OF THE INVENTION

To overcome the limitations in the prior art described above, and to overcome other limitations that will become apparent upon reading and understanding the present specification, the present invention discloses a method and a corresponding structure for a magnetic storage memory device that is based on current-induced-magnetization-switching having reduced switching current in the magnetic memory.

Briefly, an embodiment of the invention includes a magnetic random access memory (MRAM) array having a magnetic tunnel junction (MTJ) to be read using a magnetic state of the MTJ, the MTJ being read by applying a current therethrough. Further, the MRAM array has a reference MTJ, a sense amplifier coupled to the MTJ and the reference MTJ, the sense amplifier operable to compare the voltage of the MTJ to the reference MTJ in determining the state of the MTJ; a first capacitor coupled to the sense amplifier at a first end and to ground at a second end; and a second capacitor coupled to the sense amplifier at a first end and to ground at a second end, the first capacitor storing the, wherein short voltage pulses are applied to the first end of each of the first and second capacitors when reading the MTJ thereby makes the current flowing through the MTJ flow therethrough for small time intervals thereby avoiding read disturbance to the MTJ.

These and other objects and advantages of the present invention will no doubt become apparent to those skilled in the art after having read the following detailed description of the preferred embodiments illustrated in the several figures of the drawing.

DETAILED DESCRIPTION OF THE VARIOUS EMBODIMENTS

In an embodiment of the invention, such as shown inFIG. 1, a magnetic random access memory (MRAM) array10is shown to include magnetic tunnel junctions (MTJs)14and16and reference MTJs58and56, the latter of which are used as reference MTJs during reading of the former using the remaining circuitry shown inFIG. 1, as is further discussed below. It is understood that while the array10is shown to include two MTJs14and16that are to be read, it may include and commonly does include additional MTJs.

The array10is further shown to include a sense amplifier32, an array of access transistors86-92, an array of reference access transistors62-68, current sources18,22,40, and52, capacitors26,30,34, and54, and the transistors20,36,28,38,24, and23.

The array of transistors86-92is shown coupled, at each of the gates of these transistors, to the word lines12, which is shown to include the word lines78-84. For example, the word line (WL0)78is shown coupled to the gate of the transistor78, the word line80(WL1) is shown coupled to the gate of the transistor88, the word line82(WL2) is shown coupled to the gate of the transistor90, and the word line (WL3)84is shown coupled to the gate of the transistor92. The drain of the transistor78is shown coupled to a sense line (SL1)41, which is also coupled to the drain of the transistor82and the source of each of the transistors80and92. The drain of the transistor84is shown coupled to the current source22and the current source22is further shown coupled to the drain of the transistor24. The source of the transistor24is shown coupled to ground. The capacitor26is also shown coupled to ground on one end thereof and on another end thereof, it is shown coupled to the MTJs16and14and a bit line (BL1)46, as well as to the drain of the transistor28and the source of the transistor20. The MTJ14is shown coupled to the drain of the transistor86and the drain of the transistor88at an end of the MTJ14that is opposite to the bit line41, and the MTJ16is shown coupled to the drain of the transistor90and the source of the transistor92at an end of the MTJ16that is opposite to the bit line41.

The source of the transistor20is shown coupled to the current source18and the current source18is also shown coupled to Vdd at an opposite end. The gate of the transistor20is shown coupled to the gate of the transistor28, which is shown to be coupled to the sense amplifier32at its drain as well as to the capacitor30. The capacitor30is also shown coupled to ground at an opposite end thereof. The sense amplifier32is shown further coupled to the capacitor34and to the drain of the transistor38. The gate of the transistor38is shown coupled to the gate of the transistor36. An opposite end of the capacitor34is shown coupled to ground. The source of the transistor38is shown coupled to each of the MTJs58and56.

The drain of the transistor36is shown coupled to the current source40and the current source40is further shown coupled to Vdd, at an end opposite to the end where it is coupled to the transistor36. The drain of the transistor36is shown coupled to the MTJ58and the MTJ56. A source line (SL2)42is shown coupled to the gate of the transistor66and the drain of the transistor68. A bit line (BL2) is defined at the drain of the transistor36and s shown coupled to the MTJ58. An end of the MTJ58that is opposite to that which is coupled to the source line42is shown coupled to the gate of the transistor62and similarly, an end of the MTJ56that is opposite to that which is coupled to the bit line (BL2)42is shown coupled to the gate of the transistor66.

The drain of the transistor68is shown coupled to the current source52, which is shown coupled, at an opposite end, to the drain of the transistor23. The source of the transistor23is shown coupled to ground. The source of the transistor62is shown coupled to the source line42and the gate of the transistor62is shown coupled to the word line (WL0)70. The gate of the transistor64is shown coupled to the word linen (WL1)72, the gate of the transistor66is shown coupled to the word line (WL2)74, and the gate of the transistor68is shown coupled to the word line (WL3)76. The capacitor34is shown coupled at one end to the sense amplifier32and at another end to the source of the transistor38. The drain of the transistor38is shown coupled to the bit line44.

In operation, the MTJs14and16are programmed and/or read using their counterpart reference MTJs58and56, respectively, as is well known in the art. It is also well known in the art that the access transistors86-92and62-68use are used to access the foregoing MTJs for programming and reading operations. Similarly known is the word lines78-84serve to select the MTJ to be read and/or written to, i.e. the MTJs14and16. In this respect, in some embodiments, the word line that is used to select one of the MTJs14and16is also used to select one of the counterpart reference MTJs58and56, accordingly, for example, the word line78is the same as the word line70, the word line80is the same as the word line72, the word line82is the same as the word line74, and the word line84is the same as the word line76.

Typically, during a read operation, current flows from the current source18through the transistor20and through the MTJ being read, such as either the MTJ14or the MTJ16. The selection of which of these MTJs is made by the state of a respective word line and access transistor. Upon flowing through the MTJ that is being read, current flows through the transistor28.

Similarly, in the reference path, shown generally on the right side of theFIG. 1, current flows from the current source40through the transistor36and through the corresponding reference MTJ, such as either the MTJ58or the MTJ56. The selection of which of these MTJs is made by the state of a respective word line and access transistor. Upon flowing through the MTJ that is being read, current flows through the transistor38.

A sequence of voltage pulses, such as that which is shown at48inFIG. 1, are applied to the gate of the transistor28, the gate of the transistor38, the gate of the transistor24, and the gate of the transistor23as well as transistors20and36. These short pulses are small and during a read operation, help to ensure that the MTJs14and16are operating in the “processional switching” region, as will be further discussed with reference toFIG. 2below. Being in the processional switching region requires very high programming current to be applied to the MTJs14and16before they can actually be programmed or written to. Accordingly, the possibility of accidental programming and therefore read disturbance is minimized or eliminated.

An example of the short pulses at48is 0.5 to 1.5 nano seconds per pulse.

The capacitor30serves to store and accumulate the voltage at the left side of the sense amplifier32when the MTJ14is being read and the capacitor34serves to store and accumulate the voltage at the right side of the sense amplifier32when the reference MTJ58is being read during the read operation of the MTJ14. Similarly, the capacitor26serves to store and accumulate the voltage at the left side of the sense amplifier32The charges on the caps26and54are discharged intermittently through the MTJs and current sources, while charges on Caps30and34accumulate charge and consequently voltage depending on the resistances of the MTJs14and58.

In an example, one of the MTJs14or16and its counterpart reference MTJ are selected for reading. In this example, the reference MTJ is presumed programmed high while the counterpart MTJ being accessed for reading is presumed programmed low. The current sources18and40pump current into the bit lines46and44. The word line (for example WL0)78is high. The currents through the two MTJs are interrupted by pulsing the gates of the pass transistors20,28,36, and38. This makes the current through the MTJs only flow for small time intervals, for example 0.5 to 1.5 ns and reduces the programming chance and read disturbance. As currents flow into the bit line, the voltage on the bit lines will rise, which in turn help to rise the voltages on Caps30and34, at the same time the two MTJs drain the current, but since the resistances of the two MTJs are different, the voltages rise differently allowing the sense amplifier32to sense the state of the MTJ being read.

It is understood that each MTJ is a part of a MRAM that may have layers such as a barrier layer, a fixed layer, a free layer, and other layers, as well know in the art.

In summary, inFIG. 1, the MRAM array10, through the current source18, applies a current to the MTJ14and through the current source40to the reference MTJ58. The sense amplifier32compares the voltage of the MTJ14to that of the reference MTJ58in determining the state of the MTJ14. The sequence of short voltage pulses, such as shown at48, are accumulated by the capacitors30and34and are converted to steady state voltages and compared against each other by the sense amplifier32thereby making the current flowing through the MTJ14flow therethrough for small time intervals to avoid read disturbance to the MTJ14. The MTJ14is sensed or read through the voltage difference sensed by the sense amplifier32because the each of the MTJs, such as the MTJ14, acts as a resistance. This process is the same when reading the MTJ16or any of the MTJs of the array10.

In accordance with a method reading the MTJ14, a sequence of short current pulses is applied to the MTJ14, and the applied sequence of short current pulses is converted to a sequence of short voltage pulses, and the sequence of short voltage pulses is converted into voltages sensible by the sense amplifier32. Using the sense amplifier32, the accumulated sequence of short voltage pulses is sensed and the state of the MTJ14is sensed based on the sensed sequence of short voltage pulses as it relates to the resistance of the MTJ14. The MTJ14acts as a resistor and in this respect, the state of the MTJ14is determined by the current flowing therethrough and the voltage thereof.

FIG. 2shows a graph of the current (I), in micro Amps (uA) in the y-axis, required to program the MTJs14and16ofFIG. 1, versus time, shown in nano seconds (ns) in the x-axis. As discussed below, a small short pulses are applied during a read operation with these small short pulses being very short in duration and while applied during the read operation, applied in essentially a processional switching region100of the MTJ being read, which requires very high programming current and reduces the possibility of accidental programming and read disturbance.

InFIG. 2, the graph230and the graph240are each graphs of the programming current “I” (y-axis), which is logarithmically proportional to time (x-axis). InFIG. 2, the programming currents increase substantially below 5 ns. In the region100, current changes at a rate relative to time that is different than the rate at which the programming current changes in other regions, such as shown at200inFIG. 2. 200generally shows a thermally-activated region where the MTJ programming is thermally activated and as a result current requirement for programming is logarithmically related to time, and it could switch erroneously during the read operation. However, the region100is free from such undesirable effect and for this reason, in the embodiments and methods of this invention, the MTJ to be read is made to operate in the region100.