Inter-channel bias calibration for navigation satellite systems

Dynamic inter-channel bias calibration of a navigational receiver is provided. A reference signal is propagated through front end circuitry of the receiver. A delay caused by the propagation of the reference signal through the front end circuitry is measured. The inter-channel bias of the navigational receiver is reduced using the measured delay associated with the front end circuitry of the receiver.

FIELD OF THE INVENTION

Background

The present invention relates to calibration of inter-channel bias in navigation satellite systems.

2. Related Art

Navigation receivers that utilize the signals of the global navigation satellite systems GPS and GLONASS enable various positioning tasks with very high accuracy. A GLONASS receiver receives and processes radio signals transmitted by the navigation satellites. The satellite signals are carrier harmonic signals that are modulated by pseudo-random binary codes which, on the receiver side, are used to measure the delay relative to a local reference clock. These delay measurements are used to determine the so-called pseudo-ranges between the receiver and the satellites. The pseudo-ranges are different from the true geometric ranges because the receiver's local clock is different from the satellite onboard clocks. If the number of satellites in sight is greater than or equal to four, then the measured pseudo-ranges can be processed to determine the user's single point location X=(x, y, z)T(all vectors are represented as columns; the symbolTdenotes matrix/vector transpose), as well as compensate for the receiver clock offset.

The necessity to improve positioning accuracies has eventually led to the development of “differential navigation/positioning”. In this mode, the user position is determined relative to the antenna connected to a Base receiver, assuming that the coordinates of the Base are known with high accuracy. The Base receiver will transmit its measurements (or corrections to the full measurements) to a mobile navigation receiver (“Rover”). The Rover receiver will use these corrections to refine its own measurements in the course of data processing. The rationale for this approach is that since most of the pseudo-range and pseudo-phase measurement errors on the Base and Rover sides are strongly correlated, using differential measurements will substantially improve the positioning accuracy.

The fundamental task of a GLONASS receiver is to measure distances to several GLONASS satellites and compute receiver coordinates. Distances are measured to satellites by measuring the travel time of signals from the satellites to the core of the receiver electronics where the received signals are processed. Data used from a Base receiver (at a known point) removes common errors in the Rover and yields accurate results. The signal path from each satellite to the receiver electronics consists of two parts: 1) the direct path in space from the satellite to the receiver antenna, and 2) from the receiver antenna to the receiver electronics. The first path is unique to each satellite. The second path is common for all satellites, and is where the signal travels through antenna electronics, antenna cable, and to the analog and digital sections of the receiver. The signal travel time through the second path is referred to as the “receiver bias.” As long as the receiver bias is the same for all satellites, it acts as a component of the receiver clock offset, which we solve as the fourth unknown (along with x, y, z). In other words, if the receiver bias is the same for all satellites it does not impact position computations.

The assumption that the receiver biases are the same for all satellites is true for GPS but not for GLONASS. The reason is that the receiver bias depends on the satellite signal frequency. All GPS satellites transmit on the same frequency, so they all create the same receiver bias. GLONASS satellites, however, transmit on different frequencies, so each GLONASS satellite generates a different receiver bias. In technical terminology, GLONASS satellites cause inter-channel biases which, if not taken into account, can significantly degrade position accuracy. Fortunately, all common errors between the Base and the Rover receivers are cancelled. Therefore, if the magnitudes of the GLONASS inter-channel biases in the Base receiver and in the Rover receiver are the same, these biases will be cancelled and they will not degrade the position accuracy. In such cases GLONASS satellites act as good as GPS satellites. However, this rarely happens. This is due to the fact that the magnitudes of the inter-channel biases depend not only on the receiver design and its electronic components, but also on the temperature and slight variations in the electronic components. Even in the best case where the Base and the Rover receivers are from the same manufacturer and have identical design, components, and manufacturing dates, there is still the issue of temperature and minute component differences. The magnitude of the GLONASS inter-channel biases can prohibit the use of GLONASS satellites for precision applications.

When the objective is to achieve centimeter and sub-centimeter accuracy, dealing with GLONASS inter-channel biases is not an easy task. Currently, some manufacturers simply ignore the GLONASS inter-channel biases. When the inter-channel biases are noticeable, one solution is to use GPS and GLONASS to resolve ambiguities, and then ignore the GLONASS measurements or significantly de-weight them. With some receivers, when inter-channel biases between the Base and the Rover become intolerable, the receiver firmware ignores the GLONASS satellites and provides solutions based on GPS satellites only. Dealing with the problem in this manner does not allow the user to know why their GPS+GLONASS receiver does not show any improvement over GPS-only receivers. When the receiver firmware cannot isolate the GLONASS satellites with high inter-channel biases it provides inaccurate results. This is a serious problem which causes the user to accept faulty results. Other manufacturers try to measure the GLONASS inter-channel biases in a sample of pre-production receivers and hardcode these biases into the firmware. This is a positive step forward but by no means can cure the problem because there are still differences between electronic components compared to the sample, and their characteristics vary by temperature and time.

Thus, a solution is needed to dynamically account for and calibrate receiver specific inter-channel biases.

BRIEF SUMMARY

Embodiments of the present invention are directed to calibrating GLONASS inter-channel biases. An embodiment generates a reference signal and measures a bias delay associated with front-end circuitry of a navigation receiver by comparing a delayed reference signal with the reference signal. The delayed reference signal is based upon propagation of the reference signal through the front-end circuitry of the navigation receiver. The front end circuitry processes the reference signal and a received satellite signal. A calibration module generates a correction signal to reduce inter-channel bias. In another embodiment, a microprocessor may generate the correction signal.

The embodiment may further apply the correction signal to the received satellite signal. In one example, the correction signal may include a phase correction component and a range correction component.

In another example, the reference signal may modulate the same carrier frequency as the received satellite signal. In one example, the reference signal is separable from the pseudo random noise signal component of the received satellite signal due to a difference in code structure. Further, the front-end circuitry may include a down-converter for down-converting the received satellite signal and the reference signal.

Many of the techniques described here may be implemented in hardware, firmware, software, or combinations thereof. In one example, the techniques are implemented in computer programs executing on programmable computers that each includes a processor, a storage medium readable by the processor (including volatile memory, nonvolatile memory or storage elements), and suitable input and output devices. Program code is applied to data entered using an input device to perform the functions described and to generate output information. The output information is applied to one or more output devices. Moreover, each program is preferably implemented in a high level procedural or object-oriented programming language to communicate with a computer system. However, the programs can be implemented in assembly or machine language, if desired. In any case, the language may be a compiled or interpreted language.

DETAILED DESCRIPTION

While the invention is described in terms of particular examples and illustrative figures, those of ordinary skill in the art will recognize that the invention is not limited to the examples or figures described. Those skilled in the art will recognize that the operations of the various embodiments may be implemented using hardware, software, firmware, or combinations thereof, as appropriate. For example, some processes can be carried out using processors or other digital circuitry under the control of software, firmware, or hard-wired logic. (The term “logic” herein refers to fixed hardware, programmable logic or an appropriate combination thereof, as would be recognized by one skilled in the art to carry out the recited functions.) Software and firmware can be stored on computer-readable storage media. Some other processes can be implemented using analog circuitry, as is well known to one of ordinary skill in the art. Additionally, memory or other storage, as well as communication components, may be employed in embodiments of the invention.

FIG. 1illustrates a typical configuration of an inter-channel bias calibrating receiver according to embodiments disclosed herein. In one example, inter-channel bias calibrating receiver100receives GLONASS signal102from satellite101. GLONASS signal102may contain two pseudo-noise (“PN”) code components, a coarse code and precision code residing on orthogonal carrier components, which may be used by calibrating receiver100to determine the position of the receiver. For example, a typical GLONASS signal102will be comprised of a carrier signal modulated by two PN code components. The frequency of the carrier signal may be satellite specific, thus each GLONASS satellite may transmit a GLONASS signal at a different frequency.

Inter-channel bias calibrating receiver100may also contain high frequency combiner104. High frequency combiner104acts as an adder to combine two or more signals. In one example, high frequency combiner104receives GLONASS signal102along with calibration signal129, and combines them to create combined signal105.

Inter-channel bias calibrating receiver100may also include GLONASS RF circuitry106. In one example, GLONASS RF circuitry106modifies the incoming analog combined signal105to one which can be processed by an analog to digital converter and, thereafter, satellite signal detection circuitry to detect the satellite signal that has been received. The GLONASS RF circuitry106may include, for example, filters, amplifiers, and down converters to convert the incoming signal to baseband. It should be understood that the down converters may instead convert to an intermediate frequency depending on the entire receiver frequency plan design and available electronic components. Those skilled in the art will recognize that additional circuitry may also be included to appropriately modify the analog signal. GLONASS RF circuitry106produces RF circuit output signal107which is converted by analog to digital converter (“ADC”)108into ADC signal109, a digital signal. ADC signal109is a digital signal generated by sampling multiple repetitions of RF circuit output signal107. The spectrum of the digital signal may contain an image of the analog signal in baseband, but further digital processing depends on the receiver architecture. For example, the receiver may convert one of the multiple digital spectrum images into baseband or process the baseband image itself.

Inter-channel bias calibrating receiver100may also include multiple GLONASS channels, such as channels112and114. It should be understood that any number of channels may be provided. GLONASS channels112and114may each contain a demodulator to demodulate a GLONASS PN code contained in ADC signal109, a PN code reference generator, a numerically controlled oscillator (code NCO) to drive the PN code generator as well as a carrier frequency demodulator (e.g. a phase detector of a phase locked loop—PLL), and a numerically controlled oscillator to form a reference carrier frequency and phase (carrier NCO). In one example, the numerically controlled oscillator (code NCO) of channels112and114may receive code frequency/phase control signal258as input. Further, the numerically controlled oscillator (carrier NCO) of channels112and114may receive carrier frequency/phase control signal259as input. Code frequency/phase control signal258and carrier frequency/phase control signal259are described in greater detail below.

In one example, the GLONASS channels may reside in an application specific integrated circuit (“ASIC”) chip110. When a corresponding frequency is detected, the appropriate GLONASS channel may use the embedded PN code to determine the distance of the receiver from the satellite. This information may be provided by GLONASS channels112and114through channel output vectors113and115, respectively. Channel output vectors113and115each contain four signals forming two vectors—inphase I and quadriphase Q which are averaged signals of the phase loop discriminator (demodulator) output, and inphase dI and quadriphase dQ—averaged signals of the code loop discriminator (demodulator) output.

ASIC chip110may also contain channel calibration module116. In one example, channel calibration module116may receive ADC signal109which contains the GLONASS satellite signals down-converted to intermediate frequencies. In one example, the channel calibration module116may be tunable to any of the down-converted intermediate frequencies corresponding to the GLONASS satellite frequencies. It should be understood by those skilled in the art that channel calibration module116may include any number of channel inputs to monitor the various GLONASS channels. For example, there may be a channel input dedicated to each GLONASS channel, thus eliminating the need for channel calibration module116to be tunable to any of the GLONASS channel frequencies.

Channel calibration module116may further include circuitry for generating a calibrating carrier signal122and a reference signal (e.g. calibrating PN signal124). Carrier signal122is a carrier signal to be modulated by calibrating PN signal124at a frequency corresponding to the channel that calibration module116is calibrating. The modulated carrier signal122is a calibration signal which imitates the ranging signal of a GLONASS satellite as if it were operating with the same time clock as the receiver. Thus, the “satellite” signal (modulated carrier signal122) transmission time is known at the receiver by calculating the difference in code delay and phase shift between the received calibration signal and the transmitted calibration signal.

In one example, the calibrating PN signal124is separable from the PN signal component contained within GLONASS signal102. For example, the calibrating PN signal124may be orthogonal to the PN signal component of GLONASS signal102. It should be understood by one of ordinary skill in the art that the reference signal (e.g., calibrating PN signal124) normally refers to the baseband signal, but as it passes through the front end circuitry, it refers to the reference signal up-converted to a frequency matching that of the satellite signal.

In one example, calibrating PN signal124is sent through front-end circuitry of the receiver, wherein front end circuitry of the receiver refers to the circuitry of the receiver between the antenna and the GLONASS channel receiver. In one example, the front end circuitry is comprised of high frequency combiner104, GLONASS RF circuits106, and ADC108. However, those skilled in the art will recognize that front end circuitry may be comprised of additional or fewer components depending on various receiver electronic component configurations.

In one example, calibration module116may sequentially rotate through each of the GLONASS channels in order to ensure continued calibration of each channel. For instance, calibration module116may switch the calibrating channel after a predetermined length of time in order to account for changes in receiver bias over time. In another example, calibration module116may switch channels based on user selection.

Channel calibration module116may also determine the inter-channel bias of the receiver due to the varying frequencies of the different channels. Channel calibration module116accomplishes this by comparing the received calibrating PN signal124embedded within ADC signal109, with its internal PN signal. Channel calibration module116may also generate output vectors contained within calibration module output signals117-120. Calibration module output signals117-120are similar to channel output vectors113and115as they contain four signals forming two vectors—inphase I, quadriphase Q, inphase dI, and quadriphase dQ.

Calibration module output signals117-120may be sent to microprocessor132which may use these signals to reduce the inter-channel bias by adjusting the range and phase determined by the various GLONASS channels. It should be understood by one of ordinary skill in the art that reduce can mean completely or partially eliminate the inter-channel bias. Using calibration module output signals117-120, the microprocessor132can calculate range and phase corrections using the following equations:

In the above equations, ΔP represents the phase correction component and ΔR represents the range correction component of the correction signals generated by microprocessor132. Q is the quadriphase signal and I is the inphase signal, which are averaged signals of the phase loop discriminator (demodulator) output generated by channel calibration module116. dI is the inphase signal and dQ is the quadriphase signal, which are averaged signals of the code loop discriminator (demodulator) output generated by channel calibration module116. The subscript “C” indicates that these signals are received from channel calibration module116. The subscript “(1−N)” denotes the channel number (e.g., QC(3)is the quadriphase signal output from channel3of calibration module116) corresponding to the signal, where channel calibration module116contains N channels. “Arc” is an abbreviation for the trigonometric function, arctangent. K is a scaling factor coefficient which may be used to account for differences in the gain of adders220,225,245, and250. Letting L be the gain of adders220and225and letting M be the gain of adders245and250results in a scaling factor coefficient of K=L/M. The scaling factor ensures direct proportionality between dI and ΔR.

As discussed above, channel calibration module116may contain the same or a different number of channels than receiver100. Thus, with respect to receiver100, N may represent the number of channels in receiver100rather than the number of channels in calibration module116.

In one example, equation 1.1 is used by microprocessor132to generate code frequency/phase control signal258. Microprocessor132may also use equation 2.1 to generate carrier frequency/phase control signal259. As used herein, “correction signal” refers to code frequency/phase control signal258and carrier frequency/phase control signal259. While channels112and114are shown receiving the same code frequency/phase control signal258and carrier frequency/phase control signal259, it should be appreciated by one of ordinary skill in the art that each channel may receive correction signals that are specific for that channel. For example, channel112may receive correction signals that are generated while calibration module116is tuned to the frequency of channel112. Also, when calibration module116is later tuned to the frequency of channel114, channel112may continue to receive the same correction signals that were received while calibration module116was previously tuned to the frequency of channel112. Further, channel114may receive the correction signals that are generated while calibration module116is tuned to channel114.

In tracking mode, the above equations may be simplified using an approximation due to the fact that generally Q<<I. The simplified equations are:

InFIG. 1, microprocessor132is depicted overlaying the border of ASIC110. It should be understood that microprocessor132may be a separate unit from ASIC110or may alternatively be embedded within ASIC110. In one example, the above computations are executed in microprocessor132. In another example, the above computations may alternatively be performed in ASIC110.

Inter-channel bias calibrating receiver100may also contain up converter128. Up converter128may convert the frequency of modulated signal127to the frequency of GLONASS signal102. In one example, modulated signal127is sent to up converter128where the frequency of the signal is increased to match that of GLONASS signal102. The up-converted signal is calibration signal129. Calibration signal129may be sent to high frequency combiner104where it is combined with GLONASS signal102to create combined signal105. Calibrating signal129provides a reference PN code imposed on a corresponding GLONASS carrier frequency to be used by calibration unit116to determine code (group) delay and carrier phase shift caused by the front end circuitry.

Inter-channel bias calibrating receiver100may also contain local oscillator reference130. Local oscillator reference130may generate oscillator reference signal131. In one example, oscillator reference signal131may be sent to up converter128, GLONASS RF circuitry106, and ASIC chip110. It should be understood by those skilled in the relevant art that oscillator reference signal131may be sent to other components of the inter-channel bias calibrating receiver100that require an oscillator reference. In one example, local oscillator reference130generates a stable reference frequency required by all RF circuitries for frequency conversions and provides the reference clock for digital processing in ASIC and receiver time counting.

FIG. 2illustrates an exemplary schematic diagram of calibration module116. In one example, calibration module116generates a reference signal to be propagated through the front end circuitry of inter-channel bias calibrating receiver100. Calibration module116may also measure a delay associated with the front end circuitry by comparing the delayed reference signal with the sent reference signal. Calibration module116may use the measured delay to reduce the inter-channel bias of the receiver associated with the front end circuitry.

In one example, calibration module116receives ADC signal109which may be sent to digital multipliers205and230. Digital multipliers205and230multiply ADC signal109with PN code signal256to generate correlator signal206and discriminator signal231, respectively. Correlator signal206represents the correlation between the incoming GLONASS signal and the reference signal generated by PN generator255. Discriminator signal231represents the misalignment (error) between the incoming PN code embedded within ADC signal109and the reference PN code generated by PN generator255.

In one example, correlator signal206may be sent to digital multiplier210and215. Digital multiplier210multiplies correlator signal206with sine signal208to generate signal211. Signal211is then sent to adder220, an accumulating adder, meaning it adds the incoming sequence of numbers to previously stored values from previous clock cycles. Thus, adder220acts as a digital filter on the correlator structure, averaging the incoming signal over a period of time. In one example, the period of time may be 1 ms. The output of adder220is calibration module output signal117which is the I (Inphase) component of the calibration module output signal sent to microprocessor132.

In one example, correlator signal206is also sent to digital multiplier215. Digital multiplier215multiplies correlator signal206with cosine signal214to generate signal216. Signal216is then sent to adder225, an accumulating adder, adding the incoming sequence of numbers to previously stored values from previous clock cycles. Thus, adder225acts as a digital filter on the correlator structure, averaging the incoming signal over a period of time. In one example, the period of time may be 1 ms. The output of adder225is calibration module output signal118which is the Q (Quadriphase) component of the calibration module output signal sent to microprocessor132.

In one example, discriminator signal231may be sent to digital multiplier235and240. Digital multiplier235multiplies discriminator signal231with cosine signal214to generate signal236. Signal236is then sent to adder245, an accumulating adder, meaning it adds the incoming sequence of numbers to previously stored values from previous clock cycles. Thus, adder245acts as a digital filter on the discriminator structure, averaging the incoming signal over a period of time. In one example, the period of time may be 1 ms. The output of adder245is calibration module output signal119which is the dQ (derivative of Quadriphase) component of the calibration module output signal sent to microprocessor132.

In one example, discriminator signal231is also sent to digital multiplier240. Digital multiplier240multiplies discriminator signal231with sine signal208to generate signal241. Signal241is then sent to adder250, an accumulating adder, adding the incoming sequence of numbers to previously stored values from previous clock cycles. Thus, adder250acts as a digital filter on the discriminator structure, averaging the incoming signal over a period of time. In one example, the period of time may be 1 ms. The output of adder250is calibration module output signal120which is the dI (derivative of Iphase) component of the calibration module output signal sent to microprocessor132.

In one example, calibration module116may also receive oscillator reference signal131as an input. Oscillator reference signal131may be sent to code NCO260. Code NCO260receives oscillator reference signal131and code frequency/phase control signal258. Code frequency/phase control signal258is generated by microprocessor132using calibration module output signals117-120and equation 2.1 listed above. Code NCO260uses oscillator reference signal131and code frequency/phase control signal258to generate code NCO signal261to drive PN generator255. PN generator uses NCO signal261to create PN code signal256.

In one example, Oscillator reference signal131may also be sent to numerically controlled oscillator270(carrier NCO). Carrier NCO270receives oscillator reference131and carrier frequency/phase control signal259. Carrier frequency/phase control signal259is generated by microprocessor231using calibration module output signals117-120and equation 1.1 listed above. Carrier NCO270uses oscillator reference signal131and carrier frequency/phase control signal259to generate carrier NCO signal258. Carrier NCO signal258is sent to sine/cosine table265to generate a reference carrier signal with a desired frequency and phase. Sine/cosine table265generates sine signal208and cosine signal214.

In one example, calibration module116may also include digital to analog converters (DAC)275and280. DAC275receives PN code signal256from PN generator255. DAC275converts the digital input signal into calibrating PN signal124, an analog signal. Likewise, DAC280receives digital sine signal208and converts it into calibrating carrier signal122, an analog signal.

FIG. 3illustrates a schematic diagram of an exemplary GLONASS channel. In one example, channels112and114are represented by the schematic diagram illustrated byFIG. 3. The schematic diagram ofFIG. 3is identical to that ofFIG. 2with the exception thatFIG. 3does not contain DAC275and280and their respective input and output signals.

FIG. 4illustrates a typical computing system400that may be employed to implement processing functionality in embodiments of the invention. Computing systems of this type may be used in clients and servers, for example. Those skilled in the relevant art will also recognize how to implement the invention using other computer systems or architectures. Computing system400may represent, for example, a desktop, laptop or notebook computer, hand-held computing device (PDA, cell phone, palmtop, etc.), mainframe, server, client, or any other type of special or general purpose computing device as may be desirable or appropriate for a given application or environment. Computing system400can include one or more processors, such as a processor404. Processor404can be implemented using a general or special purpose processing engine such as, for example, a microprocessor, microcontroller or other control logic. In this example, processor404is connected to a bus402or other communication medium.

Computing system400may also include a main memory408, such as random access memory (RAM) or other dynamic memory, for storing information and instructions to be executed by processor404. Main memory408also may be used for storing temporary variables or other intermediate information during execution of instructions to be executed by processor404. Computing system400may likewise include a read only memory (“ROM”) or other static storage device coupled to bus402for storing static information and instructions for processor404.

The computing system400may also include information storage system410, which may include, for example, a media drive412and a removable storage interface420. The media drive412may include a drive or other mechanism to support fixed or removable storage media, such as a hard disk drive, a floppy disk drive, a magnetic tape drive, an optical disk drive, a CD or DVD drive (R or RW), or other removable or fixed media drive. Storage media418, may include, for example, a hard disk, floppy disk, magnetic tape, optical disk, CD or DVD, or other fixed or removable medium that is read by and written to by media drive412. As these examples illustrate, the storage media418may include a computer-readable storage medium having stored therein particular computer software or data.

In alternative embodiments, information storage system410may include other similar components for allowing computer programs or other instructions or data to be loaded into computing system400. Such components may include, for example, a removable storage unit422and an interface420, such as a program cartridge and cartridge interface, a removable memory (for example, a flash memory or other removable memory module) and memory slot, and other removable storage units422and interfaces420that allow software and data to be transferred from the removable storage unit418to computing system400.

Computing system400may also include a communications interface424. Communications interface424can be used to allow software and data to be transferred between computing system400and external devices. Examples of communications interface424can include a modem, a network interface (such as an Ethernet or other NIC card), a communications port (such as for example, a USB port), a PCMCIA slot and card, etc. Software and data transferred via communications interface424are in the form of signals which can be electronic, electromagnetic, optical or other signals capable of being received by communications interface424. These signals are provided to communications interface424via a channel428. This channel428may carry signals and may be implemented using a wireless medium, wire or cable, fiber optics, or other communications medium. Some examples of a channel include a phone line, a cellular phone link, an RF link, a network interface, a local or wide area network, and other communications channels.

In this document, the terms “computer program product,” “computer-readable storage medium” and the like may be used generally to refer to physical, tangible media such as, for example, memory408, storage media418, or storage unit422. These and other forms of computer-readable storage media may be involved in storing one or more instructions for use by processor404, to cause the processor to perform specified operations. Such instructions, generally referred to as “computer program code” (which may be grouped in the form of computer programs or other groupings), when executed, enable the computing system400to perform features or functions of embodiments of the present invention. Note that the code may directly cause the processor to perform specified operations, be compiled to do so, or be combined with other software, hardware, or firmware elements (e.g., libraries for performing standard functions) to do so.

In an embodiment where the elements are implemented using software, the software may be stored in a computer-readable storage medium and loaded into computing system400using, for example, removable storage media418, drive412, or communications interface424. The control logic (in this example, software instructions or computer program code), when executed by the processor404, causes the processor404to perform the functions of the invention as described herein.

It will be appreciated that the above description for clarity has described embodiments of the invention with reference to different functional units. However, it will be apparent that any suitable distribution of functionality between different functional units may be used without detracting from the invention. Hence, references to specific functional units are only to be seen as references to suitable means for providing the described functionality rather than indicative of a strict logical or physical structure or organization.

Although the present invention has been described in connection with some embodiments, it is not intended to be limited to the specific form set forth herein. Rather, the scope of the present invention is limited only by the claims. Additionally, although a feature may appear to be described in connection with a particular embodiment, one skilled in the art would recognize that various features of the described embodiments may be combined in accordance with the invention. Moreover, aspects of the invention describe in connection with an embodiment may stand alone as an invention.

Moreover, it will be appreciated that various modifications and alterations may be made by those skilled in the art without departing from the spirit and scope of the invention. The invention is not to be limited by the foregoing illustrative details, but is to be defined according to the claims.