RAID control method and core logic device having RAID control function

In a computer system including a central processing unit, a system memory, a south bridge module, a north bridge module and multiple hard disk drives, a RAID control function is exhibited. The method includes steps of: issuing a command addressing to the south bridge module by the central processing unit; and performing a fault-tolerant computing operation in the north bridge module while exempting from transmitting the command to the south bridge module when the command contains a specified address data.

FIELD OF THE INVENTION

The present invention relates to a core logic device, and more particular to a core logic device of a computer system having a RAID control function. The present invention also relates to a RAID control method, and more particularly to a RAID control method for use in a computer system.

BACKGROUND OF THE INVENTION

Due to the amazing power of computers, computers are widely used to implement diversified tasks such as data processing tasks, amusement-related tasks or communication tasks. With the increasing development of digitalized generation, the data storage density for the conventional data storage media might become unsatisfactory soon for receiving and storing a great amount of data. For dealing with such a problem, a single data storage medium with a very large quantity of storage capacity or a plurality of data storage media are used in a computer system. Conventionally, data stored in a data storage medium are read via a disk drive that is operated mechanically. Therefore, the operating speed of the disk drive likely fails to catch up with the high processing speed of the central processing unit (CPU). For matching the operating speed of the disk drive and the processing speed of the central processing unit, a configuration of RAID (Redundant Array of Inexpensive Disk) is proposed. In the RAID system, multiple disk drives are used to store the same data in order to increase the data transfer rate and data security. In a case that one of the multiple disk drives has a breakdown, the lost data can be restored according to an interactive encoding technology among the disk drives.

Referring toFIG. 1, a RAID configuration is schematically illustrated. The RAID system includes three hard disk drives101,102and103and exhibits a parallel-with-parity function. The hard disk drives101and102are used to store respective data while the third hard disk drive103is for storing parity data obtained by operating the data in the hard disk drives101and102for securing data. For example, assuming a data D1is stored in a first block of the hard disk drive101, and a data D2is stored in a second block of the hard disk drive102, wherein the first block and the second block have the same addresses. Meanwhile, in a third block of the hard disk drive103having the same address as the first and second blocks, a polarity data P, which is obtained by way of an exclusive OR gate (XOR) operation of the data D1and D2and expressed as P=D1⊕D2, is stored.

With the presence of polarity data, associated data, if lost, can be rebuilt. For example, if the hard disk drive102is damaged so as to lose the data D2, then the data D1and the polarity data P can be read from the hard disk drives101and103to perform a logical XOR operation D1⊕P, thereby rebuilding the data D2. In principle, all the data previously stored in the damaged hard disk drive102can be rebuilt based on the corresponding data in the first and third hard disk drives101and103, and stored back to the hard disk drive102after it is fixed up. It is understood that for offering the fault-tolerant benefits of RAID, it is necessary, when a data in one of the hard disk drives is overwritten, to make additional efforts to read and write data from/to hard disk drives other than the hard disk drive actually accessed. For example, in a case that the data D1is refreshed as D1′, the data D2stored in the hard disk drive102needs to be read out and subjected to a XOR operation with the data D1′ to update the polarity data in the hard disk drive103to P′=D1′⊕D2.

Since general self-supporting RAID systems are undesirable in cost and size, a cost-effective RAID card capable of being integrated into a computer casing is developed. Referring toFIG. 2, a schematic block diagram of a RAID card used with a computer system is illustrated. The RAID card20is to be mounted in a computer system2and electrically connected to a core-logic chipset21of the computer system2. By executing a RAID card driver, the RAID card20is made communicable with the operating system of the computer system2for reading and writing tasks. The RAID card20principally includes a memory201serving as a data buffer, a computing unit202for fault-tolerant computing, and a bus controller203. In this embodiment, the RAID card20is in communication with three hard disk drives27,28and29which are accessed via the bus controller203.

As described above, the RAID card20needs the memory201for data buffering. Generally, with the increase of the storage space of the memory201, which is desired for the enhancement of access efficiency, the cost of the RAID card20undesirably increases. Then the advantages achievable by the RAID card is adversely affected

For assuring of cost-effectiveness, a software RAID system with the memory201and the computing unit202being exempted from the RAID card20is developed. By executing RAID software, the system memory and the central processing unit of the computer system are responsible for data buffering and fault-tolerant computing. Since no additional hardware components (e.g. the memory201and the computing unit202) are required, the cost of the software RAID system is reduced. The software RAID system, however, may impair the performance of the computer system because the system memory and the central processing unit of the computer system are additionally occupied to execute the RAID function.

SUMMARY OF THE INVENTION

The present invention provides a core logic device having a RAID control function so as to exempt from using a RAID card.

The present invention provides a core logic device having a RAID control function so as to exempt from occupying the CPU resource.

The present invention provides a RAID control method having a fault-tolerant computing function performed in a north bridge module of a computer system.

In an embodiment, the present invention relates to a core logic device of a computer system having a RAID control function. The computer system includes a central processing unit, a system memory and multiple hard disk drives. The core logic device includes a south bridge module disposed therein a hard disk drive controller in communication with the hard disk drives for controlling the access to the hard disk drives; and a north bridge module disposed therein an address identifying unit in communication with the central processing unit for discriminating a command received from the central processing unit, and a fault-tolerant data computing unit in communication with the address identifying unit and the system memory for receiving the command optionally transferred by the fault-tolerant data computing unit and executing a fault-tolerant computing operation of specified data in the system memory according to the command.

In another embodiment, the present invention relates to a core logic device of a computer system having a RAID control function. The computer system includes a central processing unit, a system memory and multiple hard disk drives. The core logic device includes a hard disk drive controller in communication with the hard disk drives for controlling the access to the hard disk drives; an address identifying unit in communication with the central processing unit for discriminating a command received from the central processing unit; and a fault-tolerant data computing unit in communication with the address identifying unit and the system memory for receiving the command optionally transferred by the fault-tolerant data computing unit and executing a fault-tolerant computing operation of specified data in the system memory according to the command.

In a further embodiment, the present invention relates to a RAID control method for use in a computer system. The computer system includes a central processing unit, a system memory, a south bridge module, a north bridge module and multiple hard disk drives. The RAID control method includes steps of: issuing a command addressing to the south bridge module by the central processing unit; and performing a fault-tolerant computing operation in the north bridge module while exempting from transmitting the command to the south bridge module when the command contains a specified address data.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

As described above, fault-tolerant computing operations are essential to RAID control, but the implementation of the fault-tolerant computing function with an additional RAID card would not be cost-effective enough. The present invention thus imparts the fault-tolerant computing function to an existing device in the computer system, e.g. a core logic device, so as to reduce cost and size. Preferably but not necessarily, an existing memory such as a system memory of the computer system may serve as the data buffer required for RAID control, which is conventionally disposed in the RAID card.

Refer toFIG. 3, which illustrates a schematic functional block diagram of a computer system including a core logic device having a RAID control function according to an embodiment of the present invention. The core logic device32in the computer system3is electrically connected to a central processing unit (CPU)30, a system memory31and at least three hard disk drives390,391and392configured as a RAID, and works with an operating system38. The core logic device32is, for example, a chipset including a north bridge module320and a south bridge module321.

The south bridge module321includes a hard disk drive controller, which may be implemented with an advanced host controller interface (AHCI)3210, and integrated therein a bus controller32100and a first register set32101. An example of the bus controller32100is an IDE (Integrated Drive Electronics) controller. The first register set32101has an address specified as a PCI device and used for storing information of start address and address range of a first block defined in a memory space managed by the operating system38. The first block of the memory space is defined for the use of the advanced host controller interface (AHCI)3210. On the other hand, the north bridge module320includes a second register set3200, an address identifying unit3201and a fault-tolerant data computing unit3202. The second register set3200also has an address specified as a PCI device for storing information of a start address and an address range of a second block defined in the memory space managed by the operating system38. The second block of memory space serves as a data buffer required for the control operation of a RAID such as RAID3, RAID5, etc.

When a command for controlling a peripheral device such as a PCI device is issued by the CPU30, it is supposed to be transmitted to the south bridge module321via the north bridge module320. In the present embodiment, the address identifying unit3201in the north bridge module320, after receiving the command from the CPU30, detects an address data included in the command before transmitting it to the south bridge module321. If the address data is determined to conform to the address of the fault-tolerant data computing unit3202, which is specified as a PCI device, it means the command relates to a fault-tolerant data computing operation of data in the RAID. Then the command will be transferred to the fault-tolerant data computing unit3202to be processed instead of being directed to the south bridge module321.

An example of a process of writing data into the RAID with the application of the above-described RAID control manner is illustrated in the flowchart ofFIG. 5. For overwriting a data D1in the hard disk drive390with a new data D1′, the operating system38first writes the data D1′ into a block of the system memory31, which is defined for the use of the CPU30by the operating system38(Step501). Meanwhile, the operating system38issues a writing command to a hard disk driver (Step502). In response to the writing command, the driver reads out a data D2stored in the hard disk drive391at the same address as the data D1in the hard disk drive390and writes the data D2into another block of the system memory31, which is defined for data buffering by the operating system38(Step503). Meanwhile, the driver generates an XOR logic operation command to request an XOR logic operation of the data D1′ and D2(Step504). The CPU30then issues the XOR logic operation command toward the AHCI3210via the address identifying unit3201in the north bridge module320(Step505). The address identifying unit3201confirms if the command received from the CPU30contains an address data conforming to the address of the fault-tolerant data computing unit3202(Step506). If the address data conforms to the address of the fault-tolerant data computing unit3202, the command will be transferred to the fault-tolerant data computing unit3202to perform the XOR logic operation of the data D1′ and D2so as to obtain an updated polarity data P′=D1′⊕D2(Step507). Otherwise, the command will be sent to the south bridge module321(Step508). Then the data D1′ and P′ can be written into respective hard disk drives390and392to overwrite the previous data D1and P (Step509).

In addition to the memory block defined for the CPU and the memory block defined for the data buffer, the operating system further defines a memory block for the AHCI3210.FIG. 4schematically illustrates the allocation of a memory space managed by the operating system and the correlation of blocks of the memory space to blocks of the system memory according to an embodiment of the present invention. For example, the memory space40managed by the operating system has a size of 4 gigabytes. A first block402defined for the use of AHCI3210has a start address B0000000h and an address size of 4 k bytes, and a second block401defined for data buffering has a start address D0000000h and an address size of 64M bytes. The memory space40further includes a third block400defined for the use of the CPU. Since the system memory31has a memory size of 512M bytes, and the portion411of the system memory31for data buffering occupies 64M bytes, the address size of the third block400is up to 448M bytes. Within the first block402, a section4020is defined for indicating the PCI address of the fault-tolerant data computing unit3202.

It is understood by those ordinary in the art that the RAID configuration is advantageous due to the data-securing capability. In a case that one of the hard disk drives390and391is failed, the lost data in the failed hard disk drive (e.g.391) can be rebuilt according to corresponding data stored in the other hard disk drive (e.g.390) and the parity data stored in the hard disk drive392. Hereinafter, a process of rebuilding lost data is illustrated with reference to the flowchart ofFIG. 6.

For rebuilding a data D2in the hard disk drive391, the operating system38issues a reading command to the hard disk driver (Step601). In response to the reading command, the driver reads out a data D1stored in the hard disk drive390at the same addresses as the data D2in the hard disk drive391and a polarity data P stored in the hard disk drive392at the same addresses as the data D2in the hard disk drive391, and writes the data D1and P into the block411of the system memory31, which is defined as the block401for data buffering by the operating system38(Step602). Meanwhile, the driver generates an XOR logic operation command to request an XOR logic operation of the data D1and P (Step603). The CPU30then issues the XOR logic operation command toward the AHCI3210via the address identifying unit3201in the north bridge module320(Step604). The address identifying unit3201confirms if the command received from the CPU30contains an address data conforming to the address of the fault-tolerant data computing unit3202by determining whether the detected address lies in the address range of the block4020defined by the operating system (Step605). If the address data conforms to the address of the fault-tolerant data computing unit3202, the command will be transferred to the fault-tolerant data computing unit3202to perform the XOR logic operation of the data D1and P so as to rebuild the data D2=D1⊕P (Step606). Otherwise, the command will be sent to the south bridge module321(Step607). Then the data D2can be written into another block410of the system memory31, which is defined by the operating system38as the block400provided for the CPU (Step608), and is ready to be written back to a corresponding hard disk drive, e.g. the fixed hard disk drive391(Step609).

It is understood from the above embodiments, by disposing a fault-tolerant data computing unit in the north bridge module, the CPU will not be frequently occupied to perform the fault-tolerant data computing operation, compared to the software RAID system. As a result, the performance of the computer system can be enhanced. Furthermore, as the fault-tolerant data computing unit is disposed in the north bridge module nearer from the system memory and CPU than the south bridge module, the fault-tolerant data computing operation can be executed with high efficiency. Aside from, since a block of the system memory is exclusively used by the RAID system, which means that the data buffer implemented with the block of the system memory is within an uncache range, it is not necessary to snoop the CPU to access data in the data buffer. Accordingly, the data access efficiency can be improved. Moreover, by disposing the fault-tolerant data computing unit in the north bridge module but disguising the fault-tolerant data computing unit as in the south bridge module, the allocation of the present RAID system is substantially the same as the RAID card as illustrated inFIG. 2. Since the command for requesting the XOR logic operation is issued forward the south bridge module, it makes no difference between the present RAID system and the RAID card for the driver. Therefore, it is compatible with a common driver.

Alternatively, the fault-tolerant data computing unit may be disposed in the south bridge module, which still is advantageous over the RAID card due to reduced cost and size and also advantageous over the software RAID system due to the exemption from occupying the CPU resource. It is also feasible to dispose the fault-tolerant data computing unit in a chip integrated therein both the north bridge module and the south bridge module.