PLASMA SURFACE TREATMENT FOR WAFER BONDING METHODS

A method includes providing a first substrate having a first surface and a second substrate having a second surface, where the first surface and the second surface each include a silicon-based dielectric layer, applying hydrogen plasma to form hydrogen-terminated groups on the silicon-based dielectric layer, applying oxygen plasma to oxidize the silicon-based dielectric layer including the hydrogen-terminated groups, applying nitrogen plasma to the oxidized silicon-based dielectric layer, thereby forming a treated silicon-based dielectric layer, rinsing the treated silicon-based dielectric layer, and coupling the first substrate to the second substrate by physically contacting the rinsed and treated silicon-based dielectric layer on the first surface with the rinsed and treated silicon-based dielectric layer on the second surface.

FIELD OF THE DISCLOSURE

This disclosure relates to microelectronic devices including semiconductor devices, transistors, and integrated circuits, including methods of microfabrication.

BACKGROUND

Wafer-to-wafer, chip-to-chip, and chip-to-wafer bonding are generally implemented to continue power-performance-area-cost (PPAC) scaling for complex circuits such as are implemented in systems on chip (SOCs). Many bonding techniques utilize oxide-to-oxide bonding adhesion and forming integrated interconnect structures through a hybrid bonding technique that enables interconnections to be formed at the bond interface between two wafers or dies. While methods of implementing the various bonding processes have been generally adequate, they are not entirely satisfactory in all aspects. For example, it may be desirable to perform surface treatment to the substrates (e.g., wafers, chips, etc.) before implementing the bonding process to enhance the chemical adhesion between the substrates.

SUMMARY

The present disclosure provides various embodiments for performing a series of plasma treatments to semiconductor substrates to be bonded in a process such as hybrid bonding.

One embodiment may include a method for fabricating a semiconductor structure. The method includes providing a first substrate having a first surface and a second substrate having a second surface, where the first surface and the second surface each include a dielectric layer. The method includes treating the first surface and the second surface. The method includes rinsing the first surface and the second surface to hydrolyze the treated dielectric layer. The method further includes coupling the hydrolyzed and treated dielectric layer on the first surface with the hydrolyzed and treated dielectric layer on the second surface. In the present embodiments, the step of treating the first surface and the second surface includes performing a hydrogen plasma treatment to form hydrogen-terminated groups on the dielectric layer, performing an oxygen plasma treatment to oxidize the dielectric layer with the hydrogen-terminated groups, and subsequently performing a nitrogen plasma treatment to the oxidized dielectric layer to form a treated dielectric layer.

The dielectric layer may include a silicon-containing dielectric material. The dielectric layer may include a carbon-containing group, a nitrogen-containing group, or both. For embodiments in which the dielectric layer includes the carbon-containing group, performing the hydrogen plasma treatment forms the hydrogen-terminated groups that include —CH2. For embodiments in which the dielectric layer includes the nitrogen-containing group, performing the hydrogen plasma treatment forms the hydrogen-terminated groups that include —NH.

The step of performing the oxygen plasma treatment forms a volatile compound. The volatile compound includes HNO, CH2O, or both.

Another embodiment may include a method for fabricating a semiconductor structure. The method includes providing a first substrate having a first surface and a second substrate having a second surface, where the first surface and the second surface each include a silicon-based dielectric layer. The method includes applying hydrogen plasma to form hydrogen-terminated groups on the silicon-based dielectric layer. The method includes applying oxygen plasma to oxidize the silicon-based dielectric layer including the hydrogen-terminated groups. The method includes applying nitrogen plasma to the oxidized silicon-based dielectric layer, thereby forming a treated silicon-based dielectric layer. The method includes rinsing the treated silicon-based dielectric layer. The method further includes coupling the first substrate to the second substrate by physically contacting the rinsed and treated silicon-based dielectric layer on the first surface with the rinsed and treated silicon-based dielectric layer on the second surface.

The step of applying the oxygen plasma forms a first compound including —Si—O—Si— groups and a second compound including HNO, CH2O, or both, in the oxidized silicon-based dielectric layer. The step of applying the nitrogen plasma treatment forms —NO groups in the treated silicon-based dielectric layer. The step of rinsing the first surface and the second surface includes reacting deionized water (DI H2O) with the —NO groups in the treated silicon-based dielectric layer to form —OH groups. The step of coupling the first substrate to the second substrate includes reacting the —OH groups in the hydrolyzed and treated dielectric layer of the first surface with the —OH groups in the hydrolyzed and treated dielectric layer of the second surface.

The step of coupling the first substrate to the second substrate includes aligning the rinsed and treated silicon-based dielectric layer on the first surface to face the rinsed and treated silicon-based dielectric layer on the second surface. The step of coupling the first substrate to the second substrate includes physically contacting the aligned first surface and second surface. The step of coupling the first substrate to the second substrate further includes subsequently thinning the first substrate, the second substrate, or both.

The first surface and the second surface each further include an interconnect structure disposed adjacent the dielectric layer, and the step of coupling the first substrate to the second substrate includes physically contacting the interconnect structure of the first surface with the interconnect structure of the second surface.

Yet another embodiment may include a method for fabricating a semiconductor structure. The method includes providing a first substrate having a first surface and a second substrate having a second surface, where the first surface and the second surface each include a dielectric feature. The method includes applying surface treatment to the dielectric feature. The method includes coupling the first substrate to the second substrate by physically contacting the hydrolyzed and treated dielectric layer on the first surface with the hydrolyzed and treated dielectric layer on the second surface. In the present embodiments, the step of applying the surface treatment includes applying hydrogen plasma to form hydrogen-terminated groups on the dielectric feature, applying oxygen plasma to oxidize the dielectric feature having the hydrogen-terminated groups, applying nitrogen plasma to the oxidized dielectric feature, thereby forming a treated dielectric feature on the first surface and the second surface, and hydrolyzing the treated dielectric feature.

The hydrogen-terminated groups include —NH, —CH2, or both. The first surface and the second surface each include a conductive feature adjacent the dielectric feature, and the step of coupling the first substrate to the second substrate further includes aligning the conductive feature of the first surface with the conductive feature of the second surface.

These and other aspects and implementations are discussed in detail below. The foregoing information and the following detailed description include illustrative examples of various aspects and implementations, and provide an overview or framework for understanding the nature and character of the claimed aspects and implementations. The drawings provide illustrations and a further understanding of the various aspects and implementations, and are incorporated in and constitute a part of this specification. Aspects can be combined, and it will be readily appreciated that features described in the context of one aspect of the invention can be combined with other aspects. Aspects can be implemented in any convenient form. As used in the specification and in the claims, the singular form of “a,” “an,” and “the” include plural referents unless the context clearly dictates otherwise.

DETAILED DESCRIPTION

According to one embodiment, a method of implementing surface treatment on a semiconductor substrate for a substrate bonding process is provided. By performing a series of sequential plasma treatments on a dielectric surface exposed on a semiconductor substrate (e.g., a wafer) before coupling or physically connecting the two wafers (or dies), extent of active oxidation reaction between treated dielectric surfaces may be enhanced and the overall chemical bonding between the semiconductor substrates may be improved.

FIG.1Aillustrates a flowchart of an example method100for bonding or coupling surfaces of two wafers (e.g., a first wafer202and a second wafer204), a die and a wafer, or two dies to be bonded (e.g., coupled) together to form a semiconductor structure (alternatively referred to as a semiconductor package)200, according to some embodiments of the present disclosure.FIG.1Billustrates a flowchart of an example method150for implementing the plasma treatments at operation102of the method100, according to some embodiments of the present disclosure. It is noted that the methods100and150are merely examples and are not intended to limit the present disclosure. Accordingly, it is understood that additional operations may be provided before, during, and after the method100ofFIG.1and/or the method150ofFIG.1B, and that some other operations may only be briefly described herein.

In various embodiments, operations of the methods100and150may be associated with an example semiconductor structure200at various fabrication stages, which will be discussed in further detail below. It should be understood that the semiconductor structure200may include a number of other devices such as inductors, fuses, capacitors, coils, etc., while remaining within the scope of the present disclosure. The methods100and150are illustrated inFIGS.2A-10according to some embodiments of the present disclosure.FIGS.2A,3A,4A,5A,6A,7A,8A,9, and10each illustrate a three-dimensional perspective view of a first wafer (or first substrate)202and a second wafer (or second substrate)204at intermediate operations of the methods100and/or150.FIGS.2B,7B, and8Beach illustrate a cross-sectional view of the first wafer202and the second wafer204(or collectively, the semiconductor structure200) taken along line AA′ ofFIGS.2A,7A, and8A, respectively.FIGS.3B,3C,4B,4C,5B,6B, and8Care schematic illustrations of chemical reactions that may occur at a top surface of each of the first wafer202and the second wafer204at intermediate operations of methods100and/or150.FIGS.4D and5C-5Fare schematic molecular dynamic (MD) simulation results of chemical reactions occurring at intermediate operations of methods100and/or150. It is noted that the schematic chemical reactions and MD simulation results are merely examples and not intended to limit the present disclosure.

The present disclosure provides a method of treating surfaces of two wafers, e.g., the first wafer202and the second wafer204, before merging or bonding the wafers to form the semiconductor structure200. Although the depicted embodiments are directed to a wafer-to-wafer bonding configuration, the surface treatment method provided herein may also be applicable for other bonding configurations such as die-to-wafer or die-to-die. Furthermore, the term “substrate” may be used interchangeably with the terms “wafer” and “die” throughout the present disclosure. For simplicity and examples, the semiconductor structure200includes the first wafer202being bonded to the second wafer204in a face-to-face (or front-to-front) configuration with the first wafer202being on top of the second wafer204, i.e., the first wafer202corresponds to the top wafer and the second wafer204corresponds to the bottom wafer. Other bonding configurations, such as face-to-back (or front-to-back) may also be applicable. In some instances, one or more materials included in the first wafer202may be different from those included in the second wafer204. In some instances, the one or more materials formed for the first wafer202may be the same as the second wafer204.

Referring toFIGS.1A,2A, and2B, the method100at operation102provides the first wafer202having a first surface206and the second wafer204having a second surface208. In some instances, the first surface206and the second surface208may each be a front side of their corresponding wafers. In some instances, one of the first surface206and the second surface208may be a back side of their corresponding wafers.

The wafers202and204may each be considered a substrate that includes a semiconductor material, such as a bulk semiconductor, a semiconductor-on-insulator (SOI), or the like, which may be doped (e.g., with a p-type or an n-type dopant) or undoped. The substrate may be or correspond to a respective wafer (e.g.,202or204), such as a silicon wafer. Generally, an SOI includes a layer of a semiconductor material formed on an insulator layer. The insulator layer may be, for example, a buried oxide (BOX) layer, a silicon oxide layer, or the like. The insulator layer is provided on a substrate, typically a silicon or glass substrate. Other substrates, such as a multi-layered or gradient substrate may also be used. In some embodiments, the semiconductor material of the substrate may include silicon; germanium; a compound semiconductor including silicon carbide, gallium arsenic, gallium phosphide, indium phosphide, indium arsenide, and/or indium antimonide; an alloy semiconductor including SiGe, GaAsP, AlInAs, AlGaAs, GaInAs, GaInP, and/or GaInAsP; or combinations thereof. In some embodiments, the wafers202and204differ in composition.

In some embodiments, referring toFIGS.2B and2C, the wafers202and204each include a number of device features (e.g., transistors, diodes, resistors, etc.; not depicted separately for the sake of clarity) and a number of interconnect structures (alternatively referred to as conductive features)210formed over the device features. The interconnect structures210are configured to electrically connect the device features to one another so as to form an integrated circuit, which can function as a logic device, a memory device, an input/output device, or the like. The interconnect structures210may include horizontal interconnect structures, such as metal lines, and vertical interconnect structures, such as vias. In some embodiments, the interconnect structures210each include a conductive layer comprising any suitable conductive material, such as Cu, Al, W, Ru, other suitable materials, or combinations thereof. In some embodiments, the interconnect structures210each include the conductive layer over a barrier layer, which may include Ti, Ta, TiN, TaN, other suitable materials, or combinations thereof.

In the depicted embodiments, the interconnect structures210are embedded in a dielectric layer211, which may be a passivation layer. As shown inFIG.2B, the dielectric layer211can be around or surround the sidewall and bottom of the interconnect structures210. The dielectric layer211may exposes the top surface of the interconnect structures210. The dielectric layer211may extend at least from the bottom of the interconnect structures210and along sidewalls of the interconnect structures210. The top surface of the interconnect structures210may be substantially even or slightly recessed with respect to a plane of the top surface of the dielectric layer211. The interconnect structures210may be formed in any suitable process, such as one or more damascene processes.

In the present embodiments, the wafers202and204each further include a dielectric layer (alternatively referred to as a dielectric feature)212over the dielectric layer211and adjacent the interconnect structures210. In some embodiments, the dielectric layer212is configured to accommodate fusion of the first surface206to the second surface208. The dielectric layer212may sometimes be referred to as a bonding layer. In some embodiments, the dielectric layer212is formed as a blanket layer over the dielectric layer211and the interconnect structures210, and openings are subsequently formed in the dielectric layer212to expose the top surface of the interconnect structures210. The dielectric layer212may be formed or deposited using at least one suitable deposition technique, such as chemical vapor deposition (CVD), flowable CVD (FCVD), atomic layer deposition (ALD), spin coating, other suitable techniques, or combinations thereof.

In some embodiments, the dielectric layer212includes a low-k (e.g., having a dielectric constant k less than that of silicon oxide, or SiO2, which is about 3.9) dielectric material. In some embodiments, the dielectric layer212includes more than one type of dielectric materials, such that dielectric materials of different compositions are exposed on the first surface206and/or the second surface208. In the present embodiments, the dielectric layer212includes one or more silicon-based (or silicon-containing) dielectric materials, such as silicon nitride (SiN), silicon carbonitride (SiCN), silicon oxide (SiO2), silicon oxynitride (SiON), silicon oxycarbonitride (SiOCN), other dielectric materials, or combinations thereof. In some embodiments, the silicon-based dielectric materials include carbon (C), nitrogen (N), oxygen (O), or combinations thereof.

In some embodiments, the top surface of the interconnect structures210is recessed with respect to the top surface of the dielectric layer212to form a trench213, as depicted inFIG.2B. In this regard, the dielectric layer212protrudes from the top surface of the dielectric layer211by a predetermined height configured for the fabrication/formation/manufacturing process of the semiconductor structure200, such as about 1 nm to about 10 nm, among others. In this instance, a depth of the trench213for the top surface of the interconnect structures210may correspond to a thickness of the dielectric layer212. At this stage, the interconnect structures210may be coplanar, or substantially coplanar, with the top surface of the dielectric layer211below the dielectric layer212.

In some embodiments, the wafers202and204are merged (or coupled) by bonding (through a hybrid bonding process, for example) the interconnect structures210and the dielectric layer212of the first surface206with the interconnect structures210and the dielectric layer212of the second surface208, respectively. In the depicted embodiments, the dielectric layer212is formed on the front side of the first wafer202and the second wafer204. In some instances, the dielectric layer212may also be formed on the backside of the first wafer202and/or the second wafer204.

Referring toFIG.1A, the method100at operation104proceeds to performing a series of plasma surface treatments to the first surface206and the second surface208in preparation for the subsequent merging process. In the present embodiments, performing the series of plasma treatments is implemented by the method150as depicted inFIGS.1B and3A-5F.

Referring toFIGS.1B and3A-3C, the method150at operation152performs a hydrogen plasma treatment302to the first surface206and the second surface208. In the present embodiments, the hydrogen (H2) plasma treatment302is configured to introduce hydrogen-terminated groups to the dielectric layer212exposed on the first surface206and the second surface208, thereby chemically modifying the dielectric layer212. In the present embodiments, the hydrogen-terminated groups modify the dielectric layer212such that the tendency for forming a more oxidized dielectric layer212(or portions thereof) on the first surface206and second surface208during subsequent plasma treatments is improved.

Depending on the specific composition of the dielectric layer212, parameters of the hydrogen plasma treatment302may be tuned to ensure appropriate conditions are met for the chemical reactions to occur and/or to maximize the yield of the chemical reactions. For instance, the power of the hydrogen plasma may be about 5 W to about 1000 W, the pressure of the hydrogen gas used to form the plasma may be about 50 mTorr to about 500 mTorr, and the temperature may be about 100 degrees Celsius to about 200 degrees Celsius. These parameters are merely examples and do not limit the present embodiments as such. In some embodiments, any hydrogen molecules adsorbed at the surface of the dielectric layer212dissociate during the subsequent plasma treatment(s).

For embodiments in which the dielectric layer212includes a silicon-and-nitrogen-containing dielectric material, such as silicon nitride (SiN or Si3N4) and silicon oxynitride (SiON), referring toFIG.3B, hydrogen radicals (H·)320imparted by the hydrogen plasma treatment302react with —NR groups322of the dielectric layer212to form —NH groups324at the surface of the dielectric layer212, where R may be any suitable groups consistent with the composition of the dielectric layer212. For embodiments in which the dielectric layer212includes a silicon-and-carbon-containing dielectric material, such as silicon carbonitride (SiCN) and silicon oxycarbonitride (SiOCN), referring toFIG.3C, hydrogen radicals320react with —CR2groups332of the dielectric layer212to form —CH2groups334at the surface of the dielectric layer212, where R may be any suitable groups consistent with the composition of the dielectric layer212. In the present embodiments, R does not include H alone but may include, for example, Si, O, C, other suitable groups, or combinations thereof. In the present embodiments, —NR groups322, —NH groups324, —CR2groups332, and —CH2groups334are bonded to at least one Si atom in the dielectric layer212. In some instances, referring to bothFIGS.3B and3C, the groups present at the surface of the dielectric layer212may differ from those present in the bulk of the dielectric layer212in composition.

In some embodiments, reactions producing —NH groups324and —CH2groups334are independent of each other and may occur concurrently or separately depending on the specific composition of the dielectric layer212. For instances, if the dielectric layer212is free, or substantially free, of any silicon-and-carbon-containing dielectric materials, only the reaction depicted inFIG.3Bwould occur. If the dielectric layer212is free, or substantially free, of any silicon-and-nitrogen-containing dielectric materials, only the reaction depicted inFIG.3Cwould occur. If the dielectric layer212includes both a silicon-and-nitrogen-containing dielectric material and a silicon-and-carbon-containing dielectric material, then reactions depicted in bothFIGS.3B and3Cmay occur. It is noted that the XZ plane in which the dielectric layer212is depicted inFIGS.3B and3Cis for illustration purposes only and is not intended to limit the embodiments of the present disclosure as so.

In some instances, the hydrogen plasma treatment302may also create metal hydride at the first surface206and the second surface208. For example, hydrogen plasma may form Cu—H bonds at the top surface of the interconnect structures210. By adjusting various parameters of the hydrogen treatment302, the impact of Cu—H to the performance of the resulting semiconductor structure200may be reduced or minimized. Alternatively, portions of the first surface206and second surface208including the interconnect structures210may be protected (e.g., using a mask, among other materials/covers) during the hydrogen plasma treatment302and/or any subsequent plasma treatment(s).

Referring toFIGS.1B and4A-4D, the method150at operation154subsequently performs an oxygen plasma treatment304to the first surface206and the second surface208. In the present embodiments, the oxygen (O2) plasma treatment304is configured to oxidize the dielectric layer212(or portions thereof), thereby further modifying the first surface206and second surface208.

In the present embodiments, oxygen radicals (O·)340produced by the oxygen plasma treatment304react with the dielectric layer212to substitute the N and/or C atoms, thereby oxidizing the surface of the dielectric layer212in the process. In other words, the oxygen plasma treatment304removes the N and/or C atoms in the —NH groups324and/or the —CH2groups334, respectively, to form —Si—O— (or —Si—O—Si—) groups in the dielectric layer212, which then react with nitrogen radicals (N·) to form —NO groups during the subsequent plasma treatment. Importantly, terminating the nitrogen- and the carbon-containing groups with H atoms during the hydrogen plasma treatment302lowers the thermodynamic barrier of removing the N and/or C atoms from the dielectric layer212during the oxygen plasma treatment304, leading to a greater extent of oxidation of the surface of the dielectric layer212.

FIGS.4B and4Cillustrate various reaction schemes for oxidizing the dielectric layer212(or portions thereof) that includes the —NH groups324and the —CH2groups334, respectively. It is noted that the various reaction schemes illustrated inFIGS.4B and4Care each denoted with a change in energy state, ΔE, that corresponds to the thermodynamic drive of each scheme, where the schemes with more negative ΔE are more thermodynamically stable, yielding a greater amount of reaction product(s). In the present disclosure, the values of ΔE are determined based on the density functional theory (DFT) calculation of small molecules similar to the compounds illustrated herein and should therefore be taken as approximate, rather than exact, values for comparison purposes only.

Referring toFIG.4B, the oxidation of the dielectric layer212containing the —NH groups324may proceed in at least one of Schemes I-III. With respect to Scheme I, the oxygen radicals340react with the N atoms in the dielectric layer212to form a volatile compound, HNO342and a —Si—Si-containing compound343. In this regard, the oxygen radicals340scavenge the N atoms from the surface of the dielectric layer212by forming HNO342, which is subsequently removed. With respect to Scheme II, the oxygen radicals340react with the N atoms in the dielectric layer212to form a —Si—N═O-containing compound344and a Si-containing compound345. With respect to Scheme III, a first oxygen radical340reacts with the dielectric layer212to form a —Si—NH—O—Si-containing compound346, thereby oxidizing the dielectric layer212(or portions thereof). Subsequently, a second oxygen radical340may further oxidize the —Si—NH—O—Si-containing compound346to form a —Si—O—NH—O—Si-containing compound348, a —Si—O—Si-containing compound350, and HNO342. In the present embodiments, Schemes I and II demonstrate similar values of ΔE, while Scheme III demonstrates a ΔE that is approximately one order of magnitude larger (in magnitude) than both Schemes I and II, indicating that Scheme III is more thermodynamically stable (or favorable) and that the products of Scheme III may dominate in quantity over those of Schemes I and II. In some embodiments, the interaction between the oxygen radicals340and the dielectric layer212proceeds according to more than one of Schemes I-III at various reaction rates, depending on their respective values of ΔE.

Similarly, referring toFIG.4C, the oxidation of the dielectric layer212containing —CH2groups334may proceed in at least one of Schemes IV-VII. With respect to Scheme IV, the oxygen radicals340react with the C atoms in the dielectric layer212to form a radical CO.362and a Si-containing compound360, which may be similar to the Si-containing compound345. With respect to Scheme V, the oxygen radicals340react with the C atoms in the dielectric layer212to form a volatile compound CH2O364and a —Si—Si-containing compound363, which may be similar to the —Si—Si-containing compound343. In the present embodiments, the oxygen radicals340scavenge the C atoms from the surface of the dielectric layer212by forming CH2O364, which is subsequently removed. With respect to Scheme VI, the oxygen radicals340react with the dielectric layer212to form a —Si—CH═O-containing compound366and the Si-containing compound360. With respect to Scheme VII, a first oxygen radical340reacts with the dielectric layer212to form a —Si—CH2—O—Si-containing compound368, thereby oxidizing the dielectric layer212(or portions thereof). Subsequently, a second oxygen radical340may further oxidize the —Si—CH2—O—Si-containing compound368to form a —Si—O—CH2—O—Si-containing compound370, a —Si—O—Si-containing compound372, which may be similar to the —Si—O—Si-containing compound350, and CH2O364. In the present embodiments, while all being negative, the magnitude of ΔE of Scheme VII is greater than the magnitude of ΔE of Schemes IV-VI, indicating that Scheme VII is more thermodynamically stable (or favorable). In some embodiments, the interaction between the oxygen radicals340and the dielectric layer212proceeds according to more than one of Schemes IV-VII at various reaction rates, depending on their respective values of ΔE.

In the present embodiments, the volatile compound HNO342formed by one or more of Schemes I-III and the volatile compound CH2O364formed by one or more of Schemes IV-VII are subsequently removed from the dielectric layer212after performing the oxygen plasma treatment304. Importantly, the presence of —NH groups324and —CH2groups334obtained from the hydrogen plasma treatment302increases the thermodynamic drive (or lowers the thermodynamic barrier) for substituting the N and/or C atoms with O atoms (from the oxygen radicals340), thereby increasing the amount (or concentration) of O atoms, and consequently the amount of —Si—O—Si— bonds, incorporated in the dielectric layer212. In other words, implementing the hydrogen plasma treatment302and the oxygen plasma treatment304in sequence improves the extent of oxidation of the dielectric layer212, which may be measured in the thickness of the oxidized surface in the dielectric layer212, according to some embodiments of the present disclosure.

Various parameters of the oxygen plasma treatment304may be adjusted to further increase a thickness of oxidized surface212sof the dielectric layer212. For example, referring toFIG.4D, which illustrates variations in concentration of O atoms as a function of depth (or thickness) measured from the surface of the wafers202and204, increasing the power of the oxygen plasma from P1to P2increases the thickness of the oxidized surface212sof the dielectric layer212from D1to D2. It is noted that for purposes of illustration, the extent of oxidation is represented by the concentration of O atoms arising from, for example, the —Si—NH—O—Si-containing compound346, the —Si—O—NH—O—Si-containing compound348, the —Si—O—Si-containing compound350, —Si—CH2—O—Si-containing compound368, the —Si—O—CH2—O—Si-containing compound370, the —Si—O—Si-containing compound372, other suitable products of one or more of Schemes I-VII, or combinations thereof. In some examples, the power P2may be twice as much as the power P1. In the depicted embodiments, the dielectric layer212includes oxidized silicon carbonitride (SiCN).

Referring toFIGS.1B and5A-5F, the method150at operation156subsequently performs a nitrogen plasma treatment306to the first surface206and the second surface208. In the present embodiments, referring toFIG.5B, nitrogen radicals (N·)380produced by the nitrogen plasma treatment306react with a —Si—O—Si-containing compound (e.g., a silicon-containing oxide)378of the oxidized dielectric layer212via a bridging mechanism to form a compound382that includes —NO groups384and —Si—O—Si— groups385. In some embodiments, the nitrogen radicals380react with the —Si—O—Si-containing compound378of the oxidized dielectric layer212via an end-on mechanism to form a compound386that includes —N═O groups388. As depicted herein, the reaction Scheme VIII for forming —NO groups384may be characterized by a negative ΔE value, indicating that the reaction (i.e., the bridging mechanism) is thermodynamically stable (or favorable).

In the present embodiments, by increasing the amount of O atoms in the —Si—O—Si-containing compound378, which is achieved by the sequential implementation of the hydrogen plasma treatment302and the oxygen plasma treatment304, the amount of —NO groups384(and/or —N═O groups388) formed by the nitrogen plasma treatment306is also increased, leading to more —OH groups formed at a subsequent hydrolysis process and consequently stronger chemical bond between the wafers202and204during a subsequent coupling process. Additionally, the increased amount of —NO groups384resulting from the sequential implementation of the hydrogen plasma treatment302and the oxygen plasma treatment304renders the first surface206and the second surface208more hydrophilic than if the oxygen plasma treatment304was implemented without the hydrogen plasma treatment302. Accordingly, the sequential plasma treatments provided herein may be generally applied during fabrication processes in which modifications of surface chemistry resulting in more hydrophilic properties are desired.

FIGS.5C-5Fcollectively demonstrate an increase in the amount of —NO groups384formed at the surface212sof the dielectric layer212following the nitrogen plasma treatment306. Referring toFIGS.5C and5D, which correspond to an embodiment of the oxidized dielectric layer212including silicon oxide (SiO2), an increase in the concentration of —NO groups384after undergoing the nitrogen plasma treatment306is observed at the surfaces212s. The profile shown inFIG.5Dindicates a distribution of the —NO groups384over a thickness D3of about 20 Å at the surface212s. Referring toFIGS.5E and5F, which correspond to an embodiment of the dielectric layer212including silicon carbonitride (SiCN), an increase in the concentration of —NO groups384after undergoing the nitrogen plasma treatment306is also observed at the surfaces212s, and such concentration is distributed over a thickness D4of less than about 20 Å. It is noted thatFIGS.5D and5Fare not drawn to scale and are depicted for illustration purposes only.

Thereafter, referring toFIGS.1A,6A, and6B, the method100proceeds from operation104to operation106and performs a rinsing process308to the first surface206and the treated second surface208, resulting in a treated dielectric layer212′. In the present embodiments, the rinsing process308is performed by applying deionized (DI) water to the first surface206and the second surface208as depicted inFIG.6A.

As shown in Scheme IX ofFIG.6B, the compound382produced by the nitrogen plasma treatment306reacts with H2O390in a hydrolysis process (i.e., hydrolyzing the compound382with H2O390) to form a compound392that includes —Si—O—Si— groups385and hydroxide —OH groups394, as well as products such as HNO342and H2O390, which may be subsequently removed. In other words, H2O390breaks one or more chemical bonds in the compound382to form —OH groups394, thereby hydrolyzing the dielectric layer212(or portions thereof). In the present embodiments, increasing the amount of —NO groups384at the surface of the dielectric layer212increases the amount of —OH groups394formed during the rinsing process308, which in turn increases the strength of chemical bonding between the first surface206and the second surface208during the subsequent coupling process.

Referring toFIGS.1A,7A, and7B, the method100at operation108merges or couples the wafers202and204to form the semiconductor structure200. As shown inFIG.7A, the first wafer202may be flipped or inverted (e.g., rotated 180 degrees) to engage with the second wafer204in a face-to-face configuration during an alignment process310. In the depicted embodiment, the first surface206of the first wafer202is positioned to face downward or towards the second surface208of the second wafer204, which is positioned to face upward. In some instances, the second wafer204may be flipped instead of the first wafer202. For simplicity and examples herein, referring toFIG.7B, the first wafer202includes the first surface206having at least the treated dielectric layer212′ and the interconnect structures210, and the second wafer204includes the second surface208having at least the treated dielectric layer212′ and the interconnect structures210.

The wafers202and204may be coupled by any suitable process, such as by a hybrid bonding process. In this regard, the alignment process310may be implemented by positioning the interconnect structures210to directly face the interconnect structures210and positioning the treated dielectric layer212′ exposed on the first surface206to directly face the treated dielectric layer212′ exposed on the second surface208. In some instances, the alignment process310causes the sidewalls of the interconnect structures210on the wafers202and204to be coplanar or substantially coplanar along a common vertical plane along the Z axis.

When the wafers202and204are aligned, the treated dielectric layer212′ exposed on the first surface206may physically contact, couple, or interconnect with the treated dielectric layer212′ exposed on the second surface208. By applying heat and/or pressure (e.g., during physical contact between the treated dielectric layer212′ of the first surface206and the second surface208, respectively), the wafers202and204may be coupled/bonded/interconnected. The pressure applied may comprise a pressure of less than about 30 MPa, and the heat applied may comprise an anneal process at a temperature of about 100 degrees Celsius to about 500 degrees Celsius, as examples, although alternatively, other amounts of pressure and heat may be used for the hybrid bonding process. The hybrid bonding process may be performed in a N2environment, an Ar environment, a He environment, an (about 4% to about 10%) H2/(about 90% to about 96%) inert gas or N2environment, an inert-mixing gas environment, other types of environments, or combinations thereof. As a result, the wafers202and204(e.g., the first surface206and the second surface208) may be coupled based on the physically contacting at least the treated dielectric layer212′.

In some embodiments, the bond between the wafers202and204includes non-metal-to-non-metal bonds or metal-to-metal bonds. A portion of the hybrid bonding process may comprise a fusion process that forms the non-metal-to-non-metal (e.g., dielectric-to-dielectric) bonds, and a portion of the hybrid bonding process may comprise a copper-to-copper bonding process that forms the metal-to-metal bond, for example. The term “hybrid” refers to the formation of the two different types of bonds (e.g., between the treated dielectric layer212′ of the wafers202and204and between the interconnect structures210of the wafers202and204) using at least one bonding process, rather than forming only one type of the bonds, as is the practice in other types of wafer-to-wafer or die-to-die bonding processes, for example.

Referring toFIGS.1A and8A-8C, the method100at operation110performs a baking (or annealing) process312to heat the coupled wafers202and204using at least one suitable heat treatment process, such as rapid thermal processing (RTP). Heating the wafers202and204may expand the interconnect structures210to fill the trench213surrounded by the treated dielectric layer212′. Hence, annealing the wafers202and204can increase a dimension (e.g., height) of the interconnect structures210to physically contact each other (e.g., through/via the trench213), as depicted inFIG.8B. In some instances, the interconnect structures210of the wafers202and204may expand to the same dimension. In some instances, the interconnect structures210may not include the same dimension after the expansion, such that the interconnect structures210extend to contact the other.

Referring toFIG.8C, Scheme X demonstrates an example reaction occurring between the treated dielectric layer212′ of the first surface206coupled to the treated dielectric layer212′ of the second surface208during the baking process312. In the present embodiments, the treated dielectric layer212′ includes a compound392having —OH groups394bonded to —Si—O—Si— groups385, where the —OH groups394of two molecules of the compound392react with each other to form a compound396, thereby establishing chemical bonds between the first surface206and the second surface208and expelling H2O390in the process. In this regard, by increasing the amount of hydroxide (i.e., the —OH groups394) present at the surface of the treated dielectric layer212′ (seeFIG.6B), the bonding (or coupling) capabilities between the first surface206of the first wafer202and the second surface208of the second wafer204may be enhanced. In the present embodiments, sequentially implementing the hydrogen plasma treatment302, the oxygen plasma treatment304, and the nitrogen plasma treatment306increases the extent of reaction between —OH groups394, leading to a greater density of —Si—O—Si— groups385formed in the treated dielectric layer212′ and enhanced chemical bonding between the wafers202and204as a result.

Referring toFIGS.1A,9, and10, the method100at operation112performs additional operations to the semiconductor structure200. For example, as depicted inFIG.9, the method100at operation112may subject the wafers202and204to at least one thinning or etching process314. The thinning process314may be performed on a backside of one or both of the wafers202and204before, during, or after merging the wafers. The thinning process314may be performed using at least one suitable etching technique, such as a chemical etching process.

For example, the backside of the first wafer202may be etched or thinned using the at least one suitable etching technique. In some instances, the semiconductor structure200can be inverted, such that the second wafer204is the top wafer above the first wafer202. In this case, the backside of the second wafer204may be etched. In some instance, the semiconductor structure200may not be inverted, and one or both of the wafers202and204may be etched. Etching the backside of at least one wafers202and204may reduce the overall dimension (e.g., thickness) of the semiconductor structure200, as depicted inFIG.10.

In some embodiments, after thinning the wafers202and204, at least one suitable lithography technique, such as photolithography, can be performed on at least one of the wafers202and204. For example, after bonding the various interconnect structures210, thinning the wafers202and204, among other fabrication procedures, one or more patterns can be formed in at least one of the first or second substrates, thereby enabling (e.g., electrical) connection with the interconnect structures210, among other materials, of the wafers202and204.