Power supply unit, processing system, and ID assignment method

A power supply unit includes a communication unit and a control unit. The communication unit is capable of performing communication with a first processing unit group constituted of a plurality of processing units connected thereto. The control unit controls powers to the plurality of processing units through the communication so that the powers are turned on in an order corresponding to an order of connection and assigns, to the plurality of processing units, respectively, IDs of numbers corresponding to the order of turning-on of the powers each time the power is turned on.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a power supply unit that controls powers to a plurality of processing units and assigns IDs to a plurality of processing units, a processing system that includes a power supply unit and a processing unit, and a method of assigning IDs.

2. Description of the Related Art

Generally, in a system in which a plurality of apparatuses are connected through communication lines, the apparatuses are specified using IDs assigned thereto, respectively.

For example, in a network such as the Internet and the Ethernet (registered trademark), apparatuses on a network are specified using IDs such as MAC addresses fixedly assigned to terminal apparatuses thereof (see, for example, Japanese Patent Application Laid-open No. 2005-318482 (paragraph 0012)) (hereinafter, referred to as Patent Document 1).

SUMMARY OF THE INVENTION

Incidentally, the inventors of the present invention have newly devised a processing system that is structured by hierarchically connecting, through an interface, a plurality of processing units that execute a predetermined processing with a plurality of power supply units that control the supply of the power to each of the processing units and the start and stop of the power thereof.

Here, for example, if the assumption is made that the processing units each have IDs fixedly given as described in Patent Document 1, the numbers of the IDs of the processing units have no correlation with respect to the order of connection with the processing units. In this case, the processing units each have to have a routing table for specifying the other units. As a result, there arises a problem in that the communication among the processing units becomes redundant.

In view of the above-mentioned circumstances, it is desirable to provide techniques such as a power supply unit and the like capable of assigning, to processing units, IDs correlated with the order of connection of the processing units.

According to an embodiment of the present invention, there is provided a power supply unit including a communication unit and a control unit.

The communication unit is capable of performing communication with a first processing unit group constituted of a plurality of processing units connected thereto.

The control unit controls powers to the plurality of processing units through the communication so that the powers are turned on in an order corresponding to an order of connection

Further, the control unit assign, to the plurality of processing units, respectively, IDs of numbers corresponding to the order of turning-on of the powers each time the power is turned on.

In the embodiment of the present invention, the powers to the processing units are turned on in the order corresponding to the order of connection of the processing units, and the IDs of the numbers corresponding to the order of turning-on of the powers are assigned to the processing units, respectively. Thus, the IDs that are correlated to the order of connection of the processing units can be assigned to the processing units, respectively. In this case, the processing units each can specify another processing unit using the ID expressed by a relative value to the ID thereof and can communicate with each other. Therefore, the processing units do not have to have a routing table and do not have to refer to the routing table in the communication thereamong. As a result, a communication speed among the processing units can be improved.

Further, in the embodiment of the present invention, the IDs can be assigned each time the powers are turned on. Accordingly, at a time when the powers are turned off, for example, it is possible to properly assign, to the processing units, the IDs of the numbers correlative to the order of the connection of the processing units at a time when the powers are turned on even if the number of the processing units connected to the power supply unit is increased or reduced.

In the power supply unit, the communication unit may be capable of performing communication with at least one different power supply unit.

The different power supply unit is connected to a second processing unit group and controls powers to the second processing unit group. The second processing unit group is different from the first processing unit group.

In this case, the control unit may control the powers to the first processing unit group so that the powers are turned on in a predetermined priority order with respect to turning-on of powers to the second processing unit group through the communication with the different power supply unit.

Further, in this case, the control unit may assign the IDs of the numbers to the plurality of the processing units, respectively. The numbers correspond to numbers in accordance with the priority order of turning-on of the powers to the first processing unit group with respect to turning-on of the powers to the second processing unit group and corresponds to the order of turning-on of the powers in the first processing unit group.

In the embodiment of the present invention, the power supply unit can turn on the powers to all the processing units including at least the first processing unit group and the second processing unit group sequentially in the order of connection in conjunction with the at least one different power supply unit. In addition, the power supply unit can assign the IDs of the numbers corresponding to the order of turning-on of the all the processing units to the processing units in conjunction with the different power supply unit. Accordingly, the power supply unit can assign the IDs correlated to the order of connection of all the processing units to the processing units, respectively, in conjunction with the different power supply unit.

In the power supply unit, the control unit may control the powers so that the plurality of processing units in the first processing unit group are sequentially started up from a rear stage side in an electrical connection relationship.

Here, for example, in the case where the PCI-Express (registered trademark) is used for the connection of the units, there may arise a problem in that the plurality of processing units are necessary to be started up in sequence from the rear stage side due to a problem of device recognition in Root/End connection.

In the embodiment of the present invention, the plurality of processing units can be started up sequentially from the rear stage side, so it is possible to flexibly deal with the above-mentioned problem.

In the power supply unit, the control unit may output a confirmation signal to confirm whether the different power supply unit in a rear stage is connected to the rear stage side in the electrical connection relationship.

Further, in this case, the control unit may judge whether a response signal to the confirmation signal is input from the different power supply unit in the rear stage.

In the power supply unit, when the response signal is not input, the control unit may control the powers so that the first processing unit group is started up sequentially from the rear stage side.

Further, when the response signal is input, the control unit may control the powers so that the first processing unit group connected thereto is started up sequentially from the rear stage side after a startup completion signal is input. The startup completion signal indicates that startup of the second processing unit group connected to the different power supply unit in the rear stage is completed.

As a result, it is possible to turn on the powers sequentially from the processing unit in the last stage connected to the power supply unit in the last stage and assigns the IDs of the numbers corresponding to the order of turning-on to the processing units, respectively.

In the power supply unit, when the response signal is not input, the control unit may assign the IDs of the numbers corresponding to the order of turning-on to the plurality of processing units, respectively, and output, to the different power supply unit in a front stage, information of the number of the ID assigned last time.

Further, when the response signal is input, the control unit may assign the IDs of the numbers corresponding to the order of turning-on to the plurality of the processing units, respectively, based on information of the number of the ID from the different power supply unit in the rear stage, and output, to the different power supply unit in the front stage, information of the number of the ID assigned last time.

In the power supply unit, the control unit may judge whether the power supply unit is a head power supply unit or a relay power supply unit in a relationship with the different power supply unit.

In this case, the control unit may control, based on a judgment result as to whether the power supply unit is the head power supply unit or the relay power supply unit, the powers so that the powers to the first processing unit group are turned on in the predetermined priority order with respect to the turning-on of the powers to the second processing unit group through the communication with the different power supply unit.

Further, in this case, the control unit may assign the IDs of the numbers to the plurality of processing units, respectively. The numbers corresponds to the order of turning-on of the powers in the first processing unit group and corresponds to the priority order of turning-on of the first processing unit group with respect to turning-on of the powers to the second processing unit group.

In the embodiment of the present invention, the power supply unit automatically judges whether the power supply unit concerned is the head power supply unit or the relay power supply unit. Thus, regardless of the position where the power supply unit is connected to the different power supply unit, it is possible to cause the power supply unit to effectively operate, and assign the IDs correlated to the order of connection of all the processing units to the processing units, respectively.

The power supply unit may further include a power supply switch.

In this case, the control unit may judge, based on a shift of the power supply switch thereof, that the power supply unit including the power supply switch shifted is the head power supply unit in the relationship with the different power supply unit.

In the embodiment of the present invention, when the power supply switch is shifted, the power supply unit including the power supply switch shifted is judged to be the head power supply unit. With this structure, it is possible to handle the case where the power supply units are connected in the ring-shaped form. Even in this case, it is possible to cause the power supply units to effectively operate, and assign the IDs correlated to the order of connection of all the processing units to the processing units, respectively.

According to another embodiment of the present invention, there is provided a processing system including a processing unit group and a power supply unit.

The processing unit group is constituted of a plurality of processing units.

The power supply unit includes a communication unit and a control unit.

The communication unit is capable of performing communication with the processing unit group connected thereto.

The control unit controls powers to the plurality of processing units through the communication so that the powers are turned on in an order corresponding to an order of connection.

Further, the control unit assigns, to the plurality of processing units, respectively, IDs of numbers corresponding to the order of turning-on of the powers each time the power is turned on.

According to another embodiment of the present invention, there is provided a processing system including a plurality of processing unit groups and a plurality of power supply units.

The plurality of processing unit groups are each constituted of a plurality of processing units; and

The plurality of power supply units each includes a communication unit and a control unit.

The communication unit is capable of performing communication with a first processing unit group connected thereto

Further, the communication unit is capable of performing communication with at least one different power supply unit that is connected with a second processing unit group different from the first processing unit group and controls powers to the second processing unit group.

The control unit controls the powers to the first processing unit group so that the powers are turned on in an order corresponding to an order of connection through the communication with the first processing unit group.

Further, the control unit controls the powers so that the powers of the first processing unit group are turned on in a predetermined priority order with respect to turning-on of powers to the second processing unit group through the communication with the different power supply unit.

Furthermore, the control unit assigns the IDs of the numbers to the plurality of the processing units, respectively. The numbers corresponds to numbers in accordance with the priority order of turning-on of the powers to the first processing unit group with respect to turning-on of the powers to the second processing unit group and corresponds to the order of turning-on of the powers in the first processing unit group.

According to an embodiment of the present invention, there is provided an ID assignment method. The ID assignment method includes controlling powers to a plurality of processing units connected to a power supply unit through communication with the plurality of processing units so that the powers to the plurality of processing units are turned on in an order corresponding to an order of connection.

Further, the ID assignment method includes assigning, to the plurality of processing units, respectively, IDs of numbers corresponding to the order of turning-on of the powers each time the power is turned on.

As described above, according to the embodiments of the present invention, it is possible to provide the technique such as the power supply unit and the like capable of assigning the IDs correlated to the order of connection of the processing units to the processing units, respectively.

DESCRIPTION OF PREFERRED EMBODIMENTS

First Embodiment

(Overall Structure of Processing System and Structures of Respective Portions)

FIG. 1is a diagram showing a processing system according to a first embodiment of the present invention.FIG. 2is a schematic diagram showing the processing system.

As shown inFIGS. 1 and 2, a processing system100includes a plurality of power supply units1and a plurality of processing units2.

The processing unit2is formed of an operation unit2A, a video unit2B, or a network unit2C. It should be noted that, in this specification, the processing unit2refers to one of the operation unit2A, the video unit2B, and the network unit2C.

As shown inFIG. 2, a user can arbitrarily select necessary units in accordance with a necessary size from among the power supply unit1, the operation unit2A, the video unit2B, and the network unit2C, to freely structure the processing unit100.

The power supply unit1includes a casing11having a rectangular parallelepiped shape. On the front surface side of the casing11, a power supply switch15that is exposed from the front surface of the casing11is provided. It should be noted that the shape of the casing11or the position of the power supply switch15can be changed as appropriate.

The power supply unit1includes a microcontroller5(control unit) (see,FIG. 3) in the casing11. The microcontroller5controls the supply of the power to the respective processing units2, the start and stop of the power supply, the assignment of IDs, and the like.

In the following description, a group of the processing units2that is subjected to the control on the supply of the power, the start and stop thereof, the assignment of the IDs, and the like by one power supply unit1is referred to as a processing unit group20. Further, in the following description, all the processing units included in the processing system100are referred to as all processing units.

The maximum number of processing units2included in the processing unit group20, that is, the maximum number of processing units2connected to the one power supply unit1is predetermined, for example, set to four. It should be noted that the maximum number of units connected can be changed as appropriate.

The operation unit2A includes a casing12having a rectangular parallelepiped shape. In the casing12, a CPU board on which a CPU (central processing unit) (or MPU (micro processing unit)) or the like is mounted is incorporated.

The video unit2B includes a casing13having a rectangular parallelepiped shape. In the casing13, a graphic board on which a GPU (graphics processing unit), a VRAM (video random access memory), or the like is mounted is incorporated.

The network unit2C includes a casing14having a rectangular parallelepiped shape. In the casing14, a network board is incorporated.

The units1and2are electrically connected to one another through a power supply line. In addition, the units are electrically connected to one another by an apparatus interface such as a PCI-Express.

In the description of the first embodiment, out of the plurality of power supply units1, the power supply unit1disposed on the left end is referred to as a head power supply unit1′, and the other power supply units1are referred to as relay power supply units1″. In addition, in the description of the first embodiment, in the positional relationship among the units1and2, the left side may be referred to as a front stage, and the right side may be referred to as a rear stage.

Here, inFIG. 1, the order of start and the order of stop in the processing system100are shown. In this embodiment, based on the control of the power supply unit1(microcontroller5), the powers to the processing units2are turned on sequentially from the rear stage side, and the powers to the processing units2are turned off sequentially from the front stage side, as shown inFIG. 1.

The turning-on and -off of the powers to the units is controlled in the above-mentioned orders for the following reason.

As described above, for the connection of the units, the PCI-Express is used. In the case where the PCI-Express is used for the connection of the units, there arises a problem in that the processing units are necessary to be started up and shut down in a predetermined order due to a problem of device recognition in Root/End connection. In view of this, in this embodiment, the powers to the processing units2are turned on sequentially from the rear stage side and turned off sequentially from the front stage side. It should be noted that the details of the power supply control by the power supply unit1(microcontroller5) will be described later.

FIG. 3is a schematic diagram showing a connection state among the units.

As shown inFIG. 3, in the power supply unit1, the microcontroller5is provided, and in the processing unit2, the switch6for turning on and off the power is provided. A microcontroller5′ of the power supply unit1in the front stage (left side inFIG. 3) is electrically connected to the switches6of the processing unit group20disposed on the rear stage side through control signal lines7. The microcontroller5′ outputs a startup control signal or a stop control signal through the control signal lines7, to control the turning-on and -off of the power to the processing unit group20connected thereto.

The microcontroller5′ of the power supply unit1in the front stage is electrically connected to a microcontroller5″ of the power supply unit1in the rear stage (right side inFIG. 3) through the control signal line7. It should be noted that the microcontroller5′ on the front stage side and the microcontroller5″ on the rear stage side are electrically connected to each other also through a signal line8.

The control signal lines7from the microcontroller5′ are shifted to an upper level stepwise in each of the processing units2. That is, the control signal lines7are shifted to the upper level stepwise from the input side to the output side in each of the processing units2.

The reason why the control signal lines7from the micro controller5are shifted to the upper level stepwise in each of the processing units2will be described.

As described above, the user can arbitrarily select necessary units1and2from the units1and2to structure the processing system100according to this embodiment. In this case, the number of processing units2connected to one power supply unit1and the connected positions thereof are unclear.

The assumption is made that the control signal lines7are not shifted to the upper level stepwise from the input side and the output side in the processing unit2but set at the same level. In this case, depending on a position where the processing unit2is connected to the power supply unit1, the control signal lines7through which the startup and shutdown control signals are input from the microcontroller5are different for the processing units2.

In view of this, in this embodiment, the control signal lines7from the microcontroller5are shifted to the upper level stepwise in each of the processing units2. With this structure, as shown inFIG. 3, even if the processing units2are disposed at any positions, the startup and shutdown control signals from the microcontroller5′ can be input from the uppermost control signal line7. Thus, regardless of the positions where the processing units2are connected to the power supply unit1, the processing units2can be effectively started up and shut down.

Next, the operation of the processing system100will be described. It should be noted that the operation of the power supply unit1will be mainly described in the description on the operation of the processing system100.

(Processing at Time when Power is Turned on)

First, the operation when the power to the processing system100is turned on will be described.

FIG. 4is a flowchart showing an operation in the case where the power supply unit turns on the power to the processing unit and assigns IDs of numbers corresponding to the order of the turning-on of the powers to the processing units.FIG. 5is a sequence diagram showing an operation at the time when the processing system is startup. It should be noted that, inFIG. 5, the structure of the processing system is simplified for ease of the explanation.

The microcontroller5of the power supply unit1judges whether the power supply unit1concerned is the head power supply unit1′ or the relay power supply unit1″ based on the relationship with the other power supply units1(Step101) (see,FIG. 5[1], [2], and [3]). Typically, the microcontroller5of the power supply unit1judges whether the other power supply units1are connected in the rear stage. Based on the judgment result, the connected position thereof is determined.

In the case where it is judged that the power supply unit1concerned is the head one (YES in Step101), the microcontroller5judges whether a user presses the power supply switch15provided on the front side of the power supply unit1, and a signal of turning on the power supply switch is input from the power supply switch15(Step102).

In the case where the user presses the power supply switch15, and the signal of turning on the power supply switch is input from the power supply switch15(YES in Step102), the microcontroller5performs the subsequent processing of Step105. On the other hand, in the case where the signal of turning on the power supply switch is not input from the power supply switch15(NO in Step102), the process returns to Step102again, and the microcontroller5judges whether the signal of turning on the power supply switch is input or not.

That is, when the power supply unit1is judged to be the head power supply unit1′, the power supply unit1′ is brought into a standby state of turning on the power supply switch15provided thereto.

In Step101, when the power supply unit1is not judged to be the head power supply unit (NO in Step101), that is, when the power supply unit1concerned is judged to be the relay power supply unit1″, the microcontroller5performs the processing of Step103.

In Step103, the microcontroller5judges whether a “Boot” signal is input from the power supply unit1in the front stage through the control signal line7.

In the case where the “Boot” signal is input from the power supply unit1in the front stage (YES in Step103), the process proceeds to Step104. On the other hand, in the case where the “Boot” signal is not input (NO in Step103), the process returns to Step103, and the microcontroller5judges again whether the “Boot” signal is input from the power supply unit1in the front stage.

That is, when the power supply unit1concerned is judged to be the relay power supply unit1″, the power supply unit1″ is brought into a standby state of the input of the “Boot” signal from the power supply unit1in the front stage.

In the case where the “Boot” signal is input from the power supply unit1in the front stage (YES in Step103) (see,FIG. 5[7] and [13]), the microcontroller5outputs a “Unit_OK” signal (Low) to the power supply unit1in the front stage through the signal line8(Step104) (see,FIG. 5[8] and [14]).

In the case where the user presses the power supply switch15, and the signal of turning on the power supply switch is input from the power supply switch15in Step102(see,FIG. 5[4]), or in the case where the “Unit_OK” signal (L) is output to the power supply unit1in the front stage in Step104(see,FIG. 5[8] and [14]), the microcontroller5performs the subsequent processing of Step105.

In Step105, the microcontroller5supplies a voltage of 12 V to the processing unit group20connected thereto (see,FIG. 5[5], [9], [11], [15], and [17]).

When the voltage of 12 V is supplied from the power supply unit1, the processing units2each output a “Power_OK.” signal to the power supply unit1(see,FIG. 5[6], [10], [12], [16], and [18]). It should be noted that the voltage supplied to the processing units2is not limited to 12 V, and can of course be another value.

Next, the microcontroller5counts the inputs of the “Power_OK.” signals from the processing unit group20connected thereto (Step106). By counting the inputs of the “Power_OK” signals, the microcontroller5can recognize the number of processing units2connected thereto.

When the inputs of the “Power_OK” signals are counted, the microcontroller5outputs the “Boot” signal to the (number of inputs of “Power_OK” signals+1)-th unit (i.e., power supply unit1in the rear stage) through the control signal line7(Step107) (see,FIG. 5[7], [13], and [19]).

When the “Boot” signal is output, the microcontroller5judges whether the “Unit_OK” signal (L) is input from the power supply unit1in the rear stage (Step108).

In the case where the power supply unit1is connected in the rear stage, the “Unit_OK” signal (L) is input from the power supply unit1in the rear stage (Steps103and104) (see,FIG. 5[8] and [14]).

On the other hand, in the case where the power supply unit1is not connected in the rear stage, the “Unit_OK.” signal (L) is not input (see,FIG. 5[19]).

Thus, the microcontroller5can confirm whether the power supply unit1is connected in the rear stage.

In the case where the “Unit_OK.” signal (L) is input from the power supply unit1in the rear stage (YES in Step108), the microcontroller5judges whether the “Unit_OK.” signal (High) is input from the power supply unit1in the rear stage (Step109).

In the case where the “Unit_OK.” signal (H) is input from the power supply unit1in the rear stage (YES in Step109), the process proceeds to Step111. On the other hand, in the case where the “Unit_OK” signal (H) is not input from the power supply unit1in the rear stage (NO in Step109), the microcontroller5performs the processing of Step109again and judges whether the “Unit_OK” signal (H) is input from the power supply unit1in the rear stage.

That is, in the case where the power supply unit1is connected in the rear stage, the power supply unit1is brought into a standby state of the input of the “Unit_OK” signal (H) from the power supply unit1in the rear stage.

In Step108, in the case where the “Unit_OK” signal (L) is not input (NO in Step108), the microcontroller5performs the subsequent processing of Step110. That is, in the case where the power supply unit1is not connected in the rear stage (in the case where the power supply unit1concerned is disposed in the last stage), the microcontroller5performs the processing of Step110.

In Step110, the microcontroller5outputs the startup control signals to the units by the number of inputs of the “Power_OK.” signals sequentially from the END side with an interval (wait) being given therebetween (see,FIG. 5[20] and [21]). As a result, the power is turned on sequentially from the processing unit2in the last stage in the processing unit group20connected to the power supply unit1in the last stage.

Further, in Step110, the microcontroller5assigns IDs from 1 sequentially in the order of the startup of the processing units2and outputs the IDs to the processing units (FIG. 5[20] and [21]). In this case, in the processing unit group20connected to the power supply unit in the last stage, the assignment of the IDs=1, 2, . . . is started from the processing unit2on the rear stage side sequentially.

When the processing of Step110is terminated, and the startup of the processing unit group20connected thereto and the assignment of the IDs are completed, the microcontroller5judges whether the power supply unit concerned is the relay power supply unit1″ (Step112). In the case where the power supply unit1concerned is the relay power supply unit1″ (YES in Step112), a “Unit_OK.” signal (H) is output to the power supply unit1in the front stage (Step113) (see,FIG. 5[22]).

In addition, in this case, the microcontroller5outputs, to the power supply unit in the front stage, a number of an ID assigned last time to the processing unit group20connected thereto (see,FIG. 5[22]). In the example shown inFIG. 5, the power supply unit1in the last stage assigns the ID number of 2, and therefore the information of the ID=2 is output to the processing unit in the front stage.

In Step109, when the “Unit_OK.” signal (H) is input to the power supply unit1in the standby state of the “Unit_OK” signal (H) from the power supply unit1in the rear stage (YES in Step109), the microcontroller5executes the processing of Step111.

That is, upon input of the “Unit_OK.” signal (H) from the power supply unit in the rear stage, the microcontroller5sequentially turns on the powers to the processing units2from the rear stage side, out of the processing unit group20connected thereto (see,FIG. 5[23], [24], and [26]).

In addition, in Step111, the microcontroller5assigns the IDs from the number of (ID number sent from the power supply unit1in the rear stage +1) sequentially in the order of the startup of the processing units, and outputs the IDs to the processing units (see,FIG. 5[23], [24], and [26]).

When the processing of Step111is terminated, and the startup of the processing unit group20connected thereto and the assignment of the IDs are completed, the microcontroller5then performs the processing of Step112and judges whether the power supply unit1concerned is the relay power supply unit1″. In the case where the power supply unit1concerned is judged to be the relay power supply unit1″, the “Unit_OK” signal (H) is output to the power supply unit1in the front stage, and the number of the ID assigned last time by the power supply unit concerned is output to the power supply unit in the front stage (see,FIG. 5[25]).

On the other hand, in Step112, in the case where the power supply unit concerned is judged to be the head one (NO in Step112), the “Unit_OK” signal (H) and the ID number assigned last time by the power supply unit concerned are not output, and the processing is terminated.

By the processing shown inFIG. 4, the power supply unit1can sequentially startup all the processing units in sequence from the rear stage side to the front stage side in conjunction with the other power supply units1. As a result, it is possible to avoid the problem of the order of turning on the powers in the case where the PCI-Express is used for the connection of the units described above.

Further, by the processing shown inFIG. 4, when the powers are turned on, the power supply units1can assign, to the processing units, ID numbers corresponding to the order of turning-on of the powers to all the processing units in conjunction with the other power supply units1. As a result, for example, as shown in the example ofFIG. 5, the power supply units1can assign the IDs (=1, 2, 3, . . . ) to the processing units2from the rear stage side to the front stage side in conjunction with the other power supply units.

As described above, in this embodiment, the IDs of the numbers corresponding to the order of turning-on of the powers to all the processing units are assigned to the processing units, respectively, with the result that the IDs of the numbers correlative to the order of the connection of the processing units2can be assigned to the processing units2, respectively.

Each of the processing units2to which the IDs are assigned specifies the other processing units2using IDs indicated by relative values to the ID thereof, to mutually perform communication. Thus, in this embodiment, the processing units2do not have to have a routing table and do not have to refer to the routing table for the communication with the other processing units, resulting in the improvement of the communication speed among the processing units and the improvement of the processing speed.

In addition, the power supply units1according to this embodiment can assign the IDs to the processing units2each time the power to the processing unit2is turned on. Thus, it is possible to deal with the increase and reduction in number of the processing units2included in the processing system100.

For example, the assumption is made that the user increases the number of processing units for expanding the size of the processing system100in the state where the power is off. When the power is turned on thereafter, the IDs of numbers corresponding to the order of the startup (the order of the connection) of all the processing units including the processing units added are assigned to the processing units, respectively. Further, for example, in the case where the number of processing units included in the processing system100are reduced, the IDs of the numbers corresponding to the order of the startup (the order of the connection) of all the processing units after the reduction in number thereof are assigned to the processing units, respectively.

In this way, in the processing system100according to this embodiment, even if the number of the processing units2included in the processing system100is increased or reduced, it is possible to properly assign, to the processing units2, respectively, the IDs of the numbers correlative to the order of the connection of the processing units.

Further, the power supply unit1in this embodiment automatically judges whether the power supply unit1concerned is the head power supply unit1′ or the relay power supply unit1″. Therefore, regardless of the position where the user disposes the power supply unit1, the power supply unit1can effectively operate and properly assign the IDs to the processing units, respectively.

(Operation of Processing System after Assignment of IDs)

Next, a description will be given on an operation in the case where the processing units2communicate with each other using the IDs assigned by the power supply units and execute an application program.

FIGS. 6 and 7are flow diagrams each showing the operation in that case. It should be noted that in the description with reference toFIGS. 6 and 7, the processing units2are referred to as a first processing unit2X, a second processing unit2Y, and a third processing unit2Z from the front stage side in sequence as a matter of convenience. In addition, in the description with reference toFIGS. 6 and 7, the ID=3 is assigned to the first processing unit2X, the ID=2 is assigned to the second processing unit2Y, and the ID=1 is assigned to the third processing unit2Z as a matter of convenience.

First, a description will be given with reference toFIG. 6.

When the power supply unit1powers on the first to third processing units2X,2Y, and2Z and assigns IDs thereto, the first to third processing units2X,2Y, and2Z each are brought into a standby state of start of a program.

To cause the processing units2to execute an application program, the power supply unit1(microcontroller5) determines the processing unit2that is to be caused to execute the application program. In this case, the power supply unit1determines the number of processing units2to be used and the processing unit2that is to be caused to execute the application program.

For example, the power supply unit1determines that three processing units, i.e., the first processing unit2X, the second processing unit2Y, and the third processing unit2Z are caused to execute one application program in cooperation with one another. In the case where another processing unit2is connected, the power supply unit1may cause the processing unit2to execute another application program.

The power supply unit1transfers a program31to the first processing unit2X (ID=3) and outputs a program start signal (see,FIG. 6[1]). The first processing unit2X starts the program31based on the program start signal from the power supply unit1.

Here, the program31is programmed so that an application is executed with another processing unit specified by myID−1 and another processing unit2specified by myID−2 cooperating with each other. In the example shown inFIG. 6, because the ID of the first processing unit2X is 3, myID−1=2 and myID−2=1 are obtained. Therefore, the first processing unit2X cooperates with the second processing unit2Y (ID=2) to the immediate right thereof (rear side by one stage) and the third processing unit2Z (ID=1) next but one on the right-hand side thereof (rear side by two stages) to execute the application.

When the program31is started, the first processing unit2X is brought into a standby state of the start of programs32and33.

When outputting a program start signal with respect to the first processing unit2X, the power supply unit1transfers the program32to the second processing unit2Y (ID=2) and outputs the program start signal (see,FIG. 6[2]).

The second processing unit2Y starts the program32based on the program start signal from the power supply unit1.

The program32is programmed so that the application is executed with another processing unit2specified by myID+1 and the processing unit2specified by myID−1 cooperating with each other. The ID of the second processing unit2Y is 2, so myID+1=3 and myID−1=1 are obtained. Therefore, the second processing unit2Y performs the application in cooperation with the first processing unit2X (ID=3) to the immediate left thereof (front side by one stage) and the third processing unit2Z (ID=1) to the immediate right thereof (rear side by one stage).

When the program32is started, the second processing unit2Y performs a start confirmation and outputs a confirmation message to the processing unit2×(ID=3=myID+1) (see,FIG. 6[4]). Upon output of the confirmation message to the first processing unit2X, the processing unit2Y is brought into a standby state of the start of the program33.

When the program start signal is output to the second processing unit2Y, the power supply unit1transfers the program33to the third processing unit2Z and outputs the program start signal (see,FIG. 6[3]).

Based on the program start signal from the power supply unit1, the third processing unit2Z starts the program33.

The program33is programmed so that the application is executed with another processing unit2specified by myID+2 and the processing unit2specified by myID+1 cooperating with each other. The ID of the third processing unit2Z is 1, so myID+2=3 and myID+1=2 are obtained. Therefore, the third processing unit2Z executes the application in cooperation with the first processing unit2X (ID=3) next but one on the left-hand side thereof (front side by two stages) and the second processing unit2Y (ID=2) to the immediate left thereof (front side by one stage).

When the program33is started, the third processing unit2Z performs the start confirmation and outputs a confirmation message to the first processing unit2X (ID=3=myID+2) and the second processing unit2Y (ID=2=myID+1) (see,FIG. 6[5] and [6]).

After that, the first to third processing units2X,2Y, and2Z each specify a communication target with the use of the ID expressed by the relative value to the ID thereof when necessary, to execute the application in cooperation with each other.

Next, a description will be given with reference toFIG. 7.

FIG. 7shows the case where the first processing unit2X representatively executes the processing such as a start instruction of a program.

When the power supply unit1turns on the powers to the first to third processing units2X,2Y, and2Z and assigns the IDs thereto, the first to third processing units2X,2Y, and2Z are brought into a standby state of the start of each program.

The power supply unit1transfers a program34to the first processing unit2× and outputs a program start signal (see,FIG. 7[1]).

Based on the program start signal from the power supply unit1, the first processing unit2X starts the program34. Next, based on the program34, the first processing unit2X transfers a program35to the processing unit2specified by myID−1 and outputs a program start signal. The ID of the first processing unit2X is 3, so myID−1=2 is obtained. Therefore, the first processing unit2X transfers the program35to the second processing unit2Y (ID=2) to the immediate right thereof and outputs the program start signal (see,FIG. 7[2]).

Based on the program start signal from the first processing unit2X, the second processing unit2Y starts the program35. The program35is programmed so that the application is executed with the processing unit2specified by myID+1 and the processing unit2specified by myID−1 cooperating with each other. Therefore, the second processing unit2Y executes the application in cooperation with the first processing unit2X (ID=3=myID+1) to the immediate left thereof and the third processing unit2Z (ID=1=myID−1) to the immediate right thereof.

When the program35is started, the second processing unit2Y is brought into the standby state of the start of the application.

When the program start signal is output to the second processing unit2Y, the first processing unit2X subsequently transfers a program36to the processing unit2specified by myID−2 based on the program34and outputs the program start signal. The ID of the first processing unit2X is3, and myID−2=1 is obtained, so the first processing unit2X transfers the program36to the third processing unit2Z (ID=1) next but one on the right-hand side thereof and outputs the program start signal (see,FIG. 7[3]).

Based on the program start signal from the first processing unit2X, the third processing unit2Z starts the program36. The program36is programmed so that the application is executed with the processing unit2specified by myID+2 and the processing unit2specified by myID+1 cooperating with each other. Therefore, the third processing unit2Z executes the application in cooperation with the first processing unit2X (ID=3=myID+2) next but one on the left-hand side thereof and the second processing unit2Y (ID=2=myID+1) to the immediate left thereof.

Upon completion of the start of the program36by the third processing unit2Z, the first to third processing units2X,2Y, and2Z each specify a communication target using the ID expressed by the value relative to the ID thereof when necessary and execute the application in cooperation with one another.

As described with reference toFIGS. 6 and 7, in this embodiment, because the IDs of the numbers correlative to the connection order of the processing units2are assigned to the processing units2, respectively, the processing units2can specify the communication target using the ID expressed by the value relative to the ID thereof. As a result, the processing units2do not have to have the routing table and do not have to reference the routing table in the communication among the processing units2as described above. Thus, it is possible to improve the communication speed among processing units and improve the processing speed.

In the description with reference toFIGS. 6 and 7, the case where the three processing units2perform the processing in cooperation with one another is given. However, the number of processing units2that execute the processing in cooperation with one another is not limited to three, and may be two or four or more.

In the description with reference toFIGS. 6 and 7, the case where the three processing units2that are continuously arranged execute the processing in cooperation with one another is given. However, it is also possible to cause processing units that are not continuously arranged (connected) to perform the processing in cooperation with one another. That is, it is possible to cause the processing units2that are not continuously arranged to execute the processing in cooperation with one another by appropriately changing the information (myID+x) for specifying the communication target on the basis of the ID thereof, which is the information included in the program executed by the processing units2.

(Processing at Time when Power is Turned Off)

Next, a description will be given on an operation at a time when the power to the processing system100is turned off.

FIG. 8is a flowchart showing an operation in a case where the power supply unit turns off the power to the processing unit.FIG. 9is a sequence diagram showing the operation at the time when the power to the processing system is turned off. It should be noted that inFIG. 9, the structure of the processing system100is simplified for ease of the explanation.

The microcontroller5of the power supply unit1judges whether the power supply unit1concerned is the head power supply unit1′ or the relay power supply unit1″ based on the relationship between the other power supply unit1(Step201) (see,FIG. 9[1] and [2]).

When it is judged that the power supply unit1concerned is the head power supply unit1′ (YES in Step201), the microcontroller5judges whether the user presses the power supply switch15, and a signal of turning off the power supply switch is input from the power supply switch15(Step202).

When the user presses the power supply switch15, and the signal of turning off the power supply switch is input (YES in Step202), the microcontroller5performs the subsequent processing of Step204. On the other hand, when the signal of turning off the power supply switch is not input from the power supply switch15(NO in Step202), the microcontroller5performs the processing of Step202again and judges whether the signal of turning off the power supply switch is input.

That is, when the power supply unit1concerned is judged to be the head power supply unit1′, the power supply unit1′ is brought into a standby state of turning off the power to the power supply switch15provided thereto.

In Step201, when the power supply unit1concerned is not judged to be the head power supply unit1′ (NO in Step201), that is, when the power supply unit1is judged to be the relay power supply unit1″, the microcontroller5performs the processing of Step203.

In Step203, the microcontroller5judges whether a “Shut_down” signal is input from the power supply unit1in the front stage.

In the case where the “Shut_down” signal is input from the power supply unit1in the front stage (YES in Step203), the microcontroller5performs the subsequent processing of Step204. On the other hand, in the case where the “Shut_down” signal is not input from the power supply unit1in the front stage (NO in Step203), the microcontroller5performs the processing of Step203again to judge whether the “Shut_down” signal is input from the power supply unit1in the front stage.

In other words, when it is judged that the power supply unit1concerned is the relay power supply unit1″, the power supply unit1″ is brought into a standby state of the input of the “Shut_down” signal from the power supply unit1in the front stage.

In the case where the power supply unit1is the head power supply unit1′, when the signal of turning off the power supply switch is input from the power supply switch15(YES in Step202) (see,FIG. 9[3]), or in the case where the power supply unit1concerned is the relay power supply unit1″, when the “Shutdown” signal is input from the power supply unit1in the front stage (YES in Step203) (see,FIG. 9[8]), the processing of Step204is performed.

In Step204, the inputs of “Power_OK.” signals from the processing unit group20connected thereto are counted. As described above, when the voltage of 12 V is supplied from the power supply unit1, the processing unit2outputs the “Power_OK” signal to the power supply unit1(see,FIG. 9[4], [5], and [10]). Therefore, in Step204, the microcontroller5only has to count the “Power_OK” signals. As a result, the microcontroller5of the power supply unit1can obtain the number of processing units2connected thereto.

When the inputs of the “Power_OK” signals are counted, the microcontroller5outputs the “Shut_down” signal (shutdown control signal) to the units1and2by the number of inputs of the “Power_OK” signals plus one in sequence from the side on which the connected position is close to the power supply unit1(Step205) (see,FIG. 9[6], [7], [8], [11], and [12]).

Here, the microcontroller5outputs the “Shut_down” signals to the units by the number of inputs of the “Power_OK” signals plus one. Therefore, in the case where the other power supply unit1is connected in the rear stage, the “Shut_down” signal is input to the power supply unit in the rear stage (Step203) (see,FIG. 9[8]).

On the other hand, in the case where the other power supply unit1is not connected in the rear stage, that is, the power supply unit1concerned is the power supply unit1of the last stage, the (number of inputs of “Power_OK.” signals+1)-th “Shut_down” signal output comes to nothing (see,FIG. 9[12]).

When the “Shut_down” signal is output, the microcontroller5terminates the supply of the voltage of 12 V to the processing unit group20connected thereto (Step206) (see,FIG. 9[9] and [13]) and terminates the processing.

By the processings shown inFIG. 8, the power supply units1can sequentially shut down the processing units2connected thereto from the front stage side and can sequentially shut down the processing units2that constitute the processing system100from the front stage side in conjunction with the other power supply unit1. As a result, it is possible to avoid the above-mentioned problem of the order of the turning-off of the power in the case where the PCI-Express is used for the connection of the units.

Second Embodiment

It should be noted that in the description of the second embodiment, portions having the same structures and functions as those in the first embodiment will be denoted by the same reference numerals or symbols, and their descriptions will be omitted or simplified.

(Structure of Processing System)

FIG. 10is a diagram showing a processing system according to this embodiment.

As shown inFIG. 10, a processing system200is formed by arranging the units1and2in a ring-shaped form.

As in the first embodiment, the user can arbitrarily select necessary units from among the power supply unit1, the operation unit2A, the video unit2B, and the network unit2C in accordance with the necessary size to structure the processing system200also in the second embodiment. It should be noted that the maximum number of processing units2connected to one power supply unit1is preset, for example, to four as in the first embodiment.

Here, as shown inFIG. 10, in the processing system200in the second embodiment, the units1and2are arranged in the ring-shaped form, so the forefront (head unit) is not defined in the positional relationship among the power supply units1. In this case, it may be impossible for each of the power supply units1to judge whether to be the head power supply unit1′ or the relay power supply unit1″ in the positional relationship with the other power supply units1. In this case, there arises a problem in that, in each of the power supply units1that constitute the processing system200, it is difficult to determine from which processing unit2the startup and shutdown operations are started.

In view of this, in the case where the power supply switch15provided to the power supply unit1according to this embodiment is pressed, the power supply unit1serves as the head power supply unit1′, and the turning-on and turning-off of the powers to the processing units2are controlled in a predetermined order.

A detailed description will be given on the operation of the processing system200. It should be noted that the operation of the power supply unit1will be mainly described in the description on the operation of the processing system200.

(Processing at Time when Power is Turned on)

First, the processing at a time when the power to the processing system200is turned on will be described.

FIG. 11is a flowchart showing an operation in the case where the power supply unit turns on the powers to the processing units and assigns IDs of numbers corresponding to the order of the turning-on to the processing units.FIG. 12is a sequence diagram showing the operations at the time of turning on the powers to the processing units. InFIG. 12, the structure of the processing system200is simplified for ease of the explanation. In the description ofFIG. 11, points different from those ofFIG. 4will be mainly described.

As shown inFIG. 11, the microcontroller5of the power supply unit1judges whether the power supply switch15provided to the power supply unit1concerned is pressed, and a signal of turning on the power supply switch is input from the power supply switch15(Step301).

In the case where the signal of turning on the power supply switch is not input from the power supply switch15(NO in Step301), the microcontroller5judges whether the “Boot” signal is input from the power supply unit1in the front stage (Step302).

In the case where the “Boot” signal is not input from the power supply unit1in the front stage (NO in Step302), the microcontroller5performs the processing of Step301again to judge whether the signal of turning on the power supply switch is input from the power supply switch15.

That is, the power supply units1each are brought into the standby state of the input of the signal of turning on the power supply switch from the power supply switch15thereof or the input of the “Boot” signal from the power supply unit1in the front stage (see,FIG. 12[1], [2], and [3]).

In Step301, in the case where the power supply switch15is pressed by the user (YES in Step301) (see,FIG. 12[4]), the microcontroller5supplies the voltage of 12 V to the processing unit group20connected thereto (Step304) (see,FIG. 12[5]). It should be noted that in the case where the power supply switch15is pressed by the user, the power supply unit1including the power supply switch15concerned recognizes that the power supply unit1is the head power supply unit1′.

In Step302, in the case where the “Boot” signal is input from the power supply unit1in the front stage (YES in Step302) (see,FIG. 12[7] and [13]), the microcontroller5outputs the “Unit_OK.” signal (L) to the power supply unit1in the front stage (Step303) (see,FIG. 12[8] and [14]). It should be noted that in the case where the “Boot” signal is input from the power supply unit1in the front stage, the power supply unit1concerned recognizes that the power supply unit1is the relay power supply unit1″.

When the “Unit_OK.” signal (L) is output to the power supply unit1in the front stage, the microcontroller5supplies the voltage of 12 V to the processing unit group20connected thereto (Step304) (see,FIG. 12[9], [11], [15], and [17]).

It should be noted that the processings subsequent to Step304are the same as those subsequent to Step105ofFIG. 4, so their descriptions will be omitted.

FIG. 15is a diagram showing an example of an order of turning-on of the powers to the processing system in the case where the processings shown inFIG. 11are executed.

As shown inFIG. 15, in the case where the user presses the power supply switch15of one power supply unit1out of the plurality of power supply units1that constitute the processing system200, the power supply unit1concerned is set as the head power supply unit1′. Further, the other power supply units serve as the relay power supply units1″.

Then, the power supply units1are interlocked to turn on the powers to the processing units2in sequence from the processing unit2that is farthest from the head power supply unit1′ in the electrical connection relationship (from the processing unit2below the head power supply unit1′ inFIG. 15). Subsequently, the power supply units1are interlocked to assign, to the processing units, respectively, the IDs of numbers corresponding to the order of the turning-on of the powers.

As a result, as shown inFIG. 15, the powers to the processing units2are turned on in sequence from the head power supply unit1′ side counterclockwise, and in accordance with the order of the turning-on of the powers, the IDs are assigned from the processing unit with the ID=1 counterclockwise.

As described above, in the second embodiment, the powers are turned on with the power supply unit1whose power supply switch15is pressed being as a standard, making it possible to deal with the case where the processing unit200is structured in the ring-shaped form. In addition, as in the first embodiment, the IDs correlative to the order of connection are assigned to the processing units, respectively, also in the second embodiment, with the result that the processing units2each can specify the communication target using the ID expressed by the value relative to the ID thereof. As a result, it is possible to improve the communication speed among the processing units and can improve the processing speed.

It should be noted thatFIG. 15shows the case where the powers are turned on counterclockwise. However, in the case where the electrical connection relationship of the units1and2is established in a reverse direction, the order of turning on the powers to the processing units2is set to be clockwise.

(Processing at Time when Power is Turned Off)

Next, a description will be given on an operation at a time when the power to the processing system200is turned off.

FIG. 13is a flowchart showing an operation in the case where the power supply unit turns off the powers to the processing units.FIG. 14is a sequence diagram showing the operation of turning off the power to the processing system. InFIG. 14, the structure of the processing system200is simplified for ease of the explanation. In the description ofFIG. 13, points different from those ofFIG. 8will be mainly described.

As shown inFIG. 13, the microcontroller5of the power supply unit1judges whether the power supply switch15provided to the power supply unit1concerned is pressed, and a signal of turning off the power supply switch is input from the power supply switch15(Step401).

In the case where the signal of turning off the power supply switch is not input from the power supply switch15(NO in Step401), the microcontroller5judges whether the “Shut_down” signal is input from the power supply unit1in the front stage (Step402).

In the case where the “Shut_down” signal is not input from the power supply unit1in the front stage (NO in Step402), the microcontroller5performs the processing of Step401again to judge whether the signal of turning off the power supply switch is input from the power supply switch15.

That is, the power supply units1are brought into the standby state of the input of the signal of turning off the power supply switch from the power supply switch15thereof or the input of the “Shut_down” signal from the power supply unit1in the front stage (see,FIG. 14[1] and [2]).

In Step401, in the case where the power supply switch15is pressed by the user (YES in Step401) (see,FIG. 14[3]), the microcontroller5counts the inputs of the “Power_OK.” signals from the processing unit group20connected thereto (Step403) (see,FIG. 14[4] and [5]). It should be noted that in the case where the power supply switch15is pressed by the user, the power supply unit1including the power supply switch15concerned is set as the head power supply unit1′.

In Step402, in the case where the “Shut_down” signal is input from the power supply unit1in the front stage (YES in Step402) (see,FIG. 14[8]), the microcontroller5performs the subsequent step of Step403. It should be noted that in the case where the “Shut_down” signal is input from the power supply unit1in the front stage, the power supply unit1concerned is set as the relay power supply unit1″.

It should be noted that the processings subsequent to Step403are the same as those subsequent to Step204ofFIG. 8, so their descriptions will be omitted.

FIG. 15shows an example of an order of shutdown of the processing units2in the case where the processing shown inFIG. 13is executed.

As shown inFIG. 15, in the case where the user presses the power supply switch15of one power supply unit1out of the plurality of power supply units1that constitute the processing system200, the power supply unit1concerned is set as the head power supply unit1′. Further, the other power supply units serve as the relay power supply units1″.

Then, the power supply units1are interlocked to turn off the powers to the processing units2sequentially from the processing unit2that is closest to the head power supply unit1′ in the electrical connection relationship (from the processing unit2above the head power supply unit1′ inFIG. 15). As a result, as shown inFIG. 15, the shutdown operation is performed in sequence clockwise from the head power supply unit1′. Thus, it is possible to avoid the problem of the order of shutdown operation in the case where the PCI-Express is used for the connection of the units described above.

It should be noted thatFIG. 15shows the case where the powers are turned off clockwise. However, in the case where the electrical connection relationship of the units1and2is established in the reversed direction, the powers of the processing units2are turned off counterclockwise.

VARIOUS MODIFIED EXAMPLES

In the first embodiment described above, the case where the units1and2have the linear positional relationship is described with reference toFIGS. 1,2, and the like. However, the positional relationship among the units1and2is not limited to this. Typically, any positional relationship among the units1and2can be applied, as long as the electrical connection relationship among the units1and2is a serial relationship.

The same holds true for the processing system200according to the second embodiment. That is, any positional relationship among the units1and2may be applied, as long as the electrical connection relationship among the units1and2is the ring-shaped form.

The present application contains subject matter related to that disclosed in Japanese Priority Patent Application JP 2009-189500 filed in the Japan Patent Office on Aug. 18, 2009, the entire content of which is hereby incorporated by reference.