Semiconductor memory device having an aluminum-based metallization film and a refractory metal silicide-based metallization film

A semiconductor memory device includes a plurality of bit lines formed on an interlayer insulation film and arranged with a first pitch defining a distance between neighboring bit lines, and word lines which are formed on an insulation film formed on the bit lines and which are arranged with a second pitch defining a distance between neighboring word lines. One of the bit and word lines which has a relatively wide pitch comprises an aluminum-based metallization film, and the other line which has a relatively narrow pitch comprises a refractory metal silicide-based metallization film.

BACKGROUND OF THE INVENTION 
The present invention generally relates to a semiconductor memory device 
having an aluminum-based metallization film and a refractory metal 
silicide-based metallization film. 
Generally, in a conventional field effect transistor, source and drain 
regions are formed by a self-alignment process in which a gate electrode 
is used as a mask film. Therefore, such a gate electrode is formed by 
using polysilicon having a high heat-resistant property. Polysilicon has a 
disadvantage in that it's value of electrical resistance is higher than 
that of an alloy of aluminum-silicon, which is used for forming source and 
drain electrodes. As in a case of a dynamic random access memory (DRAM) 
device where a gate electrode of a polysilicon film is used as a word 
line, a metallization film of an aluminum-silicon alloy is formed on an 
insulating film positioned in a vicinity of a top surface of the DRAM 
device, and is connected to the gate electrode of the word line at a 
suitable position. That is, the aluminum-silicon metallization film is 
used for improving conductivity of the gate electrode. However, an 
aluminum-silicon alloy has a disadvantage that heat-resistance is low. 
It is also known to use, as a metallization film, a polycide film which is 
a stacked layer consisting of a polysilicon film and a refractory metal 
silicide film. Compared with an aluminum-silicon metallization film, a 
polycide film has a disadvantage of high electric resistance and has 
advantages of high heat-resistance and high resistance to electromigration 
and stress-migration. 
As can be seen from the aforementioned explanation, metallization materials 
have both advantages and disadvantages. 
Recently, a size of a semiconductor chip of the DRAM device is limited in 
view of a size of a package which accommodates the semiconductor chip. For 
example, a standard package has a width (a short side) of approximately 
7.5 (mm) (300 (mil)). Therefore, a semiconductor chip is necessarily of a 
rectangular shape. As a result, in a case where sense amplifiers, bit 
drivers and column decoders are arranged along the short side of the chip, 
a bit line pitch which defines a distance between centers of neighboring 
bit lines, must be necessarily reduced, compared with a word line pitch 
which defines a distance between centers of neighboring word lines 
arranged in a direction of a long side of the chip. On the other hand, in 
a case where a row driver and a row decoder (word decoder) are arranged in 
the short-side direction of the chip, the word line pitch must be made 
smaller than the bit line pitch. Therefore, it is required to provide a 
metallization structure suitable to the rectangular semiconductor chip. 
SUMMARY OF THE INVENTION 
It is therefore a general object of the present invention to provide a 
novel and useful semiconductor memory device having an aluminum-based 
metallization film and a refractory metal silicide-based metallization 
film which can meet the above requirement. 
A more specific object of the present invention is to provide a 
semiconductor memory device in which one of the bit and word lines which 
has a relatively narrow line pitch is formed by a refractory metal 
silicide-based metallization film, and the other line which has a 
relatively wide line pitch is formed by an aluminum-based metallization 
film. With the above metallization structures, advantageous properties of 
the refractory metal silicide-based metallization and the aluminum-based 
metallization can be greatly utilized. A semiconductor memory device 
having the above-mentioned metallization structure has, an the whole, good 
conductivity, high heat-resistance and high electromigration and 
stress-migration resistance. Additionally, the production process can be 
simplified. 
The above objects of the present invention are achieved by a semiconductor 
memory device which includes a semiconductor substrate; a first insulation 
film having a contact hole; a plurality of gate electrodes provided so as 
to be surrounded by the first insulation film; a storage capacitor layer 
including a pair of electrodes, one of the pair of electrodes being in 
contact with the semiconductor substrate through the contact hole; an 
interlayer insulation film formed on the storage capacitor layer; a 
plurality of bit lines formed on the interlayer insulation film and 
arranged with a first pitch defining a distance between neighboring bit 
lines; a second insulation film formed on the bit lines; and a plurality 
of word lines formed on the second insulation film and arranged with a 
second pitch defining a distance between neighboring word lines. One of 
the bit and word lines which has a relatively wide pitch comprises an 
aluminum-based metallization film, and the other line which has a 
relatively narrow pitch comprises a refractory metal silicide-based 
metallization film. 
The above objects of the present invention are also be achieved by a 
semiconductor memory device comprising a semiconductor substrate; a first 
insulation film having a contact hole; a plurality of gate electrodes 
provided so as to be surrounded by the first insulation film and arranged 
with a first pitch defining a distance between neighboring gate 
electrodes; a storage capacitor layer including a pair of electrodes, one 
of the pair of electrodes being in contact with the semiconductor 
substrate through the contact hole; an interlayer insulation film formed 
so as to cover the storage capacitor layer; and a plurality of bit lines 
formed on the interlayer insulation film and arranged with a second pitch 
defining a distance between neighboring bit lines. Each of the gate 
electrodes comprises a refractory metal silicide-based metallization film, 
and each of the bit lines comprises an aluminum-based metallization film. 
Other objects, features and advantages of the present invention will become 
apparent from the following detailed description when read in conjunction 
with the accompanying drawings.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
The present invention is based on the following viewpoints in order to 
obtain metallizations suitable for the aforementioned semiconductor chip 
in which it is necessary to reduce the line pitch in the short side of the 
semiconductor chip. Since polysilicon has high resistance, polysilicon is 
suitable neither for a word line metallization film which contributes to 
enhancing conductivity of the gate electrodes, nor for a bit line. An 
aluminum-based metallization such as pure aluminum and an alloy of 
aluminum and silicon has poor heat-resistant properties and poor 
electromigration and stress-migration resistance. On the other hand, the 
aluminum-based metallization has greatly low resistance, and is always 
employed in a peripheral circuit portion of the DRAM device such as a 
decoder circuit, a sense amplifier and a logic circuit. From the above 
reasons, it is advantageous to using the aluminum-based metallization 
provided in a memory cell portion of the DRAM device from the viewpoint of 
improvement in performance and manufacturing process. 
It is noted that a metallization pattern of an electrode or wiring 
interconnection decreases in cross section as the width thereof decreases. 
As a result, the current density of current which flows through the 
metallization pattern increases, which shortens a lifetime of the device. 
It is noted that the lifetime depends exponentially on the current 
density. A reduction of the life time due to electromigration and 
stress-migration is different depending on material. The lifetime of a 
refractory metal silicide metallization film is much longer than that of 
the aluminum-based metallization. 
From the aforementioned viewpoints, in the present invention, one of the 
bit and word lines which has a relatively narrow line pitch is formed by a 
refractory metal silicide-based metallization, and the other line which 
has a relatively wide line pitch is formed by an aluminum-based 
metallization. With the above metallization structures, advantageous 
properties of the refractory metal silicide-based metallization and the 
aluminum-based metallization can be greatly utilized. A semiconductor 
memory device having the above-mentioned metallization structure has good 
conductivity, high heat-resistance and high electromigration and 
stress-migration resistance. 
A description is given of a preferred embodiment of the present invention 
with reference to FIGS. 1 and 2. FIG. 1 is a plan view of an essential 
portion of a semiconductor memory device of the preferred embodiment, and 
FIG. 2 is a cross sectional view taken along a line II--II of FIG. 1. 
Referring to FIGS. 1 and 2, a field insulation film 12 of a silicon dioxide 
film is formed on a main surface of a p-type silicon substrate 11 by 
selective thermal oxidation. A gate insulation film 13 is formed on the 
surface of the silicon substrate 11 by thermal oxidation. A polysilicon 
film is formed by chemical vapor deposition and is then patterned by the 
conventional photolithography technology. Thereby gate electrodes (word 
lines) of polysilicon films 14.sub.1, 14.sub.2, 14.sub.3 are formed as 
shown in FIG. 2. Thereafter, n.sup.+ -type regions 15.sub.1 and 16.sub.1 
are formed by doping the silicon substrate 11 with arsenic (As) ions by a 
conventional self-alignment process. The region 15.sub.1 is a source 
region, or a bit line contact region, and the region 16.sub.1 is a drain 
region, or a contact region to a storage capacitor electrode. An 
interlayer insulation film 17 is formed on the entire surface by chemical 
vapor deposition. Contact holes are formed in the interlayer insulation 
film 17 by anisotropic etching. Then a polysilicon film 20 is formed by 
chemical vapor deposition and is then patterned by the conventional 
photolithography technology. Thereby a storage electrode 18.sub.1 is 
formed so as to be in contact with the n.sup.+ -type drain region 
16.sub.1. The storage electrodes 18.sub.1 are then subjected to thermal 
oxidation to form a dielectric film (not shown) around the storage 
electrodes 18.sub.1. An opposed electrode (called a cell plate) 19.sub.1 
is formed by depositing a polysilicon film and patterning the deposited 
polysilicon film. The opposed electrode 19.sub.1 is the other electrode 
out of the paired electrodes of the memory cell capacitor. An interlayer 
insulation film 20 is deposited to the entire surface. A contact hole to 
the source region 15.sub.1 is formed in the interlayer insulation film 20 
and the gate insulation film by anisotropic etching. A polysilicon film 
21.sub.1 formed on the entire surface by chemical vapor deposition. 
Subsequently, a tungsten silicide film 22.sub.1 is formed on the 
polysilicon film 21.sub.1 by sputtering. The polysilicon film 21.sub.1 and 
the tungsten silicide film 22.sub.1 are subjected to a patterning process 
based on the conventional photolithography technology. Thereby, bit lines 
30.sub.1 and 30.sub.2 each consisting of the patterned polysilicon film 
21.sub.1 and tungsten silicide film 22.sub.1 are formed. Then a 
passivation film 23 of a phosphosilicate glass (PSG) film is formed. Then 
an aluminum-based metallization film such as a pure aluminum film and an 
alloy film of aluminum and silicon is formed on the phosphosilicate glass 
film 23, and is then patterned. Thereby word lines 24.sub.1, 24.sub.2 and 
24.sub.3 are formed. The word lines 24.sub.1, 24.sub.2 and 24.sub.3 are 
connected to related gate electrodes 14.sub.1, 14.sub.2 and 14.sub.3, and 
contribute to improving conductivity of the gate electrodes 14.sub.1, 
14.sub.2 and 14.sub.3. In FIG. 1, MC indicates a memory cell portion which 
amounts to 2 bits. 
As can be seen from FIG. 1, the memory cell portion MC has a rectangular 
shape and has long sides along which the bit lines 30.sub.1 and 30.sub.2 
extend, and short sides along which the word lines 24.sub.1 and 24.sub.2 
extend. The rectangular shape of the memory cell portion MC is necessarily 
determined depending on a shape of the semiconductor chip on which the 
memory cell portion MC is formed. That is, the shape of the chip has a 
rectangular shape, and therefore has long sides along which the bit lines 
30.sub.1 and 30.sub.2 extend, and short sides along which the word lines 
24.sub.1 and 24.sub.2 extend. 
FIG. 3 is a schematic plan view of the semiconductor chip of the DRAM 
device. The chip comprises four identical blocks 100, 200, 300 and 400, 
and another block 500. Each of the blocks 100, 200, 300 and 400 includes 
two memory cell arrays 110 and 111, two sense amplifiers 112 and 113, two 
column decoders 114 and 115, and two row decoders 116 and 117. The block 
500 is a logic circuit. Each of the memory cell arrays 110 and 111 has a 
plurality of memory cells which are arranged in the form of a matrix. Pads 
120 are provided on the chip along short sides of the chip. 
As shown in FIGS. 1 and 3, the sense amplifiers 112 and 113 are arranged in 
the short-side (width) direction of the chip, it is required to set a bit 
line pitch (P1) of the bit lines 30.sub.1 and 30.sub.2 narrower than a 
word line pitch (P2) of the word lines 24.sub.1 and 24.sub.2. As described 
previously, electromigration and stress-migration increase as the width of 
the metallization becomes narrow. From this reason, the bit lines 30.sub.1 
and 30.sub.2 are constituted by polycide films, each of which consists of 
sequentially stacked polysilicon and tungsten silicide films, as described 
before. On the other hand, the word line pitch P2 of the word lines 
24.sub.1 and 24.sub.2 can be wider than the bit line pitch P1. Therefore, 
electromigration and stress-migration occur less in the word lines 
24.sub.1 and 24.sub.2 than in the bit lines 30.sub.1 and 30.sub.2. From 
the above reason, the word lines 24.sub.1 and 24.sub.2 are constituted by 
aluminum-based metallization films, as described before. With this 
metallization structure, good conductivity of the word lines 24.sub.1 and 
24.sub.2 can be obtained. 
The aforementioned structure provided by the present invention is 
advantageous particularly to DRAM devices. This is because DRAM devices 
are based on changing up/discharging operations with respect to memory 
cell capacitors. On the other hand, in SRAM devices, EPROM devices and 
mask ROM devices, a current is passed through a bit line, and a high-speed 
operation is particularly required. From these viewpoints, aluminum-based 
metallization films are generally used for forming bit lines. 
A description is given of another preferred embodiment of the present 
invention with reference to FIG. 4. In FIG. 4, those parts which are the 
same as those in the previous figures are given the same reference 
numerals. 
An essential feature of the embodiment of FIG. 4 is that gate electrodes 
44.sub.1, 44.sub.2, . . . are constituted by polycide films, and bit lines 
22.sub.1A, . . . are constituted by aluminum-silicon alloy films. The gate 
electrode 44.sub.1 consists of a patterned polysilicon film 44.sub.1A and 
a patterned tungsten silicide film 44.sub.1B. In the embodiment of FIG. 4, 
row decoders (not shown) are arranged in the short-side direction of the 
chip, and sense amplifiers (not shown) are arranged in the long side 
direction thereof. Therefore, the pitch P2 of the neighboring gate 
electrodes (or word lines) must be smaller than that (P1) of the 
neighboring bit lines. It is noted that since the conductivity of the 
polycide gates electrodes 44.sub.1, 44.sub.2, . . . is better than that of 
a polysilicon film, the gate electrodes 44.sub.1, 44.sub.2, . . . can be 
used as word lines by themselves. In other words, additional word lines 
such as the word lines 24.sub.1 and 24.sub.2 are not necessary to obtain 
satisfactory conductivity of word lines. 
In the above embodiments, the tungsten silicide films 22.sub.1, 44.sub.1B 
and 44.sub.2B can be substituted with molybdenum silicide, tantalum 
silcide or titanium silicide films. 
The present invention is not limited to the aforementioned embodiments, and 
variations and modifications may be made without departing from the scope 
of the present invention.