Multi-die inductors with coupled through-substrate via cores

A semiconductor device comprising first and second dies is provided. The first die includes a first through-substrate via (TSV) extending at least substantially through the first die and a first substantially helical conductor disposed around the first TSV. The second die includes a second TSV coupled to the first TSV and a second substantially helical conductor disposed around the second TSV. The first substantially helical conductor is configured to induce a change in a magnetic field in the first and second TSVs in response to a first changing current in the first substantially helical conductor, and the second substantially helical conductor is configured to have a second changing current induced therein in response to the change in the magnetic field in the second TSV.

CROSS-REFERENCE TO RELATED APPLICATION(S)

This application contains subject matter related to a U.S. Patent Application by Kyle K. Kirby, entitled “SEMICONDUCTOR DEVICES WITH BACK-SIDE COILS FOR WIRELESS SIGNAL AND POWER COUPLING.” The related application, of which the disclosure is incorporated by reference herein, is assigned to Micron Technology, Inc., and is identified as U.S. application Ser. No. 15/584,278, filed May 2, 2017.

This application contains subject matter related to a U.S. Patent Application by Kyle K. Kirby, entitled “SEMICONDUCTOR DEVICES WITH THROUGH-SUBSTRATE COILS FOR WIRELESS SIGNAL AND POWER COUPLING.” The related application, of which the disclosure is incorporated by reference herein, is assigned to Micron Technology, Inc., and is identified as U.S. application Ser. No. 15/584,310, filed May 2, 2017.

This application contains subject matter related to a U.S. Patent Application by Kyle K. Kirby, entitled “INDUCTORS WITH THROUGH-SUBSTRATE VIA CORES.” The related application, of which the disclosure is incorporated by reference herein, is assigned to Micron Technology, Inc., and is identified as U.S. application Ser. No. 15/584,294, filed May 2, 2017.

This application contains subject matter related to a U.S. Patent Application by Kyle K. Kirby, entitled “3D INTERCONNECT MULTI-DIE INDUCTORS WITH THROUGH-SUBSTRATE VIA CORES.” The related application, of which the disclosure is incorporated by reference herein, is assigned to Micron Technology, Inc., and is identified as U.S. application Ser. No. 15/584,965, filed May 2, 2017.

TECHNICAL FIELD

The present disclosure generally relates to semiconductor devices, and more particularly relates to semiconductor devices including multi-die inductors with through-substrate via cores, and methods of making and using the same.

BACKGROUND

As the need for miniaturization of electronic circuits continues to increase, the need to minimize various circuit elements, such as inductors, increases apace. Inductors are an important component in many discrete element circuits, such as impedance-matching circuits, linear filters, and various power circuits. Since traditional inductors are bulky components, successful miniaturization of inductors presents a challenging engineering problem.

One approach to miniaturizing an inductor is to use standard integrated circuit building blocks, such as resistors, capacitors, and active circuitry, such as operational amplifiers, to design an active inductor that simulates the electrical properties of a discrete inductor. Active inductors can be designed to have a high inductance and a high Q factor, but inductors fabricated using these designs consume a great deal of power and generate noise. Another approach is to fabricate a spiral-type inductor using conventional integrated circuit processes. Unfortunately, spiral inductors in a single level (e.g., plane) occupy a large surface area, such that the fabrication of a spiral inductor with high inductance can be cost- and size-prohibitive. Accordingly, there is a need for other approaches to the miniaturization of inductive elements in semiconductor devices.

DETAILED DESCRIPTION

In the following description, numerous specific details are discussed to provide a thorough and enabling description for embodiments of the present technology. One skilled in the relevant art, however, will recognize that the disclosure can be practiced without one or more of the specific details. In other instances, well-known structures or operations often associated with semiconductor devices are not shown, or are not described in detail, to avoid obscuring other aspects of the technology. In general, it should be understood that various other devices, systems, and methods in addition to those specific embodiments disclosed herein may be within the scope of the present technology.

As discussed above, semiconductor devices are continually designed with ever greater needs for inductors with high inductance that occupy a small area. These needs are especially acute in multi-die devices with coupled inductors in different dies, where the efficiency of the inductor coupling can depend in part upon the inductors having high inductance. Accordingly, several embodiments of semiconductor devices in accordance with the present technology can provide multi-die coupled inductors having through-substrate via cores, which can provide high inductance and efficient coupling while consuming only a small area.

Several embodiments of the present technology are directed to semiconductor devices comprising multiple dies. A first die of the device includes a first through-substrate via (TSV) extending at least substantially through the first die and a first substantially helical conductor disposed around the first TSV. A second die of the device includes a second TSV coupled to the first TSV and a second substantially helical conductor disposed around the second TSV. The first substantially helical conductor can be a non-planar spiral configured to induce a change in a magnetic field in the first and second TSVs in response to a first changing current in the first substantially helical conductor, and the second substantially helical conductor can be a non-planar spiral configured to have a second changing current induced therein in response to the change in the magnetic field in the second TSV.

FIG. 1is a simplified cross-sectional view of a multi-die semiconductor device100including coupled inductors with TSV cores configured in accordance with an embodiment of the present technology. The device100includes a first die101and a second die151. The first die101has a first substrate101aand a first insulating material101b. The device100further includes a first TSV102that extends at least substantially through the first die101(e.g., extending from approximately the bottom of the first substrate101ato beyond an upper surface of the first substrate101a—completely through the first substrate101a—and into the first insulating material101b). The device100also includes a first substantially helical conductor103(“conductor103”) disposed around the first TSV102. In the present embodiment, the first conductor103is shown to include three complete turns (103a,103b, and103c) around the first TSV102. The first conductor103can be operably connected to other circuit elements (not shown) by leads120aand120b.

The turns103a-103cof the first conductor103are electrically insulated from one another and from the first TSV102. In one embodiment, the first insulating material101belectrically isolates the first conductor103from the first TSV102. In another embodiment, the first conductor103can have a conductive inner region covered (e.g., coated) by a dielectric or insulating outer layer. For example, an outer layer of the first conductor103can be an oxide layer, and an inner region of the first conductor103can be copper, gold, tungsten, or alloys thereof. The first TSV102can also include an outer layer and a magnetic material within the outer layer. The outer layer can be a dielectric or insulating material (e.g., silicon oxide, silicon nitride, polyimide, etc.) that electrically isolates the magnetic material of the first TSV102from the first conductor103. One aspect of the first conductor103is that the individual turns103a-103cdefine a non-planar spiral with respect to the longitudinal dimension “L” of the first TSV102. Each subsequent turn103a-103cis at a different elevation along the longitudinal dimension L of the first TSV102in the non-planar spiral of the first conductor103.

According to one embodiment of the present technology, the first substrate101acan be any one of a number of substrate materials suitable for semiconductor processing methods, including silicon, glass, gallium arsenide, gallium nitride, organic laminates, and the like. As will be readily understood by those skilled in the art, a through-substrate via, such as the first TSV102, can be made by etching a high-aspect-ratio hole into a substrate material and filling it with one or more materials in one or more deposition and/or plating steps. Accordingly, the first TSV102extends at least substantially through the first substrate101a, which is unlike other circuit elements that are additively constructed on top of the first substrate101a. For example, the first substrate101acan be a thinned silicon wafer of about 100 μm thickness, and the first TSV102can extend completely through the first substrate101a, such that a lowermost portion of the first TSV102can be exposed for mechanical and/or electrical connection to elements in another die.

The second die151has a second substrate151a, a second insulating material151b, and a second TSV152in the second die151extending out of the second substrate151aand into the second insulating material151b. The device100further includes a second substantially helical conductor153(“conductor153”) disposed around the second TSV152. In the present embodiment, the second conductor153is shown to include three complete turns (153a,153b, and153c) around the second TSV152. The second conductor153can be operably connected to other circuit elements (not shown) by leads170aand170b.

The three turns153a-153cof the second conductor153are electrically insulated from one another and from the second TSV152. In one embodiment, the second insulating material151belectrically isolates the second conductor153from the second TSV152. In another embodiment, the second conductor153can have a conductive inner region covered (e.g., coated) by a dielectric or insulating outer layer. For example, an outer layer of the second conductor153can be an oxide layer, and an inner region of the second conductor153can be copper, gold, tungsten, or alloys thereof. The second TSV152can also include an outer layer and a magnetic material within the outer layer. The outer layer can be a dielectric or insulating material (e.g., silicon oxide, silicon nitride, polyimide, etc.) that electrically isolates the magnetic material of the second TSV152from the second conductor153. One aspect of the second conductor153is that the individual turns153a-153cdefine a non-planar spiral with respect to the longitudinal dimension “L” of the second TSV152. Each subsequent turn153a-153cis at a different elevation along the longitudinal dimension L of the second TSV152in the non-planar spiral of the second conductor153.

According to one embodiment of the present technology, the second substrate151acan be any one of a number of substrate materials suitable for semiconductor processing methods, including silicon, glass, gallium arsenide, gallium nitride, organic laminates, and the like. As will be readily understood by those skilled in the art, a through-substrate via, such as the second TSV152, can be made by etching a high-aspect-ratio hole into a substrate material and filling it with one or more materials in one or more deposition and/or plating steps. Accordingly, the second TSV152extends substantially into the second substrate151a, unlike other circuit elements that are additively constructed on top of the second substrate151a. For example, the second substrate151acan be a silicon wafer of about 800 μm thickness, and the second TSV152can extend from 30 to 100 μm into the second substrate151a. In other embodiments, a TSV may extend even further into a substrate material (e.g., 150 μm, 200 μm, etc.), or may extend into a substrate material by as little as 10 μm.

According to one embodiment, the first conductor103can be configured to induce a magnetic field in the first and second TSVs102and152in response to a current passing through the first conductor103(e.g., provided by a voltage differential applied across the leads120aand120b). By changing the current passing through the first conductor103(e.g., by applying an alternating current, or by repeatedly switching between high and low voltage states), a changing magnetic field can be induced in the first and second TSVs102and152, which in turn induces a changing current in the second conductor153. In this fashion, signals and/or power can be coupled between a circuit comprising the first conductor103and another comprising the second conductor153.

In another embodiment, the second conductor153can be configured to induce a magnetic field in the first and second TSVs102and152in response to a current passing through the second conductor153(e.g., provided by a voltage differential applied across leads170aand170b). By changing the current passing through the second conductor153(e.g., by applying an alternating current, or by repeatedly switching between high and low voltage states), a changing magnetic field can be induced in the first and second TSVs102and152, which in turn induces a changing current in the first conductor103. In this fashion, signals and/or power can be coupled between a circuit comprising the second conductor153and another comprising the first conductor103.

In accordance with one embodiment of the present technology, the two TSVs102and152can include a magnetic material (e.g., a material with a higher magnetic permeability than the materials of the first and second substrates101aand151aand/or the first and second insulating materials101band151b) to increase the magnetic field in the two TSVs102and152when current is flowing through the first and/or second conductors103and/or153. The magnetic material can be ferromagnetic, ferrimagnetic, or a combination thereof. In one embodiment, the two TSVs102and152can have the same composition, and in other embodiments, the two TSVs102and152can have different compositions. The two TSVs102and152can include more than one material, either in a bulk material of a single composition or in discrete regions of different materials (e.g., coaxial laminate layers). For example, the two TSVs102and152can include nickel, iron, cobalt, niobium, or alloys thereof.

The two TSVs102and152can include a bulk material with desirable magnetic properties (e.g., elevated magnetic permeability provided by nickel, iron, cobalt, niobium, or an alloy thereof), or can include multiple discrete layers, only some of which are magnetic, in accordance with an embodiment of the present technology. For example, following a high-aspect ratio etch and a deposition of insulator, each of the first and second TSVs102and152can be provided in a single metallization step filling in the insulated opening with a magnetic material. In another embodiment, each of the first and second TSVs102and152can be formed in multiple steps to provide coaxial layers (e.g., two or more magnetic layers separated by one or more non-magnetic layers). For example, multiple conformal plating operations can be performed before a bottom-up fill operation to provide a TSV with a coaxial layer of non-magnetic material separating a core of magnetic material and an outer coaxial layer of magnetic material. In this regard, a first conformal plating step can partially fill and narrow the etched opening with a magnetic material (e.g., nickel, iron, cobalt, niobium, or an alloy thereof), a second conformal plating step can further partially fill and further narrow the opening with a non-magnetic material (e.g., polyimide or the like), and a subsequent bottom-up plating step (e.g., following the deposition of a seed material at the bottom of the narrowed opening) can completely fill the narrowed opening with another magnetic material (e.g., nickel, iron, cobalt, niobium, or an alloy thereof). Such a structure with laminated coaxial layers of magnetic and non-magnetic material can help to reduce eddy current losses in a TSV through which a magnetic flux is passing.

In accordance with one embodiment of the present technology, the first and second TSVs102and152can be coupled in any one of a number of ways to improve the magnetic permeability of the path followed by a magnetic field generated by a current through one of the two conductors103and153. For example, in the embodiment illustrated inFIG. 1, the first TSV102is coupled to the second TSV152by a solder connection140. The solder connection140can be separated from the first TSV102by a barrier material141and separated from the second TSV152by another barrier material142. The barrier materials141and142can be configured to prevent solder diffusion into the two TSVs102and152. The solder material140can include a magnetic material to enhance its magnetic permeability. For example, the solder material140can include nickel, iron, cobalt, niobium, or alloys thereof. In other embodiments, TSVs in adjacent dies can be coupled using any one of a number of other interconnect methods (e.g., copper-to-copper bonding, pill and pad, interference fit, mechanical, etc.).

A conductive winding (e.g., the conductors103and153) of an inductor disposed around a TSV magnetic core (e.g., the TSVs102and152) need not be smoothly helical in several embodiments of the present technology. Although the conductors103and153are illustrated schematically and functionally inFIG. 1as having turns that, in cross section, appear to gradually increase in distance from a surface of a respective substrate, it will be readily understood by those skilled in the art that fabricating a smooth helix with an axis perpendicular to a surface of a substrate presents a significant engineering challenge. Accordingly, a “substantially helical” conductor, as used herein, describes a conductor having turns that are separated along the longitudinal dimension L of the TSV (e.g., the z-dimension perpendicular to the substrate surface), but which are not necessarily smoothly varying in the z-dimension (e.g., the substantially helical shape does not possess arcuate, curved surfaces and a constant pitch angle). Rather, an individual turn of the conductor can have a pitch of zero degrees and the adjacent turns can be electrically coupled to each other by steeply-angled or even vertical connectors (e.g., traces or vias) with a larger pitch, such that a “substantially helical” conductor can have a stepped structure. Moreover, the planar shape traced out by the path of individual turns of a substantially helical conductor need not be elliptical or circular. For the convenience of integration with efficient semiconductor processing methodologies (e.g., masking with cost-effective reticles), individual turns of a substantially helical conductor can trace out a polygonal path in a planar view (e.g., a square, a hexagon, an octagon, or some other regular or irregular polygonal shape around the first TSV102). Accordingly, a “substantially helical” conductor, as used herein, describes a non-planar spiral conductor having turns that trace out any shape in a planar view (e.g., parallel to the plane of the substrate surface) surrounding a central axis, including circles, ellipses, regular polygons, irregular polygons, or some combination thereof.

FIG. 2is a simplified perspective view of a substantially helical conductor204(“conductor204”) disposed around a through-substrate via202configured in accordance with an embodiment of the present technology. For more easily illustrating the substantially helical shape of the conductor204illustrated inFIG. 2, the substrate material, insulating materials, and other details of the device in which the conductor204and the TSV202are disposed have been eliminated from the illustration. As can be seen with reference toFIG. 2, the conductor204is disposed coaxially around the TSV202. The conductor204of this particular embodiment has three turns (204a,204b, and204c) about the TSV202. As described above, rather than having a single pitch angle, the conductor204has a stepped structure, whereby turns with a pitch angle of 0 (e.g., turns laying in a plane of the device200) are connected by vertical connecting portions that are staggered circumferentially around the turns. In this regard, planar turns204aand204bare connected by a vertical connecting portion206, and planar turns204band204care connected by a vertical connecting portion208. This stepped structure facilitates fabrication of the conductor204using simple semiconductor processing techniques (e.g., planar metallization steps for the turns and via formation for the vertical connecting portions). Moreover, as shown inFIG. 2, the turns204a,204b, and204cof the conductor204trace a rectangular shape around the TSV202when oriented in a planar view.

In accordance with one embodiment, the TSV202can optionally (e.g., as shown with dotted lines) include a core material202asurrounded by one or more coaxial layers, such as layers202band202c. For example, the core202aand the outer coaxial layer202ccan include magnetic materials, while the middle coaxial layer202bcan include a non-magnetic material, to provide a laminate structure that can reduce eddy current losses. Although the TSV202is illustrated inFIG. 2as optionally including a three-layer structure (e.g., a core202asurrounded by two coaxially laminated layers202band202c), in other embodiments any number of coaxial laminate layers can be used to fabricate a TSV.

Although in the foregoing embodiments shown inFIG. 1andFIG. 2substantially helical conductors have been illustrated as having three turns about a TSV, the number of turns of a substantially helical conductor around a TSV can vary in accordance with different embodiments of the technology. As is shown in the example embodiment ofFIG. 2, a substantially helical conductor need not make an integer number of turns about a TSV (e.g., the top and/or bottom turn may not be a complete turn). Providing more turns can increase the inductance of an inductor compared to having fewer turns, but at an increase in the cost and complexity of fabrication (e.g., more fabrication steps). The number of turns can be as low as one, or as high as is desired. When coupled inductors are provided with the same number of windings, they can couple two electrically isolated circuits without stepping up or down the voltage from the primary winding.

For example,FIG. 3is a simplified cross-sectional view of a multi-die semiconductor device300including coupled inductors with TSV cores configured in accordance with an embodiment of the present technology. The device300includes a first die301and a second die351. The first die has a first substrate301aand a first insulating material301b. The device300further includes a first TSV302that extends at least substantially through the first die301(e.g., extending from approximately the bottom of the first substrate301ato beyond an upper surface of the first substrate301a—completely through the first substrate301a—and into the first insulating material301b). The device300also includes a first substantially helical conductor303(“conductor303”) disposed around the first TSV302. In the present embodiment, the first conductor303is shown to include four complete turns (303a,303b,303cand303d) around the first TSV302. The first conductor303can be operably connected to other circuit elements (not shown) by leads320aand320b.

The second die351has a second substrate351a, a second insulating material351b, and a second TSV352in the second die351extending out of the second substrate351aand into the second insulating material351b. The device300further includes a second substantially helical conductor353(“conductor353”) disposed around the second TSV352. In the present embodiment, the second conductor353is shown to include three complete turns (353a,353b, and353c) around the second TSV352. The second conductor353can be operably connected to other circuit elements (not shown) by leads370aand370b.

As set forth above, coaxial columns of TSVs can be coupled in any one of a number of ways to improve the magnetic permeability thereof. For example, in the present embodiment ofFIG. 3, the first and second TSVs302and352are mechanically coupled by a direct connection. Unlike TSVs configured to carry electrical signals, the electrical resistance of the connection between these two TSVs302and352is not a primary concern in configuring a path with high magnetic permeability. Accordingly, many of the steps utilized to improve the electrical connection between coupled TSVs (e.g., under bump metallization, solder ball formation, solder reflow, etc.) can be omitted from a manufacturing method of the device300, in accordance with one embodiment of the present technology.

According to one embodiment, the first conductor303is configured to induce a magnetic field in the first and second TSVs302and352in response to a current passing through the first conductor303(e.g., provided by a voltage applied across leads320aand320b). By changing the current passing through the first conductor303(e.g., by applying an alternating current, or by repeatedly switching between high and low voltage states), a changing magnetic field can be induced in the two TSVs302and352, which in turn induces a changing current in the second conductor353. In this fashion, signals and/or power can be coupled between a circuit comprising the first conductor303and another comprising the second conductor353(e.g., operating the device300as a power transformer).

The first conductor303and the second conductor353shown inFIG. 3have different numbers of turns. As will be readily understood by one skilled in the art, this arrangement allows the device300to be operated as a step-up or step-down transformer (depending upon which substantially helical conductor is utilized as the primary winding and which the secondary winding). For example, the application of a first changing current (e.g., 4V of alternating current) to the first conductor303will induce a changing current with a lower voltage (e.g., 3V of alternating current) in the second conductor353, given the 4:3 ratio of turns between the primary and secondary windings in this configuration. When operated as a step-up transformer (e.g., by utilizing the second conductor353as the primary winding, and the first conductor303as the secondary winding), the application of a first changing current (e.g., 3V of alternating current) to the second conductor353will induce a changing current with a higher voltage (e.g., 4V of alternating current) in the first conductor303, given the 3:4 ratio of turns between the primary and secondary windings in this configuration.

Although the foregoing embodiments ofFIGS. 1 and 3have illustrated semiconductor devices with two dies, in other embodiments of the present technology, semiconductor devices can include larger stacks of any number of dies with coupled inductors. For example,FIG. 4is a simplified cross-sectional view of a multi-die semiconductor device including coupled inductors with TSV cores configured in accordance with an embodiment of the present technology. The device400includes a first die410, a second die420and a third die430. The first die has a first substrate411aand a first insulating material411b. The device400further includes a first TSV412that extends at least substantially through the first die410(e.g., extending from approximately the bottom of the first substrate411ato beyond an upper surface of the first substrate411a—completely through the first substrate411a—and into the first insulating material411b). The device400also includes a first substantially helical conductor413(“conductor413”) disposed around the first TSV412. In the present embodiment, the first conductor413is shown to include three complete turns around the first TSV412. The first conductor413can be operably connected to other circuit elements (not shown) by leads414aand414b.

The second die420includes a second substrate421a, a second insulating material421b, and a second TSV422that extends at least substantially through the second die420(e.g., extending from approximately the bottom of the substrate421ato beyond an upper surface of the substrate421a—completely through the second substrate421a—and into the second insulating material421b). The device400also includes a second substantially helical conductor423(“conductor423”) disposed around the second TSV422. In the present embodiment, the second conductor423is shown to include three complete turns around the second TSV422. The second conductor423can be operably connected by leads424aand424bto other circuit elements (not shown), including one or more rectifiers to revert a coupled alternating current to DC and one or more capacitors or other filter elements to provide steady current.

The third die430includes a third substrate431a, a third insulating material431b, and a third TSV432in the third die430extending out of the third substrate431aand into the third insulating material431b. The device400also includes a third substantially helical conductor433(“conductor433”) disposed around the third TSV432. In the present embodiment, the third conductor433is shown to include three complete turns around the third TSV432. The third conductor433can be operably connected to other circuit elements (not shown), by leads434aand434bwhich connect the third conductor433to pads436aand436b.

According to one embodiment, the third conductor433is configured to induce a magnetic field in the three TSVs412,422and432in response to a current passing through the third conductor433(e.g., provided by a voltage applied across the pads436aand436b). By changing the current passing through the third conductor433(e.g., by applying an alternating current, or by repeatedly switching between high and low voltage states), a changing magnetic field can be induced in the three TSVs412,422and432, which in turn induces a changing current in the first and second conductors413and423(e.g., through which the first and second TSVs pass). In this fashion, signals and/or power can be coupled between a circuit comprising the third conductor433and others comprising the first and second conductors413and423.

As previously set forth, coaxial columns of TSVs can be coupled in any one of a number of ways to improve the magnetic permeability thereof. For example, in the present embodiment ofFIG. 4, the first and second TSVs412and422are magnetically coupled across a small gap415(e.g., filled by insulating material and/or substrate material). The second and third TSVs422and432are similarly magnetically coupled across another small gap425. Unlike TSVs configured to carry electrical signals, an insulating gap between coaxial TSVs is not a significant impediment in providing a path with high magnetic permeability. Accordingly, a coaxial column of coupled TSVs can be solely magnetically coupled, rather than mechanically or electrically coupled, in accordance with one embodiment of the present technology.

Although the foregoing embodiments ofFIGS. 1 through 4have illustrated inductors with a single substantially helical conductor disposed around each TSV, other embodiments of the present technology can be configured with more than one such conductor around a TSV, as set forth in greater detail below. For example,FIG. 5is a simplified cross-sectional view of a multi-die semiconductor device500including coupled inductors with TSV cores configured in accordance with an embodiment of the present technology. The device500includes a first die510and a second die520. The first die includes a first substrate511aand a first insulating material511b. The device500further includes a first TSV512that extends at least substantially through the first die510(e.g., extending from approximately the bottom of the first substrate511ato beyond an upper surface of the first substrate511a—completely through the first substrate511a—and into the first insulating material511b). The device500also includes a first substantially helical conductor513(“conductor513”) disposed around the first TSV512. In the present embodiment, the first conductor513is shown to include three complete turns around the first TSV512. The first conductor513can be operably connected to other circuit elements (not shown) by leads514aand514b.

The second die520includes second substrate521a, a second insulating material521b, and a second TSV522that extends out of the second substrate521aand into the second insulating material521b. The second TSV522is magnetically coupled to the first TSV512in the first die510across a small gap515. The device500also includes a second substantially helical conductor523a(“conductor523a”) disposed around a portion of the second TSV522, and a third substantially helical conductor523b(“conductor523b”) disposed around another portion of the second TSV522. In the present embodiment, the second and third conductors523aand523bare shown to each include three complete turns around the second TSV522. The second conductor523acan be operably connected to other circuit elements (not shown) by leads524aand524b, and the third conductor523bcan be operably connected to still other circuit elements (not shown) by leads524cand524d.

According to one embodiment, the first conductor513is configured to induce a magnetic field in the two TSVs512and522in response to a current passing through the first conductor513(e.g., provided by a voltage applied across the leads514aand514b). By changing the current passing through the first conductor513(e.g., by applying an alternating current, or by repeatedly switching between high and low voltage states), a changing magnetic field can be induced in the two TSVs512and522, which in turn induces a changing current in the second and third conductors523aand523b. In this fashion, signals and/or power can be coupled between a circuit comprising the first conductor513and others comprising the second and third conductors523aand523b.

AlthoughFIG. 5illustrates an embodiment having a die with two substantially helical conductors or windings disposed around a TSV at two different heights (e.g., coaxially but not concentrically), in other embodiments, multiple substantially helical conductors with different diameters can be provided at the same height (e.g., with radially-spaced conductive turns in the same layers). As the inductance of a substantially helical conductor depends, at least in part, on its diameter and radial spacing from the TSV around which it is disposed, such an approach can be used where a reduction in the number of layer processing steps is more desirable than an increase in the inductance of the substantially helical conductor so radially spaced.

The foregoing example embodiments illustrated inFIGS. 1 through 5include inductors having an open core (e.g., a core wherein the magnetic field passes through a higher magnetic permeability material for only part of the path of the magnetic field), but embodiments of the present technology can also be provided with a closed core. For example,FIG. 6is a simplified cross-sectional view of a multi-die semiconductor device600including coupled inductors with TSV cores configured in accordance with an embodiment of the present technology. Referring toFIG. 6, the device600includes a first die610and a second die620. The first die610includes a first substrate611aand a first insulating material611b. The device600further includes first and second TSVs612aand612bthat extend at least substantially through the first die610(e.g., extending from approximately the bottom of the first substrate611ato beyond an upper surface of the first substrate611a—completely through the first substrate611a—and into the first insulating material611b). The device600further includes a first substantially helical conductor613(“conductor613”) disposed around the first TSV612a. In the present embodiment, the first conductor613is shown to include three complete turns around the first TSV612a. The first and second TSVs612aand612bare coupled above the first conductor613by an upper coupling member617in the first die610. The first conductor613can be operably connected to other circuit elements (not shown) by leads614aand614b.

The second die620includes a second substrate621a, a second insulating material621b, and third and fourth TSVs622aand622bthat extend out of the second substrate621aand into the second insulating material621b. The third TSV622ais coupled to the first TSV612ain the first die610by a first solder connection615a, and the fourth TSV622bis coupled to the second TSV612bin the first die610by a second solder connection615b. The device further includes a second substantially helical conductor623(“conductor623”) disposed around the third TSV622a. In the present embodiment, the second conductor623is shown to include three complete turns around the third TSV622a. The third and fourth TSVs622aand622bare coupled below the second conductor623by a lower coupling member627in the second die620. The second conductor623can be operably connected to other circuit elements (not shown) by leads624aand624b.

The upper coupling member617and the lower coupling member627can include a magnetic material, having a magnetic permeability higher than that of the first and second substrates611aand621aand/or the first and second insulating materials611band621b. The magnetic material of the upper and lower coupling members617and627can be either the same material as that of the four TSVs612a,612b,622aand622b, or a different material. The magnetic material of the upper and lower coupling members617and627can be a bulk material (e.g., nickel, iron, cobalt, niobium, or an alloy thereof), or a laminated material with differing layers (e.g., of magnetic material and non-magnetic material). Laminated layers of magnetic and non-magnetic material can help to reduce eddy current losses in the upper and lower coupling members617and627. In accordance with one aspect of the present technology, the four TSVs612a,612b,622aand622b, together with the upper coupling member617and the lower coupling member627, can provide a closed path for the magnetic field induced by the second conductor623, such that the inductance of the device600is greater than it would be if only the four TSVs612a,612b,622aand622bwere provided.

According to one embodiment, the second conductor623is configured to induce a magnetic field in the four TSVs612a,612b,622aand622b(and in the upper and lower coupling members617and627) in response to a current passing through the second conductor623(e.g., provided by a voltage applied across the leads624aand624b). By changing the current passing through the second conductor623(e.g., by applying an alternating current, or by repeatedly switching between high and low voltage states), a changing magnetic field can be induced in the four TSVs612a,612b,622aand622b(and in the upper and lower coupling members617and627), which in turn induces a changing current in the first conductor613. In this fashion, signals and/or power can be coupled between a circuit comprising the second conductor623and another comprising the first conductor613.

Although in the example embodiment illustrated inFIG. 6coupled inductors are illustrated sharing a closed core (e.g., a core in which a substantially continuous path of high magnetic permeability material passes through the middle of a conductive winding), in other embodiments, one or both of the upper and lower coupling members617and627could be omitted. In such an embodiment, a secondary coaxial column of TSVs (e.g., in addition to the coaxial column of TSVs around which the windings are disposed) with elevated magnetic permeability could be situated near the coaxial column of TSVs around which the windings are disposed to provide an open core embodiment with improved inductance over an embodiment in which the secondary coaxial column of TSVs was not present.

According to one embodiment, a closed magnetic core as illustrated by way of example inFIG. 6can provide additional space in which one or more windings can be disposed (e.g., to provide a transformer or power couple). For example, althoughFIG. 6illustrates a device in which two windings are disposed on the same coaxial column of TSVs, with a proximate column of TSVs having no windings, in another embodiment, two proximate columns of coaxial TSVs could be provided with a single winding on each column (e.g., a primary winding on the first column in a first die, and a secondary winding on the second column in a second die). Alternatively, additional windings can be provided in the space provided by a closed magnetic core or a proximate TSV in an open-core embodiment, to provide more than two coupled inductors that all interact with the same magnetic field. For example,FIG. 7is a simplified cross-sectional view of coupled inductors with through-substrate via cores configured in accordance with an embodiment of the present technology. As can be seen with reference toFIG. 7, a device700includes a first die710and a second die720. The first die710includes a first substrate711aand a first insulating material711b. The device700further includes first and second TSVs712aand712bthat extend at least substantially through the first die710(e.g., extending from approximately the bottom of the first substrate711ato beyond an upper surface of the first substrate711a—completely through the first substrate711a—and into the first insulating material711b). The device700further includes a first substantially helical conductor713a(“conductor713a”) disposed around the first TSV712a. In the present embodiment, the first conductor713ais shown to include three complete turns around the first TSV712a. The device700further includes a second substantially helical conductor713b(“conductor713b”) disposed around the second TSV712b. In the present embodiment, the second conductor713bis shown to include three complete turns around the second TSV712b. The first and second TSVs712aand712bare coupled above the first and second conductors713aand713bby an upper coupling member717in the first die710. The first conductor713acan be operably connected to other circuit elements (not shown) by leads714aand714b, and the second conductor713bcan be operably connected to other circuit elements (not shown) by leads714cand714d.

The second die720includes a second substrate721a, a second insulating material721b, and third and fourth TSVs722aand722bthat extend out of the second substrate721aand into the second insulating material721b. The third TSV722ais coupled to the first TSV712ain the first die710by a first solder connection715a, and the fourth TSV722bis coupled to the second TSV712bin the first die710by a second solder connection715b. In other embodiments, TSVs in adjacent dies can be coupled using any one of a number of other interconnect methods (e.g., copper-to-copper bonding, pill and pad, interference fit, mechanical, etc.). The device further includes a third substantially helical conductor723(“conductor723”) disposed around the third TSV722a. In the present embodiment, the third conductor723is shown to include three complete turns around the third TSV722a. The third and fourth TSVs722aand722bare coupled below the third conductor723by a lower coupling member727in the second die720. The third conductor723can be operably connected to other circuit elements (not shown) by leads724aand724b.

The upper coupling member717and the lower coupling member727can include a magnetic material having a magnetic permeability higher than that of the first and second substrates711aand721aand/or the first and second insulating materials711band721b. The magnetic material of the upper and lower coupling members717and727can be either the same material as that of the four TSVs712a,712b,722aand722b, or a different material. The magnetic material of the upper and lower coupling members717and727can be a bulk material (e.g., nickel, iron, cobalt, niobium, or an alloy thereof), or a laminated material with differing layers (e.g., of magnetic material and non-magnetic material). Laminated layers of magnetic and non-magnetic material can help to reduce eddy current losses in the upper and lower coupling members717and727. In accordance with one aspect of the present technology, the four TSVs712a,712b,722aand722b, together with the upper coupling member717and the lower coupling member727, can provide a closed path for the magnetic field induced by the third conductor723, such that the inductance of the device700is greater than it would be if only the four TSVs712a,712b,722aand722bwere provided.

According to one embodiment, the third conductor723is configured to induce a magnetic field in the four TSVs712a,712b,722aand722b(and in the upper and lower coupling members717and727) in response to a current passing through the third conductor723(e.g., provided by a voltage applied across the leads724aand724b). By changing the current passing through the third conductor723(e.g., by applying an alternating current, or by repeatedly switching between high and low voltage states), a changing magnetic field can be induced in the four TSVs712a,712b,722aand722b(and in the upper and lower coupling members717and727), which in turn induces a changing current in the first and second conductors713aand713b. In this fashion, signals and/or power can be coupled between a circuit comprising the third conductor723and others comprising the first and second conductors713aand713b.

Although in the embodiment illustrated inFIG. 7two coupled inductors on proximate are shown with the same number of turns, in other embodiments of the present technology different numbers of windings can be provided on similarly-configured inductors. As will be readily understood by one skilled in the art, by providing coupled inductors with different numbers of windings, a device so configured can be operated as a step-up or step-down transformer (depending upon which conductor is utilized as the primary winding and which the secondary winding).

Although in the embodiments illustrated inFIGS. 6 and 7a single additional coaxial column of coupled TSVs is provided to enhance the magnetic permeability of the return path for the magnetic field generated by a primary winding around a first coaxial column of TSVs, in other embodiments of the present technology multiple return path coaxial columns of TSVs can be provided to further improve the inductance of the inductors so configured. For example, embodiments of the present technology may use two, three, four, or any number of additional coaxial columns of coupled TSVs to provide a return path for the magnetic field with enhanced magnetic permeability. Such additional coaxial columns of coupled TSVs may be coupled by upper and/or lower coupling members to the coaxial column of coupled TSVs around which one or more substantially helical conductors are disposed (e.g., a closed core configuration), or may merely be sufficiently proximate to concentrate some of the magnetic flux of the return path of the magnetic field to enhance the performance of the device so configured.

Although in the foregoing examples set forth inFIGS. 1 to 7each substantially helical conductor has been illustrated as having a single turn about a TSV at a given distance from the surface of a corresponding substrate, in other embodiments a substantially helical conductor can have more than one turn about a TSV at the same distance from the substrate surface (e.g., multiple turns arrange coaxially at each level). For example,FIG. 8is a simplified perspective view of a structure800comprising a substantially helical conductor804(“conductor804”) disposed around a through-substrate via802configured in accordance with an embodiment of the present technology. As can be seen with reference toFIG. 8, the conductor804includes a first substantially helical conductor804a(“conductor804a”) disposed around the TSV802, which is connected to a second coaxially-aligned substantially helical conductor804b(“conductor804b”), such that a single conductive path winds downward around TSV802at a first average radial distance, and winds back upward around TSV802at a second average radial distance. Accordingly, the conductor804includes two turns about the TSV802(e.g., the topmost turn of conductor804aand the topmost turn of conductor804b) at the same position along the longitudinal dimension “L” of the TSV802. In another embodiment, a substantially helical conductor could make two turns about a TSV at a first level (e.g., spiraling outward), two turns about a TSV at a second level (e.g., spiraling inward), and so on in a similar fashion for as many turns as were desired.

FIGS. 9A-9Fare simplified views of a device900having an inductor with a through-substrate via core in various states of a manufacturing process in accordance with an embodiment of the present technology. InFIG. 9A, a substrate901is provided in anticipation of further processing steps. The substrate901may be any one of a number of substrate materials, including silicon, glass, gallium arsenide, gallium nitride, organic laminates, molding compounds (e.g., for reconstituted wafers for fan-out wafer-level processing) and the like. InFIG. 9B, a first turn903of a substantially helical conductor has been disposed in a layer of the insulating material902over the substrate901. The insulating material902can be any one of a number of insulating materials which are suitable for semiconductor processing, including silicon oxide, silicon nitride, polyimide, or the like. The first turn903can be any one of a number of conducting materials which are suitable for semiconductor processing, including copper, gold, tungsten, alloys thereof, or the like.

InFIG. 9C, a second turn904of the substantially helical conductor has been disposed in the now thicker layer of the insulating material902, and spaced from the first turn903by a layer of the insulating material902. The second turn904is electrically connected to the first turn903by a first via905. A second via906has also been provided to route an end of the first turn903to an eventual higher layer of the device900. InFIG. 9D, a third turn907of the substantially helical conductor has been disposed in the now thicker layer of the insulating material902, and spaced from the second turn904by a layer of the insulating material902. The third turn907is electrically connected to the second turn904by a third via908. The second via906has been further extended to continue routing an end of the first turn903to an eventual higher layer of the device900.

Turning toFIG. 9E, the device900is illustrated in a simplified perspective view after an opening909has been etched through the insulating material902and into the substrate901. The opening909is etched substantially coaxially with the turns903,904and907of the substantially helical conductor using any one of a number of etching operations capable of providing a substantially vertical opening with a high aspect ratio. For example, deep reactive ion etching, laser drilling, or the like can be used to form the opening909. InFIG. 9F, a TSV910has been disposed in the opening909. The TSV910can include a magnetic material (e.g., a material with a higher magnetic permeability than the substrate901and/or the insulating material902) to increase the magnetic field in the TSV910when current is flowing through the substantially helical conductor. The magnetic material can be ferromagnetic, ferrimagnetic, or a combination thereof. The TSV910can include more than one material, either in a bulk material of a single composition, or in discrete regions of different materials (e.g., coaxial laminate layers). For example, the TSV910can include nickel, iron, cobalt, niobium, or alloys thereof. Laminated layers of magnetic and non-magnetic material can help to reduce eddy current losses in the TSV910. The TSV910can be provided in a single metallization step filling in the opening909, or in multiple steps of laminating layers (e.g., multiple magnetic layers separated by non-magnetic layers). In one embodiment, to provide a TSV with a multiple layer structure, a mixture of conformal and bottom-up fill plating operations can be utilized (e.g., a conformal plating step to partially fill and narrow the etched opening with a first material, and a subsequent bottom-up plating step to completely fill the narrowed opening with a second material).

Turning toFIG. 9G, the device900is illustrated after the substrate901has been thinned to expose or reduce the distance between a bottom surface of the substrate901and a bottom end of the TSV910, to provide a thinned die911. InFIG. 9H, the device900is illustrated after the thinned die911has been disposed over a second die912in which another TSV is surrounded by a substantially helical conductor. The TSV910and the coaxially aligned TSV of the second die912can be coupled in a variety of ways, including by solder connection, copper-to-copper bonding, pill and pad, interference fit, mechanical connection, or magnetic coupling across a small gap (e.g., of insulating material and/or substrate material).

FIG. 10is a flow chart illustrating a method of manufacturing an inductor with a through-substrate via core in accordance with an embodiment of the present technology. The method begins in step1010, in which a substrate is provided. In step1020, a substantially helical conductor is disposed in an insulating material over the substrate. In step1030, an opening is etched through the insulating material and into the substrate along an axis of the substantially helical conductor. In step1040, a TSV is disposed into the opening. In step1050, the substrate is thinned to expose or reduce the distance between a bottom surface of the substrate and a bottom end of the TSV. In step1060, the die comprising the first substrate is disposed over a second die with a coaxially aligned TSV around which is disposed another substantially helical conductor. In step1070, the first TSV and the second TSV are coupled (e.g., by a solder connection, or a mechanical connection, or by a magnetic coupling across a gap).