Method of raising the breakdown voltage of an integrated capacitor and capacitor manufactured by this method

The invention relates to a method suitable for raising the breakdown voltage of a capacitor of the integrated circuit type formed on a semiconductor substrate and characterized in that the lower plate of the capacitor is under etched so that an air wedge is obtained. As a result of the air wedge, the electric current passed through the semiconductor material is lengthened and the breakdown phenomena at the edges of the capacitor are reduced. The invention also relates to capacitors obtained in this manner.

The invention relates to a method of forming an integrated capacitor with 
increased breakdown voltage on a semiconductor substrate comprising a 
first metal layer deposited on at least a part of the semiconductor 
substrate, a second dielectric layer deposited on the said first metal 
layer or formed from this layer and a third metal layer covering the said 
second dielectric layer and extending on at least another part of the 
semiconductor substrate. It also relates to integrated capacitors 
manufactured by this method and to integrated circuits comprising at least 
one such capacitor. 
The integrated capacitors are well known from the prior art and are 
constructed in particular in the form of a stack of thin layers of the 
conducting-dielectric-conducting type. 
With a view to the manufacture of capacitors of high capacitance it is 
necessary to deposit a very thin dielectric layer (thickness less than 
1000 .ANG.) between two metal layers constituting the plates of the 
capacitor and then a large number of problems arise, in particular the 
difficulty of controlling the thickness of the dielectric layer and the 
drop of the breakdown voltage, which phenomenon particularly occurs in the 
vicinity of the edges. 
The invention has for its object to mitigate the aforementioned 
disadvantages by providing a novel method of manufacturing these 
capacitors. 
The method in accordance with the invention is characterized in that a 
first metal layer is deposited on at least a part of a semiconductor 
substrate, in that a part of the semiconductor substrate is removed along 
the periphery of and under the first metal layer, in that then the second 
dielectric layer is deposited or formed so that it wholly covers the free 
surface of the first metal layer, and in that finally the third metal 
layer is deposited so that it covers the second dielectric layer and 
extends on at least another part of the semiconductor substrate, while an 
empty space is left along the periphery of and under the first metal 
layer. 
In this manner, the two metal layers are removed in the vicinity of the 
edge over a distance which is sufficient to strongly reduce the breakdown 
phenomena. 
The semiconductor material may be silicon, a III-V compound and in one 
specific embodiment this material is gallium arsenide, which compound is 
frequently utilized in the manufacture of superfrequency components due to 
its very favourable intrinsic properties. 
According to an embodiment of the invention, the first metal layer consists 
of aluminium, while the second dielectric layer consists of alumina 
obtained by superficial anodization of this first metal layer.

According to the prior art, an integrated capacitor of the kind, shown in 
FIG. 1, comprises on a semiconductor substrate 1 a first metal layer 2 of, 
for example, tantalum, or aluminium, a second dielectric layer 3 of, for 
example, silica SiO.sub.2 obtained by chemical vapour deposition (CVD) or 
of silicon nitride Si.sub.3 N.sub.4 obtained by plasma-deposition at a low 
temperature, and finally a third metal layer 4 which extends on this 
preceding layer and adjoins the semiconductor substrate 1 so that a zone 
is obtained which is sufficient for contacting. 
When the dielectric layer 3 is very thin and has, for example, a thickness 
less than 1000 .ANG., breakdown phenomena for voltages of the order of a 
few volts frequently occur at the periphery of the first metal layer 
across the semiconductor substrate, which phenomena are due to the small 
distance between the two metal plates. 
A solution for this problem consists in that the second dielectric layer 3 
extends in a manner such that it also adjoins the semiconductor substrate 
1. However, this solution is not always attainable, in particular when the 
second dielectric layer 3 is not a deposited layer, but a layer formed 
from the first layer, for example, by superficial oxidation. 
The method of manufacturing integrated capacitors according to the present 
invention consists in carrying out the following successive stages shown 
in FIGS. 2 to 5 inclusive: 
In a first stage as shown in FIG. 2, a first metal layer 11 of, for 
example, aluminium (or tantalum), is deposited on a semiconductor 
substrate 10 by means of a conventional method, such as evaporation in 
vacuo through a mask, or by serigraphic application of an aluminium paste 
or any other suitable method. 
In a second stage as shown in FIG. 3, in which the same elements are 
designated by the same reference symbols, a part of the semiconductor 
substrate 10 is removed, for example, by means of a chemical etching bath, 
which etching treatment is continued under the first metal layer so that 
an under-etching is obtained over a distance of the order of microns. In 
the case of a semiconductor material such as GaAs, a chemical etching bath 
of, for example, citric acid which is diluted (and to which hydrogen 
peroxide is added) is particularly suitable; an under-etching of 1 .mu.m 
is obtained in ten minutes and this etching treatment is stopped by 
soaking the substrate several times in deionized water. 
In a third stage as shown in FIG. 4, a second dielectric layer 12 is 
deposited on or formed from the first metal layer 11 so that it wholly 
covers the free surface of the first metal layer 11. 
Preferably, this complete covering is obtained by superficial anodization 
of the first metal layer 11. Thus, in the case of a first layer of 
aluminium, this layer is superficially converted into alumina by 
anodization upon humidification by means of a known method which consists 
in that the layer to be covered is immersed in an electrolyte 
(water+tartaric acid, for example) and in that a current is caused to flow 
between a platinum electrode acting as a cathode and the aluminium layer 
acting as an anode. In a few minutes, depending upon the density of the 
current, a layer of alumina of a few hundred .ANG. can be obtained, while 
by the application of a potential difference for a few tens of minutes the 
density of this layer can be increased so that it is rendered more 
suitable for the intended use. 
In a fourth and last stage as shown in FIG. 5, a third metal layer 13 is 
deposited so that it covers the second dielectric layer 12 and extends on 
another part of the semiconductor substrate in a manner such that a 
contact zone is obtained or that a connection between other elements 
formed on the semiconductor substrate or connected to it is established. 
This third metal layer 13 may be made of any arbitrary electrically 
conducting material, such as titanium, gold etc. 
The deposition of this layer may be effected by any method, such as 
evaporation in vacuo, serigraphy, reactive pulverization etc., which 
method must be suitable to ensure the formation of a permanent non-covered 
air wedge 14; such an air wedge 14 permits obtaining a suitable distance 
between the two metal layers 12 and 13 constituting the plates of the 
capacitor so that the electric current path through the semiconductor 
substrate is sufficiently long to ensure that the breakdown voltage 
increases to suitable values of more than 10 V, taking into account the 
obtained capacitances of the order of 2000 pF/mm.sup.2. 
Moreover, the superfrequency measurements carried out on the capacitor thus 
manufactured have shown the occurrence of a very small variation of the 
capacitance with frequency up to values as high as 12 GHz, while the 
losses were far below 0.1 dB. 
It will be clear to those skilled in the art that a large number of 
variations are imaginable which are obvious and so do not depart from the 
scope of the invention defined by the appended claims.