System of semiconductor process and control method thereof

A semiconductor processing system includes: a semiconductor processing chamber including an electrostatic chuck disposed in a chamber housing, and a first power supplier for supplying first radio frequency (RF) power to an internal electrode disposed in the electrostatic chuck; a voltage measuring device for measuring a voltage corresponding to the first RF power to output a digital signal; and a control device for outputting an interlock control signal to the semiconductor processing chamber, when it is determined that the voltage increases to be within a predetermined reference range based on the digital signal. The electrostatic chuck is configured to enable a wafer to be seated on a surface of the electrostatic chuck.

CROSS-REFERENCE TO RELATED APPLICATION(S)

This U.S. non-provisional patent application claims benefit of priority under 35 U.S.C. 119(a) to Korean Patent Application No. 10-2021-0087089 filed on Jul. 2, 2021 in the Korean Intellectual Property Office, the disclosure of which is incorporated by reference herein in its entirety.

1. TECHNICAL FIELD

The present inventive concept relates to a semiconductor processing system and a method thereof.

2. DISCUSSION OF RELATED ART

A semiconductor processing system is used to manufacture a semiconductor device. The semiconductor processing system may include a semiconductor processing chamber to performing a semiconductor process to form the semiconductor device, and a control device for controlling the semiconductor processing chamber. The semiconductor processing chamber may include an electrostatic chuck. A semiconductor wafer is placed on the electrostatic chuck to become a target of the semiconductor process. The semiconductor wafer may not be formed properly if the electrostatic chuck becomes damaged during the semiconductor process.

An operation of the semiconductor processing chamber can be stopped periodically so it can be determined whether or not the electrostatic chuck has become deteriorated. The electrostatic chuck is replaced if it is determined that the electrostatic chuck has become deteriorated and then the operation can be restarted. A jig in a separate stage may be used to determine whether the electrostatic chuck has become deteriorated. However, manufacture of semiconductor devices takes longer due to this constant stopping and starting of the operation. Further, use of the separate stage increases the cost of manufacturing semiconductor devices.

SUMMARY

At least one embodiment of the present inventive concept provides a semiconductor processing system for minimizing stoppages in an operation of a semiconductor processing chamber and monitoring a state of an electrostatic chuck to increase a yield of a semiconductor process, by monitoring deterioration of an electrostatic chuck in real time and determining whether or not the electrostatic chuck is to be replaced, while the semiconductor processing chamber is operating, and a method thereof.

According to an embodiment of the present inventive concept, a semiconductor processing system, includes: a semiconductor processing chamber including an electrostatic chuck disposed in a chamber housing, and a first power supplier for supplying first radio frequency (RF) power to an internal electrode disposed in the electrostatic chuck; a voltage measuring device for measuring a voltage corresponding to the first RF power to output a digital signal; and a control device for outputting an interlock control signal to the semiconductor processing chamber, when it is determined that the voltage increases to be within a predetermined reference range based on the digital signal. The electrostatic chuck is configured to enable a wafer to be seated on a surface of the electrostatic chuck.

According to an embodiment of the present inventive concept, a semiconductor processing system, includes: a plurality of semiconductor processing chambers each including a chamber housing, and a radio frequency (RF) power supplier for supplying RF power to an electrode inside the chamber housing; a plurality of voltage measuring devices for measuring a voltage corresponding to the RF power from the plurality of semiconductor processing chambers to output a digital signal; a plurality of control devices for outputting an interlock control signal to at least one of the plurality of semiconductor processing chambers based on the digital signal; and a data server for adjusting at least one of a plurality of operating parameters applied to convert the voltage into the digital signal in each of the plurality of voltage measuring devices based on raw data received from the plurality of voltage measuring devices.

According to an embodiment of the present inventive concept, a method of controlling a semiconductor processing system is provided. The method includes: performing a semiconductor process by operating a semiconductor processing chamber after replacing an electrostatic chuck; detecting a voltage corresponding to radio frequency (RF) power supplied to the semiconductor processing chamber, while the semiconductor process is performed; converting the voltage into a digital signal; and stopping an operation of the semiconductor processing chamber when it is determined that the voltage increases to be within a predetermined reference range based on the digital signal.

DETAILED DESCRIPTION

Hereinafter, example embodiments of the present inventive concept will be described in detail with reference to the accompanying drawings.

FIG.1is a schematic diagram illustrating a semiconductor processing chamber included in a semiconductor processing system according to an example embodiment of the present inventive concept.

Referring toFIG.1, a semiconductor processing chamber100according to an example embodiment of the present inventive concept may be a device for performing a semiconductor process using plasma. The semiconductor processing chamber100may include a chamber110, a chuck voltage supplier120, a first radio frequency (RF) power supplier130, a second RF power supplier140, and a gas inlet unit150. The semiconductor processing chamber100may include additional components not shown inFIG.1. For example, the chuck voltage supplier120, the RF power supplier130or the second RF power supplier140may be implemented by a voltage generator or a power supply.

The chamber110may include a chamber housing111, an electrostatic chuck (ESC)112, an internal electrode113formed inside the electrostatic chuck112, an upper electrode114, and a gas inlet115. The internal electrode113and the upper electrode114may be implemented with a conductor. A wafer W, a target of a semiconductor process, may be seated on the electrostatic chuck112. In an embodiment, a ceramic coating layer is formed in a region of the electrostatic chuck112in direct contact with the wafer W. The ceramic coating layer may be formed of aluminum oxide (Al2O3), aluminum nitride (AlN), silicon carbide (SiC), or the like, and may have a thickness of about 1 mm. However, a material and a thickness of the ceramic coating layer may be variously modified according to example embodiments.

In an example embodiment, the wafer W may be fixed to the electrostatic chuck112while seated on the electrostatic chuck112by a voltage supplied by the chuck voltage supplier120. For example, the chuck voltage supplier120may supply a constant voltage to the electrostatic chuck112, and the constant voltage may have a magnitude of several hundreds to several thousands of volts. The chuck voltage supplier120may be connected to an electrode (e.g., a conductor) inside the electrostatic chuck112to supply the constant voltage, and the electrode inside the electrostatic chuck112may be located to face substantially an entire surface of the wafer W.

Reactive gas may be introduced through the gas inlet150to begin the semiconductor process. The first RF power supplier130may supply first RF power to the internal electrode113formed in the electrostatic chuck112, and the second RF power supplier140may supply second RF power to the electrostatic chuck112and the upper electrode114located above the wafer W.

Each of the first RF power supplier130and the second RF power supplier140may include a high frequency power source for supplying bias power. Plasma150including radicals151and ions152of the reactive gas may be generated by the first RF power and the second RF power, and the reactive gas may be activated by the plasma150to increase the reactivity. For example, when the semiconductor process device100is an etching device, radicals151and ions152of the reactive gas may be concentrated on the wafer W by the first RF power supplied from the first RF power supplier130to the internal electrode113. At least a portion of a semiconductor substrate or layers included in the wafer W may be dry-etched by radicals151and ions152of the reactive gas.

A self-bias voltage may be generated above the wafer W by the first RF power and the second RF power supplied to the internal electrode113and the upper electrode114, respectively. In an example embodiment, the first RF power supplied to the internal electrode113may be several thousand to several tens of thousands of watts, and as a result, a self-bias voltage of minus several thousand volts may be formed above the wafer W.

As described above, the electrostatic chuck112may include a ceramic coating layer in direct contact with the wafer W. In an embodiment, the ceramic coating layer is formed of a ceramic dielectric. When the semiconductor process for the wafer W is finished, the wafer W may be carried out externally by a load lock chamber connected to the chamber110, and a new wafer W for performing a semiconductor process may be transferred to the chamber110. The electrostatic chuck112may be exposed to the inside of the chamber110while the wafer W is replaced. Accordingly, the electrostatic chuck112may be damaged by radicals151and ions152included in the plasma150formed above the electrostatic chuck112. For example, the ceramic coating layer of the electrostatic chuck112exposed to the plasma150while replacing the wafer W may be damaged by the radicals151and the ions152.

Meanwhile, a lower surface of the wafer W may be in direct contact with a plurality of convex portions formed on the electrostatic chuck112, and a space between the plurality of convex portions and the lower surface of the wafer W may be filled with gas for cooling. For example, the gas for cooling may be helium (He) gas. While the semiconductor process is performed, a chuck voltage of hundreds to thousands of volts may be supplied to the electrostatic chuck112, and a self-bias voltage of minus several thousand volts may be generated on an upper surface of the wafer W. Due to such a voltage difference, an unintentional discharge may occur in the helium gas injected for the purpose of cooling the wafer W, and the electrostatic chuck112may be damaged due to such a discharge. For example, a crack may occur in the ceramic coating layer of the electrostatic chuck112while the helium gas is discharged.

The wafer W may not be properly fixed on the electrostatic chuck112when the electrostatic chuck112is damaged. An operation of the semiconductor processing chamber100may be stopped to determine whether the electrostatic chuck112is damaged. The electrostatic chuck112may be carried out externally to determine whether the electrostatic chuck112is damaged. However, manufacturing time is increased since the operation of the semiconductor processing chamber100is stopped, and it may take a large amount of time to inspect damage to the electrostatic chuck112.

In an example embodiment of the present inventive concept, by detecting damage to the electrostatic chuck112as a voltage change, it may be determined whether replacement of the electrostatic chuck112is necessary in real time without stoppages in an operation of the semiconductor processing chamber100. Accordingly, it is possible to increase a yield of the semiconductor process by minimizing stoppages in the operation of the semiconductor processing chamber100, monitoring a state of the electrostatic chuck112in real time, and replacing the electrostatic chuck112at an appropriate time, when replacement is required.

FIGS.2to5are diagrams illustrating an operation of a semiconductor processing system according to an example embodiment of the present inventive concept.

Referring toFIG.2, a semiconductor processing system200according to an example embodiment of the present inventive concept may include an electrostatic chuck210on which a first wafer W1is seated, a first power supplier220supplying first RF power to an internal electrode213of the electrostatic chuck210, a voltage measuring device230, and a control device240. The electrostatic chuck210may include a plate211, an internal electrode213inside the plate211, and a ceramic coating layer215in contact with the first wafer W1above the plate211. The voltage measuring device230may include an RF voltage measuring circuit231and a signal processor232.

When the first wafer W1is seated and fixed above the electrostatic chuck210and a semiconductor process is started, the first power supplier220may supply first RF power to the internal electrode213. As described above, the first RF power of several thousand to tens of thousands of watts may be supplied to the internal electrode213.

The RF voltage measuring circuit231and the signal processor232may provide a voltage measuring device. For example, the RF voltage measurement circuit231may include an RF pick-up in which an accuracy of voltage measurement is set to 99% or more, and may measure a voltage corresponding to the first RF power between the first power supplier220and the internal electrode213. The voltage measured by the RF voltage measuring circuit231may be converted into a digital signal by the signal processor232, and the digital signal may be input to the control device240. The signal processor232may include an analog to digital converter to the measured analog voltage into the digital signal.

The control device240may be a device for controlling a semiconductor processing chamber including the electrostatic chuck210and the first power supplier220. The control device240may determine variations in a voltage corresponding to the first RF power using the digital signal received from the signal processor232. In an example embodiment, when it is determined that the voltage corresponding to the first RF power has increased to a predetermined reference voltage, the control device240may determine a replacement timing of the electrostatic chuck210due to damage to the electrostatic chuck210, and may output an interlock control signal for stopping an operation of the semiconductor processing chamber.

Referring toFIG.3, when a semiconductor process for a first wafer W1is finished and the first wafer W1is separated from the electrostatic chuck210, a new second wafer W2may be seated on the electrostatic chuck210. However, in a process of replacing the first wafer W1with the second wafer W2, a surface of the electrostatic chuck210, for example, a surface of the ceramic coating layer215in direct contact with the wafers W1and W2may be exposed externally. While the ceramic coating layer215is exposed externally, a plurality of cracks217may be formed in the ceramic coating layer215by radicals and/or ions of plasma existing above the electrostatic chuck210.

When the crack217is formed in the ceramic coating layer215, a contact area between the second wafer W2and the ceramic coating layer215may be reduced. As a result, the second wafer W2may not be sufficiently fixed on the electrostatic chuck210. Accordingly, a desired pattern may not be accurately formed on the second wafer W2because a positional movement of the second wafer W2occurs during the semiconductor process.

The ceramic coating layer215may be a dielectric disposed between the internal electrode213of the electrostatic chuck210and the wafers W1and W2. The dielectric may be modeled as one or more capacitors. When a crack217occurs in the ceramic coating layer215, a capacitance of the capacitor modeling the ceramic coating layer215decreases.

As the number of cracks217formed in the ceramic coating layer215and an area of the cracks217increase, a magnitude of the voltage measured by the RF voltage measuring circuit231may increase. By comparing a predetermined reference voltage or a predetermined reference range with the voltage measured by the RF voltage measuring circuit231, the control device240may determine a replacement timing of the electrostatic chuck210due to the crack217of the ceramic coating layer215. In an embodiment, replacement of the electrostatic chuck210due to the crack217is determined to be needed when the measured voltage exceeds the predetermine voltage.

Next, referring toFIG.4, the semiconductor processing system200according to an example embodiment of the present inventive concept may perform a semiconductor process on the wafer W seated on the electrostatic chuck210. As described above, the electrostatic chuck210may include a plate211, an internal electrode213inside the plate211and a ceramic coating layer215in contact with a first wafer W1above the plate211. A first RF supply may be supplied to the internal electrode213of the electrostatic chuck210by a first power supplier220, and the semiconductor processing system may further include an RF voltage measurement circuit231, a signal processor232and a control device240.

Referring toFIG.5, an enlarged view of region ‘A’ ofFIG.4, the wafer W may be seated on a plurality of protrusions216formed above the ceramic coating layer215in the electrostatic chuck210. Accordingly, as shown inFIG.5, a space may be created between a lower surface of the wafer W and an upper surface of the ceramic coating layer215, and between the plurality of protrusions216. Helium gas, or the like, may be injected into the space for the purpose of cooling the wafer W while the semiconductor process is in progress.

However, when high bias power is supplied to the internal electrode213of the electrostatic chuck210to perform a semiconductor process using plasma, an unintentional discharge may be generated in the helium gas and applied to the wafer W to damage the ceramic coating layer215. The damage to the ceramic coating layer215due to a discharge of the helium gas may appear as cracks217in the ceramic coating layer215and the plurality of protrusions216, as shown inFIG.5.

As described above, as the number and an area of cracks217generated in the ceramic coating layer215increases, a capacitance of a capacitor modeling the ceramic coating layer215may decrease. In an example embodiment of the present inventive concept, a replacement timing of the electrostatic chuck210can be quickly detected without stopping the operation of the semiconductor processing system200by monitoring an increase in voltage due to a decrease in capacitance in real time using a voltage measuring device.

FIGS.6and7are diagrams illustrating an operation of a semiconductor processing system according to an example embodiment of the present inventive concept.

Referring first toFIG.6, a semiconductor processing system300according to an example embodiment of the present inventive concept may include an electrostatic chuck310, a first power supplier320, a second power supplier330, a voltage measuring device340and a control device350. In addition, a chuck voltage supplier for supplying a constant voltage for fixing a wafer W on the electrostatic chuck310to the electrostatic chuck310, a gas supplier for injecting gas for a semiconductor process into a chamber305and evacuating the gas from the chamber305, and the like, may be further included in the semiconductor processing system300.

The electrostatic chuck310may include a plate311, an internal electrode313and a ceramic coating layer315. The internal electrode313may be embedded in the plate311, and may be connected to the first power supplier320to receive first RF power. A wafer W may be seated on the ceramic coating layer315.

Each of the first power supplier320and the second power supplier330may supply power to the internal electrode313and the upper electrodes301and302, and may include power sources321and331and bias matching circuits323and333. The first power supplier320may include a first power source321, a high frequency power source, and a first bias matching circuit323. The second power supplier330may include a second power source331, also a high frequency power source, and a second bias matching circuit333.

For example, plasma including radicals and ions may be formed above the electrostatic chuck310with power supplied to the upper electrodes301and302by the second power supplier330. In addition, radicals and ions formed above the electrostatic chuck310may be accelerated toward the electrostatic chuck310by the power supplied to the internal electrode313by the first power supplier320. According to the above-described principle, the semiconductor process equipment may perform a semiconductor process such as an etching process, a deposition process, or the like.

The control device350may control an overall operation of the semiconductor processing system300. In an example embodiment of the present inventive concept, the control device350may control a chuck voltage supplied to the electrostatic chuck310, first RF power supplied by the first supplier320to the internal electrode313, and second RF power supplied by the second power supplier330to the upper electrodes301and302. In addition, the control device350may be connected to a voltage measuring device340detecting a voltage corresponding to first RF power between the first bias matching circuit323and the internal electrode313. The control device350may determine a replacement timing of the electrostatic chuck310using a detected voltage corresponding to the first RF power.

The voltage measuring device340may include an RF voltage measuring circuit341including an RF pickup calibrated to have an inaccuracy within 1%, and a signal processor342. The signal processor342may convert an analog signal type-voltage measured by the RF pickup into a digital signal by signal processing, and may include a filter, an attenuator, an amplifier, an analog-to-digital converter, and the like.

The control device350may detect variations in a voltage corresponding to first RF power based on a digital signal output from the voltage measuring device340, and determine a replacement timing of the electrostatic chuck310based on the detection. For example, when a voltage corresponding to the first RF power increases up to a predetermined reference range and stays within the reference range for more than a predetermined reference time, the control device350may determine that the replacement timing of the electrostatic chuck310has arrived. For example, when the digital signal has a value within the predetermined reference range or within the predetermined reference range for more than predetermined reference time, the control device350may determine that the replacement timing of the electrostatic chuck310has arrived. In this case, the control device may output an interlock control signal to stop the operations of the first power supplier320and the second power supplier330, and may output a replacement signal of the electrostatic chuck310as image/voice, or the like. For example, the control device350may determine that the electrostatic chuck310needs to be replaced if the detected voltage is between lower and upper voltages of the reference range for longer than the predetermined reference time. For example, the replacement signal may be output to a display as an image that indicates to a user that the electrostatic chuck310needs to be replaced. The image may indicate the location of the electrostatic chuck310when several are present. For example, the replacement signal may be output to a speaker as a sound or spoken phrase that indicates to a user that the electrostatic chuck310needs to be replaced. The spoken phrase may also indicate the location of the electrostatic chuck310when several are present.

FIG.7may be an equivalent circuit diagram electrically modeling the semiconductor processing system300described with reference toFIG.6.

Referring toFIG.7, a first power source321may be modeled as a first impedance Z0, and variable capacitors C1and C2included in a first bias matching circuit323may be connected to the first impedance Z0. An electrostatic chuck capacitor CESCmodeling a ceramic coating layer315of an electrostatic chuck310may be connected to the variable capacitors C1and C2. Meanwhile, plasma formed above the electrostatic chuck310may be regarded as a conductive dielectric and may be modeled as a second impedance ZPincluding a plasma capacitor CP, a plasma resistor RP, and a plasma inductor LP, and upper electrodes301and302connected to the second power supplier330may be modeled as an upper capacitor CW.

An RF voltage measuring circuit341may measure a voltage corresponding to RF power between the first bias matching circuit323and the electrostatic chuck310as shown inFIG.6. Accordingly, in the equivalent circuit shown inFIG.7, the RF voltage measuring circuit341may measure a voltage between the variable capacitors C1and C2and the electrostatic chuck capacitor CESC.

When damage such as a crack, or the like, occurs in the ceramic coating layer315of the electrostatic chuck310, a defect may occur in a contact state between the ceramic coating layer315and the wafer W. As a result, capacitance of the electrostatic chuck capacitor CESCmay be reduced. As an absolute value of the impedance ZPincreases, the voltage measured by the RF voltage measuring circuit341may increase. When an increase in the voltage measured by the RF voltage measuring circuit341is detected, the control device350may determine that a replacement timing has arrived because the electrostatic chuck310is damaged, and output an interlock control signal to stop the operations of the first power supplier320and the second power supplier330.

FIGS.8and9are diagrams illustrating an operation of a semiconductor processing system according to an example embodiment of the present inventive concept.

Referring toFIG.8, a semiconductor processing system400according to an example embodiment of the present inventive concept may include an electrostatic chuck410, a first power supply420, a voltage measurement device440, and a control device450. The electrostatic chuck410may include a plate411, an internal electrode413and a ceramic coating layer415. As compared with the example embodiment shown inFIG.6, in the semiconductor processing system400according to an example embodiment shown inFIG.8, a second power supplier is omitted, or the second power supplier does not supply RF power to an upper electrode. The remaining configuration may be similar to the example embodiment described with reference toFIG.6.

Since the second power supplier does not supply RF power above the wafer W and the electrostatic chuck410, an equivalent circuit diagram modeling the semiconductor processing system400illustrated inFIG.8may appear different from that ofFIG.7. Referring toFIG.9, the first power source421may be modeled as a first impedance Z0, variable capacitors C1and C2included in a first bias matching circuit423may be connected to the first impedance Z0. An electrostatic chuck capacitor CESCmodeling the ceramic coating layer415of the electrostatic chuck410may be connected to the variable capacitors C1and C2. Meanwhile, plasma formed above the electrostatic chuck410is regarded as a conductive dielectric and is modeled as a second impedance ZPincluding a plasma capacitor CP, a plasma resistor RP, and a plasma inductor LP. Since a second power supplier does not supply RF power above the wafer W, the second impedance ZPmay be directly connected to a ground.

An overall operation of the semiconductor processing system400may be similar to that described with reference toFIGS.6and7. An RF voltage measuring circuit441may measure a voltage corresponding to RF power between a first bias matching circuit423and the electrostatic chuck410. As a result, in an equivalent circuit shown inFIG.9, the RF voltage measuring circuit441may measure a voltage between the variable capacitors C1and C2and the electrostatic chuck capacitor CESC.

When damage such as a crack, or the like occurs in the ceramic coating layer415of the electrostatic chuck410, a defect may occur in a contact state between the ceramic coating layer415and the wafer W. As a result, the measured voltage by the RF voltage measuring circuit441may increase as a result thereof. When an increase in the voltage measured by the RF voltage measuring circuit441is detected, the control device450may output an interlock control signal to stop the operation of the semiconductor processing system400.

In example embodiment shown inFIGS.7and9, the control devices350and450may output an interlock control signal when an increase in the measured voltage is sensed. In this case, considering that the measured voltage may vary due to other factors such noise, or the like, as well as damage to the electrostatic chucks310and410, the control devices350and450may output an interlock control signal when the measured voltage has increased to a predetermined reference range or increased to a predetermined reference range for at least a certain amount of time. Hereinafter, it will be described in more detail with reference toFIG.10.

FIG.10is a flowchart illustrating a method of controlling a semiconductor processing system according to an example embodiment of the present inventive concept.FIG.11is a graph illustrating a method of controlling a semiconductor processing system according to an example embodiment of the present inventive concept.

Referring toFIG.10, a method of controlling a semiconductor processing system according to an example embodiment of the present inventive concept includes starting an operation of a semiconductor processing chamber after replacing an electrostatic chuck (S10). The electrostatic chuck is a consumable having a lifespan. When it is determined that a lifespan of the electrostatic chuck is over, the electrostatic chuck may be replaced while the operation of the semiconductor processing chamber is stopped, and the semiconductor processing chamber may be started again.

Next, while the semiconductor processing chamber is operating, a voltage corresponding to RF power supplied to the semiconductor processing chamber is detected (S20). For example, the voltage corresponding to RF power may be measured in a path through which RF power is supplied to an internal electrode disposed inside the electrostatic chuck, and the measured voltage may be converted into a digital signal and transmitted to a control device connected to the semiconductor processing chamber.

The control device monitors whether the voltage has increased to a reference range based on the digital signal (S30). The reference range is a range defined by a predetermined minimum voltage and a maximum voltage. The control device may determine whether the voltage increases above the minimum voltage based on a digital signal. In this case, in consideration of a voltage increase due to noise, or the like, the control device may determine that the voltage has increased to be within a reference range only when the voltage increases to the reference range and does not decrease below the minimum voltage of the reference range for a predetermined time. For example, if the voltage remains within the reference range for the predetermined time, it may be concluded that the electrostatic chuck needs to be replaced.

If it is determined that the voltage has not increased to be within the reference range as a result of the determination in the operation of S30, the control device may continue to detect the voltage while maintaining the operation of the semiconductor processing chamber. On the other hand, if it is determined that the voltage has increased to the reference range as a result of the determination in the operation of S30, the control device may output an interlock control signal to the semiconductor processing chamber (S40). The operation of the semiconductor processing chamber may be stopped by the interlock control signal.

Referring to a graph ofFIG.11, since the semiconductor processing chamber continues to operate after the electrostatic chuck is replaced, a voltage measured in a path through which RF power is supplied to the internal electrode disposed inside the electrostatic chuck may gradually increase. A coupling state between the electrostatic chuck and a wafer may be deteriorated, or a leakage current may increase in the ceramic coating layer when the electrostatic chuck is damaged while the semiconductor processing chamber is operating.

The control device may monitor whether the measured voltage increases above a minimum voltage VMINdefining a reference range. However, according to example embodiments, considering that a voltage may temporarily increase above the minimum voltage VMINdue to a noise component or other causes, the voltage may increase above the minimum voltage VMINand after a predetermined time elapses, the control device may output an interlock control signal to the semiconductor processing chamber. For example, the interlock control signal may not be output if the voltage increases above the minimum voltage VMINbut decreases below the minimum voltage before the predetermined time elapses.

FIG.12is a diagram illustrating an operation of a semiconductor processing system according to an example embodiment of the present inventive concept.

Referring toFIG.12, a semiconductor processing system500may include an electrostatic chuck510, a first power supply520, a second power supply530, a voltage measuring device540, a control device550, and a data server560. As compared with the example embodiment shown inFIG.6, the semiconductor processing system500according to the embodiment shown inFIG.8may further include a data server560, and the remainder of the configuration may be similar to the example embodiment described with reference toFIG.6. The electrostatic chuck510may include a plate511, an internal electrode513, and a ceramic coating layer515.

The data server560may receive raw data from the signal processor542included in the voltage measuring device540, and use the raw data continuously received from the signal processor542to improve interlock consistency of the semiconductor processing system500. The data server560may accumulate and analyze the raw data received from the signal processor542at different time points, to adjust at least one of several operating parameters applied by the signal processor542to convert a measured voltage into a digital signal to improve interlock consistency.

For example, the data server560may optimize the operating parameters of each of the unit blocks included in the signal processor542so that the control device550can generate an interlock control signal under accurate conditions and at an accurate timing. For example, the signal processor542may include a filter, an attenuator, an amplifier, an analog-to-digital converter, and the like. The data server560may adjust at least one of a filtering band of a filter, a gain of an amplifier, an attenuation coefficient of an attenuator, and a full-scale voltage of an analog-to-digital converter by using the raw data received from the signal processor542.

In an example embodiment, when the control device550outputs an interlock control signal when the voltage measured by the voltage measuring device540increases to a first voltage, and an operation of the semiconductor processing chamber is stopped, but the time for actually replacing the electrostatic chuck may not arrive. In this case, the semiconductor processing chamber may be operated again, and then, when the control device550outputs an interlock control signal, the operation of the semiconductor processing chamber may be stopped again.

In an example embodiment of the present inventive concept, the data server560may adjust at least one of the operation parameters of the signal processor542with reference to the case in which the replacement timing of the electrostatic chuck has not arrived. For example, the data server560may adjust the gain of the amplifier, the attenuation coefficient of the attenuator, and the like, under the condition that the voltage measured by the voltage measuring device540increases to the first voltage. As described above, the data server560may accumulate the raw data provided by the signal processor542such that the data server560adjusts at least one of the operating parameters of the signal processor542, thereby improving interlock consistency of the semiconductor processing system500and accurately determining a replacement time of the electrostatic chuck.

FIG.13is a view illustrating an operation of a semiconductor processing system according to an example embodiment of the present inventive concept.

Referring toFIG.13, a semiconductor processing system600according to an example embodiment of the present inventive concept may include an RF pickup605, a signal processor610, a control device620, and a data server630. The RF pickup605may include a circuit capable of measuring a voltage in a path through which RF power is supplied to the semiconductor processing chamber, and may be calibrated to have an inaccuracy of 1% or less. The RF pickup605may measure a voltage corresponding to RF power and output the voltage to the signal processor610in a form of an analog signal.

The signal processor610may include a matching network611, an attenuator612, a first filter613, an amplifier614, an analog-to-digital converter615and a second filter616. However, the configuration of the signal processor610is not limited to that shown inFIG.13, and some configurations thereof may be omitted or additional configurations may be further included. Alternatively, a dispositional order of the components611to616included in the signal processor610may be changed.

An analog signal received by the matching network611may be reduced in amplitude at the attenuator612. The analog signal with reduced amplitude may be primarily filtered by the first filter613. For example, a noise component of the analog signal may be partially removed by the first filter613. At least one of an attenuation coefficient determining an amount by which the attenuator612reduces the amplitude of the analog signal, and a filtering band of the first filter613may be adjusted by the data server630.

An output of the first filter613is input to the amplifier614. The amplifier614may be, for example, a variable gain amplifier. The amplifier614may amplify a signal by a predetermined gain, and the gain of the amplifier may be adjusted by the data server630. The analog signal amplified by the amplifier614may be converted into a digital signal by the analog-to-digital converter615. The digital signal output from the analog-to-digital converter615may be filtered by the second filter616, a digital filter, and may be provided to the control device620. The control device620may determine whether a voltage measured by the RF pickup605has increased enough to generate an interlock control signal using the digital signal.

Meanwhile, data output from the analog-to-digital converter615may be provided to the data server615as raw data. The data server615may analyze the raw data to adjust an operating parameter of at least one of the attenuator612, the first filter613, the amplifier614, the analog-to-digital converter615, and the second filter616. Accordingly, interlock consistency may be improved as time passes and raw data is accumulated.

However, according to example embodiments, the control device620rather than the signal processor610may provide data necessary for improving interlock consistency to the data server630. The data server630may receive a digital signal at the time when the control device620generates an interlock control signal, or the like, and determine whether the time at which the interlock control signal is generated is appropriate, to adjust an operating parameter of at least one of the attenuator612, the first filter613, the amplifier614, the analog-to-digital converter615, and the second filter616, which are included in the signal processor610.

FIG.14is a view schematically illustrating a semiconductor processing system according to an example embodiment of the present inventive concept.

Referring toFIG.14, a semiconductor processing system700according to an example embodiment of the present inventive concept may include a plurality of chambers701to706. The plurality of chambers701to706may include a transfer chamber701, a load lock chamber702, and semiconductor processing chambers703to706. The semiconductor processing chambers703-706may receive a wafer from the transfer chamber701and the load lock chamber702to perform a semiconductor process. For example, at least one of the semiconductor processing chambers703to706may be a plasma processing chamber performing an etching process or a deposition process by generating plasma including radicals and ions of a source gas.

As an example embodiment, a transfer robot may be provided in the transfer chamber701, and the transfer robot may transfer wafers to the load lock chamber702. The load lock chamber702may also include a transfer robot, and the transfer robot inside the load lock chamber702may transfer the wafer inside the transfer chamber701to the semiconductor processing chambers703to706, and move the wafers between the semiconductor processing chambers703to706.

The semiconductor processing chambers703to706may be connected to voltage measuring devices711to741, and the voltage measuring devices711to741may be connected to control devices713to743. In an example embodiment shown inFIG.14, the voltage measuring devices711to741are illustrated as being connected to each of the control devices713to743, but according to example embodiments, two or more of the voltage measuring devices711to741may be connected to one control device. Meanwhile, the voltage measuring devices711to741may be connected to one data server750.

The data server750may receive raw data from each of the voltage measuring devices711to741connected to the semiconductor processing chambers703to706, and control operating parameters of each of the voltage measuring devices711to741based on the raw data. For example, if there are chambers performing the same semiconductor process under the same conditions among the semiconductor processing chambers703to706, the data server750may commonly control operating parameters of the voltage measuring devices connected to the chambers performing the same process. In addition, based on the raw data received from at least one of the chambers performing the same process, operating parameters of all chambers performing the same process may be controlled in common, and in this case, a data throughput of the data server750may be reduced.

As set forth above, according to an example embodiment of the present inventive concept, it is possible to detect a voltage corresponding to RF power input through an electrode inside an electrostatic chuck in real time and monitor variations in the voltage to determine whether the voltage increases to be within a predetermined reference range.

When the voltage increases to the predetermined reference range, it may be determined that the electrostatic chuck has deteriorated and an interlock control signal for stopping an operation of a semiconductor processing chamber to replace the electrostatic chuck may be output to the semiconductor processing chamber.

Accordingly, it is possible to minimize stopping the operation of the semiconductor processing chamber, monitor a state of the electrostatic chuck, and improve a yield of a semiconductor process. However, the inventive concept is not limited to these effects or the previously described embodiments.

While example embodiments have been illustrated and described above, it will be apparent to those skilled in the art that modifications and variations could be made without departing from the scope of the present inventive concept as defined by the appended claims.