Charge pump with wide operating range

A charge pump at least includes a current source, a first switch, a second switch, a level-shift circuit, and a capacitor. The first switch is coupled between the current source and an internal node. The capacitor is coupled between the internal node and the level-shift circuit. The second switch is coupled between the internal node and an output node. The first switch performs a closing-and-opening operation and the level-shift circuit performs a level-shift operation while the second switch is kept open and the internal node is isolated from the output node. The operating range of the charge pump is effectively widened by using the proposed design.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The disclosure generally relates to a charge pump, and more particularly, to a charge pump with a wide operating range.

2. Description of the Related Art

FIG. 1Ais a diagram of a conventional charge pump100. The conventional charge pump100includes a pull-up circuit101and a pull-down circuit102, and both of the circuits are used to adjust a control voltage VCT therebetween. The control voltage VCT is further used as an output voltage of the conventional charge pump100, and it may be applied to other external circuits.FIG. 1Bis a diagram of the operating range of the conventional charge pump100. Since the control voltage VCT directly affects the operation states of transistors in the pull-up circuit101and the pull-down circuit102, the control voltage VCT should be limited within a specific operating range so as to make the transistors operate in an appropriate work mode, such as a saturation mode. Generally, if the conventional charge pump100has a supply voltage VDD and a ground voltage VSS and each transistor therein has an overdrive voltage VOV, the control voltage VCT should be limited by an upper boundary, the supply voltage VDD minus the overdrive voltage VOV, and a lower boundary, the ground voltage VSS plus the overdrive voltage VOV. In other words, the operating range of the control voltage VCT is substantially equal to the supply voltage VDD minus two times the overdrive voltage VOV (i.e., VDD−2×VOV), and it is extremely narrow and not suitable for some circuit applications. Accordingly, there is a need to design a novel charge pump to solve the aforementioned problem of the prior art.

BRIEF SUMMARY OF THE INVENTION

In one exemplary embodiment, the disclosure is directed to a charge pump, including: a first current source; a first switch, coupled between the first current source and a first node; a first level-shift circuit; a first capacitor, coupled between the first node and the first level-shift circuit; and a second switch, coupled between the first node and an output node; wherein the first switch performs a closing-and-opening operation and the first level-shift circuit performs a level-shift operation while the second switch is kept open.

In some embodiments, the first level-shift circuit generates a level-shift signal which switches between a high logic level and a low logic level so as to change a first voltage at the first node. In some embodiments, the first current source supplies a current to the first node. In some embodiments, the first switch is implemented with an MOS transistor (Metal Oxide Semiconductor Field Effect Transistor) which has a control terminal for receiving a first control signal, a first terminal coupled to the first current source, and a second terminal coupled to the first node. In some embodiments, the first level-shift circuit comprises a first inverter which has an input terminal for receiving a second control signal, and output terminal coupled to the first capacitor. In some embodiments, the second control signal is substantially complementary to the first control signal. In some embodiments, the second switch is implemented with a transmission gate which is closed or opened according to a third control signal. In some embodiments, during each operation of the charge pump, the third control signal switches logic level before the first control signal switches logic level, and then the third control signal switches back after the first control signal switches back. In some embodiments, the charge pump further comprises: a second current source; a third switch, coupled between the second current source and a second node; a second level-shift circuit; a second capacitor, coupled between the second node and the second level-shift circuit; and a fourth switch, coupled between the second node and the output node; wherein the third switch performs a closing-and-opening operation and the second level-shift circuit performs a level-shift operation while the fourth switch is kept open. In some embodiments, the second level-shift circuit generates a level-shift signal which switches between a high logic level and a low logic level so as to change a second voltage at the second node. In some embodiments, the first current source supplies a current to the first node, and the second current source draws a current from the second node. In some embodiments, the third switch is implemented with an MOS transistor (Metal Oxide Semiconductor Field Effect Transistor), which has a control terminal for receiving a fourth control signal, a first terminal coupled to the second current source, and a second terminal coupled to the second node. In some embodiments, the second level-shift circuit comprises a second inverter which has an input terminal for receiving a fifth control signal, and output terminal coupled to the second capacitor. In some embodiments, the fifth control signal is substantially complementary to the fourth control signal. In some embodiments, the fourth switch is implemented with a transmission gate which is closed or opened according to a sixth control signal. In some embodiments, during each operation of the charge pump, the sixth control signal switches logic level before the fourth control signal switches logic level, and then the sixth control signal switches back after the fourth control signal switches back.

In another exemplary embodiment, the disclosure is directed to a method for operation of a charge pump, including the steps of: providing the charge pump which includes a first current source, a first level-shift circuit, a first switch, a second switch, and a first capacitor coupled to a first node; changing a logic level of the first capacitor by the first level-shift circuit; coupling the first current source to the first node by the first switch; isolating the first current source from the first node by the first switch; recovering the logic level of the first capacitor by the first level-shift circuit; coupling the first node to an output node of the charge pump by the second switch; and isolating the first node from the output node of the charge pump by the second switch.

In some embodiments, the steps of changing the logic level of the first capacitor, coupling the first current source to the first node, isolating the first current source from the first node, and recovering the logic level of the first capacitor are performed while the first node is kept isolated from the output node of the charge pump. In some embodiments, the charge pump further comprises a second current source, a second level-shift circuit, a third switch, a fourth switch, and a second capacitor coupled to a second node, and wherein the method further comprises: changing a logic level of the second capacitor by the second level-shift circuit; coupling the second current source to the second node by the third switch; isolating the second current source from the second node by the third switch; recovering the logic level of the second capacitor by the second level-shift circuit; coupling the second node to the output node of the charge pump by the fourth switch; and isolating the second node from the output node of the charge pump by the fourth switch. In some embodiments, the steps of changing the logic level of the second capacitor, coupling the second current source to the second node, isolating the second current source from the second node, and recovering the logic level of the second capacitor are performed while the second node is kept isolated from the output node of the charge pump.

DETAILED DESCRIPTION OF THE INVENTION

In order to illustrate the purposes, features and advantages of the invention, the embodiments and figures of the invention will be described in detail as follows.

FIG. 2is a diagram of a charge pump200according to an embodiment of the invention. As shown inFIG. 2, the charge pump200includes a first current source201, a second current source202, a first switch221, a second switch222, a third switch223, a fourth switch224, a first level-shift circuit241, a second level-shift circuit242, a first capacitor261, and a second capacitor262. More particularly, the above components are classified into a pull-up circuit and a pull-down circuit. The pull-up circuit is arranged for pulling up an output voltage at an output node NOUT, and is formed by the first current source201, the first switch221, the second switch222, the first level-shift circuit241, and the first capacitor261. The pull-down circuit is arranged for pulling down the output voltage at the output node NOUT, and is formed by the second current source202, the third switch223, the fourth switch224, the second level-shift circuit242, and the second capacitor262. The detailed structures and operations of the pull-up circuit and the pull-down circuit will be described in the following embodiments.

The first switch221has a first terminal coupled to a current output terminal of the first current source201, and a second terminal coupled to a first node N1. The first capacitor261has a first terminal coupled to the first node N1, and a second terminal coupled to the first level-shift circuit241. The second switch222has a first terminal coupled to the first node N1, and a second terminal coupled to the output node NOUT. The first level-shift circuit241can generate a level-shift signal which switches between a high logic level and a low logic level so as to change a first voltage at the first node N1. Generally, the first switch221performs a closing-and-opening operation and the first level-shift circuit241performs a level-shift operation only while the second switch222is kept open. With such a design, the output node NOUT is temporarily isolated from the first node N1during the pull-up operation of the charge pump200. Therefore, the output voltage at the output node NOUT is independent of the variation of the first voltage at the first node N1during the pull-up operation, and the operating range of the first voltage is effectively widened.

The third switch223has a first terminal coupled to a current input terminal of the second current source202, and a second terminal coupled to a second node N2. The second capacitor262has a first terminal coupled to the second node N2, and a second terminal coupled to the second level-shift circuit242. The fourth switch224has a first terminal coupled to the second node N2, and a second terminal coupled to the output node NOUT. The second level-shift circuit242can generate a level-shift signal which switches between a high logic level and a low logic level so as to change a second voltage at the second node N2. Generally, the third switch223performs a closing-and-opening operation and the second level-shift circuit242performs a level-shift operation only while the fourth switch224is kept open. With such a design, the output node NOUT is temporarily isolated from the second node N2during the pull-down operation of the charge pump200. Therefore, the output voltage at the output node NOUT is independent of the variation of the second voltage at the second node N2during the pull-down operation, and the operating range of the second voltage is effectively widened.

FIG. 3Ais a diagram of a charge pump300according to an embodiment of the invention. As shown inFIG. 3A, the charge pump300may only include the aforementioned pull-up circuit. That is, in alternative embodiments, the pull-up circuit can be used independently, and the operating range of the charge pump300is partially widened during the pull-up operation.

FIG. 3Bis a diagram of a charge pump350according to an embodiment of the invention. As shown inFIG. 3B, the charge pump350may only include the aforementioned pull-down circuit. That is, in alternative embodiments, the pull-down circuit can be used independently, and the operating range of the charge pump350is partially widened during the pull-down operation.

FIG. 4is a diagram of a charge pump400according to a preferred embodiment of the invention.FIG. 4is similar toFIG. 2. The charge pump400also includes a pull-up circuit and a pull-down circuit. Similarly, in some embodiments, either the pull-up circuit or the pull-down circuit of the charge pump400may be used independently. The pull-up circuit includes a first current source201, a first PMOS transistor (P-type Metal Oxide Semiconductor Field Effect Transistor)421, a second PMOS transistor426, a first transmission gate422, a first capacitor261, and a first inverter441. A first switch of the pull-up circuit is implemented with the first PMOS transistor421which has a control terminal for receiving a first control signal S1, a first terminal coupled to a current output terminal of the first current source201, and a second terminal coupled to a first node N1. The first switch selectively couples the current output terminal of the first current source201to the first node N1according to the first control signal S1. A first bypass path is implemented with the second PMOS transistor426which has a control terminal for receiving an inverted first control signalS1(the first control signal S1and the inverted first control signalS1are complementary), a first terminal coupled to the current output terminal of the first current source201, and a second terminal coupled to a ground voltage VSS. The first bypass path is selectively closed or opened according to the inverted first control signalS1. If the first PMOS transistor421is enabled, the first current source201may supply a first current I1to the first node N1, and conversely, if the first PNOS transistor421is disabled, the first current I1from the first current source201may flow through the first bypass path to the ground voltage VSS. A first level-shift circuit of the pull-up circuit is implemented with the first inverter441which has an input terminal for receiving a second control signal S2, and output terminal. The first capacitor261has a first terminal coupled to the first node N1, and a second terminal coupled to the output terminal of the first inverter441. A first voltage V1at the first node N1is indirectly controlled by the second control signal S2through the first inverter441and the first capacitor261. A second switch of the pull-up circuit is implemented with the first transmission gate422which is closed or opened according to a third control signal S3and an inverted third control signalS3(the second control signal S3and the inverted third control signalS3are complementary).

FIG. 5is a diagram of signal waveforms of the pull-up circuit of the charge pump400according to an embodiment of the invention. Please refer toFIG. 4andFIG. 5together. During each pull-up operation of the charge pump400, in the beginning, the third control signal S3switches from a high logic level to a low logic level. As a result, the first transmission gate422is opened, and first node N1is isolated from an output node NOUT of the charge pump400. Next, the second control signal S2switches from a low logic level to a high logic level, such that a high-to-low level-shifting transition is applied to the first voltage V1at the first node N1. As a result, the first voltage V1at the first node N1changes from an original voltage VG to a low level-shifting voltage VL, and the low level-shifting voltage VL is substantially equal to the original voltage VG minus a supply voltage VDD of the charge pump400(i.e., VL=VG−VDD). Then, the first control signal S1switches from a high logic level to a low logic level, such that the first PMOS transistor421is enabled and the first voltage V1at the first node N1is gradually charged up by the first current I1from the first current source201. In some embodiments, the waveform of the second control signal S2is substantially complementary to that of the first control signal S1. In some embodiments, the phase of the second control signal S2is slightly leading or equal to that of the first control signal S1. After a period of charging time, the first control signal S1switches from the low logic level back to the high logic level so as to stop the charging-up operation, and the second control signal S2switches from the high logic level back to the low logic level, such that a low-to-high level-shifting transition is applied to the first voltage V1at the first node N1. Finally, the third control signal S3switches from the low logic level back to the high logic level, such that the first transmission gate422is closed and the first node N1is coupled to the output node NOUT. The first voltage V1at the first node N1further slightly drops down due to the charge-sharing effect between the first node N1and the output node NOUT. It is noted that during each pull-up operation of the charge pump400, the third control signal S3switches its logic level before the first control signal S1and the second control signal S2switch their logic levels, and then the third control signal S3switches its logic level back after the first control signal S1and the second control signal S2switch their logic level back. With such a design, the output voltage VOUT at the output node NOUT is not affected by the variation of the first voltage V1at the first node N1during the pull-up operation, and therefore the first voltage V1has a relatively wide operating range. Theoretically, if each transistor of the charge pump400has an overdrive voltage VOV, the first voltage V1of the charge pump400can have a wide operating range which is substantially equal to two times the supply voltage VDD minus two times the overdrive voltage VOV (i.e., 2×VDD−2×VOV), and it can be much wider than that of the conventional design.

Please refer toFIG. 4again. The pull-down circuit includes a second current source202, a first NMOS transistor (N-type Metal Oxide Semiconductor Field Effect Transistor)423, a second NMOS transistor427, a second transmission gate424, a second capacitor262, and a second inverter442. A third switch of the pull-down circuit is implemented with the first NMOS transistor423which has a control terminal for receiving a fourth control signal S4, a first terminal coupled to a current input terminal of the second current source202, and a second terminal coupled to a second node N2. The third switch selectively couples the current input terminal of the second current source202to a second node N2according to the fourth control signal S4. A second bypass path is implemented with the second NMOS transistor427which has a control terminal for receiving an inverted fourth control signalS4(the fourth control signal S4and the inverted fourth control signalS4are complementary), a first terminal coupled to the current input terminal of the second current source202, and a second terminal coupled to the supply voltage VDD. The second bypass path is selectively closed or opened according to the inverted fourth control signalS4. If the first NMOS transistor423is enabled, the second current source202may draw a second current I2from the second node N2, and conversely, if the first NMOS transistor423is disabled, the second current I2to the second current source202may flow through the second bypass path from the supply voltage VDD. A second level-shift circuit of the pull-down circuit is implemented with the second inverter442which has an input terminal for receiving a fifth control signal S5, and output terminal. The second capacitor262has a first terminal coupled to the second node N2, and a second terminal coupled to the output terminal of the second inverter442. A second voltage V2at the second node N2is indirectly controlled by the fifth control signal S5through the second inverter442and the second capacitor262. A fourth switch of the pull-down circuit is implemented with the second transmission gate424which is closed or opened according to a sixth control signal S6and an inverted sixth control signalS6(the sixth control signal S6and the inverted sixth control signalS6are complementary).

FIG. 6is a diagram of signal waveforms of the pull-down circuit of the charge pump400according to an embodiment of the invention. Please refer toFIG. 4andFIG. 6together. During each pull-down operation of the charge pump400, in the beginning, the sixth control signal S6switches from a low logic level to a high logic level. As a result, the second transmission gate424is opened, and second node N2is isolated from the output node NOUT of the charge pump400. Next, the fifth control signal S5switches from a high logic level to a low logic level, such that a low-to-high level-shifting transition is applied to the second voltage V2at the second node N2. As a result, the second voltage V2at the second node N2changes from an original voltage VG to a high level-shifting voltage VH, and the high level-shifting voltage VH is substantially equal to the original voltage VG plus the supply voltage VDD (i.e., VH=VG+VDD). Then, the fourth control signal S4switches from a low logic level to a high logic level, such that the first NMOS transistor423is enabled and the second voltage V2at the second node N2is gradually discharged down by the second current I2to the second current source202. In some embodiments, the waveform of the fifth control signal S5is substantially complementary to that of the fourth control signal S4. In some embodiments, the phase of the fifth control signal S5is slightly leading or equal to that of the fourth control signal S4. After a period of discharging time, the fourth control signal S4switches from the high logic level back to the low logic level so as to stop the discharging-down operation, and the fifth control signal S5switches from the low logic level back to the high logic level, such that a high-to-low level-shifting transition is applied to the second voltage V2at the second node N2. Finally, the sixth control signal S6switches from the high logic level back to the low logic level, such that the second transmission gate424is closed and the second node N2is coupled to the output node NOUT. The second voltage V2at the second node N2further slightly rises up due to the charge-sharing effect between the second node N2and the output node NOUT. It is noted that during each pull-down operation of the charge pump400, the sixth control signal S6switches its logic level before the fourth control signal S4and the fifth control signal S5switch their logic levels, and then the sixth control signal S6switches its logic level back after the fourth control signal S4and the fifth control signal S5switch their logic level back. With such a design, the output voltage VOUT at the output node NOUT is not affected by the variation of the second voltage V2at the second node N2during the pull-down operation, and therefore the second voltage V2has a relatively wide operating range. Theoretically, if each transistor of the charge pump400has an overdrive voltage VOV, the second voltage V2of the charge pump400can have a wide operating range which is substantially equal to two times the supply voltage VDD minus two times the overdrive voltage VOV (i.e., 2×VDD−2×VOV), and it can be much wider than that of the conventional design.

FIG. 7Ais a flowchart of a method for operating a charge pump according to an embodiment of the invention.FIG. 7Ais related to the operation of a pull-up circuit of the charge pump.FIG. 8is a diagram of the states of the charge pump according to an embodiment of the invention. Please refer toFIG. 7AandFIG. 8together. In step S702, a charge pump is provided, and the charge pump includes a first current source, a first level-shift circuit, a first switch, a second switch, and a first capacitor coupled to a first node. In step S704, a logic level of the first capacitor is changed by the first level-shift circuit, and step S704corresponds to a first state804ofFIG. 8. For example, a high-to-low level-shifting transition may be applied to the logic level of the first capacitor. In step S706, the first current source is coupled to the first node by closing the first switch, and step S706corresponds to a second state806ofFIG. 8. For example, the first current source may supply a first current to the first node. In step S708, the first current source is isolated from the first node by opening the first switch, and step S708corresponds to a third state808ofFIG. 8. In step S710, the logic level of the first capacitor is recovered by the first level-shift circuit, and step S710corresponds to a fourth state810ofFIG. 8. For example, a low-to-high level-shifting transition may be applied to the logic level of the first capacitor. In step S712, the first node is coupled to an output node of the charge pump by closing the second switch, and step S712corresponds to a fifth state812ofFIG. 8. For example, the charges stored in the first capacitor may be shared by the first node and the output node. In step S714, the first node is isolated from the output node of the charge pump by opening the second switch, and step S714corresponds to a sixth state814ofFIG. 8. It is noted that step S704may follow step S714so as to form a cycle process. Steps S704-S710of changing the logic level of the first capacitor, coupling the first current source to the first node, isolating the first current source from the first node, and recovering the logic level of the first capacitor should be performed while the first node is kept isolated from the output node of the charge pump. It is understood that any one or more features of the embodiment ofFIGS. 2, 3A, 4, and 5may be applied to the method ofFIG. 7A.

FIG. 7Bis a flowchart of a method for operating a charge pump according to an embodiment of the invention.FIG. 7Bis related to the operation of a pull-down circuit of the charge pump. Please refer toFIG. 7BandFIG. 8together. In step S716, a charge pump is provided, and the charge pump includes a second current source, a second level-shift circuit, a third switch, a fourth switch, and a second capacitor coupled to a second node. In step S718, a logic level of the second capacitor is changed by the second level-shift circuit, and step S718corresponds to the first state804ofFIG. 8. For example, a low-to-high level-shifting transition may be applied to the logic level of the second capacitor. In step S720, the second current source is coupled to the second node by closing the third switch, and step S720corresponds to the second state806ofFIG. 8. For example, the second current source may draw a second current from the second node. In step S722, the second current source is isolated from the second node by opening the third switch, and step S722corresponds to the third state808ofFIG. 8. In step S724, the logic level of the second capacitor is recovered by the second level-shift circuit, and step S724corresponds to the fourth state810ofFIG. 8. For example, a high-to-low level-shifting transition may be applied to the logic level of the second capacitor. In step S726, the second node is coupled to the output node of the charge pump by closing the fourth switch, and step S726corresponds to the fifth state812ofFIG. 8. For example, the charges stored in the second capacitor may be shared by the second node and the output node. In step S728, the second node is isolated from the output node of the charge pump by opening the fourth switch, and step S728corresponds to the sixth state814ofFIG. 8. It is noted that step S718may follow step S728so as to form a cycle process. Steps S718-S724of changing the logic level of the second capacitor, coupling the second current source to the second node, isolating the second current source from the second node, and recovering the logic level of the second capacitor should be performed while the second node is kept isolated from the output node of the charge pump. It is understood that any one or more features of the embodiment ofFIGS. 2, 3B, 4, and 6may be applied to the method ofFIG. 7B.

The invention provides a charge pump and a method for operating the charge pump. By appropriately designing and operating switches and level-shift circuits therein, the control voltage of the charge pump is temporarily isolated from the output voltage of the charge pump during the pull-up and pull-down operations. Since the output voltage is not directly affected by the control voltage, the freedom of operation of the control voltage is increased, and the operating range of the charge pump is widened accordingly. In a preferred embodiment, the operating range of charge pump is improved by an amount of the supply voltage VDD, and it is much better than that of the conventional design.

The above embodiments are just exemplary, rather than limitations of the invention. It is understood that the charge pump and the operating method thereof are not limited to the configurations and flowcharts ofFIGS. 2-8. The invention may merely include any one or more features of any one or more embodiments ofFIGS. 2-8. In other words, not all of the features shown in the figures should be implemented in the charge pump and the operating method of the invention.