Embodiments may relate to a semiconductor package that includes a die and a package substrate. The package substrate may include one or more cavities that go through the package substrate from a first side of the package substrate that faces the die to a second side of the package substrate opposite the first side. The semiconductor package may further include a waveguide communicatively coupled with the die. The waveguide may extend through one of the one or more cavities such that the waveguide protrudes from the second side of the package substrate. Other embodiments may be described or claimed.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims the benefit of Greek Patent Application Serial No. 20190100117, filed Mar. 12, 2019, entitled “THROUGH-SUBSTRATE WAVEGUIDE,” the entire contents of which are hereby incorporated by reference.

BACKGROUND

Legacy waveguide links involving high-frequency waveguides may use a plurality of connectors and intermediate signal paths to interconnect two dies or a die and another component in a computer environment. However, elements in the signal path may introduce some amount of signal degradation (i.e., in terms of additional signal loss or dispersion) which may require higher output power transmitter or more efficient dispersion compensation techniques. Increased attenuation may also require use of heavier equalization techniques or even forward error correction (FEC) coding, which may introduce additional latency.

DETAILED DESCRIPTION

For the purposes of the present disclosure, the phrase “A or B” means (A), (B), or (A and B). For the purposes of the present disclosure, the phrase “A, B, or C” means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B and C).

In various embodiments, the phrase “a first feature formed, deposited, or otherwise disposed on a second feature,” may mean that the first feature is formed, deposited, or disposed over the feature layer, and at least a part of the first feature may be in direct contact (e.g., direct physical or electrical contact) or indirect contact (e.g., having one or more other features between the first feature and the second feature) with at least a part of the second feature.

Embodiments herein may be described with respect to various Figures. Unless explicitly stated, the dimensions of the Figures are intended to be simplified illustrative examples, rather than depictions of relative dimensions. For example, various lengths/widths/heights of elements in the Figures may not be drawn to scale unless indicated otherwise. Additionally, some schematic illustrations of example structures of various devices and assemblies described herein may be shown with precise right angles and straight lines, but it is to be understood that such schematic illustrations may not reflect real-life process limitations which may cause the features to not look so “ideal” when any of the structures described herein are examined, e.g., using scanning electron microscopy (SEM) images or transmission electron microscope (TEM) images. In such images of real structures, possible processing defects could also be visible, e.g., not-perfectly straight edges of materials, tapered vias or other openings, inadvertent rounding of corners or variations in thicknesses of different material layers, occasional screw, edge, or combination dislocations within the crystalline region, and/or occasional dislocation defects of single atoms or clusters of atoms. There may be other defects not listed here but that are common within the field of device fabrication.

Embodiments herein relate to direct connectivity of individual waveguides, or waveguide bundles, to silicon dies for high-speed links between individual components of a computational system. As used herein, “high-speed” links may refer to links that allow electromagnetic signals with a frequency greater than about 20 gigahertz (GHz) to propagate through the link. The electromagnetic signals may be, for example, millimeter wave (mmWave) signals with a frequency between approximately 20 GHz and approximately 300 GHz. In other embodiments, the electromagnetic signals may have a higher frequency such as a frequency on the order of 1 terahertz (THz) or higher.

The components interconnected by the waveguides may be two dies sharing a same package, two dies on different packages, a die communicatively coupled with a package, a die communicatively coupled with a board, etc. The direct connectivity of the waveguide to the die or dies may help reduce, minimize, or eliminate losses that may exist due to on-package or on-board connectors and other interconnects that are in the path of the high-frequency/high-speed signal.

More generally, embodiments herein may allow for a simple, precise, and relatively low-cost way to directly align and connect waveguides to radiating elements on a die with minimal disruptions in the signal path between one die/component and another die/component. Embodiments may allow for excellent and simple waveguide alignment and minimal disruption to die and package technology and architecture.

FIG.1illustrates a simplified view of an example system100that includes two components and a waveguide therebetween, in accordance with various embodiments. Specifically,FIG.1depicts an example system100with a semiconductor package105communicatively coupled with another semiconductor package110. The semiconductor package105may include a die115coupled with a package substrate120. Similarly, the semiconductor package110may include a die115coupled with a package substrate120.

The dies115may be, for example, a component such as a processor, a memory, a core of a multi-core processor, etc. Additionally or alternatively, the dies115may be an element of, or related to, radio frequency (RF) circuitry that is designed to transmit, receive, facilitate transmission of, facilitate reception of, or otherwise process, generate, or alter one or more RF signals from a radiative antenna. Such signals may be, for example, signals in accordance with second generation (2G) transmission protocols, third generation (3G) transmission protocols, fourth generation (4G) transmission protocols, fifth generation (5G) transmission protocols, Bluetooth® transmission protocols, Wi-Fi transmission protocols, or some other wireless transmission protocol either known or subsequently developed. The die115of semiconductor package105may be the same type of component as the die115of semiconductor package110, or the dies115of semiconductor packages105and110may be a different type of component from one another.

The package substrate120may be, for example, a cored or coreless substrate in various embodiments. The package substrate120may include one or more layers of a dielectric material such as build-up film or some other material. The package substrate120may include one or more conductive elements such as pads, traces, vias, etc. that are designed to carry and electrical signal throughout the package substrate120. In some embodiments, the package substrate120may include an additional component not pictured inFIG.1such as an additional die either coupled to or positioned within the package substrate120.

In embodiments the package substrate120of semiconductor packages105and110may have a cavity107within the package substrate120. The cavity107may, for example, be formed in the package substrate120either during formation of the package substrate120or subsequently to formation of the package substrate120. The cavity107may, for example, be formed by drilling, routing, etching, etc. of the package substrate120. Alternatively, the package substrate120may be formed around a placeholder element that is subsequently removed, leaving behind the cavity107. As may be seen, the cavity107may extend all the way through the package substrate120.

A waveguide125may be positioned within the cavities107of semiconductor packages105and110. Such a waveguide may be referred to herein as a “through-package waveguide.” The waveguide125may be communicatively coupled with the dies115, and particularly radio frequency (RF) circuitry130of the dies. The RF circuitry130may be to generate and transmit a high-frequency electromagnetic signal (e.g., a mmWave or THz-frequency signal) into the waveguide125. The waveguide125may allow the high-frequency electromagnetic signal to propagate through the waveguide and allow communication between the dies115of semiconductor packages105and110. Notably, it may be seen inFIG.1that the waveguide125may communicatively couple with a die115at a first side of the package substrate120, and protrude from the opposite side of the package substrate120.

Generally, the waveguide125may include one or more channels. That is, the waveguide125may in some embodiments be configured to carry a single electromagnetic signal through a single channel, while in other embodiments the waveguide125may include a plurality of channels, and respective ones of the channels may carry a different electromagnetic signal than another of the channels. As used herein, a “channel” may refer to a physical waveguide channel, which may also be referred to as a “lane.” Generally, a “channel” or a “lane” may include one or both of a receive link and a transmit link. Generally, a waveguide that includes a plurality of individual waveguides (e.g., individual channels or lanes) may be referred to as a waveguide bundle. A waveguide bundle may include 2 or more waveguides arranged in a one dimensional (1D) array, two-dimensional (2D) array, or some other bundling configuration. In some embodiments, the waveguide may be considered to be a coaxial waveguide, a dielectric waveguide, or a combination of the two. Generally, as used herein a “coaxial” waveguide may refer to a waveguide with a center conductor that is surrounded by dielectric material, and includes a grounded outer shielding. A coaxial waveguide may have a variety of cross-sectional shapes such as rectangular, circular, etc. By contrast, a “dielectric” waveguide may refer to a waveguide that lacks a center conductor and is generally formed of a dielectric material with a variety of cross-sectional shapes such as a rectangular shape, a circular shape, etc. Similarly to the coaxial waveguide, the dielectric waveguide may have an outer metal cladding.

FIG.2illustrates a simplified view of a portion of an example package with a through-package waveguide, in accordance with various embodiments. Specifically,FIG.2may depict a more detailed “close-up” view of a semiconductor package coupled with a waveguide than is depicted inFIG.1.

FIG.2depicts a die215, which may be similar to, and share characteristics of, die115. The die215may be coupled with a package substrate220, which may be similar to, and share characteristics of, package substrate120. The die215may be coupled with the package substrate220by interconnects235. The interconnects235may be, for example, solder bumps as depicted. In some embodiments the interconnects235may be considered to be balls of a ball grid array (BGA). In other embodiments, the interconnects235may be pins of a pin grid array (PGA), elements of a land grid array (LGA), or some other type of interconnect. For example, as will be discussed later in some embodiments the die215may be coupled with the package substrate220through some other device such as a mechanical coupling (a socket or a clamp), or some other type of coupling or interconnect. In some embodiments, the interconnects235may serve only to physically couple the die215to the package substrate220, while in other embodiments the interconnects235may be coupled with pads of the die215and package substrate220(not shown for the sake of clarity of the Figure) and allow for communication between the die215and the package substrate220.

Generally, the die215may include an active portion205and an interconnect stack210. The active portion205may include, for example, one or more layers of silicon or some other type of material. The active portion205may further include one or more active semiconductor elements such as transistor, diodes, etc. These active semiconductor elements may be in a section of the active portion205adjacent the interconnect stack210. The active portion205may further include one or more passive elements such as resistors, capacitors, etc. The active and passive semiconductor elements are not depicted inFIG.2for the sake of clarity of the Figure.

The interconnect stack210may include one or more interconnects221that may serve to interconnect the active or passive semiconductor elements of the active portion205. The interconnects221may be, for example, a metal interconnect formed out of copper, or some other interconnect. Generally, the interconnects221may be embedded in one or more layers of a dielectric material such as silicon oxide, carbon doped oxide, or some other dielectric material. The interconnects221may be or include, for example, one or more pads, vias, traces, etc. The interconnect stack210may also include one or more passive devices such as resistors, capacitors, inductors, etc. As noted above, the interconnects221or the passive devices may serve to connect the various active elements of the active portion205to form one or more active circuits within the die215. The active circuits may be digital, analogue, mixed signal etc.

In addition to the above-described elements, the interconnect stack210may, in some embodiments, include RF circuitry230or portions thereof. The RF circuitry230may be configured to receive an electronic signal from an active semiconductor element of the active portion205of the die215. The RF circuitry230may convert the electronic signal into an electromagnetic signal such as a high-speed/high-frequency signal as discussed above. The RF circuitry230may further include one or more wave launchers or some other type of signal launcher that is configured to transmit the electromagnetic signal from the die215. The wave/signal launcher may include, for example, one or more metal plates, an antenna, a horn-type launcher, a microstrip-to-slot-transition launcher, or some other type of wave or signal launcher. Additionally or alternatively, the RF circuitry230may include circuitry to receive an electromagnetic signal and convert the electromagnetic signal into an electronic signal that may then be transmitted to an element of the active portion205of the die215.

More specifically, the RF circuitry230may be configured to send or receive an electromagnetic signal to or from a waveguide225, which may be similar to, and share characteristics of, waveguide125. The waveguide225may be positioned in a cavity207of the package substrate220, and the cavity207may be similar to, and share characteristics of, cavity107. As discussed above, the waveguide225may be held in place within the cavity207by an adhesive240. The adhesive may be, for example, epoxy or some other adhesive. In some embodiments, the waveguide225may be positioned within the cavity207, and then the adhesive240may be applied such that it at least partially fills the cavity207and holds the waveguide225in place. In other embodiments, the adhesive240may be applied to the waveguide225prior to insertion of the waveguide225within the cavity207. In some embodiments, an adhesive may not be used and instead a soft plug-element made out of a material such as plastic may be positioned on the waveguide225, and the waveguide225may be inserted within the cavity207. The plug-element may hold the waveguide225within the cavity207through friction against the sides of the package substrate220. Generally, it may be desirable for the adhesive240to be made of a material that may be removed (e.g., through the application of heat or a solvent) without damaging the die215, the interconnects235, or the package substrate220. In this manner, the waveguide225may be replaced if some sort of failure occurs without damaging other elements of the semiconductor package.

As may be seen inFIG.2, the waveguide225may be communicatively coupled with the die215within an RF alignment area245of the die215. Generally, because the tolerances for semiconductor package manufacture may be relatively strict (e.g., with tolerances on the order of less than 50 micrometers (“microns”)), additional manual alignment of the waveguide225to the RF alignment area245may not be required.

It will be understood that the above descriptions of various elements ofFIGS.1and2are intended as examples of various embodiments, and other embodiments may be different in one or more respects. For example, the description of the various adhesive elements is intended as one example, and other embodiments may use one or more of the described adhesive elements (e.g., a plug and an adhesive), or some other type of material. Additionally, the illustrations of the various elements are intended as examples, and other embodiments may have a different number of elements than shown inFIG.1(e.g., a package substrate may include a plurality of dies attached thereto, a different number of interconnects may be used to couple a die to a package substrate, etc.). Additionally, although the waveguides125and225are depicted as single elements, in other embodiments the waveguides125or225may include a plurality of elements or channels. Additionally, although the waveguide225is depicted as abutting the die215, in other embodiments the waveguide225may be offset from the die215. For example, in some embodiments the waveguide225may be between approximately 0 microns and approximately 10 microns away from the die215. Other embodiments may have even more distance between the waveguide225and the die215based on factors such as the strength of the wave or signal launchers, acceptable loss or power characteristics of the system, design characteristics, etc. Finally, although the waveguide225is depicted as being entirely perpendicular to the face of the die215or the package substrate220, in other embodiments the waveguide225may not be perpendicular to the face of the die215or the package substrate220based on factors such as angular misalignment when inserting the waveguide225in the package substrate220, angularity when cutting the end of the waveguide225, etc.

FIG.3illustrates a simplified bottom-on view of an example package substrate that is to be used with a through-package waveguide, in accordance with various embodiments. Specifically,FIG.3illustrates a package substrate320, which may be similar to, and share characteristics of, package substrates120and220. The view ofFIG.3may be considered to be a view of the package substrate opposite the side to which a die such as die115or215may be coupled.

The package substrate320may include a plurality of interconnects305. Generally, the interconnects305may be to couple the package substrate320to a printed circuit board (PCB) of a computing device. Similarly to interconnects235, the interconnects305may be a solder ball or a solder bump. In some embodiments, the interconnects305may be elements of a BGA, LGA, or PGA. In other embodiments, the interconnects305may not be present and instead the package substrate320may be coupled with the PCB by another device such as a socket, a clamp, etc. In some embodiments, the interconnects305may serve only to physically couple the die package substrate320to the PCB, while in other embodiments the interconnects305may be coupled with pads of the package substrate320(not shown for the sake of clarity of the Figure) and PCB and allow for communication between the package substrate320and the PCB.

The package substrate320may also include a plurality of cavities such as cavities310and315. The cavities310and315may be similar to cavities107or207in that they may extend through the entirety of the package substrate320. Generally, the cavities310and315may have a variety of spacings. For example, in some embodiments the cavities may be relatively small such as cavity310, and may be configured to accommodate only a single waveguide or a single waveguide channel. In other embodiments, the cavities may be relatively large such as cavity315, and may be configured to accommodate a plurality of waveguides or a plurality of waveguide channels.

It will be understood that this depiction of a package substrate320with a plurality of cavities310/315is intended as an example, and other embodiments may have other variations. For example, in some embodiments the package substrate320may have more or fewer interconnects305or cavities310/315than depicted inFIG.3. In some embodiments, the interconnects305or cavities310/315may have a different orientation, configuration, or spacing than depicted inFIG.3. In some embodiments, the package substrate320may only have cavities of a single size, rather than the cavities310and315of different sizes. In some embodiments, the cavities310/315may have a different cross-sectional shape than depicted inFIG.3. For example, in some embodiments the cavities310/315may have a circular cross section, a square-shaped cross section, an “H”-shaped cross section, or some other type of cross section. Similarly, a waveguide to be placed in the cavities310/315may likewise have a variety of cross-sectional shapes such as circular, square, “H,” or be a single- or dual-ridge-waveguide etc.

FIG.4illustrates a simplified bottom-on view of an example die415that is to be used with a through-package waveguide, in accordance with various embodiments. Specifically, the die415may be similar to, and share one or more characteristics of, dies115or215. The view of the die415inFIG.4may be considered to be a view of the side of the die that is to be coupled with a package substrate such as package substrate320. The die415may include a plurality of interconnects405which may be similar to, and share characteristics of, interconnects235.

It will be noted thatFIG.4depicts a greater number of interconnects405than the number of interconnects305depicted inFIG.3. Additionally, the interconnects405appear smaller than the interconnects305ofFIG.3. However, in other embodiments the relative sizes of interconnects305and405may be different than depicted (e.g., they may be the same size, interconnects405may be larger, etc.) or the relative numbers of the interconnects305and405may be different (e.g., there may be more interconnects305than interconnects405).

The die405may also include a plurality of signal/wave launchers420/425. The signal/wave launchers420/425may be elements of RF circuitry such as RF circuitry230ofFIG.2. Specifically, the signal/wave launchers420/425may be configured to transmit or receive a high-speed/high-frequency electromagnetic signal through a waveguide such as waveguides125or225as described above.

Generally, the signal/wave launchers420/425may be configured to align with the cavities310/315of package substrate320when the die415is coupled with the package substrate320. For example, signal/wave launchers425may generally align with the cavities310, and more particularly with a waveguide positioned within the cavities310. Similarly, the signal/wave launchers420may generally align with the cavity315of package substrate320. As previously noted, the cavity315may be configured to accommodate one or more waveguide bundles with one or more channels. The signal/wave launcher420may couple with the waveguide bundle in general, and a waveguide channel in particular, or in other embodiments a plurality of waveguides may be inserted in the cavity315and a respective waveguide may be coupled with a respective signal/wave launcher420.

In some embodiments, certain of the cavities such as cavity425(or some other cavity) may be surround by a shield element410. The shield elements410may serve to electromagnetically isolate the cavity425from some other cavity or interconnect of the die415, thereby reducing or eliminating undesirable cross-talk between waveguides. Additionally, the shield elements410may extend to the package and form a continuous shield of the shape depicted in the Figure. In some embodiments, the shield element410may be referred to as a “closed-path” shield element.

Similarly toFIG.3, it will be understood that the configuration, shape, orientation, and spacing of various elements ofFIG.4is intended only as an example, and other embodiments may have different configurations/shapes/orientations/spacing. For example, in some embodiments the signal/wave launchers420may not be rectangular, but rather may have a different cross-sectional shape as described above.

FIG.5-7illustrate a variety of alternative simplified views of a system with a through-package waveguide, in accordance with various embodiments. Generally,FIGS.5-7may be considered to have elements similar to those depicted in, and discussed with respect to, various Figures above. Each and every element ofFIGS.5-7will not be specifically enumerated or discussed for the sake of brevity and lack of redundancy, but it may be assumed that elements that share similarities between the Figures may have similar characteristics to those discussed above with respect to the various previous Figures.

The system ofFIG.5may include a die515, which may be similar to, and share characteristics of, dies115,215, etc. The system ofFIG.5may further include a package substrate520, which may be similar to, and share characteristics of, package substrates120,220, etc. The package substrate520may in turn be coupled with a PCB505by one or more interconnects510which may be similar to, and which may share characteristics of, interconnects305.

The PCB505may be, for example, a mother board of a computing device or some other type of PCB. More generally, the PCB505may be coupled with a plurality of semiconductor packages or other computing components. Similarly to the package substrate120, the PCB505may include one or more organic or inorganic dielectric layers, and may be cored or coreless. The PCB505may further include one or more conductive elements such as traces, vias, pads, etc. positioned within or on the periphery of the PCB505.

As can be seen inFIG.5, in addition to the package substrate520having a cavity507(which may be similar to, and which may share characteristics of, cavities107,207, etc.), the PCB505may also have a cavity509. Similarly to as describe with respect to cavity107, the cavity509may be formed at the time of manufacture of the PCB505, or may be later formed through a technique such as drilling, etching, etc. A waveguide525, which may be similar to waveguides125,225, etc. may be communicatively coupled with the die515and positioned within cavities507and509, as depicted inFIG.5. Although not explicitly shown, an adhesive such as adhesive240may be positioned in one or both of cavities507and509to secure the waveguide525within the cavities507/509.

The system ofFIG.6may include elements similar to those ofFIG.5. Specifically,FIG.6may depict a die615, a package substrate620, and a PCB605, which may be respectively similar to, and share characteristics of, die115/215/etc., package substrate120/220/etc., and PCB505.

However, rather than being coupled to the PCB605by interconnects such as interconnects510, the package substrate620may be coupled with the PCB605by a socket610, as discussed above. More particularly, the socket610may be adhered or otherwise coupled to the PCB605on one side, and configured to receive and securely hold the package substrate620on the other side of the socket610(or vice-versa). Similarly to the various interconnects described above, in some embodiments the socket610may only physically coupled the package substrate620to the PCB605, while in other embodiments the socket610may allow for electrical communication between the package substrate620and the PCB605.

As can be seen inFIG.6, the die615may be communicatively coupled with a waveguide625, which may be similar to waveguides125/225/etc. The waveguide625may be positioned in a cavity607in the package substrate620, which may be similar to cavities107/207/etc. As may be seen, the waveguide625may protrude from the package substrate620at a side of the package substrate620opposite the side to which the die615is coupled, and the waveguide625may be threaded through the socket610between the PCB605and the package substrate620. In some embodiments, the socket610may be specially designed to accommodate the waveguide625, while in other embodiments the waveguide625may be threaded through existing spaces of the socket610.

The system ofFIG.7may include elements similar to those ofFIGS.5and6. Specifically,FIG.7may depict a die715, a package substrate720, and a waveguide725, which may be respectively similar to, and share characteristics of, dies125/225/etc., package substrate120/220/etc., and waveguide125/225/etc. The package substrate720may include interconnects710which may be similar to, and share characteristics of, interconnects305. The die715may be coupled with the package substrate720by interconnects735which may be similar to, and share characteristics of, interconnects235/405/etc.

In the system ofFIG.7, the die715may be in a flipped configuration where the die715is coupled with a same side of the package substrate720as the side to which the interconnects710are coupled. In this embodiment, the waveguide725may still be positioned in a cavity707(which may be similar to, and share characteristics of, cavities107/207/etc.) and protrude from a side of the package substrate720opposite the side to which the die715is coupled.

It will be understood that, similarly to other Figures depicted herein,FIGS.5-7are intended as example Figures showing variations that may be present in various embodiments. Other embodiments may have more or fewer elements than depicted, elements of different dimensions, combinations of elements from various Figures, etc.

FIG.8illustrates a simplified example technique for manufacturing a semiconductor package with a through-package waveguide, in accordance with various embodiments.FIG.8may be described with respect to the embodiment ofFIG.2, however it will be understood that aspects ofFIG.8may be applied, in whole or in part, to other embodiments discussed herein, or other embodiments that may include a through-package waveguide.

The technique may include coupling, at805, a die to a first side of a package substrate. The die may be similar to, for example, die215, and the package substrate may be similar to, for example, package substrate220. The package substrate may have a cavity such as, for example, cavity207. The cavity may be between the first side of the package substrate and a second side of the package substrate opposite the first side.

The technique may further include positioning, at810, a waveguide within the cavity of the package substrate. The waveguide may be similar to, for example, waveguide225. The waveguide may be communicatively coupled with the die and protrude from the second side of the package substrate.

It will be understood that the above description is one example technique, and other embodiments may use different techniques with additional or alternative elements. In some embodiments, certain elements may be performed in a different order than depicted inFIG.8. For example, element810may occur prior to, or concurrently with, the occurrence of element805.

FIG.9illustrates an example computing device1500suitable for use with systems100or some other depicted system, in accordance with various embodiments. Specifically, in some embodiments, the computing device1500may include one or more of systems therein.

As shown, computing device1500may include one or more processors or processor cores1502and system memory1504. For the purpose of this application, including the claims, the terms “processor” and “processor cores” may be considered synonymous, unless the context clearly requires otherwise. The processor1502may include any type of processors, such as a CPU, a microprocessor, and the like. The processor1502may be implemented as an integrated circuit having multi-cores, e.g., a multi-core microprocessor. The computing device1500may include mass storage devices1506(such as diskette, hard drive, volatile memory (e.g., DRAM, compact disc read-only memory (CD-ROM), digital versatile disk (DVD), and so forth)). In general, system memory1504and/or mass storage devices1506may be temporal and/or persistent storage of any type, including, but not limited to, volatile and non-volatile memory, optical, magnetic, and/or solid state mass storage, and so forth. Volatile memory may include, but is not limited to, static and/or DRAM. Non-volatile memory may include, but is not limited to, electrically erasable programmable read-only memory, phase change memory, resistive memory, and so forth. In some embodiments, one or both of the system memory1504or the mass storage device1506may include computational logic1522, which may be configured to implement or perform, in whole or in part, one or more instructions that may be stored in the system memory1504or the mass storage device1506. In other embodiments, the computational logic1522may be configured to perform a memory-related command such as a read or write command on the system memory1504or the mass storage device1506.

The computing device1500may further include input/output (I/O) devices1508(such as a display (e.g., a touchscreen display), keyboard, cursor control, remote control, gaming controller, image capture device, and so forth) and communication interfaces1510(such as network interface cards, modems, infrared receivers, radio receivers (e.g., Bluetooth), and so forth).

The communication interfaces1510may include communication chips (not shown) that may be configured to operate the device1500in accordance with a Global System for Mobile Communication (GSM), General Packet Radio Service (GPRS), Universal Mobile Telecommunications System (UMTS), High Speed Packet Access (HSPA), Evolved HSPA (E-HSPA), or Long-Term Evolution (LTE) network. The communication chips may also be configured to operate in accordance with Enhanced Data for GSM Evolution (EDGE), GSM EDGE Radio Access Network (GERAN), Universal Terrestrial Radio Access Network (UTRAN), or Evolved UTRAN (E-UTRAN). The communication chips may be configured to operate in accordance with Code Division Multiple Access (CDMA), Time Division Multiple Access (TDMA), Digital Enhanced Cordless Telecommunications (DECT), Evolution-Data Optimized (EV-DO), derivatives thereof, as well as any other wireless protocols that are designated as 3G, 4G, 5G, and beyond. The communication interfaces1510may operate in accordance with other wireless protocols in other embodiments.

The computing device1500may further include or be coupled with a power supply. The power supply may, for example, be a power supply that is internal to the computing device1500such as a battery. In other embodiments the power supply may be external to the computing device1500. For example, the power supply may be an electrical source such as an electrical outlet, an external battery, or some other type of power supply. The power supply may be, for example alternating current (AC), direct current (DC) or some other type of power supply. The power supply may in some embodiments include one or more additional components such as an AC to DC convertor, one or more downconverters, one or more upconverters, transistors, resistors, capacitors, etc. that may be used, for example, to tune or alter the current or voltage of the power supply from one level to another level. In some embodiments the power supply may be configured to provide power to the computing device1500or one or more discrete components of the computing device1500such as the processor(s)1502, mass storage1506, I/O devices1508, etc.

The above-described computing device1500elements may be coupled to each other via system bus1512, which may represent one or more buses. In the case of multiple buses, they may be bridged by one or more bus bridges (not shown). Each of these elements may perform its conventional functions known in the art. The various elements may be implemented by assembler instructions supported by processor(s)1502or high-level languages that may be compiled into such instructions.

The permanent copy of the programming instructions may be placed into mass storage devices1506in the factory, or in the field, through, for example, a distribution medium (not shown), such as a compact disc (CD), or through communication interface1510(from a distribution server (not shown)). That is, one or more distribution media having an implementation of the agent program may be employed to distribute the agent and to program various computing devices.

The number, capability, and/or capacity of the elements1508,1510,1512may vary, depending on whether computing device1500is used as a stationary computing device, such as a set-top box or desktop computer, or a mobile computing device, such as a tablet computing device, laptop computer, game console, or smartphone. Their constitutions are otherwise known, and accordingly will not be further described.

In various implementations, the computing device1500may comprise one or more components of a data center, a laptop, a netbook, a notebook, an ultrabook, a smartphone, a tablet, a personal digital assistant (PDA), an ultra mobile PC, a mobile phone, or a digital camera. In further implementations, the computing device1500may be any other electronic device that processes data.

In some embodiments, as noted above, computing device1500may include one or more of the systems described herein. For example, in some embodiments the processor1502, memory1504, or some other component of the computing device1500may be a die such as dies115,515,615, etc.

Examples of Various Embodiments

Example 1 includes a semiconductor package comprising: a die; a package substrate, wherein the die is coupled with the package substrate by one or more interconnects, and wherein the package substrate includes one or more cavities that go through the package substrate from a first side of the package substrate that faces the die to a second side of the package substrate opposite the first side; and a waveguide communicatively coupled with the die, wherein the waveguide extends through one of the one or more cavities such that the waveguide protrudes from the second side of the package substrate.

Example 2 includes the semiconductor package of example 1, wherein the one or more interconnects are solder bumps of a ball grid array (BGA).

Example 3 includes the semiconductor package of example 1, further comprising a closed-path first layer interconnect (FLI) coupled with the first side of the package substrate, wherein the closed-path FLI generally surrounds the waveguide in a plane parallel to the first side of the package substrate.

Example 4 includes the semiconductor package of any of examples 1-3, wherein the waveguide is separated from the die by less than 10 micrometers (“microns”).

Example 5 includes the semiconductor package of any of examples 1-3, wherein the waveguide includes a plurality of waveguides that form a waveguide bundle.

Example 6 includes the semiconductor package of any of examples 1-3, wherein the waveguide is to support propagation of an electromagnetic signal to or from the die.

Example 7 includes the semiconductor package of any of examples 1-3, wherein the die includes one or more wave launchers that are to generate an electromagnetic signal and transmit the electromagnetic signal to the waveguide.

Example 8 includes an electronic device comprising: a printed circuit board (PCB); and a semiconductor package coupled with the PCB, wherein the semiconductor package includes: a die coupled with a first side of a package substrate, wherein the package substrate includes one or more cavities that go from the first side of the package substrate to a second side of the package substrate opposite the first side; and a waveguide positioned within one of the one or more cavities, wherein the waveguide is communicatively coupled with the die and protrudes from the second side of the package substrate.

Example 9 includes the electronic device of example 8, wherein the semiconductor package is coupled with the PCB by a socket.

Example 10 includes the electronic device of example 8, wherein the semiconductor package is coupled with the PCB by one or more interconnects.

Example 11 includes the electronic device of any of examples 8-10, wherein the waveguide protrudes from the second side of the package substrate and is routed between the PCB and the semiconductor package in a direction parallel to the second side of the package substrate.

Example 12 includes the electronic device of any of examples 8-10, wherein the PCB includes one or more cavities from a first side of the PCB that faces the semiconductor package and a second side opposite the first side, and wherein the waveguide is positioned within one of the one or more cavities of the PCB, and the waveguide protrudes from the second side of the PCB.

Example 13 includes the electronic device of any of examples 8-10, wherein the die is a first die, and further comprising a second die coupled with the PCB, wherein the waveguide includes a first end communicatively coupled with the first die and a second end opposite the first end, wherein the second end is communicatively coupled with the second die.

Example 14 includes a method of manufacturing a semiconductor package with a waveguide, wherein the method includes: coupling a die to a first side of a package substrate, wherein the package substrate has a cavity between the first side of the package substrate and a second side of the package substrate opposite the first side; and positioning a waveguide within the cavity such that the waveguide is communicatively coupled with the die and protrudes from the second side of the package substrate.

Example 15 includes the method of example 14, wherein positioning the waveguide within the cavity includes positioning the waveguide at least one micrometer away from the die.

Example 16 includes the method of examples 14 or 15, further comprising adhering the waveguide to the package substrate within the cavity with an adherent material.

Example 17 includes the method of example 16, wherein the adherent material is epoxy, an adhesive, or a friction-based plug.

Example 18 includes the method of example 16, wherein adhering the waveguide to the package substrate includes removably adhering the waveguide to the package substrate.

Example 19 includes the method of example 16, wherein adhering the waveguide to the package substrate includes placing the adherent on the waveguide prior to positioning the waveguide within the cavity.

Example 20 includes the method of example 16, wherein adhering the waveguide to the package substrate includes placing the adherent material within the cavity after the waveguide is positioned within the cavity.

The above description of illustrated embodiments, including what is described in the Abstract, is not intended to be exhaustive or limiting as to the precise forms disclosed. While specific implementations of, and examples for, various embodiments or concepts are described herein for illustrative purposes, various equivalent modifications may be possible, as those skilled in the relevant art will recognize. These modifications may be made in light of the above detailed description, the Abstract, the Figures, or the claims.