Display apparatus and method of manufacturing the same

A display apparatus includes a base substrate, a first conductive pattern disposed on the base substrate, a first insulation layer disposed on the base substrate to cover the first conductive pattern, where a first contact hole is defined through the first insulation layer, a first pattern disposed on the first insulation layer, where the first pattern is in contact with the first conductive pattern through the first contact hole, a first filling pattern disposed in a recess of the first pattern which is defined by the first contact hole, a second insulation layer disposed on the first pattern and the first insulation layer, where a second contact hole overlapping the first contact hole is defined through the second insulation layer, and a second conductive pattern electrically connected to the first pattern through the second contact hole.

This application claims priority to Korean Patent Application No. 10-2016-0124231, filed on Sep. 27, 2016, and all the benefits accruing therefrom under 35 U.S.C. § 119, the content of which in its entirety is herein incorporated by reference.

BACKGROUND

Exemplary embodiments of the invention relate to a display apparatus and a method of manufacturing the display apparatus. More particularly, exemplary embodiments of the invention relate to a display apparatus having a high-resolution and a method of manufacturing the display apparatus.

2. Description of the Related Art

Recently, a display apparatus having a light weight and a small size has been manufactured. A cathode ray tube (“CRT”) display apparatus has been used due to a performance and a competitive price. However the CRT display apparatus has a weakness with respect to size or portability. Therefore, recently, a display apparatus, such as a plasma display apparatus, a liquid crystal display apparatus and an organic light emitting display apparatus, for example, has been widely used due to a small size, a light weight and low-power-consumption of such a display apparatus.

SUMMARY

Efforts have been made to improve a resolution of a display apparatus to improve display quality of the display apparatus. However, as the resolution of the display apparatus increases, a structure of a pixel becomes complicated, and as a result, aperture ratio may be lowered. Especially, a portion where a contact hole is formed is difficult to be constituted by an opening through which light for displaying the image passes. As the structure of the pixel is complicated, the number of the contact holes is increased, and as a result, the aperture ratio is reduced.

One or more exemplary embodiments of the invention relate to a display apparatus having a high resolution and with improved aperture ratio.

One or more exemplary embodiments of the invention relate to a method of manufacturing the display apparatus.

According to an exemplary embodiment of the invention, a display apparatus includes a base substrate, a first conductive pattern disposed on the base substrate, a first insulation layer disposed on the base substrate to cover the first conductive pattern, where a first contact hole is defined through the first insulation layer, a first pattern disposed on the first insulation layer, where the first pattern is in contact with the first conductive pattern through the first contact hole, a first filling pattern disposed in a recess of the first pattern which is defined by the first contact hole, a second insulation layer disposed on the first pattern and the first insulation layer, where a second contact hole overlapping the first contact hole is defined through the second insulation layer, and a second conductive pattern electrically connected to the first pattern through the second contact hole.

In an exemplary embodiment, each of the first and second contact holes may have a truncated cone shape in which a lower end thereof is narrower than an upper end thereof. The first contact hole may have a first width at the lower end thereof. The second contact hole may have a second width at the lower end thereof. The second width may be greater than or equal to the first width.

In an exemplary embodiment, the first width may be less than about 2 micrometers (μm).

In an exemplary embodiment, the first filling pattern may include a photoresist.

In an exemplary embodiment, a contacting surface of the first pattern and the second conductive pattern may have a ring shape.

In an exemplary embodiment, the display apparatus may include a first capping pattern disposed between the first filling pattern and the second conductive pattern and in contact with the first pattern, the first filling pattern and the second conductive pattern.

In an exemplary embodiment, a contacting surface of the first pattern and the second conductive pattern may have a circle shape.

In an exemplary embodiment, the contacting surface of the first pattern and the second conductive pattern may be within a boundary of an upper end of the first contact hole.

In an exemplary embodiment, the first conductive pattern may include an element of a thin film transistor, and the second conductive pattern may include a pixel electrode.

In an exemplary embodiment, the display apparatus may further include a color filter disposed between the pixel electrode and the second insulation layer.

In an exemplary embodiment, the display apparatus may further include a common electrode disposed between the color filter and the pixel electrode.

According to another exemplary embodiment of the invention, a display apparatus includes a base substrate, a first conductive pattern disposed on the base substrate, a first insulation layer disposed on the base substrate to cover the first conductive pattern, where a first contact hole is defined through the first insulation layer, a first pattern disposed on the first insulation layer, where the first pattern is in contact with the first conductive pattern through the first contact hole, a first filling pattern disposed in a recess of the first pattern which is defined by the first contact hole, a second insulation layer disposed on the first pattern and the first insulation layer, where a second contact hole overlapping the first contact hole is defined through the second insulation layer, a second pattern disposed on the second insulation layer and in contact with the first pattern through the second contact hole, a second filling pattern disposed in a recess of the second pattern which is defined by the second contact hole, a third insulation layer disposed on the second pattern and the second insulation layer, where a third contact hole overlapping the second contact hole is defined through the third insulation layer, and a second conductive pattern electrically connected to the second pattern through the third contact hole.

In an exemplary embodiment, each of the first to third contact holes may have a truncated cone shape in which a lower end thereof is narrower than an upper end thereof. The first contact hole may have a first width at the lower end thereof. The second contact hole may have a second width at the lower end thereof. The third contact hole may have a third width at the lower end thereof. The second width may be greater than or equal to the first width, and the third width may be greater than or equal to the second width.

In an exemplary embodiment, the display apparatus may further include a first capping pattern disposed between the first filling pattern and the second pattern and in contact with the first pattern, the first filling pattern and the second pattern, and a second capping pattern disposed between the second filling pattern and the second conductive pattern and in contact with the second pattern, the second filling pattern and the second conductive pattern.

According to an exemplary embodiment of the invention, a method of manufacturing a display apparatus includes providing a first conductive pattern on a base substrate, providing a first insulation layer on the base substrate to cover the first conductive pattern, forming a first contact hole through the first insulation layer to expose the first conductive pattern, providing a first pattern on the first insulation layer to be in contact with the first conductive pattern through the first contact hole, providing a first filling pattern in a recess of the first pattern formed by the first contact hole, providing a second insulation layer on the first insulation layer to cover the first filling pattern and the first pattern, forming a second contact hole overlapping the first contact hole through the second insulation layer, and providing a second conductive pattern on the second insulation layer, where the second conductive pattern is electrically connected to the first pattern through the second contact hole.

In an exemplary embodiment, each of the first and second contact holes may have a truncated cone shape in which a lower end thereof is narrower than an upper end thereof. The first contact hole may have a first width at the lower end thereof. The second contact hole may have a second width at the lower end thereof. The second width may be greater than or equal to the first width.

In an exemplary embodiment, the first width may be less than about 2 μm.

In an exemplary embodiment, the providing the first filling pattern may include coating a negative type photoresist on the first pattern and the first insulation layer, and removing a portion of the photoresist by developing the photoresist to form the first filling pattern.

In an exemplary embodiment, the method may further include providing a first capping pattern between the first filling pattern and the second conductive pattern. The providing the first pattern, the providing the first filling pattern and the providing the first capping pattern may be performed by: providing a first pattern layer on the first insulation layer; providing the first filling pattern in the recess of the first pattern formed by the first contact hole; providing a first capping pattern layer on the first pattern layer to cover the first filling pattern; and providing the first pattern and the first capping pattern by simultaneously pattering the first pattern layer and the first capping layer.

In an exemplary embodiment, the method may further include providing a color filter between the second conductive pattern and the first insulation layer. The first conductive pattern may include an element of a thin film transistor, and the second conductive pattern includes a pixel electrode.

According to exemplary embodiments of the invention, as the first contact hole and the second contact hole are disposed to overlap each other, non-opening area where the image is not displayed by the contact hole is minimized, and an aperture ratio can be improved compared to a structure in which the contact holes do not overlap each other. Accordingly, a high-resolution display apparatus in which the size of one pixel is relatively small may be realized.

In exemplary embodiments, the first filling pattern may fill the recess of the first pattern formed by the first contact hole, so that the first capping pattern may be formed relatively flat. Accordingly, contact area of the second conductive pattern and the first capping pattern through the second contact hole, which overlaps the first contact hole, may be secured.

In exemplary embodiments, the first width of the first contact hole is smaller than or equal to the second width of the second contact hole, and the first width may be less than about 2 μm, so that a non-opening area where the image is not displayed by the contact hole may be minimized.

In exemplary embodiments, when a portion of the second insulation layer is removed to form the second contact hole, the upper surface of the first capping pattern is sufficiently high by the first filling pattern, so that etching degree of the second insulating layer for exposing the first capping pattern is respectively small compared to a structure in which the first filling pattern does not exist. Accordingly, it is less likely that the pattern (e.g., the first capping pattern or the first pattern) will be damaged by over-etching of the second insulating layer.

In exemplary embodiments, the first filling pattern may be formed only by forming a photoresist layer and developing the photoresist layer without using an exposing process, and the first capping pattern may be pattern with the first pattern, so that manufacturing process may be simplified.

DETAILED DESCRIPTION

FIG. 1Ais a cross-sectional view illustrating a portion of a display apparatus according to an exemplary embodiment of the invention.FIG. 1Bis a plan view illustrating an upper surface of a capping pattern of the display apparatus ofFIG. 1A.

Referring toFIG. 1A, an exemplary embodiment of the display apparatus may include a base substrate100, a first conductive pattern CL1, a first insulation layer120, a first pattern PT1, a first filling pattern FP1, a first capping pattern CP1, a second insulation layer130, and a second conductive pattern CL2.

The base substrate100may be a transparent insulation substrate. In one exemplary embodiment, for example, the base substrate100may include or be a glass substrate, a quartz substrate or a transparent resin substrate, for example. In an embodiment, where the base substrate100is the transparent resin substrate, the base substrate100may include polyimide-based resin, acryl-based resin, polyacrylate-based resin, polycarbonate-based resin, polyether-based resin, sulfonic acid containing resin, or polyethyleneterephthalate-based resin, for example.

The first conductive pattern CL1may be disposed on the base substrate100. The first conductive pattern CL1may be a component of a circuit for transmitting a signal for driving pixels of the display apparatus. In one exemplary embodiment, for example, the first conductive pattern CL1may be a drain electrode of a thin film transistor.

The first insulation layer120may be disposed on the base substrate100on which the first conductive pattern CL1is disposed. The first insulation layer120may be disposed to cover the first conductive pattern CL1. The first insulation layer120may include or be formed using a silicon oxide or a metal oxide, for example. In one exemplary embodiment, for example, the first insulation layer120may include or be formed using silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy), aluminum oxide (AlOx), tantalum oxide (TaOx), hafnium oxide (HfOx), zirconium oxide (ZrOx) or titanium oxide (TiOx). Such materials may be used alone or in a combination thereof to form the first insulation layer120. In exemplary embodiments, the first insulation layer120may be uniformly provided or formed on the base substrate100along a profile of the first conductive pattern CL1. In such an embodiment, the first insulation layer120may have a substantially small thickness, such that a stepped portion may be defined at a portion of the first insulation layer120adjacent to the first conductive pattern CL1. In some exemplary embodiments, the first insulation layer120may have a relatively large thickness for sufficiently covering the first conductive pattern CL1, so that the first insulation layer120may have a substantially flat surface.

In some exemplary embodiment, the first insulation layer120may include or be formed using an organic insulation material. In one exemplary embodiment, for example, the first insulation layer120may include at least one of a photoresist, an acryl-based resin, a polyimide-based resin, a polyamide-based resin, a siloxane-based resin and a combination thereof.

A first contact hole CNT1may be defined or formed through the first insulation layer120to expose the first conductive pattern CL1. The first contact hole CNT1may have truncated cone shape in which lower end is narrower than the upper end, as shown inFIG. 1A. The first contact hole CNT1may have a first width at the lower end. The first width may be less than about 2 micrometers (μm).

The first pattern PT1may be disposed on the first insulation layer120through which the first contact hole CNT1is defined. The first pattern PT1may make contact with the first conductive pattern CL1through the first contact hole CNT1. The first pattern PT1may be a component of the circuit for transmitting the signal for driving the pixels of the display apparatus. In one exemplary embodiment, for example, the first pattern PT1may be a portion of a data pattern which includes a data line.

The first filling pattern FP1may be disposed on the first pattern PT1in the first contact hole CNT1. The first filling pattern FP1may include or be formed using an organic insulation material. In one exemplary embodiment, for example, the first filling pattern FP1may include a photoresist.

The first filling pattern FP1may fill a recess of the first pattern PT1formed by the first contact hole CNT1, so that a height of a lower surface of the first capping pattern CP1from the first conductive pattern CL1may be effectively prevented from being lowered.

The first capping pattern CP1may be disposed on the first pattern PT1on which the first filling pattern FP1is disposed. The first capping pattern CP1may be disposed to cover the first filling pattern FP1. The first capping pattern CP1may include or be formed using a metal, an alloy, a conductive metal oxide or a transparent conductive material, for example.

The second insulation layer130may be disposed on the first insulation layer120on which the first pattern PT1and the first capping pattern CP1are disposed. The second insulation layer130may be disposed to cover the first pattern PT1and the first capping pattern CP1. The second insulation layer130may include or be formed using a silicon oxide or a metal oxide, for example. In exemplary embodiments, the second insulation layer130may be entirely or uniformly disposed on the first insulation layer120. In some exemplary embodiments, the second insulation layer130may have a substantially small thickness, such that a stepped portion may be formed at a portion of the second insulation layer130adjacent to the first capping pattern CP1. In some exemplary embodiments, the second insulation layer130may have a relatively large thickness for sufficiently covering the first pattern PT1and the first capping pattern CP1, so that the first insulation layer120may have a substantially flat surface.

In some exemplary embodiment, the second insulation layer130may include or be formed using an organic insulation material.

A second contact hole CNT2exposing the first capping pattern CP1may be defined or formed through the second insulation layer130. The second contact hole CNT2may have a truncated cone shape in which lower end is narrower than the upper end. The second contact hole CNT2has a second width at the lower end. The second contact hole CNT2may overlap the first contact hole CNT1. In such an embodiment, the second width of the second contact hole CNT2may be greater than or equal to the first width of the first contact hole CNT1.

The second conductive pattern CL2may be disposed on the second insulation layer130at which the second contact hole CNT2is disposed. The second conductive pattern CL2may make contact with the first capping pattern CP1through the second contact hole CNT2. The second conductive pattern CL2may be a component of the circuit for transmitting the signal for driving the pixels of the display apparatus. In one exemplary embodiment, for example, the second conductive pattern CL2may be a portion of a pixel electrode which includes a transparent conductive material.

Referring toFIG. 1B, a contacting surface (shaded portion in the figure) of the first capping pattern CP1and the second conductive pattern CL2will hereinafter be described. The contacting surface may have a circular shape. The contacting surface may be smaller than or disposed within a boundary of the upper end of the first contact hole CNT1(dotted line in the figure). In some exemplary embodiment, the contacting surface may be greater than or equal to the boundary of the upper end of the first contact hole CNT1.

Although not shown in the figures, the display apparatus may further include an opposite substrate facing the base substrate, and a liquid crystal layer between the opposite substrate and the base substrate.

According to exemplary embodiments of the invention, as the first contact hole CNT1and the second contact hole CNT2are disposed to overlap each other, non-opening area where the image is not displayed by the contact hole is minimized, and an aperture ratio can be improved compared to a structure in which the contact holes do not overlap each other. Accordingly, a high-resolution display apparatus in which the size of a pixel is relatively small may be realized.

In such embodiments, the first filling pattern FP1may fill the recess of the first pattern PT1formed by the first contact hole CNT1, so that the first capping pattern CP1may be relatively flat. Accordingly, a contact area of the second conductive pattern CL2and the first capping pattern CP1through the second contact hole CNT2which overlaps the first contact hole CNT1may be secured.

In such embodiments, the first width of the first contact hole CNT1is smaller than or equal to the second width of the second contact hole CNT2, and the first width may be less than about 2 μm, so that a non-opening area where the image is not displayed by the contact hole may be minimized.

In such embodiments, when a portion of the second insulation layer130is removed to form the second contact hole CNT2, the upper surface of the first capping pattern CP1is sufficiently high by the first filling pattern FP1, so that etching degree of the second insulating layer130for exposing the first capping pattern CP1is respectively small compared to a structure in which the first filling pattern FP1does not exist. Accordingly, the pattern (e.g., the first capping pattern or the first pattern) may be effectively prevented from being damaged by over-etching of the second insulating layer130.

FIG. 2Ais a cross-sectional view illustrating a portion of a display apparatus according to an alternative exemplary embodiment of the invention.FIG. 2Bis a plan view illustrating an upper surface of a first pattern of the display apparatus ofFIG. 2A. The display apparatus shown inFIG. 2Amay be substantially the same as the display apparatus ofFIG. 1A, except that that the display apparatus does not include a first capping pattern. Thus, any repetitive detailed descriptions of same or like elements will be omitted or simplified.

Referring toFIG. 2A, an exemplary embodiment of the display apparatus may include a base substrate100, a first conductive pattern CL1, a first insulation layer120, a first pattern PT1, a first filling pattern FP1, a second insulation layer130and a second conductive pattern CL2.

The first conductive pattern CL1may be disposed on the base substrate100. The first insulation layer120may be disposed on the base substrate100on which the first conductive pattern CL1is disposed. The first insulation layer120may be disposed to cover the first conductive pattern CL1. A first contact hole CNT1may be defined or formed through the first insulation layer120to expose the first conductive pattern CL1. The first pattern PT1may be disposed on the first insulation layer120through which the first contact hole CNT1is formed. The first filling pattern FP1may be disposed on the first pattern PT1in the first contact hole CNT1.

The second insulation layer130may be disposed on the first insulation layer120on which the first pattern PT1is disposed. The second insulation layer130may be disposed to cover the first pattern PT1. A second contact hole CNT2exposing the first pattern PT1may be defined or formed through the second insulation layer130.

The second conductive pattern CL2may be disposed on the second insulation layer130through which the second contact hole CNT2is defined. The second conductive pattern CL2may make contact with the first pattern PT1through the second contact hole CNT2.

Referring toFIG. 2B, a contacting surface (shaded portion in the figure) of the first pattern PT1and the second conductive pattern CL2will hereinafter be described. The contacting surface may have a ring shape. An outer boundary of the contacting surface may be smaller than or disposed within a boundary of the upper end of the first contact hole CNT1(dotted line in the figure). In some exemplary embodiment, the outer boundary of the contacting surface may be greater than or equal to the boundary of the upper end of the first contact hole CNT1.

According to exemplary embodiments of the invention, the contacting surface of the first pattern PT1and the second conductive pattern CL2has the ring shape, the contact surface is smaller than that of the display device ofFIG. 1B, and smaller contact surface may be less desirable in terms of current holding. However, if voltage holding is relatively more important than the current holding like a liquid crystal display apparatus, the first capping pattern may be omitted as shown inFIG. 2A, to simplify the structure.

FIG. 3is a cross-sectional view illustrating a portion of a display apparatus according to another alternative exemplary embodiment of the invention. The display apparatus ofFIG. 3may be substantially the same as the display apparatus ofFIG. 2A, except that the display apparatus further includes a second pattern PT2, a second filling pattern FP2and a third insulation layer140. Thus, any repetitive detailed descriptions of the same or like elements will be omitted or simplified.

Referring toFIG. 3, an exemplary embodiment of the display apparatus may include a base substrate100, a first conductive pattern CL1, a first insulation layer120, a first pattern PT1, a first filling pattern FP1, a second insulation layer130, a second pattern PT2, a second filling pattern FP2, a third insulation layer140and a second conductive pattern CL2.

The first conductive pattern CL1may be disposed on the base substrate100. The first insulation layer120may be disposed on the base substrate100on which the first conductive pattern CL1is disposed. The first insulation layer120may be disposed to cover the first conductive pattern CL1. A first contact hole CNT1may be defined or formed through the first insulation layer120to expose the first conductive pattern CL1. The first pattern PT1may be disposed on the first insulation layer120through which the first contact hole CNT1is defined. The first filling pattern FP1may be disposed on the first pattern PT1in the first contact hole CNT1. The second insulation layer130may be disposed on the first insulation layer120on which the first pattern PT1and the first filling pattern FP1are disposed. The second insulation layer130may be disposed to cover the first pattern PT1and the first filling pattern FP1. A second contact hole CNT2exposing the first pattern PT1may be defined or formed through the second insulation layer130.

The second pattern PT2may be disposed on the second insulation layer130through which the second contact hole CNT2is defined. The second pattern PT2may make contact with the first pattern PT1through the second contact hole CNT2. The second pattern PT2may be a component of a circuit for transmitting a signal for driving pixels of the display apparatus. In one exemplary embodiment, for example, the second pattern PT2may be a portion of a data pattern including a signal line.

The second filling pattern FP2may be disposed on the second pattern PT2in the second contact hole CNT2. The second filling pattern FP2may include or be formed using an organic insulation material. In one exemplary embodiment, for example, the second filling pattern FP2may include a photoresist.

The third insulation layer140may be disposed on the second insulation layer130on which the second pattern PT2and the second filling pattern FP2are disposed. The third insulation layer140may be disposed to cover the second pattern PT2and the second filling pattern FP2. A third contact hole CNT3may be defined or formed through the third insulation layer140to expose the second pattern PT2.

The second conductive pattern CL2may be disposed on the third insulation layer140through which the third contact hole CNT3is defined. The second conductive pattern CL2may make contact with the second pattern PT2through the third contact hole CNT3.

Each of the first to third contact holes CNT1, CNT2and CNT3may have a truncated cone shape in which the lower end is narrower than the upper end. The first contact hole CNT1may have a first width at the lower end. The first width may be less than about 2 μm. The second contact hole CNT2may have a second width at the lower end. The third contact hole CNT3may have a third width at the lower end. In an exemplary embodiment, the second width may be greater than or equal to the first width. In such an embodiment, the third width may be greater than or equal to the second width.

FIG. 4is a cross-sectional view illustrating a portion of a display apparatus according to another alternative exemplary embodiment of the invention. The display apparatus ofFIG. 4may be substantially the same as the display apparatus ofFIG. 1A, except that that the display apparatus further include a second pattern PT2, a second capping pattern CP2, a second filling pattern FP2and a third insulation layer140. Thus, any repetitive detailed descriptions of the same or like elements will be omitted or simplified.

Referring toFIG. 4, an exemplary embodiment of the display apparatus may include a base substrate100, a first conductive pattern CL1, a first insulation layer120, a first pattern PT1, a first filling pattern FP1, a second insulation layer130, a second pattern PT2, a second capping pattern CP2, a second filling pattern FP2, a third insulation layer140and a second conductive pattern CL2.

The first conductive pattern CL1may be disposed on the base substrate100. The first insulation layer120may be disposed on the base substrate100on which the first conductive pattern CL1is disposed. The first insulation layer120may be disposed to cover the first conductive pattern CL1. A first contact hole CNT1may be defined or formed through the first insulation layer120to expose the first conductive pattern CL1. The first pattern PT1may be disposed on the first insulation layer120through which the first contact hole CNT1is formed. The first filling pattern FP1may be disposed on the first pattern PT1in the first contact hole CNT1. The first capping pattern CP1may be disposed on the first pattern PT1on which the first filling pattern FP1is disposed. The first capping pattern CP1may be disposed to cover the first filling pattern FP1. The second insulation layer130may be disposed on the first insulation layer120on which the first capping pattern CP1is disposed. The second insulation layer130may be disposed to cover the first capping pattern CP1. A second contact hole CNT2may be defined or formed through the second insulation layer130to expose the first capping pattern CP1.

The second pattern PT2may be disposed on the second insulation layer130through which the second contact hole CNT2is defined. The second pattern PT2may make contact with the first capping pattern CP1through the second contact hole CNT2. The second pattern PT2may be a component of a circuit for transmitting a signal for driving pixels of the display apparatus. In one exemplary embodiment, for example, the second pattern PT2may be a portion of a second data pattern including a signal line.

The second filling pattern FP2may be disposed on the second pattern PT2in the second contact hole CNT2. The second filling pattern FP2may include or be formed using an organic insulation material. In one exemplary embodiment, for example, the second filling pattern FP2may include a photoresist.

The second capping pattern CP2may be disposed on the second pattern PT2on which the second filling pattern FP2is disposed. The second capping pattern CP2may be disposed to cover the second filling pattern FP2. The second capping pattern CP2may include or be formed using a metal, alloy, a conductive metal oxide or a transparent conductive material, for example.

The third insulation layer140may be disposed on the second insulation layer130on which the second capping pattern CP2is disposed. The third insulation layer140may be disposed to cover the second capping pattern CP2. A third contact hole CNT3may be defined or formed through the third insulation layer140to expose the second pattern PT2.

The second conductive pattern CL2may be disposed on the third insulation layer140through which the third contact hole CNT3is defined. The second conductive pattern CL2may make contact with the second capping pattern CP2through the third contact hole CNT3.

Each of the first to third contact holes CNT1, CNT2and CNT3may have a truncated cone shape in which the lower end is narrower than the upper end. The first contact hole CNT1may have a first width at the lower end. The first width may be less than about 2 μm. The second contact hole CNT2may have a second width at the lower end. In an exemplary embodiment, the third contact hole CNT3may have a third width at the lower end. The second width may be greater than or equal to the first width. In such an embodiment, the third width may be greater than or equal to the second width.

FIG. 5is a cross-sectional view illustrating a portion of a display apparatus according to another alternative exemplary embodiment of the invention.

Referring toFIG. 5, an exemplary embodiment of the display apparatus may include a base substrate200, a buffer layer210, an active pattern ACT, a first insulation layer220, a gate pattern including a gate electrode GE, a second insulation layer230, a first data pattern, a third insulation layer240, a second data pattern including a first pattern PT1, a first filling pattern FP1, a first capping pattern CP1, a fourth insulation layer250, a color filter CF, a fifth insulation layer260, a common electrode CE, a sixth insulation layer270and a pixel electrode PE.

The base substrate200may include or be a transparent insulation substrate. In one exemplary embodiment, for example, the base substrate200may include a glass substrate, a quartz substrate or a transparent resin substrate.

The buffer layer210may be disposed on the base substrate200. In an exemplary embodiment, the buffer layer210may effectively prevent diffusion of metal atoms and/or impurities from the base substrate200. In such an embodiment, the buffer layer210may adjust heat transfer rate of a successive crystallization process for the active pattern ACT to be substantially uniform. In an exemplary embodiment, where the base substrate200may have a relatively irregular surface, the buffer layer210may improve flatness of the surface of the base substrate100or provide a flat surface on the base substrate100. The buffer layer210may include or be formed using a silicon compound. In an exemplary embodiment, the buffer layer210may have a single layer structure or a multi-layer structure.

The active pattern ACT may be disposed on the buffer layer210. The active pattern may include a source area and a drain area, each of which is impurity-doped area, and the active pattern may further include a channel area between the source area and the drain area.

The first insulation layer220may be disposed on the buffer layer210on which the active pattern ACT is disposed. The first insulation layer220may be to cover the active pattern ACT. The first insulation layer220may include an organic insulation material or inorganic insulation material.

The gate pattern may be disposed on the first insulation layer220. The gate pattern may include or be formed using a metal, alloy, a metal nitride, a conductive metal oxide or a transparent conductive material, for example. The gate pattern may include the gate electrode GE which overlaps the active pattern ACT and a signal line for transmitting a signal to drive pixels, such as a gate line.

The second insulation layer230may be disposed on the first insulation layer220on which the gate pattern is disposed. The second insulation layer230may be disposed to cover the gate pattern. The second insulation layer230may include an organic insulation material or inorganic insulation material.

The first data pattern (not shown) may be disposed on the second insulation layer230. The first data pattern may include a signal line for transmitting a signal to drive the pixels.

The third insulation layer240may be disposed on the second insulation layer230on which the first data pattern is disposed. The third insulation layer240may be disposed to cover the first data pattern. The third insulation layer240may include an organic insulation material or inorganic insulation material.

A first contact hole CNT1may be defined or formed through the first to third insulation layers220,230and240. The first contact hole CNT1may expose the drain electrode of the active pattern ACT. The first contact hole CNT1may have truncated cone shape in which the lower end is narrower than the upper end. The first contact hole CNT1may have a first width at the lower end. The first width may be less than about 2 μm.

The second data pattern may be disposed on the third insulation layer240. The second data pattern may include or be formed using a metal, an alloy, a metal nitride, a conductive metal oxide or a transparent conductive material, for example. The second data pattern may include the first pattern PT1.

The first pattern PT1may make contact with the drain area of the active pattern ACT through the first contact hole CNT1.

The first filling pattern FP1may be disposed on the first pattern PT1in the first contact hole CNT1. The first filling pattern FP1may include or be formed using an organic insulation material. In one exemplary embodiment, for example, the first filling pattern FP1may include a photoresist.

The first filling pattern FP1may fill a recess of the first pattern PT1formed by the first contact hole CNT1, so that a height of a lower surface of the first capping pattern CP1from the active pattern ACT may be increased.

The first capping pattern CP1may be disposed on the first pattern PT1on which the first filling pattern FP1is disposed. The first capping pattern CP1may be disposed to cover the first filling pattern FP1. The first capping pattern CP1may include or be formed using a metal, an alloy, a metal nitride, a conductive metal oxide or a transparent conductive material, for example.

The fourth insulation layer250may be disposed on the third insulation layer240on which the first capping pattern CP1is disposed. The fourth insulation layer250may be disposed to cover the first capping pattern CP1. The forth insulation layer250may include an organic insulation material or inorganic insulation material.

The color filter CF may be disposed on the fourth insulation layer250. The color filter CF may provide a color to light passing therethrough. The color filter CF may be a red color filter, a green color filter or a blue color filter. The color filter CF may be disposed to overlap or to correspond to each of the pixels, and may be disposed to have different color corresponding to pixels adjacent each other. The color filter CF may overlap or spaced apart from adjacent color filter at a boundary of pixels.

The fifth insulation layer260may be disposed on the fourth insulation layer250on which the color filter CF is disposed. The fifth insulation layer260may be disposed to cover the color filter CF. The fifth insulation layer260may include an organic insulation material or inorganic insulation material.

The common electrode CE may be disposed on the fifth insulation layer260and overlap the color filter CF. The common electrode CE may include a transparent conductive material. In one exemplary embodiment, for example, the common electrode CE may include indium tin oxide (“ITO”), indium zinc oxide (“IZO”), etc.

The sixth insulation layer270may be disposed on the fifth insulation layer260on which the common electrode CE is disposed. The sixth insulation layer270may be disposed to cover the common electrode CE. The sixth insulation layer270may include an organic insulation material or inorganic insulation material.

A second contact hole CNT2may be defined or formed through the fourth to sixth insulation layers250,260and270. The second contact hole CNT2may expose the first capping pattern CP1. The second contact hole CNT2may have truncated cone shape in which the lower end is narrower than the upper end. The second contact hole CNT2has a second width at the lower end. The second contact hole CNT2may overlap the first contact hole CNT1. In such an embodiment, the second width of the second contact hole CNT2may be greater than or equal to the first width of the first contact hole CNT1.

The pixel electrode PE may be disposed on the sixth insulation layer270. The pixel electrode PE may be electrically connected to the first capping pattern CP1through the second contact hole CNT2.

Although not shown in the figures, the display apparatus may include an opposite substrate facing the base substrate, and a liquid crystal layer between the base substrate and the opposite substrate.

FIG. 6is a cross-sectional view illustrating a portion of a display apparatus according to another alternative exemplary embodiment of the invention. The display apparatus ofFIG. 6may be substantially the same as the display apparatus ofFIG. 5, except that that the display apparatus does not include a first capping pattern. Thus, any repetitive detailed descriptions of the same or like elements will be omitted or simplified.

Referring toFIG. 6, an exemplary embodiment of the display apparatus may include a base substrate200, a buffer layer210, an active pattern ACT, a first insulation layer220, a gate pattern including a gate electrode GE, a second insulation layer230, a first data pattern, a third insulation layer240, a second data pattern including a first pattern PT1, a first filling pattern FP1, a fourth insulation layer250, a color filter CF, a fifth insulation layer260, a common electrode CE, a sixth insulation layer270and a pixel electrode PE.

The buffer layer210may be disposed on the base substrate200. The active pattern ACT may be disposed on the buffer layer210. The first insulation layer220may be disposed on the buffer layer210on which the active pattern ACT is disposed. The first insulation layer220may be disposed to cover the active pattern ACT. The gate pattern including the gate electrode GE may be disposed on the first insulation layer220. The second insulation layer230may be disposed on the first insulation layer220on which the gate pattern is disposed. The second insulation layer230may be disposed to cover the gate pattern. The first data pattern (not shown) may be disposed on the second insulation layer230. The third insulation layer240may be disposed on the second insulation layer230on which the first data pattern is disposed. The third insulation layer240may be disposed to cover the first data pattern. A first contact hole CNT1may be defined or formed through the first to third insulation layers220,230and240.

The second data pattern including the first pattern PT1may be disposed on the third insulation layer240. The first pattern PT1may make contact with the active pattern ACT, e.g., the drain area thereof, through the first contact hole CNT1. The first filling pattern FP1may be disposed on the first pattern PT1in the first contact hole CNT1.

The fourth insulation layer250may be disposed on the third insulation layer240on which the first pattern PT1is disposed. The fourth insulation layer250may be disposed to cover the first pattern PT1. The first color filter CF may be disposed on the fourth insulation layer250. The fifth insulation layer260may be disposed on the fourth insulation layer250on which the color filter CF is disposed. The fifth insulation layer260may be disposed to cover the color filter CF. The common electrode CE may be disposed on the fifth insulation layer260. The sixth insulation layer270may be disposed on the fifth insulation layer260on which the common electrode CE is disposed. The sixth insulation layer270may be disposed to cover the common electrode CE.

The second contact hole CNT2may be defined or formed through the fourth to sixth insulation layers250,260and270. The second contact hole CNT2may expose the first pattern PT1. The second contact hole CNT2may have truncated cone shape whose lower end is narrower than the upper end. The second contact hole CNT2has a second width at the lower end. The second contact hole CNT2may overlap the first contact hole CNT1. In such an embodiment, the second width of the second contact hole CNT2may be greater than or equal to the first width of the first contact hole CNT1.

The pixel electrode PE may be disposed on the sixth insulation layer270. The pixel electrode PE may be electrically connected to the first pattern PT1through the second contact hole CNT2.

Although not shown in figures, the display apparatus may include an opposite substrate facing the base substrate, and a liquid crystal layer between the base substrate and the opposite substrate.

FIGS. 7A to 7Iare cross-sectional views illustrating an exemplary embodiment of a method of manufacturing the display apparatus ofFIG. 1A.

Referring toFIG. 7A, a first conductive pattern CL1may be provided or formed on a base substrate100. A first insulation layer120may be provided or formed on the base substrate100on which the first conductive pattern CL1is provided. The first insulation layer120may be formed to cover the first conductive pattern CL1.

A first contact hole CNT1may be formed through the first insulation layer120. In an exemplary embodiment, a photoresist may be formed on the first insulation layer120, and then the first insulation layer120may be partially etched after exposing and developing the photoresist using a mask, such that the first contact hole CNT1may be formed.

Referring toFIG. 7B, a first pattern layer PT1amay be provided or formed on the first insulation layer120through which the first contact hole CNT1is formed.

Referring toFIG. 7C, a first filling pattern layer FP1amay be provided or formed on the first pattern layer PT1a. The first filling pattern layer FP1amay be formed using an organic insulation material. In one exemplary embodiment, for example, the first filling pattern layer FP1amay be formed by coating a negative type photoresist on the first pattern layer PT1a. The first filling pattern layer FP1amay be formed to have a thickness enough to fill a recess formed in the first pattern layer PT1aby the first contact hole CNT1.

Referring toFIG. 7D, a first filling pattern FP1may be formed by removing a portion the first filling pattern layer FP1a. In an exemplary embodiment, where the first filling pattern layer FP1aincludes a negative type photoresist, the first pattern layer PT1aexcept for the first filling pattern FP1may be removed by a developing process without using an exposure process.

In some exemplary embodiment, the first filling pattern FP1may be formed by an exposure process using a mask and developing process of the first filling pattern layer FP1a.

Referring toFIG. 7E, a first capping pattern layer CP1amay be provided or formed on the first pattern layer PT1aon which the first filling pattern FP1is formed. The first capping pattern layer CP1amay be formed to cover the first filling pattern FP1.

Referring toFIG. 7F, the first capping pattern layer CP1aand the first pattern layer PT1amay be patterned by a same photolithography process or a same etching process using an etching mask. Accordingly, the first capping pattern CP1and the first pattern PT1may be obtained.

Referring toFIG. 7G, a second insulation layer130may be provided or formed on the first insulation layer120on which the first capping pattern CP1is provided. The second insulation layer130may be formed to cover the first capping pattern CP1. In such an embodiment, a photoresist layer PR may be provided or formed on the second insulation layer130, and the photoresist layer PR may be exposed by an exposing process using a mask and developed by a developing process, so that a portion of the second insulation layer130where a second contact hole CNT2will be formed may be exposed. Here, a size of a pattern shape of the mask for forming the second contact hole CNT2may be greater than or equal to a size of a pattern shape of the mask for forming the first contact hole CNT1.

Referring toFIG. 7H, a portion of the second insulation layer130may be etched using the photoresist layer PR as a mask to form the second contact hole CNT2.

Referring toFIG. 7I, a second conductive pattern CL2may be provided or formed on the second insulation layer130through which the second contact hole CNT2is formed, and a liquid crystal layer may be provided or formed between an opposite substrate facing the base substrate100and the base substrate100, so that the display apparatus may be manufactured.

FIGS. 8A to 8Fare cross-sectional views illustrating an exemplary embodiment of a method of manufacturing the display apparatus ofFIG. 2A. The method shown inFIGS. 8A to 8Fmay be substantially the same as the method ofFIGS. 7A to 7I, except that the method does not include a process of providing the first capping pattern. Thus, any repetitive detailed descriptions concerning the same or like elements will be omitted or simplified.

Referring toFIG. 8A, a first conductive pattern CL1may be provided or formed on a base substrate100. A first insulation layer120may be provided or formed on the base substrate100on which the first conductive pattern CL1is provided. The first insulation layer120may be formed to cover the first conductive pattern CL1. A first contact hole CNT1may be formed through the first insulation layer120. A first pattern PT1may be provided or formed on the first insulation layer120through which the first contact hole CNT1is formed.

In an embodiment, a conductive layer may be formed on the first insulation layer120, and then the conductive layer may be patterned by a photolithography process or an etching process using an etching mask. In such an embodiment, the first pattern PT1may be obtained by patterning the conductive layer.

Referring toFIG. 8B, a first filling pattern layer FP1amay be provided or formed on the first pattern layer PT1.

Referring toFIG. 8C, a first filling pattern FP1may be formed by removing a portion of the first filling pattern layer FP1a.

Referring toFIG. 8D, a second insulation layer130may be provided or formed on the first insulation layer120on which the first filling pattern FP1is formed. The second insulation layer130may be formed to cover the first filling pattern FP1. In an embodiment, a photoresist layer PR may be formed on the second insulation layer130. And then, the photoresist layer PR may be exposed using a mask and developed, so that a portion of the second insulation layer130to be removed is exposed to from a second contact hole CNT2.

Referring toFIG. 8E, a portion of the second insulation layer130may be etched using the photoresist layer PR to form the second contact hole CNT2.

Referring toFIG. 8F, a second conductive pattern CL2may be provided or formed on the second insulation layer130through which the second contact hole CNT2is formed. The second conductive pattern CL2is provided in the second contact hold CNT2. And then, a liquid crystal layer may be provided or formed between an opposite substrate facing the base substrate100and the base substrate100, so that the display apparatus may be manufactured.

FIGS. 9A to 9Jare cross-sectional views illustrating an exemplary embodiment of a method of manufacturing the display apparatus ofFIG. 5.

Referring toFIG. 9A, a buffer layer210may be provided or formed on a base substrate200. The buffer layer210may be formed by a spin coating process, a chemical vapor deposition (“CVD”) process, a plasma enhanced chemical vapor deposition (“PECVD”) process, a high density plasma-chemical vapor deposition (“HDP-CVD”) process or a printing process, for example.

In such an embodiment, an active pattern ACT may be provided or formed on the buffer layer210.

In such an embodiment, a semiconductor layer (not illustrated) may be formed on the buffer layer210, and then a preliminary active layer (not illustrated) may be formed on the buffer layer210by patterning the semiconductor layer. In such an embodiment, the crystallization process may be performed for the preliminary active layer to form the active pattern ACT on the buffer layer210. In such an embodiment, the semiconductor layer may be formed by a CVD process, a PECVD process, a low pressure chemical vapor deposition (“LPCVD”) process, a sputtering process or a printing process, for example. In an embodiment, where the semiconductor layer includes an amorphous silicon, the active pattern ACT may include a polysilicon. The crystallization process for forming the active pattern ACT may include a laser irradiation process, a thermal treatment process, or a thermal process utilizing a catalyst, for example. In some exemplary embodiments, a dehydrogenation process may be performed for the semiconductor layer and/or the preliminary active layer after forming the semiconductor layer and/or the preliminary active layer on the buffer layer210. The dehydrogenation process may reduce the hydrogen concentration of the semiconductor layer and/or the preliminary active layer, so that the active pattern ACT may have improved electrical characteristics.

In such an embodiment, a first insulation layer220may be provided or formed on the buffer layer210on which the active pattern ACT is formed. The first insulation layer220may be formed to cover the active pattern ACT. The first insulation layer220may be formed by a CVD process, a spin coating process, a PECVD process, a sputtering process, a vacuum evaporation process, an HDP-CVD process or a printing process, for example.

In such an embodiment, a gate pattern including a gate electrode GE may be provided or formed on the first insulation layer220. A conductive layer may be formed on the first insulation layer220, and then the conductive layer may be patterned by a photolithography process or an etching process using an additional etching mask such that the gate pattern may be obtained by patterning the conductive layer. In such an embodiment, the conductive layer may be formed by a printing process, a sputtering process, a CVD process, a pulsed laser deposition (“PLD”) process, a vacuum evaporation process or an atomic layer deposition (“ALD”) process, for example.

In an embodiment, a second insulation layer230may be provided or formed on the first insulation layer220. A first data pattern (not shown in figures) may be provided or formed on the second insulation layer230. A third insulation layer240may be provided or formed on the second insulation layer230on which the first data pattern is provided. The third insulation layer240may be formed to cover the first data pattern. A first contact hole CNT1may be formed through the first to third insulation layer220,230and240.

Referring toFIG. 9B, a first pattern layer PT1amay be formed on the third insulation layer240and in the first contact hole CNT1formed therethrough.

Referring toFIG. 9C, a first filling pattern layer FP1amay be provided or formed on the first pattern layer PT1a. The first filling pattern layer FP1amay include or be formed using an organic insulation material. In one exemplary embodiment, for example, the first filling pattern layer FP1amay be formed by coating a negative type photoresist on the first pattern layer PT1a. The first filling pattern layer FP1amay be formed to have a predetermined thickness, which is great enough to fill a recess formed in the first pattern layer PT1aby the first contact hole CNT1.

Referring toFIG. 9D, a first filling pattern FP1may be formed by removing a portion the first filling pattern layer FP1a. In an embodiment, where the first filling pattern layer FP1aincludes a negative type photoresist, the first pattern layer PT1aexcept for the first filling pattern FP1may be removed by a developing process without using an exposure process.

In some exemplary embodiment, the first filling pattern FP1may be formed by an additional exposure process using a mask and developing process of the first filling pattern layer FP1a.

Referring toFIG. 9E, a first capping pattern layer CP1amay be provided or formed on the first pattern layer PT1aon which the first filling pattern FP1is formed. The first capping pattern layer CP1amay be formed to cover the first filling pattern FP1.

Referring toFIG. 9F, the first capping pattern layer CP1aand the first pattern layer PT1amay be simultaneously patterned by a photolithography process or an etching process using an etching mask, such that the first capping pattern CP1and the first pattern PT1may be obtained.

Referring toFIG. 9G, a fourth insulation layer250may be provided or formed on the third insulation layer240on which the first capping pattern CP1is formed. The fourth insulation layer250may be formed to cover the first capping pattern CP1. A color filter CF may be provided or formed on the fourth insulation layer250. A fifth insulation layer260may be provided or formed on the fourth insulation layer250on which the color filter CF is formed. The fifth insulation layer260may be formed to cover the color filter CF. A common electrode CE may be provided or formed on the fifth insulation layer260to overlap the color filter CF. A sixth insulation layer270may be provided or formed on the fifth insulation layer260on which the color filter CF is formed. The sixth insulation layer270may be formed to cover the color filter CF.

Referring toFIG. 9H, a photoresist layer PR may be provided or formed on the sixth insulation layer270. And then, the photoresist layer PR may be exposed by exposing process using a mask and developing process, so that a portion of the sixth insulation layer270to be removed is exposed to form a second contact hole CNT2. In such an embodiment, a size of a pattern shape of the mask for forming the second contact hole CNT2may be greater than or equal to a size of a pattern shape of the mask for forming the first contact hole CNT1.

Referring toFIG. 9I, a portion of the fourth to sixth insulation layers250,260and270may be etched using the photoresist layer PR as a mask to form the second contact hole CNT2.

Referring toFIG. 9J, a pixel electrode PE may be provided or formed on the sixth insulation layer270through which the second contact hole CNT2is formed. And then, a liquid crystal layer may be provided or formed between an opposite substrate facing the base substrate200and the base substrate200, so that the display apparatus may be manufactured.

In such an embodiment, the first filling pattern FP1may be formed only by forming a photoresist layer and developing the photoresist layer without using an exposing process, and the first capping pattern CP1may be pattern with the first pattern PT1, so that manufacturing process may be simplified.

FIGS. 10A to 10Iare cross-sectional views illustrating an exemplary embodiment of a method of manufacturing the display apparatus ofFIG. 6. The method shown inFIGS. 10A to 10Imay be substantially same as the method ofFIGS. 9A to 9J, except that the method does not include forming a first capping pattern. Thus, any repetitive detailed descriptions concerning the same elements will be omitted or simplified.

Referring toFIG. 10A, in an exemplary embodiment of a method of manufacturing the display apparatus, a buffer layer210may be provided or formed on a base substrate200. An active pattern ACT may be provided or formed on the buffer layer210. A first insulation layer220may be provided or formed on the buffer layer210on which the active pattern ACT is formed. The first insulation layer220may be formed to cover the active pattern ACT. A gate pattern including a gate electrode GE may be provided or formed on the first insulation layer220. A second insulation layer230may be provided or formed on the first insulation layer220on which the gate pattern is formed. The second insulation layer230may be formed to cover the gate pattern. A first data pattern (not shown in figures) may be provided or formed on the second insulation layer230. A third insulation layer240may be provided or formed on the second insulation layer230on which the first data pattern is formed. The third insulation layer240may be formed to cover the first data pattern. A first contact hole CNT1may be formed through the first to third insulation layers220,230and240.

Referring toFIG. 10B, a first pattern PT1may be provided or formed on the third insulation layer240through which the first contact hole CNT1is formed. A conductive layer may be provided or formed on the third insulation layer240, and then the conductive layer may be patterned by a photolithography process or an etching process using an etching mask. Hence, the first capping pattern CP1and the first pattern PT1may be obtained.

Referring toFIG. 10C, a first filling pattern layer FP1amay be provided or formed on the first pattern PT1.

Referring toFIG. 10D, a first filling pattern FP1may be formed by removing a portion of the first filling pattern layer FP1a.

Referring toFIG. 10E, a fourth insulation layer250may be provided or formed on the third insulation layer240through which the first filling pattern FP1is formed. A color filter CF may be provided or formed on the fourth insulation layer250. A fifth insulation layer260may be provided or formed on the fourth insulation layer250on which the color filter CF is formed. The fifth insulation layer260may be formed to cover the color filter CF. A common electrode CE may be provided or formed on the fifth insulation layer260to overlap the color filter CF. A sixth insulation layer270may be provided or formed on the fifth insulation layer260on which the color filter CF is formed. The sixth insulation layer270may be formed to cover the color filter CF.

Referring toFIG. 10F, a photoresist layer PR may be provided or formed on the sixth insulation layer270. And then, the photoresist layer PR may be exposed by exposing process using a mask and developing process, so that a portion of the sixth insulation layer270to be removed to from a second contact hole CNT2can be exposed through the photoresist layer PR. Here, a size of a pattern shape of the mask for forming the second contact hole CNT2may be greater than or equal to a size of a pattern shape of the mask for forming the first contact hole CNT1.

Referring toFIG. 10G, a second contact hole CNT2may be formed by etching the fourth to sixth insulation layers250,260and270using the photoresist layer PR.

Referring toFIG. 10H, the photoresist layer PR may be removed.

Referring toFIG. 10I, a pixel electrode PE may be provided or formed on the sixth insulation layer270through which the second contact hole CNT2is formed. And then, a liquid crystal layer may be provided or formed between an opposite substrate facing the base substrate200and the base substrate200, so that the display apparatus may be manufactured.

According to exemplary embodiments of the invention, as the first contact hole and the second contact hole are disposed to overlap each other, non-opening area where the image is not displayed by the contact hole is minimized, and an aperture ratio may be improved or increased compared to a conventional, structure that the contact holes do not overlap each other. Accordingly, a high-resolution display apparatus, in which the size of each pixel, is relatively small may be realized.

In exemplary embodiments, the first filling pattern may fill the recess of the first pattern formed by the first contact hole, so that the first capping pattern may be formed to have a relatively flat surface. Accordingly, contact area of the second conductive pattern and the first capping pattern through the second contact hole, which overlaps the first contact hole, may be secured.

In exemplary embodiments, the first width of the first contact hole is smaller than or equal to the second width of the second contact hole, and the first width may be less than about 2 μm, so that a non-opening area where the image is not displayed and the contact hole is located may be minimized.

In exemplary embodiments, when a portion of the second insulation layer is removed to form the second contact hole, the upper surface of the first capping pattern is sufficiently high by the first filling pattern, so that etching degree of the second insulating layer for exposing the first capping pattern is respectively small compared to a conventional structure in which the first filling pattern does not exist. Accordingly, it is less likely that the pattern (e.g., the first capping pattern or the first pattern) will be damaged by over-etching of the second insulating layer.

In exemplary embodiments, the first filling pattern may be formed only by forming a photoresist layer and developing the photoresist layer without an additional exposing process, and the first capping pattern may be pattern with the first pattern, so that manufacturing process may be minimized.