Liquid crystal display wherein a first electrode of a second pixel is located entirely below a second electrode that extends across a first pixel to the second pixel

A liquid crystal display comprises a first pixel electrode located in a first pixel, a second pixel electrode located in a second pixel, and a common electrode. The common electrode used for displaying a video is located across the first pixel and the second pixel disposed adjacent to each other.

BACKGROUND OF THE INVENTION

Field of the Invention

The present invention relates to an active-matrix liquid crystal display.

Description of the Background Art

In recent times, flat panel displays (FPDs), such as liquid crystal displays, having advantages of light weight, low profile, and low power consumption have been used in various pieces of equipment such as televisions, car navigation systems, and computers.

Demand for display quality of liquid crystal displays has been growing every year. Thus, the technique for achieving high contrast and a wide viewing angle has been mainly adopted as the recent technique for driving the liquid crystal display.

Specifically, producers of liquid crystals that adopt the in-plane switching (IPS) as the technique for driving the liquid crystal display are on the increase because of high display quality. However, the IPS liquid crystal display is poor in productivity. Thus, it is absolutely necessary to improve yields of the IPS liquid crystal display.

The conventional IPS liquid crystal display includes two substrates facing each other. The two substrates are maintained at a fixed interval by a spacer. The two substrates include a liquid crystal layer located therebetween. One of the two substrates is a TFT substrate. The other of the two substrates is a counter substrate.

The TFT substrate includes a plurality of thin film transistors and a common electrode. An electric charge stored between a pixel electrode and the common electrode controls the alignment of liquid crystal molecules in the TFT substrate. The common electrode serving as a conductive film is a transparent electrode. The transparent electrode is made of, for example, indium tin oxide (ITO) or indium zinc oxide (IZO).

The counter substrate is a color filter substrate that functions as a color filter. The counter substrate includes a black matrix, a color material layer, an organic film layer, and a columnar spacer. The black matrix is made of a material that does not allow light to pass therethrough. For example, the black matrix is located around a display region for displaying a video. The IPS liquid crystal display does not include the conductive film on the counter substrate in general.

As described above, the IPS liquid crystal display includes the pixel electrode and the common electrode on the TFT substrate. The IPS liquid crystal display generates an electric field in a direction parallel to the main surface of the TFT substrate. Thus, the liquid crystal molecules can be moved in a lateral direction. Consequently, the wide viewing angle is achieved in the IPS liquid crystal display.

An IPS-fringe field switching (FFS) serves as a driving technique that is the more advanced IPS. Hereinafter, the IPS-FFS is simply referred to as “FFS”.

The FFS is different from the IPS mainly in that the FFS includes the pixel electrode and the common electrode in different layers. Further, the pixel electrode and the common electrode include an insulating film located therebetween. The FFS liquid crystal display generates an electric field in a horizontal direction parallel to the main surface of the TFT substrate at the time of application of voltage. Consequently, higher contrast and a wider viewing angle are achieved in the FFS liquid crystal display.

Various techniques have been developed for the FFS liquid crystal display. Japanese Patent Application Laid-Open No. 2009-092930 discloses a technique for improving image quality (hereinafter also referred to as a “related art A”) in the FFS liquid crystal display. Japanese Patent Application Laid-Open No. 2007-264080 discloses a technique for suppressing crosstalk (hereinafter also referred to as a “related art B”) in the FFS liquid crystal display.

However, the related arts A, B have problems below. Specifically, the liquid crystal displays in the related arts A, B have a complicated configuration in which both of the pixel electrode and the common electrode (counter electrode) in two adjacent pixels are formed in different layers. The pixel electrode and the common electrode are used for displaying a video. In other words, the two electrodes used for displaying the video in the two adjacent pixels have the configurations with a high degree of complexity in the related arts A, B.

Thus, the number of steps of manufacturing a liquid crystal display and a manufacturing cost of the liquid crystal display are high in the related arts A, B. To reduce the manufacturing cost of the liquid crystal display, the two electrodes used for displaying the video in the two adjacent pixels need to have the configurations with a lower degree of complexity.

SUMMARY OF THE INVENTION

It is an object of the present invention to provide a liquid crystal display that suppresses a degree of complexity of configurations of two electrodes used for displaying a video in two adjacent pixels.

A liquid crystal display according to one aspect of the present invention includes a display region for displaying a video. The display region includes a plurality of pixels arranged in matrix. The liquid crystal display comprises a first electrode located in each of the plurality of pixels and a second electrode. The first electrode and the second electrode are used for displaying the video. Each of the plurality of pixels is one of a first pixel and a second pixel having different configurations. The first pixel and the second pixel are disposed adjacent to each other. The second electrode is located across the first pixel and the second pixel. The first electrode of the first pixel is located over the second electrode. A first insulating film is provided between the first electrode and the second electrode in the first pixel. The first electrode of the second pixel is located below the second electrode. A second insulating film is provided between the first electrode and the second electrode in the second pixel.

According to the present invention, the second electrode used for displaying the video is located across the first pixel and the second pixel disposed adjacent to each other. In other words, at least the second electrode is formed in the same layer across the first pixel and the second pixel.

Therefore, the liquid crystal display that suppresses the degree of complexity of the configurations of the two electrodes used for displaying the video in the two adjacent pixels can be provided.

DESCRIPTION OF THE PREFERRED EMBODIMENT

A preferred embodiment according to the present invention will be described below with reference to the drawings. In the following drawings, the same components have the same reference numerals. The names and functions of the components denoted by the same reference numerals are also the same. Accordingly, detailed descriptions of some of the components denoted by the same reference numerals will be omitted in some cases.

Dimensions, materials, shapes, and relative positions of the components shown as an example in the preferred embodiment may be changed suitably depending on a structure of an apparatus to which the present invention is applied and various conditions. The dimensions of the components in each drawing may be different from actual dimensions.

First Preferred Embodiment

FIG. 1is a cross-sectional view showing a liquid crystal display500according to a first preferred embodiment of the present invention. The liquid crystal display500is an active-matrix liquid crystal display. The liquid crystal display500is also an FFS liquid crystal display.

The FFS liquid crystal display, which will be described below in detail, includes an insulating film between a pixel electrode described below and a common electrode described below. In other words, the FFS liquid crystal display has a structure in which the pixel electrode and the common electrode are located in different layers. Thus, the FFS liquid crystal display has advantages below in comparison with the IPS liquid crystal display. The advantages are, for example, high contrast, a wide viewing angle, and a high transmittance.

InFIG. 1, an X direction, a Y direction, and a Z direction are orthogonal to one another. The X direction, the Y direction, and the Z direction in the following drawings are also orthogonal to one another. Hereinafter, a direction including the X direction and a direction (−X direction) opposite to the X direction is also referred to as an “X-axis direction”. Hereinafter, a direction including the Y direction and a direction (−Y direction) opposite to the Y direction is also referred to as a “Y-axis direction”. Hereinafter, a direction including the Z direction and a direction (−Z direction) opposite to the Z direction is also referred to as a “Z-axis direction”.

Hereinafter, a plane including the X-axis direction and the Y-axis direction is also referred to as an “XY plane”. Hereinafter, a plane including the X-axis direction and the Z-axis direction is also referred to as an “XZ plane”. Hereinafter, a plane including the Y-axis direction and the Z-axis direction is also referred to as a “YZ plane”.

FIG. 2is a plan view showing a configuration of a below-mentioned substrate110included in the liquid crystal display500according to the first preferred embodiment of the present invention.

With reference toFIGS. 1 and 2, the liquid crystal display500includes a liquid crystal display panel100, a backlight unit BL1, and an optical film LF1.

The liquid crystal display panel100displays a video. The liquid crystal display panel100in this preferred embodiment is a FFS liquid crystal display panel100. Hereinafter, a side of the liquid crystal display panel100from which the video is displayed is also referred to as a “visible side”. Hereinafter, a side of the liquid crystal display panel100from which the video is not displayed is also referred to as a “non-visible side”.

The backlight unit BL1emits light used by the liquid crystal display panel100to display the video. The backlight unit BL1is located on the non-visible side of the liquid crystal display panel100. The optical film LF1is located between the liquid crystal display panel100and the backlight unit BL1. The optical film LF1is formed of, for example, a phase difference plate.

Hereinafter, the light emitted from the backlight unit BL1is also referred to as “light La”. The light La is transmitted from the backlight unit BL1in the Z-axis direction. The liquid crystal display panel100uses the light La emitted from the backlight unit BL1to display the video.

The liquid crystal display500further includes a case (not shown). The case is made of, for example, resin or metal. The case of the liquid crystal display500accommodates components included in the liquid crystal display500. Examples of the components include the liquid crystal display panel100, the backlight unit BL1, and the optical film LF1.

The liquid crystal display panel100includes a substrate110, a substrate120, and a liquid crystal layer30. The substrate110and the substrate120each have translucency. The substrate110is an array substrate having a configuration for controlling the liquid crystal layer30. The substrate120is located on the visible side of the liquid crystal display panel100. The substrate120is a color filter substrate from which the light passing through the substrate120is emitted as colored light. Examples of the colored light include red light, green light, and blue light.

The substrate110and the substrate120are bonded to each other with a sealing material SL1. In other words, the liquid crystal display panel100has a structure in which the substrate110and the substrate120are bonded to each other with the sealing material SL1. That is to say, the substrate120is a counter substrate facing the substrate110. The sealing material SL1has a closed-loop shape in a plan view (XY plane).

The liquid crystal layer30includes a plurality of liquid crystal molecules31. AlthoughFIG. 1only shows the two liquid crystal molecules31to make the configuration easy to see, the liquid crystal layer30actually includes extremely many liquid crystal molecules31. The liquid crystal layer30is sealed in a region (space) formed by the substrate110, the substrate120, and the sealing material SL1.

The liquid crystal display panel100includes a display region Rg1and a peripheral region Rg2. The display region Rg1allows the video to be displayed by the liquid crystal display panel100(liquid crystal display500) in the plan view (XY plane). The display region Rg1includes a plurality of pixels Px arranged in matrix in the plan view (XY plane). The liquid crystal display panel100displays the video by using the plurality of pixels Px.

The peripheral region Rg2is located around the display region Rg1in the plan view (XY plane). Specifically, the peripheral region Rg2surrounds the display region Rg1in the plan view (XY plane). The peripheral region Rg2has a closed-loop shape in the plan view (XY plane).

In addition, the display region Rg1and the peripheral region Rg2are also applied to the space in which the liquid crystal display panel100is formed and to the XY plane, the XZ plane, and the YZ plane in the space, similarly to the liquid crystal display panel100.

In other words, the display region Rg1and the peripheral region Rg2are also applied to each of the components (such as the substrate110, the substrate120, and the liquid crystal layer30) forming the liquid crystal display panel100, similarly to the liquid crystal display panel100. Thus, as shown inFIGS. 1 and 2, for example, the substrate110of the liquid crystal display panel100includes the display region Rg1and the peripheral region Rg2.

Next, the substrate110serving as the array substrate is described in detail. With reference toFIGS. 1 and 2, the substrate110includes a plurality of gate lines GL, a plurality of source lines SL, a transparent substrate111, a plurality of switching elements SW1, a plurality of pixel electrodes GE, a common electrode CE1, a plurality of common lines CL (not shown), a polarizing plate65a, and an alignment film112.

FIG. 2shows the three gate lines GL and the three source lines SL to make the configuration easy to see. However, the substrate110actually includes n (integer greater than or equal to four) gate lines GL and s (integer greater than or equal to four) source lines SL.

Each of the gate line GL, the source line SL, and the common line CL is made of metal. Each of the gate line GL, the source line SL, and the common line CL has a thin-film shape.

Each of the gate lines GL and each of the source lines SL, which will be described below in detail, transmits a signal for controlling each of the switching elements SW1described below to each of the switching elements SW1. Each of the switching elements SW1uses the signal to supply a voltage to the pixel electrode GE.

The n gate lines GL are located in parallel in the display region Rg1. Specifically, as shown inFIG. 2, the n gate lines GL are located on the substrate110so as to extend in a row direction (X-axis direction) in the display region Rg1of the substrate110. The plurality of common lines CL (not shown) are also located on the substrate110so as to extend in the row direction (X-axis direction) in the display region Rg1of the substrate110.

The s source lines SL are located in parallel in the display region Rg1. Specifically, as shown inFIG. 2, the s source lines SL are located on the substrate110so as to extend in a column direction (Y-axis direction) in the display region Rg1.

A rectangle formed by the plurality of gate lines GL and the plurality of source lines SL corresponds to the “pixel Px”.

The switching element SW1is located in each of the pixels Px forming the display region Rg1of the substrate110. In other words, the switching elements SW1are arranged in matrix. Specifically, the switching element SW1is located close to a portion where each of the gate lines GL and each of the source lines SL intersect each other.

The polarizing plate65ahas a transmission axis and an absorption axis orthogonal to each other. The polarizing plate65aabsorbs light that vibrates along the absorption axis. In other words, the polarizing plate65adoes not allow passage of light that vibrates along the absorption axis of the polarizing plate65a.

The transparent substrate111has translucency. The transparent substrate111is formed of an insulating material. The transparent substrate111is, for example, a glass substrate.

The plurality of switching elements SW1are located on one surface of the transparent substrate111. In addition, the polarizing plate65adescribed above is located on the other surface of the transparent substrate111.

Each of the switching elements SW1is, for example, a thin film transistor (TFT) made of amorphous silicon or oxide semiconductor. Specifically, each of the switching elements SW1is, for example, an N-channel metal-oxide-semiconductor field-effect transistor (MOSFET). Each of the switching elements SW1may be a P-channel MOSFET.

The pixel electrode GE is connected to each of the switching elements SW1. Specifically, the pixel electrode GE is connected to a drain electrode of each of the switching elements SW1.

The pixel electrode GE is located in each of the pixels Px forming the display region Rg1. Each of the pixel electrodes GE generates an electric field in the liquid crystal layer30by application of voltage to the pixel electrode GE. Specifically, each of the pixel electrodes GE is used to generate the electric field to change the alignment of the liquid crystal molecules31in the liquid crystal layer30. The pixel electrode GE has a flat plate shape.

The common electrode CE1is located in the entire display region Rg1. In other words, the common electrode CE1is located across the plurality of pixels Px. The common electrode CE1has a slit SLt described below.

The slit SLt generates a fringe electric field between the common electrode CE1and the pixel electrode GE. The common electrode CE1has an opening H1described below. Each of the pixel electrode GE and the common electrode CE1is a transparent electrode. The transparent electrode is made of, for example, ITO or IZO.

The alignment film112aligns the liquid crystal molecules31. The alignment film112is located on one surface of the transparent substrate111. The alignment film112corresponds to the surface of the substrate110.

The liquid crystal display500(liquid crystal display panel100) uses the pixel electrode GE and the common electrode CE1to display the video. In other words, the pixel electrode GE and the common electrode CE1are used for displaying the video.

Specifically, the liquid crystal display500(liquid crystal display panel100) applies a voltage between the pixel electrode GE and the common electrode CE1. At this time, an electric charge is stored between the pixel electrode GE and the common electrode CE1. This results in the fringe electric field generated between the pixel electrode GE and the common electrode CE1. The generation of the fringe electric field changes the alignment of the liquid crystal molecules31. In other words, the electric charge stored between the pixel electrode GE and the common electrode CE1changes the alignment of the liquid crystal molecules31.

The change in the alignment of the liquid crystal molecules31drives the liquid crystal layer30. In this manner, the liquid crystal display500(liquid crystal display panel100) drives the liquid crystal layer30to display the video.

Next, the substrate120serving as the color filter substrate is described in detail. With reference toFIG. 1, the substrate120includes a polarizing plate65b, a transparent substrate121, a color filter CF1, a black matrix BM1, and an alignment film122.

The polarizing plate65bhas the same functions and the same configuration as those of the polarizing plate65a. The transparent substrate121has translucency. The color filter CF1and the black matrix BM1are located on one surface of the transparent substrate121. In addition, the polarizing plate65bis located on the other surface of the transparent substrate121.

The black matrix BM1is a light-shielding member that shields part of light. The black matrix BM1is located in the peripheral region Rg2not to allow the light to pass through the peripheral region Rg2of the substrate120. The alignment film122aligns the liquid crystal molecules31.

Next, a detailed configuration of the display region Rg1of the substrate110of the liquid crystal display panel100included in the liquid crystal display500according to the first preferred embodiment is described.FIG. 3is a plan view showing a configuration of some pixels in the display region Rg1of the substrate110according to the first preferred embodiment of the present invention.FIG. 3does not show the alignment film112and an insulating film22described below to make the configuration easy to see.

The common electrode CE1is a transparent electrode and is located in the entire display region Rg1. Thus,FIG. 1does not show the contour of the common electrode CE1.FIG. 3shows the slit SLt and the opening H1of the common electrode CE1.

With reference toFIG. 3, the switching element SW1is located in a region that overlaps the gate line GL in the plan view (XY plane). The switching element SW1includes part of the gate line GL, a source electrode Se, a drain electrode De, and silicon Si1. The source line SL has a part that extends in the X direction at the intersection of the source line SL and the gate line GL. The part of the source line SL that extends in the X direction is the source electrode Se.

The common electrode CE1(not shown) is electrically connected to the plurality of common lines CL through a contact hole Ch.

Next, a characteristic configuration of this preferred embodiment is described. The pixels of two kinds having different configurations are used in this preferred embodiment. Hereinafter, one of the pixels of the two kinds having the different configurations is also referred to as a “pixel Pxa”. Hereinafter, the other of the pixels of the two kinds having the different configurations is also referred to as a “pixel Pxb”. Each of the pixels Px forming the display region Rg1is one of the pixel Pxa and the pixel Pxb having the different configurations.

FIG. 4is a plan view showing an example of arrangement of the pixels Pxa, Pxb in the first preferred embodiment of the present invention. With reference toFIG. 4, the pixels Pxa, Pxb are disposed in the display region Rg1so as to form a grid pattern (checker pattern). In other words, the pixel Pxa and the pixel Pxb are disposed adjacent to each other.

As described above, the common electrode CE1is located across the plurality of pixels Px. Thus, the common electrode CE1is located across the pixel Pxa and the pixel Pxb.

Hereinafter, the direction (X-axis direction) in which the gate line GL extends is also referred to as a “direction DR1”. Hereinafter, the direction (Y-axis direction) in which the source line SL extends is also referred to as a “direction DR2”.

A direction along the plane forming the display region Rg1in the plan view (XY plane) includes the direction DR1and the direction DR2orthogonal to each other. The plane forming the display region Rg1in the plan view (XY plane) is the plane forming the display region Rg1inFIG. 2. In other words, the plane forming the display region Rg1in the plan view (XY plane) is the plane parallel to the main surface of the transparent substrate111.

The pixel Pxa and the pixel Pxb are alternately disposed in a direction along the direction DR1. The pixel Pxa and the pixel Pxb are alternately disposed in a direction along the direction DR2.

Hereinafter, the pixel electrode GE included in the pixel Pxa is also referred to as a “pixel electrode GEa”. Hereinafter, the pixel electrode GE included in the pixel Pxb is also referred to as a “pixel electrode GEb”.

Next, the pixels Pxa, Pxb are described.FIG. 5is a cross-sectional view of the liquid crystal display panel100taken along an A1-A2line inFIG. 3.FIG. 5does not show the alignment film112actually located over the pixel Pxa and the pixel Pxb to make the configuration easy to see.

With reference toFIGS. 3 and 5, the liquid crystal display panel100(liquid crystal display500) further includes an insulating film21, an insulating film22, and an insulating film23. Each of the insulating films21,22,23is, for example, a SiN film (silicon nitride film) or an organic film.

The insulating film23is located on the transparent substrate111. The source line SL, the pixel electrode GEb, the silicon Si1(not shown), and the drain electrode De (not shown) are located on the insulating film23.

The insulating film22is located so as to cover the source line SL, the pixel electrode GEb, part of the insulating film23, the silicon Si1(not shown), and the drain electrode De (not shown). The pixel electrode GEb and the source line SL are insulated from each other by the insulating film22. The pixel electrode GEb and the source line SL are located in the same layer.

The common electrode CE1is located on the insulating film22. As described above, the common electrode CE1is located across the pixel Pxa and the pixel Pxb. The insulating film21is located on part of the common electrode CE1. The pixel electrode GEa is located on the insulating film21.

Next, detailed configurations of the pixel Pxa and the pixel Pxb are described. First, the configuration of the pixel Pxa is described. The pixel electrode GEa of the pixel Pxa is located over the common electrode CE1. The insulating film21is provided between the pixel electrode GEa and the common electrode CE1in the pixel Pxa.

Specifically, the insulating film22is located on the insulating film23in the pixel Pxa. The common electrode CE1is located on the insulating film22in the pixel Pxa. The insulating film21is located on the common electrode CE1in the pixel Pxa. The insulating film21is located on the part of the common electrode CE1such that the pixel electrode GEa of the pixel Pxa does not contact the pixel electrode GEb of the pixel Pxb.

The pixel electrode GEa is located on the insulating film21in the pixel Pxa. The pixel electrode GEa is electrically connected to the drain electrode De (not shown) through the contact hole Ch.

Next, the configuration of the pixel Pxb is described. The pixel electrode GEb of the pixel Pxb is located below the common electrode CE1. The insulating film22is provided between the pixel electrode GEb and the common electrode CE1in the pixel Pxb.

Specifically, the pixel electrode GEb is located on the insulating film23in the pixel Pxb. The insulating film22is located so as to cover the part of the insulating film23and the pixel electrode GEb in the pixel Pxb. The common electrode CE1is located on the insulating film22in the pixel Pxb. The pixel electrode GEb is electrically connected directly to the drain electrode De (not shown).

Next, a manufacturing method for forming the pixel Pxa and the pixel Pxb is simply described. The pixel Pxa and the pixel Pxb are formed with the use of a photolithographic technique.

First, a gate layer including the gate line GL and the common line CL is formed on the transparent substrate111. Next, the insulating film23is formed so as to cover the gate layer. Specifically, the insulating film23is formed so as to cover part of the transparent substrate111, the gate line GL, and the common line CL.

A silicon layer including the silicon Si1is then formed on the insulating film23. A source layer including the source line SL and the drain electrode De is then formed in a region of the surface of the insulating film23in which the silicon Si1is not located. The pixel electrode GEb is then formed in a region of the surface of the insulating film23in which the silicon Si1, the source line SL, and the drain electrode De are not located.

The insulating film22is then formed so as to cover the part of the insulating film23, the source line SL, the pixel electrode GEb, the silicon Si1, and the drain electrode De. The common electrode CE1is then formed on the insulating film22. The insulating film21is then formed on the part of the surface of the common electrode CE1. The pixel electrode GEa is then formed on the insulating film21.

A planarizing film is located so as to cover the pixel electrode GEa, part of the insulating film21, and part of the common electrode CE1as necessary. The alignment film112is formed on the planarizing film. In this manner above, the pixel Pxa and the pixel Pxb are formed.

As described above, the common electrode CE1used for displaying the video is located across the pixel Pxa and the pixel Pxb disposed adjacent to each other in this preferred embodiment. In other words, at least the common electrode CE1is formed in the same layer across the pixel Pxa and the pixel Pxb.

Therefore, the liquid crystal display that suppresses the degree of complexity of the configurations of the two electrodes used for displaying the video in the two adjacent pixels can be provided.

As described above, the pixel electrode and the common electrode are located in the different layers in the FFS liquid crystal display. Thus, the FFS liquid crystal display needs many array masks used for pattern formation, resulting in disadvantages such as a high cost.

Then, a configuration in which the two adjacent pixel electrodes are formed in the same layer may be conceivable as the configuration of the conventional FFS liquid crystal display.

Hereinafter, the configuration in which the two adjacent pixel electrodes are formed in the same layer is also referred to as a “configuration CtN”. Hereinafter, the FFS liquid crystal display having the configuration CtN is referred to as a “liquid crystal display500N”. The liquid crystal display500N is a comparative example of the liquid crystal display500.

FIG. 6is a diagram showing the configuration CtN of the liquid crystal display500N as the comparative example. With reference toFIG. 6, two adjacent pixel electrodes GE are formed in the same layer in two adjacent pixels Px.

Although the pixel electrode GE is located over the common electrode CE1in the configuration CtN shown inFIG. 6, the configuration CtN is not limited to this configuration. The pixel electrode GE may be located below the common electrode CE1in the configuration CtN.

When the pixel electrode GE is formed with a conductive film, a scrap of the conductive film may be generated as a conductive foreign matter X1in the configuration CtN. As shown inFIG. 6, a situation (hereinafter also referred to as a “situation Stx”) where the conductive foreign matter X1is located across the two adjacent pixels Px may occur.

In the situation Stx, the pixel electrode GE of the one pixel Px and the pixel electrode GE of the other pixel Px are short-circuited in the two adjacent pixels Px. Thus, when the liquid crystal display500N displays a video in the situation Stx, a point defect (dot-shaped display defect) is recognized.

The point defect includes a black point detect and a light point defect. The light point defect is more prominent than the black point defect. The light point defect includes a single light point defect and a continuous light point defect having a plurality of light point defects connected to each other. The continuous light point defect is more prominent than the single light point defect.

When the situation Stx occurs in the FFS liquid crystal display500N, the continuous light point defect is recognized. Thus, the occurrence of the situation Stx in the liquid crystal display500N as the comparative example causes a display failure and a decrease in quality of the video, for example. For this reason, the liquid crystal display500N has low yields of the liquid crystal display.

For the occurrence of the situation Stx, a technique for performing a repair step of removing the conductive foreign matter X1with laser light is conceivable. However, the technique needs an investment in equipment for finding defects and repair devices. Further, the technique needs to add the repair step to the normal steps of manufacturing a liquid crystal display. Thus, the technique needs a high manufacturing cost of the liquid crystal display.

Accordingly, the liquid crystal display500(liquid crystal display panel100) in this preferred embodiment is configured as described above, so that the liquid crystal display500can solve the above-mentioned problems of the liquid crystal display500N. Specifically, the pixel electrode GEa and the pixel electrode GEb are located in the different layers in the pixel Pxa and the pixel Pxb adjacent to each other, as shown inFIG. 5, in the liquid crystal display500.

Herein, it is assumed that a situation (hereinafter also referred to as a “situation Stxa”) where the conductive foreign matter X1is located across the pixel Pxa and the pixel Pxb occurs. Even if the situation Stxa occurs, the pixel electrode GEa and the pixel electrode GEb are not short-circuited in the liquid crystal display500.

Thus, even in the situation where the situation Stxa occurs, the continuous light point defect does not occur in the liquid crystal display500. If the situation Stxa occurs, the pixel electrode GEa and the common electrode CE1are short-circuited to cause only the black point defect, which is less likely to be prominent, in the liquid crystal display500.

If the situation Stxa occurs, the repair step described above does not need to be performed. Thus, the manufacturing cost of the liquid crystal display does not increase in the configuration of this preferred embodiment. A decrease in the yields of the liquid crystal display can be prevented in the configuration of this preferred embodiment.

In addition, according to the present invention, the preferred embodiment can be appropriately varied or omitted within the scope of the invention.

For example, it is assumed that the common electrode CE1is located across all the pixels Px forming the display region Rg1, but this is not restrictive. For example, the common electrode CE1may be located across at least two adjacent pixels Px. In such a configuration, the liquid crystal display500includes a plurality of common electrodes CE1.

It is assumed that the pixel Pxa and the pixel Pxb are alternately disposed in the direction along each of the directions DR1, DR2, but this is not restrictive.

For example, the pixel Pxa and the pixel Pxb may be alternately disposed in the direction along only the direction DR1. In such a configuration, the pixel Pxa and the pixel Pxb may not be alternately disposed in the direction DR2.

The pixel Pxa and the pixel Pxb may be alternately disposed in the direction along only the direction DR2. In such a configuration, the pixel Pxa and the pixel Pxb may not be alternately disposed in the direction DR1.

The pixel Pxa and the pixel Pxb may not be alternately disposed from one end of the display region Rg1to the other end of the display region Rg1. For example, the pixel Pxa and the pixel Pxb may be alternately disposed for only four pixels in the direction DR1.