Variable gain amplifier and method thereof

An embodiment provides a variable gain amplifying method includes: on a signal path of a radio frequency input signal, amplifying a radio frequency input signal by a plurality of serially-coupled amplifiers; steering currents from the amplifiers and controlling respective gains of the amplifiers; performing gain match on the signal path of the radio frequency input signal; and performing phase compensation on the signal path of the radio frequency input signal. The signal path of the radio frequency input signal further has first and second phase variation trends which compensate each other.

CROSS-REFERENCE TO RELATED ART

This application claims the benefit of Taiwan application Serial No. 106143270, filed Dec. 8, 2017, the disclosure of which is incorporated by reference herein in its entirety.

TECHNICAL FIELD

The disclosure relates in general to a variable gain amplifier and a method thereof.

BACKGROUND

Variable gain amplifiers may amplify the radio signals to be transmitted or the received radio signals to the desired power level, and then transmit the received radio signals to the backend circuit for processing. Variable gain amplifiers may be used in a lot of fields, such as remote toys, consumer mobile communication electronic devices, base station, military fields or space fields.

Variable gain amplifiers are required to have enough gain variation range. When used in phase array transceivers, the ideal variable gain amplifiers may keep the constant phase variation in the gain variation range. However, when the gain is varied, the real variable gain amplifiers do not keep the constant phase variation, and thus needs additional control mechanism. By introducing additional control, the real variable gain amplifiers may keep the constant phase variation in the gain variation range. However, this will increase control complexity.

SUMMARY

According to one embodiment, provided is a variable gain amplifier. The variable gain amplifier includes: a plurality of serially-coupled amplifiers; a plurality of current steering circuits coupled to the amplifiers, for steering currents from the amplifiers and controlling respective gains of the amplifiers; at least one conjugate match circuit coupled to at least one first amplifier of the amplifiers, the at least one conjugate match circuit being configured for performing gain match, the at least one first amplifier being coupled to at least one first current steering circuit of the current steering circuits; and at least one phase compensation circuit coupled to at least one second amplifier of the amplifiers, the at least one phase compensation circuit being configured for performing phase compensation, the at least one second amplifier being coupled to at least one second current steering circuit of the current steering circuits. The at least one first amplifier and the at least one first current steering circuit has a first phase variation trend. The at least one second amplifier, the at least one second current steering circuit and the at least one phase compensation circuit has a second phase variation trend. The first and second phase variation trends compensate each other.

According to another embodiment, provided is a variable gain amplifying method including: on a signal path of a radio frequency input signal, amplifying a radio frequency input signal by a plurality of serially-coupled amplifiers; steering currents from the amplifiers and controlling respective gains of the amplifiers; performing gain match on the signal path of the radio frequency input signal; and performing phase compensation on the signal path of the radio frequency input signal. The signal path of the radio frequency input signal further has first and second phase variation trends which compensate each other.

DESCRIPTION OF THE EMBODIMENTS

Technical terms of the disclosure are based on general definition in the technical field of the disclosure. If the disclosure describes or explains one or some terms, definition of the terms is based on the description or explanation of the disclosure. Each of the disclosed embodiments has one or more technical features. In possible implementation, one skilled person in the art would selectively implement part or all technical features of any embodiment of the disclosure or selectively combine part or all technical features of the embodiments of the disclosure.

FIG. 1shows a functional block diagram for a variable gain amplifier according to one embodiment of the application. As shown inFIG. 1, the variable gain amplifier100according to one embodiment of the application includes a conjugate match circuit110, a first amplifier120, a first current steering circuit130, a conjugate match circuit140, a second amplifier150, a second current steering circuit160, a phase compensation circuit170and a conjugate match circuit180.

The conjugate match circuit110is for receiving a radio frequency input signal RFin and performs conjugate match (or gain match) on the radio frequency input signal RFin. The conjugate match circuit110sends the radio frequency input signal RFin to the next stage (the first amplifier120).

The first amplifier120is coupled to the conjugate match circuit110, and receives and amplifies the radio frequency input signal RFin which is processed by the conjugate match of the conjugate match circuit110.

The first current steering circuit130is coupled to the first amplifier120. The first current steering circuit130is configured for controlling gain of the first amplifier120. Details of the first current steering circuit130are as follows.

The conjugate match circuit140is coupled to the first amplifier120. The conjugate match circuit140is configured for performing conjugate match (or gain match) on an output signal from the first amplifier120. The conjugate match circuit140sends the output signal of the conjugate match circuit140to the next stage (the second amplifier150).

The second amplifier150is coupled to the conjugate match circuit140, and receives and amplifies the signal which is processed by the conjugate match of the conjugate match circuit140.

The second current steering circuit160is coupled to the second amplifier150and is configured for controlling gain of the second amplifier150. Details of the second current steering circuit160are as follows.

The phase compensation circuit170is coupled to the second amplifier150and is configured for performing phase compensation on an output signal of the second amplifier150.

The conjugate match circuit180is coupled to the phase compensation circuit170and is configured to perform conjugate match (or gain match) on an output signal from the phase compensation circuit170to generate a radio frequency output signal RFout.

FIG. 2Ashows a detailed circuit diagram for a variable gain amplifier100A according to one embodiment of the application, wherein the first current steering circuit130A and the second current steering circuit160A are implemented by digital circuits.

The conjugate match circuit110includes transmission lines TL1-TL3, capacitors C1-C2and a resistor R1. The transmission line TL1includes one terminal receiving the radio frequency input signal RFin and another terminal coupled to one terminal of the capacitor C1. The capacitor C1includes one terminal coupled to the transmission line TL1and another terminal coupled to the transmissions TL2and TL3. The transmission line TL2includes one terminal coupled to the capacitor C1and the transmission line TL3and another terminal coupled to the capacitor C2and the resistor R1. The transmission line TL3includes one terminal coupled to the capacitor C1and the transmission line TL2and another terminal coupled to the first amplifier120. The capacitor C2includes one terminal coupled to the transmission line TL2and the resistor R1and another terminal coupled to GND. The resistor R1includes one terminal coupled to the transmission line TL2and the capacitor C2and another terminal coupled to GND. Details of conjugate match (or gain match) performed by the conjugate match circuit110are omitted here.

The first amplifier120includes transistors M1-M2, a capacitor C3and a resistor R2. The transistor M1includes: a gate coupled to the transmission line TL3of the conjugate match circuit110and for receiving the radio frequency input signal RFin processed by conjugate match (or gain match) by the conjugate match circuit110; a source coupled to GND; and a drain coupled to a source of the transistor M2. The transistor M2includes: a gate coupled to the capacitor C3and the resistor R2and for receiving a voltage source vg2via the resistor R2; a source coupled to the drain of the transistor M1and the first current steering circuit130A; and a drain coupled to the conjugate match circuit140. The capacitor C3includes one terminal coupled to GND and another terminal coupled to the gate of the transistor M2and the resistor R2. The capacitor C3is a regulating capacitor for regulating the gate voltage of the transistor M2. The resistor R2includes one terminal coupled to a voltage source vg2and another terminal coupled to the gate of the transistor M2and the capacitor C3. The resistor R2is a protection element for preventing large current from damaging the transistor M2.

The first current steering circuit130A includes a plurality of transistors M31-M3N (N being a positive integer) and a capacitor C4. The transistors M31-M3N are parallel. Gates of the transistors M31-M3N receive digital control signals D11-D1N, respectively. Sources of the transistors M31-M3N are coupled to the source of the transistor M2. Drains of the transistors M31-M3N receive the voltage source Vdd. Under control of the digital control signals D11-D1N, the transistors M31-M3N may steer current from the transistor M2to control the gain of the first amplifier120. The capacitor C4includes one terminal coupled to GND and another terminal coupled to the voltage source Vdd.

The conjugate match circuit140includes transmission lines TL4-TL10, capacitors C5-C8and a resistor R3. The transmission line TL4includes one terminal coupled to the drain of the transistor M2and another terminal coupled to the capacitor C6and the transmission line TL5. The transmission line TL5includes one terminal coupled to the voltage source Vdd and another terminal coupled to the transmission line TL4. The capacitor C5includes one terminal coupled to GND and another terminal coupled to the transmission line TL5. The capacitor C6includes one terminal coupled to the transmission lines TL4and TL5and another terminal coupled to the transmission line TL6. The transmission line TL6includes one terminal coupled to the capacitor C6and another terminal coupled to the transmission lines TL7and TL8. The transmission line TL7includes one terminal coupled to GND and another terminal coupled to the transmission lines TL6and TL8. The transmission line TL8includes one terminal coupled to the transmission lines TL6and TL7and another terminal coupled to the capacitor C7. The capacitor C7includes one terminal coupled to the transmission line TL8and another terminal coupled to the transmission lines TL9and TL10. The transmission line TL9includes one terminal coupled to the capacitor C7and the transmission line TL10and another terminal coupled to the capacitor C8and the resistor R3. The capacitor C8includes one terminal coupled to GND and another terminal coupled to the transmission line TL9and the resistor R3. The resistor R3includes one terminal coupled to GND and another terminal coupled to the transmission line TL9and the capacitor C8. The transmission line TL10includes one terminal coupled to the capacitor C7and the transmission line TL9and another terminal coupled to the second amplifier150.

The second amplifier150includes transistors M4-M5, a capacitor C9and a resistor R4. The transistor M4includes: a gate coupled to the transmission line TL10of the conjugate match circuit140and for receiving the output signal of the conjugate match circuit140; a source coupled to GND; and a drain coupled to a source of the transistor M5. The transistor M5includes: a gate coupled to the capacitor C9and the resistor R4and for receiving the voltage source vg2via the resistor R4; a source coupled to the drain of the transistor M4and the second current steering circuit160A; and a drain coupled to the phase compensation circuit170. The capacitor C9includes one terminal coupled to GND and another terminal coupled to the gate of the transistor M5and the resistor R4. The capacitor C9is a regulating capacitor for regulating the gate voltage of the transistor M5. The resistor R4includes one terminal coupled to the voltage source vg2and another terminal coupled to the gate of the transistor M5and the capacitor C9. The resistor R4is a protection element for preventing large current from damaging the transistor M5.

The second current steering circuit160A includes a plurality of transistors M61-M6N and a capacitor C10. The transistors M61-M6N are parallel. Gates of the transistors M61-M6N receive digital control signals D21-D2N, respectively. Sources of the transistors M61-M6N are coupled to the source of the transistor M5. Drains of the transistors M61-M6N receive the voltage source Vdd. Under control of the digital control signals D21-D2N, the transistors M61-M6N may steer current from the transistor M5to control the gain of the second amplifier150. The capacitor C10includes one terminal coupled to GND and another terminal coupled to the voltage source Vdd.

The phase compensation circuit170includes transmission lines TL11-TL12and capacitors C11-C12. The transmission line TL11includes one terminal coupled to the drain of the transistor M5and another terminal coupled to the capacitor C12and the transmission line TL12. The transmission line TL12includes one terminal coupled to the voltage source Vdd and another terminal coupled to the transmission line TL11. The capacitor C11includes one terminal coupled to GND and another terminal coupled to the transmission line TL12. The capacitor C12includes one terminal coupled to the transmission lines TL11and TL12and another terminal coupled to the conjugate match circuit180.

The conjugate match circuit180includes transmission lines TL13-TL14. The transmission line TL13includes one terminal coupled to the capacitor C12of the phase compensation circuit170and another terminal for outputting the radio frequency output signal RFout. The transmission line TL14includes one terminal coupled to GND and another terminal coupled to the transmission line TL13.

In other possible embodiment of the application, the conjugate match circuits110and/or140and/or180may have other circuit implementation thanFIG. 2Aand may be varied if needed. Also, in other possible embodiment of the application, the conjugate match circuits110and/or140and/or180may be optional. However, in principle, at least one conjugate match circuit is needed to perform conjugate match (gain match).

Refer toFIG. 2Afor describing operations of the first current steering circuit130A and the second current steering circuit160A. Operations of the first current steering circuit130A are described while the second current steering circuit160A may have similar operations. The transistors M1and M2of the first amplifier120A form an amplifier core having a function of signal amplifying path. The transistors M31-M3N are for current steering. When the digital control signals D11-D1N (logic 0 or logic 1) control ON/OFF of the transistors M31-M3N, the current flowing through the transistor M2will be steered to the transistors M31-M3N and thus the current of the transistor M2is reduced. Thus, the transconductance value gm2 of the transistor M2is lowered. Thus, the digital control signals D11-D1N may adjust the current flowing through the transistor M2and may further control the gain of the first amplifier120(for example, lowering the gain of the first amplifier120). That is, if more of the transistors M31-M3M are conducted, then more current is steered from the transistor M2, and the gain of the first amplifier120is more lowered.

FIG. 2Bshows a detailed circuit diagram for a variable gain amplifier100B according to one embodiment of the application. The first and the second current steering circuits130B and160B are implemented by analog circuits.

The first current steering circuit130B includes a transistor M3, capacitors C13-C14and a resistor R5. The transistor M3includes: a gate coupled to the resistor R5and the capacitor C14and for receiving an analog control signal VC1via the resistor R5; a source coupled to the source of the transistor M2; and a drain receiving the voltage source Vdd. Under control of the analog control signal VC1, the transistor M3may steer current from the transistor M2to control the gain of the first amplifier120. The capacitor C13includes one terminal coupled to GND and another terminal coupled to the voltage source Vdd. The capacitor C13is for regulating the drain voltage of the transistor M3. The capacitor C14includes one terminal coupled to GND and another terminal coupled to the gate of the transistor M3. The capacitor C14is for regulating the gate voltage of the transistor M3. The resistor R5includes one terminal coupled to the voltage source Vdd and another terminal coupled to the gate of the transistor M3. The resistor R5is a protection element for prevent large current from damaging the transistor M3.

The second current steering circuit160B includes a transistor M6, capacitors C15-C16and a resistor R6. The transistor M6includes: a gate coupled to the resistor R6and the capacitor C16and for receiving an analog control signal VC2via the resistor R6; a source coupled to the source of the transistor M5; and a drain receiving the voltage source Vdd. Under control of the analog control signal VC2, the transistor M6may steer current from the transistor M5to control the gain of the second amplifier150. The capacitor C15includes one terminal coupled to GND and another terminal coupled to the voltage source Vdd. The capacitor C15is for regulating the drain voltage of the transistor M6. The capacitor C16includes one terminal coupled to GND and another terminal coupled to the gate of the transistor M6. The capacitor C16is for regulating the gate voltage of the transistor M6. The resistor R6includes one terminal coupled to the voltage source Vdd and another terminal coupled to the gate of the transistor M6. The resistor R6is a protection element for prevent large current from damaging the transistor M6.

Refer toFIG. 2Bfor describing operations of the first current steering circuit130B and the second current steering circuit160B. Operations of the first current steering circuit130B are described while the second current steering circuit160B may have similar operations. Similarly, the transistor M3is for current steering. When the analog control signal VC1controls the transistor M3to be turned on, the current flowing through the transistor M2will be steered to the transistor M3and thus the current of the transistor M2is reduced. Thus, the transconductance value gm2 of the transistor M2is lowered and thus the gain of the first amplifier120is reduced. Thus, in one embodiment of the application, adjustment of the analog control signal VC1may adjust the current flowing through the transistor M2and may further control the gain of the first amplifier120. That is, if the analog control signal VC1has higher voltage level, the conductance current of the transistor M3is higher, and thus the transistor M3steers more current from the transistor M2. The current of the transistor M2is smaller, and the gain of the first amplifier120is more lowered.

Further, in another possible embodiment of the application, the analog control signals VC1and VC2are continuously adjustable and thus the embodiment of the application may achieve analog gain control. The current of the transistor M1is almost constant; and when the gain of the first amplifier120is varied, the input resistance is almost the same and thus good reflection loss is achieved in the embodiment of the application.

Refer toFIG. 2AandFIG. 2Bagain. FromFIG. 2AandFIG. 2B, the total phase angle ∠Y21 of the first amplifier120and the first current steering circuit130A/130B and the phase angles ϕ1, ϕ2 and ϕ3 of the transistors M1-M3are as follows:

The symbols gm1, gm2 and gm3 refer to the transconductance values of the transistors M1, M2and M3, respectively. “Cgd1” refer to the gate-drain parasitic capacitance of the transistor M1; “Cds2” refer to the drain-source parasitic capacitance of the transistor M2; “Cds1” refer to the drain-source parasitic capacitance of the transistor M1; “Cgs2” refer to the gate-source parasitic capacitance of the transistor M2; “Cds3” refer to the drain-source parasitic capacitance of the transistor M3; and “Cgs3” refer to the gate-source parasitic capacitance of the transistor M3.

When the gain is varied, the current and the transconductance value of the transistor M1are almost kept constant. Because the phase angle ϕ1 is based on Cgd1 and gm1, the phase angle ϕ1 is also almost kept constant. Besides, the transistor M3steers current from the transistor M2, and the transistor M3steers current from the transistor M2, and the total current of the transistors M2and M3is almost kept constant (the total current of the transistors M2and M3flows into the transistor M1). Thus, the summation “gm2+gm3” of the transconductance values of the transistors M2and M3is almost kept constant. Thus, whether the total phase angle ∠Y21 is varied or not depends on the phase angle ϕ2. When the control signal (the analog control signal VC1or the digital control signals D11-D1N) is higher, the current of the transistor M3is higher but the current of the transistor M2is lower. Thus, the transconductance value gm2 of the transistor M2is lower. By so, the phase angle ϕ2 is higher. Thus, when the gain is lower, the phase variation trend is positive.

By the above equation, the parasitic capacitance of the transistors M1-M3will affect the whole phase variation trend. In one embodiment of the application, by introducing the inductive phase compensation circuit (170) to compensate the parasitic capacitance and thus, the phase variation trend of the current steering circuit configuration is turned. In one embodiment of the application, the inductive phase compensation circuit may include a transmission line and/or an inductor.

After introducing the inductive phase compensation circuit, the phase angle term ϕ2 in the total phase angle ∠Y21 will become

tan-1⁡(ω⁢⁢C⁢⁢ds⁢⁢2-(1/ω⁢⁢L)gm⁢⁢2).
When “1/ωL” is higher than “ωCds2”, the phase angle ϕ2 is negative. When the control signal (the analog control signal VC1or the digital control signals D11-D1N) is higher, the current of the transistor M3is higher but the current of the transistor M2is lower. Thus, the transconductance value gm2 of the transistor M2is lower. By so, the phase angle ϕ2 is decreased. Thus, when the gain is lower, the phase variation trend is negative (after introducing the inductive phase compensation circuit).

Phase compensation of the phase compensation circuit170is described. As shown inFIG. 2AorFIG. 2B, in one embodiment of the application, the actual length of the transmission line TL12is shorter than 0.05 wavelength (λ); and the summation of the actual length of the transmission lines TL11and TL12is shorter than 0.125 wavelength (λ). 0.05 wavelength (λ) is also defined as a first length reference; and 0.125 wavelength (λ) is also defined as a second length reference. At 40 GHz frequency, the actual length of the transmission line TL12is shorter than 200 μm (0.05λ); and the summation of the actual length of the transmission lines TL11and TL12is shorter than 450 μm (0.125λ). The transmission lines TL11and TL12which meet this length requirement may change the phase variation trend from downwards to upwards. That is, when the gain is increased, the phase variation trend is upwards. Of course, 0.05λ (the first length reference) and 0.125λ (the second length reference) are for example, not to limit the application. It is noted that the values of the first length reference and the second length reference may be changed if the manufacturing process is different, which is still within the spirit and scope of the application.

In other possible embodiment of the application, the transmission lines in the phase compensation circuit may be replaced by the inductors and the same or similar effects may be also achieved, which is still within the spirit and scope of the application.

The operation of the variable gain amplifier100/100A/100B according to one embodiment of the application is described. Before the radio frequency input signal RFin is received by the first amplifier120, the conjugate match circuit110performs conjugate match (or gain match) on the radio frequency input signal RFin and sends the radio frequency input signal RFin to the next stage (the first amplifier120). The output signal of the conjugate match circuit110is amplified by the first amplifier120. If without the first current steering circuit130/130A/130B, the gain of the first amplifier120is constant. On the contrary, the first current steering circuit130/130A/130B may control and/or adjust the gain of the first amplifier120. After amplification by the first amplifier120, the output signal of the first amplifier120is sent to the conjugate match circuit140which performs conjugate match (or gain match) on the output signal of the first amplifier120and sends the output signal of the conjugate match circuit140to the next stage amplifier (the second amplifier150). The output signal of the conjugate match circuit140is amplified by the second amplifier150. Similarly, if without the second current steering circuit160/160A/160B, the gain of the second amplifier150is constant. On the contrary, the second current steering circuit160/160A/160B may control and/or adjust the gain of the second amplifier150. Besides, in one embodiment of the application, the inductive transmission lines TL11and TL12(or other inductive elements) which meet the length requirement may compensate the parasitic capacitance of the second amplifier150and the second current steering circuit160/160A/160B, to produce different phase compensation (the phase variation trend is upwards). After phase compensation, the conjugate match circuit180performs conjugate match (or gain match) on the output signal of the phase compensation circuit170to generate the radio frequency output signal RFout.

FIG. 3shows a diagram for gain and phase variation trend according to one embodiment of the application. The horizontal axis refers to the control signal Vc (which may be the analog control signals VC1-VC2or the digital control signals D11-D1N and/or D21-D2N) input into the first current steering circuit130and/or the second current steering circuit160. InFIG. 3, the curve G1refers to the gain variation trend of the first amplifier120which is affected by the first current steering circuit130; the curve P1refers to the phase variation trend of the first amplifier120which is affected by the first current steering circuit130; the curve G2refers to the gain variation trend of the second amplifier150which is affected by the second current steering circuit160; the curve P2refers to the phase variation trend of the second amplifier150which is affected by the second current steering circuit160and the phase compensation circuit170; the curve G3refers to the total gain variation trend of the variable gain amplifier100; and the curve P3refers to the total phase variation trend of the variable gain amplifier100.

As seen from the curves G1and P1, as for the first amplifier120, when the gain is lowered, the phase variation trend is upwards as described with the above equations. As seen from the curves G2and P2, as for the second amplifier150, when the gain is lowered, the phase variation trend is downwards because of introducing the inductive phase compensation circuit170. Thus, as seen from the curves G3and P3, as for the variable gain amplifier100, when the gain of the variable gain amplifier100is lowered, the total phase variation trend is constant. That is, as seen fromFIG. 3, the variable gain amplifier100according to one embodiment of the application has constant phase variation within the gain variation range. Thus, the control complexity of the whole system is lowered.

FIG. 4shows a flow chart for a variable gain amplifying method according to one embodiment of the application. The variable gain amplifying method includes: on a signal path of a radio frequency input signal, amplifying a radio frequency input signal by a plurality of serially-coupled amplifiers (step410); steering currents from the amplifiers and controlling respective gains of the amplifiers (step420); performing gain match on the signal path of the radio frequency input signal (step430); and performing phase compensation on the signal path of the radio frequency input signal (step440). The signal path of the radio frequency input signal further has first and second phase variation trends which compensate each other. TakingFIG. 1as an example, the signal path of the radio frequency input signal indicates for example but not limited by, the conjugate match circuit110, the first amplifier120, the conjugate match circuit140, the second amplifier150, the phase compensation circuit170and the conjugate match circuit180.

Further, in other possible embodiment of the application, the variable gain amplifier may include more amplifier stages, which is still within the spirit and scope of the application.

In other possible embodiment of the application, the variable gain amplifier includes a plurality of amplifier stages, wherein at least one amplifier stage (or even more amplifier stages) is followed by at least one phase compensation circuit, and at least one amplifier stage (or even more amplifier stages) is followed by at least one conjugate match circuit, which is still within the spirit and scope of the application.

In other possible embodiment of the application, the phase compensation circuit may be after the first amplifier or any amplifier stage, which is still within the spirit and scope of the application.

In summary, in one embodiment of the application, a variable gain amplifier having a plurality of stages and having phase compensation function is provided. At least one stage (for example but not limited by, formed by the first amplifier120and the first current steering circuit130/130A/130B) having positive phase variation trend (the phase is increased in case of the control signal is higher) is serially coupled with at least one another stage (for example but not limited by, formed by the second amplifier150, the second current steering circuit160/160A/160B and the phase compensation circuit170) having negative phase variation trend (the phase is decreased in case of the control signal is higher) for compensating phase with each other. By so, within the gain range, the phase variation is kept. That is, the positive phase variation trend and the negative phase variation trend may compensate each other.

By phase compensation of the phase compensation circuit170, the variable gain amplifier of the embodiments of the application may keep the constant phase (or the phase variation is small) with the gain variation range. Further, if the variable gain amplifier of the embodiments of the application is implemented by digital control (as shown inFIG. 2A), the system control complexity is reduced.