Firmware Protection Using Multi-Chip Storage of Firmware Image

Techniques are provided for firmware protection using multi-chip storage of firmware images. One method comprises obtaining a firmware image; encrypting the firmware image; splitting the encrypted firmware image into a plurality of encrypted firmware image portions; and storing the plurality of encrypted firmware image portions on a plurality of recovery chips, wherein a threshold number of the encrypted firmware image portions from at least two different recovery chips are needed to reconstruct the firmware image. The threshold number of the encrypted firmware image portions can be obtained from the at least two different recovery chips and a validation can be applied to the obtained encrypted firmware image portions. The threshold number of encrypted firmware image portions may be obtained in response to a chip that stores the firmware image being inactive.

FIELD

The field relates generally to information processing systems, and more particularly to the protection of such information processing systems.

BACKGROUND

Unauthorized modifications of device firmware, such as a Basic Input/Output System (BIOS), can present a significant threat due to the unique and privileged position of such firmware in the architecture of many devices. A BIOS, for example, comprises firmware used to initialize hardware during a boot process for a given device, and to provide runtime services for the operating system and programs of the given device. A malicious modification of the BIOS can cause a denial of service (e.g., if the BIOS is corrupted) and/or a persistent malware presence (e.g., if a malicious program is installed on the BIOS).

SUMMARY

In one embodiment, a method comprises obtaining a firmware image; encrypting the firmware image; splitting the encrypted firmware image into a plurality of encrypted firmware image portions; and storing the plurality of encrypted firmware image portions on a plurality of recovery chips, wherein a threshold number of the encrypted firmware image portions from at least two different recovery chips are needed to reconstruct the firmware image.

In some embodiments, the threshold number of the encrypted firmware image portions is obtained from the at least two different recovery chips and a validation is applied to the obtained encrypted firmware image portions. In at least one embodiment, at least the threshold number of encrypted firmware image portions is obtained in response to a chip that stores the firmware image being inactive. At least one additional encrypted firmware image portion can be obtained from at least one of the different recovery chips in response to at least one obtained encrypted firmware image portion failing the validation.

DETAILED DESCRIPTION

Illustrative embodiments of the present disclosure will be described herein with reference to exemplary communication, storage and processing devices. It is to be appreciated, however, that the disclosure is not restricted to use with the particular illustrative configurations shown. One or more embodiments of the disclosure provide methods, apparatus and computer program products for firmware protection using multi-chip storage of firmware images.

In one or more embodiments, techniques are provided for the protection of firmware in hardware devices by storing portions of the firmware image of protected firmware in multiple recovery chips and using threshold-based firmware image reconstruction techniques to reconstruct the original firmware image, whereby a predefined number of portions of the original firmware image are needed from the multiple recovery chips to reconstruct the original firmware image. One or more aspects of the disclosure recognize that the likelihood that an attacker can obtain or attack a number of firmware image portions that is above the reconstruction threshold is significantly reduced. The term “firmware image” as used herein is intended to be broadly construed so as to encompass, for example, any copy or image of the firmware of a device, such as an image of BIOS firmware or cryptographic firmware, as well as various combinations or portions of such entities. In some embodiments, the firmware image and/or a firmware image portion may be flashed or burned (e.g., stored) on one or more associated chips, as discussed further below.

FIG. 1shows a computer network (also referred to herein as an information processing system)100configured in accordance with an illustrative embodiment. The computer network100comprises a plurality of hardware devices102-1through102-P, collectively referred to herein as hardware devices102. The hardware devices102are coupled to a network104, where the network104in this embodiment is assumed to represent a sub-network or other related portion of the larger computer network100. Accordingly, elements100and104are both referred to herein as examples of “networks” but the latter is assumed to be a component of the former in the context of theFIG. 1embodiment. Also coupled to network104is hardware device firmware protection server105, discussed below.

The hardware devices102may comprise, for example, storage devices, host devices and/or user devices such as appliances, mobile telephones, laptop computers, tablet computers, desktop computers or other types of computing devices. Such devices are examples of what are more generally referred to herein as “processing devices.” Some of these processing devices are also generally referred to herein as “computers.” The hardware devices102may comprise a network client that includes networking capabilities such as ethernet, Wi-Fi, etc. When the hardware devices102are implemented as host devices, the host devices may illustratively comprise servers or other types of computers of an enterprise computer system, cloud-based computer system or other arrangement of multiple compute nodes associated with respective users.

For example, the host devices in some embodiments illustratively provide compute services such as execution of one or more applications on behalf of each of one or more users associated with respective ones of the host devices. Such applications illustratively generate input-output (IO) operations that are processed by a storage system. The term “input-output” as used herein refers to at least one of input and output. For example, IO operations may comprise write requests and/or read requests directed to logical addresses of a particular logical storage volume of the storage system. These and other types of IO operations are also generally referred to herein as IO requests.

In the example ofFIG. 1, the exemplary hardware device102-1comprises protected firmware112, a recovery chip array114, as discussed further below, for example, in conjunction withFIG. 2, a firmware protection module116and a firmware image recovery module118. As discussed further below, the protected firmware112(sometimes referred to as a protected firmware chip) may be implemented, for example, as a BIOS, a firmware chip, a TPM (Trusted Platform Module), or another cryptographic module, a CEC/CPC (Central Electronics Complex/Central Processor Complex) chip, and/or a BMC (Baseboard Management Controller) chip. It is noted that multiple protected firmware chips112can be protected using corresponding firmware images that are protected individually or together.

It is to be appreciated that this particular arrangement of modules116and118illustrated in the hardware device102-1of theFIG. 1embodiment is presented by way of example only, and alternative arrangements can be used in other embodiments. For example, the functionality associated with modules116and118in other embodiments can be implemented as a single module or device, or separated across a larger number of modules. As another example, multiple distinct processors can be used to implement different ones of modules116and118, or portions thereof.

At least portions of modules116and118may be implemented at least in part in the form of software that is stored in memory and executed by a processor. An exemplary process utilizing modules116and118of an example hardware device102-1in computer network100will be described in more detail with reference to the flow diagrams of, for example,FIGS. 2, 3, and 5.

The hardware device firmware protection server105may be implemented, for example, on the cloud or on the premises of an enterprise or another entity. In some embodiments, the hardware device firmware protection server105, or portions thereof, may be implemented as part of a storage system or on a host device.

As also depicted inFIG. 1, the hardware device firmware protection server105further comprises a global chip recovery module120. In some embodiments, the global chip recovery module120may implement and/or initiate global recovery operations of a given enterprise. As discussed further below in conjunction withFIG. 3, the global chip recovery module120may initiate a recovery of the protected firmware112, using the recovery chip array114, for example, when the protected firmware112does not respond to a ping message sent by the global chip recovery module120.

Additionally, the hardware device firmware protection server105can have one or more associated databases (not shown) configured to store, for example, values pertaining to one or more exemplary hardware devices that may be protected using the disclosed techniques for firmware protection.

The databases can be implemented using one or more storage systems associated with the hardware device firmware protection server105. Such storage systems can comprise any of a variety of different types of storage including such as network-attached storage (NAS), storage area networks (SANs), direct-attached storage (DAS) and distributed DAS, as well as combinations of these and other storage types, including software-defined storage.

The hardware devices102and the hardware device firmware protection server105may be implemented on a common processing platform, or on separate processing platforms. The hardware devices102(for example, when implemented as host devices) are illustratively configured to write data to and read data to/from a storage system in accordance with applications executing on those host devices for system users.

One or more of the protected hardware devices may comprise storage devices of a storage system. The storage devices illustratively comprise solid state drives (SSDs). Such SSDs are implemented using non-volatile memory (NVM) devices such as flash memory. Other types of NVM devices that can be used to implement at least a portion of the storage devices include non-volatile RAM (NVRAM), phase-change RAM (PC-RAM), magnetic RAM (MRAM), resistive RAM, spin torque transfer magneto-resistive RAM (STT-MRAM), and Intel Optane™ devices based on 3D XPoint™ memory. These and various combinations of multiple different types of NVM devices may also be used. For example, hard disk drives (HDDs) can be used in combination with or in place of SSDs or other types of NVM devices in the storage system.

It is therefore to be appreciated that chips112of numerous different types of storage devices can be protected in other embodiments. For example, a given storage system can include a combination of different types of protected storage devices, as in the case of a multi-tier storage system comprising a flash-based fast tier and a disk-based capacity tier. In such an embodiment, each of the fast tier and the capacity tier of the multi-tier storage system comprises a plurality of storage devices with different types of storage devices being used in different ones of the storage tiers. For example, the fast tier may comprise flash drives while the capacity tier comprises HDDs. The particular storage devices used in a given storage tier may be varied in other embodiments, and multiple distinct storage device types may be used within a single storage tier. The term “storage device” as used herein is intended to be broadly construed, so as to encompass, for example, SSDs, HDDs, flash drives, hybrid drives or other types of storage devices.

The term “storage system” as used herein is therefore intended to be broadly construed, and should not be viewed as being limited to particular storage system types, such as, for example, CAS (content-addressable storage) systems, distributed storage systems, or storage systems based on flash memory or other types of NVM storage devices. A given storage system as the term is broadly used herein can comprise, for example, any type of system comprising multiple storage devices, such as NAS, SANs, DAS and distributed DAS, as well as combinations of these and other storage types, including software-defined storage.

The hardware devices102are configured to interact over the network104with the hardware device firmware protection server105and/or storage devices. Such interaction illustratively includes generating IO operations, such as write and read requests, and sending such requests over the network104for processing by the hardware device firmware protection server105.

Also associated with the hardware device firmware protection server105can be one or more input-output devices (not shown), which illustratively comprise keyboards, displays or other types of input-output devices in any combination. Such input-output devices can be used, for example, to support one or more user interfaces to the hardware device firmware protection server105, as well as to support communication between the hardware device firmware protection server105and other related systems and devices not explicitly shown.

The hardware devices102and the hardware device firmware protection server105in theFIG. 1embodiment are assumed to be implemented using at least one processing device. Each such processing device generally comprises at least one processor and an associated memory, and implements one or more functional modules for controlling certain features of the hardware device firmware protection server105.

More particularly, hardware devices102and hardware device firmware protection server105in this embodiment each can comprise a processor coupled to a memory and a network interface.

A network interface, as discussed further below in conjunction withFIG. 4, allows the hardware devices102and/or the hardware device firmware protection server105to communicate over the network104with each other (as well as one or more other networked devices), and illustratively comprises one or more conventional transceivers.

It is to be understood that the particular set of elements shown inFIG. 1for firmware protection using multi-chip storage of firmware images is presented by way of illustrative example only, and in other embodiments additional or alternative elements may be used. Thus, another embodiment includes additional or alternative systems, devices and other network entities, as well as different arrangements of modules and other components.

FIG. 2is a flow diagram illustrating an exemplary implementation of a firmware image splitting and multi-chip storage process200for threshold-based firmware image reconstruction, according to one or more embodiments. In some embodiments, the firmware image splitting and multi-chip storage process200is performed in-memory by the firmware protection module116of hardware device102-1.

Generally, the storage functionality of the exemplary firmware image splitting and multi-chip storage process200allows portions of a firmware image to be stored on the recovery chip array114. As shown inFIG. 2, the exemplary firmware image splitting and multi-chip storage process200initially obtains a firmware image of firmware112to be protected at step202. At step204, the exemplary firmware image splitting and multi-chip storage process200encrypts the firmware image. In at least some embodiments, the firmware image corresponds to a “clean” version of the firmware (e.g., “out of the factory”) before data is generated by the firmware. In other embodiments, the firmware image can correspond to an operational version of the firmware and include data generated by the firmware, as would be apparent to a person of ordinary skill in the art.

The encrypted firmware image is split into N encrypted firmware image portions at step206. For example, the N firmware image portions may comprise one or more shard portions and one or more parity portions (e.g., for error correction) using Reed-Solomon techniques. Generally, as noted above, the threshold-based firmware image reconstruction techniques require a predefined number (e.g., M) of the N firmware image portions to reconstruct the original firmware image, as would be apparent to a person of ordinary skill in the art. Consider a firmware image that is split into two shard portions and one parity portion, for a total of N=3 firmware image portions. In this example, two (=M) of the firmware image portions are needed to reconstruct the firmware image. Thus, as long as only one of the shard portions is corrupted or cannot otherwise be obtained, the firmware image can be reconstructed from the remaining shard portion and the parity portion. In another example, a firmware image that is split into four shard portions and two parity portions, for a total of N=6 firmware image portions. In this example, four (=M) of the firmware image portions are needed to reconstruct the firmware image. Thus, as long as only one or two of the shard portions are corrupted or cannot otherwise be obtained, the firmware image can be reconstructed from the remaining shard and parity portions.

At step208, the encrypted firmware image portions are stored (e.g., flashed or burned) to at least two separate recovery chips114, where each recovery chip114stores a different encrypted firmware image portion.

FIG. 3is a flow diagram illustrating an exemplary implementation of a multi-chip firmware image reconstruction process300that uses threshold-based firmware image reconstruction, according to at least some embodiments. In the example ofFIG. 3, assume that encrypted shard portions of the original firmware image are uploaded to recovery chips114-1and114-2and an encrypted parity portion is uploaded to recovery chip114-3. In some embodiments, the multi-chip firmware image reconstruction process300is implemented by the firmware image recovery module118of the hardware device102-1, for example, when protected firmware112fails to respond a ping message from the global chip recovery module120(for example, suggesting a successful ransomware or other malware attack).

In one or more embodiments, the exemplary multi-chip firmware image reconstruction process300obtains the threshold number of firmware image portions needed for reconstruction of the original firmware image. If one or more portions are missing or corrupted, the exemplary multi-chip firmware image reconstruction process300obtains one or more additional portions from one or more other recovery chips114, so that the original firmware image can be reassembled, and the encryption can be removed before restoring the firmware image to the protected firmware112.

As shown inFIG. 3, the exemplary multi-chip firmware image reconstruction process300initially obtains a threshold number of encrypted firmware image portions at step302, and then validates the obtained encrypted firmware image portions at step304. For example, a firmware image signature (e.g., a hash value and/or an MD5 message digest value) can be used to detect corruption of a given encrypted firmware image portion.

A test is performed at step306to determine if the obtained encrypted firmware image portions have been validated. If it is determined in step306that the obtained encrypted firmware image portions are not validated, then one or more additional encrypted firmware image portions needed for reconstruction are obtained at step308. For example, if one or more shard portions are corrupted or cannot be obtained from recovery chip array114-1or114-2, a parity portion can be obtained from recovery chip array114-3to perform error correction, in a known manner.

If, however, it is determined in step306that the obtained encrypted firmware image portions are validated (or after the encrypted firmware image portions needed for reconstruction are obtained at step308), then the encrypted firmware image portions are merged at step310and the merged firmware image portions are decrypted at step312. The decrypted firmware image is returned at step314.

FIG. 4illustrates the global chip recovery module120of the hardware device firmware protection server105ofFIG. 1initiating a recovery of the protected firmware112ofFIG. 1using the firmware image portions stored on the recovery chip array114ofFIG. 1, according to an embodiment. In some embodiments, the global chip recovery module120can send “ping” messages to (or receive heartbeat messages from) the protected firmware112, for example, at regular or irregular intervals.

In the example ofFIG. 4, the resiliency of the global chip recovery module120to outside attacks may be strengthened using a one-way network diode405to communicate a ping message, for example, the network interface410of a protected hardware device400. The ping message may comprise an Internet Control Message Protocol (ICMP) echo request to the protected firmware112. The protected firmware112sends a reply messages commonly known as a ping message. Thus, a ping command sends an ICMP echo request to the protected hardware device400on a network, and the protected hardware device400responds with an ICMP echo reply. The network interface410may employ a PXE (Pre eXecution Environment) protocol.

The disclosed firmware image recovery functionality may be triggered, for example, when the global chip recovery module120has not received a message or reply from the protected firmware112for a specified interval (for example, suggesting a successful ransomware or other malware attack). A central processing unit (CPU)430implements the multi-chip firmware image reconstruction process300ofFIG. 3to obtain the firmware image portions needed to reconstruct the firmware image from the recovery chip array414and to restore the protected firmware420. The CPU430employs random access memory440, as needed, during the reconstruction before the reconstructed firmware image is restored on the protected firmware420.

It is noted that if stored data in the protected device has been encrypted by the operating system, and the BIOS is infected by ransomware, the encrypted data will be lost (as the ability to decrypt the data is lost). One or more remedial actions may be performed when an attack is detected using the disclosed ping mechanism. For example, the hardware device firmware protection server105can optionally initiate or execute one or more predefined remedial steps and/or mitigation steps to address the detected anomaly. For example, the predefined remedial steps and/or mitigation steps to address the detected anomalies may comprise the transmission of an alert or alarm to the user device102and/or user for important or suspicious events; isolating, removing, quarantining, limiting permissions, analyzing, and deactivating the protected user device102, one or more of the user devices102and/or one or more files, accounts or aspects of the protected user device102, or the user; notifying one or more third party systems (such as sending an email, or generating an alert in another system); restricting access of one or more accounts and one or more machines or services from accessing a network, files or folders; initiating a step-up authentication with one or more additional authentication factors; resetting or limiting permissions associated with a file or folder; quarantining one or more files or folders, and preventing one or more further actions from being executed associated with the protected user device102, user account, service or machine associated with the detected anomalous activity.

FIG. 5is a flow chart illustrating an exemplary implementation of a firmware protection process500that employs multi-chip storage of firmware images, according to one embodiment of the disclosure. As shown inFIG. 5, the exemplary firmware protection process500initially obtains a firmware image at step502. The firmware image is encrypted at step504and the encrypted firmware image is split into a plurality of encrypted firmware image portions at step506. It is noted that in other embodiments, the plurality of encrypted firmware image portions can be generated by splitting the firmware image into a plurality of firmware image portions and then encrypting the plurality of firmware image portions.

The exemplary firmware protection process500then stores the plurality of encrypted firmware image portions on a plurality of recovery chips114at step508. A threshold number of the encrypted firmware image portions from at least two different recovery chips114are needed to reconstruct the firmware image.

The particular processing operations and other network functionality described in conjunction with the flow diagrams ofFIGS. 2, 3 and 5are presented by way of illustrative example only, and should not be construed as limiting the scope of the disclosure in any way. Alternative embodiments can use other types of processing operations for firmware protection using multi-chip storage of firmware images. For example, the ordering of the process steps may be varied in other embodiments, or certain steps may be performed concurrently with one another rather than serially. In one aspect, the process can skip one or more of the actions. In other aspects, one or more of the actions are performed simultaneously. In some aspects, additional actions can be performed.

One or more embodiments of the disclosure provide improved methods, apparatus and computer program products for firmware protection using multi-chip storage of firmware images. The foregoing applications and associated embodiments should be considered as illustrative only, and numerous other embodiments can be configured using the techniques disclosed herein, in a wide variety of different applications.

Among other benefits, the disclosed techniques for firmware protection using multi-chip storage of the firmware image waste the time of a potential attacker, without their knowledge. The disclosed firmware protection techniques break the cyber kill chain at the first step, and the attacker is not aware of the inherent protection of the chip(s). Since portions of the protected firmware image in at least some embodiments are stored in different recovery chips, an attacker has to be able to access the threshold number of firmware portions in order to reconstruct the original firmware image. In addition, the reconstruction of the firmware image and the restoration of the firmware allows any damage that was done, for example, using ransomware to be reversed.

The disclosed techniques for firmware protection using multi-chip storage of firmware images may be implemented using one or more processing platforms. One or more of the processing modules or other components may therefore each run on a computer, storage device or other processing platform element. A given such element may be viewed as an example of what is more generally referred to herein as a “processing device.”

As noted above, illustrative embodiments disclosed herein can provide a number of significant advantages relative to conventional arrangements. It is to be appreciated that the particular advantages described above and elsewhere herein are associated with particular illustrative embodiments and need not be present in other embodiments. Also, the particular types of information processing system features and functionality as illustrated and described herein are exemplary only, and numerous other arrangements may be used in other embodiments.

In these and other embodiments, compute services can be offered to cloud infrastructure tenants or other system users as a PaaS offering, although numerous alternative arrangements are possible.

Cloud infrastructure as disclosed herein can include cloud-based systems such as AWS, GCP and Microsoft Azure. Virtual machines provided in such systems can be used to implement at least portions of a cloud-based firmware protection platform in illustrative embodiments. The cloud-based systems can include object stores such as Amazon S3, GCP Cloud Storage, and Microsoft Azure Blob Storage.

Illustrative embodiments of processing platforms will now be described in greater detail with reference toFIGS. 6 and 7. These platforms may also be used to implement at least portions of other information processing systems in other embodiments.

FIG. 6shows an example processing platform comprising cloud infrastructure600. The cloud infrastructure600comprises a combination of physical and virtual processing resources that may be utilized to implement at least a portion of the information processing system100. The cloud infrastructure600comprises multiple virtual machines (VMs) and/or container sets602-1,602-2, . . .602-L implemented using virtualization infrastructure604. The virtualization infrastructure604runs on physical infrastructure605, and illustratively comprises one or more hypervisors and/or operating system level virtualization infrastructure. The operating system level virtualization infrastructure illustratively comprises kernel control groups of a Linux operating system or other type of operating system.

The cloud infrastructure600further comprises sets of applications610-1,610-2, . . .610-L running on respective ones of the VMs/container sets602-1,602-2, . . .602-L under the control of the virtualization infrastructure604. The VMs/container sets602may comprise respective VMs, respective sets of one or more containers, or respective sets of one or more containers running in VMs.

In some implementations of theFIG. 6embodiment, the VMs/container sets602comprise respective VMs implemented using virtualization infrastructure604that comprises at least one hypervisor. Such implementations can provide firmware protection functionality of the type described above for one or more processes running on a given one of the VMs. For example, each of the VMs can implement firmware protection control logic and firmware image reconstruction functionality for one or more processes running on that particular VM.

In other implementations of theFIG. 6embodiment, the VMs/container sets602comprise respective containers implemented using virtualization infrastructure604that provides operating system level virtualization functionality, such as support for Docker containers running on bare metal hosts, or Docker containers running on VMs. The containers are illustratively implemented using respective kernel control groups of the operating system. Such implementations can provide firmware protection functionality of the type described above for one or more processes running on different ones of the containers. For example, a container host device supporting multiple containers of one or more container sets can implement one or more instances of firmware protection control logic and associated firmware image reconstruction functionality.

The processing platform700in this embodiment comprises at least a portion of the given system and includes a plurality of processing devices, denoted702-1,702-2,702-3, . . .702-K, which communicate with one another over a network704. The network704may comprise any type of network, such as a WAN, a LAN, a satellite network, a telephone or cable network, a cellular network, a wireless network such as WiFi or WiMAX, or various portions or combinations of these and other types of networks.

The processing device702-1in the processing platform700comprises a processor710coupled to a memory712. The processor710may comprise a microprocessor, a microcontroller, an ASIC, an FPGA or other type of processing circuitry, as well as portions or combinations of such circuitry elements, and the memory712, which may be viewed as an example of a “processor-readable storage media” storing executable program code of one or more software programs.

Also included in the processing device702-1is network interface circuitry714, which is used to interface the processing device with the network704and other system components, and may comprise conventional transceivers.

The other processing devices702of the processing platform700are assumed to be configured in a manner similar to that shown for processing device702-1in the figure.

Multiple elements of an information processing system may be collectively implemented on a common processing platform of the type shown inFIG. 6 or 7, or each such element may be implemented on a separate processing platform.

As another example, portions of a given processing platform in some embodiments can comprise converged infrastructure such as VxRail™, VxRack™, VxBlock™, or Vblock® converged infrastructure commercially available from Dell Technologies.

As indicated previously, components of an information processing system as disclosed herein can be implemented at least in part in the form of one or more software programs stored in memory and executed by a processor of a processing device. For example, at least portions of the functionality shown in one or more of the figures are illustratively implemented in the form of software running on one or more processing devices.