Display with power supply mesh

An organic light-emitting diode display may have an array of pixels. The pixels may each have an organic light-emitting diode with a respective anode and may be formed from thin-film transistor circuitry formed on a substrate. A mesh-shaped path may be used to distribute a power supply voltage to the thin-film circuitry. The mesh-shaped path may have intersecting horizontally extending lines and vertically extending lines. The horizontally extending lines may be zigzag metal lines that do not overlap the anodes. The vertically extending lines may be straight vertical metal lines that overlap the anodes. The pixels may include pixels of different colors. Angularly dependent shifts in display color may be minimized by ensuring that the anodes of the differently colored pixels overlap the vertically extending lines by similar amounts.

BACKGROUND

This relates generally to electronic devices and, more particularly, to electronic devices with organic light-emitting diode displays.

Electronic devices often include displays. For example, an electronic device may have an organic light-emitting diode display based on organic-light-emitting diode pixels. Each pixel may have a pixel circuit that includes a respective light-emitting diode. Thin-film transistor circuitry in the pixel circuit may be used to control the application of current to the light-emitting diode in that pixel. The thin-film transistor circuitry may include a drive transistor. The drive transistor and the light-emitting diode in a pixel circuit may be coupled in series between a positive power supply and a ground power supply.

Signals in organic-light-emitting diode displays such as power supply signals may be subject to undesired voltage drops due to resistive losses in the conductive paths that are used to distribute these signals. If care is not taken, these voltage drops can interfere with satisfactory operation of an organic light-emitting diode display. Challenges may also arise in configuring paths to distribute signals within a display while ensuring satisfactory display performance.

SUMMARY

An organic light-emitting diode display may have an array of pixels. The pixels may be formed from organic light-emitting diodes. Each light-emitting diode may have an anode and a cathode.

A mesh-shaped path may be used to distribute a power supply voltage to the thin-film circuitry. The mesh-shaped path may have intersecting horizontally extending lines and vertically extending lines. The horizontally extending lines may be zigzag metal lines that do not overlap the anodes of the light-emitting diodes. The vertically extending lines may be straight vertical metal lines that overlap the anodes.

The pixels may include pixels of different colors. Shifts in display color as a function of viewing angle may be minimized by ensuring that the anodes of the differently colored pixels overlap the vertically extending lines by similar amounts.

DETAILED DESCRIPTION

An illustrative electronic device of the type that may be provided with an organic light-emitting diode display is shown inFIG. 1. Electronic device10may be a computing device such as a laptop computer, a computer monitor containing an embedded computer, a tablet computer, a cellular telephone, a media player, or other handheld or portable electronic device, a smaller device such as a wrist-watch device, a pendant device, a headphone or earpiece device, a device embedded in eyeglasses or other equipment worn on a user's head, or other wearable or miniature device, a display, a computer display that contains an embedded computer, a computer display that does not contain an embedded computer, a gaming device, a navigation device, an embedded system such as a system in which electronic equipment with a display is mounted in a kiosk or automobile, or other electronic equipment.

Input-output circuitry in device10such as input-output devices12may be used to allow data to be supplied to device10and to allow data to be provided from device10to external devices. Input-output devices12may include buttons, joysticks, scrolling wheels, touch pads, key pads, keyboards, microphones, speakers, tone generators, vibrators, cameras, sensors, light-emitting diodes and other status indicators, data ports, etc. A user can control the operation of device10by supplying commands through input-output devices12and may receive status information and other output from device10using the output resources of input-output devices12.

Input-output devices12may include one or more displays such as display14. Display14may be a touch screen display that includes a touch sensor for gathering touch input from a user or display14may be insensitive to touch. A touch sensor for display14may be based on an array of capacitive touch sensor electrodes, acoustic touch sensor structures, resistive touch components, force-based touch sensor structures, a light-based touch sensor, or other suitable touch sensor arrangements. A touch sensor for display14may be formed from electrodes formed on a common display substrate with the pixels of display14or may be formed from a separate touch sensor panel that overlaps the pixels of display14. If desired, display14may be insensitive to touch (i.e., the touch sensor may be omitted).

Control circuitry16may be used to run software on device10such as operating system code and applications. During operation of device10, the software running on control circuitry16may display images on display14.

Display14may be an organic light-emitting diode display. In an organic light-emitting diode display, each pixel contains a respective organic light-emitting diode. A schematic diagram of an illustrative organic light-emitting diode pixel is shown inFIG. 2. As shown inFIG. 2, pixel22may include light-emitting diode38. A positive power supply voltage ELVDD may be supplied to positive power supply terminal34and a ground power supply voltage ELVSS may be supplied to ground power supply terminal36. Diode38has an anode (terminal AN) and a cathode (terminal CD). The state of drive transistor32controls the amount of current flowing through diode38and therefore the amount of emitted light40from display pixel22. Cathode CD of diode38is coupled to ground terminal36, so cathode terminal CD of diode38may sometimes be referred to as the ground terminal for diode38.

To ensure that transistor32is held in a desired state between successive frames of data, display pixel22may include a storage capacitor such as storage capacitor Cst. A first terminal of storage capacitor Cst may be coupled to the gate of transistor32at node A and a second terminal of storage capacitor Cst may be coupled to anode AN of diode38at node B. The voltage on storage capacitor Cst is applied to the gate of transistor32at node A to control transistor32. Data can be loaded into storage capacitor Cst using one or more switching transistors such as switching transistor30. When switching transistor30is off, data line D is isolated from storage capacitor Cst and the gate voltage on node A is equal to the data value stored in storage capacitor Cst (i.e., the data value from the previous frame of display data being displayed on display14). When gate line G (sometimes referred to as a scan line) in the row associated with display pixel22is asserted, switching transistor30will be turned on and a new data signal on data line D will be loaded into storage capacitor Cst. The new signal on capacitor Cst is applied to the gate of transistor32at node A, thereby adjusting the state of transistor32and adjusting the corresponding amount of light40that is emitted by light-emitting diode38.

If desired, the circuitry for controlling the operation of light-emitting diodes for pixels22in display14(e.g., transistors, capacitors, etc. in display pixel circuits such as the display pixel circuit ofFIG. 2) may be formed using configurations other than the configuration ofFIG. 2(e.g., configurations that include circuitry for compensating for threshold voltage variations in drive transistor32, configurations in which an emission enable transistor is coupled in series with drive transistor32, configurations with multiple switching transistors controlled by multiple respective scan lines, configurations with multiple capacitors, etc.). The thin-film transistors in pixels22may be silicon thin-film transistors (e.g., transistors having polysilicon active areas), may be semiconducting-oxide thin-film transistors (e.g., indium gallium zinc oxide transistors), may be n-channel metal oxide-semiconductor transistors, may be p-channel metal-oxide-semiconductor transistors, and/or may include other thin-film circuitry. The circuitry of pixel22ofFIG. 2is merely illustrative.

As shown inFIG. 3, display14may include layers such as substrate layer24. Substrate24and, if desired, other layers in display14, may be formed from layers of material such as glass layers, polymer layers (e.g., flexible sheets of polyimide or other flexible polymers), etc. Substrate24may be planar and/or may have one or more curved portions. Substrate24may have a rectangular shape with left and right vertical edges and upper and lower horizontal edges or may have a non-rectangular shape. In configurations in which substrate24has a rectangular shape with four corners, the corners may, if desired, be rounded. Display substrate24may, if desired, have a tail portion such as tail24T.

Display14may have an array of pixels22. Pixels22form an active area AA of display14that displays images for a user. Inactive border portions of display14such as inactive areas IA along one or more of the edges of substrate24do not contain pixels22and do not display images for the user (i.e., inactive area IA is free of pixels22).

Each pixel22may have a light-emitting diode such as organic light-emitting diode38ofFIG. 2and associated thin-film transistor circuitry (e.g., the pixel circuit ofFIG. 2or other suitable pixel circuitry). The array of pixels22may be formed from rows and columns of pixel structures (e.g., pixels formed from thin-film circuitry on display layers such as substrate24). There may be any suitable number of rows and columns in the array of pixels22(e.g., ten or more, one hundred or more, or one thousand or more). Display14may include pixels22of different colors. As an example, display14may include red pixels that emit red light, green pixels that emit green light, and blue pixels that emit blue light. Configurations for display14that include pixels of other colors may be used, if desired. The use of a pixel arrangement with red, green, and blue pixels is merely illustrative.

As shown in the example ofFIG. 3, display substrate24may have a tail portion such as tail24T that has a narrower width than the portion of substrate24that contains active area AA. This arrangement helps accommodate tail24T within the housing of device10. Tail24T may, if desired, be bent under the rest of display14when display14is mounted within an electronic device housing.

Display driver circuitry20for display14may be mounted on a printed circuit board that is coupled to tail portion24T or may be mounted on tail portion24T. Signal paths such as signal path26may couple display driver circuitry20to control circuitry16. Circuitry20may include one or more display driver integrated circuits and/or thin-film transistor circuitry. During operation, the control circuitry of device10(e.g., control circuitry16ofFIG. 1) may supply circuitry such as display driver circuitry20with information on images to be displayed on display14. To display the images on display pixels22, display driver circuitry20may supply corresponding image data to data lines D while issuing clock signals and other control signals to supporting display driver circuitry such as gate driver circuitry18. Gate driver circuitry18may produce gate line signals (sometimes referred to as scan signals, emission enable signals, etc.) or other control signals for pixels22. The gate line signals may be conveyed to pixels22using lines such as gate lines G. There may be one or more gate lines per row of pixels22. Gate driver circuitry18may include integrated circuits and/or thin-film transistor circuitry and may be located along the edges of display14(e.g., along the left and/or right edges of display14as shown inFIG. 3) or elsewhere in display14(e.g., as part of circuitry20on tail24T, along the lower edge of display14, etc.). The configuration ofFIG. 3is merely illustrative.

Display driver circuitry20may supply data signals onto a plurality of corresponding data lines D. With the illustrative arrangement ofFIG. 3, data lines D run vertically through display14. Data lines D are associated with respective columns of pixels22.

With the illustrative configuration ofFIG. 3, gate lines G (sometimes referred to as scan lines, emission lines, etc.) run horizontally through display14. Each gate line G is associated with a respective row of display pixels22. If desired, there may be multiple horizontal control lines such as gate lines G associated with each row of pixels22. Gate driver circuitry18may assert gate line signals on the gate lines G in display14. For example, gate driver circuitry18may receive clock signals and other control signals from display driver circuitry20and may, in response to the received signals, assert a gate signal on gate lines G in sequence, starting with the gate line signal G in the first row of display pixels22. As each gate line is asserted, data from data lines D is loaded into the corresponding row of display pixels. In this way, control circuitry in device10such as display driver circuitry20may provide pixels22with signals that direct pixels22to generate light for displaying a desired image on display14.

The circuitry of pixels22and, if desired, display driver circuitry such as circuitry18and/or20may be formed using thin-film transistor circuitry. Thin-film transistors in display14may, in general, be formed using any suitable type of thin-film transistor technology (e.g., silicon transistors such as polysilicon thin-film transistors, semiconducting-oxide transistors such as indium gallium zinc oxide transistors, etc.).

Conductive paths (e.g., one or more signal lines, blanket conductive films, mesh-shaped conductive layers, and other patterned conductive structures) may be provided in display14to route data signals D and power signals such as positive power supply signal ELVDD and ground power supply signal ELVSS to pixels22. As shown inFIG. 3, these signals may be provided to pixels22in active area AA using signal routing paths P. Paths P may be formed from metal lines and/or other conductive structures that receive signals D, ELVDD, and ELVSS from tail portion24T of display14.

A cross-sectional side view of a portion of active area AA of display14showing an illustrative configuration that may be used for forming pixels22is shown inFIG. 4. As shown inFIG. 4, display14may have a substrate such as substrate24. Thin-film transistors, capacitors, and other thin-film transistor circuitry50(e.g., thin-film circuitry such as the illustrative pixel circuitry ofFIG. 2) may be formed on substrate24. Pixel22may include organic light-emitting diode38. Anode AN of diode38may be formed from metal layer58(sometimes referred to as an anode metal layer). Each diode38may have a cathode CD formed from conductive cathode structures such as cathode layer60. Layer60may be, for example, a thin layer of metal such as a layer of magnesium silver with a thickness of 10-18 nm, more than 8 nm, less than 25 nm, etc. Layer60may cover all of pixels22in active area AA of display14and may have portions that extend into inactive area IA display14(e.g., so that layer60is coupled to ground power supply paths that supply layer60with ground power supply voltage ELVSS).

Each diode38has an organic light-emitting emissive layer (sometimes referred to as emissive material or an emissive layer structure) such as emissive layer56. Emissive layer56is an electroluminescent organic layer that emits light40in response to applied current through diode38. In a color display, emissive layers56in the array of pixels in the display include red emissive layers for emitting red light in red pixels, green emissive layers for emitting green light in green pixels, and blue emissive layers for emitting blue light in blue pixels. In addition to the emissive organic layer in each diode38, each diode38may include additional layers for enhancing diode performance such as an electron injection layer, an electron transport layer, a hole transport layer, and a hole injection layer. Layers such as these may be formed from organic materials (e.g., materials on the upper and lower surfaces of electroluminescent material in layer56).

Layer52(sometimes referred to as a pixel definition layer) has an array of openings containing respective portions of the emissive material of layer56. An anode AN is formed at the bottom of each of these openings and is overlapped by emissive layer56. The shape of the diode opening in pixel definition layer52therefore defines the shape of the light-emitting area for diode38.

Pixel definition layer52may be formed from a photoimageable material that is photolithographically patterned (e.g., dielectric material that can be processed to form photolithographically defined openings such as photoimageable polyimide, photoimageable polyacrylate, etc.), may be formed from material that is deposited through a shadow mask, or may be formed from material that is otherwise patterned onto substrate24. The walls of the diode openings in pixel definition layer52may, if desired, be sloped, as shown by sloped sidewalls64inFIG. 4.

Thin-film circuitry50may contain transistors such as illustrative transistor32. Thin-film transistor circuitry such as illustrative thin-film transistor32ofFIG. 4may have active areas (channel regions) formed from a patterned layer of semiconductor such as layer70. Layer70may be formed from a semiconductor layer such as a layer of polysilicon or a layer of a semiconducting-oxide material (e.g. indium gallium zinc oxide). Source-drain terminals72may contact opposing ends of semiconductor layer70. Gate76may be formed from a patterned layer of gate metal or other conductive layer and may overlap semiconductor70. Gate insulator78may be interposed between gate76and semiconductor layer70. A buffer layer such as dielectric layer84may be formed on substrate24under shield74. A dielectric layer such as dielectric layer82may cover shield74. Dielectric layer80may be formed between gate76and source-drain terminals72. Layers such as layers84,82,78, and80may be formed from dielectrics such as silicon oxide, silicon nitride, other inorganic dielectric materials, or other dielectrics. Additional layers of dielectric such as polymer planarization layers PLN1and PLN2or other organic planarization layers may be included in thin-film transistor structures such as the structures of transistor32and may help planarize display14.

Display14may have multiple layers of conductive material embedded in the dielectric layers of display14such as metal layers for routing signals through pixels22. Shield layer74may be formed from a first metal layer (as an example). Gate layer76may be formed from a second metal layer. Source-drain terminals such as terminals72and other structures such as signal lines86may be formed from portions of a third metal layer such as metal layer SD1. Metal layer SD1may be formed on dielectric layer80and may be covered with planarization dielectric layer PLN1. A fourth layer of metal such as metal layer SD2may be used in forming diode via portion88, signal lines90, and power supply paths such as path92(e.g., a mesh-shaped ELVDD layer). In active area AA, a fifth layer of metal such as anode metal layer58may form anodes AN of diodes38. The fifth metal layer in each pixel may have a portion such as via portion58P that is coupled to via portion88, thereby coupling one of the source-drain terminals of transistor32to anode AN of diode38. A sixth layer of metal (e.g., a blanket film) such as cathode metal layer60may be used in forming cathode CD for light-emitting diode38. Anode layer58may be interposed between metal layer SD2and cathode layer60. Layers such as layer58, SD2, SD1,76, and74may be embedded within the dielectric layers of display14that are supported on substrate24. If desired, fewer metal layers may be provided in display14or display14may have more metal layers. The configuration ofFIG. 4is merely illustrative.

It is desirable to minimize ohmic losses (sometimes referred to as IR losses) when distributing power signals to pixels22to ensure that display14operates efficiently and produces images with even brightness across display14. Ohmic losses may be minimized by incorporating low-resistance signal pathways into through display14.

Consider, for example, the power supply path used to distribute positive power supply ELVDD. If the resistance associated with this path is too high, IR losses may cause the positive power supply voltage of pixels22near the lower edge of display14where ELVDD is supplied to be greater in magnitude than the positive power supply voltage of pixels22in the middle of display14. This can cause undesired variations in pixel brightness.

To minimize undesired IR losses, the conductive path that is used in distributing power supply voltage ELVDD (sometimes referred to as the positive power supply path, positive power supply distribution path, etc.) may be formed using a mesh-shaped pattern of conductive material (e.g., metal). For example, power supply path92ofFIG. 4may be formed from a grid of interconnected metal lines with an array of openings that accommodate vias and other thin-film structures (see, e.g., via portion58P, signal lines90, etc.). This type of mesh-shaped power supply distribution path may exhibit a low sheet resistance and minimal IR losses, thereby enhancing display brightness uniformity.

As shown inFIG. 5, at least some of the metal layer58that forms anode AN may overlap power supply distribution path92. Planarization layer PLN2may cover path92and anode AN may be formed on upper surface94of layer PLN2. The thickness H of the metal layer (SD2) that forms path92may be, for example, 0.7 microns, 0.5 to 0.9 microns, 0.2 to 1.2 microns, more than 0.2 microns, less than 0.9 microns, or other suitable thickness. The thickness T of planarization layer PLN2may be, for example, 0.9 microns, 0.7 to 1.1 microns, more than 0.5 microns, less than 1.5 microns, or any other suitable thickness.

It may be desirable to limit the total thickness of planarization layer PLN2(e.g., to minimize outgassing from the polymer of layer PLN2). When the thickness of layer PLN2is limited, upper surface94of planarization layer PLN2may be sloped under part of anode AN due to the presence of path92. Sloped portion94′ of surface94may have a surface normal ns that is oriented at a non-zero angle with respect to surface normal n of the unsloped (planar) portion of surface94(i.e., surface normal ns of sloped portion94′ may be oriented at a non-zero angle with respect to the surface normal of display14).

Due to the presence of sloped portions94′ in pixels22(and, in particular, different amounts of sloped portions94′ in pixels of different colors), there is a risk that display14will exhibit changes in color as a function of viewing angle. In configurations for display14in which each pixel22has an anode AN with a similar amount of sloped area, display14will exhibit reduced color shifts as a function of changes in viewing angle. For example, the white point of display14will exhibit reduced color shifts as a function of changes in the angle with which display14is viewed.

In view of these considerations, it may be desirable to limit the amount of sloped area (portion94′) relative to the total surface area of anode AN in each pixel22and/or to limit the amount of variation in the sloped area of each pixel between pixels of different colors. As an example, it may be desirable for the overlap area (the area consumed by sloped portion94′) in the red, green, and blue pixels of display14to vary by less than 30%, less than 20%, less than 15%, less than 10%, less than 5%, or less than 2% from each other.

An illustrative configuration for display14in which display14has a mesh-shaped power supply distribution path92is shown inFIG. 6. As shown inFIG. 6, display14may include red pixels R, green pixels G, and blue pixels B with respective anodes AN. Anodes AN have diamond shapes in the example ofFIG. 6. If desired, anodes AN may have circular shapes, hexagonal shapes, rectangular shapes in which the edges of the anodes run horizontally and vertically, triangular shapes, or other suitable shapes. As shown in the example ofFIG. 6, diamond-shaped anodes AN may have edges that extend diagonally with respect to vertical dimension Y (and corresponding diamond-shaped openings in pixel definition layer52and corresponding diamond-shaped regions of emissive layer56). Anodes of other shapes may be used, if desired.

The anodes AN of green pixels G may extend horizontally across display14in rows. A row of alternating red pixels R and blue pixels B may be interposed between each pair of green pixel rows. For example, if the first and third rows of display14contain only green pixels, the second row of display14may contain red and blue pixels. Other patterns of pixel colors may be used, if desired. For example, even (or odd) rows of the array of pixels22of display14may contain alternating green and blue pixels and odd (or even) rows of the array of pixels22of display14may contain alternating red and green pixels (as an example). The use of the pixel color pattern ofFIG. 6is merely illustrative.

Power supply distribution path92may have a mesh shape (grid shape) formed from a network of intersecting horizontally extending and vertically extending metal lines. As shown inFIG. 6, mesh-shaped path92may have a grid of interconnected metal lines formed from a patterned metal layer (e.g., metal layer SD2) with an array of openings96. Openings96may be arranged in rows and columns and may be aligned with red pixels R, green pixels G, and blue pixels B. Contacts98may be formed from via portions58P and88in openings96(see, e.g.,FIG. 4).

The mesh shape of power supply distribution path92may help reduce IR losses when distributing power to pixels22(e.g., when distributing positive power supply voltage ELVDD). As shown inFIG. 6, the grid of path92may be formed from horizontal lines that extend horizontally across display14along dimension X. Each horizontal line in mesh-shaped path92may have segments92H that extend horizontally (parallel to horizontal dimension X) and interspersed diagonal segments92D that run diagonally. The diagonal segments92D are each located between opposing diagonal edges of a pair of the anodes. The horizontally extending portions (lines) of path92therefore exhibit a zigzag metal line shape that allows these portions of path92to avoid crossing any anodes AN. Because the use of zigzag horizontal lines in path92helps prevent the horizontally extending portions (horizontal grid lines) of path92from overlapping anodes AN, the arrangement ofFIG. 6helps prevent formation of sloped portions of anodes AN where the anodes AN overlap horizontal portions of path92. As a result, anodes AN may only overlap vertical portions of path92and may exhibit similar overlap areas.

Power supply currents may flow vertically through display14(e.g., from tail24T upwards to the columns of pixels22). As a result, it may be desirable to use grid lines without zigzags when forming the vertically extending portions of path92. As shown in the example ofFIG. 6, each vertically extending portion of path92(each vertical grid line of path92) may be formed from a straight vertical line92V that runs parallel to dimension Y. The use of vertical lines92V in path92may help to minimize IR losses by minimizing vertical line lengths and may allow the layout of path92to satisfy design rules (e.g., by supplying sufficient spacing between path92and adjacent structures).

The use of vertical lines92V may give rise to an overlap between vertical lines92V of path92and anodes AN, as shown inFIG. 6. Anodes AN may have diamond shapes with edges that extend diagonally (at a non-zero angle) with respect to vertical lines92V. As described in connection withFIG. 5, angularly dependent color shifts may be minimized by ensuring that the size of each overlap region (i.e., the amount of anode area in each pixel that overlaps path92) is substantially the same for the red pixels R, the blue pixels B, and the green pixels G. If, for example, the overlap between the anode AN of each pixel R and path92is characterized by area OR, the overlap between the anode AN of each green pixel G and path92is characterized by area OG, and the overlap between the anode AN of each blue pixel B and path92is characterized by area OB, changes in display color cast as a function of viewing angle for display14may be minimized by ensuring that OR, OG, and OB are all within 30% of each other, within 20% of each other, within 15% of each other, within 10%, of each other, within 5% of each other, within 2% of each other, within 1-40% of each other, etc.