Directional coupler

A directional coupler for duplex transmission for use with a transmitter/receiver unit is described. It includes a memory unit for providing a correction signal and a compensation circuit to which the correction signal is applied to supress that portion of the received signal which is derived from the transmitter. The memory unit is capable of storing values of the correction signal, the values being assigned to the different possible varients within a selected period of time, of time functions coming from the transmitter, and a decoder connected between the transmitter and the memory unit for detection of actual, transmitted signal variants. The decoder includes means for selection in the memory unit of the values of the correction signal assigned to the actual signal variants.

The present invention relates to a directional coupler for duplex 
transmission, said coupler including a device for providing a correction 
signal and a compensation circuit to which said correction signal is 
applied for supression of that part of the received signal which is caused 
by its own transmitted signal. 
The known technique is illustrated in FIGS. 1-4. 
A general block diagram as shown in FIG. 1 illustrates duplex transmission 
on a single transmission channel, S, denoting transmitter, M denoting 
receiver and DK denoting directional coupler (traditionally a hybrid 
transformer). The connection between the two directional couplers is a 
simple transmission channel, e.g. a two-wire line. 
With an ideal coupler one would obtain an equivalent diagram as shown in 
FIG. 2, where H.sub.1 and H.sub.2 are the transfer functions of the line 
in the two directions. 
However, in practice a portion of the signal from S.sub.1 will in addition 
be transferred partly through the coupler and partly be reflected via the 
line to M.sub.1 with a transfer function H.sub.3, and likewise from 
S.sub.2 via a H.sub.4 to M.sub.2, as will appear from FIG. 3. 
The unwanted transfer functions H.sub.3 and H.sub.4 are in general complex 
and in many applications variable with respect to time. 
Known methods for eliminating the effect of H.sub.3 and H.sub.4 
(echo-cancellation) consist in synthesizing a correction signal in the 
form of a copy of the signal (provided by H.sub.3 and H.sub.4) of the 
signal caused by H.sub.3 and H.sub.4 respectively, and subtract that from 
the incoming signal, as e.g. shown in FIG. 4. 
The circuit can be made adaptive by means of feedback if it may be assumed 
that transmitted and received signals are uncorrelated (statistically 
independent). 
Known methods for synthesizing the transfer function H.sub.3 use: 
(a) Convolution integral: 
##EQU1## 
where h(.tau.) is the impulse response of the line. (b) Transversal 
filter: 
##EQU2## 
where .alpha..sub.n is the coefficients of the filter and where x(t) and 
y(t) are input and output signals of H.sub.3, respectively. 
Both methods can be made adaptive by repeated measurement of the impulse 
response of the line and modifications of h(.tau.) and .alpha..sub.n, 
respectively, dependent therefrom. A great disadvantage of both methods is 
that they require complicated apparatus with a great demand for computing 
capacity.

What makes H.sub.3 complex is the output signal being dependent on the time 
function of the input signal over a certain time, see FIG. 5. 
In practice it will be a finite memory time .tau. which is important. 
If x(t) within a period of time .tau. has a finite number of possible 
variants of time functions, it is possible to tabulate the corresponding 
variants of the value y and use the description the time function of x(t) 
to choose the y-value. 
Realization becomes particularly simple if x(t) is, for example, a digital 
biphase signal, since an array of, for example, three periods of a biphase 
signal only can appear in 2.sup.3 =8 different ways, see FIG. 6. 
For practical lengths of lines .tau. may, for example, be approximately of 
the duration 2-4 biphase periods. That is, the number of differenct 
antecedents (previously transmitted signals) is 2.sup.2 -2.sup.4 =4-16, 
for a definite point of time during the biphase period. The number of 
points of time in the period being necessary to observe/synthesize may be 
from 1-8 or more, depending on synchronizing conditions and other system 
specifications. Thus, the number of different values of y at the sampling 
times are 4-128. Practical figures are: 3 periods antecedents and 8 
samples per period, i.e. a total of 2.sup.3 .times.8=64 different values 
of y. 
FIG. 7 illustrates how according to the present invention one may provide a 
circuit for synthesizing the signal which is to compensate for the effect 
of transfer functions H.sub.3, which as seen is caused by reflections of 
the transmitted signal from S.sub.1 and crosstalk due to non-ideal 
balancing of the line. In the figure HUK is a memory unit and ADR is a 
detector detecting the actual variant of time function from the 
transmitter S.sub.1 and generating the memory address where the assigned 
value of the actual variant of the signal transmitted from S.sub.1 is 
stored. 
The array of assigned values coming from the memory unit yield the 
correction signal, which in the compensation circuit KK is subtracted from 
the received signal. 
The memory HUK must contain information about the actual transmission 
channel, so that the signal T, which the circuit H.sub.3 provides, is 
equal to the incoming signal R when S.sub.2 does not transmit. The 
difference signal S then becomes zero. When S.sub.2 later starts to 
transmit, the circuit will subtract from the incoming signal R that 
portion which is caused by its own transmitted signal and the difference S 
will be the portion which is caused by transmitted signal from S.sub.2 via 
the transfer function H.sub.2. 
FIG. 8 illustrates an embodiment where the memory unit HUK is a digital, 
read-only memory, and where the correction signal is converted to analogue 
form in a digital-to-analogue converter D/A. The compensation curcuit is 
an analogue summing circuit .SIGMA.. 
As a requirement for an adaptive version of the directional coupler the 
transmitted and received signals must be uncorrelated over a certain 
period of time (statistically independent), but they may be synchronous or 
asynchronous. 
If one observes the instantaneous value of received signal S at M.sub.1, 
see FIG. 7, for several occasions of a definite sequence of the 
transmitted signal from S.sub.1, corresponding to a definite memory 
address, the average value will be approximately zero as a result of the 
signals being uncorrelated. A change of the transfer function H.sub.3 will 
however provide a systematic shift of the average value of the received 
signal. 
A registration of said shift and a corresponding modification of the 
assigned value will bring the content of the memory in conformity with 
H.sub.3 once more. In FIG. 9 is shown a general diagram of such an 
adaptive version of the directional coupler. 
FIG. 10 illustrates an embodiment having a digital write/read memory and an 
analogue-to-digital converter and adder unit in the memory feed-back path. 
The averaging of the received signal takes place in that the 
analogue-to-digital converter, the adder unit and the memory for a 
definite address constitute a digital integrator, see FIG. 11, defined by 
the following equation: 
EQU Y.sub.i =Y.sub.i-1 +.alpha.X.sub.i (1) 
EQU The increment .DELTA.Y=.alpha.X.sub.i (2) 
By numerical integration: 
EQU Y=(1/T).rho.X.multidot..DELTA.t (3) 
and 
EQU .DELTA.Y=(.DELTA.t/T)X (4) 
.DELTA.t=step length 
T=the time constant of the integrator 
Comparing (2) and (4) yields: .alpha.=(.DELTA.t/T) 
.alpha. is determined by the conversion constant of the analogue-to-digital 
converter and a possible rescaling upon connection to the adder unit and 
influences the transient time of the integrator. The longer the permissive 
transient time, the more accurate will be the synthesized signal T. 
It has been determined that the analogue-to-digital converter in FIG. 10, 
which is a comparatively large and complicated circuit, may be omitted by 
a coupling as shown in FIG. 12, where the compensation circuit is a 
comparator K. 
The circuit of FIG. 10 uses the amount (with sign) of the deviation to 
modify the content in the memory. 
The simplified adaptive circuit in FIG. 12 uses only the sign of the 
deviation by adding +1, or possibly -1, to the content of the memory. 
The difference between the two circuits is mainly that the first one adapts 
somewhat faster when turned on or upon a large and abrupt change of 
H.sub.3. Both circuits will however during normal operation be equally 
accurate. 
An alternative method is as follows. An increased accuracy of the 
synthesized signal T requires that a longer portion of the antecedents of 
the biphase signal be considered. This yields a doubling of the size of 
the memory for an increase of one period of the antecedents of the biphase 
signal. For comparatively long lines and high bit-frequencies, it will be 
required that comparatively extensive antecedents are considered, and in 
order to save memory space it may be advantageous to provide a somewhat 
different device as described below. 
Instead of letting the memory contain the actual figures which are to be 
applied to the digital-to-analogue converter, one may in the memory retain 
parts of the actual figures which have to be added with signs dependent of 
the antecedents of the transmitted signal in order to obtain the finite 
output value. 
If one considers the biphase signal formed by an array of single pulses 
having a form shown in FIG. 13, the instantaneous value of the synthesized 
signal may be said to consist of a contribution from a portion of the 
closest preceding single pulses which the biphase signal is composed of. 
If the memory thus contains figures for the effect of a single pulse, for 
an array of moments after the commencement of the pulse (the pulse 
response of the line), the instantaneous value can be recreated by adding 
with proper sign the content of the memory spaces corresponding to 
complete biphase periods in time backwards from the sampling moment. The 
signs are determined from the transmitted biphase signal. Logic 1-pulse 
provides, for example, + and logic 0-pulse provides -. It must therefore 
be added so many figures as the number of periods of antecedents of the 
biphase signal considered necessary. 
For a system with 7 periods of antecedents and 8 samples per period the 
memory may be arranged in registers as follows: 
A.sub.0 A.sub.1 A.sub.2 A.sub.3 A.sub.4 A.sub.5 A.sub.6 A.sub.7 
B.sub.0 B.sub.1 B.sub.2 B.sub.3 B.sub.4 B.sub.5 B.sub.6 B.sub.7 
C.sub.0 C.sub.1 C.sub.2 C.sub.3 C.sub.4 C.sub.5 C.sub.6 C.sub.7 
D.sub.0 D.sub.1 D.sub.2 D.sub.3 D.sub.4 D.sub.5 D.sub.6 D.sub.7 
E.sub.0 E.sub.1 E.sub.2 E.sub.3 E.sub.4 E.sub.5 E.sub.6 E.sub.7 
F.sub.0 F.sub.1 F.sub.2 F.sub.3 F.sub.4 F.sub.5 F.sub.6 F.sub.7 
G.sub.0 G.sub.1 G.sub.2 G.sub.3 G.sub.4 G.sub.5 G.sub.6 G.sub.7 
where the index indicates sample number (0-7). Thus, the different 
registers (A, B, C etc.) contain figures for the effect of a logic pulse 
(see FIG. 13) at the 1st, 2nd, 3rd etc. period after the pulse was 
transmitted. (It is assumed that the numerical value of the effect is 
equal for a logic 1-pulse and a logic 0-pulse). FIG. 14 illustrates how 
such a circuit can be constructed. ADR denotes an address decoder and sign 
logic, F.sub.1 sign selector, AKK accumulator register and ADD.sub.1 adder 
unit. 
The circuit may be made adaptive by updating the registers on the basis of 
the sign of the output signal S (see FIG. 15). 
In order to save computing time it may, for example, be sufficient that 
only one of the register spaces is updated for each sample. In the course 
of 56 samples all the spaces will have received an updating. In practice 
this has for a number of applications proved to be sufficiently frequent, 
even though the circuit of FIG. 15 then will adapt slower than the circuit 
of FIG. 12. 
The sign logic (included in the ADR unit) determines the sign of the actual 
periods of the antecedents and provides the sign for the register under 
treatment. The sign selector sets the correct sign on the figures arriving 
from the memory. 
The unit F.sub.2 in FIG. 15 determines if there is to be added or 
subtracted a 1 to or from the content of a register subjected to updating. 
This is determined by the sign of the register in question and the sign of 
the deviation S according to normal sign rules (- and + is -, - and - is 
+, etc.). 
The principle on which the said circuit is based may also be considered 
used for other types of pulses, e.g. normal binary code, but one must then 
define more types of pulse elements (than those in FIG. 13), and 
corresponding registers for the effect of these. 
The number of memory spaces necessary in the system shown in FIG. 15 
becomes 
EQU N=n.multidot.m 
where n is the number of samples per period of the biphase signal and m is 
equal to the number of periods of antecedents. In the previous described 
system (FIG. 12) there is correspondingly obtained 
EQU N=n.multidot.2.sup.m 
This system will thus always require more memory spaces, but this is 
compensated by leaving the rest of the equipment much simpler and setting 
far less requirements for speed and thereby power consumption. This in 
turn influences the package density and finally the price. 
For many practical applications it is considered sufficient to consider 3-4 
periods of the antecedents, and in that case the circuit of FIG. 10 is 
preferred. 
FIG. 16 illustrates an adaptive version of the analogue embodiment of the 
coupler. In this example each memory location is embodied by a capacitor C 
and a switch B. The stored values are given by the charges on the 
capacitors. The coupler is made adaptive by means of introducing a 
resistor in the feed-back between the summation circuit and the memory HUK 
for modification of the values selected by the decoder ADR. 
In the context of the present disclosure, "antecedents" denotes previously 
transmitted signals.