Digital transponder with real signal channelizer and synthesizer

Embodiments disclosed herein relate generally to digital transponders. In one broad aspect, there is provided a digital transponder comprising: (a) an analog to digital converter configured to receive a real analog wideband multi-carrier signal and generate a real digital wideband multi-carrier signal from the real analog wideband multi-carrier signal, the real analog wideband multi-carrier signal spans M element channels, M being an integer greater than or equal to one; (b) a channelizer configured to channelize the real digital wideband multi-carrier signal into 2M channelized digital signals, the 2M channelized digital signals comprising M pairs of channelized digital signals, each pair of channelized digital signals comprising a primary channelized digital signal and a secondary channelized digital signal, the secondary channelized digital signal being an image of the primary channelized digital signal; (c) a switch matrix and signal construction module configured to generate a plurality of intermediate signals from only the primary channelized digital signals, the plurality of intermediate signals comprising pairs of intermediate signals, each pair comprising a primary intermediate signal and a secondary intermediate signal, the secondary intermediate signal being an image of the primary intermediate signal; (d) at least one synthesizer, the at least one synthesizer configured to combine at least one pair of intermediate signals to generate a real digital output signal; and (e) at least one digital to analog converter, the at least one digital to analog converter configured to convert the real digital output signal to an analog output signal.

FIELD

The described embodiments relate to the field of digital transponders. More particularly, the described embodiments relate to digital transponders which utilize channelizers and synthesizers where the input to the channelizers and the output of the synthesizers are in real format.

BACKGROUND

Transponders used in communication systems, such as satellite communication systems, tend to receive an incoming signal at a particular frequency and retransmit all or portions of the signal at a different frequency. Simple transponders can be thought of as repeaters since they typically receive an incoming signal and retransmit the entire received signal at a different frequency. More sophisticated transponders, however, may have the ability to break the received signal into multiple frequency bands or channels and then reconfigure the frequency bands or channels prior to retransmission.

Typically the more sophisticated digital transponders include five components: a digitizer module, a channelizer module, a switch module, a recombiner module and a digital to analog conversion module. The digitizer module digitizes the received analog signal, the channelizer divides the received signal into multiple channels, the switch module reconfigures the channels, the recombiner module combines the reconfigured channels to form one or more digital output signals, and the digital to analog conversion module converts the digital output signals into analog output signals.

Typically the channelizer module and the recombiner module are implemented as polyphase filter-based signal processors. These polyphase filter-based signal processors typically work with signals in complex format (in-phase and quadrature components separately) to minimize the dimensions of the polyphase filter banks. However, dealing with signals in complex format increases the number of conversion modules required and increases the complexity of the interfaces. This is particularly true with respect to the input and output ports of the digital processors.

SUMMARY

Embodiments disclosed herein relate generally to digital transponders and methods of converting at least one input wideband multi-carrier signal into at least one analog output wideband multi-carrier signal using the digital transponder.

In one broad aspect, there is provided a digital transponder comprising: (a) an analog to digital converter configured to receive a real analog wideband multi-carrier signal and generate a real digital wideband multi-carrier signal from the real analog wideband multi-carrier signal, the real analog wideband multi-carrier signal comprising M channels, M being an integer greater than or equal to one; (b) a channelizer configured to channelize the real digital wideband multi-carrier signal into 2M channelized digital signals, the 2M channelized digital signals comprising M pairs of channelized digital signals, each pair of channelized digital signals comprising a primary channelized digital signal and a secondary channelized digital signal, the secondary channelized digital signal being an image of the primary channelized digital signal; (c) a switch matrix and signal construction module configured to generate a plurality of intermediate signals from only the primary channelized digital signals, the plurality of intermediate signals comprising pairs of intermediate signals, each pair comprising a primary intermediate signal and a secondary intermediate signal, the secondary intermediate signal being an image of the primary intermediate signal; (d) at least one synthesizer, the at least one synthesizer configured to combine at least one pair of intermediate signals to generate a real digital output signal; and (e) at least one digital to analog converter, the at least one digital to analog converter configured to convert the real digital output signal to an analog output signal.

In another broad aspect, there is provided a method of converting at least one input wideband multi-carrier signal into at least one analog output wideband multi-carrier signal, the method comprising: (a) receiving the input wideband multi-carrier signal, the input wideband signal being a real analog signal and comprising M channels, M being an integer greater than or equal to one; (b) digitizing the input wideband multi-carrier signal to produce a real digital input wideband multi-carrier signal; (c) channelizing the real digital wideband multi-carrier signal into 2M separate channelized digital signals, the 2M channelized digital signals comprising M pairs of channelized digital signals, each pair of channelized digital signals comprising a primary channelized digital signal and a secondary channelized digital signal, the secondary channelized digital signal being an image of the primary channelized digital signal; (d) generating a plurality of intermediate signals from only the primary channelized digital signals, the plurality of intermediate signals comprising pairs of intermediate signals, each pair comprising a primary intermediate signal and a secondary intermediate signal, the secondary intermediate signal being an image of the primary intermediate signal; (e) synthesizing at least one pair of intermediate signals to generate at least one real digital output signal; and (f) converting the at least one real digital output signal to the at least one real analog output signal.

DETAILED DESCRIPTION

Reference is now made toFIG. 1, in which a digital transponder100in accordance with an embodiment is illustrated. The digital transponder100receives a real analog wideband multi-carrier signal112with one or more frequency bands or channels, and generates one or more analog output signals1240to124P−1. Each analog output signal1240to124P−1is centered at a predetermined intermediate frequency (IF), and includes at least a portion of the frequency bands or channels of the real analog wideband multi-carrier signal112. Typically, the predetermined intermediate frequencies of the analog output signals1240to124P−1are distinct from the intermediate frequency of the real analog wideband multi-carrier signal112.

In the embodiment shown inFIG. 1, the transponder100includes an analog to digital converter (ADC)102, a channelizer104, a switch matrix and signal construction (SM & SC) module106, one or more synthesizers1080to108P−1and one or more digital to analog converters (DACs)1100to110P−1. Typically the transponder100includes one synthesizer108and one DAC110for each analog output signal124generated by the transponder100. The letter P will be generally used to denote the number of analog output signals124generated by the transponder100. Note that while in some embodiments, such as that shown inFIG. 1, the transponder100includes more than one synthesizer108and more than one DAC110, where the transponder100produces only one analog output signal124, the transponder100may only include a single synthesizer108and a single DAC110.

Each of the ADC102, the channelizer104, the SM & SC module106, the synthesizers108and the DACs110may be implemented in hardware, firmware (i.e. a field programmable gate array (FPGA) or the like), or in software (i.e. via a processor or the like), but they do not all need to be implemented in the same manner. Accordingly, some may be implemented in hardware where others may be implemented in firmware or software.

The ADC102receives the real analog wideband multi-carrier signal112comprising M frequency bands or channels where M is an integer greater than or equal to 1. Each of the M frequency bands or channels has the same bandwidth, Bc, referred to as the element channel bandwidth. While the frequency bands can be designed to carry one or more narrow band signals, certain wideband signals may occupy multiple frequency bands. Accordingly, the real analog wideband multi-carrier signal112may be comprised of a plurality of signals with varying bandwidths. For example, say M is equal to six, such that the real analog wideband multi-carrier signal112is comprised of six frequency bands numbered0to5. Band0may represent a single signal with a bandwidth Bc, bands1and2may together represent a wider band signal with a bandwidth 2Bc, and bands3,4and5may together represent and even wider band signal with a bandwidth 3Bc.

The real analog wideband multi-carrier signal112may be a version of a radio frequency (RF) signal received by an antenna that has been down converted to a low intermediate frequency (IF). Anti-aliasing filtering may also be performed on the real analog wideband multi-carrier signal112prior to being sent to the ADC102. The ADC102digitizes the received real analog wideband multi-carrier signal112, and outputs a real digital wideband multi-carrier signal114. The ADC102operates at a sampling frequency, fs, which according to Nyquist's theory must be at least two times the bandwidth, Bwb, of the real analog wideband multi-carrier signal112.

Reference is now made toFIG. 2, in which the frequency domain characteristics of the real digital wideband multi-carrier signal114are illustrated. It can be seen fromFIG. 2that the real digital wideband multi-carrier signal114has symmetric frequency domain characteristics. Specifically, the real digital wideband multi-carrier signal114can be divided into 2M frequency bands or channels2020to202M−1and2040to204M−1where the second block of channels2040to204M−1are the images of the first block of channels2020to202w. For example, if channel2021has a center frequency of f1, then channel2041is a mirror image of channel2021centered at frequency f1. Each channel2020to202M−1and2040to204M−1of the digital wideband multi-carrier signal114has the same bandwidth, Bc. The element channel bandwidth, Bc, is related to the ADC102sampling frequency, fs, by the ratio fs/2M. Factors that may be considered in choosing the element channel bandwidth, Bc, include the system needs, the last intermediate frequency of the digital output signals122, the bandwidth configuration step size of the digital output signals122, and the ADC102and digital processor speeds.

Referring back toFIG. 1, the channelizer104receives the real digital wideband multi-carrier signal114from the ADC102and extracts the 2M channels2020to202M−1and2040to204M−1from the real digital wideband multi-carrier signal114and down converts them to baseband. The extracted and down converted channels are output as channelized digital signals1160to116M−1. The first block of channelized digital signals1160to116M−1, hereafter referred to as the primary channelized digital signals, correspond to the first block of channels2020to202M−1of the real digital wideband multi-carrier signal114, and the second block of channelized digital signals116M−1to116M−1, hereafter referred to as the secondary channelized digital signals, correspond to the second block of channels2041to204M−1and2040of the real digital wideband multi-carrier signal114respectively. The relationship between the channelized digital signals and the channels of the real digital wideband multi-carrier signal is shown in Table 1. As noted above, channels2040to204M−1are the images of channels2020to202M−1thus the secondary channelized digital signals116M−1and116M−1to116M+1are the images of the primary channelized digital signals1160to116M−1. Since the channelizer104not only divides the real digital wideband multi-carrier signal114into its M channels, but it also divides each channel into its in-phase and quadrature components, the channelizer104functions as both a channelizer and an I/Q demodulator.

By performing both channelizer and I/Q demodulation functions the channelizer104offers significant advantages over known channelizers which typically require the I/Q demodulation to occur prior to channelization. For example, in a typical transponder system an analog signal is received by an analog quadrature demodulator which divides the analog signal into two analog signals—its in-phase component and its quadrature component. Each component or signal is then sent to a separate analog to digital converter (ADC) where it is digitized. The two digitized signals (the in-phase and quadrature signals) are then sent to a channelizer. By inputting a real signal into the channelizer104as shown inFIG. 1the channelizer104performs both channelization and I/Q demodulation. This eliminates the need for a separate I/Q demodulator and the second ADC which reduces the power consumption and complexity of the transponder. Furthermore, by eliminating the analog quadrature demodulator, the I/Q imbalances typically associated with analog quadrature demodulators are also eliminated.

However, where the channelizer104is implemented as a polyphase FFT (Fast Fourier Transform) filter bank analyzer, inputting a real signal into the channelizer104will double the number of points of the FFT processor compared to inputting a signal in complex format (in-phase and quadrature signals) to the channelizer. For example, an M-channel input signal in real formal requires a 2M-point FFT channelizer, whereas an M-channel input signal in complex format requires only an M-point FFT channelizer. Although the number of points of the FFT processor is doubled in the real-input case compared to the complex-input case, there are certain benefits to inputting a real signal into the channelizer104. For example, in the real-input case the channelizer104(and by extension the polyphase filters of the polyphase FFT filter bank analyzer) will only have to process one signal as opposed to two in the complex-input case.

An exemplary embodiment of the channelizer104will be described in more detail in relation toFIG. 3.

The SM & SC module106receives the primary channelized digital signals1160to116M−1from the channelizer104and generates a plurality of intermediate signals120. The intermediate signals120are generated so that when they are combined by the synthesizers108they will produce real digital output signals122centered at predeterimined intermediate frequencies and comprised of predetermined sets of the primary channelized digital signals1160to116M−1. Since the secondary channelized digital signals116Mand116M−1to116Mare the images of the primary channelized digital signals1160to116M−1respectively, the SM & SC module106can obtain all of the necessary information to generate the intermediate signals120from only the primary channelized digital signals1160to116M−1.

Typically the number of intermediate signals120generated by the SM & SC module106is based on the number of analog output signals124generated by the transponder100and the number of channels or frequency bands of each of the analog output signals124. Specifically, the SM & SC module106generates 2Niintermediate signals120(i)0to120(i)Ni−1for each of the analog output signals124where is the number of channels or frequency bands of the ithanalog output signal124i.

The 2Niintermediate signals can be divided into two groups, the first Niintermediate signals120(i)0to120(i)Ni−1can be described as the primary intermediate signals and the last Niintermediate signals120(i)Nito120(i)2Ni−1can be described as the secondary intermediate signals. Typically the primary intermediate signals120(i)0to120(i)Ni−1are equal to one of the primary channelized digital signals1160to116M−1, and the secondary intermediate signals120(i)Niand120(i)2Ni−1to120(i)Ni+1are the images of the primary intermediate signals respectively. For the purposes of this paper, an image signal is understood to be a signal that has the same amplitude, but is anti-phase or 180 degrees offset from the primary signal.

For example, say N1is equal to 2, the SM & SC module106will generate 4 intermediate signals120, the first intermediate signal will typically be equal to one of the primary channelized digital signals, this will be referred to as signal A. The second intermediate signal will typically be equal to a second primary channelized digital signal, this will be referred to as signal B. The third intermediate signal will be the image of signal B, and the fourth intermediate signal will be the image of signal A.

It is not necessary, however, that all of the primary intermediate signals120(i)0to120(i)Ni−1be equal to one of the primary channelized digital signals1160to116M−1. Accordingly, in some embodiments, one or more of the primary intermediate signals120(i)0to120(i)Ni−1may be replaced with a NIL or NULL channel. The NIL or NULL channels are locally generated channels containing either zeros or noise like signals of very low amplitude. The NIL or NULL channels may be used, for example, to implement frequency domain filtering for a particular digital output signal122.

When a synthesizer108receives input signals in this format—the primary signals and their images on opposite ports—the synthesizer108will produce an output signal in real format. Where the synthesizer receives only the primary signals the synthesizer will produce an output signal in complex format.

The SM & SC module106may also receive a digital control signal118. The digital control signal118may indicate which of the primary channelized digital signals1160to116M−1are to be included in each digital output signal122, how many NIL channels are to be included in each digital output signal, and the order of the desired primary channelized digital signals1160to116M−1and any NIL channels. The digital control signal118may also indicate the desired intermediate frequency (IF) of each of the digital output signals122. The digital control signal118may be a serial command signal that conforms to known standards, or any other format, compatible with the SM & SC module106.

An exemplary embodiment of the SM & SC module106will be described in more detail in relation toFIG. 4.

For ease of explanation, the operation of the synthesizers108will be described generally in relation to the ithsynthesizer108iwhere the ithsynthesizer108iis associated with the ithanalog output signal124i. The ithsynthesizer108ireceives 2Niintermediate signals120(i)0to120(i)2Ni−1from the SM & SC module106where Ni; is the number of channels in the ithdigital output signal122i. The ithsynthesizer108ithen combines or synthesizes the 2Niintermediate signals120to produce the ithdigital output signal122i. Since each digital output signal122may have a different number of channels, each synthesizer108may receive a different number of intermediate signals120from the SM & SC module106. Ideally, the digital output signal122produced by each synthesizer108is at the desired intermediate frequency (IF) and contains the desired channels in the desired order.

As described above, where the inputs to the ithsynthesizer108i(intermediate signals120(i)0to120(i)2Ni−1) are conjugate symmetric, the ithdigital output signal122iwill be a real signal. When this is the case the synthesizer108acts as both channel multiplexer and digital I/Q modulator. This provides a significant advantage over known synthesizers which typically produce an output signal in complex form, meaning that they produce both the in-phase and quadrature components of the output signal separately. Such a system then requires two digital to analog converters (DACs) to convert each of the digital signals (the in-phase and quadrature signals) to analog signals and a quadrature modulator to combine the analog in-phase and quadrature signals to produce a real analog signal. In addition, the output signals of such synthesizers are typically at baseband, not an intermediate frequency and so the system also typically includes a local oscillator for each output signal which is used in combination with the quadrature modulator to up-convert the output signal to the desired intermediate frequency.

In contrast to typical synthesizers, the output of each synthesizer108is real, thus a single DAC110is sufficient to convert the digital output signal122to an analog output signal124. In this embodiment there is no need for the second DAC, the quadrature modulator and the local oscillator of the system described in the previous paragraph. The elimination of the second DAC, the quadrature modulator and the local oscillator results in a reduction of the power consumption and complexity of the transponder100. Since the second DAC, the quadrature modulator and the local oscillator are eliminated for each digital output signal122, the more output signals, the higher the reduction in power consumption. In some cases the transponder100configuration as shown inFIG. 1can result in a 50% reduction in power over the system described in the previous paragraph.

In some embodiments the synthesizer108is implemented as a polyphase IFFT synthesizer. In these embodiments, the number of points of the IFFT processor required to produce a real output signal is doubled over the case where there is a complex output. For example, a 2N-point FFT processor is required to produce an N-channel output in real format, whereas only an N-point FFT processor is required to produce an N-channel output in complex format.

However, the benefits obtained from producing a real output signal far outweigh the drawbacks of using an IFFT processor with a higher number of points. An exemplary embodiment of a synthesizer108ofFIG. 1will be described in relation toFIG. 5.

Reference is now made toFIG. 3, in which an exemplary embodiment of the channelizer104ofFIG. 1is illustrated. As described above, the channelizer104receives a real digital wideband multi-carrier signal114and channelizes the signal into 2M channelized digital signals1160to1162M−1where M is the number of frequency bands in the real analog wideband multi-carrier signal112. In the embodiment shown inFIG. 3, the channelizer104is implemented as a 2M path polyphase FFT filter bank analyzer or channelizer.

The channelizer or analyzer104includes a 2M pole commutator302, 2M polyphase filters3040to3042M−1and a 2M-point FFT processor306. As described above, a typical polyphase FFT filter bank channelizer includes only M polyphase filters and an M-point FFT processor. The pole commutator302receives the real digital wideband multi-carrier signal114from the ADC102and distributes samples of the real digital wideband multi-carrier signal114to the polyphase filters3040to3042M−1in a sequential manner. Since there are 2M filters, each filter3040to3042M−1is updated once every 2M samples.

The exact characteristics of the polyphase filters3040to3042M−1, in terms of the pass band, transition band and stop band characteristics, are dependent upon the actual transponder100application and are typically defined by the user. Background on polyphase DSP can be found in R. E. Crochiere and L. E. Rabiner, Multirate Digital Signal Processing, Prentice Hall, Englewood Cliffs, N.J., 1983; and N.J. Fiege, Multirate Digital Signal Processing, John Wiley & Sons, 1994; the entire contents of which are herein incorporated by reference.

The polyphase filter outputs3080to3082M−1are fed to the FFT processor306. The FFT processor306computes the 2M-point Fast Fourier Transform (FFT) of the polyphase filter outputs3080to3082M−1at a rate of fs/2M and outputs 2M channelized digital signals1160to1162M−1. The 2M channelized digital signals1160to1162M−1can be divided into two groups, the primary channelized digital signals1160to116M−1and the secondary channelized digital signals116Mto1162M−1. Each of the primary and secondary channelized digital signals1160to1162M−1correspond to one of the channels2020to202M−1and2040to204M−1of the real digital wideband multi-carrier signal114. Specifically, the primary channelized digital signals1160to116M−1correspond to the first block of channels2020to202M−1of the digital wideband multi-carrier signal114and the secondary channelized digital signals116Mto1162M−1correspond to the second block of channels2040to204M−1of the digital wideband multi-carrier signal114, respectively. As noted above, channels2040to204M−1are the images of channels2020to202M−1thus, the secondary channelized digital signals116Mand1162M−1to116M+1are the images of the primary channelized digital signals1160to116M−1, respectively. In one embodiment channel2020is used as a guard band channel, and channels2021to202M−1are used to transmit data and are often referred to as the data channels. Other embodiments, however, may have a different number and/or arrangement of guard band channels and data channels.

Reference is now made toFIG. 4, in which an exemplary embodiment of the SM & SC module106ofFIG. 1is illustrated. As described above, the SM & SC module106receives the primary channelized digital signals1160to116M−1generated by the channelizer104and generates a plurality of intermediate signals120that when combined or synthesized by the synthesizers108produce one or more digital output signals122. Ideally, each digital output signal122is at a predetermined intermediate frequency and includes a predetermined set of the channels of the real analog wideband multi-carrier signal112.

In the embodiment shown inFIG. 4, the SM & SC module106includes a splitter402, one or more switch matrices404and one or more signal construction modules406. There is typically one switch matrix404and one signal construction module406for each analog output signal124produced by the transponder100. While the embodiment shown inFIG. 4has more than one switch matrix404and more than one signal construction module406, where the transponder100only produces one analog output signal124the SM & SC module106may only have a single switch matrix404and a single construction module406. The SM & SC module106may also include a serial to parallel converter407for receiving a digital control signal118and re-distributing the digital control signal118to the switch matrices404and signal construction modules406.

The splitter402is a P-way splitter where P is the number of analog output signals124produced by the transponder100. The splitter402receives the primary channelized digital signals1160to116M−1from the channelizer104and splits or duplicates the primary channelized digital signals1160to116M−1P times to produce P split groups408. Each split group408includes all the primary channelized digital signals1160to116M−1. One split group408is sent to each switch matrix404.

For ease of explanation, the operation of the switch matrices404will be explained with reference generally to the ithswitch matrix404iwhere the ithswitch matrix404iis associated with the ithanalog output signal124i. The ithswitch matrix404iis an M×Niswitch matrix where M is the number of channels or frequency bands in the analog wideband multi-carrier signal112and Niis the number of channels or bands in the ithanalog output signal124i. Since the analog output signals1240to124P−1do not necessarily have the same number of channels or frequency bands (R), the switch matrices404may vary in size. As described above, both M and Ni; are integers greater than or equal to 1.

The ithswitch matrix404ireceives a split group408including the primary channelized digital signals1160to116M−1produced by the channelizer104. The ithswitch matrix404ithen routes one or more of the primary channelized digital signals1160to116M−1to a switch matrix404ioutput port as a desired channel signal410. In some embodiments, such as the embodiment shown inFIG. 4, the routing is based on information in the digital control signal118. Specifically, the digital control signal118may specify which of the primary channelized digital signals1160to116M−1are to form part of which output signals124and in what order. Accordingly, in such embodiments each switch matrix404uses the information in the digital control signal118to select the desired primary channelized digital signals1160to116M−1from the split group408and to output them in the desired order as desired channel signals410. In other embodiments the routing information is pre-configured into the switch matrix404.

To more clearly explain the operation of the switch matrices404an exemplary scenario will be described. In this scenario there are two switch matrices4040and4041—a first switch matrix4040and a second switch matrix4041—and each switch matrix4040and4041receives five primary channelized digital signals116: channel A, channel B, channel C, channel D and channel E respectively. The first switch matrix4040is notified via the digital control signal118that the first digital output signal1220is to contain channels A, C and D. Accordingly, the first switch matrix outputs channel A on port1, channel C on port2and channel D on port3. The second switch matrix4041is told via the digital control signal118that the second digital output signal1221is to contain channels C, A, E and B. Accordingly, the second switch matrix outputs channel C on port1, channel A on port2, channel E on port3and channel B on port4. As can be seen from this scenario, not only does the switch matrix select the desired channelized digital signals from the split group408, but the switch matrix arranges the desired channels into the desired order.

For ease of explanation, the operation of the signal construction modules406will be explained with reference generally to the ithsignal construction module406iwhere the ithsignal construction module406iis associated with the ithanalog output signal124i. The purpose of the ithsignal construction module406iis to generate 2Niintermediate signals120(i)0to120(i)2Ni−1from the received desired channel signals410, that will produce a real digital output signal122iat a desired intermediate frequency when combined or synthesized by the ithsynthesizer108i.

As mentioned above, for the ithsynthesizer108ito produce a digital output signal in real format as opposed to complex format, the synthesizer108imust receive, for each desired channelized digital signal, the channelized digital signal on a first port and the image of the channelized signal on a mirror port. Accordingly, the signal construction module406outputs each received desired channel signal410on the desired port as the primary intermediate signal, and generates the desired channel signal's410image from the primary intermediate signal, and outputs the image on the mirror port as the secondary intermediate signal.

To more clearly explain the operation of the signal construction modules406an exemplary scenario will be described. In this scenario there are two signal construction modules4060and4061—a first signal construction module4060and a second signal construction module4061. In this scenario the first and second signal construction modules4060and4061both have four input ports (0-3) and eight output ports (0-8). The first signal construction module4060receives three desired channel signals410from the corresponding first switch matrix4040—channels A, C, E—on ports1,2and3respectively. The first signal construction module also receives a control signal indicating that the desired intermediate frequency for the corresponding output signal is 2.0Bcwhere Bcis the element channel bandwidth. The first signal construction module (i) generates a NIL channel for port0, (ii) generates the images of the NIL channel and channels A, C and E, and (iii) outputs channels A, B and C and their images according to Table 2. By outputting the signals in this manner the corresponding sythesizer1080will produce a digital output signal1221with an intermediate frequency of 2.0Bcwhere Bcis the element channel bandwidth.

TABLE 2Output PortSignal0NIL1Channel A2Channel B3Channel C4NIL5Image of Channel C6Image of Channel B7Image of Channel A

The NIL channels may be generated by the signal construction module406either in a pre-generated manner such as reading into registers containing value zero or pre-generated low level noise or the like, or by real time random sequence generators or the like.

Similarly, the second signal construction module4061receives two desired channel signals410from the corresponding second switch matrix4041—channels B and A—on channels1and2respectively. The second signal construction module also receives a control signal indicating that the desired intermediate frequency for the corresponding output signal is 1.5Bcwhere Bcis the element channel bandwidth. The second signal construction module4061(i) generates NIL channels for ports0and3, (ii) generates the images of the NIL channels and channels B and A, and (iii) outputs channels A, and B and their images according to Table 3. By outputting the signals in this manner the corresponding synthesizer1081will produce a digital output signal1221with an intermediate frequency of 1.5Bc.

TABLE 3Output PortChannel0NIL 11Channel B2Channel A3NIL 24Image of NIL 15Image of NIL 26Image of Channel A7Image of Channel B

The operations (i) to (iii) performed by the signal construction modules4060and4061may be performed simultaneously or sequentially.

Reference is now made toFIG. 5, in which an exemplary embodiment of a synthesizer108ofFIG. 1is illustrated. As described above, the synthesizer108receives 2N intermediate signals120from the SM & SC module106where N is the number of channels in the digital output signal122. As described above, the number of channels or frequency bands in the output signal122, N, may be the same as or different than the number of channels in the analog wideband multi-carrier signal112. Also, as noted above, each synthesizer108may have a different value of N. The synthesizer or combiner108synthesizes or combines the 2N intermediate signals120to produce a real digital output signal122at a desired intermediate frequency and containing the desired channels in the desired order.

In the embodiment shown inFIG. 5the synthesizer108is implemented as a 2N path polyphase IFFT filter synthesizer or combiner. In this embodiment the synthesizer108includes a 2N-point IFFT processor502, 2N polyphase filters5040to5042N−1and a 2N pole commutator506. The IFFT processor502receives 2N intermediate signals1200to1202N−1from the SM & SC module106and computes the 2N-point Inverse Fast Fourier Transform (IFFT) of the 2N signals1200to1202N−1. Each of the 2N intermediate signals120correspond to a channel or band. The channels or bands corresponding to intermediate signals120Nand1202N−1to120N+1are the images of channels or bands corresponding to intermediate signals1200to120N−1respectively. In one embodiment the channels corresponding to intermediate signals1200and120Nare guard bands and the channels corresponding to intermediate signals1201to120N−1and120N+1to1202N−1are used to transmit information and may be referred to as data channels. Other embodiments have other numbers and configurations of guard bands and data channels. Not all of the channels, however, have to be used or occupied, unused channels can simply be padded with zeros (i.e., NIL channels).

The IFFT processor502output signals5080to5082N−1are fed to the polyphase filters5040to5042N−1respectively. The polyphase filters5040to5042N−1filter the received signals5080to5082N−1and output filtered signals5100to5102N−1. The exact characteristics of the polyphase filters5040to5042N−1in terms of the pass band, transition band and stop band characteristics are dependent upon the actual transponder100application and are typically defined by the user. Background on polyphase DSP can be found in R. E. Crochiere and L. E. Rabiner,Multirate Digital Signal Processing, Prentice Hall, Englewood Cliffs, N.J., 1983; and N.J. Fiege,Multirate Digital Signal Processing, John Wiley & Sons, 1994; the entire contents of which are herein incorporated by reference.

The pole commutator506samples each filtered signal5100to5102N−1sequentially to form a digital output signal122. The digital output signal122will be centered at a desired intermediate frequency and will include the desired the channels of the analog wideband multi-carrier signal112in a desired order.

Reference is now made toFIGS. 6A to 6Cto illustrate the operation of the transponder100by way of an example. In this example, the transponder100receives an input signal as shown inFIG. 6Aand produces two output signals as shown inFIGS. 6B and 6C.

FIG. 6Aillustrates the frequency characteristics of an exemplary real analog wideband multi-carrier signal112. As shown inFIG. 6Athe exemplary real analog wideband multi-carrier signal112is comprised of sixteen unique element channels (channels0to15) of equal bandwidth, Bc. Element channels31to17are the images of element channels1to15respectively and element channel16is the image of element channel0. In the example shown inFIG. 6A, the element channels (1-31) form four wideband channels of interest. Element channels1to4form a first wideband channel of interest602, and element channels7to10form a second wideband channel of interest606. The third and fourth wideband channels of interest604and608formed by element channels28to31and22to25respectively, are the images of the first and second wideband channels of interest602and606respectively.

The ADC112of transponder100receives the real analog wideband multi-carrier signal112and converts the real analog wideband multi-carrier signal112into a real digital wideband multi-carrier signal114. The channelizer104receives the digital wideband multi-carrier signal114and extracts the thirty-two element channels (0to31) and outputs them as channelized digital signals1160to11631respectively. Channelized digital signals1161to1164correspond to the first wideband channel of interest602, channelized digital signals1167to11610correspond to the second wideband channel of interest606, channelized digital signals11628to11631correspond to the third wideband channel of interest608, and channelized digital signals11622to11625correspond to the fourth wideband channel of interest604.

The primary channelized digital signals1160to11615are then sent to the SM & SC module106. The splitter402of the SM & SC module106receives the primary channelized digital signals1160and11615and sends a copy of the primary channelized digital signals1160and11615to first and second switch matrices4040and4041. The first switch matrix4040also receives a control signal that instructs it to send the channels1161to1164to the corresponding signal construction module4060. The first switch module4040then selects the channelized digital signals1161to1164and sends them to the corresponding signal construction module4060as desired signals4100. The second switch matrix4041also receives a control signal that instructs it to send the channelized signals1167to11610to the corresponding signal construction module4061. The second switch matrix4041then selects the channelized digital signals1167to11610and sends them to the corresponding signal construction module4061as desired signals4101.

The first signal construction module4060also receives a control signal indicating that the first output signal is to be at an intermediate frequency IF1. The first signal construction module4060takes the channelized digital signals1161to1164and outputs them as the intermediate signals120(0)1to120(0)4corresponding to IF1. The signal construction module also generates images of the channelized digital signals1161to1164and outputs them as the intermediate signals120(0)28to120(0)31corresponding to IF1. The remaining intermediate signals120(0)0, and120(0)5to120(0)27are filled with NIL channels.

The second signal construction module4061also receives a control signal indicating that the second output signal is to be at an intermediate frequency IF2. The second signal construction module4061then takes the channelized digital signals1167to11610and outputs them as the intermediate signals120(1)3to120(1)6corresponding to IF2. The second signal construction module4061also generates images of the channelized digital signals1167to11610and outputs them as the intermediate signals120(1)3to120(1)6corresponding to IF2. The remainder of the intermediate signals120(1)0to120(1)2,120(1)7to120(1)9and120(1)14to120(1)15are filled with NIL channels. Note that in this example the second signal construction module4061only generates 16 intermediate signals120(1)0to120(1)15whereas the first signal construction module4060generates 32 intermediate signals120(0)0to120(0)31. This allows the second synthesizer1081to operate at a lower sampling rate than the first synthesizer1080. This illustrates the flexibility of the sampling scheme.

The first synthesizer1080receives the intermediate signals120(0)0to120(0)31produced by the first signal construction module4060and combines them to produce a first real digital output signal1220with the characteristics shown inFIG. 6B. Specifically, a real signal at an intermediate frequency of IF1containing the first and third wideband channels of interest602and604of the input signal. The first DAC1100then converts the first digital output signal1220to a first analog output signal1240.

The second synthesizer1081receives the intermediate signals120(1)0to120(1)15produced by the second signal construction module4061and combines them to produce a second real digital output signal1221with the characteristics shown inFIG. 6C. Specifically, a real signal with an intermediate frequency of IF2containing the second and fourth wideband channels of interest606and608of the input signal. The second DAC1101then converts the second real digital output signal1221to a second analog output signal1241.

In some embodiments, several transponders100may work in conjunction to produce output signals that are a combination of the channels of a plurality of input signals. Reference is now made toFIG. 7, in which a transponder system750is illustrated. The transponder system750comprises L interconnected transponders7000to700L−1where L is an integer greater than or equal to two. The ithtransponder700ireceives a real analog wideband multi-carrier signal712iand generates Pianalog output signals724(i)0to724(i)Pi−1in accordance with the operations described above. In addition to operating individually, the transponders may also have interlink channels7260to726L−1to exchange selected primary channelized digital signals between transponders under command of the control signals7180to718L−1.

Reference is now made toFIG. 8, in which a method800of generating a plurality of output signals from one or more input signals where each output signal comprises a sub-set of the channels of the input signals in accordance with an embodiment is illustrated. While the method is applicable to generating multiple output signals from multiple input signals, for ease of explanation we will describe the single input signal situation.

At (802) a real analog wideband signals112comprising M frequency bands or channels where M is an integer greater than or equal to 1 is received. The analog signal112may be a version of a radio frequency (RF) signal received by an antenna that has been down converted to a low intermediate frequency (IF). Anti-aliasing filtering may also be performed on the analog signal112prior to being received at (802).

At (804) the real analog wideband multi-carrier signal112is digitized and output as a real digital wideband multi-carrier signal114. The digitization may be performed by a device such as an analog to digital converter (ADC)102. The ADC102may be any ADC suitable for digitization of a multi-carrier intermediate frequency (IF) signal.

The real digital wideband multi-carrier signal114has symmetric frequency domain characteristics. Specifically, the digital wideband multi-carrier signal114can be divided into 2M frequency bands or element channels2020to202M−1and2040to204M−1where element channels2040to204M−1are the images of channels2020to202M−1. For example, if channel2021has a center frequency of f1, then channel2041is the mirror image of channel2021centered at frequency f1. Each channel2020to202M−1and2040to204M−1has the same bandwidth, Bc, referred to as the element channel bandwidth. The element channel bandwidth, Bc. is related to the ADC102sampling frequency, fs, by the ratio fs/2M.

At (806) the real digital wideband multi-carrier signal114is channelized into 2M channelized digital signals1160to1162M−1. The channelized digital signals can be divided into two groups, the primary channelized digital signals1160to116M−1and the secondary channelized digital signals116Mto1162M−1. Each of the primary and secondary channelized digital signals1160to1162M−1correspond to one of the channels2020to202M−1and2040to204M−1of the real digital wideband multi-carrier signal114. Specifically, the primary channelized digital signals1160to116M−1correspond to the first block of channels2020to202M−1of the digital wideband multi-carrier signal114and the secondary channelized digital signals1162M−1to116Mcorrespond to the second block of channels2041to204M−1and2040of the digital wideband multi-carrier signal114. As noted above, channels2040to204M−1are the images of channels2020to202M−1thus secondary channelized digital signals116Mand1162M−1to116M+1are the images of channelized digital signals1160to116M−1respectively.

In one embodiment channel2020, and thus channel2040is used as a guard band channel and channels2021to202M−1and2041to204M−1are used to transmit data and are often referred to as data channels. Other embodiments may have other numbers and configurations of guard bands and data channels. The channelization may be performed by a 2M-point polyphase FFT filter bank analyzer or channelizer as described above in reference toFIG. 3.

At (808) only the primary channelized digital signals1160to116M−1are used to generate a plurality of intermediate signals120that when combined or synthesized by one or more synthesizers (e.g. synthesizers108) produce one or more digital output signals122that are centered at predetermined intermediate frequencies and are comprised of a predetermined combination of the primary channelized digital signals1160to116M−1.

To more clearly explain generating the plurality of intermediate signals120from the channelized digital signals1160to116M−1an exemplary scenario will be described. In this scenario the real digital wideband multi-carrier signal114is comprised of two channels, channel A and channel B and the desired result is to output three signals where the first output signal is comprised of only channel A, the second output signal is comprised of only channel B, and the third output signal is comprised of both channel A and B, but the order is reversed.

Once the channels are separated by the channelization process, a plurality of intermediate signals120are generated to get the desired output signals. For example, to generate the first output signal a copy of channel A is generated and sent to a first synthesizer. To generate the second output signal a copy of channel B is sent to a second synthesizer. And finally, to generate the third output signal copies of channel A and B are sent to the synthesizer, but in the reverse order. However, to get a real output (as opposed to a complex output) from the synthesizers, the system must also generate the image to channels A and B and send them to the synthesizers on the mirror ports.

In some embodiments the channels associated with a particular output signal122and the order of the channels within the output signal122may be dictated by a digital control signal118. The digital control signal118may also dictate the intermediate frequency of the output signal122. The digital control signal118may be a serial command signal and the format of the signal only need be compatible with the SM & SC module106. In other embodiments the channels associated with a particular output signal122and the order of the channels within the output signal122is preconfigured.

(808) may be performed by a switch matrix and signal construction module as described in reference toFIG. 4.

Returning toFIG. 8, at (810) portions of the intermediate signals120are combined or synthesized to form one or more real digital output signals122. Each real digital output signal122is centered at a desired intermediate frequency and is comprised of at least some of the channels of the analog wideband multi-carrier signal112. The combination may be performed by one or more 2N-point polyphase IFFT filter bank combiners or synthesizers as described above in reference toFIG. 5.

At (812) the one or more real digital output signals122are converted into real analog output signals124. The conversion may be performed by one or more digital to analog converters (DACs) (e.g. DAC110).

As described above with reference to signal112, while the element frequency bands or channels of signal122(and by extension channelized digital signals116and the intermediate signals120) can be designed to contain a single narrow signal, certain wideband signals may occupy multiple element frequency bands or channels (and by extension multiple channelized digital signals116and multiple intermediate signals120). In such cases the wideband signals can be routed through the transponder100via multiple channelized digital signals116and multiple intermediate signals120, such that the transponder100can serve as a bandwidth tunable filter for a wide range of signals with varying bandwidths.

The reduced power consumption of transponder100make it well suited for use in multi-beam satellite payloads or other multi-beam communication systems. However, transponder100may also be suitable for use in multi-channel digital transcievers in both the wireless and wireline industries.