BRIDGE CHIP AND SEMICONDUCTOR INTEGRATED MODULE

A bridge chip according to one embodiment includes a substrate having a first surface and a second surface opposite to the first surface; a first resin film having flexibility, and formed on the first surface of the substrate; and a metal film formed on the first resin film. The metal film includes a connecting portion for an electrical connection with an element. The substrate includes a buffer portion penetrating through the substrate between the first surface and the second surface. The connecting portion is disposed inside the buffer portion in a plan view of the substrate.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority from Japanese Patent Application No. 2023-164725, filed on Sep. 27, 2023, the entire subject matter of which is incorporated herein by reference.

TECHNICAL FIELD

The present disclosure relates to a bridge chip and a semiconductor integrated module.

BACKGROUND

Japanese Unexamined Patent Publication No. 2018-189699 describes an optical transmitter. The optical transmitter includes a Mach-Zehnder modulator, a driver IC, and a wiring substrate. The wiring substrate connects the Mach-Zehnder modulator and the driver IC to each other through flip-chip mounting. The wiring substrate is a flexible substrate made of silicon dioxide (SiO2) or resin. In the optical transmitter, an inclination of the wiring substrate with respect to the Mach-Zehnder modulator and the driver IC is within ±3°.

A specification of U.S. Patent Application Publication No. 2015/0180580 describes an optical transmitter including an interconnect bridge assembly including a substrate. The substrate of the interconnect bridge assembly electrically connects a modulator driver and a control IC to each other. The substrate is made of a material having flexibility or elasticity. Accordingly, the substrate absorbs a difference between a height of the modulator driver and a height of the control IC.

SUMMARY

A bridge chip according to the present disclosure includes a substrate having a first surface and a second surface opposite to the first surface; a first resin film having flexibility, and formed on the first surface of the substrate; and a metal film formed on the first resin film. The metal film includes a connecting portion for an electrical connection with an element. The substrate includes a buffer portion penetrating through the substrate between the first surface and the second surface. The connecting portion is disposed inside the buffer portion in a plan view of the substrate.

DETAILED DESCRIPTION

For example, a plurality of elements such as a driver IC and an optical circuit element may be subjected to the influence of stress caused by expansion or contraction due to a change in temperature in a state where the plurality of elements are accommodated in a housing. Therefore, protection of the elements from the influence of stress and enabling signal transmission between the plurality of elements are required.

An object of the present disclosure is to provide a bridge chip and a semiconductor integrated module capable of improving the robustness of electrical connections between a plurality of elements.

According to the present disclosure, it is possible to improve the robustness of electrical connections between a plurality of elements.

Description of Embodiment of Present Disclosure

First, contents of an embodiment of a bridge chip and a semiconductor integrated module according to the present disclosure will be listed and described. (1) The bridge chip according to one embodiment includes a substrate having a first surface and a second surface opposite to the first surface; a first resin film having flexibility, and formed on the first surface of the substrate; and a metal film formed on the first resin film. The metal film includes a connecting portion for an electrical connection with an element. The substrate includes a buffer portion penetrating through the substrate between the first surface and the second surface. The connecting portion is disposed inside the buffer portion in a plan view of the substrate.

In the bridge chip, the first resin film having flexibility is formed between the substrate and the metal film. The metal film includes the connecting portion for an electrical connection with the element. The substrate includes the buffer portion penetrating through the substrate, and the connecting portion is disposed inside the buffer portion in a plan view of the substrate. Therefore, the connecting portion, the first resin film having flexibility, and the buffer portion are aligned in order along a lamination direction of the substrate, the first resin film, and the metal film. A portion where the connecting portion is located in a plan view of the substrate is a portion that deforms more easily than other portions since the buffer portion is located below the connecting portion. Therefore, since the connecting portion that is electrically connected to the element is more easily displaced than other portions, even when a change in temperature or the like occurs, a portion of the first resin film which is aligned with the connecting portion along the lamination direction deforms, so that the influence of stress on the element can be reduced. Therefore, the element can be protected from the influence of stress, and robustness between a plurality of elements can be improved.

(2) In the above (1), the bridge chip may further include a second resin film having flexibility, and the second resin film may be formed on the first resin film and the metal film, and may have an opening on the metal film. In this case, a part of the first resin film and a part of the metal film can be covered with the second resin film having flexibility.

(3) In the above (1) or (2), the substrate may further include a support portion inside the buffer portion in a plan view of the substrate.

The connecting portion may be connected to the second surface of the substrate via the first resin film and the support portion. In this case, the connecting portion, the first resin film having flexibility, and the support portion are aligned in order along the lamination direction of the substrate, the first resin film, and the metal film. Therefore, the first resin film and the connecting portion can be supported by the support portion while the portion of the first resin film which is aligned with the connecting portion along the lamination direction is deformed.

(4) In any of the above (1) to (3), the bridge chip may further include a solder bump formed on the connecting portion. In this case, since the solder bump can be melted by heating to connect the connecting portion to the element, the connection of the connecting portion to the element can be easily performed without strongly pressing the connecting portion against the element during connection.

(5) In any of the above (1) to (4), the first resin film may be made of polyimide. In this case, the first resin film can be a resin film having excellent flexibility and stretchability.

(6) In any of the above (1) to (5), the metal film may be made of any of copper, gold, and aluminum.

(7) In any of the above (1) to (6), the metal film may include a wiring that includes a first pad formed as the connecting portion at a first end portion, and a second pad formed as the connecting portion at a second end portion. The first pad may be configured to be electrically connectable to a first element, and the second pad may be configured to be electrically connectable to a second element isolated from the first element. In this case, the first pad of a wiring of the metal film can be electrically connected to the first element, and the second pad of a wiring of the metal film can be electrically connected to the second element.

(8) In any of the above (1) to (6), the metal film may include a plurality of wirings, each extending in a first direction, and each of the plurality of wirings may include a first pad at a first end portion and a second pad at a second end portion. The first pads of the plurality of wirings may be disposed along a second direction intersecting the first direction, and the second pads of the plurality of wirings may be disposed along the second direction. The buffer portion may include a first buffer portion including a plurality of the first pads inside the first buffer portion in a plan view of the substrate, and a second buffer portion including a plurality of the second pads inside the second buffer portion in a plan view of the substrate. In this case, portions of the first resin film which are aligned with the first pads and the second pads in the lamination direction can be made to be more easily deformed than other portions.

(9) In any of the above (1) to (8), the substrate may be made of silicon. In this case, the heating of the substrate can be easily performed during mounting or the like.

(10) In any of the above (1) to (8), the substrate may be made of glass. In this case, thermal insulation of the substrate can be further improved.

(11) In any of the above (1) to (8), the support portion of the substrate may be made of silicon.

(12) A semiconductor integrated module according to one embodiment includes a base having a reference surface; a first element that is mounted on the reference surface, and that transmits an electrical signal; a second element that is mounted on the reference surface, and that receives the electrical signal; and the bridge chip described above that is connected to the first element and the second element, and that transmits the electrical signal. Since the semiconductor integrated module includes the bridge chip described above, the same effects as those described above can be obtained. Namely, since the connecting portion that is electrically connected to each of the first element and the second element is more easily displaced than other portions, even when a change in temperature or the like occurs, a portion of the first resin film which is aligned with the connecting portion along a lamination direction deforms, so that the influence of stress on the first element and the second element can be reduced. Therefore, the first element and the second element can be protected from the influence of stress, and robustness between a plurality of elements can be improved.

Details of Embodiments of Present Disclosure

Various examples of bridge chips and semiconductor integrated modules according to embodiments will be described below with reference to the drawings. It is intended that the present invention is not limited to the following examples and includes all changes set forth in the claims and within the scope of equivalents to the claims. In the description of the drawings, the same or corresponding elements are denoted by the same reference signs, and duplicate descriptions will be omitted as appropriate. The drawings may be partially depicted in a simplified or exaggerated manner for ease of understanding, and dimensional ratios and the like are not limited to those shown in the drawings. Namely, the dimensions on the drawings may differ from the actual dimensions.

FIG.1is a plan view showing an internal structure of a semiconductor integrated module1according to the present embodiment.

FIG.2is a longitudinal sectional view showing the semiconductor integrated module1. In the present embodiment, the semiconductor integrated module1is an optical module. As shown inFIGS.1and2, the semiconductor integrated module1is, for example, Transmitter Optical Sub Assembly (TOSA) including a package2having a rectangular parallelepiped shape, an optical connector3, and a terminal4. The semiconductor integrated module1may be, for example, Coherent Driver Module (CDM). The package2is made of, for example, ceramic. The package2extends in a first direction D1that is a longitudinal direction of the package2, a second direction D2that is a width direction of the package2, and a third direction D3that is a height direction of the package2. For example, the first direction D1, the second direction D2, and the third direction D3are orthogonal to each other.

The package2includes a pair of first side walls2blocated at end portions in the first direction D1; a pair of second side walls2clocated at end portions in the second direction D2; and a bottom wall2hlocated at one end in the third direction D3. An internal space2A of the package2is defined by the pair of first side walls2b, the pair of second side walls2c, and the bottom wall2h. Components of the semiconductor integrated module1are accommodated in the internal space2A. The semiconductor integrated module1further includes a lid6that seals the internal space2A. The lid6is made of, for example, metal.FIG.1shows the internal space2A of the package2with the lid6omitted in a plan view in the third direction D3.

In the internal space2A, for example, a driver IC11that is a first element, an optical circuit element12that is a second element, and an optical component20are provided. For example, the optical circuit element12is an optical modulator. The driver IC11is, for example, such that an electrical circuit is formed on a silicon (Si) substrate using SiGe Bipolar Complementary Metal Oxide Semiconductor (BiCMOS) process, and amplifies an electrical signal supplied from the terminal4, and supplies the amplified electrical signal to the optical circuit element12.

The driver IC11transmits an electrical signal, and the optical circuit element12receives the electrical signal. In the present embodiment, the driver IC11supplies an electrical signal to the optical circuit element12. The optical circuit element12is, for example, such that a Mach-Zehnder interferometer is formed on an indium phosphide (InP) substrate, and modulates an optical signal supplied from the outside, based on the electrical signal supplied from the driver IC11, and outputs the modulated optical signal. A modulation rate of the optical signal is, for example, 200 GBd.

The electrical signal supplied from the driver IC11to the optical circuit element12passes through, for example, transmission lines formed in an electrical signal output unit of the driver IC11and an electrical signal input unit of the optical circuit element12. These transmission lines may have characteristic impedances substantially equal to each other, and the characteristic impedance is, for example, 60Ω differential. A length of the driver IC11in the first direction D1and a length of the optical circuit element12in the first direction D1are, for example, 2 mm. A length of the driver IC11in the second direction D2and a length of the optical circuit element12in the second direction D2are, for example, 4 mm.

The package2includes a heat sink plate (heat sink member). For example, the bottom wall2his formed of a heat sink plate. The heat sink plate is made of, for example, copper-tungsten (CuW). The heat sink plate may be made of, for example, a metal material other than CuW. Hereinafter, the bottom wall2his also referred to as a heat sink plate. The driver IC11is mounted on the heat sink plate (heat sink member) via a heat sink block13. The heat sink block13is bonded to a first surface2fof the package2.

The driver IC11is bonded to the heat sink block13using, for example, a thermally conductive adhesive (not shown) such as silver paste. An alloy solder such as gold-tin (AuSn) solder or tin-silver-copper (SnAgCu) solder may be used instead of the thermally conductive adhesive. The heat sink block13is bonded to the first surface2fof the package2using, for example, a thermally conductive adhesive. The heat sink block13may be made of, for example, metal or ceramic. In addition, the heat sink block13may be made of aluminum nitride.

The optical circuit element12is mounted on the bottom wall2hvia, for example, Thermo Electric Cooler (TEC)15that is a temperature adjustment element. The TEC15is bonded to a second surface2gof the package2. For example, the first surface2fand the second surface2gare formed on the bottom wall2h. The second surface2gis a surface parallel to the first surface2f. For example, the second surface2gis located on the same plane as the first surface2f. A spacer14is provided between the optical circuit element12and the TEC15.

The optical circuit element12is bonded to the spacer14using, for example, a thermally conductive adhesive. The spacer14is bonded to the TEC15using, for example, a thermally conductive adhesive. The TEC15is bonded to the second surface2gof the package2using, for example, a thermally conductive adhesive. The spacer14may be provided between the TEC15and the bottom wall2hinstead of between the optical circuit element12and the TEC15. A plurality of the spacers14may be provided. The spacer14may be made of, for example, metal or ceramic. In addition, the spacer14may be made of aluminum nitride. For example, an optical component other than the optical circuit element12may be mounted on the spacer14. In addition, the spacer14can also be omitted.

For example, the optical component20includes at least one of a lens, a mirror, a beam splitter, and an optical filter. The optical component20inputs and outputs an optical signal to and from the optical circuit element12. The optical connector3is provided on the first side wall2b. The optical connector3inputs and outputs an optical signal to and from the optical component20. Regarding direction, a direction in which light is output from the optical connector3to the outside of the package2may be referred to as the front, the front side, or forward, and a direction opposite to the front, the front side, or forward may be referred to as the rear, the rear side, or rearward. For example, light output from the optical connector3to the rear, the rear side, or rearward is input to the optical component20. However, these directions are defined for convenience of description, and do not limit directions in which the components are disposed.

For example, the package2includes electrical wirings2B. The electrical wirings2B are, for example, a feed-through electrical wirings that penetrates through the first side wall2b(rear wall) on the rear side of the package2while maintaining the hermeticity (airtightness) of the internal space2A. Each of the electrical wirings2B includes two end portions. One end portions (first end portions) of the electrical wirings2B are exposed to the outside of the package2. A plurality of the terminals4for electrical connections with an external device are disposed to align along the second direction D2at the end portions of the electrical wirings2B outside the package2. The other end portions (second end portions) of the electrical wirings2B are provided to face the internal space2A. A plurality of terminals5for electrical connections with the driver IC11are disposed to align along the second direction D2at the end portions of the electrical wirings2B inside the package2.

The package2has a fifth surface2jon which the electrical wirings2B are formed, and the terminals4and the terminals5are further provided on the fifth surface2j. The terminals4and the terminals5are electrically connected to each other via the electrical wirings2B. Therefore, electrical signals can be exchanged between the outside and the inside (internal space2A) of the package2via the electrical wirings2B. The electrical signals include, for example, a power supply voltage and a ground voltage (ground potential) in addition to an analog signal and a digital signal. The fifth surface2jis a surface parallel to the first surface2f.

In the internal space2A, each of the plurality of terminals5is electrically connected to a pad11bof the driver IC11via a bonding wire8b. The driver IC11has a third surface lid on an opposite side from the heat sink block13, and the pad11bis provided on the third surface11d. In addition, a circuit (not shown) of the driver IC11is also formed on the third surface11d. In the package2, the plurality of terminals5are aligned along the second direction D2. In the driver IC11, a plurality of the pads11bare aligned along the second direction D2. A plurality of the bonding wires8bare aligned along the second direction D2, and each of the bonding wires8belectrically connects the terminal5and the pad11bto each other.

The semiconductor integrated module1includes a plurality of terminals9band a plurality of terminals9cextending along the second direction D2and exposed to the outside of the package2. One end of each of the terminals9band the terminals9cis exposed to the outside of the package2on each of the pair of second side walls2c. The other end of each of the plurality of terminals9bis electrically connected to a pad11cof the driver IC11via a bonding wire8c. The pad11cis provided on the third surface11dof the driver IC11. The terminals9band the terminals9cmay be provided only on one of the pair of second side walls2c.

The other end of each of the plurality of terminals9cis electrically connected to a pad12bof the optical circuit element12via a bonding wire8d. The optical circuit element12has a fourth surface12don an opposite side from the TEC15, and the pad12bis provided on the fourth surface12dof the optical circuit element12. A circuit (not shown) of the optical circuit element12is also formed on the fourth surface12d. As described above, an electrical signal is supplied to the semiconductor integrated module1via at least one of the terminal4and the terminals9band9c, and the electrical signal is supplied to the driver IC11or the optical circuit element12via the bonding wire8b,8c, or8d.

The optical circuit element12is formed using, for example, an InP compound semiconductor, and a linear expansion coefficient of the optical circuit element12is, for example, 4.5 ppm/° C. The temperature of the optical circuit element12is controlled to be constant by the TEC15. The driver IC11is formed on, for example, a Si substrate, and a linear expansion coefficient of the driver IC11is, for example, 3 to 4 ppm/° C. The temperature of the driver IC11changes depending on the external temperature of the semiconductor integrated module1, the power consumption of the driver IC11, and thermal resistance between the heat sink block13and the bottom wall2h. The bottom wall2his made of, for example, copper-tungsten (CuW), and has a linear expansion coefficient of 6 to 7 ppm/° C. In such a manner, since the linear expansion coefficients and temperatures of a plurality of the components constituting the semiconductor integrated module1are different from each other, the positions of the driver IC11and the optical circuit element12in the first direction D1, the second direction D2, and the third direction D3can change depending on the external temperature.

The semiconductor integrated module1includes a bridge chip30that electrically connects the driver IC11and the optical circuit element12to each other. Hereinafter, a direction in which the bridge chip30is viewed from the driver IC11and the optical circuit element12may be referred to as the top, upper side or upward, and a direction in which the driver IC11and the optical circuit element12are viewed from the bridge chip30may be referred to as the bottom, lower side or downward. However, these directions are defined for convenience of description, and do not limit the disposition positions, directions, and the like of the components.

FIG.3is a bottom view showing the bridge chip30.FIG.4is a plan view showing the bridge chip30. As shown inFIGS.2,3, and4, a pad11fof the driver IC11is electrically connected to a pad12cof the optical circuit element12via the bridge chip30. The bridge chip30is connected to the driver IC11and the optical circuit element12, and transmits an electrical signal. The electrical signal transmitted by the bridge chip30has, for example, a band of 100 GHz or more.

For example, the bridge chip30has a rectangular plate shape. For example, a length of the bridge chip30in the second direction D2is larger than a length of the bridge chip30in the first direction D1, and the length of the bridge chip30in the first direction D1is larger than a length of the bridge chip30in the third direction D3. As one example, the length of the bridge chip30in the second direction D2is 2 mm or more and 4 mm or less, the length (width) of the bridge chip30in the first direction D1is 0.5 mm or more and 2 mm or less, and the length (thickness) of the bridge chip30in the third direction D3is 0.1 mm or more and 0.5 mm or less.

The bridge chip30includes a substrate31, a first resin film32, and a metal film33. For example, when viewed along the third direction D3, the shape and size of the substrate31are the same as the shape and size of the first resin film32.FIG.5is a cross-sectional view taken along line A-A ofFIG.4. As shown inFIGS.3,4, and5, the substrate31has a first surface31band a second surface31copposite to the first surface31b. The substrate31is made of silicon (Si). The substrate31has, for example, a rectangular plate shape. A length (thickness) of the substrate31in the third direction D3is, for example, 0.2 mm.

The first resin film32has flexibility. For example, the flexibility of the first resin film32is higher than the flexibility of the substrate31, and is higher than the flexibility of the metal film33. The first resin film32is formed on the first surface31b. The first resin film32is interposed between the first surface31bof the substrate31and the metal film33. The first resin film32has a third surface32bwith which the first surface31bof the substrate31comes into contact, and a fourth surface32copposite to the third surface32b. The metal film33comes into contact with the fourth surface32c. The first resin film32has, for example, a rectangular plate shape. As one example, a length (thickness) of the first resin film32in the third direction D3is 7 μm. For example, the first resin film32is made of polyimide. However, the first resin film32may be made of a material other than polyimide. For example, the first resin film32may be made of modified polyimide or polybenzoxazole.

The metal film33is formed on the first resin film32. The metal film33has conductivity. The metal film33is in contact with the fourth surface32cof the first resin film32. As one example, a length (thickness) of the metal film33in the third direction D3is 3 μm. In this case, since the metal film33is thin, the flexibility of the metal film33is increased. The metal film33includes a connecting portion33bfor an electrical connection with an element (for example, the driver IC11or the optical circuit element12). For example, the connecting portion33bis a pad.

For example, the bridge chip30includes a plurality of the metal films33. In this case, the plurality of metal films33are aligned along the second direction D2. For example, the metal films33are made of copper (Cu). In this case, fine patterning is made possible through plating to be described later. However, the metal films33may be made of a material other than copper. For example, the metal films33may be made of gold (Au) or aluminum (Al). The connecting portion33bof the metal film33is plated with, for example, Au. However, the connecting portion33bmay include an intermediate layer containing nickel (Ni) or palladium (Pd) between Au and Cu. The plurality of metal films33are in contact with the first resin film32. The first resin film32has insulating properties. The plurality of metal films33are electrically insulated from each other.

For example, the bridge chip30includes a second resin film34formed on the first resin film32and the metal films33. The second resin film34has flexibility. For example, the flexibility of the second resin film34is higher than the flexibility of the substrate31, and is higher than the flexibility of the metal films33. The second resin film34is in contact with the fourth surface32cof the first resin film32. The second resin film34has an opening34bon each of the metal films33. For example, a part of the metal film33is exposed through the opening34b, and the part of the metal film33, which is exposed through the opening34b, serves as the connecting portion33b.

The second resin film34has, for example, a rectangular plate shape. The second resin film34has a plurality of the openings34b. The plurality of openings34bare aligned along the second direction D2. For example, two openings34bare aligned along the first direction D1. As one example, the openings34bhave a rectangular shape. For example, the second resin film34is made of polyimide. The material of the second resin film34may be the same as the material of the first resin film32, or may be different from the material of the first resin film32. The second resin film34may be made of a material other than polyimide. For example, the second resin film34may be made of modified polyimide or polybenzoxazole. The second resin film34come into contact with the plurality of metal films33. The second resin film34has insulating properties. The plurality of metal films33are electrically insulated from each other. The second resin film34functions as a protection film that protects the plurality of metal films33. The second resin film34can also be omitted.

The metal films33include wirings33A. The wirings33A extend along the first direction D1. Each of the wirings33A includes two end portions. Each of the wirings33A includes a first pad33cformed as the connecting portion33bat one end portion (first end portion), and a second pad33dformed as the connecting portion33bat the other end portion (second end portion). For example, the first pad33cand the second pad33dare disposed at both respective ends of each of the wirings33A in the first direction D1.

For example, the first pad33cis configured to be electrically connectable to the driver IC11, and the second pad33dis configured to be electrically connectable to the optical circuit element12. In this case, the first pad33cis connected to the pad11fof the driver IC11, and the second pad33dis connected to the pad12cof the optical circuit element12. Hereinafter, a portion where the first pad33cis connected to the pad11fof the driver IC11and a portion where the second pad33dis connected to the pad12cof the optical circuit element12are referred to as joint portions. Each of the joint portions includes, for example, one of a stud bump46or a solder bump62to be described later. For example, the metal films33include a plurality of the wirings33A, each extending in the first direction D1. The plurality of wirings33A are disposed along the second direction D2. Therefore, a plurality of the first pads33care disposed along the second direction D2, and a plurality of the second pads33dare disposed along the second direction D2.

The bridge chip30includes a group C made up of a plurality of the wirings33A aligned along the second direction D2, and a plurality of the groups C are aligned along the second direction D2. As one example, the number of the wirings33A constituting each of the groups C is four. For example, in the group C, one layer of coplanar lines having a ground-signal-signal-ground (GSSG) configuration is formed. In the bridge chip30, for example, one layer of coplanar lines having the GSSG configuration are formed into four channels. The presence of two signals in each channel enables the transmission of differential signals. The configuration of the transmission line is not limited to GSSG, and may be, for example, ground-signal-ground signal-ground (GSGSG), signal-signal (SS), or signal-ground-signal (SGS). Further, in the bridge chip30, two layers of microstrip lines may be formed instead of one layer of coplanar lines.

For example, a thickness (length in the second direction D2) of the ground wiring33A is larger than a thickness of the signal wiring33A, for example, twice as large as that of the signal wiring33A. For example, the ground wiring33A includes two first pads33caligned along the second direction D2, and two second pads33daligned along the second direction D2. For example, the signal wiring33A includes one first pad33cat an end portion in the first direction D1, and one second pad33dat an end portion opposite to the first pad33c.

The substrate31includes a buffer portion31dpenetrating through the substrate31between the first surface31band the second surface31c.FIG.6is a cross-sectional view taken along line B-B ofFIG.4. As shown inFIGS.4,5, and6, the buffer portion31dis, for example, a through-hole penetrating through the substrate31in the third direction D3. The through-hole is hollow. For example, in a plan view of the substrate31(when viewed along the third direction D3), the buffer portion31dhas a rectangular shape. A length of the buffer portion31din the second direction D2is larger than a length of the buffer portion31din the first direction D1.

The connecting portion33bis disposed inside the buffer portion31din a plan view of the substrate31. Namely, when viewed in the third direction D3, a plurality of the connecting portions33bare located inside the buffer portion31d. The buffer portion31dhas, for example, first inner surfaces31qextending in both the second direction D2and the third direction D3, and second inner surfaces31rextending in both the first direction D1and the third direction D3. The buffer portion31dis defined by a pair of the first inner surfaces31qaligned along the first direction D1and a pair of the second inner surfaces31raligned along the second direction D2.

For example, the buffer portion31dincludes a first buffer portion31hand a second buffer portion31jaligned along the first direction D1. In a plan view of the substrate31, the first buffer portion31hincludes the plurality of first pads33cthereinside, and the second buffer portion31jincludes the plurality of second pads33dthereinside. In a plan view of the substrate31, for example, each of the first buffer portion31hand the second buffer portion31jhas a rectangular shape.

The substrate31includes a support portion31flocated inside the buffer portion31din a plan view of the substrate31, and a general portion31wthat is a portion of the substrate31other than the support portion31f. The support portion31fis made of, for example, silicon. The support portion31fis provided inside the buffer portion31d, and is separated from the general portion31w. Namely, in a plan view taken along the third direction D3, the support portion31fis surrounded by the buffer portion31d. The connecting portions33bare connected to the second surface31cof the substrate31via the first resin film32and the support portion31f. The support portion31fhas first outer surfaces31kextending in both the second direction D2and the third direction D3, and second outer surfaces31pextending in both the first direction D1and the third direction D3. The support portion31fhas a pair of the first outer surfaces31kaligned along the first direction D1, and a pair of the second outer surfaces31paligned along the second direction D2.

For example, the substrate31includes the support portion31fand a groove31s, which surrounds the support portion31f, in the buffer portion31din a plan view of the substrate31. As one example, a width of the groove31sis 50 μm. The groove31sis recessed from the second surface31calong the third direction D3. The groove31spenetrates through the substrate31in the third direction D3. The groove31shas a rectangular frame shape in a plan view of the substrate31. The groove31sincludes a first groove31tformed between the first inner surface31qand the first outer surface31k, and a second groove31vformed between the second inner surface31rand the second outer surface31p. The groove31sinclude a pair of the first grooves31taligned along the first direction D1, and a pair of the second grooves31valigned along the second direction D2.

The support portion31fis made independent of the general portion31wby the groove31s. Namely, the support portion31fis separated from the general portion31w. For example, the support portion31fhas an island shape independent of the general portion31w. The connecting portions33bof the metal films33are connected to the support portion31f, which is independent of the general portion31w, via the first resin film32inside the buffer portion31d. Therefore, portions of the substrate31and the first resin film32where the connecting portions33bare provided (portions of the substrate31and the first resin film32which overlap the connecting portions33bin a plan view taken along the third direction D3) are easily displaced with respect to the surrounding general portion31wsince the first resin film32, the metal films33, and the second resin film34have flexibility. A portion of the second resin film34, which overlaps the groove31sin a plan view of the substrate31, may be removed. By removing the portion of the second resin film34, which overlaps the groove31sin a plan view of the substrate31, the portions of the substrate31and the first resin film32where the connecting portions33bare provided are made to be more easily displaced with respect to the surrounding general portion31w.

Portions of the substrate31and the first resin film32where the first pads33care provided (portions of the substrate31and the first resin film32which overlap the first pads33cin a plan view taken along the third direction D3) are isolated from portions of the substrate31and the first resin film32where the second pads33dare provided (portions of the substrate31and the first resin film32which overlap the second pads33din a plan view taken along the third direction D3) by being surrounded by the first buffer portion31hand the second buffer portion31j, respectively. Therefore, the portions of the substrate31and the first resin film32where the first pads33care provided and the portions of the substrate31and the first resin film32where the second pads33dare provided can be displaced independently of each other. Therefore, even when the driver IC11or the heat sink block13connected to the first pads33c, the optical circuit element12, the spacers14, or the TEC15connected to the second pads33d, or the bottom wall2hdeforms (for example, expands or contracts) due to a change in temperature or the like, the portions where the first pads33care provided and the portions where the second pad33dare provided are flexibly displaced in response to the deformation. For example, when the distance between the first pads33cand the second pads33dis shortened due to deformation, the distance between the portions of the substrate31and the first resin film32where the first pads33care provided and the portions of the substrate31and the first resin film32where the second pads33dare provided are also shortened. In addition, when the distance between the first pads33cand the second pads33dis lengthened due to deformation, the distance between the portions of the substrate31and the first resin film32where the first pads33care provided and the portions of the substrate31and the first resin film32where the second pads33dare provided are also lengthened. Therefore, the joint portions between the driver IC11and the bridge chip30, the joint portions between the optical circuit element12and the bridge chip30, and the like can be protected from the influence of stress.

Next, an example of a method for manufacturing the bridge chip30will be described with reference toFIGS.7and8. First, a Si substrate41serving as the base of the substrate31is prepared (a step of preparing a Si substrate). For example, the Si substrate41has a wafer shape (as one example, an 8-inch wafer). Next, the first resin film32is film-formed on the Si substrate41(a step of film-forming a first resin film). When the first resin film32is film-formed, a baking process may be performed.

After the first resin film32is film-formed, a seed layer43is film-formed (a step of film-forming a seed layer). The seed layer43is made of, for example, copper (Cu). The seed layer43is film-formed by sputtering. Thereafter, a resist44is film-formed on the seed layer43, and is patterned (a step of patterning a resist). After the resist44is patterned, the metal film33is formed by performing electroplating to grow a plating on the seed layer43where there is no resist44(a step of forming a metal film). Then, the resist44is removed, and the seed layer43covered with the resist44is etched (for example, Cu etching).

Next, the second resin film34is film-formed on the first resin film32and the metal film33(a step of forming a second resin film). At this time, the plurality of openings34bthrough which the metal film33is exposed are formed by patterning the second resin film34through exposure and development (a step of forming openings). Then, portions of the metal film33exposed through the openings34bare subjected to a surface treatment. More specifically, a plating made of gold (Au), nickel (Ni) or palladium (Pd) is formed on the portions of the metal film33exposed through the openings34b(a step of forming a plating). Accordingly, the connecting portions33bare formed.

Then, a resist45is film-formed on a surface41bon an opposite side of the Si substrate41from the first resin film32, and is patterned. After the resist45is patterned, the groove31sis formed by performing etching (for example, Si etching) (a step of forming a groove). For example, deep etching is performed using Deep RIE to form the groove31s. The buffer portion31dand the support portion31fare formed by the formation of the groove31s. Then, after the resist45is removed and dicing is performed, a series of the steps for manufacturing the bridge chip30is completed.

Next, an example of a method for manufacturing the semiconductor integrated module1will be described with reference toFIG.9. First, in a package including the bottom wall2h, the first side walls2b, and the second side walls2c, the heat sink block13, the driver IC11, the TEC15, the spacers14, the optical circuit element12, and the optical component20are mounted on the bottom wall2h. The stud bumps46are formed on the pads11fof the driver IC11and the pads12cof the optical circuit element12(a step of forming stud bumps). For example, the stud bumps46are Au stud bumps. In the package, the bottom wall2h, the first side walls2b, and the second side walls2cmay be integrally formed.

For example, the bridge chip30is held by a collet47in a state where the connecting portions33bof the metal films33face downward. Then, the connecting portions33bare brought into contact with the respective stud bumps46, and the bridge chip30is flip-chip mounted on the driver IC11and the optical circuit element12by thermocompression bonding. At this time, since the connecting portions33bare supported at a tip of the collet47via the support portion31f, a load and heat can be applied to each of the stud bumps46. The bridge chip30may be mounted on the driver IC11and the optical circuit element12by ultrasonic joining instead of the thermocompression bonding. After the bridge chip30is mounted, the lid6is disposed on the first side walls2band the second side walls2cto seal the internal space2A, and then a series of the steps for manufacturing the semiconductor integrated module1is completed. Before the internal space2A is sealed with the lid6, the mounting of the optical component20, the wiring of the bonding wires8b, and the like are performed.

Next, actions and effects obtained from the bridge chip30and the semiconductor integrated module1according to the present embodiment will be described. The bridge chip30includes the first resin film32having flexibility between the substrate31and the metal films33. The metal films33include the connecting portions33bfor electrical connections with each of the driver IC11and the optical circuit element12. The substrate31includes the buffer portion31dpenetrating through the substrate31, and the connecting portions33bare disposed inside the buffer portion31din a plan view of the substrate31. Therefore, the connecting portions33b, the first resin film32having flexibility, and the buffer portion31dare aligned in order along the third direction D3that is a lamination direction of the substrate31, the first resin film32, and the metal films33. Portions where the connecting portions33bare located in a plan view of the substrate31can be displaced with respect to other portions of the bridge chip30since the connecting portions33bare separated from the surrounding substrate31(general portion31w) by the buffer portion31d.

FIG.10is a view schematically showing a displacement of a portion of the buffer portion31dwhere the connecting portion33bconnected to the pad12cof the optical circuit element12is located. As shown inFIG.10, since portions of the substrate31(support portion31f) and the first resin film32which are aligned with the connecting portion33balong the third direction D3are independent of the general portion31wof the substrate31, the first resin film32, the metal film33, and the second resin film34deform to be displaceable with respect to the surrounding general portion31winside the buffer portion31d. As one example, when a thickness (width) of the groove31sis 50 μm, the portion aligned with the connecting portion33balong the third direction D3can be displaced by approximately 10 μm.FIG.10shows the displacement of the portion where the second pad33dconnected to the pad12cof the optical circuit element12is located; however, a portion where the first pad33cconnected to the pad11fof the driver IC11is located can also be displaced in the same manner.

Since the connecting portions33bthat are electrically connected to each of the driver IC11and the optical circuit element12can be displaced with respect to other portions of the bridge chip30, even when a change in temperature or the like occurs and each of the pads11fof the driver IC11and the pads12cof the optical circuit element12is displaced, the influence of stress on the joint portions between the driver IC11and the bridge chip30and the joint portions between the optical circuit element12and the bridge chip30can be reduced. Therefore, the robustness of electrical connections between the driver IC11and the optical circuit element12can be improved. For example, in a case where there is no buffer portion31d, the relative positions of the connecting portions33bconnected to the driver IC11and the connecting portions33bconnected to the optical circuit element12are fixed, so that the joint portions between the driver IC11and the bridge chip30and the joint portions between the optical circuit element12and the bridge chip30are subjected to stress when each of the pads11fof the driver IC11and the pads11fof the optical circuit element12is displaced.

Further, in the present embodiment, the portions of the substrate31and the first resin film32where the first pads33care provided and the portions of the substrate31and the first resin film32where the second pads33dare provided are isolated from the general portion31wby the formation of the groove31s. Therefore, thermal insulation for the first pads33cand the second pads33dcan be improved. As a result of performing thermal analysis on the bridge chip30including the substrate31in which the groove31shaving a width of 50 μm was formed, and a bridge chip including a substrate in which the groove31swas not formed, a thermal resistance between the first pads33cand the second pads33din the bridge chip in which the groove31swas not formed was 104.4 [K/W], whereas the thermal resistance in the bridge chip30in which the groove31swas formed was 202.6 [K/W].

The bridge chip30may be the second resin film34having flexibility and may include the second resin film34that is formed on the first resin film32and the metal films33, and that has the openings34bon the metal films33. In this case, a part of the first resin film32and a part of the metal films33can be covered with the second resin film34having flexibility. The second resin film34functions as a protection film for the metal films33.

The substrate31may further include the support portion31finside the buffer portion31din a plan view of the substrate31. The connecting portions33bmay be connected to the second surface31cof the substrate31via the first resin film32and the support portion31f. In this case, the connecting portions33b, the first resin film32having flexibility, and the support portion31fare aligned in order along the third direction D3. Therefore, the first resin film32and the connecting portions33bcan be supported by the support portion31fwhile the portions of the first resin film32which are aligned with the connecting portions33balong the third direction D3are deformed. Accordingly, for example, when the bridge chip30is gripped by the collet47, and is mounted on the driver IC11and the optical circuit element12, a load and heat can be effectively applied to join the connecting portions33bto the pads11f.

The first resin film32may be made of polyimide. In this case, the first resin film32can be a resin film having excellent flexibility and stretchability.

The metal films33may be made of any of copper (Cu), gold (Au), and aluminum (Al).

Each of the metal films33may include the wiring33A having a shape extending in the first direction D1and including two end portions. The one end portion (first end portion) of the wiring33A includes the first pad33cformed as the connecting portion33b, and the other end portion (second end portion) of the wiring33A includes the second pad33dformed as the connecting portion33b. The first pad33cmay be configured to be electrically connectable to the driver IC11, and the second pad33dmay be configured to be electrically connectable to the optical circuit element12isolated from the driver IC11. In this case, the first pad33cof the wiring33A of the metal film33can be electrically connected to the driver IC11, and the second pad33dof the wiring33A of the metal film33can be electrically connected to the optical circuit element12. Accordingly, an electrical signal can be transmitted from the driver IC11to the optical circuit element12via the wiring33A.

The metal films33may include the plurality of wirings33A, each extending in the first direction D1, and each of the plurality of wirings33A includes two end portions. Each of the wirings33A may include the first pad33cat the one end portion (first end portion), and each of the wirings33A may include the second pad33dat the other end portion (second end portion). The first pads33cof a plurality of the wirings33A may be disposed along the second direction D2, and the second pads33dof a plurality of the wirings33A may be disposed along the second direction D2. The plurality of wirings33A are insulated from each other. The buffer portion31dmay include the first buffer portion31hincluding the plurality of first pads33cthereinside in a plan view of the substrate31, and the second buffer portion31jincluding the plurality of second pads33dthereinside in a plan view of the substrate31. In this case, the first pad33cand the portion of the first resin film32which is aligned with the first pad33calong the third direction D3, and the second pad33dand the portion of the first resin film32which is aligned with the second pad33dalong the third direction D3can be displaced relative to each other.

The substrate31may be made of silicon. In addition, the support portion31fof the substrate31may be made of silicon. In this case, the heating of the substrate31can be easily performed during mounting or the like. In addition, the formation of the groove31scan be easily performed by etching.

Next, bridge chips according to modification examples will be described. A configuration of a part of bridge chips according to various modification examples to be described later is the same as a configuration of a part of the bridge chip30described above. Therefore, in the following description, configurations that overlap with those of the bridge chip30are denoted by the same reference signs, and description thereof will be omitted as appropriate.

FIG.11is a plan view showing an internal structure of a semiconductor integrated module including a bridge chip50according to a first modification example.FIG.12is a cross-sectional view of the semiconductor integrated module ofFIG.11taken along a plane extending along both the first direction D1and the third direction D3. As shown inFIGS.11and12, the bridge chip50extends from the optical circuit element12across the driver IC11to the package2.

The bridge chip50includes a substrate51, a first resin film52, and a metal film53. The first resin film52is the same as the first resin film32, for example, except for a length of the first resin film52in the first direction D1. The metal film53includes a wiring53A, and the wiring53A includes the first pad33c, the second pad33d, a third pad53c, and a fourth pad53das connecting portions53b. The third pad53cis configured to be electrically connectable to the driver IC11, and the fourth pad53dis configured to be electrically connectable to the package2. More specifically, the third pad53cis connected to the pad11bof the driver IC11, and the fourth pad53dis connected to the terminal5formed on the fifth surface2jof the package2.

The substrate51includes a buffer portion51dand a support portion51f. For example, the shape and size of the buffer portion51dare the same as the shape and size of the buffer portion31ddescribed above, and the shape and size of the support portion51fare the same as the shape and size of the support portion31fdescribed above. The buffer portion51dincludes the first buffer portion31h, the second buffer portion31j, a third buffer portion51h, and a fourth buffer portion51j. In a plan view of the substrate51, the third buffer portion51hincludes a plurality of the third pads53cthereinside, and the fourth buffer portion51jincludes a plurality of the fourth pads53dthereinside.

As described above, in the bridge chip50according to the first modification example, the substrate51includes the buffer portion51dpenetrating through the substrate51, and the connecting portions53bare disposed inside the buffer portion51din a plan view of the substrate51. Therefore, portions where the connecting portions53bare located in a plan view of the substrate51can be displaced with respect to other portions of the bridge chip50by the deformation of the first resin film32therearound. Since the connecting portions53bthat are electrically connected to each of the driver IC11, the optical circuit element12, and the package2are configured to be displaceable relative to each other, the influence of stress on joint portions between the package2and the bridge chip50, joint portions between the driver IC11and the bridge chip50, and joint portions between the optical circuit element12and the bridge chip50can be reduced. Therefore, the same actions and effects as those of the bridge chip30can be obtained from the bridge chip50. Further, the bridge chip50extends from the optical circuit element12over the driver IC11to the package2, so that the need for the bonding wires8bconnecting the package2and the driver IC11to each other can be eliminated.

FIG.13is a plan view showing a bridge chip60according to a second modification example.FIG.14is a cross-sectional view taken along line C-C ofFIG.13.FIG.15is a cross-sectional view taken along line D-D ofFIG.13. As shown inFIGS.13,14, and15, the bridge chip60includes a substrate61that does not include the support portion31f. Therefore, at locations from the connecting portions33balong the third direction D3, the first resin film32is provided but the substrate61is not provided. Therefore, in the bridge chip60, portions of the first resin film32where the connecting portions33bare provided (portions of the first resin film32which overlap the connecting portions33bin a plan view taken along the third direction D3) are much more easily displaced with respect to the surrounding general portion31wthan in the case of the bridge chip30.

FIG.16is a view for describing the mounting of the bridge chip60on the driver IC11and the optical circuit element12. As shown inFIG.16, the bridge chip60includes the solder bumps62formed on the connecting portions33b. The solder bumps62are made of, for example, tin-silver-copper (SnAgCu) or gold-tin (AuSn). For example, the bridge chip60is held by the collet47in a state where the solder bumps62face downward. Then, the bridge chip60is flip-chip mounted on the driver IC11and the optical circuit element12by bringing each of the solder bumps62into contact with the stud bump46, and heating and melting the solder bumps62.

As described above, in the bridge chip60according to the second modification example, the first resin film32is provided at locations from the connecting portions33balong the third direction D3, but the substrate61(support portion31f) is not provided. Therefore, since the portions of the first resin film32where the connecting portions33bare provided can deform more easily, even when a change in temperature or the like occurs, the influence of stress on joint portions between the driver IC11and the bridge chip60and joint portions between the optical circuit element12and the bridge chip60can be more reliably reduced. Further, the bridge chip60includes the solder bumps62formed on the connecting portions33b. In this case, the connecting portions33bcan be connected to each of the driver IC11and the optical circuit element12by heating and melting the solder bumps62. Therefore, the connecting portions33bcan be connected to the driver IC11and the optical circuit element12without pressing the connecting portions33bagainst the driver IC11and the optical circuit element12via the support portion31fduring connection.

FIG.17is a plan view showing a bridge chip70according to a third modification example.FIG.18is a cross-sectional view taken along line E-E ofFIG.17. As shown inFIGS.17and18, the bridge chip70includes a substrate71in which a plurality of support portions71fare formed inside each of the first buffer portion31hand the second buffer portion31j; the first resin film32; and a metal film73. In the bridge chip70, for example, one layer of coplanar lines having a GSSG configuration are formed into four channels. The metal film73includes a ground wiring73A and a signal wiring73B, and for example, a thickness of the ground wiring73A is approximately the same as a thickness of the signal wiring73B.

The substrate71includes the plurality of support portions71faligned along the second direction D2. The support portion71fis provided, for example, for each channel. The bridge chip70includes the group C made up of a plurality of GSSG wirings aligned along the second direction D2, and the support portion71fis provided for each group C. In a plan view of the substrate71, a groove71sis formed between two groups C aligned along the second direction D2. The plurality of support portions71fare separated from each other by the grooves71s.

As described above, in the bridge chip70according to the third modification example, the substrate71includes the plurality of support portions71fseparated from each other, and the support portion71fis provided for each channel. Therefore, portions where the connecting portions33bare located in a plan view of the substrate71can be displaced independently for each channel. In the third modification example, the example in which the divided support portion71fis provided for each channel has been described. However, the support portion71fmay not be provided for each channel, and the mode in which the support portions71fare separated is not particularly limited. Namely, in the third modification example, the plurality of support portions71fare configured by dividing one support portion31finto four segments for each channel; however, the plurality of support portions71fmay be configured by dividing one support portion31finto two or three segments, and the number of divisions by which one support portion31fis divided into the plurality of support portions71fmay be five or more.

FIG.19is a plan view showing a bridge chip80according to a fourth modification example. The bridge chip80includes a substrate81in which a hole82located between the first buffer portion31hand the second buffer portion31jand recessed from the second surface31calong the third direction D3is formed. The substrate81has a plurality of the holes82, and for example, the holes82penetrate through the substrate81in the third direction D3. In a plan view of the substrate81, for example, the plurality of holes82are disposed in a staggered pattern. However, the disposition mode of the plurality of holes82is not particularly limited. In the bridge chip80, the holes82are formed between the first buffer portion31hand the second buffer portion31jin a plan view of the substrate81. Therefore, thermal insulation between the connecting portions33b(first pads33c) inside the first buffer portion31hand the connecting portions33b(second pads33d) inside the second buffer portion31jcan be improved. Therefore, for example, the inflow of heat from the driver IC11to the optical circuit element12via the bridge chip80(such a phenomenon is referred to as thermal crosstalk) can be reduced.

FIG.20is a cross-sectional view showing a semiconductor integrated module91according to a fifth modification example. As shown inFIG.20, the semiconductor integrated module91includes a base92having a reference surface92b; a first element93and a second element94mounted on the reference surface92b; and the bridge chip30described above. For example, the first element93is an element that transmits an electrical signal, and the second element94is an element that receives an electrical signal. For example, the semiconductor integrated module91is not an optical module, and the semiconductor integrated module91does not require impedance control as in the semiconductor integrated module1described above.

The base92is, for example, a package substrate made of an organic material. The first element93includes a first pad93band a second pad93cformed on a surface facing opposite to the base92. The second element94includes a third pad94band a fourth pad94cformed on a surface facing opposite to the base92. The first element93and the second element94are mounted face-up on the base92. For example, the semiconductor integrated module91includes a first bonding wire95band a second bonding wire95c. The first bonding wire95belectrically connects a pad (not shown) of the base92and the first pad93bto each other, and the second bonding wire95celectrically connects a pad (not shown) of the base92and the fourth pad94cto each other. The connecting portion33b(first pad33c) of the bridge chip30is connected to the second pad93cvia a stud bump96b, and the connecting portion33b(second pad33d) of the bridge chip30is connected to the third pad94bvia a stud bump96c.

As described above, since the semiconductor integrated module91according to the fifth modification example includes the bridge chip30described above, the same effects as those described above are achieved. Namely, the connecting portion33bconnected to the first element93and the connecting portion33bconnected to the second element94can be displaced relative to each other. Therefore, even when a change in temperature or the like occurs, portions of the first resin film32which are aligned with the connecting portions33balong the third direction D3are displaced, so that the influence of stress on joint portions between the first element93and the bridge chip30and joint portions between the second element94and the bridge chip30can be reduced. Therefore, the robustness of electrical connections between the first element93and the second element94can be improved.

FIG.21is a cross-sectional view showing a semiconductor integrated module101according to a sixth modification example. As shown inFIG.21, the semiconductor integrated module101includes a base102having a reference surface102b; a first element103and a second element104mounted on the reference surface102b; and the bridge chip30described above. For example, the first element103is an element that transmits an electrical signal, and the second element104is an element that receives an electrical signal. When viewed along the third direction D3, the bridge chip30is disposed between the first element103and the second element104.

The base102is, for example, a package substrate made of an organic material. The base102includes a pad102cdisposed at a position facing the first element103on the reference surface102b, and a pad102ddisposed at a position facing the second element104on the reference surface102b. For example, the base102includes a plurality of the pads102cand a plurality of the pads102d. The plurality of pads102cand the plurality of pads102dare aligned along the reference surface102b.

The first element103includes a first pad103band a second pad103cformed on a surface facing the base102. The second element104includes a third pad104band a fourth pad104cformed on a surface facing the base102. The semiconductor integrated module101includes a first terminal105band a second terminal105cfor surface mounting which are provided on the pad102cand the pad102dof the base102, respectively. The first terminal105belectrically connects the pad102cand the first pad103bto each other, and the second terminal105celectrically connects the pad102dand the third pad104bto each other. Namely, the first element103and the second element104are mounted face-down on the base102. Face-down mounting is also referred to as flip-chip mounting.

In the semiconductor integrated module101, the bridge chip30is disposed such that the substrate31faces the base102and the connecting portions33bface the first element103and the second element104. Namely, the bridge chip30is disposed such that the connecting portions33bface upward and the substrate31faces downward. The substrate31faces the base102. The bridge chip30extends between the base102and each of the first element103and the second element104in both the first direction D1and the second direction D2. The connecting portion33b(first pad33c) is connected to the second pad103c, for example, via a stud bump106b, and the connecting portion33b(second pad33d) is connected to the fourth pad104c, for example, via a stud bump106c. A solder bump may be used instead of the stud bump106c. For example, the bridge chip30is connected to the first element103and the second element104by face-down mounting in a state where the bridge chip30is disposed face-up on a base of an assembly jig. The first element103and the second element104to which the bridge chip30is connected are mounted upside down on the base102.

Subsequently, a bridge chip according to a seventh modification examples will be described. The shape and size of the bridge chip according to the seventh modification example are the same as those of the bridge chip30shown inFIGS.2,3, and4. The bridge chip according to the seventh modification example differs from the bridge chip30in that the substrate31is made of glass.

A method for manufacturing the bridge chip according to the seventh modification example will be described with reference toFIGS.22and23. Hereinafter, descriptions that overlap with the method for manufacturing the bridge chip30shown inFIGS.7and8will be omitted as appropriate. First, a Si-glass integrated substrate111is prepared (a step of preparing a Si-glass integrated substrate). In the Si-glass integrated substrate111, a portion where the groove31sis to be formed is made of silicon112in advance, and a portion where the groove31sis not to be formed is made of glass113.

The film-formation of the first resin film32, the film-formation of the seed layer43, the patterning of the resist44, the formation of the metal film33, the film-formation of the second resin film34, and the surface treatment of the metal film33are performed. After a portion of the metal film33exposed through the opening34bof the second resin film34is subjected to the surface treatment, Si etching (for example, dry etching of the silicon112) is performed to form the groove31s. Then, after dicing is performed, the bridge chip according to the seventh modification example is completed. As described above, in the bridge chip according to the seventh modification example, since the substrate31is made of glass, thermal insulation of the substrate31can be further improved, and thermal crosstalk can be reduced. Further, even in the case of the bridge chip made of the glass113that is difficult to etch, the groove31scan be easily manufactured by using the Si-glass integrated substrate111as described above. When Si is etched inFIG.23, a resist is not used since the etching rate of glass is smaller than that of Si. However, Si may be etched using the resist45in the same manner as inFIG.8.

Next, a bridge chip according to an eighth modification example will be described. The shape and size of the bridge chip according to the eighth modification example are the same as those of the bridge chip30shown inFIGS.2,3, and4. In the bridge chip according to the eighth modification example, the support portion31fof the substrate31is made of silicon, and portions of the substrate31other than the support portion31fare made of glass.

A method for manufacturing the bridge chip according to the eighth modification example will be described with reference toFIGS.24and25. First, a Si-glass integrated substrate121is prepared (a step of preparing a Si-glass integrated substrate). In the Si-glass integrated substrate121, portions where the groove31sand the support portion31fare to be formed are made of silicon122in advance, and portions where both the groove31sand the support portion31fare not to be formed are made of glass123. Similarly to the seventh modification example described above, the film-formation of the first resin film32, the film-formation of the seed layer43, the patterning of the resist44, the formation of the metal film33, the film-formation of the second resin film34, and the surface treatment of the metal film33are performed.

After a portion of the metal film33exposed through the opening34bof the second resin film34is subjected to the surface treatment, the resist45is patterned on a portion of the silicon112where the support portion31fis to be formed. After the resist45is patterned, the groove31sis formed by performing Si etching. A portion of the silicon122where Si etching is not performed is formed as the support portion31f. Then, after the resist45is removed and dicing is performed, the bridge chip according to the eighth modification example is completed. As described above, in the bridge chip according to the eighth modification example, a portion of the substrate31between the first buffer portion31hand the second buffer portion31jis made of glass. Therefore, in the bridge chip according to the eighth modification example, thermal insulation of the substrate31can be further improved, and the same effects as those of the seventh modification example can be obtained. When Si is etched inFIG.25, the resist45is not formed on the glass since the etching rate of glass is smaller than that of Si. However, the resist45may also be formed on the glass.

The embodiment and various modification examples of the bridge chip and the semiconductor integrated module according to the present disclosure have been described above. However, the present invention is not limited to the embodiment or the various modification examples described above, and can be changed as appropriate within the scope of the concept described in the claims. In addition, the bridge chip and the semiconductor integrated module according to the present disclosure may be a combination of a plurality of examples from the embodiment and the first to eighth modification examples described above. For example, the configuration, shape, size, material, number, and disposition mode of each portion of the bridge chip and the semiconductor integrated module according to the present disclosure are not limited to the embodiment or the modification examples described above, and can be modified as appropriate. For example, in the above-described embodiment, the bridge chip30including the second resin film34has been described. However, the bridge chip may not include the second resin film34.