Solid-state imaging device

A solid-state imaging device includes a semiconductor substrate having a foreside provided with an imaging area and an electrode pad, the imaging area having an array of optical sensors, the electrode pad being disposed around a periphery of the imaging area; a transparent substrate joined to the foreside of the semiconductor substrate with a sealant therebetween; underside wiring that extends through the semiconductor substrate from the electrode pad to an underside of the semiconductor substrate; and a protective film composed of an inorganic insulating material and interposed between the semiconductor substrate and the sealant, the protective film covering at least the electrode pad.

CROSS REFERENCES TO RELATED APPLICATIONS

The present invention contains subject matter related to Japanese Patent Application JP 2006-323042 filed in the Japanese Patent Office on Nov. 30, 2006, the entire contents of which are incorporated herein by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to solid-state imaging devices, and particularly, to a solid-state imaging device that includes an electrode pad on a foreside of a semiconductor substrate and underside wiring extending through the semiconductor substrate from an underside of the semiconductor substrate so as to be connected to the electrode pad.

2. Description of the Related Art

As a small-size optical sensor device, a solid-state imaging device has been reported, which is formed by bonding a transparent substrate onto a peripheral region of an imaging-area face of a chip-size semiconductor substrate with a sealant, forming a through hole that extends from an underside of the semiconductor substrate to an electrode pad extending around the imaging-area face, and then forming underside wiring by filling the through hole with a conductive material. Specifically, in order to form solid-state imaging devices of the aforementioned type, a transparent substrate is first bonded onto a wafer. Then, after forming the underside wiring, the transparent substrate and the wafer are segmented into pieces so that each device is formed into a chip-size package. Examples of such a solid-state imaging device are disclosed in Japanese Unexamined Patent Application Publication No. 2005-202101 and in Preprint for Association of Super-Advanced Electronics Technologies (ASET): SEMI Forum Japan 2005, p. 46 (JISSO Seminar, Jun. 7, 2005, SEMI Japan).

An example of a solid-state imaging device of the related art will be described below with reference toFIG. 8. A solid-state imaging device10shown inFIG. 8includes a transparent substrate22and a semiconductor substrate11that are bonded to each other with a sealant21therebetween. The semiconductor substrate11has thereon an imaging area S having an array of optical sensors and an electrode pad12extending from the imaging area S.

The imaging area S is provided at a central section on a foreside of the semiconductor substrate11. The semiconductor substrate11has an insulating film13composed of, for example, silicon oxide (SiO2) disposed thereon. The electrode pad12is disposed on the insulating film13and extends along the periphery of the semiconductor substrate11. The electrode pad12is formed of, for example, a thin aluminum (Al) film having a thickness of about several hundreds of nanometers.

The semiconductor substrate11and the insulating film13have a through hole14that extends from the electrode pad12to an underside11aof the semiconductor substrate11. An insulating film15is provided on the underside11aof the semiconductor substrate11and covers the sidewalls of the through hole14. At the underside of the semiconductor substrate11, underside wiring16formed of a copper (Cu) film with a thickness of several tens of micrometers is provided, such that the underside wiring16covers the inner walls of the through hole14covered with the insulating film15.

An underside-protection resin17is provided above the underside wiring16and the insulating film15and is embedded in the through hole14. The underside-protection resin17is given an opening17athrough which the underside wiring16is exposed. The underside wiring16exposed through this opening17ahas a bump18disposed thereon, which serves as an external connection terminal.

On the other hand, the sealant21is composed of an organic insulating material having adhesion properties and is formed to a thickness of several tens of micrometers on a side of the semiconductor substrate11where the electrode pad12is disposed. With this sealant21, the transparent substrate22formed of a glass plate is bonded to the semiconductor substrate11.

SUMMARY OF THE INVENTION

Referring toFIG. 9, in the solid-state imaging device10described above, the electrode pad12formed of a thin Al film having a thickness of several hundreds of nanometers is sandwiched between and in contact with the sealant21having a thickness of several tens of micrometers and the underside wiring16. Since the glass transition temperature (Tg) of the sealant21is generally low, if the underside wiring16thermally expands as a result of a reflow soldering process performed for forming the bump18or a heating process performed for forming the underside wiring16, the sealant21may flow and thus cause stress concentration on the electrode pad12. This stress concentration on the electrode pad12can cause a crack D1to form in the insulating film13having a coefficient of linear expansion that differs from that of a metallic material constituting the underside wiring16by about two digits. If the material constituting the sealant21undergoes plastic deformation, detachment D2can occur at the bottom of the through hole14, thus leading to disconnection.

It is desirable to provide a solid-state imaging device that is free of damages, such as disconnection caused by stress concentration on an electrode pad.

A solid-state imaging device according to an embodiment of the present invention includes a semiconductor substrate having a foreside provided with an imaging area and an electrode pad, the imaging area having an array of optical sensors, the electrode pad being disposed around a periphery of the imaging area; a transparent substrate joined to the foreside of the semiconductor substrate with a sealant therebetween; underside wiring that extends through the semiconductor substrate from the electrode pad to an underside of the semiconductor substrate; and a protective film composed of an inorganic insulating material and interposed between the semiconductor substrate and the sealant, the protective film covering at least the electrode pad.

According to this solid-state imaging device, the protective film composed of an inorganic insulating material is interposed between the electrode pad and the sealant. This prevents the electrode pad from being sandwiched between and in contact with the sealant and the underside wiring. In addition, an inorganic insulating material is generally more rigid than the sealant composed of an organic insulating material. Therefore, even when a manufacturing process that involves a heat treatment step causes thermal expansion of the underside wiring, stress concentration on the electrode pad can be reduced since the electrode pad is covered with the protective film. Accordingly, the electrode pad and the underside wiring are prevented from becoming detached from each other as a result of stress concentration on the electrode pad, thereby preventing the solid-state imaging device from being damaged.

A solid-state imaging device according to another embodiment of the present invention includes a semiconductor substrate having a foreside provided with an imaging area and an electrode pad, the imaging area having an array of optical sensors, the electrode pad being disposed around a periphery of the imaging area; a transparent substrate joined to the foreside of the semiconductor substrate with a sealant therebetween; and underside wiring that extends through the semiconductor substrate from the electrode pad to an underside of the semiconductor substrate. The electrode pad is given a thickness that is greater than a film thickness of a wiring material constituting the underside wiring.

According to this solid-state imaging device, the electrode pad is given a thickness that is greater than the film thickness of the wiring material constituting the underside wiring. Consequently, even though the electrode pad is sandwiched between and in contact with the sealant and the underside wiring, an adverse effect caused by stress concentration on the electrode pad due to thermal expansion of the underside wiring during a heat treatment step in the manufacturing process can be reduced. Accordingly, the electrode pad and the underside wiring are prevented from becoming detached from each other as a result of stress concentration on the electrode pad, thereby preventing the solid-state imaging device from being damaged.

According to the solid-state imaging device of each of the aforementioned embodiments of the present invention, the solid-state imaging device is prevented from being damaged during a heat treatment step in a manufacturing process, thereby enhancing the reliability of the solid-state imaging device as well as achieving a higher yield rate.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

First Embodiment

FIG. 1Ais a cross-sectional view showing a solid-state imaging device according to a first embodiment of the present invention.FIG. 1Bis an enlarged cross-sectional view of region IB inFIG. 1A. Components that are the same as those in the related art are given the same reference numerals.

A solid-state imaging device1shown inFIGS. 1A and 1Bincludes a transparent substrate22and a semiconductor substrate11that are bonded to each other with a sealant21therebetween. The semiconductor substrate11has thereon an imaging area S having an array of optical sensors and an electrode pad12extending from the imaging area S.

The imaging area S is provided at a central section on a foreside of the semiconductor substrate11composed of, for example, silicon. The array of optical sensors in the imaging area S may be of a CCD-type or an MOS-type. The semiconductor substrate11has an insulating film13composed of, for example, SiO2disposed thereon. The electrode pad12is disposed on the insulating film13and extends along the periphery of the semiconductor substrate11. The electrode pad12is formed of, for example, a thin aluminum film having a thickness of about several hundreds of nanometers. Other than aluminum (Al), the material used for the electrode pad12includes copper (Cu), gold (Au), or silver (Ag). Although not shown, a barrier layer composed of titanium (Ti)/titanium nitride (TiN) or tantalum (Ta)/tantalum nitride (TaN) underlies the electrode pad12so as to prevent diffusion of the conductive material from the electrode pad12to the insulating film13.

The semiconductor substrate11and the insulating film13have a through hole14that extends from the electrode pad12to an underside11aof the semiconductor substrate11. The through hole14has a diameter that is smaller than that of the electrode pad12. The sidewalls of the through hole14and the underside11aof the semiconductor substrate11are entirely covered with an insulating film15composed of, for example, SiO2and having a thickness of several micrometers. Underside wiring16formed of a copper film with a thickness of several tens of micrometers is disposed on the insulating film15with a barrier layer (not shown) interposed therebetween, such that the underside wiring16covers the inner walls of the through hole14covered with the insulating film15. The barrier layer is composed of, for example, Ti/Tin and is capable of preventing diffusion of copper.

An underside-protection resin17is provided above the underside wiring16and the insulating film15and is embedded in the through hole14. The underside-protection resin17is given an opening17athrough which the underside wiring16is exposed. The underside wiring16exposed through this opening17ahas a bump18disposed thereon, which serves as an external connection terminal.

Although the above description is directed to an example where the underside wiring16covers the inner walls of the through hole14, the underside wiring16is not particularly limited in shape and may alternatively be embedded in the through hole14.

In the first embodiment, the semiconductor substrate11and the sealant21have interposed therebetween a protective film31composed of an inorganic insulating material, such that the protective film31covers at least the electrode pad12. This prevents the electrode pad12from being sandwiched between and in contact with the sealant21and the underside wiring16. The protective film31composed of an inorganic insulating material is generally more rigid than the sealant21composed of an organic insulating material. Therefore, for example, when a heat treatment step is performed for forming the underside wiring16or the underside-protection resin17and causes thermal expansion of the underside wiring16, stress concentration on the electrode pad12caused by the thermal expansion can be reduced.

The inorganic insulating material used for the protective film31is preferably an optically transparent insulating material, and is generally silicon dioxide (SiO2) or silicon nitride (SiN). The protective film31may either be a single-layer film or a multilayer film. In this case, the protective film31is, for example, a SiN film.

Although the above description is directed to an example where the protective film31is disposed entirely over the insulating film13so as to cover the electrode pad12, the protective film31may be patterned such that it covers at least the electrode pad12.

On the other hand, the sealant21is disposed so as to cover at least an area of the protective film31that extends along the periphery of the semiconductor substrate11. Here, the sealant21is provided so as to entirely cover the protective film31. In this case, the sealant21is composed of, for example, an optically transparent organic insulating material that has adhesion properties, and is disposed on the protective film31while being given a thickness of several tens of micrometers. For the sealant21, a thermosetting resin or an ultraviolet curable resin may be used. In this case, a thermosetting epoxy resin, for example, is used.

The transparent substrate22formed of, for example, a glass plate is bonded onto the semiconductor substrate11having the protective film31thereon with the sealant21interposed between the transparent substrate22and the semiconductor substrate11. The transparent substrate22may be composed of a typical glass lens material, quartz, or crystal. The transparent substrate22and the semiconductor substrate11have the same shape in plan view.

The solid-state imaging device1described above is manufactured in the following manner.

First, a semiconductor wafer having an array of sections corresponding to semiconductor substrates11of solid-state imaging devices1is prepared. The semiconductor wafer has disposed thereon an insulating film13, which has electrode pads12disposed thereon. A protective film31composed of SiN is formed on the insulating film13so as to cover at least the electrode pads12. Subsequently, a transparent substrate having the same size as the semiconductor wafer is bonded to the semiconductor wafer with a sealant21therebetween. This bonding process involves applying the sealant21over the semiconductor wafer or the transparent substrate by, for example, spin coating and then bonding the semiconductor wafer and the transparent substrate together. The sealant21is then cured by heating or ultraviolet radiation. In a case where a photosensitive material is used as the sealant21, the sealant21is cured by heating.

The semiconductor wafer having the transparent substrate22bonded thereto has its underside subject to grinding so that the thickness of the semiconductor substrates11to be formed is reduced to, for example, 100 μm or less. Subsequently, through holes14extending to the bottom surfaces of the electrode pads12are formed from the underside of the semiconductor wafer by, for example, laser machining, photolithography, or reactive ion etching (RIE).

Then, an insulating film15composed of, for example, SiO2is formed entirely over the underside of the semiconductor wafer such that the insulating film15covers the sidewalls of the through holes14. The insulating film15may be formed of, for example, an epoxy dry film.

Subsequently, a Ti/TiN barrier film (not shown) and a copper seed layer (not shown) are formed by, for example, sputtering so as to cover the inner walls of the through holes14covered with the insulating film15. A copper film is then formed on the seed layer by electroplating. The barrier film, the seed layer, and the copper film are patterned, thereby forming underside wiring16.

Subsequently, the semiconductor wafer and the transparent substrate are together cut into individual semiconductor substrates11, whereby individual solid-state imaging devices1are obtained. In this case, cross-sectionally V-shaped grooves are preferably formed on the transparent substrate prior to the cutting step so that the semiconductor wafer and the transparent substrate can be cut along these grooves.

Subsequently, in each semiconductor substrate11, a laminate film is bonded onto the insulating film15so as to fill the through hole14having the underside wiring16thereon, thereby forming an underside-protection resin17. An opening17ais then formed in the underside-protection resin17so that the underside wiring16is exposed through this opening17a. On the underside wiring16exposed through the opening17a, a bump18composed of Sn—Ag—Cu is formed. Instead of forming the underside-protection resin17with a laminate film, the underside-protection resin17may be formed by vacuum coating or spray coating. In the above-described manner, a solid-state imaging device1is obtained.

In the solid-state imaging device1, since the protective film31composed of an inorganic insulating material is interposed between the electrode pad12and the sealant21, stress concentration on the electrode pad12caused by thermal expansion of the underside wiring16during a heat treatment step in the manufacturing process can be reduced. Accordingly, the electrode pad12and the underside wiring16are prevented from becoming detached from each other as a result of stress concentration on the electrode pad12, thereby preventing the solid-state imaging device1from being damaged. This enhances the reliability of the solid-state imaging device1as well as achieving a higher yield rate.

Although the first embodiment described above is directed to an example where the sealant21composed of an optically transparent organic insulating material is disposed entirely over the protective film31that covers the entire semiconductor substrate11, the sealant21may alternatively be disposed so as to cover the area of the electrode pad12, that is, an area excluding the imaging area S but surrounding the imaging area S. In that case, the sealant21may be formed in the following manner. First, the sealant21is applied onto the protective film31by, for example, spin coating using, for example, photosensitive resin. Then, exposure and development steps are implemented to pattern the sealant21so that it is formed in an area excluding the imaging area S. In this case, since the sealant21is not formed over the imaging area S, the sealant21may be composed of an opaque organic insulating material. Subsequently, as in the first embodiment, a transparent substrate is bonded onto the sealant21. As a further alternative, the sealant21may be formed in an area of the transparent substrate that faces the aforementioned area excluding the imaging area S.

Second Embodiment

A solid-state imaging device2according to a second embodiment of the present invention will now be described with reference toFIGS. 2A and 2B.FIG. 2Ais an enlarged cross-sectional view showing a relevant part of the solid-state imaging device2and taken along line IIA-IIA inFIG. 2B.FIG. 2Bis a top view showing a state where a sealant21is not yet formed. In the second embodiment, the components disposed at the underside11aof the semiconductor substrate11including the underside wiring16provided within the through hole14are the same as those in the first embodiment described above with reference toFIGS. 1A and 1B.

Referring toFIG. 2A, similar to the first embodiment, a protective film32composed of an inorganic insulating material is disposed on the insulating film13so as to cover the electrode pad12. Referring toFIG. 2B, in the second embodiment, the electrode pad12is segmented into a connection region12aconnected to the underside wiring16and an inspection region12b. The protective film32has an opening32athrough which the inspection region12bis exposed. Consequently, before application of the sealant21(seeFIG. 2B), a probe may be brought into contact with the inspection region12bof the electrode pad12exposed through the opening32aso as to inspect whether the optical sensors are defective or non-defective. Referring toFIG. 2A, after the inspection, the transparent substrate22is bonded onto the sealant21so that the sealant21fills the opening32a.

Because the electrode pad12is segmented into the connection region12aand the inspection region12b, a probe mark formed by bringing the inspection probe into contact with the electrode pad12is prevented from protruding towards an area of the insulating film13where the through hole14is formed. Consequently, this prevents the electrode pad12from being corroded or the underside wiring16from being formed defectively, which can occur when process gas or plasma attack used for a machining process on the through hole14causes a damage (forms a hole) in the sealant21, and absorbed matter such as water or chemical in the damaged section is released during the process.

Accordingly, the solid-state imaging device2of the second embodiment achieves similar advantages to those achieved by the solid-state imaging device1of the first embodiment since the protective film32composed of an inorganic insulating material is interposed between the electrode pad12and the sealant21.

Furthermore, in the solid-state imaging device2according to the second embodiment, the inspection region12bof the electrode pad12exposed through the opening32adoes not overlap the connection region12aconnected to the underside wiring16. This prevents defects from occurring due to probe marks.

Third Embodiment

A solid-state imaging device3according to a third embodiment of the present invention will now be described with reference toFIG. 3.FIG. 3is an enlarged cross-sectional view showing a relevant part of the solid-state imaging device3. In the solid-state imaging device3shown inFIG. 3, the components disposed at the underside11aof the semiconductor substrate11including the underside wiring16provided within the through hole14are the same as those in the first embodiment described above with reference toFIGS. 1A and 1B.

Referring toFIG. 3, a protective film33according to the third embodiment covers the electrode pad12and includes a first protective layer33′ disposed on the insulating film13, and a second protective layer33″ disposed on the first protective layer33′. As in the first embodiment, the first protective layer33′ and the second protective layer33″ are formed of an inorganic insulating material.

The first protective layer33′ has a via41composed of, for example, copper within a via hole with a barrier layer therebetween. The via41is connected to the electrode pad12. An inspection electrode pad42composed of, for example, aluminum is disposed on the first protective layer33′ with a barrier layer therebetween in a state such that the inspection electrode pad42is connected to the via41. The inspection electrode pad42is disposed so as to overlie, for example, the electrode pad12and the underside wiring16in plan view.

The second protective layer33″ has an opening33a″ through which a region of the inspection electrode pad42that excludes a connection region thereof connected to the via41is exposed. By bringing a probe into contact with the surface of the inspection electrode pad42exposed through the opening33a″, the components contained in the semiconductor substrate11can be inspected. After the inspection, the transparent substrate22is bonded onto the sealant21so that the sealant21fills the opening33a″.

The opening33a″ is preferably provided in a region of the inspection electrode pad42that excludes the connection region thereof connected to the via41. This prevents the inspection electrode pad42from being sandwiched between and in contact with the via41and the sealant21, whereby stress concentration on the inspection electrode pad42can be reduced.

Accordingly, the solid-state imaging device3of the third embodiment achieves similar advantages to those achieved by the solid-state imaging device1of the first embodiment since the protective film33composed of an inorganic insulating material is interposed between the electrode pad12and the sealant21.

Furthermore, in the solid-state imaging device3according to the third embodiment, the inspection electrode pad42connected to the electrode pad12is provided on a surface of the protective film33, thereby preventing probe marks from being formed upon performing an inspection for the electrode pad12connected to the underside wiring16.

MODIFICATION EXAMPLE 1

In the solid-state imaging device3according to the third embodiment, the inspection electrode pad42overlies the connection region of the electrode pad12connected to the underside wiring16in plan view. However, the position of the inspection electrode pad42is not limited to that described above.

Referring toFIG. 4, for example, the inspection electrode pad42may be disposed out of alignment with the connection region of the electrode pad12connected to the underside wiring16in plan view, while the inspection electrode pad42is connected to the electrode pad12through the via41.

This solid-state imaging device3′ can also achieve advantages similar to those achieved by the solid-state imaging device3of the third embodiment.

Fourth Embodiment

A solid-state imaging device4according to a fourth embodiment of the present invention will now be described with reference toFIG. 5.FIG. 5is an enlarged cross-sectional view showing a relevant part of the solid-state imaging device4.

In the solid-state imaging device4shown inFIG. 5, parts of a multilayer wiring structure within the insulating film13extending from the imaging area S described in the first embodiment with reference toFIGS. 1A and 1Bare used as an electrode pad12′ and an inspection electrode pad42′. Of wiring layers constituting the multilayer wiring structure, an uppermost wiring layer including the inspection electrode pad42′ is composed of aluminum and the remaining layers including the electrode pad12′ are composed of copper. In the fourth embodiment, the insulating film13shown inFIG. 1Bfunctions as a protective film34, and both the electrode pad12′ and the inspection electrode pad42′ are contained within the protective film34.

In this case, a through hole14′ is provided so as to extend to the electrode pad12′ contained in the protective film34. Similar to the first embodiment, the through hole14′ has the underside wiring16provided therein.

Furthermore, the protective film34has an opening34athrough which the inspection electrode pad42′ is exposed. An inspection is performed by bringing a probe into contact with the surface of the inspection electrode pad42′ exposed through the opening34a. After the inspection, the transparent substrate22(seeFIGS. 1A and 1B) is bonded onto the sealant21(seeFIGS. 1A and 1B) so that the sealant21fills the opening34a.

The opening34ais preferably provided in a region of the inspection electrode pad42′ that excludes a connection region thereof connected to a via41′. This prevents the inspection electrode pad42′ from being sandwiched between and in contact with the via41′ and the sealant21, whereby stress concentration on the inspection electrode pad42′ can be reduced.

Accordingly, the solid-state imaging device4of the fourth embodiment achieves similar advantages to those achieved by the solid-state imaging device1of the first embodiment since the protective film34composed of an inorganic insulating material is interposed between the electrode pad12′ and the sealant21.

Furthermore, in the solid-state imaging device4according to the fourth embodiment, the inspection electrode pad42′ connected to the electrode pad12′ is located closer to the transparent substrate22than to the electrode pad12′, thereby preventing probe marks from being formed on the electrode pad12′ connected to the underside wiring16.

MODIFICATION EXAMPLE 2

In the solid-state imaging device4according to the fourth embodiment, the inspection electrode pad42′ overlies the connection region of the electrode pad12′ connected to the underside wiring16in plan view. However, the position of the inspection electrode pad42′ is not limited to that described above.

Referring toFIG. 6, for example, the inspection electrode pad42′ may be disposed out of alignment with the connection region of the electrode pad12′ connected to the underside wiring16in plan view, while the inspection electrode pad42′ is connected to the electrode pad12′ through the via41′.

This solid-state imaging device4′ can also achieve advantages similar to those achieved by the solid-state imaging device4of the fourth embodiment.

Fifth Embodiment

A solid-state imaging device5according to a fifth embodiment of the present invention will now be described with reference toFIG. 7.FIG. 7is an enlarged cross-sectional view showing a relevant part of the solid-state imaging device5. In the solid-state imaging device5shown inFIG. 7, the components disposed at the underside11aof the semiconductor substrate11including the underside wiring16provided within the through hole14are the same as those in the first embodiment described above with reference toFIGS. 1A and 1B.

Referring toFIG. 7, the solid-state imaging device5according to the fifth embodiment does not have the protective film31as in the first embodiment described above with reference toFIGS. 1A and 1B, and the electrode pad12is given a thickness that is greater than the film thickness of the wiring material constituting the underside wiring16. Specifically, the electrode pad12is given a thickness of several micrometers to several tens of micrometers. Consequently, even if the electrode pad12is sandwiched between and in contact with the sealant21and the underside wiring16, stress concentration on the electrode pad12caused by thermal expansion of the underside wiring16during the manufacturing process that involves a heat treatment step can be reduced.

According to the solid-state imaging device5, even if stress is concentrated on the electrode pad12due to thermal expansion of the underside wiring16, defects caused by such stress concentration can be prevented from occurring since the electrode pad12is given a thickness that is greater than the film thickness of the wiring material constituting the underside wiring16. Consequently, this prevents the solid-state imaging device5from being damaged, thereby enhancing the reliability of the solid-state imaging device5as well as achieving a higher yield rate.