Optical fiber bus controller

Apparatus for controlling the transition of a number of lasers that are transmitting light to an optical bus from an off state to a sub-threshold bias state so as to minimize the transmission of light from lasers in the sub-threshold bias state. The apparatus places each laser in the sub-threshold bias state a predetermined time before it is to transmit data to the bus; and then, the apparatus places each laser in the off state after the data transmission has occurred. The lasers transmit in a sequential order onto the optical bus.

TECHNICAL FIELD 
This invention relates to optical fiber buses and in particular to the 
control of the lasers or light emitting diodes (LEDs) used to transmit 
information on those buses. 
BACKGROUND OF THE INVENTION 
The use of an optical fiber bus to interconnect electronic subsystems such 
as computers in a multi-processor system or switching units in a 
communication system offers high data rate transmission and eliminates the 
electrical coupling noise problems of electrical transmission subsystems. 
In order to achieve the high data rate, it is necessary to rapidly turn on 
and off the lasers or LEDs that are driving the optical fiber bus. A laser 
can be turned on from a sub-threshold bias or biased state at extremely 
high speeds but have a relatively slow turn-on time from an off state. The 
sub-threshold bias state is an intermediate state between the on and off 
states in which a laser only emits a small amount of light. Similarly, a 
laser can be switched to a sub-threshold bias state much more rapidly than 
it can be returned to a totally off state. Because of this characteristic, 
lasers are operated by leaving them in the biased state and by pulsing 
them to the on state and back to biased state to communicate data. This 
technique works extremely well where only one laser is driving an optical 
fiber. 
A problem arises in a system where a number of lasers are driving a optical 
fiber bus since in the biased state each laser emits a small amount of 
light. The light output from the lasers in the biased state is summed on 
the bus and many reach an intensity where one laser's output in the on 
state cannot be detected because it is masked by the summed outputs of the 
lasers in the biased state. Similarly, in order for LEDs to turn on 
rapidly, they also must be biased to a point where they are emitting 
light. 
SUMMARY OF THE INVENTION 
These problems are solved and an innovation and a departure in the art is 
achieved by an apparatus and method which allows full utilization of 
lasers or LEDs to drive a common optical fiber bus by cycling each from 
the off state of the biased state a predetermined time before each must be 
used to place data onto the optical fiber bus and then cycling each of the 
off state after the data transmission has occurred. 
Advantageously, a plurality of terminals are connected to the optical fiber 
bus, and each terminal transmits data on the optical fiber bus during a 
designated time period called a time slot. A bus controller generates time 
slot number signals that designate each time slot. Each terminal has a 
transmitter which advantageously may be either a laser or a light emitting 
diode and a decoding circuit for detecting the immediately preceding time 
slot to each terminal's time slot to transfer each terminal's laser from 
the off state to the immediate or biased state in response to the time 
slot number signals. 
Also, the decoding circuit comprises a first comparator for detecting the 
immediately preceding time slot in response to a stored number 
representing that time slot and the time slot number signals. Upon 
detecting the preceding time slot, the first comparator generates a match 
signal. The decoding circuit further comprises an adder for incrementing 
the stored number and a second comparator responsive to the incremented 
stored number and the time slot number signals to detect each terminal's 
time slot. Upon detection of each terminal's time slot, the second 
comparator generates a match signal. The decoding circuit further 
comprises a laser control circuit responsive to either match signal to 
enable each terminal's laser into the biased state. 
Other and further aspects of the present invention will become apparent 
during the course of the following description and by reference to the 
accompanying drawing.

DETAILED DESCRIPTION 
FIG. 1 illustrates system 100 which implements the invention. System 100 
comprises a number of terminals 103 through 106, each capable of 
transmitting and receiving data to and from optical fiber bus 101 under 
control of bus controller 102. Each terminal is assigned a time during 
which it can transmit data on optical fiber bus 101. This time is called 
the terminal's time slot and is controlled by bus controller 102. The data 
is transmitted as a packet with each packet having address and data 
fields. The address field defines which terminal is to receive the packet. 
In order to receive information from optical fiber bus 101, each 
terminal's optical receiver examines the address of each packet and 
transfers those packets addressed to that terminal's computer. 
A particular embodiment for terminal 103 is illustrated in block diagram 
form, and the other terminals are similar. However, terminals 103 through 
106 could be a variety of data and communication devices and could 
communicate speech as well as data. Terminal 103 receives data from 
optical fiber bus 101 via optical receiver 120, and this data is then 
transferred to computer 124. The lattter computer communicates data to 
optical fiber bus 101 via transmit circuit 123 and laser 121. AND gate 129 
is responsive to signals transmitted on conductors 110 and 111 to enable 
transmit circuit 123 via a signal transmitted via conductor 130. Transmit 
circuit 123 is responsive to the signal on conductor 130 to enable 
computer 124 to transfer data via transmit circuit 123 to laser 121. Low 
pass filter 131 via laser control 122 controls whether laser 121 is in the 
biased or off state. Laser 121 is toggled between the on state and biased 
state by data received from transmit control 123. 
Bus controller 102 enables each of the terminals to transmit data on 
optical fiber bus 101 in accordance with the timing diagram illustrated in 
FIG. 2. Timing signals 201 through 204 are transmitted on conductors 110 
through 113, respectively. The latter conductors are shown in FIG. 1. 
Terminal 103 is responsive to timing signals 201 so that, at time 205, low 
pass filter 131 via laser control 122 starts to transfer laser 121 from 
the off state to the biased state. At time 206, AND gate 129 is responsive 
to signals on conductors 111 and 110 to transmit a signal via conductor 
130 to transmit circuit 123. In response to the latter signal, transmit 
circuit 123 is enabled to transfer data received from computer 124 to 
laser 121 for transmission on optical fiber bus 101. While terminal 103 is 
transmitting data on optical fiber bus 101, the laser control of terminal 
104 is responsive to the signal on conductor 111 to enable that terminal's 
laser control to place that terminal's laser in the biased state at time 
207. At time 209, low pass filter 131 starts via laser control 122 to 
transfer laser 121 from the biased state to the off state. Terminal 104's 
transmit circuit is then enabled at time 208 to allow data from that 
terminal's computer to be transferred to optical fiber bus 101. Similarly, 
terminals 105 through 106 are enabled in the same sequential manner. 
The output on conductor 132 to low pass filter 131 in response to timing 
signals 201 is illustrated in FIG. 6. In the latter figure, times 601, 
602, and 603 correspond to times 205, 206, and 209, respectively. Low pass 
filter 131 controls laser control 122 so that laser 121 has a smooth 
transition to and from the biased and off states. This assures that there 
are no abrupt additions or subtractions of light power on to or off of 
optical fiber bus 101 which could adversely effect the performance of an 
optical receiver in another terminal. 
Computer 124 receives data from optical fiber bus 101 via path 125, optical 
receiver 120, and conductor 114. Terminals 104, 105, and 106 transmit and 
receive data to and from optical fiber bus 101 via pairs 116 and 117, 118 
and 119, and 120 and 121, respectively. 
Laser control 122 may advantageously be Model CD2140 manufactured by the 
Meret Corp. Laser 121 may advantageously be Model ML4102A manufactured by 
the Mitsubishi Corp. 
FIG. 3 illustrates, in greater detail, bus controller 102 of FIG. 1. 
Advantageously, bus controller 102 is shown as being able to control 16 
terminals but it would be readily apparent to one skilled in the art to 
expand the circuit shown to control more terminals. Counter 301 is a four 
bit binary counter that is responsive to clock signals from oscillator 302 
to count from "0" to "15" before recycling back to "0". Multiplexer 303 is 
responsive to the output of counter 301 to select and transfer a signal 
received on the data input terminal to an output terminal designated by 
the output of counter 301. For example, if the output of counter 301 is a 
"0", multiplexer 303 transfers the signal received on the data input 
terminal to the "0" output terminal which is connected to conductor 110. A 
logical "true" is connected to the data input terminal of multiplexer 303. 
If counter 301 and multiplexer 302 were logic circuits from the TTl family 
of logic circuits, the logical "true" would be 5 volts. Bus controller 
102 also transmits the time slot information in binary form on cable 304. 
FIG. 4 illustrates system 400 which is another embodiment of the invention. 
System 400 functions in a manner similar to System 100 with the exception 
that the time slot information is communicated to terminals 403 through 
406 in a different manner than that used in system 100 to communicate the 
time slot information to terminals 103 through 106. Blocks 420 through 424 
and 431 function in the same manner as blocks 120 through 124 and 131 of 
FIG. 1. Time slot detector 425 is responsive to the time slot information 
transmitted on cable 304 from bus controller 102 to generate timing 
signals on conductors 410 and 430 identical to those signals generated on 
conductors 130 and 132 of FIG. 1. Terminals 404 through 406 are similar in 
design to terminal 403. 
FIG. 5 illustrates, in greater detail, time slot detector 425. The latter 
detector is responsive to time slot information transmitted on cable 304 
to detect terminal 403's time slot and the immediately preceding time slot 
which is the time slot for terminal 406. Comparator 502 detects terminal 
403's time slot and comparator 501 detects the immediately preceding time 
slot. When either comparator detects a match, it transmits a signal from 
its match output terminal. OR gate 505 is responsive to either comparator 
transmitting a signal from its match output terminal to transmit a signal 
on conductor 410 which causes laser control 422 to enable laser 421 to the 
biased state. The signal from comparator 502's match output terminal is 
transmitted on conductor 430 and enables transmit circuit 423 to transfer 
data from computer 424 to laser 421. 
Comparator 501 compares the time slot information received via cable 304 
with the contents of terminal slot register 504. The latter contents 
define the time slot number immediately preceding the time slot to which 
terminal 403 is assigned. Register 504 advantageously is a set of manual 
switches into which the desired time slot number can be entered. However, 
it would be apparent to one skilled in the art that computer 424 could 
load such a register or that methods could be devised such that this 
register could be loaded by a modified bus controller using well known 
techniques. Adder 503 adds a "+1" to the contents of register 504 which 
are communicated on cable 506 resulting in the time slot number to which 
terminal 403 is assigned being transmitted via cable 507 to comparator 
502. The latter comparator is responsive to the information cables 304 and 
507 to detect the occurrence of terminal 403's time slot. Upon detecting 
that time slot, comparator 502 enables transmit circuit 423 via conductor 
430. In addition, comparator 502 continues to enable laser control 422 via 
conductor 430, OR gate 505, and conductor 410. 
While specific embodiments of the invention have been disclosed, variations 
in structural detail, within the scope of the appended claims, are 
possible and are contemplated. There is no intention of limitation to what 
is contained in the abstract or the exact disclosure as herein presented. 
The above-described arrangements are only illustrative of the application 
of the principles of the invention. Other arrangements may be devised by 
those skilled in the art without departing from the spirit and the scope 
of the invention.