System and method for detecting unauthorized access to electronic equipment or components

An improved system and method for protecting sensitive electronic equipment or components against unauthorized access, by detecting and also reacting to unauthorized intrusions into the enclosures for the sensitive electronic equipment or components is disclosed. For example, a protective system for protecting sensitive electronic equipment or components against unauthorized access is disclosed that includes a fiber optic cable mesh or network attached to, or embedded in, the walls of the enclosure for the electronic equipment or components. A continuous signal or burst is applied to the fiber optic cable, which is coupled to an optical signal detection device. Thus, any attempt to remove or penetrate the walls of the enclosure interrupts the signal in the fiber optic cable, and the interruption of the signal is detected by the optical signal detection device. In response to the detection of the interruption of the signal in the fiber optic cable, a process can be initiated to erase, destroy or alter sensitive data contained within the electronic equipment or components. Also, a power source for the protective system is disclosed, which can be self-sustaining and contained within the protected enclosure for the sensitive electronic equipment or components.

This application claims the benefit of U.S. Provisional Application No. 60/673,187, filed on Apr. 20, 2005, which is incorporated herein by reference in its entirety.

FIELD OF THE INVENTION

The present invention relates generally to the protection of electronic equipment or components against unauthorized access, and more specifically, but not exclusively, to an improved system and method for detecting and reacting to unauthorized intrusions into enclosures for sensitive electronic equipment or components.

BACKGROUND OF THE INVENTION

The need to protect sensitive electronic equipment or components against unauthorized access is well known. For example, electronic systems or components used for civilian applications can contain sensitive, proprietary information that needs to be protected against unauthorized access. For example, financial institutions and corporations use computerized systems to protect sensitive information (e.g., personal data, customer data, financial data, financial transaction authorization codes, authentication procedures, security passwords, etc.). Such sensitive information may be stored in alterable semiconductor memory devices (e.g., flash memory device, EPROM, EEPROM, PROM, RAM, DRAM, etc.) or memory components of integrated circuits. Any compromise in the security of the sensitive data contained in such memory devices or integrated circuits can result in significant tangible and intangible losses to the financial institutions and corporations, such as, for example, financial losses, losses due to fraudulent transactions, business losses, losses due to compromised customer lists and financial data, losses of institutional or corporate integrity, losses of commercial confidence, and losses due to adverse publicity. Thus, electronic systems or components containing sensitive information used for civilian applications need to be protected against unauthorized access.

Intruders may attempt to gain unauthorized access to sensitive information or structures in electronic equipment or components by physically accessing the electronic equipment or components involved. For example, an intruder may attempt to gain access to sensitive electronic equipment by opening or removing a wall of the enclosure (e.g., chassis wall) for the electronic equipment, or gain access to sensitive data in an electronic component (e.g., flash memory, integrated circuit, etc.) by creating a portal through or removing the encapsulant surrounding the component or assembly in order to expose the interconnect and/or address busses in the component. If such attempted intrusions are successful, the intruders can observe and learn about the sensitive features in the electronic equipment, or reverse engineer the electronic components in order to access the sensitive data via the exposed interconnect and/or address busses in order to learn about and/or compromise the operations of the components or associated systems. Therefore, given the substantive, continuing need to protect such sensitive electronic equipment or components (and any sensitive data contained therein) against unauthorized access, and the need to render useless the sensitive data that might be obtained by such successful unauthorized intrusions, it would be advantageous to provide a system and method for enhancing the protection of sensitive electronic equipment or components against unauthorized access, that can detect and also respond to unauthorized intrusions into the enclosures for the sensitive electronic equipment or components. As described in detail below, the present invention provides such a system and method.

SUMMARY OF THE INVENTION

The present invention provides an improved system and method for protecting sensitive electronic equipment or components against unauthorized access, by detecting and also reacting to unauthorized intrusions into the enclosures for the sensitive electronic equipment or components. In accordance with a preferred embodiment of the present invention, a protective system for protecting sensitive electronic equipment or components against unauthorized access is provided that includes an optical fiber mesh or network attached to, or embedded in, the walls of the enclosure for the electronic equipment or components. A continuous signal or burst is applied to the optical fiber core, which is coupled to an optical signal detection device. Thus, an action to remove the enclosure walls or access the contents through a portal in the wall of the enclosure interrupts or diminishes the optical signal (dB) in the optical fiber, and the interruption of the signal is detected by the optical signal detection device. In response to the detection of the interruption of the signal in the optical fiber, a process can be initiated to erase, destroy or alter sensitive data contained within the electronic equipment or components. Also, in accordance with the present invention, a power source for the protective system is provided, which can be self-sustaining and contained within the protected enclosure for the sensitive electronic equipment or components.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENT

With reference now to the figures,FIG. 1depicts a block diagram of an example protective system100for protecting sensitive electronic equipment or components against unauthorized access, which can be used to implement one or more embodiments of the present invention. For this example embodiment, which is described herein for illustrative purposes and not intended to limit the breadth or scope of the present invention, system100includes a fiber optic web102embedded in a wall of an enclosure for an electronic system or component. Fiber optic web102includes at least one fiber optic conductor arranged in a coiled or winding pattern that is parallel to the wall of the enclosure. For example, if such an enclosure forms a box with six walls that surround an electronic system or component, a plurality of fiber optic webs102(e.g., six) may be used. Thus, in that case, an intrusion into the enclosure for the electronic system or component would penetrate at least one of the six fiber optic webs102used. As such, a more detailed description of an example fiber optic web arrangement that may be used to implement fiber optic web102is described below with respect toFIG. 2.

For this example embodiment, system100also includes a logic device104coupled to fiber optic web102via an optoelectronic signal generator116connected to an input of fiber optic web102, and via an optical signal detector114connected to an output of fiber optic web102. As shown, logic device104generates a signal that activates optoelectronic signal generator116, which outputs an optical signal (e.g., in the infrared, ultraviolet, and visible spectra range) to the input of fiber optic web102. The generated optical signal can be a continuous signal or a pulsed signal (e.g., burst) for use in a lower power operating mode. The optical signal at the input of fiber optic web102is coupled through the conductor(s) of fiber optic web102and then to the input of optical signal detector114. In response, optical signal detector114converts the detected optical signal to an electrical signal that can be filtered or digitized, and outputs a suitable signal indicating a detection of a continuous or pulsing optical signal to the input of logic device104. However, if the optical signal being coupled through fiber optic web102is interrupted, then the optical signal detector114does not output a detection indication signal to logic device104. Thus, for this example, if logic device104instructs a signal to activate optoelectronic signal generator116, but receives no detection indication signal from optical signal detector114, then logic device104(e.g., executing a suitable algorithm implemented in software) may assume that the conductive path for the optical signal through fiber optic web102has been interrupted. In this manner, logic device104functions to monitor the optical signal through fiber optic web102, and, thereby, the physical integrity of the associated enclosure. Notably, the detection of a pulsing optical signal can be accomplished by verifying the time interval between pulses and/or the persistence of each individual pulse. This function of evaluating the pulses can be accomplished within logic device104.

Notably, for this example embodiment, logic device104may be implemented with a programmable logic device, such as, for example, a Field-Programmable Grid Array (FPGA), or an Application-Specific Integrated Circuit (ASIC) designed to function as a programmable logic device. Also, logic device104may be implemented with a microcontroller, or a suitable non-reprogrammable logic device. Additionally, optoelectronic signal generator116may be implemented with a Vertical-Cavity Surface Emitting Laser (VCSEL), any other suitable laser transmitter device, or light-emitting diode. As such, if optoelectronic signal generator116is implemented with a laser device (or light-emitting diodes) operating, for example, in the infrared frequency range, then optical signal detector114may be implemented with a suitable infrared detector (or, for example, a photodiode). Additionally, for other embodiments, optoelectronic signal generator116and optical signal detector114may be implemented with suitable devices operating in the ultraviolet or visible spectral wavelength ranges.

For this example embodiment, system100also includes an alterable memory device118, which is coupled to an output of logic device104and an interface120for a system or component under the protection of system100. For this example, alterable memory device118may be implemented with a flash memory or other suitable programmable memory device (e.g., EPROM, EEPROM, SRAM, etc.) capable of storing sensitive data associated with the operations of the system or component under the protection of system100. Consequently, for example, if logic device104determines that the conductive path for the optical signal through fiber optic web102has been interrupted, then logic device can output a suitable signal to alterable memory device118, which causes alterable memory device118to erase, overwrite, modify or destroy the sensitive data associated with the operations of the system or component and, thereby, prohibit the use, reverse engineering, or other compromise of the system or component by an unauthorized intruder.

For this example, system100can also include a security key interface122coupled to an input of logic device104, and a Joint Test Action Group (JTAG) interface124coupled to an output of logic device104. A security key can be used by an authorized person to identify an intrusion detection mode for logic device104that may or may not cause the destruction of the data stored in alterable memory device118. A JTAG interface may be used to provide a conventional test access port and/or boundary scan for debugging embedded systems or testing integrated circuits in accordance with the JTAG test protocol. In any event, the security key interface and JTAG interface are shown inFIG. 1for illustrative purposes only, and more detailed descriptions of these components may be found in other literature.

For this example embodiment, system100also includes a power monitoring system106that can detect a loss of power to system100. For example, power for system100can be provided by an external battery108a(e.g., located external to system100), an internal battery108b(e.g., a coin-type, Lithium battery), and a super capacitor108c. A super capacitor is a very low leakage capacitor, which can be charged by the external battery108aand is capable of holding a charge for approximately one year. Super capacitor108ccan be used to provide a current to activate a chemical battery (e.g., thermal battery)112, which provides power to the circuit with logic device104and alterable memory device118in the event that the internal or external battery power level moves below a predetermined threshold value. An interface between the external battery108aand system100provides protection against shorting of the internal power applied to system100, protection against power surges, and protection against polarity reversal of the poles of external battery108a. Also, the internal battery108bcan provide power to system100for the short term, for example, while the external battery108ais disconnected, and also until a decision is made about whether or not to initiate a process to erase, destroy, or alter the data of the system under protection.

For this example embodiment, external battery108aincludes a sentry/health monitor Light Emitting Diode (LED), and a security key that identifies external battery108aas an authorized device when external battery108ais connected to system100. The sentry monitor LED can display text or numbers identifying attempts to access the protected enclosure, and the health monitor (e.g., voltage test unit110) can identify the charge state of the internal battery108b. If external battery108ais disconnected from system100, an internal timer can begin a count down for a predetermined period. If no valid security key is provided to system100during the predetermined period, then the super capacitor is discharged (via voltage test unit110) to cause an ignition of chemical battery112and the destruction of data stored in alterable memory device118.

FIG. 2depicts a pictorial representation of a cutaway, perspective view of an example fiber optic web200, which can be used to implement fiber optic web102of the example embodiment shown inFIG. 1. For this example, fiber optic web200includes a first layer202awith an optical fiber conductor arranged in a coiled or winding pattern and formed within (for example) a suitable polyester composite material. The optical fiber conductor can be, for example, a single fiber optic stand, a plurality of fibers twisted together for redundancy, or an optical array of light emitting devices. The winding or coiled fiber conductor is arranged in a sufficiently dense coverage pattern so as to ensure that the conductor will be disturbed or broken by a penetration or destruction of a portion of layer202a. A second layer202bformed of a suitable elastomeric composite material is disposed on one surface of first layer202a, and a third layer202dof the elastomeric composite material is disposed on the opposite surface of first layer202a. A fourth layer202cof a suitable polyimide (or similar rigid/semi-rigid resin) film material is disposed on the outer surface of second layer202b, and a fifth layer202eof the polyimide film material is disposed on the outer surface of third layer202d. Other materials can be used for the fifth layer as well, such as, for example, Beryllium, Beryllium-Copper, Aluminum alloy, Tantalum alloy, Tungsten alloy, Stainless steel, Titanium alloy, Galvanized Aluminum and Stainless steel, nickel-plated copper, and other similar metallic materials. The metal materials may be bulk (e.g., extruded, cast or sheet-rolled) or sintered depending on the metal selected.

The fifth layer can also be made of suitable monolithic materials, such as, for example, silicon nitride, aluminum nitride, graphite (e.g., isostatically pressed, cured sol-gel, or laminated resin depending on the material), which can be filled with refractory or thermally conductive particles. Also, the fifth layer can be made of suitable polymer-based resin materials, such as, for example, polyimide-based, epoxy-based, tetrafunctional-based, phenolic-based, carborane-siloxane-based, siloxane-based, and other highly cross-linked thermoset resins that can be filled with fibrous or particle materials to enhance strength (moduli) and dimensional stability (a-CTE).

The films can be applied as a liquid or solid, and then thermally cured (if needed) into smooth, rigid, intractable films or structural layers. The elastomeric composite layers can be applied in liquid form (e.g., molten thermoplastic) and cured. Thus, as shown, fiber optic web200can be disposed within a multilayer thin or thick film microelectronic device (e.g., composed of layers202a-202e). Additionally, for this example embodiment, the input and output portions of the optical fiber conductor disposed within layer202aare connected to a respective input and output connection of a suitable fiber optic transceiver204. Thus, transceiver204can couple the optical signal received from optoelectronic signal generator116to the input of the optical fiber conductor, and the optical signal at the output of the optical fiber conductor to the optical signal detector114.

FIG. 3depicts a functional block diagram of an example protective system300that further illustrates the principles of the present invention. For this example embodiment, system300includes a thin film or thick film composition fiber optic web302coupled to a fiber optic transceiver304. One of an external power supply308or internal power supply310is connected via a switch into a power conversion device306, which provides an uninterruptible power source for system300, so as to provide an optical signal to an input of fiber optic transceiver304. For this example embodiment, transceiver304is a transmitter and receiver assembly that can be composed of a single monolithic component, or alternatively as an assembly of sub-components that can be collocated or dispersed in the system network. As such, for this embodiment, transceiver304couples the optical signal (if any) out of fiber optic web302to an optical signal detector. If no optical signal is detected, the detector forwards a coded data destruction command to a programmable logic device, which can initiate a process to erase or destroy data stored in a flash memory device312. The programmable logic device can verify the validity of the data destruction command314, before the programmable logic device initiates the data destruction process. As shown, fiber optic web302can be formed as a modular film on an assembly device316, or disposed on an aluminum alloy plate318to form a wall of an enclosure (e.g., chassis wall) for an electronic system or component to be protected by system300.

FIG. 4depicts a pictorial representation of a cutaway, perspective view of an example enclosure400, which illustrates a use of the present invention. For this example, enclosure400includes a plurality of walls402and a front cover410. Notably, although only three walls402and a cover410are referenced inFIG. 4, in order for enclosure400to be completely protected against intrusion, enclosure400should include five walls402and cover410. Thus, two of the five walls402of enclosure400are not explicitly shown. Each wall402and the front cover410contain a mounted fiber optic web. Also, for this example, a system to be protected by enclosure400is shown that includes a plurality of printed circuit boards408. At least two of the printed circuit boards408include an FPGA404with instructions to overwrite critical code on one or more flash memory devices disposed in an enclosed system. Element406indicates locations within enclosure400where internal lithium or alternate batteries may be disposed. These batteries can be used to provide power for the optical signal components and FPGAs404contained within enclosure400.

FIGS. 5A-5Care related diagrams that depict different stages of the construction of an example system500a-500cfor protecting an electronic circuit, in accordance with a second embodiment of the present invention. Referring toFIG. 5A, for this example embodiment, system500aincludes an optical signal protection network502a. Protection network502aincludes a continuous LED display layer504aarranged in an array form. The light emitting surface of LED display layer504ais disposed on one surface of an optical adhesive layer506a, and the second surface of optical adhesive layer506ais disposed on the light receptor surface of a silicon diode array layer508a. In one or more other embodiments, the diode array may be directly interfaced with the LED surface. Thus, for this example embodiment, the respective adhesive and optical properties of the optical adhesive layer506afunction to affix the light emitting surface of LED display layer504aadjacent to the light receptor surface of silicon diode array layer508a, so that the optical signals emanating from each LED device of LED display layer504aare received by one or more of the optical signal receptors on the light receptor surface of silicon diode array layer508a. The composite optical signal protection network502amay be disposed on a surface of a programmable logic device (e.g., FPGA)510a, and the combination of the composite optical signal protection network502aand programmable logic device510amay be disposed on a surface of a thin battery512a. Network502a, programmable logic device510a, and battery512aare covered with a suitable encapsulant514aand disposed on a suitable circuit assembly516a(e.g., similar to circuit316inFIG. 3).

Thus, in accordance with the present invention, system500ais arranged so that a penetration of optical protection network502adisturbs or interrupts the optical signal paths between the LED display layer502aand the silicon diode array layer508a. The programmable logic device510ais coupled to the silicon diode array layer508aand can determine whether or not the optical signal paths have been disturbed or interrupted. The battery512aprovides power for the destruction of sensitive data stored in a semiconductor device515disposed on the surface of the substrate or base516a. Alternatively, an external power supply may be used to power the protective system500a.

Referring toFIG. 5B, for this example embodiment, the structure of system500bis substantially similar to the structure of system500ainFIG. 5Aand includes an optical protection network502b, a programmable logic device510b, and a thin battery512bcovered with a suitable encapsulant514band disposed on a suitable substrate or base material516b. However, system500bdiffers from system500ato the extent that the silicon diode array layer508bof system500bincludes a plurality of randomly located photodiodes (e.g.,509b) disposed on the optical signal receptor surface of the layer, instead of an array of silicon diodes as provided in layer508aofFIG. 5A.

Referring now toFIG. 5C, for this example embodiment, the structure of system500cis substantially similar to the structure of system500ainFIG. 5Aand includes an optical protection network502c, a programmable logic device510c, and a thin (or thin film thermal) battery512ccovered with a suitable encapsulant514cand disposed on a suitable substrate or base material516c. However, system500cdiffers from system500ato the extent that the layers and devices of system500care completely enclosed by an encapsulant. The encapsulant will resist penetration or removal by a number of physical and mechanical means.