Accelerated data movement between data processing unit (DPU) and graphics processing unit (GPU) to address real-time cybersecurity requirements

Apparatuses, systems, and techniques for detecting that a host device is subject to a malicious network attack using a machine learning (ML) detection system are described. A computing system includes a graphics processing unit (GPU) and an integrated circuit with a network interface, and a hardware acceleration engine. The integrated circuit hosts a hardware-accelerated security service to extract features from network data and metadata from the hardware acceleration engine and sends the extracted features to the GPU. Using the ML detection system, the GPU determines whether the host device is subject to a malicious network attack using the extracted features. The GPU can send an enforcement rule to the integrated circuit responsive to a determination that the host device is subject to the malicious network activity.

TECHNICAL FIELD

At least one embodiment pertains to processing resources used to perform and facilitate operations for detecting whether a host device is subject to a malicious network attack. For example, at least one embodiment pertains to processors or computing systems used to provide and enable a data processing unit (DPU) and a graphics processing unit (GPU) to determine, using a machine learning (ML) detection system, whether a host device is subject to a malicious network attack based on features extracted from network data and metadata of the DPU, according to various novel techniques described herein.

BACKGROUND

Network security, which involves protecting a communications network and the devices that connect to it from various threats, remains a challenging problem. There are many different types of possible network attacks, including but not limited to distributed denial of service attacks, man-in-the-middle attacks, unauthorized accesses, and so forth. The strategies and tactics employed by malicious actors continue to evolve. Existing techniques for protecting network communications can be improved.

DETAILED DESCRIPTION

Data center security includes a wide range of technologies and solutions to protect a data center from external and internal threats or attacks. A data center is a facility that stores different devices such as switches, routers, load balancers, firewalls, servers, networked computers, storage, network interface cards (NICs), DPUs, GPUs, and other resources as part of the information technology (IT) infrastructure. For private companies moving to the cloud, data centers reduce the cost of running their own centralized computing networks and servers. Data centers provide services, such as storage, backup and recovery, data management, networking, security, orchestration, or the like. Because data centers hold sensitive or proprietary information, such as customer data or intellectual property, servers must be secured and protected all the time from known and unknown network attacks, malware, malicious activity, and the like. Data centers are complex and include many types of devices and services. Security components and advanced technologies can be used to protect devices and services.

One type of cybersecurity requirement is to prevent malicious network attacks, which have become a big concern in today's interconnected world. One conventional solution for detecting network attacks is signature-based detection. Signature-based detection is based on past experience and extensive knowledge of each attack. Conventional signature-based detection systems fail to address the increased variability of today's cyberattacks and have several disadvantages. The conventional system fails to detect new attacks since signature-based detection requires a new signature for each new attack. The signatures must be maintained and updated continuously to support new attacks. The convention system can be highly time-consuming and expensive due to the demand for security experts required for creating, testing, and verifying the signatures. There can also be time constraints to these solutions since there can be a large amount of time between the discovered attack and a signature created, tested, and verified for deployment.

Aspects and embodiments of the present disclosure address the above and other deficiencies by hosting a hardware-accelerated security service on an acceleration hardware engine of an integrated circuit (e.g., DPU) and a cybersecurity platform with one or more accelerated machine learning pipelines on a GPU to determine whether the host device is subject to a malicious network attack. In particular, the DPU can extract feature data from the network traffic and feature data from registers of the DPU and stream the feature data to the accelerated machine learning pipeline to determine whether a host device is subject to a malicious network attack based on the feature data. Studies of recent network attacks show that using machine learning for network attack detection by learning the patterns of the network behaviors can prevent the advanced techniques used by attackers in today's interconnected world. Machine learning involves training a computing system—using training data—to identify features in data that may facilitate detection and classification. Training can be supervised or unsupervised. Machine learning models can use various computational algorithms, such as decision tree algorithms (or other rule-based algorithms), artificial neural networks, or the like. During an inference stage, new data is input into a trained machine learning model, and the trained machine learning model can classify items of interest using features identified during training. Anomaly detection and enforcement techniques based on DPU for networking filtering and acceleration, GPU-based framework for AI, can provide network protection for data centers in today's interconnected world. In addition, modern data centers and cloud infrastructures contain heterogeneous compute capabilities, including ARM and GPU-native infrastructure. Although they execute on different operating systems and often have different deployment requirements, aspects of the present disclosure can provide fast and exact coordination between the sensor (e.g., DPU with ARM cores) and other edge-based and centralized accelerated compute environments (GPU cores).

Aspects and embodiments of the present disclosure can provide a hardware-accelerated security service that can extract features from network data directed to a host device and data stored in registers of the acceleration hardware engine and send the features to the cybersecurity platform to determine whether the host device is subject to the malicious network attack. The hardware-accelerated security service receives an enforcement rule from the cybersecurity platform responsive to a determination by the cybersecurity platform that the host device is subject to a malicious network attack. The hardware-accelerated security service performs an action, associated with the enforcement rule, on subsequent network traffic directed to the host device. The hardware-accelerated security service can operate on a DPU and be an agentless hardware product that inspects the network data directed to the host device. In at least one embodiment, the hardware-accelerated security service is the NVIDIA DOCA. Alternatively, other hardware-accelerated security services can be used. In some cases, the cybersecurity platform detects malicious network activity during an attack and can provide an enforcement rule in response to protect the host device from the attack. The integrated circuit can be a DPU. The DPU can be a programmable data center infrastructure on a chip. The integrated circuit can include a network interface operatively coupled to a central processing unit (CPU) to handle network data path processing, and the CPU can control path initialization and exception processing.

Aspects and embodiments of the present disclosure can provide a first agent (e.g., NVIDIA DOCA Flow Inspector) of the hardware-accelerated security service and a second agent (e.g., NVIDIA DOCA Telemetry agent). The first agent can leverage the acceleration hardware engine (e.g., DPU hardware) to offload and filter network traffic based on predefined filters using the hardware capabilities of the acceleration hardware engine. The second agent can extract telemetry data from embedded counters (or other registers) on the acceleration hardware engine, combine the telemetry data with the filtered network traffic to the cybersecurity platform. The filtered network traffic can be structured data that can be streamed with the counters metadata to the cybersecurity platform for analysis using accelerated memory accessing methodologies, as described herein. The cybersecurity platform can process a large volume of data on the GPU coupled to the acceleration hardware engine and provide immediate and dynamic protection by sending enforcement network rules back to the acceleration hardware engine (e.g., DPU). The cybersecurity platform can detect threats or attacks using anomaly detection methodologies. The cybersecurity platform can provide feedback results to the accelerated hardware engine (e.g., DPU hardware) to enforce and block the malicious activity or any other types of cyberattacks. This feedback can potentially change, or otherwise alter, the streamed data being sent to the cybersecurity platform to refine the feedback results further. The flow inspector and telemetry agent hosted on the DPU and the cybersecurity platform hosted on the GPU can provide a full solution for traffic filtering, counters extraction, and data stream to the GPU for machine learning-based anomaly detection. Once the machine learning-based anomaly detection identifies a network attack, mitigation rules can be used to configure the DPU to block the attack immediately.

System Architecture

FIG.1Ais a block diagram of an example system architecture100, according to at least one embodiment. The system architecture100(also referred to as “system” or “computing system” herein) includes an integrated circuit, labeled DPU102, a host device104, a security information and event management (SIEM) or extended detection and response (XDR) system106. The system architecture100can be part of a data center and include one or more data stores, one or more server machines, and other components of data center infrastructure. In implementations, network108may include a public network (e.g., the Internet), a private network (e.g., a local area network (LAN) or wide area network (WAN)), a wired network (e.g., Ethernet network), a wireless network (e.g., an 802.11 network or a Wi-Fi network), a cellular network (e.g., a Long Term Evolution (LTE) network), routers, hubs, switches, server computers, and/or a combination thereof

In at least one embodiment, DPU102is integrated as a System on a Chip (SoC) that is considered a data center infrastructure on a chip. In at least one embodiment, DPU102includes DPU hardware110and software framework with acceleration libraries112. The DPU hardware110can include a CPU114(e.g., a single-core or multi-core CPU), one or more hardware accelerators116, memory118, one or more host interfaces120, and one or more network interfaces121. The software framework and acceleration libraries112can include one or more hardware-accelerated services, including hardware-accelerated security service122(e.g., NVIDIA DOCA), hardware-accelerated virtualization services124, hardware-accelerated networking services126, hardware-accelerated storage services128, hardware-accelerated artificial intelligence/machine learning (AI/ML) services130, and hardware-accelerated management services132. In at least one embodiment, DPU102is coupled to an accelerated AI/ML pipeline153. In at least one embodiment, the accelerated AI/ML pipeline153can be a GPU coupled to the DPU102. In at least one embodiment, the accelerated AI/ML pipeline153can host an ML detection system134that includes one or more ML detection models trained to determine whether a host device104is subject to a malicious network attack. In at least one embodiment, the ML detection system134is the NVIDIA MORPHEUS cybersecurity platform. Accelerated AI/ML Pipeline153can perform pre-processing operations, inferences, post-processing operations, actions, or any combination thereof. Accelerated AI/ML Pipeline153can be a combination of hardware and software, such as the NVIDIA EXG platform and software for accelerating AI/ML operations on the NVIDIA EXG platform. For example, accelerated AI/ML Pipeline153can provide advantages in accelerating processes up to 60 times compared to a CPU. Accelerated AI/ML Pipeline153can also provide an advantage of a number of inferences that can be done in parallel (e.g., up to millions of inferences in parallel). Additional details of ML detection system134are described below with respect toFIG.1B. The host device104can include host physical memory148. The host physical memory148can include one or more volatile and/or non-volatile memory devices that are configured to store the data of host device104. In at least one embodiment, ML detection system134includes a network-anomaly detection system136and other detection systems, such as a ransomware detection system, a malicious URL detection system, a DGA detection system, and optionally other malware detection systems.

In at least one embodiment, hardware-accelerated security service122includes data extraction logic146(e.g., DOCA Flow Inspector) that extracts network data101from network traffic received over the network108via one or more network interface(s)121. The network data101can be received over network108from a second device142. The second device142can be the initiator of the malicious network attack. In at least one embodiment, the hardware-accelerated security service122receives a copy of the network data101(e.g., a mirrored copy of the network data101directed to the host device104). The data extract logic146can be configured by a configuration file that specifies what type of data should be extracted from the network data101. The configuration file can specify one or more filters that extract for inclusion or remove from inclusion specified types of data from the network data101. Since the network data can be a copy, the network traffic that does not meet the filtering criteria can be discarded or removed. The network traffic that meets the filtering criteria can be structured and streamed to the cybersecurity platform for analysis. The extraction logic146can generate a data structure with the extracted data. The data structure can be any type of data structure, such as a struct, an object, a message, or the like. For example, the configuration file can specify that all HyperText Transport Protocol (HTTP) traffic be extracted from the network data101. The configuration file can specify that all traffic on port 80, port 443, and/or port 22 should be extracted from the network data101for analysis. A large percentage of attacks target these three ports: SSH-22/TCP, HTTPS-443/TCP, and HTTP-80/TCP.

In at least one embodiment, hardware-accelerated security service122includes a telemetry agent138that extracts metadata103from one or more registers140of the DPU hardware110. In at least one embodiment, the telemetry agent138can be configured or programmed by a configuration file (same or different configuration file than the extraction logic146) that specifies what metadata should be extracted from the DPU's hardware, such as from embedded counters, registers, or the like. For example, the configuration file can specify which values from counters, registers, or the like, should be extracted by the telemetry agent to be streamed with the extracted network data. Some metadata103can be associated or related to the network data101. Some metadata103can be associated or related to the underlying hardware and not related to the network traffic. In at least one embodiment, the telemetry agent138can also send the data structure with the extracted network data101and extracted metadata103to the cybersecurity platform (e.g., accelerated AI/ML pipeline(s)153).

In at least one embodiment, the telemetry agent138combines the extracted network data101and the metadata103into streamed data105. The telemetry agent138sends the streamed data105to the ML detection system134to determine whether the host device104is subject to the malicious network attack. Responsive to a determination by the ML detection system134that the host device104is subject to the malicious network attack, the ML detection system134sends an enforcement rule107to the DPU102. The hardware-accelerated security service122can perform an action, associated with the enforcement rule149, on subsequent network traffic directed to the host device104from the second device142. In at least one embodiment, the ML detection system134can output an indication109of classification by ML detection system134. Indication109can be an indication of a malicious network attack (or other network anomalies) on the host device104. In at least one embodiment, ML detection system134can send indication109to hardware-accelerated security service122, and hardware-accelerated security service122can send an alert111to SIEM or XDR system106. Alert151can include information about the malicious network attack. In at least one embodiment, ML detection system134can send indication109to SIEM or XDR system106, in addition to or instead of sending indication109to hardware-accelerated security service122.

In at least one embodiment, data extraction logic146has feature extraction logic to extract one or more features and send the extracted features to ML detection system134instead of the extracted data. For example, data extraction logic146can extract HTTP data, and the telemetry agent138can extract corresponding metadata103from the DPU hardware registers and counters. The data extraction logic146can generate the stream data105and send it to the ML detection system134. In another embodiment, the ML detection system134includes feature extraction logic144to extract a set of features from the streamed data105. The streamed data can be raw extracted data from the hardware-accelerated security service122. In at least one embodiment, extracted features are input into a network-anomaly detection system136. In at least one embodiment, the network-anomaly detection system136includes a classification model trained to classify the streamed data105as malicious or benign.

In at least one embodiment, feature extraction logic144can extract some features from network data101in the streamed data105and tokenize these features into tokens. The feature extraction logic144can extract numerical features from the telemetry data (i.e., metadata103) in the streamed data. The tokens and the numerical features can be combined into a feature set. In at least one embodiment, anomaly detection system136includes a classification model trained to classify the extracted features as malicious or benign using the set of features. In at least one embodiment, the classification model includes an embedding layer, a Long Short-Term Memory (LSTM) layer, and a neural network layer (e.g., a fully-connected neural network layer). The embedding layer receives the tokens as an input sequence of tokens representing the network data101and generates an input vector based on the input sequence of tokens. The LSTM layer is trained to generate an output vector based on the input vector. The neural network layer is trained to classify the set of features as malicious or benign using the output vector from the LSTM layer and the numeric features of the telemetry data. Additional details of the binary classification model are described below with respect toFIG.3A.

In at least one embodiment, the binary classification model is a convolutional neural network (CNN) with an embedding layer to receive the tokens as an input sequence of tokens representing the extracted network data101and generate an input vector based on the input sequence of tokens and values from the metadata103. The CNN is trained to classify the network data101as being malicious or benign using the input vector from the embedding layer.

It should be noted that, unlike a CPU or GPU, DPU102is a new class of programmable processor that combines three key elements, including, for example: 1) an industry-standard, high-performance, software-programmable CPU (single-core or multi-core CPU), tightly coupled to the other SoC components; 2) a high-performance network interface capable of parsing, processing and efficiently transferring data at line rate, or the speed of the rest of the network, to GPUs and CPUs; and 3) a rich set of flexible and programmable acceleration engines that offload and improve applications performance for AI and machine learning, security, telecommunications, and storage, among others. These capabilities can enable an isolated, bare-metal, cloud-native computing platform for cloud-scale computing. In at least one embodiment, DPU102can be used as a stand-along embedded processor. In at least one embodiment, DPU102can be incorporated into a network interface controller (also called a Smart Network Interface Card (SmartNIC)) used as a server system component. A DPU-based network interface card (network adapter) can offload processing tasks that the server system's CPU normally handles. Using its processor, a DPU-based SmartNIC may be able to perform any combination of encryption/decryption, firewall, transport control protocol/Internet Protocol (TCP/IP), and HyperText Transport Protocol (HTTP) processing. SmartNICs can be used for high-traffic web servers, for example.

In at least one embodiment, DPU102can be configured for traditional enterprises' modern cloud workloads and high-performance computing. In at least one embodiment, DPU102can deliver a set of software-defined networking, storage, security, and management services (e.g.,122-132) at a data-center scale with the ability to offload, accelerate, and isolate data center infrastructure. In at least one embodiment, DPU102can provide multi-tenant, cloud-native environments with these software services. In at least one embodiment, DPU102can deliver data center services of up to hundreds of CPU cores, freeing up valuable CPU cycles to run business-critical applications. In at least one embodiment, DPU102can be considered a new type of processor that is designed to process data center infrastructure software to offload and accelerate compute load of virtualization, networking, storage, security, cloud-native AI/ML services, and other management services (e.g.,122-132).

In at least one embodiment, DPU102can include connectivity with packet-based interconnects (e.g., Ethernet), switched-fabric interconnects (e.g., InfiniBand, Fibre Channels, Omni-Path), or the like. In at least one embodiment, DPU102can provide a data center that is accelerated, fully programmable, and configured with security (e.g., zero-trust security) to prevent data breaches and cyberattacks. In at least one embodiment, DPU102can include a network adapter, an array of processor cores, and infrastructure offload engines with full software programmability. In at least one embodiment, DPU102can sit at an edge of a server to provide flexible, secured, high-performance cloud and AI workloads. In at least one embodiment, DPU102can reduce the total cost of ownership and increase data center efficiency. In at least one embodiment, DPU102can provide the software framework and acceleration libraries112(e.g., NVIDIA DOCA™) that enables developers to rapidly create applications and services for DPU102, such as security services122, virtualization services124, networking services126, storage services128, AI/ML services130, and management services132. In at least one embodiment, ML detection system134is implemented in the AI/ML services130. In another embodiment, ML detection system134is implemented on one or more hardware accelerators116or other components of the DPU hardware110. In at least one embodiment, the software framework and acceleration libraries112makes it easy to leverage hardware accelerators of DPU102to provide data center performance, efficiency, and security. In at least one embodiment, the ML detection system134is implemented in a GPU coupled to the DPU102. The GPU can include the one or more accelerated AI/ML pipeline153described above.

In at least one embodiment, DPU102can provide networking services126with a virtual switch (vSwitch), a virtual router (vRouter), network address translation (NAT), load balancing, and network virtualization (NFV). In at least one embodiment, DPU102can provide storage services128, including NVME™ over fabrics (NVMe-oF™) technology, elastic storage virtualization, hyper-converged infrastructure (HCI) encryption, data integrity, compression, data deduplication, or the like. NVM Express™ is an open logical device interface specification for accessing non-volatile storage media attached via the PCI Express® (PCIe) interface. NVMe-oF™ provides an efficient mapping of NVMe commands to several network transport protocols, enabling one computer (an “initiator”) to access block-level storage devices attached to another computer (a “target”) very efficiently and with minimum latency. The term “Fabric” is a generalization of the more specific ideas of network and input/output (I/O) channel. It essentially refers to an N:M interconnection of elements, often in a peripheral context. The NVMe-oF™ technology enables the transport of the NVMe command set over a variety of interconnection infrastructures, including networks (e.g., Internet Protocol (IP)/Ethernet) and also I/O Channels (e.g., Fibre Channel). In at least one embodiment, DPU102can provide hardware-accelerated security services122using Next-Generation Firewall (FGFW), Intrusion Detection Systems (IDS), Intrusion Prevention System (IPS), a root of trust, micro-segmentation, distributed denial-of-service (DDoS) prevention technologies, and ML detection using data extraction logic146and ML detection system134. NGFW is a network security device that provides capabilities beyond a stateful firewall, like application awareness and control, integrated intrusion prevention, and cloud-delivered threat intelligence. In at least one embodiment, the one or more network interfaces121can include an Ethernet interface (single or dual ports) and an InfiniBand interface (single or dual ports). In at least one embodiment, the one or more host interfaces120can include a PCIe interface and a PCIe switch. In at least one embodiment, the one or more host interfaces120can include other memory interfaces. In at least one embodiment, CPU114can include multiple cores (e.g., up to 8 64-bit core pipelines) with L2 cache per two one or two cores and L3 cache with eviction policies support for double data rate (DDR) dual in-line memory module (MINIM) (e.g., DDR4 DIMM support), and a DDR4 DRAM controller. Memory118can be on-board DDR4 memory with error correction code (ECC) error protection support. In at least one embodiment, CPU114can include a single core with L2 and L3 caches and a DRAM controller. In at least one embodiment, the one or more hardware accelerators116can include a security accelerator, a storage accelerator, and a networking accelerator. In at least one embodiment, ML detection system134is hosted by the security accelerator. In at least one embodiment, the security accelerator can provide a secure boot with hardware root-of-trust, secure firmware updates, Cerberus compliance, Regular expression (RegEx) acceleration, IP security (IPsec)/Transport Layer Security (TLS) data-in-motion encryption, AES-GCM 128/256-bit key for data-at-rest encryption (e.g., Advanced Encryption Standard (AES) with ciphertext stealing (XTS) (e.g., AES-XTS 256/512), secure hash algorithm (SHA) 256-bit hardware acceleration, Hardware public key accelerator (e.g., Rivest-Shamir-Adleman (RSA), Diffie-Hellman, Digital Signal Algorithm (DSA), ECC, Elliptic Curve Cryptography Digital Signal Algorithm (EC-DSA), Elliptic-curve Diffie-Hellman (EC-DH)), and True random number generator (TRNG). In at least one embodiment, the storage accelerator can provide BlueField SNAP—NVMe™ and VirtIO-blk, NVMe-oF™ acceleration, compression and decompression acceleration, and data hashing and deduplication. In at least one embodiment, the network accelerator can provide remote direct memory access (RDMA) over Converged Ethernet (RoCE) RoCE, Zero Touch RoCE, Stateless offloads for TCP, IP, and User Datagram Protocol (UDP), Large Receive Offload (LRO), Large Segment Offload (LSO), checksum, Total Sum of Squares (TSS), Residual Sum of Squares (RSS), HTTP dynamic streaming (HDS), and virtual local area network (VLAN) insertion/stripping, single root I/O virtualization (SR-IOV), virtual Ethernet card (e.g., VirtIO-net), Multi-function per port, VMware NetQueue support, Virtualization hierarchies, and ingress and egress Quality of Service (QoS) levels (e.g., 1K ingress and egress QoS levels). In at least one embodiment, DPU102can also provide boot options, including secure boot (RSA authenticated), remote boot over Ethernet, remote boot over Internet Small Computer System Interface (iSCSI), Preboot execution environment (PXE), and Unified Extensible Firmware Interface (UEFI).

In at least one embodiment, DPU102can provide management services, including a 1 GbE out-of-band management port, network controller sideband interface (NC-SI), Management Component Transport Protocol (MCTP) over System Management Bus (SMBus), and Monitoring Control Table (MCT) over PCIe, Platform Level Data Model (PLDM) for Monitor and Control, PLDM for Firmware Updates, Inter-Integrated Circuit (I2C) interface for device control and configuration, Serial Peripheral Interface (SPI) interface to flash, embedded multi-media card (eMMC) memory controller, Universal Asynchronous Receiver/Transmitter (UART), and Universal Serial Bus (USB).

In at least one embodiment, hardware-accelerated security service122is an adaptive cloud security service that provides real-time network visibility, detection, and response to cyber threats. In at least one embodiment, hardware-accelerated security service122acts as the monitoring or telemetry agent for DPU102or a cybersecurity platform (e.g.,153inFIG.1B), such as the NVIDIA Morpheus platform, which is an AI-enabled, cloud-native cybersecurity platform. The NVIDIA Morpheus platform is an open application framework that enables cybersecurity developers to create AI/ML pipelines153for filtering, processing, and classifying large volumes of real-time data, allowing customers to continuously inspect network and server telemetry at scale. The NVIDIA Morpheus platform can provide information security to data centers to enable dynamic protection, real-time telemetry, and adaptive defenses for detecting and remediating cybersecurity threats.

Previously, users, devices, data, and applications inside the data center were implicitly trusted, and perimeter security was sufficient to protect them from external threats. In at least one embodiment, DPU102, using hardware-accelerated security service122, can define the security perimeter with a zero-trust protection model that recognizes that everyone and everything inside and outside the network cannot be trusted. Hardware-accelerated security service122can enable network screening with encryption, granular access controls, and micro-segmentation on every host and for all network traffic. Hardware-accelerated security service122can provide isolation, deploying security agents in a trusted domain separate from the host domain. If a host device is compromised, this isolation by hardware-accelerated security service122prevents the malware from knowing about or accessing hardware-accelerated security service122, helping to prevent the attack from spreading to other servers. In at least one embodiment, the hardware-accelerated security service122described herein can provide host monitoring, enabling cybersecurity vendors to create accelerated intrusion detection system (IDS) solutions to identify an attack on any physical or virtual machine. Hardware-accelerated security service122can feed data about application status to SIEM or XDR system106. Hardware-accelerated security service122can also provide enhanced forensic investigations and incident response.

As described above, attackers attempt to exploit breaches in security control mechanisms to move laterally across data center networks to other servers and devices. Hardware-accelerated security service122described herein can enable security teams to shield their application processes, continuously validate their integrity, and, in turn, detect malicious activity. If an attacker terminates the security control mechanism's processes, hardware-accelerated security service122described herein can mitigate the attack by isolating the compromised host device, preventing the malware from accessing confidential data or spreading to other resources.

Conventionally, security tools run in the same host domain as the malware. So, stealthy malware can employ hiding techniques from the host device, enabling the malware to silently take over and tamper with agents and operating system (OS). For example, if anti-virus software is running on a host device that needs to continue operating or is not suspended, hardware-accelerated security service122described herein actively monitors the process to determine any anomalies, malware, or intrusion as described in more detail in the various embodiments described below. The malware runs in the host domain and hardware-accelerated security service122runs in a separate domain than the host domain.

Host device104may be a desktop computer, a laptop computer, a smartphone, a tablet computer, a server, or any suitable computing device capable of performing the techniques described herein. In some embodiments, host device104may be a computing device of a cloud-computing platform. For example, host device104may be a server machine of a cloud-computing platform or a component of the server machine. In such embodiments, host device104may be coupled to one or more edge devices (not shown) via network108. An edge device refers to a computing device that enables the communication between computing devices at the boundary of two networks. For example, an edge device may be connected to host device104, one or more data stores, one or more server machines via network108, and may be connected to one or more endpoint devices (not shown) via another network. In such an example, the edge device can enable communication between host device104, one or more data stores, one or more server machines, and one or more client devices. In other or similar embodiments, host device104may be an edge device or a component of an edge device. For example, host device104may facilitate communication between one or more data stores, one or more server machines connected to host device104via network108, and one or more client devices connected to host device104via another network.

In still other or similar embodiments, host device104can be an endpoint device or a component of an endpoint device. For example, host device104may be, or may be a component of, devices, such as televisions, smart phones, cellular telephones, data center servers, data DPUs, personal digital assistants (PDAs), portable media players, netbooks, laptop computers, electronic book readers, tablet computers, desktop computers, set-top boxes, gaming consoles, a computing device for autonomous vehicles, a surveillance device, and the like. In such embodiments, host device104may be connected to DPU102over one or more network interfaces121via network108. In other or similar embodiments, host device104may be connected to an edge device (not shown) via another network, and the edge device may be connected to DPU102via network108.

In at least one embodiment, the host device104executes one or more computer programs. One or more computer programs can be any process, routine, or code executed by the host device104, such as a host OS, an application, a guest OS of a virtual machine, or a guest application, such as executed in a container. Host device104can include one or more CPUs of one or more cores, one or more multi-core CPUs, one or more GPUs, one or more hardware accelerators, or the like.

In at least one embodiment, one or more computer programs reside in a first computing domain (e.g., a host domain), and hardware-accelerated security service122and ML detection system134reside in a second computing domain (e.g., DPU domain or infrastructure domain) different than the first computing domain. In at least one embodiment, the malicious activity is caused by malware, and hardware-accelerated security service122is out-of-band security software in a trusted domain that is different and isolated from the malware. That is, the malware may reside in a host domain, and hardware-accelerated security service122, being in the trusted domain, can monitor the physical memory to detect the malware in the host domain. In at least one embodiment, DPU102includes a direct memory access (DMA) controller (not illustrated inFIG.1A) coupled to host interface120. The DMA controller can read the data from host physical memory148via host interface120. In at least one embodiment, the DMA controller reads data from host physical memory148using the PCIe technology. Alternatively, other technologies can be used to read data from host physical memory148.

Although various embodiments described above are directed to embodiments where hardware-accelerated security service122and ML detection system134are implemented in separate computing devices, including DPU102and accelerated AI/MI pipelines153(e.g., on a GPU coupled to the DPU), in other embodiments, operations are performed on single DPU102. In other embodiments, DPU102may be any computing system or computing device capable of performing the techniques described herein.

In at least one embodiment, the host device104resides in a first computing domain (e.g., a host domain), and hardware-accelerated security service122and ML detection system134reside in a second computing domain (e.g., DPU domain) different than the first computing domain. In another embodiment, the host device104resides in a first computing domain (e.g., a host domain), hardware-accelerated security service122resides in a second computing domain (e.g., DPU domain), and ML detection system134reside in a third computing domain different than the first and second computing domains.

FIG.1Bis a block diagram of an example system architecture180, according to at least one embodiment. The system architecture180is similar to system architecture100, as noted by similar reference numbers, except as set forth below. The system architecture180includes an integrated circuit, labeled DPU102and GPU152. The GPU152can host a cybersecurity platform, such as the accelerated AI/ML pipeline153. In at least one embodiment, the accelerated AI/ML pipeline153can be part of the NVIDIA MORPHEUS cybersecurity platform. As described above, the NVIDIA Morpheus platform is an AI-enabled, cloud-native cybersecurity platform. The NVIDIA Morpheus platform is an open application framework that enables cybersecurity developers to create AI/ML pipelines for filtering, processing, and classifying large volumes of real-time data, allowing customers to continuously inspect network and server telemetry at scale. The NVIDIA Morpheus platform can provide information security to data centers to enable dynamic protection, real-time telemetry, and adaptive defenses for detecting and remediating cybersecurity threats. In at least one embodiment ofFIG.1B, DPU102extracts the network data101and the metadata103from the DPU hardware160of the DPU102. The network data101can be extracted from the network traffic received by the network interfaces of the DPU hardware160. The metadata103can be extracted from one or more registers, counters, or the like, of the DPU hardware160.

In at least one embodiment, the DPU102includes a flow inspector162that extracts the network data101and a telemetry agent164that extracts the metadata103from the DPU hardware160, as described above. The flow inspector162can be configured by a configuration file that specifies what type of data should be extracted from the network data101. The configuration file can specify one or more filters that extract for inclusion or remove from inclusion particular data from the network data101. The flow inspector162can generate a data structure with the extracted data. The data structure can be any type of data structure, such as a struct, an object, a message, or the like. For example, the configuration file can specify that all HTTP traffic be extracted from the network data101. The configuration file can specify that all traffic on port 80, port 443, and/or port 22 should be extracted from the network data101for analysis by the cybersecurity platform. The flow inspector162sends structured data161to the telemetry agent164. In at least one embodiment, the telemetry agent164can be programmed by a configuration file (same or different configuration file than the flow inspector162) that specifies what metadata103should be extracted from the DPU hardware160, such as from embedded counters, registers, or the like. For example, the configuration file can specify which values from counters, registers, or the like, should be extracted by the telemetry agent164to be streamed with the extracted network data. In at least one embodiment, the telemetry agent164combines the metadata103with the structured data161into streamed structured data163. The telemetry agent164sends the streamed structured data163to the GPU152. In this embodiment, the cybersecurity platform includes one or more accelerated AI/MI pipelines153deployed on the GPU hardware160. The cybersecurity platform can implement the network-anomaly detection system136.

In at least one embodiment, the DPU hardware160includes a data buffer to store the network data101. In at least one embodiment, the DPU hardware160creates a copy of the network data101so that it can be filtered by the flow inspector162to extract the structured data161.

In at least one embodiment, a computing system includes the DPU150and GPU152. The DPU150includes a network interface, a host interface, a CPU, and an acceleration hardware engine. The DPU150has DPU hardware160, including a network interface, a host interface, a CPU, and an acceleration hardware engine. The DPU150also has DPU software, including a hardware-accelerated security service with the flow inspector162and telemetry agent164to protect a host device from a malicious network attack. As described herein, the hardware-accelerated security service extracts a set of features from first data in network traffic received on the network interface and second data stored in one or more registers in the DPU hardware160. The GPU152, or other accelerated pipeline hardware, is coupled to the DPU160. The GPU152determines, using an ML detection system, whether the host device is subject to a malicious network attack based on the set of features. The GPU152sends an enforcement rule to the DPU150responsive to a determination that the host device is subject to a malicious network attack.

In at least one embodiment, the hardware-accelerated security service (flow inspector162and telemetry agent164) can extract first feature data from the network traffic and second feature data from one or more registers in the DPU hardware160. The hardware-accelerated security service (flow inspector162and telemetry agent164) can combine the first feature data and the second feature data into the set of features. The hardware-accelerated security service can send the set of features to the GPU152(e.g., accelerated pipeline hardware153) to determine whether the host device is subject to a malicious network attack. Responsive to a determination by the GPU152(e.g., or accelerated pipeline hardware153) that the host device is subject to the malicious network attack, the GPU152(e.g., or accelerated pipeline hardware153) can send the enforcement rule107to the DPU150. The DPU150can perform an action, associated with the enforcement rule107, on subsequent network traffic directed to the host device.

In at least one embodiment, the host device resides in a first computing domain, and the DPU software resides in a second computing domain different than the first computing domain. The ML detection system can reside in the second computing domain or a third computing domain different than the first computing domain and the second computing domain.

FIG.2is a flow diagram of an example method200of detecting a malicious network attack on a host device, according to at least one embodiment. In at least one embodiment, method200may be performed by processing the logic of DPU102. In at least one embodiment, method200may be performed by processing logic of DPU102and processing logic of accelerated AI/ML pipeline153. The processing logic can be a combination of hardware, firmware, software, or any combination thereof. Method200may be performed by one or more data processing units (e.g., DPUs, CPUs, and/or GPUs), including (or communicating with) one or more memory devices. In at least one embodiment, method200may be performed by multiple processing threads, each thread executing one or more individual functions, routines, subroutines, or operations of the method. In at least one embodiment, processing threads implementing method200may be synchronized (e.g., using semaphores, critical sections, and/or other thread synchronization logic). Alternatively, processing threads implementing method200may be executed asynchronously with respect to each other. Various operations of method200may be performed differently than the order shown inFIG.2. Some operations of the methods may be performed concurrently with other operations. In at least one embodiment, one or more operations shown inFIG.2may not always be performed.

Referring toFIG.2, the processing logic extracts first features from first data in network traffic received on a network interface (block202). The first data is network data directed to a host device. The processing logic extracts second features from second data stored in one or more registers in an acceleration hardware engine (block204). The processing logic uses an ML detection system to determine whether the host device is subject to a malicious network attack based on the first and second features (block206). The processing logic performs an action associated with an enforcement rule on subsequent network traffic directed to the host device from the second device, responsive to a determination that the host device is subject to the malicious network attack (block208).

In at least one embodiment, the processing logic extracts first feature data from the network traffic and second feature data from the one or more registers in the acceleration hardware engine. The processing logic combines the first feature data and the second feature data into a set of features. The processing logic sends the set of features to an accelerated pipeline hardware. The accelerated pipeline hardware hosts the ML detection system. The processing logic receives the enforcement rule from the accelerated pipeline hardware responsive to a determination by the accelerated pipeline hardware that the host device is subject to a malicious network attack based on the plurality of features.

In at least one embodiment, the processing logic tokenizes the first feature data into tokens and extracts numeric features from the second feature data. The ML detection system includes a classification model trained to classify the first and second feature data as malicious or benign based on the tokens and the numeric features.

In another embodiment, the classification model includes an embedding layer, an LSTM layer, and a neural network layer. The embedding layer can receive the tokens as an input sequence of tokens and generate an input vector based on the input sequence of tokens. The LSTM layer can be trained to generate an output vector based on the input vector. The neural network layer can be trained to classify the first and second feature data as malicious or benign using the output vector from the LSTM layer and the numeric features of the second feature data.

In at least one embodiment, the host device resides in a first computing domain, and the DPU and the ML detection system reside in a second computing domain different than the first computing domain. In at least one embodiment, the host device resides in a first computing domain, the DPU resides in a second computing domain different than the first computing domain, and the ML detection system resides in a third computing domain different than the first computing domain and the second computing domain.

As described above, one type of malicious activity is caused by malicious network attacks, such as through network traffic on specified ports. In at least one embodiment, hardware-accelerated security service and the cybersecurity platform are part of an active system for detecting malicious network attacks on a host device by constantly monitoring the network traffic for anomalies by leveraging accelerated hardware for feature extraction from the network traffic and accelerated hardware for anomaly detection. The hardware-accelerated security service can extract specific types of network data and metadata from the underlying acceleration hardware and stream this information to a GPU for ML-based anomaly detection. The hardware-accelerated security service allows live-network analysis (or real-time data analysis) of the network traffic and provides mitigation or enforcement to stop the network traffic that is classified as malicious immediately. In at least one embodiment, a DPU can process a copy of the network data, extract features or indications from network data, and extract features from the DPU hardware itself before sending it to an ML detection system on accelerated hardware, such as a GPU coupled to the DPU. The DPU can collect real-time data using out-of-band filtering using the hardware-accelerated security service. The DPU can integrate a network-anomaly detection system with the real-time data collected by hardware-accelerated security service to detect malicious network activity in the network traffic and immediately take enforcement, mitigation, or remedial actions in response.

FIG.3Ais a block diagram of an example network-anomaly detection system136, according to at least one embodiment. Network anomaly detection system136includes feature extraction logic144and binary classification model300trained to classify network traffic as malicious benign using a set of features. Feature extraction logic144receives streamed structured data163(or streamed data105), as described above, extracts first feature data301from the streamed structured data163, and extracts second features data303(e.g., numeric features of the metadata) from one or more registers in the acceleration hardware engine. For binary classification model300, feature extraction logic144extracts features and tokenizes the features into token features. Feature extraction logic144can provide the tokens and numeric features to binary classification model300, which is trained to classify the network traffic as malicious309or benign311using the tokens and numeric features.

In at least one embodiment, binary classification model300includes an embedding layer302, an LSTM layer304, and a fully connected neural network layer306. Embedding layer302can receive tokens as an input sequence of tokens representing the extracted network data. Embedding layer302can generate an input vector305based on the input sequence of tokens. Input vector305can represent the words network data in a vector space used by LSTM layer304. LSTM layer304can receive input vector305and generate an output vector307based on input vector305. Fully connected neural network layer306can receive output vector307from LSTM layer304and numeric features (metadata). Fully connected neural network layer306is trained to classify the network data and metadata as a malicious309or benign311using output vector307from the LSTM layer5304and the numeric features of the metadata. In at least one embodiment, fully connected neural network layer306can determine a level of confidence that the network activity corresponds to the malicious class. The level of confidence can be a prediction percentage of being malicious. For example, if the level of confidence satisfies a level of confidence criterion (e.g., a confidence threshold), fully connected neural network layer306can classify the network activity as malicious309.

In at least one embodiment, network-anomaly detection system136can output an indication of a malicious network activity313responsive to the network activity being classified as malicious309. The indication of a malicious network activity313can specify the confidence level that the network activity corresponds to the malicious class. Alternatively, network-anomaly detection system136can output an indication of a benign network activity responsive to the network activity being classified as benign311. The indication of benign network activity can indicate a level of confidence that the network activity is benign.

As described above, ML detection models, such as the binary classification model300, can be deployed in network-anomaly detection system136residing in GPU152or other hardware accelerated hardware, as described in more detail with respect toFIG.3B, or network-anomaly detection system136residing in accelerated AI/ML pipeline153, as described in more detail with respect toFIG.3C.

FIG.3Bis a block diagram of an example system architecture320for the network-anomaly detection system136, according to at least one embodiment. In system architecture320, DPU102hosts hardware-accelerated security service122and network-anomaly detection system136. Hardware-accelerated security service122extracts feature data321as described above with respect toFIG.3A, and sends, or otherwise makes available, the feature data321to network-anomaly detection system136. Network anomaly detection system136, using binary classification model300, classifies the network activity as malicious or benign and sends an enforcement rule323to the hardware-accelerated security service122, such as immediately blocking subsequent network activity by the attacker. In at least one embodiment, the network-anomaly detection system136can also output an indication of malicious network activity313to SIEM or XDR system106for further actions by SIEM or XDR system106. SIEM or XDR system106can monitor and show results of classifications of ransomware, such as on a dashboard displayed to a user or operator of SIEM or XDR system106.

In another embodiment, the hardware-accelerated security service122and network-anomaly detection system136can reside on a convergence card that includes both DPU hardware and GPU hardware. The convergence card can be a single integrated circuit with the DPU and GPU hardware. In another embodiment, the convergence card can include multiple integrated circuits to implement the functionality of the DPU and the GPU, as described herein.

In various embodiments, the data extraction and the data analysis are done by accelerated hardware. The accelerated hardware can be used to extract feature data from the network traffic, and accelerated hardware can be used to perform ML-based anomaly detection, as described herein. The accelerated hardware can also provide enforcement rules in response to detecting anomalies to protect the host device from malicious network activity. The accelerated hardware can structure the data in any format the cybersecurity platform can receive. The structure can be a message, a struct, or the like. The feature data may not necessarily be formatted in a common format or be serialized to send to the cybersecurity platform. In other embodiments, the accelerated hardware can use a common format or serialize the data to send to the cybersecurity platform.

FIG.3Cis a block diagram of an example system architecture340for the ransomware detection system, according to at least one embodiment. In system architecture340, DPU102hosts hardware-accelerated security service122, and accelerated AI/ML pipeline153hosts network-anomaly detection system136. Hardware-accelerated security service122extracts feature data321as described above with respect toFIG.3A, and sends, or otherwise makes available, the feature data321to a publisher subscribe feature342(e.g., Kafka). Publisher subscribe feature342sends, or otherwise makes available, the feature data321to network-anomaly detection system136. Network anomaly detection system136, using binary classification model300, classifies the network activity as malicious or benign and sends an enforcement rule343to the publisher subscribe feature342. The publisher subscribe feature342can send the enforcement rule343to the hardware-accelerated security service122. In at least one embodiment, the network-anomaly detection system136can output an indication of malicious network activity313to SIEM or XDR system106for further actions by SIEM or XDR system106.

FIG.4is a block diagram of a computing system400with a DPU402and a GPU404coupled between a first host device406and a second host device408, according to at least one embodiment. In at least one embodiment, the computing system400and the first host device406reside in a data center, and the second host device408is a malicious host attempting to attack the first host device406. In at least one embodiment, the GPU404includes a machine learning (ML) model410that identifies potentially malicious network activity between the first host device406and the second host device408. The computing system400can be a networking device, an infrastructure device, or the like that performs a networking function, such as the functions performed by hubs, repeaters, switches, routers, bridges, gateways, modems, or network interfaces. Examples of network devices can include, but are not limited to, access points, routers, Wi-Fi® access points, Wi-Fi® routers, switches, hubs, bridges, modems, DPUs, SmartNICs, active cables, or the like. In at least one embodiment, the computing system400operates on one or more layers of the open systems interconnection (“OSI”) model. For example, computing system400may, in some cases, corresponds to a hub that connects computing devices operating at level one of the OSI model. In another embodiment, computing system400is a bridge or switch processes traffic at OSI layer two. In another embodiment, computing system400is a router operating at OSI layer three. In some embodiments, computing system400operates at multiple OSI levels.

In at least one embodiment, the operation of computing system400at a layer of the OSI model comprises performing networking functions related to that layer and collecting telemetry data401pertinent to the performance of those functions. This telemetry data401can comprise metrics, log data, or other information that describes events, states, or operations associated with the computing system400and the performance of a relevant function. Note that in at least some cases and embodiments, the computing system400that operates on a particular layer of the OSI model may collect telemetry data401relevant to its operation on that layer more efficiently than devices that operate on other layers. In addition to collecting telemetry data401, the DPU402collects and filters network traffic to obtain filtered network data403. The filtered network data403can be HTTP traffic, such as network data on a specified port. The filtered network data403and the telemetry data401can be combined and sent as feature data405to the GPU404for network-anomaly detection. The GPU404uses the ML model410to identify the network traffic as malicious using the feature data405. In response to identifying malicious network traffic, the GPU404sends an enforcement rule407to the DPU402to protect the first host device406from the malicious network traffic by the second host device408.

In at least one embodiment, the computing system400collects and processes telemetry data401and filtered network data403, which are collected on-the-fly by the computing system400. For example, such data may be collected by an application-specific integrated circuit (“ASIC”) that performs the device's networking function. The telemetry data401can, using this technique, be rapidly read from the device's registers or other internal memory. Examples of telemetry data can include, but are not limited to, latency histograms, receive counters, send counters, metrics associated with encapsulation or de-encapsulation, queue occupancy, queue length, and power-level usage indicators. Note that in some cases, attempts to utilize a device to perform crypto-currency mining, malicious, or other undesired usage patterns may result in increased power consumption by the computing system400.

In at least one embodiment, computing system400comprises a networking component, the ML model410, and a database. The networking component can include circuitry and other computing facilities, such as processors, memory, and processor-executable instructions used to perform one or more network-related functions of the computing system400, such as sending or receiving data. This networking function may comprise sending or receiving data between the first host device406and the second host device408. In at least one embodiment, the second host device408is considered a source host, and the first host device406can be considered a destination host. A source host may be a device, such as a computing device that transmits data over a network. Similarly, a destination host may be a device, such as a computing device that receives data sent over the network.

In at least one embodiment, the ML model410can analyze network traffic and identify undesired data or network traffic patterns. The ML model410can implement one or more of a variety of machine learning methods, techniques, and algorithms. These can include, but are not limited to, supervised learning, unsupervised learning, deep learning, and reinforcement learning. Embodiments of an ML model410may, for example, implement algorithms for regression, clustering, instance-based algorithms, regularization algorithms, artificial neural networks, convolutional neural networks, recurrent neural networks, long short-term memory networks, decision-trees, deep belief networks, gradient boosting, XGBoost, support vector machines, Bayesian techniques, random forests, and so forth. It will be appreciated that these examples are intended to be illustrative. As such, they should not be construed in a manner that would limit potential embodiments to only those that incorporate the specific examples provided.

In at least one embodiment, the ML model410is trained to identify undesired usage of computing system400. Such usage can include using computing system400in a manner that causes or facilitates harm, such as harm to the operation of a computer or computer network, harmful disclosure of information, harmful transmission of data, etc. In at least one embodiment, the ML model410is trained to identify harmful usage of computing system400using a dataset of examples. These examples can include network telemetry, network data packets, series of network data packets, or other information. In at least one embodiment, these examples are labeled to indicate whether or not a particular example is associated with undesired data or traffic patterns. As appropriate to the machine learning model, various techniques may use labeled or unlabeled data to train the model.

In at least one embodiment, the computing system400includes a database that can maintain information related to ML model410. For example, the database can maintain datasets, as just described, that are used to train, retrain, or refine the training of an ML model410. For example, in at least one embodiment, a set of example data patterns indicative of malicious, unauthorized, or otherwise undesired network traffic patterns, is maintained in database112. This data may be updated or supplemented as new attack patterns are discovered. Therefore, the computing system400may include circuitry, processor-executable instructions, or other computing facilities for receiving updated data and storing the data in the database.

In at least one embodiment, computing system400includes circuitry, processor-executable instructions, or other computing facilities for training, retraining, or refinement of the ML model410using such updated data from the database. For example, after a new attack pattern is discovered, the database may be updated in response to a request from an external source, such as a command from a device that performs an administrative function. After the update, the computing system400initiates a training procedure, using the data stored in the database, to train, retrain, or refine the training of ML model410. The ML model410may then have improved capabilities to detect network patterns that reflect characteristics similar to those of the new attack pattern or those that reflect characteristics similar to other, previously known patterns associated with undesired network usage.

In at least one embodiment, the database is omitted from the computing system400. In some embodiments, an external database is used, and training samples are transmitted to the computing system400and used by the computing system400to train, retrain, or refine training of ML model410. In other embodiments, training, retraining, or refinement of ML model410is performed externally, and an ML model410is updated to reflect the new training. For example, in at least one embodiment, a set of weights or other parameters, such as the weights or parameters used in an artificial neural network, are transmitted to computing system400and used to update corresponding weights or parameters in ML model410.

In at least one embodiment, computing system400operates on one or more selected layers of the OSI model, collects data pertinent to networking operations performed on one or more selected layers, and analyzes the data using an ML model410to identify a suspicious or unauthorized network traffic pattern. For example, an ML model410might infer, based on analyzing data from the OSI layers, that an observed network traffic pattern appears to be a denial-of-service (“DoS”) attack or other malicious use of computing system400. The computing system400can then initiate a response to the detected network traffic pattern. By performing analysis on computing system400, data pertinent to a particular OSI layer might be analyzed and an undesired use of computing system400detected more quickly or more efficiently than might be the case if the analysis were performed remotely. This approach may also, in some embodiments, convey an advantage by permitting analysis of data at a particular OSI layer to be analyzed without requiring transmission of that data to another device or otherwise facilitating more rapid analysis of and response to the data.

FIG.5illustrates an example process flow500for malicious network attack detection by a machine learning model, according to at least one embodiment. In the example process flow500, a DPU502can perform various operations, and a GPU504can perform various operations. At506, the DPU502collects filtered network data as described above. The filtered network data can be collected by the hardware-accelerated security service as described above, such as a flow inspector. At508, the DPU502collects telemetry data associated with networking operations performed by the DPU502. In at least one embodiment, telemetry data is collected by a telemetry agent. This filtered network data and telemetry data is then, in at least one embodiment, routed at510to a machine learning model on the GPU504. In at least one embodiment, the filtered network data and the telemetry data are used to perform training of the machine learning model at512. This can include retraining or refining a trained model or training a new or additional machine learning model. In at least one embodiment, filtered network data and the telemetry data collected at206and208are used to perform, at514, inference or other analysis consistent with the type of model used to identify a potentially malicious network attack as manifest in undesired traffic patterns. At516, if the malicious network attack is detected, the GPU504generates an enforcement rule at518to prevent the network traffic for the given malicious network attack. The enforcement rule is routed at518to the DPU502. The enforcement rule can include a mitigating action, a preventative action, a remedial action, or the like. The enforcement rule can be used to prevent the traffic from interfering with the operation of the DPU502or a host device to which the malicious network attack is directed. For example, in at least one embodiment, the machine learning model at514identifies an undesired usage of the DPU502and may further be used to identify the usage characteristics, such as the network ports associated with the undesired usage. The DPU502can determine if the enforcement rule is received from the GPU504at520. If the enforcement rule is received at520, the DPU502can apply the enforcement rule to prevent a malicious network attack. The DPU502can perform one or more actions to mitigate, prevent, or remediate the malicious network attack. Examples of potential enforcement actions can include, but are not necessarily limited to, sending a notification describing the inference, restricting usage of the network device, shutting down the network device, slowing the network device, applying restrictive measures to traffic associated with a network traffic pattern, and so on. It will be appreciated that these examples are intended to be illustrative rather than limiting. If an enforcement rule is not received at520, the DPU502can continue to collect filtered network data at506.

After a determination is made, information about the determination is fed, in at least one embodiment, back to model training at512. This can include information indicating whether or not a network traffic pattern (or other data or condition) that was classified as undesired by the machine learning model is confirmed as undesired or not being undesired. This information can then be used in model training at512to refine the model's understanding of potentially malicious or otherwise undesired network traffic patterns and approve the model's ability to recognize and distinguish undesired behavior from behavior that conforms to an intended usage of the DPU502.

Other variations are within the spirit of the present disclosure. Thus, while disclosed techniques are susceptible to various modifications and alternative constructions, certain illustrated embodiments thereof are shown in drawings and have been described above in detail. It should be understood, however, that there is no intention to limit the disclosure to a specific form or forms disclosed, but on the contrary, the intention is to cover all modifications, alternative constructions, and equivalents falling within the spirit and scope of the disclosure, as defined in appended claims.

Furthermore, although the subject matter has been described in language specific to structural features and/or methodological acts, it is to be understood that subject matter claimed in appended claims is not necessarily limited to specific features or acts described. Rather, specific features and acts are disclosed as exemplary forms of implementing the claims.