Semiconductor device and manufacturing method of semiconductor device

A semiconductor device includes a first substrate, an aluminum pad, a first nickel electrode, a second substrate, a second nickel electrode, and a connection layer. The first substrate includes a wiring therein. The aluminum pad is provided adjacent to a surface layer of the first substrate and is connected to the wiring. A portion of the first nickel electrode extends inwardly of the first substrate and is connected to the aluminum pad. A top surface of the first nickel electrode projects from a surface of the first substrate. A portion of the second nickel electrode extends inwardly of the second substrate. A top surface of the second nickel electrode projects from a surface of the second substrate facing the first substrate. The connection layer comprises an alloy including tin and connects the first nickel electrode and the second nickel electrode.

CROSS-REFERENCE TO RELATED APPLICATION

This application is based upon and claims the benefit of priority from Japanese Patent Application No. 2015-110601, filed May 29, 2015, the entire contents of which are incorporated herein by reference.

FIELD

Embodiments described herein relate generally to a semiconductor device and a manufacturing method of a semiconductor device.

BACKGROUND

In the related art, there is a semiconductor device in which a mounting area of the device is reduced by stacking and connecting substrates having semiconductor elements and integrated circuits provided thereon and/or therein. Although such a stacked semiconductor device reduces the required planar mounting area in a length direction and a width direction, in comparison with the case in which substrates are mounted side by side in one plane, reduction in a size in a stacked semiconductor device in the thickness direction is also required.

DETAILED DESCRIPTION

Provided are a semiconductor device and a manufacturing method of a semiconductor device, wherein the size in a thickness direction is reduced.

In general, according to one embodiment, a semiconductor device includes a first substrate, an aluminum pad, a first nickel electrode, a second substrate, a second nickel electrode, and a connection layer. The first substrate includes a wiring therein. The aluminum pad is provided adjacent to a surface layer of the first substrate and is connected to the wiring. In the first nickel electrode, a portion thereof extends inwardly of the first substrate and is connected to the aluminum pad. Atop surface of the first nickel electrode projects from a surface of the first substrate. A portion of the second nickel electrode extends inwardly of the second substrate. A top surface of the second nickel electrode projects from a surface of the second substrate on a first substrate side (side facing the first substrate). The connection layer is formed of an alloy including tin and electrically connects the first nickel electrode and the second nickel electrode.

Hereinafter, a semiconductor device and a manufacturing method of a semiconductor device according to an embodiment will be described in detail with reference to the accompanying drawings. In addition, the embodiment does not limit the present invention.FIG. 1is an explanatory diagram illustrating a schematic cross section of a semiconductor device1according to an embodiment.

As illustrated inFIG. 1, the semiconductor device1according to the embodiment has a structure allowing a reduction in a mounting area, by stacking and connecting a first substrate10including a semiconductor element and an integrated circuit, to a second substrate11.

In previous devices, in a general semiconductor device which is manufactured by stacking substrates, for example, pillar shaped electrodes formed of copper (hereinafter, described as a “pillar electrode”) are provided on the facing surface sides of the respective substrates, and the pillar electrodes facing each other are connected using solder.

However, when directly connecting the copper pillar electrodes using solder, solder diffuses into the material of the pillar electrode, and thus connection characteristics are degraded. Thus, a barrier layer to prevent the diffusion of solder into the pillar electrode material is provided between the pillar electrode and solder.

However, since one pillar electrode, one barrier layer, a solder layer, another barrier layer, and another pillar electrode are sequentially stacked between substrates in such a configuration, the distance between stacked substrates is increased and the final thickness of the semiconductor device is increased. Here, since the semiconductor device1has a pillar electrode formed of nickel (Ni) which itself limits of diffusion of the solder material thereinto instead of the copper pillar electrode, reduction (compactness) in the thickness direction is possible by elimination of the barrier layer.

Specifically, the first substrate10of the semiconductor device1includes a semiconductor layer8, a protective film80provided on the lower surface of the semiconductor layer8, and a first insulating layer30, a second insulating layer4, and a passivation film5sequentially stacked on the semiconductor layer8.

The protective film80is formed of, for example, silicon nitride (SiN). The semiconductor layer8is formed of, for example, silicon (Si), and a through electrode81that penetrates the front and back surfaces of the semiconductor layer8is provided therethrough. The through electrode81is formed of, for example, copper (Cu) or nickel (Ni).

Further, a barrier metal film82preventing the diffusion of metal (for example, Cu) from the through electrode81to the semiconductor layer8is provided at the interface between the through electrode81and the semiconductor layer8, that is, here it lines the opening through which the through electrode81extends. The barrier metal film82is formed of, for example, titanium (Ti). In addition, although not shown here, a semiconductor element, an integrated circuit, and the like are provided in and on the semiconductor layer8. Further, although not shown here, an insulating film formed of, for example, silicon oxide (SiO2) is formed between the protective film80and the semiconductor layer8, and between the barrier metal film82and the semiconductor layer8.

The first insulating layer30is made of, for example, SiO2, and a multilayer wiring3is provided therein. The multilayer wiring3includes a first wiring31connected to the upper surface of the through electrode81, a second wiring32connected to the upper surface of the first wiring31, and a third wiring33connected to the upper surface of the second wiring32.

The first wiring31is formed of, for example, tungsten (W). The second wiring32and the third wiring33are formed of, for example, Cu. The second wiring32and the third wiring33are covered with the barrier metal film34. The barrier metal film34is formed of, for example, titanium (Ti).

The second insulating layer4is formed of, for example, SiO2, and an aluminum pad40is connected to the upper surface of the third wiring33. The aluminum pad40is covered with the barrier metal film41. The barrier metal film41is formed of, for example, Ti. The passivation film5is formed of, for example, SiN or polyimide.

A pillar-shaped first Ni electrode6formed of nickel (Ni) of which a portion is embedded in the passivation film5and connected to the aluminum pad40. A top surface of the electrode6projects from a surface of the passivation film5on the upper surface of the first substrate10.

A barrier metal film60is provided at the interface between the first Ni electrode6and the passivation film5. The barrier metal film60is formed of, for example, Ti. Further, the first Ni electrode6includes a Cu diffusion region61containing Cu, in a site in contact with the barrier metal film60. The Cu diffusion region61is formed where Cu is diffused into the first Ni electrode6, and here Cu is used as a seed layer in the process of forming the first Ni electrode6.

Further, a pillar-shaped second Ni electrode9formed of nickel (Ni) is provided on the lower surface side of the first substrate10. Specifically, the second Ni electrode9has a shape in which a portion thereof is embedded in the protective film80and a top surface which projects from a surface (here, a lower surface) of the protective film80.

The barrier metal film90is provided in the interface between the second Ni electrode9and the protective film80. The barrier metal film90is formed of, for example, Ti. Further, the second Ni electrode9has a Cu diffusion region91containing Cu in a site in contact with the barrier metal film90. The Cu diffusion region91is formed by Cu being diffused into the second Ni electrode9, and here Cu is also used as a seed layer in the process of forming the second Ni electrode9.

Further, a connection layer7formed of an alloy containing tin (Sn) is provided on the top surface (here, the lower surface) of the second Ni electrode9. The connection layer7is formed of, for example, a tin based solder. Further, in the connection layer7, the portion in contact with the second Ni electrode9includes an Au diffusion region71containing gold (Au).

The Au diffusion region71is formed by Au (gold) from an Au film104(seeFIG. 4C), which will be described later, formed on the top surface of the second Ni electrode9after diffusing into the connection layer7during the manufacturing process of the device. When the first substrate10is located on another substrate, such as a lead frame or a mounting substrate (not shown), the connection layer7is connected to the connection terminal on the other substrate surface. Further, the supporting portion72is provided between the adjacent second Ni electrodes9. The supporting portion72is formed of, for example, a photosensitive adhesive resin.

Meanwhile, the configuration of the connection portion of the upper surface side and the back surface side in the second substrate11is the same as that of first substrate10. Here, the configuration of the semiconductor element and the integrated circuit formed in and/or on the second substrate11may be the same as or different from that of the first substrate10. Therefore,FIG. 1selectively illustrates portions on the lower side from the semiconductor layer8of the second substrate11.

In the semiconductor device1, the second substrate11is stacked on the first substrate10. Thus, the semiconductor device1has a structure in which the connection layer7of the second substrate11is stacked immediately above the first Ni electrode6of the first substrate10, the second Ni electrode9of the second substrate11is stacked immediately above the connection layer7, and the second substrate11is stacked on the second Ni electrode9of the second substrate11.

Further, in the semiconductor device1, one end surface (here, the upper surface) of the supporting portion72of the second substrate11abuts on the lower surface of the protective film80of the second substrate11, and the other end surface (here, the lower surface) abuts on the upper surface of the passivation film5of the first substrate10.

As described above, the semiconductor device1includes a first substrate10having a multilayer wiring3provided therein, an aluminum pad40provided in a surface layer of the first substrate10having the multilayer wiring3provided therein and connected to the multilayer wiring3, and a first Ni electrode6of which a portion is embedded in the first substrate10and connected to the aluminum pad40. The top surface of the first Ni electrode6projects from a surface of the first substrate10.

The semiconductor device1includes a second substrate11stacked on the first substrate10, a second Ni electrode9of which a portion is embedded in the second substrate11and a top surface of which projects from a surface on the first substrate10side of the second substrate11, and a solder connection layer7that connects the first Ni electrode6and the second Ni electrode9.

In this manner, in the semiconductor device1, the first substrate10and the second substrate11are connected by a stacked body of three components: the first Ni electrode6, the solder connection layer7, and the second Ni electrode9. This enables a reduction in the size of the semiconductor device1in the thickness direction, in comparison with a prior semiconductor device in which stacked substrates including Cu pillar electrodes are connected by a stack body of five components: a pillar electrode, a barrier layer, a solder layer, a barrier layer, and a pillar electrode.

The first Ni electrode6of the semiconductor device1includes a Cu diffusion region61containing Cu in a portion thereof in contact with the barrier metal film60. The first Ni electrode6may be formed using the Cu diffusion region61as a seed layer. Therefore, according to the embodiment, without significantly changing the existing prior manufacturing process, it is possible to manufacture the semiconductor device1having a reduced size in the thickness direction.

Further, in the connection layer7of the semiconductor device1, the portion in contact with the first Ni electrode6and the portion in contact with the second Ni electrode9include Au diffusion regions71containing Au. Thus, in the semiconductor device1, it is possible to reduce the connection resistance between the connection layer7, the first Ni electrode6and the second Ni electrode9.

Further, the semiconductor device1includes a supporting portion72which is made of resin, and of which one end surface abuts on a surface on the first substrate10, and the other end surface abuts on a surface on the first substrate10side of the second substrate11. When the second substrate11is stacked on the first substrate10, the supporting portion72establishes the distance therebetween prevents the distance between the first substrate10and the second substrate11from being excessively reduced.

Therefore, according to the semiconductor device1, when the second substrate11is stacked on the first substrate10, it is possible to prevent the solder of the connection layer7from being excessively crushed and the resulting bowing outwardly sag, or from extending to the passivation film5of the first substrate10and thereby cause current leakage.

In addition, when the height of the top surface of the first Ni electrode6from the surface of the passivation film5is between 1 μm and 10 μm, and the height (thickness) of the supporting portion72is between 17 μm and 25 μm, when the area of the surface of the first substrate10occupied by the supporting portion72is between 10% and 50% of the area of the surface of the first substrate10, the supporting portion72may prevent the solder from bowing or sagging.

Next, with reference toFIG. 2AtoFIG. 7, the manufacturing method of the semiconductor device1according to the embodiment will be described.FIG. 2AtoFIG. 7are explanatory diagrams illustrating the manufacturing processes of the semiconductor device1according to the embodiment. Hereinafter, among components inFIG. 2AtoFIG. 7, the same components as the components inFIG. 1are denoted by the same reference numerals as the reference numerals inFIG. 1, and thus a repetitive description thereof will be omitted.

The manufacturing processes of the first substrate10and the second substrate11are identical, except that the forming processes of a semiconductor element and an integrated circuit to be formed on the semiconductor layer8may be different. For this reason, here, the manufacturing process of the first substrate10will be described, and a description about the manufacturing process of the second substrate11will be omitted.

Further, in the manufacturing process of the first substrate10, a process of forming the first insulating layer30and the multilayer wiring3on the semiconductor layer8is the same as the manufacturing process of a general semiconductor device, such that the description thereof will be omitted here.

When the semiconductor device1is manufactured, as illustrated inFIG. 2A, a first substrate10is prepared in which a first insulating layer30and a multilayer wiring3are formed on the semiconductor layer8. Thereafter, as illustrated inFIG. 2B, a second insulating layer4is formed by forming SiO2on the first insulating layer30, for example, by depositing a SiO2layer on the first insulating layer30using chemical vapor deposition (CVD).

Then, a barrier metal film41is formed by selectively removing SiO2at a region for forming the aluminum pad40from the second insulating layer4, for example, by reactive ion etching (RIE), and covering the surface of the second insulating layer4with Ti.

Thereafter, after aluminum (Al) is formed on the second insulating layer4, for example, by sputtering, aluminum is patterned by RIE. Thus, as illustrated inFIG. 2B, the aluminum pad40is formed on the second insulating layer4.

Subsequently, as illustrated inFIG. 2C, a passivation film5is formed by stacking SiN or polyimide on the second insulating layer4having the aluminum pad40formed therein. In addition, the passivation film5may include SiO2between the aluminum pad40and the passivation film5.

Then, as illustrated inFIG. 3A, a resist100is applied on the passivation film5, and the resist100at a region for forming the first Ni electrode6(seeFIG. 1) is selectively removed using photolithography techniques.

An opening101extending from a surface of the passivation film5to a surface of the aluminum pad40covered with the barrier metal film41is formed, at a region for forming the first Ni electrode6in the passivation film5, by performing etching with the remaining patterned resist100used as a mask.

Subsequently, as illustrated inFIG. 3B, after removing the resist100, a barrier metal film60is formed by covering the upper surface of the passivation film5, and the inner peripheral surface and bottom surface of the opening101, with Ti. Further, a seed layer film61ais formed by covering the surface of the barrier metal film60with Cu.

Subsequently, as illustrated inFIG. 3C, a resist102is formed over the Cu seed layer film61aand patterned with openings, such that openings101over the seed layer film61aare created by selectively removing the resist102on the region for forming the first Ni electrode6(seeFIG. 1) after applying a resist102to the surface of the seed layer film61a.

Thereafter, as illustrated inFIG. 4A, the first Ni electrode6is formed by stacking Ni on the seed layer film61aat the region in which the resist102is removed and the underlying seed layer film61ais exposed. Ni is formed on the exposed seed layer film61aby electrolytic plating using the seed layer film61aas an electrode film. In addition, Ni is diffused from the first Ni electrode6into the seed layer film61aat a region in which the first Ni electrode6is in contact with the seed layer film61a, and Cu is diffused from the seed layer film61ainto the first Ni electrode6.

Thus, the seed layer film61ain contact with the first Ni electrode6becomes an alloy of Cu and Ni, becomes a portion of the first Ni electrode6, and a Cu diffusion region61is formed at the region in contact with the barrier metal film60of first Ni electrode6.

As a result, a region of pure Cu is no longer present between the barrier metal film60and the first Ni electrode6. Thus, a first Ni electrode6of which a portion is embedded in the opening101having the barrier metal film60provided therein and is connected to the aluminum pad40and a top surface projects from the surface of the passivation film5is formed.

Then, after an Au film103is formed on the upper surface of the first Ni electrode6, as illustrated inFIG. 4B, the resist102is removed. The seed layer film61aand the barrier metal film60are removed from the upper surface of the passivation film5by performing RIE using the first Ni electrode6(including the Au film103formed on the upper surface thereof) as a mask.

Subsequently, the through electrode81is formed in the semiconductor layer8. Here, for example, the through electrode81is formed by forming the protective film80on the lower surface of the semiconductor layer8, forming a through silicon via (TSV) extending from the lower surface of the semiconductor layer8to the lower surface of the first wiring31, covering the inner peripheral surface of the TSV with the barrier metal film82, and embedding Cu in the TSV.

Thereafter, as illustrated inFIG. 4C, the same process as the process described with reference toFIG. 3AtoFIG. 4Cis performed on the protective film80, and the formation of the barrier metal film90and the formation of the second Ni electrode9including the Cu diffusion region91at a region in contact with the barrier metal film90are performed.

Thus, a pillar-shaped second Ni electrode9is formed of which a portion is embedded in the protective film80and a top surface projects from a surface (here, the lower surface) of the protective film80. The Au film104is formed on the top surface (here, the lower surface) of the second Ni electrode9.

Subsequently, as illustrated inFIG. 5, the photosensitive adhesive resin105is applied to the lower surface (underside) of the first substrate10. Then, exposure is performed through a patterned mask using a stepper or aligner. The exposed portion of the photosensitive adhesive resin105is developed. That is, the adhesive resin105at the portion irradiated with light through the openings in the patterned mask is removed. Thus, a supporting portion72illustrated inFIG. 6Ais formed. Then, the connection layer7is formed by forming a solder layer on the lower surface of the Au film104, as illustrated inFIG. 6B.

In addition, in a portion in which the connection layer7is in contact with the Au film104, the solder material is diffused from the connection layer7into the Au film104, and Au is diffused from the Au film104into the connection layer material7. Thus, the Au film104at a portion in contact with the connection layer7becomes an alloy of Au and the material of the solder to become a portion of the connection layer7, the Au diffusion region71is formed in a portion of the connection layer7in contact with the second Ni electrode9, and thus the first substrate10is completed.

Last, as illustrated inFIG. 7, the completed second substrate11is placed on the completed first substrate10, the alignment of the first Ni electrode6of the first substrate10and the connection layer7of the corresponding second substrate11is performed, the second substrate11is stacked on the first substrate10and heat is applied to reflow the solder of the connection layers7, and as a result, the semiconductor device1illustrated inFIG. 1is completed.

As described later, in the semiconductor device according to an embodiment, the first substrate and the second substrate are connected by a stack of three: the first Ni electrode on the first substrate side, the solder connection layer, and the second Ni electrode on the second substrate side.

This reduces the size of the semiconductor device in the thickness direction, in comparison with a general semiconductor device in which stacked substrates are connected five components: a pillar electrode, a barrier layer, a solder layer, a barrier layer, and a pillar electrode.