Semiconductor device having buffer structure for external terminals

A semiconductor device, including a first board, a second board having a plurality of through holes passing therethrough, and a plurality of external terminals that are respectively press-fitted into the plurality of through holes of the second board, one end portion of each external terminal passing through the corresponding through hole and being fixed to a front surface of the first board. The second board is a printed circuit board that further includes, in a top view thereof, a plurality of support regions, each having one of the plurality of through holes formed therein, and a plurality of buffer regions respectively surrounding the plurality of support regions, each buffer region having at least one buffer hole and at least one torsion portion formed therein, the at least one torsion portion being connected to the support region surrounded by each buffer region.

CROSS-REFERENCE TO RELATED APPLICATION

This application is based upon and claims the benefit of priority of the prior Japanese Patent Application No. 2020-008925, filed on Jan. 23, 2020, the entire contents of which are incorporated herein by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The embodiments discussed herein relate to a semiconductor device having buffer structure for external terminals.

2. Background of the Related Art

Semiconductor devices are equipped with semiconductor chips, including power devices, and are used as power converter devices. The power devices referred to here are switching elements, such as IGBTs (Insulated Gate Bipolar Transistors) or power MOSFETs (Metal Oxide Semiconductor Field Effect Transistors).

A semiconductor device of this type includes an insulated circuit board, semiconductor chips, and a printed circuit board. The insulated circuit board includes a ceramic board and a plurality of circuit patterns provided on the ceramic board. The semiconductor chips are mounted on predetermined circuit patterns. Predetermined circuits are formed on the printed circuit board. External terminals are press-fitted into through-holes in the printed circuit board so as to pass through. The external terminals attached to the printed circuit board are joined to the predetermined circuit patterns on the insulated circuit board. A semiconductor device is manufactured by setting this structure in a mold and injecting resin into the mold. Note that various methods are used to attach rod-shaped terminals and the like to boards, such as printed circuit boards (see, for example, Japanese Laid-open Patent Publication No. 2019-161174, International Publication Pamphlet No. WO2014/061211, International Publication Pamphlet No. WO2014/185050, International Publication Pamphlet No. WO2014/192298, and International Publication Pamphlet No. WO2015/151235). One example method of attaching the terminals is to attach terminal pieces via terminal receivers to through-holes in a board (see, for example, Japanese Laid-open Patent Publication No. 2011-114979). Another example method is to attach positioning pins to holes in a ceramic board via thin-walled brass cylinders (see, for example, Japanese Laid-open Patent Publication No. 05-191096).

The components included in a semiconductor device will differ due to dimensional tolerances and assembly tolerances. This means that when external terminals, as one of these components, are press-fitted into a printed circuit board and joined to an insulated circuit board, there is variation in the heights of the external terminals. When an insulated circuit board and the like are set in a mold in a state where there is variation in the heights of the external terminals, any external terminals that protrude more than others will be pressed by the mold. Depending on the pressing force and the pressing direction on the external terminals contacted and pressed by the mold, this may result in deformation of the external terminals. In addition, as the external terminals deform, a load may be applied to and damage the printed circuit board into which the external terminals have been press-fitted. A semiconductor device whose printed circuit board has been damaged in this way is likely to have lower reliability.

SUMMARY OF THE INVENTION

According to an aspect, there is provided a semiconductor device including: a first board; a second board having a plurality of through holes passing therethrough; and a plurality of external terminals that are respectively press-fitted into the plurality of through holes of the second board, one end portion of each external terminal passing through the corresponding through hole and being fixed to a front surface of the first board, wherein the second board is a printed circuit board that further includes, in a top view thereof, a plurality of support regions, each having one of the plurality of through holes formed therein, and a plurality of buffer regions respectively surrounding the plurality of support regions, each buffer region having at least one buffer hole and at least one torsion portion formed therein, the at least one torsion portion being connected to the support region surrounded by each buffer region.

DETAILED DESCRIPTION OF THE INVENTION

Several embodiments will be described below with reference to the accompanying drawings. Note that in the following description, the expressions “front surface” and “upper surface” refer to the surface of a semiconductor device10that faces upward inFIG. 1. In the same way, the expression “up” refers to the upward direction for the semiconductor device10inFIG. 1. The expressions “rear surface” and “lower surface” refer to the surface of the semiconductor device10that faces downward inFIG. 1. In the same way, the expression “down” refers to the downward direction for the semiconductor device10inFIG. 1. These expressions indicate the same directions as needed in the other drawings. The expressions “front surface”, “upper surface”, “up”, “rear surface”, “lower surface”, “down”, and “side surface” are merely convenient expressions used to specify relative positional relationships, and are not intended to limit the technical scope of the present embodiments. As one example, “up” and “down” do not necessarily mean directions that are perpendicular to the ground. That is, the “up” and “down” directions are not limited to the direction of gravity.

First Embodiment

A semiconductor device according to a first embodiment will now be described with reference toFIGS. 1 and 2.FIG. 1is a cross-sectional view of the semiconductor device according to the first embodiment andFIG. 2is a plan view of a printed circuit board included in the semiconductor device according to the first embodiment. Note that the semiconductor device10is rectangular when seen from above.FIG. 1depicts a cross section taken parallel to the length of the semiconductor device10. InFIG. 2, only the upper surface side of the printed circuit board30is depicted. In addition, buffer regions formed around through holes34aand34bof the printed circuit board30have been omitted fromFIG. 2.

As depicted inFIG. 1, the semiconductor device10includes insulated circuit boards20aand20b, semiconductor chips24a1,24a2,24b1, and24b2, a printed circuit board30, external terminals40aand40b, and conductive posts41aand41b. In the semiconductor device10, these components are sealed by a sealing member50. This example semiconductor device10is sealed by the sealing member50so that the rear surfaces of the insulated circuit boards20aand20bare exposed.

The insulated circuit boards20aand20bare disposed side by side in the horizontal direction. The insulated circuit boards20aand20binclude insulating boards21aand21b, metal plates22aand22bprovided on the rear surfaces of the insulating boards21aand21b, and circuit patterns23a1,23a2,23b1, and23b2provided on the front surfaces of the insulating boards21aand21b. The insulating boards21aand21band the metal plates22aand22bare rectangular when seen from above. Corner portions of the insulating boards21aand21band the metal plates22aand22bmay be chamfered into a rounded or beveled shape. When seen from above, the metal plates22aand22bare smaller than the insulating boards21aand21band are formed inside the insulating boards21aand21b. The insulating boards21aand21bare made of a ceramic or insulating resin that has favorable thermal conductivity. Example ceramics include aluminum oxide, aluminum nitride, and silicon nitride. Example insulating resins include a paper phenol board, a paper epoxy board, a glass composite board, and a glass epoxy board. The metal plates22aand22bare made of a metal with superior thermal conductivity. Example metals include aluminum, iron, silver, copper, and an alloy containing at least one of these metals. The thickness of the metal plates22aand22bis at least 0.1 mm but no greater than 4.0 mm. The surfaces of the metal plates22aand22bmay be plated to improve corrosion resistance. When doing so, examples of the plating material include nickel, nickel-phosphorus alloy, and nickel-boron alloy. The circuit patterns23a1,23a2,23b1, and23b2are made of a metal with superior electrical conductivity. Example metals include silver, copper, nickel, and an alloy containing at least one of these metals. The thickness of the circuit patterns23a1,23a2,23b1, and23b2is at least 0.1 mm but no greater than 4.0 mm. The surfaces of the circuit patterns23a1,23a2,23b1, and23b2may be plated to improve corrosion resistance. Examples of the plating material used here include nickel, nickel-phosphorus alloy, and nickel-boron alloy. The circuit patterns23a1,23a2,23b1, and23b2are obtained by forming a metal layer on the front surfaces of the insulating boards21aand21band subjecting the metal layer to processing such as etching. Alternatively, the circuit patterns23a1,23a2,23b1, and23b2may be cut out in advance from a metal layer and then pressure-bonded to the front surfaces of the insulating boards21aand21b. Note that the circuit patterns23a1,23a2,23b1, and23b2depicted inFIG. 1are mere examples. The number, shape, size, and the like of the circuit patterns may be appropriately selected. As examples, DCB (Direct Copper Bonding) boards, AMB (Active Metal Brazed) boards, or resin insulating boards may be used as the insulated circuit boards20aand20bmade of these components.

The semiconductor chips24a1and24b1include switching elements. As examples, the switching elements are IGBTs or power MOSFETs. When the semiconductor chips24a1and24b1are IGBTs, a collector electrode is provided on the rear surface as a main electrode, and a gate electrode and an emitter electrode as a main electrode are provided on the front surface. When the semiconductor chips24a1and24b1are power MOSFETs, a drain electrode is provided on the rear surface as a main electrode, and a gate electrode and a source electrode as a main electrode are provided on the front surface. The rear surfaces of the semiconductor chips24a1and24b1described above are joined to the circuit patterns23a1and23b1by solder (not illustrated). The conductive posts41aand41bare electrically and mechanically connected as appropriate to the main electrodes and the gate electrodes on the front surface of the semiconductor chips24a1and24b1.

The semiconductor chips24a2and24b2include diodes, for example, FWDs (Free Wheeling Diodes) such as SBDs (Schottky Barrier Diodes) or PiN (P-intrinsic-N) diodes. These semiconductor chips24a2and24b2have an output electrode (cathode electrode) as a main electrode on the rear surface and an input electrode (anode electrode) as a main electrode on the front surface. The rear surfaces of the semiconductor chips24a2and24b2are joined to the circuit patterns23a1and23b1by solder (not illustrated). The conductive posts41aand41bare electrically and mechanically connected as appropriate to the main electrodes on the front surfaces of the semiconductor chips24a2and24b2. Note that in place of the semiconductor chips24a1,24a2,24b1, and24b2, it is possible to use an RC (Reverse-Conducting)-IGBT that has the functions of both an IGBT and an FWD. Note here thatFIG. 1merely depicts an example configuration where the semiconductor chips24a1,24a2,24b1, and24b2are provided. The present embodiments are not limited to this configuration, and the number of chip pairs may be provided according to the specification of the semiconductor device10.

Lead-free solder is used as the solder (not illustrated) for joining the semiconductor chips24a1,24a2,24b1, and24b2and the circuit patterns23a1and23b1. As one example, the lead-free solder has at least one of an alloy composed of tin-silver-copper, an alloy composed of tin-zinc-bismuth, an alloy composed of tin-copper, and an alloy composed of tin-silver-indium-bismuth as a main component. The solder may also include additives, such as nickel, germanium, cobalt, or silicon. By including additives, it is possible to improve the wettability, gloss, and bonding strength of the solder, and to improve reliability.

The printed circuit board30is provided so as to face the horizontally arranged insulated circuit boards20aand20b. As depicted inFIG. 2, the printed circuit board30is equipped with an insulating board and a plurality of upper circuit patterns32that are formed on the front surface of the insulating board31. The printed circuit board30also includes a plurality of lower circuit patterns33on the rear surface of the insulating board31(seeFIGS. 4A and 4B). In addition, the printed circuit board30has a plurality of through holes34aand34bthat pass through from the front surface to the rear surface and are formed at predetermined positions. The through holes34aare formed at opposing locations in corner portions of the insulated circuit boards20aand20bof the printed circuit board30. The through holes34bare formed at other locations on the printed circuit board30. Buffer regions (not illustrated) are formed around the through holes34aand34b. These buffer regions will be described in detail later.

The insulating board31is formed as a flat plate and made of an insulating material. As this material, a material obtained by immersing a substrate in resin is used. Examples of the substrate include paper, glass cloth, and glass non-woven fabric. As examples of the resin, phenol resin, epoxy resin, or polyimide resin is used. Specific examples of the insulating board31used here include a paper phenol board, a paper epoxy board, a glass epoxy board, a glass polyimide board, and a glass composite board. The insulating board31is rectangular when seen from above. Corner portions of the insulating board31may be chamfered into a rounded or beveled shape.

The upper circuit patterns32and the lower circuit patterns33have a plurality of pattern shapes so as to form predetermined circuits. As one example, the upper circuit patterns32have a plurality of pattern shapes as depicted inFIG. 2. Although not illustrated, the lower circuit patterns33also have a plurality of pattern shapes. The upper circuit patterns32and the lower circuit patterns33are made of a material with superior conductivity. Example materials include silver, copper, nickel, or an alloy containing at least one of these metals. The surfaces of the upper circuit patterns32and the lower circuit patterns33may be plated to improve corrosion resistance. Examples of the material used in a plating process include nickel, nickel-phosphorus alloy, and nickel-boron alloy.

As one example, the printed circuit board30described above is able to be formed as follows. Metal foil is attached to the front and rear surfaces of the insulating board31and a resist of a predetermined shape is printed on each surface. The metal foil on the front surface and the rear surface of the insulating board31is then etched with the printed resists as masks and the remaining resist is removed. By doing so, the upper circuit patterns32and the lower circuit patterns33are formed on the front surface and the rear surface of the insulating board31, respectively. A hole forming process is then performed at predetermined positions on the laminated structure formed by the insulating board31, the upper circuit patterns32, and the lower circuit patterns33to form the plurality of through holes34aand34band also the buffer regions (seeFIG. 3). The plurality of through holes34a,34band the buffer regions may be plated to improve corrosion resistance. When doing so, as examples, solder plating and electroless gold plating may be performed. A water-soluble flux treatment may also be performed.

The external terminals40aare press-fitted so as to pass through the through holes34ain the printed circuit board30. When doing so, the press-fitting locations are covered with solder. The external terminals40aare electrically connected to the upper circuit patterns32and the lower circuit patterns33of the printed circuit board30. One end of each external terminal40ais joined to a circuit pattern23a1or23a2of the insulated circuit board20ausing solder. Alternatively, openings may be provided at positions on the circuit patterns23a1and23a2of the insulated circuit board20awhere the external terminals40aare to be attached, and one end of each external terminal40amay be joined to these openings using solder. Tube-like contact components may be joined by solder to the positions on the circuit patterns23a1and23a2of the insulated circuit board20awhere the external terminals40aare to be attached, and one end of each external terminal40amay be press-fitted into these contact components. The contact components used in this configuration are made of a material with superior electrical conductivity. As examples, silver, copper, nickel, or an alloy containing at least one of these metals is used as this material. The external terminals40bare press-fitted so as to pass through the through holes in the printed circuit board30. When doing so, the press-fitting locations are covered with solder. The external terminals40bare electrically connected to the upper circuit patterns32and the lower circuit patterns33of the printed circuit board30. One end of each external terminal40bis joined to a circuit pattern23b1or23b2of the insulated circuit board20busing solder. Alternatively, openings may be provided at the positions on the circuit patterns23b1and23b2of the insulated circuit board20bwhere the external terminals40bare to be attached, and one end of each external terminal40bmay be joined to these openings using solder. Tube-like contact components may be joined by solder to the positions on the circuit patterns23b1and23b2of the insulated circuit board20bwhere the external terminals40bare to be attached, and one end of each external terminal40bmay be press-fitted into these contact components. The contact components used in this configuration are made of a material with superior electrical conductivity. As examples, silver, copper, nickel, or an alloy containing at least one of these metals is used as this material. The external terminals40aand40bare shaped as columns that are circular or rectangular in cross section. The external terminals40aand40bare made of a material with superior electrical conductivity. As examples, silver, copper, nickel, or an alloy containing at least one of these metals is used as this material. The surfaces of the external terminals40aand40bmay be plated to improve corrosion resistance. Examples of the material used in a plating process include nickel, nickel-phosphorus alloy, and nickel-boron alloy. The cross-sectional diameter (for a circular cross section) or the lengths of diagonals (for a rectangular cross section) of the external terminals40aand40bare several percent larger than the diameters of the through holes34aand34bin the printed circuit board30. Due to being larger, the external terminals40aare press-fitted into the through holes34aof the printed circuit board30.

The conductive posts41aare press-fitted so as to pass through the through holes34bof the printed circuit board30. When doing so, the press-fitting locations are covered with solder. The conductive posts41aare electrically connected to the upper circuit patterns32and the lower circuit patterns33of the printed circuit board30. One end portion of each conductive post41ais joined to the main electrodes or control electrodes of the semiconductor chips24a1and24a2using solder. The conductive posts41bare press-fitted so as to pass through the through holes34bof the printed circuit board30. When doing so, the press-fitting locations are covered with solder. The conductive posts41bare electrically connected to the upper circuit patterns and the lower circuit patterns33of the printed circuit board30. One end of each conductive post41bis joined to the main electrodes or control electrodes of the semiconductor chips24b1and24b2using solder. The conductive posts41aand41bare shaped as columns that are circular or rectangular in cross section. Also, the conductive posts41aand41bare sufficiently shorter in length than the external terminals40aand40b. The conductive posts41aand41bare made of a material with superior electrical conductivity. As examples, silver, copper, nickel, or an alloy containing at least one of these metals is used as this material. The surfaces of the conductive posts41aand41bmay be plated to improve corrosion resistance. Examples of the material used in a plating process include nickel, nickel-phosphorus alloy, and nickel-boron alloy. The cross-sectional diameter (for a circular cross section) or the lengths of diagonals (for a rectangular cross section) of the conductive posts41aand41bare several percent larger than the diameters of the through holes34bin the printed circuit board30. Due to being larger, the conductive posts41aand41bare press fitted into the through holes34bof the printed circuit board30.

The sealing member50includes a thermosetting resin, such as epoxy resin, phenol resin, or maleimide resin, and a filler that is held within the thermosetting resin. One example of the sealing member50is epoxy resin containing a filler. An inorganic filler is used as the filler. Examples of inorganic fillers include silicon oxide, aluminum oxide, boron nitride, and aluminum nitride. The sealing member50also contains a suitable amount of a release agent. Example release agents include wax-based agents, silicone-based agents, and fluorine-based agents. Note that the semiconductor device10is sealed by the sealing member50so that the metal plates22aand22bof the insulated circuit boards20aand20bare exposed on the rear surface. The metal plates22aand22bmay be flush with the rear surface of the sealing member50or may project outward from the rear surface.

A cooling module (not illustrated) may be attached to the rear surface of the semiconductor device10using solder or silver solder. In this configuration, the cooling module is screwed to attachment holes (not illustrated) of the semiconductor device10. By adding a cooling module, heat dissipation of the semiconductor device10is improved. As one example, the cooling module used in this configuration is made of a metal with superior thermal conductivity. Example metals include aluminum, iron, silver, copper, or an alloy containing at least one of these metals. As the cooling module, a heat sink composed of one or a plurality of fins, a cooling device that uses water cooling, or the like may be used. The surface of the cooling module may be plated to improve corrosion resistance. As examples, the plating material used here may be nickel, nickel-phosphorus alloy, or nickel-boron alloy.

Next, the buffer regions formed around the through holes34aof the printed circuit board30will be described with reference toFIGS. 3, 4A, and 4B.FIG. 3is an enlarged plan view of a through hole in a printed circuit board included in the semiconductor device according to the first embodiment, andFIGS. 4A and 4Bare cross-sectional views of a printed circuit board included in the semiconductor device according to the first embodiment. Note thatFIGS. 4A and 4Bare cross-sectional views taken along the dot-dash lines X1-X1and X2-X2inFIG. 3.

On the printed circuit board30, a buffer region36is formed around each support region35that includes a through hole34a. Each buffer region36surrounds the entire circumference of a support region and has buffer holes36aformed so as to leave torsion portions36bconnected to the support region35.

Each support region35includes a through hole34aformed in a center portion of the support region35and is circular when seen from above. The circular support region35illustrated here is merely one example, and the support region35may be rectangular. The buffer region36is provided concentrically with the support region35. Note however that the buffer region36is not limited to being concentric and it is sufficient for the range of the buffer region36to include the support region35. Four buffer holes36aare formed in a buffer region36at equal intervals around the outer circumference of a support region35. At the buffer holes36a, openings are provided in the upper circuit patterns32by etching, for example, on the outside of each support region35on the printed circuit board30. After this, the buffer holes36athemselves are obtained by providing openings in the insulating board31and the lower circuit patterns33by further etching inside the openings in the upper circuit patterns32. As a result, as depicted inFIGS. 3 and 4A, the insulating board31becomes exposed around the buffer holes36a. Since the upper circuit pattern32is plated, adhesion with the sealing member50, which is used in a subsequent sealing process, is poor. This means that the sealing member50may become detached from the upper circuit patterns32, which may lead to penetration of moisture or the like where the sealing member is detached, lowering the reliability of the semiconductor device10. In the configuration described above, the insulating board31exposed around the buffer holes36ahas sufficient adhesion to the sealing member50. This means that it is possible to prevent a drop in reliability of the semiconductor device10that is sealed by the sealing member50. The through holes34aand the external terminals40aand40bpress-fitted into the through holes34aare soldered together. When doing so, the upper circuit patterns32made of copper or a copper alloy will have poor wettability with solder. This results in a tendency for the solder used to join the through holes34aand the external terminals40aand40bto flow onto and stick to the insulating board31exposed around the buffer holes36a. This makes it possible to reliably solder on the external terminals40aand40b. This effect may be achieved more reliably by increasing the area of the insulating board31that is exposed on the through hole34aside of the periphery of each buffer hole36a. As a result, as described later, a reliable seal will be achieved by the sealing member50, even when the support region35has warped due to a pressing force applied to the external terminals40aand40b.

The torsion portions36bare provided between adjacent buffer holes36aand, as depicted inFIGS. 3 and 4B, connect the support region35to a region outside the buffer region36. This means that the formation positions and number of the torsion portions36bdepend on the size, formation positions, and number of the buffer holes36a. In the illustrated example, the torsion portions36bare connected to the support region35at a total of four positions arranged in the vertical and horizontal directions inFIG. 3. As another example, three buffer holes36amay be formed in the buffer region36at equal intervals around the circumference of the support region35, and the torsion portions36bmay be connected to the support region35at the 0°, 120°, and 240° positions when looking from above. Note that “0°” here indicates the position of the torsion portion36bat the top inFIG. 3. As another example, two buffer holes36amay be formed in the buffer region36at equal intervals around the circumference of the support region35, and the torsion portions36bmay be connected to the support region35at the 0° and 180° positions when looking from above. Alternatively, one buffer hole36amay be formed in the buffer region36around the circumference of the support region35and a torsion portion36bmay be connected to the support region35at only the 0° position described above when looking from above.

It is preferable for each torsion portion36bto have an elastic modulus that allows the torsion portion36bto bend in accordance with the deformation of the support region35and then return to its original position. It is also preferable for all of the torsion portions36bto have substantially the same elastic modulus. To produce torsion portions36bthat satisfy these conditions, appropriate materials need to be selected for the printed circuit board30. In addition, the widths of the torsion portions36b, that is, the lengths left between adjacent buffer holes36a, need to be uniformly machined so that each torsion portion36bhas an appropriate elastic modulus. On the other hand, currents that flow from a support region35or to a support region35will flow through a region of an upper circuit pattern32that corresponds to a torsion portion36b. For this reason, it is preferable for the torsion portions36bto have a certain width that enables electrical conduction while achieving the desired elastic modulus. As one example, this width is preferably at least 15% but no greater than 25% of the diameter of the support region35. The torsion portions36bdepicted inFIG. 3are substantially rectangular when seen from above. The torsion portions36bmay take any shape aside from rectangular so long as the torsion portions36bhave a predetermined elastic modulus and are capable of electrical conduction. As one example, the torsion portions36bmay be trapezoidal when seen from above, with a larger (or smaller) width at the support region35end than at the buffer region36end.

Next, a method of manufacturing the semiconductor device10described above will be described with reference toFIGS. 5 to 8.FIG. 5is a flowchart of a method of manufacturing the semiconductor device according to the first embodiment.FIG. 6depicts the application of solder in the method of manufacturing a semiconductor device according to the first embodiment.FIGS. 7A and 7Bdepict mounting of a printed circuit board and the like in the method of manufacturing a semiconductor device according to the first embodiment.FIG. 8depicts molding in the method of manufacturing a semiconductor device according to the first embodiment.

First, the components used to manufacture the semiconductor device10, that is, the semiconductor chips24a1,24a2,24b1, and24b2, the insulated circuit boards20aand20b, the external terminals40aand40b, the printed circuit board30, the conductive posts41aand41b, solder, and the like, are prepared (step S1). Note that on the insulated circuit boards20aand20b, the buffer regions36are formed in advance for the through holes34aand34b, as depicted inFIGS. 3 and 4A and 4Bfor example.

Next, the external terminals40aand40bare press-fitted into the through holes34aof the printed circuit board30so that one end portion of each external terminal40aand40bpasses through. The conductive posts41aand41bare also press-fitted into the through holes34bof the printed circuit board30so that one end portion of each conductive post41aand41bpasses through. By doing so, the external terminals40aand40band the like are attached to the printed circuit board30(step S2).

Next, the insulated circuit boards20aand20bare disposed at predetermined positions. The semiconductor chips24a1,24a2,24b1, and24b2are then disposed on the upper circuit patterns32of the insulated circuit boards20aand20bvia solder plates (step S3). After this, solder is applied by a dispenser on the main surfaces of the semiconductor chips24a1,24a2,24b1, and24b2and the upper circuit patterns32to which the external terminals40aand40bare to be connected (step S4). Note that the conductive posts41aand41bare connected to the main surfaces of the semiconductor chips24a1,24a2,24b1, and24b2. Accordingly, as depicted inFIG. 6, amounts of solder are applied in keeping with the sizes of the conductive posts41aand41band the external terminals40aand40b.

Next, in step S2, the printed circuit board30to which the conductive posts41aand41band the external terminals40aand40bhave been attached is disposed facing the insulated circuit boards20aand20b. After this, as depicted inFIG. 7A, the conductive posts41aand41band the external terminals40aand40bare moved toward the insulated circuit boards20aand20b. As a result, the printed circuit board30is mounted on the insulated circuit boards20aand20bwith one end portion of each of the conductive posts41aand41band one end portion of each of the external terminals40aand40bimmersed in the solder (step S5). Note that at this time, on the printed circuit board30, solder has been applied to the locations where the conductive posts41aand41band the external terminals40aand40bare press-fitted into the through holes34aand34b. In this state, heating is performed to melt the solder, which then cools and solidifies (step S6). By doing so, the conductive posts41aand41bare connected by solder to the semiconductor chips24a1,24a2,24b1, and24b2. The external terminals40aand40bare also connected by solder to the upper circuit patterns32of the insulated circuit boards20aand20b. Note that the structure configured in this way is hereinafter referred to as the “semiconductor structure10a” as indicated inFIG. 7B.

Next, the semiconductor structure10aconfigured in this way is set in a mold60as depicted inFIG. 8(step S7). The mold60has an upper mold portion61and a lower mold portion62. The upper mold portion61and the lower mold portion62are made of a material with superior thermal resistance. Example materials include composite ceramic materials and carbon. The mold60, which is a combination of the upper mold portion61and the lower mold portion62, has a cavity61a, a locate ring62aprovided between the upper mold portion61and the lower mold portion62, and an injection port61c.

The cavity61ais a housing formed by the upper mold portion61and a lower mold portion62. The cavity61ais provided with terminal housing portions61a1and61b1that accommodate the external terminals40aand40bof the semiconductor structure10a. When the semiconductor structure10ahas been set inside the cavity61a, the external terminals40aand40bare accommodated in the terminal housing portions61a1and61b1. Note that accommodation of the external terminals40aand40bin the terminal housing portions61a1and61b1will be described in detail later. The locate ring62ais used to align the upper mold portion61with the lower mold portion62and is attached to an outermost part of the mold60. The injection port61cis provided in a side portion of the mold60and is a channel for a sealing member in a molten state and passes through to the inside of the cavity61afrom the outside of the mold60.

After the semiconductor structure10ahas been set in this way in the cavity61a, molten sealing member is injected from the injection port61cinto the mold60. The injected sealing member fills the cavity61aand solidifies (step S8). After the sealing member50has sufficiently solidified to seal the semiconductor structure10a, the upper mold portion61and the lower mold portion62are separated (that is, the mold60is opened) (step S9). By doing so, the semiconductor device10depicted inFIG. 1is obtained.

Next, the setting of the semiconductor structure10ain the mold60in step S7above will be described in detail with reference toFIGS. 9A and 9BandFIGS. 10A and 10B.FIGS. 9A and 9Bdepict cracks at the through holes of a printed circuit board that is a comparative example.FIGS. 10A and 10Bdepict cracks at the through holes in a printed circuit board included in a semiconductor device according to the first embodiment. Note that the comparative example inFIGS. 9A and 9Bis a configuration where the buffer regions36described in the first embodiment are not formed. InFIGS. 9A and 9B, components that are the same as in the first embodiment have been assigned the same reference numerals and description thereof is omitted.FIGS. 9A and 9BandFIGS. 10A and 10Bare enlargements of the vicinity of the through hole34a.FIGS. 9A and 10Adepict cases where a crack C has occurred at the through hole34a, andFIGS. 9B and 10Bdepict cases where the crack C that has occurred at the through hole34ahas propagated. Note thatFIGS. 9A and 9BandFIGS. 10A and 10Bhave been simplified and indicate only the reference numerals used in this description.FIGS. 9A and 9BandFIGS. 10A and 10Billustrate example cases of cracking occurring at a through hole34a. This description is not limited to the through holes34aand also applies to the through holes34b.

In step S7inFIG. 5, the semiconductor structure10ais set at a predetermined position on the lower mold portion62, and the upper mold portion61is attached from above. When dimensional tolerances exist for any of the external terminals40aand40b, there will be fluctuations in the heights of the external terminals40aand40bin the semiconductor structure10a. When a semiconductor structure10alike this is covered with the upper mold portion61, one or more of the external terminals40aand40bwill not be properly accommodated in the terminal housing portions61a1and61b1of the upper mold portion61and will be subjected to a pressing force.

The end portions of the external terminals40aand40bare firmly joined with solder to the upper circuit patterns32. In the comparative example, buffer regions36are not formed on the printed circuit board30. For this reason, when one or both of the external terminals40aand40bis/are pressed by the upper mold portion61, the pressed external terminal(s)40aand40bwill deform due to bending or the like. Due to this deformation of the external terminals40aand40b, the vicinity of the through holes34aon the printed circuit board30into which the external terminals40aand40bhave been press-fitted will also deform. As a result, as depicted inFIG. 9Afor example, the crack C will be produced at the through hole34a. When a crack C has been produced, a region including the through hole34aof the printed circuit board30will further deform due to any further deformation or the like of the external terminals40aand40b, so that the crack C will propagate outward from the through hole34a. The through holes34ain particular are provided near edge portions of an upper circuit pattern32as depicted inFIG. 2. This means that a crack C may propagate to extend across the upper circuit pattern32as depicted inFIG. 9B. In this case, electrical conduction by the upper circuit pattern32may be interrupted, which would cause a drop in reliability for the semiconductor device10.

On the other hand, in the first embodiment, a buffer region36is formed around each through hole34a. This means that as described earlier, the support region35of the printed circuit board30, including the through hole34awill warp in accordance with the torsion portions36bthat bend in keeping with any deformation of an external terminal40aor40bthat is pressed by the upper mold portion61. It is therefore possible to reduce damage to the printed circuit board30. In this case, as depicted inFIG. 10A, a crack C may occur at the through hole34a. This crack C produced at the through hole34amay also propagate outward from the through hole34adue to warping of the support region35of the printed circuit board30. However, the first embodiment is configured with the buffer holes36aformed in each buffer region36. Accordingly, propagation of the crack C outward from the through hole34ais blocked by the buffer holes36aas depicted inFIG. 10B. This prevents the crack C from extending across the upper circuit pattern32, so that electrical conductivity by the upper circuit pattern32is maintained. As a result, a drop in reliability of the semiconductor device10is suppressed.

The semiconductor device10described above includes the insulated circuit boards20aand20b, the printed circuit board30with the through holes34athat pass through between the main surfaces, and the external terminals40aand40bthat are press-fitted into the through holes34aso as to pass through the through holes34aand have end portions that are fixed to the front surfaces of the insulated circuit boards20aand20b. The printed circuit board30also includes, on the main surfaces, the support regions35, which include the through holes34aand34b, and buffer regions36where the buffer holes36aare provided as openings so as to leave torsion portions36bthat are connected to the support regions35. The support regions35on the printed circuit board30that include the through holes34awarp in keeping with bending of the torsion portions36bthat accompanies deformation of the external terminals40aand40b. This means that it is possible to reduce the occurrence and scale of damage to the printed circuit board30. With this configuration, even when a crack C is produced at a through hole34a, propagation of the crack C outward from the through hole34ais blocked by the buffer holes36a. This means that a crack C will not extend across an upper circuit pattern32, so that the electrical conductivity of the upper circuit pattern32is maintained. As a result, a drop in the reliability of the semiconductor device10is suppressed.

Next, various forms of the buffer regions36formed around the support regions35that include the through holes34awill be described with reference toFIGS. 11A and 11B.FIGS. 11A and 11Bare enlarged plan views of other through holes formed in a printed circuit board included in the semiconductor device according to the first embodiment. Note thatFIGS. 11A and 11Bdepict different forms of buffer region.

InFIG. 11A, in the same way as the description above, a buffer region36is formed around a support region35which includes a through hole34a. InFIG. 11A, unlike the first embodiment, the upper circuit pattern32is removed in the buffer region36to form four openings, which expose the insulating board31, at equal intervals around the circumference of the support region35. Four buffer holes36aare formed in each of these regions that is an opening in the upper circuit pattern32. The torsion portions36bare located between the adjacent openings in the upper circuit pattern32and connect the support region35and the region outside the buffer region36. In this configuration, one opening or, three or two openings at equal intervals may be formed in the upper circuit pattern32. The torsion portions36bare formed between adjacent openings. The number of buffer holes36aformed within these openings is not limited to four and the shape is not limited to circular, so that any number of buffer holes36amay be provided depending on the openings and the shape may be rectangular, triangular, or elliptical. In the example inFIG. 11A, the exposed areas of the insulating board are wider than the areas inFIG. 3. This improves adhesion with the sealing member50. In addition, the bonding of the external terminals40aand40bto the through holes34aby solder is improved. Accordingly, a reliable seal is achieved by the sealing member50even in a state where a support region35has warped due to deformation of an external terminal40aor40bthat has been pressed.

Also, inFIG. 11B, the buffer region36includes four buffer holes36a, which are formed around a support region35including a through hole34a, and torsion portions36b, which are formed between the adjacent buffer holes36a. The buffer holes36aare formed at equal intervals around the support region35so as to pass through from the front surface to the rear surface of the printed circuit board30. The buffer holes36aare elliptical when seen from above and are formed so that lines that join the centers of the respective ellipses and the center of the through hole34aare perpendicular to the major axes of the ellipses. The insulating board31may be exposed around the buffer holes36ain the same way as inFIG. 3. The width and shape of the torsion portions36bdiffer according to the shape, size, and number of the buffer holes36aand the intervals between the adjacent buffer holes36a. The torsion portions36binFIG. 11Bare mere examples.

Second Embodiment

For this second embodiment, an example where a buffer region is formed on a printed circuit board configured so that an upper circuit pattern32is formed around the through hole34ain the insulating board31will be described with reference toFIGS. 12A and 12BandFIGS. 13A and 13B.FIGS. 12A and 12BandFIGS. 13A and 13Bare enlarged plan views of the through holes in a printed circuit board included in a semiconductor device according to the second embodiment. Note that on the printed circuit boards30inFIGS. 12A and 12BandFIGS. 13A and 13B, one upper circuit pattern32is formed so as to surround a through hole34ain the insulating board31, and upper circuit patterns32may be formed in the upper and lower parts in the drawing so as to be separated from this upper circuit pattern.FIGS. 12A and 13Adepict configurations where the upper circuit pattern32around the through hole34ais circular, andFIGS. 12B and 13Bdepict configurations where the upper circuit pattern32around the through hole34ais square.

InFIG. 12A, the printed circuit board30is equipped with the support region35, which includes the through hole34aand the upper circuit pattern32that is circular and is provided around the through hole34a, and the buffer region36that is formed around the support region35. The buffer region36is substantially rectangular. The buffer region36has rectangular buffer holes36a, which are formed so as to surround the support region35on four sides, and torsion portions36bprovided between adjacent buffer holes36a. InFIG. 12B, the upper circuit pattern32provided around the through hole34ais quadrangular. Note that the shape, number, size, and formation locations of the buffer holes36aillustrated here are mere examples.

InFIG. 13A, the printed circuit board30is equipped with the support region35, which includes the through hole34aand the upper circuit pattern32that is circular and is provided around the through hole34a, and the buffer region36that is formed around the support region35. The buffer region36is circular. The buffer region36has semicircular buffer holes36a, which are formed so as to surround the support region35, and torsion portions36bbetween adjacent buffer holes36a. InFIG. 13B, the upper circuit pattern32provided around the through hole34ainFIG. 13Ais quadrangular. For this reason, the printed circuit board30has a support region35that is rectangular when seen from above and a quadrangular buffer region36that surrounds the periphery of the support region35. Note that the shape, number, size, and formation locations of the buffer holes36agiven here are mere examples.

With the configurations depicted inFIGS. 12A and 12BandFIGS. 13A and 13B, in the same way as the first embodiment, when the external terminals40aand40bare press-fitted into the through holes34aand set in the mold60, a support region35on the printed circuit board30including a through hole34awill warp in accordance with bending of the torsion portions36bas a pressed external terminal40aor40bdeforms. It is therefore possible to reduce damage to the printed circuit board30. Also, even when a crack from the upper circuit pattern32around the through hole34apropagates outward and crosses the support region35, the crack will be blocked by a buffer hole36a. This means that the crack will not cross the insulating board31, which suppresses any drop in withstand voltage.

According to the present embodiments, it is possible to suppress the occurrence of damage to a printed circuit board and to suppress a drop in the reliability of a semiconductor device.