Method of fabricating a semiconductor package

Provided is a method of fabricating a semiconductor package. The method includes providing a package substrate including a pad, mounting a semiconductor chip with a solder ball on the package substrate to allow the solder ball to be disposed on the pad, filling a space between the package substrate and the semiconductor chip with a underfill resin including a reducing agent comprising a carboxyl group, and irradiating the semiconductor chip with a laser to bond the solder ball to the pad, wherein the bonding of the solder ball to the pad comprises changing a metal oxide layer formed on surfaces of the pad and the solder ball to a metal layer by heat generated by the laser.

CROSS-REFERENCE TO RELATED APPLICATIONS

This U.S. non-provisional patent application claims priority under 35 U.S.C. §119 of Korean Patent Application No. 10-2015-0161193, filed on Nov. 17, 2015, the entire contents of which are hereby incorporated by reference.

BACKGROUND

The present disclosure herein relates to a method of fabricating a semiconductor package, and more particularly, to a method of fabricating a semiconductor package having enhanced process reliability.

As a stacked package that has been typically implemented by using a wire bonding technology needs high performance, the development of a 3D package that employs the through silicon via (TSV) technology is being performed. The 3D package is obtained by the vertical stacking of devices having various functions and may implement the expansion of memory capacity, low-power, a high transmission rate, and high efficiency.

SUMMARY

The present disclosure provides a method of fabricating a semiconductor package having enhanced process reliability.

An embodiment of the inventive concept provides a method of fabricating a semiconductor package includes providing a package substrate including a pad, mounting a semiconductor chip with a solder ball on the package substrate to allow the solder ball to be disposed on the pad, filling a space between the package substrate and the semiconductor chip with a underfill resin including a reducing agent comprising a carboxyl group, and irradiating the semiconductor chip with a laser to bond the solder ball to the pad, wherein the bonding of the solder ball to the pad comprises changing a metal oxide layer formed on surfaces of the pad and the solder ball to a metal layer by heat generated by the laser.

In an embodiment, the underfill resin may further include a thermosetting resin and a hardener.

In an embodiment, the heat generated by the lasers may have a temperature of about 130° C. to about 270° C.

In an embodiment, the bonding of the solder ball to the pad may further include applying pressure to the semiconductor chip.

In an embodiment, the laser is irradiated to upper and/or lower portions of the semiconductor chip.

In an embodiment, the laser may have a wavelength of about 500 nm to about 2 μm.

In an embodiment, the method may further include, after the bonding of the solder ball to the pad, forming a first underfill resin on the semiconductor chip to cover a chip pad disposed on an upper surface of the semiconductor chip, mounting a first semiconductor chip with a first solder ball on the semiconductor chip to allow the first solder ball to be disposed in the chip pad, and bonding of the solder ball to the chip pad by using heat generated by a laser irradiated to the first semiconductor chip.

In an embodiment, the method may further include, after the bonding of the solder ball to the pad, forming a first underfill resin on the semiconductor chip to cover a chip pad disposed on an upper surface of the semiconductor chip, mounting a first semiconductor chip with the first solder ball on the semiconductor chip, applying heat to the package substrate to decrease viscosity of the first underfill resin and aligning the first semiconductor chip with the semiconductor chip to allow the first solder ball to be disposed on the chip pad, and bonding of the solder ball to the chip pad by using heat generated by a laser irradiated to the first semiconductor chip.

In an embodiment, the bonding of the first solder ball to the chip pad may include increasing the decreased viscosity of the first underfill resin.

In an embodiment, the heat applied to the package substrate may have a temperature of about 50° C. to about 180° C., and the heat generated by the laser may have a temperature of about 130° C. to about 270° C.

In an embodiment, the method may further include, before the bonding of the solder ball to the pad, providing a laser reflecting layer on an upper surface of the semiconductor chip.

In an embodiment, the laser reflecting layer may include a metal material.

In an embodiment, the method may further include, before the bonding of the solder ball to the pad, forming a bonding layer on an upper surface of the semiconductor layer; and forming an absorbing layer on the bonding layer.

In an embodiment, the changing of the metal oxide layer to the metal layer may include oxidizing the reducing agent by the heat to reduce the metal oxide layer.

Another embodiment of the inventive concept provides a method of fabricating a semiconductor package includes providing a package substrate including a pad, mounting a first semiconductor chip with a first solder ball on the package substrate to allow the first solder ball to be disposed on the pad, filling a space between the package substrate and the first semiconductor chip with a first underfill resin including a reducing agent comprising a carboxyl group, forming a second underfill resin on the first semiconductor chip to cover chip pad disposed on an upper surface of the first semiconductor chip, the second underfill resin comprising a reducing agent comprising a carboxyl group, mounting a second semiconductor chip with a second solder ball on the first semiconductor chip to allow the second solder ball to be disposed on the chip pad, and irradiating to the first and second semiconductor chips with a laser to bond the first solder ball to the pad and the second solder ball to the chip pad together, wherein the bonding of the first solder ball to the pad and the second solder ball to the chip pad together comprises changing a metal oxide layer formed on surfaces of the second solder ball and the chip pad to a metal layer by heat generated by the laser.

In an embodiments of the inventive concept, the reducing agent may be glutaric acid, malic acidazelaic acid, abietic acid, adipic acid, ascorbic acid, acrylic acid or citric acid.

In an embodiment, the laser may have a wavelength of about 500 nm to about 2 μm.

DETAILED DESCRIPTION

The advantages and features of the present disclosure, and implementation methods thereof will be clarified through the following embodiments described with reference to the accompanying drawings. The present disclosure may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to make this disclosure complete and fully convey the scope of the present disclosure to a person skilled in the art. Further, the present disclosure is only defined by the scopes of claims. The same reference numerals throughout the disclosure refer to the same components.

The terms used herein are only for explaining embodiments, not limiting the present disclosure. The terms in a singular form in the disclosure also include plural forms unless otherwise specified. The terms used herein “comprises” and/or “comprising” do not exclude the presence or addition of one or more additional components, steps, operations and/or devices other than the components, steps, operations and/or devices that are mentioned.

Also, embodiments in the present disclosure are described with reference to ideal, exemplary cross-sectional views and/or plan views of the present disclosure. The thicknesses of layers and regions in the drawings are exaggerated for the effective description of technical content. Thus, the forms of exemplary views may vary depending on fabrication technologies and/or tolerances. Thus, embodiments of the present disclosure are not limited to shown specific forms and also include variations in form produced according to manufacturing processes. For example, an etch region shown in a rectangular shape may have a round shape or a shape having a certain curvature. Thus, regions illustrated in the drawings are exemplary, and the shapes of the regions illustrated in the drawings are intended to illustrate the specific shapes of the regions of devices and not to limit the scope of the present disclosure.

FIGS. 1A, 1C, and 1E to 1Gare cross sectional views of a method of fabricating a semiconductor package according to an embodiment of the present disclosure.FIG. 1Bis an enlarged view of portion A ofFIG. 1A.FIG. 1Dis an enlarged view of portion B ofFIG. 1C.

Referring toFIG. 1A, a package substrate100is provided which includes a pad102. The pad102may be disposed on an upper surface of the package substrate100. The package substrate100may be a printed circuit board (PCB), a silicon substrate or an interposer substrate. The pad102may include underbump metallization (UBM), such as copper (Cu) or gold (Au).

A first semiconductor chip110may be mounted on the package substrate100. Mounting the first semiconductor chip110on the package substrate100may include disposing a first solder ball113, which is disposed on a lower surface of the first semiconductor chip110, on the pad102. Thus, the first solder ball113and the pad102may be in contact with each other. The first solder ball113may be bonded to a lower pad112that is disposed on the lower surface of the first semiconductor chip110. The lower pad112may include underbump metallization (UBM), such as copper (Cu) or gold (Au). The first solder ball113may include tin (Sn), indium (In), tin bismuth (SnBi), tin silver copper (SnAgCu), tine silver (SnAg), gold tin (AuSn), indium tin (InSn), or bismuth indium tin (BiInSn) The first solder ball113may have a size of about 1 μm to about 300 μm.

As shown inFIG. 1B, metal oxide layers120may be formed on some surfaces of the pad102, the lower pad112, and the first solder ball113that are exposed to the air. The metal oxide layers120may be formed by the combination of metal ions in the pad102, the lower pad112and the first solder ball113, with an oxygen ion in the air

The first semiconductor chip110may include a via114passing through the first semiconductor chip110, and an upper pad116disposed on an upper surface of the first semiconductor chip110. The via114may electrically connect the lower pad112and the upper pad116or may connect the lower and upper pads112and116to a device (not shown) in the first semiconductor chip110The via114may be a through silicon via (TSV). The first semiconductor chip110may include a digital device, a radio frequency (RF)/analog device, a sensor/MEMS device, a power semiconductor or a bio device. The first semiconductor chip110may have a thickness of about 5 μm to about 1 mm.

A dielectric layer118may be formed on the upper surface of the first semiconductor chip110. The dielectric layer118may be formed to expose the upper pad116.

A first underfill resin130may be formed between the package substrate100and the first semiconductor chip110. For example, the first underfill resin130may fill an empty space between the package substrate100and the first semiconductor chip110. Accordingly, the first underfill resin130may be in contact with the surfaces of the pad102, the lower pad112, and the first solder ball113. The first underfill resin130may have a certain viscosity in order to fill the empty space. For example, the first underfill resin130may be a non conductive film (NCF) or a non-conductive paste (NCP). The first underfill resin130may be formed to have a thickness of about 2 μm to about 100 μm.

The first underfill resin130may include a thermosetting resin, a reducing agent, and a hardener. The thermosetting resin may include e.g., a Bisphenol A-type epoxy resin (e.g., diglycidyl ether of brominated bisphenol-A (DGEBA), a tetrafunctional epoxy resin (e.g., tetraglycidyl diarmine diphenyl methane (TGDDM)), isocyanate, bismaleimide, a silicon-based resin or acryl resin. The reducing agent may be acid including a carboxyl group COO. For example, the reducing agent may include glutaric acid, malic acid, azelaic acid), abietic acid, adipic acid, ascorbic acid, acrylic acid or citric acid. The hardener is a material that may cause a curing reaction with the thermosetting resin. For example, the hardener may include carboxyl group COOH— or amino group —NH.

Referring toFIG. 1C, a laser140may be irradiated to the first semiconductor chip110. The laser140may be irradiated to the upper and/or lower part of the first semiconductor chip110. Some of the laser140may be absorbed into the first semiconductor chip110, the first solder ball113, and the pad102to be changed to heat. The heat may be transferred to the first solder ball113and the pad102to bond the first solder ball113and the pad102. In addition, the first underfill resin130may be cured due to the heat. The laser140may be e.g., a helium-neon laser, an argon laser, an ultra violet (UV) laser, an infrared laser or excimer laser. The laser140may have a wavelength of about 500 nm to about 2 μm. The heat generated by the laser140may have the temperature of the melting point of a solder ball to a 100° C. higher temperature than the melting temperature of the solder ball. In particular, the heat generated by the laser140may have a temperature of about 130° C. to about 270° C. The temperature may vary according to an amount of irradiation of the laser140and/or an intensity of irradiation of the laser140.

By the heat generated by the laser140, the reducing agent of the first underfill resin130may be oxidized, and the metal oxide layers120on some surfaces of the pad102, the first solder ball113, and the lower pad112may be reduced. The reduction of the metal oxide layer120may include changing the metal oxide layer120to a metal layer125. In particular, the metal layer125formed on the surface of the pad102may include the same material as a metal material in the pad102, the metal layer125formed on the surface of the first solder ball113may include the same material as a metal material in the first solder ball113, and the metal layer125formed on the surface of the lower pad112may include the same material as a metal material in the lower pad112. Thus, as shown inFIG. 1D, the metal oxide layers120may be removed from some surfaces of the pad102, the first solder ball113, and the lower pad112.

In the processes ofFIGS. 1E and 1Fto be described below, the same components as those inFIGS. 1A and 1Care not described in detail.

Referring toFIG. 1E, a second underfill resin230may be formed on the upper surface of the first semiconductor chip110. The second underfill resin230may be formed to cover the upper pad116. The second underfill resin230may include a thermosetting resin, a reducing agent, and a hardener.

A second semiconductor chip210may be mounted on the first semiconductor chip110. Mounting the second semiconductor chip210on the first semiconductor chip110may include disposing a second solder ball213, which is disposed on a lower surface of the the second semiconductor chip210, on the upper pad116. Thus, the second solder ball213and the upper pad116may be in contact with each other and the second underfill resin230may cover the surfaces of the second solder ball213and the upper pad116.

Before the second semiconductor chip210is mounted on the first semiconductor chip110, the metal oxide layers120(seeFIG. 1B) that are obtained by the combination of the metal ions of the upper pad116and the second solder ball213with an oxygen ion in the air may be formed on the surfaces of the upper pad116and the second solder ball213.

Referring toFIG. 1F, a laser240may be irradiated to the second semiconductor chip210. The laser240may be irradiated to the upper and/or lower part of the second semiconductor chip210. Some of the laser240may be absorbed into the second semiconductor chip210, the upper pad116, and the second solder ball213to be changed to heat. The heat may be transferred to the second solder ball213and the upper pad116to bond the second solder ball213and the upper pad116. In addition, the second underfill resin230may harden due to the heat. In this case, the reducing agent in the second underfill resin230may be oxidized and the metal oxide layers120(seeFIG. 1B) formed on the surfaces of the upper pad116and the second solder ball213may be reduced. Thus, the metal oxide layer120may be changed to the metal layer125(seeFIG. 1D).

Referring toFIG. 1G, by repeating the processed as described inFIGS. 1A, 1C, 1E and 1F, a third underfill resin330, a third semiconductor chip310, a fourth underfill resin430, and a fourth semiconductor chip410are sequentially formed on the second semiconductor chip210to fabricate a semiconductor package1000.

FIGS. 2A to 2Care cross-sectional views of a method of fabricating a semiconductor package according to an embodiment of the present disclosure. For the simplicity of description, in embodiments ofFIGS. 2A and 2B, substantially the same components as those in embodiments ofFIGS. 1A to 1Guse the same reference numerals, and descriptions of corresponding components are omitted.

Referring toFIG. 2A, the first semiconductor chip110may be mounted on the package substrate100. Mounting the first semiconductor chip110on the package substrate100may include disposing the first solder ball113, which is disposed on the lower surface of the first semiconductor chip110, on the pad102that is disposed on the upper surface of the package substrate100. Thus, the first solder ball113and the pad102may be in contact with each other. The metal oxide layer120(seeFIG. 1B) may be formed on some of the surfaces of the first solder ball113and the pad102.

The first underfill resin130may be formed between the package substrate100and the first semiconductor chip110. The first underfill resin130may fill an empty space between the package substrate100and the first semiconductor chip110. The first underfill resin130may include a thermosetting resin, a reducing agent, and a hardener.

The second semiconductor chip230may be disposed onr the first semiconductor chip110. The second underfill resin230may cover a first upper pad116aon the upper surface of the first semiconductor chip110. The second underfill resin230may include a thermosetting resin, a reducing agent, and a hardener.

The second semiconductor chip210may be mounted on the first semiconductor chip110. Mounting the second semiconductor chip210on the first semiconductor chip110may include disposing a second solder ball213, which is disposed on the lower surface of the second semiconductor chip210, on a first upper pad116athat is disposed on the upper surface of the first semiconductor chip110. Thus, the second solder ball213and the first upper pad116amay be in contact with each other and the second underfill resin230may cover the surface of the second solder ball213. The metal oxide layer120(seeFIG. 1B) may be formed on some of the surfaces of the second solder ball213and the first upper pad116a.

The third underfill resin330may be formed on the second semiconductor chip210. The third underfill resin330may cover a second upper pad116bdisposed on the upper surface of the second semiconductor chip210. The third underfill resin330may include a thermosetting resin, a reducing agent, and a hardener.

The third semiconductor chip310may be mounted on the second semiconductor chip210. Mounting the third semiconductor chip310on the second semiconductor chip210may include disposing the third solder ball313, which is disposed the lower surface of the third semiconductor chip310, on the second upper pad116bthat is disposed on the upper surface of the second semiconductor chip210. Thus, the third solder ball313and the second upper pad116bmay be in contact with each other and the third underfill resin330may cover the surface of the third solder ball313. The metal oxide layer120(seeFIG. 1B) may be formed on some of the surfaces of the third solder ball313and the second upper pad116b.

The fourth underfill resin430may be formed on the third semiconductor chip310. The fourth underfill resin430may cover a third upper pad116cdisposed on the upper surface of the third semiconductor chip310. The third underfill resin330may include a thermosetting resin, a reducing agent, and a hardener.

The fourth semiconductor chip410may be mounted on the third semiconductor chip310. Mounting the third semiconductor chip410on the third semiconductor chip310may include disposing the fourth solder ball413, which is disposed on the lower surface of the fourth semiconductor chip410, on the third upper pad116cthat is disposed on the upper surface of the third semiconductor chip310. Thus, the fourth solder ball413and the third upper pad116cmay be in contact with each other and the fourth underfill resin430may cover the surface of the fourth solder ball413. The metal oxide layer120(seeFIG. 1B) may be formed on some of the surfaces of the fourth solder ball413and the third upper pad116c.

Referring toFIG. 2B, the laser340may be irradiated to the first to fourth semiconductor chips110to410stacked on the package substrate100. The laser430may be irradiated to the upper part of the fourth semiconductor chip410and/or the lower part of the first semiconductor chip110. Some portion of the laser340may be absorbed into the first to fourth semiconductor chips110to410, the first to fourth solder balls113to413, and the pads102,112, and116ato116cto be changed to heat. The heat may bond the pad102to the first solder ball113, the first upper pad116ato the second solder ball213, the second upper pad116bto the third solder ball313, and the third upper pad116cto the fourth solder ball413. In addition, due to the heat, the first to fourth underfill resins130to430may be cured. In addition, the heat may oxidize the reducing agents in the first to fourth underfill resins (130,230,330,430) and reduce the metal oxide layer120(seeFIG. 1B) formed on some of the surfaces of the pad102, the first to third upper pads116a,116b,116c, and the first to fourth solder balls113,213,313,413. That is, the metal oxide layer120(seeFIG. 1B) may be changed to the metal layer125(seeFIG. 1D).

As another example, a quartz block B may be provided on the fourth semiconductor chip410while irradiating the first to fourth semiconductor chips110,210,310,410with the laser340as shown inFIG. 2C. By using the quartz block B, it is possible to apply pressure to the first to fourth semiconductor chips110,210,310,410. The quartz block B may prevent the warpage of the first to fourth semiconductor chips110,210,310,410that have a small thickness during the process.

FIGS. 3A to 3Care cross-sectional views of a method of fabricating a semiconductor package according to an embodiment of the present disclosure. For the simplicity of description, in embodiments ofFIGS. 3A to 3C, substantially the same components as those in embodiments ofFIGS. 1A to 1GandFIGS. 2A and 2Buse the same reference numerals, and descriptions of corresponding components are omitted.

Referring toFIG. 3A, the first to fourth semiconductor chips110to410may be sequentially stacked on the package substrate100. The first underfill resin130may be formed between the package substrate100and the first semiconductor chip110, the second underfill resin230may be formed between the first semiconductor chip110and the second semiconductor chip210, the third underfill resin330may be formed between the second semiconductor chip210and the third semiconductor chip310, and the fourth underfill resin430may be formed between the third semiconductor chip310and the fourth semiconductor chip410.

As shown inFIG. 3A, the third solder ball313of the third semiconductor chip310may be in contact with a dielectric layer218formed on the second semiconductor chip210without a contact with the second upper pad116bof the second semiconductor chip210. That is, the third solder ball313and the second upper pad116bmay be misaligned to each other. As a result, the first to fourth semiconductor chips110,210,310,410may not be stacked on the package substrate in a line in terms of a cross-sectional view. As an example, the third and fourth semiconductor chips310and410may be twisted from the first and second semiconductor chips110and210.

Referring toFIG. 3B, it is possible to apply heat to the package substrate100. The heat may be transferred to the first to fourth underfill resins130,230,330,430. The heat may have a temperature of about 50° C. to about 180° C. The temperature ranged from about 50° C. to about 180° C. may decrease the viscosity of the first to fourth underfill resins130,230,330,430.

As the viscosity of the first to fourth underfill resins130,230,330,430decreases, the first to fourth underfill resins130,230,330,430may have mobility. That is, the first to fourth semiconductor chips110,210,310,410may move to the left and right on the surfaces on which they are placed. In this case, the third solder ball313that is in contact with the dielectric218on the upper surface of the second semiconductor chip210may be in contact with the second upper pad116bto decrease surface tension. Thus, the third semiconductor chip310may move so that the third solder ball313is disposed on the second upper pad116b. As a result, the first to fourth semiconductor chips110,210,310,410may be stacked on the package substrate in a line in terms of a cross-sectional view.

Referring toFIG. 3C, a laser440may be irradiated to the first to fourth semiconductor chips110to410stacked on the package substrate100. The laser440may be irradiated to the upper part of the fourth semiconductor chip410and/or the lower part of the first semiconductor chip110. Some portion of laser440may be absorbed into the first to fourth semiconductor chips110,210,310,410, the first to fourth solder balls113,213,313,413, and the pads102,112, and116ato116cto be changed to heat. The heat may bond the pad102to the first solder ball113, the first upper pad116ato the second solder ball213, the second upper pad116bto the third solder ball313, and the third upper pad116cto the fourth solder ball413.

The heat generated by the laser440may have a temperature of about 130° C. to about 270° C. The temperature ranged from about 130° C. to about 270° C. may be a temperature that may causes curing reactions to the first to fourth underfill resins130,210,310430. Thus, the first to fourth underfill resins130,230,330,430may be hardened, and the first to fourth semiconductor chips110,201,310,410may be fixed in a stacked state in a line on the package substrate100.

FIGS. 4A and 4Bare cross-sectional views of a method of fabricating a semiconductor package according to an embodiment of the present disclosure. For the simplicity of description, in embodiments ofFIGS. 4A and 4B, substantially the same components as those in embodiments ofFIGS. 1A to 1Guse the same reference numerals, and descriptions of corresponding components are omitted.

Referring toFIG. 4A, the first and second semiconductor chips110and210may be sequentially stacked on the package substrate100. In addition, the first underfill resin130may be formed between the package substrate100and the first semiconductor chip110, and the second underfill resin230may be formed between the first semiconductor chip110and the second semiconductor chip210.

A laser absorbing layer LA may be provided on the second semiconductor chip210. The laser absorbing layer LA may bond to the upper surface of the second semiconductor chip210by a bonding layer700. The laser absorbing layer LA may be e.g., a silicon layer, a metal layer, or a carbon steel layer. The bonding layer700may be a bonding film having good thermal conductivity and include e.g., polyethylene terephthalate (PET) or polycarbonate (PC).

The laser540may be irradiated to the first and second semiconductor chips110and210. The laser540may be irradiated to the upper part of the laser absorbing layer LA and/or the lower part of the first semiconductor chip. Some portion of the laser540may be absorbed into the laser absorbing layer LA. The laser540that is not absorbed into the laser absorbing layer LA may be absorbed into the first and second semiconductor chips110and120, the first and second solder balls113and213, and the pads102and116to be changed to heat. The heat may bond the first solder ball113to the pad102, and the second solder ball213to the upper pad116.

The devices in the first and second semiconductor chips110and210may generally be damaged by the laser540and thus cause an error or malfunction. According to the embodiment, the laser absorbing layer LA may absorb some portion of the laser540so that they do not arrive at the devices. Thus, the characteristic of the device does not vary due to the laser540.

FIG. 4B, the laser absorbing layer LA may be removed after a laser process ends. The laser absorbing layer LA may be removed through the detachment of the bonding layer700by chemical or physical application to the bonding layer700.

FIG. 5is a cross-sectional view of a method of fabricating a semiconductor package according to an embodiment of the present disclosure. For the simplicity of description, in embodiments ofFIG. 5, substantially the same components as those in embodiments ofFIGS. 4A and 4Buse the same reference numerals, and descriptions of corresponding components are omitted.

Referring toFIG. 5, a laser reflecting layer800may be disposed on the second semiconductor chip210. The laser reflecting layer800may be disposed locally on portions of the first and second semiconductor chips110and210in which laser-sensitive devices are disposed. Thus, the laser reflecting layer800may reflect a laser so that the laser is not transferred directly to the device. The laser reflecting layer800may include a metal material (e.g., copper (Co) or aluminum (Al)).

The laser640may be irradiated to the first and second semiconductor chips110and210having the laser reflecting layer800. The laser640may be irradiated to some regions of the semiconductor chips on which the laser reflecting layer800is not disposed, and changed to heat. The heat generated by the laser640may bond the first solder ball113to the pad102, and the second solder ball213to the upper pad116. After the laser process is performed, the laser reflecting layer800may not be removed.

FIG. 6is a cross-sectional view of a method of fabricating a semiconductor package according to an application of the present disclosure.

Referring toFIG. 6, a first substrate3000may be provided. The first substrate3000may be e.g., a PCB or silicon substrate. A semiconductor chip4000may be mounted on the first substrate3000. Specifically, it is possible to mount a semiconductor chip4000on the first substrate3000such that chip solder balls4200bonded on a lower surface of the semiconductor chip4000are disposed on pads3100that are disposed on an upper surface of the first substrate3000.

A first underfill resin3200may be formed between the first substrate3000and the semiconductor chip4000. The first underfill resin3200may fill an empty space between the first substrate3000and the semiconductor chip4000. The first underfill resin3200may include a thermosetting resin, a reducing agent, and a hardener.

Connections (ST) may be disposed on an edge portion of the first substrate3000that is the circumference of the central portion of the first substrate3000. The connections ST may include a body part5000, lower solder balls5300bonded on a lower surface of the body part5000, chip pads5400disposed on the upper surface of the body part5000, and vias5500passing through the body part5000to connect the lower solder balls5300and the chip pads5400. The connections ST may be disposed on the first substrate3000such that the lower solder balls5300are disposed on the pads3100of the first substrate3000. The body part5000may include a dielectric material or copper clad laminate (CCL). The lower solder balls5300may include a conductive material (e.g., tin (Sn)). The vias5500may be TSVs.

A second underfill resin5700may be formed between the connections ST and the first substrate3000. The second underfill resin5700may fill an empty space between the first substrate3000and the connections ST. The second underfill resin5700may be formed together when the first underfill resin3200is formed or through a separate process after the first underfill resin3200is formed. The second underfill resin5700may include the same material as the first underfill resin3200.

A third underfill resin5900may be formed on the connections ST. The third underfill resin5900may cover the upper surfaces of the connections ST. The third underfill resin5900may include the same material as the second underfill resin5700.

A second substrate6000may be mounted on the connections ST. The second substrate6000may be mounted on the connections ST such that top solder balls6200bonded a lower surface of the second substrate6000are disposed on the chip pads5400. Thus, the surface of the top solder balls6200may be covered with the third underfill resin5900.

The second substrate6000may be an interposer substrate. The second substrate6000may include a laser reflecting layer7000. For example, the laser reflecting layer7000may be disposed in the second substrate6000. The laser reflecting layer7000may include a metal material (e.g., copper (Co) or aluminum (Al)).

Laser740may be irradiated to the first substrate3000, the connections ST, and the second substrate6000. The heat generated by the laser740may bond the pads3100to the chip solder balls4200, the pads3100to the lower solder balls5300, and the chip pads5400to the top solder balls6200. The laser reflecting layer7000in the second substrate6000may reflect some of the laser740such that the laser740may not be irradiated directly to devices in the semiconductor chip4000.

The method of fabricating the semiconductor package of the present disclosure may include bonding the pad to the solder ball by using the heat generated by the laser. In this case, the heat may oxidize the reducing agent in the underfill resin and reduce the metal oxide layers on the surfaces of the pad and the solder ball. Thus, since the metal oxide layer is changed to a metal layer, the metal oxide layers on the surfaces of the solder ball and the pad may be removed.

While embodiments of the present disclosure are described with reference to the accompanying drawings, a person skilled in the art may understand that the present disclosure may be practiced in other particular forms without changing technical spirits or essential characteristics. Therefore, embodiments described above should be understood as illustrative and not limitative in every aspect.