High Operating Temperature Quantum Dot Infrared Detector

Methods and systems for electromagnetic detection are disclosed, including providing a high operating temperature quantum dot infrared photodetector comprising: a substrate; a bottom contacting layer atop the substrate; one or more active regions atop the bottom contacting layer; and a top contacting layer atop the one or more active regions; and exposing the high operating temperature quantum dot infrared photodetector to electromagnetic waves. Other embodiments are described and claimed.

DETAILED DESCRIPTION

One or more embodiments of the invention are described below. It should be noted that these and any other embodiments are exemplary and are intended to be illustrative of the invention rather than limiting. While the invention is widely applicable to different types of systems, it is impossible to include all of the possible embodiments and contexts of the invention in this disclosure. Upon reading this disclosure, many alternative embodiments of the present invention will be apparent to persons of ordinary skill in the art.

Achieving high operating temperatures, such as room temperature at 298 K, for infrared photodetector cameras and detection systems has the benefit of a reduction of overall size, weight, and power consumption since cryogenic cooling is no longer required. By eliminating the cooling requirements, the overall reliability of the system is also enhanced.

In order to achieve high operating temperature infrared detection, it is necessary to reduce the dark current of the detector. One way of achieving dark current reduction in a quantum dot infrared photodetector is by the use of a barrier layer within the active region of the quantum dot. The barrier layer is integral to each layer of the active region. With such a design, it is possible to achieve high operating temperature infrared detection.

FIG. 1is a cross-sectional schematic diagram illustrating a high operating temperature quantum dot infrared photodetector, in accordance with some embodiments.

In some embodiments, the quantum dot infrared photodetector (QDIP)100comprises ten layers of vertically stacked Active Regions110, including barrier layers within each active region layer, sandwiched between a Top Contacting Layer115and a Bottom Contacting Layer120, which is all grown atop a GaAs substrate105. Each Active Region110layer comprises a 1 nm In0.15Ga0.85As bottom well layer125atop a 0.72 monolayer (ML) InAs floating layer126, a 0.6 ML InAs quantum dot (QD) layer130atop a 0.69 ML InAs wetting layer131, a 1 nm In0.15Ga0.85As top well layer135, and a 2 nm Al0.10Ga0.90As dark current blocking barrier layer140sandwiched between a 60 Å bottom GaAs spacer layer141and a 450 Å top GaAs spacer layer142. The Top Contacting Layer115comprises a silicon doped (n+) 100 nm GaAs contact layer (n=1018cm−3)116atop a 150 nm GaAs buffer layer117. The Bottom Contacting Layer120comprises a silicon doped (n+) 300 nm GaAs contact layer (n=1018cm−3)121sandwiched between a 300 nm bottom GaAs buffer layer122and a 100 nm top GaAs buffer layer123. Electrodes145are used to make electrical connections to the QDIP. Other concentration ratios for AlGaAs and InGaAs are possible, for the barrier layer and well layers, respectively.

FIG. 2is a simplified energy band diagram of one layer of the active region of a high operating temperature quantum dot infrared photodetector, in accordance with some embodiments.

FIG. 2illustrates a simplified energy band diagram of one layer of the active region of the QDIP ofFIG. 1. The left side of the band diagram illustrates the GaAs layer223of the Bottom Contacting Layer, followed by the InAs QD230sandwiched between the bottom In0.15Ga0.85As well225and the top In0.15Ga0.85As well235. Next, the Al0.10Ga0.90As dark current blocking barrier layer240is sandwiched between the bottom GaAs spacer layer241and the top GaAs spacer layer242. The Al0.10Ga0.90As dark current blocking barrier layer240has the highest energy band level of the QDIP.

FIG. 3shows the detailed growth parameters for a high operating temperature quantum dot infrared photodetector, in accordance with some embodiments.

In some embodiments, the high operating temperature quantum dot infrared photodetector is grown atop a GaAs substrate in a V80H molecular beam epitaxy system. Processing begins at Step 1, an interrupt stage, where the GaAs substrate is brought to 580° C. under an Arsenic (As) environment. Next, processing steps 2-4 grow the bottom contacting layer. At Step 2, a 3000 Å GaAs bottom buffer layer is grown for 2,122.39 seconds at a total growth rate of 0.5 monolayers per second (ML/sec). At Step 3, a 3000 Å silicon doped GaAs contact layer is grown with doping silicon at 1,153.8° C. for 2,122.39 seconds at a total growth rate of 0.5 ML/sec. At Step 4, a 1000 Å GaAs top buffer layer is grown for 707.46 seconds at a total growth rate of 0.5 ML/sec. After the bottom contacting layer is grown, the substrate is allowed to cool to 495° C. under As for 600 seconds at interrupt Step 5. After the substrate has cooled, processing steps 6-14 grow the active region layers. Steps 6-14 are repeated ten times in this embodiment. At Step 6, a 0.72 ML InAs floating layer is grown for 8.14 seconds at a total growth rate of 0.089 ML/sec. At Step 7, a 10 Å In0.15Ga0.85As well layer is grown for 5.88 seconds at a total growth rate of 0.589 ML/sec. At Step 8, a 0.69 ML InAs wetting layer is grown for 7.8 seconds at a total growth rate of 0.089 ML/sec. At Step 9, a 0.6 ML silicon doped InAs QD layer is grown with doping silicon at 1,147.8° C. for 6.78 seconds at a total growth rate of 0.089 ML/sec. Afterwards, growth is paused for 5 seconds under an Arsenic flux at interrupt Step 10. At Step 11, a 60 Å In0.15Ga0.85As cap layer is grown for 35.31 seconds at a total growth rate of 0.589 ML/sec. At Step 12, a 60 Å GaAs bottom spacer layer is grown for 42.45 seconds at a total growth rate of 0.5 ML/sec. At Step 13, a 20 Å Al0.10Ga0.90As dark current blocking barrier layer is grown for 12.74 seconds at a total growth rate of 0.556 ML/sec. At Step 14, a 450 Å GaAs top spacer layer is grown for 318.36 seconds at a total growth rate of 0.5 ML/sec. After the active region layers are grown, the substrate is heated up to 580° C. under As for 600 seconds at interrupt Step 15. Next, processing steps 16 and 17 grow the top contacting layer. At Step 16, a 1500 Å GaAs buffer layer is grown for 1061.2 seconds at a total growth rate of 0.5 ML/sec. Finally, at Step 17, a 1000 Å silicon doped GaAs contact layer is grown with doping silicon at 1,153.8° C. for 707.46 seconds at a total growth rate of 0.5 ML/sec. After completion of steps 1-17, the substrate is cooled under an Arsenic flux.

FIG. 4illustrates the dark current reduction of the high operating temperature quantum dot infrared photodetector, in accordance with some embodiments.

The Al0.10Ga0.90As barrier layer grown in Step 13 of the detailed growth parameters ofFIG. 3reduces the dark current across a broad range of bias voltages.FIG. 4shows the dark current in amps versus bias voltage for a QDIP at 77 K with an Al0.10Ga0.90As barrier layer and without an Al0.10Ga0.90As barrier layer. With the Al0.10Ga0.90As barrier layer, the dark current is reduced by up to nearly eight orders of magnitude compared to the QDIP without the Al0.10Ga0.90As barrier layer. Additionally, the QDIP with the Al0.10Ga0.90As barrier layer exhibits a relatively flat dark current across a broad range of bias voltages.

FIG. 5illustrates the basic fabrication steps of a focal plane array of the high operating temperature quantum dot infrared photodetector, in accordance with some embodiments.

After the processing of the detailed growth parameters for a high operating temperature quantum dot infrared photodetector ofFIG. 3, the grown sample (a) is processed into a focal plane array. First, from (a) to (b), photoresist is spun coat onto the grown sample. From (b) to (c), the photoresist is photolithographically patterned into an array of 640 by 512 which results in the pixels of the QDIP. From (c) to (d), the sample is wet etched down to the substrate. Afterwards, the photoresist is removed in going from (d) to (e). Next, the electrodes to the pixels of the QDIP are fabricated. From (e) to (f), photoresist is spun coat onto the wet etched sample. From (f) to (g), the photoresist is photolithographically patterned into electrodes for the pixels of the QDIP. From (g) to (h), an N-type (Ni(50 Å)/Ge(170 Å)/Au(330 Å)/Ni(150 Å)/Au(3000 Å)) alloy is deposited onto the sample by the standard E-beam metal evaporation deposition. Afterwards, from (h) to (j), a lift-off procedure is done to remove the excess deposited metal alloy. Then, from (j) to (k), the sample undergoes a rapid thermal annealing. Finally, Indium bumps are placed atop each metal contact electrode in a similar metal evaporation deposition and lift-off process as the electrodes.

FIG. 6is a schematic illustration of the focal plane array of the high operating temperature quantum dot infrared photodetector, in accordance with some embodiments.

After the processing steps ofFIG. 5, a 640 by 512 focal plane array results. Each of the 327,680 pixels comprises a 23 μm by 23 μm mesa. The mesas have a center to center spacing of 25 μm, a 13.4 μm by 13.4 μm metal contact, and a 5.0 μm by 5.0 μm Indium bump. The center to center spacing of 25 μm is illustrated inFIG. 6from the equivalent edges of adjacent pixels n(1,1) and n(2,1).

FIG. 7is a schematic illustration of the flip chip hybridization process of the focal plane array of the high operating temperature quantum dot infrared photodetector with a readout integrated circuit, in accordance with some embodiments.

Using a flip chip hybridization process, the fabricated focal plane array (FPA) fromFIG. 5is press bound with a readout integrated circuit (ROIC). After hybridization, an epoxy is used to fill in the spaces between the focal plane array and the ROIC. In order to reduce the stress due to the mismatched coefficients of thermal expansion between the ROIC and the FPA, the GaAs substrate105fromFIG. 1may be mechanically removed from the FPA.

FIG. 8is a photograph of the focal plane array of the high operating temperature quantum dot infrared photodetector mounted in a leadless ceramic chip carrier, in accordance with some embodiments.

The completed FPA device is shown in an approximately 3 cm by 3 cm leadless ceramic chip carrier. The device may then to be used to image in the infrared at high operating temperatures.

FIG. 9is an image from the focal plane array of the high operating temperature quantum dot infrared photodetector, in accordance with some embodiments.

The device ofFIG. 8is used to image in the middle wave infrared (MWIR) at 300 K. Using a MWIR lens, a frame rate of 15 Hz, a bias of 10 mV, and an integration time of 22.14 ms, the flame from a propane torch is imaged. The image of the propane torch flame is shown inFIG. 9.

FIG. 10is a block diagram illustrating a method for high operating temperature quantum dot infrared photodetection, in accordance with some embodiments.

In some embodiments, the method illustrated inFIG. 10may be performed by one or more of the devices illustrated inFIGS. 1-9. Processing begins at1000whereupon, at block1005, one or more high operating temperature QDIPs is provided. At block1010, incident optical radiation is concentrated over each of the one or more high operating temperature QDIPs. Processing subsequently ends at1099.