Wiring board having a connecting pad area which is smaller than a surface plating layer area

A wiring board has predetermined numbers of wiring layers and insulating layers among the respective wiring layers. The wiring board has an external connecting pad and a surface plating layer for connecting to an external circuit is arranged on the external connecting pad. An area of an external connecting pad is smaller than an area of a surface plating layer thereof.

This application claims priority to Japanese Patent Application No. 2007-143340, filed May 30, 2007, in the Japanese Patent Office. The Japanese Patent Application No. 2007-143340 is incorporated by reference in its entirety.

Technical Field

The present disclosure relates to a wiring board and its fabricating method. More specifically, the present disclosure relates to a wiring board provided with a pad for mounting a semiconductor element or the like on one face and provided with a pad for connecting to other mounting board on the other face.

Related Art

A wiring board used for forming a semiconductor element, other electronic part or the like onto a package is provided with a pad for mounting the semiconductor element, the electronic part or the like on one face and provided with a pad for connecting to other mounting board on the other face. Surfaces of the external connecting pads are provided with surface plating layers for connecting to the semiconductor element or the like and bonding to a solder bump used for connecting to the mounting board. The surface plating layer is formed by thinly plating nickel (Ni), gold (Au) or the like from a side of the pad.

FIG. 13shows an example of an external connecting pad in a wiring board fabricated by a normal build up technology. An external connecting pad101of the drawing is formed by a conductive material of copper (Cu) or the like on an insulating layer102on an outermost side of the wiring board, and connected to a pad104formed at one end of a wiring103of a lower layer by way of a via105penetrating the insulating layer102at a position in correspondence with the external connecting pad101. A topmost surface of the wiring board is provided with a solder resist layer106, and the solder resist layer106is arranged with an opening portion107for exposing a portion of an upper face of the external connecting pad101. A surface plating layer108is arranged at the exposed upper face of the external connecting pad101.

There is a method of fabricating a wiring board without using a core substrate for alternately forming wiring layers and insulating layers on both faces of the core substrate by a build up technology. This method includes forming firstly a first external connecting pad (which will be a pad on one face side of the wiring board) along with a surface plating layer on a support member of a copper plate or the like, forming insulating layers and wiring layers by necessary numbers thereon by a build up technology, successively forming a second external connecting pad (which will be a pad on the other face side of the wiring board), thereafter, removing the support member (for example, Patent Reference 1).

FIG. 14shows an example of an external connecting pad on one face side (formed first on a support member) of a wiring board fabricated by the method. One side of an external connecting pad121is covered by a surface plating layer122, and a surface of the surface plating layer122is exposed to a surface of an insulating layer123on an outermost side. The external connecting pad121is connected to a pad126provided at one end of a wiring125of a lower layer by way of a via124penetrating the insulating layer123. An external connecting pad on the other face side of the wiring board is similar to that explained in reference toFIG. 13.

According to the external connecting pad101of the wiring board of the related-art explained in reference toFIG. 13, the opening portion107is formed at the solder resist layer106formed by covering an entire face of the wiring board after forming the external connecting pad101to expose a portion of the external connecting pad101for connecting to a semiconductor element or an external circuit. Therefore, the external connecting pad101needs to be formed to be larger than the opening portion107of the solder resist layer106to hamper miniaturization in wiring.

Further, since the external connecting pad101is formed to be large, an amount of a resin present between the external connecting pad101and the pad104of a lower layer wiring (in details, a resin present between vertical broken lines, a lower face of the pad101, an upper face of the pad104, and side faces of the via105) is large, and a connection reliability of the via may be deteriorated by a stress brought about by heating and shrinking the resin.

In a case of external connecting pad121of a wiring board of the related-art explained in reference toFIG. 14, the above-described problem can be resolved. However, the surface plating layer122and the pad121there below are provided with the same size, and therefore, as shown byFIG. 15, a crack131generated by a stress between the surface plating layer122and the insulating layer123is liable to permeate an inner portion of the insulating layer123along a side face of the pad121to be liable to cause a deterioration in a function of the wiring board.

SUMMARY

Exemplary embodiments of the present invention provide a wiring board having an external connecting pad on one face side, which does not hamper miniaturization of wirings, is capable of maintaining a connection reliability of a via and difficult to cause a deterioration in a function of the wiring board.

A wiring board of the invention is a wiring board comprising:

an insulating layer;

a wiring layer provided on one face side of the insulating layer;

an external connecting pad provided on the other face side of the insulating layer;

a surface plating layer formed on the external connecting pad, for connecting to an external circuit,

wherein an area of the external connecting pad is smaller than an area of the surface plating layer.

The wiring board of the invention can be fabricated by a method of fabricating a wiring board, comprising steps of:

forming a surface plating layer on a support member and forming an external connecting pad on the surface plating layer formed on the support member;

processing the external connecting pad to make the area of the external connecting pad smaller than the area of the surface plating layer;

forming an insulating layer and a wiring layer on a surface of the support member formed where the external connecting pad is formed; and

a step of removing the support member by etching.

Preferably, processing of making the area of the external connecting pad smaller than the area of the surface plating layer is carried out by etching.

According to the invention, there can be provided a wiring board including an external connecting pad on one face side, which is advantageous for miniaturization of a wiring, capable of maintaining a connection reliability of a via and useful also for restraining a deterioration in a function of the wiring board.

Other features and advantages maybe apparent from the following detailed description, the accompanying drawings and the claims.

DETAILED DESCRIPTION

A characteristic of a wiring board of the invention resides in that an area of an external connecting pad at one face side of the wiring board is smaller than an area of a surface plating layer thereof.

FIG. 1shows an external connecting pad1of the invention. The pad1includes a surface plating layer2on a side for connecting to an external circuit, and the pad1is formed such that a size (area) thereof is made to be smaller than a size (area) of the surface plating layer2. For an object of the invention, the smaller the size of the pad1, the better. However, a lower limit of size of the pad1depends on an accuracy in view of a fabricating step which is made to be necessary for ensuring bonding with a via3connected to a wiring4at inside of the wiring board. On the other hand, a size of the surface plating layer2mounted to the pad1depends on a size of a bump (not illustrated) connected thereto. An actual size of the pad1needs to be determined in consideration thereof. Taking an example, in a standard board, an interval in a horizontal direction between an outer peripheral portion of the pad1and an outer peripheral portion of the surface plating layer2(a dimension designated by notation A ofFIG. 1) can be constituted by about 0.1 through 5 μm, preferably, about 1 through 3 μm. InFIG. 1, the via3is actually disposed at a position in correspondence with the pad1and connected to the wiring4by way of a pad5connected to one end of the wiring4. The external connecting pad1, the surface plating layer2, the via3, the wiring4, and the pad5connected to the wiring4are present at inside of an insulating layer7except upper face of the surface plating layer2.

In a case of the related-art explained previously in reference toFIG. 13, the size of the opening portion107of the solder resist layer106communicating with the pad101for connecting to the external circuit rectifies the size of the plating layer108disposed there and depends on the size of the bump connected thereto. The pad101needs to be formed to be larger than the opening portion107, that is, larger than the surface plating layer from a necessity of forming the solder resist layer106covering the pad101and thereafter forming the opening portion107at the layer.

In contrast thereto, in the case of the invention, the external connecting pad1is made to be smaller than the surface plating layer2. Therefore, according to the wiring board of the invention, the wiring can be miniaturized and an amount of resin present between the external connecting pad1and the pad5, that is, an amount of resin present between vertical broken lines, a lower face of the pad1, an upper face of the pad5, and a side face of the via3shown inFIG. 1is made to be smaller than that in the case of the related-art explained in reference toFIG. 13, and a connection reliability of the via caused by a stress in accordance with heating and shrinking the resin can also be maintained.

In the case of the related-art previously explained in reference toFIG. 14, as shown byFIG. 15, there poses a problem that the crack131generated owing to the stress between the surface plating layer122and the insulating layer123is liable to permeate inside of the insulating layer123along the side face of the pad121to be liable to cause a deterioration in the function of the wiring board.

In contrast thereto, in the case of the invention, as shown byFIG. 2, a crack9generated between the surface plating layer2and the insulating layer7is stopped to a location of being propagated along a side face of the surface plating layer2and is not propagated so deeply into the insulating layer7. Thereby, the problem of the deterioration in the function of the wiring board by the crack is avoided.

According to the invention, ‘external circuit’ indicates a circuit which is disposed at outside of a wiring board and to which the wiring board is connected. For example, as ‘external circuit’ according to the invention, a circuit of an electronic part of a semiconductor element or the like connected to a wiring board, a circuit of a mounting board connected with a wiring board mounted with such a semiconductor element or the like can be pointed out.

Materials of respective members constituting the wiring board of the invention may be similar to materials of equivalent members in a normal wiring board. For example, as a material of an external connecting pad, a general wiring material of copper (Cu) or an alloy thereof can be pointed out. As a material of a surface plating layer provided on an external connecting pad, (1) a combination of Ni and Au, (2) a combination of Ni and Pd and Au, (3) Sn, (4) a combination of Sn and Ag or the like can be pointed out. In cases of the respective combinations of (1), (2), (4), plating layers are successively formed such that an Au layer or an Ag layer is exposed to outside.

The wiring board of the invention can be fabricated by a method of forming firstly an external connecting pad (which will be a pad on one face side of the wiring board) on a support member comprising a metal of a copper plate, a copper foil or the like along with a surface plating layer, forming predetermined numbers of insulating layers and wiring layers thereon by a build up method, successively, forming an external connecting pad (which will be a pad on the other face side) and thereafter, removing the support member, at that occasion, there is carried out a processing of making a size of the external connecting pad smaller than that of the surface plating layer before forming the first insulating layer by the build up method.

According to the wiring board fabricated in this way, whereas the external connecting pad formed first on the support member becomes a pad smaller than the size of the surface plating layer, the external connecting pad at the other face side becomes larger than the surface plating layer. Mainly, the former pad can be used for mounting an electronic part of a semiconductor element or the like on a wiring board and the latter pad can be used for connecting to a mounting board. However, depending on cases, a way of use inverse thereto can be carried out.

EXAMPLES

Next, the invention will be explained further by examples. However, the invention is not limited to the examples shown here.

According to the example, an explanation will be given of a wiring board in which an external connecting pad on a face of mounting a semiconductor element is smaller than a surface plating layer along with the fabricating method.

As shown byFIG. 3A, a plating resist pattern32is formed on a surface of a Cu plate constituting a support member31. As the support member31, other than the Cu plate, a Cu foil or a plate or a foil of a metal or an alloy capable of being removed by a normal etching solution can be utilized. As shown byFIG. 3B, a surface plating layer33and an external connecting pad34are successively formed on the Cu plate exposed to a bottom portion of an opening portion32a(FIG. 3A) (diameter 100 μm) of the plating resist pattern32by an electroless plating. In this case, the surface plating layer33is formed by an Au layer and an Ni layer respectively having thicknesses of 0.5 μm and 5 μm (the Au layer and the Ni layer are formed in this order). The external connecting pad34is formed by a thickness of 10 μm by Cu.

Next, the plating resist pattern32is exfoliated to remove, the external connecting pad34is selectively etched and a diameter thereof is made to be smaller than that of the surface plating layer33by about 1 through 3 μm (FIG. 3C). The selective etching of the external connecting pad34may be carried out before exfoliating the plating resist pattern32(in selectively etching of the external connecting pad34in this case, as shown byFIG. 12A), the resist pattern32is removed after etching the external connecting pad34by an etching solution for dissolving only Cu (FIG. 12B). Successively, as shown byFIG. 3D, an insulating layer35is formed by forming a resin film on a face of the support member31where the external connecting pad34is formed. In forming the insulating layer35, a resin film of epoxy, polyimide or the like can be used.

As shown byFIG. 4A, a via hole35ais formed at the insulating layer35by laser machining. According to the via hole35a, a diameter thereof is 60 μm at a surface of the insulating layer35and becomes about 50 μm at a bottom portion of exposing the pad34. Successively, a via36connected to the pad34and a wiring layer37connected to the via36are formed (FIG. 4B). For example, a normal method of a semi additive method or the like can be utilized therefor.

Successively, by repeating to form insulating layers and form via and wiring layers, as shown byFIG. 4C, predetermined numbers of the insulating layer35and the wiring layer37are formed, and an external connecting pad38is formed at the topmost insulating layer35, thereafter, a solder resist layers39having an opening portion39acommunicating with a pad38is formed. Further, a surface plating layer40is formed on the pad38exposed at the opening portion39aby electroless plating. As shown byFIG. 4D, the support member31is removed by etching and the wiring board30is completed. A face of the completed wiring board30removing the support member31becomes a semiconductor element mounting face.

FIG. 5shows the wiring board30mounted with a semiconductor element41. The semiconductor element41is connected to the wiring board30by a solder bonding member42by making a bump reflow.

Here, an explanation will be given of an example of constituting a semiconductor element mounting face by a face reverse to that of the wiring board of example 1.

There is formed an intermediate product formed with a surface plating layer52, an external connecting pad53, an insulating layer54, a via55, and a wiring layer56on a support member51of a Cu plate as shown byFIG. 6Aby the method explained in reference toFIGS. 3A through 3DandFIGS. 4A,4B in example 1. An external connecting pad57is formed at a portion of a wiring of the wiring layer56. Successively, as shown byFIG. 6B, a solder resist layer58having an opening portion58acommunicating with the pad57is formed and a surface plating layer59is formed on the pad57exposed at the opening portion58aby electroless plating. A wiring board50is completed by removing the support member51by etching (FIG. 6C).

FIG. 7shows the wiring board50mounted with a semiconductor element61. The semiconductor element61is connected to the wiring board50by wire bonding. A sealing resin60is formed on the wiring board50to cover the semiconductor element61.

Further, the support member can also be removed after mounting the semiconductor element on the wiring board before removing the support member51(wiring board in a state shown inFIG. 6B).

Although in the above-described examples, an explanation has been given of the wiring board in which an outer side face of the surface plating layer formed to be larger than the external connecting pad is disposed on a plane the same as that of the insulating layer, there can be constituted also a wiring board in which a surface plating layer is recessed from a surface of an insulating layer, or the surface plating layer is projected from the surface of the insulating layer. Next, an example of such a wiring board will be explained.

Here, an explanation will be given of a wiring board in which a surface plating layer is recessed from a surface of an insulating layer. A method of fabricating such a wiring board is basically similar to that explained in the previous examples, and therefore, an explanation will be given centering on a step of forming a structure in which a surface plating layer is recessed from a surface of an insulating layer.

First, as shown byFIG. 8A, a plating resist pattern72having an opening portion72ais formed at a surface of a Cu plate constituting a support member71, and on the support member71exposed at a bottom portion of the opening portion72a, a plating layer73of Cu of a material the same as that of the support member71is formed. Successively, a surface plating layer74comprising an Au layer and an Ni layer and an external connecting pad75of Cu are successively formed as shown byFIG. 8Bsimilarly by an electroless plating.

The plating resist pattern72is exfoliated to remove and the external connecting pad75is selectively etched to make a diameter thereof smaller than that of the surface plating layer74(FIG. 8C). Selective etching of the external connecting pad75may be carried out before exfoliating the plating resist pattern72. Next, as shown byFIG. 8D, an insulating layer76is formed by laminating a resin film on a face of the support member71where the external connecting pad75is formed.

Thereafter, by using the steps explained in reference toFIGS. 4A through 4Din example 1, a wiring board78shown inFIG. 9is completed. According to the wiring board78, in removing the support member71by etching, the plating layer73of a material the same as that of the support member71is removed along there with and the surface plating layer74is constituted by a structure recessed from the surface of the insulating layer76.

According to the wiring board78, the surface plating layer74is disposed at the portion recessed from the surface of the insulating layer76, and therefore, a solder ball for connecting to an external circuit can stably be mounted thereto.

Here, an explanation will be given of a wiring board in which a surface plating layer is projected from a surface of an insulating layer. Also a method of fabricating such a wiring board is basically similar to that explained in the previous examples, and therefore, an explanation will be given centering on a step of forming a structure in which a surface plating layer is projected from a surface of an insulating layer.

As shown byFIG. 10A, a plating resist pattern82having an opening portion82ais formed on a surface of a Cu plate constituting a support member81, and a recessed portion83is formed by etching a portion of the support member81exposed at a bottom portion of the opening portion82aby constituting a mask by the pattern. Next, as shown byFIG. 10B, a surface plating layer84comprising an Au layer and a Ni layer is formed to fill the recessed portion83by electric plating, and an external connecting pad85is formed by electroless plating of Cu.

The plating resist pattern82is removed, the external connecting pad85is selectively etched, and a diameter thereof is made to be smaller than that of the surface plating layer84(FIG. 10C). Selective etching of the external connecting pad85may be carried out before removing the plating resist pattern82. Successively, as shown byFIG. 10D, an insulating layer86is formed by laminating a resin film on a face formed with the external connecting pad85.

Thereafter, by using the steps explained in reference toFIGS. 4A through 4Din example 1, a wiring board88in which the surface plating layer84is projected from a surface of the insulating layer86is completed as shown byFIG. 11.

According to the wiring board88, the surface plating layer84per se includes a wide width portion projected from the insulating layer86and a narrow width portion embedded to the insulating layer86, a section thereof is constituted by a stepped shape, and therefore, a crack can further be prevented from being generated. Further, by projecting the surface plating layer84, an amount of a solder (solder bonding member) in mounting a semiconductor element can be reduced and a bonding height of the semiconductor element can be stabilized.