Semiconductor device and method of manufacturing the same, electronic device and method of manufacturing the same, and electronic instrument

A semiconductor device including: a semiconductor substrate in which an integrated circuit is formed; an insulating layer formed on the semiconductor substrate and having a first surface and a second surface which is higher than the first surface; a first electrode formed to avoid the second surface and electrically connected to the inside of the semiconductor substrate; and a second electrode formed on the second surface and electrically connected to the inside of the semiconductor substrate.

Japanese Patent Application No. 2003-115891, filed on Apr. 21, 2003, is hereby incorporated by reference in its entirety.

BACKGROUND OF THE INVENTION

The present invention relates to a semiconductor device, a method of manufacturing the semiconductor device, an electronic device, a method of manufacturing the electronic device, and electronic instrument.

A face down bonding is known as a mounting form for a semiconductor chip. This mounting form is used on the premise that the semiconductor chip is mounted in a region without a level difference. Therefore, it is difficult to mount a semiconductor chip in a region with a level difference while preventing occurrence of a connection failure.

BRIEF SUMMARY OF THE INVENTION

According to a first aspect of the present invention, there is provided a semiconductor device comprising:

a semiconductor substrate in which an integrated circuit is formed;

an insulating layer formed on the semiconductor substrate and having a first surface and a second surface which is higher than the first surface;

a first electrode formed to avoid the second surface and electrically connected to the inside of the semiconductor substrate; and

a second electrode formed on the second surface and electrically connected to the inside of the semiconductor substrate.

According to a second aspect of the present invention, there is provided an electronic device comprising:

the above semiconductor device;

a support member which includes a first support surface and a second support surface lower than the first support surface;

a first interconnecting pattern formed on the first support surface; and

a second interconnecting pattern formed on the second support surface, wherein:

the first electrode of the semiconductor device faces and is electrically connected to the first interconnecting pattern; and

the second electrode of the semiconductor device faces and is electrically connected to the second interconnecting pattern.

According to a third aspect of the present invention, there is provided an electronic device comprising the above semiconductor device.

According to a fourth aspect of the present invention, there is provided an electronic instrument comprising the above electronic device.

According to a fifth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising:

forming an insulating layer having a first surface and a second surface which is higher than the first surface on a semiconductor substrate in which an integrated circuit is formed;

forming a first electrode electrically connected to the inside of the semiconductor substrate to avoid the second surface; and

forming a second electrode electrically connected to the inside of the semiconductor substrate on the second surface.

According to a sixth aspect of the present invention, there is provided a method of manufacturing an electronic device, comprising:

mounting the semiconductor device as defined in claim1on a support member which includes a first support surface and a second support surface lower than the first support surface, wherein:

a first interconnecting pattern is formed on the first support surface;

a second interconnecting pattern is formed on the second support surface; and

in the mounting step, the first electrode of the semiconductor device is disposed to face the first interconnecting pattern to be electrically connected, and the second electrode of the semiconductor device is disposed to face the second interconnecting pattern to be electrically connected.

According to a seventh aspect of the present invention, there is provided a method of manufacturing an electronic device, comprising:

disposing the first electrode of the semiconductor device as defined in claim1to face a first interconnecting pattern formed on a first substrate to be electrically connected; and

disposing the second electrode of the semiconductor device to face a second interconnecting pattern formed on a second substrate to be electrically connected; and

attaching the first substrate to the second substrate so that an electrical connection portion of the first interconnecting pattern with the first electrode overlaps the second substrate.

DETAILED DESCRIPTION OF THE EMBODIMENTS

An objective of the embodiments of the present invention is to enable mounting in a region with a level difference.

(1) According to a first embodiment of the present invention, there is provided a semiconductor device comprising:

a semiconductor substrate in which an integrated circuit is formed;

an insulating layer formed on the semiconductor substrate and having a first surface and a second surface which is higher than the first surface;

a first electrode formed to avoid the second surface and electrically connected to the inside of the semiconductor substrate; and

a second electrode formed on the second surface and electrically connected to the inside of the semiconductor substrate.

Since the first and second electrodes are formed on the surfaces at different heights, the semiconductor device can be mounted in a region with a level difference.

(2) The semiconductor device may further comprise a bump formed on at least one of the first and second electrodes.

(3) In the semiconductor device, the first and second electrodes may be formed so as not to be electrically connected to the outside of the semiconductor substrate.

(4) In the semiconductor device, the insulating layer may include a first insulating layer formed on the semiconductor substrate and having the first surface, and a second insulating layer formed on the first insulating layer and having the second surface.

(5) In the semiconductor device, the second insulating layer may be formed at a position close to one of end portions of the semiconductor substrate.

(6) In the semiconductor device, a plurality of pads electrically connected to the inside of the semiconductor substrate may be formed on the semiconductor substrate; and the semiconductor device may further comprise an interconnecting line which electrically connects one of the pads to the second electrode.

(7) In the semiconductor device, one of the pads may be the first electrode.

(8) The semiconductor device may comprise a plurality of the first electrodes, wherein at least one of the first electrodes is formed on the first surface.

(9) According to a second embodiment of the present invention, there is provided an electronic device comprising:

the semiconductor device as defined in claim1;

a support member which includes a first support surface and a second support surface lower than the first support surface;

a first interconnecting pattern formed on the first support surface; and

a second interconnecting pattern formed on the second support surface, wherein:

the first electrode of the semiconductor device faces and is electrically connected to the first interconnecting pattern; and

the second electrode of the semiconductor device faces and is electrically connected to the second interconnecting pattern.

This semiconductor device includes the first and second electrodes formed on the surfaces at different heights, and is mounted in a region with a level difference (or the first and second support surfaces).

(10) In the electronic device,

the support member may include first and second substrates which overlap each other to provide an overlapping region;

the first support surface may include a surface of the first substrate opposite to the second substrate and within the overlapping region; and

the second support surface may include a surface of the second substrate on the side of the first substrate and outside the overlapping region.

(11) According to a third embodiment of the present invention, there is provided an electronic device comprising the above semiconductor device.

(12) According to a fourth embodiment of the present invention, there is provided an electronic instrument comprising the above electronic device.

(13) According to a fifth embodiment of the present invention, there is provided a method of manufacturing a semiconductor device, comprising:

forming an insulating layer having a first surface and a second surface which is higher than the first surface on a semiconductor substrate in which an integrated circuit is formed;

forming a first electrode electrically connected to the inside of the semiconductor substrate to avoid the second surface; and

forming a second electrode electrically connected to the inside of the semiconductor substrate on the second surface.

Since the first and second electrodes are formed on the surfaces at different heights, the semiconductor device can be mounted in a region with a level difference.

(14) According to a sixth embodiment of the present invention, there is provided a method of manufacturing an electronic device, comprising:

mounting the semiconductor device as defined in claim1on a support member which includes a first support surface and a second support surface lower than the first support surface, wherein:

a first interconnecting pattern is formed on the first support surface;

a second interconnecting pattern is formed on the second support surface; and

in the mounting step, the first electrode of the semiconductor device is disposed to face the first interconnecting pattern to be electrically connected, and the second electrode of the semiconductor device is disposed to face the second interconnecting pattern to be electrically connected.

Since the first and second electrodes of the semiconductor device are formed on the surfaces at different heights, the semiconductor device can be mounted in a region with a level difference (or the first and second support surfaces).

(15) According to a sixth embodiment of the present invention, there is provided a method of manufacturing an electronic device, comprising:

disposing the first electrode of the semiconductor device as defined in claim1to face a first interconnecting pattern formed on a first substrate to be electrically connected; and

disposing the second electrode of the semiconductor device to face a second interconnecting pattern formed on a second substrate to be electrically connected; and

attaching the first substrate to the second substrate so that an electrical connection portion of the first interconnecting pattern with the first electrode overlaps the second substrate.

According to this method of manufacturing an electronic device, a level difference is formed by allowing the first substrate to overlap the second substrate. However, since the first and second electrodes of the semiconductor device are formed on the surfaces at different heights, it is possible to deal with the level difference.

The embodiments of the present invention are described below with reference to the drawings.FIG. 1is illustrative of a semiconductor device according to one embodiment of the present invention, and is a cross-sectional view taken along the line I—I shown inFIG. 2.FIG. 2is a plan view illustrating the semiconductor device according to the embodiment of the present invention.

The semiconductor device includes a semiconductor substrate10(semiconductor chip or semiconductor wafer). An integrated circuit12is formed in the semiconductor substrate10. In the case where the semiconductor substrate10is a semiconductor wafer, a plurality of integrated circuits12are formed in the semiconductor substrate10.

A plurality of pads14are formed on the semiconductor substrate10. The pads14are electrically connected to the inside of the semiconductor substrate10. The pads14may be part (or ends) of interconnecting lines electrically connected to the integrated circuit12. The pads14may be disposed in the peripheral (or end) portions of the surface of the semiconductor substrate10. The pads14may be formed along four sides or two sides of the surface of the semiconductor substrate10, for example. The pad14is formed of Al, for example. Although not illustrated inFIG. 1, the pad14may be formed so as to overlap the integrated circuit12.

An insulating layer20(electrical insulating layer in more detail) is formed on the semiconductor substrate10. The insulating layer20may include first and second insulating layers22and24. The first insulating layer22may be a passivation film. The first insulating layer22may be formed only of a material other than a resin (SiO2or SiN, for example), or may include a resin layer. An opening which exposes a part (center, for example) of the pad14is formed in the first insulating layer22. Specifically, the first insulating layer22is formed to avoid at least the center of the pad14. The first insulating layer22may be placed on the end portions of the pad14.

The second insulating layer24is formed on the first insulating layer22. The second insulating layer24may be formed of a resin such as a polyimide resin, silicone-modified polyimide resin, epoxy resin, silicone-modified epoxy resin, benzocyclobutene (BCB), or polybenzoxazole (PBO). The second insulating layer24may be formed only of a material other than a resin (SiO2or SiN, for example). The second insulating layer24may have elastic deformation properties (or a stress relaxation function). The second insulating layer24may be formed in a region of a part of the first insulating layer22. The second insulating layer24may be formed at a position close to one of end portions of the semiconductor substrate10(semiconductor chip or a region of a semiconductor wafer which becomes one semiconductor chip), for example. At least a part (only a part, for example) of the second insulating layer24may be formed in a region which overlaps the integrated circuit12. The second insulating layer24may have an inclined side surface.

The insulating layer20has first and second surfaces26and28. The second surface28is formed to be higher than the first surface26with respect to the semiconductor substrate10. The first surface26may be the surface (upper surface) of the first insulating layer22. The second surface28may be the surface (upper surface) of the second insulating layer24.

The semiconductor device includes first and second electrodes32and34. The first and second electrodes32and34may not be electrically connected outside the semiconductor substrate10. The first electrode32is formed to avoid the second surface28. The first electrode32shown inFIG. 1is the pad14. The first electrode32is electrically connected with the inside of the semiconductor substrate10(integrated circuit12, for example). A bump36may be formed on the first electrode32. The first electrodes32may be rearranged (pitch-converted) on the first insulating layer22. The first electrodes32may be arranged in a plurality of columns. In the case where the first electrodes32are arranged in a plurality of columns, the first electrodes32may be disposed in a staggered arrangement.

The second electrode34is formed on the second surface28. Therefore, the second electrode34is formed at a position higher than the first electrode32. In the example shown inFIG. 2, since the second electrodes34are disposed in a staggered arrangement, the pitch can be increased. The second electrodes34may be disposed in a single column. A bump38may be formed on the second electrode34. The bumps36and38may be formed of the same material. The bumps36and38may be formed of solder, Ni, Au, Cr, Al, or the like. The bumps36and38may be formed by a plurality of layers.

The second electrode34is electrically connected with the inside of the semiconductor substrate10(integrated circuit12, for example). The pad14may be electrically connected with the second electrode34through an interconnecting line40. The interconnecting line40is formed from the pad14so as to extend to the second surface28. The interconnecting line40may pass over the first surface26.

FIGS. 3A to 4Care illustrative of a method of manufacturing the semiconductor device according to one embodiment of the present invention. As shown inFIG. 3A, the insulating layer20(first and second insulating layers22and24, for example) having the first surface26and the second surface28higher than the first surface26is formed on the semiconductor substrate10. In the case where the semiconductor substrate10is a semiconductor wafer, the second insulating layer24is formed in the region which becomes the semiconductor chip. The second insulating layer24is formed in the region which overlaps the integrated circuit12. The second insulating layer24may be formed by patterning (etching, for example) an insulating layer (resin layer, for example) formed on the semiconductor substrate10(entire surface of the semiconductor substrate, for example).

As shown inFIG. 3B, a single-layer or multilayer conductive film50is formed. The conductive film50may be formed by using a TiW film and a Cu film formed on the TiW film, for example. The conductive film50may be formed by sputtering. The conductive film50may be formed over the entire first and second surfaces26and28.

As shown inFIG. 3C, a first resist layer52(resin layer, for example) is formed on the conductive film50so as to exclude the regions of the first and second electrodes32and34. In the case of forming the interconnecting line40(seeFIG. 2), the first resist layer52is formed to exclude the region of the interconnecting line40. A resist layer formed on the conductive film50(entire surface of the conductive film50, for example) may be patterned by using a photolithographic step and the like.

As shown inFIG. 3D, a first metal layer54(Cu layer, for example) is formed on the surface of the conductive film50exposed from the first resist layer52by electroplating using the conductive film50as an electrode. The first metal layer54may be formed by electroless plating. The first resist layer52is then removed.

As shown inFIG. 4A, the conductive film50is etched by using the first metal layer54as a mask. The second electrode34and the interconnecting line40can be formed by this step. The second electrode34is formed on the second surface28. Note that the pad14is the first electrode32in this embodiment.

As shown inFIG. 4B, a second resist layer56(resin layer, for example) is formed so as to exclude the formation regions of the bumps36and38(at least the center of the first and second electrodes32and34).

As shown inFIG. 4C, a single-layer or multilayer second metal layer58(solder, Ni, Au, Cr, or Al, for example) is formed on the surface of the first metal layer54exposed from the second resist layer56(formation regions of the bumps36and38). The bumps36and38are formed by this step.

In the case where the semiconductor substrate10is a semiconductor wafer, the method of manufacturing the semiconductor device may include a step of cutting (dicing) the semiconductor substrate10. The rest of the details of the manufacturing method is derived from the configuration of the above-described semiconductor device. According to this embodiment, since the first and second electrodes32and34are formed on the surfaces at different heights, the semiconductor device can be mounted in a region with a level difference.

FIG. 5is illustrative of a modification of the semiconductor device according to one embodiment of the present invention. The semiconductor device shown inFIG. 5includes a first electrode60formed on the first surface26. The rest of the configuration is the same as the configuration of the above-described semiconductor device. The first electrode60is electrically connected with one of the pads14through an interconnecting line62. Since the first electrodes32and the first electrodes60are disposed in a staggered arrangement, the pitch can be increased. The present invention also includes this embodiment.

FIG. 6is illustrative of an electronic device according to one embodiment of the present invention. The electronic device includes the above-described semiconductor device70. The electronic device includes a support member80. The support member80includes a first support surface82and a second support surface84lower than the first support surface82. The support member80may include first and second substrates86and88. The first and second substrates86and88are attached so as to have an overlapping region. The first and second substrates86and88may be attached by using an adhesive or the like. The first substrate86is a flexible substrate, for example. An electronic part72may be mounted on the first substrate86. The second substrate88is at least a part of an electronic panel (liquid crystal panel, electroluminescent panel, or the like). In a liquid crystal panel, another substrate74is provided so as to face the second substrate88. The second substrate88is disposed to project from the substrate74. A resin76may be provided on the second support surface84of the second substrate88in the peripheral section of the substrate74.

The surface of the first substrate86opposite to the second substrate88in the overlapping region with the second substrate88is the first support surface82. The surface of the second substrate88on the side of the first substrate86outside the overlapping region with the first substrate86is the second support surface84.

A first interconnecting pattern90is formed on the first support surface82, and a second interconnecting pattern92is formed on the second support surface84. The first electrode32of the semiconductor device70is electrically connected face-to-face with the first interconnecting pattern90. The second electrode34of the semiconductor device70is electrically connected face-to-face with the second interconnecting pattern92.

According to this embodiment, the semiconductor device70includes the first and second electrodes32and34formed on the surfaces at different heights, and is mounted in the region with a level difference (first and second support surfaces82and84). Since only a part of the semiconductor device70overlaps the first substrate86, the size of the first substrate86can be reduced.

FIG. 7is illustrative of a method of manufacturing the electronic device according to one embodiment of the present invention. This manufacturing method includes a step of mounting the semiconductor device70on the support member80having the first support surface82and the second support surface84lower than the first support surface82. Specifically, the first and second substrates86and88are attached before mounting the semiconductor device70. The first electrode32of the semiconductor device70is electrically connected face-to-face with the first interconnecting pattern90. The second electrode34of the semiconductor device70is electrically connected face-to-face with the second interconnecting pattern92. An anisotropic conductive material94(anisotropic conductive film or anisotropic conductive paste) may be used to electrically connect the electrode with the interconnecting pattern.

According to this embodiment, since the first and second electrodes32and34of the semiconductor device70are formed on the surfaces at different heights, the semiconductor device70can be mounted in a region with a level difference (first and second support surfaces82and84).

FIG. 8is illustrative of a method of manufacturing an electronic device according to another embodiment of the present invention. In this manufacturing method, the first electrode32of the semiconductor device70is electrically connected face-to-face with the first interconnecting pattern90formed on the first substrate86. Specifically, the semiconductor device70is mounted on the first substrate86before being mounted on the second substrate88. The semiconductor device70and the first substrate86are then attached to the second substrate88. In more detail, the second electrode34of the semiconductor device70is electrically connected face-to-face with the second interconnecting pattern92formed on the second substrate88. The anisotropic conductive material94(anisotropic conductive film or anisotropic conductive paste) may be used to electrically connect the electrode with the interconnecting pattern. The first substrate86is attached to the second substrate88so that the electrical connection section of the first interconnecting pattern90with the first electrode34overlaps the second substrate88. The anisotropic conductive material94may be used for attachment.

According to this embodiment, a level difference is formed by allowing the first and second substrates86and88to overlap. However, since the first and second electrodes32and34of the semiconductor device70are formed on the surfaces at different heights, it is possible to deal with the level difference.

FIG. 9is illustrative of a modification of an electronic device according to one embodiment of the present invention. In the electronic device shown inFIG. 9, a plurality of the semiconductor devices70are mounted on the support member80. The above description applies to the details of the structure and the mounting form of the semiconductor device70. The present invention also includes this embodiment.

FIGS. 10 and 11respectively show a notebook-type personal computer1000and a portable telephone2000as examples of electronic instruments including the semiconductor device or the electronic device according to the embodiments of the present invention.

The present invention is not limited to the above-described embodiments, and various modifications can be made. For example, the present invention includes various other configurations substantially the same as the configurations described in the embodiments (in function, method and effect, or in objective and effect, for example). The present invention also includes a configuration in which an unsubstantial portion in the described embodiments is replaced. The present invention also includes a configuration having the same effects as the configurations described in the embodiments, or a configuration able to achieve the same objective. Further, the present invention includes a configuration in which a publicly known technique is added to the configurations in the embodiments.