Method for fabricating semiconductor device with self-aligned storage node

A method for fabricating a semiconductor device includes preparing a semiconductor substrate having a contact pad; forming a first insulating film having a storage node contact exposing the contact pad and having a stack structure of an upper interlayer insulating film, a bottom interlayer insulating film, and an etching stopper between the upper and bottom interlayer insulating layers that protrudes into the storage node contact; forming a first conductive film for a storage node on the substrate; forming a second insulating film where a portion of a surface corresponding to the storage node contact is recessed; forming an etching mask layer on the recessed portion of the second insulating film; etching the second insulating film using the etching mask layer; forming a second conductive film for a storage node on the substrate; etching the first and second conductive films to isolate nodes; and removing the etching mask layer, the second insulating film and the upper interlayer insulating film.

CROSS REFERENCE TO RELATED APPLICATIONS

This application claims priority from Korean Patent Application No. 2002-63266, filed on Oct. 16, 2002, the contents of which are hereby incorporated by reference in their entirety.

BACKGROUND OF THE INVENTION

1. Field of the Invention

This disclosure relates to a method of fabricating a semiconductor device, and more particularly, to a method of forming self-aligned storage nodes capable of improving alignment margins with storage node contacts and of improving static capacitance.

2. Description of Related Art

As the integration density and scale-down of semiconductor memory devices increase, the size of a semiconductor memory device continues to decrease. Because of the decrease in the size of the devices, it is difficult to ensure the alignment margin between a storage node contact and a storage node during the exposure for forming the storage node of a capacitor. It is also difficult to achieve a sufficient capacitance owing to the reduction in the dimension of a unit capacitor.

FIGS. 1A through 1Dare cross sectional diagrams illustrating a method of fabricating a conventional semiconductor device with a capacitor for a one-cylinder storage (OCS) structure.

Referring toFIG. 1A, a gate (not shown) is formed on a semiconductor substrate100. A first interlayer insulating film110is formed on the substrate, and then etched to form self aligned contacts (SACs)115exposing impurity regions (not shown) of a predetermined conductivity type in the semiconductor substrate100.

A conductive material for a contact pad, such as a polysilicon film, is deposited on the substrate comprising the SACs115. A chemical mechanical polishing (CMP) process is then performed on the conductive material for node separation. As a result, a storage node contact pad120and a bitline contact pad (not shown) are formed in the SACs115. At this time, the storage node contact pad120and the bitline contact pad are in electrical contact with the impurity regions (not shown) via SACs115.

Next, a second interlayer insulating film130, a conductive material141for a bit line, and a capping material143for a bit line such as a nitride film are sequentially deposited on the substrate, and then the conductive material141for a bit line and the capping material143for a bit line are etched to form a bit line140comprised of the conductive material141and the capping material143. The bit line140is in contact with a bitline contact pad (not shown).

An insulating film for a spacer, for example, a nitride film, is deposited on the substrate and then etched back to form a spacer145on the side wall of the bit line140. A third interlayer insulating film150is deposited on the substrate including the bit line140and a CMP process for planarization is performed. The third interlayer insulating film150is etched to form a storage node contact155.

A conducting material for a contact plug, for example, a polysilicon film, is deposited on the substrate including the storage node contact155and then is etched by a CMP process and the like to form a contact plug160. An etching stopper170and a sacrificial insulating film180are sequentially deposited on the substrate and then the sacrificial insulating film180is planarized by the CMP process and the like. The sacrificial insulating film180includes an oxide film, and the etching stopper170is includes a nitride film.

Referring toFIG. 1B, a photo resistive pattern190is formed on the sacrificial insulating film180in order to define an area where a storage node is to be formed in a subsequent process. The sacrificial insulating film180is etched using the photo resistive film pattern190. The etching stopper170serves as an etching end point. The etching stopper170is etched to form an opening195.

Referring toFIG. 1C, the photo resistive film pattern190is removed, and a conductive film for a storage node, for example, a polysilicon film200, is deposited on the substrate including the opening195. Referring toFIG. 1D, an undoped silicate glass (USG) (not shown) is deposited on the polysilicon film200and etched by an etch back or a CMP process for node isolation. Next, the USG film and the sacrificial insulating film180are removed to form a storage node205in contact with the contact plug160.

As described above, the conventional semiconductor device fabrication method forms an opening by photo etching a sacrificial insulating film in order to form the storage node. However, it is difficult to assure the alignment margin with a storage node contact plug owing to the reduction in the size of the device and the associated process cost is expensive. It is difficult to assure the capacitance due to the reduction of the dimension of a unit capacitor.

Korean patent laid open number 2001-45911 discloses a method for fabricating a capacitor that is capable of simplifying the process and increasing the capacitance. This method does not form a contact plug that connects a storage node contact pad with a storage node, but instead forms a storage node that directly contacts the storage node contact pad.

However, this method also forms an opening by photo etching a sacrificial insulating film in order to form a storage node, therefore it is not capable of assuring an alignment margin with a storage node contact.

Embodiments of the invention address these and other limitations of the prior art.

SUMMARY OF THE INVENTION

An embodiment of the invention provides a fabrication method for a semiconductor device with a storage node that is self-aligned with a storage node contact, thereby assuring an alignment margin with the storage node contact and lowering a manufacturing cost.

An embodiment of the invention provides a method for fabricating finer and highly-integrated semiconductor devices by ensuring a sufficient capacitance.

DETAILED DESCRIPTION OF THE INVENTION

A method for fabricating a semiconductor device according to an embodiment of the invention will now be describe with reference to the accompanying drawings.

FIGS. 2A through 2Iare process cross sectional diagrams illustrating a method for fabricating a semiconductor device comprising a capacitor having an OCS structure according to an embodiment of the invention.

Referring toFIG. 2A, a gate (not shown) is formed on a semiconductor substrate300and then a high density plasma (HDP) as a first interlayer insulating film310is formed on the substrate. Self-aligned contacts (SACs)315are formed by self-aligned etching the first interlayer insulating film310.

Next, a conductive material for a contact pad, for example, a polysilicon film, is deposited on the substrate including the SACs315, and a CMP process or an etch back process for node separation is performed to form a bitline contact pad (not shown) and a storage node contact pad320. The storage node contact pad320and the bitline contact pad are in electrical contact with impurity regions of a predetermined conductivity type (not shown) formed in the semiconductor substrate300via the SACs315.

A second interlayer insulating film330, a conductive material341for a bit line, and a capping material343for a bit line are sequentially deposited on the substrate. The conductive material341for a bit line and the capping material343for a bit line are etched and then a portion of the second interlayer insulating film330is etched. As a result, the bit line340including the conductive material341and the capping material343is formed. The bit line340is in contact with the bitline contact pad (not shown).

Next, an insulating film for a spacer is deposited on the substrate and etched back to form a bitline spacer345at the sidewall of the bit line343. A nitride film is used as the capping material343for a bit line and the insulating film345for a spacer.

A third interlayer insulating film350is deposited on the substrate including the bit line340and a CMP process for planarization is performed. An etching stopper355and a fourth interlayer insulating film360are sequentially deposited on the third interlayer insulating film350. At this time, a HDP oxide film or a BPSG film is used as the third and fourth interlayer insulating films350and360. A nitride film is used as the etching stopper355.

Referring toFIG. 2B, a photo resistive film pattern370is formed on the fourth interlayer insulating film360to define an area where a storage node contact is to be formed. The fourth interlayer insulating film360is dry-etched using the photo resistive film pattern370. At this time, the first etching stopper355serves as an etching end point.

Referring toFIG. 2C, the photo resistive film pattern370is removed. The etching stopper350and the third interlayer insulating film350are dry-etched using the fourth interlayer insulating film360to form a storage node contact365exposing the storage node contact pad320.

Referring toFIG. 2D, a native oxide film is removed with an HF cleaning process. During the HF cleaning process, since an etching speed of oxide films for the third interlayer insulating film350and the fourth interlayer insulating film360are higher than a nitride film for the etching stopper355, an open area of the storage node contact365aafter the HF cleaning process is larger than that of the storage node contact365after the dry etching process. Thus, the nitride film for the etching stopper355protrudes from the sidewall of the storage node contact365a.

FIG. 3Ais a plan diagram illustrating the semiconductor device after the storage node contact365ais formed by the HF cleaning process.FIG. 2Cis a cross-sectional diagram taken along a line IID—IID ofFIG. 3Aafter the HF cleaning process.

A first polysilicon film380is deposited to a thickness of 200˜400 Å on the substrate including the storage node contact365a. It is desirable that the first polysilicon film380is deposited to its minimum thickness in order not to fill the storage node contact365. It is because it is for forming a void at the bottom of the storage node contact365aand then forming a recess at an upper surface of a sacrificial insulating film during the deposition of a sacrificial insulating film for forming a storage node.

Referring toFIG. 2E, a sacrificial insulating film390is formed to a thickness of about 10000˜15000 Å on the substrate. The sacrificial insulating film390uses an insulating film that copies an undulation produced by the storage node contact365aon its upper surface. The insulating film may be, for example, a plasma oxide film PEOX, or a high density plasma oxide film.

At this time, in the storage node contact365a, the first etching stopper355is protrudes more than the third and fourth interlayer insulating films350and360. Thus, a void391is formed at the bottom of the storage node contact365a. As a result, the undulation produced by the storage node contact365ais copied on the sacrificial insulating film390. Accordingly, the sacrificial insulating film390has a recessed portion395on its surface corresponding to the storage node contact365a.

Next, an insulating film400is deposited to a thickness of 500˜1000 Å on the sacrificial insulating film390. A nitride film that may gap fill the recessed portion395of the sacrificial insulating film390and has a wet and dry etching selectivity with respect to the sacrificial insulating film390is used as the insulating film400.

Referring toFIG. 2F, the insulating film400is etched by a CMP process using the sacrificial insulating film390as an etching end point until a portion of the sacrificial insulating film390is exposed. Thus, the insulating film405fills in the recessed portion395of the sacrificial insulating film390that is isolated.FIG. 3Bis a plan diagram taken after the CMP process is performed in order for the insulating films405to remain only in the recess portion395of the sacrificial insulating film390.FIG. 2Fis a cross sectional diagram taken along a line IIF—IIF of FIG.3B. Referring toFIG. 3B, the insulating film405is separately formed in the recessed portion395of the sacrificial insulating film corresponding to the storage node contact365a.

Referring toFIG. 2G, the portion of sacrificial insulating film390exposed by the CMP process is etched by a fixed amount through a dry etching process using the insulating film405as an etching mask. At this time, the exposed portion of the sacrificial insulating film390is etched to a thickness of about 300˜1000 Å.

Referring toFIG. 2H, during a cleaning process the sacrificial insulating film390is further etched by a fixed amount through a wet etching process using the insulating film405as an etching mask. When the sacrificial insulating film390is wet etched after dry etching, the sacrificial insulating film390is further etched to a thickness of about 100˜300 Å within the extent that the insulating film405is not lifted.

Next, an insulating film410having an etching selectivity with respect to the sacrificial oxide film390, for example, a nitride film, is deposited on the substrate. The insulating film410supports an edge portion of the insulating film405that has a thin thickness and it is deposited to a thickness of about 100˜300 Å. The thickness of the insulating film410becomes a factor for determining a surface dimension of a storage node that is to be formed in a subsequent process.

Referring toFIG. 2I, the insulating film410is etched to remain in a spacer type configuration at the edge portion of the insulating film405, thereby supporting the insulating film405. The insulating film410is etched up to the sacrificial insulating film390, which is the etching end point.FIG. 3Cis a plan diagram taken after the etch back process of the insulating film410is performed.FIG. 2Iis a cross-sectional diagram taken along a line II I—II I of FIG.3C. Referring toFIG. 3C, the insulating film415covers the insulating film405. The insulating films405and415act as an etching mask417in the following process.

Referring toFIG. 2J, the exposed portion of the sacrificial insulating film390is etched using the etching mask417that includes the insulating films405and415. The sacrificial insulating film390is dry etched up to the first polysilicon film380that is used as an etching end point. Next, a second polysilicon film420for a storage node is deposited to a thickness of about 200˜500 Å on the substrate.

Referring toFIG. 2K, the first polysilicon film380and the second polysilicon film420is etched back to isolate nodes. At this time, the first and second polysilicon films380and420are etched back using the fourth interlayer insulating film360as an etching end point.

Referring toFIG. 2L, the etching mask417is removed by using phosphoric acid. Also, the sacrificial insulating film390and the fourth interlayer insulating film360are removed by using phosphoric acid, thereby forming a storage node425that includes the first and second polysilicon films380and420.

According to an embodiment of the invention, the surface of the sacrificial insulating film390corresponding to the storage node contact365ais recessed by the undulation of the storage node contact365a. The sacrificial insulating film390is etched by using the etching mask layer417formed on the recessed portion395of the sacrificial insulating film390. Accordingly, the photo etching process is excluded, and the storage node425is self-aligned with the storage node contact365a.

The first polysilicon film380that is in direct contact with the storage node contact365ais used as the storage node to increase the surface dimension of the storage node. The sacrificial insulating film390is etched by using the etching mask layer417, and therefore, the surface dimension of the storage node is determined by the deposition thickness of the nitride film415that is used to form the etching mask layer417.

According to an embodiment of the invention, the etching mask417is removed after node separation. The etching mask417may be removed before depositing the second polysilicon film420. Finally, a capacitor of an OCS type is obtained by forming a dielectric film and a plate node on the substrate. These processes are not shown in the Figures since they are familiar to those skilled in the art.

As described above, according to an embodiment of the invention, a self-aligned storage node is formed by using the undulation of the upper surface of a sacrificial insulating film produced by a storage node contact, thereby solving the misalignment with the storage node contact owing to the photo etching process and reducing the manufacturing cost. Also, a surface dimension is increased by forming a storage node that directly contacts a storage node contact, thereby increasing the capacitance of a capacitor.

Embodiments of the invention will now be described in a non-limiting way.

A method for fabricating a semiconductor device according to an embodiment of the invention includes: preparing a semiconductor substrate having a contact pad; forming a first insulating film having a storage node contact exposing the contact pad on the substrate, the first insulating film having a stack structure of a bottom interlayer insulating film, an upper interlayer insulating film, and an etching stopper between the bottom and upper interlayer insulating films and protruding into the storage node contact; forming a first conductive film for a storage node on the substrate; forming a second insulating film where a portion of a surface corresponding to the storage node contact is recessed; forming an etching mask layer on the recessed portion of the second insulating film; etching the second insulating film using the etching mask layer; forming a second conductive film for a storage node on the substrate; etching the first and second conductive films to isolate nodes; and removing the etching mask layer, the second insulating film, and the upper interlayer insulating film.

According to an embodiment of the invention, the second insulating film is a film that copies an undulation of the second insulating film produced by the storage node contact at the bottom surface of the second insulating film, thereby recessing a portion of the top surface of the second insulating film corresponding to the storage node contact. The second insulating film may include a plasma oxide film or a high-density plasma oxide film.

According to an embodiment of the invention, forming the etching mask layer includes: depositing a first etching mask material on the second insulating film to fill the recessed portion of the second insulating film; etching the first etching mask material to remain at the recessed portion of the second insulating film; dry-etching the second insulating film using the first etching mask material; wet-etching the second insulating film using the first etching mask material; depositing a second etching mask material on the substrate; and etching the second etching mask material to remain at an edge portion of the first etching mask material.