SYSTEM AND METHOD TO DISCOVER CANDIDATE PTP CLOCK SOURCE(S) OVER IP/MPLS NETWORK

Aspects of the subject disclosure may include, for example, a device that includes a processing system including a processor; a clock; and a memory that stores executable instructions that, when executed by the processing system, facilitate performance of operations of: advertising a capability as a precision timing protocol (PTP) master clock through an Internet Protocol (IP) network, wherein the advertising includes an IP address of the device; receiving a unicast signaling mechanism from a PTP client node in the network; and sending clock messages to the PTP client node responsive to accepting the PTP client node. Other embodiments are disclosed.

CROSS-REFERENCE TO RELATED APPLICATION(S)

This application claims priority under 35 U.S.C. § 1.119 to Indian patent application no. 202311081663, filed on Nov. 30, 2023. All sections of the aforementioned application(s) and/or patent(s) are incorporated by reference herein in their entirety.

FIELD OF THE DISCLOSURE

The subject disclosure relates to a system and method to discover candidate precision timing protocol (PTP) master clock sources over an Internet Protocol (IP)/multi-protocol label switching (MPLS) network.

BACKGROUND

PTP has become critical to deliver synchronization of radios in modern cellular networks, such as fifth generation (5G) networks. 5G networks have been rapidly evolving into a fully automated network. Today a network administrator needs to manually provision an IP address for a candidate master clock to enable PTP synchronization of node over IP. Furthermore, the administrator must manually provision such IP address(es) whenever a list of potential master clock changes.

DETAILED DESCRIPTION

The subject disclosure describes, among other things, illustrative embodiments for a precision time protocol master clock advertising its capabilities over Internet Protocol networks. Other embodiments are described in the subject disclosure.

One or more aspects of the subject disclosure include a device that includes a processing system including a processor; a clock; and a memory that stores executable instructions that, when executed by the processing system, facilitate performance of operations of: advertising a capability as a precision timing protocol (PTP) master clock through an Internet Protocol (IP) network, wherein the advertising includes an IP address of the device; receiving a unicast signaling mechanism from a PTP client node in the network; and sending clock messages to the PTP client node responsive to accepting the PTP client node.

One or more aspects of the subject disclosure include a device, having: a processing system including a processor; a clock; and a memory that stores executable instructions that, when executed by the processing system, facilitate performance of operations, the operations comprising: identifying a first precision timing protocol (PTP) master clock through a message received in an Internet Protocol (IP) network; registering as a PTP client node with the first PTP master clock through a unicast signaling mechanism; advertising a capability as a second PTP master clock through the IP network, wherein the advertising includes an IP address of the device; receiving a second unicast signaling mechanism from a second PTP client node in the IP network; and sending first clock messages to the PTP client node responsive to accepting the second PTP client node.

One or more aspects of the subject disclosure include a non-transitory, machine-readable medium, comprising executable instructions that, when executed by a processing system including a processor, facilitate performance of operations, the operations including: identifying a first precision timing protocol (PTP) master clock from a message received in an Internet Protocol (IP) network; registering as a first PTP client node with the first PTP master clock; synchronizing a clock with first clock messages received from the first PTP master clock; advertising a capability as a second PTP master clock through the IP network; receiving a request from a second node in the IP network to become a second PTP client node; and sending second clock messages to the second PTP client node responsive to accepting the second PTP client node.

ITU-T has defined two telecommunications standards, namely G.8265.1 and G.8275.2, for the frequency recovery and phase recovery, respectively, in IP networks. These standards propose a unicast discovery option defined by IEEE 1588 (see 16.1) to allow a PTP client to contact a master clock in a network that does not offer multicasting. The PTP client uses unicast negotiations to discover the best master available over an IP network. This mechanism requires a manual configuration of the client node with the IP addresses of all the available master clocks. Once the master clock IP address is configured on the PTP client node, the PTP client node starts unicast negotiations by sending signaling request messages for announce, sync and delay information provided by the PTP master clock.

FIG. 1 is a block diagram illustrating an exemplary, non-limiting embodiment of precision time protocol nodes in a network in accordance with various aspects described herein. As shown in FIG. 1, network 100 includes two master clock nodes 101, 102, an IP/MPLS cloud 103, two boundary clock nodes 104, 105 and a client node 106. Master clock nodes 101 and 102 synchronize their clocks using time information from a time source, such as a Global Navigation Satellite Service (GNSS) receiver. Normally, a system administrator would have to provision nodes 104 and 105 as PTP client nodes having IP address of nodes 101 and 102 as candidate master clocks. Furthermore, nodes 104 and 105 would also be provisioned as having master clock functionality. Finally, node 106 would be provisioned as a client node having the IP address of node 104 as a candidate master clock.

In an embodiment, an administrator would not have to provision nodes 104, 105 and 106 with IP addresses of candidate master clock nodes. Instead, nodes 104, 105 and 106 would learn which hosts (e.g., nodes 101, 102, 104 and 105) have an advertised PTP master capability. Based on this information, client nodes can start a PTP unicast signaling mechanism over IP/MPLS cloud 103 to master clock nodes at the IP addresses advertised. In an embodiment, a node that has advertised this capability using Interior Gateway Protocol (IGP) would receive a unicast signaling request and can decide whether to grant the request for service or not in the usual fashion. Based on the signaling mechanism, client nodes can start getting announcement messages from potential master clock nodes and then decide which is the best master clock based on IEEE-1588/profile specific state machine and the Best Master Clock Algorithm (BMCA).

In an embodiment, the system sends the announcement messages using Intermediate System to Intermediate System (ISIS) or Open Shortest Path First (OSPF) via IGP. In a case where some of the candidate master clock nodes are not within an ISIS or OSPF area of reachability, an administrator can manually configure the IP address as usual. However, it is also important to note that for telecom applications based on G.8275.2 recommended clocking architectures, candidate master clocks are generally within few IP hops from client nodes and thereby very likely to be within same ISIS or OSPF domain as the client nodes. For OSPF, a router can send PTP master clock capabilities via router information in an opaque Link State Advertisement (LSA).

FIG. 2 is a block diagram illustrating an exemplary, non-limiting embodiment of precision time protocol nodes in an OSPF network in accordance with various aspects described herein. As shown in FIG. 2, network 200 includes two master clock nodes 201, 202, an IP/MPLS cloud 203, two boundary clock nodes 204, 205 and client nodes 206, 207, 208 and 209. Nodes 201, 202, 204, 205 and 206 are withing OSPF Area 0. Nodes 204, 207 and 208 are within OSPF Area 1, and nodes 202, 205 and 209 are within OSPF Area 2. In an embodiment, OSPF propagation for PTP capability will be limited within an OSPF area and will not be flooded in other areas. In case of clocking networks spanning across many OSPF areas, area border routers (ABRs) can act as boundary clocks, such that they can lock to candidate master clock nodes in one area and also advertise themselves as master clock nodes for adjacent areas that they serve.

For example, master clock nodes 201 and 202 are both advertised as candidate PTP master clock nodes in Area 0 but not advertised in OSPF Area 1. However, node 204, which is an ABR between Area 0 and Area 1, will recognize nodes 201 and 202 as candidate master clock nodes through OSPF. Similarly, node 204 can advertise itself as a candidate master clock in Area 1, so that PTP client nodes like nodes 207 and 208 can lock onto it. As per PTP protocol, node 204 will advertise a holdover (or free run as the case may be) clock class to its clients in area 1 until node 204 is locked to a master clock in Area 0.

Each ABR working as boundary clock can propagate clock information by advertising itself as candidate master in downstream OSPF areas. This process prevents clock synchronization capability from flooding across OSPF areas. However, an administrator can still manually configure a client with an IP address of a master clock node outside of its own area without taking advantage of the mechanism proposed here.

In another embodiment, ISIS can advertise a new link state protocol (LSP) data unit (sub-TLV) in the following format for loopback IP interfaces:

In an ISIS-based IGP domain, a PTP master clock would advertise its capability via sub-TLV contained in the sub-TLV of ISIS IP reachability extensions. This capability can be limited to being intra-level to ISIS levels and an ISIS L1/L2 router can be a boundary block if clock has to traverse multiple ISIS levels. This is similar to the proposal detailed above for OSPF case.

FIG. 3 depicts an illustrative embodiment of a method performed by a node in an IP network in accordance with various aspects described herein. As shown in FIG. 3, method 210 begins at step 211 where a node in an IP network receives information sent over IGP about a node advertising its ability to provide PTP master clock service to any clients. Next in step 212, the node sends a message to the PTP master clock node indicating that the node wishes to register as a PTP client based on the information received. The node, having been accepted by the PTP master clock node as a client, receives clock messages from the PTP master clock node, and can synchronize its clock using the messages if the PTP master clock node is selected as the best master clock under BMCA. Next, in step 213, the node determines whether it will advertise itself as a PTP master clock node. If not, then the process repeats at step 211.

But if so, then the process continues at step 214, where the node sends out an advertisement that it is a PTP master clock node. Next in step 215, the node receives a request from a potential PTP client node seeking to become a PTP client. In step 216, the node considers whether to accept the potential PTP client node as a client. If not, then the process repeats at step 211. But if so, then in step 217 the node sends clock messages to the newly accepted PTP client node, and the process repeats at step 211.

Turning now to FIG. 4, there is illustrated a block diagram of a computing environment in accordance with various aspects described herein. In order to provide additional context for various embodiments of the embodiments described herein, FIG. 4 and the following discussion are intended to provide a brief, general description of a computing environment 400, that, when combined with specific equipment such as a GNSS receiver, a timing subsystem including PLL, a forwarding switch/ASIC for Ethernet or IP/MPLS processing capability to support PTP, etc., would be suitable for implementing the various embodiments of the subject disclosure. For example, computing environment 400 can facilitate in whole or in part sending advertisements identifying PTP master clocks in an IP network; registering PTP client nodes through a unicast signaling mechanism; and sending clock messages to PTP client nodes, etc.

With reference again to FIG. 4, the example environment can comprise a computer 402, the computer 402 comprising a processing unit 404, a system memory 406 and a system bus 408. The system bus 408 couples system components including, but not limited to, the system memory 406 to the processing unit 404. The processing unit 404 can be any of various commercially available processors. Dual microprocessors and other multiprocessor architectures can also be employed as the processing unit 404.

The system bus 408 can be any of several types of bus structure that can further interconnect to a memory bus (with or without a memory controller), a peripheral bus, and a local bus using any of a variety of commercially available bus architectures. System memory 406 comprises ROM 410 and RAM 412. A basic input/output system (BIOS) can be stored in a non-volatile memory such as ROM, erasable programmable read only memory (EPROM), EEPROM, which BIOS contains the basic routines that help to transfer information between elements within the computer 402, such as during startup. The RAM 412 can also comprise high-speed RAM such as static RAM for caching data.

The computer 402 further comprises an internal hard disk drive (HDD 414) (e.g., EIDE, SATA), which internal HDD 414 can also be configured for external use in a suitable chassis (not shown), a magnetic floppy disk drive (FDD 416), (e.g., to read from or write to a removable diskette 418) and an optical disk drive 420, (e.g., reading a CD-ROM disk 422 or, to read from or write to other high-capacity optical media such as the DVD). The HDD 414, magnetic FDD 416 and optical disk drive 420 can be connected to the system bus 408 by a hard disk drive interface 424, a magnetic disk drive interface 426 and an optical drive interface 428, respectively. The hard disk drive interface 424 for external drive implementations comprises at least one or both of Universal Serial Bus (USB) and Institute of Electrical and Electronics Engineers (IEEE) 1394 interface technologies. Other external drive connection technologies are within contemplation of the embodiments described herein.

A number of program modules can be stored in the drives and RAM 412, comprising an operating system 430, one or more application programs 432, other program modules 434 and program data 436. All or portions of the operating system, applications, modules, and/or data can also be cached in the RAM 412. The systems and methods described herein can be implemented utilizing various commercially available operating systems or combinations of operating systems.

A user can enter commands and information into the computer 402 through one or more wired/wireless input devices, e.g., a keyboard 438 and a pointing device, such as a mouse 440. Other input devices (not shown) can comprise a microphone, an infrared (IR) remote control, a joystick, a game pad, a stylus pen, touch screen and the like. These and other input devices are often connected to the processing unit 404 through an input device interface 442 that can be coupled to the system bus 408, but can be connected by other interfaces, such as a parallel port, an IEEE 1394 serial port, a game port, a universal serial bus (USB) port, an IR interface, etc.

A monitor 444 or other type of display device can also be connected to the system bus 408 via an interface, such as a video adapter 446. It will also be appreciated that in alternative embodiments, a monitor 444 can also be any display device (e.g., another computer having a display, a smart phone, a tablet computer, etc.) for receiving display information associated with computer 402 via any communication means, including via the Internet and cloud-based networks. In addition to the monitor 444, a computer typically comprises other peripheral output devices (not shown), such as speakers, printers, etc.

The computer 402 can operate in a networked environment using logical connections via wired and/or wireless communications to one or more remote computers, such as a remote computer(s) 448. The remote computer(s) 448 can be a workstation, a server computer, a router, a personal computer, portable computer, microprocessor-based entertainment appliance, a peer device or other common network node, and typically comprises many or all of the elements described relative to the computer 402, although, for purposes of brevity, only a remote memory/storage device 450 is illustrated. The logical connections depicted comprise wired/wireless connectivity to a local area network (LAN 452) and/or larger networks, e.g., a wide area network (WAN 454). Such LAN and WAN networking environments are commonplace in offices and companies, and facilitate enterprise-wide computer networks, such as intranets, all of which can connect to a global communications network, e.g., the Internet.

When used in a LAN networking environment, the computer 402 can be connected to the LAN 452 through a wired and/or wireless communication network interface or adapter 456. The adapter 456 can facilitate wired or wireless communication to the LAN 452, which can also comprise a wireless AP disposed thereon for communicating with the adapter 456.

When used in a WAN networking environment, the computer 402 can comprise a modem 458 or can be connected to a communications server on the WAN 454 or has other means for establishing communications over the WAN 454, such as by way of the Internet. Modem 458, which can be internal or external and a wired or wireless device, can be connected to the system bus 408 via the input device interface 442. In a networked environment, program modules depicted relative to the computer 402 or portions thereof, can be stored in the remote memory/storage device 450. It will be appreciated that the network connections shown are examples and other means of establishing a communications link between the computers can be used.

Computing devices typically comprise a variety of media, which can comprise computer-readable storage media and/or communications media, which two terms are used herein differently from one another as follows. Computer-readable storage media can be any available storage media that can be accessed by the computer and comprises both volatile and nonvolatile media, removable and non-removable media. By way of example, and not limitation, computer-readable storage media can be implemented in connection with any method or technology for storage of information such as computer-readable instructions, program modules, structured data or unstructured data. Computer-readable storage media can comprise the widest variety of storage media including tangible and/or non-transitory media which can be used to store desired information. In this regard, the terms “tangible” or “non-transitory” herein as applied to storage, memory or computer-readable media, are to be understood to exclude only propagating transitory signals per se as modifiers and do not relinquish rights to all standard storage, memory or computer-readable media that are not only propagating transitory signals per se.