Semiconductor device and method of manufacturing the semiconductor device

In a semiconductor device (4), a semiconductor chip (10) is mounted on a die pad (6) which has a die pad overhang portion (6a) and leads (9) are arranged around and apart from the die pad (6). The leads (9) and the semiconductor chip (10) are electrically connected and are covered with a sealing resin (8). A concave portion (7e) is formed on the outer side of each lead (9), i.e., the far side from the die pad. A lead concave surface (7d) facing the concave portion (7e) includes a forward-tapered lead slope surface (7h). Side surface of the sealing resin (8) has a step of a staircase shape formed from the first and the second resin side surfaces (8a and 8b). A tip of the lead (9) protrudes past the first resin side surface (8a).

RELATED APPLICATIONS

This application claims priority under 35 U.S.C. § 119 to Japanese Patent Application No. 2018-042271 filed on Mar. 8, 2018, the entire content of which is hereby incorporated by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a semiconductor device and a method of manufacturing the semiconductor device.

2. Description of the Related Art

A collective sealing block is formed by mounting a semiconductor chip on each of a plurality of die pads of lead frames and collectively sealing the lead frames and the plurality of semiconductor chips with a sealing resin. The plurality of semiconductor chips is arranged in a matrix pattern in the collective sealing block and is separated into individual small-sized semiconductor devices by cutting the collective sealing block along boundary lines by dicing.

In the collective sealing block, each lead is embedded in the sealing resin so as to extend between the adjacent semiconductor devices. When the collective sealing block is divided into individual pieces, the lead is cut at boundary portions and left as a lead in an individual semiconductor device to function as a lead for assembling the semiconductor device on a mounting board. The lead in this type of semiconductor device is cut along with the sealing resin, and a cut surface of the lead accordingly appear on a side surface of the cut sealing resin. Metal burr may be formed on the sealing resin in the cutting. The metal burr is made of a metal material from which the lead frames are constructed and may extend along the cut surface to cause a short circuit between the plurality of leads in some cases. The metal burr fallen off for some reason can also cause a short circuit between tracks of one of the semiconductor device and the mounting board when the semiconductor device is assembled to the mounting board. Technologies of preventing the formation of the metal burr are described in Japanese Patent Application Laid-open No. 2008-218469 and Japanese Patent Application Laid-open No. 2011-216615.

Another drawback of a semiconductor device that is an individual piece separated from other semiconductor devices by dicing is that the mounting strength of the semiconductor device relies on the lead's bottom surface and on the lead's side surfaces which are poor in solder wettability. A method of improving the solder wettability of a lead is described in “Systematic Approach in Testing the Viability of Mechanical Partial-cut Singulation Process towards Tin-plateable Sidewalls for Wettable Flank on Automotive QFN Technology”, 2016, IEEE EPTC, pp. 254-258 (hereinafter referred to as Non-patent Document 1), which deals with a technology involving shaping a part of a lower surface of a lead that is placed along the perimeter of a semiconductor device into a concave shape, and then plating the lead. A surface of the lead along the perimeter of the semiconductor device is partially plated because of the concave shape, and hence not only the lead's bottom surface but also the lead's side surfaces can partially be connected by solder. The semiconductor device can thus have an improved mounting strength.

However, it is not easy to check the state of solder connection of a semiconductor device that is manufactured by a manufacturing method described in one of Japanese Patent Application Laid-open No. 2008-218469, Japanese Patent Application Laid-open No. 2011-216615, and Non-patent Document 1 and assembled on a mounting board. In addition, because the top surface of the lead of the semiconductor device is in contact with resin and cannot be connected via solder, the mounting strength of the semiconductor package inevitably depends only on the lead's bottom surface and the lead's side surfaces with poor solder wettability, and the mounting strength is limited as a result.

SUMMARY OF THE INVENTION

It is therefore an object of the present invention to provide a semiconductor device which has fine board mounting properties and in which it is easy to visually check the state of solder connection, and a method of manufacturing the semiconductor device.

To attain this object, the present invention employs structure and method of manufacturing described below.

There is provided a semiconductor device including: a die pad having a semiconductor chip mounted thereon; a plurality of leads arranged around the die pad; and a sealing resin exposing a lower surface of each of the plurality of leads and an outer side of the each of the plurality of leads, the outer side being a far side of the each of the plurality of leads from the die pad, the outer side of the each of the plurality of leads having an upper portion in which a concave portion is formed, the concave portion being faced with a lead concave surface including at least a forward-tapered slope surface, and the outer side of the each of the plurality of leads protruding past a part of a side surface of the sealing resin.

There is provided a method of manufacturing a semiconductor device, the method including: preparing a lead frame having a die pad and a plurality of leads arranged around the die pad; mounting a semiconductor chip on the die pad, and electrically connecting the semiconductor chip and the plurality of leads; forming a collective sealing block by sealing at least the die pad, the semiconductor chip, and the plurality of leads with resin; sticking a protective film to a bottom surface of the collective sealing block; first cutting midway in each of the plurality of leads from a top surface opposite to the bottom surface of the collective sealing block, with a dicing blade having a first width, to thereby form a first cut area; first etching isotropically a part of the each of the plurality of leads that is exposed in the first cut area; second cutting from a bottom surface of the first cut area through the bottom surface of the collective sealing block, with a dicing blade having a second width which is narrower than the first width to thereby form a lead; and removing the protective film.

A semiconductor device which easies visual check of the connection state of a terminal of the semiconductor device already assembled on a mounting board and which has fine board mounting properties as well, and a method of manufacturing the semiconductor device can be obtained by using the means described above.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

A description is now given of embodiments of the present invention referring to the drawings.

First Embodiment

FIG. 1is a perspective view for illustrating a method of manufacturing a semiconductor device according to the first embodiment of the present invention. A collective sealing block1is a block of a sealing resin8in which semiconductor chips and others are sealed. Cutting lines1cand1dillustrated inFIG. 1are in a grid pattern on the collective sealing block1, and the collective sealing block1is divided into individual semiconductor devices along the cutting lines.

FIG. 2is a sectional view for illustrating a step of the method of manufacturing the semiconductor device according to the first embodiment of the present invention. The collective sealing block1is constructed by covering a lead frame5, a semiconductor chip10, and bonding wires11with the sealing resin8. The lead frame5includes a die pad6and lead forming portions7. The semiconductor chip10is each mounted on a die pad top surface6cof the die pad6. The bonding wires11each electrically connect an electrode on the semiconductor chip10to one of lead forming portions7. A die pad bottom surface6bof a thick portion of each die pad6and a lead bottom surface7bof a thick portion of each of the lead forming portions7are exposed on a resin bottom surface1aof the collective sealing block1. Further, a thin portion is provided around the top surface of each die pad6to form a die pad overhang portion6a, and a thin portion is provided around the top surface of each lead forming portion7to form a lead overhang portion7a.

To form the collective sealing block1, the lead frame5which include the die pad6and the plurality of lead forming portions7arranged around each of the die pad6are prepared first. The semiconductor chip10is each mounted on the die pad6next. After the semiconductor chips10and the lead forming portions7are electrically connected via the bonding wires11, the die pad6, the semiconductor chip10, the lead forming portions7, and the bonding wires11are sealed with resin. The collective sealing block is formed through this process.

FIG. 3is a sectional view for illustrating a step that follows the step ofFIG. 2in the method of manufacturing the semiconductor device according to the first embodiment of the present invention, and a state in which a protective film2is stuck to the resin bottom surface1ais illustrated inFIG. 3. The protective film2is made of an organic material or the like having etching resistance, and may be formed into a sheet shape in advance as in the case of a dicing tape, and is stuck to the bottom surface of the collective sealing block1, or may be formed by applying an etching-resistant organic material to the bottom surface of the collective sealing block1and then cured to harden.

Next, as illustrated inFIG. 4, a part of the collective sealing block1is cut by using a wide first dicing blade12along the cutting line1dfrom a resin top surface1bside. Each cutting line1druns along the center of each lead forming portion7to divide the lead forming portions7into left and right portions equal in quantity. The first dicing blade12starts the first cutting from the resin top surface along the cutting line1d, and after the first cutting to some depth or midway in the lead forming portion7, for example, at a depth equivalent to the bottom of a thin portion of the lead forming portion7, the first dicing blade12is pulled out of the collective sealing block1. The dicing blade used here is preferred to have a thickness of, desirably, 100 μm or more. The first cutting is performed along each of the cutting lines1cwhich are lateral lines illustrated inFIG. 1, and each of the cutting lines1dwhich are longitudinal lines inFIG. 1.

FIG. 5is a sectional view of a plurality of lead forming portions7aligned in the depth direction to the plane of the sheet ofFIG. 4. A first cut lower surface12bis the lower surface of an area cut and removed by the first dicing blade. When the first dicing blade cuts both the sealing resin8and the lead forming portions7, an extensible metal on surfaces of the lead forming portions7(here, copper (Cu)) is cut and drawn by the rotating dicing blade, and a metal burr3is consequently formed on the sealing resin in some cases. Since the metal burr3that is formed long enough to extend across the space between adjacent lead forming portions7causes defective in characteristics, removal of the metal burr3is required.

FIG. 6is a sectional view for illustrating a step that follows the step ofFIG. 4in the method of manufacturing the semiconductor device according to the first embodiment of the present invention and shows an etching step. Wet isotropic etching is used to remove the metal burr3formed by the first cutting. A sulfuric acid/hydrogen peroxide solution or ferric chloride solution is used as an etchant capable of selectively etching copper without etching the sealing resin8. When the collective sealing block1is immersed in the etchant, the etchant seeps into a first cut area12aformed by the first cutting and starts isotropically etching the lead forming portion7that appears on the bottom and side surfaces of the first cut area12a. The etching terminates while leaving a part of the lead forming portion7in its depth direction. Half etching is performed on the lead forming portion7in this manner in order to prevent fluctuations in the length of leads which are formed later. The etching forms an etched area14between the first cut area12aand a lead concave surface7dwhich is a surface of the lead forming portion7. The lead concave surface7dis made of a forward-tapered slope surface and flat surfaces connecting to the slope surface. The flat surfaces are a lead horizontal surface7fand a lead vertical surface7iwhich reflect the shapes of the bottom and side surfaces of the first cut area12a, respectively. The forward-tapered lead slope surface7hhas a shape of curved concave surface. The part of the lead forming portion7remaining after the etching desirably has a thickness from about ⅓ to about 1/10 of the total thickness. In the first embodiment, the die pad bottom surface6band the lead bottom surface7bwhich are covered with the protective film2are not hollowed in the etching and maintain the flatness.

FIG. 7is a sectional view of a plurality of lead forming portions7aligned in the depth direction to the plane of the sheet ofFIG. 6. Each metal burr3illustrated inFIG. 5is thin and is accordingly removed during the etching of the lead forming portions7. The upper portion of each lead forming portion7illustrated inFIG. 7is the lead concave surface7dformed by etching, and the lower portion of the lead forming portion7is the part left uncut and continuous after the etching.

FIG. 8is a sectional view for illustrating a step that follows the step ofFIG. 6in the method of manufacturing the semiconductor device according to the first embodiment of the present invention. The step illustrated inFIG. 8involves the second cutting of the collective sealing block1completely with the use of a second dicing blade13to break the collective sealing block1into individual semiconductor devices4. The second dicing blade13used here is a narrower blade, whose thickness is between 30 μm and 80 μm, compared to the first dicing blade12. The second dicing blade12enters the collective sealing block1from the resin top surface1bside, starts the second cutting from the vicinity of the central portion of the first cut area12a, and cuts the sealing resin8and the remaining part of the lead forming portion7so as to divide the remaining part equally into left and right portions, thereby forming leads9, which is illustrated inFIG. 9. The tip of the second dicing blade13at this point reaches a point midway through the protective film2stuck to the lead bottom surface7b. The second cutting is performed along each of the cutting lines1c, which are lateral lines illustrated inFIG. 1, and each of the cutting lines1d, which are longitudinal lines inFIG. 1. When the second metal burr (not shown) is formed by the second cutting, light second etching may be conducted to remove the second metal burr. The second etching may be unnecessary when the lower portion of the lead forming portion7which is cut completely is thin and only few second metal burrs are formed. A sulfuric acid/hydrogen peroxide solution or ferric chloride solution is used as an etchant here to selectively etch copper without etching the sealing resin8.

The protective film2is then removed and electrolytic plating is performed to form a plating film of a Ni/Pd/Au laminated film on the lead concave surface7dand the lead bottom surface7b. The board mounting properties of the leads9are improved by forming the plating film. However, the effects of the present invention can be obtained without the plating. The protective film2may be removed by peeling the protective film2off the collective sealing block1, or by dissolving the protective film2in a solvent.

A semiconductor device according to the present invention is obtained through the processes described above.

FIG. 9is a sectional view of the semiconductor device according to the first embodiment of the present invention. In the semiconductor device4, the semiconductor chip10is mounted on the die pad6, which has the die pad overhang portion6aas a thin portion on the top thereof, the leads9are provided around and apart from the die pad6and are electrically connected to the semiconductor chip10by the bonding wires11, and the sealing resin8covers the semiconductor chip10, the bonding wires11, the die pad6, and the leads9. A concave portion7eis formed on the outer side of each lead9which is the far side from the die pad. The lead concave surface7dfacing the concave portion7eis made of the lead vertical surface7i, the forward-tapered lead slope surface7h, and the lead horizontal surface7fcontiguous to the lead slope surface7h. The lead horizontal surface7fis formed in parallel to the lead bottom surface7b. A lead cut surface7glocated at the outermost end of the lead9locates from the lead horizontal surface7fto the lead bottom surface7b. The side surface of the sealing resin8has a step which forms a staircase shape. The side surface of the sealing resin8is made of a first resin side surface8awhich is an upper portion and a second resin side surface8bwhich is a lower portion and is on the same plane as the lead cut surface7g. A tip that is a part of the lead9protrudes past the first resin side surface8a.

FIG. 10is a perspective view of a lead portion of the semiconductor device according to the first embodiment of the present invention. The sealing resin8has a step of a staircase shape formed from the first resin side surface8aand the second resin side surface8b. The lead concave portion7eformed on the outer side of the lead9is surrounded on both sides by the sealing resin8and is formed to have an undercut of the sealing resin8.

FIG. 11is a top view of the semiconductor device according to the first embodiment of the present invention. Since the leads9are made visible between portions of the sealing resin8, checking solder wettability in an appearance inspection becomes easy after assembling the semiconductor device4on the mounting board.

The plating step, which is placed after the removal of the protective film2in the description given above, may be conducted after the etching step ofFIG. 6. In that case, however, plating covers only the lead concave surface7d, and not the lead bottom surface7b. Plating the lead bottom surface7bcan be made in an additional step conducted before the step of sticking the protective film2or after the step of removing the protective film2.

According to the first embodiment described above, the metal burr3formed on a cut surface by the first cutting with the first dicing blade12can be removed by etching, thereby preventing a short circuit between a plurality of leads. A short circuit between conductors of the semiconductor device4or the mounting board can also be prevented when the semiconductor device4separated as an individual piece from other semiconductor devices is assembled on the mounting board. Another advantage is that the leads formed by etching have a forward-tapered shape and accordingly help solder to creep onto the lead concave surface7din assembling the mounting board, thereby permitting a solid connection strength. The state of solder connection can be observed from above the semiconductor device4as well to carry out a quality check. The solder that has crept onto the lead is also surrounded by the sealing resin8on the lead's side surfaces, and hence the risk of short circuit between adjacent leads is reduced. In addition, the semiconductor device4can have a high dimensional precision because the dimensions of the sealing resin8and the leads9depend on the second cutting with the second dicing blade13.

Second Embodiment

FIG. 12is a sectional view of a method of manufacturing a semiconductor device according to a second embodiment of the present invention. By comparison differences fromFIG. 6of the first embodiment reside in that a thin and deep third cut area12cis formed at the distal end of the first cut area12aand in that a part of the etching area14that corresponds to the third cut area12creaches the lead bottom surface7b. To form the first cut area12aand the third cut area12c, the first cut area12ais formed first by using a wide first dicing blade whose thickness is 100 μm or more to cut to the vicinity of the bottom surface of the thin portion of the lead forming portion7, and the third cut area12cis formed next by digging down the central portion of the first cut area12awith a third dicing blade whose thickness is between 20 μm and 30 μm), which is narrower than the second dicing blade used in the first embodiment. The third cutting may be conducted simultaneously in a single step by using a dicing blade that is created by providing the very thin third dicing blade whose thickness is between 20 μm and 30 μm at the tip of the wide first dicing blade whose thickness is 100 μm or more.

A lead cut surface, which is denoted by7ginFIG. 9, formed at an outer end of the lead by the above manufacturing method is minimal, and hence helps solder to creep onto the lead better and improves solder wettability even more in the board assembling. Since the amount of the lower portion of the lead forming portion7which is cut in the complete third cutting with the second dicing blade is minimal as well, the second etching for the second metal burr generated in the complete third cutting becomes unnecessary.

Manufacturing steps according to the second embodiment other than those described above conform to the manufacturing steps according to the first embodiment. The semiconductor device obtained from the second embodiment has the semiconductor device structure obtained from the first embodiment to which the differences described above are added.

According to the second embodiment described above, the metal burr3formed on a cut surface by the first cutting with the first dicing blade12can be removed by etching, thereby preventing a short circuit between a plurality of leads. A short circuit between conductors of the semiconductor device4or the mounting board can also be prevented when the semiconductor device4separated as an individual piece from other semiconductor devices is assembled on the mounting board. Another advantage is that the leads9formed by etching have a forward-tapered shape and accordingly help solder to creep onto the lead concave surface7din assembling the mounting board, thereby permitting a solid connection strength. In the second embodiment, the cut surface at the tip of each lead9is minimal, and hence helps solder to creep upon the lead even better and provides accordingly solid connection. The state of solder connection can be observed from above the semiconductor device4as well. The solder that has crept onto the lead is also surrounded by the sealing resin on the lead's side surfaces, and hence the risk of short circuit between adjacent leads is reduced. In addition, the semiconductor device4can have a high dimensional precision because the dimensions of the sealing resin8and the leads9depend on the second cutting with the second dicing blade13.