Controlling embedded image data in a smart display

A method and apparatus for controlling embedded raw image data within a display having internal memory. The method includes sending a frame of code and a final compilation of raw image data to the internal memory of the display from a primary host processor prior to the primary host processor entering a sleep state. When the primary host processor has entered a sleep state, control of the raw image data is redirected to at least one secondary host processor. The secondary host processor reads the frame of code within the internal memory of the display and instructs the display to perform an image-related behavior output that may include updating the display itself based on the frame of code found in the internal memory of the display.

FIELD OF THE DISCLOSURE

The present disclosure relates generally to display functions for a mobile computing device and more particularly to controlling display functions in a low power environment.

BACKGROUND

The display of notifications and other informative data upon a display screen of a mobile computing device provides timely and relevant information to a user of the mobile computing device. Often, when a device is in a stand-by state; that is the display is dark and not active with any displayable image output, flashing LEDs are used to indicate that a notification or other informative data exists for viewing. However, users may be overwhelmed by the number of flashing LEDs that may be associated with this informative data and be unable to discern quickly the meaning of the flashes or of the importance of the notification that triggered the flashing LEDs.

DETAILED DESCRIPTION

Disclosed herein is a method for controlling embedded raw image data within a display having internal memory. The method includes sending a frame of code and a final compilation of raw image data to the internal memory of the display from a primary host processor prior to the primary host processor entering a sleep state. When the primary host processor has entered a sleep state, control of the raw image data is redirected to at least one secondary host processor. The secondary host processor reads the frame of code within the internal memory of the display and instructs the display to perform an image-related behavior output that may include updating the display itself based on the frame of code found in the internal memory of the display.

Turning toFIG. 1,FIG. 1illustrates, via an explanatory block diagram100, of an electronic client device including a display coupled to an application processor120via a high speed switch or interface130. Display110is configured without any internal memory or alternatively, may include internal memory, but the internal memory is not utilized or is under-utilized. Display110is capable of operating in a low power mode and may be an active-matrix display. The display110may include organic light emitting diodes (OLED).

Application processor (AP)120may act as a host for controlling the transmission of data to the display110. AP120may run an operating system, a user interface, and applications for a mobile computing device. Other components beyond display110may also interface with AP120including, sensors, cameras, microphones, and storage modules. The transmission of data may have multiple modes and may be further controlled by high speed switch or interface130. High speed switch or interface130may be configured to send data in a high speed mode using four data pairs and one clock pair, for example. High speed interface130may be a serial interface between display110and host AP120. The interface120may be governed by protocols form one or more standard agencies or alliances, for example the MIPI Alliance, for handling pixel formats and data signals, as well as timing and commands to control display behaviors.

Referring toFIG. 2, a novel architecture200is shown for an electronic client device including a display210and the display having internal memory capable of receiving data and coded instructions for the display210. An AP host220of the electronic client device is configured to control data transmission for the display210when the AP host220is awake and active. A low power host230is communicatively coupled to the AP host220and enables data transmission over pairs of data lines (e.g., 4 pairs, including one special pair of data lines for switch between high/low power). The low power host230is also communicatively coupled to a low power processor, such as a reduced instruction set computer (RISC) microprocessor, such as a commercially available processor developed by Advanced RISC Machines (ARM) that may have upwards of five data pairs for high speed transmission.

For one embodiment of the teaching described herein, a determination is made by the electronic client device that it is about to enter a standby state, which will cause the display210of the electronic client device to shut off. The AP host220disables the display output and writes one final frame of image data to the display's random access memory (RAM) before going to sleep. At this point, the LP host230acts as a switch and transfers control to the low power microprocessor240. The image data may include an image displayed at a single location, or optionally several different locations for icon data to be presented on the display. Use of several different locations enables avoidance of screen burn-in. Low power (LP) microprocessor240controls the revealing or presenting of the icon on the display210and how often the icon is displayed. The control of the display is according to a frame of code and a final compilation of raw image data retrieved from the internal memory of the display while the low power processor controls. The exact appearance may vary, and the low power processor may for example control display of an icon (deemed as a notification for the user of the electronic client device) to fade in and fade out under different timing constraints. Such control of the revealing of the icon on the display results in behavior modification using the icon.

FIG. 3illustrates a display screen300and display screen memory having a program area310wherein coded instructions for controlling the display panel300may be embedded in the display's internal memory. For example, the coded instructions may be stored in the least significant bits of a register in RAM. A revealing display area320is an area where an icon330is displayed in various ways according to behavior as determined by the embedded code instructions for the display panel300. The low power processor240inFIG. 2may read and execute the embedded code instructions from display memory to cause the icon330to be displayed. For example, the icon330may be revealed on the display area in a thin line that expands wider to simulate an eye opening, thus revealing the notification in a different, but useful manner to a viewer of the display panel300.

The embedded coded instructions may control brightness (as measured in nits) in an example program:Set partial reveal area of the display to encompass the icon areaSet lowest brightness value for the displayTurn on displayIncrease the brightness of the display in 10 nit steps with a 50 msec delay for each step until 150 nits have been reachedHold for 500 msecDecrease the brightness in 10 nit steps with 50 msec delay each step until 10 nits have been reachedTurn off displayDelay for 5 seconds, then repeat program from the step where the display is turned on.

In order to control brightness levels for an OLED display, for example, several different lengthy gamma curves would be needed for each production line of the electronic client device. This would be necessary for every OLED formulation and for each sized of a display panel. The teachings herein allow for an embedded code of instructions that remain in the display's memory and that are programmed instruction codes for the gamma curves, thus alleviating the need for numerous gamma changes during development and production of the electronic client device.

FIG. 4illustrates an explanatory flowchart400, wherein a frame of code and a compilation of image data and including a display operation identification (ID) code is read410by the low power processor. An inquiry420on whether a correct ID code is read may result in the low power processor determining that a valid code is not received, and the processor executes430a default program for the display of the device. The default program can be embedded in memory at any point in the production process.

Responsive to a determination of a correct ID code, the low power processor240of the device reads440the number of commands, and optionally a checksum. The read operation450reads in the actual commands and/or data. A completion inquiry460continues the read450until then commands and data are read.

When the read operation is complete, calculation470of the optional checksum occurs to validate the instruction and/or data480. If the command and/or data, and/or the optional checksum, are not validated, then the low power processor240executes430default programming for the display of the device.

If the frame of code and a final compilation of raw image data is valid, then a sequence is executed490for displaying notification in a manner that reveals information to a user of the device via the display of the device.

Moreover, an embodiment can be implemented as a computer-readable storage medium having computer readable code stored thereon for programming a computer (e.g., comprising a processor) to perform a method as described and claimed herein. Likewise, computer-readable storage medium can comprise a non-transitory machine readable storage device, having stored thereon a computer program that include a plurality of code sections for performing operations, steps or a set of instructions.