Signal cancellation using feedforward and feedback paths

A circuit that cancels a self-interference signal includes, in part, a pair of signal paths that are substantially in phase, each of which paths includes a passive coupler, a delay element and a variable attenuator. The circuit further includes, in part, a first group of P signal paths each of which is substantially in phase with the pair of paths, a second group of M signal paths each of which is substantially out-of-phase relative to the pair of signal paths, and at least a pair of feedback paths. Each of the P and M signal paths, as well as the feedback paths includes a delay element and a variable attenuator. Optionally, each of the M signal paths is optionally 180° out-of-phase relative to the pair of signal paths.

FIELD OF THE INVENTION

The present invention relates to wireless communication, and more particularly to a full duplex wireless communication system.

BACKGROUND OF THE INVENTION

A wireless system often operates in a half-duplex mode to either transmit or receive data at any given time. A device operating in a full-duplex mode may simultaneously transmit and receive data. However, the simultaneous transmission and reception of data are carried out over different frequencies. For example, a full-duplex cell phone uses a first frequency for transmission and a second frequency for reception. As is well known, using the same frequency for simultaneous transmission and reception in a conventional wireless system results in significant amount of self-interference at the receiver thereby rendering the system ineffective in receiving the desired signal.

BRIEF SUMMARY OF THE INVENTION

A circuit, in accordance with one embodiment of the present invention, includes, in part, a first signal path, a second signal path, a first group of P signal paths, a second group of M signal paths, and at least first and second feedback paths The first signal path includes, in part, a passive coupler, a delay element and a variable attenuator. The second signal path includes, in part, a passive coupler, a delay element and a variable attenuator. The second signal path is substantially in phase with the first signal path. The first group of P signal paths are substantially in phase with the first and second signal paths. Each of the first group of P signal paths includes, in part, a delay element and a variable attenuator. P−1 signal paths of the first group of P signal paths include a passive coupler. The second group of M signal paths each are substantially out-of-phase relative to the first and second signal paths. Each of the second M signal paths includes, in part, a delay element and a variable attenuator. M−1 signal paths of the second group of M signal paths include a passive coupler. Each of M and P is an integer equal to or greater than one. The first feedback path is formed via the isolation port of the passive coupler disposed in the first signal path, or the isolation port of the passive coupler disposed in one of the first P signal paths. The second feedback path is formed via the isolation port of the passive coupler disposed in the second signal path, or the isolation port of the passive coupler disposed in one of the second M signal paths. Each of the first and second feedback paths includes, in part, a delay element and a variable attenuator. The feedback paths form additional tuning paths used to form an IIR filter.

In one embodiment, the circuit further includes, in part, at least one antenna for receiving or transmitting a signal. In one embodiment, each of the first signal path, the second signal path, the first group of P signal paths and the second group of M signal paths is adapted to receive a sample of a transmit signal and generate a delayed and weighted sample of the transmit signal. In one embodiment, the circuit further includes, in part, a control block adapted to vary an attenuation level of the variable attenuators disposed in the first signal path, the second signal path, the first group of P signal paths, the second group of M signal paths, and the first and second feedback paths. The circuit further includes, in part, a combiner adapted to combine the delayed and weighted samples of the transmit signal to generate a first signal representative of a self-interference signal. The circuit further includes, in part, a combiner/coupler adapted to subtract the first signal from the received signal.

In one embodiment, the delay element disposed in the first signal path generates a delay shorter than the arrival time of a second sample of the transmit signal at the combiner/coupler, and the delay element disposed in the second signal path generates a delay longer than the arrival time of the second sample of the transmit signal at the combiner/coupler. In one embodiment, the first signal path, the second signal path, the first group of P signal paths and the second group of M signal paths form P/2+M/2+1 associated pairs of paths. The delays generated by the delay elements of each such associated pair of delay paths form a window within which the second sample of the transmit signal arrives at the combiner/coupler.

In one embodiment, the circuit further includes, in part, a controller adapted to determine the attenuation levels of the variable attenuators disposed in the first signal path, the second signal path, the first P signal paths, the second M signal paths in accordance with values of intersections of an estimate of the self-interference signal and P+M+2 sinc functions centered at boundaries of the P/2+M/2+1 windows. In one embodiment, a peak value of at least a subset of the P+M+2 sinc functions is set substantially equal to an amplitude of the estimate of the self-interference signal. In one embodiment, the circuit further includes, in part, a splitter adapted to generate the sample of the transmit signal from the transmit signal. In one embodiment, the circuit further includes, in part, an isolator having a first port coupled to the antenna, a second port coupled to a transmit line of the circuit, and a third port coupled to a receive line of the circuit. In one embodiment, the isolator is a circulator.

A method of reducing the self-interference signal in a communication system, in accordance with one embodiment of the present invention includes, in part, delivering a first portion of a first sample of a transmit signal to a first passive coupler to generate a first signal portion, generating a first signal defined by a delayed and weighted sample of the first signal portion, delivering a second portion of the sample of the transmit signal to a second passive coupler to generate a second signal portion, generating a second signal defined by a delayed and weighted sample of the second signal portion, generating a first group P signals each being substantially in phase with the first and second signals and each defined by a different delayed and weighted sample of either the first signal portion or the second signal portion, generating a second group of M signals each being substantially out-of-phase relative to the first and second signals and each defined by a different delayed and weighted sample of either the first signal portion or the second signal portion, generating at least a first feedback signal using the first signal or a first one of the first P signal paths, generating at least a second feedback signal using the second signal or a first one of the M signals and combining the first signal, the second signal, the first group of P signals, the second group of M signals, and the first and second feedback signals to generate a combined signal representative of the self-interference signal. At least one of the P signals and/or one of the M signals is a feedback signal. The feedback paths form additional tuning paths to form an IIR filter.

The method, in accordance with one embodiment of the present invention, further includes, in part, receiving a second sample of the transmit signal via an antenna, and combining/coupling the combined signal with the second sample of the transmit signal received via the antenna. In one embodiment, the method further includes, in part, setting the delay of the first signal to a value less than the arrival time of the second sample of transmit signal at the antenna, and setting the delay of the second signal to a value greater than the arrival time of the second sample of the transmit signal at the antenna.

In one embodiment, the method further includes, in part, forming P/2+M/2+1 associated time windows defined by the delays of the first signal, the second signal, the first group of P signals, and the second group of M signals, and selecting the delays of the first signal, the second signal, the first group of P signals, and the second group of M signals such that the arrival time of the second sample of the transmit signal at the antenna falls within each of the P/2+M/2+1 time windows. The method further includes, in part, determining the weights of the first signal portion and the second signal portion in accordance with values of intersections of an estimate of the self-interference signal and P+M+2 sinc functions centered at boundaries of the P/2+M/2+1 time windows.

In one embodiment, the method further includes, in part, setting a peak value of at least a subset of the P+M+2 sinc functions substantially equal to an amplitude of the estimate of the self-interference signal. In one embodiment, the method further includes, in part, receiving the first sample of the transmit signal from a splitter. In one embodiment, the method further includes, in part, delivering a second portion of the transmit signal to an isolator, and delivering the transmit signal from the isolator to the antenna. In one embodiment, the isolator is a circulator.

A signal cancellation circuit, in accordance with one embodiment of the present invention, includes, in part, N signal paths each of which is either in-phase or 180° out-of-phase relative to other (N−1) signal paths. Each of at least a subset of the N signal paths includes, a passive coupler, a delay element and a variable attenuator, wherein N is an integer greater than one.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 1is a simplified block diagram of a full-duplex wireless communication device100, in accordance with one embodiment of the present invention. Wireless communication device100, which may be a cellular phone, a base station, an access point or the like, is configured to transmit data/signals via transmit antenna405and receive data/signals via a receive antenna410. Wireless communication device (herein alternatively referred to as device)100is also shown, as including, in part, a transmit front-end415, a signal splitter425, a receive front end420, a signal combiner435, and a self-interference cancellation circuit450. Device100may be compatible and operate in conformity with one or more communication standards such as WiFi™, Bluetooth®, GSM EDGE Radio Access Network (“GERAN”), Universal Terrestrial Radio Access Network (“UTRAN”), Evolved Universal Terrestrial Radio Access Network (“E-UTRAN”), Long-Term Evolution (LTE), and the like.

Transmit front-end415is adapted to process and generate transmit signal A. Signal splitter425splits the transmit signal and delivers a portion (sample) of this signal, i.e., signal B, to self-interference cancellation circuit450. The remaining portion of the transmit signal, which is relatively large (e.g., 85% of the transmit signal) is delivered to transmit antenna405. Because the transmit and receive antenna405and410operate in substantially the same frequency band, signal IN received by receive antenna410includes the desired signal as well as a portion of the transmitted signal OUT. The transmitted signal component that is received by antenna410is an undesirable signal and is referred to hereinafter as the self-interference signal. Self-interference cancellation circuit450operates to reconstruct the self-interference signal—which is subsequently subtracted from the received signal IN. To achieve this, self-interference cancellation circuit450generates a multitude of weighted and delayed samples of the transmit signal, and combine these signals to generate signal C that is representative of the self-interference signal. Signal combiner435is adapted to subtract the signal it receives from self-interference cancellation circuit450from the signal it receives from antenna410, thereby to deliver the resulting signal D to receive front-end420. Accordingly, the self-interference component of the signal received by receive front-end420is substantially degraded. In one embodiment, self-cancellation circuit450may cancel, e.g., 20-25 dB of self-interference signal.

FIG. 2is a simplified block diagram of a full-duplex wireless communication device (hereinafter alternatively referred to as device)200, in accordance with another embodiment of the present invention. Device200is similar to device100except that device200has a single antenna460used for both transmission and reception of signals. Device200also includes a circulator405that provides isolation between its ports. Circulator405is adapted to concurrently deliver the transmit signal and the receive signal to and from antenna460. In one exemplary embodiment, circulator405provides approximately 15 dB of isolation between the transmit and receive paths, thereby reducing the self-interference on the receive port by approximately 15 dB.

FIG. 3is a simplified block diagram of a full-duplex wireless communication device (hereinafter alternatively referred to as device)300, in accordance with one exemplary embodiment of the present invention. Device300is shown as including, in part, a transmitter front end415, a receiver front end420, a transmit/receive antenna460, a circulator405, and a self-interference cancellation circuit450as is also disposed in devices100and200shown inFIGS. 1 and 2respectively. Coupler210receives a sample of transmit signal205and in response delivers a through signal212to circulator450, and a coupled signal214to splitter215. Self-interference signal cancellation circuit450is adapted to reconstruct the self-interference signal314from the sample of the transmit signal214. The reconstructed self-interference signal314is subtracted from received signal218by coupler310thereby to recover the signal of interest305, also referred to as the desired signal. The desired signal305is delivered to receiver front end420for further processing.

In the following, for simplicity, the same reference number may be used to identify both the path through which a signal travels, as well as to the signal which travels through that path. For example, reference numeral5may be used to refer to the path so identified inFIG. 3, or alternatively to the signal that travels through this path. Furthermore, in the following, the terms divider, splitter, coupler, or combiner are alternatively used to refer to an element adapted to split/divide a signal to generate more signals and/or couple/combine a multitude of signals to generate one or more signals. Such a component is also alternatively referred to herein as splitter/coupler.

Exemplary self-interference signal cancellation circuit450is shown as having 10 signal paths (also referred to herein as taps), namely signal paths30,25,20,15,5,35,45,50,55,60. It is understood, however, that a self-interference signal cancellation circuit, in accordance with the present invention, may have fewer or more than 10 taps and thus may have any number of even or odd taps. Signal paths20,15,5,35,45,55are feedforward paths, and signal paths30,25,55,60are feedback paths, as described further below. Signal cancellation circuit450is adapted to enable full duplex wireless communication by cancelling or minimizing the self-interference signal. As seen fromFIG. 3, each tap includes a delay element and a variable attenuator to compensate for a range of disturbances, such as variable delay spreads.

As described above, coupler210receives a sample of transmit signal205and in response delivers a through signal212to circulator405, and a coupled signal214to splitter215. Signal214may be, for example, 10-20 dB weaker than signal205. Splitter215is adapted to split signal214into two signals1, and2, which may have equal powers in one embodiment. The through and coupled output signals212and214of coupler210are respectively in phase and 90° out of phase with respect to signal205.

Signal1is applied to coupler225, which in response generates a through output signal5and a coupled output signal10. Similarly, signal10is applied to coupler230, which in response generates a through output signal15and a coupled output signal20. The coupled output signal of each of couplers225, and230has a 90° phase shift relative to its through output signal. Accordingly, signals5and10have a 90° phase difference. Likewise, there is a 90° phase difference between signals15and20.

In a similar manner and as shown, Signal2is applied to coupler240, which in response generates a through output signal35and a coupled output signal40. Signal40is applied to coupler245, which in response generates a through output signal45and a coupled output signal50. The coupled output signal of each of couplers240, and245has a 90° phase shift relative to its through output signal. Accordingly, signals35and40have a 90° phase difference. Likewise, there is a 90° phase difference between signals45and50.

The coupled output of each coupler is weaker than the signal received by that coupler by a predefined dB. In one example, the coupled output of each coupler is 6 dB weaker than the signal received by that coupler. As is well known, the through output signal of each coupler is also weaker than the coupler's input signal due to an insertion loss. However, for each coupler, the through output signal is stronger than the coupled output signal. Accordingly, in the exemplary embodiment shown inFIG. 3, signals5,35have substantially the same phase and power and are the strongest signals; signals15,45have substantially the same phase and power and are the second strongest signals; and signals20,50have substantially the same phase and power and are the third strongest signals.

Self-interference signal cancellation circuit450is further shown as including ten delay elements 30, 31, 32, 33, 34, 35, 36, 37, 38each adapted to delay the signal it receives by a fixed or variable amount of delay. Delay elements 30, 31, 32, 33, 34, 35, 36, 37, 38, 39are adapted respectively to delay signals30,25,20,15,5,35,45,50,55,60by different amounts of delay. For example, in the exemplary embodiment shown inFIG. 1, delay elements 32, 33, 34, 35, 36, 37, disposed in the feedforward paths are adapted to delay the signals they receive respectively by D, 2D, 3D, 4D, 5D, and 6D, where D is a fixed amount. In other embodiments, the delay elements may delay the signals they receive by different amounts or ratios.

Self-interference signal cancellation circuit450is further shown as including ten variable attenuators 40, 41, 42, 43, 44, 45, 46, 47, 48, 49each adapted to attenuate the signal it receives from its associated delay element in accordance with a different attenuation signal Ci, wherein i is an integer ranging from 0 to 9 in this exemplary embodiment, generated by controller500. Accordingly, signals120,115,105,135,145,150, supplied respectively by variable attenuators 42, 43, 44, 45, 46, 47, (alternatively and collectively referred to herein using reference number4) are time-delayed, weighted signal samples that are used to reconstruct the self-interference component of the transmitted signal at the receiver using a sinc function and in conformity with the sampling theory, as described further below.

In accordance with one embodiment, the control signals Ciapplied to variable attenuators 42, 43, 44, 45, 46, 47disposed in the feedforward paths are selected such that the weights associated with and assigned to the two center taps 54, 55have first and second highest magnitudes, the weights associated with adjacent taps 53, 56have third and fourth highest magnitudes, and the weights associated with taps 52, 57have fifth and sixth highest magnitudes. Consequently, in accordance with such embodiments, by disposing a variable attenuator in each feedforward path and aggregating their responses, the phase offset and the variable delay spread caused by any perturbation of the transmitted signal as it arrives at the receiver may be accounted for. An algorithm, such as the gradient decent algorithm, may be used to set the attenuation level of each of the variable attenuators 42, 43, 44, 45, 46, 47, disposed in different feedforward paths via control signals Ci.

The output signal of each of couplers58,60,62, and64, has a 90° phase difference relative to its coupled input signal and a 0° phase difference relative to its through input signal. Accordingly, for example, the signal travelling from path1to path101via paths5,105does not experience a relative phase shift. However, the signal travelling from path1to path101via paths10,15,115,110receives a first 90° phase shift while passing through coupler225, and a second a 90° phase shift while passing through coupler60. Therefore, path1,10,15,115,110,101has a 180° phase shift relative to path1,5,105,101.

Likewise, the signal travelling from path1to path101via paths10,20,120,110,101receives a first 90° phase shift while passing through coupler225, a second 90° phase shift while passing through coupler230, a third 90° phase shift while passing through coupler58, and a fourth a 90° phase shift while passing through coupler60. In other words, the path defined by paths (alternatively and for simplicity referred to as path)1,10,20,120,110has a 360° phase shift relative to and is thus in phase with path1,5,105,101.

Similarly, path2,40,45,145,140,102, has a 180° phase shift relative to path2,35,135, and102. Path2,40,50,150,140,102, has a 360° phase shift relative to and is thus in phase with path2,35,135, and102.

Since path1,5,105,101is in phase with path2,35,135,102, taps 54, 55—associated with attenuator 44, 45—are in phase. For the reasons described above, each of taps 53, 56—associated with attenuators 43, 46—has a 180° phase shift relative to taps 54, 55; and each of taps 52, 57—associated with attenuators 42, 47—is in phase with taps 54, 55. Consequently, taps 57, 56, 53, 52, in accordance with embodiments of the present invention, are selected so as be either in-phase or 180° out-of-phase relative to the center taps 54, 55in an alternating manner.

The polarities resulting from the selected tap phases together with the attenuation weights supplied by the variable attenuators enable the construction of the self-interference signal314at the output of signal combiner315. Coupler310receives the coupled input signal314and the through input signal218and in response supplies signal305. Signal305is thus in phase with signal218but 90° out-of-phase relative to signal314. Accordingly, the signal travelling through the path205,214,314experiences a 180° phase shift relative to the self-interference signal travelling through the path205,212,218. Couplers210,310thus together provide the polarity and sign reversal required to subtract the reconstructed self-interference signal314from signal218and deliver to receiver420signal305which has a substantially degraded/cancelled component of the transmitted signal.

As shown, self-interference cancellation circuit450receives a sample214of the transmit signal205via splitter210. As described above, each path in self-interference cancellation circuit450is shown as including a delay element 3iwhere i is an index varying from 1 to 10 in this exemplary embodiment, and a variable attenuator 4i. The level of attenuation of each variable attenuator 4imay be varied in accordance with a predefined algorithm implemented by controller500. Each delay element 3iis adapted to generate a signal that is a delayed version of signal214. Each variable attenuator 4iis adapted to attenuate the amplitude of the signal it receives in accordance with the control signal Ciapplied thereto by controller500so as to generate an attenuated (weighted) signal Bi. Signals B2, B3, B4, B5, B6and B7are different delayed and weighted versions of signal214. The output of combiner315is signal314and is representative of the self-interference component of the transmit signal. In one embodiment combiner315is an adder adding signals101,102to generate signal314. In other embodiments, combiner315may perform other arithmetic or logic functions generate signal314.

Self-interference signal cancellation circuit450is further shown as including, in part, four feedback paths each formed by coupling the isolation port of a coupler disposed on the input sides of the delay elements (the transmitting end of cancellation circuit450) to the isolation port of an associated coupler disposed on the output sides of the delay elements (the receiving end of the cancellation circuit450). For example, the isolation port of coupler60is coupled—via attenuator 40and delay element 30—to the isolation port of its associated coupler225. Likewise, the isolation port of coupler58is coupled to the isolation port of its associated coupler230via attenuator 41and delay element 51; the isolation port of coupler62is coupled to the isolation port of its associated coupler240via attenuator 49and delay element 59; and the isolation port of coupler64is coupled to the isolation port of its associated coupler245via attenuator 48and delay element 58. Accordingly, exemplary Self-interference signal cancellation circuit450is shown as including four such feedback paths.

As is seen fromFIG. 3, each feedback path includes, in part, a variable attenuator and a delay element. The feedback path formed by paths30and130includes delay element 30and variable attenuator 40; the feedback path formed by paths25and125includes delay element 31and variable attenuator 41; the feedback path formed by paths55and155includes delay element 38and variable attenuator 48; and the feedback path formed by paths60and160includes delay element 39and variable attenuator 49. Each of the variable attenuators 40, 41, 48and 49disposed in the feedback paths is adapted to attenuate the signal it receives from the isolation port of its associated coupler via an associated delay element. Accordingly, each of variable attenuators 40, 41, 48and 49attenuates the signal it receives from the isolation port of couplers225,230,245, and240, respectively, via delay elements 30, 31, 38and 39. The output signals of the variable attenuators 40, 41, 48, 49are respectively applied to the isolation ports of their associated couplers60,58,64, and62. Variable attenuators 40, 41, 48, 49are controlled via controller500which, in one embodiment, implements a gradient descent algorithm to determine the values applied to the variable attenuators. In yet other embodiments, the signals applied to the variable attenuators are determined in accordance with the algorithm described in Application Ser. No. 61/754,447, the content of which is incorporated herein by reference in its entirety.

In accordance with the present invention, by feeding back the signals present at the isolation ports of the couplers disposed on the receiving side, namely couplers58,60,62,64to the isolation ports of the couplers disposed on the transmitting side, namely couplers230,225,240and245a number of advantages are achieved. The signal energy that would have otherwise been wasted at the isolation ports of couplers58,60,62,64,245,240,225, and230, is instead used within the cancelation circuit450, thereby reducing power consumption. Furthermore, the feedback paths formed by feeding back the signals supplied at the isolation ports of couplers58,60,62,64to the isolation ports of couplers230,225,240,245form infinite impulse response (IIR) filters thereby enabling implementation of more complex operations. One such IIR filter is defined by forward path10,15,115,110and feedback path160,160B. Although not shown, it is understood that other IIR filters may be used in accordance with the present invention to form a signal cancelation circuit.

As described above, self-interference cancellation circuit450is operative to reconstruct the self-interference signal from the signal values present on the multiple paths disposed between splitter215and combiner315. Since both the self-interference signal and the time-delayed, weighted signals B2, B3, B4, B5, B6, B7are samples of the same transmit signal, the reconstruction of the self-interference signal is similar to band-limited interpolation. Furthermore, since only a finite number of taps are available, a windowed interpolation is used to reconstruct signal314. Therefore, the signal representative of the self-interference signal, in accordance with one embodiment of the present invention, is generated from signals B2, B3, B4, B5, B6, B7that are delayed and weighted versions of the same sampled transmit signal214.

To generate a signal representative of the self-interference signal, in accordance with one exemplary embodiment, the delays generated in each pair of associated feedforward paths disposed between splitter215and combiner315are selected such that the arrival time of the self-interference signal at subtractor314falls within the difference between such two delays (also referred to herein as the delay window). Accordingly, the delay generated by a first tap in each such pair of associated feedforward taps is less than the arrival time of signal218at subtractor114(the arrival time is referred to herein as Tself_int) and the delay generated by a second tap in each pair of associated feedforward taps is greater than Tself_int.

In one embodiment, the center two taps, namely taps 54and 55, form the first pair of associated taps such that, for example, the delay TL1generated by delay element 34is less than Tself_intand the delay TH1generated by delay element 35is greater than Tself_int. TL1and TH1are thus selected to be the closest such delays to Tself_int. The next two taps closest to the center taps, namely taps 53and 56, form the second pair of associated taps such that, for example, the delay TL2generated by delay element 33is less than delay TL1and the delay TH2generated by delay element 36is greater than delay TL1; therefore TL2and TH2are selected to be the second closest such delays to Tself_int. The delays associated with the next pair of associated taps 52, 57are selected such that, for example, the delay TL3generated by delay element 32is less than delay TL2and the delay TH3generated by delay element 36is greater than delay TL2; therefore TL3and TH3are selected to be the third closest such delays to Tself_int.FIG. 4shows the relationship between these delays. It is understood that in other embodiments, associated feedforward taps may be arranged and selected differently. For example, in another embodiment, taps 55and 53may be selected as associated taps and used to form a delay window.

The following description is made with reference to an arrangement according to which the center feedforward taps 54and 55form the first pair of associated taps, feedforward taps 53and 56form the second pair of associated taps, and feedforward taps 52and 57form the third pair of associated taps. Furthermore, in the following, the delays and interpolations associated with only 2 pairs of associated taps, namely associated taps 54/55and associated taps 53/56are described. It is understood, however, that similar operations may be performed for all other taps regardless of the number of taps disposed in a self-interference cancellation circuit in accordance with the present invention.

As shown inFIG. 4, TL1represents the time around which signal B4is generated (the delays across attenuators 4iare assumed to be negligible relative to the delays across delay elements 3i), TH1represents the time around which signal B5is generated, TL2represents the time around which signal B3is generated, and TH2represents the time around which signal B6is generated. As is seen, time delays TH1and TL1are selected—using delay elements 34and 35—such that Tself_intfalls within the window W1defined by the difference TH1−TL1. Likewise, time delays TH2and TL2are selected such that Tself_intfalls within the window W2defined by the difference TH2—TL2; TH3and TL3are selected such that Tself_intfalls within the window W3defined by the difference TH3—TL3

Accordingly, as described above and shown inFIG. 4, for each pair of associated feedforward taps defining a window, the amount of delay generated by one of the feedforward paths is longer than Tself_int, and the amount of delay generated by the other one of the feedforward paths is shorter than Tself_int. For example, referring to window W1, TH1is greater than Tself_intand TL1is smaller than Tself_intis understood that the feedforward tap delays are selected such that Tself_intfalls within a window defined by any pair of associated feedforward paths. Although the above description is provided with reference to a delay structure that includes an even number of taps, it is understood that the present invention equally applies to a delay structure with an odd number of taps. For example, a delay structure with an odd number of taps may be selected so as to position Tself_intwithin a time from the delay generated by the last delay path after all the other delay paths have been formed into associated pairs.

To determine the level of attenuation for each of the attenuators 42, 43, 44, 45, 46, 47, disposed in the feedforward paths, in accordance with one exemplary embodiment of the present invention, sinc interpolation is used. It is understood however that any other interpolation scheme may also be used. To achieve this, for each window, the intersection of a pair of sinc functions—each centered at one of the window boundaries and each having a peak value substantially equal to an initially estimated peak value of the self-interference signal—and the interference signal is determined. For example, referring toFIG. 5, sinc function502centered at TL1is seen as intersecting the self-interference signal Self_int at point510, and sinc function504centered at TH1is seen as intersecting the self-interference signal Self_int at point520. The heights of points510and520define the level of attenuations applied to attenuators 44and 45, respectively.FIG. 6shows the attenuation levels510,520so determined and applied to attenuators 44and 45respectively. Furthermore, since the amplitude and delay associated with the self-interference signal Self_int may not be known in advance, the attenuation value for each attenuator may be optimized using an iterative optimization scheme to converge to an operating point of minimum measured self-interference at the receiver.

FIG. 7shows the intersection of sinc functions positioned at the window boundaries TL2and TH2with the self-interference signal Self_int. As is seen, sinc function506centered at TL2is seen as intersecting the self-interference signal at point530, and sinc function508centered at TH2is seen as intersecting the self-interference signal Self_int at point540. The heights of points530and540define the level of attenuations applied to attenuators 33and 34, respectively.FIG. 8shows the attenuation levels510,520,530,540so determined and applied to attenuators 34, 35, 33, and 36respectively. As is seen inFIGS. 7 and 8, the attenuations levels applied to attenuators 34, 35have positive values (have a positive polarity), whereas the attenuations levels applied to attenuators 33, 36have negative values and thus have a negative polarity. It is understood that the attenuation levels for the remaining taps are similarly determined. Further details regarding the application of the sampling theory to reconstruct a sampled signal is provided in “Multirate Digital signal Processing” by Ronald E. Crochiere, and Lawrence R. Rabiner, Prentice-Hall Processing series, 1983, the content of which is incorporated herein by reference in its entirety.

The output signal314of combiner315represents a summation of signal B0, B2. . . B9and is representative of the self-interference signal. As the delay of the self-interference signal changes and its position within the windows moves, the intersections of the self-interference signal and the sinc functions change, thereby causing the attenuation levels to change, which in turn causes the reconstructed signal representative of the self-cancelation signal to also change and track the self-interference signal.

The higher the number of taps, the greater is the amount of self-interference cancellation.FIG. 9is an exemplary plot900of the amount of self-interference cancellation as a function of the number of taps. As is seen, the amount of self-interference cancellation for two taps and ten taps are respectively shown as being approximately −30 dB and −75 dB. In other words, by increasing the number of taps, self-interference cancellation on a wider bandwidth is achieved.

FIG. 10shows a flowchart1000for canceling or reducing the self-interference signal at a receiver of a communication device, in accordance with one embodiment of the present invention. To achieve this, the transmit signal is sampled1010. Thereafter, a multitude of delayed version of the sampled transmit signal are generated1020using feedforward paths. Feedback paths are also formed, as described above, to save energy and form one or more IIR filters. The delayed versions of the sampled transmit signal are attenuated1030to generate a multitude of weighted and delayed signals. The multitude of weighted, delayed signals are thereafter combined1040to reconstruct a signal representative of the self-interference signal. The reconstructed signal is subsequently subtracted from the received signal to cancel or reduce the self-interference signal at the receiver.

FIG. 11is a simplified block diagram of a full-duplex wireless communication device600, in accordance with one exemplary embodiment of the present invention. Device600is shown as including, in part, a transmitter front end415, a receiver front end420, a transmit/receive antenna460, a circulator405, and a self-interference cancellation circuit650. Self-cancellation circuit600is similar to self-cancellation circuit450except that self-cancellation circuit600includes two center taps 51, 52, a multitude feedback taps, (N−2) additional feedforward taps, where N is an integer greater than or equal to 3, where each of the additional taps is either in phase with the two center taps, or is out-of-phase with respect to the center taps. For example, although not shown in detail for simplicity, signal paths30and130are feedback paths formed using the isolation ports of a pair of couplers disposed in self-cancellation circuit600in the same manner as shown inFIG. 3. In one embodiment, each of the additional taps is 180° out-of-phase relative to the two center taps. In yet other embodiments, a self-cancellation circuit includes only the two center taps, namely the two center taps 51, 52ofFIG. 11, and thus does not include any additional taps.

FIG. 12is a simplified block diagram of a full-duplex wireless communication device700, in accordance with one exemplary embodiment of the present invention. Device700is similar to device200shown inFIG. 2except that device700also includes a delay matching circuit705and an amplifier710. Delay matching circuit705is adapted to account for relatively large delay variations that may be caused by temperature variation or environmental change near the antenna. Accordingly, delay matching circuit705is adapted to ensure that the signal received at signal combiner435falls within the time windows defined to reconstruct the self-interference signal. Amplifier710is adapted to amplify the reconstructed self-interference signal and compensate for power loss that occurs through the self-interference cancellation circuit450. Although delay matching circuit705is shown as being disposed between self-interference cancellation circuit450and signal splitter425, it is understood that in other embodiments, delay matching circuit705may be disposed between self-interference cancellation circuit450and signal combiner435. Likewise, although amplifier710is shown as being disposed between self-interference cancellation circuit450and signal combiner435, it is understood that in other embodiments, amplifier710may be disposed between self-interference cancellation circuit450and signal splitter425.

FIG. 13is a simplified block diagram of a full-duplex wireless communication device800, in accordance with one exemplary embodiment of the present invention. Device800is similar to device600shown inFIG. 11except that device800also includes a delay matching circuit805and an amplifier810. Delay matching circuit805is adapted to account for relatively larger delay variations that may be caused by temperature variation or environmental change near the antenna. Accordingly, delay matching circuit705is adapted to ensure that the signal received at coupler310falls within the time windows defined to reconstruct the self-interference signal, as shown for example with reference toFIG. 4. Amplifier810is adapted to amplify the reconstructed self-interference signal and compensate for power loss that occurs through the self-interference cancellation circuit650. Although delay matching circuit805is shown as being disposed between self-interference cancellation circuit600and coupler210, it is understood that in other embodiments, delay matching circuit805may be disposed between self-interference cancellation circuit600and coupler310. Likewise, although amplifier810is shown as being disposed between self-interference cancellation circuit600and coupler310, it is understood that in other embodiments, amplifier810may be disposed between self-interference cancellation circuit600and coupler210. Furthermore, although not shown, in yet other embodiments, each of one or more of the signal paths in self-interference cancellation circuit600may include an amplifier.

The above embodiments of the present invention are illustrative and not limitative. Embodiments of the present invention are not limited by the number of taps used in the signal cancellation circuit. Embodiments of the present invention are not limited by the type of delay element, attenuator, passive coupler, splitter, combiner, amplifier, or the like, used in the cancellation circuit. Embodiments of the present invention are not limited by the number of antennas used in a full-duplex wireless communication device. Embodiments of the present invention are not limited by the frequency of transmission or reception of the signal. Embodiment of the present invention are not limited by the type or number of substrates, semiconductor or otherwise, used to from a full-duplex wireless communication device. Other additions, subtractions or modifications are obvious in view of the present disclosure and are intended to fall within the scope of the appended claims.