High electron mobility transistor having reduced threshold voltage variation and method of manufacturing the same

According to example embodiments a transistor includes a channel layer on a substrate, a first channel supply layer on the channel, a depletion layer, a second channel supply layer, source and drain electrodes on the first channel supply layer, and a gate electrode on the depletion layer. The channel includes a 2DEG channel configured to generate a two-dimensional electron gas and a depletion area. The first channel supply layer corresponds to the 2DEG channel and defines an opening that exposes the depletion area. The depletion layer is on the depletion area of the channel layer. The second channel supply layer is between the depletion layer and the depletion area.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims priority under 35 U.S.C. §119 to Korean Patent Application No. 10-2011-0107057, filed on Oct. 19, 2011, and Korean Patent Application No. 10-2012-0059433, filed on Jun. 1, 2012 in the Korean Intellectual Property Office, the disclosure of each of which is incorporated herein in its entirety by reference.

BACKGROUND

Example embodiments relate to a power device and/or a manufacturing method thereof, and for example, to a high electron mobility transistor having reduced threshold voltage variation and/or a method of manufacturing the same.

2. Description of the Related Art

A high electron mobility transistor (HEMT) may include compound semiconductors having different polarizabilities. A 2-dimensional electron gas (2DEG) may be formed in a channel layer and used as a carrier. When a HEMT includes a thick AlGaN barrier layer, the concentration of 2DEG in a channel layer may increase so that a current during turn-on, that is, an ON current, may increase. Yet, when the thickness of the AlGaN barrier layer is thick, a degree of an energy band of the AlGaN barrier layer being raised by a depletion layer formed between a gate and the AlGaN barrier layer is small. Thus, the 2DEG may not be completely removed from the channel layer under the gate so that an operation of an enhanced mode (E-mode) of the HEMT may be difficult.

Some HEMTs include a recess in the AlGaN barrier layer under the gate. However, the thickness of the AlGaN barrier layer remaining under the recess may vary in an etch process to form the recess. Accordingly, the thickness of the AlGaN barrier layer remaining under the recess may be different for each HEMT. Accordingly, a threshold voltage Vth for turn-on may vary for each HEMT.

SUMMARY

Example embodiments relate to a high electron mobility transistor (HEMT) having reduced threshold voltage variation.

Example embodiments relate to a method of manufacturing a HEMT.

According to example embodiments, a high electron mobility transistor includes a substrate, a channel layer on the substrate, the channel layer including a 2DEG channel configured to generate a two-dimensional electron gas and a depletion area, a first channel supply layer on the channel layer, the first channel supply layer corresponding to the 2DEG channel and defining an opening that exposes the depletion area, a depletion layer on the first channel supply layer and on the depletion area of the channel layer, a second channel supply layer between the depletion layer and the depletion area, source and drain electrodes spaced apart on the first channel supply layer, and a gate electrode on the depletion layer.

The depletion layer may be one of contacted to and separated from at least one of the source and drain electrodes.

An insulation layer may be between the gate electrode and the depletion layer.

A polarizability of the depletion layer may be less than a polarizability of the first channel supply layer. The depletion layer may include a compound semiconductor layer doped with a p-type dopant.

A polarizability of the depletion layer may be less than a polarizability of the first channel supply layer. A concentration of a polarization generation component may vary according to a thickness of the depletion layer.

The first channel supply layer may contain an n-type dopant and may include at least one of aluminum (Al), gallium (Ga), and indium (In).

A thickness of the first channel supply layer may be about 20 nm to about 200 nm.

A polarizability of the second channel supply layer may be less than a polarizability of the first channel supply layer.

The depletion layer may include at least one of aluminum (Al), gallium (Ga), and indium (In).

The first and second channel supply layers may be compound semiconductor layers having the same elements but different composition ratios.

A thickness of the first channel supply layer may be about 20 nm to about 200 nm, and a thickness of the second channel supply layer may be about 5 nm to about 20 nm.

The first and second channel supply layers may have the same polarizability.

The gate electrode may be a metal or a nitride.

The first and second channel supply layers may have the same polarizability.

According to example embodiments, a method of manufacturing a transistor includes forming a channel layer on a substrate, forming a first channel supply film on the channel layer, the first channel supply film having a polarizability greater than a polarizability of the channel layer, forming a first channel supply layer by removing a part of the first channel supply film, the first channel supply layer defining an opening that exposes a depletion area of the channel layer, forming a second channel supply layer on the first channel supply layer and in the opening, forming a depletion layer on the second channel supply layer, forming source and drain electrodes spaced apart on the first channel supply layer, and forming a gate electrode on the depletion layer.

The method may further include forming an insulation layer between the gate electrode and the depletion layer.

A polarizability of the depletion layer may be less than a polarizability of the first channel supply layer. The depletion layer may include a compound semiconductor layer doped with a p-type dopant.

A polarizability of the depletion layer may be less than a polarizability of the first channel supply layer. A concentration of a polarization generation component of the depletion layer may vary according to a thickness of the depletion layer.

The first channel supply layer may contain an n-type dopant and include at least one of aluminum (Al), gallium (Ga), and indium (In).

The depletion layer may include at least one of aluminum (Al), gallium (Ga), and indium (In).

The first and second channel supply layers may be compound semiconductor layers having the same elements but different composition ratios.

The gate electrode may be a metal or a nitride.

The second channel supply layer and the depletion layer may be formed by an epitaxy method.

The first channel supply layer and the second channel supply layer may have the same polarizability.

A thickness of the first channel supply layer may be about 20 nm to about 200 nm. A thickness of the second channel supply layer may be about 5 nm to about 20 nm.

The gate electrode may include at least one of a metal and a nitride.

The forming the depletion layer may include an epitaxial method.

At least one of the source and drain electrodes may be separated from the depletion layer.

The method may further include reducing a surface roughness of the exposed area of the channel layer prior to forming the depletion layer.

In a HEMT according to example embodiments, after the channel supply layer is formed on the channel layer, a part formed under the gate electrode of the channel supply layer is completely removed. Thereafter, the depletion layer is directly grown by an epitaxy method on the channel layer where the channel supply layer is removed, or the depletion layer is sequentially grown with other channel supply layer having polarizability that is the same or less than that of the channel supply layer.

Since the depletion layer formed in the depletion area under the gate electrode is grown by an epitaxy method or the depletion layer and other channel supply layer are grown by an epitaxy method, the thickness of the material layer formed between the gate electrode and the channel layer may be accurately adjusted. Accordingly, the thickness of the material layer formed between the gate and the channel layer may be maintained constant for each HEMT within a margin of error. Thus, a change in the gate threshold voltage for each HEMT may be reduced (and/or minimized) so that operational reliability of HEMT may be improved.

Further, since the other channel supply layer is grown on the channel supply layer between the gate electrode and the drain electrode, the thickness of the channel supply layer between the gate electrode and the drain electrode become thicker under the gate electrode. Accordingly, even when the depletion layer exists between the gate electrode and the drain electrode, the 2DEG density is not lowered in the channel layer between the gate electrode and the drain electrode.

According to example embodiments, a transistor includes a channel layer including a 2DEG channel configured to generate a two-dimensional electrode gas and a depletion area, a first channel supply layer on the 2DEG channel and defining an opening that exposes the depletion area, a depletion layer on the first channel supply layer and the depletion area, source and drain electrodes spaced apart on the first channel supply layer, and a gate electrode on the depletion layer. The depletion layer may include a compound semiconductor containing nitrogen (N) and at least one of aluminum (Al), gallium (Ga), and Indium (In).

The transistor may include a second channel supply layer between the depletion layer and the depletion area.

A polarizability of the second channel supply may be less than a polarizability of the first channel supply layer.

The transistor may include an insulating layer between the gate electrode and depletion layer.

The depletion layer may further include a p-type dopant.

A polarizability of the depletion layer may be less than a polarizability of the first channel supply layer.

According to example embodiments, a high electron mobility transistor includes a substrate; source, gate and drain electrodes spaced apart on the substrate; a depletion layer over the gate electrode; a first channel supply layer on at least part of the depletion layer; and a channel layer on the depletion layer and the first channel supply layer. The channel layer includes a 2DEG channel corresponding to the first channel supply layer and a depletion area corresponding to the depletion layer.

DETAILED DESCRIPTION

FIG. 1is a cross-sectional view of a high electron mobility transistor (HEMT) according to example embodiments. Referring toFIG. 1, a buffer layer32is formed on a substrate30. The substrate30may include, for example, a silicon substrate, a silicon carbide (SiC) substrate, or an aluminum oxide (for example, Al203) substrate, but example embodiments are not limited thereto. The buffer layer32may be a compound semiconductor layer. For example, the buffer layer32may be a GaN layer, an AlGaN layer, or an AlGaInN layer. A seed layer may be further provided between the substrate30and the buffer layer32. A material layer34containing 2-dimensional electron gas (2DEG) G1exists on the buffer layer32. The material layer34may be a compound semiconductor layer, for example, a GaN layer. The 2DEG G1may be located under an upper surface of the material layer34. The 2DEG G1may be used as a channel carrier. The material layer34includes the 2DEG G1that is used as a channel carrier. The material layer34is hereinafter referred to as a channel layer34as a meaning of a material layer including a channel. The 2DEG does not exist in an area A1under the upper surface of the channel layer34. The area A1where the 2DEG is removed is hereinafter referred to as a depletion area A1. A first channel supply layer36exists on the channel layer34. The thickness of the first channel supply layer36may be equal to or greater than about 20 nm, for example, about 20 nm to about 200 nm. The thickness of the first channel supply layer36may be equal to or less than about 20 nm, for example about 1 nm to about 20 nm. The thickness of the first channel supply layer36may be determined according to polarizability of the first channel supply layer36. The first channel supply layer36may be a compound semiconductor layer. The polarizability and band gap of the first channel supply layer36may be greater than those of the channel layer34. The 2DEG G1is generated in the channel layer34according to a difference in the polarizability and band gap between the channel layer34and the first channel supply layer36. A compound semiconductor of the first channel supply layer36may be AlxGa(1-x-y)InyN. Here, x may be defined as 0<x≦1 and y may be defined as 0≦y<1, and 0<x+y≦1. For example, the first channel supply layer36may include any one of AlN, AlGaN, AlInN, and AlGaInN. The first channel supply layer36exists on the upper surface of the channel layer34corresponding to the 2DEG G1. The first channel supply layer36does not exist on the depletion area A1of the channel layer34. A second channel supply layer38covering the channel layer34and the depletion area A1exists on the first channel supply layer36. The second channel supply layer38may cover a partial area of an upper surface of the first channel supply layer36. Although it is less than the first channel supply layer36, the second channel supply layer38may affect the generation of the 2DEG G1of the channel layer34. The thickness of the second channel supply layer38may be equal to or less than about 20 nm, for example, thicker than about 1 nm and thinner than about 20 nm, for example thicker than about 5 nm and thinner than about 20 nm.

As the second channel supply layer38is provided on the first channel supply layer36the thickness of the first and second channel supply layers36and38may be thicker than the second channel supply layer38formed in the depletion area A1. The second channel supply layer38in the depletion area A1has a recess form according to a step of the first channel supply layer36at a boundary of the depletion area A1. The second channel supply layer38may be a compound semiconductor layer. A compound semiconductor of the second channel supply layer38may be AlxGa(1-x-y)InyN. Here, x may be defined as 0<x≦1 and y may be defined as 0≦y<1, and 0<x+y≦1. The polarizability of the second channel supply layer38may be less than that of the first channel supply layer36. Alternatively, the polarizability of the second channel supply layer38may be the same as that of the first channel supply layer36. The first and second channel supply layers36and38may be the same compound semiconductor layer. In this case, a content of a particular component, for example, aluminum (Al) or indium (In), of the first and second channel supply layers36and38may be different from each other. For example, when both of the first and second channel supply layers36and38are AlGaN layers, the aluminum content of the first channel supply layer36may be about 35% and that of the second channel supply layer38may be 20%, or vice versa. The first and second channel supply layers36and38may be doped with an n-type dopant. Silicon (Si) may be used as the n-type dopant and magnesium (Mg) may be used as the p-type dopant, but example embodiments are not limited thereto.

A depletion layer40exists on the second channel supply layer38. The depletion layer40may cover the recessed part of the second channel supply layer38and the circumference thereof. The overall thickness of the first and second channel supply layers36and38existing over the 2DEG G1is thicker than the thickness of the second channel supply layer38formed in the depletion area A1of the channel layer34. Thus, the influence of the depletion layer40is limited to the depletion area A1and thus the existence of the depletion layer40does not affect the density of the 2DEG G1. The thickness of the depletion layer40may be 5 to 500 nm.

Although 2DEG is generated in the depletion area A1of the channel layer34by the second channel supply layer38, the 2DEG is removed by the depletion layer40. Accordingly, the 2DEG does not exist in the depletion area A1. Even if the 2DEG exists in the depletion area A1, an amount of the 2DEG is very small, compared to that of the 2DEG G1, so that an influence of the 2DEG may be disregarded. The depletion layer40may be a compound semiconductor layer or a nitride layer. The compound semiconductor layer may be doped with a p-type dopant such as magnesium, for example, and include any one of a GaN layer, an AlGaN layer, an AlInN layer, an AlInGaN layer, and an InGaN layer. Among these compound semiconductor layers, an InGaN layer may not include a dopant. When the depletion layer40is a nitride layer, the depletion layer40may be, for example, an InN layer. The InN layer may be doped with a p-type dopant or may not include such a dopant. The depletion layer40may include a p-type semiconductor layer or a dielectric layer.

The depletion layer40may include a 2-dimensional hole gas (2DHG) G2according to a difference in the polarizability from the first channel supply layer36. The second channel supply layer38may affect the formation of the 2DHG G2. The 2DHG G2exists around a boundary surface of the second channel supply layer38and the depletion layer40. When the 2DHG G2is removed together with the 2DEG G1, space charge of the HEMT ofFIG. 1may generally become neutral. Thus, the HEMT ofFIG. 1may become a super junction HEMT having a very large breakdown voltage.

A source electrode42S and a drain electrode42D are formed on the first channel supply layer36in an area where the second channel supply layer38is not formed. The source electrode42S and the drain electrode42D face each other with the depletion area A1interposed therebetween. The depletion area A1of the channel layer34may be closer to the source electrode42S than the drain electrode42D. The source electrode42S and the drain electrode42D contact the second channel supply layer38and the depletion layer40. A gate electrode44exists on the depletion layer40. The gate electrode44may be disposed in the depletion area A1of the channel layer34. The gate electrode44may be a metal gate or a nitride gate. When the gate electrode44is a metal gate, the gate electrode44may be formed of a first metal making an Ohmic contact with the depletion area A1or a second metal making a Schottky contact with the depletion layer40. The first metal may be metal having a work function of equal to or greater than 4.5 eV, for example, any one of nickel (Ni), iridium (Ir), platinum (Pt), and gold (Au). The second metal may be metal having a work function of less than 4.5 eV, for example, any one of titanium (Ti), aluminum (Al), hafnium (Hf), tantalum (Ta), and tungsten (W). When the gate electrode44is a nitride gate, the gate electrode44may be formed of a transition metal nitride. The transition metal nitride may be, for example, TiN, TaN, or WN. Further, the gate electrode44may be a gate formed of germanium (Ge) or polysilicon containing conductive impurities.

As illustrated inFIG. 2A, the depletion layer40A may be separated from the source electrode42S and the drain electrode42D. Also, as shown inFIG. 2B to 2C, the depletion layer40B may be separated from the source electrode42S, but not the drain electrode42D. Also, as shown inFIG. 2C, the depletion layer40C may be separated from the drain electrode42D, but not the source electrode42S. The source electrode42S and the drain electrode42D may include at least one metal or metal nitride, for example at least one of Au, Ni, Pt, Ti, Al, Pd, Ir, W, Mo, Ta, Cu, TiN, TaN, and WN, but example embodiments are not limited thereto. Also, as illustrated inFIG. 3, an insulation layer46for reducing (and/or preventing) a leakage current may be further provided between the gate electrode44′ and the depletion layer40. The insulation layer46may be a silicon oxide layer or a nitride layer. The insulation layer46may be applied to the HEMT ofFIGS. 2A to 2C.

FIG. 4is a cross-sectional view of a HEMT according to example embodiments. The following description will focus only on differences from the HEMT illustrated inFIG. 1.

Referring toFIG. 4, a second depletion layer50covering the depletion area A1of the channel layer34is provided in a partial area of the first channel supply layer36. The second depletion layer50may have a thickness of 1 to 100 nm. The second depletion layer50may be a compound semiconductor layer doped with a p-type dopant, for example, a p-type AlGaN layer. The second depletion layer50may be a compound semiconductor layer in which a content of a polarization generation element gradually changes. For example, the second depletion layer50may be an AlGaN layer having a p-doping effect in which an aluminum (Al) content gradually decreases from a bottom surface to a top surface so that a polarization density gradually decreases. The second depletion layer50may be an AlInN layer or an AlInGaN layer in addition to the AlGaN layer. The second depletion layer50may be disposed at the same position as the second channel supply layer38ofFIG. 1. The source electrode42S and the drain electrode42D exist on an upper surface of the first channel supply layer36in an area where the second depletion layer50does not exist. The source electrode42S and the drain electrode42D may contact the second depletion layer50. The gate electrode44exists on the second depletion layer50.

As illustrated inFIG. 5, the insulation layer46may be further provided between the second depletion layer50and the gate electrode44′.

As illustrated inFIG. 24A, the depletion layer50A may be separated from the source electrode42S and the drain electrode42D. Also, as shown inFIG. 24B, the depletion layer50B may be separated from the source electrode42S, but not the drain electrode42D. Also, as shown inFIG. 24C, the depletion layer50C may be separated from the drain electrode42D, but not the source electrode42S.

Referring toFIGS. 6-11, a method of manufacturing a high electron mobility transistor (HEMT) according to example embodiments will be described. In this process, like reference numerals refer to the like elements throughoutFIGS. 1-5and related descriptions are omitted herein.

Referring toFIG. 6, the buffer layer32is formed on the substrate30. A seed layer (not shown) may be formed between the substrate30and the buffer layer32. The channel layer34is formed on the buffer layer32. The channel layer34may be formed by an epitaxy method. The first channel supply film36′ is formed on the channel layer34. The 2DEG G1is generated under an upper surface of the channel layer34according to a difference in polarizability between the first channel supply film36′ and the channel layer34. The first channel supply film36′ may be formed by an epitaxy method. When the first channel supply film36′ is a material layer doped with an n-type dopant such as silicon (Si), the n-type dopant may be doped in a process of growing the first channel supply film36′. The growth of the first channel supply layer36′ and the injection of the n-type dopant may be performed by an in-situ method. After the first channel supply film36′ is formed, a mask M1is formed on an upper surface of the first channel supply film36′. The mask M1is formed to expose an area A2that is a part of an upper surface of the first channel supply layer36′. The area A2that is a partially exposed area of the upper surface of the first channel supply layer36′ corresponds to the depletion area A1of the channel layer34ofFIG. 1. After the mask M1is formed, the area A2is removed. Then, the mask M1is removed.

As illustrated inFIG. 7, an area A3that is a part of an upper surface of the channel layer34is exposed. As a part formed in the area A3that is an exposed area of the channel layer34is removed from the first channel supply film36′ to form the first channel supply layer36″, the 2DEG G1is removed from the area A3of the channel layer34. The area A3of the channel layer34corresponds to the depletion area A1ofFIG. 1.

The area A2of the first channel supply film36′ (seeFIG. 6) may be removed by anisotropy dry etching. The roughness of a surface of the area A3of the channel layer34may be increased by the above etching. Thus, a resultant ofFIG. 7is wet etched to reduce the roughness of the surface of the area A3of the channel layer34. TMAH or KOH is used as an etchant for the wet etching. The surface roughness (rms) of the area A3of the channel layer34due to the wet etching may be reduced to a level similar to that before the first channel supply film36′ is anisotropically dry etched. For example, while the surface roughness of the upper surface of the channel layer34before the anisotropic dry etching is about 1 Å, that of the area A3of the channel layer34after the anisotropic dry etching is increases to about 2 Å. However, after the wet etching, the roughness of the surface of the area A3of the channel layer34is decreased to about 1 Å.

Next, referring toFIG. 8, after the wet etching, the second channel supply layer38′ covering the area A3of the channel layer34is formed on the first channel supply layer36″. The second channel supply layer38′ may be formed by an epitaxy method. Although the second channel supply layer38′ may be formed at the same composition as the first channel supply layer36″, a content of one component of the composition may be different from that of the first channel supply layer36″. For example, the second channel supply layer38′ like the first channel supply layer36″ may be formed by growing the AlGaN layer, in which an Al content may be smaller than that of the first channel supply layer36″. A step exists between the area A3of the channel layer34and the first channel supply layer36″. The step is directly transferred to the second channel supply layer38′. Accordingly, after the second channel supply layer38′ is formed, the second channel supply layer38′ is formed to be recessed in the area A3of the channel layer34. After the second channel supply layer38′ is formed, a second 2DEG G3may be generated in the area A3of the channel layer34due to a difference in polarizability between the second channel supply layer38′ and the channel layer34. The density of the second 2DEG G3is lower than the 2DEG G1generated in the channel layer34under the first channel supply layer36″ due to the first channel supply layer36″.

Next, referring toFIG. 9, the depletion layer40′ is formed on the second channel supply layer38′. The depletion layer40′ may be formed by an epitaxy method. The recess form of the second channel supply layer38′ is transferred to the depletion layer40′. Accordingly, the depletion layer40′ is formed in the area A3of the channel layer34in a recess form. The second 2DEG G3generated in the area A3of the channel layer34is removed while the depletion layer40is formed.

The mask M2is formed on the depletion layer40′. The mask M2covers the area A3of the channel layer34and a partial area of the depletion layer40′ corresponding to an area around the area A3of the channel layer34. An area where source and drain electrodes are formed may be limited by the mask M2.

Referring toFIG. 10, the depletion layer40′ and the second channel supply layer38″ around the mask M2are sequentially etched to form the depletion layer40and the second channel supply layer38. The etching may be performed until the upper surface of the first channel supply layer36is exposed. After the etching, the mask M2is removed. During the etching, a part of the first channel supply layer36may be etched. Accordingly, a first area36A and a second area36B of the upper surface of the first channel supply layer36are exposed. The first area36A and the second area36B are separated from each other and face each other with the area A3of the channel layer34interposed therebetween. The first area36A may be closer to the depletion area A3than the second area36B. The source electrode42S is formed in the first area36A, and the drain electrode42D is formed in the second area36B, as illustrated inFIG. 11. The source and drain electrodes42S and42D may be formed by a lift-off method by which an electrode material layer (not shown) is formed on the mask M2in the first and second areas36A and36B before the mask M2is removed from a resultant ofFIG. 10, and then the mask M2is removed.

Referring toFIG. 11, the source electrode42S and the drain electrode42D contact the second channel supply layer38and the depletion layer40.

Referring toFIG. 12, the gate electrode44is formed on the depletion layer40. An insulation layer or a gate insulation layer (not shown) may be further formed between the gate electrode44and the depletion layer40.

Next, a method of manufacturing a HEMT ofFIG. 2Awill be described with reference toFIGS. 13-18. In the following description, different points from the above-described manufacturing method with reference toFIGS. 6-12will be mainly discussed.

Referring toFIG. 13, the process of forming the buffer layer32, the channel layer34, the first channel supply layer36, and the second channel supply layer38on and above the substrate30may be the same as that described with reference toFIGS. 6-8.

The depletion layer40A covering a recessed part of the second channel supply layer38and a part around the same is formed on the second channel supply layer38. The area of the second channel supply layer38covered the depletion layer40A is smaller than that of the second channel supply layer38covered by the depletion layer40inFIG. 10. In other words, the size of the depletion layer40A ofFIG. 13is smaller than that of the depletion layer40ofFIG. 10.

Referring toFIG. 14, a mask M3covering the depletion layer40and a part of the second channel supply layer38around the depletion layer40is formed on the second channel supply layer38. Next, the second channel supply layer38around the mask M3is etched as illustrated inFIG. 15, thereby exposing the first channel supply layer36. After the first channel supply layer36is exposed, an exposed part of the first channel supply layer36may be further etched within a particular thickness range.

Referring toFIG. 16, a conductive layer42is formed in an exposed area of the first channel supply layer36. The conductive layer42may be formed of a material for forming the source and drain electrodes42S and42D. The conductive layer is formed on the mask M3as well. After the conductive layer42is formed, the mask M3is removed. During the removal of the mask M3, a part of the conductive layer42formed on the mask M3is removed. After the mask M3is removed, the conductive layer42remaining at both sides of the depletion layer40are used as the source and drain electrodes42S and42D as illustrated inFIG. 17. InFIG. 16, the depletion layer40and the conductive layer42are separated from each other by the mask M3. Accordingly, after the mask M3is removed, the depletion layer40and the source and drain electrodes42S and42D are separated from each other as illustrated inFIG. 17. After the mask M3is removed, the gate electrode44is formed on the depletion as illustrated inFIG. 18.

Next, the method of manufacturing a HEMT illustrated inFIG. 4is described with reference toFIGS. 19-22. Only a different part from the above-described method will be described below.

Referring toFIG. 19, the second depletion film50′ covering the exposed area A3of an upper surface of the channel layer34is formed on the first channel supply layer36. The second depletion film50′ may be formed by an epitaxy method. A part of the second depletion film50′ formed in the exposed area A3of the channel layer34is recessed due to the step of the first channel supply layer36. The mask M4is formed on the second depletion film50′. The mask M4covers the recessed part of the second depletion film50′ and an area around the same and thus defines areas where the source and drain electrodes are to be formed. After the mask M4is formed, as illustrated inFIG. 20, the exposed part of the second deletion layer50around the mask M4is etched. The etching is performed until the first channel supply layer36is exposed. As a result, the second depletion layer50is formed.

Referring toFIG. 21, the conductive layer42is formed in an area of the first channel supply layer36exposed by the above etching. The conductive layer42is formed on the mask M4. When the mask M4is removed after the conductive layer42is formed, the conductive layer42formed on the mask M4is removed with the mask M4. As such, the conductive layer42is left only on the first channel supply layer36. The conductive layer42remaining on the first channel supply layer36at both sides of the second depletion layer50is used as the source drain42S and the drain electrode42D as illustrated inFIG. 22. The conductive layer42remaining on the first channel supply layer36contacts a side surface of the second depletion layer50.

After the mask M4is removed, another mask covering the second depletion layer50is formed and then a subsequent process may be performed. By doing so, a HEMT in which the source and drain electrodes42S and42D and the second depletion layer50are separated from each other may be formed.

FIG. 23shows a result of a simulation about the density of the 2DEG G1and the 2DHG G2between the gate electrode44and the source and drain electrodes42S and42D measured when the channel layer34is a GaN layer, the first channel supply layer36is an Al35GaN15layer or an Al20GaN15layer, the second channel supply layer38is an Al20GaN15layer or an Al35GaN15 layer, and the depletion layer40is a p-GaN layer. InFIG. 23, a first peak P1denotes a 2DEG density and a second peak P2denotes a 2DHG density.

Referring toFIG. 23, when the compositions of the first and second channel supply layers36and38are the same, it can be seen that the density of the 2DEG and 2DHG are high over about 1018/cm3 even when the composition ratios of the respective layers are different from one another. Thus, when the compositions of the first and second channel supply layers36and38are the same, by making the composition ratios of the respective layers different from one another, the density of the 2DEG of the channel layer34between the gate electrode44and the drain electrode42D may be maintained high and the density of the 2DHG of the depletion layer40between the gate electrode44and the drain electrode42D may be maintained high.

FIGS. 25A to 25Bare cross-sectional views that illustrate HEMTs according to example embodiments.

Referring toFIG. 25A, a HEMT according to example embodiments includes a source electrode110, a gate electrode112, and a drain electrode114spaced apart on a substrate105. A depletion layer104is formed over the gate electrode112, and a first channel supply layer103is formed on sides of the depletion layer104.

A channel layer102and a passivation layer101are on the first channel supply layer103and the depletion layer104. As shown inFIG. 25A, the channel layer102may include a depletion area A1at an interface with the depletion layer104and include a region G1at an interface with the first channel supply layer103that contains a 2-dimensional electron gas (2DEG).

FIG. 25Bis a cross-sectional view of a HEMT according to example embodiments. The following description will focus only on differences from the HEMT illustrated inFIG. 25A.

As illustrated inFIG. 25B, instead of the depletion layer104, a HEMT according to example embodiments includes a second channel supply layer106between a depletion layer107and the first channel supply layer103.

FIGS. 26A to 26Gare cross-sectional views illustrating a method of making a HEMT by stages, according to example embodiments.

Referring toFIG. 26A, an electrode layer116is formed on a substrate105. The substrate105may include, for example, a silicon substrate, a silicon carbide (SiC) substrate, or an aluminum oxide (for example, Al2O3) substrate, but example embodiments are not limited thereto. The electrode layer116may include a metal or a metal nitride. As illustrated inFIG. 26B, the electrode layer116is patterned into source110, gate112, and drain114electrodes. As illustrated inFIG. 26C, a depletion film104′ is formed over the source electrode110, gate electrode112, and drain114electrodes. The depletion film104′ may contain the same material as the depletion layer50described above with reference toFIG. 4, but example embodiments are not limited thereto.

Next, as illustrated inFIG. 26D, a depletion layer104is formed by etching back the depletion film104′ formed over the source110, gate112, and drain114electrodes. As illustrated inFIG. 26E, a first channel supply film103′ is formed over the depletion layer. The first channel supply film103′ may contain the same the material as the first channel supply layer36described above with reference toFIG. 4, but example embodiments are not limited thereto. As illustrated inFIG. 26F, a first channel supply layer103is formed by etching back the first channel supply film103′. The first channel supply layer103may partially expose the depletion layer104. Next, as illustrated inFIG. 26G, a channel layer102and a passivation layer101are sequentially formed over the first channel supply layer103. The channel layer102may contain the same material as the channel layer34described above with reference toFIG. 4, but example embodiments are not limited thereto. The passivation layer may contain an insulating material, such as an oxide (e.g., silicon oxide) or an insulating polymer material, but example embodiments are not limited thereto.

WhileFIGS. 26A to 26Gillustrate a method according to example embodiments of forming a HEMT that includes a depletion layer104, one having ordinary skill in the art would appreciate that a depletion layer107may be formed on a second channel supply layer106(as shown inFIG. 25B) instead of forming the depletion layer104. Referring toFIG. 25B, the second channel supply layer106and the depletion layer107may include the same materials as the second channel supply layer38and depletion layer40, respectively, as described above with reference withFIG. 1.

While some example embodiments have been particularly shown and described, it will be understood by one of ordinary skill in the art that variations in form and detail may be made therein without departing from the spirit and scope of the claims. Descriptions of features or aspects of some HEMTs according to example embodiments should typically be considered as available for other similar features or aspects in other HEMTs according example embodiments.