Method for reducing dimensions between patterns on a photoresist

A semiconductor manufacturing method that includes providing a substrate, providing a layer of material over the substrate, providing a layer of photoresist over the material layer, patterning and defining the photoresist layer, depositing a layer of polymer over the patterned and defined photoresist layer, wherein the layer of polymer is conformal and photo-insensitive, and etching the layer of polymer and the layer of material.

DESCRIPTION OF THE INVENTION

1. Field of the Invention

This invention relates in general to a semiconductor manufacturing process and, more particularly, to a photolithographic method having reduced dimensions between patterns on a photoresist.

2. Background of the Invention

With sub-micron semiconductor manufacturing process being the prevalent technology, the demand for a high-resolution photolithographic process has increased. The resolution of a conventional photolithographic method is primarily dependent upon the wavelength of a light source, which dictates that there be a certain fixed distance between patterns on a photoresist. Distance separating patterns smaller than the wavelength of the light source could not be accurately patterned and defined.

Prior art light sources with lower wavelengths are normally used in a high-resolution photolithographic process. In addition, the depth of focus of a high-resolution photolithographic process is shallower compared to a relative low-resolution photolithographic process. As a result, a photoresist layer having a lower thickness is required for conventional photolithographic methods. However, a photoresist layer having a lower thickness is susceptible to the subsequent etching steps in a semiconductor manufacturing process. This relative ineffective resistance to etching reduces the precision of patterning and defining of a photoresist. These limitations prevent the dimensions of patterns on a photoresist from being reduced.

It is accordingly a primary object of the invention to provide a method for reducing the distance separating patterns on a photoresist layer. In addition, it is another object of the invention to provide a method to enhance the etching resistance of a patterned photoresist layer.

SUMMARY OF THE INVENTION

In accordance with the present invention, there is provided a semiconductor manufacturing method that includes defining a substrate, providing a layer of material over the substrate, providing a layer of photoresist over the layer of semiconductor material, patterning and defining the photoresist layer to form at least two photoresist structures, wherein each of the photoresist structures includes substantially vertical sidewalls and a substantially horizontal top, and wherein the photoresist structures are separated by a space, depositing a layer of polymer on the tops of the photoresist structures and the space separating the photoresist structures, wherein an amount of the polymer deposited on the tops of the photoresist structures is less than an amount of the polymer deposited on the sidewalls of the photoresist structures, and etching the polymer layer on the tops of the photoresist structures and the in space between the photoresist structures, and the layer of semiconductor material.

In one aspect, the step of depositing a layer of polymer is performed at a temperature lower than a stability temperature of the patterned and defined photoresist layer.

DESCRIPTION OF THE EMBODIMENTS

FIGS. 1-3Bare cross-sectional views of the semiconductor manufacturing process steps of the present invention. Referring toFIG. 1, the method of the present invention begins by defining a wafer substrate100. Wafer substrate100may be of any known semiconductor substrate material, such as silicon. A first layer110is then provided over wafer substrate100. In one embodiment, first layer110is a semiconductor material, such as polysilicon. First layer110may also be a dielectric layer or a metal layer. First layer110may be deposited over wafer substrate100by any known deposition process. In another embodiment, first layer110is a dielectric material, in which case first layer110may be deposited or grown over wafer substrate100.

An anti-reflection coating (ARC) layer120may optionally be provided over first layer110to decrease the reflection from first layer110in the subsequent manufacturing steps. A photoresist layer130is then provided over ARC layer120. In an embodiment in which an ARC layer is not provided, photoresist layer130is deposited over first layer110. Photoresist layer130is then patterned and defined using a known photolithographic process to form a patterned and defined photoresist layer having a plurality of photoresist structures130. Photoresist structures130include substantially vertical sidewalls132and substantially horizontal tops134. When first layer110is a semiconductor material, photoresist structures130function as masks to form conductors from first layer110.

Referring toFIG. 2, a second layer150is deposited over patterned and defined photoresist layer130by a known chemical vapor deposition apparatus140. Known chemical vapor deposition processes include plasma enhanced chemical vapor deposition (PECVD) and low pressure chemical vapor deposition (LPCVD). Second layer150may be organic or inorganic, and is photo-insensitive. In one embodiment, second layer150is a polymer layer. In another embodiment, second layer150is substantially conformal, covering both tops134and sidewalls132of photoresist structures130. In addition, the step of depositing second layer150is performed at a temperature lower than the stability temperature of photoresist structures130. In other words, second layer150is deposited at a temperature not affecting the structural stability of photoresist structures130.

After the deposition of second layer150, the space between photoresist structures130is decreased, for example, from 0.22 microns to 0.02 microns.

In the PECVD process, the pressure used is in the range of approximately 5 mTorr to 30 mTorr. The source power ranges from approximately 900 watts to 1800 watts and the bias power ranges from 0 to 1300 W. The deposition rate is between approximately 3,000 Å per minute and 6,000 Å per minute. In addition, polymer layer150comprises at least one hydrocarbon partially substituted by fluorine, the source for forming polymers. The partially-substituted hydrocarbons may be chosen from difluoromethane (CH2F2), a mixture of difluoromethane and octafluorobutene (C4F8), and a mixture of difluoromethane and trifluoromethane (CHF3). In one embodiment, when the partially-substituted hydrocarbons include CH2F2only, the thickness “a” of a portion of the polymer layer150is the same as the thickness “b” of another portion of the polymer layer150.

Moreover, argon (Ar) and carbon monoxide (CO) may be mixed with the gases introduced during the PECVD process. Argon acts as a carrier to enhance etch uniformity of photoresist layer130and ARC layer120. The function of carbon monoxide is to capture fluorine radicals and fluoride ions generated by the fluoro-substituted hydrocarbons. As such, etching of the polymers during the deposition process is prevented, thereby enhancing the deposition rate of polymer layer150. Oxygen (O2) and nitrogen (N2) gases also can be added to the PECVD process. Contrary to the function of the carbon monoxide, the presence of oxygen serves to etch polymer layer150. Therefore, the deposition rate of polymer layer150can be controlled. Also, perfluorohydrocarbons, such as hexafluoroethane (C2F6) and tetrafluoromethane (CF4), can be mixed with the gases combined with the plasma during deposition because these gases, similar to the oxygen gas, etch polymer layer150.

In one embodiment, when the gases used during deposition of second layer150include approximately 10 to 30 sccm of C4F8, 10 to 30 sccm of CH2F2, 50 to 150 sccm of CO, and 100 to 300 sccm of argon (Ar), the amount of second layer150deposited on tops134of the photoresist structures130is substantially greater than the amount adhered to sidewalls132. In another embodiment, when the gases used during deposition of second layer150include approximately 10 to 30 sccm of C4F8, 0 to 15 sccm of CH2F2, 0 to 50 sccm of CO, and 100 to 300 sccm of argon (Ar), and the bias power is greater than approximately 400 W, the amount of second layer150deposited on tops134of photoresist structures130is substantially less than the amount adhered to sidewalls132.

Referring toFIGS. 3A and 3B, second layer150, photoresist structures130, ARC layer120, and first layer110are etched anisotropically with a plasma-based dry etching process. The dry etching process uses plasma160as etchant. In an embodiment in which “a” is thicker than “b,” the thickness of second layer150changes from “a” to “a-b” after second layer150deposited over ARC layer120is completely etched away. This shows that second layer150provides excellent resistance to the plasma etch process and therefore enhances the etching resistance of photoresist structures130.

As shown inFIG. 3B, when the anisotropic dry etching process continues, second layer150acts as an etch stop and remains on sidewalls132of photoresist structures130. Thus, the dimensions between the patterned photoresist and underlying patterned first layer110are reduced. Photoresist structures130may be removed using any conventional process.