Base element for a multiplexer structure and corresponding multiplexer structure

A divided multiplexer structure which can be used to replace a tristate bus, comprising node elements which are embodied in such a way that no feedback can occur in between the interconnected nodes. For this purpose, each node includes at least one feedback-free connection port.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates generally to a base element and, more particularly, to a base element, which can be used for constructing a multiplexer structure.

2. Related Art

A tristate bus is preferably used wherever data is exchanged between different periphery or data transmission and receiving units. Possible areas of application are thus, for example, computer or chip technology etc.

In many designs, the tristate bus is replaced by a cascaded multiplexer structure, in which all bus or data signals of the coupled data transmission and data receiving units must flow via the last stage of the cascade. A corresponding example is illustrated in FIG.4. As shown byFIG. 4, several data transmission and data receiving units1designated below as “modules” for the sake of simplicity are interconnected in a cascade through logic OR gates7. Each module1has a data input IN, via which a corresponding module-specific data signal can be supplied to the tristate bus or multiplexer structure. For this purpose, a logic AND gate6is illustrated inFIG. 4for each module1, to which on the one hand the data input signal IN and on the other hand an enabling signal EN are supplied, whereby the interconnection or output of the corresponding data signal IN can be controlled by means of the enabling signal EN. All data signals of the connected modules1must flow via the last stage of the illustrated cascade. This last stage then distributes all input signals IN of the multiplexer structure back to the inputs of the driving modules1. A disadvantage associated with this cascaded multiplexer structure is due to the fact that all input signals IN must converge at a central point in the circuit layout and be routed back from there to all coupled modules1via-buffer8, which results in unfavourable load distribution. Thereby, a high unit density (“routing congestion”) occurs at this central point in the circuit layout as well as the need for the buffers8shown inFIG. 4, which together form a so-called “buffer tree”.

The underlying object of the present invention is to create a base element for an alternative multiplexer structure and a multiplexer structure comprising several such base elements, which can be used to replace a tristate bus, and avoids the disadvantages associated with the use of a cascaded multiplexer structure, in particular unfavourable load distribution within the circuit.

SUMMARY OF THE INVENTION

In one aspect of the invention, a base element for a multiplexer structure, with several connection points comprising a signal input and a signal output, and with signal distribution means, which communicate with the individual signal inputs and signal outputs, in order to pass on a signal at a signal input of a connection point to at least one of the signal outputs is disclosed. The signal distribution means are embodied in such a way that for at least one particular connection point they prevent a signal at the signal input of this particular connection point being passed on to the signal output of the same particular connection point and for at least another connection point they pass on a signal at the signal input of this other connection point to the signal output of the same other connection point. The signal distribution means are further embodied in such a way that they pass on the signal at the signal input of the particular connection to the signal outputs of all other connection points and a signal at a signal input of another connection point to the signal output of the particular connection point.

In another aspect of the invention, a multiplexer structure, with several base elements and several transmission/receiving units coupled to the base elements for the exchange of data between one another via the base elements is disclosed. Each base element has several connection points in each case with a data input and a data output, wherein each base element further comprises data distribution means communicating with the individual data inputs and data outputs to pass on a data signal at a data input of a connection point to at least one of the data outputs. The data distribution means prevent, for at least one particular connection point, a data signal at the data input of this particular connection point being passed on to the data output of the same particular connection point and that for at least another connection point they pass on a signal at the signal input of this other connection point to the signal output of the same other connection point.

Various embodiments of the present invention provide certain advantages and overcome certain drawbacks of the above and other conventional techniques. Not all embodiments of the present invention share the same advantages and those that do may not share them under the same or similar circumstances. Further features and advantages of the present invention as well as the structure and operation of various embodiments of the present invention are described in detail below with reference to the accompanying drawings.

DETAILED DESCRIPTION

The present invention is directed to a base or node element which can be used to construct a divided multiplexer structure. One embodiment of the base element includes several connection points comprising a signal input and a signal output. At the same time, the base element is embodied in such a way that at least one of these connection points or ports is feedback-free and at least one other of these connection points has feedback, so that a further base or node element can be coupled to this connection point. This can be realized by suitable logic circuits, which ensure that at least one connection point is feedback-free and at least one other connection point has feedback.

By means of such base or node elements, chains of similarly constructed nodes can be formed, to which again several data input and data output units or modules can be coupled. The individual node elements are preferably embodied in such a way that each node output always drives the same number of data inputs, which results in very favourable load distribution. Additional advantages include favourable electrical features (smaller drivers, no short-term overloading due to overlapping), simple handling (homogeneously-constructed elements, timing verification with standard methods) and favourable layout behaviour (regular unit density). At the same time, those connection points which do not need to be feedback-free can be designed with feedback, whereby the cost of the base element is reduced.

In certain embodiments two base elements are interconnected in the multiplexer structure so that each base element is coupled to the other base element via a connection point without feedback. In this way, two connection points without feedback always lie between two base elements. This prevents feedback being formed over several base elements, which could occur under certain circumstances when only one feedback-free input were to lie in between two interconnected base elements.

The present invention is, in particular, suitable for chip packages with an on-chip tristate bus. Naturally, the present invention is, however, also suitable for any other scope of application, where a multiplexer structure with several data transmission and data receiving units (“modules”) could be used to replace a tristate bus.

Before dealing in greater detail with the exemplary embodiments of the invention, a node structure which forms the basis of the present invention, but having unwanted feedback at a connection point between two nodes, will be described with reference to FIG.3.

As shown byFIG. 3, each node or base element2has four connection points or connection ports in each case with a signal input Ai, Bi, Ci, Di and a signal output Ao, Bo, Co, Do. Modules1in each case can be coupled to the individual connection ports, in the case of which essentially data transmission and data receiving units are concerned, which exchange data between one another via the node or multiplexer structure illustrated. The nodes2are embodied in such a way that a signal, which is received at a connection port is passed onto the data outputs of all four connection ports. A simple structure of a node2can be realized by a quadruple OR gate. With the example shown inFIG. 3, however, a node2with a quadruple AND gate is realized, whereby the connected modules1in a state of rest drive logic “1” to the bus. This is achieved due to the fact that each module1has a logic OR gate, to which on the one hand the corresponding data input signal IN and an enabling signal EN is supplied, whereby the enabling signal EN in each case is active on a low level. Only the module1active in each case can also transmit a logic “0” to the bus.

As shown byFIG. 3, where nodes2constructed in this way are coupled, a feedback loop illustrated with a dotted line inFIG. 3results, which is wanted at those connection ports, to which modules1are coupled, in order to transmit the data input signal at a connection port to a module1coupled to another connection port in the form of a data output signal. The disadvantage of the node structure shown inFIG. 3, however, is that two nodes2cannot be interconnected due to this feedback, since the resulting bus does not function through the logic loop formed in this way, as also evident from the illustration ofFIG. 3concerning the connection ports Bi, Bo of the left node2and the connection ports Do, Di of the right node2.

InFIG. 1, several interconnected nodes2according to one aspect of the present invention are illustrated, whereby the problem described above is solved in such a way that each node2possesses a feedback-free connection port, to which a further node2can be coupled. Hereby, it is possible to construct a network of nodes2. In regard to the interconnection of the nodes2to a divided bus or divided multiplexer structure, it must be ensured that in each case at least one feedback-free connection port always lies between two adjacent nodes2and the modules1are coupled to connection ports with feedback. InFIG. 1, the feedback-free connection ports of the nodes2in each case are shown with a broken line and in each case include the signal input Bi and the signal output Bo. All other connection ports Ai, Ao, Ci, Co and Di, Do comprise a feedback.

With the embodiment illustrated inFIG. 1, the connection ports Bi, Bo are feedback-free due to the fact that a quadruple AND gate4is proposed, to which the input signals of all connection ports are supplied, whereby the output signal of this quadruple AND gate4is only passed onto the signal outputs Ao, Co, Do—not however to the signal output Bo. In addition, a logic triple AND gate5is proposed, the inputs of which are coupled to the signal inputs Ai, Ci, Di of the connection ports with feedback, whereby the output signal of this logic triple AND gate5drives the signal output Bo of the connection port without feedback. In this way, it is ensured that no feedback occurs at the connection point between two adjacent nodes2, i.e. between the connection ports Bi, Bo of the one node and the connection ports Do, Di of the other node.

As in the case for the structure illustrated inFIG. 3also in regard to the embodiment according to the invention illustrated inFIG. 1, the internal structure of the nodes2is realized by logic AND gates4,5, so that the connected modules1in a state of rest must transmit logic “1” to the bus. This is again realized by means of a logic OR gate3, which apart from the respective data input signal IN receives an enabling signal EN, that is active on a low level. In each case, only the active module1can also transmit a logic “0” to the bus. It should be understood that an equivalent circuit, in which the logic nodes2are constructed with logic OR gates, can be realized. Likewise, one of ordinary skill in the art would appreciate that nodes2with more or fewer connection ports are also conceivable, whereby however it must always be ensured that at least one connection port is feedback-tree.

As mentioned above, a multiplexer structure with distributed load (“divided multiplexer structure”) can be formed by means of the nodes2embodied according to the invention, whereby the disadvantages described above are void, since chains can be realized from similarly constructed nodes2, whereby each node output always drives the same number of inputs. In regard to the present embodiment, each node2possesses four connection ports in each case with a data input and a data output, to which either further nodes2or modules1can be coupled. Since the operating time between the modules1depends on the number of nodes2connected in series, a correspondingly favourable node topology should be selected.

FIG. 2shows an example of such a favourable node topology, which can be used to construct a divided multiplexer structure. The connection ports of the nodes2, which are feedback-free, are again shown with a broken line in each case.

While various embodiments of the present invention have been described above, it should be understood that they have been presented by way of example only, and not limitation. Thus, the breadth and scope of the present invention are not limited by any of the above-described exemplary embodiments, but are defined only in accordance with the following claims and their equivalents.