Optoelectronic device

An optoelectronic device including an integrated circuit including light-emitting diodes, thin film transistors, and a stack of electrically-insulating layers, said stack being located between the light-emitting diodes and the transistors, said stack further including conductive elements, between and through said insulating layers, said conductive elements connecting at least some of the transistors to the light-emitting diodes.

This application is a national stage filing under 35 U.S.C. § 371 of International Patent Application Serial No. PCT/FR2019/053176, filed Dec. 19, 2019, which claims priority to French patent application FR18/73944, filed Dec. 21, 2018. The contents of these applications are incorporated herein by reference in their entireties.

TECHNICAL BACKGROUND

The present disclosure generally concerns optoelectronic devices and, more specifically, devices comprising light-emitting diodes.

PRIOR ART

The phrase “optoelectronic devices comprising light-emitting diodes” designates devices capable of converting an electric signal into an electromagnetic radiation, and particularly devices dedicated to emitting an electromagnetic radiation, particularly light.

Generally, the circuits for controlling the light-emitting diodes of such a device comprise insulated gate field-effect transistors, or MOS transistors, formed according to the CMOS technology, for example formed on a wafer different from the wafer having the light-emitting diodes formed thereon. The two wafers are then placed against each other and electrically connected.

The forming of such a structure has a high cost. This is partially due to the connections between the different wafers, which cannot be optimized.

SUMMARY

An embodiment overcomes all or part of the disadvantages of known optoelectronic devices.

An embodiment provides an optoelectronic device comprising an integrated circuit comprising light-emitting diodes, thin film transistors, and a stack of electrically-insulating layers, said stack being located between the light-emitting diodes and the transistors, said stack further comprising conductive elements, between and through said insulating layers, said conductive elements connecting at least some of the transistors to the light-emitting diodes.

According to an embodiment, the light-emitting diodes comprise wire-shaped, conical, or tapered semiconductor elements.

According to an embodiment, each transistor comprises an electrically-conductive block forming the transistor gate, the electrically-conductive blocks being separated from one another by electrically-insulating regions.

According to an embodiment, each transistor comprises a semiconductor block forming the drain, source, and channel areas of the transistor, the semiconductor blocks being separated from one another by electrically-insulating regions.

According to an embodiment, the transistors are distributed in at least two thin-film transistor stages.

According to an embodiment, each stage comprises an insulating layer forming the gate insulator of all the transistors of this stage.

According to an embodiment, for each light-emitting diode, a first end of the light-emitting diode is connected to one of the conductive elements.

According to an embodiment, for at least one of the transistors, the source and drain regions and the gate of the transistor are located in a same insulating layer.

Another embodiment provides a method of manufacturing an optoelectronic device, comprising the forming of an integrated circuit comprising the steps of: a) forming light-emitting diodes; b) forming a stack of electrically-insulating layers, said stack further comprising conductive elements between and through said insulating layers; and c) forming thin film transistors, said stack being located between the light-emitting diodes and the transistors, said conductive elements connecting at least some of the transistors to the light-emitting diodes.

According to an embodiment, step a) comprises forming wire-shaped, conical, or tapered semiconductor elements.

According to an embodiment, step a) comprises growing semiconductor elements of the light-emitting diodes on conductive or semiconductor seed pads.

According to an embodiment, the method comprises a step of removing the seed pads.

According to an embodiment, step c) comprises forming thin film transistors distributed on at least two stages.

According to an embodiment, steps b) and c) are carried out at temperatures lower than 150° C.

DESCRIPTION OF THE EMBODIMENTS

The same elements have been designated with the same reference numerals in the different drawings. In particular, the structural and/or functional elements common to the different embodiments may be designated with the same reference numerals and may have identical structural, dimensional, and material properties.

For clarity, only those steps and elements which are useful to the understanding of the described embodiments have been shown and are detailed. In particular, electric connections between various conductive portions may be present, without being shown, in the cross-section planes of the drawings or in planes parallel to the cross-section planes of the drawings.

Throughout the present disclosure, the term “connected” is used to designate a direct electrical connection between circuit elements with no intermediate elements other than conductors, whereas the term “coupled” is used to designate an electrical connection between circuit elements that may be direct, or may be via one or more other elements.

The terms “about”, “approximately”, “substantially”, and “in the order of” are used herein to designate a tolerance of plus or minus 10%, preferably of plus or minus 5%, of the value in question.

The concepts of insulation and of conduction are to be respectively understood as electric insulation and electric conduction. The insulating materials and elements are thus electrically insulating, and the conductive materials and elements are thus electrically conductive.

In the following description, embodiments are described for optoelectronic devices comprising three-dimensional light-emitting diodes, that is, each light-emitting diode comprises a wire-shaped, conical, or tapered semiconductor element, for example, a microwire or a nanowire. However, such embodiments may also be implemented for planar light-emitting diodes, that is, for light-emitting diodes formed from a stack of planar semiconductor layers.

The term “microwire” or “nanowire” designates a three-dimensional structure having an elongated shape along a preferred direction, having at least two dimensions, called minor dimensions, in the range from 5 nm to 5 μm, preferably from 50 nm to 2.5 μm, the third dimension, called major dimension, being at least equal to 1 time, preferably at least 5 times, and more preferably still at least 10 times, the largest minor dimension. In certain embodiments, the minor dimensions may be smaller than or equal to approximately 1 μm, preferably in the range from 100 nm to 1 μm, more preferably from 100 nm to 300 nm. In certain embodiments, the height of each microwire or nanowire may be greater than or equal to 500 nm, preferably in the range from 1 μm to 50 μm. The base of the wire for example has an oval, circular, or polygonal shape, particularly triangular, rectangular, square, or hexagonal.

FIG.1schematically shows an embodiment of an optoelectronic device100and more particularly an integrated circuit of device100.

Device100comprises a first portion100acomprising the optical components of device100and a second portion100bcomprising electronic components capable of controlling the optical components.

First portion100acomprises:

an insulating seed layer112;

conductive or semiconductor seed pads114, at least partially resting on layer112, layer112being made of a material favoring the growth of pads114;

light-emitting diodes104, four light-emitting diodes being shown inFIG.1. Each light-emitting diode104rests on a conductive pad114, each pad114being in contact with one end of the associated light-emitting diode104. Conductive pads114are made of a material favoring the growth of conductive elements of light-emitting diodes104;

an insulating layer116, covering insulating layer112, and a portion of each pad114and a lower portion of each light-emitting diode104;

a conductive layer118, transparent to the radiations emitted by light-emitting diodes104, covering the upper portions of light-emitting diodes104and insulating layer116. Conductive layer118is in contact with a second end of each light-emitting diode104and with conductive pads120. Layer118thus forms an electrode common to all the light-emitting diodes104; and

blocks122covering conductive layer118and each surrounding at least one light-emitting diode104, four blocks122, each covering a light-emitting diode, being shown inFIG.1. Blocks122are separated from one another by walls123. Walls123prevent the radiation of each diode from reaching the neighboring blocks122. Certain blocks122, for example corresponding to the diodes intended to supply blue radiations outside of blocks122, may be transparent to the radiations emitted by light-emitting diodes104. Blocks122may have a monolayer or multilayer structure. According to an embodiment, blocks122comprise at least one layer deposited by a conformal deposition method. According to an embodiment, blocks122comprise at least one first layer deposited by a conformal deposition method and in contact with conductive layer118, and at least one second layer for filling the spaces between light-emitting diodes to obtain a substantially planar front surface. Each block122, or at least one of the layers forming it when block122has a multilayer structure, may further comprise a photoluminescent material capable, when it is excited by the light emitted by the light-emitting diode(s) covered with the block, of emitting light at a wavelength different from the wavelength of the light emitted by the light-emitting diode(s). Certain conductive pads120aamong conductive pads120may be at least partially exposed, a single conductive pad102abeing shown inFIG.1. Pads120amay for example be connected by conductive wires124to elements external to the integrated circuit, particularly a source of a high reference potential and a source of a low reference potential, for example, the ground or a source of a data signal.

Each light-emitting diode104may thus be controlled by a voltage supplied between electrode118, connected to the second end of the diode, and the pad114connected to the first end of the diode.

As a variation, seed layer112and/or seed pads114may have been removed.

The second portion100bof device100comprises:

a stack126of insulating layers, represented inFIG.1by a single block126. Stack126is located in contact with the surface of layer112opposite to pads114. Stack126further comprises conductive elements128, for example, conductive tracks and conductive vias, located between and through the insulating layers of stack126. Conductive elements128form an interconnection network. In particular, the conductive vias132of the interconnection network cross layer112so as to be connected to pads114, and thus to be coupled to the first ends of light-emitting diodes104. Preferably, each pad114is in contact with a conductive via132. Further, conductive vias133of the interconnection network, a single via133being shown, cross layer112so as to be connected to conductive pads120. Thus, pads120are interconnected and connected to pads120ato supply in a plurality of locations a same voltage to conductive layer118;

transistors110located on the side of stack126opposite to light-emitting diodes104, three transistors being shown inFIG.1. Transistors110are thin film transistors (TFT). More specifically, each transistor110comprises:a semiconductor or conductive block134, forming the gate of transistor110. The gate of each transistor110is connected, by a first surface, to the interconnection network by connections, not shown. Blocks134are separated from one another by insulating regions135;an insulating layer136covering a second surface, opposite to the first surface, of block134, where insulating layer136may be common to all transistors110; anda semiconductor block138located opposite block134, on the other side of insulating layer136. Block138comprises the source and drain areas of transistor110. The portion of insulating layer136located between block134and block136forms the gate insulator of transistor110;

conductive tracks140partially extending on semiconductor blocks138, as well as on insulating layer136, to connect the source and drain areas of transistors110to one another. In the example ofFIG.1, conductive tracks140connect the three transistors110in series. However, other layouts are possible;

conductive vias144, a single conductive via144being shown inFIG.1, capable of crossing insulating layer112, the insulating layers of stack126, and insulating layers135and136to electrically connect conductive tracks140to conductive pads120or120a, other vias145crossing insulating layers126,135, and136so as to electrically connect conductive tracks140to the interconnection network; and

a support, not shown. The support is for example a handle fixed to layer142, an electronic chip, or another type of support.

Each light-emitting diode104comprises two semiconductor elements, one for example being a three-dimensional element such as previously defined, for example, a wire, and an active layer interposed between the two semiconductor elements.

Seed pads114, also called seed islands, are made of a material favoring the growth of the wires of light-emitting diodes104. As an example, the material forming seed pads114may be a nitride, a carbide, or a boride of a transition metal from column IV, V, or VI of the periodic table of elements, or a combination of these compounds. As an example, seed pads114may be made of aluminum nitride (AlN), of boron (B), of boron nitride (BN), of titanium (Ti), of titanium nitride (TiN), of tantalum (Ta), of tantalum nitride (TaN), of hafnium (Hf), of hafnium nitride (HfN), of niobium (Nb), of niobium nitride (NbN), of zirconium (Zr), of zirconium borate (ZrB2), of zirconium nitride (ZrN), of silicon carbide (SiC), of tantalum carbonitride (TaCN), of magnesium nitride in MgxNy form, where x is approximately equal to 3 and y is approximately equal to 2, for example, magnesium nitride in Mg3N2 form or magnesium gallium nitride (MgGaN), of tungsten (W), of tungsten nitride (WN), or of a combination thereof.

The insulating materials may be selected from the group comprising silicon oxide (SiO2), silicon oxynitride (SiON), silicon nitride (SiN), aluminum nitride (AlN), titanium oxide (TiO2), aluminum oxide (Al2O3), electrically-insulating organic materials, for example, parylene or ALX resin, and mixtures of at least two of these compounds.

The semiconductor elements of light-emitting diodes104are at least partly made of at least one semiconductor material. The semiconductor material may be silicon, germanium, silicon carbide, a III-V compound, a II-VI compound, or a combination of these compounds.

The semiconductor elements may be at least partly made of semiconductor materials mainly comprising a III-V compound, for example, III-N compounds. Examples of group-III elements comprise gallium (Ga), indium (In), or aluminum (Al). Examples of III-N compounds are GaN, AlN, InN, InGaN, AlGaN, or AlInGaN. Other group-V elements may also be used, for example, phosphorus or arsenic. Generally, the elements in the III-V compound may be combined with different molar fractions.

The semiconductor elements may be at least partly formed based on semiconductor materials mainly comprising a II-VI compound. Examples of group-II elements comprise group-IIA elements, particularly beryllium (Be) and magnesium (Mg), and group-IIB elements, particularly zinc (Zn) and cadmium (Cd). Examples of group-VI elements comprise group-VIA elements, particularly oxygen (O) and tellurium (Te). Examples of II-VI compounds are ZnO, ZnMgO, CdZnO, or CdZnMgO. Generally, the elements in the II-VI compound may be combined with different molar fractions.

The semiconductor elements may comprise a dopant. As an example, for III-V compounds, the dopant may be selected from the group comprising a P-type group-II dopant, for example, magnesium (Mg), zinc (Zn), cadmium (Cd), or mercury (Hg), a P-type group-IV dopant, for example, carbon (C), or an N-type group-IV dopant, for example, silicon (Si), germanium (Ge), selenium (Se), sulfur (S), terbium (Tb), or tin (Sn).

The active layer is the layer from which most of the radiation delivered by the light-emitting diode is emitted. According to an example, the active layer may comprise confinement means, such as multiple quantum wells. It is for example formed of an alternation of GaN and InGaN layers having respective thicknesses from 5 to 20 nm (for example, 8 nm) and from 1 to 10 nm (for example, 2.5 nm). The GaN layers may for example be N- or P-type doped. According to another example, the active layer may comprise a single InGaN layer, for example having a thickness greater than 10 nm.

FIGS.2to4are partial simplified cross-section views showing the results of successive steps of an example of an embodiment of a method of manufacturing the optoelectronic device100ofFIG.1.

FIG.2schematically shows the structure obtained after the steps comprising:the forming of seed layer112on a semiconductor substrate, not shown;the forming of seed pads114on seed layer112at the locations where light-emitting diodes104are desired to be formed;the forming of a first portion of insulating layer116partially covering pads114and leaving the locations of light-emitting diodes104exposed;the forming of light-emitting diodes104on pads114at the locations left exposed by the first portion of insulating layer116;the forming of the second portion of insulating layer116on the lower portion of light-emitting diodes104;the forming of pads120extending through layer116from layer112;the forming of conductive layer118on light-emitting diodes104and on insulating layer116;the forming of photoluminescent blocks122on conductive layer118;the forming of a handle200, affixed to blocks122, for example, by a bonding layer202; andthe removal of the substrate, not shown.

As a variation, a step of removing seed layer112and/or seed pads114may be added. For example, layer112may be removed at the same time as the substrate, not shown.

FIG.3schematically shows the structure obtained after the steps comprising:the forming on insulating layer112of stack126, particularly conductive elements128, having its conductive vias132crossing insulating layer112;the forming of blocks134, made of a conductive or semiconductor material, for example, of polysilicon, in contact with conductive elements128;the forming of insulating regions135between blocks134. The thickness of regions135is substantially equal to the thickness of blocks134and enables to leave the surface of each block134opposite to the surface in contact with conductive elements128exposed;the forming of insulating layer136on the exposed surfaces of blocks134and on regions135;the forming of conductive vias144through insulating layers136,135, the insulating layers of stack126, and insulating layer112, to reach conductive pads120or120a, a single via144being shown; andthe forming of vias145through insulating layers136,135, and the insulating layers of stack126.

FIG.4schematically shows the structure obtained after the steps comprising:

the forming of semiconductor blocks138opposite blocks134on layer136;

the forming of conductive tracks140in contact with the drain and source areas of the different blocks138; and

the forming of insulating layer142on blocks138, conductive tracks140, and layer136.

During a next step, certain photoluminescent blocks122may be etched to expose conductive pads120a.

The steps of manufacturing transistors110are steps of manufacturing thin film transistors, for example, IGZO transistors. More particularly, these steps are carried out at a maximum temperature lower than 150° C. These steps are, in the present embodiment, performed in the reverse order with respect to the usual order of the steps of thin-film transistor manufacturing, that is, the gate is formed before the source and drain areas.

FIG.5schematically shows another embodiment of an optoelectronic device500. Device500comprises all the elements of device100and further comprises an additional stage of thin film transistors504, three transistors being shown, located on the stage comprising transistors110. Device500thus comprises:

semiconductor blocks502located on insulating layer142. Blocks502comprise the source and drain areas of thin film transistors504. Blocks502are similar to semiconductor blocks138;

conductive tracks506, similar to conductive tracks140, electrically connecting the source and drain areas of blocks502together. In the embodiment ofFIG.5, the three transistors are series-connected;

conductive blocks510formed on layer508, opposite conductive blocks502. Blocks510form the gates of transistors504, and the portions of layer508located between blocks504and502form the gate insulators; and

a stack512of insulating layers, shown inFIG.5by a single block512, covering transistors504. Stack512further comprises conductive elements514, for example, conductive tracks and conductive vias, located between and through the insulating layers of stack512. Conductive elements514form an interconnection network. Conductive elements514for example connect some of blocks510and some of conductive layers506to conductive tracks140. Conductive elements514thus partially cross insulating layer512, insulating layer508, and insulating layer142to reach conductive tracks140.

Device500thus comprises two stages of thin film transistors. As a variation, the optoelectronic device may comprise more than two stages of thin film transistors. The presence of a plurality of transistor stages has the advantage of increasing the density of transistors.

As a variation, some of conductive elements514may connect conductive tracks506to conductive tracks140.

Although, in the embodiment ofFIG.5, each transistor504is located opposite a transistor110, the transistors of the different stages may be offset from one another and the transistor density may be different according to the considered stage.

FIG.6schematically shows another embodiment of an optoelectronic device600. Device600comprises all the elements of device500, with the difference that device600does not comprise conductive pads120a, that is, conductive pads which are not totally covered with a photoluminescent block122, and that the electric connections between elements external to the integrated circuit are achieved by conductive pads602located at the level of the free surface of stack512. Pads602are connected with the interconnection network of stack512. It is thus possible to connect pads602to an external device, for example, to an external chip.

FIG.7schematically shows another embodiment of an optoelectronic device700. Optoelectronic device700comprises light-emitting diodes104, resting on seed pads702and surrounded with an insulating layer703. Seed pads702are similar to the previously-described seed pads114. Each pad702is at least partially transparent to the radiation emitted by the light-emitting diode formed on pad702.

Seed pads702rest on a conductive layer704. Layer704is preferably at least partially transparent to the radiations emitted by the light-emitting diode formed on pad702. Pads702are in contact with layer704to form an electric connection. Layer704thus forms an electrode common to all the light-emitting diodes104.

Layer704is covered with a plurality of photoluminescent blocks705, photoluminescent blocks705being similar to the previously-described photoluminescent blocks122. More particularly, each block705is located opposite a light-emitting diode104. Further, blocks705are separated from one another by walls707similar to the previously-described walls123.

The rest of device700is identical to device100, with the difference that each light-emitting diode104is in contact, by the side opposite to seed pad702, with a conductive element132of the interconnection network.

Thus, each light-emitting diode104may be controlled by a voltage applied between a first end, via a pad702, and a second end, via a conductive element132.

Conductive blocks134are formed on the stack of insulating layers126. Each block134is in contact with a conductive element, not shown. Blocks134are surrounded with an insulating layer135. The thickness of layer135is equal to the thickness of blocks134. Each block134thus has a side non-covered with layer135. Each block134forms the gate of a transistor720.

Blocks134and insulating layer135are covered with an insulating layer136. Semiconductor blocks138are located on layer136, each block138being located opposite a block134. Blocks138comprise the source and drain areas of transistors720. Blocks138are further surrounded and covered with an insulating layer142. Conductive elements140, partially located on blocks138, form connections between the source and drain areas of the different transistors720. In the example ofFIG.7, the three shown transistors are series-connected. Transistors720are thin-film transistors, similar to transistors110and504.

FIG.8schematically shows a portion of another embodiment of an optoelectronic device. More particularly,FIG.8shows a horizontal transistor800. Transistor800is, like transistors110, a thin film transistor (TFT). Horizontal transistor means a transistor having its different portions, for example, the source and drain areas, the gate, and the channel, at the same level, in a same layer, and preferably formed at the same time.

Thus, transistor800is formed in an insulating layer802, for example, made of silicon oxide. Transistor800comprises, in layer802:

two semiconductor blocks804, forming the drain and source areas;

a semiconductor block806extending between, and being in contact with, blocks804. Block806forms the channel of transistor800; and

blocks800, made of a semiconductor or conductive material, located on either side of block806and forming the gate of transistor800. Blocks808are separated from channel806by a region of layer802.

An advantage of the previously-described embodiments is that the manufacturing of the interconnection levels of stack126and of thin film transistors110has a thermal budget compatible with light-emitting diodes104, that is, the manufacturing of transistors110may be performed on a structure already comprising light-emitting diodes104without negatively impacting the performance of light-emitting diodes104.

Various embodiments and variations have been described. It will be understood by those skilled in the art that certain features of these various embodiments and variations may be combined, and other variations will occur to those skilled in the art. In particular, the embodiment ofFIG.7may comprise, as described in relation withFIGS.5and6, a plurality of thin-film transistor stages. Further, the embodiment ofFIG.7may comprise, as described in relation withFIG.6, conductive pads enabling to connect the optoelectronic device to external elements on the side of the transistors opposite to the light-emitting diodes.

Further, the electric connections may be arranged differently. Thus, as an example, at least some of the first ends of the light-emitting diodes may be connected to source or drain areas rather than to transistor gates.

Further, blocks122(respectively705) and walls123(respectively707) may be formed after the forming of the transistors.