Liquid crystal display and manufacturing method thereof

The inventive concept relates to a liquid crystal display and a manufacturing method thereof. More particularly, the inventive concept relates to a liquid crystal display including one substrate and a manufacturing method thereof. A liquid crystal display according to an exemplary embodiment of the inventive concept includes: a thin film transistor; a passivation layer; a pixel electrode; an opposing electrode disposed on the pixel electrode and spaced apart from the pixel electrode by a microcavity interposed therebetween; a roof layer disposed on the opposing electrode and overlapping the pixel electrode, wherein the roof layer and the opposing electrode form a valley exposing an injection hole of the microcavity, a buffer zone disposed between the light transmitting area and the valley and a light blocking member overlapping the valley. A height of the microcavity in the buffer zone is higher than a height of the microcavity in the light transmitting area.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority to and the benefit of Korean Patent Application No. 10-2014-0006905 filed in the Korean Intellectual Property Office on Jan. 20, 2014, the entire contents of which are incorporated herein by reference.

BACKGROUND

(a) Technical Field

The inventive concept relates to a liquid crystal display and a manufacturing method thereof. More particularly, the inventive concept relates to a liquid crystal display including one substrate and a manufacturing method thereof.

(b) Description of the Related Art

A liquid crystal display is currently one of the most widely used flat panel displays, and includes two display substrates on which field generating electrodes such as a pixel electrode and an opposing electrode are formed and a liquid crystal layer that is disposed therebetween, and displays an image by applying a voltage to a field generating electrode to generate an electric field on the liquid crystal layer, which determines alignment of liquid crystal molecules of the liquid crystal layer and controls polarization of incident light.

Two display substrates forming the liquid crystal display may consist of a thin film transistor array substrate and an opposing substrate. In the thin film transistor array substrate, a gate line transmitting a gate signal and a data line transmitting a data signal are formed to be crossed, a thin film transistor connected to the gate line and the data line, and a pixel electrode connected to the thin film transistor may be formed. The opposing substrate may include a light blocking member, a color filter, an opposing electrode, etc. If necessary, the light blocking member, the color filter, and the opposing electrode may be formed on the thin film transistor array substrate.

However, in the conventional liquid crystal display, two substrates are inevitably required, and the constituent elements are respectively formed on the two substrates such that the display device is heavy, the cost is high, and the processing time is long.

SUMMARY

A process of manufacturing the liquid crystal display including one substrate includes injecting a liquid crystal material to form the liquid crystal layer, if the liquid crystal material remains in an area other than the defined liquid crystal layer, a display defect that appears like a pinhole caused by the remaining liquid crystal material may be generated. In contrast, when the liquid crystal material is not completely filled in the liquid crystal layer of the display area, a dark portion or a texture is generated in the display area, thereby generating a display defect.

Accordingly, the inventive concept prevents the display defect by preventing the liquid crystal material from remaining in the area other than the predetermined liquid crystal layer or by preventing a removal of the liquid crystal material in the liquid crystal layer of the display area in the process of manufacturing of the liquid crystal display including one substrate.

A liquid crystal display according to an exemplary embodiment of the inventive concept includes: a thin film transistor disposed on a substrate; a passivation layer disposed on the thin film transistor; a pixel electrode disposed on the passivation layer and at a light transmitting area; an opposing electrode disposed on the pixel electrode and spaced apart from the pixel electrode by a microcavity interposed therebetween; and a roof layer disposed on the opposing electrode and overlapping the pixel electrode, wherein the roof layer and the opposing electrode form a valley exposing an injection hole of the microcavity, a buffer zone disposed between the light transmitting area and the valley and a light blocking member overlapping the valley. A height of the microcavity in the buffer zone is higher than a height of the microcavity in the light transmitting area.

A first insulating layer disposed between the passivation layer and the pixel electrode may be further included, and the first insulating layer may include a first opening where the first insulating layer is removed in the buffer zone and the valley.

An edge of the first opening may be disposed on a color filter on the light transmitting area.

The pixel electrode may include a pad formed in the valley and the light blocking member directly contacts the pad.

The light blocking member may not overlap the first insulating layer.

An upper surface of the light blocking member disposed at the buffer zone and the valley may be lower than an upper surface of the pixel electrode at the light transmitting area.

A manufacturing method of a liquid crystal display according to an exemplary embodiment of the inventive concept includes: forming a thin film transistor on a substrate; forming a passivation layer on the thin film transistor; forming a pixel electrode at a light transmitting area on the passivation layer; forming a sacrificial layer on the pixel electrode; forming a light blocking member overlapping the valley and a buffer zone disposed between the light transmitting area and the valley; forming an opposing electrode on the sacrificial layer; forming a roof layer overlapping the pixel electrode on the opposing electrode; patterning the opposing electrode to form a valley and expose the sacrificial layer through the valley; removing the sacrificial layer through the valley to form a microcavity between the pixel electrode and the opposing electrode; injecting a liquid crystal material into the microcavity through an injection hole of the microcavity; and removing the liquid crystal material disposed at an area other than the light transmitting area, wherein a height of the microcavity in the buffer zone may be higher than a height of the microcavity in the light transmitting area.

In the removing of the liquid crystal material disposed at the area other than the light transmitting area, the liquid crystal material that existed in the microcavity of the light transmitting area may not be removed, and the liquid crystal material that existed in the microcavity of the buffer zone may not be removed or be partially removed.

The method may further include forming a first insulating layer disposed between the passivation layer and the pixel electrode, and forming a first opening by removing the first insulating layer at the buffer zone and the valley.

The method may further include forming a color filter between the first insulating layer and the passivation layer. An edge of the first opening may be disposed on a color filter on the light transmitting area, the pixel electrode may include a pad formed in the valley and the light blocking member directly contact the pad, and the light blocking member may not overlap the first insulating layer.

The method may further include forming a first insulating layer disposed between the passivation layer and the pixel electrode, and the first insulating layer may include a portion disposed in at least one of the buffer zone and the valley.

According to an exemplary embodiment of the inventive concept, transmittance of the display device and lateral visibility may be improved, and display quality of the display device may be increased.

DETAILED DESCRIPTION OF THE EMBODIMENTS

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like reference numerals designate like elements throughout the specification. It will be understood that when an element such as a layer, film, region, or substrate is referred to as being “on” another element, it can be formed directly on the other element or formed with intervening elements. In contrast, when an element is referred to as being “directly on” another element, there are no intervening elements present.

Now, a liquid crystal display and a manufacturing method thereof according to an exemplary embodiment of the inventive concept will be described with reference to accompanying drawings.

Firstly, a liquid crystal display according to an exemplary embodiment of the inventive concept will be described with reference toFIG. 1.

FIG. 1is a top plan view of a liquid crystal display according to an exemplary embodiment of the inventive concept.

A liquid crystal display according to an exemplary embodiment of the inventive concept includes a substrate110made of glass or plastic and a plurality of pixels PXs formed on the substrate110.

The plurality of pixels PXs may be arranged in a matrix shape including a plurality of pixel rows and a plurality of pixel columns.

Each of the plurality of pixels PXs may display one of primary colors. For example, each pixel PX may uniquely display one of primary colors, which is called spatial division, or each of the pixels may alternately display one of the primary colors at a time, which is called temporal division. A desired color can be recognized by a spatial or temporal sum of the primary colors. An example of the primary colors is three primary colors including red, green, and blue colors. However, four or more primary colors can be used to display images. For color display, each pixel PX includes a color filter displaying each primary color or is supplied with light representing each primary color to be emitted.

Each pixel PX may include a switching element such as a thin film transistor connected to a display signal line, a pixel electrode (not shown) connected thereto, and an opposing electrode (not shown) facing the pixel electrode.

One pixel PX includes a first subpixel PXa and a second subpixel PXb. The first subpixel PXa and the second subpixel PXb display may display luminances according to different gamma curves from each other for one image signal, thereby improving a visibility of the liquid crystal display. The first subpixel PXa and the second subpixel PXb may be arranged in a column direction, as shown inFIG. 1, but is not limited thereto.

A roof layer360is formed on the substrate110.

The roof layer360may be formed to be elongated in a pixel row direction. The roof layer360is removed at a first valley V1. The first valley V1may be formed to extend in a pixel row direction along a space between the first subpixel PXa and the second subpixel PXb.

Each roof layer360is formed to be separated from the substrate110between the adjacent second valleys V2so as to form a microcavity305. Further, each roof layer360is formed to be attached to the substrate110at the second valley V2so as to cover both sides of the microcavity305. The second valley V2may be formed to extend in the pixel column direction along the space between the adjacent pixel columns.

An injection hole307is formed at an edge of the first valley V1to expose the micro cavity disposed under the roof layer360to the outside.

The structure of the liquid crystal display according to the present exemplary embodiment is only one example, and numerous variations are possible. For example, an arrangement and a shape of the pixel PX, the first valley V1, and the second valley V2may be changed, a plurality of roof layers360may be connected at the first valley V1, and a portion of the roof layer360may be formed to be separated from the substrate110in the second valley V2such that the adjacent microcavities305may be connected to each other.

Next, one pixel of the liquid crystal display according to an exemplary embodiment of the inventive concept will be described with reference toFIG. 2along withFIG. 1.

Referring toFIG. 2, the liquid crystal display according to an exemplary embodiment of the inventive concept includes a plurality of signal lines121,171h, and171l, and a plurality of pixels PXs connected to the plurality of signal lines121,171h, and171l. The plurality of pixels PXs may be arranged in a matrix form including a plurality of pixel rows and a plurality of pixel columns, but is not limited thereto.

Each pixel PX may include a first subpixel PXa and a second subpixel PXb. The first subpixel PXa and the second subpixel PXb may be disposed in the pixel column direction or the pixel row direction. In this case, as previously described inFIG. 1, the first valley V1may be disposed between the first subpixel PXa and the second subpixel PXb along the pixel row direction, and the second valley V2may be disposed between the adjacent pixel columns along the pixel column direction.

The signal lines121,171h, and171lmay include a gate line121for transmitting a gate signal, and a first data line171hand a second data line171lfor transmitting different data voltages.

The first subpixel PXa may include a first switching element Qh connected to the gate line121and the first data line171hand a first liquid crystal capacitor Clch connected to the first switching element Qh. The first switching element Qh includes a first terminal connected to the gate line121, a second terminal connected to the first data line171h, and a third terminal connected to the first liquid crystal capacitor Clch.

The second subpixel PXb may include a second switching element Ql connected to the gate line121and the second data line171land a second liquid crystal capacitor Clcl connected to the second switching element Ql. The second switching element Ql includes a first terminal connected to the gate line121, a second terminal connected to the second data line171l, and a third terminal connected to the second liquid crystal capacitor Clcl.

If a gate-on voltage Von is firstly applied to the gate line121, the first switching element Qh and the second switching element Ql connected thereto are turned on, and the first and second liquid crystal capacitors Clch and Clcl are charged up to each data voltage transmitted through the first and second data lines171hand171l. The data voltage transmitted by the second data line171land the data voltage transmitted by the first data line171hmay be different. For example, the second liquid crystal capacitor Clcl may be charged with the lower voltage than the first liquid crystal capacitor Clch, thereby improving lateral visibility.

The structure of the first subpixel PXa and the second subpixel PXb is not limited to that shown inFIG. 2, and various different methods and structures may be can be used to charge different voltages in the first subpixel PXa and the second subpixel PXb, respectively.

Next, a structure of the liquid crystal display according to an exemplary embodiment of the inventive concept will be described with reference toFIG. 3toFIG. 5along with the previously described drawings.

FIG. 3is a layout view of one pixel of a liquid crystal display according to an exemplary embodiment of the inventive concept, andFIG. 4andFIG. 5are cross-sectional views of the liquid crystal display ofFIG. 3taken along a line V-V, respectively.

Referring toFIG. 3toFIG. 5, a gate conductor including the gate line121and a storage electrode line131is formed on the substrate110.

The gate line121may extend mainly in a row direction and transmits a gate signal. The gate line121may be disposed between two microcavities305adjacent in the column direction.

The gate line121may include a first gate electrode124hand a second gate electrode124lprotruding upward. The first gate electrode124hand the second gate electrode124lmay be connected to each other, thereby forming one protrusion. However, the shape of the first gate electrode124hand the second gate electrode124lmay vary according to the design of thin film transistor.

The storage electrode line131extends in parallel to the gate line121and is separated from the gate line121.

The storage electrode line131may include storage electrodes133and135.

The storage electrode133connected to the storage electrode line131surrounds a light transmitting area OPa that is a transmissive region of the first subpixel PXa.

The storage electrode135protrudes downward from the storage electrode line131extending in the column direction.FIG. 3shows an example in which the storage electrode line131includes a pair of storage electrodes135for one pixel PX. The pair of storage electrode135may be respectively formed to be close to the first gate electrode124hand the second gate electrode124l.

A gate insulating layer140is formed on the gate conductor. The gate insulating layer140may be made of an inorganic insulating material such as a silicon nitride (SiNx) or a silicon oxide (SiOx). The gate insulating layer140may be formed of a single layer or a multilayer.

A first semiconductor154hand a second semiconductor154lare formed on the gate insulating layer140. The first semiconductor154hmay be disposed on the first gate electrode124h, and the second semiconductor154lmay be disposed on the second gate electrode124l.

The first semiconductor154hand the second semiconductor154lmay include amorphous silicon, polycrystalline silicon, or an oxide semiconductor.

Ohmic contacts (not shown) may be further formed on the first semiconductor154hand the second semiconductor154l. The ohmic contacts may be formed on the first semiconductor154h, and they may be formed of a material such as n+ hydrogenated amorphous silicon in which an n-type impurity is doped at a high concentration, or of a silicide.

A data conductor including a plurality of data lines such as a first data line171hand a second data line171l, a plurality of first drain electrodes175h, and a plurality of second drain electrodes175lis formed on the first semiconductor154h, the second semiconductor154l, and the gate insulating layer140.

The first data line171hand the second data line171ltransmit a data signal and extend mainly in a column direction, thereby intersecting the gate line121and the storage electrode line131. The first data line171hor the second data line171lmay be disposed between two microcavities305adjacent in the row direction.

The first data line171hand the second data line171lmay transmit the different data voltages. For example, the data voltage transmitted by the second data line171lfor one image may be lower than the data voltage transmitted by the first data line171h, but is not limited thereto.

The first data line171hmay include a first source electrode173hprotruding toward the first gate electrode124h, and the second data line171lmay include a second source electrode173lprotruding toward the second gate electrode124l.

The first drain electrode175hand second drain electrode175lhave one wide end and one rod-shape end, respectively. The wide end of the first drain electrode175hand the second drain electrode175lmay overlap the storage electrode135protruded under the storage electrode line131. The rod-shape end of the first drain electrode175hand the second drain electrode175lmay be partially enclosed by the first source electrode173hand the second source electrode173l.

The first and second gate electrodes124hand124l, the first and second source electrodes173hand173l, and the first and second drain electrodes175hand175lrespectively form first and second thin film transistors (TFTs) along with the first and second semiconductors154hand154l, and channels of the thin film transistors are formed in the semiconductors154hand154lbetween the source electrodes173hand173land the drain electrodes175hand175lfacing each other. The first and second thin film transistors may function as the described first and second switching elements Qh and Ql.

A passivation layer180is disposed on the data conductor. The passivation layer180may be made of the organic insulating material or the inorganic insulating material, and may be formed of a single layer or a multilayer.

A color filter230is disposed on the passivation layer180. Each color filter230may display one color among the plurality of primary colors such as three primary colors of red, green, and blue, and four or more primary colors. The color filter230is not limited to the three primary colors of red, green, and blue, and may also be cyan, magenta, yellow, and white-based colors.

Each color filter230may be elongated in the column direction. At least the color filter230on a region between the light transmitting area OPa of the first subpixel PXa and the light transmitting area OPb of the second subpixel PXb may be removed. For example, at least the color filter on the region where the first and second thin film transistors are formed may be removed, thereby forming an opening235.

A first insulating layer240may be further formed on the color filter230. The first insulating layer240may be formed of the organic insulating material, and an upper surface thereof may be flat. The first insulating layer240may be omitted, if necessary.

At least the first insulating layer240on a region between the light transmitting area OPa of the first subpixel PXa and the light transmitting area OPb of the second subpixel PXb may be removed. For example, at least the first insulating layer240on a region where the first and second thin film transistors are formed may be removed, thereby forming an opening245. An edge of the opening245may be approximately aligned with an edge of the light transmitting area OPa of the first subpixel PXa or the light transmitting area OPb of the second subpixel PXb. The opening245of the first insulating layer240may be wider than the opening235of the color filter230. The edge of the opening245may be formed on the color filter230and be formed on the light transmitting area OPa of the first subpixel PXa and the light transmitting area OPb of the second subpixel PXb.

A second insulating layer250may be further formed on the first insulating layer240. The second insulating layer250may be made of the inorganic insulating material. The second insulating layer250functions protecting the color filter230and the first insulating layer240. If necessary, the second insulating layer250may be omitted.

The passivation layer180and the second insulating layer250have a first contact hole181hexposing the wide end of the first drain electrode175hand a second contact hole181lexposing the wide end of the second drain electrode175l. The first contact hole181hand the second contact hole181lmay be disposed within the opening235of the color filter230.

A plurality of pixel electrodes including a first subpixel electrode191hand a second subpixel electrode191lare formed on the second insulating layer250.

The first subpixel electrode191hand the second subpixel electrode191lmay be disposed on an upper portion and a lower portion of the first and second thin film transistors, respectively. The first subpixel electrode191hmay be disposed corresponding to the light transmitting area OPa of the first subpixel PXa, and the second subpixel electrode191lmay be disposed corresponding to the light transmitting area OPb of the second subpixel PXb. However, the arrangement and the shape of the first subpixel electrode191hand the second subpixel electrode191lare not limited thereto and may vary according to the design of the pixel electrodes.

The overall shape of the first subpixel electrode191hand the second subpixel electrode191lmay be quadrangular. The first subpixel electrode191hand the second subpixel electrode191lmay include cross-shaped stems formed of transverse stems193hand193land longitudinal stems192hand192l, a plurality of minute branches194hand194lextending from the cross-shaped stems to the edge of the pixel, and pads195hand195lextending over the first contact hole181hand the second contact hole181l.

The first subpixel electrode191hand the second subpixel electrode191lmay be divided into four subregions by the transverse stems193hand193land the longitudinal stems192hand192l. The minute branches194hand194lobliquely extend from the transverse stems193hand193land the longitudinal stems192hand192l, and the extending direction thereof may form an angle of approximately 45 degrees or 135 degrees with respect to the gate line121or the transverse stems193hand193l. The extending directions of the minute branches194hand194lof the adjacent subregions may be perpendicular each other.

The first subpixel electrode191hand the second subpixel electrode191lmay further include an outer stem (not shown) connecting the approximate outer part of the light transmitting area OPa of the first subpixel PXa, and light transmitting area OPb of the second subpixel PXb.

The pad195hof the first subpixel electrode191his connected to the first drain electrode175hthrough the first contact hole181h, and the pad195lof the second subpixel electrode191lis connected to the second drain electrode175lthrough the second contact hole181l. Accordingly, if the first thin film transistor and second thin film transistor are turned on, the first subpixel electrode191hand the second subpixel electrode191lmay receive the data voltages from the first drain electrode175hand the second drain electrode175l, respectively.

The first subpixel electrode191hand the second subpixel electrode191lmay include a transparent conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), and a metal thin film.

The arrangement and the shape of the pixel PX, the structure of the thin film transistor, and the shape of the pixel electrode are only one example in the present exemplary embodiment, and numerous variations are possible.

A light blocking member220may be disposed on the pixel electrode. The light blocking member220includes a portion disposed between the light transmitting areas of the adjacent pixels PXs or between the light transmitting area OPa of the first subpixel PXa and the light transmitting area OPb of the second subpixel PXb, thereby preventing light leakage between the pixels PXs or light leakage between the first subpixel PXa and the second subpixel PXb.

In detail, the light blocking member220may include a portion extending in the row direction and a portion extending in the column direction. The portion extending in the row direction in the light blocking member220may cover the gate line121and the first and second thin film transistors, and the portion extending in the column direction may extend along with the first and second data lines171hand171l.

Referring toFIG. 4, the upper surface of the light blocking member220disposed between the light transmitting area OPa of the first subpixel PXa and the light transmitting area OPb of the second subpixel PXb may be lower than the upper surface of the first and second subpixel electrodes191hand191lor the second insulating layer250disposed at the light transmitting area OPa of the first subpixel PXa and the light transmitting area OPb of the second subpixel PXb. The light blocking member220may directly contact the pads195hand195lin the first valley V1.

The light blocking member220may overlap the edge of the color filter230. The light blocking member220may not overlap the first insulating layer240.

The position of the light blocking member220and the color filter230is not limited in the drawing and may vary. For example, the light blocking member220may be disposed under the second insulating layer250or the first insulating layer240or may be disposed in the same plane as the color filter230.

An opposing electrode270is formed on the first and second subpixel electrodes191hand191lto be separated therefrom by a predetermined distance.

The opposing electrode270may include the transparent conductive material such as ITO, IZO, or the metal thin film. The opposing electrode270may be applied with a predetermined voltage such as a common voltage.

The space between the first and second subpixel electrode191hand191land the opposing electrode270forms the microcavity305. In the microcavity305, a liquid crystal material including liquid crystal molecules31is filled to form a liquid crystal layer3.

The liquid crystal molecules31may have negative dielectric anisotropy and may be aligned in the direction perpendicular to the substrate110in the absence of an electric field, but are not limited thereto.

The first subpixel electrode191hand the second subpixel electrode191lreceive the data voltages to form an electric field together with the opposing electrode270applied with the common voltage, to thereby determine an orientation of liquid crystal molecules31disposed inside the microcavity305. Accordingly, the luminance of the light transmitted through the liquid crystal layer3differs depending on the orientation of the liquid crystal molecules31which altered by the electric field applied to the liquid crystal molecules31.

A third insulating layer350may be further disposed on the opposing electrode270. The third insulating layer350may be made of an inorganic insulating material such as a silicon nitride (SiNx), a silicon oxide (SiOx), and a silicon oxynitride (SiOxNy), or is omitted as necessary.

The roof layer360is formed on the third insulating layer350. The roof layer360may be made of an organic material. The shape of the microcavity305may be maintained by hardening the roof layer360with a curing process. The roof layer360is formed to be spaced apart from the first and second subpixel electrodes191hand191lwith the microcavity305therebetween.

The roof layer360may be mainly disposed at the light transmitting area OPa of the first subpixel PXa and the light transmitting area OPb of the second subpixel PXb.

A fourth insulating layer370may be further formed on the roof layer360. The fourth insulating layer370may be made of an inorganic insulting material such as a silicon nitride (SiNx), a silicon oxide (SiOx), and a silicon oxynitride (SiOxNy). The fourth insulating layer370may be formed to cover the upper surface and the side surface of the roof layer360. The fourth insulating layer370has a function of protecting the roof layer360. The fourth insulating layer370may be omitted.

A first alignment layer11may be formed on the light blocking member220, the first and second pixel electrodes191hand191l, and the second insulating layer250. A second alignment layer21facing the first alignment layer11may be formed under the opposing electrode270. The first alignment layer11and the second alignment layer21may be vertical alignment layers, and may include an alignment material such as polyamic acid, polysiloxane, and polyimide. The first and second alignment layers11and21may be connected to each other at the edge of the pixel PX.

The opposing electrode270, the third insulating layer350, and the fourth insulating layer370are disposed to be spaced apart from the first and second subpixel electrodes191hand191l. The layers disposed under or on the roof layer360are removed along with the roof layer360at the region between the light transmitting area OPa of the first subpixel PXa and the light transmitting area OPb of the second subpixel PXb thereby forming the first valley V1exposing the microcavity305.

Referring toFIG. 1andFIG. 4, the roof layer360extends along the pixel row and is formed at each pixel PX and the second valley V2, but is not formed at the first valley V1. That is, the roof layer360is not disposed on a region between the light transmitting area OPa of the first subpixel PXa and the light transmitting area OPb of the second subpixel PXb.

The microcavity305is disposed under the roof layer360, however the microcavity305may not be formed under the roof layer360formed on the second valley V2.

A buffer zone BFZ is disposed between the first valley V1and the light transmitting area OPa of the first subpixel PXa or the light transmitting area OPb of the second subpixel PXb according to an exemplary embodiment of the inventive concept. That is, the buffer zone BFZ is disposed at the edge where the injection hole307is disposed among the edge of the first valley V1. The buffer zone BFZ may overlap the light blocking member220and may mainly overlap the edge of the light blocking member220. Accordingly, the light blocking member220according to an exemplary embodiment of the inventive concept may include the portion overlapping the first valley V1and the buffer zone BFZ, and the light transmitting area OPa of the first subpixel PXa and the light transmitting area OPb of the second subpixel PXb does not overlap the light blocking member220.

The light blocking member220may include the portion overlapping the second valley V2shown inFIG. 1.

Referring toFIG. 4, the upper surface of the first alignment layer11disposed at the buffer zone BFZ is lower than the upper surface of the first alignment layer11disposed at the light transmitting area OPa of the first subpixel PXa or the light transmitting area OPb of the second subpixel PXb.

Accordingly, as shown inFIG. 5, in the buffer zone BFZ, a height d2of the microcavity305may be higher than the height d1of the microcavity305at the light transmitting area OPa of the first subpixel PXa or the light transmitting area OPb of the second subpixel PXb. That is, in the buffer zone BFZ, the distance between the first alignment layer11and the second alignment layer21may be larger than the distance between the first alignment layer11and the second alignment layer21in the light transmitting areas OPa and OPb. For this, in the present exemplary embodiment, the first insulating layer240may be removed in the buffer zone BFZ and the first valley V1. That is, the edge of the opening245of the first insulating layer240may approximately accord with the boundary between the buffer zone BFZ and the light transmitting areas OPa and OPb, or may be disposed in the light transmitting areas OPa and OPb.

The injection hole307exposing the portion of the microcavity305is formed at the space under the edge of the opposing electrode270, the third insulating layer350, and the fourth insulating layer370forming the edge of the first valley V1. Injection holes307may face each other at the edge of the buffer zone BFZ adjacent to the light transmitting area OPa of the first subpixel PXa and the edge of the buffer zone BFZ adjacent to the light transmitting area OPb of the second subpixel PXb. That is, the injection hole307may expose the side surface of the microcavity305at a lower edge of the first subpixel PXa and an upper edge of the second subpixel PXb. The microcavity305is exposed by the injection hole307such that an alignment material or a liquid crystal material may be injected into the microcavity305through the injection hole307in the manufacturing process of the liquid crystal display.

An overcoat390covering the injection hole307may be disposed on the fourth insulating layer370. The overcoat390may seal the microcavity305for the liquid crystal material including the liquid crystal molecules31injected into the microcavity305to not be leaked to the outside. The overcoat390contacts the liquid crystal material such that it is preferable that the overcoat390may be made of a material which does not react with the liquid crystal material. For example, the overcoat390may be formed of parylene.

The overcoat390may be made of a multilayer such as a dual layer or a triple layer. The dual layer includes two layers made of different materials. The triple layer includes three layers, and materials of two adjacent layers are different from each other. For example, the overcoat390may include a layer made of the organic insulating material and a layer made of the inorganic insulating material.

Although not shown, a polarizer may be further disposed on an upper surface and a lower surface of the liquid crystal display. The polarizer may include a first polarizer and a second polarizer. The first polarizer may be attached at the lower surface of the substrate110, and the second polarizer may be attached on the overcoat390.

Next, a manufacturing method of the liquid crystal display according to an exemplary embodiment of the inventive concept will be described with reference toFIG. 6toFIG. 20along the described drawings.

FIG. 6toFIG. 20are cross-sectional views of a structure in an intermediate step in a process according to a manufacturing method of a liquid crystal display according to an exemplary embodiment of the inventive concept,

Firstly, referring toFIG. 6, a conductive material is deposited and patterned on a substrate110made of glass or plastic to form a gate conductor including a plurality of gate lines121including first and second gate electrodes124hand124land a storage electrode line131including storage electrodes133and135.

Next, referring toFIG. 7, an inorganic insulating material such as a silicon oxide (SiOx) or a silicon nitride (SiNx) is deposited on the gate conductor and the substrate110to form a gate insulating layer140. The gate insulating layer140may be formed of the single layer or the multilayer.

Next, on the gate insulating layer140, a semiconductor material such as amorphous silicon, polycrystalline silicon, and an oxide semiconductor is deposited and patterned to form a first semiconductor154hand a second semiconductor154l. The first semiconductor154his formed to be disposed on the first gate electrode124h, and the second semiconductor154lis formed to be disposed on the second gate electrode124l.

Next, a conductive material is deposited and patterned to form a data conductor including a first data line171hincluding a first source electrode173h, a second data line171lincluding a second source electrode173l, and first and second drain electrodes175hand175l.

Alternatively, the semiconductor material and the data conductor metal material are sequentially deposited and patterned through photolithography using one photomask to form the first and second semiconductors154hand154land the data conductor.

Next, referring toFIG. 8, an inorganic insulating material or an organic insulating material is deposited on the data conductor to form a passivation layer180.

Next, a plurality of color filters230are formed on the passivation layer180. At least the color filter230on a region between the light transmitting area OPa of the first subpixel PXa and the light transmitting area OPb of the second subpixel PXb may be removed. For example, at least the color filter on the region where the first and second thin film transistors are formed may be removed, thereby forming an opening235.

Next, referring toFIG. 9, the organic insulating material is deposited on the color filter230to form a first insulating layer240. At least the first insulating layer240on the region between the light transmitting area OPa of the first subpixel PXa and the light transmitting area OPb of the second subpixel PXb may be removed. For example, at least the first insulating layer on the region where the first and second thin film transistors are formed may be removed, thereby forming an opening245. The edge of the opening245of the first insulating layer240may be disposed on the color filter230, that is, the width of the opening245is greater than the distance between adjacent color filters. The edge of the opening245may correspond to a boundary between the light transmitting areas, OPa and OPb, and the buffer zone BFZ, or may be formed in the light transmitting areas, OPa or OPb.

Next, referring toFIG. 10, an inorganic insulating material such as a silicon nitride (SiNx), a silicon oxide (SiOx), and a silicon oxynitride (SiOxNy) is deposited on the first insulating layer240to form a second insulating layer250.

Next, the passivation layer180and the second insulating layer250are patterned to form a first contact hole181hexposing the wide end of the first drain electrode175hand a second contact hole181lexposing the wide end of the second drain electrode175l. The first contact hole181hand the second contact hole181lmay be disposed within the opening235of the color filter230.

Next, referring toFIG. 11, the transparent conductive material such as ITO, IZO, or a metal thin film is deposited and patterned on the second insulating layer250to form a plurality of pixel electrodes including a first subpixel electrode191hand a second subpixel electrode191l. The first subpixel electrode191hmay include a protrusion195hconnected to the first drain electrode175hthrough the first contact hole181h, and the second subpixel electrode191lmay include a protrusion195lconnected to the second drain electrode175lthrough the second contact hole181l.

Next, referring toFIG. 12, a light blocking member220is formed on the pixel electrode. The light blocking member220may include portion disposed between the light transmitting areas of the adjacent pixels PX or between the light transmitting area OPa of the first subpixel PXa and the light transmitting area OPb of the second subpixel PXb. In this case, the upper surface of the light blocking member220disposed between the light transmitting area OPa of the first subpixel PXa and the light transmitting area OPb of the second subpixel PXb may be lower than the upper surface of the first and second subpixel electrodes191hand191lor the second insulating layer250disposed at the light transmitting area OPa of the first subpixel PXa and the light transmitting area OPb of the second subpixel PXb.

Next, referring toFIG. 13, a photosensitive organic material is coated on the first and second subpixel electrodes191hand191land a sacrificial layer300is formed through a photo-process. The sacrificial layer300is continuously formed along a plurality of pixel columns. The sacrificial layer300may cover the pixel PX and may be removed at the second valley V2through the photo-process.

Next, the conductive material such as ITO, IZO, and the metal thin film is deposited on the sacrificial layer300to form an opposing electrode270.

The inorganic insulating material such as a silicon nitride (SiNx), a silicon oxide (SiOx), and a silicon oxynitride (SiOxNy) is then deposited on the opposing electrode270to form a third insulating layer350.

Next, referring toFIG. 14, an organic material is coated and patterned on the third insulating layer350to form a roof layer360. The roof layer360may be mainly disposed at the light transmitting area OPa of the first subpixel PXa and the light transmitting area OPb of the second subpixel PXb. The region between the separated roof layers360for one pixel PX may correspond to the first valley V1formed later. The roof layer360may be formed to have a shape that extends along the pixel row.

Next, referring toFIG. 15, the inorganic insulating material such as a silicon nitride (SiNx) and a silicon oxide (SiOx) is deposited on the roof layer360and the third insulating layer350to form a fourth insulating layer370. The fourth insulating layer370is formed on the patterned roof layer360thereby protecting the side surface of the roof layer360.

Next, referring toFIG. 16, the fourth insulating layer370, the third insulating layer350, and the opposing electrode270are patterned to form the first valley V1. Accordingly, the sacrificial layer300is exposed at the first valley V1.

Next, referring toFIG. 17, oxygen plasma process for ashing is performed on the substrate110to which the sacrificial layer300is exposed or a developing process is performed to remove the sacrificial layer300. If the sacrificial layer300is removed, a microcavity305is generated at the position corresponding to a region in which the sacrificial layer300is removed by the oxygen plasma process or the developing process.

The first and second subpixel electrodes191hand191land the opposing electrode270are separated from each other by the microcavity305interposed therebetween, and the first and second subpixel electrodes191hand191land the roof layer360are separated from each other by the microcavity305interposed therebetween. The opposing electrode270and the roof layer360are formed to cover the upper surface and opposing side surfaces of the microcavity305.

The microcavity305may be exposed through the first valley V1, and the edge of the opposing electrode270, the third insulating layer350, and the fourth insulating layer370forming the edge of the first valley V1is referred to as an injection hole307. The injection hole307may be formed along the first valley V1. Alternatively, the injection hole307may be formed along the second valley V2.

Next, heat is applied to the substrate110to harden the roof layer360. Accordingly, the roof layer360may maintain the shape of the microcavity305.

A buffer zone BFZ is disposed between the first valley V1and the light transmitting area OPa of the first subpixel PXa or the light transmitting area OPb of the second subpixel PXb.

Next, referring toFIG. 18, an aligning agent including an alignment material is dripped on the substrate110by a spin coating method or an inkjet method. The aligning agent is injected into the microcavity305through the injection hole307. When the aligning agent is injected into the microcavity305and then a curing process is performed, a solvent is evaporated and the alignment material remains on an inner wall of the microcavity305.

Accordingly, a first alignment layer11may be formed on the first and second pixel electrodes191hand191land the second insulating layer250, and a second alignment layer21may be formed under the opposing electrode270. The first alignment layer11and the second alignment layer21may face each other with the microcavity305therebetween, and be connected to each other at the edge of the micro cavity305.

Light such as ultraviolet rays may be irradiated to the first and second alignment layers11and21to determine the alignment direction of the first and second alignment layers11and21.

The upper surface of the first alignment layer11disposed at the buffer zone BFZ is lower than the upper surface of the first alignment layer11disposed at the light transmitting area OPa of the first subpixel PXa or the light transmitting area OPb of the second subpixel PXb. Accordingly, as shown inFIG. 5, in the buffer zone BFZ, a height d2of the microcavity305may be higher than the height d1of the microcavity305at the light transmitting area OPa of the first subpixel PXa or the light transmitting area OPb of the second subpixel PXb.

Next, referring toFIG. 19, a liquid crystal material30including liquid crystal molecules31is dripped on the substrate110by an inkjet method or a dispensing method. Thus, the liquid crystal material30is injected into the microcavity305through the injection hole307to form a liquid crystal layer3. In this case, the liquid crystal material30may be dripped at the injection hole307formed along the odd-numbered first valley V1, but not dripped at the injection hole307formed along the even-numbered first valley V1. In contrast, the liquid crystal material30may be dripped at the injection hole307formed along the even-numbered first valley V1, but not dripped at the injection hole307formed along the odd-numbered first valley V1.

If the liquid crystal material30is dripped at the injection hole307formed along the odd-numbered first valley V1, the liquid crystal material30is injected inside the microcavity305through the injection hole307by a capillary force. At this time, air inside the microcavity305is discharged through the injection hole307formed along the even-numbered first valley V1such that the liquid crystal material30may be injected inside the microcavity305.

Alternatively, the liquid crystal material30may be dripped to all injection holes307. That is, the liquid crystal material30may be dripped to the injection holes307formed along the odd-numbered first valley V1and the injection holes307formed along the even-numbered first valley V1.

Referring toFIG. 19, after injecting the liquid crystal material30, the liquid crystal material30may remain on the first valley V1and/or the roof layer360. As described above, the liquid crystal material30remaining on the roof layer360may be recognized as a display defect such as a dark part and a texture in the pixel PX such that it must be removed.

Referring toFIG. 20, the liquid crystal material30remained on the roof layer360may be removed through DI cleansing, cleansing using an air knife, or a wiping cleansing method. At this time, the liquid crystal material30inside the microcavity305may be discharged together. However, according to an exemplary embodiment of the inventive concept, since the buffer zone BFZ is disposed between the first valley V1and the light transmitting area OPa of the first subpixel PXa or the light transmitting area OPb of the second subpixel PXb, the display defect may not be recognized although the liquid crystal material30in the microcavity305may be removed. Even if the liquid crystal material30is somehow removed in the buffer zone BFZ among the microcavity305such that a region in which the liquid crystal is removed35is formed, the space35is covered by the light blocking member220, thereby the display defect due to the absence of the liquid crystal material30may not be recognized.

Particularly, according to an exemplary embodiment of the inventive concept, in the buffer zone BFZ, the height d2of the microcavity305is higher than the height d1of the microcavity305at the light transmitting area OPa of the first subpixel PXa or the light transmitting area OPb of the second subpixel PXb. Accordingly, in the process of removing the remaining liquid crystal material30, the capillary force in the buffer zone BFZ is lower than the capillary force in the light transmitting area OPa of the first subpixel PXa or the light transmitting area OPb of the second subpixel PXb. Therefore, the liquid crystal material30near the boundary of the buffer zone BFZ and the light transmitting areas OPa and OPb is applied with a force to a direction toward the light transmitting areas OPa and OPb like a first direction r1. As described above, in the process of removing the remaining liquid crystal material30, the liquid crystal material30disposed at the light transmitting areas OPa and OPb may be prevented from being removed to the outside due to the force to a direction toward the light transmitting areas OPa and OPb like the first direction r1.

In contrast, the liquid crystal material30disposed at the buffer zone BFZ and the first valley V1may be easily discharged to the outside as shown by a second direction r2. Although the liquid crystal material30is partially discharged such that the space35is generated in the buffer zone BFZ, the buffer zone BFZ is covered by the light blocking member220such that the display defect is not recognized.

Next, referring toFIG. 4, an overcoat390is formed by depositing a material which does not react with the liquid crystal molecules310on the third insulating layer370. The overcoat390is formed to cover the injection hole307through which the microcavity305is exposed to the outside, thereby sealing the microcavity305.

Next, the structure of the liquid crystal display according to an exemplary embodiment of the inventive concept will be described with reference to referring toFIG. 21along withFIG. 3andFIG. 4. Like reference numerals are assigned to the same constituent elements as in the previous exemplary embodiment, and the same description is omitted.

FIG. 21is a cross-sectional view of another example of the liquid crystal display ofFIG. 3taken along a line V-V.

Referring toFIG. 21, the liquid crystal display according to the present exemplary embodiment is the same as that of the exemplary embodiment shown inFIG. 3andFIG. 4, however the first insulating layer240may also be disposed at the buffer zone BFZ and the first valley V1. In this case, the boundary of the opening245of the first insulating layer240may be adjacent to the boundary of the first contact hole181hor the second contact hole181l, may enclose the first contact hole181hor the second contact hole181l, and may approximately accord with the boundary of the first contact hole181hor the second contact hole181l.

In the present exemplary embodiment, the height d2of the microcavity305in the buffer zone BFZ may be higher than the height d1of the microcavity305in the light transmitting area OPa of the first subpixel PXa or the light transmitting area OPb of the second subpixel PXb. For this, in the present exemplary embodiment, the thickness of the light blocking member220disposed at the buffer zone BFZ and the first valley V1may be decreased by a required degree to control an interval between the first alignment layer11and the second alignment layer21. The height of the upper surface of the light blocking member220at the buffer zone BFZ and the first valley V1may be lower than the height of the first and second subpixel electrodes191hand191hlin the light transmitting areas OPa and OPb.

The exemplary embodiment in which the first valley V1and the buffer zone BFZ are disposed between the first subpixel PXa and the second subpixel PXb is shown, however it is not limited thereto. For example, the first valley V1and the buffer zone BFZ according to the structure and the manufacturing method like an exemplary embodiment of the inventive concept may be applied to the light blocking member220disposed between the adjacent pixels PX.