Multi-input amplifier with programmable embedded attenuators

Described herein are variable gain amplifiers and multiplexers that embed programmable attenuators into switchable paths that allow signals in a high gain mode to bypass attenuation. This advantageously reduces or eliminates performance penalties in the high gain mode. The programmable attenuators can be configured to improve linearity of the amplification process through pre-LNA attenuation in targeted gain modes. In addition, described herein are variable gain amplifiers with embedded attenuators in a switching network. The attenuators can be embedded onto switches and can be configured to have little or no effect on a noise factor in a high gain mode because the switching network can provide an attenuation bypass in a high gain mode and an attenuation in other gain modes. The programmable attenuators can be embedded onto a multi-input LNA architecture.

BACKGROUND

Field

The present disclosure generally relates to amplifiers for wireless communication devices.

Description of Related Art

In electronic applications, such as radio-frequency (RF) applications, it is sometimes desirable to amplify or attenuate a signal. For example, a to-be-transmitted signal can be amplified by a power amplifier, and a received signal can be amplified by a low-noise amplifier. In another example, one or more attenuators can be implemented along either or both of the foregoing transmit and receive paths as needed or desired to attenuate the respective signal(s).

SUMMARY

According to a number of implementations, the present disclosure relates to a variable-gain signal amplifier that includes a first attenuation stage having a plurality of branches, each branch including a switch and a variable-attenuation element, the first attenuation stage having a common output and an input for each branch. The amplifier also includes an amplification stage coupled to the common output of the first attenuation stage to provide a multiplexed output. The amplifier also includes a second attenuation stage configured to receive the multiplexed output of the amplification stage to provide an amplified output signal to maintain various desired characteristics across a range of gain levels.

In some embodiments, the signal includes a radio frequency signal. In some embodiments, the first attenuation stage is configured to provide a bypass path so that a signal received at an input is directed to the common output without being attenuated by the variable-attenuation element. In further embodiments, the first attenuation stage is configured to provide the bypass path in a high gain mode. In yet further embodiments, in the high gain mode, a noise factor of a signal is not increased due at least in part to bypassing the variable-attenuation element. In further embodiments, in other gain modes, IIP3 of the signal is increased due at least in part to tailored attenuation provided by the variable-attenuation element.

In some embodiments, the amplifier is configured to receive signals at respective inputs that cover a plurality of cellular frequency bands. In some embodiments, the amplifier is configured to attenuate or amplify a signal received at a particular input independent of attenuation or amplification of other signals received at other inputs.

In some embodiments, the amplifier further includes a control circuit configured to send control signals to the first attenuation stage, the amplification stage, or the second attenuation stage. In further embodiments, the control circuit includes a controller configured to provide an amplification control signal in a high gain mode that causes the first attenuation stage to provide a path that bypasses the variable-attenuation element.

According to a number of implementations, the present disclosure relates to a variable-gain amplifier includes a switching stage having a plurality of branches, each branch including a switch and an embedded programmable attenuation element, the first switching stage having a common output and an input for each branch. The amplifier also includes an amplification stage coupled to the common output of the switching stage to provide a multiplexed output. The amplifier also includes a post-amplification attenuation stage configured to receive the multiplexed output of the amplification stage, the post-amplification attenuation stage configured to provide an attenuation path through an embedded programmable attenuator and a bypass path, the paths configured to maintain various desired characteristics across a range of gain levels. The amplifier also includes a splitter configured to receive a single input and to provide a plurality of outputs.

In some embodiments, the first switching stage is configured to selectively direct targeted signals to the amplification stage. In some embodiments, for individual branches of the plurality of branches, the switching stage is configured to provide an attenuation path that passes through the embedded programmable attenuation element and a bypass path that does not pass through the embedded programmable attenuation element. In further embodiments, in a high gain mode, the switching stage is configured to direct signals along the bypass path. In yet further embodiments, in the high gain mode, signals directed along the bypass path maintain substantially the same value of a noise factor before and after the switching stage. In further embodiments, in other gain modes, signals directed along attenuation paths improve linearity due at least in part to tailored attenuations provided by the embedded programmable attenuation elements.

In some embodiments, the amplifier further includes a control circuit configured to send control signals to the switching stage, the amplification stage, the post-amplification attenuation stage, or the splitter. In further embodiments, the control circuit includes a controller configured to provide an amplification control signal in a high gain mode that causes the switching stage to provide a path that bypasses the variable-attenuation element.

According to a number of implementations, the present disclosure relates to a front end architecture that includes a variable gain signal amplifier including a first attenuation stage having a plurality of branches, each branch including a switch and a variable-attenuation element, the first attenuation stage having a common output and an input for each branch; an amplification stage coupled to the common output of the first attenuation stage to provide a multiplexed output; and a second attenuation stage configured to receive the multiplexed output of the amplification stage to provide an amplified output signal to maintain various desired characteristics across a range of gain levels. The front end architecture also includes a filter assembly coupled to the variable gain signal amplifier to direct frequency bands to select inputs of the variable gain signal amplifier. The front end architecture also includes a controller implemented to control the variable gain signal amplifier to provide a plurality of gain modes such that, in a high gain mode, the variable gain signal amplifier directs signals along a path that bypasses the variable-attenuation element in a particular branch.

In some embodiments, in the high gain mode, a noise factor of a signal is not increased due at least in part to bypassing the variable-attenuation element. In further embodiments, in other gain modes, IIP3 of the signal is increased due at least in part to tailored attenuation provided by the variable-attenuation element.

According to a number of implementations, the present disclosure relates to a wireless device that includes a diversity antenna and a filter assembly coupled to the diversity antenna to receive signals and to direct frequency bands along select paths. The wireless device also includes a variable gain signal amplifier coupled to the filter assembly to receive signals from select paths, the variable gain signal amplifier including a first attenuation stage having a plurality of branches, each branch including a switch and a variable-attenuation element, the first attenuation stage having a common output and an input for each branch; an amplification stage coupled to the common output of the first attenuation stage to provide a multiplexed output; and a second attenuation stage configured to receive the multiplexed output of the amplification stage to provide an amplified output signal to maintain various desired characteristics across a range of gain levels. The wireless device also includes a controller implemented to control the variable gain signal amplifier to provide a plurality of gain modes such that, in a high gain mode, the variable gain signal amplifier directs signals along a path that bypasses the variable-attenuation element in a particular branch.

In some embodiments, in the high gain mode, a noise factor of a signal is not increased due at least in part to bypassing the variable-attenuation element. In further embodiments, in other gain modes, IIP3 of the signal is increased due at least in part to tailored attenuation provided by the variable-attenuation element.

DETAILED DESCRIPTION OF SOME EMBODIMENTS

Overview

FIG. 1illustrates a wireless device100having a primary antenna160and a diversity antenna170. The wireless device100includes an RF module106and a transceiver104that may be controlled by a controller102. The transceiver104is configured to convert between analog signals (e.g., radio-frequency (RF) signals) and digital data signals. To that end, the transceiver104may include a digital-to-analog converter, an analog-to-digital converter, a local oscillator for modulating or demodulating a baseband analog signal to or from a carrier frequency, a baseband processor that converts between digital samples and data bits (e.g., voice or other types of data), or other components.

The RF module106is coupled between the primary antenna160and the transceiver104. Because the RF module106may be physically close to the primary antenna160to reduce attenuation due to cable loss, the RF module106may be referred to as front-end module (FEM). The RF module106may perform processing on an analog signal received from the primary antenna160for the transceiver104or received from the transceiver104for transmission via the primary antenna160. To that end, the RF module106may include filters, power amplifiers, low noise amplifiers, band select switches, attenuators, matching circuits, and other components.

When a signal is transmitted to the wireless device100, the signal may be received at both the primary antenna160and the diversity antenna170. The primary antenna160and diversity antenna170may be physically spaced apart such that the signal at the primary antenna160and diversity antenna170is received with different characteristics. For example, in one embodiment, the primary antenna160and the diversity antenna170may receive the signal with different attenuation, noise, frequency response, and/or phase shift. The transceiver104may use both of the signals with different characteristics to determine data bits corresponding to the signal. In some implementations, the transceiver104selects from between the primary antenna160and the diversity antenna170based on the characteristics, such as selecting the antenna with the highest signal-to-noise ratio. In some implementations, the transceiver104combines the signals from the primary antenna160and the diversity antenna170to increase the signal-to-noise ratio of the combined signal. In some implementations, the transceiver104processes the signals to perform multiple-input/multiple-output (MiMo) communication.

In some embodiments, the diversity antenna170is configured to receive signals within cellular frequency bands and wireless local area network (WLAN) frequency bands. In such embodiments, the wireless device100can include a multiplexer, switching network, and/or filter assembly coupled to the diversity antenna170that is configured to separate the diversity signal into different frequency ranges. For example, the multiplexer can be configured to include a low pass filter that passes a frequency range that includes low band cellular frequencies, a bandpass filter that passes a frequency range that includes low band WLAN signals and mid-band and high-band cellular signals, and a high pass filter that passes a frequency range that includes high-band WLAN signals. This example is merely for illustrative purpose. As another example, the multiplexer can have a variety of different configurations such as a diplexer that provides the functionality of a high pass filter and a low pass filter.

Because the diversity antenna170is physically spaced apart from the primary antenna160, the diversity antenna170can be coupled to the transceiver104by a transmission line, such as a cable or a printed circuit board (PCB) trace. In some implementations, the transmission line is lossy and attenuates the signal received at the diversity antenna170before it reaches the transceiver104. Thus, in some implementations, gain is applied to the signal received at the diversity antenna170. The gain (and other analog processing, such as filtering) may be applied by the diversity receiver module108. Because such a diversity receiver module108may be located physically close to the diversity antenna170, it may be referred to a diversity receiver front-end module, examples of which are described in greater detail herein.

The RF module106and the diversity receiver module108include variable gain amplifiers110a,110bconfigured to selectively attenuate and amplify signals from the primary antenna160and the diversity antenna170, respectively. Each variable gain amplifier110a,110bcan include a programmable attenuation stage before and after an amplification stage. Signals received at the variable gain amplifiers110a,110bcan be attenuated by the pre-amplification attenuation stage or the signals can be allowed to bypass attenuation, as described in greater detail herein. The selected attenuation, or the provided bypass path, can be controlled by the controller102. The variable, programmable attenuation can be embedded on the variable gain amplifier110a,110b. The variable gain amplifier110a,110bcan receive multiple input signals and output a single signal or a plurality of output signals. Advantageously, the architecture of the variable gain amplifier110a,110bcan allow a single amplifier, such as a low-noise amplifier (LNA), to be used to process signals covering a plurality of cellular frequency bands.

The controller102can be configured to generate and/or send control signals to other components of the wireless device100. In some embodiments, the controller102provides signals based at least in part on specifications provided by the mobile industry processor interface alliance (MIPI® Alliance). The controller102can be configured to receive signals from other components of the wireless device100to process to determine control signals to receive to other components. In some embodiments, the controller102can be configured to analyze signals or data to determine control signals to send to other components of the wireless device100. The controller102can be configured to generate control signals based on gain modes provided by the wireless device100. For example, the controller102can send control signals to the variable gain amplifiers110a,110bto control attenuation and amplification provided by the amplifiers. Similarly, the controller102can be configured to generate control signals based on programmed attenuations. For example, the controller102can send control signals to pre- and post-amplification attenuation stages to control the amount of attenuation provided at those stages.

In some implementations, the controller102generates amplifier control signal(s) based on a quality of service metric of an input signal received at the input. In some implementations, the controller102generates the amplifier control signal(s) based on a signal received from a communications controller, which may, in turn, be based on a quality of service (QoS) metric of the received signal. The QoS metric of the received signal may be based, at least in part, on the diversity signal received on the diversity antenna170(e.g., an input signal received at the input). The QoS metric of the received signal may be further based on a signal received on a primary antenna160. In some implementations, the controller102generates the amplifier control signal(s) based on a QoS metric of the diversity signal without receiving a signal from the communications controller. In some implementations, the QoS metric includes a signal strength. As another example, the QoS metric may include a bit error rate, a data throughput, a transmission delay, or any other QoS metric. In some implementations, the controller102controls the gain (and/or current) of the amplifiers in the variable gain amplifiers110a,110b. In some implementations, the controller102controls the gain of other components of the wireless device based on an amplifier control signal.

In some implementations, the variable gain amplifiers110a,110bmay include a step-variable gain amplifier configured to amplify received signals with a gain of one of a plurality of configured amounts indicated by an amplifier control signal. In some implementations, the variable gain amplifiers110a,110bmay include a continuously-variable gain amplifier configured to amplify received signals with a gain proportional to or dictated by the amplifier control signal. In some implementations, the variable gain amplifiers110a,110bmay include a step-variable current amplifier configured to amplify received signals by drawing a current of one of plurality of configured amounts indicated by the amplifier control signal. In some implementations, the variable gain amplifiers110a,110bmay include a continuously-variable current amplifier configured to amplify received signals by drawing a current proportional to the amplifier control signal.

FIG. 2shows a diversity receiver (DRx) configuration200including a DRx front-end module (FEM)208. The DRx configuration200includes a diversity antenna170that is configured to receive a diversity signal and provide the diversity signal to the DRx FEM150through a filter assembly272. The filter assembly272can include a multiplexer, for example, that is configured to selectively direct signals within targeted frequency ranges along respective paths to a multiplexer with programmable attenuation210. The signals can include cellular signals (e.g., low-, mid-, high- and/or ultra-high-band cellular frequencies) mixed with WLAN signals. In some embodiments, signals directed along a first path include cellular signals (e.g., mid- and/or high-band cellular frequencies) with WLAN signals and signals directed along a second path include cellular signals (e.g., low-band cellular frequencies) without WLAN signals.

The DRx FEM208is configured to perform processing on the diversity signals received from the filter assembly272. For example, the DRx FEM208may be configured to filter the diversity signals to one or more active frequency bands that can include cellular and/or WLAN frequency bands. The controller102can be configured to control the DRx FEM208to selectively direct signals to targeted filters to accomplish the filtering. As another example, the DRx FEM208may be configured to amplify one or more of the filtered signals using the multiplexer with programmable attenuation210. To that end, the DRx FEM208may include filters, low-noise amplifiers, band select switches, matching circuits, and other components. The controller102can be configured to interact with components in the DRx FEM208to intelligently select paths for the diversity signals through the DRx FEM208. In certain implementations, the filter assembly272is located on a die separate from the DRx FEM208.

The DRx FEM208transmits at least a portion of the processed diversity signals to the transceiver104. The transceiver104may be controlled by the controller102. In some implementations, the controller102may be implemented within the transceiver104.

The DRx FEM208can be configured to provide a plurality of gain modes. For the plurality of gain modes, different attenuations can be applied in the multiplexer210. In one or more gain modes, the multiplexer210can be configured to direct signals through an attenuation path that selectively attenuates the signal, such as with a variable and/or programmable attenuator. These programmable attenuators can be embedded onto a multi-input amplifier architecture. In a high gain mode, the multiplexer210can be configured to provide a bypass path so that the signal does not pass through the attenuation path. The programmable attenuators can be used before and/or after an amplification stage.

In some embodiments, utilization of programmable attenuation in a multiplexer prior to an amplification stage, e.g., an LNA, can provide improved linearity and/or IIP3. The programmable attenuation can beneficially allow the signal to be matched to a desired or targeted range of the amplifier. In certain implementations, attenuating a signal prior to the amplification stage can increase noise in the signal. However, the DRx configuration200can be configured to attenuate signals with a relatively large signal to noise and to bypass attenuation for signals with a relatively low signal to noise. In some embodiments, the DRx configuration200is configured to bypass attenuation when operating in a high gain mode and to attenuate signals when operating in other gain modes. This can advantageously allow the DRx configuration200to attenuate certain signals to improve linearity while allowing other signals to bypass attenuation to not increase noise in the signal. Another advantage with this configuration is that large signals that enter the DRx FEM208can be selectively attenuated so that the amplifier is not damaged by signals that are larger than the amplifier is designed to handle. The embedded attenuators can allow the DRx FEM208to tailor attenuation based on signals, gain mode, and amplifier operating characteristics to maintain and/or improve signal quality (e.g., by increasing or maintaining linearity through the amplification process).

In some embodiments, the multiplexer with programmable attenuation210is configured to receive a plurality of input signals and provide a single output signal. In certain embodiments, the multiplexer210can be configured to receive a plurality of input signals and provide a corresponding plurality of output signals. The multiplexer210can be configured to provide a single output signal that is transmitted to a single amplifier, allowing the DRx FEM210to use one amplifier or amplification stage for a plurality of frequency bands. This can advantageously reduce the number of components used in the DRx FEM208, thereby reducing costs associated with manufacturing the DRx FEM208.

The multiplexer210can include switches that provide a plurality of switchable paths through the multiplexer210. The plurality of switchable paths can correspond to a plurality of frequency bands, each switchable path corresponding to a particular frequency band or particular frequency bands (e.g., overlapping frequency bands). The filter assembly272can be configured to direct signals corresponding to particular frequency bands along designated paths to the multiplexer210. In certain implementations, the switchable paths through the multiplexer210can also be configured to selectively direct signals on a particular path through an attenuation path or to bypass the attenuation path. For example, one or more switches can be operated in parallel with a variable attenuator so that in a bypass configuration, the signal passes through the switch and not the variable attenuator (e.g., the switch is closed) and in an attenuation configuration, the signal passes through the variable attenuator (e.g., the switch is open). In the bypass configuration, the signal does not suffer a noise penalty associated with the attenuation configuration. This can advantageously allow the DRx FEM208to provide variable gain and/or a plurality of gain modes while reducing the impact on the noise figure (NF) relative to configurations that do not selectively attenuate signals or configurations that do not tailor the attenuation of signals.

The switches of the multiplexer210can be embedded on the same die as the multiplexer210. These embedded switches can be configured to selectively provide paths through the multiplexer210and can be configured to selectively direct signals along attenuation paths or bypass paths. The attenuation paths can be configured to attenuate signals, wherein the attenuation is tailored to the amplification stage that follows the switchable paths in the multiplexer210. The DRx FEM208with the multiplexer210can be an architecture that provides a plurality of switchable paths with programmable attenuation, wherein each switchable path can be amplified using a variable gain amplifier.

The controller102can be configured to control the DRx FEM208to selectively direct signals to suitable signal paths. For example, the controller102and the DRx FEM208can control the multiplexer210to direct signals along an attenuation path or a bypass path. As another example, the controller102and the DRx FEM208can control the multiplexer210to provide switchable paths through the multiplexer210based on desired or targeted cellular signals or WLAN signals. As another example, the controller102and the DRx FEM208can control the multiplexer210to tailor the attenuation applied to signals directed along the attenuation path. As another example, the controller102and the DRx FEM208can provide a plurality of gain modes.

Example Architectures of Variable Gain Amplifiers

Front end modules generally include amplifiers such as low-noise amplifiers (LNAs) to amplify received signals. In wireless devices that provide a variety of gain modes, it may be advantageous to attenuate signals prior to amplifying them. However, this may adversely affect small signals, increasing the noise and making the signal to noise ratio worse.

Accordingly, provided herein are variable gain amplifiers and multiplexers that embed programmable attenuators into switchable paths that allow signals in a high gain mode to bypass attenuation. This advantageously reduces or eliminates performance penalties in the high gain mode. Furthermore, the programmable attenuators can be configured to improve linearity of the amplification process through pre-LNA attenuation in targeted gain modes. Although noise may increase in these gain modes that are attenuated prior to amplification, this increase in noise may be negligible or sufficiently small that the advantages of improved linearity make the trade-off desirable or beneficial.

The programmable attenuators can be embedded into switches that are before and after an amplification stage. These programmable input and output attenuations can be tailored to achieve a targeted gain, noise factor (NF) and linearity (IIP3). Furthermore, these attenuations can be configured to make the amplifier less susceptible to failure when large signals are received because the attenuators can reduce the amplitude of these signals so that they fall within a targeted or suitable range for the amplifier.

Accordingly, described herein are variable gain amplifiers with embedded attenuators in a switching network. The attenuators can be embedded onto switches and can be configured to have little or no effect on a noise factor in a high gain mode because the switching network can provide an attenuation bypass in a high gain mode and an attenuation in other gain modes. The programmable attenuators can be embedded onto a multi-input LNA architecture. For example, an attenuation block can be embedded onto a multi-input switch and an attenuation block can be embedded onto an output switch.

FIG. 3Aillustrates an example variable gain amplifier310athat can be implemented in a front end module308a, such as a diversity receiver module. The variable gain amplifier310aincludes a first attenuation stage320, an amplification stage330, and a second attenuation stage340. The first attenuation stage320provides pre-amplification attenuation and the second attenuation stage340provides post-amplification attenuation. A controller102can be configured to control operation of the first attenuation stage320, the amplification stage330, and the second attenuation stage340. The controller102is configured similarly to the controller102described herein with reference toFIGS. 1 and 2.

The variable gain amplifier310aincludes a plurality of input ports312a-312cconfigured to receive input signals (e.g., RF signals) and an output port318configured to provide a processed (e.g., amplified and/or attenuated) signal. The first attenuation stage320includes a plurality of inputs322a-322ccorresponding to the input ports312a-312cand a common output328. The first attenuation stage320provides a plurality of branches with individual branches having a switch (e.g., switch324a,324b, or324c) and a variable attenuation element (e.g., attenuator326a,326b, or326c) that are configured to selectively provide a path through the first attenuation stage320. The switches324a-324care configured to provide a path through the first attenuation stage320and to selectively direct signals through a corresponding attenuator326a-326cor to bypass the attenuator326a-326c. A signal directed along an individual path through the first attenuation stage320can be selectively attenuated using a tailored attenuation at a corresponding attenuator326a-326cor to bypass attenuation. The switches324a-324ccan also be configured to selectively provide a path through the first attenuation stage320to the amplification stage330for targeted or selected signals. For example, the switches324a-324ccan be configured to direct signals through the first attenuation stage320that arrive at certain input ports while blocking signals from other input ports so that they do not arrive at output port328.

The amplification stage330is configured to amplify signals received from the first attenuation stage320and to pass the amplified signals to the second attenuation stage340. In this way, the variable gain amplifier310acan be configured to provide multiplexed output because the first attenuation stage320receives signals at a plurality of input ports322a-322cand the amplification stage330receives an input signal at a single input port and provides a processed signal at a single output port. The amplification stage330can include any suitable amplifier circuit configured to provide a desired or targeted amplification. In some embodiments, the amplification stage330includes a single low-noise amplifier (LNA) circuit configured to amplify signals from a plurality of frequency bands (e.g., cellular frequency bands and/or WLAN frequency bands). Thus, as used herein, the first attenuation stage320can be referred to as pre-LNA attenuation and the second attenuation stage340can be referred to as post-LNA attenuation. However, it is to be understood that the embodiments described herein are not to be limited to implementations that utilize low-noise amplifiers but include implementations that use a variety of amplifiers in the variable gain amplifier310a.

The amplification stage330can be configured to amplify signals based at least in part on a plurality of gain modes. For example, the amplification stage330can be configured to provide a first amplification or gain for a first gain mode, a second amplification or gain for a second gain mode, and so on. The amplification stage330can be controlled by the controller102to control the gain provided at the amplification stage. For example, the controller102can provide a signal indicative of a desired or targeted gain to the amplification stage330and the amplification stage330can provide the targeted gain. The controller102may receive an indication of the targeted gain from another component in a wireless device, for example, and control the amplification stage330based at least in part on that indication. Similarly, the first and second attenuation stages320,340can be controlled based at least in part on a gain mode and/or targeted gain of the variable gain amplifier310a.

The second attenuation stage340can be configured in a manner similar to the first attenuation stage320. In particular, the second attenuation stage340can be similar to the first attenuation stage320that is configured to receive a signal at a single input and to provide a signal at a single output. The second attenuation stage340is configured to receive a multiplexed output from the amplification stage330and to direct the signal along switchable paths to selectively attenuate the signal with programmable attenuation or to bypass attenuation. In certain embodiments, the second attenuation stage340provides at least two switchable paths through the stage, a first path passing through an attenuator and a second path that bypasses the attenuator. In various embodiments, the second attenuation stage340provides a single path through the stage wherein the signal is attenuated with a fixed or programmable attenuation. The signal output from the second attenuation stage340is passed to the output port318of the variable gain amplifier310a.

Accordingly,FIG. 3Aillustrates a variable-gain signal amplifier310athat includes a first attenuation stage320having a plurality of branches, each branch including a switch324a-324cand a variable-attenuation element326a-326c. The first attenuation stage320includes an input322a-322cfor each branch and a common output328. The variable gain amplifier310aincludes an amplification stage330coupled to the common output328of the first attenuation stage320to provide a multiplexed output. The variable gain amplifier310aincludes a second attenuation stage340configured to receive the multiplexed output of the amplification stage330to provide an amplified output signal to maintain various desired characteristics across a range of gain levels. Each branch through the first attenuation stage320can include a bypass path and an attenuation path controlled by a switch. The attenuation path includes a variable or fixed attenuation for each branch.

The variable gain signal amplifier310acan be configured to achieve relatively low noise and high linearity (e.g., higher IIP3) relative to amplifiers without an embedded switching network with programmable attenuators. The variable gain signal amplifier310acan be configured to amplify radio frequency (RF) signals such as cellular signals, WLAN signals, BLUETOOTH® signals, GPS signals, and the like. The variable gain signal amplifier310acan be configured to provide broadband capabilities by receiving signals over a plurality of frequency bands at the multiple inputs312a-312cand processing these signals. The variable gain signal amplifier310acan be configured to independently process signals at the respective inputs312a-312c. The variable gain signal amplifier310acan be configured to be controlled by a control circuit assembly, such as the controller102. The control circuit assembly can intelligently and selectively switch paths in the first attenuation stage320and can selectively program attenuations provided by the attenuators326a-326c.

As described herein, the variable gain signal amplifier310aprovides a high gain mode that does not suffer from a performance penalty experienced by other gain modes due to passing through an attenuator prior to amplification. By embedding attenuators to existing switching architectures, high gain or other gain modes can be configured to bypass attenuation thereby eliminating a source of noise in the processing chain. In some implementations, the variable gain signal amplifier310ais a multi-input LNA with tunable pre- and/or post-LNA attenuations. The pre-LNA attenuation can be used to meet targeted linearity when signals are large, for example. In certain implementations, a single amplifier or LNA can be used for multiple cellular bands.

FIG. 3Billustrates an example of a variable gain amplifier310bthat is configured similarly to the variable gain amplifier310adescribed herein with reference toFIG. 3A. The variable gain amplifier310bincludes a splitter350configured to receive a signal at a single input port and to provide signals at a plurality of output ports. The splitter350is controlled by the controller102to direct input signals to a targeted output. Accordingly, the variable gain amplifier310bcan be configured to receive signals at a plurality of inputs312a-312cand to provide processed signals at a corresponding plurality of outputs318a-318c. These signals can be selectively attenuated and amplified, as described herein with reference toFIG. 3A.

Thus,FIG. 3Billustrates a variable-gain amplifier310bthat includes a first attenuation stage320having a plurality of branches, each branch including a switch324a-324cand a variable-attenuation element326a-326c. The first attenuation stage320includes a common output328and an input322a-322cfor each branch. The variable gain amplifier310bincludes an amplification stage330coupled to the common output328of the first attenuation stage320to provide a multiplexed output. The variable gain amplifier310bincludes a second attenuation stage340configured to receive the multiplexed output of the amplification stage330to provide an amplified output signal to maintain various desired characteristics across a range of gain levels. The variable gain amplifier310bincludes a splitter350. Each branch through the first attenuation stage320can include a bypass path and an attenuation path controlled by a switch. The attenuation path includes a variable or fixed attenuation for each branch.

FIG. 4illustrates an example variable gain amplifier410having a first attenuation stage420with a plurality of inputs322a-322cand a common output328. The signals output at the common output328are directed to an amplification stage330, as described herein with reference toFIGS. 3A and 3B. The variable gain amplifier410includes a controller102configured to provide control signals to the first attenuation stage420and the amplification stage330. These control signals can be configured to control attenuation and/or amplification provided by the variable gain amplifier410.

Between the plurality of inputs322a-322cand the common output328of the first attenuation stage420, a plurality of branches425a-425care provided to provide switchable paths through the stage. Signals received at individual inputs322a-322care directed to a corresponding branch425a-425c, the corresponding branch425a-425cconfigured to selectively provide a path through the branch425a-425cto the common output328. If a path is provided through the branch425a-425c, the first attenuation stage420can be further configured to selectively direct the signal path through a variable attenuator R1or to bypass the attenuator R1. It is to be understood that although three inputs322a-322cand branches425a-425care illustrated, the variable gain amplifier410can include any suitable number of inputs and corresponding branches. For example and without limitation, the variable gain amplifier410can include at least 2 inputs and corresponding branches, at least 4 inputs and corresponding branches, at least 8 inputs and corresponding branches, at least 16 inputs and corresponding branches, at least 32 inputs and corresponding branches, at least 64 inputs and corresponding branches, or at least any number of inputs and corresponding branches in the described ranges. As another example and without limitation, the variable gain amplifier410can include less than or equal to 64 inputs and corresponding branches, less than or equal to 32 inputs and corresponding branches, less than or equal to 16 inputs and corresponding branches, less than or equal to 8 inputs and corresponding branches, less than or equal to 4 inputs and corresponding branches, or less than or equal to any number of inputs and corresponding branches in the described ranges.

By way of example, an individual branch425a-425ccan be configured to open suitable switches so that there is no signal path through the branch. The first attenuation stage420can thus be configured to select signals or frequency bands to process by selectively providing paths from inputs322a-322cto the output328.

By way of example, when the first attenuation stage420provides a path from an input322a-322cthrough a corresponding branch425a-425cto the output328, individual branches425a-425ccan be further configured to selectively provide paths that attenuate signals or that bypass attenuation. To bypass attenuation, such as in a high gain mode, a branch425a-425ccloses the switch S1and opens switches S2and S3. To attenuate the signal, such as in other gain modes, a branch425a-425copens switch S1and closes switches S2and S3so that the signal passes through variable attenuator R1. The switches S1-S3can be any suitable component or combination of components that provide switching capabilities. The variable attenuator R1can be any suitable component or combination of components that provide a programmable attenuation. The variable attenuator R1can be configured to provide varying levels of attenuation based at least in part on signals received from the controller102, the gain mode provided by the variable gain amplifier410, or a combination of both. The variable attenuators R1can be programmable attenuators that are embedded into input switches. This can reduce or eliminate negative impacts on the noise factor (NF) in certain gain modes that bypass the attenuators, such as high gain modes.

FIG. 5illustrates an example variable gain amplifier510having an amplification stage330, as described herein with reference toFIGS. 3A and 3B, and a second attenuation stage540. The variable gain amplifier510includes a controller102configured to provide control signals to the amplification stage330and the second attenuation stage540. These control signals can be configured to control attenuation and/or amplification provided by the variable gain amplifier510.

The second attenuation stage540can be configured to selectively direct signals received from the amplification stage330through a variable attenuator R1or to bypass the attenuator R1. To bypass attenuation, such as in a high gain mode, the second attenuation stage540closes the switch S1and opens switches S2and S3. To attenuate the signal, such as in other gain modes, the second attenuation stage540opens switch S1and closes switches S2and S3so that the signal passes through variable attenuator R1. The variable attenuator R1can be embedded onto the output switch. The variable attenuator R1may be bypassed in certain gain modes, reducing or eliminating the negative effects of attenuating signals for these gain modes, such as a high gain mode.

FIG. 6illustrates an example multiplexer620having an input port622, a band selection switch623, an attenuation selection branch625, and an output port628. For clarity, a single branch through the multiplexer620is illustrated, but it is to be understood that multiple switches and branches through the multiplexer can be provided, as described in greater detail herein with reference toFIG. 4, and these signals can be output at the common output port628. Signals that pass from the input port622to the output port628are transmitted to an amplification stage330, described in greater detail herein with reference toFIGS. 3A and 3B. It is also to be understood that the multiplexer620and the amplification stage330can be controlled by a controller (not shown), as described in greater detail herein with reference toFIGS. 3A-5. Because the multiplexer620includes an attenuation selection branch625, the multiplexer620may be also referred to as an attenuation stage, such as the attenuation stages320,420described in greater detail herein with respect toFIGS. 3A, 3B and 4.

With reference toFIG. 6, the band selection switch623allows the multiplexer620to select which signals are passed to the amplification stage330. This can be used to select signals from targeted, selected, or desired frequency bands. With multiple branches in the multiplexer620, corresponding band selection switches623can be used to select targeted frequency bands for processing. These band selection switches623can be opened and closed in any suitable pattern (e.g., based on time) or based on signals received from a controller. In this way, the multiplexer620and the amplification stage330are configured to provide a multiplexed output. The band selection switch623includes transistors Q1, Q2configured to selectively direct signals to a ground potential or other reference voltage. The band selection switch623can include other components to provide suitable bias voltages to operate the transistors Q1, Q2and/or to provide impedance matching or other signal conditioning elements.

The attenuation selection branch625is configured to selectively provide an attenuation path through variable attenuator R1and a bypass path through transistors Q3and Q4. The attenuation path is controlled by the transistors Q5and Q6and includes variable attenuator R1and resistors R2-R4. The resistors R2-R4can have fixed resistance values and can be selected to provide desirable signal characteristics across a range of gain modes, signal amplitudes, and/or programmed attenuations. The variable attenuator R1can be configured to have a plurality of values that depend at least in part on an operating gain mode, frequency band, signal amplitude, or the like. The bypass path is controlled by the transistors Q3and Q4and may include additional electrical components (not shown) to provide desirable signal characteristics across a range of gain modes, signal amplitudes, and/or programmed attenuations. In some embodiments, the bypass path is selected when operating in a high gain mode and the attenuation path is selected when operating in other gain modes.

The multiplexer620can be configured as a multiplexer having variable gain in each branch. The programmable attenuation can be provided in a switching stage or switching network prior to the amplification stage330. This switching stage can include a plurality of attenuation selection branches625.

FIG. 7illustrates an example post-amplification attenuation stage740configured to provide an attenuation path and a bypass path. Signals received from an amplification stage330, described in greater detail herein with reference toFIGS. 3A and 3B, can be selectively attenuated using a programmable attenuator R1. It is to be understood that the post-amplification attenuation stage740and the amplification stage330can be controlled by a controller (not shown), as described in greater detail herein with reference toFIGS. 3A-5. The post-amplification attenuation stage740may be implemented as a second attenuation stage340,540, described in greater detail herein with respect toFIGS. 3A, 3B and 5.

Similar to the attenuation selection branch625described with reference toFIG. 6, the post-amplification attenuation stage740is configured to selectively provide an attenuation path through variable attenuator R1and a bypass path through transistors Q3and Q4. The attenuation path is controlled by the transistors Q5and Q6and includes variable attenuator R1and resistors R2-R4. The resistors R2-R4can have fixed resistance values and can be selected to provide desirable signal characteristics across a range of gain modes, signal amplitudes, and/or programmed attenuations. The variable attenuator R1can be configured to have a plurality of values that depend at least in part on an operating gain mode, frequency band, signal amplitude, or the like. The bypass path is controlled by the transistors Q3and Q4and may include additional electrical components (not shown) to provide desirable signal characteristics across a range of gain modes, signal amplitudes, and/or programmed attenuations. In some embodiments, the bypass path is selected when operating in a high gain mode and the attenuation path is selected when operating in other gain modes.

FIGS. 8A and 8Billustrate examples of an attenuation stage740operating in a bypass mode (FIG. 8A) and in an attenuation mode (FIG. 8B). The attenuation stage740can be a post-amplification stage as described herein with reference toFIG. 7or a branch in a pre-amplification stage or multiplexer as described herein with reference toFIG. 6. In the bypass mode illustrated inFIG. 8A, the transistors Q3, Q4are activated while the transistors Q5, Q6are deactivated. In this configuration, signals pass through the electrical components, if any, provided between the transistors Q3, Q4before exiting the attenuation stage740. In the attenuation mode illustrated inFIG. 8B, the transistors Q3, Q4are deactivated while the transistors Q5, Q6are activated. In this configuration, signals pass through resistors R2-R4and variable attenuator R1before exiting the attenuation stage740. Activation and deactivation of the transistors can be controlled by a controller (not shown). The value of the variable attenuator R1can be controlled by a controller (not shown). Although not shown for the sake of clarity, the attenuation stage740can include other electrical components configured to provide suitable control signals and bias voltages to the transistors Q3-Q6and the variable attenuator R1.

FIGS. 9A and 9Billustrate example variable gain amplifiers910a,910bthat include a pre-amplification attenuation stage620, respective amplification stages930a,930b, an input matching network913, an output matching network914, and a post-amplification attenuation stage740. The variable gain amplifiers910a,910binclude a plurality of input ports912and a common output port918. The pre-amplification attenuation stage620can be configured similar to the attenuation stage or multiplexer620described in greater detail herein with reference toFIG. 6. The post-amplification attenuation stage740can be configured similar to the attenuation stage740described in greater detail herein with reference toFIG. 7.

With reference toFIG. 9A, the amplification stage930acan include a cascode amplifier that includes transistors Q1, Q2, a voltage source VDD, a load ZL, and inductance element ZS that together amplify signals received through the input matching network913. The output matching network914includes components configured to match impedances of the amplification stage930ato maintain desirable signal characteristics. For example, the output matching network913can include one or more capacitors, one or more resistors, a combination of capacitors or resistors in series or in parallel, or the like. The input matching network913includes components configured to match impedances of the first attenuation stage920to maintain desirable signal characteristics. For example, the input matching network914can include one or more capacitors, one or more resistors, a combination of capacitors or resistors in series or in parallel, or the like. In some embodiments, the input matching network913can be included in the amplification stage930a.

With reference toFIG. 9B, the amplification stage930bis similar to the amplification stage930aand additionally includes a degeneration switching block932. The degeneration switching block932includes a second inductance ZS1and transistor Q3. The degeneration switching block932is configured to add additional inductance element ZS1in one or more gain modes. For example, in a selected gain mode the degeneration switching block932can deactivate the transistor Q3so that the path to ground or other reference voltage passes through both the inductance element ZS and inductance element ZS1. In other gain modes, the degeneration switching block932can activate the transistor so that the path to ground or other reference voltage passes through the inductance element ZS and not the inductance element ZS1. This can affect the noise figure (NF) and/or linearity (IIP3) of the amplification stage930b, as described in greater detail herein with reference toFIG. 10B.

FIGS. 10A and 10Billustrate plots of the performance of variable gain amplifiers910a,910b, respectively described with reference toFIGS. 9A and 9B.FIG. 10Aillustrates plots of the noise figure (NF) and linearity (IIP3) of the variable gain amplifier910a(described with reference toFIG. 9A) and the effects of including the described pre-amplification attenuation stage620. Similarly,FIG. 10Billustrates plots of the noise figure (NF) and linearity (IIP3) of the variable gain amplifier910b(described with reference toFIG. 9B) and the effects of including the described pre-amplification attenuation stage620.

With reference toFIG. 10A, the top plots show the noise figure (NF) as a function of gain mode, with G4being a low gain mode and the gain increasing to G0, a high gain mode. On the upper left plot1000a, the NF from the amplification stage930a(or LNA) is shown as a solid line1002a, the NF being without a pre-LNA attenuation stage620. The target NF is shown as a dashed-dotted line1004a. The difference between the target NF1004aand the NF from the LNA1002ais the allowed pre-LNA attenuation that is shown as a dashed line1006a(e.g., the NF margin). By programming the variable attenuation of the pre-LNA attenuation stage, the target NF can be achieved, as shown in the upper right plot1010a. The NF from the LNA with pre-LNA attenuation is shown as the solid line1012awhich is substantially aligned with the target LNA, shown again as the dashed-dotted line1004a.

With continued reference toFIG. 10A, the bottom plots show linearity (IIP3) as a function of gain mode, with G4being a low gain mode and the gain increasing to G0, a high gain mode. On the lower left plot1020a, the IIP3 from the amplification stage930a(or LNA) is shown as a solid line1022a, the IIP3 being without a pre-LNA attenuation stage620. The target IIP3 is shown as a dashed-dotted line1024a. The allowed pre-LNA attenuation is shown again as the dashed line1006a. By programming the variable attenuation of the pre-LNA attenuation stage, linearity that exceeds the target IIP3 can be achieved, as shown in the plot1030a. The IIP3 from the LNA with pre-LNA attenuation is shown as the solid line1032awhich exceeds the target IIP3, shown again as the dashed-dotted line1024a.

The plots inFIG. 10Aillustrate that the disclosed variable gain amplifiers can be configured to achieve a targeted or higher IIP3 in non-high gain modes. Furthermore, with the allowed NF margin, pre-LNA attenuation can be tailored to achieve a targeted front-end loss to boost linearity (IIP3) performance in low gain modes.

Proceeding toFIG. 10B, the plots1000,1010b,1020b,1030billustrate the same parameters as described inFIG. 10Areplacing the amplification stage930awith the amplification stage930bthat includes a degeneration switching block932. In other words, a difference between the variable gain amplifiers910a,910bincludes the presence of the degeneration switching block932in the variable gain amplifier910b. In the plots ofFIG. 10B, the effect of switching on the degeneration block for gain mode G3is seen in the NF and IIP3 plots.

The top plots show the noise figure (NF) as a function of gain mode, with G4being a low gain mode and the gain increasing to G0, a high gain mode. On the upper left plot1000b, the NF from the amplification stage930b(or LNA) is shown as a solid line1002b, the NF being without a pre-LNA attenuation stage620. The target NF is shown as a dashed-dotted line1004b. The difference between the target NF1004band the NF from the LNA1002bis the allowed pre-LNA attenuation that is shown as a dashed line1006b(e.g., the NF margin). By programming the variable attenuation of the pre-LNA attenuation stage, the target NF can be achieved, as shown in the upper right plot1010b. The NF from the LNA with pre-LNA attenuation is shown as the solid line1012bwhich is substantially aligned with the target LNA, shown again as the dashed-dotted line1004b.

With continued reference toFIG. 10B, the bottom plots show linearity (IIP3) as a function of gain mode, with G4being a low gain mode and the gain increasing to G0, a high gain mode. On the lower left plot1020b, the IIP3 from the amplification stage930b(or LNA) is shown as a solid line1022b, the IIP3 being without a pre-LNA attenuation stage620. The target IIP3 is shown as a dashed-dotted line1024b. The allowed pre-LNA attenuation is shown again as the dashed line1006b. By programming the variable attenuation of the pre-LNA attenuation stage, linearity that exceeds the target IIP3 can be achieved, as shown in the plot1030b. The IIP3 from the LNA with pre-LNA attenuation is shown as the solid line1032bwhich exceeds the target IIP3, shown again as the dashed-dotted line1024b.

The plots inFIG. 10Billustrate that the disclosed variable gain amplifiers can be configured to achieve a targeted or higher IIP3 in non-high gain modes. Furthermore, with the allowed NF margin, pre-LNA attenuation can be tailored to achieve a targeted front-end loss to boost linearity (IIP3) performance in low gain modes.

Examples of Products and Architectures

FIG. 11shows that in some embodiments, some or all of the diversity receiver configurations, including some or all of the diversity receiver configurations having combinations of features (e.g.,FIGS. 1-9B), can be implemented, wholly or partially, in a module. Such a module can be, for example, a front-end module (FEM). Such a module can be, for example, a diversity receiver (DRx) FEM. Such a module can be, for example, a multi-input, multi-output (MiMo) module.

In the example ofFIG. 11, a module1108can include a packaging substrate1101, and a number of components can be mounted on such a packaging substrate1101. For example, a controller1102(which may include a front-end power management integrated circuit [FE-PIMC]), a combination assembly1106, a variable gain amplifier assembly1110that includes embedded programmable attenuators1116having one or more features as described herein, and a filter bank1108(which may include one or more bandpass filters) can be mounted and/or implemented on and/or within the packaging substrate1101. Other components, such as a number of SMT devices1105, can also be mounted on the packaging substrate1101. Although all of the various components are depicted as being laid out on the packaging substrate1101, it will be understood that some component(s) can be implemented over other component(s).

In some embodiments, the diversity receive module1108includes two or more variable gain amplifier assemblies1110. In various implementations, the two or more variable gain amplifier assemblies1110can be implemented on a single die. Each assembly1110can include a first attenuation stage, an amplification stage, and a second attenuation stage. The outputs of each assembly1110can be joined. This may be advantageous to enable performance tuning across a wider range of frequencies. For example, a first assembly can be tuned for a first frequency range and a second assembly can be tuned for a second frequency range. Signals can be directed to the appropriate assemblies1110and joined at a common output. Thus, the diversity receive module1108can be configured to cover a wider range of frequencies with improved performance relative to a configuration that includes a single amplifier assembly.

FIG. 12shows that in some embodiments, some or all of the diversity receiver configurations, including some or all of the diversity receiver configurations having combinations of features (e.g.,FIGS. 1-9b), can be implemented, wholly or partially, in an architecture. Such an architecture may include one or more modules, and can be configured to provide front-end functionality such as diversity receiver (DRx) front-end functionality.

In the example ofFIG. 12, an architecture1208can include a controller1202(which may include a front-end power management integrated circuit [FE-PIMC]), a combination assembly1206, a variable gain amplifier assembly1210that includes embedded programmable attenuators1216having one or more features as described herein, and a filter bank1208(which may include one or more bandpass filters) can be mounted and/or implemented on and/or within the packaging substrate1201. Other components, such as a number of SMT devices1205, can also be implemented in the architecture1208.

In some implementations, a device and/or a circuit having one or more features described herein can be included in an RF electronic device such as a wireless device. Such a device and/or a circuit can be implemented directly in the wireless device, in a modular form as described herein, or in some combination thereof. In some embodiments, such a wireless device can include, for example, a cellular phone, a smart-phone, a hand-held wireless device with or without phone functionality, a wireless tablet, etc.

FIG. 13depicts an example wireless device1300having one or more advantageous features described herein. In the context of one or more modules having one or more features as described herein, such modules can be generally depicted by a dashed box1306(which can be implemented as, for example, a front-end module) and a diversity receiver (DRx) module1308(which can be implemented as, for example, a front-end module).

Referring toFIG. 13, power amplifiers (PAs)1382can receive their respective RF signals from a transceiver1304that can be configured and operated to generate RF signals to be amplified and transmitted, and to process received signals. The transceiver1304is shown to interact with a baseband sub-system1305that is configured to provide conversion between data and/or voice signals suitable for a user and RF signals suitable for the transceiver1304. The transceiver1304can also be in communication with a power management component1307that is configured to manage power for the operation of the wireless device1300. Such power management can also control operations of the baseband sub-system1305and the modules1306and1308.

The baseband sub-system1305is shown to be connected to a user interface1301to facilitate various input and output of voice and/or data provided to and received from the user. The baseband sub-system1305can also be connected to a memory1303that is configured to store data and/or instructions to facilitate the operation of the wireless device, and/or to provide storage of information for the user.

In the example wireless device1300, outputs of the PAs1382are shown to be matched (via respective match circuits1384) and routed to their respective duplexers1386. Such amplified and filtered signals can be routed to a primary antenna1360through a switching network1309for transmission. In some embodiments, the duplexers1386can allow transmit and receive operations to be performed simultaneously using a common antenna (e.g., primary antenna1360). InFIG. 13, received signals are shown to be routed to a variable gain amplifier assembly1310a, which provides the features and benefits of the variable gain amplifiers described herein. The DRx module1308includes a similar variable gain amplifier assembly1310bas well.

In the example wireless device1300, signals received at the primary antenna1330can be matched (via respective match circuits1385) and can be sent to a variable gain amplifier1310ain the front end module1306. The variable gain amplifier1310acan include a pre-amplification programmable attenuation assembly1320, an amplifier1330, a post-amplification programmable attenuation assembly1340, and a splitter1350. The variable gain amplifier1310ais configured to receive a plurality of signals at inputs1312and output a plurality of processed signals at outputs1318. The variable gain amplifier1310ais configured to provide a plurality of switchable paths to the amplifier1310a, the plurality of switchable paths including embedded, programmable attenuators that provide targeted amplification over a plurality of gain modes and that improve linearity for signals relative to variable gain amplifiers that do not include embedded programmable attenuators. In at least one high gain mode, programmable attenuators can be bypassed to reduce or eliminate the impact on the noise figure. In at least one non-high gain mode, programmable attenuators can be tailored to improve linearity for signals being amplified in the at least one non-high gain mode.

The wireless device also includes a diversity antenna1370and a diversity receiver module1308that receives signals from the diversity antenna1370. The diversity receive module1308includes a variable gain amplifier1310b, similar to the variable gain amplifier1310ain the front end module1306. The diversity receiver module1308and the variable gain amplifier1310bprocess the received signals and transmit the processed signals to the transceiver1304. In some embodiments, a diplexer, triplexer, or other multiplexer or filter assembly can be included between the diversity antenna1370and the diversity receiver module1308, as described herein.

One or more features of the present disclosure can be implemented with various cellular frequency bands as described herein. Examples of such bands are listed in Table 1. It will be understood that at least some of the bands can be divided into sub-bands. It will also be understood that one or more features of the present disclosure can be implemented with frequency ranges that do not have designations such as the examples of Table 1. It is to be understood that the term radio frequency (RF) and radio frequency signals refers to signals that include at least the frequencies listed in Table 1.

Some aspects of the systems and methods described herein can advantageously be implemented using, for example, computer software, hardware, firmware, or any combination of computer software, hardware, and firmware. Computer software can comprise computer executable code stored in a computer readable medium (e.g., non-transitory computer readable medium) that, when executed, performs the functions described herein. In some embodiments, computer-executable code is executed by one or more general purpose computer processors. A skilled artisan will appreciate, in light of this disclosure, that any feature or function that can be implemented using software to be executed on a general purpose computer can also be implemented using a different combination of hardware, software, or firmware. For example, such a module can be implemented completely in hardware using a combination of integrated circuits. Alternatively or additionally, such a feature or function can be implemented completely or partially using specialized computers designed to perform the particular functions described herein rather than by general purpose computers.

Multiple distributed computing devices can be substituted for any one computing device described herein. In such distributed embodiments, the functions of the one computing device are distributed (e.g., over a network) such that some functions are performed on each of the distributed computing devices.

Some embodiments may be described with reference to equations, algorithms, and/or flowchart illustrations. These methods may be implemented using computer program instructions executable on one or more computers. These methods may also be implemented as computer program products either separately, or as a component of an apparatus or system. In this regard, each equation, algorithm, block, or step of a flowchart, and combinations thereof, may be implemented by hardware, firmware, and/or software including one or more computer program instructions embodied in computer-readable program code logic. As will be appreciated, any such computer program instructions may be loaded onto one or more computers, including without limitation a general purpose computer or special purpose computer, or other programmable processing apparatus to produce a machine, such that the computer program instructions which execute on the computer(s) or other programmable processing device(s) implement the functions specified in the equations, algorithms, and/or flowcharts. It will also be understood that each equation, algorithm, and/or block in flowchart illustrations, and combinations thereof, may be implemented by special purpose hardware-based computer systems which perform the specified functions or steps, or combinations of special purpose hardware and computer-readable program code logic means.

Furthermore, computer program instructions, such as embodied in computer-readable program code logic, may also be stored in a computer readable memory (e.g., a non-transitory computer readable medium) that can direct one or more computers or other programmable processing devices to function in a particular manner, such that the instructions stored in the computer-readable memory implement the function(s) specified in the block(s) of the flowchart(s). The computer program instructions may also be loaded onto one or more computers or other programmable computing devices to cause a series of operational steps to be performed on the one or more computers or other programmable computing devices to produce a computer-implemented process such that the instructions which execute on the computer or other programmable processing apparatus provide steps for implementing the functions specified in the equation(s), algorithm(s), and/or block(s) of the flowchart(s).