Circuit board assembly configuration

A rack unit configuration is described that includes a first printed circuit board (PCB) assembly interleaved with a second PCB assembly that is inverted with respect to the first PCB assembly. The configuration of the first PCB assembly and the second PCB assembly allow for increased component and power densities within computing systems, memory systems, etc. The increased density may be achieved while allowing sufficient mechanical clearance to allow easy component replacement and servicing (e.g., and hot pluggability). Power density may also be increased with PCB assemblies including nested and interleaved power modules.

BACKGROUND

Increasingly, information is stored and processed in large data storage systems. At a base level, these data storage systems are configured with multiple processors, each controlling access to corresponding memory. However, the physical dimensions of standard chassis sizes limit the number of components and resources that can fit into a particular chassis unit.

DETAILED DESCRIPTION

Reference will now be made in detail to the various embodiments of the present disclosure, examples of which are illustrated in the accompanying drawings. Furthermore, in the following detailed description of the present disclosure, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. However, it will be understood that the present disclosure may be practiced without these specific details. In other instances, well-known methods, procedures, components, and circuits have not been described in detail so as not to unnecessarily obscure aspects of the present disclosure.

Embodiments are configured to allow increased component and power densities within computing systems, memory systems, etc. In some embodiments, the component and power densities are increased for rack based computing systems. Embodiments may allow increased density of memory modules and memory controllers. Embodiments are further configured to allow nesting, interleaving, etc., of printed circuit board (PCB) assemblies to increase component densities. The increased density may be achieved while allowing sufficient mechanical clearance to allow easy component replacement and servicing (e.g., and hot pluggability). Power density may also be increased with embodiments including nested and interleaved power modules.

FIGS. 1-11illustrate example components used by various embodiments. Although specific components are disclosed inFIGS. 1-11, it should be appreciated that such components are exemplary. That is, embodiments are well suited to having various other components or variations of the components recited inFIGS. 1-11. It is appreciated that the components inFIGS. 1-11may operate with other components than those presented, and that not all of the components ofFIGS. 1-11are required to achieve the goals of embodiments.

FIG. 1shows a top view of a printed circuit board (PCB) rack unit configuration, in accordance with various embodiments.FIG. 1depicts a system100with a PCB rack unit configuration within a chassis102. The chassis102may be part of a rack based computing system. For example, a rack may be 42 units height (e.g., approximately 73.5 inches high). The chassis102includes a motherboard or backplane104and includes one or more printed circuit board assemblies, such as a printed circuit board assembly106. The backplane104includes sockets110-112which are operable for coupling to a printed circuit board assembly (e.g., the printed circuit board assembly106). In some embodiments, the socket112is inverted with respect to the socket110. The printed circuit board assembly106includes an interface (not shown) (e.g., within the socket110) which is configured for communicatively, electrically, etc., coupling the printed circuit board assembly106to the backplane104. In some embodiments, the printed circuit board assembly106is hot pluggable to the backplane104. In some embodiments, the PCB assembly106may be coupled to the backplane104via one or more cables. The PCB assembly106can be part of a memory appliance in one implementation.

In some embodiments, the printed circuit board106includes memory slots108. The memory slots108may be configured for coupling memory modules to the printed circuit board assembly106and coupling the memory modules to the backplane104. In some embodiments, a top side of the PCB assembly106is configured for coupling of 24 or more memory modules (e.g., DIMMs). Of course, embodiments may support other devices including, but not limited to, volatile memory (e.g., dynamic random access memory or “DRAM”), non-volatile (e.g., flash, solid state disk drives, magnetic, hard drives, etc.) or other types of computer hardware.

FIG. 2shows side view of a PCB rack unit configuration, in accordance with various embodiments.FIG. 2depicts a system200with a PCB rack unit configuration from the side including nested and interleaved components. The system200includes chassis202which includes a printed circuit board assembly206and a printed circuit board assembly226. The printed circuit board assembly206includes memory slots208a-band components230-232. The memory slots208a-bmay have memory modules214a-bcoupled thereto. The printed circuit board assembly226includes memory slots228a-band components240-242. The memory slots218a-bmay have memory modules224a-bcoupled thereto.

The memory slots208a-band memory slots218a-bcan be configured for coupling memory modules to the PCB assembly206and the PCB assembly226, respectively, thereby coupling the memory modules to the backplane104. The printed circuit board assembly226is inverted with respect to the printed circuit board assembly206such that a bottom side of the printed circuit board assembly206faces a bottom side of the PCB assembly226. In some embodiments, the PCB assembly206and the PCB assembly226can be configured for horizontal insertion into a 2 rack unit or 2U chassis. In some embodiments, the PCB assembly206and the PCB assembly226include 24 memory slots each. For example, the PCB assembly206and the PCB assembly226can in total support 48 memory modules (e.g., DIMMs) in a 2U chassis.

Embodiments herein are described with respect to horizontal PCB assemblies, however, it is appreciated that embodiments include PCB assemblies arranged in vertical orientations (e.g., a blade type orientation). In some embodiments, the PCB assembly206and the PCB assembly226can be in a vertical orientation with respect to a bottom of a system (e.g., a rack unit system). In some embodiments, the PCB assembly206and the PCB assembly226may be configured for vertical insertion into a 4 rack unit (4U) chassis (e.g., Electronic Industries Alliance (EIA) rack units, EIA-310, non-EIA rack units, Open Compute Project (OCP) rack units, etc.) along with more PCB assemblies substantially similar to PCB assembly206.

The printed circuit board assembly206includes components230-232on the bottom side (e.g., the other side) of the printed circuit board assembly206. The printed circuit board assembly226includes components240-242on the bottom side of the printed circuit board assembly226. The components230-232and240-242can include any of a variety of components including, but not limited to, one or more memory controllers, one or more circuits (e.g., a memory controller, general purpose processor, specialized graphics processing unit (GPU), a field-programmable gate array (FPGA), an application-specific integrated circuit (ASIC), etc.) with associated heatsinks, one or more buffers, one or more memory slots, one or more interfaces (e.g., for a mezzanine card), a dual in-line memory module (DIMM) slot or interface, a DIMM, a load reduced DIMM (LRDIMM) slot or interface, a LRDIMM memory module, a registered DIMM (RDIMM) slot or interface, a RDIMM memory module, an unregistered DIMM (UDIMM) slot or interface, a UDIMM memory module, a small outline dual in-line memory module (SODIMM) slot or interface, a SODIMM memory module, a low profile (LP) dual in-line memory module (DIMM) slot or interface, a LP DIMM memory module, a very low profile (VLP) DIMM slot or interface, a VLP DIMM memory module, etc. In some embodiments, the circuit layout of the printed circuit board assembly206is identical to the circuit layout of the printed circuit board assembly226. In some embodiments, the PCB assembly206and the PCB assembly226may be identical (e.g., same stock keeping unit (SKU)).

Advantageously, the inverted orientation of the printed circuit board assembly226with respect to the PCB assembly206allows components230-232to be nested with components240-242. That is, the PCB assembly226may be placed upside down and rotated along a horizontal place 180 degrees with respect to the PCB assembly206. In this manner, the components230-232and240-242may be mounted in an alternating, interleaved configuration. As shown inFIG. 2, a first portion (e.g., the components230-232) of the PCB assembly206and a second portion (e.g., the components240-242) of PCB assembly226occupy a plane250parallel to PCB assembly206and PCB assembly226.

In some embodiments, the printed circuit board assembly206and the printed circuit board assembly226are arranged with mechanical clearance with respect to each other such that the printed circuit board assembly206is decouplable from a socket (e.g., socket110) without decoupling the printed circuit board assembly226from a socket (e.g., socket112). In some embodiments, the printed circuit board assembly206and the printed circuit board assembly226are hot pluggable (e.g., to the back plane110). The printed circuit board assembly206and the printed circuit board assembly226can be configured to be arranged with mechanical clearance sufficient to allow coupling of the printed circuit board assembly206to the socket110. In other embodiments, the printed circuit board assembly206and the printed circuit board assembly226are interlocked.

For example, the printed circuit board assembly206can have a first controller on its bottom side and the printed circuit board assembly226can have a second controller on its bottom side. The first controller and the second controller may have mechanical clearance sufficient to allow coupling of the printed circuit board assembly206to the socket110. As another example, the printed circuit board assembly206includes a first heatsink on its bottom side and the printed circuit board assembly226includes a second heatsink on its bottom side. The first heatsink and the second heatsink have mechanical clearance sufficient to allow coupling of the printed circuit board assembly206to the socket110. In some embodiments, the distance and mechanical clearances between components230-232and240-242are configured to thermally decouple components230-232from components240-242.

The PCB assembly206has a height260(e.g., in a horizontal orientation) and the PCB assembly226has a height262. The nesting, interleaving, etc., of the PCB assembly206and the PCB assembly226results in the combined height270of the PCB206and the PCB assembly226which is inverted with respect to the PCB assembly206. The combined height270of the PCB assembly206and the PCB assembly226is less than the combined height of the PCB206and the PCB assembly226when the PCB assembly226is in a non-inverted orientation or non-interleaved orientation with respect to the PCB assembly206. For example, with memory modules of 1.35 inches high (e.g., a D IMM memory module) and a 2U chassis of 3.5 inches high, the reduced combined height270of the PCB assembly206and the PCB assembly226being interleaved advantageously allows the PCB assembly206and the PCB assembly226be inserted into a 2U chassis. The combined height of the PCB206and the PCB assembly226when the PCB assembly226is in a non-inverted orientation, or non-interleaved orientation, with respect to the PCB assembly206would be greater than a 2U chassis. Embodiments thus result in improved clearance, thermal solutions (e.g., thermal decoupling), and ease of service.

FIG. 3is a block diagram of a bottom view of a printed circuit board, in accordance with various embodiments.FIG. 3depicts a system300with a PCB rack unit configuration showing a bottom side of a PCB assembly (e.g., the bottom side of PCB assembly106). The system300includes chassis302which includes a backplane304and may include one or more printed circuit board assemblies, such as a printed circuit board assembly306. The backplane304includes sockets310-312which are operable for coupling to a printed circuit board assembly (e.g., the printed circuit board assembly306). In some embodiments, the socket312is inverted with respect to the socket310. The printed circuit board assembly306includes an interface (not shown) (e.g., within the socket110) which is configured for communicatively, electrically, etc., coupling the printed circuit board assembly306to the backplane304. In some embodiments, the printed circuit board assembly306is hot pluggable to the backplane304.

The PCB assembly306may have support for any of a variety of components including, but not limited to, one or more memory controllers, one or more circuits (e.g., a memory controller, a processor, a GPU, a FPGA, an ASIC, etc.) with associated heatsinks, one or more buffers, one or more memory slots, one or more interfaces (e.g., for a mezzanine card), a SODIMM slot or interface, a SODIMM, a LP DIMM slot or interface, a LP DIMM, a VLP DIMM slot or interface, a VLP DIMM, etc. The components, devices, etc., discussed with respect toFIG. 3are exemplary and a side (e.g., bottom or top) of a PCB assembly may have more or fewer components that shown inFIG. 3. The components320-340described below may be located such that insertion of the PCB assembly306into chassis302has sufficient mechanical clearance when inserted adjacent to an inverted PCB assembly (e.g., the PCB assembly226).

In some embodiments, the PCB assembly306includes a controller320which may be configured for handling communications between components coupled to the PCB assembly306and/or communications of PCB assembly306with backplane304. For example, the controller320may be a memory controller. In some embodiments, the PCB assembly306includes a heatsink322configured for dissipating heat from the controller320. The heatsink322may be configured for thermally decoupling the controller320from a controller on an adjacent inverted PCB assembly (e.g., the PCB226). In some embodiments, the controller320and/or heatsink322may be located off-center to increase thermal dissipation thereby increasing the distance of the controller320and/or heatsink322from another controller and/or heatsink on a nested and interleaved inverted PCB assembly.

In some embodiments, the PCB assembly306includes a plurality of buffer memory units324. The buffers may be used for communications between the controller320and one or more memory modules (e.g., memory modules in the memory slots108, the memory modules208a-b, memory modules in the memory slots340, etc.).

In some embodiments, the PCB assembly306includes a plurality of electric components328. The electronic components328may include one or more inductors, capacitors, resistors, memristors, etc., that may be associated with components on either side of a PCB assembly (e.g., the PCB assembly106, the PCB assembly306, etc.).

In some embodiments, the PCB assembly306also includes the memory slots340which are configured for coupling one or more: LRDIMMs, RDIMMs, UDIMMs, SODIMMs, LP DIMMs, VLP DIMMs, etc. In one embodiment, the PCB assembly306may have memory slots for a fraction (e.g., half) of the memory slots on the other side of the PCB assembly306. For example, if the other side of the PCB assembly306(e.g., the top of the PCB assembly106) has 24 memory slots, the PCB assembly306will have 12 memory slots.

The PCB assembly306can include an interface330configured for coupling to a PCB assembly332. In some embodiments, the interface330may be a mini peripheral Component Interconnect Express (PCI express) interface, mini serial AT attachment (mini-SATA or mSATA) interface, M.2 (Next Generation Form Factor (NGFF)) interface, SATA Express interface, etc. In some embodiments, the PCB assembly332can be a daughterboard, daughtercard, mezzanine board, mezzanine card, piggyback board, etc. In some embodiments, the PCB assembly332can be configured to provide redundancy for one or more components coupled to the PCB assembly306.

FIG. 4shows a three dimensional card ejector side view of a plurality of printed circuit board (PCB) assemblies, in accordance with various embodiments.FIG. 4depicts a PCB rack unit configuration400including a PCB assembly406(e.g., the PCB assembly206) and a PCB assembly426(e.g., the PCB assembly226). The PCB assembly406as shown includes a plurality of memory slots408aand a plurality of memory slots408bon a top side of the PCB assembly406with associated memory modules. The PCB assembly426as shown includes a plurality of memory slots418aand a plurality of memory slots418bon a top side of the PCB assembly426with associated memory modules.

The PCB assembly406includes heatsinks422a-blocated on its bottom side. The PCB assembly426includes heatsinks442a-bon its bottom side. The heatsinks422a-band442a-bmay be used to cool various components (e.g., controller, circuits, etc.) of the PCB assembly406and the PCB assembly426.

The PCB assembly426is inverted with respect the PCB assembly406. The heat sinks422a-band442a-bare nested or interleaved allowing the PCB assembly406and the PCB assembly426to advantageously occupy less space than if the PCB assembly406and the PCB assembly426were not nested or interleaved.

FIG. 5shows a three dimensional connector backplane side view, in accordance with various embodiments.FIG. 5depicts a PCB rack unit configuration500including a PCB assembly506(e.g., the PCB assembly206) and a PCB assembly526(e.g., the PCB assembly226). The PCB assembly526is inverted with respect to the PCB assembly506. The PCB assembly506as shown includes a plurality of memory slots508aand a plurality of memory slots508bon a top side of the PCB assembly506with associated memory modules. The PCB assembly506includes heatsink522which is configured to cool various components (e.g., controller, circuits, etc.) of the PCB assembly506. The heatsink522may be nested or interleaved with various components of the PCB assembly526thereby allowing the PCB assembly506and the PCB assembly526to occupy less space than if the PCB assembly506and the PCB assembly526were not nested or interleaved. The PCB assembly506further includes interface580(e.g., a PCI express interface, Edgeline by Molex Inc., of Lisle, Ill., etc.) configured for communicatively, electrically, etc., coupling the PCB assembly506to a backplane (e.g., the backplane110) via a socket (e.g., the socket110).

The PCB assembly526as shown includes a plurality of memory slots518aand a plurality of memory slots518bon its top side with associated memory modules. The PCB assembly526further includes interface590(e.g., a standard memory channel, PCI express, network or custom memory channel interface) configured for communicatively coupling the PCB assembly506to a backplane (e.g., the backplane110) via a socket (e.g., the socket112).

FIG. 6shows a top view of a plurality of power modules, in accordance with various embodiments.FIG. 6depicts a portion600of a PCB assembly (e.g., the PCB assembly106) including nested or interleaved power modules602-604between two memory slots608a-b. In some embodiments, the plurality of power modules602-604may be located on a top side of PCB assembly (e.g., the top of PCB assembly106) or a bottom side of a PCB assembly (e.g., the bottom of PCB assembly306). In some embodiments, the plurality of power modules602-604may be configured to handle the power management of twelve memory slots and associated memory modules. For example, the PCB assembly106including 24 memory slots may further include two pairs of power modules602-604(e.g., four total power modules) with each pair configured for managing the power of 12 memory slots and associated memory modules.

The portion600of the PCB assembly includes a power module envelope606including the power modules602and604. The power module602is configured for managing the power of a plurality of memory slots and associated memory modules. In some embodiments, the power module602includes a circuit board610and power device or components612. The circuit board610and power device612are configured for managing the power of a plurality of memory slots and associated memory modules. In some embodiments, the power module604is configured for managing the power of a plurality of memory slots and associated memory modules. The power module604includes a circuit board620and power device or components622. The circuit board620and power device622are configured for managing the power of a plurality of memory slots and associated memory modules.

The power modules602-604are nested or interleaved thereby allowing the power modules602-604to occupy less space on a PCB assembly than if the power modules602-604were in the same orientation. For example, the power module602is inverted with respect to the power module604.

FIG. 7shows a side view of a plurality of power modules, in accordance with various embodiments.FIG. 7depicts a cross sectional portion700with a PCB rack unit configuration (e.g., of the system200) including a PCB assembly706(e.g., the PCB assembly206) and a PCB assembly726(e.g., the PCB assembly226). The PCB assembly726is inverted with respect to the PCB assembly706. The PCB assembly706includes memory slots708a-b(e.g., the memory slot208a), memory modules714a-b(e.g., the memory module214a), power module sockets730a-b, and power modules704,710. The power module sockets730a-bare configured for coupling of power modules704,710to the PCB assembly706to enable power management by the power modules704,710.

The PCB assembly726includes memory slots718a-b(e.g., the memory slots218a-b), memory modules724a-b(e.g., the memory module224a), power module sockets740a-b, and power modules734-736(e.g., the power modules602-604). The power module sockets740a-bare configured for coupling of power modules734-736to the PCB assembly726to enable power management by the power modules734-736.

In some embodiments, the power module sockets730a-ballow the power modules704,710to be nested and interleaved and thereby occupy less space than if not nested and interleaved or in the same orientation. The power module sockets740a-ballow the power modules734-736to be nested and interleaved and thereby occupy less space than if not nested and interleaved or in the same orientation. In some embodiments, the power module sockets730a-band740a-bmay be configured to allow hot plugging of power modules704,710and734-736. The power modules704,710may be coupled individually to an associated power module socket due to having mechanical clearance allowing the insertion, coupling, removal decoupling, etc., from a power module socket without disturbing an adjacent power module. In some embodiments, the power modules704,710may have components located to increase thermal decoupling of components on an adjacent power module or component and thereby increase thermal dissipation. For example, when the power modules704,710are in a nested configuration, the components that generate the most heat may be at opposite ends.

FIG. 8shows a three dimensional front view of a power module (e.g., the power module602), in accordance with various embodiments.FIG. 8depicts an illustrative layout of components of a power module that allows one or more power modules to be nested and interleaved. The power module802includes transistors804-806(e.g., a field-effect transistor (FET), metal-oxide-semiconductor field-effect transistor (MOSFET), etc.), capacitors808-810, and inductors812-818. The transistors804-806, capacitors808-810, and inductors812-818are configured along with other components of power module802to manage power for one or more components (e.g., memory modules, memory controllers, etc.).

The locations of the transistors804-806, the capacitors808-810, and the inductors812-818are configured to allow power module802to be nested, interleaved, etc., with another power module (e.g., an identical power module or a different power module). The locations of the transistors804-806, the capacitors808-810, and the inductors812-818can further be configured to allow power module802to be coupled and/or decoupled from a PCB assembly (e.g., the PCB assembly706) with sufficient mechanical clearance so as to not interfere with other components (e.g., other power modules, memory slots, memory modules, etc.).

FIG. 9shows a back view of a power module, in accordance with various embodiments.FIG. 9depicts an illustrative layout of components of a power modules that allows one or more power modules to be nested and interleaved. The power module902includes a circuit920and capacitors930-936. The circuit920may be a power management controller configured to manage power along with other components of power module802for one or more components (e.g., memory modules, memory controllers, etc.).

The locations of the circuit920and the capacitors930-936are configured to allow power module902to be nested and interleaved with another power module (e.g., an identical power module or a different power module). The locations of the circuit920and the capacitors930-936may further be configured to allow power module902to be coupled and/or decoupled from a PCB assembly (e.g., the PCB assembly706) with sufficient mechanical clearance so as to not interfere with other components (e.g., other power modules, memory slots, memory modules, etc.).

FIG. 10is a block diagram of an example of an exemplary computing system1000including various embodiments. Computing system1000broadly represents any single or multi-processor computing device or system capable of executing computer-readable instructions. Examples of computing system1000include, without limitation, workstations, laptops, client-side terminals, servers, distributed computing systems, handheld devices, or any other computing system or device. In its most basic configuration, computing system1000may include at least one processor1014and a system memory1016.

Processor1014generally represents any type or form of processing unit capable of processing data or interpreting and executing instructions. In certain embodiments, processor1014may receive instructions from a software application or module. These instructions may cause processor1014to perform the functions of one or more of the example embodiments described and/or illustrated herein. For example, processor1014may perform and/or be a means for performing, either alone or in combination with other elements, one or more of the identifying, determining, using, implementing, translating, tracking, receiving, moving, and providing described herein. Processor1014may also perform and/or be a means for performing any other steps, methods, or processes described and/or illustrated herein.

System memory1016generally represents any type or form of volatile or non-volatile storage device or medium capable of storing data and/or other computer-readable instructions. Examples of system memory1016include, without limitation, RAM, ROM, FLASH memory, or any other suitable memory device. Although not required, in certain embodiments computing system1000may include both a volatile memory unit (such as, for example, system memory1016) and a non-volatile storage device (such as, for example, primary storage device1032.

Computing system1000may also include one or more components or elements in addition to processor1014and system memory1016. For example, in the embodiment ofFIG. 10, computing system1000includes a memory controller1018, an I/O controller1020, and a communication interface1022, each of which may be interconnected via a communication infrastructure1012.

Communication infrastructure1012generally represents any type or form of infrastructure capable of facilitating communication between one or more components of a computing device. Examples of communication infrastructure1012include, without limitation, a communication bus (such as an ISA, PCI, PCIe, or similar bus) and a network. In one embodiment, system memory1016communicates via a dedicated memory bus.

Memory controller1018generally represents any type or form of device capable of handling memory or data or controlling communication between one or more components of computing system1000. For example, memory controller1018may control communication between processor1014, system memory1016, and I/O controller1020via communication infrastructure1012. Memory controller may perform and/or be a means for performing, either alone or in combination with other elements, one or more of the operations or features described herein. In some embodiments, the system memory1016and/or the memory controller1018may be included in one or more printed circuit board assemblies1050, as described herein.

I/O controller1020generally represents any type or form of module capable of coordinating and/or controlling the input and output functions of a computing device. For example, I/O controller1020may control or facilitate transfer of data between one or more elements of computing system1000, such as processor1014, system memory1016, communication interface1022, display adapter1026, input interface1030, and storage interface1034. I/O controller1020may be used, for example, to perform and/or be a means for performing, either alone or in combination with other elements, one or more of the operations described herein. I/O controller1020may also be used to perform and/or be a means for performing other operations and features set forth in the instant disclosure.

Communication interface1022broadly represents any type or form of communication device or adapter capable of facilitating communication between example computing system1000and one or more additional devices. For example, communication interface1022may facilitate communication between computing system1000and a private or public network including additional computing systems. Examples of communication interface1022include, without limitation, a wired network interface (such as a network interface card), a wireless network interface (such as a wireless network interface card), a modem, and any other suitable interface. In one embodiment, communication interface1022provides a direct connection to a remote server via a direct link to a network, such as the Internet. Communication interface1022may also indirectly provide such a connection through, for example, a local area network (such as an Ethernet network), a personal area network, a telephone or cable network, a cellular telephone connection, a satellite data connection, or any other suitable connection.

Communication interface1022may also represent a host adapter configured to facilitate communication between computing system1000and one or more additional network or storage devices via an external bus or communications channel. Examples of host adapters include, without limitation, SCSI host adapters, USB host adapters, IEEE (Institute of Electrical and Electronics Engineers) 1394 host adapters, Serial Advanced Technology Attachment (SATA) and External SATA (eSATA) host adapters, Advanced Technology Attachment (ATA) and Parallel ATA (PATA) host adapters, Fibre Channel interface adapters, Ethernet adapters, or the like. Communication interface1022may also allow computing system1000to engage in distributed or remote computing. For example, communication interface1022may receive instructions from a remote device or send instructions to a remote device for execution. Communication interface1022may perform and/or be a means for performing, either alone or in combination with other elements, one or more of the operations disclosed herein. Communication interface1022may also be used to perform and/or be a means for performing other operations and features set forth in the instant disclosure.

As illustrated inFIG. 10, computing system1000may also include at least one display device1024coupled to communication infrastructure1012via a display adapter1026. Display device1024generally represents any type or form of device capable of visually displaying information forwarded by display adapter1026. Similarly, display adapter1026generally represents any type or form of device configured to forward graphics, text, and other data from communication infrastructure1012(or from a frame buffer, as known in the art) for display on display device1024.

As illustrated inFIG. 10, computing system1000may also include at least one input device1028coupled to communication infrastructure1012via an input interface1030. Input device1028generally represents any type or form of input device capable of providing input, either computer- or human-generated, to computing system1000. Examples of input device1028include, without limitation, a keyboard, a pointing device, a speech recognition device, or any other input device. In one embodiment, input device1028may perform and/or be a means for performing, either alone or in combination with other elements, one or more of the operations disclosed herein. Input device1028may also be used to perform and/or be a means for performing other operations and features set forth in the instant disclosure.

As illustrated inFIG. 10, computing system1000may also include a primary storage device1032and a backup storage device1033coupled to communication infrastructure1012via a storage interface1034. Storage devices1032and1033generally represent any type or form of storage device or medium capable of storing data and/or other computer-readable instructions. For example, storage devices1032and1033may be a magnetic disk drive (e.g., a so-called hard drive), a floppy disk drive, a magnetic tape drive, an optical disk drive, a FLASH drive, or the like. Storage interface1034generally represents any type or form of interface or device for transferring data between storage devices1032and1033and other components of computing system1000.

In one example, databases1040may be stored in primary storage device1032. Databases1040may represent portions of a single database or computing device or a plurality of databases or computing devices. For example, databases1040may represent (be stored on) a portion of computing system1000and/or portions of example network architecture1100inFIG. 11(below). Alternatively, databases1040may represent (be stored on) one or more physically separate devices capable of being accessed by a computing device, such as computing system1000and/or portions of network architecture1100.

Continuing with reference toFIG. 10, storage devices1032and1033may be configured to read from and/or write to a removable storage unit configured to store computer software, data, or other computer-readable information. Examples of suitable removable storage units include, without limitation, a floppy disk, a magnetic tape, an optical disk, a FLASH memory device, or the like. Storage devices1032and1033may also include other similar structures or devices for allowing computer software, data, or other computer-readable instructions to be loaded into computing system1000. For example, storage devices1032and1033may be configured to read and write software, data, or other computer-readable information. Storage devices1032and1033may also be a part of computing system1000or may be separate devices accessed through other interface systems.

Storage devices1032and1033may be used to perform, and/or be a means for performing, either alone or in combination with other elements, one or more of the operations disclosed herein. Storage devices1032and1033may also be used to perform, and/or be a means for performing, other operations and features set forth in the instant disclosure.

Many other devices or subsystems may be connected to computing system1000. Conversely, all of the components and devices illustrated inFIG. 10need not be present to practice the embodiments described herein. The devices and subsystems referenced above may also be interconnected in different ways from that shown inFIG. 10. Computing system1000may also employ any number of software, firmware, and/or hardware configurations. For example, the example embodiments disclosed herein may be encoded as a computer program (also referred to as computer software, software applications, computer-readable instructions, or computer control logic) on a computer-readable medium.

The computer-readable medium containing the computer program may be loaded into computing system1000. All or a portion of the computer program stored on the computer-readable medium may then be stored in system memory1016and/or various portions of storage devices1032and1033. When executed by processor1014, a computer program loaded into computing system1000may cause processor1014to perform and/or be a means for performing the functions of the example embodiments described and/or illustrated herein. Additionally or alternatively, the example embodiments described and/or illustrated herein may be implemented in firmware and/or hardware. For example, computing system1000may be configured as an ASIC adapted to implement one or more of the embodiments disclosed herein.

FIG. 11is a block diagram of an example of an operating environment1100in which client systems1110,1120, and1130and servers1140and1145may be coupled to a network1150. Client systems1110,1120, and1130generally represent any type or form of computing device or system, such as computing system1000ofFIG. 10.

Similarly, servers1140and1145generally represent computing devices or systems, such as application servers or database servers, configured to provide various database services and/or run certain software applications. In some embodiments, the servers1140may include one or more printed circuit board assemblies1142, as described herein. In some embodiments, the servers1145may include one or more printed circuit board assemblies1146, as described herein. Network1150generally represents any telecommunication or computer network including, for example, an intranet, a WAN, a LAN, a PAN, or the Internet.

As illustrated inFIG. 11, one or more storage devices1160(1)-(L) may be directly attached to server1140. Similarly, one or more storage devices1170(1)-(N) may be directly attached to server1145. Storage devices1160(1)-(L) and storage devices1170(1)-(N) generally represent any type or form of storage device or medium capable of storing data and/or other computer-readable instructions. Storage devices1160(1)-(L) and storage devices1170(1)-(N) may represent NAS devices configured to communicate with servers1140and1145using various protocols, such as NFS, SMB, or CIFS.

Servers1140and1145may also be connected to a SAN fabric1180. SAN fabric1180generally represents any type or form of computer network or architecture capable of facilitating communication between storage devices. SAN fabric1180may facilitate communication between servers1140and1145and storage devices1190(1)-(M) and/or an intelligent storage array1195. SAN fabric1180may also facilitate, via network1150and servers1140and1145, communication between client systems1110,1120, and1130and storage devices1190(1)-(M) and/or intelligent storage array1195in such a manner that devices1190(1)-(M) and array1195appear as locally attached devices to client systems1110,1120, and1130. As with storage devices1160(1)-(L) and storage devices1170(1)-(N), storage devices1190(1)-(M) and intelligent storage array1195generally represent any type or form of storage device or medium capable of storing data and/or other computer-readable instructions.

With reference to computing system1000ofFIG. 10, a communication interface, such as communication interface1022, may be used to provide connectivity between each client system1110,1120, and1130and network1150. Client systems1110,1120, and1130may be able to access information on server1140or1145using, for example, a Web browser or other client software. Such software may allow client systems1110,1120, and1130to access data hosted by server1140, server1145, storage devices1160(1)-(L), storage devices1170(1)-(N), storage devices1190(1)-(M), or intelligent storage array1195. AlthoughFIG. 11depicts the use of a network (such as the Internet) for exchanging data, the embodiments described herein are not limited to the Internet or any particular network-based environment.

The above described embodiments may be used, in whole or in part, in systems that process large amounts of data and/or have tight latency constraints, and, in particular, with systems using one or more of the following protocols and formats: Key-Value (KV) Store, Memcached, Redis, Neo4J (Graph), Fast Block Storage, Swap Device, and Network RAMDisk. In addition, the above described embodiments may be used, in whole or in part, in systems employing virtualization, Virtual Desktop Infrastructure (VDI), distributed storage and distributed processing (e.g., Apache Hadoop), data analytics cluster computing (e.g., Apache Spark), Infrastructure as a Service (IaaS), Platform as a Service (PaaS), and other cloud computing platforms (e.g., Vmware vCloud, Open Stack, and Microsoft Azure). Further, the above described embodiments may be used, in whole or in party, in systems conducting various types of computing, including Scale Out, Disaggregation, Multi-Thread/Distributed Processing, RackScale, Data Center Scale Computing, Elastic Memory Provisioning, Memory as a Service, page migration and caching and Application Offloading/Acceleration and Integration, using various types of storage, such as Non-Volatile Memory Express, Flash, Multi-Tenancy, Internet Small Computer System Interface (iSCSI), Object Storage, Scale Out storage, and using various types of networking, such as 10/40/100 GbE, Software-Defined Networking, Silicon Photonics, Rack TOR Networks, and Low-Latency networking.

Embodiments according to the present disclosure are thus described. While the present disclosure has been described in particular embodiments, it should be appreciated that the disclosure should not be construed as limited by such embodiments, but rather construed according to the below claims.