Array substrate and manufacturing method therefor, and display panel

Disclosed are an array substrate and a manufacturing method therefor, and a display panel. The array substrate includes a first metal layer including a first pattern; a second metal layer including a second pattern; a conduction layer located above the first metal layer and the second metal layer and including a third pattern; a first via hole adapted to connect the first pattern and the third pattern; a second via hole adapted to connect the second pattern and the third pattern; and a conductive material shielding ring surrounding the third pattern, where the conductive material shielding ring is insulated from the third pattern.

CROSS-REFERENCE TO RELATED APPLICATION

The present application claims a priority to Chinese patent application No. 201510185435.2 filed on Apr. 17, 2015, which is incorporated herein by reference in its entirety.

TECHNICAL FIELD

The present disclosure relates to the field of display technology, and in particular to an array substrate and a manufacturing method therefor, and a display panel.

BACKGROUND

At present, during manufacture of the thin film transistor-liquid crystal display (TFT-LCD), via holes are designed in a conventional manner, i.e., a conduction layer is used as a connection medium.

In general, for implementing electrical connection between different metal layers, a via hole process is performed at corresponding locations of two metal layers which need to be connected, and a conduction layer is then arranged covering a surface of the via hole, such that electrical connection between different metal layers is implemented. However, in the related art, as shown inFIG. 1, a conduction layer exposed on the surface of the via hole is prone to be corroded due to influence of surrounding electric field, thereby resulting in problems such as contact failure between different metal layers.

SUMMARY

Regarding the defects in the related art, an array substrate and a manufacturing method therefor, and a display panel are provided in the present disclosure, for effectively preventing corrosion of a conduction layer exposed on a surface of a via hole.

In a first aspect, it is provided an array substrate in the present disclosure, including:

a first metal layer including a first pattern;

a second metal layer including a second pattern;

a conduction layer located above the first metal layer and the second metal layer and including a third pattern;

a first via hole adapted to connect the first pattern and the third pattern;

a second via hole adapted to connect the second pattern and the third pattern; and

a conductive material shielding ring surrounding the third pattern, where the conductive material shielding ring is insulated from the third pattern.

Alternatively, the conduction layer is arranged at a layer and made of a material identical to the conductive material shielding ring.

Alternatively, the conductive layer is made of a transparent conductive metal oxide or a metal.

Alternatively, the transparent conductive metal oxide is indium tin oxide.

Alternatively, the conductive material shielding ring may include a first conductive material portion and a second conductive material portion, the conduction layer is arranged at a layer and made of a material identical to the first conductive material portion, and the second metal layer is arranged at a layer and made of a material identical to the second conductive material portion. The second metal layer is located between the first metal layer and the conduction layer.

Alternatively, the first conductive material portion and the second conductive portion each may have a half-frame shape, a semi-circle shape or any other shape having two ends.

Alternatively, the first conductive material portion and the second conductive material portion are connected via third via holes, a whole structure of the first conductive material portion, the second conductive material portion and the third via holes may surround the third pattern of the conduction layer.

Alternatively, two ends of the first conductive material portion respectively overlap two ends of the second conductive material portion in a direction perpendicular to the conduction layer, and the third via holes are provided at regions where the first conductive material portion overlaps the second conductive material portion.

Alternatively, the first conductive material portion is insulated from the conduction layer and the second conductive material portion is insulated from the second metal layer.

Alternatively, one of the first metal layer and the second metal layer is a gate metal layer, and the other is a source/drain metal layer.

Alternatively, the first metal layer and the second metal layer are located at different layers.

In a second aspect, it is provided a method for manufacturing an array substrate in the present disclosure, including steps of:

forming a first metal layer including a first pattern;

forming a second metal layer including a second pattern;

forming a conduction layer including a third pattern and located above the first metal layer and the second metal layer;

forming a first via hole and a second via hole, where the first via hole is adapted to connect the first pattern and the third pattern and is covered by the third pattern, and the second via hole is adapted to connect the second pattern and the third pattern and is covered by the third pattern; and

forming a conductive material shielding ring surrounding the third pattern, where the conductive material shielding ring is insulated from the third pattern.

Alternatively, the conductive material shielding ring is formed while forming the conduction layer.

Alternatively, the conductive material shielding ring may include a first conductive material portion and a second conductive material portion; and

the step of forming a conductive material shielding ring surrounding the third pattern may include: forming the first conductive material portion near the conduction layer while forming the conduction layer, and forming the second conductive material portion near the second metal layer while forming the second metal layer. The second metal layer is formed between the first metal layer and the conduction layer.

Alternatively, the method for manufacturing the array substrate may further include: forming third via holes adapted to connect the first conductive material portion and the second conductive material portion.

In a third aspect, it is further provided a display panel in the present disclosure, including the array substrate described above.

As can be seen from the above technical solutions, in the array substrate and the manufacturing method therefor, and the display panel provided in the present disclosure, the conductive material shielding ring is provided surrounding the third pattern of the conduction layer, thereby effectively preventing corrosion of the conduction layer exposed on the surface of the via holes. Hence, contact failure between different conductive metal layers due to corrosion of the conduction layer is avoided during use, and service life of a product is longer.

Reference numerals in the drawings are described as follows:1: first metal layer;2: second metal layer;3: conduction layer;4: first via hole;5: second via hole;6: conductive material shielding ring;7: first conductive material portion;8: second conductive material portion;9: third via hole;10: overlapping area.

DETAILED DESCRIPTION OF THE EMBODIMENTS

Specific embodiments of the present disclosure are further described in detail below in conjunction with accompanying drawings. The following embodiments are merely intended to illustrate technical solutions of the present disclosure more clearly, but not to limit the protection scope of the present disclosure.

FIG. 2illustrates a schematic structure of an array substrate according to some embodiments of the present disclosure. As shown inFIG. 2, the array substrate includes:

a first metal layer1including a first pattern;

a second metal layer2including a second pattern;

a conduction layer3, located above the first metal layer1and the second metal layer2and including a third pattern;

a first via hole4adapted to connect the first pattern and the third pattern;

a second via hole5adapted to connect the second pattern and the third pattern; and

a conductive material shielding ring6surrounding the third pattern, where the conductive material shielding ring6is insulated from the third pattern.

The first pattern, the second pattern and the third pattern are located respectively in the first metal layer1, the second metal layer2and the conduction layer3. Actually, a part of each layer shown inFIG. 2is mainly a corresponding pattern part included in each layer. Thus, for the purpose of clarity, reference numerals of the first pattern, the second pattern and the third pattern are not shown in the drawings. Further, each layer is illustrative. It should be understood that, the first metal layer1and the second metal layer2are generally located at different layers, one or more insulating layers are generally located between the first metal1and the conduction layer3, and one or more insulating layers are generally located between the second metal layer2and the conduction layer3, and via holes penetrate through corresponding insulating layer(s), where the insulating layers are not shown inFIG. 2.

One of the first metal layer and the second metal layer may be a gate metal layer, and the other may be a source/drain metal layer. Alternatively, the first metal layer and the second metal layer may be other metal layers, which is not limited specifically in the embodiments and is only intended for illustration with examples.

For example, in a case that the array substrate above is of an bottom-gate structure, the first metal layer1is a gate metal layer, the second metal layer2is a source/drain metal layer. A first insulating layer is formed on the first metal layer1, the second metal layer2is formed on the first insulating layer, a second insulating layer is formed on the second metal layer2, and the conduction layer3is formed on the second insulating layer. The conduction layer3may be made of a transparent conductive metal oxide or a metal. Specifically, the transparent conductive metal oxide is indium tin oxide. The conduction layer3is a third metal layer formed directly on the second insulating layer when the conduction layer3is made of a metal. The conduction layer3is a transparent conduction layer formed on the second insulating layer when the conduction layer3is made of a transparent conductive metal oxide. The first via hole4penetrates through the first insulating layer and the second insulating layer, and the second via hole5penetrates through the second insulating layer.

Similarly, in a case that the array substrate above is of a top-gate structure, the first metal layer1is a source/drain metal layer, the second metal layer2is a gate metal layer. A first insulating layer is formed on the first metal layer1, the second metal layer2is formed on the first insulating layer, a second insulating layer is formed on the second metal layer2, and the conduction layer3is formed on the second insulating layer. The conduction layer3may be made of a transparent conductive metal oxide or a metal. Specifically, the transparent conductive metal oxide is indium tin oxide. The conduction layer3is a third metal layer formed directly on the second insulating layer when the conduction layer3is made of a metal. The conduction layer3is a transparent conduction layer formed on the second insulating layer when the conduction layer3is made of a transparent conductive metal oxide. The first via hole4penetrates through the first insulating layer and the second insulating layer, and the second via hole5penetrates through the second insulating layer.

In the array substrate above, the conductive material shielding ring6surrounding the third pattern is arranged around the third pattern of the conduction layer3, thereby reducing influence of surrounding electromagnetic field on the third pattern and effectively preventing corrosion of the conduction layer exposed on surfaces of the first via hole and the second via hole. Hence, contact failure between different conductive metal layers, i.e., between the first metal layer1and the second metal layer2, due to corrosion of the conduction layer3is avoided during use, and service life of a product is longer.

The conductive material shielding ring6surrounding the third pattern may be understood with the following implementations: the conductive material shielding ring6and the conduction layer3may be located at the same layer; or the conductive material shielding ring6and the conduction layer3may be located at different layers; or the conduction layer3and a part of the conductive material shielding ring6are located at the same layer, and the conduction layer3and another part of the conductive material shielding ring6are located at different layers; as long as the conductive material shielding ring6surrounding the third pattern of the conduction layer3is formed around the third pattern of the conduction layer3and protects the third pattern from being influenced by surrounding electromagnetic field.

In some embodiments of the present disclosure, as shown inFIG. 3, the conductive material shielding ring may include a first conductive material portion7and a second conductive material portion8. Specifically, the conduction layer3is arranged at a layer and made of a material identical to the first conductive material portion7, the second metal layer2is arranged at a layer and made of a material identical to the second conductive material portion8, and the second metal layer2is located between the first metal layer1and the conduction layer3. The first conductive material portion7and the second conductive material portion8are connected via third via holes.

Structures of the array substrate described above are explained in detail below, and may include three structures as follows specifically. The conductive material shielding ring6in each of the three structures can prevent corrosion of the conduction layer3exposed on surfaces of the first via hole4and the second via hole5. The present disclosure is limited to the following three structures which are merely illustrative.

A first structure is shown inFIG. 2, the conduction layer3is made of a transparent conductive metal oxide. Specifically, the conduction layer3is a transparent conduction layer made of indium tin oxide. The transparent conduction layer is arranged at a layer and made of a material identical to the conductive material shielding ring6. The conductive material shielding ring6surrounds the third pattern of the transparent conduction layer. The conductive material shielding ring6is formed by means of a pattering process while forming the transparent conduction layer. With such structure, during manufacture of the array substrate, it is not necessary to manufacture the conductive material shielding ring6through a separate patterning process. In addition, the conductive material shielding ring6in the structure can effectively prevent corrosion of the transparent conduction layer exposed on surfaces of the first via hole4and the second via hole5. Specifically, the conductive material shielding ring is insulated from the third pattern of the transparent conduction layer.

In a second structure, the conduction layer3is a third metal layer made of a metal. Specifically, a shielding ring6surrounding the third pattern of the third metal layer is formed while forming the third metal layer. The shielding ring6and the third metal layer are made of the same material, and the shielding ring6is insulated from the third pattern of the third metal layer. With such structure, during manufacture of the array substrate, it is not necessary to manufacture the shielding ring6through a separate patterning process. In addition, the shielding ring6in the structure can effectively prevent corrosion of the conduction layer exposed on surfaces of the first via hole4and the second via hole5.

In a third structure, the conductive material shielding ring6is divided into a first conductive material portion7and a second conductive material portion8, the conduction layer3is arranged at a layer and made of a material identical to the first conductive material portion7, and the second metal layer2is arranged at a layer and made of a material identical to the second conductive material portion. The second metal layer2is located between the first metal layer1and the conduction layer3. That is, a first insulating layer is formed on the first metal layer1; while forming the second metal layer2on the first insulating layer, the second conductive material portion8is formed near the second metal layer2; a second insulating layer is formed on the second metal layer; while forming the conduction layer3on the second insulating layer, the first conductive material portion7is formed near the conduction layer3. Specifically, it should be understood that, the first conductive material portion7and the conduction layer3are located at the same layer and formed by means of one patterning process; and the second conductive material portion8and the second metal layer2are located at the same layer and formed by means of one patterning process.

It should be noted that, the first conductive material portion7and the second conductive material portion8are located at different layers of the array substrate, and each of the first conductive material portion7and the second conductive material portion8may be a continuous structure, or may include several discontinuous parts. Each of the first conductive material portion7and the second conductive portion8may have a half-frame shape, a semi-circle shape or any other shape having two ends as long as a whole structure of the first conductive material portion7and the second conductive portion8surrounds the third pattern of the conduction layer3. As shown inFIGS. 3 and 4, the first conductive material portion7and the second conductive portion8are of a half-frame shape, as shown inFIG. 5, the first conductive material portion7and the second conductive portion8are of a semi-circle shape, and as shown inFIG. 6, the first conductive material portion7and the second conductive portion8are of a polygon shape. The first conductive material portion7and the second conductive portion8may be connected via third via holes such that a closed shielding ring6is formed. For example, as shown inFIG. 4, two ends of the first conductive material portion7respectively overlap two ends of the second conductive material portion8at the overlapping area10in a direction perpendicular to the conduction layer3, and the third via holes9are provided at the overlapping area where the first conductive material portion7overlaps the second conductive material portion8. The third via holes9may be provided between the second metal layer2and the conduction layer3, adapted to connect the first conductive material portion7and the second conductive portion8such that the two ends of the first conductive material portion7are respectively connected to the two ends of the second conductive material portion8to form a closed shielding ring6. Alternatively, the two ends of the first conductive material portion7and the two ends of the second conductive material portion8may be connected in other connection manners instead of through the third via holes, which are not illustrated in detail in the embodiments.

With such structure, since the first conductive material portion7is formed while forming the conduction layer3and the second conductive material portion8is formed while forming the second metal layer2, separate processes for manufacturing the first conductive material portion7and the second conductive material portion8are removed. In addition, the conductive material shielding ring6in the structure can effectively prevent corrosion of the conduction layer3exposed on surfaces of the via hole4and the via hole5. Specifically, the first conductive material portion7is generally insulated from the conduction layer3and the second conductive material portion8is generally insulated from the second metal layer2.

It is further provided a method for manufacturing an array substrate in the present disclosure. Taking the manufacture of the array substrate in the above embodiments as an example, the method for manufacturing the array substrate includes following steps S1to S6.

In step S1, a first metal layer1including a first pattern is formed.

In step S2, a second metal layer2including a second pattern is formed.

In step S3, a conduction layer2is formed, which includes a third pattern and is located above the first metal layer1and the second metal layer2.

In step S4, a first via hole4is formed, where the first via hole4is adapted to connect the first pattern and the third pattern and is covered by the third pattern.

In step S5, a second via hole5is formed, where the second via hole5is adapted to connect the second pattern and the third pattern and is covered by the third pattern.

In step S6, a conductive material shielding ring6is formed surrounding the third pattern, where the conductive material shielding ring6is insulated from the third pattern.

In the step S1described above, the first metal layer1may be formed in a manner of vacuum deposition or magnetron sputtering and the first pattern may be formed through a patterning process, for example, etching. In other steps, processes for forming the second metal layer2including the second pattern and the conduction layer3including the third pattern are same as that for forming the first metal layer1including the first pattern in step S1, which are not explained in detail in the embodiments.

It should be understood that, the first metal layer1and the second metal layer2are generally located at different layers. One or more insulating layers are generally provided between the first metal layer1and the conduction layer3, and one or more insulating layers are generally provided between the second metal layer2and the conduction layer3. The via holes penetrate through corresponding insulating layer(s). The one or more insulating layers are not shown in the drawings for purpose of clarity. That is, the method for manufacturing the array substrate includes, between the step S1and step S2, and between the step S2and the step S3, forming one or more insulating layers. For example, a first insulating layer is formed on the first metal layer1, the second metal layer2is formed on the first insulating layer, a second insulating layer is formed on the second metal layer2, the conduction layer3is formed on the second insulating layer, where the first via hole4penetrates through the first insulating layer and the second insulating layer, and the second via hole5penetrates through the second insulating layer.

It should be understood that, the order of above description does not indicates that operations are performed by the above order, for example, steps for forming patterns of the first via hole4and the second via hole5are generally implemented prior to a step for forming the conduction layer3, and then a conductive material is filled into the patterns of the first via hole4and the second via hole5while forming the third pattern.

Specifically, the shielding ring6may be formed in following implementations. The step for forming the shielding ring6in the embodiments is merely illustrative, not intended to limit specific forming procedure thereof.

A first implementation is shown inFIG. 2. The conductive material shielding ring6is formed while forming the conduction layer3in the step S3, i.e., the conduction layer3and the shielding ring6are formed by means of one patterning process, such that the shielding ring6having a protection function and the conduction layer3adapted to electrically connect the first metal layer1to the second metal layer2can be formed at one time, thereby avoiding corrosion of the conductive layer by surrounding electric field.

The conduction layer3may be made of a transparent conductive metal oxide or a metal. Accordingly, the process of forming the conductive material shielding ring6while forming the conduction layer3may include: forming the shielding ring while forming a transparent conduction layer made of a transparent conductive metal oxide on the second insulating layer, where the transparent conduction layer and the shielding ring are formed by means of one patterning process, located at the same layer and made of the same material; or forming the shielding ring while forming a third metal layer on the second insulating layer, where the third metal layer and the shielding ring are formed by means of one patterning process, located at the same layer and made of the same material. The third metal layer is made of a metal, and the metal is not illustrated with specific examples in the embodiments.

A second implementation is shown inFIG. 3. The shielding ring may be alternatively formed in different layers of the array substrate. Specifically, the conductive material shielding ring6includes a first conductive material portion7and a second conductive material portion8.

As shown inFIG. 3, in a case that the second metal layer2is formed between the first metal layer1and the conduction layer3, the second conductive material portion8is formed near the second metal layer2while forming the second metal layer2in the step S2; and the first conductive material layer7is formed near the conduction layer3while forming the conduction layer3in the step S3. Specifically, the shielding ring6of the protection function is formed by connecting two ends of the first conductive material portion7to two ends of the second conductive material portion8via third via holes, thereby protecting the conductive layer3from getting adversely affected by surrounding electric field.

It is further provided a display device in the present disclosure, including the array substrate described above.

In embodiments, the display device may be any products and components having a display function, such as, an e-book, a mobile phone, a tablet computer, a television, a notebook computer, a digital picture frame, and a navigator.

In the specification of the present disclosure, numerous specific details are explained. However, it should be understood that, the embodiments of the present disclosure can be implemented without these specific details. In some instances, well-known methods, structures and technologies are not shown in detail, so as not to obscure the understanding of the specification.

Finally, it should be noted that, the above embodiments are merely to illustrate the technical solutions of the present disclosure, but not intended to limit them. Although the present disclosure is explained in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that, the technical solutions recorded in the foregoing embodiments may be modified, equivalent replacements can be performed on a part or all of the technical features thereof. Such modifications or replacements do not make the essence of corresponding technical solutions depart from the scope of the technical solutions of embodiments of the present disclosure, and should all be included in the scope of the claims and the specification of the disclosure.