Light emitting device and method of manufacturing the same

A light emitting device may include a substrate, an n-type clad layer, an active layer, and a p-type clad layer. A concave-convex pattern having a plurality of grooves and a mesa between each of the plurality of grooves may be formed on the substrate, and a reflective layer may be formed on the surfaces of the plurality of grooves or the mesa between each of the plurality of grooves. Therefore, light generated in the active layer may be reflected by the reflective layer, and extracted to an external location.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims priority under U.S.C. §119 to Korean Patent Application No. 10-2009-0118452, filed on Dec. 2, 2009, in the Korean Intellectual Property Office (KIPO), the entire contents of which are incorporated herein by reference.

BACKGROUND

Example embodiments relate to methods and apparatuses for manufacturing a light emitting device having improved light emission efficiency.

2. Description of the Related Art

A semiconductor light emitting device generates minority carriers that are injected by using a p-n junction structure of a semiconductor, and emits light by recombination of the minority carriers. The semiconductor light emitting device may be largely divided into a light emitting diode and a laser diode, and the light emitting diode is used as a highly efficient and environmentally-friendly light source in various fields including displays, optical communications, automobiles, and illumination, because the light emitting diode consumes a relatively low amount of power but has relatively high luminosity.

A light emitting device has to have improved light emission performance, and light emission efficiency may be one standard used to determine the light emission performance of the light emitting device. The light emission efficiency is mainly determined by three factors of internal quantum efficiency, extraction efficiency, and an operation voltage. The internal quantum efficiency indicates a characteristic value regarding how many photons are generated with respect to electrons that pass through the light emitting device, and may be determined by a quality of a semiconductor material, and a design of an active region. The extraction efficiency indicates a rate of the amount of photons that partly flow out of a semiconductor chip. The photons that are generated due to a relatively high refractive index difference between the semiconductor and a peripheral material may be absorbed into the semiconductor chip while being internally reflected several times. Thus, the extraction efficiency may be limited by the photons that are lost during the multi-reflection process in the semiconductor chip or during the absorption process. The operation voltage may be determined by an energy band gap of the active region, and electric resistance of the light emitting device.

SUMMARY

Provided are methods and apparatuses for a light emitting device having improved light emission efficiency. Provided are methods and apparatuses for manufacturing a light emitting device of which light emission efficiency is increased. Additional aspects will be set forth in part in the description which follows and, in part, will be apparent from the description, or may be learned by practice of example embodiments.

According to example embodiments, a light emitting device may include a concave-convex pattern on a substrate, the concave-convex pattern having a plurality of grooves and a mesa between each of the plurality of grooves; a first reflective layer on a side surface of each of the plurality of grooves; an n-type clad layer on the concave-convex pattern; an active layer on the n-type clad layer; a p-type clad layer on the active layer; a first electrode on a surface of the substrate; and a second electrode on a surface of the p-type clad layer.

The light emitting device may further include a buffer layer on a top surface of the mesa and the first reflective layer. A space may be between a top portion of each of the plurality of grooves and the n-type clad layer. The light emitting device may further include a second reflective layer on a top surface of the mesa, and a buffer layer on the second reflective layer and a bottom surface of each of the plurality of grooves, respectively.

The n-type clad layer may be grown by using Epitaxial Lateral Over Growth (ELOG). A distance between each of the plurality of grooves may be in the range of about 10 nm to about 100 μm, and a depth of each of the plurality of grooves may be in the range of about 10 nm to about 100 μm. The side surface of each of the plurality of grooves may include an inclined surface. The concave-convex pattern may be formed on a dielectric layer separate from the substrate.

According to example embodiments, a method of manufacturing a light emitting device may include depositing a mask layer on a substrate; forming a concave-convex pattern by using the mask layer, the concave-convex pattern having a plurality of grooves and a mesa between each of the plurality of grooves; depositing a reflective layer on an inner surface of the plurality of grooves and a top surface of the mesa between each of the plurality of grooves; partially exposing the substrate on a bottom surface of the inner surface of the plurality of grooves or on the top surface of the mesa; growing an n-type clad layer on the exposed substrate; forming an active layer on the n-type clad layer; and forming a p-type clad layer on the active layer.

According to example embodiments, a method of manufacturing a light emitting device may include depositing a dielectric layer on a substrate; forming a concave-convex pattern by etching the dielectric layer, the concave-convex pattern having a plurality of grooves and a mesa between each of the plurality of grooves; depositing a reflective layer on an inner surface of the plurality of grooves and a top surface of the mesa between each of the plurality of grooves; etching the substrate so as to partially expose the substrate on a bottom surface of the plurality of grooves; growing an n-type clad layer on the exposed substrate; forming an active layer on the n-type clad layer; and forming a p-type clad layer on the active layer.

DETAILED DESCRIPTION

Hereinafter, a light emitting device and a method of manufacturing the same according to example embodiments will be described in detail by explaining example embodiments with reference to the attached drawings. In the drawings, like reference numerals in the drawings denote like elements, and the size of each component may be exaggerated for clarity.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which example embodiments belong. It will be further understood that terms, such as those defined in commonly-used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein. In the drawings, the thicknesses of layers and regions are exaggerated for clarity. Like reference numerals in the drawings denote like elements.

FIGS. 1A through 1Gare diagrams for describing a method of manufacturing a light emitting device according to example embodiments. Referring toFIG. 1A, a mask layer13may be deposited on a substrate10. The mask layer13may include a dielectric layer including photoresist and/or silicon nitride (SiNx). The substrate10may include a silicon substrate, a gallium nitride (GaN) substrate and/or a gallium oxide (Ga2O3) substrate. The silicon substrate may include a Si (111) substrate. The mask layer13may be deposited after a surface of the substrate10is cleaned.

As illustrated inFIG. 1B, the substrate10may be etched and patterned by using the mask layer13. For a patterning operation, a dry etching method may be used. After the patterning operation, a concave-convex pattern having a groove15and a mesa17may be formed on the substrate10. A horizontal cross-section of the groove15may have a shape selected from the group consisting of a quadrangle, a circle, a polygon, and any combinations thereof. A vertical cross-section of the groove15may have various shapes including a U-shape and/or a V-shape.

When the concave-convex pattern is formed, by controlling a dry etching condition, an anisotropic etching by which an etching speed in a horizontal direction may be faster than an etching speed in a vertical direction under the mask layer13may be performed so that the groove15having inclined side surfaces15amay be formed. The mesa17that is not etched by the mask layer13may be formed between a plurality of the grooves15.

Referring toFIG. 1C, a protective layer20and a reflective layer23may be deposited on the concave-convex pattern. An interval between each of the neighbouring grooves15may be in the range of about 10 nm to about 100 μm, and a depth of the groove15may be in the range of about 10 nm to about 100 μm. Where the groove15has a nano-scale in the range of about 10 nm to about 1000 nm, and a clad layer to be described later is grown, the clad layer may be grown in a nanorod form or nanowire form. Also, the clad layer may be grown in a bulk form in micro-scale in the range of about 1 μm to about 100 μm. If the clad layer is grown in a nanometer scale, a dislocation density may be decreased so that a structural defect density may be decreased. A size of the groove15may be adjusted in consideration of reflectivity, electrical conductivity, resistance, and a horizontal growth distance for Epitaxial Lateral Over Growth (ELOG). An area ratio R where the reflective layer23is deposited has to be relatively large in order to increase the reflectivity, while an area ratio 1−R where the reflective layer23is not deposited has to be relatively large in order to ensure a current path for reducing the resistance. In order to minimize or reduce the structural defect of an n-type clad layer to be grown on the substrate10, an area where the n-type clad layer is vertically grown on the substrate10, that is, the area ratio 1−R where the reflective layer23is not deposited, has to be small, but a horizontal growth distance of the n-type clad layer increases as the area ratio R increases such that a growth time taken to generate a continuous thin film may be relatively long, as such a size of a groove pattern may be determined.

In order to increase extraction efficiency of light emitted from an active layer, the reflectivity of the reflective layer23to be deposited has to be relatively large. For example, the reflective layer23may include a metal layer or a dielectric layer. For example, the metal layer may be formed of at least one selected from the group consisting of silver (Ag), aluminium (Al), gold (Au), titanium (Ti), zirconium diboride (ZrB2), zirconium nitride (ZrN), HfxZr(l-z)B2, titanium nitride (TiN), and chromium (Cr). The dielectric layer may include a Distributed Bragg Reflector (DBR). The DBR may be alternately formed of material layers having different refractive indexes. For example, a dielectric DBR may have a structure in which one or more pairs of silicon dioxide (SiO2) and silicon carbide (SiC) are alternately stacked. The reflective layer23may be vacuum-deposited by physical vapor deposition (PVD) at room temperature or at a high temperature.

When the reflective layer23is deposited, the reflective layer23may also be deposited on the side surfaces15aof the groove15by inclining the substrate10. By doing so, preventing or reducing a loss of the light incident on the side surfaces15amay be possible. If the reflective layer23is not deposited on the side surfaces15aof the groove15, the reflectivity of the reflective layer23may be changed depending on an incident angle of the incident light, and if re-absorption occurs on a side surface of the substrate10, where the reflective layer23is not deposited on the side surface, the extraction efficiency of light may be decreased. In order to prevent or reduce the loss, and to increase the extraction efficiency of light by enlarging an area of the substrate10on which the reflective layer23is deposited, the reflective layer23may be deposited on the side surfaces15aof the groove15.

Referring toFIG. 1D, after depositing a protective layer20and the reflective layer23, the mask layer13may be removed by etching or by a lift-off method so that the surface of the substrate10on which the clad layer is to be grown is exposed. The surface of the substrate10on which the clad layer is to be grown may include a region corresponding to the groove15or the mesa17of the concave-convex pattern. InFIG. 1D, the region of the substrate10which corresponds to the mesa17of the concave-convex pattern may be exposed.

A buffer layer25may be deposited on a pattern shown inFIG. 1E. The buffer layer25may be deposited to reduce an occurrence of a lattice defect and a crack due to a difference between lattice constants and a difference between thermal expansion coefficients of the substrate10and the clad layer to be grown. The buffer layer25may include a stress compensating layer or a nucleation layer. For example, the stress compensating layer may be arranged to compensate for a tensile stress that occurs when the clad layer is cooled after the clad layer is grown, and may be formed of a material having a lattice constant less than that of the clad layer so that a compressive stress may be accumulated when the clad layer is grown.

Also, the nucleation layer may be formed of a material having a lattice constant similar to that of the clad layer. For example, the nucleation layer may be formed of an aluminium nitride (AlN) or AlxGa1-xN(0≦x<1). In addition, by depositing a metallic buffer layer including ZrN or ZrB2by PVD, a resultant layer thereof may be used as the nucleation layer.

In addition, by arranging the stress compensating layer as such, increasing a growth thickness of a crack-free clad layer may be possible. For example, the stress compensating layer may be formed of a AlxGa1-xN, AlxGa1-xN/GaN superlattice. In order to decrease the lattice defect via gradual adjustment of the lattice constant, the stress compensating layer may be formed in a manner that a composition ratio of AlxGa1-xN is adjusted via a graded manner or a step-wise manner.

In example embodiments, the substrate10may include the concave-convex pattern so that reducing an affect may be possible due to the difference between the thermal expansion coefficients, wherein the affect may be directly from the substrate10when the clad layer is cooled.

FIG. 1Fis a diagram of a growth of an n-type clad layer30. The n-type clad layer30may be grown by using ELOG. The n-type clad layer30may include a first n-type clad layer30agrown in a first direction, and a second n-type clad layer30bgrown in a second direction. In the growth of the n-type clad layer30, at the beginning, the n-type clad layer30may be grown in a vertical direction. After growing the n-type clad layer30having a first thickness in the vertical direction, a growing speed in a horizontal direction may be increased by changing a growing condition. The first thickness may be in the range of about several nm to about 1 μm.

When the growing condition is changed from vertical direction growth to horizontal direction growth, a temperature may be increased, a pressure may be decreased, or a source gas flow ratio of a Group V over III may be increased. For example, a ratio of a nitrogen source gas flow to a Ga source gas flow may be increased. By maintaining or changing the growing condition of the horizontal direction growth, allowing the n-type clad layer30to have a desired second growth while being grown may be possible. The n-type clad layer30may be formed of a nitride semiconductor, e.g., GaN.

When the first n-type clad layer30ais grown, a clad material, e.g., a nitride, for growing a clad layer in the groove15may accumulate in a region corresponding to the groove15so that a clad material layer27made of the nitride may be formed. Because the reflective layer23is stacked on the groove15, the clad material layer27may not grow epitaxially on the groove15but may be deposited or may accumulate as a polycrystalline or amorphous phase material. In consideration of this point, the groove15may have a micrometer scale depth in proportion to a thickness of the n-type clad layer30to be grown. By doing so, preventing or reducing the clad material layer27, which is to be deposited or accumulated as the polycrystalline or amorphous phase material on the groove15during the growth of the n-type clad layer30, from overflowing out of the groove15may be possible, and thus, the growth of the n-type clad layer30may be prevented or reduced.

The n-type clad layers30that are vertically and horizontally grown in regions corresponding to mesas, respectively, meet on the groove15. When the n-type clad layers30that are grown in the corresponding mesa regions meet, misorientation and dislocation may occur so that horizontal growth may be adjusted to decrease the misorientation and the dislocation. During the growth of the second n-type clad layer30b, growth does not occur on the clad material layer27so that a space28may be formed.

In other words, the space28may be formed between the groove15having the reflective layer23and the n-type clad layer30. By doing so, a contact area between the substrate10or the buffer layer25and the n-type clad layer30may be decreased so that reducing the lattice defect due to the difference between the lattice constants of the substrate10or the buffer layer25and the n-type clad layer30may be possible. Growing the n-type clad layer30on the exposed surface of the substrate10, without the buffer layer25, may be possible.

As illustrated inFIG. 1G, after the n-type clad layer30is grown, an active layer35and a p-type clad layer37may be grown. The active layer35and the p-type clad layer37may be grown by using well known methods. For example, metal organic chemical vapor deposition (MOCVD), hydride vapor phase epitaxy (HVPE), molecular beam epitaxy (MBE), or halide chemical vapor deposition (HCVD) may be used.

The active layer35emits light by recombination of electrons-holes, e.g., the active layer35may be formed of an indium gallium nitride (InGaN)-based nitride semiconductor layer, and its light emission wavelength may be adjusted by controlling a band gap energy. The active layer35includes a quantum well layer and a barrier layer, e.g., the active layer35may include the quantum well layer and the barrier layer formed of InGaN/GaN, InGaN/InGaN, InGaN/AlGaN or InGaN/InAlGaN. The quantum well layer may be formed of a single quantum well or a multi-quantum well. The p-type clad layer37may be formed of a Group III-V nitride semiconductor material, e.g., a p-type GaN. As a dopant, a p-type dopant including magnesium (Mg), calcium (Ca), zinc (Zn), cadmium (Cd), or mercury (Hg) may be used.

A p-type electrode40may be formed on a top surface of the p-type clad layer37and an n-type electrode45may be formed on a bottom surface of the substrate10. The p-type electrode40and the n-type electrode45may be formed of at least one selected from the group consisting of gold (Au), copper (Cu), nickel (Ni), silver (Ag), chromium (Cr), tungsten (W), aluminium (Al), platinum (Pt), tin (Sn), lead (Pb), iron (Fe), titanium (Ti), and molybdenum (Mo), or may be formed of at least one selected from the group consisting of ITO, ZrB, ZnO, InO, and SnO.

The light emitting device according to example embodiments may be a vertical-type light emitting device including the reflective layer23, and although the substrate10is not removed, light that is generated in the active layer35is reflected at the reflective layer23, passes through the p-type clad layer37, and is extracted. The substrate10may include the concave-convex pattern having the groove15and the mesa17, and the reflective layer23may be formed on the groove15or the mesa17. The reflective layer23may be formed on an inner surface of the groove15, and, the reflective layer23may be formed on the side surfaces15aof the groove15.

By depositing the reflective layer23on the side surfaces15aof the groove15, a reflective area may be relatively large and the light may be reflected regardless of the incident angle of the light so that the light emission efficiency may be increased. In addition, the groove15may include inclined side surfaces, and the reflective layer23may be deposited on the inclined side surfaces so that the light emission efficiency may be increased.

FIGS. 2A through 2Gare diagrams for describing a method of manufacturing a light emitting device according to example embodiments. As illustrated inFIG. 2A, after cleaning a surface of a substrate100, a mask layer103may be deposited on the substrate100. The substrate100may include a silicon substrate, a GaN substrate, or a Ga2O3substrate, and the mask layer103may include a dielectric layer or a DBR layer. In the case of the silicon substrate, the silicon substrate may be less expensive than a sapphire substrate or a silicon carbide substrate, and a relatively large diameter wafer may be used in the silicon substrate such that reducing manufacturing costs and increasing productivity may be possible. As illustrated inFIG. 2B, a concave-convex pattern may be formed on the substrate100via a dry etching method using the mask layer103. The concave-convex pattern may include a groove105and a mesa106. The groove105may include a side surface105aand a bottom surface105b. By performing anisotropic etching in which an etching speed in a horizontal direction is faster than an etching speed in a vertical direction, the concave-convex pattern having inclined side surfaces may be formed. In order to make the bottom surface105bof the groove105have a flat surface so as to grow an n-type clad layer, an etching condition and a size of a pattern may be adjusted.

As illustrated inFIG. 2C, a reflective layer107may be deposited on the concave-convex pattern. The reflective layer107may be deposited, while the substrate100is inclined in right and left directions so as to allow the reflective layer107to be deposited on the side surface105aof the groove105. The reflective layer107may include a metal layer having relatively high reflectivity or a DBR layer. Before depositing the reflective layer107, a protective layer108including AlN may be first deposited on the surface of the substrate100.

Referring toFIG. 2D, a portion of the substrate100corresponding to the bottom surface105bof the groove105may be exposed by performing dry etching. The substrate100may be damaged by the dry etching, so the surface of the substrate100may be treated by performing wet etching. As illustrated inFIG. 2E, a buffer layer110may be deposited on the exposed surface of the substrate100. The buffer layer110performs materially the same function and operation as the buffer layer25described in relation toFIG. 1E, and thus, a detailed description thereof will be omitted here.

As illustrated inFIG. 2F, an n-type clad layer115may be grown on the buffer layer110. The n-type clad layer115may be grown by using ELOG. A first n-type clad layer115amay be grown in a vertical direction on the buffer layer110corresponding to the bottom surface105bof the groove105so as to have a first thickness. When the first n-type clad layer115ais grown, a clad material layer113may be stacked on a region corresponding to the mesa106. Because the reflective layer107is deposited on the mesa106, a clad material, e.g., a nitride, may not be grown epitaxially on the mesa106but may be deposited or may accumulate as a polycrystalline or amorphous phase material.

After the first n-type clad layer115ais grown, a second n-type clad layer115bmay be grown in a horizontal direction so as to have a second thickness by changing a growing condition to increase a growing speed in the horizontal direction. By maintaining or changing a horizontal growth condition, forming the n-type clad layer115having a desired thickness may be possible. The n-type clad layer115may be formed of a nitride semiconductor, e.g., GaN.

Referring toFIG. 2G, an active layer120, a p-type clad layer125, and a p-type electrode130may be formed on the n-type clad layer115. After that, an n-type electrode140may be formed on a bottom surface of the substrate100. The p-type electrode130and the n-type electrode140may be formed of at least one selected from the group consisting of Au, Cu, Ni, Ag, Cr, W, Al, Pt, Sn, Pb, Fe, Ti, and Mo, or may be formed of at least one selected from the group consisting of ITO, ZrB, ZnO, InO, and SnO.

The light emitting device shown inFIG. 2Gincludes the substrate100, the concave-convex pattern having the groove105and the mesa106formed on the substrate100, and the reflective layer107formed at least on the side surface105aof the groove105. In the light emitting device shown inFIG. 2G, the reflective layer107may be formed on the side surface105aof the groove105and on a top surface of the mesa106. The n-type clad layer115may be grown on the bottom surface105bof the groove105. A space108may be formed between the side surface105aof the groove105and the n-type clad layer115.

FIGS. 3A through 3Gare diagrams for describing a method of manufacturing a light emitting device according to example embodiments. Referring toFIG. 3A, after cleaning a surface of a substrate200, a dielectric layer203may be deposited on the substrate200. The dielectric layer203may be formed of SiO2.

As illustrated inFIG. 3B, a concave-convex pattern may be formed on the dielectric layer203by performing etching. The concave-convex pattern may include a groove205and a mesa206. The groove205may include a side surface205aand a bottom surface205b. The bottom surface205bmay be formed by exposing the substrate200.

As illustrated inFIG. 3C, a reflective layer207may be deposited on the concave-convex pattern. When the reflective layer207is deposited, the substrate200may be inclined in right and left directions so as to allow the reflective layer207to be deposited on the side surface205a. The reflective layer207may include a metal layer or a DBR. As illustrated inFIG. 3D, a portion of the substrate200corresponding to the bottom surface205bof the groove205may be exposed by performing dry etching. Referring toFIG. 3E, a buffer layer210may be deposited on a pattern shown inFIG. 3D.

As illustrated inFIG. 3F, an n-type clad layer215may be grown on the buffer layer210. The n-type clad layer215may be grown by using ELOG. A first n-type clad layer215amay be grown epitaxially in a vertical direction on the buffer layer210in the bottom surface205bof the groove205so as to have a first thickness. Because the reflective layer207is formed on a top surface of the mesa206, a clad material layer213may not be grown epitaxially on the top surface of the mesa206abut may accumulate as a polycrystalline or amorphous phase material. After a growth of the first n-type clad layer215a, a second n-type clad layer215bmay be grown in a horizontal direction so as to have a second thickness by changing a growing condition by increasing a growing speed in the horizontal direction.

As illustrated inFIG. 3G, an active layer220, a p-type clad layer225, and a p-type electrode230may be formed on the n-type clad layer215. After that, an n-type electrode240may be formed on a bottom surface of the substrate200.

The light emitting device shown inFIG. 3Gincludes the substrate200, the dielectric layer203stacked on the substrate200, and the concave-convex pattern having the groove205and the mesa206arranged on the dielectric layer203. Compared to the light emitting device shown inFIG. 2G, the light emitting device shown inFIG. 3Gis different in that the concave-convex pattern may be arranged in the dielectric layer203that is arranged as a separate body different from the substrate200.

As described above, the light emitting device according to example embodiments may include a reflecting layer embedded pattern so as to increase the extraction efficiency of the light, so that the light emission efficiency may be increased. Also, the light emitting device includes a relatively large area of the reflective layer that reflects the light emitted from the active layer and thus allows the light to be emitted to an external location.

The light emitting device according to example embodiments may include the concave-convex pattern having the groove and the mesa which are formed on the substrate or the dielectric layer, and includes the reflective layer formed at least on the side surface of the groove, so that the light emitting device may reduce light being generated in the active layer from being absorbed by the substrate, and thus may increase the light emission efficiency. Also, by decreasing the amount of light absorbed by the substrate via the reflective layer, the substrate may not be removed so that a substrate removal process may be omitted.