Test apparatus, test method and system

A test apparatus for testing a device under test includes a control apparatus, a plurality of test modules, and a plurality of relay apparatuses that connect the control apparatus and the plurality of test modules, each relay apparatus including (1) an upper port section connected either to the control apparatus or to a relay apparatus nearer the control apparatus; and (2) at least one lower port section connected either to a relay apparatus nearer the plurality of test modules or to a corresponding test module, where each relay apparatus receives, at one of the at least one lower port section, a packet transmitted from the corresponding test module to the control apparatus, and transmits, from the upper port section, the received packet after adding thereto port identification information of the one of the at least one lower port section.

BACKGROUND

1. Technical Field

The present invention relates to a test apparatus, a test method, and a system for testing a device under test.

2. Related Art

A test apparatus for testing a semiconductor apparatus or the like includes a plurality of test modules and a control apparatus. Each test module exchanges a signal with a device under test. The test apparatus is connected to each test module via a bus such as a PCI. Such a test apparatus can change the connection state between the control apparatus and the plurality of test modules.

In the test apparatus, when the connection state between the control apparatus and the plurality of test modules has been changed, the control apparatus performs initialization so as to access each test module. More specifically, the control apparatus reads information from the configuration register of each test module, to assign, in order, the storage regions of the test modules to addresses on an address space of the bus. The control apparatus then writes entry values of the addresses to which the test modules are assigned, to the configuration registers of the test modules respectively. The initialization of the control apparatus can complete in this way.

Such test apparatuses have to perform read and write operations to the respective configuration registers of the plurality of test modules in the initialization. This makes the initialization of such test apparatuses cumbersome.

Moreover in a case where a broadcast command attempting to access all of the plurality of test modules is provided, the control apparatus has to determine the test module that is assigned the address range corresponding to the address designated by the command. However, the control apparatus of such a test apparatus conventionally does not manage the address range assigned to each test module, which makes it difficult to deal with a broadcast command.

SUMMARY

Therefore, it is an object of an aspect of the innovations herein to provide a test apparatus, a test method, and a system, which are capable of overcoming the above drawbacks accompanying the related art. The above and other objects can be achieved by combinations described in the claims.

A first aspect of the innovations may include a test apparatus for testing a device under test, including: a control apparatus that controls a test of the device under test; a plurality of test modules that exchange signals with the device under test; and a plurality of relay apparatuses that connect the control apparatus and the plurality of test modules, each relay apparatus including (1) an upper port section connected either to the control apparatus or to a relay apparatus nearer the control apparatus; and (2) at least one lower port section connected either to a relay apparatus nearer the plurality of test modules or to a corresponding test module, where each relay apparatus receives, at one of the at least one lower port section, a packet transmitted from the corresponding test module to the control apparatus, and transmits, from the upper port section, the received packet after adding thereto port identification information of the one of the at least one lower port section, and the control apparatus identifies, based on port identification information of each of lower port sections positioned on a path from the corresponding test module to the control apparatus, path information to the test module having transmitted the packet.

A second aspect of the innovations may include a test method performed by a test apparatus that tests a device under test, where the test apparatus includes: a control apparatus that controls a test of the device under test; a plurality of test modules that exchange signals with the device under test; and a plurality of relay apparatuses that connect the control apparatus and the plurality of test modules, each relay apparatus including (1) an upper port section connected either to the control apparatus or to a relay apparatus nearer the control apparatus; and (2) at least one lower port section connected either to a relay apparatus nearer the plurality of test modules or to a corresponding test module, the method including: receiving, by each relay apparatus, at one of the at least one lower port section, a packet transmitted from the corresponding test module to the control apparatus, and transmitting, from the upper port section, the received packet after adding thereto port identification information of the one of the at least one lower port section, and identifying, by the control apparatus, based on port identification information of each of lower port sections positioned on a path from the corresponding test module to the control apparatus, path information to the test module having transmitted the packet.

A third aspect of the innovations may include a system including: a control apparatus; a plurality of modules; and a plurality of relay apparatuses that connect the control apparatus and the plurality of modules, each relay apparatus including (1) an upper port section connected either to the control apparatus or to a relay apparatus nearer the control apparatus; and (2) at least one lower port section connected either to a relay apparatus nearer the plurality of modules or to a corresponding module, where each relay apparatus receives, at one of the at least one lower port section, a packet transmitted from the corresponding module to the control apparatus, and transmits, from the upper port section, the received packet after adding thereto port identification information of the one of the at least one lower port section, and the control apparatus identifies, based on port identification information of each of the lower port sections positioned on a path from the corresponding module to the control apparatus, path information to the module having transmitted the packet.

DESCRIPTION OF EXEMPLARY EMBODIMENTS

FIG. 1shows a configuration of a test apparatus10according to the present embodiment. The test apparatus10tests a device under test such as a semiconductor apparatus. The test apparatus10includes a control apparatus12, a plurality of test modules14, and a plurality of relay apparatuses16. The control apparatus12executes a control program to control the operation of the control apparatus12, to control the test of the device under test.

Each test module14exchanges signals with the device under test. Each test module14supplies a test signal to a device under test, and receives an output signal outputted from the device under test in response to the test signal. Each test module14compares, to an expected value, a value of the received output signal. Each test module14may be a board installed within a test head.

The plurality of relay apparatuses16connect the control apparatus12and the plurality of test modules14. Each relay apparatus16includes one port on its upper side and at least one port on its lower side. The upper port of each relay apparatus16is connected to either the control apparatus12or the lower port of a different relay apparatus16. The lower port of each relay apparatus16is connected to either a test module14or the upper port of a different relay apparatus16. The relay apparatus16may be a switch board installed in the test head.

A transmission path20is used to connect the control apparatus12to a relay apparatus16, a relay apparatus16to a test module14, and a relay apparatus16to another relay apparatus16. The transmission path20may be a cable for transmitting serial data.

The test apparatus10has a star-type (or a tree-type) network configuration in which the control apparatus12is positioned on top, and the test modules14are provided at the bottom. The test apparatus10may also have a configuration in which the test modules14are directly connected to the control apparatus12. Moreover, in the test apparatus10, change in connection state among the control apparatus12, the relay apparatuses16, and the plurality of test modules14, as well as addition or elimination of test module(s)14and relay apparatus(es)16can be freely performed.

FIG. 2shows functional blocks of a control apparatus12, a test module14and a relay apparatus16. The control apparatus12includes a CPU28and a communication section30. The CPU28issues an access request to each test module14by executing a program. The communication section30transmits, to the test module14, an access request supplied by the CPU28. The communication section30receives a response result in response to the access request by the test modules14, and returns the received response result to the CPU28.

The communication section30includes a storage section32, a transmission section34, at least one control port36, a reception section38, and an assigning section40. The storage section32stores path information representing the paths to a plurality of test modules14from the control apparatus12, in association with the logic numbers of the test modules14.

The transmission section34transmits a packet to a test module14via any of the control port sections36. The transmission section34incorporates, in a packet to be transmitted, a command representing the contents of the access request, as well as path information representing the path to the test module14to which the packet is destined as a destination. Also in the initialization, the transmission section34transmits a packet including a path information read command (detailed later) to each test module14.

Each control port section36is connected to either a test module14or a relay apparatus16. Each control port section36exchanges data with either the test module14or the relay apparatus16connected thereto.

The reception section38receives, via the control port section36, a return packet that is a packet transmitted from a test module14to the control apparatus12. In the initialization, the reception section38identifies the plurality of test modules14of the test apparatus10, based on the plurality of return packets returned from the plurality of test modules14respectively, based on the plurality of return packets returned from the plurality of test modules14respectively in response to the path information read command. Furthermore, the reception section38identifies the path information representing the path to each test module14from the control apparatus12, based on these plurality of return packets.

In the initialization, the assigning section40assigns a logic number to each test module14, in response to reception of the return packet returned from each test module14in response to the path information read command.

Each relay apparatus16includes a upper port section44, at least one lower port section46, and a relay processing section48. The upper port section44is connected either to any of the control port sections36of the control apparatus12, or to any of the lower port sections46included in a different relay apparatus16that is positioned nearer to the control apparatus12(i.e. positioned at the upper side) than this relay apparatus16. The upper port section44exchanges data with the control apparatus12or the relay apparatus16connected thereto.

Each lower port section46is connected either to the test module14, or to the upper port section44included in a different relay apparatus16that is positioned nearer to the test module(s)14(i.e. positioned at the lower side) than this relay apparatus16. Each lower port section46exchanges data with the test module14or the relay apparatus16connected thereto.

The relay processing section48receives, via the upper port section44, the packet transmitted from the control apparatus12to the test module14. The relay processing section48transmits the received packet from the lower port section46designated by the path information included in the packet to the lower side. The relay processing section48also receives, via any of the lower port sections46, a return packet from the test module14to the control apparatus12. The relay processing section48transmits the received return packet from the upper port section44to the upper side.

Each test module14includes a module port section52and a module processing section54. The module port section52is connected to any of the lower port sections46of a relay apparatus16, or to any of the control port sections36of the control apparatus12. The module port section52exchanges data with the relay apparatus16or the control apparatus12connected thereto.

The module processing section54receives, via the module port section52, the packet transmitted from the control apparatus12to the test module14. The module processing section54executes processing corresponding to the command included in the packet. When the command included in the packet is a read command, the module processing section54transmits a return packet including the processing result (i.e., read data) to either the control apparatus12or the relay apparatus16connected to the test module14via the module port section52.

Here, to each of the plurality of test modules14, module identification information for enabling the test apparatus10to identify the test module14in the test apparatus10has been set in advance. Each test module14stores in a register therein or the like, the module identification information set to the test module14.

In addition, to each lower port section46included in each one of the plurality of relay apparatuses16, port identification information for identifying the lower port section46in the relay apparatus16has been set in advance. Each relay apparatus16stores in a register therein or the like, the port identification information set to each lower port section46.

Moreover, to each control port section36in the control apparatus12, control port identification information for identifying the control port section36in the control apparatus12has been set in advance. The control apparatus12stores in a register therein or the like, the control port identification information set to each control port section36.

Each of the plurality of relay apparatuses16stores in a register therein or the like, connection order information designating a connection order of the relay apparatus16starting from the control apparatus12. In other words, each relay apparatus16may store in a register therein or the like, whether the relay apparatus16is directly connected to the control apparatus12, indicating that it is the first device (i.e., primary), or that the relay apparatus16is connected to the primary relay apparatus16, indicating that it is the second device (i.e., secondary).

FIG. 3shows an initialization flow of the test apparatus10according to the present embodiment. When the plurality of test modules14and the relay apparatuses16are connected to the control apparatus12, the test apparatus10performs the initialization ofFIG. 3in response to the instruction from a user or the like.

In the initialization, the transmission section34of the control apparatus12first transmits a packet including a path information read command, to the plurality of test modules14via the plurality of relay apparatuses16(S11). Here, the path information read command is a read command for recognizing the plurality of test modules14connected to the control apparatus12via the plurality of relay apparatuses16. For example, the transmission section34of the control apparatus12may broadcast the path information read command.

The module processing section54in each of the test modules14receives the packet including the path information read command transmitted from the control apparatus12(S12). Then each test module14generates a return packet including module identification information for identifying the test module14. Then each test module14returns the generated return packet to the relay apparatus16or the control apparatus12connected to the test module14(S13).

Each relay apparatus16receives the return packet from a different relay apparatus16or a test module14connected to any of the lower port sections46via the lower port section46(S14). Next, each relay apparatus16adds, to each return packet received by each of the lower port sections46, the port identification information of the lower port section46having received the return packet. Each relay apparatus16may further add, to each return packet received by each of the lower port sections46, connection order information representing the connection order of it from the control apparatus12in association with the added port identification information. Then each relay apparatus16transmits the packet to which the port identification information and the connection order information have been added, from the upper port section44to the relay apparatus16or the control apparatus12connected to the upper port section44(S15).

Next, the reception section38of the control apparatus12receives a return packet from the relay apparatus16or the test module14connected to the control port section36(S16). Next, the reception section38of the control apparatus12stores the port identification information and the connection order information included in each of the received return packets, together with the control port identification information of the control port section36having received the return packet (S17). Consequently, the reception section38can store, for each received return packet, the port identification information and the connection order information of each of the lower port sections46on the path from the test module14to the control apparatus12through which the return packet has passed, as well as the control port identification information.

Next, the reception section38of the control apparatus12identifies the test module14having transmitted each return packet based on the stored module identification information. Furthermore, the reception section38of the control apparatus12identifies the path information representing the path from the control apparatus12to the test module14having transmitted the return packet, based on the port identification information and the connection order information, as well as the control port identification information having stored in association with each received return packet (S18).

Next, the assigning section40of the control apparatus12assigns the logic number to each test module14, in response to reception of the return packet returned from the test module14according to the path information read command (S19). Here, the return packet is transmitted from all the test modules14of the test apparatus10, and so the assigning section40can assign the logic number to each of the plurality of test modules14. Next, the storage section32of the control apparatus12stores the path information based on the return packet from each test module14, in association with the logic number of the test module14(S20). When the path information and the logic numbers are stored in the storage section32for all of the plurality of test modules14of the test apparatus10, the control apparatus12is ready to access each of the test modules14.

The test apparatus10according to the present embodiment performs the initialization by reading the module identification information from each test module14as stated above. Accordingly, the test module10can perform the initialization easily.

FIG. 4shows a processing flow of issuing an access request to a test module14, which is performed by the test apparatus10according to the present embodiment. First, in response to reception of an access request to the test module14of the logic number designated by the CPU28, the transmission section34of the control apparatus12reads the path information associated with the logic number from the storage section32(S31).

Next, the transmission section34of the control apparatus12generates a packet including a command representing the contents of the access request, as well as including the read path information as a destination. Then, the transmission section34of the control apparatus12transmits the generated packet from the control port section36designated by the read path information, to the relay apparatus16or the test module14connected to the control apparatus12(S32).

Next, the relay apparatus16receives the packet including the command and the path information from the upper port section44. The relay apparatus16transmits the packet received via the upper port section44from the lower port section46designated by the path information included in the packet, to the test module14or a different relay apparatus16at the lower side (S33).

Next, the test module14receives the packet including the command and the path information, via the module port section52. The test module14performs the processing corresponding to the command included in the packet received via the module port section52(S34).

When having received a read command, the test module14returns a return packet including the processing result (read data) from the module port section52(S35). In this case, the test module14may add, to the return packet, the module identification information of the test module14.

Next, the relay apparatus16transmits, from the upper port section44, the return packet received via any of the lower port sections46(S36). In this case, the relay apparatus16may add, to the return packet, the port identification information of the lower port section46having received the return packet.

Next, the control apparatus12receives the return packet via any of the control port sections36. The control apparatus12then returns the processing result (read data) included in the received return packet to the CPU28as a response to the access request (S37).

As explained above, the test apparatus10according to the present embodiment stores the logic numbers respectively of the plurality of test modules14and the path information from the control apparatus12to each test module14. Therefore, the test apparatus10can transfer an access request to an access-target test module14, by simply reading the path information of the access-target test module14and sending the packet after incorporating thereto the path information as a destination. According to this configuration, There will be no need that the test apparatus10determine the test module14that is assigned the address range corresponding to the address designated by the address request.

FIG. 5shows an exemplary connection of the test apparatus10. For example, the test apparatus10includes a control apparatus12, first and second primary relay apparatuses16, first and second secondary relay apparatuses16, and first through tenth test modules14.

In this example, the control apparatus12includes first through fourth control port sections36. The tenth test module14is connected to the first control port section36. The first primary relay apparatus16is connected to the second control port section36. No device is connected to the third control port section36. The second primary relay apparatus16is connected to the fourth control port section36.

Also in this example, each relay apparatus16includes first through third lower port sections46. The third, second, and first test modules14are respectively connected to the first, second, and third lower port sections46of the first primary relay apparatus16.

The first secondary relay apparatus16is connected to the first lower port section46of the second primary relay apparatus16. The second secondary relay apparatus16is connected to the second lower port section46of the second primary relay apparatus16.

The sixth, fifth, and fourth test modules14are respectively connected to the first, second, and third lower port sections46of the first secondary relay apparatus16. The ninth, eighth, and seventh test modules14are respectively connected to the first, second, and third lower port sections46of the second secondary relay apparatus16.

The following explains the concrete processing taking an example of a test apparatus10having the stated configuration.

FIG. 6shows exemplary data obtained by the control apparatus12in association with each return packet transmitted by each test module14in response to a path information read command, regarding the test apparatus10ofFIG. 5.FIG. 7shows the contents of each bit field of the data shown inFIG. 6.

The control apparatus12obtains the data of 32 bits as shown inFIG. 6, in association with each return packet transmitted from each test module14in response to a path information read command.

The values from the first bit through the eighth bit of each piece of data shown inFIG. 6represent the control port identification information for identifying the control port section36having received the corresponding return packet. In addition, the values from the ninth bit through the sixteenth bit represent the port identification number for identifying the lower port section46of the primary relay apparatus16through which the corresponding return packet has passed. The values from the seventeenth bit through the twenty-fourth bit represent the port identification information for identifying the lower port section46of the secondary relay apparatus16through which the corresponding return packet has passed. The values from the twenty-fifth bit through the thirty-second bit represent the module identification information for identifying the test module14having transmitted the corresponding return packet.

Therefore, for example the ninth piece of data from the top ofFIG. 6has “04” as the first through the eighth bits, which means that the return packet corresponding to the data has been received by the fourth control port section36. In addition, the data has “02” as the ninth through the sixteenth bits, which means that the return packet corresponding to the data has passed the second lower port section46included in the primary relay apparatus16. In addition, the data has “01” as the seventeenth through twenty-fourth bits, which means that the return packet corresponding to the data has passed the first lower port section46included in the secondary relay apparatus16. Moreover, the data has “06” as the twenty-fifth through thirty-second bits, which means that the return packet corresponding to the data has been returned from the sixth test module14.

The control apparatus12obtains the explained data for each return packet as a result of transmitting a path information read command, and so can identify the module identification information and the path information for all the test modules14connected to the test apparatus10.

FIG. 8shows an example of path information and logic numbers stored in a storage section32. The control apparatus12identifies the types of all the test modules14connected to the test apparatus10, based on the module identification information added to each return packet transmitted from each test module14in response to a path information read command. Then the control apparatus12assigns a unique logic number to each of all the identified test modules14, so that the CPU28can access them. The control apparatus12also identifies the path information representing the transmission path of the packet from the control apparatus12to each test module14, based on the port identification information added to each return packet transmitted from each test module14in response to a path information read command as well as on the control port identification information indicating the control port section36having received each return packet.

The storage section32stores sets of logic numbers and path information for the test modules14connected to the test apparatus10, in association with each other. The storage section32may store, as path information, the value ofFIG. 6excluding the module identification information (i.e. the values of the twenty-fifth through thirty-second bits). The storage section32may store the sets of logic numbers and path information in the order of the logic numbers. Accordingly, when the CPU28attempts to issue an access request to a test module14by designating a logic number, the transmission section34can read, from the storage section32, the path information showing a destination to which the command to designate the access request.

Note that the storage section32may be provided in advance with a region for storing the sets of path information and the logic numbers in number (e.g. 64) corresponding to the number of the test modules14connectable to the test apparatus10. In addition, the storage section32may store a reset value stored in each storage region after being reset.

FIG. 9shows a processing flow which results when a CPU28in the test apparatus10shown inFIG. 5has issued an access request to a test module14.FIGS. 10throughFIG. 13show an exemplary packet transmitted as a result of the processing ofFIG. 9.

In Step S101, the CPU28writes the logic number of the test module14to be accessed, to the logic number designation register in the transmission section34, for example. Next in Step S102, the CPU28writes the offset value of the address to be accessed from the entry point of the test module14, to the address designation register in the transmission section34.

Next in Step S103, the CPU28accesses the register functioning, in the transmission section34, as a trigger to transmit the designated access request to the test module14. In this example, the CPU28performs a read access to the register functioning as a trigger to transmit a read command.

Next in Step S104, the transmission section34of the control apparatus12generates a packet including a code representing the contents of the command, the path information, and the offset value. In this case, the transmission section34reads the path information stored in association with the logic number written to the logic number designation register and incorporating the path information in the packet read from the storage section32. Then the transmission section34transmits the generated packet from the control port section36designated by the read path information.

For example, the transmission section34generates a packet as shown inFIG. 10. Specifically, the transmission section34generates a packet including, in the header portion (Command), a code (Code0=“0×24”) representing a read command (Normal Single Read24). Furthermore, the transmission section34generates a packet including, in the header portion, port identification information (Primarry Switch field=“0×02”) designating the second lower port section46through which the packet in the primary relay apparatus16is to be passed. Furthermore, the transmission section34generates a packet including, in the header portion, port identification information (Secondary Switch field=“0×01”) designating the first lower port section46through which the packet in the secondary relay apparatus16is to be passed. Still further, the transmission section34generates a packet including, in the address portion (A0-A2), an offset value (0×120) of the test module14to be accessed, from the entry. Then the transmission section34transmits the generated packet from the control port section36(the fourth control port section36in this example) designated by the read path information.

Next in Step S105, the primary relay apparatus16receives the packet from the control apparatus12, and transmits the received packet from the lower port section46identified by the path information. In this example, the second primary relay apparatus16receives the packet from the fourth control port section36of the control apparatus12. Then the second primary relay apparatus16transmits the received packet, from the second lower port section46described in the port identification information designating the lower port section46of the primary relay apparatus16through which the packet is to be passed.

Next in Step S106, the secondary relay apparatus16receives the packet from the primary relay apparatus16, and transmits the received packet from the lower port section46indicated in the path information. In this example, the first secondary relay apparatus16receives the packet from the second primary relay apparatus16. Then the first secondary relay apparatus16transmits the received packet, from the first lower port section46described in the port identification information designating the lower port section46of the secondary relay apparatus16through which the packet is to be passed.

Next in Step S107, the test module14receives the packet from the secondary relay apparatus16, and executes the operation designated by the code of the received packet. Then the test module14returns a return packet including the execution result (read data) to the secondary relay apparatus16. In this example, the sixth test module14receives the packet from the first secondary relay apparatus16, and reads the data from the address obtained by adding the offset value (0×120) to the entry point. Then the sixth test module14returns a return packet including the execution result (read data) to the first secondary relay apparatus16.

For example, the test module14generates a return packet as shown inFIG. 11. Specifically, the test module14generates a packet including, in the header portion (Command), a code (Code0=“0×25”) representing response data of a read command (Normal Single Read Data24). Furthermore, the test module14generates a packet including, in the address portion (A0-A2), an offset value (0×120) of the test module14to be accessed, from the entry. Still further, the test module14generates a return packet including, in the payload portion (D0-D3), the read data (0×12345678). Then the test module14transmits the return packet to the relay apparatus16connected to the test module14.

Next in Step S108, the secondary relay apparatus16receives the return packet from the test module14, and adds, to the received return packet, the port identification information of the lower port section46having received the return packet. Then the secondary relay apparatus16transmits the return packet to which the port identification information has been added, from the upper port section44to the primary relay apparatus16. In this example, as shown inFIG. 12, the first secondary relay apparatus16describes the port identification number (0×01) of the first lower port section46, to the region (Secondary Switch field), in the received return packet, to which the port identification information designating the lower port section46of the secondary relay apparatus16is described.

Next in Step S109, the primary relay apparatus16receives the return packet from the secondary relay apparatus16, and adds, to the received return packet, the port identification information of the lower port section46having received the return packet. Then the primary relay apparatus16transmits the return packet to which the port identification information has been added, from the upper port section44to the control apparatus12. In this example, as shown inFIG. 13, the second primary relay apparatus16describes the port identification number (0×02) of the second lower port section46, to the region (Primarry Switch field), in the received return packet, to which the port identification information designating the lower port section46of the primary relay apparatus16is described.

Next in Step S110, the reception section38of the control apparatus12receives the return packet from the primary relay apparatus16. Then the reception section38of the control apparatus12returns the execution result (read data=0×12345678) included in the received return packet, to the access from the CPU28that has been in wait in the “retry” for example.

As described above, the test apparatus10can easily transmit an access request to the designated test module14, based on the path information stored by the control apparatus12in the initialization.

FIG. 14shows functional blocks of a control apparatus12, a test module14, and a relay apparatus16according to a modification example of the present embodiment. The test apparatus10in this modification example has substantially the same configuration and function as those of the test apparatus10according to the present embodiment, and so substantially the same configuration and function are assigned the same reference numerals as those of the test apparatus10of the present embodiment, and the following does not provide the explanation of them except for the differences.

The communication section30included in the control apparatus12of this modification example further includes a reception determining section62and a return value generating section64. When a broadcast read has been transmitted to the test modules14, the reception determining section62determines whether the return packets have been received from each of the test modules14. When the reception determining section62has determined that the return packets have been received from all the test modules14, the return value generating section64generates a return value based on the return data from the test modules14.

Furthermore in this modification example, when the association between the logic numbers and the path information has been initialized, the storage section32associates the logic numbers to the respective lower port sections46in the relay apparatus16connected to the control apparatus12, and stores the path information indicating that the broadcast read should be transmitted from these lower port sections46to a lower side.

In case of issuing a broadcast read for reading data in parallel from the plurality of test modules14by a single command issuance, the test apparatus10according to this modification example operates as follows. Specifically, in response to a request from the CPU28to perform a broadcast read, the transmission section34of the control apparatus12reads path information indicating that the broadcast read should be transmitted form the storage section32.

Next, the transmission section34generates a packet including a command representing the broadcast read, as well as including the read path information as a destination. Then, the transmission section34of the control apparatus12transmits the generated packet from each of at least one control port section36(e.g., all the control port sections36) designated by the path information, to the lower side.

The plurality of test modules14receive the packet including the command representing the broadcast read. Each of the plurality of test modules14having received this packet performs a read operation corresponding to the received command, and returns a return packet including the processing result (read data) to the control apparatus12.

The reception determining section62determines whether the return packets have been received from all the plurality of test modules14to which the broadcast read has been transmitted. When the reception determining section62has determined that the return packets have been received from all the plurality of test modules14, the return value generating section64generates a return value based on the return data from the plurality of test modules14, and returns the generated return value to the CPU28.

For example, the return value generating section64may generate a bitmap in which the pieces of return data of the plurality of test modules14are arranged. In another example, the return value generating section64may calculate, as the return value, AND, inverted AND, logical OR, or NOR of the return data from the plurality of test modules14.

As explained above, the test apparatus10according to this modification example can easily perform the processing corresponding to a broadcast read.

For example, the present invention is not limited to a test apparatus10, and can also be a system transmitting general-purpose data. In other words, the technology described in the above embodiments may be applied to a system including a control apparatus, a plurality of modules, and a plurality of relay apparatuses connecting the control apparatus and the plurality of modules. In this case, the control apparatus of the system is provided with a communication processing function that is similar to that of the control apparatus12of the present embodiment, the modules of the system are provided with a communication processing function that is similar to that of the test modules14of the present embodiment, and the relay apparatuses of the system are provided with a communication function that is similar to that of the relay apparatuses16of the present embodiment.