Modulating supply voltage generated by voltage regulator for transmission of data and power

An apparatus for generating an output voltage including a microcontroller unit (MCU) configured to selectively generate a data modulating signal; and a voltage regulator configured to generate an output voltage modulated based on the data modulating signal. Another aspect relates to a method of generating an output voltage comprising selectively generating a data modulating signal; and bucking and boosting an output voltage based on the data modulating signal. An additional aspect relates to an apparatus for generating an output voltage comprising means to selectively generate a data modulating signal, and means for bucking and boosting an output voltage based on the data modulating signal.

FIELD

Aspects of the present disclosure relate generally to the transmission of data and power, and in particular, to a system and method of modulating a supply voltage generated by a voltage regulator suitably enabled by design for transmission of data and power from a first device to a second device.

DESCRIPTION OF RELATED ART

In some applications, a first device provides power, such as a direct current (DC) voltage, to a second device, and also provides data to the second device. As an example, a charger provides power to a pair of earbuds for charging their respective batteries. The charger also provides data to the earbuds, as well as receive data from the earbuds. For example, the charger may send a message inquiring about the current charge level or state of the batteries, and the earbuds sending response messages back to the charger indicating the current charge level or state of the batteries.

SUMMARY

An aspect of the disclosure relates to an apparatus including a battery charger configured to charge a battery in an audio device and data communicate with the audio device, wherein the battery charger comprises: a microcontroller unit (MCU) configured to selectively generate a data modulating signal; and a voltage regulator configured to generate an output voltage modulated based on the data modulating signal, wherein the output voltage is used to charge the battery and data communicate with the audio device.

Another aspect of the disclosure relates to a method including selectively generating a data modulating signal; bucking and boosting an output voltage based on the data modulating signal; charging a battery in an audio device using the output voltage; and data communicating with the audio device using the output voltage.

Another aspect of the disclosure relates to an apparatus including means for selectively generate a data modulating signal; means for bucking and boosting an output voltage based on the data modulating signal; means for charging a battery in an audio device using the output voltage; and means for data communicating with the audio device using the output voltage.

Another aspect of the disclosure relates to a system including a charger having a connector configured to receive external power, a first microcontroller unit (MCU) configured to selectively generate a data modulating signal, and a voltage regulator configured to generate an output voltage based on the external power and the data modulating signal; and an audio device, including a battery configured to be charged based on the output voltage; and a second MCU configured to extract data based on the output voltage.

DETAILED DESCRIPTION

FIG.1illustrates a block diagram of an exemplary power and data communication system100in accordance with an aspect of the disclosure. The power and data communication system100includes a host device110and a client device150. In this example, the host device110is configured as a charger for audio earbuds, and the client device150is configured as an audio earbud. It shall be understood that the system100may include two audio earbuds for left- and right-ears, although one is shown for ease of explanation purposes.

The host device110may be any device that provides power (e.g., direct current (DC) supply voltage) to the client device150for charging a battery, and data for communicating with the client device150. Further, in accordance with this example, the client device150may provide data to the host device110. The host device (charger)110is just one example, and may be configured differently depending on its implemented features. Similarly, the client device (earbud)150is just one example, and may be configured differently depending on its implemented features.

The host device110includes a connector112(e.g., a Universal Serial Bus (USB) connector) configured to receive external power (e.g., a USB supply voltage +V0) from and exchange data with a device to which the connector112attaches (e.g., a computer, a power outlet adapter, etc.). The host device110further includes a battery charger114and a battery116(e.g., a lithium-ion battery). The battery charger114is configured to use the supply voltage +V0from the connector112to provide power or charge the battery116. The battery charger114or battery116is also configured to generate a supply voltage +V2for other components described herein.

The host device110further includes a low dropout (LDO) voltage regulator118configured to generate a supply voltage +V3based on the voltage +V0received from the connector112. The supply voltage +V3may be suitable for certain circuits (e.g., USB data communication circuits) within a microcontroller unit (MCU)120. The MCU120may be any type of processor, microprocessor, other programmable hardware, etc. The host device110further includes a DC-DC buck voltage regulator117configured to generate another supply voltage +V4based on the supply voltage +V2from the battery charger114or battery116. The supply voltage +V4may be suitable for other circuits (e.g., input/output (I/O) circuits) within the MCU120.

The MCU120may communicate with the battery charger114via an interrupt request (IRQ) communication line and an inter-integrated circuit (I2C) communication line. For example, the battery charger114may inform the MCU120that the battery116is fully charged via the IRQ communication line. And, in response, the MCU120may instruct the battery charger114to cease charging the battery116via the I2C communication line to conserve power.

The host device110includes a left (L) earbud detector126and a right (R) earbud detector128configured to detect whether the left and right earbuds (client devices) are connected to the host device110for reception of DC power and exchange of data. As the L-earbud detector126and R-earbud detector128are I/O devices, these devices receive the supply voltage +V4generated by the DC-DC buck voltage regulator117. The L-earbud detector126and R-earbud detector128provide detection signals to the MCU120to configure the host device110in a relatively low power consumption mode (e.g., disabling a regulator for providing power to the earbuds) if the earbuds are not detected, and in a relatively high-power consumption (e.g., enabling the regulator for providing power to the earbuds) if the earbuds are detected.

The host device110further includes a lid open detector124configured to detect whether a lid to a compartment that is configured to house the left and right earbuds is opened. A detection signal from the lid open detector124is provided to the MCU120. This may be done to implement a fast pairing between the earbuds and an audio device (not shown). For example, if the lid is opened, the MCU120sends a command to the earbuds to pair with an audio device via Bluetooth communication with a nearby audio device (e.g., a smart phone, etc.). The host device110further includes a Bluetooth (BT) pairing detector122(represented as a switch) to provide a signal to the MCU120to indicate that the earbuds are paired with the audio device. As the lid open detector124and BT pairing detector122are I/O devices, these devices receive the supply voltage +V4generated by the DC-DC buck voltage regulator117.

The host device110further includes a DC-DC boost voltage regulator130configured to generate a regulated supply voltage +V5from the supply voltage +V2generated by the battery charger114or battery116. The supply voltage +V5provides power to the client device150(e.g., earbuds) via a pair of output pins and supply lines: one for +V5and the other for ground (GND). The MCU120is configured to communicate with the DC-DC boost voltage regulator130via a general-purpose input/output (GPIO) communication line. Thus, if the MCU120determines that the earbuds are not connected via the detection signals form the L-earbud detector126and R-earbud detector128or the batteries in the earbuds are fully charged, the MCU120disables the DC-DC boost voltage regulator130via the GPIO line to conserve power. Otherwise, the MCU120enables the DC-DC boost voltage regulator130via the GPIO communication line.

The MCU120is coupled to a data output pin configured to provide data or messages to the client device150. The MCU120is also coupled to a data input pin configured to receive data or messages from the client device150. As, in this example, the host device110is a charger and the client device150is an earbud or pair of earbuds, the host device110may send data or messages to the client device150via the data out pin to inquire about the charge state of its battery (e.g., fully charged or not), and the client device150may provide data or messages to the host device110via the data in pin responding to the inquiry (e.g., battery fully charged or not). If, for example, the client device150indicates that its battery is fully charged, the MCU120may disable the DC-DC boost voltage regulator130via the GPIO communication line to conserve power; otherwise, the MCU120may maintain the regulator130enabled via the GPIO line. Depending on the nature of the host device110and client device150, the messages exchanged between the devices may be different.

The client device150includes a battery charger152and a battery154(e.g., a lithium-ion battery). When the client device150is connected to the host device110, the battery charger152receives the supply voltage +V5and GND connection via a pair of pins and supply lines that connect to the corresponding +V5and GND pins of the host device110. The battery charger152is configured to use the supply voltage +V5to provide power to or charge the battery154. The battery154generates a supply voltage +V6for other components described herein.

The client device150also includes a microcontroller unit (MCU)158(e.g., processor, microprocessor, any other type of programmable device, etc.) that communicates with the battery charger152via an I2C line and an IRQ line. The MCU158is coupled to a data in pin to receive data from the host device110, and is also coupled to a data output pin to provide data to the host device110, as previously discussed. As an example, if the MCU158receives a message from the MCU120, via the host data out pin and client data in pin, inquiring about the charge state of the battery154, the MCU158may send a message to the battery charger152via the IRQ line concerning the inquiry, and the battery charger152may provide its response to the MCU158via the I2C line. The MCU158, in turn, may forward the response to the MCU120of the host device110via the client data out pin and the host data in pin.

The client device150further includes a DC-DC buck voltage regulator156configured to generate a supply voltage +V7for the MCU158from the battery voltage +V6generated by the battery154. The client device150further includes a Bluetooth device160for pairing and communicating with an audio device (not shown), as previously discussed. The Bluetooth device160also receives the battery voltage +V6. The Bluetooth device160communicates with the MCU158via I2C and IRQ communication lines. The client device150may also include an in-ear detector164configured to detect whether the earbud is inside an ear, and an accelerometer162configured to detect movement of the earbud or indirect movement of a user's head. The in-ear detector164communicates with the MCU158via an IRQ communication line, and the accelerometer162communicates with the MCU158via IRQ and I2C communication lines.

A drawback of the power and data communication system100is that the host device110and client device150have separate pins for communicating data and power. For example, each of the devices110and150have two pins for exchanging data between each other. Each of these devices110and150also have two pins for the host device110to supply power to the client device150. These pins add significant product costs to the devices110and150, and also occupies significant circuit real estate. One solution to reduce the number of pins electrically connecting the host device110to client device150is to transmit data using the pins and supply lines for transmitting power from a host device to a client device.

FIG.2illustrates a block diagram of another exemplary power and data communication system200in accordance with another aspect of the disclosure. The power and data communication system200is similar to that of power and data communication system100, and includes many of the same elements as indicated by similar reference numbers with the most significant digit (MSD) being a “2” in the case of system200in contrast to a “1” in the case of system100. These same or similar elements have been described in detail above; and thus, no further detail explanation of these elements is provided below with reference to power and data communication system200.

The power and data communication system200differs from power and data communication system100in that it includes the same pair of pins and supply lines to communicate power and data from the host device210to the client device250(as well as data from the client device250to the host device210), and includes additional components to effectuate such dual purposes for the pins and supply lines. In this example, the host device210injects a data signal onto the supply voltage pin/line to transmit data to the client device250. Similarly, the client device250injects a data signal onto the supply voltage pin/line to transmit data to the host device210.

More specifically, the host device210further includes a host-side line reader232, a host-side data modulator234, a host-side data signal blocking inductor LH, and a host-side dampening resistor RH. The host-side line reader232is configured to extract the data, coming from the client device250, from a data signal on the voltage supply pin/line, and provide the data to the MCU220. The host-side data modulator234is configured to inject or provide a data signal onto the voltage supply pin/line based on data from the MCU220for transmission to the client device250. The host-side inductor LHsubstantially blocks or isolates the data signal on the voltage supply pin/line from an alternating current (AC) decoupling capacitor CHat an output of the DC-DC boost voltage regulator230, which would otherwise decouple the data signal from the voltage supply pin/line. The host-side resistor RH, coupled across the inductor LH, is configured to reduce signal reflections and electromagnetic emissions resulting from high-frequency harmonics and self-resonance effects of the inductor LH.

The client device250further includes a clock extractor272, a client-side line reader274, a client-side data modulator276, a startup synchronization detector278, a client-side data signal blocking inductor LC, and a client-side dampening resistor RC. The clock extractor272may employ a clock and data recovery (CDR) circuit to extract a clock from the data signal on the voltage supply pin/line; the clock is provided to the MCU258for clocking in data. The client-side line reader274is configured to extract the data from the data signal, coming from the host device210, from the voltage supply pin/line, and provide the data to the MCU258. The client-side data modulator276is configured to inject or provide a data signal onto the voltage supply pin/line based on data from the MCU258for transmission to the host device210. The client-side inductor LCblocks or isolates the data signal on the voltage supply pin/line from an AC decoupling capacitor Cc at an input of the battery charger252, which would otherwise decouple the data signal from the voltage supply pin/line. The client-side resistor RC, coupled across the inductor LC, is configured to reduce signal reflections and electromagnetic emissions resulting from high-frequency harmonics and self-resonance effects of the inductor LC.

Although, in the power and data communication system200, the number of pins connecting the host device210to the client device250for transmission of power from the host device210to the client device250and exchange of data between these devices, have been reduced to two (2) as compared to that of power and data communication system100, the number of components needed to do so in system200is numerous. As discussed, these additional components include the line reader232, data modulator234, inductor LH, and resistor RHin the host device210, and the clock extractor272, line reader274, data modulator276, startup synchronization detector278, inductor LC, and resistor RCin the client device250. These additional components significantly increase the product costs of the system200, as well as occupies substantial circuit real estate to implement. Also, the additional inductors LHand LCmay be a source of electromagnetic interference, which may make it difficult for these devices210and250to comply with electromagnetic compatibility (EMC) regulations.

FIG.3illustrates a block diagram of yet another exemplary power and data communication system300in accordance with an aspect of the disclosure. In summary, the power and data communication system300implements data transmission over power supply lines or pins between host- and client-devices without significant additional components and circuit real estate. Additionally, the power and data communication system300need not have data signal blocking inductors, which may be a source of unwanted electromagnetic emissions.

Further, the power and data communication system300implements the data transmission over the power lines by substituting the DC-DC boost voltage regulator230of system200with a buck-boost voltage regulator, and controlling the buck-boost voltage regulator to generate a regulated output voltage modulated with a data signal for transmission to the client-side. With regard to data transmission from the client-side to the host-side, the power and data communication system300may include a sense resistor with a current sense amplifier to detect current modulation effectuated by the client-side on the power supply line. Although a buck-boost voltage regulator is used herein to exemplify the power and data transmission concept, it shall be understood that other types of voltage regulators, switched-mode power supplies (SMPS), DC-DC power converters, charge pumps, etc., may be configured to perform the power and data transmission operation.

More specifically, the power and data communication system300includes a host-side buck-boost voltage regulator310, a capacitor CREGcoupled across positive and negative supply lines340+ and340− at the output of the regulator310, a microcontroller unit (MCU)320, a sense resistor RSENSE, and a current sense amplifier330. The MCU320selectively generates a data or voltage modulating signal for controlling the buck-boost voltage regulator310to generate a regulated output voltage VOthat is modulated or varies with the data or voltage modulating signal. As the buck-boost voltage regulator310may be operated in a buck mode to actively reduce the output voltage VOby discharging the capacitor CREG, and in a boost mode to actively increase the output voltage VOby charging the capacitor CREG, the buck-boost voltage regulator310is able to counter the AC decoupling effects of the capacitor CREGand a load capacitor CLOADat the client-side to move the output voltage VOup and down at a sufficient data rate to effectuate data transmission via the power lines340+/340−. Thus, the buck-boost voltage regulator310is able to send data to the client-side via the data or voltage modulating signal generated by the MCU320.

As depicted inFIG.3, the data modulation of the regulated output voltage VOmay be a positive modulation or a negative modulation, or combination thereof. In the positive modulation scheme, the regulated output voltage VOis varied between a normal voltage level Vnormand a higher modulated voltage level Vmodin accordance with the data to be transmitted. The normal voltage level Vnormis a substantially fixed DC voltage required by a battery charger on the client side in order to charge a corresponding battery. Thus, when no data is being transmitted to the client side (the regulator310is not receiving the data modulation signal), the regulated output voltage VOof the buck-boost voltage regulator310is at substantially the normal voltage level Vnorm. In the negative modulation scheme, the regulated output voltage VOis varied between the normal voltage level Vnormand a lower modulated voltage level Vmodin accordance with the data to be transmitted. The client-side, for example, the earbud350, may include circuitry (e.g., a comparator, an analog-to-digital converter (ADC), etc.) to detect the positive or negative voltage modulation of the regulated output voltage VOof the regulator310in order to extract the data from the power lines340+/340.

To effectuate the transmission of data from the client side to the host side, the client device or earbud350may dynamically vary its supply load in accordance with the data to be transmitted to effectuate current modulation (I-MOD) upon the power lines340+ and340−. The sense resistor RSENSE, connected in series along the negative power line340−, is configured to convert the current modulation (I-MOD) into a corresponding voltage signal. The current sense amplifier330is configured to receive the corresponding voltage signal and produce an amplified voltage signal representing the current-modulated data from the client side to the MCU320.

Thus, the solution provided by the power and data communication system300requires little modification to the host device110and the client device150of system100. For example, the DC-DC boost voltage regulator130may be replaced with the buck-boost voltage regulator310. The data out signal from the MCU120may be provided to the buck-boost voltage regulator310to modulate its regulated output voltage VO. And, a sense resistor RSENSEand current sense amplifier330may be provided on the return power line to demodulate the current modulation signal and provide the data to the MCU120. On the client device150, circuitry may be provided to demodulate the data-modulated regulated output voltage VOof the buck-boost voltage regulator310, and other circuitry may be provided to vary its load with data in order to produce the current modulation signal for transmission of data to the host device110.

FIG.4illustrates a schematic view of an exemplary buck-boost voltage regulator400configured to generate a regulated output voltage VOmodulated with a data signal in accordance with another aspect of the disclosure. The buck-boost voltage regulator400includes four (4) switching devices M1-M4, a regulation inductor LREG, an error amplifier410, and a controller420. The buck-boost voltage regulator400receives an input voltage VBATTfrom a battery or a battery charger (e.g., +V2of systems100and200), and generates a regulated output voltage VOacross a resistive and capacitive load, represented as resistor RLOADcoupled in parallel with capacitor CLOAD.

Each of the switching devices M1and M2may be configured as a p-channel metal oxide semiconductor (PMOS) field effect transistor (FET) or PMOS FET. Each of the switching devices M3and M4may be configured as an n-channel metal oxide semiconductor (NMOS) FET or NMOS FET. The PMOS FET M1includes a source coupled to a positive side of the battery or supply and a gate configured to receive a control signal S1. The NMOS FET M3includes a drain coupled to a drain of the PMOS FET M1, a source coupled to a negative side of the battery or supply, and a gate configured to receive a control signal S3. A first terminal of the regulation inductor LREGis coupled to the drain of PMOS FET M1(also to the drain of NMOS FET M3).

The NMOS FET M4includes a drain coupled to a second terminal of the regulation inductor LREG, a source coupled to the negative side of the battery or supply, and a gate configured to receive a control signal S4. The PMOS FET M2includes a drain coupled to the second terminal of the regulation inductor LREG(also to the drain of NMOS FET M4), a source coupled to a positive side of the load (RLOAD∥CLOAD), and a gate configured to receive a control signal S2. The negative side of the load is coupled to the negative side of the battery or supply.

The error amplifier410includes a first (e.g., positive) input configured to receive a feedback voltage VFB, which may be modulated with a data signal for transmission from a host device to a client device. The error amplifier410further includes a second (e.g., negative) input configured to receive a substantially constant reference voltage VREF. The error amplifier410includes an output configured to produce an error voltage VERRbased on a difference between the feedback voltage VFBand the reference voltage VREF. The controller420is configured to generate the control signals S1-S4for the gates of the switching devices M1-M4based on the error voltage VERR, respectively. The control signals S1-S4control the on/off (closed/open) states of the switching devices M1-M4, respectively.

As discussed, the buck-boost voltage regulator400may be operated in the buck (continuous conduction) mode when the regulated output voltage VOis to be reduced by discharging the capacitive load CLOAD. In the buck mode, the buck-boost voltage regulator400reduces the output voltage VOin order to maintain the feedback voltage VFBsubstantially equal to the reference voltage VREF(in other words, to maintain the error voltage VERRsubstantially zero (0) Volt). As summarized in the operation table inFIG.4, in buck mode, the controller420generates the control signals S1-S4to turn on switching devices M1and M2and turn off switching devices M3and M4during a charging (of the inductor LREG) phase; and turn on switching devices M2and M3and turn off switching devices M1and M4during a discharging (of the inductor LREG) phase. The controller420performs the switching between the charging and discharging phases at high frequencies (e.g., 2.5 Mega Hertz (MHz)). In the buck mode, the output voltage VOis less than the input voltage Vbatt, and may be given by VO=D*Vbatt, where D is the duty cycle defined as the time interval of the charging phase over the time interval of both the charging and discharging phases.

Also, as discussed, the buck-boost voltage regulator400may be operated in the boost (continuous conduction) mode when the regulated output voltage VOis to be increased by charging the capacitive load CLOAD. In the boost mode, the buck-boost voltage regulator400increases the output voltage VOin order to maintain the feedback voltage VFBsubstantially equal to the reference voltage VREF(in other words, to maintain the error voltage VERRsubstantially zero (0) Volt). As summarized in the operation table inFIG.4, in boost mode, the controller420generates the control signals S1-S4to turn on switching devices M1and M4and turn off switching devices M2and M3during a charging (of the inductor LREG) phase; and turn on switching devices M1-M2and turn off switching devices M3-M4during a discharging (of the inductor LREG) phase. During the inductor ‘discharge’ cycle, the positive-going back-EMF from the loaded end of the inductor LREGappears in series with the incoming supply by sustaining a supply circuit through M1and M2only. Similarly, the controller420performs the switching between the charging and discharging phases at high frequencies (e.g., 2.5 MHz). In the boost mode, the output voltage VOis greater than the input voltage Vbatt, and may be given by VO=Vbatt*(1/(1−D)), where D is the duty cycle defined as the time interval of the charging phase over the time interval of both the charging and discharging phases.

Thus, with reference to the positive modulation timing diagram inFIG.3, when there is no data being transmitted to the client device, the controller420in conjunction with the error amplifier410operate the switching devices M1-M4via the control signals S1-S4to regulate the output voltage VOto be substantially at Vnorm(e.g., nominally switching between boost and buck mode). As discussed, Vnormis the voltage required by a battery charger to charge a battery at the client device (i.e., the voltage for supply power to the client device). When data is to be provided to the client device, the controller420in conjunction with the error amplifier410operate the switching devices M1-M4via the control signals S1-S4to aggressively operate in boost mode to increase the output voltage VOto Vmodif a high logic data level is transmitted, and aggressively operate in buck mode to decrease the output voltage VOto Vnormif a low logic data level is transmitted.

Similarly, with reference to the negative modulation timing diagram inFIG.3, when there is no data being transmitted to the client device, the controller420in conjunction with the error amplifier410operate the switching devices M1-M4via the control signals S1-S4to regulate the output voltage VOto be substantially at Vnorm(e.g., nominally switching between boost and buck mode). Again, Vnormis the voltage required by a battery charger to charge a battery at the client device (i.e., the voltage for supply power to the client device). When data is to be provided to the client device, the controller420in conjunction with the error amplifier410operate the switching devices M1-M4via the control signals S1-S4to aggressively operate in buck mode to decrease the output voltage VOto Vmodif a low logic data level is transmitted, and aggressively operate in boost mode to increase the output voltage VOto Vnormif a high logic data level is transmitted.

FIG.5illustrates a schematic view of an exemplary power and data communication apparatus500configured to generate a regulated output voltage VOmodulated with a data signal in accordance with another aspect of the disclosure. The power and data communication apparatus500may be an exemplary more detailed implementation of how to operate an “off-the-shelf” buck-boost voltage regulator to produce a regulated output voltage including a DC voltage level needed by a client device for power purposes (e.g., charging a battery) and modulated with a data signal for transmission of data to the client device.

More specifically, the power and data communication apparatus500includes a buck-boost voltage regulator510, which may be an “off-the-shelf” integrated circuit (IC) or a specifically designed IC for this particular application. The buck-boost voltage regulator IC510includes a set of pins1-6. A regulation inductor LREGis coupled at both ends to pins1and4of the IC510, respectively. Pin2of the IC510is configured to receive an input voltage VIN, such as a battery or charger voltage (e.g., +V2of systems100and200). Pin3of the IC510is configured to receive a mode signal indicative of whether the buck-boost voltage regulator510is to be operated in pulse frequency modulation (PFM) mode or pulse width modulation (PWM) mode. The buck-boost voltage regulator510may be operated in PWM mode for optimal transient performance when data is to be transmitted to the client device, and in PFM mode for optimal power efficiency when no data (only power) is to be transmitted to the client device. Pin5of the IC510is the output of the buck-boost voltage regulator510, where the regulated output voltage VOis generated. And, pin6of the IC510is configured to receive a feedback voltage VF, which may be generated by a feedback network520by voltage dividing the output voltage VO.

The feedback network520includes resistors R1, R2and R5coupled in series between the output (pin5) of the buck-boost voltage regulator510and ground. The feedback voltage VFBis generated at a node between resistors R1and R2, and is provided to pin6of the IC510. In accordance with possible manufacturer's requirements for regulator510, a capacitor C2may be coupled between pin6of the IC510and ground to reduce noise in and stabilize the feedback voltage VFB. The feedback network520further includes a resistor R3coupled between the output (pin5) of the buck-boost voltage regulator510and a pin of a microcontroller unit (MCU)530. Additionally, the feedback network520includes a resistor R4coupled between a node between resistors R2and R5and the pin of the MCU530. A capacitor C1is coupled between the output (pin5) of the buck-boost voltage regulator510and ground, and serves as the regulator output capacitor for sustaining the output voltage VOduring switching.

Via its pin coupled to the feedback network520, the MCU530affects or configures the feedback network520to modulate the output voltage VOof the buck-boost voltage regulator510with data. The operation will be discussed with reference to negative modulation, where the highest output voltage VOgenerated is the normal voltage level Vnormrequired by the client device for power purposes (e.g., charging a battery). When no data is being transmitted to the client device, the buck-boost voltage regulator510regulates the output voltage VOto be substantially at Vnorm. When the MCU530affects or configures the feedback network520to modulate the output voltage VOwith data, the MCU530may cause the buck-boost voltage regulator510to set the output voltage VOto Vnormif a high logic voltage level is desired, to set the output voltage VOto a Vmodif a logic voltage level is desired, and to set the output voltage VOto a voltage lower than Vmod(e.g., sub-Vmod) if a special operation is desired (e.g., initiating or waking-up the client device). Thus, the buck-boost voltage regulator510varies the output voltage VObetween Vnorm, Vmod, and sub-Vmodin accordance with the data. The following provides a description of the configurations of the feedback network520to achieve the three different output voltage levels.

FIG.6Aillustrates a schematic diagram of the feedback network520when configured to produce the highest output voltage VO(e.g., at Vnorm). In this configuration, the MCU530configures its pin to present ground potential to the feedback network520. The ground potential at the MCU pin causes a current IDATAto flow from the node between R2and R5through resistor R4into the MCU pin, in addition to incidental current IR3from the output (pin5) through resistor R3into the MCU pin. There is also a feedback current IFBflowing through resistor R5towards ground. Accordingly, the current flowing through resistor R1is the sum of the feedback current IFBand the IDATA. As the buck-boost voltage regulator510regulates the output voltage VOto maintain the feedback voltage VFBsubstantially equal to an internal reference voltage VREF, the output voltage VOmay be given by the following equation:
VO=R1*(IFB+IDATA)+VFBEq. 1

As discussed, in negative modulation, Eq. 1 is used to determine the level of the output voltage VOfor Vnorm.

FIG.6Billustrates a schematic diagram of the feedback network520when configured to produce a lower output voltage VO(e.g., at Vmod). In this configuration, the MCU530tri-states its pin to present a relatively high impedance or a floating pin to the feedback network520. The floating MCU pin causes a current IDATAto flow from the output (pin5) of the buck-boost voltage regulator510via the resistors R3and R4into the node between R2and R5. As discussed, there is a feedback current IFBflowing through resistor R5towards ground. Accordingly, the current flowing through resistor R1is the difference between the feedback current IFBand the IDATA. As the buck-boost voltage regulator510regulates the output voltage VOto maintain the feedback voltage VFB substantially equal to an internal reference voltage VREF, the output voltage VOmay be given by the following equation:
VO=R1*(IFB−IDATA)+VFBEq. 2

Comparing Eq. 2 with Eq. 1, it can be seen that the output voltage VOin the Vmodconfiguration is less than the output voltage VOin the Vnormconfiguration because the output voltage VOis a function of the difference in the currents IFBand IDATAin Eq. 2, and a function of the sum of the current IFBand IDATAin Eq. 1.

FIG.6Cillustrates a schematic diagram of the feedback network520when configured to produce the lowest output voltage V0(e.g., at sub-Vmod). In this configuration, the MCU530sets its pin to a high voltage +V, e.g., higher than the voltage at the node between resistors R2and R5. The high voltage at the MCU pin causes another current IDATA2, in addition to a current IDATA1flowing through resistor R3, to flow into the node between R2and R5. As discussed, there is a feedback current TFBflowing through resistor R5towards ground. Accordingly, the current flowing through resistor R1is the difference between the feedback current IFBand the sum of currents IDATA1and IDATA2. As the buck-boost voltage regulator510regulates the output voltage VOto maintain the feedback voltage VFBsubstantially equal to an internal reference voltage VREF, the output voltage VOmay be given by the following equation:
VO=R1*(IFB−(IDATA1+IDATA2))+VFBEq. 3
Comparing Eq. 3 with Eq. 2, it can be seen that the output voltage VOin the sub-Vmodconfiguration is less than the output voltage VOin the Vmodconfiguration because the output voltage VOis a function of the difference in the current IFBand the sum of the currents IDATA1and IDATA2in Eq. 3, and a function of the difference between the currents IFBand IDATAin Eq. 2.

The exemplary implementation described herein features a resistor feedback network to simply modulate a boost-buck voltage regulator from a microcontroller. However, it would be possible to alternatively modulate the reference voltage of a voltage regulator if such mechanism is afforded by the chosen voltage regulator.

FIG.7Aillustrates a schematic diagram of another exemplary power and data communication apparatus700in accordance with another aspect of the disclosure. In the power and data communication apparatus500, the MCU530applied three (3) different inputs (e.g., GND, Float, and +V), via a single pin, to the feedback network520to cause the voltage regulator510to generate three different voltage levels for the output voltage VO. In power and data communication apparatus700, an MCU includes more than one pin (e.g., two pins) to which an MCU may apply different inputs to a feedback network. This results in the MCU causing the voltage regulator to generate more than (3) voltage levels for the output voltage VO, as discussed in more detail herein.

More specifically, the power and data communication apparatus700includes a buck-boost voltage regulator705similar to buck-boost voltage regulator510previously discussed (e.g., including pins1and4across which an inductor LREGmay be coupled, a pin2to receive an input voltage VIN, a pin3configured to receive a mode signal indicative of a pulse frequency modulation (PFM) mode or pulse width modulation (PWM) mode, a pin5at which the buck-boost voltage regulator705generates the output voltage VO, and a pin6to receive a feedback voltage VFB related to the output voltage VOvia a feedback network710).

The feedback network710, in turn, includes resistors R1, R2, and R5coupled in series between the output (pin5) of the buck-boost voltage regulator705and ground. A first capacitor C1is also coupled between the output (pin5) of the buck-boost voltage regulator705and ground. Pin6of the buck-boost voltage regulator705is coupled to a node between resistors R1and R2. A second capacitor C2is coupled between pin6and ground. The feedback network710further includes a resistor R3coupled between the output (pin5) of the buck-boost voltage regulator705and a first pin A of the MCU715. Similarly, the feedback network710includes a resistor R4coupled between a node between resistors R2and R5and the first pin A of the MCU715. Additionally, the feedback network710includes a resistor R6coupled between the first pin A and a second pin B of the MCU715.

By having two pins A and B to couple to the feedback network710, the MCU715is able to generate different relationships between the feedback voltage VFB and the output voltage VOsuch that, for example, more than three (3) voltages levels for the output voltage VOmay be achieved. A truth table also depicted inFIG.7Ashows nine (9) different voltage levels VO1to VO9for the output voltage VOthat may be achieved by the MCU715apply different combinations of ground, float, and voltage (VAor VB) to the pins A and B.

FIG.7Billustrates a schematic diagram of another exemplary power and data communication apparatus720in accordance with another aspect of the disclosure. The power and data communication apparatus720is an alternative implementation of the power and data communication apparatus700with a different configuration for a feedback network. In particular, the power and data communication apparatus720includes a buck-boost voltage regulator725similar to buck-boost voltage regulator705previously discussed.

The power and data communication apparatus720further includes a feedback network730including resistors R1, R2, and R5coupled in series between the output (pin5) of the buck-boost voltage regulator725and ground. A first capacitor C1is also coupled between the output (pin5) of the buck-boost voltage regulator725and ground. Pin6of the buck-boost voltage regulator725is coupled to a node between resistors R1and R2. A second capacitor C2is coupled between pin6and ground.

The feedback network730includes a resistor R3coupled in series with a resistor R4between the output (pin5) of the buck-boost voltage regulator725and a node between resistors R2and R5. A first pin A of the MCU735is coupled to a node between resistors R3and R4. The feedback network730further includes a resistor R6coupled between a node between resistors R2and R5and a second pin B of the MCU735. By having two pins A and B via which to couple to the feedback network730, the MCU735is able to generate different relationships between the feedback voltage VFBand the output voltage VOsuch that, for example, more than three (3) voltages levels for the output voltage VOmay be achieved. The truth table depicted inFIG.7Amay also be applicable to the power and data communication apparatus720.

FIG.7Cillustrates a schematic diagram of another exemplary power and data communication apparatus740in accordance with another aspect of the disclosure. The power and data communication apparatus740is an alternative implementation of the power and data communication apparatus700or720with yet a different configuration for a feedback network. In particular, the power and data communication apparatus740includes a buck-boost voltage regulator745similar to buck-boost voltage regulator705or725previously discussed.

The power and data communication apparatus740further includes a feedback network750including resistors R1, R2, and R5coupled in series between the output (pin5) of the buck-boost voltage regulator745and ground. A first capacitor C1is also coupled between the output (pin5) of the buck-boost voltage regulator745and ground. Pin6of the buck-boost voltage regulator745is coupled to a node between resistors R1and R2. A second capacitor C2is coupled between pin6and ground.

The feedback network750further includes a resistor R3coupled in series with a resistor R4between the output (pin5) of the buck-boost voltage regulator745and a node between resistors R2and R5. A first pin A of the MCU755is coupled to a node between resistors R3and R4. The feedback network750further includes a resistor R6coupled in series with a resistor R7between the output (pin5) of the buck-boost voltage regulator745and the node between resistors R2and R5. A second pin B of the MCU755is coupled to a node between resistors R6and R7. By having two pins A and B via which to couple to the feedback network750, the MCU755is able to generate different relationships between the feedback voltage VFBand the output voltage VOsuch that, for example, more than three (3) voltages levels for the output voltage VOmay be achieved. The truth table depicted inFIG.7Amay also be applicable to the power and data communication apparatus740.

FIG.8illustrates a flow diagram of an exemplary method800of generating an output voltage in accordance with another aspect of the disclosure. The method800includes selectively generating a data modulating signal (block810). Examples of a means for selectively generating a data modulating signal includes any of the microcontroller units (MCUs) described herein. The method800further includes bucking and boosting the output voltage based on the data modulating signal (block820). Examples of a means for bucking and boosting the output voltage based on the data modulating signal includes any of the buck-boost voltage regulators described herein, or other possible voltage regulator able to support the generation of a data modulated supply in accordance with the methods and variations described herein.

The method800further includes charging a battery in an audio device using the output voltage (block830). Examples of means for charging a battery in an audio device using the output voltage including an electrical connection between any of the buck-boost voltage regulators described herein and a battery in an audio device, such as an earbud described herein. Additionally, the method800includes data communicating with the audio device using the output voltage (block840). Examples of means for data communicating with the audio device using the output voltage include an electrical connection between any of the buck-boost voltage regulators described herein and a processor (e.g., MCU) in an audio device, such as an earbud described herein.