Electronic apparatus having coplanar waveguide transmission line

An electronic apparatus having a coplanar waveguide transmission line configured to reduce impedance discontinuity in the coplanar waveguide transmission line is introduced. The electronic apparatus includes a coplanar waveguide transmission line including a substrate, at least one signal line and a plurality of reference planes, and the electronic apparatus includes at least one passive component. Each of the reference planes is coupled to a DC voltage. The at least one passive component is electrically connected between the reference planes and acts as a short circuit at relatively high frequencies.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The disclosure generally relates an electronic apparatus having a coplanar waveguide transmission line, and more specifically to an electronic apparatus having a coplanar waveguide transmission line and having at least one passive component connected between reference planes of the coplanar waveguide transmission line for reducing impedance discontinuity in the coplanar waveguide transmission line.

2. Description of Related Art

In the field of signal transmission, coplanar waveguide (CPW) transmission lines have been used extensively because the CPW transmission lines provide a great circuit isolation.FIGS. 1A-1Bshow diagrams of conventional electronic apparatuses having CPW transmission lines, where a signal line12always comes with at least one reference plane which receives either a ground voltage or a power voltage of a direct current (DC) voltage source. Referring toFIG. 1A, the signal line12is disposed between a first reference plane14and a second reference plane16, where each of the first reference plane14and the second reference plane16may receive either the ground voltage or the power voltage. The first and second reference planes14,16are separated from the signal line12by a predetermined gap. Referring toFIG. 1B, one of the first reference plane14and the second reference plane16is disposed between the signal lines12, where the reference plane disposed between the signal lines12may receive either the ground voltage or the power voltage of the DC voltage source.

However, due to imperfect manufacturing process and circuit designs, impedance discontinuity usually appears on the reference planes of the CPW transmission line, leading to signal reflection on the CPW transmission line and reduction in signal transmission efficiency.

Thus, it would be desirable to have an electronic apparatus which has capability of reducing the impedance discontinuity in the CPW transmission line.

Nothing herein should be construed as an admission of knowledge in the prior art of any portion of the present disclosure. Furthermore, citation or identification of any document in this application is not an admission that such document is available as prior art to the present disclosure, or that any reference forms a part of the common general knowledge in the art.

SUMMARY OF THE INVENTION

An electronic apparatus having a coplanar waveguide transmission line capable of reducing the impedance discontinuity in the coplanar waveguide transmission line is introduced herein.

The electronic apparatus includes a substrate, a coplanar waveguide transmission line, and a first passive component. The coplanar waveguide transmission line is disposed on a surface of the substrate and includes a signal line, a first reference plane and a second reference plane, wherein the first reference plane and the second reference plane are disposed at a first side of the signal line. The first passive component is disposed on the surface of the substrate and coupled between the first reference plane and the second reference plane. The first reference plane and the second reference plane are respectively coupled to a first direct current (DC) voltage and a second DC voltage.

In an exemplary embodiment of the disclosure, the electronic apparatus further includes a memory and a semiconductor chip. The semiconductor chip has a double data rate (DDR) memory interface and is able to access the memory via the DDR memory interface. The signal line of the coplanar waveguide transmission line connects one of a plurality of signal ports of the DDR interface of the semiconductor chip and a corresponding signal port of the memory.

In summary, the present disclosure provides a coplanar waveguide transmission line including a signal line disposed on the substrate by reference to at least two reference planes connected by a passive component. The passive component acts as a short circuit at relatively high frequencies. Such as that, the electronic apparatus may reduce the impedance variation and remain the impedance continuity in the coplanar waveguide transmission lines.

DESCRIPTION OF THE EMBODIMENTS

FIG. 2is a schematic diagram illustrating an electronic apparatus according to an exemplary embodiment of the disclosure. In an embodiment of the disclosure, the electronic apparatus includes a substrate, a multi-reference coplanar waveguide (CPW) transmission line and at least one passive component (e.g., at least one capacitor, at least one diode, at least one inductor, or combinations thereof) connected between the reference planes of the CPW transmission line so as to reduce the impedance discontinuity in the CPW transmission line.

Referring toFIG. 2, the electronic apparatus200includes a substrate201, a CPW transmission line including a signal line202, a first reference plane204and a second reference plane206, and a passive component203. The substrate201may be a dielectric substrate whose sizes (e.g., a width, a height, a thickness) may be set according to design requirements. The electronic apparatus200may include at least one integrated circuit (not shown) formed on the substrate201and having signal ports coupled to the signal line202. The signal line202, the first reference plane204and the second reference plane206of the CPW transmission line are all disposed on the same surface of the substrate201. The passive component203is disposed on the same surface of the substrate as the CPW transmission line is disposed. In an embodiment of the disclosure, the first reference plane204and the second reference plane206are disposed on a same side (also referred to as a first side) of the signal line202and along a signal transmission direction of the signal line202. The first reference plane204and the second reference plane206are respectively coupled to a first DC voltage and a second DC voltage, in which the first DC voltage may be equal to or different from the second DC voltage. For an example that is not intended to limit scope of the disclosure, the first reference plane204may receive a ground voltage (e.g., 0V) from a DC voltage source and the second reference plane206may receive a power voltage (e.g., 5V, 10V) from the DC voltage source, or vice versa. However, the disclosure is not limited thereto, both of the first reference plane204and the second reference plane206may receive a same DC voltage (e.g., 0V, 5V, 10V) in another embodiment. The ground voltage is set according to the design requirements and can be a ground voltage for digital circuits or a ground voltage for analog circuits.

The first passive component203is coupled between the first reference plane204and the second reference plane206. In an embodiment of the disclosure, the first passive component203may include at least one capacitor, or at least one inductor, or at least one diode, or any combination thereof.

The first passive component203may act as a high-pass filter, a band-pass filter, or even a low-pass filter with a relatively high cut-off frequency (e.g., 1 Ghz, 2 Ghz). When a high-frequency signal is transmitted on the signal line202, the first passive component203is equivalent to a short circuit connecting between the reference planes such that the first reference plane204is regarded as being short-circuited to the second reference plane206, and thus remains the impedance continuity. In this way, the impedance discontinuity is significantly reduced and a signal transmission efficiency of the CPW transmission line is improved.

FIGS. 3A-3Care schematic diagrams illustrating electronic apparatuses according to different exemplary embodiments of the disclosure. Referring toFIGS. 3A-3C, the electronic apparatus300includes a substrate301, a CPW transmission line including a signal line302, a first reference plane304and a second reference plane306, and the electronic apparatus300includes a passive component303. A difference between the electronic apparatus illustrated inFIG. 2and the electronic apparatus illustrated inFIGS. 3A-3Cis the passive component303. Referring toFIG. 3A, the passive component303includes at least one diode (D1to Dn), and when a voltage level of the first DC voltage is lower than a voltage level of the second DC voltage, an anode of the at least one diode (D1to Dn) is coupled to the first reference plane304and a cathode of the at least one diode (D1to Dn) is coupled to the second reference plane306. That is, the diode D1to Dn may be reverse biased between the first reference plane304and the second reference plane306. The at least one diode (D1to Dn) may be connected to each other in series or in parallel or a combination thereof. The disclosure is not limited to the any type of diode, and the coupling relationships of the diode and the first and second reference planes may change accordingly to the type of the diode.

Referring toFIG. 3B, the passive component303includes at least one capacitor (C1to Cn) which may be coupled to each other in series or in parallel or a combination thereof. The disclosure is not limited to the any type of capacitor, and the coupling relationships of the at least one capacitor with the first and second reference planes may change accordingly to the type of the capacitor and/or circuit design requirements.

Referring toFIG. 3C, the passive component303includes at least one inductor (L1to Ln) which may be coupled to each other in series or in parallel or a combination thereof. The disclosure is not limited to the any type of inductor, and the coupling relationships of the at least one inductor with the first and second reference planes may change accordingly to the type of the inductors and/or circuit design requirements.

In another embodiment of the disclosure, the passive component303may be any combination of at least one capacitor, at least one inductor, and at least one diode. For example, the passive component303may be combinations of at least one capacitor with at least one inductor, combinations of at least one capacitor with at least one diode, combinations of at least one inductor with at least one diode. The constructive components (e.g., at least one capacitor, at least one inductor, at least one diodes, or a combination therefore) of passive component303may be connected to each other in series or in parallel or a combination thereof.

FIG. 4is a schematic diagram illustrating an electronic apparatus according to another exemplary embodiment of the disclosure. Referring toFIG. 4, the electronic apparatus400includes a substrate401, a CPW transmission line including a signal line402, a first reference plane404, a second reference plane406, a third reference plane408and a fourth reference plane410, and the electronic apparatus400includes a first passive component403and a second passive component405. The electronic apparatus400may include at least one integrated circuit (not shown) formed on the substrate401and having signal ports coupled to the signal line402. The substrate401, the signal line402, the first reference plane404, the second reference plane406, and the first passive component403are similar to those ofFIG. 2, thus the related descriptions are omitted herein.

The third and fourth reference planes408and410are disposed on the substrate401and at a second side that is different from the first side of the signal line402. For example, if the first side of the signal line402is a left-hand side of the signal line402, the second side of the signal line402may be the right-hand side of the signal line402. The third reference plane408and the fourth reference plane410are disposed on a same surface of the substrate401. Nevertheless, the disclosure is not limited thereto, the third reference plane408and the fourth reference plane410may also be disposed on different surfaces of the substrate401. In an embodiment of the disclosure, the third reference plane408and the fourth reference plane410are disposed along the signal transmission of the signal line402. It should be noted that the first reference plane404, the second reference plane406, the third reference plane408and the fourth reference plane410may be disposed on a same surface of the substrate401or in different surfaces of the substrate401.

The third reference plane408receives a third DC voltage and the fourth reference plane410receives a fourth DC voltage, where a voltage level of the third DC voltage may be equal to or different from a voltage level of the fourth DC voltage. For example, the third reference plane408may receive a ground voltage (e.g., 0V) and the fourth reference plane410may receive the power voltage (e.g., 5V, 10V), and vice versa. In another embodiment, both of the third reference plane408and the fourth reference plane410may receive a same voltage (e.g., 0V or 5V). It should be noted that voltage levels of the first, second, third and fourth DC voltages may be the same or different from each other.

The second passive component405is coupled between the third reference plane408and the fourth reference plane410. The second passive component405may be similar to the first passive components203and303that are shown inFIGS. 2 and 3A-3Cof the present disclosure. The second passive component405may comprise at least one capacitor, or at least one inductor, or at least one diode, or any combination thereof. The constructive components (e.g., at least one capacitor, at least one inductor, at least one diode, or any combination thereof) of the second passive component405may be coupled to each other in series or in parallel. The detailed disclosure of the second passive component405may be deduced from the above descriptions of the first passive components203and303illustrated inFIGS. 2 and 3A-3C, and thus, the detailed description of the passive component405is omitted herein.

When a high-frequency signal is transmitted on the signal line402, the first passive component403and the second passive component405act as short circuits between the reference planes. In this way, the first and second reference planes404and406are connected to each other without raising impedance discontinuity in the CPW transmission line, and the third and fourth reference planes408and410are connected to each other without raising impedance discontinuity in the CPW transmission line. Accordingly, the impedance continuity of the CPW transmission line are remained.

FIG. 5is a schematic diagram illustrating an electronic apparatus according to an exemplary embodiment of the disclosure. Referring toFIG. 5, the electronic apparatus500includes a substrate (not shown), a memory520, a semiconductor chip530, and a plurality of signal lines502in the form of CPW transmission line. The CPW transmission line used in the electronic apparatus500does not only include the signal line502but also includes reference planes, and the electronic apparatus500further includes passive components (not shown) coupled between the reference planes, which may be similar to those inFIG. 2, 3A-3C, or4. The memory520can be any type of memory (e.g., a volatile memory or a non-volatile memory or a combination thereof) which is used to store data. The semiconductor chip530includes a double data rate (DDR) memory interface which is connected to the memory520via the plurality of signal lines502for accessing the memory520. The DDR memory interface531has a plurality of signal ports, where each of the signal lines502connects to one of the plurality of signal ports of the DDR interface531and a corresponding signal port of the memory520.

In an embodiment of the disclosure, the signal ports of the memory520and the DDR memory interface531includes the following types of signal port: data signal port (DQ), data strobe port (DQS), data mask port (DM), control port (CONTROL) and address port (ADDRESS). The signal lines502are used to connect at least one type of signal port of the DDR memory interface531to the corresponding port of the memory520. By using the passive component(s) coupled between the reference planes at the same side of the signal line, the CPW transmission line of the electronic apparatus500has capabilities of reducing the impedance discontinuity and improving signal transmission efficiency through the CPW transmission line.

In summary, the embodiments of the disclosure provide an electronic device having a CPW transmission line where at least one passive component is electrically connected between reference planes of the CPW transmission line. At relatively high frequencies, the passive component acts as a short circuit to electrically connect the reference planes of the CPW transmission line without raising impedance discontinuity. In this way, the impedance continuity of the CPW transmission line are remained and the signal transmission efficiency is improved.