Method for enhancing power amplifier efficiency and linearity and power amplifier

A method for power amplification uses circuitry including a main amplifier and an auxiliary amplifier that are constructed and operate such that an input is applied to the main and auxiliary amplifiers via an input network. At low power levels, the auxiliary amplifier is off and the main amplifier sees a large impedance. At maximum power level, both the auxiliary and main amplifiers operate at full power and there is a constant phase shift between them. While transitioning from low to maximum power, systematic AM-AM and AM-PM variations generated due to the phase shift provided by the input network, bias differences between the main and auxiliary amplifiers, and nature of the output combiner to compensate device related distortions.

FIELD

A field of the invention is power amplification. A power amplifier of the invention has an example application to wireless transmitters, including 5G mm-wave transmitters.

ABBREVIATIONS

The following abbreviations are used in the text and the following meanings are accorded the abbreviations.AM-AM Amplitude-to-Amplitude ModulationAM-PM Amplitude-to-Phase ModulationCMOS Complementary Metal-Oxide-SemiconductorFET Field Effect TransistorDPD Digital PredistortionIQ In-Phase and QuadratureLDMOS Laterally Diffused Metal-Oxide-SemiconductorLMR Load Modulation RatioMOS Metal-Oxide-SemiconductorPA Power AmplifierPAPR Peak-to-Average Power RatiopHEMT Pseudomorphic High Electron Mobility TransistorRF Radio FrequencySiGe HBT Silicon Germanium Heterjunction Bipolar TransistorSOI Silicon-on-Insulator

BACKGROUND

Low distortion levels are required for spectrally efficient complex modern communication signals with high PAPR. This necessity of low distortion puts strict requirements on the linearity of wireless transmitters. Average efficiency, mostly determined by the PA performance at peak and back-off power levels, is another significant criterion, particularly for battery powered devices. For emerging 5G applications employing mm-wave phased-arrays with multiple PA units on the same die, the importance of linearity and efficiency escalate further, since implementing individual DPD for each unit is not practical and heating of the PAs, densely placed next to each other, can be a problem. Therefore, the PA units must be inherently linear and efficient.

State-of-the-art techniques for power amplifier design together with their advantages and disadvantages are listed below.

Disadvantages: Low back-off efficiency, AM-PM issues that can be addressed by backing off the power (reducing the efficiency even further).

Envelope Tracking

Disadvantages: Requires heavy DPD, does not work well for wide band modulated signals.

Doherty

Disadvantage: In practice typically requires DPD

Advantages: Very high average efficiency, low loss power combiner.

Chireix outphasing [1] and Doherty [2], the two popular active load modulation techniques used at RF frequencies for PA efficiency enhancement, are currently being investigated for mm-wave applications. Both methods, in their original forms, utilize two PA cells connected to a non-isolating three port passive network, which serves as a power combiner and provides the desired load modulation during operation.

In theory, outphasing offers a better efficiency profile than Doherty [3], and in practice there are a variety of creative ways to implement the Chireix combiner with low loss (e.g., two-element L-C [4], offset transmission lines [5], on-antenna outphasing [6]-[7], and triaxial balun [8]). Also, in contrast to most Doherty implementations, the PA cells in outphasing have the same size, are biased similarly, and see the same magnitude of fundamental load modulation. These features make the dual-input implementations of outphasing [8] more advantageous than the dual-input implementations of Doherty (with analog [9]-[10] or digitally assisted mixed-signal [11] PAs) in that the two inputs for outphasing are symmetric (they have the same amplitude with opposite phases, i.e., complex conjugate in base-band signal domain).

On the other hand, a major advantage of the Doherty architecture, which has historically made it a more common choice than outphasing, is the simplicity of implementing its input signal splitter that feeds the two PA cells from a single RF input source, without the need for an extra IQ modulator and the bandwidth expansion problem associated with dual-input realizations.

In recent years, there have been successful proposals for novel architectures within the Doherty-outphasing continuum, in order to garner the best advantages of both methods in one circuit [12]-[13]. The primary emphasis in these works has been placed on efficiency improvement for single RF input amplifiers, leaving the linearity to be addressed with DPD.

REFERENCE LIST

SUMMARY OF THE INVENTION

A preferred embodiment is a method for power amplification which uses circuitry including a main amplifier and an auxiliary amplifier that are constructed and operate such that an input is applied to the main and auxiliary amplifiers via an input network. At low power levels, the auxiliary amplifier is off and the main amplifier sees a large impedance. At maximum power level, both the auxiliary and main amplifiers operate at full power and there is a constant phase shift between them. While transitioning from low to maximum power, systematic AM-AM and AM-PM variations are generated (due to the phase shift provided by the input network, bias differences between the main and auxiliary amplifiers, and nature of the output combiner) to compensate device related distortions.

A preferred power amplifier includes an input and a split to apply the input to a main amplifier and an auxiliary amplifier with a phase shift. At low power levels the auxiliary amplifier is off and the main amplifier sees a large impedance. At maximum power level both the auxiliary and main amplifiers operate at full power and there is a constant phase shift between them. In one design, the main amplifier comprises a class-AB amplifier and the auxiliary amplifier comprises a class-C amplifier. In another design, the main amplifier comprises a class-AB amplifier and the auxiliary amplifier uses a power-level dependent bias voltage that changes its mode of operation continuously from class-C to class-AB. The input and output networks are designed so that while transitioning from low to maximum power, systematic AM-AM and AM-PM variations are generated to compensate device-related distortions.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Preferred embodiments of the invention provide methods for simultaneously improving the back-off efficiency and linearity of PAs. A preferred embodiment amplifier uses a combination of Chireix outphasing and Doherty architectures, and requires a single RF input with no predistortion. A preferred amplifier circuit consists of a dual-input high-efficiency outphasing PA and an input network, which serves as a power splitter and feeds the inputs of the main and auxiliary PA cells (amplifiers) that are biased in class-AB and class-C regions respectively. In preferred embodiments phase distortion at the output is minimized by a balance between the device-induced phase distortion as the power level varies, and the systematic phase variation is created by passive input and output networks and operation of main and auxiliary amplifiers. The systematic phase variation varies the output phase as the auxiliary amplifier output power increases.

A preferred experiment embodiment demonstrated an integrated high-efficiency 28 GHz power amplifier (PA) employing a combination of Chireix outphasing and Doherty architectures in order to simultaneously achieve power back-off efficiency and linearity with a single RF input signal and no predistortion. A preferred amplifier includes and preferably consists of a dual-input high-efficiency outphasing PA and an input network that serves as a power splitter and feeds the same signal to the inputs of main and auxiliary PA cells that are biased in class-AB and class-C regions respectively, similar to the Doherty architecture. The operation of the PA cells together with the Chireix combiner result in back-off efficiency enhancement plus systematic AM-AM and AM-PM variations which are used to correct the distortions caused by transistors, resulting in a linear response. A prototype implemented PA demonstrates 19 dBm saturation power (Psat) with 34.4% peak power-added efficiency (PAE) and 6-dB back-off PAE of >23% at 27.5 GHz. The modulated signal performance using a 100 MHz 64-QAM OFDM signal shows average output power of 11.9 dBm with PAE>20%, EVM<5%, and ACLR<−33 dBc without using predistortion. Such performance, to the authors' best knowledge, is among the highest PAE reported to date for an OFDM signal without DPD (or other forms of digital enhancement) at power levels of interest for 5G transmitters.

Preferred amplifiers and methods improve back-off efficiency, only require a single RF input, while also correcting the nonlinearity of the PA cells to eliminate the need for predistortion. Preferred amplifiers utilize a Chireix combiner, and can be referred to as a Single Input Linear Chireix (SILC) PA.

Preferred embodiments of the invention will now be discussed with respect to the drawings and experiments used to demonstrate the invention. The drawings may include schematic representations, which will be understood by artisans in view of the general knowledge in the art and the description that follows.

FIG.1shows a preferred architecture for a power amplifier10of the invention. It includes a Chireix combiner12and a split14of an RF input (RFin) into separate signals to be amplified by a main amplifier16and an auxiliary amplifier18. In one path is a delay line20. The main and auxiliary amplifiers16and18are biased with Doherty-like biases (class-AB main and class-C auxiliary) and outputs of these amplifiers are applied to input ports of the combiner12. The delay line20is an input network providing a constant phase shift (θ0) to path to the main amplifier16. Depending on the type of the Chireix combiner and characteristics of the PA cells, the delay line can be placed at the input of either amplifier for proper operation. The Chireix combiner can be made differential (using a balun as inFIG.1), or common mode like a Wilkinson combiner. The PA cells' AM-PM distortion can be positive (leading) or negative (lagging). In the power amplifier10, the main amplifier16is a class-AB amplifier and the auxiliary amplifier18is a class-C amplifier. The auxiliary amplifier18can also be an amplifier that uses a power-level dependent bias voltage that causes it to operate in a mode that changes continuously between class-C and class-AB. The difference between Class-AB and Class C operation is the bias voltage applied to the gate of the amplifier. In one example, the bias voltage of the peaking amplifier is held constant at a value corresponding to class-C operation. In another example, the bias voltage of the peaking amplifier is changed from an initial value corresponding to Class-C, but as the power level increases, the bias voltage is continuously shifted to correspond to Class-AB operation. The main and auxiliary amplifiers16and18can be considered to be current sources, and the shunt compensating elements22and24of the combiner12with susceptances of ±BCH(CCHand LCH) are chosen in accordance with outphasing principles, such as those described in [14]. A load26is connected to the third port of the combiner12provided by its transformer27. An output network is formed by the combiner12(including 22 and 24). Additional circuit elements for impedance matching and for power combining of the two branches can be added to the output network for particular designs.

At low input power levels (below the back-off peak efficiency point) the auxiliary amplifier18is off, the main amplifier16operates as a standalone class-AB PA. As an example, low power can be more than 4-5 dB back-off from maximum usable power. A conventional Doherty design in principle uses 6 dB back-off from maximum power for the transition point between low and high power modes of operation. Maximum power can be considered the absolute highest power (saturated power) of the amplifier output. In practice, the maximum usable power for applications is the maximum “linear” power, where the gain has dropped off from its low power value by no more than for example 1 dB, if no digital gain correction techniques is to be used.

Examples to be discussed include three different designs. For each one, the auxiliary amplifier18kicks in at a different back-off power level, which is captured by the “back-off peak efficiency point”, with the specific dB number discussed below. The equivalent circuit for the low input power level mode of operation is shown inFIG.2A. The load impedance seen by the main PA16at low power (ZA) can be calculated by performing a series-to-parallel impedance transformation, as shown inFIG.2B. The quality factor of this transformation (Qt) is equal to inverse of BCHRL, which is a design parameter for Chireix combiners determining the back-off efficiency profile of the outphasing PAs. For example, BCHRLequal to 0.6 and 0.86 result in back-off peak efficiency points at 10 dB and 6 dB respectively, therefore Qtis typically a value in the 1.16-1.66 range. Additionally, CCHis tuned out, although not completely, by the resulting parallel inductance, keeping the reactive part of the load impedance low for high efficiency. The residual capacitance, CCH/(1+Qt2), causes modest efficiency and gain reduction due to a non-unity power factor (PFA) ranging between 0.75 and 0.85. Equation (1) shows the relation between the PFAand Qt:

The power amplifier10is preferably designed such that the auxiliary amplifier18is biased to remain off up to the input power where the main amplifier16starts saturating and exhibits nonlinear behaviors including gain compression and AM-PM distortion. In principle, the efficiency should reach its maximum class-AB value scaled by PFA(0.75-0.85), and the gain should be lower than the class-AB gain by PFA/2 (3.7-4.25 dB). The extra ½ for the gain ratio is due to the fact that in this mode of operation the input power going to the auxiliary amplifier is wasted.

As the auxiliary amplifier18turns on and begins providing power, a variety of mechanisms influence the output, of which some are due to the topology itself (i.e., load modulation, systematic AM-AM and AM-PM variations), some are due to the device non-idealities (i.e., gain compression and AM-PM distortion), and some result from combination of both topology and device non-idealities (i.e., self-outphasing).

The end point of this region, where the power amplifier10provides its highest output power, is considered first. Both amplifiers work with their full power at this point, with a constant phase-shift (θ) between them, resulting from the delay line at the input network (θ0), as well as phase imbalance (θ1) coming from the non-equal input impedances of the main16and auxiliary18amplifiers due to their bias difference (θ=θ0+θ1). If a standard combiner is used, this operation point can be designed to lie in a high-efficiency area (PF=1) of the impedance trajectories provided by the Chireix method [5] shown in the Smith chart ofFIG.3. There are two candidates for this point, one close to the center of the Smith chart with a lower impedance value associated with higher output power, and the other one at “outphasing back-off,” providing higher load impedance appropriate for low power operation. The design parameter that determines the impedance of choice is the phase shift θ between the two amplifiers.

For standard outphasing operation, equal fundamental voltage amplitudes are required at the input ports of the Chireix combiner12provided from outputs of the main16and auxiliary18amplifiers. This approach is also followed here at full power; since the auxiliary amplifier18is biased in class-C and has lower gain than the main amplifier16, it is set to have a higher supply voltage than the main amplifier16in order to match the voltage swings at maximum power.

Simulations were conducted to test alternative design approaches of the circuit inFIG.1, achieved by changing the value of the input phase shift20and bias of the auxiliary amplifier18. The simulations were conducted with an idealized transistor model (voltage-controlled current source (VCCS) with knee voltage an ideal balun. A mathematically defined two-port network was used to create the transistor model as a VCCS with a knee voltage. The set of conditions and equations that are used to define the transistor-like behavior are given in (1a):

FIG.4Ashows the impedance trajectories seen by the main16and auxiliary18amplifiers for a preferred design, where the end point impedance at maximum power is chosen to be the lower value of the two options shown inFIG.3with PF=1. With BCHRLof 0.8 (Qt=1.25), the fixed phase-shift between the amplifiers is calculated accordingly based on the standard Chireix equations [5] (θ=sin−1BCHRL=sin−1Qt−1=126.9°). Theory predicts that the trajectory of impedance seen by the main amplifier starts at:

and ends at

These values are supported by the simulation results shown inFIG.4B. The output power variation due to LMR for the main amplifier16is

which corresponds to 4.1 (6.1 dB) in this design. For the overall output power, the contribution of the auxiliary amplifier18is then taken into account, by doubling the value for the main amplifier (adding 3 dB), since at the maximum power both amplifiers see the same impedance (FIG.4A) and have the same output voltage swing (FIG.4B). The back-off peak efficiency is therefore expected to be at a power level 9.1 dB below the maximum power with a value reduced by PFA(0.78) relative to the peak efficiency. These numbers are in good agreement with the simulations shown inFIG.4C. The slight difference between the theory and simulation is due to the presence of knee voltage and saturation of the PA cells (main16and auxiliary18amplifiers). InFIG.4A, the impedance seen by the auxiliary amplifier18goes outside of the smith chart for a small region at the beginning of its operation. This condition is not an indicator of instability; it only shows that a small portion of the power generated by the main amplifier16is consumed by the auxiliary amplifier18.

These results are favorable in terms of efficiency. Linearity must be addressed as well in order to achieve a design that does not require DPD. The goal is to have systematic AM-AM and AM-PM changes that are in the opposite direction of the gain compression and AM-PM variation caused by the device non-idealities, so that the overall response is distortion free. For an overdriven amplifier, the gain compression characteristics and resultant AM-AM distortion are in general dependent on the choice of power transistor (SiGe HBT, CMOS, LDMOS, pHEMT) and bias conditions. The corresponding AM-PM distortion, associated with the change of device input and output capacitance as well as the impedance matchings, is often a critical determinant of the overall amplifier linearity in this regime. Systematic AM-AM and AM-PM changes are provided that are in the opposite direction of gain compression and AM-PM variation caused by device non-idealities. A preferred approach increases output power of the auxiliary amplifier18at an appropriate rate, and systematic AM-PM variation is caused by the input phase shift20between the input paths to the main16and auxiliary18amplifiers. Systemic AM-AM and AM-PM variation can be produced using phase shifts between main and auxiliary paths and adjusting the bias voltages of the amplifiers to meet linearity specifications without applying digital predistortion or any other correction to the input. The appropriate rate of power increase for the auxiliary amplifier vs input power is that which keeps the overall amplifier gain constant vs output power level. This appropriate rate produces a systematic AM-AM variation that cancels the device-dominated AM-AM distortion.

The net amount of systematic AM-AM results from two features. The first one is the PFA/2 ratio that was mentioned above. In contrast to the low power mode of operation, at high power the power factor rises to unity and the input power going to the auxiliary amplifier18is not wasted, therefore the gain increases by 2/PFA. The second feature is that the load modulation decreases the gain, if the gm is considered to be constant for the PA cells. This gain variation is captured by looking at the change in the magnitude of impedance seen by the main amplifier16(|ZA|/ZB|), thus the overall systematic AM-AM can be calculated as shown below.

Equation (5) in this example, results in ˜−1 dB, meaning that for a design with low value impedance at peak power, the systematic AM-AM aggravates the device gain compression problem rather than fixing it. In order to capture the systematic AM-AM in simulation, the variation of large signal transconductance (Gm) is de-embedded from overall gain variation, as shown inFIG.4D.

Systematic AM-PM and the mechanism that causes it are described by looking at the three combiner port voltages (voltages at outputs of main and auxiliary amplifiers and at the load).FIG.5shows a simplified phasor diagram illustrating the output voltages of the main (VMain)16and auxiliary (VAux)18amplifiers as well as the load voltage (VOut). A vector sum (instead of subtraction) is depicted here for the sake of convenience, even though the actual combiner is differential. We use the simplifying assumptions that VMainand the phase difference between the two vectors (θ) stay constant in this region. As VAuxincreases, the magnitude and phase of VOutvary simultaneously, and it is clear fromFIG.5that the overall amount of this systematic AM-PM is equal to half of θ, because eventually VAuxapproaches the same magnitude as VMain. In reality, the assumptions made here are not accurate, because the main and auxiliary amplifiers see reactive loads in the middle points (FIG.4A). However, since at the end point both of them see a purely resistive impedance, the overall systematic AM-PM change captured by this analysis, as given by (6), remains a very good approximation.

The simulation result shown inFIG.4Everifies this analytical approach. The AM-PM obtained in this example is not particularly favorable for an overall linear amplifier, because the relatively large amount (˜50 degrees over a 5 dB power variation and ˜63 degrees in total) is significantly greater than typical device-related phase distortions.

The systematic AM-PM calculation was conducted as follows. In order to calculate the systematic AM-PM, the phase of the load voltage at low power (VL1) and at peak power (VL2) are subtracted from each other.FIG.4Fshows the equivalent circuit at low power when the auxiliary amplifier is off, with the corresponding currents annotated. It is obvious that the phase of VL1is the same as the phase of iLoadin this mode of operation. By writing KVL and KCL at the output node of the main amplifier, it can be shown that iLoad=iOut× (−jQt), and since iOutitself has 00 degrees delay, the phase of VL1is calculated to be −(θ0+90°).

FIG.4Gshows the equivalent circuit at peak power. If the power amplifier is designed such that at this point the main16and auxiliary18amplifiers see a purely resistive (PF=1) impedance and have the same voltage swing (|VOut|), VL2would be equal to |VOut|×[exp (−jθ0)−1]. In that case, it can be shown that the phase of VL2is equal to −(θ0/2+90°).

TheFIG.1amplifier10with the phase shifts discussed above provides a remarkable back-off efficiency profile with a simple outphasing PA topology that has an asymmetric bias and a constant phase shift between the two input RF signals feeding the main16and auxiliary18amplifiers. Phase shift is chosen such that the load impedance at maximum power was relatively low (FIG.3point that is close to the center of the Smith chart with PF=1), and therefore the efficiency had a second peak at a deep back-off (see Eq (4)). Back-off peak efficiency happens at 9.1 dB in this example), but the linearity in terms of AM-AM and AM-PM is poor. TheFIG.1design can be used for applications where pre-distortion is available. Modifications are preferred, however, for applications where inherent linearity is required.

A similar design is now examined that at peak power has the higher impedance with unity power factor.

achieved by changing the input phase shift to the other answer of the trigonometric equation θ=sin−1Qt−1, which is 53.12° (for BCHRL=0.8). The simulation results, obtained by using the same transistor model, are shown inFIGS.6A-6E. Compared to the previous example, here the amount of load modulation for the main amplifier is minor (FIG.6A) and

is only 0.11 dB. Also, the output voltage of the main amplifier16continues to increase (deep saturation) even after the auxiliary amplifier18turns on (FIG.6B). The efficiency profile, shown inFIG.6Cis not as good as the previous example, but it is still better than an ideal class-B shown inFIG.6Dand has a back-off peak at ˜4.4 dB, with a value that is lower than the peak efficiency by PFA(0.78) as found for the previous case. Note that if the efficiency curve was plotted vs absolute power (rather than normalized power), the back-off efficiency peak would be at the exact same output power in both example designs, but the peak power would be different. The systematic AM-AM expression needs to be modified too, since ZBhas increased. The new expression is

that results in ˜5 dB (FIG.6D), which can compensate the device related gain compression coming from the considerable amount of effective Gm reduction due to the deep saturation experienced by the main amplifier. The deep saturation of the main amplifier16can be avoided in a practical design by adjusting the bias condition of the auxiliary amplifier18. The equation for the systematic AM-PM is same as (6) and results in ˜26.6°. The simulation result shown inFIG.6Eis in good agreement with the calculation.

It is also possible to have an intermediate design between the two previous examples. As shown inFIG.3, if a phase shift other than the two values suggested by θ=sin−1Qt−1is applied to the input signals, the peak power impedances seen by the main16and auxiliary18amplifiers will be complex conjugates of each other and not purely resistive (ZBand ZB*). As a result, the peak efficiency will drop slightly due to the non-unity power factor of ZB(PFB), but other than that the PA will work in a manner similar to the previous examples.

FIGS.7A-7Fshows the simulation results for a case with phase shift of 90° applied at the input. There is an appreciable amount of load modulation for both main16and auxiliary18amplifiersFIG.7A), and the main amplifier16is less driven into deep saturation (FIG.7B). The efficiency peaks at a back-off power of 6.2 dB (FIG.7C), and the systematic AM-AM, captured by the simulation, is ˜2.1 dB (FIGS.7D-7F). A more general form of the equations can be applied in this case

Note that since the main16and auxiliary18amplifiers operate in current mode and at the maximum power, they see different reactive loads and experience different amounts of saturation, the actual voltage phase shift at the combiner ports is not 90°, therefore the systematic AM-PM shown inFIG.7Fis slightly lower than the expected value of ˜45° suggested by the first line of (6).

The above-mentioned behavioral characteristics of this intermediate design are in between those of the two previous ones; therefore by changing the input phase shift, a certain design goal (e.g., a required amount of systematic AM-PM) can be achieved, although the other specifications (e.g., the systematic AM-AM) will vary as well, in a manner that may result in an undesirable outcome.

An additional control parameter, with a somewhat independent influence, is useful to make the PA work in a more favorable fashion. The bias condition of the main16and auxiliary18amplifiers, especially the auxiliary amplifier18, can provide such a control parameter. Since in practical devices the gm is usually bias dependent, as the bias voltage of the auxiliary amplifier18is varied, both the turn-on input power level and the gm change, affecting the overall AM-AM behavior as well as the back-off efficiency profile of the PA (similar to what happens in the Doherty architecture). For example, if the auxiliary amplifier is set to have a low bias voltage (deep class-C) it will turn on at a higher input power level and even after that, it will have a low gm (soft turn-on). This condition will lead the main amplifier16to go to deep saturation, which is beneficial in terms of back-off efficiency, but it is problematic in terms of linearity since the reduced Gm at saturation drops the gain. In contrast, a higher bias for the auxiliary amplifier18will result in a higher overall gain and a lower efficiency peak at back-off.

An additional feature of theFIG.1amplifier architecture results indirectly from the AM-PM variation caused by the device nonideality and impacts the impedance trajectories seen by the main16and auxiliary18amplifiers. The device related AM-PM arises mostly from the voltage dependent capacitance variation at the input and output nodes of each of the main16and auxiliary18amplifiers. The onsets of this phenomenon for the individual main16and auxiliary18amplifiers are at different power levels, due to their bias and supply voltage differences. As a result, there is a power-dependent phase variation between the main16and auxiliary18amplifiers, which together with the Chireix combiner result in “self-outphasing” that slightly changes the impedance trajectories at the intermediate power levels. To capture this effect in simulation a realistic device model is needed. The effect is shown in the simulated results (FIG.10A) for an experimental SiGe power amplifier consistent withFIG.1(Shown inFIG.9A-9B). Overall, the design methodology is to determine the input phase shift θ0and the auxiliary amplifier18bias condition by testing values and narrowing selections until the best AM-AM and AM-PM are obtained.

Experimental Implementation and Simulation

A previously-reported 28 GHz high-efficiency dual-input ouphasing PA, implemented in 130 nm SiGe BiCMOS (GF 8HP) process [8], was used as the core PA cell for the main16and auxiliary18amplifiers as shown inFIG.8A. The combiner is implemented as a “triaxial balun” with electrical length of ˜λ/5 using the top 3 metal layers of the process, achieving an exceptionally low loss of ˜0.5 dB at 28 GHz (determined in a back-to-back balun measurement). A detailed model for the triaxial balun is provided in [8]. The main16and auxiliary18amplifiers employ a cascode cell with a smaller size top device (transistor that is 4×10 μm inFIG.8A) to achieve the low output capacitance needed for the Chireix operation. The bias voltages are set in accordance with the desired mode of operation (i.e., class-C bias and higher VCCfor the auxiliary amplifier18). Base biases were provided through 100Ω on-chip resistors and the transistors drew 33.4 mA and 38.8 mA, measured at maximum power, from supply voltages of 3.7V and 4.3V for the main16and auxiliary18amplifiers, respectively.

Post-layout simulation, fed by a pair of phase-shifted RF signal sources, confirms the predicted behavior in terms of efficiency and linearity. As shown inFIG.8B, if the auxiliary amplifier18is completely turned off, the main amplifier16by itself introduces a noticeable amount of AM-PM distortion toward its saturation. A proper bias of the auxiliary amplifier18together with an appropriate phase shift, result in a flat AM-PM response.

Based on the simulations, the signal phase shift due to the input impedance difference of the main16and auxiliary18amplifiers is sufficient for the desired operation (θ=θ1) and there is no need for an explicit delay line at the input (θ0=0°). Therefore, the same RF signal is fed to both inputs of the core PA (main16and auxiliary18amplifiers), via DC blocking caps that are necessary because of the difference in the base bias of the main16and auxiliary18amplifiers. A back-to-back triaxial balun (fabricated to be tested separately) is used for this purpose. The core PA and the input signal splitter chips are attached next to each other on a board and connected via very short wirebonds, forming the overall PA (FIGS.9A &9B). The effect of the wirebonds is included in the simulations by using series inductors.

The post-layout simulation results while being driven from a single 28 GHz RF source, are shown inFIGS.10A-10C. By manually de-embedding the 85 fF device output capacitance, the impedance variations seen by the internal current sources of the main and auxiliary amplifiers are captured (FIG.10A). The trajectories shown here (with the Smith chart normalized to RL) are slightly more curved than those in the idealized simulations ofFIGS.6A-7E, due to the “self-outphasing” phenomenon. The insertion loss of the output balun is the expected value of 0.5 dB and stays constant with respect to the output power.FIG.10Bshows that the PAE at 6-dB back-off is improved by 34% compared to an ideal class-B, whileFIG.10Cshows the gain is flat to within 1 dB and the phase variation is below 5 degrees up to 19 dBm output power. The AM-AM and AM-PM variations remain in these ranges at least for 1 GHz of bandwidth, under the nominal bias condition.

Measurements and Comparison.

Measurements were carried out at 27.5 GHz (instead of 28 GHz) due to the presence of a slight mistuning in the circuit.FIG.11Ashows the continuous wave (CW) test result demonstrating more than 19 dBm Psat with peak PAE of 34.4% and 6-dB back-off PAE of greater than 23% that corresponds to 34% improvement over ideal class-B back-off behavior. The gain is also shown on the same plot; it is flat to within ±0.3 dB of 9.7 dB. The AM-PM shown inFIG.11Bis obtained from the modulated signal measurement under the same bias condition and has ±3.3 degrees variation.

A 100 MHz 64-QAM OFDM signal (generated with Keysight M8195A Arbitrary Waveform Generator and up-converted to 27.5 GHz) was used to evaluate the dynamic performance (with output signal captured using Agilent DSO80604B 6 GHz 40GS/s real time oscilloscope after down-conversion to 2.5 GHz). Average collector efficiency of 22.9% and average PAE of 20.2% is obtained for 11.9 dBm output power. Linear equalization has been applied to the complete setup including the DUT (using Keysight VSA software), and with no DPD, EVM of 4.9% and ACLR better than −33 dBc (at 100 MHz offset from the carrier frequency) are achieved.FIGS.12A and12Bshow the resulting constellation and spectrum of the output signal.

Performance was compared to recently published state-of-the-art power amplifiers that modulate OFDM signals without employing digital enhancement. Given these constraints, the present amplifier presents the highest reported average efficiency for a silicon-based integrated PA.

While specific embodiments of the present invention have been shown and described, it should be understood that other modifications, substitutions and alternatives are apparent to one of ordinary skill in the art. Such modifications, substitutions and alternatives can be made without departing from the spirit and scope of the invention, which should be determined from the appended claims. A few examples of such modifications and alternatives are as follows. In addition to or instead of using different supply voltages for main16and auxiliary18amplifiers, the device sizes shown inFIG.8A, can be chosen to be unequal for the main16and auxiliary18amplifiers. Also, the input power split14, can be designed to provide unequal input powers to main16and auxiliary18amplifiers. While the preferred experimental embodiment was fabricated with SiGe HBT technology the architecture can be implemented in CMOS, CMOS-SOI, GaAs, GaN and other high frequency integrated circuit technologies