USB SSIC REMOVABLE ELECTRONIC DEVICE AND THE ADAPTOR THEREOF

A USB SSIC removable electronic device includes a first receiving terminal pair, a first transmitting terminal pair, a MIPI/SSIC-PHY/Link layer, a function module, at least one power terminal and a ground terminal. The first receiving terminal pair receives data compatible with a USB SSIC interface. The first transmitting terminal pair transmits data compatible with the USB SSIC interface. The MIPI/SSIC-PHY/Link layer receives data compatible with the USB SSIC interface from the first receiving terminal pair, and transmits data compatible with the USB SSIC interface to the first transmitting terminal pair. The function module transmits data with the MIPI/SSIC-PHY/Link layer by the transmission protocol of the USB SSIC interface. The power terminal provides at least one source voltage for the MIPI/SSIC-PHY/Link layer and the function module.

DETAILED DESCRIPTION

FIG. 1is a schematic view of an USB SSIC(Super Speed Inter-Chip) removable system according to an exemplary embodiment. The USB SSIC removable system1000includes an USB SSIC removable electronic device100and an adapter device400. The adapter device400has a slot402and the removable electronic device100is arranged to be contained in the slot402. The removable electronic device100is arranged to transmit and receive data by the transmission protocol of the USB SSIC interface. The adapter device400is arranged to convert the data compatible with the transmission protocol of the USB SSIC interface of the removable electronic device100into data compatible with the transmission protocol of a first interface to transmit to a host (not shown), and vice versa convert the data compatible with the transmission protocol of the first interface of the host into the data compatible with the transmission protocol of the USB SSIC interface to transmit to the removable electronic device100. In one of the embodiments, the first interface is Universal Serial Bus 3.0 interface (USB 3.0). In another embodiment, the first interface is a Universal Serial Bus 2.0 (USB 2.0) interface, but it is not limited thereto. It should be noted that the specification of Protocol Layer of the USB SSIC interface is same as the specification of Protocol Layer of the USB interface, the specification of PHY layer (Physical Layer) of the USB interface is different from the specification of PHY layer of USB SSIC interface, and the specification of Link layer of the USB interface is different from the specification of Link layer of the USB SSIC interface.

FIG. 2Ais a schematic view of a removable electronic device according to an exemplary embodiment. The removable electronic device100includes a pin set102, an MIPI/SSIC-PHY/Link layer (MIPI: Mobile Industry Processor Interface)104and a function module106. In this embodiment, the pin set102includes a first receiving terminal pair, a first transmitting terminal pair, a clock terminal, at least one power terminal and a ground terminal, but it is not limited thereto.

The first receiving terminal pair is arranged to receive the data RXD1+ and RXD1− which are compatible with the transmission protocol of the USB SSIC interface. The first transmitting terminal pair is arranged to transmit the data TXD1+ and TXD1− which are compatible with the transmission protocol of the USB SSIC interface. The power terminal is arranged to receive at least one source voltage which is arranged to provide to the MIPI/SSIC-PHY/Link layer104and the function module106for regular operating. In one of the embodiments, the pin set102has two power terminals including a first power terminal and a second power terminal, the first power terminal and the second power terminal are arranged to receive a first voltage VCC1and a second voltage VCC2, respectively, and the first voltage VCC1and the second voltage VCC2are arranged to provide the operating voltage for the different elements of the MIPI/SSIC-PHY/Link layer104and the function module106. Furthermore, the mechanism of using two different voltages (VCC1and VCC2) in different operating elements can improve work efficiency. In this embodiment, the first voltage terminal is arranged to receive a core voltage (Vcore), and the second voltage terminal is arranged to receive an I/O voltage (Vio). In other words, the first voltage VCC1is the core voltage (Vcore), and the second voltage VCC2is the I/O voltage (Vio), but it is not limited thereto. In other embodiments, the pin set102may have one power terminal. For example, the core voltage (Vcore) can be 2 volts, 3.9 volts, or any rational number between 2-3.9 can be regarded as the core voltage. The I/O voltage (Vio) can be 0.6 volts, 1.9 volts, or any rational number between 0.6-1.9 can be regarded as the I/O voltage. The clock terminal is arranged to receive a clock signal CLK arranged to be provided to the MIPI/SSIC-PHY/Link layer104and the function module106. It should be noted that, in one of the embodiments, the pin set102may not include the clock terminal. The ground terminal is arranged to be connected to a ground GND.

The MIPI/SSIC-PHY/Link layer104is coupled to the first receiving terminal pair and the first transmitting terminal pair of the pin set102. The MIPI/SSIC-PHY/Link layer104is arranged to receive the data RXD1+ and RXD1− which are compatible with the transmission protocol of the USB SSIC interface through the first receiving terminal pair, and transmit the data RXD1+ and RXD1− which are compatible with the transmission protocol of the USB SSIC interface to the function module106. Moreover, the MIPI/SSIC-PHY/Link layer104is arranged to receive the data TXD1+ and TXD1− which are compatible with the transmission protocol of the USB SSIC interface from the function module106, and transmit the data TXD1+ and TXD1− which are compatible with the transmission protocol of the USB SSIC interface to the first transmitting terminal pair. It should be noted that the MIPI/SSIC-PHY/Link layer104includes an MIPI PHY Layer1042and a SSIC Link layer1044, wherein the power requirement of the MIPI PHY Layer1042of SSIC is lower than the PHY layer of USB.

The function module106is coupled to the MIPI/SSIC-PHY/Link layer104, and the function module106is arranged to transmit data with the MIPI/SSIC-PHY/Link layer104by transmission protocol compatible with the USB SSIC interface. It should be noted that the specification of the protocol Layer of the USB SSIC interface is same as the protocol layer of the USB interface, the specification of the PHY layer (Physical Layer) of USB interface is different from the specification of the PHY layer of the USB SSIC interface, and the specification of the Link layer of the USB interface is different from the specification of the Link layer of the USB SSIC interface. In one embodiment, the function module106can be a memory module. The memory module includes a memory controller and a memory, but it is not limited thereto. The function module106can also be a wireless module, a bluetooth module, a near field communication module (NFC), a mobile communication module (3G/4G, LTE) and an I/O module.

FIG. 2Bis a top view and a side view of the USB SSIC removable electronic device ofFIG. 2Aaccording to an exemplary embodiment. In this embodiment, the removable electronic device100can be a thin card. The removable electronic device100includes a card body. The card body has a front edge202, a trailing edge204, a first surface208and a second surface206. Moreover, the card body has a groove212, a first side edge214and a second side edge216. The first side edge214is parallel to the second side edge216, and arranged to connect the front edge202and the trailing edge204. The groove212is arranged on a corner between the front edge202and second side edge216, that is a corner of the first surface208, as shown inFIG. 2B. It should be noted that the length H2of the groove212is 3.05 millimeters, a bevel edge between the connect the groove212and the second side edge216is arranged to connect the groove212and the second side edge216, the length H3of vertical distance between the groove212and the second side edge216is 1.35 millimeters, but it is not limited thereto. Moreover, the sum of the lengths H1, H2and H3is 15 millimeters, but it is not limited thereto. The width W1of the trailing edge204is 11 millimeters. It should be noted that the sum of lengths H1, H2and H3and the width W1is compatible with the Micro SD card. The first receiving terminal pair PRXD1+ and PRXD1−, the first transmitting terminal pair PTXD1+ and PTXD1−, the power terminal PVCC1and PVCC2, the clock terminal PCLK and ground terminal PGND of the pin set are arranged along a first axis Al on the first surface208and near the middle portion of the first surface208. In other embodiments, the pin set102may not include the clock terminal PCLK and/or the power terminal PVCC2. Moreover, in one of the embodiments, the pin set102not only includes the eight terminals, but also includes further includes a ninth terminal arranged along the first axis.

FIG. 3Ais a schematic view of an USB SSIC removable electronic device according to another exemplary embodiment. The removable electronic device100ofFIG. 3Ais similar to the removable electronic device100ofFIG. 2Aexcept for the pin set102. In this embodiment, the pin set102not only includes the first receiving terminal pair, the first transmitting terminal pair, and clock terminal, the at least one power terminal and a ground terminal, but also at least one second receiving terminal pair and at least one second transmitting terminal pair

The second receiving terminal pair is similar to the first receiving terminal pair and the second transmitting terminal pair is similar to the first transmitting terminal pair, wherein the second receiving terminal pair is arranged to receive the data RXD2+˜RXDN+ and RXD2−˜RXDN− which are compatible with the transmission protocol of the USB SSIC interface, and the second transmitting terminal pair is arranged to transmit the data TXD2+˜TXDN+ and TXD2−˜TXDN− which are compatible with the transmission protocol of the USB SSIC interface. Moreover, the details of the power terminal, the clock terminal and the ground terminal can be referred to inFIG. 2A.

The MIPI/SSIC-PHY/Link layer104is coupled to the first receiving terminal pair, the second receiving terminal pair, the first transmitting terminal pair and the second transmitting terminal pair of the pin set102. The MIPI/SSIC-PHY/Link layer104is arranged to receive the data RXD1+˜RXDN+ and RXD1−˜RXDN− which are compatible with the transmission protocol of the USB SSIC interface through the first receiving pair and the second receiving terminal pair, and transmit the data RXD1+˜RXDN+ and RXD1−˜RXDN− which are compatible with the transmission protocol of the USB SSIC interface to the function module106. Moreover, the MIPI/SSIC-PHY/Link layer104is further arranged to receive the data TXD1+˜TXDN+ and TXD1−˜TXDN− which are compatible with the transmission protocol of the USB SSIC interface from the function module106, and transmit the data TXD1+˜TXDN+ and TXD1−˜TXDN− which are compatible with the transmission protocol of the USB SSIC interface to the first transmitting terminal pair and the second transmitting terminal pair. It should be noted that the MIPI/SSIC-PHY/Link layer104includes an MIPI PHY Layer1042and a SSIC Link layer1044, wherein the power requirement of the MIPI PHY Layer1042of the USB SSIC interface is lower than that of the PHY layer of the USB interface. Moreover, the details of the function module106can be referred to inFIG. 2A.

FIG. 3Bis a top view and a side view of the USB SSIC removable electronic device ofFIG. 3Aaccording to an exemplary embodiment. The removable electronic device100ofFIG. 3Bis similar to the removable electronic device100ofFIG. 2Aexcept that the removable electronic device100ofFIG. 3Bfurther includes at least one second receiving terminal pair PRXD2+˜PRXDN+ and PRXD2−˜PRXDN− and at least one second transmitting terminal pair PTXD2+˜PTXDN+ and PTXD2−˜PTXDN−. The second receiving terminal pair PRXD2+˜PRXDN+ and PRXD2−˜PRXDN− and the second transmitting terminal pair PTXD2+˜PTXDN+ and PTXD2−˜PTXDN− are arranged along a second axis A2on the first surface208near the first axis A1, wherein the second axis A2is parallel to the first axis A1, and the first axis A1is disposed between the front edge202and the second axis A2. It should be noted that, in one embodiment, the first receiving terminal pair PRXD1+ and PRXD1−, the first transmitting terminal pair PTXD1+ and PTXD1−, the power terminal PVCC1, the PVCC2and the ground terminal PGND arranged along the first axis A1are staggered with the second receiving terminal pair PRXD2+˜PRXDN+ and PRXD2−˜PRXDN− and the second transmitting terminal pair PTXD2+˜PTXDN+ and PTXD2−˜PTXDN− arranged along the second axis A2. The other details can be referred to inFIG. 2B.

FIG. 4is a schematic view of an adapter device according to an exemplary embodiment. The adapter device400includes a slot402, a SSIC pin set404, a first interface pin set406, an interface converting device408and a power regulator410. The adapter device400is arranged to plug into a slot compatible with the first interface of a host (not shown), wherein the adapter device400is arranged to convert the data of the first interface and the USB SSIC interface, such that the removable electronic device100can exchange data with the host. In one embodiment, the first interface is a Universal Serial Bus 3.0 interface (USB 3.0). In another embodiment, the first interface can be Universal Serial Bus 2.0 (USB 2.0) interface, but it is not limited thereto. It should be noted that the specification of Protocol Layer of the USB SSIC interface is same as the specification of Protocol Layer of the USB interface, the specification of the PHY layer (Physical Layer) of the USB interface is different from the specification of the PHY layer of the USB SSIC interface, and the specification of the Link layer of the USB interface is different from the specification of the Link layer of the USB SSIC interface.

The slot402is arranged to contain the removable electronic device100compatible with the USB SSIC interface, as shown inFIG. 1-3B. It should be noted that those skilled in the art will recognize the design rule of the slot402by the descriptions ofFIG. 2B and 3B, but it is not limited thereto.

The SSIC pin set404is arranged inside of the slot402, wherein the SSIC pin set404is arranged to couple to the pin set102of the removable electronic device100. In this embodiment, the SSIC pin set404includes a first receiving pin pair, a first transmitting pin pair, at least one power pin and a clock pin, but it is not limited thereto. The first receiving pin pair is arranged to be coupled to the first receiving terminal pair PRXD1+ and PRXD1− of the removable electronic device100for receiving the data RXD1+ and RXD1− which are compatible with the transmission protocol of the USB SSIC interface from the interface converting device408and transmitting the data RXD1+ and RXD1− which are compatible with the transmission protocol of the USB SSIC interface to the removable electronic device100. The first transmitting pin pair is arranged to be coupled to the first transmitting terminal pair PTXD1+ and PTXD1− of the removable electronic device100for transmitting the data TXD1+ and TXD1− received from the removable electronic device100to the interface converting device408. At least one power pin(s) is(s) arranged to contact the power terminal PVCC1and PVCC2of the removable electronic device100for providing at least one source voltage produced by the power regulator410to the removable electronic device100. In one of the embodiments, the SSIC pin set404includes two power pins, such as the first power pin and the second power pin, but it is not limited thereto. The clock pin is arranged to electronically contact with the clock terminal PCLK of the removable electronic device100for providing a clock signal CLK to the removable electronic device100. It should be noted that, in one embodiment, the SSIC pin set404may not include the clock pin, but it is not limited thereto. The ground pin is arranged to be connected to a ground GND. Moreover, those skilled in the art will recognize the design rule of the position of the SSIC pin set404of the slot402by the descriptions ofFIG. 2B and 3B, but it is not limited thereto. For example, the first receiving pin pair, the first transmitting pin pair, the power pin, the clock pin and the ground pin are arranged along a first axis inside of the slot402.

The first interface pin set406is arranged to be electronically connected with the host. Those skilled in the art can design the layout of the first interface pin set406to the specification of the first interface, but it is not limited thereto. For example, when the first interface is a USB 2.0 interface, the first interface pin set406has four pins with predetermined positions. When the first interface is the USB 3.0 interface, the first interface pin set406has nine pins with predetermined positions, but it is not limited thereto.

The interface converting device408is coupled between the SSIC pin set404and the first interface pin set406, wherein the interface converting device408is arranged to convert the data compatible with a transmission protocol of the first interface and received from the host into data RXD1+ and RXD1− compatible with the transmission protocol of the USB SSIC interface for providing the converted data to the removable electronic device100, and the interface converting device408is further arranged to convert the data TXD1+ and TXD1− which are compatible with the transmission protocol of the USB SSIC interface and received from the removable electronic device100into data compatible with a transmission protocol of the first interface for providing the converted data to the host. It should be noted that, in some embodiments, the interface converting device408is further arranged to produce the clock signal CLK compatible with the transmission protocol of the USB SSIC interface.

The power regulator410is arranged to receive at least one input voltage compatible with the first interface, and convert the input voltage into at least one source voltage compatible with the USB SSIC interface for providing the source voltage to the removable electronic device100through the SSIC pin set404. In one embodiment, the power regulator410is arranged to convert the input voltage into a first voltage VCC1and a second voltage VCC2to provide the first voltage VCC1and the second voltage VCC2to the removable electronic device100through the first power pin and the second power pin of the at least one power pin. For example, the first voltage VCC1is a core voltage (Vcore), and the second voltage VCC2is the I/O voltage (Vio), but it is not limited thereto. In other the pin set102may have only one power terminal. For example, the core voltage (Vcore) can be 2 volts, 3.9 volts, or any rational number between 2-3.9 can be regarded as the value of the core voltage. The I/O voltage (Vio) can be 0.6 volt, 1.9 volt, or any rational number between 0.6-1.9 can be used for the volt number of the I/O voltage.

FIG. 5is a schematic view of an adapter device according to another exemplary embodiment. The adapter device400ofFIG. 5is similar to the adapter device400ofFIG. 4except for the SSIC pin set404.

The SSIC pin set404not only includes the first receiving pin pair, the first transmitting pin pair, the at least one power pin and the clock pin, but also includes at least one second receiving pin pair and at least one second transmitting pin pair. The at least one second receiving pin pair is similar to the at least one first receiving pin pair, the second receiving pin pair is arranged to electronically contact with the at least one second receiving terminal pair PRXD2+˜PRXDN+ and PRXD2−˜PRXDN− of the removable electronic device100for receiving the data RXD2+˜RXDN+ and RXD2−˜RXDN− which are compatible with the transmission protocol of the USB SSIC interface from the interface converting device408and transmitting the data RXD2+˜RXDN+ and RXD2−˜RXDN− which are compatible with the transmission protocol of the USB SSIC interface to the removable electronic device100. The at least one second transmitting pin pair is similar to the at least one first transmitting pin pair, the at least one second transmitting pin pair is arranged to electronically contact with the at least one second transmitting terminal pair PTXD2+˜PTXDN+ and PTXD2−˜PTXDN− of the removable electronic device100for transmitting the data TXD2+˜TXDN+ and TXD2−˜TXDN− which are compatible with the transmission protocol of the USB SSIC interface and received from the removable electronic device100to the interface converting device408.

The interface converting device408is coupled between the SSIC pin set404and the first interface pin set406, and arranged to conver the data which is compatible with the protocol of the first interface and received from the host into data RXD1+˜RXDN+ and RXD1−˜RXDN− which are compatible with the transmission protocol of the USB SSIC interface for providing the converted data to the removable electronic device100, and convert the data TXD1+˜TXDN+ and TXD1−˜TXDN− which are compatible with the transmission protocol of the USB SSIC interface and received from the removable electronic device100into data which is compatible with the protocol of the first interface for providing the host. It should be noted that the interface converting device408is further arranged to produce a clock signal CLK compatible with the USB SSIC interface. The other details can be referred to inFIG. 4.

The USB SSIC removable electronic device100of the embodiments may access data with higher speed (a single lane may reach 5 Gbps, and the speed of a multi-lane is a few times faster than the single lane according to the number of lane) by the USB SSIC interface. Furthermore, the layout of the removable electronic device100is compatible with the slot of Micro SD card, and the adapter device400can convert the data from the USB SSIC interface into data compatible with other interfaces.