Plating method and recording medium

An electroless plating process is performed on an Al layer, which is made of aluminum or an aluminum alloy, with an electroless plating liquid which is alkaline and contains a complexing agent. A plating method includes preparing a substrate 10 having a surface (for example, bottom surface of TSV 12) at which an Al layer 22 made of aluminum or an aluminum alloy is exposed; forming a zincate film 30 on a surface of the Al layer by performing a zincate treatment on the substrate; and forming a first electroless plating layer (for example, Co barrier layer 14a) on the surface of the Al layer with an electroless plating liquid (for example, Co-based plating liquid) which is alkaline and contains a complexing agent.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims the benefit of Japanese Patent Application No. 2015-096756 filed on May 11, 2015, the entire disclosures of which are incorporated herein by reference.

TECHNICAL FIELD

The embodiments described herein pertain generally to a technique of forming a Co plating layer on a surface of an Al (Aluminum) layer such as an Al wiring layer in a semiconductor device.

BACKGROUND

Copper (Cu) is a wiring material widely utilized in a BEOL (Back End of Line) of a semiconductor device such as an LSI. To form a Cu wiring layer, a barrier layer for suppressing diffusion of Cu into an insulating layer needs to be formed, and a seed layer for facilitating electrolytic plating of Cu also needs to be formed on the barrier layer by electroless Cu plating. Thus, a manufacturing cost increases. For the purposes of reducing the cost, aluminum (Al) of low cost is used as the wiring material at a portion where low electric resistance as low as that of Cu is not required.

In case of forming the Cu wiring layer connected to the Al wiring layer, the barrier layer needs to be formed to suppress Cu from being diffused into an ambient insulating layer which is made of a silicon-based material.

As a way to form the barrier layer on an inner surface of a deep hole such as TSV (Through Silicon Via) before burying the Cu wiring layer within the hole, there is known a method, such as PVD (Physical Vapor Deposition), using a film forming apparatus (see, for example, Patent Document 1). As another way to form the barrier layer on the inner surface of the deep hole, there is also known an electroless plating method. One of practical materials, which can be formed by the electroless plating method and have high barrier property against Cu, is cobalt or a cobalt alloy (hereinafter, referred to as “Co-based material”) (see, for example, Patent Document 2).

The present inventors have examined the application of Co-based electroless plating to the barrier layer for the Cu wiring layer connected to the Al wiring layer and has found out the following problems. A Co-based electroless plating liquid is alkaline and thus is capable of easily invading aluminum. Besides, the Co-based electroless plating liquid contains a complexing agent which is highly aggressive upon the aluminum. Thus, even if it is attempted to perform the Co-based electroless plating directly on the aluminum wiring layer, the underlying aluminum is first dissolved before the plating layer is grown. Thus, it is very difficult to form the Co-based plating layer on the aluminum wiring layer.

SUMMARY

In view of the foregoing, exemplary embodiments provide a technique of performing electroless plating on an Al layer, which is made of aluminum or an aluminum alloy, with an electroless plating liquid which is alkaline and contains a complexing agent.

In one exemplary embodiment, a plating method includes preparing a substrate having a surface at which an Al layer made of aluminum or an aluminum alloy is exposed; forming a zincate film on a surface of the Al layer by performing a zincate treatment on the substrate; and forming a first electroless plating layer on the surface of the Al layer with an electroless plating liquid which is alkaline and contains a complexing agent.

In another exemplary embodiment, there is provided a computer-readable recording medium having stored thereon computer executable instructions that, in response to execution, cause a plating system to perform the plating method.

According to the exemplary embodiments, since the zincate film allows the electroless plating film to be rapidly grown, it is possible to form the electroless plating layer on the aluminum layer even if the aluminum layer is damaged by the electroless plating liquid.

DETAILED DESCRIPTION

An exemplary embodiment to be described hereinafter is directed to a method of forming a Co barrier layer14made of cobalt or a cobalt alloy and a Cu wiring layer (buried wiring)16made of copper or a copper alloy within a TSV (Through Silicon Via)12which is a recess formed on a substrate10. In this method, the Co barrier layer14is formed by an electroless plating method, and the Cu wiring layer16is formed by a plating method.

The left half ofFIG. 1illustrates a state before the Co barrier layer14and the Cu wiring layer16are formed within the TSV12, and the right half ofFIG. 1shows a state after the Co barrier layer14and the Cu wiring layer16are formed within the TSV12.

FIG. 1is a simplified view of one of multiple layers of chips forming a semiconductor memory device to which a three-dimensional integration (3DI) technology is applied. This chip includes a circuit element18, such as a transistor, formed in FEOL (Front End of Line) and a wiring layer20formed in BEOL (Back End of Line).

The wiring layer20includes an Al wiring layer22made of aluminum or an aluminum alloy (typically, aluminum alloy containing several percentage (%) of Cu); and a Cu wiring layer24made of copper or a copper alloy. Actually, other layers such as a barrier layer and a seed layer are also formed under the Cu wiring layer24. Here, however, the other layers are not depicted inFIG. 1for the simplicity of illustration. As explained earlier in the background, the Al wiring layer22can be formed at a relatively low cost. Thus, the Al wiring layer is used at a portion where Cu, which has low electric resistance but high price, need not be used for the reason that there is a sufficient wiring volume, for example.

Since a method of forming the device structure shown in the left half ofFIG. 1is well known to a person having ordinary skill in the art, description thereof will be omitted herein. The following description will only focus on a technique related to the Co barrier layer14and the Cu wiring layer16within the TSV12.

The TSV12is formed through a silicon substrate (silicon wafer)26serving as a base of the substrate10and through a TEOS layer28formed on a bottom surface of the silicon substrate26. Both the silicon substrate26and the TEOS layer28are made of a silicon-containing insulating material (dielectric material). Here, instead of the TEOS layer28, a SIO2layer or a SiOC layer may be formed.

Since copper tends to easily diffuse into the silicon-containing insulating material, a barrier layer configured to suppress the diffusion of the copper needs to be formed when burying the Cu wiring layer16within the TSV12. As stated in the background, there has been proposed the method of using the Co barrier layer14, which is made of cobalt or a cobalt alloy and formed by the electroless plating method, as the barrier layer which is securely formed within the TSV12serving as the recess having a high aspect ratio and configured to suppress the diffusion of the copper (refer to Patent Document 2 (Japanese Patent Laid-open Publication No. 2013-194306)).

The Al wiring layer22is exposed at a bottom surface of the TSV12. As explained in the background as well, it is difficult to form the Co barrier layer14on the Al wiring layer22by the electroless plating method. The present example embodiment pertains to a plating method capable of solving this problem.

Now, referring toFIG. 2AtoFIG. 2F, a series of processes for forming the Co barrier layer14and the Cu wiring layer16within the TSV12will be elaborated.FIG. 2AtoFIG. 2Fprovide more simplified illustrations of the structure in the vicinity of the TSV12than the illustration shown inFIG. 1. That is,FIG. 2Aprovides a more simplified view in the vicinity of the TSV12in the left half ofFIG. 1.

First, by supplying an alkaline cleaning liquid (mainly containing NaOH) onto the substrate10, an oxide film on a surface of the Al wiring layer22, which is exposed within the TSV12, is removed. Thereafter, by performing a rinse process with pure water (DIW), the alkaline cleaning liquid and a reaction byproduct are removed from the substrate10.

Subsequently, by supplying an acidic chemical liquid for smut removal onto the substrate10, the smut (Al(OH)3) generated on the surface of the Al wiring layer22during the oxide film removing process is removed. Then, by performing a rinse process with pure water, the acidic chemical liquid and a reaction byproduct are removed from the substrate10.

Typically, the Al wiring layer (buried wiring layer) of the semiconductor device is made of an aluminum alloy containing several percentage (%) of Cu. Thus, since the smut does not contain impurities such as Si and Mg, the acidic chemical liquid for smut removal used herein need not contain hydrofluoric acid (which is typically contained in a general chemical liquid for smut removal). Further, it may be sufficient to use nitric acid diluted with water as the acidic chemical liquid for smut removal. This nitric acid diluted with water is advantageous in that damage on the silicon substrate26and the TEOS layer28can be reduced. The smut removing process may be performed by maintaining a state in which the surface of the substrate10is covered with, by way of non-limiting example, nitric acid (HNO3(aq)) having a concentration of 30% at a room temperature for 30 seconds.

Thereafter, by performing a zincate treatment on the substrate, a zinc (Zn) film (zincate film)30(seeFIG. 2B) is formed on the surface of the Al wiring layer22. Here, a double zincate treatment is performed.

The double zincate treatment includes: a first zincate process of precipitating Zn particles on the surface of the Al wiring layer22by supplying a zincate solution onto the substrate10; a first rinse process of removing the zincate solution and a reaction byproduct from the substrate10with pure water; a Zn stripping process of stripping the Zn particles, which are precipitated in the first zincate process, by supplying nitric acid (which may be the same one as used in the smut removing process) onto the substrate; and a second rinse process of removing the nitric acid and a reaction byproduct from the substrate10with pure water; a second zincate process of precipitating Zn particles on the surface of the Al wiring layer22by supplying the zincate solution onto the substrate10; and a third rinse process of removing the zincate solution and a reaction byproduct from the substrate10with pure water.

By performing the double zincate treatment, it is possible to precipitate finer Zn particles more densely, as compared to a case of performing a single zincate treatment (in which the zincate treatment ends in the first rinse process). In order to form a high-quality Zn film, it may be desirable to perform the double zincate treatment. However, it may be also possible to perform the single zincate treatment.

The zincate treatment is widely used to form an (electrolytic or electroless) Ni (Nickel) plating layer made of nickel or a nickel alloy on a base made of aluminum or an aluminum alloy. By the experiments conducted by the present inventors, it has been found out that a Co-based electroless plating layer can be well formed on the base made of aluminum or an aluminum alloy by performing the series of processes from the oxide film removing process to the zincate treatment under the same processing conditions (commonly known in the art) as those of the zincate treatment as a pretreatment for the Ni plating.

[First Co Barrier Layer Forming Process]

Subsequently, by supplying a Co-based electroless plating liquid onto the substrate10, a portion14aof the Co barrier layer14(seeFIG. 2C) is formed on the surface of the Al wiring layer22. Here, the Co barrier layer14ais formed of, for example, a CoWB-based plating liquid containing tungsten (W) and boron (B).

At this time, the Zn film30which covers the surface of the Al wiring layer22is substituted with the cobalt (or cobalt alloy), so that the cobalt (or cobalt alloy) is precipitated on the surface of the Al wiring layer22. Here, although the surface of the Al wiring layer22is slightly damaged by the Co-based electroless plating liquid, which is alkaline and contains the complexing agent having high aggressiveness upon the aluminum, the Co barrier layer14acan be precipitated at a sufficiently high speed to cover the surface of the Al wiring layer22. Accordingly, it is possible to form the Co barrier layer14on the surface of the Al wiring layer22successfully. After the Co barrier layer14ais formed, a rinse process is performed with pure water, so that residues such as a reaction byproduct and the plating liquid are removed from the substrate10.

In the first Co barrier layer forming process, the electroless plating is performed in the state that the zincate film (Zn particles) is formed only on the surface of the Al wiring layer22without being formed on the surfaces of the silicon substrate26and the TEOS layer28. Thus, within the TSV12, the Co barrier layer14agrows only from the surface of the Al wiring layer22. That is, Co barrier layer is not precipitated on the surfaces of the silicon substrate26and the TEOS layer28.

After the first Co barrier layer forming process is completed, the surface of the Al wiring layer22, which may be easily invaded by the Co-based electroless plating liquid, is not exposed within the TSV12. Therefore, subsequent processes (below catalyst layer forming process and processes thereafter) can be performed in a commonly known sequence.

Subsequently, a catalyst layer32(seeFIG. 2D) is formed within the TSV12. By way of example, the catalyst layer can be formed by forming a SAM (Self-Assembled Monolayer) by supplying an appropriate coupling agent such as a silane coupling agent or a titanium coupling agent onto the substrate10; supplying a catalyst ion-containing solution such as a palladium chloride solution onto the substrate10; and supplying a reducing agent such as DMAB (dimethylamine borane) onto the substrate10in sequence. Through this catalyst layer forming process, the catalyst layer32is formed on the entire surface of the substrate10including the surfaces of the silicon substrate26and the TEOS layer28which are exposed within the TSV12, i.e., an inner surface of the TSV12. After the catalyst layer is formed, a rinse process is performed with pure water, and the supplied chemical liquid (DMAB) and a reaction byproduct are removed from the substrate10. The method of forming the catalyst layer32is not limited to the aforementioned example, but various other known methods may also be employed. A catalytic metal contained in the catalyst layer32is not limited to palladium, and another metal such as, but not limited to, gold (Au), platinum (Pt) or ruthenium (Ru) capable of serving as the catalyst for a reduction/precipitation reaction of the electroless plating may be used instead.

[Second Co Barrier Layer Forming Process]

Then, by supplying the Co-based electroless plating liquid onto the substrate10, another portion14bof the Co barrier layer14(seeFIG. 2E) is formed within the TSV12by an electroless plating method. That is, the Co barrier layer14bis precipitated on the surfaces of the silicon substrate26and the TEOS layer28exposed within the TSV12. Further, the Co barrier layer14bis also formed on the Co barrier layer14aalready formed on the surface of the Al wiring layer22. Still further, since the catalyst layer is formed on the entire surface of the substrate10, the Co barrier layer14bis formed on the entire surface of the substrate10. After the Co barrier layer14bis formed, a rinse process is performed with pure water (DIW), and residues such as a reaction byproduct and the plating liquid are removed from the substrate10.

Thereafter, copper or a copper alloy (hereinafter, referred to as Cu) (seeFIG. 2F) is precipitated to serve as a seed layer on the Co barrier layer14by supplying a Cu-based electroless plating liquid onto the substrate10. Then, by burying Cu within the TSV12through electrolytic plating, a Cu wiring layer16is formed. Since the Co barrier layer14is formed on the entire surface of the substrate10, the Cu wiring layer16is formed on the entire surface of the substrate10. Further, depending on the size of a hole or recess (TSV12), it may be possible to form the Cu wiring layer16only by the electroless plating. After the Cu wiring layer16is formed, a rinse process is performed with pure water, so that residues such as a reaction byproduct and the plating liquid are removed from the substrate10.

Thereafter, unnecessary Cu plating layer on the surface of the substrate10(at the outside of the TSV12) is removed by CMP (Chemical Mechanical Polishing). Then, the series of processes are ended, and the state as illustrated in the right half ofFIG. 1is obtained.

According to the above-described example embodiment, by performing the zincate treatment, the plating film made of cobalt or a cobalt alloy, which has been difficult to form on the surface of the aluminum film or the aluminum alloy film, can be formed successfully by the electroless plating method.

Accordingly, the Al wiring layer, which is exposed at the inner surface of the high-aspect-ratio recess formed in the insulating layer of the semiconductor device, can be electrically connected via the Co barrier layer14to the Cu wiring layer16which is buried in the recess.

Now, a configuration example of a plating system configured to perform the processes from the oxide film removing process to the first Co barrier layer forming process (that is, processes performed until the Al wiring layer22is completely covered with the Co barrier layer14a) will be briefly explained. As one example, the plating system may be implemented by combining batch type liquid processing baths. In this case, as schematically illustrated inFIG. 3, the plating system100includes an alkaline cleaning bath102configured to perform the oxide film removing process; an acidic cleaning bath104configured to perform the smut removing process and the Zn stripping process; a zincate treatment bath106configured to perform the first zincate process and the second zincate process; a Co electroless plating bath108configured to perform the first Co barrier layer forming process; and a plurality of rinse processing baths110configured to perform the rinse processes after the respective chemical liquid processes.

Each bath may have the same configuration as a batch type liquid processing bath which is widely utilized in the field of semiconductor device manufacture, particularly, in the fields of chemical liquid cleaning, wet etching, and the like. That is, each bath is equipped with a substrate holder (not shown), which is called a wafer boat or the like and configured to hold a multiple number of substrates10(semiconductor wafers) in an upright posture while maintaining a gap therebetween in a horizontal direction. An arm of a substrate transfer device112is configured to transfer and deliver the substrate10between the substrate holder of each bath while maintaining the arrangement of the wafers as is set in the wafer holder. While held by the substrate holder, the substrates10are sequentially dipped in a processing liquid (chemical liquid, rinse liquid, plating liquid, etc.) stored in each bath for a preset time period, so that the above-described processes are performed on the substrates10.

An overall operation of the plating system100described above is controlled by a control device120having a computer. The control device120controls operations of the individual components of the plating system100by reading and executing various programs stored in a recording medium122, so that the above-described respective processes are performed. The recording medium122stores thereon various kinds of programs such as a control program and processing recipes required to perform the above-described series of processes. The recording medium122may be implemented by, but not limited to, a computer-readable memory device such as a ROM or a RAM, or a disk-type recording medium such as a hard disk, a CD-ROM, a DVD-ROM or a flexible disk, as commonly known in the art.

The series of processes from the oxide film removing process to the first Co barrier layer forming process may be performed by using one or more single-wafer type liquid processing units (not shown). Each single-wafer type liquid processing unit includes a spin chuck configured to hold and rotate a substrate10thereon horizontally; and a nozzle configured to supply a processing liquid such as the aforementioned chemical liquid, rinse liquid or plating liquid onto the substrate10which is held and rotated by the spin chuck. The series of processes from the oxide film removing process to the first Co barrier layer forming process may be performed by a single liquid processing unit, or may be performed by a plurality of liquid processing units while being divided.