Power control apparatus and method for power control

An apparatus includes: a memory and a first processor being configured to: control an operating frequency of a second processor connected to power supply devices that receive power from one or more power source systems to an operating frequency corresponding to a power value based on information on a number of power source systems and information on a number of uninterruptable power supplies connected to the power supply devices; and control, when the number of the power source systems is two or more and an uninterruptable power supply is connected to a power supply device in each of the power source systems, the operating frequency of the second processor to an operating frequency corresponding to a power value based on a number of power supply devices normally operating in a first power source system and a number of uninterruptable power supplies in a second power source system.

CROSS-REFERENCE TO RELATED APPLICATION

This application is based upon and claims the benefit of priority of the prior Japanese Patent application No. 2020-135997, filed on Aug. 11, 2020, the entire contents of which are incorporated herein by reference.

FIELD

The embodiment discussed herein is directed to a power control apparatus and a method for power control.

BACKGROUND

Some information processing apparatuses, such as servers and storage devices, have configurations in which power is received from two power source systems (hereinafter referred to as “two-system power reception”) in order to avoid power interruptions due to failure of Power Supply Units (PSUs) or power failure. With this configuration, when an abnormality, e.g., power failure, occurs in one of the systems, an information processing apparatus can continue its operation by using the power supplied from the other normal system.

Here, a system may mean one power supply source or a power supply path (e.g., a line) connected to the power supply source. Accordingly, a two system may mean two power supply sources that are different from each other, or two power supply paths (e.g., lines) connected to different power supply sources.

In an information processing apparatus including 2×N (N is a natural number) PSUs and carrying out two-system power reception in which each system uses N PSUs, a scheme has been known which controls the clock (operating) frequency of the processor such that the processor can be cooled and operated with the power suppliable by N PSUs. For example, the information processing apparatus controls the operating frequency of the processor so that the power consumption of the processor does not exceed the power suppliable by the N PSUs. Consequently, the event of a power failure of one system, the information processing apparatus operates using power supply of the other system.[Patent Document 1] Japanese Laid-open Patent Publication No. 2001-178018[Patent Document 2] Japanese Laid-open Patent Publication No. 2013-25343

SUMMARY

According to an aspect of the embodiments, a power control apparatus includes: a memory; and a first processor coupled to the memory. The first processor is configured to: control an operating frequency of a second processor connected to a plurality of power supply devices that receive power from one or more power source systems to an operating frequency corresponding to a power value based on information related to a number of power source systems in the plurality of power supply devices and information related to a number of uninterruptable power supplies connected to the plurality of power supply devices; and control, in a case where the number of the power source systems is two or more and an uninterruptable power supply is connected to a power supply device in each of the power source systems, the operating frequency of the second processor to an operating frequency corresponding to a power value based on a number of power supply devices normally operating in a first power source system and a number of uninterruptable power supplies in a second power source system different from the first power source system.

DESCRIPTION OF EMBODIMENT(S)

Even if including 2N PSUs, the above information processing apparatus described above has difficulty in operating the processor using power exceeding the power suppliable by N PSUs due to, for example, the specifications or constraints described above. In other words, it is difficult to operate the processor with performance commensurate with the capability of a power supply apparatus connected to the information processing apparatus in some cases.

Hereinafter, an embodiment of the present invention will now be described with reference to the accompanying drawings. However, the embodiment described below are merely illustrative and there is no intention to exclude the application of various modifications and techniques that are not explicitly described below. For example, the present embodiment can be variously modified and implemented without departing from the scope thereof. In the drawings to be used in the following description, like reference numbers denote the same or similar parts, unless otherwise specified.

[1] One Embodiment

[1-1] Comparative Example

FIG.1is a block diagram illustrating an example of a hardware (HW) configuration of a server100according to a comparative example of one embodiment. The server100includes processors101-1,101-2, Power Supply Units (hereinafter referred to as “PSUs”)102-1to102-4, a control unit103, and a cooling mechanism104. Hereafter, the processor101-1and101-2are denoted to be the processors101when not being distinguished from each other, and likewise the PSUs102-1to102-4are denoted to be the PSUs102when not being distinguished from one another.

For the purpose of two-system power reception as a premise, the server100includes 2N PSUs102that are N+N redundant (where, N is the number of PSUs102per system). In the example ofFIG.1, the server100has four PSUs102, i.e., for 2+2 redundancy (where N=2). Incidentally, in the example ofFIG.1, the PSU102-1and102-2are connected to a series-0 power source, and the PSU102-3and102-4are connected to a series-1 power source.

Each PSU102provides power supplied by a power source connected thereto to the components in the server100via a power supply path (see bold line inFIG.1). The processors101-1and101-2according to the comparative example operate, when a power failure occurs in one of the two power source systems, i.e., the series-0 power source and the series-1 power source, using the power supplied from the two PSUs102connected to the other power source.

The processors101, the control unit103, and the cooling mechanism104each include a power monitor. In cases where the sum of the power consumption monitored by the respective power monitors105exceeds the value of (“the number of operating PSUs102”×“the rated capacity of the PSU102”)/2, the control unit103determines that the configuration of N+N redundancy is impossible, and outputs a warning by, for example, displaying a warning on a monitor.

Thus, in the comparative example ofFIG.1, although the server100is provided with the facility of the two-system power reception, the N+N redundancy is determined to be impossible depending on the configuration of the processors101, and the advantage of the two-system power reception is sometimes not obtained.

In addition, on the premise of such two-system power reception, the following description assumes that the power consumption of the processor is limited to the rated capacity of the N PSUs, which is allowed for the two-system power reception. In this case, the two-system power reception is not necessarily needed, and a user who can satisfactorily accept the N+1 redundancy is not allowed to use a processor that operates at a higher operating frequency by consuming more power than the limited power.

In addition, even in the two-system power reception is prepared for a power failure, occurrence of a power failure for a long time is rare. For example, the expected outage time is about one hour in five years. For this reason, the operating frequency of the processor of a server having a 2×N PSUs is limited in such a value that the processor can operate and be cooled, using power suppliable by N PSUs during the entire period except for an expected outage time (for example, the period excluding one hour of prospective outage in five years).

In addition, when a dedicated power supply facility with power failure countermeasures is used in advance at a data center or the like, it is sufficient to consider only failures among a power failure and failures of the PSU. However, even in this situation, the operating frequency of the processor is limited in such a value that the processor can operate and be cooled, using power suppliable by the N PSUs as described above.

As a solution to the above, description will now be made in relation to a method of enhancing the throughput of a processor connected to multiple PSUs.

[1-2] Example of Configuration of One Embodiment

For example, a power control apparatus according to one embodiment enhances the throughput of the processor by controlling the operating frequency of the processor according to the power value determined on the basis of the number of power reception systems1oof the power supply units and the number of uninterruptible power supplies. Hereinafter, description will now be made in relation to the power control apparatus according to one embodiment.

[1-2-1] Example of Hardware Configuration:

FIG.2is a block diagram schematically illustrating an example of a HW configuration of the server1according to one embodiment. The server1is an example of an information processing apparatus or a computer. The server1may receive power from multiple power source systems (commercial power supplies, AC power supplies), and in the example illustrated inFIG.2, is assumed to receive power from two power source systems.

Focusing on the HW configuration related to power control, the server1may illustratively include processors2-1and2-2, a controller3, fans4-1and4-2, and PSUs60-1to60-nand61-1to61-n. The PSUs60-1to60-nand61-1to61-nmay be connected to a power source (series-0 power source or series-1 power source) via Uninterruptible Power Supplies (UPSs)70-1to70-mand71-1to71-m. At least one of the PSUs60-1to60-nand61-1to61-nmay be connected to a power source without going through the UPSs70-1to70-mand71-1to71-m. Each power source may be provided with distribution board80or81.

In the following description, the processors2-1and2-2are denoted to be the processors2(second processor) when not being distinguished from each other, and likewise the fans4-1and4-2are denoted to be the fans4when not being distinguished from each other. In addition, the PSUs60-1to60-nare denoted to be the PSUs60when not being distinguished from each other, the PSUs61-1to61-nare denoted to be the PSUs61when not being distinguished from each other, and the PSUs60and61are denoted to be the PSUs6when not being distinguished from each other. InFIG.2, the PSUs60-1to60-nare denoted to be the PSUs #0-1 to PSU #0-n, respectively, and the PSUs61-1to61-nare denoted to be the PSUs #1-1 to PSU #1-n, respectively. In addition, the UPSs70-1to70-mare denoted to be the UPSs70when not being distinguished from each other, the UPSs71-1to71-mare denoted to be the UPSs71when not being distinguished from each other, and the UPSs70and71are denoted to be the UPSs7when not being distinguished from each other. InFIG.2, the UPSs70-1to70-mare denoted to be UPSS #0-1 to UPS #0-m, and the UPSs71-1to71-mare denoted to be UPSs #1-1 to UPS #1-m. When not being distinguished from each other, the distribution board80and81are denoted to be distribution boards8.

Each processor2is an example of an Integrated Circuit (IC) that operates using power supplied to the server1in order to perform various controls and arithmetic operations, and is also an example of an operation processing device. The processor2may be a multi-core processor having multiple cores.

Examples of the processor2may be any one of Integrated Circuits such as a Central Processing Unit (CPU), a Micro Processing Unit (MPU), a Graphics Processing Unit (GPU), a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), and a Programmable Logic Device (PLD), such as (e.g., Field Programmable Gate Array (FPGA)), or a combination of two or more of these ICs.

The controller3is an example of a control device for monitoring, managing, and controlling various components in the server1. Focusing on the function related to power control, the controller3is an example of a power control apparatus that controls the operating frequency of each processor2and the rotation speed of each fan4, and the like. The controller3may include a Service Processor (SVP)3a, a memory3b, and a storage device3c.

The service processor3a(first processor) is an Integrated Circuit (IC) that performs various controls and arithmetic operations related to the power in the server1. The service processor3ais an example of a processor that performs power control in the controller3.

The memory3bis an example of a storage area and may include a storage area that stores a program to be executed by the service processor3aand data. Examples of the memory3binclude one or both of a volatile memory such as a Dynamic Random Access Memory (DRAM) and a non-volatile memory such as Persistent Memory (PM).

The storage device3cis an example of a HW device that stores various types of data and information such as a program. Examples of the storage device3cincludes a magnetic disk device such as a Hard Disk Drive (HDD), a semiconductor drive device such as a Solid State Drive (SSD), and various storing devices such as a nonvolatile memory. Examples of the nonvolatile memory include a flash memory, a Storage Class Memory (SCM), and a Read Only Memory (ROM).

The storage device3cmay also store a program (power control program: not illustrated) that achieves all or some of the various functions of the service processor3a. For example, the service processor3acan achieve the function of a power control unit30illustrated inFIG.3by expanding the program stored in the storage device3conto the memory3band executing the expanded program.

The fan4is an example of a cooling mechanism or a cooling unit that cools the processor2. For example, each fan4may cool the processor2at a fan rotation speed corresponding to an input voltage controlled by the service processor3a. In addition to the fans4, the server1may include a fan that cools the internal space and other components of the server1.

Multiple components (modules) in server1, including the processors2, the controller3, and the fans4, may be communicably coupled to each other via a bus.

A PSU6is an example of a power supply device or power supply unit. Each PSU6may carry out AC/DC conversion and conversion to a voltage suitable for each component on the power supplied from the distribution board8through the UPS7(or directly from distribution board8), and supply each component with the converted power through the power supply path (see bold line inFIG.1). For example, the PSU6may provide power after undergoing the voltage conversion to each component via a mounting board (e.g., a system board) of the component.

A UPS7is a power storage device that accumulates power and is an example of a power supply (battery). For example, the UPS7accumulates the power supplied by the power source and supplies power to the PSU6being connected thereto. In cases where the power supply from the power source stops, the UPS7supplies power accumulated therein to the PSU6.

As illustrated inFIG.2, a power supply group including the UPSs70supplied with power by the series-0 power source and the PSUs60is referred to as a series-0 power unit50. Also, a power supply group including the UPSs71supplied with power by the series-1 power source and the multiple PSUs61is referred to as a series-1 power unit51.

The server1, for example the controller3, may be configured to be communicable with each UPS7via a network9, such as a Local Area Network (LAN).

[1-2-2] Example of Functional Configuration of Controller:

Next, description will now be made in relation to an example of the functional configuration of the above-described controller3.FIG.3is a block diagram schematically illustrating an example of the functional configuration of the power control unit3according to one embodiment. For example, the controller3may achieve the function of the power control unit30by the service processor3aexpanding a program stored in the storage device3conto the memory3band executing the expanded program.

As illustrated inFIG.3, focusing on the function related to power control, the power control unit30may illustratively include a processing unit31and a memory unit35.

The memory unit35is an example of a storage area or a storing device, and stores various information pieces related to power control. In one embodiment, the memory unit35may be implemented by a storage area that at least one of the memory3band the storage device3cillustrated inFIG.2has. The memory unit35may store power supply configuration information35aand a power value setting table35b.

The processing unit31may illustratively include an obtaining unit32, a determining unit33, and a setting unit34.

The obtaining unit32obtains the power supply configuration information35aby, for example, collecting and stores the obtained power supply configuration information35ainto the memory unit35. Furthermore, the obtaining unit32obtains the power value setting table35bby, for example, reading from the storage device3c(seeFIG.2), and stores the obtained power value setting table35binto the memory unit35.

The determining unit33makes determination based on the information stored in the memory unit35to control the operating frequencies of the processors2and the rotation speeds of the fans4, and outputs the determination result to the setting unit34.

The setting unit34sets the operating frequencies of the processors2and the rotational speeds of the fans4on the basis of the determination result obtained from the determination unit33(see “SET OPERATING FREQUENCY OF PROCESSOR” and “SET ROTATION SPEED OF FAN” inFIG.3).

The processing unit31described above is an example of a control unit. Among the elements in the processing unit31, the determining unit33and setting unit34, for example, may set the operating frequency of each processor2connected to the multiple PSUs6each of which receives power from one or more power sources of one or more power source systems to a value corresponding to a power value determined on the basis of the following information. The information may include information about the number of systems in the multiple PSUs6and information about the number of UPSs7connected to the multiple PSUs6.

By way of example, in cases where the number of systems is two or more and one or more PSUs6of each system are each connected to one or more UPSs7, the setting unit34may control the operating frequency of each processor2to an operating frequency corresponding to a power value determined based on the number of PSUs6normally operating in a first system and the number of UPSs7in the second system, which differs from the first system.

For example, the following description assumes that the two systems are both normal (no power failure occurs) in the two-system power reception ofFIG.2. In this case, the setting unit34may control the operating frequency based on the sum of the power value corresponding to the number of PSUs6normally operating in the first system and the power value corresponding to the number of UPSs7in the second system.

The first and second systems may be determined in the following manner. For example, between the power value corresponding to the number of PSUs6in the 0-series system and also to the number of the UPSs7in the 1-series system and the power value corresponding to the number of PSUs6in the 1-series system and also to the number of the UPSs7in the 0-series system, the system having the PSUs6consisting of the smaller power value may be regarded as the first system and the system having the UPSs7consisting of the smaller power value may be regarded as the second system. In this case, the setting unit34may control the operating frequency of the processor2on the basis of (corresponding to) the smaller one of the power value suppliable by (based on) the number of PSUs6in the 0-series system and also suppliable by (based on) the number of the UPSs7in the 1-series system and the power value suppliable by the number of PSUs6in the 1-series system and also suppliable by the number of the UPSs7in the 0-series system.

As illustrated inFIG.2, in cases where the number of PSUs6normally operating is n and the number of UPSs7is m in both the series-0 and series-1 systems, the first and second systems may not be distinguished from each other. In this case, the setting unit34may control the operating frequency of each processor2based on (corresponding to) the sum of the power value suppliable by (based on) the number n of PSUs6normally operating in each system and a power value suppliable by (based on) the number m of UPSs7in each system.

Incidentally, as illustrated inFIG.4, the number of UPSs7in each of the series-0 and series-1 systems may be the same as the number of PSUs6in the system. In this case, m can be replaced with n, i.e., m−n. For example, the setting unit34may control the operating frequency of each processor2on the basis of the sum of the power value suppliable by the number n of PSUs6and the power value suppliable by the number n of UPSs7, which means the number2ncorresponding to the twice the number of PSUs6.

For simplicity, the following description assumes that the number of PSUs6normally operating is n and the number of UPSs7is m in both the series-0 and series-1 systems.

Thus, in cases where the two systems are both normal in the two-system power reception, each processor2can be operated at an operating frequency higher by an operating frequency corresponding to the power supplied from the UPSs7in the second system than an operating frequency corresponding to the power from the PSUs6normally operating in the first system.

Next, the following description assumes that a power failure occurs in one of the two systems in the two-system power reception ofFIG.2. In this case, the setting unit34may control the operating frequency based on a power value suppliable by the number of PSUs6normally operating in the first system.

Here, in cases where a power failure occurs in one system in the two-system power reception ofFIG.2, the m UPSs7in the other system can supply the server with power as much as m PSUs6within a predetermined time (e.g., 10 minutes) after the occurrence of the power failure. This means that the server1is supplied with a power as much as (n+m) PSUs6from the n PSUs6of the normal system and the UPSs7of the other system in which the power failure occurs within a predetermined time from the occurrence of the power failure in the one system.

Further, the power consumption of the server1is controlled such that the server is able to operate with the supplied power of (n+m) PSUs6prior to the occurrence of the power failure, as described above. Accordingly, the setting unit34satisfactorily controls the operating frequency of the processor2based on a power value suppliable by the n PSUs6normally operating in the first system within the predetermined time. As the above, in cases where a power failure occurs in one system in the two-system power reception, the server1may gradually (e.g., stepwise) control the operating frequency of each processor from the operating frequency controlled prior to the occurrence of the power failure to the operating frequency based on the power value supplied by the PSUs6operating in the normal system.

As described above, the server1according to one embodiment can enhance the throughput of the processor2while utilizing the redundant configuration of the power units50and51in the two-system power reception.

Further, in cases where an abnormality of the system, for example, a power failure, occurs in the server1having a configuration of a one-system power reception, it is difficult to continuously operate the server1. Therefore, only abnormalities of PSUs6among system failures and the PSU6failures should be considered for the one-system power reception. Therefore, the setting unit34controls, for example, the operating frequency of each processor based on a power value suppliable by the PSUs6as many as the value obtained by subtracting one from the number of PSUs6normally operating in the one-system power reception. This makes it possible to maximize the throughput of the processor2to the extent that the operation of the server1can be continued even if a failure occurs in one PSU6in such one-system power reception.

[1-3] Description of Power Control Unit

Hereinafter, description will now be made in relation to an example of the process by the power control unit30.

The obtaining unit32obtains the power supply configuration information35athrough one of or both the power supply path and the network9. The power supply configuration information35amay include information about the number of power reception systems and information about the number of UPSs7.

The information about the number of power reception systems may be obtained by, for example, transmitting and receiving a high-frequency signal (test signal) for testing between the PSUs6each not being connected with the UPSs7. For example, the service processor3athat executes the obtaining unit32may transmit a high-frequency signal from a transmitting circuit between the PSUs60each not being connected with the UPSs7and determine whether or not the high-frequency signal is received by a receiving circuit. This can determine whether the PSU60of the transmitting side of the high-frequency signal is in the same system of the PSU60on the receiving side of the signal, in other words, determine the number of systems. Incidentally, the transmitting circuit and the receiving circuit may be provided on the PSU60of the transmitting side and the PSU60of the receiving side, respectively.

In one embodiment, the high frequency signal may be transmitted through a power supply path (power line). Further, in place of a simple configuration using a transmitting circuit and a receiving circuit, for example, the number of systems may be obtained by communication of a test signal or a control signal through power line communication (PLC) or by communication via a network such as LAN.

FIG.5is a diagram illustrating an example of a process of obtaining the power supply configuration information35aunder a state of the number of power reception systems when the server1receives power from a single power source system. In the example ofFIG.5, each of the PSUs60-1to60-4may be connected to one power source via a distribution board80in the sever1.

As illustrated inFIG.5, the obtaining unit32implemented by the service processor3atransmits a test signal from the PSU60-2to the PSU60-4through the power supply path. The test signal is received by the PSU60-4via distribution board80(see dashed line inFIG.5). The PSU60-4transmits whether or not the test signal is successfully received to obtaining unit32. The communication between the service processor3aand the PSUs60may be performed via a network, a control line, or a power supply path. The same is applied to the description of followingFIGS.6and7.

Although the example ofFIG.5assumes that a test signal is transmitted from the PSU60-2to the PSU60-4, the service processor3amay, for example, transmit a test signal for each combination of the PSUs60each not being connected with the UPS7. Alternatively, the service processor3amay broadcast a test signal from any PSU60not being connected with the UPS7. The same is applied to the description of followingFIGS.6and7below.

FIG.6is a diagram illustrating an example of a process of obtaining the power supply configuration information35ain the number of power reception systems when the server1receives power from two power source systems. In the example ofFIG.6, in the server1, the PSUs60-1and60-2may be connected via the distribution board80to the series-0 power source and the PSUs61-1and61-2may be connected via the distribution board81to the series-1 power source. In the example ofFIG.6, the PSUs6are each not connected with a UPS7.

As illustrated inFIG.6, the obtaining unit32implemented by the service processor3atransmits a test signal from the PSU60-2to the PSU61-2through the power supply path. Since the PSU60-2and the PSU61-2are connected to different distribution boards8, the test signal is not received by the PSU61-2(see dashed line inFIG.6). The PSU61-2transmits the receivability representing whether or not the test signal is successfully received to obtaining unit32.

FIG.7is a diagram illustrating an example of a process of obtaining the power supply configuration information35aunder a state of the number of power reception systems when the server1receives power from two power source systems. In the example ofFIG.7, in the server1, the PSUs60-1and60-2may be connected via the distribution board80to the series-0 power source and the PSUs61-1and61-2may be connected via the distribution board81to the series-1 power source. The UPS70-1may be connected between the PSU60-1and the distribution board80, and the UPS71-1may be connected between the PSU61-1and the distribution board81.

As illustrated inFIG.7, the obtaining unit32implemented by the service processor3atransmits a test signal from the PSU60-2to the PSU61-2through the power supply path. Since the PSU60-2and the PSUS61-2are connected to different distribution boards8, the test signal is not received by the PSU61-2(see dashed line inFIG.7). The PSU61-2transmits the receivability to obtaining unit32.

The obtaining unit32sets the information related to the number of power reception systems in the power supply configuration information35aon the basis of the receivability obtained by the manner exemplified inFIGS.5to7. For example, in cases where the receivability indicates “receivable”, the obtaining unit32may set the number of power reception systems being one in the power supply configuration information35a. Further, in cases where the receivability indicates “unreceivable”, the obtaining unit32may set the number of power reception systems being two in the power supply configuration information35a. For example, obtaining unit32may determine that the number of power reception systems is one (one-system power reception) in the example ofFIG.5, and determine that the number of power reception systems is two (two-system power reception) in the examples ofFIG.6andFIG.7.

In addition, in cases where the number of power reception systems are determined to be three or more on the basis of the combinations of the PSUs60each for which receivability is obtained, the obtaining unit32may set the number of power reception systems being three or more and the relationship of the PSUs60and each system in the power supply configuration information35a.

The information about the number of UPSs7may be obtained, for example, by the service processor3amonitoring each UPS7via a network9such as a LAN. Any known method of monitoring the presence or absence of a UPS7and the state of the UPS7may be applied to the manner of obtaining the information. For example, the obtaining unit32may set the absence of an UPS7in any system of the examples ofFIGS.5and6in the power supply configuration Information35a. Further, the obtaining unit32may set the presence of a single UPS7in each system of the example ofFIG.7in the power supply configuration information35a.

The obtaining unit32stores the power supply configuration information35aobtained (generated) in the above-described method into the memory unit35.

In addition, the obtaining unit32reads the power value setting table35bfrom the storage device3c, and stores the obtained power value setting table35binto the memory unit35.

The power value setting table35bis an example of power value setting information that associates the number of power source systems, the number of UPSs7, and the operating frequency to be set in the processor2with one another. The power value setting table35bmay be generated in advance according to the manner of power reception of the servers1and stored in the storage device3c.

FIG.8is a diagram illustrating an example of the power value setting table35b. The power value setting table35bassociates, for example, a power reception system number (the number of power reception systems), configuration information of the server1, and consumption power of the sever1with one another.

As illustrated inFIG.8, the power value setting table35bmay include the fields of “two-system power reception” and “one-system power reception” as the number of power receiving systems, and the field of “two-system power reception” may include the fields of “presence of UPS” and “absence of UPS.”

The power value setting table35bmay include fields of “processor operating frequency (GHz)”, “fan rotation speed (rpm)”, “consumption power of remaining components (kW)”, and “total consumption power (kW)” depending on “operable PSU number” and “UPS number of the system”. In the fields of the “operable PSU number”, the items of “normal power supply” by an operable PSU6, and “power supply within ten minutes from the occurrence of power failure (kW)” and “power supply after ten minutes from the occurrence of power failure (kW)” under a state of “presence of UPS” may be set. The field of the “consumption power (kW)” may be set for the fields of “processor operating frequency” and “fan rotation speed”. In addition, under a state of “presence of UPS”, corresponding values when “normal” and “when power failure” may be set in each of the “processor operating frequency”, the “fan rotation speed”, the “consumption power of remaining components” and the “total consumption power”.

Incidentally, in the description ofFIG.8below, as a premise, it is assumed that each PSU6can supply power of 1 kW, and the UPS7supplies power suppliable by a single PSU6at the time of power failure, which means a single UPS supplies power of 1 kW.

In the embodiment ofFIG.8, in the field of the “processor operating frequency”, a value corresponding to the power value based on the power reception system number and the number of the UPSs7may be set. Similarly, in the fields of the “fan rotation speed” and “consumption power of remaining components”, respective values corresponding to the power value based on the power reception system number and the number of UPSs7may be set. The sum of “processor operating frequency”, “fan rotation speed” and “consumption power of remaining components” may be set in “total consumption power”. In other words, regarding the power (or the power equal to or less than this) based on the power reception system number and the number of UPSs7as the “total consumption power”, the “total power consumption” is distributed to the “processor operating frequency”, the “fan rotation speed” and the “consumption power of remaining components”.

As an example, in cases where an abnormality exemplified by power failure occurs under a state of the “one-system power reception”, it is difficult to continue the operation the server1. Accordingly, among the abnormality in the system and a failure of the PSU6, only the failure of the PSU6is satisfactorily considered in the “one-system power reception”. Therefore, in the “one-system power reception”, the “total consumption power” may be set to, for example, a value equal to or less than “k−1 (k is the number of normal PSUs6, where k≤2n)”×“P [W]”. Incidentally, the term P [W] is a supplied power value per one PSU6. In the example ofFIG.8, the fields of the “one-system power reception” may include the values of two, three, and four as the operable PSU6number.

For example, when the “operable PSU number” is “4”, the maximum power that the PSU6can supply is [4.0 kW] (see “normal power supply”). In this case, the power (“total consumption power”) supplied to the components in the server1may be set to the power value [3.0 kW], which is supplied by the three (i.e., four minus one) PSUs6, in case of failure of one of the PSUs6. The power value supplied by the three PSUs6is distributed to the processors2, the fans4, and the other components.

Incidentally, since the operating frequency of the processor2and the rotation speed of the fan4are correlated with the consumption power, the operating frequency or the rotation speed corresponding to the consumption power or the consumption power corresponding to the operating frequency or the rotation speed can be obtained. For example, when the operating frequency of the processor2is [3 GHz], the consumption power is [1.5 kW].

As other example, in cases where an abnormality exemplified by a power failure occurs in one of the systems under a state of “two-system power reception and the absence of UPS”, the server1is supplied with power from only the other system (a single system) of the two systems. Therefore, in the “two-system power reception and the absence of UPS”, the “total consumption power” is satisfactorily be set to, for example, a value equal to or less than “the number of normal PSUs6(≤n)”×“P [W]”.

In the embodiment ofFIG.8, since the “number of operable PSUs” under a state of “two-system power reception and the absence of UPS” is (2+2), the power (“total consumption power”) supplied to the components (“total consumption power”) in the server1may be set to the power value [2.0 kW] supplied by the two PSU6in a single system. The power provided by the two PSUs6is distributed to the processors2, the fans4, and the other components.

As other example, in cases where an abnormality exemplified by a power failure occurs in one of the systems under a state of “two-system power reception and the presence of UPS”, the server1is supplied with the power from the UPSs7from the failed system in addition to from the PSUs6of the other system in a predetermined time after the occurrence of the power failure. Therefore, in the “two-system power reception and the presence of UPS”, if the m UPSs7(1≤m≤n−1) are connected to each system, the “total consumption power” is satisfactorily set to be equal to or less than the sum (n+m) of the power suppliable by the number n of PSUs6of each system and the power suppliable by the number m of UPSs7.

In the case ofFIG.8, since the “operable PSU number” is four in total, the maximum power that can be supplied by the all the PSUs6is (4.0 kW) (see “normal power supply”). In this case, the power (“total consumption power”) supplied to the components in the server1when a normal state or in ten minutes after the occurrence of power failure may be set to the power value [3.0 kW] corresponding to the sum of two PSUs2in each system and one UPS in each system. The power provided by the three PSUs6is distributed to the processors2, the fans4, and the other components.

In addition, it is sufficient to set the “total power consumption” to be equal to or less than “the normal number of PSU6(≤n)”×“P [W]” after 10 minutes from the occurrence of a power failure in the “two-system power reception and the presence of UPS”. In the example ofFIG.8, the power (“total consumption power”) supplied to the components in the server1may be set to the power value [2.0 kW] suppliable by the two PSUs of the each system.

From the above, even when one of the power systems undergo a power failure, power that is greater in amount than that suppliable by the number of PSUs6of the respective systems can be used within the server1while maintaining a redundant configuration of the two-system power reception within a predetermined period of time from the occurrence of a power failure. The period during which a UPS6can supply power to the server1after the occurrence of the power failure is a grace period for performing control to reduce the consumption power in the server1to the equivalent of one-system power reception. Therefore, when a power failure occurs, the power consumption of the server1is reduced stepwise, thereby suppressing a sudden drop of the throughput of the processors2.

From the above, in the two-system power reception, it is possible to supply the power of more than the power suppliable by the PSU6number included in each system to the server1in the normal state and within a predetermined time after the occurrence of the power failure.

By holding the power value setting table35bin advance, the server1is allowed to easily and rapidly control the operating frequency and the rotation speed depending on the configurations of the system and the power supply.

Incidentally, the power value setting table35bmay omit the items surrounded by [ ] in the example ofFIG.8.

The determining unit33may determine the power reception system of the server1, and the presence or absence of a UPS7connected to each system with reference to the power supply configuration information35a, and output the determination result to the setting unit34.

For example, the determining unit33refers to the power supply configuration information35aandsdetermines whether or not the power reception configuration of the server1is in the state of the one-system power reception. In cases where the power reception configuration is not in the state of the one-system power reception, the determining unit33determines whether or not one or more UPS7are connected to each PSU6of each system. Further, when the power reception state of the server1is the one-system power reception, the determining unit33determines whether or not the one-system power reception state is caused by power failure of one-system in the two-system power reception and determines the number of PSUs6normally operating. The determination unit33transmits the determination result to the setting unit34.

In cases where the number of PSUs6normally operating is determined to be one, the determining unit33may output a message prompting maintenance so that two or more PSUs6come to operate normally. The message may be output visually or audibly by an output device (not illustrated) provided in the server1, may be stored in the memory unit35, or may be transmitted to a terminal or the like.

Further, in cases where a failure of the PSUs6is detected after the number of PSUs6normally operating is determined to be two or more, the determining unit33again determines whether or not the server1is in the state of the one-system power reception on the basis of the power supply configuration information35aand determines whether or not the number of PSUs6normally operating is two or more.

The setting unit34sets, based on the determination result obtained from the determining unit33, the “processor operating frequency” and the “fan rotation speed” in the processor2and the fan4, respectively, with reference to the power value setting table35bstored in the memory unit35.

[1-4] Example of Operation

Next, description will now be made in relation to an example of operation of power control according to the one embodiment having the above configuration with reference toFIGS.9and10.FIG.9is a flowchart illustrating an example of the operation of the server1, andFIG.10is a flowchart illustrating an example of the operation of the power control unit30.

[1-4-1] Example of Operation of the Server:

As illustrated inFIG.9, the controller3makes the initial setting of the overall system in the server1including the processors2(Step S1).

The controller3waits for receiving a command for starting the processors2(e.g., reception of a command or input from a panel) (Step S2, NO in Step S2).

Upon receipt of the command for starting (YES in Step S2), the controller3rotates each fan4at a predetermined rotation speed (Step S3). The controller3also operates each processor2at a predetermined operating frequency (Step S4).

The controller3controls the operating frequency of the processor2and the rotation speed of the fan4(Step S5). Details of the process performed in Step S5will be described below with reference toFIG.10.

The controller3monitors the presence of a command for stopping the processor2from the operator (e.g., reception of a command or input from a panel) (Step S6).

Upon receipt of a command for stopping (YES in Step S6), the controller3stops the operation of the processor2(Step S7), stops the rotation of the fan4(Step S8), and the process proceeds to Step S2.

On the other hand, in cases where the controller3does not receive the command for stopping (NO in Step6), the controller3determines whether or not an error has been detected in the server1including processor2(Step S9). If no error is detected (NO in Step S9), the process proceeds to Step S5.

If an error is detected (YES in Step S9), the controller3starts a process to deal with the error (Step S10), and the process proceeds to Step S5. The process to deal with the error may include at least one of the following (1) and (2).

(1) A process of supporting hot swapping of a component such as a failed PSU6. Incidentally, the process of supporting hot swapping may include a step of outputting a message prompting the operator to carry out hot swapping and a step incorporating the replaced normal product into the system.

(2) A process to monitor power restoration in the event of occurrence of a power failure.

(1-4-2) Example of Operation of the Power Control Unit:

Next, description will now be made in relation to an example of an operation of the power control unit30in Step S5ofFIG.9. As illustrated inFIG.10, the obtaining unit32of the processing unit31reads the power value setting table35bfrom the storage device3c(Step S1l), and stores the read table35binto the memory unit35.

The obtaining unit32also collects power supply configuration information35aabout the power reception system number and the number of UPSs7connected to PSUs6, and stores the collected power supply configuration information35ainto the memory unit35(Step S12). Incidentally, in the process of Step S12, as information about, for example, the PSUs6, the UPSs7, and the systems, information obtained in the processes of Steps S9and S10ofFIG.9, or information obtained by other process may be further stored in the memory unit35.

Incidentally, the processes of Steps S11and S12may be omitted if Step S5inFIG.9has already been executed after the start of the server1. Further, even if Step S5has already been executed, in cases where the power supply configuration is changed due to the occurrence of, for example, failure of a PSU6or a UPS7or a power failure of the system, the process of Step S12may be executed.

The determining unit33determines whether or not the server1is in a state of the one-system power reception on the basis of the power supply configuration information35astored in the memory unit35(Step S13).

In cases where the server1is not in a state of the one-system power reception (NO in Step S13), the determining unit33determines whether each system includes one or more PSUs6each connected to one or more UPSs7(Step S14).

In cases where one or more PSUs6are each connected to one or more UPSs7(YES in Step S14), the setting unit34refers to the power value setting table35b. Then, the setting unit34reads the operating frequency and the rotation speed based on the power value suppliable by the sum of the number of PSUs6normally operating in one system and the number of UPSs7of the other system from the power value setting table35b, and sets the operating frequency and the rotation speed in the processor2and the fan4, respectively.

For example, the following description assumes that the two systems both have the number n of PSUs6and the number m of UPSs7. In this case, the setting unit34reads the operating frequency and the rotation speed based on the power value suppliable by the sum n+m of the number n of PSUs6normally operating (i.e., normal PSU number) in each system and the number m of UPSs7connected to the PUSs6in each system from the power value setting table35b(seeFIG.8). Then, the setting unit34sets the read operating frequency and the rotation speed in the processor2and the fan4, respectively (step S15), and the process of Step S5ofFIG.9is completed.

In cases where one or more PSUs6are not each connected to one or more UPSs7(NO in Step S14), the setting unit34reads the operating frequency and the rotation speed corresponding to the power value suppliable by the number of PSUs6operating normally in one of the systems from the power value setting table35b. For example, in the example ofFIG.8, the setting unit34reads the operating frequency and the rotation speed based on the power value suppliable by the number n (=2) of PSUs6normally operating in one system. Then, the setting unit34sets the read operating frequency and the rotation speed to the processor2and the fan4, respectively (Step S16), and the process of Step S5ofFIG.9is completed.

On the other hand, in Step S13, in cases where the server1is in a state of the one-system power reception (YES in Step S13), the determining unit33determines whether or not the one-system power reception is caused by a power failure occurring in one system of the two-system power reception (Step S17). The determination in Step S17may be made on the basis of, for example, a change of the power supply configuration detected in Step S12(e.g., difference between the power supply configuration information35aobtained previously and the difference between power supply configuration information35aobtained this time), or an error detected in Step S9ofFIG.9.

In cases where the one-system power reception is caused by a power failure occurring in one system of the two-system power reception (YES in step S17), the setting unit34refers to the power value setting table35b. Then, within a predetermined time immediately after the power failure, for example, in 10 minutes, the setting unit34reads the operating frequency and the rotation speed corresponding to the power value suppliable by the number n of PSU6normally operating in the other system, sets the read operating frequency and rotation speed in the processor2and the fan4, respectively (Step S18), and the process of Step S5ofFIG.9is completed.

In cases where the one-system power reception is not caused by a power failure occurring in one system of the two-system power reception (NO in Step S17), the obtaining unit32refers to the information about the presence or absence of a failure in the PSUs6and stores the number of PSUs6normally operating into the memory unit35(Step S19). The information about the presence or absence of a failure in the PSUs6may be obtained at the time of obtaining the power supply configuration information35ain Step S12.

The determination unit33determines, based on the information about the presence or absence of a failure in the PSUs6, whether the number k of PSUs6normally operating is two or more (Step S20).

In cases where the number k of PSUs6normally operating is two or more (YES in step S20), the setting unit34refers to the power value setting table35b. Then, the setting unit34reads the operating frequency and the rotation speed corresponding to the power value suppliable by the number obtained by subtracting one from the number k of PSUs6, sets to the read operating frequency and the rotation speed in the processor2and the fan4, respectively (Step S21), and the process of Step S5ofFIG.9is completed.

In cases where the number k of PSUs6normally operating is not two or more (NO in Step S20), the determining unit33outputs a message prompting maintenance so that the number of PSUs6normally operating comes to be two or more (Step S22), and the process of Step S5ofFIG.9is completed.

[1-5] Example of Hardware Configuration of Controller

FIG.11is a block diagram illustrating a HW configuration of a computer10. Hereinafter, description will now be made in relation to the HW configuration provided by a computer10serving as an example of the controller3.

As illustrated inFIG.11, as a HW configuration, the computer10may illustratively include a processor10a, a memory10b, a storing device10c, an interface (IF) device10d, an Input/Output (IO) device10e, and a reader10f.

The processor10ais an example of an arithmetic operation processor that performs various controls and arithmetic operations. The processor10amay be communicably connected to the blocks in the computer10via a bus101. The processor10ais an example of the service processor3aillustrated inFIG.2. The processor10amay be a multi-processor or a multi-core processor having multiple cores.

The memory10bis an example of a HW device that stores various types of data and information such as a program. The memory10bis an example of the memory3bshown inFIG.2.

The storing device10cis an example of a HW device that stores various types of data and information such as program. The storing device10cis an example of the storage device3cillustrated inFIG.2.

The storing device10cmay also store a program log (power control program) that achieves all or some of the various functions of the computer10a. For example, the processor10aserving as the service processor3acan achieve the function of the processing unit31ofFIG.3by expanding the program10stored in the storing device10conto the memory10band executing the expanded program.

The IF device10dis an example of a communication IF that controls connection and communication with a network. For example, the IF device10dmay include adapters conforming to Ethernet (registered trademark), InfiniBand, Myrinet, or optical communications such as FCs (Fibre Channel), and the like. The adapter may be compatible with one of or both wireless and wired communication schemes. For example, the server1may be communicably connected to the UPS7and a non-illustrated terminal device used by the operator or the system manager via the IF device10d. The program log may be, for example, downloaded from the network to the computer10via the communication IF and stored in the storing device loc.

The IO device10emay include one of or both an input device and an output device. Examples of the input device include a keyboard, a mouse, and a touch panel. Examples of the output device include a monitor, a projector, and a printer.

The reader10fis an example of a reader that reads data and programs recorded in the recording medium10h. The reader10fmay include a connecting terminal or a device to which the recording medium10hcan be connected or inserted. Examples of the reader10finclude an adapter conforming to, for example, Universal Serial Bus (USE), a drive apparatus that accesses a recording disk, and a card reader that accesses a flash memory such as an SD card. The program10gmay be stored in the recording medium10h, and the reader10fmay read the program10gfrom the recording medium10hand store the read program10ginto the storing device10c.

The recording medium10his example of a non-transitory computer-readable recording medium such as a magnetic/optical disk, and a flash memory. Examples of the magnetic/optical disk include a flexible disk, a Compact Disc (CD), a Digital Versatile Disc (DVD), a Blu-ray disk, and a Holographic Versatile Disc (HVD). Examples of the flash memory include a semiconductor memory such as a USB memory and an S) card.

The HW configuration of the computer10described above is exemplary. Accordingly, the computer10may appropriately undergo increase or decrease of HW devices (e.g., addition or deletion of arbitrary blocks), division, integration in an arbitrary combination, and addition or deletion of the bus. For example, the server1may omit at least one of the I/O device10eand the reader10f.

In addition to the HW configuration illustrated inFIG.11, the computer10may also include multiple PSUs6as Illustrated inFIG.2, and at least one of the multiple PSUs6may be connected with a UPS7.

The technique according to the embodiment described above can be changed or modified as follows

For example, in the power control unit30illustrated inFIG.3, the functions of the obtaining unit32, the determining unit33, and the setting unit34may be merged in any combination, or may each be divided respectively.

Further, the example ofFIG.2assumes that the server1receives power by two power source systems, but the present invention is not limited thereto. Alternatively, the server1may receive power by three or more power source systems. This means that the server1may be powered by two or more power sources.

Furthermore, the number of processors2, the number of fans4, the number of PSUs6, the number of the UPSs7, and the number of distribution boards8in the server1are not limited to those inFIG.2.

In one aspect, the throughput of a processor connected to multiple power supplies can be enhanced.