Semiconductor apparatus and a semiconductor unit, the semiconductor unit including a functional layer including a semiconductor element, and a highly conductive layer

The invention provides a semiconductor unit and a semiconductor apparatus having a low electric resistance as a whole, even when the electric resistance of a functional layer or a semiconductor substrate is high. A method of making the semiconductor unit and apparatus is also provided. An electrooptic apparatus and an electronic apparatus are also provided. A semiconductor apparatus includes a predetermined substrate and a semiconductor unit bonded to the substrate. The semiconductor unit includes a highly conductive layer and a functional layer including a semiconductor element.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to semiconductor units, semiconductor apparatuses, methods of making the same, electrooptic apparatuses and electronic apparatuses. In particular, the invention relates to a semiconductor unit and a semiconductor apparatus prepared by transferring a semiconductor element on a work piece (e.g., substrate) composed of a material different from that of the semiconductor element, and to a method of making the semiconductor unit and the semiconductor apparatus.

2. Description of Related Art

The related art includes a technology of forming a semiconductor element on a substrate composed of a material different from that of the semiconductor element. Examples thereof include a technology of forming a GaAs surface emitting laser (vertical cavity surface emitting laser (VCSEL)), a photodetector (PD) such as a photodiode, or a high electron mobility transistor (HEMT) on a silicon semiconductor substrate, and a technology of affixing micro silicon transistors, instead of thin film transistors (TFTs) for pixels of liquid crystal display (LCD), on a glass substrate.

One example of an integrated circuit constituted from semiconductors of different materials is an opto-electronic integrated circuit (OEIC). An opto-electronic integrated circuit is an integrated circuit with an optical input/output device. Signal processing inside the integrated circuit is performed by electrical signals but input/output operation between the integrated circuit and an external component is performed by optical signals.

As the inner structures of the integrated circuit are miniaturized, the operating speed of the central processing unit (CPU) of a computer, i.e., the operating clock, is also increased. However, the signal transfer rate at the bus has almost reached its limit, and this has become the bottleneck of increasing the processing rate of computers. If signal processing can be done through optical signals at the bus, it becomes possible to significantly increase the processing rate of computers beyond this limit. In order to do so, micro light-emitting and photo-detecting elements must be mounted to the silicon integrated circuit.

Silicon, which is an indirect semiconductor, cannot emit light. Silicon must be combined with other semiconductor light-emitting elements to form an integrated circuit.

In the related art, a prospective candidate for semiconductor light-emitting elements is a surface emitting laser (VCSEL) composed of a compound semiconductor such as gallium arsenide (GaAs). However, the lattice mismatch between silicon and the surface emitting laser has prevented direct formation of the surface emitting laser on the silicon integrated circuit through a semiconductor process such as an epitaxial process.

Generally, the surface emitting laser is formed on a gallium arsenide substrate. One prospective related art method is to form surface emitting laser chips from the surface emitting lasers disposed on the GaAs substrate and mechanically mounting these chips on silicon integrated circuit substrates to integrate electrical signal transfer circuits and optical signal transfer circuits.

On the other hand, in order to enhance the areal efficiency of the semiconductor substrate on which integrated circuits are formed and in order to simplify handling after integration, the size of the surface emitting laser chip on the integrated circuit is preferably as small as possible. Ideally, the chip is of approximately the same size as when an integrated circuit is monolithically fabricated, i.e., several micrometers in thickness and several ten square micrometers in area.

SUMMARY OF THE INVENTION

However, when the chip size is reduced to a thickness of several micrometers, the electric resistance of the chip itself increases, resulting in problems, such as an increase in driving voltage and an increase in calorific value of the element. These problems also occur when a semi-insulating GaAs substrate is used in a surface emitting laser array to prevent cross-talk, other than when the element is formed into a chip. In the surface emitting laser array, because the conductivity of the substrate is low, the electric resistance is large even when the substrate is thick.

The following two articles (magazine, “Erekutoronikusu” (electronics), October 2000, pp. 37 to 40) and (magazine, “Denshi joho tushin gakkai ronbunshi” (compilation of papers from the institute of electronics, information, and communication engineers), September 2001, Vol. J84-C. No. 9) disclose methods and technology of reducing the chip size to several micrometers in thickness. The technology disclosed in these documents removes the substrate by polishing, and only a functional layer (several micrometers) at the surface that functions as a semiconductor element is transferred to another supporting substrate, is shaped into a desired size by handling and photolithography, and is bonded onto a final substrate. In this manner, a semiconductor layer (functional layer) several micrometers in thickness functioning as a desired semiconductor element can be formed at a desired position of the final substrate. The semiconductor layer is worked through a common semiconductor process into a product with electrodes and the like.

One drawback of the technology disclosed in the above two articles is that a rigid supporting substrate is required since the semiconductor substrate is removed by polishing. As a result, bonding of the functional layer on the final substrate must be performed in full scale. In other words, portions of the semiconductor film other than required portions must be removed prior to the bonding, which is particularly wasteful. Moreover, since the bonded portion is a mere functional layer, a semiconductor process must be performed after the bonding. Thus, the inefficiency of processing the element with final substrate is acute when the alignment density of the desired semiconductor elements is small.

The present invention addresses or overcomes the above and/or other problems, and provides a semiconductor unit and a semiconductor apparatus having low electric resistance as a whole, even when the electric resistance of the functional layer and the semiconductor substrate is high. Moreover, the efficiency of using a semiconductor substrate, on which semiconductor elements are formed, can be increased and the manufacturing process can be streamlined when forming semiconductor elements on substrates composed of a material different from that of the semiconductor elements. The present invention also relates to a method of making the semiconductor unit and the semiconductor apparatus, to an electrooptic apparatus, and to an electronic apparatus.

To address or achieve the above, the present invention provides a semiconductor unit including a functional layer including a semiconductor element; and a highly conductive layer.

With this structure, even when the resistance of the functional layer is high, the combined resistance of the highly conductive layer and the functional layer can be reduced because the resistance of the highly conductive layer is low. Thus, the electric resistance of the semiconductor unit as a whole can be decreased. The present invention is particularly effective when the thickness of the functional layer is small and the resistance thereof is high. The semiconductor element may be a compound semiconductor or a silicon semiconductor.

A semiconductor apparatus is characterized by including a semiconductor substrate; a functional layer including a semiconductor element, the functional layer being formed on a surface of the semiconductor substrate; and a highly conductive layer.

With this structure, even when the resistance of the functional layer or the semiconductor substrate is high, the combined resistance can be reduced because the resistance of the highly conductive layer is low. Thus, the electric resistance of the semiconductor unit as a whole can be decreased. The present invention is particularly effective when the thickness of the functional layer is small and the resistance thereof is high. The semiconductor element may be a compound semiconductor or a silicon semiconductor.

The present invention also provides a semiconductor apparatus including the above-described semiconductor unit bonded on a predetermined substrate.

With this structure, the electric resistance of the semiconductor unit can be reduced due to the highly conductive layer, and the semiconductor element can be bonded to any workpiece, e.g., a silicon compound substrate or a compound conductor substrate. According to the present invention, a semiconductor element, such as a GaAs surface emitting laser or a photodiode, composed of a material different from that of the semiconductor substrate can be formed on the substrate.

The semiconductor substrate of the semiconductor apparatus of the present invention may exhibit a semi-insulating property or may include an insulating layer.

With this structure, the electric resistance of the semiconductor substrate is increased, and the effect of reducing the electric resistance of the semiconductor apparatus due to the highly conductive layer becomes more acute.

In the semiconductor apparatus of the present invention, electrodes to drive the semiconductor element may be formed at an upper face of the functional layer.

With this structure, even when the resistance of the functional layer or the semiconductor substrate is high, the semiconductor element can be driven using the highly conductive layer as the electrical path, thereby decreasing the driving voltage.

In the semiconductor apparatus of the present invention, the highly conductive layer is preferably at least either a high carrier density layer or a high carrier mobility layer to reduce the electric resistance of the highly conductive layer.

In the semiconductor apparatus of the present invention, the semiconductor element is preferably a compound semiconductor device and preferably has at least one of a light-emitting diode, a surface emitting laser, a photodetector, a photodiode, a field-effect transistor, a high electron mobility transistor, a bipolar transistor, a thyristor, an inductor, a capacitor, and a resistor.

In the semiconductor apparatus of the present invention, the semiconductor element is preferably a silicon semiconductor device and constitutes at least one of an integrated circuit, a photodiode, a transistor, and a diode.

In the semiconductor apparatus of the present invention, the semiconductor element is preferably a surface emitting laser having a pair of multilayer reflector structures. Preferably, the highly conductive layer is a high carrier mobility layer. More preferably, the high carrier mobility layer is disposed inside the multilayer reflector structure disposed at the semiconductor substrate or the predetermined substrate.

With this structure, the current path between the electrode and the semiconductor substrate or the predetermined substrate can be shortened since the high electron mobility layer is inside the multilayer reflector structure. Thus, the resistance of the semiconductor apparatus can be decreased.

In accordance with the present invention, the semiconductor unit is connected to a circuit of the predetermined substrate to form an integrated circuit.

The present invention provides an electrooptic apparatus including the above-described semiconductor apparatus.

The present invention provides an electronic apparatus including the above-described electrooptic apparatus.

The present invention provides a method of making a semiconductor unit, including: forming a functional layer including a semiconductor element, and a highly conductive layer on a surface of a semiconductor substrate; and separating the functional layer and the highly conductive layer placed on the semiconductor substrate from the semiconductor substrate.

According to this method, the highly conductive layer that reduces the resistance of the semiconductor unit can be formed at the same time with the semiconductor element. Furthermore, the semiconductor elements diced into micro tiles can be bonded on any workpiece to form an integrated circuit. The semiconductor element may be a compound semiconductor or a silicon semiconductor. The workpiece onto which the semiconductor element is bonded may be a silicon semiconductor substrate or a compound semiconductor substrate. According to the present invention, a semiconductor element, such as a GaAs surface emitting laser or a photodiode, composed of a material different from that of the semiconductor substrate can be formed on the substrate. Since the semiconductor element is prepared on a semiconductor substrate and then is formed into a micro tile, the semiconductor element can be tested and screened in advance prior to forming an integrated circuit.

The present invention also provides another method of making a semiconductor unit, including: forming a functional film including semiconductor element, and a highly conductive layer on a surface of a semiconductor substrate; bonding a film to the surface of the semiconductor substrate, the surface being provided with the semiconductor element; and separating the functional layer and the highly conductive layer from the semiconductor substrate.

According to this method, the highly conductive layer that reduces the resistance of the semiconductor unit can be formed at the same time with the semiconductor element. Furthermore, the functional film including the semiconductor element can be independently formed into a micro tile from the semiconductor substrate and may be mounted on a film to facilitate handling. Thus, the semiconductor element can be individually selected to be bonded on a final substrate, and the size of the semiconductor element to be handled can be reduced compared to the related art packaging technology.

In the method of making the semiconductor unit of the present invention, the semiconductor substrate preferably has a sacrificial layer disposed under the functional layer and the highly conductive layer, and the functional layer and the highly conductive layer are separated from the semiconductor substrate by etching away the sacrificial layer.

In the method of making the semiconductor unit of the present invention, a dicing groove is preferably formed in the semiconductor substrate, and the functional layer and the highly conductive layer are preferably separated from the semiconductor substrate by etching away the sacrificial layer.

In the method of making the semiconductor unit of the present invention, the functional layer is preferably bonded onto a substrate composed of at least one of silicon, quartz, glass, sapphire, metal, ceramic, or plastic.

According to this method, since the functional layer to be bonded on the substrate already includes the finished semiconductor element, no complicated semiconductor process is necessary after bonding. Since the substrate as a whole need not to be processed after the bonding of the functional layer to the substrate, the manufacturing process can be streamlined, and the requirements for the bonding method can be relaxed. For example, a bonding method using a low-heat-resistant material may be employed.

Preferably, in the method o making the semiconductor unit of the present invention, the semiconductor element bonded on the substrate is electrically connected to a circuit formed on the substrate.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

Exemplary structures of a semiconductor unit and a semiconductor apparatus of the present invention are described below with reference toFIGS. 1 to 6. First and second exemplary embodiments relate to bonding a compound semiconductor device (compound semiconductor element) on a silicon LSI chip. However, the present invention can be applied regardless of the type of semiconductor device or the type of LSI chip.

FIG. 1is a schematic cross-sectional view showing the structures of a semiconductor unit and a semiconductor apparatus according to a first exemplary embodiment of the present invention. In this exemplary embodiment, the semiconductor unit and the semiconductor apparatus constitute a surface emitting semiconductor laser. Referring toFIG. 1, a lower reflector composite structure (hereinafter, “a lower mirror”)12ais formed on the entire upper face of a highly conductive layer (high carrier density layer)12bcomposed of an n-type gallium arsenide compound semiconductor (n-type GaAs layer). The highly conductive layer12bhas the shape of a rectangle in a plan view. Layers13ato13fare deposited in order from13ato13fon the lower mirror12ato form a columnar mesa. An insulating layer14composed of polyimide or the like and electrodes13gand13hare provided around the mesa. The layers13ato13hand the lower mirror12aform a functional layer, which functions as a surface emitting laser.

In the present invention, the term “functional layer” refers to a layer essential for exhibiting a desired function as a semiconductor element. For example, in order for it to function as a surface emitting laser described above, the “functional layer” must include an upper mirror13e, the lower mirror12a, and the semiconductor composite structure sandwiched by the upper mirror13eand the lower mirror12a. The functional layer may include components, such as a contact layer13f, the electrodes13gand13h, and the insulating layer14, having subsidiary functions. The functional layer and the high carrier density layer12bform a semiconductor unit500.

A method of making the semiconductor unit500will be described later. The mesa may be of any shape.

The structure of the mesa is described below. First, an n-type cladding layer (a lower cladding)13acomposed of n-type Al0.5Ga0.5As is formed on the lower mirror12a. An active layer13b, a p-type cladding layer (an upper cladding)13ccomposed of p-type Al0.5Ga0.5As, a ring-shaped horizontal oxide layer (current aperture)13dprovided at the outer periphery of the mesa, the upper mirror (upper reflector composite structure)13e, and a contact layer13fcomposed of p-type GaAs are sequentially deposited in that order on the n-type cladding layer (a lower cladding)13a. The insulating layer14is then formed around the mesa, the p-type electrode (cathode)13gis formed on the upper face of the contact layer13f, and the n-type electrode (anode)13his formed on the upper face of lower mirror12a. A voltage is applied between the electrodes, and a laser beam is emitted from the upper end of the mesa in the axis direction of the mesa. The cathode13gis ring-shaped, and the laser beam is emitted from the center of the mesa.

The highly conductive layer12bdecreases the electric resistance of the semiconductor unit by securing the current path. The highly conductive layer12bis a high carrier density layer of the same conductivity type as the lower mirror12aand has a carrier density of approximately 5 to 10×1018cm−3. The highly conductive layer12bis preferably composed of GaAs but may be composed of AlXGa1−XAs, wherein X is 0.2 or less. However, the layer composed of AlXGa1−XAs tends to undergo an increase in resistance as X increases. The thickness of the highly conductive layer12bis preferably at least 0.3 μm, and more preferably at least 1 μm.

The active layer13bhas a multiquantum well structure constituted from GaAs well sublayers and Al0.3Ga0.7As barrier sublayers, the number of the GaAs well sublayers being three.

The mirrors12aand13ereflect a laser beam and constitute a resonator. For example, each mirror is a distributed Bragg reflector mirror (DBR mirror) formed by alternately stacking two types of AlXGa1−XAs layers having different compositions. In this exemplary embodiment, the lower mirror12ais formed by alternately stacking n-type Al0.15Ga0.85As sublayers and n-type Al0.9Ga0.1As sublayers, approximately thirty of each. The upper mirror13eis formed by alternately stacking p-type Al0.15Ga0.85As sublayers and p-type Al0.9Ga0.1As sublayers, approximately twenty five of each. Each AlXGa1−XAs layer has an optical thickness equal to one-fourth the laser emission wavelength and a carrier density of approximately 1 to 5×1018cm−3. The upper mirror13eis doped with carbon and is of a p-type. The lower mirror12ais doped with silicon and is of n-type. Accordingly, the upper mirror13e, the impurity-free active layer13b, and the lower mirror12aconstitute a PIN diode. Alternatively, the conductivity type of the upper and the lower mirrors may be reversed depending on the polarity of the laser. Moreover, the semiconductor composite film may be replaced with a dielectric composite film or a metal thin film.

The current aperture13dis composed of an insulating material primarily containing aluminum oxide. The current aperture13ddecreases the area of the light-emitting active region so as to decrease the threshold current and the beam width.

The current path of the semiconductor unit500having the above-described structure is shown inFIG. 2.

As shown inFIG. 2, an electric circuit including a resistor R3 of the upper mirror13e, a resistor R1 of the lower mirror12a, and a resistor R2 of the high carrier density layer12bare connected between the electrodes13gand13hto form an electric current. An electric current flows in this circuit. Since the resistors R1 and R2 connected in parallel can be regarded as a combined resistor R, the electric circuit has the resistors R and R3 connected in series.

In this exemplary embodiment, the resistivity of the lower mirror (30 pairs of DBR mirrors, carrier density: 5×1018cm−3) is approximately 1.1×10−2Ωcm; accordingly, R1=20 Ω when the thickness is 3 μm. The resistivity of the high carrier density layer (n-GaAs layer, carrier density: 1×1019cm−3) is approximately 1.3×10−3Ωcm; accordingly, R2=6.7 Ω when the thickness is 1 μm and R2=3.35 Ω when the thickness is 2 μm. Since the resistors R1 and R2 are connected in parallel, the combined resistance R is 5.0 Ω when the thickness of the high carrier density layer is 1 μm and is 2.9 Ω when the thickness of the high carrier density layer is 2 μm. These values are one-fourth to one-sixth the value when only the lower mirror layer is provided without any high carrier density layer. Thus, the electric resistance in the semiconductor unit500is low.

When the carrier density of the lower mirror12ais increased to approximately 1×1019cm−3so as to have conductive properties, the light absorption loss becomes high and performance (optical characteristics) as a reflector is degraded. In this exemplary embodiment, a high carrier density layer, which exhibits high conductivity and a large optical absorption coefficient and which affects the optical characteristics, is disposed under the lower mirror as viewed from the active layer, i.e., is disposed at a region outside the emission beam path of the laser light. This reduces or prevents degradation of the optical characteristics.

The position of the high carrier density layer depends on how it affects the characteristics of the semiconductor element. The position is not limited to the above-described position. For example, the high carrier density layer may be formed inside the functional layer.

The thickness of the functional layer is, for example, approximately 1 to 10 μm. A semiconductor element may be made in the functional layer. Examples of the semiconductor element include light-emitting diodes (LEDs), surface emitting lasers (VCSELs), photodiodes (PDs), high electron mobility transistors (HEMTs), and heterojunction bipolar transistors (HBTs). These semiconductor elements are each formed by epitaxially depositing many layers on a predetermined substrate. Each semiconductor element is provided with electrodes and undergoes operation test.

The semiconductor unit is separated from the substrate according to a method described below and is worked into a predetermined shape, e.g., a micro tile. The semiconductor unit preferably has, for example, a thickness of 1 to 8 μm and a size of several ten micrometers by several hundred micrometers.

The semiconductor units500formed into a micro tile can be bonded onto another substrate (final substrate) so as to make an integrated circuit, such as an OEIC. The structure of an integrated circuit (semiconductor apparatus)900is described below with reference toFIG. 1.

Referring toFIG. 1, the semiconductor unit500separated from the initial substrate is attached (bonded) onto a silicon substrate600through a bonding layer606. A cathode602and an anode604are disposed on the surface of the silicon substrate600. The electrode13gis connected to the cathode602via a lead610on the surface, and the electrode13his connected to the anode604via a lead612on the surface to form the integrated circuit (semiconductor apparatus)900. According to this exemplary embodiment, it is possible to form a micro semiconductor element (micro element tile) having the same size as a monolithically made semiconductor element on a substrate. The substrate may be of any type. Examples of the substrate include silicon, quartz, sapphire, metal, and ceramic substrates, and plastic films.

FIG. 3is a schematic cross-sectional view showing the structure of a surface emission semiconductor laser according to a second exemplary embodiment of the present invention. The surface emission semiconductor laser includes a semiconductor unit and a semiconductor apparatus. In this exemplary embodiment, the same components as the first exemplary embodiment are represented by the same reference numerals in the drawings, and the explanations thereof are omitted.

A semiconductor unit510differs from the semiconductor unit500in that a highly conductive layer12yis disposed inside a lower mirror12x. In other words, in this exemplary embodiment, the highly conductive layer is placed inside the functional layer. The semiconductor layers13ato13fare stacked in that order on the lower mirror12xso as to form a mesa, and the semiconductor unit510, as a whole, functions as a surface emitting laser, as with the semiconductor unit500described above. The semiconductor unit510is bonded onto the silicon substrate600via the bonding layer606. The electrode13gis connected to the cathode602via a lead610on the surface, and the electrode13his connected to the anode604via a lead612on the surface to form an integrated circuit (semiconductor apparatus)910, as with the foregoing embodiment described above. The detailed description thereof is omitted.

This exemplary embodiment is provided such that the highly conductive layer12yis placed inside the lower mirror12x. The structure of the lower mirror12xis described below with reference toFIG. 4.

Referring toFIG. 4, the lower mirror12xand the upper mirror13efunction as laser beam reflectors. The lower mirror12xis, for example, a distributed Bragg reflector mirror (DBR mirror) formed by alternately stacking two types of AlXGa1−XAs layers having different compositions. In this embodiment, the lower mirror12xis formed by alternately stacking n-type Al0.15Ga0.85As sublayers12x1and n-type Al0.9G0.1As sublayers12x2, approximately thirty of each. Each AlXGa1−XAs sublayer has a thickness equal to one fourth of the laser emission wavelength and a carrier density of approximately 1 to 5×1018cm−3and includes the highly conductive layer12yinside.

The highly conductive layer12yis a high carrier (electron) mobility layer. The highly conductive layer12yis formed by stacking, in the following order, an electron supply sublayer12y1, a hetero gap sublayer12y2, an active sublayer (carrier transit sublayer)12y3, another hetero gap sublayer12y2, and another electron supply sublayer12y1. Free electrons generated at the electron supply sublayers12y1, which are the outermost layers, move into the surface layers (secondary electron gas layers) of the active sublayer (carrier transit sublayer)12y3, which has the lowest energy potential, via the hetero gap sublayers12y2. The free electrons can two-dimensionally move in these surface layers at a high mobility.

The active sublayer12y3is composed of, for example, undoped GaAs and has an impurity concentration of approximately 1×1014cm−3. Carriers are confined in the active layer by hetero bonding between the hetero gap sublayers12y2and the active sublayer12y3. The hetero gap sublayers12y2are each composed of, for example, lightly doped AlXGa1−XAs (X=0.3) and have an impurity concentration of approximately 1×1014to 1×1015cm−3. The electron supply sublayers12y1for generating carriers (free electrons or the like) are composed of, for example, highly doped AlXGa1−XAs (X=0.3) and have an impurity concentration of approximately 1×1018cm−3.

Since the above-described two-dimensional electron gas layers are inside the GaAs layer, Coulomb scattering of electrons due to ionized donors can be prevented, and the two-dimensional electron gas layers have a high mobility (approximately 8,600 cm2/V·S). While the electric resistance or the semiconductor is determined by (carrier mobility)×(carrier concentration), the electric resistance of the highly conductive layer12yis low since both the mobility and the concentration of electrons are high in the two-dimensional electron gas layers.

FIG. 5shows a band profile in the high carrier mobility layers. As can be understood fromFIG. 5, the free electrons generated in the electron supply layers are transferred to the surface of the active layer through the hetero gap layers and are confined thereat, thereby forming a two-dimensional electron gas layer.

As described above, when the high carrier mobility layers have a low resistance, the combined resistance of the resistance of the lower mirror12xand the resistance of the high carrier mobility layer12yconnected in parallel can be decreased, based on the same principle described above with reference toFIG. 3. Thus, the resistance of the semiconductor unit510is decreased.

In the above-described exemplary embodiment, the thickness of the high carrier mobility layer12yis small, i.e., approximately 20 nm, whereas the total of the thickness of the n-type Al0.15Ga0.85As sublayer12x1and the thickness of the n-type Al0.9Ga0.1As sublayer12x2is approximately 120 nm. Thus, it is possible to place the highly conductive layer12yinside the n-type Al0.15Ga0.85As sublayer12x1or the n-type Al0.9Ga0.1As sublayer12x2. However, in this manner, the optical characteristic (the effective refractive index) of each of the n-type Al0.15Ga0.85As sublayer12x1and the n-type Al0.9Ga0.1As sublayer12x2changes, thereby affecting the performance as the reflectors. Thus, the thickness of the sublayer12x1and the sublayer12x2should be properly controlled to correct the effective refractive index and to achieve the reflector function.

Alternatively, the high carrier mobility layer12ymay be placed inside only one of the sublayers12x1and12x2, and may be placed at the top or the bottom of the lower mirror12x. However, when the high carrier mobility layer12yis formed at the bottom of the lower mirror12x, the current path is extended since the current flows into the high carrier mobility layer12yafter passing through the lower mirror12xaround the electrode13h. Thus, the high carrier mobility layer12yis preferably placed inside the lower mirror12x.

FIG. 6is a schematic cross-sectional view showing the structure of a semiconductor apparatus according to a third exemplary embodiment. In this exemplary embodiment, the same components as in first exemplary embodiment are represented by the same reference numerals in the drawings, and the explanation thereof is omitted.

Referring now toFIG. 6, the highly conductive layer12b, the lower mirror12a, and the semiconductor layers13ato13fare sequentially stacked on a semiconductor substrate700in that order. These layers and the electrodes13gand13hconstitute a semiconductor apparatus920. In other words, this exemplary embodiment differs from the semiconductor unit500in that a semiconductor element13and the highly conductive layer12bare epitaxially deposited on the semiconductor substrate700. The rest of the structure is the same. The semiconductor substrate700is a common GaAs substrate having a thickness of several ten to several hundred micrometers. In order to reduce or prevent cross-talk between a plurality of functional layers arranged in arrays on the substrate, the semiconductor substrate700has a semi-insulating property. The semi-insulating property can be rendered by forming defects in crystals of the substrate. Alternatively, an insulating layer may be provided between the highly conductive layer12band the semiconductor substrate700having no semi-insulating property. The present invention can be applied to such a case.

In this exemplary embodiment also, the highly conductive layer12b, which is the high carrier density layer, reduces the resistance of the substrate as a whole based on the same principle as that previously explained with reference toFIG. 3since the resistance of the substrate as a whole is determined from the resistance of the highly conductive layer12band the resistance of the lower mirror12aconnected in parallel. The high carrier mobility layer of the second exemplary embodiment may be used as the highly conductive layer12b. In this case, the high carrier mobility layer may be placed inside the composite film that constitutes the lower mirror12a. Leads (not shown) and the like are then formed on the semiconductor apparatus920alone or with a predetermined substrate bonded thereto.

The present invention is particularly effective when all of the electrodes to drive the semiconductor element are formed at the upper surface of the functional layer. In the first and second exemplary embodiments, the lower surface of the functional at the lower-mirror-12aside is bonded to the other substrate600via the bonding layer606. Thus, when driving electrodes are formed at the silicon-substrate-600side, the electric current does not smoothly flow between the silicon substrate600and the functional layer. Even when the bonding layer606is made to have conducting properties, the electric current does not flow smoothly due to the presence of the Schottky barrier. In the third exemplary embodiment, since the conductive property of the semiconductor substrate is low, it is not practical to form driving electrodes at the semiconductor-substrate side.

In the semiconductor unit and the semiconductor apparatus of the present invention, the highly conductive layer may be a composite of different types of layers. For example, both the high carrier density layer and the high carrier mobility layer may be formed.

No particular limit is imposed on the method for making the semiconductor unit and the semiconductor apparatus of the present invention. Any related art, later developed or known method may be employed. For example, the layers may be deposited on a predetermined substrate by metal organic chemical vapor deposition (MOCVD) or the like and may be etched in the thickness direction by plasma etching or the like after a mask is formed with a suitable photoresist so as to form the mesa structure of the surface emitting laser. The current aperture may be formed by oxidizing the mesa constituted from AlGaAs layers from outside into a ring shape. In making the semiconductor unit, however, the following method is preferable.

A method of making the semiconductor unit and the semiconductor apparatus according to a fourth exemplary embodiment of the present invention are described below with reference toFIGS. 7 to 16. In the fourth exemplary embodiment, bonding of a compound semiconductor device (compound semiconductor element) on a silicon LSI chip is described. However, the present invention can be applied regardless of the type of semiconductor device or LSI chip. In this exemplary embodiment the term “semiconductor substrate” refers to an article composed of a semiconductor material and is not limited to a tabular substrate. Any semiconductor article of any shape is included in the meaning of “semiconductor substrate”.

FIG. 7is a schematic cross-sectional view of Step1of the method of making the semiconductor unit and the semiconductor apparatus according to this exemplary embodiment. In this exemplary embodiment, the semiconductor unit500of the first exemplary embodiment is made. Referring toFIG. 7, a substrate10is a GaAs compound semiconductor substrate in this exemplary embodiment. A sacrificial layer11is formed on the substrate10. The sacrificial layer11is composed of aluminum arsenide (AlAs) and has a thickness of, for example, several hundred nanometers.

For example, the highly conductive layer12bis formed on the sacrificial layer11, and the lower mirror12ais formed on the highly conductive layer12b. The above-described mesa13may be formed on the lower mirror12a. The highly conductive layer12b, the lower mirror12a, and the mesa13are formed by epitaxially depositing layers on the substrate10to prepare the element.

Any related art, later developed, or known method, such as MOCVD or etching, may be employed to form the sacrificial layer11, the highly conductive layer12b, the lower mirror12a, and the mesa13.

FIG. 8is a schematic cross-sectional view showing Step2of the method of making the semiconductor unit and the semiconductor apparatus according to this exemplary embodiment. In this step, dicing grooves21are formed to separate semiconductor units500from each other. The depth of the dicing grooves21must be large enough to at least reach the sacrificial layer11. For example, the width and the depth of the dicing grooves21are 10 μm to several hundred micrometers. The dicing grooves21should be connected to each other without any dead ends so that a selective etchant described below can flow in the dicing groove21. The dicing grooves21are preferably formed into a grid such as a checkerboard.

The intervals between the dicing grooves21are preferably several ten to several hundred micrometers so that each of the semiconductor units500separated by the dicing grooves21has an area of several ten square micrometers to several hundred square micrometers. The dicing grooves21may be formed by a combination of photolithography and wet etching or by dry etching. The dicing groove21may be formed by U-shaped groove dicing to an extent that does not generate cracks in the substrate.

In forming the dicing grooves21, a sulfuric-acid-based etchant may be used in wet etching and chlorine gas may be used in dry-etching. The pattern of forming the dicing grooves21is large and does not require stringent accuracy. Thus, the etching mask need not be formed by photolithography. For example, the etching mask may be formed by offset printing. In forming the dicing grooves21, the direction of the dicing grooves21relative to the crystal orientation of the substrate10is also important.

FIG. 9is a schematic cross-sectional view showing Step3of the method of making the semiconductor unit and the semiconductor apparatus of this exemplary embodiment. In this step, an intermediate transfer film31is applied on the surface (the semiconductor-device-13-side surface) of the substrate10. The intermediate transfer film31is a flexible strip of film with an adhesive applied on the surface.

FIG. 10is a schematic cross-sectional view of Step4of the method of making the semiconductor unit and the semiconductor apparatus according to this exemplary embodiment. In this step, a selective etchant41is fed into the dicing grooves21. In this step, in order to selectively etch only the sacrificial layer11, dilute sulfuric acid highly selective to aluminum arsenide is used as the selective etchant41. Dilute hydrofluoric acid may also be used as the selective etchant41, but sulfuric acid is preferred from the viewpoint of selectivity.

FIG. 11is a schematic cross-sectional view showing Step5of the method of making the semiconductor unit and the semiconductor apparatus according to this exemplary embodiment. In this step, the entire sacrificial layer11is removed by selective etching after a predetermined time has elapsed since the feeding of the selective etchant41to the dicing grooves21in Step4. Subsequently, the dicing grooves21and the void where the sacrificial layer11was previously formed are rinsed with deionized water.

FIG. 12is a schematic cross-sectional view showing Step6of the method of making the semiconductor unit and the semiconductor apparatus according to this exemplary embodiment. By etching away the entire sacrificial layer11in Step5, the mesa13, the lower mirror12a, and the highly conductive layer12bbecome separated from the substrate10. In this step, the intermediate transfer film31is pulled away from the substrate10so as to separate the functional layer (the mesa13and the lower mirror12a) and the highly conductive layer12b, which are attached to the intermediate transfer film31, from the substrate10.

As a result, the semiconductor unit500becomes a micro element tile61supported by and attached to the intermediate transfer film31. At this stage, the thickness of the functional layer is preferably 1 to 8 μm and several tens micrometers to several hundred micrometers in length and width.

Moreover, the substrate10after the separation of the semiconductor units500(the micro element tiles61) can be reused to form semiconductor devices. By preliminarily forming a plurality of sacrificial layers11, Steps1to6can be repeated. The substrate10can be reused to repetitively form the micro element tiles61.

FIG. 13is a schematic cross-sectional view showing Step7of the method of making the semiconductor unit and the semiconductor apparatus according to this exemplary embodiment. In this step, the intermediate transfer film31(with the micro element tiles61attached thereto) is moved to align the micro element tile61to a predetermined position of a final substrate71(the substrate600inFIG. 1). The final substrate71is composed of a silicon semiconductor and includes an LSI region72. An adhesive73to bond the micro element tile61is applied on the predetermined position of the final substrate71.

FIG. 14is a schematic cross-sectional view showing Step8of the method of making the semiconductor unit and the semiconductor apparatus according to this exemplary embodiment. In this step, the micro element tile61aligned to the predetermined position of a final substrate71is bonded to the final substrate71by applying pressures using a collet81through the intermediate transfer film31. Since the adhesive73is applied to the predetermined position, the micro element tile61can be bonded at the predetermined position of the final substrate71. In this manner, a semiconductor apparatus including a semiconductor unit (micro tile element61) attached on the final substrate71is made.

Although an adhesive is used to bond the micro element tile61to the final substrate71in this step, other bonding means may be employed.

FIG. 15is a schematic cross-sectional view showing Step9of the method of making the semiconductor unit and the semiconductor apparatus according to this exemplary embodiment. In this step, the intermediate transfer film31is detached from the micro element tile61.

After Step6, the adhesive force of the entire surface of the intermediate transfer film31is preferably completely vanished by UV radiation or the like. Even after such treatment, the adhesive force slightly remains, and the micro element tile61, which is light-weight and thin, can still be supported by the intermediate transfer film31after Step6.

This step is not shown. In this step, annealing is performed to permanently bond the micro element tile61to the final substrate71.

FIG. 16is a schematic cross-sectional view showing Step11of the method of making the semiconductor unit and the semiconductor apparatus according to this exemplary embodiment. In this step, the electrode of the micro element tile61is electrically connected to the circuit on the final substrate71via a lead91so as to complete production of one LSI chip.

The final substrate71may be a silicon semiconductor, a quartz substrate, or a plastic film. When the final substrate71is a silicon semiconductor, a charge-coupled device (CCD) may be provided to the substrate. The final substrate71made of glass, such as quartz, can be used to form a display, such as a liquid crystal display (LCD) or an organic electroluminescent display. When the final substrate71is a plastic film, the final substrate71may be used in a liquid crystal display, an organic electroluminescence panel, or an IC film package.

In a fifth exemplary embodiment of the present invention, bonding of a silicon transistor (silicon semiconductor element) to a glass substrate for liquid crystal is explained. In this exemplary embodiment, Steps1to11correspond to Steps1to11described in the fourth exemplary embodiment. A significant difference between the fifth exemplary embodiment and the fourth exemplary embodiment lies in the method of selectively etching the sacrificial layer.

First, in Step1, a silicon transistor is formed on a silicon-on-insulator (SOI) substrate by a common process. An integrated circuit, i.e., a silicon device, a photodiode, a transistor, or a diode may be formed instead of the silicon transistor. The SOI substrate is provided with a silicon oxide film, which functions as the sacrificial layer.

In Step2, dicing grooves are formed on the SOI substrate. The thickness of the dicing grooves is large enough to at least reach the silicon oxide film, which functions as the sacrificial layer on the SOI substrate. The dicing grooves are formed by etching, for example.

In Step3, an intermediate transfer film is bonded on the surface of the SOI substrate (the surface at the silicon-transistor-side).

In Step4, hydrofluoric acid is fed into the dicing grooves to selectively etch only the silicon oxide film, i.e., the sacrificial layer.

In Step5, the sacrificial layer of silicon oxide is etched after the lapse of a predetermined time after Step4. The silicon transistor (silicon semiconductor element) thereby becomes separated from the silicon substrate.

In Step6, the intermediate transfer film is pulled away from the SOI substrate so as to separate the silicon transistor attached on the intermediate transfer film from the SOI substrate.

In Step7, the intermediate transfer film moves to align the silicon transistor at a predetermined position of a final substrate. The final substrate here is a glass substrate for liquid crystal.

In Step8, the silicon transistor aligned at the predetermined position of the final substrate is bonded on the final substrate by applying pressures through the intermediate transfer film using a collet. Since an adhesive is applied to the predetermined position, the silicon transistor can be bonded to the predetermined position of the final substrate.

In Step9, the adhesive force of the intermediate transfer film is vanished so as to separate the intermediate transfer film from the silicon transistor. In Step10, annealing is performed to permanently bond the silicon transistor to the final substrate.

In Step11, the electrodes of the silicon transistor are connected to the circuit on the final substrate by leads so as to complete production of the glass substrate for liquid crystal, driving circuit therefor, and the like.

In this exemplary embodiment, Steps5to11described above in the fourth exemplary embodiment may be applied.

According to the methods of the fourth and fifth exemplary embodiments, the semiconductor element can be formed substantially monolithically on a semiconductor substrate which is difficult to use in a real monolithic process because of the mismatch.

In the related art, a hybrid process has been employed to form a semiconductor element on a substrate composed of a different material. Examples thereof include forming surface emitting lasers, photodiodes, or high electron mobility transistors composed of gallium arsenide on silicon semiconductor substrates and bonding micro silicon transistors instead of thin film transistors (TFTs) for pixels of liquid crystal displays onto glass substrates.FIG. 24is a schematic perspective view showing an example of related art integrated circuit. InFIG. 24, a silicon LSI chip111has an LSI region112. A photodiode chip101a, a surface emitting laser chip101b, and a high electron mobility transistor chip101care bonded on the surface of the silicon LSI chip111. The handling limit of the chip size according to the related art packaging technology has been (several ten micrometers in thickness×several hundred square micrometers). Accordingly, the volume of each of the photodiode chip101a, the surface emitting laser chip101b, and the high electron mobility transistor chip101cis at least (several ten micrometers in thickness×several hundred square micrometers).

FIG. 17is a schematic perspective view of another example of a semiconductor apparatus (integrated circuit) made according to the method of this exemplary embodiment. The final substrate71, i.e., the silicon LSI chip, has the LSI region72. A photodiode tile61a, a surface emitting laser tile61b, and a high speed operating transistor (such as a MESFET, HBT, HEMT, or the like)61care bonded on the surface of the final substrate71. HBT is a compound semiconductor heterojunction bipolar transistor. The photodiode tile61a, the surface emitting laser tile61b, and the high speed operating transistor61care fabricated as the micro element tiles61and bonded according to the method of the first exemplary embodiment. Accordingly, the size of the photodiode tile61a, the surface emitting laser tile61b, and the high speed operating transistor61ccan be reduced to (several micrometers in thickness×several ten square micrometers in area).

According to the method of this exemplary embodiment, a semiconductor element (micro element tile61) having a size equal to an element formed by a monolithic process can be formed on any substrate, for example, a silicon, quarts, sapphire, metal, or ceramic substrate or a plastic film.

According to the methods of the fourth and fifth exemplary embodiments, preparation of semiconductor elements (semiconductor devices13) is completed on a semiconductor substrate (substrate10), and the semiconductor elements are then processed into micro element tiles61. Thus, the semiconductor devices can be tested and screened in advance.

According to the methods of the fourth and fifth exemplary embodiments, as for the semiconductor substrate (substrate10) from which the micro element tiles61are manufactured, the entire area of the semiconductor substrate, except for the regions where the dicing groove21are formed, can be used to make the semiconductor devices13(the micro element tiles61). Thus, the areal efficiency of the semiconductor substrate (the substrate10) can be increased, and the cost of manufacture can be decreased.

According to the methods of the fourth and fifth exemplary embodiments, the micro element tile61is mounted on the flexible intermediate transfer film31. Thus, the micro element tile61can be selectively bonded to the final substrate71.

According to the methods of the fourth and fifth exemplary embodiments, the preparation of the semiconductor elements, i.e., the micro element tiles61, is completed prior to bonding to the final substrate71. Thus, no complicated semiconductor process is necessary after bonding. Since the final substrate71with the micro element tile61bonded thereto need not to undergo an additional process, the efficiency of the manufacturing process can be enhanced.

Furthermore, since no complicated semiconductor process is necessary after the bonding of the micro element tile61to the final substrate71, restriction as to the method for bonding the micro element tile61can be relaxed. For example, a bonding method with a low-heat-resistant material can be performed.

Exemplary Applications of the semiconductor unit made according to the exemplary methods of the present invention are described below.

A first exemplary application is as follows. A surface emitting laser (vertical cavity surface emitting laser, VCSEL) and a photodiode (PD) are formed on a silicon LSI by the method of the fourth exemplary embodiment described above. In this manner, data can be exchanged using optical pulses between the silicon LSI and an external component. Thus, data can be exchanged between components not electrically connected to each other at a speed higher than when electric signals are used.

A second exemplary application is as follows. A high speed operating transistor (heterojunction bipolar transistor (HBT)) is formed on a silicon LSI by the method of the first exemplary embodiment described above. A high-speed analogue amplifier including the HBT is mounted inside the silicon IC to function as a component of a cellular phone of the like. In this manner, the wire length can be decreased, and the circuit can operate at a high rate. Moreover, as for the substrate10from which the micro element tiles61are formed, the entire area of the substrate10except for the regions where the dicing grooves21are formed can be used to form the semiconductor devices13(the micro element tiles61). Thus, the areal efficiency of the expensive gallium arsenide substrate can be increased, and the cost of manufacture can be decreased.

A third exemplary application is as follows. Instead of thin film transistors (TFTs), micro silicon transistors are bonded using the method of the present invention so that they constitute pixels of a liquid crystal display, which is an electrooptical apparatus. To be more specific, silicon transistors are bonded to a glass substrate for liquid crystal by the method of the second exemplary embodiment described above. In this manner, switching function is enhanced compared to when TFTs are used. Since the percentage of the area of the liquid crystal display pixels occupied by the transistors is only several percent, portions other than the TFTs, which are significantly large, will be wasted if all pixels are formed by a TFT process. In contrast, according to the method of the second exemplary embodiment, micro silicon transistors can be highly densely formed on a silicon substrate, and then be separated from each other using the separating layer and the sacrificial layer so that only required parts are bonded on the substrate. Thus, the process can be streamlined, and the cost for manufacture can be dramatically decreased.

A fourth exemplary application is as follows. To each of pixels of an organic electroluminescent (EL) display apparatus, a micro silicon transistor is bonded instead of a thin film transistor (TFT) by the method of the present invention. The details of the making of the organic EL display apparatus, i.e., the electrooptic apparatus, are described below.

An exemplary electrooptic apparatus, which is an application of this exemplary embodiment, will now be described with reference toFIGS. 18 and 19.FIG. 18is a cross-sectional view showing an example of an organic EL apparatus, which is the electrooptic exemplary apparatus of this embodiment.

Referring toFIG. 18, an organic EL apparatus1includes a light transmission substrate (light transmission layer)2; an organic EL element (light-emitting element)9including a cathode (electrode)7and an anode (electrode)8formed at one face of the substrate2, a luminous layer5composed of an organic EL material placed between the electrodes, and a hole transport layer6; and a low-refractive-index layer3and a sealing layer4optionally provided between the substrate2and the organic EL element9. The low-refractive-index layer3is closer to the substrate2than is the sealing layer4.

The surface of the organic EL apparatus1at a side opposite to the sealing layer4with the organic EL element9therebetween is covered by a sealing member320to prevent the organic EL element9with the electrodes7and8from being exposed to air or to reduce such exposure.

The anode8is formed on the sealing layer4by sputtering, ion plating, vacuum vapor deposition, or the like. The hole transport layer6, the luminous layer5, and the cathode7are sequentially deposited on the anode8to prepare the organic EL apparatus1.

In the organic EL apparatus1shown inFIG. 18, light from the luminous layer5is emitted through the substrate2toward outside the apparatus. The substrate2is composed of a transparent or translucent material. Examples thereof include transparent glass, quartz, sapphire, and transparent synthetic resins, such as polyesters, acrylic resins, polycarbonates, and polyetherketones. In particular, inexpensive soda glass is suitable for the material of the substrate2.

In contrast, when the light is emitted from the side opposite to the substrate, the substrate may be opaque. In such a case, ceramic, such as alumina, a metal sheet, such as a stainless steel sheet subjected to an insulating process such as surface oxidation, a thermosetting resin, a thermoplastic resin, or the like may be used to form the substrate.

The anode8is a transparent electrode composed of indium tin oxide (ITO) or the like and can transmit light. The hole transport layer6is composed of, for example, a triphenylamine derivative (TPD), a pyrazoline derivative, an arylamine derivative, a stilbene derivative, or a triphenyldiamine derivative. In particular, examples are found in Japanese Unexamined Patent Application Publication Nos. 63-70257, 63-175860, 2-135359, 2-135361, 2-209988, 3-37992, and 3-152184. A triphenyldiamine derivative is preferred. In particular, 4,4′-bis(N(3-methylphenyl)-N-phenylamino)biphenyl is preferred.

Instead of the hole transport layer, a hole injection layer may be formed. Alternatively, both the hole transport layer and the hole injection layer may be formed. In such cases, the hole injection layer is formed with, for example, copper phthalocyanine (CuPc), poly(phenylene vinylene) which is polytetrahydrothiophenylphenylene, 1,1-bis-(4-N,N-ditolylaminophenyl)cyclohexane, or tris(8-hydroxyquinolinol)aluminum. In particular, copper phthalocyanine (CuPc) is preferably used.

The luminous layer5may be formed with a low-molecular organic luminescent dye or a high-molecular luminescent material, i.e., a luminescent material such as a fluorescent material, a phosphorescence material, or an organic electroluminescent material such as, Alq3(aluminum chelate complex). Among conjugated-system high-molecular luminescent materials, those containing polyfluorene structures or arylenevinylene are particularly preferred. Examples of the low-molecular luminescent materials include naphthalene derivatives, anthracene derivatives, perylene derivatives, polymethine-based dyes, xanthene-based dyes, coumarin-based dyes, cyanine-based dyes, 8-hydroquinoline and metal complexes of derivatives thereof, aromatic amines, tetraphenylcyclopentadiene derivatives, and known materials disclosed in Japanese Unexamined Patent Application Publication Nos. 57-51781 and 59-194393.

The cathode7is a metal electrode composed of aluminum (Al), magnesium (Mg), gold (Au), silver (Ag), or the like.

An electron transport layer or an electron injection layer maybe formed between the cathode7and the luminous layer5. No limit is imposed as to the material to form the electron transport layer. Examples thereof include oxydiazole derivatives, anthraquinodimethane and derivatives thereof, benzoquinone and derivatives thereof, naphthoquinone and derivatives thereof, anthraquinone and derivatives thereof, tetracyanoanthraquinodimethane and derivatives thereof, fluorenone derivatives, diphenyldicyanoethylene and derivatives thereof, diphenoquinone derivatives, and 8-hydroxyquinoline and metal complexes of derivatives thereof. In particular, as with the material to form the hole transport layer described above, examples include those described in Japanese Unexamined Patent Application Publication Nos. 63-70257, 63-175860, 2-135359, 2-135361, 2-209988, 3-37992, and 3-152184. In particular, 2-(4-biphenyl)-5-(4-t-butylphenyl)-1,3,4-oxadiazole, benzoquinone, anthraquinone, and tris(8-quinolinol)aluminum are preferred.

Although not shown in the drawing, the organic EL apparatus1of this exemplary embodiment is of an active matrix type, and a plurality of data lines and a plurality of scan lines are arranged into a grid on the substrate2. Pixels are placed in regions partitioned by the data lines and the scan lines and are arranged in a matrix. In the related art, each pixel is connected to the above-described organic EL element9via a driving TFT, such as a switching transistor or a driving transistor. A driving signal is provided through the data line or the scan line to allow an electric current to flow between electrodes, and, as a result, the luminous layer5of the organic EL element9emits light toward outside the substrate2, thereby lighting that pixel.

In this exemplary embodiment, a micro silicon transistor of the present invention is bonded to each pixel instead of the driving TFT, such as the switching transistor or the driving transistor, provided in the related art to each pixel. The bonding of the micro silicon transistor is conducted according to the method including Step1to Step11described above.

Compared to when TFTs are used, switching operation can be enhanced. Thus, an organic EL apparatus1that can rapidly change the display state can be manufactured.

Next, the specific structure of an electrooptic apparatus according to an exemplary application of this exemplary embodiment is described with reference toFIG. 20.

FIG. 20shows an exemplary application of the electrooptic apparatus of this exemplary embodiment into an active matrix display (electrooptic apparatus) using organic electroluminescent elements.

Referring toFIG. 20, an organic EL apparatus S1includes a plurality of scan lines131, a plurality of signal lines132extending orthogonal to the scan lines131, and a plurality of common feed lines133juxtaposed with the plurality of signal lines132, which are arranged on a substrate. A pixel (pixel region element) AR is provided at each intersection of a scan line131and a signal line132.

A data-line-driving circuit390includes a shift register, a level shifter, a video line, and an analog switch and is connected to the signal lines132.

A scan-line-driving circuit380includes a shift register and a level shifter and is connected to the scan lines131. Each pixel region AR includes a first transistor322with a gate electrode to which a scan signal is supplied through the scan line131; a hold capacitor cap for holding an image signal supplied from the signal line132via the first transistor322; a second transistor324with a gate electrode to which the image signal held by the hold capacitor cap is supplied; a pixel electrode323into which a driving current flows via the common feed line133when the pixel electrode323electrically connects with the common feed line133via the second transistor324; and a luminous region (luminous layer)360placed between the pixel electrode (anode)323and a counter electrode (cathode)222.

The first transistor322and the second transistor324are micro silicon transistors bonded on the substrate of the organic EL display S1according Step1to Step11of the method described above.

Under this structure, when the scan line131is driven to turn ON the first transistor322, the potential of the signal line132at that time is held in the hold capacitor cap, and the state of conduction of the second transistor324is determined by the state of the hold capacitor cap. An electric current flows from the common feed line133to the pixel electrode323through the channel of the second transistor324. Meanwhile, the electric current also flows into the counter electrode222through the luminous layer360, and the luminous layer360emits light in an amount corresponding to the amount of current flowing therein.

Examples of electronic apparatuses including the electrooptic apparatuses of this exemplary embodiment are described below.

FIG. 21is a perspective view of an exemplary cellular phone. Referring toFIG. 21, a cellular phone main body1000has a display1001including the electrooptic apparatus described above.

FIG. 22is a perspective view of an exemplary wristwatch-type electronic apparatus. Referring toFIG. 22, a watch1100has a display section1101including the electrooptic apparatus described above.

FIG. 23is a perspective view of an exemplary portable information processing apparatus, such as a word processor or a personal computer. Referring toFIG. 23, an information processing apparatus1200includes an input section1202such as a keyboard, an information processing main unit1204, and a display section1206including the electrooptic apparatus described above.

Since the exemplary electronic apparatuses shown inFIGS. 21 to 23incorporate the electrooptic apparatuses described above, display quality is high, and the organic EL display is highly responsive and bright. Moreover the cost for manufacture is lower than conventional because the manufacturing method of the above-described exemplary embodiment is employed.

The technical scope of the present invention is not limited by the above-described exemplary embodiments. Various modifications are possible without departing from the spirit of the present invention. The specific materials and the layer structures described above are mere examples, and various modifications are possible.

As is apparent from the above description, even when the resistance of the functional layer is high, the combined resistance of the highly conductive layer and the functional layer can be reduced because the resistance of the highly conductive layer is low. Thus, the electric resistance of the semiconductor unit as a whole can be decreased. The present invention is particularly effective when the thickness of the functional layer is small and the resistance thereof is high.

Moreover, according to the manufacturing method of the present invention, semiconductor elements formed on a semiconductor substrate are separated from the semiconductor substrate and are made into micro tiles. Thus, the micro tiles of the semiconductor elements can be bonded to any workpiece to form an integrated circuit.