LIGHT EMITTING ELEMENT, LIGHT EMITTING ELEMENT ARRAY, LIGHT EMITTING COMPONENT, OPTICAL DEVICE, AND OPTICAL MEASUREMENT APPARATUS

A light emitting element includes: a substrate; a light emitting unit that is laminated on the substrate; and a thyristor that is laminated on the light emitting unit and performs setting so as to cause the light emitting unit to emit light or increase an amount of emitted light by being turned into an ON state, the thyristor having a low resistance layer with a resistance which does not electrically separate the thyristor at a position where a current flows from an electrode being in contact with the thyristor.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is based on and claims priority under 35 USC 119 from Japanese Patent Application No. 2022-052355 filed Mar. 28, 2022.

BACKGROUND

(i) Technical Field

The present invention relates to a light emitting element, a light emitting element array, a light emitting component, an optical device, and an optical measurement apparatus.

(ii) Related Art

JP2020-120018A discloses a light emitting device capable of increasing a light output by suppressing deterioration in light emitting characteristics as compared with a case of increasing a size of a light emission point of the light emitting element.

Further, JP2000-294872A discloses an oxidized surface-emitting laser and a surface-emitting laser array, which have a simple fabrication process, are resistant to stress, and are highly reliable.

SUMMARY

In the related, there is known a light emitting element in which a thyristor that performs setting so as to cause the light emitting unit to emit light or increase an amount of emitted light by being turned into an ON state by turning on the light emitting unit is laminated on the light emitting unit that emits light.

Here, depending on a resistance of a layer in which a current flows from the electrode being in contact with the thyristor, it is difficult for the current to flow in the lateral direction of the thyristor. As a result, the thyristor is electrically separated. In a case where the thyristor is electrically separated, unevenness and lighting deviation may occur in the light emission of the light emitting element, which is not appropriate.

Therefore, aspects of non-limiting embodiments of the present disclosure relate to a light emitting element that prevents the thyristor from being electrically separated in a case where the thyristor is laminated on the light emitting unit.

According to an aspect of the present disclosure, there is provided a light emitting element comprising: a substrate; a light emitting unit that is laminated on the substrate; and a thyristor that is laminated on the light emitting unit and performs setting so as to cause the light emitting unit to emit light or increase an amount of emitted light by being turned into an ON state, the thyristor having a low resistance layer with a resistance which does not electrically separate the thyristor at a position where a current flows from an electrode being in contact with the thyristor.

DETAILED DESCRIPTION

Hereinafter, referring to the accompanying drawings, the present exemplary embodiment will be described.

First Exemplary Embodiment

First, the first exemplary embodiment will be described.

FIG.1is an equivalent circuit diagram of a light emitting component10. Here, a control unit20that controls the light emitting component10is also shown. InFIG.1, a left-right direction is the x direction.

The light emitting component10comprises a plurality of laser diodes LDs that emit laser light. The light emitting component10is configured as a self-scanning light emitting element array (SLED: Self-Scanning Light Emitting Device) to be described below. The laser diode LD is, for example, a vertical cavity surface emitting laser (VCSEL). Hereinafter, the light emitting element will be described as a laser diode LD. However, other light emitting devices such as a light emitting diode LED may be used.

The light emitting component10comprises a plurality of laser diode LD groups, each of which comprises a plurality of laser diodes LD. InFIG.1, it is assumed that each laser diode LD group comprises four laser diodes LD as an example. In the following, the laser diode LD group will be referred to as laser diode LD group #1, #2, #3, . . . . In a case where each laser diode LD group is not distinguished, the laser diode LD group is referred to as a laser diode LD group or a laser diode LD group i (i is an integer of 1 or more). AlthoughFIG.1shows four laser diode LD groups, the number of laser diode LD groups may be other than four.

The light emitting component10comprises a setting thyristor S for each laser diode LD. The laser diode LD and a setting thyristor S are connected in series.

Here, laser diodes LD belonging to the laser diode LD group #1are referred to as laser diodes LD11to14. Here, in a case where the laser diode LDij (j is an integer of 1 or more) is represented, “i” is the number of the laser diode LD group, and “j” is the number of the laser diode LD in the laser diode LD group. The same reference numerals are given to the setting thyristors S. That is, the setting thyristor S included in the laser diode LD11is referred to as a setting thyristor S11. In the example shown inFIG.1, j is a number of 1 to 4. InFIG.1, each laser diode LD group comprises the same number of laser diodes LD, but the number of laser diodes LD may differ between the laser diode LD groups. Further, the number of laser diodes LD in each laser diode LD group may be 2 or more.

In the present specification, the term “to” indicates a plurality of constituent elements, each of which is distinguished by a number, and means that the constituent elements described before and after “to” and the constituent elements having numbers therebetween are included. For example, the laser diodes LD11to14include the laser diode LD11, the laser diode LD12, the laser diode LD13, and the laser diode LD14in numerical order.

The light emitting component10further comprises a plurality of transfer thyristors T, a plurality of coupling diodes D, a plurality of power line resistors Rg, a start diode SD, and current-limiting resistors R1and R2. Here, in a case of distinguishing a plurality of transfer thyristors T, the transfer thyristors T are numbered and distinguished, such as transfer thyristors T1, T2, T3, . . . . The same applies to the coupling diodes D and the power line resistors Rg. As will be described later, the transfer thyristor T1is provided to correspond to the laser diode LD group #1. Therefore, in a case where the transfer thyristor T is represented as the transfer thyristor Ti, i corresponds to the same laser diode LD group. Accordingly, the transfer thyristor T may be referred to as a transfer thyristor Ti. The same applies to the coupling diodes D and the power line resistors Rg.

The number of transfer thyristors T in the light emitting component10may be a predetermined number. For example, the number may be 128, 512, or 1024.FIG.1shows a part corresponding to the transfer thyristors T1to T4. The number of transfer thyristors T may be the same as the number of laser diode LD groups, may be greater than the number of laser diode LD groups, or may be small.

The transfer thyristors T are arranged in the x direction in order of transfer thyristors T1, T2, T3, . . . . The coupling diodes D are arranged in the x direction in order of the coupling diodes D1, D2, D3, . . . . The coupling diode D1is provided between the transfer thyristor T1and the transfer thyristor T2. The same applies to the other coupling diodes D. Further, the power line resistors Rg are also arranged in the x direction in order of the power line resistors Rg1, Rg2, Rg3, . . . .

The laser diode LD and the coupling diode D are two-terminal elements each comprising an anode and a cathode. The setting thyristor S and the transfer thyristor T are three-terminal elements each comprising an anode, a cathode, and a gate. The gate of the transfer thyristor T is referred to as a gate Gt, and the gate of the setting thyristor S is referred to as a gate Gs. In addition, in a case of distinguishing each gate, i is added in the same manner as described above.

Here, a part composed of the laser diodes LD and the setting thyristors S is set as a light emitter102, and a part composed of the transfer thyristors T, the coupling diodes D, the start diode SD, the power line resistors Rg, and the current-limiting resistors R1and R2is set as a transfer unit101.

Next, the connection relationship of each element (laser diode LD, setting thyristor S, transfer thyristor T, and the like) will be described.

As described above, the laser diodes LDij and the setting thyristors Sij are connected in series. That is, in the laser diode LD, the anode is connected to a reference potential Vsub (ground potential (GND) or the like), and the cathode is connected to the anode of the setting thyristor Sij.

Here, in the light emitting component10, the setting thyristors S are laminated on the laser diodes LD. Hereinafter, the semiconductor layer laminate of the laser diode LD and the setting thyristor S will be referred to as “LD/S”. Further, the laser diode LD, which belongs to each laser diode LD group, and the setting thyristor S, which is provided for each laser diode LD, are collectively referred to as an “LD/S group”. The LD/S is an example of the “light emitting element”, and the LD/S group is an example of the “light emitting element group”.

The cathode of the setting thyristor Sij is commonly connected to a lighting signal line75that supplies a lighting signal φI for controlling the laser diode LD such that the laser diode LD is in a light emitting or non-light emitting state.

As will be described later, the reference potential Vsub is supplied via an electrode (not shown) provided on a rear surface of a GaAs substrate80constituting the light emitting component10.

In the transfer thyristor T, the anode thereof is connected to the reference potential Vsub. The cathodes of the odd-numbered transfer thyristors T1, T3, . . . are connected to a transfer signal line72. The transfer signal line72is connected to a φ1terminal via the current-limiting resistor R1.

The cathodes of the even-numbered transfer thyristors T2, T4, . . . are connected to a transfer signal line73. The transfer signal line73is connected to a φ2terminal via the current-limiting resistor R2.

The coupling diodes D are connected with each other in series. That is, the cathode of one coupling diode D is connected to the anode of the coupling diode D which is adjacent in the x direction. In the start diode SD, the anode is connected to the transfer signal line73, and the cathode is connected to the anode of the coupling diode D1.

Then, the cathode of the start diode SD and the anode of the coupling diode D1are connected to a gate Gt1of the transfer thyristor T1. The cathode of the coupling diode D1and the anode of the coupling diode D2are connected to a gate Gt2of the transfer thyristor T2. The same applies to the other coupling diode D.

The gate Gt of the transfer thyristor T is connected to a power line71via the power line resistor Rg. The power line71is connected to a Vgk terminal.

A gate Gti of the transfer thyristor T1is connected to a gate Gsi of the setting thyristor Sij.

A configuration of the control unit20will be described.

The control unit20generates a signal such as a lighting signal φI and supplies the signal to the light emitting component10. The light emitting component10operates in response to the supplied signal. The control unit20is composed of an electronic circuit. For example, the control unit20may be an integrated circuit (IC) configured to drive the light emitting component10.

The control unit20comprises a transfer signal generation unit21, a lighting signal generation unit22, a power source potential generation unit23, and a reference potential generation unit24.

The transfer signal generation unit21generates transfer signals φ1and φ2so as to supply the transfer signal41to the41terminal of the light emitting component10and supply the transfer signal φ2to the φ2terminal of the light emitting component10. The transfer signals φ1and φ2are signals which are “H (0V)” or “L (−3.3V)”. 0V is a potential for turning off the transfer thyristor T, and −3.3V is a potential for turning the transfer thyristor T from an OFF state to an ON state.

The lighting signal generation unit22generates the lighting signal φI and supplies the signal to a φI terminal of the light emitting component10via a current-limiting resistor RI. The lighting signal φI is a signal which is “H (0V)” or “L (−3.3V)”. 0V is a potential for turning off the laser diode LD, and −3.3V is a potential for turning the laser diode LD from the OFF state to the ON state. The current-limiting resistor RI may be provided in the light emitting component10. Further, in a case where the current-limiting resistor RI is not necessary for an operation of the light emitting component10, the current-limiting resistor RI does not have to be provided.

The power source potential generation unit23generates a power source potential Vgk to supply the potential to the Vgk terminal of the light emitting component10. The reference potential generation unit24generates a reference potential Vsub to supply the potential to the Vsub terminal of the light emitting component10. The power source potential Vgk is, for example, −3.3V. As described above, the reference potential Vsub is a ground potential (GND) as an example.

In the light emitting component10shown inFIG.1, four laser diodes LDij (j=1 to 4) are connected to one transfer thyristor T1via the setting thyristors Sij, respectively.

The transfer thyristor Ti sets each LD/S group of the plurality of LD/S groups such that a lighting state or a non-lighting state propagates in sequence. Specifically, in a case where the transfer thyristor Ti is turned on, the setting thyristor Sij connected to the transfer thyristor Ti is set so as to be able to shift to the ON state. Thereby, the setting thyristor Sij provided in the LD/S of each LD/S group of the plurality of LD/S groups is turned on at different time in each LD/S group. The transfer thyristor Ti is driven such that the ON state propagates. Therefore, the transfer thyristor Ti is referred to as a transfer thyristor T. In addition, in a case where the setting thyristor Sij is turned on, the laser diode LDij emits light. Therefore, since the laser diode LD is set to be capable of emitting light, a thyristor for the setting is referred to as a setting thyristor S.

Here, the plurality of LD/S groups are configured, the LD/S group is connected to each transfer thyristor T, and the laser diode LD belonging to the LD/S group emits light in parallel.

The laser diode LD may oscillate in, for example, a low-order single transverse mode (single mode). In the single mode, an intensity profile of the light (emitted light) emitted from a light emission point of the laser diode LD (light emission opening47inFIGS.2and3to be described later) is unimodal (characteristic of having one intensity peak). On the other hand, in the laser diode LD that oscillates in the multiple transverse mode (multi mode) including high order, the intensity profile tends to have distortion such as multiple peaks. Further, in the single mode, a spread angle of the light emitted from the light emission point (emitted light) is smaller than a spread angle in the multi mode. Therefore, in a case where the light output is the same, the single mode has a higher light density on an irradiated surface than the multi mode. The spread angle means a full width at a half maximum (FWHM) of the light emitted from the laser diode LD.

The smaller the area of the light emission point, the easier it is for the laser diode LD to oscillate in the single transverse mode (single mode). Therefore, the single mode laser diode LD has a small light output. In a case where the area of the light emission point is increased in an attempt to increase the light output, the mode shifts to the multi-mode as described above. Therefore, in the first exemplary embodiment, the plurality of laser diodes LD are designated as the laser diode LD group, and the plurality of laser diodes LD included in the laser diode LD group are made to emit light in parallel to increase the light output.

FIG.2is a diagram showing an example of a planar layout of the light emitting component10. On the page ofFIG.2, the left-right direction is the x direction and the up-down direction is the y direction. The x direction is the same as the x direction inFIG.1. InFIG.2, the light emitter102is a light emitting element array in which the plurality of LD/S groups each having the plurality of LD/S are arranged.

The light emitting component10is composed of a semiconductor material capable of emitting laser light. For example, the light emitting component10is composed of a GaAs-based compound semiconductor. Then, as shown in a cross-sectional view (refer toFIG.3) to be described later, the light emitting component10is composed of a semiconductor layer laminate in which a plurality of GaAs-based compound semiconductor layers are laminated on a p-type GaAs substrate80. Further, the light emitting component10is configured by separating the semiconductor layer laminate into a plurality of island-shaped pieces. A region left in the island shape is referred to as an island. Etching the semiconductor layer laminate in island shapes to separate the elements is called mesa etching. Here, the planar layout of the light emitting component10will be described with reference to islands301,302,303,304, and305shown inFIG.2. In a case where the islands301and302are distinguished from each other, the islands301and302are represented as islands301-ior302-i(i≥1) as described above. The island301is separated into an island301A in which the LD/S group is provided and an island301B in which the transfer thyristor T and the coupling diode D are provided.

The island301A-i is provided with the laser diode LDij and the setting thyristor Sij, and the island301B-i is provided with the transfer thyristor T1and the coupling diode Di (in this example, j=1 to 4). Then, in the islands301A-i, posts311, each of which is configured in a cylinder shape in accordance with an outer shape of the laser diode LD, are arranged. The post311is a part of the LD/S from which laser light is emitted.

A part of each post311belonging to each LD/S group is continuous in the y direction at the facing part. Hereinafter, a part in which a part of each post311is continuous in the y direction is referred to as a “connection part60”. That is, the setting thyristor S provided in each of the plurality of LD/Ss are connected via the connection part60. InFIG.2, each LD/S is described as LD/Sij to distinguish LD/S.

Further, the islands301A-i are provided to be parallel to each other in the x direction. Here, the LD/S groups are one-dimensionally arranged in the x direction.

The island302-iis provided with a power line resistor Rgi. The islands302-iare provided to be parallel to each other in the x direction.

The island303is provided with the start diode SD. The island304is provided with the current-limiting resistor R1, and the island305is provided with the current-limiting resistor R2.

FIG.3is a cross-sectional view taken along the line A-A ofFIG.2. InFIG.3, the left-right direction is the y direction.

FIG.3shows LD/S13, LD/S12, and LD/S11from the left. Since a structure of each LD/S is common, LD/S11will be described as an example.

As shown inFIG.3, the LD/S11has a structure in which the laser diode LD that generates the laser light and the setting thyristor S that controls the lighting and extinguishing of the laser diode LD are combined with a tunnel cementing layer45interposed therebetween on the GaAs substrate80which is a compound semiconductor substrate. The GaAs substrate80is an example of the “substrate”, the laser diode LD is an example of the “light emitting unit”, and the setting thyristor S is an example of the “thyristor”.

In the laser diode LD, an n-type cathode layer41, a light emitting layer42, and a p-type anode layer43are laminated on the GaAs substrate80. The light emitting layer42has a quantum well structure in which well layers and barrier layers are alternately laminated.

A part of the anode layer43is formed with a current constriction layer43A generated by oxidation. The current constriction layer43A is formed such that current flowing through the LD/S11passes through the central part by constricting a current path of the current flowing through the LD/S11. Specifically, the central part of the current constriction layer43A is formed as a current pass region a in which current easily flows, and a peripheral portion thereof is formed as a current block region in which current does not easily flow.

By providing such a current constriction layer43A, power consumed for non-luminescence recombination is suppressed, and power consumption is reduced and a light emission efficiency is increased.

Here, the current constriction layer43A is formed by oxidizing a part of the anode layer43as described above. It should be noted that oxidizing a part of the anode layer43to form the current constriction layer43A may be referred to as oxidization constriction.

Then, the tunnel cementing layer45is laminated on the anode layer43. The tunnel cementing layer45is configured by cementing an n++layer in which n-type impurities are added at a high concentration and a p++layer in which p-type impurities are added at a high concentration. The n++layer and the p++layer each have a high impurity concentration of, for example, 1×1021/cm3.

The setting thyristor S is laminated on the tunnel cementing layer45. The setting thyristor S is laminated in order of a cathode layer51, a p-type p-gate layer52, a n-type n-gate layer53, an anode layer54, and a low resistance layer55.

The low resistance layer55is a p-type semiconductor layer in which p-type impurities are added at a high concentration. For example, the impurity concentration is 1×1019/cm3or more and 1×1021/cm3or less. The resistance of the low resistance layer55is lower than the resistance of the anode layer54and higher than the resistances of the p-gate layer52and the n-type n-gate layer53.

Further, on the low resistance layer55, an electrode49that supplies a current for controlling the ON state and an OFF state of the setting thyristor S is formed. The electrode49is made of a metal material such as the low resistance layer55, which easily forms ohmic contact with a p-type semiconductor layer. In such a case, as shown inFIG.3, the electrode49is disposed at the connection part60connecting each LD/S. The electrode49extends in the y direction inFIG.3, and one electrode49is shared between LD/Ss, for example, LD/S11and LD/S12. By sharing the electrodes49among the plurality of LD/Ss, the number of electrodes49included in the light emitter102is smaller than the number in a case where the electrode49is provided for each LD/S. The electrode49is an example of “an electrode being in contact with a thyristor” and “an electrode being in contact with a setting thyristor”.

Further, an interlayer insulating layer91is provided to cover the entire light emitting component10. The lighting signal line75is provided on the interlayer insulating layer91so as to be connected to the electrode49via a through-hole provided in the interlayer insulating layer91. The lighting signal line75is an example of the “supply electrode”.

Here, a signal for controlling the ON state and the OFF state of the setting thyristor S is supplied to the electrode49.

The lighting signal line75supplies a current for light emission to the laser diode LD. More specifically, the lighting signal line75supplies a current to the electrode49of the laser diode LD via a through-hole provided in the interlayer insulating layer91. The lighting signal line75has an area larger than an area of the electrode49. Thereby, the lighting signal line75is able to flow a current larger than, for example, a current in a case where a current flows to the electrode49.

In a case where the interlayer insulating layer91is inferior in translucency to the emitted light of the laser diode LD, instead of the interlayer insulating layer91, the light exit layer, which is excellent in translucency of the emitted light of the laser diode LD, may be provided on the light emission opening47.

An electrode56is provided on the exposed n-gate layer53except for the low resistance layer55and the anode layer54, on the right side of the LD/S11inFIG.3. The electrode56is connected to the wiring line78via a through-hole provided in the interlayer insulating layer91.

FIG.4is a cross-sectional view taken along the line B-B ofFIG.2. InFIG.4, the left-right direction is the y direction.

In the transfer thyristor T1, the cathode layer41, the light emitting layer42, the anode layer43, the tunnel cementing layer45, the cathode layer51, the p-gate layer52, the n-gate layer53, and the anode layer54are laminated on the GaAs substrate80. Consequently, unlike the LD/S11, the transfer thyristor T1is not provided with the low resistance layer55.

The transfer thyristor T1is provided with the electrode58on the anode layer54and functions as a gate for controlling the operation of the transfer thyristor T1. The electrode58is connected to the transfer signal line72(refer toFIG.2). The electrode58is an example of the “electrode being in contact with the transfer thyristor”.

Although not shown, an electrode57(refer toFIG.2) is provided on the anode layer54on the left side of the transfer thyristor T1inFIG.4. The electrode57is connected to the wiring line78(refer toFIG.2) via a through-hole provided in the interlayer insulating layer91. In such a manner, in a case where the transfer thyristor T is turned on and the gate Gt is 0V, the gate Gs of the setting thyristor S is at 0V via the wiring line78. Consequently, the ON state of the transfer thyristor T is transferred in order, such that the connected setting thyristor S shifts to the ON state.

Further, in a part where the transfer thyristor T1is provided on the semiconductor layers (cathode layer41, light emitting layer42, and anode layer43) constituting the laser diode LD, the cathode layer41, the light emitting layer42, and the anode layer43are shot-circuited through a wiring line79(refer toFIG.2) such that the laser diode LD does not operate.

As described above, the light emitting component10uses the plurality of laser diodes LD as the laser diode LD group, and causes the plurality of laser diodes LD included in the laser diode LD group to emit light in parallel. In such a case, in a case where a wiring line for supplying a signal for controlling light emission or non-light emission of the laser diode LD is provided from the transfer unit101for each laser diode LD included in the laser diode LD group, a distance between the laser diodes LD has to be increased. Thus, an area of the light emitting component10increases.

Therefore, in the light emitting component10, the setting thyristor S for setting the laser diode LD to be capable of emitting light is provided for each laser diode LD, and the setting thyristor S and the laser diode LD are laminated. Thereby, an increase in area of the light emitting component10is suppressed. Further, for each LD/S group, it is not necessary to provide a wiring line for supplying a signal for controlling light emission or non-light emission of the laser diode LD from the transfer unit101by connecting the semiconductor layer constituting the setting thyristor S by the connection part60.

The structure of the LD/S in the cross-sectional view taken along the line A-A ofFIG.2is not limited to that shown inFIG.3. For example, the structure of the LD/S may be that shown inFIG.5orFIG.6.

FIG.5is a first explanatory diagram showing another structure of LD/S11in the cross-sectional view taken along the line A-A ofFIG.2. InFIG.5, the left-right direction is the y direction. It should be noted thatFIG.5is a schematic diagram in which the structure of the LD/S11is partially omitted.

Unlike the LD/S11shown inFIG.3, the LD/S11shown inFIG.5has the setting thyristor S which is removed from the central portion of the LD/S11. That is, in the central portion of the LD/S11, the low resistance layer55, the anode layer54, the n-gate layer53, the p-gate layer52, the cathode layer51, and the tunnel cementing layer45are removed by etching. Thereby, the anode layer43of the laser diode LD is exposed. In such a case, the exposed part of the anode layer43is the light emission opening47of the laser diode LD.

As described above, the LD/S may have a structure in which the tunnel cementing layer45, the cathode layer51, the p-gate layer52, the n-gate layer53, the anode layer54, and the low resistance layer55remain such that the setting thyristor S is configured to surround the light emission opening47of the laser diode LD.

FIG.6is a second explanatory diagram showing another structure of LD/S11in the cross-sectional view taken along the line A-A ofFIG.2. InFIG.6, the left-right direction is the y direction. It should be noted thatFIG.6is a schematic diagram in which the structure of the LD/S11is partially omitted.

In the LD/S11shown inFIG.6, the cathode layer41, the light emitting layer42, and the anode layer43are laminated on the GaAs substrate80, in a similar manner to the LD/S11shown inFIG.3. Further, in the LD/S11shown inFIG.6, the tunnel cementing layer45is laminated on the anode layer43and the setting thyristor S is laminated on the tunnel cementing layer45. However, the structure of the low resistance layer55included in the setting thyristor S is different from the structure of the LD/S11shown inFIG.3.

The low resistance layer55shown inFIG.6is composed of a tunnel cementing layer55A and an n-type layer55B.

The tunnel cementing layer55A is configured by cementing an n++layer in which n-type impurities are added at a high concentration and a p++layer in which p-type impurities are added at a high concentration. The n++layer and the p++layer each have a high impurity concentration of, for example, 1×1021/cm3.

The n-type layer55B is, for example, an n-type semiconductor layer having an impurity concentration of 1×1019/cm3. The n-type layer55B is an example of the “n-type semiconductor layer”. In such a case, the anode layer54cemented to the n-type layer55B via the tunnel cementing layer55A is an example of “another layer of the thyristor”. With such a configuration, the LD/S is downsized as compared with the case where the n-type layer55B and the anode layer54are not laminated.

Next, a method of manufacturing the transfer thyristor T1shown inFIG.4will be described with reference toFIGS.7to9. In the following description, for example, it is assumed that the low resistance layer55of the LD/S is composed of the tunnel cementing layer55A and the n-type layer55B shown inFIG.6.

In the transfer thyristor T1shown inFIG.7, the cathode layer41, the light emitting layer42, the anode layer43, the tunnel cementing layer45, the cathode layer51, the p-gate layer52, the n-gate layer53, the anode layer54, the GaInP layer56, the tunnel cementing layer55A, and the n-type layer55B are laminated on the GaAs substrate80.

The GaInP layer56is a semiconductor layer made of GaInP.

The transfer thyristor T1shown inFIG.8shows a state after the tunnel cementing layer55A and the n-type layer55B have been removed by etching from the state shown inFIG.7. In the etching of the tunnel cementing layer55A and the n-type layer55B, for example, a phosphoric acid system is used as an etchant.

The transfer thyristor T1shown inFIG.9shows a state after the GaInP layer56has been removed by etching from the state shown inFIG.8. In the etching of the GaInP layer56, for example, phosphoric acid or hydrochloric acid is used as an etchant.

By the above-described steps, in the transfer thyristor T1shown inFIG.9, the low resistance layer55and the GaInP layer56are removed, and the uppermost portion is the anode layer54. Although not shown inFIG.9, the electrode58is provided on the anode layer54(refer toFIG.4). Thereby, in the transfer thyristor T1, the anode layer54is an example of “the layer through which the current flows from the electrode being in contact with the transfer thyristor”.

Here, unlike the setting thyristor S provided in the light emitter102, a high resistance is necessary for the transfer thyristor T provided in the transfer unit101. Therefore, a high resistance layer is provided on the uppermost portion. For example, the anode layer54is a p-type semiconductor layer that has an impurity concentration of 1×1018/cm3, and has a higher resistance than the low resistance layer55. That is, the low resistance layer55of the setting thyristor S has a lower resistance than the anode layer54of the transfer thyristor T. With such a configuration, in the first exemplary embodiment, the operation of the transfer thyristor T can be stabilized as compared with a case where the anode layer54of the transfer thyristor T has a lower resistance than the low resistance layer55of the setting thyristor S.

In the above description, the case where the low resistance layer55and the GaInP layer56are removed has been described as a method of manufacturing the transfer thyristor T1. However, the present invention is not limited to this, and the transfer thyristor T1does not have to be provided with the low resistance layer55in advance.

As described above, in the first exemplary embodiment, the LD/S comprises the GaAs substrate80, the laser diode LD, and the setting thyristor S. In such a case, the setting thyristor S is provided with the low resistance layer55having a resistance that does not electrically separate the setting thyristor S at a position where a current from the electrode49flows. In the first exemplary embodiment, the low resistance layer55having a resistance that does not electrically separate the setting thyristor S is, for example, a p-type semiconductor layer having an impurity concentration of 1×1019/cm3or more and 1×1021/cm3or less or an n-type semiconductor layer having an impurity concentration of greater than 1×1018/cm3. In a case where the low resistance layer55is a p-type semiconductor layer, the structure of the low resistance layer55is simpler than a structure in a case where the low resistance layer55is an n-type semiconductor layer. Further, in a case where the low resistance layer55is an n-type semiconductor layer, the resistance of the low resistance layer55is lower than a resistance in a case where the low resistance layer55is a p-type semiconductor layer.

In the first exemplary embodiment, the low resistance layer55is provided on the uppermost portion of the setting thyristor S as a position where the current flows from the electrode49. However, the present invention is not limited to this. For example, in a case of the position where the current flows from the electrode49, the low resistance layer55may be provided in another layer such as a layer immediately below the uppermost portion of the setting thyristor S.

Here, in a case where the resistance of the low resistance layer55is higher than the above reference, it is difficult for a current to flow in the lateral direction of the setting thyristor S, and the setting thyristor S may be electrically separated. In a case where the setting thyristor S is electrically separated, unevenness and lighting deviation may occur in the light emission of the LD/S, which is not appropriate.

However, in the first exemplary embodiment, the low resistance layer55having a resistance lower than the above standard is adopted. Therefore, in a case where the setting thyristor S is laminated on the laser diode LD, the setting thyristor S can be made not to be electrically separated.

Further, in order not to electrically separate the setting thyristor S, it can be assumed that a circular electrode is provided to surround the light emission opening47on the uppermost portion of the setting thyristor S. However, in such a case, it is necessary to provide a margin, which is for providing the electrode, for the LD/S. As a result, the size of the LD/S increases. On the other hand, in the first exemplary embodiment, the circular electrode surrounding the light emission opening47is not provided on the uppermost portion of the setting thyristor S. Therefore, the LD/S can be miniaturized as compared with the case where the electrode is provided.

Further, in the first exemplary embodiment, a signal for controlling the ON state and the OFF state of the setting thyristor S is supplied to the electrode49. Thereby, in the first exemplary embodiment, the ON state and the OFF state of the setting thyristor S are switched.

Further, in the first exemplary embodiment, the lighting signal line75that supplies a current for causing the laser diode LD to emit light is provided. Thereby, in the first exemplary embodiment, the laser diode LD emits light via the lighting signal line75.

Second Exemplary Embodiment

Next, a second exemplary embodiment will be described while omitting or simplifying an overlapping part with the other exemplary embodiments.

An optical device30in the second exemplary embodiment employs the light emitting component10described in the first exemplary embodiment.

FIG.10is a schematic diagram showing a configuration of the optical device30. Then, the left-right direction is the x direction and the up-down direction is the y direction.

The optical device30comprises a light emitting component10and an optical element (not shown). The light emitting component10comprises nine LD/S groups (LD/S groups #1to #9) and a transfer unit101one-dimensionally arranged in the x direction on the light emitter102. The detailed description of the transfer unit101will not be repeated. Then, the optical device30comprises an optical element that sets a direction or a spread angle of the light emitted from each LD/S group in the plurality of LD/S groups included in the light emitting component10to a predetermined direction or a predetermined spread angle. Hereinafter, for example, a description will be given in a case where the optical element is a convex lens (hereinafter referred to as a lens LZ) and the emission direction of light is deflected in the predetermined direction. For example, the LD/S group #1is disposed with the center of the lens LZ shifted in the x direction with respect to the center of the light emission opening47(refer toFIG.3) of the laser diode LD so as to deflect the light emitted by the laser diode LD in the x direction.

In a case where the lens LZ is a small lens such as a micro lens, the deflection angle may be small. In such a case, another lens may be provided on the front surface of the optical device30provided with the lens LZ so as to increase the deflection angle. Further, the lens LZ has been described as a convex lens but may be a concave lens or an aspherical lens.

Further, in the above description, the emission direction of light is deflected, but the spread angle may be changed. For example, the convex lens may be employed to focus the light on the irradiated surface, or the light may be spread so as to be irradiated in a predetermined range on the irradiated surface.

FIG.11is a schematic diagram showing a configuration of an optical measurement apparatus1comprising the optical device30. The optical measurement apparatus1comprises an optical device30, a light receiving unit11that receives reflected light from a measurement target object (target object)13irradiated with light from the optical device30, and a processing unit12that processes information about the light received by the light receiving unit11so as to measure the distance from the optical device30to the measurement target object13or the shape of the measurement target object13. Then, the measurement target object13is set to be close to the optical measurement apparatus1. The measurement target object13is, for example, a human being. Then,FIG.11is a diagram viewed from above.

The light receiving unit11is a device that receives the light reflected by the measurement target object13. The light receiving unit11may be a photodiode. The photodiode is, for example, a single photon avalanche diode (SPAD) that can accurately measure the light receiving time.

The processing unit12is configured as a computer including an input output unit for inputting and outputting data. Then, the processing unit12processes the information about the light so as to calculate the distance to the measurement target object13and the two-dimensional or three-dimensional shape of the measurement target object13.

The processing unit12of the optical measurement apparatus1controls the light emitting component10of the optical device30so as to emit the light from the light emitting component10. That is, the light emitting component10of the optical device30emits the light in a pulse shape. Then, the processing unit12calculates an optical path length until light is emitted from the optical device30, then reflected by the measurement target object13, and reaches the light receiving unit11, on the basis of the time difference between the time at which the light emitting component10emits light and the time at which the light receiving unit11receives the reflected light from the measurement target object13. Therefore, the processing unit12measures a distance from the optical device30and the light receiving unit11or a distance from a point serving as a reference (hereinafter referred to as the reference point) to the measurement target object13. In addition, the reference point is a point provided at a predetermined position from the optical device30and the light receiving unit11.

FIG.12is a diagram showing a state where light is emitted from the optical measurement apparatus1. Here, it is assumed that the person14holds the optical measurement apparatus1in his or her right hand and measures presence or absence of the target object in front of him or her.

For example, light from the LD/S group #1of the light emitting component10in the optical device30travels toward a region @1of the irradiated surface15virtually set. Further, the light from the LD/S group #2travels toward a region @2. In such a manner, light is emitted from the LD/S groups #1to #9toward different regions @1to @9. Then, the light receiving unit11receives the reflected light. Then, the processing unit12measures the time that elapses until the light is emitted and then the light receiving unit11receives the reflected light. Then, it is possible to detect which direction the measurement target object13is located in. That is, the optical measurement apparatus1is a proximity sensor. Further, the two-dimensional or three-dimensional shape of the measurement target object13is measured from the distance to the measurement target object13.

The method is a surveying method based on a light arrival time, and is called a time-of-flight (TOF) method. In the method, for example, light having a shape of a plurality of pulses may be emitted in order to improve a measurement accuracy. Further, the number of pulses may be increased to improve the measurement accuracy, in a specific direction, for example, inFIG.12, for the region @2on the front side. That is, a period for irradiating the region @2with light may be longer than other periods, and the number of pulses may be increased.

The optical device30sequentially emits light in the predetermined direction. Therefore, the optical device30has a resolution lower than a resolution in a case where light is emitted simultaneously in multiple directions, but consumes less power. Further, in a case where light is emitted simultaneously in multiple directions, it is necessary to identify the direction in which the reflected light comes by using the light receiving elements in which the light receiving elements are arranged two-dimensionally. In contrast, in the optical measurement apparatus1that emits light by sequentially changing the direction, it is not necessary to use a light receiving element in which light receiving elements are arranged in two dimensions, and it suffice to use a light receiving element capable of measuring a change in the intensity of the received light at high speed. Therefore, the configuration of the optical measurement apparatus1is simplified.

The light emitting component10in the optical device30shown inFIG.10comprises nine LD/S groups #1to #9. Then, as shown inFIG.12, nine regions @1to @9of 3×3 are irradiated. Therefore, in a case where increasing the number of regions, the number of LD/S groups to be arranged may be changed. In a case of irradiating25regions @1to @25of 5×5, 25 LD/S groups may be provided. In addition, 20 areas of 5×4 and 4×5 may be used. Further, the LD/S group is arranged in one dimension, but may be arranged in two dimensions. Further, the irradiated regions do not have to be arranged in a grid pattern. The optical element such as the lens LZ may be set to set the emission direction of light from the laser diode LD of the light emitting component10in the optical device30so as to irradiate a location to be measured.

As described above, the optical device30in the second exemplary embodiment sequentially drives the LD/S groups in the light emitting component10along the arrangement so as to irradiate the light in a planar manner. That is, light is emitted into a two-dimensional space through a one-dimensional operation.