Display device including shorting bar

A display device includes a substrate including an array area in which an image is displayed and a pad area in which an image is not displayed, gate lines in the array area and elongated in a first direction on the substrate, gate lines pads in the pad area and respectively electrically connected to the gate lines, floating patterns disposed in the pad area, a first shorting bar in the pad area and with which electrostatic energy from the floating patterns is dissipated; and first shorting bar lines in the pad area and defined by first lines respectively connected to the floating patterns and second lines spaced apart from the first lines and connected to the first shorting bar, wherein ends of the second lines respectively face ends of the first lines.

This application claims priority to Korean Patent Application No. 10-2014-0141802, filed on Oct. 20, 2014, and all the benefits under 35 U.S.C. § 119, the contents of which are hereby incorporated by reference in its entirety.

BACKGROUND

The invention relates to a display device. More particularly, the invention relates to a liquid crystal display.

2. Description of the Related Art

In general, a liquid crystal display includes a first display substrate including signal lines such as gate lines and data lines, thin film transistors respectively disposed in pixel areas and pixel electrodes respectively disposed in the pixel areas, a second display substrate including a color filter and a common electrode, and a liquid crystal layer interposed between the first and second display substrates. The liquid crystal display applies voltages to the pixel electrode and the common electrodes to realign liquid crystal molecules of the liquid crystal layer, and thus an amount of light traveling through the liquid crystal layer is adjusted, thereby displaying desired images.

To manufacture the liquid crystal display, various processes, e.g., a process of forming various patterns including transistors on the first display substrate, a process of forming various patterns including the color filter layer on the second display substrate, a process of injecting a liquid crystal material into between the first and second display substrates, which are coupled with each other, and a process of connecting an external driving circuit to the first display substrate, are required.

SUMMARY

When a liquid crystal display is manufactured, an inspection process is performed to inspect for defects in signal lines, e.g., an electrical short between the signal lines or an open in the signal lines, and for defects in thin film transistors connected to respective signal lines. For the inspection process, a shorting bar is connected to each signal line on the first display substrate. However, forming the shorting bar may be difficult in the liquid crystal display when the liquid crystal display employs a portrait-type orientation display panel in which an overall length thereof in a vertical direction is greater than an overall length thereof in a horizontal direction to reduce manufacturing cost and power consumption.

One or more exemplary embodiment of the invention provides a display device including a shorting bar applicable to various structures of a display device.

One or more exemplary embodiment of the invention provides a display device including a substrate including an array area in which an image is displayed and a pad area in which an image is not displayed, gate lines in the array area and elongated in a first direction on the substrate, gate lines pads in the pad area and respectively electrically connected to the gate lines, floating patterns in the pad area, a first shorting bar in the pad area and with which electrostatic energy from the floating patterns is dissipated, and first shorting bar lines in the pad area and defined by first lines respectively connected to the floating patterns and second lines spaced apart from the first lines and connected to the first shorting bar, where ends of the second lines face ends of the first lines.

The first lines may include first ends respectively connected to the floating patterns and second ends opposite to the first ends, the second ends of the first lines facing the ends of the second lines. The second ends of the first lines may be aligned in a plan view.

The second lines may include first ends respectively connected to the first shorting bar and second ends opposite to the first ends, the second ends of the second lines facing the second ends of the first lines. The second ends of the second lines may be aligned in the plan view.

The first lines of the first shorting bar lines may have a bent structure or the second lines of the first shorting bar lines may have a bent structure.

In the first direction, the first shorting bar may be disposed between the array area and the floating patterns.

The display device may further include an outermost line in the pad area.

In the first direction, the floating patterns may be disposed between the first shorting bar and the outermost line.

In the first direction, the first shorting bar may be disposed between the outermost line and the floating patterns.

The display device may further include second shorting bar lines in the pad area and respectively connected to the gate line pads.

Distal ends of the second shorting bar lines may each terminate at an outermost edge of the substrate.

The display device may further include a second shorting bar in the pad area. The second shorting bar lines may be disposed between the second shorting bar and the gate line pads. Each of the second shorting bar lines may be defined by a first portion connected to a respective gate line pad and a second portion spaced apart from the first portion, wherein the second portion is connected to the second shorting bar. Among the second shorting bar lines disposed between the second shorting bar and the gate line pads, ends of the second portions may respectively face ends of the first portions.

The display device may further include data lines in the array area and elongated in a second direction substantially perpendicular to the first direction on the substrate, data line pads in the pad area and respectively electrically connected to the data lines, and second shorting bar lines in the pad area and respectively connected to the data line pads.

Distal ends of the second shorting bar lines may each terminate at an outermost edge of the substrate.

The display device may further include a second shorting bar in the pad area. The second shorting bar lines may be disposed between the second shorting bar and the data line pads. Each of the second shorting bar lines may be defined by a first portion connected to a respective data line pad and a second portion spaced apart from the first portion and connected to the second shorting bar. Among the second shorting bar lines disposed between the second shorting bar and the data line pads, ends of the second portions may respectively face ends of the first portions.

According to one or more exemplary embodiment described above, in a preliminary display substrate, the first shorting bar is electrically connected to the floating patterns by the first shorting bar lines, and thus the static electricity generated in the floating patterns may be discharged. In a display substrate formed from the preliminary display substrate, since the first shorting bar lines are divided to define disconnected portions thereof, the floating patterns may be separated from the first shorting bar.

DETAILED DESCRIPTION

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms, “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. In the drawings, while a reference numeral may be illustrated with respect to a single feature, the reference numeral is used to indicate not only a singular feature but also to collectively indicate a plurality of the feature. It will be further understood that the terms “includes” and/or “including”, when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

FIG. 1is a cross-sectional view showing an exemplary embodiment of a display device according to the invention,FIG. 2Ais a plan view showing an exemplary embodiment of a first display substrate of a display device according to the invention,FIG. 2Bis a partially enlarged view showing portion A shown inFIG. 2A,FIG. 3Ais a plan view showing another exemplary embodiment of a first display substrate of a display device according to the invention, andFIG. 3Bis a partially enlarged view showing portion A shown inFIG. 3A.

Referring toFIGS. 1, 2A and 3A, the display device includes a first display substrate100, a second display substrate200spaced apart from the first display substrate100and facing the first display substrate100, and a liquid crystal layer300interposed between the first and second display substrates100and200.

In the illustrated exemplary embodiment, in the plan view, the first display substrate100has a substantially rectangular shape and is provided in a portrait type orientation in which an overall length thereof in a vertical direction is greater than an overall length thereof in a horizontal direction. Hereinafter, the horizontal direction of the first display substrate100is referred to as a first direction D1and the vertical direction is referred to as a second direction D2substantially vertical to the first direction D1.

The first display substrate100includes an array area ARA and a pad area PDA. In an exemplary embodiment, an image of the display device may be display in the array area ARA, while an image is not displayed in the pad area PDA, but the invention is not limited thereto. The array area ARA and the pad area PDA may otherwise be generally referred to as a display area and a non-display area.

In an exemplary embodiment, the array area ARA covers a center portion of the first display substrate100and is shifted to one side portion of the first display substrate100. The pad area PDA is outside of and surrounds at least a portion of the array area ARA. Referring toFIG. 2A, for instance, the overall pad area PDA includes a first area PDA_1disposed at a lower side of the array area ARA and a second area PDA_2disposed at a right side of the array area ARA. In other words, the first area PDA_1of the pad area PDA extends in the second direction D2from the array area ARA and the second area PDA_2extends in the first direction D1from the array area ARA. The overall pad area PDA may further include areas disposed at a left side and an upper side of the array area ARA, but the invention is not limited thereto.

The first display substrate100includes gate lines GL elongated to extend in the first direction D1and data lines DL elongated to extend in the second direction D2on a base substrate. The gate lines GL and the data lines DL cross within the array area ARA and each extend to the pad area PDA. Distal ends of the gate lines GL and the data lines DL may be disposed in the pad area PDA, but the invention is not limited thereto.

Although not shown in detail, the first display substrate100further includes thin film transistors and pixel electrodes on the base substrate. Each thin film transistor among the thin film transistors is electrically connected to a corresponding gate line among the gate lines GL and a corresponding data line among the data lines DL and switches a signal applied to a corresponding pixel electrode among the pixel electrodes. Each thin film transistor includes a gate electrode branched from the corresponding gate line, a source electrode branched from the corresponding data line, and a drain electrode electrically connected to the corresponding pixel electrode. In addition, each thin film transistor further includes an active pattern disposed between the source electrode and the drain electrode in a plan view. A portion of the active pattern may be exposed between the source electrode and the drain electrode which are spaced apart from each other. Each thin film transistor further includes a gate insulating pattern disposed between the active pattern and the gate electrode in a cross-sectional view.

Referring toFIGS. 2A, 2B, 3A and 3B, gate line pads110electrically connected to the gate lines GL, first shorting bar lines115, floating patterns120, second shorting bar lines125, a second shorting bar127and an outermost line130are each disposed on the base substrate and in the pad area PDA.

First ends of the gate line pads110make contact with distal ends of the gate lines GL and the second ends of the gate line pads110opposite to the first ends thereof make contact with the first shorting bar lines115. First ends of the first shorting bar lines115make contact with the gate line pads110and the second (distal) ends of the first shorting bar lines115opposite to the first ends thereof terminate to make contact with or be aligned with an edge of the first display substrate100.

The outermost line130is disposed on the base substrate at the edge of the first display substrate100to be adjacent to the floating patterns120. The floating patterns120are electrically disconnected from other elements of the first display substrate100to be considered as electrically floating.

According to the illustrated exemplary embodiment, the floating patterns120are disposed between the outermost line130and the array area ARA. The floating patterns120are not electrically connected to the gate lines GL and are electrically connected between circuit lines (not shown). Each of the floating patterns120has a bar shape elongated to extend in the second direction D2.

Each of the second shorting bar lines125includes a first line122connected to a corresponding floating pattern120among the floating patterns120and a second line124connected to the second shorting bar127. In more detail, a first end of the first line122is connected to the corresponding floating pattern120and a first end of the second line124is connected to the second shorting bar127. A second end of the first line122opposite to the first end thereof faces a second end of the second line124opposite to the first end thereof, and has a structure corresponding to that of the second line124. That is, cross-sectional layered structure of the first and second lines122and124may be the same, such as including same materials or being disposed in same layers of the first display substrate100among layers disposed on the base substrate thereof. Among the first lines122, the second (distal) ends of the first lines122are disposed at or aligned with a same plane (e.g., coplanar) and among the second lines124, the second ends of the second lines124are disposed to terminate at or be aligned with a same plane (e.g., coplanar).

Referring toFIGS. 2A and 2B, each of the first lines122of the second shorting bar lines125is bent in the plan view. In the illustrated exemplary embodiment, for instance, each of the first lines122includes a first portion elongated to extend in the second direction D2and a second portion elongated to extend in the first direction D1. The second line124is elongated to extend in the first direction D1without being bent. An entirety of the second line124is elongated in the first direction D1. Although not shown in figures, a third line may be further disposed between the first and second lines122and124.

Referring toFIGS. 3A and 3B, each of the first lines122of the second shorting bar lines125is elongated to extend in the second direction D2without being bent. An entirety of the first line122is elongated in the second direction D2. Each of the second lines124of the second shorting bar lines125is bent in the plan view. In the illustrated exemplary embodiment, for instance, each of the second lines124includes a first portion elongated to extend in the second direction D2and a second portion elongated to extend in the first direction D1. Although not shown in figures, a third portion (not shown) may be further disposed between the first and second portions.

The outermost line130is disposed between the floating patterns120and the edge of the first display substrate100. The second shorting bar127, which is configured to reduce or effectively prevent static electricity (e.g., electrostatic energy) from being generated in the floating pattern120, is disposed between the floating pattern120and the array area ARA. The static electricity may be generated during an inspection process and/or a manufacturing process of the display device. Accordingly, after an inspection and/or manufacturing process of the display device, the second shorting bar127is not removed and remains a part of the first display substrate100.

When the first and second lines122and124are electrically connected to each other, the second shorting bar127is connected to the floating pattern120via the first and second lines122and124electrically connected to each other. When the static electricity is generated in the floating pattern120, the second shorting bar127is in an equipotential state with the floating pattern120via the first and second lines122and124electrically connected to each other, and thus the static electricity generated in the floating patterns120is discharged. The static electricity may be generated during an inspection process and/or a manufacturing process of the display device. Then, after an inspection and/or manufacturing process of the display device, the first and second lines122and124are electrically separated (e.g., disconnected) from each other such that the second shorting bar127is electrically separated from the floating pattern120.

Referring toFIGS. 2A and 3Aagain, data line pads140and third shorting bar lines145, which are electrically connected to the data lines DL, are each disposed on the base substrate and in the first area PDA_1of the pad area PDA.

First ends of the data line pads140are connected to distal ends of the data lines DL and the second ends of the data line pads140opposite to the first ends thereof are connected to the third shorting bar lines145. First ends of the third shorting bar lines145are connected to the second ends of the data line pads140and second ends of the third shorting bar lines145opposite to the first ends thereof are disposed at the edge of the first display substrate100. The second (distal) ends of the third shorting bar lines145opposite to the first ends may terminate to make contact with or be aligned with an edge of the base substrate of the first display substrate100.

Although not shown in figures, the second display substrate200includes a common electrode and a color filter each disposed on a base substrate. In addition, a column spacer is disposed between the first and second display substrates100and200to allow the first and second display substrates100and200to be spaced apart from each other, and the liquid crystal layer300is disposed between the spaced apart first and second display substrates100and200. The liquid crystal display applies voltages to the pixel electrode and the common electrodes to realign liquid crystal molecules of the liquid crystal layer300, and thus an amount of light traveling through the liquid crystal layer is adjusted300, thereby displaying desired images in a display area of the liquid crystal display.

Hereinafter, a manufacturing method of a display device will be described in detail.

FIGS. 4A through 4Care plan views showing an exemplary embodiment of a manufacturing method of a display device according to the invention.

Referring toFIG. 4A, the gate lines GL, the gate line pads110, preliminary first shorting bar lines111, a first shorting bar117, the floating patterns120, preliminary second shorting bar lines121, the second shorting bar127, the data lines DL, the data line pads140, preliminary third shorting bar lines141, a third shorting bar147and the outermost line130of the first display substrate100are formed, such as on the base substrate of a preliminary first display substrate (e.g., the first display substrate100in a preliminary or non-final form).

The first display substrate100includes the array area ARA and the pad area PDA. The array area ARA and the pad area PDA may be defined on the base substrate within the first display substrate100. The gate lines GL elongated to extend in the first direction D1and the data lines DL elongated to extend in the second direction D2substantially vertical to the first direction D1of the first display substrate100are defined in the array area ARA. The gate and data lines GL and DL may be formed on the base substrate of the first display substrate100.

Thin film transistors are formed in pixel areas defined in the first display substrate100. The thin film transistors may be formed on the base substrate within the first display substrate100. The pixel areas may be defined in association with the gate lines GL and the data lines DL, but the invention is not limited thereto.

In an exemplary embodiment, the thin film transistors, the gate lines GL and the data lines DL may be formed as follows. Among the thin film transistors, the gate lines GL and the data lines DL, a gate line GL and a gate electrode of a thin film transistor are formed on the base substrate of the first display substrate100. The gate electrode is branched from the gate line GL. For the thin film transistor, a gate insulating layer, an active pattern, a source electrode and a drain electrode are formed above the gate electrode. When the source and drain electrodes are formed, the data line DL is formed. The source electrode is branched from the data line DL.

Referring again toFIG. 4A, the pad area PDA includes the first area PDA_1expanded in the second direction D2from the array area ARA and the second area PDA_2expanded in the first direction D1from the array area ARA. In addition, a scribe line SCL is defined in the pad area PDA. The scribe line SCL is used as a cutting line in a process of separating portions of the first display substrate100from each other. The scribe line SCL defined in the preliminary first display substrate may be defined at outermost edges of a formed first display substrate100.

The gate line pads110, the first shorting bar117, the preliminary first shorting bar lines111, the floating patterns120, the second shorting bar127, the preliminary second shorting bar lines121and the outermost line130are formed in the second area PDA_2of the pad area PDA.

The gate line pads110are formed between the array area ARA and the scribe line SCL and are electrically connected to distal ends of the gate lines GL. The first shorting bar117is formed between the scribe line SCL and an outermost edge of the first display substrate100and is electrically connected to the gate line pads110by the preliminary first shorting bar lines111.

The floating patterns120are formed between the array area ARA and the scribe line SCL to be adjacent to the gate line pads110. The second shorting bar127is formed between the array area ARA and the scribe line SCL and is electrically connected to the floating patterns120by the preliminary second shorting bar lines121. The outermost line130is formed between the scribe line SCL and the floating patterns120to be adjacent to the floating patterns120.

The data line pads140, the third shorting bar147and the preliminary third shorting bar lines141are formed in the first area PDA_1of the pad area PDA. The data line pads140are formed between the array area ARA and the scribe line SCL and are electrically connected to distal ends of the data lines DL. The third shorting bar147is formed between the scribe line SCL and the outermost edge of the first display substrate100and is electrically connected to the data line pads140.

The order of forming the gate lines GL, the gate line pads110, the preliminary first shorting bar lines111, the first shorting bar117, the floating patterns120, the preliminary second shorting bar lines121, the second shorting bar127, the data lines DL, the data line pads140, the preliminary third shorting bar lines141, the third shorting bar147and the outermost line130of the first display substrate100is varied depending on devices and structures. Therefore, the order of forming the above-mentioned devices should not be limited to a specific order.

Referring toFIG. 4B, a physical cutting process, e.g., a sawing process, is performed along the scribe line SCL defined within the preliminary first display substrate to remove the first and third shorting bars117and147from a remainder of the preliminary first display substrate.

The preliminary first shorting bar lines111are cut along the scribe line SCL by the cutting process to remove distal end portions of the preliminary first shorting bar lines111, and thus the first shorting bar lines115, each having an end portion at a position corresponding to the scribe line SCL, are formed from a remaining portion of the preliminary first shorting bar lines111. Similarly, the preliminary third shorting bar lines141are cut along the scribe line SCL by the cutting process to remove distal end portion so of the preliminary third shorting bar lines141, so that the third shorting bar lines145, each having an end portion at a position corresponding to the scribe line SCL, are formed from a remaining portion of the preliminary third shorting bar lines141.

To check whether the gate lines GL and the data lines DL are normally operated or not (e.g., whether a defect exists therein), a process of applying a predetermined voltage to the first and third shorting bars117and147may be further performed before the sawing process is performed on the preliminary first display substrate.

Referring toFIG. 4C, an intermediate portion of the preliminary second shorting bar lines121(indicated by a dotted line) is cut such as by a laser trimming process to electrically separate the floating patterns120from the second shorting bar127.

When each of the preliminary second shorting bar lines121is cut by the laser trimming process, the second shorting bar line125including the first and second lines122and124separated from each other, is formed from the preliminary second shorting bar lines121.

As shown inFIG. 2B, when the preliminary second shorting bar lines121are cut such as by the laser trimming process along the second direction D2, the first line122portion of the preliminary second shorting bar lines121has a bent structure. The second line124portion of the preliminary second shorting bar lines121has an elongated structure without being bent.

As shown inFIG. 3B, when the preliminary second shorting bar lines121are cut by the laser trimming process along the first direction D1, the second line124portion of the preliminary second shorting bar lines121has a bent structure. The first line122portion of the preliminary second shorting bar lines121has an elongated structure without being bent.

The second shorting bar line125may have various structures according to the direction along which the laser trimming process is performed, and the structure of the second shorting bar line125should not be limited to a specific structure.

According to the illustrated exemplary embodiment, the intermediate portion of the preliminary second shorting bar lines121is laser-trimmed to electrically separate the second shorting bar127from the floating patterns120. In detail, the laser trimming process is performed at the intermediate portion of the preliminary second shorting bar lines121. Since the preliminary second shorting bar lines121are disposed between the floating pattern120and the array area ARA, the laser trimming process is irregularly performed. When the preliminary second shorting bar lines121are cut by the laser trimming process, the second shorting bar lines125, each being divided into the first line122connected to the floating pattern120and the second line124connected to the third shorting bar147, are formed. As described above, since the preliminary second shorting bar lines121are cut by the laser trimming process, the first line122has a cross-sectional structure corresponding to that of the second line124as each being portions of the preliminary second shorting bar lines121.

Before the preliminary second shorting bar lines121are cut by the laser trimming process, the second shorting bar127electrically connected to the floating pattern120performs a function of discharging static electricity generated in the floating pattern120. The static electricity may be generated during an inspection process and/or a manufacturing process of the display device. In detail, the floating pattern120has a size greater than that of the gate line pads110or the data line pads140. Referring toFIG. 4B, for example, planar dimensions of the floating pattern120are greater than those of the gate line pads110and the data line pads140. Accordingly, when the static electricity is generated in the pad area PDA, the static electricity exerts relatively great influence on the floating pattern120. When the static electricity is generated in the floating pattern120, the second shorting bar127is in the equipotential state with the floating pattern120, and thus a potential difference caused by the static electricity may be reduced.

FIG. 5Ais a plan view showing another exemplary embodiment of a first display substrate of a display device according to the invention,FIG. 5Bis a partially enlarged view showing portion A shown inFIG. 5A, andFIG. 5Cis a partially enlarged view showing portion B shown inFIG. 5A. InFIGS. 5A to 5C, the same reference numerals denote the same elements inFIGS. 1 to 4C, and thus detailed descriptions of the same elements will be omitted.

Referring toFIGS. 1 and 5A through 5C, the display device includes a first display substrate100, a second display substrate200spaced apart from the first display substrate100and facing the first display substrate100, and a liquid crystal layer300interposed between the first and second display substrates100and200.

The first display substrate100includes an array area ARA and a pad area PDA. The first display substrate100includes gate lines GL elongated to extend in the first direction D1and data lines DL elongated to extend in the second direction D2.

Gate line pads110electrically connected to the gate lines GL, first shorting bar lines119, a first shorting bar117, floating patterns120, second shorting bar lines129, a second shorting bar127, and an outermost line130are disposed in the second area PDA_2of the pad area PDA.

First ends of the gate line pads110are connected to distal ends of the gate lines GL and second ends of the gate line pads110opposite to the first ends thereof are connected to the first shorting bar lines119. The first shorting bar lines119are disposed between the gate line pads110and the first shorting bar117and intermediate portions of the first shorting bar lines119are cut (indicated by a dotted line inFIGS. 5A and 5B) to divide (e.g., disconnect) collective first shorting bar lines119into separate portions thereof. As illustrated in the exemplary embodiment, for example, the first shorting bar lines119are elongated to extend in the first direction D1and are cut along a first cutting line LTL_1extending in the second direction D2substantially vertical to the first direction D1. End surfaces of the divided portions for each of the first shorting bar lines119which are cut along the first cutting line LTL_1, face each other and correspond to each other. The divided first shorting bar lines119do not electrically connect the gate line pads110and the first shorting bar117.

The second shorting bar127is disposed between the floating patterns120and the first shorting bar117. The second shorting bar lines129are disposed between the floating patterns120and the second shorting bar127and intermediate portions of the second shorting bar lines129are cut (indicated by a dotted line inFIGS. 5A and 5B) to divide (e.g., disconnect) collective second shorting bar lines129into separate portions thereof. In the illustrated exemplary embodiment, for example, the second shorting bar lines129are cut along the first cutting line LTL_1. A portion of each second shorting bar line129is elongated to extend in the first direction D1. That is, the first and second shorting bar lines119and129are each elongated to extend in the same direction, e.g., the first direction D1, and are cut along the same cutting line, e.g., the first cutting line LTL_1. End surfaces of the divided portions for each of the second shorting bar lines129which are cut along the first cutting line LTL_1, face each other and correspond to each other. The divided second shorting bar lines129do not electrically connect the floating patterns120and the second shorting bar127.

In the illustrated exemplary embodiment, the outermost line130is disposed adjacent to an edge of the first display substrate100. The outermost line130is disposed between the first shorting bar117and the edge of the first display substrate100.

Data line pads140electrically connected to the data lines DL, third shorting bar lines149, and a third shorting bar147are disposed in the first area PDA_1of the pad area PDA.

First ends of the data line pads140are connected to distal ends of the data lines DL and second ends of the data line pads140opposite to the first ends thereof are connected to the third shorting bar lines149.

The third shorting bar lines149are disposed between the data line pads140and the third shorting bar147and intermediate portions of the third shorting bar lines149are cut (indicated by a dotted line inFIGS. 5A and 5C) to divide (e.g., disconnect) collective third shorting bar lines149into separate portions thereof. As illustrated in the exemplary embodiment, for example, the third shorting bar lines149are elongated to extend in the second direction D2and are cut along a second cutting line LTL_2extending in the first direction D1. End surfaces of the divided portions for each of the third shorting bar lines149which are cut along the second cutting line LTL_2, face each other and correspond to each other. The divided third shorting bar lines149do not electrically connect the data line pads140and the third shorting bar147.

The first shorting bar117disconnected from the gate line pads110, the divided portions of each of the first shorting bar lines119, the third shorting bar147disconnected from the data line pads140, and the divided portions of each of the third shorting bar lines149may remain in the first display substrate100, but the invention is not limited thereto.

FIGS. 6A and 6Bare plan view showing another exemplary embodiment of a manufacturing method of a display device according to the invention.

Referring toFIG. 6A, the gate lines GL, the gate line pads110, preliminary first shorting bar lines111, the first shorting bar117, the floating patterns120, preliminary second shorting bar lines121, the second shorting bar127, the data lines DL, the data line pads140, preliminary third shorting bar lines141, the third shorting bar147, and the outermost line130of the first display substrate100are formed, such as on a base substrate of a preliminary first display substrate (e.g., the first display substrate100in a preliminary or non-final state).

In more detail, the first display substrate100includes the array area ARA and the pad area PDA. The array area ARA and the pad area PDA may be defined on the base substrate within the first display substrate100. The gate lines GL are formed on the first display substrate100and are elongated to extend in the first direction D1, and the data lines DL are formed on the first display substrate100and are elongated to extend in the second direction D2substantially perpendicular to the first direction D1.

The pad area PDA includes the first area PDA_1expanded in the second direction D2from the array area ARA and the second area PDA_2expanded in the first direction D1from the array area ARA.

The gate line pads110, the first shorting bar117, the preliminary first shorting bar lines111, the floating patterns120, the second shorting bar127, the preliminary second shorting bar lines121and the outermost line are formed in the second area PDA_2of the pad area PDA.

In the preliminary first display substrate, the gate line pads110are electrically connected to the first shorting bar117via the preliminary first shorting bar lines111. The floating patterns120are electrically connected to the second shorting bar127via the preliminary second shorting bar lines121. In the illustrated exemplary embodiment, each of the preliminary second shorting bar lines121extends from the floating patterns toward the edge of the first display substrate100and is bent. The floating patterns120are formed between the second shorting bar127and the array area ARA. The first and second shorting bars117and127are formed to be adjacent to each other. The outermost line130is formed at an outermost position of the first display substrate100. In the illustrated exemplary embodiment, for instance, the outermost line130is formed between the outermost edge of the first display substrate100, and the first and second shorting bars117and127.

The data line pads140, the third shorting bar147and the preliminary third shorting bar lines141are formed in the first area PDA_1of the pad area PDA. In the preliminary first display substrate, the data line pads140are electrically connected to the third shorting bar147via the preliminary third shorting bar lines141.

The order of forming the gate lines GL, the gate line pads110, the preliminary first shorting bar lines111, the first shorting bar117, the floating patterns120, the preliminary second shorting bar lines121, the second shorting bar127, the data lines DL, the data line pads140, the preliminary third shorting bar lines141, the third shorting bar147and the outermost line130of the first display substrate100is varied depending on devices and structures. Therefore, the order of forming the above-mentioned devices should not be limited to a specific order.

Referring toFIG. 6B, the intermediate portions of the preliminary first, second and third shorting bar lines111,121and141of the preliminary first display substrate are separated to form first shorting bar lines119, second shorting bar lines129and third shorting bar lines139of a first display substrate100.

The preliminary first and second shorting bar lines111and121are each elongated to extend in the first direction D1in the second area PDA_2of the pad area PDA. Accordingly, when a laser trimming process is performed along the second direction D2substantially perpendicular to the first direction D1, the intermediate portions of the preliminary first and second shorting bar lines111and121are cut together with each other at substantially a same time by the laser trimming process to divide the preliminary first and second shorting bar lines111and121and form the first shorting bar lines119and the second shorting bar lines129therefrom, respectively. The first shorting bar lines119formed by the laser trimming process do not electrically connect the gate line pads110and the first shorting bar117, and the second shorting bar lines129formed by the laser trimming process do not electrically connect the floating patterns120and the second shorting bar127.

The preliminary third shorting bar lines141are each elongated to extend in the second direction D2in the first area PDA_1of the pad area PDA. Therefore, when the laser trimming process is performed along the first direction D1, the intermediate portions of the preliminary third shorting bar lines141are cut by the laser trimming process to divide the preliminary third shorting bar lines141and form the third shorting bar lines149therefrom. The third shorting bar lines149formed by the laser trimming process do not electrically connect the data lines pads140and the third shorting bar147.

According to the above, in the preliminary first display substrate, the second shorting bar127is electrically connected to the floating patterns120via the preliminary second shorting bar lines121, and thus the static electricity generated in the floating patterns120may be discharged. The static electricity may be generated during an inspection process and/or a manufacturing process of the display device. In addition, since in the first display substrate100, the first shorting bar lines111are divided, the floating patterns120may be separated from the second shorting bar127.

Referring toFIG. 6B, the first shorting bar117disconnected from the gate line pads110, the divided portions of each of the first shorting bar lines119, the third shorting bar147disconnected from the data line pads140, and the divided portions of each of the third shorting bar lines149may remain in the first display substrate100, but the invention is not limited thereto.

Although the exemplary embodiments of the invention have been described, it is understood that the invention should not be limited to these exemplary embodiments but various changes and modifications can be made by one ordinary skilled in the art within the spirit and scope of the invention as hereinafter claimed.