Method and apparatus for driving flash memory

A method for driving a flash memory and flash memory apparatus thereof are provided. The flash memory apparatus comprises a flash memory controller and a flash memory. At first, a voltage level of the parameter definition pin is detected by the flash memory controller to obtain the basic configuration of the flash memory when the flash memory controller is in a reset mode. Next, a fundamental access operation is performed on the flash memory by the flash memory controller according to the basic configuration. Then, a detail configuration is read from a specific data block of the flash memory. At last, the flash memory is driven according to the basic configuration and the detail configuration of the flash memory.

This application claims the benefit of Taiwan application Ser. No. 94101605, filed Jan. 19, 2005, the subject matter of which is incorporated herein by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The invention relates in general to driving a memory, and more particularly to a method and apparatus for driving a flash memory.

2. Description of the Related Art

Many electronic products are equipped with a flash memory apparatus to maintain the stored data after the power is switched off. For example, the digital camera or the personal digital assistant (PDA) utilizes the flash memory apparatus such as a memory card to store pictures or data.

FIG. 1is a schematic diagram of a conventional flash memory apparatus. Flash memory apparatus100comprises a flash memory120and a flash memory controller110. The flash memory120is used for storing a data signal Da. The flash memory controller110controls the transmission of the data data and data signal Da. For example, the flash memory controller110outputs the data signal Da to be stored in the flash memory120according to the data data; or the flash memory controller110reads the data signal Da from the flash memory120, converts the data signal Da into the data data for output. The flash memory controller110controls the flash memory120to complete the access of the data signal Da according to a control signal Sc0. In order to drive the flash memory120, the flash memory controller110has to write all of the access parameters of the flash memory120into the flash memory controller110in advance. The access parameters include the parameters of data bus, memory page size, actual memory capacity, data transmission rate, and so forth. Since the access parameters of the flash memory120are defined in the firmware disposed inside the flash memory controller110, the programming codes of the firmware as well as the settings of the hardware need to be replaced or reset when a flash memory of the flash memory apparatus100is replaced. As a result, the flash memory supported by the flash memory controller110is subject to a limited variety, and the associated renewal and re-verification are time consuming and incur more cost in terms of research and development.

FIG. 2is a schematic diagram of another conventional flash memory apparatus. Flash memory apparatus200comprises a flash memory controller210, a flash memory220and a storage device230. The flash memory220is used for storing a data signal Da1. The flash memory controller210controls the transmission of the data data1and data signal Da1. For example, the flash memory controller210outputs the data signal Da1to be stored in the flash memory220according to the data data1; or the flash memory controller210reads the data signal Da1from the flash memory220, converts the data signal Da1into the data data1for output. The flash memory controller210control flash memory220to complete the access of the data signal Da1according to the control signal Sc1. To resolve the foregoing problems associated with the flash memory apparatus100, the flash memory apparatus200is equipped with an extra storage device230in which an access parameter Pa of the flash memory220is stored. Despite the firmware and setting of the flash memory controller210do not need to be replaced or reset when replacing the flash memory220, the installation of the storage device230incurs an increase in manufacturing cost.

SUMMARY OF THE INVENTION

It is therefore the object of the invention to provide a flash memory apparatus and a parameter access method for detecting and setting the flash memory. A basic configuration of the flash memory is defined according to a pin voltage level, and a detail configuration is then obtained from the controlled flash memory to complete the driving of the flash memory.

According to the object of the invention, a method of driving a flash memory is provided. The flash memory apparatus comprises a flash memory controller and a flash memory. At first, a voltage level of the parameter definition pins is detected by the flash memory controller to obtain the basic configuration of the flash memory when the flash memory controller is in RESET mode. Next, the flash memory is read by the flash memory controller according to the basic configuration. Then, a detail configuration is read from a specific data block of the flash memory. At last, the flash memory is driven the memory controller according to the basic configuration and the detail configuration of the flash memory.

According to an object of the invention, a flash memory apparatus. The flash memory apparatus comprises a flash memory and a flash memory controller. The flash memory controller is used for controlling the access of the flash memory. When the flash memory controller is in RESET mode, a basic configuration of the flash memory is defined according to a voltage level of the parameter definition pin. The flash memory controller fundamentally accesses the flash memory according to the basic configurations and receives a detail configuration of the flash memory from the flash memory. Afterwards, the flash memory controller drives the flash memory according to the basic configuration and the detail configuration.

DETAILED DESCRIPTION OF THE INVENTION

Referring toFIG. 3, a schematic diagram of a flash memory apparatus according to a preferred embodiment of the invention is shown. The flash memory apparatus300comprises a flash memory controller310and a flash memory320. The flash memory320is used for storing a data signal Da2, and the flash memory320has a specific data block321for storing a detail configuration Pd of the flash memory320. The transmission of the data data2and data signal Da2is controlled by the flash memory controller310. For example, the flash memory controller310outputs a data signal Da2to be stored in the flash memory320according to the data data2; or the flash memory controller310reads the data signal Da2from the flash memory320, converts the data signal Da2into the data data2for output. The flash memory controller310controls the access of the flash memory320according to the control signal Sc2.

The flash memory controller310has a plurality of parameter definition pins. When the flash memory controller310is in a reset mode, the flash memory controller310detects the voltage level of the parameter definition pins to define a basic configuration of the flash memory320, the basic configuration such as a parameter of data bus, a parameter of memory page size, a parameter of logic gate mode and a parameter of memory operating voltage. The parameter of data bus is used for determining the data bus of the flash memory320as 8 bits or 16 bits. The parameter of memory page size is used for determining the size of data unit as 512 Kb or 1024 Kb when the flash memory320accesses data. The parameter of logic gate mode is used for determining the logic gate mode of the flash memory320as an AND gate or NAND gate. The parameter of memory operating voltage is used for determining the operating voltage of the flash memory320as 1.8V or 3.3V.

The flash memory controller310performed a fundamental access operation on the flash memory320according to the basic configuration to receive the detail configuration Pd from the specific data block321of the flash memory320. Meanwhile, the flash memory controller310controls the flash memory320according to the basic configuration only, so the flash memory320is not operating at the maximum accessing rate. Examples of the detail configuration include a parameter of actual memory capacity, a read cycle parameter and a write cycle parameter. The read cycle parameter is used for determining the read cycle of the flash memory320. The write cycle parameter is used for determining the write cycle of the flash memory320. The parameter of actual memory capacity is used for determining the actual capacity of the flash memory320. Afterwards, the flash memory controller310completely drives the flash memory320according to the basic configuration and the detail configuration Pd for the flash memory320to operate at the maximum accessing rate.

Referring toFIG. 4, a flowchart of the method for detecting an access parameter of the flash memory apparatus according to a preferred embodiment of the invention is shown. The method for detecting the flash memory includes five steps. At first, the method begins at step41, in which a voltage level of the parameter definition pin is detected when the flash memory controller310is in a reset mode. Next, proceed to step42, a basic configuration is defined according to the voltage level of the parameter definition pin. Examples of the basic configuration include parameters of data bus, memory page size, logic gate mode and memory operating voltage. Then, proceed to step43, a fundamental access operation is performed to the flash memory320according to the basic configuration. Afterwards, proceed to step44, a detail configuration Pd is received from the flash memory320. Examples of the detail configuration include a parameter of actual memory capacity, a read cycle parameter and a write cycle parameter. At last, as shown in step45, the flash memory300is completely driven to reach the maximum accessing rate of operation according to the basic configuration and the detail configuration.

In the present embodiment, the voltage level of the parameter definition pin has no effect on the flash memory320when the flash memory controller310is in a reset stage, but can be used by the flash memory controller310to define the basic configuration of the flash memory320for performing an access operation on the flash memory320. When signals are transmitted between the flash memory controller310and the flash memory320, that is, the flash memory controller310is not in a reset mode, the parameter definition pins are used for transmitting data. For example, the flash memory controller310utilizes the parameter definition pin to output a control signal Sc2to the flash memory320. The parameter definition pins, disposed on a circuit board of the flash memory apparatus300, and the voltage levels of the parameter definition pins in a reset mode are set by a pull-up resistor and a pull-down resistor. Examples of the parameter definition pin include parameter definition pins A to D for respectively defining the parameters of data bus, memory page size, logic gate mode and memory operating voltage.

The method and apparatus for driving a flash memory disclosed in above embodiment of the invention neither requires the firmware and setting of the flash memory controller to be replaced or reset when replacing the flash memory nor requires the installation of an extra storage device, thus avoiding the above-mentioned increase in time and cost due to the renewal and re-verification of the firmware and the installation of an extra storage device.