Silicon carbide semiconductor device, method of manufacturing silicon carbide semiconductor device and method of designing silicon carbide semiconductor device

A silicon carbide semiconductor device includes a silicon carbide layer 32 of a first conductivity type, a silicon carbide layer 36 of a second conductivity type, a gate trench 20, a gate electrode 79 provided in the gate trench 20, and a protection trench 10 formed to a greater depth than the gate trench 20. A region in the horizontal direction that includes both the gate trench 20 and a protection trench 10 that surrounds only a part of the gate trench 20 in the horizontal direction is a cell region, and a region in the horizontal direction that includes a protection trench 10 and in which a gate pad 89 or a lead electrode connected to the gate pad 89 is disposed is a gate region.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is the U.S. National Stage of International Patent Application No. PCT/JP2014/075193 filed on Sep. 24, 2014, the disclosure of which is hereby incorporated in its entirety by reference.

TECHNICAL FIELD

The present invention relates to a silicon carbide semiconductor device, which is made of silicon carbide, a method of manufacturing the silicon carbide semiconductor device, and a method of designing the silicon carbide semiconductor device.

BACKGROUND ART

There are known conventional semiconductor devices made of silicon, such as a trench-type Si-MOSFET. Japanese Patent Laid-Open No. 06-132539 discloses a semiconductor device having a vertical insulated gate field effect transistor that includes a semiconductor substrate of a first conductivity type, a first semiconductor layer of the first conductivity type of low impurity concentration formed on the principal surface of the semiconductor substrate, a second semiconductor layer of a second conductivity type formed on the upper surface of the first semiconductor layer, a third semiconductor layer of the first conductivity type formed on a part of a surface part of the second semiconductor layer, a gate oxide film formed on an inner wall surface of a gate trench, which has a substantially U-shaped cross section and extends from the surface of a central part of the third semiconductor layer through the part of the second semiconductor layer into the first semiconductor layer, a gate electrode formed to fill a groove on the gate oxide film, an insulating film formed to cover the gate electrode and an exposed surface of the second semiconductor layer, a gate wire that is formed on the insulating film and is in contact with the gate electrode, a source electrode that is in contact with the third semiconductor layer through a contact hole formed in the insulating film, and a drain electrode formed on the back surface of the semiconductor substrate. Japanese Patent Laid-Open No. 06-132539 discloses a structure in which the gate trench is formed in a ring-like shape.

A silicon carbide semiconductor device made of silicon carbide, such as a SiC-MOSFET, has a high breakdown voltage, so that the gate trench can be insufficient to prevent an electrical field from excessively concentrated in the gate oxide film, and the gate oxide film can break.

To avoid this, the electrical field can be prevented from being applied to a gate trench20by a protection trench10that surrounds the whole of the periphery of the gate trench20in the horizontal direction. However, if such a protection trench10is adopted, a wire of a conductive material81, such as polysilicon, that is connected to a gate pad from above the gate trench20has to be placed so as to pass across the protection trench10(seeFIG. 7). Therefore, a predetermined part of the protection trench10(the part indicated by an arrow in the implementation shown inFIG. 7) has to be filled with an insulating material, such as an oxide, and the wire of the conductive material has to be passed over the insulating material. Thus, the number of manufacturing steps disadvantageously increases.

SUMMARY OF THE INVENTION

Problems to be Resolved by the Invention

In view of the circumstances described above, the present invention provides a silicon carbide semiconductor device provided with a protection trench that surrounds a gate trench to prevent an electrical field from being applied to the gate trench and can be formed without significantly increasing the number of manufacturing steps, a method of manufacturing the silicon carbide semiconductor device, and a method of designing the silicon carbide semiconductor device.

Means of Solving the Problem

A silicon carbide semiconductor device according to the present invention, the silicon carbide semiconductor device comprising:

a silicon carbide layer of a first conductivity type;

a silicon carbide layer of a second conductivity type formed on the silicon carbide layer of the first conductivity type;

a gate trench formed to extend from a surface of the silicon carbide layer of the second conductivity type to such a depth that the gate trench reaches the silicon carbide layer of the first conductivity type;

a gate electrode provided in the gate trench with an insulating film interposed therebetween;

a protection trench formed to extend from the surface of the silicon carbide layer of the second conductivity type to a depth greater than the depth of the gate trench; and

a first conductive member provided in the protection trench,

wherein a region in a horizontal direction that includes both the gate trench and a protection trench that surrounds only a part of the gate trench in the horizontal direction is a cell region,

a region in the horizontal direction that includes a protection trench and in which a gate pad or a lead electrode connected to the gate pad is disposed is a gate region,

a second conductive member is provided above the gate trench in the cell region and in the gate region, and

the second conductive member is disposed to extend from above the gate trench in the cell region to the gate region through above a part of the cell region in which the protection trench is not provided.

In the silicon carbide semiconductor device, the protection trench included in the cell region has a pair of cell-region linear trench sections that extend straight in the horizontal direction and a cell-region curved trench section that is curved in the horizontal direction,

the cell-region curved trench section is provided at a first end of the pair of cell-region linear trench sections,

the gate trench is provided between the pair of cell-region linear trench sections in the horizontal direction, and

the second conductive member is disposed to extend from above the gate trench in the cell region to the gate region through above a second end of the pair of cell-region linear trench sections.

In the silicon carbide semiconductor device, the gate trench extends straight in the horizontal direction, and

the gate trench and the cell-region liner trench sections extend in parallel with each other in the horizontal direction.

In the silicon carbide semiconductor device, the protection trench included in the gate region has a gate-region curved trench section that is curved in the horizontal direction, and

a gate-region curved trench section that protrudes toward the gate trench in the horizontal direction is provided at the second end of the pair of cell-region linear trench sections.

In the silicon carbide semiconductor device, a gate-region curved trench section that protrudes toward the gate-region curved trench section that protrudes toward the gate trench is provided adjacent to the gate-region curved trench section that protrudes toward the gate trench.

In the silicon carbide semiconductor device, the protection trenches are unicursal in the horizontal direction.

A method of manufacturing silicon carbide semiconductor device according to the present invention, the method comprising:

a step of forming a silicon carbide layer of a first conductivity type;

a step of forming a silicon carbide layer of a second conductivity type on the silicon carbide layer of the first conductivity type;

a step of forming a gate trench that extends from a surface of the silicon carbide layer of the second conductivity type to such a depth that the gate trench reaches the silicon carbide layer of the first conductivity type;

a step of forming a protection trench that extends from the surface of the silicon carbide layer of the second conductivity type to a depth greater than the depth of the gate trench;

a step of providing a gate electrode in the gate trench with an insulating film interposed therebetween; and

a step of providing a first conductive member in the protection trench,

wherein a region in a horizontal direction that includes both the gate trench and a protection trench that surrounds only a part of the gate trench in the horizontal direction is a cell region,

a region in the horizontal direction that includes a protection trench and in which a gate pad or a lead electrode connected to the gate pad is disposed is a gate region,

a second conductive member is provided above a part of the gate trench in the cell region and in the gate region, and

the second conductive member is disposed to extend from above the gate trench in the cell region to the gate region through above a part of the cell region in which the protection trench is not provided.

A method of designing a silicon carbide semiconductor device according to the present invention, wherein the silicon carbide semiconductor device comprises:

a silicon carbide layer of a first conductivity type;

a silicon carbide layer of a second conductivity type formed on the silicon carbide layer of the first conductivity type;

a gate trench formed to extend from a surface of the silicon carbide layer of the second conductivity type to such a depth that the gate trench reaches the silicon carbide layer of the first conductivity type;

a gate electrode provided in the gate trench with an insulating film interposed therebetween;

a protection trench formed to extend from the surface of the silicon carbide layer of the second conductivity type to a depth greater than the depth of the gate trench; and

a first conductive member provided in the protection trench,

a region in a horizontal direction that includes both the gate trench and a protection trench that surrounds only a part of the gate trench in the horizontal direction is a cell region,

a region in the horizontal direction that includes a protection trench and in which a gate pad or a lead electrode connected to the gate pad is disposed is a gate region,

a second conductive member is provided above the gate trench in the cell region and in the gate region, and

the second conductive member is disposed to extend from above the gate trench in the cell region to the gate region through above a part of the cell region in which the protection trench is not provided.

Advantageous Effects of Invention

According to the present invention, the second conductive member is disposed to extend from above the gate trench in the cell region to the gate region through a part of the cell region that is not surrounded by the protection trench. Therefore, there is no need to fill the protection trench with an insulating material, such as an oxide, so that the gate trench can be surrounded by the protection trench to prevent an electrical field from being applied to the gate trench without significantly increasing the number of manufacturing steps.

DESCRIPTION OF EMBODIMENTS

Embodiment

In the following, a silicon carbide semiconductor device, a method of manufacturing the silicon carbide semiconductor device and a method of designing the silicon carbide semiconductor device according to an embodiment of the present invention will be described with reference to the drawings.

The silicon carbide semiconductor device according to this embodiment is a trench-structure MOSFET, for example. In the following, the silicon carbide semiconductor device will be described as the trench-structure MOSFET. However, the trench-structure MOSFET is only an example of the silicon carbide semiconductor device, and the present invention can be applied to other device structures having a MOS gate, such as an insulated gate bipolar transistor (IGBT).

As shown inFIG. 1, the silicon carbide semiconductor device according to this embodiment includes an n-type silicon carbide semiconductor substrate31of high concentration (a silicon carbide semiconductor substrate of a first conductivity type), an n-type silicon carbide layer32of low concentration (a silicon carbide layer of the first conductivity type) formed on the n-type silicon carbide semiconductor substrate31of high concentration, and a p-type silicon carbide layer36(a silicon carbide layer of a second conductivity type) formed on the n-type silicon carbide layer32of low concentration. An n-type silicon carbide region37containing a high concentration of impurities is formed in a part of a surface of the p-type silicon carbide layer36.

According to this embodiment, a gate trench20is formed to extend from a surface of the n-type silicon carbide region37containing a high concentration of impurities to such a depth that the gate trench20penetrates the p-type silicon carbide layer36into the n-type silicon carbide layer32of low concentration. In the gate trench20, a gate electrode79is provided with a gate insulating film75ainterposed therebetween. An interlayer insulating film75bis provided on the gate electrode79. That is, the gate electrode79is surrounded by the gate insulating film75aand the interlayer insulating film75b.

A protection trench10is formed to extend from the surface of the p-type silicon carbide layer36to a greater depth than the gate trench20. In the protection trench10, a first conductive member61made of polysilicon, for example, is provided. According to this embodiment, the first conductive member61is integrated with a source electrode69and is set at the same potential as the source electrode69when a voltage is applied (seeFIG. 1). A side wall insulating film65is provided on a side wall of the protection trench10.

According to this embodiment, a p-type semiconductor region33of high concentration is formed on a bottom of the protection trench10by ion implantation of aluminium or the like. A drain electrode39is provided on a back surface (lower surface inFIG. 1) of the n-type silicon carbide semiconductor substrate31.

As shown inFIG. 4, according to this embodiment, a region in a horizontal direction that includes both a gate trench20and a protection trench10that surrounds the gate trench20with only a part of the gate trench20left unenclosed by the protection trench10is referred to as a “cell region”.FIG. 4is just a schematic top view for illustrating the cell region and a gate region of the silicon carbide semiconductor device according to this embodiment.FIG. 4does not show any detailed structure of the protection trench10and does not take into account the distances between sections of the protection trench10in the horizontal direction. The sizes of the cell region and the gate region in the horizontal direction shown inFIG. 4are not to scale.

As shown inFIG. 4, according to this embodiment, a region in the horizontal direction that includes a protection trench10and a gate pad89(seeFIG. 2) or a lead electrode connected to the gate pad89is referred to as the “gate region”. A second conductive member81is made of polysilicon, for example.

The gate pad89is disposed in the gate region shown in the central part ofFIG. 4(seeFIG. 2), and the lead electrode is connected to the gate pad89. As shown inFIG. 5, the second conductive member81is primarily disposed in an area other than above the protection trench10disposed in the cell region.

As shown inFIG. 3, the protection trench10included in the gate region according to this embodiment has a gate-region linear trench section16that extends straight in the horizontal direction and a gate-region curved trench section17that is curved in the horizontal direction. Reference numeral “17” conceptually includes reference numerals “17a” and “17b” described later. The p-type semiconductor region33and the first conductive member61are in ohmic contact with each other and are set to the same potential when a voltage is applied.

The gate trench20according to this embodiment extends straight in the horizontal direction. More specifically, the gate trench20extends straight in the left-and-right direction inFIG. 3. The gate trench20and a cell-region linear trench section11extend in parallel with each other (in the left-and-right direction inFIG. 3) in the horizontal direction.

As shown inFIG. 3, the protection trench10included in the cell region has a pair of cell-region linear trench sections11that extend straight in the horizontal direction and a cell-region curved trench section12that is curved in the horizontal direction. The gate trench20extending straight in the horizontal direction (that is, extending in the left-and-right direction inFIG. 3) is located between the pair of cell-region linear trench sections11, the cell-region curved trench section12is located at one end of the pair of cell-region linear trench sections11, and the protection trench10is not formed at the other end of the pair of cell-region linear trench sections11. Thus, the protection trench10surrounds “only a part” of the gate trench20in the horizontal direction. According to this embodiment, the protection trench10in the cell region forms successive “S-shapes” in the horizontal direction, and pairs of cell-region linear trench sections11are arranged in the up-and-down direction inFIG. 3in such a manner that the “other ends” thereof are located alternately on the left and right sides. In this way, both the condition that the protection trench10surrounds “only a part” of the gate trench20in the horizontal direction and a condition that the protection trench10has no end in the horizontal direction can be satisfied at the same time.

As shown inFIG. 2, the second conductive member81is provided above a part of the gate trench20in the cell region and in the gate region. The second conductive member81is disposed in an area of the cell region where the protection trench10is not provided, that is, according to this embodiment, over an area that extends from above the gate trench20in the cell region into the gate region through the other end of the pair of cell-region linear trench sections11(seeFIG. 5). Thus, the second conductive member81is provided to extend from above the gate electrode79into below the gate pad89through above the other end of the pair of cell-region linear trench sections11. As shown inFIG. 2, the gate pad89is provided on the protection trench10in the gate region with an insulating layer85of SiO2or the like and the second conductive member81interposed therebetween. As is obvious fromFIG. 2, the second conductive member81is electrically connected to the gate electrode79.

As shown inFIG. 3, a gate-region curved trench section17athat protrudes toward the gate trench20in the horizontal direction is provided at the other end of the pair of cell-region linear trench sections11. A gate-region curved trench section17bthat protrudes toward the gate-region curved trench section17athat protrudes toward the gate trench20is provided adjacent to the gate-region curved trench section17a.

As shown inFIG. 4, according to this embodiment, a guard ring80that surrounds the gate region and the cell region in the horizontal direction is provided. AlthoughFIG. 4shows only one guard ring80, in actual, a plurality of guard rings80may be concentrically provided.

As shown inFIG. 4, each protection trench10according to this embodiment is unicursal in plan view and has no end in the horizontal direction.

Next, a process of manufacturing the silicon carbide semiconductor device according to this embodiment configured as described above will be described mainly with reference toFIG. 6. According to this embodiment, the process of manufacturing the silicon carbide semiconductor device includes a method of designing the silicon carbide semiconductor device manufactured as described below.

First, the n-type silicon carbide semiconductor substrate31of high concentration is prepared (seeFIG. 6(a)).

The n-type silicon carbide layer32of low concentration is then formed by epitaxial growth on the n-type silicon carbide semiconductor substrate31of high concentration.

The p-type silicon carbide layer36is then formed on the n-type silicon carbide layer32of low concentration by epitaxial growth or ion implantation.

The n-type silicon carbide region37containing a high concentration of impurities is then formed by phosphorus ion implantation or the like in a part of the p-type silicon carbide layer36where the gate trench20is to be formed and a vicinity area thereof. A protection layer91is then deposited, and the protection layer91is patterned to form an opening through which the protection trench10is formed (seeFIG. 6(b)). Using the protection layer91as a mask, the protection trench10is then formed to extend from the surface of the p-type silicon carbide layer36to such a depth that the protection trench10reaches the n-type silicon carbide layer32of low concentration.

A protection film92is then formed to cover the protection layer91and the protection trench10(seeFIG. 6(c)).

Only a part of the protection film92, which is on the bottom of the protection trench10, is then removed. Using the remaining protection film92as a mask, ion implantation of aluminium or the like is performed on the bottom of the protection trench10to form the p-type semiconductor region33containing a high concentration of impurities. After that, the protection film92and the protection layer91are removed. After that, activation annealing is performed.

A protection layer93is then deposited, and the protection layer93is patterned to form an opening through which the gate trench20is formed (seeFIG. 6(d)). Using the protection layer93as a mask, the gate trench20is then formed to extend from the surface of the p-type silicon carbide layer36to such a depth that the gate trench20reaches the n-type silicon carbide layer32of low concentration. The depth of the gate trench20is smaller than the depth of the protection trench10. After that, the protection layer93is removed.

A heat treatment is then performed on the surface of the silicon carbide semiconductor device including the gate trench20and the protection trench10to form an oxide film that is to form the gate insulating film75aand the side wall insulating film65. A conductive material, such as polysilicon, is then deposited on the gate insulating film75a. After the deposition, a heat treatment may be performed as required. In this way, the gate electrode79and the second conductive member81are formed on the gate trench20as shown inFIG. 6(e).

An insulating film of silicon dioxide (SiO2) or the like is then formed by plasma CVD or the like to cover the surface of the silicon carbide semiconductor device including the protection trench10, thereby forming the interlayer insulating film75bon the gate electrode79so that the gate electrode79is surrounded by the gate insulating film75aand the interlayer insulating film75b(seeFIG. 6(f)). In addition, the insulating film on the bottom of the protection trench10is selectively removed by etching, leaving only the side wall insulating film65on the side wall of the protection trench10.

After that, the first conductive member61, the insulating layer85, the second conductive member81, the gate pad89, the source electrode69, the drain electrode39, the lead electrode and the like are provided as required. In this way, the silicon carbide semiconductor device according to this embodiment is manufactured (seeFIGS. 1 and 2).

The arrangement of the protection trench10of the silicon carbide semiconductor device manufactured as described above in the horizontal plane is as described above in the section <<Configuration>>. The manufacturing method described above is just an example, and any manufacturing method that can manufacture the silicon carbide semiconductor device described in the claims can be adopted.

Next, effects and advantages of this embodiment will be described.

According to this embodiment, the second conductive member81is disposed to extend from above the gate trench20in the cell region into the gate region through the part of the cell region that is not enclosed by the protection trench10. Therefore, there is no need to fill the protection trench10with an insulating material, such as an oxide, so that the gate trench20can be surrounded by the protection trench10to prevent an electrical field from being applied to the gate trench20without significantly increasing the number of manufacturing steps.

According to prior art, a wire of a conductive material, such as polysilicon, that is connected to the gate pad from above the gate trench20has to be placed so as to pass across the protection trench10(seeFIG. 7). Therefore, a predetermined part of the protection trench10(the part indicated by an “arrow” in the implementation shown inFIG. 7) has to be filled with an insulating material, such as an oxide, and the wire of the conductive material has to be passed over the insulating material. Thus, the number of manufacturing steps disadvantageously increases.

According to this embodiment, however, the second conductive member81is disposed to extend from above the gate electrode79to below the gate pad89through above the part of the cell region that is not enclosed by the protection trench10or, more specifically, the part at the other end of the pair of cell-region linear trench sections11(seeFIGS. 2 and 5). Therefore, according to this embodiment, there is no need to fill the protection trench10with an insulating material, such as an oxide, which would be necessary according to prior art, so that the manufacturing steps can be reduced compared with prior art.

Furthermore, according to this embodiment, the protection trench10in the cell region forms successive “S shapes” in the horizontal direction, and pairs of cell-region linear trench sections11are arranged in the up-and-down direction inFIG. 3in such a manner that the “other ends” thereof are located alternately on the left and right sides. In this way, both the condition that the protection trench10surrounds “only a part” of the gate trench20in the horizontal direction and the condition that the protection trench10has no end in the horizontal direction can be satisfied at the same time.

If the protection trench10has a starting or terminating end part in the horizontal direction, the starting or terminating end can have an angled corner. And if such an angled corner is formed, an electrical field can be concentrated at the angled corner. According to this embodiment, however, the protection trench10is unicursal in the horizontal direction (in plan view) and has no starting or terminating end in the horizontal direction.

Therefore, according to this embodiment, the number of manufacturing steps can be advantageously reduced compared with prior art, and an electrical field can be advantageously prevented from excessively concentrated at any end of the protection trench10.

Furthermore, according to this embodiment, the protection trench10included in the gate region has the gate-region curved trench section17that is curved in the horizontal direction. And the gate-region curved trench section17athat protrudes toward the gate trench20in the horizontal direction is provided at the other end of the pair of cell-region linear trench sections11. Therefore, the number of manufacturing steps can be advantageously reduced compared with prior art while preventing the horizontal distance between the protection trench10included in the cell region and the gate-region curved trench section17from increasing.

This will now be described.

In general, the longer the horizontal distance between sections of the protection trench10, the higher the electrical field applied to the protection trench10is. However, if the cell-region curved trench section12is not formed at the other end of the pair of cell-region linear trench sections11as in this embodiment, there is no protection trench10that protrudes toward the gate region, so that the horizontal distance between the protection trench10included in the cell region and the protection trench10included in the gate region tends to increase.

In this respect, according to this embodiment, the protection trench10included in the gate region has the gate-region curved trench section17athat protrudes toward the gate trench20in the horizontal direction. Therefore, the horizontal distance between the protection trench10included in the cell region and the gate-region curved trench section17can be reduced. As a result, the condition that the protection trench10surrounds “only a part” of the gate trench20in the horizontal direction can be satisfied, while reducing the electrical field that occurs between the protection trench10included in the cell region and the gate-region curved trench section17during reverse biasing and preventing the electrical field from being locally excessively concentrated in this area.

Furthermore, according to this embodiment, the gate-region curved trench section17bthat protrudes toward the gate-region curved trench section17athat protrudes toward the gate trench20is provided adjacent to the gate-region curved trench section17a. Therefore, the horizontal distance between the gate-region curved trench section17athat protrudes toward the gate trench20and the gate-region curved trench section17bthat is adjacent to the gate-region curved trench section17acan be reduced. As a result, during reverse biasing, the electrical field that occurs between the gate-region curved trench sections17can be reduced, and the electrical field can be prevented from being locally excessively concentrated in this area.

The “horizontal distance” referred to in this embodiment means the “minimum distance” in the horizontal direction. Taking a cell-region linear trench section11as an example, it can be considered that there are an infinite number of distances from a point in the cell-region linear trench section11to an opposed cell-region linear trench section11, such as “D1” as well as “D1′” and “D1″” shown inFIG. 3. According to this embodiment, however, since the “horizontal distance” is defined as the “minimum distance” in the horizontal direction as described above, the “horizontal distance” is not “D1′” or “D1″” but the minimum distance “D1”.

According to this embodiment, an implementation can be adopted in which the smaller the radius of curvature of the cell-region curved trench section12, the smaller the horizontal distance between the cell-region curved trench section12and the protection trench10in the gate region adjacent to the cell-region curved trench section12is.

If the implementation is adopted in which the smaller the radius of curvature of the cell-region curved trench section12is, the smaller the horizontal distance between the cell-region curved trench section12and the protection trench10in the gate region adjacent to the cell-region curved trench section12is, the electrical field can be prevented from being locally excessively concentrated in the part of the cell-region curved trench section12of the small radius of curvature during reverse biasing.

Similarly, an implementation can be adopted in which the smaller the radius of curvature of the gate-region curved trench section17is, the smaller the horizontal distance between the gate-region curved trench section17and the protection trench10in the gate region adjacent to the gate-region curved trench section17is.

If the implementation is adopted in which the smaller the radius of curvature of the gate-region curved trench section17, the smaller the horizontal distance between the gate-region curved trench section17and the protection trench10in the gate region adjacent to the gate-region curved trench section17is, the electrical field can be prevented from being locally excessively concentrated in the part of the gate-region curved trench section17of the small radius of curvature during reverse biasing.

Finally, the above description of the embodiment, the above description of the modifications and the drawings are given only as examples for the purpose of illustration of the present invention set forth in the claims and do not limit the present invention set forth in the claims.

REFERENCE SIGNS LIST