ELECTRONIC DEVICE

An electronic device is powered by a first power supply and connected to an external device powered by a second power supply. The electronic device comprises a master controller, a conversion module, and a detection module. The master controller outputs first information. The conversion module converts the first information into second information based on a first voltage from the first power supply and a second voltage from the second power supply to control the external device to execute corresponding functions. The detection module is connected with the first power supply and the conversion module, and generates a pull-up voltage when the voltage of the second power supply is in an abnormal state. The conversion module further converts the first information into a second information based on the voltage of the first power supply and the pull-up voltage. The pull-up voltage is larger than the first voltage.

DETAILED DESCRIPTION

FIG. 1shows an electronic device10of one embodiment of the present disclosure. The electronic device10is capable of controlling an external device20through an inter integrated circuit (I2C) connected with the electronic device10when the voltage of the external device20is in an abnormal state. In the embodiment, the external device20can be a DVD player or a data storage device.

The electronic device10includes a first power supply11, a master controller13, a conversion module15, a detection module17, and a load19.

The first power supply10provides a first voltage. In the embodiment, the first voltage is 3.3V.

The master controller13is used for outputting first clock information and first data information. The first clock information and the first data information are serial digital signals changing from logic high level to logic low level and vice versa.

The conversion module15receives the first voltage from the first power supply11and a second voltage in a normal state from the external device20. The conversion module15converts the first clock information into second clock information and converts the first data information into second data information. In the embodiment, the logic level of the second clock information is reversed with that of the first clock information, and the logic level of the second data information is reversed with that of the first data information.

The detection module17detects whether the second voltage from the external device20is less than the first voltage. If the second voltage is less than the first voltage, the second voltage is in a normal state and the detection module17generates a pull-up voltage to the voltage conversion15. If the second voltage is, more than or equal to the first voltage, the second voltage is in an abnormal state and the detection module17stops generating the pull-up voltage. In the embodiment, the pull-up voltage is 5V.

The conversion module15continues to covert the first clock information into second clock information and converts the first data information into second clock information based on the first voltage and the pull-up voltage.

The load19receives the second clock information and the second data information to execute a corresponding function.

The external device20includes a second power supply21and a slave controller23.

The second power supply21provides the second voltage.

The slave controller23receives the second clock information and the second data information to execute a corresponding function.

FIG. 2shows that the first power supply11includes a first power pin V1, a first resistor RL and a second resistor R2. Opposite terminals of the first resistor R1and a second resistor R2are respectively connected between the first power supply V1and the master controller13.

The master controller13includes a first serial clock pin SCL1and a first serial data pin SDA1. The first serial clock pin SCL1and the first serial data pin SDA1are connected to the slave controller23via a serial clock line SCL and a serial data line SDA correspondingly. A terminal of the first resistor R1is connected to the first serial clock pin SCL1. A terminal of the second resistor R2is connected to the first serial data pin SDA1.

The conversion module15includes a first transistor Q1and a second transistor Q2.

A gate of the first transistor Q1is connected to the first power source V1. A source of the first transistor Q1is connected to the first serial clock pin SCL1. A drain of the first transistor Q1is connected to the second power supply21. A gate of the second transistor Q2is connected to the first power source V1. A source of the second transistor Q2is connected to the first serial data pin SDA1. A drain of the second transistor Q2is connected to the second power supply21. In the embodiment, the first transistor Q1and the second transistor Q2are n-channel enhancement type MOSFET.

The detection module17includes a detection unit172, a third resistor R3, and a fourth resistor R4. The detection unit172includes a first detection pin P1, a second detection pin P2, a third detection pin P3, a fourth detection pin P4, and an outputting pin Pa. The first detection pin P1is connected to the serial clock line SCL. The second detection pin P2is connected to the first serial data line SDA. The third detection pin P3is connected to the drain of the first transistor Q1. The fourth detection pin P4is connected to the drain of the second transistor Q2. A terminal of the third resistor R3is connected to the drain of the first transistor Q1. An opposite terminal of the third resistor R3is connected to the outputting pin Pa. A terminal of the fourth resistor R4is connected to the drain of the second transistor Q2. An opposite terminal of the fourth resistor R4is connected to the outputting pin Pa.

The load19includes a second serial clock pin SCL2and a second serial data pin SDA2. The second serial clock pin SCL2is connected to the first serial clock pin SCL1via the serial clock line SCL. The second serial data pin SDA2is connected to the first serial data pin SDA1via the serial data line SDA.

The second power supply21includes a second power source V2, a fifth resistor R5, and a sixth resistor R6. A terminal of the fifth resistor R5is connected to the first serial clock pin SCL1. An opposite terminal of the fifth resistor R4is connected to the second power source V2. A terminal of the sixth resistor R6is connected to the first serial data pin SDA1. An opposite terminal of the sixth resistor R6is connected to the second power source V2.

The second controller23includes a third serial clock pin SCL3and a third serial data pin SDA3. The third serial clock pin SCL3is connected to the serial clock line SCL. The third serial data pin SDA3is connected to the serial data line SDA.

The principle of the electronic device10is described, when the voltage of the first detection pin P1is less than the voltage of the third detection pin P3and the voltage of the second detection pin P2is less than the voltage of the fourth detection pin P4, the outputting pin Pa stops outputting the pull-up voltage. The voltage difference between the gate and the drain of the first transistor Q1is more than 0V, the first transistor Q1is in an active state to convert the first clock information to the second clock information. The voltage difference between the gate and the drain of the second transistor Q2is more than 0V, the second transistor Q2is in an active state to convert the first data information to the second data information. When the voltage of the first detection pin P1is more than or equal to the voltage of the third detection pin P3or the voltage of the second detection pin P2is more than or equal to the voltage of the fourth detection pin P4, the outputting pin Pa outputs the pull-up voltage. The drain of the first transistor Q1and the drain of the second transistor Q2are pulled up to be equal to the pull-up voltage, thus the first transistor Q1and the second transistor Q2are still in an active state. As a result, the master controller21also outputs the first clock information and the first data information to control the load19.

In use, when the voltage of the external device20connected to the master controller21is in the abnormal state, the detection module17outputs the pull-up voltage to enable the conversion module15. Therefore, the electronic device10can also output the clock information and the data information when the voltage generated by the connected external device20is in the abnormal state.

It is to be understood, however, that even though information and advantages of the present embodiments have been set forth in the foregoing description, together with details of the structures and functions of the present embodiments, the disclosure is illustrative only; and changes may be made in detail, especially in the matters of shape, size, and arrangement of parts within the principles of the present embodiments to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.