Display having a backplane with interlaced laser crystallized regions

Systems including and methods for forming a backplane for an electronic display are presented. The backplane includes interlaced crystallized regions, and the interlaced crystallized regions include at least a left column of crystallized regions and a right column of crystallized regions. The left and right columns include rows of crystallized regions with gaps disposed between each of the rows. Furthermore, each crystallized region in the left column extends into a corresponding gap in the right column, and each crystallized region in the right column extends into a corresponding gap in the left column.

BACKGROUND

This disclosure relates to the manufacture of backplanes for electronic displays that enable more uniform display.

Electronic displays appear in many electronic devices. Electronic displays often include a backplane to which other layers (e.g., transistor layer, organic light emitting diode layer) of the display are connected either directly or indirectly. Often the backplane is formed by depositing a first material (e.g., amorphous silicon) on a motherglass then crystallizing the material to a crystalline form of the material (e.g., poly-crystallized silicon) using a crystallization process (e.g., laser crystallization). However, there are limits to the crystallization processes. For example, the laser crystallization process is limited by the width of a laser beam used to crystallize the backplane. Furthermore, the laser beam width is limited by technology, power, and resources available. If the available laser beam width is less than the desired smallest dimension (e.g., width or height) of a backplane for a display, the laser may be “scanned” across the backplane two or more times. However, when each of these passes are made, each pass may be overlapped with a previous pass to insure that the entire backplane is crystallized. However, when a region is scanned in two adjacent passes, the properties of the crystallized material may vary from the surrounding portions of the backplane. When the crystallized material varies on the backplane, transistors connected to the display pixels may respond differently to voltages and result in variations in current flow through the transistors. Accordingly, a display including a non-uniform backplane may have a non-uniform appearance due to these variations in the crystallized material.

SUMMARY

Embodiments of the present disclosure relate to systems and methods for providing a backplane for a uniform electronic display. Specifically, the backplane is formed using interlaced rows of crystallized material (e.g., poly-Si) to enable connections of transistors used to control individual pixels of the display. Instead of performing a solid scan to form a first column of crystallized material, a scan resulting in the first column may leave gaps between each row that is slightly larger than each row. The gaps left in the first column partially receive rows of a second column that is formed similar to the first column. In other words, rows from the second column extend into gaps in the first column, and rows from the second column extend into the first column. Additional rows may be also added in subsequent laser scans. By leaving gaps in each column that accommodates rows from one or more adjacent columns, electrical connections may be provided for each pixel of the display without scanning any portion of the backplane more than once, which may lead to non-uniformities in the display. Additionally, less crystallized material and/or resources (e.g., power) may be consumed in forming the backplane.

DETAILED DESCRIPTION

This disclosure generally relates to a backplane for a uniform electronic display. Specifically, the backplane may provide a uniform display, especially in large electronic displays. The backplane includes interlaced rows of crystallized material (e.g., poly-Si) that each enables connections of transistors used to control individual pixels of the display. Gaps left in one column partially receive rows of one or more other columns. By leaving gaps in each column that accommodates rows from one or more adjacent columns, electrical connections may be provided for each pixel of the display without scanning any portion of the backplane more than once, which may lead to non-uniformities in the display.

Such an interlaced row pattern on the backplane may also reduce resources used to form the backplane. For example, a laser crystallization process using the interlaced rows of the disclosure may use smaller and/or older lasers that may be cheaper to acquire than larger lasers. Additionally, less of the backplane is refined using the laser. Accordingly, some embodiments may reduce the amount of time that the laser is online, thereby reducing power consumed in the backplane formation process. In certain embodiments, where amorphous silicon is deposited only on locations to be crystallized, less material may be used and/or more material may be recovered, thereby reducing production costs of the backplane.

Finally, this disclosure tends to describe efficient timing circuitry for use with an organic light emitting diode (OLED). However, the efficient timing circuitry may be employed using any suitable type of electronic display that uses crystallized silicon. For example, other electronic displays that employ a matrix of pixels, such as liquid crystal displays (LCD), may also employ the uniform backplane of this disclosure.

Indeed, many suitable electronic devices may use displays that incorporate substrates that include interlaced laser scan lines used to perform poly-silicon (polySi) crystallization. For example,FIG. 1is a block diagram depicting various components that may be present in an electronic device suitable for use with such a display.FIGS. 2 and 3respectively illustrate perspective and front views of suitable electronic devices. Specifically,FIGS. 2 and 3illustrate a notebook computer and a handheld electronic device, respectively.

Turning first toFIG. 1, an electronic device10according to an embodiment of this disclosure may include, among other things, one or more processor(s)12, memory14, nonvolatile storage16, a display18, input structures20, an input/output (I/O) interface22, network interfaces24, and/or a power source26. The various functional blocks shown inFIG. 1may include hardware elements (including circuitry), software elements (including computer code stored on a computer-readable medium) or a combination of both hardware and software elements. It should be noted thatFIG. 1is merely one example of a particular implementation and is intended to illustrate the types of components that may be present in the electronic device10.

By way of example, the electronic device10may represent a block diagram of the notebook computer ofFIG. 2, the handheld device ofFIG. 3, or similar devices. In the electronic device10ofFIG. 1, the processor(s)12and/or other data processing circuitry may be operably coupled with the memory14and the nonvolatile memory16to execute instructions. For instance, the processor(s)12may generate image data to be displayed on the display18. The display18may be a touch-screen liquid crystal display (LCD). In some embodiments, the electronic display18may be a Multi-Touch™ display that can detect multiple touches at once. The display18may include a substrate that includes interlaced laser scan lines from the laser crystallization process to increase uniformity of appearance of the display18.

The input structures20of the electronic device10may enable a user to interact with the electronic device10(e.g., pressing a button to increase or decrease a volume level). The I/O interface22may enable electronic device10to interface with various other electronic devices, as may the network interfaces24. The network interfaces24may include, for example, interfaces for a personal area network (PAN), such as a Bluetooth network, for a local area network (LAN), such as an 802.11x Wi-Fi network, and/or for a wide area network (WAN), such as a3G or4G cellular network. The power source26of the electronic device10may be any suitable source of power, such as a rechargeable lithium polymer (Li-poly) battery and/or an alternating current (AC) power converter.

The electronic device10may take the form of a computer or other suitable type of electronic device. Such computers may include computers that are generally portable (such as laptop, notebook, and tablet computers) as well as computers that are generally used in one place (such as conventional desktop computers, workstations and/or servers). In certain embodiments, the electronic device10in the form of a computer may be a model of a MacBook®, MacBook® Pro, MacBook Air®, iMac®, Mac® mini, or Mac Pro® available from Apple Inc. By way of example, the electronic device10, taking the form of a notebook computer28, is illustrated inFIG. 2in accordance with one embodiment of this disclosure. The depicted computer28may include a housing30, a display18, input structures20, and ports of an I/O interface22. In one embodiment, the input structures20(such as a keyboard and/or touchpad) may be used to interact with the computer28, such as to start, control, or operate a GUI or applications running on computer28. In some embodiments, the display18may include a computer monitor, display integrated within the electronic device, standalone display (e.g., television), or other suitable electronic displays. Moreover, the display18may include a substrate that includes interlaced laser scan lines from the laser crystallization process to increase uniformity of appearance of the display18. The interlaced laser scan lines increase uniformity of appearance by reducing or eliminating application of laser crystallization to a portion of the substrate already crystallized with leaving horizontal spaces between scan lines. By reducing or eliminating multiple scans of portions of the substrate, the substrate has more uniform electrical properties thereby increasing the uniformity of appearance of a display18incorporating the substrate.

FIG. 3depicts a front view of a handheld device32, which represents one embodiment of the electronic device10. The handheld device32may represent, for example, a portable phone, a media player, a personal data organizer, a handheld game platform, or any combination of such devices. By way of example, the handheld device32may be a model of an iPod® or iPhone® available from Apple Inc. of Cupertino, Calif. In other embodiments, the handheld device32may be a tablet-sized embodiment of the electronic device10, which may be, for example, a model of an iPad® available from Apple Inc.

The handheld device32may include an enclosure34to protect interior components from physical damage and to shield them from electromagnetic interference. The enclosure34may surround the display18. The I/O interfaces24may open through the enclosure34and may include, for example, a proprietary I/O port from Apple Inc. to connect to external devices. User input structures36,38,40, and42, in combination with the display18, may allow a user to control the handheld device32. For example, the input structure36may activate or deactivate the handheld device32, the input structure38may navigate a user interface to a home screen, a user-configurable application screen, and/or activate a voice-recognition feature of the handheld device32, the input structures40may provide volume control, and the input structure42may toggle between vibrate and ring modes. A microphone44may obtain a user's voice for various voice-related features, and a speaker46may enable audio playback and/or certain phone capabilities. A headphone input48may provide a connection to external speakers and/or headphones. The display18of the handheld device32may include a substrate that includes interlaced laser scan lines from the laser crystallization process to increase uniformity of appearance of the display18. The interlaced laser scan lines increase uniformity of appearance by reducing or eliminating application of laser crystallization to a portion of the substrate already crystallized with leaving horizontal spaces between scan lines. By reducing or eliminating multiple scans of portions of the substrate, the substrate has more uniform electrical properties thereby increasing the uniformity of appearance of a display18incorporating the substrate.

FIG. 4is an exploded view of an embodiment the display18including organic light-emitting diodes (OLEDs). In certain embodiments, the OLEDs may include active-matrix organic light-emitting diodes (AMOLEDs) that use an active matrix of thin-film transistors (TFTs) to drive individual pixels of the display18. In some embodiments, the OLEDs may include passive-matrix organic light-emitting diodes (PMOLEDs). Some embodiments include a combination of AMOLEDs and PMOLEDs in a single display. Moreover, in some embodiments, the display18includes a protective housing50that at least partially blocks internal components from interference from external objects such as moisture or particulates. In embodiments having a transparent OLED, this protective housing50may be a transparent material (e.g., glass, plastic, etc.). In certain embodiments, the protective housing50may extend around all sides of the display. In some embodiments, the protective housing50may cover the bottom and sides of the display18with an upper housing52protecting a display surface of the display18. In certain embodiments, the upper housing52includes a substantially transparent layer such as glass or plastic.

The display also includes a substrate54. The substrate54supports an OLED layer56. In embodiments of the display18that include AMOLEDs, the substrate54may be coupled to a thin film transistor layer58that is used to drive individual pixels of the display18. The substrate54may be any suitable materials for supporting the OLED layer56and enabling the TFT layer58to be formed. In some embodiments, the substrate54includes a mother glass on which additional layers (e.g., amorphous silicon to be crystallized) are added to form the substrate54. Additional factors may be used to determine the material composing the substrate54. For instance, if the display18is desired to be transparent, a transparent substrate may be used. If the display18is desired to be bendable, a flexible material (e.g., metallic foils or plastics) may be used to form the substrate54. Moreover, in a top-emitting OLED, the substrate54may be composed of a material that is opaque and/or reflective. In some embodiments, portions of the substrate54may be selected from various semi-conductive materials according to desired properties of the display18, such as glass, plastic, metallic foil, or polycrystalline silicon (poly-Si). In some embodiments, the protective housing50may be incorporated the substrate54into such that the substrate54supports the OLED layer56and protects internal components of the display18.

The OLED layer56includes multiple layers such as an anode, a cathode, a conductive layer, and an emissive layer. The anode layer includes multiple anodes formed from a high work function material (e.g., indium tin oxide) that promotes injections of “holes” into the conductive layer. Each anode couples to a respective pixel circuitry unit60of the TFT layer58that removes electrons or adds “holes” when current flows through the OLED layer56. The conducting layer is formed from organic plastic molecules (e.g., polyaniline) that transport the holes from the anode to the emissive layer. The emissive layer is formed from organic plastic molecules (e.g., polyfluorene) different than those used in the conducting layer. The emissive layer transports electrons from the cathode to fill the holes transported from the conducting layer. When the electrons fill the holes, excess energy is created and emitted in the form of light. The color of the light emitted depends upon the type of organic molecule used in the emissive layer. Moreover, the brightness of the light depends upon the amount of electrical current applied to the OLED layer56through the TFT layer56. In some embodiments, the display18includes touch detection capabilities. In certain embodiments of the display18including touch detection, a separate and additional touch sensing layer may be incorporated into the display18. In some embodiments, touch sensing functions may be incorporated into the OLED layer56.

AlthoughFIG. 4illustrates an embodiment of a top emission AMOLED, other embodiments of the display18may include a bottom-emission AMOLED that has the OLED layer56disposed between the TFT layer58and the substrate54.

As mentioned, the display18of the electronic device may be an AMOLED display. The display18includes a matrix of TFTs in a TFT layer58that contains circuitry for controlling current flow through the OLED layer56. Accordingly,FIG. 5illustrates circuitry including a portion of a matrix of pixels of the display10. Moreover, the TFT layer58may include multiple pixel circuitry unit60arranged as an array or matrix defining multiple rows and columns of pixel circuitry unit60that collectively control current through individual OLEDs of the OLED layer56to form a viewable region of the display18in which an image may be displayed. In such an array, pixel circuitry unit60may be defined by the intersection of rows and columns, represented here by the illustrated gate lines62(also referred to as “scanning lines”) and source lines64(also referred to as “data lines”), respectively. Additionally, power supply lines66may provide power to each pixel circuitry unit60from a power supply68.

Additionally, display10includes a source driver69, which may include a chip, such as a processor or ASIC, configured to control appearance of the display10. For example, the source driver69may receive image data from the processor12and send signals to the pixel circuitry units60to cause corresponding illumination of OLEDs in the OLED layer56. The source driver69may also be coupled to a gate driver70, which may include a chip, such as a processor or ASIC, configured to provide/deny access to rows of pixel circuitry units60via the gate lines62. The source driver69may include a timing controller that determines and sends timing information to the gate driver70to facilitate activation and deactivation of individual rows of pixel circuitry units60. In other embodiments, timing information may be provided to the gate driver70in some other manner (e.g., using a timing controller that is separate from the source driver IC69). Further, whileFIG. 4depicts only a single source driver69, it should be appreciated that other embodiments may utilize multiple source drivers69to provide image signals to the pixel circuitry units60. For example, additional embodiments may include multiple source drivers69disposed along one or more edges of the display10, with each source driver69being configured to control a subset of the source lines64and/or gate lines62.

Although only twelve pixel circuitry units, referred to individually by reference numbers60a-601, respectively, are shown, it should be understood that in an actual implementation, each source line64and gate line62may include hundreds or thousands of such unit pixels62. By way of example, in a display18having a display resolution of 1136×640, each source line64, which may define a column of a pixel array, may include 640 groups of pixel circuitry units60, while each gate line62, which may define a row of the pixel array, may include 1,136 groups of pixel circuitry units60with each group including a red, blue, and green pixel circuitry unit60that each respectively corresponds to a red, blue, or green portion of the OLED layer56. In other words, a display having a 1136×640 resolution includes 3,408 pixel circuitry units60per gate line62. By way of further example, the panel60may have a resolution of 480×320, 960×640, 1024×768, 1280×720, or other suitable resolutions. In the presently illustrated example, the pixel circuitry units60a-60cmay correspond to a group of pixels having a red pixel unit (60a), a blue pixel unit (60b), and a green pixel unit (60c). The group of pixel circuitry units60e-62gmay be arranged in a similar manner. Additionally, in the industry, it is also common for the term “pixel” may refer to a group of adjacent different-colored pixels (e.g., a red pixel, blue pixel, and green pixel), with each of the individual colored pixels in the group being referred to as a “sub-pixel.”

Each pixel circuitry unit60includes various electrical components configured to control emission of light by a corresponding OLED of the OLED layer56. For example, each pixel circuitry units60includes at least one TFT that receives a signal from a respective gate line62and a respective source line64that causes current to flow through a corresponding OLED of the OLED layer56thereby causing the OLED to emit light, as discussed above. As previously discussed, variations in current through each OLED causes the OLED to vary according to the current passed through the OLED. In other words, OLEDs may be sensitive to non-uniformities between pixel circuitry units60. Accordingly, each pixel circuitry units60may include additional circuitry (e.g., TFTs) that attempt to improve uniformity to control current to increase uniformity. However, if the TFTs used to control two or more OLEDs are not uniform, the OLEDs may not be uniform in appearance.

One cause of non-uniformity in the TFTs may occur in non-uniformities in the substrate54upon which the TFT layer58is formed. For example, non-uniformities in the substrate54may result from limitations of laser beam scan width in a laser crystallization process used to create the substrate. Laser crystallization formation of the substrate54includes depositing a non-crystalline allotropic form of a material (e.g., amorphous silicon) then submitting the non-crystalline form to a laser that melts the non-crystalline form to create a crystalline form (e.g., poly-Si). Often the laser beam scan width is limited by various factors, such as laser power limitations, optics limitations, laser beam shape, and expenses. When a display18is desired to have a size such that both its height and width are greater than a possible width of a single laser beam scan (e.g., 750 mm), multiple scans must be performed to create the substrate54. For example, when a laser beam scan width is 750 mm, the maximum size display possible from a single scan is a 55-inch display. To create a larger display, a laser must pass over the substrate54more than once, and to ensure total coverage of the substrate, each scan of the laser overlaps with a previous scan. This area of overlap between scans can lead to non-uniformity between the portions subjected to a single laser scan and the portions subjected to additional laser scans (e.g., overlapped regions). The overlapped regions may result in different properties of the substrate54that cause TFTs formed in the overlapped regions to behave differently than TFTs formed in the single-scanned regions that may result in a pixel in an overlapped region to have a different appearance (e.g., cloudy or brighter depending on variety of factors) than a pixel in a single-scanned region.

FIG. 6illustrates an embodiment of a substrate54with interleaved scan lines to improve uniformity of the display18by performing laser scans with gaps to accommodate the next laser scan to enable overlap of scans without processing any portion of the substrate54more than once. The illustrated embodiment of the substrate54includes 3 rows of laser scans, but other embodiments of the substrate may include 2 or more laser scans.

In some embodiments, a first material (e.g., a-Si) may only be deposited over a portion of the substrate54. For example, some embodiments of the substrate54may originate with a-Si deposited only on portions (e.g., using a mask) that will be subsequently crystallized. In other embodiments, a-Si may be deposited on the entire substrate54, but only the portions that are crystallized, as discussed below, are refined to poly-Si.

As illustrated, a first scan is performed with a first scan width72that results in a first row74of multiple crystallized material regions76. The first row74includes gaps78between the crystallized material regions76that are not scanned by the laser. The gaps78may at least partially receive crystallized material regions80of the second row82when a second scan is performed with the second scan width84. Moreover, a portion of the crystallized material regions76of the first row74may be located in gaps86between the crystallized material regions80of the second row82. In other words, the crystallized material regions76of the first row74and the crystallized material regions80of the second row82may laterally overlap in an overlap region88while being located in gaps78and86so as to enable formation of TFTs in the substrate54with increased uniformity due to a lack of repeated laser scans on a single location in the overlap region88.

Similar to the second row82, additional crystallized material regions90may be disposed on the substrate54in a third row92having a third scan width94with gaps96between the crystallized material regions90. Although three rows are illustrated, some embodiments include a substrate having two or more rows of laser scanned rows. For example, some embodiments of the substrate54may include 2, 3, 4, 5, or more rows of laser scanned rows. Moreover, a width100of the gaps78,86, and96may be selected to be slightly smaller than a width102of the crystallized material regions76,80, and90so that the width102of crystallized material regions76,80, and90may be wholly disposed within the width100of one or more of the respective gaps78,86, and96. Furthermore, in some embodiments, the first scan width72, the second scan width84, and the third scan width94may have equivalent sizes so that a single laser size may be used to perform laser scans of the substrate54. In other embodiments, the first scan width72, the second scan width84, and/or the third scan width94may differ in size. By using different size of laser scan widths, older and/or cheaper laser resources may be used to perform subsequent laser scans at a shorter width as long as the sum of the scan widths are capable of achieving a desired size for the substrate.

After the substrate54has been prepared using laser crystallization, the TFT layer58can be formed in the substrate54.FIGS. 7-9illustrate various possible embodiments of arranging the pixel circuitry units60of the TFT layer58when formed in the substrate54.FIG. 7is a front view of an embodiment of a portion of a display array106that includes a substrate104formed in a TFT layer108. As illustrated, the substrate104includes an overlap region110similar to the overlap regions88or98ofFIG. 6. Specifically, the overlap region110includes lateral extensions of a left column112and a right column114extending into the overlap region110from respective left and right directions. The left column112includes multiple crystallized regions116referred to individually by reference numbers116a-116g, respectively. The crystallized regions116are spaced with multiple gaps118referred to individually by reference numbers118a-118f, respectively. Specifically, each gap (e.g.,118a) is located between two adjacent crystallized regions116(e.g.,116aand116b). Similarly, the right column114includes multiple crystallized regions120referred to individually by reference numbers120a-120g, respectively spaced with multiple gaps122referred to individually by reference numbers122a-122f, respectively. As illustrated, the crystallized regions116of the first column112extend into the gaps122of the second column114within the overlap region110, and the crystallized regions120of the second column114extend into the gaps118of the first column112within the overlap region110. For example, the crystallized region116bextends into the gap122aof the second column114in the overlap region110, and the crystallized region120aextends into the gap118aof the first column112in the overlap region110. Furthermore, although the illustrated embodiment includes only seven rows of crystallized regions in each column, it should be understood that the amount of rows in each column is equal to a desired amount of pixels (e.g., 1,136) for the display array104along the scan direction124according to the resolution of the display.

Furthermore, the TFT layer108includes pixel circuitry units126each formed in a crystallized region116or120. On top of each pixel circuitry unit126, an anode of a OLED is coupled to the pixel circuitry unit126with the pixel circuitry unit controlling current flow through the OLED, thereby controlling the brightness of the OLED. Each OLED generally overlays a respective pixel circuitry unit126in an OLED region such that each OLED covers a pixel circuitry unit126and a corresponding region in a respective gap118or122. For example, the OLED coupled to the pixel circuitry unit126in the OLED region128overlays a portion of the crystallized region120gand the corresponding gap122f. Accordingly, adjacent OLEDs, such as those corresponding to OLED regions130and132may appear uniform despite the formation of the pixel circuitry unit126in the crystallized region116gin the OLED region130and the formation of the pixel circuitry unit126in the crystallized region120gin the OLED region132.

In the current embodiment, the pixel circuitry units126are formed in crystallized regions116of the first column112in portions of the overlap region110right of a generally vertical transition line134and to the crystallized regions120of the second column114in portions of the overlap region110right of the transition line134. For example, the pixel circuitry unit60in the OLED region130is formed in the crystallized region116g, and the pixel circuitry unit60in the OLED region132is formed in the crystallized region120g. Additionally, although the OLED regions130and132are displayed as rectangular-shaped regions, it should be appreciated that OLED regions in OLED layer56may be formed in any desired shape, such as chevron-shaped or wave-shaped.

FIG. 8is a front view of a display array136that has an alternative orientation of pixel circuitry units126. As illustrated, a transition zone138is used to delineate the transition from forming the pixel circuitry units126in the crystallized regions116of the left column112to forming the pixel circuitry units126in the crystallized regions120of the right column114. The transition zone138is generally not vertical by offsetting horizontally offsetting transitions between consecutive rows to reduce the appearance of non-uniformities that may result from differences (e.g., different lasers, different timing of crystallization, gradiations of substrate, etc.) between the crystallized regions116of the left column112and the crystallized regions120of the right column114. Using a non-linear transition zone138may reduce the ability of observers to notice a transition from the left column112to the right column114. In other words, a non-linear transition zone138softens an edge between the left column112and the right column114such that any differences in appearance between OLEDs corresponding to the crystallized regions116and120are not vertically aligned to reduce the appearance of differences between OLEDs. Specifically, if the appearance of OLEDs corresponding to OLED region130differs from the appearance of OLEDs corresponding to the OLED region132, a vertical alignment of similar differences as shown inFIG. 7may increase the noticeability of the differences. Instead, by staggering these changes, these differences may be at least partially concealed. For example, by offsetting a transition from OLED region140to OLED region142to a position not directly above the transition from OLED region130to OLED region132, the differences may be less apparent to an observer.

FIG. 9is front view of a display array144with an interlaced orientation of pixel circuitry units126in the overlapping region110. As illustrated, the display array144includes alternating pixel circuitry units126between the crystallized region116of the left column112and the crystallized region120of the right column114. By alternating the pixel circuitry units126between the crystallized region116of the left column112and the crystallized region120of the right column114, the transition from the left column112and the right column114is softened by feathering the two columns together, thereby reducing the likelihood of differences between the two columns being apparent to an observer. In some embodiments, the alternation of the pixel circuitry units126may be uniform in each row of the overlapping region110. In other embodiments, such as the illustrated embodiment, the orientation of pixel circuitry units126may vary by row. For example, in the illustrated embodiment, the row formed by crystallized regions116aand120aalternates between crystallized regions116aand120aat the edge of the overlapped region110, but the row formed by crystallized regions116band120boffsets the alternation by one pixel circuitry unit126before alternating between the crystalline regions116and120. Moreover, the row formed by crystalline regions116cand120calternates between the crystalline regions116cand120cat the edge of the overlapping region110similar to but inverse from the row formed from crystalline regions116aand120a. Certain embodiments include any of the illustrated embodiments in any combination suitable for connecting the pixel circuitry units, such as inverting the alternation between consecutive rows116and/or118.

FIG. 10is a flow diagram illustrating an embodiment of a process150for manufacturing a backplane that may be used in the electronic display18. The process150includes depositing a first material on a substrate (block152). The first material may include an allotropic form of semiconductor, such as a-Si. The process150also includes forming a first column of crystallized material with gaps (block154). The first column is formed using a refinement process, such as a laser crystallization process that refines a-Si into poly-Si. When the first column of rows is formed gaps are left between the rows such that there is a vertical distance between adjacent rows of the first column of rows. Moreover, the gaps are selected to be slightly larger than the rows. The process also includes forming a second column of rows of crystallized material with gaps (block156). The formation of the second column is similar to the formation of the first column. However, at least a portion of each row of the second column protrudes into the gaps of the first column, and at least a portion of each row of the first column protrudes into the gaps of the second column. In other words, the columns overlap, but the rows are arranged as “interlocking fingers” instead forming rows that are overlaid on top of each other. Accordingly, no portion of the backplane is crystallized twice, thereby increasing uniformity of the backplane and any display that incorporates the backplane.

Furthermore, the process150includes forming pixel circuitry units (e.g., one or more transistors, capacitors, and other electronic circuitry) in the first and second column of rows of crystallized material (block158). In some embodiments, a transition from forming the pixel circuitry units in the first column to forming the pixel circuitry units in the second column may be linearly divided in an overlapping region between the two columns, such as the embodiment illustrated inFIG. 7. In other embodiments, this transition may be non-linear such that the transition for each row is offset from a transition of an adjacent row, such as the embodiment illustrated inFIG. 8. Moreover, further embodiments may alternate forming the pixel circuitry units in the first column to forming the pixel circuitry units in the second column in an alternating orientation, such as the embodiment illustrated inFIG. 9.