High linearity satellite payload using solid state power amplifiers

A solid state power amplifier uses a Doherty power amplifier that can be implemented as a monolithic microwave integrated circuit. By adjusting the DC bias of the amplifying stages in each branch of the Doherty amplifier, the output power, linearity, and DC power can be adjusted to provide a specified output, where the specification for the output can include the maintaining of desired DC power and linearity. The Doherty power amplifier can be used in a satellite payload or other application utilizing solid state power amplifiers, while providing the proper amount of RF output power and DC power. A single amplifier can have its bias levels adjusted for different output levels, helping to minimize the number of designs that are required for a given satellite payload, reducing the variety of parts in a satellite payload.

BACKGROUND

In order to accurately transmit signals to subscribers, a communication satellite needs to amplify its output signals with a high degree of linearity, while providing the proper amount of Radio Frequency (RF) output power and Direct Current (DC) power. As these output signals are often required for a number of different output levels, being able to provide these signals with the needed degree of linearity can result in a satellite payload having a large number of amplifier designs, increasing weight and complexity.

DETAILED DESCRIPTION

The following presents techniques for controlling the Radio Frequency (RF) output power level, Direct Current (DC) power, and linearity of Solid State Power Amplifier (S SPA) devices through biasing. More specifically, the solid state power amplifier uses a Doherty Power Amplifier (PA) that can be implemented as a Monolithic Microwave Integrated Circuit (MMIC), where setting/adjusting the bias on different arms of the Doherty power amplifier is used to affect the output power (Pout), DC power (Pdc) and linearity of the amplifier's output. The embodiments presented here are discussed mainly in the context of a satellite implementation, where these bias parameters can be set to achieve a specific goal for a flight set or adjusted in-orbit to adapt to different operating scenarios as needed.

The following presents embodiments for solid state power amplifiers using a single Doherty power amplifier or a combination of multiple Doherty power amplifiers that contains DC bias circuitry. The Doherty amplifier can be implemented as a single MMIC in a variety of semiconductor processes or in a hybrid format using a combination of thin films and semiconductor devices. Doherty amplifier includes a main branch connected in parallel with an auxiliary branch, where each branch of the Doherty amplifier has the same number of stages, which can be one, two or more stages of amplification. The auxiliary, or peaking, branch contributes to the output only when the input signal exceeds some threshold value. Each stage in the main and auxiliary branches of the Doherty amplifier has its own DC bias feeds. By adjusting the DC bias of the amplifying stages in each branch of the Doherty amplifier, the output power, linearity, and DC power can be adjusted to provide a specified output, where the specifications for the output can include the maintaining of desired DC power (Pdc) and linearity while adjusting the output power level in back-off.

The arrangements presented here provide for high linearity in a satellite payload or other application utilizing SSPAs, while providing the proper amount of RF output power (Pout) and DC power (Pdc). As a single amplifier can have its biase levels adjusted for different output levels, this can help to minimize the number of designs that are required for a given satellite payload, reducing the variety of parts in a satellite payload by leveraging the same MMIC at different output power settings. Through proper biasing of the PA's MIMIC, the linearity, Pout, Pdc trade in a payload can be optimized, supporting an SSPA with a range of output power levels and also able to support a variety of antenna configurations including Single Element per Beam architectures through Direct Radiating Multi-Element per Beam architectures.

FIG. 1illustrate one embodiment in which these methods can be applied and depicts a block diagram of a wireless communications system that includes a communication platform100, which may be a satellite located, for example, at a geostationary or non-geostationary orbital location. In other embodiments, other platforms may be used such as UAV or balloon, or even a ship for submerged subscribers. In yet another embodiment, the subscribers may be air vehicles and the platform may be a ship or a truck where the “uplink” and “downlink” in the following paragraphs are reversed in geometric relations. Platform100may be communicatively coupled to at least one gateway105and a plurality of subscriber terminals ST (including subscriber terminals107). The term subscriber terminals may be used to refer to a single subscriber terminal or multiple subscriber terminals. A subscriber terminal is adapted for communication with the wireless communication platform including as satellite100. Subscriber terminals may include fixed and mobile subscriber terminals including, but not limited to, a cellular telephone, wireless handset, a wireless modem, a data transceiver, a paging or position determination receiver, or mobile radio-telephone, or a headend of an isolated local network. A subscriber terminal may be hand-held, portable (including vehicle-mounted installations for cars, trucks, boats, trains, planes, etc.) or fixed as desired. A subscriber terminal may be referred to as a wireless communication device, a mobile station, a mobile wireless unit, a user, a subscriber, or a mobile.

In one embodiment, satellite100comprises a bus (i.e. spacecraft) and one or more payloads (i.e. the communication payload). The satellite may also include multiple power sources, such as batteries, solar panels, and one or more propulsion systems, for operating the bus and the payload.

At least one gateway105may be coupled to a network140such as, for example, the Internet, terrestrial public switched telephone network, mobile telephone network, or a private server network, etc. Gateway105and the satellite (or platform)100communicate over a feeder beam102, which has both a feeder uplink102uand a feeder downlink102d. In one embodiment, feeder beam102is a spot beam to illuminate a region104on the Earth's surface (or another surface). Gateway105is located in region104and communicates with satellite100via feeder beam102. Although a single gateway is shown, some implementations will include many gateways, such as five, ten, or more. One embodiment includes only one gateway. Each gateway may utilize its own feeder beam, although more than one gateway can be positioned within a feeder beam. Note that the terms “feeder” beams and “service” beams are used for convenience. Both feeder beams and service beams are spot beams and the terms are not used in a manner to limit the function of any beam. In one embodiment, a gateway is located in the same spot beam as sub scriber terminals.

Subscriber terminals ST and satellite100communicate over service beams; for example,FIG. 1shows service beams106,110,114and118for illuminating regions108,112,116and120, respectively. In many embodiments, the communication system will include more than four service beams (e.g.,60,100, etc.). Each of the service beams have an uplink (106u,110u,114u,118u) and a downlink (106d,110d,114d,118d) for communication between subscriber terminals ST and satellite100. AlthoughFIG. 1only shows two subscriber terminals within each region108,112,116and120, a typical system may have thousands of subscriber terminals within each region.

In one embodiment, communication within the system ofFIG. 1follows a nominal roundtrip direction whereby data is received by gateway105from network140(e.g., the Internet) and transmitted over the forward path101to a set of subscriber terminals ST. In one example, communication over the forward path101comprises transmitting the data from gateway105to satellite100via uplink102uof feeder beam102, through a first signal path on satellite100, and from satellite100to one or more subscriber terminals ST via downlink106dof service beam106. Although the above example mentions service beam106, the example could have used other service beams.

Data can also be sent from the subscriber terminals ST over the return path103to gateway105. In one example, communication over the return path comprises transmitting the data from a subscriber terminal (e.g., subscriber terminal107in service beam106) to satellite100via uplink106uof service beam106, through a second signal path on satellite100, and from satellite100to gateway105via downlink102dof feeder beam102. Although the above example uses service beam106, the example could have used any service beam.

FIG. 1also shows a Network Control Center130, which includes an antenna and modem for communicating with satellite100, as well as one or more processors and data storage units. Network Control Center130provides commands to control and operate satellite100. Network Control Center130may also provide commands to any of the gateways and/or subscriber terminals.

In one embodiment, communication platform100implements the technology described above. In other embodiments, the technology described above is implemented on a different platform (e.g. on the ground or on a different type of satellite) in a different communication system.

The architecture ofFIG. 1is provided by way of example and not limitation. Embodiments of the disclosed technology may be practiced using numerous alternative implementations.

FIG. 2Ais a block diagram of a satellite for a simplified example of two input ports and two output ports, illustrating some of the elements that an embodiment of satellite100ofFIG. 1may include. AlthoughFIG. 2Ashows only two input ports and paths, and two output ports and paths for purposes of discussion, a real implementation of a satellite100as inFIG. 1may have tens or even hundreds of such inputs, outputs and channels.

In this example, the receive side211of the satellite200includes two antennae or other input ports201,203each connected to a corresponding input processing path205,207. The input paths include low noise amplifiers (LNAs) and other low power equipment (LPE), such as mixers, amplifiers and filters used to process the received signals, which are then separated out into sub-channels, where the example shows two sub-channels per channel. These elements can introduce relatively large phase, delay and gain variations, such as can be caused by temperature variations. In a satellite application, when power consumption is a major consideration, use of low power elements is important, but in other applications where such constraints are less important, higher power components can be used. To account for gain, phase and other variations in each of the sub-channels on the receive side, a set of calibration correction elements243a-dare included in the sub-channel receive paths. These can be adjusted to calibrate the individual sub-channels, such as would be done during an initial calibration process for the receive side.

On the transmit side212of satellite200, the two antennae or other output ports221and223are supplied signals from the output block220. Output block220includes transmit side processing path1circuitry225and transmit side processing path2circuitry227, which each include mixers, filters and amplifiers, including the high-powered amplifiers at the end, to generate the signals for the output ports221and223. In the embodiment ofFIG. 2A, the transmit side processing path1circuitry225and transmit side processing path2circuitry227is connected to the output ports221and223through output hybrid matrix OHM228on the one side and to the input hybrid matrix IHM229on the input side. The input hybrid matrix IHM229allows for a signal from any one of the sub-channels to be distributed across multiple transmit paths, and the output hybrid matrix OHM228allows signals from any of the transmit paths to be directed to any of the output ports. Rather having all transmit paths be able to handle the maximum amplification power that may be needed in a single channel, the use of the input hybrid matrix IHM229and the input hybrid matrix IHM229allows for the signal of a sub-channel to be distributed across multiple transmit paths so that unused amplification power in underutilized channels is used to supply extra power for sub-channels needing higher degrees of amplification. In some embodiments, the input hybrid matrix IHM229can be implemented in a digital embodiment as part of a virtual input hybrid matrix as part of the digital channelizer block240. This division of amplification allows for the individual transmit paths to use amplifiers of lower power, and consequently less cost and lower weight, which is an important concern in a satellite. A set of calibration pre-correction elements245a-dare included in the sub-channel paths are included to account for gain, phase and other variations in each of the transmit sub-channels on the transmit side. These can be adjusted to calibrate the individual transmit sub-channels, such as would be done during an initial calibration process for the receive side.

FIGS. 2B and 2Cprovide more detail on the receive paths and transmit paths ofFIG. 2A.FIG. 2Bis block diagram illustrating an embodiment of a receive side processing path block, such as205or207inFIG. 2A, in more detail. More specifically,FIG. 2Bprovides more detail on some of the elements of one embodiment of receive side processing path1205, where other receive paths would have a similar structure. The signal from the input port, such as an antenna201, is initially received at a low noise amplifier261. The amplified input signal is then filtered at block263, down-converted from the received RF range to an intermediate frequency at block at block265, before being filtered again at block267. The signal is then sent on to the digital processing elements of the channelizer section240and separated out into sub-channels.

FIG. 2Cprovides more detail on some of the elements of one embodiment of the transmit side processing path1225as connected between the input hybrid matrix JIM229and the output hybrid matrix228, where other transmit paths would have a similar structure. The signal from the input hybrid matrix IHM229is filtered at block271and then up-converted from the IF range to the RF range in block273, before being filtered again at block275. The filtered and up-converted signals are then amplified initially by a low power amplifier278and then a high-power amplifier279, before going on to the output hybrid matrix OHM228. The input hybrid matrix IHM229and output hybrid matrix OHM228allow for formation of a Multi-Port Amplifier (MPA), such that different signals can be distributed across multiple high-power amplifiers from different paths to provide higher amounts of power for a signal than available from a single path, but without the need to have each path to be able to the worst case maximum amplification all by itself.

Referring again toFIG. 2A, this shows only two antennae, radiating elements, or other output ports221and223, although a real implementation of a satellite100as inFIG. 1may have tens or even hundreds of such inputs, outputs and channels. A user signal may be transmitted from single antenna, or from multiple antennae at the same time in a beamforming arrangement. Beamforming satellites transmit a signal from several antennae that form a beam at chosen locations though constructive and destructive interference between the different signals. To do this, the signals from the different output ports need to be sufficiently well calibrated with respect to one another so that they are beamforming when incident on the desired location.

Output block220includes the two paths, transmit side processing path1circuitry225and transmit side processing path2circuitry227. Each of these paths can include elements such as mixers, filters and amplifiers, including the high-powered amplifiers at the end, to generate the signals for the output ports221and223. The transmit side processing path1circuitry225and transmit side processing path2circuitry227are both connected to the output ports221and223through output hybrid matrix OHM228on the one side and to the input hybrid matrix IHM229on the input side. The input hybrid matrix IHM229allows for a signal from any one of the sub-channels to be distributed across multiple transmit paths, and the output hybrid matrix OHM228allows signals from any of the transmit paths to be directed to any of the output ports. This is an example of a 2×2 multiport amplifier (MPA).

Rather than having each path of an MPA individually be able to handle the maximum amplification power that may be needed in a single channel, the use of the input hybrid matrix IHM229and the output hybrid matrix OHM228in an MPA allows for the signal to be distributed across the amplification of multiple paths so that unused amplification power in underutilized channels can be used to supply extra power for paths needing higher degrees of amplification. This division of amplification allows for the individual transmit paths to use amplifiers of lower power, and consequently less cost and lower weight, which is an important concern in satellites and many other applications.

FIG. 3illustrates more detail for one example of an MPA300, such as can be used at output block220ofFIG. 2Aor in other applications, here in a 4×4 embodiments of four input ports and four output ports. The four input ports of the MPA are the four inputs of the input hybrid matrix301. In this embodiment, the input hybrid matrix301is a “virtual” input hybrid matrix as it is implemented digitally, but this need not be the case in other embodiments. The four outputs of the MPA are the four outputs of the output hybrid matrix311. The four outputs of the input hybrid matrix301are connected to the four inputs along four amplification paths. The amplification paths can be similar to those described above with respect toFIG. 2Cor other embodiments, but for this discussion each of the four paths is simplified to show one high-power amplifier HPA309a-309d. In the representation ofFIG. 3, any other elements in the paths between the input hybrid matrix301and output hybrid matrix311are omitted for simplicity of discussion.

FIG. 4considers the paths from one input of an MPA300, such as illustrated inFIG. 3except for a generalized n×n embodiment, to one of its outputs. In the simplified illustration ofFIG. 4, an input signal S is received at an input port (input port n), distributed by the input hybrid matrix to the n paths, and is amplified by n amplification units HPA1-HPAn309a-309nin parallel (input hybrid matrix301and output hybrid matrix311are omitted for simplicity). Signal S is split into signals S′ that travel along parallel pathways through amplification stages309a-309n. The amplified signals S″ are then recombined and provided as an amplified outputSat output port1.FIG. 4illustrates one input signal being distributed across all of the amplification pathways, but depending on the needed power and other signals concurrently in the MPA from other ports, a given input signal will be distributed across a subset of from1to all n of the amplification paths.

To accurately provide amplified output signals from the input signals, including for beam forming and/or MPA applications, the response of the high power RF amplifiers should have a linear response over the desired output power range. Above a certain power level the output of an amplifier will exhibit compression, where the output signal will flatten out and no longer provide a linear response. In the context of a satellite payload, when weight, size and power consumption are of particular importance, providing high power amplifiers that have high linearity while providing the proper amount of RF output power can be particularly difficult. To meet these requirements, the following presents the use of a Doherty type amplifier.

A Doherty power amplifier provides the input signal to two parallel branches or arms, having a main or carrier arm connected in parallel with an auxiliary or peaking arm. The amplifier of the auxiliary arm is used to enhance the signal of the amplifier of the main arm when the main arm goes into compression. Below a certain input level, the output is provided from the main arm, so that when the input signal is near its average level, the amplifier of the auxiliary arm is not operating. This can allow the main arm to operate near its most efficient level for lower output power. When the output power increases above a certain threshold, the auxiliary arm starts to operate and enhance the output from the main arm. This arrangement allows for the arms to work together to provide high DC to RF conversion efficiency at “backed off” power levels while maintaining the capacity to reproduce signal peaks high above the average signal power level.

FIG. 5is a schematic representation of a Doherty amplifier500with a single amplifier stage in each arm. At left, an RF input is received an input splitter501, where in the following embodiments the input splitter is a quadrature generator501that produces two outputs that are 90 degrees out of phase with one another. A resistive load521is connected at an isolated port, to which can be routed a significant portion of any reflected power from the amplifies503and513. At top is the main or carrier arm with amplifier503, which provides all of the output below a threshold input level. In the lower arm is the auxiliary or peaking arm with amplifier513, which begins operation above the threshold input. The 90 degree split between the arms is introduced because the auxiliary arm amplifier513will have a 90 degree delay with respect to the main arm amplifier503in order to be in step with the main arm amplifier503, which is subjected to a 90 degree delay in the ¼ wave impedance inverter507at its output.

The main amplifier503and auxiliary amplifier513are each passed through a respective harmonic rejection filter505and515and the combined to provide the gain for the Doherty power amplifier500. Prior to combining, the output of the main amplifier503is passed through the ¼ wave line507as part of a combining circuit for the two arms, which combines the signal form the ¼ wave line507with the output of the auxiliary amplifier513. The combined signals subsequently pass through the impedance transformer509to provide the output signal. This arrangement allows for the two arms to operate without loading each other undesirably, so that the auxiliary amplifier513does not load the main amplifier503and, once the main amplifier503is saturated, the main amplifier503does not load the auxiliary amplifier513.

FIG. 6is a plot of Pin versus Pout illustrating the behavior of the Doherty amplifier. The amplifier503of the main arm provides a Pout curve601that increases linearly with the Pin up to an input level of around P′in, after which it begins to roll-off due to compression. Also, at around P′in, the amplifier513of the auxiliary arm turns on with a Pout curve603that increases linearly from P′in, before eventually also beginning to go into compression. In one set of embodiments, the main arm's amplifier503can be a class AB type of amplifier and the auxiliary arm's amplifier513can be a class B or class C type of amplifier. The combined output is illustrated by the curve605, which extends the linear region well past P′in and giving a linear Pout for an extended range of Pin values. Although a single arm amplifier can be arranged to have linear region extending further and provide a similar output to the curve605, this would be achieved with lower efficiency if the main arm amplifier503was operated independently of the auxiliary arm amplifier513. By having the main arm only be used alone below P′in and having the auxiliary arm beginning to contribute above P′in, this allows for the main arm to be backed off and results in the combined output of the Doherty amplifier operating with higher efficiency in the extended range. This makes such an arrangement particular attractive in applications, such as satellites, where power consumption is of particular importance.

FIGS. 7A-7Cillustrate how the behavior shown inFIG. 6corresponds to an input waveform for a sine wave.FIG. 7Aillustrates the output waveform from the main arm when the peak amplitude of the input signal is high enough that its amplifier503goes past its compression point. As the main arm amplifier503is compressing, the peaks of the waveform flatten out.FIG. 7Billustrates how the auxiliary arm's amplifier513provides an enhanced waveform, only contributing when the amplitude of the input signal exceeds the threshold value.FIG. 7Cshows the combined output waveform, with the signal's fidelity restored.

The embodiments described here present techniques for controlling the RF output power level, DC power, and linearity of the Solid State Power Amplifier (SSPA) device through biasing. More specifically, the bias on different arms of a Doherty power amplifier Monolithic Microwave Integrated Circuit (MMIC) are set or adjusted to affect Pout, Pdc, and linearity. The bias levels can be set to achieve a specific goal for a flight set or adjusted in-orbit to adapt to different operating scenarios as needed. This arrangement can provide for high linearity in a satellite payload utilizing SSPAs, while providing the proper amount of RF output power (Pout) and DC power (Pdc), minimizing the number of designs that are required for a given satellite payload. The benefits of this arrangement include a reduction in the variety of parts in a satellite payload by leveraging the same MIMIC at different output power settings where, through proper biasing, the linearity, Pout, and Pdc in a payload can be optimized. The embodiments described can further support an SSPA with a range of output power levels and a variety of antenna configurations, including Single Element per Beam architectures through Direct Radiating Multi-Element per Beam architectures.

The embodiments presented here include SSPAs using a single or a combination of Doherty power amplifier(s) that contains DC bias circuitry and RF signal paths. The Doherty amplifiers can be a single MMIC in a variety of semiconductor processes or in a hybrid format using a combination of thin films and semiconductor devices. The Doherty amplifier can include a main arm or branch and an auxiliary arm or branch, where each branch of the Doherty amplifier can have one, two or more stages of amplification. Each amplifying stage within the main and auxiliary arms of the Doherty amplifier can have its own DC bias feeds. By adjusting the DC bias of the stages in each branch of the Doherty amplifier, the output power, linearity, and DC power can be adjusted. The key specifications in adjusting the bias levels can include maintaining desired Pdc and linearity while adjusting the power level in back-off.

FIG. 8is a block diagram of an embodiment for a multibeam, single element per beam satellite transponder output section, such as could be used in the output block220ofFIG. 2A. The high power amplifiers279ofFIG. 2Care now implemented as SSPAs800a-800fof the Doherty type.FIG. 8shows explicitly shows six SSPAs800a-800f, but more or less SSPAs can be used depending on the embodiment, where a typical satellite may have tens or even hundreds of such amplifiers. The input for each of the SSPAs800a-800fis received from the digital channelizer block240ofFIG. 2Athough one of a group of signal selection or mixing circuits801a-801c, where three such circuits are shown, but other embodiments may have fewer or, typically, more. The signal selection or mixing circuits801a-801callow for the different signals from the channelization circuit to be selectively supplied to the different SSPAs800a-800fand can used for redundancy purposes (by switching out defective circuit elements), for multi-port amplifier (MPA) operation (by acting as an input hybrid matrix, as discussed above with respect toFIGS. 3 and 4), or a combination of these.

The output of the SSPAs800a-800fare connected to the antennae or other output ports809a-809f.FIG. 8shows six antennae or other output ports809a-809d, but more or less can be used depending on the embodiment, where a typical satellite may have tens or even hundreds of such antennae or other output ports. The antenna structure can include a reflector, such as illustrated to the right by the parabolic reflector821. The outputs of each of the SSPAs800a-800fare provided to the antennae or other output ports809a-809fthough one of a group of output signal selection or mixing circuits803a-803c, where three such circuits are shown, but other embodiments may have fewer or, typically, more. The signal selection or mixing circuits803a-803callow for signals from different SSPAs800a-800fto be supplied to the antennae or other output ports809a-809fand can used for redundancy purposes (by switching out defective circuit elements), for multi-port amplifier (MPA) operation (by acting as an output hybrid matrix, as discussed above with respect toFIGS. 3 and 4), or a combination of these.

In the embodiment ofFIG. 8, each of the antennae or other output ports809a-809fis connected to the output signal selection or mixing circuits803a-803cthrough a corresponding harmonic filter805a-805fand any other feed elements grouped collectively at807a-807fSome or all of the paths can include a test coupler, such as shown at TC811eand TC811f. The test couplers TC811eand TC811fcan be used to monitor the output of SSPAs or, through use of the output signal selection or mixing circuits803a-803c, connected to receive the output of others of the SSPAs and used to provide feedback on the operation of the SSPAs800a-800ffor use in monitoring the output of the amplifiers to determine their biasing.

FIG. 9illustrates an SSPA using a Doherty power amplifier system with individual bias control for each of the individual amplifying stages in each of the arms, along with control circuitry for the bias control circuits. More specifically,FIG. 9shows a Doherty power amplifier arranged similarly to that discussed above with respect toFIG. 5, but now with two series connected amplifiers in both the main arm and in the auxiliary arm. Other embodiments can have one stage per arm, or more than two series connected stages per arm, but will typically have the same number of stages in each arm. Other elements, such as the harmonic rejection filters505and515ofFIG. 5, can be included in each arm, but are not shown inFIG. 9to simplify the representation for the following discussion. Relative toFIG. 5,FIG. 9add elements so that the individual amplifying stages of each arm can be separately biased to provide the desired output characteristics for a specified output. Depending on the embodiment, a single MIMIC may include a single such Doherty power amplifier or several such amplifiers, also including the control circuitry in some embodiments.

ConsideringFIG. 9in more detail, the RF input, such as from one of selection or mixing circuits801a-801cor a preceding SSPA, is received at the quadrature generator901(or, more generally, an input splitter), which has resistive load921connected at an isolated port. The outputs of the quadrature are supplied to the main or carrier arm and the auxiliary or peaking arm, where in this embodiment the main arm includes two series connected amplifier stages903aand903bin series and the auxiliary arm includes two series connected amplifier stages913aand913b. More generally, each of the main and auxiliary arms can include N stages that are, for N>2, connected in series. After being amplified by amplifiers903aand903b, the main arm signal goes through the ¼ wave line907and is combined with the signal from the auxiliary arm that has passed through amplifiers913aand913b. The combined signal then passes through impedance inverter909to provide the output of the S SPA, which can then be supplied to one of the output signal selection or mixing circuits803a-803cor a subsequent S SPA.

A main bias control circuit923is connected to each of the main arm's amplifiers to individual set one or more of the gate voltage Vg, gate current Ig, drain voltage Vd, and drain current Id of the corresponding amplifier. In this two stage example, the main bias control can set one or more of Vg1, Ig1, Vd1and Id1for amplifier903aand one or more of Vg2, Ig2, Vd2and Id2for amplifier903b. The auxiliary bias control circuit933can set one or more of Vg1A, Ig1A, Vd1A and Id1A for amplifier913aand one or more of Vg2A, Ig2A, Vd2A and Id2A for amplifier913b. By adjusting one or more of the Vds, Vgs, Ids and Igs of the Doherty power amplifier's individual amplifying stages, the satellite transponder can be adjusted according to a desired performance target.

FIG. 10is a block diagram to illustrate an example of how an individual biasing block can be connected to an amplifying stage in an embodiment where the stage is a single field effect transistor (FET). InFIG. 10. FET1001is connected between the stage output and ground, with the stage input connected to its gate. At the gate, a gate bias circuit1003is connected to receive a gate bias voltage Vg and supply a gate bias current Ig at the gate of FET1001. At the drain, a drain bias voltage1005is connected to receive a drain bias voltage Vd and supply a drain bias current at the drain. The drain and gate biasing can be adjusted based on the desired output response of the FET1001. In one set of embodiments for a Doherty power amplifier, to provide the sort of behavior illustrated inFIG. 6for the main and auxiliary arm's amplifiers, different classes of amplifiers can be used for the different arms. For example, class AB amplifiers can be used for the stages of the main arm and class B or class C for the stages of the auxiliary arm.

Returning toFIG. 9, a control circuit941is connected to the main bias control circuit923and the auxiliary bias control circuit933to provide the corresponding sets of control signals from which the bias control circuit set or adjust the bias levels on the amplifiers of the two arms. The control circuit941can be implemented in hardware, software, firmware or some combination of these and be a circuit specifically for this purpose or a more general control circuit with other functions. Depending on the embodiment, the control circuit941can be part of the same MIMIC on which the Doherty amplifier is formed or part of a separate circuit. For example, a single control circuit941may be the control circuit for Doherty power amplifiers on multiple MMICs and be a dedicated control circuit or a processor or other controller that also has other functions on the satellite. In some embodiments, a single MMIC may include multiple ones of the Doherty power amplifier circuits that include a common control circuit941.

The control circuit receives an input specifying a desired output (e.g., power level), and sets bias levels of main arm's amplifiers, and bias levels of auxiliary arm's amplifiers relative to main arm, to provide desired output over specified output power output range. The bias levels corresponding to a specified output can be based on an initial determination process and stored in a memory (such as a look-up table, or LUT) from which they can be accessed.FIG. 14below presents an embodiment for how these look-up table values can be determined. In other embodiments, the bias levels can be determined from the specified output based on functional relationships. In other alternates, the bias levels can alternately, or additionally, be determined based on monitored the output of the Doherty power amplifiers, such as by using test couplers TC1111eand TC1111f.

The control circuit941can be connected to a memory943that can store bias values corresponding to a specified output (e.g., a Pout value), such as in the form of a look-up table. When the control circuit941receives an input specifying an output, the control circuit941can retrieve the corresponding bias values. The look-up table value can be determined and loaded into the memory943before the satellite is put into service.

FIG. 11is a block diagram of an embodiment for a multibeam direct radiating antenna satellite transponder output section, such as could be used in the output block220ofFIG. 2A. The high power amplifiers279ofFIG. 2Care implemented as SSPAs1100a-1100fof the Doherty type. The embodiment ofFIG. 11shows explicitly shows six SSPAs1100a-1100f, but more or less SSPAs can be used depending on the embodiment, where a typical satellite may have tens or even hundreds of such amplifiers. In the embodiment ofFIG. 11, each of the SSPAs1100a-1100fcan be as illustrated inFIG. 9. The input for each of the SSPAs1100a-1100fis received from a beamforming circuit1101. As discussed above with respect toFIG. 2A, in a beamforming system, the signals from multiple ones of the output ports or radiating elements1109a-1109fare arranged to constructively interfere and form a beam at chosen locations. The beamforming circuit generates the inputs for the SSPAs1100a-1100fto have the proper phase and amplitude relationships so that the needed signals are supplied to the output ports or radiating elements1109a-1109fto properly form the beams.

The output of the SSPAs1100a-1100fare connected to the radiating elements or other beamforming output ports1109a-1109fof the antenna array.FIG. 11shows explicitly shows six radiating elements or other output ports1109a-1109d, but more or fewer antennae or other output ports can be used depending on the embodiment, where a typical satellite may have tens or even hundreds of such radiating elements or other output ports in an array antenna.FIG. 11may also include a reflector, such as821inFIG. 8. When a reflector is included, this arrangement forms an Array Fed Reflector Antenna (AFRA) and, when such a reflector is not included, it forms a Direct Radiating Antenna (DRA). In the embodiment ofFIG. 11, each of the radiating elements or other output ports1109a-1109fis connected to a corresponding one of the SSPAs1100a-1100fthrough a corresponding harmonic filter1105a-1105fand any other feed elements grouped collectively at807a-807f. Some or all of the paths can include a test coupler, such as shown at TC1111eand TC1111f. The test couplers TC1111eand TC1111fcan be used to monitor the output of SSPAs to provide feedback on the operation of the SSPAs1100eand1100ffor use in their biasing.

In the embodiment ofFIG. 11, the SSPAs can again be Doherty power amplifiers systems as described above with respectFIG. 9. Each of the arms of the Doherty power amplifier systems can have one or more amplifier stages, where, for multiple stages, the stages in each arm are connected in series. For higher power, an SSPA can use multiple Doherty power amplifiers connected in series, either on a common MMIC or separate MMICs. As described with respect toFIG. 9, the amplifies of each of the arms can be individually biased to provide the desired performance. For the beamforming case ofFIG. 11, the bias control circuits923and933also adjust the Vd, Id, and Vg, Ig value of each of the individual amplifiers of the Doherty power amplifier to achieve the satellite transponder's desired array taper in order to properly form the desired beams.

FIG. 12illustrates the effect on the output section of varying bias conditions. More specifically,FIG. 12is a plot of Pout vs. Pin and C/IM3 vs. Pin for two different sets of bias conditions, where C/IM3 is the carrier to third order intermodulation ratio, which is a common measure of signal efficiency. To minimize distortion for a specified output power, the C/IM3 value at the corresponding input power should be as low as can practically be obtained. A C/IM3 curve typically has local minimum, or dip. By adjusting to the bias conditions of the Doherty power amp, the local minimum of the C/IM3 curve can be shifted to locate this minimum at the Pin value corresponding to the desired Pout value, so that the distortion about this Pout value can be made as low as practical. Although the discussion here is given in terms of the C/IM3 value, other embodiments can adjust the bias values to optimize other signal characteristics.

FIG. 12illustrates a first Pout vs. Pin curve1201aand a second Pout vs. Pin curve1201band, for each of these curves, a corresponding C/IM3 vs. Pin curve1203aand1203b, respectively. The C/IM3 curves are commonly expresses as decibels relative carrier, or dBc, which is the power ratio of a signal to a carrier signal express in decibels and here are negative. Varying the bias conditions will alter the C/IM3 curve, where, generally, speaking, changes in the drain voltage (ΔVd) will move the C/IM3 curve up and down and changes in the gate voltage (ΔVg) move the C/IM3 curve sideways. By varying the bis conditions of the main arm of the Doherty amplifiers and varying the bias conditions of the auxiliary arm relative to the main arm, the width of the local minimum and other characteristics of the C/IM3 curve can be varied.

A discussed above with respectFIG. 6, the Pouta curve1201aand Poutb curve1201bare the combined output of the main arm and the auxiliary arm of the Doherty power amplifier. Below a threshold Pin value, which may be different in the two cases and can be adjusted based on the different sets of bias conditions, the contribution to Pout will only be from the main arm. Once Pin exceeds the corresponding threshold for a set of bias conditions, Pout will correspond to the combined output of both arms. In selecting the appropriate bias conditions, these are selected so that below the Pin threshold the main arm provides the desired behavior. The auxiliary arm's bias conditions are selected relative to the main arm's bias conditions so that for Pin values above the Pin threshold, the combined output of the two arms provide the desired output characteristics.

Pout vs. Pin curve1201ais an example of the bias conditions for a Doherty power amplifier optimized for efficiency around an output power level Pouta. The control circuit941would set these bias conditions based upon an output power level of Pouta being specified, obtaining the bias conditions from a look-up table stored in the memory943, for example. For curve1201a, the input power level corresponding to Pouta is Pina. The bias conditions are selected so that the local minimum of the corresponding C/IM3 is at Pina, so that the Doherty power amplifier's efficiency is optimized for Pouta. In some embodiments, the bias conditions can be selected to optimize the amplifier's response for a width of output power levels in addition to where the range is centered. By selecting bias levels for the main arm and bias conditions for the auxiliary arm to affect both the location of the local minimum for C/IM3 curve1203a, but also the relative width of the dip.

If the specified Pout value is subsequently changed, the control circuit941will change the bias conditions according to the new Pout value. For example, if the control circuit is requested to switch to an output power level around Poutb, the control circuit941selects the corresponding bias conditions resulting in Pout vs. Pin curve1201b, where the Pin value corresponding to Poutb is Pinb. The Doherty power amplifier is biased so that the local minimum of the corresponding C/IM3 curve1203bhas its local minimum at Pinb.

FIG. 13is a flow chart describing one embodiment of a process for adjusting the bias conditions of the output section for a desired output. At step1301, the RF input is received at the Doherty power amplifier. Referring to the embodiment ofFIG. 9, it is initially received at the quadrature generator901, where at step1303it is separated out into the out of phase components for the main and auxiliary arms. At step1305a first of the quadrature signals is amplified by the amplifying stages of the main arm, such a amplifiers903aand903binFIG. 9, to generate a first output signal. As discussed above with respect toFIG. 6, the amplifiers of the main arm will amplify the input signals even when their amplitude is below the threshold level at which the amplifiers of the auxiliary arm will kick in. At step1307the second of the quadrature signals is amplified by the amplifying stages of the auxiliary arm, such a amplifiers913aand913binFIG. 9, to generate a second output signal. The amplifiers of the auxiliary arm will amplify the input signals only when their amplitude is above the threshold level. Step1309combines the output of the two arms to generate the output signal for the full output of the Doherty power amplifier. As the original signal for the two arms were provided by the quadrature generator, the two arm's outputs can be put back in phase by use of a quarter wave line907, for example.

Steps1311,1313,1315and1317set the bias levels for the amplifying stages of the main arm and auxiliary arm. At step1311a request for a specified output is received, such as at the control circuit941ofFIG. 9. This can be the specification for the initial output signals used when the amplifier starts up or a request to subsequently change the output. For example, the request may be specifying a new output power level or other (or additional) output parameters (frequency, center and range of output power, etc.) or operating conditions. Step1313determines the bias levels corresponding to the requested output, such as be retrieving them from the memory943where are stored in a look-up table or other format, determining them by a set of algorithms or functional relationships, or monitoring of the amplifiers output, for example. Depending on the embodiment, this may be a single set of bias values for a requested power output level or range, or there may be multiple sets of bias values for a given power output to account for other specified output properties at this output power, such as low C/IM3 values. At step1315the bias levels are set on the main arm's amplifying stages according to the bias values determined at step1313for the specified output for a first output range (i.e., when the corresponding Pin is below the threshold value) for the first output. Step1317sets the bias levels on the auxiliary arm's amplifying stages according to the bias values determined at step1313so that the combined first and second output signals have the specified response over a second output range (i.e., when the corresponding Pin is above the threshold value).

As discussed above, the bias values corresponding a specified output can be determined by monitoring the output, by a set of algorithms or functional relations, or previously determining the bias values and storing these so that the Doherty power amplifier system can access them as needed.FIG. 14is a flow chart describing one embodiment of a process for determining bias values to use to provide a desired output.

FIG. 14begins at step1401with receiving the requested output parameters for the Doherty power amplifier design, such as a Pout value or range and properties for this output, such as having the C/IM3 curve having a local minimum at this Pout and perhaps how broad or sharp the C/IM3 curve is about the specified Pout value. In step1403, the bias levels on the amplifying stages of the main arm are varied to determine the values that best provide the desired output from the main arm when the Pin level is below the threshold at which the auxiliary arm contributes. At step1403, the bias levels on the amplifying stages of the auxiliary are arm are varied to determine the values that provide the desired combined output from both the auxiliary arm and the main arm when the Pin level is above the threshold at which the auxiliary arm contributes. Depending on the embodiment and the desired output, steps1403and1405may need to be iterated back and forth several times, or performed concurrently, where this may include varying the threshold before the output behavior is optimized for the specified parameters. Step1407determines whether bias conditions for more sets of output parameters are to be determined and, if so, the process loops back to step1401for these additional sets of output parameters. Once all the requested bias condition values are determined, at step1409the values are stored in the memory used by the Doherty power amplifier system, where they can be accessed when adjusting the bias levels, as in step1313ofFIG. 13.

In a first set of embodiments, a solid state amplifier includes an input port, an output, a main arm connected between the input port and the output port, and an auxiliary arm connected in parallel with the main arm between the input port and the output port. The main arm includes a first main amplifier stage configured to generate a first output signal from an input signal received from the input port. The auxiliary includes a first auxiliary amplifier stage configured to generate a second output signal by amplifying portions of the input signal received the input port having an amplitude above a threshold level. An input splitter is configured to receive the input signal and provide it to the main arm and the auxiliary arm. A combining circuit is configured to receive the first output signal and the second output signal, generate therefrom a combined output signal and provide the combined output signal to the output port. A first bias control circuit is connected to the first main amplifier stage and configured to bias the first main amplifier stage according to a corresponding first set of control signals, and a second bias control circuit is connected to the first amplifier stages and configured to bias the first auxiliary amplifier stage according to a corresponding second set of control signals. A control circuit is configured to generate the first and second sets of control signals, the first set of controls signals are configured to generate the first output signal to have a specified response over a first output range when the input signal has an amplitude below the threshold level, and the second set of control signals are configured relative to the first set of control signals to generate the combined first and second output signals to have the specified response over a second output range when the input signal has an amplitude above the threshold level.

Other embodiments present methods including receiving an input signal, generating by N main amplifying stages of a first output signal from the input signal, and generating by N auxiliary amplifying stages of a second output signal from the input signal. For N greater than one, the N main amplifying stages are connected in series. The auxiliary amplifier stages configured to generate the second output signal by amplifying portions of the input signal having an amplitude above a threshold level, and, for N greater than one, the N auxiliary amplifying stages are connected in series. The method also includes combining the first output signal and the second output signal to generate a combined output signal, receiving a first specification for the combined output signal, and individually biasing the main amplifying stages and the auxiliary amplifying stages to provide the combined output signal according to the first specification.

In another set of embodiments, a satellite includes multiple receive antennae and multiple transmit antennae. A plurality of solid state power amplifiers are coupled between the receive antennae and the transmit antennae, each of the solid state power amplifiers having a Doherty amplifier having a main arm, an auxiliary arm, and biasing circuity configured to independently bias the main arm and the auxiliary arm according to a set of control signals. A control circuit is configured to receive a specified power output for each of the Doherty amplifiers and provide a corresponding set of control signals to independently bias the main arm and the auxiliary arms according to the specified power output.