Visible light laser voltage probing on thinned substrates

The various technologies presented herein relate to utilizing visible light in conjunction with a thinned structure to enable characterization of operation of one or more features included in an integrated circuit (IC). Short wavelength illumination (e.g., visible light) is applied to thinned samples (e.g., ultra-thinned samples) to achieve a spatial resolution for laser voltage probing (LVP) analysis to be performed on smaller technology node silicon-on-insulator (SOI) and bulk devices. Thinning of a semiconductor material included in the IC (e.g., backside material) can be controlled such that the thinned semiconductor material has sufficient thickness to enable operation of one or more features comprising the IC during LVP investigation.

BACKGROUND

Laser Voltage Probing (LVP) is an optical tool for failure analysis and real time characterization and/or logic debugging of electrical signals propagating at operational speeds through an integrated circuit (IC). Conventional LVP systems rely on free carrier index changes and free carrier absorption within semiconductors. Infrared wavelengths are used to take advantage of silicon's relative transparency for backside probing. The incident light is reflected back, captured, detected, and amplified. The small modulations in reflected light intensity resulting from carrier density changes with electric field are utilized to determine local transistor logic states as a function of time.

With the continual reduction of IC feature sizes (e.g., a trace, a transistor, a CMOS transistor, a diode, a PN junction or other semiconductor component or device that transfers or conveys free carriers or conducting current, etc.), backside, laser-based failure analysis tools are limited in spatial resolution by the refraction limits of infrared light and the relatively long wavelengths required for through-silicon probing. Even with state of the art solid immersion lenses (SILs), modern 22 nanometer (nm) devices are at and past the limit of practical resolution for LVP systems utilizing infrared light.

SUMMARY

Various technologies presented herein relate to utilizing visible light for laser voltage probing (LVP) of an integrated circuit (IC). To enable visible light to pass through a backside of an IC and be incident upon one or more features included in the IC, a substrate of the IC can be thinned to enable probing of the feature(s) with the visible light via the backside of the IC, and further, enable reflection of the visible light from a surface of the feature(s) (back through the substrate) to a detector. The material forming the backside of the IC, e.g., a semiconductor, can be thinned to a thickness such that while the feature can be probed by the visible light, the IC can remain operational throughout the LVP operation. The thinned material can have a thickness so that the shorter, visible wavelengths can pass through the thinned material both in the incident and reflected directions.

Thinning of the semiconductor material can be controlled such that at least a portion of the insulating layer remains to enable operation of the IC during testing. Thinning (e.g., die thinning) of the semiconductor material can be performed by any suitable material removal technique. In a non-exhaustive list, such techniques include reactive ion-etching processing, focused ion beam (FIB), gas-assisted FIB, pulse laser-assisted etching, xenon difluoride (XeF2) etching, etc. Fabrication of the IC can be such that an insulating layer (e.g., a buried oxide (BOX) layer) has been formed over the one or more features included in the IC.

The semiconductor substrate material can be thinned and/or the insulating layer (if present) or it can be thinned to a thickness of about 2-4 microns (μm), of about 3-4 μm's, of about 2 μm's, of about 0.25 μm's, of about 60-70 nanometers, of about 5 nanometers, and/or a distance of 2-4 times a wavelength of the incident light, between an exposed surface of the semiconductor material and a surface of the feature. Further, the semiconductor material can be thinned to a minimum thickness at which the IC is still operational, and during which, the visible light (incident light and reflected light) can pass through the semiconductor material to enable LVP of the IC.

The visible light can be generated by a laser and have a wavelength of about 650 nanometers (nm), of about 510 nm, of about 475 nm, a value in a range of about 400-700 nm, or a value in a range of about 633-640 nm.

DETAILED DESCRIPTION

Various technologies pertaining to utilizing visible light in conjunction with a thinned structure to enable characterization of operation of one or more features included in an integrated circuit (IC), are now described with reference to the drawings, wherein like reference numerals are used to refer to like elements throughout. In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of one or more aspects. It may be evident, however, that such aspect(s) may be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form in order to facilitate describing one or more aspects.

As used herein, the terms “component” and “system” are intended to encompass computer-readable data storage that is configured with computer-executable instructions that cause certain functionality to be performed when executed by a processor. The computer-executable instructions may include a routine, a function, or the like. It is also to be understood that a component or system may be localized on a single device or distributed across several devices. The terms “component” and “system” are also intended to encompass hardware configured to cause certain functionality to be performed, where such hardware can include, but is not limited to including, Field-programmable Gate Arrays (FPGAs), Application-specific Integrated Circuits (ASICs), Application-specific Standard Products (ASSPs), System-on-a-chip systems (SOCs), Complex Programmable Logic Devices (CPLDs), etc.

Further, the term “or” is intended to mean an inclusive “or” rather than an exclusive “or”. That is, unless specified otherwise, or clear from the context, the phrase “X employs A or B” is intended to mean any of the natural inclusive permutations. That is, the phrase “X employs A or B” is satisfied by any of the following instances: X employs A; X employs B; or X employs both A and B. In addition, the articles “a” and “an” as used in this application and the appended claims should generally be construed to mean “one or more” unless specified otherwise or clear from the context to be directed to a singular form. Additionally, as used herein, the term “exemplary” is intended to mean serving as an illustration or example of something, and is not intended to indicate a preference.

As previously mentioned, as IC devices have reduced in size with an according reduction in feature sizes (e.g., a trace, a transistor, a CMOS transistor, a diode, a PN junction or other semiconductor component or device that transfers or conveys free carriers or conducting current, etc.), conventional backside, laser-based failure analysis tools utilizing longer wavelength light (e.g., infrared) have become limited in their ability to resolve spatial resolution owing to refraction limits of the light and the relatively long wavelengths required for through-silicon probing.

The various embodiments presented herein address the spatial resolution limit when utilizing infrared light, wherein one or more embodiments utilize LVP with electromagnetic waves having a shorter wavelength, e.g., light waves in the visible wavelength portion of the electromagnetic spectrum. In one or more embodiments, thinning (e.g., backside thinning, backside ultra-thinning, ultra-thinning, etc.) of a semiconductor material (e.g., in a silicon on insulator (SOI) device) is utilized. The semiconductor material of the device is thinned to a sufficient extent such that shorter, visible wavelengths can be used for LVP analysis, thus enabling improved spatial resolution and enhanced LVP signals, when compared to an infrared based LVP system.

FIG. 1illustrates a system100, whereby the system100can be a LVP system configured to utilize electromagnetic radiation from the visible portion of the electromagnetic spectrum to analyze at least one IC.

The system100includes a light source110configured to generate and emit light115onto an IC device120, wherein the light115has a wavelength in the visible portion of the electromagnetic spectrum. At least one feature125a-nis included in the IC device120, where n is an integer greater than one. As shown, the light115is incident upon a surface of a respective feature125a-n, e.g., feature125b, and is reflected from the surface (e.g., surface126b) of the feature125b. The system100further comprises a detector140, which is located to detect (capture) the reflected light135being reflected from the feature125b. The detector140is configured to generate a test signal150based upon the reflected light135(e.g., via electro-optical conversion). The system100also comprises a processing unit160, which includes a processor161and memory162, where the memory162comprises instructions that are executed by the processor161. The processing unit160receives the test signal150generated by the detector140.

The system100also comprises a spectrum analyzer163and an oscilloscope164, which are in communication with the processing unit160. In an embodiment, the processing unit160forwards the test signal150to the spectrum analyzer163, and the spectrum analyzer163can generate a laser voltage image that shows particular features in the IC120based upon a particular criteria. For example, a laser voltage image can be presented where only those transistors that are switching at 10 MHz are shown (e.g., as a bright region on the laser voltage image) and all other regions of the IC undergoing LVP are dark. In another embodiment, the processing unit160supplies the test signal150to the oscilloscope164. The oscilloscope164can create a waveform (using averaging techniques) that is indicative of a waveform of an electrical signal passing through the IC120during the LVP operation.

In an embodiment, the memory162includes a base signal170. In response to the test signal150being received at the processing unit160, the processing unit160is further configured to compare the test signal150(e.g., as a laser voltage image or as a waveform) with the base signal170. The base signal170can be a signal captured for a known operation of the IC120and features125a-n. For example, the base signal170was captured during an LVP operation conducted on an IC having a known structure, operation, performance, etc., wherein comparison of the test signal150with the base signal170enables operation of the IC120and features125a-nto be established and any further troubleshooting to be undertaken based thereon, e.g., to determine whether any of the features125a-n(e.g., a transistor) is defective. The base signal170can also be derived from a design file, or other suitable source.

As shown inFIG. 1, the IC device120can comprise a layer of semiconductor material180, which, in an embodiment, the semiconductor material180can be silicon-based. Depending upon how the IC device120has been fabricated, the semiconductor material can be processed such that there is a silicon substrate181in which an insulating layer182has been formed. For example, the insulating layer182is a buried oxide (BOX) layer formed between the layer of semiconductor material180and the plurality of features125a-n. The semiconductor material180can be thinned in one or more regions183a-183nfrom an original thickness O to a thinned thickness T. As shown, the thinned regions183a-183ncan have a width such that a plurality of features (e.g., features125a-d) are able to be exposed to the light115or a single feature (e.g., feature125n) is able to be exposed to the light115.

The thickness T can be a function of a wavelength of the light115being utilized to illuminate the device120. For example, if the light115is from the red portion of the visible spectrum (e.g., having a wavelength in a range of about 620-750 nm), T≈about 3-4 μm's. In another example, if the light115is from the green portion of the visible spectrum (e.g., having a wavelength in a range of about 495-570 nm), T≈about 2 μm's. In a further example, if the light115is from the blue portion of the visible spectrum (e.g., having a wavelength in a range of about 450-495 nm), T≈about 5 nm's. Removal of material from the semiconductor can be controlled such that T has a thickness such that it is transparent to the incident light115, and further, the reflected light135is able to pass through the thinned semiconductor material such that the reflected light135received at the detector140has an intensity that it is possible to discern an effect (e.g., modulation) imparted on the light incident (e.g., incident light115) at the feature125as a result of interaction with the feature125and an electrical signal passing therethrough. Further, while enabling transmission (e.g., of the incident light115) and reflection (e.g., of the reflected light135) of light through the thinned semiconductor material, the thickness T of the thinned semiconductor material is sufficient to enable operation of the IC device120during respective transmission/reflection of the light115and135. It is possible to thin the semiconductor material to as little as 60-70 nanometers (nm) and still have sufficient material to enable operation of the IC120during testing. Hence, the only limit to the thickness of the semiconductor material at regions183a-183nis there is sufficient semiconductor material for the IC120to remain functional during the LVP operation.

The system100also comprises a signal source190and a clock191, where the signal source190can generate an electrical signal192based upon the clock191. The electrical signal192can be any signal suitable to enable testing of the IC device120, e.g., the electrical signal192can be a clocked signal, a square wave, a sine wave, etc. The electrical signal192can be applied to the IC device120, e.g., to power the one or more features125a-n. For example, the feature125acan be a transistor, such that as the transistor125ais being powered by the electrical signal192, an associated change in the electrical signal192and/or the transistor125aresulting from operation of the transistor125aduring application of the electrical signal192can affect the intensity, waveform, etc., of the reflected light135as a result of the operation of the transistor125aaffecting the incident light115. For example, during application of the electrical signal192at the transistor125a, optical absorption of generated free carriers and or changes in refractive index due to the presence of free carriers125acreates a modulation between the incident light115and the reflected light135. In an embodiment, the processing unit160can determine a local transistor logic state at the transistor125a, as a function of time, based upon the modulations. Thus, real time logic debugging of an electrical signal192propagating at an operational speed(s) through the IC120can be achieved. The modulation of the incident light115by one or more effects engendered at the feature125acauses the reflected light135to have at least one characteristic different to the incident light, e.g., the reflected light135has a different amplitude, waveform, magnitude, etc., to the incident light115.

With reference to the detector140, any suitable detector can be utilized, such as a silicon-based detector, a photodiode, a silicon-based photodiode, and avalanche photodiode (APD), photo-multiplier tube, etc. For example, the detector140can be an APD, wherein the APD can be a high gain, low noise APD.

The light source110can be any suitable device, such as a laser emitting light at a desired wavelength, e.g., red light, green light, blue light, etc., wherein the light can be collimated. For example, a helium-neon (HeNe) laser operating at 633 nm, 5 millwatts (mW), with approximately 500 microwatts (μW) power on the feature surface126. In an embodiment, the IC device120can be a buffer amplifier on a 350 nm technology operating at with an electrical signal of 3.3 volts (V).

The detector140can generate the test signal150, and suitable circuitry (not shown) can amplify the test signal150prior to the processing unit160receiving the test signal150. In an embodiment, the processing unit160can utilize a spectrum analyzer163to analyze the test signal150. In a first embodiment, the processing unit160can be configured (e.g., in conjunction with the spectrum analyzer163, or any other frequency discriminating device, e.g., a lock in amplifier) to identify a harmonic (e.g., a primary harmonic) in the test signal150, wherein the harmonic can be present as a spectral peak in the test signal150resulting, for example, from the clocking frequency of the clock utilized to generate the electrical signal192. The processing unit160in conjunction with the spectrum analyzer163can be further utilized for imaging of the IC120and features125a-n, e.g., laser voltage imaging (LVI), with the visible light115. During such imaging, the spectrum analyzer163can be configured with a zero span set at a frequency of the spectral peak, as previously identified.

Thinning (e.g., die thinning) of the semiconductor180, from an original thickness O to a thinned thickness T, to form the thinned regions183a-ncan be performed by any suitable material removal technique. In a non-exhaustive list, such techniques include reactive ion-etching processing, focused ion beam (FIB), gas-assisted FIB, pulse laser-assisted etching, xenon difluoride (XeF2) etching, etc. In an embodiment, a coarse material removal technique can be initially utilized with a fine material removal technique being applied as a final stage operation to achieve thinning of the semiconductor material180to the desired thickness T. In a further embodiment where the semiconductor layer180comprises a silicon semiconductor layer181and an insulating layer182, the thinning operation can be configured such that the semiconductor layer181is preferentially removed by the thinning operation, while the insulating layer182is resistant to the thinning operation, therein enabling removal of only the semiconductor layer181with retention of the insulating layer182. In another embodiment the semiconductor layer180and a portion of the insulating layer182can be removed until a desired thickness of insulating layer182remains. A process for removal and thinning of the semiconductor layer181can comprise a milling process, followed by a pulse laser tool, and finally a reactive ion-etch to achieve the desired thickness.

The various components and devices included in the system100(or a portion thereof) can be incorporated into a laser scanning microscope. Further, the light source110can operate in conjunction with operation of the spectrum analyzer163and the oscilloscope164, wherein the light source110can be scanned over the feature125during generation of a laser voltage image, and can be pointed at a particular location (e.g., feature125a) and obtain a test signal150from the detector140when the light source is utilized in a spot manner.

It is to be appreciated that while not shown a plurality of lenses can be utilized with the system100. For example, while system100is illustrated with no lens present in the light path(s) of incident light115and/or reflected light135(e.g., operating with an air gap), any suitable lens can be utilized, such as an oil immersion lens, a solid immersion lens (SIL), etc. Hence, the system can be designed in accordance with a desired resolution, D, per eqn. 1:

where D is the minimum resolution limit of two points, λ is the wavelength of the light being utilized in the LVP process, and NA is the numerical aperture of a microscope objective.

FIGS. 2 and 3illustrate exemplary methodologies relating to utilizing visible light to determine operation of an IC device. While the methodologies are shown and described as being a series of acts that are performed in a sequence, it is to be understood and appreciated that the methodologies are not limited by the order of the sequence. For example, some acts can occur in a different order than what is described herein. In addition, an act can occur concurrently with another act. Further, in some instances, not all acts may be required to implement the methodologies described herein

FIG. 2illustrates a methodology200for performing a LVP operation on an IC, wherein the LVP operation utilizes light from the visible portion of the electromagnetic spectrum. At210, visible light is transmitted onto one or more features located in an IC. In an embodiment, the visible light is transmitted from a laser. The one or more features are covered with a layer of material included in the IC, e.g., a layer of semiconductor material such as silicon, wherein the semiconductor layer may include an insulating layer (e.g., a BOX layer). The layer of semiconductor material has been thinned from an original thickness to a thickness through which the visible light can travel from the laser to a surface of each feature in the one or more features that is visible to the light and the device remains functional.

At220, an electrical signal is applied to the IC and the one or more features located in the IC. The electrical signal can be a clocked signal having a square wave profile. One or more interactions can occur between the light incident upon a feature and the electrical signal passing through it, wherein any light reflected from the surface of a feature undergoes modulation based in part upon the one or more interactions.

At230, the reflected light is captured at a detector, wherein the detector is configured to generate a test signal based upon the reflected light, e.g., via optoelectronic conversion.

At240, test signal can be received at a processing unit, wherein the processing unit can be configured to compare the test signal with a previously captured base signal. The base signal can be a signal captured for a known operation of the IC and features, for example, the base signal was captured during an LVP operation conducted on an IC having a known structure, operation, performance, etc. The base signal can also be obtained from a design file, or other suitable source. Comparison of the test signal with the base signal enables operation of the IC under test to be established and any further troubleshooting to be undertaken based thereon, e.g., determine whether any of the features included in the IC is defective.

At250, an indication of operation of the IC, and included features, can be generated, wherein the indication can be a visual signal (e.g., a light), a data packet transmitted to another component which can act upon information contained in the data packet, presented on a display (e.g., with a defective feature such as a defective transistor identified).

FIG. 3illustrates a methodology300for thinning a portion of an IC to facilitate examination with a LVP operation utilizing visible light. At310, a wavelength of visible light for application in a LVP process is identified. For example, the visible light is generated by a laser and has a wavelength of 633 nm (e.g., the laser emits red light).

At320, a thickness of material to remain on an IC after a thinning operation is performed is determined, wherein the material can be semiconductor material located on a backside of the IC (e.g., bulk silicon). The material to be thinned is located over a feature in the IC (e.g., a transistor), or across the entire IC, and the thickness of the material after thinning is such that a thinned portion of the material allows passage of the visible light through the portion of thinned material to the feature beneath. Further, the portion of material is thinned to enable passage of visible light reflected from a surface of a feature to pass through the thinned material and to be captured at a detector. For example, the thinned material has a thickness to enable double-through or round-trip transmission of the visible light through the thinned material. At an original thickness, the bulk silicon can absorb, refract, or reflect such a volume of the visible light during transmission to, and reflection from, the surface of the feature such that no discernible measure of any interaction(s) between the visible light incident upon the feature and an electrical signal at the feature can be discerned. However, by thinning the portion of material, the remaining material has a thickness that is sufficiently transparent to the visible light (e.g., incident light and reflected light) passing therethrough, and further the visible light retains any modulation imparted upon it during interaction with an electrical signal at the feature during an LVP operation.

At330, the material is thinned to obtain the portion of thinned material having the determined thickness. The thinned material can have a thickness that is less than the determined thickness, the thickness can be such that the IC remains operational during the LVP operation. Any suitable process can be utilized to thin the material, where such processes include reactive ion-etching processing, FIB, gas-assisted FIB, pulse laser-assisted etching, XeF2etching, etc. Upon completion of the thinning operation, the IC can now be examined using the visible light-based LVP process.

Referring now toFIG. 4, a high-level illustration of an exemplary computing device400that can be used in accordance with the systems and methodologies disclosed herein is illustrated. For instance, the computing device400can be utilized to enable characterization of operation of one or more features included in an IC, wherein the IC has been thinned to facilitate LVP with visible light. For example, computing device400can operate as the processing unit160. The computing device400includes at least one processor402that executes instructions that are stored in a memory404. The instructions may be, for instance, instructions for implementing functionality described as being carried out by one or more components discussed above or instructions for implementing one or more of the methods described above. The processor402may access the memory404by way of a system bus406. In addition to storing executable instructions, the memory404may also store operating parameters, required operating parameters, and so forth.

The computing device400additionally includes a data store408that is accessible by the processor402by way of the system bus406. The data store408may include executable instructions, operating parameters, required operating parameters, etc. The computing device400also includes an input interface410that allows external devices to communicate with the computing device400. For instance, the input interface410may be used to receive instructions from an external computer device, from a user, etc. The computing device400also includes an output interface412that interfaces the computing device400with one or more external devices. For example, the computing device400may display text, images, etc., by way of the output interface412.