DIGITAL FRONT END SUPER PATHS

A system can comprise a radio unit. The system can further comprise a group of antenna branches of the radio unit. The system can further comprise a group of digital front ends of the radio unit, wherein respective digital front ends of the group of digital front ends are configured to process data of respective antenna branches of the group of antenna branches. The system can further comprise a digital front end super path that is configured to select between the group of antenna branches, wherein the digital front end super path comprises a tap point at which data processed via the digital front end super path is able to be accessed.

BACKGROUND

A radio can comprise a receiver and a transmitter that are used to receive and transmit, respectively, data.

SUMMARY

An example system can operate as follows. The system can comprise a radio unit. The system can further comprise a group of antenna branches of the radio unit. The system can further comprise a group of digital front ends of the radio unit, wherein respective digital front ends of the group of digital front ends are configured to process data of respective antenna branches of the group of antenna branches. The system can further comprise a digital front end super path that is configured to select between the group of antenna branches, wherein the digital front end super path comprises a tap point at which data processed via the digital front end super path is able to be accessed.

An example method can comprise selecting, by a system comprising a processor, a first antenna branch from a group of antenna branches of a radio unit, wherein respective digital front ends of a group of digital front ends are configured to process data of respective antenna branches of the group of antenna branches. The method can further comprise, in response to selecting the first antenna branch, routing, by the system, data for the first antenna branch through a digital front end super path, wherein the digital front end super path is configured to selectively route data for antenna branches of the group of antenna branches.

An example apparatus can comprise a group of digital front ends of a radio unit, wherein respective digital front ends of the group of digital front ends are configured to process data of respective antenna branches of a group of antenna branches. The apparatus can further comprise a first digital front end that is configured to select between the group of antennas for processing of data via the first digital front end, wherein the first digital front end is separate from the group of digital front ends.

DETAILED DESCRIPTION

Overview

In modern wireless communications deployments, aspects and impacts of radio development engineering and system design tradeoffs can have far-reaching implications into customer capital expenditures, operating expenditures and overall completeness of a vendor's radio offerings. These engineering and systems design tradeoffs can result in what can be generally characterized as overall radio size, weight, thermal dissipation, reliability, complexity, and cost.

In a radio system, instrumentation of signal paths (e.g., disposing tap points within signal paths for injecting a signal or reading a signal) can be implemented to evaluating initial performance and operational performance of a radio system.

An ability to capture, analyze, and store frequency domain data and time domain data can facilitate performing system measurements and performance assessments. In production and in the field, tap points embedded within a digital front end (DFE) path of a radio system can provide access to complex sub-systems in digital domain circuitry.

A problem with embedding tap points in a radio system can be a large number of positions in which a tap point can be useful. There can be many paths within each antenna carrier instantiation of a radio system, and embedding tap points in all valuable positions can be a challenge. Similarly, reducing the number of subsystems accessible via a tap point can limit a fullness and extent of instrumentability.

A solution to these problems associated with instrumenting digital front end paths can involve implementing a digital front end super path, which, in some examples, can access a signal from any antenna branch of the radio system, and contain tap points so that that signal can be accessed at different positions within a digital front end signal chain.

The present techniques can be implemented to facilitate implementing custom tap points and instrumentation designed into a minimal number of digital front end paths, while also providing an ability to capture signal data.

In some prior approaches, custom tap points are not a part of a normal digital front end data path.

In some examples, the present techniques can be implemented to instrument some, but not all, digital front end path(s) of a radio system. In some examples, an instrumented digital front end path can have an antenna main path multiplexed to it, thereby becoming the main signal path for that antenna branch. This approach multiplexing and providing an instrumented digital front end path can be implemented for a down link signal path and/or an up link signal path.

Instrumented digital front end paths can have an ability to multiplex digital front end signals back off to their antenna path after being processed through a digital front end super path. That is, a signal can be multiplexed from a particular antenna path and into a digital front end super path, and then multiplexed back into that antenna path after passing through the digital front end super path (where multiplexing the signal back into the antenna path can route around that antenna path's normal digital front end).

In some examples, a digital front end super path (which can be referred to as an instrumented digital front end path) can maintain all of its signal processing configurations that can be found on non-instrumented main digital front end paths.

The present techniques can be implemented to facilitate full instrumentation of one, some, or all digital front end data paths of a radio system. In some examples, full instrumentation can be impractical. To overcome this problem, a digital front end super path can be implemented to create system injection and capture points while minimizing a complexity involved with doing so.

In some examples where there are N digital front ends, a digital front end super path can be added for N+1 total paths (or multiple—M—digital front end super paths can be added for N+M total paths). A digital front end super path can instantiate a full instrumented path that contains injection and capture tap points.

Tapped digital front end signaling can be routable from a digital from end super path to analysis and storage for the signal. In some examples, any antenna path can be multiplexed to or from a digital front end super path.

In some examples, a digital front end super path can be configurable to all (or any) digital configuration, which can copy possible digital configurations on any main live-air traffic paths (sometimes referred to as main mission mode paths). In some examples, a digital front end super path can carry a copy of any live-air path antenna path signal data, or temporarily replace data in a live-air path, and carry live-air path signal data while simultaneously furnishing instrumentation.

A digital front end super path can be used to branch data onto a non-official highway for further detailed analysis, capture, and/or storage.

In some examples, a digital front end super path can have a dedicated supervision path.

In some examples, multiplexing can comprise antenna path switching at a radio system-acceptable rate that is sufficient to facilitate accessing signals on different digital front end paths quickly.

In some examples according to the present techniques, there can be a need for custom signal injection. Custom signal injection can be facilitated by hardware accelerated signal data preconditioning for speed of processing and actuation. Digital front end super paths can reduce an overall dependence on digital signal processing fabric resources to transport and forward data within an overall set of digital front ends, as certain digital signal processing functions can be limited to a few fully-loaded super paths. The present techniques can be implemented to reduce complexity of digital front end blocks for main chains, where in some examples, only multiplexers are added. Digital front end super paths can provide for a greater complexity and more repeatability in performance.

Analog circuitry can have latency as a signal passes from block to block. For ease of comparison and hardware acceleration in a determination of radio performance, time alignment can be implemented to facilitate a precise alignment of a source signal and a signal that is captured. In some examples, the signal is not captured at an input, but can be a memory representation of the input signal.

EXAMPLE ARCHITECTURES

FIG.1A,FIG.1B, andFIG.1Cillustrate an example system architecture100for a down link chain of a radio system that can facilitate digital front end super paths, in accordance with an embodiment of this disclosure.

System architecture100can function as a down link signal path of a radio system, where signals from the down link signal path can be routed, or multiplexed, to a digital front end super path. As depicted, system architecture100comprises custom signal data memory, generation, masking, and buffer102(which can comprise a combination of some or all of a look up table, a pseudo-random look up table generator, a generator, a memory, an OR gate to combine data sources, masking, and a buffer), time alignment116, custom symbol resource bands/resource elements (RBs/REs)118, inverse Fast Fourier Transform (iFFT)120(which can also perform A gain, time alignment, and optional cyclic prefix (CP) insertion), RBs/REs122, iFFT/CP124, digital front end (DFE) block 1126, DFE block 2128, crest factor reduction (CFR)130, digital pre-distortion (DPD)132, delta-time-phase (ATO)134, adaptation and correlation 136, feedback receiver analog-to-digital converter (FBRx ADC)138, transmitter digital to-analog converter (Tx ADC)140, capture142, power amplifier144, signal coupler146, tap point148A, tap point148B, tap point148C, tap point148D, tap point148E, tap point148F (which can be accessed to capture a FBRx Signal IN), tap point148G (which can be accessed to capture a CFR OUT Signal), tap point select150, select152, signal data154, AND/OR156, hardware accelerated signal data pre-conditioning and memory158, optional FFT and CP removal162, analysis and fault detection164, radio optimization control and actuation166, storage170, custom symbol RBs/REs172, C-plane, M-plane, S-plane174, iFFT/CP176, DFE block 1178A, DFE block 2178B, DFE block N178C, DFE block N+1178D, transmitter digital-to-analog converter (Tx DAC)180, multiplexer182A, multiplexer182B, multiplexer182C, and multiplexer182D.

Multiplexer182C can comprise a multiplexer from alternate antenna branch paths to a super path that generally can comprise RBs/REs122. Multiplexer182D can comprise a multiplexer from the super path and back to alternate antenna branch paths.

Multiplexer182A can multiplex a signal on an antenna branch path further down that antenna branch path (e.g., to iFFT/CP176) and to multiplexer182C for possible multiplexing into a super path (e.g., to RBs/REs122). Multiplexer182B can multiplex a signal from a super path back into that antenna branch path (e.g., to Tx DAC180). In some examples, multiplexer182D can multiplex a signal from the super path back into any antenna branch that is accessible via multiplexer182D.

FIG.2A,FIG.2B, andFIG.2Cillustrate an example system architecture200for an up link chain of radio unit that can facilitate digital front end super paths, in accordance with an embodiment of this disclosure.

System architecture200can function as an uplink signal path of a radio system, where signals from the up link signal path can be routed, or multiplexed, to a digital front end super path. As depicted, system architecture200comprises time alignment216, RBs/REs222, FFT/CP224, DFE block N+1226, DFE block N228, digital front end (DFE) block 2230, DFE block 0232, capture242, tap point248A, tap point248B, tap point248C, tap point248D, signal data storage254, hardware accelerated signal data pre-conditioning and memory258, optional FFT and CP removal262, analysis and fault detection264, radio optimization control and actuation266, storage270, U-plane272, C-plane, M-plane, S-plane274, FFT/CP276, DFE block N+1278A, DFE block N278B, DFE block 1278C, DFE block 0278D, receiver analog-to-digital converter (Rx ADC)280, multiplexer282A, multiplexer282B, multiplexer282C, multiplexer282D, and custom symbol RBs/REs284.

Multiplexer282A can multiplex a signal on an antenna branch path further down that antenna branch path (e.g., to FFT/CP276) and to multiplexer282C for possible multiplexing into a super path (e.g., to RBs/REs222). Multiplexer282B can multiplex a signal from a super path back into that antenna branch path (e.g., to Tx DAC280). In some examples, multiplexer282D can multiplex a signal from the super path back into any antenna branch that is accessible via multiplexer282D.

FIG.3illustrates an example system architecture300for a digital front end super path in an antenna branch that comprises a down link path and an up link path, and that facilitate digital front end super paths, in accordance with an embodiment of this disclosure.

In an antenna branch such as depicted in system architecture300, a signal can be multiplexed in or out of a down link digital front end chain, via multiplexer374A and multiplexer374B. Similarly, a signal can be multiplexed in or out of an up link digital front end chain, via multiplexer374C and multiplexer374D.

FIG.4illustrates an example system architecture400that can facilitate digital front end super paths, in accordance with an embodiment of this disclosure. In some example, part(s) of system architecture400can be used to implement part(s) of system architecture100ofFIGS.1A-1C, system architecture200, and/or system architecture300ofFIG.3.

System architecture400comprises radio unit402; group of antenna branches404; group of digital front ends406; digital front end super path408; and tap point410. In some examples, respective digital front ends of group of digital front ends406are configured to process data of respective antenna branches of group of antenna branches404. In some examples, digital front end super path408is configured to select between group of antenna branches404, wherein digital front end super path408comprises tap point410at which data processed via digital front end super path408is able to be accessed.

In some examples, group of antenna branches404can comprise a group of antenna branches of a radio system. In some examples, group of digital front ends406can be similar to corresponding digital front ends to the group of antenna branches of the radio system. Digital front end super path408can be similar to a super path as depicted in system architecture100, and/or system architecture200. Tap point410can be similar to tap point148A, and/or tap point248A.

In the example of system architecture400, there are N antennas and a corresponding number of digital front ends. There is also at least one digital front end super path, which can multiplex to and from any of the antenna branches of the N antennas.

In some examples, digital front end super path408is a main signal path for a selected antenna branch of group of antenna branches404. That is, an instrumented digital front end super path can have an antenna main paths multiplexed to it, and thereby become the main signal path for that antenna branch.

In some examples, digital front end super path408is configured to, after selecting and processing data from a first antenna branch of group of antenna branches404, select and process data from a second antenna branch of group of antenna branches404. That is, in some examples, multiplexing can have antenna path switching at a system-acceptable rate between antenna branches.

In some examples, accessing the data processed via digital front end super path408at tap point410comprises reading the data processed via digital front end super path408. In some examples, accessing the data processed via digital front end super path408at tap point410comprises writing at least some of the data processed via digital front end super path408. That is, the tap point can be a tap point from which data is read, or a tap point to which data is injected.

In some examples, digital front end super path408comprises a down link signal path. In some examples, digital front end super path408comprises an up link signal path. That is, multiplexing and instrumenting a digital front end super path can be implemented for a down link path and/or an up link path.

FIG.5illustrates another example system architecture500that can facilitate digital front end super paths, in accordance with an embodiment of this disclosure. In some example, part(s) of system architecture400can be used to implement part(s) of system architecture100, system architecture200, and/or system architecture300ofFIG.3.

System architecture500comprises group of digital front ends502; and first digital front end that is configured to select between the group of antennas for processing of data via the first digital front end504. In some examples, group of digital front ends502can be part of a radio unit, and respective digital front ends of group of digital front ends502can be configured to process data of respective antenna branches of a group of antenna branches. In some examples, first digital front end504is separate from group of digital front ends502.

In some examples, group of digital front ends502can be similar to group of digital front ends406ofFIG.4. In some examples, first digital front end504can be similar to digital front end super path408ofFIG.4.

In some examples, first digital front end504comprises a fully instrumented path that comprises an injection tap point and a capture tap point.

A fully instrumented path can be a signal path in a radio unit that has an ability to capture or inject signals at predetermined tap point, where this ability is not generally found in normal digital front end data paths.

That is, a fully instrumented path can have instrumentation tap points to inject or capture signal before and after passing through a transfer function as dictated by the setup of a digital front end chain.

In some examples, instrumentation of mixed signal digital and radio frequency design can be defined by common reference as the instruments such as: signal generators, signal analyzers (e.g., vector signal analyzers), power detectors, BaseBand digital signal injection and capture, BaseBand protocol and link emulators, channel emulators and faders, voltage and current detectors, and memory and storage devices.

In some examples, first digital front end504is configurable to each digital configuration associated with respective digital front ends of group of digital front ends502. That is, a digital front end super path can be configurable to digital configuration copying of some or all digital configurations on main live-air paths.

In some examples, first digital front end504comprises a dedicated supervision path. That is, a digital front end super path can have a dedicated supervision path.

In some examples, first digital front end504is configured to carry a copy of any live-air path antenna path signal data of the group of antenna branches. In some examples, first digital front end504is configured to temporarily replace a live-air path and carry live live-air path signal data concurrently with furnishing instrumentation of the first digital front end. That is, in some examples, a digital front end super path can carry a copy of any live-air path antenna path signal data, or temporarily replace a live-air path and carry live live-air signal data while simultaneously furnishing instrumentation.

EXAMPLE PROCESS FLOWS

FIG.6illustrates an example process flow600that can facilitate digital front end super paths, in accordance with an embodiment of this disclosure. In some examples, one or more embodiments of process flow600can be implemented by system architecture100, system architecture200, and/or system architecture300ofFIG.3.

Process flow600begins with602, and moves to operation604.

Operation604depicts selecting a first antenna branch from a group of antenna branches of a radio unit, wherein respective digital front ends of a group of digital front ends are configured to process data of respective antenna branches of the group of antenna branches. In some examples, the group of antenna branches can be similar to group of antenna branches404ofFIG.4

After operation604, process flow600moves to operation606.

Operation606depicts, in response to selecting the first antenna branch, routing data for the first antenna branch through a digital front end super path, wherein the digital front end super path is configured to selectively route data for antenna branches of the group of antenna branches. In some examples, the digital front end super path can comprise digital front end super path408ofFIG.4

In some examples, the digital front end super path comprises a first group of signal processing configurations, wherein respective digital front ends of the group of digital front ends each maintain a respective second group of signal processing configurations, and wherein the first group of signal processing configurations matches the second group of signal processing configurations. That is, in some examples, an instrumented digital front end super path can maintain all of the signal processing configurations that are found on the non-instrumented main digital front end paths.

FIG.7illustrates an example process flow700that can facilitate digital front end super paths, in accordance with an embodiment of this disclosure. In some examples, one or more embodiments of process flow700can be implemented by system architecture100, system architecture200, and/or system architecture300ofFIG.3.

Process flow700begins with702, and moves to operation704.

Operation704depicts routing data for a first antenna branch through a digital front end super path. In some examples, operation704can be implemented in a similar manner as operation606ofFIG.6.

After operation704, process flow700moves to operation706.

Operation706depicts accessing the data for the first antenna branch via a tap point located within the digital front end super path. In some examples where the digital front end super path is similar to digital front end super path408ofFIG.4, data passing through the digital front end super path can be accessed via tap point410.

In some examples, the tap point is a first tap point, and wherein the group of digital front ends omits a second tap point. That is, it can be that tap points (or particular tap points at certain positions relative to a signal chain) are located only in the digital front end super path, and not in the other digital front ends, so as to reduce a number of tap points implemented for a radio system while still ensuring full instrumentation of a digital front end signal path.

FIG.8illustrates an example process flow800that can facilitate digital front end super paths, in accordance with an embodiment of this disclosure. In some examples, one or more embodiments of process flow800can be implemented by system architecture100, system architecture200, and/or system architecture300ofFIG.3.

Process flow800begins with802, and moves to operation804.

Operation804depicts accessing data for a first antenna branch via a tap point located within a digital front end super path. In some examples, operation804can be implemented in a similar manner as operation704ofFIG.7.

After operation804, process flow800moves to operation806.

Operation806depicts storing the read data. That is, data read via a tap point of a digital front end super path can be stored within a radio system, such as for later analysis.

FIG.9illustrates an example process flow900that can facilitate digital front end super paths, in accordance with an embodiment of this disclosure. In some examples, one or more embodiments of process flow900can be implemented by system architecture100, system architecture200, and/or system architecture300ofFIG.3.

Process flow900begins with902, and moves to operation904.

Operation904depicts accessing data for a first antenna branch via a tap point located within a digital front end super path. In some examples, operation904can be implemented in a similar manner as operation704ofFIG.7.

After operation904, process flow900moves to operation906.

Operation906depicts analyzing the read data. That is, data read via a tap point of a digital front end super path can be analyzed, such as to determine a performance metric of a radio system.

FIG.10illustrates an example process flow1000that can facilitate digital front end super paths, in accordance with an embodiment of this disclosure. In some examples, one or more embodiments of process flow1000can be implemented by system architecture100, system architecture200, and/or system architecture300ofFIG.3.

Process flow1000begins with1002, and moves to operation1004.

Operation1004depicts routing data for a first antenna branch through a digital front end super path. In some examples, operation1004can be implemented in a similar manner as operation606ofFIG.6.

After operation1004, process flow1000moves to operation1006.

Operation1006depicts routing the data for the first antenna branch from the digital front end super path to a first digital front end of the group of digital front ends that corresponds to the first antenna branch after the data for the first antenna branch has been processed through the digital front end super path. That is, digital front end super path multiplexing can be performed after a signal passes through the digital front end super path to return the signal to its original antenna branch.

CONCLUSION

In the subject specification, terms such as “datastore,” data storage,” “database,” “cache,” and substantially any other information storage component relevant to operation and functionality of a component, refer to “memory components,” or entities embodied in a “memory” or components comprising the memory. It will be appreciated that the memory components, or computer-readable storage media, described herein can be either volatile memory or nonvolatile storage, or can include both volatile and nonvolatile storage. By way of illustration, and not limitation, nonvolatile storage can include ROM, programmable ROM (PROM), EPROM, EEPROM, or flash memory. Volatile memory can include RAM, which acts as external cache memory. By way of illustration and not limitation, RAM can be available in many forms such as synchronous RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), Synchlink DRAM (SLDRAM), and direct Rambus RAM (DRRAM). Additionally, the disclosed memory components of systems or methods herein are intended to comprise, without being limited to comprising, these and any other suitable types of memory.