Two-temperature trimming for a voltage reference with reduced quiescent current

In an example method of trimming a voltage reference circuit, the method includes: setting the circuit to a first temperature; trimming a first resistor (RDEGEN) of a differential amplifier stage of the circuit; and trimming a first resistor (R1) of a scaling amplifier stage of the circuit. The trimming equalizes current flow through the differential amplifier stage and the scaling amplifier stage. The method includes: trimming a second resistor (R2) of the scaling amplifier stage to set an output voltage of the circuit to a target voltage at the first temperature; setting the circuit to a second temperature; and trimming a second resistor (RPTAT) of the differential amplifier stage, a third resistor (R1PTAT) of the scaling amplifier stage, and a fourth resistor (R2PTAT) of the scaling amplifier stage to set the output voltage of the circuit to the target voltage at the second temperature.

TECHNICAL FIELD

This description relates to voltage reference circuits, and more particularly to techniques for two-temperature trimming of voltage reference circuits with reduced quiescent current.

BACKGROUND

Precision voltage reference circuits are designed to provide a voltage output that is reliably accurate and stable over a specified temperature range, compared to the voltage provided by a conventional power supply. These voltage reference circuits are useful in many applications, including environment sensing applications and medical applications, where relatively small or weak signals need to be measured, which requires higher resolution analog to digital converters (ADCs) that operate from an accurate and stable voltage source. Also, many of these applications are implemented as battery powered, portable, or remote devices, and thus power consumption is a concern. As such, relatively low quiescent current is often specified as a requirement for a given voltage reference circuit.

SUMMARY

In an example method of trimming a voltage reference circuit, the method includes: setting the circuit to a first temperature; trimming a first resistor (RDEGEN) of a differential amplifier stage of the circuit; and trimming a first resistor (R1) of a scaling amplifier stage of the circuit. The trimming equalizes current flow through the differential amplifier stage and the scaling amplifier stage. The method includes: trimming a second resistor (R2) of the scaling amplifier stage to set an output voltage of the circuit to a target voltage at the first temperature; setting the circuit to a second temperature; and trimming a second resistor (RPTAT) of the differential amplifier stage, a third resistor (R1PTAT) of the scaling amplifier stage, and a fourth resistor (R2PTAT) of the scaling amplifier stage to set the output voltage of the circuit to the target voltage at the second temperature.

DETAILED DESCRIPTION

Techniques are described herein for two-temperature trimming of voltage reference circuits with low quiescent current draw. As described above, many applications require precision voltage reference circuits that can provide a voltage output that is reliably accurate and stable over a specified temperature range, compared to the voltage provided by a conventional power supply. Also, many of these applications are implemented as battery powered, portable, or remote devices, which require reduced or otherwise efficient power consumption and thus lower quiescent current (Iq) draw.

Accordingly, low Iq voltage reference circuitry is described herein, along with a methodology for two-temperature trimming of the voltage reference circuit to reduce output voltage variability over temperature. In some embodiments, the two-temperature trimming process may be performed as part of the manufacturing process, such as during a final test stage of the voltage reference circuit. In some embodiments, the voltage reference circuit is implemented as an integrated circuit (IC), either as a stand-alone or dedicated voltage reference circuit, or as part of an overall broader circuit (e.g., such as an ADC).

The voltage reference circuit is useful in a wide variety of applications, such as sensors and ADCs, particularly when employed in battery powered or remote devices. More generally, the described techniques are useful for any systems which require an accurate and stable voltage source that consumes relatively low power.

In this description, a voltage reference circuit includes a differential amplifier stage and a scaling amplifier stage. The differential amplifier stage, which is configured to generate a control signal to control the scaling amplifier stage, includes a first resistor (feedback degeneration resistor—RDEGEN) and a second resistor (through which current flow is proportional to absolute temperature—RPTAT). The scaling amplifier stage is coupled to the differential amplifier stage and configured to generate a reference voltage at an output port of the voltage reference circuit based on a scaled version of the control signal. The scaling amplifier stage includes a number of scaling resistors: a first resistor (R1); a second resistor (R2); a third resistor (R1PTAT); and a fourth resistor (R2PTAT). Resistors RDEGENand R1are configured to be trimmed or adjusted to equalize current flow through the differential amplifier stage and the scaling amplifier stage, at a first temperature. Resistor R2is configured to be trimmed to set the output port voltage to the reference voltage at the first temperature. Resistors RPTAT, R1PTAT, and R2PTATare configured to be trimmed to set the output port voltage to the reference voltage at a second temperature, as described below.

Also, in this description, a method for trimming the voltage reference circuit includes setting the circuit to a first temperature; trimming the first resistor (RDEGEN) of the differential amplifier stage of the circuit and trimming the first resistor (R1) of the scaling amplifier stage of the circuit to equalize current flow through the differential amplifier stage and the scaling amplifier stage. The method also includes trimming the second resistor (R2) of the scaling amplifier stage to set the output voltage of the circuit to a target voltage at the first temperature. The method includes setting the circuit to a second temperature and trimming the second resistor (RPTAT) of the differential amplifier stage and the third and fourth resistors (R1PTATand R2PTAT) of the scaling amplifier stage to set the output voltage of the circuit to the target voltage at the second temperature, as described below.

The techniques described herein may provide improved two-temperature trimming, compared to existing voltage references that require additional circuit components (particularly additional active components such as transistors that consume current, even in a quiescent state) to perform temperature trimming operations. Also, the described voltage reference circuit does not require additional pinouts to perform the trimming operations, thus maintaining footprint compatibility with industry standard products, simplifying manufacturing, and reducing cost. The described voltage reference circuitry can thus provide an accurate and temperature stable output voltage with reduced Iq operation.

General Overview

FIG.1is a top-level block diagram100of a system for two-temperature trimming of a voltage reference. The block diagram100shows the trimming system110, the voltage reference (Vref) circuit130, and a temperature controller190. In some embodiments, the Vref circuit130may be implemented as an IC. Trimming system110is configured to provide trim control messages120to the Vref circuit130, to adjust trimming resistors of the Vref circuit130, as described below. Trimming control is based in part on the output voltage (Vout)140of the Vref circuit130, which is provided as feedback to the trimming system110. Trimming system110is also configured to provide temperature controls180to the temperature controller190to raise and/or lower the temperature of the Vref circuit130for each stage of the trimming process.

The Vref circuit130includes a test/trim control circuit150, a first stage differential amplifier160, and a second stage scaling amplifier170. The operation of these circuits is described below, but at a high level, the first stage differential amplifier160and second stage scaling amplifier170are configured to transform an input voltage Vdd132, provided at input pin134, to an output voltage Vout140, provided to output pin138. The output voltage Vout140should be relatively near the desired target reference voltage and should be relatively stable over the operating temperature range of the voltage reference circuit130. The test/trim circuit150is configured to decode trim control messages120, provided to the IC as a serial bit stream through enable pin136, and perform any actions needed to trim one or more resistors of the Vref circuit130responsive to those messages.

In some embodiments, the test/trim control circuit150includes a processor and/or control logic and memory. The processor or control logic can decode the trim control messages to extract an identifier of the resistor to be trimmed and a trimming value to be used. After the resistor is trimmed to a desired value, that value may be stored in the memory, so the resistor trimming value can be refreshed at a future time if needed. In some embodiments, the processor is configured to recognize an activation code which signals that additional bits transmitted through the enable pin are to be interpreted as resistor trimming messages. The activation code can serve as a password to limit use of the test/trim control circuit150, so an end user of the circuit does not change the trimming values.

FIG.2is a graph200that illustrates improvement in output voltage stability over temperature at each stage of the trimming process. The ideal (or target) reference voltage is shown as dotted line210, which is constant over the operating temperature range of the voltage reference circuit. However, initial testing of the device after fabrication may show that the output voltage follows a curve260which has an offset from the target voltage210and exhibits a slope over the temperature range. This can occur for any number of reasons, such as imperfections in the fabrication process, component tolerances, and other reasons. The two-temperature trimming process is employed to reduce the offset and slope. The first operation,240, of the two-temperature trimming process, sets the temperature of the Vref circuit to T1220, and then trims a first set of resistors, of the Vref circuit, to scale the output voltage to the target reference voltage210at temperature T1. This first trimming operation is also referred to herein as accuracy trimming. Temperature T1is also referred to as the pivot temperature, or Tpivot. The result is shown as curve270, in which the slope remains, but the offset has been removed. Next, at operation250, the temperature of the Vref circuit is adjusted to T2230, and a second set of resistors, of the Vref circuit, are trimmed to scale the output voltage to the target reference voltage210at temperature T2, without inducing any additional shift in the output voltage at temperature T1. The effect is to remove the slope of the curve270or pivot that curve about the Tpivot temperature point. This second trimming operation is also referred to herein as slope trimming. The resulting curve280substantially aligns with the target reference voltage curve210. In some embodiments, temperature points T1and T2may be selected based on the operational temperature range of the Vref circuit. Although curves260,270, and280are shown as straight lines for simplicity of illustration, in practice those lines have some relatively small degree of curvature (such as inFIG.6). In some embodiments, this curvature, due to second order effects, may be corrected through additional techniques.

Circuit Architecture

FIG.3is a schematic diagram of a voltage reference circuit130. The first stage differential amplifier160includes a first p-channel metal oxide semiconductor field effect transistor (PFET) P1300, a second PFET P2305, a first n-channel metal oxide semiconductor field effect transistor (NFET) N1315, a second NFET N2320, a degeneration resistor RDEGEN345, and a current-flow-proportional-to-absolute-temperature resistor RPTAT375.

The second stage scaling amplifier170includes a third PFET P3310and scaling resistors R2330and R1365.

Transistors N1and N2are input transistors for the differential amplifier stage, and transistor P1and P2are load transistors for the differential amplifier stage. Transistor P3is the input transistor for the scaling amplifier stage and is driven by a control signal, the output of the differential amplifier, which is coupled to the gate of P3as shown. Also, the output of the scaling amplifier stage connects back to the differential amplifier input at the gate of N2, creating a feedback loop that sets the voltage at the gate of N2equal to the source to gate voltage of N1plus the gate to source voltage of N2plus the voltage drop across RPTAT.

In some embodiments, transistors P1, P2, P3and N2are standard voltage threshold transistors, having a voltage threshold of +600 millivolts (mV) within +/−10%, and transistor N1is a natural voltage threshold transistor, having a voltage threshold of −200 mV within +/−10%. A voltage threshold gap, VTgap, is the difference between the gate voltage of N1and the gate voltage of N2, which can be expressed as the sum of VSgNAT350and VgsSVT355.

As described below, R2is configured to provide accuracy trimming at Tpivot by adjusting Vscale335, the voltage difference between Vout140and the gate voltage of N2. Likewise, RPTATis configured to provide slope trimming at T2by adjusting VPTAT380, the voltage difference between the gate of N1and ground. These trimming operations are described herein with reference to the circuit diagram ofFIG.3as follows.

As shown in the circuit diagram, the current flowing through RDEGEN, IPTAT340, can be expressed as:

IP⁢T⁢A⁢T=(Vs⁢g⁢N⁢A⁢TRD⁢E⁢G⁢E⁢N),
and the current flowing through R1, IVTgap360, can be expressed as:

IV⁢T⁢g⁢a⁢p=(IP⁢T⁢A⁢T*RP⁢T⁢A⁢T+V⁢Tg⁢a⁢pR1),
and the voltage Vout can be expressed as a sum of the voltages VPTAT380, VsgNAT350, VgsSVT355, and Vscale335:
VOUT=VPTAT+VsgNAT+VgsSVT+Vscale
The expression for Vout can thus be rewritten as:

VO⁢U⁢T=(Vs⁢g⁢N⁢A⁢T⁢RP⁢T⁢A⁢TRD⁢E⁢G⁢E⁢N+V⁢Tg⁢a⁢p)*(1+R2R1)
The first operation in the two-temperature trimming process is to trim RDEGENand R1, so IPTATis set equal to RDEGEN. This results in the following condition:

IV⁢T⁢g⁢a⁢p=(V⁢Tg⁢a⁢pR1-RP⁢T⁢A⁢T)
After the currents are equalized (to within a selected tolerance), R2330can be trimmed by an accuracy trimming value325to provide the initial accuracy adjustment for Vout at the Tpivot temperature, so Vout is adjusted to the target reference voltage. Then, at the T2temperature, RPTAT375can be trimmed by slope trim value370to readjust Vout at the new temperature and provide the slope adjustment. Also, R1is also trimmed by the same slope trim value370. Because IPTATand IVTgaphave been equalized, the trimming of R1by the same value as RPTATprevents a change in IVTgapat the Tpivot temperature due to the change in RPTAT. Finally, R2is trimmed by the negative of the slope trim value370. Because IVTgaphas no change, this trimming of R2cancels out any shift in Vout at the Tpivot temperature that would have otherwise resulted from the change in RPTAT.

An example of the effects of the two-temperature trimming process on the Vref circuit (for example, at temperatures 90° C. and 27° C.) is described below:1. Set temperature to Tpivot (90° C.)2. Adjust RDEGENand R1, so IPTATequals IVTgap

=(V⁢Tgap@90∘⁢C.R1-RP⁢T⁢A⁢T*RP⁢T⁢A⁢T+V⁢Tgap@90∘⁢C.)*(R1+R2R1)=VTgap@90∘⁢C.*(R1+R2R1-RP⁢T⁢A⁢T)=Vreftarget4. Change temperature to T2(27C)5. Adjust RPTATby ΔR to move Vout to target Vref
Vout@27° C.=VreftargetHowever, this will also move Vout@90° C.:

FIG.4is a detailed schematic diagram of the voltage reference circuit130, ofFIG.3, configured in another embodiment. In this example, an additional resistor R2PTAT400is coupled in series with resistor R2330, and an additional resistor R1PTAT410is coupled in series with resistor R1. Accordingly, resistor R1ofFIG.3is configured as two resistors, R1and R1PTAT, and resistor R2ofFIG.3is configured as two resistors R2and R2PTAT.

In the above description of the Vref circuit130, in association withFIG.3, resistors R1and R2were trimmed twice, first at temperature Tpivot and then again at temperature T2. The first adjustments were made to equalize currents and perform accuracy trimming at temperature Tpivot, while the second adjustments were made to ensure that Vout at Tpivot does not change after RPTATis trimmed at temperature T2.

However, based on the additional detail shown inFIGS.4, R1and R2are each adjusted only once, at temperature Tpivot (to equalize currents and perform accuracy trimming). Subsequent adjustments, to ensure that Vout at Tpivot does not change after RPTATis trimmed at temperature T2, are performed by trimming resistors R1PTATand R2PTATat temperature T2. In some embodiments, resistors R1PTATand R2PTATare configured to lock trimming of these resistors to the trimming of resistor RPTAT. For example, if RPTATis trimmed by ΔR (for slope trimming370), then R1PTATis also trimmed by ΔR, and R2PTATis trimmed by −ΔR. Accordingly, if RPTATand R1PTATare increased by ΔR, then R2PTATis reduced by ΔR.

The more detailed schematic diagramFIG.4also illustrates that the Vref circuit130is configured to allow for the determination of equalized current flow (IRDEGENand IVTgapthrough the differential amplifier stage and the scaling amplifier stage, respectively), by monitoring Vout140. Repurposing an existing pin (output pin138) for this purpose avoids the need to add an additional pin to the IC to detect current equalization, and thus reduces cost and complexity. Additional components are shown to enable this feature, including current nulling resistors RINULL1440and RINULL2460, along with switch SW450. RINULL1and RINULL2are substantially equal in resistance value. Accordingly, if currents IPTATand IVTgapare equalized, then the voltage across the switch SW will be zero, irrespective of whether the switch is open or closed. Thus, if no change is detected in Vout when the switch SW is toggled between open and closed states, it can be determined that the currents are equalized. In some embodiments, the switch can be controlled in the same manner as resistance trimming, through the application of a message formatted as serial bit stream provided through enable pin136, such as trim control message120.

FIG.5is a detailed schematic diagram of the voltage reference circuit130ofFIG.3, configured in yet another embodiment. The above described embodiments ofFIGS.3and4have field effect transistors (FETs) in the amplifier stages. The alternative embodiment ofFIG.5illustrates that bipolar junction transistors (BJTs) may be used instead of FETs. The first stage differential amplifier includes BJTs Q1505, Q2510, Q3515, and Q4520arranged in a Brokaw bandgap cell configuration, where the base ports of Q1and Q2are coupled through a resistor Rb540. Also, the second stage scaling amplifier employs BJT Q5530as an alternative to a FET.

In this embodiment, Vout can be expressed as:

Methodology

FIG.6illustrates a methodology600for two-temperature trimming of the voltage reference circuit ofFIG.4or5. As shown, example method600includes a number of phases and sub-processes, the sequence of which may vary from one embodiment to another. However, when considered in aggregate, these phases and sub-processes form a process for two-temperature trimming, in certain of the embodiments described herein, such as illustrated inFIGS.1-4, as described above. However, other system architectures can be used in other embodiments. Accordingly, the correlation of the various functions shown inFIG.6to the specific components illustrated in the drawings does not imply any structural and/or use limitations. Instead, other embodiments may include varying degrees of integration, in which multiple functions are effectively performed by one system.

In one embodiment, the process begins at operation610, by setting the temperature of the Vref circuit to Tpivot. At operation620, the switch SW450is closed, and the output voltage140is measured as Vout(on). At operation630, the switch SW450is opened, and the output voltage140is measured as Vout(off).

At operation640, Vout(off) is compared to Vout(on). If they differ (to within a selected tolerance), then methodology600determines that the current flowing through RINULL1440is not equal to the current flowing through RINULL2460. In that case, at operation645, null current trimming (inull trimming420,430) is performed by adjusting RDEGEN345and R1365, and the process repeats at operation620until Vout(off) equals Vout(on).

Otherwise, when Vout(off) and Vout(on) are substantially equal, methodology600determines the currents are also substantially equal, and IPTAT340equals IVTgap360. The process then continues, at operation650, with accuracy trimming325in which R2330is adjusted until Vout substantially equals the target Vref (to within a selected tolerance). At operation660, the trim settings for RDEGEN345, R1365, and R2330are locked, and the voltage output at temperature Tpivot is fixed. In some examples, trim settings may be locked by saving the values in a memory of the test/trim circuit150.

Next, at operation670, the temperature of the Vref circuit is set to T2. At operation680, slope trimming370is performed by adjusting RPTAT375, R1PTAT410, and R2PTAT400until Vout again substantially equals the target Vref (to within a selected tolerance). At operation690, the trim settings for RPTAT, R1PTAT, and R2PTATare also locked, so the voltage output at temperature T2is fixed, and the process is completed.

Simulation Results

FIG.7illustrates simulation results700showing output voltage stability over temperature for the voltage reference circuit ofFIG.3after two-temperature trimming. Each curve of the Vref circuit simulation results710shows variance of the output voltage140from the target reference voltage210, which in this example is 2.5 volts. As shown, the variance reaches a minimum at the two-temperature settings Tpivot220(90° Celsius) and T2230(25° Celsius). Within that temperature range (25° to 90°), the variance is less 2 mV. Outside of that temperature range (greater than 90° or less than 25°), the variation increases to as much as 4 mV at 124° and 15 mV at −40°.

Example Applications

FIG.8illustrates one example application800of the voltage reference circuit ofFIG.3,4or5. The illustrated example is a portable device, such as a battery powered handheld measurement device. The battery810is configured to provide power to the Vref circuit130(as Vdd132), a sensor820, a processor840, and a display device850. The Vref circuit130is configured to provide an accurate and stable reference voltage Vout140for use by the sensor820and an ADC830, which may be required for small signal measurements. Because the device is handheld and battery powered, the relatively low Iq provided by the described Vref130is also beneficial in this application. The sensor820is configured to generate an analog measurement signal825which is converted into a digital signal by ADC830to be supplied to the processor840. The processor may then manipulate the signal by performing any suitable signal processing functions, such as averaging, filtering, etc., and then provide results for visual display.

FIG.9illustrates another example application900of the voltage reference circuit ofFIG.3,4or5. The illustrated example is an industrial plant process monitoring application, in which a processing condition is monitored by a sensor910in the plant or field960, and the measurements920are transmitted back to a control room970. The measurements are transmitted using a current loop950. in which the message is encoded in a current signal that ranges from 4 milliamps (mA) to 20 mA. A power source940is configured to provide power to a voltage regulator905, which is configured to provide a voltage (Vdd132) to the Vref circuit130and to the sensor910. The Vref circuit130is configured to provide an accurate and stable reference voltage Vout140for use by the sensor910and the 4-20 mA signal transmitter930. The power source940is configured to provide a coarse voltage that drives the 4-20 mA current loop950, while the 4-20 mA transmitter930is configured to modulate the current flow through the loop950with relatively high accuracy.

On the control room side970, a 4-20 mA receiver980is configured to decode the message from the received current in the current loop950. The decoded message, which represents the sensor measurement920, is then passed to a display or process controller990for further control of the industrial process.

FURTHER EXAMPLE EMBODIMENTS

Example 1 is an integrated circuit (IC) including: a differential amplifier stage configured to generate a control signal, the differential amplifier stage including a first resistor (RDEGEN) and a second resistor (RPTAT); and a scaling amplifier stage coupled to the differential amplifier stage and configured to generate a reference voltage at an output port of the IC based on the control signal, the scaling amplifier stage including a first resistor (R1) and a second resistor (R2). RDEGENand R1are trimmable to set current flow through the differential amplifier stage and the scaling amplifier stage, at a first temperature. R2is trimmable to set a voltage at the output port to the reference voltage, at the first temperature. RPTATis trimmable to set the voltage at the output port to the reference voltage, at a second temperature.

Example 2 includes the subject matter of Example 1. The scaling amplifier stage includes a third resistor (R1PTAT) coupled in series to R1and a fourth resistor (R2PTAT) coupled in series to R2. R1PTATand R2PTATare trimmable to set the voltage at the output port to the reference voltage at the second temperature.

Example 3 includes the subject matter of Example 2. A trim value for R1PTATis set to a trim value for RPTATand a trim value of R2PTATis set to a negative of the trim value of RPTAT.

Example 4 includes the subject matter of any one of Examples 1 through 3. Example 4 includes a switch (SW) configured to provide a connection between the differential amplifier stage and the scaling amplifier stage, responsive to toggling the switch from an open state to a closed state, in which the voltage at the output port varies responsive to the toggling of the switch to indicate that the current flow through the differential amplifier stage differs from the current flow through the scaling amplifier stage.

Example 5 includes the subject matter of any one of Examples 1 through 4. The differential amplifier stage includes: a first transistor (N1); a second transistor (N2); and a third resistor (RINULL1). A first terminal of RDEGENis coupled to a source terminal of N1and to a source terminal of N2. A second terminal of RDEGENis coupled to a gate terminal of N1and to a first terminal of RPTAT. A second terminal of RPTATis coupled to a first terminal of RINULL1and to a first terminal of SW. A second terminal of RINULL1is coupled to ground.

Example 6 includes the subject matter of any one of Examples 1 through 5. The scaling amplifier stage includes: a transistor (P3); and a fifth resistor (RINULL2). A first terminal of R2is coupled to a drain terminal of P3and to the output port. A second terminal of R2is coupled to a first terminal of R2PTAT. A second terminal of R2PTATis coupled a gate terminal of N2and to a first terminal of R1. A second terminal of R1is coupled to a first terminal of R1PTAT. A second terminal of R1PTATis coupled to a second terminal of SW and to a first terminal of RINULL2. A second terminal of RINULL2is coupled to ground.

Example 7 includes the subject matter of Example 6, in which N1is an NFET having a gate-to-source voltage threshold within a range of −220 millivolts to −180 millivolts, and P3is a PFET having a gate-to-source voltage threshold within a range of +540 millivolts to +660 millivolts.

Example 8 includes the subject matter of any one of Examples 1 through 7, in which RDEGENand R1are trimmable to equalize the current flow through the differential amplifier stage and the scaling amplifier stage at the first temperature.

Example 9 is a method for trimming a voltage reference circuit. The method includes: setting the voltage reference circuit to a first temperature; trimming a first resistor (RDEGEN) of a differential amplifier stage of the voltage reference circuit and trimming a first resistor (R1) of a scaling amplifier stage of the voltage reference circuit, the trimming to set current flow through the differential amplifier stage and the scaling amplifier stage; trimming a second resistor (R2) of the scaling amplifier stage to set an output voltage of the voltage reference circuit to a target voltage at the first temperature; setting the voltage reference circuit to a second temperature; and trimming a second resistor (RPTAT) of the differential amplifier stage to set the output voltage of the voltage reference circuit to the target voltage at the second temperature.

Example 10 includes the subject matter of Example 9, and includes: trimming a third resistor (R1PTAT) of the scaling amplifier stage by a trim value of RPTAT; and trimming a fourth resistor (R2PTAT) of the scaling amplifier stage by a negative of the trim value of RPTAT.

Example 11 includes the subject matter of Example 9 or 10, and includes: toggling a switch between an open state and a closed state, in which the closed state provides a connection between the differential amplifier stage and the scaling amplifier stage; and determining that the current flow through the differential amplifier stage differs from the current flow through the scaling amplifier stage based on detection of a change in the output voltage responsive to the toggling.

Example 12 includes the subject matter of any one of Examples 9 through 11, and includes: trimming RDEGENand R1to equalize the current flow through the differential amplifier stage and the scaling amplifier stage at the first temperature.

Example 13 includes the subject matter of any one of Examples 9 through 12, and includes selecting the first temperature and the second temperature based on an operational temperature range of the voltage reference circuit.

Example 14 includes the subject matter of any one of Examples 9 through 13, in which the first temperature is higher than the second temperature.

Example 15 is a measurement system including: a voltage reference circuit configured to provide a reference voltage based on an input voltage; a sensor coupled to the voltage reference circuit, the sensor configured to provide an analog measurement signal responsive to the reference voltage; and an analog to digital converter (ADC) configured to convert the analog measurement signal into a digital signal responsive to the reference voltage. The voltage reference circuit includes a differential amplifier stage configured to generate a control signal. The differential amplifier stage includes a first resistor (RDEGEN) and a second resistor (RPTAT). A scaling amplifier stage is coupled to the differential amplifier stage and is configured to generate the reference voltage at an output port of the circuit based on the control signal. The scaling amplifier stage includes a first resistor (R1) and a second resistor (R2). RDEGENand R1are trimmable to set current flow through the differential amplifier stage and the scaling amplifier stage, at a first temperature. R2is trimmable to set a voltage at the output port to the reference voltage, at the first temperature. RPTATis trimmable to set the voltage at the output port to the reference voltage, at a second temperature.

Example 16 includes the subject matter of Example 15, in which the input voltage is a battery voltage.

Example 17 includes the subject matter of Example 15 or 16, in which the scaling amplifier stage includes a third resistor (R1PTAT) coupled in series to R1and a fourth resistor (R2PTAT) coupled in series to R2. R1PTATand R2PTATare trimmable to set the voltage at the output port to the reference voltage at the second temperature.

Example 18 includes the subject matter of Example 17, in which a trim value for R1PTATis set to a trim value for RPTAT, and a trim value of R2PTATis set to a negative of the trim value of RPTAT.

Example 19 includes the subject matter of any one of Examples 15 through 18, in which the voltage reference circuit includes a switch (SW) configured to provide a connection between the differential amplifier stage and the scaling amplifier stage, responsive to toggling the switch from an open state to a closed state, and the voltage at the output port varies responsive to the toggling of the switch to indicate that the current flow through the differential amplifier stage differs from the current flow through the scaling amplifier stage.

Example 20 includes the subject matter of any one of Examples 15 through 19, in which the differential amplifier stage includes: a first transistor (N1); a second transistor (N2); and a third resistor (RINULL1). A first terminal of RDEGENis coupled to a source terminal of N1and to a source terminal of N2. A second terminal of RDEGENis coupled to a gate terminal of N1and to a first terminal of RPTAT. A second terminal of RPTATis coupled to a first terminal of RINULL1and to a first terminal of SW. A second terminal of RINULL1is coupled to ground.

Example 21 includes the subject matter of Example 20, in which the scaling amplifier stage includes: a transistor (P3); and a fifth resistor (RINULL2). A first terminal of R2is coupled to a drain terminal of P3and to the output port. A second terminal of R2is coupled to a first terminal of R2PTAT. A second terminal of R2PTATis coupled a gate terminal of N2and to a first terminal of R1. A second terminal of R1is coupled to a first terminal of R1PTAT. A second terminal of R1ptatis coupled to a second terminal of SW and to a first terminal of RINULL2. A second terminal of RINULL2is coupled to ground.

Example 22 includes the subject matter of Example 21, in which N1is an NFET having a gate-to-source voltage threshold within a range of −220 millivolts to −180 millivolts, and P3is a PFET having a gate-to-source voltage threshold within a range of +540 millivolts to +660 millivolts.

Example 23 includes the subject matter of any one of Examples 15 through 22, in which RDEGENand R1are trimmable to equalize the current flow through the differential amplifier stage and the scaling amplifier stage at the first temperature.