Apparatus and method for reordering sequence indicated information units into proper sequence

An apparatus and method for reordering sequence indicated information units into proper sequence are described. The apparatus includes a double-back shifter receiving sequence indicated information units, and at least one circuit coupled to the double-back shifter to repetitively compare, reorder and shift the sequence indicated information units so as to be in proper sequence when shifted out of the double-back shifter. The method includes repetitively comparing, reordering and shifting sequence indicated information units in a double-back shifter so as to be in proper sequence when shifted out of the double-back shifter.

FIELD OF THE INVENTION

The present invention generally relates to techniques for sorting sequential information into proper sequence and in particular, to an apparatus and method for reordering sequence indicated information units into proper sequence.

BACKGROUND OF THE INVENTION

Certain applications require received information units to be sorted into proper sequence. For example, where the information units had been transmitted in proper sequence, but received out of sequence, then it is commonly necessary to resort or reorder the information units back into their proper sequence. Although there are numerous sorting algorithms commonly available for sorting sequence indicated information units in the software domain, in certain applications, an efficient and simple to implement hardware solution is desirable to meet system performance requirements.

OBJECTS AND SUMMARY OF THE INVENTION

Accordingly, it is an object of the present invention to provide an easily implemented apparatus for reordering sequence indicated information units into proper sequence.

Another object is to provide a high performance apparatus for reordering sequence indicated information units into proper sequence.

Another object is to provide a reliable apparatus for reordering sequence indicated information units into proper sequence.

Another object is to provide a method for reordering sequence indicated information units into proper sequence that results in high performance operation when implemented in hardware.

These and additional objects are accomplished by the various aspects of the present invention, wherein briefly stated, one aspect of the invention is an apparatus for reordering sequence indicated information units into proper sequence. The apparatus includes a double-back shifter receiving sequence indicated information units, and at least one circuit coupled to the double-back shifter to repetitively compare, reorder and shift the sequence indicated information units so as to be in proper sequence when shifted out of the double-back shifter. In a preferred embodiment, the double-back shifter includes two rows of storage units configured such that an output of one row is shifted into the other row as input and the two rows shift their stored contents in opposite directions.

In another aspect, a method for reordering sequence indicated information units into proper sequence, comprises: repetitively comparing, reordering and shifting sequence indicated information units in a double-back shifter so as to be in proper sequence when shifted out of the double-back shifter. The sequence indicated information units being compared and the associated sequence indicated information units that are being reordered in light of such comparison depend upon the mode of operation of the method. The mode of operation is preferably determined by: whether a double shift or single shift method is employed; the number of columns shifted during each shift; whether the comparing, reordering and shifting are performed in a single operation; and whether the incoming sequence indicated information units are a limited or continuous stream of information units.

Additional objects, features and advantages of the various aspects of the present invention will become apparent from the following description of its preferred embodiment, which description should be taken in conjunction with the accompanying drawings.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

One important example of an application employing the present invention is in a synchronous optical network (“SONET”) or synchronous digital hierarchy (“SDH”) network element such as the SONET or SDH network element partially depicted inFIG. 1. In this application, information units in the form of cells or payloads are stored in an outgoing buffer102of a source101for transmission to an incoming buffer104of a destination103through a distributed switch fabric including representative switch slices105˜109.

Although it is advantageous for the switch slices to operate asynchronously, such asynchronous operation increases the likelihood that the cells will arrive out of sequence at the incoming buffer104. For example, different delays in transit from the outgoing buffer102to the incoming buffer104may result from clock differences between switch slices in the distributed switch fabric, as different cells take different routes through the distributed switch fabric. For example, one cell might be transmitted through switch slice105having a certain clock frequency while another cell might be transmitted through switch slice106having a slightly higher or lower clock frequency than that of switch slice105. If the switch fabric is included in a multi-shelf system, then additional differences in transit delays may also result from different switch slices being located on different shelves in the system.

To avoid such problems with asynchronous systems, a synchronous or common clock system may be employed in the SONET NE. Such synchronous systems, however, are generally much more complicated to implement and therefore, much more expensive to manufacture than a corresponding asynchronous system. Synchronous systems are particularly more difficult to implement in a multi-shelf system. They are also prone to be less reliable than corresponding asynchronous systems, because of their added complexity.

Accordingly, the present invention is particularly useful in facilitating a multi-shelf distributed switch fabric including asynchronously operating switch slices in a SONET or SDH network element. It is therefore noted that the following description and claimed aspects of the present invention are applicable to synchronous optical networks (SONET), synchronous digital hierarchy (SDH) networks, as well as other applications. As for SONET and SDH networks, the term SONET, as used herein, shall be understood to include both SONET and SDH to simplify the following description and claims.

FIG. 2illustrates, as an example, a block diagram of portions of a SONET network element including an apparatus identified as cell reorder unit200. The cell reorder unit200reorders the received information units stored in incoming buffer104into proper sequence according to sequence information included in the received information units. The reordered information units may then be sent directly to other circuitry in the destination103for continued processing.

FIG. 3illustrates, as an example, a block diagram of one version of a cell reorder unit or apparatus200for reordering sequence indicated information units into proper sequence, employing a single column, double shift mode of operation. A first plurality of serially coupled storage units (including representative storage units201˜206) function as a first shifter responsive to an upper row enable signal SEN1, and a second plurality of serially coupled storage units (including representative storage units207˜212) function as a second shifter responsive to a lower row enable signal SEN2. Each of the storage units (e.g.,201˜212) is capable of storing an information unit such as, in this case, a sequence indicator, a source indicator, a payload location pointer, and a valid entry indicator for a SONET payload or cell.

A last storage unit206of the first plurality of serially coupled storage units is coupled to a first storage unit207of the second plurality of serially coupled storage units so that an information unit shifted out of the storage unit206is shifted into the storage unit207. Coupled together in this fashion, the first and second pluralities of serially coupled storage units function and are referred to herein as a double-back shifter. For convenience in the following description and claims, the first plurality of serially coupled storage units (including representative storage units201˜206) is referred to herein as a first shifter or a top or upper row of the double-back shifter, and the second plurality of serially coupled storage units (including representative storage units207˜212) is referred to as a second shifter or a bottom or lower row of the double-back shifter. A key feature of the double-back shifter is that the top row shifts in one direction (e.g., from right to left in this example), and the bottom row shifts in an opposite direction (e.g., from left to right in this example). The operation mode in this example is referred to as being a double shift, because the top and bottom rows of the double-back shifter are shifted independently and at different times.

Compare and reorder logic, comprising, in this example, a plurality of compare and reorder elements or circuits (including representative elements213˜218), is also included in this version of the cell reorder unit200. Each compare and reorder element is coupled to a corresponding pair of storage units from the first and second pluralities of serially coupled storage units. The corresponding pairs are generated by pairing storage units in a shifting order (e.g.,201˜206) of the first plurality of serially coupled storage units with storage units in a reverse shifting order (e.g.,212˜207) of the second plurality of serially coupled storage units. For example, in the double-back shifter configuration depicted inFIG. 3, the corresponding pairs are formed by corresponding positions of the first and second rows (i.e., storage cells in a same column of the two rows).

Each of the plurality of compare and reorder elements functions to read and compare sequence information included in information units stored in its corresponding pair, and reorder the information units into their proper sequence if the comparison indicates that the information units are out of sequence, are valid information units, and are from the same source.

The plurality of compare and reorder elements perform their function following each shift of the top and bottom row of the double-back shifter. After stored information units are alternately shifted in the top and bottom rows, and processed following each shift by the plurality of compare and reorder elements, the information units are eventually found reordered into proper sequence by the time they are completely shifted out of the second row of the double-back shifter.

To illustrate the operation of the reorder cell unit200in a single column, double shift mode of operation for a limited stream of incoming information units, FIGS.4˜7are now described.FIG. 4illustrates, for this simplified example, sequence indicators that are included in information units stored in a 4-cell outgoing buffer102of the source101. As previously described, these information units are then transmitted to an incoming buffer104of the destination103through the distributed switch fabric including representative switch slices105˜109.FIG. 5illustrates sequence indicators included in the received information units as stored in a 4-cell incoming buffer104of the destination103. Note that the information unit stored in storage unit504has arrived out of sequence in this example, having arrived before information units stored in storage units502and503rather than after those units as it was supposed to.

FIGS. 6A˜6Nillustrate, as examples, the sequence indicators of the information units and their locations in various stages of their processing by theFIG. 3version of the cell reorder unit200. InFIG. 6A, the information units stored in the incoming buffer104are shown shifted into the top row of the double-back shifter from the incoming buffer104. The top row comprising serially coupled storage cells601˜604, in this example, also has a length of 4-cells for convenience in this description, although generally it would be longer to account for skew and other considerations in the system. InFIG. 6B, contents of the first row are shown as each being shifted one storage unit to the left, except the contents of the last storage unit604, which is shown being shifted into the first storage unit605of the second row. InFIG. 6C, contents of the first and second rows are shown after the compare and reorder element609has performed its function. In particular, the compare and reorder element609has read the sequence information in its corresponding pair of storage units,604and605, and determined that they are out of sequence since the sequence indicator1in this case should be before the sequence indicator3. As a result, the compare and reorder element609has reordered or swapped the contents of storage units604and605in this case so that they are placed in the proper sequence. Compare and reorder elements610,611and612have not performed any reordering since storage units606,607,601and608, in this example, are presumed to contain invalid information units, and the compare and reorder elements609˜612only process valid information units from the same source.

InFIG. 6D, contents of the second row are shown being shifted one storage unit to the right. InFIG. 6E, contents of the first and second rows are shown after the compare and reorder element610has performed its function. In particular, the compare and reorder element610has read the sequence information in its corresponding pair of storage units,603and606, and determined that they are in sequence since the sequence indicator1in this case is and should be before the sequence indicator2. As a result, the compare and reorder element610has left the contents of storage units603and606alone since they are already in the proper sequence. Meanwhile, compare and reorder elements609,611and612have not performed any reordering since storage units605,607,601and608, in this example, are presumed to contain invalid information units.

InFIG. 6F, contents of the first row are shown as each being shifted one storage unit to the left again, except the contents of the last storage unit604, which is shown being shifted into the first storage unit605of the second row. InFIG. 6G, contents of the first and second rows are shown after the compare and reorder elements609and610have performed their functions. In particular, the compare and reorder element609has read the sequence information in its corresponding pair of storage units,604and605, and determined that they are out of sequence since the sequence indicator2in this case should be before the sequence indicator3. As a result, the compare and reorder element609has reordered or swapped the contents of storage units604and605in this case to be in the proper sequence, so that the information unit having the sequence indicator3is now in storage unit604and the information unit having the sequence indicator2is now in storage unit605. Meanwhile, the compare and reorder element610has read the sequence information in its corresponding pair of storage units,603and606, and determined that they are in sequence since the sequence indicator1in this case is and should be before the sequence indicator4. As a result, the compare and reorder element610has left the contents of storage units603and610alone since they are already in the proper sequence. Meanwhile, compare and reorder elements611and612have not performed any reordering since storage units601,602,607and608, in this example, are presumed to contain invalid information units.

InFIG. 6H, contents of the second row are shown being shifted one storage unit to the right. InFIG. 6I, contents of the first and second rows are shown after the compare and reorder element610has performed its function. In particular, the compare and reorder element610has read the sequence information in its corresponding pair of storage units,603and606, and determined that they are in sequence since the sequence indicator2in this case is and should be before the sequence indicator4. As a result, the compare and reorder element610has left the contents of storage units603and606alone since they are already in the proper sequence. Meanwhile, compare and reorder elements609,611and612have not performed any reordering since storage units605,602,601and608, in this example, are presumed to contain invalid information units.

InFIG. 6J, contents of the first row are shown as each being shifted one storage unit to the left, except the contents of the last storage unit604, which is shown being shifted into the first storage unit605of the second row. InFIG. 6K, contents of the first and second rows are shown after the compare and reorder element609has performed its function. In particular, the compare and reorder element609has read the sequence information in its corresponding pair of storage units,604and605, and determined that they are in sequence since the sequence indicator3in this case is and should be before the sequence indicator4. As a result, the compare and reorder element609has left the contents of storage units604and605alone in this case since they are already in the proper sequence. Meanwhile, compare and reorder elements610,611and612have not performed any reordering since storage units603,602,601and608, in this example, are presumed to contain invalid information units.

InFIG. 6L, contents of the second row are shown being shifted one storage unit to the right again. InFIG. 6M, contents of the first and second rows are shown unchanged this time after the compare and reorder elements609˜612have performed their functions. In this case, no reordering has been performed by any of the compare and reorder elements, because storage units605,603,602and601, in this example, are presumed to contain invalid information units. InFIG. 6N, contents of the first and second rows are shown after the information unit stored in the last storage unit604in the first row has been shifted into the first storage unit605of the second row. The information units contained in storage units605˜608of the second row are now in proper sequence.FIG. 7then illustrates the sequence indicators being in proper sequence for the information units that have been shifted out of the second row of the double-back shifter.

Although the example described above in reference toFIGS. 4˜7referred to “swapping contents” of storage units, it is to be appreciated that reordering of information units may be performed by various well-known techniques including swapping contents, swapping pointers, and effectively coupling and decoupling of storage units from one row to another by using, for example, multiplexer circuits controlled by the compare and reorder logic. Also, although the example described above performs a shift before a compare and reorder, these two operations may be reversed and/or performed in a same operation. Further, although the example described a double shift mode of operation wherein the top row was shifted prior to shifting the bottom row, the order of shifting may be reversed.

FIGS. 8A˜8Billustrate, for example, a single column, double shift mode of operation, wherein the compare and reorder step and the shift step have been combined into a single macro step. InFIG. 8A, a compare and reorder element, circuit or logic811compares sequence indicators stored in corresponding storage units801and802, then stores the information unit with the higher (later sequenced) one in storage unit801and shifts the information unit with the lower (earlier sequenced) one into associated storage unit804, which is one column to the right of storage unit802on the bottom row. (Note, however, that if the storage unit802is the last storage unit in the bottom row of the double-back shifter, then the information unit with the lower sequence indicator is instead shifted out of the double-back shifter.) Meanwhile, another compare and reorder element to the left of the compare and reorder element811(or an extension of the compare and reorder element811) is performing a similar function to update the contents of storage unit802.

InFIG. 8B, the compare and reorder element811compares sequence indicators stored in corresponding storage units801and802, then stores the information unit with the lower one in storage unit802and shifts the information unit with the higher one into associated storage unit803, which is one column to the left of storage unit801on the top row. (Note, however, that if the storage unit801is the last storage unit in the top row of the double-back shifter, then the information unit with the higher sequence indicator is instead shifted into the storage unit802, which, in that case would be the first storage unit in the bottom row.) Meanwhile, another compare and reorder element to the right of the compare and reorder element811(or an extension of the compare and reorder element811) is performing a similar function to update the contents of storage unit801.

Although the prior examples described single column shifts, multiple column shifts may also be performed in the present invention.FIGS. 9A˜9Billustrate, as an example, a double column, double shift mode of operation, wherein the compare and reorder step and the shift step have been combined into a single macro step. InFIG. 9A, a compare and reorder element, circuit or logic911compares sequence indicators stored in corresponding storage units901,902,903and904, then stores a highest one in storage unit901, stores a second highest one in storage unit903, shifts a lowest one into associated storage unit908, and shifts a second lowest one into associated storage unit906. Associated storage units906and908are respectively two and one columns to the right of storage unit904on the bottom row, and therefore, by updating their contents at the same time, a double column shift is performed. (Note, however, that if the storage units902and904are the last storage units in the bottom row of the double-back shifter, then the information units with the lower and second lowest sequence indicators are instead shifted out of the double-back shifter.) Meanwhile, another compare and reorder element to the left of the compare and reorder element911(or an extension of the compare and reorder element911) is performing a similar function to update the contents of storage units902and904.

InFIG. 9B, the compare and reorder element911compares sequence indicators stored in corresponding storage units901,902,903and904, then stores a lowest one in storage unit904and a second lowest one in storage unit902, and shifts a highest one into associated storage unit905and a second highest one into associated storage unit907, which are respectively two and one columns to the left of storage unit903on the top row. (Note, however, that if the storage units901and903are the last storage units in the top row of the double-back shifter, then the information unit with the highest sequence indicator is instead shifted into the storage unit902and the information unit with the second highest sequence indicator is shifted into the storage unit904, which would be the second and first storage units in the bottom row.) Meanwhile, another compare and reorder element to the right of the compare and reorder element911(or an extension of compare and reorder element911) is performing a similar function to update the contents of storage units901and903.

FIGS. 10A˜10Dillustrate, as a simplified example, the operation of a second version of the reorder cell unit200, employing a double column, double shift mode of operation for a limited stream of incoming information units. InFIG. 10A, the first row of a double-back shifter including storage units1001˜1008is shown storing sequence indicators that are out of sequence. InFIG. 10B, after execution of a double column shift, the contents of top row storage units1004and1003have been respectively shifted into bottom row storage units1006and1005. No comparison and reorder operations had been performed in this case, because storage units1005˜1008are assumed to contain invalid entries. InFIG. 10C, compare and reorder logic1012(comprising at least one circuit) compares sequence indicators stored in corresponding storage units1003˜1006, and reorders the contents of those storage units such that the information unit with the highest sequence indicator is stored in storage unit1003(in this case, the information unit having the sequence indicator of4), the information unit with the second highest sequence indicator is stored in storage unit1004(in this case, the information unit having the sequence indicator of3), the information unit with the lowest sequence indicator is shifted into storage unit1008(in this case, the information unit having the sequence indicator of1), and the information unit with the second lowest sequence indicator is shifted into storage unit1007(in this case, the information unit having the sequence indicator of2). InFIG. 10D, after execution of a double column shift, the contents of top row storage units1004and1003have been respectively shifted into bottom row storage units1006and1005. No comparison and reorder operations had been performed in this case, because storage units1001˜1002corresponding to storage units1008˜1007and storage units1005˜1006corresponding to storage units1004˜1003are assumed to contain invalid entries. As is evident by inspection of the bottom row of the double-back shifter, contents are now in proper sequence in the bottom row.

By extending the at least one circuit described above in reference toFIGS. 8A˜8Band9A˜9B, compare and reorder operations for higher number column shifts are readily determinable. Although the implementation for such higher number column shift versions get increasingly more complex, the added complexity may be justified in situations where execution speed and/or bandwidth are critical.

Although the prior examples described double shift operations with alternating top and bottom or bottom and top row shifts, single shift operations may also be performed in the present invention. In this case, the operation is referred to as being a single shift, because the top and bottom rows of the double-back shifter are shifted together at the same time.

FIG. 11is useful for illustrating an example of a single column, single shift mode of operation for a continuous incoming stream of information units. In this example, a double-back shifter includes a top row of storage units1101˜1104initially containing sequence indicators A˜D and a bottom row of storage units1105˜1108initially containing sequence indicators E˜H as shown in the figure. In order to perform a single shift operation instead of a double shift, at least one compare and reorder element or circuit in a third version of the reorder unit200employs the following first set of equations to provide equivalent results in this case as though compare and reorder, bottom row shift, and compare and reorder operations had been performed just prior to the shift.
A′=max (A,E),  (1)
B′=max (max (B,F), min (A,E)),  (2)
C′=max (max (C,G), min (B,F)),  (3)
D′=max (max (D,H), min (C,G)),  (4)
E′=min (min (A,E), max (B,F)),  (5)
F′=min (min (B,F), max (C,G)),  (6)
G′=min (min (C,G), max (D,H)), and  (7)
H′=min (D,H),  (8)
where A′˜D′ are the reordered sequence indicators stored in the top row of storage units1101˜1104just prior to the shift, and E′˜H′ are the reordered sequence indicators stored in the bottom row of storage units1105˜1108just prior to the shift.

The first set of equations may then be modified as follows to form a second set of equations incorporating the final shift.
A″=max (max (B,F), min (A,E)),  (9)
B″=max (max (C,G), min (B,F)),  (10)
C″=max (max (D,H), min (C,G)),  (11)
D″=sequence indicator for new information unit shifted in,  (12)
E″=max (A,E),  (13)
F″=min (min (A,E), max (B,F)),  (14)
G″=min (min (B,F), max (C,G)),  (15)
H″=min (min (C,G), max (D,H)), and  (16)
Sequence indicator for information unit shifted out of bottom row=min (D,H),  (17)
where A″˜D″ are the reordered sequence indicators stored in the top row of storage units1101˜1104just after the shift, and E″˜H″ are the reordered sequence indicators stored in the bottom row of storage units1105˜1108just after the shift.

FIGS. 12A˜12Hillustrate, as a simplified example, the operation of a third version of the reorder cell unit200, employing a single column, single shift mode of operation for a limited stream of incoming information units. InFIG. 12A, the first row of a double-back shifter including storage units1201˜1208is shown storing sequence indicators that are out of sequence. No compare and reorder operations are performed at this point, because the bottom row of the double-back shifter is assumed to contain invalid entries. InFIG. 12B, a single column shift of the top and bottom rows has occurred. InFIG. 12C, the first set of equations (1)˜(8) above have been employed to compare and reorder the sequence indicators in the double-back shifter, resulting in the sequence indicators in storage units1204and1205getting reordered according to the following equations:⁢A=max⁡(A,E)=max⁡(3,1)=3,and(18)E⁢=min⁡(min⁡(A,E),max⁡(B,F))=min⁡(min⁡(3,1),max⁡(invalid⁢⁢comparison))=min(min⁡(3,1)=1.(19)
No other comparisons or changes were made in this simplified example, because the contents of storage units1201and1206˜1208are assumed to be invalid entries. InFIG. 12D, a single column shift of the top and bottom rows has again occurred. InFIG. 12E, the first set of equations (1)˜(8) above have again been employed to compare and reorder the sequence indicators in the double-back shifter, resulting in the sequence indicators in storage units1204and1205once again getting reordered according to the following equations:A=max⁡(A,E)=max⁡(2,3)=3,(20)B=max⁡(max⁡(B,F),min⁡(A,E))=max⁡(max⁡(4,1),min⁡(2,3))=max⁡(4,2)=4,(21)E=min⁡(min⁡(A,E),max⁡(B,F))=min⁡(min⁡(2,3),max⁡(4,1))=min⁡(2,4)=2),and(22)F=min⁡(min⁡(B,F),max⁡(C,G))=min⁡(min⁡(4,1),max⁡(invalid⁢⁢entry))=min⁡(min⁡(4,1))=1.(23)
No other comparisons or changes were made in this simplified example, because the contents of storage units1201˜1202and1207˜1208are assumed to be invalid entries. InFIG. 12F, a single column shift of the top and bottom rows has again occurred. InFIG. 12G, the first set of equations (1)˜(8) above have again been employed, but this time, resulting in no reordering of sequence indicators. Finally, inFIG. 12H, a single column shift of the top and bottom rows has again occurred, and the sequence indicators are shown to now be in proper sequence.

Although a fourth version of the reorder unit200may be implemented with a multi-column, single shift mode of operation, such a version will not be described herein, because its implementation is readily determinable from the prior discussions. All versions, however, are fully contemplated to be within the scope of the present invention.

FIG. 13illustrates a block diagram of portions of a SONET network element including a plurality of sources including sources101and1301that transmit SONET payloads through a switch fabric including switch slices105˜109to incoming buffers104of a destination103′. A staging shifter300is included in the destination103′ to facilitate timely loading of information units from the incoming buffers104into the reorder unit200. The cell reorder unit200accommodates such a multiple source system by reordering information units only if they are from the same source. Also, although the prior examples described operations on a finite number or limited stream of information units and thus assumed many invalid information units for simplification purposes, in practice, the cell reorder unit200may handle a continuous stream of information units entering and leaving it, with only occasional and sporadic invalid information units being received. In particular, the number/frequency of invalid information units being received may be occasional or sporadic in a densely packed continuous stream of information units, or the number/frequency of invalid information units being received may be large in a sparsely packed and continuous stream of information units.

FIG. 14illustrates, as an example, a block diagram including further detail on the relationship of the incoming buffers104, the staging shifter300and the reorder unit200. The incoming buffers104include a plurality of path buffers, one for each path or switch slice in the SONET network element. Each path buffer receives incoming payloads from its assigned switch slice (e.g., path(1) buffer1401from switch slice(1)105, and path(K) buffer1402from switch slice(K)109). The staging shifter300includes a plurality of storage units, one for each path buffer. Each storage unit stores an information unit from its respective path buffer (e.g., information unit(1) stored in storage unit301from path(1) buffer1401, and information unit(K) stored in storage unit302from path(K) buffer1402). Information units for available SONET payloads or cells are preferably read in parallel periodically at the cell transfer rate from the path buffers into their respective storage units of the staging shifter300. The information units are then shifted serially into the reorder unit200, n-columns at a time upon each shift of the top row, wherein the integer “n” depends upon the mode of operation of the reorder unit200. The length of the double-back shifter is determined in this case by the number of paths in the SONET network element that may send information units to the destination, and the skew or difference of best case and worst case transit times for those information units through the switch slices. Also, since the maximum size of the sequence indicators is finite, the sequence indicators may wrap-around for long streams of SONET payloads. The compare and reorder logic in the cell reorder unit200detects such a wrap-around occurrence by, for example, inspection of the two most significant bits of the sequence indicator changing from “11” to “00”.

FIG. 15illustrates, as an example, a flow diagram of a method for reordering sequence indicated information units into proper sequence for a limited stream or finite number of incoming information units. In1501, the method includes storing information units in a first shifter. As an example, this may involve receiving SONET payloads transmitted through a distributed switch fabric from one or more sources, and storing information units associated with the SONET payloads in the first shifter. For a finite stream, as in this example, the information units may be stored in parallel into the first shifter, whereas in a continuous stream, they would generally be shifted in one or more at a time. In1502, the method includes setting a counter N to integer 1. In1503, the method includes shifting the information units in the first shifter by one position, and storing a shifted out information unit in a second shifter. In1504, the method includes comparing information units stored in corresponding positions of the first and second shifters, and reordering the information units between the corresponding positions according to sequence information included in the information units. In a multiple source system, the reordering is only performed on information units between the corresponding positions if the information units are from a same source and valid. In1505, the method includes shifting the information units in the second shifter by one position. In1506, the method includes comparing information units stored in corresponding positions of the first and second shifters, and reordering the information units between the corresponding positions according to sequence information included in the information units. Again, in a multiple source system, the reordering is only performed on information units between the corresponding positions if the information units are from a same source and valid. In1507, the method includes checking the counter N to determine whether it has incremented to a value K, which is generally equal to the number of columns in the top or bottom row of the double-back shifter. The minimum number of columns in this case is determined by the necessary number of iterations of1503˜1506to shift the information units into and process through the second shifter so that they exit in proper sequence. If the method determines that the counter N has incremented to the value K, then the information units are ready to exit the second shifter in proper sequence. Therefore, in this case, in1508, the method includes shifting the information units out of the second shifter for further processing within the destination. For a finite stream, as in this example, the information units may be shifted out in parallel from the second shifter, whereas in a continuous stream, they would generally be shifted out one or more at a time. On the other hand, if the method determines that the counter N has not incremented to the value K, then in1509, it increments the counter N by 1, and jumps back to1503to continue repeating1503˜1509, so as to shift the information units into and process through the second shifter so that they exit in proper sequence according to the sequence information included in the information units.

In a system employing a continuous stream of input and output information units, the counter N may be deleted.FIG. 16illustrates, as an example, a flow diagram of a method for reordering sequence indicated information units into proper sequence employing a single column, double shift mode of operation on a continuous stream of incoming information units. In1601, the bottom row of the double-back shifter is shifted. Shifting the bottom row first is preferable in this case, because it makes the first storage unit on the bottom row available for an information unit that will be subsequently shifted into it when the top row is shifted, wherein the number of columns shifted depends upon the mode of operation of the double-back shifter. In1602, at least one circuit in the reorder unit200compares sequence indicators in corresponding sets of storage units in the double-back shifter, and reorders information units in associated storage units in the double-back shifter as necessary, wherein the corresponding sets of storage units and associated storage units depend upon the mode of operation of the double-back shifter. In1603, the top row of the double-back shifter is shifted, wherein the number of columns shifted depends upon the mode of operation of the double-back shifter. In1604, at least one circuit in the reorder unit200again compares sequence indicators in corresponding sets of storage units in the double-back shifter, and reorders information units in associated storage units in the double-back shifter as necessary. The method then repetitively performs1601˜1604so that all information units are in proper sequence by the time they are shifted out of the double-back shifter.

FIG. 17illustrates, as an example, a flow diagram of a method for reordering sequence indicated information units into proper sequence employing a single column, single shift mode of operation on a continuous stream of incoming information units. In this method, only a single shift is performed so that both top and bottom rows are shifted at the same time.FIG. 18illustrates, as an example, a flow diagram of a method for reordering sequence indicated information units into proper sequence employing a combined single column, single shift mode of operation on a continuous stream of incoming information units. The methods depicted inFIGS. 17 and 18are described in reference toFIGS. 11 and 12, so they are not repeated here in order to avoid unnecessary redundancy.

Although the various aspects of the present invention have been described with respect to a preferred embodiment, it will be understood that the invention is entitled to full protection within the full scope of the appended claims.