Method to etch non-volatile metal materials

A method for etching a stack with an Ru containing layer disposed below a hardmask and above a magnetic tunnel junction (MTJ) stack with pinned layer is provided. The hardmask is etched with a dry etch. The Ru containing layer is etched, where the etching uses hypochlorite and/or O3 based chemistries. The MTJ stack is etched. The MTJ stack is capped with dielectric materials. The pinned layer is etched following the MTJ capping.

BACKGROUND OF THE INVENTION

The present invention relates to etching a layer of non volatile materials through a mask during the production of a semiconductor device. More specifically, the present invention relates to etch a metal magnetic tunnel junctions (MTJ) stack.

During semiconductor wafer processing, features may be etched through a metal containing layer. In the formation of magnetic random access memories (MRAM) or resistive random-access memory (RRAM) devices, a plurality of thin metal layers or films may be sequentially etched. For MRAM a plurality of thin metal layers may be used to form magnetic tunnel junction stacks.

SUMMARY OF THE INVENTION

To achieve the foregoing and in accordance with the purpose of the present invention, a method of etching a stack with an Ru containing layer disposed below a hardmask and above a magnetic tunnel junction (MTJ) stack with a pinned layer is provided. The hardmask is etched with a dry etch. The Ru containing layer is etched, where the etching uses hypochlorite and/or O3based chemistries. The MTJ stack is etched. The MTJ stack is capped with dielectric materials. The pinned layer is etched following the MTJ capping.

In another manifestation of the invention, a method of etching a stack comprising a hard mask over a Ru containing layer, over a magnetic tunnel junction (MTJ) stack over a pinned layer is provided. The hardmask, Ru containing layer, and MTJ stack are etched. The MTJ stack is sealed. The pinned layer is etched.

In another manifestation of the invention, a method of etching a stack with a pinned layer disposed below a MTJ stack, disposed below an Ru containing layer, disposed below a hardmask layer is provided. The hardmask is etched with a dry etch. The Ru containing layer is etched. The MTJ stack is etched. The MTJ stack is capped with dielectric materials. The pinned layer is etched with chemistries selective to noble metals, comprising SOCl2/pyridine mixtures, HBr/DMSO mixtures, or a mixture of CCl4with at least one of DMSO, acetonitrile, benzonitrile, or dimethylformamide (DMF).

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

To facilitate understanding,FIG. 1is a high level flow chart of a process used in an embodiment of the invention. A substrate with a stack with a Ru containing layer disposed below a hardmask and above a magnetic tunnel junction (MTJ) stack is provided. The hardmask is etched or opened (step104). The Ru containing layer is etched using hypochlorite and/or ozone based chemistry (step108). The MTJ stack is etched (step112). The etched MTJ stack is sealed (step116). A magnetic pinned layer is etched (step120). Such a magnetic pinned layer is described inDevelopment of the magnetic tunnel junction MRAM at IBM: From first junctions to a16-Mb MRAM demonstrator chip, IBM J. RES. & DEV. VOL. 50 NO. 1 JAN. 2006, which is incorporated by reference for all purposes.

EXAMPLES

FIG. 2Ais a cross-sectional view of a stack200, which in this example is used for magnetic random access memories (MRAM). In this example the bottom layer of the stack200is a tantalum beryllium (TaBe) layer204formed over a substrate. A platinum manganese (PtMn) layer208is formed over the TaBe layer204. A first cobalt iron (CoFe) layer212is formed over the PtMn layer208. A first ruthenium (Ru) layer216is formed over the first CoFe layer212. A second CoFe layer220is formed over the first Ru layer216. A first magnesium oxide (MgO) layer224is formed over the second CoFe layer220. A third CoFe layer228is formed over the first MgO layer224. A second MgO layer232is formed over the third CoFe layer228. A titanium (Ti) layer236is formed over the second MgO layer232. A fourth CoFe layer240is formed over the Ti layer236. A first tantalum (Ta) layer248is formed over the fourth CoFe layer240. A second Ru layer252is formed over the first Ta layer248. A second Ta layer256is formed over the second Ru layer252. A mask comprising a titanium nitride (TiN) layer260and a silicon nitride (SiN) layer264is patterned over the second Ta layer256. In this example, the layers including and between the first CoFe layer212and the first Ta layer248form a magnetic tunnel junction (MTJ) layer268. The PtMn layer208and the TaBe layer204form a pinned layer270. The pinned layer270may be formed from other materials.

In one embodiment, all processing may be performed in a single plasma etch chamber.FIG. 3is a schematic view of an etch reactor that may be used in practicing such an embodiment. In one or more embodiments of the invention, an etch reactor300comprises a gas distribution plate306providing a gas inlet and a chuck308, within an etch chamber349, enclosed by a chamber wall350. Within the etch chamber349, a substrate304on which the stack is formed is positioned on top of the chuck308. The chuck308may provide a bias from the ESC source348as an electrostatic chuck (ESC) for holding the substrate304or may use another chucking force to hold the substrate304. A heat source310, such as heat lamps, is provided to heat the metal layer. A precursor gas source324is connected to the etch chamber349through the distribution plate306.

FIG. 4is a high level block diagram showing a computer system400, which is suitable for implementing a controller335used in embodiments of the present invention. The computer system may have many physical forms ranging from an integrated circuit, a printed circuit board, and a small handheld device up to a huge super computer. The computer system400includes one or more processors402, and further can include an electronic display device404(for displaying graphics, text, and other data), a main memory406(e.g., random access memory (RAM)), storage device408(e.g., hard disk drive), removable storage device410(e.g., optical disk drive), user interface devices412(e.g., keyboards, touch screens, keypads, mice or other pointing devices, etc.), and a communication interface414(e.g., wireless network interface). The communication interface414allows software and data to be transferred between the computer system400and external devices via a link. The system may also include a communications infrastructure416(e.g., a communications bus, cross-over bar, or network) to which the aforementioned devices/modules are connected.

Information transferred via communications interface414may be in the form of signals such as electronic, electromagnetic, optical, or other signals capable of being received by communications interface414, via a communication link that carries signals and may be implemented using wire or cable, fiber optics, a phone line, a cellular phone link, a radio frequency link, and/or other communication channels. With such a communications interface, it is contemplated that the one or more processors402might receive information from a network, or might output information to the network in the course of performing the above-described method steps. Furthermore, method embodiments of the present invention may execute solely upon the processors or may execute over a network such as the Internet in conjunction with remote processors that shares a portion of the processing.

The term “non-transient computer readable medium” is used generally to refer to media such as main memory, secondary memory, removable storage, and storage devices, such as hard disks, flash memory, disk drive memory, CD-ROM and other forms of persistent memory and shall not be construed to cover transitory subject matter, such as carrier waves or signals. Examples of computer code include machine code, such as produced by a compiler, and files containing higher level code that are executed by a computer using an interpreter. Computer readable media may also be computer code transmitted by a computer data signal embodied in a carrier wave and representing a sequence of instructions that are executable by a processor.

The hardmask is etched or opened (step104). In this example, the hardmask is the Ta layer256. The SiN layer264and TiN layer260are used as a mask for etching the Ta layer256. In this embodiment, a plasma etch is used to etch the Ta layer256. In this embodiment a dry etch using Cl2as the etch gas may be used.FIG. 2Bis a cross-sectional view of the stack200after the Ta layer256has been etched.

The second Ru layer252is etched (step108) using hypochlorite and/or ozone based chemistries. In one embodiment, a plasma etch may be used to provided the hypochlorite and ozone chemistry based etch. In another embodiment the hypochlorite and ozone based chemistries may be used in a wet etch. In such an embodiment, a diluted hydrogen fluoride (dHF) preclean may be used to remove silicon oxide residue, before etching the second Ru layer252. A NaClO aqueous solution may be used in a wet etch to etch the second Ru layer252. In this example, the Ru etch is wet etched using a NaClO aqueous solution. Other hypochlorite etch processes include HClO in a Na-free solution with pH>12; organic hypochlorite R—OCl in organic solvent, R-including alkyl (—CH3. —CH2CH3, —C(CH3)3 et al), cycloalkly, or acromatic carbonyl.FIG. 2Cis a cross-sectional view of the stack200after the second Ru layer252has been etched. Examples of a Ru wet etch using an ozone containing aqueous solution with pH >12 include ozone saturated NaOH, NH4OH, or tetramethyammonium hydroxide solution.

The MTJ stack268is etched (step112) with a recess into the pinned layer. The recess allows subsequent capping with dielectric to seal the MTJ and pinned layer interface. In this embodiment a low bias ion sputtering is used to etch the MTJ stack268. In this embodiment, the gas used during this step consists essentially of argon (Ar). Preferably, the low bias provides a bias is between 10 and 500 volts. More preferably, the low bias is between 20 and 300 volts. Most preferably, the low bias is between 100 and 200 volts. It has been unexpectedly found that a low bias ion sputtering without a chemical etchant gas, but only an inert bombardment gas provides a MTJ etch with reduced MTJ deposition. A chemical etchant gas is a gas with a component that etches using a chemical reaction. An inert bombardment gas does not use a chemical reaction for etching, but only uses physical bombardment for etching.FIG. 2Dis a cross-sectional view of the stack200after the second MTJ stack268has been etched.

The etched MTJ stack268is sealed (step116) by depositing conformal insulating layer272consisting of dielectric materials. This capping layer272encapsulates the opened MTJ stacks to keep the MTJ stacks free from damage that would have been caused by the following processes to etch bottom layers. Equally important, the capping layer also separates etch processes of following layers apart from the process of etching the MTJ stack268. Two common categories of damages on MTJ include: etch product re-depositing on MTJ sidewall, which leads to shorting of the MTJ and etch chemical reacting with MTJ layers to degrade the magnetic properties. Thus in traditional processes when all stack were etched without capping layer the MTJ stacks were damaged. Any etch process which damages MgO or CoFeB is not acceptable, including H2O, oxygen, halogen based chemical or plasma system etches. Choosing the proper capping layer enables the isolation of the opened MTJ from failure or degradation in the following process flow. The idea cap layers thus open the window to exploit a variety of processes, including those non-compatible with MgO/CoFeB, to etch following layers and maintain the electrical/magnetic properties of MTJ from degradation. A variety of insulating cap layers can be chosen, such as silicon-based dielectric film, SiN, SiC, SiCN, SiO2, SiOC, ,SiOCHxCH3, Si; carbon-based dielectric films (carbon, polymer), nitride compound (BN). In this example, we demonstrated the capping layer with SiO2and SiN. A plasma is formed from SiH4and O2to deposit a layer of SiO2over the etched stack. In another embodiment a layer of SiN is deposited.FIG. 2Eis a cross sectional view of the stack200after a deposited layer272of SiO2has been deposited.

The deposited layer272is etched back (opened) to expose the underlying PtMn layer208, while the sidewall of MTJ stack268remains sealed. In this embodiment, a CF4and Ar plasma opening process is used to open the deposited layer.FIG. 2Fis a cross-sectional view of the stack200after the deposited layer272has been opened. The bottom of the deposited layer272is completely removed. The sidewalls of the deposited layer272may be thinned, but remain to seal the MTJ stack268.

The pinned layer270is etched (step120). In one embodiment, the pinned layer270is etched with a dry plasma etch. In another embodiment, the pinned layer270is etched using a wet etch. Examples include mixture of pyridine with thionyl chloride (SOCl2) with varied ratio, and dilute mixture in organic solvent include but not limited to acetonitrile. HBr and DMSO mixtures are also used to etch PtMn and other noble metal containing pinned layer. A mixture of CCl4with at least one of DMSO, acetonitrile, benzonitrile, or dimethylformamide (DMF) is also used to etch PtMn and other noble metal containing pinned layer.FIG. 2Gis a cross-sectional view of the stack200after the pinned layer270has been etched. Additional processing steps, such as removing the deposited layer272, may be used to form the stack202into MRAM.

Some embodiments of the inventions provide many advantages over the prior art. For example, the sealing of the MTJ stack268eliminates damage of the MTJ stack268during the etching of the pinned layer (step120). In addition, using a low bias ion sputter instead of a chemical etch or high bias ion sputter for etching the MTJ stack268, further reduces damage to the MTJ stack268. A chemical etch of the MTJ stack268would harm some of the MTJ stack268layers. It was unexpectedly found that a low bias ion sputter would cause less redeposition of the MTJ stack268materials. The reduction of redeposited MTJ materials improves device quality, since redeposited material may cause shorting between layers. The removal of such redeposited material may damage the MTJ layers. Damage to the MTJ stack268would undesirably change the magnetic properties of the MRAM. The use of hypochlorite and/or ozone based chemistries to etch the second Ru layer248has been expectedly found to provide an improved selective etch for the Ru layer284, which requires a different etch recipe than the recipe used to etch the MTJ stack268. Ru is very inert. Hypchlorite is a strong oxidizing agent required to oxidize the inert Ru. The different and selective etches in these two steps result in less MTJ stack268damage and redeposition. In other embodiments, the MTJ stack268may comprise other layers or may be in another order or may have more or less layers. The MTJ stack268is essential form forming MRAM.