Liquid crystal display device having a pixel including four sub-pixels

A liquid crystal display (“LCD”) device includes a white sub-pixel that has a smaller size than other sub-pixels thereby increasing the brightness and the color purities of the other colors, which improves image quality. An LCD device has the common and pixel electrodes on the same substrate and may be formed of a transparent conductive material to increase the brightness further.

This application claims the benefit of Korean Patent Application No. 2005-0043108, filed in Korea on May 23, 2005, which is hereby incorporated by reference for all purposes as if fully set forth herein.

BACKGROUND

Liquid crystal display (“LCD”) devices have been regarded as next generation display devices by providing increased value because of their low power consumption and high portability. An LCD device is driven based on optical anisotropy and polarization characteristics of a liquid crystal material. In general, an LCD device includes two substrates, which are spaced apart and facing each other, and a liquid crystal layer interposed between the two substrates. Each of the substrates includes an electrode. The electrodes from respective substrates face one the other. An electric field is induced between the electrodes by applying a voltage to each electrode. An alignment direction of the liquid crystal molecules changes in accordance with a variation in the intensity or the direction of the electric field. The LCD device displays a picture by varying light transmittance according to the arrangement of the liquid crystal molecules.

Generally, the LCD device is manufactured by fabricating an array substrate including a thin film transistor and a pixel electrode, fabricating a color filter substrate including a color filter and a common electrode, and interposing a liquid crystal layer between the array substrate and the color filter substrate. In addition, active matrix liquid crystal display (“AMLCD”) devices, which include thin film transistors as switching devices for a plurality of pixels, have been widely used due to their high resolution and ability to display fast moving images.

FIG. 1is a three-dimensional view of part of an LCD device according to the related art and illustrates an active area where liquid crystal molecules are driven. InFIG. 1, the LCD device1includes upper and lower substrates60and10spaced apart from and facing each other and a liquid crystal layer80interposed between the upper substrate60and the lower substrate10. A plurality of gate lines8and a plurality of data lines20are formed on an inner surface of the lower substrate60. The gate lines8and the data lines20cross each other to define pixel regions, each of which serves as a sub-pixel SP. A thin film transistor (“TFT”) T is formed as a switching element at each crossing of the gate lines8and the data lines20. A pixel electrode30, which is connected to the thin film transistor T, is formed in each sub-pixel SP.

A color filter layer70and a common electrode75are sequentially formed on an inner surface of the upper substrate60facing the lower substrate10. The color filter layer70includes red, green and blue color filter patterns, which correspond to the sub-pixels SP, respectively, and are sequentially arranged. Although not shown in the figure, a black matrix is formed between adjacent color filter patterns to block light in a region where an arrangement of liquid crystal molecules of the liquid crystal layer80are not controlled.

FIG. 2is a schematic plan view of an LCD device according to the related art. InFIG. 2, gate lines, data lines and a color filter layer are schematically illustrated, and a black matrix and thin film transistors are not shown. As illustrated inFIG. 2, in the LCD device1, gate lines8and data lines20cross each other to define pixel regions, each of which acts as a sub-pixel SP. Red, green and blue color filter patterns R, G and B are sequentially and repeatedly arranged. The red, green and blue color filter patterns R, G and B correspond to the sub-pixels SP, respectively. The red, green and blue sub-pixels RSP, GSP and BSP constitute a pixel P. However, in the LCD device1having three sub-pixels RSP, GSP and BSP as the pixel P, light emitted from a backlight, which is disposed at a rear side of a lower substrate including the gate and data lines8and20thereon, transmits the red, green and blue color filter patterns R, G and B to thereby produce color images. Thus, brightness of the LCD device is lowered.

To improve the brightness, another LCD device having four sub-pixels of red, green, blue and white as one pixel may be used. A white sub-pixel includes a colorless, transparent pattern. Hereinafter, the colorless, transparent pattern may be referred to as a white color filter pattern.FIG. 3is a schematic plan view of an LCD device having four color filter patterns according to the related art. As inFIG. 2, a black matrix and thin film transistors are not shown.

As illustrated inFIG. 3, the LCD device85includes red, green, blue and white color filter patterns. The red, green, blue and white color filter patterns are formed in sub-pixels SP, respectively, and red, green, blue and white sub-pixels RSP, GSP, BSP and WSP constitute a pixel P. In one embodiment, the red, green, blue and white sub-pixels RSP, GSP, BSP and WSP have a rectangular shape and are similar in size. In an alternate embodiment, the sub-pixels may have a different shape or may differ in size. In the LCD device85having the red, green, blue and white color filter patterns, substantially all of light passing through the white sub-pixel WSP is transmitted from the backlight through the white color filter pattern W, and the brightness is thus increased. However, since the white sub-pixel WSP is 25% of the pixel P, the sizes of the red, green and blue sub-pixels RSP, GSP and BSP in the active area are decreased. In other words, the area that the white sub-pixel WSP is covering on the pixel P is less area available for each of the other sub-pixels, RSP, GSP and BSP. Therefore, although the brightness is increased, color purity is lowered. In addition, the difference of a contrast ratio between a gray level and a white level is deteriorated due to the increased white brightness, and thus image qualities are decreased.

SUMMARY

Accordingly, the present embodiments are directed to a liquid crystal display device that substantially obviates one or more problems due to limitations and disadvantages of the related art. Additional features and advantages of the embodiments will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the embodiments. The advantages of the embodiments will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.

In a first aspect, an array substrate for a liquid crystal display device includes a substrate, first and second gate lines of a first direction on the substrate, and a common line of the first direction between the first and second gate lines. Also, included are first and second data lines of a second direction that cross the first and second gate lines and the common line. The crossing defines a pixel. The pixel includes first, second, third and fourth sub-pixels. The fourth sub-pixel is smaller than the first, second and third sub-pixels. A thin film transistor is located at a crossing point of the first and second gate lines and the first and second data lines, and a common electrode is located in the first, second, third and fourth sub-pixels and connected to the common line. Pixel electrodes in the first, second, third and fourth sub-pixels are connected to the thin film transistor.

In a second aspect an array substrate for a liquid crystal display device includes a substrate, first and second gate lines of a first direction on the substrate, and first and second data lines of a second direction. The first and second data lines cross the first and second gate lines to define a pixel. The pixel includes first, second, third and fourth sub-pixels, wherein the fourth sub-pixel is smaller than the first, second and third sub-pixels. A thin film transistor is located at each crossing point of the first and second gate lines and the first and second data lines. A pixel electrode in the first, second, third and fourth sub-pixels is connected to the thin film transistor.

In a third aspect, a color filter substrate for a liquid crystal display device includes a substrate, a black matrix on the substrate, and filter patterns on the substrates. The filter patterns are red, green, blue and white. The white color filter pattern is smaller than the red, green and blue color filter patterns.

In fourth aspect, a liquid crystal display device includes first and second substrates. A pixel on the substrates includes first, second, third and fourth sub-pixels. A liquid crystal layer is between the first and second substrates. The fourth sub-pixel is smaller than the first, second and third sub-pixels.

DETAILED DESCRIPTION OF THE EMBODIMENTS

FIG. 4is a schematic plan view of a liquid crystal display (LCD) device according to an embodiment. InFIG. 4, lines and color filter patterns are schematically illustrated, and a black matrix and thin film transistors are not shown. As shown inFIG. 4, in the LCD device100, first and second gate lines123aand123bare formed in a first direction, and first and second data lines145aand145bare formed in a second direction. A common line120is extended along the first direction and is disposed between the first and second gate lines123aand123b. The first and second gate lines123aand123band the common line120cross the first and second data lines145aand145bto define pixel regions, which serve as sub-pixels SP. Red, green, blue and white color filter patterns R, G, B and W are formed in the sub-pixels SP, respectively. The red, green, blue and white sub-pixels RSP, GSP, BSP and WSP constitute a pixel P. In one embodiment, the red and green sub-pixels RSP and GSP are close by each other along the first direction, the blue and white sub-pixels BSP and WSP are adjacent to each other along the first direction, the red and blue sub-pixels RSP and BSP are close by each other along the second direction, and the green and white sub-pixels GSP are adjacent to each other along the second direction. In alternate embodiments, the sub-pixels may be arranged differently.

The common line120may include first, second, third and fourth parts120a,120b,120cand120d. In one embodiment, the first and third parts120aand120care parallel to the first and second data lines145aand145band overlap the first and second data lines145aand145b, respectively. The second and fourth parts120band120dmay be parallel to the first and second gate lines123aand123band are not disposed in a line. The second part120bis disposed between the red sub-pixel RSP and the blue sub-pixel BSP, and the fourth part120dis disposed between the green sub-pixel GSP and the white sub-pixel WSP.

In one embodiment, the red, green and blue sub-pixels RSP, GSP and BSP have substantially the same size, and the white sub-pixel WSP has a smaller size than the red, green and blue sub-pixels. Therefore, the size of the white sub-pixel WSP is smaller than 25% of that of the pixel P as in the related art fromFIG. 4. In alternate embodiments, the arrangement of the sub-pixels may be changed. Specifically, the pixel P is divided into a first area A1and a second area A2that adjoin each other along the first direction. The first area A1includes the red and blue sub-pixels RSP and BSP, and the second area A2includes the green and white sub-pixels GSP and WSP.

The first area A1has a first width W1, and the second area A2has a second width W2. The first and second widths W1and W2are defined as distances between the first and second data lines145aand145b. Accordingly, the red and blue sub-pixels RSP and BSP have the first width W1, and the green and white sub-pixels GSP and WSP have the second width W2. The pixel P has a third width W3, which is larger than the sum of the first and second widths W1and W2.

The red sub-pixel RSP has a first length L1, the blue sub-pixel BSP has a second length L2, the green sub-pixel GSP has a third length L3, and the white sub-pixel WSP has a fourth length L4. The first area A1has a fifth length L5, and the second area A2has a sixth length L6. The fifth length L5and the sixth length L6substantially correspond to a length of the pixel P. The first length L1is defined as a distance between the first gate line123aand the second part120bof the common line120. The second length L2is defined as a distance between the second part120band the second gate line123b. The third length L3is defined as a distance between the first gate line123aand the fourth part120dof the common line120. The fourth length L4is defined as a distance between the fourth part120dand the second gate line123b. The fifth length L5and the sixth length L6are defined as a distance between the first and second gate lines123aand123b. The fifth length L5is longer than the sum of the first and second lengths L1and L2, and the sixth length L6is longer than the sum of the third and fourth lengths L3and L4. The fifth length L5equals to the sixth length L6. The pixel P has the same length as the fifth and sixth lengths L5and L6. The first length L1equals to the second length L2, and the third length L3is longer than the fourth length L4. Thus, the third length L3is longer than the first and second lengths L1and L2, and the fourth length L4is shorter than the first and second lengths L1and L2. That is, L4<L1=L2<L3. The lengths and widths described above are according to one embodiment, specifically as shown inFIG. 4. In alternate embodiments, the ratio of the lengths and widths may vary and the arrangement of the sub-pixels may likewise vary.

As stated above, in one embodiment, the red, green and blue sub-pixels RSP, GSP and BSP have substantially the same size, and the first width W1is wider than the second width W2because the third length L3of the green sub-pixel GSP is longer than the first and second lengths L1and L2of the red and blue sub-pixels RSP and BSP. The size of the white sub-pixel WSP may be changed by controlling the lengths L1, L2, L3and L4and the widths W1and W2. In other words, each of the sub-pixels may be resized by changing the lengths and widths and the change of one of the sub-pixels may affect at least one of the other sub-pixels.

FIG. 5is a plan view of an array substrate for an LCD device according to an embodiment. Common and pixel electrodes are formed on the same substrate, and liquid crystal molecules are driven by an electric field parallel with the substrate to thereby improve viewing angles. In a conventional in-plane switching (IPS) LCD device including common and pixel electrodes on the same substrate, the common and pixel electrodes are parallel to a data line and are alternately arranged. By controlling the distance between the common and pixel electrodes, an electric field is induced between the common and pixel electrodes, and liquid crystal molecules are driven by the electric field. Additionally, when sizes of sub-pixels are changed like with the present embodiments, widths of the common and pixel electrodes and distances between the common and pixel electrodes may also be changed. As the width of the sub-pixel becomes more narrow, the distances between the common and pixel electrodes may also be narrowed. In this case, the distances may not be balanced, and image qualities are lowered.

The array substrate ofFIG. 5may be one embodiment for improving image quality. In the array substrate according to an embodiment, pixel electrodes163are formed in each of first, second, third and fourth sub-pixels RSP, BSP, GSP and WSP. The pixel electrodes163are spaced apart from each other and substantially parallel to gate lines123aand123b. In one embodiment, common electrodes115are formed in a first area A1including the first and second sub-pixels RSP and BSP and a second area A2including the third and fourth sub-pixels GSP and WSP, respectively. One of the common electrodes115overlaps the pixel electrodes163of the first and second sub-pixels RSP and BSP, and the other of the common electrodes115overlaps the pixel electrodes163of the third and fourth sub-pixels GSP and WSP. Even though sizes of the sub-pixels are changed according to changes in widths and lengths of the sub-pixels, only distances d1of the pixel electrodes and distances d2between adjacent pixel electrodes are considered so that the sub-pixels RSP, GSP, BSP and WSP have substantially the same image qualities. Thus, degrees of freedom in designing the array substrate are considerably increased.

The structure of the array substrate ofFIG. 5will now be described in more detail. As shown inFIG. 5, the first and second gate lines123aand123bare formed in a first direction, and first and second data lines145aand145bare formed in a second direction. A common line120is extended along a first direction and is disposed between the first and second gate lines123aand123b. The first and second data lines145aand145bcross the first and second gate lines123aand123band the common line120to define the first, second, third and fourth sub-pixels RSP, BSP, GSP and WSP. In one embodiment, a portion of the common line120is indented toward the second gate line123bin the second area A2, and thus the fourth sub-pixel WSP has a smaller size than the first, second and third sub-pixels RSP, BSP and GSP. The first, second, third and fourth sub-pixels RSP, BSP, GSP and WSP may correspond to red, green, blue and white color filter patterns (not shown), which are formed on a color filter substrate facing the array substrate. The first, second, third and fourth sub-pixels RSP, BSP, GSP and WSP constitute a pixel P. In one embodiment, the pixel P is divided into the first and second areas A1and A2adjacent to each other along a first direction. As stated above, in one embodiment, the first area A1includes the first and second sub-pixels RSP and BSP, and the second area A2includes the third and fourth sub-pixels GSP and WSP.

The first and second gate lines123aand123bin the pixel P have a distances d3therebeteween, and the second gate line123bin the pixel P and a first gate line123ain a next pixel P along the second direction have a distance d4therebetween, wherein the distance d4is much smaller than the distance d3. The first and second data lines145aand145bin the pixel P have a first width W1therebetween, and the second data line145bin the pixel P and the first data line145bin a next pixel P along the first direction have a second width W2therebetween.

Thin film transistors Tr are formed at crossing points of the first and second gate lines123aand123band the first and second data lines145aand145b. Each thin film transistor Tr includes a gate electrode126, an active layer136, a source electrode147and a drain electrode149. In each of the first, second, third and fourth sub-pixels RSP, BSP, GSP and WSP, the pixel electrodes163are formed. The pixel electrodes163are formed in the first direction and are connected to each other through an auxiliary pixel electrode connecting line160. The auxiliary pixel electrode connecting line160has a closed curve shape corresponding to a peripheral portion of each of the first, second, third and fourth sub-pixels RSP, BSP, GSP and WSP. Both ends of each of the pixel electrodes163are connected to the auxiliary pixel electrode connecting line160. The pixel electrodes163may be parallel to the first and second gate lines123aand123b. To form multi-domains in each sub-pixel, the pixel electrodes163may be bent to have an obtuse angle and may have a symmetric structure.

The common electrodes115are formed in the first area A1and the second area A2, respectively. The common electrode115in the first area A1overlaps the pixel electrodes163in the first and second sub-pixels RSP and BSP, and the common electrode115in the second area A2overlaps the pixel electrodes163in the third and fourth sub-pixels GSP and WSP. The pixel electrodes163, the auxiliary pixel electrode connecting lines160, and the common electrodes115are formed of a transparent conductive material. The first area A1has the first width W1, and the second area A2has the second width W2. Accordingly, the first and second sub-pixels RSP and BSP have the first width W1, and the third and fourth sub-pixels GSP and WSP have the second width W2. The pixel has a third width W3, which is larger than the sum of the first and second widths W1and W2in one embodiment.

The first sub-pixel RSP has a first length L1, the second sub-pixel BSP has a second length L2, the third sub-pixel GSP has a third length L3, and the fourth sub-pixel WSP has a fourth length L4. The first area A1has a fifth length L5, and the second area A2has a sixth length L6. The fifth length L5and the sixth length L6substantially correspond to a length of the pixel P. The fifth length L5is longer than the sum of the first and second lengths L1and L2, and the sixth length L6is longer than the sum of the third and fourth lengths L3and L4. The fifth length L5equals to the sixth length L6. The first length L1equals to the second length L2, and the third length L3is longer than the fourth length L4.

In the array substrate according to one embodiment, the fourth sub-pixel WSP is smaller than the first, second and third sub-pixels RSP, BSP and GSP. The first, second and third sub-pixels RSP, BSP and GSP have substantially the same size. Thus, the third length L3is longer than the first and second lengths L1and L2, and the fourth length L4is shorter than the first and second lengths L1and L2. In addition, the first width W1is wider than the second width W2. In alternate embodiments, the ratios of the lengths and widths may be different.

FIG. 6,FIG. 7andFIG. 8are cross-sectional views along the lines VI-VI, VII-VII and VIII-VIII ofFIG. 5, respectively. For the convenience of explanation, a left area is defined as a first area A1with respect to a data line in a pixel, that is, the second data line ofFIG. 5, and a right area is defined as a second area A2in the context of the figures. As shown in the figures, a common electrode115is formed on a transparent substrate111in each of the first and second areas A1and A2. The common electrode115has a plate shape. The common electrode115is formed of a transparent conductive material such as indium tin oxide and indium zinc oxide. A gate electrode126and a common line120are formed on the substrate111including the common electrode115. The gate electrode126and the common line120may be formed of a metallic material. The common line120is disposed on and contacts the common electrode115. First and second sub-pixels RSP and BSP are defined in both sides of the first area A1with respect to the common line120. Third and fourth sub-pixels (not shown) are also defined in both sides of the second area A2with respect to the common line120. In one embodiment, first and second gate lines (not shown) are formed of the same material and on the same layer as the gate electrode126and the common line120. The first and second gate lines are formed in the same direction as the common line120, and the common line120is disposed between the first and second gate lines. The common line120electrically separates from the first and second gate lines. The gate electrode126is connected to each of the first and second gate lines.

A gate insulating layer130is formed on substantially an entire surface of the substrate100including the gate electrode126and the common line120thereon. An active layer136of intrinsic amorphous silicon is formed on the gate insulating layer130over the gate electrode126, and an ohmic contact layer138of impurity-doped amorphous silicon is formed on the active layer136. The active layer136and the ohmic contact layer138constitute a semiconductor layer134. On the other hand, an intrinsic amorphous silicon layer135and an impurity-doped amorphous silicon layer139may be sequentially formed in a region where first and second data lines are formed. The intrinsic amorphous silicon layer135is connected to the active layer136, and the impurity-doped amorphous silicon layer139is connected to the ohmic contact layer138. The intrinsic amorphous silicon layer135and the impurity-doped amorphous silicon layer139partially overlap the common line120. The intrinsic amorphous silicon layer135and the impurity-doped amorphous silicon layer139may be omitted.

A source electrode147and a drain electrode149are formed on the substrate111including the active layer136, the ohmic contact layer138, the intrinsic amorphous silicon layer135, and the impurity-doped amorphous silicon layer139thereon. The source and drain electrodes147and149are spaced apart from each other over the gate electrode126. A first data line145aofFIG. 5and a second data line145bare also formed. A part of each of the first and second data lines145aand145bfunctions as the source electrode147. As stated above, the first and second data lines145aand145bare disposed on the impurity-doped amorphous silicon layer139, and thus partially overlap the common line120.

A passivation layer153is formed on substantially an entire surface of the substrate111including the first and second data lines145aand145b, the source electrode147, and the drain electrode149thereon. The passivation layer153has a drain contact hole155partially exposing the drain electrode149. An auxiliary pixel electrode connecting line160and pixel electrodes163are formed on the passivation layer153in each of the sub-pixels RSP and BSP. The auxiliary pixel electrode connecting line160is connected to the drain electrode149through the drain contact hole155. The auxiliary pixel electrode connecting line160overlaps the common line120. The pixel electrodes163are connected to the auxiliary pixel electrode connecting line160and thus are electrically connected to the drain electrode149. The pixel electrodes163are spaced apart from each other and overlap the common electrode115. The pixel electrodes163and the auxiliary pixel electrode160are formed of a transparent conductive material such as indium tin oxide and indium zinc oxide.

The array substrate illustrated inFIGS. 5,6,7and8may be attached to a color filter substrate, which includes red, green, blue and white color filter patterns. A liquid crystal material is interposed between the attached array substrate and color filter substrate to thereby form an LCD device according to one embodiment. The red, blue, green and white color filter patterns correspond to the first, second, third and fourth sub-pixels RSP, BSP, GSP and WSP ofFIGS. 5,6,7and8, respectively. In one embodiment, the white color filter pattern is smaller than the red, green and blue color filter patterns, and the red, green and blue color filter patterns have substantially the same size. In the LCD device according to one embodiment, since the white sub-pixel is smaller than the red, green and blue sub-pixels, the brightness of the LCD device is increased, and color purities are also increased as compared with the related art LCD device having a pixel of the same size. Accordingly, image quality may be improved.

Moreover, the liquid crystal molecules are driven by an electric field parallel to the substrates, and thus viewing angles are improved. In addition, the common and pixel electrodes are formed of a transparent conductive material, and the brightness may be increased. Furthermore, because the common electrode has a plate shape, degrees of freedom in designing the LCD device are increased.

FIGS. 9,10and11are views illustrating other examples according to an embodiment. Here, the structure of the common line is varied, and other parts have substantially the same structures as parts inFIGS. 4 and 5. Accordingly, the explanation for the same parts may be omitted.

InFIG. 9, a common line220is formed in the same direction as first and second gate lines223aand223b. The common line220includes first, second, third and fourth parts220a,220b,220cand220d. The first, second, third and fourth parts220a,220b,220cand220dare sequentially connected to each other. In one embodiment, the first part220aand the third part220care parallel to first and second data lines245aand245b, and the second part220band the fourth part220dare parallel to the first and second gate lines223aand223b. The first part220ais disposed in a first area A1, and the third part220cis disposed in a second area A2. The second part220bis disposed substantially in the first area A1and crosses the second data line245b. The fourth part220dis disposed substantially in the second area A2and crosses the first data line245a. The second and fourth parts220band220dare not disposed on a line. The first area A1is divided into first and second sub-pixels RSP and BSP by the second part220b, and the second area A2is divided into third and fourth sub-pixels GSP and WSP by the fourth part220d. The first, second and third sub-pixels RSP, BSP and GSP have substantially the same size, and the fourth sub-pixel WSP has a smaller size than the first, second and third sub-pixels RSP, BSP and GSP according to one embodiment.

InFIG. 10, a common line320is formed in the same direction as first and second gate lines323aand323b. The common line320includes first, second, third and fourth parts320a,320b,320cand320d. The first, second, third and fourth parts320a,320b,320cand320dare sequentially connected to each other. The first part320aand the third part320care parallel to first and second data lines345aand345b, and the second part320band the fourth part320dare parallel to the first and second gate lines323aand323b. The first part320ais disposed in the second area A2, and the third part320cis disposed in the first area A1. The second part320bis disposed substantially in the first area A1and crosses the first data line245a. The fourth part320dis disposed substantially in the second area A2and crosses the second data line245b. The second and fourth parts320band320dare not disposed on a line. The first area A1is divided into first and second sub-pixels RSP and BSP by the second part320b, and the second area A2is divided into third and fourth sub-pixels GSP and WSP by the fourth part320d. The first, second and third sub-pixels RSP, BSP and GSP have substantially the same size, and the fourth sub-pixel WSP has a smaller size than the first, second and third sub-pixels RSP, BSP and GSP according to one embodiment.

InFIG. 11, a common line420is formed in the same direction as first and second gate lines423aand423b. The common line420includes first, second and third parts420a,420band420c. The first part420ais connected to the second and third parts420band420c. The first part420ais parallel to the first and second gate lines423aand423band crosses the first and second data lines445aand445b. The second part420bis disposed in the first area A1and is indented toward the first gate line423a. The third part420cis disposed in the second area A2and is indented toward the second gate line423b. The first area A1is divided into first and second sub-pixels RSP and BSP by the second part420b, and the second area A2is divided into third and fourth sub-pixels GSP and WSP by the third part420c. The first, second and third sub-pixels RSP, BSP and GSP have substantially the same size, and the fourth sub-pixel WSP has a smaller size than the first, second and third sub-pixels RSP, BSP and GSP according to one embodiment.

InFIGS. 9,10and11, the parts of the common line parallel to the gate lines cross the data lines, and thus overlapping portions between the common line and the data lines are decreased as compared with the LCD device according to the embodiment shown inFIG. 4. Therefore, parasitic capacitances may be decreased, and signal delays may be improved. Although there is a difference in the sizes between the sub-pixels, the difference is small because the common line has a smaller area than the sub-pixels. Accordingly, the color purities are not particularly affected. Meanwhile, by controlling the size of a black matrix in each sub-pixel, the red, green and blue sub-pixels may have the same size.

FIG. 12is a schematic plan view of an array substrate for an LCD device according to an embodiment. In the LCD device of this embodiment, common and pixel electrodes are formed on different substrates. InFIG. 12, first and second gate lines523aand523bare formed in a first direction, and first and second data lines545aand545bare formed in a second direction. The first and second gate lines523aand523band the first and second data lines545aand545bcross each other to define first, second, third and fourth sub-pixels RSP, BSP, GSP and WSP. The first, second, third and fourth sub-pixels RSP, BSP, GSP and WSP constitute one pixel. The pixel is divided into a first area A1and a second area A2adjacent to each other along the first direction. The first area A1includes the first and second sub-pixels RSP and BSP adjacent to each other along the second direction, and the second area A2includes the third and fourth sub-pixels GSP and WSP adjacent to each other along the second direction. The fourth sub-pixel WSP has a smaller size than the first, second and third sub-pixels RSP, BSP and GSP, and the first, second and third sub-pixels RSP, BSP and GSP have substantially the same size according to one embodiment.

The second gate line523bincludes first, second, third and fourth portions. The first, second, third and fourth portions are sequentially connected to each other. The first and third portions are parallel to the first and second data lines545aand545band overlap the first and second data lines545aand545b, respectively. The second and fourth portions are parallel to the first gate line523a. The second portion is disposed in the first area A1, and the fourth portion is disposed in the second area A2. The second and fourth portions are not disposed on a line.

A thin film transistor Tr is formed on each crossing point of the first and second gate lines523aand523band the first and second data lines545aand545b. The thin film transistor Tr includes a gate electrode526, an active layer534, a source electrode547and a drain electrode549. A pixel electrode563is formed in each of the first, second, third and fourth sub-pixels RSP, BSP, GSP and WSP and is connected to the drain electrode549.

The first area A1has a first width W1, and the second area A2has a second width W2. Thus, the first and second sub-pixels RSP and BSP have the first width W1, and the third and fourth sub-pixels GSP and WSP have the second width W2. The pixel has a third width W3that is wider than the sum of the first and second widths W1and W2.

The first sub-pixel RSP has a first length L1, the second sub-pixel BSP has a second length L2, the third sub-pixel GSP has a third length L3, and the fourth sub-pixel WSP has a fourth length L4. The first area A1has a fifth length L5, and the second area A2has a sixth length L6. The fifth length L5is longer than the sum of the first and second lengths L1and L2, and the sixth length L6is longer than the sum of the third and fourth lengths L3and L4. The fifth length L5equals to the sixth length L6. The fifth and sixth lengths L5and L6correspond to a length of the pixel. The first length L1and the second length L2equal to each other, and the third length L3is longer than the fourth length L4. Thus, the first and second lengths L1and L2are shorter than the third length L3and longer than the fourth length L4according to one embodiment. Here, since the first, second and third sub-pixels RSP, BSP and GSP have the same size, the first width W1is wider than the second width W2.

In one embodiment, a common electrode may be formed on a color filter substrate facing the array substrate. Accordingly, only the pixel electrode is formed in each of the sub-pixels, and design is easy as compared with alternate embodiments.

FIGS. 13A and 13Bare plan views of a color filter substrate according to an embodiment. The color filter substrate can be used in multiple embodiments. The color filter substrate for one embodiment further includes a common electrode as compared to that of alternate embodiments.

InFIGS. 13A and 13B, red, blue, green and white color filter patterns R, B, G, and W are formed in first, second, third and fourth sub-pixels of various embodiments, respectively. The white color filter pattern W is smaller than the red, blue and green color filter patterns R, B and G, and the red, blue and green color filter patterns R, B and G have substantially the same size. A black matrix610is formed between adjacent color filter patterns R, B, G and W. The black matrix610corresponds to the gate lines, the data lines, the thin film transistors and the common line in one embodiment or corresponds to the gate lines, the data lines and the thin film transistors in an alternate embodiment. The color filter patterns R, B, G and W may overlap the black matrix610. An overcoat layer may be further formed on the color filter patterns R, B, G and W. In the fourth sub-pixel, the overcoat layer may be substituted for the white color filter pattern W.

In one embodiment, a common electrode may be formed on substantially an entire surface of a substrate including the color filter patterns R, B, G and W and the black matrix610. By changing the structure of the black matrix610, the color filter substrate can be used for other examples of various embodiments.

In the present embodiments, since the white sub-pixel has a smaller size than other sub-pixels, the brightness and the color purities are increased. Therefore, image qualities are improved. Moreover, in the case of an LCD device having the common and pixel electrodes on the same substrate, the common and pixel electrodes are formed of a transparent conductive material, and thus the brightness is more increased. In addition, because the common electrode has a plate shape and overlaps the pixel electrodes, only the width of the pixel electrodes and the distance between the pixel electrodes are considered when the LCD device is designed. Accordingly, the degrees of freedom in designing the LCD device are increased.