Liquid crystal display device

A liquid crystal display device preventing flicker. The liquid crystal display device includes a plurality of pixels each having a transistor, a liquid crystal element to which a first signal and a second signal having opposite polarities are alternately applied through the transistor, and a capacitor including a first electrode and a second electrode. The liquid crystal element includes a pixel electrode and a common electrode partly overlapping with each other with an insulating film interposed therebetween, and a liquid crystal layer over the pixel electrode and the common electrode. The first electrode of the capacitor is electrically connected to the pixel electrode. The potential of the second electrode changes between a first potential and a second potential having different levels after the first signal is applied until the second signal is applied, whereby a change in the voltage applied to the liquid crystal layer is reduced.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a semiconductor device. In particular, the present invention relates to an active matrix liquid crystal display device.

2. Description of the Related Art

As a novel semiconductor combining high mobility of crystalline silicon with uniform element characteristics of amorphous silicon, a metal oxide with semiconductor properties, which is called an oxide semiconductor, has attracted attention. The metal oxide is used for various applications; for example, a well-known metal oxide, indium oxide is used for a light-transmitting pixel electrode in a liquid crystal display device, a light-emitting device, or the like. Examples of the metal oxides with semiconductor properties include tungsten oxide, tin oxide, indium oxide, and zinc oxide. It has already been known that such a metal oxide with semiconductor properties is used for a channel formation of a transistor (Patent Documents 1 and 2).

REFERENCES

Patent Documents

SUMMARY OF THE INVENTION

Low power consumption is one of the key points in evaluating the performance of a semiconductor display device, and a liquid crystal display device is no exception in this regard. Particularly when used for portable electronic devices such as cellular phones, the liquid crystal display device definitely needs to have low power consumption because an increase in the power consumption of the liquid crystal display device causes a reduction in continuous operation time.

In view of the above technical background, an object of one embodiment of the present invention is to provide a liquid crystal display device with low power consumption.

In a liquid crystal display device of one embodiment of the present invention, an insulated-gate field-effect transistor (hereinafter, simply referred to as a transistor) with extremely low off-state current is provided in a pixel in order to keep display of images on a pixel portion after the writing of image signals to the pixel portion is stopped. By using the above transistor as an element for controlling the supply of voltage to a liquid crystal element included in the pixel, the voltage applied to the liquid crystal element can be held for a long time. Thus, for example, in the case where image signals having the same image data are repeatedly written to the pixel portion during continuous frame periods as in the case of displaying a still image, the displayed image can be maintained even when the driving frequency is lowered by temporarily stopping the writing of image signals to the pixel portion, that is, even when the number of times of writing of image signals in a certain period is reduced.

Further, a liquid crystal display device of one embodiment of the present invention includes a liquid crystal element which includes a pixel electrode and a common electrode that partly overlap with each other with an insulating film interposed therebetween, and a liquid crystal layer to which an electric field is applied from the pixel electrode and the common electrode. A pixel includes a capacitor in addition to a transistor and the liquid crystal element. A first electrode of the capacitor is electrically connected to the pixel electrode. After an image signal having a first polarity is written to the pixel, the potential of a second electrode of the capacitor changes between a first potential and a second potential which have different levels until an image signal having a second polarity is written to the pixel.

One embodiment of the present invention allows a liquid crystal display device with low power consumption to be provided.

DETAILED DESCRIPTION OF THE INVENTION

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. Note that the present invention is not limited to the following description and it is easily understood by those skilled in the art that the mode and details can be variously changed without departing from the scope and spirit of the present invention. Accordingly, the present invention should not be construed as being limited to the description of the embodiments below.

Note that in this specification, a panel in which liquid crystal elements are formed in respective pixels, and a module in which an IC or the like including a driver circuit or a controller is mounted on the panel fall into the category of a liquid crystal display device. Further, an element substrate corresponding to one mode before a liquid crystal element is completed in a manufacturing process of a liquid crystal display device falls into the category of the liquid crystal display device of one embodiment of the present invention. In the element substrate, each of a plurality of pixels is provided with a transistor, a pixel electrode and a common electrode which are used for a liquid crystal element, and a capacitor.

In addition, the liquid crystal display device of one embodiment of the present invention may include a touch panel which is a position input device capable of detecting a position pointed at with a finger, a stylus, or the like and generating a signal including the positional information.

<Example of Structure of Pixel>

FIG. 1Aillustrates an example of a structure of a pixel included in the liquid crystal display device of one embodiment of the present invention. A pixel10illustrated inFIG. 1Aincludes a liquid crystal element11, a transistor12controlling the supply of an image signal to the liquid crystal element11, and a capacitor13.

The liquid crystal element11includes a pixel electrode, a common electrode, and a liquid crystal layer which contains a liquid crystal material and to which a voltage is applied across the pixel electrode and the common electrode.FIG. 1Aillustrates a fringe field switching (FFS) mode liquid crystal element11, in which case the pixel electrode and the common electrode partly overlap with each other with an insulating film interposed therebetween. This overlapping area serves as a capacitor for holding a voltage VLCapplied between the pixel electrode and the common electrode. Such a capacitor is denoted as a capacitor14inFIG. 1A.

The transistor12controls whether the potential of an image signal input to a wiring SL is applied to the pixel electrode of the liquid crystal element11. A predetermined reference potential VCOM1is applied to the common electrode of the liquid crystal element11.

Hereinafter, the connection relationship among the liquid crystal element11, the transistor12, and the capacitor13will be described in detail.

Note that in this specification, the term “connection” means electrical connection and corresponds to a state in which a current, a voltage, or a potential can be supplied or transmitted. Therefore, a state of being “connected” means not only a state of direct connection but also a state of indirect connection through an element such as a wiring, a resistor, a diode, or a transistor so that a current, a voltage, or a potential can be supplied or transmitted.

In addition, even when different components are connected to each other in a circuit diagram, there is actually a case where one conductive film has functions of a plurality of components, for example, a case where part of a wiring serves as an electrode. In this specification, the term “connection” also means such a case where one conductive film has functions of a plurality of components.

The terms “source” and “drain” of a transistor interchange with each other depending on the type of the channel of the transistor or levels of potentials applied to the terminals. In general, in an n-channel transistor, a terminal to which a lower potential is applied is called a source, and a terminal to which a higher potential is applied is called a drain. In a p-channel transistor, a terminal to which a lower potential is applied is called a drain, and a terminal to which a higher potential is applied is called a source. In this specification, the connection relation of the transistor is described in some cases assuming that the source and the drain are fixed for convenience; actually, the names of the source and the drain interchange with each other depending on the relation of the potentials.

A source of a transistor means a source region that is part of a semiconductor film functioning as an active layer or a source electrode that is connected to the semiconductor film. Similarly, a drain of a transistor means a drain region that is part of the semiconductor film or a drain electrode that is connected to the semiconductor film. A gate means a gate electrode.

In the pixel10illustrated inFIG. 1A, a gate of the transistor12is electrically connected to a wiring GL. One of a source and a drain of the transistor12is connected to the wiring SL, and the other of the source and the drain of the transistor12is connected to the pixel electrode of the liquid crystal element11. The capacitor13includes a pair of electrodes: one electrode is electrically connected to the pixel electrode of the liquid crystal element11, and a predetermined potential VCOM2is applied to the other electrode.

Note that the pixel10may further include another circuit element such as a transistor, a diode, a resistor, a capacitor, or an inductor as needed.

FIG. 1Ashows an example in which one transistor12is used as a switch for controlling the input of an image signal to the pixel10. Alternatively, the pixel10may include a plurality of transistors functioning as one switch. In the case where a plurality of transistors function as a switch, they may be connected in parallel, in series, or in combination of parallel connection and series connection.

Note that in this specification, a state in which transistors are connected to each other in series means, for example, a state in which only one of a source and a drain of a first transistor is connected to only one of a source and a drain of a second transistor. In addition, a state in which transistors are connected to each other in parallel means a state in which one of a source and a drain of a first transistor is connected to one of a source and a drain of a second transistor and the other of the source and the drain of the first transistor is connected to the other of the source and the drain of the second transistor.

In one embodiment of the present invention, the transistor12has an extremely low off-state current, so that the voltage applied to the liquid crystal element11can be held for a long time. Thus, for example, in the case where image signals having the same image data are written to the pixel10during continuous frame periods as in the case of displaying a still image, the displayed gray scale can be maintained even when the driving frequency is lowered, that is, even when the number of times of writing of image signals to the pixel10in a certain period is reduced. For example, by using a highly purified oxide semiconductor for a channel formation region of the transistor12, the interval between writings of image signals can be made longer than or equal to 10 seconds, preferably longer than or equal to 30 seconds, and more preferably longer than or equal to one minute. An increase in the interval between writings of image signals results in a reduction in power consumption.

By performing inversion driving, in which the polarity of the potential of an image signal is inverted on the basis of the potential VCOM1of the common electrode, degradation of a liquid crystal material called burn-in can be prevented. However, in the inversion driving, a change in the potential applied to the wiring SL is increased at the time of the change in the polarity of the image signal; thus, a potential difference between the source and the drain of the transistor12serving as a switch is increased. Accordingly, deterioration in characteristics such as a shift in threshold voltage is easily caused in the transistor12. In particular, in the case of a horizontal electric field mode liquid crystal display device, such as an FFS mode liquid crystal display device as shown in one embodiment of the present invention, a potential difference between an image signal having a positive polarity and an image signal having a negative polarity tends to be larger than that in another mode liquid crystal display device. For example, in the case where a liquid crystal layer includes a TN liquid crystal, the potential difference is about ten volts; in the case where the liquid crystal layer includes a liquid crystal exhibiting a blue phase, the potential difference is as large as several tens of volts. Therefore, in the case of the horizontal electric field mode liquid crystal display device, the potential difference increases and deterioration in the electrical characteristics of the transistor12is highly likely to occur. Further, in order to maintain the voltage held in the liquid crystal element11, the off-state current of the transistor12needs to be low even when the potential difference between the source and the drain is large. When a semiconductor having a wider bandgap and lower intrinsic carrier density than silicon or germanium, such as an oxide semiconductor, is used for the transistor12, the withstand voltage of the transistor12can be increased and the off-state current can be made extremely low. Thus, as compared to the case where a transistor including a normal semiconductor such as silicon or germanium is used, degradation of the transistor12can be prevented and the voltage held in the liquid crystal element11can be maintained.

Note that even when a small amount of charge is leaked through the transistor12, the electric field applied to the liquid crystal layer might vary depending on some factors after the writing of an image signal is completed.

One of the factors in changing the electric field applied to the liquid crystal layer is adsorption of ionic impurities on an alignment film. A liquid crystal material includes ionic impurities, and when the impurities are adsorbed on the alignment film, an electric field called residual DC is generated around the alignment film. The residual DC caused by the adsorption of the impurities changes the electric field applied to the liquid crystal layer even after the writing of the image signal is completed, thereby changing the transmittance of the liquid crystal element11. The residual DC increases when a direct-current voltage is applied to the liquid crystal element for a longer time. Hence, in the case of the driving method with a long interval between writings of image signals as in one embodiment of the present invention, the transmittance is more likely to vary than that in the case of a normal driving method with a frame frequency of about 60 Hz.

Another factor in changing the electric field applied to the liquid crystal layer is a leakage current through the liquid crystal element11. When a voltage is applied to the liquid crystal element11, a small amount of leakage current flows between the pixel electrode and the common electrode through the liquid crystal layer; accordingly, the absolute value of a voltage applied to the liquid crystal element11decreases over time. Hence, in the case of the driving method with a long interval between writings of image signals as in one embodiment of the present invention, the transmittance is more likely to vary than that in the case of a normal driving method with a frame frequency of about 60 Hz.

Still another factor in changing the electric field applied to the liquid crystal layer is accumulation of charge due to a difference in electrical characteristics between the alignment film and the liquid crystal layer. A leakage current flows in the liquid crystal element11through the alignment film and the liquid crystal layer. Therefore, the density of leakage current through the alignment film is equal to that of leakage current through the liquid crystal layer. However, the alignment film and the liquid crystal layer have a difference in relaxation time τ which is proportional to the product of dielectric constant ∈ and resistivity ρ. Thus, when a leakage current flows in the liquid crystal element11, charge is accumulated in the vicinity of the interface between the alignment film and the liquid crystal layer by Maxwell-Wagner polarization, and an electric field called residual DC is generated around that interface. Specifically, in the case where the alignment film has a longer relaxation time τ than the liquid crystal layer, residual DC due to the difference in relaxation time τ is generated in the direction opposite to the electric field between the pixel electrode and the common electrode, and the electric field applied to the liquid crystal layer changes so as to decrease over time. On the contrary, in the case where the alignment film has a shorter relaxation time τ than the liquid crystal layer, residual DC due to the difference in relaxation time τ is generated in the same direction as the electric field between the pixel electrode and the common electrode, and the electric field applied to the liquid crystal layer changes so as to increase over time. The residual DC caused by the difference in relaxation time τ changes the electric field applied to the liquid crystal layer even after the writing of the image signal is completed, thereby changing the transmittance of the liquid crystal element11. The residual DC increases when a direct-current voltage is applied to the liquid crystal element for a longer time. Hence, in the case of the driving method with a long interval between writings of image signals as in one embodiment of the present invention, the transmittance is more likely to vary than that in the case of a normal driving method with a frame frequency of about 60 Hz.

<Comparative Example of Pixel>

FIG. 17Aillustrates a structure of a pixel20which is a comparative example showing a change in the transmittance after the writing of an image signal is completed. The pixel20illustrated inFIG. 17Aincludes a liquid crystal element21, a transistor22controlling the supply of an image signal to the liquid crystal element21, and a capacitor23.

The liquid crystal element21includes a pixel electrode, a common electrode, and a liquid crystal layer which contains a liquid crystal material and to which a voltage is applied across the pixel electrode and the common electrode. InFIG. 17A, the liquid crystal element21may have an area in which the pixel electrode and the common electrode overlap with each other with an insulating film interposed therebetween as in a fringe field switching (FFS) mode, or may have an area in which the pixel electrode and the common electrode overlap with each other with the liquid crystal layer interposed therebetween as in a twisted nematic (TN) mode. In the case of the FFS mode liquid crystal element21, the capacitor23corresponds to a capacitor formed in the area in which the pixel electrode and the common electrode overlap with each other. In both cases of the FFS mode liquid crystal element21and the TN mode liquid crystal element21, the capacitor23serves as a capacitor for holding a voltage VLCapplied between the pixel electrode and the common electrode.

In the pixel20illustrated inFIG. 17A, a gate of the transistor22is connected to a wiring GL. One of a source and a drain of the transistor22is connected to a wiring SL, and the other of the source and the drain of the transistor22is connected to the pixel electrode of the liquid crystal element21. The capacitor23includes a pair of electrodes: one electrode is connected to the pixel electrode of the liquid crystal element21, and the other electrode is connected to the common electrode of the liquid crystal element21. A potential VCOMis applied to the common electrode.

Description is made on the operation of the pixel20illustrated inFIG. 17Aand a change in the transmittance of the liquid crystal element21.

FIG. 17Bschematically shows an example of a change with time of the polarity of the voltage VLCapplied to the liquid crystal element21across the pixel electrode and the common electrode, the potential VCOM, and the transmittance of the liquid crystal element21. Note thatFIG. 17Bshows an example in which a normally-white liquid crystal material is used for the liquid crystal layer of the liquid crystal element21. Hence, inFIG. 17B, the transmittance of the liquid crystal element21decreases as a stronger electric field is applied to the liquid crystal layer; and the transmittance of the liquid crystal element21increases as a weaker electric field is applied to the liquid crystal layer. InFIG. 17B, arrows represent the timing at which an image signal is written to the pixel20, and image signals each including one gray scale as image data are sequentially written to the pixel20as an example.

In the pixel20, when the potential of an image signal input to the wiring SL is applied to the pixel electrode of the liquid crystal element21through the transistor22, the voltage VLCis applied to the liquid crystal element21. In the case where the potential of the image signal is higher than the potential VCOM, that is, the image signal has positive polarity, the voltage VLChas positive polarity. On the other hand, in the case where the potential of the image signal is lower than the potential VCOM, that is, the image signal has negative polarity, the voltage VLChas negative polarity. As illustrated inFIG. 17B, the voltage VLCapplied to the liquid crystal element21has positive polarity (+) and negative polarity (−) alternately in accordance with the timing at which the image signal is written to the pixel20.

In the case where the electric field applied to the liquid crystal layer of the liquid crystal element21decreases over time due to any of the aforementioned factors after the writing of the image signal is completed, the transmittance of the liquid crystal element21changes so as to increase between the writing of the image signal to the pixel20and the subsequent writing of another image signal to the pixel20as illustrated inFIG. 17B.

In other cases, the electric field applied to the liquid crystal layer of the liquid crystal element21increases over time due to any of the aforementioned factors after the writing of the image signal is completed. In that case, the transmittance of the liquid crystal element21changes so as to decrease between the writing of the image signal to the pixel20and the subsequent writing of another image signal to the pixel20.

As illustrated inFIG. 17B, the transmittance varies more significantly as the interval between writings of image signals increases. The changed transmittance is reset to the original value in accordance with the timing at which the subsequent image signal is written. Therefore, as the interval between writings of image signals increases, a change in the transmittance which occurs when an image signal is written is more likely to be perceived by human eyes as flicker.

In view of the above, in one embodiment of the present invention, after an image signal having a first polarity is written to the pixel10, the potential of the other electrode of the capacitor13changes between a first potential and a second potential which have different levels until an image signal having a second polarity is written to the pixel10.

FIG. 1Bschematically shows an example of a change with time of the polarity of the voltage VLCapplied to the liquid crystal element11across the pixel electrode and the common electrode, the potential VCOM1, the potential VCOM2, and the transmittance of the liquid crystal element11in the pixel10illustrated inFIG. 1A. Note thatFIG. 1Bshows an example in which a normally-white liquid crystal material is used for the liquid crystal layer of the liquid crystal element11as in the case ofFIG. 17B. InFIG. 1B, arrows represent the timing at which an image signal is written to the pixel10, and image signals each including one gray scale as image data are sequentially written to the pixel10as an example. Also inFIG. 1B, in addition to the transmittance of the liquid crystal element11which is denoted by a solid line, the transmittance of the liquid crystal element21included in the pixel20inFIG. 17Ais denoted by a dashed line.

In the pixel10, when the potential of an image signal input to the wiring SL is applied to the pixel electrode of the liquid crystal element11through the transistor12, the voltage VLCis applied to the liquid crystal element11. As illustrated inFIG. 1B, the voltage VLCapplied to the liquid crystal element11has positive polarity (+) and negative polarity (−) alternately in accordance with the timing at which the image signal is written to the pixel10.

Also inFIG. 1B, the potential VCOM2changes between a first potential (V1) and a second potential (V2) in accordance with the timing at which the image signal is written to the pixel10. Note that the first potential (V1) is lower than the second potential (V2) by ΔVd. Specifically, between the writing of an image signal having positive polarity to the pixel10and the subsequent writing of an image signal having negative polarity to the pixel10, the potential VCOM2changes from the first potential (V1) to the second potential (V2) so as to be increased by ΔVd. Thus, according to the principle of charge conservation, the potential of the pixel electrode of the liquid crystal element11is increased by ΔVd, whereby the absolute value of the voltage VLCapplied to the liquid crystal element11is increased by ΔVd.

In the case where the electric field applied to the liquid crystal layer of the liquid crystal element11decreases over time due to any of the aforementioned factors after the writing of the image signal is completed, a change with time of the electric field applied to the liquid crystal layer can be reduced by increasing the absolute value of the voltage VLCby ΔVd between the writing of the image signal to the pixel10and the subsequent writing of another image signal to the pixel10. As a result, as illustrated inFIG. 1B, a change in the transmittance of the liquid crystal element11which is denoted by a solid line can be made smaller than that of the liquid crystal element21which is denoted by a dashed line, so that the perception of flicker can be prevented.

On the contrary, in the case where the electric field applied to the liquid crystal layer of the liquid crystal element11increases over time due to any of the aforementioned factors after the writing of the image signal is completed, the transmittance of the liquid crystal element11changes so as to decrease between the writing of an image signal to the pixel10and the subsequent writing of another image signal to the pixel10. In that case, as illustrated inFIG. 1C, between the writing of an image signal having positive polarity to the pixel10and the subsequent writing of an image signal having negative polarity to the pixel10, the potential VCOM2changes from the second potential (V2) to the first potential (V1) so as to be lowered by ΔVd. With such a structure, the potential of the pixel electrode of the liquid crystal element11is lowered by ΔVd, whereby the absolute value of the voltage VLCapplied to the liquid crystal element11is lowered by ΔVd. Thus, in the case where the electric field applied to the liquid crystal layer of the liquid crystal element11increases over time, a change with time of the electric field applied to the liquid crystal layer can be reduced by reducing the absolute value of the voltage VLCby ΔVd between the writing of the image signal to the pixel10and the subsequent writing of another image signal to the pixel10. As a result, a change in the transmittance of the liquid crystal element11can be reduced, which prevents the perception of flicker.

The same applies to the case where a normally-black liquid crystal layer is used instead of the normally-white liquid crystal layer. That is to say, the potential VCOM2changes between the first potential (V1) and the second potential (V2) so as to reduce a change with time of the electric field applied to the liquid crystal layer, whereby a change in the transmittance of the liquid crystal element11can be reduced, which prevents the perception of flicker.

Moreover, in the liquid crystal display device of one embodiment of the present invention, the voltage VLCof the liquid crystal element can be held by the capacitor14, which results in a reduction in the area of the capacitor13. In other words, the perception of flicker can be prevented while the area of the capacitor13is reduced. Accordingly, high-definition pixels are achieved and the interval between writings of image signals can be increased; it is thus possible to provide an eye-friendly liquid crystal display device that gives less eye fatigue to a user.

<Example of Structure of Panel>

Next, description will be made on an example of the structure of a panel which corresponds to one embodiment of the liquid crystal display device.

In a panel30illustrated inFIG. 2, a pixel portion31includes a plurality of pixels10, wirings GL (wirings GL1to GLy, y: a natural number) for selecting the pixels10in each row, and wirings SL (wirings SL1to SLx, x: a natural number) for supplying image signals to the selected pixels10. A driver circuit32controls the input of signals to the wirings GL, and a driver circuit33controls the input of image signals to the wirings SL. Each of the plurality of pixels10is connected to at least one of the wirings GL and at least one of the wirings SL.

Note that the kinds and number of the wirings in the pixel portion31can be determined by the structure, number, and arrangement of the pixels10. Specifically, in the pixel portion31illustrated inFIG. 2, the pixels10are arranged in a matrix of x columns and y rows, and the wirings SL1to SLx and the wirings GL1to GLy are provided in the pixel portion31.

<Example of Operation of Pixel Portion>

Then, an example of the operation of the pixel portion31will be described usingFIG. 1AandFIG. 2as an example.

FIG. 3shows an example of a timing chart of the pixel portion31. Specifically,FIG. 3shows a change with time of the potential of a signal supplied to the wiring GL1, the potential of an image signal supplied to the wiring SL1, and the potential of the pixel electrode (GL1−SL1) of the liquid crystal element11included in the pixel10connected to the wiring GL1and the wiring SL1. Further,FIG. 3shows an example in which an n-channel transistor is used as the transistor12in the pixel10illustrated inFIG. 1A.

In a first frame period, a pulse signal is input to the wiring GL1, whereby the wiring GL1is selected. In each of the plurality of pixels10connected to the selected wiring GL1, the transistor12is turned on. In a period during which the transistor12is on (in one line period), the potential of an image signal is applied to each of the wirings SL1to SLx. On the basis of the potential of the image signal applied to each of the wirings SL1to SLx, charge is accumulated in the capacitor13and the capacitor14through the transistor12which is in the on state. Further, the potential of the image signal is applied to the pixel electrode of the liquid crystal element11through the transistor12in the on state.

The timing chart ofFIG. 3shows an example in which in a period during which the wiring GL1is selected in the first frame period, an image signal having positive polarity is input to the wiring SL1. Thus, an image signal having positive polarity is input to the pixel electrode (GL1−SL1) in the pixel10connected to the wiring GL1and the wiring SL1.

Note that a reference potential VCOM1such as a ground potential is applied to the common electrode of the liquid crystal element11. The image signal has positive polarity when having a potential higher than the reference potential VCOM1, and the image signal has negative polarity when having a potential lower than the potential VCOM1. Note that depending on the image data contained in the image signal, the potential of the image signal might be equal to the reference potential VCOM1. In the case where the potential of the image signal is equal to the reference potential VCOM1, the image signal can be regarded as an image signal having positive or negative polarity.

The transmittance of the liquid crystal element11changes when the alignment of liquid crystal molecules changes in accordance with the level of a voltage applied between the pixel electrode and the common electrode. Accordingly, when the transmittance of the liquid crystal element11is controlled by the potential of an image signal, gray-scale images can be displayed.

When the input of image signals to the wirings SL1to SLx is completed, the selection of the wiring GL1is terminated. When the selection of the wiring GL1is completed, the transistors12in the pixels10including the wiring GL1are turned off. Then, the voltage applied between the pixel electrode and the common electrode is held in the liquid crystal element11, so that the display of gray-scale image is maintained.

Similarly, the wirings GL2to GLy are sequentially selected, and the pixels10connected to the wirings GL2to GLy are sequentially subjected to the same operation as that performed while the wiring GL1is selected. Through the above operations, an image can be displayed on the pixel portion31.

In the timing chart ofFIG. 3, in the first frame period, the potential VCOM2applied to the other electrode of the capacitor13changes from the second potential (V2) to the first potential (V1) so as to be lowered by ΔVd. With such a structure, the potential of the pixel electrode of the liquid crystal element11is lowered by ΔVd, whereby the absolute value of the voltage VLCapplied to the liquid crystal element11is lowered by ΔVd. Thus, in the case where the electric field applied to the liquid crystal layer of the liquid crystal element11increases over time, a change with time of the electric field applied to the liquid crystal layer can be reduced by reducing the absolute value of the voltage VLCby ΔVd between the writing of the image signal to the pixel10and the subsequent writing of another image signal to the pixel10. As a result, even when the transmittance changes as indicated by a dashed line when the potential VCOM2is constant, a change in transmittance can be reduced as indicated by a solid line by changing the potential VCOM2from the second potential (V2) to the first potential (V1).

Note that in one embodiment of the present invention, the wirings GL1to GLy are not necessarily selected in sequence.

Next, in a second frame period, a pulse signal is input to the wiring GL1, whereby the wiring GL1is selected. In each of the plurality of pixels10connected to the selected wiring GL1, the transistor12is turned on. In a period during which the transistor12is on, the potential of an image signal is applied to each of the wirings SL1to SLx. On the basis of the potential of the image signal applied to each of the wirings SL1to SLx, charge is accumulated in the capacitor13and the capacitor14through the transistor12which is in the on state. Further, the potential of the image signal is applied to the pixel electrode of the liquid crystal element11through the transistor12in the on state.

The timing chart ofFIG. 3shows an example in which in a period during which the wiring GL1is selected in the second frame period, an image signal having negative polarity is input to the wiring SL1. Thus, an image signal having negative polarity is input to the pixel electrode (GL1−SL1).

When the transmittance of the liquid crystal element11is controlled by the potential of an image signal, gray-scale images can be displayed.

When the input of image signals to the wirings SL1to SLx is completed, the selection of the wiring GL1is terminated. When the selection of the wiring GL1is completed, the transistors12in the pixels10including the wiring GL1are turned off. Then, the voltage applied between the pixel electrode and the common electrode is held in the liquid crystal element11, so that the display of a gray-scale image is maintained.

Similarly, the wirings GL2to GLy are sequentially selected, and the pixels10connected to the wirings GL2to GLy are sequentially subjected to the same operation as that performed while the wiring GL1is selected. Through the above operations, an image can be displayed on the pixel portion31.

Also in the subsequent third frame period and fourth frame period, the panel30can be operated in a manner similar to that in the first frame period and the second frame period.

Note that in one embodiment of the present invention, after the input of image signals to all the pixels10in the pixel portion31is completed in one frame period, the operation of the driver circuit32and the driver circuit33can be stopped until the next frame period starts. When the operation of the driver circuit32is stopped, the selection of the wirings GL by the driver circuit32is stopped. When the operation of the driver circuit33is stopped, the input of image signals to the wirings SL by the driver circuit33is stopped. Through these operations, an image displayed on the pixel portion31is maintained.

Note that there is a limitation on a period during which the liquid crystal element11can maintain the display of a gray-scale image. Accordingly, in consideration of the period during which the liquid crystal element11can maintain the display of a gray-scale image, the maximum length of the frame period in a period during which no instruction is input for rewriting an image signal is set in advance. That is to say, in the case where a period during which a still image is displayed is longer than the maximum length of the frame period, the frame period is automatically ended even when there is no instruction for rewriting an image signal. Then, the same image signal is rewritten to the pixel portion31in the subsequent frame period, and the image displayed in the previous frame period is displayed again on the pixel portion31.

Alternatively, the frame period may be brought to an end in accordance with the instruction for rewriting an image signal from an input device or the like.

In one embodiment of the present invention, since the driver circuit32and the driver circuit33are operated intermittently, the number of times of writing image signals to the pixel portion31can be greatly reduced while the image is continuously displayed. For example, by using a highly purified oxide semiconductor for a channel formation region of the transistor12, the length of a frame period can be made longer than or equal to 10 seconds, preferably longer than or equal to 30 seconds, and more preferably longer than or equal to one minute. Accordingly, the drive frequency of the driver circuit32and the driver circuit32can be significantly reduced, leading to a reduction in the power consumption of the liquid crystal display device.

Note that in one embodiment of the present invention, it is possible to employ dot sequential driving in which image signals are sequentially input from the driver circuit33to the wirings SL1to SLx, or line sequential driving in which image signals are concurrently input from the driver circuit33to the wirings SL1to SLx. Alternatively, the liquid crystal display device of one embodiment of the present invention may employ a driving method in which image signals are sequentially input to every plural wirings SL.

The selection of the wirings GL may be performed by either progressive scan or interlaced scan.

Note that the response time of a liquid crystal from application of voltage to saturation of the change in transmittance is generally about ten milliseconds. Thus, the slow response of the liquid crystal tends to be perceived as a blur of a moving image. As a countermeasure, one embodiment of the present invention may employ overdriving in which a voltage applied to the liquid crystal element11is temporarily increased so that alignment of the liquid crystal is changed quickly. By overdriving, the response speed of the liquid crystal can be increased, a blur of a moving image can be prevented, and the quality of the moving image can be improved.

Further, if the transmittance of the liquid crystal element11keeps changing without reaching a constant value after the transistor12is turned off, the relative dielectric constant of the liquid crystal also changes; accordingly, the voltage held in the liquid crystal element11easily changes. In particular, in the case where the capacitor13and the capacitor14connected to the liquid crystal element11have small capacitance as in one embodiment of the present invention, the change in the voltage held in the liquid crystal element11tends to occur remarkably. However, by the overdriving, the response time can be shortened and therefore the change in the transmittance of the liquid crystal element11after the transistor12is turned off can be made small. Hence, even in the case where the capacitor13and the capacitor14connected in parallel to the liquid crystal element11have small capacitance, it is possible to prevent the change in the voltage held in the liquid crystal element11after the transistor12is turned off.

<Specific Example of Structure of Panel>

In one embodiment of the present invention, frame inversion driving, source line inversion driving, gate line inversion driving, or dot inversion driving can be employed. The frame inversion driving is a driving method in which image signals having the same polarity are input to all the pixels10in one frame period. The source line inversion driving is a driving method in which image signals having opposite polarities are input to the pixels10connected to one of the wirings SL and the pixels10connected to another wiring SL adjacent to the above wiring SL in one frame period. The gate line inversion driving is a driving method in which image signals having opposite polarities are input to the pixels10connected to one of the wirings GL and the pixels10connected to another wiring GL adjacent to the above wiring GL in one frame period. The dot inversion driving is a driving method in which image signals having opposite polarities are input to the pixels10lying next to each other among the plurality of pixels10connected to one of the wirings SL in one frame period, and image signals having opposite polarities are input to the pixels10lying next to each other among the plurality of pixels10connected to one of the wirings GL in one frame period.

The layout of wirings CL each connected to the other electrode of the capacitor13may be changed as appropriate depending on the above driving methods.

FIG. 4illustrates a specific example of the structure of the panel30employing the source line inversion driving.

In the panel30illustrated inFIG. 4, as in the panel30illustrated inFIG. 2, the pixel portion31includes the plurality of pixels10, the wirings GL (the wirings GL1to GLy) for selecting the pixels10in each row, and the wirings SL (the wirings SL1to SLx) for supplying image signals to the selected pixels10. The driver circuit32controls the input of signals to the wirings GL, and the driver circuit33controls the input of image signals to the wirings SL. Each of the plurality of pixels10is connected to at least one of the wirings GL and at least one of the wirings SL.

The panel30illustrated inFIG. 4also includes a plurality of wirings CL (wirings CL1to CLx). InFIG. 4, the pixels10connected to one of the wirings SL are connected to one of the wirings CL. All the wirings CL satisfying CL2m+1 (m: an integer greater than or equal to 0,2m+2≦x) are electrically connected to each other and have the same potential VCOM2a. All the wirings CL satisfying CL2m+2 are electrically connected to each other and have the same potential VCOM2b. In accordance with the timing at which image signals are written to the pixels10, one of the potential VCOM2aapplied to the wiring CL2m+1 and the potential VCOM2bapplied to the wiring CL2m+2 changes from the first potential (V1) to the second potential (V2), and the other changes from the second potential (V2) to the first potential (V1).

FIG. 6Aillustrates a specific example of the connection between the pixel10connected to a wiring SLi (i: a natural number greater than or equal to 1 and less than or equal to x) and a wiring GLj (j: a natural number greater than or equal to 1 and less than or equal to y−1), and the pixel10connected to the wiring SLi and the wiring GLj+1. As illustrated inFIG. 6A, in the panel30inFIG. 4, the other electrode of the capacitor13in each of the pixels10connected to the wiring SLi is electrically connected to a wiring CLi.

FIG. 5illustrates a specific example of the structure of the panel30employing the gate line inversion driving.

In the panel30illustrated inFIG. 5, as in the panel30illustrated inFIG. 2, the pixel portion31includes the plurality of pixels10, the wirings GL (the wirings GL1to GLy) for selecting the pixels10in each row, and the wirings SL (the wirings SL1to SLx) for supplying image signals to the selected pixels10. The driver circuit32controls the input of signals to the wirings GL, and the driver circuit33controls the input of image signals to the wirings SL. Each of the plurality of pixels10is connected to at least one of the wirings GL and at least one of the wirings SL.

The panel30illustrated inFIG. 5also includes a plurality of wirings CL (wirings CL1to CLy). InFIG. 5, the pixels10connected to one of the wirings GL are connected to one of the wirings CL. All the wirings CL satisfying CL2n+1 (n: an integer greater than or equal to 0,2n+2≦y) are electrically connected to each other and have the same potential VCOM2a. All the wirings CL satisfying CL2n+2 are electrically connected to each other and have the same potential VCOM2b. In accordance with the timing at which image signals are written to the pixels10, one of the potential VCOM2aapplied to the wiring CL2n+1 and the potential VCOM2bapplied to the wiring CL2n+2 changes from the first potential (V1) to the second potential (V2), and the other changes from the second potential (V2) to the first potential (V1).

FIG. 6Billustrates a specific example of the connection between the pixel10connected to the wiring SLi and the wiring GLj, and the pixel10connected to the wiring SLi+1 and the wiring GLj. As illustrated inFIG. 6B, in the panel30inFIG. 5, the other electrode of the capacitor13in each of the pixels10connected to the wiring GLj is electrically connected to a wiring CLj.

Note that parasitic capacitance is formed between the pixel electrode of the liquid crystal element11and the wiring SL for inputting an image signal to the pixel10. In the case where the capacitor13and the capacitor14connected to the liquid crystal element11have small capacitance, the potential of the pixel electrode is likely to be affected by the parasitic capacitance. Hence, there easily occurs a phenomenon called crosstalk: when the potential of the wiring SL changes in the period during which the potential of the image signal is held, the potential of the pixel electrode also fluctuates accordingly, and this crosstalk lowers the contrast.

In view of the above, the pixels are driven by the source line inversion driving or the dot inversion driving, in which case image signals having opposite polarities are input to a pair of wirings SL facing each other with the pixel electrode interposed therebetween. As a result, the potentials of a pair of wirings SL lying next to each other change in opposite directions, whereby the fluctuation of the potential of a given pixel electrode can be cancelled out; thus, occurrence of crosstalk can be prevented.

Note that the wirings CL can have various functions. For example, the wirings CL can be used as wirings for an in-cell touch sensor. The touch sensor can be achieved by, for example, reading a change in the capacitance between the wiring CLi inFIG. 6Aand the wiring CLj inFIG. 6B.

<Example of Structure of Liquid Crystal Display Device>

Next, description will be made on an example of the structure of the liquid crystal display device of one embodiment of the present invention.

FIG. 7is a block diagram illustrating an example of the structure of the liquid crystal display device of one embodiment of the present invention. A liquid crystal display device40illustrated inFIG. 7includes the panel30provided with the plurality of pixels10in the pixel portion31, a controller41, and a power source circuit47. The liquid crystal display device40illustrated inFIG. 7also includes an input device42, a CPU43, an image processing circuit44, and an image memory45. Also in the liquid crystal display device40illustrated inFIG. 7, the driver circuit32and the driver circuit33are provided in the panel30.

Note that the controller41has a function of supplying the panel30with various driving signals for controlling the operation of the driver circuit32, the driver circuit33, or the like. Examples of the driving signals include a start pulse signal for controlling the operation of the driver circuit33, a clock signal for the driver circuit33, a start pulse signal for controlling the operation of the driver circuit32, and a clock signal for the driver circuit32.

The input device42has a function of applying data or an instruction to the CPU43included in the liquid crystal display device40. For example, an instruction to transfer the panel30from an operation state to a non-operation state, or an instruction to transfer the pixel portion31from a non-operation state to an operation state can be given to the CPU43by the input device42. As the input device42, a keyboard, a pointing device, a touch panel, or the like can be used.

The CPU43has a function of decoding an instruction input from the input device42and executing the instruction by totally controlling the operation of various circuits included in the liquid crystal display device40.

For example, in the case where the instruction to transfer the pixel portion31from the operation state to the non-operation state is sent from the input device42, the CPU43gives an instruction to the controller41to stop the supply of a power source voltage Vp from the power source circuit47to the pixel portion31, and to stop the supply of a driving signal to the panel30.

In the case where an instruction to transfer the pixel portion31from the non-operation state to the operation state is sent from the input device42, the CPU43gives the instruction to the controller41to restart the supply of the power source voltage Vp from the power source circuit47to the pixel portion31, and to restart the supply of the driving signal to the panel30.

The image memory45has a function of storing data46which has image data and is input to the liquid crystal display device40. Note that although just one image memory45is provided in the liquid crystal display device40inFIG. 7, a plurality of image memories45may be provided in the liquid crystal display device40. For example, in the case where a full-color image is displayed on the pixel portion31with the use of three pieces of data46corresponding to hues such as red, blue, and green, the image memory45corresponding to the data46of each hue may be provided.

As the image memory45, for example, memory circuits such as a dynamic random access memory (DRAM) or a static random access memory (SRAM) can be used. Alternatively, a video RAM (VRAM) may be used as the image memory45.

The image processing circuit44has a function of writing and reading the data46to and from the image memory45in response to an instruction from the controller41and generating an image signal from the data46.

The power source circuit47has a function of supplying the power source voltage Vp to the panel30and supplying the potential VCOM1and the potential VCOM2to the pixel10. The potential VCOM2is generated in a circuit150(seeFIG. 8) included in the power source circuit47. The circuit150illustrated inFIG. 8includes a switch151, a switch152, a resistor153, a resistor154, a capacitor155, an amplifier156, and an inverter161.

The resistor153and the resistor154are electrically connected in series to each other. The switch151has a function of controlling the electrical connection between a first terminal of the resistor153and a wiring159having the second potential (V2). The switch152has a function of controlling the electrical connection between a first terminal of the resistor154and a wiring160having the first potential (V1). Note that the first potential (V1) and the second potential (V2) which have a potential difference may be generated from the power source voltage Vp or separately supplied to the power source circuit47from the outside of the liquid crystal display device40.

A potential applied to a terminal157is input to the switch151. Further, the potential applied to the terminal157is inverted in polarity by the inverter161, and then input to the switch152. Thus, one of the switches151and152is brought into a conductive state and the other, a non-conductive state depending on the potential applied to the terminal157.

A second terminal of the resistor153and a second terminal of the resistor154are electrically connected to a non-inverting input terminal (+) of the amplifier156. A first electrode of the capacitor155is electrically connected to the non-inverting input terminal (+) of the amplifier156, and a second electrode of the capacitor155has a predetermined potential. An inverting input terminal (−) of the amplifier156is electrically connected to an output terminal of the amplifier156. The potential of the output terminal of the amplifier156is applied to the terminal158as the potential VCOM2.

The amplifier156whose inverting input terminal (−) is connected to the output terminal thereof serves as an impedance converter. Further, the resistors153and154connected in series serve as a resistor divider circuit. The potential applied to the second terminals of the resistors153and154is determined by the ratio of the resistances of the resistors153and154and the potential difference between the first potential (V1) and the second potential (V2).

The use of the circuit150having the above structure makes it possible to generate the potential VCOM2which changes between the first potential (V1) and the second potential (V2).

Note that the power source circuit47preferably includes two circuits150in the case where the potential VCOM2aand the potential VCOM2bneed to be supplied in parallel to the pixel portion in one frame period as in the case of the source line inversion driving, the gate line inversion driving, or the dot inversion driving.

FIG. 9is a timing chart of the potential of the terminal157included in the circuit150inFIG. 8and a timing chart of the potentials VCOM2aand VCOM2bapplied to the terminal158.FIG. 9also shows a timing chart of the potential of the wiring GL included in the panel30inFIG. 2, a timing chart and polarity of the potential of the pixel electrode included in the liquid crystal element11inFIG. 1A, and a timing chart of the potential VCOM1.

Although the resistors153and154serve as a divider circuit in the circuit150illustrated inFIG. 8, a constant current source may serve as a divider circuit instead of the resistor153or the resistor154. Note that when the resistors153and154serve as a divider circuit, the potential VCOM2(the potentials VCOM2aand VCOM2b) can be made to change between the first potential (V1) and the second potential (V2) so that the amount of change per hour decreases over time as illustrated inFIG. 9.

Specifically, inFIG. 9, when the potential applied to the terminal157is switched from the high level to the low level, the potential VCOM2agradually increases from the first potential (V1) over time. Then, the potential VCOM2areaches the second potential (V2) though the amount of change in the potential VCOM2adecreases over time. When the potential applied to the terminal157is switched from the low level to the high level, the potential VCOM2agradually decreases from the second potential (V2) over time. Then, the potential VCOM2areaches the first potential (V1) though the amount of change in the potential VCOM2adecreases over time.

Also specifically, inFIG. 9, when the potential applied to the terminal157is switched from the low level to the high level, the potential VCOM2bgradually decreases from the second potential (V2) over time. Then, the potential VCOM2breaches the first potential (V1) though the amount of change in the potential VCOM2bdecreases over time. When the potential applied to the terminal157is switched from the high level to the low level, the potential VCOM2bgradually increases from the first potential (V1) over time. Then, the potential VCOM2breaches the second potential (V2) though the amount of change in the potential VCOM2bdecreases over time.

Given t is the time from the instant the potential applied to the terminal157is switched from the low level to the high level while the potential VCOM2is the first potential (V1), the relationship between time t and the potential VCOM2is represented by the following formula 1, where R is the resistance of the resistor153and C is the capacitance of the capacitor155.
VCOM2(t)=V2−(V2−V1)exp[−t/(CR)]  (formula 1)

Note that in the pixel20illustrated inFIG. 17A, the amount of change in the transmittance of the liquid crystal element21per hour is not always constant after the writing of an image signal to a pixel is completed, but decreases over time as illustrated inFIG. 17B. Thus, when the potential VCOM2generated in the circuit150inFIG. 8is used in the pixel10inFIG. 1A, the potential VCOM2can be made to change in accordance with the amount of change in the transmittance described above. As a result, the amount of change in the transmittance of the liquid crystal element11can be made smaller than that in the case where the potential VCOM2is constant.

Next,FIG. 10illustrates an example of the layout of the pixel10inFIG. 1A. Note that inFIG. 10, various insulating films such as a gate insulating film are omitted for clearly showing the layout of the pixel10.FIG. 11is a cross-sectional view of a liquid crystal display device using an element substrate illustrated inFIG. 10. In the liquid crystal display device inFIG. 11, the element substrate including a substrate50corresponds to a cross-sectional view along dashed line A1-A2ofFIG. 10.

In the pixel10illustrated inFIG. 10andFIG. 11, a conductive film51serving as the gate of the transistor12and the wiring GL is provided over the substrate50having an insulating surface. In addition, a conductive film52serving as an electrode of the capacitor13and the wiring CL is provided over the substrate50. That is to say, the potential VCOM2is applied to the conductive film52.

An insulating film53is provided over the substrate50so as to cover the conductive films51and52. Further, a semiconductor film54of the transistor12is provided over the conductive film51with the insulating film53interposed therebetween. A conductive film55and a conductive film56are provided over the semiconductor film54. The conductive film55serves as the wiring SL and the source or the drain of the transistor12. The conductive film56serves as the source or the drain of the transistor12and an electrode of the capacitor13.

The area where the conductive film52overlaps with the conductive film56with the insulating film53interposed therebetween serves as the capacitor13.

An oxide film57, an insulating film58, and an insulating film59are stacked in order over the semiconductor film54, the conductive film55, and the conductive film56. An organic resin film60is provided over the insulating film59. An opening62is provided in the oxide film57, the insulating film58, the insulating film59, and the organic resin film60.

A conductive film61serving as a common electrode is provided in a region over the organic resin film60excluding the opening62. An insulating film63is provided over the conductive film61, and a conductive film64serving as a pixel electrode is provided over the conductive film61with the insulating film63interposed therebetween. The insulating film63includes an opening overlapping with the opening62, and the conductive film64is connected to the conductive film56through the opening of the insulating film63. An alignment film65is provided over the conductive film64.

A substrate70is provided so as to face the substrate50. The substrate70is provided with a shielding film71blocking visible light, and a color layer72transmitting visible light in a specific wavelength range. A resin film73is provided on the shielding film71and the color layer72, and an alignment film74is provided on the resin film73. The resin film73has a function of preventing the shape of the surfaces of the shielding film71and the color layer72from affecting the planarity of the alignment film74.

Between the substrate50and the substrate70, a liquid crystal layer75containing a liquid crystal material is interposed between the alignment film65and the alignment film74. The liquid crystal element11includes the conductive film61, the conductive film64, and the liquid crystal layer75.

Note that in the case where an oxide semiconductor is used for the semiconductor film54, oxygen might be extracted from the oxide semiconductor by a metal in the conductive films55and56depending on the conductive material for the conductive films55and56. In that case, a region of the semiconductor film54that is in contact with the conductive films55and56becomes an n-type semiconductor region due to the formation of oxygen vacancies.FIG. 15is an enlarged view of part of the transistor12inFIG. 11. InFIG. 15, a region54nof the semiconductor film54that is in contact with the conductive films55and56is an n-type semiconductor region.

The n-type region54nserves as a source region or a drain region, resulting in a decrease in the contract resistance between the semiconductor film54and the conductive films55and56. Accordingly, the formation of the n-type region54nincreases the mobility and on-state current of the transistor12, which achieves high-speed operation of a semiconductor device using the transistor12.

Note that the extraction of oxygen by a metal in the conductive films55and56is probably caused when the conductive films55and56are formed by a sputtering method or when heat treatment is performed after the formation of the conductive films55and56.

The n-type region is more likely to be formed by forming the conductive films55and56with use of a conductive material which is easily bonded to oxygen. Examples of such a conductive material include Al, Cr, Cu, Ta, Ti, Mo, and W.

Next, description will be made on an example of a method for manufacturing the element substrate illustrated inFIG. 10.

As illustrated inFIG. 12A, a conductive film is formed over the substrate50, and then, the shape of the conductive film is processed (patterning) by etching or the like, whereby the conductive films51and52are formed.

The substrate50is preferably a substrate having heat resistance high enough to withstand a later manufacturing step; for example, a glass substrate, a ceramic substrate, a quartz substrate, or a sapphire substrate.

Each of the conductive films51and52may be formed using a single layer or a stacked layer of a conductive film containing one or more kinds selected from aluminum, titanium, chromium, cobalt, nickel, copper, yttrium, zirconium, molybdenum, ruthenium, silver, tantalum, and tungsten. For example, the conductive films51and52may be a conductive film in which a copper film is stacked over a tungsten nitride film or a single-layer tungsten film.

Next, the insulating film53is formed to cover the conductive films51and52; then, the semiconductor film54is formed over the insulating film53so as to overlap with the conductive film51(seeFIG. 12B).

The insulating film53may be formed using a single layer or a stacked layer of an insulating film containing one or more kinds of aluminum oxide, magnesium oxide, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide.

For example, in the case where the insulating film53has a two-layer structure, a silicon nitride film and a silicon oxide film may be used as the first layer and the second layer, respectively. A silicon oxynitride film may be used as the second layer instead of the silicon oxide film. A silicon nitride oxide film may be used as the first layer instead of the silicon nitride film.

As the silicon oxide film, a silicon oxide film with a low defect density is preferably used. Specifically, a silicon oxide film which has a spin density of 3×1017spins/cm3or less, preferably 5×1016spins/cm3or less corresponding to a signal at a g-factor of 2.001 in electron spin resonance (ESR) spectroscopy is used. As the silicon oxide film, a silicon oxide film having excess oxygen is preferably used. As the silicon nitride film, a silicon nitride film from which hydrogen and ammonia are less released is used. The amount of released hydrogen and ammonia is preferably measured by thermal desorption spectroscopy (TDS) analysis.

An oxide semiconductor film can be used as the semiconductor film54. When the oxide semiconductor film used as the semiconductor film54contains a large amount of hydrogen, the hydrogen and the oxide semiconductor are bonded to each other, so that part of the hydrogen becomes donors and generates electrons serving as carriers. As a result, the threshold voltage of the transistor shifts in the negative direction. Therefore, it is preferable that, after forming the oxide semiconductor film, dehydration treatment (dehydrogenation treatment) be performed to remove hydrogen or moisture from the oxide semiconductor film so that the oxide semiconductor film contains impurities as little as possible.

Note that oxygen in the oxide semiconductor film is also reduced by the dehydration treatment (dehydrogenation treatment) in some cases. Accordingly, it is preferable that oxygen be added to the oxide semiconductor film to fill oxygen vacancies increased by the dehydration treatment (dehydrogenation treatment).

In this manner, hydrogen or moisture is removed from the oxide semiconductor film by the dehydration treatment (dehydrogenation treatment) and oxygen vacancies therein are filled by the oxygen adding treatment, whereby the oxide semiconductor film can be turned into an i-type (intrinsic) oxide semiconductor film or a substantially i-type (intrinsic) oxide semiconductor film which is extremely close to an i-type oxide semiconductor film.

Next, a conductive film is formed over the semiconductor film54and the insulating film53; then, the shape of the conductive film is processed by etching or the like, whereby the conductive films55and56are formed in contact with the semiconductor film54(seeFIG. 12C). The conductive film56is formed over the insulating film53so as to overlap with the conductive film52. The conductive films55and56can be formed using the same conductive material as the conductive films51and52.

Then, an oxide film or an insulating film is formed to cover the substrate50.FIG. 12Dshows an example in which the oxide film57, the insulating film58, and the insulating film59are stacked in order.

A metal oxide is preferably used for the oxide film57. By using such an oxide film57, the semiconductor film54can be isolated from the insulating film58containing silicon. Thus, in the case where a metal oxide containing indium is used for the semiconductor film54, the bond between indium and oxygen at an edge of the semiconductor film54can be prevented from being cut by silicon having a higher ability than indium to bind to oxygen, so that the formation of oxygen vacancies can be prevented. As a result, one embodiment of the present invention further increases the reliability of the transistor.

Specifically, the oxide film57can be formed by a sputtering method using an In—Ga—Zn-based oxide target with a metal atomic ratio of 1:6:4 or 1:3:2.

The insulating film59is preferably formed without exposure to the atmosphere following the formation of the insulating film58. After the insulating film58is formed, the insulating film59is formed in succession by adjusting at least one of the flow rate of the source gas, the pressure, the high-frequency power, and the substrate temperature without exposure to the atmosphere, whereby the concentration of impurities at the interface between the insulating film58and the insulating film59can be reduced and further oxygen contained in the insulating film59can move to the semiconductor film54, resulting in a reduction in the number of oxygen vacancies in the semiconductor film54.

The silicon oxide film or the silicon oxynitride film which is used as the insulating film58can be formed under the following conditions: the substrate placed in a treatment chamber of a plasma CVD apparatus, which is vacuum-evacuated, is held at a temperature higher than or equal to 180° C. and lower than or equal to 400° C., preferably higher than or equal to 200° C. and lower than or equal to 370° C., the pressure in the treatment chamber is greater than or equal to 30 Pa and less than or equal to 250 Pa, preferably greater than or equal to 40 Pa and less than or equal to 200 Pa with introduction of a source gas into the treatment chamber, and high-frequency power is supplied to an electrode provided in the treatment chamber.

The source gas of the insulating film58is preferably a deposition gas containing silicon and an oxidizing gas. Typical examples of the deposition gas containing silicon include silane, disilane, trisilane, and silane fluoride. Examples of the oxidizing gas include oxygen, ozone, dinitrogen monoxide, and nitrogen dioxide.

Under the above conditions, an oxide insulating film which passes oxygen can be formed as the insulating film58. Further, the insulating film58reduces damage to the oxide film57in a later step of forming the insulating film59.

By setting the ratio of the amount of the oxidizing gas to the amount of the deposition gas containing silicon100or higher, the hydrogen content in the insulating film58can be reduced and the dangling bonds contained in the insulating film58can be reduced. Oxygen moving from the insulating film59is captured by the dangling bonds contained in the insulating film58in some cases; thus, oxygen in the insulating film59containing oxygen at a higher proportion than the stoichiometric composition can move to the semiconductor film54efficiently to fill oxygen vacancies in the semiconductor film54. As a result, the amount of hydrogen entering the semiconductor film54can be reduced and oxygen vacancies contained in the semiconductor film54can be reduced. Accordingly, a negative shift in the threshold voltage of the transistor can be reduced, and leakage current between the source and the drain of the transistor can be reduced, leading to an improvement in the electrical characteristics of the transistor.

In this embodiment, as the insulating film58, a 50-nm-thick silicon oxynitride film is formed by a plasma CVD method under the following conditions: silane with a flow rate of 20 sccm and dinitrogen monoxide with a flow rate of 3000 sccm are used as the source gases, the pressure in the treatment chamber is 40 Pa, the substrate temperature is 220° C., and a high-frequency power of 100 W is supplied to parallel plate electrodes with a high-frequency power supply of 27.12 MHz. Note that a plasma CVD apparatus is a parallel plate plasma CVD apparatus in which the electrode area is 6000 cm2, and power per unit area (power density) into which supplied power is converted is 1.6×10−2W/cm2. Under the above conditions, a silicon oxynitride film that passes oxygen can be formed.

As the insulating film59, a silicon oxide film or a silicon oxynitride film is formed under the following conditions: the substrate placed in a treatment chamber of the plasma CVD apparatus that is vacuum-evacuated is held at a temperature higher than or equal to 180° C. and lower than or equal to 260° C., preferably higher than or equal to 180° C. and lower than or equal to 230° C., the pressure is greater than or equal to 100 Pa and less than or equal to 250 Pa, preferably greater than or equal to 100 Pa and less than or equal to 200 Pa with introduction of a source gas into the treatment chamber, and a high-frequency power of 0.17 W/cm2to 0.5 W/cm2, preferably 0.25 W/cm2to 0.35 W/cm2is supplied to an electrode provided in the treatment chamber.

As the deposition conditions of the insulating film59, the high-frequency power having the power density is supplied to the electrode in the treatment chamber having the pressure, so that the degradation efficiency of the source gas in plasma is increased, oxygen radicals are increased, and oxidation of the source gas is promoted. Thus, the oxygen content in the insulating film59becomes higher than that in the stoichiometric composition. However, in the case where the substrate temperature is within the above temperature range, the bond between silicon and oxygen is weak; thus, part of oxygen is released by heating. Accordingly, it is possible to form an oxide insulating film which contains oxygen at a higher proportion than the stoichiometric composition and from which part of oxygen is released by heating. Further, the insulating film58is provided over the oxide film57. Hence, in the process of forming the insulating film59, the insulating film58serves as a protective film of the oxide film57. Consequently, the insulating film59can be formed using the high-frequency power having high power density while damage to the semiconductor film54is reduced.

In this embodiment, as the insulating film59, a 400-nm-thick silicon oxynitride film is formed by a plasma CVD method under the following conditions: silane with a flow rate of 160 sccm and dinitrogen monoxide with a flow rate of 4000 sccm are used as the source gases, the pressure in the treatment chamber is 200 Pa, the substrate temperature is 220° C., and a high-frequency power of 1500 W is supplied to parallel plate electrodes with a high-frequency power supply of 27.12 MHz. Note that a plasma CVD apparatus is a parallel plate plasma CVD apparatus in which the electrode area is 6000 cm2, and power per unit area (power density) into which supplied power is converted is 2.5×10−1W/cm2.

It is preferable that heat treatment be performed at least after the formation of the insulating film59so that oxygen contained in the insulating film58or the insulating film59enters the oxide film57and the semiconductor film54to fill oxygen vacancies in the oxide film57and the semiconductor film54. The heat treatment can be performed as heat treatment for dehydrogenation or dehydration of the semiconductor film54.

Next, the organic resin film60is formed to cover the substrate50. The organic resin film60is an underlying film of the conductive film61and the conductive film64, and has a function of preventing the formation of unevenness on the conductive film61serving as the common electrode and the conductive film64serving as the pixel electrode due to the transistor, the conductive films, and the like. For the organic resin film60, an acrylic resin, a polyimide resin, or the like can be used.

Then, the opening62is formed in the organic resin film60, the oxide film57, the insulating film58, and the insulating film59(seeFIG. 13A). The conductive film56is partly exposed in the opening62.

Note that the opening62may be formed using one photomask, or different photomasks may be used for forming the opening in the organic resin film60and forming the opening in the oxide film57and the insulating films58and59.

Next, a transparent conductive film is formed over the organic resin film60and processed into a desired shape by etching or the like, whereby the conductive film61is formed. Then, the insulating film63is formed over the conductive film61and the organic resin film60. After that, an opening is formed in the insulating film63so that the conductive film56is partly exposed in the opening62(seeFIG. 13B).

The insulating film63has a function of preventing entry of water or impurities from the outside. The insulating film63also serves as a dielectric of the capacitor14formed in a region where the conductive film61overlaps with the conductive film64. The insulating film63is preferably formed using a nitride or a nitride oxide; for example, a silicon nitride film or a silicon nitride oxide film may be formed.

Next, a transparent conductive film is formed over the insulating film63and the shape thereof is processed by etching or the like, whereby the conductive film64is formed. The conductive film64is connected to the conductive film56. Then, the alignment film65is formed over the conductive film64(seeFIG. 13C).

As the transparent conductive film used for forming the conductive film61and the conductive film64, a conductive film containing the following can be used: indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium tin oxide, indium zinc oxide, indium tin oxide to which silicon oxide is added, or the like.

Through the above steps, the element substrate illustrated inFIG. 10can be obtained. After the element substrate is formed, a liquid crystal layer is sealed between the substrate70and the element substrate as illustrated inFIG. 11, whereby the panel of the liquid crystal display device is completed.

A highly purified oxide semiconductor (a purified oxide semiconductor) obtained by reduction of impurities such as moisture or hydrogen that serve as electron donors (donors) and reduction of oxygen vacancies is an intrinsic (i-type) semiconductor or a substantially intrinsic semiconductor. Thus, a transistor including a channel formation region in a highly purified oxide semiconductor film has extremely low off-state current and high reliability.

Specifically, various experiments can prove low off-state current of a transistor including a channel formation region in a highly purified oxide semiconductor film. For example, even when an element has a channel width of 1×106μm and a channel length of 10 μm, off-state current can be lower than or equal to the measurement limit of a semiconductor parameter analyzer, i.e., lower than or equal to 1×10−13A, at a voltage (drain voltage) between a source electrode and a drain electrode of 1 V to 10 V. In that case, it can be seen that off-state current normalized on the channel width of the transistor is lower than or equal to 100 zA/μm. In addition, a capacitor and a transistor were connected to each other and off-state current was measured using a circuit in which electric charge flowing to or from the capacitor is controlled by the transistor. In the measurement, a highly purified oxide semiconductor film was used for the channel formation region of the transistor, and the off-state current of the transistor was measured from a change in the amount of electric charge of the capacitor per unit hour. As a result, it was found that, in the case where the voltage between the source electrode and the drain electrode of the transistor is 3 V, a lower off-state current of several tens of yoctoamperes per micrometer is obtained. Accordingly, the transistor using the highly purified oxide semiconductor film for the channel formation region has much lower off-state current than a crystalline silicon transistor.

Unless otherwise specified, in the case of an n-channel transistor, the off-state current in this specification is a current that flows between a source and a drain when the potential of a gate is lower than or equal to 0 with the potential of the source as a reference potential while the potential of the drain is higher than those of the source and the gate. Meanwhile, in the case of a p-channel transistor, the off-state current in this specification is a current that flows between a source and a drain when the potential of a gate is higher than or equal to 0 with the potential of the source as a reference potential while the potential of the drain is lower than those of the source and the gate.

In the case where an oxide semiconductor film is used as the semiconductor film, at least indium (In) or zinc (Zn) is preferably included as an oxide semiconductor. The oxide semiconductor preferably contains, in addition to In and Zn, gallium (Ga) serving as a stabilizer that reduces variations in electrical characteristics among transistors using the above-described oxide semiconductor. Tin (Sn) is preferably contained as a stabilizer. Hafnium (Hf) is preferably contained as a stabilizer. Aluminum (Al) is preferably contained as a stabilizer. Zirconium (Zr) is preferably contained as a stabilizer.

Among the oxide semiconductors, unlike silicon carbide, gallium nitride, or gallium oxide, an In—Ga—Zn-based oxide, an In—Sn—Zn-based oxide, or the like has an advantage of high mass productivity because a transistor with favorable electrical characteristics can be formed by sputtering or a wet process. Further, unlike silicon carbide, gallium nitride, or gallium oxide, the In—Ga—Zn-based oxide allows a transistor with favorable electrical characteristics to be formed over a glass substrate. Further, a larger substrate can be used.

Note that, for example, an In—Ga—Zn-based oxide means an oxide containing In, Ga, and Zn, and there is no limitation on the ratio of In, Ga, and Zn. In addition, the In—Ga—Zn—O-based oxide may contain a metal element other than In, Ga, and Zn. Further, the In—Ga—Zn-based oxide may contain a metal element other than In, Ga, and Zn. The In—Ga—Zn-based oxide has sufficiently high resistance when no electric field is applied thereto, so that off-state current can be sufficiently reduced. Further, the In—Ga—Zn-based oxide has high mobility.

For example, with an In—Sn—Zn-based oxide, high mobility can be realized relatively easily. However, even with an In—Ga—Zn-based oxide, mobility can be increased by reducing the defect density in the bulk.

An oxide semiconductor film is classified roughly into a single-crystal oxide semiconductor film and a non-single-crystal oxide semiconductor film. The non-single-crystal oxide semiconductor film includes any of an amorphous oxide semiconductor film, a microcrystalline oxide semiconductor film, a polycrystalline oxide semiconductor film, a c-axis aligned crystalline oxide semiconductor (CAAC-OS) film, and the like.

The amorphous oxide semiconductor film has disordered atomic arrangement and no crystalline component. A typical example of the amorphous oxide semiconductor film is an oxide semiconductor film in which no crystal part exists even in a microscopic region, and the whole of the film is amorphous.

The microcrystalline oxide semiconductor film includes a microcrystal (also referred to as nanocrystal) with a size greater than or equal to 1 nm and less than 10 nm, for example. Thus, the microcrystalline oxide semiconductor film has a higher degree of atomic order than the amorphous oxide semiconductor film. Hence, the density of defect states of the microcrystalline oxide semiconductor film is lower than that of the amorphous oxide semiconductor film.

The CAAC-OS film is one of oxide semiconductor films including a plurality of crystal parts, and most of the crystal parts each fit inside a cube whose one side is less than 100 nm. Thus, there is a case where a crystal part included in the CAAC-OS film fits inside a cube whose one side is less than 10 nm, less than 5 nm, or less than 3 nm. The density of defect states of the CAAC-OS film is lower than that of the microcrystalline oxide semiconductor film. The CAAC-OS film is described in detail below.

According to the above results, in the CAAC-OS film having c-axis alignment, while the directions of a-axes and b-axes are different between crystal parts, the c-axes are aligned in a direction parallel to a normal vector of a formation surface or a normal vector of a top surface of the CAAC-OS film. Thus, each metal atom layer arranged in a layered manner observed in the cross-sectional TEM image corresponds to a plane parallel to the a-b plane of the crystal.

Further, the degree of crystallinity in the CAAC-OS film is not necessarily uniform. For example, in the case where crystal growth leading to the CAAC-OS film occurs from the vicinity of the top surface of the film, the degree of the crystallinity in the vicinity of the top surface is higher than that in the vicinity of the formation surface in some cases. Further, when an impurity is added to the CAAC-OS film, the crystallinity in a region to which the impurity is added is changed, and the degree of crystallinity in the CAAC-OS film varies depending on regions.

In a transistor using the CAAC-OS film, change in electrical characteristics due to irradiation with visible light or ultraviolet light is small. Thus, the transistor has high reliability.

Note that an oxide semiconductor film may be a stacked film including two or more films of an amorphous oxide semiconductor film, a microcrystalline oxide semiconductor film, and a CAAC-OS film, for example.

For example, the CAAC-OS film is formed by a sputtering method using a polycrystalline metal oxide target. When ions collide with the target, a crystal region included in the target may be separated from the target along an a-b plane; in other words, a sputtered particle having a plane parallel to an a-b plane (flat-plate-like sputtered particle or pellet-like sputtered particle) may flake off from the target. In that case, the flat-plate-like or pellet-like sputtered particle reaches a substrate in the state of maintaining its crystal state, whereby the CAAC-OS film can be formed.

For the deposition of the CAAC-OS film, the following conditions are preferably used.

By reducing the amount of impurities entering the CAAC-OS film during the deposition, the crystal state can be prevented from being broken by the impurities. For example, the concentration of impurities (e.g., hydrogen, water, carbon dioxide, and nitrogen) which exist in the treatment chamber may be reduced. Furthermore, the concentration of impurities in a deposition gas may be reduced. Specifically, a deposition gas whose dew point is −80° C. or lower, preferably −100° C. or lower is used.

By increasing the substrate heating temperature during the deposition, migration of a sputtered particle is likely to occur after the sputtered particle reaches a substrate surface. Specifically, the substrate heating temperature during the deposition is from 100° C. to 740° C., preferably from 200° C. to 500° C. By increasing the substrate heating temperature during the deposition, when the flat-plate-like or pellet-like sputtered particle reaches the substrate, migration occurs on the substrate surface, so that a flat plane of the sputtered particles is attached to the substrate.

Furthermore, it is preferable that the proportion of oxygen in the deposition gas be increased and the power be optimized in order to reduce plasma damage at the deposition. The proportion of oxygen in the deposition gas is 30 vol % or higher, preferably 100 vol %.

As an example of the target, an In—Ga—Zn-based oxide target is described below.

The In—Ga—Zn-based oxide target, which is polycrystalline, is made as follows: InOXpowder, GaOYpowder, and ZnOXpowder are mixed in a predetermined molar ratio, pressure is applied to the mixture, and heat treatment is performed at a temperature from 1000° C. to 1500° C. Note that X, Y, and Z are each a given positive number. Here, the predetermined molar ratio of InOXpowder to GaOYpowder and ZnOZpowder is, for example, 2:2:1, 8:4:3, 3:1:1, 1:1:1, 4:2:3, or 3:1:2. The kinds of powder and the molar ratio for mixing powder may be determined as appropriate depending on a desired target.

The semiconductor film is not limited to a single-layer oxide semiconductor film and may have a layered structure of a plurality of oxide semiconductor films. FIG.14shows an example of the structure of a transistor100including a three-layer oxide semiconductor film.

The transistor100illustrated inFIG. 14includes, over a substrate111having an insulating surface, a conductive film112serving as a gate electrode, a gate insulating film113over the conductive film112, a semiconductor film114over the conductive film112with the gate insulating film113interposed therebetween, and a conductive film115and a conductive film116which are in contact with the semiconductor film114and serve as a source or a drain.

InFIG. 14, an oxide film117is provided over the semiconductor film114, the conductive film115, and the conductive film116. In one embodiment of the present invention, the oxide film117may be included in the constituent elements of the transistor100.

In the transistor100, oxide semiconductor films114ato114care stacked in order from the side of the conductive film112serving as the gate electrode.

The oxide semiconductor films114aand114care each an oxide film which contains at least one of the metal elements contained in the oxide semiconductor film114band whose energy at a bottom of conduction band is closer to the vacuum level than that of the oxide semiconductor film114bby higher than or equal to 0.05 eV, 0.07 eV, 0.1 eV, or 0.15 eV and lower than or equal to 2 eV, 1 eV, 0.5 eV, or 0.4 eV. Further, the oxide semiconductor film114bpreferably contains at least indium in order to increase the carrier mobility.

In the transistor100having the above structure, when a voltage is applied to the conductive film112serving as the gate electrode so that an electric field is applied to the semiconductor film114, a channel region is formed in the oxide semiconductor film114bwhose energy at the bottom of the conduction band is small in the semiconductor film114. That is, since the oxide semiconductor film114cis provided between the oxide semiconductor film114band the gate insulating film113, a channel region can be formed in the oxide semiconductor film114bwhich is insulated from the gate insulating film113.

Since the oxide semiconductor film114ccontains at least one of the metal elements contained in the oxide semiconductor film114b, interface scattering is unlikely to occur at the interface between the oxide semiconductor film114band the oxide semiconductor film114c. Thus, the movement of carriers is unlikely to be inhibited at the interface, which results in an increase in the field-effect mobility of the transistor100.

Further, when an interface level is formed at the interface between the oxide semiconductor film114band the oxide semiconductor film114a, a channel region is formed also in the vicinity of the interface, which causes a change in the threshold voltage of the transistor100. However, since the oxide semiconductor film114acontains at least one of the metal elements contained in the oxide semiconductor film114b, an interface level is unlikely to be formed at the interface between the oxide semiconductor film114band the oxide semiconductor film114a. Accordingly, the above structure allows reducing of variations in the electrical characteristics of the transistor100, such as the threshold voltage.

Further, it is preferable that a plurality of oxide semiconductor films be stacked so that an interface level due to an impurity existing between the oxide semiconductor films, which inhibits carrier flow, is not formed at the interface between the oxide semiconductor films. This is because when an impurity exists between the stacked oxide semiconductor films, the continuity of the energy at the bottom of the conduction band between the oxide semiconductor films is lost, and carriers are trapped or disappear by recombination in the vicinity of the interface. By reducing an impurity existing between the films, a continuous junction (here, in particular, a U-shape well structure whose energy at the bottom of the conduction band is changed continuously between the films) is formed more easily than the case of merely stacking a plurality of oxide semiconductor films which share at least one main metal component.

To form the continuous junction, each film needs to be stacked successively without exposure to the atmosphere using a multi-chamber deposition apparatus (sputtering apparatus) including a load lock chamber. Each chamber in the sputtering apparatus is preferably subjected to high vacuum evacuation (to a vacuum of about 5×10−7Pa to 1×10−4Pa) with use of a suction vacuum evacuation pump such as a cryopump so that water or the like, which is an impurity for the oxide semiconductor, is removed as much as possible. Alternatively, a turbo-molecular pump is preferably used in combination with a cold trap to prevent backflow of gas into the chamber through an evacuation system.

To obtain a highly purified intrinsic oxide semiconductor, a chamber needs to be subjected to high vacuum evacuation, and in addition, a sputtering gas needs to be highly purified. When a highly purified oxygen gas or argon gas having a dew point of −40° C. or lower, preferably −80° C. or lower, and more preferably −100° C. or lower is used as the sputtering gas, moisture or the like can be prevented from entering the oxide semiconductor film as much as possible.

The oxide semiconductor film114aor114cmay be an oxide film containing aluminum, silicon, titanium, gallium, germanium, yttrium, zirconium, tin, lanthanum, cerium, or hafnium at a higher atomic ratio than the oxide semiconductor film114b. Specifically, the oxide semiconductor film114aor114cmay be an oxide film containing the above element at an atomic ratio 1.5 times or more, preferably twice or more, and more preferably three times or more that in the oxide semiconductor film114b. The above element is strongly bonded to oxygen and thus has a function of suppressing generation of oxygen vacancies in the oxide film. That is, oxygen vacancies are less likely to be generated in the oxide semiconductor film114aor114cthan in the oxide semiconductor film114b.

Specifically, when both the oxide semiconductor film114band the oxide semiconductor film114aor114cinclude an In-M-Zn-based oxide, the atomic ratio of the oxide semiconductor film114aor114c, In:M:Zn=x1:y1:z1, and the atomic ratio of the oxide semiconductor film114b, In:M:Zn=x2:y2:z2, may be determined so that y1/x1is larger than y2/x2. Note that the element M is a metal element which has a higher ability than In to bind to oxygen, examples of which include Al, Ti, Ga, Y, Zr, Sn, La, Ce, Nd, and Hf The atomic ratio is preferably determined so that y1/x1is 1.5 or more times y2/x2. More preferably, the atomic ratio is determined so that y1/x1is 2 or more times y2/x2. Still more preferably, the atomic ratio is determined so that y1/x1is 3 or more times y2/x2. Further, it is preferable that y1be greater than or equal to x1in the oxide semiconductor film114b, in which case the transistor100can have stable electrical characteristics. Note that y1is preferably less than 3 times x1because the field-effect mobility of the transistor100is lowered if y1is 3 or more times x1.

The oxide semiconductor film114aand the oxide semiconductor film114ceach have a thickness of 3 nm to 100 nm, preferably 3 nm to 50 nm. The oxide semiconductor film114bhas a thickness of 3 nm to 200 nm, preferably 3 nm to 100 nm, and more preferably 3 nm to 50 nm.

In the three-layer semiconductor film, the oxide semiconductor films114aand114ccan be amorphous or crystalline. Note that the oxide semiconductor film114bin which a channel region is formed preferably has a crystalline structure, in which case the transistor100can have stable electrical characteristics.

Note that a channel formation region refers to a region of a semiconductor film of a transistor, which overlaps with a gate electrode and which is between a source electrode and a drain electrode. Further, a channel region refers to a region through which current mainly flows in the channel formation region.

For example, in the case where an In—Ga—Zn-based oxide film formed by a sputtering method is used as each of the oxide semiconductor films114aand114c, the oxide semiconductor films114aand114ccan be deposited with use of an In—Ga—Zn-based oxide target (In:Ga:Zn=1:3:2 [atomic ratio]). The deposition conditions can be as follows: an argon gas (flow rate: 30 sccm) and an oxygen gas (flow rate: 15 sccm) are used as the deposition gas; the pressure is 0.4 Pa; the substrate temperature is 200° C.; and the DC power is 0.5 kW.

Further, in the case where the oxide semiconductor film114bis a CAAC-OS film, the oxide semiconductor film114bis preferably deposited with use of a polycrystalline In—Ga—Zn-based oxide target containing In, Ga, and Zn at an atomic ratio of 1:1:1. The deposition conditions can be as follows: an argon gas (flow rate: 30 sccm) and an oxygen gas (flow rate: 15 sccm) are used as the deposition gas; the pressure is 0.4 Pa; the substrate temperature is 300° C.; and the DC power is 0.5 kW.

Although the oxide semiconductor film described above can be formed by a sputtering method, such film may be formed by another method, e.g., a thermal CVD method. A metal organic chemical vapor deposition (MOCVD) method or an atomic layer deposition (ALD) method may be employed as an example of a thermal CVD method.

A thermal CVD method has an advantage that no defect due to plasma damage is generated since it does not utilize plasma for forming a film.

Deposition by a thermal CVD method may be performed in such a manner that a source gas and an oxidizer are supplied to the chamber at a time, the pressure in a chamber is set to an atmospheric pressure or a reduced pressure, and reaction is caused in the vicinity of the substrate or over the substrate.

For example, in the case where an In—Ga—Zn—O film is formed, trimethylindium, trimethylgallium, and dimethylzinc are used. Note that the chemical formula of trimethylindium is In(CH3)3. The chemical formula of trimethylgallium is Ga(CH3)3. The chemical formula of dimethylzinc is Zn(CH3)2. Without limitation to the above combination, triethylgallium (chemical formula: Ga(C2H5)3) can be used instead of trimethylgallium and diethylzinc (chemical formula: Zn(C2H5)2) can be used instead of dimethylzinc.

For example, in the case where an oxide semiconductor film, e.g., an In—Ga—Zn—O film is formed using a deposition apparatus employing ALD, an In(CH3)3gas and an O3gas are sequentially introduced plural times to form an In—O layer, a Ga(CH3)3gas and an O3gas are introduced at a time to form a Ga—O layer, and then a Zn(CH3)2gas and an O3gas are introduced at a time to form a Zn—O layer. Note that the order of these layers is not limited to this example. A mixed compound layer such as an In—Ga—O layer, an In—Zn—O layer, or a Ga—Zn—O layer may be formed by mixing of these gases. Note that although an H2O gas which is obtained by bubbling with an inert gas such as Ar may be used instead of an O3gas, it is preferable to use an O3gas, which does not contain H. Further, instead of an In(CH3)3gas, an In(C2H5)3gas may be used. Instead of a Ga(CH3)3gas, a Ga(C2H5)3gas may be used. Instead of an In(CH3)3gas, an In(C2H5)3may be used. Furthermore, a Zn(CH3)2gas may be used.

Note that in the transistor100illustrated inFIG. 14, the edge of the semiconductor film114may be tapered or rounded.

Although the semiconductor film114inFIG. 14is a stack of three oxide semiconductor films, the semiconductor film114may be a stack of two or four or more oxide semiconductor films.

Note that in the case where the semiconductor film114is a stack of plural oxide semiconductor films, the oxide film117includes a metal oxide with conductivity lower than that of the entire semiconductor film114. For example, in the case where an In—Ga—Zn-based oxide is used as the metal oxide of the oxide film117, the atomic ratio of In in the metal oxide is lower than that in the semiconductor film114.

As in the case of the transistor12illustrated inFIG. 15, a region of the semiconductor film114that is in contact with the conductive films115and116may be an n-type semiconductor region. Such a structure increases the mobility and on-state current of the transistor100and achieves high-speed operation of a liquid crystal display device using the transistor100. Furthermore, in the case of the transistor100, the n-type semiconductor region preferably reaches the oxide semiconductor film114bwhich is to be a channel region, in which case the mobility and on-state current of the transistor100is further increased and higher-speed operation of the liquid crystal display device is achieved.

<Top View and Cross-Sectional View of Liquid Crystal Display Device>

The appearance of a liquid crystal display device of one embodiment of the present invention will be described with reference toFIGS. 16A to 16C.FIG. 16Ais a top view of the liquid crystal display device where a substrate4001and a substrate4006are bonded to each other with a sealant4005.FIG. 16Bcorresponds to a cross-sectional view taken along dashed line B1-B2inFIG. 16A.FIG. 16Ccorresponds to a cross-sectional view taken along dashed line C1-C2inFIG. 16A. Note thatFIGS. 16A to 16Cillustrate a fringe field switching (FFS) mode liquid crystal display device.

The sealant4005is provided to surround a pixel portion4002and a pair of driver circuits4004provided over the substrate4001. The substrate4006is provided over the pixel portion4002and the driver circuits4004. Thus, the pixel portion4002and the driver circuits4004are sealed by the substrate4001, the sealant4005, and the substrate4006.

A driver circuit4003is mounted in a region which is different from the region surrounded by the sealant4005over the substrate4001.

A plurality of transistors are included in the pixel portion4002and the driver circuits4004provided over the substrate4001.FIG. 16Billustrates a transistor4010included in the pixel portion4002and a transistor4022included in the driver circuit4004.FIG. 16Cillustrates the transistor4010included in the pixel portion4002.

In the pixel portion4002and the driver circuit4004, an insulating film4020formed using a resin is provided over the transistor4010and the transistor4022. A pixel electrode4021of a liquid crystal element4023and a conductive film4024are provided over the insulating film4020. The conductive film4024can function as a discharge path for electric charge accumulated in the insulating film4020. Alternatively, the conductive film4024and the insulating film4020can be included as components of the transistor4022, and the conductive film4024can function as a back gate.

An insulating film4025is provided over the insulating film4020, the pixel electrode4021, and the conductive film4024. The insulating film4025preferably has a high effect of blocking diffusion of water, hydrogen, and the like. As the insulating film4025, a silicon nitride film, a silicon nitride oxide film, or the like can be used.

As illustrated inFIGS. 16B and 16C, in one embodiment of the present invention, the insulating film4020is removed at an end of the panel. The insulating film4025over the insulating film4020is in contact with an insulating film4026serving as a gate insulating film of the transistors4010and4022between the sealant4005and the substrate4001.

In the case where the insulating film4025and the insulating film4026each have a high effect of blocking diffusion of water, hydrogen, and the like, when the insulating film4025is in contact with the insulating film4026at the end of the panel, water, hydrogen, and the like can be prevented from entering from the end of the panel or the sealant4005into semiconductor films of the transistors4010and4022.

A common electrode4027of the liquid crystal element4023is provided over the insulating film4025. A liquid crystal layer4028is provided between the common electrode4027and the insulating film4025, and the substrate4006. The liquid crystal element4023includes the pixel electrode4021, the common electrode4027, and the liquid crystal layer4028.

The transmittance of the liquid crystal element4023changes when the alignment of liquid crystal molecules included in the liquid crystal layer4028changes in accordance with the level of a voltage applied between the pixel electrode4021and the common electrode4027. Accordingly, when the transmittance of the liquid crystal element4023is controlled by the potential of an image signal supplied to the pixel electrode4021, gray-scale images can be displayed.

The liquid crystal display device of one embodiment of the present invention may display a color image by using a color filter or may display a color image by sequentially turning on a plurality of light sources whose hues are different from each other.

Image signals from the driver circuit4003and a variety of control signals and power supply potentials from an FPC4018are supplied to the driver circuits4004or the pixel portion4002through lead wirings4030and4031.

<Examples of Structures of Electronic Devices Using Liquid Crystal Display Device>

The liquid crystal display device of one embodiment of the present invention can be used for display devices, personal computers, or image reproducing devices provided with recording media (typically, devices that reproduce the content of recording media such as digital versatile discs (DVDs) and have displays for displaying the reproduced images). Other examples of the electronic devices to which the liquid crystal display device of one embodiment of the present invention can be applied include cellular phones, game machines (including portable game machines), personal digital assistants, e-book readers, cameras such as video cameras and digital still cameras, goggle-type displays (head mounted displays), navigation systems, audio reproducing devices (e.g., car audio systems and digital audio players), copiers, facsimiles, printers, multifunction printers, automated teller machines (ATMs), and vending machines.FIGS. 18A to 18Fillustrate specific examples of these electronic devices.

FIG. 18Aillustrates a portable game machine, which includes a housing5001, a housing5002, a display portion5003, a display portion5004, a microphone5005, speakers5006, an operation key5007, a stylus5008, and the like. The liquid crystal display device of one embodiment of the present invention can be used for the display portion5003or the display portion5004. Note that although the portable game machine inFIG. 18Ahas the two display portions5003and5004, the number of display portions included in the portable game machine is not limited thereto.

FIG. 18Billustrates a display device, which includes a housing5201, a display portion5202, a support5203, and the like. The liquid crystal display device of one embodiment of the present invention can be used for the display portion5202. Note that the display device means all display devices for displaying information, such as display devices for personal computers, for receiving TV broadcast, and for displaying advertisements.

FIG. 18Cillustrates a laptop personal computer, which includes a housing5401, a display portion5402, a keyboard5403, a pointing device5404, and the like. The liquid crystal display device of one embodiment of the present invention can be used for the display portion5402.

FIG. 18Dillustrates a personal digital assistant, which includes a first housing5601, a second housing5602, a first display portion5603, a second display portion5604, a joint5605, an operation key5606, and the like. The first display portion5603is provided in the first housing5601, and the second display portion5604is provided in the second housing5602. The first housing5601and the second housing5602are connected to each other with the joint5605, and the angle between the first housing5601and the second housing5602can be changed with the joint5605. An image on the first display portion5603may be switched depending on the angle between the first housing5601and the second housing5602at the joint5605. The liquid crystal display device of one embodiment of the present invention can be used for the first display portion5603or the second display portion5604. A liquid crystal display device with a position input function may be used as at least one of the first display portion5603and the second display portion5604. Note that the position input function can be added by provision of a touch panel in a liquid crystal display device. Alternatively, the position input function can be added by provision of a photoelectric conversion element also called a photosensor in a pixel portion of a liquid crystal display device.

FIG. 18Eillustrates a video camera, which includes a first housing5801, a second housing5802, a display portion5803, operation keys5804, a lens5805, a joint5806, and the like. The operation keys5804and the lens5805are provided in the first housing5801, and the display portion5803is provided in the second housing5802. The first housing5801and the second housing5802are connected to each other with the joint5806, and the angle between the first housing5801and the second housing5802can be changed with the joint5806. An image on the display portion5803may be switched depending on the angle between the first housing5801and the second housing5802at the joint5806. The liquid crystal display device of one embodiment of the present invention can be used for the display portion5803.

FIG. 18Fillustrates a cellular phone. In the cellular phone, a display portion5902, a microphone5907, a speaker5904, a camera5903, an external connection portion5906, and an operation button5905are provided in a housing5901. The liquid crystal display device of one embodiment of the present invention can be used for a circuit included in the cellular phone. In the case where the liquid crystal display device of one embodiment of the present invention is formed over a flexible substrate, it can be applied to the display portion5902having a curved surface as shown inFIG. 18F.

<Comparison Between Voltage Holding Rate and Transmittance>

It is known that an IPS mode liquid crystal element has a higher voltage holding rate than a vertical electric field mode liquid crystal element, such as a TN mode, in which the vertical electric field is applied to a liquid crystal layer. This is probably because the capacitance of a glass substrate is electrically connected in parallel to the liquid crystal layer. The same effect is probably produced in an FFS mode which is also the horizontal electric field mode as the IPS mode. Note that in a horizontal electric field mode liquid crystal display device including a pair of substrates which are arranged with a liquid crystal layer interposed therebetween, both a pixel electrode and a common electrode are provided on one of the substrates where transistors are manufactured, and a substantially horizontal electric field is applied to a liquid crystal molecule.

FIG. 19Aschematically shows a cross-sectional structure of a TN mode liquid crystal element, andFIG. 19Bshows an equivalent circuit diagram corresponding to the cross-sectional structure shown inFIG. 19A.FIG. 20Aschematically shows a cross-sectional structure of an FFS mode liquid crystal element, andFIG. 20Bshows an equivalent circuit diagram corresponding to the cross-sectional structure shown inFIG. 20A.

InFIG. 19A, an electrode202is provided on a substrate201, and an alignment film203is provided on the electrode202. Further, an electrode206is provided over a substrate207, and an alignment film205is provided over the electrode206. A liquid crystal layer204is provided between the alignment film203and the alignment film205. When a voltage is applied between the electrode202and the electrode206, an electric field is generated in a direction denoted by arrows.

In the case of the TN mode liquid crystal element having the cross-sectional structure illustrated inFIG. 19A, as illustrated inFIG. 19B, the alignment film203, the liquid crystal layer204, and the alignment film205are electrically connected in series successively between the electrode202and the electrode206.

InFIG. 20A, an alignment film212is provided on a substrate211. An electrode217is provided over a substrate218, an insulating film216is provided over the electrode217, an electrode215is provided over the insulating film216so as to overlap with part of the electrode217, and an alignment film214is provided over the electrode215and the electrode217. A liquid crystal layer213is provided between the alignment film212and the alignment film214. When a voltage is applied between the electrode217and the electrode215, an electric field is generated in a direction denoted by arrows.

In the case of the FFS mode liquid crystal element having the cross-sectional structure illustrated inFIG. 20A, as illustrated inFIG. 20B, the insulating film216is electrically connected between the electrode215and the electrode217. Further, the alignment film214and the insulating film216are electrically connected in series successively between the electrode215and the electrode217. Moreover, the alignment film214, the liquid crystal layer213, the alignment film214, and the insulating film216are electrically connected in series successively between the electrode215and the electrode217.

FIG. 20Bshows that in the FFS mode liquid crystal element, an area in which the insulating film216is sandwiched between the electrode215and the electrode217serves as a capacitor and the capacitor is electrically connected in parallel to the liquid crystal layer213. This shows that the FFS mode liquid crystal element has a higher voltage holding rate than the TN mode liquid crystal element.

Then,FIG. 21shows the measurement results of a change with time of the voltage holding rate VHR (%) of a vertical electric field mode liquid crystal element and an FFS mode liquid crystal element. Note that the vertical electric field mode liquid crystal element has a structure in which a liquid crystal layer including a nematic liquid crystal is sandwiched between a pair of electrodes and no alignment film is provided. The FFS mode liquid crystal element has a structure in which a pair of electrodes partly overlap with each other with an insulating film interposed therebetween and no alignment film is provided. In the measurement, the substrate temperature was set to 30° C. and a voltage higher than the threshold voltage of the liquid crystal layer was applied between the pair of electrodes at the start of measurement.

As shown inFIG. 21, it was found that a change with time of the voltage holding rate VHR (%) was smaller in the FFS mode liquid crystal element than in the vertical electric field mode liquid crystal element. This shows that, in the horizontal electric field mode liquid crystal display device, such as the FFS mode, the amount of change in transmittance is smaller than that in the vertical electric field mode liquid crystal element, such as the TN mode, and the perception of flicker due to variation in the transmittance can be prevented.

Next,FIG. 22shows the calculation results of the transmittance of the TN mode liquid crystal element and the FFS mode liquid crystal element. The materials for the alignment film and the liquid crystal layer were the same in the two liquid crystal elements. The cell gap was controlled so that the maximum transmittance could be obtained in each of the liquid crystal elements. In the calculation, the aperture ratio of a pixel is not taken into consideration.FIG. 22shows the transmittance (normalized transmittance) standardized so that the maximum transmittance of each liquid crystal element is 1; actually, the TN mode liquid crystal element and the FFS mode liquid crystal element had about the same maximum transmittance also in the measured value.

FIG. 22shows that the slope of a line representing a change in transmittance with respect to voltage is more gradual in the FFS mode liquid crystal element, which means that a change in gray scale with a change in the voltage VLCapplied to the liquid crystal element can be reduced. Although the FFS mode liquid crystal element has a higher saturation voltage than the TN mode liquid crystal element, the FFS mode panel has a higher aperture ratio of pixel and thus a smaller light loss within the panel, resulting in lower power consumption.

In addition, the FFS mode panel which is the horizontal electric field mode panel is advantageous in that it can withstand pressure, and thus is suitable for a liquid crystal display device including a touch panel.

This application is based on Japanese Patent Application serial No. 2012-262538 filed with Japan Patent Office on Nov. 30, 2012, the entire contents of which are hereby incorporated by reference.