Surface emitting laser

A surface emitting laser includes a substrate, a lower contact layer disposed on the substrate, a semiconductor layer mesa including a lower reflector layer, an active layer, an upper reflector layer, and an upper contact layer which are laminated, in the order named, on the lower contact layer, an annular electrode disposed on the upper contact layer, and a light transmitting window situated inside the annular electrode to transmit laser light, wherein the upper reflector layer includes a first region and a second region, the first region being inclusive of an area situated directly below the electrode and the light transmitting window, the second region being inclusive of an area outside the mesa and inclusive of a surrounding area of the first region within the mesa, and wherein a proton concentration in the first region is lower than a proton concentration in the second region.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The disclosures herein relate to a surface emitting laser.

2. Description of the Related Art

A vertical cavity surface emitting laser (VCSEL), which is also referred to as a surface emitting laser, has two reflector layers and an active layer interposed between the reflector layers disposed over a semiconductor substrate, and emits light in the direction perpendicular to the surface of the semiconductor substrate. A surface emitting laser has a current confinement structure that is made by forming a mesa with the active layer and the reflector layers and by selectively oxidizing a portion of the reflector layers of the mesa to form an oxide layer. Literature with respect to such a surface emitting laser describes that protons are injected into a mesa area to reduce parasitic capacitance, thereby enabling high-speed operations (Non-Patent Document 1).

A surface emitting layer is required of even higher speed operation.

SUMMARY OF THE INVENTION

According to one aspect of a present embodiment, a surface emitting laser includes a substrate, a lower contact layer disposed on the substrate, a semiconductor layer mesa including a lower reflector layer, an active layer, an upper reflector layer, and an upper contact layer which are laminated, in the order named, on the lower contact layer, an annular electrode disposed on the upper contact layer, and a light transmitting window situated inside the annular electrode to transmit laser light, wherein the upper reflector layer includes a first region and a second region, the first region being inclusive of an area situated directly below the electrode and the light transmitting window, the second region being inclusive of an area outside the mesa and inclusive of a surrounding area of the first region within the mesa having the first region situated therein, and wherein a proton concentration in the first region is lower than a proton concentration in the second region.

According to at least one embodiment, the surface emitting laser of the present disclosures enables high speed operation.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Embodiments will be described in the following.

[Description of Embodiments of the Present Disclosures]

Embodiments of the present disclosures will be listed and described first. In the following description, the same or corresponding elements are referred to by the same reference numerals, and a duplicate description thereof will be omitted.

[1] According to an embodiment of the present disclosures, a surface emitting laser includes a substrate, a lower contact layer disposed on the substrate, a semiconductor layer mesa including a lower reflector layer, an active layer, an upper reflector layer, and an upper contact layer which are laminated, in the order named, on the lower contact layer, an annular electrode disposed on the upper contact layer, and a light transmitting window situated inside the annular electrode to transmit laser light, wherein the upper reflector layer includes a first region and a second region, the first region being inclusive of an area situated directly below the electrode and the light transmitting window, the second region being inclusive of an area outside the mesa and inclusive of a surrounding area of the first region within the mesa having the first region situated therein, and wherein a proton concentration in the first region is lower than a proton concentration in the second region.

With this arrangement, the surface emitting laser enables high speed operation.

[2] The upper reflector layer has carbon doped therein as an impurity element, and the second region has the proton concentration therein higher than a carbon concentration therein.

This causes the second region to have a high resistance, thereby enabling the surface emitting laser to operate at high speed.

[3] The first region has the proton concentration therein lower than a carbon concentration therein.

The first region needs to conduct current, and, thus, an increase in the resistance thereof should be avoided.

[4] The proton concentration in the second region is greater than or equal to 1×1018cm−3and less than or equal to 1×1020cm−3.

This causes the second region to have a high resistance, thereby enabling the surface emitting laser to operate at high speed.

[5] A first electrode pad connected to the upper contact layer and a second electrode pad connected to the lower contact layer are provided, and the first electrode pad and the second electrode pad are disposed on the second region.

An increase in the resistance of the portion situated under the first electrode pad and the second electrode pad enables the surface emitting laser to operate at high speed.

[Details of Embodiments of the Present Disclosures]

In the following, an embodiment of the present disclosures will be described in detail, but the present embodiments are not limited to those disclosed herein.

A surface emitting laser100according to the present embodiment will be described with reference toFIG. 1andFIG. 2.FIG. 1is a top view of the surface emitting laser100according to the present embodiment.FIG. 2is a cross-sectional view taken along the dash-and-dot lines1A-1B inFIG. 1. The surface emitting laser100is such that a first lower DBR (distributed Bragg reflector) layer121, a lower contact layer122, a second lower DBR layer123, an active layer124, an upper DBR layer125, and an upper contact layer127are formed in the order named on a substrate20. In the present application, the second lower DBR layer123or a set of the first lower DBR layer121and the second lower DBR layer123is referred to as a lower reflector layer, and the upper DBR layer125is referred to as an upper reflector layer.

The upper DBR layer125has an oxidized region126athat is made by oxidizing part of the layers constituting the upper DBR layer125. Upon the formation of the oxidized region126a,the unoxidized region serves as an aperture region126b.

Accordingly, the surface emitting laser has a current confinement structure126comprised of the oxidized region126aand the aperture region126b.The oxidized region126ais made by oxidizing a mesa30from the perimeter thereof. The oxidized region126acontains aluminum oxide (Al2O3), for example, and has an insulating property, thereby conducting less current than the aperture region126b.The aperture region126b,which more readily conducts current than the oxidized region126a,thus serves as a current path. Use of the current confinement structure126as described above allows current to be efficiently injected. In the present embodiment, the diameter of the aperture region126bis 7.5 μm, for example.

The substrate20may be a semiconductor substrate made of gallium arsenide (GaAs) having a semi-insulating property, for example. A buffer layer made of GaAs and AlGaAs may be disposed between the substrate20and the first lower DBR layer121.

The first lower DBR layer121, the second lower DBR layer123, and the upper DBR layer125are a multilayer semiconductor film in which AlxGa1−xAs (x=0.16) and AlyGa1−yAs (y=0.9) with an optical film thickness of λ/4 are alternately laminated. The first lower DBR layer121is an i-type semiconductor layer with no dopant impurities. The second lower DBR layer123is an n-type semiconductor layer, which is doped with silicon (Si) serving as an impurity at a concentration of 7×1017cm−3or more and 2×1018cm−3or less, for example. The upper DBR layer125is a p-type semiconductor layer, which is doped with zinc (Zn) serving as an impurity at a concentration of 1×1018cm−3or more and 1×1019cm−3or less, for example.

The lower contact layer122is approximately 400 nm in thickness and made of n-type AlxGa1−xAs (x=0.1) that is doped with Si serving as an impurity at a concentration of 3×1018cm−3, for example. The upper contact layer127is approximately 100 nm in thickness and made of p-type AlxGa1−xAs (x=0.16) that is doped with Zn serving as an impurity at a concentration of 1×1019cm−3, for example.

The active layer124has a multiple quantum well (MQW) structure in which InyGa1−yAs (y=0.107) layers and AlxGa1−xAs (x=0.3) layers are alternately laminated, for example, providing an optical gain. It may be noted that the substrate20, the first lower DBR layer121, the lower contact layer122, the second lower DBR layer123, the active layer124, the upper DBR layer125, and the upper contact layer127may be made of different compound semiconductors from those noted above.

The mesa30is constituted by the second lower DBR layer123, the active layer124, the upper DBR layer125, and the upper contact layer127. Specifically, the second lower DBR layer123, the active layer124, the upper DBR layer125, and the upper contact layer127are removed around the area for erecting the mesa30to form a groove32, thereby forming the mesa30constituted by the semiconductor layers. The height of the mesa30is greater than or equal to 4.5 μm and less than or equal to 5.0 μm, for example. The width of the top face is 30 μm, for example. The mesa30has the active layer124, the upper DBR layer125, and the upper contact layer127at the center thereof, and has a high-resistance region128formed in the peripheral area thereof.

An insulating film130is formed on the semiconductor layers at the places including the upper surface and lateral surface of the mesa30. The insulating film130is made of silicon nitride (SiN), silicon oxynitride (SiON), or the like. In the present embodiment, the insulating film130includes a first insulating film131, a second insulating film132, and a third insulating film133.

A p electrode41is formed on the upper contact layer127at the top of the mesa30. An n electrode51is formed on the lower contact layer122constituting the bottom face of the groove32. An interconnect42connected to a p electrode pad43is disposed on the p electrode41at the top of the mesa30. An interconnect52connected to an n electrode pad53is disposed on the n electrode51situated on the bottom face of the groove32.

In the present embodiment, the p electrode41is made of a film having Ti/Pt/Au laminated in the order named. The n electrode51is made of a film in which gold (Au), germanium (Ge), and nickel (Ni) are laminated, for example. The interconnect42, the interconnect52, the p electrode pad43, and the n electrode pad53are made of a metal such as Au, for example.

In the surface emitting laser of the present embodiment, bonding wires (not shown) or the like are connected to the p electrode pad43and the n electrode pad53to inject current into the surface emitting laser. Light emitted by the active layer124upon the injection of current oscillates in the resonator constituted by the first lower DBR layer121, the second lower DBR layer123, and the upper DBR layer125, and then comes out of a light transmitting window31as a laser beam in the direction indicated by a dashed-line arrow. The light transmitting window31is formed inside the p electrode41having an annular shape on the top face of the mesa30. In the present embodiment, the diameter of the p electrode41is greater than the diameter of the aperture region126b.

In the present embodiment, the high-resistance region128is not formed in the region inclusive of an area directly below the p electrode41and the light transmitting window31, and is formed in the regions other than the region inclusive of the area directly below the p electrode41and the light transmitting window31. In the present application, the region, in the upper DBR layer125, inclusive of an area directly below the p electrode41and the light transmitting window31is denoted as a first region141. Further, a region comprised of the peripheral portion of the mesa30outside the first region141and the areas directly below the p electrode pad43and the n electrode pad53is denoted as a second region142. Accordingly, the second region142has the high-resistance region128formed therein, and the first region141has the active layer124, the upper DBR layer125, and the upper contact layer127formed therein.

The high-resistance region128is formed by injecting protons (H30) into the upper DBR layer125. As a result, a proton concentration is higher in the second region142than in the first region141. The proton concentration in the second region142is greater than or equal to 1×1018cm−3and less than or equal to 1×1020cm−3. Further, the upper DBR layer125is doped with C (carbon) serving as an impurity at a concentration of 6×1017cm−3to 4×1018cm−3. Accordingly, the proton concentration is higher than the C concentration in the second region142, and the proton concentration is lower than the concentration in the first region141.

<Range and Characteristics of High-Resistance Region>

As illustrated inFIG. 3andFIG. 4, the surface emitting laser201has the high-resistance region128formed in the regions excluding both the entirety of the mesa30and the neighboring areas outside the groove32around the mesa30.FIG. 3is a top view of the surface emitting laser201.FIG. 4is a cross-sectional view taken along the dash-and-dot lines3A-3B inFIG. 3.

As illustrated inFIG. 5andFIG. 6, the surface emitting laser202has the high-resistance region128formed in the regions excluding both the region inclusive of an area directly below either the p electrode41or the light transmitting window31and the regions inclusive of areas directly blow the p electrode pad43and the n electrode pad53.FIG. 5is a top view of the surface emitting laser202.FIG. 6is a cross-sectional view taken along the dash-and-dot lines5A-5B inFIG. 5.

As illustrated inFIG. 7andFIG. 8, the surface emitting laser203has the high-resistance region128formed in the regions excluding the entirety of the mesa30, the neighboring areas outside the groove32around the mesa30, and the regions inclusive of areas directly below the p electrode pad43and the n electrode pad53.FIG. 7is a top view of the surface emitting laser203.FIG. 8is a cross-sectional view taken along the dash-and-dot lines7A-7B inFIG. 7.

FIG. 9is a drawing illustrating the parasitic capacitance and cutoff frequency of the surface emitting lasers100,201,202, and203. The surface emitting laser100of the present embodiment has a parasitic capacitance of approximately 340 fF and a cutoff frequency of approximately 19.6 GHz. The surface emitting laser201has a parasitic capacitance of approximately 420 fF and a cutoff frequency of approximately 15.2 GHz. The surface emitting laser202has a parasitic capacitance of approximately 550 fF and a cutoff frequency of approximately 11.8 GHz. The surface emitting laser203has a parasitic capacitance of approximately 630 fF and a cutoff frequency of approximately 10.1 GHz.

As shown above, the surface emitting laser100of the present embodiment has a higher cutoff frequency than the surface emitting lasers201,202, and203, and thus enables high-speed operation.

<Method of Making Surface Emitting Laser>

In the following, a method of making a surface emitting laser according to the present embodiment will be described with reference toFIG. 10throughFIG. 15.

At the beginning, a first lower DBR layer121, a lower contact layer122, a second lower DBR layer123, an active layer124, an upper DBR layer125, and an upper contact layer127are epitaxially deposited one after another on a substrate20serving as a wafer, as illustrated inFIG. 10. Specifically, the semiconductor layers, which are the first lower DBR layer121, the lower contact layer122, the second lower DBR layer123, the active layer124, the upper DBR layer125, and the upper contact layer127, are formed by metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or the like.

It may be noted that the upper DBR layer125includes an AlxGa1−xAs (0.95≤x≤1.0) layer for forming the oxidized region126aof the current confinement structure126. Subsequently, a first insulating film131is formed on the upper contact layer127by plasma CVD (chemical vapor deposition) or the like, for example.

As illustrated inFIG. 11, a mask161is then formed on the first insulating film131, followed by injecting protons to form a high-resistance region128. The depth of ion injection is less than or equal to 3.5 μm, for example. Protons are injected into the upper contact layer127, the upper DBR layer125, and the active layer124at the place where the mask161is not provided, thereby forming the high-resistance region128. It may be noted that protons are not injected into the portion that is covered with the mask161.

Subsequently, as illustrated inFIG. 12, the mask161is removed by use of an organic solvent or the like, followed by forming another mask162. The mask162is larger than the mask161, and covers part of the high-resistance region128and the portion that was not subjected to proton injection.

Thereafter, the high-resistance region128and the second lower DBR layer123are removed by dry etching at the places where the mask162is not provided, until the lower contact layer122is exposed, thereby forming the groove32. This results in the formation of the mesa30. For this dry etching, an apparatus for inductively coupled plasma reactive ion etching (ICP-RIE) may be used, for example. The mask162is subsequently removed by an organic solvent or the like.

As illustrated inFIG. 13, the AlxGa1−xAs (0.9≤x≤1.0) layer of the upper DBR layer125is heated to approximately 400° C. in a steam atmosphere, for example, to be oxidized from the lateral surface of the mesa30, which results in the formation of the oxidized region126a.The time length for heating is adjusted in the formation of the oxidized region126asuch that the aperture region126b,which is an unoxidized portion surrounded by the oxidized region126a,becomes a predetermined size. Thereafter, dry etching is performed to remove the upper contact layer127and the first lower DBR layer121to form a groove having an 8.0-μm depth (not shown) for device isolation purposes, for example.

As illustrated inFIG. 14, plasma CVD or the like is performed to form a second insulating film132, followed by forming openings through the second insulating film132at the top face of the mesa30and at the bottom face of the groove32, for example.

As illustrated inFIG. 15, a third insulating film133is then formed, followed by forming openings through the third insulating film133at part of the top face of the mesa30and at the bottom of the groove32. Subsequently, resist patterns are formed and vacuum vapor deposition is performed to form the p electrode41on the upper contact layer127and the n electrode51on the lower contact layer122. Ohmic contact is then established through heat treatment.

Plating or the like is thereafter performed to form an interconnect42on the p electrode41and on the third insulating film133and to form an interconnect52on the n electrode51and on the third insulating film133. This results in the formation of a p electrode pad43electrically connected to the p electrode41through the interconnect42and an n electrode pad53electrically connected to the n electrode51through the interconnect52. The substrate20provided as a wafer is then divided to produce surface emitting laser chips.

The manufacturing steps described above serves to produce the surface emitting laser of the present embodiment.

Although one or more embodiments have heretofore been described, any particular embodiments are non-limiting, and various variations and modifications may be made without departing from the scopes defined by the claims.

The present application is based on and claims priority to Japanese patent application No. 2019-122049 filed on Jun. 28, 2019, with the Japanese Patent Office, the entire contents of which are hereby incorporated by reference.