External storage device and method of manufacturing external storage device

A storage element is provided in a semiconductor chip, and an inductor and a driver circuit are provided in another semiconductor chip. An external terminal is a contact type terminal, and at least some external terminals are a power supply terminal and a ground terminal. A sealing resin layer is formed over a first surface of an interconnect substrate and seals the semiconductor chips but does not cover the external terminal. The inductor is formed at a surface of the semiconductor chip not facing the interconnect substrate.

This application is based on Japanese patent application NO. 2009-284348, the content of which is incorporated hereinto by reference.

BACKGROUND

1. Technical Field

The present invention relates to an external storage device with a high tamper-proof property and a method of manufacturing an external storage device.

2. Related Art

In the business of making money by selling content, an external storage device in which the content is stored, for example, a memory card may be sold. In such a business model, the content stored in an external storage device is increasingly read by a dedicated device in recent years. When the external storage device is formed by a typical memory card, the information is transmitted to the dedicated device using a contact type external terminal (for example, see Japanese Unexamined patent publication NO. 2009-105126).

In addition, Japanese Unexamined patent publication NO. 2002-083894 discloses performing non-contact type transmission of the information to the outside by providing an antenna coil in a semiconductor chip.

In the business of making money by selling content, it is important to suppress illegal duplication of the content, that is, to improve the tamper-proof property. A general method for improving the tamper-proof property depends on software processing, such as encryption of the content. However, even if the tamper-proof property is ensured by software processing, it becomes possible to read the contents if software which lowers the tamper-proof property, such as decryption software, is created. Thus, it has been difficult to sufficiently ensure the tamper-proof property.

SUMMARY

The inventor has made the present invention noting that when the content cannot be used if the content is not read by a dedicated device, the tamper-proof property can be ensured by making it impossible to form an external storage device with general products even if the content is read and copied.

In one embodiment, there is provided an external storage device including: an interconnect substrate; at least one semiconductor chip disposed over a first surface of the interconnect substrate; a storage element provided in at least the one semiconductor chip; an inductor which is provided in at least the one semiconductor chip and which communicates information stored in the storage element to the outside; a driver circuit which is provided in at least the one semiconductor chip in order to drive the inductor; a contact type external terminal provided in the interconnect substrate; and a sealing resin layer which is formed over the first surface of the interconnect substrate and which seals at least the one semiconductor chip and does not cover the external terminal. The inductor is formed at a surface of the semiconductor chip not facing the interconnect substrate.

When the content is stored in the external storage device according to the embodiment of the present invention and is read by a dedicated device, it is necessary to manufacture an external storage device with the same structure as an imitation product of the external storage device according to the embodiment of the present invention in order to use the duplicated content. In the present invention, the information stored in the storage element is communicated to the outside through the inductor. The inductor is small because the inductor is formed in a semiconductor chip. In other words, it is difficult to form an inductor, which has the same diameter as the inductor in the embodiment of the present invention, without using a semiconductor process. In order to realize a semiconductor process, a large investment in facilities is required. Accordingly, it is difficult to manufacture imitation products of the semiconductor chip in terms of costs. For this reason, according to the embodiment of the present invention, even if the content stored in the external storage device can be read, it is not possible for those who copy the content to prepare an external storage device for storing the content. As a result, the tamper-proof property is improved.

In addition, a communicable range of the inductor becomes short as the diameter of the inductor decreases. On the other hand, in the present invention, the distance from the inductor to the outside surface of the external storage device becomes short since at least one semiconductor chip described above is simultaneously sealed by the sealing resin layer. Accordingly, even if the communicable range of the inductor becomes short, a receiver can be located in the communicable range.

In another embodiment, there is provided a method of manufacturing an external storage device including: disposing at least one semiconductor chip over a first surface of an interconnect substrate having a contact type external terminal; and forming a sealing resin layer over the first surface of the interconnect substrate such that at least the one semiconductor chip is sealed and the external terminal is not covered. A storage element is provided in at least the one semiconductor chip. An inductor which communicates information stored in the storage element to the outside is provided in at least the one semiconductor chip. A driver circuit of the inductor is provided in at least the one semiconductor chip.

According to the embodiments of the present invention, a tamper-proof property of an external storage device can be sufficiently ensured.

DETAILED DESCRIPTION

Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In addition, the same components are denoted by the same reference numerals in all drawings, and the explanation thereof will not be repeated.

FIG. 1is a sectional view showing the configuration of an external storage device10according to a first embodiment. The external storage device10includes an interconnect substrate20, at least one semiconductor chip (in an example shown inFIG. 1, two semiconductor chips110and120), a storage element122(shown inFIG. 4), an inductor114, a driver circuit112(shown inFIG. 4), an external terminal40, and a sealing resin layer30. The semiconductor chips110and120are disposed on a first surface (for example, an upper surface) of the interconnect substrate20. The storage element122is provided in either of the semiconductor chips110and120. The inductor114is also provided in either of the semiconductor chips110and120. The driver circuit112is a circuit which drives the inductor114, and is provided in either of the semiconductor chips110and120. In the present embodiment, the storage element122is provided in the semiconductor chip120, the inductor114is provided in the semiconductor chip110, and the driver circuit112is provided in the semiconductor chip110. The external terminal40is a contact type terminal, and at least some external terminals40are a power supply terminal and a ground terminal. The sealing resin layer30is formed on the first surface of the interconnect substrate20and seals the semiconductor chips110and120but does not cover the external terminal40. In addition, the inductor114is formed at a surface of the semiconductor chip110not facing the interconnect substrate20.

The interconnect substrate20is a printed circuit board, for example, and has an interconnect at least on the first surface. In addition, the interconnect substrate20has a protective resin layer50(for example, a solder resist layer) on a second surface which is an opposite surface to the first surface.

In the example shown inFIG. 1, the semiconductor chip110is fixed to the interconnect substrate20with its active surface upward. A multi-layered interconnect layer is provided on the active surface of the semiconductor chip110. The inductor114is formed in one interconnect layer of the multi-layered interconnect layer, for example, in an uppermost interconnect layer. The diameter of the inductor114is equal to or less than 1 mm, for example. In addition, an electrode pad formed at the active surface of the semiconductor chip110is connected to the interconnect, which is formed at the first surface of the interconnect substrate20, through a bonding wire210. In addition, the semiconductor chip120is flip-chip-mounted on the interconnect substrate20with its active surface downward and is connected to the interconnect, which is formed at the first surface of the interconnect substrate20, through a bump220. However, the semiconductor chip120may be connected to the interconnect of the interconnect substrate20by a bonding wire212as shown inFIG. 24. In addition, the semiconductor chips110and120are connected to each other through the interconnect of the interconnect substrate20.

Moreover, although the semiconductor chip110is a semiconductor chip designed for exclusive use, a general-purpose memory chip, for example, a general-purpose non-volatile memory chip may also be used as the semiconductor chip120.

The external terminal40is provided in a plural number on the first surface of the interconnect substrate20. As described above, at least some external terminals40are a power supply terminal and a ground terminal. Electric power supplied to the interconnect substrate20through the external terminal40is supplied to at least the driver circuit112of the inductor114. In addition, when electric power is required for reading and writing of the storage element122, the electric power is also supplied through the external terminal40.

The semiconductor chips110and120are simultaneously sealed by the sealing resin layer30. Accordingly, the thickness t of a portion above the inductor114of the semiconductor chip110in the external storage device10can be made small, for example, equal to or less than 0.5 mm. In addition, a side surface of the sealing resin layer30forms the same plane as a side surface of the interconnect substrate20except for a side surface facing the external terminal40.

Moreover, as shown inFIG. 25, passive components150, such as a chip conductor and a chip resistor, may be provided at the first surface of the interconnect substrate20of the external storage device10. The passive components150are also sealed simultaneously with the semiconductor chips110and120by the sealing resin layer30. In addition, package components (not shown in the drawings) may be provided at the first surface of the interconnect substrate20.

FIG. 2is a plan view of the external storage device10.FIG. 1is equivalent to a sectional view taken along the line A-A′ ofFIG. 2. The external storage device10shown inFIGS. 1 and 2is a card type storage device and is sold in a state where the content is stored in the storage element122. The content stored in the storage element122is software, sound content, or image content. Specifically, the content stored in the storage element122is game software data, software for computer terminals, music data, or video data, for example.

The external storage device10and the interconnect substrate20have rectangular or square planar shapes. A plurality of external terminals40is provided along one side of the interconnect substrate20and extends in a direction perpendicular to the one side. The interconnect substrate20is sealed by the sealing resin layer30except for the vicinity of its one side, at which the external terminal40is provided, when seen in a plan view. In addition, the semiconductor chip110is located at the opposite side to the external terminal40with a line, which passes through the center of the external storage device10and is parallel to one side at which the external terminal40is provided, interposed therebetween.

FIG. 3is a sectional view showing a use state of the external storage device10. The external storage device10is inserted in an insertion hole502of a dedicated reader500in a direction of arrow X from the side at which the external terminal40is provided. A plurality of contact type connecting terminals530is provided inside the insertion hole502. In a state where the external storage device10is inserted in the insertion hole502, the plurality of external terminals40comes in contact with the different connecting terminals530so as to be electrically connected therewith. Then, electric power is supplied from the connecting terminals530to the external storage device10. In addition, there is a gap between the external storage device10and the inner surface of the insertion hole502.

In addition, a read section510is provided at the inner surface of the insertion hole502. The read section510has a semiconductor chip. This semiconductor chip has a multi-layered interconnect layer, and an inductor514for reception is formed in the multi-layered interconnect layer. The inductor514is disposed at a position facing each inductor114of the external storage device10in a state where the external storage device10is inserted in the insertion hole502. As described above, the thickness t of a portion above the inductor114of the semiconductor chip110in the external storage device10is small. For this reason, a distance from the inductor114to the inductor514may be made short, for example, equal to or less than 1 mm. Accordingly, even if the diameter of the inductor114is equal to or less than 1 mm, communication between the inductors114and514can be performed.

Moreover, if the read section510is formed by fixing a semiconductor chip, which has the inductor514and a receiver circuit, over an interconnect substrate and sealing the semiconductor chip with sealing resin, the thickness of a portion located above the inductor514(inFIG. 3, below the inductor514) in the read section510can be made small. In this case, the distance from the inductor114to the inductor514can be particularly shortened.

FIG. 4is an equivalent circuit diagram in a use state of the external storage device10. The external storage device10and the read section510communicate with each other through the inductors114and514. Specifically, the information stored in the storage element122is read by the driver circuit112and is output as an electromagnetic wave by the inductor114. By the electromagnetic wave, an induced current is generated in the inductor514. By interpreting the intensity of the induced current by the receiver circuit512, the information stored in the storage element122is read into the read section510. In addition, a control circuit which controls reading/writing from/into the storage element122is also provided in the semiconductor chip110. This control circuit is located between the driver circuit112and the storage element122from the point of view of a circuit.

In the example shown inFIG. 4, the plural sets of inductors114and514are provided. In addition, transmission of the information described above is performed using a combination of some inductors114and514. Which combination of the inductors114and514is to be used is appropriately changed according to pre-defined rules.

In addition, a driver circuit and an inductor for transmission may be added to the read section510, and an inductor and a receiver circuit for reception may be added to the external storage device10. In this case, the information can be transmitted from the read section510to the external storage device10. The information is stored in the storage element122.

Next, a method of manufacturing the external storage device10will be described using the sectional view ofFIG. 1. First, the semiconductor chips110and120are disposed on the first surface of the interconnect substrate20. In this case, the semiconductor chip120is flip-chip-mounted on the interconnect substrate20. Then, the semiconductor chip110and the interconnect of the interconnect substrate20are connected to each other using the bonding wire210. Then, the sealing resin layer30is provided on the first surface of the interconnect substrate20by performing mold sealing. In this case, the shape of a sealing die is made such that the sealing resin layer30does not cover the external terminal40.

Next, operations and effects of the present embodiment will be described. According to the present embodiment, the information stored in the external storage device10is read by the read section510by performing communication between the inductors114and514. Here, the inductor114is small because the inductor114is formed in the semiconductor chip110. In other words, it is difficult to form an inductor, which has the same diameter as the inductor114, without using a semiconductor process. In order to realize a semiconductor process, a large investment in facilities is required. Accordingly, it is difficult to manufacture imitation products of the semiconductor chip110in terms of costs. For this reason, according to the present embodiment, even if the content stored in the external storage device10can be read, it is not possible for those who copy the content to prepare an external storage device for storing the content. As a result, the tamper-proof property is improved.

In addition, the inductor114and the driver circuit112are provided in the separate semiconductor chip110from the semiconductor chip120having the storage element122. Accordingly, a general-purpose memory chip can be used as the semiconductor chip120having the storage element122.

In addition, since the semiconductor chips110and120are simultaneously sealed by one sealing resin layer30, it is difficult to take out only one chip. For this reason, it is difficult to exchange only the semiconductor chip110in order to read the content stored in the semiconductor chip120. In addition, it is also difficult to take out only one chip, which stores the operation information, of the semiconductor chips110and120in order to read the operation information. In addition, it is also difficult to invalidate the security by applying a condition, which induces an abnormal operation, to the chip in charge of the security of the semiconductor chips110and120. Accordingly, the tamper-proof property is improved.

Moreover, since the surface of the sealing resin layer30can be evenly formed even if the heights of the semiconductor chips110and120are different, the mechanical strength of the external storage device10is increased. For this reason, the need to provide a housing for the external storage device10is decreased. In addition, also when a housing is provided, the housing can be made thin in a simple structure.

In addition, the surface of the sealing resin layer30is parallel to the external terminal40. Accordingly, inserting the external storage device10into the reader500and taking out the external storage device10from the reader500can be easily and smoothly performed. For this reason, it is not necessary to provide a guide section for insertion and extraction of the reader500in the external storage device10. Moreover, even if the guide section is provided, the structure can be made simple.

Generally, the external storage device10becomes thick if a guide section with a complicated structure is provided in the external storage device10. Since a distance between the inductors114and514is increased if the external storage device10is thick, the diameter of the inductor114is increased. If the diameter of the inductor114is increased, an inductor which is compatible with the inductor114may be formed in a method other than the semiconductor process. As a result, the tamper-proof property is reduced.

Moreover, as shown inFIG. 26, the upper surface of the semiconductor chip110may be located above the upper surface of the semiconductor chip120. In this case, the distance between the inductors114and514can be made narrower. Moreover, although it is necessary to make thin a portion of the sealing resin layer30located above the semiconductor chip110in the present embodiment, exposure of the surface of the semiconductor chip120from the sealing resin layer30can be suppressed by locating the upper surface of the semiconductor chip110above the upper surface of the semiconductor chip120.

Moreover, in the present embodiment, the external terminal40is formed at the first surface of the interconnect substrate20on which the semiconductor chips110and120are mounted. On the other hand, when the external storage device10is inserted into the reader500, the reader500presses the connecting terminal530against the external terminal40in order to ensure the connection between the external terminal40and the connecting terminal530. This pressing force acts in a direction of making the external terminal40move away from the read section510in the thickness direction of the external storage device10, as indicated by arrow Y inFIG. 3.

Here, as described above, the semiconductor chip110is located at the opposite side to the external terminal40with a line, which passes through the center of the external storage device10and is parallel to one side at which the external terminal40is provided, interposed therebetween. In addition, there is a gap between the external storage device10and the inner surface of the insertion hole502. Therefore, as shown inFIG. 27, a protruding section504located between the semiconductor chip110and the external terminal40when seen in a plan view may be provided on the inner surface of the insertion hole502and the tip of the protruding section504may be in contact with the external storage device10. In this case, by the force indicated by the arrow Y, the external storage device10rotates in a direction, in which the inductor114of the semiconductor chip110becomes closer to the inductor514of the read section510, with the protruding section504as a point of support.

FIG. 5is a sectional view showing the configuration and a use state of an external storage device10according to a second embodiment.FIG. 6is an equivalent circuit diagram of the external storage device10in the state shown inFIG. 5.FIGS. 5 and 6are views equivalent toFIGS. 3 and 4in the first embodiment. The external storage device10shown inFIGS. 5 and 6has the same configuration as the external storage device10shown in the first embodiment except that a semiconductor chip130is provided instead of the semiconductor chips110and120.

The semiconductor chip130is a semiconductor chip designed for exclusive use and has the storage element122, the driver circuit112, and the inductor114. Moreover, in the semiconductor chip130, an opposite surface to an active surface, that is, an opposite surface to a surface having the storage element122, the driver circuit112, and the inductor114is fixed to the interconnect substrate20. An electrode pad of the semiconductor chip130is connected to an interconnect, which is formed at the surface of the interconnect substrate20, through a bonding wire211.

Also in the present embodiment, the same effects as in the first embodiment can be achieved. In addition, since the storage element122, the driver circuit112, and the inductor114are provided in one semiconductor chip130, the external storage device10can be made small.

FIG. 7is a plan view showing the configuration of an external storage device10according to a third embodiment and is a view equivalent toFIG. 2in the first embodiment.FIG. 8is a sectional view taken along the line B-B′ ofFIG. 7. The external storage device10according to the present embodiment has the same configuration as the external storage device10according to the first embodiment except that a guide section32is provided.

The guide section32is formed by providing an uneven section in the sealing resin layer30. In the present embodiment, the guide section32is protruding sections formed at two opposite side surfaces of the sealing resin layer30. In the present embodiment, the guide section32is provided at two side surfaces perpendicular to a side, at which the external terminal40is provided, of the external storage device10.

FIGS. 9A,9B, and10are sectional views showing a method of manufacturing the external storage device shown inFIGS. 7 and 8. First, as shown inFIG. 9A, the interconnect substrate20is prepared. In this state, the interconnect substrate20has a shape in which portions, which become the plurality of external storage devices10, are connected to each other. Then, the semiconductor chips110and120(inFIG. 9, only the semiconductor chip120is shown) are disposed on the interconnect substrate20for every portion which becomes the external storage device10. Then, each of the plurality of semiconductor chips110is connected to an interconnect of the interconnect substrate20using the bonding wire210(not shown inFIG. 9).

Then, the plurality of semiconductor chips110and120is simultaneously sealed to form the sealing resin layer30. In this state, the sealing resin layer30is not provided separately for each of the plurality of external storage devices10. Accordingly, the sealing resin layer30is formed in a state where the portions which become the plurality of external storage devices10are connected to each other.

Subsequently, a dicing blade400is moved along a dicing line, which is located along the side at which the guide section32is provided, of dicing lines showing the cutting lines of the interconnect substrate20and the sealing resin layer30. As a result, a groove37is formed in a top layer of the sealing resin layer30.

Then, as shown inFIG. 9B, a dicing blade402is moved along a dicing line, which is located along the side at which the guide section32is provided, of the dicing lines. In this way, portions of the interconnect substrate20and the sealing resin layer30located at a side of the interconnect substrate20are cut. The width of the dicing blade402may be equal to the width of the dicing blade400or may be different from the width of the dicing blade400. As a result, a groove38is formed. The groove38overlaps the groove37when seen in a plan view, but a bottom portion of the groove38is not connected with the groove37. A distance from a bottom portion of the groove37to the bottom part of the groove38is equal to the thickness of the guide section32. That is, in a state shown in the drawing, the plurality of external storage devices10is connected to each other by the portion which becomes the guide section32.

Then, as shown inFIG. 10, the interconnect substrate20and the sealing resin layer30are cut by moving a dicing blade404along a dicing line. The width of the dicing blade404is smaller than the widths of the dicing blades400and402. Thus, the plurality of external storage device10is separated from each other, and the guide section32is formed.

Also in the present embodiment, the same effects as in the first embodiment can be achieved. In addition, since the guide section32is provided, breakage of the external storage device10when inserting the external storage device10into the insertion hole502can be suppressed by forming an uneven section corresponding to the guide section32in the insertion hole502of the reader500. Moreover, since the guide section32is formed at the side surface of the sealing resin layer30, an increase in the distance from the inductor114to the inductor514due to the guide section32does not occur.

FIG. 11is a sectional view showing the configuration of an external storage device10according to a fourth embodiment.FIG. 11is equivalent to a sectional view taken along the line B-B′ ofFIG. 7. The external storage device10shown inFIG. 11has the same configuration as the external storage device10according to the third embodiment except for the following points.

First, the guide section32is not provided. Moreover, among side surfaces of the sealing resin layer30, two side surfaces33parallel to the direction in which the external storage device10is inserted into the insertion hole502of the reader500are located over one surface of the interconnect substrate20. Accordingly, a step difference21is generated between the sealing resin layer30and the interconnect substrate20. The step difference21functions as a guide for insertion.

FIG. 12is a sectional view showing a method of manufacturing the external storage device10shown inFIG. 11. First, as shown inFIG. 12A, the interconnect substrate20is prepared. In this state, the interconnect substrate20has a shape in which portions, which become the plurality of external storage devices10, are connected to each other. Then, the semiconductor chips110and120(inFIG. 12A, only the semiconductor chip120is shown) are disposed on the interconnect substrate20for every portion which becomes the external storage device10. Then, each of the plurality of semiconductor chips110is connected to an interconnect of the interconnect substrate20using the bonding wire210(not shown inFIG. 12A).

Then, the interconnect substrate20in a state where the semiconductor chips110and120are mounted is disposed in a lower mold610which is a sealing die. Then, an upper mold600corresponding to the lower mold610is disposed on the lower mold610and the interconnect substrate20. A protruding section602is provided in a ceiling portion of the inner surface of the upper mold600. The protruding section602has a tip which is flat. This flat portion is in contact with a region where the step difference21is to be formed in the dicing line of the interconnect substrate20. The width of the protruding section602is larger than that of a dicing blade410to be described later.

Subsequently, sealing resin is injected into the space between the lower mold610and the upper mold600. As a result, the sealing resin layer30is formed. In this state, the sealing resin layer30is not formed in a portion where the protruding section602is located. As a result, the sealing resin layer30has an independent shape for every external storage device10.

Then, as shown inFIG. 12B, the lower mold610and the upper mold600are removed. Then, the interconnect substrate20is cut by moving the dicing blade410along the dicing line. As a result, the plurality of external storage devices10is separated from each other. As described above, the width of the protruding section602of the upper mold600is larger than that of the dicing blade410. Accordingly, a part of the interconnect substrate20covered by the protruding section602remains. This forms the step difference21.

Also in the present embodiment, the same effects as in the third embodiment can be achieved. Compared with the third embodiment, the number of steps when cutting the interconnect substrate20in order to separate the external storage devices10into pieces is reduced.

FIG. 13is a sectional view showing the configuration of an external storage device10according to a fifth embodiment.FIG. 13is equivalent to a sectional view taken along the line B-B′ ofFIG. 7. The external storage device10shown inFIG. 13has the same configuration as the external storage device10according to the third embodiment except that a groove shaped guide section34is provided instead of the guide section32which is a protruding section.

FIG. 14is a sectional view showing a method of manufacturing the external storage device shown inFIG. 13. First, the interconnect substrate20is prepared. In this state, the interconnect substrate20has a shape in which portions, which become the plurality of external storage devices10, are connected to each other. Then, the semiconductor chips110and120(inFIG. 14, only the semiconductor chip120is shown) are disposed on the interconnect substrate20for every portion which becomes the external storage device10. Then, each of the plurality of semiconductor chips110is connected to an interconnect of the interconnect substrate20using the bonding wire210(not shown inFIG. 14).

Then, the plurality of semiconductor chips110and120is simultaneously sealed to form the sealing resin layer30. In this state, the sealing resin layer30is not provided separately for each of the plurality of external storage devices10. Accordingly, the sealing resin layer30is formed in a state where the portions which become the plurality of external storage devices10are connected to each other. Then, the sealing resin layer30and the interconnect substrate20are cut using a dicing blade (not shown in the drawings), so that the plurality of external storage devices10is separated into pieces.

Then, the groove shaped guide section34is formed using a dicing blade420.

Also in the present embodiment, the same effects as in the third embodiment can be achieved.

FIG. 15is a sectional view showing the configuration of an external storage device10according to a sixth embodiment and is equivalent to a sectional view taken along the line A-A′ ofFIG. 2in the first embodiment. The external storage device10shown in FIG.15has the same configuration as the external storage device10according to the first embodiment except that a supporting member140is provided.

The supporting member140is located between the first surface of the interconnect substrate20and the semiconductor chip110. That is, the supporting member140is provided on the first surface of the interconnect substrate20, and the semiconductor chip110is provided on the supporting member140.

Also in the present embodiment, the same effects as in the first embodiment can be achieved. In addition, the upper surface of the semiconductor chip110may be located below the upper surface of the semiconductor chip120, for example, like the case where the semiconductor chip120is thicker than the semiconductor chip110. In such a case, since the thickness of the sealing resin layer30is designed in accordance with the upper surface of the semiconductor chip120, the thickness t from the inductor114to the upper surface of the sealing resin layer30may be increased. On the other hand, in the present embodiment, since the supporting member140is provided between the first surface of the interconnect substrate20and the semiconductor chip110, the thickness t can be reduced.

Moreover, in order to reduce the distance between the inductors114and514, it is necessary to make thin a portion of the sealing resin layer30located above the semiconductor chip110. On the other hand, as shown inFIG. 28, if the semiconductor chip120is made thin by back surface grinding, the upper surface of the semiconductor chip110can be located above the upper surface of the semiconductor chip120. In this case, exposure of the surface of the semiconductor chip120from the sealing resin layer30can be suppressed.

FIG. 16is a sectional view showing the configuration of an external storage device10according to a seventh embodiment and is equivalent to a sectional view taken along the line A-A′ ofFIG. 2in the first embodiment. The external storage device10shown inFIG. 16has the same configuration as the external storage device10according to the first embodiment except for the following points.

First, a recess36is formed in the sealing resin layer30. The recess36is formed at least in a region overlapping the inductor114when seen in a plan view. In the example shown inFIG. 16, the recess36overlaps the entire surface of the semiconductor chip110. Moreover, when seen from the insertion direction X, the external terminal40, the semiconductor chip110, and the semiconductor chip120are aligned in this order. In addition, the recess36is connected to a side of the sealing resin layer30facing the external terminal40. In other words, in the sealing resin layer30, a region where the semiconductor chip120is provided is thicker than the other regions.

FIG. 17is a view showing a modification of the external storage device10shown inFIG. 16. In the example shown inFIG. 17, the recess36overlaps only a part of the semiconductor chip110when seen in a plan view but overlaps at least the inductor114.

Also in the present embodiment, the same effects as in the first embodiment can be achieved. Moreover, even if the upper surface of the semiconductor chip110is located below the upper surface of the semiconductor chip120, the thickness t from the inductor114to the upper surface of the sealing resin layer30can be reduced.

FIG. 18is a sectional view showing the configuration of an external storage device10according to an eighth embodiment and is equivalent to a sectional view taken along the line A-A′ ofFIG. 2in the first embodiment. The external storage device10shown inFIG. 18has the same configuration as the external storage device10according to the first embodiment except for the following points.

The semiconductor chips110and120are located on a protective resin layer60(for example, a solder resist layer) formed on the first surface of the interconnect substrate20. In addition, the semiconductor chip120is not flip-chip-connected to the interconnect substrate20, and is disposed with its active surface upward.

In addition, the external terminal40is formed at a second surface (for example, a back surface) of the interconnect substrate20opposite the first surface. The external terminal40is connected to interconnects70and72, which are located at the first surface of the interconnect substrate20, through via holes22passing through the interconnect substrate20. The interconnect70is connected to an electrode pad of the semiconductor chip110through the bonding wire210, and the interconnect72is connected to an electrode pad of the semiconductor chip120through the bonding wire212.

Moreover, in the example shown inFIG. 18, the sealing resin layer30is formed only at the first surface side of the interconnect substrate20. Accordingly, the external terminal40is not covered by the sealing resin layer30.

Also in the present embodiment, the same effects as in the first embodiment can be achieved. Moreover, the external terminal40is formed at the surface (second surface) of the interconnect substrate20opposite the surface (first surface) on which the semiconductor chips110and120are mounted. When the external storage device10is inserted into the reader500shown inFIG. 3, the reader500presses the connecting terminal530against the external terminal40in order to ensure the connection between the external terminal40and the connecting terminal530. This pressing force acts in a direction of making the Inductor114of the semiconductor chip110closer to the inductor514of the read section510. Accordingly, the inductor114can be brought close to the inductor514.

FIG. 19Ais a sectional view showing the configuration of an external storage device10according to a ninth embodiment and is equivalent toFIG. 18in the eighth embodiment. The external storage device10shown inFIG. 19Ahas the same configuration as the external storage device10according to the eighth embodiment except that a penetrating hole24for alignment is provided in the interconnect substrate20.

FIG. 19Bis an enlarged plan view showing the configuration of the penetrating hole24. InFIG. 19B, the sealing resin layer30is not shown. The penetrating hole24is formed through the same process as the process of forming the via hole22. Accordingly, a conductive film26, for example, a laminated film of a Cu film and an Au film is formed in the periphery and inside wall of the penetrating hole24. However, since the entire penetrating hole24is not embedded by the conductive film26, a through hole27remains in the penetrating hole24even after the conductive film26is formed. In addition, the conductive film26is connected to neither a power supply interconnect of the interconnect substrate20nor a signal interconnect nor a ground interconnect. In addition, the conductive film26may be connected to the ground interconnect.

Moreover, as shown inFIG. 19A, openings52and62through which the penetrating hole24is exposed are formed in the protective resin layers50and60. When placing the semiconductor chips110and120on the interconnect substrate20, the positions of the semiconductor chips110and120are decided with the through hole27of the penetrating hole24as a reference.

Next, a method of manufacturing the external storage device10shown inFIG. 19Awill be described. First, the interconnect substrate20is prepared. In this state, the interconnect substrate20has a shape in which portions, which become the plurality of external storage devices10, are connected to each other. Then, the semiconductor chips110and120are disposed on the interconnect substrate20for every portion which becomes the external storage device10. In this case, the positions of the semiconductor chips110and120are decided with the through hole27of the penetrating hole24as a reference.

Then, the plurality of semiconductor chips110and120is connected to the interconnects70and72of the interconnect substrate20using the bonding wires210and212.

Then, the plurality of semiconductor chips110and120is simultaneously sealed to form the sealing resin layer30. In this state, the sealing resin layer30is not provided separately for each of the plurality of external storage devices10. Accordingly, the sealing resin layer30is formed in a state where the portions which become the plurality of external storage devices10are connected to each other. In addition, since the first surface of the interconnect substrate20is sealed by the sealing resin layer30, the through hole27of the penetrating hole24cannot be confirmed from the first surface side. However, from the second surface side of the interconnect substrate20opposite the first surface, the through hole27can be seen. In addition, when forming the sealing resin layer30, the through hole27may be filled with a filling material in advance to form the sealing resin layer30. In this case, leakage of resin, which becomes the sealing resin layer30, to the second surface side of the interconnect substrate20through the through hole27can be suppressed. Moreover, the filling material may be removed from the second surface side of the interconnect substrate20after forming the sealing resin layer30or may be left as it is.

Subsequently, alignment is performed with the through hole27of the penetrating hole24as a reference from the second surface side of the interconnect substrate20, and then the interconnect substrate20and the sealing resin layer30are cut from the second surface side. As a result, the interconnect substrate20and the sealing resin layer30are separated into pieces in units of a set of semiconductor chips110and120and the plurality of external storage devices10is formed.

Also in the present embodiment, the same effects as in the first embodiment can be achieved. Moreover, when the diameter of the inductor114of the semiconductor chip110is small like the present embodiment, the inductor114and the inductor514of the reader500do not overlap each other if slightest shift of the position of the semiconductor chip110occurs in the external storage device10. As a result, the information cannot be read. On the other hand, in the present embodiment, alignment when mounting the semiconductor chips110and120and alignment when separating the plurality of external storage device10into pieces by dicing the interconnect substrate20and the sealing resin layer30are performed with the same through hole27as a reference. Accordingly, positional deviation of the semiconductor chip110in the external storage device10can be suppressed. In particular, if the through hole27and the semiconductor chip110are formed adjacent to each other and other interconnects or elements are not located between them, it is possible to shorten a time until a mounter, which mounts the semiconductor chip110on the interconnect substrate20, moves to check the position of the through hole27.

In addition, the penetrating hole24, the conductive film26, the through hole27, and the openings52and62may also be formed in a portion of the interconnect substrate20which does not become either of the external storage devices10. In this case, the penetrating hole24, the conductive film26, the through hole27, and the openings52and62are not left in the external storage device10.

FIG. 20is a sectional view showing the configuration of an external storage device10according to a tenth embodiment. The external storage device10shown inFIG. 20has the same configuration as the external storage device10according to the ninth embodiment except for the following points.

First, the sealing resin layer30is also formed at the second surface side of the interconnect substrate20. Here, the sealing resin layer30does not cover the external terminal40. In addition, the penetrating hole24, the conductive film26, the through hole27, and the openings52and62shown in the ninth embodiment are formed in a portion of the interconnect substrate20which does not become either of the external storage devices10. Accordingly, the external storage device10does not have the penetrating hole24, the conductive film26, the through hole27, and the openings52and62.

FIG. 21is a plan view showing the shape of the interconnect substrate20in the present embodiment. The interconnect substrate20has a plurality of through holes28and29at positions which do not overlap the semiconductor chips110and120and an interconnect on the interconnect substrate20. The through hole28is located in a region of the interconnect substrate20which becomes the external storage device10, and the through hole29is located in each of the portions of the interconnect substrate20which become four angles of the external storage device10. The through holes28and29serve to guide the sealing resin layer30from the first surface side of the interconnect substrate20to the second surface side. That is, the sealing resin layer30can also be formed at the second surface side of the interconnect substrate20by providing the through holes28and29.

Also in the present embodiment, the same effects as in the first embodiment can be achieved. In addition, since the sealing resin layer30is also formed at the second surface side of the interconnect substrate20, durability of the external storage device10can be improved.

FIG. 22is a sectional view showing the configuration of an external storage device10according to an eleventh embodiment.FIG. 23is a plan view of the external storage device10shown inFIG. 22. FIG.22is equivalent to a sectional view taken along the line C-C′ ofFIG. 23. The external storage device10shown inFIGS. 22 and 23has the same configuration as the external storage device10according to the ninth embodiment except for the following points.

First, the external storage device10has a housing80. The housing80covers the interconnect substrate20and the sealing resin layer30. In addition, openings82and84are provided in the housing80. The openings82and84are provided in a region facing the first surface of the interconnect substrate20. When seen in a plan view, the opening82overlaps the external terminal40and the opening84overlaps the inductor114.

In the example shown inFIG. 22, when seen from the insertion direction X of the external storage device10, the external terminal40, the semiconductor chip110, and the semiconductor chip120are aligned in this order in the external storage device10. In addition, the opening82extends to the tip of the external storage device10in the insertion direction X when seen in a plan view. Moreover, as shown inFIG. 23, the width of the opening84is smaller than that of the opening82, and the opening84is connected to the opening82.

Also in the present embodiment, the same effects as in the first embodiment can be achieved. In addition, since the interconnect substrate20and the sealing resin layer30are covered by the housing80, durability of the external storage device10can be improved.

In addition, the opening84is provided at the position overlapping the inductor114in the housing80. Accordingly, even if the housing80is provided, an increase in the distance from the inductor114to the inductor514of the reader500can be suppressed.

In addition, the opening84is connected to the opening82. The opening82extends to the tip of the external storage device10in the insertion direction X when seen in a plan view. Accordingly, it is possible to prevent the interference between the housing80and the read section510of the reader500when inserting the external storage device10into the insertion hole502of the reader500.

While the first to eleventh embodiments of the present invention have been described with reference to the drawings, these are only illustrative of the present invention, and other various configurations may also be adopted.