Liquid crystal display and manufacturing method thereof

A method to manufacture a display device, includes: forming, on a substrate of the display device, a sacrificial layer including a material, the material including at least one of amorphous carbon, a metal, and an inorganic material; forming a layer covering the sacrificial layer; forming an injection hole exposing the sacrificial layer; removing, via the injection hole, the sacrificial layer to form a microcavity; and disposing liquid crystal in the microcavity.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority from and the benefit of Korean Patent Application No. 10-2013-0000769, filed on Jan. 3, 2013, which is incorporated by reference for all purposes as if set forth herein.

BACKGROUND

Exemplary embodiments relate to display technology, and more particularly, to a liquid crystal display including a liquid crystal layer formed in a microcavity and a manufacturing method thereof.

Conventional liquid crystal displays typically include two panels with field generating electrodes, such as a pixel electrode, a common electrode, and the like, formed thereon, and a liquid crystal layer disposed therebetween.

To facilitate the display of images, an electric field is typically imposed on the liquid crystal layer by applying voltage to the field generating electrodes. This orients the liquid crystal molecules of the liquid crystal layer and controls polarization of incident light.

Liquid crystal displays including an embedded microcavity (EM) structure (or nanocrystal structure) are display devices manufactured by forming a sacrificial layer with a photoresist, removing the sacrificial layer after forming a support member thereon, and filling liquid crystal in a void (or empty space, cavity, etc.) formed as a result of the sacrificial layer being removed.

It is noted, however, that a side wall of conventional EM structures is usually tapered, and this portion is typically covered by a light blocking member to, for instance, decrease the aperture ratio of the corresponding display device. That is, a side wall of the EM structure usually includes a structure being tapered at an angle, and since light leakage may occur in the liquid crystal layer disposed in the EM structure due to a cell gap being different from other portions thereof, the region is usually covered by a light blocking member. This causes the aperture ratio to be reduced.

Also, when an organic layer is used as a sacrificial layer, the formation of the organic layer may undesirably affect (or otherwise change) the surrounding layers by, for instance, heat (or some other processing characteristic) associated with one or more processing steps. Further, a portion where the organic layer is not removed from the void may result. As a result, liquid crystal material may not be sufficiently injected in the void, which may adversely influence display quality of the corresponding display device.

Therefore, there is a need for an approach that provides efficient, cost effective techniques to provide a display device including an EM structure formed without using an organic sacrificial layer.

SUMMARY

Exemplary embodiments provide a liquid crystal display including liquid crystal disposed in a microcavity formed without using an organic sacrificial layer.

Exemplary embodiments provide a method to manufacture the above-noted liquid display device.

According to exemplary embodiments, a method, includes: forming, on a substrate of a display device, a sacrificial layer including a material, the material including at least one of amorphous carbon, a metal, and an inorganic material; forming a layer covering the sacrificial layer; forming an injection hole exposing the sacrificial layer; removing, via the injection hole, the sacrificial layer to form a microcavity; and disposing liquid crystal in the microcavity.

According to exemplary embodiments, a liquid crystal display, includes: a is substrate; and a microcavity layer disposed on the substrate, the microcavity layer including a plurality of microcavities. At least one of the plurality of microcavities includes: a side surface angled at 80° to 100° with respect to the substrate, a pixel electrode disposed therein, and liquid crystal disposed therein.

According to exemplary embodiments, since the sacrificial layer comprises at least one of amorphous carbon, metal, or an inorganic material, formation of the sacrificial layer may not undesirably affect other surrounding layers by, for example, heat (or some other processing characteristic) associated with one or more manufacturing processes. To this end, removal of the sacrificial layer is substantially easy, and deterioration of display quality of a corresponding display device associated with injecting liquid crystal into the microcavity may be prevented (or otherwise reduced). Further, since the slope of the side wall is approximately vertical, an area to be covered by, for instance, a light blocking member may be reduced, which increases an aperture ratio of the corresponding display device.

DETAILED DESCRIPTION OF THE ILLUSTRATED EMBODIMENTS

While exemplary embodiments are described in association with liquid crystal display devices, it is contemplated that exemplary embodiments may be utilized in association with other or equivalent display devices, such as various self-emissive and/or non-self-emissive display technologies. For instance, self-emissive display devices may include organic light emitting displays (OLED), plasma display panels (PDP), etc., whereas non-self-emissive display devices may include electrophoretic displays (EPD), electrowetting displays (EWD), and/or the like.

FIG. 1is a layout view of a display, according to exemplary embodiments.FIG. 2is a cross-sectional view of the display device ofFIG. 1taken along sectional line II-II.FIG. 3is a cross-sectional view of the display device ofFIG. 1taken along sectional line III-III.

A gate line121and a storage voltage line131are formed on an insulation substrate110made of any suitable material, such as, for example, transparent glass, plastic, and/or the like. The gate line121includes a first gate electrode124a, a second gate electrode124b, and a third gate electrode124c. The storage voltage line131includes storage electrodes135aand135b, and a protrusion134protruding in a direction parallel (or substantially parallel) to the storage electrode135a. The structure of the storage electrodes135aand135bsurrounds a first subpixel electrode192hand a second subpixel electrode192lof an adjacent (or previous) pixel. A horizontal portion135bof the storage electrode may be a wire connected to a horizontal portion135bof an adjacent (or previous) pixel, which may not be separated from each other.

A gate insulating layer140is formed on the gate line121and the storage voltage line131. A semiconductor151positioned below a data line171, a semiconductor155positioned below source/drain electrodes, and a semiconductor154positioned at a channel portion of a thin film transistor are formed on the gate insulating layer140.

A plurality of ohmic contacts (not shown) may be formed on each of the semiconductors151,154, and155, as well as disposed between the data line171and the source/drain electrodes173a-c/175a-c.

Data conductors171,173c,175a,175b, and175care formed on each of the semiconductors151,154, and155and the gate insulating layer140. The data conductors171,173c,175a,175b, and175c, include a plurality of data lines171, which include a first source electrode173aand a second source electrode173b, a first drain electrode175a, a second drain electrode175b, a third source electrode173c, and a third drain electrode175c.

The first gate electrode124a, the first source electrode173a, and the first drain electrode175aform a first thin film transistor together with the semiconductor154. A channel of the first thin film transistor is formed at the semiconductor portion154between the first source electrode173aand the first drain electrode175a. Similarly, the second gate electrode124b, the second source electrode173b, and the second drain electrode175bform a second thin film transistor together with the semiconductor154. A channel of the second thin film transistor is formed at the semiconductor portion154between the second source electrode173band the second drain electrode175b. The third gate electrode124c, the third source electrode173c, and the third drain electrode175cform a third thin film transistor together with the semiconductor154. A channel of the third thin film transistor is formed at the semiconductor portion154between the third source electrode173cand the third drain electrode175c.

According to exemplary embodiments, the structure of the data line171includes a width that becomes smaller in a forming region of the third thin film transistor in the vicinity of an extension175c′ of the third drain electrode175c. The aforementioned structure of the data line171maintains an interval with adjacent wiring, as well as reduces signal interference. It is contemplated, however, that the aforementioned structure of the data171may be additionally or alternatively formed.

A first passivation layer180is formed on the data conductors171,173a,173b,173c,175a,175b, and175cand an exposed portion of the semiconductor154. The first passivation layer180may include any suitable material, e.g., an inorganic insulator, such as, for example, silicon nitride (SiNx), silicon oxide (SiOx), etc. Additionally or alternatively, the first passivation layer180may include an organic insulator.

Color filters230and230′ are formed on the passivation layer180. Color filters230of the same color are formed in adjacent pixels that are adjacent in a vertical direction (e.g., a direction parallel to data line171). Color filters230and230′ of different colors are formed in adjacent pixels that are adjacent in a horizontal direction (e.g., a direction parallel to gate line121). It is contemplated that color filters230and230′ may overlap respective portions of the data line171. The color filters230and230′ may be configured to facilitate the display of at least one color, such as one of the primary colors, e.g., red, green, and blue. However, it is also contemplated that the color filters230and230′ may facilitate the display of any other suitable color, such as cyan, magenta, yellow, and white colors. It is noted that color filters230and230′ may be collectively referred to as color filter230.

A light blocking member (or black matrix)220is formed on the color filter230and230′. According to exemplary embodiments, the light blocking member220may include any suitable material through which light is not transmitted. Further, the light blocking member220is formed with respect to a region (also referred to as a transistor formation region) where the gate line121, the thin film transistor, and the data line171are formed. The light blocking member220forms a lattice structure including an opening corresponding to a region where an image is displayed. As such, a color filter (e.g., color filter230), a pixel electrode (e.g., pixel electrode192), and a liquid crystal layer (e.g., liquid crystal layer3) are positioned at least in the opening of the light blocking member220.

A second passivation layer185is disposed on the light blocking member220and the color filters230and230′, so as to cover the light blocking member220and the color filters230and230′. According to exemplary embodiments, the second passivation layer185may include any suitable material, such as, for example, an inorganic insulator, e.g., silicon nitride (SiNx), silicon oxide (SiOx), etc., or an organic insulator. Unlike as shown inFIGS. 2 and 3, when a step associated with a difference in thicknesses occurs between the color filters230and230′ and the light blocking member220, the second passivation layer185including, for instance, an organic insulator may reduce (or otherwise remove) the step.

A first contact hole (or via)186aand a second contact hole (or via)186brespectively expose the first drain electrode175aand extensions175b′ of the second drain electrode175b. In this manner, the first contact hole186aand the second contract hole186bare formed through the color filter230, the light blocking member220, and the passivation layers180and185. Further, a third contact hole (or via)186cexposes the protrusion134of the storage voltage line131and the extension175c′ of the third drain electrode175c. In this manner, the third contact hole186cis formed through the color filter230, the light blocking member220, and the passivation layers180and185.

According to exemplary embodiments, the light blocking member220and the color filter230include the contact holes186a,186b, and186cextending therethrough. In this manner, the formation (e.g., etching) of the contact holes186a,186b,186cmay be difficult due to material differences between the light blocking member220and the color filter230, as compared to the materials of the passivation layers180and185. As such, the light blocking member220and/or the color filter230may be removed (e.g., etched) at positions corresponding to the contact holes186a,186b, and186cbefore the contact holes186a,186b, and186care formed.

According to exemplary embodiments, the contact holes186a,186b, and186cmay be formed by changing a position of the light blocking member220and etching only the color filter230and the passivation layers180and185.

A pixel electrode192, including the first subpixel electrode192hand the second subpixel electrode192l, is formed on the second passivation layer185. The pixel electrode192may be made of any suitable material, such as, for example, a transparent conductive material, e.g., aluminum zinc oxide (AZO), gallium zinc oxide (GZO), indium tin oxide (ITO), indium zinc oxide (IZO), etc. It is also contemplated that one or more conductive polymers (ICP) may be utilized, such as, for example, polyaniline, poly(3,4-ethylenedioxythiophene) poly(styrenesulfonate) (PEDOT:PSS), etc.

The first subpixel electrode192hand the second subpixel electrode192lare adjacent to each other in a column (e.g., vertical) direction (e.g., a direction parallel to the extension of data line171). First and second subpixel electrodes192hand192linclude an entirely quadrangular shape, and a cross stem configuring a transverse stem and a longitudinal stem crossing the transverse stem. Further, the first subpixel electrode192hand the second subpixel electrode192lmay be divided into four subregions by the transverse stem and the longitudinal stem. In this manner, each subregion may include a plurality of minute branches. While exemplary embodiments are described herein in association with the aforementioned configuration of subpixel electrodes192hand192l, it is also contemplated that first and second subpixel electrodes192hand192lmay be otherwise configured.

According to exemplary embodiments, the minute branches of the first subpixel electrode192hand the second subpixel electrode192lform angles of about 40 degrees to 45 degrees with the gate line121or the transverse stem. Further, the minute branches of two adjacent subregions may be perpendicular to each other. In other words, the minute branches of four adjacently disposed subregions may converge (or diverge) from a central portion of a corresponding subpixel, e.g., a central portion where the transverse stem and longitudinal stem cross one another. Further, while not illustrated, a width of each (or some) of the minute branches may become gradually larger (or smaller) and/or intervals between the, or some of the, minute branches may be different from each other.

In exemplary embodiments, the first subpixel electrode192hand the second subpixel electrode192lare physically and electrically connected with the first drain electrode175aand the second drain electrode175bthrough the first and second contact holes186aand186b. As such, the first and second subpixel electrodes192hand192lreceive data voltages from the first drain electrode175aand the second drain electrode175b, respectively.

A connecting member194electrically connects the extension175c′ of the third drain electrode175cand the protrusion134of the storage voltage line131through the third contact hole186c. As a result, some of the data voltage applied to the second drain electrode175bmay be divided through the third source electrode173c. As such, the magnitude of a voltage applied to the second subpixel electrode192lmay be smaller than the magnitude of a voltage applied to the first subpixel electrode192h.

According to exemplary embodiments, an area of the second subpixel electrode192lmay be the same or up to double an area of the first subpixel electrode192h.

An opening (not shown) may be configured to collect gas discharged from the color filter230and an overcoat (not illustrated) covering the corresponding opening with the same material as the pixel electrode192may be formed on the second passivation layer185. The opening and the overcoat may be utilized to block gas discharged from the color filter230, which blocks the gas from being transferred to another element. It is noted that the opening and the overcoat may not be included in exemplary embodiments.

The liquid crystal layer3is formed on the second passivation layer185and the pixel electrode192. A space where the liquid crystal layer3is positioned is referred to as a microcavity layer. The microcavity layer is supported by an overlying roof layer360. In exemplary embodiments, the microcavity layer includes a plurality of microcavities (e.g. microcavity305illustrated inFIGS. 13C-13E), each microcavity corresponding to a pixel of the display device. In this manner, each of the microcavities includes liquid crystal molecules310, as will become more apparent below. In this manner, however, it is noted that the liquid crystal layer3is formed in the microcavities, such as microcavity305.

As seen inFIGS. 13C-13E, an upper surface of the microcavity305is (or is substantially) a horizontal surface. A side surface of the microcavity305is angled at 80 degrees to 100 degrees with respect to a surface of the substrate110. In this manner, the side surface is (or is substantially) vertical. As seen inFIG. 2, the angle (θ) at which the side surface is angled forms a tapered structure including an angle of more than 80 degrees to an angle of less than 90 degrees. As seen inFIG. 15, the angle (θ′) at which the side surface is angled forms a reverse tapered structure including an angle of more than 90 degrees to an angle of less than 100 degrees.

According to exemplary embodiments, the microcavity305may include the approximately vertical structure, as the sacrificial layer used to form the microcavity305is not formed of an organic layer, but is formed from at least one of amorphous carbon, a metal, and an inorganic material. In contrast, when the sacrificial layer is formed of an organic material, the pattern of the organic material typically includes a side surface inclined at an angle of less than 45 degrees, such that an area occupied by the side surface is relatively larger. As such, a corresponding horizontal area covered by the light blocking member220is relatively larger, which reduces the aperture ratio of a corresponding display device. According to exemplary embodiments, however, the sacrificial layer is formed of at least one of amorphous carbon, metal, and an inorganic material, i.e., not an organic material, and as such, a side surface of the microcavity305may be included with respect to a surface of the substrate110at an angle of 90 ±10 degrees. In this manner, the horizontal area associated with the side surface is relatively smaller, and as such, the aperture ratio may be increased in the corresponding display device.

As previously noted, the liquid crystal layer3is formed in the microcavity305. An alignment layer (not shown) may be formed in the microcavity305to align liquid crystal molecules310disposed in the microcavity305. The alignment layer may include any suitable material, such as, for example, polyamic acid, polysiloxane, polyimide, etc.

The liquid crystal molecules310are initially aligned by the alignment layer, and the alignment direction thereof is changed according to an applied electric field imposed, at least in part, by way of pixel electrode192. A height (or thickness) of the liquid crystal layer3corresponds to a height (or thickness) of the microcavity305. The liquid crystal layer3disposed in a microcavity (e.g. microcavity305) is also referred to as a nanocrystal layer3.

In exemplary embodiments, a portion of the microcavity layer is opened to form an injection hole307. As such, the liquid crystal molecules310may be injected into the microcavity305by way of a capillary force. In this manner, the alignment layer may also be formed by capillary force. The injection hole307may be sealed by a capping layer390after the alignment layer and the liquid crystal molecules310are injected into the microcavity305.

A common electrode270is positioned on the second passivation layer185and the pixel electrode192, as well as disposed above the liquid crystal layer3. A portion of the structure of the common electrode270extends along the upper surface of the microcavity305. Another portion of the structure of the common electrode307extends along the side surface of the microcavity305. In this manner, the horizontal portion of the common electrode370may extend in (or substantially in) the same direction as the gate line121. The another portion of the structure of the common electrode270extends towards insulation substrate110along the side surface of microcavity305so as to be close to (e.g., extend towards) and above the data line171. Further, the common electrode270may not be formed in a portion where the injection hole307is formed (e.g., not formed in a region where the transistor is formed). According to exemplary embodiments, the common electrode270may be horizontally maintained above the microcavity305because the common electrode270may be supported by a roof layer360, which is described in more detail below.

According to exemplary embodiments, a plurality of common electrodes270may be formed separately from each other with respect to injection hole307. As such, the plurality of common electrodes270may be formed with an interval therebetween, e.g., the plurality of common electrodes370may be spaced apart from one another.

The common electrode270may include any suitable transparent conductive material, such as, for example, AZO, GZO, ITO, IZO, etc. It is also contemplated that the common electrode270may be formed from one or more conductive polymers, e.g., polyaniline, PEDOT:PSS, etc. According to exemplary embodiments, the common electrode270may serve to generate an electric field together with the pixel electrode192, and thereby, configured to control an alignment direction of the liquid crystal molecules310.

As seen inFIG. 2, a lower insulating layer350is formed on the common electrode270. In exemplary embodiments, the lower insulating layer350may include any suitable material, such as, for example, an inorganic insulating material, e.g., silicon nitride (SiNx), silicon oxide (SiOx), etc.

The roof layer360is formed on the lower insulating layer350. The roof layer360may serve to support a space (microcavity) to be formed between the pixel electrode192and the common electrode270. In exemplary embodiments, the roof layer360may be formed of an organic insulating material.

An upper insulating layer370is formed on the roof layer360. The upper insulating layer370may include any suitable inorganic insulating material, e.g., SiNx, SiOx, etc.

The lower insulating layer350, the roof layer360, and the upper insulating layer370may include the injection hole307positioned on one side surface (e.g., formed in a portion corresponding to the transistor formation region), to enable liquid crystal to be injected into the microcavity305. The injection hole307may be used even when removing the sacrificial layer (not shown) for forming the microcavity305.

According to exemplary embodiments, the lower insulating layer350and the upper insulating layer370may be omitted.

A capping layer390may be formed on the upper insulating layer370to, for instance, seal the injection hole307. In exemplary embodiments, the injection hole307is sealed by the capping layer390, which prevents the liquid crystal molecules310from leaking therefrom. As shown inFIGS. 2 and 3, the capping layer390may be formed throughout the entire region of the display device, and according to exemplary embodiments, the capping layer390may only be formed on and near the injection hole307. The upper surface formed with the capping layer390may be horizontal, e.g., parallel or substantially parallel to the lower surface of the insulation substrate110.

Corresponding polarizers (not shown) may be respectively positioned under the insulation substrate110and on the capping layer390. The polarizers may include a polarization element for polarization and a tri-acetyl-cellulose (TAC) layer for ensuring durability. According to exemplary embodiments, directions of the transmissive axes of the polarizer disposed on the capping layer390and the polarizer disposed below the insulation substrate110may be perpendicular or parallel to each other.

An exemplary process to manufacture the display is described in more detail with reference toFIGS. 4-13.

FIGS. 4-13are respective cross-sectional views of the display device ofFIG. 1during a process of manufacturing the display device ofFIG. 1, according to exemplary embodiments.

FIG. 4is a layout view of the display device ofFIG. 1at a first stage of the manufacturing process, according to exemplary embodiments.

Referring toFIG. 4, the gate line121and the storage voltage line131are formed on the insulation substrate110made of, for instance, transparent glass, plastic, and/or the like. The gate line121and the storage voltage line131may be formed of the same material, as well as formed together with the same mask. As previously described, the gate line121includes a first gate electrode124a, a second gate electrode124b, and a third gate electrode124c, and the storage voltage line131includes storage electrodes135aand135b, as well as includes a protrusion134protruding in a direction parallel (or substantially parallel) to the storage electrode135a. Adverting momentarily toFIG. 1, the structure of the storage electrodes135aand135bsurrounds a first subpixel electrode192hand a second subpixel electrode192lof an adjacent (or previous) pixel. A gate voltage is applied to the gate line121and a storage voltage is applied to the storage voltage line131. As such, the gate line121and the storage voltage line131are separated from each other. The storage voltage may include a constant voltage level or may include a swing (or otherwise variable) voltage level.

In exemplary embodiments, a gate insulating layer140covering the gate line121and the storage voltage line131is formed on the gate line121and the storage voltage line131.

In second and third stages of the manufacturing process, semiconductors151,154, and155, a data line171, and source/drain electrodes173a,173b,173c,175a,175b, and175care formed on the gate insulating layer140.

FIG. 5is a layout view of the display device ofFIG. 1at a second stage of the manufacturing process, according to exemplary embodiments.FIG. 6is a layout view of the display device ofFIG. 2at a third stage of the manufacturing process, according to exemplary embodiments. It is noted thatFIG. 5includes semiconductors151,154, and155being formed, whereasFIG. 6includes the data line171and the source/drain electrodes173a,173b,173c,175a,175b, and175cbeing formed. According to exemplary embodiments, however, the semiconductors151,154, and155, the data line171, and the source/drain electrodes173a,173b,173c,175a,175b, and175cmay be formed together, as described below.

For instance, a material for the semiconductors151,154, and155and a material for the data line171/the source electrodes173a,173b, and173c/the drain electrodes175a,175b, and175cmay be deposited (e.g., sequentially deposited). In this manner, two patterns may be formed together via an exposure, developing, and etching process by using a mask (e.g., a slit mask or transflective mask). In order for the semiconductor154positioned at the channel part of the first thin film transistor to not be etched, the corresponding portion is exposed through the slit or transflective region of the mask. While only one exposure, developing, and etching process has been described, it is also contemplated that multiple exposure, developing, and etching processes may be utilized.

A plurality of ohmic contacts (not shown) may be formed on the respective semiconductors151,154, and155and between the data line171and the source/drain electrodes173a,173b,173c,175a,175b, and175c.

Further, the first passivation layer180is formed on all of the data conductors171,173a,173b,173c,175a,175b, and175cand the exposed portion of the semiconductor154. As previously noted, the first passivation layer180may include any suitable inorganic insulator, such as SiNx, SiOx, etc., and/or an organic insulator.

FIGS. 7A and 7Billustrate the display device ofFIG. 1at a fourth stage of the manufacturing process, according to exemplary embodiments. It is noted thatFIG. 7Bis a cross-sectional view of the plan view illustrated inFIG. 7Ataken along sectional line II-II illustrated in the plan view ofFIG. 1

As seen inFIGS. 7A and 7B, a color filter230and a light blocking member220are formed on the first passivation layer180. Accordingly, it is noted thatFIG. 7Aprovides a layout view, whereasFIG. 7Bprovides a cross-sectional view, showing the color filter230and the light blocking member220after one or more processing steps, e.g., after one or more exposure and etching steps.

When forming the color filter230and the light blocking member220, the color filter230may be formed before the light blocking member220. The color filters230of the same color may be formed in adjacent pixels that are adjacent in a vertical direction (e.g., a direction parallel to data line171). As previously described, the color filters230and230′ including different colors may be formed in adjacent pixels that are adjacent in a horizontal direction (e.g., a direction parallel to gate line121). In this manner, exposing, developing, and etching processes may be performed for each color filter230. A display device including three primary colors may form the color filter230, and thereby, may be formed via three exposing, developing, and etching processes. In this manner, the color filter230′, which is formed on the data line171and positioned at a lower portion, may be formed before the color filter230, which is formed at an upper portion. As such, the color filter230′ and the color filter230may be overlapped with each other.

According to exemplary embodiments, the color filter230may be removed in those positions (or regions) where the first, second, and third contact holes186a,186b, and186care to be formed during an etching process of the color filter230.

Further, the light blocking member220is formed on the color filter230. As previously noted, the light blocking member220may include any suitable non-transmissive material. Referring to an oblique portion (illustrating the light blocking member220) ofFIG. 7A, the light blocking member220is formed in a lattice structure including an opening corresponding to a region where an image is displayed. As such, the color filter (e.g., color filter230) is formed at least in the opening.

According to exemplary embodiments, the light blocking member220includes a portion formed in a horizontal direction, e.g., a portion formed in a transistor formation region associated with the gate line121, the storage voltage line131, and the various thin film transistors, as well as includes a portion formed in a vertical direction, e.g., a portion formed in a region associated with the data line171, each of which is illustrated inFIG. 7A.

FIGS. 8A and 8Billustrate the display device ofFIG. 1at a fifth stage of the manufacturing process, according to exemplary embodiments. It is noted thatFIG. 8Bis a cross-sectional view of the plan view illustrated inFIG. 8Ataken along sectional line II-II illustrated in the plan view ofFIG. 1.

Referring toFIGS. 8A and 8B, the second passivation layer185is formed on the color filter230and the light blocking member220. As previously mentioned, the second passivation layer185may include any suitable material, such as, for example, an inorganic insulator, e.g., SiNx, SiOx, etc., or an organic insulator.

As such, the first contact hole186aand the second contact hole186bexposing the first drain electrode175aand the extension175b′ of the second drain electrode175b, respectively, are formed in the color filter230, the light blocking member220, and the passivation layers180and185. Further, in the color filter230, the light blocking member220, and the passivation layers180and185, the third contact hole186cmay be formed to expose the protrusion134of the storage voltage line131and the extension175c′ of the third drain electrode175c.

According to exemplary embodiments, the pixel electrode192may be formed including the first subpixel electrode192hand the second subpixel electrode192lon the second passivation layer185. In this manner, the pixel electrode192may be made of any suitable transparent conductive material, such as, for instance, AZO, GZO, ITO, IZO, etc. Further, it is noted that the first subpixel electrode192hand the second subpixel electrode192lare physically and electrically connected with the first drain electrode175aand the second drain electrode175bthrough the first and second contact holes186aand186b, respectively. Further, the connecting member194that electrically connects the extension175c′ of the third drain electrode175cand the protrusion134of the storage voltage line131through the third contact hole186cmay be formed. As such, a part of the data voltage applied to the second drain electrode175bmay be divided through the third source electrode173c. In this manner, the magnitude of the voltage applied to the second subpixel electrode192lmay be smaller than the magnitude of the voltage applied to the first subpixel electrode192h.

FIGS. 9A-9Dillustrate the display device ofFIG. 1at a sixth stage of the manufacturing process, according to exemplary embodiments. It is noted thatFIGS. 9C and 9Dare cross-sectional views of the plan view illustrated inFIG. 9Ataken along sectional lines II-II and III-III, which are respectively illustrated in the plan view ofFIG. 1. Further,FIG. 9Bis a perspective view of a portion of the display device ofFIG. 1, according to exemplary embodiments.

As seen inFIGS. 9A-9D, a sacrificial layer300may be formed, upon which the common electrode270is sequentially formed. The sacrificial layer300and the common electrode270may be formed by, for example, the following illustrative process.

The formation process of the sacrificial layer300is described first. Amorphous carbon, metal, or an inorganic material is deposited on all or a portion of the then existing surface of the display device including the second passivation layer185and the pixel electrode192. The deposited material corresponding to the sacrificial layer is etched to form the structure of the sacrificial layer300. Since the material for the sacrificial layer300may be at least one of the amorphous carbon, the metal, or the inorganic material, it is noted that different etch methods or etchants may be used based on the material utilized to form the sacrificial layer300. As shown inFIG. 9A, the sacrificial layer300longitudinally extends parallel (or substantially parallel) to the longitudinally extending direction of the data line171. In this manner, the sacrificial layer300may be elongated according to adjacent pixels that are vertically adjacent to each other.

According to exemplary embodiments, the sacrificial layer300is formed so that it is not formed on the data line171, such as seen inFIG. 9C.

As previously described, the sacrificial layer300is not formed of an organic material, such as a photoresist (PR) material, and as such, a side surface of the sacrificial material disposed near the data line171may be angled at 90±10 degrees, which is (or is substantially) a vertical structure.

According to exemplary embodiments, the sacrificial layer300is covered with a transparent conductive material, e.g., AZO, GZO, ITO, IZO, etc., which is deposited to form a common electrode270. In this manner, the common electrode270is positioned on the upper surface and the side surface of the sacrificial layer300. Further, the common electrode270longitudinally extends along the upper surface and the side surface of the sacrificial layer300. In other words, the longitudinally extending direction of the common electrode270may be parallel (or substantially parallel) to the longitudinal direction in which the gate line121extends.

FIGS. 10A-10Dillustrate the display device ofFIG. 1at a seventh stage of the manufacturing process, according to exemplary embodiments. It is noted thatFIGS. 10C and 10Dare cross-sectional views of the plan view illustrated inFIG. 10Ataken along sectional lines II-II and III-III, which are respectively illustrated in the plan view ofFIG. 1. Further,FIG. 10Bis a perspective view of a portion of the display device ofFIG. 1, according to exemplary embodiments.

As shown inFIGS. 10A-10D, a lower insulating layer350including, for instance, an inorganic insulating material, such as SiNx, SiOx, etc., is formed on the common electrode270to cover the common electrode270.

FIGS. 11A-11Dillustrate the display device ofFIG. 1at an eighth stage of the manufacturing process, according to exemplary embodiments. It is noted thatFIGS. 11C and 11Dare cross-sectional views of the plan view illustrated inFIG. 11Ataken along sectional lines II-II and III-III, which are respectively illustrated in the plan view ofFIG. 1. Further,FIG. 11Bis a perspective view of a portion of the display device ofFIG. 1, according to exemplary embodiments.

Referring toFIGS. 11A-11D, the roof layer360is formed on at least a portion of the lower insulating layer350. As previously noted, the roof layer360may contain any suitable material, such as an organic material. Further, the roof layer360is not formed in a region at which injection hole307is to be formed, which may also be referred to as a “injection hole open region.” As seen inFIG. 11A, the injection hole open region is formed to correspond to the aforementioned thin film transistor formation region, and thereby, is formed including a structure longitudinally extending parallel (or substantially parallel) to a longitudinal direction of the gate line121. Further, since the roof layer360is not formed in the injection hole open region, which is illustrated inFIG. 11D, the lower insulating layer350is exposed in the injection hole open region.

According to exemplary embodiments, the roof layer360is formed by, for instance, depositing a material for forming the roof layer including an organic material on the entire surface of the lower insulating layer350. In this manner, the deposited material may be exposed and developed using a mask. As such, the material disposed in association with the region corresponding to the injection hole open region may be removed, thereby forming the roof layer360. It is noted that the lower insulating layer350formed below the roof layer360in the injection hole open region is not etched but exposed. Accordingly, in the injection hole open region, the common electrode270and the lower insulating layer350are formed on the sacrificial layer300, such that in the other regions, the sacrificial layer300, the common electrode270, the lower insulating layer350, and the roof layer360are formed.

FIGS. 12A-12Dillustrate the display device ofFIG. 1at a ninth stage of the manufacturing process, according to exemplary embodiments. It is noted thatFIGS. 12C and 12Dare cross-sectional views of the plan view illustrated inFIG. 12Ataken along sectional lines II-II and III-III, which are respectively illustrated in the plan view ofFIG. 1. Further,FIG. 12Bis a perspective view of a portion of the display device ofFIG. 1, according to exemplary embodiments.

As illustrated inFIGS. 12A-12D, a material for an upper insulating layer370, which may include, for instance, an inorganic insulating material, such as SiNx, SiOx, etc., is deposited on all or at least a portion of the then existing surface of the display device.

FIGS. 13A-13Eillustrate the display device ofFIG. 1at a tenth and eleventh stage of the manufacturing process, according to exemplary embodiments. It is noted thatFIGS. 13D and 13Eare cross-sectional views of the plan view illustrated inFIG. 13Ataken along sectional lines II-II and III-III, which are respectively illustrated in the plan view ofFIG. 1. It is noted thatFIGS. 13A,13D, and13E correspond to the eleventh stage of the above-noted manufacturing process. Further,FIGS. 13B and 13Care perspective views of a portion of the display device ofFIG. 1respectively at the tenth and eleventh stages, according to exemplary embodiments.

As illustrated inFIGS. 13A and 13B, the injection hole307is formed by patterning (e.g., etching) one or more layers disposed in association with the injection hole open region.

More specifically, the lower insulating layer350and the upper insulating layer370are etched in the injection hole open region of the upper insulating layer370and the lower insulating layer350. In this manner, the common electrode270remains disposed in the injection hole open region. As illustrated inFIG. 13B, the common electrode270formed in the injection hole open region is then etched to expose the sacrificial layer300. According to exemplary embodiments, it is noted that the lower insulating layer350, the upper insulating layer370, and the common electrode270may be etched by the same etch process.

To etch the injection hole open region, a photoresist PR layer is formed, and the photoresist PR layer disposed in association with the injection hole open region is removed to form a photoresist pattern. In this manner, the injection hole307is etched according to the photoresist pattern. As such, in the injection hole open region, the materials associated with upper insulating layer370, lower insulating layer350, and the common electrode270are etched, such that a layer disposed below the sacrificial layer300is not etched. According to exemplary embodiments, a part of the sacrificial layer300may be etched or not etched in association with the etching of the upper insulating layer370, lower insulating layer350, and the common electrode270. As previously noted, depending on the formation of the sacrificial layer300, the process of etching the injection hole open region may be performed via dry etching or wet etching.

Referring toFIGS. 13B-13E, the exposed sacrificial layer300shown inFIG. 13Bis removed as seen inFIGS. 13C-13E. In exemplary embodiments, the sacrificial layer300is not formed of an organic material, but of, for instance, amorphous carbon, metal, and/or an inorganic material, such that a wet etch or a dry etch may be utilized to remove the sacrificial layer300depending on the material utilized.

According to exemplary embodiments, the photoresist pattern layer formed to etch the injection hole open region may be removed using a separate photoresist stripper.

In this manner, and with reference toFIGS. 2 and 3, an alignment layer (not illustrated) and/or the liquid crystal molecules310are injected in the microcavity305by way of, for instance, a capillary force.

A capping layer390is formed to seal the injection hole307, and thereby, to prevent liquid crystal molecules310from leaking outside the microcavity305.

According to exemplary embodiments, the lower insulating layer350and the upper insulating layer370may be omitted.

While not illustrated, a process of attaching a respective polarizer (not illustrated) below the insulation substrate110and on the upper insulating layer370may also be performed. As previously noted, the polarizers may include any suitable polarization element for polarization and a TAC layer to facilitate durability. According to exemplary embodiments, directions of the transmissive axes of the polarizer disposed on the capping layer390and the polarizer disposed below the insulation substrate110may be perpendicular or parallel to each other.

According to exemplary embodiments, the sacrificial layer300is not formed of an organic material, but instead, includes at least one of the amorphous carbon, the metal, and the inorganic material. As such, a side surface of the microcavity305may be angled at 90±10 degrees with respect to the insulation substrate110, and thereby, may form a (or substantially a) vertical surface. As previously mentioned, if liquid crystal molecules310are not sufficiently injected at the side surface of the microcavity305or the cell gap is relatively wide, light leakage may become an issue, such that a light blocking member220may be utilized to thwart such issues. However, according to exemplary embodiments, the side wall of microcavities305are sufficiently vertical with respect to the insulation substrate110(e.g., angled at 90±10 degrees), such that the horizontal area corresponding to the cell gap may be relative more narrow, and a wider opening area to inject liquid crystal molecules310may be obtained.

As described above, to form the side wall portions of the microcavity region305with an angle of 90±10 degrees, the sacrificial layer300is not made of an organic material, but various other materials may be utilized, such amorphous carbon, metal, and/or an inorganic material. Accordingly, formation of the sacrificial layer300using one or more of amorphous carbon, metal, and an inorganic material is described in more detail in association withFIGS. 14-16.

FIGS. 14A-14Dillustrate a process of forming a sacrificial layer including amorphous carbon and removing the sacrificial layer to form a microcavity, according to exemplary embodiments.

As shown inFIG. 14A, after forming an underlying structure including the pixel electrode192, a material300′ utilized to form the sacrificial layer (e.g., a material including amorphous carbon) is deposited at least on a portion of the underlying structure corresponding to where the microcavity305is to be formed.

Referring toFIG. 14B, the material300′ including amorphous carbon is etched to form a pattern corresponding to the sacrificial layer300. When etching the material300′, a photoresist pattern is formed on the material300′, and the material300′ is dry-etched utilizing the photoresist pattern as a mask. In this manner, the sacrificial layer300including amorphous carbon is formed.

According to exemplary embodiments, a common electrode270is formed on the sacrificial layer300, and then a lower insulating layer350, a roof layer360, and an upper insulating layer370are deposited on the common electrode270. As seen inFIG. 14C, only the lower insulating layer350is shown and the other overlying layers are omitted.

In exemplary embodiments, an injection hole307is formed to expose a portion of the sacrificial layer300. As such, the sacrificial layer300is removed to form a microcavity305, as seen inFIG. 14D. It is noted that the sacrificial layer300may be removed by dry etching the sacrificial layer300.

It is noted that when an organic material is utilized to form the sacrificial layer, the organic material is typically formed utilizing a baking process, such that a characteristic of the other surrounding layers may be undesirably affected (or otherwise changed) due to, for example, heat associated with the baking process. It is also noted that, when applying a plasma deposition process, the sacrificial layer made of an organic material may not be entirely wet-etched, such that at least some of the sacrificial layer may remain.

According to exemplary embodiments, however, formation of the sacrificial layer300including amorphous carbon does not undesirably affect (or otherwise change) the characteristics of the other surrounding layers, and the sacrificial layer300may be entirely removed via the dry etch process, such that a side surface thereof may be sharply formed.

It is noted that the side surface of the sacrificial layer300including amorphous carbon may include a reverse taper structure, such as illustrated inFIG. 15.

FIG. 15is a cross-sectional view of a display device, according to exemplary embodiments.

It is noted that the cross-sectional view ofFIG. 15is taken along sectional line II-II illustrated inFIG. 1; however, inFIG. 15unlikeFIG. 2, the side surface of the microcavity305includes a reverse taper structure, and an insulating layer187for preventing a short is additionally formed on the pixel electrode192. The insulating layer187for preventing the short is an insulating layer configured to remove a problem of the common electrode270being short-circuited while contacting the pixel electrode192when the microcavity305is not supported. It is noted, however, that the insulating layer187for preventing the short may be omitted.

According to exemplary embodiments, the microcavity305including the side surface being reversely tapered may also be generated when the sacrificial layer is formed using an inorganic material or a metal, as well as when the sacrificial layer300includes amorphous carbon.

In exemplary embodiments, the sacrificial layer300may be formed from an inorganic material. It is noted that such a sacrificial layer300may be similarly formed as the sacrificial layer including amorphous carbon as described in association withFIG. 14.

FIGS. 16A-16Dillustrate a process of forming a sacrificial layer including a metal and removing the sacrificial layer to form a microcavity, according to exemplary embodiments.

As seen inFIG. 16A, after forming an underlying structure including the pixel electrode192, a material300-1′ is deposited at least on a portion of the underlying structure corresponding to where the microcavity305is to be formed. It is noted that the metal may be a single metal material or may be an alloy material.

Referring toFIG. 16B, the material300-1′ is etched to form a pattern corresponding to the sacrificial layer300-1. When etching the material300-1′, a photoresist pattern is formed on the material300-1′ and the material300-1′ is wet-etched or dry-etched utilizing the photoresist pattern as a mask. In this manner, the sacrificial layer300-1including the metal is formed.

According to exemplary embodiments, a common electrode270is formed on the sacrificial layer300-1, and then a lower insulating layer350, a roof layer360, and an upper insulating layer370are deposited on the common electrode270. As seen inFIG. 16C, only the lower insulating layer350is shown, and the other overlying layers are omitted.

In exemplary embodiments, an injection hole307is formed to expose a portion of the sacrificial layer300-1. As such, the sacrificial layer300-1is removed to form a microcavity305, as seen inFIG. 16D. It is noted that the sacrificial layer300-1may be removed by wet etching the sacrificial layer300-1.

As previously mentioned, when an organic material is utilized to form the sacrificial layer, the organic material is typically formed utilizing a baking process, such that a characteristic of the other surrounding layers may be undesirably affected (or otherwise changed) due to, for example, heat associated with the baking process. It is also noted that when applying a plasma deposition process, the sacrificial layer made of an organic material may not be entirely wet-etched, such that at least some of the sacrificial layer may remain.

According to exemplary embodiments, however, formation of the sacrificial layer300-1including metal does not undesirably affect (or otherwise change) the characteristics of the other surrounding layers, and the sacrificial layer300-1may be entirely removed via the wet etching process, such that a side surface thereof may be sharply formed.

It is noted that the side surface of the sacrificial layer300-1including the metal may include the reverse taper structure, such as illustrated inFIG. 15.

According to exemplary embodiments, the metal may be formed via a process at a temperature of more than 300 degrees. At this temperature, however, the characteristics of the other surrounding layers are not undesirably affected, but an electro-chemical reaction is possible, such that the sacrificial layer300may be removed via an etchant without limitation, which is different from removable of a sacrificial layer removed when formed including an organic material.

It is noted, however, that since the above-noted etchant may etch other surrounding layers, care should be exercised.

According to exemplary embodiments, the common electrode270or the pixel electrode192may include poly-crystalline ITO among other transparent conductive materials. Poly-crystalline ITO typically exhibits a large selectivity for a metal etchant, such that it is not etched together when removing the sacrificial layer300including the metal. Also, poly-crystalline ITO is typically etched using aqua regia (HNO3+HCl) due to a structural characteristic of the poly-crystalline ITO. In this manner, chemical resistance may be suddenly increased after annealing to increase crystallization.

Further, according to exemplary embodiments, the sacrificial layer300-1including the metal may be formed using an electroless plating process. Electroless plating typically enables fast layer formation, and the sacrificial layer300-1may be formed of a metal, such as copper (Cu), nickel (Ni), aluminum (Al), chromium (Cr), etc.

Moreover, according to exemplary embodiments, the common electrode270or the pixel electrode192may include amorphous ITO or amorphous IZO, and galvanic corrosion may result when the metal (or the etchant utilized to remove the metal) is used as the sacrificial layer300-1. As such, it is noted that care should be exercise to determine materials of the sacrificial layer, the pixel electrode, and the common electrode to prevent galvanic corrosion, which is described in more detail in association withFIGS. 17-20.

FIGS. 17-20respectively illustrate relations between a transparent electrode and a metal sacrificial layer, according to exemplary embodiments.

The table ofFIG. 17provides corrosion existence with reference to a standard electrode potential of a metal material utilized to form the sacrificial layer300-1and a metal for a transparent electrode (e.g., a common electrode270or a pixel electrode192). As seen inFIG. 17, a horizontal direction is associated with the metal material for the sacrificial layer300-1and the vertical direction is associated with the material for the transparent electrode.

In the table ofFIG. 17, the metal material for the sacrificial layer300-1is nickel (Ni), molybdenum (Mo), aluminum (Al), copper (Cu), or chromium (Cr), and the material for the transparent electrode is indium (In), zinc (Zn), or tin (Sn) used in, for example, ITO, IZO, etc.

The table ofFIG. 17includes the standard electrode potentials of each metal. A metal including the lower standard electrode potential among the two metals of the metal utilize to form the sacrificial layer and the material utilized to form the transparent electrode functions as an anode and may be corroded. In this manner, the corrosion may be accelerated according to the difference in the standard electrode potentials.

As shown inFIG. 17, nickel, molybdenum, and aluminum may corrode the amorphous ITO or the amorphous IZO that is contacted when etching. Therefore, inFIG. 17, it may be confirmed that chromium and copper better materials from which to form the sacrificial layer, and the usage of nickel, molybdenum, and aluminum is limited.

In the table ofFIG. 17, a portion where the material utilized to form the sacrificial layer and the material utilized to form the transparent electrode cross describes the material (the anode) including the lower standard electrode potential. When a material acting as the anode is the material utilized to form the sacrificial layer, only the material utilized to form the sacrificial layer may be etched and the material for the transparent electrode remains, such that exemplary embodiments may be realized without concern. However, when a material functioning as the anode is the material utilized to form the transparent electrode, the material utilized to form the transparent electrode is also corroded in removing the material utilized to form the sacrificial layer, such that it is not as easy to realize exemplary embodiments disclosed herein.

According to exemplary embodiments, the material utilized to form the transparent electrode does not generally include one metal material, but includes a plurality of materials as an alloy type, such that the standard electrode potentials of all materials included in the material utilized to form the transparent electrode are lower than the standard electrode potential of the material utilized to form the sacrificial layer.

FIG. 18is a table showing a standard electrode level, andFIG. 19is a galvanic series showing a degree of galvanic corrosion (e.g., heterogeneous metal corrosion).

FIG. 20is a table to determine the potential of heterogeneous metal corrosion (e.g., galvanic corrosion) not forming after disposing the same metals in a transverse direction and a longitudinal direction. As seen inFIG. 20, those conditions indicated by an “X” may be used without considering heterogeneous metal corrosion.

While exemplary embodiments have been described, such that the pixel electrode192is positioned under the liquid crystal layer3or in the microcavity305and the common electrode270is positioned on each of the liquid crystal layer3and the microcavity305, it is also contemplated that the common electrode270may be positioned under the liquid crystal layer3or in the microcavity305.