METHOD FOR IMPROVING TX GAIN IN ENVELOPE TRACKING SYSTEMS

A method and system enhances the gain of a propagation path of a radio frequency (RF) signal while utilizing an envelope tracking (ET) mechanism to provide power to a power amplifier within the propagation path. An envelope tracking (ET) controller detects using the ET mechanism an RF envelope of the RF signal being propagated towards the power amplifier. The ET controller applies envelope pre-distortion to the RF signal. The ET controller initiates a function for shaping the supply voltage of the power amplifier by selecting a shaping table that can provide a specific level of increasing amplifier gain at higher signal drive level. The ET controller shapes the supply voltage for the power amplifier by adjusting values corresponding to the detected RF envelope. As a result, RF signals are propagated from the transceiver to the power amplifier output port across high and low transceiver drive levels with net constant gain.

DETAILED DESCRIPTION

The illustrative embodiments provide a method and system for improving the gain of a propagation path of a radio frequency (RF) signal while utilizing an envelope tracking (ET) mechanism to provide power to a power amplifier within the propagation path. An envelope tracking (ET) controller either detects or generates, using the ET mechanism, an RF envelope of the RF signal being propagated towards the power amplifier. The ET controller applies envelope pre-distortion to the RF signal which results in a decreasing gain across a propagation path of the RF signal at high transceiver drive levels. The ET controller initiates a function for shaping the supply voltage of the power amplifier by selecting a shaping table. The selected shaping table provides a specific level of increasing amplifier gain at a higher signal drive level. The ET controller shapes the supply voltage for the power amplifier by adjusting values corresponding to the detected RF envelope. As a result, the ET controller enables RF signals to be propagated from the transceiver to an output port of the power amplifier across high and low transceiver drive levels with net constant gain.

In the following detailed description of exemplary embodiments of the disclosure, specific exemplary embodiments in which the various aspects of the disclosure may be practiced are described in sufficient detail to enable those skilled in the art to practice the invention, and it is to be understood that other embodiments may be utilized and that logical, architectural, programmatic, mechanical, electrical and other changes may be made without departing from the spirit or scope of the present disclosure. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the present disclosure is defined by the appended claims and equivalents thereof.

Within the descriptions of the different views of the figures, similar elements are provided similar names and reference numerals as those of the previous figure(s). The specific numerals assigned to the elements are provided solely to aid in the description and are not meant to imply any limitations (structural or functional or otherwise) on the described embodiment.

As further described below, implementation of the functional features of the disclosure described herein is provided within processing devices and/or structures and can involve use of a combination of hardware, firmware, as well as several software-level constructs (e.g., program code and/or program instructions and/or pseudo-code) that execute to provide a specific utility for the device or a specific functional logic. The presented figures illustrate both hardware components and software and/or logic components.

Those of ordinary skill in the art will appreciate that the hardware components and basic configurations depicted in the figures may vary. The illustrative components are not intended to be exhaustive, but rather are representative to highlight essential components that are utilized to implement aspects of the described embodiments. For example, other devices/components may be used in addition to or in place of the hardware and/or firmware depicted. The depicted example is not meant to imply architectural or other limitations with respect to the presently described embodiments and/or the general invention.

The description of the illustrative embodiments can be read in conjunction with the accompanying figures. It will be appreciated that for simplicity and clarity of illustration, elements illustrated in the figures have not necessarily been drawn to scale. For example, the dimensions of some of the elements are exaggerated relative to other elements. Embodiments incorporating teachings of the present disclosure are shown and described with respect to the figures presented herein.

With specific reference now toFIG. 1, there is depicted a block diagram of an example wireless communication device100, within which the functional aspects of the described embodiments may be implemented. Wireless communication device100represents a device that is adapted to transmit and receive electromagnetic signals over an air interface via uplink and/or downlink channels between the wireless communication device100and communication network equipment (e.g., base-station145) utilizing a plurality of different communication standards, such as Global System for Mobile Communications (GSM) Code Division Multiple Access (CDMA), Orthogonal Frequency Division Multiple Access (OFDMA), Long Term Evolution (LTE) and similar systems. In one or more embodiments, the wireless communication device can be a mobile cellular device/phone or smartphone, or laptop, netbook or a tablet computing device, or other types of communications devices. Wireless communication device100comprises processor105and interface circuitry125, which are connected to memory component110via signal bus102. Also illustrated in wireless communication device100is storage117. Interface circuitry125includes digital signal processor (DSP)128. Wireless communication device100also comprises input/output (I/O) devices129. Wireless communication device100also includes a transceiver module130for sending and receiving communication signals. In at least some embodiments, the sending and receiving of communication signals occur wirelessly and are facilitated by one or more antennas140coupled to the transceiver module130. The number of antennas can vary from device to device, ranging from a single antenna to two or more antennas, and the presentation within wireless communication device100of one antenna140is merely for illustration.

Wireless communication device100is able to wirelessly communicate to base-station145via antenna140. Base station145can be any one of a number of different types of network stations and/or antennas associated with the infrastructure of the wireless network and configured to support uplink and downlink communication via one or more of the wireless communication protocols, as known by those skilled in the art.

Transceiver module130comprises baseband integrated circuit (BBIC)133and radio frequency integrated circuit (RFIC)132. In one embodiment, RFIC132comprises RF transceiver202, local memory150, envelope tracking (ET) utility167, processor155and ET controller160. In an alternate embodiment, at least one of the components indicated as being included within RFIC132can be located outside of RFIC132, within transceiver module130. Transceiver module130also comprises RF processing block201. RF processing block201comprises power amplifier208, transceiver or modulator202, and other processing block components shown inFIG. 2. In one embodiment, transceiver module130also includes local processor155, which can be described as a digital signal processor (DSP). According to one aspect of the disclosure, local memory/storage150includes therein firmware, such as ET utility167, which supports the various processing functions of transceiver module130. The structural makeup of transceiver module130is described in greater detail inFIG. 2.

In addition to the above described hardware components of wireless communication device100, various features of the invention may be completed or supported via software (or firmware) code and/or logic stored within at least one of memory110and local memory150, and respectively executed by DSP128, processor105, or local processor155of transceiver module130. Thus, for example, illustrated within memory110and/or local memory150are a number of software/firmware/logic components/modules, including shaping tables114, applications116and ET utility167. In one embodiment, processor105executes ET utility167to provide ET logic120.

The various components within wireless communication device100can be electrically and/or communicatively coupled together as illustrated inFIG. 1. As utilized herein, the term “communicatively coupled” means that information signals are transmissible through various interconnections between the components. The interconnections between the components can be direct interconnections that include conductive transmission media, or may be indirect interconnections that include one or more intermediate electrical components. Although certain direct interconnections are illustrated inFIG. 1, it is to be understood that more, fewer or different interconnections may be present in other embodiments.

FIG. 2provides a block diagram representation of a structural configuration of transceiver module130comprising a power amplifier that utilizes an envelope (ET) tracking mechanism, according to one embodiment. Transceiver module130comprises radio frequency (RF) processing block201, envelope tracking (ET) controller160and ET converter230. ET controller160manages an operation of ET converter230. In one embodiment, ET controller includes the functionality of a direct power amplifier controller and, as a result, controls operation of power amplifier208. The direct power amplifier controller functionality can include coarse gain setting functionality which can be achieved by control of RF switches for routing of RF signals among the individual amplifier stages within power amplifier208, and bias settings for the individual amplifier stages within power amplifier208. RF processing block201comprises RF transceiver or digital modulator202, which includes RF transmitter (TX)204and an RF receiver (RX) (not shown). In one embodiment, RF transceiver202and ET controller160constitute RFIC132(not shown). RF processing block201also comprises AM pre-distortion module205, power amplifier (PA)208and filter216. Filter216is coupled to an output port of power amplifier208. Filter216is communicatively coupled to antenna140. Also shown within RF processing block201is RF Input206and RF Output212, which respectively represent the input signal and the output signal of PA208. Power is provided to PA208via supply line214from ET converter230.

ET controller160is coupled to at least one output port of transceiver202in order to track the RF envelope of a propagating RF signal. In addition, ET controller160is also coupled to ET converter230. In one implementation, ET converter230includes shaping tables234. However, in another implementation, ET controller160receives inputs240which include shaping tables114(FIG. 1).

ET controller160improves the gain of a propagation path of an RF signal by utilizing envelope pre-distortion and supply voltage shaping. In transceiver module130, transceiver202propagates an RF signal and ET controller160activates an envelope tracking (ET) mechanism to detect or generate an RF envelope of the RF signal propagating along the propagation path. In one embodiment, ET controller160detects the In-phase (I) and Quadrature (Q) RF signal components or coordinates, which collectively provide a rectangular coordinate representation of the RF signal. ET controller160converts the I and Q signal components to polar components having amplitude and phase. The amplitude of the polar coordinate representation provides the RF signal envelope. In one implementation, ET controller160utilizes a Coordinate Rotation Digital Computer (CORDIC) to perform the conversion from rectangular to polar coordinates.

As described above, ET controller160either detects or generates, using the ET mechanism, an RF envelope of the RF signal being propagated towards power amplifier208. Furthermore, ET controller160utilizes AM pre-distortion module205to apply envelope pre-distortion to the RF signal to appropriately adjust the amplitude of the RF signal envelope to compensate for the increasing gain of power amplifier208at high transceiver drive levels. Adjusting the amplitude of the RF signal envelope results in a decreasing RF signal gain (FIG. 4A) at high transceiver drive levels or RF drive levels. ET controller160shapes the supply voltage of power amplifier208by selecting a shaping table that can provide a specific level of increasing amplifier gain (FIG. 4B) at high transceiver drive levels. The increasing gain of power amplifier208is substantially compensated for by the decreasing RF envelope gain and enables the RF signal to be transmitted with the proper RF signal envelope.

ET controller160shapes the supply voltage for power amplifier208by adjusting amplitude values corresponding to the detected RF envelope in order to provide a specific level of increasing amplifier gain at high transceiver drive levels. By shaping the supply voltage and applying envelope pre-distortion, ET controller160enables RF signals to be propagated from transceiver202to an output port of power amplifier208across high and low transceiver drive levels, with a net constant gain. By controlling the ET converter230and AM pre-distortion205to respectively provide the decreasing RFIC envelope gain and the increasing amplifier envelope gain at high drive levels, envelope tracking of power amplifier208can be implemented to benefit amplifier efficiency, without causing a gain reduction in power amplifier208, which would necessitate a higher power of RF Input206.

In one embodiment, ET controller160initiates the shaping function by accessing a stored data structure having a number of shaping tables that can be utilized to shape the supply voltage to power amplifier208. ET controller160selects, from among the number of shaping tables, a shaping table that provides a specific or pre-determined level of increasing amplifier gain at higher signal drive levels. ET controller160adjusts values corresponding to the detected RF envelope using the selected shaping table to provide adjusted envelope values. These adjusted envelope values are utilized to modulate a supply voltage (e.g., VCC317) to provide a shaped supply voltage to power amplifier208. With the shaped supply voltage, ET controller160provides an increasing amplifier gain at signal drive levels that exceed a threshold drive level. ET controller160shapes the supply voltage to achieve constant gain of power amplifier208across low signal drive levels and increasing power amplifier gain across higher signal drive levels. Specifically, ET controller160adjusts the RF signal envelope to provide an increasing power amplifier gain at high signal drive levels and relatively lower, constant gain at lower signal drive levels. The lower, constant gain is associated with a lower supply voltage to power amplifier208, and the lower supply voltage is associated with a smaller magnitude of the RF signal envelope.

ET controller160initiates envelope pre-distortion by accessing a stored data structure having pre-determined values for a distorted RF signal envelope expected at an output port of power amplifier208. The distorted RF signal is identified by at least one of an operating frequency band and a communication mode such as an operating condition or environment. ET controller160determines using LUT306or calculates values that compensate for (a) the predetermined values associated with the distorted RF signal envelope expected in order to maintain appropriate RF signal envelope amplitudes and (b) an increasing amplifier gain at high signal drive levels. ET controller160provides pre-distortion of the RF signal envelope using the calculated values, following digital modulation of a corresponding signal envelope. In one embodiment, ET controller160applies envelope pre-distortion by providing, via AM pre-distortion module205: (a) a first, lower amplitude of the RF signal envelope when a magnitude of the RF envelope is large and the power amplifier gain is high; and (b) a second, higher amplitude of the RF envelope when the magnitude of the RF envelope is small and the power amplifier gain is low. By applying envelope pre-distortion using AM pre-distortion module205, ET controller160determines an amplitude adjustment to compensate for an expected power amplifier output distortion and avoids using a feedback mechanism to adjust for a detected power amplifier output distortion. As a result, ET controller160enables power amplifier208to maintain a pre-established high level of efficiency.

FIG. 3is a block diagram illustrating an embodiment of Transceiver Module130comprising (a) a radio frequency integrated circuit (RFIC) that provides envelope tracking to enable shaping of an amplifier supply voltage and (b) a power amplifier that is powered using the shaped supply voltage, according to one embodiment. Transceiver module130comprises RFIC132, ET converter230and power amplifier208. ET converter230and power amplifier208are respectively coupled to RFIC132. RFIC132comprises RF transceiver202and amplitude modulation (AM) pre-distortion component205coupled to the outputs of digital modulator202. RFIC132also comprises delay components324and digital to analog converter (DAC) components326. Also included in RFIC132are low-pass filters216and multiplier components328. In addition, RFIC132comprises power pre-amplifier components330coupled to respective output ports of multiplier components328. RFIC132includes Balun332which functions as a transmission line transformer. The name “Balun” is derived from a corresponding device function for converting between differential, or “balanced”, signals and single-ended, or “unbalanced” signals. Balun332is coupled to the input port of power amplifier208.

RFIC132also comprises envelope tracking (ET) controller160which is also coupled to at least one output port of digital modulator202. RFIC132also comprises look up table (LUT)306. In one implementation, LUT306is an Electrically Erasable Programmable Read-Only Memory (EEPROM) LUT. In one implementation, LUT306is coupled to both AM pre-distorter205and ET controller160to facilitate AM pre-distortion and PA supply voltage shaping, respectively. In one embodiment, ET controller160includes amplitude modulation (AM) correction module307which is utilized by ET controller160to retrieve the appropriate pre-distortion data or files from LUT306. ET controller160is able to retrieve from LUT306AM pre-distortion values based on at least one of: (a) amplifier gain; (b) offset; (c) RF signal delay; and (d) power amplifier temperature and/or associated component temperature. In one embodiment, ET controller160initiates supply voltage shaping by retrieving shaping tables from LUT306. The shaped supply voltage is provided to power amplifier208via ET converter230. Delay component310is coupled to an output port of ET controller160and provides specific functionality described in the below paragraphs. Coupled to an output port of delay component310is DAC312which is coupled to low-pass filter314. Low-pass filter314provides VREF316as an output voltage. In one embodiment, VREF316represents the adjusted RF signal envelope. In another embodiment, VREF316represents the detected or generated RF signal envelope. RFIC132also comprises ET converter230which is coupled to an output of low-pass filter314and which receives VREF316as an input voltage which ET converter230uses to generate the power amplifier supply voltage. Supply power Vccis provided to ET converter230by source VBATT317. ET converter230provides envelope modulated and voltage shaped supply power VET318to power amplifier208. In shaping the power amplifier supply voltage, ET controller160adjusts amplitude values corresponding to the detected RF envelope to generate VREF316and modulates Vcc317(using ET converter230) with VREF316to generate supply power VET318. By providing a shaped supply voltage (i.e., VET318) to power amplifier208, ET controller160provides an increasing gain of power amplifier208at higher signal drive levels.

Within the RF signal propagation path, digital modulator202provides a digital complex baseband signal pair which is received by AM pre-distortion component205. AM pre-distortion component205provides values to compensate the signals for distortion expected at the output port of power amplifier208. In one embodiment, the RF input signal envelope is detected and the detected signal envelope is used to determine the appropriate pre-distortion values. ET controller160applies an envelope pre-distortion, via AM pre-distortion component205, to the digital complex baseband signal to compensate the signal amplitude for distortion that is expected at the output of power amplifier208. In an embodiment, the AM pre-distortion component205employs the values using complex arithmetic to adjust the envelope or amplitude of the digital complex baseband signal pair. The applied envelope pre-distortion provides a decreasing RF envelope gain at higher signal drive levels of RF transceiver202.

Delay components324facilitate timing synchronization between propagation of an RF signal to power amplifier208and provision of an ET supply voltage to power amplifier208. The pre-distorted and delayed digital complex baseband signal pair is passed to DACs326for converting from digital to analog to form analog baseband signals. The analog baseband signals(s) are low-pass filtered to remove harmonic distortion using filters216to form a filtered analog baseband signal. Modulation of the filtered analog baseband signals onto an RF carrier is achieved using multiplier components328. Multipliers328are used to mix the baseband signals with in-phase and quadrature RF carrier signals (not shown) to generate a modulated RF carrier in differential form. Amplifiers330provide an additional power gain stage to form an amplified modulated RF signal in differential form. Balun332receives the amplified modulated RF signal and provides a corresponding single-ended RF signal to power amplifier208. In an embodiment, Balun332performs one or more balancing functions associated with differences in transmission line characteristics between the respective differential RF signals.

Power amplifier208receives as an input signal the corresponding RF signal in synchronization with the envelope tracked supply voltage associated with the RF input signal envelope. The increasing amplifier gain provided by ET converter230is substantially compensated for by the decreasing RF envelope gain provided by the applied envelope pre-distortion. Applying envelope distortion within the RF signal propagation path and shaping a power amplifier supply voltage by adjusting values corresponding to the detected RF envelope collectively provide a net constant gain across lower and higher transceiver drive levels of the RF signal propagating along the propagation path.

FIG. 4Aillustrates a waveform of RFIC envelope gain plotted against RF drive level, according to one embodiment. Plot400comprises a vertical axis representing RFIC envelope gain, a horizontal axis representing RF drive level and waveform410. In one embodiment, the RF drive level is the amplitude of the RF signal provided by RF transceiver202and is also referred to herein as the transceiver drive level. Gain “A”406and gain “B”408are gain values illustrated on the vertical or RFIC envelope gain axis. Threshold drive level412is illustrated as a vertical dashed line perpendicular to the horizontal or RF drive level axis. At RF drive levels that are greater than the threshold drive level (indicated by threshold drive level412), waveform410indicates that the RFIC envelope gain is decreasing as the drive level increases. When the RF drive level is less than the threshold drive level, the RFIC envelope gain is equal to A. The gain value “B” represents the PA envelope gain described in plot450(FIG. 4B) and is indicated in plot400to provide a relative gain indication for an implementation in which the RFIC envelope gain and the PA envelope gain differ. The RFIC envelope gain is measured across an RF propagation path between an output port of digital modulator202and an input port of power amplifier208. As described above (FIG. 3), ET controller160applies an envelope pre-distortion to a propagating RF signal to compensate for distortion that is expected at an output of power amplifier208. The applied envelope pre-distortion provides the decreasing RF envelope gain at higher signal drive levels of RF transceiver202.

FIG. 4Billustrates a waveform of a power amplifier (PA) envelope gain plotted against RF drive level, according to one embodiment. Plot450comprises a vertical axis representing PA envelope gain, a horizontal axis representing RF drive level and waveform460. Gain “A”456and gain “B”458are gain values illustrated on the vertical or PA envelope gain axis. Threshold drive level462is illustrated as a vertical dashed line perpendicular to the horizontal or RF drive level axis. At RF drive levels that are greater than the threshold drive level (indicated by threshold drive level462), waveform460indicates that the PA envelope gain is increasing as the drive level increases. When the RF drive level is less than the threshold drive level, the RFIC envelope gain is equal to B. The gain value “A” represents the RFIC envelope gain described in plot400(FIG. 4A) and is indicated in plot450to provide a relative gain indication for an implementation in which the RFIC envelope gain and the PA envelope gain differ. The PA envelope gain is a measure of an instantaneous gain of power amplifier208provided by a ratio of the output RF signal envelope and the input RF signal envelope. As described above (FIG. 3), ET controller160shapes the supply voltage for power amplifier208by adjusting values corresponding to the detected RF envelope in order to provide the specific level of increasing amplifier gain at high transceiver drive levels (i.e., greater than the threshold drive level).

FIG. 5depicts saturation waveforms for a power amplifier and a gain adjustment waveform based on transceiver drive level, according to one embodiment. Plot500comprises a vertical axis representing power amplifier gain and labeled as “PAgain_dB”. In addition, plot500comprises horizontal axis representing RF output power and labeled as “RF_output_power”. Plot500provides five saturation waveforms corresponding to five different biasing supply voltages. In particular, first saturation waveform506corresponds to a 1 volt biasing supply voltage, second saturation waveform508corresponds to a 2 volt biasing supply voltage, third saturation waveform510corresponds to a 3 volt biasing supply voltage, fourth saturation waveform512corresponds to a 4 volt biasing supply voltage and fifth saturation waveform514corresponds to a 5 volt biasing supply voltage. Plot500also comprises enhanced PA envelope gain waveform516and flat gain waveform518. Additionally, plot500comprises probability density function waveform520.

Enhanced PA envelope gain waveform516represents the impact (measured relative to flat gain waveform518) that applying a shaping function to the supply voltage has on the PA envelope gain. Compared with waveform460of plot450(FIG. 4B), enhanced PA envelope gain waveform516similarly depicts an increasing PA envelope gain at higher drive levels. In one implementation, the shaping function is provided by the use of shaping tables. From the multiple saturation waveforms of plot500, it can be inferred that if the shaping function associated with the enhanced PA envelope gain is de-activated the gain of the PA varies with RF drive level on PA supply voltage. However, a shaping table is used to shape the supply voltage with RF drive level to achieve a net constant gain of the RF signal propagating along the propagation path across a specific range of RF drive levels. In order to achieve the net flat gain of the RF signal across the propagation path, the supply voltage is “shaped” to provide a constant gain of the PA envelope at lower drive levels and the increasing gain of the PA envelope at higher drive levels. The increasing gain of the PA envelope at higher drive levels compensates for a decreasing RF envelope gain (at higher signal drive levels) that is provided by applying an envelope pre-distortion to the RF signal to compensate for distortion that is expected at an output of power amplifier208.

Probability density function waveform520indicates that the operating time of envelope-tracking power amplifier (e.g., power amplifier208) is spent primarily with the power amplifier using a relatively low supply voltage, with only occasional high-voltage excursions on high-power peaks. Based on the statistics that can be obtained using the probability density function, the amplifier's matching can be optimized to achieve the best efficiency by using the target peak- to average-power-ratio signals rather than simply designing for best efficiency at peak power and maximum supply voltage, as would be the case for a fixed-supply power amplifier. Designers can alter the amplifier's matching to increase efficiency around the peak of the signal's probability-density function, even if this necessitates a slight compromise in the peak power efficiency.

FIG. 6is a flow chart illustrating an embodiment of the method by which the above processes of the illustrative embodiments can be implemented. Specifically,FIG. 6illustrates one embodiment of a method for providing enhanced gain associated with a propagation path that includes a power amplifier that is powered by an ET supply voltage. Although the method illustrated byFIG. 6may be described with reference to components and functionality illustrated by and described in reference toFIGS. 1-5, it should be understood that this is merely for convenience and alternative components and/or configurations thereof can be employed when implementing the method. Certain portions of the methods may be completed by ET utility167executing on one or more processors (processor105or DSP128) within wireless communication device100(FIG. 1), or a processing unit or ET controller160of RFIC132(FIG. 1). The executed processes then control specific operations of or on RFIC132. For simplicity in describing the method, all method processes are described from the perspective of RFIC132and specifically ET controller160.

The method ofFIG. 6begins at initiator block601and proceeds to block602at which ET controller160detects RF envelope of RF signal using ET mechanism. In particular, ET controller160tracks an amplitude of an RF signal being propagated to power amplifier208. At block604, ET controller160applies envelope pre-distortion to the RF signal to (a) compensate for distortion that is expected at an output of the power amplifier and (b) provide a decreasing RF envelope gain across a propagation path of the RF signal at high transceiver drive levels. At block606, ET controller160initiates or activates a function for shaping the supply voltage of power amplifier208. At block608, ET controller160selects a shaping table that provides a specific level of increasing amplifier gain at higher signal drive levels. At block610, ET controller160shapes the supply voltage for power amplifier208by adjusting values corresponding to the detected RF envelope in order to provide increasing amplifier gain at high transceiver drive levels. At block612, ET controller160enables RF signals to be propagated from RF transceiver202to an output port of power amplifier208across high and low transceiver drive levels with net constant gain. The process ends at block614.

The flowchart and block diagrams in the various figures presented and described herein illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. Thus, while the method processes are described and illustrated in a particular sequence, use of a specific sequence of processes is not meant to imply any limitations on the disclosure. Changes may be made with regards to the sequence of processes without departing from the spirit or scope of the present disclosure. Use of a particular sequence is therefore, not to be taken in a limiting sense, and the scope of the present disclosure extends to the appended claims and equivalents thereof.

In some implementations, certain processes of the methods are combined, performed simultaneously or in a different order, or perhaps omitted, without deviating from the spirit and scope of the disclosure. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems that perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.