Functional element package and fabrication method therefor

A functional element package includes a silicon substrate with a functional element having one of a mobile portion and a sensor thereon; a seal member being bonded with the silicon substrate to form an airtightly sealed space therein, and including a step portion in its height direction; a first wiring portion being connected with the functional element and extending from the airtightly sealed space to an outside thereof; a second wiring portion being different from the first wiring portion and extending from the step portion to an upper surface of the seal member; and a bump on the second wiring portion, in which the first wiring portion is bent towards the airtightly sealed space and connected via a photoconductive member with the second wiring portion on the step portion.

CROSS REFERENCE TO RELATED APPLICATIONS

The present application is based on and claims priority from Japanese Patent Application No. 2007-70292, filed on Mar. 19, 2007, and No. 2008-13249, filed on Jan. 24, 2008, the disclosure of which is hereby incorporated by reference in its entirety.

TECHNICAL FIELD

This disclosure relates to a functional element package having a mobile portion or a sensor and to which Micro Electro Mechanical Systems (MEMS) technology is applied, as well as to a fabrication method therefor.

BACKGROUND ART

There has been a known MEMS device in which a functional element with a mobile portion or a sensor is formed on a silicon substrate by micromachining process. The MEMS device can be collectively manufactured on a silicon substrate by a semiconductor process so that downsizing thereof is easily feasible. Also, it has various advantages such as multifunction, lower power consumption, low cost, reliability, which has been leading to new aggressive developments in the recent years.

The MEMS device has been in practical use for various components of acceleration sensor, angular velocity sensor, inclination sensor, flow sensor, pressure sensor mounted in automobiles and cellular phones, optical switch for display, optical scanner for projectors, and so on, or sample products thereof have been developed.

The functional element is composed of a silicon microstructure as a thin film or a micro gap, and a minute wiring. Because of this, operation of the functional element is susceptible to variances in external temperature or humidity or particle variation or contamination. For the purpose of protecting it from such external changes to maintain stable operation, it is airtightly sealed by packaging and completely secluded from the outside environment.

The airtightly sealed space inside the functional element may be depressurized or filled with inert gas, for example, depending on types of the functional element. Generally, in MEMS device used for angular velocity sensor, optical scanner or the like with high-speed vibration, the airtightly sealed space is depressurized in order to reduce viscosity resistance of gaseous matter which acts on the operation of the device.

The airtightly sealed packaging is required to have such functions and forms as to protect the functional element inside and maintain its performance as well as to be small in size and easily mountable, and place outside the airtightly sealed space an electrode to drive the functional element by static electricity, electromagnetic power, piezo element or the like.

Japanese Laid-open Patent Application Publication No. 2005-109221 and No. 2005-341162 disclose known methods for mounting the packaged MEMS device on the print circuit board by wire bonding or flip-chip bonding.

FIGS. 1A,1B show an example of packaging by wire bonding. The drawings show a silicon substrate1, a functional element2having a mobile portion or a sensor on the silicon substrate1, a seal member3, a wiring portion4extending from the functional element2, and an airtightly sealed space5.

The wiring portion4is made of a part of the silicon substrate1which is insulated therefrom by an oxide film, slits or the like. The wiring portion4extends from the airtightly sealed space5to an outside through a bonding plane with the seal member3. An electrode pad6and a bonding wire7are formed on an upper exposed portion4′ of the wiring portion4outside the airtightly sealed space5. The bonding wire7has been widely used owing to its wiring flexibility and reliable, low-cost mountability on a not-shown print board circuit or the like.

FIG. 2shows an example of packaging by flip-chip bonding. The drawing shows a silicon substratell, a functional element12having a mobile portion or a sensor on the silicon substrate11, a seal member13, wiring portions14extending from the functional element12, and an airtightly sealed space15.

The wiring portions14are each made of a part of the silicon substrate11which is insulated therefrom by an oxide film, slits or the like. Wiring portions16penetrate through the silicon substrate11to extend to an outside thereof. Under bump metals17and bumps18are formed on the extending wiring portions16.

According to the flip-chip bonding, the wiring portions16extending from the functional element12are disposed on the surface of the packaged MEMS device so that it is possible to reduce the area in which the MEMS device is packaged on a print board or the like, unlike the wire bonding by which the wiring portion is laid around the periphery of the chip of the MEMS device.

Note that the applicant of the present invention filed a similar patent application (Japanese Laid-open Patent Application Publication No. 2005-43612) to the present application, which discloses an optical scan apparatus in which an electrode pad for an airtightly sealed vibration mirror is electronically connected with a lead terminal of a base substrate via a solder ball.

There is a problem in the wire bonding that since the bonding wire7extends towards the outside of the silicon substrate1beyond the package area of the MEMS device chip, it is difficult to mount a large number of such MEMS device chips with high density in a minute space between circuit elements on a print circuit board.

Meanwhile, the flip-chip bonding also has some problems. That is, it is hard to form a structure in which the wiring portion14extending from the functional element12is arranged on the surface of the packaged MEMS device. For embedding an electrode from the airtightly sealed space15into the silicon substrate11by penetrating therethrough, for example, a leakage may occur therein due to defects on the interface of the embedded electrode and silicon substrate11, and a difference in thermal expansion coefficients therebetween.

Further, high-density plasma dry etching is used for forming a through hole in the silicon substrate11. However, the silicon substrate11on which the functional element11is formed or the seal member13bonded with silicon substrate11generally have only a very small thickness of several micron meters, therefore, it takes an enormous amount of time for etching them. Thus, fabrication cost for the MEMS device chips are much increased unless a great number of silicon substrates11are subjected to the etching process concurrently. Besides, there is a limitation to selection of types and thickness of etching masks with resistance properties.

Moreover, there is another limitation to metal materials used for the electrode and they have to be ones with a low melting point. This is because in order to form the electrode, it is necessary to fill the through hole with a conductive metal material by making melted metal in contact with the through hole under vacuum or by dropping the melted metal thereinto.

In view of solving the above-identified problems, combining the flip-chip bonding with the wire bonding has been proposed to connect the wiring portion with a bump on the surface of the functional element package without formation of the pass-through electrode.

FIGS. 3A,3B show an example of the combination of flip-chip bonding and wire bonding. The drawings show a functional element package including a silicon substrate21, a functional element22with a mobile portion or a sensor formed on the silicon substrate21, a seal member23, wiring portions24extending from the functional element22and an airtightly sealed space25.

The wiring portions24are each composed of a part of the silicon substrate21which is insulated therefrom by an oxide film, a slit or the like. The wiring portions24extend from the airtightly sealed space25to the outside through the bonding surface of the seal member23. Electrode pads26are formed on upper exposed portions24′ of the wiring portions24, and another electrode pads27are formed on the surface23′ of the seal member23. On the electrode pads27formed are bumps28.

The electrode pads26,27are connected by bonding wires29which are protected by a resin30.

With such a configuration, it is possible to realize the advantages of the wire bonding as the wiring flexibility and reliability, and that of the flip-chip bonding as keeping the package area within the MEMS device chip at the same time.

However, there still remains a problem in the above combined flip-chip bonding and wire bonding that the resin30needed to fix and protect the bonding wire29protrudes from the surface23′ of the seal member and stands in the way of mounting the package on a print circuit board via the bumps28on the surface23′ (SeeFIG. 3B). This makes it difficult to set the height of the package on the bump side with precision and reliability. InFIG. 3B, Pr denotes the print circuit board and Pr′ denotes wiring portions.

SUMMARY

In an aspect of this disclosure, there is provided a reliable functional element package with a simple configuration which can eliminate various problems when the wire bonding and flip-chip bonding are used together for realizing the wiring flexibility and avoid increase in the packaging area.

According to another aspect, a functional element package comprises a silicon substrate on which a functional element is formed, the functional element having one of a mobile portion and a sensor; a seal member being bonded with the silicon substrate to airtightly seal the functional element and form an airtightly sealed space therein, and including a step portion in its height direction; a first wiring portion being connected with the functional element and extending from the airtightly sealed space to an outside thereof; a second wiring portion being different from the first wiring portion and extending from the step portion to an upper surface of the seal member; and a bump on the second wiring portion on the upper surface of the seal member, in which the first wiring portion extending in the outside is bent towards the airtightly sealed space and connected via a photoconductive member with the second wiring portion on the step portion.

According to another aspect, in the functional element package the photoconductive member is a bonding wire.

According to another aspect in the functional element package the seal member has an inclined peripheral wall from the upper surface to the step portion.

According to another aspect in the functional element package the seal member has an inclined peripheral wall from the upper surface to the step portion, and a vertical peripheral wall from the step portion to an upper exposed portion of the first wiring portion.

According to another aspect in the functional element package the step portion is formed at end of the seal member.

According to another aspect in the functional element package the seal member has a through hole and the step portion is formed around the through hole.

According to another aspect in the functional element package, the bonding wire to connect the second wiring portion on the step portion with the first wiring portion is protected with a resin material, and the resin material is filled into the through hole so as not to protrude from the upper surface of the seal member.

According to another aspect in the functional element package the seal member is made of glass.

According to another aspect in the functional element package the seal member is made of a silicon material.

According to another aspect in the functional element package the airtightly sealed space is depressurized.

According to another aspect in the functional element package the airtightly sealed space is filled with inert gas.

According to another aspect in the functional element package, the silicon substrate on which the functional element is formed is bonded with the seal member via an intermediate adhesive layer.

According to another aspect in the functional element package, the silicon substrate on which the functional element is formed is directly bonded with the seal member.

According to another aspect of this disclosure, a fabrication method is provided for a functional element package comprising a silicon substrate on which a functional element is formed, the functional element having one of a mobile portion and a sensor; a seal member being bonded with the silicon substrate to airtightly seal the functional element and form an airtightly sealed space therein, and including a step portion in its height direction; a first wiring portion being connected with the functional element and extending from the airtightly sealed space to an outside thereof; a second wiring portion being different from the first wiring portion and extending from the step portion to an upper surface of the seal member; and a bump on the second wiring portion on the upper surface of the seal member, in which the first wiring portion extending in the outside is bent towards the airtightly sealed space and connected via a photoconductive member with the second wiring portion on the step portion. The method comprises the step of forming an inclined peripheral wall of the seal member from an upper surface to the step portion by anisotropic wet etching.

According to another aspect, the fabrication method further comprises the step of concurrently forming the airtightly sealed space and the step portion by silicon anisotropic etching.

According to another aspect of this disclosure, another fabrication method for a functional element package is provided which comprises the steps of fabricating a bonded wafer having a large number of functional element packages thereon by bonding a wafer on which a large number of the above-described seal members are formed and a wafer on which a large number of microstructures including a functional element are formed; and cutting the bonded wafer along contours of the functional element packages.

In the functional element package according to a preferable embodiment, the first wiring portion extending in the outside of the airtightly sealed space is bent towards the airtightly sealed space and connected via the photoconductive member with the second wiring portion on the step portion. With such a configuration, the photoconductive member is prevented from being laid outside the functional element package so that it is possible to reliably mount the functional element package on a minute circuit board with higher density at a low cost.

In the functional element package according to another preferable embodiment, by using the bonding wire for the photoconductive member, it is possible to provide a reliable functional element package with a simple configuration which can eliminate the problems of the prior art when the wire bonding and flip-chip bonding are used together for realizing the wiring flexibility and the prevention of increase in the packaging area.

In the functional element package according to another preferable embodiment, the film formation for the second wiring portion is made with a good step coverage so that occurrence of conduction failures can be reduced, thereby realizing reliable packaging.

According to another preferable embodiment, the functional element package is configured that the seal member has the inclined peripheral wall from the upper surface to the step portion, and the vertical peripheral wall from the step portion to the upper exposed portion of the first wiring portion. With such a configuration, the film formation for the second wiring portion is made with a good step coverage so that occurrence of conduction failures can be reduced and the amount of agent filled in the upper exposed portion can be also reduced, thereby realizing an advantageous effect of packaging cost reduction.

In the functional element package according to another preferable embodiment, since the step portion is formed at end of the seal member, it is possible to reduce the fabrication cost of the seal member.

In the functional element package according to another preferable embodiment, the step portion is formed in the through hole of the seal member so that it is able to adjust the amount of filling agents such as resin or conductive agents not to protrude from the through hole. In addition, it is also possible to prevent extraneous filling agents from being accumulated in the step portion around the through hole and protruding from the surface of the seal member, which allows the functional element package to be mounted on the print circuit board with a high precision relative to a height direction.

In the functional element package according to another preferable embodiment, the resin material to protect the bonding wire is filled into the through hole so as not to protrude from the upper surface thereof, which results in further improvements in packaging precision of the functional element on the print circuit board relative to the height direction thereof.

In the functional element package according to another preferable embodiment, since the seal member is made of glass, it is usable for optical functional elements such as optical scanners or optical switches so that applicability of the functional element package can be improved.

In the functional element package according to another preferable embodiment, the seal member is made of silicon, which improves workability thereof and enables provision of high-precision functional element packages at low cost.

In the functional element package according to another preferable embodiment, depressurization of the airtightly sealed space can reduce viscosity resistance of gaseous matter, resulting in achieving advantageous effects of high-speed, high-precision operation of the functional element.

In the functional element package according to another preferable embodiment, the airtightly sealed space is filled with inert gas so that Q (quality) factors to represent resonance characteristic can be suppressed to be low, facilitating operation control of the functional element.

In the functional element package according to another preferable embodiment, since the bonding surfaces of the seal member and the silicon substrate are not required to have high flatness and cleanliness, the functional element package is adoptable for various materials and shapes and forms of the substrate.

In the functional element package according to another preferable embodiment, the silicon substrate and the seal member are directly bonded with each other. Therefore, such functional element package is applicable to an application which requires high distance precision between the seal member and the functional element.

In the fabrication method for the functional element package according to another preferable embodiment, the inclined wall from the upper surface of the seal member to the step portion is formed by anisotropic wet etching, which allows a large number of seal members to be batch processed in the inclined wall formation process and thereby reduces the fabrication cost therefor.

In the fabrication method for the functional element package according to another preferable embodiment, the airtightly sealed space and step portion are concurrently formed by anisotropic etching to the silicon substrate so that a large number of functional element packages are batch processed in a plurality of fabrication processes, thereby substantially reducing the fabrication cost therefor.

According to another preferable embodiment, another fabrication method for the functional element package comprises a step of fabricating a bonded wafer with a large number of functional element packages by bonding a wafer on which a large number of regions equivalent to the seal member are formed and a wafer on which a large number of microstructures including a functional element are formed, and a step of cutting the bonded wafer along contours of the functional element packages to obtain individual functional elements. In this manner, it is possible to collectively bond and process a large number of functional element packages and substantially reduce the fabrication cost therefor.

BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, embodiments of the functional element package and a fabrication method therefor will be described with reference to the accompanying drawings.

First Embodiment

FIG. 4Bshows a cross sectional view of a functional element package according to the first embodiment of the present invention. The functional element package comprises silicon substrates41a,41bwhich are bonded with each other via a thermal oxide film41cin thickness of and has total thickness of 200 μm and low electric resistance.

On the silicon substrate41aa mobile portion42is formed by cutting through the silicon substrate41aby dry etching. A not-shown thermal oxide film in thickness of 1 μm is formed on a surface of a seal member43and directly bonded with the silicon substrate43via the thermal oxide film. The seal member43is made of a silicon substrate in thickness of 525 μm.

The seal member43comprises a non-rigid space (airtightly sealed space)43ahaving a depth of 200 μm enough for the mobile portion42to operate and through holes43bto place an electrode for driving the mobile portion42outside the space. The non-rigid space43aand through holes43bare formed by dry etching using high-density plasma.

A bonding surface41a′of the silicon substrate41ais bonded with the seal member43and a bonding surface41″ of the silicon substrate41bon the opposite side is anodically bonded with a seal member41which is formed of Pyrex® glass substrate with a thickness of 300 μm. The mobile portion42is airtightly sealed by the two seal members43,41, and the space inside thereof is kept depressurized.

The mobile portion42is connected with a wiring portion44(first wiring portion) which is made of a silicon substrate with low resistance and insulated from the silicon substrates41a,41bby the thermal oxide film41cand a not-shown slit in width of 50 μm penetrating through the silicon substrate41a.

The through holes43bare formed in an area of the seal member43excluding the non-rigid space43a, and each composed of a large opening43b′and a small opening43b″. The wiring portion44partially extends to the outside of the non-rigid space43avia the bonding surface41a′of the seal member43. The part of the wiring portion44in the outside of the non-rigid space43aforms an upper exposed portion44′ facing the small opening43b″. On the upper exposed portion44′ formed is an electrode pad45as a thin metal film which is formed by sputtering with a metal mask.

The through holes43beach have a peripheral wall on which a step portion43cis formed by dry etching of high-density plasma at a position 200 μm higher than the bonding surface. As shown inFIG. 4A, a connection wiring portion (second wiring portion)46is formed as a thin metal film from the step portion43cto an upper surface43′ of the seal member43on a part of the peripheral wall. The connection wiring portion46is formed by sputtering with a metal mask.

A wiring terminal46′ on the step portion43cis connected with the electrode pad45via a bonding wire47. The through hole43bis filled with a resin49to cover the bonding wire47. A bump48made of Au—Sn alloy is formed on the wiring terminal46′ on the upper surface43′ of the seal member43. As shown inFIG. 4C, the functional element package is mounted and bonded on the print board Pr via the bump48. As described above, the wiring portion44extending in the outside of the non-rigid space43ais bent towards the non-rigid space43avia the bonding wire47to be connected with the connection wiring portion46on the step portion43c.

Next, a fabrication method for the seal member43with the step portion inFIGS. 4,5will be described with reference toFIG. 6.

FIG. 6Ashows a silicon substrate51in thickness of 525 μm with mirror-polished upper and lower surfaces. The upper surface S1is covered with a patterned resist film. The pattern corresponds with the shapes of the non-rigid space43aand the small opening43b″. Then, using the resist film as a mask, as shown in6B, the silicon substrate51is subjected to high-density plasma etching with SF6 and C4F8 gases as deep as 200 μm, by which a concavity43a′corresponding to the non-rigid space43aand a concavity43b″(referred to as the same numeric code as the small opening) corresponding to the small opening43b″are formed.

InFIG. 6Cthe resist film52is removed through O2ashing process. Then, a resist film53is formed with a patterning on the other surface S2of the silicon substrate51, as shown inFIG. 6D. The pattern thereof corresponds with the shape of the large opening43b′.

Next, inFIG. 6E, the upper surface S1of the silicon substrate51is attached onto a supplemental silicon substrate54with a resist film54′. InFIG. 6F, using the resist film53as a mask, the silicon substrate51attached to the supplemental silicon substrate54is subjected to high-density plasma etching with SF6 and C4F8 gases as deep as 325 μm. The plasma etching is terminated when formation of the small opening (concave)43b″is visually confirmed.

Then, the silicon substrate51integrated with the supplemental silicon substrate54is immersed in not-shown acetone to remove the supplemental silicon substrate54and clean the silicon substrate51with the through hole43b, as shown inFIG. 6G. InFIG. 6H, the silicon substrate51is processed in wet O2at 1000° C., thereby forming a thermal oxide film55on the entire surface of the silicon substrate51. As described above, the step portion43cis formed through the processes shown inFIGS. 6F to 6H.

Next, inFIG. 6Ithe connection wiring portion46is formed from the step portion43cof the through hole43bto the upper surface43′ of the seal member43by sputtering. The connection wiring portion46is made of aluminum (Al). In the sputtering process, the area of the seal member43excluding the area having the connection wiring portion formed is masked with a metal.FIG. 7Ashows the front surface of thus-fabricated silicon substrate51andFIG. 7shows the back surface thereof.

Next, the seal member43is bonded with the silicon substrate41aintegrated with the silicon substrate41band having a functional element formed thereon. Then, the seal member41is bonded with the silicon substrate41bas shown inFIG. 6J. Here, the seal member43is directly bonded with the silicon substrate41avia the thermal oxide film55.

In a case where flatness and cleanliness of the bonding surface41a′cannot be secured sufficiently, however, instead of directly bonding them via the thermal oxide film55, other ways of bonding, for example, bonding the seal member via an intermediate layer such as glass frit is also adoptable as long as the airtight sealing is achieved. Further, the pressure inside the non-rigid space43ais arbitrarily settable by adjusting pressure of the bonding atmosphere.

As shown inFIG. 6K, the bump48is formed of Au—Sn alloy and the bonding wire47is formed. Lastly, the through hole43bis filled with the resin49as shown inFIGS. 4A,4B. Note that the bump48can be formed of Pb/Sn alloy, lead free material (Sn/Ag, Sn/Cu) or the like other than Au—Sn alloy.

Next, modified examples of the functional element package will be described with reference toFIGS. 5A,5B.

InFIG. 5A, the wiring portion44is connected with the connection wiring portion46, using, as the conductive member47′, a conductive adjective or a thin metal film made by electric gliding in replace of the bonding wire47.

FIG. 5Bshows a modified example of how the wiring portion44extends from the non-rigid space43ato the outside. In this example, the wiring portion44is made of aluminum (Al), and the silicon substrate41ais bonded with the seal member43via the seal member44″ which is made of glass with low melting point. With such a configuration, it is able to make a gap H between the seal member43and the silicon substrate41a. At injection of the resin material to protect the bonding wire47into the through hole43b, this allows the resin material to permeate the gap H, thereby preventing the resin material from protruding the upper surface43′ of the seal member43. As a result, it is able to secure spacing between the seal member43and the print circuit board Pr with high precision. Accordingly, the functional element package shown inFIG. 5Bis suitable for use in devices with optical functional elements which are required to have high packaging accuracy of the functional elements.

Second Embodiment

FIGS. 8A,8B are explanatory views for a functional element package according to the second embodiment of the present invention. In the drawings, silicon substrates61a,61bare formed in total thickness of 200 μm with a low resistance and bonded with seal members via a thermal oxide film61cin thickness of 1 μm. A mobile portion62is formed on the silicon substrate61aby cutting through the silicon substrate61aby dry etching.

A seal member63covered with a not-shown thermal oxide film in thickness of 1 μm is bonded with a surface of the silicon substrate61avia the thermal oxide film. The seal member63is made of a silicon substrate in thickness of 525 μm and seal-glass bonded with the silicon substrate61avia glass frit.

The seal member63includes a non-rigid space (airtightly sealed space)63awith a depth of 200 μm for the mobile portion62to operate, and through holes63bto place an electrode for driving the mobile portion62outside the non-rigid space63a. The non-rigid space63aand the through holes63bare formed by anisotropic etching in a KOH aqueous solution.

A bonding surface61a′of the silicon substrate61ais bonded with the seal member63and a bonding surface61″ of the silicon substrate41bon the opposite side is anodically bonded with a seal member61which is made of Pyrex® glass substrate with a thickness of 300 μm. The mobile portion62is airtightly sealed by the two seal members63,61, and the space inside thereof is kept depressurized.

The mobile portion62is connected with a wiring portion (first wiring portion)64which is made of the same silicon substrate with low resistance and insulated from the silicon substrates61a,61bby the thermal oxide film61cand a not-shown slit in width of 50 μm penetrating through the silicon substrate61a.

The through holes63bare formed in a portion of the seal member excluding the non-rigid space63a, and each composed of a large opening63b′and a small opening63b″. The wiring portion64partially extends to the outside of the non-rigid space63avia the bonding surface61a′of the seal member63. The part of the wiring portion64extending to the outside of the non-rigid space63aforms an upper exposed portion64′ facing the small opening63b″. On the upper exposed portion64′ formed is an electrode pad65as a thin metal film which is formed by sputtering process with a metal mask.

The large opening63b′has a tapered wall portion whose inclination angle is for example54.7degrees. The through holes63beach have a step portion63cwhich is formed by anisotropic etching in a KOH aqueous solution at a position 200 μm higher than the bonding surface61a′. A connection wiring portion (second wiring portion)66is formed as a thin metal film from the step portion63cto the upper surface63′ of the seal member63on a part of the tapered wall portion. The connection wiring portion66is formed by sputtering process with a metal mask.

A wiring terminal66′ on the step portion63cis connected with the electrode pad65via a bonding wire67as a photoconductive member. Note that in the second embodiment the through hole63bis not filled with resin to cover the bonding wire67unlike the first embodiment. A bump68made of Au—Sn alloy is formed on the wiring terminal66′ on the upper surface63′ of the seal member43. The functional element package is mounted and bonded on a not-shown print board via the bump68.

Next, a fabrication method for the seal member63with the step portion inFIGS. 8A,8B will be described with reference toFIGS. 9A to 9J. For the sake of simplicity,FIGS. 9A to 9Jshow how to form a single through hole in the seal member.

First, inFIG. 9A, upper and lower surfaces of silicon substrate71in thickness of 525 μm are mirror-polished, and then a SiN film72is formed thereon in thickness of 100 nm (nanometer) by low-pressure CVD using SiH4 and ammonia gas.

InFIG. 9Bthe SiN film72on the upper surface S1. of the silicon substrate71is patterned in accordance with shapes of the non-rigid space63aand the small opening63b″.

InFIG. 9C, the silicon substrate71undergoes the anisotropic etching in depth of 200 μm in 30 wt % KOH aqueous solution at temperature 80° C., using the SiN film72as a mask. Thereby, a concavity63a′corresponding to the non-rigid space63aand a concavity63b″(referred to as the same numeric code as the small opening) corresponding to the small opening63b″are formed.

InFIG. 9D, the silicon substrate71is thermally phosphated to remove the SiN film72. Then, a SiN film74is re-formed in thickness of 100 nm thereon by low-pressure CVD using SiH4 and ammonia gas inFIG. 9E.

Next, inFIG. 9F, the SiN film74on the upper and lower surfaces S1, S2is patterned in accordance with the shape of the large opening63b′. Then, the silicon substrate71undergoes the anisotropic etching in depth of 325 μm in 30 wt % KOH aqueous solution at temperature 80° C., using the SiN film74as a mask.

The anisotropic etching is terminated when formation of the small opening63b″is visually confirmed. Since the SiN film74is formed on the through hole63bat the termination of the etching process, boundary shapes of the large and small openings63b′,63″ can be prevented from being distorted by the etching.

InFIG. 9H, the SiN film74is removed from the silicon substrate71by thermal phosphate process to clean the silicon substrate71. InFIG. 9I, the silicon substrate71is processed in wet O2at 1000° C. to form a thermal oxide film75on the entire surface thereof.

Next, a connection wiring portion (second wiring portion)76is formed of aluminum (Al) material by sputtering from the step portion63cof the through hole63bto the upper surface63′ of the seal member63. At the sputtering the seal member63is masked with a metal mask for prevention of film formation on an area except the connection wiring portion.

FIG. 10Ashows a front surface of thus-fabricated seal member63andFIG. 10Bshows a back surface thereof. Here, the fabricated seal member63is directly bonded with the silicon substrate71having the functional element thereon via the thermal oxide film75. However, when flatness and cleanliness of the bonding surface61a′can be sufficiently secured, instead of bonding them via the thermal oxide film75, other ways of bonding, for example, bonding the seal member via an intermediate layer such as glass frit is also adoptable as long as the airtight sealing is achieved. Note that the process in which the seal member63is bonded with the silicon substrate71is the same as that in the first embodiment; therefore, the description thereon is omitted.

Third Embodiment

FIG. 11is a cross sectional view of a functional element package according to the third embodiment of the present invention. The drawing shows silicon substrates81a,81bwhich are bonded with each other via a thermal oxide film81cin thickness of 1 μm and have total thickness of 200 μm and a low electric resistance. A mobile portion82is formed on the silicon substrate81aby cutting through the silicon substrate81aby dry etching.

A not-shown thermal oxide film in thickness of 1 μm is formed on a seal member83and the seal member83and the silicon substrate81aare bonded via the thermal oxide film. The seal member83is made of a silicon substrate in thickness of 525 μm.

The seal member83has a non-rigid space (airtightly sealed space)83awith a depth of 200 μm for the mobile portion82to operate, and a through hole83bto place an electrode to drive the mobile portion82outside the non-rigid space. The non-rigid space83ais formed by dry etching using high-density plasma, and the through hole83bis formed by a combination of the high-density plasma dry etching and anisotropic etching in KOH aqueous solution.

A bonding surface81a′of the silicon substrate81ais bonded with the seal member83and a bonding surface81″ of the silicon substrate81bon the opposite side is anodically bonded with a seal member81which is formed of Pyrex® glass substrate with a thickness of 300 μm. The mobile portion82is airtightly sealed by the two seal members83,81and the space inside thereof is kept depressurized.

The mobile portion82is connected with a wiring portion84(first wiring portion) which is made of a silicon substrate with the same low resistance as that of the silicon substrate81aand insulated from the silicon substrates81a,81bby the thermal oxide film81cand a not-shown slit in width of 50 μm penetrating through the silicon substrate81a.

The through hole83bis formed in a portion of the seal member83excluding the non-rigid space83a, and composed of a large opening83b′and a small opening83b″. The peripheral wall of the large opening83b′is formed in inclined shape and that of the small opening83b″is formed in vertical shape. The wiring portion84partially extends to the outside of the non-rigid space83avia the bonding surface81a′of the seal member83. The part of the wiring portion84extending in the outside of the non-rigid space83aforms an upper exposed portion84′ facing the small opening83b″. On the upper exposed portion84′ formed is an electrode pad85as a thin metal film which is formed by sputtering process with a metal mask.

A step portion83cis formed on the inclined peripheral wall of the large opening83b′at a position 200 μm higher than the bonding surface81a′by dry etching with high-density plasma. Also, on a part of the peripheral wall from the step portion83cto the upper surface83′ of the seal member83, formed is a connection wiring portion (second wiring portion)86as a thin metal film by sputtering with a metal mask. A wiring terminal86′ of the connection wiring portion86on the step portion83cis connected with the electrode pad85via a bonding wire87as a photoconductive member.

The through hole83bis filled with a resin89to cover the bonding wire87. A bump88made of Au—Sn alloy is formed on the wiring terminal86′ on the upper surface83′ of the seal member83. The functional element package is mounted and bonded on a not-shown print board via the bump88.

The seal member83with the step portion can be fabricated by a combination of the fabrication processes according to the first and second embodiments so that a detailed description thereon is omitted.

Fourth Embodiment

FIG. 12is a cross sectional view of a functional element package according to the fourth embodiment, and shows silicon substrates91a,91bwhich are bonded with each other via a thermal oxide film91cin thickness of 1 μm and have total thickness of 200 μm and low electric resistance.

A mobile portion92is formed on the silicon substrate91aby cutting through the silicon substrate91aby dry etching. A not-shown thermal oxide film in thickness of 1 μm is formed on a seal member93which is made of a silicon substrate in thickness of 525 μm. The seal member93is directly bonded with the surface of the silicon substrate91avia the thermal oxide film.

The seal member93includes a non-rigid space93a(airtightly sealed space) with a depth of 200 μm for the mobile portion92to operate. The non-rigid space93ais formed by dry etching using high-density plasma. Also, it has a cutout portion93bto expose to outside a later-described electrode for driving the mobile portion92. The cutout portion93bis formed by a combination of drying etching with high-density plasma and anisotropic etching in the KOH aqueous solution.

The cutout portion93bcan be formed by cutting and dividing with dicing means the through hole of the seal member93which is fabricated at a wafer level in a similar manner to that in the third embodiment. That is, two seal members93are formed by dividing the center of not-shown silicon substrates having concavities corresponding to the non-rigid space93aat symmetric positions relative to the through hole.

A bonding surface91a′of the silicon substrate91ais bonded with the seal member93, and a bonding surface91a″of the silicon substrate91bon the opposite side is anodically bonded with a seal member91. The seal member91is formed of Pyrex® glass substrate with a thickness of 300 μm. The mobile portion92is airtightly sealed by the two seal members93,91, and the space inside thereof is kept depressurized.

The mobile portion92is connected with a wiring portion94(first wiring portion) made of a silicon substrate having the same low resistance as that of the silicon substrate91a. The wiring portion94is insulated from the silicon substrates91a,91bby the thermal oxide film91cand a not-shown slit in width of 50 μm penetrating through the silicon substrate91a.

The wiring portion94extends from the non-rigid space93ato the outside through the bonding surface91a′of the seal member93. A part of the wiring portion94in the outside of the non-rigid space93aforms an upper exposed portion94′ facing the cutout portion93b. An electrode pad95is formed as a thin metal film on the upper exposed portion by sputtering with a metal mask.

A step portion93cis formed on a peripheral wall of the cutout portion93bby dry etching with high-density plasma at a position 200 μm higher than the bonding surface91a′. On a part of the peripheral wall of the cutout portion93b, a connection wiring portion (second wiring portion)96is formed as a thin metal film by sputtering with a metal mask from the step portion93cto the upper surface93′ of the seal member93.

A wiring terminal96′ of the connection wiring portion96on the step portion93cand the electrode pad95are connected with a bonding wire97as a photoconductive member. A bump98made of Au—Sn alloy is formed on a wiring terminal96″ on the upper surface93′ of the seal member93. A functional element package is mounted and bonded on a not-shown print board via the bump98.

According to the first to fourth embodiments, the functional element package can benefit from merits of both of the wire bonding with the photoconductive member and the flip-chip bonding with the bump so that it can be reliably fabricated at a low cost advantageously. Further, the photoconductive member is bent toward the airtightly sealed space to be connected with the wiring portion extending in the outside of the airtightly sealed space, and so that the photoconductive member does not extend to outside the functional element package. This can realize packaging of the function element on a minute print board with a higher density.

Fifth Embodiment

Next, another fabrication method for the seal member63with the inclined step portion will be described with reference toFIGS. 13A to 13F. Note thatFIGS. 13A to 13Fshow how to fabricate a single through hole in the seal member63for the sake of simplicity. The same components as those in the second embodiment will be given the same numeric codes and a description thereon will be omitted.

First, inFIG. 13A, upper and lower surfaces of a silicon substrate101in thickness of 525 μm are mirror-polished, and then a SiN film102is formed thereon in thickness of 100 nm (nanometer) by low-pressure CVD using SiH4 and ammonia gas.

InFIG. 13B, the SiN film102on the upper and lower surfaces of the silicon substrate101is patterned using a double side mask aligner and resist in accordance with shapes of a non-rigid space63a′, a through hole63b′and a packaging surface of the silicon substrate101.

InFIG. 13C, the upper and lower surfaces of the silicon substrate101undergo the anisotropic etching at the same time in 30 wt % KOH aqueous solution at temperature 80° C. using the SiN film102as a mask, until the through hole63bis formed. Here, it is preferable to design mask measurements in advance in order to make the step portion63cfor the wire bonding, with a distortion of the boundary shapes of the large and small openings63b′,63b″at the end of the etching taken into consideration.

InFIG. 13D, the SiN film is entirely removed from the surfaces of the silicon substrate101by thermal phosphate process to clean the silicon substrate101with the trough hole63band concavity63a′formed. Then, inFIG. 13E, the silicon substrate101is processed in wet O2at 1000° C., to form a thermal oxide film104on the entire surface thereof and complete the seal member63. Lastly, inFIG. 13Fa connection wiring portion66is formed from the step portion63cof the through hole63bto the upper surface63′ of the seal member63by sputtering with a metal mask.

Note that the following processes to connect the thus-fabricated seal member63with the silicon substrate having the functional element thereon are the same as those in the first embodiment, therefore, a detailed description will be omitted.

Sixth Embodiment

FIGS. 14A,14B andFIG. 15are explanatory views for bonding a seal member43with a silicon substrate at a wafer level to fabricate a functional element package.FIGS. 14A,14B show a circular wafer111on which a large number of regions43zeach equivalent to the seal member43are formed. The drawings omit showing microstructures such as the airtightly sealed space43a, through hole43bofFIG. 4Aformed on each region43z. Similarly,FIGS. 14A,14B show a circular wafer112on which a large number of regions43z′each equivalent to the silicon substrates,41a,41b, and seal member41ofFIG. 4Bare formed. The drawings omit showing microstructures such as the mobile portion42, wiring portion44formed on the silicon substrate41a.

The circular wafers111,112are bonded and airtightly sealed with each other in a pressure adjusted space, forming a bonded wafer114with a large number of functional element packages43z″shown inFIG. 14B. By cutting the bonded wafer114along contours43yof the functional element packages43z″by dicing means or cleavage means, a large number of functional element packages122can be collectively formed.FIG. 15shows a single enlarged functional element package122.

As described above, the present embodiment enables further fabrication cost reduction by bonding the seal members43with the silicon substrate at a wafer level.

INDUSTRIAL AVAILABILITY

The functional element package according to the present invention is applicable to MEMS devices fabricated through silicon micromachining process and mounted on a print board or the like for use in optical scanners used for digital copiers, laser printers, or reading apparatuses as barcode readers, scanners or the like.

Although the present invention has been described in terms of exemplary embodiments, it is not limited thereto. It should be appreciated that variations may be made in the embodiments described by persons skilled in the art without departing from the scope of the present invention as defined by the following claims.