Power amplifier having transformer

A power amplifier amplifying and compositing differential signals and capable of suppressing harmonics is provided. The power amplifier includes first amplifiers amplifying a first input signal and a second input signal, which are differential signals, a first coil receiving the first input signal and the second input signal amplified by the first amplifiers, a second coil magnetically coupled with the first coil and outputting a composite signal of the amplified first input signal and second input signal, a third coil magnetically coupled with the second coil, and a first capacitor coupled between both ends of the third coil, wherein one end of the first capacitor is coupled to a ground node.

CROSS-REFERENCE TO RELATED APPLICATION

The disclosure of Japanese Patent Application No. 2008-319833 filed on Dec. 16, 2008 including the specification, drawings and abstract is incorporated herein by reference in its entirety.

BACKGROUND OF THE INVENTION

The present invention relates to a power amplifier, in particular, to a power amplifier that amplifies and composites differential signals.

At a mobile phone terminal or wireless LAN terminal, it is necessary for a transmitter, that is, a power amplifier, to transmit power of 10 to 30 dBm at maximum. Recently, a technique is proposed, which composites differential signals amplified by a pair of transistors with a transformer using a silicon MOS type transistor (insulating gate field effect transistor) in a power amplifier having signal frequency of about 1 GHz to 6 GHz. Such a power amplifier is shown in FIG. 11.9.2 in Non-Patent Document 1 (Jongchan Kang, et. al. “A Single-Chip Linear CMOS Power Amplifier for 2.4 GHz WLAN” ISSCC (International Solid-State Circuits Conference) 2006, p 208-209, 649.), and hereinafter referred to as a transformer type power amplifier of one differential pair.

In the power amplifier described in Non-Patent Document 1, a primary coil (a coil is referred to as a slab in Non-Patent Document 1) and a secondary coil magnetically coupled with the primary coil are arranged in parallel with each other. The middle point of the primary coil is a terminal to which a power supply voltage is supplied and by coupling a capacitor to the middle point, it is possible to suppress second harmonics.

As a technique to make an attempt to further increase output more than the transformer type power amplifier of one differential pair, it is proposed to composite differential amplified signals from two or more pairs of transistors with a transformer. Such a power amplifier is described in Patent Document 1 (Published Japanese translation of PCT patent application No. 2005-503679) as a distributed circular geometry power amplifier and hereinafter referred to as a transformer type power amplifier of multiple differential pairs. In Patent Document 1, a configuration is disclosed, in which differential signals respectively amplified by four pairs of transistors are composited with the secondary coil of the transformer coupled in series.

As another technique to make an attempt to further improve efficiency more than the transformer type power amplifier of one differential pair described in Non-Patent Document 1, a configuration is disclosed in Patent Document 2 (Japanese Patent Laid-Open No. 2006-295896), in which the differential signals of two pairs of transistors are composited with a transformer where primary coils having different shapes are arranged on both sides of a secondary coil.

SUMMARY OF THE INVENTION

In Non-Patent Document 1, however, although the configuration to suppress the second harmonics is disclosed, the suppression of the third harmonics included in the output signal along with the second harmonics is not at all taken into consideration. Further, in Patent Document 1 and Patent Document 2, both the suppression of the second harmonics and the suppression of the third harmonics are not taken into consideration.

Accordingly, an object of the present invention is to provide a power amplifier amplifying and compositing differential signals and capable of suppressing harmonics.

In order to solve the above-mentioned problems, a power amplifier according to an aspect of the present invention comprises: a first amplifier amplifying a first input signal and a second input signal, which are differential signals; a first coil receiving the first input signal and the second input signal amplified by the first amplifier; a second coil magnetically coupled with the first coil and outputting a composite signal of the amplified first input signal and second input signal; a third coil magnetically coupled with the second coil; and a first capacitor coupled between both ends of the third coil, wherein one end of the first capacitor is coupled to a ground node.

According to the present invention, it is possible to amplify and composite differential signals and suppress harmonics.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Embodiments of the present invention will be described below using the drawings. In the drawings, the same symbols are assigned to the same parts or corresponding parts and their description is not repeated.

First Embodiment

FIG. 1is a diagram showing a configuration of a power amplifier according to a first embodiment of the present invention.

Referring toFIG. 1, a power amplifier101is a transformer type power amplifier of one differential pair, comprising amplifiers11and12, a transformer20, capacitors31and41, a tertiary coil23, and terminals T1to T5. The transformer20includes a primary coil21and a secondary coil22.

The amplifiers11and12amplify an input signal1and an input signal2received via the terminals T1and T2, respectively. The input signal1and the input signal2are differential signals, for example, 180° different in phase from each other.

The transformer20composites the output signal of the amplifier11and the output signal of the amplifier12. That is, the primary coil21has a first end that receives the input signal1amplified by the amplifier11and a second end that receives the input signal2amplified by the amplifier12. To the middle point of the primary coil21, the terminal T5is coupled and to the terminal T5, a power supply voltage4is supplied.

The capacitor31is coupled between the first end and the second end of the primary coil21. The primary coil21and the capacitor31constitute an output matching circuit of the amplifiers11and12.

The secondary coil22is magnetically coupled with the primary coil21and outputs a composite signal3of the input signal1and the input signal2after amplified. In more detail, the secondary coil22has a first end coupled to the terminal T3and a second end coupled to the terminal T4. The output signal3of the power amplifier101, that is, the composite signal3of the input signal1and the input signal2after amplified is output from the terminal T3. The terminal T4is coupled to a ground node to which a ground voltage is supplied.

The tertiary coil23is magnetically coupled with the secondary coil22and has a first end coupled to a first end of the capacitor41and a second end coupled to a second end of the capacitor41and a ground node to which a ground voltage is supplied.

FIG. 2is a diagram showing a schematic layout of each coil in the power amplifier according to the first embodiment of the present invention.

Referring toFIG. 2, the power amplifier101includes a semiconductor substrate B having a main surface over which the circuit shown inFIG. 1is provided.

The primary coil21, the secondary coil22, and the tertiary coil23are formed over the same main surface of the semiconductor substrate B using wire layers and are substantially C-shaped. For example, the primary coil21is arranged at the outermost circumference, the secondary coil22is located inside the primary coil21, and the tertiary coil23is located inside the secondary coil22. The capacitor41is coupled between both ends of the tertiary coil. The capacitor41is located inside the secondary coil22.

In more detail, the primary coil21is provided over the main surface of the semiconductor substrate B, extends in the circumferential direction, and is formed by a conductive line which is opened at a partial section in the circumferential direction.

The secondary coil22is provided over the main surface of the semiconductor substrate B, extends in the circumferential direction, and is formed by a conductive line which is opened at a partial section in the circumferential direction.

The primary coil21is disposed so as to surround the secondary coil22. A configuration may be such that the secondary coil22is disposed so as to surround the primary coil21.

The tertiary coil23is provided over the main surface of the semiconductor substrate B, extends in the circumferential direction, and is formed by a conductive line which is opened at a partial section in the circumferential direction is surrounded by the primary coil21and the secondary coil22.

The amplifier11includes a circuit in which, for example, N-channel MOS type transistors51aand51bare cascode-coupled. The amplifier12includes a circuit in which, for example, N-channel MOS type transistors52aand52bare cascode-coupled.

In more detail, the N-channel MOS type transistor51ahas a drain, a source coupled to a ground node, and a gate that receives the input signal1. The N-channel MOS type transistor51bhas a drain coupled to the first end of the primary coil21, a source coupled to the drain of the N-channel MOS type transistor51a, and a gate that receives a predetermined voltage. The N-channel MOS type transistor52ahas a drain, a source coupled to the ground node, and a gate that receives the input signal2. The N-channel MOS type transistor52bhas a drain coupled to the second end of the primary coil21, a source coupled to the drain of the N-channel MOS type transistor52a, and a gate that receives a predetermined voltage.

FIG. 3is a diagram showing the calculation results of the insertion loss characteristics in a high frequency region of a circuit block including the transformer20, the tertiary coil23, and the capacitor41to be applied to the power amplifier according to the first embodiment of the present invention.

In the calculation of the insertion loss characteristics shown inFIG. 3, it is assumed that: the primary coil21is an ideal inductor and its L (inductance) value is 2.4 nH; the secondary coil22is an ideal inductor and its L value is 2.2 nH; and the tertiary coil23is an ideal inductor and its L value is 2.0 nH. It is also assumed that: the magnetic coupling coefficient k value between the primary coil and the secondary coil is 0.565 and the magnetic coupling coefficient k value between the secondary coil and the tertiary coil is 0.565; and the capacitor41is an ideal capacitor and its C (capacitance) value is 0.24 pF.

Referring toFIG. 3, when the frequency of the output signal of the power amplifier101is 2.4 GHz, an insertion loss of 40 dB is obtained at a frequency of 7.2 GHz, three times the frequency of the output signal. That is, it can be seen that the circuit block including the transformer20, the tertiary coil23, and the capacitor41has a function to suppress the frequency component of three times the frequency of the output signal, that is, 2.4 GHz.

FIG. 4is a diagram showing the input/output characteristics of the power amplifier according to the first embodiment of the present invention.FIG. 4shows the calculation results of the output signal characteristics for the input signal of 2.4 GHz when the circuit constants of the circuit block that includes the transformer20, the tertiary coil23, and the capacitor41are used as they are and under the condition that equivalent circuit models are applied to the MOS type transistors51a,51b,52a, and52bshown inFIG. 2. InFIG. 4, graph G1shows the output signal characteristics for the input signal of 2.4 GHz, which is a fundamental wave, and graph G2shows the third harmonic signal characteristics for the input signal of 2.4 GHz. For comparison, there are shown by graph G3the third harmonic signal characteristics for the input signal of 2.4 GHz in an assumed configuration that the power amplifier101does not include the tertiary coil23or the capacitor41.

From the graphs G1to G3, it can be seen that the third harmonic component is suppressed about 20 dB due to the LC resonance circuit including the tertiary coil23and the capacitor41in the power amplifier101.

As a result, with the power amplifier according to the first embodiment of the present invention, it is possible to obtain the effect to suppress the high-order frequency distortion, that is, the third harmonics in the composite signal3output from the secondary coil22. Consequently, the output characteristics are improved. Further, by arranging the tertiary coil23and the capacitor41inside the transformer20, it is possible to prevent an increase in size of the power amplifier101without causing a substantial increase in the area of the semiconductor substrate B.

The power amplifier according to the first embodiment of the present invention is so configured that the primary coil21, the secondary coil22, and the tertiary coil23are substantially C-shaped, but is not limited to such a configuration. With any configuration in which a region (AR inFIG. 2) surrounded by the primary coil21and the secondary coil22along its entire circumference is formed and the tertiary coil23is provided in the region AR over the main surface of the semiconductor substrate B, it is possible to prevent an increase in size of the power amplifier101.

FIG. 5is a diagram showing a configuration in which a MOS type transistor is applied to the capacitor41in the power amplifier according to the first embodiment of the present invention.

Referring toFIG. 5, a power amplifier102further includes a terminal T6compared to the power amplifier101. The capacitor41includes N-channel MOS type transistors53a,53band gate resistors61a,61b.

The above-mentioned power amplifier101has a configuration in which the third harmonic component is suppressed by the tertiary coil23and the capacitor41.

The drain of the MOS type transistor53aand the drain of the MOS type transistor53bare coupled. The sources of the MOS type transistors53a,53band the first end and the second end of the tertiary coil23are coupled, respectively. The source of the MOS type transistor53bis grounded. The gates of the MOS type transistors53a,53bare coupled to the terminal T6via the gate resistors61a,61b. To the terminal T6, a control signal5is applied.

The control signal5is set to two DC voltages, for example, +3.3 V and −3.3 V. When the control signal5is set to the DC voltage of −3.3 V, the MOS type transistors53a,53bturn off, and therefore, the MOS type transistors53a,53bfunction as a capacitor. On the other hand, when the control signal5is set to the DC voltage of +3.3 V, the MOS type transistors53a,53bturn on, and therefore, they function as a resistor.

FIG. 6is a diagram showing the calculation results of the insertion loss characteristics in a high frequency region of the circuit block including the transformer20, the tertiary coil23, and the capacitor41to be applied to the power amplifier102shown inFIG. 5. In the calculation of the insertion loss characteristics shown inFIG. 6, the gate width of the MOS type transistors53a,53bis set to 2 mm and the R (resistance) value of the gate resistors61a,61bis set to 40 kO. Graph G1shows a case where the control signal5is set to the DC voltage of +3.3 V and graph G2shows a case where the control signal5is set to the DC voltage of −3.3 V. Other circuit constants are the same as those in the calculation of the insertion loss characteristics shown inFIG. 3.

From graph G2, it can be seen that substantially the same insertion loss characteristics inFIG. 3are obtained when the control signal5is set to the DC voltage of −3.3 V.

On the other hand, from graph G1, when the control signal5is set to the DC voltage of +3.3 V, unlike the insertion loss characteristics shown inFIG. 3, the third harmonic component is not suppressed and the characteristics are substantially the same as those when the tertiary coil23is not provided. However, the insertion loss of the output signal of 2.4 GHz is about 0.6 dB smaller compared with the insertion loss characteristics shown inFIG. 3.

In general, in the power amplifier, when input power is smaller, the third harmonic component is smaller as can also be seen fromFIG. 4.

As a result, in the power amplifier102, when input power is smaller, it is possible to suppress the insertion loss of the output signal by setting the control signal5to the DC voltage of +3.3 V. On the other hand, when input power is larger, it is possible to suppress the third harmonic component by setting the control signal5to the DC voltage of −3.3 V.

Next, another embodiment of the present invention will be described using the drawings. In the drawings, the same symbols are assigned to the same parts or corresponding parts and their description is not repeated.

Second Embodiment

The present embodiment relates to a power amplifier in which a coil is added compared to the power amplifier according to the first embodiment. The contents except for those to be described below are the same as those in the power amplifier according to the first embodiment.

FIG. 7is a diagram showing a schematic layout of each coil in the power amplifier according to a second embodiment of the present invention.

Referring toFIG. 7, a power amplifier103further includes a quaternary coil24and a capacitor42, compared with the power amplifier according to the first embodiment of the present invention.

The quaternary coil24is located, for example, outside the primary coil21. The quaternary coil24is formed using a wire layer over the main surface of the same semiconductor substrate B as the primary coil21, the secondary coil22, and the tertiary coil23are formed, and is substantially C-shaped. The capacitor42is coupled between both ends of the quaternary coil24.

In more detail, the quaternary coil24is magnetically coupled with the primary coil21and has a first end coupled to a first end of the capacitor42and a second end coupled to a second end of the capacitor42and a ground node which is supplied with a ground voltage. The capacitor42is coupled between the first end and the second end of the quaternary coil24.

The quaternary coil24is provided over the main surface of the semiconductor substrate B, extends in the circumferential direction so as to surround the primary coil21to the tertiary coil23, and is formed by a conductive line which is opened at a partial section in the circumferential direction.

FIG. 8is a diagram showing the calculation results of the insertion loss characteristics in a high frequency region of a circuit block including the transformer20, the tertiary coil23, the quaternary coil24, the capacitor41, and the capacitor42to be applied to the power amplifier according to the second embodiment of the present invention.

In the calculation of the insertion loss characteristics shown inFIG. 8, it is assumed that: the quaternary coil24is an ideal inductor and its L value is 2.6 nH; the magnetic coupling coefficient k value between the primary coil and the quaternary coil is 0.565; and the capacitor42is an ideal capacitor and its C value is 0.42 pF. Other circuit constants are the same as those in the calculation of the insertion loss characteristics shown inFIG. 3.

Referring toFIG. 8, when the frequency of the output signal of the power amplifier103is 2.4 GHz, an insertion loss of 30 dB is obtained at 7.2 GHz, that is, three times the frequency of the output signal. Further, when the frequency of the output signal of the power amplifier103is 2.4 GHz, an insertion loss of 40 dB is obtained at 4.8 GHz, twice the frequency of the output signal due to the quaternary coil24and the capacitor42newly added compared to the power amplifier101. That is, in the power amplifier103, it can be seen that the circuit block including the transformer20, the tertiary coil23, and the capacitor41has a function to suppress the frequency component of three times the frequency of the output signal, that is, 2.4 GHz, and further, the circuit block including the transformer20, the quaternary coil24, and the capacitor42has a function to suppress the frequency component of twice 2.4 GHz.

In the transformer type power amplifier of one differential pair, when the input signal1and the input signal2are ideal differential signals, the amplifier11and the amplifier12have exactly the same characteristics, and the primary coil21, the secondary coil22, the tertiary coil23, and the quaternary coil24have a symmetric shape, the second harmonics do not appear in the output signal3.

However, the amplifier11and the amplifier12include the MOS type transistor, and therefore, it is unlikely that they have exactly the same characteristics and each coil does not have a perfectly-symmetric shape.

Consequently, as in the power amplifier according to the second embodiment of the present invention, it is further effective to suppress the second harmonics securely by adding the quaternary coil24and the capacitor42.

Other configurations and operations are the same as those in the power amplifier according to the first embodiment, and therefore, their detailed description is not repeated here.

Next, another embodiment of the present invention will be described using the drawings. In the drawings, the same symbols are assigned to the same parts or corresponding parts and their description is not repeated.

Third Embodiment

The present embodiment relates to a power amplifier that makes an attempt to further increase output compared to the power amplifier according to the first embodiment. The contents except for those to be described below are the same as those in the power amplifier according to the first embodiment.

FIG. 9is a diagram showing a schematic layout of each coil in the power amplifier according to a third embodiment of the present invention.

Referring toFIG. 9, a power amplifier104is a transformer type power amplifier of two differential pairs, comprising power amplifiers11aand12a, a transformer20a, capacitors31aand41a, a tertiary coil23a, power amplifiers11band12b, a transformer20b, capacitors31band41b, a tertiary coil23b, the terminals T1to T4, and terminals T5a, T5b. The transformer20aincludes a primary coil21aand a secondary coil22a. The transformer20bincludes a primary coil21band a secondary coil22b.

The amplifiers11aand12a, the transformer20a, the capacitors31aand41a, the tertiary coil23a, and the terminals T1to T4, T5acorrespond to the amplifiers11and12, the transformer20, the capacitors31and41, the tertiary coil23, and the terminals T1to T4, T5, respectively, in the power amplifier according to the first embodiment of the present invention. Consequently, the contents that are the same as those of the power amplifier according to the first embodiment of the present invention are not described repeatedly in detail.

The amplifiers11band12bamplify the input signal1and the input signal2received via the terminals T1and T2, respectively.

The transformer20bcomposites an output signal of the amplifier11band an output signal of the amplifier12b. That is, the primary coil21bhas a first end that receives the input signal1amplified by the amplifier11band a second end that receives the input signal2amplified by the amplifier12b. The terminal T5bis coupled to the middle point of the primary coil21band the power supply voltage4is supplied to the terminal5b.

The capacitor31bis coupled between the first end and the second end of the primary coil21b. The primary coil21band the capacitor31bconstitute an output matching circuit of the amplifiers11band12b.

The secondary coil22bis magnetically coupled with the primary coil21band coupled with the coil22a. A second end of the secondary coil22bis grounded via the terminal T4and the output signal3is taken out from a first end of the secondary coil22a.

In more detail, the secondary coil22ahas a first end coupled to the terminal T3and a second end coupled to a first end of the secondary coil22b. The secondary coil22bhas the first end coupled to the second end of the secondary coil22aand the second end coupled to the terminal T4. The output signal3of the power amplifier104, that is, the composite signal3of the input signal1and the input signal2amplified by the amplifiers11aand12a, and the input signal1and the input signal2amplified by the amplifiers11band12bis output from the terminal T3. The terminal T4is coupled to a ground node to which a ground voltage is supplied.

The tertiary coil23aand the capacitor41aare coupled in parallel, and the tertiary coil23band the capacitor41bare coupled in parallel. A parallel circuit including the tertiary coil23aand the capacitor41aand a parallel circuit including the tertiary coil23band the capacitor41bare coupled in series.

In more detail, the tertiary coil23ais magnetically coupled with the secondary coil22aand has a first end coupled to a first end of the capacitor41aand a second end coupled to a second end of the capacitor41aand a first end of the tertiary coil23b.

The tertiary coil23bis magnetically coupled with the secondary coil22band has a first end coupled to a first end of the capacitor41band a second end coupled to a second end of the capacitor41band a ground node to which a ground voltage is supplied. The capacitor41bis coupled between both ends of the coil23b.

For example, the amplifiers11a,11b,12aand12bhave the same configuration, the tertiary coil23aand the tertiary coil23bhave the same L value, and the capacitor41aand the capacitor41bhave different C values.

FIG. 10is a diagram showing the calculation results of the insertion loss characteristics in a high frequency region of a circuit block including the transformers20a,20b, the tertiary coils23a,23b, and the capacitors41a,41bto be applied to the power amplifier according to the third embodiment of the present invention.

In the calculation of the insertion loss characteristics shown inFIG. 10, it is assumed that: the primary coils21a,21bare ideal inductors and their L (inductance) value is 2.4 nH; the secondary coils22a,22bare ideal inductors and their L value is 2.2 nH; the tertiary coils23a,23bare ideal inductors and their L value is 2.0 nH; the magnetic coupling coefficient k value between the primary coil and the secondary coil is 0.565 and the magnetic coupling coefficient k value between the secondary coil and the tertiary coil is 0.565; and the capacitors41a,41bare ideal capacitors and their C (capacitance) values are 0.24 pF and 0.54 pF, respectively.

Referring toFIG. 10, when the frequency of the output signal of the power amplifier104is 2.4 GHz, an insertion loss of 30 dB is obtained at 7.2 GHz, that is, three times the frequency of the output signal and an insertion loss of 25 dB is obtained at 4.8 GHz, that is, twice the frequency thereof. That is, it can be seen that the power amplifier104has a function to suppress the frequency component of twice the frequency of the output signal, that is, 2.4 GHz, and the frequency component of three times the frequency of the output signal.

Consequently, with the power amplifier according to the third embodiment of the present invention, it is possible to obtain the effect to suppress the second harmonic distortion as well as suppressing the high-order frequency distortion, that is, the third harmonic distortion, and to make an attempt to increase output by compositing two pairs of differential signals.

The power amplifier according to the third embodiment of the present invention, in order to suppress the second harmonic distortion and the third harmonic distortion, obtains the resonance frequencies corresponding to those twice and three times the frequency of the output signal by setting the tertiary coils23a,23bto the same L value and setting the capacitors41a,41bto different C values, however, is not limited to such a configuration. It is also possible to obtain these resonance frequencies by setting the capacitors41a,41bto the same C value and setting the tertiary coils23a,23bto different L values.

Other configurations and operations are the same as those in the power amplifier according to the first embodiment, and therefore, their detailed description is not repeated here.

It should be considered that the embodiments disclosed as above are only examples in all points and are not limitative. The scope of the present invention is defined not by the above descriptions but by claims and it is intended that all modifications in the meaning and scope equivalent to claims are included.