Circuit and method for driving light sources

A driving circuit that includes a plurality of sub-driving circuits, a plurality of latch circuits and a plurality of first switching circuits is introduced. The sub-driving circuits is configured to supply a plurality of driving currents to drive a first group of light sources to emit light to form a first pixel on a display medium. A quantity of the sub-driving circuits is corresponding to a first data resolution of pixel data of the first pixel. Each of the latch circuits is configured to store a different bit of the pixel data of the first pixel. The first switching circuits are respectively coupled to the sub-driving circuits and are configured to control the plurality of sub-driving circuits to supply the driving currents to the first group of light sources according to the pixel data.

BACKGROUND

Technical Field

The disclosure generally relates to light source driving, and more particularly relates to a driving circuit and a method thereof that are capable of improving display quality under high refresh rate.

Description of Related Art

In a light emitting diode (LED) display system, pulse-width modulation (PWM) is used in many applications to drive a plurality of light sources to display multi-bit display data on a display medium. The display system may control a duty ratio (e.g., a percentage of “ON” time period over each cycle) according to data resolution of the multi-bit display data to drive the light sources. For example, a cycle may be divided into 256 units for displaying an 8-bit display data which presents a gray level from 0 to 255. A length of the cycle is inversely proportional to refresh rate of the display system. In other words, as the refresh rate of the display system increases, the length of the cycle decreased. When the length of the cycle is too short compared with response time of the light sources, the display quality of the multi-bit display data is degraded since each cycle may be not long enough to display a full range of gray levels.

As demand for the display applications with fast refresh rate has grown recently, there is a need for a creative technique to improve the display quality under high refresh rate for the LED display system.

Nothing herein should be construed as an admission of knowledge in the prior art of any portion of the present disclosure.

SUMMARY

A driving circuit and a driving method that are capable of improving display quality under high refresh rate are introduced.

In some embodiments, the driving circuit includes a plurality of sub-driving circuits, a plurality of latch circuits and a plurality of first switching circuits. The plurality of sub-driving circuits is configured to supply a plurality of driving currents to drive a first group of light sources to emit light to form a first pixel on a display medium. A quantity of the sub-driving circuits is corresponding to a first data resolution of pixel data of the first pixel. Each of the latch circuits is configured to store a different bit of the pixel data of the first pixel. The first switching circuits are respectively coupled to the sub-driving circuits and are configured to control the plurality of sub-driving circuits to supply the driving currents to the first group of light sources according to the pixel data.

In some embodiments, the driving method includes steps of supplying, by a plurality of sub-driving circuits, a plurality of driving currents to drive a first group of light sources to emit light to form a first pixel on a display medium, wherein a quantity of the sub-driving circuits is corresponding to a first data resolution of pixel data of the first pixel; storing, by a plurality of latch circuits, a different bit of the pixel data of the first pixel in a plurality of latch circuits of the driving circuit; and controlling, by a plurality of first switching circuits, the plurality of sub-driving circuits to supply the driving currents to the first group of light sources according to the pixel data.

To make the disclosure more comprehensible, several embodiments accompanied with drawings are described in detail as follows.

DESCRIPTION OF THE EMBODIMENTS

It is to be understood that other embodiments may be utilized and structural changes may be made without departing from the scope of the present disclosure. Also, it is to be understood that the phraseology and terminology used herein are for the purpose of description and should not be regarded as limiting.

FIG. 1illustrates a display system100in accordance with some embodiments. The display system100may include a driving circuit110, a plurality of light sources120, a display medium130and a controller140. The driving circuit110is coupled to the light sources120and is configured to drive light sources120to emitting lights or optical signals Sop to the display medium130so as to form pixels of a display frame on the display medium130. The driving circuit110may drive the light sources120according to display data (or pixel data) DATA. In some embodiments, the driving circuit110may include at least one bias current generating circuit (not shown) that is configured to generate reference currents with different current levels. The driving circuit110may drive the light sources120according to the reference currents and the display data DATA to form the display frame on the display medium130. In some embodiments, the display medium130may be a projection screen and the lights from the light sources120are projected to the projection screen to form the pixels of the display frame. In another embodiments, the display medium130may be a human retina and the lights from the light sources120are projected to the retina. The lights may be projected to the display medium by using optical components such as prisms, lens, or mirrors. In still another embodiments, the display medium130may be a display panel where the light sources120are disposed. The controller140is coupled to the driving circuit110and is configured to control the operations of the driving circuit110according to a control signal Scrl. In some embodiments, the controller140includes logic circuits that are configured to generate the control signals Scrl to control the driving circuit110. In some embodiments, the light sources120may be arranged as an array for emitting lights of the same color, such as red, green, blue or white, or other color such as cyan, magenta or yellow, which is not limited. In some embodiments, the display system100may include multiple arrays of the light sources120for emitting lights of different colors, such as red light, green light and blue light, and the lights of different colors may be projected to form a full-color pixel on the display medium. In some other embodiments, the display system100may include multiple arrays of the light sources120for emitting white lights, and the white lights may be projected, through color filtering devices, to form a full-color pixel on the display medium.

FIG. 2Aillustrates a schematic diagram of a driving circuit210for driving a plurality of light sources LED_11through LED_8M, which may be disposed as an N*M light source array where N=8 in this example, in accordance with some embodiments, where M is a positive integer. The light sources LED_11through LED_8M may be arranged in an N*M array where N=8, including rows ROW_1through ROW_8and columns COL_1through COL_M. The light sources that are located in the same column are referred to as a first group of light sources; and the light sources that are located in the same row are referred to as a second group of light sources. For example, the first group of light sources may be the light source column COL_1including the light sources LED_11through LED_81, and the second group of light sources may be the light source row ROW_1including the light sources LED_11through LED_1M. The light sources LED_11through LED_8M may be light-emitting elements (LED), micro-LED, micro organic LED (OLED), or any other suitable light sources that are capable of emitting lights.

The driving circuit210may include a plurality of sub-driving circuits210_1through210_8, a plurality of latch circuits L11through L8M, a plurality of multiplexers MUX_11through MUX_8M, and a plurality of switching circuits MS11through MS8M. In the aspect of light source rows, each of the sub-driving circuits210_1through210_8is configured to supply driving currents to M light sources of a corresponding light source row (i.e. the second group of light sources) among ROW_1through ROW_8. In the aspect of light source columns, the sub-driving circuits210_1through210_8are configured to supply driving currents to eight light sources of a corresponding light source column (i.e., the first group of current sources) among COL_1through COL_M. For driving the light source column COL_1to emit light to form a first pixel on the display medium, the associated parts in the driving circuit210are the sub-driving circuits210_1through210_8, the latch circuits L11through L81and the multiplexers MUX_11through MUX_81. A pixel of a display frame is displayed (by projection) by the light sources of a light source column emitting lights time-divisionally, which means driving currents generated by the sub-driving circuits210_1to210_8are time-divisionally supplied to the light sources of the light source column. Some timing control schemes are shown inFIG. 2CandFIG. 2Dillustrated later. In some embodiments, the quantity (i.e. N) of the sub-driving circuits210_1through210_N is corresponding to the data resolution of pixel data to be displayed on the display medium. For example, if the pixel data to be displayed on the display medium (e.g., display medium130inFIG. 1) has 8 bits, eight sub-driving circuits are included in the driving circuit210. The sub-driving circuits drives the first group of light sources in a time-divisional manner to emit lights so as to form the first pixel on the display medium by visual persistence.

FIG. 2Bis a schematic diagram of a driving circuit for driving a plurality of light sources in accordance with some embodiments. Based on the example illustrated inFIG. 2B, the plurality of multiplexers MUX_11through MUX_8M may be not required.

In some embodiments, each of the sub-driving circuits210_1through210_8includes a bias current generating circuit and a current mirror circuit. For example, the sub-driving circuit210_1includes a bias current generating circuit formed by a current source generating a reference current I1(which is also cited as the current source I1hereinafter) and a current mirror circuit CM1including an input current mirror transistor M1and output current mirror transistors MP11to MP1M, which are PMOS transistors in this example but not limited herein. The current mirror circuit CM1generate a plurality of output currents, which is taken as driving currents, respectively for the light sources LED_11through LED_1M, wherein each output current has the same current value as the reference current I1. Each of the sub-driving circuits210_2to210_8include a circuitry (i.e. a bias current generating circuit and a current mirror circuit) similar to the sub-driving circuits210_1and are not repeated herein. The output currents generated by the current mirror circuit CM1are supplied to the light source ROW_1at the same time. In this embodiment, for providing sufficient driving capability to a large amount of light sources in each light source row, each sub-driving circuit may further include an operational amplifier OPAM disposed between the gate terminal of the input current mirror transistor and the gate terminals of the output current mirror transistors in the current mirror circuit. In this embodiment, each sub-driving circuit may further include a transistor M2coupled to the input current mirror transistor M1for circuit symmetry. In some embodiments, the operational amplifier OPAM and the transistor M2may be not required, which is also illustrated inFIG. 2B.

With respect to a pixel of the display frame, such as the first pixel corresponding to the light source column COL_1, the sub-driving circuits210_1to210_8generate eight different driving currents respectively for the light sources LED_11to LED_81of the light source column COL_1, and these eight different driving currents are time-divisionally supplied to the light sources LED_11to LED_81under the control of plurality of switching circuits MS11through MS81. The values of reference currents I1through I8generated by the bias current generating circuits of the sub-driving circuits210_1through210_8are configured according to different bit orders of the pixel data. Taking 8-bit pixel data as an example, the reference current I1is corresponding to bit0of the pixel data and configured to be 20*I; the reference current I2is corresponding to bit1of the pixel data and configured to be 21*I; the reference current I3is corresponding to bit2of the pixel data and configured to be 22*I, and so forth, wherein I is a predetermined current. Thus, the reference currents I1through I8are configured to be 1*I, 2*I, 4*I, 8*I, 16*I, 32*I, 64*I and 128*I respectively.

In some embodiments, the current values of the reference currents I1through I8may be changed periodically (e.g. by display frames) as the current values are scrolling, which can avoid the light sources of each row being always driven by the same current value, such that influence of light source device mismatch due to manufacturing may be eliminated. An exemplary scrolling function is illustrated in Table 1, with respect to driving the light sources to display a display frame1(e.g., to emit lights which are projected to a projection screen), the reference currents I1through I8are configured to be 1*I, 2*I, 4*I, 8*I, 16*I, 32*I, 64*I and 128*I respectively; with respect to driving the light sources to display a display frame2next to the display frame1, the reference currents I1through I8are configured to be 128*I, 1*I, 2*I, 4*I, 8*I, 16*I and 64*I respectively; with respect to driving the light sources to display a display frame3next to the display frame2, the reference currents I1through I8are configured to be 64*I, 128*I, 1*I, 2*I, 4*I, 8*I, 16*I and 32*I respectively. When the scrolling function is applied on setting of the reference currents, the bit order of a bit of pixel data stored in a latch circuit may change correspondingly by display frames, which is described in detail later.

A display frame including a row of pixels P11through P1M which are 8-bit pixel data is given as an example for illustrating the following description. Based on this example, the pixel P11is displayed by the eight light sources LED_11through LED_81which emit lights time-divisionally, and the latch circuits L11through L81are configured to store different bits of pixel data of the pixel P11. Similarly, the pixel P1M is displayed by the eight light sources LED_1M through LED_8M which emit lights time-divisionally, and the latch circuits L1M through L8M are configured to store different bits of pixel data of the pixel P11. Each latch circuit may include one or more latches. In some embodiments, the quantity of the latches in each of the latch circuits L11through L8M are identical to one another, but the disclosure is not limited thereto.

For example, the latch circuit L11may store a bit0(least significant bit), denoted by B[0], of the pixel P11, the latch circuit L21may store a bit1, denoted by B[1], of the pixel P11, and the latch circuit L81may store a bit7(most significant bit), denoted by B[7], of the pixel P11. In some embodiments, the quantity of the latch circuits for storing pixel data of a pixel is corresponding to the data resolution of the pixel data. The bit stored in each latch circuit may be either 1 or 0 and may be utilized as a control signal or to generate a control signal, to control a conduction status of a corresponding switching circuit. As a result, a driving current is supplied to a corresponding light source when the corresponding switching circuit is conducted, and the driving current is not supplied to the corresponding light source when the corresponding switching circuit is not conducted. In a case of each latch circuit storing only one bit of pixel data of a pixel, the stored bit may control the corresponding switching circuit without being through a multiplexer. A converting circuit for converting the digital bit (0or1) to the control signal capable of turning on or off the switching circuit is not presented in figures.

For example, the switching circuits MS11through MS81are respectively coupled to the sub-driving circuits210_1through210_8and are configured to control the sub-driving circuits210_1through210_8according to bits of the pixel data of the pixel11(respectively stored in the latch circuits L11through L81) to supply the different driving currents time divisionally to the light sources LED_11through LED_81of the light source column COL_1(regarded as the first group of light sources). Similarly, the switching circuits MS1M through MS8M are respectively coupled to the sub-driving circuits210_1through210_8and are configured to control the sub-driving circuits210_1through210_8according to bits of the pixel data of the pixel1M (respectively stored in the latch circuits L1M through L8M) to supply the different driving currents time divisionally to the light sources LED_1M through LED_8M of the light source column COL_1(regarded as the first group of light sources). In some embodiment, the switching circuits MS11through MS81may be implemented by transistors and the control terminals of the switching circuits MS11through MS81may receive respective control signals generated based on the bits stored in the latch circuits L11through L81.

In some embodiments, each of the latch circuits L11through L8M is configured to store at least two bits of a same bit position with respect to at least two pixels on the display medium. Each of the multiplexers MUX_11through MUX_8M is coupled between one of the latch circuits L11through L8M and one of the switching circuits MS11through MS8M, and is configured to time-divisionally output at least two control signals which are generated based on at least two bits of a same bit position with respect to at least two pixels stored in the latch circuit L11through L8M, to control the switching circuits MS11through MS8M. For example, the multiplexer MUX_11is coupled between the latch circuit L11and the switching circuit MS11, and is configured to output a first control signal corresponding to a first bit stored in the latch circuit L11during a first unit period to control the switching circuit M11_1and output a second control signal corresponding to a second bit stored in the latch circuit L11during a second unit period to control the switching circuit MS11.

FIG. 2Cis an exemplary timing diagram for driving the light sources according to 8-bit pixel data B[0] through B[7] to form pixels of a N*M pixel array including pixels P1,1through PN,Mon the display medium, where N, M are integer and N=20 for illustration purpose. In the exemplary timing diagrams of the present disclosure, Pn denotes a row of pixels, including pixels Pn,1through Pn,M. T1-T20denotes unit periods. In this example, the ratio of the light source and the pixel pitch on the display medium is 1:1, which means light emitting by a light source can be projected to the range of a target pixel. The light source rows ROW_1through ROW_8respectively emit lights according to different bits of 8-bit pixel data. As such, in each unit period, each light source row is driven according to a bit of 8-bit pixel data and it needs eight unit periods (taken as a cycle) to display 8-bit pixel data of a pixel on the display medium. Referring toFIG. 2AandFIG. 2C, in the unit period T1, the driving circuit is configured to control the light sources LED_11through LED_1M in the light source row ROW_1to emit light according to a plurality of bits B[0] of pixel data of the pixels P1,1through P1,M(which are briefly denoted by a pixel row P1). In the unit period T2, the driving circuit is configured to control the light source LED_21(not shown) through LED_2M (not shown) in the light source row ROW_2to emit lights according to the a plurality of bits B[1] of the pixel data of the pixels P1,1through P1,M. Similarly, in subsequent unit periods from T3to T8, the driving circuit may control the light sources in the light source rows ROW_3through ROW_8time divisionally to emit light according to the bits B[2] through B[7] of the pixel data of the pixels P1,1through P1,Min the display medium. From the above, after the cycle having eight unit periods, the pixel row P1of the display frame is completely displayed. The other pixel rows P2through P20may be formed in the display medium in a similar manner, thus the detailed description is omitted hereafter. By such a time-divisionally driving control scheme, the human perceptive luminance of a pixel on the display medium is formed by visual persistence, and the luminance of the pixel may be positively related to a result of summing driving currents of corresponding light sources. For example, with respect to a pixel P1,1among the pixel row R1on the display medium, the luminance of the pixel P1,1may be positively related to a result of summing driving currents for the light sources LED_11through LED_81of the light source column COL_1, denoted by IP1,j, which may be calculated by equation (1), where I1to18are reference currents which respectively equal to the driving currents for the corresponding light sources and I is the predetermined current.
IP1,j=I1*P1,j_B[0]+I2*P1,j_B[1]+I3*P1,j_B[2]+I4*P1,j_B[3]+I5*P1,j_B[4]+I6*P1,j_B[5]+I7*P1,j_B[6]+I8*P1,j_B[7]=1*I*P1,j_B[0]+2*I*P1,j_B[1]+4*I*P1,j_B[2]+8*I*P1,j_B[3]+16*I*P1,j_B[4]+32*I*P1,j_B[5]+64*I*P1,j_B[6]+128*I*P1,j_B[7]  (1)

FIG. 2Dillustrates an exemplary timing diagram for driving the light sources according to 8-bit pixel data B[0] through B[7] to form pixels of a N*M pixel array including pixels P1,1through PN,Mon the display medium, where N, M are integer and N=20 for illustration purpose. In this example, the ratio of the light source and the pixel pitch on the display medium is 2:1, which means light emitting by a light source can be projected to the range of two pixels. A difference between the timing diagram shown inFIG. 2Cand the diagram shown inFIG. 2Dis that the bit values of every pixel row, such as the pixel row P1(including pixels Pn,1through Pn,M) are not displayed in continuous unit periods but displayed by, which is illustrated by shadow inFIG. 2D. For example, the bits B[0] of all the pixel data of the pixel row P1are displayed in the unit period T1, the bits B[1] of all the pixel data of the pixel row P1are displayed in the unit period T3instead of the unit period T2as illustrated inFIG. 2C, and the bits B[2] of all the pixel data of the pixel row P1are displayed in the unit period T5instead of the unit period T3as illustrated inFIG. 2C, and so forth. Besides, the bits B[0] of all the pixel data of the pixel row P2are displayed in the unit period T2, the bits B[1] of all the pixel data of the pixel row P2are displayed in the unit period T4, and so forth. From the above, by the cycle having 15 unit periods (such as from T1to T15), each pixel row of the display frame is completely displayed. Under such a time-divisionally driving control scheme ofFIG. 2D, the luminance of the pixel P1,1may be positively related to a result of summing driving currents for the light sources LED_11through LED_81of the light source column COL_1, and driving current summation IP1,jmay be also calculated by equation (1).

FIG. 3Aillustrates a schematic diagram of a driving circuit310for driving a plurality of light sources LED_11through LED_8M which may be disposed as an N*M light source array where N=8 in this example in accordance with some embodiments. The same components of the driving circuits inFIG. 3AandFIG. 2Aare indicated by same reference numbers. A difference between theFIG. 3AandFIG. 2Ais that the driving circuit310inFIG. 3Afurther includes additional sub-driving circuits210_01and210_02and a current summation circuit, which may be implemented by switches SW0_11, SW0_21, SW0_12, SW0_22. . . through SW0_1M and SW0_2M in this example. Each of the additional sub-driving circuits210_01and210_02may include additional bias current generating circuit and an additional current mirror circuit. The additional bias current generating circuit in each of the additional sub-driving circuit is similar to the bias current generating circuit in each of the sub-driving circuit except for the current value of the current sources. The additional bias current generating circuit of the additional sub-driving circuits210_01and210_02includes the current sources I01and I02generating reference currents which are also denoted by I01and I02, respectively. The structure of the additional sub-driving circuits210_01and210_02are similar to the structure of the sub-driving circuit210_1and210_8, thus the detailed description is omitted hereafter. Each of additional sub-driving circuits210_01and210_02may generate a plurality (which equals to M) of driving currents. In some embodiments, the total number of the sub-driving circuits (e.g., sub-driving circuits210_1through210_8) and the additional sub-driving circuits210_01and210_02is corresponding to a second data resolution that is greater than the first data resolution. For example, when the data resolution of the display data is 10-bit display data, the driving circuit310may include eight sub-driving circuits and two additional sub-driving circuits. Since the additional sub-driving circuits are utilized for increasing data resolution, the reference currents generated by the additional bias current generating circuits may be preconfigured to present the extra two bits of pixel data. For example, the reference current I01may be preconfigured to be (¼)*I and the reference current I02may be preconfigured to be (½)*I, where I is the predetermined current.

The current summation circuit is utilized for transferring the driving currents supplied by the sub-driving circuit210_01and the other driving currents supplied by the sub-driving circuit210_02to anyone of the light source rows ROW_1through ROW_8, such as transferring to the light source row ROW1in this example, according to the control of the switches in the current summation circuit. In the current summation circuit, the switches SW0_11through SW0_1M may be respectively coupled between a plurality of output current mirror transistors (such as M01_2) of the additional sub-driving circuit210_01and a plurality of output current mirror transistors (such as M02_2) of the additional sub-driving circuit210_02. The switches SW0_21through SW0_2M may be respectively coupled between a plurality of output current mirror transistors (such as M02_2) of the additional sub-driving circuit210_02and the plurality of output current mirror transistors MP11through MP1M of the sub-driving circuit210_1(referred toFIG. 2A). The switching operations of the switches of the current summation circuit may be controlled by a controller (e.g., controller140inFIG. 1). For example, when the switches SW0_11and SW0_21are turned on to form the electrical connections among the output current mirror transistors M01_2and M02_2and MP11, the driving current supplied to the light source LED_11could be summed to equal to ¼*I+½*I+1*I, where I is the predetermined current.

FIG. 3Bis a timing diagram for driving the light sources according to 10-bit pixel data B[0] through B[9] to form pixels of a N*M pixel array including pixels P1,1through PN,Mon the display medium in accordance with some embodiments, where N, M are integer and N=20 for illustration purpose. Referring toFIG. 3AandFIG. 3B, when the switches SW0_11through SW0_1M and SW0_21through SW0_2M of the current summation circuit are turned on, the driving currents (generated by the additional sub-driving circuits) corresponding to the bit data B[0] and B[1] of the pixels of the pixel row R1are added to the driving current corresponding to the bit B[2] of the pixels of the pixel row R1, such that each of the light sources LED_11through LED_1M is driven by a summed driving current. The light sources in light source rows ROW_2through ROW_8are used to display bits B[3] through B[9] of the pixel data of the pixels of the pixel row R1. As such, the driving circuit310may control the light sources according to the 10-bit display data to form pixels in the display medium. In this example shown inFIG. 3B, the ratio of the light source and the pixel pitch on the display medium is 2:1, such that a cycle for completely displaying a pixel row on the display medium equals 15 unit periods (such as from T1to T15). The luminance of the a pixel P1,jin the pixel row P1on the display medium may be positively related to a result of summing driving currents, which may be calculated according to equation (2):
IP1,j={I01*P1,j_B[0]+I02*P1,j_B[1]+I1*P1,j_B[2]}+I2*P1,j_B[3]+I3*P1,j_B[4]+I4*P1,j_B[5]+I5*P1,j_B[6]+I6*P1,j_B[7]+I7*P1,j_B[8]+I8*P1,j_B[9]={¼*I*P1,j_B[0]+½*I*P1,j_B[1]+1*I*P1,j_B[2]}+2*I*P1,j_B[3]+4*I*P1,j_B[4]+8*I*P1,j_B[5]+16*I*P1,j_B[6]+32*I*P1,j_B[7]+64*I*P1,j_B[8]+128*I*P1,j_B[9]  (2)

FIG. 4Aillustrates a schematic diagram of a driving circuit410for driving 4 rows of light sources, including a first light source row ROW_1including LED_11through LED_1M, a second light source row ROW_2including LED_21through LED_2M (not shown), a third light source row ROW_3including LED_31through LED_3M (not shown), and a fourth light source row ROW_4including LED_41through LED_4M4, which are also arranged in columns COL_1through COL_M, in accordance with some embodiments. A difference between the driving circuit410shown inFIG. 4Aand the driving circuit210shown inFIG. 2Ais that each light source row (i.e. the second group of the light sources) inFIG. 4Ais driven by two sub-driving circuits210_1and210_2, while each of the second group of the light sources inFIG. 2Ais driven by one sub-driving circuit. The driving circuit410may be utilized for maintaining 8-bit data resolution under a case that the number of light source rows for displaying pixel data is reduced to four light source rows.

Another difference between the driving circuit410shown inFIG. 4Aand the driving circuit210shown inFIG. 2Ais that the driving circuit410further includes a current transferring circuit that is formed by the switches TS11through TS4M. Each of the switches TS11through TS4M is coupled between the output terminals of two output current mirror transistors of a pair of the sub-driving circuits. More particularly, the switches TS11through TS1M are respectively coupled between the output terminals of the output current mirror transistors MP11through MP1M of the sub-driving circuit210_1and the output terminals of the output current mirror transistors MP21through MP2M of the sub-driving circuit210_2. Similarly, the switches TS41through TS4M are respectively coupled between the output terminals of the output current mirror transistors MP71through MP7M of the sub-driving circuit210_1and the output terminals of the output current mirror transistors MP81through MP8M of the sub-driving circuit210_2. In a case of the ratio of the light source and the pixel pitch on the display medium being not 1:1, the control (gate) terminal of the switch TS11may be coupled to an output of the multiplexer MUX_11to time-divisionally receive a bit B[0] of pixel data stored in the latch circuit L11. In other words, the switch TS11of the current transferring circuit is controlled by data bit stored in the latch circuit L11.

For example, the switches TS11through TS1M may be controlled based on bits B[0] of pixel data of a pixel row (stored in the latch circuits) to respectively transfer or not to transfer the driving currents from the output current mirror transistors MP11through MP1M of the sub-driving circuit210_1to the output terminal of the output current mirror transistors MP21through of MP2M of the sub-driving circuit210_2. In this way, when the switches TS11through TS4M of the current transferring circuit are controlled to be turned on or off according to stored bits in the latch circuits, the driving circuit410with eight sub-driving circuits may be used to drive the group of four light source rows using 8-bit display data. In a case that the switches TS11through TS4M of the current transferring circuit are set to turned off, the driving circuit410with eight sub-driving circuits may be used to drive the group of eight light source rows using 8-bit display data (e.g.,FIG. 2A). As such, the flexibility of the driving circuit410is improved.

FIG. 4Bis a timing diagram for driving the light sources according to 8-bit pixel data B[0] through B[7] to form pixels on the display medium in accordance with some embodiments. Referring toFIG. 4AandFIG. 4B, in the unit period T1, the switches TS11through TS1M of the current transferring circuit may respectively transfer driving currents corresponding to bits B[0] of pixel data of the pixel row P1to the output terminals of the output current mirror transistors MP21through MP2M, such that the driving currents corresponding to bits B[0] of pixel data of the pixel row P1and the driving currents corresponding to bits B[1] of pixel data of the pixel row P1are respectively summed. As such, in the unit period T1, the light sources LED_11through LED_1M in the light source row ROW_1are driven according to the respective summed driving currents corresponding to bits B[0] and B[1] of pixel data of the pixel row P1. Similarly, in the unit period T2, the light source row ROW_1are driven according to respective summed driving currents corresponding to bits B[0] and B[1] of pixel data of a pixel row P2; in the unit period T3, the light source row ROW_1are driven according to respective summed driving currents corresponding to bits B[0] and B[1] of pixel data of a pixel row P3; in the unit period T4, the light source row ROW_1are driven according to respective summed driving currents corresponding to bits B[0] and B[1] of pixel data of a pixel row P4. During T1to T4the light source rows except ROW_1are not driven (“OFF”). In the unit period T5, the light sources in the light source row ROW_2are driven according to respective summed driving current corresponding to bits B[2] and B[3] of pixel data of the pixel row P1; in the unit period T9, the light sources in the light source row ROW_3are driven according to respective summed driving current corresponding to bits B[4] and B[5] of pixel data of the pixel row P1; and in the unit period T13, the light sources in the light source row ROW_4are driven according to respective summed driving current corresponding to bits B[6] and B[7] of pixel data of the pixel row P1. After 13 cycles, the driving circuit410may drive the light sources to display the 8-bit display data (e.g., B[0] through B[7]) on the pixel row P1of the display medium. The luminance of a pixel P1,jin the pixel row P1on the display medium may be positively related to a result of summing driving currents, which may be calculated according to equation (3):
IP1,j={I1*P1,j_B[0]+I2*P1,j_B[1]}+{I3*P1,j_B[2]+I4*P1,j_B[3]}+{I5*P1,j_B[4]+I6*P1,j_B[5]}+{I7*P1,j_B[6]+I8*P1,j_B[7]}=1*I*P1,j_B[0]+2*I*P1,j_B[1]+4*I*P1,j_B[2]+8*I*P1,j_B[3]+16*I*P1,j_B[4]+32*I*P1,j_B[5]+64*I*P1,j_B[6]+128*I*P1,j_B[7]  (3)

FIG. 5Ais a timing diagram illustrating a scrolling function of the driving circuit (e.g., the driving circuit210inFIG. 2A, the driving circuit310inFIG. 3A) in accordance with some embodiments. As the variations occurred during the manufacturing process of the light sources and the electrical connections among the light sources, the display quality of the light sources is inconsistent over the light sources of the display system. For example, different light sources may generate different illuminance value even being driven by the same driving current. The driving circuit may use the scrolling function to driving the light sources to improve the display quality for the display system.

Referring toFIG. 2AandFIG. 5A, the latch circuits L11through L81may respectively store bit values B[0] through B[7] of the pixel data of a pixel for driving the light sources LED_11through LED_81. The light sources LED_11through LED_81is driven according to the bit values stored in the latch circuits L11through L81. For example, the light source LED_11is driven according to the bit values stored in the latch circuit L11; and the light source LED_81is driven according to the bit values stored in the latch circuits L81.

In some embodiments, the driving circuit210may scroll the bit values stored in latch circuits L11through L81and change the current values of the current sources I1through I8to enable a scrolling function. Referring toFIG. 2AandFIG. 5A, the latch circuits L11to L1M of the sub-driving circuit210_1that drives the light source row ROW_1may store a plurality of bits B[0] of pixel data in the display frame1. The reference current I1a may be configured according to the bit order of the bit value B[0], such as 1*I. As such, the light source row ROW_1may be driven to display the bits B[0] of pixel data in the display frame1.

In the display frame2, the latch circuits L11to L1M of the sub-driving circuit210_1corresponding to the light source row ROW_1may store a plurality of bits B[7] of pixel data in the display frame1; and the reference current I1may be configured according to the bit order of the bit value B[7], such as 128*I. As such, the light source row ROW_1may be driven to display the bits B[7] of pixel data in the display frame2. Similarly, the sub-driving circuits210_2to210_8may drive the light sources of the row ROW_2through ROW_8according to the different bit values in different display frames. As such, the influence or error due to device mismatch can be averaged. In this way, the display quality degradation caused by inconsistent quality of the light sources and the electrical connections thereof are reduced.

FIG. 5Bis a timing diagram illustrating a scrolling function of the driving circuit (e.g., the driving circuit410inFIG. 4A) in accordance with some embodiments. Referring toFIG. 4AandFIG. 5B, the latch circuits L11through L81may respectively store bit values B[0] through B[7] of the pixel data of a pixel for driving the light sources LED_11through LED_41. The light sources LED_11through LED_41are driven according to the bit values stored in the latch circuits of two sub-driving circuits. For example, the light source LED_11is driven according to the bit values stored in the latch circuits L11and L21; and the light source LED_41is driven according to the bit values stored in the latch circuits L71and L81.

In some embodiments, the driving circuit410may scroll the bit values stored in latch circuits and change the current values of the current sources I1through I8to enable a scrolling function. Referring toFIG. 4AandFIG. 5B, the latch circuits L11through L1M may store the bit values B[0] of pixel data in the frame land the latch circuits L21through L2M may store the bit values B[1] of pixel data in the frame1, for driving the light source row ROW_1. The reference currents I1and I2may be configured according to the bit order of the bit values B[0] and B[1], respectively. As such, the driving circuit410may drive the LED_11through LED1M according to the bit values B[0] and B[1] of pixel data in the display frame1.

In the display frame2, the latch circuits L11through L1M may store the bit values B[6] of pixel data in the frame2and the latch circuits L21through L2M may store the bit values B[7] of pixel data in the frame2, for driving the light source row ROW_1; and the reference currents I1and I2may be configured according to the bit order of the bit values B[6] and B[7], respectively. As such, the driving circuit410may drive the light sources LED_11through LED_1M of the light source row ROW_1according to the bit values B[6] and B[7] of pixel data in the display frame2. Similarly, the driving circuit410may drive each of the light source rows ROW_2through ROW_4according to the two different bit values of pixel data in every display frames. As such, the influence or error due to device mismatch can be averaged. In this way, the display quality degradation caused by inconsistent quality of the light sources and the electrical connections thereof are reduced.

FIG. 6Aa schematic diagram of a driving circuit610that is capable of compensating emitting light for defect light sources in accordance with some embodiments. A difference between the driving circuit610shown inFIG. 6Aand the driving circuit210shown inFIG. 2Ais that the driving circuit610further include a current summation circuit that include a plurality of switches SW11through SW7M. Each of the switches SW11through SW71of the current summation circuit is coupled between the output terminal of an output current mirror transistor of one sub-driving circuit that drives a light source row ROW_i and the output terminal of an output current mirror transistor of another one sub-driving circuit that drives a next light source row ROW_(i+1). For example, the switch SW11is coupled between the output current mirror transistor MP11and the output current mirror transistor MP21; and the switch SW71is coupled between the output current mirror transistor MP71and the output current mirror transistor MP81. The switches SW11through SWIM of the current summation circuit may be controlled by a controller (e.g., the controller140inFIG. 1).

When there is a defect light source, e.g., light source LED_71, the driving circuit610may disable the defect light source LED_71(i.e. not to output a driving current to the defect light source). In addition, the switches SW71of the current summation circuit is turned on to electrically couple the output terminal of the output current mirror MP71to the output terminal of the output current mirror MP81, such that the driving current for the detect light source LED_71may be added into the driving current for the light source_LED_81, while the switches SW11to SW61may be at an off state. As such, the light source LED_81may replace the function of the defect light source LED_71, which means that the light source LED_81does not only emit light corresponding to bit B[7] of pixel data but also emit light corresponding to bit B[6] of pixel data.

FIG. 6Bis a timing diagram illustrating driving of the driving circuit610when light sources (e.g., LED_31and LED_71) are defect light sources. The ratio of the light source to pixel pitch is 2:1 in the example ofFIG. 6B. Referring toFIG. 6AandFIG. 6B, when the light source LED_31in the light source row ROW_3is a defect light source, the drive circuit610disables the light source LED_31and control the switch31to be turned on to add the driving current for the light source LED_31into the driving current for the light source LED_41in the light source row ROW_4. In such a way, the light source LED_41is driven in the unit period T7by a summed driving current which is the summation of the driving current corresponding to bit B[2] of pixel data and the driving current corresponding to bit B[3] of pixel data. Similarly, when the light source LED_71in row ROW_7is a defect light source, the drive circuit610disables the light source LED_71and control the switch71to be turned on to add the driving current for the light source LED_71into the driving current for the light source LED_81in the light source row ROW_8. In such a way, the light source LED_81is driven in the unit period T14by a summed driving current which is the summation of the driving current corresponding to bit B[6] of pixel data and the driving current corresponding to bit B[7] of pixel data. By controlling the switches SW11through SWIM of the current summation circuit, the driving circuit610may adjust the driving current of a light source substitute in the next light source row to compensate the emitting light for the defect light sources.

FIG. 7Aillustrates a driving circuit710that is capable of compensating emitting light for a defect light source in accordance with some embodiments. The driving circuit710may include a current transferring circuit including a plurality of switches TS11through TS4M and may be used for driving four light source rows including light sources LED_11through LED_4M, which are similar to the driving circuit410inFIG. 4A. A difference between the driving circuit710inFIG. 7Aand the driving circuit410inFIG. 4Ais that the driving circuit710further includes a current summation circuit that includes a plurality of switches SW11through SW3M for the light source compensation function and has a similar circuitry as the current summation circuit in the driving circuit610inFIG. 6A. Each of the switches SW11through SW3M of the current summation circuit is coupled between the output terminal of an output current mirror transistor of one sub-driving circuit that drives a light source row ROW_i and the output terminal of an output current mirror transistor of another one sub-driving circuit that drives a next light source row ROW_(i+1). The switches SW11through SW3M of the current summation circuit may be controlled by a controller (e.g., the controller140inFIG. 1).

When there is a defect light source, e.g., light source LED_31in light source row ROW_3, the driving circuit610may disable the light source LED_31and control the switch SW31to be turned on to electrically couple the output terminal of the output current mirror transistor MP61to the output terminal of the output current mirror transistor MP81. As such, the driving current for the light source LED_41in the next light source row (e.g., ROW_4) are adjusted to compensate the emitting light for the defect light sources.

FIG. 7Bis a timing diagram illustrating driving of the driving circuit710when the light source LED_31is a defect light source. Referring toFIG. 7AandFIG. 7B, when the light source LED_31in the light source row ROW_3is defected, the drive circuit710disables the light source LED_31, and control the switch31to be turned on to add the driving current for the light source LED_31into the driving current for the light source LED_41in the light source row ROW_4. In such a way, the light source LED_41is driven in the unit period T13by a summed driving current which is the summation of a plurality of the driving currents corresponding to bits B[4], B[5], B[6] and B[7] of pixel data. By controlling the switches SW11through SW3M of the current summation circuit, the driving circuit710may adjust the driving current of a light source substitute in the next light source row to compensate the emitting light for the defect light sources.

FIG. 8illustrates a flowchart diagram of a driving method adapted to a driving circuit in accordance with some embodiments. In step S810, a plurality of driving currents is supplied, by a plurality of sub-driving circuits, to drive a first group of light sources to emit light to form a first pixel on a display medium, wherein a quantity of the sub-driving circuits is corresponding to a first data resolution of pixel data of the first pixel. In step S820, a different bit of the pixel data of the first pixel is stored, by a plurality of latch circuits, in a plurality of latch circuits of the driving circuit In step S830, the plurality of sub-driving circuits is controlled, by a plurality of first switching circuits, to supply the driving currents to the first group of light sources according to the pixel data.

From the embodiments of the disclosure, a plurality of sub-driving circuits of a driving circuit are employed to drive a group of light sources to form a pixel on a display medium according to pixel data with a specific resolution. The sub-driving circuits may use different reference currents or voltages to achieve the specific resolution of the pixel data. In the embodiments of the disclosure, the light sources are not driven based on the duty cycle of a pulse width modulation but driven in a time-divisional manner, and in every unit period of the cycle completely displaying a pixel, the driving currents for different bits of pixel data are supplied to the corresponding light sources for the same time length (within the unit period) no matter what the gray level the pixel data is, such that the degradation of display quality under high refresh rate is prevented. In addition, additional sub-driving circuits and the current summation circuit may be configured to allow the driving circuit to drive the light sources according a higher resolution (e.g., 10-bit pixel data). The switches included in the current summation circuit may also allow the drive circuits to drive the light sources according to different resolutions, thereby improving the flexibility of the driving circuit. The driving circuit may have a scrolling function to reduce the negative effects caused by the imperfect manufacturing of the light sources. Furthermore, the repairing mechanism may also be implemented in driving circuit using the current summation circuit to turn off the defect light sources and compensate the emitting light for the defect light sources using the light sources in next-row.