Semiconductor device and method for manufacturing the same

A semiconductor device (21) can include, e.g., a recessed portion (25) on the reverse surface (224) of an insulating resin (22) which is the mounting surface of the semiconductor device (21). Additionally, on the outer peripheral surface of the recessed portion (25), the exposed region of leads (26) and the reverse surface (224) of the insulating resin (22) form generally the same plane. This allows, e.g., a QFN semiconductor device (21) according to preferred embodiments herein to place dust particles in the recessed portion (25) even in the presence of dust particles such as crushed burr particles of the leads (26) or plastic burrs, thereby avoiding mounting deficiencies when mounting the semiconductor device.

BACKGROUND OF THE INVENTION

Priority is claimed to Japanese Patent Application Serial Number JP2002-020297, filed on Jan. 29, 2002, the disclosure of which is incorporated herein by reference in its entirety.

FIELD OF THE INVENTION

The preferred embodiments of present invention relate to, among other things, a reverse mounted leadless semiconductor device and, more particularly, to a semiconductor device and a method for manufacturing the same that can be employed to reduce deficiencies caused when mounting the semiconductor device.

DESCRIPTION OF THE RELATED ART

The following description sets forth the inventors' knowledge of related art and problems therein and should not be construed as an admission of knowledge in the prior art. As semiconductor device capacities have been increased year-by-year, the number of required lead terminals, which serve as various signal lines, has tended to increase. This tendency has resulted in greater use of semiconductor devices such as QFP (Quad Flat Package) semiconductor devices having lead terminals extending from their four sides and QFN (Quad Flat Non-leaded Package) semiconductor devices. For example, one practical example of a method for manufacturing a QFP semiconductor device is disclosed in Japanese Unexamined Patent Publication No.

Illustrative existing methods for manufacturing a semiconductor device are now described below with reference toFIGS. 12-15. In that regard,FIG. 12is a plan view illustrating a lead frame.FIG. 13is a perspective view illustrating a mold. And,FIG. 14is a plan view illustrating a lead frame after having been encapsulated with plastic.

First, as shown inFIG. 12, a semiconductor element is mounted, via silver paste serving as a bonding agent, on a stage2of a lead frame1. Although not illustrated, the semiconductor element has a plurality of electrode portions on its surface and is mounted on the stage to be fixedly attached thereto. Thereafter, the electrode portions are electrically connected to lead terminals3using wire bonding.

As shown inFIG. 13, after the semiconductor element has been mounted as described above, the lead frame1is placed in between an upper mold7and a lower mold8. Thereafter, closing the molds causes a cavity to be defined which serves as an injection volume.

Then, a melted plastic is injected at a predetermined pressure therein through a pot10′ of the upper mold7. The plastic flows into the cavities of the upper mold7and the lower mold8, filling in a cavity9via a runner11, thereby encapsulating the semiconductor element. Although air exists inside the cavity9before the plastic is injected, the plastic pushes the air out through an air vent at the stage of the plastic penetrates the cavity. Then, the air flows outside through a hole5formed in the lead frame1. The air vent is formed in the molds7and8and has a sufficient extent of clearance not to allow the plastic to pass therethrough.

After the plastic filled has cooled down and solidified, the molds are opened to take out the lead frame1. The lead frame at this point in time is shown in FIG.14. In this figure, to clarify the flow passage of the plastic, portions where the pot and runner were present at the time of plastic encapsulation are shown with dashed lines. As can be seen clearly fromFIG. 14, the plastic flows into the molds from a pot portion10that is located at the center of four encapsulation regions through a gate portion4. This allows the semiconductor element to be mounted on the stage and part of the lead terminals3located around the periphery of the semiconductor element to be covered with the plastic, thereby forming a package12. Thereafter, joint portions of the lead terminals3are cut off, and the separated lead terminals3are bent as necessary to thereby complete a QFP semiconductor device.

Next, FIGS.15(A) and15(B) illustrate a QFP semiconductor device that has been formed by the same method as that for manufacturing the aforementioned QFN semiconductor device.

FIG.15(A) is a cross-sectional view illustrating a semiconductor device including a lead15formed portion. As illustrated, this background semiconductor device is configured such that a semiconductor element16is fixedly attached to an island14formed of a Cu frame via an electrically conductive paste17such as silver (hereinafter referred to as Ag) paste. An electrode pad (not shown) of the semiconductor element16is electrically connected to the lead15via a thin metal wire18. In addition, an insulating resin19, which integrally covers the semiconductor element16and other components, is formed on the island14and the lead15made of a Cu frame. Then, the reverse surface of the island14and the lead15is plated for prevention of oxidation and solder wettability. With this structure, for example, the lead15is mounted to a mounting substrate (not shown) via solder. At this time, the reverse surface of the semiconductor device is formed to be generally flush therewith, ensuring that the semiconductor device is mounted on the mounting substrate with stability.

Now, FIG.15(B) is a cross-sectional view illustrating a semiconductor device including a lifting lead13formed portion. As illustrated, on the upper surface of the lifting lead13exposed on the side surface of the insulating resin19, plastic burrs19A are produced continuously on the side surface of the insulating resin19. These burrs are the plastic that has flowed into the air vent portion provided in the molds and hardened, for example, with a thickness of approximately 30 μm.

As described above, the mounting surface of the semiconductor device is formed to have generally the same plane as shown in FIG.15(A) in the background QFN semiconductor device. For this reason, when the semiconductor device is mounted onto the mounting substrate, mounting deficiencies are caused by dust particles such as plastic particles entering in between the substrate and the semiconductor device.

Furthermore, as described above, in the method for manufacturing a background semiconductor device, the air present in the cavity9is driven towards the end portion of the cavity9, from which the air passes outwardly through the air vent provided in the molds, as shown in FIG.13. However, when the air is pushed out via the air vent, the plastic turns into burrs between the lead frame1and the upper mold7or between the lead frame1and the lower mold8. To cut the package12out of the lead frame1, the peripheral portion of the package12is cut while being fixed. However, as shown in FIG.15(B), when plastic burrs19A have occurred on this fixed region, especially on the surface of the lifting lead13, it can be impossible to reliably secure the leads3. As a result, on the cutting surface of the plastic formed between the leads3, microcracks can be produced. In subsequent steps, these cracks will turn to be plastic particles, etc., which would induce mounting deficiencies in the mounting step.

Furthermore, in the method for manufacturing a background semiconductor device, the air present in the cavity9is driven towards the end portion of the cavity9, from which the air passes the cavity9outwardly through the air vent provided in the mold7. However, when the air is pushed out via the air vent, the plastic turns into burrs between the lead frame1and the upper mold7or between the lead frame1and the lower mold8. Because the plastic burrs are as thin as approximately 30 μm, the plastic burrs are integrated with the package and may remain in the mold when the package is removed from the mold6. The plastic burrs remaining in the mold may block the passage of air present in the cavity9at the time of the subsequent plastic molding. As a result, because the air does not flow outside and thus remains compressed in the cavity9, such a problem can arise wherein voids and/or unfilled volumes occur in the package.

There is a need in the art for improved systems and methods that overcome the above and/or other problems.

SUMMARY OF THE INVENTION

The various preferred embodiments of the present invention significantly improve upon existing systems and methods.

The preferred embodiments of the present invention were developed in view of the aforementioned and/or other problems. A semiconductor device according to some preferred embodiments includes: at least one island; a semiconductor element fixedly attached to a surface of said island; a plurality of leads extending from the vicinity of said island outwardly and lifting leads extending outwardly from corner portions of said island; and an insulating resin for covering said island, said semiconductor element, said leads, and said lifting leads integrally, wherein one end of said leads is exposed generally on the same plane as a reverse surface of said insulating resin, and the reverse surface of said insulating resin has a recessed portion at least at part of a region surrounded by an exposed surface of said leads.

Furthermore, the semiconductor device preferably includes that plastic hardened between said leads exposed on said insulating resin and plastic hardened between said leads exposed on said insulating resin and said lifting leads have generally the same thickness as said lead frame.

Furthermore, the semiconductor device preferably includes that one end of said leads and one end of said lifting leads have a stamped surface on a side of the mounting surface of said insulating resin.

According to other preferred embodiments, a method for manufacturing a semiconductor device includes: preparing a lead frame having at least one mounting portion including at least an island, leads, and lifting leads, and fixedly attaching a semiconductor element to the island of said lead frame; forming an insulating resin for each mounting portion after said semiconductor element is electrically connected to said leads via a thin metal wire; and separating said insulating resin individually for each mounting portion by cutting said lead frame, wherein in said forming said insulating resin, said lead frame located at an end portion of said insulating resin is sandwiched with a plastic encapsulation mold, plastic is filled in the plastic encapsulation mold through an air vent provided on said lead frame, air and plastic are exhausted from the plastic encapsulation mold through an air vent provided on said lead frame, said air vent being located at said sandwiched lead frame.

Furthermore, the semiconductor device preferably includes that on the reverse surface of the insulating resin which is a mounting surface of the semiconductor device, a recessed portion is formed on a region excluding the mounting region on the outer peripheral surface on which leads are exposed. This makes it possible to, for example, significantly improve the probability of mounting deficiencies by placing dust particles in the recessed portion formed region even in the presence of dust particles such as plastic burrs on the mounting substrate and mounting surface of the semiconductor device when mounting the semiconductor device.

Furthermore, the semiconductor device preferably includes that the thickness of the lifting leads exposed on the side surface of the insulating resin and the thickness of the plastic near the lifting leads are made generally the same. This allows, for example, the upper surfaces of the lifting leads and the plastic near the leads to be generally flush with each other, and used as a lead securing region upon cutting the leads. As a result, it is possible to stabilize the cutting surface of the leads and the plastic near the leads.

Furthermore, the semiconductor device preferably includes that one end of the lifting leads is exposed on the mounting surface of the semiconductor device. This allows, for example, the mounting area of the semiconductor device to be increased, thereby providing an increased mounting strength.

Furthermore, the semiconductor device preferably includes that an island is exposed on the surface of the insulating resin opposite to the mounting surface of the semiconductor device. This allows, for example, the heat generated by the semiconductor element to be dissipated directly outwardly from the island, thereby improving the heat dissipation.

Furthermore, the manufacturing method of the semiconductor device preferably includes that in forming the insulating resin, the plastic is injected into the cavity and the air and plastic are exhausted from the cavity only through the first air vent substantially formed on the lead frame. This makes it possible, for example, to form the same flat surface having no projected or recessed portions due to plastic burrs on the outer peripheral surface formed successively to the side surface of the insulating resin.

Furthermore, the method for manufacturing the semiconductor device preferably includes that, at the time of cutting the individual semiconductor devices out of the lead frame, the insulating resin and the vicinity of the boundary between the insulating resin and the leads exposed on the side surface of the insulating resin are reliably secured and cut. This allows, for example, for stabilizing the cutting surface of the leads and the plastic near the leads. As a result, it is possible to, for example, prevent microcracks in the plastic located at the cutting surface, prevent plastic dust particles resulting from the growth of cracks, and significantly reduce the possibility of mounting deficiencies of the semiconductor device.

Furthermore, the method for manufacturing the semiconductor device preferably includes that the leads, the lifting leads, and the plastic near the leads are cut from the mounting surface of the semiconductor device. This preferably causes a stamped surface of the leads, the lifting leads, and the plastic to be formed on the side of the mounting surface. On the other hand, the burrs of the leads, the lifting leads, and the plastic are preferably formed on the surface opposite to the mounting surface. As a result, substantially no or no projected or recessed portions are preferably formed on the mounting surface of the semiconductor device, and the mounting accuracy and the stability of the semiconductor device can be improved.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Now, semiconductor devices and methods for manufacturing the same according to some preferred embodiments of the invention will be described below with reference to FIG.1through FIG.11.

First, referring to FIG.1throughFIG. 3, a QFN semiconductor device according to some preferred embodiments is described below.

FIG.1(A) is a perspective view illustrating the semiconductor device according to some embodiments of the present invention. FIG.1(B) is a plan view illustrating the reverse surface of the semiconductor device shown in FIG.1(A). As shown in FIG.1(A), on the front surface of a semiconductor device21according to these embodiments, part of an island23and one end241of lifting the leads24are preferably exposed on a front surface221of an insulating resin22made of an insulating plastic forming the package. Additionally, on side surfaces222of the insulating resin22, one end of the leads26is preferably slightly exposed. Although detailed in a manufacturing method described later, the exposed region is preferably capable of securing the leads26with a lead cutting jig at the time of cutting the leads26from a lead frame41(see, e.g., FIG.4). More specifically, the exposed region is preferably exposed from the insulating resin22approximately 50 μm through 200 μm. On four corner side surfaces223of the insulating resin22at which the four side surfaces222allowing the leads26to be exposed thereon intersect each other, the other end242of the lifting leads24is preferably slightly exposed. In this case, as for the leads26, the exposed region is preferably capable of securing the lifting leads24at the time of cutting the lifting leads24from the lead frame41. More specifically, the exposed region is also preferably exposed approximately 50 μm through 200 μm from the insulating resin22.

In these embodiments, the island23exposed on the front surface221of the insulating resin22can, e.g., improve the heat dissipation generated by the semiconductor element. The front surface221of the insulating resin22, the reverse surface of the island23, and the reverse surface of the one end241of the lifting leads24are preferably located generally on the same plane, thereby realizing the semiconductor device21itself reduced in thickness. The island23is preferably not limited to a particular position but may be located at any position so long as, e.g., a recessed portion25, described later, can be formed there.

As shown in FIG.1(B), the reverse surface of the semiconductor device21according to these embodiments preferably functions as a mounting region for the semiconductor device21. On the outer peripheral portion on a reverse surface224of the insulating resin22, the other end242of the lifting leads24and the mounting surface of the one end of the leads26(e.g., an abutting surface of the mounting substrate) are preferably exposed so as to be generally flush with the reverse surface224of the insulating resin22. The other end242of the lifting leads24and the mounting surface of the one end of the leads26can be mounted to a mounting substrate (not shown) via a securing material such as, e.g., solder. Here, the semiconductor device preferably includes that even the other end242of the lifting leads24is exposed on the reverse surface224of the insulating resin22. With this structure, the mounting area can be increased and the mounting strength can also be improved. Here, on the reverse surface224of the insulating resin22, the exposed region of the other end242of the lifting leads24can be placed around the recessed portion25, thereby causing it to be located outside the exposed region of the leads26. This structure thus employed can mitigate the concentration of the mounting region at the corners of the reverse surface224of the insulating resin22. This can also prevent the lifting leads24and the leads26, adjacent to each other, from having bridged solder, and thereby allowing the individual leads26to be electrically connected reliably to the desired electrically conductive pattern (not shown) on the mounting substrate. Additionally, on the exposed region of the lifting leads24, when the mounting region has a mitigated concentration, it is possible to further improve the mounting strength by increasing the exposed region of the lifting leads24. This is because, e.g., the increased exposed region can be fixedly attached to the electrically conductive pattern of the mounting substrate via solder.

Furthermore, the semiconductor device preferably includes that the recessed portion25is provided on the reverse surface224of the insulating resin22. This structure is described below in more detail with reference to FIGS.2(A) and2(B).

FIG.2(A) is a cross-sectional view taken along line X—X of FIG.1(A) showing a semiconductor device according some embodiments of the present invention. FIG.2(B) is a cross-sectional view taken along line Y—Y of FIG.1(A) showing a semiconductor device according to some embodiments of the present invention. First, as shown in FIG.2(A), the cross-sectional structure of the semiconductor device21according to some embodiments is described below. As described above, the island23is preferably exposed on the front surface221of the insulating resin22to be generally flush therewith. For example, a semiconductor element28is preferably fixedly attached to a surface opposite to the exposed surface of the island23via an electrically conductive paste27such as, for example, Ag paste. The electrode pad portion (not shown) of the semiconductor element28can be electrically connected to the leads26via a thin metal wire29. One end262of the leads26is preferably exposed to be generally flush with the reverse surface224of the insulating resin22while the other end261of the leads26connecting to the thin metal wire29is preferably located inside the insulating resin22.

As described above, the semiconductor device preferably includes that the recessed portion25is provided on the reverse surface224of the insulating resin22. More specifically, the one end262of the leads26is preferably exposed on the reverse surface224of the insulating resin22, and the insulating resin22itself preferably has a flat surface in consideration of the stability when mounting the semiconductor device21. Inside that region, for example, the recessed portion25is preferably formed to occupy approximately two thirds of the reverse surface224of the insulating resin22. In this embodiment, the recessed portion25is preferably formed to be approximately 10 μm through 200 μm in depth, for example. However, the depth of the recessed portion25can be freely modified in accordance with, e.g., the thickness of the semiconductor device21itself, the position of the island23inside the insulating resin22, and other use purposes. With this structure, when the semiconductor device21is mounted on the mounting substrate, etc., it is possible to significantly reduce mounting deficiencies by forming the recessed portion25formed region in the semiconductor device21even in the presence of dust particles such as plastic burrs between the semiconductor device21and the mounting substrate. The recessed portion25formed region can be changed as, e.g., the depth thereof or a plurality of recessed portion25formed regions may be formed on the reverse surface224of the insulating resin22, according to use purposes.

Then, as shown in FIG.2(B), the semiconductor device21according to these embodiments allows the island23to be exposed on the front surface221of the insulating resin22. This can ensure a thickness of plastic from the surface of the semiconductor element28to the reverse surface224of the insulating resin22, thus ensuring the recessed portion25formed region on the mounting surface of the semiconductor device21. In these embodiments, the island23can be exposed on the front surface221of the insulating resin22, thereby improving the heat dissipation generated by the semiconductor element28. Furthermore, in these embodiments, to increase the mounting area of the QFN semiconductor device21, the other end242of the lifting leads24is preferably exposed on the reverse surface224of the insulating resin22. At this time, as described above, the other end242of the lifting leads24is preferably also exposed on the reverse surface224of the insulating resin22to improve the mounting strength of the semiconductor device21. The corner portions of the insulating resin22on which the lifting leads24are exposed may be short-circuited due to bridged solder resulting from concentrations in the mounting area. For this reason, the exposed region of the lifting leads24can be determined in consideration of the concentrations in the mounting region with the leads26at the corner portions.

Although not illustrated, the securing region of the island23can be plated with silver or gold in consideration of the adherence to the electrically conductive paste27. On the other hand, the leads26can be plated with silver or nickel in consideration of the adherence to the thin metal wire29.

Now, FIG.3(A) is a perspective view illustrating a portion of a semiconductor device according to some preferred embodiments of the present invention. FIG.3(B) is an enlarged view illustrating a lead of the semiconductor device according to some preferred embodiments of the present invention. As shown in FIG.3(A), in practice, plastic is integrally formed between the ends262of the leads26exposed on the insulating resin22. The plastic is also formed integrally between the one end262of the leads26and the other end242of the lifting leads24. This is because only a limited number of the leads26and the lifting leads24are exposed on the side surfaces222and223of the insulating resin22, and plastic22A between the leads26and the lifting leads24and the leads26is integrated with the insulating resin22itself because of the lifting leads24and the leads26themselves having a thickness of, for example, approximately 100 μm through 250 μm. The semiconductor device preferably includes that an outer peripheral surface30defined by the lifting leads24, the leads26, and the plastic22A between the lifting leads24and the leads26has generally the same plane and the same thickness. Although detailed in a manufacturing method described later, this structure can allow a lead cutting jig to reliably secure the lifting leads24and the leads26upon cutting the semiconductor device21out of the lead frame41.

Furthermore, as shown in FIG.3(B), the semiconductor device preferably includes that the one end262of the leads26has a stamped surface32on the reverse surface224of the insulating resin22, thus allowing burrs31of the leads26to be produced on the front surface221of the insulating resin22. Conversely, the burrs31produced on the reverse surface224of the insulating resin22can be crushed when mounting the semiconductor device21onto the mounting substrate, the crushed burrs31causing mounting deficiencies. Suppose that the burrs31remain uncrushed. In this latter case, the flatness of the reverse surface224of the insulating resin22would be degraded, thereby reducing the mounting accuracy and the mounting strength. That is, with the aforementioned structure, it is possible to provide, e.g., an improved mounting accuracy and mounting strength to the semiconductor device. As illustrated, the stamped surface32has a curved surface. The same holds true for the lifting leads24, and the lifting leads24have a similar structure.

In the foregoing, reference has been made to a QFN semiconductor device. However, the various embodiments of the present invention are not limited thereto. Similar effects can be obtained for other semiconductor devices such as, for example, QFP semiconductor devices. Furthermore, various other modifications can be made without deviating from the spirit and scope of the present invention.

Now, with reference to FIG.4throughFIG. 11, a method for manufacturing, e.g., the QFN semiconductor device according to some embodiments of the present invention will be described below. To describe the manufacturing method, reference is made to like components, in like figures, designated by the like reference numerals, which have been used for describing the aforementioned semiconductor devices.

As shown in FIG.4andFIG. 5, in a first step, a lead frame is preferably prepared.

FIG. 4is a plan view illustrating a lead frame used for the semiconductor device according to some preferred embodiments of the present invention. As illustrated, the lead frame41used in these embodiments is made of a frame, for example, mainly composed of copper and approximately 100 μm through 250 μm in thickness. However, the lead frame may be mainly composed of Fe—Ni or any other metal material. On the lead frame41, there are formed a plurality of mounting portions42indicating a unit corresponding to one semiconductor device shown by an alternate long and short dashed line. InFIG. 4, only four mounting portions42are shown. However, at least one mounting portion42can be provided in various embodiments. The mounting portion42is preferably surrounded with a pair of first coupling strips43extending substantially horizontally on the page and a pair of second coupling strips44extending substantially vertically on the page. The first and second coupling strips43and44allow a plurality of mounting portions42to be placed on one lead frame41.

FIG. 5is an enlarged plan view illustrating one mounting portion of the lead frame shown in FIG.4. More specifically, as illustrated, the mounting portion42preferably includes: the island23; the lifting leads24for supporting the island23; a plurality of the leads26located near the four sides of the island23, surrounding the four sides, and extending towards the first and second coupling strips43and44; regions47located in the direction of extension of the lifting leads24and surrounded by the lifting leads24and the first and second coupling strips43and44; a first air vent45and a second air vent46which are provided on the region47. In these embodiments, the three air vent formed regions47are each provided with the first air vent45and the second air vent46. These may be, however, provided in at least one region47. On the other hand, at least one plastic injection inlet is required. In these embodiments, such is preferably provided at the lower right corner region48where the second air vent46is not formed. The plastic injection inlet does not necessarily have to be provided on the four corner portions, but the first air vent45and the second air vent46may be formed on each of all the air vent formed regions47at all four corner portions. Additionally, in these embodiments, the two types of holes provided on the lead frame41are defined as the first air vent45and the second air vent46, respectively.

As shown inFIG. 6, in a second step, the semiconductor element28is preferably die bonded on the island23of the lead frame41. Then, the thin metal wire29is preferably wire bonded between the electrode pad portions (not shown) of the semiconductor element28and the leads26are electrically connected therebetween.

In this step, the semiconductor element28is preferably die bonded onto and thereby secured on the surface of the island23with the electrically conductive paste27such as, for example, Ag paste for each mounting portion42of the lead frame41. Thereafter, the electrode pad portions of the semiconductor element28and the leads26can be connected to each other with the thin metal wire29. The aforementioned thin wire can be made of Au, for example. At this time of connection of the thin metal wire29using wire bonding, ball bonding is preferably carried out on the electrode pad portions and stitch bonding is preferably carried out on the leads26. Although not illustrated, the island23may be plated with, for example, silver or gold in consideration of adherence to the electrically conductive paste. On the other hand, the leads26are, for example, plated with silver or nickel in consideration of adherence to the thin metal wire29. For the adhering means to be used for the semiconductor element28, adhering material or film made of, e.g., Au—Si foil, a brazing material such as solder or insulating material, according to usage applications, can be employed.

As shown in FIG.7throughFIG. 9, in a third step, the individual mounting portions on the lead frame are molded of plastic using a plastic encapsulation mold.

FIG.7(A) is a plan view illustrating the inside upper mold according to some embodiments. FIG.7(B) is a cross-sectional view illustrating a portion of an air vent formed region at the time of plastic molding. FIG.7(C) is a cross-sectional view illustrating the plastic injection portion at the gate portion.

As shown in FIG.7(A), there is formed an abutting surface52to the air vent formed region47shown inFIG. 5at each of the corner portions of a cavity51in an upper mold50. Preferably, the abutting surface52abuts a lower mold54to thereby support the lead frame41in a cavity51. The first and second air vents45and46formed on the lead frame41are preferably communicated with each other with an air vent groove55provided in the upper mold50. As shown in FIG.7(B), the air vent groove55is preferably located so as to cover a portion56of the lead frame41that separates the first air vent45from the second air vent46. More specifically, the air vent groove55is preferably configured to be approximately 10 μm through 50 μm in depth from the abutting surface52. The air vent groove55preferably has a length sufficient to communicate between the first air vent45and the second air vent46, slightly overlapping the first and second air vents45and46. Like the upper mold50, it is also preferable to form an air vent groove for communicating between the first and second air vents45and46on the lower mold54.

Referring again to FIG.7(B), the air flow inside the cavity51, especially in the corner portions of the cavity51having the abutting surface52with the first and second air vents45and46formed thereon, is described below. As illustrated, at the time of plastic molding, the air and plastic that are driven towards the corner portions inside the cavity51can flow into the first air vent45. At this time, since the lead frame41is, for example, approximately 100 μm through 250 μm in thickness, the first air vent45is, for example, also approximately 100 μm through 250 μm in depth. Accordingly, not only the air inside the cavity51but also the plastic can flow into the first air vent45all together. Inside the first air vent45, the air gathers near HL2, flowing into the second air vent46via the air vent groove55provided on the upper mold50or the lower mold54. Here, the air vent groove55is formed to have, for example, approximately 30 μm through 50 μm in width. As described above, since the first air vent45is approximately 100 μm through 250 μm in depth, in reference to the first air vent45generally no unfilled volumes are formed before the plastic cutting surface that constitutes the outer peripheral surface30in most cases.

As shown in FIG.7(C), the manufacturing methods of the preferred embodiments can include that plastic is injected into the cavity51using the first air vent45even at a gate portion57. As illustrated, the gate portion57provided in the upper mold50is not formed to directly follow the cavity51, but its top portion is located on the HL2 side of the first air vent45. As shown by the arrows, this causes the plastic flowing from the gate portion57to flow into the cavity51via the first air vent45. As at the other corner portions, the abutting surface52of the upper mold50is preferably located on the upper surface of the first air vent45even at the gate portion57. As a result, on the upper surface of the outer peripheral surface30(see, e.g.,FIG. 3) formed successively to the side surfaces222and223of the insulating resin22, substantially no or no plastic burrs19A (see FIG.15(B)) are produced which are otherwise produced in the existing background structures, and the outer peripheral surface30can be formed in substantially the same or in the same plane.

That is, according to the preferred manufacturing methods, the cavity51can be substantially sealed with the abutting surface52of the molds50and54, allowing the plastic to be injected into the cavity51and the plastic and air to be exhausted out of the cavity51via the first air vent45. This structure can provide significant improvement over existing background structures that have no air vent and gate portion provided on the mold successively to the cavity. This makes it possible to form the outer peripheral surface30formed successively to the aforementioned insulating resin22generally in the same flat surface having substantially no or no recessed or projected portions due to the plastic. As described above, configuring the gate portion57in a like manner makes it possible to form the entirety of the outer peripheral surface30of the side surface of the insulating resin22generally in the same flat surface.

As shown in FIG.8andFIG. 9, using the aforementioned plastic encapsulation molds50and54allows the insulating resin22to be formed to cover the lead frame41for each mounting portion42.FIG. 8is a plan view illustrating the insulating resin22formed on the lead frame41.FIG. 9is a plan view illustrating the insulating resin22formed on the first and second air vents45and46of the mounting portion42shown in FIG.8. Using the plastic encapsulation molds50and54shown in FIGS.7(A)-7(C) can cause the plastic flowing from the cavity51to be hardened at the first air vent45, the air vent groove55, and at least part of the second air vent46. Accordingly, upon removing the package from the molds, the package is removed integrally with the lead frame41and the insulating resin22. The air inside the cavity51can escape outside from the second air vent46via the air vent groove55as shown by the arrows in FIG.7(B). The manufacturing method according to the preferred embodiments makes it possible to, e.g., remove the air in the cavity51out of the portion of the originally insulating resin22formed region as shown by the dashed line in FIG.5. As a result, an air passage having a thickness of substantially that of the lead frame41can be reliably provided in the first air vent45, forming substantially no unfilled region at the end portion of the insulating resin22. Although not illustrated, to form the recessed portion25on the reverse surface224of the insulating resin22, a projected portion corresponding to the recessed portion25can be formed on the side of the cavity51in the lower mold54.

In a fourth step, the lead frame41exposed on the insulating resin22is preferably plated.

In this step, to inhibit leads from being oxidized and for solder wettability, the lead frame41can be plated. At this time, the entire lead frame41having a plurality of mounting portions42formed thereon is preferably plated. For example, a plurality of lead frames41can be plated at a time with the lead frames41or a plating assist rack for accommodating the lead frames41being connected to the cathode electrode and with plating baths being connected to the anode electrode. At this time, prepared in the plating baths are plating solutions such as, for example, Pd, Sn, Ni, Sn—Pb, Sn—Bi, Sn—Ag, Sn—Cu, Au—Ag, and/or Sn—Ag—Cu. In addition, at least one layer of plating film can be formed on the lead frame41in combination of these plating solutions. To plate the lead frame41with a Pd solution, for example, a lead frame41that is pre-plated with Pd before plastic molding can be used.

As shown in FIG.10andFIG. 11, in a fifth step, a plurality of semiconductor devices21formed on the lead frame41are preferably cut out of the lead frame41.

FIG. 10is a plan view illustrating a lead frame from which the first and second air vent formed regions have been cut away. FIG.11(A) is a perspective view illustrating a lead frame from which the lifting leads24or the leads26are being cut away. FIG.11(B) is a plan view illustrating the securing region at the time of cutting the leads26according to some preferred embodiments. As described above, first, as shown inFIG. 9, a method for manufacturing a semiconductor device according to some preferred embodiments allows the plastic flowing out of the cavity51to be hardened in the first air vent45. This causes substantially no or no plastic burrs to be produced near the insulating resin22on the outer peripheral surface30including the lead frame41.

Since the lead frame41has a thickness, for example, of approximately 100 μm through 250 μm, the plastic flowing out of the cavity51can be hardened integrally inside the first air vent45, the air vent groove55, and the second air vent46. That is, the plastic inside the first and second air vents45and46can be extremely hardened due to the thickness of the lead frame41to cause the plastic inside the air vent groove55to be integrated together. This allows the plastic flowing out of the cavity51to be hardened at a predetermined position. As a result, upon stamping the first and second air vents45and46, it is possible to remove substantially all or all of the plastic burrs from the lead frame56between the first and second air vents45and46. In the step of cutting the portion of the lifting leads24, the lifting leads24and the plastic can be cut with the outer peripheral surface30successive to the insulating resin22being reliably secured. That is, as shown in FIG.3(A), since substantially no or no projected and recessed portions are formed due to the plastic on the outer peripheral surface30, the lifting leads24and the plastic22A can be reliably secured with support means62(see, e.g.,FIG. 11) and cut. As illustrated, the lifting leads24and the plastic22A can be cut at the immediate end of the leads26on each side with the outer peripheral surface30remaining uncut. With the lead frame41partially remaining and coupled to the first and second coupling strips43and44, the mounting portions42are not separated from the lead frame41.

Now, as shown in FIGS.11(A)-11(B), since the semiconductor device21according to some preferred embodiments is a QFN semiconductor device, the leads26are preferably cut near the boundary at which the leads26are exposed on the insulating resin22. In this step, the individual semiconductor devices21are preferably cut away from the lead frame41at the same time. As shown in FIG.11(A), the semiconductor device21having been subjected to plating can be placed on seats59and60. Then, the exposed boundary portion of the leads26in the semiconductor device21can be secured with the support means62, while the tip end portion of the leads26can be secured with support means63. The leads26can be cut with a punch64to separate the semiconductor device21from the lead frame41.

The method for manufacturing the semiconductor device according to the preferred embodiments includes that upon cutting the leads26, the punch64is stamped from the mounting surface of the semiconductor device21to cut the leads26and their peripheral plastic22A (e.g., FIGS.3(A)-3(B)). As shown in FIG.3(B), by this manufacturing method, a stamped surface32of the leads26can be formed on the side of the mounting surface of the semiconductor device21. On the other hand, burrs31of the leads26can be produced on the surface opposite to the mounting surface of the semiconductor device21. Some effects provided by this structure have been described above and are omitted here. Similar effects can also be obtained upon cutting the lifting leads24since the lifting leads24are also cut from the mounting surface. That is, the semiconductor device can include a stamped surface32formed on the mounting surface.

Furthermore, the method for manufacturing the semiconductor device according to the preferred embodiments includes that upon cutting the lifting leads24and the leads26, they are cut with the punch64with the leads26being reliably secured with the support means62. As shown in FIG.11(B), for example, a securing region65of approximately 50 μm through 200 μm, which is located near the insulating resin22after having been cut and shown by the shaded portion, can be secured with the support means62. As can be seen from the figure, the periphery of the exposed region of the lifting leads24can also be secured. At this time, as described in the third step of forming the insulating resin22, substantially no or no projected or recessed portions are formed on the outer peripheral surface30successive to the side surfaces222and223of the insulating resin22. In particular, as described above, even in the air vent formed regions47(see, e.g.,FIG. 5) substantially no or no plastic burrs are produced on the outer peripheral surface30successive to the side surfaces223of the insulating resin22. Additionally, substantially no or no plastic burrs are produced on the outer peripheral surface30even in the gate portion57(see e.g., FIGS.7(A)-7(C)) for injecting plastic therethrough. Accordingly, in preferred embodiments, the plastic burrs19A (see, e.g., FIG.15(B)), which would be otherwise produced in the background art, are substantially never or never formed in the region shown by a circle66. Thus, the securing region65located in the outer peripheral surface30would have substantially no or no projected or recessed portions present thereon due to plastic burrs and would have generally the same flat surface. As described above, with the leads26being reliably secured by the support means62, the leads26and their peripheral plastic22A can be cut. As a result, the cutting surface of plastic22A between the leads26and between the lifting leads24and the leads26can be prevented from generating microcracks. They can thus be formed in a stable and substantially constant shape. Furthermore, substantially no or no microcracks grow to be crushed in the subsequent steps of testing the properties of the semiconductor device, lapping, and mounting. In particular, in the mounting step, it is possible to realize a semiconductor device that will substantially never or never induce mounting deficiencies due to plastic particles or the like. It is also possible to improve the life cycle of the punch64. Thereafter, the semiconductor device21shown inFIG. 1can be completed.

Thus, summarizing the aforementioned steps of some preferred embodiments, in a method for manufacturing a semiconductor device according to some preferred embodiments, a lead is used having a first air vent45formed thereon across the side surfaces223on which the lifting leads24are exposed from the insulating resin22. At the first air vent45formed region, the abutting surfaces52of the molds50and54can sandwich the lifting leads24. This abutting surface52allows plastic to be injected into the cavity51and the air and plastic to be substantially exhausted from the cavity51only through the first air vent45. This allows the outer peripheral surface30formed successively to the side surfaces222and223of the insulating resin22to have generally the same plane, and substantially no or no projected or recessed portions are produced on the surface due to plastic burrs on the surface thereof. With this structure, upon cutting the lifting leads24and the leads26away from the lead frame41, the outer peripheral surface30successive to the side surfaces222,223of the insulating resin22can be reliably secured with the support means62of a cutting jig and cut. As a result, it is possible to minimize microcracks in the plastic22A of the outer peripheral surface30upon cutting, thereby minimizing mounting deficiencies of a semiconductor device21.

In some embodiments, a method for manufacturing the semiconductor device has been described in which two air vents are formed. However, the present invention is not limited thereto. For example, similar effects can be obtained with at least a first air vent formed successively to the cavity. A pre-plated lead frame can also be used to obtain similar effects. Furthermore, other various modifications can be made without deviating from the spirit and scope of the present invention.

While illustrative embodiments of the invention have been described herein, the present invention is not limited to the various preferred embodiments described herein, but includes any and all embodiments having modifications, omissions, combinations (e.g., of aspects across various embodiments), adaptations and/or alterations as would be appreciated by those in the art based on the present disclosure. The limitations in the claims are to be interpreted broadly based on the language employed in the claims and not limited to examples described in the present specification or during the prosecution of the application, which examples are to be construed as non-exclusive. For example, in the present disclosure, the term “preferably” is non-exclusive and means “preferably, but not limited to.” Means-plus-function or step-plus-function limitations will only be employed where for a specific claim limitation all of the following conditions are present in that limitation: a) “means for” or “step for” is expressly recited; b) a corresponding function is expressly recited; and c) structure, material or acts that support that structure are not recited.