Semiconductor ballistic electron velocity control structure

A semiconductor device where an emitter material composition and doping profile produces an electron gas in a base adjacent a band offset heterojunction interface, the electrons in the electron gas in the base are confined under bias by a low barrier and the ballistic carriers have their kinetic energy controlled to prevent intervalley scattering by an electrostatic barrier that under influence of bias provides an essentially level conduction band in the portion of the base adjacent the collector.

TECHNICAL FIELD 
The present invention is concerned with semiconductor devices that perform 
amplification with wide band width and switching in the speed range of the 
order of 10.sup.-12 seconds. In particular, the present invention is 
concerned with semiconductor transistors of the three terminal type. 
BACKGROUND ART 
As performance advantages in semiconductor devices are identified, the 
speed of response in achieving these devices has been limited. Efforts 
have been undertaken to reduce the dimensions of the devices and to 
increase the carrier velocity so as to reduce the transit time of the 
carriers and thereby improve the speed of response. With such efforts, 
however, have come difficulty in manufacture and serious restrictions on 
the impressed voltages. 
One particularly high-speed device known as a metal base transistor was 
reported in Proceedings of the IRE, Vol. 50, p. 1527, 1962. The device was 
composed of two Schottky barrier diodes back-to-back on a metal base. 
An improved metal base type structure appeared in the art, as is described 
in copending patent application S.N. 118,171, filed on Feb. 4, 1980, the 
disclosure of which is incorporated herein by reference, wherein a 
two-stage emitter is provided in which, in the first stage, there is a 
high density of carriers and in the second stage, which is adjacent to a 
high conductivity base, there is a low barrier. The high conductivity base 
thickness is of the order of the mean free path of an electron. 
A further development in this type of device can be found in U.S. Pat. 
application S.N. No. 371,849, filed on Apr. 26, 1982 to Solomon, 
disclosure of which is incorporated herein by reference, wherein the 
structure employs a field induced layer between two semiconductor regions 
of the same conductivity type, but of a different conductivity level to 
serve as a base region. The layer is produced by the field of the 
operating electrical bias that is applied to the device. The layer 
thickness is of the order of the mean free path of an electron so that 
ballistic-type transport is achieved. 
A most recent development in this type of device is reported in IEEE 
Electron Device Letters Vol. EDL-6, No. 4, Apr. 1985, p. 178 wherein there 
is described a structure in which a base conductivity is induced by the 
collector field. 
The structures in this type of device heretofore in the art exhibit less 
than optimum performance due to low current or voltage gain and low 
electron velocity during transit from the emitter to collector.

DISCLOSURE OF THE INVENTION 
While the invention will be described using the specific materials gallium 
arsenide (GaAs) and aluminum gallium arsenide (AlGaAs), specific n or p 
conductivity type, and specific donor or acceptor carrier type, in the 
light of the principles set forth, material, conductivity, and 
carrier-type substitutions will be readily apparent to one skilled in the 
art. 
In ballistic type devices, the carriers traverse a portion of the device, 
usually the base, while avoiding significant loss of both energy and 
velocity by various mechanisms. Such devices require an injecting emitter 
function for injecting carriers with high energy and high velocity, which 
in turn is the lowest effective mass, across a base function toward a 
collector function. The base function is used to control the number of 
carriers injected by the emitter. The collector function ideally provides 
efficient collection of the high velocity carriers injected by the emitter 
that successfully retain most of their velocity upon traversing the base. 
The most significant velocity loss mechanism of high energy electrons in 
GaAs at low temperature is intervalley scattering, which occurs in 
substantially less than 0.1 picoseconds when the electron's energy exceeds 
about 0.3 electron volts (eV). In order to maintain high velocity electron 
transport, either the electrons must transit the base in less time than is 
required for intervalley scattering which in turn would necessitate a 
total base thickness below about 10 nanometers, or the electron must be 
maintained at an energy that is below the energy for such intervalley 
scattering which is below the satellite, large effective mass conduction 
band valleys of the particular material which in this illustration is 
GaAs. 
The invention provides a number of features useful in ballistic type 
devices in various combinations as well as in combination in a three 
terminal device. 
The invention incorporates a base to emitter heterojunction where electron 
injection is controlled by a two-dimensional electron gas that occurs 
within the base near the emitter. 
A low-energy barrier is positioned between the two-dimensional electron gas 
and the collector. The barrier is incorporated to prevent the control 
charge which is the 2-D electron gas from flowing to the collector under 
bias while also being low enough to permit the high energy, high velocity 
electrons from the emitter to pass to the collector with minimal quantum 
mechanical reflection and little net velocity loss. This low energy 
barrier may be provided by compositional grading or by planar doped 
barrier means. For purposes of simplicity in communication, the 
compositional type barrier will be described. An additional doping 
produced barrier similar to the planar doped type of barrier as described 
in Electron Letters, Vol. 16, No. 22 (1980), p.836-8 is incorporated in 
the base to allow a relatively large collector to base bias to be applied 
while maintaining desirable high velocity electron transport across the 
base. 
These features permit a ballistic type device to retain the response 
advantages yet be able to operate others of its type in high-speed 
circuits. 
Referring to FIG. 1, a three terminal semiconductor structure incorporating 
the principles and features of the invention is schematically illustrated. 
The structure of FIG. 1 includes a semiconductor substrate 1, a collector 
2, a base 3, and an emitter 4. For purposes of facilitating explanation, n 
conductivity type will be used in the description with higher and lower 
conductivity being shown as + or - and i being used to indicate intrinsic. 
The substrate 1 serves the function of an ohmic contact to the collector 2 
and is connected to an external electrical connection 5. The substrate 1 
is shown schematically, can be part of a larger supporting structure not 
shown, can include a buffer layer and is n.sup.+ doped GaAs. The collector 
2 comprises the substrate 1 and an n.sup.+ GaAs epitaxial layer 6 grown on 
the substrate 1. The layer 6 is doped to about 10.sup.18 atoms/cc and is 
about 0.1 to 1.0 micron thick. 
Continuing with the structure of FIG. 1, an intrinsic or undoped GaAs layer 
7 is epitaxially grown on the n.sup.+ GaAs layer 6. This intrinsic GaAs 
layer 7 is usually about 50 to about 250 angstroms thick, and preferably 
about 100 angstroms. 
Continuing further, epitaxial with the opposite face of the intrinsic 
gallium arsenide layer 7, an epitaxial p.sup.++ GaAs layer 8 is grown. 
This p.sup.++ GaAs region 8 is about 10 to 30 angstroms thick; and 
preferably about 20 angstroms thick. The concentration of the p type 
dopant in this layer is chosen to produce a sheet charge density of 
approximately 10.sup.12 negative charges per square cm. 
Further continuing with the structure of FIG. 1 on the face of the p.sup.++ 
gallium arsenide region 8 that is opposite to layer 7 there is grown an 
intrinsic or undoped epitaxial gallium arsenide region 9 of about 800 to 
about 1200 angstroms thick, preferably about 1000 angstroms. 
Still further in FIG. 1, on the face of the intrinsic gallium arsenide 
layer 9 opposite to layer 8 is grown an intrinsic Al.sub.x Ga.sub.l-x As 
layer 10 with compositional variation such that the value of x varies from 
0.1 to 0.0 symmetrically about a midpoint. This layer 10 is about 100 
angstroms thick. 
Still continuing with the structure of FIG. 1, on the layer 10, a layer 11 
of gallium arsenide about 100 angstroms thick is grown. The layer 11 is 
substantially undoped, in that it contains no more than about 10.sup.15 
dopant atoms per cm.sup.3. 
The layer 12 of FIG. 1 is epitaxially grown on the opposite face of layer 
11 from layer 10 of undoped Al.sub.0.3 Ga.sub.0.7 As about 100 angstroms 
thick. 
The final layer of FIG. 1 is layer 13. In growing layer 13 on layer 12, a n 
type carrier concentration of about 10.sup.18 cm.sup.3 is added and in 
addition, Al component of the composition of layer 13 is gradually reduced 
to 0 or pure GaAs in a distance of about 2000 angstroms. 
In the structure of FIG. 1, layers 12 and 13 constitute the emitter 
designated as 4. 
The ohmic contact 14 to emitter 4 is made and the contact is then used to 
define the area to be etched to expose an area of layer 11 for the base 
contact. The layer is etched back to the vicinity of the GaAs layer 11 and 
an alloyed ohmic contact 15 is made to serve as the external base 
electrode. A suitable contact is an alloyed Sn contact, as disclosed in 
U.S. Pat. No. 4,379,005 to Hovel and Woodall, disclosure of which is 
incorporated herein by reference. Such an alloyed Sn contact forms a 
blocking or rectifying contact to the AlGaAs in layers 10 and 12, but an 
ohmic contact to the GaAs in layer 11. 
Although the above description refers to a combination of GaAs and AlGaAs, 
other such combinations for example are Ge and AlGaAs; Ge and GaAs; InSb 
and CdTe; GaAs and InGaAs. 
Example dopants of n-type for GaAs include silicon and tin. Example dopants 
of p-type for GaAs include beryllium and magnesium. 
The base 3 is made up of layers 7, 8, 9, 10 and 11 which in combination 
functionally provide an n.sup.+ -i-p.sup.++ -i-n.sup.+ structure. The 
structure of the invention has a number of unique features. One feature of 
the structure of this invention is that the n.sup.+ structure proximate 
the emitter is derived from the electron transfer from the doping of the 
emitter into the region 11. Another feature of the structure of this 
invention is the region 10 which acts as a barrier to electron flow from 
the base to the collector when there is bias between the emitter and the 
collector. A further feature is that under emitter to collector bias the 
planar barrier structure in the base 3 of layers 7 through 11 acts to 
maintain constant electron kinetic energy as electrons traverse through 
the base 3. 
It should be noted that in contrast to the usual base regions employed in 
structures in the art which require either doping or bias to induce 
conductivity; the emitter structure 4 in accordance with the invention 
give rise to a nearby 2-dimensional electron gas that serves as that part 
of the base providing emitter bias. 
The electrons in the doped AlGaAs layer 13 will transfer through layer 12 
into the GaAs layer 11, producing an accumulation layer 16. The means for 
providing this accumulation layer can be referred to as a conduction band 
offset means. 
The AlGaAs composition in regions 12 and 13 is selected such that in 
service as an emitter the electrons are injected into the GaAs layer 11 
with an energy nearly, but not over, that required to transfer to a 
high-effective-mass satellite conduction band valley. The electrons will 
thus have a low effective mass and, hence, a high velocity. With the 
structural features of the invention, the electrons are launched with the 
proper velocity and are caused to retain that velocity by the interrelated 
quantum mechanical elements placed in the base 3. 
A key feature of the performance of the device is a dual function of the 
base 3. First, a part of the base 3 employs a planar-doped type barrier 
structure. This type of barrier may be considered electrostatic in nature 
in that in a zero bias condition the barrier causes the Fermi level to be 
in a position that when the device is placed under operating bias, the 
Fermi level is in the optimal location. Such a barrier is of the planar 
doping type in the art where a narrow high conductivity level is 
introduced. In accordance with the invention, this type of barrier is 
constructed as layer 8 in the base 3 adjacent to the collector 2 so that 
the applied bias voltages will not cause the ballistic electrons to gain 
too much energy or they will transfer to the satellite conduction band 
valleys and slow considerably due to a large increase in their effective 
mass. Thus, a unique aspect of the invention is the quantum mechanical 
feature of the barrier that permits the ballistic electrons to have 
sufficient energy for performance but prevents acquisition of enough 
energy for intervalley scattering for appropriate biasing. 
The planar-doped barrier provided in the structure of the invention is an 
n.sup.+ -i-p.sup.++ -i-n.sup.+ structure made with i regions of unequal 
thickness and a p.sup.++ region thin enough so that there are no free 
holes. The conduction band profile through the device has a maximum at the 
p.sup.++ region which in turn forms a barrier to electron flow. In service 
in the device of the invention, the planar-doped barrier uses the 
two-dimensional electron gas 16 in the base 3 adjacent the emitter 
interface as the first n.sup.+ region. 
A second feature of the base is the low barrier that confines carriers in 
the potential well in region 16 adjacent the emitter base interface. This 
barrier is produced by layer 10 which prevents low energy electrons from 
the two dimensional electron gas from reaching the collector despite high 
emitter to collector bias. 
As a result of layer 10, a collector to base voltage rear the band gap of 
GaAs, about 1.5V, can be applied before significant conduction between the 
electron gas and the collector region occurs. 
With barriers of both electrostatic and compositional type, precise quantum 
mechanical conditions under operating bias can be produced in 
semiconductor structures. Smaller but precise barriers such as setting 
thresholds for conduction and band offset potential well confinement can 
be provided by bias independent compositional barriers and these can be 
used with higher but bias sensitive electrostatic barriers. 
BEST MODE FOR CARRYING OUT THE INVENTION 
Referring again to the drawings, dimensionally correlated graphs of the 
composition, doping and band energy at zero bias of the structure of FIG. 
1 are shown in FIG. 2. The conduction band profile of the structure of 
FIG. 1 during operation is shown in FIG. 3. 
Referring to FIG. 2, with respect to the percentage of Al introduced into 
GaAs in the emitter and for the low compositional barrier in the base is 
shown. Considering the structure as it is grown from the collector toward 
the emitter, the Al is introduced in the region 10 and in the emitter 
region 12 with grading by reduction to 0 in region 13. 
With respect to doping, again considering growth beginning with the 
collector region, the n doping in layer 6 at about 10.sup.18 atoms/cc is 
reduced to zero at the collector interface between layers 6 and 7. There 
is a growth of undoped material followed by a sharp p dopant quantity or 
spike which produce the p.sup.++ layer 8. The material then remains 
undoped during growth through layer 12 until the layer 13 is formed. 
The composition and dopant configurations as shown in FIG. 2 produce in the 
structure of FIG. 1 the energy band situation at zero bias as shown in 
FIG. 2 wherein the p.sup.++ region 8 produces a planar doped or 
electrostatic barrier in the base adjacent to the collector, and the Al 
introduction in layer 10 produces the compositional barrier. Further, the 
Al.sub.0.3 Ga.sub.0.7 As emitter region graded to GaAs in the region 13 
produces a large carrier supply in the emitter with a narrow barrier which 
provides a ballistic electron launcher or injector. Still further, the 
combination of doping and aluminum profile in the emitter acts to form the 
2-dimensional electron gas in the potential well adjacent the emitter 
interface. 
Referring next to FIG. 3 which illustrates the band energy of the device 
under the influence of operating bias voltages. The operating bias voltage 
are is such that with respect to the collector there is small positive 
bias between the emitter and base regions and a larger positive bias on 
the collector with respect to the base. 
The emitter to base bias voltage is of a polarity to inject electrons onto 
the base. The collector to base bias is sufficient to maintain a nominally 
flat conduction band profile throughout layer 9, which acts to maintain 
constant kinetic energy of electrons traversing the base region, while at 
the same time it does not affect the compositional barrier to prevent 
electrons of the electron gas in the potential well in layer 11 from 
reaching the collector. 
Thus, the present invention offers sub-picosecond response and precisely 
determined threshold or turn-on voltages. At 77 degrees Kelvin temperature 
the electron gas that forms in the base adjacent the emitter interface has 
a very high conductivity despite its about 100 angstrom width. At low 
temperatures, a large majority of the electrons injected by the emitter 
can be expected to reach the collector contact, leading to large current 
gains. 
In operation, the injected current "turns on" strongly near an emitter to 
base voltage of 0.3V and base to collector voltages near 1.5V are possible 
without limiting control of the injected current. 
One skilled in the art in fabricating a device with the specifications 
employed in this invention would conveniently select the well-known 
technique of molecular beam epitaxy (MBE) since the technique permits 
fabrication to small dimensions and the temperatures employed are not so 
high as to move the impurities significantly. The MBE technique has been 
available for a number of years and it enables one skilled in the art to 
grow in an eptiaxial manner semiconductors with thicknesses as small as 
around 20 angstroms and to produce sharp boundaries of the order of 5 
angstroms. 
The fabrication of contacts to the various electrodes is done employing 
standard photolithographic processes. 
What has been described is a semiconductor ballistic electron velocity 
control structure wherein quantum mechanical conditions are provided in 
regions of the structure that provide optimum performance conditions for 
the carriers under operating bias.