Integrated EMI shield utilizing a hybrid edge

The present embodiments and associated methods provide for an integrated EMI shield for effective shielding not only from emissions perpendicular to the integrated circuit (IC) chip carrier but also parallel (edgewise) to the carrier. In one embodiment, an IC chip carrier comprises an insulating ceramic substrate and at least one internal electrically conductive layer being a circuit ground, portions of which extend to the edge of the substrate, the internal electrically conductive layer in electrical contact with an electrically conductive layer applied to a portion of the substrate edge. This provides a horizontal hybrid ground plane which can be used as an EMI shield that runs horizontally to the chip as well as a hybrid edge EMI shield perpendicular along at least a portion of the edge. This edge shield protects internal circuitry from exterior EMI emissions directed towards the chip carrier edge portion incorporating the shield.

TECHNICAL FIELD
 The present description generally relates to hybrid circuit boards, and
 more particularly to edgewise electromagnetic interference (EMI) shielding
 utilizing an integrated peripheral EMI shield.
 BACKGROUND
 In many applications, sensitive electronic circuitry and components are
 susceptible to electromagnetic interference (EMI) emanating from other
 circuits and components. Electronics designers may incorporate EMI shields
 to isolate the sensitive circuits from the offending circuits. For
 example, in the design of implantable cardioverter defibrillators, highly
 sensitive circuitry is in very close proximity to the pulse generating
 case which is a major EMI source. Such shielding may be composed of
 electrically conductive metal, such as copper, and may be in electrical
 contact with electrical ground.
 Integrated circuit (IC) chip carriers are specialized circuit panel
 structures that are frequently used to attach IC's to circuit boards. Chip
 carriers provide high density, complex interconnections between the IC and
 the circuit board. Separately attached peripheral or edge shielding is
 used to address cross-wise EMI emissions. Such shielding may be in the
 form of conductive tape or foil. The physical size of the tape is a
 limiting factor for miniaturizing systems and the extra labor involved in
 manufacturing does not provide for an efficient manufacturing process. It
 is not mechanically efficient or desirable to have a separate component
 that takes up valuable device space and volume.
 SUMMARY
 The present embodiments and associated methods provide for an integrated
 EMI shield for effective shielding not only from emissions perpendicular
 to the integrated circuit (IC) chip carrier but also parallel (edgewise)
 to the carrier. In one embodiment, an IC chip carrier comprises an
 insulating ceramic substrate and at least one internal electrically
 conductive layer being a circuit ground, portions of which extend to the
 edge of the substrate, the internal electrically conductive layer in
 electrical contact with an electrically conductive layer applied to a
 portion of the substrate edge. This provides a horizontal hybrid ground
 plane which can be used as an EMI shield that runs horizontally to the
 chip as well as a hybrid edge EMI shield perpendicular along a portion of
 the edge. This edge shield protects internal circuitry from exterior EMI
 emissions directed towards the chip carrier edge portion incorporating the
 shield.
 In one embodiment, the method of applying the edge conductive layer
 comprises the steps of laying-up a plurality of ceramic green sheets, at
 least one green sheet having an applied electrically conductive first
 layer, applying heat and pressure to the lay-up to consolidate the green
 sheets and at least one conductive layer into a monolithic structure,
 exposing at least a portion of the conductive layer on the structure edge,
 application of metallized paste (such as that used to create the first
 conductive layer) to at least a portion of the structure edge and in
 electrical contact with the first conductive layer, applying heat and
 pressure to the structure a second time to metalize the paste and to
 create a consolidated chip carrier.
 In another embodiment, metalized paste is applied to the entire chip
 carrier edge and in electrical contact with the first conductive layer.
 The chip carrier is treated to heat and pressure a second time to
 consolidate the unit. Thus, the chip carrier has a hybrid shield which
 provides EMI shielding of internal circuits from external EMI emissions
 directed towards any part of the edge of the chip carrier.
 In another embodiment, the metalized paste is applied using a printing
 process, such as silk-screening.
 In another embodiment, the metalized paste contains molybdenum.
 In another embodiment, the metalized paste contains tungsten.
 In another embodiment, the edge EMI shield is applied via a plating process
 not requiring a second heat and pressure treatment.
 In other embodiments, where the chip carrier is made of a low-temperature
 calcined ceramic, the metalized paste may contain either Cu, Au, Ag, Al,
 Ni, Pb-Sn, among others, since the heat treatments may be conducted at a
 lower temperature.
 In another embodiment, the edge shield is applied to a printed circuit
 board.
 In another embodiment, the edge shield is applied to a printed wiring
 board.
 This summary is a brief overview of some embodiments of an integrated EMI
 shield utilizing a hybrid edge and methods of use and is not intended to
 be exclusive or limiting and the scope of the invention is provided by the
 attached claims and their equivalents.

DETAILED DESCRIPTION
 In the following detailed description, reference is made to the
 accompanying drawings, which are not necessarily to scale, which form a
 part hereof, and in which is shown by way of illustrating specific
 embodiments in which the device may be practiced. These embodiments are
 described in sufficient detail to enable those skilled in the art to
 practice the device, and it is to be understood that the embodiments may
 be combined, or that other embodiments may be utilized and that structural
 changes may be made without departing from the spirit and scope. The
 following detailed description is, therefore, not to be taken in a
 limiting sense, and the scope is defined by the appended claims and their
 equivalents. In the drawings, like numerals describe substantially similar
 components throughout the several views.
 The present embodiments and methods will be described in applications
 involving ceramic IC chip carriers. However, it is understood that the
 present apparatus and methods may be employed in other single or
 multi-layer wiring board applications.
 The basic components of a chip carrier is a multi-layer integrated
 structure of electrically insulating ceramic sheets upon which a network
 of electrically conductive network or "paths" are placed. The pre-fired
 (green) ceramic sheet is produced by casting a thin layer of ceramic
 material onto a flexible sheet which is allowed to dry. The ceramic
 material is typically alumina powder in an organic binder, solvents,
 plastifiers, and resins. After drying, the ceramic film is stripped from
 its substrate and allowed to release the volatile components. The green
 ceramic film is then cut into desired dimensions. Sheets may be made large
 enough to produce a number of chip carriers after a final cutting or
 sawing procedure is performed on the post-fired unit.
 FIG. 1 illustrates an embodiment of a ceramic green sheet 100.
 Through-holes 110 are punched or cut in the green sheets 100 at
 predetermined locations which are subsequently filled with metalized paste
 to provide electric interconnections between the metallized patterns or
 networks which will be applied to the various green sheets 100. Additional
 through-holes 112 may be punched or cut into the green sheet 100 to
 provide what would later become a cavity into which IC chips or other
 circuits are placed.
 FIG. 2 illustrates a green sheet 200 with applied conductive metalized
 paste 220. The conductive metallized paste 220 is deposited on the green
 sheet 200 by printing methods such as silk-screening through a mask. The
 conductive paste 220 materials consist of a mixture of metal and alumina
 particles and a solvent/binder. The metal particles are of a refractory
 and/or noble metal, such as molybdenum or tungsten.
 FIG. 3 illustrates an embodiment of a multi-layer green sheet stack 314.
 Several green sheets 300 with corresponding metalized conductive paths
 (not shown) are stacked together in such a way as to ensure that all
 conductive paths are established. The stacking of non-filled through-holes
 provides a cavity 318 for accepting IC or other circuits. The multi-layer
 stack 314 is laminated at sufficient pressure and temperature to cause the
 binder to evaporate and provide good intersheet bonding. A monolithic
 structure is thus obtained which is then sintered at the temperature
 required to fire the ceramic, thereby eliminating the organic components
 of the pastes and converting the conductive metalized paste to the metal
 state. Exposed though-holes filled with metalized paste provide electrical
 attachment pads 322 for attaching IC leads.
 FIG. 4 illustrates a top view of an embodiment a post-fired pre-sawn sheet
 414 of chip carriers 416. Individual chip carriers 416 are sawed or cut
 from this monolithic structure 414.
 FIG. 5 illustrates various views of an embodiment of chip carrier 530. FIG.
 5A is a top view of one embodiment of a chip carrier. IC chip carriers 530
 may incorporate a cavity 518 that holds integrated circuit chips or other
 circuits. FIG. 5C illustrates the chip carrier 530 cross-section showing
 the staircase-shaped steps 550 of cavity 518. Other cavities may not have
 this structure as is illustrated by a second cavity 519. As shown in FIG.
 5A, patterned electrical conductors terminating in bonding pads 522 lie on
 the surfaces of the ceramic layers and on the steps 550 of cavity 518. The
 bonding pads 522 on the cavity steps 550 are connected to an integrated
 circuit (not shown) through either bonding pads or individual wire leads
 on the IC to carry signals to and from the chip.
 FIG. 5B shows an edge view of an embodiment of chip carrier 530 having
 portions of an electrically conductive layer, in this case a hybrid
 horizontal ground plane (HHGP) 524, exposed on the edge of the chip
 carrier 530. Portions of the HHGP 524 may be exposed as an engineered
 feature of the unit, or as a consequence of having sawed through portions
 of the HHGP 524 during the sawing process.
 In one embodiment, metalized paste (such as that used to create the HHGP
 524 itself) is applied to a portion of the edge 532 of the chip carrier
 530 and in electrical contact with the HHGP 524. The chip carrier 530 is
 then sintered a second time to metalize the paste forming the integrated
 hybrid edge EMI shield and to create a consolidated unit.
 FIG. 6A and 6B shows, respectively, a top and edge view of an embodiment of
 chip carrier 630 incorporating an integrated hybrid edge EMI shield 626.
 This embodiment provides an edge shield 626 that shields circuitry that is
 internally mounted in cavities 618 and 619 from external EMI emissions
 directed towards the portion of the chip carrier edge 632 incorporating
 the shield 626.
 A subsequent manufacturing step may be used where copper is introduced to
 the conductive paths through capillary action to fill any voids and
 provide a solid conduction path. The exposed interconnect pads 622 are
 then plated or coated with another metal layer, preferably a noble metal
 such as Pt, Pd, Au, or Ag, to provide an oxide-free surface to attach IC
 or other component leads.
 Other subsequent manufacturing steps may be performed to create the final
 chip carrier. In some cases, a thick-film conductor, a thick-film
 resistor, glass and the like, are printed and baked repetitively on one or
 more surfaces of the multilayered substrate.
 FIG. 7 illustrates a cross section of an embodiment of a chip carrier 730
 incorporating an integrated hybrid edge EMI shield 726. The chip carrier
 730 incorporates conduction paths 728 to allow electrical communication of
 the IC 740 to an external device, such as a circuit board (not shown). The
 IC 740 is in electrical communication with the conduction paths 728
 through either wire bonding leads 742 or conduction pads on the IC 740
 itself (not shown). The integrated hybrid edge EMI shield 726 is
 electrically connected with the integrated hybrid horizontal ground plane
 724, both of which may act as an EMI shield. This embodiment provides an
 EMI shield that shields circuitry that is internally mounted in cavities
 718 and 719 from external EMI emissions directed towards the portion of
 the chip carrier edge incorporating the shield 726 and the chip carrier
 side incorporating the hybrid horizontal ground plane 724.
 Chip carriers made from alumina ceramic green sheets are baked at a
 temperature of a thousand and several hundred degrees with the application
 of pressure, thereby to obtain a multi-layered consolidated ceramic
 substrate. In order to withstand these high temperatures, the conductive
 paste material has to be composed of a refractory metal such as tungsten
 or molybdenum. In order to incorporate the integrated hybrid EMI edge
 shield, the edge shield must also be able to withstand these high
 temperatures while the chip carrier undergoes the second firing at similar
 temperatures. Therefore, the edge shield must also be composed of a
 refractory metal.
 Alternatively, low calcined temperature ceramic substrate materials, such
 as glass or composite glass-ceramic, may be used instead of the alumina
 for the green sheets. This allows for the use of lower melting point
 metals such as Ag, Au, Ag--Pd, and Cu for the metalized layers. This would
 allow the EMI shield to be composed of these metals also. The preparation
 method is the same as that in the case of alumina.
 It is to be understood that the above description is intended to be
 illustrative, and not restrictive. Many other embodiments will be apparent
 to those of skill in the art upon reviewing the above description. The
 scope of the invention should, therefore, be determined with reference to
 the appended claims, along with the full scope of equivalents to which
 such claims are entitled.