Apparatus and methods for reducing glitches in digital step attenuators

Apparatus and methods for reducing glitches in digital step attenuators are disclosed. By configuring a multi-bit DSA such that an attenuation control block changes a plurality of control signals in a manner sequencing individual switches of the DSA, glitches can be reduced and RF signal behavior can be enhanced. The sequence, based upon a unit time delay, causes the transient attenuation value to be bounded between a minimum and maximum and can improve settling time.

BACKGROUND

Field

Embodiments of the invention relate to electronic systems, and more particularly, to digital step attenuators.

Description of the Related Technology

Digital step attenuators (DSA) frequently include attenuator units and switches to selectively adjust the attenuation level. A control unit can provide control signals to control the state of the switches, on state or off state, which in turn control the state of the attenuator units, insertion state or attenuation state.

In one example, a control unit provides control signals to change the state of switches of a DSA to increase the impedance and thereby increase the total attenuation.

In another example, a control unit provides control signals to change the state of switches of a DSA to decrease the impedance and thereby decrease the total attenuation.

SUMMARY

In one embodiment an attenuator component includes a plurality of attenuator units that have an input and an output and are connected together. The plurality of attenuator units each have an attenuation state, wherein an input signal is attenuated between the input and the output by a unit attenuation value, and an insertion state, wherein the input signal is provided to the output without being attenuated by the attenuation value. The plurality of attenuator units are connected so that the attenuator component defines a range of attenuation values determined by the sum of the plurality of unit attenuation values.

The attenuator component further includes a control unit that provides control signals to the plurality of attenuation units so as to provide a selected attenuation level of the attenuation component for a particular input signal. The control signal has, for at least some changes of the attenuation levels, a predetermined sequence of changing attenuation units between the insertion state and the attenuation state, so that the transient glitches of the attenuator component is maintained within a pre-selected range when the attenuation level is transitioning between a first level and a second level. The control unit provides the control signals to the plurality of attenuation units to achieve selected attenuation level for the attenuation component according to the sequence when transitioning between the first level and the second level.

According to some embodiments, the sequence of attenuation values comprise a timing sequence by which the individual attenuation units are switched between the first and second attenuation levels at time intervals that maintains the overshoot and the undershoot of the selected attenuation level within a pre-defined range. The control unit can have a plurality of stored timing sequences for a plurality of changes from one selected attenuation level to another to control the timing of the change of individual attenuation units. The control unit can include a plurality of look up tables that have the timing sequences.

In another embodiment the attenuator units include a first series switch with an associated resistance and a shunt switch wherein the first series switch is closed to provide the attenuation state and the shunt switch is closed to provide the insertion state. At least some of the attenuator units include a second series switch and associated resistor that is configured during transitioning between the first and second attenuation level so as to maintain the transient glitches occurring during the transition of the attenuation state of the at least some of the attenuation units are reduced by the resistor associated with the second series switch.

According to one embodiment the plurality of attenuator units each comprise an attenuation network selected from the group consisting of T-type networks, hybrid-T networks, and pi-type networks.

In another embodiment the attenuator units include switchable components that receive control signals from the control unit that switch the unit between the attenuation state and the insertion state. The timing sequence can include a unit time value T and can comprise a table of delays for each of the switchable components in the attenuators, wherein the table of delays determine the timing of the delivery of the control signals as a function of the unit time value T.

In one embodiment an attenuator component includes a plurality of attenuator units that have an input and an output and are connected together. The plurality of attenuator units can each have an attenuation state wherein an input signal is attenuated between the input and the output by a unit attenuation value and an insertion state wherein the input signal is provided to the output without being attenuated by the attenuation value. The plurality of attenuator units can be connected so that the attenuator component defines a range of attenuation values determined by the sum of the plurality of unit attenuation values, and at least some of the attenuator units can include an intermediate switching component.

The attenuator component further includes a control unit that provides control signals to the plurality of attenuation units so as to provide a selected attenuation level of the attenuation component for a particular input signal. The control signals can have, for at least some of the attenuation levels, an intermediate control signal that implements the intermediate switching component during transition of the attenuator unit between the attenuation state and the insertion state such that transient glitch of the attenuator unit during the transition is maintained within a preselected range. In another embodiment the control unit provides control signals to the plurality of attenuation units so as to provide a selected attenuation level of the attenuation component for a particular input signal. The control signal has, for at least some of the changes of attenuation levels, a predetermined sequence of changing attenuation units between the insertion state and the attenuation state, so that the transient glitches of the attenuator component is maintained within a pre-selected range when the attenuation level is transitioning between a first level and a second level. And the control unit provides the control signals to the plurality of attenuation units to achieve the selected attenuation level for the attenuation component according to the sequence when transitioning between the first level and the second level.

In one embodiment the sequence of attenuation values comprise a timing sequence by which the individual attenuation units are switched between the first and second attenuation levels at time intervals that maintain the overshoot and the undershoot of the selected attenuation level within a pre-defined range. The control unit can have a plurality of stored timing sequences for a plurality of changes from one selected attenuation level to another to control the timing of the change of individual attenuation units. The control unit can include a plurality of look up tables that have the timing sequences.

In another embodiment each of the attenuator units includes a first series switch with an associated resistance and a shunt switch wherein the first series switch is closed to provide the attenuation state and the shunt switch is closed to provide the insertion state. At least some of the attenuator units can include a second series switch and associated resistor that comprise the intermediate switching component that is configured during transitioning between the first and second attenuation level so as to maintain the transient glitches occurring during the transition of the attenuation state of the at least some of the attenuation units are reduced by the resistor associated with the second series switch.

In another aspect of this disclosure, a method of transitioning between different attenuation levels in an attenuation component having a plurality of attenuation units is provided. The method includes determining for a plurality of different attenuation level changes a timing sequence of activation of the plurality of attenuation units to transition the attenuation units between insertion and attenuation to transition from one attenuation level to another attention level that maintains transient glitch during transition between attenuation levels within a preselected range. The method also includes determining a desired change between attenuation levels; and the method includes providing control signals to the attenuation units according to the previously determined timing sequence of activation of the attenuation units to transition to the desired change between attenuation levels.

In another embodiment of the method, the sequences can comprise timing sequences of the delivery of control signals. The control signals can be provided after they are retrieved from a look up table.

In another embodiment the method can comprise transitioning one or more of the attenuator units into an intermediate state during transition between attenuation and insertion to reduce glitch transients during transition. The one or more attenuator units can include a switch resistance that is activated to reduce the transients during a time period of transition between attenuation and insertion, and the switch resistance can be deactivated once the transition is complete.

DETAILED DESCRIPTION OF EMBODIMENTS

A digital step attenuator (DSA) can have a series cascaded array of attenuation units each providing a linear amount of attenuation expressed in decibels (dB) and each contributing to the total attenuation of the series array. The attenuation units can each include series and shunt switches with an attenuation network, such as hybrid-T networks, and the switches can either electrically couple the attenuation network to contribute to the total attenuation in an attenuation state or electrically bypass the attenuation network to not contribute in an insertion state. In addition, each attenuation unit can have a binary weighted bit of attenuation such as 8 dB, 4 dB, 2 dB, and 1 dB. In this manner each attenuation unit can also be referred to as an attenuation bit.

The series and shunt switches of an attenuation unit can receive control signals to control the state, insertion or attenuation, of the attenuation unit. For instance, it can be desirable to increase or decrease the amount of attenuation based upon an RF signal's power level. The DSA can attenuate an RF signal to protect RF components such as low-noise or power amplifiers. In these cases the DSA, placed before the sensitive RF components in the signal path, can protect the sensitive component by attenuating the power of the RF signal to a safe level.

However, when more than one attenuation unit changes state, there is a transition period during which the total attenuation of the DSA can change in an unpredictable manner; when the total attenuation during the transient, referred to as transient attenuation, becomes lower than the final attenuation value following the transient, then an RF signal can undergo a transient overshoot. The transient overshoot can cause an RF signal at the output of the attenuator to momentarily exceed a safe power level of an input component at the output of the attenuator and to potentially damage circuit components. Alternatively, when the transient attenuation becomes higher than the final attenuation value, then an RF signal can undergo a transient undershoot. While transient undershoot does not necessarily lead to an unsafe power level, it does cause a glitch.

In general both transient undershoot and transient overshoot cause distortion in the RF signal and are categorized as glitches. Also, an RF signal experiencing glitches due to a transient undershoot or overshoot can also experience reflections and return loss due to mismatches of attenuator impedance with the system impedance. For instance, the transient attenuation is a result of the DSA impedance undergoing a transient change in impedance, referred to as transient impedance. If the transient impedance does not match the signal path impedance, then there can be RF reflections which give rise to poor RF signal behavior and return loss.

Accordingly, limitations in the control of DSA switches can lead to transient glitches and poor RF signals; and glitches and RF signal return loss can be unacceptable for certain applications and/or systems.

Provided herein are apparatus and methods for reducing glitches in digital step attenuators (DSAs). In certain configurations, glitches, representing both undershoot and overshoot, can be reduced by sequentially controlling individual switches of a DSA. The control sequence can further be based upon a priori values of the initial and final attenuation, and additional switches can intentionally be added to certain attenuation units to enhance the control of the transient attenuation. For instance, a DSA control unit can determine, based upon the final attenuation and the initial attenuation values, a transient sequence for each switch within the DSA; and the switch sequence can be selected so that the DSA is treated as a network of switched impedances rather than a cascade of attenuation units. In this manner glitches and RF return loss are better controlled during the transient.

FIG. 1is a system level diagram of an RF system100including digital switched attenuators (DSAs). Baseband I/Q signals derived from the baseband system block102are modulated within the I/Q modulator block104and follow a forward signal path through a digital step attenuator (DSA)106, a filter108, a power amplifier (PA)110into a switches block112. The switches block112can pass the signal to the RF antenna114.

InFIG. 1the switches block112can also pass a received RF signal from antenna114along the return signal path through the low noise amplifier116, the DSA118, and into the I/Q demodulator120, which provides demodulated I/Q signals to the baseband system block102.

The digital step attenuators DSA106and DSA118can receive control signals to change the amount of attenuation in the forward and return signal paths. Both DSA106and DSA118can include attenuation units, also referred to as attenuation bits, which receive control signals to control the amount of attenuation in the signal path. For instance, the forward path DSA106can attenuate signals from the I/Q modulator block104before they reach the filter108so as to protect input components of both the filter108and power amplifier (PA)110. Similarly, the return path DSA118can attenuate the output signals from the LNA116so as to protect sensitive components within the I/Q demodulator120.

FIG. 2is a schematic diagram of a multi-bit DSA system200according to one embodiment of the invention. The multi-bit DSA system200includes six series connected attenuation units, also referred to as bits: a 0.5 dB unit210, a 1 dB unit220, a 2 dB unit230, a 4 dB unit240, an 8 dB unit250, and a 16 dB unit260. The six attenuation units are series connected to form a cascade between the input (IN) and output (OUT) with an input terminal of the 16 dB unit260operating as the input (IN) of the DSA and an output terminal of the 0.5 dB unit operating as the output (OUT). The cascade series connection between the input (IN) and output (OUT) is further detailed as follows: an output terminal of the 16 dB unit260is electrically connected to an input terminal of the 8 dB unit250; an output terminal of the 8 dB unit250is electrically connected to an input terminal of the 4 dB unit240; an output terminal of the 4 dB unit240is electrically connected to an input terminal of the 2 dB unit230; an output terminal of the 2 dB unit230is electrically connected to an input terminal of the 1 dB unit220; and an output terminal of the 1 dB unit220is electrically connected to an input terminal of the 0.5 dB unit210.

The multi-bit DSA system200also includes an attenuation control block202to provide a plurality of control signals: control signals C0and C0_ito the 0.5 dB unit210; C1and C1_ito the 1 dB unit220; C2and C2_ito the 2 dB unit230; C4and C4_ito the 4 dB unit240; C8and C8_ito the 8 dB unit250; C12and C12_ito the 16 dB unit260. In this embodiment the bits having larger attenuation values, namely the 4 dB unit240, the 8 dB unit250, and the 16 dB unit260, can also receive additional control signals. In addition to receiving the control signals C4and C4_i, the 4 dB unit240also receives an additional C4_xcontrol signal. Similarly, the 8 dB unit250receives an additional C8_xcontrol signal; and the 16 dB unit260receives an additional C12_xcontrol signal. The additional control signals, C4_x, C8_x, and C12_xcan offer an additional degree of freedom in controlling the transient attenuation, which in turn, offers an additional degree of freedom in controlling glitches.

Glitches can be reduced by sequentially transitioning control signals. In determining a sequence, the multi-bit DSA200can be treated as a network of switches and impedances, and the goal of the sequence can be to transition switches in a way which causes the transient impedance between the input (IN) and the output (OUT) to be well controlled and confined by mathematical constraints. The DSA200can be divided into smaller sections such as a four bit DSA201, as delineated inFIG. 2. It has been empirically determined that a practical approach to determine a sequence can be to treat a smaller subsection, such as the four bit DSA201, and to perform calculations and simulations on just the smaller subsection. In this way only the impedance between the input (VI) and (OUT) of the four bit DSA201needs to be considered and the calculations for determining the sequence become simplified.

FIG. 3shows the output waveforms of an RF signal having large glitches compared to an RF signal having reduced glitches in one embodiment of the invention. The attenuation control block202initiates a change at time t1to cause the multi-bit DSA200to transition from having a first steady state attenuation value of ATT_init to having a second steady state attenuation value of ATT_fin. In the top waveform ofFIG. 3, the control unit202provides control signals in an abrupt manner causing the multi-bit DSA to have a transient attenuation value causing an initial glitch undershoot and then causing a glitch overshoot. Following the overshoot the RF signal settles to its second steady attenuation value around time t3.

The bottom waveform ofFIG. 3shows a better waveform in that the glitches are reduced during the transient, and the signal settles at a time t2less than t3. In this waveform, the control unit better controls the transient attenuation value by preventing the initial undershoot and by keeping the transient attenuation value bounded between the attenuation boundaries of ATT_min and ATT_max.

By configuring a multi-bit DSA such that an attenuation control block sequentially changes a plurality of control signals in a manner controlling a series cascade of attenuation units to have a transient attenuation bounded between two levels, ATT_min and ATT_max, glitches can be reduced and eliminated. In these teachings a multi-bit DSA like that of the multi-bit DSA200ofFIG. 2can be treated as a resistive network instead of a series of attenuation units and the attenuation control block202can transition the resistive network so that the resistance changes sequentially. The attenuation control block202can further provide signals which sequentially change the network resistance according to a discrete time or delay-time based sequence. The delay-time based sequence can be based upon quasi-state criteria; for instance, the resistance can be constrained to be bounded in a way that keeps the attenuation between ATT_min and ATT_max.

FIG. 4is a schematic diagram of showing a four-bit DSA201from the multi-bit DSA system200according to another embodiment of the invention. In this configuration the multi-bit DSA system200can be configured such that an RF signal VI is received at the input of the 4 dB unit240.FIG. 4further details each attenuation unit210-240. The 0.5 dB unit210includes a first unit terminal and a second unit terminal. The 0.5 dB unit210also includes an attenuation network414which can provide 0.5 dB of attenuation and which has a first network terminal electrically connected to the first unit terminal of the 0.5 dB unit210, a second network terminal electrically connected to the second unit terminal of the 0.5 dB unit210, and a third network terminal. The 0.5 dB unit210includes a first switch412having a first switch terminal electrically connected to the second unit terminal of the 0.5 dB unit210, a second switch terminal electrically connected to the first unit terminal of the 0.5 dB unit210, and a control terminal configured to receive the control signal C0from the attenuation control block202. The 0.5 dB unit210also includes a second switch416having a first switch terminal electrically connected to the third network terminal of the attenuation network214, a second switch terminal electrically connected to ground, and a control terminal configured to receive the control signal C0_ifrom the attenuation control block202.

The 0.5 dB unit210can receive control signals C0and C0_isuch that in the first state the second switch416is closed and electrically couples the third network terminal of the attenuation network414to ground while the first switch412is open and does not electrically couple the first and second unit terminals of the 0.5 dB unit210. In this way the attenuation network414can provide 0.5 dB of attenuation between the first and second unit terminals of the 0.5 dB unit210. In the second state the second switch416is open and does not electrically couple the third network terminal of the attenuation network414to ground while the first switch412is closed and electrically couples the first and second unit terminals of the 0.5 dB unit210. In this way the first switch412can pass an RF signal such that it is not attenuated by the attenuation network414. In this configuration the second state of the 0.5 dB unit210is an insertion state.

Except for labelling and the amount of attenuation, the description of the 1 dB unit220and the 2 dB unit230is similar to that of the 0.5 dB unit210above. The 4 dB unit240is also similar except it includes a third switch447electrically connected between a second switch446and ground. In particular, the third switch element447has a first switch terminal electrically connected to the second switch terminal of the second switch446, a second switch terminal electrically connected to ground, and a control terminal configured to receive the control signal C4_xfrom the attenuation control block202In addition, a first bypass resistor RS445is electrically connected between the first and second switch terminals of the third switch447.

In a steady state condition where the 4 dB unit operates in its first state or second state, the third switch447and the second switch446can perform the same function as a single switch. For instance, in the first state the 4 dB unit240can receive control the signals C4, C4_i, and C4_xsuch that in the first state the second switch446and the third switch447are closed and electrically couple the third network terminal of the attenuation network444to ground while the first switch442is open and does not electrically couple the first and second unit terminals of the first 4 dB unit240. In this way the attenuation network444can provide 4.0 dB of attenuation between the first and second unit terminals of the first 4 dB unit240. In the second state the second switch446and the third switch447are open and do not electrically couple the third network terminal of the attenuation network444to ground while the first switch442is closed and electrically couples the first and second unit terminals of the first 4 dB unit240. In this way the first switch442can pass an RF signal such that it is not attenuated by the attenuation network444. In this configuration the second state of the first 4 dB unit940is an insertion state. Thus, the addition of the third switch447, the new control signal C4_x, and the first bypass resistor RS445, does not affect the steady state attenuation. It can however, offer a way to control the transient attenuation.

The third switch447with the control signal C4_xcan provide an additional degree of freedom to control the transient attenuation of the 4 dB unit240. For instance, the control signals C4, C4_i, and C4_xcan effect a change from the first state to the second state by causing the third switch447to open prior to causing the second switch446to open. In this case, the 4 dB unit240has a transient attenuation determined by the first bypass resistor RS445electrically coupled to the attenuation network444. As seen fromFIG. 4, the source of coupling between the first bypass resistor and the 4 dB attenuation network444is the closed second switch446; and once the control signal C4_icauses the second switch446to open, the 4 dB attenuation network444becomes decoupled from the first bypass resistor RS445. Also, by way of example, the control signals C4, C4_i, and C4_xcan effect a change from the second state to the first state by causing the third switch447to close after causing the second switch446to open. In this way, the 4 dB unit240again has a transient attenuation determined by the first bypass resistor coupled to the attenuation network444. Once the third switch447closes, the bypass resistor RS445is electrically shorted by the third switch447.

FIG. 5Ais a schematic diagram of the 1 dB unit220for realizing a DSA bit according to one embodiment of the invention. As shown an attenuation network424includes a first resistor502aelectrically connected between the first network terminal of the attenuation network424and a center terminal, a second resistor504aelectrically connected between the second network terminal of the attenuation network424and the center terminal, and a third resistor506aelectrically connected between the center tap and the third network terminal of the attenuation network424. The first-third resistors502a-506aform a T-type network and can attenuate an RF signal between the first and the second network terminals of the attenuation network424. In particular to the 1 dB unit220, the resistors can attenuate an RF signal in the amount of 1 dB and can be balanced to known impedance. While this schematic provides general circuit detail without specifying resistor values to one embodiment of the attenuation network424, this schematic can also apply to the construction of the attenuation networks of each of the attenuation units210-260. Furthermore, the construction of attenuation networks should be common knowledge to those skilled in the art of RF systems having digital step attenuators.

FIG. 5Bis a schematic diagram of the 1 dB unit220for realizing a DSA bit according to another embodiment of the invention. Here the attenuation network424includes a first resistor512aelectrically connected between the first network terminal of the attenuation network424and a center terminal, a second resistor514aelectrically connected between the second network terminal of the attenuation network424and the center terminal, a third resistor516aelectrically connected between the center tap and the third network terminal of the attenuation network424, and a fourth resistor518aelectrically connected between the first and second network terminals of the attenuation network424. The first-fourth resistors512a-518aform a hybrid-T network and can attenuate an RF signal between the first and the second network terminals of the attenuation network424. In particular to the 1 dB unit220, the resistors can attenuate an RF signal in the amount of 1 dB and can be balanced to known impedance. While this schematic provides general circuit detail without specifying resistor values to one embodiment of the attenuation network424, this schematic can also apply to the construction of the attenuation networks of each of the attenuation units210-260. Furthermore, the construction of attenuation networks should be common knowledge to those skilled in the art of RF systems having digital step attenuators.

FIG. 4Cis a schematic diagram of the 1 dB unit220for realizing a DSA bit according to another embodiment of the invention having an attenuation network524. Similar to the attenuation network424, the attenuation network524includes a first network terminal electrically connected to the first unit terminal of the 1 dB unit220, a second network terminal electrically connected to the second unit terminal of the 1 dB unit220, and a third network terminal electrically connected to the first switch terminal of a second switch426a. In contrast to the attenuation network424, the attenuation network524further includes a fourth network terminal which is electrically connected to a first switch terminal of a third switch426bof the 1 dB unit220. The second switch terminal of the third switch426bis electrically connected to ground. The attenuation network524further includes a first resistor522aelectrically connected between the first and second network terminals of the attenuation network524, a second resistor526aelectrically connected between the first and third network terminals of the attenuation network524, and a third resistor528aelectrically connected between the second and fourth network terminals of the attenuation network524. The first-third resistors522a-528aform a pi-type network and can attenuate an RF signal between the first and the second network terminals of the attenuation network524. In particular to the 1 dB unit220, the resistors can attenuate an RF signal in the amount of 1 dB and can be balanced to known impedance. Also, the third switch426bfurther includes a control terminal configured to receive the control signal C1_i.

As illustrated in the configuration ofFIG. 5C, the third switch426bof the 1 dB unit220can operate in parallel with the second switch426aof the 1 dB unit220. Furthermore, the operation of the 1 dB unit220ofFIG. 5Cin the first and second state can be equivalent to the operation of the 1 dB unit220of previous figures and reference can be made to the discussions for the previous figures. Also, while this schematic provides general circuit detail without specifying resistor values to one embodiment of the attenuation network524, this schematic can also apply to the construction of the attenuation networks of each of the attenuation units210-260. Furthermore, the construction of attenuation networks should be common knowledge to those skilled in the art of RF systems having digital step attenuators.

FIG. 6is a schematic diagram of the four-bit DSA system201using FETs as switches according to another embodiment of the invention. In the illustrated configuration the 0.5 dB unit210includes the following: a first FET612having a drain connected to the second unit terminal of the 0.5 dB unit210, a source connected to the first unit terminal of the 0.5 dB unit210, and a gate configured to receive the control signal C0; and a second FET616having a drain connected to the third unit terminal of the 0.5 dB unit210, a source connected to ground, and a gate configured to receive the control signal C0_i. The 1 dB unit220includes the following: a first FET622having a drain connected to the second unit terminal of the 1 dB unit220, a source connected to the first unit terminal of the 1 dB unit220, and a gate configured to receive the control signal C1; and a second FET626having a drain connected to the third unit terminal of the 1 dB unit220, a source connected to ground, and a gate configured to receive the control signal C1_i. The 2 dB unit230includes the following: a first FET632having a drain connected to the second unit terminal of the 2 dB unit230, a source connected to the first unit terminal of the 2 dB unit230, and a gate configured to receive the control signal C2; and a second FET636having a drain connected to the third unit terminal of the 2 dB unit230, a source connected to ground, and a gate configured to receive the control signal C2_i. The 4 dB unit240includes the following: a first FET642having a drain connected to the second unit terminal of the 4 dB unit240, a source connected to the first unit terminal of the 4 dB unit240, and a gate configured to receive the control signal C4; a second FET646having a drain connected to the third unit terminal of the 4 dB unit240, a source, and a gate configured to receive the control signal C4_i; and a third FET647having a drain connected to the source of the second FET646, a source connected to ground, and a gate configured to receive the control signal C4_x. In addition, a first bypass resistor RS445is electrically connected between the source and drain of the third FET647.

The operation of the first FET612and the second FET616is analogous to the operation of the first switch412and the second switch416of the four-bit DSA system201ofFIG. 4. When the first FET612and the second FET616are N-channel devices, then each can operate as a closed switch when the control signals C0_iand C0force a high voltage. Conversely, each can operate as an open switch when the control signals C0_iand C0force a low voltage. For instance, the signals C0and C0_ican be voltages such that in the first state the second FET616operates with low drain-to-source impedance so as to electrically couple the third network terminal of the attenuation network414to ground while the first FET612operates with high drain-to-source impedance so as to not electrically couple the first and second unit terminals of the 0.5 dB unit210. In this way the attenuation network414can provide 0.5 dB of attenuation between the first and second unit terminals of the 0.5 dB unit414. In the second state the second FET616operates with high drain-to-source impedance so as to not electrically couple the third network terminal of the attenuation network414to ground while the first FET612operates with low drain-to-source impedance so as to electrically couple the first and second unit terminals of the 0.5 dB unit210. In this way the first FET612can pass an RF signal such that it is not attenuated by the attenuation network414. In this configuration the second state of the 0.5 dB unit210is an insertion state.

Controlling FET's with voltages is well known to those practiced in the art of electrical engineering and DSA design, and embodiments should be clear to those who design switches and control units.

InFIG. 6the discussion relating to the operation of the first FET612and the second FET616as switches also applies to each FET of the four-bit DSA201, and the description of how the switches function can be found in the discussion relating to the four-bit DSA201ofFIG. 4.

Also, inFIG. 6each of the FETs612-647can be either N-channel or P-channel and the control signals C0, C0_i, C1, C1_i, C2, C2_i, C4, C4_i, C4_xcan be voltage signals appropriate to the type of FET, either N-channel or P-channel.

FIG. 7Ais a delay table for a switch control sequence of a multi-bit DSA system according to one embodiment of the invention. In this example a multi-bit DSA similar to that of multi-bit DSA200transitions the control signals based upon a unit delay time Λ equal to 17 nsec. The left column shows the control signal and the right column shows the calculated or estimated delay time given by multiples of the unit delay time. The control unit202can use and derive values such as those given inFIG. 7A, or it can use a system which calculates the delay times based upon real-time measurements and calculations. Other techniques for deriving the control signal delay time can include using a digital signal processor within a feedback system.FIG. 7Acan apply to a case where the multi-bit DSA200changes from 4 dB to 3.5 dB and must settle within 400 ns. Having this sequence, an RF signal can be controlled during the above transient to have a maximum ripple of 0.7 dB. It can also be controlled so that an output RF signal initially increases without an initial undershoot. The last control signal to control a switch to change state is C2which transitions at the max delay time of 14 times the unit delay time (238 ns).

FIG. 7Bis another delay table for a switch control sequence of a multi-bit DSA system according to one embodiment of the invention. This case can also apply to the multi-bit DSA200; however, now the control unit202is configured to effect a change from 3.5 dB to 4.0 dB, and the table ofFIG. 7Bdiffers from that ofFIG. 7A. Because the second attenuation value in the steady state is greater than the first attenuation value, the control sequence is calculated to satisfy different criteria. For instance the control signals are sequenced to prevent an initial undershoot of the RF output signal rather than an initial overshoot. Comparison of the columns ofFIGS. 7A and 7Bshows the control sequence can depend greatly on the first attenuation value and the second attenuation value. In general the control sequence for increasing to a larger second attenuation value can be different from a control sequence for decreasing to a smaller second attenuation value.

FIG. 8is a flow diagram of a multi-bit DSA system control method800according to one embodiment of the invention. Control method800provides an embodiment of a method for sequencing the switches of a multi-bit DSA, such as the multi-bit DSA200, when changing from a first attenuation value to a second attenuation value. A first operation802determines which switches from the whole network of switches will change state. This step can also set the values of ATT_min, ATT_max bounding the transient attenuation and also bounding the RF signal. The decision block804can decide the relationship between the initial attenuation value, which is the first attenuation value, and the final attenuation value, which is the second attenuation value. If the final attenuation value is greater than the initial attenuation value, then the flow proceeds to an operation step806.

The operation step806selects a unit time delay appropriate to targeting a final attenuation value which is greater than an initial attenuation value. Following operation step806, an operation step808can find a switch sequence which meets the criteria including bounding the attenuation between a minimum ATT_min and maximum ATT_max and transitioning the switches so that the transient attenuation value is always greater than the initial attenuation value. If the final attenuation value is less than the initial attenuation, then the flow proceeds to an operation step810. The operation step810selects a unit time delay appropriate to targeting a final attenuation value which is less than an initial attenuation value. During the operation step812, the switch sequence is arranged to meet similar criteria as in operation step808; however, the differentiating criterion includes transitioning the switches so that the transient attenuation value is always less than the initial attenuation value. In the final operation step814the switches are sequenced based upon the switch sequence determined in the previous steps. The type of sequence can be similar to those presented inFIGS. 7A and 7B.

As shown in the system control method800ofFIG. 8, the switch sequence is derived before the switches transition states from either an off state or on state. For instance, the operation step808, which sets the switch sequence, occurs, before the control signals transition the states of the switches.FIGS. 7A and 7Bare examples of switch sequences where the control signal makes a transition at a multiple of a unit delay time. In one embodiment the switches can be FETs and the control signals can be gate signals which change the voltages on FETs. The selected control sequence is derived based upon the criteria of the attenuation network. More importantly, it can be derived using methods well known to electrical engineers and those practiced in the art of control and DSAs. For instance, the switch sequence can be derived using software or simulation approaches. In other embodiments, the switch sequence can be derived from feedback information, and a parameter, such as the unit delay time, can be a control parameter adjusted in response to feedback. In another embodiment the sequence can be taken from a look up table such as that shown inFIGS. 7A and 7B.

APPLICATIONS

Devices employing the above described schemes can be implemented into various electronic devices. Examples of the electronic devices can include, but are not limited to, consumer electronic products, parts of the consumer electronic products, electronic test equipment, etc. Examples of the electronic devices can also include circuits of optical networks or other communication networks. The consumer electronic products can include, but are not limited to, an automobile, a camcorder, a camera, a digital camera, a portable memory chip, a washer, a dryer, a washer/dryer, a copier, a facsimile machine, a scanner, a multifunctional peripheral device, etc. Further, the electronic device can include unfinished products, including those for industrial, medical and automotive applications.