Methods for repackaging copper wire-bonded microelectronic die

Methods for repacking copper wire bonded microelectronic die (that is, die having bond pads bonded to copper wire bonds) are provided. In one embodiment, the repackaging method includes the step or process of obtaining a microelectronic package containing copper wire bonds and a microelectronic die, which includes bond pads to which the copper wire bonds are bonded. The microelectronic die is extracted from the microelectronic package in a manner separating the copper wire bonds from the bond pads. The microelectronic die is then attached or mounted to a Failure Analysis (FA) package having electrical contact points thereon. Electrical connections are then formed between the bond pads of the microelectronic die and the electrical contact points of the FA package at least in part by printing an electrically-conductive material onto the bond pads.

TECHNICAL FIELD

Embodiments of the present invention relate generally to microelectronic packaging and, more particularly, to methods for repackaging copper wire bonded microelectronic die to, for example, support die failure analysis.

BACKGROUND

A microelectronic package commonly contains one or more microelectronic die on which integrated circuits (ICs), microelectromechanical systems (MEMS), or other such devices are fabricated. The bond pads of the microelectronic die may be electrically interconnected to other electrically-conductive features within the microelectronic package, such as metal routing features of a Printed Circuit Board (PCB), an interposer, a leadframe, or a Redistribution Layer (RDL) structure, to list but a few examples. Wire bonding has long been utilized to form such electrical interconnections between the bond pads of the microelectronic die and other electrically-conductive features within a microelectronic package. Wire bonds have traditionally been produced utilizing gold wire; however, the usage of copper wire in wire bonding has recently become more common in view of the lower electrical resistivity and decreased cost of copper as compared to gold and other wire bond materials.

A wire bonded microelectronic die may be repackaged when, for example, failure analysis is desirably performed on the microelectronic die. To repackage a wire bonded microelectronic die, the microelectronic die is initially extracted from its original microelectronic package. The wire bonded microelectronic die may be extracted by first thinning (e.g., grinding) the frontside and/or backside of the microelectronic package. Encapsulant surrounding the microelectronic die, if such encapsulant is present, may then be removed by treatment with an appropriate etchant, such as fuming nitric acid. The newly-extracted microelectronic die is next attached to a second package, which is referred to herein as a “failure analysis package.” Wire bonding may again be employed to electrically interconnect the bond pads of the microelectronic die to electrical contact points, such as contact pads, provided on the failure analysis package. Failure analysis may then be performed on the repackaged microelectronic die to, for example, allow electrical defect localization on the frontside and/or backside of the microelectronic die.

For simplicity and clarity of illustration, descriptions and details of well-known features and techniques may be omitted to avoid unnecessarily obscuring the exemplary and non-limiting embodiments of the invention described in the subsequent Detailed Description. It should further be understood that features or elements appearing in the accompanying figures are not necessarily drawn to scale unless otherwise stated. For example, the dimensions of certain elements or regions in the figures may be exaggerated relative to other elements or regions to improve understanding of embodiments of the invention.

DETAILED DESCRIPTION

The following Detailed Description is merely exemplary in nature and is not intended to limit the invention or the application and uses of the invention. The term “exemplary,” as appearing throughout this document, is synonymous with the term “example” and is utilized repeatedly below to emphasize that the following description provides only multiple non-limiting examples of the invention and should not be construed to restrict the scope of the invention, as set-out in the Claims, in any respect.

As briefly noted above, it may be desirable to repackage a wire bonded microelectronic die to, for example, facilitate failure analysis of the microelectronic die. Indeed, there exists an ongoing demand for improved failure analysis techniques as wafer fabrication technology moves to ever smaller nodes and the complexity of microelectronic package designs increases. Repackaging of a wire bonded microelectronic die typically entails extraction of the microelectronic die from its original microelectronic package. Die extraction may involve thinning (e.g., grinding) of the microelectronic package and removal of any encapsulant surrounding the wire bonded microelectronic die. The encapsulant surrounding the wire bonded microelectronic die may be removed by treatment with an appropriate etch chemistry, such as a fuming nitric acid. After extraction from its original package, the microelectronic die may be installed within a new package, which is referred to herein as a “failure analysis package” or, more simply, as a “FA package.” To complete the repackaging process, electrical interconnections are formed between the bond pads of the extracted microelectronic die and electrical contact points (e.g., contact pads or terminals) provided on the FA package. Wire bonding has traditionally been employed to form such electrical interconnections between the die bond pads and the FA package contact points.

Fuming nitric acid (and other etchants selective to the encapsulant material) tend to dissolve gold at a relatively low etch rate, while dissolving copper at a relatively high etch rate. Thus, in instances wherein the microelectronic die is wire bonded utilizing gold (Au) wire, treatment with fuming nitric acid tends to leave intact those portions of the Au wire bonds remaining after thinning of the microelectronic package. Specifically, following package thinning and nitric acid treatment, the enlarged terminal ends or “ball portions” of the Au wire bonds may remain intact and overlie the bond pads of the newly-extracted microelectronic die. The subsequently-formed, “repackaging” wire bonds may thus be bonded directly to the remaining ball portions of the Au wire bonds overlying the bond pads. The remaining ball portions may have substantially planar surfaces as a result of packaging thinning such that highly reliable, robust electrical connections are formed between the die bond pads and FA package contact points. In instances wherein the microelectronic die is wire bonded utilizing copper (Cu) wire, however, treatment with fuming nitric acid tends to fully destroy any remaining portions of the Cu wire bonds and expose the underlying die bond pads.

In addition to having a higher etch rate in the presence of fuming nitric acid, Cu wire is also significantly harder than Au wire. Consequently, in contrast to wire bonding utilizing Au wire, wire bonding utilizing Cu wire tends to create relatively pronounced, centralized depressions or concavities in the die bond pads, especially when the bond pads are composed of aluminum or another material that is softer than copper. Bond pads having such centralized depressions or cavities are referred to herein as “severely concave bond pads.” While the Cu wire bonded microelectronic die remains within its original microelectronic package, the depressions formed in the severely concave bond pads are filled by the Cu wire bond material and thus have little to no impact on the structural robustness or functionality of the package. However, the central depressions formed in such severely concave bond pads can become problematic should repackaging of the Cu wire bonded microelectronic die become desirable. As the Cu wire bonds are typically eradicated through the encapsulant-removing etch process, the severely concave bond pads are exposed and the central depressions no longer filled by conductive material. The upper surfaces of the severely concave bond pads may be characterized by highly non-planar, uneven, or physically-distorted surface geometries, which may render it overly difficult or impractical to form reliable electrical connections to the bond pads utilizing a conventional wire bonding approach. Repackaging of the microelectronic die and subsequent failure analysis efforts may be frustrated as a result.

The following describes methods for repackaging Cu wire bonded microelectronic dies, which overcome the above-described limitations. Embodiments of the repackaging method feature a unique post die-extraction printing process during which an electrically-conductive material, such as a metal-containing ink, is deposited onto the bond pads of a newly-extracted microelectronic die. A three dimensional (3D) printing process, such as aerosol jet printing, is employed for this purpose and enables the electrically-conductive material to be deposited in a highly precise (e.g., computer-controlled) manner. In certain embodiments, the post die-extraction printing process is employed to produce electrically-conductive tracks or traces, which electrically interconnect the bond pads of the extracted microelectronic die with electrical contact points (e.g., contact pads or terminals) provided on an FA package. Such printed electrically-conductive traces provide a reliable electrical connection to the die bond pads, even when physically distorted or pocketed with concavities from previous Cu wire bonding. Additionally or alternatively, the post die-extraction printing process can be controlled to structurally rebuild or restore damaged (e.g., severely concave) regions of the die bond pads. The restored die bond pads can then be electrically interconnected with the FA package contact points utilizing a suitable interconnection technique, such as by wire bonding or by continuing the 3D printing process to further deposit electrically-conductive traces, as described above. In this manner, the extracted microelectronic die and FA package can be electrically interconnected in a highly reliable and repeatable manner, despite extraction of the microelectronic die from an original microelectronic package containing Cu wire bonds.

In embodiments wherein the post die-extraction printing process is utilized to deposit printed traces interconnecting the bond pads of the extracted microelectronic die with corresponding FA package contact points, it may also be desirable to deposit one or more dielectric bridge structures at selected junctures between the microelectronic die and the FA package. The dielectric bridge structures can be produced utilizing various different controlled deposition processes including a 3D printing process (e.g., aerosol jet printing) similar to or substantially identical to that utilized to deposit the printed traces. In embodiments wherein the bond pads of the microelectronic die and the electrical contact points of the FA package are located at different elevations or heights, each dielectric bridge structure may be produced to have a sloped or ramped upper surface accommodating such disparities in the elevation. In this manner, the dielectric bridge structures may help provide a gradual, non-stepped surface between the die bond pads and the FA package contact points onto which the electrically-conductive traces can be conformally printed. Additionally or alternatively, in certain implementations, the dielectric bridge structure may substantially fill lateral gaps formed between the microelectronic die and inner sidewalls of the FA package bordering an open cavity in which the microelectronic die is installed. As a still further possibility, the dielectric bridge structure may be deposited to cover other electrically-conductive features present on the bond pad-bearing surface of the microelectronic die, which are located near the die bond pads and which are desirably electrically isolated from the printed electrically-conductive traces. Exemplary embodiments of such a repackaging method will now be described in conjunction withFIGS. 1-7.

FIG. 1is a flowchart setting-forth a method10for repackaging a Cu wire bonded microelectronic die, as illustrated in accordance with an exemplary embodiment of the present disclosure. Repackaging method10includes a number of process STEPS12,14,16,18,20,22, and24, with STEPS18,20,22, and24performed as part of a larger PROCESS BLOCK26. Depending upon the manner in which repackaging method10is implemented, each step generically illustrated inFIG. 1may entail a single process or multiple sub-processes. Furthermore, the steps illustrated inFIG. 1and described below are provided by way of non-limiting example only. In alternative embodiments of repackaging method10, additional process steps may be performed, certain steps may be omitted, and/or the illustrated steps may be performed in alternative sequences. Repackaging method10is usefully performed when failure analysis is desirably carried-out for a Cu wire bonded microelectronic die contained within a preexisting microelectronic package. For this reason, repackaging method10is primarily described below in the context of larger failure analysis process. It is emphasized, however, that repackaging method10can be carried-out to repackage Cu wire bonded microelectronic dies for purposes other than failure analysis.

Repackaging method10commences by obtaining a microelectronic package, which contains at least one Cu wire bonded microelectronic die (STEP12,FIG. 1). As appearing herein, the term “Cu (or copper) wire bonded microelectronic die” refers to a microelectronic die having bond pads to which one or more Cu wire bonds are bonded. The term “Cu wire bond,” in turn, refers to a wire bond composed of relatively pure Cu or a Cu-based alloy; that is, an alloy containing Cu as its primary constituent in addition to lesser amounts of other metallic or non-metallic constituents. Finally, the term “microelectronic die” is broadly defined herein to generally encompass various different types of microelectronic die including, but not limited to, general purpose integrated circuit (IC) die, Application Specific Integrated Circuit (ASIC) die (e.g., microcontrollers and microprocessors), microelectromechanical System (MEMS) die, and other structures on which one or more microelectronic devices (e.g., integrated circuits, sensors, or actuators) are fabricated. A given microelectronic die can carry various different types of ICs without limitation, whether digital or analog in nature. The Cu wire bonded microelectronic package obtained during STEP12of repackaging method10(FIG. 1) can be obtained or acquired in any manner without limitation. In many cases, the Cu wire bonded microelectronic obtained during STEP12(FIG. 1) will be acquired when returned by a customer and identified as potentially faulty such that failure analysis is desirably performed to, for example, isolate any defects present on or within the microelectronic die.

FIG. 2is a cross-sectional view of a microelectronic package28that may be obtained during STEP12of repackaging method10(FIG. 1). Microelectronic package28is only partially shown inFIG. 2to help emphasize that various different types of microelectronic packages can be repackaged utilizing repackaging method10(FIG. 1). With respect to the illustrated example, specifically, microelectronic package28contains a Cu wire bonded microelectronic die30including an active surface or frontside29on which a plurality of die bond pads32is located. Only two die bond pads32(a)-(b) are shown in the simplified cross-section ofFIG. 2. It will be appreciated, however, that a greater number of bond pads32will typically be provided on microelectronic die30and spatially distributed in, for example, one or more rows extending at least one outer peripheral edge region of die30. Microelectronic die30is mounted to a package substrate34utilizing a layer of die attach material36. Package substrate34can be, for example, a Printed Circuit Board (PCB), an interposer, or any other structure suitable for physically supporting microelectronic die30. Package substrate34may, but does not necessarily contain non-illustrated electrical routing features to which die bond pads32are electrically connected by Cu wire bonds, as described below.

Microelectronic die30is surrounded by an encapsulant38, such as a mold compound, which is deposited over package substrate34and around die30. A number of Cu wire bonds40(partially shown) are further contained within microelectronic package28and embedded within encapsulant38. Cu wire bonds40are bonded to bond pads32to electrically interconnect microelectronic die30with other, non-illustrated electrically-conductive features contained within microelectronic package28, such as electrical routing features (e.g., contact pads) provided on package substrate34. In this regard, and as shown inFIG. 2, two such Cu wire bonds40(a)-(b) are contained within microelectronic package28and bonded to bond pads32(a)-(b), respectively. Cu wire bonds40(a)-(b) are each formed to include enlarged terminal ends or ball portions42, which are bonded directly to bond pads32(a)-(b); and elongated wire bodies44, which extend from ball portions42to the opposing terminal ends of the wire bonds (not shown). Additional, non-illustrated Cu wire bonds40similar or identical to bond pads32(a)-(b) are formed in contact with the other, non-illustrated bond pads32distributed across upper or active surface29of microelectronic die30.

As indicated above, one or more ICs, MEMS devices, and/or other such microelectronic devices are fabricated on microelectronic die30. Die bond pads32serve as points-of-contact for providing signal communication with and power transfer to the ICs, MEMS devices, and/or other microelectronic devices carried by microelectronic die30. Die bond pads32may be produced from a metal, such as aluminum, that is softer than the Cu wire utilized to produce Cu wire bonds40. This disparity in hardness, along with the temperatures and pressures involved in the wire bonding process, may result in the creation of relatively pronounced depressions or concavities in central areas of die bond pads32. This may be appreciated by referring to detail bubble46appearing on the right side ofFIG. 2. As can be seen in detail bubble46, a relatively deep depression or concavity48has been created within a central portion50of bond pad32(b). Concavity48may be created when Cu wire bond40(b) is bonded or joined to bond pad32(b). Specifically, during wire bonding, concavity48may be created as ball portion42of wire bond40(b) is heated and pressed against the upper surface of bond pad32(b) in a manner causing radial outflow or creep of the bond pad material away from central portion50of bond pad32(b). While only bond pad32(b) and wire bond40(b) are shown in detail bubble46, similar concavities or depression may likewise be created in bond pad32(a) and the other non-illustrated bond pads included within microelectronic package28.

While Cu wire bonded microelectronic die30remains encapsulated within microelectronic package28, the concavities created within bond pads32remain filled with the Cu wire bond material. For example, and with continued reference to detail bubble46, concavity48created within bond pad32(b) remains filled with the Cu wire bond material of Cu wire bond40(b). Under normal use conditions, the existence of such concavities poses little issue and potentially may help improve joint reliability at the wire bond-bond pad interface. However, in instances wherein it is desirable to repackage Cu wire bonded microelectronic die30and, therefore, extract microelectronic die30from microelectronic package28, Cu wire bonds40may be wholly destroyed and the concavities formed within bond pads32(e.g., concavity48within bond pad32(b)) exposed. This can be problematic when, during repackaging, a conventional wire bonding approach is employed to interconnect bond pads32with corresponding electrical contacts provided on an FA package. However, in the case of repackaging method10, a post die-extraction printing process is utilized to fill the concavities and structurally restore bond pads32(b) and/or to form electrical interconnect lines extending from bond pads32to the corresponding electrical contacts provided on an FA package. This is described more fully below in connection with PROCESS BLOCK26(FIG. 1). First, however, additional description of microelectronic die30and the preceding steps of repackaging method10is provided.

With continued reference toFIGS. 1 and 2, Cu wire bonded microelectronic die30may also include peripheral electrically-conductive features, which are located outboard of bond pads32; that is, electrically-conductive features located further from the centerline of microelectronic die30and closer to the outer peripheral edges of die30than are bond pads32. An example of such a peripheral electrically-conductive feature is shown in detail bubble46(FIG. 2). In this particular example, the peripheral electrically-conductive feature is the remnants of a test pad52, which is located closer to the illustrated outer peripheral edge of microelectronic die30than is bond pad32(b). Stated differently, test pad remnant52is located between bond pad32(b) and an outer edge of die30. Test pad remnant52may be remains of a test pad52, the bulk of which was previously located in the kerf area of the semiconductor wafer from which microelectronic die30was produced. During singulation of the semiconductor wafer, the remainder of the test bond pad was removed leaving behind test pad remnant52. In other embodiments, microelectronic die30may include a different type of peripheral electrically-conductive feature (e.g., a bond pad or trace) or may lack any peripheral electrically-conductive features outboard of bond pads32.

Continuing with exemplary repackaging method10, microelectronic die30is next extracted from microelectronic package28(STEP14,FIG. 1). Microelectronic die30can be extracted from microelectronic package28in any manner separating Cu wire bonds40from bond pads32and revealing the upper bond surfaces; the term “upper” and similar terms of orientation, such as “lower,” utilized in a non-limiting sense with reference to the accompanying drawing figures. In one embodiment, microelectronic die30is extracted by first thinning the frontside and/or backside of microelectronic package28. Microelectronic package28may be thinned by grinding, Chemical Mechanical Polishing or Planarizing (CMP), or a combination thereof. After thinning (if performed), encapsulant38surrounding microelectronic die30may be removed by treatment with an appropriate etchant, such as a fuming nitric acid etch. As indicated above, such an etchant may also be highly selective toward Cu and Cu-based alloys and, consequently, destroy Cu wire bonds40in their entirety or substantial entirety. The results of such a die extraction process are illustrated inFIG. 3. As can be seen, treatment with fuming nitric acid (or a similar encapsulant-selective etchant) has removed Cu wire bonds40in their entirety thus leaving the concavities within bond pads32partially or wholly unfilled. With reference to the portion of microelectronic die30shown in detail bubble46, specifically, Cu wire bond40(b) may be wholly removed such that concavity48of bond pad32(b) is now emptied or devoid of electrically-conductive material.

Advancing to STEP16of repackaging method10(FIG. 1), newly-extracted microelectronic die30is next attached or mounted to an FA package. The FA package can be any structure or device suitable for physically supporting die30and including electrically-conductive features to which bond pads32are desirably electrically interconnected. An example of such an FA package54is shown inFIG. 4in cross-section. In this particular example, FA package54includes a package substrate56having an upper surface or topside58and a lower surface or backside60. A Redistribution Layer (RDL) structure62is formed over topside58of package substrate56. RDL structure62includes a dielectric layer64, at least one patterned metal level66formed in or over dielectric layer64, and a solder mask layer68. A number of solder balls70are deposited in openings formed in solder mask layer68and in contact with selected portions of patterned metal level66to form a Ball Grid Array (BGA). In further embodiments, FA package54can include additional metal levels interspersed with dielectric layers to form more complex wiring structures. Alternative embodiments of FA package54can include other types of Input/Output (I/O) interfaces and associated interconnect structures, which can include any combination of contact arrays (e.g., BGAs, Land Grid Arrays, bond pads, stud bumps, etc.), RDL structures, leadframes, interposers, wire bonds, through package vias, and the like.

An open cavity72is formed in a central portion of package substrate56. During STEP16of repackaging method10(FIG. 1), microelectronic die30is installed within open cavity72and affixed to FA package54utilizing, for example, a layer74of die attach material. The dimensions of open cavity72may be selected to accommodate a wide range of microelectronic dies, which vary in height, width, and/or length. In this manner, multiple FA packages54can be prefabricated, stored, and utilized on an as-needed basis to perform failure analysis on multiple different die types in a manufacture's catalogue. Accordingly, the planform dimensions (the length and width) of open cavity72may be greater than the corresponding planform dimensions (the length and width) of microelectronic die30. When die30is properly centered within cavity72, lateral air gaps76are created between the outer periphery of microelectronic die30and the inner sidewalls of FA package54defining or bordering open cavity72.

FA package54further includes a number of electrical contact points (e.g., contact pads, terminals, conductive leadframe portions, etc.) to which bond pads32of extracted microelectronic die30are desirably interconnected. In the illustrated example, the electrical contact points of FA package54assume the form of contact pads78formed within patterned metal level66at locations adjacent open cavity72. Depending upon the depth of open cavity72, the thickness of die attach layer74, and the height of microelectronic die30, contact pads78of FA package54and bond pads32of microelectronic die30will often be located at different elevations or heights within FA package54, as measured along the centerline of microelectronic die30or along an axis orthogonal to frontside29of die30. For example, as indicated inFIG. 5, contact pads78of FA package54may be located at an elevation that is higher than bond pads32of microelectronic die30.

Exemplary repackaging method10(FIG. 1) next progresses to PROCESS BLOCK26during which electrical interconnections are formed between bond pads32of microelectronic die30and contact pads78of FA package54. In embodiments wherein bond pads32include severe concavities or other pronounced structural deformities, formation of the electrical interconnections may entail three dimensional (3D) printing of electrically-conductive material onto bond pads32to structurally restore the deformed (e.g., pocked or concave) regions thereof. This is indicated at STEP18of repackaging method10(FIG. 1), which is advantageously (but not necessarily) performed when bond pads32have been rendered highly concave by previous Cu wire bonding processes. In this case, bodies of conductive material (referred to hereafter as a “conductive bond pad caps”) may be printed onto upper surfaces of bond pads32to substantially or entirety fill any concavities, depressions, or through holes formed therein. The bond pad caps can be printed to restore bond pads32to dimensions substantially matching or exceeding the dimensions of bond pads32prior to Cu wire bonding. As appearing herein, the term “printing process,” the term “print,” and similar terms are utilized refer to deposition processes allowing a flowable material to be selectively dispensed or applied to one or more surfaces of a structure in a highly precise, computer-controlled manner. Exemplary printing processes suitable for forming conductive bond pad caps and/or other structures deposited during repackaging method10(FIG. 1) are described in more detail below.

FIG. 5illustrates FA package54and microelectronic die30after printing of electrically-conductive bond pad caps80onto severely concave contact pads. Referring specifically to detail bubble46, it can be seen that a bond pad cap80(b) is printed onto bond pad32(b) in sufficient volume to fill concavity48. Additionally, in the illustrated example, bond pad cap80(b) is printed to include a substantially planar upper surface. Such a substantially planar upper surface may facilitate completion of the electrical interconnection between bond pad32(b) and its associated contact pad78(b) in certain embodiments. This example notwithstanding, bond pad cap80(b), bond pad cap80(a), and the other non-illustrated bond pad caps need not be imparted with substantially planar upper surfaces in all embodiments. Instead, in further embodiments, the printed material may be deposited to have a non-planar upper surface and, perhaps, to be substantially conformal to the concave shape of the underlying bond pad. Additionally, while bond pad caps80are deposited to substantially cover the entire upper surface of bond pads32in the illustrated example, this need not be the case in all embodiments.

The printing process utilized to produce electrically-conductive bond pad caps80can be similar or substantially identical to the printing process utilized to form electrically-conductive traces88, as described below in detail in conjunction withFIG. 7. In one embodiment, an electrically-conductive ink is selectively printed (e.g., utilizing an aerosol or inkjet printing process) onto bond pads32to predetermined dimensions to yield bond pad caps80. Suitable electrically-conductive inks include, but are not limited to, inks containing relatively small metal particles, such as Au, Cu, or silver (Ag) particles in the nanometer range. Thermal or ultraviolet curing can be performed after printing of the electrically-conductive bond pad caps80, as appropriate. Furthermore, while printed after attachment of microelectronic die30to FA package54in the illustrated example, conductive bond pad caps80can be printed prior to attachment of microelectronic die30to FA package54in further embodiments.

After printing electrically-conductive bond pad caps80onto bond pads32, additional processes may be carried to complete formation of the electrical interconnections between bond pads32and corresponding contact pads78on FA package54(STEP20,FIG. 1). In certain embodiments, wire bonding may be utilized to complete the desired electrical interconnections. In this case, ball bonding or another wire bonding processes can be performed utilizing Cu wire, Au wire, or another wire material. During the wire bonding process, a first terminal end of each wire bond is formed in contact with one of electrically-conductive bond pad caps80. Again, bond pad caps80may provide (but need not necessarily provide) substantially planar or flat upper surfaces to facilitate wire bonding. To complete each wire bond the connection, the opposing terminal end of the wire may then be bonded to the appropriate FA package contact pad78. This notwithstanding, wire bonding may not be utilized to complete the interconnections between bond pads32and contact pads78on FA package54in all embodiments. Instead, the electrical interconnections can be completed by further printing electrically-conductive traces extending from conductive bond pad caps80and bond pads32to corresponding contact pads78, as described more fully below in conjunction with STEP24of repacking method10(FIG. 1). In this case, a common printing process can be utilized form both conductive bond pad caps80and the below-described printed traces or interconnect lines. In still further embodiments of repackaging method10, such as implementations wherein relatively deep concavities or openings are not formed in bond pads32, bond pad caps80may not be deposited and method10may progress directly from STEP16to STEP22of PROCESS BLOCK26(FIG. 1).

Certain embodiments of repackaging method10may involve printing of electrically-conductive traces or interconnect lines extending from bond pads32(and possibly conductive bond pad caps80, if present) to corresponding electrical contact points (e.g., contact pads78) provided on FA package54. In such embodiments, it may also be desirable to deposit one or more dielectric bridge structures at selected junctures between microelectronic die30and FA package54. Each dielectric bridge structures can be deposited to provide a continuous, non-stepped surface extending from microelectronic die30to the surface of FA package54on which contact pads78are located. When bond pads32(b) (and bond pad caps80, if present) are located at a different elevation than are FA package contact pads78, the dielectric bridge structures can further be printed or otherwise deposited to include ramped or sloped upper surfaces accommodate this disparity in elevation. Finally, when peripheral electrically-conductive features are located on microelectronic die30laterally outboard of bond pads32, the dielectric bridge structures can be formed to cover such peripheral electrically-conducive features to provide electrical isolation with the subsequently-deposited traces or interconnect lines, as described more fully below in conjunction withFIG. 6.

FIG. 6is a cross-sectional view of FA package54and microelectronic die30after deposition of dielectric bridge structures82during STEP22of repackaging method10(FIG. 1). Two dielectric bridge structures82can be seen: (i) a first dielectric bridge structure82(a) deposited at a first juncture between microelectronic die30and a first inner sidewall of FA package54bounding open cavity72, and (ii) a second dielectric bridge structure82(b) deposited at a second juncture between microelectronic die30and a second inner sidewall of FA package54bounding cavity72. Dielectric material may be deposited to extend substantially around the entire periphery of microelectronic die30such that dielectric bridge structures82(a)-(b) are integrally formed as a ring-shaped structure when viewed from a planform or top-down perspective. Alternatively, dielectric material may be exclusively deposited along the two illustrated sidewalls of microelectronic die30extending into the plane of the page inFIG. 6such that dielectric bridge structures82(a)-(b) are discrete, non-contacting bodies. In either case, dielectric bridge structures82(a)-(b) may be deposited in sufficient volume to fill lateral gaps76(labeled inFIG. 5) between die30and the inner sidewalls of FA package54bounding cavity72and thereby provide a physical bridge or connective body onto which the below-described electrically-conductive traces can be conformally printed.

Dielectric bridge structures82can be selectively deposited utilizing various different deposition techniques including, for example, fine needle dispense and 3D printing processes of the type described herein. In one embodiment, dielectric bridge structures82are gradually built-up at the junctures between microelectronic die30and FA package54utilizing a 3D printing process, such as a computer-controlled inkjet printing or aerosol jet printing technique. Dielectric bridge structures82can be composed of various different dielectric materials including, but not limited to, polyimide materials and deposited ceramic materials. Thermal or ultraviolet curing may be performed after deposition of dielectric bridge structures82, as appropriate. In certain embodiments, dielectric bridge structures82may be composed from a material selected to have a lower etch rate than does package substrate56when contacted by a suitable etchant, such as a nitric acid etchant (e.g., fuming nitric acid) or another etchant selective to the package substrate material. In this manner, dielectric bridge structures82may be better preserved to maintain microelectronic die30in its desired position should controlled etching of package substrate56be performed to reveal the backside of die30for additional backside failure analysis testing. In this case, prior to backside analysis, microelectronic die30may be encapsulated within an epoxy or other material deposited utilizing an aerosol jet printing, needle dispense, or a molding processing, to list but a few examples.

The bond pads of the microelectronic die may be located at a different elevation than are the electrical contact points of the FA package when the microelectronic die is attached to the FA package during STEP16of repackaging method10(FIG. 1). In this case, dielectric bridge structures82may be deposited to have ramped or sloped upper surface providing a transition from the first elevation to the second elevation. Consider further the example shown inFIG. 6wherein bond pads32are located at a first elevation, while electrical contact pads or points78of FA package54are located at a second elevation different than the first elevation. As can be seen, dielectric bridge structures82have been deposited to include ramped upper surfaces84, which extend at a an angle from the bond pad-bearing surface29of microelectronic die30to the surface of FA package54on which electrical contact points78are located. Ramped upper surfaces84of dielectric bridge structures82thus provide a gradual transition or a continual, non-stepped surface over which the electrically-conducive traces can be conformally printed, as described more fully below in conjunction with STEP24of repackaging method10(FIG. 1).

In embodiments wherein microelectronic die30includes peripheral electrically-conductive features located laterally outboard of bond pads32, dielectric bridge structures82may be deposited to include extended regions or overburden portions covering the peripheral electrically-conductive features. Consider, for example, detail bubble46inFIG. 6wherein dielectric bridge structure82(b) has been printed or otherwise deposited to include an overburden portion86encroaching onto upper surface29of microelectronic die30to cover test pad remnant52. Overburden portion86of dielectric bridge structure82(b) prevents undesirable electrical coupling between test pad remnant52and a subsequently-formed electrically-conductive trace, which is conformally printed over upper surface84of dielectric bridge structure82(b) in the manner described below in conjunction with STEP24of repackaging method10(FIG. 1). Dielectric bridge structure82(a) and the other non-illustrated dielectric bridge structures may also be printed to include such extensions or overburden portions, as appropriate, to prevent electrical bridging to any peripheral electrically-conductive features present on upper surface29of microelectronic die30.

Turning lastly to STEP24of repackaging method10(FIG. 1), electrically-conductive traces or interconnect lines are next printed in, for example, a predetermined pattern to interconnect microelectronic die30and FA package54. Specifically, the electrically-conductive trace may be printed to extend from bond pads32, across upper surfaces29of dielectric bridge structures82, and to corresponding electrical contact points or pads78on FA package54. For example, as shown inFIG. 7, a first electrically-conductive trace88(a) can be printed to extend from bond pad32(a) across upper ramped surface84of dielectric bridge structure82(a), and to electrical contact point78(a) of FA package54. Similarly, a second electrically-conductive trace88(b) is printed to extend from bond pad32(b) across ramped surface of84of dielectric bridge structure82(b), and to electrical contact point78(b) of FA package54. Electrically-conductive traces88may substantially conform or follow the topology or surface geometry of the surfaces onto which traces88are printed. Electrically-conductive traces88may be printed to any desired dimensions. In one embodiment, electrically-conductive traces88are printed to a width between 25 and 75 microns (μm) and a thickness between 5 and 20 μm. In further embodiments, electrically-conductive traces88may be printed to thicker, thinner, wider, or narrower dimensions.

Printed electrically-conductive trace88(a), printed electrically-conductive trace88(b), and the other non-illustrated printed traces or interconnect lines can be printed utilizing any dispensing technique allowing the selective deposition of an electrically-conductive ink in a predetermined pattern or design. As indicated above, a non-exhaustive list of suitable printing techniques includes inkjet printing, aerosol printing, and needle dispensing techniques. In one embodiment, the printing process may be fully automated and carried-out in accordance with a pre-established Computer-Aided Design (CAD) model or other 3D object data. In other embodiments, the printing process may be semi-automated and involve a user specifying two dimension or three dimensional coordinates to guide the printing process. In other Suitable materials for forming printed electrically-conductive traces88include, but are not limited to, particle-filled inks, electrically-conductive polymers, solder pastes, solder-filled adhesives, and metal-containing adhesives or epoxies, such as silver-, nickel-, and copper-filled epoxies. In one embodiment, electrically-conductive traces88are produced from an ink containing relatively small metal particles, such as gold, copper, or silver particles in the nanometer range; e.g., particles having average diameters ranging from about 2 to about 50 nanometers. Thermal or ultraviolet curing can be performed after printing of the electrically-conductive ink traces, as appropriate. After printing traces88at STEP24, repackaging method10concludes. Failure analysis may now performed on repackaged microelectronic die30utilizing FA package54to, for example, permit defect localization on microelectronic die30.

In the above-described embodiment, the extracted microelectronic die was installed within a particular type of FA package (namely, a Tape Ball Grid Array or TBGA package). However, in further embodiments, the extracted microelectronic die can be installed within various other types of FA packages, providing that electrically-conductive material is printed in contact with the die bond pads in the process of forming bond pad caps, forming printed interconnect lines or traces, or a combination thereof. To further emphasize this point,FIG. 8provides a cross-sectional view of a repackaged assembly90including a microelectronic die92, which was previously extracted from a Cu wire-containing microelectronic package and subsequently installed within a new FA package94. In this particular example, FA package94assumes the form of a leadless package and, specifically, a quad flat no-leads package. As was previously the case, microelectronic die92is mounted to FA package94utilizing a layer of die attach material96; dielectric bridge structures106are printed or otherwise deposited at junctures or intersections between die92and FA package94; and electrical interconnect lines or electrically-conductive traces104are printed to extend from bond pads100located on an upper or active surface98of die92, across the sloped or ramped upper surfaces of dielectric bridge structures106, and to electrical contact points102(e.g., contact pads) provided on FA package94. Again, electrically-conductive traces104can be printed utilizing, for example, an aerosol jet or inkjet printing process. However, in contrast to the example discussed above in conjunction withFIGS. 2-7, bond pads100of microelectronic die92are located at a higher elevation than are contact pads102of FA package94. Dielectric bridge structures106are thus deposited to include ramped upper surfaces108, which angle downward when progressing from microelectronic die92to the regions of FA package94on which contact pads102are located.

There has thus been provided multiple exemplary embodiments of a method for repackaging a Cu wire bonded microelectronic die, which enables reliable interconnection of an FA package with the microelectronic die after extraction from an original microelectronic package containing Cu wire bonds. During the repackaging method, a post die-extraction printing process is utilized to deposit an electrically-conductive material (e.g., a metal-containing ink) onto the bond pads of a newly-extracted microelectronic die. In certain embodiments, the post die-extraction printing process is employed to produce electrically-conductive tracks or traces, which electrically interconnect the bond pads of the extracted microelectronic die with electrical contact points (e.g., contact pads or terminals) provided on an FA package. Additionally or alternatively, the post die-extraction printing process can be controlled to structurally rebuild or restore damaged (e.g., severely concave) regions of the die bond pads. The restored die bond pads can then be electrically interconnected with the FA package contact points by wire bonding or by continuing the 3D printing process to further deposit electrically-conductive traces.

In one embodiment, the above-described repackaging method includes the step or process of obtaining a microelectronic package containing Cu wire bonds and a microelectronic die, which includes bond pads to which the Cu wire bonds are bonded. The microelectronic die is extracted from the microelectronic package in a manner separating the Cu wire bonds from the bond pads. The microelectronic die is then attached or mounted to a FA package having electrical contact points thereon. Electrical connections are then formed between the bond pads of the microelectronic die and the electrical contact points of the FA package at least in part by printing an electrically-conductive material onto the bond pads.

In another embodiment, the method includes the obtaining a microelectronic die including bond pads having concave or thinned regions therein. An electrically-conductive material is selectively deposited onto the bond pads to at least partially structurally restore the concave regions of the bond pads utilizing a 3D printing process, such as an inkjet or aerosol jet printing process. Prior to or after selectively depositing the electrically-conductive material onto the bond pads, the microelectronic die is attached to a package (e.g., an FA package) having electrical contact points thereon. Electrical connections are then formed between the bond pads of the microelectronic die and the electrical contact points of the package, for example, by wire bonding or by printing electrically-conductive traces or interconnect lines in contact with the microelectronic die and the package.

In a still further embodiment, the repackaging method includes the steps or processes of obtaining a microelectronic package containing Cu wire bonds and a microelectronic die having bond pads bonded to the Cu wire bonds. The microelectronic die is extracted from the microelectronic package, while the Cu wire bonds are separated from the bond pads. The microelectronic die is then mounted or attached to a FA package having electrical contact points thereon. A dielectric bridge structure is then printed or otherwise deposited at a juncture between the FA package and the microelectronic die. Electrical connections are then formed contacting and extending from the bond pads of the microelectronic die, over the dielectric bridge structure, and to the electrical contact points of the FA package.