Stacked semiconductor package

A stacked semiconductor package is presented which includes multiple semiconductor chips and through-electrodes. Each semiconductor chip has bonding pads formed on a first surface of the semiconductor chip and has a projection which projects from a portion of a second surface of the semiconductor chip. The first and second surfaces of the semiconductor chip face away from each other the first surface. The through-electrodes pass through the first surface and through the projection on the second surface.

CROSS-REFERENCE TO RELATED APPLICATIONS

The present application claims priority to Korean patent application number 10-2009-0031414 filed on Apr. 10, 2009, which is incorporated herein by reference in its entirety.

BACKGROUND OF THE INVENTION

The present invention relates to a semiconductor package, more particularly to a semiconductor package having a plurality of chips stacked upon each other.

These days, semiconductor chips capable of storing and processing huge amount of data and semiconductor packages having these semiconductor chips have been developed.

Recently, a stacked semiconductor package, in which at least two semiconductor chips are stacked so as to increase data storage capacity and/or data processing speed, has been proposed in the art.

In order to realize the stacked semiconductor package, stacking technology for stacking semiconductor chips and gap-fill technology for filling the voids with gap-fill material between the stacked semiconductor chips are necessarily required.

As the gap between the stacked semiconductor chips gradually decreases, it becomes increasingly more difficult to completely fill in these voids with the gap-fill material between the semiconductor chips. Due to this fact, voids are likely to persist or be created between the stacked semiconductor chips. The voids created between the semiconductor chips can cause various defects which can be detected by conducting various reliability tests of the stacked semiconductor package and/or the results of these defects can be unwittingly encountered during the operation of these stacked semiconductor packages.

BRIEF SUMMARY OF THE INVENTION

Embodiments of the present invention are directed to a semiconductor package which is suitable for preventing voids or at least minimizing the occurrence between stacked semiconductor chips.

In one aspect of the present invention, a semiconductor package comprises a semiconductor chip having bonding pads which are formed on a first surface of the semiconductor chip and a projection which projects from a portion of a second surface of the semiconductor chip, facing away from the first surface; and through-electrodes passing through the first surface and the projection on the second surface.

The projection is placed at a middle portion of the second surface while having a rectangular shape when viewed from the bottom, and the projection and the semiconductor chip are formed integrally with each other.

The projection is placed on the second surface in the form of a matrix like pattern when viewed from the bottom, and the projection and the semiconductor chip are formed integrally with each other.

The semiconductor package further comprises a reinforcing layer placed on the projection.

The through-electrodes pass through the reinforcing layer, and the reinforcing layer comprises any one of a non-conductive adhesive (NCA), a non-conductive film (NCF) and a non-conductive polymer (NCP).

The reinforcing layer comprises an anisotropic conductive film (ACF).

The semiconductor package may further comprises at least one guide member projecting from the second surface of the semiconductor chip in such a way as to be parallel to one of a short side and a long side of the semiconductor chip.

The projection preferably occupies 5˜25% of an overall area of the second surface.

At least two through-electrodes pass through the semiconductor chip in correspondence to the projection.

The semiconductor package may further comprise any ones of bumps and/or pads placed on ends of the through-electrodes which correspond to the projection.

The bumps and pads are preferably formed of any one selected from the group consisting of solder, gold, copper and aluminum.

At least two semiconductor chips are stacked, and the first surface and the second surface of the respective stacked semiconductor chips are placed facing each other.

The semiconductor package further comprises coating layers placed on the first surface and second surface and containing any one of a hydrophilic substance and a lipophilic substance.

The semiconductor package further comprises a gap-fill member interposed between the stacked semiconductor chips and containing any one of a hydrophilic substance and a lipophilic substance in correspondence to the coating layer.

In another aspect of the present invention, a semiconductor package comprises a semiconductor chip having a first surface on which bonding pads are placed and a second surface which has a flat part and recessed parts. The semiconductor chip having a first thickness when measured from the first surface to the flat part and a second thickness when measured from the recessed parts to the first surface in which the second thickness is less than the first thickness; and through-electrodes passing through the first surface and the flat part.

The semiconductor package may further comprise a reinforcing layer placed on the flat part.

The semiconductor package may further comprise at least one guide member projecting from the second surface of the semiconductor chip parallel to one of a short side and a long side of the semiconductor chip.

At least two semiconductor chips are stacked, and the first surface and the second surface of the respective stacked semiconductor chips are placed facing each other.

The semiconductor package may further comprise coating layers placed on the first surface and second surface and containing any one of a hydrophilic substance and a lipophilic substance.

The semiconductor package may further comprise a gap-fill member interposed between the stacked semiconductor chips and containing any one of a hydrophilic substance and a lipophilic substance in correspondence to the coating layer.

DESCRIPTION OF SPECIFIC EMBODIMENTS

It is understood herein that the drawings are not necessarily to scale and in some instances proportions may have been exaggerated in order to more clearly depict certain features of the invention.FIG. 1is a bottom view illustrating a semiconductor package in accordance with a first embodiment of the present invention.FIG. 2is a sectional view taken along the line I-I′ ofFIG. 1.

Referring toFIGS. 1 and 2, a semiconductor package400includes a semiconductor chip100and through-electrodes200which can optionally have bumps and pads310at the ends of the through-electrodes200. In addition, the semiconductor package400can further include a reinforcing layer300.

For example, the semiconductor chip100has the shape of a rectangular hexahedron which possesses long sides LS and short sides SS. The semiconductor chip100, which has the shape of a rectangular hexahedron, has a first surface110and a second surface120which face away from each other.

The semiconductor chip100includes a circuit section130, bonding pads140, and a projection150.

The circuit section130is placed in the semiconductor chip100. The circuit section130has a data processing unit (not shown) for processing data and a data storage unit (not shown) for storing data.

The bonding pads140are placed on the first surface110of the semiconductor chip100. The respective bonding pads140are electrically connected with the circuit section130.

The projection150is formed on the second surface120of the semiconductor chip100. The projection150projects form a portion of the second surface120at a predetermined thickness.

In the present embodiment, the projection150can have various numbers and various shapes.

When viewed from the bottom, the projection150can have a rectangular shape. The projection150can be placed at the middle portion of the second surface120of the semiconductor chip100to extend in a direction parallel to the long sides LS or the short sides SS. For example, in the present illustrative embodiment, the projection150is disposed at the middle portion of the second surface120so that it extends in a direction substantially parallel to the long sides LS. Also, at least two projections150can be arranged in parallel to each other (as shown) or can be arranged to cross one another. In the present embodiment, the projection150is formed integrally with the semiconductor chip100.

In the present embodiment, the projection150occupies about 5˜25% of the surface area of the second surface120of the semiconductor chip100. If the projection150occupies less than 5% of the surface area of the second surface120, when the semiconductor chip100is stacked, the semiconductor chip100is prone to leaning along one side or the other. Also, if the projection150occupies greater than 25% of the surface area of the second surface120, the area of the circuit section130can decrease.

FIG. 3is a bottom view illustrating guide members which are formed on the second surface120of the semiconductor chip100as shown inFIG. 2.

Referring toFIG. 3, one or more guide members160are placed on the second surface120of the semiconductor chip100. The guide members160project outwards away from the second surface120by a preset thickness. In the present embodiment, at least two guide members160are placed in parallel on the short side SS. For example, the guide members160have a thickness which is less than that of the projection150.

The guide members160allow a liquid phase gap-fill member to flow in the direction parallel to the short side SS, thereby preventing or at least minimizing the occurrence of voids from being created.

Although it is described and illustrated in the present embodiment that the guide members160are placed to be parallel to the short side SS of the semiconductor chip100, it is also envisioned that the guide members160can be placed in parallel to the long sides LS of the semiconductor chip100. Unlike this, the guide members160can of course be formed to be inclined with respect to the long sides LS.

FIG. 4is a bottom view illustrating a variation of the projection shown inFIG. 2.

Referring toFIG. 4, at least two projections150are placed on the second surface120of the semiconductor chip100. The projections150are placed on the second surface120to define a symmetrical matrix pattern. In the present embodiment, the projections150are placed on the second surface120of the semiconductor chip100to define the form of a 3×3 matrix pattern.

Referring again toFIG. 2, the through-electrodes200pass through the first surface110and the second surface120of the semiconductor chip100. In the present embodiment, the through-electrodes200can pass through and be electrically connected with the bonding pads140which are placed on the first surface110of the semiconductor chip100. Unlike this depiction, it is also conceivable that the through-electrodes200and the bonding pads140can be separated from one another at a predetermined distance and are electrically connected with each other by using redistribution lines (not shown).

The ends of the through-electrodes200, which correspond to the projection150of the semiconductor chip100, can project from the projection150by a predefined thickness.

The reinforcing layer300is placed on the projection150of the semiconductor chip100. In the present embodiment, the reinforcing layer300can comprise, for example, any one of a non-conductive adhesive (NCA), a non-conductive film (NCF) and a non-conductive polymer (NCP).

When the reinforcing layer300comprises any one of an NCA, an NCF and an NCP, portions of the reinforcing layer300, which correspond to the through-electrodes200, are defined with openings, and the through-electrodes200are placed in the openings. In the present embodiment, the ends of the through-electrodes200are preferably flush with the surface of the reinforcing layer300. Unlike this, the ends of the through-electrodes200can be flush with the surface of the projection150, and bumps and pads310, which are preferably formed of solder or gold, can be placed in the openings which are defined in the reinforcing layer300. Still unlike this depiction, it is also envisioned that the ends of the through-electrodes200can be flush with the surface of the projection150, and connection bumps and pads310which are electrically connected with the through-electrodes200can be placed in the openings which are defined in the reinforcing layer300.

Meanwhile, when the reinforcing layer300comprises an anisotropic conductive film (ACF), the reinforcing layer300does not have openings, and the ends of the through-electrodes200which correspond to the projection150and the surface of the projection150are flush with each other.

Referring again toFIG. 2, coating layers170can be respectively formed on the first surface110and the second surface120of the semiconductor chip100. For example, the coating layers170can contain any one of a hydrophilic substance and a lipophilic substance.

In the case where a liquid phase gap-fill member which contains a hydrophilic substance is provided on the second surface120, the coating layer170containing a hydrophilic substance is placed on the second surface120. Unlike this depiction, it is also envisioned that in the case where a liquid phase gap-fill member which contains a lipophilic substance is provided on the second surface120, the coating layer170containing a lipophilic substance is placed on the second surface120.

FIG. 5is a sectional view illustrating a semiconductor package in accordance with a second embodiment of the present invention.

Referring toFIG. 5, a semiconductor package400includes at least two semiconductor chips100, through-electrodes200which are formed through the semiconductor chips100, a substrate350, gap-fill members360, and a molding member370.

In the present embodiment, at least two semiconductor chips100are stacked upon each other. Each semiconductor chip100has a first surface110and a second surface120which faces away from the first surface110. Bonding pads are formed on the first surface110of each semiconductor chip100, and a projection150is formed on the second surface120of each semiconductor chip100to project from the second surface120. In the present embodiment, the semiconductor chips100are arranged such that the first surface110of the lower semiconductor chip100and the second surface120of the upper semiconductor chip100face each other.

The semiconductor chips100have the through-electrodes200. The through-electrodes200of the semiconductor chips100are placed at corresponding positions on projections150and are electrically connected with each other.

The stacked semiconductor chips100are attached to each other by the medium making up the reinforcing layer300. The reinforcing layer300can comprise any one of a non-conductive adhesive (NCA), a non-conductive film (NCF) and a non-conductive polymer (NCP). When the reinforcing layer300comprises any one of an NCA, an NCF and an NCP, the through-electrodes200project from the projection150by the thickness of the reinforcing layer300, and the reinforcing layer300has openings which expose the through-electrodes200.

The substrate350includes connection pads352, ball lands354, and connection elements356.

The connection pads352are formed on the upper surface of the substrate350. The connection pads352are placed at positions which correspond to the through-electrodes200of the semiconductor chips100. The connection pads352and the through-electrodes200are electrically connected with each other.

The ball lands354are placed on the lower surface of the substrate350which faces away from the upper surface. The ball lands354are electrically connected with the connection pads352by conductive vias, etc.

The connection elements356are placed on the ball lands354. The connection elements356can comprise conductive balls such as solder balls.

The gap-fill members360are filled in the gaps defined between the first surface110of the lower semiconductor chip100and the second surface120of the upper semiconductor chip100and between the second surface120of the lower semiconductor chip100and the substrate350. In the present embodiment, due to the fact that the projections150are formed on the second surfaces120of the semiconductor chips100, a relatively large gap is defined between the lower and upper semiconductor chips100. Therefore, the gap-fill member360can fill in these gaps between the semiconductor chips100while preventing or at least minimizing the occurrence voids.

The molding member370covers the substrate350and the semiconductor chips100. A substance which can be used to form the molding member370includes epoxy resin.

FIG. 6is a sectional view illustrating a semiconductor package in accordance with a third embodiment of the present invention.

Referring toFIG. 6, a semiconductor package800includes a semiconductor chip500and through-electrodes600. The semiconductor package800can further include a reinforcing layer700.

For example, the semiconductor chip500has the shape of a rectangular hexahedron which possesses long sides and short sides. The semiconductor chip500, which has the shape of a rectangular hexahedron, has a first surface510and a second surface520which face away from each other.

The first surface510of the semiconductor chip500is flat, and the second surface520of the semiconductor chip500has a flat part522and recessed parts524. The semiconductor chip500has a first thickness T1between the first surface510and the flat part522and a second thickness T2between the first surface510and the recessed parts524. The second thickness T2is less than the first thickness T1.

In the present embodiment, the recessed parts524are formed, for example, through an etching process. Due to this etching process, the flat part522projects away from the recessed parts524. In the present embodiment, the flat part522can be placed at the middle portion of the second surface520. Alternatively, a plurality of flat parts can be placed on the second surface520in the form of a matrix pattern.

The through-electrodes600pass through the first surface510and the flat part522. The ends of the through-electrodes600which correspond to the flat part522can project from the flat part522by a predetermined thickness. Unlike this, the ends of the through-electrodes600which correspond to the flat part522can be flush with the flat part522, and bumps (not shown) or connection pads (not shown) can be placed on the ends of the through-electrodes600. The reinforcing layer700can be attached to the flat part522. The reinforcing layer700can include openings which expose the through-electrodes600.

A coating layer530, which contains a hydrophilic substance or a lipophilic substance, can be formed on the recessed parts524of the semiconductor chip500.

At least two semiconductor chips500as illustrated inFIG. 6can be stacked together. In this case, adjoining semiconductor chips500are placed such that the first surface510and the second surface520of them face each other.

The semiconductor package800can be electrically connected with the substrate350, and a gap-fill member360can be placed between the semiconductor chips500as shown inFIG. 5.

As is apparent from the above description, in the present invention, advantages are provided in that a gap-fill member can be formed in a gap between semiconductor chips while preventing voids from being created in the gap without increasing the volume of a semiconductor package.