Switching regulator provided with error amplifier circuit having overcurrent protecting function

A switching regulator in which a DC input voltage is chopped by an oscillator applied to a transformer the output of which in turn is rectified by a rectifier circuit; a DC voltage derived from the rectifier is compared with a reference voltage so that a voltage is produced which corresponds to the deviation from said reference voltage of the aforementioned DC voltage derived from the rectifier; the voltage thus produced is amplified by means of an error amplifier; a current proportional to the transformer driving current provided by the oscillator is detected by a current detector; and the output of the error amplifier is compared with the output of the current detector so that only when the former exceeds the latter, a trigger signal is applied to the oscillator, whereby the oscillation of the oscillator is changed from an ON state to an OFF state. In such a switching regulator, there is provided circuitry for limiting the operation range of the aforementioned error amplifier by the difference between a voltage proportional to said DC voltage derived from the rectifier and a voltage proportional to the input voltage.

The present invention relates to a switching regulator arranged to provide 
an output voltage which is stabilized by means of pulse-width-modulation 
and equipped with an over-current protecting function, wherein correction 
is made for dispersion of the overcurrent protecting operation starting 
point which tends to be caused by fluctuations of an input voltage. 
It is an object of the present invention to provide a switching regulator 
which is so designed that correction is made for dispersion with input 
variations of the load current value at which the operation for 
overcurrent protection is started. 
In summary, according to one aspect of the present invention, there is 
provided a switching regulator comprising an oscillator circuit for 
chopping a DC voltage supplied from an input power source to thereby drive 
a transformer; a rectifier circuit for rectifying an AC output derived 
from the transformer; a voltage comparator for comparing a DC output 
voltage available from the rectifer circuit with a reference voltage to 
provide a voltage corresponding to the deviation of the DC output voltage 
from the reference voltage; an error amplifier circuit for amplifying the 
output of the voltage comparator; a current detector circuit for detecting 
a current proportional to the transformer driving current provided by the 
oscillator circuit; and a control circuit adapted for comparing the output 
of the current detector circuit with the output of the error amplifier 
circuit and also adapted, only when the current detector circuit output 
exceeds the error amplifier circuit output, to apply to the oscillator 
circuit a trigger signal for changing the oscillation from ON state to OFF 
state, characterized in that means is provided for limiting the operation 
range of the error amplifier circuit by the difference between a voltage 
proportional to said DC output voltage and a voltage proportional to said 
input voltage.

In order to give better understanding of the present invention, description 
will first be made, with reference to FIG. 1, of the overcurrent 
preventing function of the switching regulator which the present inventor 
has proposed in U.S. patent application Ser. No. 928,441 filed July 27, 
1978. As will be seen, the switching regulator shown in FIG. 1 comprises a 
blocking oscillator circuit 1, an output rectifier circuit 2, a voltage 
comparator circuit 3, an error amplifier circuit 4, a current detector 
circuit 5 and a control circuit 6. 
With the foregoing arrangement, the output voltage V.sub.O thereof is 
stabilized by the use of means which is commonly referred to as ringing 
choke system. More specifically, when a transistor Q.sub.1 is turned on, 
an excitation current t.multidot.V.sub.i /L.sub.1 is caused to flow 
through a primary winding of a transformer T so that excitation energy is 
stored in the transformer T. When the transistor Q.sub.1 is turned off, on 
the other hand, the excitation energy mentioned above is taken out as an 
output voltage V.sub.O across a secondary winding of the transformer T as 
given by the following expression: 
##EQU1## 
where t.sub.ON is the conduction time of the transistor Q.sub.1, t.sub.OFF 
is the non-conduction time thereof, L.sub.1 is inductance of the primary 
winding of the transformer T, V.sub.i is the input voltage, and R.sub.L is 
a load resistor connected across the output terminals of the switching 
regulator. The above equation is derived from the following relationships: 
EQU P.sub.i =P.sub.o (2) 
##EQU2## 
where P.sub.i is the input power, and P.sub.o is the output power. 
Thus, it will be appreciated that the output voltage V.sub.O can be 
stabilized by controlling the conduction time t.sub.ON in equation (1) 
given above. That is, even if DC voltage V.sub.i supplied from an input 
power source E.sub.i is unstable, the desired stabilized output voltage 
V.sub.O is obtained across output terminals a and b. The operation of the 
above-mentioned switching regulator will now be explained with reference 
to FIG. 2 showing the voltage and current waveforms which occur in the 
respective portions of the circuit shown in FIG. 1. 
FIG. 2(A) shows the waveform of the base input current i.sub.b of the 
transistor Q.sub.1 ; FIG. 2(B) shows the waveform of the collector current 
i.sub.c of the transistor Q.sub.1 ; FIG. 2(C) shows the waveform of the 
output voltage v.sub.ic of the current detector circuit 5, together with 
the waveform of the output voltage v of the error amplifier circuit 4; and 
FIG. 2(D) shows the waveform of the output current i.sub.FB of the control 
circuit 6. 
Description will first be made of the case where the circuit shown in FIG. 
1 is performing steady-state operation. When the transistor Q.sub.1 of the 
blocking oscillator circuit 1 is turned on, the current i.sub.c is caused 
to flow in the primary winding of the transformer T. At this point, a 
voltage is induced in the secondary winding of the transformer T, but 
because of the fact that a diode D.sub.1 in the output rectifier circuit 2 
is connected in reverse polarity with respect to the voltage thus induced, 
most of the collector current i.sub.c of the transistor Q.sub.1 is caused 
to constitute the excitation current t.multidot.V.sub.i /L.sub.1. More 
specifically, when the transistor Q.sub.1 is turned on at a point of time 
t.sub.O in FIG. 2, the collector i.sub.c is linearly increased with time. 
In the blocking oscillator circuit 1, the transistor Q.sub.1 is turned on 
by imparting to the base thereof a current which is n times as high as a 
base current i.sub.cp /h.sub.fe which is a minimum required for turning on 
the transistor Q.sub.1 as in the waveform of the base i.sub.b shown in 
FIG. 2(A). Furthermore, the collector current i.sub.c of the transistor 
Q.sub.1 can be prevented from saturation during conduction thereof, by 
means of the sufficient base current n.multidot.i.sub.cp /h.sub.fe, and 
the collector saturation voltage thereof can be sufficiently decreased. 
The voltage v which is modulated with a signal derived from the error 
amplifier circuit 4 in correspondence with the deviation of the output 
voltage V.sub.O from the reference voltage E.sub.1 and which is applied to 
the inversion input terminal of the voltage comparator A.sub.2, is 
controlled so as to be decreased as the output voltage V.sub.O builds up. 
The voltage v.sub.ic proportional to the collector current i.sub.c 
=t.multidot.V.sub.i /L.sub.1 which is provided by the current detector 
circuit 5 is applied to the non-inversion input terminal of the voltage 
comparator A.sub.2. In the control circuit 6, the voltage v.sub.ic applied 
to the non-inversion input terminal of the voltage comparator A.sub.2 and 
the voltage v applied to the inversion input terminal thereof are 
compared; thus, when v.sub.ic is higher than v, the transistor Q.sub.2 is 
turned on, whereas when v.sub.ic is lower than v, the transistor Q.sub.2 
is turned off. By the fact that the collector current i.sub.c of the 
transistor Q.sub.1 is made to increase linearly as mentioned above, the 
voltage v.sub.ic proportional to the collector i.sub.c is also made to 
increase linearly. At a point of time t.sub.1 shown in FIG. 2, the 
relationship between v.sub.ic and v becomes such that v.sub.ic is higher 
than v, and as a result, the transistor Q.sub.2 is turned on so that such 
a collector current i.sub.FB as shown in FIG. 2(D) is caused to flow 
therethrough. The collector current i.sub.FB acts in such a direction as 
to cancel out all the base current i.sub.b flowing in the transistor 
Q.sub.1 and also quickly extinquish even the accumulated carrier remaining 
in the transistor Q.sub.1. That is, when the output voltage v.sub.ic of 
the current detector circuit 5 exceeds the output voltage v of the error 
amplifier circuit 4, the transistor Q.sub.2 is turned on so that the 
transistor Q.sub.1 is quickly turned off. 
With the circuit arrangement of FIG. 1, the collector saturation voltage of 
the transistor Q.sub.1 is restricted so that the collector loss thereof is 
reduced, by supplying the base current n.multidot.i.sub.cp /h.sub.fe which 
is sufficiently greater than the base current which is required during the 
conduction of the transistor Q.sub.1 as will be seen from the base current 
waveform shown in FIG. 2(A). It is possible to further reduce the 
collector loss of the transistor Q.sub.1 which tends to occur when this 
transistor is in a non-conductive state, by detecting the collector 
current peak value i.sub.cp by the current detector circuit 5 and by 
rendering the control circuit 6 operative by the use of a signal resulting 
from the detection by the current detector circuit 5 so as to forcibly 
turn off the transistor Q.sub.1. In this way, the power conversion 
efficiency of the switching regulator can be enhanced. In addition, the 
carrier accumulation time of the transistor Q.sub.1 when the latter is in 
the non-conductive state, can be greatly shortened so that the maximum 
oscillation frequency can be increased, thus making it possible to secure 
a wide pulse modulation range for the switching regulator. With the 
circuit arrangement of FIG. 1, the load range can be widened at the lower 
load side, and yet any anomalous build-up of the output voltage V.sub.O 
which tends to be caused due to the frequency limit at a low load, can be 
prevented; as a result, the stability of the output voltage V.sub.O can be 
improved. The conduction time t.sub.ON of the transistor Q.sub.1 when the 
switching regulator shown in FIG. 1 is under the oscillatory condition, is 
given by 
##EQU3## 
where L.sub.1 is the inductance of the primary winding of the transformer 
T, R.sub.5 is the resistance for current detection, V.sub.i is the input 
voltage, and v is the output of the error amplifier circuit 4. As will be 
noted, the aforementioned conduction time t.sub.ON is a function of the 
output v of the error amplifier circuit 4. In the blocking oscillator 
ciruit 1, an oscillation which is pulse-width-modulated with respect to 
factors such as load variations, input variations and so forth, is 
produced whereby the excitation energy stored in the transformer T is 
controlled so that the output voltage V.sub.O is stabilized. 
It is particularly to be noted that the switching regulator is arranged to 
perform the below-mentioned over-current protecting function without any 
special overcurrent protecting circuit components incorporated therein. 
As mentioned above, the circuit of FIG. 1 is designed so that according to 
the foregoing equation (4), the conduction time t.sub.ON of the oscillator 
circuit 1 is controlled by the output v of the error amplifier circuit 
which is produced in accordance with the deviation of the output voltage 
V.sub.O from the reference voltage E.sub.1, thereby stabilizing the output 
voltage V.sub.O with respect to the input current I.sub.O. However, 
because of the fact that the power supplied to the error amplifier circuit 
4 is derived from the output voltage V.sub.O, the operation range of the 
error amplifier circuit output v is restricted by the output voltage 
V.sub.O. More specifically, because of the fact that the relationship 
between the error amplifier circuit output v and the output voltage 
V.sub.O is such that v is smaller than or equal to V.sub.O, the increase 
in the conduction time t.sub.ON which increases with the output current 
I.sub.O is limited when such conduction time is given by the following 
expression: 
##EQU4## 
Description will now be made of the relationship between the output voltage 
V.sub.O and the output current I.sub.O as there occurs an overcurrent, or 
as the output current I.sub.O is increased after the requirement as given 
by the equation (5) has been satisfied. 
In this case, since the output voltage V.sub.O is similar to the 
aforementioned equation (1), the input power P.sub.i and output power 
P.sub.o are given by the following equations (6) and (7) respectively: 
##EQU5## 
Assuming that the power conversion efficiency is 100%, then the input power 
P.sub.i is equal to the output power P.sub.o ; thus, the ratio of the 
conduction time t.sub.ON of the transistor Q.sub.1 to the non-conduction 
time thereof is derived from the equations (6) and (7) as follows: 
##EQU6## 
Furthermore, from the equations (5) and (8), the non-conduction time 
t.sub.OFF of the transistor Q.sub.1 when an overcurrent is detected, is 
obtained as follows: 
##EQU7## 
By eliminating t.sub.ON and t.sub.OFF from the equations (1), (5) and (9), 
the relationship between the output voltage V.sub.O and the load 
resistance R.sub.L when an overcurrent is detected, is obtained as 
follows: 
##EQU8## 
Further, the relationship between the output voltage V.sub.O and the output 
current I.sub.O is V.sub.O =I.sub.O R.sub.L ; thus, the output current 
I.sub.O can be written as follows: 
##EQU9## 
By eliminating the load resistance R.sub.L from the equations (10) and 
(11), the relationship between the output voltage V.sub.O and the output 
current I.sub.O can be rewritten as follows: 
##EQU10## 
It will be noted that the relationship defined by the equation (12) depicts 
a hyperbola with asymptotes defined by the output voltage V.sub.O 
=-V.sub.i .sqroot.L.sub.2 /L.sub.1 and the output current I.sub.O =V.sub.i 
/2R.sub.5 respectively. It is when the output v of the error amplifier 
circuit 4 is greater than the output voltage V.sub.O as mentioned above 
that the equation (12) holds true. When v is smaller than V.sub.O, i. e., 
when the output current I.sub.O is not an overcurrent, the output voltage 
V.sub.O is controlled to be stabilized by the reference voltage of the 
reference voltage element E.sub.1 as will be appreciated from the 
aforementioned equation (1). More specifically, when the output voltage 
V.sub.O is equal to or greater than 0 and the output voltage I.sub.O is 
equal to or greater than 0, the relationship between the output voltage 
V.sub.O and the output current I.sub.O is given by a combination of the 
equations (1) and (12) so that such overcurrent protecting function and 
so-called fold-back current falling characteristic or leftwardly falling 
characteristic shown in FIG. 4 can be achieved. 
The relationship between the output voltage V.sub.O and the output current 
I.sub.O as shown in FIG. 4 will next be explained briefly. 
In the case where the output current I.sub.O is within the rated value 
range and yet the output v of the error amplifier circuit 4 is within the 
operation range proprotional to the deviation of the reference voltage of 
the reference voltage of the reference voltage element E.sub.1, the 
relationship between V.sub.O and I.sub.O turns out to be as illustrated by 
the P-Q line in FIG. 4, and thus the output voltage V.sub.O is stabilized 
according to the aforementioned equation (1). In contrast thereto, in the 
case where the output current I.sub.O is an overcurrent outside the rated 
current range and yet is limited by the voltage applied to the error 
amplifier circuit 4, i. e., the DC output voltage V.sub.O obtained across 
the output terminals a and b, the relationship between V.sub.O and I.sub.O 
turns out to be as shown by the Q-O curve, and thus the output current 
I.sub.O is restricted according to the aforementioned equation (12). With 
circuit arrangement shown in FIG. 1, therefore, it is possible to achieve 
an overcurrent protecting function and so-called fold-back current falling 
characteristic such as shown by the P-Q-O curve in FIG. 4. 
With the circuit arrangement shown in FIG. 1, however, difficulties have 
been encountered in attempt to achieve a highly accurate design of the 
switching regulator and besides the overcurrent protecting function has 
not necessarily been satisfactory in that there is the tendency that the 
load current value at which the operation for overcurrent protection is 
initiated is fluctuated with variations in the input voltage such that the 
overcurrent protection is started at a point Q' when the input voltage 
V.sub.i is low whereas when the input voltage V.sub.i is high, the 
overcurrent protection is started at a point Q" as shown in FIG. 4, since 
the aforementioned load current value is a function of the input voltage 
V.sub.i as will also be appreciated from the foregoing equation (12). 
Accordingly, the present invention is intended to eliminate the 
aforementioned drawbacks of the switching regulator shown in FIG. 1, 
thereby providing an improved switching regulator wherein correction is 
made for dispersion with input fluctuations of the load current value at 
which the operation for overcurrent protection is initiated, thus 
achieving an enhanced accuracy. 
Referring to FIG. 5, there is shown the switching regulator according to an 
embodiment of the present invention, which will be described below. 
In this embodiment, there are provided a blocking oscillator circuit 11 
comprising the primary winding L.sub.1 and feedback winding L.sub.3 of a 
transformer T, a base resistor R.sub.1, a base capacitor C.sub.1, a 
starter resistor R.sub.2 and a transistor Q.sub.1, the blocking oscillator 
circuit 11 being arranged to be externally provided with a trigger signal 
by which the blocking oscillator is brought into an OFF state; an output 
rectifier circuit 12 which includes a first rectifier circuit comprising 
the secondary winding L.sub.2 of the transformer T, a a diode D.sub.1, a 
smoothing capacitor C.sub.2 and a second rectifier circuit comprising a 
diode D.sub.2 adapted to rectify on ON-ON output proportional to the input 
voltage and a smoothing capacitor C.sub.3 ; a voltage comparator circuit 
13 comprising a reference voltage element E.sub.1 and a voltage comparator 
A.sub.1 ; an error amplifier circuit 14 comprising resistors R.sub.4 and 
R.sub.6 and a transistor Q.sub.3 ; a current detecting circuit 15 
comprising a current detecting element such for example as a resistor 
R.sub.5, current transformer or the like; and a control circuit 16 
comprising a voltage comparator A.sub.2 and a transistor Q.sub.2, the 
control circuit 16 being arranged to impart to the blocking oscillator 
circuit 11 a trigger signal by which the blocking oscillator circuit 11 is 
brought into an OFF state. 
As will be seen, the operation of the major circuit portion of the 
arrangement described just above is similar to that of the arrangement 
shown in FIG. 1. Therefore, explanation of such operation will be omitted, 
and only the overcurrent protecting function will be described below. 
In the embodiment shown in FIG. 5, the power source for the error amplifier 
circuit 14 is derived from the difference between a voltage proportional 
to a DC output voltage obtained across a load resistor R.sub.L and a 
voltage proportional to an input voltage V.sub.i, and the operation range 
of the output v of this error amplifier circuit 14 is given by 
##EQU11## 
where k is a constant for proportion between the input voltage and the 
rectified output voltage, which is defined by the diode D.sub.2 and 
capacitor C.sub.3. Referring now to FIG. 6, there is illustrated the 
overcurrent protection characteristic of the circuit arrangement shown in 
FIG. 5, from which it will be seen that in order that the load current 
value at which the operation for overcurrent protection may be kept 
constant, the power at the operation starting point Q should also be 
constant. Thus, the circuit shown in FIG. 5 should be so designed as to 
make not only the transformer driving current but also the transformer 
driving power constant at the side of the primary winding of the 
transformer T. With the I.sub.O -I.sub.O characteristic shown in FIG. 6, 
for a higher input voltage V.sub.i, it is possible to shift the 
over-current protecting operation starting point from Q to Q" by 
decreasing the upper limit value of the operation range of the error 
amplifier circuit 14 by a quantity corresponding to an increment in the 
input voltage V.sub.i, whereas for a lower input voltage V.sub.i, it is 
possible to shift the aforementioned starting point from Q to Q'. In this 
way, the load current value at which the operation for overcurrent 
protection is initiated, can be kept substantially constant irrespective 
of input fluctuations. The circuit arrangement shown in FIG. 5 is arranged 
so that the upper limit value of the operation range of the error 
amplifier circuit 14 decreases with an increase in the input voltage 
V.sub. i as will be noted from the equation (13); thus, by optimally 
choosing the value for the proportion constant k and resistors R.sub.4 and 
R.sub.6 in the equation (13), it is possible to correct fluctuations of 
overcurrent protecting operation starting point which have been caused in 
the conventional circuit arrangement. 
Though, in the foregoing embodiment, the present invention was applied to a 
self-excitation type switching regulator employing a blocking oscillator, 
it is to be understood that the present invention is also applicable to a 
separate-excitation type switching regulator, whereby similar effects to 
those mentioned above can be produced. 
As will be appreciated from the above explanation, according to the present 
invention, there is provided an improved switching regulator which 
irrespective of the oscillation system employed therein, exhibits an 
excellent power conversion efficiency and is able to positively perform 
the overcurrent protecting function without any special overcurrent 
protecting circuit components incorporated therein. 
While the present invention has been described with respect to a specific 
embodiment thereof, it is to be understood that the present invention is 
not limited thereto in any way but covers any and all changes and 
modifications which will become possible within the scope of the appended 
claims.