Light emitting diode, light emitting diode module, and display device having the light emitting diode module

A light emitting diode including a lead frame unit and a light source unit disposed on the lead frame unit, in which the lead frame unit includes a body portion having a first surface contacting the light source unit and a second surface opposite to the first surface, at least one solder hole recessed from the second surface of the body portion, a first conductive layer disposed on the first surface of the body portion and including a circular portion having a substantially circular shape and an elongated portion provided integrally with the circular portion and elongating in one direction from the circular portion, a second conductive layer disposed on the second surface of the body portion, and a connection portion disposed between the first conductive layer and the second conductive layer and penetrating through the body portion.

BACKGROUND

Field

Exemplary embodiments of the invention relate generally to a light emitting diode, a light emitting diode module, and a display device having the light emitting diode module and, more specifically, to a light emitting diode, a light emitting diode module, and a display device having the same with improved reliability.

Discussion of the Background

In general, a light emitting diode is broadly classified into a top-emission type light emitting diode and a side-emission type light emitting diode. A side-emission type light emitting diode package, in which light is incident into a side surface of a light guide plate, is widely used as a light source for a backlight of a display device. In recent years, the side-emission type light emitting diode package is becoming more widely used and applied in many fields in addition to a backlight of a conventional display device.

Recently, as a thickness of the display device becomes thinner, a thickness of the side-emission type light emitting diode package is also becoming thinner. When the thickness of the side-emission type light emitting diode package decreases, a space between a light emitting diode chip and a reflector becomes narrower. As such, a design for heat dissipation is required according to a temperature rise from the narrowed space.

SUMMARY

A light emitting diode, a light emitting diode module, and a display device having the light emitting diode module constructed according to exemplary embodiments of the invention are free from disconnection and have excellent heat resistance.

A light emitting diode, a light emitting diode module, and a display device having the light emitting diode module according to exemplary embodiments also have a thin thickness and a high degree of integration.

A light emitting diode according to an exemplary embodiment includes a lead frame unit, and a light source unit disposed on the lead frame unit, the lead frame unit including a body portion having a first surface contacting the light source unit and a second surface opposite to the first surface, the body portion including at least one solder hole recessed from the second surface of the body portion, a first conductive layer disposed on the first surface of the body portion and including a circular portion having a substantially circular shape and an elongated portion provided integrally with the circular portion and elongating in one direction from the circular portion, a second conductive layer disposed on the second surface of the body portion, and a connection portion disposed between the first conductive layer and the second conductive layer and penetrating through the body portion.

The elongated portion may have a width less than a diameter of the circular portion.

The connection portion may overlap at least a portion of the circular portion in a plan view.

The connection portion may be disposed on a through hole defined through the body portion and may include a connection portion conductive layer disposed on a surface of the through hole, a plug disposed on the connection portion conductive layer and filling the through hole, and a cover plate disposed on the through hole to cover the through hole.

The cover plate may have a same shape as the connection portion conductive layer on the first surface and the second surface of the body portion.

The lead frame unit may have a third surface connecting the first surface and the second surface, and the solder hole may be defined over the second surface and the third surface.

The solder hole may have a substantially semi-circular or substantially semi-elliptical shape in the second surface of the body portion, and may have a substantially pentagonal shape in the third surface, and at least one internal angle defined by the pentagonal shape may be in a range from about 120 degrees to about 170 degrees.

The solder hole may have a substantially semi-circular or substantially semi-elliptical shape in the second surface of the body portion, and a radius of the substantially semi-circular or substantially semi-elliptical shape may be in a range from about 10% to about 50% of a thickness of the body portion.

The light emitting diode may further include a solder insulating layer disposed on the second surface, in which the solder insulating layer may cover at least a portion of the second conductive layer disposed between the solder holes.

The solder hole and the connection portion may be spaced apart from each other by at least about 50 μm when viewed from the second surface.

The light source unit may include a first light emitting diode chip and a second light emitting diode chip disposed on the lead frame unit to be substantially parallel to each other.

The light emitting diode may further include a first wavelength converter and a second wavelength converter configured to emit light having a same wavelength as each other, the first wavelength converter may be disposed on the first light emitting diode chip to convert a wavelength of light emitted from the first light emitting diode chip to a first wavelength band, the second wavelength converter may be disposed on the second light emitting diode chip to convert a wavelength of light emitted from the second light emitting diode chip to a second wavelength band different from the first wavelength band.

A light transmission portion may be disposed on the first wavelength converter and the second wavelength converter, and the first wavelength converter and the second wavelength converter may have a thickness smaller than a thickness of the light transmission portion.

The first light emitting diode chip and the second light emitting diode chip may be configured to emit light having a same wavelength as each other.

The first conductive layer may include a first upper electrode electrically connected to the first light emitting diode chip, a second upper electrode electrically connected to the first light emitting diode chip, a third upper electrode electrically connected to the second light emitting diode chip, and a fourth upper electrode electrically connected to the second light emitting diode chip.

The first light emitting diode chip and the second light emitting diode chip may overlap at least a portion of the first conductive layer in a plan view.

The light source unit may include a first light emitting diode chip and a second light emitting diode chip, and the first light emitting diode chip and the second light emitting diode chip may be spaced apart from each other by a first interval when viewed from a top of the light source unit. At least one of the first light emitting diode chip and the second light emitting diode chip may be spaced apart from an edge of the light source unit by a light emitting diode chip margin when viewed from a top of the light source unit, and the first interval may be greater than the light emitting diode chip margin.

The light source unit may have substantially a rectangular shape with long sides and short sides when viewed in a top view, the first light emitting diode chip and one short side of the light source unit adjacent to the first light emitting diode chip may be spaced apart from each other by a second interval, and the second light emitting diode chip and the other short side of the light source unit adjacent to the second light emitting diode chip may be spaced apart from each other by a third interval. The first interval is greater than the second interval and the third interval.

A light emitting diode package according to another exemplary embodiment includes a lead frame unit, a light source unit disposed on the lead frame unit, an external frame disposed at one side portion of the lead frame unit, and a solder ball connecting the lead frame unit to the external frame, in which the lead frame unit includes a body portion having a first surface contacting the light source unit, a second surface opposite to the first surface, and a third surface connecting the first surface and the second surface, the body portion including at least one solder hole recessed from the second surface and the third surface, a first conductive layer disposed on the first surface of the body portion, a second conductive layer disposed on the second surface of the body portion, and a through hole disposed between the first conductive layer and the second conductive layer and penetrating the body portion.

A shape of the solder hole from the second surface may be different from a shape of the solder hole from the third surface.

The external frame may be disposed to face the third surface of the body portion, the light source unit may include at least one light emitting diode chip, and a direction to which light emitted from the light emitting diode chip travels is substantially perpendicular to a direction in which the external frame is coupled to the body portion.

The through hole may be defined to be substantially parallel to the external frame, and the through hole and the solder hole may be spaced apart from each other.

The solder paste may be disposed in a first area between the second conductive layer and the external frame and a second area outside the body portion, and the solder paste disposed in the second area may cover at least a portion of the second conductive layer.

The light emitting diode package may further include a solder insulating layer disposed on the second surface, in which the solder insulating layer may cover at least a portion of the second conductive layer disposed between the solder holes.

DETAILED DESCRIPTION

Hereinafter, exemplary embodiments of the present disclosure will be explained in detail with reference to the accompanying drawings.

FIG. 1is a perspective view of a light emitting diode10according to an exemplary embodiment.

Referring toFIG. 1, the light emitting diode10includes a lead frame unit100and a light source unit200mounted on the lead frame unit100.

The light source unit200is disposed on an upper surface of the lead frame unit100, which provides a lead frame structure for connecting a light emitting diode chip included in the light source unit200to an external circuit. More particularly, the lead frame unit100is connected to first and second electrode pads of the light emitting diode chip included in the light source unit200, and supplies a power necessary to emit light from the light source unit200.

The light source unit200emits a light with a predetermined wavelength in response to the power applied thereto from the outside. For example, the light source unit200includes the light emitting diode chip, a transparent portion disposed on a front surface of the light emitting diode chip, and a housing surrounding the light emitting diode chip and the transparent portion, and emits light with the predetermined wavelength through the transparent portion. In some exemplary embodiments, the light source unit200may further include, for example, a wavelength converter that converts the wavelength of light emitted from the light emitting diode chip.

FIG. 2Ais a perspective view of the light emitting diode according to an exemplary embodiment.FIG. 2Bis a cross-sectional view taken along line I-I′ ofFIG. 2Aaccording to an exemplary embodiment, andFIG. 2Cis a cross-sectional view taken along line I-I′ ofFIG. 2Aaccording to another exemplary embodiment.FIG. 2Dis a cross-sectional view of a light emitting diode in which a lead frame unit and a light emitting unit are coupled to each other ofFIG. 2A.

Referring toFIGS. 1, 2A, and 2B, the lead frame unit100includes a body portion110, a first conductive layer120, a second conductive layer130, a connection portion140, a solder hole150, and a solder insulating layer160.

The body portion110has an insulating property and serves as a base, on which the first conductive layer120, the second conductive layer130, the connection portion140, and the solder hole150are provided.

The body portion110may be formed of a material having the insulating property. For example, the body portion110may include an organic polymer material. As the organic polymer material, at least one resin selected from an acrylic-based resin, a polyester-based resin, a polyurethane-based resin, an epoxy-based resin, a vinyl-based resin, a polystyrene-based resin, a polyamide-based resin, and a urea-based resin may be used. However, the inventive concepts are not limited thereto, as long as the material for the body portion110has an insulating property.

The body portion110may have a substantially rectangular parallelepiped shape. In particular, the body portion110may have a shape defined by a relatively long length and a relatively small height, and thickness to mount a plurality of light emitting diode chips20and20′. However, the inventive concepts are not limited to on shape of the body portion110, and in some exemplary embodiments, the body portion110may have various shapes other than the rectangular parallelepiped shape.

The body portion110may include a first surface, a second surface, and a third surface. The first surface of the body portion110may be a surface that makes contact with the light source unit200, the second surface may be a surface that is opposite to the first surface, and the third surface may be a surface that connects the first surface and the second surface. As such, hereinafter, the first surface may be referred to as the upper surface of the body portion110, the second surface may be referred to as the lower surface of the body portion110, and the third surface may be referred to as the side surface of the body portion110.

The first conductive layer120is disposed on the upper surface of the body portion110and electrically connected to the light emitting diode chips20and20′. In particular, the first conductive layer120may be electrically connected to pad portions39a,39b,39a′, and39b′ of the light emitting diode chips20and20′. The power may be supplied to the light emitting diode chips20and20′ via the first conductive layer120.

The first conductive layer120may include a plurality of cathodes and anodes. For example, the first conductive layer120may include a first upper electrode121, a second upper electrode122, a third upper electrode123, and a fourth upper electrode124, and each of the first, second, third, and fourth upper electrodes121,122,123, and124may serve as the cathode or the anode.

The first upper electrode121, the second upper electrode122, the third upper electrode123, and the fourth upper electrode124may be disposed on the upper surface of the body portion110to be parallel to each other. In particular, the first conductive layer120may be provided such that the first upper electrode121and the fourth upper electrode124are disposed at outermost positions of the body portion110, and the second upper electrode122and the third upper electrode123are disposed between the first upper electrode121and the fourth upper electrode124.

When the first upper electrode121and the third upper electrode123serve as the cathode and the second upper electrode122and the fourth upper electrode124serve as the anode, a first electrode pad39aof a first light emitting diode chip20connected to the first upper electrode121may be a p-type, and a second electrode pad39bof the first light emitting diode chip20connected to the second upper electrode122may be an n-type. A first electrode pad39a′ of a second light emitting diode chip20′ may be the p-type, and a second electrode pad39b′ of the second light emitting diode chip20′ may be the n-type.

When the second upper electrode122and the fourth upper electrode124serve as the anode, a user may identify whether the first light emitting diode chip20and the second light emitting diode chip20′ disposed on the lead frame unit100are normally operated by substantially simultaneously applying signals to the first, second, third, and fourth upper electrodes121,122,123, and124. For example, a driving signal provided via a first lower electrode131is discharged to a third lower electrode133after sequentially passing through the first, second, third, and fourth upper electrodes121,122,123, and124. In this case, the user may identify whether the first light emitting diode chip20and the second light emitting diode chip20′ are normally operated.

In addition, different power may be applied to a pair of the first upper electrode121and the second upper electrode122, and a pair of the third upper electrode123and the fourth upper electrode124. In this manner, the first light emitting diode chip20and the second light emitting diode chip20′ may be independently operated. For example, the first light emitting diode chip20and the second light emitting diode chip20′ may be independently operated by respectively connecting an anode and a cathode of a first external power source to the first upper electrode121and the second upper electrode122, respectively connecting an anode and a cathode of a second external power source to the third upper electrode123and the fourth upper electrode124, and controlling on/off of the first external power source and the second external power source.

However, the inventive concepts are not limited to a particular arrangement of the first upper electrode121, the second upper electrode122, the third upper electrode123, and the fourth upper electrode124, and the arrangement thereof may be various modified.

The first, second, third, and fourth upper electrodes121,122,123, and124may be arranged to be spaced apart from each other to prevent the first, second, third, and fourth upper electrodes121,122,123, and124from being short-circuited with each other.

The first conductive layer120may include a cover plate and a bump. For example, the first upper electrode121may include a first cover plate141_3and a first bump41. However, in some exemplary embodiments, the first bump41may be omitted. In this case, the first cover plate141_3may form the first upper electrode121.

The bumps may be formed in the first, second, third, and fourth upper electrodes121,122,123, and124, and in particular, first, second, third, and fourth bumps41,42,43, and44may be respectively included in the first, second, third, and fourth upper electrodes121,122,123, and124.

The first, second, third, and fourth bumps41,42,43, and44are disposed between the first and second light emitting diode chips20and20′ and the body portion110to assist electrical connection between the first and second light emitting diode chips20and20′ and the body portion110. The first, second, third, and fourth bumps41,42,43, and44may be formed of a conductive paste. For example, the first, second, third, and fourth bumps41,42,43, and44may include metal, such as Cu, AuSn, Al, Au, and Ag.

The second conductive layer130is disposed on the lower surface of the body portion110and electrically connected to an electrode of an external frame. As described above, the second surface or the lower surface of the body portion110may be a surface opposite to the first surface or the upper surface of the body portion110, on which the first conductive layer120is disposed.

The second conductive layer130is disposed above at least a portion of the solder hole150defined in the body portion110. Accordingly, the second conductive layer130has a shape that covers a portion of the lower surface of the body portion110and the solder hole150.

The second conductive layer130may include Cu, Ni, and Au sequentially stacked one on another. In this case, Au may be disposed at an outermost position, and Cu may be disposed at an innermost position. When the second conductive layer130includes Cu, Ni, and Au, the second conductive layer130may be formed by an electroless plating method. In this case, Cu in the second conductive layer130may enhance electrical conductivity, and Au in the second conductive layer130may increase a bonding force or a solderability between the solder paste, which is provided on the second conductive layer130. In addition, Ni provided between Cu and Au may serve as a barrier metal that prevents Au from being diffused into Cu.

Since the second conductive layer130has the multi-layer structure of Cu, Ni, and Au, the electrical conductivity and the bonding force with the solder paste may be improved.

The second conductive layer130may include a plurality of conductive patterns spaced apart from each other. For example, the second conductive layer130may include the first lower electrode131, a second lower electrode132, and the third lower electrode133.

The first lower electrode131, the second lower electrode132, and the third lower electrode133may be disposed on the lower surface of the body portion110to be parallel to each other. In addition, the first lower electrode131, the second lower electrode132, and the third lower electrode133may be spaced apart from each other by a predetermined distance to prevent the first lower electrode131, the second lower electrode132, and the third lower electrode133from being short-circuited with each other.

In addition, the second lower electrode132may be provided as two portions spaced apart from each other or as a single portion. When the second lower electrode132is provided as two portions spaced apart from each other, the two portions may be connected to a second connection portion142and a third connection portion143, respectively.

The first lower electrode131, the second lower electrode132, and the third lower electrode133may be disposed to overlap with the first upper electrode121, the second upper electrode122, the third upper electrode123, and the fourth upper electrode124when viewed in a plan view. For example, the first lower electrode131may be disposed to overlap with the first upper electrode121when viewed in a plan view, the third lower electrode133may be disposed to overlap with the fourth upper electrode124when viewed in a plan view, and the second lower electrode132may be disposed to overlap with the second and third upper electrodes122and123when viewed in a plan view.

The first lower electrode131, the second lower electrode132, and the third lower electrode133may perform different functions from each other on the lead frame unit100. For example, the first lower electrode131may serve as the cathode, and the third lower electrode133may serve as the anode. The second lower electrode132may be provided as two portions spaced apart from each other, and the portion closer to the first lower electrode131may serve as the anode, and the portion closer to the third lower electrode133may serve as the cathode.

According to another exemplary embodiment, the first lower electrode131and the third lower electrode133may serve as the cathode, and the second lower electrode132provided as a single portion may serve as the anode.

The connection portion140is disposed between the first conductive layer120and the second conductive layer130and penetrates through the body portion110. The connection portion140has a conductivity. Therefore, the first conductive layer120and the second conductive layer130may be electrically connected to each other by the connection portion140.

The connection portion140penetrates the body portion110in a height direction. In particular, the connection portion140penetrates the body portion110in a direction substantially perpendicular to the upper or lower surface of the body portion110.

At least a portion of the connection portion140may be disposed above a through hole defined through the body portion110, and a portion of the connection portion140may have a shape determined by the shape of the through hole.

The connection portion140may be provided in a plural number. The connection portion140may include a first connection portion141, the second connection portion142, the third connection portion143, and a fourth connection portion144. The first, second, third, and fourth connection portions141,142,143, and144may be connected to the first conductive layer120and the second conductive layer130. For example, the first connection portion141may connect the first upper electrode121of the first conductive layer120to the first lower electrode131of the second conductive layer130. The second and third connection portions142and143may connect the second and third upper electrodes122and123to the second lower electrode132. The fourth connection portion144may connect the fourth upper electrode124to the third lower electrode133.

As the connection portion140connects the electrodes disposed on the upper and lower surfaces of the body portion110, the driving signal and the power from the outside may be applied to the light emitting diode chips20and20′ through the second conductive layer130, the connection portion140, and the first conductive layer120. In particular, since one second lower electrode132is connected to two upper electrodes122and123, the same driving signal and power may be applied to the two upper electrodes122and123. More particularly, the first light emitting diode chip20mounted on the second upper electrode122and the second light emitting diode chip20′ mounted on the third upper electrode123may be connected to each other in series.

The connection portion140may be provided in a VIA plug form. For example, with reference to the first connection141, the first connection portion141may include a connection portion conductive layer141_1, a plug141_2, and a cover plate141_3.

The connection portion conductive layer141_1may disposed on a surface that defines the through hole penetrating through the body portion110. For example, the connection portion conductive layer141_1may be a thin conductive layer covering the surface that defines the through hole. Accordingly, the connection portion conductive layer141_1may include a conductive material. As the conductive material, metal, such as Au, Pt, Pd, Rh, Ni, W, Mo, Cr, Ti, Fe, Cu, Al, Ag, In, and Sn, oxides thereof, and/or nitrides thereof may be used. The connection portion conductive layer141_1may be formed on the surface that defines the through hole by plating the metal described above.

The connection portion conductive layer141_1is electrically connected to the first conductive layer120on the upper surface of the body portion110and electrically connected to the second conductive layer130on the lower surface of the body portion110.

The plug141_2may be formed by filling an electrically conductive material or an electrically nonconductive material in the through hole and on the connection portion conductive layer141_1. Accordingly, the shape of the plug141_2may be changed depending on the shape of the through hole and the connection portion conductive layer141_1. For example, when the through hole has a cylindrical shape, the plug141_2filled in the through hole may also have a substantially cylindrical shape.

In an exemplary embodiment, the plug141_2may fill the through hole tightly. As the plug141_2fills the through hole, a structural stability of the connection portion140may be improved.

For example, the connection portion conductive layer141_1having a thin film shape may be broken by a distortion of the body portion110or an external impact. However, since the plug141_2provided with the connection portion conductive layer141_1buffers the distortion of the body portion110or the external impact, the connection portion conductive layer141_1may be protected therefrom. As such, the structural stability of the connection portion140may be improved.

The plug141_2may be formed of the electrically conductive material or the electrically nonconductive material. The electrically conductive material may be a Cu paste, and the electrically nonconductive material may be an epoxy resin. When the plug141_2is formed using the Cu paste, the plug141_2may serve as a heat exhaust port through which heat generated from the light source unit escapes.

The cover plate141_3is disposed above the upper surface and/or the lower surface of the body portion110to cover the through hole. The cover plate141_3may reinforce the electrical connection and the mechanical connection between the connection portion140and the first and second conductive layers120and130. In detail, the cover plate141_3is provided to cover an upper surface and/or a lower surface of the connection portion conductive layer141_1and prevents the connection portion conductive layer141_1from being disconnected from the first conductive layer120or the second conductive layer130.

The cover plate141_3may overlap with the connection portion conductive layer141_1when viewed in a plan view. In detail, since the cover plate141_3is provided to cover the connection portion conductive layer141_1, the connection portion conductive layer141_1may not be exposed on the upper surface or the lower surface of the body portion110. In this case, the cover plate141_3may have substantially the same shape as the connection portion conductive layer141_1on the upper surface and the lower surface of the body portion110.

The solder hole150may have a shape recessed from the lower surface of the body portion110by removing a portion of the lower surface of the body portion110. In detail, the solder hole150may have a shape, in which a portion of the lower surface is removed to a predetermined depth, and thus, the solder hole150formed over the second surface (or the bottom surface) and the third surface (or the side surface) of the body portion110may be provided.

The solder hole150may have different shapes when viewed from the second and third sides of the body portion110. For example, the solder hole150may have a semi-circular shape or a semi-elliptical shape when viewed from the second side of the body portion110. In addition, the solder hole150may have a pentagonal shape when viewed on the third side of the body portion110. Detailed descriptions of the shape of the solder hole150will be described later.

The solder hole150allows the light emitting diode10to be connected to an external frame. In detail, the light emitting diode10and the external frame may be connected to each other by the solder paste provided in the solder hole150.

The solder hole150may be provided in a plural number. According to an exemplary embodiment, for example, the solder hole150may include a first solder hole151, a second solder hole152, and a third solder hole153. The first, second, and third solder holes151,152, and153may be provided to be spaced apart from each other. In addition, the first, second, and third solder holes151,152, and153may have the same or different shapes.

The solder hole150may be spaced apart from the through hole. Accordingly, an unnecessary connection between the solder hole150and the through hole may be prevented from occurring.

The second conductive layer130may be provided in the solder hole150. Accordingly, when the solder paste is provided in the solder hole150, the second conductive layer130and the solder paste may be connected to each other. The second conductive layer130provided in the solder hole150may be connected to at least one of the first lower electrode131, the second lower electrode132, and the third lower electrode133.

According to an exemplary embodiment, since the first, second, third solder holes151,152, and153are provided in the light emitting diode10, a stable electrical and mechanical connection may be established between the light emitting diode10and the external frame. In particular, the solder hole150according to an exemplary embodiment may have the semi-circular or semi-elliptical shape when viewed on the lower surface of the body portion110, and may have the pentagonal shape when viewed on the side surface of the body portion110, and thus, the light emitting diode10and the external frame may be more stably connected to each other. The shape of the solder hole150will be described in detail later.

The solder insulating layer160is formed on the lower surface of the body portion110.

The solder insulating layer160is disposed between the first, second, and third solder holes151,152, and153to prevent a short circuit between the second conductive layer130and/or the solder paste provided in the first, second, and third solder holes151,152and153. The solder insulating layer160may have various shapes. The shape of the solder insulating layer160will be described in detail later.

In some exemplary embodiments, the solder insulating layer160may be omitted when the light source unit includes the first light emitting diode chip20and the second light emitting diode chip20′.

The light source unit200may include a light transmission portion220and the first and second light emitting diode chips20and20′. The first and second light emitting diode chips20and20′ may emit lights having the same wavelength or different wavelengths. For example, the first and second light emitting diode chips20and20′ may emit lights having the wavelength of about 449 nm. As another example, the first and second light emitting diode chips20and20′ may emit lights having the wavelengths of about 448 nm and about 450 nm, respectively, or lights having the wavelengths of about 447 nm and about 451 nm, respectively. Although the first and second light emitting diode chips20and20′ emit lights having different wavelengths from each other, the light source unit200may be manufactured such that an average wavelength of lights emitted from the first light emitting diode chip20and the second light emitting diode chip20′ is about 449 nm. However, the inventive concepts are not limited thereto, and in some exemplary embodiments, each of the first light emitting diode chip20and the second light emitting diode chip20′ may emit light having a wavelength different from the wavelength of about 449 nm.

The first light emitting diode chip20and the second light emitting diode chip20′ may be substantially simultaneously operated or independently operated.

The first light emitting diode chip20includes the first electrode pad39aand the second electrode pad39b. The second light emitting diode chip20′ includes two electrode pads39a′ and39b′. In the first light emitting diode chip20, the first electrode pad39ais electrically connected to the first upper electrode121, and the second electrode pad39bis electrically connected to the second upper electrode122. Accordingly, the electrical signal may be applied to the first light emitting diode chip20via the first electrode pad39aand the second electrode pad39b.

The first, second, third, and fourth upper electrodes121,122,123, and124may function differently depending on the connection form with the external power source. For example, the first upper electrode121and the fourth upper electrode124may serve as the cathode, and the second upper electrode122and the third upper electrode123may serve as the anode. In some exemplary embodiments, the first upper electrode121and the third upper electrode123may serve as the cathode, and the second upper electrode122and the fourth upper electrode124may serve as the anode.

The first electrode pad39aand the second electrode pad39bmay be disposed to overlap with the first upper electrode121and the second upper electrode122, respectively, when viewed in a plan view. In addition, the first electrode pad39aand the second electrode pad39bmay have a size greater than, smaller than, or equal to a size of the first upper electrode121and the second upper electrode122. Since the above-mentioned components overlap with each other when viewed in a plan view, and the first upper electrode121and the second upper electrode122have a relatively large surface area, the first light emitting diode chip20may be easily mounted on the lead frame unit100.

Referring toFIG. 2C, a first bump conductive layer and a second bump conductive layer may be further disposed above the first bump41. The first bump conductive layer and the second bump conductive layer may be sequentially stacked above the first bump41. The first bump conductive layer and the second bump conductive layer may assist the electrical connection and the mechanical connection between the first upper electrode121and the first electrode pad39a. More particularly, the first bump conductive layer may cover a side surface of the first bump41, thereby rendering the electrical connection and the mechanical connection more stable. According to an exemplary embodiment, the first bump conductive layer may include nickel (Ni), and the second bump conductive layer may include gold (Au).

Referring toFIG. 2D, the light source unit200may include the first light emitting diode chip20, the second light source diode chip20′, the wavelength converter210, and the light transmission portion220.

The wavelength converter210may be disposed on the first light emitting diode chip20and the second light source diode chip20′ and may convert the wavelength of the light emitted from the first light emitting diode chip20and the second light source diode chip20′ to a specific wavelength band.

The wavelength converter210may include a fluorescent material to perform the above function of converting the wavelength band. The fluorescent material included in the wavelength converter210may absorb the light emitted from the first light emitting diode chip20and the second light emitting diode chip20′ and may emit a light having a wavelength band different from the absorbed light.

The fluorescent material included in the wavelength converter210may be, but not limited to, a fluorine-based fluorescent material. When the wavelength converter210includes the fluorine-based fluorescent material, a wavelength conversion efficiency may be superior, but the fluorescent material may be vulnerable to moisture. Since the light emitting diode according to an exemplary embodiment of the present disclosure has a structure that prevents the moisture from entering the wavelength converter210, there is no risk of deterioration of the fluorescent material by moisture while using a highly efficient fluorescent material. The structure of the wavelength converter210that performs the above-described function will be described in detail hereinbelow.

The wavelength converter210may include a plurality of layers spaced apart from each other. For example, the wavelength converter210disposed on the first light emitting diode chip20and the wavelength converter210disposed on the second light emitting diode chip20′ may be different types from each other. As an example, a first wavelength converter is disposed on the first light emitting diode chip20, a second wavelength converter is disposed on the second light emitting diode chip20′, and the first wavelength converter and the second wavelength converter may be different types from each other. Accordingly, although the first light emitting diode chip20and the second light emitting diode chip20′ emit the lights having the same wavelength, the lights emitted from the light transmission portion220after passing through the wavelength converter210may have different wavelengths from each other. For example, when the first light emitting diode chip20and the second light emitting diode chip20′ emit a white light, light exiting from an area provided with the first light emitting diode chip20may be light having a blue wavelength band, and light exiting from an area provided with the second light emitting diode chip20′ may be light having a red wavelength band.

The light transmission portion220transmits lights emitted from the first light emitting diode chip20and the second light emitting diode chip20′ to the outside. Therefore, the light transmission portion220may be optically transparent. The light transmission portion220may perform a protective function to prevent the first light emitting diode chip20and the second light emitting diode chip20′ from being damaged by external impact or moisture.

The light transmission portion220may include a partition wall disposed between the first light emitting diode chip20and the second light emitting diode chip20′. The partition wall may prevent a color mixture of light emitted from the first light emitting diode chip20and the second light emitting diode chip20′.

According to an exemplary embodiment, the wavelength converter210has a wavelength converter thickness T1in a cross-section, and the light transmission portion220has a light transmission portion thickness T2. In this case, the wavelength converter thickness T1may be smaller than the light transmission portion thickness T2. The wavelength converter210may be configured to have a relatively high density of the fluorescent material, and thus the wavelength conversion may sufficiently occur even when the wavelength converter210having a relatively small thickness is used. Therefore, the wavelength conversion may be sufficiently performed even though the wavelength converter thickness T1is smaller than the light transmission portion thickness T2. Since the wavelength converter thickness T1is smaller than the light transmission portion thickness T2, the light emitting diode may be slim.

When viewed in a plan view, the first light emitting diode chip20has a light emitting diode chip width H1, the wavelength converter210has a wavelength converter width H2, and the light transmission portion220has a light transmission portion width H3. The light emitting diode chip width H1may be smaller than the wavelength converter width H2, and the wavelength converter width H2may be smaller than the light transmission portion width H3. Thus, when viewed from a cross-section, the first light emitting diode chip20, the wavelength converter210, and the light transmission portion220may be sequentially stacked in a stepped shape.

As the light transmission portion width H3is greater than the wavelength converter width H2in the light source unit200, moisture may be prevented from entering the wavelength converter210along an edge of the light transmission portion220. In addition, since the light transmission portion thickness T2is relatively large, moisture may be prevented from entering the wavelength converter210after passing through the light transmission portion220. Accordingly, although the density of the fluorescent material in the wavelength converter210is high, there is no risk of deformation and deterioration of the fluorescent material by moisture.

Since the wavelength converter width H2is greater than the light emitting diode chip width H1in the light source unit200, the light emitted from the first light emitting diode chip20and/or the second light emitting diode chip20′ may be incident into the wavelength converter210without loss. Therefore, the light efficiency of the light emitting diode is superior because no light is lost.

According to an exemplary embodiment, since the light transmission portion width H3is greater than the wavelength converter width H2in the light source unit200, a high efficiency wavelength converter210having the high fluorescent material density may be used, and thus the wavelength converter thickness T1may become relatively thin. Accordingly, the light emitting diode according to the exemplary embodiment may be slim with excellent light efficiency.

Hereinafter, the first conductive layer120and the second conductive layer130provided on the upper and lower surfaces of the body portion110will be more described in detail.

FIGS. 3A to 3Eare plan views showing a first surface and a second surface of a lead frame unit according to exemplary embodiments.

Referring toFIG. 3A, the first conductive layer120is disposed on the first surface (or the upper surface) of the body portion110. The first conductive layer120may include a plurality of patterns spaced apart from each other. For example, the first conductive layer120may include the first upper electrode121, the second upper electrode122, the third upper electrode123, and the fourth upper electrode124.

Hereinafter, the structure and functions of the first conductive layer120according to an exemplary embodiment will be described with reference to the first upper electrode121. It is noted that, however, the structures and functions of the first upper electrode121may be applied to the second upper electrode122, the third upper electrode123, and the fourth upper electrode124.

The first upper electrode121includes a circular portion121_1and an elongated portion121_2.

The circular portion121_1has a substantially circular shape and is provided integrally with the elongated portion121_2. As shown inFIG. 3A, the circular portion121_1has a diameter Wp greater than a width We of the elongated portion121_2. Since the diameter Wp of the circular portion121_1is greater than the width We of the elongated portion121_2, the through hole may be easily formed in the circular portion121_1.

The circular portion121_1and the connection portion140may be disposed to overlap with each other when viewed in a plan view. Accordingly, a position of the circular portion121_1may be determined depending on a position of the connection portion140. For example, as shown inFIG. 3A, the circular portions of the first and second upper electrodes121and122are disposed to be spaced apart from each other with the elongated portions of the first and second upper electrodes121and122interposed therebetween, and the circular portions of the second and third upper electrodes122and123are disposed to be closer to each other without the elongated portions of the second and third upper electrodes122and123interposed therebetween.

In more detail, the circular portions is disposed as shown inFIG. 3Abecause the second and third upper electrodes122and123share one second lower electrode132. The second connection portion142and the third connection portion143are required to overlap with the second lower electrode132when viewed in a plan view to connect the second and third upper electrodes122and123to the second lower electrode132. To this end, the second connection portion142and the third connection portion143are positioned close to each other, and the circular portions corresponding to the second connection portion142and the third connection portion143are also positioned close to each other. However, the inventive concepts are not limited thereto, and the positions of the circular portions may be changed depending on the arrangement of the anode and cathode.

The elongated portion121_2is disposed at one side of the circular portion121_1and formed integrally with the circular portion121_1. The elongated portion121_2connects the light emitting diode chip disposed on the first conductive layer120to the first conductive layer120. In detail, the pad portion disposed under the light emitting diode chip may be placed on the elongated portion121_2of the first conductive layer120. Accordingly, the driving signal and the power may be applied to the light emitting diode chip via the elongated portion121_2.

The elongated portion121_2has the width We smaller than that of the circular portion121_1but has a length longer than that of the circular portion121_1. In detail, the elongated portion121_2may have a shape elongated substantially parallel to a longitudinal direction of the upper surface of the body portion110. Since the elongated portion121_2has a shape elongated substantially parallel to the longitudinal direction, the pad portion of the light emitting diode chip may be easily placed on the elongated portion121_2. That is, since an area of the elongated portion121_2, which makes contact with the pad portion of the light emitting diode chip, is wide, the light emitting diode chip may be easily mounted on the elongated portion121_2.

The circular portion121_1and the elongated portion121_2may be disposed in the body portion110when viewed in a plan view. Accordingly, when the light emitting diode is viewed from the side surface, the elongated portion121_2and the circular portion121_1may not be exposed to the outside. The diameter Wp of the circular portion121_1may be smaller than the thickness Wt of the body portion110so as not to expose the elongated portion121_2and the circular portion121_1at the side surface of the body portion110.

For example, the diameter Wp of the circular portion121_1may be within a range from about 30% to about 60% of the thickness Wt of the body portion110. When the circular portion121_1has the diameter Wp described above, the through hole may be more easily formed, and the circular portion121_1may not be exposed at the side surface of the body portion110. In addition, since the first upper electrode121is not exposed at the side surface of the body portion110, the first upper electrode121may be prevented from being oxidized by external oxygen and moisture. Further, the moisture may be prevented from entering the lead frame unit100along the first upper electrode121, and the exposed first upper electrode121and other components may be prevented from being short-circuited with each other.

A thickness We of the elongated portion121_2may be within a range from about 30% to about 60% of the thickness Wt of the body portion110. Since the thickness We of the elongated portion121_2is relatively smaller than the thickness Wt of the body portion110, the elongated portion121_2may be stick out from the body portion110. Thus, the elongated portion121_2may be prevented from being short-circuited with other components.

The width We of the elongated portion121_2may be smaller than the diameter Wp of the circular portion121_1. Accordingly, a via hole may be stably formed in the circular portion121_1having a relatively large diameter. However, in some exemplary embodiments, the width of the elongated portion121_2may be equal to the diameter of the circular portion121_1. Various shapes of the circular portion121_1and the elongated portion121_2will be described in more detail later.

Referring toFIGS. 3B and 3C, the first light emitting diode chip20and the second light emitting diode chip20′ are mounted on the upper surface of the body portion110.

In this case, the first light emitting diode chip20and the second light emitting diode chip20′ are disposed such that at least a portion of the first light emitting diode chip20and the second light emitting diode chip20′ overlaps with the first, second, third, and fourth upper electrodes121,122,123, and124when viewed in a plan view.

According toFIG. 3B, the first light emitting diode chip20and the second light emitting diode chip20′ cover some portions of the first, second, third, and fourth upper electrodes121,122,123, and124when viewed in a plan view, while exposing some portions of the first, second, third, and fourth upper electrodes121,122,123, and124when viewed in a plan view. For example, as shown in figures, the elongated portions of the first, second, third, and fourth upper electrodes121,122,123, and124may be covered by the first light emitting diode chip20and the second light emitting diode chip20′, however, some portions of the circular portions of the first, second, third, and fourth upper electrodes121,122,123, and124may be exposed.

In this manner, the first light emitting diode chip20and the second light emitting diode chip20′ having relatively small sizes may be easily mounted on the first, second, third, and fourth upper electrodes121,122,123, and124, which occupy a relatively larger area.

Referring toFIG. 3C, according to another exemplary embodiment, the first light emitting diode chip20and the second light emitting diode chip20′ are disposed to completely cover the first, second, third, and fourth upper electrodes121,122,123, and124when viewed in a plan view.

In this case, the areas at which the first light emitting diode chip20and the second light emitting diode chip20′ overlap the first, second, third, and fourth upper electrodes121,122,123, and124may be increased. As such, the electrical connection between the components may be maintained more stably, and the heat dissipation efficiency may be improved.

FIGS. 3D and 3Eare plan views of the second surface of the lead frame unit according to exemplary embodiments.

Referring toFIG. 3D, the second conductive layer130is disposed on the second surface (or the lower surface) of the body portion110. The second conductive layer130includes a plurality of patterns spaced apart from each other. For example, the second conductive layer130includes the first, second, and third lower electrodes131,132, and133.

Hereinafter, the second conductive layer130according to an exemplary embodiment will be described with reference to the first lower electrode131.

The first lower electrode131includes a lower circular portion131_1and a lower elongated portion131_2.

The lower circular portion131_1and the lower elongated portion131_2ofFIG. 3Dare substantially similar to the circular portion121_1and the elongated portion121_2of the first conductive layer120ofFIG. 3A, respectively. As such, the same or substantially similar components will be assigned with the same or similar reference numerals, and repeated or redundant descriptions thereof will be omitted.

The lower circular portion131_1has a substantially circular shape and is provided integrally with the lower elongated portion131_2. The lower circular portion131_1has a diameter greater than a width of the lower elongated portion131_2.

The lower circular portion131_1may be disposed to overlap with the circular portion121_1of the first conductive layer120when viewed in a plan view. Accordingly, the first connection portion141may be provided in a shape extending from the circular portion121_1to the lower circular portion131_1.

The lower elongated portion131_2may be disposed at one side of the lower circular portion131_1and may surround the first solder hole151. For example, the lower elongated portion131_2may be disposed along an edge of the first solder hole151. Therefore, when the solder paste is provided in the first solder hole151, the solder paste may be electrically connected to the lower elongated portion131_2disposed at the edge of the first solder hole151.

The second lower electrode132may include two lower circular portions. The two lower circular portions are respectively connected to the second connection portion142and the third connection portion143. Further, the two lower circular portions of the second lower electrode132may be connected to the circular portion of the second upper electrode122and the circular portion of the third upper electrode123, respectively.

According to another exemplary embodiment, the second lower electrode132may be divided into two portions with respect to the second solder hole152. Thus, the second connection portion142and the third connection portion143may be electrically independent from each other. Accordingly, in some implementations, an electricity may be applied only to the second connection portion142and the first connection portion141, and the electricity may not be applied to the third connection portion143and the fourth connection portion144.

The plug141_2of the first connection portion141and the first solder hole151may be separated from each other by a predetermined distance. For example, the plug141_2of the first connection portion141and the first solder hole151may be separated from each other by about 40 μm to about 50 μm. When the separation distance between the plug141_2of the first connection portion141and the first solder hole151is less than about 40 μm, the through hole may penetrate the first solder hole151due to a process error during the process of forming the through hole for the plug141_2. In addition, when the separation distance between the plug141_2of the first connection portion141and the first solder hole151exceeds about 50 μm, the size of the lead frame unit100may be excessively large.

The second connection portion142and the third connection portion143may be disposed to be spaced apart from the second solder hole152by about 50 μm or more when viewed from the lower surface (or the second surface) of the body portion110. When the second connection portion142and the third connection portion143are spaced apart from the second solder hole152by the above-described minimum distance, unintended electrical connections may be prevented from occurring.

The first, second, and third solder holes151,152, and153may have a semi-circular or semi-elliptical shape when viewed from the lower surface (or the second surface) of the body portion110. In detail, the first, second, and third solder holes151,152, and153may have a shape recessed inward from the third surface of the body portion110when viewed from the second surface. For example, the semi-circular or semi-elliptical shape of the first, second, and third solder holes151,152, and153when viewed from the second surface may have a chord parallel to the third surface and a round arc inside the body portion110.

The third solder hole153may have a solder hole height Ws, which is a depth of the third solder hole153, in a range from about 10% to about 50% of the thickness Wt of the body portion110. In more detail, when the solder hole height Ws is less than about 10% of the thickness Wt of the body portion110, a crack may occur in the body portion110when external impacts are applied to the light emitting diode or the external frame, and the solder paste penetrates along the crack, thereby causing the short circuit. When the solder hole height Ws exceeds about 50% of the thickness Wt of the body portion110, an excessive amount of the solder paste may be used considering a contact area of the solder paste, and thus, the light emitting diode may not be fixed to and may be separated from the external frame. As described above, since the solder hole height Ws is within the range from about 10% to about 50% of the thickness Wt of the body portion110, the short circuit caused by the crack may be prevented, and the light emitting diode may be stably fixed to the external frame.

Referring toFIG. 3E, a second conductive layer130′ including first, second, and third lower electrodes131′,132′, and133′, and first, second, and third solder holes151′,152′, and153′ according to another exemplary embodiment have different shapes from those of the second conductive layer130and the first, second, and third solder holes151,152, and153shown inFIG. 3D.

In detail, each of the first, second, and third solder holes151′,152′, and153′ has a solder hole diameter Ds and a solder hole height Ws, and the solder hole diameter Ds may be at least two times or more than the solder hole height Ws. Accordingly, each of the first, second, and third solder holes151′,152′, and153′ may have a semi-elliptical shape.

As described above, since the first, second, and third solder holes151′,152′, and153′ are formed to have the relatively small solder hole height Ws, the area of the first, second, and third lower electrodes131′,132′, and133′ may be widened at the lower surface of the body portion. In this manner, the heat dissipation efficiency via the first, second, and third lower electrodes131′,132′, and133′ may be improved.

In addition, the second lower electrode132′ according to the illustrated exemplary embodiment may be provided as a single unitary form without being divided into two portions with respect to the second solder hole152. When the second lower electrode132′ is provided in the single unitary form, the electricity applied to the second lower electrode132′ may be substantially simultaneously applied to the second connection portion142and the third connection portion143.

FIGS. 4A to 4Gare plan views showing the second surface of the lead frame unit according to exemplary embodiments.

Referring toFIG. 4A, the first, second, and third solder holes151,152, and153and the solder insulating layer160are disposed on the second surface (or the lower surface) of the body portion110.

The solder insulating layer160may be disposed between the first, second, and third solder holes151,152, and153to prevent the short circuit from occurring between the first, second, and third solder holes151,152, and153. Accordingly, the solder insulating layer160may be disposed to surround peripheries of the first, second, and third solder holes151,152, and153. For example, the solder insulating layer160may be disposed outside the first solder hole151and the third solder hole153, and between the first, second, and third solder holes151,152, and153.

The solder insulating layer160may be disposed to cover at least a portion of the second conductive layer formed between the first, second, and third solder holes151,152, and153on the second surface of the body portion110. For example, the second conductive layer has the first, second, and third lower electrodes131,132, and133on the second surface of the body portion110, and the first, second, and third lower electrodes131,132, and133may be disposed to surround the first, second, and third solder holes151,152, and153, respectively. In this case, the solder insulating layer160may be disposed between the first, second, and third lower electrodes131,132, and133that surround the first, second, and third solder holes151,152, and153, respectively. In detail, the solder insulating layer160may be disposed between the first lower electrode131surrounding the first solder hole151and the second lower electrode132surrounding the second solder hole152, and between the second lower electrode132and the third lower electrode133surrounding the third solder hole153. When the solder insulating layer160is provided in the above-described manner, the short circuit may not occur between the first, second, and third lower electrodes131,132, and133even when different electrical signals are applied to the first, second, and third lower electrodes131,132, and133.

As for the shape of the second surface of the lead frame unit, the first, second, and third solder holes151,152, and153may have the solder hole height Ws on the second surface. In addition, each of the first, second, and third lower electrodes131,132, and133may have a lower electrode width Wb from one end of a corresponding of a solder hole among the first, second, and third solder holes151,152, and153to the other end facing the one end of the corresponding solder hole. Further, the body portion110may have a body portion margin We from one end of each of the first, second, and third solder holes151,152, and153to a facing end of the body portion110.

A predetermined relationship may be established between the above-described solder hole height Ws, the lower electrode width Wb, and the body portion margin Wc, and thus the structural stability of the light emitting diode may be secured. In detail, the solder hole height Ws may be greater than the lower electrode width Wb, and the body portion margin Wc may be greater than the solder hole height Ws.

According to an exemplary embodiment, as for the relationship between the solder hole height Ws and the lower electrode width Wb, when the body portion110is coupled to the external frame by the solder paste, the body portion110may be prevented from being separated since the solder hole height Ws is set greater than the lower electrode width Wb. In detail, when the solder hole height Ws is equal to or smaller than the lower electrode width Wb, the solder paste provided in the first, second, and third solder holes151,152, and153may be spread too wide on the second surface of the body portion110. In this case, the body portion110may be pulled toward the external frame while the spreading solder paste hardens, and thus, a portion of the body portion110and the light source unit may be separated from the external frame.

In addition, the body portion margin Wc may be greater than the solder hole height Ws. When the body portion margin Wc is greater than the solder hole height Ws, the rigidity of the body portion110may be secured. In detail, when the solder hole height Ws is equal to or greater than the body portion margin Wc, an empty space may be excessively increased in the body portion110, and the rigidity of the body portion110may be lowered. In this case, the body portion110may be easily bent or damaged particularly due to an external force applied to a lateral direction (a direction perpendicular to the solder hole height Ws) of the body portion110.

As such, according to an exemplary embodiment, a portion of the body portion110may be exposed on the lower surface of the body portion110. In detail, the solder insulating layer160and/or the first, second, and third lower electrodes131,132, and133may not be provided on a portion of the lower surface of the body portion110.

Referring toFIGS. 4B to 4E, solder insulating layers160′,160″,160″′, and160″″ according to exemplary embodiments may have various shapes. In detail, the shape of the solder insulating layers160′,160″,160′, and160″″ disposed adjacent to the first solder hole151may be different from the shape of the solder insulating layers160′,160″,160′, and160″″ disposed adjacent to the second solder hole152or the third solder hole153.

In this manner, the types of electrode may be easily identified, and thus, the electrode may be prevented from being connected incorrectly. For example, it may be easily identified that the first solder hole151is connected to the cathode based on the shape of the solder insulating layers160′,160″,160′, and160″″, and thus, the first solder hole151may be prevented from being incorrectly connected to the anode of the external frame.

However, the inventive concepts are not limited to the shape change of only the solder insulating layers160′,160″,160′″, and160″″ disposed adjacent to the first solder hole151. For example, in some exemplary embodiments, the solder insulating layers160′,160″,160′″, and160″″ disposed adjacent to the second solder hole152connected to the anode may have a different shape from that of the solder insulating layers160′,160″,160′″, and160″″ disposed adjacent to the first solder hole151or the third solder hole153. In addition to the shapes shown inFIGS. 4B to 4E, the solder insulating layers160′,160″,160′, and160″″ may have be formed to have various shapes as long as the electrical connection between the first, second, and third solder holes151,152, and153and the external frame is not impeded. For example, in some exemplary embodiments, the solder insulating layers160′,160″,160′″, and160″″ may be disposed to completely cover the first, second, and third solder holes151,152, and153. In this case, the solder insulating layers160′,160″,160′″, and160″″ may mechanically assist the components provided in the first, second, and third solder holes151,152, and153to not protrude out from the first, second, and third solder holes151,152and153due to an external pressure.

Referring toFIGS. 4F and 4G, according to exemplary embodiments, first, second, and third lower electrodes131,132, and133may have a bent shape in areas facing the first, second, and third solder holes151,152and153, respectively. In detail, the first, second, and third lower electrodes131,132, and133may have a shape protruding from an opposite surface to the surface provided with the first, second, and third solder holes151,152, and153in areas adjacent to the solder insulating layer160. Accordingly, the body portion110, which is exposed without being covered by the first, second, and third lower electrodes131,132, and133and the solder insulating layer160, may have substantially a hexagonal shape as shown in figures.

Since the first, second, and third lower electrodes131,132, and133have the above-described shape inFIG. 4F, the electrical connection between the first to fourth connection portions, e.g., the connection conductive layer of the first to fourth connection portions provided via the through hole, and the first, second, and third lower electrodes131,132, and133may be secured. In addition, as the first, second, and third lower electrodes131,132, and133have the above-described shape, the body portion110and the light source unit may be prevented from being separated from the external frame when the body portion110is connected to the external frame by the solder paste. This is because the solder paste provided in the first, second, and third solder holes151,152, and153may not pull the body portion110toward the external frame, when the solder paste provided in the first, second, and third solder holes151,152, and153penetrates into the first, second, and third lower electrodes131,132, and133and hardens.

Referring toFIG. 4G, the first, second, and third lower electrodes131,132, and133have a different shape from those shown inFIG. 4F. In detail, the first, second, and third lower electrodes131,132, and133may have a bent shape, e.g., a gentle curved shape, in areas facing the first, second, and third solder holes151,152and153, respectively. Therefore, the exposed portion of the body portion110may have a semi-circular shape.

In addition, referring toFIG. 4G, an additional solder insulating layer161may be disposed on the exposed portion of the body portion110. The additional solder insulating layer161covers the exposed portion of the body portion110and prevents the solder paste provided in the first, second, and third solder holes151,152and153from penetrating into the exposed portion of the body portion110beyond the first, second, and third lower electrodes131,132, and133. Thus, as described above, the body portion110and the light source unit may be prevented from being separated from the external frame when the body portion110is connected to the external frame, even though the solder paste is provided in an excessively large area as described above.

FIG. 5Ais a plan view of the third surface of the lead frame unit according to an exemplary embodiment, andFIG. 5Bis a cross-sectional view of a light emitting diode according to an exemplary embodiment.

Referring toFIG. 5A, the body portion110may include the first, second, and third solder holes151,152and153. The first, second, and third solder holes151,152and153may have a substantially pentagonal shape when viewed from the third surface (or the side surface) of the body portion110.

In detail, the first, second, and third solder holes151,152and153may have the substantially pentagonal shape extending from the second surface to the first surface when viewed from the third surface. For example, the pentagonal shape of the first, second, and third solder holes151,152and153may have one side parallel to the second surface, and a vertex opposite to the one side of the pentagonal shape may face the first surface.

Since the first, second, and third solder holes151,152and153have the substantially pentagonal shape, a superior heat dissipation characteristic and mechanical stability may be secured when the light emitting diode is connected to the external frame by the solder paste.

In more detail, the first solder hole151having the substantially pentagonal shape may have at least one internal angle of about 120 degrees to about 170 degrees when viewed from the side surface. In this case, the internal angle of the pentagonal shape having the angle of the above-mentioned range may be referred to as a vertex angle θ. The vertex angle θ of the first solder hole151may be located at a position closest to the upper surface of the body portion110.

When the vertex angle θ of the first solder hole151has the angle of the above-mentioned range, the solder paste and the light emitting diode may be stably coupled to each other. For example, when the vertex angle is each less than about 120 degrees, an area corresponding to the vertex angle θ may be filled with less solder paste. In this case, when the solder paste is cooled, bubbles may be formed in the area of the vertex angle θ, and thermal characteristics of the light emitting diode and the external frame may be degraded. When the vertex angle θ is greater than about 170 degrees, and the solder paste is cooled, bubbles may be formed in the area of the vertex angle θ, and the first solder hole151may not be completely filled with the solder paste. In this case, the light emitting diode may be tilted, shifted, or rotated with respect to the external frame without being fixed to the external frame. As described above, the first solder hole151according the illustrated exemplary embodiment may have the substantially pentagonal shape having the vertex angle from about 120 degrees to about 170 degrees, and thus not only the thermal characteristics may be improved but also the light emitting diode may be stably fixed to the external frame.

However, the inventive concepts are not limited thereto, and in some exemplary embodiments, the first solder hole151may have a shape different from the shape shown inFIG. 5A. For example, the area corresponding to the vertex angle θ of the first solder hole151may be rounded or chamfered. In this case, the vertex angle θ may be an angle formed by extension lines of two straight lines that define the area corresponding to the vertex angle θ.

A height hs of the first solder hole151may be within a range from about 50% to about 80% of a height ht of the body portion110. As described above, when the height hs of the first solder hole151is within the range from about 50% to about 80% of the height ht of the body portion110, the light emitting diode may be stably fixed to the external frame without degrading the structural stability of the body portion110.

Referring back toFIG. 1, a second insulating layer may be disposed around the first, second, and third solder holes151,152and153along edges of the first, second, and third solder holes151,152and153. The second insulating layer may be formed between the first, second, and third lower electrodes131,132, and133, which are spaced apart from each other and respectively disposed in the first, second, and third solder holes151,152and153.

The first, second, and third lower electrodes131,132, and133may be disposed to cover portions of the body portion110, which define the first, second, and third solder holes151,152and153, and portions of the lower surface of the body portion110, which are adjacent to the first, second, and third solder holes151,152and153. Accordingly, when the solder paste is provided in the first, second, and third solder holes151,152and153, the light emitting diode and the external frame may be electrically and stably connected to each other by the solder paste.

Although the lead frame unit ofFIG. 5Ahas been described with reference to the first solder hole151, it is noted that, however, the second solder hole152and/or the third solder hole153may have substantially the same structure as that of the first solder hole151.

Referring toFIG. 5A, the first, second, and third lower electrodes131,132, and133may have a lower electrode thickness T when viewed from the third surface. The lower electrode thickness T may be within a range from about 10 μm to about 30 μm. When the lower electrode thickness T exceeds about 30 μm, an adhesive force between the first, second, and third lower electrodes131,132, and133and the body portion110may be insufficient, and thus, the first, second, and third lower electrodes131,132, and133may be separated from the body portion110. When the lower electrode thickness T is less than about 10 μm, defects, such as the first, second, and third lower electrodes131,132, and133are not being formed in some portions of the first, second, and third lower electrodes131,132, and133may occur, even with small errors in the process, which may significantly reduce the electrical conductivity.

InFIG. 5B, the cross-sectional view of the light emitting diode is shown. The first, second, and third solder holes may have the solder hole height Ws and a solder hole depth hx in the cross-section. The solder hole depth hx may be greater than the solder hole height Ws. Since the solder hole depth hx of the first, second, and third solder holes are greater than the corresponding solder hole height Ws, the adhesive force between the lead frame unit100and an external frame300may be secured by the solder paste provided in the first, second, and third solder holes. In detail, since the lead frame unit100is attached to the external frame300by the solder paste in the relatively large surface, the lead frame unit100and the light source unit200may be prevented from being separated due to the reduction of the adhesive force.

In addition, the lead frame unit100may have a first height Wd and a second height We in the cross-section. The first height Wd may be a distance from a surface of the lead frame unit100that meets the external frame300to the first, second, and third lower electrodes surrounding the first, second, and third solder holes. The second height We may be a height obtained by subtracting the first height Wd from the thickness of the body portion, e.g., a distance from the first, second, and third lower electrodes to a front surface of the lead frame unit100. A relationship between the first height Wd and the second height We may be established, such that the first height Wd is smaller than the second height We. Accordingly, the size of the empty space of the lead frame unit100for providing the first, second, and third solder holes may be relatively small, and thus, the rigidity of the lead frame unit100may be secured.

FIG. 6is a plan view of a light emitting diode according to an exemplary embodiment.

Referring toFIG. 6, the light emitting diode may include the first light emitting diode chip20and the second light emitting diode chip20′. The first light emitting diode chip20and the second light emitting diode chip20′ are disposed to be spaced apart from each other.

Referring toFIG. 6, the first light emitting diode chip20and the second light emitting diode chip20′ may be disposed to be spaced apart from each other by a first interval IV1. The first interval IV1may be within a range from about 470 nm to about 500 nm. When the first interval IV1is less than about 470 nm, light emitted from the first light emitting diode chip20interferes with light emitted from the second light emitting diode chip20′, and light may not be emitted in a desired form. When the first interval IV1exceeds about 500 nm, the size of the light emitting diode may become excessively large, and thus, a usability of the light emitting diode may be deteriorated.

Referring toFIG. 6, the first light emitting diode chip20and the second light emitting diode chip20′ may be disposed to be spaced apart from an edge of the light source unit200by a predetermined distance. In this case, a distance between the edge of the light source unit200and the first light emitting diode chip20and the second light emitting diode chip20′ may be referred to as a “light emitting diode chip margin”. The light emitting diode chip margin may vary depending on positions of the first light emitting diode chip20and the second light emitting diode chip20′. For example, as described below, the light emitting diode chip margin may be referred to as second, third, fourth, and fifth intervals IV2, IV3, IV4, and IV5depending on positions of the first light emitting diode chip20and the second light emitting diode chip20′.

Referring toFIG. 6, the first light emitting diode chip20may be disposed to be spaced apart from one end of the light source unit200by a second interval IV2. As used herein, the term “one end of the light source unit200” may refer to a surface adjacent to the first light emitting diode chip20among short surfaces of the light emitting diode. When the light transmission portion is provided to cover the first light emitting diode chip20, the light transmission portion may be disposed to be spaced apart from the one end of the light source unit200by the second interval IV2when viewed from the upper surface of the light emitting diode. The second interval IV2may be within a range from about 90 nm to about 110 nm. When the second interval IV2is less than about 90 nm, the external force provided from the outside of the light emitting diode or the light source unit200may be applied to the first light emitting diode chip20without being buffered, and the first light emitting diode chip20may be damaged. When the second interval IV2exceeds about 110 nm, the size of the light emitting diode may become excessively large, and thus, a usability of the light emitting diode may be deteriorated.

Referring toFIG. 6, the second light emitting diode chip20′ may be disposed to be spaced apart from the other end of the light source unit200by a third interval IV3. As used herein, the term “the other end of the light source unit200” may refer to a surface adjacent to the second light emitting diode chip20′ among the short surfaces of the light emitting diode. The third interval IV3may be within a range from about 100 nm to about 120 nm. When the third interval IV3is less than about 100 nm, the external force provided from the outside of the light emitting diode or the light source unit200may be applied to the second light emitting diode chip20′ without being buffered, and the second light emitting diode chip20′ may be damaged. When the third interval IV3exceeds about 120 nm, the size of the light emitting diode may become excessively large, and thus, the usability of the light emitting diode may be deteriorated.

As described above, the third interval IV3may be greater than the second interval IV2. This is because the surface on which the second light emitting diode chip20′ of the light emitting diode is located may be arranged close to the outside or other components when the light emitting diode is connected to the external frame and applied to other components. Accordingly, the second light emitting diode chip20′ may be exposed to the external force relatively more than the first light emitting diode chip20. As such, the third interval IV3may be greater than the second interval IV2to prevent the second light emitting diode chip20′ from being damaged due to the external force.

The first interval V1may be greater than the second interval IV2and the third interval IV3. Accordingly, when viewed from the top of the light source unit200, the first light emitting diode chip20and the second light emitting diode chip20′ may be respectively inclined to different sides of the light source unit200. Since the first interval V1may be greater than the second interval IV2and the third interval IV3, it is possible to prevent unnecessary interference between the light emitted from the first light emitting diode chip20and the light emitted from the second light emitting diode chip20′.

Referring toFIG. 6, the first light emitting diode chip20and/or the second light emitting diode chip20′ may be disposed to be spaced apart from a rear surface of the light emitting diode by a fourth interval IV4. The fourth interval IV4may be about 40 nm. When the fourth interval IV4is set to about 40 nm, unnecessary electrical connection may be prevented from occurring between the first light emitting diode chip20and/or the second light emitting diode chip20′ and the electrodes on the external frame, and the size of the light emitting diode may be formed slim.

In addition, the first light emitting diode chip20and/or the second light emitting diode chip20′ may be disposed to be spaced apart from a front surface of the light emitting diode by a fifth interval IV5. The fifth interval IV5may be within a range from about 45 nm to about 50 nm. When the fifth interval IV5is less than about 45 nm, the first light emitting diode chip20and/or the second light emitting diode chip20′ may be easily damaged due to the external force applied to the front surface of the light emitting diode. When the fifth interval IV5exceeds about 50 nm, the light emitting diode may become excessively thick.

As described above, the fifth interval IV5may be greater than the fourth interval IV4. The fourth interval IV4may be relatively small since the fourth interval IV4is provided to prevent unnecessary electrical connection from occurring between the first and/or second light emitting diode chips20and/or20′ and the external frame by separating the first and/or second light emitting diode chips20and/or20′ from the external frame. On the other hand, the fifth interval IV5may be relatively large because the fifth interval IV5may serve to buffer the external force. As the fifth interval IV5is greater than the fourth interval IV4, the unnecessary electrical connection may be prevented from occurring, the external force may be buffered, and the light emitting diode may be formed slim.

According to the illustrated exemplary embodiment, since the first light emitting diode chip20and/or the second light emitting diode chip20′ are designed to satisfy a specific distance relationship on the light source unit200, the light emitting diode may be formed slim, and the light emitting diode may have improved structural stability.

FIG. 7is a perspective view of a light emitting diode according to an exemplary embodiment,FIG. 8Ais a perspective view of the light emitting diode ofFIG. 7according to an exemplary embodiment, andFIG. 8Bis a cross-sectional view taken along line II-II′ ofFIG. 8A.

The light emitting diode ofFIGS. 7, 8A, and 8Bis substantially similar to the light emitting diode ofFIGS. 1, 2A, and 2B. Accordingly, the same or similar components will be assigned with the same or similar reference numerals, and repeated or redundant descriptions thereof will be omitted to avoid redundancy.

Referring toFIGS. 7, 8A, and 8B, a lead frame unit100′ includes a first solder hole151′ and a second solder hole152′, and a light source unit200′ includes one light emitting diode chip20.

As compared to the light source unit200ofFIGS. 1 to 5Bthat includes two light emitting diode chips, the light source unit200′ according to the illustrated exemplary embodiment shown inFIGS. 7 to 8Bincludes one light emitting diode chip. As such, the shapes of a first conductive layer120′ and a second conductive layer may be changed.

In more detail, the first conductive layer120′ may include one first upper electrode121′ and one second upper electrode122′. Pad portions39aand39bof the light emitting diode chip20may be respectively mounted on the first upper electrode121′ and the second upper electrode122′.

The second conductive layer may include one first lower electrode131′ and one second lower electrode132′. The first lower electrode131′ and the second lower electrode132′ may be disposed to overlap with the first upper electrode121′ and the second upper electrode122′, respectively, when viewed in a plan view.

The first upper electrode121′ and the first lower electrode131′ may have substantially the same function as each other. For example, the first upper electrode121′ and the first lower electrode131′ may serve as a cathode. In this case, the second upper electrode122′ and the second lower electrode132′ may serve as an anode. However, in some exemplary embodiments, the first upper electrode121′ and the first lower electrode131′ may serve as the anode, and the second upper electrode122′ and the second lower electrode132′ may serve as the cathode.

The first upper electrode121′ and the second upper electrode122′ may include a cover plate141_3described below. However, according to another exemplary embodiments, the first upper electrode121′ and the second upper electrode122′ may include the cover plate141_3and a bump disposed on the cover plate141_3. In some exemplary embodiments, however, the bump may be omitted to thin the lead frame unit100′.

A first connection portion141′ and a second connection portion142′ may be provided to connect the first conductive layer120′ and the second conductive layer. In detail, the first connection portion141′ may connect the first upper electrode121′ and the first lower electrode131′, and the second connection portion142′ may connect the second upper electrode122′ and the second lower electrode132′. The first connection portion141′ and the second connection portion142′ may be disposed to penetrate the body portion110′.

A first through hole151′ and a second through hole152′ are defined in a lower surface of the body portion110′. According to the illustrated exemplary embodiment, only two through holes151′ and152′ may be defined in the body portion110′. However, the inventive concepts are not limited thereto, and in some exemplary embodiments, more through holes may be provided in the body portion110′ in addition to the first through hole151′ and the second through hole152′ for heat dissipation, for example.

The first lower electrode131′ may be disposed in the first through hole151′, and the second lower electrode132′ maybe disposed in the second through hole152′. The first lower electrode131′ and the second lower electrode132′ may be electrically connected to an external frame by a solder paste provided in the first through hole151′ and the second through is hole152′. In addition, a driving signal and power provided from the external frame may be applied to the light emitting diode chip20via the first lower electrode131′ and the second lower electrode132′ disposed in the first through hole151′ and the second through hole152′.

In some exemplary embodiments, a solder insulating layer may be further disposed on the lower surface of the body portion110′. However, according to another exemplary embodiment, when one light emitting diode chip20is mounted on the body portion110′, the solder insulating layer may be omitted to keep the lead frame unit slim.

As described above, the light emitting diode according to the illustrated exemplary embodiment may be formed so that one light emitting diode chip is mounted.

FIGS. 9A and 9Bare plan views of a first surface and a second surface of the lead frame unit ofFIG. 8, respectively according to an exemplary embodiment.

Referring toFIG. 9A, the first upper electrode121′ and the second upper electrode122′ are disposed on a first surface (or an upper surface) of the body portion110′. The first upper electrode121′ includes a circular portion121_1′ and an elongated portion121_2′.

The first connection portion141′ may be disposed in the circular portion121_1′. Since the first connection portion141′ is disposed in the circular portion121_1′ having a relatively large diameter, a through hole required to provide the first connection portion141′ may be easily formed.

In addition, the pad portion of the light emitting diode chip may be mounted on the elongated portion121_2′. Since the light emitting diode chip is mounted on the elongated portion121_2′ having a relatively long length, the light emitting diode chip may be easily mounted.

Referring toFIG. 9B, the first lower electrode131′ and the second lower electrode132′ are disposed on a second surface (or a lower surface) of the body portion110′. The first lower electrode131′ and the second lower electrode132′ may be disposed to surround an edge of the first through hole151′ and the second through hole152′, respectively.

The first lower electrode131′ may include a lower circular portion131_1′ and a lower elongated portion131_2′. The first connection portion141may be disposed in the lower circular portion131_1′. The lower circular portion131_1′ may be disposed to overlap with the circular portion121_1′ when viewed in a plan view.

As described above, since one light emitting diode is disposed on the lead frame unit according to the illustrated exemplary embodiment, one first upper electrode121′ and one second upper electrode122′ may be provided on the upper surface of the body portion110′, and one first lower electrode131′ and one second lower electrode132′ may be provided on the lower surface of the body portion110′.

FIG. 10Ais a plan view of a light source unit according to an exemplary embodiment,FIG. 10Bis a cross-sectional view taken along line A-A′ ofFIG. 10A,FIG. 10Cis a cross-sectional view taken along line B-B′ ofFIG. 10A,FIG. 10Dis a cross-sectional view taken along line C-C′ ofFIG. 10A, andFIG. 10Eis a magnified view of M1inFIG. 10D.

Referring toFIGS. 10A to 10E, the light emitting diode chip20of the light source unit is shown in more detail.FIG. 10Ashows the plan view of the light emitting diode chip20, andFIGS. 10B, 10C, and 10Dshow cross-sectional views respectively taken along lines A-A′, B-B′, and C-C′ ofFIG. 10A.

Referring toFIGS. 10A to 10D, the light emitting diode chip20includes a substrate21, a first light emitting cell C1, a second light emitting cell C2, a reflective structure31, first, second, and third contact layers35a,35b, and35c, a first electrode pad39a, and a second electrode pad39b. In addition, the light emitting diode chip20may include a preliminary insulating layer29, a lower insulating layer33, and a resin layer37. In addition, each of the first and second light emitting cells C1and C2includes an n-type semiconductor layer23, an active layer25, and a p-type semiconductor layer27. In the illustrated exemplary embodiment, the light emitting diode chip has a series multi junction structure, however, the inventive concepts are not limited thereto, and in some exemplary embodiments, and the light emitting diode chip may have another structure.

The substrate21may be a growth substrate for growing a group III-V nitride-based semiconductor layer, for example, a sapphire substrate, in particular, a patterned sapphire substrate. The substrate21may be an insulating substrate, without being limited thereto. When the light emitting cells disposed on the substrate21are connected to each other in series, the substrate21is required to be insulated from the light emitting cells. Accordingly, when the substrate21is insulative or conductive, an insulating material layer may be disposed between the substrate21and the first and second light emitting cells C1and C2, such that the first and second light emitting cells C1and C2are insulated from the substrate21. The substrate21may have a substantially rectangular shape as shown inFIG. 10A. A side surface of the substrate21may be formed by a laser scribing process and a cracking process using the laser scribing process, for example. In addition, the substrate21may be removed from the first and second light emitting cells C1and C2by using a process, such as a laser lift-off process, a chemical lift-off process, or a grinding process.

The first and second light emitting cells C1and C2are disposed on the substrate21. The first and second light emitting cells C1and C2are separated from each other by a separation area I through which the substrate21is partially exposed. As used herein, the separation area I refers to an area provided to separate the first and second light emitting cells C1and C2from each other, and is distinguished from a scribing or dicing area for separating the substrate21. Semiconductor layers of the first and second light emitting cells C1and C2are spaced apart from each other by the separation area I. The first and second light emitting cells C1and C2may be disposed to face each other and may have a substantially square shape or a substantially rectangular shape. In particular, the first and second light emitting cells C1and C2may have the substantially rectangular shape elongated in a direction in which the first and second light emitting cells C1and C2face each other.

Each of the first and second light emitting cells C1and C2includes the n-type semiconductor layer23, the active layer25, and the p-type semiconductor layer27. The n-type semiconductor layer23, the active layer25, and the p-type semiconductor layer27may be formed of the group III-V nitride-based semiconductor, for example, a nitride-based semiconductor, such as (Al, Ga, In)N. The n-type semiconductor layer23, the active layer25, and the p-type semiconductor layer27may be grown on the substrate21by a metal organic chemical vapor deposition (MOCVD) method in a chamber, for example. In addition, the n-type semiconductor layer23includes an n-type dopant, such as Si, Ge, or Sn, and the p-type semiconductor layer27includes a p-type dopant, such as Mg, Sr, or Ba. For example, the n-type semiconductor layer23may include GaN or AlGaN, which includes Si as the dopant, and the p-type semiconductor layer27may include GaN or AlGaN, which includes Mg as the dopant. Each of the n-type semiconductor layer23and the p-type semiconductor layer27is shown as having a single-layer structure, however, the inventive concepts are not limited thereto, and in some exemplary embodiments, these layers may have a multi-layer structure or may include a superlattice layer. The active layer25may have a single quantum well structure or a multiple quantum well structure, and a composition ratio of the nitride-based semiconductor may be adjusted to emit a light having a desired wavelength. For example, the active layer25may emit a blue light or an ultraviolet light.

The separation area I separates the first and second light emitting cells C1and C2from each other. The substrate21is exposed through the semiconductor layers in the separation area I. The separation area I is formed by using a photolithography process. In this case, a photoresist is reflowed using a high-temperature baking process to form a photoresist pattern having a gentle slope, the photoresist pattern is used as a mask to etch the semiconductor layers, and thus, side surfaces may be formed in the separation area I with relatively gentle inclination. In addition, as shown inFIG. 10D, a stepped inclined surface may be formed in the separation area I. The stepped inclined surface may be formed in the separation area I during a process for forming a mesa that exposes the n-type semiconductor layer23, and by forming the separation area I that exposes the substrate21.

The first and second light emitting cells C1and C2face each other with the separation area I interposed therebetween. Hereinafter, side surfaces of the first and second light emitting cells C1and C2facing each other will be referred to as inner side surfaces. In addition, side surfaces of the first and second light emitting cells C1and C2except for the inner side surfaces will be referred to as outer side surfaces. Accordingly, the n-type semiconductor layers23of the first and second light emitting cells C1and C2include the inner and outer side surfaces as well.

For example, the n-type semiconductor layer23may include one inner side surface and three outer side surfaces. As shown inFIG. 10D, the outer side surfaces of the n-type semiconductor layers23may have a steep slope relative to the inner side surface. In the illustrated exemplary embodiment, the outer side surfaces of the n-type semiconductor layers23are described to have the steep slope relative to the inner side surface, however, the inventive concepts are not limited thereto. For example, at least one outer side surface may have the steep slope relative to the inner side surface. As another example, only both outer side surfaces perpendicular to the separation area I may be relatively steeply inclined, and the outer side surface parallel to the separation area I may be inclined gently as the separation area I.

Further, the outer side surfaces, which are relatively steeply inclined, may be substantially parallel to the side surface of the substrate21. For example, the outer side surfaces of the n-type semiconductor layers23may be formed by scribing the n-type semiconductor layer23together with the substrate21, and thus, may be formed with the side surfaces of the substrate21.

The mesa M is disposed on each n-type semiconductor layer23. The mesa M may be disposed within an area surrounded by the n-type semiconductor layer23, and thus, areas near edges adjacent to the outer side surfaces of the n-type semiconductor layer23are exposed to the outside without being covered by the mesa M. In addition, a side surface of the mesa M and the side surface of the n-type semiconductor layer23are discontinuous to each other on a sidewall of the separation area I, so that the above-mentioned stepped inclined surface may be formed.

The mesa M includes the p-type semiconductor layer27and the active layer25. The active layer25is disposed between the n-type semiconductor layer23and the p-type semiconductor layer27. An inner side surface of the mesa M is shown as being inclined as the outer surfaces thereof, however, the inventive concepts are not limited thereto. For example, the inner side surface of the mesa M may be more gently inclined than the outer surfaces thereof. In this manner, a stability of the second contact layer35b, which will be described later, may be improved.

The mesa M may be provided with a through hole27adefined through the p-type semiconductor layer27and the active layer25. In some exemplary embodiments, a plurality of through holes may be formed in the mesa M, however, the single through hole27amay be formed in the mesa M as shown inFIG. 10A. In this case, the through hole27amay have a substantially circular shape at a center of the mesa M, without being limited thereto. For example, the through hole27amay have an elongated shape passing through the center of the mesa M.

The reflective structure31is disposed on each of the p-type semiconductor layers27of the first and second light emitting cells C1and C2. The reflective structure31makes contact with the p-type semiconductor layer27. The reflective structure31may be provided with an opening that exposes the through hole27a, and may be disposed over substantially the entire area of the mesa M in an upper area of the mesa M. For example, the reflective structure31may cover about 80% or more, specifically about 90% or more, of the upper area of the mesa M.

The reflective structure31may include a reflective metal layer having a reflective property, and thus, may reflect light generated from the active layer25and traveling to the reflective structure31. For instance, the reflective metal layer may include Ag or Al. In addition, an Ni layer may be disposed between the reflective metal layer and the p-type semiconductor layer27to help the reflective structure31making an ohmic contact with the p-type semiconductor layer27. In some exemplary embodiments, the reflective structure31may include a transparent oxide layer, such as indium tin oxide (ITO) or zinc oxide (ZnO).

The preliminary insulating layer29may cover the mesa M around the reflective structure31. The preliminary insulating layer29may be formed of SiO2using a chemical vapor deposition method or the like, and may cover the side surface of the mesa M and some areas of the n-type semiconductor layer23. The preliminary insulating layer29may be removed from a lower portion of the inclined surface of the separation area I, and may be remained on an upper portion of the inclined surface and a stepped portion of the separation area I as shown inFIG. 10D.

The lower insulating layer33covers the mesa M, the reflective structure31, and the preliminary insulating layer29. In addition, the lower insulating layer33covers the separation area I, the sidewall of the mesa M, and portions of the n-type semiconductor layer23around the mesa M. As shown in an enlarged view ofFIG. 10DandFIG. 10E, when the substrate21is the patterned sapphire substrate, the lower insulating layer33may be formed along a shape of protrusions formed on the substrate21in the separation area I.

The lower insulating layer33may be disposed between the first, second, and third contact layers35a,35b, and35c. The first and second light emitting cells C1and C2and may provide a passage through which the first, second, and third contact layers35a,35b, and35cmake contact with the n-type semiconductor layer23or the reflective structure31. For example, the lower insulating layer33may include a hole33athrough which the reflective structure31is exposed on the first light emitting cell C1, a hole33bthrough which the reflective structure31is exposed on the second light emitting cell C2, and an opening33cthrough which the n-type semiconductor layer23is exposed in the through hole27a. In addition, the lower insulating layer33exposes areas near the edge of the n-type semiconductor layer23while covering a periphery of the mesa M.

The hole33amay have an elongated shape that is substantially parallel to the separation area I as shown inFIG. 10A, and may be disposed closer to the separation area I than the through hole27a. Accordingly, a current may be injected into a wider area in the reflective structure31on the first light emitting cell C1. In the illustrated exemplary embodiment, the reflective structure31disposed on the first light emitting cell C1is exposed through the single hole33a, however, in some exemplary embodiments, the hole33amay be provided in a plural number.

The hole33bmay be defined above the second light emitting cell C2and may be provided in a plural number as shown inFIG. 10A. In the illustrated exemplary embodiment, five holes33bare shown, however, the inventive concepts are not limited to a particular number of the holes33b, and in some exemplary embodiments, less number of holes33bor more number of holes33bthan the five holes33bmay be arranged. A center of the entire holes33bis located farther from the separation area I than the center of the mesa M. Therefore, the current may be prevented from concentrating near the separation area I, and may be distributed in the wide area of the second light emitting cell C2.

The opening33C exposes the n-type semiconductor layer23in the through hole27ato provide a passage through which the first contact layer35aand the second contact layer35bmake contact with the n-type semiconductor layer23.

The lower insulating layer33may include an insulating material, such as SiO2or Si3N4, and may have a single-layer or multi-layer structure. In addition, the lower insulating layer33may include a distributed Bragg reflector formed by repeatedly stacking material layers having different refractive indices from each other, for example, SiO2/TiO2. When the lower insulating layer33includes the distributed Bragg reflector, light incident into an area except for the reflective structure31may be reflected, and thus, a light extraction efficiency may be further improved.

The first contact layer35ais disposed on the first light emitting cell C1and is in ohmic contact with the n-type semiconductor layer23. The first contact layer35amay be in ohmic contact with the n-type semiconductor layer23along the periphery of the mesa M between the outer side surface of the n-type semiconductor layer23and the mesa M. In addition, the first contact layer35amay be in ohmic contact with the n-type semiconductor layer23exposed through the opening33cof the lower insulating layer33in the through hole27aof the mesa M. Further, the first contact layer35amay cover the upper area and the side surface of the mesa M except for some areas around the hole33a.

The second contact layer35bis in ohmic contact with the n-type semiconductor layer23of the second light emitting cell C2, and makes contact with the reflective structure31of the first light emitting cell C1. Accordingly, the second contact layer35belectrically connects the p-type semiconductor layer27of the first light emitting cell C1and the n-type semiconductor layer23of the second light emitting cell C2.

The second contact layer35bmay be in ohmic contact with the n-type semiconductor layer23along the periphery of the mesa M between the outer side surface of the n-type semiconductor layer23and the mesa M. In addition, the second contact layer35bmay be in ohmic contact with the n-type semiconductor layer23exposed through the opening33cof the lower insulating layer33in the through hole27aof the mesa M. Further, the second contact layer35bmakes contact with the reflective structure31exposed through the hole33a. As such, the second contact layer35bextends from the second light emitting cell C2to the first light emitting cell C1after passing through the upper portion of the separation area I. In this case, the second contact layer35b, which passes through the upper portion of the separation area I, is disposed within a width of the mesa M as shown inFIG. 10A. Thus, the second contact layer35bmay be prevented from being short-circuited with the n-type semiconductor layer23of the first light emitting cell C1. In addition, since the second contact layer35bis relatively gently inclined and passes through the separation area I that has a step structure, a process stability may be improved. In some exemplary embodiments, the second contact layer35bmay be disposed on the lower insulating layer33in the separation area I, and may be formed to have concave-convex portions along the shape of the lower insulating layer33.

The third contact layer35cis disposed on the lower insulating layer33above the second light emitting cell C2. The third contact layer35cmakes contact with the reflective structure31via the holes33bof the lower insulating layer33, and is electrically connected to the p-type semiconductor layer27through the reflective structure31. The third contact layer35cmay be disposed in an area surrounded by the second contact layer35b, and may have a shape partially surrounding the second through hole27a. The third contact layer35cis disposed at the same level as the first and second contact layers35aand35b, and helps the resin layer37and the first and second electrode pads39aand39bto be easily formed thereon. In some exemplary embodiments, the third contact layer35cmay be omitted.

According to an exemplary embodiment, the first, second, and third contact layers35a,35b, and35cmay be formed by the same process using the same material. The first, second, and third contact layers35a,35b, and35cmay include a high-reflectance metal layer, such as an Al layer, and the high-reflectance metal layer may be formed on an adhesive layer, e.g., a Ti, Cr, or Ni layer. In addition, a protective layer having a single-layer or multi-layer structure of Ni, Cr, and/or Au may be disposed on the high-reflectance metal layer. In some exemplary embodiments, the first, second, and third contact layers35a,35b, and35cmay have a multi-layer structure of Cr/Al/Ni/Ti/Ni/Ti/Au/Ti.

The resin layer37is disposed on the first contact layer35aand the second contact layer35b. The resin layer37is provided with a first via hole37adefined therethrough to expose the first contact layer35a, and a second via hole37bdefined therethrough to expose the third contact layer35c. When viewed in a plan view, the first and second via holes37aand37bare formed in a shape partially surrounding the first through hole27aand the second through hole. When the third contact layer35cis omitted in some exemplary embodiments, the lower insulating layer33and the holes33bof the lower insulating layer33may be exposed through the second via hole37b.

The resin layer37may include concave portions37cabove the first through hole27aand the second through hole27b. The concave portions37cmay be formed to correspond to the first through hole27aand the second through hole27b.

The resin layer37covers the first and second contact layers35aand35bthat make contact with the n-type semiconductor layer23in the periphery of the mesa M. As shown inFIGS. 10B to 10D, an area between the first and second contact layers35aand35band the edge of the n-type semiconductor layer23may be covered by the resin layer37. Accordingly, the first and second contact layers35aand35bmay be protected from an external environment, such as moisture, by the resin layer37. The resin layer37may cover the second contact layer35bon the separation area I and may be formed on the separation area I to have a concave portion along the shape of the second contact layer35b.

The resin layer37may include a photosensitive resin, such as a photoresist, and may be formed by a spin coating method, for example. Meanwhile, the first and second via holes37aand37bmay be formed by a photo-development process, without being limited thereto.

The first electrode pad39afills the first via hole37aof the resin layer37and is electrically connected to the first contact layer35a. In addition, the second electrode pad39bfills the second via hole37band is electrically connected to the third contact layer35c. When the third contact layer35cis omitted in some exemplary embodiments, the second electrode pad39bmay be directly connected to the reflective structure31. As shown inFIG. 10A, the first electrode pad39aand the second electrode pad39bmay partially surround the first through hole27aand the second through hole27b, respectively, when viewed in a plan view. Thus, the first electrode pad39aand the second electrode pad39bpartially surround the concave portions37c. The first electrode pad39aand the second electrode pad39bmay surround at least ½ of a circumference of the first through hole27aand the second through hole27b, and in some exemplary embodiments, ⅔ or more of the circumference of the first through hole27aand the second through hole27b. In addition, the first electrode pad39aand the second electrode pad39bmay protrude upward from the resin layer37. Accordingly, deep grooves may be formed above the areas corresponding to the first and second through holes27aand27b. When the light emitting diode chip20is bonded with a conductive adhesive, such as solder, using the grooves, the solder is trapped in the grooves, and thus, the solder may be prevented from overflowing to the outside. The first electrode pad39aand the second electrode pad39bmay be confined within the upper area of the mesa M.

FIGS. 11A and 11Bare perspective views of a light emitting diode module according to an exemplary embodiment.

FIG. 11Ais a view exemplarily illustrating a process of attaching the light emitting diode10to the external frame300using the solder paste1.FIG. 11Bis a view of a completed light emitting diode module according to an exemplary embodiment.

Referring toFIG. 11A, the light emitting diode10, the external frame300, and the solder paste1attaching the light emitting diode10to the external frame300are provided.

The solder paste1is provided in the first solder hole151, the second solder hole152, and the third solder hole153of the light emitting diode10. The first lower electrode of the light emitting diode10is electrically connected to a first electrode310of the external frame300by the solder paste1provided in the first solder hole151, and a lower anode of the light emitting diode10is electrically connected to a third electrode330of the external frame300by the solder paste1provided in the second solder hole152. In addition, the third lower electrode of the light emitting diode10is electrically connected to a second electrode320by the solder paste1provided in the third solder hole153.

Since the solder paste1is inserted into the first, second, and third solder holes151,152, and153formed inside the lead frame unit100, the light emitting diode module according to the illustrated exemplary embodiment may minimize the area occupied by the solder paste1, thereby providing a greater degree of miniaturization.

More particularly, as the solder paste1is provided in the first, second, and third solder holes151,152, and153defined over the second surface and the third surface of the body portion110, the contact area between the solder paste1and the body portion110may be increased. Accordingly, the connection between the external frame300and the body portion110by the solder paste1may become more stable.

As used herein, the “solder paste” refers to a final adhesive layer formed using a paste that is a mixture of metal powder, flux, and organic material. In addition, when describing a manufacturing method of the light emitting diode module, the “solder paste” may also refer to the paste that is the mixture of the metal powder, the flux, and the organic material. For example, the solder paste1may include Sn and another metal. The solder paste1may include about 50% or more, about 60% or more, or about 90% or more of Sn relative to the total metal weight. For example, the solder paste1may include a lead-containing solder alloy, such as Sn—Pb or Sn—Pb—Ag alloy, or a lead-free solder alloy, such as Sn—Ag alloy, Sn—Bi alloy, Sn—Zn alloy, Sn—Sb, or Sn—Ag—Cu alloy.

FIG. 11Bshows the light emitting diode module according to an exemplary embodiment. As shown inFIG. 11B, the light emitting diode module may irradiate light in a direction parallel to the external frame300, and thus, the light emitting diode module may be a side-type light emitting diode module.

FIGS. 12A and 12Bare cross-sectional views of a light emitting diode module according to an exemplary embodiment.FIGS. 12A and 12Bshow the form of the solder paste in more detail.

Referring toFIG. 12A, the solder paste1may be disposed to completely cover the first, second, and third solder holes151,152, and153when viewed from the side surface. In detail, the solder paste1may have a height corresponding to about 150% to about 180% of a height of the first, second, and third solder holes151,152, and153. When the solder paste1has the height in the above range, the lead frame unit100and the external frame300may be stably connected to each other while preventing unintended electrical connection (e.g., short circuit) from occurring.

Referring toFIG. 12B, the solder paste1may be disposed to fill the first solder hole151. In addition, at least a portion of the solder paste1may extend to the outside of the lead frame unit100. For example, as shown inFIG. 12B, a portion of the solder paste1may be provided in the form of gentle parabola outside the lead frame unit100.

In detail, the solder paste1may be disposed in the first solder hole151or in a first area1abetween the second conductive layer and the external frame300and a second area1boutside the first solder hole151. In this case, the second area1bin which the solder paste1is provided may include at least a portion of the second conductive layer, and thus, the solder paste1provided in the second area1bmay cover at least the portion of the second conductive layer.

When the solder paste1is disposed as described above, a horizontal or vertical movement of the external frame300may be limited. In addition, the electrical connection between the second conductive layer and the external frame300by the solder paste may be further strengthened.

As described above, the electrical and mechanical stability may be improved by providing more solder paste1than the capacity of the first, second, and third solder holes151,152, and153.

The first electrode310may be embedded in the external frame300. Accordingly, although the first electrode310is provided, the external frame300and the backlight unit including the external frame300may maintain slim thickness.

FIG. 13is a perspective view of a light emitting diode module according to an exemplary embodiment.

Referring toFIG. 13, the solder insulating layer160is disposed on the second surface of the body portion110of the lead frame unit100and protrudes toward the external frame300.

The solder insulating layer160may be disposed between the first, second, and third lower electrodes of the body portion110. In addition, the solder insulating layer160disposed between the first, second, and third lower electrodes may have a first width D1.

The protruding portion of the solder insulating layer160may make contact with the external frame300. In particular, when the lead frame unit100and the external frame300are attached to each other by the solder paste1, the protruding portion of the solder insulating layer160may be disposed between the solder pastes1. The solder insulating layer160disposed between the solder pastes1may prevent the lead frame unit100and the external frame300from moving in a horizontal direction, e.g., a direction substantially perpendicular to a direction in which the lead frame unit100and the external frame300are attached to each other.

According to an exemplary embodiment, a concave portion360may be disposed on the external frame300. The concave portion360may be disposed between the first electrode310and the second electrode320and between the second electrode320and the third electrode330. The concave portion360may have a shape corresponding to the protruding portion of the solder insulating layer160. In this manner, when the lead frame unit100is coupled to the external frame300, at least a portion of the protruding portion of the solder insulating layer160may be inserted into the concave portion360.

When the concave portion360is provided, the concave portion360may have a second width D2, which may be substantially equal to the first width D1 of the solder insulating layer160. In this case, the protruding portion of the solder insulating layer160, which is inserted into the concave portion360, may be prevented from moving to the left and right, and the lateral external force applied to the solder paste1may be reduced.

As the solder insulating layer160and the external frame300are provided in the above-mentioned structure, the structural stability of the light emitting diode may be improved.

FIG. 14is a cross-sectional view of a display device to which a light emitting diode module is applied according to an exemplary embodiment.

Referring toFIG. 14, a display device1000includes a liquid crystal panel1110, a backlight unit1120, a support main1130, a cover bottom1150, and a top cover1140.

The liquid crystal panel1110may be a main component to display an image, and includes first and second substrates1112and1114coupled to each other with a liquid crystal layer interposed therebetween. The backlight unit is disposed at a rear side of the liquid crystal panel1110.

The backlight unit1120includes a light emitting diode module1160arranged along a longitudinal direction of at least one edge of the support main1130, a reflective plate1125having a white or silver color, for example, and disposed on the cover bottom1150, a light guide plate1123disposed on the reflective plate1125, and a plurality of optical sheets1121disposed above the light guide plate1123.

The light emitting diode module may include the light emitting diode described with reference toFIGS. 1 to 12B, and may be implemented as the side-type light emitting diode module.

Accordingly, the light emitting diode module of the backlight unit1120may effectively dissipate heat, and thus, the display device1000ofFIG. 14may have a small temperature rise width even when used for a long time, and may stably display an image without a luminance change.

FIGS. 15A to 15Dare plan views showing an upper surface of a mother substrate MS according to an exemplary embodiment.

Referring toFIG. 15A, the mother substrate MS includes a plurality of substrate patterns110a,110b, and110c, and an alignment mark111.

The substrate included in the light emitting diode may be manufactured by dicing the mother substrate MS. As such, the mother substrate MS is provided with the substrate patterns110a,110band110cthat may become substrates after the dicing process.

According to the illustrated exemplary embodiment, the mother substrate MS may include first, second, and third substrate patterns110a,110b, and110c. However, the inventive concepts are not limited thereto, and in some exemplary embodiments, the mother substrate MS may include more number of substrate patterns or less number of substrate patterns than the first to third substrate patterns110a,110b, and110c.

For example, the first substrate pattern110ahas the same edge as the substrate on the mother substrate MS. The edge may not perform any electrical function when the substrate is manufactured, and the edge is used to distinguish substrates different from each other during the dicing and patterning processes.

As the first substrate pattern110aincludes the edge, more substrates may be substantially simultaneously manufactured. In detail, according to a conventional process, since each substrate is manufactured using a mold, there is a spatial limitation in manufacturing large number of substrates at the same time. However, according to the exemplary embodiments, the substrates may be manufactured by forming the substrate patterns110a,110b, and110c, which are distinguished from each other by the edge, on one mother substrate MS and dicing between the substrate patterns110a,110b, and110c. Accordingly, multiple substrates may be substantially simultaneously manufactured as long as there is a space to perform the dicing process. Therefore, the illustrated processes according to the exemplary embodiments may manufacture a greater number of substrates substantially simultaneously as compared with the conventional processes.

The first substrate pattern110amay include a first upper electrode pattern121a, a second upper electrode pattern122a, a third upper electrode pattern123a, and a fourth upper electrode pattern124a. The first upper electrode pattern121a, the second upper electrode pattern122a, the third upper electrode pattern123a, and the fourth upper electrode pattern124amay be formed by forming a conductive layer on the mother substrate MS and patterning the conductive layer.

Among them, the first upper electrode pattern121awill be described as a representative example. The first upper electrode pattern121amay include a circular portion and an elongated portion. The circular portion may have a circular shape and may be provided integrally with the elongated portion at one side of the elongated portion.

Since the first upper electrode pattern121aincludes the circular portion and the elongated portion, the first upper electrode pattern121amay not stick out from the first substrate pattern110a. In detail, when the conductive layer provided on the mother substrate MS is patterned to form the first upper electrode pattern121a, the first upper electrode pattern121amay be inclined due to process errors. When the first upper electrode pattern121ahas a substantially rectangular shape with a corner at its end, the corner may protrude to the outside of the first substrate pattern110aeven though the first upper electrode pattern121ais slightly inclined. When a portion of the first upper electrode pattern121aprotrudes to the outside of the first substrate pattern110a, the first upper electrode may be exposed to a side surface of a first substrate after the dicing process, and thus, unintended short-circuit may occur via the first upper electrode.

According to an exemplary embodiment, since the circular portion having the circular shape is provided at the end of the first upper electrode pattern121a, the probability that the end of the first upper electrode pattern121ais exposed to the outside of the first substrate pattern110ais lowered even though the first upper electrode pattern121ais inclined. Therefore, the probability that the unintended short-circuit occurs via the first upper electrode formed by the dicing process may be lowered.

Meanwhile, in the above description, the first upper electrode pattern121ahas been described as a representative example among the first upper electrode pattern121a, the second upper electrode pattern122a, the third upper electrode pattern123a, and the fourth upper electrode pattern124a. However, the structures and functions of the first upper electrode pattern121amay be applied equally to the second upper electrode pattern122a, the third upper electrode pattern123a, and the fourth upper electrode pattern124a.

The alignment mark111is disposed between the first, second, and third substrate patterns110a,110b, and110c. The alignment mark111allows the mother substrate MS to be accurately aligned in the dicing process. As used herein, the term “accurately aligned” refers that the mother substrate MS is located such that the first, second, and third substrate patterns110a,110b, and110cremain intact without being cut off by the dicing process.

The alignment mark111may be formed with the first, second, and third substrate patterns110a,110b, and110cthrough the same process. For example, a conductive layer is formed on the mother substrate MS and patterned to remain the first, second, and third substrate patterns110a,110b, and110cand the alignment mark111.

The alignment mark111may have a width smaller than a width between the first, second, and third substrate patterns110a,110b, and110c. Thus, although the alignment mark111is inclined in the patterning process of the alignment mark111, the inclined alignment mark111is not connected to the first, second, and third substrate patterns110a,110b, and110c.

In addition, the width of the alignment mark111may be smaller than a width of a blade used in the dicing process. Therefore, the alignment mark111may be removed in the process of dicing the mother substrate MS along the alignment mark111. When the alignment mark111is not removed in the dicing process, the remaining alignment mark111may be exposed at the side surface of the substrate. In particular, since the alignment mark111may have a conductivity as the first upper electrode pattern121a, the exposed alignment mark111may cause short-circuit. Accordingly, the alignment mark111according to an exemplary embodiment has the width smaller than the width of the dicing blade, and thus, the alignment mark111is prevented from remaining on the substrate, thereby preventing the unintended short-circuit from occurring.

Referring toFIG. 15B, a second upper electrode pattern122a′ and a third upper electrode pattern123a′ have a different shape from a first upper electrode pattern121a′ and a fourth upper electrode pattern124a′, respectively. The shape of the mask used in the patterning process may be changed to change the shape of the second upper electrode pattern122a′ and the third upper electrode pattern123a′ to be different from the shape of the first upper electrode pattern121a′ and the fourth upper electrode pattern124a′.

As the shape of the second upper electrode pattern122a′ and the third upper electrode pattern123a′ is different from the shape of the first upper electrode pattern121a′ and the fourth upper electrode pattern124a′, respectively, the cathode and the anode may be easily distinguished from each other after the dicing process. Accordingly, when mounting the light emitting diode chip on the lead frame unit, the pad portion of the light emitting diode chip and the electrode of the lead frame unit may be prevented from being matched incorrectly.

In some exemplary embodiments, the second substrate pattern110b′ may be rotated by about 180 degrees when the dicing process is performed and the light emitting diode is mounted.

Referring toFIG. 15C, a mother substrate MS″ includes a first alignment mark111″ and a second alignment mark112″.

The second alignment mark112″ may be disposed between a first anode mark122a″ and a second anode mark123a″. The second alignment marks112″ is used together with the first alignment mark111″ to align the mother substrate MS″ such that first, second, and third substrate patterns110a″′,110b″′,110c″ are not damaged in the dicing process.

The second alignment mark112″ may be formed together with a first cathode pattern121a″ through the same process when the first cathode pattern121a″ is formed. Accordingly, the second alignment mark112″ may have conductivity. As such, the second alignment mark112″ may be formed so as not to cross the first substrate pattern110a″ or not to meet the first anode pattern122a″ or the second anode pattern123a″. The shape of the second alignment mark112″ is not particularly limited, and thus, in some exemplary embodiments, the second alignment mark112″ having various shapes other than a cross shape may be manufactured.

Referring toFIG. 15D, each of a first upper electrode pattern121a″′, a second upper electrode pattern122a″′, a third upper electrode pattern123a″′, and a fourth upper electrode pattern124a″′ has a substantially rectangular shape having one rounded end. When the first upper electrode pattern121a″′, the second upper electrode pattern122a″′, the third upper electrode pattern123a″′, and the fourth upper electrode pattern124a″′ have the substantially rectangular shape with one rounded end, the ease in operation of digging the via hole may be secured, and the first to fourth upper electrode patterns121a″′ to124a″′ may be prevented from being exposed to the outside of the substrate.

FIGS. 16A and 16Bare plan views of an upper surface of a mother substrate according to an exemplary embodiment.

Referring toFIGS. 16A and 16B, a first substrate pattern110a″′ includes a cathode pattern123a″′ and an anode pattern124a″′. Since the first substrate pattern110a″′ includes one cathode pattern123a″′ and one anode pattern124a″′, a plurality of substrate patterns110a″′,110b″′, and110c″′ may be arranged in a matrix form.

In addition, a first alignment mark111″′ and a second alignment mark112″′ may be disposed between the substrate patterns110a″′,110b″′, and110c″′. The first alignment mark111″′ may be arranged in a column direction of the substrate patterns110a″′,110b″′, and110c″, and the second alignment mark112″′ may be arranged in a row direction of the substrate patterns110a″′,110b″′, and110c″.

As shown inFIG. 16B, the cathode pattern123a″′ and the anode pattern124a″′ may have different shapes from each other. As the cathode pattern123a″′ and the anode pattern124a″′ have different shapes from each other, the light emitting diode chip may be easily mounted.

FIG. 17is a plan view of a lower surface of a body portion according to an exemplary embodiment.

Referring toFIG. 17, a first body portion110_1and a second body portion110_2are disposed to be substantially symmetrical with each other with respect to a horizontal direction. A first body portion through hole151_1and a second body portion through hole151_2may be substantially simultaneously formed through the first body portion110_1and the second body portion110_2, respectively.

Since the first body portion through hole151_1and the second body portion through hole151_2are substantially simultaneously formed through the first body portion110_1and the second body portion110_2, respectively, the process efficiency may be improved.

According to exemplary embodiments, a thinner light emitting diode and a thinner light emitting diode module may be provided, with a higher degree of integration.

In addition, according to the exemplary embodiments, the occurrence of short-circuit occurs in the light emitting diode and light emitting diode module may be substantially prevented or suppressed, and heat resistance of the light emitting diode and the light emitting diode module may be improved.