Lamp system with electronic ballast

A lamp system including: a power-factor compensator, a current controller including first and second switches, the current controller being coupled to the on/off periods of the first and second switches for controlling the magnitude of a lamp driving current from the power-factor compensator; a lamp section including a resonance circuit composed of a resistor, an inductor and a capacitor, and emitting light under a current from the current controller; a ballast for forming a feedback voltage using a current flowing through the lamp section including soft start and dimming control. The lamp system compares the feedback voltage to a reference voltage to determine whether the current input to the lamp section is an overcurrent, an undercurrent, or a normal current. The ballast controls the on/off periods of the first and second switches.

FIELD OF THE INVENTION

The present invention relates to a lamp system with an electronic ballast circuit. More specifically, the present invention pertains to a lamp system with an electronic ballast circuit capable of supplying the power consumed at the lamp in conformity with the intention of the designer.

BACKGROUND OF THE INVENTION

In general, a lamp system with an electronic ballast circuit performs an open loop control in order to generate a separate excitation frequency. During the open loop control, the separate excitation frequency for driving the LC (Inductor-Capacitor) resonance terminal of the lamp is varied due to errors of the time capacitor, as well as, the inductor or capacitor of the LC resonance terminal. As a result of this frequency variation the lamp may experience difficulty turning on and/or the brightness may vary, such that it is greater or less than the intended designed value.

SUMMARY OF THE INVENTION

It is an object of the present invention to solve the problems related to the prior art and to provide a lamp system with an electronic ballast circuit that performs a feedback closed control to detect the current flowing through the lamp and to compare the detected current to a reference voltage. In this regard, the lamp system controls the variation of the frequency occurring due to the errors of the elements and performs normal operational lamp control, as well as a soft start function and a soft dimming function.

To achieve the above object of the present invention, the lamp system with an electronic ballast circuit generates a reference voltage according to the user's on/off and illuminating directions. Once the reference voltage is generated it is compared to a voltage obtained by feeding back the current flowing through the lamp. The comparison thereby controls the magnitude of the current flowing through the lamp.

In one aspect of the present invention, there is provided a lamp system including a power supply, a current controller, a lamp section, and a feedback section.

The power supply is provided to supply power to the entire system, and the current controller includes first and second switches. The current controller is coupled to the on/off periods of the first and second switches to control the magnitude of a lamp driving current.

The lamp section is operated using the current supplied by the current controller. The feedback section generates a feedback voltage using the current flowing through the lamp section, and compares the feedback voltage to a reference voltage to determine whether the current input to the lamp section has a magnitude of an overcurrent, an undercurrent, or a normal current. Thus, the feedback section can control the on/off periods of the first and second switches.

In another aspect of the present invention, there is provided a ballast circuit including an undervoltage protector, a soft starter, a dimming controller, a feedback section, a frequency controller, and a switch driver.

The undervoltage protector prevents a malfunction of the entire system, and generates an initial operating signal of the entire system upon receiving a voltage of less than the voltage capable of operating the entire system.

The soft starter gradually increases a soft start voltage to a predetermined level to proceed with a start-up of the lamp upon receiving the initial operating signal from the undervoltage protector.

The dimming controller permits a gradual increase in voltage even when an externally input dimming signal is changed in order to regulate the light intensity.

The feedback section compares a feedback voltage generated based on the magnitude of the current flowing through the lamp to a reference voltage generated based on the output signals from the soft starter and the dimming controller. As a result of the comparison the feedback section provides normal operation to the lamp, as well as, soft start and soft dimming function capability. In addition, the feedback section determines whether the current flowing through the lamp is an overcurrent, an undercurrent, or a normal current.

The frequency controller generates first and second frequencies for regulating the magnitude of the current input to the lamp based on a received signal from the feedback voltage. The frequency controller generates the first frequency when the feedback voltage is greater than the reference voltage and the second frequency is being generated when the feedback voltage is less than the reference voltage.

The switch driver is coupled to the first and second frequencies to control the on/off state of the switch of the current controller.

In still another aspect of the present invention, there is provided a lamp system including a power-factor compensator, a current controller, a lamp section, a ballast, and a dimming voltage controller.

The power-factor compensator rectifies AC power and improves the power factor of the rectified AC power to increase the effective power supplied to the entire system.

The current controller includes first and second switches. The current controller is coupled to the on/off periods of the first and second switches for controlling the magnitude of a lamp driving current from the power-factor compensator.

The lamp section includes a resonance circuit composed of a resistor, an inductor and a capacitor, and it emits light under a current from the current controller.

The ballast forms a feedback voltage using a current flowing through the lamp section during operation of the lamp including during soft start and dimming control periods, and compares the feedback voltage to a reference voltage to determine whether the current input to the lamp section is an overcurrent, an undercurrent, or a normal current. Thus the ballast controls the on/off periods of the first and second switches.

The dimming voltage controller generates a dimming signal to the ballast to perform the dimming control of the lamp.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Hereinafter, a description will be given in detail as to a lamp system with an electronic ballast according to an embodiment of the present invention with reference to the accompanying drawings.

FIG. 1 is a circuit diagram illustrating the mechanism of a lamp system with an electronic ballast according to the embodiment of the present invention.

Referring to FIG. 1 the lamp system includes a power supply 10 , a current controller 200 , a lamp section 300 , and a feedback section 440 .

As an input current AC is applied from the power supply 10 , a lamp driving current is supplied to the lamp section 300 based on the ON/OFF states of switches S 1 and S 2 of the current controller 200 . With switch S 1 ON and switch S 2 OFF, the lamp driving current flows through switch S 1 , inductor L, lamp LAMP and capacitor C 3 . With switch S 1 OFF and switch S 2 ON, the lamp driving current flows through capacitor C 2 , lamp LAMP, inductor L and switch S 2 .

If the switch S 1 is ON, the switch S 2 being OFF, inductor L and capacitors C 1 and C 3 then form a resonance circuit; otherwise, if the switch S 1 is OFF, the switch S 2 being ON, capacitors C 2 and C 3 and inductor L form a resonance circuit to emit light from the lamp LAMP.

The current flowing through the lamp LAMP passes through a resistor R sense to form a feedback voltage, which is then applied to the amplifier AMP and compared to the reference voltage V ref . The feedback voltage is amplified by the magnifying power of the amplifier AMP and then output to a frequency controller.

When an overcurrent flows through the lamp LAMP to increase the feedback voltage and hence the voltage applied to the frequency controller, the frequency controller raises a frequency input to the gate of the current controller 200 to reduce the duty factors of the switches S 1 and S 2 and hence the current flowing through the lamp section 300 .

When an undercurrent flows through the lamp LAMP to decrease the feedback voltage and hence the voltage applied to the frequency controller, the frequency controller lowers a signal frequency input to the current controller 200 to increase the duty factors of the switches S 1 and S 2 and hence the current flowing through the lamp section 300 .

Meanwhile, a reference voltage supply (not shown) adjusts the reference voltage V ref input to the amplifier AMP of the feedback section 440 in conformity to the operation of the lamp system, namely, soft start, normal operation, or soft dimming, so that the lamp section 300 is operated according to the intention of the user.

FIG. 2 is a circuit diagram of a lamp system with an electronic ballast according to the embodiment of the present invention.

As shown in FIG. 2 , the lamp system with an electronic ballast includes a power-factor compensator 100 , a current controller 200 , a lamp section 300 , a ballast 400 , and a dimming voltage controller 500 .

The power-factor compensator 100 rectifies an AC power and improves the power factor of the rectified AC power to increase the effective power supplied to the entire system, and includes a boost converter 110 , an error amplifier 120 , an arithmetic circuit 130 , a comparator COM 1 132 , a zero current detector 140 , and a switching driver 150 .

The boost converter 110 is composed of a rectifier 111 for rectifying an input AC voltage into an output power voltage, a transformer T, a diode D 1 , resistors R s and R det , a capacitor C 0 and a switching MOS FET (Field Effect Transistor) 113 .

One terminal of the secondary coil of the transformer T is connected to the resistor R det , the source of the switching MOS FET 113 being grounded via the resistor R s . A contact between the source of the switching MOS FET 113 and the resistor R s is connected to a non-inverting input of the comparator COM 1 132 .

The error amplifier 120 has an inverting input for receiving a voltage V 1 , which is the output voltage V DD of the boost converter 110 divided by resistances R 3 and R 4 . Additionally, the error amplifier 120 has a non-inverting input for receiving the reference voltage V ref .

The arithmetic circuit 130 receives the output voltage (V m2 V ref ) of the error amplifier 120 and a voltage V m1 , which is the input power divided by resistances R 1 and R 2 , and outputs a voltage V m0 given by Equation 1: V m0 = K V m1 ( V m2 - V ref ) Equation 1

where K is a proportional constant.

The comparator COM 1 132 compares the output voltage V m0 of the arithmetic circuit 130 (the inverting input) to a voltage V cs , obtained by sensing the current flowing through the switching MOS FET 113 (the non-inverting input), and then outputs a voltage V cso .

The zero current detector 140 detects the time when the current flowing through the secondary coil of the transformer T becomes zero by the magnitude of the detected voltage V det applied to the resistor R det .

The switching driver 150 receives the output voltage of the zero current detector 140 and the output voltage V cso of the comparator COM 1 132 as a set signal S and a reset signal R, respectively, and applies the output Q to the gate of the switching MOS FET 113 .

Now, a description will be given as to the operation of the power-factor compensator 100 for the embodiment of the present invention with reference to FIGS. 2 and 3 .

The comparator COM 1 132 compares the voltage V cs to the voltage V m0 and outputs a pulse signal at the time when the voltage V cs becomes greater than the voltage V m0 . The pulse signal resets the switching driver 150 to turn OFF the switching MOS FET 113 , so that the switching MOS FET 113 is switched OFF at the time when the voltage V cs is equal to the voltage V m0 .

The output voltage V m0 of the arithmetic circuit 130 is, as understood from Equation 1, proportional to the voltage V m1 , which is the distributed voltage of the input voltage V s . Therefore, the waveform of the voltage V m0 has the same phase as that of the power voltage V s .

When the switching MOS FET 113 is switched ON, there is a nearly linear increase in the current flowing through the primary coil L 1 of the transformer T and hence the sensed voltage V cs as shown in FIG. 2 . When the sensed voltage V cs is equal to the voltage V m0 , the comparator COM 1 132 outputs a pulse voltage. As a result, the switching driver 150 is reset to turn the switching MOS FET 113 OFF.

With the switching MOS FET 113 OFF, the primary coil L 1 of the transformer T emits a counter electromotive force to make the voltage V det have a positive value. Therefore, when the switching MOS FET 113 is OFF, the current flowing through the primary coil L 1 of the transformer T decreases in a nearly linear manner and approaches zero.

The voltage V det approaches zero at the time when no current flows (i.e., at zero current), so that the zero current detector 140 outputs a high voltage. This high voltage is applied to the set terminal of the switching driver 150 to set the switching driver 150 , and the output voltage V a of the switching driver 150 is in a high state.

Consequently, the switching MOS FET 113 is switched ON and the above procedures are repeated. Such a repetition of the above procedures forms an input average current having the same phase as the voltage V m0 to provide electric power with an improved power factor to the lamp system.

The current controller 200 includes a transformer T 2 and switches Q 2 and Q 3 , the transformer T 2 having a primary coil connected to the ballast and a secondary coil composed of two windings so as to form two secondary voltages, the switches Q 2 and Q 3 having gates connected to the two secondary outputs.

The current controller 200 has the primary coil connected to the ballast and coupled to an input signal frequency at the ballast, thus changing the direction of the current flowing through the primary coil. The two secondary windings are opposite to each other in winding direction so that the direction of the switch driving current at the secondary coil is also reversed according to the changed direction of the current at the primary coil. Consequently, the switches Q 2 and Q 3 connected to the two secondary windings are not switched ON at the same time and have switching frequencies proportional to an input signal frequency applied to the primary coil of the transformer T 2 from the ballast.

That is, with an increase in the signal frequency applied to the primary coil of the transformer T 2 from the ballast, the duty ratio at which the switches Q 2 and Q 3 are turned ON becomes smaller and the current passing through the switches Q 2 and Q 3 during one cycle also decreases. As the signal frequency decreases, the duty ratio at which the switches Q 2 and Q 3 are turned ON becomes larger and the current flowing through the switches Q 2 and Q 3 during one cycle increases.

The lamp section 300 includes first and second lamps LAMP 1 and LAMP 2 for emitting light with an input lamp driving current under the control of the current controller 200 , and inductors L 2 and L 3 and capacitors C 16 , C 17 , C 18 , C 19 , C 20 and C 21 that are connected to the first and second lamps LAMP 1 and LAMP 2 to form a resonance circuit.

The inductors L 2 and L 3 and the capacitors C 16 , C 17 , C 18 , C 19 , C 20 and C 21 are configured to form a resonance circuit under the control of the current controller 200 . That is, with the switch Q 2 of the current controller 200 ON and the switch Q 3 OFF, an input current of the first lamp LAMP 1 has a path formed in the order of a parallel circuit composed of inductor L 2 , lamp LAMP 1 , resistor R 16 and capacitor C 16 , and capacitor C 21 ; and an input current of the second lamp LAMP 2 has a path formed in the order of a parallel circuit composed of inductor L 3 , lamp LAMP 2 , resistor R 17 and capacitor C 17 , and capacitor C 19 .

With the switch Q 2 of the current controller 200 OFF and the switch Q 3 ON, an input current of the first lamp LAMP 1 has a path in the order of a parallel circuit composed of capacitor C 20 , lamp LAMP 1 , resistor R 16 and capacitor C 16 , and inductor L 2 ; and an input current of the second lamp LAMP 2 has a path formed in the order of a parallel circuit composed of capacitor C 18 , lamp LAMP 2 , resistor R 17 and capacitor C 17 , and inductor L 3 . The inductors, capacitors and resistors on each current path are configured to form a resonance circuit.

The ballast 400 controls the magnitude of the current flowing through the lamp section 300 by the user's manipulations in order to operate the entire system safely and accurately, and includes, as shown in FIG. 16 , an undervoltage protector 410 , a soft starter 420 , a dimming controller 430 (not designated as such in FIG. 16 but including 431 , 433 and 435 ), a feedback section 440 , a frequency controller 450 , a switch driver 460 , an overcurrent protector 470 , a lamp selector 480 , and a shutdown controller 490 .

Hereinafter, reference will be made as to the respective components of the ballast with reference to the accompanying drawings.

FIG. 4 is a circuit diagram of the undervoltage protector 410 for the embodiment of the present invention.

As illustrated in FIG. 4 , the undervoltage protector 410 is to prevent a malfunction of the entire system under an input of a voltage of less than the operating voltage of the system, and includes an ignition and operating voltage section 411 , an undervoltage detector 413 , and a first shutdown section 415 .

The ignition and operating voltage section 411 generates an ignition voltage for starting the entire system with an input current of the power-factor compensator 100 under an input starting signal of the entire system, and then receives a current from the current controller 200 to form a voltage for maintaining the operation of the entire system.

The ignition and operating voltage section 411 includes capacitors C 1 and C 2 and diodes D 2 and D 3 , with one terminal of the capacitor C 1 connected to the output of the rectifier 111 , one terminal of the capacitor C 2 connected to the source of the switch Q 2 , the anode of the diode D 2 connected to the other terminal of the capacitor C 2 , the cathode of the diode D 2 connected to one terminal of the capacitor C 1 , the cathode of the diode D 3 connected to a common terminal that is coupled to the other terminal of the capacitor C 2 and the anode of the diode D 2 , and the anode of the diode D 3 connected to the common terminal of the capacitors C 19 and C 21 .

The ignition and operating voltage section 411 forms an ignition voltage to start the entire system when a start signal for the entire system causes a power supply voltage V s output via the rectifier 111 of the power-factor compensator 100 to accumulate a defined amount of charge. This ignition voltage is not enough to operate the entire system. So, when the switch Q 2 of the current controller 200 is ON, with the switch Q 3 OFF, the current supplied by the current controller 200 is charged in the capacitor C 2 and, if discharged completely, charged again in the reverse direction of the previous charging operation of the capacitor C 2 via the lamp section 300 and the diode D 3 to form an operation maintenance voltage. With diode D 3 OFF and diode D 2 ON, the operation maintenance voltage formed at the capacitor C 2 is applied to the undervoltage detector 413 .

The cathode of Zener diode ZD 1 is connected to one terminal of the capacitor C 1 and the other terminal of the capacitor C 1 is grounded so as to clamp the maximum of the ignition voltage and thereby prevent an overvoltage from being applied to the undervoltage protector 410 .

The undervoltage detector 413 compares a voltage from the ignition and operating voltage section 411 to a reference voltage V u so as to prevent a malfunction of starting-up the entire system with an input voltage of less than the ignition voltage.

This undervoltage detector 413 includes a comparator, which compares the ignition voltage and the operation maintenance voltage received from the ignition and operating voltage section 411 at a non-inverting input to an undervoltage reference voltage V u . The comparator adopts a Schmidt trigger circuit having a hysteresis characteristic to output a high or low signal accurately at the time when the ignition voltage and the operation maintenance voltage are equal to the undervoltage reference voltage V u .

The first shutdown section 415 includes a transistor for stopping the operation of the entire system when the ignition voltage and the operation maintenance voltage are less than the undervoltage reference voltage V u . The transistor has a base connected to the output of the undervoltage detector 413 , an emitter being grounded, and a collector connected to a soft capacitor C s of the soft starter 420 that will be described later.

Now, a description will be given as to the operation of the undervoltage protector with reference to the accompanying drawings.

As an initial system start signal is input, the power supply voltage V s rectified at the rectifier 111 gives a charge of electricity to the capacitor C 1 and the voltage applied to the capacitor C 1 increases gradually. If the voltage applied to the capacitor C 1 is less than the undervoltage reference voltage V u , the low signal output from the comparator is converted to a high signal via a signal inverter 414 and the high signal turns on the first shutdown section 415 . The first shutdown section 415 when actuated sinks the electric charge at the soft capacitor C s to ground, thus inhibiting the operation of the entire system.

If the voltage applied to the capacitor C 1 continues being increased to a voltage greater than the undervoltage reference voltage V u , the comparator, using a Schmidt trigger circuit, outputs a high signal immediately. This high signal is converted to a low signal via the signal inverter 414 to turn off the first shutdown section 415 , which begins charging the soft capacitor C s and hence the soft start of the entire system.

When the start-up of the entire system actuates the current controller 200 to turn the switch Q 2 ON and the switch Q 3 OFF, the current supplied by the current controller 200 is charged in the capacitor C 2 and, if discharged completely, charged again in the reverse direction of the previous charging operation of the capacitor C 2 via the lamp section 300 and the diode D 3 to form an operation maintenance voltage. With diode D 3 OFF and diode D 2 ON, the operation maintenance voltage formed at the capacitor C 2 is applied to the undervoltage detector 413 .

If the voltage applied to the non-inverting input of the undervoltage detector 413 is greater than the undervoltage reference voltage V u , the undervoltage detector 413 outputs a high signal to turn on the switch 416 and the voltage applied to the non-inverting input forms an aV reference voltage V ref and an internal bias voltage via the switch 416 .

FIG. 5 is an equivalent circuit diagram of the soft starter for the embodiment of the present invention.

As shown in FIG. 5 , the soft starter 420 includes a first current supply I s1 for supplying the current upon receiving the ignition voltage from the undervoltage protector, a start voltage generator C s for forming a start voltage with a predetermined time delay upon receiving the current from the first current supply I s1 , a start reference voltage generator 425 , and a start frequency generator 427 (as shown in FIG. 6 ).

The start voltage generator C s has one terminal connected to one terminal of the first current supply I s1 , the other terminal being grounded.

The start reference voltage generator 425 includes a comparator 425 - 1 , a first switch 425 - 2 , a first controlled current source 425 - 3 , a second switch 425 - 4 , and a second controlled current source 425 - 5 .

The comparator 425 - 1 has an inverting terminal connected to a common terminal coupled to the start voltage generator C s and the first current supply I s1 , and a non-inverting terminal for receiving a soft start reference voltage V sref . If the comparator 425 - 1 outputs a high signal, the first switch 425 - 2 is turned ON; otherwise, when the comparator 425 - 1 outputs a low signal, the second switch 425 - 4 is turned ON.

The first controlled current source 425 - 3 has one terminal connected to the first switch 425 - 2 , and generates a current having a magnitude of G 1 V cs when the comparator 425 - 1 outputs a high signal to turn the first switch ON.

The second controlled current source 425 - 5 has one terminal connected to the second switch 425 - 4 , and generates a current having a magnitude of G 2 V sref when the comparator 425 - 1 outputs a low signal to turn the second switch 425 - 4 ON.

The start frequency generator 427 , shown in the actual soft starter circuit drawing of FIG. 6 , is provided to form a voltage for the initial frequency of the frequency controller 450 during the initial operation of the soft starter 420 , and includes diodes D 4 and D 5 , transistor Q sf , and capacitor C sf .

The transistor Q sf has a base connected to a common terminal coupled to the first current supply I s1 and the start voltage generator C s , an emitter connected to the cathode of the diode D 5 , and a collector being grounded.

The cathode of the diode D 4 is connected to the anode of the diode D 5 . One terminal of the capacitor C sf is connected to a common terminal coupled to the output of the feedback section 440 and the anode of the diode D 4 , the common terminal being connected to the input of the frequency controller 450 .

When the first current supply I s1 gives an electric charge to the start voltage generator C s and gradually increases the start voltage V cs to be applied to the base of the transistor Q sf , the pnp-type transistor Q sf is initially ON and then is switched OFF. With the transistor Q sf ON, the diodes D 4 and D 5 are turned ON to cause a voltage drop of about 2.1 V (0.7V 3) and give the corresponding amount of electric charge from the feedback section 440 to the capacitor C sf .

Accordingly, applying voltage to the capacitor C sf of the start frequency generator 427 at the same time as the operation of the soft starter 420 actuates the frequency controller 450 to gradually increase the start voltage V cs and turn the transistor Q sf OFF, so that the subsequent input voltage of the frequency controller 450 becomes a voltage output to the feedback section 440 .

The transistor Q sf can be protected with a Zener diode ZD 3 , which has a cathode connected to the base of the transistor Q sf and an anode being grounded, and clamps an overvoltage otherwise applied to the base of the transistor Q sf .

The frequency controller 450 can also be protected with a Zener diode ZD 2 , which has a cathode connected to the anode of the diode D 4 and an anode being grounded, and clamps an overvoltage otherwise applied to the frequency controller 450 .

Now, a description will be given in detail as to the operation of the soft starter 420 with reference to the accompanying drawings.

When an ignition voltage greater than the undervoltage reference voltage V u is applied to the inverting terminal of the undervoltage detector 413 , the first shutdown section 415 is turned OFF to give an electric charge to the start voltage generator C s via the first current supply I s1 , forming a start voltage. The start voltage is gradually increased with the time delay of the start voltage generator C s . Thus the ignition voltage applied does not immediately actuate the entire system but permits gradual formation of the start voltage V cs by the start voltage generator C s , thus alleviating the shock on the entire system.

The start voltage V cs is gradually increased from zero as the first current supply I s1 gives an electric charge to the start voltage generator C s , at the early stage where the start voltage generator C s hardly has any residual electric charge. With the ignition voltage applied, the start voltage is still less than the start reference voltage V sref and the comparator 425 - 1 outputs a high signal to turn the first switch 425 - 2 ON, causing the first controlled current source 425 - 3 to generate a current having a magnitude of G 1 V cs .

If the start voltage V cs is gradually increased above the soft start reference voltage V sref , the comparator 425 - 1 outputs a low signal to turn the second switch 425 - 4 ON, thus causing the second controlled current source 425 - 5 to generate a current having a magnitude of G 2 V sref .

The currents of G 1 V cs and G 2 V sref form a reference voltage at a soft starting stage that will be compared to the feedback voltage later.

FIG. 6 is an actual circuit diagram of the soft starter for the embodiment of the present invention.

As shown in FIG. 6 , the soft starter used in the embodiment of the present invention includes a first current supply I s1 , a start voltage generator C s , a first current amplifier AMP 1 , a transistor Q 4 , and a first current mirror CM 1 .

The first current supply I s1 and the start voltage generator C s are the same as described above and will not be further described.

The first current amplifier AMP 1 and the first current mirror CM 1 have the same function as the above-stated start reference voltage generator 425 . The first current amplifier AMP 1 selects the lower of the start voltage V cs and the soft start reference voltage V sref , which are fed into the two non-inverting inputs of the first current amplifier AMP 1 , respectively. For this purpose, the first current amplifier AMP 1 has one non-inverting input connected to a common terminal coupled to the first current supply I s1 and the start voltage generator V sref , and the other non-inverting input connected to the anode of the soft start reference voltage V sref . The inverting input of the first current amplifier AMP 1 is connected to one terminal of resistor R ss .

The output of the first current amplifier AMP 1 turns transistor Q 4 ON so that the first current mirror CM 1 supplies the transistor Q 4 with a current to be coupled to the voltage selected by the first current amplifier AMP 1 . For this purpose, the transistor Q 4 has a base connected to the output of the first current amplifier AMP 1 , and an emitter connected to one terminal of the resistor R ss .

The first current mirror CM 1 supplies not only a current to be coupled to the voltage selected by the first current amplifier AMP 1 but also a current of the same magnitude as the feedback section 440 . The voltage supplied to the feedback section 440 from the first current mirror CM 1 forms a reference voltage to be compared with the feedback voltage. For this purpose, the first current mirror CM 1 has one terminal connected to the emitter of the transistor Q 4 and the other terminal connected to the feedback section 440 .

Now, a description will be given as to the operation of the first current amplifier with reference to the accompanying drawings.

FIG. 7 is a circuit diagram of the first current amplifier according to the embodiment of the present invention.

As shown in FIG. 7 , the first current amplifier AMP 1 comprises an internal current supply 420 a including first, second and third current sources I 1 , I 2 and I 3 ; a differential amplifier 420 b including transistors Q 5 , Q 6 , Q 7 , Q 8 , Q 9 , Q 11 and Q 12 , and resistors R 3 and R 4 ; a first internal current mirror 420 c including transistors Q 14 and Q 15 , and resistors R 5 and R 6 ; a second internal current mirror 420 d including transistors Q 10 and Q 11 ; and a third internal current mirror 420 e including transistors Q 12 and Q 13 .

The internal current supply 420 a supplies a driving current to the differential amplifier 420 b.

The differential amplifier 420 b includes a selector circuit 420 b - 1 connected to a common terminal of the emitters of the transistors Q 8 and Q 9 , the selector circuit 420 b - 1 having a common terminal connected to the base of the transistor Q 6 , the bases of the transistors Q 8 and Q 9 being connected to the two non-inverting inputs of the first current amplifier AMP 1 . The differential amplifier 420 b includes the transistor Q 7 , which has an emitter connected to the base of the transistor Q 5 , and a base connected to one terminal of the first resistor R ss .

The selector circuit 420 b - 1 has pnp-type transistors Q 8 and Q 9 , so that only the transistor with the lower of the input voltages V sref and V cs at its base is turned ON and connected to the base of the transistor Q 6 .

The first internal current mirror 420 c generates the same current via the transistors Q 14 and Q 15 .

The second internal current mirror 420 d generates, via the transistors Q 10 and Q 11 , a current of the same magnitude as the current flowing through the transistor Q 14 of the first internal current mirror 420 c.

The third internal current mirror 420 e generates, via the transistors Q 12 and Q 13 , a current of the same magnitude as the current flowing through the transistor Q 15 of the first internal current mirror 420 c.

Now, a description will be given in detail as to the operation of the first current amplifier according to the embodiment of the present invention with reference to FIG. 7 .

When voltages V sref and V cs are less than the source voltage V cc , V sref and V cs are applied to the non-inverting input of the first current amplifier AMP 1 and one of the transistors Q 8 and Q 9 of the selector circuit 420 b - 1 that receives the lower of the voltages V sref and V cs is turned ON.

This is because the transistors Q 8 and Q 9 have emitters connected to each other via a common terminal and collectors being grounded so that the current from the current source I 3 flows almost through one transistor even at a relatively low voltage difference as given by V sref V cs .

When one of the transistors Q 8 and Q 9 is ON, the other being OFF, the differential amplifier 420 b forms a symmetric circuit configuration.

Also, the first internal current mirror 420 c generates currents of the same magnitude via the transistors Q 14 and Q 15 and these currents flow through the transistor Q 10 of the second internal current mirror 420 d and the transistor Q 13 of the third internal current mirror 420 e.

As the current flowing through the transistor Q 11 of the second internal current mirror 420 d and the transistor Q 13 of the third internal current mirror 420 e have the same magnitude as the current from the first internal current mirror 420 c, the current flowing through the transistors Q 10 , Q 11 , Q 12 and Q 13 are all the same in magnitude.

If the differential amplifier 420 b is constituted by the same resistors R 3 and R 4 , and the same transistors Q 5 and Q 6 , making the currents of the same magnitude flow through the transistors Q 5 and Q 6 , the same voltage has to be applied to the bases of the transistors Q 5 and Q 6 and the voltage applied to the first resistor R ss becomes equal to the lower one of the voltages V sref and V cs .

As such, the first current amplifier AMP 1 selects the lower of the voltages applied to the two non-inverting inputs and the selected voltage becomes equal to the voltage at the inverting input of the first current amplifier AMP 1 .

Now, a description will be given as to the operation of the soft starter actually used according to the embodiment of the present invention with reference to FIG. 6 .

When an ignition voltage greater than the undervoltage reference voltage V u is applied to the inverting terminal of the undervoltage detector 413 (FIG. 4 ), the first shutdown section 415 ( FIG. 4 ) is turned OFF to give an electric charge to the start voltage generator C s via the first current supply I s1 , forming a start voltage. The start voltage is gradually increased by the time delay of the start voltage generator C s . Thus the ignition voltage applied does not immediately actuate the entire system but permits gradual formation of the start voltage V cs by the start voltage generator C s , thus alleviating the shock on the entire system.

The start voltage V cs is gradually increased from zero as the first current supply I s1 gives an electric charge to the start voltage generator C s , at the early stage where the start voltage generator C s hardly has a residual charge. With the ignition voltage applied, the start voltage V cs is still less than the start reference voltage V sref and the first current amplifier AMP 1 selects the start voltage V cs .

The voltage applied to the inverting terminal of the first current amplifier AMP 1 is the start voltage V cs , so that the current flowing through the resistor R ss has a magnitude as given by Equation 2: i sr = V cs R ss Equation 2

where i sr represents the current flowing through the resistor R ss .

The current i sr is output at one terminal of the current mirror CM 1 , the current i s of the same magnitude as the current i sr being output at the other terminal of the current mirror CM 1 .

The first current amplifier AMP 1 selects the soft start reference voltage V sref at the time when the start voltage V cs is gradually increased to exceed the soft start reference voltage V sref , that is, immediately after the completion of the soft starting. Thus the voltage applied to the resistor R ss becomes the soft start reference voltage V sref , so that the current flowing through the resistor R ss , has a magnitude as given by Equation 3: i sr = V sref R ss Equation 3

The current i sr is output at one terminal of the current mirror CM 1 , with the current i s of the same magnitude as the current i sr being output at the other terminal of the current mirror CM 1 .

FIG. 8 is a circuit diagram of a dimming controller for the embodiment of the present invention.

As shown in FIG. 8 , the dimming controller 430 prevents a sudden change in the intensity of the light to alleviate the shock on the system, and includes a dimming starter 431 for starting the dimming control, a soft dimmer 433 for forming a reference voltage for soft dimming, and a second shutdown section 435 to prevent a voltage above a normal value from being applied as a dimming voltage V dm to the entire system.

The dimming starter 431 includes a dimming starting detector COM 2 for supplying an electric charge upon receiving a voltage greater than a dimming starting reference voltage V dsref , and a time delay C dm for charging/discharging the electric charge supplied by the dimming starting detector COM 2 with a time delay.

The dimming starting detector COM 2 has a non-inverting terminal connected to a common terminal that is coupled to the first current supply I s1 and the start voltage generator C s , and an inverting terminal connected to the anode of the dimming starting reference voltage V dsref . With the start voltage V cs of the start voltage generator C s being greater than the dimming starting reference voltage V dsref , the dimming starting detector COM 2 outputs a high signal to provide an electric charge to the time delay C sm , which then performs a charging/discharging with a predetermined time delay.

The soft dimmer 433 determines the amount of charge to be accumulated in the time delay C dm and supplies a current for forming a dimming reference voltage to be compared with the feedback voltage based on the externally input dimming voltage. The soft dimmer 433 includes an dimming reference voltage generator AMP 2 , a transistor Q 5 turned on by the output of the dimming reference voltage generator AMP 2 , a resistor R dm , a second current mirror CM 2 and an adder ADD.

The dimming reference voltage generator AMP 2 , which is similar to the above-stated first current amplifier AMP 1 , selects the lower one of the externally input dimming voltage V dm and a soft dimming reference voltage V sdref and applies the selected voltage to the resistor R dm . The dimming reference voltage generator AMP 2 has one non-inverting terminal connected to the dimming voltage V dm and the other non-inverting terminal connected to the anode of the soft dimming reference voltage V sdref . The circuit diagram of the dimming reference voltage generator AMP 2 is similar to that of the first current amplifier AMP 1 and will not be further described.

The resistor R dm is connected to the inverting terminal of the dimming reference voltage generator AMP 2 to receive the selected voltage from the dimming reference voltage generator AMP 2 .

The transistor Q 5 has a base connected to the output of the dimming reference voltage generator AMP 2 , and an emitter connected to a common terminal coupled to the resistor R dm and the dimming reference voltage generator AMP 2 . Thus the transistor Q 5 provides a path for the current flowing through the resistor R dm when the selected voltage of the dimming reference voltage generator AMP 2 is applied to the resistor R dm . For this purpose, one output of the second current mirror CM 2 is connected to the collector of the transistor Q 5 .

Adder ADD has a first terminal connected to the other output of the first current mirror CM 1 of the soft starter 420 , a second terminal connected to the other output of the second current mirror CM 2 , and a third terminal connected to the feedback section 440 , thus subtracting the output current of the second current mirror CM 2 from the output current of the first current mirror CM 1 and generating the result to the feedback section 440 . This operation of the adder ADD causes the feedback section 440 to form a voltage to be compared with the feedback voltage during soft starting, normal operation, soft dimming and normal dimming.

A second shutdown section 435 is to prevent a voltage above a normal value from being applied as a dimming voltage V dm to the entire system. The second shutdown section 435 has an inverting terminal connected to a second shutdown reference voltage V sd2 and a non-inverting terminal connected to the dimming voltage V dm .

Now, a description will be given in detail as to the operation of the dimming controller 430 with reference to FIG. 8 .

When the first current supply I s1 provides an electric charge to the start voltage generator C s , the start voltage V cs is gradually increased to exceed the dimming starting reference voltage V dsref and a high signal is output to supply an electric charge to the dimming power supply C dm , thus completing the preparation for dimming control. The voltage applied to the dimming power supply C dm is the sum of a voltage between the emitter and the base of the transistor Q 5 and a voltage applied to the resistor R dm , so that the amount of electric charge accumulated in the dimming power supply C dm is determined by the sum of the voltage between the emitter and the base of the transistor Q 5 and the voltage applied to the resistor R dm .

With the dimming voltage V dm applied while the electric charge is accumulated in the dimming power supply R dm , the dimming reference voltage generator AMP 2 compares the dimming voltage V dm to the soft dimming reference voltage V sdref and applies the lower one to the resistor R dm .

If the dimming voltage V dm is less than the soft dimming reference voltage V sdref , the current flowing through the resistor R dm via the second current mirror has a magnitude as given by Equation 4: i dr = V d m R d m Equation 4

where i dr represents the current supplied from one output of the second current mirror.

Thus the other output of the second current mirror outputs a current i d of the same magnitude as the current i dr to the adder ADD. The adder ADD subtracts the current i d from a current i s at the other output of the first current mirror CM 1 , and sends the result to the feedback section 440 .

If the dimming voltage V dm is less than the soft dimming reference voltage V sdref , V dm is varied to a voltage V dm1 , the voltage applied to the resistor R dm connected to the inverting terminal of the dimming reference voltage generator AMP 2 . It should be noted that the change from V dm to V dm1 is not sudden but gradually reduced by the time delay of the dimming power supply C dm .

As the voltage applied to the resistor R dm is gradually changed to V dm1 , the current i d input to the adder ADD from the second current mirror CM 2 slowly varies and hence a current i s i d output from the adder ADD varies as well. This prevents a sudden change in the magnitude of the current supplied to the lamp section 300 during dimming.

The time delay of the dimming power supply C dm is give by Equation 5: t = C d m ( V d m + V be ) i ds Equation 5

where t represents the time delay; C dm the capacity of the dimming power supply; V dm the voltage applied to the resistor R dm ; and I cdm the current charged/discharged in/from the dimming power supply.

If the dimming voltage V dm is greater than a predetermined voltage due to external noise, the second shutdown section 435 outputs a high signal to interrupt the current supply to the lamp section 300 and thereby to protect the entire system.

FIG. 9 is a circuit diagram of the feedback section for the embodiment of the present invention.

As shown in FIG. 9 , the feedback section 440 for the embodiment of the present invention includes a feedback voltage generator 441 , and a reference voltage comparator 443 .

The feedback voltage generator 441 includes a sense resistor R sense having one terminal connected to the lamp section 300 for detecting the magnitude of the current output from the lamp section 300 ; and a feedback capacitor C fb having one terminal connected to one terminal of the sense resistor R sense and the other terminal being grounded for accumulating an electric charge of as much as the voltage applied to the sense resistor R sense .

The reference voltage comparator 443 has an inverting terminal connected to the common terminal of the sense resist R sense and the feedback capacitor C fb for receiving a feedback voltage V fb , and a non-inverting terminal connected to the common terminal of a resistor R fb and a current mirror CM 2 for receiving a reference voltage applied to the resist R fb by the input current from the adder ADD, thus comparing the feedback voltage V fb to the reference voltage.

If the feedback voltage V fb is greater than the reference voltage, the reference voltage comparator 443 subtracts a predetermined current from the feedback capacitor C fb ; otherwise, if the feedback voltage V fb is less than the reference voltage, the reference voltage comparator 443 supplies a predetermined current to the feedback capacitor C fb .

Now, a description will be given as to the operation of the feedback section 440 with reference to FIG. 9 .

The current i s i d output from the adder ADD flows through the resistor R fb to form a reference voltage to be compared with the feedback voltage V fb according to the operation of the lamp system such as soft start, normal operation, soft dimming and normal dimming. That is, as the magnitude of the current i s i d varies depending on the operation of the lamp system, the magnitude of the reference voltage applied to the resistor R fb is also changed.

Therefore, the reference voltage comparator 443 compares the feedback voltage V fb formed by the feedback voltage generator 441 from the current output from the lamp section 300 with the reference voltage. If the feedback voltage V fb is greater than the reference voltage, the reference voltage comparator 443 subtracts a predetermined current from the capacitor C fb ; otherwise, if the feedback voltage V fb is less than the reference voltage, the reference voltage comparator 443 supplies a predetermined current to the capacitor C fb .

FIG. 10 is a circuit diagram of the frequency controller for the embodiment of the present invention.

As shown in FIG. 10 , the frequency controller 450 for the embodiment of the present invention is to control a frequency for regulating the magnitude of the current applied to the lamp section 300 based on the magnitude of the voltage formed at the capacitor C fb from a predetermined input/output current of the feedback section 440 by comparison of the feedback voltage V fb with the reference voltage formed from the current i s i d . The frequency controller 450 raises the frequency to reduce the magnitude of the current applied to the lamp section 300 when an overcurrent flows through the lamp section 300 , and lowers the frequency to increase the magnitude of the current applied to the lamp section 300 when an undervoltage flows through the lamp section 300 .

The frequency controller 450 includes a voltage selector 451 , a maximum voltage selector 453 , a minimum voltage selector 455 , a comparative voltage generator 457 , a frequency generator 458 , and a third shutdown section 459 .

The voltage selector 451 receives an initial voltage for operating the frequency controller 450 during the initial soft start at the start frequency generator 427 of the soft starter 420 , and, when the current begins to flow through the lamp after an elapse of time, compares a voltage output from the feedback section 440 to a reference voltage V ref to exclusively output the greater one.

The voltage selector 451 has one non-inverting terminal connected to the output of the reference voltage comparator 443 of the feedback section 440 , and the other non-inverting terminal connected to the reference voltage V ref . The voltage selector 451 has the output connected to the non-inverting terminals of the voltage selector 451 and the maximum voltage selector 453 so as to select the greater one of the voltages applied to these two non-inverting terminals.

The maximum voltage detector 453 detects the maximum voltage to which the comparative voltage can be raised during the operation of the lamp section 300 . Therefore, the longer time is required for the comparative voltage to approach the maximum voltage with an increase in the maximum voltage. The maximum voltage detector 453 has one inverting terminal connected to the output of the voltage selector 451 , and the other inverting terminal connected to a maximum reference voltage V maxref .

The minimum voltage detector 455 detects the minimum voltage to which the comparative voltage can be dropped during the operation of the lamp section 300 . The minimum voltage detector 455 has a non-inverting terminal connected to a minimum reference voltage V minref , and an inverting terminal connected to the non-inverting terminal of the maximum voltage detector 453 .

The comparative voltage generator 457 forms a comparative voltage to be compared at the maximum voltage detector 453 and the minimum voltage detector 455 , and includes a charge supply I charge , a current remover I discharge , a charger C f , and a switch SW.

One terminal of the charge supply I charge is connected to one terminal of the charger C f for supplying an electric charge to the charger C f .

One terminal of the current remover I discharge is connected to a common terminal coupled to the charge supply I charge and the charger C f for removing an electric charge. The current remover I discharge according to the embodiment of the present invention rapidly eliminates the electric charge relative to the charge supply rate of the charge Supply I charge .

The switch SW has one terminal connected to the other terminal of the current remover I discharge , and the other terminal grounded. With the switch SW turned ON, the electric charge in the charger C f is discharged via the current remover I discharge .

The frequency generator 458 includes an SR latch, which has a reset terminal R connected to the output of the maximum voltage detector 453 and a set terminal S connected to the minimum voltage detector 455 , and outputs a signal having a frequency based on the output signals of the maximum voltage detector 453 and the minimum voltage detector 455 .

When a voltage aV is applied to the voltage selector from the feedback section 440 while a normal current flows through the lamp section 300 , the reference voltage V ref , the maximum reference voltage V maxref and the minimum reference voltage V minref satisfy the inequality as represented by Equation 6: V min ref < V ref < aV < V max ref Equation 6

In an embodiment of the present invention, the reference voltage V ref is 2 V and the voltage selector selects a voltage of 2 V formed at the start frequency generator 427 as the reference voltage V ref during the initial start.

The third shutdown section 459 is to interrupt the current applied to the lamp section 300 when a voltage V cf is less than a predetermined voltage due to a certain factor. The third shutdown section 459 includes a comparator, which has a non-inverting terminal connected to a third shutdown reference voltage and an inverting terminal connected to one terminal of the charger C f , to interrupt the current applied to the lamp section 300 when the voltage applied to the charger C f is less than the third shutdown reference voltage V sd3 .

Now, a description will be given as to the operation of the frequency controller 450 with reference to FIGS. 10 and 11 .

FIG. 11 is a waveform diagram illustrating the operation of the frequency controller according to the embodiment of the present invention. This waveform diagram is for the voltage applied to the capacitor C f .

When the soft starter 420 performs a soft start to generate a start voltage V cs , the transistor Q sf of the start frequency generator 427 to which the start voltage V cs is applied is switched OFF. With the transistor Q sf ON, the diodes D 4 and D 5 are also turned ON and the feedback section 440 provides an electric charge to the capacitor C sf . The electric charge supplied to the capacitor C sf causes the frequency controller 450 to have a voltage of about 2 V, which is the sum of voltage drops when the diodes D 4 and D 5 and the transistor Q sf are all ON.

Subsequently, the start voltage V cs is raised to turn the transistor Q sf OFF so that the voltage from the feedback section 440 is output to the frequency controller 450 to control the frequency.

When a voltage aV is applied to the voltage selector 451 from the feedback section 440 , while a normal current flows through the lamp section 300 , the voltage selector 451 compares the voltage aV to the reference voltage to select the greater one.

The input voltage during normal operation is greater than the reference voltage as expressed by Equation 6, and the voltage selector 451 outputs the voltage aV to the maximum voltage detector 453 .

The maximum voltage detector 453 compares the received voltage aV to the maximum reference voltage V maxref to select the lower one, i.e., aV. The maximum voltage detector 453 then compares the voltage aV to a voltage V cf applied to the capacitor C f .

If the voltage V cf is less than the voltage aV and greater than the minimum reference voltage V minref , both the maximum voltage detector 453 and the minimum voltage detector 455 output a low signal, and thus the frequency generator 458 maintains the previous output.

As the frequency generator 458 maintains the previous output, the charge supply I charge continues to supply an electric charge to the capacitor C f . When the voltage V cf applied to the capacitor C f is continuously increased to the voltage aV, the maximum voltage detector 453 outputs a high signal. The voltage V cf is also applied to the inverting terminal of the minimum voltage detector 455 and is greater than the minimum reference voltage V minref , so that the minimum voltage detector 455 outputs a low signal.

Upon receiving the high signal from the maximum voltage detector 453 and the low signal from the minimum voltage detector 455 , the frequency generator 458 with a reset terminal R receiving the high signal outputs a high signal at its output {overscore (Q)}. Under the high signal from the output {overscore (Q)}, the switch SW is turned ON and the current remover I diacharge removes the electric charge from the capacitor C f .

Removal of the electric charge continuously reduces the voltage V cf to the minimum reference voltage V minref , so that the maximum voltage detector 453 outputs a low signal and the minimum voltage detector 455 outputs a high signal.

Upon receiving the high signal at the set terminal S, the frequency generator 458 outputs a high signal at the output Q and a low signal at the output {overscore (Q)} to turn OFF the switch SW. Thus the capacitor C f is supplied with an electric charge by the current supply C f to raise the voltage V cf .

When a normal current is applied to the lamp section 300 , as shown in FIG. 11 , the voltage V cf has a waveform in which the voltage varies between the voltage aV and the minimum reference voltage V minref . In addition, the output Q of the frequency generator 458 generates a frequency proportional to the frequency of the waveform.

If an overcurrent flows through the lamp section 300 during the operation of the lamp system to increase the feedback voltage V fb applied to the sense resistor R sense , the reference voltage comparator 443 subtracts a predetermined current from the capacitor C sf and the voltage applied to the voltage selector 451 from the feedback section 440 is bV that is lower than aV.

The voltage selector 451 compares the voltage bV to the reference voltage V ref and exclusively outputs the greater one, i.e., bV, to the maximum voltage detector 453 , because the input voltage bV is greater than the reference voltage V ref under an overcurrent flowing through the lamp section 300 .

The maximum voltage detector 453 compares the voltage bV to the maximum reference voltage V maxref to select the lower one, i.e., bV, which is then compared to the voltage V cf applied to the capacitor C f .

If the voltage V cf is less than the voltage bV and greater than the minimum reference voltage V minref , both the maximum voltage detector 453 and the minimum voltage detector 455 output a low signal and thus the frequency generator 458 maintains the previous output.

As the frequency generator 458 maintains the previous output, the charge supply I charge continues to supply an electric charge to the capacitor C f . When the voltage V cf applied to the capacitor C f is continuously increased to the voltage bV, the maximum voltage detector 453 outputs a high signal. The voltage V cf is also applied to the inverting terminal of the minimum voltage detector 455 and is greater than the minimum reference voltage V minref , so the minimum voltage detector 455 outputs a low signal.

Upon receiving the high signal from the maximum voltage detector 453 and the low signal from the minimum voltage detector 455 , the frequency generator 458 , with a reset terminal R receiving the high signal, outputs a high signal at its output {overscore (Q)}. Under the high signal from the output {overscore (Q)}, the switch SW is turned ON and the current remover I diacharge removes the electric charge from the capacitor C f .

Removal of the electric charge continuously reduces the voltage V cf to the minimum reference voltage V minref , so that the maximum voltage detector 453 outputs a low signal and the minimum voltage detector 455 outputs a high signal.

Upon receiving the high signal at the set terminal S, the frequency generator 458 outputs a high signal at the output Q and a low signal at the output {overscore (Q)} to turn OFF the switch SW. Thus the capacitor C f is supplied with an electric charge by the current supply C f to raise the voltage V cf .

When an overcurrent flows through the lamp section 300 , as indicated by the dashed line of FIG. 11 , the voltage V cf has a waveform in which the voltage varies between the voltage bV and the minimum reference voltage V minref . Compared to the waveform under a normal current flowing through the lamp section 300 , i.e., the waveform in which the voltage varies between the voltage aV and the minimum reference voltage V minref , the frequency has been raised. So, the output Q of the frequency generator 458 generates an on/off waveform having a frequency proportional to the frequency of that waveform.

If an undercurrent flows through the lamp section 300 during the operation of the lamp system, the feedback voltage applied to sense resistorR sense becomes lower than the reference voltage formed at resistor R fb by the current i s i d output from the adder ADD. Thus, the reference voltage comparator 443 supplies a predetermined current from the capacitor C sf and the voltage applied to the voltage selector 451 from the feedback section 440 is cV that is greater than aV.

The voltage selector 451 compares the voltage cV to the reference voltage V ref and exclusively outputs the greater one, i.e., cV, to the maximum voltage detector 453 , because the input voltage cV is greater than the reference voltage V ref under an overcurrent flowing through the lamp section 300 .

The maximum voltage detector 453 compares the voltage cV to the maximum reference voltage V maxref to select the lower one, i.e., cV, which is then compared with the voltage V cf applied to the capacitor C f .

If the voltage V cf is less than the voltage cV and greater than the minimum reference voltage V minref , both the maximum voltage detector 453 and the minimum voltage detector 455 output a low signal and thus the frequency generator 458 maintains the previous output.

As the frequency generator 458 maintains the previous output, the charge supply I charge continues to supply an electric charge to the capacitor C f . When the voltage V cf applied to the capacitor C f is continuously increased to the voltage cV, the maximum voltage detector 453 outputs a high signal. The voltage V cf is also applied to the inverting terminal of the minimum voltage detector 455 and is greater than the minimum reference voltage V minref , so that the minimum voltage detector 455 outputs a low signal.

Upon receiving the high signal from the maximum voltage detector 453 and the low signal from the minimum voltage detector 455 , the frequency generator 458 , with a reset terminal R receiving the high signal, outputs a high signal at its output {overscore (Q)}. Under the high signal from the output {overscore (Q )}, the switch SW is turned ON and the current remover I diacharge removes the electric charge from the capacitor C f .

Removal of the electric charge continuously reduces the voltage V cf to the minimum reference voltage V minref , so that the maximum voltage detector 453 outputs a low signal and the minimum voltage detector 455 outputs a high signal.

Upon receiving the high signal at the set terminal, the frequency generator 458 outputs a high signal at the output Q and a low signal at the output {overscore (Q)} to turn OFF the switch SW. Thus the capacitor C f is supplied with an electric charge by the current supply C f to raise the voltage V cf .

When an undercurrent is applied to the lamp section 300 , as indicated by the chained line of FIG. 11 , the voltage V cf has a waveform in which the voltage varies between the voltage cV and the minimum reference voltage V minref . Compared to the waveform under a normal current flowing through the lamp section 300 , i.e., the waveform in which the voltage varies between the voltage cV and the minimum reference voltage V minref , the frequency has been decreased. So, the output Q of the frequency generator 458 generates an on/off waveform having a frequency proportional to the frequency of that waveform.

The waveform in which the voltage varies between the reference voltage V ref and the minimum reference voltage V minref , and the waveform in which the voltage varies between the maximum reference voltage V maxref and the minimum reference voltage V minref , as shown in FIG. 11 , represent the maximum and minimum voltages applied to the frequency controller 450 when input voltage equals the reference voltage V ref and the maximum reference voltage V maxref is applied to the voltage selector 451 , respectively.

If the voltage V csf is equal to the reference voltage V ref due to a factor, the voltage waveform from the capacitor C cf has a frequency varying between the reference voltage V ref and the minimum reference voltage V minref as shown in FIG. 11 , in which the frequency of the waveform is the maximum frequency. Therefore, the on/off waveform from the output Q of the frequency generator 458 has the maximum frequency.

If the voltage V csf is equal to the maximum reference voltage V maxref due to a factor, the voltage waveform from the capacitor C cf has a frequency varying between the maximum reference voltage V maxref and the minimum reference voltage V minref as shown FIG. 11 , in which the frequency of the waveform is the minimum frequency. Therefore, 974 the on/off waveform from the output Q of the frequency generator 458 has the minimum frequency.

The charging and discharging rates of the capacitor C cf are respectively dependent upon the magnitude of the current supplied and removed by the current supply I charge and the current remover I discharge .

FIG. 12 is a circuit diagram of the switch driver for the embodiment of the present invention.

As shown in FIG. 12 , the switch driver 460 for the embodiment of the present invention changes the direction of the current flowing through the primary coil of the transformer T 2 based on the on/off waveform of a predetermined frequency output from the frequency generator 458 of the frequency controller 450 . The switch driver 460 includes a frequency divider 461 , a first driver 463 , and a second driver 465 .

The frequency divider 461 includes one input and two outputs. The input is connected to the output Q of the frequency controller 450 for receiving the on/off voltage of a predetermined frequency from the output Q . The frequency divider 461 generates a high signal at one output and a second high signal at the other output.

The first driver 463 includes transistors Q 6 and Q 7 , and a first OR gate OR 1 . The first OR gate OR 1 with a single input connected to one output of the frequency divider 461 includes two outputs, one of which is coupled to the inverter.

The transistor Q 6 has a base connected to the output of the inverter, and a collector connected to a driving power source (not shown). The transistor Q 7 has a base connected to the other output of the first OR gate OR 1 , a collector connected to the emitter of the transistor Q 6 , and an emitter being grounded.

The second driver 465 includes transistors Q 8 and Q 9 , and a second OR gate OR 2 . The second OR gate OR 2 with a single input connected to the other output of the frequency divider 461 includes two outputs, one of which is coupled to the inverter.

The transistor Q 8 has a base connected to the output of the inverter, and a collector connected to the driving power source (not shown). The transistor Q 9 has a base connected to the other output of the second OR gate OR 2 , a collector connected to the emitter of the transistor Q 8 , and an emitter being grounded.

Now, a description will be given as to the operation of the switch driver 460 with reference to FIG. 12 .

When the frequency generator 458 outputs an on/off signal having a predetermined frequency based on the current flowing through the lamp section 300 , the frequency divider 461 has one output generate a high signal to the first driver 463 , and the other output generate a second high signal to the second driver 465 based on the on/off signal having the predetermined frequency.

Upon receiving the high signal, the first OR gate OR 1 outputs a high signal at one output and a low signal at the other output coupled to the inverter, to turn the transistor Q 6 OFF and the transistor Q 7 ON.

As the first OR gate OR 1 receives the high signal, the second OR gate OR 2 receives no signal with the same effect as it receives a low signal. Thus the second OR gate OR 2 outputs a low signal at one output and a high signal at the other output coupled to the inverter, to turn the transistor Q 8 ON and the transistor Q 9 OFF.

Therefore, the current flowing through the primary coil of the transformer T 2 of the current controller 200 has a direction in the order of transistor Q 8 , transformer T 2 and transistor Q 7 .

If a second high signal is fed into the second OR gate OR 2 of the second driver 465 via the frequency divider 461 , the current flowing through the primary coil of the transformer T 2 has a direction in the order of transistor Q 6 , transformer T 2 and transistor Q 9 .

The current flowing through the primary coil of the transformer T 2 is coupled to the predetermined frequency output from the frequency controller 450 , so that the current controller 200 is coupled to the frequency to control the magnitude of the current.

FIG. 13 is a circuit diagram of the overcurrent protector for the embodiment of the present invention.

As shown in FIG. 13 , the overcurrent protector 470 for the embodiment of the present invention detects an overcurrent of a magnitude greater than a predetermined value that flows through the lamp section 300 to protect the lamp section 300 . The overcurrent protector 470 includes an overcurrent detector 471 , an overcurrent determiner 473 , and a fourth shutdown section 475 .

The overcurrent detector 471 includes an inductor L 4 for generating a voltage based on the current flowing to the inductor L 3 , and an overcurrent detecting resistor R oc connected to both terminals of the inductor L 4 for detecting a voltage generated.

The overcurrent determiner 473 compares the detected voltage of the overcurrent detecting resistor R oc to an overcurrent detecting reference voltage V ocref to determine whether the detective voltage of the overcurrent detecting resistor R oc is a voltage generated by the overcurrent. The overcurrent determiner 473 has the non-inverting terminal of the comparator connected to a low pass filter LPF 1 so that it removes a high-frequency component from the signal applied to the overcurrent detector 471 to accurately detect the overcurrent.

The fourth shutdown section 475 interrupts the current applied to the lamp section 300 when the overcurrent determiner 473 outputs a signal indicating an input of the overcurrent. For this purpose, the fourth shutdown section 475 includes a latch with a set terminal connected to the output of the overcurrent determiner 473 , so that the latch outputs a high signal to interrupt the current flowing through the lamp section 300 when the overcurrent determiner 473 outputs a high signal upon detection of the overcurrent.

FIG. 14 is a circuit diagram of the lamp selector for the embodiment of the present invention.

As shown in FIG. 14 , the lamp selector 480 for the embodiment of the present invention is to control the magnitude of the current output from the adder ADD depending on whether the lamp section 300 includes one lamp or two lamps. The lamp selector 480 includes a lamp number detector 481 , and a reference voltage regulator 483 .

The lamp number detector 481 determines the number of lamps in the lamp section 300 and forms a voltage caused by the current flowing through the lamps. The lamp number detector 481 includes a resistor R n connected to the common terminal of the capacitors C 18 and C 19 , and the common terminal of the capacitors Q 20 and Q 21 for forming a voltage by the magnitude of the current varying depending on the number of lamps of the lamp section 300 , and a capacitor C n connected in parallel to the resistor R n for charging/discharging an electric charge coupled to the voltage that is applied to the resistor R n .

The reference voltage regulator 483 regulates the reference voltage of the feedback section 440 in a manner such that it interrupts the current applied to the lamp section 300 when there is no lamp, diminishes the current output from the adder ADD by half when the lamp section 300 has one lamp, and maintains the current output from the adder ADD when the lamp section 300 has two lamps. The reference voltage regulator 483 includes comparators COMn 1 and COMn 2 .

The comparator COMn 1 has an inverting terminal connected to the common terminal of the resistor R n and the capacitor C n of the lamp number detector 481 , and a non-inverting terminal connected to a first regulating voltage V nref1 .

The comparator COMn 2 has an inverting terminal connected to the non-inverting terminal of the comparator COMn 1 , and a non-inverting terminal connected to a second regulating voltage V nref2 .

The first regulating voltage V nref1 is less than the second regulating voltage V nref2 .

Now, a description will be given as to the operation of the lamp selector 480 with reference to FIG. 14 .

When the lamp section 300 has one lamp, the voltage applied to the lamp number detector 481 falls between the first regulating voltage V nref1 and the second regulating voltage V nref2 . Upon receiving the voltage output from the lamp number detector 481 , the comparators COMn 1 and COMn 2 output a low signal and a high signal, respectively.

Under the high signal of the comparator COMn 2 , only half of the current output from the adder ADD is applied to the resistor R fb of the feedback section 440 to reduce the magnitude of the reference voltage.

When the lamp section 300 has two lamps, the voltage applied to the lamp number detector 481 is equal to or greater than the second regulating voltage V nref2 . Upon receiving the voltage output from the lamp number detector 481 , both the comparators COMn 1 and COMn 2 output a low signal.

Under the low signal of the comparator COMn 2 , the current output from the adder ADD is applied to the resistor R fb of the feedback section 440 to form the reference voltage.

When the lamp section 300 has no lamp, the voltage applied to the lamp number detector 481 is less than the first regulating voltage V nref1 . Upon receiving the voltage output from the lamp number detector 481 , the comparator COMn 1 outputs a high signal to stop the operation of the switch driver 460 and thereby to interrupt the current supply to the lamp section 300 .

Now, a description will be given as to the shutdown controller 490 with reference to FIG. 10 .

As shown in FIG. 10 , the shutdown controller 490 is to interrupt the current applied to the lamp section 300 when at least one of the second, third and fourth shutdown sections 435 , 459 and 475 outputs a high signal. The shutdown controller 490 includes a general OR gate, which has an input connected to the outputs of the second, third and fourth shutdown sections 435 , 459 and 475 , and an output connected to the first and second OR gates OR 1 and OR 2 of the switch driver 460 .

Now, a description will be given as to the operation of the shutdown controller 490 with reference to the accompanying drawings.

The shutdown controller 490 outputs a high signal to the first and second drivers 463 and 465 when at least one of the second, third and fourth shutdown sections 435 , 459 and 475 outputs a high signal during the operation of the lamp system.

Upon receiving the high signal from the shutdown controller 490 , the first and second drivers 463 and 465 output a low signal to the bases of the transistors Q 6 and Q 8 to turn OFF the transistors Q 6 and Q 8 , and a high signal to the transistors Q 7 and Q 9 to turn ON the transistors Q 7 and Q 9 . This interrupts the current supply to the primary coil of the transformer T 2 of the current controller 200 to prevent the current from being applied to the lamp section 300 .

The ballast 400 controls the lamp system in that it forms a feedback voltage using the current applied to the lamp section 300 to control the frequency of the signal fed into the current controller 200 depending on the magnitude of the feedback voltage.

FIG. 15 is a block diagram of the dimming voltage controller according to an embodiment of the present invention.

As shown in FIG. 15 , the dimming voltage controller 500 is to supply a dimming voltage V dm to the dimming controller 430 in order for the user to regulate the intensity of the light emitted from the lamp. The dimming voltage controller 500 includes a signal transmitter 510 , a radio signal receiver 520 , a signal interpreter 530 , and a dimming voltage output 540 .

The signal transmitter 510 transmits a signal to control the lamp system, for example, to regulate the on/off operation of the lamp system or the intensity of the light. The signal transmitter 510 may be a radio signal transmitter or a wire signal transmitter.

The radio signal receiver 520 receives the output signal of the signal transmitter 510 that is a radio signal transmitter.

The signal interpreter 530 receives the output signal of the radio signal receiver 520 when the signal transmitter 510 is a radio signal transmitter, or the output signal of the wire signal transmitter when the signal transmitter 510 is a wire signal transmitter, and interprets the control content of the lamp system including the on/off operation of the lamp and the intensity of the light.

The dimming voltage output 540 is coupled to the output signal of the signal interpreter 530 to generate a dimming voltage V dm in a predefined range. The dimming voltage V dm from the dimming voltage output 540 has a magnitude in the range between 0 V to the soft dimming reference voltage V sdref .

Now, a description will be given in detail as to the operation of the lamp system with an electronic ballast according to the embodiment of the present invention with reference to FIGS. 16 and 17 .

FIG. 16 is an overall circuit diagram of the ballast illustrating the lamp system according to the embodiment of the present invention, and FIG. 17 is a waveform diagram of a reference voltage in the lamp system.

When an AC power is supplied to the power-factor compensator 100 of the lamp system, the power-factor compensator 100 rectifies the AC power and improves the power factor of the rectified AC power to supply the power to the current controller 200 and the ballast 400 .

During the initial start operation of the system, the power supply voltage V s gives a charge of electricity to the capacitor C 1 . If the voltage applied to the capacitor C 1 is less than the undervoltage reference voltage V u , the undervoltage detector 413 outputs a low signal to sink the electric charge accumulated in the soft capacitor C s of the soft start section 420 to ground, thereby holding off the operation of the entire system.

Subsequently, the voltage applied to the capacitor C 1 continues being increased to exceed the undervoltage reference voltage V u , so that the undervoltage detector 413 outputs a high signal to turn OFF the first shutdown section to start the charging operation of the soft capacitor C s and hence the soft start of the entire system. This time is indicated by t 0 of FIG. 9 ( a ).

When the start-up of the entire system actuates the current controller 200 to turn the switch Q 2 ON and the switch Q 3 OFF, the current supplied by the current controller 200 is charged in the capacitor C 2 , and if it is discharged completely, it is charged again in the reverse direction of the previous charging in the capacitor C 2 via the lamp section 300 and the diode D 3 . With diode D 3 OFF and diode D 2 ON, the operation maintenance voltage formed at the capacitor C 2 is applied to the undervoltage detector 413 .

If the voltage applied to the non-inverting terminal of the undervoltage detector 413 is greater than the undervoltage reference voltage V u , the undervoltage detector 413 outputs a high signal to turn on the switch 416 and the voltage applied to the non-inverting terminal forms an aV reference voltage V ref and an interval bias voltage via the switch 416 .

If an ignition voltage greater than the undervoltage reference voltage V u is applied to the non-inverting terminal of the undervoltage detector 413 , an electric charge is accumulated in the start voltage generator C s to form a start voltage V cs .

The start voltage generator C s gradually increases the start voltage V cs , as shown in FIG. 17 . Thus the ignition voltage applied does not immediately actuate the entire system but permits the start voltage generator C s to gradually form the start voltage V cs , thus alleviating the shock on the entire system.

The start voltage V cs is gradually increased from zero as the first current supply I 1 gives an electric charge to the start voltage generator C s , at the early stage where the start voltage generator C s hardly has residual charge, so that the first current amplifier AMP 1 selects the start voltage V cs .

The voltage applied to the inverting terminal of the first current amplifier AMP is the selected start voltage V cs , so that one terminal of the current mirror CM 1 outputs a current as represented by Equation 2 to the resist R ss and the other terminal also outputs a current i s of the same magnitude.

As the current output from the other terminal of the current mirror CM 1 flows through the resistor R fb via the adder ADD, the reference voltage of the feedback section 440 also increases with a predetermined slope until the time t 1 as shown in FIG. 17 when no current is applied to the adder ADD from the dimming controller 430 .

The first current amplifier AMP 1 exclusively outputs the soft start reference voltage V sref to the resistor R ss at the time when the start voltage V cs is gradually increased to exceed the soft start reference voltage V sref after t 1 . Thus the current flowing through the resistor R ss has a magnitude as given by Equation 3, and a current i s of the same magnitude as given by Equation 3 is output at the other terminal of the current mirror CM 1 . Consequently, the reference voltage formed at the resistor R ss of the feedback section 440 has a predetermined magnitude as shown in FIG. 17 .

The start voltage V cs , which increases when the soft start begins, is also applied to the dimming reference voltage generator AMP 2 . If the start voltage V cs is greater than the dimming starting reference voltage V dsref to supply an electric charge to the dimming power supply C dm , this completed the preparation for dimming control.

When the user operates the radio signal transmitter or the wire signal transmitter of the signal transmitter 510 at t 2 in order to provide a desired brightness of the lamp, the output signal of the radio signal transmitter is fed into the signal interpreter 530 via the radio signal receiver 520 , or the output signal of the wire signal transmitter is directly fed into the signal interpreter, depending on which method is used. The signal interpreter 530 interprets the input signal to output a dimming voltage V dm corresponding to the user's desired brightness of the lamp to the dimming controller 430 via the dimming voltage output 540 .

Under the dimming voltage V dm with an electric charge accumulated in the dimming power supply C dm , the dimming reference voltage generator AMP 2 compares the dimming voltage V dm to the soft dimming reference voltage V sdref and applies the lower one to the resistor R dm . The amount of electric charge accumulated in the dimming power supply C dm is determined by the sum of the voltage between the emitter and the base of the transistor Q 5 and the voltage applied to the resistor R dm .

If the dimming voltage V dm is less than the soft dimming reference voltage V sdref , the current flowing through the resistor R dm via the second current mirror has a magnitude i dr as given by Equation 4.

Thus the other output of the second current mirror outputs a current i d of the same magnitude as the current i dr to the adder ADD. The adder ADD subtracts the current i d from a current i s at the other output of the first current mirror CM 1 , and sends the result to the resistor R fb of the feedback section 440 . The current i d increases gradually due to the time delay of the dimming power supply C dm , so that the reference voltage is not suddenly changed but is gradually reduced, as shown in FIG. 17 .

The feedback section 440 compares the gradually decreasing reference voltage to the feedback voltage V fb and removes a predetermined amount of electric charge from the start frequency generator C s , judging that an excess of current flows through the lamp section 300 . The voltage V csf at this time is less than the voltage in the interval between t 1 and t 2 and greater than the reference voltage V ref , so that the voltage selector 451 exclusively outputs the greater voltage, i.e., V csf , in the interval between t 1 and t 2 to the inverting terminal of the maximum voltage detector 453 .

The voltage V cf applied to the charger C f has a saw-toothed waveform in which the voltage varies between the voltage V csf and the minimum reference voltage V minref . The frequency of the waveform is greater than that of the voltage waveform formed in the interval between t 1 and t 2 , so that the frequency generator 458 forms the higher frequency.

Consequently, both the switch driver 460 and the current controller 200 are operated in connection to the frequency of the frequency generator 458 such that the magnitude of the current applied to the lamp section 300 is reduced to a desired level.

When the lamp section 300 has one lamp before t 4 , the comparators COMn 1 and COMn 2 output a low signal and a high signal, respectively, upon receiving the output voltage from the lamp number detector 481 . Thus only half of the current output from the adder ADD is applied to the resistor R fb of the feedback section 440 to reduce the magnitude of the reference voltage.

Contrarily, when the lamp section 300 has two lamps after t 4 , the voltage applied to the lamp number detector 481 is equal to or greater than the second regulating voltage V nref2 . Upon receiving the voltage output from the lamp number detector 481 , both the comparators COMn 1 and COMn 2 output a low signal.

Under the low signal of the comparator COMn 2 , the current output from the adder ADD is applied to the resistor R fb of the feedback section 440 to form a reference voltage higher than the reference voltage when the lamp section 300 has one lamp. The reference voltage is gradually increased because of the capacitor C n in the lamp number detector 481 .

If an overcurrent flows through the lamp section 300 to increase the feedback voltage V fb , the reference voltage comparator 443 subtracts a current of a predetermined magnitude from the capacitor C sf to drop the voltage applied to the capacitor C sf . When a voltage V csfoc is applied to the voltage selector 451 and it is less than the reference voltage V ref , the voltage applied to the capacitor C sf has a saw-toothed waveform in which the voltage varies between the voltage V csfoc and the minimum reference voltage V minref .

If the voltage applied to the capacitor C sf prior to an input of the overcurrent, i.e., when a normal current flows through the lamp section 300 is C csfnc , the voltage V cf applied to the capacitor C f has a saw-toothed waveform in which the voltage varies between the voltage V csfnc and the minimum reference voltage V minref . Thus the frequency is highest when the overcurrent flows through the lamp system.

Accordingly, the switch driver 460 operates with the higher frequency than in the normal operation to reduce the magnitude of the current input to the lamp section 300 and thereby to regulate the overcurrent to a normal current.

If an undercurrent flows through the lamp section 300 to reduce the feedback voltage V fb , the reference voltage comparator 443 supplies the current of a predetermined magnitude to the capacitor C sf to raise the voltage applied to the capacitor C sf . When the voltage applied to the capacitor C sf is V csfuc , which is applied to the voltage selector 451 and is greater than the reference voltage V ref , the voltage selector 451 exclusively outputs the voltage V csfuc to the inverting terminal of the maximum reference voltage detector 453 .

Thus the voltage V cf applied to the capacitor C f has a saw-toothed waveform in which the voltage varies between the voltage V csfuc and the minimum reference voltage V minref . The frequency of this saw-toothed waveform is lower than the frequency formed when a normal current is applied to the lamp section 300 , because the voltage V cf applied to the capacitor C f , which is under the normal current flowing through the lamp section 300 , has a saw-toothed waveform in which the voltage varies between the voltage less than V csfuc and the minimum reference voltage V minref .

Accordingly, the frequency generator 458 provides an on/off waveform coupled to the frequency of the saw-toothed waveform in which the voltage varies between the voltage V csfuc and the minimum reference voltage V minref .

The switch driver 460 coupled to the frequency of the received on/off waveform operates the current controller 200 to increase the magnitude of the current fed into the lamp section 300 .

If a current that may damage the lamp section 300 flows through the lamp section 300 during the operation of the lamp system due to a factor, a voltage is induced at the coil L 4 of the overcurrent detector 471 and is applied to the non-inverting terminal of the overcurrent determiner 473 , which then compares the induced voltage to an overcurrent reference voltage V ocref . If voltage applied to the non-inverting terminal is less than the overcurrent reference voltage V ocref , the fourth shutdown section 475 stops the operation of the switch driver 460 to prevent any damage to the lamp system.

When the lamp section 300 has no lamp, the voltage applied to the lamp selector 480 is less than the first regulating voltage V nref1 and the comparator COMn 1 outputs a high signal to stop the operation of the switch driver 460 and thereby to interrupt the current supply to the lamp section 300 .

Meanwhile, when the user sends an off signal of the lamp system via the signal transmitter 510 , the signal interpreter 530 outputs a voltage of the same magnitude as the soft dimming reference voltage V sdref to the dimming voltage V dm .

When the dimming reference voltage generator AMP 2 applies the soft dimming reference voltage V sdref to the resistor R dm , the current output to one terminal of the second current mirror CM 2 is the same in magnitude as the current output from the soft starter 420 , thus generating no current from the adder ADD. Thus the reference voltage comparator 443 of the feedback section 440 continuously subtracts the current from the capacitor C sf to stop the operation of the lamp section 300 .

The lamp system with an electronic ballast according to the present invention feeds back the current of the load to control the lamp.

As described above, the lamp system with an electronic ballast according to the present invention uses a feedback closed control to operate the lamp regardless of the change in the frequency that may occur due to errors of the elements.