Compensation circuit

A compensation circuit configured for coupling to a voltage source and a reference circuit. The voltage source is configured for supplying a supply voltage to the compensation circuit and the reference circuit. The reference circuit includes a first circuit node and a reference output electrically coupled to the first circuit node for outputting a reference signal having a constant reference amplitude. The compensation circuit includes a transient converter for converting a first transient perturbation of the supply voltage into a first compensation electrical signal proportional to said first transient perturbation, and an adder coupled to the transient converter for adding the first compensation electrical signal to an electrical signal at the first circuit node with a first polarity opposite to a disturbance polarity of a disturbance of the electrical signal in response to the first transient perturbation.

FIELD OF THE INVENTION

This invention relates to a compensation circuit configured to reduce a disturbance of a reference signal in response to a transient perturbation of a supply voltage, to an integrated circuit comprising the compensation circuit and to an automotive vehicle comprising the integrated circuit.

BACKGROUND OF THE INVENTION

Integrated circuits may perform analogue and digital functions according to required specifications. Such integrated circuits are supplied by a supply voltage generated by a power supply source. This power supply source may be external to the integrated circuit. However, this external power supply source may not be stable enough for supplying the integrated circuits because the external power supply source may supply many circuits with different voltage and current requirements.

For example, in automotive applications, the power supply source is a battery of a vehicle which supplies all integrated circuits in the vehicle.

To this purpose, reference circuits and linear regulators which generate stable reference signals, are typically used to supply internal integrated circuit functions.

Said reference circuits are supplied by the power supply source, thereby any transient perturbations, especially relatively large and fast transient perturbations of the supply voltage, may reflect in a corresponding disturbance of the reference signal over time. Low power reference circuits are typically designed to withstand slow changes of the supply voltage, but not to withstand said relatively fast transient perturbations. If said fast and large transient perturbations are greater than 10 Volt per microsecond or faster, with more than 10 volt peak to peak, the reference signal may be disadvantageously affected, causing malfunctions of the integrated circuit or undesired resetting thereof.

Such fast transient perturbations, known in the art as electrical fast transients (EFT), may be caused by electromagnetic interferences (EMIs), electrostatic discharge (ESD) signals, International Organization for Standardization (ISO) pulses, or the like.

In order to prevent said malfunctions or resets, external capacitors or transient voltage suppressors (TVSs) are used in parallel to the external power supply source to suppress these electrical fast transients. However, external capacitors or TVSs are large and expensive discrete components. Thereby there is a need for a solution that while efficiently suppresses EFTs in integrated circuits is cheaper and smaller than external capacitors or TVSs.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

An inventive integrated circuit is described which includes a reference circuit and a compensation circuit both electrically coupled to a voltage source.

The voltage source supplies a supply voltage to the compensation circuit and the reference circuit. The reference circuit is configured to generate a reference signal having constant reference amplitude. The reference circuit includes a first circuit node and a reference output electrically coupled to the first circuit node. The reference output outputs the reference signal.

The reference circuit may be used as a local supply for supplying with the reference signal internal circuitry of the integrated circuit.

The compensation circuit includes a transient converter and an adder electrically coupled to the transient converter.

The transient converter converts a first transient perturbation of the supply voltage into a first compensation electrical signal proportional to said first transient perturbation.

The adder adds the first compensation electrical signal to an electrical signal at the first circuit node. The adder is configured to add the first compensation electrical signal with a polarity opposite to a disturbance polarity of a disturbance of the electrical signal generated in response to the first transient perturbation.

The compensation circuit reduces a disturbance of the electrical signal in response to a fast transient perturbation of the supply voltage by adding the compensation electrical signal to the electrical signal at the circuit node with a polarity opposite to that of the disturbance of the electrical signal. Since the circuit node is electrically coupled to the reference output, disturbance of the reference signal caused by the transient perturbation of the supply voltage has been reduced.

The inventive integrated circuit may be used in automotive applications where circuits, particularly reference circuits, need to withstand harsh environmental conditions and be immune to fast transient perturbations of the supply voltage.

FIG. 1schematically shows an integrated circuit100including a compensation circuit20and a reference circuit30. The compensation circuit20is configured for coupling to a voltage source200and the reference circuit30. The voltage source200is configured for supplying a supply voltage Vs to the compensation circuit20and the reference circuit30.

The voltage source200is a Direct Current (DC) voltage source210which is configured to supply a constant supply voltage. However, the constant supply voltage may be perturbed in time by positive or negative transient voltage perturbations, for example by fast electrical transients (EFTs), or electrostatic discharge (ESD) transients. The positive or negative transient voltage perturbations are schematically modelled by a transient voltage source220arranged in series to the DC voltage source210. The transient voltage source220generates said positive or negative transient voltage perturbations.

The reference circuit30is configured to generate a reference signal having constant reference amplitude. For example, the reference signal may be a reference voltage signal with constant amplitude V0or a reference current signal with constant amplitude I0. The reference signal can be a reference voltage or current signal with better accuracy than the supply voltage Vs. The reference signal can be used to bias circuit50of integrated circuit100. For example, the reference signal may be compensated in temperature such that the reference signal remains substantially constant over a predetermined range of specified temperature values. The reference signal may be compensated also against slow changes of the supply voltage Vs such that the reference signal remains constant over a predetermined range of specified supply voltage values.

The reference circuit30includes a first circuit node35and a reference output40electrically coupled to the first circuit node35for outputting the reference signal.

The compensation circuit20includes a transient converter5for converting a transient perturbation of the supply voltage Vs into a first compensation electrical signal proportional to said transient perturbation.

In another embodiment, the transient converter5may be configured to convert positive transient perturbations relative to the constant supply voltage Vs.

The first compensation electrical signal can be proportional to either the positive or the negative transient perturbation of the supply voltage Vs.

The transient converter5may capacitively couple the voltage source200, i.e. a positive terminal of the voltage source200, to ground. Capacitive coupling may occur via capacitive elements, parasitic or integrated into the transient converter5. The transient converter5may thus be activated only in response to transient perturbations of the supply voltage Vs. In fact only transient currents and no DC currents can flow in the transient converter5. The transient converter5may be inactive during normal mode of operation of the integrated circuit100, i.e. in absence of transient perturbations of the supply voltage Vs.

In absence of transient perturbations of the supply voltage Vs, the compensation circuit20may be in a powerless state, i.e. there is no power consumed by the compensation circuit20.

The compensation circuit20further includes adder10for adding the first compensation electrical signal to an electrical signal42at the first circuit node35with a first polarity opposite to a disturbance polarity of a disturbance of the electrical signal42. The disturbance of the electrical signal41is generated in response to the transient perturbation of the supply voltage Vs.

The reference circuit30may include electrical circuits43and the first circuit node35be electrically coupled to the voltage source200via said electrical circuits43.

Said electrical circuits43may include parasitic components, for example a parasitic capacitor (not shown inFIG. 1). The first circuit node35can be electrically coupled to the voltage source200via said parasitic capacitor.

The electrical signal at the first circuit node35can be perturbed because of, for example, parasitic capacitive coupling between the supply voltage Vs and the first node circuit35via said parasitic capacitor, by transient perturbations of the supply voltage Vs.

Compensation circuit20generates a first compensation electrical signal having the same amplitude but opposite polarity of the perturbed electrical signal42at the first circuit node35, such that electrical signal at the first circuit node35is much less perturbed by transient perturbations of the supply voltage Vs.

As a consequence, disturbances of the reference signal over time at the reference output40are reduced because the first circuit node35is electrically coupled to the reference output40and the reference signal is generated via circuitry (not shown inFIG. 1) coupled between said circuit node35and the reference output40.

The adder10is configured to provide a compensation electrical signal at the first circuit node35with the proper polarity. In case of overshoot or undershoot at first circuit node35, a first compensation electrical signal with opposite polarity to the polarity of the overshoot or undershoot will be added to the electrical signal.

The first compensation electrical signal may be a current signal Ic or voltage signal Vc proportional to the transient perturbation of the supply voltage Vs.

The adder10may be configured to add the current Ic or the voltage Vc with positive or negative sign to the first circuit node35for compensating disturbances of the electrical signal at the first circuit node35over time caused by transient perturbation of the supply voltage Vs.

The electrical signal at the first circuit node35can be a current signal or a voltage signal.

In a preferred embodiment, if the electrical signal to be compensated at the first circuit node35is a current signal, then the first compensation electrical signal is a compensation current signal Ic. Addition of the first compensation electrical signal Ic is in this case performed in parallel to the current signal flowing through the first circuit node35.

In an embodiment, the first circuit node35may be a relative high impedance node. The current signal flowing through the first circuit node35may be a relatively small current.

When the first compensation electrical signal is a compensation voltage signal Vc, the compensation circuit20may include additional components not shown inFIG. 1, for example a coupling capacitor via which the compensation voltage signal Vc is coupled to the first circuit node35. The coupling capacitor may have a capacitance larger than, for example, the equivalent capacitance of the parasitic capacitor coupling the voltage source200to the first circuit node35.

The reference signal generated by the reference circuit30has been compensated against transient perturbations of the supply voltage Vs, for example fast electrical transients (EFTs), or electrostatic discharge (ESD) transients, without the use of external capacitor or transient voltage suppressors (TVS) arranged across the voltage source200.

The compensation circuit20can be integrated in the integrated circuit100in the same chip using the same process technology, thus abating the costs of manufacturing of the integrated circuit100including the compensation circuit20.

All circuit nodes of the reference circuit30which are electrically coupled, in particular circuit nodes which are capacitively coupled, to the voltage source200, can be compensated with the compensation electrical signal Ic or Vc. The reference signal has been immunized against transient perturbations of the voltage supply Vs. The integrated circuit100is more robust and can be used more extensively in harsh environmental conditions where electromagnetic interferences (EMIs) can critically affect the functionality of the integrated circuit100as for example in automotive systems.

FIG. 2schematically shows a second example of an integrated circuit120according to the invention. The integrated circuit120includes a compensation circuit22and a reference circuit32. Compensation circuit22may be a practical ultra-low power implementation of a compensation circuit according to an embodiment of the invention.

Compensation circuit22includes a positive transient converter9configured for generating a compensation current Ic1proportional to a positive transient perturbation of voltage supply Vs, and adder12for adding said compensation current Ic1to circuit node36of the reference circuit32.

In this example circuit node36coincides with the reference output of reference circuit32. Electrical current Ibg1flowing through circuit node36has a disturbance polarity, as indicated by the overshoot of the electrical current Ibg1.

The adder12is configured for adding the compensation current −Ic1with a first polarity opposite to the disturbance polarity.

The adder12may be configured to add the compensation current Ic1with a second polarity opposite to the first polarity to a second electrical signal at a second circuit node (not shown inFIG. 2) of the reference circuit32.

The positive transient converter9includes a series arrangement of at least a first transistor60, a first capacitor65and a second transistor70.

Transistor60and70are metal Oxide Semiconductor Field Effect transistors (MOSFETs).

Each transistor has respective first terminal, second terminal and third terminal wherein the second terminal and the third terminal form a main current path for each transistor.

In the example shown inFIG. 2, transistor60is a PMOS transistor and transistor70is a NMOS transistor. For MOSFETs, the first terminal is the gate, the second terminal is the source, and the third terminal is the drain of each respective MOS transistor.

The respective drain of PMOS transistor60and NMOS transistor70is electrically connected to the respective gate. In this configuration, an instantaneous voltage across the PMOS transistor60or NMOS transistor70equal or larger than the threshold voltage of the respective transistor, activates the main current path through the source and the drain.

Further, the drain of PMOS transistor60is electrically coupled to a first terminal of the first capacitor65and drain of the NMOS transistor70is electrically coupled to a second terminal of the first capacitor65.

The source of the PMOS60is electrically coupled to a positive terminal of the voltage source200and drain of NMOS70is electrically coupled to a reference potential, for example a terminal of a further voltage source generating a negative supply voltage or the ground.

Diode75is the body diode of PMOS transistor60and diode80is the body diode of NMOS transistor70. Diodes75and80are used to discharge capacitor65after the fast transient of the voltage supply Vs has occurred.

Reference circuit32may be a bandgap voltage based reference circuit generating a reference voltage value between 1.2 Volts and 1.3 Volts which is substantially independent of temperature. However, the reference circuit32may be of any other type suitable for the specific implementation.

Operation of the integrated circuit120is explained with reference toFIG. 3which shows the simulated signal diagrams versus time for the integrated circuit120.

When a ISO pulse voltage300, i.e. according to International Organization for Standardization (ISO) is supplying the reference circuit32, and when no compensation circuit22is used, the reference voltage Vbg1at the circuit node36can overshoot during the rising time and undershoot during the falling time of the pulse voltage300to a relatively large extent. The ISO pulse voltage300of the example shown inFIG. 3rises from 12 Volts to 40 Volts or more in less than 10 microseconds, keeps a constant final voltage value during a time width tw of 100 microseconds, and falls to 12 Volts in less than 10 microseconds.

Compensation current Ic1can be generated by the transient converter9in response to positive transient perturbation of the supply voltage Vs, i.e. during the rising time of the ISO pulse voltage300.

During the rising time of the pulse voltage300, a transient current flowing through the capacitor65proportional to the positive transient perturbation of the supply voltage Vs is generated.

The transient compensation current Ic1is mirrored via current mirror70and71with a first polarity (−Ic1) and via current mirror60and61with a second polarity (+Ic1) opposite to the first polarity.

The compensation current −Ic1is effectively subtracted from the current Ibg1flowing into circuit node36, such that the remaining signal current Ibg2is compensated and disturbance reduced during the positive transient perturbation of the supply voltage Vs (rising of the pulse voltage300).

Compensation current +Ic1may be used in another circuit node (not shown inFIG. 2) of reference circuit32.

During the falling time of the pulse voltage300, the transient converter9does not generate any current. For negative transient perturbation of the supply voltage Vs PMOS transistor60and NMOS transistor70will be not conducting any instantaneous current because there cannot be any capacitive coupling of the supply voltage Vs via the drain-to-source parasitic capacitor which drives the PMOS transistor60and NMOS transistor70into transient conduction mode.

Since compensation circuit22is configured to operate only for positive transient perturbation of the supply voltage Vs, no compensation of the perturbed electrical current Ibg1is visible inFIG. 3for such negative transient perturbations of the supply voltage Vs.

As a consequence, the disturbance of the bandgap voltage Vbg2over time due to the positive transient perturbation of the supply voltage Vs is substantially reduced. The bandgap voltage Vbg2has been made more immune to positive transient perturbations of the supply voltage Vs, in particular fast positive transient perturbations in the order of, for example, 1 Volt per microsecond or faster.

The transient converter may be configured to detect transient perturbations of the supply voltage Vs of the same order, i.e. for example transient perturbations faster than 1 Volt per microsecond.

FIG. 4schematically shows a third example of an integrated circuit140. Integrated circuit140includes a compensation circuit23. Compensation circuit23includes the positive transient converter9shown inFIG. 2and a further transient converter13.

Transient converter9of compensation circuit23generates compensation current −Ic1proportional to a positive transient perturbation of the supply voltage Vs.

Further transient converter13is configured to generate a second compensation current Ic2proportional to a negative transient perturbation of the supply voltage Vs.

Compensation circuit23further differs from compensation circuit22shown inFIG. 2in that compensation current −Id1is further copied by current mirror formed by NMOS transistors70and72and injected into circuit node37. Adder may be configured to output more than one compensation electrical currents having further compensation amplitudes. These further compensation amplitudes may be proportional to the amplitude of compensation current Ic. This can be achieved by for example adjusting the mirror ratios (are of transistors70and72) in the adder.

Further, transient converter13includes a second capacitor85, a series arrangement of a NMOS transistor73and PMOS transistor74. Gate terminal of the NMOS transistor73is electrically coupled to a positive terminal of a reference voltage source (Vref). A local power supply voltage Vdd is generated at circuit node37by the reference voltage source Vref and a matched gate-source voltage of NMOS transistor73. The drain terminal of NMOS transistor73is electrically coupled to a positive terminal of the voltage source200and a first terminal of the second capacitor85. Source terminal of PMOS transistor74is electrically coupled to source terminal of NMOS transistor73, i.e. to the local power supply voltage Vdd. Drain terminal of the PMOS transistor74is electrically coupled to the gate terminal of the PMOS transistor74and to a second terminal of the second capacitor85.

As schematically shown inFIG. 4, the local power supply voltage Vdd is generated by the NMOS transistor73and the reference voltage source Vref. However, the local supply voltage Vdd can be generated in any manner suitable for the specific implementation. For example, the reference voltage Vref+Vgs may be generated by a local voltage source designed to provide a constant reference voltage for generating a constant voltage Vdd. During normal operation, i.e. when in absence of transient perturbations on the supply voltage Vs, no current is flowing through NMOS transistor73.

The reference voltage Vref, thus also local supply voltage Vdd, and the second capacitor85ensure that current mirror formed by PMOS transistors74and75is properly biased when the supply voltage Vs is perturbed with a negative transient perturbation.

For negative transient perturbations of the supply voltage Vs, second capacitor85couples the positive terminal of the voltage source200to the gate terminals of PMOS transistors74and75such that a source-gate voltage of PMOS transistors74and75is higher than the threshold voltage of the respective PMOS transistors74and75and PMOS transistors74and75can conduct transient electrical current. A current Ic2proportional to the negative transient perturbation of the supply voltage Vs can be generated.

During negative transient perturbations of the supply voltage Vs, electrical current −Ic1is zero. Transient converter9has no impact on the functionality of negative transient converter13.

For positive transient perturbations of the supply voltage Vs, Ic2is zero because PMOS transistors74and75cannot be biased into transient conduction mode.

Connection of drain of NMOS transistor72to circuit node37is only for reliability purpose of NMOS transistor73, to prevent that during positive transient perturbations of the supply voltage Vs NMOS transistor73is damaged.

By integrating in a single integrated circuit140a positive transient converter9and a negative transient converter13, electrical signals at different internal circuit nodes of integrated circuit140(not shown inFIG. 4) can be stabilized against any positive or negative transient perturbation of the supply voltage Vs.

Since, transient converters9and13do not consume any electrical current during normal operation of the integrated circuit140, i.e. in absence of perturbations of the supply voltage Vs, those circuits can be used in low power consumption circuits without having impact on the total power consumption of the circuits.

Converter9works only for positive transient perturbations and converter13works only for negative transient perturbations, thus currents −Ic1or Ic2can be injected into the same circuit node for stabilizing the corresponding electrical signal preventing that both transient converters9and13load the circuit node at the same time. Further, since compensation circuit23is normally off, the circuit nodes to be compensated are not loaded, thereby the integrated circuit functionality is not affected during normal operation.

Compensation circuits22,23can be fully integrated with the integrated circuits120,140, thereby the provided solution can be more compact and less expensive than known solutions using external components, arranged, for example, across the voltage source200to suppress electrical fast transients (EFTs) thereof.

Compensation circuits22,23may be configured to reduce a level of the disturbance of the reference signal relative to the constant reference amplitude to less than 5% the constant reference amplitude.

FIG. 5shows a fourth example of an integrated circuit150according to the invention.

Integrated circuit150includes a transient converter14for converting positive transient perturbations of the supply voltage Vs into a compensation electrical signal proportional to said positive variation, adder17for adding the compensation electrical signal and a reference circuit41.

The transient converter14includes a series arrangement of at least a PMOS transistor76, a NMOS transistor77and a diode82. Diode82is a zener diode. The drain of PMOS transistor76is electrically connected to the gate of PMOS transistor76and to the drain of NMOS transistor77. The gate of NMOS transistor77is biased to a reference voltage Vref_p and the drain of the NMOS transistor77is electrically coupled to the cathode of the zener diode82. The anode of the zener diode82is electrically coupled to a reference potential, for example a terminal of a further voltage source generating a negative supply voltage, or the ground.

Zener diode82is used to stop DC current flowing through the series arrangement and at the same time to clamp voltage at the source of NMOS transistor77to a specified value when the supply voltage variations are relatively large, for example during an electrostatic discharge (ESD) pulse.

Adder17includes a current mirror having a mirror input18electrically coupled to gate of PMOS transistor76and a mirror output. The reference circuit41is a voltage reference of which only output transistor39is shown. Output transistor39has a transistor output terminal corresponding to reference output38. The mirror output is electrically connected to the reference output38.

In this example, positive transient of the supply voltage Vs is detected through capacitive parasitic coupling via the parasitic drain to source capacitor of NMOS transistor77.

Further, transient converter14and reference circuit41are designed such that NMOS transistor77and the output transistor39are formed close to each other in a same layout area of the integrated circuit150for geometrically matching NMOS transistor77with the output transistor39. This increases accuracy of the compensation versus process parameter variations occurring during manufacturing of the integrated circuit150.

Integrated circuits100,120,140,150may be used in automotive systems. For example, an automotive vehicle may include an electronic device for controlling one or more parts of the automotive vehicle. The electronic device may include any of the integrated circuits100,120,140,150shown through the Figures. Since automotive vehicles are manufactured to run safe also in harsh environment, requirements on immunity to supply variations of electronic devices used for automotive systems, caused by, for example, electromagnetic interferences (EMI) in the battery cables, or sudden connection or disconnection of the battery, are particularly stringent. Electronic devices using the integrated circuits100,120,140,150are more immune to such voltage supply transient perturbations and cheaper than known counterparts using external compensation components, because respective compensation circuits can be fully integrated in the same chip with the reference circuits.

According to an example of the present application, a compensation circuit configured for coupling to a voltage source and a reference circuit is provided. The compensation circuit comprise a transient converter and an adder. The transient converter is provided for converting a first transient perturbation of a supply voltage into a first compensation electrical signal proportional to said first transient perturbation. The voltage source is configured for supplying the supply voltage to the compensation circuit and the reference circuit, and the reference circuit is configured to generate a reference signal having a constant reference amplitude. The reference circuit comprises a first circuit node and a reference output electrically coupled to the first circuit node for outputting the reference signal. The adder is coupled to the transient converter for adding the first compensation electrical signal to an electrical signal at the first circuit node, with a first polarity opposite to a disturbance polarity of a disturbance of the electrical signal in response to the first transient perturbation.

According to an example of the present application, the first circuit node is the reference output.

According to an example of the present application, the transient converter is configured to convert positive transient perturbations relative to the supply voltage, or negative transient perturbations relative to the supply voltage.

According to an example of the present application, the transient converter is arranged to capacitively couple the voltage source to the ground and configured to be activated in response to the first transient perturbation of the supply voltage.

According to an example of the present application, the compensation is configured to be in a powerless state in absence of the first transient perturbation of the supply voltage.

According to an example of the present application, the first compensation electrical signal is a current signal.

According to an example of the present application, the adder is configured for adding the first compensation electrical signal with a second polarity opposite to the first polarity to a second electrical signal at a second circuit node of the reference circuit.

According to an example of the present application, the compensation comprises a further transient converter, which is configured to generate a second compensation electrical signal proportional to a second transient perturbation of the supply voltage. The first transient perturbation has a first perturbation polarity and the second transient perturbation has a second perturbation polarity opposite to the first perturbation polarity.

According to an example of the present application, the first compensation electrical signal has compensation amplitude. The adder is configured to output one or more further compensation electrical signals having corresponding one or more further compensation amplitudes proportional to the compensation amplitude for adding the one or more further compensation electrical signals to corresponding one or more further circuit nodes of the reference circuit.

According to an example of the present application, the compensation circuit is configured to reduce a level of the disturbance of the reference signal relative to the constant reference amplitude to less than 5% the constant reference amplitude.

According to an example of the present application, the transient converter is configured for detecting transient perturbations of the supply voltage faster than 1 Volt per microsecond.

According to an example of the present application, the transient converter comprises a series arrangement of at least a first transistor, a first capacitor and a second transistor. Each transistor has a respective first terminal, second terminal and third terminal that form a main current path for each transistor. The third terminal of each transistor is electrically connected to the first terminal. The third terminal of the first transistor is electrically coupled to a first terminal of the first capacitor. The third terminal of the second transistor is electrically coupled to a second terminal of the first capacitor. The second terminal of the first transistor is electrically coupled to a positive terminal of the voltage source. The second terminal of the second transistor is electrically coupled to a reference potential.

According to an example of the present application, the adder comprises at least a third transistor arranged in parallel to the first transistor for generating a compensation electrical current having the first polarity.

According to an example of the present application, the adder comprises at least a fourth transistor arranged in parallel to the second transistor for generating a compensation electrical current having a second polarity opposite to the first polarity.

According to an example of the present application, the transient converter comprises a series arrangement of at least a fifth transistor, a sixth transistor and a diode. The fifth and the sixth transistors have each respective first terminal, second terminal and third terminal forming a main current path of the respective transistor. The diode has an anode and a cathode. The first terminal of the fifth transistor is electrically connected to the third terminal of the fifth transistor and to the third terminal of the sixth transistor. The first terminal of the sixth transistor is electrically coupled to a positive terminal of a reference voltage source and the second terminal of the sixth transistor is electrically coupled to the cathode. The anode is electrically coupled to a reference potential.

According to an example of the present application, the adder comprises a current mirror having a mirror input electrically coupled to the first terminal of the fifth transistor and a mirror output. The reference circuit comprises an output transistor having a transistor output terminal corresponding to the reference output. The mirror output is electrically coupled to the transistor output terminal.

According to an example of the present application, the sixth transistor and the output transistor are formed close to each other in a same layout area for geometrically and electrically matching the sixth transistor with the output transistor.

According to an example of the present application, the further transient converter comprises a second capacitor and a series arrangement of a seventh transistor and eighth transistor. The seventh and eighth transistors have each respective first terminal, second terminal and third terminal forming a main current path of the respective transistor. The first terminal of the seventh transistor is electrically coupled to a positive terminal of a reference voltage source. The second terminal of the seventh transistor is electrically coupled to a positive terminal of the voltage source and a first terminal of the second capacitor. The third terminal of the seventh transistor is electrically coupled to the second terminal of the eight transistor. The first terminal of the eighth transistor is electrically coupled to the second terminal of the eighth transistor and to a second terminal of the second capacitor.

According to an example of the present application, an integrated circuit is provided comprising a reference circuit and a compensation circuit. The reference circuit is configured to generate a reference signal having a constant reference amplitude. The reference circuit comprises a first circuit node and a reference output electrically coupled to the first circuit node for outputting the reference signal. The compensation circuit is configured for coupling to a voltage source and the reference circuit. The voltage source is configured for supplying a supply voltage to the compensation circuit and the reference circuit. The compensation circuit further comprises a transient converter and an adder. The transient converter is provided for converting a first transient perturbation of the supply voltage into a first compensation electrical signal proportional to said first transient perturbation. The adder is coupled to the transient converter for adding the first compensation electrical signal to an electrical signal at the first circuit node, with a first polarity opposite to a disturbance polarity of a disturbance of the electrical signal in response to the first transient perturbation.

According to an example of the present application, an automotive vehicle comprising an electronic device for controlling one or more parts of the automotive vehicle is provided. The electronic device comprises an integrated circuit comprising a reference circuit and a compensation circuit. The reference circuit is configured to generate a reference signal having a constant reference amplitude. The reference circuit comprises a first circuit node and a reference output electrically coupled to the first circuit node for outputting the reference signal. The compensation circuit configured for coupling to a voltage source and the reference circuit. The voltage source is configured for supplying a supply voltage to the compensation circuit and the reference circuit. The compensation circuit further comprises a transient converter and an adder. The transient converter is provided for converting a first transient perturbation of the supply voltage into a first compensation electrical signal proportional to said first transient perturbation. The adder is coupled to the transient converter for adding the first compensation electrical signal to an electrical signal at the first circuit node, with a first polarity opposite to a disturbance polarity of a disturbance of the electrical signal in response to the first transient perturbation.

Through the Figures, Metal-Oxide-Semiconductors Field Effect Transistors (MOSFETs) have been shown. However, other type of transistors may be used: for example Bipolar Junction Tansistors (BJTs), Metal-Semiconductor Field Effect transistors (MESFETs), Junction-Field Effect Transistors (J-FETs), Insulated-gate Bipolar Junction Transistors (IGBJTs), Hybrid Bipolar Junction Transistors (HBJT), or the like.

It is to be understood that the circuits depicted herein are merely exemplary, and that in fact many other circuits can be implemented which achieve the same functionality.

For example, with reference toFIG. 1, a current mirror formed by transistors70and71has been shown. Many other types of mirror configurations known in the art are possible, for example, cascode current mirror, Widlar current mirror, Wilson current mirror. Further, reference circuits shown may of any type, bandgap based references, voltage regulators, DC-DC converters or the like.

Furthermore, the devices may be physically distributed over a number of apparatuses, while functionally operating as a single device. Also, devices functionally forming separate devices may be integrated in a single physical device. Also, the units and circuits may be suitably combined in one or more semiconductor devices. However, other modifications, variations and alternatives are also possible. The specifications and drawings are, accordingly, to be regarded in an illustrative rather than in a restrictive sense.

The claims provide a compensation circuit configured for coupling to a voltage source and a reference circuit,

The compensation circuit comprises a transient converter for converting a first transient perturbation of a supply voltage into a first compensation electrical signal proportional to said first transient perturbation. The voltage source is configured for supplying the supply voltage to the compensation circuit and the reference circuit. The reference circuit is configured to generate a reference signal having a constant reference amplitude. The reference circuit comprises a first circuit node and a reference output electrically coupled to the first circuit node for outputting the reference signal.

The compensation circuit comprises an adder coupled to the transient converter for adding the first compensation electrical signal to an electrical signal at the first circuit node, with a first polarity opposite to a disturbance polarity of a disturbance of the electrical signal in response to the first transient perturbation.