Real time clock architecture and/or method for a system on a chip (SOC) application

An apparatus comprising a first portion, a second portion and a processor. The first portion is configured to generate a count signal in response to a number of oscillations of a clock signal. The first portion is powered by an unswitched power source. The second portion is configured to generate an interrupt signal in response to the count signal and a predetermined stored value. The second portion is powered by a switched power source. The processor is configured to (i) receive the interrupt signal and (ii) generate the switched power.

FIELD OF THE INVENTION

The present invention relates to clock generation generally and, more particularly, to a real time clock architecture and/or method for a system on a chip (SOC) application.

BACKGROUND OF THE INVENTION

Conventional system on a chip (SOC) designs need a real time clock. For example, a DVD recorder (or other recorder) needs to know when to wake up from a sleep mode to record a particular event, such as a TV program. The clock needs to keep the time even when the recorder is unplugged from the power supply. In particular, a quality recorder should not be blinking at “12:00” when the power supply is restored.

Conventional solutions use an external discrete real time clock (RTC) chip to hold time. Such chips normally use bipolar technology so that they are able to run on a button battery or other low voltage inexpensive battery. External discrete real time clock chips increase the overall cost of a design.

Other solutions integrate the clock onto the SOC chip. However, a SOC is not ideal for extremely low power applications (i.e., being powered by a button battery). A typical integrated clock needs to run on a re-chargeable battery only. Rechargeable batteries are expensive. Another approach is to integrate a clock into the SOC chip with special process. Such special processes are expensive and not practical on sub-micron technology.

It would be desirable to implement an inexpensive real time clock that minimized power usage.

SUMMARY OF THE INVENTION

The present invention concerns an apparatus comprising a first portion, a second portion and a processor. The first portion is configured to generate a count signal in response to a number of oscillations of a clock signal. The first portion is powered by an unswitched power source. The second portion is configured to generate an interrupt signal in response to the count signal and a predetermined stored value. The second portion is powered by a switched power source. The processor is configured to (i) receive the interrupt signal and (ii) generate the switched power.

The objects, features and advantages of the present invention include providing a clock generation system that may (i) be implemented in a system on a chip (SOC), (ii) consume a limited amount of power, (iii) be implemented without special VLSI processes (e.g., using normal sub-micron process), (iv) work with a large variety of battery voltages (e.g., 1.2 volts to 3.3 volts), (v) work with a standard lithium watch battery, a rechargeable battery, a super capacitor, etc., (vi) provide an automatic low battery detection, (vii) provide flexibility by implementing features in software, (viii) be implemented with low cost without an external real time clock (RTC) chip, (ix) be fabricated with standard VLSI process, and/or (x) provide long battery life (e.g., >10 years) on a standard watch battery.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Referring toFIG. 1, a block diagram of a system100is shown in accordance with a preferred embodiment of the present invention. The system100generally comprises an external portion102, an internal portion104and a software module/processor106. The external portion102generally comprises a crystal oscillator110and a counter112. The oscillator110may have an input114aand in input144bthat are connected to a crystal116. The oscillator110may have an output118that presents a signal (e.g., CLK) to an input120of the counter112. The signal CLK may be a square wave that oscillates at a particular frequency in response to a frequency of the crystal116. In one example, an inexpensive watch crystal may be used to implement the crystal116. Such a crystal is typically run at 32,768 Hz. However, other frequencies may be used to meet the design criteria of a particular implementation.

The counter112may be implemented as an asynchronous counter to avoid the need to implement clocking circuitry. An asynchronous counter normally uses less power than a synchronous counter. In one example, the counter112may be implemented as a 46-bit counter. However, other counters may be implemented to meet the design criteria of a particular implementation. A 46-bit counter may be useful if the crystal116is a 32,768 Hz crystal (e.g., the frequency of a standard watch crystal). 32,768/2^15=1 second. 1 second*2^31=2,147,483,648 seconds which equals 68 years. So a 46-bit counter driven by a 32,768 Hz crystal will count for 68 years, long beyond the useful life of a typical DVD recorder. A 45-bit counter will count for 34 years.

The internal portion104may be implemented as core logic (e.g., software run on a microprocessor, such as an embedded microprocessor or microcontroller). The internal portion104generally comprises a block (or circuit)130, a block (or circuit)132and a block (or circuit)134. The circuit130may be implemented as a voltage comparator circuit. The circuit132may be implemented as a comparator circuit. The circuit134may be implemented as a register. The register134may be configured to provide a timer interrupt signal (e.g., TIME). The signal TIME may be a multi-bit signal.

The external portion102may have an input122that receives a voltage (e.g., BAT) from an external source. The external source may be implemented as a battery, a capacitor, or other appropriate external power source. In one example, the external power may be a watch battery, re-chargeable battery, super capacitor or system power. The voltage comparator130may receive the external source voltage BAT through an input123. The comparator130, the comparator132and the register134are generally powered by the same power supply that supplies the core logic in the processor106. The counter112has an output124that presents a signal (e.g., COUNT). The signal COUNT may be a multi-bit signal. The comparator132has an input136that receives the signal COUNT and an input138that receives the signal TIME from the register134. The comparator132compares the signal COUNT to the signal TIME to generate an interrupt signal (e.g., INT) presented through an output140. The signal COUNT may be presented to an input150of the software module/processor106. The signal INT may be presented to an input152of the software module/processor106. An input154of the software module/processor106may receive the signal CLK. An input156of the software module/processor106may receive a signal (e.g., LOW) from the comparator130.

The core logic104(which runs on the core power) comprises the voltage comparator130, the comparator132, the time register134and control logic/startup logic for the XTAL oscillator/counter (to be described in more detail in connection withFIG. 3).

Referring toFIG. 2, a more detailed diagram of the voltage comparator130is shown. The voltage comparator130monitors the voltage BAT of the external source or battery. If the voltage BAT drops below a certain level (e.g., 1.2 volts in one example), then the output of the comparator130(e.g., the signal LOW) would be asserted. The signal LOW is monitored by the microprocessor106. A band gap reference131(a normal component in a DVD recorder chip) may be used to create a constant voltage signal (e.g., VINT) used to drive other analog circuits in the chip. The band gap reference voltage VINT is used as a voltage standard and compared with the battery voltage BAT to determine if the battery is performing within specifications (e.g., whether the voltage BAT is above a certain voltage level).

The crystal116may be implemented, in one example, as a low cost external watch crystal. However, other types of low cost crystals may be implemented to meet the design criteria of a particular implementation. While the present invention may be suitable for use with a low cost crystal, the invention will work with any crystal that is convenient. The oscillator110may be implemented as a low power crystal (e.g., XTAL) oscillator. The oscillator110and the counter112run on external power. In general, the external portion102continues to operate even if the power source that runs the main core (e.g., the core power) of the chip is removed.

Referring toFIG. 3, a diagram of a start up logic for the circuit102is shown. The oscillator110needs a pulse (e.g., START) to start oscillating. The counter112needs another pulse (e.g., RESET) for an initial start up (or after the battery is changed). The pulse START may be generated from a register160programmed by a microcontroller106. The pulse RESET may be generated from a register162programmed by microcontroller106. A power loss in the internal portion104does not affect the XTAL oscillator110and the counter112. The comparator132generates the interrupt signal INT when the signal COUNT is equal to the predetermined value TIME. Such a feature may be useful for starting a user pre-set recording process or other real time system tasks. Software run in the internal processor106may be used to interpret the count into real time. Conversions such as to and/or from day light savings time may also be implemented. The interrupt signal INT may be used to wake up a recording process and/or drive the external clock display logic. The processor106calculates the difference between the value COUNT and the real time and stores this information in internal memory, external flash memory or external storage device (not shown). Thus, the counter112never needs to be set and the overall circuitry may be simplified and power consumption may be lowered.

The present invention may be implemented using standard sub-micron technology to minimize the transistors needed for implementation. The external portion102includes the oscillator110(with external clock crystal) and a single counter112, so the transistors are kept to a minimum. Implementing the counter112as a 31-bit second counter may be used to count up to more than 50 years.

Referring toFIG. 4a more detailed diagram of the counter112is shown. The counter112may be implemented using a simple asynchronous toggle flip flop with a propagated carry. For example, the counter112may be implemented as a number of flip-flops170a-170n. The counter112does not normally need to be programmed by the internal embedded microprocessor106, which eliminates the need for synchronous logic. When a user sets the time, the processor106remembers the difference between the signal COUNT and the wall clock, and saves the difference in a flash memory, hard disk drive or any non-volatile memory (not shown) When the processor106needs to know the current time, the core logic104reads the counter112and adds the difference retrieved from non-volatile memory. The oscillator110and the counter112run on a separate battery power supply. The counter112may be implemented with a transistor count that is so small that a typical button battery could last for more than 10 years.

The rest of the clock generation system100(e.g., other than the external portion102and core logic104) is not implemented by hardware, but rather is normally implemented by software run in the internal embedded processor106. The embedded processor106reads the value in the counter112, adds the retrieved difference value, and converts the value into seconds, minutes, hours, date and year. The software may also provide adjustments, such as for daylight savings time. Therefore, the real time clock has only a minimal part of logic run on the battery. The system100uses a partition between hardware/software to minimize the drain on the clock battery.

Referring toFIG. 5a diagram of the system100illustrated in the context of a power supply is shown. In the system100, a power supply180may be implemented to provide power to the oscillator110and counter112if the system100has standard power. The battery182would engage if the main power180(e.g., an internal power supply) is lost. Using the main power180when it is available may further extend the life of battery182. A number of diodes184a-184nmay be implemented between the battery182and the power supply180. The diodes184a-184nmay be used to control the direction of current.

The core logic104would compare the value in the counter112with some pre-set value. If the values match, the interrupt signal INT would be sent to the embedded processor106such that TV recording software (or other external software) could be started. The comparator112works on the main power, and thus would not drain the battery.

The system100may automatically detect a low battery condition by comparing the battery voltage with an internal band gap voltage generator. In many SOC chips, a band gap circuit is commonly implemented for other purpose. Thus, a battery low monitor is constructed with a simple voltage comparator and an existing band gap voltage generator.

The function performed by the software module104and a processor106ofFIG. 1may be implemented using a conventional general purpose digital computer programmed according to the teachings of the present specification, as will be apparent to those skilled in the relevant art(s). Appropriate software coding can readily be prepared by skilled programmers based on the teachings of the present disclosure, as will also be apparent to those skilled in the relevant art(s).

The present invention thus may also include a computer product which may be a storage medium including instructions which can be used to program a computer to perform a process in accordance with the present invention. The storage medium can include, but is not limited to, any type of disk including floppy disk, optical disk, CD-ROM, magneto-optical disks, ROMs, RAMs, EPROMs, EEPROMs, Flash memory, magnetic or optical cards, or any type of media suitable for storing electronic instructions.