Light emitting module and automotive illumination device including the same

Disclosed are light emitting modules and automobile illumination devices including the same. The light emitting module comprises a module substrate, a light emitting device on the module substrate, and a light guide structure apart from the module substrate and in plan view surrounding the light emitting device. The light emitting device comprises a first pixel and a second pixel each including a light emitting diode (LED) chip that emits light whose wavelength falls within a range of blue color or ultraviolet ray, and a wavelength conversion material on a top surface of at least one of the first and second pixels.

CROSS-REFERENCE TO RELATED APPLICATION

This U.S. nonprovisional application claims priority under 35 U.S.C § 119 to Korean Patent Application No. 10-2018-0139021 filed on Nov. 13, 2018 in the Korean Intellectual Property Office, the entire contents of which are hereby incorporated by reference.

BACKGROUND

The present inventive concepts relate to a light emitting module, and more particularly, to a light emitting module including a light guide structure.

Light emitting devices, such as light emitting diodes, are apparatus in which light is released from materials included therein. Light emitting devices emit light converted from energy due to recombination of electrons and holes contained in combined semiconductors. Such light emitting devices are currently in widespread used as illumination, display devices, and light sources, and development thereof has been accelerated. As light emitting devices become wider in their application, technology is required to increase luminance efficiency and/or reliability of light emitting modules. In addition, reduction or miniaturization of electronic products leads to requirements for further compactness of light emitting modules used for the electronic products.

SUMMARY

Some example embodiments of the present inventive concepts provide a light emitting module with improved luminance efficiency.

Some example embodiments of the present inventive concepts provide a more compact-sized light emitting module.

According to some example embodiments of the present inventive concepts, a light emitting module may comprise: a module substrate; a light emitting device on the module substrate; and a light guide structure apart from the module substrate and surrounding the light emitting device in plan view. The light emitting device may comprise: a first pixel and a second pixel each including a light emitting diode (LED) chip configured to emit light whose wavelength falls within a range of blue color or ultraviolet ray; and a wavelength conversion material on a top surface of at least one of the first and second pixels.

According to some example embodiments of the present inventive concepts, a light emitting module may comprise: a module substrate; a light emitting device on the module substrate; and a light guide structure apart from the module substrate and guiding light emitted from the light emitting device. The light emitting device may comprise: a first pixel and a second pixel each including a light emitting diode (LED) chip configured to emit light whose wavelength falls within a range of blue color or ultraviolet ray; and a wavelength conversion material on a top surface of at least one of the first and second pixels.

According to some example embodiments of the present inventive concepts, an automobile illumination device may comprise: a module substrate; a light emitting device on the module substrate; and a light guide structure apart from the module substrate and guiding light emitted from the light emitting device. The light emitting device may comprise: a first pixel and a second pixel each including a light emitting diode (LED) chip configured to emit light whose wavelength falls within a range of blue color or ultraviolet ray; and a wavelength conversion material on a top surface of at least one of the first and second pixels.

DETAILED DESCRIPTION OF EMBODIMENTS

In this description, like reference numerals may indicate like components. The following will now describe a light emitting device and a light emitting module including the same according to the present inventive concepts.

FIG. 1Aillustrates a plan view showing a light emitting module according to some example embodiments.FIG. 1Billustrates a cross-sectional view taken along line A-B ofFIG. 1A.FIG. 1Cillustrates an enlarged view of section C shown inFIG. 1B.FIG. 1Dillustrates an enlarged view of section D shown inFIG. 1B.

Referring toFIGS. 1A and 1B, a light emitting module1may include a module substrate1000, a light emitting device2000, and/or a light guide structure3000. The module substrate1000may include, for example, a printed circuit board (PCB). The module substrate1000may include substrate pads1100on a top surface thereof. The substrate pads1100may include a conductive material such as metal, and may be coupled to connection lines1005in the module substrate1000.

The light emitting device2000may be mounted on the module substrate1000. The light emitting device2000may be used as the light emitter. Therefore, the light emitting module1may have smaller size and/or weight.

The light emitting device2000may include connection pads460, and when viewed in plan, the connection pads460may be provided on an edge region of the light emitting device2000. The connection pads460may include a conductive material such as metal. The connection pads460may serve as terminals of the light emitting device2000. For example, the connection pads460may be provided thereon with bonding wires800coupled to the connection pads460and the substrate pads1100. The bonding wires800may include a conductive material such as gold (Au). The light emitting device2000may be electrically connected to the module substrate1000through the connection pads460and the bonding wires800. In this description, the phrase “electrically connected/coupled to the module substrate1000” may mean “electrically connected/coupled to the connection lines1005of the module substrate1000.” In figures exceptFIG. 1B, the connection lines1005are not illustrated for brevity. In certain embodiments, neither the bonding wires800nor the connection pads460may be provided, and the substrate pads1100may be disposed on a bottom surface of the light emitting device2000. Electrodes (not shown) may be provided in the module substrate1000. The substrate pads1100may be correspondingly coupled through the electrodes to first and second electrode patterns410and420which will be discussed below.

The light emitting device2000may have a plurality of pixels PX. The pixels PX may form a pixel array when viewed in plan. For example, the light emitting device2000may have a pixel array including the pixels PX. When viewed in plan, the pixels PX may be two-dimensionally arranged along a first direction D1and a second direction D2. The first and second directions D1and D2may be parallel to the top surface of the module substrate1000. The second direction D2may intersect the first direction D1. The pixel array may be provided on a central region of the light emitting device2000. When viewed in plan, the pixel array may be spaced apart from the connection pads460. The pixels PX may have substantially the same size. For example, each of the pixels PX may have width and length dimensions of about 1 μm to about 3000 μm. The pixels PX may be spaced apart from each other at a substantially regular interval. For example, the pixels PX may be arranged at a pitch of about 1 μm to about 1500 μm. In other embodiments, the pixels PX may have different sizes from each other.

At least two of the pixels PX may emit light of different wavelengths. The pixels PX may include a first pixel PX1and a second pixel PX2. The first pixel PX1may be configured to emit light of a first wavelength to produce a first color. The second pixel PX2may be configured to emit light of a second wavelength different from the first wavelength. The second pixel PX2may be configured to produce a second color different from the first color. The pixels PX of the light emitting device2000may be electrically separated from each other. The pixels PX of the light emitting device2000may operate independently of each other. The pixels PX may be defined by a partition500, for example, a partition wall, or a partition wall structure, which will be discussed below.

As shown inFIG. 1B, the light emitting device2000may include a substrate100, a pixel isolation pattern200, light emitting diode (LED) chips300, a partition500, and/or fluorescent layers610and620. The substrate100may include a dielectric material. For example, the substrate100may include but not limited to a sapphire substrate, a glass substrate, a transparent conductive substrate, a silicon substrate, or a silicon carbide substrate. The pixels PX may share the substrate100. The substrate100may overlap a plurality of the pixels PX.

The LED chips300may be provided on the substrate100. The LED chips300may be provided on corresponding pixels PX. When viewed in plan, an arrangement of the LED chips300may correspond to that of the pixels PX. For example, as shown inFIG. 1A, the LED chips300may be arrayed in the first and second directions D1and D2. When the light emitting device2000operates, the LED chips300may generate light. The LED chips300may emit light of the same intensity. For example, the intensity of light emitted from each of the LED chips300may have a tolerance equal to or less than about 5% of an average intensity of light emitted from the LED chips300. The LED chips300may emit light whose wavelength falls within a range of blue color or ultraviolet ray. The LED chips300may release light of the same wavelength. For example, each of the LED chips300may release light of a certain peak wavelength. Each of the LED chips300may have a tolerance equal to or less than about 5% of an average peak wavelength of light emitted from the LED chips300. The certain peak wavelength may be in a range from about 430 nm to about 480 nm. The certain peak wavelength may correspond to blue color. Thus, the LED chips300may emit blue-colored light.

The pixel isolation pattern200may be provided between sidewalls of the LED chips300. A gap may be provided between the substrate100and bottom surfaces of the LED chips300. For example, the pixel isolation pattern200may be provided in a first opening291, which is provided between the LED chips300. The pixel isolation pattern200may include a dielectric material. The pixel isolation pattern200may physically and electrically separate the LED chips300from each other. Therefore, the LED chips300may operate independently of each other. The pixel isolation pattern200may be provided in the gap between the substrate100and the bottom surfaces of the LED chips300. The pixel isolation pattern200may include a buried dielectric layer220and/or a liner layer210.

An adhesive layer150may be provided between the substrate100and the pixel isolation pattern200. For example, the adhesive layer150may be placed between the substrate100and the buried dielectric layer220. The pixel isolation pattern200may be adhered through the adhesive layer150to the substrate100. The adhesive layer150may include a dielectric material such as a silicon-based dielectric material or a dielectric polymer. For example, the adhesive layer150may include the same material as that of the buried dielectric layer220. In some example embodiments, the adhesive layer150and the buried dielectric layer220may be connected to each other without an interface therebetween. For another example, the adhesive layer150may include an eutectic glue material such as AuSn or NiSi.

The partition500may define pixel openings691and692. For example, the pixel openings691and692may be provided in and surrounded by the partition500. The partition500may separate the pixel openings691and692from each other. As shown inFIG. 1B, the partition500may be provided on the pixel isolation pattern200in the first opening291. The partition500may be provided on and in physical contact with an uppermost top surface200aof the pixel isolation pattern200. For example, as shown inFIGS. 1C and 1D, the partition500may be in contact with an uppermost top surface210aof the liner layer210. The partition500may include a dielectric material. The partition500may include, for example, one or more of silicon (Si), silicon carbide (SiC), sapphire, and gallium nitride (GaN). The partition500may further extend onto a stack structure300S. The partition500may be formed of a silicon substrate.

The partition500may include a first partition510(for example, a partition wall, or a partition wall structure) and a second partition520(for example, a partition wall, or a partition wall structure). The first partition510may be provided between two neighboring fluorescent layers610and620. As shown inFIG. 1A, the first partition510may include segments extending in the first direction D1and other segments extending in the second direction D2. The second partition520may correspond to an outermost part of the partition500. For example, the second partition520and the first partition510may be formed of the same material and connected to each other without an interface therebetween. When viewed in plan, the second partition520may be provided between the pixel array and the connection pads460. The second partition520may surround the fluorescent layers610and620. The second partition520may serve to protect the fluorescent layers610and620. For example, even when external stress is applied to the light emitting device2000, the second partition520may reduce or prevent damage of the fluorescent layers610and620and the first partition510. Therefore, the light emitting device2000may improve in durability and/or reliability. When the light emitting module1is used for an automotive headlamp, the external stress may include vibration and physical impact. At the same level, the second partition520may have a width greater than that of the first partition510. For example, the second partition520may have a top surface at substantially the same level as that of a top surface of the first partition510, and a width W20at the top surface of the second partition520may be greater than a width W10at the top surface of the first partition510. The greater width W20of the second partition520may effectively reduce or prevent damages of the fluorescent layers610and620.

The partition500may have a trapezoidal cross-section. For example, the partition500may have a bottom surface whose width is greater than that at a top surface thereof. The partition500may allow the LED chips300to effectively discharge light outwardly. Consequently, the light emitting module1may improve in luminance efficiency.

The fluorescent layers610and620may be provided on corresponding LED chips300. The fluorescent layers610and620may be provided in corresponding pixel openings691and692. For example, the fluorescent layers610and620may include a first fluorescent layer610and a second fluorescent layer620. The pixel openings691and692may include a first pixel opening691and a second pixel opening692. The first fluorescent layer610may be provided in the first pixel opening691, and the second fluorescent layer620may be provided in the second pixel opening692. The fluorescent layers610and620may correspondingly fill the pixel openings691and692. For example, the first fluorescent layer610may fill the first pixel opening691, and the second fluorescent layer620may fill the second pixel opening692. When viewed in plan, the fluorescent layers610and620may overlap corresponding pixels PX1and PX2. For example, the first fluorescent layer610may overlap the first pixel PX1, and the second fluorescent layer620may overlap the second pixel PX2. The first partition510may separate the fluorescent layers610and620from each other.

When the light emitting device2000operates, the fluorescent layers610and620may correspondingly convert light emitted from the LED chips300into light of desired wavelengths. The first fluorescent layer610may convert light of a certain wavelength emitted from a corresponding LED chip300into light of a wavelength different from the certain wavelength. For example, the first fluorescent layer610may covert light of a certain wavelength into light of a first wavelength. The first wavelength may be different from the certain wavelength. The light of the first wavelength may produce a first color. Thus, the first pixel PX1of the light emitting device2000may produce the first color. The first color may be different from colors of light emitted from the LED chips300. The second fluorescent layer620may include a different material from that of the first fluorescent layer610. The second fluorescent layer620may convert light (e.g., of a certain wavelength) emitted from a corresponding LED chip300into light of a second wavelength. The second wavelength may be different from the certain wavelength. The second wavelength may be different from the first wavelength. The light of the second wavelength may produce a second color different from the first color. The second color may be different from colors of light emitted from the LED chips300. The second pixel PX2of the light emitting device2000may produce the second color. In conclusion, the light emitting device2000may achieve multiple colors. For example, one of the first and second colors may be white, and the other of the first and second colors may be amber. However, the first and second colors are not limited to the above, but may be variously changed. For example, the first color may be one selected from red, green, and blue, and the second color may be another selected from red, green, and blue.

When a light emitting device (e.g., a light emitting chip or a light emitting package) produces a single color, it may be required that the light emitting module1have a plurality of light emitting devices that produce different colors from each other. In certain embodiments, because the light emitting device2000produces a plurality of colors, the light emitting module1may use a single light emitting device2000as a light source. The light emitting module1may improve luminance efficiency. The light emitting module1and a light emitting apparatus including the same may reduce power consumption. Because the light emitting module1includes the single light emitting device2000, the module substrate1000may decrease in size (e.g., planar area). As a result, the light emitting module1may have smaller size and/or weight.

The first partition510may separate the second fluorescent layers620from the first fluorescent layer610. The first partition510may include a different material from that of the first fluorescent layer610and that of the second fluorescent layer620. The first partition510may prevent or reduce optical interference between the pixels PX. Thus, when the light emitting module1operates, color (e.g., the second color) produced from the second pixel PX2may be distinct from color (e.g., the first color) produced from the first pixel PX1. The light emitting module1may exhibit improved contrast characteristics.

Each of the fluorescent layers610and620may include a resin in which fluorescent materials are distributed. The fluorescent material may include one or more of oxide-based material, silicate-based material, nitride-based material, and fluoride-based material. For example, the fluorescent material may include one or more of β-SiAlON:Eu2+(green), (Ca,Sr)AlSiN3:Eu2+(red), La3Si6N11:Ce3+(yellow), K2SiF6:Mn4+(red), SrLiAl3N4:Eu (red), Ln4−x(EuzM1−z)xSi12−yAlyO3+x+yN18−x−y(0.5≤x≤3, 0<z<0.3, 0<y≤4) (red), K2TiF6:Mn4+(red), NaYF4:Mn4+(red), and NaGdF4:Mn4+(red). However, the fluorescent material is not limited to those kinds discussed above.

For example, the fluorescent materials included in each of the fluorescent layers610and620may be the same. For another example, one or more of the fluorescent layers610and620may include at least two kinds of fluorescent particles whose sizes are different from each other. In some example embodiments, the fluorescent layers610and620may have improved chromatic uniformity. The fluorescent layers610and620may include a wavelength conversion material. The wavelength conversion material may convert light of a certain wavelength emitted from the LED chips300. For example, the wavelength conversion material may include a quantum dot fluorescent material, which has a nano-sized particle. The quantum dot fluorescent material may use a III-V or II-VI compound semiconductor to have a core-shell structure. For example, the core may include CdSe and/or InP. The shell may include ZnS and/or ZnSe. In addition, the quantum dot fluorescent material may include a ligand to increase stability of the core and the shell. Optionally, additional wavelength conversion particles may further be provided on an upper portion of one or more of the fluorescent layers610and620.

A reflective layer530may further be provided on a sidewall of the partition500. The reflective layer530may be interposed between the partition500and each of the fluorescent layers610and620. The reflective layer530may reflect light emitted from the LED chip300to improve optical extraction efficiency of the light emitting device2000. The reflective layer530may further prevent or reduce the optical interference between the pixels PX. For example, the reflective layer530may include a metallic material such as Ag, Al, Ni, Cr, Au, Pt, Pd, Sn, W, Rh, Jr, Ru, Mg, Zn, or a combination thereof. For another example, the reflective layer530may be a resin layer including metal oxide. The metal oxide may include titanium oxide or aluminum oxide. The resin layer may include polyphthalamide (PPA). For another example, the reflective layer530may be a distributed Bragg reflector (DBR). The distributed Bragg reflector may include a plurality of layers (not shown), one of which has a refractive index different from those of neighboring layers. The distributed Bragg reflector may include one or more of oxide (e.g., SiO2, TiO2, Al2O3, and/or ZrO2), nitride (e.g., SiN, Si3N4, TiN, AN, TiAlN, and/or TiSiN), and oxynitride (e.g., SiOxNy).

No reflective layer530may be provided on an outer wall of the second partition520. The outer wall of the second partition520may face an inner wall of the second partition520, and the inner wall of the second partition520may face the fluorescent layers610and620. For another example, the light emitting device2000may include no reflective layer530.

The light guide structure3000may be provided on the module substrate1000. The light guide structure3000may include an optical pipe. For example, the light guide structure3000may have an elongated cylindrical waveguide. The light guide structure3000may have a closed-loop shape when viewed in plan as shown inFIG. 1A. When viewed in plan, the light guide structure3000may surround the light emitting device2000. The light guide structure3000may have a diameter A1the same as or greater than a maximum diameter A2of the pixel array of the light emitting device2000. The diameter A2of the pixel array may indicate an interval between outer walls of outermost ones of the fluorescent layers610and620, which outermost ones are arranged in the same direction. The diameter A2of the pixel array may correspond to a diameter of a pixel array region. The pixel array region may include the pixels PX1and PX2and the first partition510between the pixels PX1and PX2. The maximum diameter A2of the pixel array may fall within a range from about 10 μm to about 50 mm. The diameter A1of the light guide structure3000may mean a diameter in the same direction on which the pixel array has the maximum diameter A2. The diameter A1of the light guide structure3000may denote a diameter that is measured at a bottom surface3000bof the light guide structure3000. The bottom surface3000bof the light guide structure3000may face the light emitting device2000or the module substrate1000. The light guide structure3000may concentrate or guide light emitted from the light emitting device2000. The concentrated light may be outwardly discharged. The light guide structure3000may improve luminance efficiency of the light emitting module1.

The diameter A1of the light guide structure3000may depend on the number and size of light emitter included in the light emitting module1. In certain embodiments, a single light emitter may be used to reduce the diameter A1of the light guide structure3000. Because the light emitting device2000is used as the light emitter, the diameter A1of the light guide structure3000may further be reduced. Therefore, the light emitting module1may be more compact. The reduction in size of the light emitting module1may increase the degree of design freedom of a light emitting apparatus including the light emitting module1.

The light guide structure3000may be spaced apart from the light emitting device2000. The light guide structure3000and the light emitting device2000may have therebetween an interval D10ranging from about 0.1 mm to about 5 mm, more narrowly from about 0.3 mm to about 2 mm, and even more narrowly from about 0.5 mm to about 1 mm. When the interval D10between the light guide structure3000and the light emitting device2000is less than about 0.1 mm, the light guide structure3000may be carbonized due to heat generated from the light emitting device2000during its operation. In some example embodiments, a light guide function of the light guide structure3000may be reduced to decrease luminance efficiency of the light emitting module1. When the interval D10between the light guide structure3000and the light emitting device2000is greater than about 5 mm, the light guide structure3000may insufficiently guide light emitted from the light emitting device2000. In some example embodiments, the light emitting device2000may generate optical leakage to reduce luminance efficiency of the light emitting module1.

For example, an air layer, air gap, or air space may be provided between the light guide structure3000and the light emitting device2000. The air layer may have a thickness of about 0.1 mm to about 5 mm. For another example, a resin layer (not shown) may be provided between the light guide structure3000and the light emitting device2000. The resin layer may include the same material as that of the light guide structure3000. The resin layer may be transparent. The resin layer may have a thickness of about 0.1 mm to about 5 mm.

The light guide structure3000may include a polymer such as polycarbonate (PC) and/or polymethylmethacrylate (PMMA). The light guide structure3000may be relatively transparent, but the present inventive concepts are not limited thereto.

The following will now describe in detail the light emitting device2000with reference toFIGS. 1C and 1D.

Referring toFIGS. 1A, 1B, 1C, and 1D, the stack structure300S may include a first semiconductor layer310, an active layer330, and/or a second semiconductor layer320. Each of the LED chips300may be a portion of the stack structure300S. For example, the LED chips300may be portions of the stack structure300S, which portions are defined by the pixel isolation pattern200. Each of the LED chips300may include the first semiconductor layer310, the active layer330, and/or the second semiconductor layer320that are stacked. The first semiconductor layer310may have a first conductive type. The first semiconductor layer310may include gallium nitride (GaN) doped with a p-type dopant. The p-type dopant may include magnesium (Mg). The second semiconductor layer320may have a second conductive type, which is different from the first conductive type. The second semiconductor layer320may include gallium nitride (GaN) doped with an n-type dopant. The n-type dopant may include silicon (Si). A buffer layer (not shown) may further be interposed between the second semiconductor layer320and the partition500. The buffer layer (not shown) may relieve a lattice mismatch between the partition500and the second semiconductor layer320. The active layer330may be interposed between the first semiconductor layer310and the second semiconductor layer320. The active layer330may include a material having a multiple quantum well (MQW) in which at least one quantum well layer and at least one quantum barrier layer are alternately stacked. For example, the active layer330may include gallium nitride (GaN) and indium gallium nitride (InGaN) that are alternately stacked. A material and composition of the active layer330may control a peak wavelength of light emitted from the LED chips300.

A first electrode pattern410and a second electrode pattern420may be provided on each of the LED chips300. The first electrode pattern410may include a first upper electrode pattern411and/or a first lower electrode pattern412. The first upper electrode pattern411may be disposed on the bottom surface of the LED chip300, for example, on a bottom surface of the first semiconductor layer310, and may be electrically connected to the first semiconductor layer310. The first lower electrode pattern412may be provided on a bottom surface of the first upper electrode pattern411, and may be electrically connected to the first upper electrode pattern411.

The second electrode pattern420may include a second upper electrode pattern421and/or a second lower electrode pattern422. The second upper electrode pattern421may be provided in the first semiconductor layer310and the active layer330, and may be electrically connected to the second semiconductor layer320. The second lower electrode pattern422may be provided on a bottom surface of the second upper electrode pattern421, and may be electrically connected to the second upper electrode pattern421.

A dielectric layer205may be interposed between the second upper electrode pattern421and the first semiconductor layer310and between the second upper electrode pattern421and the active layer330. Thus, the second upper electrode pattern421may be insulated from the first semiconductor layer310and the active layer330. The dielectric layer205may extend onto the bottom surface of the first semiconductor layer310. The dielectric layer205may be interposed between the first upper electrode pattern411and the second upper electrode pattern421. Thus, the second upper electrode pattern421may be insulated from the first upper electrode pattern411. The liner layer210may be interposed between the first lower electrode pattern412and the second lower electrode pattern422, and thus second lower electrode pattern422may be insulated from the first lower electrode pattern412. The active layer330may receive electrical signals applied to the first electrode pattern410and the second electrode pattern420. Therefore, recombination of electrons and holes may occur in the active layer330, which may result in generation of light. The first electrode pattern410and the second electrode pattern420may have a high reflectance. The first electrode pattern410and the second electrode pattern420may each include a conductive material such as metal or transparent conductive oxide.

The pixel isolation pattern200may include the buried dielectric layer220and/or the liner layer210. The liner layer210may conformally cover lateral and bottom surfaces of the LED chips300. The liner layer210may be provided on an inner wall and a bottom surface of the first opening291. Thus, the uppermost top surface210aof the liner layer210may be located at substantially the same level as that of top surfaces of the LED chips300. The top surface of each LED chip300may correspond to that of the second semiconductor layer320. The liner layer210may cover a sidewall of the second opening292, but may not cover a bottom surface of the second opening292. The liner layer210may include, for example, a silicon-based dielectric material. The silicon-based dielectric material may include, for example, silicon oxide or silicon nitride. The buried dielectric layer220may be interposed between the substrate100and the liner layer210, and may fill the first opening291and the second opening292. The buried dielectric layer220may include a silicon resin, an epoxy resin, or an acryl resin.

In certain embodiments, the pixel isolation pattern200may be provided to reduce or prevent one of the LED chips300from receiving light emitted from a neighboring one of the LED chips300. Therefore, the light emitting device2000may improve in contrast characteristics.

The light emitting device2000may be provided on its edge region with the second openings292that penetrate the stack structure300S. The connection pads460may be provided in corresponding second openings292. The connection pads460may have their top surfaces at substantially the same level as that of the top surface of the second semiconductor layer320. The connection pads460may include a first connection pad461and a second connection pad462. As shown inFIG. 1C, the first connection pad461may be provided in one of the second openings292. A first line pattern451may be provided on a bottom surface of the first lower electrode pattern412. The first line pattern451may extend between the buried dielectric layer220and the liner layer210, and may be provided on the sidewall of the one of the second openings292. Thus, the first lower electrode pattern412may be coupled through the first line pattern451to the first connection pad461. The first line pattern451may include metal. For example, the first connection pad461may be provided in plural. The first line pattern451may be provided in plural. In some example embodiments, each of the first connection pads461may be coupled through a corresponding first line pattern451to the first lower electrode pattern412of a corresponding pixel PX.

As shown inFIG. 1D, the second connection pad462may be provided in another of the second openings292. A second line pattern452may be provided on a bottom surface of the second lower electrode pattern422, and coupled to the second lower electrode pattern422. The second line pattern452may extend between the buried dielectric layer220and the liner layer210, and may be provided on the another of the second opening292. Thus, the second lower electrode pattern422may be coupled through the second line pattern452to the second connection pad462. The second line pattern452may include, for example, metal. For example, the second connection pad462may be provided in plural. The second line pattern452may be provided in plural. Each of the second connection pads462may be coupled through a corresponding second line pattern452to the second lower electrode pattern422of a corresponding pixel PX. The second line pattern452may be insulated from the first line pattern451. The second connection pads462may be spaced apart from and electrically separated from the first connection pads461. For brevity of description, the following will describe an example including a single first connection pad461and a single second connection pad462.

FIGS. 1E and 1Fillustrate cross-sectional views showing a light emitting structure according to some example embodiments.FIG. 1Cillustrates an enlarged view of section C shown inFIG. 1B.FIG. 1Dillustrates an enlarged view of section D shown inFIG. 1B. A duplicate description of components discussed above will be omitted below.

Referring toFIGS. 1B, 1E, and 1F, the LED chip300may include the first semiconductor layer310, the active layer330, and/or the second semiconductor layer320. The top surface of the LED chip300may have uneven portions325and correspond to the top surface of the second semiconductor layer320. The uneven portions325may be in contact with the fluorescent layers610and620. The fluorescent layers610and620may have their bottom surfaces whose shapes correspond to those of the uneven portions325. The uneven portions325may improve luminance efficiency of the light emitting device2000, for example, of the LED chips300. In figures below, the illustration of the uneven portions325is omitted for brevity, but the present inventive concepts are not limited thereto.

FIG. 2Aillustrates a plan view showing a light emitting module according to some example embodiments.FIG. 2Billustrates a cross-sectional view taken along line A′-B′ ofFIG. 2A. A duplicate description of components discussed above will be omitted below.

Referring toFIGS. 2A and 2B, a light emitting module1A may include a module substrate1000, a light emitting device2000A, and/or a light guide structure3000. The module substrate1000, the light emitting device2000A, and the light guide structure3000may be substantially the same as those discussed above inFIGS. 1A and 1B. In contrast, when viewed in plan, the pixels PX of the light emitting device2000A may include the first pixel PX1and the second pixel PX2, and further include a third pixel PX3. The third pixel PX3may be laterally spaced apart from the first pixel PX1and the second pixel PX2.

The fluorescent layers610and620may include the first fluorescent layer610and the second fluorescent layer620, and further include a third fluorescent layer630. The third fluorescent layer630may be provided on the third pixel PX3. The third fluorescent layer630may convert light of a certain peak wavelength emitted from a corresponding LED chip300into light of a third wavelength. The third wavelength may be different from the certain peak wavelength. The third wavelength may be different from the first wavelength and the second wavelength. The light of the third wavelength may produce a third color. The third color may be different from colors of light emitted from the LED chips300. The third color may be different from the first color and the second color. For example, the first color may be one selected from red, green, and blue, the second color may be another selected from red, green, and blue, and the third color may be the rest of red, green, and blue. However, the first, second, and third colors are not limited to the mentioned above, but may have various colors. In conclusion, the light emitting device2000A may achieve various colors.

The following will now describe a method of fabricating a light emitting device according to some example embodiments.

FIGS. 3A to 3Iillustrate cross-sectional views showing a method of fabricating a light emitting device according to some example embodiments.FIG. 3Jillustrates an enlarged view of section E shown inFIG. 3H. In the description ofFIGS. 3A to 3J, top and bottom surfaces and upper and lower portions of any component will be discussed on the basis ofFIGS. 1B and 3I.FIG. 1Awill also be referred in describingFIGS. 3A to 3I.

Referring toFIGS. 1A and 3A, a stack structure300S may be formed on a support substrate501. The support substrate501may include a silicon (Si) substrate, a silicon carbide (SiC) substrate, a sapphire substrate, or a gallium nitride (GaN) substrate. For example, a semiconductor wafer may be used as the support substrate501. The support substrate501may serve as a growth substrate to form the stack structure300S. A second semiconductor layer320, an active layer330, and a first semiconductor layer310may be sequentially formed on the support substrate501, which may result in the formation of the stack structure300S. The second semiconductor layer320, the active layer330, and the first semiconductor layer310may each include the same material as that discussed above inFIGS. 1A to 1D.

The stack structure300S may be partially removed to form a hole309on each pixel PX. InFIGS. 3A to 3H, the pixel PX may be a virtual component corresponding to a pixel PX of a light emitting device2001shown inFIG. 3I. The formation of the hole309may include forming a mask pattern (not shown) on the first semiconductor layer310and performing an etching process in which the mask pattern is used as an etching mask. The hole309may be formed in the first semiconductor layer310and the active layer330, and may expose the second semiconductor layer320. A dielectric layer205may be formed on the first semiconductor layer310and in the hole309.

Referring toFIGS. 1A and 3B, a first electrode hole419and a second electrode hole429may be formed in the dielectric layer205. The second electrode hole429may be provided in the hole309and may expose the second semiconductor layer320. The first electrode hole419may be provided in the dielectric layer205and may expose the first semiconductor layer310. The second electrode hole429may be separated from the first electrode hole419. A first upper electrode pattern411and a second upper electrode pattern421may be formed in the first electrode hole419and the second electrode hole429, respectively.

A first lower electrode pattern412and a second lower electrode pattern422may be formed on the first upper electrode pattern411and the second upper electrode pattern421, respectively. In certain embodiments, an electrode layer may be formed on the first upper electrode pattern411, the second upper electrode pattern421, and the dielectric layer205. An electrolytic plating process may be performed to form the electrode layer. The electrode layer may be patterned to form the first lower electrode pattern412and the second lower electrode pattern422. The second lower electrode pattern422may include the same material as that of the first lower electrode pattern412, and have substantially the same thickness as that of the first lower electrode pattern412. The second lower electrode pattern422may be spaced apart from and insulated from the first lower electrode pattern412.

Referring toFIGS. 1A and 3C, a first opening291and second openings292may be formed in the stack structure300S. The first opening291and the second openings292may be formed by partially removing the stack structure300S. For example, a blade may be used to form the first and second openings291and292. For another example, the formation of the first and second openings291and292may include forming a mask pattern on the dielectric layer205and performing an etching process in which the mask pattern is used as an etching mask. The first opening291and the second openings292may penetrate the stack structure300S and expose the support substrate501. The formation of the first opening291in the stack structure300S may form light emitting diode (LED) chips300. When viewed in plan, the first opening291may be formed a central region of the stack structure300S. The LED chips300may be portions of the stack structure300S, which portions are defined by the first opening291. The first opening291may separate the LED chips300from each other. When viewed in plan, the second openings292may be formed an edge region of the stack structure300S. The second openings292may be spaced apart from each other. The second openings292may be spaced apart from the first opening291.

A liner layer210may be formed on the LED chips300, in the first opening291, and in the second openings292. The liner layer210may conformally cover the first semiconductor layer310, the first and second lower electrode patterns412and422, the first opening291, and the second openings292. A liner layer210may be removed from bottom surfaces of the second openings292. Thus, the liner layer210may expose the support substrate501in the second openings292. The liner layer210may remain in the first opening291and cover the support substrate501.

Referring toFIGS. 1A and 3D, the liner layer210may be partially removed to expose the first lower electrode pattern412and the second lower electrode pattern422. A first line pattern451may be formed on the liner layer210to cover the exposed first lower electrode pattern412. The first line pattern451may extend into one of the second openings292. A second line pattern452may be formed on the liner layer210to cover the exposed second lower electrode pattern422. The second line pattern452may extend into another of the second openings292. For example, the formation of the first and second line patterns451and452may include forming a connection line layer on the liner layer210, in the first opening291, and in the second openings292, and then performing a patterning process on the connection line layer. The second line pattern452and the first line pattern451may be formed by a single process. The patterning process may insulate and physically separate the second line pattern452from the first line pattern451.

Connection pads460may be formed in corresponding second openings292. An electrolytic plating process may be performed to form the connection pads460. The connection pads460may be in physical contact with the support substrate501exposed to the second openings292. The connection pads460may include a first connection pad461and a second connection pad462. The first connection pad461may be provided in the one of the second openings292and coupled to the first line pattern451. After the first line pattern451is formed, the first connection pad461may be formed. Alternatively, after the first connection pad461is formed, the first line pattern451may be formed. Dissimilarly, the first connection pad461and the first line pattern451may be formed by a single process.

The second connection pad462may be provided in the another of the second openings292and coupled to the second line pattern452. The formation of the second connection pad462may be followed or preceded by the formation of the second line pattern452. Alternatively, the second connection pad462and the second line pattern452may be formed by a single process.

Referring toFIGS. 1A and 3E, a buried dielectric layer220may be formed on the liner layer210, the first line pattern451, the second line pattern452, the first connection pad461, and the second connection pad462. The buried dielectric layer220may fill the first opening291and the second openings292. The formation of the buried dielectric layer220may form a pixel isolation pattern200between the LED chips300. The pixel isolation pattern200may include the liner layer210and the buried dielectric layer220.

A substrate100may be disposed on the buried dielectric layer220. An adhesive layer150may further be provided between the buried dielectric layer220and the substrate100. The adhesive layer150may adhere the substrate100to the buried dielectric layer220. The substrate100and the buried dielectric layer220may be substantially the same as those discussed above inFIGS. 1A and 1B.

Referring toFIGS. 1A and 3F, the stack structure300S to which the substrate100is adhered may be turned upside down to cause the support substrate501to face upward. The support substrate501may be thinned as expressed by a dotted line. A grinding process may be performed to thin the support substrate501.

Referring toFIGS. 1A and 3G, the support substrate501may be etched to form a first partition510and pixel openings691and692. The first partition510and the pixel openings691and692may be substantially the same as those discussed above inFIGS. 1A and 1B. For example, the first partition510and a remaining portion of the support substrate501may define the pixel openings691and692. The pixel openings691and692may include a first pixel opening691and a second pixel opening692. When viewed in plan, each of the pixel openings691and692may be formed on a corresponding one of pixels PX1and PX2. For example, the first pixel opening691may be formed on a first pixel PX1, and the second pixel opening692may be formed on a second pixel PX2. The pixel openings691and692may expose a top surface of the second semiconductor layer320. After the first partition510is formed, a portion of the support substrate501may remain to cover the first connection pad461and the second connection pad462.

A reflective layer530may be formed on sidewalls of the pixel openings691and692to cover a sidewall of the first partition510. The reflective layer530may further cover an inner wall of the support substrate501. In certain embodiments, a preliminary reflective layer may be formed on sidewalls and bottom surfaces of the pixel openings691and692, a top surface of the support substrate501, and a top surface of the first partition510. The preliminary reflective layer may be anisotropically etched to form the reflective layer530. The reflective layer530may expose the bottom surfaces of the pixel openings691and692, for example, the top surface of the second semiconductor layer320. Alternatively, no reflective layer530may be formed.

Referring toFIGS. 1A, 3H, and 3J, a first fluorescent layer610and a second fluorescent layer620may be formed in the first pixel opening691and the second pixel opening692, respectively. For example, a dispensing process may be performed to provide the first pixel opening691with a first fluorescent material to form the first fluorescent layer610. A dispensing process may be performed to provide the second pixel opening692with a second fluorescent material to form the second fluorescent layer620. The second fluorescent material may be different from the first fluorescent material.

In certain embodiments, because the fluorescent layers610and620are formed by the dispensing process, each of the fluorescent layers610and620may have a central portion whose top surface is located at a higher level than that of a top surface at an edge portion of each of the fluorescent layers610and620. For example, as shown inFIG. 3J, a top surface610aat the central portion of the first fluorescent layer610may be located at a higher level than that of a top surface610bof the edge portion of the first fluorescent layer610. For the first fluorescent layer610, the edge portion may be closer than the central portion to the partition500. Likewise, a top surface at the central portion of the second fluorescent layer620may be located at a higher level than that of a top surface at the edge portion of the second fluorescent layer620.

Referring toFIGS. 1A and 3I, the support substrate501may be etched to form a second partition520. In certain embodiments, a mask pattern (not shown) may be formed on the first partition510and the first and second fluorescent layers610and620. The support substrate501may undergo an etching process in which the mask pattern is used as an etching mask. The etching process may etch a portion of the support substrate501to form the second partition520. The second partition520may expose the first connection pad461and the second connection pad462. A partition500may thus be formed to include the first partition510and the second partition520. The second partition520may correspond to an outermost part of the partition500. As shown inFIG. 1A, the second partition520may be connected to the first partition510. The second partition520may include the same material as that of the first partition510. Through the processes discussed above, a light emitting device2001may eventually be fabricated.

FIGS. 4A and 4Billustrate cross-sectional views showing a method of fabricating a light emitting device according to some example embodiments. A duplicate description of components discussed above will be omitted below.FIG. 2Awill also be referred in describingFIGS. 4A and 4B.

Referring toFIGS. 2A and 4A, the LED chip300, the dielectric layer205, the first and second electrode patterns410and420, the first and second line patterns451and452, the connection pads460, and the pixel isolation pattern200may be formed on the support substrate501, and the substrate100may be provided on the pixel isolation pattern200. The support substrate501may be etched to form the first partition510and the pixel openings691and692. The formation of the LED chip300, the dielectric layer205, the first and second electrode patterns410and420, the pixel isolation pattern200, the first partition510, and the first and second pixel openings691and692may be substantially the same as those discussed above inFIGS. 3A to 3G.

The pixel openings691and692may include the first pixel opening691and the second pixel opening692, and further include a third pixel opening693. The formation of the third pixel opening693may be substantially the same as the formation of the first and second pixel openings691and692ofFIG. 3G. The reflective layer530may be formed sidewalls of the first, second, and third pixel openings691,692, and693.

Referring toFIGS. 2A and 4B, the first fluorescent layer610, the second fluorescent layer620, and the third fluorescent layer630may be formed in the first pixel opening691, the second pixel opening692, and the third pixel opening693, respectively. The first fluorescent layer610and the second fluorescent layer620may be formed by the dispensing process discussed above inFIG. 3H. A dispensing process may be performed to fill the third pixel opening693with a third fluorescent material to form the third fluorescent layer630. The third fluorescent material may be different from the first fluorescent material and the second fluorescent material. The third fluorescent layer630may convert light emitted from the LED chip300into light of a third wavelength. The third wavelength may be different from the first wavelength and the second wavelength. Thus, the third pixel PX3may produce a third color different from the first color produced from the first pixel PX1and the second color produced from the second pixel PX2. A top surface at a central portion of the third fluorescent layer630may be located at a higher level than that of a top surface at an edge portion of the third fluorescent layer630.

The support substrate501may be etched to form the second partition520. The etching of the support substrate501and the formation of the second partition520may be substantially the same as those discussed above inFIG. 3I. The second partition520may expose the first connection pad461and the second connection pad462. Through the processes discussed above, a light emitting device2001A may eventually be fabricated. The light emitting device2001A may produce three kinds of colors. For example, the light emitting device2001A may achieve the first color, the second color, and the third color.

FIGS. 5A to 5Fillustrate cross-sectional views showing a method of fabricating a light emitting device according to some example embodiments.FIG. 1Awill also be referred in describingFIGS. 5A to 5F. A duplicate description of components discussed above will be omitted below.

Referring toFIGS. 1A and 5A, the LED chip300, the dielectric layer205, the electrode patterns410and420, the line patterns451and452, the connection pads460, the pixel isolation pattern200, and the substrate100may be provided on the support substrate501. The formation of the LED chip300, the dielectric layer205, the electrode patterns410and420, the line patterns451and452, the connection pads460, the pixel isolation pattern200may be substantially the same as that discussed above inFIGS. 3A to 3F.

A first mask layer910may be formed on the support substrate501to expose the top surface of the support substrate501. When viewed in plan, the first mask layer910may overlap the second pixel PX2. An etching process may be performed in which the first mask layer910is used as an etching mask to etch the support substrate501to form the first pixel opening691in the support substrate501. The first pixel opening691may be provided on the first pixel PX1and may expose the top surface of the second semiconductor layer320. A first reflective layer531may be formed in the first pixel opening691and may cover the sidewall of the first pixel opening691. The formation of the first reflective layer531may include forming a preliminary reflective layer to cover the sidewall and top surface of the first pixel opening691and performing a patterning process on the preliminary reflective layer. The patterning process may cause the first reflective layer531to expose the top surface of the second semiconductor layer320. The first reflective layer531may include the same material as that of the reflective layer530discussed above inFIGS. 1A and 1B. The first pixel opening691may be provided in plural spaced apart from each other. The first mask layer910may be removed.

Referring toFIGS. 1A and 5B, a first fluorescent material may be provided in the first pixel openings691and on the support substrate501, with the result that a first preliminary fluorescent layer610P may be formed. The first preliminary fluorescent layer610P may fill the first pixel openings691and cover the top surface of the support substrate501.

Referring toFIGS. 1A and 5C, an upper portion of the first preliminary fluorescent layer610P may be removed to form a plurality of first fluorescent layers610. A grinding process may be performed to remove the first preliminary fluorescent layer610P. The grinding process may continue until the support substrate501is exposed. Therefore, the first fluorescent layers610may be separated from each other. Each of the first fluorescent layers610may be locally provided in a corresponding first pixel opening691.

The grinding process may cause each of the first fluorescent layers610to have a top surface coplanar with that of the support substrate501. The top surface of each of the first fluorescent layers610may be substantially flat. For example, a top surface610aat the central portion of each of the first fluorescent layers610may be located at substantially the same level as that of a top surface610bat the edge portion of each of the first fluorescent layers610.

Referring toFIGS. 1A and 5D, a portion of the support substrate501may be removed to form the second pixel opening692and the first partition510. A second mask layer920may be formed to cover the first fluorescent layer610. The second pixel opening692may be formed by an etching process in which the second mask layer920is used as an etching mask to etch the support substrate501. The first partition510may be a portion of the support substrate501, which portion is provided between the pixel openings691and692, and may define the pixel openings691and692.

A second reflective layer532may be formed in the second pixel opening692and may cover the sidewall of the second pixel opening692. The second reflective layer532may expose the top surface of the second semiconductor layer320. The reflective layer530discussed inFIGS. 1A and 1Bmay include the first reflective layer531formed as illustrated in the example ofFIG. 5Aand the second reflective layer532formed as illustrated in the example ofFIG. 5D. The second mask layer920may be removed.

Referring toFIGS. 1A and 5E, a second fluorescent material may be provided in the second pixel opening692and on the support substrate501, with the result that a second preliminary fluorescent layer620P may be formed. The second preliminary fluorescent layer620P may fill the second pixel opening692and cover the top surface of the support substrate501. Although not shown, the second pixel opening692may be provided in plural spaced apart from each other. In some example embodiments, the second preliminary fluorescent layer620P may fill the plurality of second pixel openings692. The following will now describe an example in which a single second pixel opening692is provided.

Referring toFIGS. 1A and 5F, an upper portion of the second preliminary fluorescent layer620P may be removed to form the second fluorescent layer620. A grinding process may be performed to remove the second preliminary fluorescent layer620P. The grinding process may continue until the support substrate501is exposed. Although not shown, the second fluorescent layer620may be formed in plural, and each of the plurality of second fluorescent layers620may be provided locally in a corresponding second pixel opening692. The grinding process may cause the second fluorescent layer620to have a flat top surface. The top surface of the second fluorescent layer620may be coplanar with that of the support substrate501.

Referring back toFIGS. 1A and 1B, the support substrate501may be etched to form the second partition520. The second partition520may expose the first connection pad461and the second connection pad462. Through the processes mentioned above, the light emitting device2000discussed inFIGS. 1A and 1Bmay eventually be fabricated.

FIGS. 6A to 6Cillustrate cross-sectional views showing a method of fabricating a light emitting device according to some example embodiments.FIG. 2Awill also be referred in describingFIGS. 6A to 6C.

Referring toFIGS. 2A and 6A, the first fluorescent layer610may be formed on the first pixel PX1, and the second fluorescent layer620may be formed on the second pixel PX2. The formation of the first and second fluorescent layers610and620may be substantially the same as that discussed above inFIGS. 5A and 5F. Before the formation of the first and second fluorescent layers610and620, the LED chip300, the dielectric layer205, the electrode patterns410and420, the line patterns451and452, the connection pads460, and the pixel isolation pattern200may be formed on the support substrate501, and the substrate100may be adhered to the pixel isolation pattern200.

A third mask layer930may be formed on the support substrate501and the first and second fluorescent layers610and620, and may expose the top surface of the support substrate501. An etching process may be performed in which the third mask layer930is used as an etching mask to etch the support substrate501to form the third pixel opening693and the first partition510. The third pixel opening693may be provided on the third pixel PX3. The third pixel opening693may be spaced apart from the first and second pixel openings691and692, and may expose the second semiconductor layer320. A third reflective layer533may be formed in the third pixel opening693and may cover a sidewall of the third pixel opening693. The third reflective layer533may expose the top surface of the second semiconductor layer320. The reflective layer530discussed inFIGS. 2A and 2Bmay include the first reflective layer531, the second reflective layer532, and the third reflective layer533. Although not shown, the third pixel opening693may be formed in plural. The third mask layer930may be removed.

Referring toFIGS. 2A and 6B, a third fluorescent material may be provided in the third pixel openings693and on the support substrate501, with the result that a third preliminary fluorescent layer630P may be formed. The third preliminary fluorescent layer630P may fill the third pixel openings693and cover the top surface of the support substrate501.

Referring toFIGS. 2A and 6C, an upper portion of the third preliminary fluorescent layer630P may be removed to form the third fluorescent layer630. A grinding process may be performed to remove the third preliminary fluorescent layer630P. The grinding process may continue until the top surface of the support substrate501is exposed. Although not shown, the third fluorescent layer630may be formed in plural, and each of the plurality of third fluorescent layers630may be provided locally in a corresponding third pixel opening693. The grinding process may cause the third fluorescent layer630to have a top surface coplanar with that of the support substrate501. The third fluorescent layer630may have a flat top surface.

Referring back toFIG. 2B, the support substrate501may be etched to form the second partition520. Through the processes mentioned above, the light emitting device2000A discussed inFIGS. 2A and 2Bmay eventually be fabricated.

The following will now describe a light emitting module and a method of fabricating the same according to some example embodiments.

Referring back toFIGS. 1A, 1B, 2A, and 2B, the light emitting device2000may be disposed on the module substrate1000. The light emitting device2000may be fabricated as illustrated in the example ofFIGS. 5A to 5F. The bonding wires800may be formed on corresponding connection pads460. The bonding wires800may be correspondingly coupled to the connection pads460and the substrate pads1100. Therefore, the light emitting device2000may be electrically connected to the module substrate1000. On the module substrate1000, the light guide structure3000may be disposed spaced apart from the light emitting device2000. As a result, the light emitting module1may eventually be fabricated as shown inFIGS. 1A and 1B. For another example, the light emitting module1may be fabricated using the light emitting device2001formed as illustrated in the example ofFIGS. 3A to 3I.

As shown inFIGS. 2A and 2B, the light emitting module1A may be fabricated using the light emitting device2000A formed as illustrated in the example ofFIGS. 6A to 6C. For another example, the light emitting module1A may be fabricated using the light emitting device2001A formed as illustrated in the example ofFIGS. 4A and 4B.

FIG. 7illustrates a cross-sectional view taken along line A-B ofFIG. 1A, showing a light emitting module according to some example embodiments.

Referring toFIG. 7, a light emitting module1B may include a module substrate1000, a light emitting device2000, a light guide structure3000, and/or a heat radiation structure1300. The heat radiation structure1300may be provided on a bottom surface of the module substrate1000. The heat radiation structure1300may have high thermal conductance. The heat radiation structure1300may include a metallic material such as aluminum or copper, but the present inventive concepts are not limited thereto. When the light emitting module1B operates, heat generated from the light emitting device2000may be promptly discharged outwardly through the module substrate1000and the heat radiation structure1300. Accordingly, the light emitting module1B may improve in thermal characteristics and operating reliability.

An arrangement of the heat radiation structure1300may be variously changed. For example, the heat radiation structure1300may be disposed on a lateral surface of the module substrate1000. For another example, the heat radiation structure1300may cover the lateral and bottom surfaces of the module substrate1000.

FIG. 8Aillustrates a plan view showing a light emitting module according to some example embodiments.FIG. 8Billustrates a cross-sectional view taken along line A″-B″ ofFIG. 8A.

Referring toFIGS. 8A and 8B, a light emitting module1C may include a cover4000, a module substrate1000, a light emitting device2000, and/or a light guide structure3001. For example, the cover4000may be a housing or a printed circuit board. The module substrate1000on which the light emitting device2000is mounted may be disposed on the cover4000to cause a bottom surface of the module substrate1000to face the cover4000. The module substrate1000and the light emitting device2000may be substantially the same as those discussed above inFIGS. 1A and 1B. For another example, the light emitting device2000A discussed inFIGS. 2A and 2Bmay be mounted on the module substrate1000.

The light guide structure3001may be provided on the cover4000. The light guide structure3001may be spaced apart from the light emitting device2000, and may cover the light emitting device2000. The light guide structure3001may define a space in which the light emitting device2000is provided. An air layer or a resin layer (not shown) may be provided between the light guide structure3001and the light emitting device2000. The light guide structure3001may have a hemispherical shape. For example, the light guide structure3001may have a hemispherical outer surface and a hemispherical inner surface3001i. The light guide structure3001may have an inside diameter A1′ the same as or greater than a maximum diameter A2′ of a pixel array. The inside diameter A1′ of the light guide structure3001may mean a maximum diameter at the hemispherical inner surface3001iof the light guide structure3001. The light guide structure3001may include the same material as that of the light guide structure3000discussed above inFIGS. 1A to 1D. The light guide structure3001may be reversibly attached or detached to the cover4000.

Light emitted from the light emitting device2000may be outwardly discharged through the light guide structure3001. The light guide structure3001may improve luminance efficiency of the light emitting module1C. The light guide structure3001may control illuminance of light emitted from the light emitting device2000.

For another example, the heat radiation structure1300discussed inFIG. 7may further be provided on a bottom or lateral surface of the module substrate1000. In some example embodiments, the heat radiation structure1300may be disposed on a top surface of the cover4000.

FIG. 9illustrates a cross-sectional view showing a light emitting module according to some example embodiments.

Referring toFIG. 9, a light emitting module1D may include a cover4000, a module substrate1000, a light emitting device2000, a light guide structure3000, and/or an external structure5000. The external structure5000may be a housing. An upper portion of the light guide structure3000may be engaged and rigidly coupled with the external structure5000. The cover4000may be substantially the same as that discussed inFIG. 8. The module substrate1000, the light guide structure3000, and the light emitting device2000may be substantially the same as those discussed above inFIGS. 1A and 1B.

In the explanation ofFIGS. 7, 8A, 8B, and 9, the light emitting device2000may be fabricated as illustrated in the example ofFIGS. 5A to 5F. For another example, the light emitting module1B,1C, or1D may be fabricated using the light emitting device2001fabricated as discussed in the example ofFIGS. 3A to 3I, the light emitting device2001A fabricated as discussed in the example ofFIGS. 4A and 4B, or the light emitting device2000A fabricated as discussed in the example ofFIGS. 6A to 6C.

FIG. 10illustrates a perspective view showing an automotive illumination device according to some example embodiments.

Referring toFIG. 10, a car10may include one or more of a head-lamp module2020, a mirror-lamp module2040, a tail-lamp module2060, and an inner-lamp module. The head-lamp module2020may be installed in a head-lamp part2010. The mirror-lamp module2040may be installed in an external side-mirror part2030. The tail-lamp module2060may be installed in a tail-lamp part2050. The inner-lamp module may be provided inside the car10. One or more of the head-lamp module2020, the mirror-lamp module2040, the tail-lamp module2060, and the inner-lamp module may be achieved by one of the light emitting modules1,1A,1B,1C, and1D discussed above. For example, the light emitting modules1,1A,1B,1C, and1D may be used as an automobile illumination device.

According to the present inventive concepts, a light emitting device may produce at least two colors. A single light emitting chip may be used as a light emitting device, and thus a light emitting module may have small size and weight. The reduction in size of the light emitting module may increase the degree of design freedom of a light emitting apparatus including the light emitting module. The light emitting module may decrease in power consumption. A light guide structure may be provided to improve luminance efficiency.

This detailed description of the present inventive concepts should not be construed as limited to the embodiments set forth herein, and it is intended that the present inventive concepts cover the various combinations, the modifications and variations of this invention without departing from the spirit and scope of the present inventive concepts. The appended claims should be construed to include other embodiments.