ELECTRONIC DEVICE COMPRISING CONNECTOR AND METHOD FOR SENSING DISCONNECTION

Disclosed is an electronic device including: a USB connector connected to a USB plug of an external device; a high-speed interface; a voltage source for supplying a voltage to the high-speed interface; a first circuit portion connected to a ground portion, and has a second impedance higher than a first impedance of the high-speed interface; and a processor. The processor is configured to monitor the external device by using the high-speed interface in a first interval of a first frame, form a disconnection sensing path by forming a connection between the first circuit portion and a second circuit portion of the external device, and use the disconnection sensing path to determine whether the connection between the USB connector and the USB plug has been disconnected. The second circuit portion may have a fourth impedance higher than a third impedance of an external high-speed interface. Various other embodiments are also possible.

BACKGROUND

Technical Field

One or more embodiments disclosed herein generally relate to an electronic device including a connector and a method for sensing disconnection.

Description of Related Art

[2] An electronic device may have a connector so as to be connected to an external device. For example, the electronic device may have a USB connector or receptable connected to a USB plug of the external device. When the USB plug of the external device is inserted into the USB connector of the electronic device, the electronic device may be connected to the external device via a wired interface so that the electronic device and the external device may perform various operations together. For example, when the external device is a headset, the electronic device may output sound via the external device. The electronic device may transmit and/or receive data to and/or from the external device, using the USB connection as a high speed interface.

In one example, the electronic device may determine whether the connection between the electronic device and the external device is released based on a change in the voltage level of the connector. For example, the electronic device may determine that the connection between the electronic device and the external device is released when change in the voltage level of the USB connector is equal to or greater than a specified value. The electronic device may sense whether the change in the voltage level of a connecting pin of the USB connector is equal to or greater than the specified value.

SUMMARY

The voltage level of a connector of an electronic device may be changed by external factors such as ambient temperature that is outside a specified temperature range, ambient humidity that is outside a specified humidity range, and/or movement of an external device. For example, when a headset connected to the electronic device is moved while the ambient temperature and/or humidity is high, the impedance between the USB connector of the electronic device and the USB plug of the headset may change, and so that the voltage level of a connecting pin of the USB connector of the electronic device may change.

When the change in the voltage level of the connecting pin of the USB connector is equal to or greater than a specified value, the electronic device may erroneously determine that connection between the electronic device and an external device is released even when the USB connector of the electronic device and the USB plug of the headset are still actually connected to each other. Accordingly, the connection between the electronic device and the external device may be released by the external environment even while the USB plug of the headset is inserted into the USB connector of the electronic device. For example, when the USB connection is used as a high speed interface, the USB connector has a relatively low impedance. In this case, the voltage level of the USB connector may be easily changed by the external environment to the point that the change may generate false signals as described above.

For example, there may be high speed devices and full speed devices that can be connected to the electronic device via USB. The impedance and voltage level of a data line for transmitting and receiving data of the electronic device may be changed based on the connected external device. A relatively low impedance and a low voltage level may be applied to the data line in USB high speed mode interface when a USB high speed device is used, compared to USB full speed mode interface that uses a USB full speed device. Accordingly, in the USB high speed mode, the external environment may cause a larger variation in the voltage level of the data line of the USB device.

The high speed interface mentioned in the instant disclosure may refer to the USB high speed mode interface.

An electronic device according to an embodiment disclosed in the disclosure includes a housing, a USB connector formed at one side of the housing and connected to a USB plug of an external device, a high speed interface for transmitting and/or receiving data to and/or from the external device connected to the USB connector, a voltage source for supplying a first voltage to the high speed interface, a first circuit portion connected to a ground portion having a second voltage lower than the first voltage and having a second impedance higher than a first impedance of the high speed interface, and a processor, the processor monitors the external device using the high speed interface in a first section of a first frame, transmits and/or receives the data to and/or from the external device using the high speed interface in the first section, connects the first circuit portion to a second circuit portion of the external device so as to form a disconnection sensing path in at least a portion of a second section other than the first section in the first frame, and determines whether a connection between the USB connector and the USB plug is released using the disconnection sensing path, and the second circuit portion has a fourth impedance higher than a third impedance of an external high speed interface of the external device.

In addition, a method for sensing disconnection of an electronic device according to another embodiment disclosed in the disclosure includes monitoring an external device using a high speed interface with a first impedance in a first section of a first frame, transmitting and/or receiving data to and/or from the external device using the high speed interface in the first section, connecting a first circuit portion having a second impedance higher than the first impedance to a second circuit portion of the external device so as to form a disconnection sensing path in at least a portion of a second section other than the first section in the first frame, and determining whether a connection between a USB connector and a USB plug is released using the disconnection sensing path, and the second circuit portion has a fourth impedance higher than a third impedance of an external high speed interface of the external device.

In connection with the description of the drawings, the same or similar reference numerals may be used for the same or similar components.

DETAILED DESCRIPTION

According to certain embodiments disclosed herein, provided are a method for sensing disconnection that reduces erroneous determinations that the connection between the electronic device and the external device is released caused by the external environment while the external device is connected to the connector of the electronic device, and an electronic device implementing the same.

According to certain embodiments disclosed herein, using the disconnection sensing path with impedance higher than that of the high speed interface, erroneous determinations that the connection between the electronic device and the external device is released caused by the external environment while the USB plug of the external device is plugged into the USB connector of the electronic device may be reduced. Accordingly, the electronic device and the external device may be stably connected to each other.

In addition, according to certain embodiments disclosed herein, the electronic device may transmit and/or receive the data to and/or from the external device using the high speed interface. The high speed interface may transmit and/or receive more data than other more conventional interfaces. Accordingly, the quality of operations performed by the external device may be improved. For example, when the external device is the headset, the electronic device may output high-quality sound via the external device.

Hereinafter, certain embodiments of the disclosure are described with reference to the accompanying drawings. However, it is not intended to limit the disclosure to specific embodiments, and it should be understood to cover various modifications, equivalents, and/or alternatives of the embodiments of the disclosure.

FIG.1is a view100showing the operation of plugging a USB plug120into a USB connector113of an electronic device101according to an embodiment. The electronic device101according to an embodiment may include a housing102, a display103, an input key105, a microphone hole107, a speaker hole109, an earphone jack111, and/or the USB connector113. In another embodiment, the electronic device101may omit at least one (e.g., the input key105and/or the earphone jack111) of the components or additionally include other components.

In one embodiment, the display103may be implemented as the front surface of the electronic device101. Edges of the display103may have substantially the same shape as the outer edges of the front surface of the housing102of the electronic device101. The display103may display screens or other content. The display103may extend to the edges of the front surface of the electronic device101and a portion of the side surface of the electronic device. When the display103extends to the edge of the front surface of the electronic device101, a camera (e.g., a camera module980inFIG.9), a sensor (e.g., a sensor module976inFIG.9), and/or the input key105may be arranged so as not to overlap the display103.

In one embodiment, the input key105may be disposed on the front surface and/or the side surface of the electronic device101. The input key105may acquire user touch inputs. For example, the input key105may be a physical key formed on the housing102of the electronic device101. As another example, the input key105may be implemented as a soft key displayed on the display103. When touched or pressed by the user, the input key105may activate the display103to be in standby.

In one embodiment, the microphone hole107may be disposed in the side surface of the electronic device101. A microphone (e.g., the input device950inFIG.9) may be disposed inside the microphone hole107. The microphone hole107may acquire external sound.

In one embodiment, the speaker hole109may be disposed in the side surface of the electronic device101. A speaker (e.g., the sound output device955inFIG.9) may be disposed inside the speaker hole109. The speaker hole109may output sound to the outside.

In one embodiment, the earphone jack111may be disposed in the side surface of the electronic device101. The earphone jack111may accommodate an earphone terminal therein. The earphone jack111may transmit and/or receive audio signals to and/or from one or more earphones or headphones.

In one embodiment, the USB connector113may be disposed in the side surface of the electronic device101. For example, the USB connector113may be disposed at the lower end of the side surface of the housing102of the electronic device101. The USB plug120may be plugged into the USB connector113. For example, the USB connector113may accommodate a USB terminal121of the USB plug120therein. When the USB plug120is inserted into the USB connector113, the USB terminal121may be coupled to the USB connector113.

In one embodiment, the USB connector113may transmit and/or receive power and/or data to and/or from an external device (e.g., the external device350inFIG.3). The external device350may be various types of peripheral devices connected to the electronic device101via a wired interface through the USB plug120. For example, the external device350may be the peripheral device, such as a desktop PC, a laptop computer, a tablet, an external hard drive, a speaker, a headset, earphones, and an auxiliary battery.

In one embodiment, the electronic device101may be connected to the external device350having the USB plug120via the USB connector113. The electronic device101may perform various operations with the external device350. For example, when the external device350is the headset, the electronic device101may output sound via the external device350. When the electronic device101is able to be connected to the headset via the USB connector113, the earphone jack111may be omitted from the electronic device101. Accordingly, aesthetics and robustness of the electronic device101, in particular its external appearance, may be improved by omitting the earphone jack111from the electronic device101.

FIG.2is a view200showing a plurality of connecting pins211,212,213,214,215,216,217,218,219,220,221,222,231,232,233,234,235,236,237,238,239,240,241, and242of a USB connector (e.g., the USB connector113inFIG.1) of an electronic device (e.g., the electronic device101inFIG.1) according to an embodiment. As one example, the USB connector113inFIG.2is USB Type-C. The plurality of connecting pins211,212,213,214,215,216,217,218,219,220,221,222,231,232,233,234,235,236,237,238,239,240,241, and242may include the A1pin211, the A2pin212, the A3pin213, the A4pin214, the A5pin215, the A6pin216, the A7pin217, the A8pin218, the A9pin219, the A10pin220, the A11pin221, the Al2pin222, the B1pin231, the B2pin232, the B3pin233, the B4pin234, the B5pin235, the B6pin236, the B7pin237, the B8pin238, the B9pin239, the B10pin240, the B11pin241, and the B12pin242. In another embodiment, instead of the USB connector, the physical connector of the electronic device may be a lightning connector.

In one embodiment, the A1pin211may be a connecting pin for returning the voltage level of the USB connector113to ground voltage level. The A1pin211may be referred to as the GND pin.

In one embodiment, the A2pin212may be the super speed first differential pair positive connecting pin defined in USB Type-C. The A2pin212may transmit signal and/or data to the external device (e.g., the external device350inFIG.3). The A2pin212may be referred to as the TX1+pin.

In one embodiment, the A3pin213may be the super speed first differential pair negative connecting pin. The A3pin213may transmit signal and/or data to the external device350. The A3pin213may be referred to as the TX1−pin.

In one embodiment, the A4pin214may be a connecting pin that supplies bus power to the external device350or receives the bus power from the external device350. The A4pin214may be referred to as the VBUS pin.

In one embodiment, the A5pin215may be the first configuration channel connecting pin as defined in USB Type-C. The USB configuration channel connecting pin may sense connection and/or disconnection between the USB connector113and a USB terminal (e.g., the USB terminal121inFIG.1) of the external device350. The configuration channel connecting pin of the USB may determine whether a connection direction of the USB connector113and the USB terminal121is correct. The USB configuration channel connecting pin may be used to correctly establish the connection between the USB connector113and the USB terminal121. The A5pin215may be referred to as the CC1pin.

In one embodiment, the A6pin216may be the first differential pair positive connecting pin defined in USB 2.0. The A6pin216may be referred to as the D+pin.

In one embodiment, the A7pin217may be the first differential pair negative connecting pin defined in USB 2.0. The A7pin217may be referred to as the D-pin.

In one embodiment, the A8pin218may be the first sideband use connecting pin. The A8pin218may be referred to as the SBU1pin.

In one embodiment, the A9pin219may be a connecting pin that supplies the bus power to the external device350or receives the bus power from the external device350. The A9pin219may be referred to as the VBUS pin.

In one embodiment, the A10pin220may be the super speed second differential pair negative connecting pin. The A10pin220may receive signal and/or data from the external device350. The A10pin220may be referred to as the RX2−pin.

In one embodiment, the A11pin221may be the super speed second differential pair positive connecting pin. The A11pin221may receive signal and/or data from the external device350. The A11pin221may be referred to as the RX2+pin.

In one embodiment, the Al2pin222may be a connecting pin for returning the voltage level of the USB connector113to the ground voltage level. The Al2pin222may be referred to as the GND pin.

In one embodiment, the B1pin231may be a connecting pin for returning the voltage level of the USB connector113to the ground voltage level. The B1pin231may be referred to as the GND pin.

In one embodiment, the B2pin232may be the super speed third differential pair positive connecting pin. The B2pin232may transmit signal and/or data to the external device350. The B2pin232may be referred to as the TX2+pin.

In one embodiment, the B3pin233may be the super speed third differential pair negative connecting pin. The B3pin233may transmit signal and/or data to the external device350. The B3pin233may be referred to as the TX2−pin.

In one embodiment, the B4pin234may be a connecting pin that supplies the bus power to the external device350or receives the bus power from the external device350. The B4pin214may be referred to as the VBUS pin.

In one embodiment, the B5pin235may be the second configuration channel connecting pin as defined in USB Type-C. The B5pin235may be referred to as the CC2pin.

In one embodiment, the B6pin236may be the second differential pair positive connecting pin defined in the USB 2.0. The B6pin236may be referred to as the D+pin.

In one embodiment, the B7pin237may be the second differential pair negative connecting pin defined in the USB 2.0. The B7pin237may be referred to as the D-pin.

In one embodiment, the B8pin238may be the second sideband use connecting pin. The B8pin238may be referred to as the SBU2pin.

In one embodiment, the B9pin239may be a connecting pin that supplies the bus power to the external device350or receives the bus power from the external device350. The B9pin239may be referred to as the VBUS pin.

In one embodiment, the B10pin240may be the super speed fourth differential pair negative connecting pin. The B10pin240may receive signal and/or data from the external device350. The B10pin240may be referred to as the RX1−pin.

In one embodiment, the B11pin241may be the super speed fourth differential pair positive connecting pin. The B11pin241may receive signal and/or data from the external device350. The B11pin241may be referred to as the RX1+pin.

In one embodiment, the B12pin242may be a connecting pin for returning the voltage level of the USB connector113to the ground voltage level. The B12pin242may be referred to as the GND pin.

FIG.3is a block diagram300showing the electronic device101according to an embodiment. The electronic device101according to an embodiment may include a power supply circuit310, a control circuit320including a connecting pin330, and an interface340. The interface340may include a first interface341, a second interface342, a third interface343, and/or a fourth interface344.

In one embodiment, the electronic device101may recognize the external device350connected to the interface340. For example, the electronic device101may recognize the external device350connected to the first interface341. The first interface341may be USB-Type C high speed interface. The control circuit320may be connected to the first interface341via the connecting pin330. For example, the connecting pin330may be a physical pin connected to the control circuit (e.g., an integrated circuit (IC))320. The connecting pin330may be composed of a plurality of pins. Each interface (e.g., the first interface341, the second interface342, the third interface343, and the fourth interface344) may be connected to at least one of the plurality of pins.

In one embodiment, the power supply circuit310may supply power to the external device350via the first interface341. For example, the power supply circuit310may supply the power to the external device350via a VBUS pin (e.g., the VBUS pins214,219,234, and239inFIG.2). The power supply circuit310may include an adapter that converts AC power into DC power. The power supply circuit310may include a battery or be connected to a separate battery.

In one embodiment, the control circuit320may determine maximum power and/or maximum current that may be supplied to the external device350. The control circuit320may be connected to the external device350via the connecting pin330. The control circuit320may obtain information regarding the external device350or perform communication with the external device350.

In one embodiment, the connecting pin330may be connected to the interface340. The connecting pin330may be a CC pin (e.g., the CC1pin215and/or the CC2pin235inFIG.2) connected to the control circuit320. The control circuit320may determine whether the external device350is connected via the connecting pin330. The connecting pin330may sense connection and/or disconnection of the external device350.

In one embodiment, the first interface341may be a receptacle that may be connected to a USB plug (e.g., the USB plug120inFIG.1) of the external device350.

In one embodiment, the connecting pin330or the first interface341may be connected to high level voltage. The connecting pin330or the first interface341may be connected to a pull-up resistor that raises the voltage level of the USB connector113. The connecting pin330or the first interface341may alternatively be connected to low level voltage by being connected to a pull-down resistor that lowers the voltage level of the USB connector113.

FIG.4Ais a view400showing a state in which the USB plug120of the external device350is plugged into the USB connector113of the electronic device101according to an embodiment. The electronic device101according to an embodiment may include a voltage source410, a high speed interface411, a first circuit portion412, a ground portion415, and a disconnection sensing driver430. The external device350according to an embodiment may include an external voltage source420, an external high speed interface421, a second circuit portion422, and an external ground portion425.

In one embodiment, the voltage source410may supply a first voltage to the high speed interface411. The first voltage may have a voltage level equal to or higher than about 750 mV and equal to or lower than about 850 mV. For example, the first voltage may be about 800 mV.

In one embodiment, the high speed interface411may be connected to the voltage source410. The high speed interface411may be connected to the USB connector113. The high speed interface411may be connected to the external high speed interface421of the external device350via the USB connector113. The high speed interface411and the external high speed interface421may form a data transmission/reception path (a double-headed arrow path inFIG.4A). For example, when the external device350is the headset, the high speed interface411may transmit data for playing sound such as music to the external device350. As another example, when sensing whether the connection of the external device350is released from the external device350, the high speed interface411may receive data related to whether the connection of the external device350is released from the external device350.

In one embodiment, a first impedance413may be connected to the voltage source410having the first voltage. The first impedance413may be the pull-up resistor connected to the voltage source410. The first impedance413may have a value equal to or higher than about 40Ω and equal to or lower than about 50Ω. For example, the first impedance413may be about 45Ω.

In one embodiment, a first switch416may be connected to the voltage source410having the first voltage. The first switch416may selectively connect the high speed interface411to the USB connector113. When the first switch416is closed, the high speed interface411may be connected to the USB connector113. When the first switch416is opened, the transmission and/or the reception of the data via the high speed interface411may be prevented. A processor (e.g., the processor920inFIG.9) of the electronic device101may control the opening/closing timing of the first switch416. The processor may include a microprocessor or any suitable type of processing circuitry, such as one or more general-purpose processors (e.g., ARM-based processors), a Digital Signal Processor (DSP), a Programmable Logic Device (PLD), an Application-Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA), a Graphical Processing Unit (GPU), a video card controller, etc. In addition, it would be recognized that when a general purpose computer accesses code for implementing the processing shown herein, the execution of the code transforms the general purpose computer into a special purpose computer for executing the processing shown herein. Certain of the functions and steps provided in the Figures may be implemented in hardware, software or a combination of both and may be performed in whole or in part within the programmed instructions of a computer. No claim element herein is to be construed under the provisions of 35 U. S.C. 112(f), unless the element is expressly recited using the phrase “means for.” In addition, an artisan understands and appreciates that a “processor” or “microprocessor” may be hardware in the claimed disclosure. Under the broadest reasonable interpretation, the appended claims are statutory subject matter in compliance with 35 U.S.C. § 101.

In one embodiment, the first circuit portion412may be connected to the USB connector113. The first circuit portion412may be connected to the second circuit portion422of the external device350via the USB connector113.

In one embodiment, the first circuit portion412and the second circuit portion422may form a disconnection sensing path (a dotted arrow path inFIG.4A). The disconnection sensing path may sense when the connection between the USB connector113and the USB plug120of the external device350is released. The disconnection sensing path may be connected to the disconnection sensing driver430. The disconnection sensing path may be used so that the disconnection sensing driver430can detect or sense when the connection between the USB connector113of the electronic device101and the USB plug120of the external device350is released.

In one embodiment, the first circuit portion412may be connected to the ground portion415. The ground portion415may have a second voltage lower than the first voltage. For example, the ground portion415may have the ground voltage level of about 0 V.

In one embodiment, the first circuit portion412may have a second impedance414. The second impedance414may be the pull-down resistor connected to the ground portion415.

In one embodiment, the second impedance414may have a higher value than the first impedance413. The second impedance414may have a value equal to or higher than about 14 kΩ and equal to or lower than about 16Ω For example, the second impedance414may be about 15 kΩ.

In one embodiment, the external high speed interface421may be connected to the external ground portion425. The external ground portion425may have the second voltage. For example, the external ground portion425may have the ground voltage level of about 0 V. The voltage level of the external ground portion425may be substantially the same as the voltage level of the ground portion415. The external high speed interface421may be connected to the USB plug120. The external high speed interface421may transmit and/or receive the data to and/or from the electronic device101.

In one embodiment, a third impedance423may be connected to the external ground portion425having the second voltage. The third impedance423may be the pull-down resistor connected to the external ground portion425. The third impedance423may have a value equal to or higher than about 40Ω and equal to or lower than about 50Ω. For example, the third impedance423may be about 45Ω. The third impedance423may have substantially the same value as the first impedance413.

In one embodiment, a second switch426may be connected to the external ground portion425having the second voltage. The second switch426may selectively connect the external high speed interface421to the USB plug120. When the second switch426is closed, the external high speed interface421may be connected to the USB plug120. When the second switch426is opened, transmission and/or reception of data via the external high speed interface421may be prevented. The processor920of the electronic device101may control the opening/closing timing of the second switch426.

In one embodiment, the high speed interface411and the external high speed interface421may be impedance matched with each other. For example, the high speed interface411and the external high speed interface421may be matched with each other to have an impedance of about 90Ω to operate. The high speed interface411and the external high speed interface421may be connected to each other to form the data transmission/reception path between the electronic device101and the external device350.

In one embodiment, the second circuit portion422may be connected to the USB plug120. The second circuit portion422may be connected to the first circuit portion412of the electronic device101via the USB plug120. The second circuit portion422and the first circuit portion412may form the disconnection sensing path. The disconnection sensing path may be used to sense when the connection between the USB plug120of the external device350and the USB connector113of the electronic device101is released. The disconnection sensing path may be used to so that the disconnection sensing driver430of the electronic device101can sense when the connection between the USB plug120of the external device350and the USB connector113of the electronic device101is released.

In one embodiment, the second circuit portion422may be connected with the external voltage source420. The external voltage source420may supply third voltage to the second circuit portion422. The third voltage may have a voltage level equal to or higher than about 3.2 V and equal to or lower than about 3.4 V. For example, the third voltage may be about 3.3 V.

In one embodiment, the second circuit portion422may have a fourth impedance424. The fourth impedance424may be the pull-up resistor connected to the external voltage source420.

In one embodiment, the fourth impedance424may have a higher value than the third impedance423. The fourth impedance424may have a value equal to or higher than about 1.4 kΩ and equal to or lower than about 1.6Ω. For example, the fourth impedance424may be about 1.5 kΩ.

In one embodiment, the second circuit portion422may have a third switch427. The third switch427may selectively connect the second circuit portion422to the USB plug120. When the third switch427is closed, the second circuit portion422may be connected to the USB plug120. When the third switch427is opened, the connection between the second circuit portion422and the USB plug120may be released. The processor920of the electronic device101may control the opening/closing timing of the third switch427.

In one embodiment, the disconnection sensing driver430may monitor whether the USB connector113of the electronic device101and the USB plug120of the external device350are connected to each other. The disconnection sensing driver430may monitor whether the electronic device101and the external device350are connected to each other using the data transmission/reception path (the double-headed arrow path inFIG.4A) to which the high speed interface411and the external high speed interface421are connected. The disconnection sensing driver430may determine whether the data is transmitted at a specified interval through the data transmission/reception path to which the high speed interface411and the external high speed interface421are connected. The data may be USB data and/or sound data to be output from the headset. The disconnection sensing driver430may transmit, to the processor920, information on whether the data is transmitted at the specified interval through the data transmission/reception path to which the high speed interface411and the external high speed interface421are connected.

In one embodiment, when the data is transmitted at the specified interval, the processor920may close the first switch416, close the second switch426, and open the third switch427. When the data is transmitted at the specified interval, the processor920may determine that the connection between the USB connector113of the electronic device101and the USB plug120of the external device350is maintained, and may maintain the data transmission and reception path to which the high speed interface411and the external high speed interface421are connected.

In one embodiment, when a voltage out of a specified voltage range is sensed in the USB connector113, the processor920may open the first switch416, open the second switch426, and close the third switch427. The processor920may pull-down the voltage level of the USB connector113in the electronic device101and pull-up the voltage level of the USB plug120in the external device350. When the voltage out of the specified voltage range is sensed in the USB connector113, the processor920may connect the first circuit portion412and the second circuit portion422to each other so as to form the disconnection sensing path (the dotted arrow path inFIG.4A) to determine whether the connection between the USB connector113of the electronic device101and the USB plug120of the external device350is released. When sensing a signal flowing through the disconnection sensing path (the dotted arrow path inFIG.4A), whether the connection between the USB connector113of the electronic device101and the USB plug120of the external device350is released may be identified. For example, the signal flowing through the disconnection sensing path (the dotted arrow path inFIG.4A) may be sensed using an external sensing device. The processor920may determine whether the connection between the USB connector113of the electronic device101and the USB plug120of the external device350is released using the disconnection sensing path.

In one embodiment, the processor920may connect the first circuit portion412and the second circuit portion422to each other to form the disconnection sensing path, and then determine that the connection between the USB connector113of the electronic device101and the USB plug120of the external device350is released when the voltage level of the USB connector113changes by a specified value or greater. For example, when the voltage level of the USB connector113decreases from about 3.0 V to be equal to or lower than 0.7 V after forming the disconnection sensing path, the processor920may determine that the connection between the USB connector113of the electronic device101and the USB plug120of the external device350is released. The second impedance414, which is the pull-down resistor of the electronic device101, may have the higher value than the first impedance413of the high speed interface411, and the fourth impedance424, which is the pull-up resistor of the external device350, may have the higher value than the third impedance423of the external high speed interface421. Accordingly, the USB connector113of the electronic device101may increase the tolerance in the change in the voltage level caused by the external environment, such as ambient temperature out of a specified temperature range, ambient humidity out of a specified humidity range, and/or movement of the external device.

In one embodiment, when the first circuit portion412and the second circuit portion422are connected to each other to form the disconnection sensing path, and then the voltage level of the USB connector113is maintained within a specified range, the processor920may close the first switch416, close the second switch426, and open the third switch427. When the voltage level of the USB connector113is maintained within the specified range after forming the disconnection sensing path, the processor920may determine that there has been a temporary change in the data transmission state caused by the external environment while the connection between the USB connector113of the electronic device101and the USB plug120of the external device350is maintained. The processor920may connect the electronic device101and the external device350to each other by connecting the high speed interface411and the external high speed interface421to each other to form the data transmission/reception path (the double-headed arrow path inFIG.4A).

In one embodiment, the processor920may use the data transmission/reception path and the disconnection sensing path at the same time. The processor920may use the USB high speed mode interface and the USB full speed mode interface so as to sense whether connection for the USB high speed mode is released. The processor920may additionally use the USB full speed mode interface so as to monitor whether the connection for the USB high speed mode is released. The processor920may use the data transmission/reception path and the disconnection sensing path at the same time. The processor920may more accurately sense whether the connection for the USB high speed mode is released by additionally using the full speed mode interface when sensing that the connection for the USB high speed mode is released.

FIG.4Bis a view450showing a state in which the electronic device101and the external device350are connected to each other via a data transmission/reception path according to an embodiment.

In one embodiment, the processor920may close the first switch416, close the second switch426, and open the third switch427when the data is transmitted at the specified interval. The processor920may connect the high speed interface411and the external high speed interface421to each other to form a data transmission/reception path (the double-headed arrow path inFIG.4B). The processor920may transmit and/or receive the data to and/or from the external device350. For example, when the external device350is the headset, the high speed interface411may transmit the data for playing sound such as the music to the external device350. As another example, when sensing that the connection of the external device350is released from the external device350, the high speed interface411may receive data related to whether the connection of the external device350is released from the external device350.

FIG.4Cis a view460showing a state in which the electronic device101and the external device350are connected to each other via a disconnection sensing path according to an embodiment.

In one embodiment, when the voltage out of the specified voltage range is sensed in the USB connector113, the processor920may open the first switch416, open the second switch426, and close the third switch427. The processor920may connect the first circuit portion412and the second circuit portion422to each other to form a disconnection sensing path (the dotted arrow path inFIG.4C). The processor920may determine whether the connection between the electronic device101and the external device350is released by determining whether the voltage level of the USB connector113changes by the specified value or greater.

In one embodiment, a sensed voltage level for high speed mode interface connection may be reduced by external factors such as shaking of the external device350. When the sensed voltage level for the high speed mode interface connection decreases, there is no abnormality in data transmission from the electronic device101to the external device350, but it is set to turn off communication between the electronic device101and the external device350according to the USB communication standard. The processor920may additionally activate the disconnection sensing path (the dotted arrow path inFIG.4C) that is the full speed mode interface before turning off the communication between the electronic device101and the external device350. The processor920may additionally determine whether the connection between the electronic device101and the external device350is released using the disconnection sensing path.

FIG.5is a flowchart500showing a method for sensing disconnection of an electronic device (e.g., the electronic device101inFIG.4A) according to an embodiment.

In operation510, a processor (e.g., the processor920inFIG.9) of the electronic device101according to an embodiment may monitor an external device (e.g., the external device350inFIG.4A) using the high speed interface in a first section of a first frame. The first section may be a section in which a USB connector (e.g., the USB connector113inFIG.4A) of the electronic device101and a USB plug (e.g., the USB plug120inFIG.4A) of the external device350are connected to each other using the high speed interface. The processor920may close a first switch (e.g., the first switch416inFIG.4A), close a second switch (e.g., the second switch426inFIG.4A), and open a third switch (e.g., the third switch427inFIG.4A) in the first section. The processor920may determine whether the external device350is connected. For example, the processor920may monitor whether an impedance between the high speed interface (e.g., the first interface341inFIG.3) and the external device350is equal to or smaller than a specified value, thereby determining whether the external device350is connected.

In operation520, the processor920of the electronic device101according to an embodiment may transmit and/or receive the data to and/or the external device350using the high speed interface in the first section. The first section may be a section in which the data is transmitted. The processor920may transmit data for the external device350to perform an operation using the high speed interface. For example, when the external device350is the headset, the processor920may transmit audio data using the high speed interface.

In operation530, the processor920of the electronic device101according to an embodiment may connect a first circuit portion (e.g., the first circuit portion412inFIG.4A) to a second circuit portion (e.g., the second circuit portion422inFIG.4A) of the external device350in at least a portion of a second section other than the first section in the first frame. The second section may be a section that maintains the standby state until a start time point of the next frame after the data is transmitted. The second section may be a section in which the USB connector113of the electronic device101and the USB plug120of the external device350are connected to each other using a disconnection sensing path (e.g., the dotted arrow path inFIG.4A) formed as the first circuit portion412and the second circuit portion422are connected to each other. The processor920may open the first switch416, open the second switch426, and close the third switch427in the at least a portion of the second section. The processor920may determine whether the voltage level of the USB connector113changes by the specified value or greater in the disconnection sensing path.

FIG.6is a view600showing a monitoring voltage over time of the electronic device101according to an embodiment.

In one embodiment, a processor (e.g., the processor920inFIG.9) of the electronic device101may output a monitoring signal611in a first section P1of the first frame. For example, the processor920may output the monitoring signal611at a point in time when the first section P1starts. The processor920may determine whether a USB plug (e.g., the USB plug120inFIG.4A) of the external device350is connected to a USB connector (e.g., the USB connector113inFIG.4A) of the electronic device101using the monitoring signal611. For example, the processor920may output a monitoring voltage (e.g., the monitoring signal611) and monitor whether the voltage of the USB connector (e.g., the USB connector113inFIG.4A) of the electronic device101is equal to or smaller than a specified value, thereby determining whether the USB plug (e.g., the USB plug120inFIG.4A) of the external device350is connected.

In one embodiment, the processor920of the electronic device101may transmit and/or receive data612in the first section P1. After determining whether the USB plug120is connected by outputting the monitoring signal611, the processor920may transmit the data612to the external device350after determining that the USB plug120of the external device350is connected to the USB connector113of the electronic device101. For example, when the external device350is the headset, the processor920may transmit the audio data in the first section P1.

In one embodiment, the processor920of the electronic device101may output a disconnection sensing signal613in at least a portion of a second section P2outside the first section P1in the first frame. The second section P2may be extended until the start of the next frame after the transmission and/or the reception of the data612is completed. The processor920may determine whether the state in which the USB plug120of the external device350is connected to the USB connector113of the electronic device101is maintained using the disconnection sensing signal613in the at least a portion of the second section P2.

In one embodiment, the magnitude of the voltage level of the disconnection sensing signal613may be greater than the magnitude of the voltage level of the monitoring signal611. The magnitude of the voltage level of the disconnection sensing signal613may be the same as that of the voltage level of a signal in the USB full speed mode. In the USB high speed mode, erroneous recognition that the connection between the USB connector113of the electronic device101and the USB plug120of the external device350is released may occur. On the other hand, in the USB full speed mode, erroneous recognition of whether the USB connector113of the electronic device101and the USB plug120of the external device350are connected to each other may not occur. In the at least a portion of the second section, a first circuit portion (e.g., the first circuit portion412inFIG.4A) may be connected to a second circuit portion (e.g., the second circuit portion422inFIG.4A) of the external device350so as to form the disconnection sensing path. The first circuit portion412may have higher impedance than the high speed interface411, and the second circuit portion422may have higher impedance than the external high speed interface421. The processor920may identify the connection state between the USB connector113of the electronic device101and the USB plug120of the external device350using the disconnection sensing signal613having the voltage level higher than that of the monitoring signal611. Accordingly, the processor920may reduce the possibility of erroneously determining that the connection between the USB connector113of the electronic device101and the USB plug120of the external device350is released resulted from the change in the voltage level caused by the external environment.

In one embodiment, the processor920may output the disconnection sensing signal613periodically. The period of the disconnection sensing signal613may be equal to or greater than one frame. The period of the disconnection sensing signal613may have a length that is an integer multiple of the length of the one frame. For example, when the length of the one frame is about 125 μs, the length of the period of the disconnection sensing signal613may be about 8 ms. The period of the disconnection sensing signal613may be set as a time interval for determining whether the connection between the USB connector113of the electronic device101and the USB plug120of the external device350is released. The period of the disconnection sensing signal613may be the same as a period used in the USB full speed mode. In the USB full speed mode, erroneous recognition related to whether the USB connector113of the electronic device101and the USB plug120of the external device350are connected to each other may not occur. As the period of the disconnection sensing signal613increases, the possibility of erroneous recognition decreases, so that the first period may be greater than the period of the USB full speed mode. The processor920may identify that the connection between the USB connector113of the electronic device101and the USB plug120of the external device350is maintained by supplying the disconnection sensing signal613periodically. The processor920may reduce the possibility of erroneously determining that the connection between the USB connector113of the electronic device101and the USB plug120of the external device350is released caused by the external environment.

FIG.7is a view700showing a state in which the USB plug120of the external device350is plugged into the USB connector113of the electronic device101according to another embodiment.

In one embodiment, a processor710(e.g., the processor920inFIG.9) of the electronic device101may be connected to the USB connector113via a plurality of interface receivers712,713, and714. For example, the processor710may be connected to the USB connector113via USB SSs (super speeds)712and714and USB FS (full speed)/HS (high speed)713. The USB FS/HS713may be connected to a D+pin (e.g., the D+pin216inFIG.2) and a D-pin (e.g., the D-pin217inFIG.2) of the USB connector113via an mUIC (micro USB IC)315. The USB SSs712and714may be connected to the TX1+pin212, a TX1−pin (e.g., the TX1−pin213inFIG.2), a RX2−pin (e.g., the RX2−pin220inFIG.2), and a RX2+pin (e.g., the RX2+pin inFIG.2) of the USB connector113. The USB SSs712and714may transmit and/or receive data at higher speed than the USB FS/HS713.

In one embodiment, there may be a pull-down circuit portion730(e.g., the first circuit portion412inFIG.4A) branched from the path connecting the TX1+pin212of the USB connector113and the USB SS712of the processor710to each other. The pull-down circuit portion730may be disposed so as to connect the TX1+pin212of the USB connector113and an ADC pin711of the processor710to each other. The ADC pin711may be used so that the processor710can obtain a voltage level of the USB SS712.

In one embodiment, a switch720may be disposed in the pull-down circuit portion730.

The switch720may selectively connect the TX1+pin212of the USB connector113and the ADC pin711of the processor710to each other. In a first section (e.g., the first section P1inFIG.6) in which the TX1+pin212of the USB connector113transmits and/or receives data to and/or from the USB SS712, the switch720may be opened. In a second section (e.g., the second section P2inFIG.6) in which the connection between the USB connector113and the USB plug120is identified, the switch720may be closed.

In one embodiment, when identifying the connection between the USB connector113and the USB plug120, the processor710may allow the TX1+pin232of the external device350to be connected to a pull-up circuit portion740(e.g., the second circuit portion422inFIG.4A). The pull-up circuit portion740may be connected to a pull-up voltage source750. A pull-up resistor745may be disposed in the pull-up circuit portion740. The pull-up resistor745may have an impedance value greater than that of a resistance of the high speed interface. For example, when the resistance of the high speed interface is about 100 S2, the pull-up resistor745may have a resistance of about 100Ω which is about 1000 times greater than the resistance of the high speed interface. The pull-up voltage source750may have a specified voltage level higher than the voltage level of the USB SS712. For example, the pull-up voltage source750may have a voltage level of about 1.8 V.

In one embodiment, the processor710may form a disconnection sensing path using the pull-down circuit portion730and the pull-up circuit portion740. The processor710may determine that the connection between the electronic device101and the external device350is released when a voltage level of the TX1+pin212changes by the specified value or greater while the electronic device101and the external device350are connected to each other. For example, the processor710may determine that the connection between the electronic device101and the external device350is released when the voltage level of the TX1+pin212decreases by about 1.5 V or greater from about 1.8 V to about 0.3 V.

In one embodiment, the processor710may close the switch720after a USB identification process. The processor710may use the pull-down circuit portion730and the pull-up circuit portion740after the USB identification process. Accordingly, USB connection compatibility may be maintained by preventing the use of the pull-down circuit portion730and the pull-up circuit portion740during the identification and connection preparation of the USB.

FIG.8is a view800showing a state in which the USB plug120of the external device350is plugged into the USB connector113of the electronic device101according to another embodiment.

In one embodiment, the processor710(e.g., the processor920inFIG.9) of the electronic device101may be connected to the USB connector113via an auxiliary interface receiver716. For example, the processor710may be connected to the USB connector113via a DP_AUX_P.

In one embodiment, a voltage source810, an auxiliary switch811, resistors812and813, and/or a capacitor814may be arranged between the USB connector113and the auxiliary interface receiver716. The voltage source810may maintain a voltage level higher than that of the auxiliary interface receiver716. For example, the voltage source810may maintain a voltage level of about 3.0 V. The auxiliary switch811may selectively connect the SBU pin218of the USB connector113to the voltage source810.

In one embodiment, the SBU pin218of the USB connector113may be connected to a power management circuit820(e.g., the power management module988inFIG.9). The SBU pin218may be connected to a general-purpose input/output (GPIO) pin821of the power management circuit820. A resistor815may be disposed between the SBU pin218and the GPIO pin821.

In one embodiment, a pull-up circuit portion830branched from the path connecting the SBU pin218of the USB connector113and the auxiliary interface receiver716of the processor710to each other may be disposed. The pull-up circuit portion830may be arranged to connect the SBU pin218of the USB connector113and the ADC pin711of the processor710to each other. The ADC pin711may maintain a specified voltage level higher than the voltage level of the auxiliary interface receiver716. The ADC pin711may acquire the voltage level of the SBU pin218of the USB connector113.

In one embodiment, the processor710(e.g., the processor920inFIG.9) may allow the SBU pin238of the external device350to be connected to a pull-down circuit portion840when identifying the connection between the USB connector113and the USB plug120. The pull-down circuit portion840may be connected to an external ground portion850. The external ground portion850may maintain the ground voltage level of 0 V. A pull-down resistor845may be disposed in the pull-down circuit portion840. The pull-down resistor845may have an impedance value greater than that of the resistance of the high speed interface. For example, when the resistance of the high speed interface is about 100Ω, the pull-up resistor745may have a resistance of about 100Ω which is about 1000 times greater than the resistance of the high speed interface.

In one embodiment, the processor710may form a disconnection sensing path using the pull-up circuit portion830and the pull-down circuit portion840. The processor710may determine that the connection between the electronic device101and the external device350is released when the voltage level of the SBU pin218changes by the specified value or greater while the electronic device101and the external device350are connected to each other. For example, when the voltage level of the TX1+pin212increases by 1.2 V or greater from about 1.5 V to a voltage level equal to or lower than 2.7 V, the processor710may determine that the connection between the electronic device101and the external device350is released.

In one embodiment, the processor710may close the auxiliary switch811after the USB identification process. The processor710may use the pull-up circuit portion830and the pull-down circuit portion840after the USB identification process. Accordingly, USB connection compatibility may be maintained by preventing the use of the pull-up circuit portion830and the pull-down circuit portion840during the identification and the connection preparation of the USB.

FIG.9is a block diagram illustrating an electronic device901in a network environment900according to various embodiments. Referring toFIG.9, the electronic device901in the network environment900may communicate with an electronic device902via a first network998(e.g., a short-range wireless communication network), or an electronic device904or a server908via a second network999(e.g., a long-range wireless communication network). According to an embodiment, the electronic device901may communicate with the electronic device904via the server908. According to an embodiment, the electronic device901may include a processor920, memory930, an input device950, a sound output device955, a display device960, an audio module970, a sensor module976, an interface977, a haptic module979, a camera module980, a power management module988, a battery989, a communication module990, a subscriber identification module(SIM)996, or an antenna module997. In some embodiments, at least one (e.g., the display device960or the camera module980) of the components may be omitted from the electronic device901, or one or more other components may be added in the electronic device901. In some embodiments, some of the components may be implemented as single integrated circuitry. For example, the sensor module976(e.g., a fingerprint sensor, an iris sensor, or an illuminance sensor) may be implemented as embedded in the display device960(e.g., a display).

The processor920may execute, for example, software (e.g., a program940) to control at least one other component (e.g., a hardware or software component) of the electronic device901coupled with the processor920, and may perform various data processing or computation. According to one embodiment, as at least part of the data processing or computation, the processor920may load a command or data received from another component (e.g., the sensor module976or the communication module990) in volatile memory932, process the command or the data stored in the volatile memory932, and store resulting data in non-volatile memory934. According to an embodiment, the processor920may include a main processor921(e.g., a central processing unit (CPU) or an application processor (AP)), and an auxiliary processor923(e.g., a graphics processing unit (GPU), an image signal processor (ISP), a sensor hub processor, or a communication processor (CP)) that is operable independently from, or in conjunction with, the main processor921. Additionally or alternatively, the auxiliary processor923may be adapted to consume less power than the main processor921, or to be specific to a specified function. The auxiliary processor923may be implemented as separate from, or as part of the main processor921.

The auxiliary processor923may control at least some of functions or states related to at least one component (e.g., the display device960, the sensor module976, or the communication module990) among the components of the electronic device901, instead of the main processor921while the main processor921is in an inactive (e.g., sleep) state, or together with the main processor921while the main processor921is in an active state (e.g., executing an application). According to an embodiment, the auxiliary processor923(e.g., an image signal processor or a communication processor) may be implemented as part of another component (e.g., the camera module980or the communication module990) functionally related to the auxiliary processor923.

The memory930may store various data used by at least one component (e.g., the processor920or the sensor module976) of the electronic device901. The various data may include, for example, software (e.g., the program940) and input data or output data for a command related thereto. The memory930may include the volatile memory932or the non-volatile memory934.

The program940may be stored in the memory930as software, and may include, for example, an operating system (OS)942, middleware944, or an application946.

The input device950may receive a command or data to be used by other component (e.g., the processor920) of the electronic device901, from the outside (e.g., a user) of the electronic device901. The input device950may include, for example, a microphone, a mouse, a keyboard, or a digital pen (e.g., a stylus pen).

The sound output device955may output sound signals to the outside of the electronic device901. The sound output device955may include, for example, a speaker or a receiver. The speaker may be used for general purposes, such as playing multimedia or playing record, and the receiver may be used for an incoming calls. According to an embodiment, the receiver may be implemented as separate from, or as part of the speaker.

The display device960may visually provide information to the outside (e.g., a user) of the electronic device901. The display device960may include, for example, a display, a hologram device, or a projector and control circuitry to control a corresponding one of the display, hologram device, and projector. According to an embodiment, the display device960may include touch circuitry adapted to detect a touch, or sensor circuitry (e.g., a pressure sensor) adapted to measure the intensity of force incurred by the touch.

The audio module970may convert a sound into an electrical signal and vice versa. According to an embodiment, the audio module970may obtain the sound via the input device950, or output the sound via the sound output device955or a headphone of an external electronic device (e.g., an electronic device902) directly (e.g., wiredly) or wirelessly coupled with the electronic device901.

The interface977may support one or more specified protocols to be used for the electronic device901to be coupled with the external electronic device (e.g., the electronic device902) directly (e.g., wiredly) or wirelessly. According to an embodiment, the interface977may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, a secure digital (SD) card interface, or an audio interface.

A connecting terminal978may include a connector via which the electronic device901may be physically connected with the external electronic device (e.g., the electronic device902).

According to an embodiment, the connecting terminal978may include, for example, a HDMI connector, a USB connector, a SD card connector, or an audio connector (e.g., a headphone connector).

The camera module980may capture a still image or moving images. According to an embodiment, the camera module980may include one or more lenses, image sensors, image signal processors, or flashes.

The power management module988may manage power supplied to the electronic device901. According to one embodiment, the power management module988may be implemented as at least part of, for example, a power management integrated circuit (PMIC).

The battery989may supply power to at least one component of the electronic device901. According to an embodiment, the battery989may include, for example, a primary cell which is not rechargeable, a secondary cell which is rechargeable, or a fuel cell.

The communication module990may support establishing a direct (e.g., wired) communication channel or a wireless communication channel between the electronic device901and the external electronic device (e.g., the electronic device902, the electronic device904, or the server908) and performing communication via the established communication channel. The communication module990may include one or more communication processors that are operable independently from the processor920(e.g., the application processor (AP)) and supports a direct (e.g., wired) communication or a wireless communication. According to an embodiment, the communication module990may include a wireless communication module992(e.g., a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) or a wired communication module994(e.g., a local area network (LAN) communication module or a power line communication (PLC) module).

A corresponding one of these communication modules may communicate with the external electronic device via the first network998(e.g., a short-range communication network, such as Bluetooth™, wireless-fidelity (Wi-Fi) direct, or infrared data association (IrDA)) or the second network999(e.g., a long-range communication network, such as a cellular network, the Internet, or a computer network (e.g., LAN or wide area network (WAN)). These various types of communication modules may be implemented as a single component (e.g., a single chip), or may be implemented as multi components (e.g., multi chips) separate from each other. The wireless communication module992may identify and authenticate the electronic device901in a communication network, such as the first network998or the second network999, using subscriber information (e.g., international mobile subscriber identity (IMSI)) stored in the subscriber identification module996.

According to an embodiment, commands or data may be transmitted or received between the electronic device901and the external electronic device904via the server908coupled with the second network999. Each of the electronic devices902and904may be a device of a same type as, or a different type, from the electronic device901. According to an embodiment, all or some of operations to be executed at the electronic device901may be executed at one or more of the external electronic devices902,904, or908. For example, if the electronic device901should perform a function or a service automatically, or in response to a request from a user or another device, the electronic device901, instead of, or in addition to, executing the function or the service, may request the one or more external electronic devices to perform at least part of the function or the service. The one or more external electronic devices receiving the request may perform the at least part of the function or the service requested, or an additional function or an additional service related to the request, and transfer an outcome of the performing to the electronic device901. The electronic device901may provide the outcome, with or without further processing of the outcome, as at least part of a reply to the request. To that end, a cloud computing, distributed computing, or client-server computing technology may be used, for example.