Device and method for mura correction

A display driver comprises a first memory configured to store mura correction data image processing circuitry configured to perform mura correction on image data to be displayed on a display panel based on the mura correction data received from the first memory, and control circuitry configured to detect a first error in the mura correction data received from the first memory. The control circuitry is further configured to control a communication with a second memory storing the mura correction data based on the detection of the first error.

CROSS REFERENCE

This application claims priority to Japanese Patent Application No. 2018-190096, filed on Oct. 5, 2018, the disclosure of which is incorporated herein by reference in its entirety.

BACKGROUND

Field

Embodiments disclosed herein generally relate to a device and method for mura correction.

Description of the Related Art

A production process of a display panel such as an organic light emitting diode (OLED) display panel and a liquid crystal display (LCD) panel may cause variations in the pixel characteristics. The variations in the pixel characteristics may cause mura in a displayed image. Performing mura correction, for example, in a display panel or a driver of the display device may effectively improve the image quality of a displayed image.

SUMMARY

In one or more embodiments, a display driver comprises a first memory, image processing circuitry, and control circuitry. The first memory is configured to store therein mura correction data. The image processing circuitry configured to perform mura correction on image data to be displayed on a display panel based on the mura correction data received from the first memory. The control circuitry is configured to detect a first error in the mura correction data received from the first memory and control a communication with a second memory storing the mura correction data.

In one or more embodiments, a method comprises generating image data to be displayed on a display panel through mura correction based on mura correction data received from a first memory, detecting a first error in the mura correction data received from the first memory, and controlling a communication with a second memory storing the mura correction data based on the detection of the first error.

In one embodiment, a display module comprises a display panel, a first memory configured to store mura correction data, image processing circuitry, and control circuitry. The image processing circuitry is configured to perform mura correction on image data to be displayed on the display panel based on the mura correction data received from the first memory. The control circuitry is configured to detect a first error in the mura correction data received from the first memory, and control a communication with a second memory storing the mura correction data based on the detection of the first error.

DETAILED DESCRIPTION

In one or more embodiments, as illustrated inFIG. 1, a display module1comprises a display panel10and a display driver20. In one or more embodiments, the display driver20is configured to receive an input image data from an external host2and drive respective pixels of the display panel10based on the received input image data to display an image on the display panel10. Examples of the display panel10include an OLED display panel and an LCD panel.

In one or more embodiments, the display driver20comprises a driver integrated circuit (IC)100and an external memory200. In one or more embodiments, the driver IC100is configured to perform image processing including mura correction on the input image data received from the host2to control the display panel10. The external memory200is configured to store therein a mura correction data300used for mura correction by the driver IC100. In one or more embodiments, the mura correction data300is written into the external memory200in a test process of the display module1. In one or more embodiments, the external memory200is provided outside of the driver IC100. Examples of the external memory200include a non-volatile memory such as a flash memory. In one or more embodiments, the external memory200and the driver IC100are mounted on the same printed circuit board such as a flexible printed circuit (FPC) board. Alternatively, the external memory200may be integrated in the driver IC100.

In one or more embodiments, the driver IC100comprises: a first interface110, an internal memory120, a second interface130, image processing circuitry140, source driver circuitry150, and control circuitry160.

In one or more embodiments, the first interface110is configured to communicate with the external memory200and receive the mura correction data300from the external memory200. In one or more embodiments, the received mura correction data300is transferred to the internal memory120. Examples of the first interface110include a flash memory controller and a serial peripheral interface (SPI.)

In one or more embodiments, the internal memory120is configured to, based on an instruction from the host2, receive the mura correction data300from the external memory200via the first interface110and store the same therein. In one or more embodiments, the internal memory120is configured to, at boot and/or at reset, receive the mura correction data300from the external memory200via the first interface110and store the same therein. Examples of the internal memory120include a volatile memory such as a static random access memory (SRAM.)

In one or more embodiments, the second interface130is configured to receive the input image data from the host2. In one or more embodiments, the received input image data is transferred to the image processing circuitry140.

In one or more embodiments, image processing circuitry140is configured to perform image processing on the input image data received from the host2. In one or more embodiments, image processing comprises mura correction based on the mura correction data300received from the internal memory120.

In one or more embodiments, the source driver circuitry150is configured to drive the respective pixels of the display panel10based on image data obtained through the image processing by the image processing circuitry140.

In one or more embodiments, the control circuitry160is configured to detect an error in the mura correction data300to control the first interface110. In one or more embodiments, the error detection is performed, for example, when the first interface110receives the mura correction data300and/or when the internal memory120outputs the mura correction data300to the image processing circuitry140. In one or more embodiments, the control circuitry160is configured to request the external memory200for transmission of the mura correction data300based on the detection of the error. In one or more embodiments, the control circuitry160comprises a first error detector161, a second error detector162, and a control block163.

In one or more embodiments, the first error detector161is configured to, when the first interface110has received the mura correction data300from the external memory200, detect an error in the received mura correction data300. In one or more embodiments, the mura correction data300is transferred from the first interface110to the internal memory120via the first error detector161. In one or more embodiments, the first error detector161is configured to check whether there is an error in the mura correction data300received from the first interface110and output the received mura correction data300to the internal memory120when no error is found.

In one or more embodiments, the second error detector162is configured to, when the internal memory120outputs the mura correction data300to the image processing circuitry140, detect an error in the outputted mura correction data300. In one or more embodiments, the internal memory120is configured to output the mura correction data300to the image processing circuitry140via the second error detector162. The second error detector162is configured to check whether there is an error in the mura correction data300received from the internal memory120and forward the received mura correction data300to the image processing circuitry140when no error is found.

In one or more embodiments, the control block163is configured to control communications with the external memory200based on the detection results by the first error detector161and the second error detector162. In one or more embodiments, the control block163is configured to transmit a signal to request the first interface110to obtain the mura correction data300from the external memory200when the first error detector161or the second error detector162detects an error. This may reduce an influence of the error in the mura correction data300on the image data to be displayed.

In one or more embodiments, the control block163is configured to count the number of errors detected by the second error detector162. In one or more embodiments, the control block163is configured to control the first interface110based on the number of the errors. In one or more embodiments, the control block163comprises a counter166configured to count the number of the errors.

FIG. 2illustrates one example of the mura correction data300, according to one or more embodiments. In one or more embodiments, the mura correction data300comprises a data check code311. Examples of the data check code311include a code for detecting an error in the mura correction data300, such as a cyclic redundancy code (CRC) and an error correction code (ECC). In one or more embodiments, the data check code311is attached with respect to the entirety of the mura correction data300. In one or more embodiments, as illustrated inFIG. 2, the mura correction data300may be segmented into data blocks310depending on the readable data size from the external memory200. In such embodiments, as illustrated inFIG. 3, each data block310may comprise a block check code312used to detect an error in each data block310. In one or more embodiments, the first error detector161and the second error detector162are configured to detect an error based on the data check code311and/or the block check codes312.

In one or more embodiments, the display driver20obtains the mura correction data300from the external memory200and stores the obtained mura correction data300in the internal memory120before starting a display operation to display an image on the display panel10, for example at boot-up of the display driver20.

In one or more embodiments, when the mura correction data300is transferred from the external memory200to the internal memory120, the first error detector161checks whether there is an error in the transferred mura correction data300. In one or more embodiments, the first error detector161divides the mura correction data300into the data check code311and a data main body from which the data check code311is excluded. In one or more embodiments, the first error detector161is adapted to CRC-based error detection, and the first error detector161compares a CRC calculated from the data main body of the mura correction data300with the data check code311. In one or more embodiments, the first error detector161determines that there is an error in the mura correction data300when the calculated CRC is different from the data check code311. In one or more embodiments, the first error detector161outputs the mura correction data300to the internal memory120when the calculated CRC is identical to the data check code311. In one or more embodiments, the block check codes312are used for error detection, the first error detector161divides each data block310into the block check code312and a data main body from which the block check code312is excluded and checks whether there is an error in each data block310similarly to the case where the data check code311is used.

In one or more embodiments, the control block163controls the first interface110based on the detection result by the first error detector161. In one or more embodiments, the control block163generates a signal which instructs the first interface110to reobtain the mura correction data300from the external memory200when the first error detector161detects an error. The generated signal is outputted to the first interface110.

In one or more embodiments, the first interface110requests the external memory200for transmission of the mura correction data300based on the signal generated by the control block163. In one or more embodiments, the mura correction data300is transmitted from the external memory200to the first error detector161and the first error detector161checks again whether there is an error in the transmitted mura correction data300. As thus described, the mura correction data300outputted from the external memory200is subjected to error detection by the first error detector161and transferred to the internal memory120before the display operation is started to display an image on the display panel10, in one or more embodiments.

In one or more embodiments, the mura correction data300is transferred from the internal memory120to the image processing circuitry140when the display driver20performs the display operation. In one or more embodiments, when an input image data is supplied from the host2, the image processing circuitry140performs image processing including mura correction based on the mura correction data300to generate an image data to be displayed on the display panel10.

In one or more embodiments, when the mura correction data300is transferred from the internal memory120to the image processing circuitry140, the second error detector162checks whether there is an error in the transferred mura correction data300. In one or more embodiments, the operation of the second error detector162is similar to that of the first error detector161. In one or more embodiments, the mura correction data300is outputted from the second error detector162to the image processing circuitry140when the second error detector162finds no error in the mura correction data300.

In one or more embodiments, the control block163controls the first interface110based on the detection result by the second error detector162. In one or more embodiments, the operation for the case where the second error detector162detects an error is similar to the operation for the case where the first error detector161detects an error.

In one or more embodiments, the control block163is configured to generate a mura correction stop signal based on the detection result by the second error detector162. In one or more embodiments, the control block163is configured to control the mura correction performed by the image processing circuitry140by using the mura correction stop signal. In one or more embodiments, the control block163is configured to enable the mura correction stop signal to stop the mura correction, when the second error detector162detects an error. In one or more embodiments, the image processing circuitry140is configured to generate the image data to be supplied to the source driver circuitry150without performing the mura correction on the input image data received from the host2when the mura correction stop signal is enabled. In one or more embodiments, this effectively reduces an influence of the error in the mura correction data300.

In one or more embodiments, the mura correction stop signal is disabled when the second error detector162does not detect an error. When the second error detector162newly receives a mura correction data300free from errors after detecting an error, the control block163disables the mura correction stop signal, and the image processing circuitry140restarts the mura correction based on the disabling of the mura correction stop signal. In one or more embodiments, the mura correction stop signal may be disabled when the first error detector161detects no error in the mura correction data300received from the external memory200after being once enabled based on an error detection by the second error detector162.

In one or more embodiments, the control block163may be configured to control the first interface110based on the number of errors detected by the second error detector162. In various embodiments, the control block163is configured to request the external memory200for transmission of the mura correction data300when the number of errors exceeds a threshold value. In such embodiments, the control block163may fail to request the external memory200for transmission of the mura correction data300when the number of errors detected by the second error detector162is less than or equal to the threshold value. The threshold value may be determined depending on the specifications of the display driver20.

In one or more embodiment, the counter166reset. For example, the count of errors of the counter166may be set to zero, may be achieved. In one or more embodiments, the control block163is configured to reset the count of errors when no error is detected in the mura correction data300received by the second error detector162. In such embodiments, the control block163may be configured to control the first interface110to request the external memory200for transmission of the mura correction data300when the number of successive errors detected by the second error detector162exceeds a threshold value. Alternatively, the control block163may be configured to reset the count of errors when a predetermined period of time has elapsed. The control block163may be configured to reset the count of errors when the mura correction data300is outputted from the external memory200at boot or the like.

In one or more embodiments, the data check code311incorporated in the mura correction data300comprises a code which can correct an error such as an error correction code. In one or more embodiments, the second error detector162is configured to, when detecting a correctable error, output the error-corrected mura correction data300to the image processing circuitry140to continue the mura correction in the image processing circuitry140. In one or more embodiments, the control block163may be configured to keep the mura correction stop signal disenabled when a correctable error is detected to continue the mura correction in the image processing circuitry140.

In one or more embodiments, when the control block163can identify the location of an error in the mura correction data300, the control block163may request the external memory200for transmission of the data block310for which the error is detected. In one or more embodiments, the control block163generates a signal to request the external memory200for transmission of the data block310for which the error is detected. In one or more embodiments, the first interface110obtains the relevant data block310from the external memory200based on the signal generated by the control block163, and transfers the same to the internal memory120. In one or more embodiments, the control block163can identify the location of the error when the data check code311is an error correction code or the like.

In one or more embodiments, when the mura correction data300comprises the block check codes312associated with the respective data blocks310as illustrated inFIG. 3, the second error detector162may detect an error in each of the data blocks310. This allows the control block163to identify the data block310for which the error is detected. In such embodiments, the control block163may request the external memory200for transmission of the data block310for which the error is detected by controlling the first interface110.

Although various embodiments have been specifically described herein, a person skilled in the art would appreciate that the technologies disclosed herein may be implemented with various modifications.