Display device including concave shaped auxiliary electrode

A display device includes a substrate including a plurality of sub-pixels; a planarization layer disposed on the substrate and including a trench adjacent to the plurality of sub-pixels; a plurality of light emitting elements disposed in the plurality of sub-pixels and sharing an organic layer and a cathode; and an auxiliary electrode disposed in the trench and connected to the cathode. A side surface of the auxiliary electrode has a concave shape. The organic layer has an open portion that is disconnected by the auxiliary electrode. Therefore, it is possible to minimize current leakage through the common layer and prevent an increase in resistance of the cathode by the auxiliary electrode.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the benefit of and priority to Korean Patent Application No. 10-2020-0062718 filed on May 26, 2020, in the Republic of Korea, the entirety of which is hereby expressly incorporated herein by reference into the present application.

BACKGROUND OF THE INVENTION

Technical Field

The present disclosure relates to a display device and more particularly, to a display device capable of preventing low potential voltage rising (VSS rising).

Discussion of the Related Art

Recently, as our society advances toward an information-oriented society, the field of display device for visually expressing an electrical information signal has rapidly advanced. Various display devices having excellent performance in terms of thinness, lightness, and low power consumption, are being developed correspondingly.

Among these various display devices, an organic light emitting display device is a self-light emitting display device, and can be manufactured to be light and thin since it does not require a separate light source, unlike a liquid crystal display device having a separate light source.

In addition, the organic light emitting display device has advantages in terms of power consumption due to a low voltage driving, and is excellent in terms of a color implementation, a response speed, a viewing angle, and a contrast ratio (CR). Therefore, organic light emitting display devices have been studied as the next generation displays.

SUMMARY OF THE INVENTION

The inventors of the present disclosure have recognized that current leakage can occur in a common layer that is formed as a single layer throughout a plurality of sub-pixels among organic layers of a light emitting element. A current leakage phenomenon can cause light emitting elements of unintended sub-pixels to emit light, which can lead to color mixing between the plurality of sub-pixels. Accordingly, the inventors of the present disclosure have developed a structure in which a current path is increased by disconnecting a common layer in a specific region to thereby decrease or minimize a leakage current.

However, the inventors of the present disclosure have recognized that the common layer and a cathode above the common layer are disconnected together, which in turn can cause a limitation of increasing resistance of the cathode. In particular, as a distance between the cathode and a low potential power supply line to which a low potential voltage is supplied increases, the resistance of the cathode increases, which can cause luminance unevenness, resulting in deterioration in display quality.

Accordingly, the inventors of the present disclosure have invented an improved display device capable of minimizing the occurrence of a leakage current and preventing/minimizing an increase in resistance of the cathode.

One or more limitations associated with the related art are addressed by the present disclosure, which provides a display device capable of including an open portion in which a common layer is disconnected by a concave portion on a side surface of an auxiliary electrode.

One or more limitations associated with the related art are also addressed by the present disclosure, which provides a display device capable of preventing a low potential voltage rising with a decrease in resistance of the cathode by electrically connecting the auxiliary electrode and the cathode in the concave portion of the auxiliary electrode.

In order to solve or address the above-described and other problems and limitations, according to an aspect of the present disclosure, a display device includes a substrate including a plurality of sub-pixels; a planarization layer disposed on the substrate and including a trench adjacent to the plurality of sub-pixels; a plurality of light emitting elements disposed in the plurality of sub-pixels and sharing an organic layer and a cathode; and an auxiliary electrode disposed in the trench and connected to the cathode. A side surface of the auxiliary electrode has a concave shape. The organic layer has an open portion that is disconnected by the auxiliary electrode.

According to another aspect of the present disclosure, a display device includes a substrate including a plurality of sub-pixels; a transistor disposed on the substrate; a planarization layer disposed on the transistor and including a trench adjacent to the plurality of sub-pixels; a plurality of light emitting elements disposed in the plurality of sub-pixels and sharing a common layer of an organic layer and a cathode; and an auxiliary electrode disposed in the trench and contacted with the cathode. The auxiliary electrode includes a first layer and a third layer including the same material; and a second layer disposed between the first layer and the third layer to have a width smaller than the first layer and the third layer, and including a material different from the first layer and the third layer. The common layer has an open portion that is disconnected by the auxiliary electrode.

The present disclosure can decrease current leakage through the common layer of the plurality of light emitting elements.

The present disclosure can prevent an increase in resistance of the cathode by the auxiliary electrode.

DETAILED DESCRIPTION OF THE EMBODIMENTS

When the position relation between two parts is described using the terms such as “on”, “above”, “below”, and “next”, one or more parts can be positioned between the two parts unless the terms are used with the term “immediately” or “directly”.

When an element or layer is disposed “on” another element or layer, the element or layer can be directly on the other element or layer, or another layer or another element can be interposed therebetween.

Although the terms “first”, “second”, and the like are used for describing various components, these components are not confined by these terms. These terms are merely used for distinguishing one component from the other components and may not define order. Therefore, a first component to be mentioned below can be a second component in a technical concept of the present disclosure.

Hereinafter, the present disclosure will be described in detail with reference to accompanying drawings.

FIG.1is a schematic configuration diagram of a light emitting display device100according to an exemplary embodiment of the present disclosure.FIG.1illustrates only a display panel PN, a gate driver GD, a data driver DD, and a timing controller TC among various components of a display device100, for convenience of description. Further, all the components of each of the light emitting display devices according too all embodiments of the present disclosure are operatively coupled and configured.

Referring toFIG.1, the display device100includes the display panel PN that includes a plurality of sub-pixels SP, the gate driver GD and the data driver DD that supply various signals to the display panel PN, and the timing controller TC that controls the gate driver GD and the data driver DD.

The gate driver GD supplies a plurality of scan signals to a plurality of scan lines SL according to a plurality of gate control signals GCS provided from the timing controller TC. AlthoughFIG.1illustrates that one gate driver GD is disposed to be spaced apart from one side of the display panel PN, but the gate driver GD can be disposed in a gate in panel (GIP) method, and the number and arrangement of the gate drivers GD are not limited thereto.

The data driver DD converts image data RGB input from the timing controller TC into a data signal using a reference gamma voltage according to a plurality of data control signals DCS provided from the timing controller TC. In addition, the data driver DD can supply the converted data signal to a plurality of data lines DL.

The timing controller TC aligns image data RGB input from the outside and supplies it to the data driver DD. The timing controller TC can generate the gate control signal GCS and the data control signal DCS using a synchronization signal SYNC input from the outside, for example, a dot clock signal, a data enable signal, and a horizontal/vertical synchronization signal. In addition, the timing controller TC can supply the generated gate control signal GCS and data control signal DCS to the gate driver GD and the data driver DD, respectively, to thereby control the gate driver GD and the data driver DD.

The display panel PN, a component for displaying an image to a user, includes the plurality of sub-pixels SP. In the display panel PN, the plurality of scan lines SL and the plurality of data lines DL cross each other, and each of the plurality of sub-pixels SP is connected to the scan line SL and the data line DL. Further, each of the plurality of sub-pixels SP can be connected to high potential power lines PL, low potential power lines, initialization signal lines IL, emission control signal lines EL, and the like.

The plurality of sub-pixels SP are a minimum unit constituting a screen, and each of the plurality of sub-pixels SP includes a light emitting element and a pixel circuit for driving the light emitting element. A plurality of light emitting elements can be differently defined according to a type of the display panel PN. For example, when the display panel PN is an organic light emitting display panel, the light emitting element is an organic light emitting element including an anode, an organic layer, and a cathode. In addition, a quantum dot light emitting diode (QLED) including a quantum dot (QD), or the like can be used as the light emitting element. Hereinafter, a description will be made on the assumption that the light emitting element is an organic light emitting element, but a type of the light emitting element is not limited thereto.

The pixel circuit is a circuit for controlling driving of the light emitting element. The pixel circuit can be configured to include a plurality of transistors and capacitors. For example, the pixel circuit can include six transistors and a single capacitor, but is not limited thereto.

Hereinafter, the plurality of sub-pixels SP of the display device100according to an exemplary embodiment will be described in more detail with reference toFIG.2toFIG.3B.

FIG.2is an enlarged plan view of the display device according to an exemplary embodiment of the present disclosure.FIG.3Ais a cross-sectional view taken along line III-III′ ofFIG.2.FIG.3Bis an enlarged cross-sectional view of region A ofFIG.3A.

Referring toFIG.2toFIG.3B, the display device100according to an exemplary embodiment of the present disclosure includes a substrate110, a buffer layer111, a gate insulating layer112, an interlayer insulating layer113, a planarization layer117, a bank119, the high potential power lines PL, auxiliary lines AL, the data lines DL, the plurality of scan lines SL, the initialization signal lines IL, the emission control signal lines EL, a transistor T1, an auxiliary electrode130, light emitting elements150, and a plurality of trenches TR.

FIG.2illustrates only an anode151among the plurality of lines PL, AL, DL, SL, IL, and EL, the trench TR of the planarization layer117, and components of the light emitting element150, for convenience of description.

Referring toFIG.2, the plurality of sub-pixels SP are individual units that emit light, and the light emitting element150is disposed in each of the plurality of sub-pixels SP. The plurality of sub-pixels SP include first sub-pixels SP1, second sub-pixels SP2, and third sub-pixels SP3 that emit light of different colors. For example, the first sub-pixel SP1 can be a blue sub-pixel SP, the second sub-pixel SP2 can be a green sub-pixel SP, and the third sub-pixel SP3 can be a red sub-pixel SP. In this specification, although it has been described that the plurality of sub-pixels SP include the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3, the number and/or arrangement and/or color combinations/schemes of the plurality of sub-pixels SP can be variously changed according to a design, need or preference, but are not limited thereto. Further, the size and/or shape of the first subpixels SP1 can be different from those of the second and/or third subpixels SP2, SP3.

A plurality of the first sub-pixels SP1 and a plurality of the third sub-pixels SP3 can be alternately disposed in the same column or in the same row. For example, the first sub-pixels SP1 and the third sub-pixels SP3 can be alternately disposed in the same column, and the first sub-pixels SP1 and the third sub-pixels SP3 can be alternately disposed in the same row.

A plurality of the second sub-pixels SP2 are disposed in different columns and different rows from those of the plurality of first sub-pixels SP1 and the plurality of third sub-pixels SP3. For example, the plurality of second sub-pixels SP2 are disposed in one row, and the plurality of first sub-pixels SP1 and the plurality of third sub-pixels SP3 can be alternately disposed in another row adjacent to the one row. In addition, the plurality of second sub-pixels SP2 can be disposed in one column, and the plurality of first sub-pixels SP1 and the plurality of third sub-pixels SP3 can be alternately disposed in another column adjacent to the one column. The plurality of first sub-pixels SP1 and the plurality of second sub-pixels SP2 can face each other in a diagonal direction, and the plurality of third sub-pixels SP3 and the plurality of second sub-pixels SP2 can also face each other in a diagonal direction. Accordingly, the plurality of sub-pixels SP can be disposed in a lattice shape.

A plurality of the high potential power lines PL extending in a column direction are disposed between each of the plurality of sub-pixels SP. The plurality of high potential power lines PL are lines that transmit high potential power signals to each of the plurality of sub-pixels SP. The high potential power line PL can be disposed between a column in which the plurality of second sub-pixels SP2 are disposed and a column in which the plurality of first sub-pixels SP1 and the plurality of third sub-pixels SP3 are disposed. For example, the high potential power lines PL can be disposed on both sides of the plurality of second sub-pixels SP2 and can be disposed on both sides of the plurality of first sub-pixels SP1 and the plurality of third sub-pixels SP3.

A plurality of the auxiliary lines AL extending in the column direction in the same manner as the plurality of high potential power lines PL are disposed. The plurality of auxiliary lines AL can be disposed adjacent to the plurality of high potential power lines PL or the plurality of the data lines DL. A portion of the plurality of auxiliary lines AL can be disposed to overlap the plurality of second sub-pixels SP2 that are disposed in the same column, and another portion of the plurality of auxiliary lines AL can be disposed to overlap the plurality of first sub-pixels SP1 and the plurality of third sub-pixels SP3 that are disposed in the same column. The plurality of auxiliary lines AL can be lines that are connected to the low potential power lines and transmit low potential power signals to the auxiliary electrode130.

The plurality of data lines DL extending in the column direction in the same manner as the plurality of high potential power lines PL and the plurality of auxiliary lines AL are disposed. The plurality of data lines DL are lines that transmit data signals to each of the plurality of sub-pixels SP. The plurality of data lines DL can be disposed adjacent to the plurality of auxiliary lines AL. A portion of the plurality of data lines DL can be disposed to overlap the plurality of second sub-pixels SP2 disposed in the same column, and another portion of the plurality of data lines DL can be disposed to overlap the plurality of first sub-pixels SP1 and the plurality of third sub-pixels SP3 disposed in the same column.

A plurality of the initialization signal lines IL extending in a row direction are disposed between each of the plurality of sub-pixels SP. The plurality of initialization signal lines IL are lines that transmit initialization signals to each of the plurality of sub-pixels SP. The initialization signal line IL can be disposed between a row in which the plurality of second sub-pixels SP2 are disposed and a row in which the plurality of first sub-pixels SP1 and the plurality of third sub-pixels SP3 are disposed. For example, the initialization signal lines IL can be disposed on both sides of the plurality of second sub-pixels SP2 and can be disposed on both sides of the plurality of first sub-pixels SP1 and the plurality of third sub-pixels SP3.

The plurality of scan lines SL extending in the row direction are disposed between each of the plurality of initialization signal lines IL. The plurality of scan lines SL are lines that transmit scan signals to each of the plurality of sub-pixels SP. The plurality of scan lines SL include a plurality of first scan lines SL1 and a plurality of second scan lines SL2. The first scan line SL1 can be disposed to overlap the plurality of second sub-pixels SP2, and the second scan line SL2 can be disposed to overlap the plurality of first sub-pixels SP1 and the plurality of third sub-pixels SP3.

A plurality of the emission control signal lines EL extending in the row direction in the same manner as the plurality of initialization signal lines IL and the plurality of scan lines SL are disposed. The plurality of emission control signal lines EL are lines that transmit emission control signals to each of the plurality of sub-pixels SP. The plurality of emission control signal lines EL can be disposed adjacent to the plurality of first scan lines SL1 or the plurality of initialization signal lines IL. The plurality of emission control signal lines EL can be disposed to overlap each of the second sub-pixels SP2.

In this specification, it is illustrated that a portion of the plurality of lines is disposed between the plurality of sub-pixels SP, and the other (or another) portion of the plurality of lines overlap the plurality of sub-pixels SP, but the arrangement of the plurality of lines is not limited thereto. In addition, the number and/or arrangement order of the plurality of lines described in this specification can be variously changed according to a design, need or preference.

The auxiliary electrode130is disposed in some areas of the plurality of auxiliary lines AL. The auxiliary electrode130can be defined as an area having a width greater than that of the auxiliary line AL. The auxiliary electrode130can be integrally formed with the auxiliary line AL. Accordingly, a low potential power signal can be applied to the auxiliary electrode130. The auxiliary electrode130can be exposed to the outside of the planarization layer117to be described later by the trench TR. The auxiliary electrode130can be disposed to be spaced apart from the plurality of sub-pixels SP. InFIG.2, it is illustrated that the auxiliary electrodes130are adjacent to the plurality of sub-pixels SP and correspond to each of the plurality of sub-pixels SP, but the number and positions of the auxiliary electrodes130can be variously changed according to a design, need or preference.

The auxiliary electrodes130can minimize a phenomenon in which a leakage current from a plurality of the light emitting elements150can flow to other sub-pixels SP, and at the same time, can prevent low potential voltage rising (VSS rising), which can occur in a cathode153. This will be described in more detail with reference toFIGS.3A and3B.

Referring toFIG.3A, the substrate110, a support member for supporting other components of the display device100, can be formed of an insulating material. For example, the substrate110can be formed of glass or resin. Further, the substrate110can be formed of a polymer or plastic such as polyimide (PI), or can be formed of a material having flexibility.

The buffer layer111is disposed on the substrate110. The buffer layer111can reduce penetration of moisture or impurities through the substrate110. The buffer layer111can be comprised of, for example, a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto. However, the buffer layer111can be omitted depending on a type of the substrate110or a type of the transistor T1, but is not limited thereto.

The transistor T1 is disposed on the buffer layer111. The transistor T1 includes an active layer121, a gate electrode122, a source electrode123, and a drain electrode124.

The active layer121is disposed on the buffer layer111. The active layer121can be formed of a semiconductor material such as an oxide semiconductor, amorphous silicon, or polysilicon, but is not limited thereto. For example, when the active layer121is formed of an oxide semiconductor, the active layer121includes a channel region, a source region, and a drain region, and the source region and the drain region can be conductive regions, but are not limited thereto.

The gate insulating layer112is disposed on the active layer121. The gate insulating layer112is an insulating layer for insulating the active layer121and the gate electrode122, and can be comprised of a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto.

The gate electrode122is disposed on the gate insulating layer112. The gate electrode122can be formed of a conductive material, for example, copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or an alloy thereof, but is not limited thereto.

The interlayer insulating layer113is disposed on the gate electrode122. Contact holes for connecting the source electrode123and the drain electrode124to the active layer121are formed in the interlayer insulating layer113. The interlayer insulating layer113can be configured of a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto.

The source electrode123and the drain electrode124are disposed on the interlayer insulating layer113. The source electrode123and the drain electrode124can be spaced apart from each other to be electrically connected to the active layer121. The source electrode123and the drain electrode124can be configured as a multilayer. For example, the source electrode123can include a first layer123a, a second layer123b, and a third layer123c. In this case, side surfaces of the first layer123a, the second layer123b, and the third layer123cof the source electrode123can be disposed on the same line. The drain electrode124can include a first layer124a, a second layer124b, and a third layer124c. In this case, the first layer124a, the second layer124b, and the third layer124cof the drain electrode124can be disposed on the same line.

The first layer123aof the source electrode123and the first layer124aof the drain electrode124can be formed of the same conductive material by the same process. The second layer123bof the source electrode123and the second layer124bof the drain electrode124can be formed of the same conductive material by the same process. The third layer123cof the source electrode123and the third layer124cof the drain electrode124can be formed of the same conductive material by the same process. More specifically, the first layers123aand124aand the third layers123cand124cof each of the source electrode123and the drain electrode124include the same material, and the second layers123band124bof each of the source electrode123and the drain electrode124include a material different from that of the first layers123aand124aand the third layers123cand124c. For example, the first layers123aand124aand the third layers123cand124ccan include titanium (Ti), and the second layers123band124bcan include aluminum (Al).

The high potential power line PL is disposed on the interlayer insulating layer113. The high potential power line PL can be disposed on the same layer as the source electrode123and the drain electrode124. The high potential power line PL can be formed of the same conductive material by the same process as the source electrode123and the drain electrode124. For example, the high potential power line PL includes a first layer, a second layer, and a third layer that correspond to the first layers123aand124a, the second layers123band124b, and the third layers123cand124cof the source electrode123and the drain electrode124, respectively. Side surfaces of the first layer, the second layer, and the third layer of the high potential power line PL can be disposed on the same line. However, a position and a structure of the high potential power line PL described herein can be variously changed according to a design, need or preference.

Meanwhile, the auxiliary line AL and the data line DL can be disposed on the same layer as the source electrode123and the drain electrode124. For example, the auxiliary line AL and the data line DL can be formed of the same conductive material on the interlayer insulating layer113by the same process as the source electrode123and the drain electrode124, and the auxiliary line AL and the data line DL each includes a first layer, a second layer, and a third layer that correspond to the first layers123aand124a, the second layers123band124b, and the third layers123cand124cof the source electrode123and the drain electrode124, respectively, but are not limited thereto.

A passivation layer can be disposed on the source electrode123and the drain electrode124. The passivation layer is an insulating layer for protecting components under the passivation layer. The passivation layer can be configured of a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto.

The planarization layer117is disposed on the source electrode123and the drain electrode124. The planarization layer117is an insulating layer that flattens an upper portion of the substrate110. The planarization layer117can be formed of an organic material, for example, comprised of a single layer or multilayers of polyimide or photoacryl, but is not limited thereto.

The trench TR is formed in the planarization layer117. The trench TR can be disposed in a region corresponding to the auxiliary electrode130. The trench TR can have a shape in which a width thereof is narrower downward. For example, the trench TR is formed by removing a portion of the planarization layer117, and a portion of an upper surface of the interlayer insulating layer113under the planarization layer117can be exposed in the trench TR. In addition, the auxiliary electrode130can be exposed to the outside of the planarization layer117by the trench TR.

The auxiliary electrode130is disposed inside the trench TR. The auxiliary electrode130can be integrally formed with the auxiliary line AL. Accordingly, the auxiliary electrode130can be disposed on the same layer as the source electrode123and the drain electrode124. For example, the auxiliary electrode130can be formed of the same conductive material on the interlayer insulating layer113by the same process as the source electrode123and the drain electrode124. The auxiliary electrode130can include a first layer131, a second layer132, and a third layer133that correspond to the first layers123aand124a, the second layers123band124b, and the third layers123cand124cof the source electrode123and the drain electrode124, respectively.

Specifically, referring toFIG.3B, the auxiliary electrode130includes the first layer131, the second layer132, and the third layer133. Here, the first layer131of the auxiliary electrode130can correspond to the first layer123aof the source electrode123or the first layer124aof the drain electrode124. The second layer132of the auxiliary electrode130can correspond to the second layer123bof the source electrode123or the second layer124bof the drain electrode124. The third layer133of the auxiliary electrode130can correspond to the third layer123cof the source electrode123or the third layer124cof the drain electrode124. The first layer131of the auxiliary electrode130can include the same material as the third layer133of the auxiliary electrode130, and the second layer132of the auxiliary electrode130can include a material different from that of the first layer131and the third layer133of the auxiliary electrode130. For example, the first layer131and the third layer133of the auxiliary electrode130can include titanium (Ti), and the second layer132of the auxiliary electrode130can include aluminum (Al).

The second layer132of the auxiliary electrode130has a width smaller than those of the first layer131and the third layer133. Accordingly, a side surface of the auxiliary electrode130can have a concave shape. A concave portion of the auxiliary electrode130can mean a groove formed to be concave inwardly than ends of the first layer131and the third layer133by removing a portion of the second layer132. Specifically, before the planarization layer117is formed, the first layer131, the second layer132, and the third layer133of the auxiliary electrode130can all have the same width. Thereafter, a portion of the second layer132can be removed along with the planarization layer117in a process of forming the trench TR in the planarization layer117. In addition, when a material for forming the anode151is formed on a front surface of the substrate110and the anode151is patterned to correspond to each of the plurality of sub-pixels SP, a portion of the second layer132can be removed along with the material for forming the anode151. For example, the second layer132including aluminum (Al) is partially removed in etching the material for forming the anode151and the planarization layer117, and the first layer131and the third layer133including titanium (Ti) can not be removed or can be removed less than the second layer132. In ends of the auxiliary electrode130, a portion of an upper surface of the first layer131and a portion of a lower surface of the third layer133can be exposed by the concave portion.

Referring toFIGS.3A and3B, the auxiliary electrode130can be disposed in the trench TR and exposed by the planarization layer117. On the other hand, the source electrode123and the drain electrode124formed simultaneously with the auxiliary electrode130can be covered by the planarization layer117. Accordingly, a concave portion can be formed in the auxiliary electrode130that is exposed by the planarization layer117by a process of forming the trench TR and the anode151. On the other hand, a concave region may not be formed in the source electrode123and the drain electrode124that are covered by the planarization layer117. Accordingly, side surfaces of the first layer123a, the second layer123b, and the third layer123cof the source electrode123can be disposed on the same line; and side surfaces of the first layer124a, the second layer124b, and the third layer124cof the drain electrode124can be disposed on the same line.

The plurality of light emitting elements150are disposed in each of the plurality of sub-pixels SP on the planarization layer117. The light emitting element150includes the anode151, an organic layer152and a cathode153.

The anode151is disposed on the planarization layer117. The anode151can be electrically connected to the transistor T1 and receive a driving current of the pixel circuit. Since the anode151supplies holes to the organic layer152, it can be formed of a conductive material having a high work function. The anode151can be formed of, for example, a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), but is not limited thereto.

Meanwhile, the display device100can be implemented in a top emission method or a bottom emission method. In the case of a top emission method, a metallic material having excellent reflection efficiency, for example, a reflective layer formed of a material such as aluminum (Al) or silver (Ag), can be added under the anode151so that light emitted from the organic layer152is reflected onto the anode151and directed upwardly, for example, toward the cathode153. On the other hand, when the display device100is a bottom emission type, the anode151can be formed of only a transparent conductive material. Hereinafter, a description will be made on the assumption that the display device100according to an exemplary embodiment is a top emission type, but the present disclosure is not limited thereto.

The bank119is disposed on the anode151and the planarization layer117. The bank119is an insulating layer disposed between the plurality of sub-pixels SP to distinguish the plurality of sub-pixels SP. The bank119includes an opening exposing a portion of the anode151. The bank119can be an organic insulating material disposed to cover an edge or an end portion of the anode151. The bank119can be formed of, for example, polyimide, acrylic, or benzocyclobutene (BCB)-based resin, but is not limited thereto.

The organic layer152is disposed on the anode151, the bank119, the trench TR and the auxiliary electrode130. The organic layer152includes a light emitting layer and a common layer.

The light emitting layer is the organic layer152for emitting light of a specific color. Different light emitting layers can be disposed in each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3, or the same light emitting layer can be disposed in all of the plurality of sub-pixels SP. For example, when different light emitting layers are disposed in each of the plurality of sub-pixels SP, a blue light emitting layer is disposed in the first sub-pixel SP1, a green light emitting layer is disposed in the second sub-pixel SP2, and a red light emitting layer can be disposed in the third sub-pixel SP3. Further, the light emitting layers of the plurality of sub-pixels SP can be connected to each other to form a single layer over the plurality of sub-pixels SP. For example, a light emitting layer is disposed on the entirety of the plurality of sub-pixels SP, and light from the light emitting layer can be converted into light of various colors through a separate light conversion layer or color filter.

In addition, a plurality of light emitting layers that emit light of the same color can be stacked in one sub-pixel SP. For example, two blue light emitting layers can be stacked in the first sub-pixel SP1, two green light emitting layers can be stacked in the second sub-pixel SP2, and two red light emitting layers can be stacked in the third sub-pixel SP3. In this case, a charge generation layer CGL is disposed between each of the plurality of light emitting layers, so that electrons or holes can be smoothly supplied to each of the plurality of light emitting layers. For example, a charge generation layer can be disposed between two blue light emitting layers, between two green light emitting layers, and between two red light emitting layers.

In addition, a plurality of light emitting layers that emit light of different colors can be stacked in one sub-pixel SP. For example, a blue light emitting layer and a red-green light emitting layer can be stacked in all of the plurality of sub-pixels SP, so that white light can be implemented in all of the plurality of sub-pixels SP. In this case, a charge generation layer can be disposed between the blue light emitting layer and the red-green light emitting layer.

The common layer is the organic layer152that is disposed to improve luminous efficiency of the light emitting layer. The common layer can be formed as a single layer over the plurality of sub-pixels SP. For example, the common layers of each of the plurality of sub-pixels SP can be connected to each other and formed integrally. The common layer can include the above-described charge generation layer, a hole injection layer, a hole transport layer, an electron transport layer, an electron injection layer, and the like, but is not limited thereto.

The cathode153is disposed on the organic layer152. Since the cathode153supplies electrons to the organic layer152, it can be formed of a conductive material having a low work function. The cathode153can be formed as a single layer over the plurality of sub-pixels SP. For example, the cathodes153of each of the plurality of sub-pixels SP can be connected to each other and formed integrally. The cathode153can be formed of, for example, a transparent conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), or an ytterbium (Yb) alloy, and can further include a metal-doped layer, but is not limited thereto. Meanwhile, the cathode153can be electrically connected to the low potential power line disposed in a peripheral portion of the substrate110and receive a low potential power signal.

Meanwhile, the organic layer152and the cathode153that are each formed as a single layer over the plurality of sub-pixels SP can be partially separated in the trench TR. In other words, the common layer of the organic layer152and the cathode153can include an open portion that disconnected by the auxiliary electrode130. Here, the open portion can be defined as a portion where the organic layer152and the cathode153are not continuously formed but are disconnected by the auxiliary electrode130in the trench TR.

Specifically, referring toFIG.3B, the side surface of the auxiliary electrode130can include a concave portion. For example, the second layer132has a width smaller than those of the first layer131and the third layer133, so that the ends of the first layer131and the third layer133protrude more than an end of the second layer132. In addition, when the organic layer152including the common layer and the cathode153are formed, it can be difficult to form the organic layer152and the cathode153on an entire surface of the concave portion due to the protruding third layer133. In other words, a portion of a lower surface of the third layer133constituting the concave portion, a side surface of the second layer132and a portion of an upper surface of the first layer131can be covered by the protruding third layer133. Accordingly, it can be difficult to deposit the organic layer152and the cathode153on the entire surface of the concave portion, and at least one of the organic layer152and the cathode153can include an open portion disconnected by the auxiliary electrode130.

At least the common layer of the organic layer152of the plurality of light emitting elements150is formed as a single layer over the plurality of sub-pixels SP. At this time, since the light emitting elements150of the plurality of sub-pixels SP are formed in a structure that shares the common layer, when the light emitting element150of a specific sub-pixel SP emits light, a phenomenon in which a current flows to the light emitting elements150of sub-pixels SP adjacent to the specific sub-pixel SP, for example, a current leakage phenomenon, can occur.

The current leakage phenomenon can cause the light emitting elements150of unintended sub-pixels SP to emit light, which can lead to color mixing between the plurality of sub-pixels SP, and increase power consumption. In addition, color abnormalities and spots can be visually recognized due to a leakage current, and display quality can be deteriorated. For example, when only the first sub-pixel SP1 of the plurality of sub-pixels SP emits light, a portion of a current that is supplied to drive the light emitting element150of the first sub-pixel SP1 can lead to the adjacent second sub-pixel SP2 and the third sub-pixel SP3 through the common layer.

Accordingly, in the display device100according to an exemplary embodiment of the present disclosure, the auxiliary electrode130can be disposed to minimize a leakage current through the common layer of the light emitting element150. Since the auxiliary electrode130includes a concave portion on the side surface thereof, at least a portion of the common layer, which is a path of a leakage current, can be separated. Therefore, a phenomenon in which the leakage current can flow to the adjacent sub-pixel SP can be minimized. Specifically, the common layer, which is a path through which the leakage current flows, is disconnected by the auxiliary electrode130, so that the leakage current can flow with bypassing the auxiliary electrode130, and a length of the path through which the leakage current flows can be increased. Accordingly, since resistance increases as the length of the path through which the leakage current flows increases, a phenomenon in which the leakage current can flow to the adjacent sub-pixel SP can be minimized. Accordingly, in the display device100according to an exemplary embodiment of the present disclosure, visual recognition of color abnormalities or spots due to a leakage current can be minimized, and display quality of the display device100can be improved.

The display device100according to an exemplary embodiment of the present disclosure does not require a separate process for forming the concave portion of the auxiliary electrode130. Specifically, the first layer131and the third layer133of the auxiliary electrode130include titanium, and the second layer132includes aluminum. A portion of the second layer132can be removed, so that the second layer132can be formed to be concave inwardly than ends of the first layer131and the third layer133. In this case, the concave portion of the auxiliary electrode130can be formed by removing a portion of the second layer132including aluminum together with the planarization layer117when the trench TR of the planarization layer117is formed. In addition, the concave portion of the auxiliary electrode130can be formed by removing a portion of the second layer132including aluminum together with a material for forming the anode151outside the plurality of sub-pixels SP, when the anode151is patterned. For example, the concave portion of the auxiliary electrode130can be naturally generated in etching the material for forming the anode151and the planarization layer117. Accordingly, the concave portion is formed through the same process as an existing one without a separate additional process, and the common layer is disconnected, thereby minimizing the occurrence of a leakage current.

Meanwhile, inFIG.3B, both the organic layer152and the cathode153are illustrated to be separated by the auxiliary electrode130. However, according to a formation method of the organic layer152and the cathode153, only the organic layer152can be disconnected by the auxiliary electrode130and the cathode153can be connected, and the present disclosure is not limited thereto.

In general, a material for forming the organic layer152does not have excellent step coverage compared to a material for forming the cathode153. Accordingly, the organic layer152can hardly be deposited in the concave portion of the auxiliary electrode130. For example, since surfaces of the concave portion are covered by the protruding portion of the third layer133, the organic layer152can be hardly formed in the concave portion. On the other hand, the cathode153can be deposited by extending inwardly of the concave portion of the auxiliary electrode130, compared to the organic layer152. For example, the organic layer152can be disposed to finely cover an edge portion of the upper surface of the first layer131from an upper surface of the interlayer insulating layer113. Alternatively, the organic layer152can be disposed only on the upper surface of the interlayer insulating layer113. The cathode153can extend inwardly of the disconnected open portion of the organic layer152from the upper surface of the organic layer152and come into contact with the upper surface of the first layer131. In addition, the cathode153can extend to contact the side surface of the second layer132or can extend to entirely cover an outer surface of the auxiliary electrode130without a disconnected portion, according to a design, need or preference, but is not limited thereto.

The auxiliary electrode130can be electrically connected to the cathode153in the trench TR. The auxiliary electrode130can extend from the auxiliary line AL that is connected to the low potential power line and receive a low potential power signal. For example, the auxiliary electrode130can apply a low potential voltage VSS, which is a low potential power signal, to the cathode153. Accordingly, a phenomenon in which the low potential voltage applied to the cathode153can rise due to an increase in the resistance of the cathode153can be prevented.

Specifically, the cathode153can be connected to the low potential power line disposed in a peripheral portion of the substrate110and receive a low potential voltage, which is a low potential power signal. The cathodes153of the plurality of light emitting elements150are formed as a single layer over the plurality of sub-pixels SP. In addition, when the cathode153is formed of a transparent conductive material or a thin metal layer, the cathode153has a higher resistance than other electrodes. Accordingly, as a distance from the low potential power line increases, electrical resistance of the cathode153can increase. For example, the resistance of the cathode153increases from an outer side toward a central portion of the cathode153, and a low potential voltage rise phenomenon can occur in the central portion of the cathode153. In addition, a region in which a potential difference between the cathode153and the anode151decreases due to an increase in voltage of the cathode153can occur, causing non-uniformity in luminance of the display device100to thereby degrade display quality.

Accordingly, in the display device100according to an exemplary embodiment, the auxiliary electrode130that is in contact with the cathode153can be disposed to thereby additionally apply a low potential voltage to the cathode153. For example, the auxiliary electrode130can be disposed to thereby lower the electrical resistance of the cathode153. Accordingly, an increase in the low potential voltage applied to the cathode153is minimized, and a more uniform low potential voltage can be applied to the cathode153. In addition, the potential difference between the cathode153and the anode151is kept constant, so that a voltage drop can be minimized. Thus, the luminance of the display device100can be uniform, and display quality can be improved.

FIG.4is a cross-sectional view of a display device according to another exemplary embodiment of the present disclosure. With the exception that a display device400ofFIG.4further includes a lower planarization layer417, an upper planarization layer418, and a connection electrode440, and positions of the trench TR and the auxiliary electrode130are different from those in the display device100ofFIGS.3Aand3B, other components of the display device400inFIG.4are substantially identical to those of the display device100inFIGS.3A and3B, and thus, redundant descriptions are omitted or may be provided briefly.

Referring toFIG.4, the transistor T1 including the active layer121, the gate electrode122, a source electrode423, and a drain electrode424is disposed on the substrate110. The source electrode423and the drain electrode424can be comprised of a single layer or multiple layers of a conductive metal such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof, but is not limited thereto.

The lower planarization layer417is disposed on the transistor T1. The lower planarization layer417is an insulating layer that flattens the upper portion of the substrate110on which the transistor T1 or the like is disposed. Contact holes for connecting the transistor T1 and the connection electrode440are formed in the lower planarization layer417. The lower planarization layer417can be formed of an organic material, and can be configured of a single layer or multiple layers of, for example, polyimide or photoacryl, but is not limited thereto.

The auxiliary electrode130is disposed on the lower planarization layer417. The auxiliary electrode130includes the first layer131, the second layer132, and the third layer133. The auxiliary electrode130can include a concave portion from which a portion of the second layer132is removed by a process of forming the trench TR and the anode151. The first layer131of the auxiliary electrode130can include the same material as the third layer133thereof, and the second layer132of the auxiliary electrode130can include a material different from those of the first layer131and the third layer133. For example, the first layer131and the third layer133can include titanium (Ti), and the second layer132can include aluminum (Al).

The connection electrode440is disposed on the lower planarization layer417. The connection electrode440can be connected to the drain electrode424or the source electrode423of the transistor T1 through the contact hole of the lower planarization layer417. The connection electrode440can be connected between the transistor T1 and the light emitting element150and reduce electrical resistance between the transistor T1 and the light emitting element150.

The connection electrode440can be disposed on the same layer as the auxiliary electrode130. For example, the connection electrode440can be formed of the same conductive material by the same process as the auxiliary electrode130on the lower planarization layer417. The connection electrode440can include a first layer441, a second layer442, and a third layer443. The first layer441, the second layer442, and the third layer443of the connection electrode440correspond to the first layer131, the second layer132, and the third layer133of the auxiliary electrode130, respectively. For example, the first layer441and the third layer443can include the same material, and the second layer442can include a material different from those of the first layer441and the third layer443. For example, the first layer441and the third layer443can include titanium (Ti), and the second layer442can include aluminum (Al).

Side surfaces of the first layer441, the second layer442, and the third layer443of the connection electrode440can be disposed on the same line. For example, the first layer441, the second layer442, and the third layer443can have the same width. Alternatively, widths of the first layer441, the second layer442, and the third layer443can decrease in the order of the first layer441, the second layer442, and the third layer443.

The upper planarization layer418is disposed on the lower planarization layer417and the connection electrode440. The upper planarization layer418is an insulating layer that flattens the upper portion of the substrate110on which the connection electrode440or the like is disposed. A contact hole for connecting the connection electrode440and the anode151of the light emitting element150is formed in the upper planarization layer418. The upper planarization layer418can be formed of an organic material, for example, a single layer or multilayers of polyimide or photoacryl, but is not limited thereto.

The trench TR is formed in the upper planarization layer418. The trench TR can be disposed in a region corresponding to the auxiliary electrode130. The trench TR can have a shape in which a width thereof is narrower downward. For example, the trench TR is formed by removing a portion of the upper planarization layer418, and a portion of an upper surface of the lower planarization layer417under the upper planarization layer418can be exposed in the trench TR. In addition, the auxiliary electrode130can be exposed to the outside of the upper planarization layer418by the trench TR.

The auxiliary electrode130can be disposed in the trench TR and exposed by the upper planarization layer418. On the other hand, the connection electrode440formed simultaneously with the auxiliary electrode130can be covered by the upper planarization layer418. Accordingly, a concave portion can be formed in the auxiliary electrode130that is exposed by the upper planarization layer418by a process of forming the trench TR and the anode151. On the other hand, a concave region may not be formed in the connection electrode440that is covered by the upper planarization layer418. Thus, side surfaces of the first layer441, the second layer442, and the third layer443of the connection electrode440can be disposed on the same line.

In the display device400according to another exemplary embodiment of the present disclosure, the planarization layer can include a lower planarization layer417and an upper planarization layer418. Accordingly, a space for additional electrodes or lines can be provided between the lower planarization layer417and the upper planarization layer418. Thus, design restrictions on electrodes and lines in a limited space can be improved.

The display device400according to another exemplary embodiment of the present disclosure can include the connection electrode440formed on the same layer as the auxiliary electrode130by the same process. The connection electrode440can be connected between the transistor T1 and the light emitting element150and reduce electrical resistance between the transistor T1 and the light emitting element150.

FIG.5is a cross-sectional view of a display device according to still another exemplary embodiment of the present disclosure. Other components of a display device500inFIG.5are substantially identical to those of the display device400inFIG.4, except for a groove517aof a lower planarization layer517, and thus, redundant descriptions may be omitted or may be briefly provided.

Referring toFIG.5, the lower planarization layer517includes the groove517a. The groove517acan be formed to have a predetermined depth from an upper surface toward a lower surface of the lower planarization layer517. The groove517acan be disposed in a region corresponding to an end of the auxiliary electrode130in the trench TR. For example, a portion of the groove517acan overlap the end of the auxiliary electrode130. In addition, the lower surface of the first layer131of the auxiliary electrode130can be partially exposed by the groove517a.

The common layer of the organic layer152and the cathode153of the light emitting element150can include an open portion that is disconnected by the groove517aand the auxiliary electrode130. Alternatively, only the organic layer152can be disconnected by the groove517a, and the cathode153can extend to cover both surfaces of the groove517aand the auxiliary electrode130, but is not limited thereto.

Specifically, the first layer131of the auxiliary electrode130can cover a portion of the groove517a. For example, the end of the first layer131can protrude toward an upper portion of the groove517afrom the upper surface of the lower planarization layer517. Accordingly, a portion of the groove517ain the trench TR can be covered by the first layer131and a remaining portion thereof can be opened. Since a portion of an inner surface of the groove517ais covered by the first layer131, it can be difficult to deposit the organic layer152and the cathode153on an entire surface of the groove517a. Accordingly, the organic layer152and the cathode153can include an open portion that is disconnected by the groove517a.

In the display device500according to another exemplary embodiment of the present disclosure, the common layer of the organic layer152can be disconnected by the groove517aof the lower planarization layer517that overlaps the end of the auxiliary electrode130. Particularly, by the groove517a, one portion of the common layer can be deposited on the groove517aunder the auxiliary electrode130, and the other portion thereof can be deposited on the third layer133of the auxiliary electrode130. Accordingly, a separation distance between the common layer disposed under the auxiliary electrode130and the common layer disposed above the auxiliary electrode130can be further increased. Accordingly, a separation of the common layer can be more effectively performed in the trench TR by the groove517a. In addition, since the common layer is disconnected, a leakage current generated by the common layer is minimized, thereby preventing color abnormalities or spots of the display device400from being visually recognized.

The display device500according to another exemplary embodiment of the present disclosure includes the auxiliary electrode130for applying a low potential voltage to the cathode153. The cathode153can be electrically connected to the auxiliary electrode130. Specifically, the cathode153can extend into the groove517aon the organic layer152and come into contact with the lower surface of the first layer131of the auxiliary electrode130. Alternatively, the cathode153can extend from an inside of the groove517ato come into contact with a portion of the upper surface of the first layer131of the auxiliary electrode130. The auxiliary electrode130additionally applies a low potential voltage to the cathode153, thereby minimizing an increase in a low potential voltage and a voltage drop of the cathode153. Accordingly, since the luminance of the display device500becomes uniform, display quality can be improved.

FIG.6is a cross-sectional view of a display device according to still another exemplary embodiment of the present disclosure. Other components of a display device600inFIG.6are substantially identical to those of the display device400inFIG.4, except for the transistor T1, the auxiliary electrode130, an additional auxiliary electrode630, and the trench TR, and thus, redundant descriptions may be omitted or may be provided briefly.

Referring toFIG.6, the transistor T1 including the active layer121, the gate electrode122, the source electrode123, and the drain electrode124is disposed on the substrate110. For example, the transistor T1 of the display device500according to still another exemplary embodiment of the present disclosure can be configured in the same manner as the transistor T1 ofFIG.3A.

The trench TR is formed in a lower planarization layer617and an upper planarization layer618. The trench TR can have a shape in which a width thereof is narrower downward. For example, the trench TR is formed by removing portions of the lower planarization layer617and the upper planarization layer618, and a portion of the upper surface of the interlayer insulating layer113can be exposed in the trench TR. The trench TR can be disposed in a region corresponding to the auxiliary electrode130and the additional auxiliary electrode630. The auxiliary electrode130and the additional auxiliary electrode630can be exposed to the outside of the lower planarization layer617and the upper planarization layer618by the trench TR.

The auxiliary electrode130is disposed on the interlayer insulating layer113in the trench TR. The auxiliary electrode130can be disposed on the same layer as the source electrode123and the drain electrode124. For example, the auxiliary electrode130can be formed of the same conductive material on the interlayer insulating layer113by the same process as the source electrode123and the drain electrode124. The auxiliary electrode130can include the first layer131, the second layer132, and the third layer133that correspond to the first layers123aand124a, the second layers123band124b, and the third layers123cand124cof the source electrode123and the drain electrode124, respectively. The first layer131of the auxiliary electrode130can include the same material as the third layer133thereof, and the second layer132of the auxiliary electrode130can include a material different from those of the first layer131and the third layer133. For example, the first layer131and the third layer133of the auxiliary electrode130can include titanium (Ti), and the second layer132of the auxiliary electrode130can include aluminum (Al).

The auxiliary electrode130can include a concave portion from which a portion of the second layer132is removed by a process of forming the trench TR and the anode151. Specifically, a portion of the second layer132can be removed together with the lower planarization layer617in a process of forming the trench TR of the lower planarization layer617. Also, a portion of the second layer132can be removed together with the upper planarization layer618in a process of forming the trench TR of the upper planarization layer618. Also, a portion of the second layer132can be removed together with a material for forming the anode151during patterning of the anode151.

The additional auxiliary electrode630is disposed on the auxiliary electrode130in the trench TR. The additional auxiliary electrode630can be electrically connected to the auxiliary electrode130. The additional auxiliary electrode630can be formed of the same conductive material by the same process as the connection electrode440after forming the trench TR of the lower planarization layer617. In addition, the additional auxiliary electrode630can be configured substantially the same as the auxiliary electrode130. Specifically, the additional auxiliary electrode630can include a first layer631, a second layer632, and a third layer633. At this time, the first layer631, the second layer632, and the third layer633of the additional auxiliary electrode630can correspond to the first layer441, the second layer442and the third layer443of the connection electrode440, respectively. In addition, the first layer631, the second layer632, and the third layer633of the additional auxiliary electrode630can correspond to the first layer131, the second layer132, and the third layer133of the auxiliary electrode130, respectively. For example, the first layer631of the additional auxiliary electrode630can include the same material as the third layer633thereof, and the second layer632of the additional auxiliary electrode630can include a material different from those of the first layer631and the third layer633thereof. For example, the first layer631and the third layer633of the additional auxiliary electrode630can include titanium (Ti), and the second layer632of the additional auxiliary electrode630can include aluminum (Al).

The second layer632of the additional auxiliary electrode630has a width smaller than those of the first layer631and the third layer633. Accordingly, a side surface of the additional auxiliary electrode630can include a concave portion. The concave portion of the additional auxiliary electrode630can mean a groove that is formed to be concave inwardly than ends of the first layer631and the third layer633by removing a portion of the second layer632. Specifically, before the upper planarization layer618is formed, the first layer631, the second layer632, and the third layer633of the additional auxiliary electrode630can all have the same width. Thereafter, a portion of the second layer632can be removed together with the upper planarization layer618in a process of forming the trench TR of the upper planarization layer618. In addition, a portion of the second layer632can be removed together with a material for forming the anode151during patterning of the anode151. For example, the second layer632including aluminum (Al) is partially removed when the material for forming the anode151and the upper planarization layer618are etched, and the first layer631and the third layer633including titanium (Ti) may not be removed, or can be removed less than the second layer632.

The display device600according to still another exemplary embodiment of the present disclosure can include the additional auxiliary electrode630that is electrically connected to the auxiliary electrode130. The additional auxiliary electrode630can be supplied with a low potential voltage, which is a low potential power signal, in the same manner as the auxiliary electrode130. In addition, the additional auxiliary electrode630can be electrically connected to the cathode153by the auxiliary electrode130. Accordingly, the additional auxiliary electrode630, the auxiliary electrode130, and the cathode153can be connected in parallel with each other. For example, electrical resistance between the additional auxiliary electrode630, the auxiliary electrode130, and the cathode153can be reduced. Accordingly, the electrical resistance of the cathode153can be further reduced, and a rise in low potential voltage and a voltage drop can be more effectively prevented.

In the display device600according to still another exemplary embodiment of the present disclosure, the additional auxiliary electrode630can be formed by the same process as the connection electrode440. Accordingly, a separate additional process for forming the additional auxiliary electrode630may not be required. Therefore, the electrical resistance of the cathode153can be effectively reduced by forming the additional auxiliary electrode630through the same process as an existing one, without a separate additional process.

FIG.7is a cross-sectional view of a display device according to still another exemplary embodiment of the present disclosure. Other components of a display device700inFIG.7are substantially identical to those of the display device400inFIG.4, except for a first transistor T1, a second transistor T2, and a capacitor Cst and thus, redundant descriptions may be omitted or may be briefly provided.

Referring toFIG.7, the first transistor T1 is disposed on the buffer layer111. The first transistor T1 includes a first active layer ACT1, a first gate electrode GE1, a first source electrode SE1, and a first drain electrode DE1.

The first active layer ACT1 is disposed on the buffer layer111. The first active layer ACT1 can be formed of low temperature polysilicon (LTPS). Polysilicon has high mobility, low energy consumption, and excellent reliability, so it can be applied to driving transistors and the like.

A first gate insulating layer712is disposed on the first active layer ACT1. The first gate insulating layer712is an insulating layer for insulating the first active layer ACT1 and the first gate electrode GE1, and can be comprised of a single layer or multilayers of silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto.

The first gate electrode GE1 is disposed on the first gate insulating layer712. The first gate electrode GE1 can be formed of a conductive material, for example, copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or an alloy thereof, but is not limited thereto.

A first interlayer insulating layer713, a second interlayer insulating layer714, and a third interlayer insulating layer716are disposed on the first gate electrode GE1. Contact holes can be formed in the first interlayer insulating layer713, the second interlayer insulating layer714, and the third interlayer insulating layer716to connect each of the first source electrode SE1 and the first drain electrode DE1 to the first active layer ACT1. The first interlayer insulating layer713, the second interlayer insulating layer714, and the third interlayer insulating layer716can be formed of a single layer or multilayers of silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto.

The first source electrode SE1 and the first drain electrode DE1 are disposed on the third interlayer insulating layer716. The first source electrode SE1 and the first drain electrode DE1 that are disposed to be spaced apart from each other can be electrically connected to the first active layer ACT1. The first source electrode SE1 and the first drain electrode DE1 can be formed of a conductive material such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr) or an alloy thereof, but is not limited thereto.

The capacitor Cst is disposed on the first gate insulating layer712. The capacitor Cst can be spaced apart from the first transistor T1. The capacitor Cst includes a first capacitor electrode CE1 and a second capacitor electrode CE2.

The first capacitor electrode CE1 is disposed on the first gate insulating layer712. The first capacitor electrode CE1 can include the same material as the first gate electrode GE1. For example, the first capacitor electrode CE1 can be formed of a conductive material, for example, copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or an alloy thereof, but is not limited thereto.

The first interlayer insulating layer713is disposed on the first capacitor electrode CE1, and the second capacitor electrode CE2 is disposed on the first interlayer insulating layer713. The second capacitor electrode CE2 can be formed of a conductive material, for example, copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or an alloy thereof, but is not limited thereto.

The second interlayer insulating layer714is disposed on the second capacitor electrode CE2, and the second transistor T2 is disposed on the second interlayer insulating layer714. The second transistor T2 includes a second active layer ACT2, a second gate electrode GE2, a second source electrode SE2, and a second drain electrode DE2.

The second active layer ACT2 is disposed on the second interlayer insulating layer714. The second active layer ACT2 can be formed of an oxide semiconductor material. The oxide semiconductor material is a material having a larger band gap than silicon, and has a low off-current because electrons cannot cross the band gap in an off state. Therefore, in the case of a transistor formed of an oxide semiconductor material, it can be applied to a switching transistor that has a short on time and a long off time.

A second gate insulating layer715and the second gate electrode GE2 are disposed on the second active layer ACT2. The second gate insulating layer715can be patterned in the same manner as the second gate electrode GE2. The second gate insulating layer715can be formed to correspond to the second gate electrode GE2 instead of being formed on the front surface of the substrate110. InFIG.7, it is illustrated that the first gate insulating layer712is formed on the front surface of the substrate110and the second gate insulating layer715is patterned in the same manner as the second gate electrode GE2. However, the second gate insulating layer715can be disposed on the front surface of the substrate110or the first gate insulating layer712can be patterned in the same manner as the first gate electrode GE1, but is not limited thereto. The second gate electrode GE2 can be formed of a conductive material, for example, copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or an alloy thereof, but is not limited thereto.

The third interlayer insulating layer716is disposed on the second gate electrode GE2, and the second source electrode SE2 and the second drain electrode DE2 are disposed on the third interlayer insulating layer716. Contact holes for connecting each of the second source electrode SE2 and the second drain electrode DE2 to the second active layer ACT2 can be formed in the third interlayer insulating layer716. The second source electrode SE2 and the second drain electrode DE2 that are disposed to be spaced apart from each other can be electrically connected to the second active layer ACT2. The second source electrode SE2 and the second drain electrode DE2 can be formed of a conductive material such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr) or an alloy thereof, but are not limited thereto.

A passivation layer can be disposed on the source electrodes SE1 and SE2 and the drain electrodes DE1 and DE2 of the first and second transistors T1 and T2. The passivation layer is an insulating layer for protecting components under the passivation layer. The passivation layer can be configured of a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto. In addition, althoughFIG.7shows the example in which the upper planarization layer718and the lower planarization layer717are included. It can only include a single planarization layer and not include the connection electrode440, similar to the corresponding structure shown inFIG.3A.

Meanwhile, inFIG.7, it has been described that the first active layer ACT1 of the first transistor T1 is formed of low-temperature polysilicon, and the second active layer ACT2 of the second transistor T2 is formed of an oxide semiconductor material. However, the first active layer ACT1 can be formed of an oxide semiconductor material, or the second active layer ACT2 can be formed of low-temperature polysilicon, but is not limited thereto.

In the display device700according to still another exemplary embodiment of the present disclosure, a pixel circuit includes a plurality of transistors T1 and T2 and a capacitor Cst. In this case, performance of the pixel circuit can be improved by configuring the plurality of transistors T1 and T2 of the pixel circuit in different types. For example, one of the plurality of transistors T1 and T2 can have an active layer formed of low-temperature polysilicon, and the other transistor can have an active layer formed of an oxide semiconductor material. In the case of a transistor including low-temperature polysilicon, it has high mobility and low power consumption, so it can be applied to a driving transistor. In the case of a transistor including an oxide semiconductor material, its on time is short and its off time can be maintained for a long time, so that it can be applied to a switching transistor. Accordingly, in the display device700according to another exemplary embodiment of the present disclosure, the active layers can be formed of different materials in consideration of functions of each of the plurality of transistors T1 and T2 constituting the pixel circuit, thereby improving the performance of the pixel circuit.

FIG.8is a cross-sectional view of a display device according to still another exemplary embodiment of the present disclosure. Other components of a display device800inFIG.8are substantially identical to those of the display device700inFIG.7, except for an additional auxiliary electrode830and thus, redundant descriptions may be omitted or may be provided briefly.

Referring toFIG.8, the auxiliary electrode130can be disposed in the trench TR and exposed by the upper planarization layer718, and the additional auxiliary electrode830is disposed on the second gate insulating layer715. The additional auxiliary electrode830can be formed on the same layer as the second gate electrode GE2 by the same process. In this case, the second gate insulating layer715can be patterned in the same manner as the additional auxiliary electrode830. For example, the second gate insulating layer715can be formed to correspond to the second gate electrode GE2 and the additional auxiliary electrode830instead of being formed on the front surface of the substrate110. InFIG.8, it is illustrated that the additional auxiliary electrode830is formed on the same layer as the second gate electrode GE2, but the additional auxiliary electrode830can be formed on the same layer as any one of the first gate electrode GE1, the first capacitor electrode CE1, the second capacitor electrode CE2, the source electrodes SE1 and SE2, and the drain electrodes DE1 and DE2 by the same process, but is not limited thereto.

The display device800according to still another exemplary embodiment of the present disclosure can include the additional auxiliary electrode830that is electrically connected to the auxiliary electrode130. The additional auxiliary electrode830can be electrically connected to the auxiliary electrode130through the contact holes of the lower planarization layer717and the third interlayer insulating layer716. The additional auxiliary electrode830can be supplied with a low potential voltage, which is a low potential power signal, in the same manner as the auxiliary electrode130. In addition, the additional auxiliary electrode830can be electrically connected to the cathode153by the auxiliary electrode130. Accordingly, the additional auxiliary electrode830, the auxiliary electrode130, and the cathode153can be connected in parallel with each other. For example, electrical resistance between the additional auxiliary electrode830, the auxiliary electrode130, and the cathode153can be reduced. Accordingly, the electrical resistance of the cathode153can be further reduced, and a rise in low potential voltage and a voltage drop can be more effectively prevented.

In the display device800according to still another exemplary embodiment of the present disclosure, the additional auxiliary electrode830can be formed by the same process as any one of the electrodes of the first transistor T1, the second transistor T2, and the capacitor Cst. Accordingly, a separate additional process for forming the additional auxiliary electrode830may not be required. Therefore, the electrical resistance of the cathode153can be effectively reduced by forming the additional auxiliary electrode830through the same process as an existing one without a separate additional process.

FIG.9is a cross-sectional view of a display device according to still another exemplary embodiment of the present disclosure. Other components of a display device900inFIG.9are substantially identical to those of the display device100inFIGS.3A and3B, except for a partition919and thus, redundant descriptions may be omitted or may be provided briefly.

Referring toFIG.9, the partition919is disposed on the auxiliary electrode130in the trench TR. The partition919can have a shape in which a width thereof is reduced downward. For example, an upper surface of the partition919can have a larger area than a lower surface thereof. Accordingly, the third layer133of the auxiliary electrode130can be partially covered by the upper surface of the partition919. Since a portion of the third layer133is covered by the partition919, it can be difficult to deposit the organic layer152and the cathode153on the entire surface of the third layer133. Accordingly, the organic layer152and the cathode153can include an open portion that is disconnected by the partition919.

Meanwhile,FIG.9illustrates that both the organic layer152and the cathode153are disconnected by the partition919, but only the organic layer152is disconnected by the partition919according to a formation method of the organic layer152and the cathode153, and the cathode153can be connected, and it is not limited to those illustrated in the drawings.

The display device900according to still another exemplary embodiment of the present disclosure can disconnect the common layer of the organic layer152by the partition919that is disposed on the auxiliary electrode130. For example, the common layer may not be deposited in a region of the third layer133of the auxiliary electrode130that is covered by the partition919. One portion of the common layer can be deposited on a region of the third layer133that is not covered by the partition919, and the other portion of the common layer can be deposited on the partition919. Accordingly, since the common layer includes an open portion that is disconnected by the partition919, a leakage current generated by the common layer can be minimized.

In the display device900according to still another exemplary embodiment of the present disclosure, the common layer can include at least two open portions by the auxiliary electrode130and the partition919. For example, the common layer can include an open portion disconnected by the auxiliary electrode130and an open portion disconnected by the partition919. Accordingly, separation of the common layer in the trench TR can be performed more effectively.

Meanwhile,FIG.9illustrates that the auxiliary electrode130is disposed on the same layer as the source electrode123and the drain electrode124of the transistor T1, and the partition919is disposed on the auxiliary electrode130. However, the present disclosure is not limited thereto. For example, the partition919can be applied to any one of the display devices400,500,600,700, and800according toFIGS.4to8according to a design, need or preference.

FIG.10is an enlarged plan view of a display device according to yet another exemplary embodiment of the present disclosure. Other components of a display device1000inFIG.10are substantially identical to those of the display device100inFIG.2, except for the plurality of sub-pixels SP and a plurality of lines and thus, redundant descriptions may be omitted or may be provided briefly.

Referring toFIG.10, the plurality of sub-pixels SP can include first sub-pixels SP1, second sub-pixels SP2, and third sub-pixels SP3.

The plurality of first sub-pixels SP1 can be disposed in a plurality of columns. For example, the plurality of first sub-pixels SP1 can be disposed in the same columns. And, the plurality of second sub-pixels SP2 and the plurality of third sub-pixels SP3 can be disposed between each of the plurality of columns in which the plurality of first sub-pixels SP1 are disposed. For example, the plurality of first sub-pixels SP1 can be disposed in one column, and the second sub-pixels SP2 and the third sub-pixels SP3 can be disposed in columns adjacent to the one column. In addition, the plurality of second sub-pixels SP2 and the plurality of third sub-pixels SP3 can be alternately disposed in the same column. In this specification, although it has been described that the plurality of sub-pixels SP include the first sub-pixels SP1, the second sub-pixels SP2, and the third sub-pixels SP3, the number, arrangement and color combinations of the plurality of sub-pixels SP can be variously changed according to a design, need or preference, but are not limited thereto.

The plurality of auxiliary lines AL extending in a column direction are disposed between the plurality of sub-pixels SP. Each of the plurality of auxiliary lines AL can be disposed between the first sub-pixel SP1 and the second sub-pixel SP2 and between the first sub-pixel SP1 and the third sub-pixel SP3.

The plurality of high potential power lines PL extending in the column direction in a similar manner as the plurality of auxiliary lines AL are disposed. The plurality of high potential power lines PL can be disposed adjacent to the plurality of auxiliary lines AL. A portion of the plurality of high potential power line PL can be disposed between the first sub-pixel SP1 and the auxiliary line AL. Another portion of the plurality of high potential power lines PL can be disposed to overlap the plurality of second sub-pixels SP2 and the plurality of third sub-pixels SP3 that are disposed in the same column.

The plurality of data lines DL extending in the column direction in the same manner as the plurality of auxiliary lines AL and the plurality of high potential power lines PL are disposed. The plurality of data lines DL can be disposed adjacent to the plurality of auxiliary lines AL. A portion of the plurality of data lines DL can be disposed between the auxiliary line AL and the first sub-pixel SP1. Another portion of the plurality of data lines DL can be disposed to overlap the plurality of second sub-pixels SP2 and the plurality of third sub-pixels SP3 that are disposed in the same column.

The plurality of scan lines SL extending in a row direction are disposed. The plurality of scan lines SL include first scan lines SL1 and second scan lines SL2. The first scan line SL1 is disposed to extend in the row direction between the second sub-pixel SP2 and the third sub-pixel SP3, and the second scan line SL2 can cross the second sub-pixel SP2 and can be disposed to extend in the row direction.

The plurality of initialization signal lines IL extending in the row direction in the same manner as the plurality of scan lines SL are disposed between the plurality of sub-pixels SP. Each of the plurality of initialization signal lines IL can be disposed between the second sub-pixel SP2 and the third sub-pixel SP3. The plurality of initialization signal lines IL can be disposed between the first scan line SL1 and the second scan line SL2.

The plurality of emission control signal lines EL extending in the row direction in the same manner as the plurality of scan lines SL are disposed. The plurality of emission control signal lines EL can be disposed adjacent to the plurality of second scan lines SL2. The plurality of emission control signal lines EL can cross the second sub-pixel SP2 and extend in the row direction. The second scan lines SL2 can be disposed between the plurality of emission control signal lines EL and the plurality of initialization signal lines IL.

In the present disclosure, it is illustrated that one portion of the plurality of lines are disposed between the plurality of sub-pixels SP, and the other portion of the plurality of lines overlaps the plurality of sub-pixels SP, but the arrangement of the plurality of lines is not limited thereto and other variations are part of the present disclosure. In addition, the number and arrangement order of the plurality of lines described in this specification can be variously changed according to a design, need or preference.

The auxiliary electrode130is disposed in some areas of the plurality of auxiliary lines AL. The auxiliary electrode130can be defined as an area having a width greater than that of the auxiliary line AL. The auxiliary electrode130can be integrally formed with the auxiliary line AL. Accordingly, a low potential power signal can be applied to the auxiliary electrode130. The auxiliary electrode130can be exposed to the outside of the planarization layer117by the trench TR. The auxiliary electrode130can be disposed to be spaced apart from the plurality of sub-pixels SP. InFIG.10, it is illustrated that the auxiliary electrodes130are adjacent to the plurality of sub-pixels SP and correspond to each of the plurality of sub-pixels SP, but the number and positions of the auxiliary electrodes130can be variously changed according to a design, need or preference. The auxiliary electrodes130can minimize a phenomenon in which a leakage current from a plurality of light emitting elements1050flows to other sub-pixels SP, and at the same time, can prevent low potential voltage rising, which can occur in the cathode.

According to an aspect of the present disclosure, a display device includes a substrate including a plurality of sub-pixels; a planarization layer disposed on the substrate and including a trench adjacent to the plurality of sub-pixels; a plurality of light emitting elements disposed in the plurality of sub-pixels and sharing an organic layer and a cathode; and an auxiliary electrode disposed in the trench and connected to the cathode. A side surface of the auxiliary electrode has a concave shape. The organic layer has an open portion that is disconnected by the auxiliary electrode.

The auxiliary electrode can include a first layer; a second layer on the first layer and including a material different from the first layer; and a third layer on the second layer and including the same material as the first layer. A width of the second layer can be smaller than widths of the first layer and the third layer.

The display device can further include a transistor disposed on the substrate and including a gate electrode, an active layer, a source electrode and a drain electrode. The auxiliary electrode can be disposed on the same layer as the source electrode or the drain electrode.

The display device can further include a transistor disposed on the substrate and including a gate electrode, an active layer, a source electrode and a drain electrode; and a connection electrode electrically connecting the plurality of light emitting elements to the source electrode or the drain electrode. The planarization layer can include a lower planarization layer covering the transistor and an upper planarization layer on the lower planarization layer. The connection electrode and the auxiliary electrode can be disposed on the lower planarization layer.

The connection electrode can include a first layer; a second layer on the first layer and including a material different from the first layer; and a third layer on the second layer and including the same material as the first layer. Widths of the first layer, the second layer, and the third layer can be same, or decrease in an order of the first layer, the second layer, and the third layer.

The lower planarization layer can include a groove corresponding to an end of the auxiliary electrode and facing from an upper surface to a lower surface of the lower planarization layer. A portion of a lower surface of the first layer can be exposed by the groove.

The display device can further include an additional auxiliary electrode disposed under the lower planarization layer and connected to the auxiliary electrode through a contact hole of the lower planarization layer.

The display device can further include a transistor disposed on the substrate and including a gate electrode, an active layer, a source electrode, and a drain electrode; and a connection electrode electrically connecting the plurality of light emitting elements to the source electrode or the drain electrode. The planarization layer can include a lower planarization layer covering the transistor and an upper planarization layer on the lower planarization layer. The auxiliary electrode can be disposed on the same layer as the source electrode or the drain electrode, and the connection electrode can be disposed on the lower planarization layer.

An additional auxiliary electrode that is the same as the auxiliary electrode can be further disposed on the auxiliary electrode.

The first layer and the third layer can include titanium (Ti), and the second layer can include aluminum (Al).

The display device can further include a partition disposed on the auxiliary electrode.

The auxiliary electrode can be electrically connected to the same power line as a power line that is connected to the cathode.

According to another aspect of the present disclosure, a display device includes a substrate including a plurality of sub-pixels; a transistor disposed on the substrate; a planarization layer disposed on the transistor and including a trench adjacent to the plurality of sub-pixels; a plurality of light emitting elements disposed in the plurality of sub-pixels and sharing a common layer of an organic layer and a cathode; and an auxiliary electrode disposed in the trench and contacted with the cathode. The auxiliary electrode includes a first layer and a third layer including the same material; and a second layer disposed between the first layer and the third layer to have a width smaller than the first layer and the third layer, and including a material different from the first layer and the third layer. The common layer has an open portion that is disconnected by the auxiliary electrode.

The display device can further include a connection electrode electrically connecting the transistor and the plurality of light emitting elements. The planarization layer can include a lower planarization layer covering the transistor and an upper planarization layer on the lower planarization layer. The connection electrode and the auxiliary electrode can be disposed on the lower planarization layer.

The lower planarization layer can include a groove exposing a portion of a lower surface of the first layer.

The display device can further include an additional auxiliary electrode connected to the auxiliary electrode through a contact hole of the lower planarization layer.

The planarization layer can include a lower planarization layer covering the transistor and an upper planarization layer on the lower planarization layer. The auxiliary electrode can be disposed on the same layer as a source electrode or a drain electrode of the transistor.

An additional auxiliary electrode that is the same as the auxiliary electrode can be disposed on the auxiliary electrode.

The auxiliary electrode can be disposed on the same layer as a source electrode or a drain electrode of the transistor.

The display device can further include a partition disposed on the auxiliary electrode.