Switch circuit and radio-frequency circuit

A switch circuit includes: first through third common terminals; a first selection terminal that can be connected to the first through third common terminals; second and third selection terminals that can be connected to the first and third common terminals via a first node and can be connected to the first and second common terminals via a second node; first through third switches connected between the first through third common terminals and the first selection terminal; fourth through fifth switches connected between the first and third common terminals and the first node; sixth and seventh switches connected between the first and second common terminals and the second node; eighth and ninth switches connected between the second and third selection terminals and the first node; and tenth and eleventh switches connected between the second and third selection terminals and the second node.

CROSS-REFERENCE TO RELATED APPLICATION

The present application claims priority to Japanese Patent Application No. 2022-118583, filed on Jul. 26, 2022, the entire contents of which are incorporated herein by reference.

BACKGROUND

The present disclosure relates to a switch circuit and a radio-frequency circuit.

2. Description of the Related Art

In communication devices that support multiple different bands and/or different multiple modes, multiple antennas are used to achieve simultaneous communication of multiple radio-frequency signals, and switch circuits are required to switch between the multiple antennas.

For example, Japanese Unexamined Patent Application Publication No. 2005-323304 discloses a multi-input multi-output switch that switches between signal paths by switching field-effect transistors (FETs) on and off.

However, in technology of the related art described above, it may be difficult to ensure isolation between signal paths during simultaneous communication of multiple radio-frequency signals.

SUMMARY OF THE DISCLOSURE

Accordingly, the present disclosure provides a multi-input multi-output switch circuit that can improve isolation and a radio-frequency circuit including the multi-input multi-output switch circuit.

A switch circuit according to an aspect of the present disclosure includes: a first common terminal, a second common terminal, and a third common terminal; a first selection terminal that is connectible to the first common terminal, the second common terminal, and the third common terminal; a second selection terminal and a third selection terminal that are connectible to the first common terminal and the third common terminal via a first node and are connectible to the first common terminal and the second common terminal via a second node; a first switch connected between the first common terminal and the first selection terminal; a second switch connected between the second common terminal and the first selection terminal; a third switch connected between the third common terminal and the first selection terminal; a fourth switch connected between the first common terminal and the first node; a fifth switch connected between the third common terminal and the first node; a sixth switch connected between the first common terminal and the second node; a seventh switch connected between the second common terminal and the second node; an eighth switch connected between the second selection terminal and the first node; a ninth switch connected between the third selection terminal and the first node; a tenth switch connected between the second selection terminal and the second node; and an eleventh switch connected between the third selection terminal and the second node.

A radio-frequency circuit according to an aspect of the present disclosure includes: the above-described switch circuit; a first low-pass filter connected to the first common terminal; a second low-pass filter connected to the second common terminal; and a third low-pass filter connected to the third common terminal.

A radio-frequency circuit according to an aspect of the present disclosure includes a switch circuit and a first low-pass filter and a second low-pass filter. The switch circuit includes a first common terminal, a second common terminal, and a third common terminal, a first selection terminal, a second selection terminal, and a third selection terminal, a first connection terminal connected to the first common terminal and the third common terminal via a first node, a second connection terminal connected to the first common terminal and the second common terminal via a second node, a third connection terminal connected to the second selection terminal and the third selection terminal via a third node, a fourth connection terminal connected to the second selection terminal and the third selection terminal via a fourth node, a first switch connected between the first common terminal and the first selection terminal, a second switch connected between the second common terminal and the first selection terminal, a third switch connected between the third common terminal and the first selection terminal, a fourth switch connected between the first common terminal and the first node, a fifth switch connected between the third common terminal and the first node, a sixth switch connected between the first common terminal and the second node, a seventh switch connected between the second common terminal and the second node, an eighth switch connected between the second selection terminal and the third node, a ninth switch connected between the third selection terminal and the third node, a tenth switch connected between the second selection terminal and the fourth node, and an eleventh switch connected between the third selection terminal and the fourth node. The first low-pass filter is connected between the first connection terminal and the third connection terminal. The second low-pass filter is connected between the second connection terminal and the fourth connection terminal.

The switch circuit according to an aspect of the present disclosure can improve isolation in multi-input multi-output switch circuits.

DESCRIPTION

Background

In multi-input multi-output switch circuits, it may be difficult to ensure isolation between paths due to crossings or overpass crossing between paths within the switch circuit. For example, in a triple-pole triple-throw (3P3T) type switch circuit, at least one crossing or overpass crossing occurs between the nine paths connecting the three common terminals and the three selection terminals to each other.

FIG.1is a circuit configuration diagram of a 3P3T-type switch circuit according to a comparative example. A switch circuit1000according to the comparative example includes common terminals CT1001to CT1003, selection terminals ST1001to ST1003, and single-pole single-throw (SPST) switches SW1001to SW1009disposed serially along individual paths. At least one crossing or overpass crossing occurs between the paths within the switch circuit1000. InFIG.1, an overpass crossing GS1001occurs between the path connecting the common terminal CT1001and the selection terminal ST1002to each other and the path connecting the common terminal CT1002and the selection terminal ST1003to each other. In this case, it is difficult to ensure isolation between the two paths, and signal interference increases based on both of the switches SW1004and SW1008being closed (i.e., turned on).

Accordingly, hereafter, a multi-input multi-output switch circuit that can improve isolation will be described in detail on the basis of embodiments. The embodiments described hereafter each illustrate a comprehensive or specific example of the present disclosure. The numerical values, shapes, materials, constituent elements, arrangements of the constituent elements, the ways in which the constituent elements are connected, and so forth described in the following embodiments are merely examples and are not intended to limit the present disclosure.

The drawings are schematic diagrams in which certain elements are emphasized or omitted or their proportions are adjusted as appropriate in order to illustrate the present disclosure, the drawings are not necessarily illustrated in a strictly accurate manner, and the actual shapes, positional relationships, and proportions may be different. In the drawings, configurations that are substantially the same as each other may be denoted by the same symbols and repeated description thereof may be omitted or simplified.

In the drawings referred to below, an x axis and a y axis are mutually perpendicular axes on a plane that is parallel to main surfaces of a module substrate. Specifically, based on the module substrate having a rectangular shape in plan view, the x-axis is parallel to a first side of the module substrate and the y-axis is parallel to a second side of the module substrate, which is perpendicular to the first side. In addition, a z axis is an axis that is perpendicular to the main surfaces of the module substrate, and a positive z axis direction indicates an upward direction and a negative z axis direction indicates a downward direction.

In circuit configurations of the present disclosure, the meaning of “connected” includes not only direct connections with connection terminals and/or wiring conductors, but also electrical connections realized via other circuit elements. “Connected between A and B” means connected to both A and B between A and B or means serially connected to a path connecting A and B to each other.

In circuit configurations of the present disclosure, “terminal” means a point where a conductor inside an element ends. If the impedance of a conductor serving as a path between elements is sufficiently low, a terminal is interpreted as being any point on the path between the elements or the entire path, rather than just a single point. The term “node” means any point along a path between elements or the entire path.

In the present disclosure, “transmission band” means a frequency band used in transmission in a communication device. “Reception band” means a frequency band used in reception in a communication device. For example, in frequency division duplex (FDD) bands, different frequency bands are used for the transmission band and the reception band, whereas in time division duplex (TDD) bands, the same frequency band is used for the transmission band and the reception band. In particular, based on a communication device functioning as user equipment (UE) in a cellular communication system, an uplink operation band can be used as a transmission band and a downlink operation band can be used as the reception band in the FDD bands. Conversely, based on a communication device functioning as a base station (BS) in a cellular communication system, a downlink operation band can be used as a transmission band and an uplink operation band can be used as a reception band in the FDD bands.

With respect to arrangement of components in the present disclosure, “a plan view” refers to objects being viewed from the positive z-axis side as orthographic projections onto the xy-plane. “A is disposed between B and C” means that at least one of a plurality of line segments connecting any point inside B and any point inside C passes through A. “A is disposed closer to a plurality of C than B is” means that the shortest distance between A and the plurality of C is shorter than the shortest distance between B and the plurality of C. The shortest distance between A and a plurality of C means the shortest distance out of the distances between A and the plurality of C. Terms indicating relationships between elements, such as “parallel” and “perpendicular,” and terms indicating the shape of elements, such as “rectangle,” as well as numerical ranges, are not meant to express only a strict meaning, but also to include substantially equivalent ranges, for example, errors of several percent.

Hereafter, a communication device5according to Embodiment 1 will be described. The communication device5according to this embodiment corresponds to a user terminal in a cellular communication system and is typically a mobile phone, a smart phone, a tablet computer, a wearable device, or the like. The communication device5may be an Internet of Things (IoT) sensor device, a medical/healthcare device, a car, an unmanned aerial vehicle (UAV) (a so-called drone), or an automated guided vehicle (AGV). The communication device5may also be used as a base station in a cellular communication system.

The circuit configurations of the communication device5, a radio-frequency circuit1, and a switch circuit51according to this embodiment will be described while referring toFIGS.2and3.FIG.2is a circuit configuration diagram of the communication device5according to this embodiment.FIG.3is a circuit configuration diagram of the switch circuit51according to this embodiment.

FIGS.2and3illustrate example circuit configurations, and the communication device5, the radio-frequency circuit1, and the switch circuit51can be realized using any of a wide variety of circuit configurations and circuit technologies. Therefore, the description of the communication device5, the radio-frequency circuit1, and the switch circuit51provided hereafter should not be interpreted as being limiting.

1.1 Circuit Configuration of Communication Device5

First, the circuit configuration of the communication device5according to this embodiment will be described while referring toFIG.2. The communication device5includes the radio-frequency circuit1, antennas2ato2c, a radio frequency integrated circuit (RFIC)3, and a baseband integrated circuit (BBIC)4.

The radio-frequency circuit1transmits radio-frequency signals between the antennas2ato2cand the RFIC3. The internal configuration of the radio-frequency circuit1will be described later.

The antennas2ato2care respectively connected to antenna connection terminals101to103of the radio-frequency circuit1. Each of the antennas2ato2creceives radio-frequency signals from outside the communication device5and transmits the received radio-frequency signals to the radio-frequency circuit1. Each of the antennas2ato2creceives radio-frequency signals from the radio-frequency circuit1and outputs the received radio-frequency signals to outside the communication device5. Note that the antennas2ato2cdo not have to be included in the communication device5. In addition to the antennas2ato2c, the communication device5may further include one or more additional antennas.

The RFIC3is an example of a signal processing circuit that processes radio-frequency signals. Specifically, the RFIC3subjects a radio-frequency reception signal input thereto via a reception path of the radio-frequency circuit1to signal processing using down conversion and so forth and outputs a reception signal generated through this signal processing to the BBIC4. In addition, the RFIC3subjects a transmission signal input thereto from the BBIC4to signal processing using up conversion and so forth and outputs a radio-frequency transmission signal generated through this signal processing to the radio-frequency circuit1. In addition, the RFIC3may include a control unit that controls switches, amplifiers, and other components included in the radio-frequency circuit1. Some or all of the functions of the control unit of the RFIC3may be implemented outside the RFIC3, for example, may be included in the BBIC4or the radio-frequency circuit1.

The BBIC4is a base band signal processing circuit that performs signal processing using an intermediate frequency band located at a lower frequency than radio-frequency signals transmitted by the radio-frequency circuit1. A signal processed by the BBIC4is used as an image signal for image display and/or as an audio signal for a telephone call via a speaker, for example. Note that the BBIC4does not have to be included in the communication device5.

Next, the radio-frequency circuit1according to this embodiment will be described while referring toFIG.2. The radio-frequency circuit1includes power amplifiers11and12, low-noise amplifiers21and22, filters31to33, low-pass filters41to43, the switch circuit51, the antenna connection terminals101to103, input terminals111and112, and output terminals121and122.

The antenna connection terminals101to103are external terminals of the radio-frequency circuit1and are used to receive reception signals from outside the radio-frequency circuit1and/or supply transmission signals to outside the radio-frequency circuit1. The antenna connection terminals101to103are respectively connected to the antennas2ato2c, which are outside the radio-frequency circuit1, and are respectively connected to the low-pass filters41to43, which are inside the radio-frequency circuit1.

The input terminals111and112are external connection terminals of the radio-frequency circuit1and are for receiving transmission signals from outside the radio-frequency circuit1. The input terminal111is connected to the RFIC3outside the radio-frequency circuit1and is connected to the input terminal of the power amplifier11inside the radio-frequency circuit1. The input terminal112is connected to the RFIC3outside the radio-frequency circuit1and is connected to the input terminal of the power amplifier12inside the radio-frequency circuit1.

The output terminals121and122are external connection terminals of the radio-frequency circuit1and are for supplying reception signals to outside the radio-frequency circuit1. The output terminal121is connected to the RFIC3outside the radio-frequency circuit1and to the output terminal of the low-noise amplifier21inside the radio-frequency circuit1. The output terminal122is connected to the RFIC3outside the radio-frequency circuit1and to the output terminal of the low-noise amplifier22inside the radio-frequency circuit1.

The power amplifier11is connected between the input terminal111and the filter32. Specifically, the input terminal of the power amplifier11is connected to the input terminal111, and the output terminal of the power amplifier11is connected to a transmission filter321included in the filter32. In this connection configuration, the power amplifier11can amplify a radio-frequency signal supplied from the RFIC3via the input terminal111.

The power amplifier12is connected between the input terminal112and the filter33. Specifically, the input terminal of the power amplifier12is connected to the input terminal112, and the output terminal of the power amplifier12is connected to the filter33. In this connection configuration, the power amplifier12can amplify a radio-frequency signal supplied from the RFIC3via the input terminal112.

The low-noise amplifier21is connected between the filter31and the output terminal121. Specifically, the input terminal of the low-noise amplifier21is connected to the filter31, and the output terminal of the low-noise amplifier21is connected to the output terminal121. In this connection configuration, the low-noise amplifier21can amplify a radio-frequency signal that has passed through the filter31.

The low-noise amplifier22is connected between the filter32and the output terminal122. Specifically, the input terminal of the low-noise amplifier22is connected to a reception filter322included in the filter32, and the output terminal of the low-noise amplifier22is connected to the output terminal122. In this connection configuration, the low-noise amplifier22can amplify a radio-frequency signal that has passed through the reception filter322.

The filter31(A-Rx) is an example of a fourth filter and is connected between the switch circuit51and the input terminal of the low-noise amplifier21. The filter31is a band-pass filter having a passband that includes a reception band of Band A.

The filter32is an example of a fifth filter and is connected between the switch circuit51, the power amplifier11, and the low-noise amplifier22. The filter32is a duplexer that includes the transmission filter321and the reception filter322.

The transmission filter321(B-Tx) is connected between the switch circuit51and the output terminal of the power amplifier11. The transmission filter321has a passband that includes a transmission band of Band B.

The reception filter322(B-Rx) is connected between the switch circuit51and the input terminal of the low-noise amplifier22. The reception filter322has a passband that includes a reception band of Band B.

The filter33(C-Tx) is an example of a sixth filter and is connected between the switch circuit51and the output terminal of the power amplifier12. The filter33has a passband that includes a transmission band of Band C.

Bands A to C are different frequency bands for communication systems constructed using radio access technology (RAT) and are combinations of bands that can be used simultaneously. Bands A to C are predefined by standards organizations (for example, the third Generation Partnership Project (3GPP) (registered trademark) and the Institute of Electrical and Electronics Engineers (IEEE)). Examples of such communication systems may include fifth Generation New Radio (5G NR) systems, Long Term Evolution (LTE) systems, and Wireless Local Area Network (WLAN) systems.

The low-pass filter41is an example of a first low-pass filter and is connected between the antenna connection terminal101and the switch circuit51. The low-pass filter41has a higher cutoff frequency than Bands A to C.

The low-pass filter42is an example of a second low-pass filter and is connected between the antenna connection terminal102and the switch circuit51. The low-pass filter42has a higher cutoff frequency than Bands A to C.

The low-pass filter43is an example of a third low-pass filter and is connected between the antenna connection terminal103and the switch circuit51. The low-pass filter43has a higher cutoff frequency than Bands A to C.

The switch circuit51is connected between the low-pass filters41to43and the filters31to33. The switch circuit51includes common terminals CT1to CT3and selection terminals ST1to ST3. The common terminal CT1is an example of a first common terminal and is connected to the low-pass filter41. The common terminal CT2is an example of a second common terminal and is connected to the low-pass filter42. The common terminal CT3is an example of a third common terminal and is connected to the low-pass filter43. The selection terminal ST1is an example of a first selection terminal and is connected to the filter31. The selection terminal ST2is an example of a second selection terminal and is connected to the filter32. The selection terminal ST3is an example of a third selection terminal and is connected to the filter33.

1.3 Circuit Configuration of Switch Circuit51

Next, the circuit configuration of the switch circuit51according to this embodiment will be described while referring toFIG.3. The switch circuit51includes SPST-type switches SW1to SW11in addition to the common terminals CT1to CT3and the selection terminals ST1to ST3.

The switch SW1is an example of a first switch and is connected between the common terminal CT1and the selection terminal ST1. Based on the switch SW1being closed (i.e., turned on), the common terminal CT1is connected to the selection terminal ST1. Conversely, based on the switch SW1being open (i.e., turned off), the common terminal CT1is not connected to the selection terminal ST1.

The switch SW2is an example of a second switch and is connected between the common terminal CT2and the selection terminal ST1. Based on the switch SW2being closed, the common terminal CT2is connected to the selection terminal ST1. Conversely, based on the switch SW2being open, the common terminal CT2is not connected to the selection terminal ST1.

The switch SW3is an example of a third switch and is connected between the common terminal CT3and the selection terminal ST1. Based on the switch SW3being closed, the common terminal CT3is connected to the selection terminal ST1. Conversely, based on the switch SW3being open, the common terminal CT3is not connected to the selection terminal ST1.

The switch SW4is an example of a fourth switch and is connected between the common terminal CT1and a node ND1. Based on the switch SW4being closed, the common terminal CT1is connected to the node ND1. Conversely, based on the switch SW4being open, the common terminal CT1is not connected to the node ND1.

The switch SW5is an example of a fifth switch and is connected between the common terminal CT3and the node ND1. Based on the switch SW5being closed, the common terminal CT3is connected to the node ND1. Conversely, based on the switch SW5being open, the common terminal CT3is not connected to the node ND1.

The switch SW6is an example of a sixth switch and is connected between the common terminal CT1and a node ND2. Based on the switch SW6being closed, the common terminal CT1is connected to the node ND2. Conversely, based on the switch SW6being open, the common terminal CT1is not connected to the node ND2.

The switch SW7is an example of a seventh switch and is connected between the common terminal CT2and the node ND2. Based on the switch SW7being closed, the common terminal CT2is connected to the node ND2. Conversely, based on the switch SW7being open, the common terminal CT2is not connected to the node ND2.

The switch SW8is an example of an eighth switch and is connected between the selection terminal ST2and the node ND1. Based on the switch SW8being closed, the selection terminal ST2is connected to the node ND1. Conversely, based on the switch SW8being open, the selection terminal ST2is not connected to the node ND1.

The switch SW9is an example of a ninth switch and is connected between the selection terminal ST3and the node ND1. Based on the switch SW9being closed, the selection terminal ST3is connected to the node ND1. Conversely, based on the switch SW9being open, the selection terminal ST3is not connected to the node ND1.

The switch SW10is an example of an tenth switch and is connected between the selection terminal ST2and the node ND2. Based on the switch SW10being closed, the selection terminal ST2is connected to the node ND2. Conversely, based on the switch SW10being open, the selection terminal ST2is not connected to the node ND2.

The switch SW11is an example of an eleventh switch and is connected between the selection terminal ST3and the node ND2. Based on the switch SW11being closed, the selection terminal ST3is connected to the node ND2. Conversely, based on the switch SW11being open, the selection terminal ST3is not connected to the node ND2.

The node ND1is an example of a first node and connects the switches SW4, SW5, SW8, and SW9to each other. The common terminals CT1and CT3are connected to the selection terminals ST2and ST3via the node ND1.

The node ND2is an example of a second node and connects the switches SW6, SW7, SW10, and SW11to each other. The common terminals CT1and CT2are connected to the selection terminals ST2and ST3via the node ND2.

Note that the switch circuit51is not limited to the circuit configuration inFIG.3. For example, the switch circuit51may include a shunt switch that connects a signal path to ground. In this case, the shunt switch may be closed based on the signal path being in a non-conductive state. This enables isolation between paths to be improved.

1.4 Connection States of Switch Circuit51

Next, the connections between the common terminals CT1to CT3and the selection terminals ST1to ST3inside the switch circuit51will be described while referring toFIGS.4to9.FIGS.4to9are diagrams illustrating the connection states inside the switch circuit51according to this embodiment.

In the upper left part of each ofFIGS.4to9, a connection state diagram of the connections between the common terminals CT1to CT3and the selection terminals ST1to ST3is illustrated, and below the connection state diagram, a circuit configuration diagram of the switch circuit51is illustrated. In the circuit configuration diagram, a path illustrated by a solid line represents a conductive state, and a path illustrated by a dashed line represents a non-conductive state.

InFIG.4, the switches SW1, SW5, SW7, SW9, and SW10are closed and the other switches are open. Thus, the common terminal CT1is connected to the selection terminal ST1via the switch SW1. The common terminal CT2is connected to the selection terminal ST2via the switch SW7, the node ND2, and the switch SW10. The common terminal CT3is connected to the selection terminal ST3via the switch SW5, the node ND1, and the switch SW9.

InFIG.5, the switches SW1, SW5, SW7, SW8, and SW11are closed and the other switches are open. Thus, the common terminal CT1is connected to the selection terminal ST1via the switch SW1. The common terminal CT2is connected to the selection terminal ST3via the switch SW7, the node ND2, and the switch SW11. The common terminal CT3is connected to the selection terminal ST2via the switch SW5, the node ND1, and the switch SW8.

InFIG.6, the switches SW2, SW5, SW6, SW9, and SW10are closed and the other switches are open. Thus, the common terminal CT1is connected to the selection terminal ST2via the switch SW6, the node ND2, and the switch SW10. The common terminal CT2is connected to the selection terminal ST1via the switch SW2. The common terminal CT3is connected to the selection terminal ST3via the switch SW5, the node ND1, and the switch SW9.

InFIG.7, the switches SW3, SW4, SW7, SW8, and SW11are closed and the other switches are open. Thus, the common terminal CT1is connected to the selection terminal ST2via the switch SW4, the node ND1, and the switch SW8. The common terminal CT2is connected to the selection terminal ST3via the switch SW7, the node ND2, and the switch SW11. The common terminal CT3is connected to the selection terminal ST1via the switch SW3.

InFIG.8, the switches SW2, SW5, SW6, SW8, and SW11are closed and the other switches are open. Thus, the common terminal CT1is connected to the selection terminal ST3via the switch SW6, the node ND2, and the switch SW11. The common terminal CT2is connected to the selection terminal ST1via the switch SW2. The common terminal CT3is connected to the selection terminal ST2via the switch SW5, the node ND1, and the switch SW8.

InFIG.9, the switches SW3, SW4, SW7, SW9, and SW10are closed and the other switches are open. Thus, the common terminal CT1is connected to the selection terminal ST3via the switch SW4, the node ND1, and the switch SW9. The common terminal CT2is connected to the selection terminal ST2via the switch SW7, the node ND2, and the switch SW10. The common terminal CT3is connected to the selection terminal ST1via the switch SW3.

As described above, in the switch circuit51, crossings and overpass crossings between three paths can be eliminated for the connections between the three common terminals CT1to CT3and the three selection terminals ST1to ST3, and as a result, isolation between the paths can be improved compared to the comparative example.

Although connection states in which the three common terminals CT1to CT3are connected to the three selection terminals ST1to ST3are illustrated inFIGS.4to9, the connections between the common terminals CT1to CT3and the selection terminals ST1to ST3inside the switch circuit51are not limited to those illustrated inFIGS.4to9. For example, only one or two of the three common terminals CT1to CT3may be connected to one or two of the selection terminals ST1to ST3. In this case, the remaining two or one of the common terminals CT1to CT3does not have to be connected to a selection terminal.

Next, an example configuration of the radio-frequency circuit1will be described while referring toFIGS.10and11.FIG.10is a plan view of a radio-frequency module in which the radio-frequency circuit1according to this embodiment is mounted. In the drawing, components on a main surface91aof a module substrate91are illustrated in a see-through manner from the positive side of the z-axis.FIG.11is a plan view of the radio-frequency module in which the radio-frequency circuit1according to this embodiment is mounted. In the drawing, components on a main surface91bof the module substrate91are illustrated in a see-through manner from the positive side of the z-axis. InFIGS.10and11, some of the components are marked with letters representing the components so that the arrangement relationship of the individual components can be easily understood, but the actual components need not be marked with such letters. InFIGS.10and11, illustration of wiring lines connected between the components is omitted.

FIGS.10and11illustrates an example configuration of the radio-frequency circuit1. The radio-frequency circuit1can be realized using any of a wide variety of circuit configurations and circuit technologies. Therefore, the description of an example configuration of the radio-frequency circuit1provided below should not be interpreted as being limiting.

The radio-frequency circuit1is mounted on the radio-frequency module substrate91. The module substrate91has the two main surfaces91aand91b, which face each other. As illustrated inFIG.10, the power amplifiers11and12(PA), the low-noise amplifiers21and22(LNA), the filters31and33(A-Rx, C-Tx), the filter32, which includes the transmission filter321(B-Tx) and the reception filter322(B-Rx), the low-pass filters41to43(LPF), and the switch circuit51(SW) are disposed on the main surface91aof the module substrate91. As illustrated inFIG.11, multiple external connection terminals are disposed on the main surface91bof the module substrate91. The external connection terminals include the antenna connection terminals101to103, the input terminals111and112, and the output terminals121and122.

The power amplifiers11and12are, for example, realized using heterojunction bipolar transistors (HBTs) and are mounted in semiconductor integrated circuits. For example, silicon germanium (SiGe) or gallium arsenide (GaAs) is used as the semiconductor material. The amplifying transistor of the power amplifier11does not have to be a HBT. For example, a high electron mobility transistor (HEMT) or a metal-semiconductor field effect transistor (MESFET) may be used for the power amplifier11. In this case, gallium nitride (GaN) or silicon carbide (SiC) may be used as the semiconductor material.

The low-noise amplifiers21and22are, for example, realized using complementary metal oxide semiconductor (CMOS) and are mounted in a semiconductor integrated circuit. The semiconductor integrated circuits may be manufactured using a silicon on insulator (SOI) process. Silicon (Si) is used as the semiconductor material, for example. At least one out of gallium arsenide (GaAs), silicon germanium (SiGe), and gallium nitride (GaN) may be used as the semiconductor material.

The filters31to33are realized using, for example, surface acoustic wave (SAW) filters, bulk acoustic wave (BAW) filters, LC filters, or dielectric filters, or any combination of these types of filters and are mounted. The way in which the filters31to33are realized is not limited to that described above.

The low-pass filters41to43are realized using, for example, SAW filters, BAW filters, LC filters, or dielectric filters, or any combination of these types of filters and are mounted. The way in which the low-pass filters41to43are realized is not limited to that described above.

The switch circuit51is, for example, formed using FETs and/or bipolar transistors and is mounted in a semiconductor integrated circuit. Silicon (Si) is used as the semiconductor material, for example. At least one out of gallium arsenide (GaAs), silicon germanium (SiGe), and gallium nitride (GaN) may be used as the semiconductor material.

1.6 Example Configuration of Switch Circuit51

The internal structure of a semiconductor integrated circuit511in which the switch circuit51is mounted will be described while referring toFIG.12.FIG.12is a plan view of the semiconductor integrated circuit511in which the switch circuit51according to this embodiment is mounted. In the drawing, the elements in the semiconductor integrated circuit511are illustrated in a see-through manner from the positive side of the z axis.

FIG.12illustrates an example configuration of the switch circuit51, and the switch circuit51can be realized using any of a wide variety of circuit configurations and circuit technologies. Therefore, the description of an example configuration of the switch circuit51provided below should not be interpreted as being limiting.

The semiconductor integrated circuit511includes the common terminals CT1to CT3and the selection terminals ST1to ST3, and the switches SW1to SW11are mounted therein. The switches SW1to SW11are formed of multiple serially connected FETs.

Hereafter, the arrangements of the elements of the semiconductor integrated circuit511in the plan view will be described.

The common terminals CT1to CT3are disposed along the x-axis. The common terminal CT1is disposed between the common terminals CT2and CT3.

The switches SW1to SW3are disposed along the x-axis. The switch SW1is disposed between the switches SW2and SW3.

The switches SW4to SW7are disposed along the x-axis. The switches SW4and SW6are disposed between the switches SW5and SW7. The switches SW4and SW5are adjacent to each other, and the switches SW6and SW7are adjacent to each other.

The switch SW1, the common terminal CT1, and the switch SW4are disposed substantially along the y-axis. The common terminal CT1is disposed between the switches SW1and SW4and adjacent to the switches SW1and SW4.

The switch SW1, the common terminal CT1, and the switch SW6are disposed substantially along the y-axis. The common terminal CT1is disposed between the switches SW1and SW6and adjacent to the switches SW1and SW6.

The switch SW2, the common terminal CT2, and the switch SW7are disposed along the y-axis. The common terminal CT2is disposed between the switches SW2and SW7and adjacent to the switches SW2and SW7.

The switch SW3, the common terminal CT3, and the switch SW5are disposed next to each other along the y-axis. The common terminal CT3is disposed between the switches SW3and SW5and adjacent to the switches SW3and SW5.

The selection terminals ST2and ST3are disposed along the x-axis, the switches SW8and SW9are also disposed along the x-axis, and the switches SW10and SW11are also disposed along the x-axis.

The switch SW8, the selection terminal ST2, and the switch SW10are disposed next to each other along the y-axis. The selection terminal ST2is disposed between the switches SW8and SW10and adjacent to the switches SW8and SW10.

The switch SW9, the selection terminal ST3, and the switch SW11are disposed next to each other along the y-axis. The selection terminal ST3is disposed between the switches SW9and SW11and adjacent to the switches SW9and SW11.

The selection terminal ST1is disposed on the opposite side of the switches SW1to SW3from the common terminals CT1to CT3. The selection terminal ST1is disposed closer to the common terminals CT1to CT3than each of the selection terminals ST2and ST3are. In other words, the shortest distance between the selection terminal ST1and the common terminals CT1to CT3(the shortest distance between the selection terminal ST1and the common terminal CT3inFIG.12) is shorter than the shortest distance between the selection terminal ST2and the common terminals CT1to CT3(the shortest distance between the selection terminal ST2and the common terminal CT1inFIG.12), and is shorter than the shortest distance between the selection terminal ST3and the common terminals CT1to CT3(the shortest distance between the selection terminal ST3and the common terminal CT1inFIG.12).

1.7 Effects and so Forth

As described above, the switch circuit51according to this embodiment includes the common terminals CT1to CT3, the selection terminal ST1that is connectible to the common terminals CT1to CT3, the selection terminals ST2and ST3that are connectible to the common terminals CT1and CT3via the node ND1and are connectible to the common terminals CT1and CT2via the node ND2, the switch SW1connected between the common terminal CT1and the selection terminal ST1, the switch SW2connected between the common terminal CT2and the selection terminal ST1, the switch SW3connected between the common terminal CT3and the selection terminal ST1, the switch SW4connected between the common terminal CT1and the node ND1, the switch SW5connected between the common terminal CT3and the node ND1, the switch SW6connected between the common terminal CT1and the node ND2, the switch SW7connected between the common terminal CT2and the node ND2, the switch SW8connected between the selection terminal ST2and the node ND1, the switch SW9connected between the selection terminal ST3and the node ND1, the switch SW10connected between the selection terminal ST2and the node ND2, and the switch SW11connected between the selection terminal ST3and the node ND2.

With this configuration, the selection terminals ST2and ST3are connectible to the common terminals CT1and CT3via the node ND1and are connectible to the common terminals CT1and CT2via the node ND2. As a result, crossings or overpass crossings between paths inside the switch circuit51, with the exception of nodes ND1and ND2, can be eliminated. In the switch circuit51, a switch is connected between the node ND1and each of the common terminals CT1and CT3and the selection terminals ST2and ST3, and a switch is connected between the node ND2and each of the common terminals CT1and CT2and the selection terminals ST2and ST3. Therefore, based on the three common terminals CT1to CT3and the three selection terminals ST1to ST3being connected in a one-to-one manner, the number of paths between terminals connected to each node can be limited to one for any particular connection (refer toFIGS.4to9). Thus, in the switch circuit51, crossings or overpass crossings between multiple paths used simultaneously can be eliminated and isolation between the paths can be improved. The thus-configured switch circuit51can be suitably used for switching multiple antennas for transmitting sounding reference signals (SRS).

For example, in the switch circuit51according to this embodiment, the common terminals CT1to CT3, the selection terminals ST1to ST3, and the switches SW1to SW11may be included in the semiconductor integrated circuit511, and the selection terminal ST1may be disposed closer to the common terminals CT1to CT3than each of the selection terminals ST2and ST3is based on the semiconductor integrated circuit511being viewed in plan view.

In this configuration, the selection terminal ST1is disposed near the common terminals CT1to CT3. Therefore, the wiring length between the selection terminal ST1and each of the common terminals CT1to CT3can be shortened, and loss due to wiring resistance and mismatching loss due to stray capacitances of the wiring can be reduced. In particular, since the selection terminal ST1is connected to the common terminals CT1to CT3with fewer switches and without nodes therebetween, the insertion loss of paths extending through the selection terminal ST1is smaller than that of paths through the other selection terminals ST2and ST3. Therefore, the reduction of loss achieved by shortening the wiring line lengths between the selection terminal ST1and the common terminals CT1to CT3is significant.

In addition, the radio-frequency circuit1according to this embodiment includes the switch circuit51, the low-pass filter41connected to the common terminal CT1, the low-pass filter42connected to the common terminal CT2, and the low-pass filter43connected to the common terminal CT3.

Thus, a low-pass filter is connected to each of the common terminals CT1to CT3. Therefore, regardless of which common terminal is connected to the transmission path, harmonic distortion can be reduced and the quality of the transmission signal can be improved.

In addition, for example, the radio-frequency circuit1according to this embodiment may further include the filter31connected to the selection terminal ST1, the filter32connected to the selection terminal ST2, and the filter33connected to the selection terminal ST3.

Thus, a filter is connected to each of the selection terminals ST1to ST3. Thus, simultaneous communication can be achieved in at least three different frequency bands.

In addition, for example, in the radio-frequency circuit1according to this embodiment, the filter31may be a band-pass filter having a passband that includes a reception band of Band A.

Thus, the selection terminal ST1can be used for a reception path of Band A. The selection terminal ST1is connected to the common terminals CT1to CT3with fewer switches and without nodes therebetween, and therefore the insertion loss in the reception path of Band A can be improved and reception sensitivity can be improved.

In addition, for example, in the radio-frequency circuit1according to this embodiment, the filter32may be a duplexer that includes the transmission filter321having a passband that includes the transmission band of Band B, in which communication can be performed simultaneously with communication in Band A, and the reception filter322having a passband that includes the reception band of Band B.

This allows the selection terminal ST2to be used for both the transmission path and the reception path of Band B.

For example, in the radio-frequency circuit1according to this embodiment, the filter33may be a band-pass filter having a passband that includes a transmission band of Band C, in which communication can be simultaneously performed with communication in Bands A and B.

Thus, the selection terminal ST3can be used for a transmission path of Band C.

Modification 1 of Embodiment 1

Next, Modification 1 of Embodiment 1 will be described. This modification mainly differs from Embodiment 1 described above in that the number of selection terminals of the switch circuit is increased. Hereafter, this modification will be described focusing on points that are different from Embodiment 1.

2.1 Circuit Configuration of Switch Circuit51A

The circuit configuration of a switch circuit51A according to this modification will be described while referring toFIG.13.FIG.13is a circuit configuration diagram of the switch circuit51A according to this modification.

FIG.13illustrates an example circuit configuration. The switch circuit51A can be realized using any of a wide variety of circuit configurations and circuit technologies. Therefore, the description of the switch circuit51A provided below should not be interpreted as being limiting.

The switch circuit51A is included in the radio-frequency circuit1instead of the switch circuit51. The switch circuit51A includes selection terminals ST4to ST7and switches SW12to SW19in addition to the common terminals CT1to CT3, the selection terminals ST1to ST3, and the switches SW1to SW11.

The selection terminals ST4to ST7are examples of one or more fourth selection terminals and are connected to a transmission path and/or reception path. For example, each of the selection terminals ST4to ST7is connected to a band-pass filter or a duplexer.

The switches SW12to SW15are examples of one or more twelfth switches and are connected between the selection terminals ST4to ST7and the node ND1. Based on the switches SW8, SW9and SW12to SW15being selectively closed, the selection terminals ST2to ST7are selectively connected to the node ND1.

The switches SW16to SW19are examples of one or more thirteenth switches and are connected between the selection terminals ST4to ST7and the node ND2. Based on the switches SW10, SW11and SW16to SW19being selectively closed, selection terminals ST2to ST7are selectively connected to the node ND2.

Based on the switch circuit51A as described above connecting the selection terminal ST1to any one of the common terminals CT1to CT3or any two of the selection terminals ST2to ST7to the remaining two of the common terminals CT1to CT3in a one-to-one manner, crossings and overpass crossings can be eliminated between the three paths connecting the three selection terminals to the three common terminals and isolation between the paths can be improved.

2.2 Example Configuration of Switch Circuit51A

The internal structure of a semiconductor integrated circuit511A in which the switch circuit51A is mounted will be described while referring toFIG.14.FIG.14is a plan view of the semiconductor integrated circuit511A in which the switch circuit51A according to this modification is mounted. In the drawings, the elements in the semiconductor integrated circuit511A are illustrated in a see-through manner from the positive side of the z axis.

FIG.14illustrates an example configuration of the switch circuit51A, and the switch circuit51A can be realized using any of a wide variety of circuit configurations and circuit technologies. Therefore, the description of an example configuration of the switch circuit51A provided below should not be interpreted as being limiting.

The semiconductor integrated circuit511A includes common terminals CT1to CT3and selection terminals ST1to ST7, and switches SW1to SW19are mounted therein. The switches SW1to SW19are formed of multiple serially connected FETs.

Hereafter, the arrangement of the elements of the semiconductor integrated circuit511A in plan view will be described.

The common terminals CT1to CT3are disposed along the x-axis. The common terminal CT1is disposed between the common terminals CT2and CT3.

The switches SW1to SW3are disposed along the x-axis. The switch SW1is disposed between the switches SW2and SW3.

The switches SW4to SW7are disposed along the x-axis. The switches SW4and SW6are disposed between the switches SW5and SW7. The switches SW4and SW5are adjacent to each other, and the switches SW6and SW7are adjacent to each other.

The switch SW1, the common terminal CT1, and the switch SW4are disposed substantially along the y-axis. The common terminal CT1is disposed between the switches SW1and SW4and adjacent to the switches SW1and SW4.

The switch SW1, the common terminal CT1, and the switch SW6are disposed substantially along the y-axis. The common terminal CT1is disposed between the switches SW1and SW6and adjacent to the switches SW1and SW6.

The switch SW2, the common terminal CT2, and the switch SW7are disposed along the y-axis. The common terminal CT2is disposed between the switches SW2and SW7and adjacent to the switches SW2and SW7.

The switch SW3, the common terminal CT3, and the switch SW5are disposed next to each other along the y-axis. The common terminal CT3is disposed between the switches SW3and SW5and adjacent to the switches SW3and SW5.

The selection terminals ST2to ST7are disposed along the x-axis, the switches SW8, SW9, and SW12to SW15are also disposed along the x-axis, and the switches SW10, SW11, and SW16to SW19are also disposed along the x-axis.

The switch SW8, the selection terminal ST2, and the switch SW10are disposed next to each other along the y-axis. The selection terminal ST2is disposed between the switches SW8and SW10and adjacent to the switches SW8and SW10.

The switch SW9, the selection terminal ST3, and the switch SW11are disposed next to each other along the y-axis. The selection terminal ST3is disposed between the switches SW9and SW11and adjacent to the switches SW9and SW11.

The switch SW12, the selection terminal ST4, and the switch SW16are disposed next to each other along the y-axis. The selection terminal ST4is disposed between the switches SW12and SW16and adjacent to the switches SW12and SW16.

The switch SW13, the selection terminal ST5, and the switch SW17are disposed next to each other along the y-axis. The selection terminal ST5is disposed between the switches SW13and SW17and adjacent to the switches SW13and SW17.

The switch SW14, the selection terminal ST6, and the switch SW18are disposed next to each other along the y-axis. The selection terminal ST6is disposed between the switches SW14and SW18and adjacent to the switches SW14and SW18.

The switch SW15, the selection terminal ST7, and the switch SW19are disposed next to each other along the y-axis. The selection terminal ST7is disposed between the switches SW15and SW19and adjacent to the switches SW15and SW19.

The selection terminal ST1is disposed on the opposite side of the switches SW1to SW3from the common terminals CT1to CT3. The selection terminal ST1is disposed closer to the common terminals CT1to CT3than each of the selection terminals ST2and ST7is. In other words, the shortest distance between the selection terminal ST1and the common terminals CT1to CT3(the shortest distance between the selection terminal ST1and the common terminal CT3inFIG.14) is shorter than the shortest distance between the selection terminal ST2and the common terminals CT1to CT3(the shortest distance between the selection terminal ST2and the common terminal CT2inFIG.14), and is shorter than the shortest distance between the selection terminal ST3and the common terminals CT1to CT3(the shortest distance between the selection terminal ST3and the common terminal CT2inFIG.14). In addition, the shortest distance between the selection terminal ST1and the common terminals CT1to CT3(the shortest distance between the selection terminal ST1and the common terminal CT3inFIG.14) is shorter than the shortest distance between the selection terminal ST4and the common terminals CT1to CT3(the shortest distance between the selection terminal ST4and the common terminal CT1inFIG.14), and is shorter than the shortest distance between the selection terminal ST5and the common terminals CT1to CT3(the shortest distance between the selection terminal ST5and the common terminal CT3inFIG.14). In addition, the shortest distance between the selection terminal ST1and the common terminals CT1to CT3(the shortest distance between the selection terminal ST1and the common terminal CT3inFIG.14) is shorter than the shortest distance between the selection terminal ST6and the common terminals CT1to CT3(the shortest distance between the selection terminal ST6and the common terminal CT3inFIG.14), and is shorter than the shortest distance between the selection terminal ST7and the common terminals CT1to CT3(the shortest distance between the selection terminal ST7and the common terminal CT3inFIG.14).

2.3 Effects and so Forth

As described above, the switch circuit51A according to this modification may further include the selection terminals ST4to ST7, which are connectible to the common terminals CT1and CT3via the node ND1and are connectible to the common terminals CT1and CT2via the node ND2, the switches SW12to SW15, which are connected between the selection terminals ST4to ST7and the node ND1, and the switches SW16to SW19, which are connected between the selection terminals ST4to ST7and the node ND2.

With this configuration, the selection terminals ST2to ST7are connectible to the common terminals CT1and CT3via the node ND1and are connectible to the common terminals CT1and CT2via the node ND2. As a result, crossings or overpass crossings between paths inside the switch circuit51A, with the exception of nodes ND1and ND2, can be eliminated. In the switch circuit51A, a switch is connected between the node ND1and each of the common terminals CT1and CT3and the selection terminals ST2to ST7, and a switch is connected between the node ND2and each of the common terminals CT1and CT2and the selection terminals ST2to ST7. Therefore, based on the selection terminal ST1being connected to any one of the common terminals CT1to CT3or any two of the selection terminals ST2to ST7are connected in a one-to-one manner to the remaining two of the common terminals CT1to CT3, the number of paths between terminals connected to each node can be limited to one for any particular connection. Thus, in the switch circuit51A, crossings or overpass crossings between multiple paths used simultaneously can be eliminated and isolation between the paths can be improved. Such a switch circuit51A can be suitably used for switching multiple antennas for transmitting SRS.

For example, in the switch circuit51A according to this modification, the common terminals CT1to CT3, the selection terminals ST1to ST7, and the switches SW1to SW19may be included in the semiconductor integrated circuit511A, and the selection terminal ST1may be disposed closer to the common terminals CT1to CT3than each of the selection terminals ST2and ST7is based on the semiconductor integrated circuit511A being viewed in plan view.

In this configuration, the selection terminal ST1is disposed near the common terminals CT1to CT3. Therefore, the wiring length between the selection terminal ST1and each of the common terminals CT1to CT3can be shortened, and loss due to wiring resistance and mismatching loss due to stray capacitances of the wiring can be reduced. In particular, since the selection terminal ST1is connected to the common terminals CT1to CT3with fewer switches and without nodes therebetween, the insertion loss of a path extending through the selection terminal ST1is smaller than that of paths extending through the other selection terminals ST2and ST7. Therefore, the reduction of loss achieved by shortening the wiring line lengths between the selection terminal ST1and the common terminals CT1to CT3is significant.

In the switch circuit51A according to this modification, the number of selection terminals is increased compared to the switch circuit51, but the number of selection terminals is not limited to seven. For example, the number of selection terminals may be 4, 5, 6, 8, and 9, or even 10 or more. Among the selection terminals ST2to ST7, the selection terminals for which the frequency bands of the radio-frequency signals to pass therethrough are close to each other or for which the frequency bands of the radio-frequency signals to pass therethrough partially overlap may be disposed adjacent to each other.

Modification 2 of Embodiment 1

Next, Modification 2 of Embodiment 1 will be described. This modification mainly differs from the first Embodiment described above in that a transmission path for a second generation (2G) cellular network is connected to the selection terminal ST1of the switch circuit51. Hereafter, this modification will be described focusing on points that are different from Embodiment 1.

The circuit configuration of a radio-frequency circuit1B according to this modification will be described while referring toFIG.15.FIG.15is a circuit configuration diagram of the radio-frequency circuit1B according to this modification.

The radio-frequency circuit1B is included in the communication device5instead of the radio-frequency circuit1. The radio-frequency circuit1B includes power amplifiers11to13, the low-noise amplifier22, the filter32, which includes the transmission filter321and the reception filter322, the filter33, the low-pass filters41to43, the switch circuit51, the antenna connection terminals101to103, the input terminals111to113, and the output terminal122.

The input terminal113is an external connection terminal of the radio-frequency circuit1B and is for receiving 2G cellular network transmission signals from outside the radio-frequency circuit1B. The input terminal113is connected to the RFIC3outside the radio-frequency circuit1B and is connected to the input terminal of the power amplifier13inside the radio-frequency circuit1B.

The power amplifier13is connected between the input terminal113and the switch circuit51and forms a transmission path TP1for a 2G cellular network. Specifically, the input terminal of the power amplifier13is connected to the input terminal113, and the output terminal of the power amplifier13is connected to the selection terminal ST1of the switch circuit51. In this connection configuration, the power amplifier13can amplify a 2G cellular network transmission signal supplied from the RFIC3via the input terminal113.

3.2 Effects and so Forth

As described above, the radio-frequency circuit1B according to this modification may include the transmission path TP1for a 2G cellular network, and the transmission path TP1may be connected to the selection terminal ST1.

With this configuration, the transmission path TP1for a 2G cellular network, which requires a relatively high output power, is connected to the selection terminal ST1, which is connected to the common terminals CT1to CT3with fewer switches and without nodes therebetween. Therefore, the number of switches requiring higher power tolerance can be reduced.

Next, Embodiment 2 will be described. This embodiment differs mainly from Embodiment 1 described above in that low-pass filters are connected between the common terminals and the selection terminals of the switch circuit. Hereafter, this embodiment will be described while referring to the drawings focusing on the points that differ from Embodiment 1.

The circuit configurations of a communication device5C, a radio-frequency circuit1C, and a switch circuit51C according to this embodiment will be described while referring toFIGS.16and17.FIG.16is a circuit configuration diagram of the communication device5C according to this embodiment.FIG.17is a circuit configuration diagram of the switch circuit51C according to this embodiment.

FIGS.16and17illustrate example circuit configurations, and the communication device5C, the radio-frequency circuit1C, and the switch circuit51C can be realized using any of a wide variety of circuit configurations and circuit technologies. Therefore, the description of the communication device5C, the radio-frequency circuit1C, and the switch circuit51C provided hereafter should not be interpreted as being limiting.

Since the communication device5C is substantially the same as the communication device5except for including the radio-frequency circuit1C instead of the radio-frequency circuit1, description of the communication device5C is omitted.

Next, the radio-frequency circuit1C according to this embodiment will be described while referring toFIG.16. The radio-frequency circuit1C includes power amplifiers11and12, low-noise amplifiers21and22, filters31to33, low-pass filters41C and42C, the switch circuit51C, antenna connection terminals101to103, input terminals111and112, and output terminals121and122.

The low-pass filter41C is an example of a first low-pass filter and is connected to switch circuit51C. The low-pass filter41C has a higher cutoff frequency than Bands A to C.

The low-pass filter42C is an example of a second low-pass filter and is connected to the switch circuit51C. The low-pass filter42C has a higher cutoff frequency than Bands A to C.

4.2 Circuit Configuration of Switch Circuit51C

Next, the circuit configuration of the switch circuit51C according to this embodiment will be described while referring toFIG.17. The switch circuit51C includes filter connection terminals FT1to FT4in addition to common terminals CT1to CT3, selection terminals ST1to ST3, and switches SW1to SW11.

The filter connection terminal FT1is an example of a first connection terminal and is connected to one end of the low-pass filter41C outside the switch circuit51C. The filter connection terminal FT1is connected to a node ND1C inside the switch circuit51C.

The filter connection terminal FT2is an example of a second connection terminal and is connected to one end of the low-pass filter42C outside the switch circuit51C. The filter connection terminal FT2is connected to a node ND2C inside the switch circuit51C.

The filter connection terminal FT3is an example of a third connection terminal and is connected to the other end of the low-pass filter41C outside the switch circuit51C. The filter connection terminal FT3is connected to a node ND3C inside the switch circuit51C.

The filter connection terminal FT4is an example of a fourth connection terminal and is connected to the other end of the low-pass filter42C outside the switch circuit51C. The filter connection terminal FT4is connected to a node ND4C inside the switch circuit51C.

The node ND1C is an example of a first node and connects the switches SW4and SW5to the filter connection terminal FT1. The common terminals CT1and CT3are connected to the filter connection terminal FT1via the node ND1C.

The node ND2C is an example of a second node and connects the switches SW6and SW7to the filter connection terminal FT2. The common terminals CT1and CT2are connected to the filter connection terminal FT2via the node ND2C.

The node ND3C is an example of a third node and connects the switches SW8and SW9to the filter connection terminal FT3. The selection terminals ST2and ST3are connected to the filter connection terminal FT3via the node ND3C.

The node ND4C is an example of a fourth node and connects the switches SW10and SW11to the filter connection terminal FT4. The selection terminals ST2and ST3are connected to the filter connection terminal FT4via the node ND4C.

The low-pass filters41C and42C may be included in the switch circuit51C. In this case, the switch circuit51C does not need to include the filter connection terminals FT1to FT4.

The connections between the common terminals CT1to CT3and the selection terminals ST1to ST3in the switch circuit51C and the configuration of the switch circuit51C are the substantially the same as in Embodiment 1 and therefore illustration and description thereof are omitted.

4.3 Effects and so Forth

As described above, the radio-frequency circuit1C according to this embodiment includes the switch circuit51C and the low-pass filters41C and42C. The switch circuit51C includes the common terminals CT1to CT3, the selection terminals ST1to ST3, the filter connection terminal FT1connected to the common terminals CT1and CT3via the node ND1C, the filter connection terminal FT2connected to the common terminals CT1and CT2via the node ND2C, the filter connection terminal FT3connected to the selection terminals ST2and ST3via the node ND3C, the filter connection terminal FT4connected to the selection terminals ST2and ST3via the node ND4C, the switch SW1connected between the common terminal CT1and the selection terminal ST1, the switch SW2connected between the common terminal CT2and the selection terminal ST1, the switch SW3connected between the common terminal CT3and the selection terminal ST1, the switch SW4connected between the common terminal CT1and the node ND1C, the switch SW5connected between the common terminal CT3and the node ND1C, the switch SW6connected between the common terminal CT1and the node ND2C, the switch SW7connected between the common terminal CT2and the node ND2C, the switch SW8connected between the selection terminal ST2and the node ND3C, the switch SW9connected between the selection terminal ST3and the node ND3C, the switch SW10connected between the selection terminal ST2and the node ND4C, and the switch SW11connected between the selection terminal ST3and the node ND4C. The low-pass filter41C is connected between the filter connection terminals FT1and FT3. The low-pass filter42C is connected between the filter connection terminals FT2and FT4.

According to this configuration, the low-pass filter41C is connected between the nodes ND1C and ND3C, and the low-pass filter42C is connected between the nodes ND2C and ND4C. As a result, the number of low-pass filters can be reduced compared to a case where a low-pass filter is connected to each of the common terminals CT1to CT3. Since a low-pass filter is used to attenuate harmonic distortion of a transmission signal, a low-pass filter does not need to be connected to a reception path connected to the selection terminal ST1.

In addition, for example, the radio-frequency circuit1C according to this embodiment may further include the filter31connected to the selection terminal ST1, the filter32connected to the selection terminal ST2, and the filter33connected to the selection terminal ST3.

Thus, a filter is connected to each of the selection terminals ST1to ST3. Thus, simultaneous communication can be achieved in at least three different frequency bands.

In addition, for example, in the radio-frequency circuit1C according to this embodiment, the filter31may be a band-pass filter having a passband that includes a reception band of Band A.

Thus, the selection terminal ST1can be used for a reception path of Band A. The selection terminal ST1is connected to the common terminals CT1to CT3with fewer switches and without nodes therebetween, and therefore the insertion loss in the reception path of Band A can be improved and reception sensitivity can be improved.

In addition, for example, in the radio-frequency circuit1C according to this embodiment, the filter32may be a duplexer that includes the transmission filter321having a passband that includes the transmission band of Band B, in which communication can be performed simultaneously with communication in Band A, and the reception filter322having a passband that includes the reception band of Band B.

This allows the selection terminal ST2to be used for both the transmission path and the reception path of Band B.

For example, in the radio-frequency circuit1C according to this embodiment, the filter33may be a band-pass filter having a passband that includes a transmission band of Band C, in which communication can be simultaneously performed with communication in Bands A and B.

Thus, the selection terminal ST3can be used for a transmission path of Band C.

Other Embodiments

Embodiments and modifications of the embodiments of switch circuits and radio-frequency circuits according to the present disclosure have been described above, but switch circuits and radio-frequency circuits according to the present disclosure are not limited to the above-described embodiments and modifications. Other embodiments realized by combining any of the constituent elements of the above-described embodiments and modifications with one another, modifications obtained by modifying the above-described embodiments and modifications in various ways, as thought of by one skilled in the art, while not departing from the gist of the present disclosure, and various devices having the switch circuits and radio-frequency circuits built thereinto are included in the scope of the present disclosure.

For example, in the circuit configurations of the switch circuits and radio-frequency circuits according to the embodiments described above, other circuit elements, wiring lines, and so forth may be inserted midway along paths that connect the circuit elements and signal paths disclosed in the drawings. For example, in radio-frequency circuits, an impedance matching network may be inserted between a power amplifier and/or a low-noise amplifier and a filter.

In addition, for example, Modification 1 of Embodiment 1 may be combined with Embodiment 2. For example, the switch circuit51C may be provided with additional selection terminals ST4to ST7similarly to the switch circuit51A.

In each of the above-described embodiments and modifications, the switch circuit was mounted in a single semiconductor integrated circuit, but the switch circuit may instead be mounted in a separated manner in multiple semiconductor integrated circuits. For example, in the switch circuit51according to Embodiment 1, the common terminals CT1to CT3, the selection terminal ST1, and the switches SW1to SW7may be included in one semiconductor integrated circuit, and the selection terminals ST2and ST3, and the switches SW8to SW11may be included in another semiconductor integrated circuit.

The present disclosure can be widely used in communication devices such as mobile phones as switch circuits and radio-frequency circuits disposed in front end units.