ELECTRONIC COMPONENT

An electronic component includes an integrated circuit chip and a package surrounding the integrated circuit chip. The electronic component includes at least a first conductive region at least partially coating one side of the integrated circuit chip. The first conductive region includes an alloy predominantly comprising bismuth.

CROSS-REFERENCE TO RELATED APPLICATION(S)

This application claims the priority benefit of French patent application number 23/09779, filed on Sep. 15, 2023, entitled “Composant électronique,” which is hereby incorporated by reference to the maximum extent allowable by law.

BACKGROUND

Technical Field

The present description relates generally to electronic components and their manufacturing processes, more particularly to electronic components including at least one packaged integrated circuit chip, and to manufacturing processes for such components.

Description of the Related Art

Electronic components including at least one packaged integrated circuit chip have been proposed. In particular, there are components including a chip-scale package (CSP). These components are generally surface-mounted on a printed circuit board, using a soldering process that involves melting and then solidifying a solder paste or flux based on a lead-free alloy, such as a tin-silver-copper alloy (Sn—Ag—Cu alloy), also known by the acronym SAC. To assemble the electronic component to the printed circuit board, a temperature above the melting point of the alloy, equal to approximately 218° C. in the case of the SAC alloy, is applied to cause the soldering material to melt. The assembly is then cooled to solidify the soldering material, thus mechanically securing the component to the board.

However, existing electronic components including a CSP package have various drawbacks. In particular, known processes for manufacturing electronic components using the SAC alloy give rise to problems of unintentional overbridging, or interconnection, between adjacent integrated circuit chips during a solder material reflow step prior to a cutting step aimed at individualizing the integrated circuit chips.

Furthermore, in certain fields of application such as automotive manufacturing, it would be desirable to have components with wettable flanks to facilitate inspection steps after soldering. However, a reflow step for SAC alloy-coated flanks during assembly would lead to undesirable slumping or flowing of this alloy onto the printed circuit board.

Furthermore, in a case where the component package surrounds several integrated circuit chips, including, for example, an ASIC (Application-Specific Integrated Circuit) chip, superimposed and interconnected by solder balls, these balls are generally made of a metal alloy, e.g., a gold-tin alloy, with a melting point higher than that of the alloy used for soldering, e.g., the SAC alloy, in order to prevent reflow of the solder balls when soldering the component to the board. As the gold-tin alloy is particularly expensive, it would be desirable to find a substitute material with a lower cost.

BRIEF SUMMARY

Embodiments of the present disclosure overcome some or all of the drawbacks of known electronic components and their manufacturing processes.

One embodiment provides an electronic component including:an integrated circuit chip;a package surrounding the integrated circuit chip; andat least a first conductive region at least partially coating one side of the integrated circuit chip, the first conductive region including an alloy predominantly including bismuth.

According to one embodiment, the alloy has a bismuth content of over 80%, preferably equal to approximately 90%.

According to one embodiment, the alloy further includes at least one additive element selected from silver, nickel and tin.

According to one embodiment, the alloy has a content of the at least one additive element of less than 10%, preferably equal to approximately 5%.

According to one embodiment, the alloy has:a bismuth content equal to approximately 90%;a silver content equal to approximately 5%; anda nickel content equal to approximately 5%.

According to one embodiment, the alloy has a melting point of between 270 and 290° C.

One embodiment provides an electronic device including:a support and interconnection substrate;at least one contact-making element located on one face of the support and interconnection substrate;at least one electronic component such as described; andat least one second conductive region interposed between the at least one contact making element and the at least one first conductive region of the electronic component.

According to one embodiment, the second conductive region covers a flank of the electronic component.

According to one embodiment, the second conductive region is made of an alloy of tin, silver and copper.

One embodiment provides a motor vehicle including at least one device such as described.

One embodiment provides a method of manufacturing an electronic component including an integrated circuit chip and a package surrounding the integrated circuit chip, the method including the step of at least partially coating a face of the integrated circuit chip with a first conductive region including an alloy predominantly including bismuth.

In one embodiment, an electronic device includes an integrated circuit chip, a package surrounding the integrated circuit chip, and at least a first conductive region at least partially coating one side of the integrated circuit chip, the first conductive region including an alloy of at least 50% bismuth.

In one embodiment, a method includes surrounding an integrated circuit chip with a package. Surrounding the integrated circuit chip with a package includes at least partially coating a front face of an integrated circuit chip with a first conductive region including an alloy of at least 50% bismuth and forming an encapsulation layer on sidewalls and a back face of the integrated circuit chip.

In one embodiment, a motor vehicle includes an electronic device including a substrate and a package on the substrate. The package includes an integrated circuit chip, an encapsulation layer on a first face and on sidewalls of the integrated circuit chip, and a first conductive region at least partially coating a second face of the integrated circuit chip, the first conductive region including an alloy of at least 50% bismuth.

DETAILED DESCRIPTION

For the sake of clarity, only the operations and elements that are useful for an understanding of the embodiments described herein have been illustrated and described in detail. In particular, the applications and systems in which electronic components may be provided are not detailed, the described embodiments and variants being compatible with the usual applications and systems including one or more electronic components, with possible adaptations that will be within the reach of the person skilled in the art on reading the present description.

In the following description, the qualifiers “insulating” and “conductive” mean electrically insulating and electrically conductive respectively, unless otherwise specified.

FIG.1A,FIG.1B,FIG.1C,FIG.1DandFIG.1Eare schematic, partial cross-sectional views illustrating successive steps in a process for manufacturing an electronic component100according to one embodiment.

FIG.1Aillustrates in particular a structure obtained at the end of a step in which a mask101is arranged on and in contact with a face103T of a substrate103(the upper face of substrate103, in the orientation ofFIG.1A).

In the example shown, the mask101forms a discontinuous layer extending laterally over and in contact with the face103T of the substrate103. In this example, the mask101includes disjointed portions laterally delimiting apertures. Mask101is, for example, a screen-printing mask. By way of example, mask101is made of an insulating material, such as a resin.

The substrate103is, for example, a wafer or piece of wafer made of a semiconductor material, such as silicon or germanium nitride (GaN). Although not detailed inFIG.1A, the substrate103includes, for example, at least one unitary electronic component, for example at least one unitary power electronic component. Each unitary electronic component includes, for example, at least one element chosen from among a diode, a thyristor, a triac, a transistor, a resistive, capacitive or inductive load, etc.

In the example shown, contact-making elements105are located on and in contact with portions of the face103T of the substrate103not coated with the mask101. The contact-making elements105are connected, for example, to conduction and/or control electrodes of the unitary electronic component(s) formed in the substrate103. By way of example, the contact-making elements105are conductive pads, for example pads made of a metal, such as copper, or a metal alloy. The mask101is aligned, for example, with the position of the contact-making elements105on the face103T of the substrate103. In the example shown inFIG.1A, two contact-making elements105are located in each opening of the mask101. However, this example is not limitative, as the number of contact elements105located in each opening of the mask101is, alternatively, different from two.

FIG.1Billustrates in particular a structure obtained from the structure ofFIG.1A, following a step in which conductive regions107are formed in the openings of the mask101.

In the example shown, the conductive regions107fill the openings in the mask101, i.e., completely fill all the free spaces extending laterally between the parts of the mask101. In this example, the conductive regions107are bordered by the mask101, the flanks of each conductive region107being covered by parts of the mask101. In the example shown, the conductive regions107coat the contact making elements105and parts of the face103T of the substrate103not coated by the mask101or the contact making elements105. In the example shown, each conductive region107coats two contact making elements105. In the example shown, the conductive regions107are flush with the face of the mask101opposite the substrate103(the upper face of the mask101, in the orientation ofFIG.1B).

The conductive regions107are made, for example, of a soldering material, such as a soldering paste. At this stage of the process, the material of the conductive regions107includes, for example, a metal alloy, for example in the form of metal alloy balls or microballs dispersed in a viscous or pasty material.

In one embodiment, the metal alloy contained in the conductive regions107predominantly includes bismuth (Bi). More precisely, the alloy for example has a bismuth content of over 80%, for example of approximately 90%. For example, the alloy also includes at least one additive element selected from silver (Ag), nickel (Ni) and tin (Sn). In this case, for example, the alloy has a content of each additive element of less than 10%, e.g., approximately equal to 5%. By way of example, the metal alloy of the conductive regions107has a bismuth content equal to approximately 90%, a silver content equal to approximately 5% and a nickel content equal to approximately 5%. For example, the alloy has a melting point of between 270 and 290° C.

FIG.1Cillustrates in particular a structure obtained from the structure ofFIG.1B, following a step in which the mask101is removed, the conductive regions107are reflowed and trenches109are formed in the conductive regions107and the substrate103.

In the example shown inFIG.1C, the101mask is completely removed.

In the example shown, the conductive regions107have been subjected to a reflow phenomenon, for example by carrying out a heating operation to expose the structure to a temperature above the melting point of the metal alloy contained in the conductive regions107. If the alloy is in the form of balls or microballs dispersed in a flux, this operation melts the balls or microballs and removes the flux. At the end of this operation, each conductive region107is substantially made up of the metal alloy. In the example shown, the conductive regions107have curved or rounded flanks after reflow. By way of example, the flanks of the conductive regions107have a curvature that depends on the surface tension of the metal alloy in the liquid state.

In the example shown, the trenches109are substantially aligned with the center of the regions107. In the orientation shown inFIG.1C, each trench109extends vertically from the top face of one of the conductive regions107through the region107and penetrates into the thickness of the substrate103. In the example shown, the trenches109do not open on the side of a face103B of the substrate103(the lower face of the substrate103, in the orientation ofFIG.1C) opposite the face103T. Each trench109, for example, is laterally interposed between two contact making elements105initially coated with the same region107. By way of example, the trenches109are formed by cutting, for example by sawing, on the face103T side of the substrate103.

In the example shown, the unitary electronic component(s) formed in the substrate103and intended to form part of a single electronic component100are delimited laterally by the trenches109. When viewed from above, the trenches109are for example in the form of a grid, with each cell corresponding to a future electronic component100. In the example shown, each contact-making element105is coated with a portion of one of the conductive regions107that is separate from the portions of the conductive regions107coating the other contact-making elements105. In the example shown inFIG.1C, each future electronic component100includes two contact-making elements105coated respectively with two separate conductive region portions107.

FIG.1Dillustrates in particular a structure obtained from the structure shown inFIG.1C, following a step in which an insulating layer111is deposited on the103T side of the substrate103, and in which the structure is thinned on the103T and103B sides of the substrate103.

In the example shown, the insulating layer111fills, i.e., completely fills, the trenches109and all the free spaces extending laterally between the regions107. By way of example, the insulating layer111is made of a resin, for example a molding resin designed to form a packaging around each future electronic component100.

In the example shown, the structure is thinned, for example by grinding, on the103T side of the substrate103so as to reduce the thickness of the regions107and the insulating layer111. In the example shown, the insulating layer111is flush with the face of the regions107opposite the substrate103(the top face of the regions107, in the orientation ofFIG.1D).

In addition, the structure is thinned, for example by grinding, on the face103B side of the substrate103, so as to expose parts of the insulating layer111filling the bottom of the trenches109. The parts of the insulating layer111located inside the trenches109are thus flush with the face103B of the substrate103. By way of example, the structure is temporarily transferred to a support substrate, or handle, on the103T side of substrate103prior to thinning of the structure on the103B side, the support substrate then being removed after thinning.

FIG.1Eillustrates in particular a structure obtained from the structure shown inFIG.1D, following a step in which a further insulating layer113is deposited on the103B side of the substrate103, and in which the substrate103is cut through its entire thickness to separate, or individualize, the electronic components100.

In the example shown, the insulating layer113is located on and in contact with the face103B of the substrate103and with the parts of the insulating layer111flush with the face103B of the substrate103. The layer113is for example made of a resin, for example a molding resin intended to form part of the packaging of electronic components100. By way of example, the insulating layers111and113are made of the same material.

In the example shown, the structure includes trenches115extending vertically through the thickness of the conductive regions107from the face of the conductive regions107opposite the substrate103(the top face of the conductive regions107, in the orientation ofFIG.1E). In this example, the trenches115have a height, or depth, less than the height, or thickness, of the conductive regions107. When viewed from above, trenches115and117surround each electronic component100.

In the example shown, the structure further includes trenches117having a width less than that of the trenches115. In the example shown, each trench117extends vertically from the bottom of one of the trenches115through the conductive region107, the substrate103and the insulating layer113. The trenches117thus have an end opening on the103B side of the substrate103. In the example shown, the width of the trenches117is strictly less than that of the parts of the insulating layer111located inside the trenches109.

For example, the trenches115are formed before the trenches117. For example, the trenches115and117are formed by sawing.

In the example shown, the trenches117delimit parts of the substrate103, each of which, for example, forms part of an integrated circuit chip119, or electronic chip, of one of the electronic components100.

FIG.2is a partial schematic cross-sectional view of an electronic device200including an electronic component100according to one embodiment.

In the example shown, the electronic device200includes a support and interconnection substrate203, for example a printed circuit board. In the illustrated example, contact-making elements205are located on and in contact with one face of the support and interconnection substrate203(the top face of the support and interconnection substrate203, in the orientation ofFIG.2). The contact-making elements205are connected, for example, to conductive tracks formed on the substrate203and/or to conductive vias formed in the thickness of the substrate203. By way of example, the contacting elements205are conductive pads, for example pads made of a metal, such as copper, or a metal alloy.

In the illustrated example, the electronic component100is attached to the support and interconnection substrate203by conductive regions207interposed between the component100and the substrate203. More specifically, in this example, each conductive region207is interposed between one of the conductive regions107of the electronic component100and one of the contact-making elements205of the support and interconnection substrate203. Each contact-making element205of the support and interconnection substrate203is thus connected to one of the contact-making elements105of the electronic component100via one of the conductive regions207and one of the conductive regions107.

The conductive regions207are made of a metal alloy, for example a metal alloy with a melting point strictly lower than that of the metal alloy of the conductive regions107. By way of example, the conductive regions207are made of a lead-free alloy, for example an alloy of tin, silver and copper (Sn—Ag—Cu alloy) also known by the acronym SAC.

In the example shown, the conductive regions207coat a face of the conductive regions107located on the side of the support and interconnection substrate203(the bottom face of the conductive regions107, in the orientation ofFIG.2). Furthermore, in this example, the conductive regions207coat part of the flank of the conductive regions107, i.e., wet the flanks of the conductive regions107.

FIG.2illustrates an example in which the electronic device200includes a single electronic component100. However, this example is not limitative, as the electronic device200includes any number of electronic components of the type of component100in some embodiments. By way of example, the electronic device200is integrated into a motor vehicle, with the electronic component100implementing, for example, a protection function against electrostatic discharges to which the electronic device200may be exposed.

An advantage of the electronic component100is that the presence of conductive regions107with a high bismuth content makes it possible to obtain wettable flanks. This makes it easier to inspect the soldering of component100to support and interconnect substrate203. Another advantage of using conductive regions107made of a metal alloy with a high bismuth content is that it avoids problems of unintentional overbridging, or interconnection, between adjacent integrated circuit chips during the step of reflow of the material of the conductive regions107prior to the cutting step aimed at individualizing the integrated circuit chips. This is due in particular to the fact that the metal alloy with a high bismuth content has a higher surface tension in the liquid state than known alloys, in particular the SAC alloy.

In addition, the high-bismuth alloy has the advantage that it can be used to replace expensive alloys, such as gold-tin alloy, for the production of solder joints in a material with a melting point strictly higher than that of the SAC alloy. In this case, the high-bismuth alloy, for example, at least partially coats a bottom face of an integrated circuit chip superimposed on another integrated circuit chip, for example of the type of the chip119previously described in relation withFIG.1E.

Various embodiments and variants have been described. The person skilled in the art will understand that certain features of these embodiments and variants could be combined, and other variants will readily occur to those skilled in the art.

Finally, the practical implementation of the embodiments and variants described herein is within the capabilities of those skilled in the art based on the functional description provided hereinabove. In particular, the bismuth content in the metal alloy of the conductive regions107can be adjusted according to the application, for example in order to obtain a compromise between an increase in the surface tension of the alloy in the liquid state, obtained by increasing the bismuth content in the alloy, and an increase in the wettability of the flanks of the electronic components100, obtained by decreasing the bismuth content in the alloy.

An electronic component (100) includes an integrated circuit chip (119); a package (111,113) surrounding the integrated circuit chip; and at least a first conductive region (107) at least partially coating one side of the integrated circuit chip, the first conductive region including an alloy predominantly including bismuth.

In one embodiment, the alloy has a bismuth content of over 80%, preferably equal to approximately 90%.

In one embodiment, the alloy further includes at least one additive element selected from silver, nickel and tin.

In one embodiment, the alloy has a content of the at least one additive element of less than 10%, preferably equal to approximately 5%.

In one embodiment, the alloy has: a bismuth content equal to approximately 90%; a silver content equal to approximately 5%; and a nickel content equal to approximately 5%.

In one embodiment, the alloy has a melting point of between 27° and 290° C.

An electronic device (200) includes a support and interconnection substrate (203); at least one contact-making element (205) located on one face of the support and interconnection substrate; at least one electronic component (100); and at least one second conductive region (207) interposed between the at least one contact making element and the at least one first conductive region (107) of the electronic component.

In one embodiment, the second conductive region (207) covers a flank of the electronic component (100).

In one embodiment, the second conductive region (207) is made of an alloy of tin, silver and copper.

A motor vehicle includes at least one device (200).

A method of manufacturing an electronic component (100) includes an integrated circuit chip (119) and a package (111,113) surrounding the integrated circuit chip, the method including the step of at least partially coating a face of the integrated circuit chip with a first conductive region (107) including an alloy predominantly comprising bismuth.