IMAGE PROCESSING SUPPORT DEVICE, IMAGE PROCESSING SUPPORT METHOD, AND COMPUTER READABLE MEDIUM

An engine characteristic acquisition unit (22) acquires an engine characteristic indicating calculation information with a calculation formula by taking information on image data of a processing target as an input, with respect to each of one or more types of engines that can be used in a target image process among engines corresponding to each of a plurality of types of processors. An apparatus characteristic acquisition unit (23) acquires an apparatus characteristic indicating a correction content for the calculation formula indicated by the engine characteristic with respect to one or more types of processors included in a target apparatus among the plurality of types of processors. In a case in which a designated process being an image process designated is performed by a designated apparatus being an apparatus designated, a calculation unit (21) calculates calculation information based on an engine characteristic and an apparatus characteristic with respect to an engine being a calculation target, by taking each of one or more engines that can be used in the designated process, and that are included in the designated apparatus, as the engine being the calculation target.

TECHNICAL FIELD

The present disclosure relates to a technique to support selection of an engine to perform image processing.

BACKGROUND ART

Patent Literature 1 discloses an image processing device to effectively perform image processing using an arithmetic unit. In Patent Literature 1, a processing procedure of image processing, an expected used memory amount and an expected processing time are determined for each parameter set fixedly. The parameter is information fixed depending on the arithmetic unit such as an execution unit of arithmetic processing and a transfer unit of image data.

CITATION LIST

Patent Literature

Patent Literature 1: JP2015-18363 A

SUMMARY OF INVENTION

Technical Problem

In Patent Literature 1, a processing procedure of image processing, an expected used memory amount and an expected processing time are determined for each parameter set fixedly. Therefore, it is impossible to calculate the used memory amount and the processing time flexibly in accordance with various types of image processing desired by a user. Further, the number of parameters is increased when it is attempted to handle arithmetic units mounted on various apparatuses.

The present disclosure is aimed at making it possible to calculate at least either of the used memory amount and the processing time flexibly corresponding to various types of image processing desired by a user without managing a large amount of information.

Solution to Problem

An image processing support device according to the present disclosure includesan engine characteristic acquisition unit to acquire, by taking each of a plurality of image processes as a target image process, an engine characteristic indicating a calculation formula to calculate calculation information being at least either of a used memory amount and a processing time in a case in which the target image process is performed with respect to each of one or more engines that can be used in the target image process among one or more engines corresponding to each of a plurality of types of processors, the calculation formula using information on image data being a processing target as an input,an apparatus characteristic acquisition unit to acquire, by taking each of a plurality of apparatuses as a target apparatus, apparatus characteristic information indicating a correction content for the calculation formula indicated by the engine characteristic with respect to one or more types of processors that are included in the target apparatus among the plurality of types of processors, anda calculation unit to calculate the calculation information in a case in which a designated process being an image process designated among the plurality of image processes is performed by a designated apparatus being an apparatus designated among the plurality of apparatuses, by taking each of one or more engines that can be used in the designated process, and corresponds to a processor included in the designated apparatus as an engine being a calculation target, based on the engine characteristic and the apparatus characteristic information with respect to the engine being the calculation target.

Advantageous Effects of Invention

In the present disclosure, calculation information is calculated based on an engine characteristic of an engine being a target of calculation and an apparatus characteristic. The calculation information is at least either of a used memory amount and a processing time. In this manner, it is possible to make it possible to calculate at least either of the used memory amount and the processing time flexibly corresponding to various types of image processing desired by a user without managing a large amount of information.

DESCRIPTION OF EMBODIMENTS

First Embodiment

Description will be made on a configuration of an image processing support device10according to a first embodiment with reference toFIG.1.

The image processing support device10is a computer.

The image processing support device10includes hardware components of a processor11, a memory unit12, a storage unit13and a communication interface14. The processor11is connected to the other hardware components via signal lines, and controls these other hardware components.

The processor11is an IC to perform processing. IC is an abbreviation for Integrated Circuit. The processor11is, for example, a CPU. CPU is an abbreviation for Central Processing Unit.

The memory unit12is a storage device to temporarily store data. The memory unit12is, for example, an SRAM or a DRAM. SRAM is an abbreviation for Static Random Access Memory. DRAM is an abbreviation for Dynamic Random Access Memory.

The storage unit13is a storage device to store data. The storage unit13is, for example, an HDD. HDD is an abbreviation for Hard Disk Drive. Further, the storage unit13may be a portable recording medium such as an SD (registered trademark) memory card, a CompactFlash (registered trademark), a NAND Flash memory, a flexible disk, an optical disk, a compact disk, a Blue-ray (registered trademark) disk, a DVD or the like. SD is an abbreviation for Secure Digital. DVD is an abbreviation for Digital Versatile Disk.

The communication interface14is an interface to communicate with an external device. The communication interface14is, for example, a port of an Ethernet (registered trademark), a USB or an HDMI (registered trademark). USB is an abbreviation for Universal Serial Bus. HDMI is an abbreviation for High-Definition Multimedia Interface.

The image processing support device10is connected to an input device15and a display device16via the communication interface14.

The image processing support device10includes a calculation unit21, an engine characteristic acquisition unit22and an apparatus characteristic acquisition unit23, as functional components. The functions of each functional component of the image processing support device10are realized by software.

The storage unit13stores programs to realize the functions of each functional component of the image processing support device10. These programs are read into the memory unit12by the processor11, and executed by the processor11. In this manner, the functions of each functional component of the image processing support device10are realized.

The storage unit13realizes a module storage unit31and an apparatus characteristic storage unit32.

InFIG.1, only one processor11is illustrated. However, there may be a plurality of processors11, and the plurality of processors11may execute the programs to realize each function in cooperation with one another.

Description will be made on an operation of the image processing support device10according to First Embodiment with reference toFIG.2throughFIG.18.

The operation procedure of the image processing support device10according to First Embodiment corresponds to an image processing support method according to First Embodiment. Further, the programs to realize the operation of the image processing support device10according to First Embodiment correspond to an image processing support program according to First Embodiment.

First, information to be stored in the module storage unit31and the apparatus characteristic storage unit32will be described. In addition, a flow of the processing of the image processing support device10will be described.

Description will be made on the information stored in the module storage unit31according to First Embodiment with reference toFIG.2.

The module storage unit31stores an image processing module311for each of a plurality of sets of image processing.

Description will be made on the image processing module311according to First Embodiment with reference toFIG.3.

The image processing module311includes an engine312, a parameter313and an engine characteristic314for each type of processors. The engine312is a program to perform image processing. The parameter313indicates a restriction related to the engine312. The engine characteristic314indicates a calculation formula to calculate calculation information being at least either of the used memory amount and the processing time in a case of performing image processing. The engine characteristic314indicates a calculation formula with information on image data being the processing target as an input.

InFIG.3, an engine CPU312A for CPU, an engine GPU312B for GPU and an engine FPGA312C for FPGA are indicated as the engine312. GPU is an abbreviation for Graphics Processing Unit. FPGA is an abbreviation for Field-Programmable Gate Array.

As the engine characteristic314, an engine characteristic CPU314A for CPU, an engine characteristic GPU314B for GPU and an engine characteristic FPGA314C for FPGA are indicated.

The engine312that can be used differs depending on the image processing module311. For example, there is a case in which the engine312that can be used is only the GPU312B depending on the image processing module311. In this case, the image processing module311includes only the engine GPU312B for GPU as the engine312.

Description will be made on the parameter313according to First Embodiment with reference toFIG.4.

In the parameter313, contents of restriction are set for each parameter name indicating an item to which a restriction is set.

InFIG.4, an example of the parameter common313X is indicated. InFIG.4, “unrestricted” is indicated for an item of a size of a target image. Further, “RGB or Gray Scale” is indicated for an item of a corresponding pixel. RGB is an abbreviation for Red-Green-Blue color model.

Description will be made on the engine characteristic314according to First Embodiment with reference toFIG.5throughFIG.7.

FIG.5indicates an example of the engine characteristic CPU314A. For the engine characteristic CPU314A, a content is set for each engine characteristic name. InFIG.5, as the engine characteristic name, an input interface, an output interface, a CPU memory usage, a CPU processing time are set.

For the input interface, it is indicated that all images are input collectively. For the output interface, it is indicated that all images are output collectively.

For the CPU memory usage, a calculation formula of a used amount of memory by the CPU is indicated. Specifically, it is indicated that the used memory amount by the CPU is the sum of α_CPUmemory usageand (W+2)×(H+3+1)×(D/8). α_CPUmemory usageis a basic used amount of memory by a CPU. The basic used amount of memory by the CPU is, for example, a used memory amount that becomes necessary in activating the CPU by an OS, and a used memory amount for managing an engine. OS is an abbreviation for Operating System. α_CPUmemory usageis mathematized according to measurement or the like in preparation of the engine. W is a width of the image data being the target of processing. H is a height of the image data being the target of processing. D is the number of bits per pixel constituting the image data being the target of processing.

For the CPU processing time, a calculation formula of the processing time by the CPU is indicated. Specifically, it is indicated that the processing time by the CPU is the sum of α_CPUprocessing timeand (W+2)×(H+3+1)×D. α_CPUprocessing timeis a CPU processing time which is fixed for an engine. The CPU processing time fixed for the engine is, for example, an interruption response time of the OS and a variable initialization time of the engine. α_CPUprocessing timeis mathematized according to measurement or the like in preparation of the engine. W, H and D are as described above.

In First Embodiment, the processing time is not an absolute time of second etc., but a relative time based on a standard prescribed separately.

FIG.6illustrates an example of the engine characteristic GPU314B. In the engine characteristic GPU314B, a content is set for each engine characteristic name. InFIG.6, as the engine characteristic name, an input interface, an output interface, a CPU memory usage, a GPU memory usage, a CPU processing time and a GPU processing time are set. Even in a case of using the GPU, processing of the CPU occurs. Therefore, the CPU memory usage and the CPU processing time are set.

For the input interface, the output interface, the CPU memory usage and the CPU processing time, the same information as inFIG.5is indicated,

For the GPU memory usage, a calculation formula of the processing time by the GPU is indicated. Specifically, it is indicated that the GPU memory usage is the sum of α_GPUmemory usageand (W+2)×(H+3+1)×(D/8). α_GPUmemory usageis a basic used amount of memory by the GPU. The basic used memory amount by the GPU is, for example, a used memory amount to become necessary in activating the GPU by the OS, and a used memory amount for managing the engine. α_GPUmemory usageis mathematized according to measurement or the like in preparation of the engine. W, H and D are as described above.

For the GPU processing time, a calculation formula of the processing time by the GPU is indicated. Specifically, it is indicated that the processing time by the GPU is the sum of α_GPUprocessing timeand (W+2)×(H+3+1)×D. α_GPUprocessing timeis a GPU processing time which is fixed for the engine. The GPU processing time fixed for the engine is, for example, an interruption response time of the OS and a variable initialization time of the engine. α_GPUprocessing timeis mathematized according to measurement or the like in preparation of the engine. W, H and D are as described above.

FIG.7illustrates an example of the engine characteristic FPGA314C. In the engine characteristic FPGA314C, a content is set for each engine characteristic name. InFIG.7, as the engine characteristic name, an input interface, an output interface, a CPU memory usage, a CPU processing time and an FPGA processing time are set. Even in a case of using the FPGA, processing of the CPU occurs. Therefore, the CPU memory usage and the CPU processing time are set.

For the input interface, the output interface, the CPU memory usage and the CPU processing time, the same information as inFIG.5is indicated.

For the FPGA processing time, a calculation formula of the processing time by the FPGA is indicated. Specifically, it is indicated that the processing time by the FPGA is the sum of α_FPGAprocessing timeand (W+2)×(H+3+1)×D. α_FPGAprocessing timeis the CPU processing time which is fixed for the engine. The FPGA processing time fixed for the engine is, for example, an interruption response time of the OS and a variable initialization time of the engine. α_FPGAprocessing timeis mathematized according to measurement or the like in preparation of the engine. W, H and D are as described above.

Description will be made on information to be stored in the apparatus characteristic storage unit32according to First Embodiment with reference toFIG.8.

The apparatus characteristic storage unit32stores an apparatus characteristic321for each of a plurality of apparatuses50. The apparatus50is a computer to perform image processing. The hardware configuration differs depending on the apparatus50. For example, a CPU or the like mounted thereon differs depending on the apparatus50.

Description will be made on the apparatus characteristic321according to First Embodiment with reference toFIG.9.

The apparatus characteristic321stores apparatus characteristic information322and a library323corresponding to the type of a processor included in the apparatus50. The apparatus characteristic information322indicates a correction content with respect to a calculation formula indicated by the engine characteristic. The library323indicates a program, a function and the like provided by OSS, a hardware vendor or the like in order to efficiently use the CPU, the GPU and the FPGA included in the apparatus50. OSS is an abbreviation for Open Source Software.

InFIG.9, as the apparatus characteristic information322, an apparatus characteristic common322X common to the CPU, the GPU and the FPGA, an apparatus characteristic CPU322A for CPU, an apparatus characteristic GPU322B for GPU and an apparatus characteristic FPGA322C for FPGA are indicated.

As the library323, a library CPU323A for CPU, a library GPU323B for GPU and a library FPGA323C for FPGA are indicated. For example, the CPU323A for CPU corresponds to a BLAS being a program and a function to operate arithmetic operation on the CPU at a high speed. BLAS is an abbreviation for Basic Linear Algebra Subprograms.

Description will be made on the apparatus characteristic information322according to First Embodiment with reference toFIG.10throughFIG.12.

FIG.10illustrates an example of the apparatus characteristic common322X. In the apparatus characteristic common322X, a content is set for each apparatus characteristic name. InFIG.10, as the apparatus characteristic name, a CPU memory usage and a CPU processing time are set.

For the CPU memory usage, a correction content for the CPU memory usage is indicated. Specifically, in the CPU memory usage, it is indicated that α_CPUmemory usageis replaced with β_CPUmemory usage.

For the CPU processing time, a correction content with respect to the CPU processing time is indicated. Specifically, in the CPU processing time, it is indicated that the CPU processing time is multiplied by β_CPUprocessing time.

FIG.11illustrates an example of the apparatus characteristic CPU322A. In the apparatus characteristic CPU322A, a content is set for each apparatus characteristic name. InFIG.11, as the apparatus characteristic name, an SIMD memory usage and an SIMD processing time are set. SIMD is an abbreviation for Single Instruction/Multiple Data.

For the SIMD memory usage, a correction content with respect to the CPU memory usage is indicated. Specifically, in the SIMD memory usage, it is indicated that α_CPUmemory usageis replaced with β_CPUSIMDmemory usage.

For the SIMD processing time, a correction content with respect to the CPU processing time is indicated. Specifically, in the SIMD processing time, it is indicated that the CPU processing time is multiplied by β_CPUSIMDprocessing time.

FIG.12illustrates an example of the apparatus characteristic GPU322B. In the apparatus characteristic GPU322B, a content is set for each apparatus characteristic name. InFIG.12, as the apparatus characteristic name, a GPU memory usage, a GPU processing time and a GPU processing time overhead are set.

For the GPU memory usage, a correction content with respect to the GPU memory usage is indicated. Specifically, in the GPU memory usage, it is indicated that α_GPUmemory usageis replaced with β_GPUmemory usage.

For the GPU processing time, a correction content with respect to the GPU processing time is indicated. Specifically, in the GPU processing time, it is indicated that the GPU processing time is multiplied by β_GPUprocessing time.

For the GPU processing time overhead, a correction content with respect to the CPU processing time is indicated. Specifically, in the GPU processing time overhead, it is indicated that β_GPUprocessing timeoverhead is added to the CPU processing time. When processing using the GPU is performed, a communication preparation time is necessary between the CPU and the GPU. β_GPUprocessing time over headis the communication preparation time.

FIG.13illustrates an example of the apparatus characteristic FPGA322C. In the apparatus characteristic FPGA322C, a content is set for each apparatus characteristic name. InFIG.13, as the apparatus characteristic name, an FPGA processing time and an FPGA processing time overhead are set.

For the FPGA processing time, a correction content with respect to the FPGA processing time is indicated. Specifically, in the FPGA processing time, it is indicated that the FPGA processing time is multiplied by β_FPGAprocessing time.

For the FPGA processing time overhead, a correction content with respect to the CPU processing time is indicated. Specifically, in the FPGA processing time overhead, it is indicated that β_FPGAprocessing time over headis added to the CPU processing time. When processing using the FPGA is performed, a communication preparation time is necessary between the CPU and the FPGA. β_FPGAprocessing time over headis the communication preparation time.

Description will be made on an example of the hardware configuration of the apparatus50according to First Embodiment with reference toFIG.14throughFIG.17.

FIG.14illustrates a configuration of the apparatus50including a CPU51, a GPU52and an FPGA53as processors. The apparatus50includes a memory unit54, a DMAC55, an image input interface56and a result output interface57in addition to the CPU51, the GPU52and the FPGA53. DMAC is an abbreviation for Direct Memory Access Controller.

The memory unit54is a storage device to temporarily store data as with the memory unit12. The memory54is, for example, an SRAM and a DRAM. The DMAC55is an IC to perform control over DMA transfer. The image input interface56is an interface to input an image. The result output interface57is an interface to output a processing result. The image input interface56and the result output interface57are, for example, USB ports.

FIG.15illustrates a configuration of the apparatus50provided with only the CPU51as a processor. The apparatus50illustrated inFIG.15is the same as the apparatus50illustrated inFIG.14except that the apparatus50inFIG.15is not provided with the GPU52and the FPGA53.

FIG.16illustrates a configuration of the apparatus50provided with only the CPU51and the GPU52as processors. The apparatus50illustrated inFIG.16is the same as the apparatus50illustrated inFIG.14except that the apparatus50inFIG.16is not provided with the FPGA53.

FIG.17illustrates a configuration of the apparatus50provided with only the CPU51and the FPGA53as processors. The apparatus50illustrated inFIG.17is the same as the apparatus50illustrated inFIG.14except that the apparatus50inFIG.17is not provided with the GPU52.

The apparatus characteristic321described with reference toFIG.9is supposed to have a configuration including the CPU51, the GPU52and the FPGA53as processors, as with the apparatus50illustrated inFIG.14.

The apparatus characteristic321stores apparatus characteristic information322and a library323corresponding to the type of the processers. Therefore, in a case in which an apparatus50is provide with only the CPU51as the processor, as with the apparatus50illustrated inFIG.15, for example, information for the GPU and the FPGA is unnecessary. Specifically, the apparatus characteristic GPU322B for GPU, the apparatus characteristic FPGA322C for FPGA, the library GPU323B for GPU and the library FPGA323C for FPGA are unnecessary.

Description will be made on a flow of the processing of the image processing support device10according to First Embodiment with reference toFIG.18.

The calculation unit21accepts input of designation of image processing of a processing target, designation of the apparatus50to operate the image processing, and information with respect to image data being the processing target.

Specifically, the calculation unit21makes the image processing of the processing target be designated by causing a user to operate the input device15.

Similarly, the calculation unit21makes the apparatus50to operate the image processing be designated by causing the user to manipulate the input device15. Similarly, the calculation unit21makes the information with respect to the image data being the processing target be input by causing the user to manipulate the input device15.

The information on the image data being the processing target is supposed to include a width W, a height H and the number of bits D per pixel of the image data being the processing target. Hereinafter, the image processing designated is called designated processing. Further, the apparatus50designated is called a designated apparatus.

The engine characteristic acquisition unit22reads out an engine characteristic314included in an image processing module311with respect to the designated processing from the module storage unit31.

The apparatus characteristic acquisition unit23reads out apparatus characteristic information322included in the apparatus characteristic321with respect to the designated apparatus from the apparatus characteristic storage unit32.

The calculation unit21calculates calculation information in a case of performing the designated processing by the designated apparatus.

In this case, the calculation unit21sets each of one or more engines that can be used in the designated processing, and that can be used by the designated apparatus as an engine being a calculation target. Then, the calculation unit21calculates the calculation information based on the engine characteristic314and the apparatus characteristic information322with respect to the engine being the calculation target. The calculation unit21displays the calculation information calculated on the display device16.

As a concrete example, the image processing module311with respect to the designated processing is supposed to be the image processing module311illustrated inFIG.3. Further, the apparatus characteristic321with respect to the designated apparatus is supposed to be the apparatus characteristic321illustrated inFIG.9.

In this case, the image processing module311includes the CPU312A, the engine GPU312B and the engine FPGA312C as the engine312. That is, in the designated processing, it is possible to use the engine CPU312A, the engine GPU312B and the engine FPGA312C. Further, the apparatus characteristic321includes the apparatus characteristic CPU322A, the apparatus characteristic GPU322B and the apparatus characteristic FPGA322C. That is, the designated apparatus includes processors of the CPU51, the GPU52and the FPGA53. The apparatus50is supposed to be capable of using the engines corresponding to the processors included in the apparatus50. Therefore, the designated apparatus is capable of using the engine CPU312A, the engine GPU312B and the engine FPGA312C.

Therefore, the calculation unit21sets each of the engine CPU312A, the engine GPU312B and the engine FPGA312C as the engine being the calculation target.

For example, the designated apparatus is supposed to be equipped with only the CPU51and the GPU52, and be not equipped with the FPGA53, as the processors. In this case, the apparatus50is capable of using the engine CPU312A and the engine GPU312B, and is not capable of using the engine FPGA312C.

Therefore, the calculation unit21sets each of the engine CPU312A and the engine GPU312B as the engine being the calculation target.

Description will be made concretely on a calculation method of the calculation information.

Description will be made on calculation of a used memory amount.

The engine CPU312A is supposed to be the engine being the calculation target. In this case, the calculation unit21calculates the used memory amount using the calculation formula of the CPU memory usage inFIG.5. At this time, the calculation unit21substitutes the width W, the height H and the number of bits D per pixel of the image data being the processing target input in Step S11in the calculation formula. It is supposed that the width W is 640, the height H is 480 and the number of bits D per pixel is 8 bits (grayscale with 8-bit color depth). Then, the used memory amount is α_CPUmemory usage+(640+2)×(480+3+1)×(8/8).

As described above, α_CPUmemory usageis a basic used memory amount by the CPU, and is mathematized. By entering the width W, the height H, the number of bits D per pixel of the image data being the processing target and the like in the formula of α_CPUmemory usageas well, the used memory amount in a case of performing the designated processing by a general apparatus50is calculated.

The calculation unit21refers to the apparatus characteristic information322of the designated apparatus, and corrects the used memory amount. Description will be made on the assumption that SIMD is not performed. The calculation unit21refers to the correction content with respect to the used memory amount inFIG.10. Then, the calculation unit21replaces α_CPUmemory usagewith β_CPUmemory usage. That is, the calculation unit21calculates β_CPUmemory usage+(640+2)×(480+3+1)×(8/8) instead of α_CPUmemory usage+(640+2)/(480+3+1)×(8/8).

β_CPUmemory usageis also mathematized. Then, by entering the width W, the height H, the number of bits D per pixel of the image data being the processing target and the like in the formula of β_CPUmemory usageas well, the used memory amount in the case of performing the designated processing by the designated apparatus is calculated.

When SIMD is performed, β_SIMDmemory usageinFIG.11is used instead of β_CPUmemory usage.

When the engine GPU312B is the engine being the calculation target, the calculation unit21calculates the used memory amount by using the calculation formula of the CPU memory usage inFIG.6and the calculation formula of the GPU memory usage inFIG.6. The sum of the used memory amount obtained by the calculation formula of the CPU memory usage, and the used memory amount obtained by the calculation formula of the GPU memory usage is the used memory amount in the case in which the engine GPU312B is the engine being the calculation target.

The calculation method of the CPU memory usage is the same as the case in which the engine CPU312A is the engine being the calculation target. The calculation method of the GPU memory usage is mostly similar to the calculation method of the CPU memory usage. That is, the calculation unit21substitutes the width W, the height H and the number of bits D per pixel of the image data being the processing target in the calculation formula. Then, the calculation unit21refers to the apparatus characteristic information322of the designated apparatus, and calculates the formula of β_GPUmemory usageby replacing α_GPUmemory usagewith β_GPUmemory usage.

When the engine FPGA312C is the engine being the calculation target, the calculation unit21calculates the used memory amount using the calculation formula of the CPU memory usage inFIG.7. The calculation method of the CPU memory usage is the same as the case in which the engine CPU312A is the engine being the calculation target.

Description will be made on calculation of the processing time.

The engine CPU312A is supposed to be the engine being the calculation target. In this case, the calculation unit21calculates the processing time using the calculation formula of the CPU processing time inFIG.5. At this time, the calculation unit21substitutes the width W, the height H and the number of bits D per pixel of the image data of processing target input in Step S11in the calculation formula. It is assumed that the width W is 640, the height H is 480 and the number of bits D per pixel is 8 bits (grayscale with 8-bit color depth). Then, the processing time is α_CPUprocessing time+(640+2)×(480+3+1)×(8/8).

As described above, α_CPUprocessing timeis a CPU processing time which is fixed for an engine, and mathematized. By entering the width W, the height H, the number of bits D per pixel of the image data being the processing target and the like in the formula of α_CPUprocessing time, the processing time in the case of performing the designated processing by the general apparatus50is calculated.

The calculation unit21refers to the apparatus characteristic information322of the designated apparatus, and corrects the processing time. Description will be made on the assumption that SIMD is not performed. The calculation unit21refers to the correction content with respect to the memory processing time inFIG.10. Then, the calculation unit21multiplies also the processing time in the case of performing the designated processing by the general apparatus50by β_CPUprocessing time. β_CPUprocessing timeis also mathematized. By entering the width W, the height H, the number of bits D per pixel of the image data being the processing target and the like in the formula of β_CPUprocessing timeas well, the processing time in the case of performing the designated processing by the designated apparatus is calculated.

When SIMD is performed, β_SIMDprocessing timeinFIG.11is used instead of β_CPUprocessing time.

When the engine GPU312B is the engine being the calculation target, the calculation unit21calculates the processing time by using the calculation formula of the CPU processing time inFIG.6and the calculation formula of the GPU processing time inFIG.6. Herein, the CPU processing time and the GPU processing time are calculated separately.

The calculation method of the CPU processing time is mostly the same as the case in which the engine CPU312A is the engine being the calculation target. The calculation method of the CPU processing time differs in that β_CPUprocessing time over headis added to the processing time calculated in the case in which the engine CPU312A is the engine being the calculation target.

The calculation method of the GPU processing time is mostly similar to the calculation method of the CPU processing time. That is, the calculation unit21substitutes the width W, the height H and the number of bits D per pixel of the image data of processing target in the calculation formula. Then, the calculation unit21refers to the apparatus characteristic information322of the designated apparatus, and multiplies the processing time calculated by β_GPUprocessing time.

When the engine FPGA312C is the engine being the calculation target, the calculation unit21calculates the processing time using the calculation formula of the CPU processing time inFIG.7and the calculation formula of the FPGA processing time inFIG.7. Herein, the CPU processing time and the FPGA processing time are calculated separately.

The calculation method of the CPU processing time is mostly the same as the case in which the engine CPU312A is the engine being the calculation target. The calculation method of the CPU processing time differs in that β_FPGAprocessing timeoverhead is added to the processing time calculated in the case in which the engine CPU312A is the engine being the calculation target.

The calculation method of the FPGA processing time is mostly similar to the calculation method of the CPU processing time. That is, the calculation unit21substitutes the width W, the height H and the number of bits D per pixel of the image data being the processing target in the calculation formula. Then, the calculation unit21refers to the apparatus characteristic information322of the designated apparatus, and multiplies the processing time calculated by β_FPGAprocessing time.

***Effect of First Embodiment***

As described above, the image processing support device10according to First Embodiment calculates the calculation information based on the engine characteristic and the apparatus characteristic with respect to the engine being the calculation target. The calculation information is at least either of the used memory amount and the processing time. In this manner, it is possible to calculate at least either of the used memory amount and the processing time flexibly corresponding to various types of image processing desired by a user without managing a large amount of information.

The user is capable of recognizing at least either of the used memory amount and the processing time in the case of performing the designated processing by the designated apparatus. In this manner, it is easy to consider how to combine a plurality of sets of image processing and to realize integration processing. Further, it becomes easier to select the apparatus50to perform the integration processing.

In Step S11ofFIG.18, two or more sets of image processing may be designated as the designated processing. In this case, the calculation unit21calculates calculation information for each of the two or more sets of designated processing.

In Step S11ofFIG.18, an execution order of the designated processing may be designated, as illustrated inFIG.19. In this case, the execution order may be designated so that a part of the designated processing is executed in parallel.

FIG.19illustrates that image processing A, image processing B and image processing C are performed in order by using the image data as input, and the result is output.FIG.19illustrates that this series of processing is repeatedly performed. Then, when the image processing B is performed in the n-th processing, the n+1-th image processing A is performed in parallel. Further, when the image processing C is performed in the n′-th processing, the n′+1-th image processing B is performed in parallel.

In this case, it is supposed that the CPU is used in any of the image processing A, the image processing B and the image processing C. Then, there may be a case in which three sets of image processing are performed in parallel by using the CPU. When the CPU performs a plurality of sets of processing in parallel, it is impossible for the CPU to exhibit the same performance as in the case of performing only one processing. Therefore, in this case, the calculation unit21corrects the processing time. At this time, the calculation unit21adds a correction corresponding to the number of parallels. As a concrete example, the calculation unit21multiplies the processing time calculated by a value7corresponding to the number of parallels. The value7is a value corresponding to an overhead such as context switching of the OS occurred in the parallel processing, and the like.

In First Embodiment, each functional component is realized by software. However, each functional component may be realized by hardware, as Third Variation. With respect to Third Variation, description will be made on parts different from First Embodiment.

Description will be made on a configuration of the image processing support device10according to Third Variation with reference toFIG.20.

When each functional component is realized by a hardware component, the image processing support device10is equipped with an electronic circuit17instead of the processor11, the memory unit12and the storage unit13. The electronic circuit17is a dedicated circuit to realize each functional component, and the functions of the memory unit12and the storage unit13.

As the electronic circuit17, a single circuit, a composite circuit, a programmed processor, a parallel-programmed processor, a logic IC, a GA, an ASIC or an FPGA is supposed. GA is an abbreviation for “Gate Array”. ASIC is an abbreviation for “Application Specific Integrated Circuit”.

Each functional component may be realized by one electronic circuit17, or may be dispersedly realized by a plurality of electronic circuits17.

As fourth variation, a part of each functional component may be realized by a hardware component, and another part of each functional component may be realized by software.

The processor11, the memory unit12, the storage unit13and the electronic circuit17are called processing circuitry. That is, the functions of each functional component are realized by the processing circuitry.

Further, “unit” in the description above may be replaced with “circuit”, “step”, “procedure”, “process” or “processing circuitry”.

Second Embodiment

Second Embodiment is different from First Embodiment in that an engine of which the calculation information satisfies a limiting value is specified. In Second Embodiment, this different part will be described, and description for the same part will be omitted.

Description will be made on an operation of the image processing support device10according to Second Embodiment with reference toFIG.19,FIG.21andFIG.22.

As illustrated inFIG.21, the image processing module311with respect to the image processing AinFIG.19includes the information for CPU, the information for GPU and the information for FPGA. The image processing module311with respect to the image processing B inFIG.19includes the information for CPU and the information for GPU. The image processing module311with respect to the image processing C inFIG.19includes the information for CPU and the information for FPGA.

The relation between each image processing and a processor to perform each image processing is as illustrated inFIG.22. In this case, there are 12 patterns of processors to perform each image processing: three types with respect to the image processing A×two types with respect to the image processing B×two types with respect to the image processing C.

The calculation unit21calculates the used memory amount and the processing time for each pattern. Then, the calculation unit21specifies patterns that satisfy the limiting value.

For example, it is assumed that the processing time of equal to or smaller than X [ms (milliseconds)] is given as the limiting value. In this case, the calculation unit21extracts all patterns in which the processing time is equal to or smaller than X [ms]. Then, the calculation unit21displays information to indicate the patterns extracted on the display device16.

***Effect of Second Embodiment***

As described above, the image processing support device10according to Second Embodiment specifies the engine of which the calculation information satisfies the limiting value. In this manner, it is possible for the user to easily specify the engine that satisfies a condition expected.

The calculation unit21may generate and output an execution module being software to realize integration processing to combine engines to perform image processing with respect to the pattern extracted. Further, the calculation unit21may output not only the engines but also a library323included in the apparatus characteristic321related to the engines.

In Second Embodiment, the engine of which the calculation information satisfies the limiting value is specified. However, the calculation unit21may specify an engine with the best calculation information. The best calculation information means that the used memory amount is smallest, or the processing time is shortest. Otherwise, it may be possible to decide whether the calculation information is best based on an evaluation value obtained by combining the used memory amount and the processing time. For example, it may be possible to suppose that the best calculation information means that the evaluation value obtained by applying weighted addition to the used memory amount and the processing time is smallest.

In this case, it is unnecessary to set the limiting value as in Second Embodiment.

In the above, description has been made on the embodiments and the variations of the present disclosure. Some of these embodiments and variations may be combined and performed. Otherwise, any one or some may be partially performed. The present disclosure is not limited to the embodiments and the variations above, and various modifications can be added as needed.

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