A component-embedded substrate includes: a resin substrate having a mount surface and a peripheral surface surrounding a perimeter of the mount surface; a first mounted component mounted on the mount surface; a second mounted component mounted on the mount surface and spaced from the first mounted component; a first chip-type electronic component disposed in the resin substrate; and a second chip-type electronic component disposed in the resin substrate and spaced from the first chip-type electronic component. The first and second chip-type electronic components are spaced from each other along a cross direction crossing an arrangement direction along which the first mounted component and the second mounted component that are arranged with respect to each other. The first and second chip-type electronic components are each arranged to cross the cross direction.

TECHNICAL FIELD

The present invention relates to a component-embedded substrate, and particularly relates to a component-embedded substrate in which electronic components are mounted.

BACKGROUND ART

Recently, a variety of electronic devices such as mobile communication terminal and notebook PC have increasingly been enhanced in performance and reduced in size, and accordingly the electronic device is mounted with a semiconductor module or the like.

For example, a semiconductor module disclosed in Japanese Patent Laying-Open No. 2005-197389 includes: a substrate having an insulating layer and a conductor layer; a reinforcement portion provided in a peripheral portion of the substrate; and an electronic component provided in a component-mounted region of the substrate.

In this semiconductor module, the peripheral portion of the substrate is reinforced by the reinforcement portion provided in the peripheral portion, and occurrence of cracks to end faces of the substrate is thus suppressed.

A semiconductor module disclosed in Japanese Patent Laying-Open No. 2005-197354 includes a multilayer substrate, a cavity formed in a component-mount surface of the multilayer substrate, and an electronic component provided in this cavity. The cavity extends to a side surface of the multilayer substrate, and an end of the cavity is opened to the side surface of the multilayer substrate.

CITATION LIST

Patent Document

SUMMARY OF INVENTION

Technical Problem

The semiconductor module disclosed in Japanese Patent Laying-Open No. 2005-197389, however, has problems such as the need to provide the reinforcement portion and the reduction of the area where the electronic component is mounted.

The semiconductor module disclosed in Japanese Patent Laying-Open No. 2005-197354 also has a problem that formation of the cavity undesirably makes it more likely that cracks will occur.

The present invention has been made in view of the above problems, and an object of the invention is to provide a component-embedded substrate that enables occurrence of cracks to be suppressed.

Solution to Problem

A component-embedded substrate according to the present invention includes: a resin substrate having a mount surface and a peripheral surface surrounding a perimeter of the mount surface; a first mounted component mounted on the mount surface; a second mounted component mounted on the mount surface and spaced from the first mounted component; a first chip-type electronic component disposed in the resin substrate; and a second chip-type electronic component disposed in the resin substrate and spaced from the first chip-type electronic component. The mount surface includes, as seen from above the mount surface: a first region located between the first mounted component and the second mounted component and extending along a cross direction crossing an arrangement direction along which the first mounted component and the second mounted component are arranged with respect to each other; a second region located opposite to the second mounted component with respect to the first region; and a third region located opposite to the first mounted component with respect to the first region. The first chip-type electronic component and the second chip-type electronic component are spaced from each other along the cross direction. The first chip-type electronic component and the second chip-type electronic component are arranged to extend from the second region across the first region to the third region as seen from above the mount surface.

Preferably, at least one of the first chip-type electronic component and the second chip-type electronic component is arranged to extend from below the first mounted component across the first region to below the second mounted component, as seen from above the mount surface.

Preferably, the component-embedded substrate further includes: a third mounted component mounted on the mount surface and spaced from the first mounted component and the second mounted component; and a third chip-type electronic component disposed in the resin substrate. The third chip-type electronic component is arranged to extend from below the first mounted component to below the third mounted component, or from below the second mounted component to below the third mounted component, as seen from above the mount surface.

Preferably, the first chip-type electronic component is located relatively closer to the peripheral surface of the resin substrate as compared with the third chip-type electronic component. The first chip-type electronic component is larger in size than the third chip-type electronic component.

Preferably, the resin substrate has a lower surface located opposite to the mount surface. The first chip-type electronic component is located relatively closer to the mount surface than to the lower surface.

Preferably, the component-embedded substrate further includes a fourth chip-type electronic component disposed in the resin substrate. The resin substrate has a lower surface located opposite to the mount surface. The fourth chip-type electronic component is located relatively closer to the lower surface as compared with the first chip-type electronic component. The first chip-type electronic component is larger in size than the fourth chip-type electronic component.

Advantageous Effects of Invention

The component-embedded substrate of the present invention enables occurrence of cracks to be suppressed.

DESCRIPTION OF EMBODIMENTS

A description will be given of a resin substrate and an electronic device having this resin substrate according to the present invention.

First Embodiment

FIG. 1is a plan view showing a part of an electronic device1according to a first embodiment, andFIG. 2is a cross-sectional view along a line II-II shown inFIG. 1.FIG. 3is a cross-sectional view along a line III-III shown inFIG. 1.

As shown inFIGS. 1 to 3, electronic device1includes a circuit board2and a component-embedded substrate3implemented on a main surface of circuit board2. On the main surface of circuit board2, a circuit interconnect37is formed, and component-embedded substrate3is connected to circuit interconnect37by a joint member26such as solder.

InFIG. 2, component-embedded substrate3includes a resin substrate5having a mount surface4, a surface conductor6formed on mount surface4, an internal conductor8formed in resin substrate5, and a mounted component10and a mounted component11arranged on mount surface4and connected to surface conductor6by a joint member9such as solder.

Component-embedded substrate3includes chip-type electronic components12,13provided in resin substrate5. Resin substrate5is formed in a rectangular shape in the example shown inFIG. 1for example, has a lateral length L1of approximately 6.5 mm for example and a longitudinal length of approximately 5.0 mm for example.

The peripheral surface of resin substrate5includes a side surface20and a side surface21that are located with respect to each other along an arrangement direction D1, and a side surface22and a side surface23that are located with respect to each other along an arrangement direction D2.

Resin substrate5is formed by laminating a plurality of resin layers and thereafter heating the resin layers to which pressure is being applied. As a material for the resin layers, a thermosetting resin such as epoxy resin, a thermoplastic resin such as polyimide or liquid crystal polymer, or the like is used. Thermoplastic resins such as polyimide and liquid crystal polymer are preferable since layers of a thermoplastic resin are easy to be formed into a multilayer by lamination or compression bonding. In particular, the liquid crystal polymer is suitable as the material for resin layers of a chip component-embedded resin substrate to be used for a high-frequency circuit module, since the liquid crystal polymer has a high Q factor and low water absorbency. While the thickness of each resin layer is not particularly limited, the thickness thereof is preferably 10 to 100 μm.

InFIG. 2, surface conductor6is typically formed of a metal material. For example, as this metal material, a metal foil made of copper, silver, aluminum, SUS, nickel, or gold, or an alloy of any of them may be used. Preferably, a copper (Cu) foil is used since the copper foil has a low specific resistance and a small loss for a high-frequency band. While the thickness of surface conductor6is not particularly limited, the thickness thereof is preferably 5 to 50 μm.

Surface conductor6is formed on mount surface4of resin substrate5, and an electrode25is formed on the back surface (the surface opposite to the mount surface) of resin substrate5. Electrode25is also formed of a metal material similar to that for surface conductor6. Electrode25is connected to circuit interconnect37by a joint member26such as solder.

Internal conductor8is made up of a plurality of internal interconnects15and a plurality of vias16. As a material for internal interconnect15, a metal material similar to a metal foil made of a metal material which forms surface conductor6, for example, may be used. Via16is also formed by a cured conductive paste made of a conductive metal material.

Mounted components (first and second mounted components of the present invention)10,11include electrodes24disposed on the lower surfaces of mounted components10,11, and electrodes24of mounted components10,11are each connected to surface conductor6by a joint member9such as solder. Mounted components10,11are for example semiconductor chips. As shown inFIG. 1, mounted component10and mounted component11are spaced from each other. A length L3between mounted component10and mounted component11is approximately 0.5 mm for example.

In mount surface4, a region R1, a region R2, and a region R3are defined. Region R1is a region extending between mounted component10and mounted component11along direction D2which crosses arrangement direction D1along which mounted component10and mounted component11are arranged with respect to each other. Region R1extends from side surface20to side surface21. Region R1is located between a portion of mounted component10that is closest to mounted component11and a portion of mounted component11that is closest to mounted component10. In the example shown inFIG. 1, mounted component10and mounted component11are each formed in the shape of a substantially rectangular parallelepiped. Thus, region R1is located between a side portion of the peripheral portion of mounted component10that is closest to mounted component11, and a side portion of mounted component11that is closest to mounted component10.

Region R2is a region located opposite to mounted component11with respect to region R1. Region R3is a region located opposite to mounted component10with respect to region R1. Namely, region R2is a region where mounted component10is disposed, and region R3is a region where mounted component11is disposed.

Chip-type electronic components12,13are embedded in resin substrate5. These chip-type electronic components12,13are each a rectangular component body having side surfaces provided with side terminal electrodes.

Examples of chip-type electronic components12,13include passive components such as chip-type capacitor, chip-type resistor, and chip-type inductor, and active components such as IC, for example.

In connection with the present embodiment, an example will be described where chip-type capacitors are employed as chip-type electronic components12,13. In the first embodiment, chip-type electronic components12,13each have a lateral dimension of 0.6 mm, a longitudinal dimension of 0.3 mm, and a height dimension of 0.15 mm. These dimensions are given herein by way of example. Components designed to have other dimensions may also be employed.

InFIG. 2, chip-type electronic component13includes a dielectric body27having an internal electrode, an electrode28disposed on one side surface of dielectric body27, and an electrode29disposed on the other side surface of dielectric body27. Electrodes28,29are each formed of a laminated metal film of Ni (nickel) and Sn (tin), or the like.

InFIG. 3, chip-type electronic component12includes a dielectric body17, an electrode18disposed on one side surface of dielectric body17, and an electrode19disposed on the other side surface of dielectric body17. Electrodes18,19are each formed of a laminated metal film of Ni (nickel) and Sn (tin), or the like.

InFIG. 1, in the plan view of component-embedded substrate3as seen from above mount surface4, chip-type electronic components12,13are arranged to extend from region R2across region R1to region R3. Chip-type electronic components12,13are arranged to also extend from below mounted component10across region R1to below mounted component11.

Chip-type electronic component12is located relatively closer to side surface22as compared with chip-type electronic component13, and chip-type electronic component13is located relatively closer to side surface23as compared with chip-type electronic component12.

As shown inFIGS. 2 and 3, chip-type electronic components12,13are located relatively closer to mount surface4than to the lower surface of resin substrate5.

An elastic modulus of each of mounted component10, mounted component11, and resin substrate5is higher than an elastic modulus of chip-type electronic components12,13. The size of resin substrate5is larger than the size of mounted components10,11and chip-type electronic components12,13.

A description will be given of a case where an impact force is externally applied to electronic device1and component-embedded substrate3configured in the above-described manner.

The case where an impact force is applied to electronic device1and component-embedded substrate3may be the one where a user drops a mobile terminal or the like which is mounted with electronic device1and component-embedded substrate3.

At this time, because the elastic modulus of resin substrate5is higher than the elastic modulus of mounted components10,11, the impact force applied to component-embedded substrate3causes a flexure stress due to a flexure impact to be applied to resin substrate5, so that a part of resin substrate5, specifically the part located between mounted component10and mounted component11, is subjected to a large stress.

Regarding region R2, mounted component10is implemented in region R2and therefore the flexure stress is less likely to occur to region R2even when an impact force is applied thereto. Regarding region R3as well, mounted component11is mounted in region R3and therefore the flexure stress is less likely to occur to region R3even when an impact force is applied thereto. As a result, flexure occurs chiefly to region R1.

Meanwhile, chip-type electronic components12,13are arranged to extend from region R2where flexure is less likely to occur to region R1and further from region R1to region R3where flexure is less likely to occur.

Region R1is thus reinforced by chip-type electronic components12,13. Even when an impact force is applied to component-embedded substrate3, occurrence of cracks to resin substrate5is suppressed. Further, since chip-type electronic component12and chip-type electronic component13are spaced from each other along direction D2, a large extent of region R1is reinforced.

It should be noted here that when an impact force is applied to component-embedded substrate3, a greater flexure stress is exerted on the mount surface4side of resin substrate5, since mounted component10and mounted component11are disposed on mount surface4.

Regarding electronic device1and component-embedded substrate3of the first embodiment, chip-type electronic components12,13are located relatively closer to mount surface4than to the lower surface of resin substrate5, and thus the mount-surface4side of resin substrate5is reinforced by chip-type electronic components12,13. Therefore, even when an impact force is applied to resin substrate5, occurrence of cracks to resin substrate5can be suppressed. Accordingly, occurrence of cracks to component-embedded substrate3can surely be suppressed without the need to provide a special reinforcement member or the like.

A description will be given, usingFIGS. 4 to 17, of a method for manufacturing component-embedded substrate3and electronic device1configured in the above-described manner.

The method for manufacturing component-embedded substrate3generally includes: the step of forming a plurality of resin layers; the step of laminating the plurality of resin layers; the step of heating the plurality of resin layers to thereby form a first substrate in which cavities are formed that are to receive chip-type electronic components12,13; and the step of causing chip-type electronic components12,13to be received in this first substrate. The method for manufacturing component-embedded substrate3further includes the step of laminating a plurality of resin layers on the first substrate in which chip-type electronic components12,13are received, and the step of performing a heat treatment after the plurality of resin layers is formed on chip-type electronic components12,13.

FIGS. 4 to 12are cross-sectional views showing respective steps for manufacturing respective resin layers.

FIG. 4is a cross-sectional view showing the step of forming a first resin layer30. When resin layer30is to be formed, initially a resin sheet31is prepared that has a surface where a metal film made up of a metal foil of copper (Cu) or the like is formed and has a corner where a hole34is formed. Thereafter, the metal film is patterned by etching or the like to form an electrode25on resin sheet31. Next, in resin sheet31, a via hole32is formed by means of a laser or the like. Next, via hole32is filled with a paste33containing metal powder and an organic solvent or the like. In this way, resin layer30shown inFIG. 4is formed. In hole34, a columnar part of a mold is to be inserted, as described later herein, and hole34is formed in a corner for example of resin layer30.

FIG. 5is a cross-sectional view showing the step of forming a second resin layer35, andFIG. 6is a cross-sectional view showing the step of forming a third resin layer38.

When resin layers35,38are to be formed, initially resin sheets36,39are prepared that each have an upper surface where a metal film made up of a metal foil is formed, and the metal film is patterned by etching to form an internal interconnect15. Next, in resin sheets36,39, via holes32are formed, and the via holes are filled with paste33. In this way, resin layers35,38are formed.

FIG. 7is a cross-sectional view showing the step of forming a fourth resin layer40, andFIG. 8is a cross-sectional view showing the step of forming a fifth resin layer44. InFIGS. 7 and 8, when resin layers40,44are to be formed, resin sheets41,45are initially prepared so that each has an upper surface where a metal film made up of a metal foil is formed. Next, respective metal films are etched to form internal interconnects15on respective upper surfaces of resin sheets41,45.

Next, in resin sheets41,45, via holes32are formed by means of a laser. Then, via holes32are filled with paste33. In this way, resin layer40and resin layer44are formed.

FIG. 9is a cross-sectional view showing the step of forming a sixth resin layer47, and FIG.10is a cross-sectional view showing the step of forming a seventh resin layer49.FIG. 11is a cross-sectional view showing the step of forming an eighth resin layer51.

InFIGS. 9 to 11, when resin layers47,49,51are to be formed, initially resin sheets48,50,52are prepared that each has an upper surface where a metal film made up of a metal foil is formed. Next, respective metal films are etched to form internal interconnects15.

Next, in resin sheets48,50,52, via holes32are formed by means of a laser. Then, via holes32are filled with paste33. In this way, resin layer51is formed.

Next, in resin sheets48and50, hole portions42and46are formed by punching resin sheets41and45by means of a mold, respectively. In this way, resin layer47and resin layer49are formed.

FIG. 12is a cross-sectional view showing the step of forming a topmost resin layer53. InFIG. 12, when resin layer53is to be formed, initially a resin sheet54is prepared that has a top surface where a metal film made up of a metal foil is formed. Next, the metal film is patterned to form surface conductor6. Next, a hole34is formed in resin sheet54by means of a laser. In this way, resin layer53is formed.

FIG. 13is a cross-sectional view showing the step of laminating a plurality of resin layers. As shown inFIG. 13, when the resin layers are to be laminated, a mold55is used to laminate the plurality of resin layers.

Mold55includes a platform56and a plurality of columnar parts57provided on the upper surface of platform56. In the step shown inFIG. 13, resin layers30,35,38,40,44,47,49are laminated on the upper surface of mold55.

At this time, a columnar part57is inserted in holes34formed respectively in resin layers30,35,38,40,44,47,49. When resin layers30,35,38,40,44,47,49have been laminated, hole portion42and hole portion46are aligned.

FIG. 14is a cross-sectional view showing the step after the step shown inFIG. 13. As shown inFIG. 14, a laminated body which is made up of the laminated resin layers is pressurized, and the laminated body in this state is subjected to a heat treatment. The heating temperature of the heat treatment is lower than the heating temperature in the step of uniting an intermediate substrate60and resin layers51,53into a single body, which is performed later. Specifically, the laminated body is heat-treated at a temperature that will not cause each resin layer to flow. This heat treatment can enhance adhesion between the resin layers, and displacement of resin layers from each other is suppressed when chip-type electronic components12,13are inserted.

In this way, intermediate substrate60is formed. In the upper surface of intermediate substrate60, a cavity61is formed.

While the cross section shown inFIG. 14illustrates only cavity61in which chip-type electronic component13is to be inserted, another cavity in which chip-type electronic component12is to be inserted is also formed in intermediate substrate60. On the bottom surface of cavity61, a part of internal interconnect15is exposed.

FIG. 15is a cross-sectional view showing the manufacture step after the step shown inFIG. 14. As shown inFIG. 15, chip-type electronic component13is inserted in cavity61. Similarly, chip-type electronic component12is inserted in the other cavity.

FIG. 16is a cross-sectional view showing the manufacture step after the step shown inFIG. 15. As shown inFIG. 16, on the upper surface of intermediate substrate60in which chip-type electronic components12,13have been inserted, resin layers51,53are laminated successively. In holes34formed in resin layers51,53, columnar part57is inserted.

FIG. 17is a cross-sectional view showing the manufacture step after the step shown inFIG. 16. As shown inFIG. 17, with a plurality of resin layers51,53laminated on the upper surface of intermediate substrate60, intermediate substrate60and resin layers51,53are pressurized and also subjected to a heat treatment. With the laminated body pressurized, the heat treatment performed on the laminated body causes each resin layer to soften and flow, so that the resin layers are compression-bonded to each other. The compression bonding causes at least respective surfaces of the resin layers to be united together, and the paste33with which each via hole32is filled forms via16.

Accordingly, resin layers30,35,38,40,44,47,49,51,53are united together into a single body. After this, mounted component10and mounted component11are implemented on surface conductors6of component-embedded substrate3by means of solder or the like. Then, the portion where hole34is formed is removed to thereby form component-embedded substrate3. After this, as shown inFIG. 3, component-embedded substrate3is implemented on circuit board2to thereby form electronic device1. While the steps for manufacturing a single component-embedded substrate have been described in connection with the present embodiment, a plurality of component-embedded substrates3may be obtained by simultaneously forming, in large resin layers that are to form a mother substrate, internal interconnects15and the like for a plurality of component-embedded substrates, simultaneously laminating the resin layers, and then cutting the resultant laminated body into pieces for respective component-embedded substrates.

Second Embodiment

A description will be given, usingFIGS. 18 to 20, of an electronic device1aand a component-embedded substrate3aaccording to a second embodiment. Of the constituent components shown inFIG. 18, any component identical or corresponding to the component shown in any ofFIGS. 1 to 17is denoted by the same reference character, and the description thereof may not be repeated.

FIG. 18is a plan view showing electronic device1aand component-embedded substrate3aaccording to the second embodiment. As shown inFIG. 18, component-embedded substrate3aincludes a resin substrate5having a mount surface4, mounted components10A,10B,11disposed on mount surface4, and chip-type electronic components12,13,14disposed in resin substrate5.

Mounted component10A and mounted component11are spaced from each other along arrangement direction D1, and mounted component10B and mounted component11are spaced from each other along arrangement direction D1. Mounted component10A and mounted component10B are spaced from each other along direction D2.

Mount surface4includes a region R1, a region R2, and a region R3. Region R1extends between mounted component11and mounted component10A and between mounted component11and mounted component10B along direction D2. Region R2is located opposite to mounted component11with respect to region R1, and region R3is located opposite to mounted components10A,10B with respect to region R1. Namely, region R2is a region where mounted components10A,10B are arranged, and region R3is a region where mounted component11is arranged.

In a plan view of component-embedded substrate3aas seen from above mount surface4, chip-type electronic component12is arranged to extend from below mounted component10A to below mounted component11, and chip-type electronic component12is arranged to also extend from region R2across region R1to region R3. Therefore, in resin substrate5, the portion located between mounted component10A and mounted component11is reinforced by chip-type electronic component12.

In a plan view of resin substrate5as seen from above mount surface4, chip-type electronic component13is arranged to extend from below mounted component10B to below mounted component11, and chip-type electronic component13is arranged to also extend from region R2across region R1to region R3. The portion located between mounted component10B and mounted component11is reinforced by chip-type electronic component13.

In the plan view of resin substrate5as seen from above mount surface4, chip-type electronic component14is arranged to extend from below mounted component10A to below mounted component10B. Therefore, in resin substrate5, the portion located between mounted component10A and mounted component10B is reinforced by chip-type electronic component14.

FIG. 19is a cross-sectional view along a line XIX-XIX shown inFIG. 18. As shown inFIG. 19, chip-type electronic component13is located relatively closer to mount surface4than to the lower surface of resin substrate5.FIG. 20is a cross-sectional view along a line XX-XX shown inFIG. 18. As shown inFIG. 20, chip-type electronic component12is also located relatively closer to mount surface4than to the lower surface of resin substrate5.

FIG. 21is a cross-sectional view along a line XXI-XXI shown inFIG. 18. As shown inFIG. 21, chip-type electronic component14includes a dielectric body80, an electrode81disposed on one side surface of dielectric body80, and an electrode82disposed on the other side surface of dielectric body80. Chip-type electronic component14is also located relatively closer to mount surface4than to the lower surface of resin substrate5.

Therefore, in resin substrate5, the portion located on the mount surface4side is reinforced by chip-type electronic components12,13,14.

When an impact force is externally applied to electronic device1aand component-embedded substrate3aconfigured in the above-described manner, a large flexure stress is applied to specific portions of resin substrate5, namely the portion where region R1is located and the portion located between mounted component10A and mounted component10B.

Meanwhile, in resin substrate5, the portion where region R1is located is reinforced by chip-type electronic components12,13. Even when an impact force is externally applied, damage (occurrence of cracks) to the portion of resin substrate5, namely the portion where region R1is located, can be suppressed.

Further, in resin substrate5, the portion located between mounted component10A and mounted component10B is reinforced by chip-type electronic component14. Therefore, even when an impact force is applied, damage (occurrence of cracks) to the portion located between mounted component10A and mounted component10B is suppressed.

Because mounted component10A, mounted component10B, and mounted component11are disposed on mount surface4, an impact force applied to component-embedded substrate3acauses a flexure stress to be applied to a portion of resin substrate5that is located on the mount surface4side of resin substrate5.

Meanwhile, because chip-type electronic components12,13,14reinforce a portion of resin substrate5that is located relatively closer to mount surface4, damage (occurrence of cracks) to resin substrate5is suppressed.

In the present embodiment, chip-type electronic component14may not necessarily be provided. In this case as well, occurrence of cracks to the portion where region R1is located can be suppressed.

Third Embodiment

A description will be given, usingFIGS. 22 to 25, of an electronic device1band a component-embedded substrate3baccording to a third embodiment. Of the constituent components shown inFIGS. 22 to 25, any component identical or corresponding to the component shown in any ofFIGS. 1 to 21is denoted by the same reference character, and the description thereof may not be repeated.

FIG. 22is a plan view showing electronic device1baccording to the third embodiment. As shown inFIG. 22, electronic device1bincludes a resin substrate5having a mount surface4, mounted components11,10A,10B disposed on mount surface4, and chip-type electronic components14,62,64disposed in resin substrate5.

Mounted component11and mounted component10A are spaced from each other along arrangement direction D1, and mounted component10B and mounted component11are spaced from each other along arrangement direction D1.

Mounted component10A is located relatively closer to side surface22as compared with mounted component10B, and mounted component10B is located relatively closer to side surface23as compared with mounted component10A.

Mount surface4includes a region R1, a region R2, and a region R3. Region R1extends between mounted component11and mounted component10A and between mounted component11and mounted component10B along direction D2. Region R2is located opposite to mounted component11with respect to region R1, and region R3is located opposite to mounted components10A,10B with respect to region R1. Namely, region R2is a region where mounted components10A,10B are arranged, and region R3is a region where mounted component11is arranged.

In a plan view of resin substrate5as seen from above mount surface4, chip-type electronic component64is arranged to extend from below mounted component10B across region R1to below mounted component11. Chip-type electronic component62is arranged to extend from below mounted component10A across region R1to below mounted component11. Chip-type electronic component14is arranged to extend from below mounted component10A to below mounted component10B.

The distance between chip-type electronic component64and side surface23is herein indicated by distance L4, and the distance between chip-type electronic component62and side surface22is herein indicated by distance L5. The distance between chip-type electronic component14and side surface20is herein indicated by distance L6.

Distance L4and distance L5are shorter than distance L6. Chip-type electronic component62and chip-type electronic component64are thus located relatively closer to the peripheral surface of resin substrate5as compared with chip-type electronic component14.

Chip-type electronic component14has a lateral dimension of 0.6 mm, a longitudinal dimension of 0.3 mm, and a height dimension of 0.15 mm. The size of chip-type electronic components62,64is 1.0 mm×0.5 mm×0.15 mm. Thus, the size of chip-type electronic components62,64is larger than the size of chip-type electronic component14.

When an impact force is applied to electronic device1band component-embedded substrate3b, a large flexure stress is exerted for example on the ends of region R1.

Meanwhile, because chip-type electronic components62,64are arranged on the end sides of region R1, the portions where the ends of region R1are located in resin substrate5are reinforced by chip-type electronic components62,64.

In particular, chip-type electronic components62,64are larger in size than chip-type electronic component13, and the ends of region R1are strongly reinforced by chip-type electronic components62,64. Therefore, even when an impact force is applied to electronic device1band component-embedded substrate3b, damage to resin substrate5is suppressed.

FIG. 23is a cross-sectional view along a line XXIII-XXIII shown inFIG. 22. As shown inFIG. 23, chip-type electronic component64includes a dielectric body65, an electrode66disposed on one side surface of dielectric body65, and an electrode67disposed on the other side surface of dielectric body65. Chip-type electronic component64is located relatively closer to mount surface4than to the lower surface of resin substrate5.

FIG. 24is a cross-sectional view along a line XXIV-XXIV shown inFIG. 22. As shown inFIG. 24, chip-type electronic component62includes a dielectric body83, an electrode84disposed on one side surface of dielectric body83, and an electrode85disposed on the other side surface of dielectric body83. Chip-type electronic component64is located relatively closer to mount surface4than to the lower surface of resin substrate5.

FIG. 25is a cross-sectional view along a line XXV-XXV shown inFIG. 22. As shown inFIG. 25, chip-type electronic component14is located relatively closer to mount surface4than to the lower surface of resin substrate5.

As set forth above, chip-type electronic components14,62,64are each located relatively closer to mount surface4than to the lower surface of resin substrate5. Therefore, a portion of resin substrate5that is located on the mount surface4side is reinforced by chip-type electronic components14,62,64. Accordingly, even when an impact force is applied to component-embedded substrate3b, damage to resin substrate5can be suppressed.

In the present embodiment, chip-type electronic component14may not necessarily be provided. In this case as well, occurrence of cracks to the portion where region R1is located can be suppressed.

Fourth Embodiment

A description will be given, usingFIGS. 26 to 29, of an electronic device1cand a component-embedded substrate3caccording to a fourth embodiment. Of the constituent components shown inFIGS. 26 to 29, any component identical or corresponding to the component shown in any ofFIGS. 1 to 25is denoted by the same reference character, and the description thereof may not be repeated.

FIG. 26is a plan view showing electronic device1caccording to the fourth embodiment. As shown inFIG. 26, component-embedded substrate3cincludes a resin substrate5having a mount surface4, and chip-type electronic components14,62,64,70,71disposed in resin substrate5.

In a plan view of component-embedded substrate3cas seen from above mount surface4, chip-type electronic components62,70are arranged to extend from below mounted component10A across region R1to below mounted component11. Chip-type electronic components64,71are arranged to extend from below mounted component10B across region R1to below mounted component11.

Further, chip-type electronic component14is arranged from below mounted component10A to below mounted component10B.

FIG. 27is a cross-sectional view along a line XXVII-XXVII shown inFIG. 26. As shown inFIG. 27, chip-type electronic component71and chip-type electronic component64are arranged in such a manner that they are aligned in the thickness direction of resin substrate5. Chip-type electronic component64is located relatively closer to mount surface4as compared with chip-type electronic component71. The size of chip-type electronic component64is larger than that of chip-type electronic component71.

FIG. 28is a cross-sectional view along a line XXVIII-XXVIII shown inFIG. 26. As shown inFIG. 28, chip-type electronic component70and chip-type electronic component62are arranged in such a manner that they are aligned in the thickness direction of resin substrate5. Chip-type electronic component62is located relatively closer to mount surface4as compared with chip-type electronic component70. The size of chip-type electronic component62is larger than that of chip-type electronic component70.

FIG. 29is a cross-sectional view along a line XXIX-XXIX shown inFIG. 26. As shown inFIG. 29, chip-type electronic component14is located relatively closer to mount surface4than to the lower surface of resin substrate5.

InFIG. 26, the distance between chip-type electronic components62,64,70,71and the peripheral surface of resin substrate5is shorter than the distance between chip-type electronic component13and the peripheral surface of resin substrate5.

Thus, a plurality of chip-type electronic components is located relatively closer to the peripheral surface of resin substrate5, to thereby reinforce the peripheral surface of resin substrate5. In particular, a plurality of chip-type electronic components are arranged in the portions located at the ends of region R1, to thereby reinforce the end sides of region R1in resin substrate5.

Further, large chip-type electronic components62,64are each arranged at the location relatively closer to mount surface4, to thereby strongly reinforce mount surface4of resin substrate5. Accordingly, when an impact force is externally applied to component-embedded substrate3c, damage to resin substrate5can be suppressed.

Using Table 1 below, a description will be given of a drop test for electronic devices of comparative examples and electronic devices1shown inFIG. 1.

In this drop test, 36 electronic devices according to each of Comparative Example 1 and Comparative Example 2, and 36 electronic devices1shown inFIG. 1are prepared. Then, from a height of 1.2 m, each electronic device is freely dropped ten times to a concrete floor with the mount surface directed downward. The electronic device of Comparative Example 1 is an electronic device having two mounted components disposed on the mount surface, like electronic device1inFIG. 1, without the chip-type electronic components disposed in the resin substrate. The electronic device of Comparative Example 2 is like an electronic device1eshown inFIG. 31. Namely, in a plan view of a component-embedded substrate3e, one chip-type electronic component86is disposed at or around the central portion of the resin substrate, between mounted component10and mounted component11.

TABLE 1number of defective samples/conditiontotal number of sampleselectronic device without chip-type3/36electronic components (ComparativeExample 1)electronic device shown in FIG. 312/36electronic device 1 shown in FIG. 10/36

As shown in Table 1, regarding Comparative Example 1, cracks occurred to three electronic devices out of the 36 electronic devices and, regarding Comparative Example 2, cracks occurred to two electronic devices out of the 36 electronic devices. In contrast, no crack occurred to electronic devices1shown inFIG. 1.

As seen from the foregoing, electronic device1of the present invention enables suppression of occurrence of cracks to resin substrate5in component-embedded substrate3, even when an impact force is applied to electronic device1.

Example 2 will be described usingFIG. 30. In an electronic device1dshown inFIG. 30, a chip-type electronic component13and a chip-type electronic component12are each arranged to extend from region R2across region R1to region R3. In the example shown inFIG. 30, in a plan view of a component-embedded substrate3d, chip-type electronic component12is not located below mounted components10,11. Chip-type electronic component12is rather located relatively closer to side surface22, as compared with mounted components10,11. Chip-type electronic component13is located relatively closer to side surface23, as compared with mounted components10,11. Regarding electronic device1dshown inFIG. 30, no chip-type electronic component is disposed in component-embedded substrate3dexcept for chip-type electronic components12,13. In this electronic device1d, while chip-type electronic components12,13are not located below mounted components10,11, a plurality of chip-type electronic components12,13arranged in region R1and region R3can still suppress occurrence of cracks which are likely to occur to region R1. In particular, regarding electronic device1d, chip-type electronic components12,13are arranged in regions R1-R3and in the vicinity of side surfaces22,23where cracks are more likely to occur. Thus, occurrence of cracks to resin substrate5can further be suppressed.

The foregoing is the description of the embodiments of the present invention. It should be construed that the embodiments disclosed herein are by way of illustration in all respects, not by way of limitation. It is intended that the scope of the present invention is defined by claims, and encompasses all modifications equivalent in meaning and scope to the claims. Further, the above-described numerical values and the like are given by way of example, and the present invention is not limited to the above-described numerical values and ranges.

In the case where the component-embedded substrate has three or more mounted components on the mount surface, it is preferable that two mounted components of a relatively larger size out of the three or more mounted components are identified as a first mounted component and a second mounted component of the present invention, and a first chip-type electronic component and a second chip-type electronic component of the present invention are accordingly arranged, since this enables the highest effect of suppressing occurrence of cracks.

In the case where four or more mounted components are disposed on the mount surface and three or more electronic components are disposed in the resin substrate, it is preferable that three mounted components of a relatively larger size out of the four or more mounted components are identified as a first mounted component, a second mounted component, and a third mounted component of the present invention, and a first chip-type electronic component, a second chip-type electronic component, and a third chip-type electronic component of the present invention are accordingly arranged, since this enables the highest effect of suppressing occurrence of cracks.

INDUSTRIAL APPLICABILITY

The present invention is applicable to a component-embedded substrate.

REFERENCE SIGNS LIST