Probe card test apparatus

A probe card test apparatus including an insulating substrate; a conductive pattern on the insulating substrate; and a plurality of device under test (DUT) units on the conductive pattern, wherein each of the DUT units includes a merged-probe opening, a probe opening, and a detector in parallel, and an isolator surrounding the merged-probe opening, the probe opening, and the detector.

CROSS-REFERENCE TO THE RELATED APPLICATION

Korean Patent Application No. 10-2020-0060279, filed on May 20, 2020, in the Korean Intellectual Property Office, and entitled: “Probe Card Test Apparatus,” is incorporated by reference herein in its entirety.

BACKGROUND

Embodiments relate to a probe card test apparatus.

2. Description of the Related Art

Upon execution of a test for mechanical and electrical characteristics of a device under test (DUT) such as a semiconductor wafer, using a probe card, the test may be executed in a state in which probes of the probe card contact electrode pads of the DUT.

SUMMARY

The embodiments may be realized by providing a probe card test apparatus including an insulating substrate; a conductive pattern on the insulating substrate; and a plurality of device under test (DUT) units on the conductive pattern, wherein each of the DUT units includes a merged-probe opening, a probe opening, and a detector in parallel, and an isolator surrounding the merged-probe opening, the probe opening, and the detector.

The embodiments may be realized by providing a probe card test apparatus including an insulating substrate; a conductive pattern on the insulating substrate; and a plurality of device under test (DUT) units on the conductive pattern, wherein each of the DUT units includes a merged-probe opening, a probe opening, an inner detector, and an outer detector in parallel, and an isolator surrounding the inner detector and the merged-probe opening.

The embodiments may be realized by providing a probe card test apparatus including an insulating substrate; a conductive pattern on the insulating substrate; and a plurality of device under test (DUT) units on the conductive pattern, wherein each of the DUT units includes a merged-probe opening, a probe opening, and a detector in parallel, and an isolator surrounding the merged-probe opening and the detector.

DETAILED DESCRIPTION

FIGS. 1A and 1Bare views of a method for detecting defects of probes of a probe card using probe card test apparatuses according to various exemplary embodiments of the disclosure.FIG. 2is a probe card test apparatus according to an exemplary embodiment of the disclosure.FIG. 3is a device under test (DUT) unit according to an exemplary embodiment of the disclosure.

Referring toFIGS. 1A, 1B, 2 and 3, a test for detecting defects of the probes125in or on the probe card120may be performed in accordance with a relative position of the probe card test apparatus200, which may include an insulating substrate130and a conductive pattern131. The relative position of the probe card test apparatus200may be determined in accordance with movement of a wafer chuck supporting a device under test (DUT) or the probe card test apparatus200.

The probe card test apparatus200may include the insulating substrate130, e.g., made of an insulating material, and the conductive pattern131, e.g., on the insulating substrate130and including a metal layer. The metal layer of the conductive pattern131may include openings135,310, and315etched to have a pad shape, and frame-shaped isolators320may each surround a part of the pad-shaped openings135,310, and315. In an implementation, the frame-shape isolators320may be formed through etching of the metal layer of the conductive pattern131. An upper surface of the insulating substrate130of the probe card test apparatus200may be exposed through the openings135,310, and315, and the isolators320.

Hereinafter, the operation principle of the probe card test apparatus200will be described. First, the pad-shaped openings135,310, and315may be formed at positions corresponding to the probes125of the probe card120, respectively, and the probe card test apparatus200may be brought into contact with the probe card120. An abnormal probe125f, which is defective due to, e.g., position misalignment thereof, may deviate from a corresponding one of the openings135and, as such, may be brought into contact with the conductive pattern131. When a detection signal is applied to the conductive pattern131through a detector330, an electrical connection may be established between the abnormal probe125fand the detector330and, as such, the signal may be detected. In an implementation, when only normal probes125nare present on the probe card120, all probes may be in an open state and, as such, no signal may be detected from any probe125. In an implementation, when the abnormal probe125fis present, a short circuit may be generated and, as such, a signal may be detected.

In a semiconductor test process, the probe card120may test semiconductor chips on a wafer several times. For more rapid testing, the number of chips capable of being tested per test may be increased. In an implementation, as the number of DUT units350per test increases, the number of probes125in the probe card120may also be increased. In an implementation, the probe card120may merge signals of probes125performing the same function for different DUT units350. In this case, the signal-merged probes125of the different DUT units350may be referred to as “merged probes”.

Probes125respectively associated with several DUT units350may be signal-merged to constitute a group of merged probes. In this case, when any one of the probes in the merged-probe group is abnormal, all probes of the merged-probe group may be determined or appear to be defective. In an implementation, when the conductive patterns131of the DUT units350are isolated from one another by the isolators320, it may be possible to determine which merged probe associated with which one of the DUT units350is defective from among the merged probes in the merged-probe group.

Again referring toFIG. 1A, the probe card120may include probes125to contact DUTs, respectively. The probes125may include merged probes configured through merging of a plurality of probes125, and general probes, e.g., unmerged probes. Circuits of the merged probes may be interconnected and, as such, a merged electrical signal may be applied or detected. The merged probes, which are circuit-connected, may constitute one merged probe group. The probe card120may receive test power from a wafer test apparatus110to which the probe card120is connected. In an implementation, the probe card120may be disposed over DUTs in order to test the DUTs.

In an implementation, for test of the probe card120itself, the probe card120may be disposed over the probe card test apparatus including the insulating substrate130and the conductive pattern131. The probes125, which contact the probe card test apparatus, may be electrically connected to the conductive pattern131included in the probe card test apparatus.

Upon a test of the DUTs, the probes125of the probe card120may contact pads of the DUTs, respectively. If positions of the probes125were to incorrectly correspond to respective pad positions of the DUTs, it may be impossible to correctly perform defect detection for the DUTs through the probe card120. In an implementation, whether positions of the probes125correctly correspond to respective pad positions of the DUTs may be tested.

Referring toFIG. 1B, the probe card120may contact the probe card test apparatus. In an implementation, a lower end of a probe125of the probe card120may physically contact the conductive pattern131of the probe card test apparatus. The probe card test apparatus may include the conductive pattern131, which may include metal such as copper (Cu), and a plurality of openings135in the conductive pattern131. The plurality of openings135may be formed in areas or positions where pads of target DUTs will be disposed, respectively. In an implementation, formation positions of the plurality of openings may be varied in accordance with a design state of the target DUT.

When probes125of the probe card120are positioned at normal positions thereof, respectively, such probes, e.g., normal probes125n, may be aligned with a plurality of openings135present between adjacent portions of the conductive pattern131. The openings135present between adjacent portions of the conductive pattern131may expose the upper surface of the insulating substrate130in the probe card test apparatus. The normal probes125nmay connect or contact the insulating substrate130of the probe card test apparatus or may be floated in the openings135, respectively. Accordingly, each normal probe125nmay be in an electrically open state and, as such, no signal may flow between the normal probe125nand another normal probe125nor between the normal probe125nand a detection probe125i, which will be described in greater detail below.

In an implementation, if a probe125is not positioned at a normal position, such a probe, e.g., an abnormal probe125f, may be aligned with or on the conductive pattern131and, as such, may physically contact the conductive pattern131. Accordingly, the abnormal probe125fmay be electrically connected to the detection probe125iphysically contacting the detector, which is electrically connected to the conductive pattern131and, as such, may be in a short-circuited or closed circuit state. As a result, a signal may flow between the abnormal probe125fand the detection probe125i. In an implementation, when a signal from the detection probe125iis received, this state is a short-circuited state. In this case, through application of a relay signal, the position of the abnormal probe125fmay be detected.

Referring toFIG. 2, the probe card test apparatus200may include an insulating substrate and a conductive pattern on the insulating substrate, and may further include a plurality of DUT units350on the conductive pattern. The number of the DUT units350may be equal to the number of unit DUTs measurable per test by the probe card from among target DUTs of the probe card.

Referring toFIG. 3, in an embodiment, the DUT unit350may include merged-probe openings310, probe openings315, and a detector330, which may be disposed in parallel in the same plane, and an isolator320surrounding the merged-probe openings310, the probe openings315, and the detector330.

The isolator320may electrically separate the merged-probe openings310, the probe openings315, and the detector330in one DUT unit350from the merged-probe openings310, the probe openings315, and the detector330in another DUT unit350. An upper surface of the insulating substrate130in the probe card test apparatus200may be exposed through the isolator320. In an implementation, a direct current (DC) signal in the isolator320may not be transmitted to another DUT unit350outside the isolator320.

The merged-probe openings310, the probe openings315, and the detector330may be formed in areas where pads of DUTs in or to be tested by the probe card will be disposed, respectively. A portion of the insulating substrate130may be exposed through the merged-probe openings310. In an implementation, the DUT unit350may further include a first insulating pattern filling the merged-probe openings310.

Positions of the probe openings315may correspond to areas where unmerged probes of the probe card will be positioned, respectively. A portion of the insulating substrate130may be exposed through the probe openings315. In an implementation, the DUT unit350may further include a second insulating pattern filling the probe openings315. In an implementation, the probes positioned at the merged-probe openings310and the probe openings315may be insulated and, as such, no signal may flow therethrough.

Positions of the merged-probe openings310may correspond, one by one, to a position of a plurality of merged probes in the probe card. In an implementation, one probe may correspond to one merged-probe opening310. In order to separate merged signals of a merged probe group from one another, the merged probes respectively corresponding to the plurality of merged-probe openings310included in one DUT unit350may have separate merged-probe groups, respectively. In an implementation, the merged probes respectively corresponding to the plurality of merged-probe openings310included in one DUT unit350while being circuit-isolated from one another through the isolator320may apply or receive separate signals, respectively.

A position of the detector330may correspond to areas in which the detection probe of the probe card will be positioned. The detector330may detect a signal according to whether contact of a probe125occurs. A signal may be continuously applied through the detector330. When an abnormal probe125fis present, the detector330and the abnormal probe125fmay be electrically connected through the conductive pattern131and, as such, a signal applied through the detector330may be detected. The detection probe from among the probes125of the probe card120may always be in contact with the detector330. In an implementation, a plurality of detection probes may contact the single detector330. In an implementation, the detector330may correspond to a plurality of detection probes.

Referring toFIG. 3, all openings310and315and the detector330in the single DUT unit350may be connected by a continuous conductive pattern. In an implementation, the detector330may detect defects of merged probes in the probe card through a direct current (DC) signal, and may detect defects of unmerged probes in the probe card through a DC signal.

FIGS. 4A to 4Dare views of a method for detecting defects of probes in a probe card using probe card test apparatuses according to various exemplary embodiments of the disclosure.FIGS. 4A and 4Bare views showing a cross-section taken along line X-X′ inFIG. 3.FIGS. 4C and 4Dare views showing a cross-section taken along line Y-Y′ inFIG. 3.

Referring toFIG. 4A, a probe card420may be connected to a wafer test apparatus410and, as such, may be tested by a probe card test apparatus including an insulating substrate430, a conductive pattern431, and merged-probe openings310. Probes425of the probe card420may correspond to respective openings (e.g., merged-probe openings310) of the probe card test apparatus such that the probes425may be insulated. A detection probe425iof the probe card420may be brought into contact with a detector of the probe card test apparatus, and may be electrically connected to the conductive pattern431.

Referring toFIG. 4B, the probe card420may include a detection probe425i, a normal probe425n, and an abnormal probe425f. The normal probe425nis a probe having no defect, and may be over or aligned with one opening (e.g., merged-probe opening310) of the probe card test apparatus. The abnormal probe425fis a probe having a contact defect, and may be horizontally misaligned with respect to the opening thereunder and, as such, may contact the conductive pattern431. The detection probe425imay contact the detector330electrically connected to the conductive pattern431. When a signal is applied in a relay manner to the probes425nand425f, it may be possible to detect an area through which a signal flows due to electrical connection caused by a defect or short circuit and, as such, the abnormal probe425fmay be detected.

Referring toFIG. 4C, the probe card420may be connected to a wafer test apparatus410and, as such, may be tested by a probe card test apparatus including an insulating substrate430, a conductive pattern431, and probe openings315. Probes425of the probe card420may correspond to respective probe openings315of the probe card test apparatus such that the probes425may be insulated.

Referring toFIG. 4D, the probe card420may include a detection probe425i, a normal probe425n, and an abnormal probe425f. The normal probe425nmay be a probe having no defect, and may be over or aligned with one probe opening315of the probe card test apparatus. The abnormal probe425fmay be a probe having a contact defect, and may be horizontally misaligned from the probe opening315disposed thereunder and, as such, may contact the conductive pattern431. Again referring toFIGS. 3, 4A and 4B, the detection probe425imay contact a detector330electrically connected to the conductive pattern431ofFIG. 4D. When a signal is applied in a relay manner to the probes425nand425f, it may be possible to detect an area through which a signal flows due to electrical connection caused by a defect or short circuit and, as such, the abnormal probe425fmay be detected.

FIGS. 5A and 5Bare probe card test apparatuses according to various exemplary embodiments of the disclosure.FIGS. 5A and 5Billustrate an embodiment in which each DUT unit500A,500B or500C includes one detector510A,510B or510C, one merged-probe opening520A,520B or520C, one probe opening525A,525B or525C, and an isolator530A,530B or530C surrounding these elements.

Referring toFIG. 5A, it may be seen that merged-probe wirings550A,550B and550C respectively connected to merged probes corresponding to respective merged-probe openings520A,520B and520C of the DUT units500A,500B and500C are electrically connected. On the other hand, probe wirings555A,555B and555C respectively connected to probes corresponding to respective probe openings525A,525B and525C of the DUT units500A,500B and500C are not electrically connected and, as such, signals of the probes may be separately detected without being merged.

When the probe card includes merged probes, detection wirings560A,560B and560C connected to respective detectors510A,510B and510C of the DUT units500A,500B and500C insulated from one another by respective isolators530A,530B and530C may include wiring switches561A,561B and561C, respectively. In the case in which the wiring switches561A,561B and561C operate sequentially without overlapping with one another, even when a signal is detected through the merged-probe wirings550due to a short circuit or defect of the merged-probes, it may be possible to determine which merged probe is defective from among the merged probes of the DUT units500A,500B and500C by determining which wiring switch is in a closed state from among the wiring switches561A,561B and561C when the signal is detected.

Referring toFIG. 5B, in an embodiment, the third DUT unit500C may include an abnormal merged probe. In this case, a short circuit caused by the abnormal merged probe of the third DUT unit500C may not occur when the first wiring switch561A and the second wiring switch561B are closed, by virtue of the isolators530A,530B and530C respectively insulating the DUT units500A,500B and500C. In an implementation, only when the third wiring switch561C is closed, is a signal detected by the detector510C. Accordingly, it may be possible to determine which merged probe is defective from among the merged probes of the DUT units.

FIG. 6is a DUT unit according to an exemplary embodiment of the disclosure. Referring toFIG. 6, the DUT unit650may include merged-probe openings610, probe openings615, an inner detector630, and an outer detector635, which are in parallel in the same plane, and an isolator620surrounding the merged-probe openings610and the inner detector630.

The isolator620may electrically separate the merged-probe openings610and the inner detector630in the DUT unit650from the probe openings615, the outer detector635in the DUT unit650and, e.g., the merged-probe openings610in another DUT unit650. An upper surface of the insulating substrate130in the probe card test apparatus200may be exposed through the isolator620. In an implementation, a direct current (DC) signal in the isolator620may not be transmitted to the conductive pattern outside the isolator620or the other DUT unit650.

Referring toFIG. 6, the merged-probe openings610and the inner detector630included inside the isolator620of the single DUT unit650may be connected by a continuous conductive pattern, and the probe openings615and the outer detector635outside the isolator620may be connected by another continuous conductive pattern. Accordingly, in the embodiment, the inner detector630may detect defects of merged probes in the probe card through a DC signal, and the outer detector635may also detect defects of unmerged probes in the probe card through a DC signal.

FIG. 7is a probe card test apparatus according to an exemplary embodiment of the disclosure.FIG. 7schematically illustrates an embodiment in which each DUT unit700A,700B or700C includes one inner detector710A,710B or710C, one outer detector715A,715B or715C, one merged-probe opening720A,720B or720C, one probe opening725A,725B or725C, and an isolator730A,730B or730C surrounding the inner detector710A,710B or710C and the merged-probe opening720A,720B or720C.

Referring toFIG. 7, it can be seen that merged-probe wirings750A,750B and750C respectively connected to merged probes corresponding to respective merged-probe openings720A,720B and720C of the DUT units700A,700B and700C may be electrically connected. In an implementation, probe wirings755A,755B and755C respectively connected to probes corresponding to respective probe openings725A,725B and725C of the DUT units700A,700B and700C may not be electrically connected and, as such, signals of the probes may be separately detected without being merged.

When the probe card includes merged probes, detection wirings760A,760B and760C connected to respective inner detectors710A,710B and710C within areas insulated from one another by the isolators730A,730B and730C may include wiring switches761A,761B and761C, respectively. In the case in which the wiring switches761A,761B and761C operate sequentially without overlapping with one another, even when a signal is detected through the merged-probe wirings750due to a defect or short circuit of the merged-probes, it may be possible to determine which merged probe is defective from among the merged probes of the DUT units700A,700B and700C by determining which wiring switch is in a closed state from among the wiring switches761A,761B and761C when the signal is detected.

In an implementation, referring toFIGS. 6 and 7, the outer detectors635,715A,715B and715C may be omitted. In an implementation, the DUT unit650may include merged-probe openings610, probe openings615, and an inner detector630, which are in parallel in the same plane, and an isolator620surrounding the merged-probe openings610and the inner detector630.

The isolator620may electrically separate the merged-probe openings610and the inner detector630in the DUT unit650from the probe openings615in the DUT unit650and, e.g., the merged-probe openings610in another DUT unit650. An upper surface of the insulating substrate130of the probe card test apparatus200may be exposed through the isolator620. In an implementation, a direct current (DC) signal in the isolator620may not be transmitted to the conductive pattern outside the isolator620or the other DUT unit650.

In an implementation, the merged-probe openings610and the inner detector630included inside the isolator620of the single DUT unit650may be connected by a continuous conductive pattern, and the probe openings615outside the isolator620may be connected by another continuous conductive pattern. In an implementation, the inner detector630may detect defects of merged probes in the probe card through a DC signal. In an embodiment in which the outer detector635is omitted, unmerged probes of the probe card cannot be connected in series to the inner detector630. In an implementation, the inner detector630may detect defects of unmerged probes of the probe card through an alternating current (AC) signal.

By way of summation and review, a probe card may have manufacturing defects. Different defects may be generated even in probe cards having the same specifications. Prior to a test for a DUT using a probe card, a defect test on the probe card itself may be performed. A part of or some probes in the probe card may be in a merged state. When a defect is detected in association with merged probes, which probe has generated the defect from among the merged probes may be determined.

In an embodiment, it may be possible to test connection errors of merged probes or unmerged probes in the probe card or operation errors of the probe card. In addition, it may be possible to prevent semiconductor chips in DUTs from being sorted into defective chips due to errors of the probe card by testing whether or not the probe card itself is defective, before practically testing a DUT wafer.

One or more embodiments may provide a probe card test apparatus including a detector for detecting a defect of a merged probe.

One or more embodiments may provide a water test apparatus for a probe card test capable of rapidly, accurately, and systematically performing a defect test for a probe card through separation of signals of merged probes.