Multi input timing recovery over packet network

In a method of recovering timing information over packet networks, a receiver receives a plurality of packet streams over different paths from the same source. The raw delays experienced by the timing packets for each stream are filtered to provide a filtered delay for each stream. The filtered delays are weighted based on the quality of each stream, and the weighted filtered delays are then combined to form an aggregate delay estimate. Frequency adjustments for a local clock at the receiver are derived from the aggregate delay estimate.

FIELD OF THE INVENTION

This invention relates to packet networks, and in particular to a method of recovering timing information over such networks.

BACKGROUND OF THE INVENTION

In timing recovery over packet networks dedicated timing packets are time-stamped by the transmitter's clock and then are sent over a packet network (PSN) to one or multiple receivers. At the receiver side, these timing packets, as they arrive, are time-stamped by the receiver clock. The difference between these two time stamps represents the relative delay between transmitter and receiver clocks, which can be used to synchronize the two clocks.FIG. 1is an illustration of this for the case where there is one transmitter and one receiver. One of the main challenges in this synchronization approach is that the timing packets are subjected to packet delay variations (PDV) inherent in any packet networks. As a result, at the receiver side, depending on packet delay variations, the recovered reference clock will have high level of jitter and wander, which will not be acceptable for many applications, especially legacy services that assume a high quality level of synchronization.

To overcome this issue, it has been proposed to filter timing packets at the receiver such that only those timing packets that are least subjected to packet delay variations are used for clock recovery. Known methods generally rely only on a single stream of timing packets to synchronize the receiver with the transmitter.

SUMMARY OF THE INVENTION

Embodiments of the invention relate to a new synchronization method over packet switched networks, which exploits space diversity in timing packets originating from same clock source but arriving at the receiver though different network paths. In the proposed invention, for each stream, the time delay between the transmitter and receiver is calculated and filtered to minimize the effect of network packet delay variations on timing packets. The filtered time delay estimates for all streams are weighted and combined based on a non-linear function of residual error and sample rate at the output of time delay filter for each stream. Filtered time delays, combined in this fashion are then fed through a loop filter and digital controlled oscillator to recover transmitter clock. The main advantage of this approach is a significant performance improvement and robustness to packet impairment.

In IEEE 1588 standard relating to precise synchronization over packet networks, in addition to the timing packets sent by the transmitter to the receiver, the receiver also sends timing information (known as delay request) to the transmitter, which then will be relayed back to receiver (delay response). This process of timing packet exchange measures the round trip delay in network for calculating absolute time difference between transmitter and receiver. The timing packets sent by receiver and relayed back by transmitter can also be considered as a second stream of timing packets and can be used to improve single path delay measurement between transmitter and receiver.

This invention thus provides a method for clock synchronization over packet switch networks using spatial diversity in timing packet streams originating from same clock source and arriving at receiver through different network paths.

According to the present invention there is provided a method of recovering timing information over packet networks wherein a receiver receives a plurality of packet streams over different paths from the same source, comprising receiving timing packets from each stream; measuring the raw delays experienced by the timing packets for each stream; filtering the measured raw delays to account for network packet delay variations so as to provide a filtered delay for each stream; weighting the filtered delays based on the quality of each stream; combining the weighted filtered delays to form an aggregate delay estimate; and determining frequency adjustments from the aggregate delay estimate for a local clock at the receiver.

In one embodiment, for each timing packet stream, raw delays between transmitter and receiver are calculated. The raw delays are basically the difference between the transmitter time-stamps (included in timing packets) and the receiver time stamps, which are recorded at arrival time of each timing packet from the transmitter. For each stream the calculated time stamps are filtered to minimize the effect of network packet delay variations.

For each timing packet stream, a re-sampling circuit (RSC) is used to convert from a non-uniform sample rate (due to irregular arrival of timing packets) to a uniform sample rate. Another reason for using the re-sampling circuit is to adjust for difference in packet rate for each timing stream such that output sample rate for all timing streams are the same.

The outputs from previous stage are combined using a linear combiner. The coefficients of linear combiner are calculated using a non-linear function of the output residual error and packet rate of step.

The output of the linear combiner is passed through a loop filter to calculate the update value for a digitally controlled oscillator (DCO) which provides the output clock. Output of DCO is also used to time-stamp arrival time of timing packets.

According to a second aspect of the invention there is provided a timing recovery unit for recovering timing information over packet networks wherein a receiver receives a plurality of packet streams over different paths from the same source, comprising a block for receiving timing packets from each stream; a block for measuring the raw delays experienced by the timing packets for each stream; a filter for filtering the measured raw delays to account for network packet delay variations so as to provide a filtered delay for each stream; a weighting block for weighting the filtered delays based on the quality of each stream; a combiner for combining the weighted filtered delays to form an aggregate delay estimate; and a phase locked loop for outputting a local clock at the receiver using frequency adjustments determined from the aggregate delay estimate.

Embodiments of the present invention can provide a better estimate of the delay by exploiting multiple timing packet streams, and an inherent fault tolerance and robustness to packet impairment since if one of network paths fails to supply timing packets (due to network congestion, outage etc.) other timing paths can be used to maintain synchronization

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

In the following description k is index to packet number, xj(k) represents transmitter time stamp for timing packet k of timing packet stream j, yj(k) represents receiver time stamp for timing packet k of timing packet stream zj(k) is the raw delay estimate between transmitter and receiver for timing packet k of timing packet stream j, and wj(k) is the filtered raw delay for timing packet k of timing packet stream j.

FIG. 3is a block diagram of an embodiment of invention for the special case where there are only two timing packet streams derived from the same clock source and travelling over different paths as shown inFIG.2, but it will be understood that the following description is applicable to the more general case of N timing packet streams.

For each stream j, raw delays (z(k)) are calculated by subtracting corresponding receiver local time stamps (yj(k)) generated by time stamp circuits5000from corresponding time-stamps generated by transmitter (xj(k)). The following can be written for the raw delays
zj(k)=φj(k)+ξi(k)   (1)
where φj(k) represents the true delay between the transmitter and receiver for the k_th timing packet and stream j. ξj(k) represents the error in measurement caused by network packet delay variations for k_th timing packet in stream j.

The calculated raw delays zj(k) are then filtered by an adaptive time delay filter method1000. A suitable method is described in our co-pending application entitled “Timing Recovery Over Packet Networks” and filed on even date herewith, the contents of which are herein incorporated by reference. This filter minimizes error in time delay estimation between transmitter and receiver caused by network packet delay variations.

The following can be written for the output of block1000for timing packet stream j:
ωj(k)=υj(k)+φj(k)   (2)
where vj(k) represents the remaining residual error at the output of block1000for k_th packet and stream j.

The variance of υj(k) in combination with the output packet rate of the block1000represents the output quality of the block1000for stream j. It depends on the nature and magnitude of network packet delay variations and timing packet rate for each stream. Higher time packet rate and/or lower the network packet delay variations will result in better output quality for the block1000. The statistical nature of network packet delay variation is also very important in determining output quality of the block1000.

A weighting mechanism based on some non-linear function of residual error and packet rate is applied at the output of the block1000to combine the delay estimates from each timing stream to recover the transmitter clock.

For each stream, the timing packets can arrive at receiver at different rates. For example, for one stream it can be at 32 packets-per-seconds while for other stream it can be at 128 packets-per-second. Even if the average number of packets-per-second for all streams is the same, depending on network induced packet delay variations, the output sample rate for the block1000can be different for each stream. Another issue is that packets arrive at non-uniform time intervals and as a result the output of the block1000will be updated at non-uniform sample times asynchronously from other streams.

In order to take this into account, the block2000is used to convert non-uniform sample rates at the output of the block1000to the same uniform sample rate for all timing streams. The re-sampling circuit2000uses a linear interpolation of the output of the block1000and re-samples it at uniformly spaced intervals with the same sample rate for all timing streams.

The block6000is a time delay combiner which uses a weighted combination of all outputs of re-sampling circuits to form the best delay estimate between transmitter and receivers.

Rj(n) j=1 . . . N represents the inputs to block6000corresponding to N timing streams. The output of block6000is calculated based on the following:

F⁡(n)=∑j=1N⁢⁢βj-1⁡(n)⁢Rj⁡(n)(3)
where F(n) is the output of block6000and βj(n) are weighting coefficients that are calculated periodically from time tn−1to time tnas described below.

βj(n) are calculated based on residual error {umlaut over (υ)}j(k) at the output of block1000for each timing stream j based on following:

2a) First calculate

Qj⁡(n)=∑k=1Mj⁡(n)⁢⁢vj⁡(k)4Mj3⁡(n)(4)
where Qj(n) represents output quality for timing stream j, M(n) represents number of filtered timing packets at the output of (1000) for stream j from time tn−1to tnand υj(k) is the residual error at the output of block1000, which based on equation (2), is calculated from
υj(k)=ωj(k)−φj(k)   (5)

In equation (5), since φj(k) is not known before hand, an estimated value, given by following equation, can be used instead.
{circumflex over (φ)}j(k)={circumflex over (φ)}j(k−1)+γj(k)(xj)(k)−xj(k−1)   (6)
where γj(k) is DCO update value at the time k_th timing packet arrived and xj(k) is the transmitter time stamp for k_th timing packet.

The above process can be repeated until all remaining Qjs have values close to each other. Using this process, the timing streams that have a much higher residual output error than the other streams will be eliminated.

2c) Based on the quality number given by equation (4), βj(n) are calculated from following

βj⁡(n)=Qj⁡(n)∑j=1N⁢Qj⁡(n)(8)
where N is the total number of timing streams.

The output of block6000is passed through a loop filter3000to provide the update value for DCO4000. The loop filter design can be similar to the one although other variants of loop filter can be used as well.

The frequency and phase of the digital controlled oscillator4000whose is adjusted based on its input value.

Block5000is the time stamp circuit (TSC) for the receiver and constitutes the feedback loop for the proposed timing recover method. InFIG. 3, there are two time stamp circuits corresponding to two timing streams. In general for each timing packet stream j there is one time-stamp circuit which will generate receiver time stamp values based on output value of DCO.

The described embodiment exploits the diversity present in the network and offers improved performance and reliability compared to a method based on single timing packet stream.