CHIP ON SUBMOUNT

A chip on submount includes: a submount including a first surface directed in a first direction; a covering layer mounted on the first surface, extending to intersect the first direction, and including a second surface directed in the first direction; a laser element mounted on the second surface and including: a third surface directed in the first direction; and a light emission unit positioned at an intermediate portion of the laser element along a second direction intersecting the first direction, extending in a third direction intersecting the first direction and second direction, and configured to output laser light in the third direction; and a bonding wire attached onto the third surface and configured to exert a pressing force on the laser element, the pressing force including a component force directed in a direction opposite to the first direction.

BACKGROUND

The present disclosure relates to a chip on submount.

There has been known a chip on submount including a covering layer, which is a conductor, on a submount and a laser element mounted on the covering layer by means of solder, such as a AuSn alloy (for example, Japanese Patent No. 5075165 and Japanese Patent No. 6928560).

SUMMARY

The inventors have found that in this type of chip on submount, polarization rotation (displacement) of laser light output from the laser element may occur depending on, for example, a position on the submount, the position being where the laser element is mounted, or a position on the laser element, the position being where the bonding wire is attached, and desired optical properties may thus be difficult to be obtained.

Accordingly, there is a need for an improved chip on submount that enables reduction of polarization rotation caused by mounting of components in the chip on submount.

According to one aspect of the present disclosure, there is provided a chip on submount including: a submount including a first surface directed in a first direction; a covering layer mounted on the first surface, extending to intersect the first direction, and including a second surface directed in the first direction; a laser element mounted on the second surface and including: a third surface directed in the first direction; and a light emission unit positioned at an intermediate portion of the laser element along a second direction intersecting the first direction, extending in a third direction intersecting the first direction and second direction, and configured to output laser light in the third direction; and a bonding wire attached onto the third surface and configured to exert a pressing force on the laser element, the pressing force including a component force directed in a direction opposite to the first direction, wherein a residual stress that causes compression toward a center of the covering layer along the second direction has been generated in the covering layer, and the chip on submount is configured such that a first moment generated by an external force acting on the laser element from the covering layer due to the residual stress and a second moment generated by the pressing force acting on the laser element from the bonding wire lessen each other, the first moment and second moment being about a central axis of the light emission unit, the central axis being along the third direction.

According to another aspect of the present disclosure, there is provided a chip on submount including: a submount including a first surface directed in a first direction; a covering layer mounted on the first surface, extending to intersect the first direction, and including a second surface directed in the first direction; a laser element mounted on the second surface and including: a third surface directed in the first direction; and a light emission unit positioned at an intermediate portion of the laser element along a second direction intersecting the first direction, extending in a third direction intersecting the first direction and second direction, and configured to output laser light in the third direction; and a bonding wire attached onto the third surface and configured to exert a pressing force on the laser element, the pressing force including a component force directed in a direction opposite to the first direction, wherein a residual stress that causes compression toward a center of the covering layer along the second direction has been generated in the covering layer, and a total of a first moment and a second moment is approximately 0, the first moment being generated by an external force acting on the laser element from the covering layer due to the residual stress, the first moment and second moment being about a central axis of the light emission unit, the central axis being along the third direction, the second moment being generated by the pressing force acting on the laser element from the bonding wire.

According to still another aspect of the present disclosure, there is provided a chip on submount including: a submount including a first surface directed in a first direction; a covering layer mounted on the first surface, extending to intersect the first direction, and including a second surface directed in the first direction; a laser element mounted on the second surface and including: a third surface directed in the first direction; and a light emission unit positioned at an intermediate portion of the laser element along a second direction intersecting the first direction, extending in a third direction intersecting the first direction and second direction, and configured to output laser light in the third direction; and a bonding wire attached onto the third surface and configured to exert a pressing force on the laser element, the pressing force including a component force directed in a direction opposite to the first direction, wherein the light emission unit is displaced in a fourth direction from the center of the covering layer along the second direction, the fourth direction being one of the second direction and a direction opposite to the second direction, and a pressing position where the bonding wire presses the third surface is displaced in a direction opposite to the fourth direction from the light emission unit.

According to yet another aspect of the present disclosure, there is provided a chip on submount including: a submount including a first surface directed in a first direction; a covering layer mounted on the first surface, extending to intersect the first direction, and including a second surface directed in the first direction; a laser element mounted on the second surface and including: a third surface directed in the first direction; and a light emission unit positioned at an intermediate portion of the laser element along a second direction intersecting the first direction, extending in a third direction intersecting the first direction and second direction, and configured to output laser light in the third direction; and a bonding wire attached onto the third surface and configured to exert a pressing force on the laser element, the pressing force including a component force directed in a direction opposite to the first direction, wherein a barycentric position, along the second direction, of a pressing position where the bonding wire presses the third surface, the light emission unit and the center of the covering layer along the second direction are aligned with one another along the first direction.

DETAILED DESCRIPTION

Exemplary embodiments will be disclosed hereinafter. Configurations of the embodiments and functions and results (effects) brought about by these configurations described hereinafter are just examples. The present disclosure may be implemented by configurations other than those disclosed hereinafter with respect to the embodiments. Furthermore, the present disclosure achieves at least one of various effects (including derivative effects) achieved by these configurations.

The embodiments described hereinafter include the same configuration. Therefore, the configurations of the embodiments achieve the same functions and effects based on that same configuration. Furthermore, the same reference signs will hereinafter be assigned to that same configuration and any redundant description thereof may be omitted.

In each drawing, an X direction is represented by an arrow X, a Y direction by an arrow Y, and a Z direction by an arrow Z. The X direction, the Y direction, and the Z direction intersect one another and are orthogonal to one another. The X direction is an outgoing direction of laser light from a laser element and is also along a longitudinal direction of the laser element. The Y direction is along a width direction of the laser element. The Z direction is a direction, in which a submount, a covering layer, and the laser element are layered, and is also referred to as a thickness direction.

The drawings are schematic and dimensions in the drawings may be different from the actual dimensions.

FIG.1is a front view of a chip on submount100A (100) according to a first embodiment, the chip on submount100A (100) being viewed in a direction opposite to the X direction. As illustrated inFIG.1, the chip on submount100A includes a submount10, a covering layer20, a semiconductor laser chip30, and a bonding wire50. The semiconductor laser chip30is an example of a laser element.

With a thickness that is along the Z direction and that is approximately constant, the submount10extends to intersect and be orthogonal to the Z direction. The submount10has a surface10aand a surface10bthat is on the opposite side of the surface10a. The surface10ais directed in a direction opposite to the Z direction and intersects and is orthogonal to the Z direction. The surface10bis directed in the Z direction and intersects and is orthogonal to the Z direction. The surface10ais also referred to as a back surface and the surface10bis also referred to as a front surface. The surface10bis an example of a first surface. The Z direction is an example of a first direction.

The submount10has a thickness of about, for example, 0.3 to 1.0 mm. A material or materials for the submount10may include, for example, at least any one selected from a group including: aluminum nitride (AlN); alumina (Al2O3); beryllia (BeO); boron nitride (BN); diamond; silicon nitride (Si3N4); silicon carbide (SiC); silicon dioxide (SiO2); and zirconia (ZrO2). Aluminum nitride, silicon nitride, and silicon carbide respectively have thermal expansion coefficients of 4.5×10−6/K, 2.8×10−6/K, and 3.7×10−6/K.

The covering layer20is mounted on the surface10bof the submount10. With a thickness that is along the Z direction and that is approximately constant, the covering layer20extends to intersect and be orthogonal to the Z direction. The covering layer20has a surface20aand a surface20bthat is on the opposite side of the surface20a. The surface20ais directed in the direction opposite to the Z direction and intersects and is orthogonal to the Z direction. The surface20bis directed in the Z direction and intersects and is orthogonal to the Z direction. The surface20ais also referred to as a back surface and the surface20bis also referred to as a front surface. The surface20bis an example of a second surface.

The covering layer20has a thickness of about, for example 20 to 200 μm. The covering layer20is made of, for example, a copper based material. Copper has a thermal expansion coefficient of 17×10−6/K. The thermal expansion coefficient of the covering layer20is larger than the thermal expansion coefficient of the submount10. The covering layer20may also be referred to as an intermediate layer, a covering member, or an intermediate member.

Another covering layer (not illustrated in the drawings) that is different from the covering layer20is also provided on the surface10bof the submount10. This other covering layer and the covering layer20are both conductors made of the above mentioned material. The covering layer20and the other covering layer are separated from each other via a gap (interval) and electrically insulated from each other. The covering layer20and the other covering layer each have a multi-layer film made of the above mentioned copper based material. The submount10according to the embodiment may also be referred to as a substrate, and a substrate (the submount10according to the embodiment) including a covering layer may also be referred to as a submount.

The semiconductor laser chip30is mounted on the surface20bof the covering layer20via a binder40having electric conductivity. The binder40is for example, AuSn solder. The binder40joins the covering layer20and the semiconductor laser chip30to each other by being heated to a temperature higher than its melting point in a reflow process and being solidified by being cooled to about room temperature.

With a thickness that is along the Z direction and that is approximately constant, the semiconductor laser chip30extends to intersect and be orthogonal to the Z direction. The semiconductor laser chip30has a surface30aand a surface30bthat is on the opposite side of the surface30a. The surface30ais directed in the direction opposite to the Z direction and intersects and is orthogonal to the Z direction. The surface30bis directed in the Z direction and intersects and is orthogonal to the Z direction.

The semiconductor laser chip30has a light emission unit31that outputs laser light in the X direction. The light emission unit31is positioned at an intermediate portion of the semiconductor laser chip30along the Y direction, the intermediate portion being at a center Cc of the semiconductor laser chip30along the Y direction in this embodiment, and the light emission unit31extends in the X direction. The light emission unit31is positioned closer to the surface30athan the center of the semiconductor laser chip30along the Z direction is, and specifically, the light emission unit31is positioned near the surface30a. The surface30ais also referred to as a front surface and the surface30bis also referred to as a back surface. The surface30bis an example of a third surface. The light emission unit31is also referred to as an active layer. The semiconductor laser chip30according to this embodiment is mounted junction-down. The intermediate portion of the semiconductor laser chip30along the Y direction means a portion between an end of the semiconductor laser chip30and an opposite end of the semiconductor laser chip30, the end being in the Y direction, the opposite end being in a direction opposite to the Y direction. The Y direction is an example of a second direction, and the X direction is an example of a third direction.

The covering layer20is electrically connected, via the binder40, to an electrode (for example, a p-type electrode not illustrated in the drawings) provided on the surface30aof the semiconductor laser chip30. The above mentioned other layer on the surface10bis electrically connected, via the bonding wire50, to an electrode (for example, an n-type electrode not illustrated in the drawings) provided on the surface30bof the semiconductor laser chip30. The bonding wire50is joined and electrically connected, via a binder, such as AuSn solder, to an electrode provided on the surface30b.

The semiconductor laser chip30outputs laser light having a wavelength according to its configuration and material/materials. The semiconductor laser chip30has a thickness of, for example, about 0.1 mm. The semiconductor laser chip30may include components, such as, for example, gallium arsenide (GaAs) and/or indium phosphide (InP). Gallium arsenide and indium phosphide respectively have thermal expansion coefficients of 5.9×10−6/K and 4.5×10−6/K.

The thermal expansion coefficient of the covering layer20in the chip on submount100A (100) having the above described configuration is larger than the thermal expansion coefficient of the submount10, and the covering layer20thus contracts more largely than the submount10during cooling in the reflow process for the binder40. Therefore, a residual stress Sc is generated in the covering layer20, the residual stress Sc causing compression in the covering layer20, the compression being toward a center Cm of the covering layer20along the Y direction in the view ofFIG.1, that is, in the front view of the chip on submount100as viewed in the direction opposite to the X direction.

This residual stress Sc acts as an external force on the surface30aof the semiconductor laser chip30via the surface20band the binder40. The external force may cause a moment M1to act on the light emission unit31, the moment M1being about a central axis Ax of the light emission unit31, the central axis Ax extending in the X direction. In the example ofFIG.1, the light emission unit31is at a position P1displaced in the direction opposite to the Y direction from the center Cm of the covering layer20along the Y direction. A residual stress that causes compression in the covering layer20in the Y direction toward the center Cm is generated in a portion of the covering layer20, the portion being more rearward (leftward inFIG.1) than the center Cm along the Y direction. Therefore, an external force in the Y direction (rightward inFIG.1) acts on a portion of the surface30aof the semiconductor laser chip30, the portion being near the light emission unit31and being behind (below inFIG.1) the light emission unit31along the Z direction. In this case, the external force causes the moment M1to act on the light emission unit31, the moment M1being in an anticlockwise direction inFIG.1. The moment M1is an example of a first moment. In the example ofFIG.1, the direction opposite to the Y direction is an example of a fourth direction. A residual stress that causes compression in the covering layer20in the direction opposite to the Y direction toward the center Cm is also generated in a portion of the covering layer20, the portion being more forward (rightward inFIG.1) than the center Cm along the Y direction.

Furthermore, a pressing force Fw that presses the semiconductor laser chip30toward the covering layer20and submount10acts from the bonding wire50, in the chip on submount100A (100) having the above described configuration. This pressing force Fw includes a component force in the direction opposite to the Z direction (downward inFIG.1).

The pressing force Fw may cause a moment M2to act on the light emission unit31, the moment M2being about the central axis Ax of the light emission unit31. In the example ofFIG.1, the position where the bonding wire50presses the surface30bof the semiconductor laser chip30, that is, a connection position Pw between the bonding wire50and the surface30bis displaced, by a displacement dw in the Y direction (rightward inFIG.1), from the position P1(the same position as the center Cc of the semiconductor laser chip30along the Y direction in this embodiment) of the light emission unit31(central axis Ax) along the Y direction. In this case, the pressing force Fw causes the moment M2to act on the light emission unit31, the moment M2being in the anticlockwise direction inFIG.1. The moment M2is an example of a second moment. In the example ofFIG.1, the Y direction is an example of a direction opposite to the fourth direction.

The inventors have found that laser light output from the semiconductor laser chip30changes in polarization angle according to the connection position Pw of the bonding wire50along the Y direction. Specifically, the inventors manufactured a large number of semiconductor laser chips30having different connection positions Pw along the Y direction and studied relations between displacements dw of the connection positions Pw from the centers Cc of the semiconductor laser chips30along the Y direction and polarization rotation angles (rotational displacements from a desired state) of laser light output by the semiconductor laser chips30. The displacement dw is a manufacture target value and includes a tolerance range. In a case where the connection position Pw is displaced in the Y direction from the center Cc, the displacement dw has a positive sign (+) and in a case where the connection position Pw is displaced in the direction opposite to the Y direction, the displacement dw has a negative sign (−). In the example ofFIG.1, the center Cc of the semiconductor laser chip30along the Y direction is the position P1of the light emission unit (central axis Ax) along the Y direction. Experimental results were obtained as follows.

Experimental Results

In a case where dw=+30 μm, polarization rotation angle: 0 to 15 degrees (evaluation: excellent)

In a case where dw=+15 μm, polarization rotation angle: −10 to 0 degrees (evaluation: excellent)

In a case where dw=0 μm, polarization rotation angle: −20 to −5 degrees (evaluation: good)

In a case where dw=−15 μm, polarization rotation angle: −30 to −10 degrees (evaluation: satisfactory)

In a case where dw=−30 μm, polarization rotation angle: −50 to −35 degrees (evaluation: unsatisfactory)

These experimental results indicated that the larger the displacement dw is, the larger the polarization rotation angle is. The experimental results also indicated that the polarization angle is minimized when dw=+15 to +30, and not when dw=0. Analysis by the inventors indicated that this is because the position P1of the light emission unit31along the Y direction was displaced in the direction opposite to the Y direction from the center Cm of the covering layer20along the Y direction (the displacement of the position P1from the center Cm:dc, seeFIG.1).

Accordingly, configuring the chip on submount100A such that the above described moment M1generated by the residual stress Sc and the above described moment M2generated by the pressing force Fw lessen each other presumably enables obtainment of the semiconductor laser chip30having reduced polarization rotation from desired properties and having excellent optical properties.

In this embodiment, as described above, the position P1of the light emission unit31is displaced in the direction (fourth direction) opposite to the Y direction from the center Cm of the covering layer20along the Y direction, the connection position Pw for the bonding wire50is displaced in the Y direction (the direction opposite to the fourth direction) from the position P1of the light emission unit31, and polarization rotation relative to desired properties is thereby able to be reduced.

Furthermore, in this embodiment, the light emission unit31(central axis Ax) is positioned at the center Cc of the semiconductor laser chip30along the Y direction, the center Cc is thus displaced in a direction opposite to the direction of the connection position Pw from the center Cm of the covering layer20along the Y direction, and polarization rotation relative to desired properties is thereby able to be reduced.

Furthermore, research by the inventors revealed that the effect of reducing the polarization rotation angle by this configuration is achieved in a case where the covering layer20has a width Wm along the Y direction smaller than a width Ws of the submount10along the Y direction and larger than a width We of the semiconductor laser chip30, and in particular, that the difference (Ws−Wm) between the width Wm and the width Ws is preferably equal to or smaller than ½ of the width Ws and is more preferably equal to or smaller than ⅓ of the width Ws. Furthermore, the inventors found that the semiconductor laser chip30preferably has a thickness Tc along the Z direction equal to or less than ⅓ of a thickness Ts of the submount10along the Z direction.

FIG.2is a front view of a chip on submount100B (100) according to a second embodiment, the chip on submount100B (100) being viewed in the direction opposite to the X direction.

The chip on submount100B according to this embodiment includes the same configuration as the first embodiment described above. However, the position P1of the light emission unit31along the Y direction in a semiconductor laser chip30B in this embodiment is different from that in the first embodiment described above. That is, the light emission unit31(central axis Ax) at the semiconductor laser chip30B in this embodiment is displaced in the direction opposite to the direction of the connection position Pw from a center Cc of the semiconductor laser chip30B along the Y direction. In this case, by being configured such that the center Cc of the semiconductor laser chip30B along the Y direction overlaps the center Cm of the covering layer20along the Y direction, the second embodiment enables obtainment of a layout similar to that of the first embodiment described above. That is, the second embodiment enables a state to be achieved comparatively readily, the state being a state where the position P1of the light emission unit31is displaced in the direction (fourth direction) opposite to the Y direction from the center Cm of the covering layer20along the Y direction and the connection position Pw of the bonding wire50is displaced in the Y direction (the direction opposite to the fourth direction) from the position P1of the light emission unit31, that is, a state where the moment M1and the moment M2lessen each other. This embodiment also enables reduction of polarization rotation relative to desired properties, similarly to the first embodiment described above.

FIG.3is a front view of a chip on submount100C (100) according to a third embodiment, the chip on submount100C (100) being viewed in the direction opposite to the X direction.

The chip on submount100C according to the third embodiment includes the same configuration as the first embodiment described above. However, in this third embodiment, the position P1of the light emission unit31(central axis Ax), the connection position Pw between the bonding wire50and the surface30b, and the position of the center Cm of the covering layer20along the Y direction are aligned with one another along the Z direction. In other words, the position P1, the connection position Pw, and the center Cm are at the same position in the Y direction. In this case, the moment M1about the central axis Ax and due to the external force based on the residual stress Sc is not generated, the moment M2about the central axis Ax and due to the pressing force Fw acting from the connection position Pw is also not generated because the length of the moment arm becomes approximately 0, and the total of the moment M1and the moment M2becomes approximately 0. Therefore, this third embodiment also enables reduction of polarization rotation relative to desired properties, similarly to the other embodiments described above. In this third embodiment, the connection position Pw may be said to be a barycentric position where the pressing force Fw acts upon.

FIG.4is a front view of a chip on submount100D (100) according to a fourth embodiment, the chip on submount100D (100) being viewed in the direction opposite to the X direction.

The chip on submount100D according to the fourth embodiment includes the same configuration as the first embodiment described above. However, in the fourth embodiment, plural bonding wires50are mounted, symmetrically about the center Cc along the Y direction, on the surface30bof the semiconductor laser chip30. A barycentric position of plural connection positions Pw along the Y direction is denoted by Pwc. In this embodiment, the position P1of the light emission unit31(central axis Ax), the barycentric position Pwc, and the position of the center Cm of the covering layer20along the Y direction are aligned with one another along the Z direction. In other words, the position P1, the barycentric position Pwc, and the center Cm are at the same position in the Y direction. In this case, the moment M1about the central axis Ax and due to the external force based on the residual stress Sc is not generated, the moment M2about the central axis Ax and due to the pressing force Fw (resultant force) acting from the barycentric position Pwc is also not generated because the length of the moment arm becomes approximately 0, and the total of the moment M1and the moment M2becomes approximately 0. Therefore, this fourth embodiment also enables reduction of polarization rotation relative to desired properties, similarly to the other embodiments described above.

FIG.5is a front view of a chip on submount100E (100) according to a fifth embodiment, the chip on submount100E (100) being viewed in the direction opposite to the X direction.

The chip on submount100E according to the fifth embodiment includes the same configuration as the first embodiment described above. However, in this embodiment, a semiconductor laser chip30E is a so-called ridge-type chip having a protrusion30cprotruding, near the light emission unit31, from a surface30aof the semiconductor laser chip30E. In this case, the light emission unit31is positioned closer to the surface30aof the semiconductor laser chip30E than a center Cz of the semiconductor laser chip30E is along the Z direction, the surface30abeing an end of the semiconductor laser chip30E, the end being in the direction opposite to the Z direction, and the protrusion30cand the light emission unit31are aligned with each other along the Z direction. Research by the inventors revealed that including the same configuration as the other embodiments described above in this ridge type semiconductor laser chip30E also enables the same effects to be achieved.

The embodiments have been described above by way of example, but the embodiments are just examples and are not intended to limit the scope of the disclosure. The above described embodiments may be implemented in various other modes, and without departing from the gist of the disclosure, various omissions, substitutions, combinations, and modifications may be made. Furthermore, the disclosure may be implemented by modifying, as appropriate, the specifications of the components and shapes (such as, the structures, types, directions, models, sizes, lengths, widths, thicknesses, heights, numbers, arrangements, positions, and materials), for example.

For example, the displacement of each component or part in the second direction from the center of the covering layer along the second direction is not limited to that in the embodiments described above and may be in a direction opposite to that in the embodiments described above.

The present disclosure enables, for example, a novel and improved chip on submount to be obtained, the chip on submount enabling reduction of polarization rotation according to a position where a component is mounted in the chip on submount.