Sampling filter device

A sampling filter device wherein the filter characteristic is variable without using a control signal of a complicated waveform is provided. A sampling filter device 105 has integration capacitors 130 and 131, an integration time adjustment section 180, and a plurality of switches 100, 101, 110, and 111. Input current is integrated in different time duration with one clock and is stored in the integration capacitors 130 and 131 and charges stored in the integration capacitor from several clocks before to one clock before are added and the result is output. When charge is stored in the integration capacitors 130 and 131 with each clock, the integration time duration is changed, whereby it is made possible to weight and add output charge and the filter characteristic changes.

TECHNICAL FIELD

This invention relates to a sampling filter device in which the frequency characteristic is variable.

BACKGROUND ART

In a receiving device in a wireless communication system, a sampling filter device is used for performing frequency conversion by discrete time charge sampling and filtering.

For example, Patent Document 1 describes a conventional sampling filter device.FIG. 12shows the conventional sampling filter device described in Patent Document 1. The sampling filter device described in Patent Document 1 will be briefly described.

As shown inFIG. 12, a conventional sampling filter device5has a switch2A, a switch2B, an integrator3, and a weight and sampling (W&S) element6, and a control signal generator7. Three processes of reset, sampling, and hold are respectively performed by a clock and an inversion clock, a W&S signal, and a reset signal generated from the control signal generator7.

The filter characteristic of the sampling filter device is determined by a weight function. The weight function depends on a combination of the W&S element6and the W&S signal. The W&S signal corresponds to the three weight functions (constant, inclined, and Gaussian).

A current signal passing through the W&S element6is zero outside a sampling window and is weighted in accordance with the weight functions (constant, inclined, and Gaussian) inside the sampling window. Thus, output of the W&S element6is weighted by the W&S signal, whereby the filter characteristic can be changed.

DISCLOSURE OF THE INVENTION

Problems to be Solved by the Invention

However, in the conventional sampling filter device5described in Patent Document 1, it is necessary to provide complicated waveforms of an inclined waveform, a Gaussian waveform, etc., as the W&S signal to change the filter characteristic. Thus, there is a problem in that high vertical axis resolution is required for a control signal and the circuit scale becomes large.

In view of the above-described problem in the related art, it is an object of the invention to provide a sampling filter device for realizing weighting without using a complicated waveform for a control signal and making the frequency characteristic variable.

Means for Solving the Problems

A sampling filter device according to the present invention comprises: a first voltage current converter which converts an input voltage signal into a current; a first integration unit which samples the current output from the first voltage current converter and integrates the sampled current; a local oscillator which outputs a reference clock; and an integration time duration control unit which generates an integration time duration control signal for controlling integration time duration in the first integration unit based on the reference clock, and makes the integration time duration variable, thereby performing weighting of a filter characteristic in response to the integration time duration.

According to the configuration described above, current is sampled in accordance with the integration time duration control signal, whereby the sampling time is changed, whereby the charge amount stored in the integrator can be changed, so that the sampling filter device that can realize weighting using a signal of a simple waveform of a rectangular wave, a sine wave, etc., without using a complicated waveform for the control signal and makes the frequency characteristic variable.

In the sampling filter according to the present invention, the integration time duration control unit may generate the integration time duration control signal so that each pulse of the integration time duration control signal is positioned in the center of a half period of the reference clock.

According to the configuration described above, the transfer function at the position even-numbered times the basic frequency can be set to zero and the effect of turn by decimation can be decreased.

The sampling filter device according to the present invention may be configured in that the integration time duration control unit generates the integration time duration control signal to control an on interval of the first sampling switch with finer accuracy than that of the reference clock.

According to the configuration described above, the ratio between the on interval and the off interval of the sampling switch is adjusted with finer accuracy than that of the reference clock and weighting can be realized.

The sampling filter device according to the present invention may be configured by comprising a second sampling switch which samples the current output from the first voltage current converter, a second integrator which integrates the sampled current in the second sampling switch and a differential combining section which differentially combines outputs of the first and second integrators, wherein the integration time duration control unit generates the integration time duration control signal so that the first sampling switch is turned on in the high-level interval of the reference clock and the second sampling switch is turned on in the low-level interval of the reference clock.

According to the configuration described above, the off interval of the reference clock can also be used for integration, so that the integration time duration can be doubled apparently.

The sampling filter device according to the present invention may be configured by comprising a second voltage current converter having a gain different from that of the first voltage current converter, and a changeover switch for switching the first and second voltage current converters.

According to the configuration described above, the voltage current converters different in gain are switched, whereby the integration charge amount per unit time can be changed and weighting in the amplitude direction is also made possible, so that flexibility of design increases.

The sampling filter device according to the present invention may be configured in that the integration time duration control unit generates a switch control signal for switching connection of the first or second voltage current converter and the first sampling switch.

According to the configuration described above, switching of the voltage current converter can be controlled by the switch control signal.

The sampling filter device according to the present invention may be configured in that the integration time duration control unit has: a multiplier which multiplies the reference clock supplied from the local oscillator; and a control signal generator which generates the integration time duration control signal based on a multiplication signal supplied from the multiplier.

According to the configuration described above, the integration time duration control signal with finer accuracy than that of the reference clock can be generated.

The sampling filter device according to the present invention may be configured in that the integration time duration control unit has a control signal generator to which the reference clock, an inverse phase signal to the reference clock, an addition signal provided by adding a signal whose phase is 90° different from that of the reference clock to the reference clock, and a signal provided by adding the addition signal to the inverse phase signal to the reference clock are input, and which is controlled by a signal of a double frequency of the reference clock.

According to the configuration described above, the integration time duration control signal with finer accuracy than that of the reference clock can be generated.

The sampling filter device according to the present invention may be configured in that the integration time duration control unit has: a first dividing-type phase shifter which generates a first signal provided by dividing a clock having a double frequency of the reference clock and a second signal whose phase is 90° different from that of the first signal; a second dividing-type phase shifter which generates a third signal provided by dividing an inverse phase signal to the clock having the double frequency of the reference clock and a fourth signal whose phase is 90° different from that of the third signal; a first adder which outputs a fifth signal provided by adding the first signal to the second signal; a second adder which outputs a sixth signal provided by adding the third signal to the second signal; and a control signal generator for generating the integration time duration control signal based on the first signal, the third signal, the fifth signal, the sixth signal, and the clock having the double frequency of the reference clock.

According to the configuration described above, the integration time duration control signal with finer accuracy than that of the reference clock can be generated.

The sampling filter device according to the present invention may be configured in that the reference clock is a sinusoidal signal, the integration time duration control unit has an amplitude modulator which performs amplitude modulation of the sinusoidal signal, and the first sampling switch samples the current output from the first voltage current converter while output of the amplitude modulator exceeds a predetermined threshold value.

According to the configuration described above, the integration time duration control signal with finer accuracy than that of the reference clock can be generated.

The sampling filter device according to the present invention may be configured in that the reference clock is a sinusoidal signal, and a control signal generator is comprised which generates a switch control signal for switching connection of the first or second voltage current converter and the first and second sampling switches based on the sinusoidal signal.

According to the configuration described above, the switch control signal can be generated from the sinusoidal signal.

A wireless communication device according to the present invention comprises: the sampling filter device as described above; a buffer section for converting and outputting charge amount charged in the plurality of integrators in the sampling filter device into a voltage value; an A/D section which converts an analog signal output from the buffer section into a digital signal; and a base band section which performs demodulation processing or decoding processing for the digital signal provided by the A/D section.

According to the configuration described above, the wireless communication device installing the sampling filter device that can realize weighting using a signal of a simple waveform of a rectangular wave, a sine wave, etc., without using a complicated waveform for the control signal and makes the frequency characteristic variable can be realized.

Advantageous Effects of the Invention

According to the sampling filter device of the invention, when the current is sampled in accordance with the integration time duration control signal, the sampling time is changed, whereby the charge amount stored in the integrator can be changed, so that weighting can be realized using a signal of a simple waveform of a rectangular wave, a sine wave, etc., without using a complicated waveform for the control signal and the frequency characteristic can be made variable.

DESCRIPTION OF REFERENCE NUMERALS AND SIGNS

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiments of the invention will be described below with reference to the accompanying drawings:

FIG. 1shows the configuration of a sampling filter device in Embodiment 1 of the invention. As shown inFIG. 1, a sampling filter device105includes voltage current converters120and121, changeover switch for voltage current converters SW0(100) and SW1(101), sampling switches110and111, integration capacitors130and131, a local oscillator150, and an integration time duration control unit180. The embodiment shows an example of configuring a filter such that filter coefficient (a1, a2, a3, a4, a5)=(1, 4, 6, 4, 1) if a transfer function H (z) is represented as H (z)=a1+a2z−1+a3z−2+a4z−3+a5z−4. The sampling switch110and the integration capacitor130may be called first integration unit in combination and the sampling switch111and the integration capacitor131may be called second integration unit in combination.

The local oscillator150outputs a signal fLo0of a frequency of a reference clock. In the embodiment, the integration time duration control unit180generates pulse signals, namely, integration time duration control signals S2and S3and switch control signals S0and S1based on the signal fLo0supplied from the local oscillator150.

The voltage current converters120and121convert a voltage input signal into a current and outputs the current; for example, they are transformer conductance amplifiers (TA). The voltage current converters120and121differ in voltage-current characteristic (gain). In the embodiment, as mutual conductance gm1and gm2of the voltage current converters120and121, gm2=gm1/2. The voltage current converters120and121can be switched by the changeover switch for voltage current converters SW0(100) and SW1(101).

The changeover switch for voltage current converter SW0(100) switches connection of an input terminal and the voltage current converter120or121in response to a switch control signal S0output from a control signal generation section160. The changeover switch for voltage current converter SW1(101) switches connection of the voltage current converter120or121and the sampling switches110and111in response to a switch control signal S1output from the control signal generation section160.

The sampling switches110and111sample currents input from the voltage current converters120and121based on the integration time duration control signals S2and S3input from the control signal generator160and output the currents to the integration capacitors130and131respectively. When the sampling switch110is ON, the integration capacitor130is charged; when the sampling switch111is ON, the integration capacitor131is charged. According to the configuration, it is made possible to adjust the integration time duration for each clock time and the sample value can be weighted. The charge integrated over N clocks (N is an integer of 2 or more; in the embodiment N=5) in the integration capacitor130,131is discharged to an output terminal through a differential combining section140when the sampling stage terminates. According to the configuration, a filter function of N taps is implemented.

The differential combining section140differentially combines outputs from two pairs of the sampling switch110(111) and the integration capacitor130(131) provided in parallel, namely, outputs from the integration capacitors130and131.

According to the configuration, the input signal (current) output from the voltage current converter120(121) is sampled in the sampling switch110(111) based on the integration time duration control signal S2(S3) output from the integration time duration control unit180and the current output from the sampling switch110(111) is integrated in the integration capacitor130(131). That is, the sampling filter device105of the embodiment includes the local oscillator150, the integration time duration control unit180, the sampling switch110(111), and the integration capacitor130(131) in the configuration shown inFIG. 1, thereby storing the sample value weighted in response to the integration time duration varying for each clock of the reference clock in the integration capacitor130(131) and then discharging, so that weighting is realized and any desired filter characteristic can be realized without using a complicated waveform for the control signal.

The sampling filter device105of the embodiment includes two pairs of the sampling switch110(111) and the integration capacitor130(131) provided in parallel and further includes the differential combining section140for differentially combining outputs therefrom, whereby in an OFF interval of one sampling switch (for example,110), sampling becomes possible in another switch (for example,111), so that sampling corresponding to an inversion clock can also be performed effectively. That is, according to the configuration, the off interval of the reference clock can also be used for integration and the integration time duration can be doubled apparently.

The sampling filter device105of the embodiment further includes the two voltage current converters120and121different in voltage-current characteristic and the switches100and101for switching them, whereby the integration charge amount per unit time can be changed and weighting in the amplitude direction is also made possible. According to the configuration, weighting not only in the time axis direction, but also in the amplitude direction is possible, resolution can be doubled or more, and flexibility of design increases. If the number of pairs of the sampling switch110(111) and the integration capacitor130(131) is one, connection of the voltage current converter120,121and the sampling switch110(111) is switched, whereby weighting in the amplitude direction becomes possible and flexibility of design increases.

FIG. 2shows an example of a timing chart of signals to configure a filter whose filter coefficient is (1, 4, 6, 4, 1).

InFIG. 2, the signal fLo0is an output signal of the local oscillator150. The signals S2and S3are the integration time duration control signals output from the control signal generator160and turn on/off the sampling switches110and111. The signal S2is turned on at least in a part of the high-level interval of the signal fLo0, and the signal S3is turned on at least in a part of the low-level interval of the signal fLo0.

A voltage current converter switch absence signal represents integration amount in receiving control of the signal S2, S3when only one voltage current converter120operates, namely, the changeover switches SW0(100) and SW1(101) are connected to the voltage current converter120. The area of the rectangular part of the signal (1, 2, 3, 2, 1) corresponds to the filter coefficient of the sampling filter device.

The signals S0and S1are changeover control signals of the changeover switches SW0(100) and SW1(101). The changeover switch SW0(100) and the changeover switch SW1(101) are connected to the voltage current converter121of the mutual conductance gm2in the interval wherein the signal S0is low and the signal S1is high. The signals S0and S1are changeover control signals of the changeover switches SW0(100) and SW1(101). The changeover switch SW0(100) and the changeover switch SW1(101) are connected to the voltage current converter120of the mutual conductance gm1in the interval wherein the signal S0is high and the signal S1is low.

A voltage current converter switch presence signal represents integration amount in receiving control of the signal S2, S3when the voltage current converters120and121are switched by the signals S0and S1. The amplitude of the signal can be varied in response to the mutual conductance gm1, gm2, and the area of the rectangular part of the signal (1, 4, 6, 4, 1) corresponds to the filter coefficient of the sampling filter device.

Thus, if the voltage current converters120and121are not switched, the filter coefficient becomes (1, 2, 3, 2, 1). On the other hand, if they are switched, the filter coefficient can be made (1, 4, 6, 4, 1) by controlling the changeover switches SW0(100) and SW1(101) as shown in the changeover control signals S0and S1inFIG. 2.FIG. 2shows the case where gm2=gm1/2as the mutual conductance gm1and gm2of the two voltage current converters120and121.

FIG. 3shows the frequency characteristic of the sampling filter device of the embodiment (voltage current converter (TA) switch absence: solid line, TA switch presence: alternate long and short dash line). Thus, according to the sampling filter device of the embodiment, a wider band is realized as compared with the frequency characteristic (dashed line) of the conventional sampling filter device of moving average type (weighting of rectangular window) according to the weighting effect described above. A larger side lobe attenuation amount can be taken than that of the conventional device.

As described above, according to the embodiment, weighting not only in the time axis direction, but also in the amplitude direction is possible, resolution can be doubled or more, and flexibility of design increases. That is, weighting can be realized and any desired filter characteristic can be realized without using a complicated waveform for the control signal.

Second Embodiment

FIG. 4is a configurative diagram of a sampling filter device of Embodiment 2 of the invention. Components identical with those inFIG. 1are denoted by the same reference numerals inFIG. 4and will not be described again. An example of configuring a filter whose filter coefficient becomes (1, 4, 6, 4, 1) will be described as in Embodiment 1.

In Embodiment 2, an integration time duration control unit180includes an M-multiplier170(M is an integer of 2 or more; in the embodiment M=4) and a control signal generator160. The 4-multiplier170outputs a signal (multiplication signal)4fLo0of a frequency four times a reference frequency fLo0of input. The control signal generator160generates pulse signals, namely, integration time duration control signals S2and S3and changeover control signals S0and S1based on the multiplication signal4fLo0supplied from the 4-multiplier170. The integration time duration control signals S2and S3are output from the integration time duration control unit180, whereby the integration time duration can be adjusted with accuracy four times that of the reference clock.

FIG. 5shows an example of a timing chart of signals to configure a filter whose filter coefficient is (1, 4, 6, 4, 1).

InFIG. 5, the signal fLo0is an output signal of a local oscillator150. A signal fLo1is an output signal of the 4-multiplier170and has a frequency four times the signal fLo0. Signals S2and S3are integration time duration control signals output from the control signal generator160and turn on/off sampling switches110and111.

Signals S2and S3, a voltage current converter switch absence signal, signals S0and S1, and a voltage current converter switch presence signal are similar to those shown inFIG. 2.

FIG. 6is a configurative diagram of a sampling filter device of Embodiment 3 of the invention. Components identical with those inFIG. 1are denoted by the same reference numerals inFIG. 6and will not be described again. An example of configuring a filter whose filter coefficient becomes (1, 4, 6, 4, 1) will be described as in Embodiment 1.

In Embodiment 3, unlike Embodiment 2, an integration time duration control unit180includes dividing-type phase shifters270and271, adders280and281, and a control signal generator260. A local oscillator250generates a reference signal2fLo0of a double frequency of a reference clock and a signal2fLo0B of inverse phase to the reference signal2fLo0.

The dividing-type phase shifter270receives the signal2fLo0output from the local oscillator250, lowers the frequency of oscillation output signal to a half, and generates two signals 90° out of phase with each other. The dividing-type phase shifter271also performs similar processing for the signal2fLo0B of inverse phase. The signals (the two signals from the dividing-type phase shifter270and one signal from the dividing-type phase shifter271) are connected as shown inFIG. 6and are added by the adders280and281, thereby providing four signals fLo0, fLo0B, fLo0D1, and fLo0BD1shown inFIG. 7.

The control signal generator260drives the input signals fLo0, fLo0B, fLo0D1, and fLo0BD1with a clock by the reference signal2fLo0, thereby generating integration time duration control signals S2and S3for controlling the sampling switches110and111.

FIG. 7is a timing chart of the signals in the embodiment. The signal2fLo0is an output signal of the local oscillator250. The signal fLo0is an output signal of the dividing-type phase shifter270and has a frequency of a half of the signal2fLo0. The signal fLo0B is an output signal of the dividing-type phase shifter271and is an inverse phase signal to the signal fLo0.

The signal fLo0D1is generated by adding two signals 90° out of phase with each other output from the dividing-type phase shifter270by the adder280. The signal fLo0BD1is generated by adding two signals 90° out of phase with each other output from the dividing-type phase shifters270and271by the adder281.

Signals S2and S3, a voltage current converter switch absence signal, signals S0and S1, and a voltage current converter switch presence signal are similar to those shown inFIG. 2.

FIG. 8is a configurative diagram of a sampling filter device of Embodiment 4 of the invention. Components identical with those inFIG. 1are denoted by the same reference numerals inFIG. 8and will not be described again. An example of configuring a filter whose filter coefficient becomes (1, 4, 6, 4, 1) will be described as in Embodiments 1, 2, and 3.

In Embodiment 4, an integration time duration control unit180includes a control signal generator360and an amplitude modulator570. A local oscillator150outputs a reference signal fLo0of a frequency of a reference clock and a reference signal fLo0B of inverse phase. In the embodiment, the signal fLo0and the signal fLo0B output by the local oscillator150are sinusoidal signals. That is, the integration time is adjusted by amplitude modulation (AM modulation) of the reference signal (sinusoidal signal). The sampling filter device of the embodiment performs AM modulation of the sinusoidal signals fLo0and fLo0B and adjusts the ON intervals of sampling switches110and111. In the embodiment, each of the sampling switches110and111is turned ON while a signal for driving the sampling switch110,111exceeds one threshold value.

The amplitude modulator570performs AM modulation of the sinusoidal signals fLo0and fLo0B, changes the amplitudes, and outputs AM modulation signals S2and S3to the sampling switches110and111respectively as integration time duration control signals. The sampling switches110and111are turned on/off by the AM modulation signals S2and S3, whereby the ON intervals of the sampling switches110and111are controlled and charges charged in integration capacitors130and131are controlled.

The control signal generator360generates switch control signals S0and S1based on a sinusoidal signal.

FIG. 9is a timing chart of the signals in the embodiment. As shown inFIG. 9, the reference signal is controlled by AM modulation, whereby the ON intervals of the switches can be adjusted so as to become S2and S3inFIG. 9. According to the configuration, weighting is performed.

InFIG. 9, the signal fLo0is a sinusoidal signal output from the local oscillator150and the signal fLo0B is a sinusoidal signal of inverse phase to the signal fLo0. Signals S2and S3are integration time duration control signals output from the amplitude modulator570and turn on/off the sampling switches110and111.

When the signal S2is larger than a threshold value of the sampling switch110, an SW110ON interval signal goes high and corresponds to the on interval of the sampling switch110. When the signal S3is larger than a threshold value of the sampling switch111, an SW111ON interval signal goes high and corresponds to the on interval of the sampling switch111.

Signals S0and S1and a voltage current converter switch presence signal are similar to those shown inFIG. 2.

In the embodiment, the integration time duration control unit180includes the control signal generator360by way of example, but the control signal generator360is not included in the integration time duration control unit180and may be a separate component.

FIG. 10shows the frequency characteristic of the sampling filter device of the embodiment (voltage current converter (TA) switch absence: solid line, TA switch presence: alternate long and short dash line). As withFIG. 3, a wider band is realized as compared with the frequency characteristic (dashed line) of the conventional sampling filter device. A larger side lobe attenuation amount can be taken than that of the conventional device.

FIG. 11is a block diagram to show the configuration of a wireless communication device in Embodiment 5 of the invention. InFIG. 11, a wireless communication device200has a sampling filter section201, a buffer section202, an A/D section203, and a base band section204.

The sampling filter section201has the same configuration as the sampling filter device105(FIG. 1) described in Embodiment 1, operates in a similar manner, and performs discretization and filtering for a radio frequency signal input from an antenna.

The buffer section202converts the charge in an integration capacitor in the sampling filter section201into a voltage value and outputs the voltage. For example, the buffer section202can be implemented as an operational amplifier, etc., for example. If the sampling filter section201is configured as inFIG. 1, the output voltage value can be made large by a differential combining section140.

The A/D section203converts a discretized analog signal input from the buffer section202into a digital signal. The base band section204performs digital signal processing for the digital signal input from the A/D section203. That is, the base band section204performs demodulation processing, decoding processing, etc., for the signal digitized by the A/D section203.

According to the configuration, the sampling filter device of Embodiment 1 can be applied to the wireless communication device.

While the invention has been described in detail with reference to the specific embodiments, it will be obvious to those skilled in the art that various changes and modifications can be made without departing from the spirit and the scope of the invention.

This application is based on Japanese Patent Application (No. 2008-007176) filed on Jan. 16, 2008, which is incorporated herein by reference.

INDUSTRIAL APPLICABILITY

The invention has the effect that the integration time duration is adjusted instead of changing the amplitude of a control signal, whereby weighting is performed, addition is performed, and convolution is performed, whereby the sampling filter device requiring no complicated control unit can be provided. The invention is useful as a filter, etc., in an analog circuit in a wireless communication device.