SEMICONDUCTOR DEVICE

A semiconductor device, including: a first board and a second board facing each other with a space therebetween; a heat dissipation base having a front surface, on which the first board is bonded via a first f solder layer and the second board is bonded via a second solder layer; and a resist formed along the first solder layer and the second solder layer. The first solder layer has an edge portion thereof, which is a first edge portion, facing the second solder layer. The second solder layer has an edge portion thereof, which is a second edge portion, facing the first solder layer. The resist is in contact with the first edge portion and the second edge portion.

CROSS-REFERENCE TO RELATED APPLICATION

This application is based upon and claims the benefit of priority of the prior Japanese Patent Application No. 2023-149068, filed on Sep. 14, 2023, the entire contents of which are incorporated herein by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The embodiments discussed herein relate to a semiconductor device.

2. Background of the Related Art

A semiconductor device includes a base board, an insulated circuit board formed on the base board via solder, and a semiconductor chip formed on the insulated circuit board via solder (see, for example, Japanese Laid-open Patent Publication No. 2016-164919). In this semiconductor device, a resist is formed around the solder on the base board (see, for example, Japanese Laid-open Patent Publication No. 2010-212723 and Japanese Laid-open Patent Publication No. 2013-201289). In addition, a resist is formed around the solder on the insulated circuit board (see, for example, Japanese Laid-open Patent Publication No. 2013-236037 and Japanese Laid-open Patent Publication No. 2017-117813).

SUMMARY OF THE INVENTION

According to one mode of the embodiments, there is provided a semiconductor device, including: a first board and a second board facing each other with a space therebetween; a heat dissipation base having a front surface, on which the first board is bonded via a first solder layer and the second board is bonded via a second solder layer; and a resist formed along the first solder layer and the second solder layer, wherein the first solder layer has an edge portion thereof facing the second solder layer, the edge portion being a first edge portion, the second solder layer has an edge portion thereof facing the first solder layer, the edge portion being a second edge portion, and the resist is in contact with the first edge portion and the second edge portion.

DETAILED DESCRIPTION OF THE INVENTION

Hereinafter, embodiments will be described with reference to the accompanying drawings. In the following description, regarding semiconductor devices1and1ainFIGS.1and16, terms “front surface” and “top surface” each express an X-Y surface facing upward (the +Z direction). Likewise, regarding the semiconductor devices1and1ainFIGS.1and16, a term “up” expresses the upper direction (the +Z direction). Regarding the semiconductor devices1and1ainFIGS.1and16, terms “rear surface” and “bottom surface” each express an X-Y surface facing downward (the −Z direction). Likewise, regarding the semiconductor devices1and1ainFIGS.1and16, a term “down” expresses the lower direction (the −Z direction). In all the other drawings, the above terms also mean their respective directions as appropriate. Regarding the semiconductor devices1and1ainFIGS.1and16, terms “higher level” and “upper level” express an upper location (in the +Z direction). Likewise, regarding the semiconductor devices1and1ainFIGS.1and16, a term “lower level” expresses a lower location (in the −Z direction). The terms “front surface”, “top surface”, “up”, “rear surface”, “bottom surface”, “down”, and “side surface” are simply used as convenient expressions to determine relative positional relationships and do not limit the technical ideas of the embodiments. For example, the terms “up” and “down” may mean directions other than the vertical directions with respect to the ground. That is, the directions expressed by “up” and “down” are not limited to the directions relating to the gravitational force. In addition, in the following description, when a component contained in a material represents 80 vol % or more of the material, this component will be referred to as “main component” of the material (If the material contains a filler, the percentage is calculated without the filler). In addition, an expression “approximately the same” may be used when an error between two elements is within in ±10%. In addition, even when two elements are not exactly perpendicular, orthogonal, or parallel to each other, the two elements may be described as being “perpendicular”, “orthogonal”, or “parallel” to each other if the error is within ±10°.

First Embodiment

A semiconductor device according to a first embodiment will be described with reference toFIGS.1to3.FIG.1is a plan view of a semiconductor device according to a first embodiment, andFIG.2is a sectional view of the semiconductor device according to the first embodiment.FIG.3is a sectional view of a main part of the semiconductor device according to the first embodiment. Specifically,FIG.1is a plan view of the −Y direction half of a semiconductor device1.FIG.2is a sectional view taken along a dash-dotted line Y-Y inFIG.1.FIG.3is an enlarged view of an area A enclosed by a broken line inFIG.2. Illustration of sealing material is omitted inFIGS.1to3.

As illustrated inFIGS.1and2, this semiconductor device1includes semiconductor units10, a case2, and a heat dissipation base3. The case2has a storage area22, which may be sealed with sealing material. This sealing material may be, for example, a thermosetting resin to which a filler has been added. Examples of the thermosetting resin include epoxy resin, phenol resin, maleimide resin, and polyester resin. The filler may be an insulating ceramic material having a high thermal conductivity, for example. Examples of the filler include silicon oxide, aluminum oxide, boron nitride, and aluminum nitride.

Four semiconductor units10are disposed on a front surface3aof the heat dissipation base3. These four semiconductor units10are separated from one another in two rows and two columns in a center portion of the front surface3aof the heat dissipation base3.

As illustrated inFIG.3, assuming that the distance between the insulating plates12of the insulated circuit boards11of two semiconductor units10is denoted by L1, and assuming that the distance between metal plates14of these insulated circuit boards11is denoted by W, the distance between the furthest points of solder layers17aand17bis also denoted by W. In addition, the maximum width (in the ±X directions) of an inner resist portion4a, which will be described below, is denoted by L2. In practice, because the inner resist portion4ais sufficiently thinner than the solder layers17aand17b, the length of the inner resist portion4ain the width direction (in the ±X directions) may be practically considered to be the width L2. InFIGS.2and3, two semiconductor units10disposed adjacent to each other are seen in the +Y direction. Although not illustrated, even when two semiconductor units10disposed adjacent to each other are seen in the −Y direction, these two semiconductor units10are also bonded to the heat dissipation base3via solder layers. Even when two semiconductor units10disposed adjacent to each other are seen in the +X direction, the distance L1, the distance W, and the width L2are also applied as described above.

The width L2is greater than the distance L1. The width L2is between 1.5 mm and 2.5 mm, inclusive. For example, the width L2is 2.0 mm. The distance W between the metal plates14of the insulated circuit boards11is, for example, between 4.4 mm and 4.8 mm, inclusive.

Because the solder layers17aand17beach have a fillet portion, a distance L3between ends of the fillet portions of the solder layers17aand17bis less than the distance W. InFIG.3, the ends of the fillet portions of the solder layers17aand17bmay be located on the inner side of ends of the insulating plates12located above the solder layers17aand17b. In addition, the ends of the fillet portions of the solder layers17aand17bmay be located outer side of ends of the metal plates14directly above the solder layers17aand17b. Thus, the width L2may be considered to correspond to the distance L3between the ends of the fillet portions of the solder layers17aand17b. Thus, the distance between the ends of the fillet portions of the solder layers17aand17bis also between 1.5 mm and 2.5 mm, inclusive. The solder layers17aand17beach have a thickness between 0.23 mm and 0.27 mm, inclusive, for example. The number of semiconductor units10is an example. Any number of semiconductor units10may be formed based on the function of the semiconductor device1.

The individual semiconductor unit10includes an insulated circuit board11(first or second board) and semiconductor chips15aand15b, each of which is disposed on the front surface of the insulated circuit board11via a solder layer17c(seeFIG.3). The rear surface of the semiconductor unit10is bonded to the front surface3aof the heat dissipation base3via the solder layer17aor17b(first or second solder layer).

Lead-free solder is used as the solder layers17a,17b, and17c. The lead-free solder contains a tin-silver-copper alloy, a tin-zinc-bismuth alloy, a tin-copper alloy, or a tin-silver-indium-bismuth alloy as its main component, for example. The solder layers17a,17b, and17cmay also contain an additive such as nickel, germanium, cobalt, or a silicon. Since the solder layers17a,17b, and17ccontaining such additive have improved wettability, luster, and bonding strength, the reliability is improved.

The individual insulated circuit board11has a rectangular shape in plan view. The insulated circuit board11includes an insulating plate12(first or second insulating plate), conductive plates13aand13bformed on the front surface of the insulating plate12, and a metal plate14(first or second metal plate) formed on the rear surface of the insulating plate12. In plan view, the outline of each of the conductive plates13aand13band the outline of the metal plate14are smaller than that of the insulating plate12, and the conductive plates13aand13band the metal plate14are formed on the inner side of the insulating plate12. The shape and the number of conductive plates13aand13bare only examples.

The semiconductor chips15aand15bare bonded to the front surface of the conductive plates13aand13b, respectively, via the solder layer17c. The conductive plates13aand13bare formed on the entire surface of the insulating plate12, excepting the edge portions of the insulating plate12. Preferably, in plan view, end portions of the conductive plates13aand13b, the end portions facing the outer periphery of the insulating plate12, overlap the outer periphery end portions of the metal plate14. Thus, regarding the insulated circuit board11, the stress balance between the conductive plates13aand13bformed on the front surface of the insulating plate12and the metal plate14formed on the rear surface of the insulating plate12is maintained. Occurrence of excessive warpage and damage such as a crack in the insulating plate12is prevented. The conductive plates13aand13bare each made of a material having an excellent electrical conductivity. Examples of the material include copper, aluminum, and an alloy containing at least one of these kinds of elements. The conductive plates13aand13bmay each be plated with a material having an excellent corrosion resistance. The material used for this plating is, for example, nickel, a nickel-phosphorus alloy, or a nickel-boron alloy. The plating film thickness is 10 μm or less. The conductive plates13aand13bon the insulating plate12may be formed by forming a metal plate on the front surface of the insulating plate12and by etching this metal plate, for example. Alternatively, the conductive plates13aand13bmay be first cut out from a metal plate and next bonded to the front surface of the insulating plate12. The conductive plates13aand13bincluded in the semiconductor device1according to the present embodiment are only examples. For example, the number, shape and size of these conductive plates may be suitably set as needed. The front surface of each of the conductive plates13aand13bmay also be considered as the front surface of the insulated circuit board11.

The rear surface of the individual metal plate14is bonded to the front surface3aof the heat dissipation base3via the solder layer17aor17b. The metal plate14is made of a metal material having an excellent thermal conductivity. Examples of the metal material include copper, aluminum, and an alloy containing at least one of these kinds of elements. The thickness of the metal plate14may be, for example, between 0.25 mm and 0.35 mm, inclusive. The surface of the metal plate14may be plated to improve its corrosion resistance. The material used for this plating contains nickel. For example, the material is nickel, a nickel-phosphorus alloy, or a nickel-boron alloy. The rear surface of the metal plate14may also be considered as the rear surface of the insulated circuit board11.

For example, the individual insulated circuit board11having the above-described construction is a direct copper bonding (DCB) board or an active metal brazed (AMB) board. A resin insulating board may alternatively be used as the insulated circuit board11. With this insulated circuit board11, the heat generated by the semiconductor chips15aand15b, which will be described below, is transferred to the rear surface of the insulated circuit board11via the conductive plates13aand13b, the insulating plate12, and the metal plate14, and is consequently dissipated.

The main component of the semiconductor chips15aand15bis, for example, silicon, silicon carbide, or gallium nitride. The semiconductor chip15aincludes a switching element, which is, for example, an insulated gate bipolar transistor (IGBT) or a power metal-oxide-semiconductor field-effect transistor (MOSFET). If the semiconductor chip15aincludes an IGBT, the semiconductor chip15aincludes a collector electrode as a main electrode (input electrode) on its rear surface, and includes a gate electrode as a control electrode and an emitter electrode as a main electrode (output electrode) on its front surface. If the semiconductor chip15aincludes a power MOSFET, the semiconductor chip15aincludes a drain electrode as a main electrode (input electrode) on its rear surface, and includes a gate electrode as a control electrode and a source electrode as a main electrode (output electrode) on its front surface.

In addition, the semiconductor chip15bincludes a diode electrode. The diode element uses a Schottky barrier diode (SBD) or a P-intrinsic-N (PiN) diode as a freewheeling diode (FWD), for example. This semiconductor chip15bincludes a cathode electrode as a main electrode (output electrode) on its rear surface, and includes an anode electrode as a main electrode (input electrode) on its front surface.

In place of the semiconductor chips15aand15b, a semiconductor chip including a switching element may be used. The main component of this semiconductor chip may be silicon, for example. For example, the switching element may be a reverse-conducting (RC)-IGBT. The RC-IGBT is a semiconductor element obtained by forming an IGBT and an FWD in anti-parallel on one chip. The semiconductor chip in this case may include a collector electrode as a main electrode (input electrode) on its rear surface, and may include a gate electrode as a control electrode and an emitter electrode as a main electrode (output electrode) on its front surface.

As another switching element used in place of the semiconductor chips15aand15b, a power MOSFET whose main component is silicon carbide may be used. A power MOSFET whose body diode functions as an FWD may be used. For example, this semiconductor chip includes a drain electrode as a main electrode (input electrode) on its rear surface, and includes a gate electrode as a control electrode and a source electrode as a main electrode (output electrode) on its front surface.

The case2includes a frame portion20and external connection terminals23embedded in the frame portion20. In plan view, the frame portion20has a rectangular frame shape enclosing the storage area22. The storage area22is an open area in the center of a front surface21of the case2.

A step22bis formed on each of the short sides of the storage area22of the frame portion20. Specifically, these steps22bface each other and protrude from the inner walls of the short side portions of the frame portion20, the inner walls facing each other. Inner walls22aconnected to their respective steps22bface the storage area22.

The frame portion20is formed by injection molding that uses thermoplastic resin containing a filler. The resin is, for example, polyphenylene sulfide resin, polybutylene terephthalate resin, or polyamide resin. The main component of the filler may be, for example, glass fiber, glass bead, calcium carbide, talc, magnesium oxide, or aluminum hydroxide.

The individual external connection terminal23has a flat plate shape and has an L shape in side view. The external connection terminals23are integrally formed with the frame portion20. The individual external connection terminal23has an inner end portion and an outer end portion. The inner end portion is disposed on a corresponding one of the steps22b, extends toward the center of the storage area22, and is electrically and mechanically connected to the insulated circuit board11of a corresponding one of the semiconductor units10. The outer end portion is formed on the front surface21of the frame portion20.

These external connection terminals23are each made of a material having an excellent electrical conductivity. For example, the material is copper, aluminum, or an alloy containing at least one of these kinds of elements. Overall, the individual external connection terminal23has the same thickness. The external connection terminal23may be plated with a material having an excellent corrosion resistance. For example, the material is aluminum, nickel, titanium, chromium, molybdenum, tantalum, niobium, tungsten, vanadium, bismuth, zirconium, hafnium, gold, silver, platinum, palladium, or an alloy containing at least one these kinds of elements.

The rear surface of the frame portion20of the case2is bonded to the outer periphery of the front surface3aof the heat dissipation base, to which the semiconductor units10have been bonded, via adhesive (illustration of a reference character is omitted). As a result, the semiconductor units10are stored in the storage area22of the frame portion20. The storage area22of the frame portion20may be covered with a lid (not illustrated), and the storage area22and the lid may be bonded to each other by using adhesive. For example, the adhesive is thermosetting resin-based adhesive or elastomer-based adhesive. The main component of the thermosetting resin-based adhesive is, for example, epoxy resin or phenol resin. The main component of the elastomer-based adhesive is, for example, silicone rubber or chloroprene rubber.

Although not illustrated inFIGS.1and2, the frame portion20may integrally include control terminals to which control signals are input from the outside, as is the case with the external connection terminals23. The control terminals may also have inner end portions and outer end portions. An individual inner end portion may be electrically connected to a control terminal of a semiconductor chip15avia a wire. An individual outer end portion may appear on the front surface21of the frame portion20. The wire is made of a material having an excellent electrical conductivity. The material is, for example, gold, silver, copper, aluminum, or an alloy containing at least one these kinds of elements.

FIGS.1and2illustrate, as an example, a case in which the external connection terminals23are electrically and mechanically connected to their respective insulated circuit boards11. The inner end portion of each connection terminal23may be disposed on a external corresponding one of the steps22b, and the inner end portion and a corresponding one of the insulated circuit boards11may be connected to each other via a wiring member. The wring member is made of a material having an excellent electrical conductivity. The material is, for example, gold, silver, copper, aluminum, or an alloy containing at least one these kinds of elements. The wiring member is, for example, a wire or a lead frame.

The heat dissipation base3has a rectangular shape in plan view. The planar shape and area of the heat dissipation base3may match the planar shape and area of the case2. In plan view, each of the four corner portions of the heat dissipation base3may form a right angle or may be rounded or chamfered. The heat dissipation base3has the front surface3a. In addition, the heat dissipation base3has a long side surface3a1, a short side surface3a2, a long side surface3a3, and a short side surface3a4enclosing the front surface3ain four directions in plan view (seeFIGS.6and7). In addition, the heat dissipation base3has fixing holes3bin its four corner portions in plan view. These fixing holes3bpenetrate the heat dissipation base3. The semiconductor device1is disposed and fixed on a predetermined area by inserting bolts into the fixing holes3b.

The heat dissipation base3is made of a metal material having an excellent thermal conductivity. The material is, for example, copper, aluminum, or an alloy containing at least one these kinds of elements. In the present embodiment, the material contains copper. Although the thickness of the heat dissipation base3depends on the size of the semiconductor device1, the thickness may be, for example, between 2.5 mm and 3.5 mm, inclusive.

A cooling unit (not illustrated) may be attached to the rear surface of the heat dissipation base3via a thermally conductive member. The thermally conductive member is a thermal interface material (TIM). The TIM is, for example, a generic term for various kinds of materials such as thermally conductive grease, elastomer sheet, room temperature vulcanization (RTV) rubber, gel, phase-change material, solder, and silver solder. In this way, the heat dissipation of the semiconductor device1is improved. The cooling unit in this case is made of a metal material having an excellent thermal conductivity, for example. The metal material is, for example, aluminum, iron, silver, copper, or an alloy containing at least one these kinds of elements. The cooling unit is, for example, a heatsink including at least one fin or a water-cooled cooling device.

A resist4is formed on the front surface3aof the heat dissipation base3. The resist4contains carbon or metal oxide as its main component, for example. The metal oxide is, for example, nickel oxide. If carbon is used as its main component, the resist4is formed by drawing a line with a pencil on an area where the resist4is to be formed on the front surface3a. If nickel oxide is used as its main component, a laser beam is emitted to an area where the resist4is to be formed on the front surface3aof the heat dissipation base3, the front surface3ahaving been plated in advance with a plating film containing nickel. As a result, the resist4containing a nickel oxide film as its main component is formed.

The above-described resist4includes the inner resist portion4a(resist) and an outer resist portion4b. Overall, the resist4has approximately the same thickness. The inner resist portion4ais formed in the space among the four insulated circuit boards11in plan view on the front surface3aof the heat dissipation base3along the solder layers bonding the insulated circuit boards11to the front surface3a.FIG.3illustrates a case in which the inner resist portion4ais formed between the solder layers17aand17bbonding their respective insulated circuit boards11to the front surface3a. Specifically, the inner resist portion4ais in contact with an edge portion17a1(first edge portion) of the solder layer17a, the edge portion17a1facing the solder layer17b, and is in contact with an edge portion17b1(second edge portion) of the solder layer17b, the edge portion17b1facing the solder layer17a. That is, the inner resist portion4ais formed on the front surface3aof the heat dissipation base3such that the inner resist portion4afills the entire space between the solder layers17aand17b. The thickness of the inner resist portion4ais sufficiently thinner than the thickness of the solder layers17aand17b. The inner resist portion4ahas water repellency against solder, and prevents the solder layers bonding the insulated circuit boards11to the front surface3aof the heat dissipation base3from spreading to the inner side.

The outer resist portion4bis formed at the outer periphery enclosing the four insulated circuit boards11disposed on the front surface3aof the heat dissipation base3. The outer resist portion4bincludes a long side portion, a short side portion, a long side portion, and a short side portion that are parallel to the long side surface3a1, the short side surface3a2, the long side surface3a3, and the short side surface3a4of the heat dissipation base3in plan view. Any corner portion of the outer resist portion4bwhere a long side portion and a short side portion connect to each other may form a right angle or may be rounded or chamfered. Each side portion of the outer resist portion4bis formed between an inner wall of the frame portion20of the case2and an insulated circuit board11(solder layer). For example, as illustrated inFIG.2, each side portion of the outer resist portion4bis formed between the solder layer17aor17bbonding an insulated circuit board11to the heat dissipation base3and an inner wall22aof the frame portion20. That is, unlike the inner resist portion4a, the outer resist portion4bdoes not need to fill the entire space between the solder layer17aor17bbonding an insulated circuit board11to the heat dissipation base3and an inner wall22aof the frame portion20in side view. The width of the outer resist portion4bmay be less than the width L2of the inner resist portion4a. The outer resist portion4balso prevents the solder layers bonding the insulated circuit boards11to the front surface3aof the heat dissipation base3from spreading to the outer side.

Next, a method for manufacturing the semiconductor device1will be described with reference toFIGS.4and5.FIGS.4and5illustrate a flowchart of a method for manufacturing the semiconductor device according to the first embodiment. After step S3inFIG.4, step S4isFIG.5is performed.

First, a preparation process for preparing components of the semiconductor device1is performed (step S1inFIG.4). Examples of the components prepared in step S1include the insulated circuit boards11, the semiconductor chips15aand15b, the case2, and the heat dissipation base3. In addition to these components, other components needed to manufacture the semiconductor device1are also prepared. Manufacturing apparatuses used to manufacture the semiconductor device1may also be prepared.

In addition, in the preparation process, the resist4is formed on the heat dissipation base3. The forming of the resist4on the heat dissipation base3will be described. First, the heat dissipation base3is prepared (step S1ainFIG.4). The heat dissipation base3will be described with reference toFIG.6.FIG.6is a plan view of the heat dissipation base prepared in the preparation process included in the semiconductor device manufacturing method according to the first embodiment.

As illustrated inFIG.6, the heat dissipation base3has a rectangular shape in plan view, and may have four rounded corner portions. The heat dissipation base3has the front surface3a. In addition, in plan view, the heat dissipation base3has the long side surface3a1, the short side surface3a2, the long side surface3a3, and the short side surface3a4enclosing the front surface3ain the four directions. In addition, in plan view, the fixing holes3bare formed in the four corner portions of the heat dissipation base3.

Placement areas3c1,3c2,3c3, and3c4are set on the front surface3aof the heat dissipation base3. The size of each of these placement areas3c1,3c2,3c3, and3c4may match the size of each of the metal plates14included in the insulated circuit boards11of the semiconductor units10. The distance between two neighboring placement areas of the placement areas3c1,3c2,3c3, and3c4is distance W, which may be, for example, between 1.8 mm and 2.2 mm, inclusive.

Next, the resist4is formed on the front surface3aof the heat dissipation base3(step S1binFIG.4). The forming of the resist4will be described with reference toFIG.7.FIG.7is a plan view of the heat dissipation base on which the resist prepared in the preparation process included in the semiconductor device manufacturing method according to the first embodiment is formed.

First, the outer resist portion4bis formed on the front surface3asuch that the long side portion, the short side portion, the long side portion, and the short side portion are parallel to the long side surface3a1, the short side surface3a2, the long side surface3a3, and the short side surface3a4with a predetermined distance from the placement areas3c1,3c2,3c3, and3c4. The outer resist portion4bhas a continuous circular frame shape in plan view.

In addition, the inner resist portion4ais formed such that a part of the inner resist portion4ais parallel to the long side surface3a1and the long side surface3a3and such that another part of the inner resist portion4ais parallel to the short side surface3a2and the short side surface3a4in the space among the placement areas3c1,3c2,3c3, and3c4on the front surface3a. InFIG.7, the inner resist portion4ais formed to fill the space among the placement areas3c1,3c2,3c3, and3c4. In practice, in view of the spreading of the solder as will be described below, the inner resist portion4ais formed in the space away from the placement areas3c1,3c2,3c3, and3c4by a few millimeters. The inner resist portion4ahas a cross shape in plan view, connects the long side portions of the outer resist portion4b, and connects the short side portions of the outer resist portion4b.

Thus, the resist4has a rectangular shape in plan view, and has four opening areas4c1,4c2,4c3, and4c4inside. Opposing sides of each of the opening areas4cl,4c2,4c3, and4c4match opposing side of each of the placement areas3c1,3c2,3c3, and3c4. The inner resist portion4aand the outer resist portion4bmay be formed in any order as long as the resist4as illustrated inFIG.7is drawn.

Next, a unit assembly process for assembling the semiconductor units10is performed (step S2inFIG.4). The semiconductor chips15aand15bare bonded to the conductive plates13aand13bof the individual insulated circuit board11, respectively, via the solder layer17c, so as to assemble the individual semiconductor unit10. In the present embodiment, four semiconductor units10are assembled.

Next, a semiconductor unit bonding process for bonding the semiconductor units10to the front surface3aof the heat dissipation base3is performed (step S3inFIG.4). To perform the semiconductor unit bonding process, first, a positioning jig30is disposed on the front surface3aof the heat dissipation base3(step S3ainFIG.4). This process will be described with reference toFIGS.8and9.FIG.8is a plan view illustrating the semiconductor unit bonding process (setting of a positioning jig) included in the semiconductor device manufacturing method according to the first embodiment.FIG.9is a sectional view illustrating the semiconductor unit bonding process (setting of the positioning jig) included in the semiconductor device manufacturing method according to the first embodiment. Specifically,FIG.9is a sectional view taken along a dash-dotted line Y-Y inFIG.8.

As illustrated inFIGS.8and9, the positioning jig30is set on the front surface3aof the heat dissipation base3. The positioning jig30is made of a material having an excellent heat resistance and having a property that prevents solder from spreading and adhering thereto. The material is, for example, carbon or a metal material having an oxide film formed on its surface. The positioning jig30includes a front surface30ahaving an approximately rectangular shape in plan view, and includes a long side surface30a1, a short side surface30a2, a long side surface30a3, and a short side surface30a4sequentially enclosing the front surface30ain four directions. In addition, positioning areas32a,32b,32c, and32ddefined by a horizontal frame31aand a vertical frame31bare formed in the front surface30a. Each of the positioning areas32a,32b,32c, and32dis sufficiently large such that a corresponding one of the insulated circuit boards11is stored, and may be larger than a corresponding one of the placement areas3c1,3c2,3c3, and3c4of the heat dissipation base3. The front surface30aof the positioning jig30may have the same shape as the front surface3aof the heat dissipation base3. The front surface30aof the positioning jig30may have any size as long as the positioning areas32a,32b,32c, and32dare formed. After the positioning jig30is set on the front surface3aof the heat dissipation base3, the outer resist portion4bof the resist4may be located under edge portions of the positioning areas32a,32b,32c, and32dof the positioning jig30. Alternatively, the outer resist portion4bof the resist4may be formed such that part of the outer resist portion4bis seen on the inner side of the edge portions of the positioning areas32a,32b,32c, and32dof the positioning jig30, the edge portions being parallel to the long side surface30a1, the short side surface30a2, the long side surface30a3, and the short side surface30a4in plan view.

In addition, the width (the length in the width direction) of the horizontal frame31aand the vertical frame31bmay be less than the distance W between any two of the placement areas3c1,3c2,3c3, and3c4. If the distance W is 2 mm, the width of the horizontal frame31aand the vertical frame31bmay be, for example, 1.75 mm. Thus, in plan view, the inner resist portion4aformed on the heat dissipation base3is viewed from both sides of the horizontal frame31aand from both sides of the vertical frame31b, the inner resist portion4aextending in a longitudinal direction perpendicular to the width direction.

Next, solder plates are set on the front surface3aof the heat dissipation base3(step S3binFIG.4). Specifically, solder plates are set on the placement areas3c1,3c2,3c3, and3c4of the heat dissipation base3(seeFIG.10, which will be described below and which illustrates solder plates17a2and17b2) through the positioning areas32a,32b,32c, and32dof the positioning jig30set on the heat dissipation base3.

Next, the semiconductor units10are set on the front surface3aof the heat dissipation base3(step S3cinFIG.4). This process will be described with reference toFIG.10.FIG.10is a sectional view illustrating the semiconductor unit bonding process (setting of the semiconductor units) included in the semiconductor device manufacturing method according to the first embodiment.FIG.10is a sectional view corresponding toFIG.9.

The semiconductor units10are set on the placement areas3c1,3c2,3c3, and3c4of the heat dissipation base3via solder plates through the positioning areas32a,32b,32c, and32dof the positioning jig30set on the heat dissipation base3, as illustrated inFIG.10.FIG.10illustrates the solder plates17a2and17b2.

Next, the heat dissipation base3, the solder plates, and the semiconductor units10are heated (step S3dinFIG.4). This heating melts the solder plates, and the resultant molten solder spreads on the front surface3aof the heat dissipation base3. In this step, the spreading of the molten solder is prevented by the resist4.

Next, the heat dissipation base3, the solder, and the semiconductor units10are cooled (step S3einFIG.4). This step will be described with reference toFIG.11.FIG.11is a sectional view illustrating the semiconductor unit bonding process (cooling) included in the semiconductor according to the first device manufacturing method embodiment.FIG.11is a sectional view corresponding toFIG.10.

By this cooling, the molten solder is cured, and as illustrated inFIG.11, the insulated circuit boards11of the semiconductor units10are bonded to the front surface3aof the heat dissipation base3via the solder layers (the solder layers17aand17binFIG.11). In this step, the semiconductor units10are located on their respective placement areas3cl,3c2,3c3, and3c4of the heat dissipation base3.

Next, the positioning jig30is removed (step S3finFIG.4). From the state illustrated inFIG.11, the positioning jig30is removed. In this way, the individual semiconductor units10are bonded to the front surface3aof the heat dissipation base3via the solder layers.

Next, a case attachment process for attaching the case2to the heat dissipation base3is performed (step S4inFIG.5). The case2is attached to the heat dissipation base3via adhesive. In this step, the semiconductor units10are stored in the storage area22of the case2. In addition, the inner end portions of the external connection terminals23are disposed to face the insulated circuit boards11of the semiconductor units10.

Next, a wiring process for wiring the semiconductor units10is performed (step S5inFIG.5). The inner end portions of the external connection terminals23of the case2are bonded to their respective conductive plates13bof the insulated circuit boards11. This bonding is, for example, ultrasonic bonding. As needed, the semiconductor units10may be wired with wires.

Next, a sealing process for sealing the storage area22of the case2with sealing material is performed (step S6inFIG.5). Specifically, sealing material is injected into the storage area22of the case2, so as to seal the semiconductor units10, the wires, etc., stored in the storage area22. As a result, the semiconductor device1illustrated inFIGS.1and2is obtained.

Next, a semiconductor device according to a reference example will be described. The semiconductor device according to the reference example has same construction as that of the semiconductor device1, except that the inner resist portion4aof the resist4of the semiconductor device according to the reference example does not come in contact with the edge portion17a1of the solder layer17a, the edge portion17a1facing the solder layer17band does not come in contact with the edge portion17b1of the solder layer17b, the edge portion17b1facing the solder layer17a. For example, the inner resist portion4ais formed in the middle of the space between the solder layers17aand17b. A method for manufacturing the semiconductor device including this inner resist portion4awill be described with reference toFIGS.4,5, and12to14.FIG.12is a sectional view illustrating a semiconductor unit bonding process (heating) included in a semiconductor device manufacturing method according to the reference example.FIG.13is a sectional view illustrating the semiconductor unit bonding process (cooling) included in the semiconductor device manufacturing method according to the reference example.FIG.14is a sectional view of a main part, illustrating the semiconductor unit bonding process (removal of a positioning jig) included in the semiconductor device manufacturing method according to the reference example.FIGS.12and13are each a sectional view corresponding toFIG.10.FIG.14is an enlarged view of the space between semiconductor units10after removal of the positioning jig30. A case in which the semiconductor device is seen in the +Y direction will hereinafter be described. The same description will also be applied to a case in which the semiconductor device is seen in the +X direction.

The semiconductor device according to the reference example is also manufactured in accordance with the flowchart inFIGS.4and5. The following description of the manufacturing method in accordance with the flowchart inFIGS.4and5will be simplified or omitted, as needed.

First, as in the first embodiment, the preparation process (step S1inFIG.4) is performed. In this step, the heat dissipation base3is also prepared (step S1ainFIG.4), and the resist4is formed on the front surface3aof the heat dissipation base3(step S1binFIG.4). The inner resist portion4aof the resist4is formed in the middle of the space between two of the placement areas3c1,3c2,3c3, and3c4on the front surface3aof the heat dissipation base3, without being in contact with the adjacent solder layers. In addition, the width L2of the inner resist portion4ais, for example, less than the distance L1between semiconductor units10(insulated circuit boards11), as illustrated inFIG.14.

Next, as in the first embodiment, the unit assembly process (step S2inFIG.4) and the semiconductor unit bonding process (step S3inFIG.4) are performed sequentially. In the semiconductor unit bonding process, the positioning jig30is set on the front surface3aof the heat dissipation base3(step S3ainFIG.4). The solder plates17a2and17b2are set on the placement areas3cl,3c2,3c3, and3c4of the front surface3aof the heat dissipation base3through the positioning areas32a,32b,32c, and32dof the positioning jig30(step S3binFIG.4), and the semiconductor units10are set on the solder plates17a2and17b2(step S3cinFIG.4).

Next, the heat dissipation base3, the solder plates17a2and17b2, and the semiconductor units10are heated (step S3dinFIG.4). Because of this heating, the solder melted from the solder plates17a2and17b2spreads on the front surface3aof the heat dissipation base3. In addition, in this step, as the heat dissipation base3is heated, the heat dissipation base3expands mainly to the outer side. For example, when seen in the +Y direction, the heat dissipation base3expands in the +X directions as illustrated inFIG.12.

Next, the heat dissipation base3, the molten solder, and the semiconductor units10are cooled (step S3einFIG.4). As the molten solder is cooled and cured, the molten solder begins to bond the semiconductor units10to the heat dissipation base3. In addition, as the heat dissipation base3is cooled, the heat dissipation base3contracts in the ±X directions as illustrated inFIG.13. Since the semiconductor units10are bonded to the heat dissipation base3, as the heat dissipation base3contracts, the semiconductor units10are displaced toward the center in the ±X directions.

Recent years, the space between each pair of semiconductor units10disposed on the front surface3aof the heat dissipation base3has been reduced in order to dispose many semiconductor units10on the heat dissipation base3. In addition, in order to reduce the size of a semiconductor device, the space between each pair of semiconductor units10needs to be reduced. If the space between each pair of semiconductor units10is reduced in order to densely mount the semiconductor units10(the insulated circuit boards11) on the heat dissipation base3, when the heat dissipation base3contracts due to the cooling, the semiconductor units10bonded to the heat dissipation base3are displaced toward the center of the heat dissipation base3in plan view. For example, as illustrated inFIG.13, neighboring semiconductor units10that are displaced toward the center in the ±X directions hold the vertical frame31bof the positioning jig30. Although not illustrated, when seen in the +X direction, the horizontal frame31aof the positioning jig30is also held by neighboring semiconductor units10.

If the positioning jig30is held by neighboring semiconductor units10, the positioning jig30is not easily removed in step S3finFIG.4. In some cases, the positioning jig30may be firmly held by neighboring semiconductor units10and may fail to be removed.

In addition, when neighboring semiconductor units10hold the vertical frame31bof the positioning jig30, the neighboring semiconductor units10are damaged. As a result, for example, as illustrated inFIG.14, end portions of the insulating plates12of the insulated circuit boards11included in the semiconductor units10are damaged and broken.

As described above, when the semiconductor units10(semiconductor chips15aand15b) are densely mounted, assembly malfunctions easily occur, and the manufacturing cost is increased. In addition, the insulated circuit boards11are broken, and the quality of the semiconductor device is deteriorated.

In contrast, the semiconductor device1according to the first embodiment, the width L2of the inner resist portion4ais greater than the distance L1between each pair of semiconductor units10(insulated circuit boards11). In addition, the inner resist portion4ais in contact with edge portions of its neighboring solder layers, the edge portions facing each other.

Each insulated circuit board11bonded to the front surface3aof the heat dissipation base3is displaced as the heat dissipation base3expands and contracts in steps S3sand S3einFIG.4. Hereinafter, this displacement with respect to the width of the inner resist portion4awill be described with reference toFIG.15.FIG.15is a graph illustrating the displacement of an insulated circuit board with respect to the width of the resist.

For example, inFIG.12, first, an insulated circuit board11was disposed on the front surface3aof the heat dissipation base3via a solder plate17b1and was bonded to the front surface3aby heating and cooling. Next, the displacement of the insulated circuit board11was measured with respect to the width L2of the inner resist portion4a. The measurement was conducted a plurality of times with different widths L2.

The horizontal axis inFIG.15represents the width L2(mm) of the inner resist portion4aof the resist. The vertical axis inFIG.15represents the displacement (mm) of the insulated circuit board11with respect to the width L2of the inner resist portion4a.

The displacement is represented by the distance that the insulated circuit board11has moved from a present reference location. On the vertical axis inFIG.15, 0 represents the reference location, and α1, α2, α3, α4, and α5 represent numerical values. These numerical values have a relationship of α1<α2<α3<α4<α5. For example, the location of an end portion of the insulated circuit board11inFIG.12is the reference location. That is, this location is represented by 0. How much the insulated circuit board11has moved from this reference location toward (in the −X direction) the vertical frame31bof the positioning jig30is the displacement (in the negative direction). How much the insulated circuit board11has moved from this reference location in the direction opposite to the vertical frame31bof the positioning jig30(in the +X direction) is the displacement (in the positive direction).

In addition, the lower limit of the displacement inFIG.15is the displacement that causes the insulated circuit board11to be displaced in the negative direction and to come in contact with the positioning jig30. The upper limit of the displacement inFIG.15is the displacement that causes the insulated circuit board11to move in the positive direction and to move over the space in which placement of the insulated circuit board11is allowed. That is, if the displacement inFIG.15exceeds the upper limit, the insulated circuit boards11are not densely mounted.

FIG.15illustrates a plurality of measurement results of the displacement of the insulated circuit board11for each width L2of the inner resist portion4a. Thus, as illustrated inFIG.15, for each width L2of the inner resist portion4a, different displacements of the insulated circuit board11were obtained. For each width L2of the inner resist portion4a, a square represents an average of the plurality of measurement results of the displacement of the insulated circuit board11.

As illustrated inFIG.15, the above-described measurement indicates that the displacement of the insulated circuit board11generally shifts in the positive direction as the width L2of the inner resist portion4aincreases. This may be because of the following reason. First, because the inner resist portion4ahas water repellency against the molten solder, the inner resist portion4aprevents the molten solder from spreading. Second, it is also conceivable that the inner resist portion4aprevents the insulated circuit board11on the solder from being displaced with the contraction of the heat dissipation base3.

Although the displacement of the insulated circuit board11shifts in the positive direction as the width L2of the inner resist portion4aincreases, when the width L2of the inner resist portion4ais 1 mm or less, the displacement of the insulated circuit board11could exceed the lower limit. When the width L2of the inner resist portion4ais 2 mm or greater, the displacement of the insulated circuit board11does not exceed the lower limit. Thus, when the width L2of the inner resist portion4ais 2 mm or more, the insulated circuit board11does not come in contact with the vertical frame31bof the positioning jig30. However, when the width L2of the inner resist portion4ais 5 mm or greater, the displacement of the insulated circuit board11exceeds the upper limit. Thus, it is not suitable to set the width L2of the inner resist portion4ato 5 mm or greater when the insulated circuit board11needs to be densely mounted on the heat dissipation base3.

Therefore, when the width L2of the inner resist portion4ais 1 mm or greater and 5 mm or less, preferably, between 2 mm and 4 mm, inclusive, it is possible to densely mount the insulated circuit boards11, which are displaced with the expansion and contraction of the heat dissipation base3, on the heat dissipation base3, without having the insulated circuit boards11come in contact with the vertical frame31bof the positioning jig30.

InFIG.12, as described above, the distance W of the space between neighboring insulated circuit boards11is between 1.8 mm and 2.2 mm, inclusive. Thus, since the width L2of the inner resist portion4aformed in the space between the neighboring insulated circuit boards11is preferably between 2 mm and 4 mm, inclusive, the inner resist portion4ais in contact with the edge portion17a1of the solder layer17a, the edge portion17a1facing the solder layer17b, and is in contact with the edge portion17b1of the solder layer17b, the edge portion17b1facing the solder layer17a.

The above-described semiconductor device1includes neighboring insulated circuit boards11and a heat dissipation base3. The heat dissipation base3has a front surface3aon which one of the insulated circuit boards11is bonded via a solder layer17aand on which another insulated circuit board11is bonded via a solder layer17b. In addition, the neighboring insulated circuit boards11face each other with a space therebetween, and an inner resist portion4ais formed in the space on the front surface3aalong the solder layers17aand17b. The inner resist portion4ais in contact with an edge portion17a1of the solder layer17a, the edge portion17a1facing the solder layer17b, and is in contact with an edge portion17b1of the solder layer17b, the edge portion17b1facing the solder layer17a. Since the inner resist portion4ais formed on the heat dissipation base3, even when the heat dissipation base3expands or contracts due to the heating and cooling in the process of manufacturing the semiconductor device1, the bonding location of each insulated circuit board11is controlled. Thus, even when the insulated circuit boards11are densely mounted on the heat dissipation base3, occurrence of assembly malfunctions in the process of manufacturing the semiconductor device1is prevented. Therefore, in the semiconductor device1, the insulated circuit boards11are densely mounted.

Second Embodiment

A semiconductor device according to a second embodiment includes an inner resist portion4a, which is different from the inner resist portion4aof the semiconductor device1according to the first embodiment. The inner resist portion4aaccording to the second embodiment includes a first resist portion, which is in contact with the edge portion17a1of the solder layer17a, and includes a second resist portion, which is in contact with the edge portion17b1of the solder layer17band is away from the first resist portion. The semiconductor device according to the second embodiment will be described with reference toFIGS.16and17.

FIG.16is a plan view of the semiconductor device according to the second embodiment.FIG.17is a sectional view of a main part of the semiconductor device according to the second embodiment.FIG.16is a plan view corresponding toFIG.1according to the first embodiment.FIG.17corresponds toFIG.3according to the first embodiment, and is a sectional view taken along a dash-dotted line Y-Y inFIG.16.

This semiconductor device1aaccording to the second embodiment has the same construction as that of the semiconductor device1according to the first embodiment, except the resist4. The resist4of the semiconductor device1aincludes a first resist portion4a1and a second resist portion4a2, in addition to the outer resist portion4b.

As illustrated inFIGS.16and17, the first resist portion4a1is formed to come in contact with the edge portion17a1of the solder layer17aalong the edge portion17a1. The second resist portion4a2is formed to come in contact with the edge portion17b1of the solder layer17balong the edge portion17b1. In addition, the second resist portion4a2is formed to be in parallel with and away from the first resist portion4a1.FIGS.16and17illustrate the space between neighboring insulated circuit boards11seen in the +Y direction. When seen in the +X direction, the first resist portion4a1and the second resist portion4a2are also formed in the same way as illustrated inFIGS.16and17in the space between neighboring insulated circuit boards11.

The width L2between a side portion of the first resist portion4a1and a side portion of the second resist portion4a2, the former side portion being in contact with the edge portion17a1of the solder layer17aand the latter side portion being in contact with the edge portion17b1of the solder layer17b, is the same as the width L2of the inner resist portion4aaccording to the first embodiment. As is the case with the above-described inner resist portion4a, the first resist portion4a1and the second resist portion4a2also control the bonding location of each insulated circuit board11, even when the heat dissipation base3expands and contracts due to the heating and cooling in the process of manufacturing the semiconductor device1a.

Thus, even when the insulated circuit boards11are densely mounted on the heat dissipation base3, occurrence of assembly malfunctions in the process of manufacturing the semiconductor device1ais prevented. Therefore, in the semiconductor device1a, the insulated circuit boards11are densely mounted.

According to the disclosed technique, it is possible to densely mount boards while controlling the bonding location of each board.