Driver with selectable output impedance

An integrated circuit is configured to be in a calibration mode of operation to establish a desired output impedance of a driver circuit. A predetermined constant voltage is established at a circuit node within the integrated circuit. A calibration current is conducted through a transistor connected in series with a variable value resistance in the integrated circuit at the circuit node. A resistance value of the variable value resistance is varied to establish a value of the calibration current which establishes the desired output impedance. The calibration mode is exited and a functional mode is entered. A calibrated resistance value is used during the functional mode of operation. The calibration current is conducted as a calibrated current through the transistor and calibrated resistance value. Variation of the calibrated current is corrected in response to voltage and process variations to maintain the calibrated current and output impedance of the driver circuit.

BACKGROUND

This disclosure relates to output drivers, and more particularly to output drivers with selectable output impedance.

2. Related Art

As speeds continue to increase in integrated circuits, the issues relating to termination of the inputs and outputs are becoming more significant. For example, an output of an output driver of an integrated circuit can, at very high speeds, ring if the output impedance does not properly correspond to the input impedance of the circuit that it drives. The necessary control of the output impedance is difficult to achieve with an integrated circuit because of the variations in circuit performance caused by variations in processing. One technique has been for the output driver to have a variable output impedance that is selected to be a particular value. With the value being known with sufficient accuracy, the output can be terminated with an impedance that avoids the ringing. There are a variety of known output drivers with variable output impedance that allow for selection of a desired output impedance. One of the continuing issues is in providing a technique that selects the output impedance. In a typical case, the selection process and the ultimate operation of the output driver require an external resistor. The resistor is external because it needs to be precise in its value and not vary with temperature. Due to process variations, resistors on integrated circuits are not generally available with sufficient precision as to its value. The use of the precision resistor, however, does not completely alleviate issues relating to process variation. The output impedance, even though derived from a precision resistor, is still subject to process variations causing differences in transistor characteristics and corresponding differences in circuit performance. Circuit techniques can be used to reduce the differences in circuit performance but they are difficult to completely remove. Thus, the provided output impedance may still vary from what is desired.

Thus there is a need for an output driver with a desired output impedance that overcomes or improves upon one or more of the issues raised above.

DETAILED DESCRIPTION

In one aspect, an output driver uses an internal variable resistor that has been calibrated to a certain value that is used by the output driver to provide a desired output impedance. Because the output impedance is measured in the selection of the resistance, the selected resistance can be used to very accurately achieve the desired output impedance. This is better understood by reference to the following description and the drawings.

Shown inFIG. 1is a system10comprising an integrated circuit (IC) pad12, an input/output (I/O) pad14, a calibrator16, a variable resistor18, an external tester20, a node22, and a controlled-impedance output circuit24. IC pad12, I/O pad14, calibrator16, variable resistor18, node22, and controlled-impedance output circuit24are part of a single integrated circuit. External tester20is external to the integrated circuit. IC pad12is connected to calibrator16and external tester20. Calibrator16has an input connected to node22, a bias output connected to node22, and a calibrate output connected to a control input of variable resistor18. Variable resistor18is connected to node22and to a negative power supply terminal VSS. VSS in this example is ground but could be for another potential. VSS is for being at a voltage lower than a positive power supply terminal commonly referenced as VDD although not shown inFIG. 1. Controlled-impedance output circuit24has a current output connected to node22, a data input for receiving data and control signals from circuitry internal to the integrated circuit, and an output coupled to I/O pad14. External tester20has an input connected to I/O pad14and an output connected to IC pad12.

In operation calibrator16sets a resistance for variable resistor18, based on an input from external tester20, forces a voltage at node22where variable resistor18draws current Icalibratefrom controlled-impedance output circuit24. Current Icalibratecontrols an output impedance of controlled-impedance output circuit24. Tester20draws current from controlled-impedance output circuit24at a voltage of half the voltage at VDD (½ VDD) and measures the current at the voltage of ½ VDD. Knowing the current and the voltage allows for knowing the output impedance. If the output impedance is a desired output impedance, testing is complete and the resistance of variable resistor18may be set either temporarily or permanently. If the output impedance is not the desired output impedance, external tester20changes the input to calibrator16to cause calibrator16to change the resistance of variable resistor18. Tester20again tests the output impedance of controlled-impedance output circuit24. This process continues until the desired output impedance is achieved and the input to variable resistance18is stored.

Shown inFIG. 2is controlled-impedance output circuit24ofFIG. 1in more detail. As shown inFIG. 2, controlled-impedance output circuit24comprises a counter28, a tracking circuit30, a pre-driver31, and an output driver32. Tracking circuit30comprises P channel transistors36,38,40and others not shown. Output driver32comprises transistors42,44,46, and others not shown. Transistor36has a source connected to VDD, a gate coupled to an impedance select bit ISB0of an output34of counter28, and a drain connected to a node77. Transistor38has a source connected to VDD, a gate coupled to an impedance select bit ISB1of output34of counter28, and a drain connected to node77. Transistor40has a source connected to VDD, a gate coupled to an impedance select bit ISB2of output34of counter28, and a drain connected to node77. Bit ISB0is the least significant bit and bits ISB1and ISB2are next in ascending order of significance. Bits ISB0, ISB1, ISB2, and the additional bits of output34are active low. The transistors of tracking circuit30are sized by current drive capability in ascending order, doubling with each bit as indicated by 1x, 2, x, and 4x. This may be called binary weighting. The sizing for a given transistor can be achieved with multiple transistors in parallel or in series. Pre-driver31has an impedance select input for receiving output34, a data input for receiving a data signal, and an output35for providing data/impedance bits, which are active low, such as D_ISB0, D_ISB1, and D_ISB2. Additional data/impedance signals are also provided corresponding to output34. Transistor42has a source connected to VDD, a gate coupled to bit D_ISB0of output35of pre-driver31, and a drain connected to I/O pad14. Transistor44has a source connected to VDD, a gate coupled to bit D_ISB1of output35, and a drain connected to I/O pad14. Transistor40has a source connected to VDD, a gate coupled to bit D_ISB2of output35, and a drain connected to I/O pad14. The transistors of tracking circuit30are sized in ascending order of current drive capability, doubling with each bit as indicated by 1y, 2, y, and 4y. The next is 8y. Y and X have a fixed size ratio in which Y is bigger than X. Transistors36,38, and40thus each have the same ratio, which is X to Y, to transistors42,44, and46, respectively.

In operation current Icalibrateis drawn from tracking circuit30. Counter28has an output set to a nominal value such as half of its maximum count value during calibration. The nominal value thus sets the impedance of tracking circuit30. Pre-driver31combines output34with the data signal to provide an active low signal for each active low bit provided by output35when the data signal is asserted. Thus, if the data signal is a logic high and bit ISB0is a logic low (asserted), then pre-driver31provides bit D_ISB0as a logic low (asserted). If the data signal is a logic low (deasserted), then all of the bits of output35that are provided to output driver32are a logic high (deasserted). For the case of the data signal being asserted, the impedance of output driver32and the impedance of tracking circuit have a ratio based upon the ratio of X to Y. Output driver32is for providing the logic high output on I/O pad14. Transistors such as transistors42,44, and46are non-conductive when the data signal is a logic low. A logic low on I/O pad14is provided by N channel transistors that are not shown inFIG. 2.

Shown inFIG. 3is calibrator16and variable resistor18according to a calibration configuration. Calibrator16comprises counter50having a multi-bit output51, an N channel transistor52, a high gain amplifier54, and a voltage reference circuit56that is constant over process, voltage, and temperature variations. Variable resistor18comprises N channel transistors60,62,64,66, and others not shown and resistors68,70,72,74, and others not shown. Transistor60has a gate connected to a signal51A that is one of the bits of multi-bit output51, a drain connected to node22, and a source. Resistor68has a first terminal connected to the source of transistor60and a second terminal connected to VSS. Transistor62has a gate connected to signal51B, a drain connected to node22, and a source. Resistor70has a first terminal connected to the source of transistor62and a second terminal connected to VSS. Transistor64has a gate connected to signal51C, a drain connected to node22, and a source. Resistor72has a first terminal connected to the source of transistor64and a second terminal connected to VSS. Transistor66has a gate connected to signal51D, a drain connected to node22, and a source. Resistor74has a first terminal connected to the source of transistor66and a second terminal coupled to VSS. Resistors68,70,72, and74are sized in ascending order, doubling with each bit as indicated by 1n, 2n, 4n, and 8n. Transistors60,62,64, and66form transistor/resistor pairs with resistors68,70,72, and74, respectively. The additional transistors and resistors are similarly connected in transistor/resistor pairs, and the resistors continue the doubling with each additional transistor/resistor pair in the manner of binary weighting. Counter50has an input coupled to IC pad12, and an output coupled to multi-bit output51which may also be a bus of variable resistor18. Transistor52has a drain for drawing calibration current Icalibrate, a source coupled to node22of variable resistor18, and a gate. Amplifier54has an inverting input coupled to node22, an output coupled to the gate of transistor52, and a non-inverting input coupled to voltage reference generator56.

In a calibration mode, transistor52causes node22to be a voltage equal to the output of voltage reference generator56, which is a reference voltage, due to the high gain of amplifier54. Thus for any calibration current Icalibratethe voltage one node22is the reference voltage or at least very close to it. For a given output of counter50a resistance of variable resistor18is set which in turn sets a calibration current Icalibrate. The data is asserted to pre-driver31with counter28providing a nominal output. Under those conditions, tester20is used to draw current through output driver32until a predetermined voltage, such as ½ VDD, is reached at I/O pad14. The tester thus can calculate the output impedance of output driver32. For calibrating, counter output51is varied and the output impedance of output driver32is measured until the desired output impedance of output driver32is obtained. When such a state is determined, output51is stored, in a register for example. The counter output, which is considered to have a count value, is the count value at which variable resistor18is set that determines the calibration current Icalibratethat establishes the desired output impedance for output driver32with a known voltage, the reference voltage, at node22and with the output of counter28at a nominal value. This count value of counter50obtained by experiment that achieves the desired output impedance is called the calibration count value. The corresponding calibration current Icalibrateis called the reference current. This is also measured for the case of the output of output driver on I/O pad14being at ½ VDD.

Shown inFIG. 4is a normal operation configuration76for providing data on I/O pad14during normal operation. Configuration76comprises controlled-impedance output circuit24, variable resistor18, amplifier54, voltage reference generator56, a P channel transistor r80, a high gain amplifier78, a resistor82, and a resistor84. Controlled-impedance output circuit24is configured the same as shown inFIG. 2. Amplifier54has its inverting input coupled to node22, its non-inverting input coupled to receive the reference voltage from reference voltage generator56, and an output coupled to counter28for toggling the output of counter28. Amplifier54functions as a comparator in configuration76. Variable resistor18is set by the calibration count value so that variable resistor18has the calibrated resistance. Transistor80has a drain coupled to variable resistor18at node22, a source coupled to tracking circuit30at node77, and a gate. Resistor82has a first terminal coupled to VDD and a second terminal. Resistor84has a first terminal coupled to VSS and a second terminal coupled to the second terminal of resistor82. Amplifier78has an inverting input coupled to the source of transistor80, a non-inverting input coupled to the second terminals of resistors82and84, and an output coupled to the gate of transistor80. Resistors are made to have the same resistance so that the second terminals of resistors82and84is at ½ VDD. Resistors82and84are on the same integrated circuit as the other elements shown inFIG. 4. The actual values of resistors82and84may be difficult to control in an integrated circuit manufacturing process but making them the same resistance is relatively easy. The feedback from transistor80keeps the inverting input at ½ VDD and thus node77at ½ VDD. Counter28is initially set at the nominal value. A current near the reference current is the initial current which causes a voltage across variable resistor18. If the initial current causes the voltage at node22to exceed the reference voltage, a logic low is output which causes counter28to count down on a next clock cycle. The clock on which configuration76operates is not shown as being well understood in the art. The counter counting down increases the impedance of tracking circuit30and thus reduces the current though variable resistor18and thus reduces the voltage on node22. This continues for each subsequent clock cycle until node22is at a lower voltage than the reference voltage which will result in a logic high output from amplifier54which will cause counter28to count up and thus decrease the impedance of tracking circuit30, thereby reducing the voltage on node22. The output of amplifier54may simply toggle between a logic low and a logic high as the steady state. To avoid the frequent toggling, an alternative is, after the output of amplifier54switches states, disabling any changes in the counter for some number of clock cycles. In the steady state condition, the non-inverting input is at or very near the reference voltage which ensures that the current through variable resistor18and tracking circuit30is the reference current. While tracking circuit30is responding to counter28, pre-driver31and output driver32are responding in the same way so that as tracking circuit reaches the impedance established by the reference current, the output impedance of output driver32is also reaching the output impedance that was being provided when the reference current was determined, which is the desired output impedance.

Shown inFIG. 5are the various elements used in the normal mode as shown inFIG. 4and in calibration mode as shown inFIG. 3and additional switches86,88, and90that provide for adding, deleting, and changing connections. Switch86switches the output of amplifier54from the gate of transistor52in the calibration mode to the up/down input of counter28in normal mode. Switch88switches the current input of variable resistor18from the source of transistor52in the calibration mode to the drain of transistor80in the normal mode. Switch90switches the source of transistor80from being disconnected in the calibration mode to the current output of tracking circuit30in normal mode.

Thus, it is seen that a circuit can have an internal reference, resistors82and84, and still be able to provide the desired output impedance.

By now it should be appreciated that there has been provided a driver circuit in an integrated circuit having selectable output impedance. The driver circuit includes a variable value resistor coupled between a node and a reference voltage terminal. The driver circuit further includes a calibrator circuit having an input coupled to a first integrated circuit pad and an output coupled to the node, the calibrator circuit establishing a predetermined constant voltage at the node. The driver circuit further includes a controlled impedance circuit having an input for receiving data from circuitry within the integrated circuit and an output for providing the data to a second integrated circuit pad of the integrated circuit, the controlled impedance circuit conducting a calibration current determined by the variable value resistor for controlling an output impedance of the driver circuit at the second integrated circuit pad, the controlled impedance circuit varying resistance of the variable value resistor in a calibration mode to select the calibration current which determines a predetermined output impedance at the second integrated circuit pad. The driver circuit may further include switches for reconfiguring the coupling of the controlled impedance circuit from the calibration mode to an operation mode, the controlled impedance circuit comprising a counter, a tracking circuit and an output driver, the counter controlling the tracking circuit in response to a first control signal, a cascode transistor coupled in series between the tracking circuit and the variable value resistor for conducting the calibration current that was selected, and a first comparator coupled to the variable value resistor and to the cascode transistor for providing the first control signal in response to voltage variation at a first current electrode of the cascode transistor. The driver circuit may further comprise a second comparator coupled to the cascode transistor for providing a second control signal in response to voltage variation at a second current electrode of the cascode transistor, the second control signal biasing the cascode transistor. The driver circuit may be further characterized by the tracking circuit further comprising a first plurality of transistors coupled in parallel for providing the calibration current, each transistor of the first plurality of transistors having a control electrode coupled to a count value from the counter, and wherein the output driver comprises a second plurality of transistors coupled in parallel and providing a driver output which is the output for providing the data to the second integrated circuit pad of the integrated circuit, the first plurality of transistors being size ratioed to the second plurality of transistors so that variations in the driver output from process and temperature variations similarly track variations in the tracking circuit. The driver circuit may be further characterized by the first plurality of transistors and second plurality of transistors being size ratioed in accordance with a binary or a thermometer encoding. The driver circuit may be further characterized by the variable value resistor within the integrated circuit comprising a plurality of switched parallel resistors, each of which has a substantially zero temperature coefficient.

Also described is a driver circuit in an integrated circuit having selectable output impedance. The driver circuit includes a calibrated variable value resistor coupled between a node and a reference voltage terminal. The driver circuit further includes a cascode transistor having a first current electrode coupled to the calibrated variable value resistor at the node, a second current electrode and a control electrode. The driver circuit further includes a first comparator having an output coupled to the control electrode of the cascode transistor, a first input coupled to the second current electrode of the cascode transistor, and a second input for receiving a first predetermined voltage. The driver circuit further includes a second comparator having a first input coupled to the node, a second input for receiving a second predetermined voltage, and an output. The driver circuit further includes a controlled impedance circuit having a first input for receiving data from circuitry within the integrated circuit, a second input coupled to the output of the second comparator, a first output coupled to the second current electrode of the cascode transistor, and a second output for providing the data to an integrated circuit pad of the integrated circuit, the controlled impedance circuit providing a calibrated current that is conducted by the cascode transistor and the calibrated variable value resistor for controlling an output impedance of the driver circuit at the integrated circuit pad, the controlled impedance circuit maintaining the calibrated current in response to any voltage and process variation during operation of the driver circuit to maintain a predetermined output impedance at the integrated circuit pad. The driver circuit may be further characterized by the calibrated variable value resistor within the integrated circuit comprises a plurality of switched parallel resistors, each of which has a substantially zero temperature coefficient. The controlled impedance may further comprise a counter having an input which functions as the second input of the controlled impedance circuit and having an output, a tracking circuit having an input coupled to the output of the counter, and an output driver coupled to the output of the counter, the counter controlling the tracking circuit in response to the output of the second comparator. The tracking circuit may further comprise a first plurality of parallel connected transistors coupled between the output of the counter and the first output of the controlled impedance circuit. The output driver may further comprise a second plurality of parallel connected transistors coupled between the output of the counter and the integrated circuit pad, each of the first plurality of parallel connected transistors and the second plurality of parallel connected transistors comprising size ratioed transistors, the first plurality of transistors being size ratioed to the second plurality of transistors so that variations in the output driver from process and temperature similarly track variations in the tracking circuit. The first plurality of transistors and second plurality of transistors may be size ratioed in accordance with a binary or a thermometer encoding.

Describe also is a method. The method includes configuring an integrated circuit to be in a calibration mode of operation to establish a desired output impedance of a driver circuit in the integrated circuit. The method further includes establishing a predetermined constant voltage at a circuit node within the integrated circuit. The method further includes conducting a calibration current through a first transistor connected in series with a variable value resistance in the integrated circuit at the circuit node. The method further includes varying a resistance value of the variable value resistance to establish a value of the calibration current which establishes the desired output impedance of the driver circuit. The predetermined constant voltage at the circuit node within the integrated circuit may be established by coupling a comparator output of a first comparator to a control electrode of the first transistor, coupling a first input of the first comparator to a terminal for providing a first predetermined voltage, coupling a second input of the first comparator to a first current electrode of the first transistor, and receiving the calibration current at a second current electrode of the first transistor. The method may further comprise configuring the integrated circuit to exit the calibration mode of operation and enter a functional mode of operation, using a calibrated resistance value for the variable value resistor during the functional mode of operation, conducting the calibration current as a calibrated current through a second transistor coupled to the circuit node for conducting the calibration current, and correcting any variation of the calibrated current during the functional mode of operation in response to any voltage and process variations to maintain the calibrated current, thereby maintaining a predetermined output impedance of the driver circuit. The method may further comprise changing a count value in response to variations of voltage at the circuit node within the integrated circuit either above or below a voltage reference and tracking the count value and adjusting a value of the calibrated current in response to the count value. The method may further comprise tracking the counting by adjusting a number of a first plurality of parallel-connected transistors which are size ratioed with a second plurality of parallel-connected transistors which form the driver circuit. The method may further comprise size ratioing each of the first plurality of parallel-connected transistors and the second plurality of parallel-connected transistors in accordance with a binary or a thermometer encoding. The method may further comprise using a second comparator having an output coupled to a control electrode of the second transistor, a first input coupled to circuitry for tracking the count value, and a second input coupled to a second predetermined voltage. The method may further comprise implementing the variable value resistor within the integrated circuit with a plurality of switched parallel resistors, each of which has a substantially zero temperature coefficient.

Although the invention is described herein with reference to specific embodiments, various modifications and changes can be made without departing from the scope of the present invention as set forth in the claims below. For example, a single line was drawn serially through the cores from the group controller, this may be achieved with multiple lines or different lines from the group controller. Accordingly, the specification and figures are to be regarded in an illustrative rather than a restrictive sense, and all such modifications are intended to be included within the scope of the present invention. Any benefits, advantages, or solutions to problems that are described herein with regard to specific embodiments are not intended to be construed as a critical, required, or essential feature or element of any or all the claims.