Package assembly and method for manufacturing the same

A package assembly can include: (i) a plurality of electrical components stacked on at least two layers; (ii) a lead frame connected to the electrical components by solder interconnection; (iii) an encapsulating compound overlapping a portion of the lead frame and the electrical components to expose portions of leads of the lead frame from the encapsulating compound; and (iv) a heat sink having a first portion arranged between two of the plurality of electrical components, where the heat sink is configured to provide a common heat dissipation path for the electrical components.

RELATED APPLICATIONS

This application claims the benefit of Chinese Patent Application No. 201410562305.1, filed on Oct. 21, 2014, which is incorporated herein by reference in its entirety.

FIELD OF THE INVENTION

The present disclosure generally relates to the field of semiconductor packaging, and more particularly to package assemblies and associated methods of making such assemblies.

BACKGROUND

Semiconductor package continued to increase along with the increasing demand for miniaturization, lightweight packages, and multifunction capabilities, in order to decrease a package volume. Along these lines, package assemblies that include a lead frame and multiple die therein is becoming increasingly common. As such, the particular arrangement and connection methods among multiple die are crucial for the volume and performance of the package assembly.

SUMMARY

In one embodiment, a package assembly can include: (i) a plurality of electrical components stacked on at least two layers; (ii) a lead frame connected to the electrical components by solder interconnection; (iii) an encapsulating compound overlapping a portion of the lead frame and the electrical components to expose portions of leads of the lead frame from the encapsulating compound; and (iv) a heat sink having a first portion arranged between two of the plurality of electrical components, where the heat sink is configured to provide a common heat dissipation path for the electrical components.

DETAILED DESCRIPTION

The layers can be patterned using photolithography, which involves the deposition of light sensitive material, e.g., photoresist, over the layer to be patterned. A pattern is transferred from a photomask to the photoresist using light. The portion of the photoresist pattern subjected to light is removed using a solvent, exposing portions of the underlying layer to be patterned. The remainder of the photoresist is removed, leaving behind a patterned layer. Alternatively, some types of materials are patterned by directly depositing the material into the areas or voids formed by a previous deposition/etch process using techniques, such as electroless and electrolytic plating.

Back-end manufacturing refers to cutting or “singulating” the finished wafer into the individual die and then packaging the die for structural support and environmental isolation. To singulate the die, the wafer can be scored and broken along non-functional regions of the wafer called saw streets or scribes. The wafer may be singulated using a laser cutting tool or saw blade. After singulation, the individual die can be mounted to a package substrate that includes pins or contact pads for interconnection with other system components. Contact pads formed over the semiconductor die may then be connected to contact pads within the package. The electrical connections can be made with solder bumps, stud bumps, conductive paste, or wire bonds. An encapsulant or other molding material may be deposited over the package to provide physical support and electrical isolation. The finished package can then be inserted into an electrical system, and the functionality of the semiconductor device made available to the other system components.

Referring now toFIG. 1, shown is a perspective view of an example package assembly with multiple die. In this example package assembly100, two dice120and130are arranged side by side on lead frame110that includes finger leads111. The top surface of each finger lead111may have interconnecting areas. The end of conductive bump121at the bottom surface of die120can connect to the interconnecting areas of finger leads111through solder122, in order to form solder interconnections. Pads at the bottom surface of die130can connect to the interconnecting areas of finger leads111through solder122in order to form solder interconnections. Encapsulating compound160may coat lead frame110and die120and130. Further, at least one portion of finger leads111of lead frame110can be disposed from encapsulating compound160in order to provide electrical connection between the package assembly and external circuitry (e.g., printed-circuit boards [PCBs], etc.).

Referring now toFIGS. 2A-2D, shown are cross-sectional views of each step of an example manufacturing method of the package assembly ofFIG. 1. As shown inFIG. 2A, die120may be arranged on lead frame110, and solder balls122can connect to lead frame110. When reflowing, solder balls122can be melted to form solder, as shown inFIG. 2B. Die120may be fixed on corresponding finger leads of lead frame110by solder122. As shown inFIG. 2C, die130can be arranged on lead frame110, and a reflowing process may be performed to fix die130on corresponding finger leads of lead frame110by solder131. As shown inFIG. 2D, lead frame110and die120and130may be coated by encapsulating compound160(e.g., epoxy, etc.) in order to form package assembly110.

In this approach, die120and130are arranged side-by-side on the top surface of lead frame110, and certain finger leads can be shared by die120and130to achieve electrical connection. Alternatively, die120and130can be electrically connected to each other by bonding wires. Because die120and130are arranged side-by-side, the volume of package assembly100may be greater than the sum of the volumes of die120and130, which can to decrease the package density. In addition, because two steps of a reflowing process may be performed before coating die120and130by encapsulating compound160, unexpected reflowing of solder122of die120can occur when the second reflowing process is performed, which may result in defective connections.

In another approach, a package assembly with a plurality of stacked die stacked on one lead frame can be provided. The die at the bottom maybe arranged on the lead frame by solder, and other upper die may be arranged on the top surface of the next lower die by an adhesive layer. Then, the upper die may be electrically connected to the lead frame by bonding wires. Although this type of package assembly can decrease the package volume to some extent, the use of bonding wires in the package assembly may increase process complicity and manufacturing costs. In addition, the package assembly may suffer from relatively poor heat dissipation performance of the upper die, as well as poor electrical connections of the bonding wires.

In the package assembly description herein, one layer or area that is arranged “above” another layer or area can mean that the layer or area is directly on another layer or area, or there are other layers or areas between the two layers/areas. Also, when turned over, one layer/area can be arranged below another layer or area. In addition, the electrical components as described herein can be understood as general encapsulated objects, and may include die (integrated circuits [ICs]) that include integrated components (e.g., resistors, capacitors, inductors, diodes, transistors, etc.), and/or discrete components (e.g., resistors, capacitors, inductors, diodes, transistors, etc.).

In one embodiment, a package assembly can include: (i) a plurality of electrical components stacked on at least two layers; (ii) a lead frame connected to the electrical components by solder interconnection; (iii) an encapsulating compound overlapping a portion of the lead frame and the electrical components to expose portions of leads of the lead frame from the encapsulating compound; and (iv) a heat sink having a first portion arranged between two of the plurality of electrical components, where the heat sink is configured to provide a common heat dissipation path for the electrical components.

Referring now toFIGS. 3A and 3B, shown are perspective and plan views of a first example lead frame, in accordance with embodiments of the present invention. In this particular example, lead frame210may be configured to arrange electrical components at two layers. The following cross-sectional views of the package assembly are along line A-A ofFIG. 3Bgoing through interconnection areas216of the finger leads. Lead frame210can include leads211and212. Interconnecting area216can arrange contact solder to be formed on the top surface of the inner end of leads211(e.g., in a planar and banded configuration).

Leads212can include extension part212-1and raised platform212-2(e.g., configured as a stepped shape). Interconnecting area216can be configured to place contact solder formed on the top surface of platform212-2. Solder interconnection may be formed between leads211and first electrical components at the first layer, and between leads212and second electrical components at the second layer, where the second layer is higher than the first layer. The interconnection area of leads212can be higher than that of leads211in the vertical direction. Leads212may be outside of leads211; therefore, the interconnection area of leads212may surround that of leads211. For example, the bottom surface of leads211can be coplanar with that of leads212in the stacked or vertical direction.

Referring now toFIGS. 4A and 4B, shown are perspective and plan views of a second example lead frame, in accordance with embodiments of the present invention. In this particular example, lead frame310can arrange electrical components at two layers. Lead frame310can include leads311and312. Interconnecting area316may arrange contact solder to be formed on the top surface of the inside terminal of leads311(e.g., in a planar and banded configuration). Leads312can include extension part312-1and raised platform312-2(e.g., configured as a stepped shape). Interconnecting area316can arrange contact solder to be formed on the top surface of platform312-2.

Solder interconnection may be formed between leads311and first electrical components at the first layer, and between leads312and second electrical components at the second layer, where the second layer is higher than the first layer. The interconnection area of leads312can be higher than that of leads311in the vertical direction. Leads312may be outside of leads311; therefore, the interconnection area of leads312can surround that of leads311. For example, the bottom surface of leads311may be coplanar with that of leads312in the vertical or stacked direction. In this particular example, in s plane vertical with the stacked direction, leads312and311can be arranged in an interleaved fashion. The inner end of lead312between two of leads311may be outside of the interconnection area of leads311; therefore, the interconnection area of leads312can be outside of the interconnection area of leads311.

Referring now toFIGS. 5A and 5B, shown are perspective and plan views of a third example lead frame, in accordance with embodiments of the present invention. In this particular example, lead frame410can be configured to arrange electrical components at three layers. Lead frame410can include leads411,412, and413. Interconnecting area416can arrange contact solder to be formed on the top surface of the inner end of leads411(e.g., in a planar and banded configuration). Leads412can include extension part412-1and raised platform412-2(e.g., configured as a stepped shape). Interconnecting area416can arrange contact solder to be formed on the top surface of platform412-2. Leads413can include extension part413-1and raised platform413-2(e.g., configured as a stepped shape). Interconnecting area416can arrange contact solder to be formed on the top surface of platform413-2.

Solder interconnection may be formed between leads411and first electrical components at the first layer, between leads412and second electrical components at the second layer, and between leads413and third electrical components at the third layer, which third layer may be higher than the second layer, and the second layer may be higher than the first layer. The interconnection area of the third layer can be higher than that of the second layer, and the interconnection area of the second layer may be higher than the first layer. Leads413can be outside of leads412; therefore, the interconnection area of leads413can surround that of leads412. Leads412may be outside of leads411; therefore, the interconnection area of leads412may surround that of leads411. For example, the bottom surface of leads411,412, and leads413may be coplanar in a plane vertical with the stacked direction.

As described in the examples above, the lead frame can be configured to mount electrical components of two or three layers, and lead frame applied for more (e.g., 4, 5, etc.) layers can accordingly be provided. The interconnection area of the leads at higher layers may be higher than that of leads at lower layers, and the interconnection area of the leads at higher layers may surround that of leads at lower layers. For example, coating layers can be included by the interconnection area of the leads to improve conductivity and corrosion resistance. For example, the leads can be formed by copper (Cu), and the coating layer can be silver (Ag).

Although the first leads are described above as a planar and banded shape, the first leads can also be stepped shaped with an extension part and a raised platform. Interconnection areas configured to be connected to solder may be formed at the top surface of the platform. The interconnection area of the second leads (e.g.,412) may be higher than that of the first leads (e.g.,411), and the interconnection area of the second leads surrounds that of the first leads. The example lead frames described above can be configured to assembly stacked electrical components in view that interconnection areas of different layers for electrical components can be provided in order to improve the package density. In addition, bonding wires can be reduced or avoided altogether in the package assembly because the electrical components of different layers can be directly connected to the interconnection areas of the lead frame.

Referring now toFIGS. 6A-6E, shown are cross-sectional views of an example method of making a fourth example package assembly, in accordance with embodiments of the present invention. This particular example method can be employed in forming lead frame210shown above. Firstly, a stacked layer including substrate217(e.g., iron-nickel alloy), and a metal layer (e.g., copper) can be formed above. For example, substrate217can be configured as a support layer, and may be removed as a sacrificed layer. Also for example, the metal layer can be etched and patterned by employment of a first mask in order to form lead211of a “banded” shape, as shown inFIG. 6A. In the process of etching, exposed portions of the metal layer can be selectively removed by an etchant, and then the first mask may be removed. An exposed surface of lead211and substrate217can then be overlapped by encapsulating compound218(e.g., epoxy), as shown inFIG. 6B.

Encapsulating compound218may be thick enough to fill up trenches between two leads211. A top surface of lead211can be exposed again by grinding encapsulating compound218, as shown inFIG. 6C. The full top surface of a first portion of leads211and part of the top surface of a second portion of leads211may be overlapped by a second mask. The platforms can be formed by plating metal on the exposed surfaces of the second portion of leads211, as shown inFIG. 6D. The overlapped leads may be configured as leads211, and the remaining leads with platforms can be configured as leads212. After plating, the second mask may be removed, and substrate217can be removed by an etchant in order to form lead frame210that includes leads211and212.

In an alternative example, a metal sheet (e.g., copper) can be originally arranged, and lead frame210can be formed by two etching processes. The metal sheet can initially be etched through a first mask; therefore, the overlapped portion of the metal sheet can be configured as the platform of the second leads, and the thickness of the exposed portion of the metal sheet can be decreased. Secondly, the metal sheet can be etched through a second mask; therefore, the overlapped portion of the metal sheet may be configured as the first lead and the second lead, and the exposed portion of the metal sheet can be completely removed to form trenches between two leads. In another alternative example, a metal sheet (e.g., copper can be initially arranged, and lead frame210can be formed by a stamping process by available molds.

Referring now toFIG. 7, shown is an exploded perspective view of a fifth example package assembly, in accordance with embodiments of the present invention. Lead frame210can be utilized in package assembly200. Lead frame210can include a plurality finger leads with interconnection areas in the package assembly. In this particular drawing, encapsulating compound260and other parts of package assembly200are apart to show details of package assembly200. To be understood, encapsulating compound260is part of package assembly200, and encapsulating compound260together with other parts may form package assembly200.

Die220and230can be stacked on lead frame210. Each of die220and230can include internal circuits (e.g., a switching voltage regulator), and conductive bumps connected the internal circuits. The first leads (e.g.,211) of lead frame210can be in a planar and banded shape, and an interconnection area may be arranged on the top surface of the inner ends of the first leads connected to solder222(e.g., Sn). Die220may be fixed on lead frame210by solder222. The second leads (e.g.,212) of lead frame210can be in a stepped shape including an extension part and a raised platform. The interconnection area can be arranged on the top surface of the platform to be connected to solder231(e.g., Sn). Die230can be fixed on lead frame210by solder231. The size of die230can be larger than that of die220, and arranged above die220. Encapsulating compound260may overlap die220, die230, and lead frame210. Leads of lead frame210can be exposed from encapsulating compound260in order to provide electrical connection between the package assembly and external circuitry (e.g., via a PCB).

Referring now toFIG. 8, shown is an exploded perspective view of a sixth example package assembly, in accordance with embodiments of the present invention. In this particular example, package assembly300may utilise lead frame210shown above. Lead frame210can include a plurality finger leads with interconnection areas in the package assembly. In this particular example package assembly300, the upper electrical component may not be an integrated circuit or die, but rather two discrete components (e.g., resistor332and inductor333). Resistor332and inductor333can be stacked above die320, and together with die320may be assembled on lead frame210. Die320can include internal circuits and conductive bumps connected to the internal circuits. The first leads of lead frame210can be in a planar and banded shape, and interconnection areas may be arranged on the top surface of the inner ends of the first leads connected to solder322(e.g., Sn).

Die220can be fixed on lead frame210by solder322. The second leads of lead frame210can be in a stepped shape including an extension part and a raised platform. The interconnection area can be arranged on the top surface of the platform to be connected to solder331(e.g., Sn). Resistor332and inductor333can be fixed on lead frame210by solder331. The length of resistor332and inductor333may be greater than that of die220, and arranged above die220. Encapsulating compound360can overlap die220, resistor332, inductor333, and lead frame210. Leads of lead frame210can be exposed from encapsulating compound360in order to provide electrical connection between the package assembly and external circuitry (e.g., via a PCB).

Referring now toFIG. 9, shown is an exploded perspective view of a seventh example package assembly, in accordance with embodiments of the present invention. In this particular example, package assembly400may utilise lead frame410. Lead frame410can include finger leads with interconnection areas in the package assembly. In this particular example, package assembly400can include three die:420,430, and440, that are stacked in lead frame410. Each of die420,430, and440can include internal circuits and conductive bumps connected the internal circuits. The first leads of lead frame410can be any planar and banded shape, and interconnection areas may be arranged on the top surface of the inner ends of the first leads connected to solder222(e.g., Sn). Die420can be fixed on lead frame410by solder422. The second leads of lead frame410may be in a stepped shape including an extension part and raised platform. The interconnection area can be arranged on the top surface of the platform to be connected to solder431(e.g., Sn).

Die430can be fixed on lead frame410by solder431. The size of die430may be larger than that of die420, and arranged above die420. The third leads of lead frame410can be in a stepped shape including an extension part and a raised platform. The interconnection area can be arranged on the top surface of the platform to be connected to solder441(e.g., Sn). Die440can be fixed on lead frame410by solder441. The size of die440can be larger than that of die430, and may be arranged above die430. Encapsulating compound460can overlap die420, die430, die440, and lead frame410. Leads of lead frame410may be exposed from encapsulating compound460in order to provide electrical connection between the package assembly and external circuitry (e.g., via a PCB).

Although the package assembly including electrical components of two or three layers is described in the above examples, the package assembly can also include more layers and electrical components. The lead frame can include multiple groups of leads of different layers. The interconnection area of higher layers may be higher than that of lower layers, and the interconnection area of higher layers can surround that of lower layers.

Also in the above example, the discrete components are arranged above the die; however, in other cases the discrete components can be arranged under the die. Further, the size of electrical components of higher layers can be larger than that of lower layers, but in some cases both the length and width of electrical components of the higher layers may not be larger than that of lower layers. The electrical components of different layers can be arranged in different directions in the vertical or stacked direction. Therefore, if one of the length and width of the first electrical components is larger than either one of the length/width of second electrical components, the first electrical components can be arranged on the higher layers and the second electrical components can be arranged on the lower layers.

The number of electrical components of each layer can be greater than one. Also, multiple groups of leads of the lead frame can be configured to provide interconnection areas of different heights to arrange stacked electrical components in order to improve the package density. In addition, bonding wires can be reduced in number or avoided altogether in the package assembly because the electrical components of different layers can be directly connected to the interconnection areas of the lead frame.

Referring now toFIGS. 10A-10F, shown are exploded perspective views of another example package assembly, in accordance with embodiments of the present invention. In these particular examples, heat sink250can be included with lead frame210in package assemblies2100-2600. Lead frame210can include finger leads with interconnection areas inside the package assembly. Two die220and230can be stacked on lead frame210. Each of die220and230can include internal circuits and conductive bumps connected the internal circuits. The first leads (e.g.,211) of lead frame210can be in a planar and banded shape, and interconnection areas can be arranged on the top surface of the inner ends of the first leads connected to solder222(e.g., Sn).

Die220can be fixed on lead frame210by solder222. The second leads (e.g.,212) of lead frame210can be in a stepped shape including an extension part and a raised platform. The interconnection areas can be arranged on the top surface of the platform to be connected to solder231(e.g., Sn). Die230can be fixed on lead frame210by solder231. The size of die230may be larger than that of die220, and can be arranged above die220. Encapsulating compound260can overlap die220, die230, and lead frame210. Leads of lead frame210may be exposed from encapsulating compound260in order to provide electrical connection between the package assembly and external circuitry (e.g., via a PCB).

For example, die220can include a power switch of a switching converter, and die230can include a driving circuit of the switching converter (see, e.g.,FIG. 12). Because large currents may flow through the power switch and the driving circuit, heat can be generated, so package assemblies2100to2600may include a heat sink shared by die220and die230in order to provide heat dissipation path for the two die. In package assemblies2100to2600, heat sink250can include a first portion between die220and die230. The bottom surface of the first portion can connect to a heat transmission medium (e.g., heat transmission layer, heat transmission path, heat transmission adhesive, etc.), and the top surface can connect to a heat transmission medium (e.g., heat transmission layer, heat transmission path, heat transmission adhesive, etc.).

Therefore, the first portion of heat sink250can be configured as part of the common heat dissipation path of the two die. Heat sink250can further include a second portion extended to at least one surface of encapsulating compound260from the first portion, and a third portion exposed from at least one surface of encapsulating compound260. In package assembly2100, the second portion of heat sink250can be extended to the bottom surface of encapsulating compound260vertically, and the third portion may be exposed from the bottom surface of encapsulating compound260, as shown inFIG. 10A.

InFIG. 10B, package assembly2200can include a second portion of heat sink250that is extended to the top surface of encapsulating compound260vertically, and the third portion exposed from the top surface of encapsulating compound260. In package assembly2300, as shown inFIG. 10C, the second portion of heat sink250can be extended to the opposite side of encapsulating compound260horizontally, and the third portion may be exposed from the upper part of the opposite surfaces and the top surface of encapsulating compound260.

In package assembly2400, as shown inFIG. 10D, the second portion of heat sink250may be extended to the opposite surfaces of encapsulating compound260horizontally, and the third portion can be exposed from the full opposite surfaces of encapsulating compound260. In package assembly2500, as shown inFIG. 10E, the second portion of heat sink250may be extended to opposite surfaces of encapsulating compound260horizontally, and the third portion can be exposed from the full opposite surfaces and the top surface of encapsulating compound260.

In package assembly2600, as shown inFIG. 10F, the second portion of heat sink250can be extended to opposite surfaces of encapsulating compound260horizontally, and the third portion may be exposed from the entire four side surfaces and the top surface of encapsulating compound260. Alternatively, the second portion of heat sink250can be extended to side surfaces of any amount and/or top or bottom surfaces spaces for the second portion of heat sink250between platforms of leads of lead frame210are available.

For example, heat sink250can be a metal component formed integrally, such as copper. Alternatively, heat sink250can include two or more metal components to facilitate the arrangement of lead frame210, die220, die230, and heat sink250layer-by-layer. The different components of heat sink250can be bonded or welded together. One metal component of heat sink250can be one of the first portion, second portion, or third portion, or part of the first portion, second portion, or third portion. Further, leads of lead frame210can be exposed from the side surface or bottom surface of encapsulating compound260. When leads of lead frame210and the third portion of heat sink250are exposed from the same surfaces of encapsulating compound260, leads of lead frame210may be exposed from this surface because heat sink250is outside of the leads of lead frame210.

Heat sink250can be employed by package assemblies2100to2600in order to provide common heat dissipation for two die in accordance with the above examples. The second portion of heat sink250can be extended to at least one surface of encapsulating compound260, and the third portion may be exposed from one surface of encapsulating compound260to make full use of surfaces of encapsulating compound260, in order to provide heat dissipation area. The third portion of heat sink250can be connected to external heatsink and PCB, to further increase the heat dissipation area.

Referring now toFIGS. 11A-11F, shown are cross-sectional views of another example method of making a package assembly, in accordance with embodiments of the present invention. Lead frame210can include finger leads, and adjacent leads may be separated by encapsulating compound218. For example, package assembly200can be formed by this example method. Each lead of lead frame210can include interconnection area in the package assembly. Die220may be arranged on lead frame210, as shown inFIG. 11A. The internal circuitry of die220can connect to conductive bump221through conductive channels. Solder balls222can be arranged on the end of conductive bump221, and can connect to interconnection areas of lead frame210.

After a reflowing process, solder ball222can be melted to be solder222, as shown inFIG. 11B. Die220may be fixed on first lead211of lead frame210through solder222. Die220can then be overlapped by encapsulating compound260(e.g., epoxy), as shown inFIG. 11C. The top surface of second lead212may be exposed by grinding encapsulating compound260, as shown inFIG. 11D. Die230may be arranged on lead frame210. Second die can be fixed on second lead212of lead frame210by solder231after a reflowing process, as shown inFIG. 11E. Lead frame210, and die220and230, can be encapsulated by encapsulating compound270(e.g., epoxy). For example, encapsulating compound270can be grounded to decrease the thickness, in order to decrease the package volume and improve the heat dissipation efficiency. Package assembly200can be formed, as shown inFIG. 11F.

Die220and solder222can be protected by encapsulating compound260prior to the second reflowing process, in order to improve interconnection reliability. In an alternative example, as an optional step, between the example steps ofFIGS. 11B and 11C, heat sink250can be arranged as perFIG. 10A. Then, the bottom surface of the first portion of heat sink250can connect to die220. In step ofFIG. 11D, when grinding encapsulating compound260, the top surface of the first portion of heat sink250may be exposed. Between the example steps ofFIG. 11DandFIG. 11E, the top surface of the first portion of heat sink250can connect to die230. Package assembly2100of the example ofFIG. 10Acan be achieved therefrom.

In another alternative example, after the step of arranging die220, die230can be arranged directly. The first reflowing process ofFIG. 11B, the encapsulating step ofFIG. 11C, and grinding step ofFIG. 11Dcan be omitted in this particular case. After all die are arranged, one reflowing process may be performed. Therefore, die220can be fixed on first lead211of lead frame210by solder222, and die230may be fixed on second lead212of lead frame210by solder231. Then, lead frame210, and die220and230can be encapsulated by encapsulating compound (e.g., epoxy) to form package assembly200. In this particular case, only one reflowing process need be performed for electrical components of multiple layers, potentially simplifying the manufacturing process.

Referring now toFIG. 12, shown is a schematic diagram of an example switching voltage regulator that includes power devices/structures as described herein. A switching voltage regulator is just one example of the circuitry that can be wholly or partially fabricated in the semiconductor structure and/or using processes of particular embodiments. In this example, power transistors1201and1202, inductor1203, and capacitor1204can form a synchronous buck power stage circuit. In other cases, other types of power stage or converter circuits (e.g., flyback, SEPIC, boost, buck-boost, etc.) can be formed. Control and driving circuit1205(e.g., including a pulse-width modulation [PWM] controller) can receive an output signal of the power stage circuit, to form a closed-loop feedback control loop to control the switching state of power transistors1201and1202. In this way, the output signal of the power stage circuit can be controlled to be substantially constant.

Of course, other integration or grouping of circuitry into different chips, ICs, or wafers can be accommodated in particular embodiments. In one example, a multi-chip packaging structure in particular embodiments can include power transistors1201and1202being integrated into a power device chip, and control and driving circuit1205being integrated into a control chip. Since the power device may process a high voltage and/or a high current, the power device chip with a large area can be able to withstand a relatively high voltage and a relatively high current. Also, the power device may have good thermal characteristics for power supply integration.

For the integrated circuit of the switching voltage regulator shown inFIG. 12, if the carrying capacity of power transistor1202is greater than that of power transistor1201, power transistor1202may be much larger than power transistor1201. Thus, power transistor1202(e.g., the synchronous power device) can be integrated in a single synchronous power device chip, and power transistor1201(e.g., the main power device) as well as control and driving circuit1205can be integrated in another single mixed chip. Further, power transistors1201and/or1202can be any suitable types of transistors or devices (e.g., super-junction MOS transistors, VDMOS, LDMOS, IGBT, etc.).