Hardware monitoring system and method therefor

A hardware monitoring system and a method therefor are disclosed. The hardware monitoring method includes: sensing a first temperature value of a first temperature area by a first temperature sensor and sensing a second temperature value of a second temperature area by a second temperature sensor; reading and compensating for the second temperature value by a complex programmable logic device (CPLD); and reading the first temperature value and the compensated second temperature value and controlling heat dissipation of the computer system based on the first temperature value and the compensated second temperature value, by a hardware monitor. In this method, temperature values of different areas are sensed with multiple temperature sensors and are read and modified by the CPLD, thereby allowing temperature compensation for the temperature sensors and addressing the problem of inability to individually compensate for temperature values of different areas.

CROSS-REFERENCES TO RELATED APPLICATIONS

This application claims the priority of Chinese patent application number 201610850364.8, filed on Sep. 26, 2016, the entire contents of which are incorporated herein by reference.

TECHNICAL FIELD

The present invention relates to a computer system and, in particular, to a hardware monitoring system and method therefor for a server.

BACKGROUND

In a computer system, the temperatures, voltages and fan speeds of hardware devices are monitored by a hardware monitoring module. As a branch of computers, servers utilize baseboard management control (BMC) chips as hardware monitoring functions for their motherboards.

During the production and development of servers, the manufacturers tend to produce multiple versions of their products, such as high-configuration and low-configuration versions, in order to meet different needs of users. Major differences between these configurations lie in hardware monitoring capabilities and costs.

At present, most low-configuration servers use one of the following solutions for hardware monitoring:

1) a customized BMC chip, which costs much;

2) a micro-control unit (MCU) such as a hardware monitor capable of monitoring the temperatures of memories, a central processing unit (CPU), a platform path hub (PCH) and thermal sensors, which usually requires the compatibility with multiple protocols such as those for system management bus (SMbus) interfaces, inter-integrated circuit (I2C) interfaces and platform environment control interfaces (PECIs), resulting in a long development cycle;

3) a dedicated embedded controller (EC), which has some redundant capabilities and is thus also costly, despite its capabilities of integrating a host of protocols including the SMbus, I2C and PECI protocols;

4) a low-cost hardware monitor, whose temperature sensors may not be able to monitor an adequate number of sites, and thus may not meet the requirement of the server. In addition, the low-cost hardware monitor fails to provide each of the temperature sensors with an independent temperature compensation value, leading to temperature differences between different areas that are too significant to allow reasonable weights for the control of fans. For example, the temperature of the memory area is generally in the range from 60° C. to 75° C., and a temperature threshold for fan acceleration for this area is set to 65° C. Additionally, as the temperature of an input/output (I/O) area generally ranges from 50° C. to 65° C., its fan acceleration temperature threshold is set to 55° C. If a temperature compensation value of 10° C. is not provided to the I/O area, when these areas are controlled by the same pulse width modulation (PWM) interface, the control will be always dominated by the area with the higher temperature, leaving the sensor data from the area with the lower temperature threshold ignored.

Therefore, there is a need to develop a new hardware monitoring system for low-configuration servers, which can address the issue of unbalanced weights for fan control.

SUMMARY OF THE INVENTION

It is an objective of the present invention to provide a hardware monitoring system and a method therefor. The hardware monitoring system is provided primarily for low-configuration servers to enable the monitoring of hardware heat dissipation without using BMC chips. In addition, the system and method are capable of temperature compensation for different areas, which solves the problem of unbalanced weights for fan control and improves heat dissipation for the low-configuration servers.

In order to achieve the above and other related objectives, the present invention provides a hardware monitoring method for monitoring a computer system, comprising:

sensing a first temperature value of a first temperature area by a first temperature sensor and sensing a second temperature value of a second temperature area by a second temperature sensor;

reading and compensating for the second temperature value by a complex programmable logic device; and

reading the first temperature value and the compensated second temperature value and controlling heat dissipation of the computer system based on the first temperature value and the compensated second temperature value, by a hardware monitor.

Preferably, the hardware monitoring method further comprises:

electrically connecting the complex programmable logic device to an expandable component which is connected with to a third temperature sensor and sensing a third temperature value of a third temperature area using the third temperature sensor;

reading the third temperature value from the expandable component and compensating for the third temperature value, by the complex programmable logic device;

comparing the compensated third temperature value with the compensated second temperature value and feeding back a greater temperature value of the compensated second and third temperature values to the hardware monitor, by the complex programmable logic device; and

controlling heat dissipation of the computer system by the hardware monitor based on the greater temperature value and the first temperature value.

Preferably, the hardware monitoring method further comprises:

connecting the expandable component to a plurality of third temperature sensors and sensing a plurality of third temperature values of the third temperature area by the plurality of third temperature sensors,

reading the plurality of third temperature values and compensating for each of the plurality of third temperature values by the complex programmable logic device; and

comparing the compensated second temperature value with the plurality of compensated third temperature values and feeding back a greatest temperature value of the compensated second and third temperature values to the hardware monitor, by the complex programmable logic device.

Preferably, the hardware monitoring method further comprises, subsequent to reading the second temperature value and the plurality of third temperature values:

storing the second temperature value and the plurality of third temperature values in a storage unit, by the complex programmable logic device;

seeking a first offset corresponding to the second temperature value from the storage unit and compensating for the second temperature value based on the first offset to generate a fourth temperature value, by the complex programmable logic device;

seeking a plurality of second offsets corresponding to the plurality of third temperature values from the storage unit and compensating for the plurality of third temperature values based on the plurality of second offsets to generate a plurality of fifth temperature values, by the complex programmable logic device, and

comparing the fourth temperature value with the plurality of fifth temperature values and feeding back a greatest temperature value of the fourth and fifth temperature values to the hardware monitor, by the complex programmable logic device.

Preferably, the hardware monitoring method comprises:

arranging at least one of the plurality of third temperature sensors in an I/O area to sense at least one of the third temperature values for the I/O area;

arranging a further one of the plurality of third temperature sensors in an area where the expandable component is located to sense a further one of the plurality of third temperature values for the expandable component; and

wherein compensating for each of the plurality of third temperature values comprises:

seeking a third offset from the storage unit and compensating for the further one of the plurality of third temperature values for the expandable component based on the third offset, by the complex programmable logic device; and

seeking at least one fourth offset from the storage unit and compensating for the at least one of the plurality of third temperature values for the I/O area based on the at least one fourth offset, by the complex programmable logic device; and

wherein the plurality of second offsets include the third offset and the at least one fourth offset.

Preferably, the hardware monitoring method comprises:

arranging the second temperature sensor in an area where a platform controller hub is located to sense the second temperature value for the platform controller hub; and

seeking the first offset corresponding to the second temperature value for the platform controller hub from the storage unit and compensating for the second temperature value based on the first offset, by the complex programmable logic device.

Preferably, in the hardware monitoring method, the complex programmable logic device is electrically connected to the platform controller hub to allow configuration of at least one of the first and second offsets in the storage unit through the platform controller hub.

Preferably, in the hardware monitoring method, the computer system comprises a fan module; and the hardware monitor controls the heat dissipation by accessing a fan speed table and controlling a fan speed of the fan module based on the greater temperature value and the first temperature value.

Preferably, in the hardware monitoring method, the hardware monitor and the complex programmable logic device are initialized through a platform controller hub.

Preferably, in the hardware monitoring method, the computer system is a server.

Preferably, in the hardware monitoring method, the hardware monitor is configured to send an alert signal to the complex programmable logic device upon an operational parameter of the server exceeding a default value, and the complex programmable logic device is configured to cease data reading operations according to the alert signal.

In order to achieve the above and other related objectives, the present invention also provides a hardware monitoring system for a computer system, comprising:

a hardware monitor, having a first temperature sensor for sensing a first temperature value of a first temperature area; and

a complex programmable logic device electrically connected to the hardware monitor, the complex programmable logic device having a second temperature sensor for sensing a second temperature value of a second temperature area,

wherein the complex programmable logic device is configured to read and compensate for the second temperature value, and the hardware monitor is configured to read the first temperature value and the compensated second temperature value and to control heat dissipation of the computer system based on the first temperature value and the compensated second temperature value.

Preferably, in the hardware monitoring system, the complex programmable logic device is further electrically connected to an expandable component which is connected to a third temperature sensor for sensing a third temperature value of a third temperature area; and wherein: the complex programmable logic device is configured to read the third temperature value from the expandable component and compensate for the third temperature value; the complex programmable logic device is further configured to compare the compensated third temperature value with the compensated second temperature value and feeds back a greater temperature value of the compensated second and third temperature values to the hardware monitor; and the hardware monitor is configured to control heat dissipation of the computer system based on the greater temperature value and the first temperature value.

Preferably, in the hardware monitoring system, the complex programmable logic device further comprises: a first I2C interface for electrically connecting to the expandable component to allow reading of the third temperature value via the first I2C interface; a second I2C interface for electrically connecting to the second temperature sensor to allow reading of the second temperature value via the second I2C interface; and a first system management bus interface for electrically connecting to the hardware monitor to provide the greater temperature value to the hardware monitor.

Preferably, in the hardware monitoring system, the complex programmable logic device further comprises a storage unit for storing the second temperature value and third temperature value; the storage unit further stores a first offset and a second offset; and the complex programmable logic device is configured to compensate for the second temperature value based on the first offset and to compensate for the third temperature value based on the second offset.

Preferably, in the hardware monitoring system, the complex programmable logic device further comprises a second system management bus interface for electrically connecting to a platform controller hub to allow configuration of at least one of the offsets stored in the storage unit via the second system management bus interface.

Preferably, in the hardware monitoring system, the third temperature area comprises an I/O area and an area where the expandable component is located; the second temperature area comprises an area where a platform controller hub is located; and the first temperature area comprises at least one of: an area where a central process unit is located, an area where a memory is located, an area where the hardware monitor is located, and an area where a thermal diode is located.

Preferably, in the hardware monitoring system, the computer system comprises a fan module; the hardware monitor further comprises a storage module for storing a fan speed table; and the hardware monitor is configured to control the heat dissipation by accessing the fan speed table and controlling a fan speed of the fan module based on the greater temperature value and the first temperature value.

Preferably, in the hardware monitoring system, the hardware monitor further comprises: a platform environment control interface for electrically connecting to the first temperature sensor; a third system management bus interface for electrically connecting to the complex programmable logic device; and a fourth system management bus interface for electrically connecting to a platform controller hub to allow initialization of the hardware monitor via the fourth system management bus interface.

Compared to the prior art, the hardware monitoring system and hardware monitoring method provided in the present invention offer the following benefits:

Firstly, the subject matter of the present invention combines a hardware monitor with a complex programmable logic device (CPLD), utilizes a plurality of temperature sensors to sense temperature values of different areas and reads out the temperature values for modification by the CPLD. In such a manner, temperature compensation for the different areas is enabled, and the problem of inability to individually compensate for temperature values of different areas arising from the use of existing computer systems is addressed.

Secondly, the CPLD is capable of independently compensating for the temperature sensed by each of the temperature sensors, reducing the temperature differences between the areas. Therefore, increased balance between weights for temperature control during the heat dissipation control process is achieved, which allows better heat dissipation of the computer system.

Thirdly, in the subject matter of the present invention, the CPLD is electrically connected to a expandable component which is connected to one or more third temperature sensors, enabling temperature monitoring for more areas. Moreover, the CPLD is capable of independently compensating for the temperature value sensed by each third temperature sensor. This, on one hand, enlarges the temperature monitoring coverage and, on the other hand, allows compensation for multiple temperature values, thereby further enhancing heat dissipation of the computer system.

DETAILED DESCRIPTION

In order for the objectives, advantages and features of the present invention to be more apparent, the hardware monitoring system and method therefor proposed in the present invention are described below in greater detail with reference toFIGS. 1 to 4. Note that the figures are provided in a very simplified form not necessarily presented to scale, with the only intention of facilitating convenience and clarity in explaining the embodiments of the invention.

FIG. 1is a structural block diagram of a hardware monitoring system according to an embodiment of the present invention. As shown inFIG. 1, the hardware monitoring system10includes a hardware monitor11and a complex programmable logic device (CPLD)12. The hardware monitoring system10functions primarily to monitor heat dissipation of a computer system. For example, it monitors the temperature of a server board or other appropriate electronic device. The present invention is particularly suitable for monitoring heat dissipation of a low-configuration server at a low cost. A “low-configuration server” refers to a server that is lower than a “high-configuration server” in terms of cost, performance and other metrics. The hardware monitor11is electrically connected to the CPLD12.

In one embodiment, the CPLD12is electrically connected to the hardware monitor11via, but not limited to, a first system management bus (SMBus) interface S1. The CPLD12may also be electrically connected to the hardware monitor11through another suitable transmission interface including a general purpose I/O bus interface and an inter-integrated circuit (I2C) interface. It will be appreciated that the hardware monitor11has, accordingly, a third SMbus interface S3 for electrically connecting to the first SMbus interface S1 via an SMbus.

The hardware monitor11has a first temperature sensor111configured to sense a first temperature value of a first temperature area. In this embodiment, the first temperature area includes one or more of an area where a central process unit (CPU)13is located, an area where a memory14is located, an area where the hardware monitor11is located and an area where a thermal diode15is located.

It will be appreciated that in case of the first temperature area including several of the above-mentioned areas, a plurality of first temperature sensors111may be accordingly provided and at least one first temperature sensor111may be provided in each of the areas (i.e., when multiple components are operating in the first temperature area, the temperature of each of the components may be sensed with at least one first temperature sensor111). Here, the first temperature area is usually an area where an electronic component or assembly generating more heat than others in the computer system is located.

In this embodiment, when the first temperature sensor111is configured to sense a temperature of the area where the CPU is located, the hardware monitor11is electrically connected to the first temperature sensor111via a platform environment control interface (PECI) P, so that the first temperature value is read via the interface P during operation of the CPU. When the first temperature sensor111is configured to sense a temperature of the area where the memory14is located, the hardware monitor11is electrically connected to the first temperature sensor111via the third SMbus interface S3, so that the first temperature value is read via the interface S3 during operation of the memory14. That is, the CPLD12shares the third SMbus interface S3 with the first temperature sensor111that reads the temperature of the memory14.

Further, according to the hardware monitoring system10shown inFIG. 1, the hardware monitor11has eight first temperature sensors111, in which two first temperature sensors111are adapted to sense the first temperature values for two thermal diodes15(a first thermal diode151and a second thermal diode152) during operation thereof, four first temperature sensors111are adapted to sense the first temperature values for four memories14(a first memory141, a second memory142, a third memory143and a fourth memory144) during their operation, one first temperature sensor111is adapted to sense the first temperature value for the hardware monitor11during operation thereof, and the rest one first temperature sensor111is adapted to sense the first temperature value for the CPU13during its operation.

The hardware monitor11further has five analog input ports V1, V2, V3, V4, V5for respectively monitoring voltages in 12V, 5V, 2.5V, VTT and Vccp channels. Furthermore, the hardware monitor11is selected as an NCT7491 monitor with 24 pins, a QFN or QSOP package and an operating voltage ranging from 3.0 V to 3.6 V.

Additionally, the CPLD12has a second temperature sensor121configured to sense a second temperature value of a second temperature area. In this embodiment, the second temperature area includes the following area: an area where a platform controller hub (PCH)16is located. In other words, the second temperature value represents a temperature of the PCH16during its operation.

In this embodiment, the CPLD12further has a storage unit122. The CPLD12reads the second temperature value sensed by the second temperature sensor121and stores the second temperature value in the storage unit122. The storage unit122may either be an internal register or a built-in memory. The CPLD12seeks a first offset in the storage unit122and modifies the second temperature value based on the first offset.

In one embodiment, after the CPLD12reads out the second temperature value sensed by the second temperature sensor121, it looks up a Temperature—Offset table stored in the storage unit122to find the first offset corresponding to the PCH16and modifies the second temperature value based on the found first offset. The modified second temperature value is then provided to and read by the hardware monitor11. The hardware monitor11reads the first temperature value and the modified second temperature value and then controls heat dissipation of the computer system based on the first temperature value and the modified second temperature value.

Specifically, reference can be made toFIG. 2, a flowchart illustrating a monitoring method for a hardware monitoring system according to an embodiment of the present invention, for the hardware monitoring principles disclosed in the above embodiments. As shown inFIG. 2, the hardware monitoring method200in this embodiment includes the steps as detailed below. First of all, step211consists of: step211-1, in which the first temperature sensor111senses the first temperature value of the first temperature area; and step211-2, in which the second temperature sensors121senses the second temperature value of the second temperature area. In step212, the CPLD12reads out the second temperature value for compensation (herein, interchangeably used with “modification”). In step213, the hardware monitor11reads out the first temperature value and the compensated second temperature value. In step214, the hardware monitor11controls heat dissipation of the computer system based on the first temperature value and the compensated second temperature value.

In one embodiment, the computer system comprises a fan module17including one or more fans. Specifically, the fan module17may include a system fan171, a CPU fan172and a redundant fan173. Preferably, the hardware monitor11controls operating speeds of these fans using pulse width modulation (PWM) interfaces PWM. More specifically, the hardware monitor11determines a fan speed corresponding to the first temperature value and to the modified second temperature value by looking up a fan speed table and controls the operation of the fan based on the fan speed. Optionally, the fan speed table may be stored in a storage module112in the hardware monitor11.

In this embodiment, the PCH16in the computer system is electrically connected to the CPLD12in order to enable initialization of the CPLD12. The initialization may include configuring first offsets and below-described second offsets for the PCH16in the storage unit122. Alternatively, the PCH16may also read out the second temperature value(s) stored in the CPLD12for facilitating heat dissipation analysis. However, the function of the PCH16is not limited thereto, and the present invention is not particularly limited in this regard. In one embodiment of the present invention, the CPLD12is electrically connected to the PCH16via a second SMbus interface S2.

Similarly, the PCH16is also electrically connected to the hardware monitor11in order to allow initialization of the hardware monitor11. The initialization may include configuring the fan speed table in the hardware monitor11. In this embodiment, the PCH16may obtain the fan speed table from a basic input/output system read-only memory (BIOS ROM)18and store it in the hardware monitor11.

In one embodiment of the present invention, the hardware monitor11is electrically connected to the PCH16via a fourth SMbus interface S4, and the CPLD12and the hardware monitor11are electrically connected to the PCH16via the same SMbus interface in the PCH16.

In addition, in the case of the SMbus interfaces being employed as transmission interfaces for electrically connecting the hardware monitor11to the CPLD12and the PCH16, when the hardware monitor11reads out the modified second temperature value from the CPLD12, the hardware monitor11may act as a host controller on the SMbus, with the PCH16and another component on the bus as a slave controller. As such, the hardware monitor11is allowed to read out the temperature value from the CPLD12or the other component via the SMbus. Upon a temperature reading request from the hardware monitor11, the hardware monitor11will switch to act as a host controller, with the PCH16switching to act as a slave controller, so that the hardware monitor11can read the modified second temperature value stored in the storage unit122of the CPLD12via the SMbus.

In preferred embodiments, the hardware monitoring system10further comprises an expandable component19electrically connected to each of the CPLD12and a third temperature sensor20configured to sense a third temperature value of a third temperature area. The CPLD12reads out the third temperature value from the expandable component19and modifies it. Specifically, the CPLD12seeks a second offset from the storage unit122and modifies the third temperature value based on the second offset. The expandable component19may be optionally an EMC1464 element with multiple expandable interfaces for electrical connection to a plurality of third temperature sensors20.

In addition, the CPLD12may compare the modified third temperature value with the modified second temperature value and feed the greater one back to the hardware monitor11. The hardware monitor11then controls heat dissipation of the computer system based on the greater value and the read first temperature value.

Reference is further made toFIG. 3, a flowchart illustrating a monitoring method for a hardware monitoring system according to a preferred embodiment of the present invention. According to the hardware monitoring method200-1shown inFIG. 3, step211additionally includes step211-3, in which the third temperature sensor20senses the third temperature value of the third temperature area. Differing fromFIG. 2, step212includes: step212-1, in which, apart from the second temperature value, the CPLD12further reads out the third temperature value, and compensates for both of the second temperature value and third temperature value; and step212-2, in which, the CPLD12compares the compensated second temperature value and the compensated third temperature value and takes the greater one. Afterward, in step213, the hardware monitor11reads out the first temperature value and the greater temperature value taken from the comparison. Subsequently, in step214, the hardware monitor11controls heat dissipation of the computer system based on the first temperature value and the greater temperature value taken from the comparison.

Further, the expandable component19may be connected with a plurality of third temperature sensors20for sensing third temperature values of a plurality of operating components in the third temperature area. Wherein, one of the third temperature sensors20is configured to sense the third temperature value for the expandable component19during its operation. Optionally, at least one of the third temperature sensors20may be adapted to sense the third temperature value for an I/O area during operation thereof. For the sake of simplicity, hereinafter, the modified second temperature value is defined as a fourth temperature value, and the modified third temperature value as a fifth temperature value.

In the scenario with a plurality of third temperature sensors20, the CPLD12reads a plurality of third temperature values from the expandable component19and modifies each of the third temperature values to obtain a plurality of fifth temperature values. After that, the fourth temperature value is compared with the plurality of fifth temperature values, and the greatest temperature value is taken therefrom which may be read during subsequent control of heat dissipation.

More specifically, after the second temperature value is read out, the CPLD12stores it in the storage unit122and then seeks a first offset corresponding to the second temperature value from the storage unit122. The second temperature value is then modified based on the first offset, resulting in a fourth temperature value. Additionally, the CPLD12reads out and stores one or more third temperature values in the storage unit122. Next, second offset(s) corresponding to the third temperature value(s) is/are sought and used to modify the third temperature value(s), resulting in fifth temperature value(s). It is to be noted that, in the scenario with a plurality of third temperature values, the CPLD12seeks second offsets each corresponding to one of the third temperature values and then modifies them individually.

For example, a third temperature sensor20is provided in the I/O area, and another third temperature sensor20in an area where the expandable component19is located. In this case, the CPLD12seeks a third offset from the storage unit122and, based thereon, modifies the third temperature value sensed during operation of the expandable component19. In addition, the CPLD12seeks a fourth offset in the storage unit122and modifies the third temperature value corresponding to the I/O area based on the fourth offset. In this case, in other words, one third temperature sensor20senses a temperature of the expandable component19in operation, and another third temperature sensor20senses a temperature of the I/O area during operation thereof. It will be appreciated that the second offsets include the third and fourth offsets.

In one embodiment, the first offset is based on the difference between an actual temperature of the PCH16and the temperature thereof sensed by the second temperature sensor121. Specifically, assuming the actual temperature of the PCH16rises to 60° C., while the second temperature value sensed by the second temperature sensor121is only 54° C., if the hardware monitor11controlled the fan module17based on the second temperature value, i.e., 54° C., the fan would not be activated or remain operating at an inadequate speed, making the PCH16not sufficiently cooled and exposed to a risk of overheat. The aforesaid offset enables compensation for such difference between the temperature value sensed by the temperature sensor and the actual temperature.

The offsets may also be relevant to the temperature tolerance of the operating components. For example, if the actual temperature of the PCH16reaches 60° C., while the second temperature value sensed by the second temperature sensor121is only 54° C., and the fan is therefore not activated, it will be likely for the PCH16to be damaged. However, if the actual temperature of an operating component in the third temperature area that is more temperature-tolerant than the PCH16rises to 60° C., while a third temperature value thereof sensed by a third temperature sensor20is 56° C., and thus the fan is not activated, the probability for the operating component to be damaged will be lower than that for the PCH16. Therefore, modifying the temperature values based on the offsets can not only prevent the adverse consequences from the differences between the temperatures sensed by the temperature sensors and the actual temperatures, but can also reduce the probability for less temperature-tolerant components to be damaged.

In one embodiment, the CPLD12is electrically connected to the expandable component19via a first I2C interface C1 in order to read the third temperature value(s) sensed by the third temperature sensor(s)20. Additionally, the CPLD12is electrically connected to the second temperature sensor121via a second I2C interface C2 in order to read the second temperature value sensed by the second temperature sensor121.

In one embodiment, when one of operational parameters of the computer system (e.g., voltage, current, temperature, fan speed, etc.) exceeds a default value, the hardware monitor11sends an alert signal (digital) to the CPLD12, based on which, the CPLD12ceases its data reading operations. The hardware monitor11may have an alert interface A for transmitting the alert signal to the CPLD12.

While several preferred embodiments of the present invention have been illustrated and described above, the invention is not limited to the scope of these disclosed embodiments, for example, to the described transmission interfaces between the hardware monitor, the CPLD and the PCH. In addition, the CPLD is not limited to being electrically connected to one expandable component, as it may also be electrically connected to a plurality of expandable components each connected to one or more third temperature sensors. Alternatively, the hardware monitor is not limited to being electrically connected to one CPLD and may be electrically connected to a plurality of CPLDs each operating in the same manner as described in the above embodiments. Note that when a hardware monitor is described in a previous embodiment as having a first temperature sensor, it is to be construed that the hardware monitoring systems of the subsequent embodiments also have such a first temperature sensor for sensing a first temperature value of a first temperature area. Similarly, when a CPLD is described in a previous embodiment as having a second temperature sensor, it is to be construed that the hardware monitoring systems of the subsequent embodiments also have such a second temperature sensor for sensing a second temperature value of a second temperature area.

Furthermore, based on the hardware monitoring systems10disclosed in the foregoing embodiments, a server30is provided in embodiments.FIG. 4shows a structural block diagram of a server according to an embodiment of the present invention. The server30employs a hardware monitoring system10according to one of the above embodiments to monitor heat dissipation of its hardware devices. Since the server30employs the hardware monitoring system10, reference may be made to the foregoing embodiments for the same benefits as provided by the hardware monitoring system10.

In summary, the hardware monitoring system of the present invention combines a hardware monitor with a CPLD, utilizes a plurality of temperature sensors to sense temperature values of different areas and reads out the temperature values for modification by the CPLD. In such a manner, the issue of unbalanced weights for fan control arising from temperature differences between the areas can be addressed.

In addition, the CPLD is capable of independently compensating for the temperature sensed by each of the temperature sensors, reducing the temperature differences between the areas. Therefore, increased balance between weights for temperature control during the heat dissipation control process is achieved, which allows better heat dissipation of the computer system.

Further, in the hardware monitoring system of the present invention, the CPLD is electrically connected to a expandable component which is connected to one or more third temperature sensors, enabling temperature monitoring for more areas. Moreover, the CPLD is capable of independently compensating for the temperature value sensed by each third temperature sensor. This, on one hand, enlarges the temperature monitoring coverage and, on the other hand, allows compensation for multiple temperature values, thereby further enhancing heat dissipation of the computer system.

The foregoing description presents merely preferred embodiments of the present invention and does not limit the scope of the invention in any sense. All changes or modifications made based on the above disclosure by those of ordinary skill in the art fall within the scope of the invention.