Liquid ejecting apparatus and circuit substrate

A liquid ejecting apparatus includes a drive element, and a drive circuit that outputs a drive signal that drives the drive element, wherein the drive circuit includes a modulation circuit that modulates a base drive signal to output a modulation signal, an amplifier circuit that amplifies the modulation signal to output an amplified modulation signal, a demodulation circuit that demodulates the amplified modulation signal to output the drive signal, and a substrate on which the modulation circuit, the amplifier circuit, and the demodulation circuit are provided, wherein the substrate includes a base material includes a metal and a first layer laminated on the base material, wherein the first layer includes a first propagation wire through which at least one of the amplified modulation signal and the drive signal propagates, and wherein the base material has a thickness greater than a thickness of the first layer.

The present application is based on, and claims priority from JP Application Serial Number 2019-235896, filed Dec. 26, 2019, the disclosure of which is hereby incorporated by reference herein in its entirety.

BACKGROUND

1. Technical Field

The present disclosure relates to a liquid ejecting apparatus and a circuit substrate.

2. Related Art

An ink jet printer that prints an image or a document on a medium by ejecting ink as a liquid is known in which a piezoelectric element such as a piezo element is used. The piezoelectric element is provided corresponding to each of the plurality of nozzles in the head unit. A predetermined amount of ink is ejected from the corresponding nozzle at a predetermined timing by driving each of the piezoelectric elements in accordance with the drive signal. As a result, dots are formed on the medium. Such a piezoelectric element is electrically a capacitive load, such as a capacitor, and therefore, it is necessary to supply a sufficient current to operate the piezoelectric element corresponding to each nozzle.

In order to supply a sufficient current for operating the piezoelectric element, as a drive circuit, an amplifier circuit that amplifies the supplied original signal to output the amplified signal as a drive signal is used. Such an amplifier circuit may be a class A amplifier circuit, a class B amplifier circuit, a class AB amplifier circuit, or the like, but from the viewpoint of power consumption reduction in recent years, in some cases, a class D amplifier circuit that is superior in energy conversion efficiency to the class A amplifier circuit, the class B amplifier circuit, and the class AB amplifier circuit is used.

For example, JP-A-2018-158488 discloses a liquid ejecting apparatus including a class D amplifier circuit as a drive circuit that generates a drive signal for driving a piezoelectric element.

In recent years, the liquid ejecting apparatus has an increasing number of nozzles included in a print head from the viewpoint of improving print quality and printing speed. Therefore, the amount of current based on the drive signal output by the drive circuit included in the liquid ejecting apparatus increases, and as a result, heat generation of the drive circuit increases. The heat generated in such a drive circuit may cause characteristic deterioration of components consisting of the drive circuit or malfunction of the drive circuit due to the characteristic deterioration. That is, there is room for improvement in terms of efficiently releasing the heat generated in the drive circuit.

SUMMARY

According to an aspect of the present disclosure, a liquid ejecting apparatus includes a liquid ejection head including a drive element, where the liquid ejection head ejects a liquid by a supply of a drive signal to the drive element, and a drive circuit that outputs the drive signal, wherein the drive circuit includes a modulation circuit that modulates a base drive signal to output a modulation signal, an amplifier circuit that amplifies the modulation signal to output an amplified modulation signal, a demodulation circuit that demodulates the amplified modulation signal to output the drive signal, and a substrate on which the modulation circuit, the amplifier circuit, and the demodulation circuit are provided, wherein the substrate includes a base material and a first layer laminated on a first face of the base material, wherein the base material includes a metal, wherein the first layer includes a first propagation wire through which at least one of the amplified modulation signal and the drive signal propagates, and wherein the base material has a thickness greater than a thickness of the first layer.

According to another aspect of the present disclosure, a circuit substrate includes a modulation circuit that modulates a base drive signal to output a modulation signal, an amplifier circuit that amplifies the modulation signal to output an amplified modulation signal, a demodulation circuit that demodulates the amplified modulation signal to output the drive signal, and a substrate on which the modulation circuit, the amplifier circuit, and the demodulation circuit are provided, wherein the substrate includes a base material and a first layer laminated on a first face of the base material, wherein the base material includes a metal, wherein the first layer includes a first propagation wire through which at least one of the amplified modulation signal and the drive signal propagates, and wherein the base material has a thickness greater than a thickness of the first layer.

DESCRIPTION OF EXEMPLARY EMBODIMENTS

Hereinafter, preferred embodiments of the present disclosure will be described with reference to the drawings. The drawings used are for convenience of explanation. The embodiments described below do not unduly limit the details of the present disclosure described in the claims. In addition, all of the configurations described below are not necessarily essential components of the disclosure.

1. First Embodiment

1.1 Configuration of Liquid Ejecting Apparatus

FIG.1is a diagram showing a schematic configuration of the inside of a liquid ejecting apparatus1of the present embodiment. The liquid ejecting apparatus1is an ink jet printer in which the ink as an example of a liquid is ejected in accordance with image data supplied from a host computer provided outside to form dots on a medium P such as paper, thereby printing an image according to the supplied image data. InFIG.1, some of the components of the liquid ejecting apparatus1such as a housing and a cover are not shown.

As shown inFIG.1, the liquid ejecting apparatus1includes a movement mechanism3that moves a head unit2in the main scanning direction. The movement mechanism3includes a carriage motor31serving as the driving source of the head unit2, a carriage guide shaft32having both ends fixed, a timing belt33extending substantially parallel to the carriage guide shaft32and driven by the carriage motor31. The movement mechanism3includes a linear encoder90that detects the position of the head unit2in the main scanning direction.

A carriage24of the head unit2is configured so that a predetermined number of ink cartridges22can be mounted thereon. The carriage24is reciprocably supported by the carriage guide shaft32and is fixed to a portion of the timing belt33. Therefore, the carriage24of the head unit2is guided by the carriage guide shaft32and reciprocates when the carriage motor31causes the timing belt33to travel forward and backward. That is, the carriage motor31moves the carriage24in the main scanning direction. A print head20is attached to a portion, of the carriage24, facing the medium P. As will be described later, the print head20includes a large number of nozzles, and ejects a predetermined amount of ink from each nozzle at a predetermined timing. Various control signals are supplied to the head unit2operating as described above via a cable190such as a flexible flat cable.

The liquid ejecting apparatus1includes a transport mechanism4that transports the medium P in the sub scanning direction. The transport mechanism4includes a platen43that supports the medium P, a transport motor41that is a driving source, and a transport roller42that is rotated by the transport motor41and transports a medium P in the sub scanning direction. In a state where the medium P is supported by the platen43, the ink is ejected from the print head20onto the medium P according to the timing at which the medium P is transported by the transport mechanism4, so that a desired image is formed on the surface of the medium P.

A home position serving as a base point of the head unit2is set in an end region within the movement range of the carriage24included in the head unit2. A capping member70that seals the nozzle formation face of the print head20and a wiper member71that wipes the nozzle formation face are disposed at the home position. The liquid ejecting apparatus1forms an image on the surface of the medium P bidirectionally when the carriage24moves forward toward the end opposite the home position, and when the carriage24moves backward from the opposite end toward the home position.

A flushing box72that collects the ink ejected from the print head20during a flushing operation is provided at the end of the platen43in the main scanning direction, and at the end opposite the home position from which the carriage24moves. The flushing operation is an operation of forcibly ejecting the ink from each nozzle regardless of the image data in order to prevent the possibility that the proper amount of ink will not be ejected due to the nozzle clogging because of thickening of the ink near the nozzle, the air bubbles mixed in the nozzle, and the like. Note that the flushing boxes72may be provided on both sides of the platen43in the main scanning direction.

1.2 Electrical Configuration of Liquid Ejecting Apparatus

FIG.2is a diagram illustrating an electrical configuration of the liquid ejecting apparatus1. As shown inFIG.2, the liquid ejecting apparatus1includes a control unit10and the head unit2. The control unit10and the head unit2are electrically coupled to each other via the cable190.

The control unit10includes a control circuit100, a carriage motor driver35, a transport motor driver45, and a voltage output circuit110. The control circuit100generates various control signal corresponding to the image data supplied from the host computer to output the generated control signal to a corresponding configuration.

Specifically, the control circuit100grasps the current scanning position of the head unit2based on the detection signal of the linear encoder90. The control circuit100generates control signals CTR1and CTR2corresponding to the current scanning position of the head unit2. The control signal CTR1is supplied to the carriage motor driver35. The carriage motor driver35drives the carriage motor31according to the input control signal CTR1. Further, the control signal CTR2is supplied to the transport motor driver45. The transport motor driver45drives the transport motor41according to the input control signal CTR2. As a result, the movement of the carriage24in the main scanning direction and the transport of the medium P in the sub scanning direction are controlled.

In addition, the control circuit100generates, based on image data supplied from an externally provided host computer and a detection signal of the linear encoder90, a clock signal SCK, a print data signal SI, a latch signal LAT, a change signal CH, and base drive signals dA and dB corresponding to the current scanning position of the head unit2to output the generated signals to head unit2.

Further, the control circuit100causes a maintenance unit80to perform a maintenance process of restoring the ink ejection state of an ejection unit600to a normal state. The maintenance unit80includes a cleaning mechanism81and a wiping mechanism82. The cleaning mechanism81performs, as a maintenance process, a pumping process for sucking thickened ink, air bubbles, and the like stored in the ejection unit600with a tube pump (not shown). Further, the wiping mechanism82performs, as a maintenance process, a wiping process of wiping foreign matter such as paper dust attached to the vicinity of the nozzle of the ejection unit600with the wiper member71. The control circuit100may perform the above-described flushing operation as a maintenance process of restoring the ink ejection state of the ejection unit600to a normal state.

The voltage output circuit110generates a voltage VHV of a DC voltage of, for example, 42 V to output it to the head unit2. The voltage VHV is used as a power supply voltage for various configurations of the head unit2. Further, the voltage VHV generated by the voltage output circuit110may be used as a power supply voltage for various configurations of the control unit10. Furthermore, the voltage output circuit110may generate a plurality of DC voltage signals having different voltage values from the voltage VHV and supply the generated DC voltage signals to the components included in the control unit10and the head unit2.

The head unit2includes a drive circuit50and the print head20.

The drive circuit50includes drive signal output circuits51aand51b. A digital base drive signal dA and the voltage VHV are input to the drive signal output circuit51a. The drive signal output circuit51agenerates a drive signal COMA by digital-to-analog converting the input base drive signal dA to class-D amplify the converted analog signal to a voltage value corresponding to the voltage VHV. Then, the drive signal output circuit51aoutputs the generated drive signal COMA to the print head20. Similarly, a digital base drive signal dB and the voltage VHV are input to the drive signal output circuit51b. The drive signal output circuit51bgenerates a drive signal COMB by digital-to-analog converting the input base drive signal dB to class-D amplify the converted analog signal to a voltage value corresponding to the voltage VHV. Then, the drive signal output circuit51boutputs the generated drive signal COMB to the print head20.

That is, the base drive signal dA defines the waveform of the drive signal COMA, and the base drive signal dB defines the waveform of the drive signal COMB. Therefore, the base drive signals dA and dB may be signals that can define the waveforms of the drive signals COMA and COMB, and may be analog signals, for example. The details of the drive signal output circuits51aand51bwill be described later. Further, in the description ofFIG.2, the drive circuit50is described as being included in the head unit2, but the drive circuit50may be included in the control unit10. In this case, the drive signals COMA and COMB output from the drive signal output circuits51aand51bare supplied to the print head20via the cable190.

The drive circuit50generates a constant reference voltage signal VBS having a voltage value of 5.5 V, 6 V, or the like to supply it to the print head20. The reference voltage signal VBS is a signal of a potential serving as a reference for driving a piezoelectric element60, and may be, for example, a signal of a ground potential.

The print head20includes a selection control circuit210, a plurality of selection circuits230, and a plurality of ejection units600corresponding to the plurality of respective selection circuits230. The selection control circuit210generates, based on the clock signal SCK, the print data signal SI, the latch signal LAT, and the change signal CH supplied from the control circuit100, a selection signal for selecting or deselecting the waveforms of the drive signals COMA and COMB to output the generated selection signal to each of the plurality of selection circuits230.

The drive signals COMA and COMB and the selection signal output from the selection control circuit210are input to each selection circuit230. By selecting or deselecting the waveforms of the drive signals COMA and COMB based on the input selection signal, the selection circuit230generates a drive signal VOUT based on the drive signals COMA and COMB to output the generated drive signal VOUT to the corresponding ejection unit600.

Each ejection unit600includes a piezoelectric element60. The drive signal VOUT output from the corresponding selection circuit230is supplied to one end of the piezoelectric element60. Further, the constant reference voltage signal VBS having a voltage value of, for example 5.5 V is supplied to the other end of the piezoelectric element60. The piezoelectric element60included in the ejection unit600is driven according to a potential difference between the drive signal VOUT supplied to the one end and the reference voltage signal VBS supplied to the other end. As a result, the amount of ink corresponding to the driving of the piezoelectric element60is ejected from the ejection unit600.

Here, the piezoelectric element60is an example of a drive element, and the drive signal VOUT that is supplied to the piezoelectric element60is an example of a drive signal. In addition, as described above, the drive signal VOUT is generated by selecting or deselecting the waveforms of the drive signals COMA and COMB. Therefore, at least one of the drive signals COMA and COMB is also an example of the drive signal. The drive circuit50including the drive signal output circuits51aand51bthat output the drive signals COMA and COMB is an example of a drive circuit, and the print head20that ejects the ink by a supply of the drive signal VOUT to the piezoelectric element60is an example of a liquid ejection head.

1.3 Configuration of Ejection Unit

Next, the configuration of the ejection unit600included in the print head20will be described.FIG.3is a diagram illustrating a schematic configuration of one ejection unit600of the plurality of ejection units600included in the print head20. As shown inFIG.3, the ejection unit600includes the piezoelectric element60, a vibration plate621, a cavity631, and a nozzle651.

The cavity631is filled with ink supplied from a reservoir641. Further, the ink is introduced into the reservoir641from the ink cartridge22via an ink tube (not shown) and a supply port661. That is, the cavity631is filled with the ink stored in the corresponding ink cartridge22.

The vibration plate621is displaced by driving the piezoelectric element60provided on the upper face inFIG.3. With the displacement of the vibration plate621, the internal volume of the cavity631filled with the ink expands or contracts. That is, the vibration plate621functions as a diaphragm that changes the internal volume of the cavity631.

The nozzle651is an opening provided in a nozzle plate632and communicating with the cavity631. When the internal volume of the cavity631changes, the amount of ink corresponding to the change in the internal volume is ejected from the nozzle651.

The piezoelectric element60has a structure in which a piezoelectric body601is sandwiched between a pair of electrodes611and612. In the piezoelectric body601having such a structure, the central portions of the electrodes611and612bend together with the vibration plate621in the vertical direction according to the potential difference of the voltage supplied by the electrodes611and612. Specifically, the drive signal VOUT is supplied to the electrode611of the piezoelectric element60. Further, the reference voltage signal VBS is supplied to the electrode612of the piezoelectric element60. The piezoelectric element60bends upward when the voltage level of the drive signal VOUT increases, and bends downward when the voltage level of the drive signal VOUT decreases.

In the ejection unit600configured as described above, when the piezoelectric element60bends upward, the vibration plate621is displaced to increase the internal volume of the cavity631. As a result, the ink is drawn from the reservoir641. On the other hand, when the piezoelectric element60bends downward, the vibration plate621is displaced to reduce the internal volume of the cavity631. As a result, the amount of ink corresponding to the degree of reduction is ejected from the nozzle651. That is, the print head20includes the electrode611and the electrode612, includes the piezoelectric element60driven by the potential difference between the electrode611and the electrode612, and ejects the ink by driving the piezoelectric element60.

Here, the piezoelectric element60is not limited to the structure shown inFIG.3, but may have any structure as long as it can eject the ink from the ejection unit600. Therefore, the piezoelectric element60is not limited to the above-described configuration of the bending vibration, but may be, for example, a configuration using the longitudinal vibration.

1.4 Configuration and Operation of Print Head

Next, the configuration and operation of the print head20will be described. As described above, the print head20generates the drive signal VOUT by selecting or deselecting the drive signals COMA and COMB output from the drive circuit50based on the clock signal SCK, the print data signal SI, the latch signal LAT, and the change signal CH to supply the generated drive signal VOUT to the corresponding ejection unit600. Therefore, in describing the configuration and operation of the print head20, first, an example of the waveforms of the drive signals COMA and COMB and an example of the waveform of the drive signal VOUT will be described.

FIG.4is a diagram illustrating an example of the waveforms of the drive signals COMA and COMB. As shown inFIG.4, the drive signal COMA includes a waveform in which a trapezoidal waveform Adp1disposed in a period T1from the rise of the latch signal LAT to the rise of the change signal CH, and a trapezoidal waveform Adp2disposed in a period T2from the rise of the change signal CH to the rise of the latch signal LAT are made to be continuous. The trapezoidal waveform Adp1is a waveform for ejecting a small amount of ink from the nozzle651, and the trapezoidal waveform Adp2is a waveform for ejecting a medium amount of ink that is larger than the small amount of ink from the nozzle651.

Further, the drive signal COMB includes a waveform in which a trapezoidal waveform Bdp1disposed in the period T1and a trapezoidal waveform Bdp2disposed in the period T2are made to be continuous. The trapezoidal waveform Bdp1is a waveform that does not eject the ink from the nozzle651, and that slightly vibrates the ink in the vicinity of the opening of the nozzle651to prevent an increase in ink viscosity. Further, as in the trapezoidal waveform Adp1, the trapezoidal waveform Bdp2is a waveform for ejecting a small amount of ink from the nozzles651.

The voltages at the start timing and the end timing of each of the trapezoidal waveforms Adp1, Adp2, Bdp1, and Bdp2are commonly a voltage Vc. That is, each of the trapezoidal waveforms Adp1, Adp2, Bdp1, Bdp2has a waveform that starts at the voltage Vc and ends at the voltage Vc. A cycle Ta including the period T1and the period T2corresponds to a printing cycle in which a new dot is formed on the medium P.

Here, inFIG.4, the trapezoidal waveform Adp1and the trapezoidal waveform Bdp2are identical, but the trapezoidal waveform Adp1and the trapezoidal waveform Bdp2may be different. Further, the description is made assuming that a small amount of ink is ejected from the corresponding nozzle651when the trapezoidal waveform Adp1is supplied to the ejection unit600, and when the trapezoidal waveform Bdp1is supplied to the ejection unit600, but different amounts of the ink may be ejected. That is, the waveforms of the drive signals COMA and COMB are not limited to the waveforms shown inFIG.4, but various waveforms may be combined depending on the moving speed of the carriage24to which the print head20is attached, the nature of the ink stored in the ink cartridge22, the material of the medium P, and the like.

FIG.5is a diagram illustrating an example of the waveform of the drive signal VOUT.FIG.5shows the waveforms of the drive signal VOUT with the dots formed on the medium P having the sizes of the “large dot”, the “medium dot”, and the “small dot”, and having “no dots recorded” in comparison.

As shown inFIG.5, the drive signal VOUT when the “large dot” is formed on the medium P represents a waveform in the cycle Ta in which the trapezoidal waveform Adp1disposed in the period T1, and the trapezoidal waveform Adp2disposed in the period T2are made to be continuous. When the drive signal VOUT is supplied to the ejection unit600, a small amount of ink and a medium amount of ink are ejected from the corresponding nozzle651in the cycle Ta. Therefore, the large dot is formed on the medium P by landing and uniting the respective amounts of the ink.

The drive signal VOUT when the “medium dot” is formed on the medium P represents a waveform in the cycle Ta in which the trapezoidal waveform Adp1disposed in the period T1, and the trapezoidal waveform Bdp2disposed in the period T2are made to be continuous. When the drive signal VOUT is supplied to the ejection unit600, a small amount of ink is ejected twice from the corresponding nozzle651in the cycle Ta. Therefore, the medium dot is formed on the medium P by landing and uniting the respective amounts of the ink.

The drive signal VOUT when the “small dot” is formed on the medium P represents a waveform in the cycle Ta in which the trapezoidal waveform Adp1disposed in the period T1, and a constant waveform, with the voltage Vc, disposed in the period T2are made to be continuous. When the drive signal VOUT is supplied to the ejection unit600, a small amount of ink is ejected from the corresponding nozzle651in the cycle Ta. Therefore, this amount of ink lands on the medium P to form the small dot.

The drive signal VOUT corresponding to the “no dots recorded” in which no dots are formed on the medium P represents a waveform in the cycle Ta in which the trapezoidal waveform Bdp1disposed in period T1, and a constant waveform, with the voltage Vc, disposed in the period T2are made to be continuous. When the drive signal VOUT is supplied to the ejection unit600, the ink near the opening of the corresponding nozzle651only slightly vibrates, and no ink is ejected in the cycle Ta. Therefore, the ink does not land on the medium P and no dots are formed.

Here, the waveform that is constant at the voltage Vc is a waveform with a voltage of the immediately preceding voltage Vc being held in the piezoelectric element60, which is a capacitive load, when none of the trapezoidal waveforms Adp1, Adp2, Bdp1, and Bdp2is selected as the drive signal VOUT. Therefore, when none of the trapezoidal waveforms Adp1, Adp2, Bdp1, and Bdp2is selected as the drive signal VOUT, it can be said that the voltage Vc is supplied to the ejection unit600as the drive signal VOUT.

The drive signal VOUT as described above is generated when the waveforms of the drive signals COMA and COMB are selected or deselected by the operation of the selection control circuit210and the selection circuit230.

FIG.6is a diagram illustrating configurations of the selection control circuit210and the selection circuits230. As shown inFIG.6, the print data signal SI, the latch signal LAT, the change signal CH, and the clock signal SCK are input to the selection control circuit210. The selection control circuit210includes a set of a shift register (SIR)212, a latch circuit214, and a decoder216corresponding to each of the m ejection units600. That is, the selection control circuit210includes the same number of sets of the shift registers212, the latch circuits214, and the decoders216as the m ejection units600.

The print data signal SI is a signal synchronized with the clock signal SCK, and is a total 2·m-bit signal including 2-bit print data [SIH, SIL] for selecting any one of the “large dot”, the “medium dot”, the “small dot”, and the “no dots recorded” for each of the m ejection units600. The input print data signal SI is held in the shift register212for 2-bit print data [SIH, SIL] included in the print data signal SI corresponding to each of the m ejection units600. Specifically, the selection control circuit210is configured such that the m-stage shift registers212corresponding to the m ejection units600are cascade-coupled to each other, and the print data signal SI input serially is sequentially transferred to the subsequent stage according to the clock signal SCK. InFIG.6, in order to distinguish the shift registers212, they are denoted as the first stage, the second stage . . . the m-th stage in order from the upstream shift register to which the print data signal SI is input.

The m latch circuits214latches the 2-bit print data [SIH, SIL] held by the respective m shift registers212at the rising edge of the latch signal LAT.

FIG.7is a diagram illustrating the decoding contents in the decoder216. The decoder216outputs selection signals S1and S2according to the 2-bit print data [SIH, SIL] latched by the latch circuit214. For example, when the 2-bit print data [SIH, SIL] is [1,0], the decoder216outputs the logic level of the selection signal S1as H and L levels in the periods T1and T2, and the logic level of the selection signal S2as L and H levels in the periods T1and T2to the selection circuit230.

The selection circuit230is provided corresponding to each of the ejection units600. That is, the number of the selection circuits230included in the print head20is m, which is the same as the total number of the ejection units600.FIG.8is a diagram illustrating a configuration of the selection circuit230corresponding to one ejection unit600. As shown inFIG.8, the selection circuit230includes inverters232aand232b, which are NOT circuits, and transfer gates234aand234b.

The selection signal S1is input to the non-circled positive control end in the transfer gate234a, while being input to the circled negative control end in the transfer gate234aafter logically inverted by the inverter232a. The drive signal COMA is supplied to the input end of the transfer gate234a. The selection signal S2is input to the non-circled positive control end in the transfer gate234b, while being input to the circled negative control end in the transfer gate234bafter logically inverted by the inverter232b. The drive signal COMB is supplied to the input end of the transfer gate234b. The output ends of the transfer gates234aand234bare coupled in common and the drive signal COMA and the drive signal COMB are output as the drive signal VOUT.

Specifically, when the selection signal S1is at H level, the transfer gate234abrings the input end and the output end into a conductive state therebetween, and when the selection signal S1is at L level, the transfer gate234abrings the input end and the output end into a non-conductive state therebetween. When the selection signal S2is at H level, the transfer gate234bbrings the input end and the output end into a conductive state therebetween, and when the selection signal S2is at L level, the transfer gate234bbrings the input end and the output end into a non-conductive state therebetween. As described above, the selection circuit230generates and output the drive signal VOUT by selecting the waveforms of the drive signals COMA and COMB based on the selection signals S1and S2.

Here, operations of the selection control circuit210and the selection circuit230will be described with reference toFIG.9.FIG.9is a diagram for explaining the operations of the selection control circuit210and the selection circuit230. The print data signal SI is serially input in synchronization with the clock signal SCK, and is sequentially transferred to the shift registers212corresponding to the respective ejection units600. When the input of the clock signal SCK stops, each shift register212holds 2-bit print data [SIH, SIL] corresponding to each of the ejection units600. The print data signal SI is input to the shift registers212of the m-th stage . . . the second stage, the first-stage in the order of the corresponding ejection units600.

When the latch signal LAT rises, each of the latch circuits214simultaneously latches the 2-bit print data [SIH, SIL] held in the respective shift registers212. InFIG.9, LT1, LT2. . . LTm indicate 2-bit print data [SIH, SIL] latched by the latch circuits214corresponding to the shift registers212of the first stage, the second stage . . . the m-th stage, respectively.

The decoder216outputs the logic levels of the selection signals S1and S2in accordance with the contents as shown inFIG.7in each of the periods T1and T2according to a dot size defined by the latched 2-bit print data [SIH, SIL].

Specifically, when the print data [SIH, SIL] is [1,1], the decoder216sets the selection signal S1to H and H levels in the periods T1and T2, and sets the selection signal S2to L and L levels in the periods T1and T2. In this case, the selection circuit230selects the trapezoidal waveform Adp1in the period T1, and selects the trapezoidal waveform Adp2in the period T2. As a result, the drive signal VOUT corresponding to the “large dot” shown inFIG.5is generated.

Also, when the print data [SIH, SIL] is [1,0], the decoder216sets the selection signal S1to H and L levels in the periods T1and T2, and sets the selection signal S2to L and H levels in the periods T1and T2. In this case, the selection circuit230selects the trapezoidal waveform Adp1in the period T1, and selects the trapezoidal waveform Bdp2in the period T2. As a result, the drive signal VOUT corresponding to the “medium dot” shown inFIG.5is generated.

Further, when the print data [SIH, SIL] is [0,1], the decoder216sets the selection signal S1to H and L levels in the periods T1and T2, and sets the selection signal S2to L and L levels in the periods T1and T2. In this case, the selection circuit230selects the trapezoidal waveform Adp1in the period T1, and selects none of the trapezoidal waveforms Adp2and Bdp2in the period T2. As a result, the drive signal VOUT corresponding to the “small dot” shown inFIG.5is generated.

Further, when the print data [SIH, SIL] is [0,0], the decoder216sets the selection signal S1to L and L levels in the periods T1and T2, and sets the selection signal S2to H and L levels in the periods T1and T2. In this case, the selection circuit230selects the trapezoidal waveform Bdp1in the period T1, and selects none of the trapezoidal waveforms Adp2and Bdp2in the period T2. As a result, the drive signal VOUT corresponding to “no dots recorded” shown inFIG.5is generated.

As mentioned above, the selection control circuit210and the selection circuit230select the waveforms of the drive signals COMA and COMB based on the print data signal SI, the latch signal LAT, the change signal CH, and the clock signal SCK to output the selected waveforms as the drive signal VOUT to the ejection unit600.

1.5 Configuration of Drive Signal Output Circuit

Next, the configuration and operation of the drive signal output circuits51aand51bthat output the drive signals COMA and COMB will be described. Here, the drive signal output circuit51aand the drive signal output circuit51bhave the same configuration except that only the input signal and the output signal are different. Therefore, in the following description, only the configuration and operation of the drive signal output circuit51awill be described, and the description of the configuration and operation of the drive signal output circuit51bwill be omitted. InFIG.10, in addition to the base drive signal dA input to the drive signal output circuit51a, a terminal dA−In through which the base drive signal dA is input, the drive signal COMA output from the drive signal output circuit51a, and a terminal COMA-Out through which the drive signal COMA is output, the base drive signal dB input to the drive signal output circuit51b, a terminal dB−In through which the base drive signal dB is input, the drive signal COMB output from the drive signal output circuit51b, and a terminal COMB-Out through which the drive signal COMB is output are shown.

FIG.10is a diagram illustrating a circuit configuration of the drive signal output circuit51a. The drive circuit50includes a modulation circuit510that modulates the base drive signal dA in the drive signal output circuit51ato output a modulation signal Ms, an amplifier circuit550that amplifies the modulation signal Ms to output an amplified modulation signal AMs, and a smoothing circuit560that demodulates the amplified modulation signal AMs to output the drive signal COMA. Specifically, as shown inFIG.10, the drive signal output circuit51aincludes an integrated circuit500including a modulation circuit510, an output circuit580including an amplifier circuit550and the smoothing circuit560, a first feedback circuit570, and a second feedback circuit572.

The integrated circuit500has a plurality of terminals including a terminal In, a terminal Bst, a terminal Hdr, a terminal Sw, a terminal Gvd, a terminal Ldr, a terminal Gnd, and a terminal Vbs. The integrated circuit500is electrically coupled to the outside of the integrated circuit500via the plurality of terminals.

As shown inFIG.10, the integrated circuit500includes a digital to analog converter (DAC)511, a modulation circuit510, a gate drive circuit520, a reference voltage generation circuit530, and a power supply circuit590.

The power supply circuit590generates a first voltage signal DAC_HV and a second voltage signal DAC_LV to supply them to the DAC511.

The DAC511converts the digital base drive signal dA that defines the waveform of the drive signal COMA input via the terminal dA−In into a base drive signal aA that is an analog signal having a voltage value between the first voltage signal DAC_HV and the second voltage signal DAC_LV to output the converted base drive signal aA to the modulation circuit510. Here, the maximum value of the voltage amplitude of the base drive signal aA is defined by the first voltage signal DAC_HV, and the minimum value is defined by the second voltage signal DAC_LV. That is, the first voltage signal DAC_HV is a reference voltage of the DAC511on the high voltage side, and the second voltage signal DAC_LV is a reference voltage of the DAC511on the low voltage side. A signal obtained by amplifying the analog base drive signal aA is the drive signal COMA. That is, the base drive signal aA corresponds to a target signal before the amplification of the drive signal COMA. The voltage amplitude of the base drive signal aA in the present embodiment is, for example, 1 V to 2 V.

The modulation circuit510generates the modulation signal Ms obtained by modulating the base drive signal aA to output the generated modulation signal Ms to the amplifier circuit550included in the output circuit580via the gate drive circuit520. Modulation circuit510includes adders512and513, a comparator514, an inverter515, an integral attenuator516, and an attenuator517.

The integral attenuator516attenuates and integrates the voltage of the terminal COMA-Out input via a terminal Vfb, that is, the drive signal COMA, and supplies the attenuated and integrated signal to a negative input end of the adder512. The base drive signal aA is input to a positive input end of the adder512. The adder512supplies a voltage obtained by subtracting and integrating the voltage input to the negative input end from the voltage input to the positive input end to the positive input end of the adder513.

Here, the maximum value of the voltage amplitude of the base drive signal aA is about 2 V as described above, whereas the maximum value of the voltage of the drive signal COMA may exceed 40 V in some cases. For this reason, the integral attenuator516attenuates the voltage of the drive signal COMA input via the terminal Vfb in order to match the amplitude ranges of both voltages when obtaining the deviation.

The attenuator517supplies a voltage obtained by attenuating the high-frequency component of the drive signal COMA input via a terminal Ifb to the negative input end of the adder513. Further, the voltage output from the adder512is input to the positive input end of the adder513. The adder513outputs to the comparator514a voltage signal As obtained by subtracting the voltage input to the negative input end from the voltage input to the positive input end.

The voltage signal As output from the adder513is a voltage obtained by subtracting the voltage of the signal supplied to the terminal Vfb and further subtracting the voltage of the signal supplied to the terminal Ifb from the voltage of the base drive signal aA. For this reason, the voltage of the voltage signal As output from the adder513is a signal obtained by correcting the deviation obtained by subtracting the attenuation voltage of the drive signal COMA from the voltage of the base drive signal aA as the target signal by the high-frequency component of the drive signal COMA.

The comparator514outputs the pulse-modulated modulation signal Ms based on the voltage signal As output from the adder513. Specifically, the comparator514outputs the modulation signal Ms which is at H level when the voltage signal As output from the adder513is equal to or higher than a threshold Vth1described later in a case where the voltage is rising, and is at L level when the voltage signal As falls below a threshold Vth2described later in a case where the voltage is dropping. Here, the thresholds Vth1and Vth2are set in a relationship in which the threshold Vth1is greater than the threshold Vth2. The frequency and the duty ratio of the modulation signal Ms change in accordance with the base drive signals dA and aA. Therefore, the attenuator517adjusts the modulation gain corresponding to the sensitivity, so that the change amount of the frequency or the duty ratio of the modulation signal Ms can be adjusted.

The modulation signal Ms output from the comparator514is supplied to a gate driver521included in the gate drive circuit520. The modulation signal Ms is also supplied to a gate driver522included in the gate drive circuit520after the logic level is inverted by the inverter515. That is, the logic levels of the signals supplied to the gate driver521and the gate driver522are mutually exclusive.

Here, the timing may be controlled so that the logic levels of the signals supplied to the gate driver521and the gate driver522are not H level at the same time. In other words, “exclusive” here means that the logic levels of the signals supplied to the gate driver521and the gate driver522are not H level at the same time. For details, this means that a transistor M1and a transistor M2included in the amplifier circuit550described later are not turned on at the same time.

The gate drive circuit520includes the gate driver521and the gate driver522.

The gate driver521shifts the level of the modulation signal Ms output from the comparator514to output the level-shifted modulation signal Ms as an amplification control signal Hgd from the terminal Hdr. The higher side of the power supply voltage of the gate driver521is a voltage applied via the terminal Bst, and the lower side is a voltage applied via the terminal Sw. The terminal Bst is coupled to one end of a capacitor C5and the cathode of a diode D1for backflow prevention. The terminal Sw is coupled to the other end of the capacitor C5. The anode of the diode D1is coupled to the terminal Gvd. As a result, a voltage Vm which is a DC voltage of, for example, 7.5 V supplied from a power supply circuit (not shown) is supplied to the anode of the diode D1. Therefore, the potential difference between the terminal Bst and the terminal Sw is approximately equal to the potential difference between both ends of the capacitor C5, that is, the voltage Vm. The gate driver521outputs, from the terminal Hdr, the amplification control signal Hgd having a voltage higher than, by the voltage Vm, that of the terminal Sw according to the input modulation signal Ms.

The gate driver522operates at a lower potential than the gate driver521. The gate driver522shifts the level of the signal obtained by inverting, by the inverter515, the logic level of the modulation signal Ms output from the comparator514to output the level-shifted signal as an amplification control signal Lgd from the terminal Ldr. The voltage Vm is applied to the higher side of the power supply voltage of the gate driver522, and the ground potential of, for example, 0 V is supplied to the lower side via the terminal Gnd. The gate driver522outputs, from the terminal Ldr, the amplification control signal Lgd having a voltage higher than, by the voltage Vm, that of the terminal Gnd according to the signal input to the gate driver522.

Here, the modulation signal is, in a narrow sense, the modulation signal Ms, but assuming that the signal is pulse-modulated according to the analog base drive signal aA based on the digital base drive signal dA, a signal in which the logic level of the modulation signal Ms is inverted is also included in the modulation signal. That is, the modulation signal output from the modulation circuit510includes not only the modulation signal Ms input to the gate driver521, but also a signal in which the logic level of the modulation signal Ms input to the gate driver522is inverted, and a signal whose timing is controlled with respect to the modulation signal Ms. The amplification control signal Hgd output by the gate driver521is a signal according to the modulation signal Ms, and the amplification control signal Lgd output by the gate driver522is a signal according to a signal obtained by inverting the logic level of the modulation signal Ms. Therefore, the modulation signal also includes the amplification control signal Hgd output by the gate driver521and the amplification control signal Lgd output by the gate driver522.

The reference voltage generation circuit530generates the reference voltage signal VBS supplied to the electrode612of the piezoelectric element60to output the generated reference voltage signal VBS to the electrode612of the piezoelectric element60via the terminal Vbs of the integrated circuit500and a terminal VBS-Out of the drive signal output circuit51a. The reference voltage generation circuit530is configured by a constant voltage circuit including a band gap reference circuit, for example.

Here, inFIG.10, the reference voltage generation circuit530is described as being included in the integrated circuit500included in the drive signal output circuit51a, but the reference voltage generation circuit530may be configured outside the integrated circuit500, or may be configured outside the drive signal output circuit51a.

The output circuit580includes the amplifier circuit550and the smoothing circuit560. The amplifier circuit550includes the transistor M1and the transistor M2. The drain of the transistor M1is electrically coupled to a terminal Hd. The voltage VHV is supplied to the drain of the transistor M1via a terminal VHV−In. The gate of the transistor M1is electrically coupled to one end of a resistor R1, and the other end of the resistor R1is electrically coupled to the terminal Hdr of the integrated circuit500. That is, the amplification control signal Hgd output from the terminal Hdr of the integrated circuit500is supplied to the gate of the transistor M1. The source of the transistor M1is electrically coupled to the terminal Sw of the integrated circuit500.

The drain of the transistor M2is electrically coupled to the terminal Sw of the integrated circuit500. That is, the drain of the transistor M2and the source of the transistor M1are electrically coupled to each other. The gate of the transistor M2is electrically coupled to one end of a resistor R2, and the other end of the resistor R2is electrically coupled to the terminal Ldr of the integrated circuit500. That is, the amplification control signal Lgd output from the terminal Ldr of the integrated circuit500is supplied to the gate of the transistor M2. The ground potential is supplied to the source of the transistor M2.

In the amplifier circuit550configured as described above, when the transistor M1is turned off and the transistor M2is turned on, the voltage of the node to which the terminal Sw is coupled is the ground potential. Therefore, the voltage Vm is supplied to the terminal Bst. On the other hand, when the transistor M1is turned on and the transistor M2is turned off, the voltage of the node to which the terminal Sw is coupled is the voltage VHV. Therefore, a voltage signal of the potential of the voltage VHV+Vm is supplied to the terminal Bst.

That is, the gate driver521that drives the transistor M1uses the capacitor C5as a floating power supply, and when the potential of the terminal Sw changes to 0 V or the voltage VHV according to the operation of the transistor M1and the transistor M2, supplies, to the gate of the transistor M1, the amplification control signal Hgd whose L level is the potential of the voltage VHV and whose H level is the potential of the voltage VHV+the voltage Vm.

On the other hand, the gate driver522that drives the transistor M2supplies, to the gate of the transistor M2, the amplification control signal Lgd whose L level is the ground potential and whose H level is the potential of the voltage Vm irrespective of the operations of the transistor M1and the transistor M2.

As described above, the amplifier circuit550amplifies, by the transistor M1and the transistor M2, based on the voltage VHV, the modulation signal Ms obtained by modulating the base drive signals dA and aA. As a result, the amplified modulation signal AMs is generated at the coupling point where the source of the transistor M1and the drain of the transistor M2are commonly coupled. Then, the amplified modulation signal AMs generated by the amplifier circuit550is input to the smoothing circuit560.

The smoothing circuit560generates the drive signal COMA by smoothing the amplified modulation signal output from the amplifier circuit550to output the generated drive signal COMA from the drive signal output circuit51a. The smoothing circuit560includes a coil L1and a capacitor C1.

The amplified modulation signal AMs output from the amplifier circuit550is input to one end of the coil L1. The other end of the coil L1is coupled to the terminal COMA-Out serving as an output of the drive signal output circuit51a. That is, the drive signal output circuit51ais coupled to each of the selection circuits230included in the respective print heads20via the terminal COMA-Out. As a result, the drive signal COMA output from the drive signal output circuit51ais supplied to the selection circuit230. The other end of the coil L1is also coupled to one end of the capacitor C1. The ground potential is supplied to the other end of the capacitor C1. That is, the coil L1and the capacitor C1demodulates the amplified modulation signal AMs output from the amplifier circuit550by smoothing it to output the demodulated signal as the drive signal COMA. Here, the smoothing circuit560which demodulates the amplified modulation signal AMs by smoothing it to output the demodulated signal as the drive signal COMA is an example of a demodulation circuit.

The first feedback circuit570includes a resistor R3and a resistor R4. One end of the resistor R3is coupled to the terminal COMA-Out through which the drive signal COMA is output, and the other end is coupled to the terminal Vfb and one end of the resistor R4. The voltage VHV is supplied to the other end of the resistor R4via the terminal VHV−In. As a result, the drive signal COMA that has passed through the first feedback circuit570from the terminal COMA-Out is fed back to the terminal Vfb in a state of being pulled up by the voltage VHV.

The second feedback circuit572includes capacitors C2, C3, and C4and resistors R5and R6. One end of the capacitor C2is coupled to the terminal COMA-Out through which the drive signal COMA is output, and the other end is coupled to one end of the resistor R5and one end of the resistor R6. The ground potential is supplied to the other end of the resistor R5. Thus, the capacitor C2and the resistor R5function as a high pass filter. The cut-off frequency of the high-pass filter is set to, for example, about 9 MHz. The other end of the resistor R6is coupled to one end of the capacitor C4and one end of the capacitor C3. The ground potential is supplied to the other end of the capacitor C3. Thus, the resistor R6and the capacitor C3function as a low-pass filter. The cutoff frequency of the LPF is set to, for example, about 160 MHz. In this way, since the second feedback circuit572includes the high-pass filter and the low-pass filter, so that the second feedback circuit572functions as a band pass filter that passes a predetermined frequency range of the drive signal COMA.

The other end of the capacitor C4is coupled to the terminal Ifb of the integrated circuit500. As a result, a Signal obtained by cutting the DC component out of the high frequency components of the drive signal COMA that has passed through the second feedback circuit572that functions as the band pass filter is fed back to the terminal Ifb.

The drive signal COMA output from the terminal COMA-Out is a signal obtained by smoothing the amplified modulation signal AMs by the smoothing circuit560. The drive signal COMA is integrated/subtracted via the terminal Vfb, and then fed back to the adder512. Therefore, the drive signal output circuit51aself-oscillates at a frequency determined by the feedback delay and the feedback transfer function.

However, since the feedback path via the terminal Vfb has a large delay amount, so that there is a case where the frequency of the self-oscillation cannot be made high enough to ensure the accuracy of the drive signal COMA simply by the feedback via the terminal Vfb. Therefore, the delay in the entire circuit is reduced by providing a path through which the high-frequency component of the drive signal COMA is fed back via the terminal Ifb separately from the path via the terminal Vfb. As a result, the frequency of the voltage signal As can be made high enough to ensure the accuracy of the drive signal COMA as compared with the case where there is no path via the terminal Ifb.

FIG.11is a diagram illustrating the waveforms of the voltage signal As and the modulation signal Ms in association with the waveform of the analog base drive signal aA. As shown inFIG.11, the voltage signal As is a triangular wave, and its oscillation frequency varies according to the voltage of the base drive signal aA. Specifically, the frequency is highest when the voltage has an intermediate value, and decreases as the voltage has a higher value or a lower value than the intermediate value.

Further, the slope of the triangular wave of the voltage signal As at the rise of the voltage is almost equal to that at the fall of the voltage when the voltage has the nearly intermediate value. Therefore, the duty ratio of the modulation signal Ms obtained by comparing the voltage signal As with the thresholds Vth1and Vth2of the comparator514is approximately 50%. When the voltage of the voltage signal As increases from the intermediate value, the downward slope of the voltage signal As is gentle. Therefore, the period during which the modulation signal Ms is at H level is relatively long, and the duty ratio of the modulation signal Ms increases. On the other hand, when the voltage of the voltage signal As decreases from the intermediate value, the upward slope of the voltage signal As decreases. Therefore, the period during which the modulation signal Ms is at H level is relatively short, and the duty ratio of the modulation signal Ms decreases.

The gate driver521turns on or off the transistor M1based on the modulation signal Ms. That is, the gate driver521turns on the transistor M1when the modulation signal Ms is at H level, and turns off the transistor M1when the modulation signal Ms is at L level. The gate driver522turns on or off the transistor M2based on the logically inverted signal of the modulation signal Ms. That is, the gate driver522turns off the transistor M2when the modulation signal Ms is at H level and turns on the transistor M2when the modulation signal Ms is at L level.

Therefore, the voltage value of the drive signal COMA obtained by smoothing the amplified modulation signal AMs output from the amplifier circuit550by the smoothing circuit560increases as the duty ratio of the modulation signal Ms increases, and decreases as the duty ratio decreases. That is, the control is performed so that the waveform of the drive signal COMA matches the waveform obtained by enlarging the voltage of the base drive signal aA obtained by performing the analog conversion on the digital base drive signal dA.

Further, since the drive signal output circuit51auses the pulse density modulation, there is also an advantage that the change width of the duty ratio can be made large as compared with that of the pulse width modulation with a fixed modulation frequency. The minimum positive pulse width and the minimum negative pulse width that can be used in the drive signal output circuit51aare limited by circuit characteristics. Therefore, in the pulse width modulation in which the frequency is fixed, the change width of the duty ratio is limited within a predetermined range. In contrast, with the pulse density modulation, as the voltage of the voltage signal As moves away from the intermediate value, the oscillation frequency decreases, and as a result, it is possible to further increase the duty ratio in a region where the voltage is high. Further, it is possible to further decrease the duty ratio in a region where the voltage is low. Therefore, it is possible to secure a wider range of the change width of the duty ratio by employing self-oscillation type pulse density modulation.

Here, the drive signal COMA output by the drive signal output circuit51ais selected or deselected by the selection circuit230to be supplied, as the drive signal VOUT supplied to the electrode611of the piezoelectric element60, to the piezoelectric element60. That is, the output current based on the drive signal COMA output by the drive signal output circuit51achanges according to the number of the piezoelectric elements60supplied as the drive signal VOUT. Then, the output current of the drive signal output circuit51achanges, so that the voltage value of the voltage VHV input to the drive signal output circuit51amay fluctuate. As a result, the waveform accuracy of the drive signal COMA generated by amplification based on the voltage VHV may decrease.

Therefore, as shown inFIG.10, a capacitor C6for reducing the voltage fluctuation of the voltage VHV when the output current of the drive signal output circuit51achanges is electrically coupled to the terminal VHV−In. The capacitor C6is required to have a relatively large capacitance for reducing the voltage fluctuation of the voltage VHV with respect to the change in the output current, and to have a withstand voltage equal to or higher than the voltage value of the voltage VHV. Therefore, an electrolytic capacitor having a relatively large capacitance and a withstand voltage of several tens of volts or more is used for the capacitor C6. As a result, it is possible to reduce the possibility that the voltage value of the voltage VHV fluctuates in response to the change in the output current of the drive signal output circuit51a.

Further, the reference voltage generation circuit530included in the integrated circuit500generates the reference voltage signal VBS supplied to the electrode612of the piezoelectric element60to output the generated reference voltage signal VBS via the terminal VBS-Out. The current value output from the drive signal output circuit51abased on the reference voltage signal VBS changes according to the number of piezoelectric elements60to which the drive signal COMA as the drive signal VOUT is supplied. Therefore, the voltage value of the reference voltage signal VBS may fluctuate, and when the voltage value of the reference voltage signal VBS fluctuates, the potential difference between the electrode611and the electrode612of the piezoelectric element60may vary. Therefore, the driving of the piezoelectric element60may vary, and as a result, the ejection accuracy of the ink may decrease.

For this reason, as shown inFIG.10, a capacitor C7for reducing the voltage fluctuation of the reference voltage signal VBS when the current value output from the drive signal output circuit51abased on the reference voltage signal VBS changes is electrically coupled to the terminal VBS-Out. The capacitor C7is required to have a relatively large capacitance for reducing the voltage fluctuation of the reference voltage signal VBS with respect to the change in the output current, and to have a withstand voltage equal to or higher than the voltage value of the reference voltage signal VBS. Therefore, an electrolytic capacitor having a relatively large capacitance and a withstand voltage of several volts or more is used for the capacitor C7. As a result, it is possible to reduce the possibility that the voltage value of the reference voltage signal VBS fluctuates with respect to the change in the current value output from the drive signal output circuit51abased on the reference voltage signal VBS.

1.6 Configuration of Circuit Substrate Provided with Drive Circuit and Drive Signal Output Circuit

Next, the configuration of a drive signal output circuit substrate40aon which the drive signal output circuit51ais mounted, a drive signal output circuit substrate40bon which the drive signal output circuit51bis mounted, and a drive circuit substrate30to which the drive signal output circuit substrates40aand40bare detachably coupled will be described.

That is, the drive circuit50includes drive signal output circuit substrates40aand40band the drive circuit substrate30. In the following explanation, the capacitor C6electrically coupled to the terminal VHV−In of the drive signal output circuit51amay be referred to as a capacitor C6a, and the capacitor C7electrically coupled to the terminal VBS-Out of the drive signal output circuit51amay be referred to as a capacitor C7a. Similarly, the capacitor C6electrically coupled to the terminal VHV−In of the drive signal output circuit51bis referred to as a capacitor C6b, the capacitor C7electrically coupled to the terminal VBS-Out of the drive signal output circuit51bmay be referred to as a capacitor C7b.

FIG.12is a plan view illustrating the configuration of the drive circuit substrate30. As shown inFIG.12, the drive circuit substrate30includes a wiring substrate300, connectors310,320,330aand330b, and the capacitors C6a, C6b, C7a, and C7b.

The wiring substrate300has a substantially rectangular shape including a side301, a side302facing the side301, a side303intersecting the side301and the side302, and a side304facing the side303and intersecting the side301and the side302. The wiring substrate300is provided with the connectors310,320,330aand330band the capacitors C6a, C6b, C7a, and C7b. Further, the drive signal output circuit substrates40aand40bare detachably coupled to the wiring substrate300.

The connector310includes a plurality of terminals311disposed side by side in the direction along the side303. Various signals including the clock signal SCK, the print data signal SI, the latch signal LAT, the change signal CH, and the base drive signals dA and dB which are output by the control circuit100described above, and various voltage signals including the voltage VHV output by the voltage output circuit110are input to the connector310. Of the clock signal SCK, the print data signal SI, the latch signal LAT, the change signal CH, the base drive signals dA and dB, and the voltage VHV which are input to the connector310, the base drive signal dA and the voltage VHV are supplied to the drive signal output circuit substrates40a, and the base drive signal dB and the voltage VHV are supplied to the drive signal output circuit substrate40b. The clock signal SCK, the print data signal SI, the latch signal LAT, and the change signal CH in addition to the base drive signals dA and dB, and the voltage VHV may be input to the drive signal output circuit substrates40aand40b.

The connector320is located toward the side301relative to the connector310and includes a plurality of terminals321disposed side by side in the direction along the side303. The drive signal COMA output from the drive signal output circuit51amounted on the drive signal output circuit substrate40a, the drive signal COMB output from the drive signal output circuit51bmounted on the drive signal output circuit substrate40b, and the reference voltage signal VBS are input to the connector320. Further, the clock signal SCK, the print data signal SI, the latch signal LAT, and the change signal CH are input to the connector320. Various signals including the drive signals COMA and COMB, the reference voltage signal VBS, the clock signal SCK, the print data signal SI, the latch signal LAT, and the change signal CH which are input to the connector320are supplied to the print head20.

The capacitor C6ais provided toward the side304relative to the connector310. The capacitor C6bis provided toward the side304relative to the capacitor C6a. That is, the capacitors C6aand C6bare located toward the side304relative to the connector310, and are provided side by side in the order of the capacitor C6aand the capacitor C6bin the direction from the side303to the side304.

The capacitor C7ais provided toward the side304relative to the connector320and toward the side301relative to the capacitors C6aand C6b. The capacitor C7bis provided toward the side304relative to the capacitor C7aand toward the side301relative to the capacitors C6aand C6b. That is, the capacitors C7aand C7bare located toward the side304relative to the connector320and toward the side301relative to the capacitors C6aand C6b, and are disposed side by side in the order of the capacitor C7aand the capacitor C7bin the direction from the side303to the side304.

The connector330ais located toward the side304relative to the connector310, and is provided between the capacitors C6aand C6band the capacitors C7aand C7b. The connector330bis located toward the side304relative to the connector330aand is provided between the capacitors C6aand C6band the capacitors C7aand C7b. That is, the connectors330aand330bare toward the side304relative to the connector310, toward the side301relative to the capacitors C6aand C6b, and toward the side302relative to the capacitors C7aand C7b, and are provided side by side in the order of the connector330aand the connector330bin the direction from the side303to the side304.

The drive signal output circuit substrate40ais detachably coupled to the wiring substrate300toward the side301relative to the connector330a. Specifically, one side of the drive signal output circuit substrate40ais inserted into the connector330a, and screws341aand342acoupled to the wiring substrate300are attached toward the other side of the drive signal output circuit substrate40a, so that the drive signal output circuit substrate40ais detachably coupled to the wiring substrate300. Similarly, the drive signal output circuit substrate40bis detachably coupled to the wiring substrate300toward the side301relative to the connector330b. Specifically, one side of the drive signal output circuit substrate40bis inserted into the connector330b, and screws341band342bcoupled to the wiring substrate300are attached toward the other side of the drive signal output circuit substrate40b, so that the drive signal output circuit substrate40bis detachably coupled to the wiring substrate300.

Here, the connector330amay be configured by a card edge connector or the like electrically coupled to the drive signal output circuit substrate40aby an insertion of one side of the drive signal output circuit substrate40ainto the connector330a, and similarly, the connector330bmay be configured by a card edge connector or the like electrically coupled to the drive signal output circuit substrate40bby an insertion of one side of the drive signal output circuit substrate40binto the connector330b.

Next, details of the configuration of the drive signal output circuit substrates40aand40bdetachably coupled to the wiring substrate300will be described with reference toFIG.13.FIG.13is a plan view illustrating the configuration of the drive signal output circuit substrates40aand40b. It should be noted that the drive signal output circuit substrate40aand the drive signal output circuit substrate40bhave the same configuration except that the circuit to be mounted is the drive signal output circuit51aor the drive signal output circuit51b. Therefore, inFIG.13, the configuration of the drive signal output circuit substrate40awill be described as an example, and the description of the drive signal output circuit substrate40bwill be simplified or omitted.

As shown inFIG.13, the drive signal output circuit substrate40aincludes the drive signal output circuit51athat outputs the drive signal COMA for driving the piezoelectric element60, a plurality of terminals410to which the base drive signal dA that is the base of the drive signal COMA and the voltage VHV are input, and a wiring substrate400on which the drive signal output circuit51aand the plurality of terminals410is provided.

The wiring substrate400has a substantially rectangular shape including a side401, a side402facing the side401, a side403intersecting the side401and the side402, and a side404facing the side403and intersecting the side401and the side402. Then, as shown inFIG.13, the length of the side401and the side402of the wiring substrate400are longer than the length of the side403and the side404. In other words, the wiring substrate400includes the side403and the side404, and the side401and the side402longer than the side403and the side404.

The plurality of terminals410is provided on the wiring substrate400side by side in the direction along the side403of the wiring substrate400. The plurality of terminals410is electrically coupled to the connector330aincluded in the drive circuit substrate30. That is, the plurality of terminals410and the connector330aare electrically coupled by inserting the side403of the wiring substrate400included in the drive signal output circuit substrate40ainto the connector330a, so that the drive signal output circuit substrate40aand the drive circuit substrate30are electrically coupled. As a result, the base drive signals dA and dB and the voltage VHV are input to the drive signal output circuit substrate40avia the plurality of terminals410.

The drive signal output circuit51ais positioned on the wiring substrate400toward the side404relative to the plurality of terminals410. In other words, at least one of the plurality of terminals410and the drive signal output circuit51are positioned side by side in the direction along the side401. Specifically, as described above, the drive signal output circuit51includes the integrated circuit500, the amplifier circuit550, the smoothing circuit560, the first feedback circuit570, and the second feedback circuit572. The integrated circuit500is positioned toward the side404relative to the plurality of terminals410. The amplifier circuit550is positioned toward the side404relative to the integrated circuit500. The smoothing circuit560is positioned toward the side404relative to the amplifier circuit550. That is, the integrated circuit500, the amplifier circuit550, and the smoothing circuit560are positioned toward the side404relative to the plurality of terminals410provided on the wiring substrate400, and are provided side by side in the order of the integrated circuit500, the amplifier circuit550, and the smoothing circuit560in the direction from the side403to the side404.

The first feedback circuit570is positioned toward the side401relative to the integrated circuit500and toward the side404relative to the plurality of terminals410. The second feedback circuit572is positioned toward the side404relative to the first feedback circuit570and toward the side401relative to the integrated circuit500.

As mentioned above, the modulation circuit510, the amplifier circuit550, and the smoothing circuit560included in the drive signal output circuit51aare provided on the drive signal output circuit substrate40a, and the modulation circuit510, the amplifier circuit550, and the smoothing circuit560included in the drive signal output circuit51bare provided on the drive signal output circuit substrate40b. Here, at least one of the drive signal output circuit substrate40aand the drive signal output circuit substrate40bcorresponds to a circuit substrate, and the wiring substrate400included in the drive signal output circuit substrate40aand the drive signal output circuit substrate40bis an example of a substrate.

Further, the wiring substrate400has insertion holes441and442. The insertion holes441and442are positioned toward the side404relative to the drive signal output circuit51in the wiring substrate400, and are provided in the order of the insertion hole441and the insertion hole442in the direction from the side401to the side402. Then, the screw341ais inserted into the insertion hole441, and the screw342ais inserted into the insertion hole442. The drive signal output circuit substrate40ais attached to the drive circuit substrate30by tightening the screws341aand342ainserted into the insertion holes441and442to the drive circuit substrate30.

Next, a specific example of the electrical connection between the drive circuit substrate30and the drive signal output circuit substrates40aand40bwill be described. Before describing the electrical connection between the drive circuit substrate30and the drive signal output circuit substrates40aand40b, the configuration of the wiring substrate400included in the drive signal output circuit substrates40aand40bwill be described first with reference toFIG.14.

FIG.14is a diagram for explaining the configuration of the wiring substrate400. As shown inFIG.14, the wiring substrate400includes a base material491, an insulation layer492, a wiring layer493, and a protective layer494.

The base material491is a plate-shaped member including a face495and a face496opposite to the face495, and bears the strength of the wiring substrate400. The base material491in the present embodiment is configured to include a metal having excellent thermal conductivity. That is, the base material491includes a metal. Here, the metal contained in the base material491is a material having excellent thermal conductivity among metals, and for example, copper and a copper alloy, aluminum and an aluminum alloy, or the like are preferably used. That is, the base material491preferably contains copper as a metal.

The insulation layer492, the wiring layer493, and the protective layer494are laminated in the order of the insulation layer492, the wiring layer493, and the protective layer494in the direction along the direction normal to the face495of the base material491. In other words, the wiring substrate400includes the base material491, and the insulation layer492, the wiring layer493, and the protective layer494that are laminated in the direction normal to the face495of the base material491.

The wiring layer493includes a plurality of wires containing copper or a copper alloy. Each wire includes a wire through which the base drive signal dA input to the drive signal output circuit51apropagates, a wire through which the amplified modulation signal AMs output by the amplifier circuit550included in the drive signal output circuit51apropagates, a wire through which the drive signal COMA output by the drive signal output circuit51apropagates, a wire through which the ground signal indicating the reference potential of the drive signal output circuit51apropagates, and the like.

The insulation layer492is provided between the base material491and the wiring layer493. This reduces the possibility that a plurality of signals propagating through the wiring layer493will be short-circuited by the metal contained in the base material491. Further, the protective layer494reduces the possibility that a short circuit may occur between the wires provided in a wiring layer393when the extra solder used when various circuit components included in the drive signal output circuit51aare mounted on the wiring substrate400is attached to the wiring formed in the wiring layer493.

Here, the thickness tin1of the base material491included in the wiring substrate400is thicker than any of the thickness tin2of the insulation layer492, the thickness tin3of the wiring layer493, and the thickness tin4of the protective layer494. That is, the thickness tin1of the base material491is thicker than the thickness tin2of the insulation layer492, the thickness tin1of the base material491is thicker than the thickness tin3of the wiring layer493, and the thickness tin1of the base material491is thicker than the thickness tin4of the protective layer494. Specifically, while the thickness tin1of the base material491is about 0.5 mm to 2.5 mm, the thickness tin2of the insulation layer492, the thickness tin3of the wiring layer493, and the thickness tin4of the protective layer494are each about 10 μm to 200 μm. In this way, the thickness tin1of the base material491is thicker than any of the thickness tin2of the insulation layer492, the thickness tin3of the wiring layer493, and the thickness tin4of the protective layer494, so that the strength of the wiring substrate400can be maintained.

As described above, the wiring substrate400in the present embodiment is configured to include the base material491, and the insulation layer492, the wiring layer493, and the protective layer494that are laminated on the face495of the base material491. The electronic components included in the amplifier circuit550and the smoothing circuit560are electrically coupled to the wiring included in the wiring layer493laminated on the base material491, and the amplifier circuit550and the smoothing circuit560are positioned on the protective layer494laminated on the base material491. That is, the amplifier circuit550is positioned so as to overlap at least part of the base material391in the direction normal to the base material491, and the smoothing circuit560is positioned so as to overlap at least part of the base material391in the direction normal to the base material491.

Here, the wiring layer493including the wiring through which at least one of the amplified modulation signal AMs and the drive signal COMA propagates is an example of a first layer, and the face495of the base material491on which the wiring layer493is laminated is an example of a first face of the base material491. The face495of the base material491is an example of a first face.

Next, a specific example of the electrical connection between the drive circuit substrate30and the drive signal output circuit substrates40aand40bwill be described with reference toFIG.15.FIG.15is a diagram illustrating a cross section of the drive circuit substrate30and the drive signal output circuit substrate40ataken along line XV-XV shown inFIG.12.

As shown inFIG.15, the connector330aincludes a conductive portion331a. One end of the conductive portion331ais electrically coupled to a wire393aprovided on the wiring substrate300, the other end of the conductive portion331ais electrically coupled to a wire493aincluded in the wiring layer493of the wiring substrate400included in the drive signal output circuit substrate40ainserted into the connector330a. As a result, various signals including the base drive signal dA propagating in the drive circuit substrate30and the voltage VHV are input to the wiring layer493included in the drive signal output circuit substrate40a. Here, the wire493aelectrically coupled to the conductive portion331aincluded in the connector330acorresponds to the plurality of terminals410provided on the wiring substrate400described above. That is, the connector330aincludes the plurality of conductive portions331acorresponding to the plurality of respective terminals410included in the drive signal output circuit substrate40a.

Of the base drive signal dA and the voltage VHV input to the drive signal output circuit substrate40avia the wire493a, the base drive signal dA propagates through a wire493bprovided in the wiring layer493of the wiring substrate400, and is input to the integrated circuit500including the modulation circuit510. As described above, the integrated circuit500generates and output the amplification control signals Hgd and Lgd based on the input base drive signal dA.

Of the amplification control signals Hgd and Lgd output from the integrated circuit500, the amplification control signal Lgd propagates through a wire493cand is input to the transistor M2included in the amplifier circuit550. Further, the amplification control signal Hgd propagates through a wire (not shown) provided in the wiring layer493and is input to the transistor M1included in the amplifier circuit550.

The amplifier circuit550operates, based on the voltage VHV, the amplification control signals Hgd and Lgd input to the transistors M1and M2. As a result, the amplified modulation signal AMs is generated and output to a wire493d.

The amplified modulation signal AMs output from the amplifier circuit550propagates through the wire493dand is input to one end of the coil L1included in the smoothing circuit560. The smoothing circuit560generates the drive signal COMA by demodulating the amplified modulation signal AMs by the coil L1and the capacitor C1(not shown) to output the generated drive signal COMA to a wire493e.

The wire493eis electrically coupled to the screw341ainserted through the insertion hole441. The screw341ais inserted through a spacer591aand an insertion hole345aprovided in the wiring substrate300, and is tightened by a nut344a. As a result, the drive signal output circuit substrate40ais fixed to the drive circuit substrate30. Further, the screw341ais tightened by the nut344a, so that the nut344ais electrically coupled to a wire393bprovided on the wiring substrate300. Then, the wire393bis electrically coupled to the connector320shown inFIG.12.

As a result, the drive signal COMA output from the smoothing circuit560is input to the connector320via the wire493e, the screw341a, the nut344a, and the wire393b. Then, the drive signal COMA input to the connector320is supplied to the print head20.

Here, among the plurality of wires included in the wiring layer493of the wiring substrate400, at least one of the wire493dthrough which the amplified modulation signal AMs propagates and the wire493ethrough which the drive signal COMA propagates is an example of a first propagation wire.

The drive circuit substrate30is electrically coupled to the wiring substrate400included in the drive signal output circuit substrate40a, relays the reference voltage signal VBS, the clock signal SCK, the print data signal SI, the latch signal LAT, and the change signal CH that are input from the connector310to the connector320, relays the base drive signal dA to the drive signal output circuit substrate40a, and further, relays the drive signal COMA output from the drive signal output circuit substrate40ato the connector320. That is, the drive circuit substrate30that is electrically coupled to the wiring substrate400and that relays the propagation of the drive signal COMA to the print head20is an example of a relay circuit substrate.

1.7 Functions and Effects

In the liquid ejecting apparatus1and the drive signal output circuit substrates40aand40bof the first embodiment configured as described above, of the drive circuit50that outputs drive signals COMA and COMB that drive the piezoelectric element60, the wiring substrate400on which the modulation circuit510, the amplifier circuit550, and the smoothing circuit560that are included in the drive signal output circuit51aare provided includes the base material491containing a metal, and the wiring layer493provided with at least one of the wire493dthrough which the amplified modulation signal AMs propagates and the wire493ethrough which the drive signal COMA propagates both of which are laminated on the base material491. In the liquid ejecting apparatus1and the drive signal output circuit substrates40aand40bconfigured as described above, heat generated by the amplified modulation signal AMs having a large amount of current propagating through the wiring provided in the wiring layer393and the drive signal COMA is conducted to the base material491. In this case, since the base material491includes a metal having excellent thermal conductivity, and is thicker than the wiring layer493, the heat generated by the amplified modulation signal AMs having a large amount of current propagating through the wiring provided in the wiring layer393and the drive signal COMA is efficiently dispersed and released by the base material491. That is, the heat generated in the drive circuit50can be efficiently released.

Further, since the base material491contains a metal having excellent thermal conductivity, and is thicker than the wiring layer493, the possibility that heat generated by the amplified modulation signal AMs having a large amount of current propagating through the wiring provided in the wiring layer393and the drive signal COMA may be locally concentrated near the heat-generating components and the wiring is reduced, and as a result, the possibility that the characteristic deterioration of the components consisting of the drive circuit50, and malfunction of the drive circuit50due to the characteristic deterioration may occur is reduced.

As described above, the effect of efficiently releasing the heat generated in the drive circuit50, and the effect of reducing the possibility that deterioration of the characteristics of the components constituting the drive circuit50, and malfunction of the drive circuit50due to the characteristic deterioration, and the like may occur are more prominent when the metal constituting the base material491contains copper having excellent thermal conductivity.

In the liquid ejecting apparatus1and the drive signal output circuit substrates40aand40bof the first embodiment described above, a ground signal indicating the reference potential of the drive circuit50and the drive signal output circuits51aand51bmay be supplied to the base material491included in the wiring substrate400. As described above, the thickness tin1of the base material491is thicker than the thickness tin3of the wiring layer393. Therefore, the resistivity of the base material491made of metal is smaller than the resistivity of the wiring layer393. The ground signal indicating the reference potential of the drive circuit50and the drive signal output circuits51aand51bis supplied to the base material491having such a small resistivity, so that the operations of the drive circuit50and the drive signal output circuits51aand51bcan be further stabilized.

In the liquid ejecting apparatus1and the drive signal output circuit substrates40aand40baccording to the first embodiment described above, the description is made in which the drive signal output circuit51ais mounted on the wiring substrate400included in the drive signal output circuit substrate40a, and the drive signal output circuit51bis mounted on the wiring substrate400included in the drive signal output circuit substrate40b, but the drive signal output circuit51aand the drive signal output circuit51bmay be mounted on a common wiring substrate. Even in this case, the same functions and effects as those of the liquid ejecting apparatus1and the drive signal output circuit substrates40aand40bof the first embodiment can be obtained.

Further, the drive signal output circuit51aand the drive signal output circuit51bmay be a common wiring substrate and may be mounted on the drive circuit substrate30. In this case, when the base material of the wiring substrate300is configured to include a metal, it is possible to achieve the same functions and effects as the liquid ejecting apparatus1and the drive signal output circuit substrates40aand40bof the first embodiment.

2. Second Embodiment

The liquid ejecting apparatus1and the drive signal output circuit substrates40aand40bin the second embodiment are different from the liquid ejecting apparatus1and the drive signal output circuit substrates40aand40bof the first embodiment in that an insulation layer, a wiring layer, and a protective layer is laminated on both faces of the base material491of the wiring substrate400.

FIG.16is a diagram for explaining the configuration of the wiring substrate400according to the second embodiment.

As shown inFIG.16, the wiring substrate400according to the second embodiment includes the base material491, insulation layers492-1and492-2, wiring layers493-1and493-2, and protective layers494-1and494-2. The insulation layer492-1, the wiring layer493-1, and the protective layer494-1are laminated toward the face495of the base material491, and the insulation layer492-2, the wiring layer493-2, and the protective layer494-2are laminated toward the face496of the base material491. That is, the wiring substrate400includes the wiring layer493-2laminated on the face496opposite to the face495of the base material491, and the wiring layer493-2includes the wiring through which a signal different from a signal in the wiring included in the wiring layer493-1laminated on the face495of the base material491propagates.

The drive signal output circuit substrates40aand40bhaving the wiring substrate400configured as described above can have circuits and wires that constitutes the drive signal output circuits51aand51bon both the face495and the face496of the base material491. Therefore, the wiring substrate400of the drive signal output circuit substrates40aand40bof the second embodiment can be downsized, compared with that of the first embodiment.

That is, in the liquid ejecting apparatus1and the drive signal output circuit substrates40aand40bin the second embodiment, the wiring substrate400included in the drive signal output circuit substrates40aand40bcan be downsized in addition to the functions and effects of the liquid ejecting apparatus1and the drive signal output circuit substrates40aand40bof the first embodiment.

Here, the face495of the base material491is an example of a first face of the second embodiment, the face496is an example of a second face of the second embodiment, the wiring layer493-1is an example of a first layer of the second embodiment, and the wiring layer493-2is an example of a second layer of the second embodiment. The wire included in the wiring layer493-1is an example of a first propagation wire of the second embodiment, and the wire included in the wiring layer493-2is an example of a second propagation wire of the second embodiment.

The following contents are derived from the above-described embodiments and modifications.

An aspect of the liquid ejecting apparatus includes a liquid ejection head including a drive element, where the liquid ejection head ejects a liquid by a supply of a drive signal to the drive element, and a drive circuit that outputs the drive signal, wherein the drive circuit includes a modulation circuit that modulates a base drive signal to output a modulation signal, an amplifier circuit that amplifies the modulation signal to output an amplified modulation signal, a demodulation circuit that demodulates the amplified modulation signal to output the drive signal, and a substrate on which the modulation circuit, the amplifier circuit, and the demodulation circuit are provided, wherein the substrate includes a base material and a first layer laminated on a first face of the base material, wherein the base material includes a metal, wherein the first layer includes a first propagation wire through which at least one of the amplified modulation signal and the drive signal propagates, and wherein the base material has a thickness greater than a thickness of the first layer.

According to the liquid ejecting apparatus, the substrate on which the modulation circuit, the amplifier circuit, and the demodulation circuit are provided includes a base material that is thicker than the first layer including the first propagation wire and that includes a metal having excellent thermal conductivity, so that the heat generated in the modulation circuit, the amplifier circuit, and the demodulation circuit is efficiently released through the base material. That is, the heat generated in the drive circuit can be efficiently released.

In an aspect of the liquid ejecting apparatus, the substrate may include a second layer laminated on a second face opposite to the first face of the base material, and wherein the second layer may include a second propagation wire through which a signal different from a signal propagating through the first propagation wire propagates.

According to the liquid ejecting apparatus, the substrate has a first layer including a first propagation wire, toward the first face of the base material, on which at least one of an amplified modulation signal and a drive signal propagates, and a second layer including a second propagation wire, toward the second face side opposite to the first face of the base material, on which a signal different from a signal propagating through the first propagation wire propagates. As a result, the effective area where the circuit can be mounted on the substrate is increased, and the substrate can be downsized while efficiently releasing the heat generated in the drive circuit.

In an aspect of the liquid ejecting apparatus, a ground signal indicating the reference potential of the drive circuit may be supplied to the base material.

According to the liquid ejecting apparatus, the ground potential is supplied to the base material that is thicker than the first layer and that includes a metal having excellent thermal conductivity, so that the ground potential can be stabilized while efficiently releasing the heat generated in the drive circuit.

In an aspect of the liquid ejecting apparatus, the drive circuit may include a relay circuit substrate electrically coupled to the substrate and relaying propagation of the drive signal to the liquid ejection head.

According to the liquid ejecting apparatus, the drive circuit includes the relay substrate electrically coupled to the substrate, so that it is possible to position, at the relay substrate, the circuit structure that generates a small amount of heat while releasing, from the substrate, the heat generated in the modulation circuit, the amplifier circuit, and the demodulation circuit, which generate a large amount of heat. Therefore, it is possible to reduce an area in which a substrate having a base material including a metal is used, and as a result, a cost of the substrate can be reduced, compared with a driver circuit constituted by only a substrate having a base material including a metal.

In an aspect of the liquid ejecting apparatus, the amplifier circuit may be positioned so as to overlap at least part of the base material in a direction normal to the first face.

According to the liquid ejecting apparatus, the base material including metal is positioned so as to overlap at least part of the amplifier circuit, so that it is possible to efficiently release the heat generated in the amplifier circuit that generates a large amount of heat.

In an aspect of the liquid ejecting apparatus, the demodulation circuit may be positioned so as to overlap at least part of the base material in a direction normal to the first face.

According to the liquid ejecting apparatus, the base material including metal is positioned so as to overlap at least part of the demodulation circuit, so that it is possible to efficiently release the heat generated in the demodulation circuit that generates a large amount of heat.

In an aspect of the liquid ejecting apparatus, the base material may include copper as the metal.

According to the liquid ejecting apparatus, the metal included in the base material is copper having excellent thermal conductivity, so that the heat generated in the drive circuit can be released more efficiently.

An aspect of the circuit substrate includes a modulation circuit that modulates a base drive signal to output a modulation signal, an amplifier circuit that amplifies the modulation signal to output an amplified modulation signal, a demodulation circuit that demodulates the amplified modulation signal to output the drive signal, and a substrate on which the modulation circuit, the amplifier circuit, and the demodulation circuit are provided, wherein the substrate includes a base material and a first layer laminated on a first face of the base material, wherein the base material includes a metal, wherein the first layer includes a first propagation wire through which at least one of the amplified modulation signal and the drive signal propagates, and wherein the base material has a thickness greater than a thickness of the first layer.

According to the circuit substrate, the substrate on which the modulation circuit, the amplifier circuit, and the demodulation circuit are provided includes the base material that is thicker than the first layer including the first propagation wire and that includes a metal having excellent thermal conductivity, so that the heat generated in the modulation circuit, the amplifier circuit, and the demodulation circuit is efficiently released through the base material. That is, the heat generated in the drive circuit can be efficiently released.

The embodiments and the modifications have been described above, but the present disclosure is not limited to these embodiments and modifications. It is possible to implement the present disclosure in various aspects without departing from the gist thereof, and for example, the embodiments and the modifications can be combined appropriately.

The disclosure includes a configuration substantially same as the configuration described in the embodiments and the modifications (for example, a configuration having the same function, method, and result, or a configuration having the same object and effect). Further, the disclosure includes a configuration in which a non-essential part of the configuration described in the embodiments and the modifications is replaced. Further, the disclosure includes a configuration having the same functions and effects as the configuration described in the embodiments and the modifications or a configuration capable of achieving the same object. Further, the disclosure includes a configurations in which known techniques are added to the configurations described in the embodiments and the modifications.