DMOS type semiconductor device and method for manufacturing the same

A DMOS type semiconductor device and a method for manufacturing the same are provided. An isolation oxide layer with an ion implantation opening is formed on a semiconductor. A gate oxide film is formed on the semiconductor within the ion implantation opening. A gate is formed on the isolation oxide layer and the gate oxide film. A body layer diffusively formed in the semiconductor by implanting ions of an impurity element having a first conduction type from the ion implantation opening. A regulation layer which is shallower than the body layer is diffusively formed in the body layer by implanting ions of an impurity element having a second conduction type opposite to the first conduction type from the ion implantation opening. A source layer is diffusively formed in the regulation layer by implanting ions of an impurity element having the second conduction type from the ion implantation opening. The regulation layer is formed so as to horizontally extend beyond a region in which a gate bird's beak occurs from an end of the gate toward underlying layers of the gate.

BACKGROUND

Devices and methods consistent with the present invention relate to a DMOS (Double Diffused Metal Oxide Semiconductor) type semiconductor device and a method for manufacturing the same.

As shown inFIG. 9, In a DMOS type semiconductor device (hereinafter abbreviated as “DMOS”)100, an ion implantation opening103is formed in an isolation oxide layer102formed on a surface of a semiconductor layer (epitaxial growth layer)101. In addition, in the DMOS100, a body layer104is formed by implanting (doping) ions of an impurity element of a first conduction type from the ion implantation opening103and a source layer105and a back gate layer106are formed by implanting ions of an impurity element of a second conduction type opposite to the first conduction type using the same ion implantation opening103. The DMOS100has an effect of achieving a short channel with ease and achieving high voltage resistance by a shape of the body layer104as a difference in a surface portion between diffusion depth of the body layer104and diffusion depth of the source layer105is configured as a channel length c, as shown inFIG. 11.

A conventional method for manufacturing the DMOS100is generally to form an n-type buried diffusion layer108by diffusing impurity ions into a p-type silicon substrate107through implantation of ions from a main surface of the silicon substrate107and form an n-type epitaxial growth layer101on the buried diffusion layer108and the main surface of the silicon substrate107. This manufacturing method forms a relatively thick isolation oxide layer102on the epitaxial growth layer101using, for example, a LOCOS (Local Oxidation of Silicon) method. At this time, the ion implantation opening103is formed.

This manufacturing method forms a gate110on the epitaxial growth layer101through a gate oxide film109(seeFIG. 10). This manufacturing method diffusively forms the body layer104in the epitaxial growth layer101by implanting ions of a p-type impurity element into the epitaxial growth layer101in self-alignment of some of the gate110in conjunction with the ion implantation opening103. This manufacturing method diffusively forms a thin source layer105in the body layer104by implanting ions of an n-type impurity element into the body layer104in self-alignment of some of the gate110(seeFIG. 11). This manufacturing method diffusively forms the back gate layer106in the body layer104by implanting ions of a p-type impurity element from the ion implantation opening103into the body layer104.

This manufacturing method diffusively forms a drift layer113in the epitaxial growth layer101by implanting ions of an n-type impurity element into the epitaxial growth layer101at the same time of forming the above-mentioned source layer105or through a separate process, and additionally diffusively forms a drain layer114in the drift layer113by implanting ions of an n-type impurity element into the drift layer113. In addition, this manufacturing method manufactures the DMOS100by carrying out an electrode forming process and the like, as shown inFIG. 9.

Patent Document 1 discloses an N channel type high voltage resistant transistor of a DMOS type with improved voltage resistance between a source and a drain in a state where the transistor is turned on and channel current flows through the transistor. The high voltage resistant transistor has a body layer including a first body layer formed to include a channel region between a source layer and a drain layer and a second thin body layer projecting from the first body layer toward a region under the drain layer, for the purpose of improvement of a voltage resistance characteristic by alleviating an electric field by a drain voltage in the body layer.

Patent Document 1: Japanese Patent Publication No. 2004-39774 A

In the DMOS100, an annealing treatment (thermal oxidation treatment) is carried out while the source layer105and the back gate layer106are being formed after the body layer104is formed. In the DMOS100, while the gate110is formed on the gate oxide film109, the gate oxide film109at an end of the gate110is affected by the thermal oxidation treatment carried out in the above-mentioned post-process, thereby producing a gate bird's beak115unstable in its thickness or shape as shown inFIG. 11.

In the DMOS100, as described above, the source layer105is diffusively formed in the body layer104by implanting ions of an impurity element from the ion implantation opening103into the body layer104. In the DMOS100, although the ions of the impurity element is implanted in self-alignment of an end of the gate110at that time, diffusion of the ions from the end of the gate110into a region under the end of the gate110is small. On this account, in the DMOS100, the source layer105is formed in the body layer104over a region in which the above-mentioned gate bird's beak115is produced.

In the DMOS100, as described above, the difference in the surface portion between the diffusion depth of the body layer104and the diffusion depth of the source layer105is configured as the channel length C. In the DMOS100, since the source layer105is formed over the region in which the gate bird's beak115is formed, the source layer105is affected by irregularity of the thickness and shape of the gate bird's beak115, which results in an irregular characteristic of the semiconductor100and a low yield thereof.

SUMMARY

It is therefore an object of the present invention to provide a DMOS type semiconductor device (DMOS) which is capable of achieving its improved characteristic by forming a stable source layer without being affected by a gate bird's beak, and a method for manufacturing the same.

In order to achieve the above-mentioned object, according to an aspect of an embodiment of the present invention, there is provided a DMOS type semiconductor device, comprising: a semiconductor; an isolation oxide layer, formed on the semiconductor and formed with an ion implantation opening; a gate oxide film, formed on the semiconductor within the ion implantation opening; a gate, formed on the isolation oxide layer and the gate oxide film; a body layer, diffusively formed in the semiconductor by implanting ions of an impurity element having a first conduction type from the ion implantation opening; a regulation layer, shallower than the body layer and diffusively formed in the body layer by implanting ions of an impurity element having a second conduction type opposite to the first conduction type from the ion implantation opening; and a source layer, diffusively formed in the regulation layer by implanting ions of an impurity element having the second conduction type from the ion implantation opening, wherein the regulation layer is formed so as to horizontally extend beyond a region in which a gate bird's beak occurs from an end of the gate toward underlying layers of the gate.

According to another aspect of an embodiment of the present invention, there is provided a method for manufacturing a DMOS type semiconductor device, comprising: providing a silicon substrate; diffusively forming a buried diffusion layer on a main surface of the silicon substrate; forming an epitaxial growth layer on the silicon substrate and the buried diffusion layer; forming an isolation oxide layer on the epitaxial growth layer with an ion implantation opening; forming a gate oxide film on the epitaxial growth layer within the ion implantation opening; forming a gate on the gate oxide film; diffusively forming a body layer in the epitaxial growth layer by implanting ions of an impurity element having a first conduction type from the ion implantation opening; diffusively forming a regulation layer in the body layer by implanting ions of an impurity element having a second conduction type opposite to the first conduction type from the ion implantation opening, the regulation layer being shallower than the body layer; and diffusively forming a source layer in the regulation layer by implanting ions of an impurity element having the second conduction type from the ion implantation opening, wherein the regulation layer is formed so as to horizontally extend beyond a region in which a gate bird's beak occurs from an end of the gate toward underlying layers of the gate.

The regulation layer may be formed by implanting the ions of the impurity element into the body layer using the end of the gate as a self-alignment. The regulation layer may be formed by obliquely implanting the ions of the impurity element from the ion implantation opening. A part of the regulation layer may be formed beneath a part of the gate through the gate oxide film.

DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS

Hereinafter, a DMOS1and a method for manufacturing the same according to an embodiment of the present invention will be described in detail with reference to the drawings. A DMOS1shown inFIGS. 1 and 2according to an embodiment has the same essential configuration as the above-described conventional DMOS100except that a difference in a surface portion between diffusion depth of a body layer2and diffusion depth of a source layer4formed, together a back gate layer3, in the body layer2becomes channel length C, as will be described later. The DMOS1has an effect of achieving a short channel with ease and achieving high voltage resistance by forming the body layer2into a proper shape.

The DMOS1forms a source forming regulation layer5in the body layer2in advance and forms the source layer4in the source forming regulation layer5, as will be described in detail later. In the DMOS1, the source forming regulation layer5is formed of a diffusion layer horizontally extending beyond a region in which a gate bird's beak6is produced due to thermal oxidation treatment or the like performed after the body layer2is formed. In the DMOS1, the source layer4is formed to have its stable thickness and shape in the source forming regulation layer5without being little affected by the gate bird's beak6having high irregularity of its thickness and shape. In the DMOS1, this configuration allows stable channel length C to be formed between the body layer2and the source forming regulation layer5, which may result in reduction of irregularity of a characteristic and increase of a yield of the DMOS1.

In the DMOS1, a buried diffusion layer8is formed in a p− type silicon substrate7by implanting ions of an n+ type impurity element into a predetermined region of a main surface of the silicon substrate7using an ion implanter so as to diffuse the ions of the impurity element into the silicon substrate7. In the DMOS1, an n− type epitaxial growth layer9is formed over the silicon substrate7and the buried diffusion layer8using, for example, an epitaxial growth apparatus. In the DMOS1, a thick isolation oxide layer (LOCOS oxide layer)10is formed on the epitaxial growth layer9using a LOCOS method.

In the DMOS1, the isolation oxide layer10forms a first ion implantation opening11and a second ion implantation opening12to be formed therein with a drain layer14. In the DMOS1, the first ion implantation opening11is also used as an ion implantation opening for forming a back gate layer to be formed in the body layer2.

By subjecting the DMOS1to thermal oxidation treatment, a gate oxide film15serving as an insulating film is formed in a gate region. In the DMOS1, a gate16extending over a portion of the isolation oxide layer10to divide the first ion implantation opening11and the second ion implantation opening12is formed on the gate oxide film15.

In the DMOS1, the body layer2is formed by implanting ions of a p type impurity element from the first ion implantation opening11into the epitaxial growth layer9using an ion implanter so as to diffuse the implanted ions of the p type impurity element into the epitaxial growth layer9to predetermined width and depth. In the DMOS1, with the first ion implantation opening11being masked to be opened on a surface of the formed body layer2in a predetermined range, the source forming regulation layer5is diffusively formed in the body layer2by implanting ions of an n type impurity element into the body layer2using an ion implanter.

In the DMOS1, the back gate layer3adjacent to the source forming regulation layer5is diffusively formed in the body layer2by implanting ions of a p type impurity element using an ion implanter with the first ion implantation opening11being masked. Likewise, in the DMOS1, the source layer4is diffusively formed in the source forming regulation layer5by implanting ions of an n type impurity element using the ion implanter with the first ion implantation opening11being masked.

In the DMOS1, a drift layer13is formed by implanting ions of an n type impurity element into a specified region using an ion implanter so as to diffuse the implanted ions of the n type impurity element into the epitaxial growth layer9to predetermined width and depth. In the DMOS1, a thin drain layer14is diffusively formed in a region defined by the isolation oxide film10of the drift layer13, as shown inFIG. 1, by implanting ions of an n type impurity element from the second ion implantation opening12into the drift layer13.

The DMOS1is subjected to thermal oxidation treatment for crystal stabilization and insulation maintenance while forming the source layer4, the back gate layer3and so on after forming the body layer2. In the DMOS1, as the gate oxide film15is affected by the thermal oxidation treatment carried out in the post-process, the gate bird's beak6unstable in its thickness and shape is produced at an end of the gate16. In the DMOS1, since the source layer4formed in self-alignment with the gate16is formed in the source forming regulation layer5formed in the body layer2in advance, as described above, the source layer4is formed to have stable thickness and shape without being affected by the gate bird's beak6.

The source forming regulation layer5is shallower than the body layer2, as shown inFIGS. 1 and 2, and is formed as a diffusion layer horizontally extending beyond a producing region of the gate bird's beak6with respect to an end of the gate16by a process of implanting ions of an impurity element, which will be described later. Although the source forming regulation layer5is formed by diffusing the ions of the impurity element implanted from the first ion implantation opening11from the end of the gate16into a region under the end of the gate16, the source forming regulation layer5is diffusively formed to meet a condition of 1.25A≈Xj<T, where A is the amount of spreading of the source forming regulation layer5, Xj is the amount of depth of diffusion of the source forming regulation layer5into the body layer2, and T is thickness of the body layer2.

In the DMOS1, after the source forming regulation layer5is formed in the body layer2in advance and then is subjected to a predetermined process, as described above, the source layer4is formed in the body layer2with the source layer4regulated by the source forming regulation layer5. Accordingly, in the DMOS1, the source layer4is formed to have stable thickness and shape without being affected by the gate bird's beak6produced at the end of the gate16. In the DMOS1, since channel length based on a difference in a surface portion between the diffusion depth of the body layer2and the diffusion depth of the source forming regulation layer5is maintained with high precision, it is possible to achieve reduction of irregularity of a characteristic and increase of a yield of the DMOS1.

A process of manufacturing the above-described DMOS1has substantially the same basic steps as the conventional DMOS100, mainly including a buried diffusing layer forming step, an epitaxial growth layer and pad silicon oxide film forming step, a silicon nitride film forming step, a silicon nitride patterning step and an isolation oxide layer forming step, and forms the first ion implantation opening11and the second ion implantation opening12.

The process of manufacturing the DMOS1further includes a gate oxide film forming step, a gate forming step, a body layer forming step, a drift layer forming step and an oxide film forming step. The process of manufacturing the DMOS1manufactures the DMOS1by performing a source layer forming step, a drain layer forming step, a gate conducting step and so on after performing a characteristic source forming regulation layer forming step as a step subsequent to the body layer forming step. In addition, in the process of manufacturing the DMOS1, although the DMOS1may be manufactured through various conventional steps without being limited to the above-mentioned steps, the source forming regulation layer forming step is carried out as a step previous to the source layer forming step.

The buried diffusion layer forming step forms an opening in a silicon oxide film through a photolithographic method including a series of processes such as, for example, forming a photoresist layer, forming an opening (or removing a portion other than the opening) by sensitizing (or exposing, the same as above) a predetermined region, etching a silicon oxide film in an opening, etc. The buried diffusion layer forming step forms the buried diffusion layer8by implanting ions of an n type impurity element from an opening into the silicon substrate7using an ion implanter with the silicon oxide film as a mask film to bury and diffuse the ions into the silicon substrate7.

In the process of manufacturing the DMOS1, the epitaxial growth layer and pad silicon oxide film forming step includes a step of removing a silicon oxide film remaining on the silicon substrate7, a step of forming the epitaxial growth layer9, a step of forming a pad oxide film18, etc. The epitaxial growth layer and pad silicon oxide film forming step forms an n type epitaxial growth layer9on the silicon substrate7and the buried diffusion layer8using an epitaxial grower with the silicon oxide film, which remains on a main surface of the silicon substrate7, removed by an etching process or the like. The epitaxial growth layer and pad silicon oxide film forming step forms the n type epitaxial growth layer9at thickness of 10 nm to 50 nm or so.

In the process of manufacturing the DMOS1, the silicon nitride forming step forms a silicon nitride film, which is an oxidation resistant film, on the pad oxide film18. The silicon nitride forming step forms a silicon oxide film having predetermined thickness using, for example, an LPCVD (Low Pressure Chemical Vapor Deposition) method in which nitrogen gas is supplied on the epitaxial growth layer9via the pad oxide film18under a decompressed condition.

In the process of manufacturing the DMOS1, the silicon nitride film patterning step including the above-mentioned photolithographic method performs a patterning to remove the silicon nitride film from the pad oxide film18, leaving corresponding portions of the first ion implantation opening11and the second ion implantation opening12, which oppose the buried diffusion layer8.

In the process of manufacturing the DMOS1, the isolation oxide layer forming step forms the isolation oxide layer10having predetermined thickness. The isolation oxide layer forming step selectively forms the isolation oxide film10having thickness of 500 nm to 1000 nm or so using a nitrogen combustion oxidation method under a high-temperature circumstance of 1000° C., for example, while suppressing the corresponding portions of the first ion implantation opening11and the second ion implantation opening12with the silicon nitride film, from which a photoresist layer is removed, as an oxidation resistant film. The isolation oxide layer forming step forms the thick isolation oxide layer10formed therein with the first ion implantation opening11and the second ion implantation opening12by removing the silicon nitride film12left on a main surface using, for example, a dry etching process.

In the process of manufacturing the DMOS1, the gate oxide film forming step forms the gate oxide film15by coating an opening of the isolation oxide layer10. The gate oxide film forming step removes a resist layer from the isolation oxide layer10and then forms the gate oxide film15having optimized thickness on the opening using an HCI oxidation method or the like to oxidize the isolation oxide layer10in dry oxygen of a hydrogen chloride (HCI)-containing atmosphere, for example.

In the process of manufacturing the DMOS1, the gate forming step forms the gate16on the gate oxide film15, detail of which is omitted. The gate forming step forms the gate16on the gate oxide film15, extending over a portion of the first ion implantation opening11and a portion of the isolation oxide layer10to divide the first ion implantation opening11and the second ion implantation opening12through processes such as depositing polycrystalline silicon, making resistance small, photographic processing and so on, detail of which is omitted (seeFIG. 4).

In the process of manufacturing the DMOS1, the body layer forming step forms the body layer2by implanting ions of an impurity element from the first ion implantation opening11. The body layer forming step implants ions of a p type impurity element from the first ion implantation opening11using an ion implanter in self-alignment of the gate16with the isolation oxide layer10. The body layer forming step forms the body layer2as a diffusion layer which has predetermined diffusion depth (layer thickness T) and horizontally extends over a region under an end of the gate16to a region under the end of the gate16as implanted ions of an impurity element are diffused into the epitaxial growth layer7to predetermined width and depth.

In the process of manufacturing the DMOS1, the drift layer forming step forms the drift layer13by implanting ions of an impurity element into a specified region. The drift layer forming step implants ions of an n type impurity element into the specified region using an ion implanter. The drift layer forming step forms the drift layer13by diffusing the implanted ions of the impurity element into the epitaxial growth layer9to predetermined and width and depth (seeFIG. 5).

In the process of manufacturing the DMOS1, subsequently to the above-described body layer forming step and the drift layer forming step, the oxide film forming step performs thermal oxidation treatment for crystallization recovery or the like. In the process of manufacturing the DMOS1, as the gate oxide film15is affected by the oxide film forming step, there occurs the gate bird's beak6having its changed thickness and shape and large irregularity in a region extending from the end of the gate16to a layer under the end of the gate16.

In the process of manufacturing the DMOS1, the source forming regulation layer forming step forms the source forming regulation layer5for forming a stable source layer4in the body layer2. The source forming regulation layer forming step forms a resist layer19, performs a photolithographic process for the resist layer19to form an opening20by exposing a corresponding portion of the body layer2, and forms the source forming regulation layer5having thickness smaller than the thickness T of the body layer2in the body layer2by implanting ions of an n type impurity element from the opening20into the body layer2, as indicated by an arrow (seeFIG. 6).

The source forming regulation layer forming step forms the opening20such that an opening edge of the opening20has substantially the same plane as or becomes larger than the end of the gate16, and implants ions of an impurity element in self-alignment of the gate16. The source forming regulation layer forming step is controlled such that the implanted ions of the impurity element are diffused to horizontally spread by a spreading amount A beyond the gate bird's beak with respect to the end of the gate16. The source forming regulation layer forming step controls horizontal spreading diffusion by, for example, adjusting diffusion concentration of the ions of the impurity element or adjusting annealing time. In addition, the source forming regulation layer forming step implants the ions of the impurity element to meet the condition of 1.25A≈Xj<T, where A is the horizontal spreading amount and Xj is the amount of depth of diffusion in the body layer2, as described above.

In the source forming regulation layer forming step, the source forming regulation layer5may be formed by diffusing the ions of the impurity element such that the ions horizontally spread beyond the region in which the gate bird's beak6is produced with respect to the end of the gate16, using other suitable methods without being limited to the implantation of ions of the impurity element according to the above-described control condition. The source forming regulation layer forming step may form the source forming regulation layer5by diffusing the ions of the impurity element such that the ions horizontally spread beyond the region in which the gate bird's beak6, using a so-called oblique implantation method to obliquely implant the ions of the impurity element toward the end of the gate16, for example, as indicated by an arrow inFIG. 7.

In the process of manufacturing the DMOS1, through a step of removing the resist layer19to form the source forming regulation layer5and a step of recovery thermal oxidation treatment of the oxide film17, the source layer forming step is performed to form the source layer4in the source forming regulation layer5. The source layer forming step forms a resist layer on the source forming regulation layer5, performs a photolithographic process for the resist layer to form an opening by exposing a corresponding portion of the source forming regulation layer5, and forms the source layer4in a forming region regulated by the source forming regulation layer5by implanting ions of an n type impurity element from the opening into the body layer2.

In the process of manufacturing the DMOS1, at the same time of the above-described source layer forming step or separately, the drain layer forming step is performed to form the drain layer14in the drift layer13. The drain layer forming step forms the drain layer14shallower than the drift layer13by implanting ions of an n type impurity element from the second ion implantation opening12into the drift layer13in self-alignment of the isolation oxide layer10.

In the process of manufacturing the DMOS1, between the above-described body layer forming step and the above-described source layer forming step, the source forming regulation layer forming step is performed to form the source forming regulation layer5which is a diffusion layer horizontally further extending beyond the region in which the gate bird's beak6having irregularity in its thickness and shape extends from the end of the gate16to a layer under the end of the gate16by thermal oxidation treatment or the like carried out after the gate oxide film15is formed. In the process of manufacturing the DMOS1, as the source layer4is formed to have a stable shape in a range of the beforehand-formed source forming regulation layer5without being affected by irregularity of thickness and shape of the gate bird's beak6, the DMOS1can be manufactured with reduction of irregularity of a characteristic and increase of a yield of the DMOS1.

According to exemplary embodiments of the present invention, the source layer can be formed to have a stable shape without being affected by irregularity of thickness and shape of the gate bird's beak, which may result in reduction of irregularity of a characteristic and increase of a yield of the DMOS type semiconductor device.