IDENTIFYING SWITCHING PATHS FOR PORTS OF CROSSPOINT SWITCH

A method includes identifying a switching path for source ports and destination ports of a crosspoint based switch including a two-tiered spine-and-leaf architecture. The method includes determining whether a switching path for a connection between a source port and a destination port is available, and identifying whether the source port and the destination port are associated with a same leaf. In response to determining that the switching path is available, the method includes executing a connection between the source port and the destination port utilizing a switching path on the same leaf. In response to determining that the switching path is unavailable, the method includes identifying whether free connections are available between a source leaf and a spine and a destination leaf and the spine. When the free connections are unavailable, the switching path for the connection between the source port and the destination port is executable by rewiring.

TECHNICAL FIELD

This disclosure relates generally to a crosspoint based switch, and, more specifically, to identifying a switching path for source ports and destination ports of a crosspoint based switch.

BACKGROUND

Generally, in devices including two-tier Clos architectures, each lower-tier crosspoint (leaf layer) may be connected to each top-tier crosspoint (spine layer) in a full-mesh topology. The leaf layer may be connected to the front panel ports and the spine layer may be utilized to interconnect leaf layers. For example, each leaf crosspoint may have provision for one or more connections to each spine crosspoint in the architecture. In some examples, connection paths may be selected, such that leaf layer ports may be connected to each other. In such an architecture, for example, where a path between two leaf crosspoints is not available, an alternate spine crosspoint may be utilized. Various other techniques of enhancing two-tier Clos architectures may also be performed. However, many of the foregoing examples may lead to undesirable network disruptions.

DESCRIPTION OF EXAMPLE EMBODIMENTS

Overview

The present embodiments are directed to techniques for identifying a switching path for one or more source ports and destination ports of a crosspoint based switch including a two-tiered spine-and-leaf architecture. In particular embodiments, a computing system may determine whether a switching path for a potential connection between a source port and a destination port is available. For example, in particular embodiments, the computing system may determine whether the switching path for the potential connection between the source port and the destination port is available by identifying whether the source port and the destination port is associated with a same leaf. In particular embodiments, when the source port and the destination port are associated with the same leaf, the computing system may determine that the switching path for the potential connection between the source port and the destination port is executable without utilizing a spine. In particular embodiments, when the source port and the destination port are not associated with the same leaf, the computing system may determine the switching path for the potential connection between the source port and the destination port is executable by utilizing a spine.

In particular embodiments, in response to determining that the switching path for the potential connection between the source port and the destination port is available, the computing system may execute a connection between the source port and the destination port utilizing a switching path on the same leaf. In particular embodiments, in response to determining that the switching path for the potential connection between the source port and the destination port is unavailable, the computing system may then identify whether one or more free connections are available between 1) a source leaf and a spine and 2) a destination leaf and the spine.

In particular embodiments, when the one or more free connections are available, the computing system may determine that the switching path for the potential connection between the source port and the destination port is executable without disruption to existing connections. In particular embodiments, when the one or more free connections are unavailable, the computing system may determine that the switching path for the potential connection between the source port and the destination port is executable by rewiring one or more of the existing connections. In particular embodiments, one or more of the existing connections may be rewired so as to minimize disruption to the existing connections.

In particular embodiments, in response to determining that the switching path for the potential connection between the source port and the destination port is unavailable, the computing system may execute a connection between the source port and the destination port utilizing a switching path based on the one or more free connections. In particular embodiments, in response to determining that the switching path for the potential connection between the source port and the destination port is unavailable, executing a connection between the source port and the destination port utilizing a switching path based on the rewiring of one or more of the existing connections. In particular embodiments, the potential connection between the source port and the destination port may include a unicast connection. In particular embodiments, the potential connection between the source port and the destination port may include a multicast connection.

In particular embodiments, the destination port may include a first destination port. In particular embodiments, when the first destination port and a second destination port are associated with a same leaf, the computing system may execute the connection between the source port and the destination port by duplicating the switching path on the same leaf. In particular embodiments, when the first destination port and the second destination port are each associated with a different leaf, the computing system may execute the connection between the source port and the destination port by duplicating the switching path on a same spine. In particular embodiments, when at least one of the duplication of the switching path on the same leaf or the duplication of the switching path on the same spine is unavailable, the computing system may execute the connection between the source port and the destination port utilizing a number of spines. In particular embodiments, the rewiring of one or more of the existing connections may include a source port to a spine rewiring. In particular embodiments, the rewiring of one or more of the existing connections may include a spine to destination port rewiring. In particular embodiments, the rewiring of one or more of the existing connections comprises 1) a source port to a spine rewiring and 2) a spine to destination port rewiring.

Technical advantages of particular embodiments of this disclosure may include one or more of the following. Certain systems and methods described herein may provide a graduated or stepped connection path determination in which an L1 crosspoint based switch having a spine-and-leaf architecture attempts to identify a switching path in which: 1) no spine crosspoint is utilized when the potential connection includes a source port and a destination port on the same leaf crosspoint, 2) only free connections between the leaf crosspoint and spine crosspoint are utilized when available, and 3) rewiring is performed with in an ordered sequence of: (a) perform a source to spine rewiring, (b) perform a spine to destination rewiring. (c) perform a source to spine rewiring along with a spine to destination rewiring. (d) perform a source to destination swapping, and (c) apply multicast optimization and restart the ordered sequence. In this way, the ordered rewiring sequence may ensure that the least possible disruption is always achieved in cases of rewiring.

Example Embodiments

FIG.1illustrates an example layer-1 (L1) crosspoint device100, in accordance with the presently disclosed embodiments. In particular embodiments, the L1 crosspoint device100may include switching device circuitry suitable for handling for any number of data streams, clock sources, and communication protocols. As depicted, in particular embodiments, the L1 crosspoint device100may include a number of input ports102, and a corresponding number of output ports104. For example, in particular embodiments, the input ports102and the output ports104of the L1 crosspoint device100may be constructed, such that it will create a path between the2ports to create a path.

In particular embodiments, as described herein, the L1 crosspoint device100may be electrically designed and constructed utilizing one or more crosspoint processing devices. For example, when a crosspoint processing device is available with the suitable processing speed and port density for a particular application, only one crosspoint processing device may be utilized to construct the L1 crosspoint device100, for example. However, in other examples in which a crosspoint processing device is unavailable with the suitable processing speed and port density for the particular application, a number of crosspoint processing devices may be utilized to construct the L1 crosspoint device100, for example, by way of a two-tiered spine-and-leaf architecture to provide suitable processing speed and port density. For example, as will be further illustrated below with toFIGS.2A and2B, the number of crosspoint processing devices utilized to construct the L1 crosspoint device100may be arranged into a combination of a number of leaf crosspoint devices and a number of spine crosspoint devices.

In particular embodiments, in the example in which a number of crosspoint processing devices is utilized to construct the L1 crosspoint device100, for example, by way of a two-tiered spine-and-leaf architecture, switching path for inputs and output may be determined utilizing spine crosspoints and leaf crosspoints. In particular embodiments, whether a particular switching path for a potential connection is available may be determined based on, for example, a number of leaf crosspoints available in the two-tiered spine-and-leaf architecture, a number of spine crosspoints available in the two-tiered spine-and-leaf architecture, the existing connections within the two-tiered spine-and-leaf architecture, and the source ports and the destination ports involved in the potential connection.

For example, in particular embodiments, when a switching path is not available, one or more existing connections may have to be rewired or reconfigured to make way for the potential connection. As it may be appreciated, any such reconfiguration or rewiring of any existing connection may lead to undesirable disruption to the network. Thus, in accordance with the presently disclosed embodiments, it may be useful to identify a switching path for one or more source ports and destination ports of a crosspoint based switch including a two-tiered spine-and-leaf architecture so as to minimize disruption to any existing connections.

FIG.2Aillustrates an example layer-1 (L1) crosspoint based switch including a two-tiered spine-and-leaf architecture200A, in accordance with the presently disclosed embodiments. In particular embodiments, the L1 crosspoint based switch spine-and-leaf architecture200A may include a Clos architecture, in which each of a number of leaf crosspoints may be connected to each of a number of spine crosspoints. For example, as depicted byFIG.2A, the L1 crosspoint based switch spine-and-leaf architecture200A may include an input layer of leaf crosspoints202A,202B,202C,202D,202E, and202F (e.g., “CP0”, “CP1”, “CP2”, “CP3” “CP4”, and “CP5”) and an output layer of leaf crosspoints202G,202H,202I,202J,202K, and202L (e.g., “CP6”, “CP7”, “CP8”, “CP9”, “CP10”, and “CP11”).

In particular embodiments, as further depicted byFIG.2A, the L1 crosspoint based switch spine-and-leaf architecture200A may also include a layer of spine crosspoints204A,204B,204C, and204D (e.g., “CP17”, “CP18”, “CP19”, and “CP20”), in which each destination port of each leaf crosspoint of the input layer of leaf crosspoints202A,202B,202C,202D,202E, and202F (e.g., “CP0”, “CP1”, “CP2”, “CP3” “CP4”, and “CP5”) may be connected (e.g., as inputs) to a respective source port of each spine crosspoint of the layer of spine crosspoints204A,204B,204C, and204D (e.g., “CP17”, “CP18”, “CP19”, and “CP20”). Similarly, each destination port of each spine crosspoint of the layer of spine crosspoints204A,204B,204C, and204D (e.g., “CP17”, “CP18”, “CP19”, and “CP20”) may be further connected (e.g., as outputs) to a respective source port of each leaf crosspoint of the output layer of leaf crosspoints202G,202H,202I,202J,202K, and202L (e.g., “CP6”, “CP7”, “CP8”, “CP9”, “CP10”, and “CP11”).

FIG.2Billustrates a running example for identifying a switching path for one or more source ports and destination ports of a L1 crosspoint based switch including a two-tiered spine-and-leaf architecture200B, in accordance with the presently disclosed embodiments. Specifically,FIG.2Billustrates a running example of the operation of the L1 crosspoint based switch spine-and-leaf architecture200B, for example, when a switching path for a potential connection (e.g., a new connection as opposed to an existing connection) is available and/or unavailable. For example, as described herein, the present embodiments include a switching sequence to identify a switching path for one or more source ports and destination ports of the L1 crosspoint based switch spine-and-leaf architecture200B so as to minimize any disruption to existing connections.

In other words, the present embodiments provide a graduated or stepped switching sequence in which the L1 crosspoint based switch spine-and-leaf architecture200B attempts to identify a switching path in which: 1) no spine crosspoint204A,204B,204C, and204D (e.g., “CP17”, “CP18”, “CP19”, and “CP20”) is utilized when the potential connection includes a source port and a destination port on the same leaf crosspoint202A,202B,202C,202D.202E (e.g., “CP0”, “CP1”, “CP2”, “CP3” “CP4”, and “CP5”), for example, 2) only free connections between the leaf crosspoints202A,202B,202C,202D,202E (e.g., “CP0”, “CP1”, “CP2”, “CP3” “CP4”, and “CP5”) and spine crosspoints204A,204B,204C, and204D (e.g., “CP17”, “CP18”, “CP19”, and “CP20”) when available, and 3) a reconfiguration or rewiring is executed with respect to one or more of the crosspoints of the input layer of leaf crosspoints202A,202B,202C,202D,202E, and202F (e.g., “CP0”, “CP1”, “CP2”, “CP3” “CP4”, and “CP5”), the output layer of leaf crosspoints202G,202H,202I,202J,202K, and202L (e.g., “CP6”, “CP7”, “CP8”, “CP9”, “CP10”, and “CP11”), and the layer of spine crosspoints204A,204B,204C, and204D (e.g., “CP17”, “CP18”, “CP19”, and “CP20”).

In this way, the present embodiments may provide a graduated or stepped connection path determination in which an L1 crosspoint based switch having a spine-and-leaf architecture attempts to identify a switching path in which: 1) no spine crosspoint is utilized when the potential connection includes a source port and a destination port on the same leaf crosspoint, 2) only free connections between the leaf crosspoint and spine crosspoint are utilized when available, and 3) rewiring is performed with in an ordered sequence of: (a) perform a source to spine rewiring, (b) perform a spine to destination rewiring, (c) perform a source to spine rewiring along with a spine to destination rewiring. (d) perform a source to destination swapping, and (c) apply multicast optimization and restart the ordered rewiring sequence. Thus, the ordered rewiring sequence may ensure that the least possible disruption is always achieved in cases of rewiring an L1 crosspoint based switch having a spine-and-leaf architecture.

For example, referring toFIG.2B, for a connection from port “0” to port “24,” available spine crosspoint CP17is automatically selected as the first available spine crosspoint and subsequent paths are created to achieve the switching path206for the connection from port “0” to port “24.” Similarly, for a connection from port “2” to port “33,” available spine crosspoint CP19is automatically selected as the first available spine crosspoint and subsequent paths are created to achieve the switching path208for the connection from port “2” to port “33.” As further depicted, for a connection from port “3” to port “33,” available spine crosspoint CP19is automatically selected as the first available spine crosspoint and subsequent paths are created to achieve the switching path210for the connection from port “3” to port “34.”

In particular embodiments, for a new connection (e.g., a not using an existing connection) from port “5” to port “35,” a reconfiguration or rewiring may be performed for an existing connection from port “4” to port “28” to make way for the new connection from port “5” to port “35.” For example, available spine crosspoint CP18(e.g., rewired from CP17) is automatically selected as an alternate available spine crosspoint and subsequent paths are created to achieve the switching path212for the new connection from port “4” to port “28.” As further depicted, then for the connection from port “5” to port “35,” available spine crosspoint CP17(e.g., available to due to the rewiring to CP18for the connection from port “4” to port “28) is automatically selected as the first available spine crosspoint and subsequent paths are created to achieve the switching path214for the connection from port “5” to port “35.”

FIG.3Aillustrates is a flow diagram of a method300A for identifying a switching path for one or more source ports and destination ports of a crosspoint based switch including a two-tiered spine-and-leaf architecture so as to minimize disruption to existing connections, in accordance with the presently disclosed embodiments. The method300A may be performed utilizing one or more processors that may include hardware (e.g., a general purpose processor, a graphic processing units (GPU), an application-specific integrated circuit (ASIC), a system-on-chip (SoC), a microcontroller, a field-programmable gate array (FPGA), or any other processing device(s) that may be suitable for processing various data), software (e.g., instructions running/executing on one or more processors), firmware (e.g., microcode), or any combination thereof.

The method300A may begin at block302with a computing system determining whether a switching path for a potential connection between a source port and destination port is available. In some examples, the potential connection between the source port and the destination port may include a unicast connection. In other examples, the potential connection between the source port and the destination port may include a multicast connection. The method300A may continue at block304with the computing system identifying whether the source port and the destination port are associated with a same leaf. For example, in particular embodiments, when the source port and the destination port is associated with the same leaf, the switching path for the potential connection between the source port and the destination port may be executable without utilizing a spine. In particular embodiments, when the source port and the destination port are not associated with the same leaf, the switching path for the potential connection between the source port and the destination port may not be executable without utilizing a spine.

The method300A may continue at block306with the computing system, in response to determining that the switching path for the potential connection between the source port and the destination port is available, executing a connection between the source port and the destination port utilizing a switching path on the same leaf. The method300A may continue at block308with the computing system, in response to determining that the switching path for the potential connection between the source port and the destination port is unavailable, identifying whether one or more free connections are available between 1) a source leaf and a spine and 2) a destination leaf and the spine.

For example, in particular embodiments, when the one or more free connections are available, computing system may determine that the switching path for the potential connection between the source port and the destination port is executable without disruption to existing connections. In particular embodiments, when the one or more free connections are unavailable, the computing system may determine that the switching path for the potential connection between the source port and the destination port is executable by rewiring one or more of the existing connections. For example, the one or more of the existing connections may be rewired so as to create new connection with minimize disruption to the existing.

FIG.3Billustrates is a flow diagram of a method300B for performing an ordered rewiring sequence for a connection through one or more source ports and destination ports of a crosspoint based switch including a two-tiered spine-and-leaf architecture so as to minimize disruption to existing connections, in accordance with the presently disclosed embodiments. The method300B may be performed utilizing one or more processors that may include hardware (e.g., a general purpose processor, a graphic processing units (GPU), an application-specific integrated circuit (ASIC), a system-on-chip (SoC), a microcontroller, a field-programmable gate array (FPGA), or any other processing device(s) that may be suitable for processing various data), software (e.g., instructions running/executing on one or more processors), firmware (e.g., microcode), or any combination thereof.

The method300B may begin at block310with the computing system initiate an ordered rewiring sequence by performing a source to spine rewiring. For example, if there is no connection available from source leaf to the spine (e.g., spine from where there is a connection available to destination leaf), the computing system may attempt rewiring an existing connection from source leaf to another spine and checking if the new connection path becomes available. If the new connection path becomes available with rewiring, the computing system may rewire the source circuit and make the connection path available to be established. The method300B may then continue at block312with the computing system performing a spine to destination rewiring. For example, a source to spine rewiring is not possible, the computing system may then attempt to find a connection path by rewiring the connection which is designated to the destination leaf. Specifically, the computing system may attempt to swap an existing destination connection with another free spine or swapping two occupied destination connections. For example, the computing system may attempt to find a path to a spine (e.g., spine which has available link from source leaf) and to the destination leaf.

The method300B may then continue at block314with the computing system performing a source to spine rewiring along with a spine to destination rewiring. For example, when both a source to spine rewiring and a spine to destination rewiring are not possible, the computing system may then generate a list of all possible spines by utilizing both a source to spine rewiring and a spine to destination rewiring together. In particular embodiments, by utilizing a source to spine rewiring, the computing system may find all possible spines reachable from source leaf. In particular embodiments, by utilizing a spine to destination rewiring, the computing system may find all possible connections of spines from where a destination leaf will be accessible. In this way, the computing system may determine the best spines (e.g., with least possible disruptions) and rewire connections to render a path available for the new connection. The method300B may then conclude at block316by performing a source to destination swapping and applying multicast optimization. In particular embodiments, the ordered rewiring sequence may then be restarted. Thus, the ordered rewiring sequence may ensure that the least possible disruption is always achieved in cases of rewiring an L1 crosspoint based switch having a spine-and-leaf architecture.

FIGS.3C-3Fillustrate respective flow diagrams of methods300C,300D,300E, and300F for performing the foregoing various techniques for identifying a switching path for one or more source ports and destination ports of a crosspoint based switch including a two-tiered spine-and-leaf architecture, in accordance with the presently disclosed embodiments. The methods300C,300D,300E, and300F may be performed utilizing one or more processors that may include hardware (e.g., a general purpose processor, a graphic processing units (GPU), an application-specific integrated circuit (ASIC), a system-on-chip (SoC), a microcontroller, a field-programmable gate array (FPGA), or any other processing device(s) that may be suitable for processing various data), software (e.g., instructions running/executing on one or more processors), firmware (e.g., microcode), or any combination thereof.

In particular embodiments, the method300C may begin at decision318with a computing system determining if a connection is possible without rewiring. If the connection is possible without rewiring, the method300C may continue at block320with a computing system performing the method300D as discussed below with respect toFIG.3D. If the connection is not possible without rewiring, the method300C may then continue at decision322with a computing system determining if a connection is possible with rewiring. If the connection is possible with rewiring, the method300C may continue at block324with a computing system performing the method300E as discussed below with respect toFIG.3E. If the connection is not possible with rewiring, the method300C may continue at block326with a computing system determining that the connection is not possible.

In particular embodiments, the method300D may begin at block328with a computing system determining to create a new connection. The method300D may continue at decision330with a computing system determining whether the new connection includes a unicast connection or multicast connection. In particular embodiments, in accordance with a determination that the new connection includes a unicast connection, the method300D may continue at decision332with a computing system determining whether source and destination are on the same leaf. If the source and destination are on the same leaf, the method300D may continue at block334with a computing system creating a new connection. If the source and destination are not on the same leaf, the method300D may continue at block336with a computing system locating the least loaded spine and creating a connection. The method300D may continue at decision338with a computing system determining whether the connection is successful. If the connection is successful, then the unicast connection is created and completed (at block334). If the connection is not successful, the method300D may continue at block338with a computing system performing the method300E as discussed below with respect toFIG.3E.

In particular embodiments, the method300D may begin at block328with a computing system determining to create a new connection. The method300D may continue at decision330with a computing system determining whether the new connection includes a unicast connection or multicast connection. In particular embodiments, in accordance with a determination that the new connection includes a unicast connection, the method300D may continue at decision332with a computing system determining whether source and destination are on the same leaf. If the source and destination are on the same leaf, the method300D may continue at block334with a computing system creating a new connection. If the source and destination are not on the same leaf, the method300D may continue at block336with a computing system locating the least loaded spine and creating a connection. The method300D may continue at decision338with a computing system determining whether the connection is successful. If the connection is successful, then the unicast connection is created and completed (at block334). If the connection is not successful, the method300D may continue at block338with a computing system performing the method300E as discussed below with respect toFIG.3E.

In particular embodiments, in accordance with a determination that the new connection includes a multicast connection, the method300D may continue at decision342with a computing system determining whether a connection is possible by duplicating a connection a destination leaf. In particular embodiments, for a new multicast connection request, new wiring is executed based on rules in accordance ordered sequence which induces the least number of new wirings. For example, in accordance with the present embodiments, the computing system may create a connection according to an ordered sequence in which the computing system adds a minimum number of new connections, and, only if that is not possible, the computing system may proceed with a rewiring that may utilize a greater number of ports. In particular embodiments, in response to determining that a connection is possible by duplicating a connection at a destination leaf, the method300D may continue at block344with a computing system duplicating a connection at a destination leaf.

In particular embodiments, in response to determining that a connection is not possible by duplicating a connection at a destination leaf (e.g., destination port of the new multicast connection request is on a different leaf), the method300D may continue at decision346with a computing system determining whether a connection is possible by duplicating a connection at a spine. If a connection is possible by duplicating a connection at a spine, the method300D may continue at block348with a computing system duplicating a connection at a spine. In particular embodiments, if a connection is not possible by duplicating a connection at a spine, the method300D may continue at decision350with a computing system determining whether a connection is possible by duplicating a connection at a source leaf. If connection is possible by duplicating a connection at a source leaf, the method300D may continue at block352with a computing system duplicating a connection at a source leaf. In particular embodiments, if connection is not possible by duplicating a connection at a source leaf, the method300D may continue at decision354with a computing system invoking a rewiring to create a connection and performing method300E as discussed below with respect toFIG.3E. In another embodiment, one or more of the process steps at blocks344,348, and352may be attempted one or more times.

In particular embodiments, the method300E may begin at block356with a computing system starting a rewiring process. The method300E may continue at block358with a computing system applying a source to spine rewiring in accordance with the method300F as discussed below with respect toFIG.3F. For example, in applying a source to spine rewiring, the computing system may select a new spine for an existing connection, such that the new spine may have a route to a destination leaf of a previous connection. In particular embodiments, the computing system may also create a free spine where a new source port may connect to the suitable destination port. In one embodiment, a spine for the source leaf may change where the new source port is requested. In particular embodiments, the method300E may continue at decision360with a computing system determining whether an alternative connection path is found. If an alternative connection path is found, the method300E may continue at block362with a computing system determining that an alternative connection path is found. If an alternative connection path is not found, the method300E may continue at block364with a computing system applying a spine to destination rewiring in accordance with the method300F as discussed below with respect toFIG.3F.

In particular embodiments, in applying a spine to destination rewiring, the computing system may select a new spine for an existing connection, such that a new spine may have a route to the source leaf of a previous connection. In particular embodiments, the computing system may also create a free spine where a new source port may connect to the suitable destination port. In one embodiment, a spine for a destination leaf may change where a new destination port is requested. In particular embodiments, the method300E may continue at decision366with a computing system determining whether an alternative connection path is found. If an alternative connection path is found, the method300E may continue at block362with a computing system determining that an alternative connection path is found.

If an alternative connection path is not found, the method300E may continue at block368applying a source to spine rewiring along with a spine to destination rewiring in accordance with method300F as discussed below with respect toFIG.3F. In particular embodiments, in applying a source to spine rewiring along with a spine to destination rewiring, the computing system may combine a source to spine rewiring (at block358) and a spine to destination rewiring (at block364). In particular embodiments, the computing system may select a new spine, which may have a route to both source and destination. In particular embodiments, the computing system may change wiring for both source and destination.

The method300E may continue at decision370with a computing system determining whether an alternative connection path is found. If an alternative connection path is found, the method300E may continue at block362with a computing system determining that an alternative connection path is found. If an alternative connection path is not found, the method300E may continue at block372applying a source destination swapping in accordance with method300F as discussed below with respect toFIG.3F. In particular embodiments, there may be a situation where a common spine is not found, and, thus the computing system may attempt to swap a spine used by ports from a source leaf and ports from a destination leaf. The method300E may continue at decision374with a computing system determining whether an alternative connection path is found.

If an alternative connection path is found, the method300E may continue at block362with a computing system determining that an alternative connection path is found. If an alternative connection path is not found, the method300E may continue at decision376with a computing system determining whether multicast is optimized. If multicast is optimized, the method300E may continue at block378with a computing system determining that no connection path is found. If multicast is not optimized, the method300E may continue at block380with a computing system applying a multicast optimization in accordance with method300F as discussed below with respect toFIG.3F. In particular embodiments, in applying multicast optimized, the computing system may apply for multicast optimization, which may include recreating all multicast connections, such that the process utilizes minimal resources.

FIG.4illustrates an example computer system400that may be useful in performing one or more of the foregoing techniques as presently disclosed herein. In particular embodiments, one or more computer systems400perform one or more steps of one or more methods described or illustrated herein. In particular embodiments, one or more computer systems400provide functionality described or illustrated herein. In particular embodiments, software running on one or more computer systems400performs one or more steps of one or more methods described or illustrated herein or provides functionality described or illustrated herein. Particular embodiments include one or more portions of one or more computer systems400. Herein, reference to a computer system may encompass a computing device, and vice versa, where appropriate. Moreover, reference to a computer system may encompass one or more computer systems, where appropriate.

As an example, and not by way of limitation, one or more computer systems400may perform in real time or in batch mode one or more steps of one or more methods described or illustrated herein. One or more computer systems400may perform at different times or at different locations one or more steps of one or more methods described or illustrated herein, where appropriate. In particular embodiments, computer system400includes a processor402, memory404, storage406, an input/output (I/O) interface408, a communication interface410, and a bus412. Although this disclosure describes and illustrates a particular computer system having a particular number of particular components in a particular arrangement, this disclosure contemplates any suitable computer system having any suitable number of any suitable components in any suitable arrangement.

In particular embodiments, processor402includes hardware for executing instructions, such as those making up a computer program. As an example, and not by way of limitation, to execute instructions, processor402may retrieve (or fetch) the instructions from an internal register, an internal cache, memory404, or storage406; decode and execute them; and then write one or more results to an internal register, an internal cache, memory404, or storage406. In particular embodiments, processor402may include one or more internal caches for data, instructions, or addresses. This disclosure contemplates processor402including any suitable number of any suitable internal caches, where appropriate. As an example, and not by way of limitation, processor402may include one or more instruction caches, one or more data caches, and one or more translation lookaside buffers (TLBs). Instructions in the instruction caches may be copies of instructions in memory404or storage406, and the instruction caches may speed up retrieval of those instructions by processor402.

Data in the data caches may be copies of data in memory404or storage406for instructions executing at processor402to operate on; the results of previous instructions executed at processor402for access by subsequent instructions executing at processor402or for writing to memory404or storage406; or other suitable data. The data caches may speed up read or write operations by processor402. The TLBs may speed up virtual-address translation for processor402. In particular embodiments, processor402may include one or more internal registers for data, instructions, or addresses. This disclosure contemplates processor402including any suitable number of any suitable internal registers, where appropriate. Where appropriate, processor402may include one or more arithmetic logic units (ALUs); be a multi-core processor; or include one or more processors402. Although this disclosure describes and illustrates a particular processor, this disclosure contemplates any suitable processor.

In particular embodiments, memory404includes main memory for storing instructions for processor402to execute or data for processor402to operate on. As an example, and not by way of limitation, computer system400may load instructions from storage406or another source (such as, for example, another computer system400) to memory404. Processor402may then load the instructions from memory404to an internal register or internal cache. To execute the instructions, processor402may retrieve the instructions from the internal register or internal cache and decode them. During or after execution of the instructions, processor402may write one or more results (which may be intermediate or final results) to the internal register or internal cache. Processor402may then write one or more of those results to memory404. In particular embodiments, processor402executes only instructions in one or more internal registers or internal caches or in memory404(as opposed to storage406or elsewhere) and operates only on data in one or more internal registers or internal caches or in memory404(as opposed to storage406or elsewhere).

One or more memory buses (which may each include an address bus and a data bus) may couple processor402to memory404. Bus412may include one or more memory buses, as described below. In particular embodiments, one or more memory management units (MMUs) reside between processor402and memory404and facilitate accesses to memory404requested by processor402. In particular embodiments, memory404includes random access memory (RAM). This RAM may be volatile memory, where appropriate. Where appropriate, this RAM may be dynamic RAM (DRAM) or static RAM (SRAM). Moreover, where appropriate, this RAM may be single-ported or multi-ported RAM. This disclosure contemplates any suitable RAM. Memory404may include one or more memories404, where appropriate. Although this disclosure describes and illustrates particular memory, this disclosure contemplates any suitable memory.

In particular embodiments, storage406includes mass storage for data or instructions. As an example, and not by way of limitation, storage406may include a hard disk drive (HDD), a floppy disk drive, flash memory, an optical disc, a magneto-optical disc, magnetic tape, or a Universal Serial Bus (USB) drive or a combination of two or more of these. Storage406may include removable or non-removable (or fixed) media, where appropriate. Storage406may be internal or external to computer system400, where appropriate. In particular embodiments, storage406is non-volatile, solid-state memory. In particular embodiments, storage406includes read-only memory (ROM). Where appropriate, this ROM may be mask-programmed ROM, programmable ROM (PROM), erasable PROM (EPROM), electrically erasable PROM (EEPROM), electrically alterable ROM (EAROM), or flash memory or a combination of two or more of these. This disclosure contemplates mass storage406taking any suitable physical form. Storage406may include one or more storage control units facilitating communication between processor402and storage406, where appropriate. Where appropriate, storage406may include one or more storages406. Although this disclosure describes and illustrates particular storage, this disclosure contemplates any suitable storage.

In particular embodiments, I/O interface408includes hardware, software, or both, providing one or more interfaces for communication between computer system400and one or more I/O devices. Computer system400may include one or more of these I/O devices, where appropriate. One or more of these I/O devices may enable communication between a person and computer system400. As an example, and not by way of limitation, an I/O device may include a keyboard, keypad, microphone, monitor, mouse, printer, scanner, speaker, still camera, stylus, tablet, touch screen, trackball, video camera, another suitable I/O device or a combination of two or more of these. An I/O device may include one or more sensors. This disclosure contemplates any suitable I/O devices and any suitable I/O interfaces408for them. Where appropriate, I/O interface408may include one or more device or software drivers enabling processor402to drive one or more of these I/O devices. I/O interface408may include one or more I/O interfaces408, where appropriate. Although this disclosure describes and illustrates a particular I/O interface, this disclosure contemplates any suitable I/O interface.

In particular embodiments, communication interface410includes hardware, software, or both providing one or more interfaces for communication (such as, for example, packet-based communication) between computer system400and one or more other computer systems400or one or more networks. As an example, and not by way of limitation, communication interface410may include a network interface controller (NIC) or network adapter for communicating with an Ethernet or other wire-based network or a wireless NIC (WNIC) or wireless adapter for communicating with a wireless network, such as a WI-FI network. This disclosure contemplates any suitable network and any suitable communication interface410for it.