Semiconductor structure and method of forming the same

A method of forming a semiconductor structure includes following steps. A substrate is formed. The substrate has an active region, an isolation structure adjacent to the active region, and a contact on the active region. A dielectric stack is formed on the substrate. The dielectric stack is etched to form an opening such that the contact of the substrate is exposed. The opening has a bottom portion and a top portion communicated to the bottom portion. The dielectric stack is etched again to expand the bottom portion of the opening.

BACKGROUND

Technical Field

The present disclosure relates to a semiconductor structure and a method of forming the semiconductor structure.

Description of Related Art

Capacitors are used in a wide variety of semiconductor circuits. For example, the capacitors are used in DRAM (dynamic random access memory) memory circuits or any other type of memory circuit. DRAM memory circuits are manufactured by replicating millions of identical circuit elements, known as DRAM cells, on a single semiconductor wafer. A DRAM cell is an addressable location that can store one bit (binary digit) of data. In its most common form, a DRAM cell consists of two circuit components: a storage capacitor and an access field effect transistor.

The development of the semiconductor circuits is to achieve larger capacitance, and thus an opening in a dielectric stack needs a smaller width. However, a problem of under-etch may occur when etching the dielectric stack to form the opening. On the other hand, in order to avoid the problem of under-etch, the opening may be formed larger, and adversely causes the problem of short-circuit.

SUMMARY

One aspect of the present disclosure is a method of forming a semiconductor structure.

According to some embodiments of the present disclosure, a method of forming a semiconductor structure includes following steps. A substrate is formed. The substrate has an active region, an isolation structure adjacent to the active region, and a contact on the active region. A dielectric stack is formed on the substrate. The dielectric stack is etched to form an opening such that the contact of the substrate is exposed. The opening has a bottom portion and a top portion communicated to the bottom portion. The dielectric stack is etched again to expand the bottom portion of the opening.

In some embodiments, the method of forming a semiconductor structure further includes filling a conductive material in the opening to form a conductive structure.

In some embodiments, the conductive structure is in contact with the contact of the substrate.

In some embodiments, forming the dielectric stack includes forming a first oxide structure over the substrate and forming a second oxide structure over the first oxide structure.

In some embodiments, etching the dielectric stack again to expand the bottom portion of the opening includes etching the first oxide structure of the dielectric stack.

In some embodiments, forming the dielectric stack includes forming a first nitride structure over the substrate, forming a second nitride structure over the first oxide structure, and forming a third nitride structure over the second oxide structure.

In some embodiments, forming the second nitride structure over the first oxide structure is performed such that the first oxide structure is between the first nitride structure and the second nitride structure.

In some embodiments, forming the third nitride structure over the second oxide structure is performed such that the second oxide structure is between the second nitride structure and the third nitride structure.

In some embodiments, etching the dielectric stack again to expand the bottom portion of the opening includes exposing a top surface of the first nitride structure.

In some embodiments, etching the dielectric stack again to expand the bottom portion of the opening includes exposing a bottom surface of the second nitride structure.

In some embodiments, the bottom portion of the opening is surrounded by the first oxide structure and the top portion of the opening is surrounded by the second oxide structure, and etching the dielectric stack again to expand the bottom portion of the opening is performed such that a top region of the bottom portion of the opening is wider than a bottom region of the top portion of the opening.

In some embodiments, etching the dielectric stack to form the opening is performed by dry etching.

In some embodiments, the dielectric stack is etched again using an etching gas including hydrogen fluoride (HF).

In some embodiments, etching the dielectric stack again to expand the bottom portion of the opening is performed such that the expanded opening has a double inverted trapezoid profile.

Another aspect of the present disclosure is a semiconductor structure.

According to some embodiments of the present disclosure, a semiconductor structure includes a substrate, a dielectric stack, and a conductive structure. The substrate has an action region, an isolation structure adjacent to the active region, and a contact on the active region. The dielectric stack is disposed on the substrate. The conductive structure is surrounded by the dielectric stack. The conductive structure has a bottom portion and a top portion on to the bottom portion, and a top region of the bottom portion of the conductive structure is wider than a bottom region of the top portion of the conductive structure.

In some embodiments, the dielectric stack further includes a first oxide structure and a second oxide structure. The first oxide structure is disposed over the substrate. The second oxide structure is disposed over the first oxide structure.

In some embodiments, the bottom portion of the conductive structure is surrounded by the first oxide structure, and the top portion of the conductive structure is surrounded by the second oxide structure.

In some embodiments, the dielectric stack further includes a first nitride structure, a second nitride structure, and a third nitride structure. The first nitride structure is disposed over the substrate. The second nitride structure is disposed over the first nitride structure. The third nitride structure is disposed over the second nitride structure.

In some embodiments, the first oxide structure is between the first nitride structure and the second nitride structure, and the second oxide structure is between the second nitride structure and the third nitride structure.

In some embodiments, the first oxide structure and the second oxide structure are made of different materials.

In the aforementioned embodiments, since the dielectric stack is etched again to expand the bottom portion of the opening, the problems of under-etch and short-circuit can be avoided. As a result, the capacitance of the semiconductor structure can be increased and the performance of the semiconductor structure can be improved.

DETAILED DESCRIPTION

FIGS. 1 to 5are cross-sectional views of a method of forming a semiconductor structure at various stages in accordance with some embodiments of the present disclosure.

Referring toFIG. 1, a substrate110is formed. The substrate110has an active region112, an isolation structure114adjacent to the active region112, and a contact116on the active region112. In some embodiments, the active regions112may be made of silicon. The isolation structure114may be made of oxide, such as silicon oxide or other suitable material. The isolation structure114may be a shallow trench isolation (STI) structure. The contact116may be made of a conductive material, such as tungsten (W).

Referring toFIG. 2, a dielectric stack120is formed on the substrate110. The dielectric stack120includes a first oxide structure122and a second oxide structure124over the first oxide structure122. The dielectric stack120further includes a first nitride structure121over the substrate110, a second nitride structure123over the first oxide structure122, and a third nitride structure125over the second oxide structure124. In greater details, the first nitride structure121, the first oxide structure122, the second nitride structure123, the second oxide structure124, and the third nitride structure125are formed in sequence over the substrate110. In other words, forming the second nitride structure123over the first oxide structure122is performed such that the first oxide structure122is between the first nitride structure121and the second nitride structure123, and forming the third nitride structure125over the second oxide structure124is performed such that the second oxide structure124is between the second nitride structure123and the third nitride structure125. The first nitride structure121is in contact with the isolation structure114and the contact116of the substrate110. In some embodiments, the dielectric stack120is subsequently performed a planarization process, such as a chemical-mechanical polishing (CMP) process.

In some embodiments, the first nitride structure121, the second nitride structure123, and the third nitride structure125may be made of same materials. For example, the first nitride structure121, the second nitride structure123, and the third nitride structure125may be made of silicon nitride. In some embodiments, the first oxide structure122and the second oxide structure124are made of different materials. The first oxide structure122may include boron (B), phosphorus (P), or a combination thereof. For example, the first oxide structure122is made of borophosphosilicate glass (BPSG), and the second oxide structure124is made of tetraethoxysilane (TEOS).

Referring toFIG. 3, the dielectric stack120is etched to form an opening130such that the contact116of the substrate110is exposed. The opening130has a bottom portion132and the top portion134communicated to the bottom portion132. In greater details, the bottom portion132of the opening130is surrounded by the first oxide structure122and the top portion134of the opening130is surrounded by the second oxide structure124.

In some embodiments, the bottom portion132of the opening130is narrower than the top portion134of the opening130. For example, a top region132aof the bottom portion132of the opening130is narrower than a bottom region134aof the top portion134of the opening130.

In some embodiments, etching the dielectric stack120to form the opening130is performed by a dry etching process. For example, a dry etchant, such as hydrogen (H2) and nitrogen (N2), may be selected for the dry etching process.

Referring toFIG. 4, the dielectric stack120is etched again to expand the bottom portion132of the opening130. In greater details, etching the dielectric stack120again to expand the bottom portion132of the opening130includes etching the first oxide structure122of the dielectric stack120. In other words, etching the dielectric stack120again to expand the bottom portion132of the opening130is performed such that a top region132bof the bottom portion132of the opening130is wider than a bottom region134bof the top portion134of the opening130. As a result of such a process, the size of the opening130can be adjusted and thus the problems of under-etch and short-circuit can be avoided.

In some embodiments, the bottom portion132of the opening130is expanded, while the top portion134of the opening130is unchanged. In greater details, the top region132bof the bottom portion132of the opening130inFIG. 4is wider than the top region132aof the bottom portion132of the opening130inFIG. 3, while the bottom region134bof the top portion134of the opening130inFIG. 4is substantially equal to the bottom region134aof the top portion134of the opening130inFIG. 3.

In some embodiments, etching the dielectric stack120again may include exposing a top surface121aof the first nitride structure121. Further, etching the dielectric stack120again may include exposing a bottom surface123aof the second nitride structure123. In some embodiments, a slope of a sidewall of the first oxide structure122is substantially equal to that of the second oxide structure124. The expanded opening130has a double inverted trapezoid profile.

In some embodiments, etching the dielectric stack120again to expand the bottom portion132of the opening130is performed by a vapor etching process. The vapor etching process may include, for example, an anisotropic etching process using an etching gas has etch selectivity between the first oxide structure122and the second oxide structure124. For example, the etching gas may include hydrogen fluoride (HF). The vapor HF may have a high selectivity etch rate at the first oxide structure122by controlling low pressure under flowing nitrogen (N2) and H2O In other words, the first oxide structure122has a higher etch rate in the etching process than the second oxide structure124, which results in the bottom portion132of the opening130in the first oxide structure122expanded while keeping the top portion134of the opening130in the second oxide structure124substantially intact.

Referring toFIG. 4andFIG. 5, a conductive material is filled in the opening130to form a conductive structure140. The conductive structure140is formed in the dielectric stack120and is in contact with the contact116of the substrate110. In greater details, the conductive structure140is surrounded by the dielectric stack120. The conductive structure140has a bottom portion142and a top portion144on the bottom portion142, and a top region142bof the bottom portion142of the conductive structure140is wider than a bottom region144bof the top portion144of the conductive structure140. The bottom portion142of the conductive structure140and the top portion144of the conductive structure140may be integratedly formed as a single piece. In the present embodiments, the conductive structure140may be referred as an electrode plate of the capacitor, for example, a bottom electrode plate. As a result of such a configuration, the problems of under-etch and short-circuit can be avoided, and thus the capacitance of the semiconductor structure can be increased and the performance of the semiconductor structure can be also improved.

In some embodiment, the conductive structure140may extend from the first nitride structure121to the third nitride structure125. The conductive structure140is in contact with the top surface121aof the first nitride structure121and the bottom surface123aof the second nitride structure123. In some embodiments, the bottom portion142of the conductive structure140is surrounded by the first oxide structure122, and the top portion144of the conductive structure140is surrounded by the second oxide structure124.

In some embodiments, because the conductive structure140fills the opening130, the conductive structure140inherits the profile of the opening130. That is, the conductive structure140has the double inverted trapezoid profile. In some embodiments, the conductive structure140is made of conductive materials, such as titanium nitride (TiN).