Character recognition equipment

Herein disclosed is a character recognition system which comprises a video input device which obtains character video signals by raster scanning characters which exist on a medium; a quantization unit which converts said character video signals into binary code video signals; and a character centerline shaping device which transforms said binary code video signals into character centerline figures which are formed by the character centerlines of said binary code video signals. According to the characteristic feature of the present invention, a temporary memory device temporarily stores said character centerline figures; a feature extract device divides said character centerline figures in said temporary memory device into divided regions with lines which have the original scanning direction or which are at right angles with respect to said original scanning direction, takes out every column of partial centerline figures in said divided regions, said column being at a right angle with respect to said lines, and extracts positions of start points of said partial centerline figures in every divided region, positions of end points of said partial centerline figures in said every divided region, and displacements of said partial centerline figures from said start points to said end points; and a sequential logic circuit decides the categories of the character based on the order of the outputs of said feature extract device.

Reference is hereby made to co-pending U.S. Application Ser. No. 631,149, 
filed on Nov. 11, 1975, by the same inventor as this herein disclosed 
invention. 
BACKGROUND OF THE INVENTION 
1. Field of the Invention 
The present invention relates to a character recognition system which forms 
character centerline figures from character video signals, extracts the 
features of the divided character centerline figures, and recognizes the 
categories of the character. 
2. Description of the Prior Art 
In conventional character recognition equipment, the characters recorded on 
a medium are optically raster scanned so that the characters are 
transformed into character video signals; the character video signals are 
quantized so as to be transformed into digital coded video signals. Based 
on the digital coded video signals, character centerline figures are 
formed and analyzed so as to extract the features of said figures. The 
extracted features of said figures are recognized with reference to a 
dictionary which has already been previously prepared. 
In said conventional equipment, when characters are written by hand, the 
features of the handwriting of each person are also extracted; therefore, 
the process of extracting the characters features become very complex. 
SUMMARY OF THE INVENTION 
An object of the present invention is to provide a character recognition 
system which analyzes the character centerline figure obtained from 
character video signals, extracts the features of the character centerline 
figure and can recognize the character simply and reliably. 
For the purpose of obtaining the above-mentioned object, the character 
recognition system of the present invention comprises a video input device 
which obtains character video signals by raster scanning characters 
existing on a medium; a quantization unit converts the character video 
signals into binary code video signals; and a character centerline shaping 
device transforms the binary code video signals into character centerline 
figures formed by the character centerlines of said binary code video 
signals. According to the characteristic feature of the present invention 
a memory device temporarily stores the character centerline figures; a 
feature extract device divides the said character centerline figures into 
regions with lines which have the scanning direction or which are at right 
angles with respect to said scanning direction, takes out every column of 
partial centerline figures in said divided regions, said column being of a 
right angle with respect to said lines, and said feature extract device 
extracts positions of start points of said partial centerline figures in 
every divided region, positions of end points of said partial centerline 
figures in said every divided region, and displacements of said partial 
centerline figures from said starting points to said end points, and a 
sequential logic circuit decides the categories of the character based on 
the order of the outputs of said feature extract device. 
Further features and advantages of the present invention will be apparent 
from the ensuing description with reference to the accompanying drawings 
to which, however, the scope of the invention is in no way limited.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
Referring to FIG. 1, a video input device 11 line scans characters written 
on a medium such as paper, for example, and transforms these characters 
into character video signals. These character video signals are supplied 
to a quantization device 12 which converts said signals to binary coded 
video signals. The output of the quantization device 12 is supplied to a 
character centerline shaping device 13 so as to form the characters which 
are formed with character centerlines. The output of the quantization 
device 12 is also supplied to a positioning device 14 so as to divide the 
characters stored in the temporary scratch pad type memory device 15. The 
output of the character centerline shaping device 13 is temporarily stored 
in the temporary memory device 15. 
The divided characters in the temporary memory device 15 are read out to 
feature extract circuit units 16.sub.1 through 16N. The number N of the 
feature extract units corresponds to the number of divisions of the 
character, and the read out from the temporary memory device 15 is 
supplied in parallel to said units 16.sub.1 through 16N. Each output of 
the units 16.sub.1 through 16N is respectively supplied to corresponding 
compression logic device units 17.sub.1 through 17N, which produces the 
output of a sequence of features of the character having 
quasi-continuities acceptable to the features of the outputs of the units 
16.sub.1 through 16N. The outputs of these compression logic device units 
17.sub.1 through 17N are supplied to a sequential logic circuit 18. The 
unit 18 determines the category of the character based on the outputs of 
the units 17.sub.1 through 17N. 
Next, we will explain the detailed function of the character recognition 
system shown in FIG. 1. 
In the character centerline shaping device 13, the output of the 
quantization device, for example, a figure 21 of FIG. 2 is transformed 
into a centerline shape as in figure 22 of FIG. 2. In FIG. 2, the figure 
22 is composed of one-bit centerlines. The centerline shape figure 22 is 
horizontally divided into N regions. For example, as shown in FIG. 3, the 
centerline shape figure 32 is divided by three-bit widths to divided 
regions 31.sub.1 through 31N. Partial centerline shapes in the divided 
regions 31.sub.1 through 31N are supplied at the same time to the feature 
extract circuit units 16.sub.1 through 16N, respectively. 
One divided region, for example, region 31.sub.2 is composed as shown in 
(a) of FIG. 4. Patterns 41.sub.1 through 41.sub.8, as shown in (a) of FIG. 
4, are read from the temporary memory device 15 so as to be supplied to 
the feature extract circuit unit 16.sub.2. As the repetition of the same 
pattern is meaningless, the repeated pattern is disregarded in (a) of FIG. 
4. The divided region 31.sub.2 shown in (a) of FIG. 4 can be indicated 
with the displacement (b) of FIG. 4 via the feature extract circuit unit. 
FIG. 5 is a circuit of one of the feature extract circuit units 16.sub.1 
through 16N. In FIG. 5, two registers 42 and 43 are connected in a cascade 
arrangement and are set by clock .phi..sub.1. The comparator 44 compares 
the outputs of the two registers 42 and 43; that is; one input pattern is 
compared with the prior pattern. When three parts H, M and L of the 
three-bits pattern are all binary "0" in the register 43 and at least one 
output of the three parts H, M and L appears as a binary "1" at the 
register 42, the data in the register 42 are deemed as a starting point 
and an output signal appears at a terminal 45 of the comparator 44. When 
three parts H, M and L of the three-bits pattern are all binary "0" in the 
register 42 and at least one output of the three parts H, M and L appears 
as a binary "1" at the register 43, the data in the register 43 is deemed 
as an end point and an output signal appears at a terminal 46 of the 
comparator 44. Data concerning the displacement from one pattern to the 
next pattern at the displacement terminals 47 of the comparator 44. 
Corresponding to 54 combinations of the registers 42 and 43, the outputs 
at the terminals 47 can be represented by four kinds of outputs: 
an upward inclining (.uparw.), a downward inclining (.dwnarw.), a 
horizontal (.fwdarw.) and a "O" output as shown in (b) of FIG. 4. 
By combining the start point output 45 with the end point output 46 and the 
above-mentioned four outputs 47, the character 32, shown in FIG. 3, can be 
represented by basic patterns (a) through (f) as shown in FIG. 6A. The 
basic pattern (a) CAP 51.sub.1 of FIG. 6A, corresponds to the divided 
region 31.sub.2. The basic pattern (b) CAPL 51.sub.2 of FIG. 6A 
corresponds to the centerline shape in the divided region 31.sub.3 ; the 
basic pattern (c) VERT 51.sub.3 corresponds to the centerline shape in the 
divided region 31.sub.6 ; the basic pattern (d) LTDW 51.sub.4 corresponds 
to the centerline shape in the divided region; the basic pattern (e) RTUP 
51.sub.5 corresponds to the centerline shape in the divided region 
31.sub.10 ; and the basic pattern (f) CUP 51.sub.6 corresponds to the 
centerline shape in the divided region 31.sub.11. FIG. 6B shows the other 
basic patterns (g) through (r), which are not used in the character 32 
shown in FIG. 3. 
Actually, in FIG. 3, the divided regions 31.sub.2, 31.sub.3, ..., 31.sub.n 
overlap in the adjoining regions. FIG. 7 shows an aspect of the 
overlapping divided regions of the character centerline figure 32 shown in 
FIG. 3. In FIG. 7, the aforementioned six feature output patterns CAP, 
LTDW, VERT, CAPL, RTUP, and CUP are arranged horizontally, and the divided 
regions 31.sub.2 through 31.sub.11 are arranged vertically. In FIG. 7, 
redundancies due to the overlappings or the repetitions of the same 
condition are eliminated, and the features which are enclosed by hatched 
rectangles are supplied as the outputs to the compression logic device 
units 17.sub.1 through 17N and further to the sequential logic circuit 18. 
FIG. 8A shows the block diagram of a compression logic device unit. 
Referring to FIG. 8A, flip flop circuits 81 and 82 are set by the clock 
.phi.. An input signal is supplied to a set terminal of the circuit 81 and 
also supplied via a NOT circuit 83 to a reset terminal of the circuit 81, 
and further supplied to one input terminal of the NOR circuit 84. The set 
output of the circuit 81 is supplied to another input of the NOR circuit 
84 and to a set terminal of the circuit 82. The output of the circuit 84 
is supplied to one input of the NAND circuit 85 and also supplied to a 
reset terminal of the circuit 82. The set output of the circuit 82 is 
applied to a terminal of the NAND circuit 85, and the output of the 
circuit 85 is an output signal via a NOT circuit 86. The waveforms 
appearing at the essential parts of the circuit of FIG. 8A are shown in 
FIG. 8B. As can be seen from FIG. 8B, in the circuit of 8A, one 
discontinuity is allowable, and the final part of the combination is used 
as the respective output signal. 
The outputs of the compression logic device units 17.sub.1 through 17N are 
supplied to the sequential logic circuit 18 shown in detail in FIGS. 9A 
and 9B. The outputs of the compression logic device units 17.sub.1 through 
17N are supplied to a priority processing circuit 91. When more than two 
features are supplied from the same region, said circuit 91 selects the 
feature which is to be preferentially selected. Therefore, only one output 
is obtained at each output terminal FP.sub.1 through FP.sub.N. The outputs 
FP.sub.1 through FP.sub.17 are supplied to an OR circuit 92. The outputs 
FP.sub.1 through FP.sub.17 are also supplied to an encoder 93 where 
seventeen features are encoded to a five-bit code. The five-bit output of 
the encoder 93 is supplied to a dictionary, that is, a memory 94. In the 
memory 94, the five-bit output of the encoder 93 is used as a LOW ADDRESS 
and the corresponding readout of the memory 94 is fed back via a temporary 
buffer register 95 for use as a HIGH ADDRESS. The temporary buffer 
register 95 is set by the clock pulse which is generated at the output of 
the OR circuit 92, and the output of the register 95 is fed back to the 
memory 94. The character to be read is judged in accordance with the 
position of the final feature of the register 95 in the dictionary 94. 
FIG. 9B shows the relation between the LOW ADDRESS 1, 2, 3, 4 and 5 and 
the HIGH ADDRESS C.sub.1, C.sub.2, C.sub.3, C.sub.4, ..., C.sub.n. In FIG. 
9B, C.sub.1 though C.sub.n are the conditions where the position is to be 
jumped and this jumping condition is obtained from the output of the 
temporary buffer register 95. 
As shown above, according to the present invention, a binary code video 
signal of the character is converted to a character centerline figure, 
said character centerline figure is divided by the parallel lines, and, 
with respect to the divided centerline figure in each divided region, the 
feature extract circuit extracts the start points, the end points, and the 
aspect of the displacement from the start point to the end point. These 
extracted features are composed of six basic patterns. Actually, as 
mentioned above, each of the regions is overlapped with each other, the 
compression logic device unit eliminates the redundancies which are caused 
by the overlaps of the divided region or the repetitions of the same 
condition, and the sequence of the feature having quasi-continuities is 
supplied to the sequential logic circuit so as to recognize the character. 
Therefore, according to the present invention, the features of the 
character can be composed of a small number of the basic patterns, and the 
sequence of the features can be compressed to a minimum indispensable 
number, so that the construction and the action of the apparatus can be 
simplified without forfeiting the reliability of the recognition process 
of the characters.