METHOD FOR HOT-PLUGGING IDENTIFICATION AND SERVER WITH FUNCTION OF HOT-PLUGGING IDENTIFICATION

A method for hot-plugging identification adapted to a server, comprising the following steps: receiving a plurality of position messages and a plurality of codes by a microcontroller disposed on a backplane, with each of the plurality of position messages and each of the plurality of codes corresponding to a respective one of a plurality of hardware devices; generating a mapping table according to the plurality of position messages and the plurality of codes by the microcontroller, with the mapping table comprising a set of sequence information; delivering the set of sequence information to each of a plurality of central processors by the microcontroller; and identifying at least one of the plurality of hardware devices, to be controlled, by each of the plurality of central processors according to the set of sequence information.

CROSS-REFERENCE TO RELATED APPLICATIONS

This non-provisional application claims priority under 35 U.S.C. § 119(a) on Patent Application No(s). 107113113 filed in Taiwan, R.O.C. on Apr. 18, 2018, the entire contents of which are hereby incorporated by reference.

TECHNICAL FIELD

The disclosure relates to a method for hot-plugging identification and a sever with a function of hot-plugging identification, more particularly to a method for hot-plugging identification and a sever with a function of hot-plugging identification adapted to hardware devices.

BACKGROUND

In general, a backplane of a storage server having several processors (CPUs) is provided for hardware devices to be plugged or unplugged. Since some types of hardware devices (e.g. PCIe SSD) do not support hot-plugging, a mechanism becomes necessary for delivering a message of plugging/unplugging those hardware devices to a respective one of processors in a storage server so as to complete a process of hot-plugging.

However, each of processors included in a storage server is responsible for controlling its individual hardware device(s). When one of the hardware devices is plugged into the storage server or unplugged from the storage server, there is no way to identify which one of the processors is responsible for controlling the plugged/unplugged hardware device. Due to the foregoing reasons, a backplane of the storage server is only allowed to be connected to a specific main board, therefore, the assembly of the storage server is restricted and inflexible. Accordingly, the burdens of designs and costs are increased.

SUMMARY

A method for hot-plugging identification adapted to a server is disclosed according to one embodiment of the present disclosure. The method includes the following steps: receiving a plurality of position messages and a plurality of codes by a microcontroller disposed on a backplane. Each of the plurality of position messages and each of the plurality of codes correspond to a respective one of a plurality of hardware devices; generating a mapping table according to the plurality of position messages and the plurality of codes by the microcontroller. The mapping table includes a set of sequence information; delivering the set of sequence information to each of a plurality of central processors by the microcontroller; and identifying at least one of the plurality of hardware devices, to be controlled, by each of the plurality of central processors according to the set of sequence information. Each of the plurality of hardware devices is detachably connected to a respective one of a plurality of connecting port of the backplane, the set of sequence information includes the plurality of codes, and each of the plurality of central processors corresponds to at least one of the plurality of codes.

A server with a function of hot-plugging identification is disclosed according to one embodiment of the present disclosure. The server includes a backplane, a plurality of hardware devices, a microcontroller and a plurality of central processors. The backplane has a plurality of connecting port. Each of the plurality of hardware devices is detachably connected to a respective one of the plurality of connecting ports, wherein each of the plurality of hardware devices corresponds to a position message and a code. The microcontroller is disposed on the backplane and configured to generate a mapping table according to the plurality of position messages and the plurality of codes. The mapping table includes a set of sequence information. The plurality of central processors is electrically connected to the microcontroller, and each of the plurality of central processors is configured to identify at least one of the plurality of hardware devices to be respectively controlled. The set of sequence information includes the plurality of codes, and each of the plurality of central processors corresponds to at least one of the plurality of codes.

DETAILED DESCRIPTION

Please refer toFIG. 1, which is a block diagram of a server with a function of hot-plugging identification according to one embodiment of the present disclosure. As shown inFIG. 1, the server1includes a backplane10, a plurality of hardware devices11-14, a microcontroller15and a plurality of central processors16and17. The backplane10has a plurality of connecting ports101-104. Each of the hardware devices is detachably connected to a respective one of the connecting ports. For example,FIG. 1shows that the hardware devices11-14are detachably connected to the connecting ports101-104respectively. The microcontroller15is disposed on the backplane10. In practice, the server1further includes a main board18adapted to be connected to the backplane10. Both of the central processors16and17are disposed on the main board18and electrically connected to the microcontroller15. In practice, the microcontroller15is, for example, a Complex Programmable Logic Device (CPLD) or other device with functions of logical computations. In an example, each of the hardware devices11-14is one of PCIe SSD, NVMe SSD or edsff SSD, but the present disclosure is not limited to the above example.

In this embodiment, each of the hardware devices has a respective position message and a code. The microcontroller15is configured to generate a mapping table according to the position messages and the codes. For example, the hardware device11corresponds to the position message SN1and the code “1”, the hardware device12corresponds to the position message SN2and the code “0”, the hardware device13corresponds to the position message SN3and the code “1” and the hardware device14corresponds to the position message SN4and the code “1”. The microcontroller15is capable of generating the mapping table (namely “Table I” shown below) according to the position messages and the codes. The mapping table includes a set of sequence information SE including the codes “1011”. Each of the central processors is configured to identify at least one hardware device of the hardware devices11-14according to the set of sequence information SE (namely “1011”), with the at least one hardware device to be controlled by either the central processor16or the central processor17. In this embodiment, each of the central processors corresponds to at least one of those codes.

Specifically, in an initial state, each of the central processors is defined to be corresponding to a code in advance. For example, the central processor16is defined to be corresponding to a code “1” in advance, and the central processor17is defined to be corresponding to a code “0” in advance. Further, the codes (“1” or “0”) are respectively assigned to the hardware devices. In this embodiment, the code “1” is assigned to the hardware devices11,13and14corresponding to the position messages SN1, SN3and SN4respectively. The code “0” is assigned to the hardware device12corresponding to the position message SN2. When the server is started, each of the hardware devices notifies the microcontroller15of its own position message and code by its respective connecting port through a respective GPIO pin (Not shown in figures). For example, the hardware device11notifies the microcontroller15of its own position message SN1and the code “1” by the connecting port101through a respective GPIO pin, the hardware device12notifies the microcontroller15of its own position message SN2and the code “0” by the connecting port102through a respective GPIO pin, the hardware device13notifies the microcontroller15of it own position message SN3and the code “1” by the connecting port103through a respective GPIO pin, and the hardware device14notifies the microcontroller15of it own position message SN4and the code “1” by the connecting port104through a respective GPIO pin.

The microcontroller15generates the mapping table (namely “Table I”) according to the position messages and the codes coming from the connecting ports. Further, the microcontroller15sends information regarding the mapping table to both of the central processors16and17through buses I2C1-I2C4. In other words, the central processors16and17both receive the set of sequence information SE (namely “1011”). Since the central processor16is defined to be corresponding to the code “1” in advance, the central processor16can determine that the central processor16itself is responsible for controlling the hardware devices11,13and14connected to the connecting ports101,103and104respectively according to the set of sequence information SE including the codes “1011” as receiving the set of sequence information SE. Since the central processor17is defined to be corresponding to the code “0” in advance, the central processor17can determine that the central processor17itself is responsible for controlling the hardware device12connected to the connecting port102according to the set of sequence information SE including the codes “1011” as receiving the set of sequence information SE.

In an embodiment, when one of the hardware devices11-14is removed from the respective connecting port, the microcontroller15is configured to drive one of the central processors16and17to generate a reset signal according to a status signal related to the removed hardware device. For example, when the hardware device12is removed from the respective connecting port102, the connecting port102accordingly sends out a status signal to the microcontroller15. The microcontroller15further notifies the central processor17that the hardware device12is removed from the respective connecting port102. Further, the central processor17generates a reset signal accordingly, so that the connecting port102, corresponding to the removed hardware device12, adjust its own current potential. Specifically, when the hardware device12is connected to the respective connecting port102, the current potential of the connecting port102remains in a high-state. When the hardware device12is removed from the respective connecting port10, the reset signal generated by the central processor17is used for converting the current potential from the high-state to a low-state, so that a hot-plugging process is completed.

In an example, the microcontroller15is configured to checking the mapping table according to the status signal related to the removed hardware device so as to identify the central processors16and17, so that the identified central processor generates the reset signal. In an example, when the hardware device12is removed from the respective connecting port102, since the status signal is sent by the connecting port102, the microcontroller15is capable of checking the mapping table (Table I) according to position message SN2serving as a source of the status signal to identify that the hardware device12connected to the connecting port102is controlled by the central processor17. In practice, as shown inFIG. 1, the server with the function of hot-plugging identification further includes a plurality of expanders EP1and EP2which are electrically connected to the central processors16and17respectively and the microcontroller15. In one embodiment, when the central processor17generates the reset signal, the central processor17sends the reset signal to the connecting port102corresponding to the removed hardware device12through the respective expander EP2. The purpose of the present disclosure is that, by using the set of sequence information formed by the codes which are defined to be corresponding to the hardware devices in advance, each of the central processors is capable of identifying the one or more hardware devices to be controlled. Therefore, when a hot-plugging process is performed within the server, each of the central processors is capable of determining whether or not the plugged/removed hardware device is controlled by itself. By taking the advantage of the present disclosure, the backplane is not limited to be connected to a specific main board, so that convenience of a server assembly is raised and the burdens of designing and costing are reduced accordingly.

Please refer toFIG. 2, which is a flow chart of a method for a hot-plugging identification according to one embodiment of the present disclosure. The method is adapted to the server1shown inFIG. 1. As shown inFIG. 1andFIG. 2, in step S201, the microcontroller15, disposed on the backplane, receives a plurality of position messages and a plurality of codes, with each of the position messages and each of the codes corresponding to a respective one of the hardware devices101-104. In step S203, the microcontroller15generates a mapping table (e.g. Table I) including the set of sequence information SE according to the position messages SN1-SN4and the codes.

In step S205, the microcontroller15sends the set of sequence information to both of the central processors16and17. For example, the central processor16and the central processor17both receive the set of sequence information SE (namely “1011”). In step S207, each of the central processors identifies at least one of hardware devices11-14, to be controlled, according to the set of sequence information. Specifically, the set of sequence information SE consists of code “0” or “1”. Either the code “0” or the code “1” is assigned to each of the connecting ports corresponding to the hardware devices. By analyzing the set of sequence information SE including the codes, each of the central processor16and the central processor17is capable of identifying the hardware device(s) to be controlled.

Please further refer toFIG. 3, which is a flow chart of a method for hot-plugging identification according to another embodiment of the present disclosure. As shown inFIG. 3, steps S301-S307are similar to steps S201-S207. Comparing to the embodiment ofFIG. 2, the embodiment ofFIG. 3further includes steps S309-S313. In step S309, when one of the hardware devices11-14is removed from a respective connecting port, a status signal related to the removed hardware device is sent to the microcontroller15. In step S311, the microcontroller drives one of the central processors16and17to generate a reset signal according to the status signal. In step S313, the connecting port, corresponding to the removed hardware device, adjusts a current potential according the reset signal. In one embodiment, the method for hot-plugging identification further includes a step that the reset signal is sent to the connecting port corresponding to the removed hardware device by a respective one of a plurality of expanders. In the embodiment ofFIG. 1, when the hardware device12is removed, the reset signal generated by the central processor17is sent to the connecting port102by the expander EP2.

Please further refer toFIG. 4, which is a partial flow chart of the method for hot-plugging identification according to one embodiment of the present disclosure. The embodiment ofFIG. 4is similar to the embodiment ofFIG. 3. Comparing to the embodiment ofFIG. 3, step S311shown in the embodiment ofFIG. 4includes steps S3111and S3112. In steps S3111, the microcontroller checks the mapping table according to the status signal related to the removed hardware device to identify the central processors. In step S3112, the identified central processor generates the reset signal. Specifically, when the hardware device12is removed from the respective connecting port102, the respective connecting port102sends the status signal out. The microcontroller15further checks the mapping table (e.g. Table I) to identify that the hardware device12connected to the connecting port102is controlled by the central processor17according to the position message SN2serving as a source of the status signal. Further, the microcontroller15drives the central processor17to generate the reset signal and sends the reset signal back to the connecting port102via the buses, so as to pull low the current potential to complete the process of hot-plugging.

Please refer toFIG. 5, which is a block diagram of a server with a function of hot-plugging according another embodiment of the present disclosure. An illustration regarding a server with two central processors is given in the embodiment ofFIG. 1. Different from the embodiment ofFIG. 1, an illustration regarding a server with four central processors is given in the embodiment ofFIG. 5. Similar to the structure ofFIG. 1, a server2with a function of hot-plugging includes a backplane20, a plurality of hardware devices21-24, a microcontroller25and a plurality of central processors26-29. The backplane20has a plurality of connecting ports201-204. The hardware devices21-24are detachably connected to the connecting ports201-204respectively. The server2further has a main board30adapted to be connected to the backplane20and provided for the central processors26-29to be disposed. The server2further has expanders EP1′-EP4′ electrically connected to the central processors26-29respectively and the microcontroller25. Similarly, in one example, the microcontroller25is a Complex Programmable Logic Device (CPLD) or other devices with functions of computation. Each of the hardware devices21-24is one of PCIe SSD, NVMe SSD or edsff SSD, but the present disclosure is not limited to the above example.

In this embodiment, each of the hardware devices has a respective position message and a respective code. The microcontroller25is configured to generates a mapping table according to the position messages and the codes. For example, the hardware device21corresponds to a position message SN1′ and a code “00”, the hardware device22corresponds to a position message SN2′ and a code “01”, the hardware device23corresponds to a position message SN3′ and a code “10” and the hardware device24corresponds to a position message SN4′ and a code “11”. The microcontroller25generates a mapping table (namely “Table II”) according to the position messages and the codes. The mapping table includes a set of sequence information SE′ including the codes “00011011”. Each of the central processors is configured to identify at least one hardware device to be controlled among the hardware devices21-24according to the set of sequence information SE′ (namely “00011011”). In this embodiment, each of the central processors corresponds to at least one of those codes.

Specifically, similar to the embodiment ofFIG. 1, in an initial state, the central processors26,27,28and29are defined to be corresponding to codes “00”, “01, 10, 11 respectively. When the server is started, each of the hardware devices21-24notifies the microcontroller25of its own position message and code by its respective connecting port through a respective GPIO pin. In other words, the hardware device21notifies the microcontroller25of it own position message SN1′ and code “00” by the connecting port201through a respective GPIO pin, the hardware device22notifies the microcontroller25of its own position message SN2′ and code “01” by the connecting port202through a respective GPIO pin, the hardware device23notifies the microcontroller25of its own position message SN3′ and code “10” by the connecting port203through a respective GPIO pin, and the hardware device24notifies the microcontroller25of its own position message SN4′ and code “11” by the connecting port204through a respective GPIO pin. Further, the microcontroller25generates the mapping table (namely “Table II”) according the position messages and the codes from the connecting ports. The microcontroller15sends information regarding the mapping table to the central processors26-29through buses I2C1′-I2C4′ respectively. In other words, each of the central processors26-29receives the set of sequence information SE′(namely “00011011”). As described above, the central processors26-29are defined to be corresponding to the code “00”, the code “01”, the code “10” and the code “11” respectively in advance. Therefore, when each of the central processors26-29receives the set of sequence information SE′, the central processors26-29are capable of identifying that the hardware devices21-24to be controlled respectively according to the set of sequence information SE′ including the codes “00011011”. Similarly, in this embodiment, when one of the hardware devices is removed from its respective connecting port, the central processor responsible for controlling the removed hardware device will generate a reset signal adapted to pull low a current potential of the connecting port, so as to complete a hot-plugging process. Since the operation of this embodiment is similar to the operation of the aforementioned embodiment, detailed illustration regarding this embodiment is not repeated here.

Different from the embodiment ofFIG. 1, the server2has four central processors in the embodiment ofFIG. 5. In order to let each of the four central processors has a respective code, the usage of two-bit codes becomes necessary to generate the four codes which are 00, 01, 10, 11. Thereby, each of the central processors is capable of identifying the hardware device to be controlled among the plurality of hardware devices according to the information indicated in Table II. However, the present disclosure is not limited to the embodiments ofFIG. 1andFIG. 5. In an implementation, according to the technical contents of the embodiments ofFIG. 1andFIG. 5, persons having ordinary skills in the art are able to design another mechanism of hot-plugging identification with the usages of other types of codes higher than the two-bit codes so as to perform a hot-plugging identification in a server with more central processors. For example, three-bit codes (e.g. 000, 001, 010, 011 . . . 111) may be used for providing a respective code to each of the eight central processors in a server so as to perform a hot-plugging identification in the server.

Based on the above description, in the method for hot-plugging identification and the server with the function of hot-plugging identification, by using the set of sequence information including a plurality of codes each corresponding to a respective one of hardware devices, each of central processor is capable of determining the hardware device to be controlled so as to complete the hot-plugging process. Thereby, a backplane is not limited to be connected to a specific main board. In contrary, the backplane is allowed to be connected to any type of main board. Therefore, the convenience of assembly of a server is raised and the burdens of designing and costing are reduced.