Scanner interface system for transferring data to main and secondary processing units

A document data input system for a scanner capable of storing scanner data to another buffer memory of a microprocessor when applying the scanned data to a host computer. The document data input system comprises a host computer for storing scanned data to its internal hard disk, a scanner for scanning the document data, a scanner interface unit for interfacing between the host computer and the scanner, a microprocessor associated with a global memory and a local memory, and an interface unit for latching the data from the scanner interface unit and applying the data to the microprocessor, and applying a completion signal to the scanner interface unit when the data input to the microprocessor is completed.

BACKGROUND OF THE INVENTION 
The present invention relates to a document data input system which 
receives data scanned at a scanner and stores the scanned data in a hard 
disk of a host computer, and more particularly to a document data input 
system for a scanner which is designed to be suitably used for a document 
acknowledgement system comprising a multiprocessor. 
A conventional scanner interface, which is shown in FIG. 1, comprises a 
host computer 10 which receives data scanned at a scanner 12 via a scanner 
interface unit 11 and then stores the data in its internal hard disk. 
In such a conventional system, the host computer 10 sets the mode of the 
scanner interface unit 11 by means of a register value and receives data 
scanned by the scanner 12 as an input via the scanner interface unit 11, 
and then stores the inputted data to a hard disk. Thereafter, the data 
stored in the hard disk are processed by the host computer 10 in 
accordance with the user's intention. 
However, in such a conventional system there has been the drawback that 
since the scanned data is stored only in the hard disk of the host 
computer, the data stored in the hard disk should be transmitted from the 
host computer to another processor in case that the data is needed by the 
other processor, and it takes time to transmit the data at the host 
computer, causing the processing efficiency to be lowered. 
SUMMARY OF THE INVENTION 
Therefore, it is an object of the present invention to provide a document 
data input system for a scanner which can input the data scanned at the 
scanner to another microprocessor and store the data scanned to a buffer 
memory when inputting the scanned data to a host computer and storing to 
its hard disk. 
The object of the present invention is attained by providing a document 
data input system which is constituted such that data transmitted from a 
host computer is applied to a scanner via an interface unit upon the 
control of the host computer, data scanned at the scanner is applied via 
the interface unit to the host computer by a read control signal of the 
host computer and then latched at a latch, and the latched data are read 
by the microprocessor and thereafter a completion signal is applied to the 
scanner.

DETAILED DESCRIPTION OF THE INVENTION 
Referring to FIG. 2, the document data input system according to the 
present invention comprises a host computer 100 for controlling the 
operation of the whole system and storing scanned data to its hard disk; a 
scanner 200 for scanning document data; a scanner interface unit 300, 
associated with the host computer 100 and the scanner 200, for executing 
an interface operation therebetween upon the control of the host computer 
100; a microprocessor 400 associated with a global memory 401 and a local 
memory 402; and an interface unit 310 for latching scanned data passed 
through the scanner interface unit 300 upon the control of the host 
computer 100 and applying the latched data to the microprocessor 400. 
FIG. 3 shows in detail the scanner interface unit and the interface unit. 
As shown in FIG. 3, the scanner interface unit 300 is constituted in such 
a manner that data ports D.sub.0 -D.sub.7, read control signal port IOR, 
write control signal port IW0, selection signal ports SA.sub.0 and 
SA.sub.1, and reset signal port RSD of the host computer 100 are connected 
respectively to data ports D.sub.0 -D.sub.7, read port RD, write port WR, 
selection ports A.sub.0 and A.sub.1, and reset port RS of a scanner 
interface 302, and also input/output signal ports IO.sub.0 -IO.sub.3 of 
the host computer 100 are connected to a chip selection port CS of the 
scanner interface 302 via an AND gate 301, output ports PA.sub.O -PA.sub.7 
of the scanner interface 302 are connected via a buffer 303 to data ports 
D.sub.1 -D.sub.8 of the scanner 200 and input ports PB.sub.O -PB.sub.7 of 
the scanner interface 302 are connected directly to the data ports D.sub.1 
- D.sub.8 of the scanner 200; a mode control signal port PC.sub.4 of the 
scanner interface 302 is connected to a preset/scanner port PR/SC of the 
scanner 200 and an enable port 2G of a multiplexer 307 as well as to an 
enable port G of the buffer 303 and an enable port 1G of the multiplexer 
307 via an inverter 304; interrupt signal port PC.sub.3, acknowledge port 
PC.sub.6, and output buffer full port PC.sub.7 of the scanner interface 
302 are connected to ports 1A.sub.3, 1Y.sub.2 and 1A.sub.1 of the 
multiplexer 307, input buffer full port IC.sub.1 via an OR gate 306 to a 
port 2A.sub.3 of the multiplexer 307, and also ports 1Y.sub.3 and 
2Y.sub.3, 1A.sub.2 and 1Y.sub.1 to ports RS and ST of the scanner 200; and 
then the port ST is connected to a port 2A.sub.2 of the multiplexer 307 
and also the port 2Y.sub.2 via an OR gate 305 to a strobe port PC.sub.2 of 
the scanner interface 302. In the interface unit 310 data ports 
D.sub.O-D.sub.7 of the scanner interface 302 are connected to data ports 
D.sub.0 -D.sub.7 of the latch 312 and output ports Q.sub.0 -Q.sub.7 of the 
latch 312 are connected to data ports D.sub.O-D.sub.O-D.sub.7 of the 
microprocessor 400; input/output signal port IO.sub.1 of the host computer 
100 is connected to a clock port CK of the latch 312, a clear port CL of a 
flip-flop 313, and a preset port PS of a flip-flop 314 and also a reset 
signal port RSD of the host computer 100 is connected via the inverter 311 
to the preset port PS of the flip-flop 313 and the clear terminal CL of 
the flip-flop 314; the output port Q of the flip-flop 313 is connected to 
an interrupt port INT of the microprocessor 400 and interrupt acknowledge 
signal port IACK, output demand signal port P.sub.6 and completion signal 
port P.sub.5 of the microprocessor 400 are connected to the clock port CK 
of the flip-flop 313, the output enable port OE of the latch 312 and the 
clock port CK of the flip-flop 314; and the output port Q of the flip-flop 
314 is connected to inputs of OR gates 305 and 306. In the above, the 
scanner interface 302 is a programmable peripheral interface (PPI) wherein 
data ports D.sub.O-D.sub.7 are selectively connected to its output ports 
PA.sub.O-PA.sub.7, input ports PB.sub.O-PB.sub.7 and control ports 
PC.sub.O-PC.sub.7 in response to signals applied to its selection ports 
A.sub.0 and A.sub.1, and the multiplexer 307 ports 1A.sub.1-1A.sub.3 are 
connected to its ports 1Y.sub.1 -1Y.sub.3 when a low potential signal is 
applied to its enable port 1G and its ports 2A.sub.2 and 2A.sub.3 are 
connected to its ports 2Y.sub.2 and 2Y.sub.3 when a low potential signal 
is applied to its enable port 2G. 
Hereinafter, the operation and effect of the present invention will be 
described in detail. 
When a high level reset signal is applied from the reset signal port RSD of 
the host computer 100 to the reset port RS of the scanner interface 302; 
the scanner interface 302 is reset and initialized. At this time, since 
the high level reset signal is inverted into a low level signal at the 
inverter 311, the flip-flip 313 is preset to output a high level signal 
from its output port Q and the flip-flop 314 is cleared to output a low 
level signal from its output terminal Q, whereby output signals of the OR 
gates 305 and 306 are determined by signals of the port 2Y.sub.2 of the 
multiplexer 307 and of the strobe port PC.sub.2 of the scanner interface 
302. 
Under these conditions, when the host computer 100 outputs a low level mode 
selection control signal at its input/output signal port IO.sub.3, a low 
level signal is outputted from the AND gate 301, thereby causing the 
scanner interface 302 to be enabled, and at this time the host computer 
100 outputs mode data AO (Hex) through its data ports D.sub.0 -D.sub.7 to 
set the scanner interface 302 to a strobe input/output mode. 
Thereafter, since the host computer 100 outputs a low level signal its 
input/output port IO.sub.2, a low level signal is outputted from the AND 
gate 301, thereby causing the scanner interface 302 to be enabled. And at 
the selection signal port SA.sub.O of the host computer 100, a low level 
signal is outputted and at the selection signal port SA.sub.1 thereof, a 
high level signal is outputted, thereby the control ports PC.sub.O 
-PC.sub.7 of the scanner interface 302 are selected. At this moment, the 
host computer 100 outputs preset mode data at its data ports D.sub.0 
-D.sub.7 so that high level preset mode signals are outputted from the 
mode control signal port PC.sub.4 of the scanner interface 302. The high 
level preset mode signal is applied to the preset/scanner port PR/SC of 
the scanner 200, thereby causing the scanner 200 to be a preset mode, and 
since the high level preset mode signal is inverted into a low level 
signal at the inverter 304, the buffer 303 is enabled so that the input 
port A thereof is connected to its output port Y, and the input ports 
1A.sub.1 -1A.sub.3 of the multiplexer 307 are connected to the output 
ports 1Y.sub.1 -1Y.sub.3 thereof. At this time, the host computer 100 
outputs a low level signal at its input/output port IO.sub.O, thereby 
causing the scanner interface 302 to be enabled and at the selection 
signal ports SA.sub.0 and SA.sub.1 thereof, low level signals are 
outputted, thereby causing the output ports PA.sub.O -PA.sub.7 of the 
scanner interface 302 to be selected, and then the scanner interface 302 
becomes a write state by the low level write signal being outputted from 
the write signal port IOW of the host computer 100. 
Thus, the scanner interface 302 receives through its data ports D.sub.0 
-D.sub.7 as an input the data being outputted from the data ports D.sub.0 
-D.sub.7 of the host computer 100 and outputs them through its output 
ports PA.sub.O -PA.sub.7, and the data from the output ports PA.sub.O 
-PA.sub.7 of the scanner interface 302 are applied to the data ports 
D.sub.1 -D.sub.8 of the scanner 200 through the buffer 303. 
And, at the time that the low level write signal is inverted into a high 
level signal, low level signals are outputted from the interrupt signal 
port PC.sub.3 and output buffer full port PC.sub.7 of the scanner 
interface 302 and the low level signals are applied to the busy port BY 
and strobe port ST of the scanner 200 through the ports 1A.sub.3, 1Y.sub.3 
and 1A.sub.1, 1Y.sub.1 of the multiplexer 307, thereby the scanner 200 
receives and processes the data being applied to its data ports D.sub.1 
-D.sub.8. 
After the data are inputted to the scanner 200, a low level interrupt 
acknowledge signal is outputted through its port RS and since this low 
level interrupt acknowledge signal is applied via ports 1A.sub.2 and 
1Y.sub.2 of the multiplexer 307 to the acknowledge port PC.sub.6 of the 
scanner interface 302, a high level signal is outputted from the interrupt 
signal port PC.sub.3 and output buffer full port PC.sub.7 thereof at the 
time that the low level acknowledge signal becomes a high level signal, 
thereby causing the scanner interface 302 to be initialized. 
In this state, the host computer 100 selects the control ports PC.sub.0 
-PC.sub.7 of the scanner interface 302, as above described, to identify 
that the scanner 200 read the data by checking the condition of the 
acknowledge port PC.sub.6. That is, at this time, when the acknowledge 
port PC.sub.6 is in a high level state, it means that the scanner 200 read 
the data, so that the host computer 100 may record the data in the scanner 
interface 302. 
When the host computer 100 finishes to transmitting all the data to the 
scanner 200 via the scanner interface 302, a low level signal is outputted 
from the input/output port IO.sub.2 of the host computer 100, thereby 
causing the scanner interface 302 to be enabled, and a low level signal is 
outputted from the selection signal port SA.sub.0 of the host computer 100 
and a high level signal is outputted from the selection signal port 
SA.sub.1 so that the control ports PC.sub.0 -PC.sub.7 of the scanner 
interface 302 is selected. At this moment, scanner mode data are outputted 
from the data ports D.sub.0 -D.sub.7 of the host computer 100 so that a 
low level scanner mode signal is outputted from the mode control signal 
port PC.sub.4 of the scanner interface 302. This low level scanner mode 
signal is applied to the preset/scanner port PR/SC of the scanner 200, 
thereby causing the scanner 200 to be in a scanner mode, and since the low 
level scanner mode signal is inverted into a high level signal at the 
inverter 304, the buffer 303 is disabled and the multiplexer 307 is in a 
state that its input ports 2A.sub.2 and 2A.sub.3 are connected to the 
output ports 2Y.sub.2 and 2Y.sub.3 thereof. 
When the scanner 200 outputs data through its data ports D.sub.1 -D.sub.8 
to the input ports PB.sub.O -PB.sub.7 of the scanner interface 302, a low 
level signal is outputted from the strobe port ST of the scanner and 
applied to one side input port of the OR gate 305 through the ports 
2A.sub.2 and 2Y.sub.2 of the multiplexer 307 and also a low level signal 
is outputted from the output port Q of the flip-flop 314, so that a low 
level signal is outputted from the OR gate 305 and applied to the strobe 
port PC.sub.2 of the scanner interface 302, thereby a high level signal is 
outputted from the input buffer full port PC.sub.1 of the scanner 
interface 302. This high level signal is applied via the OR gate 306 and 
the ports 2A.sub.3 and 2Y.sub.3 of the multiplexer 307 to the busy port BY 
of the scanner 200 so that the scanner 200 does not transmit data. At this 
moment, the host computer 100 selects the control ports PC.sub.O -PC.sub.7 
of the scanner interface 302, as described above, and checks the condition 
of the strobe port PC.sub.2 and then reads, when the strobe port PC.sub.2 
is in a low level state, the data inputted in the input ports PB.sub.O 
-PB.sub.7. 
That is, at this time, a low level signal is outputted from the 
input/output port I0.sub.1 of the host computer 100, thereby causing the 
scanner interface 302 to be enabled, and also a high level signal is 
outputted from the selection signal port SA.sub.0 and a low level signal 
is outputted from the selection signal port SA.sub.1, thereby causing the 
input ports PB.sub.O -PB.sub.7 of the scanner interface 302 to be 
selected. At this time, the scanner interface 302 becomes a read state by 
the low level read signal being outputted at the read signal port IOR of 
the host computer 100, thereby the data inputted in the input ports 
PB.sub.O -PB.sub.7 of the scanner interface 302 are outputted through the 
data ports D.sub.0 -D.sub.7 and then stored in the hard disk. 
In addition, since the low level signal being outputted from the 
input/output port I0.sub.1 of the host computer 100 is applied to the 
clock port CK of the latch 312 as a clock signal, the data outputted at 
the data ports D.sub.0 -D.sub.7 of the scanner interface 302 are latched 
at the latch 312, and a low level signal outputted at the input/output 
port I0.sub.1 of the host computer 100 causes the flip-flop 313 to be 
cleared so as to output a low level signal through its output port Q and 
the flip-flop 314 to be preset so as to output a high level signal through 
its output port Q. 
The low level signal outputted at the output port Q of the flip-flop 313 is 
applied to the interrupt port INT of the microprocessor 400 as an 
interrupt signal, thereby the microprocessor 400 outputs a low level 
interrupt acknowledge signal through its interrupt acknowledge signal port 
IACK so that a high level signal is outputted again at the output port Q 
of the flip-flop 313. At this time the microprocessor 400 outputs a low 
level output demand signal through its output demand signal port P.sub.6 
so that the latch 312 is to be enabled, and then the data latched at the 
latch 312 is outputted through its output ports Q.sub.O -Q.sub.7 and 
applied to the data ports D.sub.0 -D.sub.7 of the microprocessor 400. Thus 
the microprocessor 400 stores the data being applied to its data ports 
D.sub.0 -D.sub.7 to the global memory 401 and compresses the data in 
accordance with the user's processing program and then stores the 
compressed data to the local memory 402. 
After completing the processing of data at the microprocessor 400, the 
microprocessor 400 outputs a low level completion signal through its 
completion signal port P.sub.5 and applies the signal to the clock port CK 
of the flip-flop 314. At this time, since the flip-flop 314 outputs a low 
level signal through its output port Q, then the scanner 200 is ready to 
transmit the next pixel data. 
That is, while a low level signal is outputted at the input buffer full 
port PC.sub.1 of the scanner interface 302 at the time that a low level 
read signal outputted at the read signal port IOR of the host computer 100 
is turned to a high level signal, a high level signal is already outputted 
at the output port Q of the flip-flop 314 as above described, so that a 
high level signal is outputted from the OR gate 306 and applied 
continuously to the busy port BY of the scanner 200, thereby the scanner 
200 can not transmit the next pixel data. Thereafter, when a low level 
signal is outputted at the flip-flop 314 as above described, a low level 
signal is outputted from the OR gate 306 and applied to the busy port BY 
of the scanner 200, thereby the scanner 200 then can transmit the next 
pixel data. 
As described above in detail, in accordance with the present invention, 
when scanned data is stored via a scanner interface unit to a hard disk of 
a host computer, the scanned data is latched at a latch and stored in 
another microprocessor, and until the microprocessor finishes the 
processing of the scanned data, the scanner does not transmit the next 
pixel data, so that the reliability of the product and the efficiency of 
the host computer can be enhanced. Also, the present invention is 
applicable to a document acknowledge system comprising a multiprocessor.