Laser detection device with a detection cell and detection circuit and methods of formation thereof

A laser detection device can be used to protect an integrated circuit. The device includes a detection cell having a buried channel of a first conductivity type extending in a substrate of the integrated circuit. The substrate is of a second conductivity type. The detection cell also has a first electrical connection coupling a first point in the buried channel to a supply voltage rail, and a second electrical connection coupled to a second point in the buried channel. A detection circuit is coupled to the second point in the buried channel via the second electrical connection and adapted to detect a fall in the voltage at the second point.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the priority benefit of French Patent application number 1659448, filed on Sep. 30, 2016, the contents of which is hereby incorporated by reference in its entirety to the maximum extent allowable by law.

TECHNICAL FIELD

The present disclosure relates to the field of integrated circuits protected from laser attacks.

BACKGROUND

Certain devices, such as payment card chips and SIM (subscriber identity module) cards, are likely to store or process sensitive data that should be kept secret. Examples of sensitive data include encryption keys or other data processed during a cryptographic operation. A fraudster attempting to access the sensitive data may use a laser, generally applied to the back side of the integrated circuit, to introduce electrical disturbances in the circuit during its operation, which then allows information regarding the sensitive data to be discovered.

It has been proposed to provide detection devices for detecting the presence of such laser attacks. When an attack is detected by such a detection device, a counter measure can be triggered, which may for example involve resetting the device and/or the destruction of the sensitive data. The device may even be permanently disabled if for example a certain number of attacks are detected within a relatively short time interval.

A drawback of existing detection devices for detecting laser attacks is that they tend to be ineffective for certain types of laser attacks, and/or occupy a relatively large chip area.

SUMMARY

According to one aspect, there is provided a laser detection device for protecting an integrated circuit. The device includes a detection cell having a buried channel of a first conductivity type extending in a substrate of the integrated circuit. The substrate is of a second conductivity type. The detection cell also has a first electrical connection coupling a first point in the buried channel to a supply voltage rail, and a second electrical connection coupled to a second point in the buried channel. A detection circuit is coupled to the second point in the buried channel via the second electrical connection and adapted to detect a fall in the voltage at the second point.

According to one embodiment, the buried channel has a width equal to or less than 1.5 μm.

According to one embodiment, the second point of the buried channel is connected to the first point via a first portion of the buried channel, and to a second portion of the buried channel.

According to one embodiment, the second portion is in the form of a spiral.

According to one embodiment, the buried channel is at a depth of at least 3 μm.

According to one embodiment, the detection circuit comprises a high resistance path between the second electrical connection and the supply voltage rail, and a transistor having its control node coupled to the second electrical connection.

According to one embodiment, the high resistance path comprises at least one diode.

According to one embodiment, the detection cell has a surface area of less than 100 μm2.

According to a further aspect, there is provided an integrated circuit comprising a plurality of the above laser detection devices distributed across the integrated circuit.

According to one embodiment, the integrated circuit further comprises: a first layer of n-type and p-type wells comprising transistor devices; and buried wells of the first conductivity type formed in a further layer at a greater depth than the first layer, the buried channel being at a greater depth than the further layer.

According to one embodiment, the detection circuit is implemented in the first layer.

According to one embodiment, the integrated circuit further comprises a protection circuit coupled to an output of the detection circuit of each laser detection device and adapted to implement a counter measure if a laser is detected by one of the detection devices.

According to a further aspect, there is provided a method of forming a laser detection device for an integrated circuit, the method comprising: forming a buried channel of a first conductivity type extending in a substrate of the integrated circuit, the substrate being of a second conductivity type; forming a first electrical connection coupling a first point in the buried channel to a supply voltage rail; forming a second electrical connection for coupling a second point in the buried channel to a detection circuit adapted to detect a fall in the voltage at the second point.

According to one embodiment, the buried channel is formed to have a width equal to or less than 1.5 μm.

DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS

Throughout the following description, the term “connected” is used to designate a direct connection between circuit elements, whereas the term “coupled” is used to designate a connection that may be direct, or may be via one or more intermediate elements such as resistors, capacitors or transistors. The term “approximately” is used to designate a tolerance of plus or minus 10 percent of the value in question.

Relative terms that depend on an orientation of the device, such as “top”, “bottom”, “above”, “below”, “vertical” and “horizontal”, should be interpreted herein with the device orientated as shown in the figures.

FIG. 1Ais a plan view of an integrated circuit100comprising laser detection circuits102positioned at regular intervals across its surface. For example, the laser detection circuits102are spaced apart by distances of between 50 and 100 μm. Each circuit102is for example capable of detecting a laser pulse hitting the integrated circuit within a corresponding zone represented by circles104inFIG. 1A, for the case of a laser pulse having a duration of approximately 100 ns. It can be seen that the vast majority of the surface area of the integrated circuit is covered by the detection zones of the detection circuits102.

FIG. 1Bis a plan view of the integrated circuit100and laser detection circuits102ofFIG. 1Ain which detection zones106of each detection circuit102correspond to the case of a relatively short laser pulse of approximately 30 ps. Indeed, the present inventors have found that laser attacks using relatively short laser pulses are detectable only relatively close to the impact point. The result is that a significant portion of the surface area of the integrated circuit is no longer covered by the detection zones106of the detections circuits102.

To address this issue, one option that could be considered would be to simply increase the density of the detection circuits. However, this would result in more chip area being occupied, leaving less chip area available for implementing the desired functions of the circuit.

FIG. 2Ais a plan view of a detection cell200of a laser detection device according to an example embodiment. The detection cell200for example comprises a doped channel202formed as a buried n-type well within a silicon substrate203, which is for example a p-type substrate. The detection cell200for example has width and length dimensions of between 2 and 10 μn, and for example of approximately 5 μm. Thus the surface area of the detection cell200is for example less than 100 μm2. The n-type channel202for example has a width w of around 1 μm, for example in the range 0.8 to 1.5 μm, and the gaps g between the portions of the channel are of around 1 μm, for example in the range 0.8 to 1.5 μm.

Two points along the n-type channel202are for example electrically connected to a detection circuit (not illustrated inFIG. 2A). For example, a first point along the channel is connected to the detection circuit via an n-type well204and a contact206. A second point along the channel is for example connected to the detection circuit via an n-type well208and a contact210. The length1of the n-type channel between the n-type wells204and208is for example in the range 2 to 15 μm. The n-type channel between the n-type wells204,208for example provides a relatively high resistance path between the contacts206,210, for example of at least 1 kohm.

In the example ofFIG. 2A, the n-type channel202is in the form of a spiral, although in other embodiments other forms would be possible. The spiral ofFIG. 2Ais for example formed of straight sections, facilitating the implantation step used to form the n-type channel202. The points at which the channel202is connected to the detection circuit are for example at opposite ends of a straight portion212of the spiral. A further portion214of the spiral extends from the n-type well208to an end point216of the spiral close to the centre of the detection cell200.

In operation, a supply voltage VDD is for example applied to the contact206, and the contact210is for example clamped to a voltage at or close to the supply voltage VDD via a high resistance path. In view of the similarity between the voltages at the contacts206,210, only a relatively low current will flow through the n-type channel under normal conditions, and the voltage at the contact210will thus remain close to the voltage VDD. However, when a laser beam passes through the silicon substrate in the vicinity of the detection cell200, electron/hole pairs will be generated. The holes will be conducted to ground via the p-type substrate, and the electrons will be attracted to the n-type channel202, causing a current to flow from the contact210to ground via the portion214of the channel. This will in turn lead to a voltage drop at the contact210, which can be detected by the detection circuit. Indeed, the voltage at the contact210will equal VDD-R*I, R being the resistance between the contacts206,210, and I being the generated current. In the example that R is equal to approximately 3 k ohm, a generated current of 200 μA in the channel will thus result in a voltage at the contact210of approximately 0.6 V below VDD.

The form of the n-type channel202is for example such that there are n-type and p-type regions in relatively close proximity across the detection cell200, facilitating the conduction of the current, and thereby providing a relatively sensitive device. A spiral formation provides one such arrangement providing n and p-type regions in close proximity, but other formations of one or more n-type channels extending within the cell200would also be possible.

FIG. 2Bis a cross-section view of the structure ofFIG. 2A, taken along a line A-A passing along the portion212and through the n-type wells204,208.

The top of the buried n-type channel202is for example at a depth d1of between 3 and 6 μm below the surface of the silicon structure. The channel202for example has a thickness t1of between 1 and 3 μm. The buried channel202is for example coupled to the contact206via a buried n-type well217, and the n-type well204. Similarly, the buried channel202is for example coupled to the contact210via a buried n-type well218and the n-type well208. The buried n-type wells217,218for example have a thickness t2of between 1 and 3 μm, and the n-type wells204,208for example have a thickness t3of between 1 and 2 μm.

The n-type wells204,208are for example formed within a layer220comprising p-type and n-type wells of the integrated circuit, in which transistor devices are formed (not illustrated in the figures). For example, the n-type wells204,208are separated by p-type wells221,222respectively neighboring the wells204,208, and by an n-type well224separating the p-type wells221,222. In alternative embodiments, the n-type wells204,208could be separated by a single p-type well.

A spacing226, between the buried n-type channel202and the n-type well224and in which the p-type substrate203is for example present, provides electrical isolation between these n-type regions. This spacing is for example of at least 1 μm. The buried n-type wells217,218connecting the n-type wells204,208respectively to the buried channel202are for example in a layer226between the layer220and a layer228of the buried channel.

FIG. 3schematically illustrates a detection circuit300according to an example embodiment. The buried channel202is represented by resistors212and214respectively representing the channel portion212between the contacts206,210, and the channel portion214coupled to the contact210. The contact206is for example coupled to a VDD supply voltage rail, and the contact210is for example clamped to the VDD supply voltage rail via one or more diodes. In the example ofFIG. 3, there are two such diodes302,304coupled in series, the anode of the diode302being connected to the VDD supply rail, and the cathode of the diode304being connected to the contact210. In some embodiments, the diodes302,304are formed vertically in n-type well208. In alternative embodiments, the high resistance path between the contact210and the VDD supply rail could be implemented by alternative means, such as by a resistor having a relatively high resistance.

The contact210is also coupled to the control node of a transistor306. For example, the transistor306is a p-channel MOS transistor, and the contact210is connected to its gate. The transistor306is for example coupled by its main conducting nodes between the VDD supply rail and a further node308. The node308is for example coupled to a ground rail via the main conducting nodes of a reset transistor310, and to the clock input of a D-type flip-flop312. A data input D of the flip-flop312is for example coupled to the VDD supply rail, and the output Q of the flip-flop is connected to a line314providing an alert signal when a laser is detected.

In operation, in the absence of a laser beam, the voltage at the contact210will remain close to the supply voltage VDD, and the transistor306will be non-conducting. The voltage308is for example low, having been reset by the reset transistor310. When a laser beam falls on the detection cell200, a current will be conducted by the n-type channel202, flowing through the portions212,214of the channel. Thus the voltage at the contact210will be pulled down, and the transistor306will be activated, causing the voltage at the node308to rise. The flip-flop312will thus clock the high logic level at its data input D to its data output Q, triggering the alert signal.

FIG. 4is a graph illustrating an example of the performance of the detection cell200ofFIGS. 2A and 2Bas observed by the present inventors. A curve400indicates the minimum levels of the amplitude and duration of current pulses generated by a laser beam that will trigger the detection circuit. As illustrated, most pulses having a duration of at least 50 ps are detected, and for pulses having an amplitude of at least 100 μA, a pulse duration as low as 20 ps can be detected.

FIG. 5schematically represents an integrated circuit500comprising a regular distribution of laser detection devices as described herein. As illustrated, each laser detection device comprises a detection cell200, coupled to a detection circuit300via the contacts206,210. Furthermore, the output lines of the detection circuits300are for example coupled to a protection circuit502. For example, the outputs of the detection circuits300are coupled to the protection circuit502via an OR tree. The protection circuit502is for example configured to implement a counter measure if one or more of the detection circuits300detects a laser attack. The counter measure may for example involve resetting all or part of the integrated circuit, the destruction of sensitive data, etc.

FIG. 6Ais a plan view of the detection cells200of the integrated circuit500ofFIG. 5according to an example embodiment in which the buried n-type channels have a different form from a spiral. However, as with the spiral embodiment, the contacts210of each detection cell are for example positioned at an intermediate node between the portions212and214of the channel.

An advantage of the detection cell200proposed herein is that it is formed in a silicon level below the standard devices of the integrated circuit, and thus the detection cells200can be formed relatively close together without significantly reducing the available chip area. For example, the cells are spaced by a spacing s of only one or several μm from each other.

FIG. 6Bis a cross-section view of the structure ofFIG. 6Ataken along a line B-B passing through the portion212of the buried channel of each detection cell. Each detection cell200has a cross-section similar to the one shown inFIG. 2B, and will not be described again in detail. In the example ofFIG. 6B, the n-type wells204,208of each detection cell are for example separated from the n-type wells208,204of the adjacent cells by a single p-type well602.

FIG. 7is a flow diagram illustrating an example of steps in a method of forming a laser detection device for an integrated circuit according to an example embodiment of the present disclosure.

In a step701, one or more buried n-type channels are formed, which are for example at a depth that is deeper than the n-type wells of the integrated circuit, and for example at least 1 μm below the n-type wells.

In a step702, electrical connections are formed with first and second points of the buried channel. For example, buried n-type wells are formed for coupling each of the first and second points to a surface n-well of the integrated circuit, and contacts206,210are formed as described above.

In a step703, the first and second points of the buried channel are coupled, via the electrical connections, to a detection circuit adapted to detect a voltage drop at the second point.

An advantage of the embodiments described herein is that the detection cell of the laser detection device is particularly sensitive, and can be triggered by relatively short laser pulses. Furthermore, a relative high density of detection devices can be formed while maintaining a high chip area for the other devices of the integrated circuit.

Having thus described at least one illustrative embodiment, various alterations, modifications and improvements will readily occur to those skilled in the art. For example, while the embodiments described herein comprise an n-type channel buried in a p-type substrate, it will be apparent to those skilled in the art that in alternative embodiments the opposite conductivity types could be used for the buried channel and the substrate, the channel being p-type and the substrate being n-type.

Furthermore, it will be apparent to those skilled in that art that whileFIGS. 5 and 6describe an integrated circuit having ten laser detection devices, in practice the number of detection devices will depend on the size of the integrated circuit, and could be equal to hundreds, thousands, or even tens of thousands of detection devices distributed across the integrated circuit.