Noise reducing circuit arrangement

A circuit arrangement comprising a set of signal layers, a set of first power layers, a set of second power layers, a set of signal vias, a set of first power vias, a set of second power vias, wherein a signal via of the set of signal vias provides a signal path for a high-frequency (HF) signal current, wherein at least a power via of the set of first power vias and at least a power via of the set of second power vias provide return paths for return currents associated with the signal current, wherein the return path provided by the power via of the set of second power vias is connected with a power layer of the set of second power layers, wherein at least one power layer of the set of first power layers is arranged between the power layer of the set of second power layers and each signal layer of the set of signal layers.

BACKGROUND OF THE INVENTION

The present invention relates to a circuit arrangement.

Circuit arrangements can be regarded as electric or electronic circuits implemented on a particular structure, e.g. on a printed circuit board, a single-chip module (SCM) or a multi-chip module (MCM). A circuit arrangement is a sandwiched structure which comprises signal layers that are sandwiched between ground and voltage layers.

In more complex circuit arrangements, e.g. on circuit boards for computer systems, there is a need to supply the circuit arrangement with more than two voltage levels as represented by the nominal supply voltage and ground, so that very often, a third voltage level or even more voltage levels must be implemented on a circuit board. The voltage layers may therefore relate to different potentials with respect to ground. The nominal supply voltage is very often denoted as VDD, and the other above mentioned third voltage level is often denoted as V3. For example, the ground voltage can be at 0 Volt, VDD can be at 1.8 Volt, and V3can be set to 1.5 Volt.

The voltage layers, also referred to in the following as power layers, might consist of a layer of electrically conductive material. A special kind of voltage layer is the ground layer which is at a potential of 0 Volt. In contrast to the voltage and ground layers, the signal layers of a circuit board comprise signal wires that are used to carry high-frequency electric currents. A signal via corresponds to one or more signal wires that run in essence perpendicular to the sandwiched layer structure and that connect wires of different signal planes. If a signal via penetrates a voltage plane or a ground plane, a so called void or anti-pad is generated to avoid shorting the signal carried by the signal via to the ground or power plane.

US published application 2007/0111576 A1 discloses a circuit on a printed circuit board comprising wiring dedicated to supply electric board components which comprises at least three different reference planes characterized by capacitance provided for a given signal wiring in a discontinuity section, wherein the discontinuity causes a broken high-frequency return path of the current signal wiring, and wherein the capacitance is formed by a voltage island placed within a signal layer located next to the given signal wiring.

The voltage islands placed within a signal layer has the disadvantage that they impact the wiring capabilities of the circuit boards or circuit cards, especially in space limited areas. The usage of voltage islands within circuit boards or within circuits comprised on circuit boards is therefore not generally applicable.

SUMMARY OF THE INVENTION

It is therefore an object of an embodiment of the invention to provide an improved circuit arrangement for, e.g., a circuit board.

According to an aspect of an embodiment of the invention, there is provided a circuit arrangement. In accordance with an embodiment of the invention, the circuit arrangement comprises a set of signal layers, a set of first power layers, a set of second power layers, a set of signal vias, a set of first power vias, and a set of second power vias. A signal via of the set of signal vias provides a signal path for a high-frequency (HF) signal current. At least a power via of the set of first power vias and at least a power via of the set of second power vias provide return paths for return currents associated with the signal current. The return path provided by the power via of the set of second power vias is connected with a power layer of the set of second power layers. At least one power layer of the set of first power layers is arranged between the power layer of the set of second power layers and each signal layer of the set of signal layers.

The return path for the return current flowing through the power via of the set of second power vias comprises a discontinuity. The discontinuity occurs when this return current flows in form of a displacement current from a power via of the first set of power vias or from a power layer of the set of first power layers to the power via of the set of second power vias or to the power layer of the set of second power layers to which the power via of the set of second power vias is connected. The displacement current generates an electromagnetic (EM) wave that travels in the dielectric region through which the displacement current flows. The circuit arrangement in accordance with the invention is designed so that the discontinuity lies between the power layer of the set of second power layers and the power layer of the set of first power layers. There is no signal layer sandwiched in between these layers. Thus, the EM wave is confined between the power layer of the set of second power layers and the power layer of the set of first power layers and does not have any effect on the signal wires of a signal layer. In particular, the signal wires would act as little antennas that would draw energy out of the EM wave which would result in noise in the signal wires. In other words, the EM wave would couple into the signal wires and generate noise therein. Due to the circuit arrangement in accordance with the invention, this effect does however not occur.

In accordance with an embodiment of the invention, the power layer of the set of second power layers is bordered at the bottom and/or at the top by power layers of the set of first power layers. The circuit arrangement can thus comprise multiple and single reference regions. In particular, the power layer of the set of second power layers define the multiple reference regions at the top and/or bottom and the power layers of the set of first power layers define a single reference region at the centre of the arrangement.

In accordance with an embodiment of the invention, the power layer of the set of second power layers is embedded in power layers of the set of first power layers.

In accordance with an embodiment of the invention, the power via of the second set of power via ends at the power layer of the set of second power layers, wherein a power via of the first set of power vias ends at the power layer of the first power layer bordering the power layer of the set of second power layers, wherein the power via of the first set of power vias and the power via of the second set of power vias face each other.

A discontinuity of the return path of a return current that flows through the power via of the second set of power via lies between the power via of the second set of power vias and the power via of the first set of power vias. As there is no signal layer located between the power layer of the set of first power layers and the power layer of the set of second power layers, the EM wave generated by the displacement current flowing through the discontinuity is not able to couple into a signal wire of the signal layer.

In accordance with an embodiment of the invention, each signal layer of the set of signal layers is bordered by layers of the set of first power layers and each layer of the set of second power layers is separated from each signal layer by at least a layer of the set of first power layers.

Preferably, the power layers of the set of first power layers relate to ground layers. Thus, each signal layer is bordered by ground layers. Voltage layers of the circuit arrangement relate then to the set of second power layers and are separated from the signal layers so that at least one ground layer is situated between each voltage layer and each signal layer.

In accordance with an embodiment of the invention, each layer of the set of second power layers is bordered by layers of the set of first power layers. Thus, the signal layers are separated from the second power layers since at least a layer of the set of first power layers, which is preferably a ground layer, is placed in between a layer of the set of second power layers, which is preferably a voltage layer, and a signal layer.

In accordance with an embodiment of the invention, a signal via of the set of signal vias is adapted to provide an electric connection for a signal wire of a signal layer of the set of signal layers, wherein a power via of the set of first power vias is adapted to provide an electric connection for a power layer of the set of first power layers, and wherein a power via of the set of second power vias is adapted to provide an electric connection for a power layer of the set of second power layers, wherein the signal vias and power vias of the sets of first and second power layers pass through voids in the layers to which the signal and power vias are not connected.

In accordance with an embodiment of the invention, the power layers of the set of first power layers relate to ground layers. The power layers of the set of second power layers relate to voltage layers. The power vias of the set of first power vias relate to ground vias and the power vias of the set of second power vias relate to voltage vias.

In accordance with an embodiment of the invention, the power layers of the set of first power layers and of the set of second power layers comprise electrically conductive solid planes.

In accordance with an embodiment of the invention, the power layers of the set of first power layers and of the set of second power layers comprise electrically conductive mesh planes. Each power layer comprises an electrically conductive mesh instead of a solid plane.

According to another aspect of the invention, there is provided a printed circuit board (PCB) comprising the circuit arrangement in accordance with the invention.

According to another aspect of the invention, there is provided a single chip module (SCM) comprising the circuit arrangement in accordance with the invention.

According to a further aspect of the invention, there is provided a multichip module (MCM) comprising the circuit arrangement in accordance with the invention.

According to another aspect of the invention, there is provided a computer system comprising the circuit arrangement in accordance with the invention.

DETAILED DESCRIPTION

FIG. 1shows a schematic cross sectional view of a circuit arrangement100. The circuit arrangement100comprises a signal layer102, ground layers104and106, and voltage layers108and110. The ground layers104and106are interconnected with each other by so called ground vias112and114. The ground via112passes the voltage layers108and110through voids in these layers.

A signal via116connects the signal layer102with, e.g., another signal layer not show inFIG. 1. In particular, the signal layers102comprises signal wires so that the signal via116provides an electric connection for a signal wire of the signal layer102with a signal wire of the other signal layer not shown here.

The voltage layer108is further connected with a voltage via118and the voltage layer110is connected with a voltage via120. The voltage vias118and120provide electric connections for the voltage layers108and110, respectively, with another region of the arrangement, e.g., a power domain. The voltage layers108and110are at different potentials and the voltage via118passes through a void in the voltage layer110.

The signal via116provides a signal path for a high frequency (HF) signal current122. The signal current122is depicted as arrow and flows for example in the downward direction. The HF signal current122generates due to electromagnetic induction a return current124in the ground via112and a return current126in the voltage via118as indicated by the arrows. Locally, the return currents124,126are directed opposite to the signal current122, but the return currents124,126travel along with the signal current122.

With regard to the return current124, the signal via116and the ground layer106provide a closed return path for the return current124when the associated signal current122travels along the signal via116and then in the signal layer102.

In contrast thereto, the signal path of the return current126comprises a discontinuity between the voltage via126and the ground via114. The return current126“flows” as displacement current128through the dielectricum located between the voltage layer108and the ground layer104and then further on through the ground via and/or through the ground plane104.

The HF displacement current128can be regarded as a little antenna which emits an electromagnetic (EM) wave130that propagates in the dielectricum between the ground layer104and voltage layer108. The circuit arrangement100is particularly advantageous as the ground layer104is arranged between the voltage layer108and the signal layer102so that the EM wave130generated by the displacement current128in the dielectricum between the layers104and108does not have any effect on the signal wires of the signal layer102. In particular, the signal wires can be regarded as little antennas that would draw energy out of the EM wave130which can be seen as unwanted noise in the signal wires of the signal layer102.

A person skilled in the art will appreciate that return currents might also be induced in other vias or layers. The arrangement in accordance with the invention is designed in a way that a discontinuity of a return path that is bridged by a return current in form of a displacement current is separated from a signal layer by at least a ground layer so that the EM wave generated by the displacement current cannot couple into signal wires on the signal layer.

FIG. 2shows a schematic cross sectional view of a circuit arrangement200. The circuit arrangement200comprises a signal layer202, ground layers204and206, and voltage layers208and210. The ground layers204and206are interconnected with each other by ground vias212and214. The voltage layers208and210are interconnected with each other by use of a voltage via216. Furthermore, the signal layer202is connected with a signal via218.

The ground vias212and214, the voltage via216, as well as the signal via218pass the various layers208-210through voids that prevent a shortage of the vias with the corresponding layers.

The signal layer202comprises signal wires that are for simplicity reasons not shown inFIG. 2. In particular, the signal via218is connected with one of the signal wires of the signal layer202and therefore provides a connection for this signal wire to for example another signal wire of another signal layer.

The signal via218and the wire to which the signal via218is connected can be regarded as a signal path for a HF signal current220. The HF signal current220flows for example in the signal layer202from right to left and then in an upward direction through the signal via218as indicated by the arrows.

The signal current220is accompanied by return currents222,224,226,228, and230through the ground layers204,206and the ground and voltage vias212,214, and216.

The return path for the return current230which is the return current flowing through the voltage via216when the HF signal current220travels from the signal layer202in the upward direction along the signal via218comprises a discontinuity as the return current230flows through the dielectricum between the layers204and208in form of a HF displacement current232.

The displacement current232generates an EM wave traveling in a radial manner in the dielectric region between the layer204and208. The attenuation of the EM wave scales as 1/SQRT(R), wherein SQRT refers to the square root of R, and wherein R is the radial distance from the discontinuity. The attenuation is therefore not very strong and the EM wave is therefore able to pass relatively large distances within the dielectric region between the layers204and208.

The arrangement200in accordance with the invention is particularly advantageous as no signal layer is comprised between the layers204and208so that the EM wave cannot couple into a signal wire and cause coupled noise therein. As the ground layer204is located between the voltage layer208and the signal layer202, the discontinuity of the return path is located between the voltage layer208and the ground layer204so that the EM wave is generated between the voltage layer208and the ground layer204and is therefore not able to couple into wires of the signal layer202. The ground layer204thus effectively shields the signal layers, and in particular the signal wires on the signal layer202from the EM wave.

A coupling of the generated EM wave in the signal via218passing through the dielectricum between the ground layer204and the signal layer208is negligible as the orientation of the signal via218with respect to the EM wave is such that the EM wave is not able to couple into the signal via218.

FIG. 3shows a schematic cross sectional view of another circuit arrangement300. The circuit arrangement300comprises signal layers302and304. The circuit board300comprises ground layers306,308,310,312, and314. The circuit board300also comprises voltage layers316and318. The signal layer302is connected with a signal via320. The ground layers306-314are interconnected by use of ground vias322and324. The voltage layers316and318are interconnected by use of a voltage via326. The signal via320, the ground vias322and324as well as the voltage via326pass through voids in the corresponding layers that are intermediate to the layers that are interconnected by the corresponding vias.

The vias320,322,324, and326provide electric connections for the corresponding layers with, e.g., a power domain of the arrangement300not shown inFIG. 3.

The layered structure of the circuit arrangement300is such that the signal layer302is bordered by ground layers308and310and that the signal layer304is bordered by the ground layers310and312. Thus, the voltage layers316and318are separated from each of the signal layers302and304by at least an intermediate ground layer. For example, the ground layer308is intermediate with respect to the signal layer302and the voltage layer316. This has the advantage, that a signal layer302,304will be effectively shielded from disturbing HF-EM waves generated by displacement currents that bridge a discontinuity in the return path for a return current that flows from a ground layer/via to a voltage layer/via and that is accompanying a HF signal current in the signal via320and/or in the signal layer302or304.

For example, a HF signal current traveling from the signal layer302along the signal via320in the upward direction will cause a return current in the ground vias322and324and in the voltage via326. However, the return path for the return current in the voltage via326comprises a discontinuity as the return current must “pass” the dielectricum between the ground layer308and the voltage layer316and/or between the ground layer306and the voltage layer316in form of displacement currents. The EM waves emitted by the HF displacement currents are confined in the dielectrica between the voltage plane316and the ground plane308and between the voltage plane316and the ground plane306. The EM waves will therefore not couple into signal wires of the signal planes302and304and thus no noise is generated by the EM waves in the signal wires.

The voltage layer316is furthermore placed at the top of the arrangement300and the voltage layer318is located at the bottom of the arrangement300. At the top and at the bottom, the arrangement300can be regarded as a multiple reference system because the voltage layers and the ground layer provide different potentials. In contrast, the center of the circuit arrangement300can be regarded as a single reference system as only the ground layers308,310, and312being at ground provide a reference potential. The arrangement in accordance with the invention is particularly advantageous as it allows grouping the layers into multiple and single reference systems which can be interconnected by vias.

FIG. 4shows a schematic cross sectional view of yet another circuit arrangement400. The circuit arrangement400comprises signal layers402,404, and406. The circuit arrangement400further comprises ground layers408,410,412, and414and voltage layers416and418. The signal layer402is connected with a signal via420which is not connected with the signal layers404and406and that passes the ground layers408-414and the voltage layers416and418through voids in these layers. The ground layers408-414are interconnected by ground vias422and424. The voltage layer416is connected with a voltage via426and the voltage layer418is connected with a voltage via428. The ground vias422and424and the voltage vias426and428pass, as the signal via420does, through other layers of the circuit arrangement400by use of voids in the corresponding layers.

Each signal layer of the circuit arrangement400is separated from a voltage layer by at least a ground layer in order to provide an effective shielding from a disturbing HF EM wave that might be generated by a displacement current flowing in a discontinuity of a return path of a return current accompanying a HF signal current.

Moreover, the voltage layers416and418are arranged at the top of the circuit arrangement400so that this inhomogeneous multi reference region is separated from the single reference region below the ground layer408.

FIG. 5shows a schematic cross sectional view of a circuit arrangement comprising a first circuit board500that is connected with a second circuit board502via a connector504. The first circuit board500comprises ground layers506and508and a signal layer510sandwiched in between. The second circuit board502comprises ground layers512and514and a signal layer516sandwiched in between. The first circuit board500also comprises ground vias518and520and a signal via522that also pass through the circuit board502. The signal via522therefore interconnects the signal layer510with the signal layer516and the ground vias518and520interconnect the ground layers of each board.

In order to interconnect the signal via522and the ground via518and520of both boards, the signal via522and the ground via518and520of the first circuit board500are adapted to be linked with pins of the connector504and the signal via522and the ground vias518and520of the second circuit board502are also adapted to be connected with the corresponding pins of the connector504. Thus, the connector502basically comprises the pins for interconnecting the signal vias and ground vias of both circuit boards with each other.

When a HF signal current is flowing from signal plane510to signal plane516as indicated by the arrows in the signal planes510,516and signal via522, a HF electromagnetic field is generated as indicated by the circles around the arrows. The HF electromagnetic field induces a HF return current in the adjacent ground planes506,508,512,514and ground vias518,520as indicated by the arrows in these planes and vias. The flow of the HF return current is locally directed opposite to the flow of the HF signal current, but the HF return current accompanies the HF signal current when flowing from signal plane510to516. The circuit arrangement comprising the circuit boards500and502is particularly advantageous as the boards500and502are adapted to receive the connector504which provides due to the arrangement of pins in the connector a close return path for the HF return current and therefore ensures that the HF return current can also travel from the first circuit board500to the second circuit board502.

FIG. 6shows a schematic cross sectional view of a circuit arrangement being implemented on a first circuit board600, a second circuit board602and a connector604. The first circuit board600is connected with the second circuit board602via the connector604.

The first circuit board600comprises ground layers606and608and a signal layer610sandwiched in between. The second circuit board602comprises ground layers612and614and a signal layer616as well as a signal layer618and a voltage layer620. It is for the moment assumed that the circuit board602does not comprise ground layers624and626that are visible inFIG. 6.

The first circuit board600also comprises ground vias628and630and a signal via622that pass also through the circuit board602. The signal via622therefore interconnects the signal layer610with the signal layer616and the ground vias628and630interconnect the ground layers of each board.

In order to interconnect the signal via622and the ground via628and630of both boards, the signal via622and the ground vias628and630of the first circuit board600are linked via pins of the connector604with the corresponding signal via622and the ground vias628and630of the second circuit board602.

When a HF signal current is flowing from signal plane610to signal plane616as indicated by the arrows in the signal planes and signal via, a HF electromagnetic field is generated as indicated by the circles around the arrows. The electromagnetic field induces a HF return current in the adjacent ground planes606,608,614, in the voltage layer620(for the moment, it is assumed that the ground layer624is not present) and in the ground vias628,630as indicated by arrows in these planes and vias. The flow of the HF return current is locally directed opposite to the flow of the HF signal current, but the guided HF return current accompanies the HF signal current.

The return current in the ground vias and ground planes is a wanted return current as its presence is required in order for the HF signal being able to travel from signal plane610to signal plane616.

The HF signal current induces however also an “unwanted” return current in the signal voltage layer620which is traveling along with the signal current. The return path of this return current comprises a discontinuity as the return current must flow from ground to the voltage layer620by use of a displacement current which generates EM waves that are confined in the dielectrica between the ground layer614and the voltage layer620and between the ground layer612and the voltage layer620.

Thus, the signal layers616and618are affected by the EM waves and unwanted coupled noise is induced in the signal wires of these layers.

Considering the circuit board602with the ground layer626arranged in between the signal layer618and the voltage layer620and with the ground layer624arranged in between the signal layer616and the voltage layer620, the return current flows directly to ground vias628and630. Thus, the signal layers616and618are not affected by EM waves and unwanted coupled noise is not induced in the signal wires of these layers.

FIG. 7shows a schematic cross sectional view of another circuit arrangement700in accordance with the invention. The circuit arrangement700comprises signal layers702,704, and706. The circuit arrangement700further comprises ground layers708,710,712, and714and voltage layers716and718as well as voltage layers730and732. The signal layer702is connected with a signal via720which is not connected with the signal layers704and706and that passes the ground layers708-714and the voltage layers716and718and730and732through voids in these layers. The ground layers708-714are interconnected by ground vias722and724. The voltage layer716is connected with a voltage via726and the voltage layer718is connected with a voltage via728.

The voltage layer730is connected with a voltage via734and the voltage layer732is connected with a voltage via736.

The ground vias722and724and the voltage vias726,728and734,736pass, as the signal via720does, through other layers of the circuit arrangement700by use of voids in the corresponding layers.

Each signal layer is separated from a voltage layer by at least a ground layer in order to provide an effective shielding from disturbing HF-EM waves generated from displacement currents that “bridge” discontinuities in return paths of return currents that are induced by a HF signal current in the signal vias and/or layers.

Moreover, the voltage layers716and718are arranged at the top of the circuit arrangement700and the voltage layers730and732are arranged at the bottom of the circuit arrangement700. The voltage layers define multi reference regions of the circuit arrangement700, wherein the ground layers708-714define a single reference region of the arrangement700. The arrangement700is particularly advantageous as it allows for an arrangement of multi reference regions and single reference regions and therefore allows for the design of small and compact circuit arrangement. This is particularly important in order to ensure a relative high processing time when such an arrangement is incorporated in a chip module.