CMOS exponential function generating circuit with temperature compensation technique

Provided is a CMOS exponential function generating circuit capable of compensating for the exponential function characteristic according to temperature variations. The exponential function generating circuit includes an voltage scaler scaling the value of an external gain control voltage signal, an exponential function generating unit generating exponential function current and voltage in response to a signal output from the voltage scaler, a reference voltage generator providing a reference voltage to the exponential function generating unit, and a temperature compensator compensating for the exponential function characteristic according to temperature variations.

BACKGROUND OF THE INVENTION

This application claims the priority of Korean Patent Application No. 2003-97244, filed on Dec. 26, 2003, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.

1. Field of the Invention

The present invention relates to a voltage reference generating circuit, and more particularly, to a CMOS exponential function generating circuit with a temperature compensation technique

2. Description of the Related Art

In general, a variable gain amplifier (VGA), which is a block circuit in the component of an automatic gain controlled (AGC) circuit, provides a variable gain that is linearly proportional to the applied control voltage on a decibel (dB) scale.

When designing a variable gain amplifier, the most important thing that has to be considered is the possibility of accurately controlling a gain according to an applied control voltage. Such gain control is enabled by an accurate exponential function as the relationships between current and voltage of a bipolar transistor embedded within the variable gain amplifier.

In addition, a conventional variable gain amplifier is composed of CMOS circuits which allow this amplifier to be easily and conveniently integrated with other circuits, and the gain is adjusted by an exponential the characteristics of a parasitic bipolar transistor in the CMOS process technology.

However, in the CMOS variable gain amplifier, the value of a threshold voltage of a metal oxide semiconductor (MOS) device is changed due to a process deviations, temperature variations, and noises of a power supply voltage. Therefore, since the values of both an input signal and an output signal of the CMOS variable gain amplifiers are limited, it is difficult to smoothly operate the CMOS variable gain amplifier. In other words, since the operation of the CMOS variable gain amplifier depends highly on process variables, temperature, and a power supply voltage, it is very difficult for the variable gain amplifier with an accurate exponential function to be integrated.

SUMMARY OF THE INVENTION

According to an aspect of the present invention, there is provided a CMOS exponential function generating circuit with a temperature compensation technique, which includes a voltage scaler which adjusts the level of an scaled voltage signal for proper operation of bipolar transistor, an exponential function generator which generates exponential function current according to an output signal from the voltage adjuster, a reference voltage generator which applies a reference voltage to the exponential function generator, and a temperature compensator which compensates for the exponential function according to a temperature variations.

DETAILED DESCRIPTION OF THE INVENTION

The above and other features and advantages of the present invention will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings. While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present invention.

FIG. 1is a schematic diagram of a voltage generating unit100with a CMOS exponential function generating circuit200with a temperature compensation technique according to an embodiment of the present invention, installed into a CMOS variable gain amplifier. The voltage generating unit100includes first through third variable gain amplifiers110,120, and130, an offset canceller140, the CMOS exponential function generating circuit200which compensates for a deviations due to temperature variations, and an internal gain control signal generating circuit for variable gain control300.

The first through third variable gain amplifiers110,120, and130are consecutively connected so that an output signal of the first variable gain amplifier110becomes an input signal of the second variable gain amplifier120, and an output signal of the second variable gain amplifier120becomes an input signal of the third variable gain amplifier130. Signals Vi+and Vi−, which have different phases, are input to an input terminal of the first variable gain amplifier110.

The offset canceller140is connected between an output terminal of the first variable gain amplifier110and an output terminal of the third variable gain amplifier130so as to eliminate offset signals.

The CMOS exponential function generating circuit200receives an external gain control voltage signal Vc, generates exponential function according to the external gain control voltage signal Vc and converts it into linear gain control voltage on a decibel scale, and outputs the linear gain control voltage to the internal gain control signal generating circuit300. The internal gain control signal generating circuit300receives the linear gain control voltage, makes an internal gain control signal, and transmits the internal gain control signal to the first through third variable gain amplifiers110,120, and130. As previously mentioned, the CMOS exponential function generating circuit200includes a bipolar transistor and a CMOS transistor, which are formed by a CMOS process technologies, so that the CMOS exponential function generating circuit200can be easily integrated with other elements. Also, a parasitic bipolar transistor naturally generated during manufacture of a CMOS transistor is used as the bipolar transistor so as to minimize the deviations in an exponential function due to the temperature variations.

Referring toFIG. 2, the CMOS exponential function generating circuit200includes a voltage scaler210, an exponential function generating unit220, a temperature compensator250, and a reference voltage generator260.

The voltage scaler210includes a first operation amplifier212to which a first resistor R1and a second resistor R2are connected, and a second operation amplifier214. The external gain control voltage signal Vcand a reference voltage VREFare input to (−) and (+) input terminals of the external first operation amplifier212, respectively, so that an inverse voltage can be output from the operation amplifier212. Also, the first resistor R1is connected to the (−) input terminal of the first operation amplifier212, and the second resistor R2which is a variable resistor for gain adjustment of first operation amplifier212, is connected between the (−) input terminal and output terminal thereof. A signal output from the first operation amplifier212is input to a (+) input terminal of the second operation amplifier214. The second operation amplifier214buffers the signal output from the first operation amplifier212.

The exponential function generating unit220includes an exponential function current generator230and an exponential function voltage generator245.

The exponential function current generator230includes a current source232, a scaled voltage signal transfer unit234, and a bipolar transistor unit236. The current source232is constructed in which first and second MOS transistors M1and M2, which are PMOS transistors, are connected to form a current mirror. In other words, the gates of the first and second MOS transistors M1and M2are connected, and the gate and drain of the first MOS transistor M1are connected.

The scaled voltage signal transfer unit234includes a third transistor M3and a fourth transistor M4whose sources are connected. The third and fourth transistors M3and M4are NMOS transistors. A voltage output from the second operation amplifier214is applied to gates of the third and fourth MOS transistors M3and M4. The drain of the third MOS transistor M3is connected to that of the first MOS transistor M1, and the drain of the fourth MOS transistor M4is electrically connected to the second MOS transistor M2. The sources of the third and fourth MOS transistors M3and M4are connected to the (−) input terminal of the second operation amplifier214of the voltage scaler210so as to provide a (−) input signal generated by the second operation amplifier214.

The bipolar transistor unit236includes a first bipolar transistor Q1and a second bipolar transistor Q2whose bases and collectors are connected, respectively. As described above, the first and second bipolar transistors Q1and Q2may be parasitic bipolar transistors. That is, the sizes of emitters of the first and second bipolar transistors Q1and Q2may be n times (n×) more than the sizes of the fourth MOS transistor M4, and the first and second bipolar transistors Q1and Q2generate exponential function current EXPI in response to a voltage output from the second operation amplifier214of the voltage scaler210. Further, the collectors of the first and second bipolar transistors Q1and Q2are common-connected and grounded, the emitter of the first bipolar transistor Q1is connected to the source of the third MOS transistor M3, and the emitter of the second bipolar transistor Q2is connected to the source of the fourth MOS transistor M4.

The exponential function voltage generator245includes a fifth resistor R5and a sixth resistor R6that are connected in series. One end of the fifth resistor R5is connected to the drain of the second MOS transistor M2and one end of the sixth resistor R6is connected to the drain of the fourth MOS transistor M4. An exponential function voltage ExpV output from the exponential function voltage generator245is a differential voltage between the fifth and sixth resistors R5and R6. The exponential function current ExpI is the difference ID2–ID3between a drain current ID2of the second MOS transistor M2and a drain current ID3at the drain of the fourth MOS transistor M4.

A temperature compensator250includes a third operation amplifier252connected to third and fourth resistors R3and R4, a fourth operation amplifier254, a first external current source Itemp256, a fifth operation amplifier258connected to sixth and seventh resistors R6and R7, a sixth MOS transistor M6, and a fourth bipolar transistor Q4.

The (−) input terminal of the third operation amplifier252is grounded or a power supply voltage is applied thereto, and a reference voltage VREFis applied to the (+) input of the third operation amplifier252. In addition, the third resistor R3is connected to the (−) input terminal of the third operation amplifier252, and the fourth resistor R4, which is a variable resistor for gain adjustment of first operation amplifier252, is connected between the (−) input terminal and output terminal of the third operation amplifier252.

When a signal output from the third operation amplifier252is applied to the (+) input terminal of the fourth operation amplifier254, the fourth operation amplifier254buffers this signal. A signal output from the fourth operation amplifier254is input to the gate of the sixth MOS transistor M6that is an NMOS transistor. The drain of the sixth MOS transistor M6is connected to the (−) input terminal of the fourth operation amplifier254.

The emitter of the fourth bipolar transistor Q4is connected to the drain of the sixth MOS transistor M6and its collector is connected to both the collectors of the first and second bipolar transistors Q1and Q2. The size of the fourth bipolar transistor Q4is preferably 1/n times (1×) less than the sizes of the first and second bipolar transistors Q1and Q2. The fourth bipolar transistor Q4may also be a parasitic bipolar transistor and change a collector current due to a temperature variations.

The (−) input terminal of the fifth operation amplifier258is connected to the first external current source256and the seventh resistor R7, and its (+) input terminal is connected to the eighth resistor R8connected to the source of the sixth MOS transistor M6. An end of the seventh resistor R7is connected to an end of the eighth resistor R8, and they are also common-connected to a node connected to both the fifth and sixth resistors R5and R6. A common voltage VCOMis applied to the seventh and eighth resistors R7and R8. The first external adjustable current source256is a temperature compensated current source that supplies a predetermined bias to the fifth operation amplifier258according to temperature deviations when the fourth bipolar transistor Q4detects a change in a current at its collector when the collector current of the fourth bipolar transistor Q4due to a temperature variations.

When there are some temperature variations, the collector current of the fourth bipolar transistor Q4changes. Accordingly, there may be some changes of the voltage levels at the both ends of the seventh and of the eighth transistors, R7and R8, thereby changing both the exponential function voltage and current. Thus, above voltage levels at the both ends of resistors R7and R8changed by the temperature variations, are applied to the fifth operation amplifier258. The output voltage is applied to the second and fourth resistors R2and R4, which generate variable resistances, thereby controlling the resistance values therefrom. In other words, the resistance values of the second and fourth resistors R2and R4, which control the magnitudes of the exponential function voltage and current, are changed according to a signal output from the fifth operation amplifier258to which the predetermined bias is applied to according to temperature.

The reference voltage generator260includes a second external current source262, a third bipolar transistor Q3, a sixth operation amplifier264, a seventh operation amplifier266, and a fifth MOS transistor M5.

A reference voltage VREFis applied to the (+) input terminal of the seventh operation amplifier266and a signal output from the seventh operation amplifier266is input to the gate of the fifth MOS transistor M5that is an NMOS transistor. The drain of the fifth MOS transistor M5is connected to the second external current source262to which the power supply voltage VDDis applied, and its source is connected to the emitter of the third bipolar transistor Q3. The collector and base of the third bipolar transistor Q3is connected to all the collectors and bases of the first, second, and fourth bipolar transistors Q1, Q2, and Q4. Also, the sixth operation amplifier264is connected between the drain of the fifth MOS transistor M5and the base of the third bipolar transistor Q3. Accordingly, a bias amplified by the sixth operation amplifier264is applied to the bases of the first through fourth bipolar transistors Q1through Q4. The (−) input terminal of the seventh operation amplifier266is connected to the drain of the fifth MOS transistor M5.

The operation of an exponential function generating circuit with the above construction according to the present invention will now be described. First, input of the external gain control voltage signal VCto the first operation amplifier212generates an inverse voltage scaled by the first and second resistors R1and R2. A voltage (signal) output from the first operation amplifier212is input to the gates of the third and fourth MOS transistors M3and M4of the exponential function current generator230via the second operation amplifier214. In this case, the voltage output from the first operation amplifier212is applied to the sources of the third and fourth MOS transistors M3and M4, and the source voltages of the third and fourth MOS transistors M3and M4are applied to the second operation amplifier214.

As described above, the signal output from the first operation amplifier212is input to the sources of the third and fourth MOS transistors M3and M4, and as a result, this signal is transmitted to the emitters of the first and second bipolar transistors Q1and Q2. A uniform amount of a bias current Iopsupplied from the second external current source262flows through the emitter of the third bipolar transistor Q3connected to the first and second bipolar transistors Q1and Q2. A base voltage Vbof the third bipolar transistor Q3is set by the second external current source262, the sixth operation amplifier264, and the seventh operation amplifier266. The base voltage Vbof the third bipolar transistor Q3becomes a base voltage at the first, second, and fourth bipolar transistors Q1, Q2, and Q4.

The generation of the base voltage Vbof the first and second bipolar transistors Q1and Q2minimizes a change in an output current caused by changes in base-emitter voltage Vbeof the bipolar transistors Q1, Q2, and Q3, temperature, and processes when the reference voltage VREFis a rough half in the range of a gain control voltages, i.e., from 0 to Vc.

If the external gain control voltage signal Vcvaries, the collector current of the first and second bipolar transistors having a shape of an exponential function flows at the drain of the third and fourth MOS transistors by the current source232composed of the first and second MOS transistors. The current Iocan be expressed as follows:
Io=K1·EXP(−K2·Vc−Vcom)  (1),
wherein K1denotes a function of the sizes of the first and second bipolar transistors Q1and Q2, K2denotes a scaling constant related to the third and second resistors R1and R2, VCOMdenotes an external voltage, and the external voltage VCOMbecomes a common mode voltage(DC) level of the exponential function voltage ExpV.

As described above, the base voltage Vbat the first through fourth bipolar transistors Q1˜Q4is changed by the current Iopfrom the second external current source262. Thus, it is possible to obtain a current with a desired magnitude and exponential function characteristics by adjusting the function K1, the scaling constant K2, and the current Iop, and a differential exponential function voltage using the fifth and sixth resistors R5and R6of the exponential function voltage generator245.

When the external gain control voltage signal Vcis equivalent to the reference voltage VREF, a temperature change is compensated for by the second external current source262, the sixth operation amplifier264, and the third bipolar transistor Q3. That is, the CMOS exponential function generating circuit200according to the present invention has a circuit construction in which the exponential function characteristics change sensitively according to a temperature parameter determined by the external gain control voltage signal Vc.

To be more specific, the exponential function voltage characteristics change remarkably when a temperature variation causes the external gain control voltage signal Vcto have a minimum value (Vc=Vcmin), i.e., 0V, or a maximum value (Vc=Vcmax), i.e., VDD. However, the exponential function voltage characteristics hardly change when the voltage of the external gain control voltage signal Vcapproximates the reference voltage VREF. That is, an exponential function voltage increases or decreases like a seesaw according to the temperature with respect to the reference voltage VREFwithin the range of gain control. This is because the inclination (gradient) of the exponential function voltage, which is expressed by units of decibel, changes linearly according to thermal voltages at the first and second bipolar transistors Q1and Q2and resistances output from the first and second resistors R1and R2.

The inclination of the exponential function voltage can be expressed as follows:

Accordingly, to compensate for the inclination of the exponential function voltage, a voltage gain changing according to the temperature can be adjusted by adjusting the ratios, i.e., R2/R2and R4/R3, of resistances at the first and third operation amplifiers212and252, and applying a ground voltage or a power supply voltage to an input terminal of the third operation amplifier252.

The temperature compensator250allows the ratios of resistances to be automatically adjusted. That is, it is possible to control an exponential function voltage changing according to the temperature variations using the third operation amplifier254and the sixth MOS transistor M6of the temperature compensator250, the amount of change ΔIc(T) in a current at the collector of the fourth bipolar transistor Q4according to the temperature variations, and the characteristics of the fifth operation amplifier258determined by the first external current source256and the seventh and eighth resistors R7and R8.

In other words, a voltage output from the fifth operation amplifier258is connected to the second and fourth resistors R2and R4such that the voltage is fed back to the second and fourth resistors R2and R4. Therefore, it is possible to control the ratios of resistances, i.e., R2/R1and R4/R3, according to the temperature variations, thereby stably generating the exponential function voltage. The second and fourth resistors may be realized using on-resistance characteristics of the MOS transistors operating in a linear region.

The inclination of the exponential function voltage, which is expressed with units of decibel, can be expressed as follows:
20 log (ExpVmax/ExpVmin)×(VREF/Vcmax)=20 log (n×Itemp)/Iop(3)

That is, as expressed in Equation (3), the inclination of the exponential function voltage can be adjusted using the first and second external current sources256and266, thereby compensating for exponential function voltage and current changing according to the temperature variations.

FIG. 3is a graph illustrating a variation in an exponential function voltage output from an exponential function generating circuit according to the present invention, the exponential function voltage changing according to the voltage of an external gain control voltage signal VC. The graph ofFIG. 3reveals that the inclination of the exponential function voltage changing according to the temperature is automatically increased or reduced like a seesaw owing to a temperature compensator on a basis of when the voltage of the external gain control voltage signal VCis equivalent to a reference voltage VREF, thereby compensating for a voltage gain according to the temperature.

As described above, a CMOS exponential function generating circuit according to the present invention includes a temperature compensator having bipolar transistors that are parasitically generated during manufacture of a CMOS transistor, and a reference voltage generator. The temperature compensator detects a change in a current at a collector of a bipolar transistor and compensates for a change in the inclination of an exponential function voltage generated.

In addition, the present invention allows a voltage gain to be stably adjusted and supplied to a variable gain amplifier, thereby obtaining low-distortion and high-bandwidth characteristics.