Tri-stable storage loops

A tri-stable storage loop useful in reciprocal quantum logic (RQL) gate circuits and systems has control and signal input lines. When alternating stable current storage states are induced in the storage loop by an alternating input provided to the control input line, provision of a positive SFQ pulse on the signal input line while the storage loop stores a positive current changes the storage loop from alternating between a positive-current state and a null-current state to alternating between a negative-current state and the null-current state, and provision of a negative SFQ pulse on the signal input line while the storage loop stores a negative current changes the storage loop from alternating between the negative-current state and the null-current state to alternating between the positive-current state and the null-current state.

TECHNICAL FIELD

The present invention relates generally to quantum and classical digital superconducting circuits, and specifically to tri-stable storage loops for use in RQL circuits, that is, loops capable of stably holding currents representative of positive, negative, and zero states until a held state is affirmatively altered by one or more input signals.

BACKGROUND

In the field of digital logic, extensive use is made of well known and highly developed complimentary metal-oxide semiconductor (CMOS) technology. As CMOS has begun to approach maturity as a technology, there is an interest in alternatives that may lead to higher performance in terms of speed, power dissipation computational density, interconnect bandwidth, and the like. An alternative to CMOS technology comprises superconductor based single flux quantum circuitry, utilizing superconducting Josephson junctions (JJs), with typical signal power of around 4 nanowatts (nW), at a typical data rate of 20 gigabits per second (Gb/s) or greater, and operating temperatures of around 4 kelvins.

In the context of systems and circuits in the reciprocal quantum logic (RQL) family, a storage loop is a loop capable of holding a superconducting current representative of a state, stably, until the current in such loop, and thereby the represented state, is affirmatively altered by an input signal, as opposed to by, for example, ambient AC conditions present in a larger circuit of which the storage loop may be a constituent.

SUMMARY

One example includes a reciprocal quantum logic (RQL) tri-stable storage loop circuit. A control input line provides a control input to an input end of a storage loop in the circuit. A signal input line provides a signal input to an output end of the storage loop. An output line propagates an output single flux quantum (SFQ) pulse from the output end of the storage loop. The storage loop is made up of a control Josephson junction (JJ) at the input end, a logic JJ at the output end, and a storage inductor connecting the input end to the output end.

Another example includes a method of altering a series of pulses from alternating between a positive-current state and a null current state to alternating between a negative-current state and the null-current state. Alternate positive and negative control inputs are provided to a storage loop in an RQL system to alternate the storage loop between a positive current storage state in which current circulates in the loop in a positive direction and a null current storage state in which essentially no current circulates in the loop. A positive SFQ signal pulse is input to the storage loop during the positive state to return the storage loop to the null state and subsequently to cause the storage loop to transition, on the next negative control input, into a negative current storage state in which current circulates in the loop in a negative direction. Thereupon, the control inputs alternate the storage loop between the negative state and the null state.

Yet another example includes a circuit comprising a control input line connected to an input node, a control JJ connected between a circuit ground and the input node, a storage inductor connected between the input node and an output node, a logic JJ connected between the circuit ground and the output node, a signal input line connected to the output node; and an output line connected to the output node. The control JJ, storage inductor, and logic JJ form a storage loop. The control JJ and storage inductor are sized to provide unidirectional flow of control inputs provided via the control input line.

DETAILED DESCRIPTION

This disclosure relates generally to logical circuits for use in reciprocal quantum logic (RQL) systems and related methods. This disclosure more specifically relates to an inductive storage loop that can be driven into any of three stable states via the interaction of signals at Josephson junctions (JJs) at both ends of the loop. The inductive storage loop described herein enables single flux quantum (SFQ) logic to selectively apply positive, negative, or no bias at one of the junctions.

FIG. 1shows an example tri-stable loop100. Tri-stable loop100includes control input line102provided to an input node connecting control JJ104to storage inductor106. At the opposite end of storage inductor106is an output node to which logic JJ108, signal input line110, and output line112are connected. Thus, storage loop100is formed between a circuit ground, control JJ104, storage inductor106, logic JJ108, and the circuit ground. Input lines102,110and output line112can be connected to, for example, Josephson transmission lines (JTLs) (not shown) to propagate SFQ pulses into or out of storage loop100, respectively.

Loop100applies additional bias to logic JJ108, such that an SFQ signal applied along a signal input line110produces an output that is propagated on output line112. To accomplish this, control junction104is triggered to put an SFQ of current into storage loop100. This may be done via RQL-encoded SFQ pulses supplied along control input line102, or direct application of AC power supplied along control input line102.

The selections of component sizes in storage loop100provide a unidirectional data flow. For example, control JJ104can be sized large relative to logic JJ108and storage inductor106can be sized large relative to propagation-path inductances in input line JTLs (not shown) to make loop100stable regardless of surrounding AC bias conditions. Signal direction is thereby enforced in circuit100. As an example, an SFQ pulse provided on control input line102can place one Φ0of current into storage loop100. The magnitude of current through such a storage loop is determined by the size of storage inductor106in storage loop100. Thus, the inductance value of an input inductor (not shown) on control input line102can be small (e.g., between about 8 pH and 9 pH, e.g., 8.5 pH) in comparison to the inductance value of storage inductor106. On the other hand, storage inductor106can sized to be relatively large (e.g., between about 30 pH and 40 pH, e.g., 35 pH) (e.g., about four times larger than the aforementioned input inductor) to reduce the magnitude of the stored current induced by a control input SFQ pulse provided on control input line102. In some examples, the magnitude of a current introduced at control input line102is about four times larger than the current stored in storage loop100. Control JJ104is sized such that any driving JTL (not shown) connected to the control input line102is capable of flipping control JJ104to put current into storage loop100, but the current in the storage loop100is never sufficient to unflip control JJ104and allow the stored pulse to back out of control input line102.

In RQL circuits, any Josephson junction, the superconducting phase of which is representative of a logical state, triggers in an alternating fashion: positive, negative, positive, negative, etc.FIG. 2shows, as a function of time, the current in storage inductor106as control junction104is triggered in this alternating fashion by currents provided along control input line102with no signal inputs applied along signal input line110. Each positive triggering202,206of control junction104puts one Φ0(about 2.07 mA-pH) worth of current into storage loop100, positively biasing logic junction108. Each negative triggering204,208removes this biasing current (i.e., setting it back to zero). In some examples, the signal to control input line102can be configured to cause one triggering pair (e.g.,202,204) every AC clock cycle. In other examples, the applied current provided to control input line102could be present across multiple AC clock cycles.

FIG. 3shows a plot similar to that ofFIG. 2but with the addition of the effect of signal inputs applied on signal input line110. As the result of control signals provided along control input line102, control junction104still alternately triggers positively302,306,312,318and negatively304,310,314,320. Any SFQ pulses input to circuit100via signal input line110during times when there is zero current in loop100are insufficient to trigger logic junction108on their own. However, such SFQ pulses are capable of triggering logic junction108with the additional bias provided by current in storage inductor106.

Initially, control junction104is only capable of applying positive bias or no bias to logic junction108, because, as shown inFIG. 2, in absence of signal input, the current in loop100only varies between 0 and one Φ0worth of current. However, the positive triggering of logic junction108annihilates the current stored in storage loop100and removes this positive bias, as shown at point308. After this point308, the next triggering310of control junction104is negative and control junction104is now only capable of applying negative bias.

Subsequent triggerings310,312,314of control junction104switch the applied bias between zero and −Φ0until logic junction108is triggered negatively316by the combination of this bias and an applied negative SFQ pulse at signal input line110. This again annihilates the current in storage loop100, which then returns to the original state wherein control junction104once again can apply only positive bias or no bias.

In view of the above description, tri-stable storage loops of the type illustrated inFIG. 1provide the ability to interrupt an alternating series of pulses coming from one RQL signal such that it can selectively alternate not just between a positive-current state and a no-current state, but can also reach a negative-current state as well. Although in the above-described examples ofFIGS. 2 and 3a first triggering (e.g.,202or302) of control junction104is assumed to be in the positive direction, circuit100functions equivalently when the first triggering of controller junction104is negative, with the signs of all described currents being reversed. Construction of gates providing some logic functions benefit in part count, efficiency, etc. from the ability of an RQL signal to apply positive, negative, or no bias current to a decision-making Josephson junction. Tri-stable loops of the type described herein accordingly provide the benefit over earlier designs in construction of such RQL gates. As examples, storage loop100can be used to create component-efficient D flip-flops, majority gates, AND gates, OR gates, AND-OR gates, NAND gates, and NOR gates, among others, compatible with RQL systems. In some examples, multiple storage loops can be combined such that the storage loops share a common logic junction that is triggered only upon appropriate biasing created by current stored in a plurality of, a majority of, or certain of the storage loops.

FIG. 4Ashows method400of altering a series of pulses from alternating between a positive-current state and a null-current state to alternating between a negative-current state and the null-current state. Alternate positive and negative control inputs are provided402to a storage loop in a reciprocal quantum logic (RQL) system to alternate the storage loop between a positive current storage state in which current circulates in the loop in a positive direction and a null current storage state in which essentially no current circulates in the loop. A positive single flux quantum (SFQ) signal pulse is input404to the storage loop during the positive state. A logic JJ in the storage loop triggers406in the positive direction, annihilating the current in the storage loop and returning408the storage loop to the null state. On the next negative control input, the storage loop is caused410to transition into a negative current storage state in which current circulates in the loop in a negative direction, whereupon subsequent control inputs alternate412the storage loop between the negative state and the null state.

FIG. 4Bshows method450of altering a series of pulses from alternating between a negative-current state and a null-current state to alternating between a positive-current state and the null-current state, which can continue from method400shown inFIG. 4A. A negative SFQ signal pulse is input414to the storage loop during the negative state. The logic JJ in the storage loop negatively triggers416to annihilate the current in the storage loop and thereby return418the storage loop to the null state. On the next positive control input, the storage loop is caused420to transition into the positive state, whereupon subsequent control inputs alternate422the storage loop between the null state and the positive state.