SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE

Provided is a semiconductor device including a drift region, a buffer region which is provided in a back surface side of a semiconductor substrate relative to the drift region and has a first peak of a doping concentration, and a first lattice defect region which is provided in a front surface side of the semiconductor substrate relative to the first peak in a depth direction of the semiconductor substrate, in which the buffer region has a hydrogen peak which is provided in the front surface side of the semiconductor substrate relative to the first lattice defect region, and an integrated concentration obtained by integrating the doping concentration in a direction from an upper end of the drift region to the hydrogen peak in the depth direction of the semiconductor substrate is equal to or larger than a critical integrated concentration.

BACKGROUND

1. Technical Field

The present invention relates to a semiconductor device and a manufacturing method of the semiconductor device.

2. Related Art

Conventionally, there is known a semiconductor device having peaks formed by hydrogen ion implantation (see, for example, Patent Documents 1, 2, and 3).

PRIOR ART DOCUMENTS

Patent Documents

Patent Document 1: WO 2019/181852Patent Document 2: Japanese Patent Application Publication No. 2018-107303Patent Document 3: Japanese Patent Application Publication No. 2022-035157

DESCRIPTION OF EXEMPLARY EMBODIMENTS

Hereinafter, the invention will be described through embodiments of the invention, but the following embodiments do not limit the invention according to claims. In addition, not all combinations of features described in the embodiment are essential to the solving means of the invention.

As used herein, one side in a direction parallel to a depth direction of a semiconductor substrate is referred to as “upper” and the other side is referred to as “lower”. One surface of two principal surfaces of a substrate, a layer, or another member is referred to as an upper surface, and the other surface is referred to as a lower surface. “Upper” and “lower” directions are not limited to a direction of gravity, or a direction in which a semiconductor device is mounted.

In the present specification, technical matters may be described using orthogonal coordinate axes consisting of an X axis, a Y axis, and a Z axis. The orthogonal coordinate axes merely specify relative positions of components, and do not limit a specific direction. For example, the Z axis is not limited to indicate a height direction with respect to the ground. Note that a +Z axis direction and a −Z axis direction are directions opposite to each other. When the Z axis direction is described without describing the signs, it means that the direction is parallel to the +Z axis and the −Z axis.

In the present specification, orthogonal axes parallel to the upper surface and the lower surface of the semiconductor substrate are referred to as the X axis and the Y axis. Further, an axis perpendicular to the upper surface and the lower surface of the semiconductor substrate is referred to as the Z axis. In the present specification, the direction of the Z axis may be referred to as the depth direction. Further, in the present specification, a direction parallel to the upper surface and the lower surface of the semiconductor substrate may be referred to as a horizontal direction, including an X axis direction and a Y axis direction.

In the present specification, a case where a term such as “same” or “equal” is mentioned may include a case where an error due to a variation in manufacturing or the like is included. The error is, for example, within 10%.

In the present specification, a conductivity type of a doping region where doping has been carried out with an impurity is described as a P type or an N type. In the present specification, the impurity may particularly mean either a donor of the N type or an acceptor of the P type, and may be described as a dopant. In the present specification, doping means introducing the donor or the acceptor into the semiconductor substrate and turning it into a semiconductor presenting a conductivity type of the N type, or a semiconductor presenting a conductivity type of the P type.

In the present specification, a doping concentration means a concentration of the acceptor or a concentration of the donor electrically activated in a thermal equilibrium state. In the present specification, a net doping concentration means a net concentration obtained by adding the donor concentration set as a positive ion concentration to the acceptor concentration set as a negative ion concentration, taking into account of polarities of charges. As an example, when the donor concentration is NDand the acceptor concentration is NA, the net doping concentration at any position is given as ND-NA. In the present specification, the net doping concentration may be simply referred to as the doping concentration.

The donor has a function of supplying electrons to a semiconductor. The acceptor has a function of receiving electrons from the semiconductor. The donor and the acceptor are not limited to the impurities themselves. For example, a VOH defect which is a combination of a vacancy (V), oxygen (O), and hydrogen (H) existing in the semiconductor functions as the donor that supplies electrons. In the present specification, the VOH defect may be referred to as a hydrogen donor. In other words, a case where electrons are supplied by hydrogen to cause it to function as the donor may be referred to as the hydrogen donor.

In the present specification, the N type bulk donor is distributed throughout the semiconductor substrate. The bulk donor is a dopant donor substantially uniformly contained in an ingot during the manufacture of the ingot from which the semiconductor substrate is made. The bulk donor of the present example is an element other than hydrogen. The dopant of the bulk donor is, for example, phosphorus, antimony, arsenic, selenium, or sulfur, but the invention is not limited to these. The bulk donor of the present example is phosphorus. The bulk donor may also be contained in the P type region. The semiconductor substrate may be a wafer cut out from a semiconductor ingot, or may be a chip obtained by singulating the wafer. The semiconductor ingot may be manufactured by either a Chokralsky method (CZ method), a magnetic field applied Chokralsky method (MCZ method), or a float zone method (FZ method). The ingot in the present example is manufactured by the MCZ method. An oxygen concentration contained in a substrate manufactured by the MCZ method may be 1×1017to 7×1017/cm3. An oxygen concentration contained in a substrate manufactured by the FZ method may be 1×1015to 5×1016/cm3. When the oxygen concentration is high, hydrogen donors tend to be easily generated. The bulk donor concentration may be expressed using a chemical concentration of the bulk donor distributed throughout the semiconductor substrate, or may take a value between 90% and 100% of the chemical concentration. Further, for the semiconductor substrate, a non-doped substrate which does not contain a dopant such as phosphorus may be used. In that case, the bulk donor concentration (DO) of the non-doped substrate is, for example, from 1×1010/cm3or more and to 5×1012/cm3or less. The bulk donor concentration (DO) of the non-doped substrate may preferably be 1×1011/cm3or more. The bulk donor concentration (DO) of the non-doped substrate may preferably be 5×1012/cm3or less. Note that the respective concentrations in the present invention may be values obtained at room temperature. As the value at room temperature, a value at 300 K (Kelvin) (about 26.9° C.) may be used as an example. The semiconductor substrate may contain, in the entire semiconductor substrate, acceptor atoms at a concentration lower than the bulk donor concentration. In this case, the conductivity type of the semiconductor substrate is the N type.

In the present specification, a description of a P+ type or an N+ type means a higher doping concentration than that of the P type or the N type, and a description of a P− type or an N− type means a lower doping concentration than that of the P type or the N type. Further, in the specification, a description of a P++ type or an N++ type means a higher doping concentration than that of the P+ type or the N+ type.

A chemical concentration in the present specification indicates an atomic density of an impurity measured regardless of an electrical activation state. The chemical concentration can be measured by, for example, secondary ion mass spectrometry (SIMS). The net doping concentration described above can be measured by capacitance-voltage profiling (CV profiling). Further, a carrier concentration measured by spreading resistance profiling (SRP method) may be set as the net doping concentration. The carrier concentration measured by the CV profiling or the SRP method may be a value in a thermal equilibrium state. Further, in a region of an N type, the donor concentration is sufficiently higher than the acceptor concentration, and thus the carrier concentration of the region may be set as the donor concentration. Similarly, in a region of a P type, the carrier concentration of the region may be set as the acceptor concentration. In the present specification, the doping concentration of the N type region may be referred to as the donor concentration, and the doping concentration of the P type region may be referred to as the acceptor concentration.

Further, when a concentration distribution of the donor, acceptor, or net doping has a peak in a region, a value of the peak may be set as the concentration of the donor, acceptor, or net doping in the region. In a case where the concentration of the donor, acceptor or net doping is substantially uniform in a region, or the like, an average value of the concentration of the donor, acceptor or net doping in the region may be set as the concentration of the donor, acceptor or net doping. In the present specification, atoms/cm3or/cm3are used for presenting the concentration per unit volume. This unit is used for a concentration of a donor or an acceptor in a semiconductor substrate, or a chemical concentration. The notation of atoms may be omitted.

The carrier concentration measured by the SRP method may be lower than the concentration of the donor or the acceptor. In a range where a current flows when a spreading resistance is measured, carrier mobility of the semiconductor substrate may be lower than a value in a crystalline state. The reduction in carrier mobility occurs when carriers are scattered due to disorder (disorder) of a crystal structure due to a lattice defect or the like.

The concentration of the donor or the acceptor calculated from the carrier concentration measured by the CV profiling or the SRP method may be lower than a chemical concentration of an element indicating the donor or the acceptor. As an example, in a silicon semiconductor, a donor concentration of phosphorus or arsenic serving as a donor, or an acceptor concentration of boron (boron) serving as an acceptor is approximately 99% of chemical concentrations of these. On the other hand, in the silicon semiconductor, a donor concentration of hydrogen serving as a donor is approximately 0.1% to 10% of a chemical concentration of hydrogen. In the present specification, an SI unit system is adopted. In the present specification, a unit of a distance or length may be expressed in cm (centimeters). In this case, the calculations may be performed after conversion into m (meters).

FIG.1Ashows an example of a top view of a semiconductor device100. The semiconductor device100of the present example is a semiconductor chip that includes a transistor portion70.

The transistor portion70is a region obtained by projecting a collector region22provided on a back surface side of a semiconductor substrate10onto an upper surface of the semiconductor substrate10. The collector region22will be described later. The transistor portion70includes a transistor such as an IGBT.

FIG.1Ashows a surrounding region of a chip end portion, which is an edge side of the semiconductor device100, and the other regions are omitted. For example, an edge termination structure portion may be provided in a region on a negative side of the Y axis direction in the semiconductor device100of the present example. The edge termination structure portion reduces an electric field strength on the upper surface side of the semiconductor substrate10. The edge termination structure portion has a structure of, for example, a guard ring, a field plate, RESURF, and a combination of these. Note that although the present example describes the edge on the negative side in the Y axis direction for convenience, the same applies to other edges of the semiconductor device100.

The semiconductor substrate10may be a silicon substrate, may be a silicon carbide substrate, or may be a nitride semiconductor substrate such as gallium nitride, or the like. The semiconductor substrate10of the present example is a silicon substrate.

The semiconductor device100of the present example includes, at the front surface21of the semiconductor substrate10, a gate trench portion40, a dummy trench portion30, an emitter region12, a base region14, a contact region15, and a well region17. The front surface21will be described later. In addition, the semiconductor device100of the present example includes an emitter electrode52and a gate metal layer50provided above the front surface21of the semiconductor substrate10.

The emitter electrode52is provided above the gate trench portion40, the dummy trench portion30, the emitter region12, the base region14, the contact region15, and the well region17. In addition, the gate metal layer50is provided above the gate trench portion40and the well region17.

The emitter electrode52and the gate metal layer50are formed of a material containing metal. At least a partial region of the emitter electrode52may be formed of metal such as aluminum (Al) or a metal alloy such as an aluminum-silicon alloy (AlSi) and an aluminum-silicon-copper alloy (AlSiCu). At least a partial region of the gate metal layer50may be formed of metal such as aluminum (Al) or a metal alloy such as an aluminum-silicon alloy (AlSi) and an aluminum-silicon-copper alloy (AlSiCu). The emitter electrode52and the gate metal layer50may have a barrier metal formed of titanium, a titanium compound, or the like below a region formed of aluminum or the like. The emitter electrode52and the gate metal layer50are provided separately from each other.

The emitter electrode52and the gate metal layer50are provided above the semiconductor substrate10with an interlayer dielectric film38interposed therebetween. The interlayer dielectric film38is omitted inFIG.1A. The interlayer dielectric film38is provided with contact holes54, contact holes55, and contact holes56penetrating therethrough.

The contact holes55connect the gate metal layer50and the gate conductive portions inside the transistor portions70. Inside the contact hole55, a plug formed of tungsten or the like may be formed.

The contact hole56connects the emitter electrode52and a dummy conductive portion in the dummy trench portion30. Inside the contact hole56, a plug formed of tungsten or the like may be formed.

A connection portion25electrically connects the emitter electrode52or a front surface side electrode of the gate metal layer50or the like with the semiconductor substrate10. In one example, the connection portion25is provided between the gate metal layer50and the gate conductive portion. The connection portion25is also provided between the emitter electrode52and the dummy conductive portion. The connection portion25is formed of a conductive material such as polysilicon doped with impurities. The connection portion25of the present example is polysilicon doped with an N type impurity (N+). The connection portion25is provided above the front surface21of the semiconductor substrate10via a dielectric film such as an oxide film, or the like.

The gate trench portions40are arrayed at predetermined intervals along a predetermined array direction (the X axis direction in the present example). The gate trench portion40of the present example may include: two extending portions41which extend along an extending direction (the Y axis direction in the present example) parallel to the front surface21of the semiconductor substrate10and perpendicular to the array direction; and a connecting portion43which connects the two extending portions41.

Preferably, at least a part of the connecting portion43is formed in a curved shape. By connecting end portions of the two extending portions41of the gate trench portion40, an electric field strength at the end portions of the extending portions41can be reduced. At the connecting portion43of the gate trench portion40, the gate metal layer50may be connected to the gate conductive portion.

The dummy trench portion30is a trench portion electrically connected with the emitter electrode52. Similar to the gate trench portions40, the dummy trench portions30are arrayed at predetermined intervals along a predetermined array direction (the X axis direction in the present example). The dummy trench portion30of the present example may have, similar to the gate trench portion40, a U shape at the front surface21of the semiconductor substrate10. That is, the dummy trench portion30may include two extending portions31which extend along the extending direction and a connecting portion33which connects the two extending portions31.

The transistor portion70of the present example has a structure of repeatedly arrayed two gate trench portions40and three dummy trench portions30. That is, the transistor portion70of the present example includes the gate trench portions40and the dummy trench portions30at a ratio of 2:3. For example, the transistor portion70includes one extending portion31between two extending portions41. In addition, the transistor portion70includes two extending portions31adjacent to the gate trench portion40.

It is to be noted that the ratio between the gate trench portions40and the dummy trench portions30is not limited to the present example. The ratio of the gate trench portions40and the dummy trench portions30may be 1:1 or may be 2:4. Alternatively, with all trench portions being the gate trench portions40, the transistor portion70does not need to include the dummy trench portion30.

The well region17is a region of a second conductivity type which is provided in the front surface21side of the semiconductor substrate10relative to the drift region18to be described later. The well region17is an example of a well region provided on an edge side of the semiconductor device100. As an example, the well region17is of the P+ type. The well region17is formed within a predetermined range from an end portion of an active region on a side on which the gate metal layer50is provided. The well region17may have a diffusion depth larger than the depths of the gate trench portion40and the dummy trench portion30. Partial regions of the gate trench portion40and the dummy trench portion30on the gate metal layer50side are formed in the well region17. Bottoms of ends of the gate trench portion40and the dummy trench portion30in the extending direction may be covered by the well region17.

The contact hole54is formed above each region of the emitter region12and the contact region15in the transistor portion70. The contact hole54is not provided above the well region17provided at both ends of the Y axis direction. In this manner, one or more contact holes54are formed in the interlayer dielectric film. The one or more contact holes54may be provided to extend in the extending direction.

A mesa portion71is a mesa portion provided in direct contact with the trench portion in a plane parallel to the front surface21of the semiconductor substrate10. The mesa portion is a portion of the semiconductor substrate10interposed between two trench portions adjacent to each other, and may be a portion ranging from the front surface21of the semiconductor substrate10to the depth of the lowermost bottom portion of each trench portion. The extending portions of each trench portion may be set to be one trench portion. That is, the region sandwiched between two extending portions may be set to be a mesa portion.

The mesa portion71is provided in direct contact with at least one of the dummy trench portion30and the gate trench portion40in the transistor portion70. The mesa portion71includes the well region17, the emitter region12, the base region14, and the contact region15at the front surface21of the semiconductor substrate10. In the mesa portion71, the emitter region12and the contact region15are provided alternately in the extending direction.

The base region14is a region of the second conductivity type provided in the front surface21side of the semiconductor substrate10. As an example, the base region14is of the P− type. The base region14may be provided at both end portions of the mesa portion71in the Y axis direction, at the front surface21of the semiconductor substrate10. Note thatFIG.1Ashows only one end portion in the Y axis direction of the base region14.

The emitter region12is a region of the first conductivity type which has a higher doping concentration than the drift region18. As an example, the emitter region12of the present example is of the N+ type. An example of a dopant of the emitter region12is arsenic (As). The emitter region12is provided in contact with the gate trench portion40at the front surface21in the mesa portion71. The emitter region12may be provided to extend in the X axis direction from one of two trench portions sandwiching the mesa portion71to the other one of the two trench portions. The emitter region12is also provided below the contact hole54.

In addition, the emitter region12may or may not be in contact with the dummy trench portion30. The emitter region12of the present example is in contact with the dummy trench portion30.

The contact region15is a region of the second conductivity type having a higher doping concentration than that of the base region14. As an example, the contact region15of the present example is of the P+ type. The contact region15of the present example is provided at the front surface21of the mesa portion71. The contact region15may be provided in the X axis direction from one of two trench portions sandwiching the mesa portion71to the other one of the two trench portions. The contact region15may or may not be in contact with the gate trench portion40or the dummy trench portion30. The contact region15of the present example is in contact with the dummy trench portion30and the gate trench portion40. The contact region15is also provided below the contact hole54.

FIG.1Bshows an example of a cross section a-a′ inFIG.1A. The cross section a-a′ is an XZ plane passing through the emitter region12in the transistor portion70. In the cross section a-a′, the semiconductor device100of the present example includes the semiconductor substrate10, the interlayer dielectric film38, the emitter electrode52, and the collector electrode24. The emitter electrode52is formed above the semiconductor substrate10and the interlayer dielectric film38.

The drift region18is a region of the first conductivity type which is provided in the semiconductor substrate10. As an example, the drift region18of the present example is of the N− type. The drift region18may be a region that has remained without other doping regions being formed in the semiconductor substrate10. That is, a doping concentration Ddrof the drift region18may be a doping concentration of the semiconductor substrate10.

The buffer region20is a region of the first conductivity type which is provided in the back surface23side of the semiconductor substrate10relative to the drift region18. As an example, the buffer region20of the present example is of the N type. A doping concentration of the buffer region20may be higher than the doping concentration Ddrof the drift region18. The doping concentration of the buffer region20may be higher than the bulk donor concentration. The buffer region20may function as a field stop layer which prevents a depletion layer extending from the lower surface side of the base regions14from reaching the collector region22of the second conductivity type.

The collector region22is provided below the buffer region20in the transistor portion70. The collector region22is of the second conductivity type. As an example, the collector region22of the present example is of the P+ type.

The collector electrode24is formed at the back surface23of the semiconductor substrate10. The collector electrode24is formed of a conductive material such as metal.

The base region14is a region of the second conductivity type which is provided above the drift region18. The base region14is provided in contact with the gate trench portion40. The base region14may be provided in contact with the dummy trench portion30.

The emitter region12is provided between the base region14and the front surface21. The emitter region12is provided in contact with the gate trench portion40. The emitter region12may or may not be in contact with the dummy trench portion30.

An accumulation region16is a region of the first conductivity type provided in the front surface21side of the semiconductor substrate10relative to the drift region18. As an example, the accumulation region16of the present example is of the N+ type. Note that the accumulation region16does not need to be provided.

In addition, the accumulation region16is provided in contact with the gate trench portion40. The accumulation region16may or may not be in contact with the dummy trench portion30. A doping concentration of the accumulation region16is higher than the doping concentration Ddrof the drift region18. An ion implantation dose amount of the accumulation region16may be 1.0 E12 cm−2or more and 1.0 E13 cm−2or less. Alternatively, the ion implantation dose amount of the accumulation region16may be 3.0 E12 cm−2or more and 6.0 E12 cm−2or less. By providing the accumulation region16, a carrier injection enhancement effect (IE effect) can be enhanced to reduce an ON voltage of the transistor portion70. Note that E means a power of 10, and 1.0 E12 cm−2means, for example, 1.0×1012cm−2.

One or more gate trench portions40and one or more dummy trench portions30are provided at the front surface21. Each trench portion is provided from the front surface21to the drift region18. In a region where at least any of the emitter region12, the base region14, the contact region15, or the accumulation region16is provided, each trench portion also penetrates through these regions to reach the drift region18. The configuration of the trench portion penetrating through the doping region is not limited to that manufactured in the order of forming the doping region and then forming the trench portion. The configuration of the trench portion penetrating through the doping region also includes a configuration of the doping region being formed between the trench portions after forming the trench portions.

The gate trench portion40includes a gate trench, a gate dielectric film42, and a gate conductive portion44formed at the front surface21. The gate dielectric film42is formed to cover an inner wall of the gate trench. The gate dielectric film42may be formed by oxidizing or nitriding a semiconductor on the inner wall of the gate trench. The gate conductive portion44is formed inside from the gate dielectric film42in the gate trench. The gate dielectric film42insulates the gate conductive portion44from the semiconductor substrate10. The gate conductive portion44is formed of a conductive material such as polysilicon. The gate trench portion40is covered by the interlayer dielectric film38on the front surface21.

The gate conductive portion44includes a region opposing the adjacent base region14on the mesa portion71side with the gate dielectric film42being interposed therebetween, in the depth direction of the semiconductor substrate10. When a predetermined voltage is applied to the gate conductive portion44, a channel is formed by an electron inversion layer in a surface layer of the base region14in contact with the gate trench.

The dummy trench portion30may have the same structure as the gate trench portion40. The dummy trench portion30includes a dummy trench, a dummy dielectric film32, and a dummy conductive portion34formed in the front surface21side. The dummy dielectric film32is formed to cover an inner wall of the dummy trench. The dummy conductive portion34is formed in the dummy trench, and is formed inside the dummy dielectric film32. The dummy dielectric film32insulates the dummy conductive portion34from the semiconductor substrate10. The dummy trench portion30is covered by the interlayer dielectric film38on the front surface21.

The interlayer dielectric film38is provided on the front surface21. The emitter electrode52is provided above the interlayer dielectric film38. In the interlayer dielectric film38, one or more contact holes54are provided for electrically connecting the emitter electrode52with the semiconductor substrate10. The contact hole55and the contact hole56may similarly be provided so as to penetrate through the interlayer dielectric film38.

The first lattice defect region161is a region including a lattice defect formed by hydrogen ion implantation from the back surface23side. The first lattice defect region161functions as a lifetime killer. In the first lattice defect region161, by reducing a turn-off time of the semiconductor device100and suppressing a tail current, losses during switching can be reduced. Details of the first lattice defect region161will be described later. Note that whether the first lattice defect region161is formed by hydrogen ion implantation can be specified by an analysis of the chemical concentration of the semiconductor device100, and the like. For example, the lifetime killer formed by helium ion implantation can be specified by detecting helium.

The lifetime killer is a recombination center of charge carriers. In the present specification, the charge carriers may simply be referred to as carriers. The lifetime killer may be a lattice defect. For example, the lifetime killer may be a vacancy, a divacancy, a defect complex of these with elements configuring the semiconductor substrate10, or dislocation. That is, the first lattice defect region161is a region including the recombination center.

A lifetime killer concentration is a concentration at the recombination center of carriers. The lifetime killer concentration may be a concentration of the lattice defect. For example, the lifetime killer concentration may be a vacancy concentration of a vacancy, a divacancy, or the like, may be a defect complex concentration of these vacancies with elements configuring the semiconductor substrate10, or may be a dislocation concentration. That is, the first lattice defect region161may be a region including the lifetime killer.

The first lifetime control region151is a region where a lifetime killer is intentionally formed by implanting an impurity into the semiconductor substrate10, or the like. A noble gas element such as helium and neon may be used as the lifetime killer. The lifetime killer concentration is a concentration at the recombination center, but may alternatively be a chemical concentration of the noble gas element such as helium and neon. The first lifetime control region151of the present example is formed by implanting helium into the semiconductor substrate10.

The first lifetime control region151is provided in the back surface23side relative to a center of the semiconductor substrate10in the depth direction of the semiconductor substrate10. The first lifetime control region151of the present example is provided in the buffer region20. The first lifetime control region151can be formed without using a mask when formed on the entire surface of the semiconductor substrate10in the XY plane. The first lifetime control region151may be provided in a part of the semiconductor substrate10in the XY plane using a mask having a predetermined shape.

In addition, the first lifetime control region151of the present example is formed by the implantation from the back surface23side. Accordingly, an effect on the front surface21side of the semiconductor device100can be avoided. For example, the first lifetime control region151is formed by irradiating helium from the back surface23side. Herein, which of the front surface21side and the back surface23side the implantation is performed from for forming the first lifetime control region151can be determined by acquiring a state of the semiconductor substrate10by the SRP method or a measurement of an inter-collector-emitter leakage current. Note that the inter-collector-emitter leakage current may simply be referred to as a leakage current.

FIG.2Ashows an example of a doping concentration distribution in the collector region22, the buffer region20, and the drift region18. Note that the doping concentration distribution in the collector region22, the buffer region20, and the drift region18shows a net doping concentration (net doping concentration) as a total of the concentrations of the respective impurities.

A width of the collector region22in the depth direction may be 0.2 μm or more and 1.0 μm or less from the back surface23. A doping concentration Dc at a peak of the collector region22may be 1.0 E17 cm−3or more and 1.0 E19 cm−3or less.

The buffer region20has a plurality of doping concentrations peaks. The buffer region20of the present example has two peaks including a first peak61and a second peak62. A lower end of the buffer region20may be a boundary between the collector region22and the first peak61. An upper end of the buffer region20may be a boundary between the second peak62and the drift region18. Note that in the present specification, each of the peak positions is a position at which the doping concentration shows a local maximum value. A width of the buffer region20in the depth direction may be 5.0 μm or more and 50.0 μm or less.

A boundary position xabetween the buffer region20and the drift region18may be a depth position at which the doping concentration of the buffer region20becomes equal to the doping concentration Ddrof the drift region18in the front surface21side of the buffer region20. Alternatively, the boundary position xabetween the buffer region20and the drift region18may be a depth position at which the doping concentration of the buffer region20becomes equal to the bulk donor concentration in the front surface21side of the buffer region20.

A boundary position xbbetween the buffer region20and the collector region22may be a depth position of a PN junction at which the net doping concentration becomes substantially 0. In the case of the diode portion80, the boundary position xbmay be a boundary position between the buffer region20and the cathode region82.

The first peak61is provided in the front surface21side relative to the collector region22. The first peak61is a peak closest to the back surface23out of a plurality of peaks included in the buffer region20. The first peak61may be a peak having a highest doping concentration in the buffer region20. A dopant of the first peak61may be phosphorus, arsenic, or hydrogen. In the present example, the dopant of the first peak61is phosphorus.

A depth position Lp1indicates a depth position of the first peak61from the back surface23. The depth position Lp1may be 0.5 μm or more and 3.0 μm or less. The depth position Lp1is, for example, 0.7 μm.

A peak concentration DP1is a doping concentration of the first peak61. The peak concentration DP1may be lower than the peak concentration Dc of the doping concentration in the collector region22. The peak concentration DP1may be determined such that a hole concentration or hole current implanted from the collector region22in a state where a gate is ON is adjusted to a predetermined magnitude. The peak concentration DP1may be 1.0 E15 cm−3or more, or may be 1.0 E16 cm−3or more. The peak concentration DP1may be 1.0 E17 cm−3or less, or may be 5.0 E16 cm−3or less. For example, the peak concentration DP1is 2.0 E16 cm−3.

The second peak62is provided in the front surface21side relative to the first peak61. The second peak62is a peak second closest to the back surface23after the first peak61out of the plurality of peaks included in the buffer region20. The second peak62is an example of a hydrogen peak included in the buffer region20, and is formed by hydrogen ion implantation from the back surface23side. The hydrogen peak is a peak of the doping concentration distribution corresponding to a hydrogen chemical concentration peak of a hydrogen chemical concentration distribution170. The hydrogen peak may be a peak in the donor concentration distribution of the hydrogen donor. The second peak62of the present example corresponds to a hydrogen chemical concentration peak172.

The hydrogen peak is provided in the front surface21side of the semiconductor substrate10relative to the first lattice defect region161. The doping concentration of the hydrogen peak may be 1.0 E14 cm−3or more and 1.0 E16 cm−3or less. A plurality of hydrogen peaks may be provided in the front surface21side relative to the first lattice defect region161. As will be described later, the plurality of hydrogen peaks may function as a field stop layer for stopping the depletion layer expanding from the lower surface side of the base region14.

A depth position Lp2indicates a depth position of the second peak62from the back surface23. The depth position Lp2may be 3.0 μm or more and 50.0 μm or less. The depth position Lp2is, for example, 10.0 μm.

A peak concentration Dp2is a doping concentration of the second peak62. The peak concentration DP1may be larger than the peak concentration Dp2. The peak concentration Dp2may be 1.0 E14 cm−3or more, or may be 1.0 E15 cm−3or more. The peak concentration Dp2may be 1.0 E16 cm−3or less, or may be 5.0 E15 cm−3or less. The peak concentration Dp2of the present example is 5.0 E15 cm−3.

The respective peaks of the buffer region20may be formed using the same dopant, or may be formed using different dopants. The dopant of all the peaks of the buffer region20may be hydrogen. The first peak61may be formed by phosphorus ion implantation, and peaks other than that may be formed by ion implantation of hydrogen ions. The hydrogen ion may be a proton, a deuteron, or a triton. In the present example, the hydrogen ion is a proton.

The first lattice defect region161is provided between the first peak61and the second peak62in the depth direction of the semiconductor substrate10. InFIG.2A, a range where the first lattice defect region161is provided in the depth direction of the semiconductor substrate10is indicated by a double-headed arrow. A recombination center density in the back surface23side relative to the hydrogen peak may be larger than a recombination center density in the drift region18in a side adjacent to the hydrogen peak. In the present example, the recombination center density in the back surface23side relative to the second peak62is larger than the recombination center density in the drift region18in a side adjacent to the second peak62. The first lattice defect region161of the present example is a region having a lower doping concentration than the drift region18. The first lattice defect region161may be a region where the doping concentration is lower than the bulk donor concentration. The bulk donor concentration may be lower than the doping concentration of the drift region. In the present example, the bulk donor concentration is equal to the doping concentration of the drift region.

The reason why the doping concentration of the first lattice defect region161is lower than that of the drift region18is as follows. The first lattice defect region161has a higher lattice defect concentration than the drift region18in the side adjacent to the second peak62. Consequently, in the first lattice defect region161, carriers are easily scattered, and carrier mobility is lower than that of the drift region18. In the SR measurement, a spreading resistance is measured, and the doping concentration is calculated using the carrier mobility. The carrier mobility used in this calculation is carrier mobility in an ideal crystalline state. However, since the actual carrier mobility in the first lattice defect region161is lowered, the doping concentration is calculated that much lower. That is, the doping concentration of the first lattice defect region161seemingly falls. Thus, the doping concentration distribution of the first lattice defect region161becomes a distribution lower than the doping concentration Ddrof the drift region18in the side adjacent to the second peak62. The actual doping concentration of the first lattice defect region161has not actually fallen than in such seeming fall and may be considered to be substantially equal to that of the drift region18.

The doping concentration distribution of the first lattice defect region161has a minimum value Drc1of the doping concentration at a depth position xrc1. The depth position xrc1may be positioned in the front surface21side (solid line) or the back surface23side (dashed-dotted line) relative to an intermediate position of the first lattice defect region161. The minimum value Drc1of the doping concentration may be higher than or lower than 10% of the doping concentration Ddrof the drift region18. In the present example, the minimum value Drc1of the doping concentration is higher than 10% of the doping concentration Ddrof the drift region18.

The first lattice defect region161is provided in the front surface side of the semiconductor substrate10relative to the first peak61in the depth direction of the semiconductor substrate10. Further, the second peak62of the present example is provided in the front surface21side relative to the first lattice defect region161. Accordingly, an increase in leakage current can be suppressed.

The first lattice defect region161of the present example is formed in a passed-through region of hydrogen ions for forming the second peak62. By the hydrogen ions colliding with atoms of a semiconductor (silicon in the present example) while passing through the semiconductor substrate10, energy is caused to decay and a crystal lattice is damaged, with the result that many lattice defects are formed in a region shallower than a range Rp of the hydrogen ions (the passed-through region). The lattice defects formed in the passed-through region are each a vacancy-based vacancy-type lattice defect such as a monoatomic vacancy (V) and a divacancy (VV). Atoms adjacent to the vacancies have dangling bonds. The vacancy-type lattice defect becomes a recombination center and promotes recombination of charge carriers. Accordingly, the first lattice defect region161is formed in the passed-through region of hydrogen ions.

In the present example, by providing the first lattice defect region161such that it extends in the depth direction by the hydrogen ion implantation, a defect density becoming locally higher than that of the first lifetime control region151can be avoided. Moreover, the first lattice defect region161can be formed by implanting ions deeper and with lower energy than in the first lifetime control region151. Accordingly, a fall of a short circuit capacity and a vibration during switching can be suppressed.

An interval Wp1p2is a distance between the first peak61and the second peak62in the depth direction of the semiconductor substrate10. The interval Wp1p2may be 5.0 μm or more, or may be 10.0 μm or more. The interval Wp1p2may be 20.0 μm or more and 30.0 μm or less. The interval Wp1p2may be 40.0 μm or less, or may be 50.0 μm or less. The interval Wp1p2may be 5.0 μm or more in the depth direction of the semiconductor substrate10and half or less of a thickness of the semiconductor substrate10in the depth direction.

A width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10is defined as follows. A distance from a depth position xp1at which the doping concentration of the first peak61is identical to that of the drift region18in the front surface21side to a depth position xp2at which the doping concentration of the second peak62is identical to that of the drift region18in the back surface23side is set as the width W161. Note that as described above, the doping concentration Ddrof the drift region18may be used as the bulk donor concentration. The width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10may be 25% or more, 50% or more, or 75% or more of the interval Wp1p2. The width of the first lattice defect region161in the depth direction of the semiconductor substrate10may be 1.0 μm or more and 10.0 μm or less.

A distance between the depth position xrc1of the first lattice defect region161and the depth position xp1may be larger than (solid line) or smaller than (dashed-dotted line) a distance between the depth position xrc1and the depth position xp2. The doping concentration distribution of the first lattice defect region161may have a region where it decreases at substantially a constant gradient from the depth position xp1toward the depth position xrc1. The doping concentration distribution of the first lattice defect region161may have a region where it decreases at substantially a constant gradient from the depth position xp2toward the depth position xrc1. The gradient being substantially constant may mean that a value of the gradient is within a range of ±50% of an average value of the gradient across 30% to 70% of a range between the depth position xp1and the depth position xrc1or between the depth position xp2and the depth position xrc1.

The width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10may be larger than a width WP1of the first peak61. The width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10may be larger than a width WP2of the second peak62. The width WP1of the first peak61and the width WP2of the second peak62may each be a full width at half maximum with respect to a local maximum value of the doping concentration (a peak doping concentration) in each peak. The width WP1of the first peak61and the width WP2of the second peak62may each be a full width at 10% with respect to the local maximum value of the doping concentration (the peak doping concentration) in each peak. The full width at 10% is a width at 0.1 DP2as a concentration that is 10% of the peak concentration DP2.

The width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10may be larger than a width WHp2of a peak of the hydrogen chemical concentration of the second peak62. The width WHp2of the peak of the hydrogen chemical concentration of the second peak62may be a full width at half maximum of the peak concentration DHp2of the hydrogen chemical concentration of the second peak62. The width WHp2of the peak of the hydrogen chemical concentration of the second peak62may be a full width at 10% of the peak concentration DHp2of the hydrogen chemical concentration of the second peak62. The full width at 10% is a width at 0.1 DHp2as a concentration that is 10% of the peak concentration DHp2. Since the hydrogen chemical concentration is higher than the doping concentration, the width WHp2of the peak of the hydrogen chemical concentration of the second peak62can be used to clearly define the width WHp2of the peak.

The width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10may be 50% or more of a width Wbufof the buffer region20.

A sum of widths of regions other than the first lattice defect region161in the buffer region20in the depth direction is represented by WEX. In the example ofFIG.2A, the number of regions other than the first lattice defect region161in the buffer region20is two. First is a region from the depth position xbto the depth position xp1, and a width thereof in the depth direction is represented by Wex1. Second is a region from the depth position xp2to the depth position xa, and a width thereof in the depth direction is represented by Wex2. A sum WEXof the widths of the regions other than the first lattice defect region161in the depth direction is represented by Wex1+Wex2. The sum WEXof the widths of the regions other than the first lattice defect region161in the depth direction is a value obtained by subtracting the width W161of the first lattice defect region161in the depth direction from the interval Wp1p2. The width W161of the first lattice defect region161in the depth direction may be larger than the sum WEXof the widths. By increasing the width W161of the first lattice defect region161in the depth direction, trade-offs among the turn-off loss, the inter-collector-emitter saturation voltage, and the leakage current can be improved. By increasing the width W161of the first lattice defect region161in the depth direction, the turn-off loss can be made small.

The hydrogen chemical concentration in the first lattice defect region161may be smaller than the doping concentration Ddrof the drift region18, or may be smaller than the bulk donor concentration. The hydrogen chemical concentration in the first lattice defect region161may be smaller than 1×1015atoms/cm3, smaller than 5×1014atoms/cm3, or smaller than 1×1014atoms/cm3. Many lattice defects exist in the first lattice defect region161. The lattice defects have many dangling bonds that do not contribute to the attachment therein, and forms a recombination center. Therefore, a carrier lifetime in the first lattice defect region161is lowered. On the other hand, when hydrogen exists in the first lattice defect region161, the dangling bonds are terminated by hydrogen. As a result, the recombination center concentration decreases, and lowering of the carrier lifetime in the first lattice defect region161is suppressed. In this regard, the hydrogen chemical concentration in the first lattice defect region161is set to be smaller than the doping concentration of the drift region, for example. Accordingly, it is possible to suppress the termination of the dangling bonds by hydrogen, cause the recombination center in the first lattice defect region161to remain widely, and make the carrier lifetime small. A minimum value of the hydrogen chemical concentration in the first lattice defect region161may be smaller than the peak concentration DP1of the first peak61, may be smaller than the doping concentration of the drift region, or may be smaller than the bulk donor concentration.

The depletion layer in the off state expands toward the back surface23in the drift region18in the front surface21side. The depletion layer may stop at the second peak62which is the hydrogen peak. Further, a position at which an integrated concentration reaches a critical integrated concentration may be positioned inside the second peak62. The critical integrated concentration will be described later. Accordingly, since the depletion layer does not penetrate into the first lattice defect region161, the leakage current can be prevented from increasing.

FIG.2Bshows a modified example of the semiconductor device100. The present example differs from the example shown inFIG.2Ain that the first peak61is formed by hydrogen ion implantation. A hydrogen chemical concentration peak171is a peak of the hydrogen chemical concentration distribution170corresponding to the first peak61. When a dopant of the first peak61is hydrogen, the hydrogen chemical concentration increases to a concentration of the same order as the doping concentration Ddrof the drift region18or the bulk donor concentration at an intermediate portion between the depth position Lp1 and the depth position Lp2. Accordingly, from the vicinity of the first peak61to the intermediate portion between the depth position Lp1 and the depth position Lp2, the dangling bonds existing in the lattice defects are terminated by hydrogen, or a concentration of the hydrogen donor increases. Accordingly, defects in the vicinity of the first peak61are recovered, and the width of the first lattice defect region161in the depth direction of the semiconductor substrate10becomes smaller than that in the case of the example shown inFIG.2A. In this manner, by selectively using the dopant of the first peak61, the width of the first lattice defect region161can be adjusted.

The width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10may be 25% or more, 50% or more, or 75% or more of the interval Wp1p2. The width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10may be 1.0 μm or more and 10.0 μm or less.

A distance between the depth position xrc1of the first lattice defect region161and the depth position xp1may be larger than (solid line) or smaller than (dashed-dotted line) a distance between the depth position xrc1and the depth position xp2. The doping concentration distribution of the first lattice defect region161may have a region where it decreases at substantially a constant gradient from the depth position xp1toward the depth position xrc1(solid line). Alternatively, the doping concentration distribution of the first lattice defect region161may have a region where it decreases at substantially a constant gradient from the depth position xp2toward the depth position xrc1(dashed-dotted line).

The width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10may be larger than the width WP1of the first peak61, or may be larger than the width WP2of the second peak62. The width WP1of the first peak61and the width WP2of the second peak62may each be a full width at half maximum or a full width at 10% with respect to a local maximum value of the doping concentration (the peak doping concentration) in each peak.

The width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10may be larger than the width WHp1of the peak of the hydrogen chemical concentration in the first peak61, or may be larger than the width WHp2of the peak of the hydrogen chemical concentration in the second peak62. The width WHp1of the peak of the hydrogen chemical concentration in the first peak61may be a full width at half maximum or a full width at 10% of the peak concentration DHp1of the hydrogen chemical concentration in the first peak61. The width WHp2of the peak of the hydrogen chemical concentration in the second peak62may be a full width at half maximum or a full width at 10% of the peak concentration DHp2of the hydrogen chemical concentration in the second peak62.

The width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10may be 50% or more of a width Wbufof the buffer region20. The width W161of the first lattice defect region161in the depth direction may be larger than the sum WEXof the widths of the regions other than the first lattice defect region161in the buffer region20in the depth direction. By increasing the width W161of the first lattice defect region161in the depth direction, trade-offs among the turn-off loss, the inter-collector-emitter saturation voltage, and the leakage current can be improved. By increasing the width W161of the first lattice defect region161in the depth direction, the turn-off loss can be made small.

The minimum value DHp1p2of the hydrogen chemical concentration in the first lattice defect region161may be smaller than the peak concentration DP1of the first peak61, may be smaller than the peak concentration DP2of the second peak62, may be smaller than the doping concentration Ddrof the drift region18, or may be smaller than the bulk donor concentration. The minimum value DHp1p2of the hydrogen chemical concentration in the first lattice defect region161may be smaller than 5×1015atoms/cm3, or may be smaller than 1×1015atoms/cm3. The minimum value DHp1p2of the hydrogen chemical concentration in the first lattice defect region161may be larger than 1×1012atoms/cm3, or may be larger than 1×1013atoms/cm3. By making the hydrogen chemical concentration in the first lattice defect region161small, the lattice defects can be caused to remain widely.

FIG.2Cshows a modified example of the semiconductor device100. The buffer region20of the present example has three peaks including the first peak61, the second peak62, and a third peak63. The buffer region20has the first peak61and a plurality of hydrogen peaks. The second peak62and the third peak63are each an example of the hydrogen peak. Note that in the present example, the first peak61is also formed by hydrogen ion implantation. A hydrogen chemical concentration peak171is a peak of the hydrogen chemical concentration distribution170corresponding to the first peak61. A hydrogen chemical concentration peak173is a peak of the hydrogen chemical concentration distribution170corresponding to the third peak63.

The third peak63is provided in the front surface21side relative to the second peak62in the depth direction of the semiconductor substrate10. A depth position Lp3indicates a depth position of the third peak63from the back surface23. The depth position Lp3may be 7.0 μm or more and 13.0 μm or less, and is, for example, 10.0 μm.

A peak concentration Dp3is a doping concentration of the third peak63. The peak concentration Dp3may be smaller than the peak concentration DP1and the peak concentration Dp2. The peak concentration Dp3may be 1.0 E14 cm−3or more and 1.0 E16 cm−3or less.

The first lattice defect region161is provided between the first peak61and the second peak62in the depth direction of the semiconductor substrate10, but is not provided between the second peak62and the third peak63. That is, in the present example, an interval Wp2p3between the second peak62and the third peak63is smaller than the interval Wp1p2between the first peak61and the second peak62. The hydrogen chemical concentration increases to a concentration of the same order as the doping concentration Ddrof the drift region18or the bulk donor concentration at an intermediate portion between the depth position Lp2and the depth position Lp3. Accordingly, defects are recovered between the second peak62and the third peak63, or the concentration of the hydrogen donor increases. By adjusting the interval between the peaks in this manner, it is possible to control whether to form the first lattice defect region161. The interval Wp2p3may be 1.0 μm or more and smaller than 5.0 μm.

The width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10may be 25% or more, 50% or more, or 75% or more of the interval Wp1p2. The width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10may be 1.0 μm or more and 10.0 μm or less.

A distance between the depth position xrc1of the first lattice defect region161and the depth position xp1may be larger than (solid line) or smaller than (dashed-dotted line) a distance between the depth position xrc1and the depth position xp2. The doping concentration distribution of the first lattice defect region161may have a region where it decreases at substantially a constant gradient from the depth position xp1toward the depth position xrc1(solid line). Alternatively, the doping concentration distribution of the first lattice defect region161may have a region where it decreases at substantially a constant gradient from the depth position xp2toward the depth position xrc1(dashed-dotted line).

The doping concentration distribution of the first lattice defect region161may have a region where an absolute value of the gradient of the doping concentration increases, a region where it decreases, and a region where the doping concentration is substantially constant (chain double-dashed line) from the position xp1and the position xp2at the respective end portions of the first lattice defect region161toward a position at which the minimum value Drc1is obtained.

The width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10may be larger than the width WP1of the first peak61, may be larger than the width WP2of the second peak62, or may be larger than the width WP3of the third peak63. The width WP1of the first peak61, the width WP2of the second peak62, and the width WP3of the third peak63may each be a full width at half maximum or a full width at 10% with respect to a local maximum value of the doping concentration (the peak doping concentration) in each peak.

The width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10may be larger than the width WHp1of the peak of the hydrogen chemical concentration in the first peak61, may be larger than the width WHp2of the peak of the hydrogen chemical concentration in the second peak62, or may be larger than the width WHp3of the peak of the hydrogen chemical concentration in the third peak63. The width WHp1of the peak of the hydrogen chemical concentration in the first peak61may be a full width at half maximum or a full width at 10% with respect to the peak concentration DHp1of the hydrogen chemical concentration in the first peak61. The width WHp2of the peak of the hydrogen chemical concentration in the second peak62may be a full width at half maximum or a full width at 10% with respect to the peak concentration DHp2of the hydrogen chemical concentration in the second peak62. The width WHp3of the peak of the hydrogen chemical concentration in the third peak63may be a full width at half maximum or a full width at 10% with respect to the peak concentration DHp3of the hydrogen chemical concentration in the third peak63.

The width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10may be 50% or more of a width Wbufof the buffer region20. The width W161of the first lattice defect region161in the depth direction may be larger than the sum WEXof the widths of the regions other than the first lattice defect region161in the buffer region20in the depth direction. By increasing the width W161of the first lattice defect region161in the depth direction, trade-offs among the turn-off loss, the inter-collector-emitter saturation voltage, and the leakage current can be improved. By increasing the width W161of the first lattice defect region161in the depth direction, the turn-off loss can be made small.

The minimum value DHp1p2of the hydrogen chemical concentration in the first lattice defect region161may be smaller than the peak concentration DP1of the first peak61, may be smaller than the peak concentration DP2of the second peak62, may be smaller than the peak concentration DP3of the third peak63, may be smaller than the doping concentration Ddrof the drift region18, or may be smaller than the bulk donor concentration. The minimum value DHp1p2of the hydrogen chemical concentration in the first lattice defect region161may be smaller than 5×1014atoms/cm3, or may be smaller than 1×1014atoms/cm3. The minimum value DHp1p2of the hydrogen chemical concentration in the first lattice defect region161may be larger than 1×1012atoms/cm3, or may be larger than 1×1013atoms/cm3. By making the hydrogen chemical concentration in the first lattice defect region161small, the lattice defects can be caused to remain widely.

The depletion layer in the off state may extend to the second peak62which is the hydrogen peak, or extend to the front surface21side relative to the second peak62. A position at which the integrated concentration reaches the critical integrated concentration may be positioned inside the second peak62. Accordingly, since the depletion layer does not penetrate into the first lattice defect region161, the leakage current can be prevented from increasing.

FIG.2Dshows a modified example of the semiconductor device100. The buffer region20of the present example has four peaks including the first peak61, the second peak62, the third peak63, and a fourth peak64. The buffer region20has the first peak61and a plurality of hydrogen peaks. The second peak62, the third peak63, and the fourth peak64are each an example of the hydrogen peak. Note that in the present example, the first peak61is also formed by hydrogen ion implantation. The hydrogen chemical concentration peak171, the hydrogen chemical concentration peak172, the hydrogen chemical concentration peak173, and a hydrogen chemical concentration peak174respectively correspond to the first peak61, the second peak62, the third peak63, and the fourth peak64.

The fourth peak64is provided in the front surface21side relative to the third peak63in the depth direction of the semiconductor substrate10. A depth position Lp4indicates a depth position of the fourth peak64from the back surface23. The depth position Lp4may be 10% or more and 20% or less of the substrate thickness of the semiconductor substrate10. For example, the depth position Lp4is 15.0 μm.

A peak concentration DP4is a doping concentration of the fourth peak64. The peak concentration DP4may be smaller than the peak concentration Dp1, the peak concentration Dp2, and the peak concentration Dp3. The peak concentration DP4may be 1.0 E14 cm−3or more and 1.0 E16 cm−3or less.

The doping concentrations of the four peaks included in the buffer region20may gradually decrease toward the front surface21side of the semiconductor substrate10. That is, the peak concentration Dp2of the second peak62may be smaller than the peak concentration Dp1of the first peak61. The peak concentration Dp3of the third peak63may be smaller than the peak concentration Dp2of the second peak62. The peak concentration DP4of the fourth peak64may be smaller than the peak concentration Dp3of the third peak63.

The interval Wp2p3between the second peak62and the third peak63may be smaller than the interval Wp1p2between the first peak61and the second peak62. An interval Wp3p4between the third peak63and the fourth peak64may be smaller than the interval Wp1p2between the first peak61and the second peak62. Moreover, the interval Wp3p4between the third peak63and the fourth peak64may be the same as or may be different from the interval Wp2p3between the second peak62and the third peak63. The interval Wp3p4between the third peak63and the fourth peak64in the present example is smaller than the interval Wp2p3between the second peak62and the third peak63.

The first lattice defect region161is provided between the first peak61and the second peak62in the depth direction of the semiconductor substrate10. The first lattice defect region161is not provided between the second peak62and the third peak63and between the third peak63and the fourth peak64. That is, in the present example, an interval Wp2p3between the second peak62and the third peak63is smaller than the interval Wp1p2between the first peak61and the second peak62. The hydrogen chemical concentration increases to a concentration of the same order as the doping concentration Ddrof the drift region18or the bulk donor concentration at an intermediate portion between the depth position Lp2and the depth position Lp3. Accordingly, defects are recovered between the second peak62and the third peak63. Further, the interval Wp3p4between the third peak63and the fourth peak64is smaller than the interval Wp1p2between the first peak61and the second peak62. The hydrogen chemical concentration increases to a concentration of the same order as the doping concentration Ddrof the drift region18or the bulk donor concentration at an intermediate portion between the depth position Lp3and the depth position Lp4. Accordingly, defects are recovered between the third peak63and the fourth peak64. The interval Wp3p4may be 1.0 μm or more and smaller than 5.0 μm.

The width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10may be 25% or more, 50% or more, or 75% or more of the interval Wp1p2. The width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10may be 1.0 μm or more and 10.0 μm or less.

A distance between the depth position xrc1of the first lattice defect region161and the depth position xp1may be larger than (solid line) or smaller than (dashed-dotted line) a distance between the depth position xrc1and the depth position xp2. The doping concentration distribution of the first lattice defect region161may have a region where it decreases at substantially a constant gradient from the depth position xp1toward the depth position xrc1(solid line). Alternatively, the doping concentration distribution of the first lattice defect region161may have a region where it decreases at substantially a constant gradient from the depth position xp2toward the depth position xrc1(dashed-dotted line).

The doping concentration distribution of the first lattice defect region161may have a region where an absolute value of the gradient of the doping concentration increases, a region where it decreases, and a region where the doping concentration is substantially constant (chain double-dashed line) from the position xp1and the position xp2at the respective end portions of the first lattice defect region161toward a position at which the minimum value Drc1is obtained.

The width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10may be larger than the width WP1of the first peak61, may be larger than the width WP2of the second peak62, may be larger than the width WP3of the third peak63, or may be larger than the width WP4of the fourth peak64. The width WP1of the first peak61, the width WP2of the second peak62, the width WP3of the third peak63, and the width WP4of the fourth peak64may each be a full width at half maximum or a full width at 10% with respect to a local maximum value of the doping concentration (the peak doping concentration) in each peak.

The width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10may be larger than the width WHp1of the peak of the hydrogen chemical concentration in the first peak61, may be larger than the width WHp2of the peak of the hydrogen chemical concentration in the second peak62, may be larger than the width WHp3of the peak of the hydrogen chemical concentration in the third peak63, or may be larger than the width WHp4of the peak of the hydrogen chemical concentration in the fourth peak64. The width WHp1of the peak of the hydrogen chemical concentration in the first peak61may be a full width at half maximum or a full width at 10% with respect to the peak concentration DHp1of the hydrogen chemical concentration in the first peak61. The width WHp2of the peak of the hydrogen chemical concentration in the second peak62may be a full width at half maximum or a full width at 10% with respect to the peak concentration DHp2of the hydrogen chemical concentration in the second peak62. The width WHp3of the peak of the hydrogen chemical concentration in the third peak63may be a full width at half maximum or a full width at 10% with respect to the peak concentration DHp3of the hydrogen chemical concentration in the third peak63. The width WHp4of the peak of the hydrogen chemical concentration in the fourth peak64may be a full width at half maximum or a full width at 10% with respect to the peak concentration DHp4of the hydrogen chemical concentration in the fourth peak64.

The width Wii of the first lattice defect region161in the depth direction of the semiconductor substrate10may be 50% or more of a width Wbufof the buffer region20. The width W161of the first lattice defect region161in the depth direction may be larger than the sum WEXof the widths of the regions other than the first lattice defect region161in the buffer region20in the depth direction. By increasing the width W161of the first lattice defect region161in the depth direction, trade-offs among the turn-off loss, the inter-collector-emitter saturation voltage, and the leakage current can be improved. By increasing the width W161of the first lattice defect region161in the depth direction, the turn-off loss can be made small.

The minimum value DHp1p2of the hydrogen chemical concentration in the first lattice defect region161may be smaller than the peak concentration DP1of the first peak61, may be smaller than the peak concentration DP2of the second peak62, may be smaller than the peak concentration DP3of the third peak63, may be smaller than the peak concentration DP4of the fourth peak64, may be smaller than the doping concentration Ddrof the drift region18, or may be smaller than the bulk donor concentration. The minimum value DHp1p2of the hydrogen chemical concentration in the first lattice defect region161may be smaller than 5×1015atoms/cm3, or may be smaller than 1×1015atoms/cm3. The minimum value DHp1p2of the hydrogen chemical concentration in the first lattice defect region161may be larger than 1×1012atoms/cm3, or may be larger than 1×1013atoms/cm3. By making the hydrogen chemical concentration in the first lattice defect region161small, the lattice defects can be caused to remain widely.

FIG.2Eshows a modified example of the semiconductor device100. The present example differs from the example shown inFIG.2Din that the interval Wp1p2between the first peak61and the second peak62is smaller than the interval Wp1p2in the example shown inFIG.2Dand that the first peak61is formed by phosphorus ion implantation. When the dopant of the first peak61is phosphorus, defects have not recovered in the vicinity of the first peak61, and the distance between the first peak61and the first lattice defect region161is smaller than that in the case of the example shown inFIG.2D.

The interval Wp1p2between the first peak61and the second peak62in the present example is smaller than the interval Wp1p2in the example shown inFIG.2D. By forming the first peak61using phosphorus in this manner, even when the interval Wp1p2is made small, the first lattice defect region161can be formed between the first peak61and the second peak62. The interval Wp1p2may be 2.0 μm or more, or may be 3.0 μm or more. The interval Wp1p2may be smaller than 10.0 μm, or may be smaller than 5.0 μm.

The width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10may be 25% or more, 50% or more, or 75% or more of the interval Wp1p2.

A distance between the depth position xrc1of the first lattice defect region161and the depth position xp1may be larger than (solid line) or smaller than (dashed-dotted line) a distance between the depth position xrc1and the depth position xp2. The doping concentration distribution of the first lattice defect region161may have a region where it decreases at substantially a constant gradient from the depth position xp1toward the depth position xrc1(solid line). Alternatively, the doping concentration distribution of the first lattice defect region161may have a region where it decreases at substantially a constant gradient from the depth position xp2toward the depth position xrc1(dashed-dotted line).

The width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10may be larger than the width WP1of the first peak61, may be larger than the width WP2of the second peak62, may be larger than the width WP3of the third peak63, or may be larger than the width WP4of the fourth peak64. The width WP1of the first peak61, the width WP2of the second peak62, the width WP3of the third peak63, and the width WP4of the fourth peak64may each be a full width at half maximum or a full width at 10% with respect to a local maximum value of the doping concentration (the peak doping concentration) in each peak.

The width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10may be larger than the width WHp2of the peak of the hydrogen chemical concentration in the second peak62, may be larger than the width WHp3of the peak of the hydrogen chemical concentration in the third peak63, or may be larger than the width WHp4of the peak of the hydrogen chemical concentration in the fourth peak64. The width WHp2of the peak of the hydrogen chemical concentration in the second peak62may be a full width at half maximum or a full width at 10% with respect to the peak concentration DHp2of the hydrogen chemical concentration in the second peak62. The width WHp3of the peak of the hydrogen chemical concentration in the third peak63may be a full width at half maximum or a full width at 10% with respect to the peak concentration DHp3of the hydrogen chemical concentration in the third peak63. The width WHp4of the peak of the hydrogen chemical concentration in the fourth peak64may be a full width at half maximum or a full width at 10% with respect to the peak concentration DHp4of the hydrogen chemical concentration in the fourth peak64.

The width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10may be 50% or more of a width Wbufof the buffer region20. The width W161of the first lattice defect region161in the depth direction may be larger than the sum WEXof the widths of the regions other than the first lattice defect region161in the buffer region20in the depth direction. By increasing the width W161of the first lattice defect region161in the depth direction, trade-offs among the turn-off loss, the inter-collector-emitter saturation voltage, and the leakage current can be improved. By increasing the width W161of the first lattice defect region161in the depth direction, the turn-off loss can be made small.

The minimum value of the hydrogen chemical concentration in the first lattice defect region161may be smaller than the peak concentration DP1of the first peak61, may be smaller than the peak concentration DP2of the second peak62, may be smaller than the peak concentration DP3of the third peak63, may be smaller than the peak concentration DP4of the fourth peak64, may be smaller than the doping concentration Ddrof the drift region18, or may be smaller than the bulk donor concentration. The hydrogen chemical concentration in the first lattice defect region161may be smaller than 1×1015atoms/cm3, smaller than 5×1014atoms/cm3, or smaller than 1×1014atoms/cm3. By making the hydrogen chemical concentration in the first lattice defect region161small, the lattice defects can be caused to remain widely.

FIG.2Fshows a modified example of the semiconductor device100. The buffer region20of the present example has two lattice defect regions including the first lattice defect region161and a second lattice defect region162. The buffer region20of the present example has four peaks including the first peak61, the second peak62, the third peak63, and a fourth peak64. The first peak61of the present example is formed by hydrogen ion implantation.

The first lattice defect region161is provided between the plurality of hydrogen peaks in the depth direction of the semiconductor substrate10. The first lattice defect region161of the present example is provided between the second peak62and the third peak63. The interval Wp2p3between the second peak62and the third peak63may be larger than the interval Wp1p2between the first peak61and the second peak62. The interval Wp2p3may be 3.0 μm or more, or may be 5.0 μm or more. The interval Wp2p3may be smaller than 10.0 μm, or may be smaller than 7.0 μm.

The doping concentration distribution of the first lattice defect region161has a minimum value Drc1of the doping concentration at a depth position xrc1. The depth position xrc1may be positioned in the front surface21side (solid line) or the back surface side (dashed-dotted line) relative to an intermediate position of the first lattice defect region161. The minimum value Drc1of the doping concentration may be higher than or lower than 10% of the doping concentration Ddrof the drift region18. In the present example, the minimum value Drc1of the doping concentration is higher than 10% of the doping concentration Ddrof the drift region18.

The width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10may be 25% or more, 50% or more, or 75% or more of the interval Wp1p2. The width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10may be 1.0 μm or more and 10.0 μm or less.

A distance between the depth position xrc1of the first lattice defect region161and a depth position x1p2may be larger than (solid line) or smaller than (dashed-dotted line) a distance between the depth position xrc1and a depth position x1p3. The doping concentration distribution of the first lattice defect region161may have a region where it decreases at substantially a constant gradient from the depth position x1p2toward the depth position xrc1(solid line). Alternatively, the doping concentration distribution of the first lattice defect region161may have a region where it decreases at substantially a constant gradient from the depth position x1p3toward the depth position xrc1(dashed-dotted line).

The doping concentration distribution of the first lattice defect region161may have a region where an absolute value of the gradient of the doping concentration increases, a region where it decreases, and a region where the doping concentration is substantially constant (chain double-dashed line) from the position x1p2and the position x1p3at the respective end portions of the first lattice defect region161toward a position at which the minimum value Drc1is obtained.

The distance between the depth position xrc1of the first lattice defect region161and the depth position x1p2may be larger than (solid line) or smaller than (dashed-dotted line) the distance between the depth position xrc1and the depth position x1p3. The doping concentration distribution of the first lattice defect region161may have a region where it decreases at substantially a constant gradient from the depth position x1p2toward the depth position xrc1. The doping concentration distribution of the first lattice defect region161may have a region where it decreases at substantially a constant gradient from the depth position x1p3toward the depth position xrc1. The gradient being substantially constant may mean that a value of the gradient is within a range of 50% of an average value of the gradient across 30% to 70% of a range between the depth position x1p2and the depth position xrc1or between the depth position x1p3and the depth position xrc1.

The width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10may be larger than the width WP1of the first peak61, may be larger than the width WP2of the second peak62, may be larger than the width WP3of the third peak63, or may be larger than the width WP4of the fourth peak64. The width WP1of the first peak61, the width WP2of the second peak62, the width WP3of the third peak63, and the width WP4of the fourth peak64may each be a full width at half maximum or a full width at 10% with respect to a local maximum value of the doping concentration (the peak doping concentration) in each peak.

The width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10may be larger than the width WHp1of the peak of the hydrogen chemical concentration in the first peak61, may be larger than the width WHp2of the peak of the hydrogen chemical concentration in the second peak62, may be larger than the width WHp3of the peak of the hydrogen chemical concentration in the third peak63, or may be larger than the width WHp4of the peak of the hydrogen chemical concentration in the fourth peak64. The width WHp1of the peak of the hydrogen chemical concentration in the first peak61may be a full width at half maximum or a full width at 10% with respect to the peak concentration DHp1of the hydrogen chemical concentration in the first peak61. The width WHp2of the peak of the hydrogen chemical concentration in the second peak62may be a full width at half maximum or a full width at 10% with respect to the peak concentration DHp2of the hydrogen chemical concentration in the second peak62. The width WHp3of the peak of the hydrogen chemical concentration in the third peak63may be a full width at half maximum or a full width at 10% with respect to the peak concentration DHp3of the hydrogen chemical concentration in the third peak63. The width WHp4of the peak of the hydrogen chemical concentration in the fourth peak64may be a full width at half maximum or a full width at 10% with respect to the peak concentration DHp4of the hydrogen chemical concentration in the fourth peak64.

The width W161of the first lattice defect region161in the depth direction of the semiconductor substrate10may be 50% or more of a width Wbufof the buffer region20. The width W161of the first lattice defect region161in the depth direction may be larger than the sum WEXof the widths of the regions other than the first lattice defect region161in the buffer region20in the depth direction. By increasing the width W161of the first lattice defect region161in the depth direction, trade-offs among the turn-off loss, the inter-collector-emitter saturation voltage, and the leakage current can be improved. By increasing the width W161of the first lattice defect region161in the depth direction, the turn-off loss can be made small.

The minimum value D1Hp1p2of the hydrogen chemical concentration in the first lattice defect region161may be smaller than the peak concentration DP1of the first peak61, may be smaller than the peak concentration DP2of the second peak62, may be smaller than the peak concentration DP3of the third peak63, may be smaller than the peak concentration DP4of the fourth peak64, may be smaller than the doping concentration Ddrof the drift region18, or may be smaller than the bulk donor concentration. The minimum value D1Hp1p2of the hydrogen chemical concentration in the first lattice defect region161may be smaller than 5×1014atoms/cm3, or may be smaller than 1×1014atoms/cm3. The minimum value D1Hp1p2of the hydrogen chemical concentration in the first lattice defect region161may be larger than 1×1012atoms/cm3, or may be larger than 1×1013atoms/cm3. By making the hydrogen chemical concentration in the first lattice defect region161small, the lattice defects can be caused to remain widely.

The second lattice defect region162is a lattice defect region that is provided in the buffer region20and is different from the first lattice defect region161. Similar to the first lattice defect region161, the second lattice defect region162is formed in the passed-through region of hydrogen ions during implantation of hydrogen ions. The second lattice defect region162is provided between the plurality of hydrogen peaks in the front surface21side of the semiconductor substrate10relative to the first lattice defect region161in the depth direction of the semiconductor substrate10. The second lattice defect region162of the present example is provided between the third peak63and the fourth peak64. The interval Wp3p4between the third peak63and the fourth peak64may be larger than the interval Wp1p2between the first peak61and the second peak62. Moreover, the interval Wp3p4between the third peak63and the fourth peak64may be the same as the interval Wp2p3between the second peak62and the third peak63, or may be smaller than the interval Wp2p3. The interval Wp3p4may be 3.0 μm or more, or may be 5.0 μm or more. The interval Wp3p4may be smaller than 10.0 μm, or may be smaller than 7.0 μm.

Similar to the first lattice defect region161, the doping concentration distribution of the second lattice defect region162has a minimum value Drc2of the doping concentration at the depth position xrc2. The depth position xrc2may be positioned in the front surface21side (solid line) or the back surface23side (dashed-dotted line) relative to an intermediate position of the second lattice defect region162. The minimum value Drc2of the doping concentration may be higher than or lower than 10% of the doping concentration Ddrof the drift region18. In the present example, the minimum value Drc2of the doping concentration is higher than 10% of the doping concentration Ddrof the drift region18. The minimum value Drc2of the doping concentration may be higher than or lower than the minimum value Drc1of the doping concentration of the first lattice defect region161as in the present example.

A width W162of the second lattice defect region162in the depth direction of the semiconductor substrate10may be 25% or more, 50% or more, or 75% or more of the interval Wp3p4. The width W162of the second lattice defect region162in the depth direction of the semiconductor substrate10may be 1.0 μm or more and 10.0 μm or less.

A distance between the depth position xrc2of the second lattice defect region162and a depth position x2p3may be larger than (solid line) or smaller than (dashed-dotted line) a distance between the depth position xrc2and a depth position x2p4. The doping concentration distribution of the second lattice defect region162may have a region where it decreases at substantially a constant gradient from the depth position x2p3toward the depth position xrc2(solid line). Alternatively, the doping concentration distribution of the second lattice defect region162may have a region where it decreases at substantially a constant gradient from the depth position x2p4toward the depth position xrc2(dashed-dotted line).

The doping concentration distribution of the second lattice defect region162may have a region where an absolute value of the gradient of the doping concentration increases, a region where it decreases, and a region where the doping concentration is substantially constant (chain double-dashed line) from the position x2p3and the position x2p4at the respective end portions of the second lattice defect region162toward a position at which the minimum value Drc2is obtained.

A distance between the depth position xrc2of the second lattice defect region162and a depth position x2p3may be larger than (solid line) or smaller than (dashed-dotted line) a distance between the depth position xrc2and a depth position x2p4. The doping concentration distribution of the second lattice defect region162may have a region where it decreases at substantially a constant gradient from the depth position x2p3toward the depth position xrc2. The doping concentration distribution of the second lattice defect region162may have a region where it decreases at substantially a constant gradient from the depth position x2p4toward the depth position xrc2. The gradient being substantially constant may mean that a value of the gradient is within a range of 50% of an average value of the gradient across 30% to 70% of a range between the depth position x2p3and the depth position xrc2or between the depth position x2p4and the depth position xrc2.

The width W162of the second lattice defect region162in the depth direction of the semiconductor substrate10may be larger than the width WP1of the first peak61, may be larger than the width WP2of the second peak62, may be larger than the width WP3of the third peak63, or may be larger than the width WP4of the fourth peak64. The width WP1of the first peak61, the width WP2of the second peak62, the width WP3of the third peak63, and the width WP4of the fourth peak64may each be a full width at half maximum or a full width at 10% with respect to a local maximum value of the doping concentration (the peak doping concentration) in each peak.

The width W162of the second lattice defect region162in the depth direction of the semiconductor substrate10may be larger than the width WHp1of the peak of the hydrogen chemical concentration in the first peak61, may be larger than the width WHp2of the peak of the hydrogen chemical concentration in the second peak62, may be larger than the width WHp3of the peak of the hydrogen chemical concentration in the third peak63, or may be larger than the width WHp4of the peak of the hydrogen chemical concentration in the fourth peak64. The width WHp1of the peak of the hydrogen chemical concentration in the first peak61may be a full width at half maximum or a full width at 10% with respect to the peak concentration DHp1of the hydrogen chemical concentration in the first peak61. The width WHp2of the peak of the hydrogen chemical concentration in the second peak62may be a full width at half maximum or a full width at 10% with respect to the peak concentration DHp2of the hydrogen chemical concentration in the second peak62. The width WHp3of the peak of the hydrogen chemical concentration in the third peak63may be a full width at half maximum or a full width at 10% with respect to the peak concentration DHp3of the hydrogen chemical concentration in the third peak63. The width WHp4of the peak of the hydrogen chemical concentration in the fourth peak64may be a full width at half maximum or a full width at 10% with respect to the peak concentration DHp4of the hydrogen chemical concentration in the fourth peak64.

The width W162of the second lattice defect region162in the depth direction of the semiconductor substrate10may be 50% or more of the width Wbufof the buffer region20. The width W162of the second lattice defect region162in the depth direction may be larger than the sum WEXof the widths of the regions other than the second lattice defect region162in the buffer region20in the depth direction. By increasing the width W162of the second lattice defect region162in the depth direction, trade-offs among the turn-off loss, the inter-collector-emitter saturation voltage, and the leakage current can be improved. By increasing the width W162of the second lattice defect region162in the depth direction, the turn-off loss can be made small.

The minimum value D2Hp1p2of the hydrogen chemical concentration in the second lattice defect region162may be smaller than the peak concentration DP1of the first peak61, may be smaller than the peak concentration DP2of the second peak62, may be smaller than the peak concentration DP3of the third peak63, may be smaller than the peak concentration DP4of the fourth peak64, may be smaller than the doping concentration Ddrof the drift region18, or may be smaller than the bulk donor concentration. The minimum value D2Hp1p2of the hydrogen chemical concentration in the second lattice defect region162may be smaller than 5×1014atoms/cm3, or may be smaller than 1×1014atoms/cm3. The minimum value D2Hp1p2of the hydrogen chemical concentration in the second lattice defect region162may be larger than 1×1012atoms/cm3, or may be larger than 1×1013atoms/cm3. By making the hydrogen chemical concentration in the second lattice defect region162small, the lattice defects can be caused to remain widely.

When the depletion layer in the off state crosses the fourth peak64toward the back surface23side and penetrates into the second lattice defect region162, the leakage current increases. Thus, the depletion layer may stop inside the fourth peak64which is the hydrogen peak. A position at which the integrated concentration reaches the critical integrated concentration may be positioned inside the fourth peak64. Accordingly, since the depletion layer does not penetrate into the second lattice defect region162, the leakage current can be prevented from increasing.

FIG.2Gshows a modified example of the doping concentration distribution of the first lattice defect region161. In addition to that described above, the doping concentration distribution of the first lattice defect region161may have a portion in which an absolute value of the gradient of the doping concentration increases from the depth position xp2at the end portion of the first lattice defect region161toward the position xrc1at which the minimum value Drc1is obtained (solid line). The depth position xp2is positioned in the front surface21side relative to a center position xcenterof the first lattice defect region161. The depth position xrc1is positioned in the back surface23side relative to the center position xcenterof the first lattice defect region161. An inclination of a slant portion of a right triangle shown inFIG.2Gindicates a degree of the absolute value of the gradient of the doping concentration. As a length of a vertical line of the right triangle becomes larger, the absolute value of the gradient of the doping concentration becomes larger. The shape of the doping concentration distribution of the first lattice defect region161may be an upward convex shape. Regarding the absolute value of the gradient of the doping concentration of the first lattice defect region161, the absolute value of the gradient of the doping concentration may increase in a region of 50% or more and 100% or less of a width from the depth position xp2at the end portion of the first lattice defect region161to the depth position xrc1of the minimum value.

As indicated by the dashed-dotted line inFIG.2G, a portion in which the absolute value of the gradient of the doping concentration increases from the position xp1at the end portion of the first lattice defect region161toward the position xrc2at which the minimum value Drc1is obtained may also be provided. The depth position xp1is positioned in the back surface23side relative to the center position xcenterof the first lattice defect region161. The depth position xrc2is positioned in the front surface21side relative to the center position xcenterof the first lattice defect region161. The depth position xp1is positioned in the back surface23side relative to the depth position xp2. The depth position xrc1is positioned in the back surface23side relative to the depth position xrc2.

As indicated by the chain double-dashed line inFIG.2G, a portion in which the absolute value of the gradient of the doping concentration increases from the position xp1and position xp2at the end portions of the first lattice defect region161toward the position xcenterat which the minimum value Drc1is obtained may also be provided. The doping concentration distribution of the first lattice defect region161may be provided along a distribution obtained by vertically flipping the Gaussian distribution. The doping concentration distribution of the first lattice defect region161may be a distribution that is symmetric with respect to the depth position xcenterin the depth direction.

FIG.2Hshows a modified example of the doping concentration distribution of the first lattice defect region161. The doping concentration distribution of the first lattice defect region161may have a portion in which the absolute value of the gradient of the doping concentration decreases or the absolute value of the gradient is substantially constant from the depth position xp1at the end portion of the first lattice defect region161toward the position xrc2at which the minimum value Drc1is obtained (solid line). The depth position xp1is positioned in the back surface23side relative to the center position xcenterof the first lattice defect region161. The depth position xrc2is positioned in the front surface21side relative to the center position xcenterof the first lattice defect region161. An inclination of a slant portion of a right triangle shown inFIG.2Hindicates a degree of the absolute value of the gradient of the doping concentration. As a length of a vertical line of the right triangle becomes larger, the absolute value of the gradient of the doping concentration becomes larger. The shape of the doping concentration distribution of the first lattice defect region161may be a downward convex shape. The absolute value of the gradient of the doping concentration of the first lattice defect region161may have a region where the absolute value of the gradient of the doping concentration is substantially constant in a region from the depth position xp1at the end portion of the first lattice defect region161to the depth position xrc2of the minimum value. The absolute value of the gradient being substantially constant may mean that the absolute value of the gradient is within a range of 50% of an average value of the absolute value of the gradient across 30% to 70% of the range between the depth position xp1and the depth position xrc2.

As indicated by the dashed-dotted line inFIG.2H, a portion in which the absolute value of the gradient of the doping concentration decreases or the absolute value of the gradient is substantially constant may be provided from the position xp2at the end portion of the first lattice defect region161toward the position xrc1at which the minimum value Drc1is obtained. The depth position xp2is positioned in the front surface21side relative to a center position xcenterof the first lattice defect region161. The depth position xrc1is positioned in the back surface23side relative to the center position xcenterof the first lattice defect region161. The depth position xp1is positioned in the back surface23side relative to the depth position xp2. The depth position xrc1is positioned in the back surface23side relative to the depth position xrc2.

As indicated by the dotted line inFIG.2H, a region where the absolute value of the gradient of the doping concentration increases, a region where it decreases, and a region where the doping concentration is substantially constant may be provided from the position xp1and the position xp2at the respective end portions of the first lattice defect region161toward the position xcenterat which the minimum value Drc1is obtained. In other words, the doping concentration distribution of the first lattice defect region161may have a downwardly convex shape like a shape of a bowl or a bathtub (dotted line). The doping concentration distribution of the first lattice defect region161may be a distribution that is symmetric with respect to the depth position xcenterin the depth direction. The region where the doping concentration of the first lattice defect region161is substantially constant may include the intermediate depth position xcenterof the first lattice defect region161(dotted line). The region where the doping concentration is substantially constant may be a range where the doping concentration includes the minimum value Drc1 and the doping concentration is within ±50% of the minimum value Drc1. The region where the doping concentration is substantially constant may be a depth range that is 30% to 70% of the width between the depth position xp1and the depth position xp2.

FIG.3Ashows an example of the semiconductor device100including a first lifetime control region151. In the present example, descriptions will be given on a case of providing the first lifetime control region151in the example shown inFIG.2A, but the first lifetime control region151may be combined with the semiconductor device100disclosed in other examples. The first lifetime control region151may be provided at any position of the buffer region20in the depth direction of the semiconductor substrate10. Note that the hydrogen chemical concentration distribution170of the hydrogen peak may be omitted in the drawings, but the hydrogen chemical concentration distribution170may exist as shown in any of the examples shown inFIGS.2A to2F.

A peak position of the first lifetime control region151is provided in the front surface21side of the semiconductor substrate10relative to the first peak61. Further, the peak position of the first lifetime control region151is in the back surface23side relative to the hydrogen peak of the buffer region20in the depth direction of the semiconductor substrate10. The peak position of the first lifetime control region151of the present example is between the first lattice defect region161and the second peak62which is the hydrogen peak in the depth direction of the semiconductor substrate10.

A peak concentration Dk1is a lifetime killer concentration of the first lifetime control region151. The lifetime killer concentration may be a concentration at a recombination center. The recombination center may be a complex of vacancies such as a single vacancy and a divacancy, may be an inter-lattice atom (silicon in the present example) of atoms constituting a semiconductor substrate, may be an atom of a noble gas element such as helium, or may be a metal atom of platinum, gold, or the like. The peak concentration Dk1may be larger than the peak concentration Dp1of the doping concentration in the first peak61. The peak concentration Dk1may be 2 times or more, 5 times or more, or 10 times or more of the peak concentration Dp1. In one example, the peak concentration Dk1is 1.0 E15 cm−3or more and 1.0 E17 cm−3or less. Note that the peak concentration Dk1may be smaller than the peak concentration Dc of the doping concentration in the collector region22.

By forming the peak concentration Dk1to be larger than the peak concentration Dp1, an effect of hydrogen for forming the buffer region20becomes small. That is, while hydrogen for forming the buffer region20may terminate the dangling bonds of the lattice defects so as to cause the introduced lattice defects to disappear, by setting the peak concentration Dk1of the first lifetime control region151to be higher than the peak concentration of the buffer region20, disappearance of the lattice defects can be suppressed. Accordingly, excess carriers in the back surface23side during a reverse recovery operation can be sufficiently reduced.

FIG.3Bshows a modified example of the semiconductor device100including the first lifetime control region151. The first lifetime control region151of the present example is provided in a region that is the same as the region where the first lattice defect region161is formed. The first lifetime control region151of the present example is provided at a center of the first lattice defect region161in the depth direction of the semiconductor substrate10, but is not limited thereto. The first lifetime control region151may be provided in the back surface23side or the front surface21side relative to the center of the first lattice defect region161. Moreover, the first lifetime control region151may be provided at a boundary between the first peak61and the first lattice defect region161, or may be provided at a boundary between the first lattice defect region161and the second peak62.

FIG.3Cshows a modified example of the semiconductor device100including the first lifetime control region151. In the present example, descriptions will be given on a case of providing the first lifetime control region151in the example shown inFIG.2B, but the first lifetime control region151may be combined with the semiconductor device100disclosed in other examples.

The first lifetime control region151is provided in the back surface23side relative to the first lattice defect region161in the depth direction of the semiconductor substrate10. The first lifetime control region151of the present example is provided between the first peak61and the first lattice defect region161. The first lifetime control region151may be provided in a region where the doping concentration becomes substantially the same as that of the drift region18in the front surface21side relative to the first peak61. Alternatively, a part of the first lifetime control region151may be provided in the first lattice defect region161.

FIG.3Dshows a modified example of the semiconductor device100including the first lifetime control region151. In the present example, the position of the first lifetime control region151differs from that of the example shown inFIG.3C. In the present example, points different from those of the example shown inFIG.3Cwill be described in particular. The first lifetime control region151of the present example is provided at a tail portion of the first peak61between the first peak61and the first lattice defect region161. That is, the peak position of the first lifetime control region151is in the front surface21side relative to the first peak61. In this manner, the first lifetime control region151may be provided while a part thereof overlaps with the first peak61.

FIG.3Eshows a modified example of the semiconductor device100including the first lifetime control region151. In the present example, the position of the first lifetime control region151differs from that of the examples shown inFIGS.3C and3D. In the present example, points different from those of the examples shown inFIGS.3C and3Dwill be described in particular. The first lifetime control region151of the present example is provided in the back surface23side relative to the first peak61in the depth direction of the semiconductor substrate10. The peak position of the first lifetime control region151of the present example is provided between the collector region22and the first peak61.

FIG.3Fshows a modified example of the semiconductor device100including the first lifetime control region151. In the present example, the position of the first lifetime control region151differs from that of the examples shown inFIGS.3A and3B. In the present example, points different from those of the examples shown inFIGS.3A and3Bwill be described in particular. The first lifetime control region151of the present example has a peak of the doping concentration at the same position as the depth position Lp2of the second peak62in the depth direction of the semiconductor substrate10. Note that when the buffer region20has a plurality of hydrogen peaks such as the third peak63or the fourth peak64, the first lifetime control region151may be provided at the same position as the depth position of any of the hydrogen peaks.

FIG.3Gshows a modified example of the semiconductor device100including the first lifetime control region151. In the present example, the position of the first lifetime control region151differs from that of the examples shown inFIGS.3A,3B, and3F. In the present example, points different from those of the examples shown inFIGS.3A,3B, and3Fwill be described in particular.

The peak position of the first lifetime control region151of the present example is between the hydrogen peak of the buffer region20and the drift region18in the depth direction of the semiconductor substrate10. That is, the peak position of the first lifetime control region151of the present example is provided in the front surface21side relative to the second peak62in the depth direction of the semiconductor substrate10. Moreover, the peak position of the first lifetime control region151is provided in the back surface23side relative to the drift region18.

Herein, since the peak position of the first lifetime control region151is provided close to the second peak62even when it is provided in the front surface21side relative to the second peak62, the dangling bonds of the lattice defects in the first lifetime control region151are terminated by hydrogen, and thus a rise in leakage current can be suppressed. Close to the second peak62means that the peak position of the first lifetime control region151is provided between the second peak62and the drift region18, for example. That is, the peak position of the first lifetime control region151may be provided on an inner side of a tail in the front surface21side of the second peak62.

FIG.3Hshows a modified example of the semiconductor device100including the first lifetime control region151. The peak position of the first lifetime control region151of the present example is provided in the drift region18while being set apart from the hydrogen peak of the buffer region20in the depth direction of the semiconductor substrate10. Even when the peak position of the first lifetime control region151is provided in the front surface21side apart from the second peak62, since lifetime control is also performed by the first lattice defect region161, the first lifetime control region151can be formed by low-dose helium ion implantation instead of high-dose ion implantation, and thus the rise in leakage current can be suppressed.

FIG.3Ishows a modified example of the semiconductor device100including the first lifetime control region151. In the present example, descriptions will be given on a case of providing the first lifetime control region151in the example shown inFIG.2F, but the first lifetime control region151may be combined with the semiconductor device100disclosed in other examples.

The first lifetime control region151is provided between the second lattice defect region162and the fourth peak64. In this case, as will be described later, the fourth peak64may function as a field stop layer which prevents the depletion layer expanding from the lower surface side of the base region14from reaching the collector region22of the second conductivity type.

Alternatively, the first lifetime control region151may be provided between the first lattice defect region161and the third peak63. In this case, the third peak63and the fourth peak64may function as a field stop layer which prevents the depletion layer expanding from the lower surface side of the base region14from reaching the collector region22of the second conductivity type.

Note that the arrangement methods of the first lifetime control region151disclosed inFIGS.3A to31may also be used in combination with the plurality of peaks of the buffer region20shown inFIGS.2A to2Fas appropriate. By changing the positions of the first lifetime control region151and the first lattice defect region161as appropriate, switching characteristics can be improved while suppressing an increase in leakage current.

FIG.4shows an example of the doping concentration distribution in the semiconductor substrate10. The present figure also shows the doping concentration distribution of the first lifetime control region151. In addition, the present figure also shows an integrated concentration from an upper end of the drift region18.

In the present specification, a value obtained by integrating the doping concentration from the lower surface side of the base region14to a particular position of the semiconductor substrate10along the depth direction of the semiconductor substrate10is referred to as the integrated concentration. In addition, in the present specification, in a case where a forward bias is applied between the collector electrode24and the emitter electrode52and a maximum value of an electric field intensity has reached a critical electric field intensity to thus cause an avalanche breakdown, and in a case where the semiconductor substrate10is depleted from the lower surface of the base region14to a particular position thereof in the depth direction, it is expressed that the integrated concentration reaches the critical integrated concentration Nc. Note that in the semiconductor device100, a forward bias being applied between the collector electrode24and the emitter electrode52means that a potential of the collector electrode24is higher than a potential of the emitter electrode52in a state where the gate is off. When an avalanche breakdown occurs in the semiconductor device100, an avalanche current flows between the collector electrode24and the emitter electrode52, and an increase of a voltage VCEbetween the collector electrode24and the emitter electrode52stops. In this case, the depletion layer does not expand in the back surface side relative to a position LNcat which the integrated concentration reaches the critical integrated concentration Nc.

In the present example, the integrated concentration obtained by integrating the doping concentration in a direction from the upper end of the drift region18to the hydrogen peak included in the buffer region20in the depth direction of the semiconductor substrate10is equal to or larger than the critical integrated concentration Nc. More specifically, the first lattice defect region161may be provided in the back surface23side relative to the second peak62, and the integrated concentration from the upper end of the drift region18to the second peak62in the depth direction of the semiconductor substrate10may be equal to or larger than the critical integrated concentration Nc. The position LNcat which the critical integrated concentration Nc is reached may be identical to the depth position Lp2of the second peak62. Accordingly, since the depletion layer expanding from the lower surface side of the base region14is stopped by the second peak62, the peak of the first lattice defect region161can be arranged in a non-depleted region. Thus, an increase in leakage current due to the formation of the first lattice defect region161can also be suppressed. By a similar reason, the first lifetime control region151may be provided in the back surface23side relative to the second peak62.

The position LNcat which the critical integrated concentration Nc is reached and the peak position of the buffer region20(the depth position Lp2of the second peak62in the present example) may not be identical. The position LNcat which the critical integrated concentration Nc is reached may be positioned in the front surface21side relative to the depth position Lp2of the second peak62. That is, any of the hydrogen peaks included in the buffer region20only needs to be capable of stopping the depletion layer before the depletion layer reaches the first lattice defect region161. The position LNcat which the critical integrated concentration Nc is reached may be the depth position Lp3of the third peak63or the depth position Lp4of the fourth peak64.

FIG.5Ashows a top view of a modified example of the semiconductor device100. The semiconductor device100of the present example includes the transistor portion70and the diode portion80. For example, the semiconductor device100is a reverse conducting IGBT (RC-IGBT: Reverse Conducting IGBT). The transistor portion70of the present example includes a boundary portion90that is positioned at a boundary between the transistor portion70and the diode portion80.

The diode portion80is a region obtained by projecting the cathode region82provided in the back surface23side of the semiconductor substrate10onto the upper surface of the semiconductor substrate10. The cathode region82is of the first conductivity type. The cathode region82of the present example is of an N+ type, as an example. The diode portion80includes diodes such as free wheel diodes (FWD: Free Wheel Diode) provided while being adjacent to the transistor portion70on the upper surface of the semiconductor substrate10.

The boundary portion90is a region which is provided in the transistor portion70and is in direct contact with the diode portion80. The boundary portion90includes the contact region15. The boundary portion90of the present example does not include the emitter region12. In one example, the trench portions in the boundary portion90are the dummy trench portions30. The boundary portion90of the present example is arranged such that both ends thereof in the X axis direction become the dummy trench portions30.

The contact hole54is provided above the base region14in the diode portion80. The contact hole54is provided above the contact region15in the boundary portion90. No contact hole54is provided above the well regions17provided at both ends in the Y axis direction.

A mesa portion91is provided between the plurality of trench portions in the boundary portion90. The mesa portion91includes the contact region15at the front surface21of the semiconductor substrate10. The mesa portion91of the present example includes the base region14and the well region17on a negative side of the Y axis direction.

The mesa portion81is provided in a region interposed between the dummy trench portions30adjacent to each other in the diode portion80. The mesa portion81includes the contact region15at the front surface21of the semiconductor substrate10. The mesa portion81of the present example includes the base region14and the well region17on the negative side of the Y axis direction.

The emitter region12is provided in the mesa portion71, but does not need to be provided in the mesa portion81and the mesa portion91. The contact region15is provided in the mesa portion71and the mesa portion91, but does not need to be provided in the mesa portion81.

FIG.5Bshows a cross section b-b′ of the modified example of the semiconductor device100. The semiconductor device100of the present example includes the first lifetime control region151and the second lifetime control region152. The buffer region20may have the configuration of any of the examples. That is, the number and positions of the peaks included in the buffer region20are not limited in particular.

The contact region15is provided above the base region14in the mesa portion91. The contact region15is provided in contact with the dummy trench portions30in the mesa portion91. In another cross section, the contact region15may be provided at the front surface21in the mesa portion71.

The accumulation region16is provided in the transistor portion70and the diode portion80. The accumulation region16of the present example is provided on entire surfaces of the transistor portion70and the diode portion80. It is to be noted that the accumulation region16does not need to be provided in the diode portion80.

The cathode region82is provided below the buffer region20in the diode portion80. A boundary between the collector region22and the cathode region82is a boundary between the transistor portion70and the diode portion80. That is, the collector region22is provided below the boundary portion90of the present example.

The first lattice defect region161is provided in both the transistor portion70and the diode portion80. Accordingly, in the semiconductor device100of the present example, a recovery speed in the diode portion80can be raised, and a switching loss can be further improved. The position of the first lattice defect region161in the depth direction may be the position according to any of the examples.

The first lifetime control region151is provided in both of the transistor portion70and the diode portion80. Accordingly, in the semiconductor device100of the present example, a recovery speed in the diode portion80can be raised, and a switching loss can be further improved. The first lifetime control region151may be formed at the position according to any of the examples.

The second lifetime control region152is a region where a lifetime killer is intentionally formed by implanting an impurity into the semiconductor substrate10, or the like. The second lifetime control region152is provided in the front surface21side relative to a center of the semiconductor substrate10in the depth direction of the semiconductor substrate10. The second lifetime control region152of the present example is provided in the drift region18. The second lifetime control region152may be provided in the diode portion80. Alternatively, the second lifetime control region152may be provided in both of the transistor portion70and the diode portion80. The second lifetime control region152of the present example is provided in both of the transistor portion70and the diode portion80. The second lifetime control region152may be formed by implanting an impurity from the front surface21side, or may be formed by implanting an impurity from the back surface23side. The second lifetime control region152may be provided in the diode portion80and the boundary portion90and not be provided in a part of the transistor portion70.

The second lifetime control region152may be formed by any method. Elements, dose amounts, and the like for forming the first lifetime control region151and the second lifetime control region152may be the same or may be different. The second lifetime control region152may be formed by ion implantation of hydrogen, helium, or the like, or by electron beam irradiation.

FIG.6Ais a flowchart showing an example of a manufacturing process of the semiconductor device100. In Step S100, a front surface side structure of the semiconductor device100is formed. Further, in Step S100, after forming the front surface side structure, the back surface23side of the semiconductor substrate10is grinded so as to adjust the thickness of the semiconductor substrate10according to a required breakdown voltage.

In Step S102, ion implantation is performed from the back surface23side of the semiconductor substrate10for forming the first peak61. The first peak61may be formed by phosphorus ion implantation, may be formed by hydrogen ion implantation, or may be formed by other methods.

For example, when phosphorus is used for the first peak61, a dose amount of the dopant of the first peak61may be 1.0 E12 cm−2or more, or may be 2.0 E12 cm−2or more. The dose amount of the dopant of the first peak61may be 1.0 E13 cm−2or less, or may be 5.0 E12 cm−2or less. The dose amount of the dopant of the first peak61in the present example is 3.0 E12 cm−2Acceleration energy of the dopant of the first peak61may be 500 keV or more, or may be 700 keV or more. The acceleration energy of the dopant of the first peak61may be 4,000 keV or less, or may be 3,000 keV or less. The acceleration energy of the dopant of the first peak61in the present example is 2,000 keV.

In Step S104, the semiconductor substrate10is annealed for forming the first peak61. That is, in the present example, the semiconductor substrate10is annealed after the ion implantation of the first peak61and before the ion implantation of the lattice defect region. For example, in Step S104, the back surface23of the semiconductor substrate10is heated by laser annealing. Alternatively, in Step S104, the semiconductor substrate10may be heated by an annealing furnace in a nitrogen atmosphere or the like. An annealing temperature in the annealing furnace may be 350 degrees or more and 420 degrees or less. An annealing time may be 10 minutes or more and 20 hours or less.

In Step S106, ion implantation is performed from the back surface23side of the semiconductor substrate10for forming the lattice defect region. In the present example, hydrogen ion implantation is performed for forming the first lattice defect region161after the annealing for forming the first peak61. The first lattice defect region161is formed by hydrogen ion implantation in the front surface21side relative to the first peak61in the depth direction of the semiconductor substrate10. When forming a plurality of hydrogen peaks in the buffer region20, hydrogen ions may be implanted a plurality of times while differentiating the acceleration energy.

The first lattice defect region161may be formed by the ion implantation for forming any of the hydrogen peaks of the buffer region20. That is, the first lattice defect region161may be formed by the ion implantation for forming the second peak62, may be formed by the ion implantation for forming the third peak63, or may be formed by the ion implantation for forming the fourth peak64.

As an example, the dose amount of the hydrogen ions corresponding to the second peak62is 7.0×1012/cm2, and the acceleration energy is 1,100 keV. The dose amount of the hydrogen ions corresponding to the third peak63is 1.0×1013/cm2, and the acceleration energy is 800 keV. The dose amount of the hydrogen ions corresponding to the fourth peak64is 3.0×1014/cm2, and the acceleration energy is 300 keV.

In Step S108, the semiconductor substrate10is annealed for forming the lattice defect region. The semiconductor substrate10may be heated by the annealing furnace in a hydrogen or nitrogen atmosphere or the like. In one example, the annealing for forming the first lattice defect region161is executed at a temperature lower than that of the annealing for forming the first peak61. In addition, the annealing for forming the first lattice defect region161may be executed in a shorter time than in the annealing for forming the first peak61. For example, the annealing temperature for forming the first lattice defect region161may be 350 degrees or more and 380 degrees or less. The annealing time may be 10 minutes or more and 3 hours or less.

In Step S110, the collector electrode24is formed. The collector electrode24may be formed on the entire surface of the back surface23. For example, the collector electrode24is formed by a sputtering method. The collector electrode24may be a laminated electrode in which an aluminum layer, a titanium layer, a nickel layer, and the like are laminated. The semiconductor device100can be manufactured by the processes as described above.

Note that Step S102and Step S104may be replaced with Step S106and Step S108. That is, Step S100, Step S106, Step S108, Step S102, Step S104, and Step S110may be executed in the stated order.

FIG.6Bis a flowchart showing a modified example of the manufacturing process of the semiconductor device100. In the present example, points different from those of the example shown inFIG.6Awill be described in particular. The semiconductor device100of the present example differs from that ofFIG.6Ain that annealing of the first peak61and that of the lattice defect region are executed simultaneously.

In Step S102, hydrogen ion implantation may be performed for forming the first peak61. By performing the hydrogen ion implantation for the first peak61, it becomes easy to share with the annealing for forming the lattice defect region. In the present example, the annealing process only for the first peak61in Step S104shown inFIG.6Ais omitted. A hydrogen ion implantation condition for forming the lattice defect region in Step S106may be the same as the implantation condition in Step S106shown inFIG.6A.

In Step S108, annealing for forming the first peak61and that for forming the lattice defect region are executed simultaneously after the ion implantation for forming the lattice defect region. In the present example, the annealing process is shared between the first peak61and the first lattice defect region161. When the semiconductor device100includes the second lattice defect region162, the annealing process may be shared among the first peak61, the first lattice defect region161, and the second lattice defect region162. Accordingly, the annealing process for forming the buffer region20can be simplified.

FIG.6Cis a flowchart showing a modified example of the manufacturing process of the semiconductor device100. In the present example, points different from those of the example shown inFIG.6Awill be described in particular. The present example differs from the example shown inFIG.6Ain the point of further forming the lifetime control region.

In Step S107, ion implantation for forming the lifetime control region is executed. For example, helium ion implantation is performed for forming the first lifetime control region151. An impurity dose amount for forming the first lifetime control region151may be 0.5 E10 cm−2or more and 1.0 E13 cm−2or less, or may be 5.0 E10 cm−2or more and 5.0 E11 cm−2or less. The acceleration energy for forming the first lifetime control region151may be 50 keV or more and 2,000 keV or less. While the ion implantation of the lifetime control region is executed after executing the ion implantation of the lattice defect region in Step S106in the present example, the ion implantation of the lattice defect region may alternatively be executed after executing the ion implantation of the lifetime control region.

In Step S108, the semiconductor substrate10is annealed for forming the lattice defect region and the lifetime control region. Since the annealing process is shared between the lattice defect region and the lifetime control region in this manner, the annealing process for forming the buffer region20can be simplified. For example, in Step S108, the semiconductor substrate10is heated by the annealing furnace in a nitrogen atmosphere or the like.

FIG.7is a diagram for describing electrical characteristics of the semiconductor device100. The present figure shows three axes respectively representing a turn-off loss Eoff (mJ), an inter-collector-emitter saturation voltage Vce (sat), and a leakage current lleak (A). Since the semiconductor device100of the present example has the hydrogen peak for stopping the depletion layer expanding from the lower surface side of the base region14and has the lattice defect region in the back surface23side relative to the hydrogen peak, the electrical characteristics of the semiconductor device100can be improved.

For example, by adjusting the position of the first lifetime control region151or the first lattice defect region161, or the like, the trade-off between the turn-off loss Eoff and the inter-collector-emitter saturation voltage Vce can be improved. By using the first lifetime control region151and the first lattice defect region161in combination, it becomes easier to reduce the leakage current at any position of the turn-off loss Eoff and the inter-collector-emitter saturation voltage Vce than in the case of using the first lattice defect region161alone.

Moreover, since the semiconductor device100has the hydrogen peak for stopping the depletion layer in the front surface21side relative to the first lattice defect region161, an increase in leakage current Ileak can be suppressed. In other words, even when a defect density in the buffer region20is raised, a connection between the depletion layer and the first lattice defect region161can be avoided, so an increase in leakage current Ileak can be suppressed while improving the trade-off between the turn-off loss Eoff and the inter-collector-emitter saturation voltage Vce. That is, the trade-offs among the three axes of the saturation voltage Vce axis, the turn-off loss Eoff axis, and the leakage current Ileak axis can be improved simultaneously. By adjusting the structure of the buffer region20according to desired electrical characteristics in the semiconductor device100in this manner, the trade-offs among the turn-off loss Eoff, the inter-collector-emitter saturation voltage Vce, and the leakage current Ileak can be improved.

While the embodiment of the present invention has been described, the technical scope of the invention is not limited to the above-described embodiment. It is apparent to persons skilled in the art that various alterations and improvements can be added to the above described embodiments. It is also apparent from the description of the claims that embodiments added with such alterations or improvements can be included in the technical scope of the present invention.

EXPLANATION OF REFERENCES