Data driver, display apparatus including the same and method of sensing threshold voltage of pixel using the same

A data driver includes a plurality of amplifiers configured to output a plurality of data voltages to a plurality of data lines. The amplifiers are configured to output the data voltages to the corresponding data lines in a writing mode. Only one of the plurality of amplifiers is configured to output a sensing data voltage to the plurality of data lines in a sensing mode.

This application claims priority under 35 U.S.C. § 119 to Korean Patent Application No. 10-2020-0087706, filed on Jul. 15, 2020 in the Korean Intellectual Property Office (KIPO), the content of which is herein incorporated by reference in its entirety.

FIELD

The present inventive concept relates to a data driver, a display apparatus including the data driver, and a method of sensing a threshold voltage of a pixel using the display apparatus. More particularly, embodiments of the present inventive concept relate to a data driver outputting a sensing data voltage using only one output amplifier, a display apparatus including the data driver, and a method of sensing a threshold voltage of a pixel using the display apparatus.

DISCUSSION OF RELATED ART

Generally, a display apparatus includes a display panel and a display panel driver. The display panel includes a plurality of gate lines and a plurality of data lines. The display panel driver includes a gate driver and a data driver. The gate driver outputs gate signals to the gate lines. The data driver outputs data voltages to the data lines.

In a writing mode, the data driver may output a data voltage to the display panel. In a sensing mode, the data driver may output a sensing voltage to the display panel. In the sensing mode, the data driver may determine a threshold voltage of a switching element of a pixel by sensing a voltage of the pixel.

The data driver includes a plurality of amplifiers, and an error in the sensed threshold voltage may occur due to a voltage difference between the amplifiers. Due to the error, a display defect may occur in an image displayed on the display panel.

SUMMARY

An embodiment of the present inventive concept provides a data driver for reducing a sensing error of a pixel's threshold voltage.

An embodiment of the present inventive concept provides a display apparatus including the data driver.

An embodiment of the present inventive concept provides a method of sensing a pixel's threshold voltage using the display apparatus.

In an embodiment of a data driver according to the present inventive concept, the data driver may include a plurality of amplifiers configured to output a plurality of data voltages to a plurality of data lines. The amplifiers are configured to output the data voltages to the corresponding data lines in a writing mode. Only one of the plurality of amplifiers is configured to output a sensing data voltage to the plurality of data lines in a sensing mode.

In an embodiment, the data driver may further include a first amplifier connected to a first data line, a switch connected between a second amplifier and a second data line, and at least one channel-connecting switch disposed at a connecting path between the first data line and the second data line.

In an embodiment, the at least one channel-connecting switch may include a first channel-connecting switch connected between the first data line and a common node and a second channel-connecting switch connected between the second data line and the common node.

In an embodiment, the switch may be turned on and the first channel-connecting switch and the second channel-connecting switch may be turned off in the writing mode. The switch may be turned off and the first channel-connecting switch and the second channel-connecting switch may be turned on in the sensing mode.

In an embodiment, the data driver may include a plurality of readout chips. The switch, the first channel-connecting switch and the second channel-connecting switch may be disposed in a first readout chip. The data driver may further include a first chip-connecting line connecting the first readout chip with a second readout chip, and a chip-connecting switch connected between the first chip-connecting line and at least one of the data lines.

In an embodiment, switch may be turned on, and the first channel-connecting switch, the second channel-connecting switch and the chip-connecting switch may be turned off in the writing mode. The switch may be turned off, and the first channel-connecting switch, the second channel-connecting switch and the chip-connecting switch may be turned on in the sensing mode.

In an embodiment, the data driver may further include a sensing amplifier and a sensing switch connected between the sensing amplifier and at least one of the data lines.

In an embodiment further comprising a first switch connected between the first amplifier and the first data line, the switch is a second switch, the first switch and the second switch may be turned on, and the first channel-connecting switch, the second channel-connecting switch and the sensing switch may be turned off in the writing mode. The first switch and the second switch may be turned off and the first channel-connecting switch, the second channel-connecting switch and the sensing switch may be turned on in the second mode.

In an embodiment, the data driver may include a plurality of readout chips. The first switch, the second switch, the first channel-connecting switch and the second channel-connecting switch may be disposed in a first readout chip. The data driver may further include a first chip-connecting line connecting the first readout chip with a second readout chip, a chip-connecting switch connected between the first chip-connecting line and at least one of the data lines, a sensing amplifier and a sensing switch connected between the sensing amplifier and at least one of the data lines.

In an embodiment, the first switch and the second switch may be turned on and the first channel-connecting switch, the second channel-connecting switch and the chip-connecting switch and the sensing switch may be turned off in the writing mode. The first switch and the second switch may be turned off, the first channel-connecting switch, the second channel-connecting switch, the chip-connecting switch and the sensing switch may be turned on in the sensing mode.

In an embodiment of a display apparatus according to the present inventive concept, the display apparatus includes a display panel and a data driver. The display panel is configured to display an image based on input image data. The display panel includes a plurality of data lines and a plurality of pixels connected to the data lines. The data driver includes a plurality of amplifiers configured to output data voltages to the data lines. The amplifiers are configured to output the data voltages to the corresponding data lines in a writing mode. Only one amplifier is configured to output a sensing data voltage to the data lines in a sensing mode.

In an embodiment, the pixel may include a first thin-film transistor configured to apply a first power voltage to a second node in response to a signal at a first node, a second thin-film transistor configured to output the data voltage to the first node in response to a first signal, a third thin-film transistor configured to output a signal at the second node to a sensing node in response to a second signal, a storage capacitor comprising a first end portion connected to the first node and a second end portion connected to the second node, and a light-emitting element comprising a first electrode connected to the second node and a second electrode configured to receive a second power voltage.

In an embodiment, the data driver may further include a first amplifier connected with a first data line, a switch connected between a second amplifier and a second data line, and at least one channel-connecting switch disposed at a connecting path between the first data line and the second data line.

In an embodiment, the at least one channel-connecting switch may include a first channel-connecting switch connected between the first data line and a common node, and a second channel-connecting switch connected between the second data line and the common node.

In an embodiment, the data driver may include a plurality of readout chips. The switch, the first channel-connecting switch and the second channel-connecting switch may be disposed in a first readout chip. The data driver may further include a first chip-connecting line connecting the first readout chip with a second readout chip, and a chip-connecting switch connected between the first chip-connecting line and at least one of the data lines.

In an embodiment, the data driver may further include a sensing amplifier and a sensing switch connected between the sensing amplifier and at least one of the data lines.

In an embodiment, the data driver may include a plurality of readout chips. The switch, the first channel-connecting switch and the second channel-connecting switch may be disposed in a first readout chip. The data driver may further include a first chip-connecting line connecting the first readout chip and a second readout chip, a chip-connecting switch connected between the first chip-connecting line and at least one of the data lines, a sensing amplifier and a sensing switch connected between the sensing amplifier and at least one of the data lines.

In an embodiment of a method of sensing a threshold voltage of a pixel according to the present inventive concept, the method includes outputting a plurality of data voltages to a plurality of corresponding data lines connected to a plurality of pixels using a plurality of amplifiers in a writing mode, outputting a sensing data voltage to the data lines using only one amplifier in a sensing mode and receiving a sensing signal using a plurality of sensing lines connected to the pixels in the sensing mode.

In an embodiment, a first amplifier is connected to a first data line, a switch connected between a second amplifier and a second data line may be turned on, and a channel-connecting switch connected between the first data line and the second data line may be turned off in the writing mode.

In an embodiment, the switch may be turned off and the channel-connecting switch may be turned on in the sensing mode.

According to the data driver, the display apparatus and the method of sensing the threshold voltage of the pixel, the sensing data voltage is output using only one output amplifier in the single readout chip or in the plurality of readout chips in the sensing mode so that the sensing error of the threshold voltage of the pixel may be minimized.

Thus, display defects due to sensing errors of the pixel's threshold voltage may be prevented and the display quality of the display panel may be optimized.

DETAILED DESCRIPTION

Hereinafter, the present inventive concept will be explained in detail with reference to the accompanying drawings.

FIG. 1shows a display apparatus10according to an embodiment of the present inventive concept.

Referring toFIG. 1, the display apparatus10includes a display panel100and a display panel driver. The display panel driver includes a driving controller200, a gate driver300that may but need not be integrally formed in the display panel100, a gamma reference voltage generator400, and a data driver500.

For example, the driving controller200and the data driver500may be integrally formed. For example, the driving controller200, the gamma reference voltage generator400and the data driver500may be integrally formed. A driving module including at least the driving controller200and the data driver500which are integrally formed may be called to a timing controller embedded data driver (TED).

The display panel100has a display region AA on which an image is displayed and a peripheral region PA adjacent to the display region AA.

For example, in the present embodiment, the display panel100may be an organic light emitting diode display panel including an organic light emitting diode. Alternatively, the display panel100may be a liquid crystal display panel including a liquid crystal layer.

The display panel100includes a plurality of gate lines GL, a plurality of data lines DL and a plurality of pixels P connected to the gate lines GL and the data lines DL. The gate lines GL extend in a first direction D1and the data lines DL extend in a second direction D2crossing the first direction Dl.

The driving controller200receives input image data IMG and an input control signal CONT from an external apparatus. The input image data IMG may include red image data, green image data and blue image data. The input image data IMG may include white image data. The input image data IMG may include magenta image data, yellow image data and cyan image data. The input control signal CONT may include a master clock signal and a data enable signal. The input control signal CONT may further include a vertical synchronizing signal and a horizontal synchronizing signal.

The driving controller200generates the second control signal CONT2for controlling an operation of the data driver500based on the input control signal CONT, and outputs the second control signal CONT2to the data driver500. The second control signal CONT2may include a horizontal start signal and a load signal.

The driving controller200generates the data signal DATA based on the input image data IMG. The driving controller200outputs the data signal DATA to the data driver500.

The driving controller200generates the third control signal CONT3for controlling an operation of the gamma reference voltage generator400based on the input control signal CONT, and outputs the third control signal CONT3to the gamma reference voltage generator400.

The gate driver300generates gate signals driving the gate lines GL in response to the first control signal CONT1received from the driving controller200. The gate driver300outputs the gate signals to the gate lines GL. For example, the gate driver300may sequentially output the gate signals to the gate lines GL.

In the present example embodiment, the gate driver300may be integrated on the peripheral region PA of the display panel100.

The gamma reference voltage generator400generates a gamma reference voltage VGREF in response to the third control signal CONT3received from the driving controller200. The gamma reference voltage generator400provides the gamma reference voltage VGREF to the data driver500. The gamma reference voltage VGREF has a value corresponding to a level of the data signal DATA.

In an embodiment, the gamma reference voltage generator400may be disposed in the driving controller200, or in the data driver500, without limitation.

The data driver500receives the second control signal CONT2and the data signal DATA from the driving controller200, and receives the gamma reference voltages VGREF from the gamma reference voltage generator400. The data driver500converts the data signal DATA into data voltages having an analog type using the gamma reference voltages VGREF. The data driver500outputs the data voltages to the data lines DL.

Referring toFIGS. 1 and 2, the display apparatus may include a printed circuit board assembly PBA, a first printed circuit P1and a second printed circuit P2. The printed circuit board assembly PBA may be connected to the first printed circuit P1and the second printed circuit P2. For example, the driving controller200may be disposed on the printed circuit board assembly PBA.

The display apparatus may further include a plurality of flexible circuits FP connected to the first printed circuit P1and the display panel100. The display apparatus may further include another plurality of flexible circuits FP connected to the second printed circuit P2and the display panel100.

Readout chips RSIC of the data driver500may be disposed on the flexible circuits FP. Each readout chip RSIC may be an integrated circuit chip.

FIG. 3shows a circuit for the pixel P ofFIG. 1.FIG. 4shows timing of input and output signals for the circuit of the pixel P ofFIG. 3in a sensing mode.

Referring toFIGS. 1 through 4, the pixel P may include a first thin film transistor T1applying a first power voltage ELVDD to a second node N2in response to a signal at a first node N1, a second thin film transistor T2applying the data voltage VDATA to the first node N1in response to a first signal S1, a third thin film transistor T3applying a signal at the second node N2to a sensing node NS in response to a second signal S2, a storage capacitor CS including a first end portion connected to the first node N1and a second end portion connected to the second node N2, and a light emitting element EE including a first electrode connected to the second node N2and a second electrode receiving a second power voltage ELVSS.

Herein, the second power voltage ELVSS may be less than the first power voltage ELVDD. For example, the light emitting element may be an organic light emitting diode.

The pixel P may further include a switch SW applying a sensing initialization voltage VSEN to the second node N2via the third thin film transistor T3. The switch SW may be turned on and turned off based on a third signal S3.

For example, the second signal S2and the third signal S3are activated in a sensing initialization step so that the sensing initialization voltage VSEN may be applied to the second node N2.

As shown inFIG. 4, the first signal S1is activated in a sensing mode so that a data voltage VDATA may be applied to the first node N1through the second thin film transistor T2. Herein, the data voltage VDATA may be a sensing data voltage applied to sense a threshold voltage of the first thin film transistor.

The first thin film transistor T1is turned on by the sensing data voltage applied to the first node in the sensing mode, and by the sensing initialization voltage VSEN which has already been applied to the second node in the sensing initialization step.

In addition, the second signal S2is also activated in the sensing mode so that the third thin film transistor T3is turned on and the signal VR at the second node N2may be output to the sensing node NS through the third thin film transistor T3in the sensing mode.

An analog-to-digital converter ADC is connected to the sensing node NS. The analog-to-digital converter ADC may convert the signal VR at the sensing node NS to a digital sensing signal to sense the threshold voltage of the first thin film transistor T1.

In the sensing mode, the third signal S3is inactivated so that the sensing initialization voltage VSEN is not applied to the sensing node NS after initialization in the sensing mode. In the sensing mode, the second power voltage ELVSS has a high level so that the pixel P does not emit light.

Referring toFIGS. 1 through 7, the data driver500may include a plurality of readout chips RSIC1, RSIC2, RSIC3and RSIC4. The readout chips RSIC1, RSIC2, RSIC3and RSIC4may be connected to each other in the sensing mode through the chip connecting lines CL1, CL2and CL3and switches S17, S27, S37and S47, where S17may be replaced with a conductive connection in an alternate embodiment.

FIG. 5illustrates a first chip connecting line CL1connecting a first readout chip RSIC1with a second readout chip RSIC2, a second chip connecting line CL2connecting the second readout chip RSIC2with a third readout chip RSIC3, and a third chip connecting line CL3connecting the third readout chip RSIC3with a fourth readout chip RSIC3. As shown inFIG. 6, for example, the first chip connecting line CL1connecting the first readout chip RSIC1with the second readout chip RSIC2, the second chip connecting line CL2connecting the second readout chip RSIC2with the third readout chip RSIC3, and the third chip connecting line CL3connecting the third readout chip RSIC3with a fourth readout chip RSIC3may be formed as a main connecting line with branches extended from the main connecting line. In the present embodiment, the first through third chip connecting lines CL1, CL2and CL3may be respectively formed as shown inFIG. 5and the first through third chip connecting lines CL1, CL2and CL3may be integratedly formed as shown inFIG. 6.

The data driver500includes a plurality of amplifiers outputting the data voltages to the data lines. As shown inFIGS. 6 and 7, each of the readout chips RSIC1, RSIC2, RSIC3and RSIC4may include the amplifiers outputting the data voltages to the data lines.

The data driver500may be operated in a writing mode and in the sensing mode. In the writing mode, the data voltage for displaying an image may be written in the pixels P of the display panel100. In the sensing mode, the threshold voltage of the pixels P may be sensed from the pixels P.

The sensing mode may be operated in a power on period when the display apparatus starts to turn on, in a black period between active periods when the image is written to the display panel100and in a power off period when the display apparatus starts to turn off. The driving controller200may compensate the data applied to the pixel P according to the sensed threshold voltage of the pixel and output the compensated data to the data driver500. The threshold voltage may vary from pixel to pixel due to process distribution and may vary from pixel to pixel according to usage times. If the threshold voltages of the pixels P are not compensated, a difference of display images of the pixels P may occur so that the display quality of the display panel100may be deteriorated.

In the writing mode, the amplifiers of the data driver500may output the data voltages to the corresponding data lines. In the writing mode, the plurality of amplifiers and the plurality of data lines may be matched one-to-one.

In contrast, in the sensing mode, a single amplifier of the data driver500may output the sensing data voltage to the plurality of data lines. In the sensing mode, the single amplifier and the plurality of data lines may be matched one-to-many.

In the present embodiment, for example, the sensing data voltage is applied to all of the data lines corresponding to the four readout chips RSIC1, RSIC2, RSIC3and RSIC4using the single amplifier A11of the data driver500in the sensing mode. In an alternate embodiment, the single amplifier used in the sensing mode may be different from all of the amplifiers used in the writing mode.

Alternatively, for example, the sensing data voltage may be applied to all of the data lines corresponding to eight readout chips disposed at the first printed circuit P1and the second printed circuit P2inFIG. 2using the single amplifier A11of the data driver500.

As shown inFIG. 6, the first readout chip RSIC1may include a first amplifier A11, a second amplifier A12and a third amplifier A13. Although the three amplifiers A11, A12and A13are illustrated inFIG. 6for convenience of explanation, the first readout chip RSIC1may further include many amplifiers in addition to the three amplifiers A11, A12and A13. For example, when the number of channels of the first readout chip RSIC1is960, the readout chip RSIC1may include960amplifiers.

The first readout chip RSIC1may further include a first switch S11connected between the first amplifier A11and a first data line DL11, a second switch S12connected between the second amplifier A12and a second data line DL12and a third switch S13connected between the third amplifier A13and a third data line DL13. In an alternate embodiment, the first switch S11may be replaced with a conductive connection.

In addition, the first readout chip RSIC1may further include at least one channel connecting switch disposed at a connecting path between the first data line DL11and the second data line DL12. For example, the first readout chip RSIC1may include a first channel connecting switch S14connected between the first data line DL11and a common node and a second channel connecting switch S15connected between the second data line DL12and the common node.

In addition, the first readout chip RSIC1may further include at least one channel connecting switch disposed at a connecting path between the second data line DL12and the third data line DL13. For example, the first readout chip RSIC1may include the second channel connecting switch S15connected between the second data line DL12and the common node and a third channel connecting switch S16connected between the third data line DL13and the common node.

In addition, the first readout chip RSIC1may further include a first chip connecting switch S17disposed between the first chip connecting line CL1, which connects the first readout chip RSIC1and the second readout chip RSIC2, and at least one (e.g., DL11) of the data lines.

In the present embodiment, in the writing mode, the first switch S11, the second switch S12and the third switch S13may be turned on and the first channel connecting switch S14, the second channel connecting switch S15, the third channel connecting switch S16and the chip connecting switch S17may be turned off.

Thus, in the writing mode, the amplifiers A11through A13and the data lines DL11through DL13form a one-to-one connection so that the data voltages are output to the data lines DL11through DL13by the amplifiers A11through A13.

In contrast, in the sensing mode, the first switch S11may be turned on; the second switch S12and the third switch S13may be turned off; the first channel connecting switch S14, the second channel connecting switch S15, the third channel connecting switch S16and the chip connecting switch S17may be turned on.

Thus, in the sensing mode, the first amplifier A11and the data lines DL11through DL13form a one-to-many connection so that substantially the same sensing data voltage is applied to the data lines DL11through DL13by only the first amplifier A11.

In addition, the sensing data voltage of the first amplifier A11of the first readout chip RSIC1may be transmitted to the second readout chip RSIC2through the chip connecting switch S17and the first chip connecting line CL1.

Therefore, in the sensing mode, the sensing data voltage may be applied to data lines DL21through DL23of the second readout chip RSIC2by only the first amplifier A11.

In the same way, in the sensing mode, the sensing data voltage may be output to data lines DL31through DL33of the third readout chip RSIC3and data lines DL41through DL43of the fourth readout chip RSIC4by only the first amplifier A11.

The second readout chip RSIC2may include a fourth amplifier A21, a fifth amplifier A22and a sixth amplifier A23. The second readout chip RSIC2may further include a fourth switch S21connected between the fourth amplifier A21and a fourth data line DL21, a fifth switch S22connected between the fifth amplifier A22and a fifth data line DL22and a sixth switch S23connected between the sixth amplifier A23and a sixth data line DL23.

In addition, the second readout chip RSIC2may further include channel connecting switches S24, S25and S26disposed at connecting paths between the fourth through sixth data lines DL21through DL23.

In addition, the second readout chip RSIC2may further include a second chip connecting switch S27disposed between the second chip connecting line CL2, which connects the second readout chip RSIC2and the third readout chip RSIC3, and at least one (e.g., DL21) of the data lines.

The third readout chip RSIC3may include a seventh amplifier A31, an eighth amplifier A32and a ninth amplifier A33. The third readout chip RSIC3may further include a seventh switch S31connected between the seventh amplifier A31and a seventh data line DL31, an eighth switch S32connected between the eighth amplifier A32and an eighth data line DL32and a ninth switch S33connected between the ninth amplifier A33and a ninth data line DL33.

In addition, the third readout chip RSIC3may further include channel connecting switches S34, S35and S36disposed at connecting paths between the seventh through ninth data lines DL31through DL33.

In addition, the third readout chip RSIC3may further include a third chip connecting switch S37disposed between the third chip connecting line CL3, which connects the third readout chip RSIC3and the fourth readout chip RSIC4, and at least one (e.g., DL31) of the data lines.

The fourth readout chip RSIC4may include a tenth amplifier A41, an eleventh amplifier A42and a twelfth amplifier A43. The fourth readout chip RSIC4may further include a tenth switch S41connected between the tenth amplifier A41and a tenth data line DL41, an eleventh switch S42connected between the eleventh amplifier A42and an eleventh data line DL42and a twelfth switch S43connected between the twelfth amplifier A43and a twelfth data line DL43.

In addition, the fourth readout chip RSIC4may further include channel connecting switches S44, S45and S46disposed at connecting paths between the tenth through twelfth data lines DL41through DL43.

In addition, the fourth readout chip RSIC4may further include a fourth chip connecting switch S47disposed between the third chip connecting line CL3and at least one (e.g., DL41) of the data lines.

According to the present embodiment, the sensing data voltage is output using only one output amplifier A11in the plurality of readout chips RSIC1through RSIC4in the sensing mode so that the sensing error of the threshold voltage of the pixel P may be reduced.

Thus, display defects due to sensing errors of the threshold voltage of the pixel P may be prevented and the display quality of the display panel may be optimized.

FIG. 8shows a circuit including readout chips of a display apparatus according to an embodiment of the present inventive concept.

The data driver and the display apparatus according to the present embodiment are substantially the same as the data driver and the display apparatus of the previous embodiment explained with reference toFIGS. 1 through 7except that the sensing data voltage is output using only one output amplifier in each of the readout chips. Thus, the same reference numerals may be used to refer to the same or like parts as those described in the previous embodiment ofFIGS. 1 through 7and any repetitive explanation concerning the above elements may be omitted.

Referring toFIGS. 1 through 4 and 8, the display apparatus10includes a display panel100and a display panel driver. The display panel driver includes a driving controller200, a gate driver300, a gamma reference voltage generator400and a data driver500.

The data driver500includes a plurality of amplifiers outputting the data voltages to the data lines. As shown inFIG. 8, each of the readout chips RSIC1, RSIC2, RSIC3and RSIC4may include the amplifiers outputting the data voltages to the data lines.

In a writing mode, the amplifiers of the data driver500may output the data voltages to the corresponding data lines. In the writing mode, the amplifiers and the data lines may be matched one-to-one.

In contrast, in the sensing mode, a single amplifier of the data driver500may output the sensing data voltage to the plurality of data lines. In the sensing mode, the amplifier and the data lines may be matched one-to-many.

In the present embodiment, for example, the sensing data voltage is applied to all of the data lines in each of the readout chips RSIC1, RSIC2, RSIC3and RSIC4using a single amplifier A11, A21, A31and A41in each of the readout chips RSIC1, RSIC2, RSIC3and RSIC4.

Thus, the data driver of the present embodiment need not include the chip connecting lines CL1, CL2and CL3, which connect between the readout chips RSIC1, RSIC2, RSIC3and RSIC4, and the chip connecting switches S17, S27and S37connected to the chip connecting lines CL1, CL2and CL3which are shown inFIGS. 6 and 7.

According to the present embodiment, the sensing data voltage is output using only one output amplifier (e.g., A11, A21, A31and A41) per single readout chip (e.g., RSIC1, RSIC2, RSIC3and RSIC4) in the sensing mode so that the sensing error of the threshold voltage of the pixel P may be reduced.

Thus, a display defect due to the sensing error of the threshold voltage of the pixel P may be prevented and the display quality of the display panel may be optimized.

FIG. 9shows a circuit including readout chips of a display apparatus according to an embodiment of the present inventive concept.

The data driver and the display apparatus according to the present embodiment are substantially the same as the data driver and the display apparatus of the previous embodiment explained with reference toFIGS. 1 through 7except that the first readout chip further includes a sensing amplifier and a sensing switch. Thus, the same reference numerals may be used to refer to the same or like parts as those described in the previous embodiment ofFIGS. 1 through 7and any repetitive explanation concerning the above elements may be omitted.

Referring toFIGS. 1 through 4 and 9, the display apparatus10includes a display panel100and a display panel driver. The display panel driver includes a driving controller200, a gate driver300, a gamma reference voltage generator400and a data driver500.

The data driver500includes a plurality of amplifiers outputting the data voltages to the data lines. As shown inFIG. 9, each of the readout chips RSIC1, RSIC2, RSIC3and RSIC4may include the amplifiers outputting the data voltages to the data lines.

In a writing mode, the amplifiers of the data driver500may output the data voltages to the corresponding data lines. In the writing mode, the amplifiers and the data lines may be matched one-to-one.

In contrast, in the sensing mode, a single amplifier A0of the data driver500may output the sensing data voltage to the plurality of data lines. In the sensing mode, the amplifier and the data lines may be matched one-to-many.

In the present embodiment, for example, the sensing data voltage is applied to all of the data lines corresponding to the four readout chips RSIC1, RSIC2, RSIC3and RSIC4using the single amplifier A0of the data driver500in the sensing mode.

Alternatively, for example, the sensing data voltage may be applied to all of the data lines corresponding to eight readout chips disposed at the first printed circuit P1and the second printed circuit P2inFIG. 2using the single amplifier A0of the data driver500.

In the present embodiment, the first readout chip RSIC1may further include a sensing amplifier A0and a sensing switch S0connected to the sensing amplifier A0and at least one (e.g., DL11) of the data lines.

In the writing mode, the first through third switches S11through S13may be turned on and the first through third channel connecting switches S14through S16and the sensing switch S0may be turned off.

In the sensing mode, the first through third switches S11through S13may be turned off and the first through third channel connecting switches S14through S16and the sensing switch S0may be turned on.

In the writing mode, the first readout chip RSIC1may output the data voltages using the first through third amplifiers A11through A13. In the sensing mode, the first readout chip RSIC1may output the sensing data voltage to all of the data lines of the first readout chip RSIC1using the sensing amplifier A0which is formed independently from the first through third amplifiers A11through A13.

In addition, the sensing data voltage of the sensing amplifier A0of the first readout chip RSIC1may be transmitted to the second readout chip RSIC2through the chip connecting switch S17and the first chip connecting line CL1.

Therefore, in the sensing mode, the sensing data voltage may be output to data lines DL21through DL23of the second readout chip RSIC2by only the sensing amplifier A0.

In the same way, in the sensing mode, the sensing data voltage may be output to data lines DL31through DL33of the third readout chip RSIC3and data lines DL41through DL43of the fourth readout chip RSIC4by only the sensing amplifier A0.

According to the present embodiment, the sensing data voltage is output using only one output amplifier A0in the plurality of readout chips RSIC1through RSIC4in the sensing mode so that the sensing error of the threshold voltage of the pixel P may be reduced.

Thus, the display defect due to the sensing error of the threshold voltage of the pixel P may be prevented and the display quality of the display panel may be optimized.

FIG. 10shows a circuit diagram including readout chips of a display apparatus according to an embodiment of the present inventive concept.

The data driver and the display apparatus according to the present embodiment are substantially the same as the data driver and the display apparatus of the previous embodiment explained with reference toFIG. 9except that the sensing data voltage is output using only one output amplifier in each of the readout chips. Thus, the same reference numerals may be used to refer to the same or like parts as those described in the previous embodiment ofFIG. 9and any repetitive explanation concerning the above elements may be omitted.

Referring toFIGS. 1 through 4 and 10, the display apparatus10includes a display panel100and a display panel driver. The display panel driver includes a driving controller200, a gate driver300, a gamma reference voltage generator400and a data driver500.

The data driver500includes a plurality of amplifiers outputting the data voltages to the data lines. As shown inFIG. 10, each of the readout chips RSIC1, RSIC2, RSIC3and RSIC4may include the amplifiers outputting the data voltages to the data lines.

In a writing mode, the amplifiers of the data driver500may output the data voltages to the corresponding data lines. In the writing mode, the amplifiers and the data lines may be matched one-to-one.

In contrast, in the sensing mode, a single amplifier of the data driver500may output the sensing data voltage to the plurality of data lines. In the sensing mode, the amplifier and the data lines may be matched one-to-many.

In the present embodiment, for example, each of the readout chips RSIC1, RSIC2, RSIC3and RSIC4may further include a sensing amplifier A01, A02, A03and A04and a sensing switch S01, S02, S03and S04connected to the sensing amplifier A01, A02, A03and A04and at least one (e.g., DL11, DL21, DL31and DL41) of the data lines.

In the writing mode, the first through third switches S11through S13may be turned on and the first through third channel connecting switches S14through S16and the sensing switch S01may be turned off.

In the sensing mode, the first through third switches S11through S13may be turned off and the first through third channel connecting switches S14through S16and the sensing switch S01may be turned on.

In the writing mode, the first readout chip RSIC1may output the data voltages using the first through third amplifiers A11through A13. In the sensing mode, the first readout chip RSIC1may output the sensing data voltage to all of the data lines of the first readout chip RSIC1using the sensing amplifier A01which is formed independently from the first through third amplifiers A11through A13.

Similarly, in the sensing mode, the second through fourth readout chips RSIC2through RSIC4may output the sensing data voltage to all of the data lines of the second through fourth readout chips RSIC2through RSIC4using the sensing amplifiers A02, A03and A04which are formed independently from the data amplifiers.

According to the present embodiment, the sensing data voltage is output using only one output amplifier (e.g., A01, A02, A03and A04) in each single readout chip (e.g., RSIC1, RSIC2, RSIC3and RSIC4) in the sensing mode so that the sensing error of the threshold voltage of the pixel P may be reduced.

Thus, display defects due to the sensing error of the threshold voltage of the pixel P may be prevented and the display quality of the display panel may be optimized.

According to the present embodiment, the sensing error may be reduced so that the display quality of the display panel100may be optimized.

The foregoing is illustrative of the present inventive concept and is not to be construed as limiting thereof. Although some embodiments of the present inventive concept have been described, those of ordinary skill in the pertinent art will readily appreciate that many modifications are possible in the embodiments without materially departing from the teachings of the present inventive concept.

Accordingly, all such modifications are intended to be included within the scope of the present inventive concept as defined in the claims. In the claims, means-plus-function clauses are intended to cover the structures described herein as performing the recited function and not only structural equivalents but also equivalent structures. Therefore, it is to be understood that the foregoing is illustrative of the present inventive concept and is not to be construed as limited to the specific embodiments disclosed, and that modifications to the disclosed embodiments, as well as other embodiments, are intended to be included within the scope of the appended claims. The present inventive concept is defined by the following claims, with equivalents of the claims to be included therein.