Semiconductor device and method for fabricating the same

A semiconductor layer stack includes a first conductive layer, a dielectric layer including a high-k material, which is formed on the first conductive layer, a second conductive layer formed on the dielectric layer, and an interface control layer formed between the dielectric layer and the second conductive layer and including a leakage blocking material, a dopant material, a high bandgap material and a high work function material.

CROSS-REFERENCE TO RELATED APPLICATIONS

The present application claims priority to Korean Patent Application No. 10-2018-0081861, filed on Jul. 13, 2018, which is incorporated herein by reference in its entirety.

BACKGROUND

Exemplary embodiments relate to a semiconductor device and, more particularly, to a semiconductor device including an interface control layer and a method for fabricating the same.

2. Description of the Related Art

A capacitor of a semiconductor device may include a bottom electrode, a dielectric layer, and a top electrode. As the degree of integration of a semiconductor device increases, the thickness of the dielectric layer decreases which may result in increased leakage current. Increasing the thickness of the dielectric layer to reduce the leakage current leads to an increase in the equivalent oxide layer thickness (EOT).

SUMMARY

Exemplary embodiments are directed to a semiconductor layer stack that may improve leakage, and a method for fabricating the semiconductor layer stack.

Exemplary embodiments are directed to a capacitor that may prevent a reduction of a dielectric layer, and a method for fabricating the capacitor.

Exemplary embodiments are directed to a capacitor that may increase a dielectric constant of a dielectric layer, and a method for fabricating the capacitor.

In accordance with an embodiment, a semiconductor layer stack may include: a first conductive layer; a dielectric layer including a high-k material, which is formed on the first conductive layer; a second conductive layer formed on the dielectric layer; and an interface control layer formed between the dielectric layer and the second conductive layer, and including a leakage blocking material, a dopant material and a high bandgap material. The interface control layer may further include a high work function material formed between the high bandgap material and the second conductive layer.

In accordance with an embodiment, a capacitor may include: a bottom electrode; a dielectric layer formed on the bottom electrode, and including an intermixed compound in which two or more high-k materials are mixed; a top electrode formed on the dielectric layer; and an interface control layer formed between the dielectric layer and the top electrode, and including a reduction preventing material and a high work function material that is sequentially stacked one on the other. The intermixed compound may include a first high-k material and a second high-k material having a higher dielectric constant than the first high-k material. The intermixed compound may include a compound of a titanium oxide and a zirconium oxide. The intermixed compound may include a compound of an aluminum oxide and a zirconium oxide, and further may include a dopant material of a titanium oxide. The high work function material may include a high work function compound in which the reduction preventing material and the top electrode are intermixed, and the high work function compound may include a conductive material having a higher work function than the top electrode. The reduction preventing material may include a high bandgap material having a higher bandgap than a zirconium oxide and a hafnium oxide. The reduction preventing material may include an aluminum oxide or a silicon oxide. The top electrode may include a titanium nitride, the reduction preventing material may include an aluminum oxide, and the high work function material may include a titanium aluminum nitride. The top electrode may include a titanium nitride, the reduction preventing material may include a silicon oxide, and the high work function material may include a titanium silicon nitride. The dielectric layer further may include a high-k material layer formed between the intermixed compound and the bottom electrode and having a lower dielectric constant than the intermixed compound.

In accordance with an embodiment, a capacitor may include: a bottom electrode; a dielectric layer formed on the bottom electrode, and including a high-k material; a top electrode formed on the dielectric layer; and an interface control layer formed between the dielectric layer and the top electrode, and including a dopant-containing layer, a high bandgap layer and a high work function layer that are sequentially stacked on top of one another. The high bandgap layer is thinner than the dopant-containing layer. The dopant-containing layer may include a material having a higher dielectric constant than the high bandgap layer and the high-k material. The high bandgap layer may include a material having a higher bandgap than the dopant-containing layer. The high work function layer may include a conductive material having a higher work function than the top electrode. The high bandgap layer may include an aluminum oxide or a silicon oxide. The high work function layer may include a titanium aluminum nitride or a titanium silicon nitride. The dopant-containing layer may include a titanium oxide. The high-k material of the dielectric layer may include a zirconium oxide-based layer or a hafnium oxide-based layer.

In accordance with an embodiment, a memory cell may include: a semiconductor substrate including a first impurity region, a second impurity region, and a word line trench formed between the first impurity region and the second impurity region; a buried word line formed in the word line trench; a bit line coupled to the first impurity region; and a capacitor coupled to the second impurity region, wherein the capacitor includes: a bottom electrode; a dielectric layer including a high-k material, which is formed on the bottom electrode; a top electrode formed on the dielectric layer; and an interface control layer formed between the dielectric layer and the top electrode, and including a leakage blocking material, a dopant material, a high bandgap material and a high work function material that are sequentially stacked on top of one another. The high work function material may include a conductive material having a higher work function than the top electrode. the high bandgap material includes a material having a higher bandgap than the dopant material. Each of the leakage blocking material and the high bandgap material is thinner than the dopant material. The dopant material may include a material having a higher dielectric constant than the high-k material, the leakage blocking material and the high bandgap material. Each of the leakage blocking material and the high bandgap material may include an aluminum oxide or a silicon oxide. The dopant material may include a titanium oxide. The high work function material may include a titanium aluminum nitride or a titanium silicon nitride. A dielectric layer, leakage blocking material, dopant material and high bandgap material stack in which the dielectric layer, the leakage blocking material, the dopant material and the high bandgap material are sequentially stacked may include a ZAZATA (ZrO2/Al2O3/ZrO2/Al2O3/TiO2/Al2O3) stack, a ZAZATS (ZrO2/Al2O3/ZrO2/Al2O3/TiO2/SiO2) stack, an HAHATA (HfO2/Al2O3/HfO2/Al2O3/TiO2/Al2O3) stack, an HAHATS (HfO2/Al2O3/HfO2/Al2O3/TiO2/SiO2) stack or an HSHSTS (HfO2/SiO2/HfO2/SiO2/TiO2/SiO2) stack.

In accordance with an embodiment, a method for fabricating a capacitor may include: forming a bottom electrode; forming a dielectric layer on the bottom electrode; forming a leakage blocking layer on the dielectric layer; forming a dopant-containing layer on the leakage blocking layer; forming a reduction preventing layer on the dopant-containing layer; forming a high work function layer on the reduction preventing layer; and forming a top electrode on the high work function layer. Each of the reduction preventing layer and the leakage blocking layer may include a material having a higher bandgap than the dopant-containing layer. Each of the reduction preventing layer and the leakage blocking layer may include an aluminum oxide or a silicon oxide. The dopant-containing layer may include a material having a higher dielectric constant than the reduction preventing layer. The dopant-containing layer may include a material that is thermally diffused into the leakage blocking layer and the dielectric layer. The dopant-containing layer may include a titanium oxide. A leakage blocking layer, dopant-containing layer and reduction preventing layer stack in which the leakage blocking layer, the dopant-containing layer and the reduction preventing layer are sequentially stacked includes an ATA (Al2O3/TiO2/Al2O3) stack, an STS (SiO2/TiO2/SiO2) stack or an ATS (Al2O3/TiO2/SiO2) stack. The dielectric layer may include an ZAZ (ZrO2/Al2O3/ZrO2) stack, an HAH (HfO2/Al2O3/HfO2) stack or an HSH (HfO2/SiO2/HfO2) stack. The forming of the top electrode may include depositing a titanium nitride by Atomic Layer Deposition (ALD). The forming of the high work function layer may include depositing a titanium nitride by Atomic Layer Deposition (ALD) using a titanium-source material and a nitrogen-source material and forming an intermixed compound of a surface of the reduction preventing layer and the titanium nitride. The intermixed compound has a higher work function than the titanium nitride. The reduction preventing layer may include an aluminum oxide, and the intermixed compound includes a titanium aluminum nitride. The method may further include performing a thermal process after the forming of the dopant-containing layer, wherein, by the thermal process, an intermixed compound having a high dielectric constant, in which the dopant-containing layer, the leakage blocking layer and a portion of the dielectric layer in contact with the leakage blocking layer are intermixed, is formed. The intermixed compound having the high dielectric constant has a higher dielectric constant than the dielectric layer. The intermixed compound having the high dielectric constant includes a compound of a zirconium oxide and an aluminum oxide, and further includes a dopant of a titanium oxide.

These and other features and advantages of the present invention will become apparent to those skilled in the art of the invention from the following detailed description in conjunction with the following drawings.

DETAILED DESCRIPTION

Various examples and implementations of the disclosed technology are described below in detail with reference to the accompanying drawings.

The drawings may not necessarily be to scale and in some instances, proportions of structures in the drawings may have been exaggerated to clearly illustrate certain features of the described examples or implementations. In presenting a specific example in a drawing or description having two or more layers in a multi-layer structure, the relative positioning relationship of such layers or the sequence of arranging the layers as shown reflects a particular implementation for the described or illustrated example and a different relative positioning relationship or sequence of arranging the layers may be possible. Throughout the disclosure, like reference numerals refer to like parts in the various figures and embodiments.

In addition, a described or illustrated example of a multi-layer structure may not reflect all layers present in that particular multi-layer structure (e.g., one or more additional layers may be present between two illustrated layers). As a specific example, when a first layer in a described or illustrated multi-layer structure is referred to as being “on” or “over” a second layer or “on” or “over” a substrate, the first layer may be directly formed on the second layer or the substrate but may also represent a structure where one or more other intermediate layers may exist between the first layer and the second layer or the substrate.

Furthermore, ‘connected/coupled’ represents that one component is directly coupled to another component or indirectly coupled through another component. In this specification, a singular form may include a plural form as long as it is not specifically mentioned in a sentence. Furthermore, ‘include/comprise’ or ‘including/comprising’ used in the specification represents that one or more components, steps, operations, and elements exist or are added.

A capacitor may include a bottom electrode, a dielectric layer, and a top electrode. As the thickness of the dielectric layer decreases, the leakage current may increase. A dielectric constant and an energy band gap (hereinafter abbreviated as a “bandgap”) of the dielectric layer are inversely proportional to each other. In order to suppress the leakage current, the thickness of the dielectric layer may be increased or a dielectric layer having a low dielectric constant may be used. An increase in the thickness of the dielectric layer and the low dielectric constant of the dielectric layer may increase the electrical thickness of the dielectric layer, that is, the equivalent oxide layer thickness (EOT). When the thickness of the dielectric layer is reduced to reduce the equivalent oxide layer thickness, the reduced thickness of the dielectric layer becomes smaller than the minimum thickness necessary for crystallization of the dielectric layer, thereby increasing the amorphous characteristic. Therefore, although the thickness of the dielectric layer is reduced, there is limitation in an increase of the capacitance.

In addition, the top electrode of the capacitor may be formed in a strong reducing atmosphere. For example, the strong reducing atmosphere may include gases such as NH3, SiHx, GeHxand BHx. Since the strong reducing atmosphere causes a loss of oxygen in the dielectric layer, the quality of the dielectric layer may be lowered.

Hereinafter, embodiments are directed to a dielectric layer stack and interfacial engineering that may prevent the reduction of the dielectric layer. In addition, embodiments are directed to a dielectric layer stack and interfacial engineering that may increase the dielectric constant of the dielectric layer. Furthermore, embodiments are directed to a dielectric layer stack and interfacial engineering that may reduce leakage.

FIG. 1is a cross-sectional view of a semiconductor device100in accordance with an embodiment.

Referring toFIG. 1, the semiconductor device100may include a semiconductor layer stack110. The semiconductor layer stack110may include a first conductive layer101, a dielectric layer stack DE1, and a second conductive layer103. The dielectric layer stack DE1may include a dielectric layer HK and an interface control layer ICL1. The interface control layer ICL1may be formed between the dielectric layer HK and the second conductive layer103.

The first conductive layer101may include a metal-containing material. The first conductive layer101may include a metal, a metal nitride, a conductive metal oxide or a combination thereof. The first conductive layer101may include titanium (Ti), a titanium nitride (TiN), a tantalum nitride (TaN), tungsten (W), a tungsten nitride (WN), ruthenium (Ru), iridium (Ir), a ruthenium oxide, an iridium oxide or any combinations thereof. In some embodiments, the first conductive layer101may include a silicon-containing material. For example, the first conductive layer101may include a silicon (Si) substrate, a silicon layer, a silicon germanium (SiGe) layer or any combinations thereof.

The second conductive layer103may include a silicon-containing material, a germanium-containing material, a metal-containing material or any combinations thereof. The second conductive layer103may include a metal, a metal nitride, a conductive metal nitride or any combinations thereof. The second conductive layer103may include titanium (Ti), a titanium nitride (TiN), a tantalum nitride (TaN), tungsten (W), a tungsten nitride (WN), ruthenium (Ru), iridium (Ir), a ruthenium oxide, an iridium oxide or any combinations thereof. The second conductive layer103may include a silicon (Si) layer, a germanium (Ge) layer, a silicon germanium (SiGe) layer or any combinations thereof. The second conductive layer103may have a multi-layer structure (Si/SiGe) formed by stacking the silicon germanium layer on the silicon layer. The second conductive layer103may have a multi-layer structure (Ge/SiGe) formed by stacking the silicon germanium layer on the germanium layer. The second conductive layer103may be formed by stacking the silicon germanium layer and the metal nitride. For example, the second conductive layer103may have a multi-layer structure (SiGe/TiN) formed by stacking the titanium nitride on the silicon germanium layer.

The dielectric layer stack DE1may be formed by Atomic Layer Deposition (ALD).

The dielectric layer HK may be formed in a single layer, a multi-layer or a laminate structure. The dielectric layer HK may be coupled to the first conductive layer101. The dielectric layer HK may include a high-k material. The dielectric layer HK may have a dielectric constant that is higher than the dielectric constant of a silicon oxide (SiO2). The dielectric constant of the silicon oxide may be approximately 3.9, and the dielectric layer HK may include a material having a dielectric constant of approximately 4 or higher. The high-k material may have a dielectric constant of approximately 20 or higher. The high-k material may include a hafnium oxide (HfO2), a zirconium oxide (ZrO2), an aluminum oxide (Al2O3), a titanium oxide (TiO2), a tantalum oxide (Ta2O5), a niobium oxide (Nb2O5) or a strontium titanium oxide (SrTiO3). In some embodiments, the dielectric layer HK may be a composite layer including two or more layers made of the above-described high-k material. The dielectric layer HK may be formed of a zirconium (Zr)-based oxide. The dielectric layer HK may be formed in a multi-layer structure including a zirconium oxide (ZrO2). The dielectric layer HK may include a ZAZ (ZrO2/Al2O3/ZrO2) structure in which a zirconium oxide, an aluminum oxide and a zirconium oxide are sequentially stacked. The ZAZ structure may be referred to as a zirconium oxide (ZrO2)-based layer. In some embodiments, the dielectric layer HK may be formed of a hafnium (Hf)-based oxide. The dielectric layer HK may be formed in a multi-layer structure including a hafnium oxide (HfO2). For example, the dielectric layer HK may include an HAH (HfO2/Al2O3/HfO2) structure in which a hafnium oxide, an aluminum oxide and a hafnium oxide are sequentially stacked. The HAH structure may be referred to as a hafnium oxide (HfO2)-based layer. In some embodiments, the dielectric layer HK may include a TiO2/ZAZ, a TiO2/HAH, a Ta2O5/ZAZ or a Ta2O5/HAH structure. The TiO2/ZAZ and the Ta2O5/ZAZ structures may be formed by stacking a ZAZ (ZrO2/Al2O3/ZrO2) on a titanium oxide (TiO2) and a tantalum oxide (Ta2O5), respectively. The TiO2/HAH and the Ta2O5/HAH structures may be formed by stacking a HAH (HfO2/Al2O3/HfO2) on a titanium oxide (TiO2) and a tantalum oxide (Ta2O5), respectively.

The aluminum oxide Al2O3of the ZAZ (ZrO2/Al2O3/ZrO2) and the HAH (HfO2/Al2O3/HfO2) structure may have a higher bandgap than the zirconium oxide (ZrO2) and the hafnium oxide (HfO2). The aluminum oxide Al2O3may have a dielectric constant that is lower than the dielectric constants of the zirconium oxide (ZrO2) and the hafnium oxide (HfO2). Accordingly, the dielectric layer HK may include a stack of a high-k material and a high bandgap material having a higher bandgap than the high-k material. The dielectric layer HK may include a silicon oxide SiO2employed as a high bandgap material instead of an aluminum oxide, which is to be described below. The dielectric layer HK including a high bandgap material may suppress leakage.

In some embodiments, the dielectric layer HK may include a laminate structure such as a ZAZAZ (ZrO2/Al2O3/ZrO2/Al2O3/ZrO2) and an HAHAH (HfO2/Al2O3/HfO2/Al2O3/HfO2).

The interface control layer ICL1may include a dopant-containing layer HKD and a high bandgap layer HBG. The high bandgap layer HBG may be in direct contact with the second conductive layer103. The dopant-containing layer HKD may be in direct contact with a top surface of the dielectric layer HK.

The dopant-containing layer HKD may contain a dopant. The dopant may include a material that is thermally diffusible. The dopant may diffuse into the dielectric layer HK to increase the dielectric constant of the dielectric layer HK. The dopant-containing layer HKD may have a high dielectric constant by including the dopant. The dopant-containing layer HKD may have a higher dielectric constant than the dielectric layer HK. The dopant-containing layer HKD may have a high dielectric constant of approximately 50 or higher. The dopant may include a metal, a metal oxide or any combinations thereof. The dopant-containing layer HKD may contain titanium as the dopant. The dopant-containing layer HKD may include a titanium oxide. The thickness of the dopant-containing layer HKD may be 0.3 nm to 1 nm.

The high bandgap layer HBG may include a material having a high bandgap. The high bandgap layer HBG may have a bandgap of approximately 8 eV or higher. The high bandgap layer HBG may include a reduction preventing material. The high bandgap layer HBG may prevent reduction of the dielectric layer HK and the dopant-containing layer HKD when the second conductive layer103is formed. The high bandgap layer HBG may include a material that is not relatively reduced well in comparison with the dielectric layer HK and the dopant-containing layer HKD. The high bandgap layer HBG may include aluminum. The high bandgap layer HBG may include an aluminum oxide. In some embodiments, the high bandgap layer HBG may include a silicon oxide. The aluminum oxide and the silicon oxide have a high band gap of approximately 8 eV or higher and are not easily reduced.

The dielectric layer stack DE1may be formed by sequentially stacking the dielectric layer HK, the dopant-containing layer HKD and the high bandgap layer HBG. The dopant-containing layer HKD may have a higher dielectric constant than the dielectric layer HK and the high bandgap layer HBG. The dielectric layer HK may have a higher dielectric constant than the high bandgap layer HBG. The high bandgap layer HBG may be thinner than the dopant-containing layer HKD and the dielectric layer HK. The high bandgap layer HBG may be an ultra-thin layer. The thickness of the high bandgap layer HBG may be 0.1 nm to 0.2 nm. The equivalent oxide layer thickness of the dielectric layer stack DE1may be decreased by the ultra-thin high bandgap layer HBG. The reduction of the dielectric layer HK and the dopant-containing layer HKD may be prevented by the ultra-thin high bandgap layer HBG. The capacitance of the dielectric layer stack DE1may be increased by the dopant-containing layer HKD.

FIGS. 2A to 2Dare cross-sectional views illustrating application examples of the semiconductor device100shown inFIG. 1.

Referring toFIG. 2A, the semiconductor device100may include a capacitor C1. The capacitor C1may correspond to the semiconductor layer stack110shown inFIG. 1.

The capacitor C1may include a bottom electrode201, a dielectric layer202, and a top electrode203. The capacitor C1may further include an interface control layer204between the dielectric layer202and the top electrode203. The stacked structure of the dielectric layer202and the interface control layer204may be a dielectric layer stack DE11.

Each of the bottom electrode201and the top electrode203may include a titanium nitride (TIN). In some embodiments, the bottom electrode201and the top electrode203may include a silicon-containing material, a germanium-containing material, a conductive metal oxide, a metal nitride, a metal or any combinations thereof.

The dielectric layer202may include a zirconium oxide-based layer. The dielectric layer202may be formed by sequentially stacking a zirconium oxide202A, an aluminum oxide202B and a zirconium oxide202C. In other words, the dielectric layer202may include a ZAZ (ZrO2/Al2O3/ZrO2) structure. The aluminum oxide202B may be thinner than the zirconium oxides202A and202C. The ZAZ (ZrO2/Al2O3/ZrO2) structure may have a high dielectric constant due to the zirconium oxides202A and202C, where leakage may be suppressed by the aluminum oxide202B.

The interface control layer204may include a TA (TiO2/Al2O3) structure in which a titanium oxide206and an aluminum oxide207are sequentially stacked. The aluminum oxide207may be thinner than the titanium oxide206. The titanium oxide206may correspond to the dopant-containing layer HKD shown inFIG. 1. The aluminum oxide207may correspond to the high bandgap layer HBG shown inFIG. 1.

The dielectric layer stack DE11may be formed of a ZAZTA (ZrO2/Al2O3/ZrO2/TiO2/Al2O3) structure in which the zirconium oxide202A, the aluminum oxide202B, the zirconium oxide202C, the titanium oxide206and the aluminum oxide207are sequentially stacked. The aluminum oxide207may be thinner than the titanium oxide206. The aluminum oxide207may be thinner than the aluminum oxide202B of the dielectric layer202. The thickness of the aluminum oxide207may be 0.1 nm to 0.2 nm. The thickness of the titanium oxide206may be 0.3 nm to 1 nm.

Referring toFIG. 2B, the remaining configurations of a capacitor C2except for an interface control layer204′ may be the same as those of the capacitor C1shown inFIG. 2A.

The interface control layer204′ may include a TS (TiO2/SiO2) structure in which a titanium oxide206and a silicon oxide208are sequentially stacked. The silicon oxide208may be thinner than the titanium oxide206. The titanium oxide206may correspond to the dopant-containing layer HKD shown inFIG. 1. The silicon oxide208may correspond to the high bandgap layer HBG shown inFIG. 1.

The dielectric layer stack DE12may be formed of a ZAZTS (ZrO2/Al2O3/ZrO2/TiO2/SiO2) structure in which a zirconium oxide202A, an aluminum oxide202B, a zirconium oxide202C, the titanium oxide206and the silicon oxide208are sequentially stacked. The silicon oxide208may be thinner than the titanium oxide206. The silicon oxide208may be thinner than the aluminum oxide202B.

Referring toFIG. 2C, the remaining configurations of a capacitor C3except for a dielectric layer202′ may be the same as those of the capacitor C1shown inFIG. 2A.

The dielectric layer202′ may include a hafnium oxide-based layer. The dielectric layer202′ may be formed by sequentially stacking a hafnium oxide202A′, an aluminum oxide202B and a hafnium oxide202C′. In other words, the dielectric layer202′ may include an HAH (HfO2/Al2O3/HfO2) structure. The aluminum oxide202B may be thinner than the hafnium oxides202A′ and202C′.

A dielectric layer stack DE13may be formed of a HAHTA (HfO2/Al2O3/HfO2/TiO2/Al2O3) structure in which the hafnium oxide202A′, the aluminum oxide202B, the hafnium oxide202C′, a titanium oxide206and an aluminum oxide207are sequentially stacked. The aluminum oxide207may be thinner than the titanium oxide206. The aluminum oxide207may be thinner than the aluminum oxide202B of the dielectric layer202′.

Referring toFIG. 2D, the remaining configurations of a capacitor C4except for an interface control layer204′ may be the same as those of the capacitor C3shown inFIG. 2C.

The interface control layer204′ may include a TS (TiO2/SiO2) in which a titanium oxide206and a silicon oxide208are sequentially stacked. The silicon oxide208may be thinner than the titanium oxide206. The titanium oxide206may correspond to the dopant-containing layer HKD shown inFIG. 1. The silicon oxide208may correspond to the high bandgap layer HBG shown inFIG. 1.

A dielectric layer stack DE14may be formed of a HAHTS (HfO2/Al2O3/HfO2/TiO2/SiO2) in which a hafnium oxide202A′, an aluminum oxide202B, a hafnium oxide202C′, the titanium oxide206and the silicon oxide208are sequentially stacked. The silicon oxide208may be thinner than the titanium oxide206. The silicon oxide208may be thinner than the aluminum oxide202B.

According to the above-described application examples of the semiconductor device100, the aluminum oxides202B and207and the silicon oxide208may be thin to increase capacitance of the dielectric layer stacks DE11, DE12, DE13and DE14. The aluminum oxides202B and207and the silicon oxide208as materials having lower dielectric constants than the zirconium oxides202A and202C, the hafnium oxides202A′ and202C′ and the titanium oxide206may suppress a decrease in capacitance by being formed extremely thin. The equivalent oxide layer thicknesses (EOT) of the dielectric layer stacks DE11, DE12, DE13and DE14may increase as the thicknesses of the aluminum oxides202B and207and the silicon oxide208increase. Therefore, in order to decrease the equivalent oxide layer thicknesses, the thicknesses of the aluminum oxides202B and207and the silicon oxide208may be 0.1 nm to 0.2 nm. The aluminum oxide207and the silicon oxide208of the interface control layers204and204′ may be thinner than the aluminum oxide202B of the dielectric layers202and202′.

FIG. 3is a cross-sectional view of a semiconductor device120in accordance with an embodiment. Detailed descriptions of the components and configurations of the semiconductor device120that are the same as or similar to those of the semiconductor device100shown inFIG. 1are omitted.

Referring toFIG. 3, the semiconductor device120may include a semiconductor layer stack121. The semiconductor layer stack121may include a first conductive layer101, a dielectric layer stack DE2, and a second conductive layer103. The dielectric layer stack DE2may include a dielectric layer HK and an interface control layer ICL2. The interface control layer ICL2may be formed between the dielectric layer HK and the second conductive layer103.

The interface control layer ICL2may include a dopant-containing layer HKD and a high bandgap layer HBG. The interface control layer ICL2may further include a leakage blocking layer HLK formed at an interface between the dopant-containing layer HKD and the dielectric layer HK.

The leakage blocking layer HLK may prevent a dopant from being excessively diffused from the dopant-containing layer HKD. The leakage blocking layer HLK may have a lower dielectric constant than the dopant-containing layer HKD. The leakage blocking layer HLK may be extremely thin. The leakage blocking layer HLK may contain a leakage blocking material LK. The leakage blocking layer HLK may include aluminum. The leakage blocking layer HLK may include an aluminum oxide. The leakage blocking layer HLK may include a silicon oxide. The leakage blocking layer HLK may be extremely thin so as to suppress an increase in capacitance of the dielectric layer stack DE2. In addition, the leakage blocking layer HLK may have a thickness for preventing a dopant from being excessively diffused from the dopant-containing layer HKD and preventing leakage. The thickness of the leakage blocking layer HLK may be 0.1 nm to 0.2 nm.

The dielectric layer stack DE2may be formed by sequentially stacking the dielectric layer HK, the leakage blocking layer HLK, the dopant-containing layer HKD and the high bandgap layer HBG. The thickness of the leakage blocking layer HLK may be the same as that of the high bandgap layer HBG. The leakage blocking layer HLK may be the same or a different material as or from the high bandgap layer HBG. The leakage blocking layer HLK and the high bandgap layer HBG may have high bandgaps.

FIGS. 4A to 4Dare cross-sectional views illustrating application examples of the semiconductor device120shown inFIG. 3.

Referring toFIG. 4A, the semiconductor device120may include a capacitor C11. The capacitor C11may correspond to the semiconductor layer stack121shown inFIG. 3.

The capacitor C11may include a bottom electrode201, a dielectric layer202, and a top electrode203. The capacitor C11may further include an interface control layer214between the dielectric layer202and the top electrode203. The stacked structure of the dielectric layer202and the interface control layer214may be a dielectric layer stack DE21.

Each of the bottom electrode201and the top electrode203may include a titanium nitride (TiN). In some embodiments, the bottom electrode201and the top electrode203may include a conductive metal oxide, a metal nitride, a metal or any combinations thereof.

The dielectric layer202may be formed by sequentially stacking a zirconium oxide202A, an aluminum oxide202B and a zirconium oxide202C. In other words, the dielectric layer202may include a ZAZ (ZrO2/Al2O3/ZrO2). The aluminum oxide202B may be thinner than the zirconium oxides202A and202C.

The interface control layer214may include an ATA (Al2O3/TiO2/Al2O3) in which an aluminum oxide205, a titanium oxide206and an aluminum oxide207are sequentially stacked. The aluminum oxides205and207may be thinner than the titanium oxide206. The titanium oxide206may correspond to the dopant-containing layer HKD shown inFIG. 3. The aluminum oxide207may correspond to the high bandgap layer HBG shown inFIG. 3. The aluminum oxide205may correspond to the leakage blocking layer HLK shown inFIG. 3.

The dielectric layer stack DE21may be formed of a ZAZATA (ZrO2/Al2O3/ZrO2/Al2O3/TiO2/Al2O3) in which the zirconium oxide202A, the aluminum oxide202B, the zirconium oxide202C, the aluminum oxide205, the titanium oxide206and the aluminum oxide207are sequentially stacked. The aluminum oxides205and207may be thinner than the titanium oxide206. The aluminum oxides205and207may be thinner than the aluminum oxide202B of the dielectric layer202.

Referring toFIG. 4B, the remaining configurations of a capacitor C12except for an interface control layer214′ may be the same as those of the capacitor C11shown inFIG. 4A.

The interface control layer214′ may include an ATS (Al2O3/TiO2/SiO2) in which an aluminum oxide205, a titanium oxide206and a silicon oxide208are sequentially stacked. The aluminum oxide205and the silicon oxide208may be thinner than the titanium oxide206. The titanium oxide206may correspond to the dopant-containing layer HKD shown inFIG. 3. The silicon oxide208may correspond to the high bandgap layer HBG shown inFIG. 3.

A dielectric layer stack DE22may be formed of a ZAZATS (ZrO2/Al2O3/ZrO2/Al2O3/TiO2/SiO2) in which a zirconium oxide202A, an aluminum oxide202B, a zirconium oxide202C, the aluminum oxide205, the titanium oxide206and the silicon oxide208are sequentially stacked. The aluminum oxide205and the silicon oxide208may be thinner than the titanium oxide206. The aluminum oxide205may be thinner than the aluminum oxide202B of a dielectric layer202. The thickness of the aluminum oxide205may be the same as that of the silicon oxide208.

Referring toFIG. 4C, the remaining configurations of a capacitor C13except for a dielectric layer202′ may be the same as those of the capacitor C11shown inFIG. 4A.

The dielectric layer202′ may be formed by sequentially stacking a hafnium oxide202A′, an aluminum oxide202B and a hafnium oxide202C′. In other words, the dielectric layer202′ may include a HAH (HfO2/Al2O3/HfO2) structure. The aluminum oxide202B may be thinner than the hafnium oxides202A′ and202C′.

A dielectric layer stack DE23may be formed of a HAHATA (HfO2/Al2O3/HfO2/Al2O3/TiO2/Al2O3) in which the hafnium oxide202A′, the aluminum oxide202B, the hafnium oxide202C′, an aluminum oxide205, a titanium oxide206and an aluminum oxide207are sequentially stacked. The aluminum oxides205and207may be thinner than the titanium oxide206. The aluminum oxides205and207may be thinner than the aluminum oxide202B of the dielectric layer202′. The thickness of the aluminum oxide205may be the same as that of the aluminum oxide207.

Referring toFIG. 4D, the remaining configurations of a capacitor C14except for an interface control layer214′ may be the same as those of the capacitor C13shown inFIG. 4C.

The interface control layer214′ may include an ATS (Al2O3/TiO2/SiO2) in which an aluminum oxide205, a titanium oxide206and a silicon oxide208are sequentially stacked. The silicon oxide208may be thinner than the titanium oxide206.

A dielectric layer stack DE24may be formed of a HAHATS (HfO2/Al2O3/HfO2/Al2O3/TiO2/SiO2) in which a hafnium oxide202A′, an aluminum oxide202B, a hafnium oxide202C′, the aluminum oxide205, the titanium oxide206and the silicon oxide208are sequentially stacked. The aluminum oxide205and the silicon oxide208may be thinner than the titanium oxide206. The aluminum oxide205may be thinner than the aluminum oxide202B of the dielectric layer202′. The thickness of the aluminum oxide205may be the same as that of the silicon oxide208.

According to the above-described application examples of the semiconductor device120, the aluminum oxides202B,205and207and the silicon oxide208may be thin to increase capacitance of the dielectric layer stacks DE21, DE22, DE23and DE24. The aluminum oxides202B,205and207and the silicon oxide208as materials having lower dielectric constants than the zirconium oxides202A and202C, the hafnium oxides202A′ and202C′ and the titanium oxide206may suppress a decrease in capacitance by being formed extremely thin. The equivalent oxide layer thicknesses (EOT) of the dielectric layer stacks DE21, DE22, DE23and DE24may increase as the thicknesses of the aluminum oxides202B,205and207and the silicon oxide208increase. Therefore, in order to decrease the equivalent oxide layer thicknesses, the thicknesses of the aluminum oxides202B,205and207and the silicon oxide208may be 0.1 nm to 0.2 nm. The aluminum oxides205and207and the silicon oxide208of the interface control layers214and214′ may be thinner than the aluminum oxide202B of the dielectric layers202and202′.

FIG. 5is a cross-sectional view of a semiconductor device130in accordance with an embodiment. Detailed descriptions of the components and configurations of the semiconductor device130that are the same as or similar to those of the semiconductor device100shown inFIG. 1are omitted.

Referring toFIG. 5, the semiconductor device130may include a semiconductor layer stack131. The semiconductor layer stack131may include a first conductive layer101, a dielectric layer stack DE3, and a second conductive layer103. The dielectric layer stack DE3may include a dielectric layer HK and an interface control layer ICL3. The interface control layer ICL3may be formed between the dielectric layer HK and the second conductive layer103.

The interface control layer ICL3may include a dopant-containing layer HKD, a high bandgap layer HBG, and a high work function layer HWF. The high work function layer HWF may be in direct contact with the second conductive layer103.

The high work function layer HWF may be formed at an interface between the high bandgap layer HBG and the second conductive layer103. The high work function layer HWF may be a material containing some components of the high bandgap layer HBG and some components of the second conductive layer103. In some embodiments, the high work function layer HWF may be formed by the reaction of the high bandgap layer HBG and the second conductive layer103. For example, a surface of the high bandgap layer HBG may be intermixed with a portion of the second conductive layer103. When the high bandgap layer HBG includes aluminum oxide and the second conductive layer103includes a titanium nitride, the high work function layer HWF may be formed of a compound in the form of a titanium aluminum nitride (TiAlN). Since the titanium aluminum nitride (TiAlN) has a higher work function than the titanium nitride, the titanium aluminum nitride (TiAlN) may reduce leakage. The high work function layer HWF may be a conductive material, thereby being used as an electrode material together with the second conductive layer103. The high work function layer HWF may be an ultra-thin layer.

The dielectric layer stack DE3may be formed by sequentially stacking the dielectric layer HK, the dopant-containing layer HKD and the high bandgap layer HBG.

Referring toFIG. 6A, the capacitor C21may include a bottom electrode201, a dielectric layer202, and a top electrode203. The capacitor C21may further include an interface control layer224between the dielectric layer202and the top electrode203. The stacked structure of the dielectric layer202and the interface control layer224may be a dielectric layer stack DE31.

Each of the bottom electrode201and the top electrode203may include a titanium nitride (TiN). In some embodiments, the bottom electrode201and the top electrode203may include a conductive metal oxide, a metal nitride, a metal or any combinations thereof.

The dielectric layer202may be formed by sequentially stacking a zirconium oxide202A, an aluminum oxide202B and a zirconium oxide202C. In other words, the dielectric layer202may include a ZAZ (ZrO2/Al2O3/ZrO2) structure. The aluminum oxide202B may be thinner than the zirconium oxides202A and202C.

The interface control layer224may include a TA (TiO2/Al2O3) in which a titanium oxide206and an aluminum oxide207are sequentially stacked. The aluminum oxide207may be thinner than the titanium oxide206. The titanium oxide206may correspond to the dopant-containing layer HKD shown inFIG. 5. The aluminum oxide207may correspond to the high bandgap layer HBG shown inFIG. 5. The interface control layer224may further include a titanium aluminum nitride (TiAlN)209. The titanium aluminum nitride209may correspond to the high work function layer HWF shown inFIG. 5.

The dielectric layer stack DE31may be formed of a ZAZTA (ZrO2/Al2O3/ZrO2/TiO2/Al2O3) structure in which the zirconium oxide202A, the aluminum oxide202B, the zirconium oxide202C, the titanium oxide206and the aluminum oxide207are sequentially stacked.

Referring toFIG. 6B, the remaining configurations of the capacitor C22except for an interface control layer224′ may be the same as those of the capacitor C21shown inFIG. 6A.

The interface control layer224′ may include a TS (TiO2/SiO2) structure in which a titanium oxide206and a silicon oxide208are sequentially stacked. The silicon oxide208may be thinner than the titanium oxide206. The titanium oxide206may correspond to the dopant-containing layer HKD shown inFIG. 5. The silicon oxide208may correspond to the high bandgap layer HBG shown inFIG. 5. The interface control layer224′ may further include a titanium silicon nitride (TiSiN)210. The titanium silicon nitride210may correspond to the high work function layer HWF shown inFIG. 5.

A dielectric layer stack DE32may be formed of a ZAZTS (ZrO2/Al2O3/ZrO2/TiO2/SiO2) structure in which a zirconium oxide202A, an aluminum oxide202B, a zirconium oxide202C, the titanium oxide206and the silicon oxide208are sequentially stacked.

Referring toFIG. 6C, the remaining configurations of the capacitor C23except for a dielectric layer202′ may be the same as those of the capacitor C21shown inFIG. 6A.

The dielectric layer202′ may be formed by sequentially stacking a hafnium oxide202A′, an aluminum oxide202B and a hafnium oxide202C′. In other words, the dielectric layer202′ may include a HAH (HfO2/Al2O3/HfO2) structure. The aluminum oxide202B may be thinner than the hafnium oxides202A′ and202C′.

A dielectric layer stack DE33may be formed of a HAHTA (HfO2/Al2O3/HfO2/TiO2/Al2O3) structure in which the hafnium oxide202A′, the aluminum oxide202B, the hafnium oxide202C′, a titanium oxide206and an aluminum oxide207are sequentially stacked.

Referring toFIG. 6D, the remaining configurations of the capacitor C24except for an interface control layer224′ may be the same as those of the capacitor C23shown inFIG. 6C.

The interface control layer224′ may include a TS (TiO2/SiO2) structure in which a titanium oxide206and a silicon oxide208are sequentially stacked. The silicon oxide208may be thinner than the titanium oxide206. The interface control layer224′ may further include a titanium silicon nitride (TiSiN)210formed on the silicon oxide208.

A dielectric layer stack DE34may be formed of an HAHTS (HfO2/Al2O3/HfO2/TiO2/SiO2) structure in which a hafnium oxide202A′, an aluminum oxide202B, a hafnium oxide202C′, the titanium oxide206and the silicon oxide208are sequentially stacked.

According to the above-described application examples of the semiconductor device130, the aluminum oxides202B and207and the silicon oxide208may be thin to increase capacitance of the dielectric layer stacks DE31, DE32, DE33and DE34. The aluminum oxides202B and207and the silicon oxide208as materials having lower dielectric constants than the zirconium oxides202A and202C, the hafnium oxides202A′ and202C′ and the titanium oxide206may suppress a decrease in capacitance by being formed extremely thin. The equivalent oxide layer thicknesses (EOT) of the dielectric layer stacks DE31, DE32, DE33and DE34may increase as the thicknesses of the aluminum oxides202B and207and the silicon oxide208increase. Accordingly, the thicknesses of the aluminum oxides202B and207and the silicon oxide208may be 0.1 nm to 0.2 nm. The aluminum oxide207and the silicon oxide208of the interface control layers224and224′ may be thinner than the aluminum oxide202B of the dielectric layers202and202′.

FIG. 7is a cross-sectional view of a semiconductor device140in accordance with an embodiment. Detailed descriptions of the components and configurations of the semiconductor device140that are the same as or similar to those of the semiconductor devices100,120and130shown inFIGS. 1, 3 and 5respectively are omitted.

Referring toFIG. 7, the semiconductor device140may include a semiconductor layer stack141. The semiconductor layer stack141may include a first conductive layer101, a dielectric layer stack DE4, and a second conductive layer103. The dielectric layer stack DE4may include a dielectric layer HK and an interface control layer ICL4. The interface control layer ICL4may be formed between the dielectric layer HK and the second conductive layer103.

The interface control layer ICL4may include a leakage blocking layer HLK, a dopant-containing layer HKD, a high bandgap layer HBG, and a high work function layer HWF.

The dielectric layer stack DE4may be formed by sequentially stacking the dielectric layer HK, the leakage blocking layer HLK, the dopant-containing layer HKD and the high bandgap layer HBG.

FIGS. 8A to 8Dare cross-sectional views illustrating application examples of the semiconductor device140shown inFIG. 7.

Referring toFIG. 8A, the semiconductor device140may include a capacitor C31. The capacitor C31may correspond to the semiconductor layer stack141shown inFIG. 7.

The capacitor C31may include a bottom electrode201, a dielectric layer202, and a top electrode203. The capacitor C31may further include an interface control layer234between the dielectric layer202and the top electrode203.

Each of the bottom electrode201and the top electrode203may include a titanium nitride (TiN). In some embodiments, the bottom electrode201and the top electrode203may include a conductive metal oxide, a metal nitride, a metal or any combinations thereof.

The dielectric layer202may be formed by sequentially stacking a zirconium oxide202A, an aluminum oxide202B and a zirconium oxide202C. In other words, the dielectric layer202may include a ZAZ (ZrO2/Al2O3/ZrO2) structure. The aluminum oxide202B may be thinner than the zirconium oxides202A and202C.

The interface control layer234may include an ATA (Al2O3/TiO2/Al2O3) structure in which an aluminum oxide205, a titanium oxide206and an aluminum oxide207are sequentially stacked. The aluminum oxides205and207may be thinner than the titanium oxide206. The titanium oxide206may correspond to the dopant-containing layer HKD shown inFIG. 7. The aluminum oxide207may correspond to the high bandgap layer HBG shown inFIG. 7. The aluminum oxide205may correspond to the leakage blocking layer HLK shown inFIG. 7. The interface control layer234may further include a titanium aluminum nitride (TiAlN)209. The titanium aluminum nitride209may correspond to the high work function layer HWF shown inFIG. 7.

A dielectric layer stack DE41may be formed of a ZAZATA (ZrO2/Al2O3/ZrO2/Al2O3/TiO2/Al2O3) structure in which the zirconium oxide202A, the aluminum oxide202B, the zirconium oxide202C, the aluminum oxide205, the titanium oxide206and the aluminum oxide207are sequentially stacked. The aluminum oxide207may be thinner than the titanium oxide206. The aluminum oxide207may be thinner than the aluminum oxide202B of the dielectric layer202.

Referring toFIG. 8B, the remaining configurations of a capacitor C32except for an interface control layer234′ may be the same as those of the capacitor C31shown inFIG. 8A.

The interface control layer234′ may include an ATS (Al2O3/TiO2/SiO2) structure in which an aluminum oxide205, a titanium oxide206and a silicon oxide208are sequentially stacked. The aluminum oxide205and the silicon oxide208may be thinner than the titanium oxide206. The titanium oxide206may correspond to the dopant-containing layer HKD shown inFIG. 7. The silicon oxide208may correspond to the high bandgap layer HBG shown inFIG. 7. The interface control layer234′ may further include a titanium silicon nitride (TiSiN)210. The titanium silicon nitride210may correspond to the high work function layer HWF shown inFIG. 7. The titanium silicon nitride210may be extremely thin.

A dielectric layer stack DE42may be formed of a ZAZATS (ZrO2/Al2O3/ZrO2/Al2O3/TiO2/SiO2) structure in which a zirconium oxide202A, an aluminum oxide202B, a zirconium oxide202C, the aluminum oxide205, the titanium oxide206and the silicon oxide208are sequentially stacked. The silicon oxide208may be thinner than the titanium oxide206. The aluminum oxide205may be thinner than the aluminum oxide202B of a dielectric layer202.

Referring toFIG. 8C, the remaining configurations of a capacitor C33except for a dielectric layer202′ may be the same as those of the capacitor C31shown inFIG. 8A.

The dielectric layer202′ may be formed by sequentially stacking a hafnium oxide202A′, an aluminum oxide202B and a hafnium oxide202C′. In other words, the dielectric layer202′ may include a HAH (HfO2/Al2O3/HfO2) structure. The aluminum oxide202B may be thinner than the hafnium oxides202A′ and202C′.

An interface control layer234may further include a titanium aluminum nitride (TiAlN)209. The titanium aluminum nitride209may be extremely thin.

A dielectric layer stack DE43may be formed of an HAHATA (HfO2/Al2O3/HfO2/Al2O3/TiO2/Al2O3) structure in which the hafnium oxide202A′, the aluminum oxide202B, the hafnium oxide202C′, an aluminum oxide205, a titanium oxide206and an aluminum oxide207are sequentially stacked. The aluminum oxide207may be thinner than the titanium oxide206. The aluminum oxides205and207may be thinner than the aluminum oxide202B of the dielectric layer202′.

Referring toFIG. 8D, the remaining configurations of a capacitor C34except for an interface control layer234′ may be the same as those of the capacitor C33shown inFIG. 8C.

The interface control layer234′ may include an ATS (Al2O3/TiO2/SiO2) structure in which an aluminum oxide205, a titanium oxide206and a silicon oxide208are sequentially stacked. The silicon oxide208may be thinner than the titanium oxide206. The interface control layer234′ may further include a titanium silicon nitride (TiSiN)210. The titanium silicon nitride210may correspond to the high work function layer HWF shown inFIG. 7. The titanium silicon nitride210may be extremely thin.

A dielectric layer stack DE44may be formed of an HAHATS (HfO2/Al2O3/HfO2/Al2O3/TiO2/SiO2) structure in which a hafnium oxide202A′, an aluminum oxide202B, a hafnium oxide202C′, the aluminum oxide205, the titanium oxide206and the silicon oxide208are sequentially stacked. The silicon oxide208may be thinner than the titanium oxide206. The aluminum oxide205may be thinner than the aluminum oxide202B of the dielectric layer202′.

According to the above-described application examples of the semiconductor device140, the aluminum oxides202B,205and207and the silicon oxide208may be thin to increase capacitance of the dielectric layer stacks DE41, DE42, DE43and DE44. The aluminum oxides202B,205and207and the silicon oxide208as materials having lower dielectric constants than the zirconium oxides202A and202C, the hafnium oxides202A′ and202C′ and the titanium oxide206may suppress a decrease in capacitance by being formed extremely thin. The equivalent oxide layer thicknesses (EOT) of the dielectric layer stacks DE41, DE42, DE43and DE44may increase as the thicknesses of the aluminum oxides202B,205and207and the silicon oxide208increase. Therefore, in order to decrease the equivalent oxide layer thicknesses, the thicknesses of the aluminum oxides202B,205and207and the silicon oxide208may be 0.1 nm to 0.2 nm. The aluminum oxides205and207and the silicon oxide208of the interface control layers234and234′ may be thinner than the aluminum oxide202B of the dielectric layers202and202′.

According to the above-described embodiments, the top electrode203may be formed under a reducing atmosphere. The reducing atmosphere may include a reducing material such as hydrogen, a hydrogen compound or a nitrogen-hydrogen compound. For example, the top electrode203may be formed of a titanium nitride (TiN), and the titanium nitride (TiN) may be formed of TiCl4and NH3. Herein, NH3may be the reducing material.

The aluminum oxide207and the silicon oxide208may prevent the zirconium oxide202C and the hafnium oxide202C′ from being reduced when the top electrode203is formed. Accordingly, the aluminum oxide207and silicon oxide208may be referred to as reduction preventing layers.

As a comparative example, when the top electrode203is formed in a reducing atmosphere without the aluminum oxide207and the silicon oxide208, the zirconium oxide202C and the hafnium oxide202C′, which are the uppermost layers of the dielectric layers202and202′, may be easily reduced.

As another comparative example, when the top electrode203is formed in a reducing atmosphere without the aluminum oxide207and the silicon oxide208, the titanium oxide206may be easily reduced.

As described above, when the zirconium oxide202C, the hafnium oxide202C′ and the titanium oxide206are directly exposed to a reducing atmosphere, reduction easily occurs. The aluminum oxide207has a high Gibbs free energy. The aluminum oxide207may have a higher Gibbs free energy than the zirconium oxide202C, the hafnium oxide202C′ and the titanium oxide206. For example, the Gibbs free energy of the aluminum oxide207is approximately −1054.9 KJ/mol, which has a more negative value than the zirconium oxide202C, the hafnium oxide202C′ and the titanium oxide206. Having a high Gibbs free energy results in relatively less reduction than zirconium oxide202C, the hafnium oxide202C′ and the titanium oxide206. In other words, since the aluminum oxide207serves as a reduction preventing layer, defects such as oxygen loss of the zirconium oxide202C, the hafnium oxide202C′ and the titanium oxide206may be suppressed by the aluminum oxide207.

As such, since the aluminum oxide207suppresses the defects of the zirconium oxide202C, the hafnium oxide202C′ and the titanium oxide206, the equivalent oxide layer thickness (EOT) of the dielectric layer stacks DE11to D44may decrease, and the capacitance thereof may increase. In addition, the leakage caused by the defects may decrease.

According to the above-described embodiments, the titanium oxide206is an extremely high-k material of 50 or higher. Thus, the titanium oxide206may serve to increase the dielectric constants of the zirconium oxide202C and the hafnium oxide202C′.

Titanium of the titanium oxide206is a dopant that is easily diffused thermally. Accordingly, the titanium oxide206and the zirconium oxide202C may be intermixed.

The titanium of the titanium oxide206may be diffused into the zirconium oxide202C. For example, the titanium oxide206and the zirconium oxide202C may be intermixed to form a titanium oxide-zirconium oxide compound (TiO2—ZrO2Alloy). The titanium oxide-zirconium oxide compound (TiO2—ZrO2Alloy) has a higher dielectric constant than the zirconium oxide202C. The titanium oxide-zirconium oxide compound (TiO2—ZrO2Alloy) may be referred to as a titanium-doped zirconium oxide (Ti-doped ZrO2).

The titanium oxide206, the zirconium oxide202C and the aluminum oxide205may be intermixed since the aluminum oxide205, which is thin, is disposed between the titanium oxide206and the zirconium oxide202C. For example, the titanium of the titanium oxide206may be diffused into the zirconium oxide202C and the aluminum oxide205. The titanium oxide206, the zirconium oxide202C and the aluminum oxide205may be intermixed to form a titanium-doped zirconium aluminum oxide (Ti-doped ZrAlO). The titanium-doped zirconium aluminum oxide (Ti-doped ZrAlO) has a higher dielectric constant than the zirconium oxide202C. The doping amount of the titanium may be controlled by the thickness of the titanium oxide206. The titanium oxide206may be 0.3 nm to 1 nm.

In some embodiments, the zirconium oxide202C may include a titanium-doped zirconium oxide. Accordingly, the dielectric layer202may be formed by sequentially stacking the zirconium oxide202A, the aluminum oxide202B and the titanium-doped zirconium oxide.

The titanium of the titanium oxide206may be diffused into the hafnium oxide202C′. For example, the titanium oxide206and the hafnium oxide202C′ may be intermixed to form a titanium oxide-hafnium oxide compound (TiO2—HfO2Alloy). The titanium oxide-hafnium oxide compound (TiO2—HfO2Alloy) has a higher dielectric constant than the hafnium oxide202C′. The titanium oxide-hafnium oxide compound (TiO2—HfO2Alloy) may be referred to as a titanium-doped hafnium oxide (Ti-doped HfO2).

The titanium of the titanium oxide206may be diffused into the aluminum oxide205and the hafnium oxide202C′. For example, the titanium oxide206, the aluminum oxide205and the hafnium oxide202C′ may be intermixed to form a titanium-doped hafnium aluminum oxide (Ti-doped HfAlO). The titanium-doped hafnium aluminum oxide (Ti-doped HfAlO) has a higher dielectric constant than the hafnium oxide202C′.

In some embodiments, the hafnium oxide202C′ may include a titanium-doped hafnium oxide. Accordingly, the dielectric layer202′ may be formed by sequentially stacking the hafnium oxide202A′, the aluminum oxide202B and the titanium-doped hafnium oxide.

The aluminum oxide205is a material that suppresses leakage of the dielectric layers202and202′. In addition, the aluminum oxide205serves as a barrier to suppress excessive titanium doping. For example, the aluminum oxide205may suppress excessive diffusion of titanium from the titanium oxide206into the dielectric layers202and202′.

As described above, the titanium oxide206serves to further increase the dielectric constants of the dielectric layers202and202′, and the aluminum oxide207and the silicon oxide208serve to prevent the dielectric layers202and202′ and the titanium oxide206from being reduced. The aluminum oxide205serves as a barrier to suppress the leakage and prevent the excessive diffusion of titanium.

The aluminum oxide207may increase conduction band offset (CBO) between the top electrode103and the dielectric layers202and202′. Since the aluminum oxide207has a high bandgap, the aluminum oxide207forms a high conduction band offset (High CBO) when coupled to the top electrode203. By forming the high conduction band offset, the barrier to which electrons pass may be increased to reduce leakage. The silicon oxide208may also increase conduction band offset (CBO) between the top electrode103and the dielectric layers202and202′ in the same manner as the aluminum oxide207.

Other high bandgap materials may include a lanthanum oxide or an yttrium oxide.

The aluminum oxide207may be extremely thin. The aluminum oxide207may have a thickness of 0.1 nm to 0.2 nm. The aluminum oxide207may be intermixed with a portion of the top electrode203. An intermixed compound may be formed at an interface between the aluminum oxide207and the top electrode203. For example, when the top electrode203is formed, a top surface of the aluminum oxide207may be reduced and intermixed with the top electrode203. When the top electrode203includes a titanium nitride, the intermixed compound may be formed of a compound in the form of a titanium aluminum nitride (TiAlN)209. Since the titanium aluminum nitride (TiAlN)209has a higher work function than the titanium nitride, leakage may be reduced by the titanium aluminum nitride (TiAlN)209. The leakage may be further reduced by the aluminum oxide207and the titanium aluminum nitride (TiAlN)209.

The silicon oxide208may be extremely thin. The thickness of the silicon oxide208may be 0.1 nm to 0.2 nm. The silicon oxide208may be intermixed with a portion of the top electrode203. An intermixed compound may be formed at an interface between the silicon oxide208and the top electrode203. For example, when the top electrode203is formed, a top surface of the silicon oxide208may be reduced and intermixed with the top electrode203. When the top electrode203includes a titanium nitride, the intermixed compound may be formed of a compound in the form of a titanium silicon nitride (TiSiN)210. Since the titanium silicon nitride (TiSiN)210has a higher work function than the titanium nitride, leakage may be reduced by the titanium silicon nitride (TiSiN)210.

FIGS. 9A and 9Bare cross-sectional views of a semiconductor device100M in accordance with an embodiment. Detailed descriptions of the components and configurations of the semiconductor device100M that are the same as or similar to those of the semiconductor devices100,120,130and140shown inFIGS. 1, 3, 5 and 7respectively are omitted.

Referring toFIG. 9A, the semiconductor device100M may include a semiconductor layer stack110M. The semiconductor layer stack110M may include a first conductive layer101, a dielectric layer stack DE5, and a second conductive layer103. The dielectric layer stack DE5may include a dielectric layer HK and an interface control layer ICL5. The dielectric layer HK may include a first high-k layer HK1and a second high-k layer HK2. The interface control layer ICL5may include a high bandgap layer HBG, and may further include the second high-k layer HK2. The second high-k layer HK2may be a portion of the dielectric layer HK and a portion of the interface control layer ICL5.

Referring toFIG. 9B, an interface control layer ICL51may include the second high-k layer HK2and the high bandgap layer HBG, and may further include a high work function layer HWF. The second high-k layer HK2may be a portion of the dielectric layer HK and a portion of the interface control layer ICL51.

InFIGS. 9A and 9B, the first high-k layer HK1may have a higher dielectric constant than a silicon oxide (SiO2). The first high-k layer HK1may have a dielectric constant of approximately 4 or higher. The first high-k layer HK1may be a zirconium oxide-based layer. The first high-k layer HK1may have a multi-layer structure including a zirconium oxide. The first high-k layer HK1may include a ZA (ZrO2/Al2O3) structure. The ZA (ZrO2/Al2O3) may be a structure in which an aluminum oxide is stacked on a zirconium oxide. In some embodiments, the first high-k layer HK1may be a hafnium oxide-based layer. The first high-k layer HK1may have a multi-layer structure including a hafnium oxide. For example, the first high-k layer HK1may include a HA (HfO2/Al2O3). The HA (HfO2/Al2O3) may be a structure in which an aluminum oxide is stacked on a hafnium oxide.

The second high-k layer HK2may have a higher dielectric constant than the first high-k layer HK1. The second high-k layer HK2may have a high dielectric constant of approximately 50 or higher.

FIGS. 10A to 10Care cross-sectional views of the second high-k layer HK2.

Referring toFIG. 10A, the second high-k layer HK2may include a base high-k material HB, a dopant material HD, and a leakage blocking material HL. The base high-k material HB, the dopant material HD and the leakage blocking material HL may be intermixed in the second high-k layer HK2. The dopant material HD may contribute to a high dielectric constant of the second high-k layer HK2. The leakage blocking material HL may serve to prevent leakage of the second high-k layer HK2. The base high-k material HB may include the same material as the first high-k layer HK1. The base high-k material HB may include a zirconium oxide or a hafnium oxide. The dopant material HD may include titanium or a titanium oxide, and the leakage blocking material HL may include aluminum or an aluminum oxide. The dielectric constant of the base high-k material HB may be increased by the dopant material HD. For example, the base high-k material HB may have a dielectric constant of approximately 40, and the dielectric constant of the base high-k material HB may be increased by the dopant material HD. In some embodiments, the second high-k layer HK2may have a structure in which the dopant-containing layer HKD, the leakage blocking layer HLK and the uppermost layer of the dielectric layer HK that are shown inFIG. 3are intermixed.

The concentration of the dopant material HD may be adjusted depending on its thickness. The concentration of the dopant material HD may be graded (G1). For example, the concentration of the dopant material HD may be a dopant-poor concentration GP1near the first high-k layer HK1, and may be a dopant-rich concentration GR1near the high bandgap layer HBG. The concentration of the dopant material HD may increase from the dopant-poor concentration GP1to the dopant-rich concentration GR1. This is referred to as the dopant concentration gradient (denoted by the reference symbol ‘G1’).

The leakage blocking material HL may be concentrated in a middle region of the second high-k layer HK2. In some embodiments, the leakage blocking material HL may have a low concentration near the high bandgap layer HBG and the first high-k layer HK1. The leakage blocking material HL may not be graded.

The concentration of the base high-k material HB may be adjusted depending on its thickness. The concentration of the base high-k material HB may be graded (G2). For example, the concentration of the base high-k material HB may be a poor concentration GP2near the high bandgap layer HBG, and may be a rich concentration GR2near the first high-k layer HK1. The concentration of the base high-k material HB may decrease from the rich concentration GR2to the poor concentration GP2.

In some embodiments, the dopant material HD, the leakage blocking material HL and the base high-k material HB may have uniform concentrations in the second high-k layer HK2.

As shown inFIG. 10B, the second high-k layer HK2may include the dopant material HD and the base high-k material HB, and may not include the leakage blocking material HL. The second high-k layer HK2may include the base high-k material HB doped with a dopant material HD. The dopant material HD may be graded (G1) to the same dopant concentration as shown inFIG. 10A.

In some embodiments, the dopant material HD may be doped to the base high-k material HB at a uniform concentration.

InFIGS. 9A to 10B, the second high-k layer HK2may be a single layer. For example, the second high-k layer HK2may be a single compound layer in which the base high-k material HB, the dopant material HD and the leakage blocking material HL are intermixed. In addition, the second high-k layer HK2may be a single compound layer in which the base high-k material HB and the dopant material HD are intermixed.

As shown inFIG. 10C, the second high-k layer HK2may be formed by sequentially stacking a first doped layer HD1, a second doped layer HD2and a third doped layer HD3. The first doped layer HD1, the second doped layer HD2and the third doped layer HD3may contain the base high-k material HB, the dopant material HD and the leakage blocking material HL, respectively. The concentration of the dopant material HD may be graded (G1) as shown inFIG. 10A. For example, the first doped layer HD1may have the dopant-poor concentration GP1, and the third doped layer HD3may have the dopant-rich concentration GR1. The concentration of the dopant material HD may be graded (G1) so as to increase from the first doped layer HD1to the third doped layer HD3. The concentrations of the leakage blocking material HD and the base high-k material HB may be as shown inFIG. 10A.

In some embodiments, each of the first doped layer HD1, the second doped layer HD2and the third doped layer HD3may contain the base high-k material HB and the dopant material HD. Herein, the second doped layer HD2may contain the leakage blocking material HL, and the first doped layer HD1and the third doped layer HD3may not contain the leakage blocking material HL.

In some embodiments, the second high-k layer HK2may be a single layer of a titanium-doped zirconium aluminum oxide (Ti-doped ZrAlO). The titanium-doped zirconium aluminum oxide is a compound in which a zirconium oxide and an aluminum oxide are intermixed, and may further include a titanium oxide as a dopant material. The zirconium oxide may correspond to the base high-k material HB, the aluminum oxide may correspond to the leakage blocking material HL, and the titanium oxide may correspond to the dopant material HD. In some embodiments, the second high-k layer HK2may be a single layer of a titanium-doped hafnium aluminum oxide (Ti-doped HfAlO). The titanium-doped hafnium aluminum oxide is a compound in which a hafnium oxide and an aluminum oxide are intermixed, and may further include a titanium oxide as a dopant material.

In some embodiments, the second high-k layer HK2may include a stacked layer of a first titanium-doped zirconium aluminum oxide (First Ti-doped ZrAlO), a second titanium-doped zirconium aluminum oxide (Second Ti-doped ZrAlO) and a third titanium-doped zirconium aluminum oxide (Third Ti-doped ZrAlO). The first titanium-doped zirconium aluminum oxide may have a titanium-poor concentration, and the third titanium-doped zirconium aluminum oxide may have a titanium-rich concentration.

In some embodiments, the second high-k layer HK2may be formed by sequentially stacking a titanium-doped zirconium oxide (Ti-doped ZrO2), an aluminum oxide (Al2O3) and a titanium oxide (TiO2).

FIG. 11Ais a cross-sectional view illustrating an example of a method for forming the second high-k layer HK2in accordance with an embodiment.

Referring toFIG. 11A, a base high-k material layer HBL, a leakage blocking material layer HLL and a dopant material layer HDL may be sequentially deposited. Each of the base high-k material layer HBL, the leakage blocking material layer HLL and the dopant material layer HDL may be deposited by Atomic Layer Deposition (ALD). The leakage blocking material layer HLL may be thinner than the base high-k material layer HBL and the dopant material layer HDL. The leakage blocking material layer HLL may be extremely thin. The thickness of the leakage blocking material layer HLL may be 0.1 nm to 0.2 nm.

Next, a thermal process TRT may be performed. Since the leakage blocking material layer HLL is extremely thin, inter-diffusion ID may occur between the base high-k material layer HBL and the dopant material layer HDL through the thermal process TRT. Accordingly, the second high-k layer HK2in which the dopant material layer HDL, the leakage blocking material layer HLL and the base high-k material layer HBL are intermixed may be formed.

The concentrations of the dopant material HD, the leakage blocking material HL and the base high-k material HB may be uniform in the second high-k layer HK2or may be the same as those shown inFIG. 10A.

When a compound of the dopant material HD and the base high-k material HB is formed, the dopant material HD may increase the dielectric constant of the base high-k material HB. The leakage blocking material HL may serve as a barrier for preventing leakage of the base high-k material HB and suppressing excessive diffusion of the dopant material HD.

FIG. 11Bis a cross-sectional view illustrating another example of a method for forming the second high-k layer HK2in accordance with an embodiment.

Referring toFIG. 11B, a zirconium oxide ZrO2, an aluminum oxide Al2O3and a titanium oxide TiO2may be sequentially deposited. Each of the zirconium oxide ZrO2, the aluminum oxide Al2O3and the titanium oxide TiO2may be deposited by Atomic Layer Deposition (ALD). The aluminum oxide Al2O3may be thinner than the zirconium oxide ZrO2and the titanium oxide TiO2. The aluminum oxide Al2O3may be extremely thin. The thickness of the aluminum oxide Al2O3may be 0.1 nm to 0.2 nm.

Next, a thermal process TRT may be performed. Since the aluminum oxide Al2O3is extremely thin, inter-diffusion ID may occur between the zirconium oxide ZrO2and the titanium oxide TiO2through the thermal process TRT. Accordingly, a titanium-doped zirconium aluminum oxide (Ti-doped ZrAlO) may be formed.

As another example of the method for forming the second high-k layer HK2, the base high-k material layer HBL may be deposited by the ALD so as to contain the dopant material HD and the leakage blocking material HL. In this case, the concentrations of the dopant material HD, the leakage blocking material HL and the base high-k material HB may be uniform or may be the same as those shown inFIG. 10A.

As an example of the method for forming the second high-k layer HK2as shown inFIG. 10C, a first base high-k material layer, a second base high-k material layer and a third base high-k material layer may be sequentially deposited by the ALD. The second base high-k material layer may be extremely thin. Each of the first base high-k material layer, the second base high-k material layer and the third base high-k material layer may contain the dopant material HD and the leakage blocking material HL. The first base high-k material layer may have a dopant-poor concentration, and the third base high-k material layer may have a dopant-rich concentration. The concentration of the dopant material HD may be graded to increase from the first base high-k material layer to the third base high-k material layer. The second base high-k material layer may have the highest concentration of the leakage blocking material HL. The second base high-k material layer may be thinner than the first and third base high-k material layers. The first base high-k material layer may have the highest concentration of the base high-k material HB. The concentration of the base high-k material HB may be graded to decrease from the first base high-k material layer to the third base high-k material layer.

FIGS. 12A and 12Bare cross-sectional views illustrating application examples of the semiconductor device100M shown inFIG. 9A.

Referring toFIG. 12A, the semiconductor device100M may include a capacitor C43. The capacitor C43may correspond to the semiconductor layer stack110M shown inFIG. 9A.

The capacitor C43may include a bottom electrode201, a dielectric layer202M, and a top electrode203. The capacitor C43may further include an interface control layer204M formed between the dielectric layer202M and the top electrode203. The stacked structure of the dielectric layer202M and the interface control layer204M may be a dielectric layer stack DE61.

Each of the bottom electrode201and the top electrode203may include a titanium nitride TiN. In some embodiments, the bottom electrode201and the top electrode203may include a conductive metal oxide, a metal nitride, a metal or any combinations thereof.

The dielectric layer202M may be formed by sequentially stacking a zirconium oxide221and an aluminum oxide222. In other words, the dielectric layer202M may include a ZA (ZrO2/Al2O3) structure. The aluminum oxide222may be thinner than the zirconium oxide221. The dielectric layer202M may correspond to the first high-k layer HK1shown inFIG. 9A.

The interface control layer204M may be formed by sequentially stacking a titanium-doped zirconium oxide223and an aluminum oxide224. The aluminum oxide224may be thinner than the titanium-doped zirconium oxide223. The titanium-doped zirconium oxide223may correspond to the second high-k layer HK2shown inFIG. 9A. The aluminum oxide224may correspond to the high bandgap layer HBG shown inFIG. 9A. A zirconium oxide of the titanium-doped zirconium oxide223may correspond to the base high-k material HB, and titanium of the titanium-doped zirconium oxide223may correspond to the dopant material HD.

The dielectric layer stack DE61may be formed by sequentially stacking the zirconium oxide221, the aluminum oxide222, the titanium-doped zirconium oxide223and the aluminum oxide224.

The titanium-doped zirconium oxide223may have the dopant concentration as illustrated inFIG. 10B. For example, the titanium-doped zirconium oxide223may include a titanium-rich doped portion223R and a titanium-poor doped portion223P. The titanium-rich doped portion223R may be in contact with the aluminum oxide224, and the titanium-poor doped portion223P may be in contact with the aluminum oxide222. The titanium-rich doped portion223R may be a titanium-rich doped zirconium oxide. The titanium-poor doped portion223P may be a titanium-poor doped zirconium oxide.

The titanium-doped zirconium oxide223may be formed by intermixing a zirconium oxide and a titanium oxide. As another example, the titanium-doped zirconium oxide223may be formed by doping titanium during deposition of a zirconium oxide.

Referring toFIG. 12B, the remaining configurations of a capacitor C44except for an interface control layer204M′ may be the same as those of the capacitor C43shown inFIG. 12A.

The interface control layer204M′ may be formed by sequentially stacking a titanium-doped zirconium aluminum oxide223′ and an aluminum oxide224. The aluminum oxide224may be thinner than the titanium-doped zirconium aluminum oxide223′. The titanium-doped zirconium aluminum oxide223′ may correspond to the second high-k layer HK2shown inFIG. 9A. The aluminum oxide224may correspond to the high bandgap layer HBG shown inFIG. 9A. A zirconium oxide of the titanium-doped zirconium aluminum oxide223′ may correspond to the base high-k material HB, titanium of the titanium-doped zirconium aluminum oxide223′ may correspond to the dopant material HD, and aluminum of the titanium-doped zirconium aluminum oxide223′ may correspond to the leakage blocking material HL.

A dielectric layer stack DE62may be formed by sequentially stacking a zirconium oxide221, an aluminum oxide222, the titanium-doped zirconium aluminum oxide223′ and the aluminum oxide224.

The titanium-doped zirconium aluminum oxide223′ may have any one of the dopant concentrations illustrated inFIGS. 10A and 10C. For example, the titanium-doped zirconium aluminum oxide223′ may include a titanium-rich doped portion223R′ and a titanium-poor doped portion223P′. The titanium-rich doped portion223R′ may be in contact with the aluminum oxide224, and the titanium-poor doped portion223P′ may be in contact with the aluminum oxide222. The titanium-rich doped portion223R′ may be a titanium-rich doped zirconium aluminum oxide. The titanium-poor doped portion223P′ may be a titanium-poor doped zirconium aluminum oxide.

The titanium-doped zirconium aluminum oxide223′ may be formed by intermixing a zirconium oxide, an aluminum oxide and a titanium oxide. As another example, the titanium-doped zirconium aluminum oxide223′ may be formed by doping titanium and aluminum during deposition of a zirconium oxide.

FIGS. 13A to 13Dare cross-sectional views illustrating various modified examples of the interface control layer ICL5shown inFIG. 9A.

Referring toFIG. 13A, an interface control layer220M may include a stacked layer of a titanium-doped hafnium oxide225and an aluminum oxide224.

Referring toFIG. 13B, an interface control layer220M′ may include a stacked layer of a titanium-doped hafnium aluminum oxide225′ and an aluminum oxide224.

Referring toFIG. 13C, an interface control layer230M may include a stacked layer of a titanium-doped hafnium oxide225and a silicon oxide226.

Referring toFIG. 13D, an interface control layer230M′ may include a stacked layer of a titanium-doped hafnium aluminum oxide225′ and a silicon oxide226.

InFIGS. 13A to 13D, the titanium-doped hafnium oxide225and the titanium-doped hafnium aluminum oxide225′ may correspond to the second high-k layer HK2shown inFIG. 9A. The aluminum oxide224and the silicon oxide226may correspond to the high bandgap layer HBG shown inFIG. 9A.

FIGS. 14A to 14Dare cross-sectional views illustrating various modified examples of the interface control layer ICL51shown inFIG. 9B.

Referring toFIG. 14A, an interface control layer240M may include a stacked layer of a titanium-doped zirconium oxide223, an aluminum oxide224and a titanium aluminum nitride227.

Referring toFIG. 14B, an interface control layer240M′ may include a stacked layer of a titanium-doped zirconium aluminum oxide223′, an aluminum oxide224and a titanium aluminum nitride227.

Referring toFIG. 14C, an interface control layer250M may include a stacked layer of a titanium-doped zirconium oxide223, a silicon oxide226and a titanium silicon nitride228.

Referring toFIG. 14D, an interface control layer250M′ may include a stacked layer of a titanium-doped zirconium aluminum oxide223′, a silicon oxide226and a titanium silicon nitride228.

InFIGS. 14A to 14D, the titanium-doped zirconium oxide223and the titanium-doped zirconium aluminum oxide223′ may correspond to the second high-k layer HK2shown inFIG. 9B. The aluminum oxide224and the silicon oxide226may correspond to the high bandgap layer HBG shown inFIG. 9B. The titanium aluminum nitride227and the titanium silicon nitride228may correspond to the high work function layer HWF shown inFIG. 9B.

FIGS. 15A to 15Dare cross-sectional views illustrating various modified examples of the interface control layer ICL51shown inFIG. 9B.

Referring toFIG. 15A, an interface control layer260M may include a stacked layer of a titanium-doped hafnium oxide225, an aluminum oxide224and a titanium aluminum nitride227.

Referring toFIG. 15B, an interface control layer260M′ may include a stacked layer of a titanium-doped hafnium aluminum oxide225′, an aluminum oxide224and a titanium aluminum nitride227.

Referring toFIG. 15C, an interface control layer270M may include a stacked layer of a titanium-doped hafnium oxide225, a silicon oxide226and a titanium silicon nitride228.

Referring toFIG. 15D, an interface control layer270M′ may include a stacked layer of a titanium-doped hafnium aluminum oxide225′, a silicon oxide226and a titanium silicon nitride228.

InFIGS. 15A to 15D, the titanium-doped hafnium oxide225and the titanium-doped hafnium aluminum oxide225′ may correspond to the second high-k layer HK2shown inFIG. 9B. The aluminum oxide224and the silicon oxide226may correspond to the high bandgap layer HBG shown inFIG. 9B. The titanium aluminum nitride227and the titanium silicon nitride228may correspond to the high work function layer HWF shown inFIG. 9B.

FIGS. 16A and 16Bare cross-sectional views illustrating application examples of a capacitor300.

Referring toFIG. 16A, the capacitor300may include a bottom electrode301, a dielectric layer302, and a top electrode303. The capacitor300may further include an interface control layer304between the dielectric layer302and the top electrode303. The dielectric layer302and a portion of the interface control layer304may be a dielectric layer stack309.

Each of the bottom electrode301and the top electrode303may include a titanium nitride (TiN). In some embodiments, the bottom electrode301and the top electrode303may include a conductive metal oxide, a metal nitride, a metal or any combinations thereof.

The dielectric layer302may include an HSH (HfO2/SiO2/HfO2) structure in which a hafnium oxide302A, a silicon oxide302B and a hafnium oxide302C are sequentially stacked. The silicon oxide302B may be thinner than the hafnium oxides302A and302C.

The interface control layer304may include an STS (SiO2/TiO2/SiO2) in which a silicon oxide305, a titanium oxide306and a silicon oxide307are sequentially stacked. The silicon oxides305and307may be thinner than the titanium oxide306. The silicon oxide305may correspond to the leakage blocking layer HLK. The titanium oxide306may correspond to the dopant-containing layer HKD. The silicon oxide307may correspond to the high bandgap layer HBG.

The interface control layer304may further include a titanium silicon nitride (TiSiN)308between the silicon oxide307and the top electrode303. The titanium silicon nitride308may correspond to the high work function layer HWF. The titanium silicon nitride308may be formed by intermixing the silicon oxide307and the top electrode303.

The stacked structure in which the hafnium oxide302A, the silicon oxide302B, the hafnium oxide302C, the silicon oxide305, the titanium oxide306and the silicon oxide307are sequentially stacked may be a HSHSTS (HfO2/SiO2/HfO2/SiO2/TiO2/SiO2) structure.

In some embodiments, since the silicon oxide305, which is thin, is disposed between the titanium oxide306and the hafnium oxide302C, the titanium oxide306, the hafnium oxide302C and the silicon oxide305may be intermixed. For example, titanium of the titanium oxide306may be diffused into the hafnium oxide302C and the silicon oxide305. The titanium oxide306, the hafnium oxide302C and the silicon oxide305may be intermixed to form a titanium-doped hafnium silicon oxide (Ti-doped HfSiO)300HKI. The titanium-doped hafnium silicon oxide300HKI may have a higher dielectric constant than the hafnium oxide302C. The doping amount of the titanium may be controlled by the thickness of the titanium oxide306. The titanium-doped hafnium silicon oxide300HKI may correspond to the second high-k layer HK2shown inFIG. 9A. The hafnium oxide302A and the silicon oxide302B may correspond to the first high-k layer HK1shown inFIG. 9A.

Referring toFIG. 16B, a capacitor310may include a dielectric layer HK and an interface control layer304′. The dielectric layer HK may include a first high-k layer HK1and a second high-k layer HK2. The interface control layer304′ may include a silicon oxide307and a titanium silicon nitride308, and may further include the second high-k layer HK2. The second high-k layer HK2may be a portion of the dielectric layer HK and a portion of the interface control layer304′.

The first high-k layer HK1may include the stacked structure of a hafnium oxide302A and a silicon oxide302B. The second high-k layer HK2may include a titanium-doped hafnium silicon oxide (Ti-doped HfSiO). The titanium-doped hafnium silicon oxide may include a titanium-rich doped portion311R and a titanium-poor doped portion311P. The titanium-rich doped portion311R may be in contact with the silicon oxide307, and the titanium-poor doped portion311P may be in contact with the silicon oxide302B. The titanium-rich doped portion311R may be a titanium-rich doped hafnium silicon oxide. The titanium-poor doped portion311P may be a titanium-poor doped hafnium silicon oxide.

In Table 1, ‘TiO2cycle’ refers to the number of TiO2ALD cycles, and ‘Al2O3cycle’ refers to the number of Al2O3ALD cycles. ‘Cs’ refers to entire capacitance. ‘pLKG’ and ‘nLKG’ refer to a positive bias leakage current density and a negative bias leakage current density, respectively. ‘pBV’ and ‘nBV’ refer to a positive bias breakdown voltage and a negative bias breakdown voltage, respectively.

Referring to Table 1, in case of the ZAZAT2A stack in which the thickness of the titanium oxide is increased, it may be seen that the equivalent oxide layer thickness (EOT) and the leakage currents (LKG) are decreased.

As a comparative example, in case of the ZAZAA stack in which the titanium oxide is omitted, it may be seen that the equivalent oxide layer thickness (EOT), the leakage currents (LKG) and the breakdown voltages (BV) deteriorate.

In case of the ZAZAT, ZAZAT1A and ZAZAT2A stacks in which the titanium oxide is formed, it may be seen that the entire capacitance is relatively further increased in comparison with the ZAZAA stack.

FIGS. 17A and 17Bare graphs for describing an effect of improving electrical characteristics of the dielectric layer stack.FIG. 17Ais a graph of the breakdown voltage pBV against the equivalent oxide layer thickness (EOT).FIG. 17Bis a graph of the leakage current pLKG against the equivalent oxide layer thickness (EOT).

Referring toFIGS. 17A and 17B, the ZAZATA stack has excellent characteristics in terms of the breakdown voltages BV and the leakage currents LKG as well as the equivalent oxide layer thickness (EOT). Quantitatively, it is possible to decrease the equivalent oxide layer thickness (EOT) by approximately 0.5 Å at the same breakdown voltage (pBV) in comparison with the ZAZAT stack. Quantitatively, it is possible to decrease the equivalent oxide layer thickness (EOT) by approximately 0.42 Å at the same leakage current (pLKG) in comparison with the ZAZAT stack.

FIGS. 18A to 18Eare cross-sectional views illustrating a method for fabricating a semiconductor device in accordance with an embodiment.

As shown inFIG. 18A, a dielectric layer12may be formed on a bottom electrode11. The bottom electrode11may include a metal, a metal nitride, a conductive metal oxide or any combinations thereof. The bottom electrode11may include titanium (Ti), a titanium nitride (TiN), a tantalum nitride (TaN), tungsten (W), a tungsten nitride (WN), ruthenium (Ru), iridium (Ir), a ruthenium oxide, an iridium oxide or any combinations thereof. According to an embodiment, the bottom electrode11may include a titanium nitride (TiN). The bottom electrode11may be formed by Atomic Layer Deposition (ALD). Accordingly, the bottom electrode11may include an ALD TiN. The ALD TiN may be deposited by using a titanium-source material and a nitrogen-source material. The titanium-source material may include TiCl4, and the nitrogen-source material may include NH3.

The dielectric layer12may include a zirconium oxide-based layer. The dielectric layer12may include a zirconium oxide. The dielectric layer12may include a ZA stack of a zirconium oxide and an aluminum oxide or a ZAZ stack of a zirconium oxide, an aluminum oxide and a zirconium oxide. The dielectric layer12may be formed by ALD.

As shown inFIG. 18B, a leakage blocking layer13may be formed on the dielectric layer12. The leakage blocking layer13may include an aluminum oxide (Al2O3). The leakage blocking layer13may be thin. The thickness of the leakage blocking layer13may be 0.1 nm to 0.2 nm. The leakage blocking layer13may be formed by ALD.

As shown inFIG. 18C, a dopant-containing layer14may be formed on the leakage blocking layer13. The dopant-containing layer14may include a titanium oxide (TiO2). The dopant-containing layer14may be formed by ALD.

Although not illustrated, a thermal process may be performed after the dopant-containing layer14is formed. Through the thermal process, the dopant-containing layer14, the leakage blocking layer13and a portion of the dielectric layer12in contact with the leakage blocking layer13may be intermixed to form an intermixed compound. The intermixed compound may have a higher dielectric constant than the dielectric layer12. The intermixed compound having a high dielectric constant may include a compound of a zirconium oxide and an aluminum oxide, and may further include a titanium oxide as a dopant.

As shown inFIG. 18D, a reduction preventing layer15may be formed on the dopant-containing layer14. The reduction preventing layer15may include a reduction preventing material. The reduction preventing layer15may include a high bandgap material. The reduction preventing layer15may include an aluminum oxide (Al2O3) or a silicon oxide (SiO2). The thickness of the reduction preventing layer may be 0.1 nm to 0.2 nm. The reduction preventing layer15may be formed by ALD. The reduction preventing layer15may correspond to the high bandgap material HBG described above according to embodiments.

The reduction preventing layer15and the leakage blocking layer13may be the same material. The leakage blocking layer13may include a high bandgap material.

As shown inFIG. 18E, a top electrode16may be formed on the reduction preventing layer15. The top electrode16may include a metal, a metal nitride, a conductive metal oxide or any combinations thereof. The top electrode16may include titanium (Ti), a titanium nitride (TiN), a tantalum nitride (TaN), tungsten (W), a tungsten nitride (WN), ruthenium (Ru), iridium (Ir), a ruthenium oxide, an iridium oxide or any combinations thereof. According to an embodiment, the top electrode16may include a titanium nitride. The top electrode16may be formed by ALD. Accordingly, the top electrode16may include an ALD TiN. The ALD TiN may be deposited by using a titanium-source material and a nitrogen-source material. The titanium-source material may include TiCl4, and the nitrogen-source material may include NH3.

While the top electrode16is formed, the dopant-containing layer14and the dielectric layer12may be reduced by NH3which is the nitrogen-source material. According to an embodiment, since the reduction preventing layer15is formed before the top electrode16is formed, the reductions of the dopant-containing layer14and the dielectric layer12may be prevented.

While the top electrode16is formed, a surface of the reduction preventing layer15and the top electrode16may be intermixed. Accordingly, a high work function layer17may be formed thin at an interface between the top electrode16and the reduction preventing layer15. When the top electrode16includes a titanium nitride and the reduction preventing layer15includes an aluminum oxide, the high work function layer17may include a titanium aluminum nitride (TiAlN). In some embodiments, when the top electrode16includes a titanium nitride and the reduction preventing layer15include a silicon oxide, the high work function layer17may include a titanium silicon nitride (TiSiN).

FIGS. 19A to 19Care cross-sectional views illustrating a memory cell400.FIG. 19Bis a cross-sectional view of the memory cell400taken along a line A-A′ shown inFIG. 19A.FIG. 19Cis a cross-sectional view of the memory cell400taken along a line B-B′ shown inFIG. 19A.

The memory cell400may include a cell transistor including a buried word line408, a bit line414, and a capacitor C31. The capacitor C31may include the capacitor C31shown inFIG. 8A.

The memory cell400is described in detail.

An isolation layer403and an active region404may be formed in a substrate401. A plurality of active regions404may be defined by the isolation layer403. The substrate401may be formed of or include a material that is suitable for semiconductor processing. The substrate401may include a semiconductor substrate. The substrate401may be formed of a material containing silicon. The substrate401may include silicon, monocrystalline silicon, polysilicon, amorphous silicon, silicon germanium, monocrystalline silicon germanium, polycrystalline silicon germanium, carbon-doped silicon, any combinations thereof or multi-layers of them. The substrate401may include another semiconductor material, such as germanium. The substrate401may include an III/V-group semiconductor substrate, for example, a chemical compound semiconductor substrate such as a gallium arsenide (GaAs). The substrate401may include a Silicon-On-Insulator (SOI) substrate. The isolation layer403may be formed in an isolation trench402through a Shallow Trench Isolation (STI) process.

A word line trench406may be formed in the substrate401. The word line trench406may be referred to as a gate trench. A gate dielectric layer407may be formed on the surface of the word line trench406. A buried word line408which fills a portion of the word line trench406may be formed on the gate dielectric layer407. The buried word line408may be referred to as a buried gate electrode. A word line capping layer409may be formed on the buried word line408. The top surface of the buried word line408may be lower than the top surface of the substrate401. The buried word line408may be a low-resistivity metal material. The buried word line408may be formed by sequentially stacking a titanium nitride and tungsten. In some embodiments, the buried word line408may be formed of a titanium nitride (TiN) only.

A first impurity region410and a second impurity region411may be formed in the substrate401. The first and second impurity regions410and411may be spaced apart from each other by the word line trench406. The first and second impurity regions410and411may be referred to as first and second source/drain regions, respectively. The first and second impurity regions410and411may include an N-type impurity, such as arsenic (As) and phosphorus (P). Consequently, the buried word line408and the first and second impurity regions410and411may become a cell transistor. The cell transistor may improve a short-channel effect due to the presence of the buried word line408.

A bit line contact plug413may be formed on the substrate401. The bit line contact plug413may be coupled to the first impurity region410. The bit line contact plug413may be positioned inside a bit line contact hole412. The bit line contact hole412may be formed in a hard mask layer405. The hard mask layer405may be formed on the substrate401. The bit line contact hole412may expose the first impurity region410. The bottom surface of the bit line contact plug413may be lower than the top surface of the substrate401. The bit line contact plug413may be formed of polysilicon or a metal material. A portion of the bit line contact plug413may have a narrower line width than the diameter of the bit line contact hole412. The bit line414may be formed on the bit line contact plug413. A bit line hard mask415may be formed on the bit line414. The stacked structure of the bit line414and the bit line hard mask415may be referred to as a bit line structure BL. The bit line414may have a linear shape that is extended in a direction crossing the buried word line408. A portion of the bit line414may be coupled to the bit line contact plug413. The bit line414may include a metal material. The bit line hard mask415may include a dielectric material.

A bit line spacer416may be formed on the sidewall of the bit line structure BL. The bottom portion of the bit line spacer416may be extended to be formed on both sidewalls of the bit line contact plug413. The bit line spacer416may include a silicon oxide, a silicon nitride or a combination thereof. In some embodiments, the bit line spacer416may include an air gap. For example, the bit line spacer416may have a nitride-air gap-nitride (NAN) structure in which the air gap is located between silicon nitrides.

A storage node contact plug SNC may be formed between the neighboring bit line structures BL. The storage node contact plug SNC may be formed in a storage node contact hole418. The storage node contact hole418may have a high aspect ratio. The storage node contact plug SNC may be coupled to the second impurity region411. The storage node contact plug SNC may include a bottom plug419and a top plug421. The storage node contact plug SNC may further include an ohmic contact layer420between the bottom plug419and the top plug421. The ohmic contact layer420may include a metal silicide. The top plug421may include a metal material, and the bottom plug419may include a silicon-containing material.

From a perspective view in parallel with the bit line structure BL, a plug isolation layer417may be formed between the neighboring storage node contact plugs SNC. The plug isolation layer417may be formed between the neighboring bit line structures BL, and may provide the storage node contact hole418along with the hard mask layer405.

The capacitor C31may be formed on the top plug421. In some embodiments, the capacitor C31of the memory cell400may be replaced by any one of the capacitors described above according to embodiments.

FIGS. 20A to 20Fare cross-sectional views illustrating application examples of the capacitor C31.

Referring toFIG. 20A, a capacitor511may include a bottom electrode501, a dielectric layer502, an interface control layer504, and a top electrode503. The bottom electrode501may be of a cylinder shape. The dielectric layer502may be formed on the bottom electrode501, and the interface control layer504may be formed on the dielectric layer502. The top electrode503may be formed on the interface control layer504. The interface control layer504may correspond to any one of the interface control layers described above according to embodiments.

Hereinafter, detailed descriptions of the components and configurations of capacitors512to516that are the same as or similar to those of the capacitor511shown inFIG. 20Aare omitted.

Referring toFIG. 20B, the capacitor512may include a bottom electrode501of a cylinder shape, a dielectric layer502, an interface control layer504, and a top electrode503. The capacitor512may further include a supporter505. A supporter505is a structure supporting an outer wall of the bottom electrode501. The supporter505may include a silicon nitride.

Referring toFIGS. 20C and 20D, each of the capacitors513and514may include a bottom electrode501P of a pillar shape, a dielectric layer502, an interface control layer504, and a top electrode503. The capacitor514shown inFIG. 20Dmay further include a supporter505.

Referring toFIGS. 20E and 20F, each of the capacitors515and516may include a bottom electrode501L of a pylinder shape (combination of pillar and cylinder), a dielectric layer502, an interface control layer504, and a top electrode503. The capacitor516shown inFIG. 20Fmay further include a supporter505. The bottom electrode501L may include a bottom region and a top region. The bottom region of the bottom electrode501L may be of a pillar shape, and the top region of the bottom electrode501L may be of a cylinder shape. A hybrid structure of the pillar shape and the cylinder shape may be referred to as the pylinder shape.

As described above, the interface control layer504including the leakage blocking material, the dopant material, the high bandgap material and the high work function material may be formed in the process of forming the capacitors511to516, thereby increasing the dielectric constant of the dielectric layer502, reducing the equivalent oxide layer thickness of the dielectric layer502and preventing the leakage. Accordingly, a high-integrated dynamic random-access memory (DRAM) whose refresh characteristics and reliability are improved may be fabricated.

The semiconductor device in accordance with embodiments is not limited to the DRAM but may be applied to a memory such as a static random-access memory (SRAM), a flash memory, a ferroelectric random-access memory (FeRAM), a magnetic random-access memory (MRAM) and a phase change random access memory (PRAM).

According to the embodiments, a reduction preventing material may be formed between a dielectric layer and a conductive layer, thereby suppressing oxygen loss of the dielectric layer.

According to the embodiments, a high bandgap material and a high work function material may be formed between a dielectric layer and a conductive layer, thereby reducing a leakage.

According to the embodiments, a dopant material may be formed between a dielectric layer and a conductive layer, thereby increasing the dielectric constant of the dielectric layer.

According to the embodiments, an interface control layer including a leakage blocking material, a dopant material, a high bandgap material and a high work function material may be formed in the process of forming a capacitor, thereby increasing the dielectric constant of a dielectric layer, reducing the equivalent oxide layer thickness of the dielectric layer and preventing a leakage.

While the present disclosure has been described with respect to the specific embodiments, it should be noted that the embodiments are for describing, not limiting, the present disclosure. Further, it should be noted that the present disclosure may be achieved in various ways through substitution, change, and modification, by those skilled in the art without departing from the scope of the present invention as defined by the following claims.