Method for sharing a resource and circuit making use of same

A method is provided for interfacing a plurality of processing components with a shared resource component. A token signal path is provided to allow propagation of a token through the processing components, wherein possession of the token by a given processing component enables the latter to conduct a transaction with the shared resource component. Token processing logic is also provided for propagating the token from one processing component to another along the token signal path, the propagating being done at a propagation rate that is related to a transaction rate associated with the shared resource component. A circuit comprising a plurality of processing components and a shared resource component is provided wherein the plurality processing components and the shared resource components are interfaced with one another using the method proposed.

FIELD OF THE INVENTION

The present invention relates generally to the field of semiconductors, and, more specifically, to a method for use in IC, ASIC, FPGA designs for sharing self-timed resources between processing modules.

BACKGROUND

Asynchronous systems—much like object-oriented software—are typically constructed out of modular ‘hardware objects’, each with well-defined communication interfaces. For example, in the design of processing cores, it is often common to combine several processing components and to interface these components with shared resources. Examples of the type of resources that can be shared between processing components include for example instruction (cache) memory, data (cache) memory and advanced computation components (e.g. floating point computation units). The interfacing between modules creates challenges in the sense that setup and hold violation, metastability and unreliable data transfers may occur since the components of the system are independently designed.

A first approach for interfacing components is commonly referred to as the handshaking protocol. A simple channel used to perform handshaking between two components typically consists of two wires: a request wire and an acknowledge wire. Different variations of the handshaking approach have been suggested, all requiring some type of exchange of request and acknowledgement messages between the components being interfaced in order to complete a transaction between these components. Handshaking approaches are well-known in the art and as such will not be described in further detail here.

A deficiency with the use of handshaking approaches for synchronization purposes is that they incur delays over and above the time required to complete a transaction between two components.

A second approach for interfacing systems is the use of an asynchronous first-in-first-out (FIFO) approach. FIFOs are used commonly in electronic circuits for buffering and flow control. In hardware form, a FIFO primarily consists of a set of read and write pointers, storage and control logic. Storage may be SRAM, flip-flops, latches or any other suitable form of storage. An asynchronous FIFO has two interfaces, one for writing the data into the FIFO and the other for reading the data out and makes use of different signals for reading and writing. Asynchronous FIFO approaches are well-known in the art and as such will not be describe in further detail here.

A deficiency with the use of asynchronous FIFO approaches for synchronization purposes is that they require significant additional system resources for both the implementation of the FIFO itself as well as for the various control signals used for reading from and writing to the FIFO and to indicate the full/empty state of the FIFO.

Difficulties associated with interfacing components using either a handshaking approach or a FIFO approach are compounded in circumstance where “resource” components (or “slave” components) are shared amongst several “processing” components (or “master” components).

In the context of the above, there is a need to provide a method and associated circuit for interfacing components that alleviates at least in part problems associated with existing approaches.

SUMMARY

In accordance with a broad aspect, the invention provides a method for interfacing a plurality of processing components with a shared resource component. The method comprises providing a token signal path to allow propagation of a token through the processing components in the plurality of processing components, wherein possession of the token by a given processing component enables the given processing component to conduct a transaction with the shared resource component. The method also comprises propagating the token from one processing component to another processing component along the token signal path, the propagating being done at a propagation rate that is related to a transaction rate associated with the shared resource component.

In a specific example, the transaction rate is a transaction acceptance rate associated with the resource component, the transaction acceptance rate being indicative of a rate at which the resource component can accept transaction requests.

In another specific example, the transaction rate is a transaction completion rate associated with the resource component. The transaction completion rate may be indicative of a rate at which the resource component can complete a transaction specified in the transaction request originating from a processing component or, alternatively, may be indicative of a rate at which the resource component can issue a reply to a transaction request originating from a processing component.

In a non-limiting example of implementation, the shared resource component has a resource interface, which operates in accordance with a resource clock having a resource clock frequency, and the processing components conducts transactions with the shared resource component via the resource interface. In such an implementation, the transaction rate of the shared resource component is related to the rate of the resource clock frequency.

In a specific example of implementation, the shared resource component may be any suitable component, including, without being limited to, an instruction (cache) memory, a data (cache) memory and an advanced computation component.

In a specific example of implementation, the lack of possession of the token by the given processing component prevents the given processing component from conducting a transaction with the shared resource component. In addition, only one processing component in the plurality of processing components may posses the token at any given time. In this manner, the token allows preventing more than one processing component from conducting a transaction with the resource component at a given time.

In accordance with a first specific example of implementation, the propagation rate of the token from the one processing component to another processing component is at most equal to the transaction rate associated with the shared resource component.

Advantageously, by propagating the token at a rate no faster than the transaction rate associated with the shared resource component, the token serves the dual purpose of granting access to the resource and of synchronizing the communication between the processing components and the resource component.

In accordance with a second specific example of implementation, propagating the token from the one processing component to another processing component along the token signal path comprises:i. determining if the one processing component desires a transaction with the shared resource component;ii. if the one processing component desires a transaction with the shared resource component:(a) retaining the token while the processing component initiates the transaction with the shared resource component; and(b) after a transaction delay time has elapsed, releasing the token so that it is propagated along the token signal path to another processing component, wherein the transaction delay time is related to the transaction rate associated with the shared resource component;iii. if the one processing component desires no transaction with the shared resource component, releasing the token so that it is propagated along the token signal path to another processing component.

In particular, according to the second specific example of implementation, if the processing component holding the token does not need to use the shared resource component, the token can be passed along the token signal path without having to wait for the transaction delay time to elapse thereby improving the efficiency of use of the resource component. In other words, if the processing component holding the token does not need to use the shared resource component, the token can be propagated with no or with minimal delay.

Advantageously, in this second specific example of implementation, the token continues to serve the dual purpose of granting access to the resource and of synchronizing the communication between the processing component and the resource component. However, this implementation reduces delays associated with propagating the token along the token signal path when the resource component is not needed by the one processing component.

In specific examples of implementation, the duration of the transaction delay time may be pre-determined or variable. For example, the transaction delay time may be dependent upon the specific type of transaction being conducted between the processing component and the shared resource.

In a specific example of implementation, propagating the token from one processing component to another processing component along the token signal path includes causing a signal transition on a portion of the token signal path between the one processing component and another processing component. The signal transition may be a transition from a LOW to a HI signal (rising edge) or a HI to LOW signal (falling edge). Alternatively, the signal transition may be a clock pulse.

In accordance with another broad aspect, the invention provides a circuit comprising a plurality of processing components, a resource component shared between the plurality of processing components, a token signal path and token processing logic. The token signal path allows propagation of a token through the processing components in the plurality of processing components, wherein possession of the token by a given processing component enables the given processing component to conduct a transaction with the shared resource component. The token processing logic is for propagating the token from one processing component to another processing component along the token signal path, the propagating being done at a propagation rate that is related to a transaction rate associated with the shared resource component.

In accordance with a first specific example of implementation, the token processing logic propagates the token from the one processing component to another processing component at a propagation rate that is at most equal to the transaction rate associated with the shared resource component.

Advantageously, by propagating the token at a rate no faster than the transaction rate associated with the shared resource component, the token serves the dual purpose of granting access to the resource and of synchronizing the communication between the processing components and the resource component.

In accordance with a second specific example of implementation, the token processing logic propagates the token from the one processing component to another processing component along the token signal path by:i. determining if the one processing component desires a transaction with the shared resource component;ii. if the one processing component desires a transaction with the shared resource component, the token processing logic:(a) retains the token while the processing component initiates the transaction with the shared resource component; and(b) after a transaction delay time has elapsed, releases the token so that it is propagated along the token signal path to another processing component, wherein the transaction delay time is related to the transaction rate associated with the shared resource component;iii. if the one processing component desires no transaction with the shared resource component, the token processing logic releases the token so that it is propagated along the token signal path to another processing component.

Advantageously, in this second specific example of implementation, the token continues to serve the dual purpose of granting access to the resource and of synchronizing the communication between the processing component and the resource component. However, this implementation reduces delays associated with propagating the token along the token signal path when the resource component is not needed by the one processing component.

In a specific example of implementation, the token processing logic propagates the token from the one processing component to another processing component by causing a signal transition on a portion of the token signal path between the one processing component and another processing component. The signal transition may be a transition from a LOW to a HI signal (rising edge) or a HI to LOW signal (falling edge). Alternatively, the transition may be a pulse.

It is to be appreciated that, in specific implementations, there may be multiple resource components shared by multiple processing components, where each resource component may be associated with a respective token and token signal path. In such specific implementations, the token signal paths and tokens may be independent of one another.

These and other aspects and features of the present invention will now become apparent to those of ordinary skill in the art upon review of the following description of specific embodiments of the invention in conjunction with the accompanying drawings.

DETAILED DESCRIPTION

Examples of implementations will now be described with reference to the figures. For the purpose of simplicity, components and processes not necessary to convey the principles of the invention have been omitted from the figures. The person skilled in the art will readily appreciate that practical implementations making use of the concepts presented in the present description will include several other components and implement several other processes and that the inclusion of such components and processes in variants of the invention does not detract from its spirit. Since such components and processes are not necessary for the understanding of the present invention, they will not be described in further detail in the present document.

With reference toFIG. 1, there is shown a block diagram of a circuit300in accordance with a specific example of implementation of the present invention. As depicted, the circuit300includes a plurality of processing components302A-D and at least one resource component308shared between the processing components302A-D. The circuit300also includes a token signal path310and token processing logic (not shown inFIG. 1).

The resource component308includes a resource interface312. The resource component308may be designed as an asynchronous circuit or may operate according to a resource clock having a resource clock frequency. The resource component308includes the required circuitry for conducting transactions with other components in circuit300including transactions with processing components302A-D. In a specific example of implementation, the resource interface312includes the required circuitry for receiving transaction requests originating from processing components302A-D and transmitted over data paths350A-D. The rate at which the resource interface312can accept the transaction requests, herein referred to as the transaction acceptance rate associated with the resource component, is generally directed by the resource component's maximum frequency of access. More specifically, there is an upper limit for the rate at which the resource interface312can accept signals at resource interface312without causing corruption in the data paths internal to the resource component308. Manners in which a component's maximum frequency of access can be determined are well know in the art and as such will not be described further here. When appropriate, the resource component308includes the required circuitry for transmitting signals directed to the processing components302A-D either over data paths350A-D or over alternate return data paths (not shown in the figures). Amongst other, the signals directed to the processing components302A-D may be generated in reply to transaction requests received at the resource interface312.

In specific embodiments of the invention, different types of transactions may be contemplated between the processing components302A-D and the shared resource component308.

A first type of transaction includes transmission of a transaction request originating from one of processing components302A-D and directed to the shared resource component308, wherein the transaction request does not require the generation of a reply by the shared resource component308in response to the transaction request. A transaction request may include, without being limited to, a transmission of an instruction and/or data to the resource component308. In a non-limiting example, in a situation where the shared resource component308is a memory module, a transaction of the type described may be a “DATA WRITE” request whereby no reply to the request is expected by the processing component. For this first type of transaction, the transaction may be considered as being complete when the shared resource component308has received the transaction request even though the shared resource component308may continue the execution of the function after reception of the transaction request. In such a case, the transaction completion rate is substantially the same as the transaction acceptance rate associated with the resource component308. In alternative embodiments, the transaction may be considered as being complete when the shared resource component308has completed the execution of the function requested by the transaction request.

A second type of transaction includes the transmission of a transaction request from one of processing components302A-D to the shared resource component308, wherein the transaction request requires the generation of a reply by the shared resource component308in response to the transaction request. In a non-limiting example, in a situation where the shared resource component308is a memory module, a transaction of the type described may be a “DATA READ” request whereby a reply to the request in the form of a transmission of data is expected by the processing component. For this second type of transaction, the transaction may be considered as being complete when either the shared resource component issues the reply in response to the transaction request or, alternatively, when the processing component that originated the transaction request receives the reply. It is to be appreciated that the delay between reception of a transaction request and release of a reply may depend on the circuitry of the resource component308and may vary from one transaction to the next and may therefore depend on the specific transaction requested by the transaction request sent from one of processing components302A-D.

A third type of transaction includes multiple signal exchanges between one of processing components302A-D and the resource component308. For this third type of transaction, the transaction may be considered as being complete when the multiple signal exchanges between a given processing component and the resource component308have been completed. For the purpose of simplicity, this third type of transaction will not be further described in the present description.

Examples of the type of resources that can be used as resource component308include instruction (cache) memory, data (cache) memory and advanced computation components (e.g. floating point computation units). It will be appreciated that the aforementioned list of resource components was presented here for the purpose of illustration only and that several other different types of resources may be used here. The specific circuitry used by the resource component308for conducting a transaction with the processing components302A-D is not critical to the invention and as such will not be described in further detail here.

Processing components302A-D include suitable circuitry for implementing a desired functionality. In a first example of implementation, the processing components302A-D are identical in design and function to one another. In a non-limiting example of implementation, the processing components302A-D implement arithmetic and logic units (ALU). In a second example of implementation, the processing components302A-D implement different functionality from one another. The processing components302A-D may be designed as “clocked” device and operate in accordance with a common clock or with respective individual clock. Alternatively, the processing components302A-D may be designed as asynchronous units. Each one of processing component302A-D also includes the required circuitry for conducting a transaction with the resource component308through resource interface312. The specific functionality implemented by each of processing components302A-D as well as the specific circuitry used for conducting a transaction with the resource component308are not critical to the invention and as such will not be described in further detail here. When performing a transaction with the resource component308, the processing components302A-D transmit signals to the resource component308over respective data paths350A-D and may also receive signals from resource component308over the same data paths350A-D or over alternate returns paths (not shown in the figures). In the embodiment depicted inFIG. 1, each processing component has a dedicated data path between itself and resource component308. It will however be appreciated that, in alternative implementation, the processing components302A-D may share a common data path (or share portions of the data path) between themselves and the resource component308.

The token signal path310allows propagation of a token through the processing components302A-D. The token signal path may be implemented using any suitable signal carrying medium and components allowing propagating a signal between different components. In the example illustrated, the token signal path310includes a plurality of portions320A-D linking the processing components302A-D so that the token may be passed amongst them.

The token is such that only one processing component amongst processing components302A-D can posses it at any given time. In a specific example of implementation, possession of the token by a given processing component enables the given processing component to conduct a transaction with the shared resource component308via the resource interface312. Conversely, lack of possession of the token by the given processing component prevents the given processing component from conducting a transaction with the shared resource component308via the resource interface312. In this manner, the token allows preventing more than one processing component from conducting a transaction with the resource component308at a given time.

In a specific example of implementation, the token can be used for the dual purpose of granting access to the shared resource component308and synchronizing the communication between each of the processing components302A-D and the resource component308. It will however be appreciated that different mechanisms can be used for granting access to the shared resource component308and that it is not a requirement for the same token to be used to achieve both the synchronizing purpose and the access grant purpose.

Token processing logic is provided for propagating the token from one processing component to other processing components amongst processing components302A-D along the token signal path310. In particular, the token processing logic propagates the token between the processing components302A-D at a propagation rate that is related to the transaction rate of the resource component308. In a first specific example, the transaction rate is the transaction acceptance rate associated with the resource component308, the transaction acceptance rate being indicative of a rate at which the resource component can accept transaction requests. In a second specific example, the transaction rate is the transaction completion rate associated with the resource component308. The transaction completion rate may be indicative of the rate at which the resource component308can issue a reply to a transaction request originating from one of processing components302A-D or alternatively the rate at which one of processing components302A-D would receive a reply following the transmission of a transaction request to the resource component308. In certain, the transaction rate may depend upon the specific transaction being conducted between the processing component the resource component308.

Examples of processes that may be implemented by the token processing logic in the context of the circuit shown inFIG. 1will be now be described in greater detail.

With reference toFIG. 2, there is a shown a flow diagram of a process in accordance with a specific example of implementation of the present invention. The process depicted is implemented by token processing logic associated with a given processing component amongst processing components302A-D. For the purpose of illustration, the process depicted inFIG. 2will be described with reference to processing component302A (shown inFIG. 1). It will be readily apparent to the person skilled in the art that the same process may be used in connection with each of processing components302A-D in order to propagate the token associated with resource component308through the token signal path310(also shown inFIG. 1).

At step400, processing component302A waits for the token associated with resource component308. In a non-limiting example of implementation, processing component302A monitors portion320D of the token signal path310to detect the reception of the token. The reception of the token may be conveyed in different manners including, but not limited to, a signal transition or the presence of a pulse on portion320D of the token signal path310. The signal transition may be a transition from a LOW to a HI signal (rising edge) or a HI to LOW signal (falling edge). The token processing logic may include any suitable circuitry for detecting the reception of the token. Once the token has been received, the token processing logic proceeds to step402.

At step402, the token processing logic determines whether processing component302A requires a transaction with resource component308. In other words, the token processing logic determines whether processing component302A needs the services provided by resource component308. The token processing logic may include any suitable circuitry for determining whether processing component302A desires to effect a transaction with resource component308. If processing component302A does not require a transaction with resource component308, step402is answered in the negative and the token processing logic proceeds to step408. Conversely, if processing component302A does require a transaction with resource component308, step402is answered in the affirmative and the token processing logic proceeds to step404. For example, if processing component302A needs to store data and resource component308is a memory module, then the question asked at step402would be answered in the affirmative and the process would proceed to step404. Conversely, if processing component302A does not require any data to be stored in the resource component308, then the question asked at step402would be answered in the negative and the process would proceed to step408.

Optionally, if at step402the token processing logic is not ready to make a determination as to whether or not processing component302A requires a transaction with resource component308, the process remains at step402until such a determination is completed. In such an implementation, the token processing logic retains the token until it is in a position to make the determination of whether or not processing component302A requires a transaction with resource component308.

At step404, which is initiated when processing component302A wishes to conduct a transaction with resource component308, the token processing logic retains the token while the processing component302A initiates the desired transaction. The token processing logic may include any suitable circuitry for retaining the token. It is to be appreciated that the desired transaction may be any suitable transaction between the processing component302A and the resource component308and that the precise nature of the transaction is not critical to the invention. When conducting a transaction, the processing component302A transmits signals in the form of transaction requests, which may include data and/or instructions, to resource component308over data path350A. Once the processing component302A has initiated the desired transaction, the token processing logic proceeds to step406.

At step406, the token processing logic waits for a transaction delay time associated with the resource component308to elapse. The token processing logic may include any suitable circuitry for retaining the token for the duration of the transaction delay time. The transaction delay time, which is related to the transaction rate associated with the resource component308, may have a pre-determined duration (fixed duration) or a variable duration.

In a first specific example, waiting for the transaction delay time to elapse at step406is intended to allow the resource interface312to have sufficient time to accept the signals transmitted by the processing component302A over data path350A before another processing component in the set of components302A-D initiates a new transaction. In this first example, the transaction rate is a transaction acceptance rate associated with the resource component308, the transaction acceptance rate being indicative of a rate at which the resource component308can accept transaction requests. In a specific example, in circumstances in which the processing component302A conducts a transaction with the resource component308, the duration of the transaction delay time is selected such that token is propagated from processing component302A to another processing component as a rate no faster than the transaction acceptance rate associated with the resource component308. Advantageously, this allows the resource interface312to have sufficient time to accept the signals transmitted by the processing component302A over data path350A before another processing component in the set of components302A-D initiates a new transaction. In a non-limiting example in which the resource interface312operates in accordance with a resource clock, the duration of the transaction delay time is set to be at least as long in duration as a clock cycle of the resource clock used to direct the resource interface312.

In a second specific example, the duration of the transaction delay time is intended to allow the resource component308to have sufficient time to complete the transaction initiated by the processing component at step404before another processing component in the set of components302A-D initiates a new transaction. In this second example, the duration of the transaction delay time is related to a transaction completion rate associated with the resource component308. The transaction completion rate may be indicative of the rate at which the resource component308can complete a transaction specified in the transaction request originating from a processing component or, alternatively, may be indicative of a rate at which the resource component can issue a reply to a transaction request originating from a processing component. In a specific example, in circumstances in which the processing component302conducts a transaction with the resource component308, the duration of the transaction delay time is selected such that token is propagated from processing component302A to another processing component as a rate no faster than the transaction completion rate associated with the resource component308. In specific implementations where the transaction completion rate associated with the resource component308can be determined, the duration of the transaction delay time can be set to a pre-determined duration. In a non-limiting example of implementation, the duration of the transaction delay time is set to be at least as long as the longest delay for completing a transaction by the resource component308.

It will be appreciated that, in certain embodiments, the rate at which the resource component completes a transaction may vary depending on the specific transaction requested. In alternative embodiments, the duration of the transaction delay time can be set to different time durations wherein each time duration is associated with a respective specific transaction request. As such, it is to be appreciated that, in such alternative embodiments of the invention, the duration of the transaction delay time can be set dynamically while the circuit is operating on the basis of the transaction requested by processing component302A.

Once the transaction delay time has elapsed, the token processing logic proceeds to step408.

At step408, which is initiated after step402when processing component302A does not wish to conduct a transaction with resource component308or after step406when the transaction delay time has elapsed after processing component302A has conducted a transaction with the resource component308, the token processing logic releases the token so that it is propagated along the token signal path310to another processing component. In a specific example of implementation, the token processing logic releases the token so that it is propagated to processing component302B. The release of the token may be conveyed in different manners including, but not limited to, a signal transition or the presence of a pulse on portion320A of the token signal path310. In a non-limiting example of implementation, processing component302A causes a signal transition on portion320A of the token signal path310. The signal transition may be a transition from a LOW to a HI signal (rising edge) or a HI to LOW signal (falling edge). Once the token has been released the token processing logic returns to step400where processing component302A resumes waiting for the token associated with resource component308.

As will be observed, in the embodiment described with reference toFIGS. 1 and 2, the token being propagated through the processing components302A-D over the token signal path310serves the dual purpose of granting access to the resource component308and of synchronizing the communication between the processing components302A-D and the resource component308. In particular, by waiting for a transaction delay time to elapse (step406inFIG. 2) before propagating the token, where the transaction delay time is related to the transaction rate associated with the resource component308(shown inFIG. 1), the token processing logic ensures that the resource interface312is ready to accept a new transaction request by the time another processing component receives the token. Hence, when a processing component receives a token, it can immediately initiate a transaction if desired without having to perform any synchronization operation since the resource interface312should be ready to accept a new transaction request.

In addition, as can be observed, if processing component302A does not need to use the resource component (which corresponds to condition402being answered in the negative), the token can be propagated by the token processing logic at step408along the token signal path310without having to wait for the transaction delay time to elapse thereby improving the efficiency of use of the resource component308. Advantageously, this reduces delays associated with propagating the token along the token signal path when the resource component is not needed by a processing component. Consequently, in circumstances where not all processing components302A-D are desirous of conducting transactions with resource component308, the token can be propagated through the processing components302A-D at a rate that exceeds the transaction rate of the resource component308. It will be appreciated that, in variants of the invention, the token processing logic may wait for the transaction delay time to elapse before propagating the token from a given processing component to another processing component regardless of whether the given processing component conducts a transaction with the resource component. In such implementations, step402shown inFIG. 2would be omitted and the process would proceed directly from step400to step404and step408would be performed after completion of step406. As will be appreciated by the person skilled in the art in light of the present description, by propagating the token at a rate no faster than the transaction rate of the resource component308, the token can continue to serve the dual purpose of granting access to the resource and of synchronizing the communication between the processing components and the resource component.

Those skilled in the art should appreciate that in some embodiments, all or part of the circuit300shown inFIG. 1may be implemented in an IC, ASIC, FPGA or any other suitable type of circuit. Those skilled in the art should also appreciate that in some embodiments, all or part of the functionality previously described herein with respect to token processing logic may be implemented as pre-programmed hardware or firmware elements (e.g., integrated circuit (IC), application specific integrated circuits (ASICs), DSPs, electrically erasable programmable read-only memories (EEPROMs), etc.), or other related components.

The token processing logic may be implemented in a distributed manner in association with respective processing components in the set of processing components302A-D and may optionally be integrated in each so that each processing component includes circuitry for propagating the token associated with resource component308in accordance with the process depicted inFIG. 2. As will be appreciated, such an implementation allows for a modular design of the circuit300and avoids requiring additional overhead circuitry and signalling for determining the manner in which the token is to be propagated.

FIG. 3of the drawings depicts an exemplary embodiment of a non-limiting example of implementation of token processing logic550suitable for implementing the process depicted inFIG. 2in connection with processing component302A shown inFIG. 1.

In the example depicted, the token processing logic550is in communication with the portion320D and portion320A of token signal path310(shown inFIG. 1). The circuit depicted includes a latch552, a set of delay paths570572574576, a multiplexer554and a delay path selection unit562. Latch552is for capturing transitions in the signal traveling over portion320D of the token signal path310wherein a transition conveys the arrival of the token. Latch552then propagates the transition over path575and then over each of delay paths570572574576. Each delay path in the set of delay paths570572574576propagates the token towards multiplexer554at a respective rate by making use of various delay elements D1D2D3. As will be observed, delay path576propagates the token without inserting any additional delay. The delay path selection unit562is for controlling multiplexer554with a selection signal so that multiplexer554may select one of the signals arriving from set of delay paths570572574576to propagate over portion320A of token signal path310.

The delay path selection unit562includes the required circuitry for selecting one of delay paths570572574576depending on the transaction delay time that needs to be allocated to the resource component308. The delay path selection unit562releases at its output the signal propagated on the selected one of delay paths570572574576. Optionally, as depicted inFIG. 3, the output of the delay path selection unit562is connected to a latch580in order to synchronize the communication with the shared resource component308. In a first example of implementation, the delay path selection unit562implements step402of the process shown inFIG. 2of the drawings. In situation where the processing component302A does not wish to conduct a transaction with the shared resource component308, the delay path selection unit562releases a signal for causing the multiplexer554to selected the signal appearing on delay path576. Alternatively, in situation where the processing component302A wishes to conduct a transaction with the shared resource component308, the selection of the delay path amongst delay paths570572574may be effected for example, on the basis of the specific type of transaction that processing component302A wishes to conduct with the shared resource component308. In such a case, each one of delay paths570572574is associated with a respective specific type of transaction. The specific circuitry used by the delay path selection unit562to select for selecting one of delay paths570572574576is not critical to the invention and many possible implementations will become apparent to the person skilled in the art in light of the present description. As such, specific circuitry that may be used by the delay path selection unit562will not be described in further detail here. It will also be appreciated that, for the purpose of simplicity, certain signals originating from circuit components external to the token processing logic and that may be used by delay path selection unit562in the selection of one of delay paths570572574576have been omitted from the circuit shown inFIG. 3. For examples, signal conveying whether processing component302A wishes to conduct with the shared resource component308and/or signals conveying the type of transaction required, amongst other, have not been shown in the figure.

It will be appreciated that many suitable variants exists, which will become apparent to the person skilled in the art in light of the present description, and that the circuit shown inFIG. 3has been shown for the purpose of illustration only.

FIG. 4of the drawings shows exemplary timing diagrams of the circuit depicted inFIG. 1. As shows:Timing signal604corresponds to the signal on portion320D of token signal path310(shown inFIG. 1)Timing signal608corresponds to signals sent over data line350A by processing component302A (shown inFIG. 1)Timing signal606corresponds to the signal on portion320A of token signal path310(shown inFIG. 1)Timing signal610corresponds to signals sent over data line350B by processing component302B (shown inFIG. 1). In this example, processing component302B does not wish to conduct a transaction with resource component308and so no transaction data is actually sent.Timing signal611corresponds to the signal on portion320B of token signal path310(shown inFIG. 1). As can be seen, the token signal on portion320B had a transition that appears without having to wait for a transaction delay time to elapse;Timing signal612corresponds to signals sent over data line350C by processing component302C (shown inFIG. 1)

It will be appreciated by the person skilled in art that, although the exemplary circuit shown inFIG. 1depicts four processing components302A-D, alternative practical implementations of the invention may include fewer or additional processing components without detracting from the invention.

In addition, it will also be appreciated by the person skilled in art that, although the exemplary circuit shown inFIG. 1depicts a single shared resource component308, alternative practical implementations of the invention may include additional shared resource components without detracting from the invention.

FIG. 5shows a block diagram of an exemplary circuit700in accordance with a variant of the present invention. As depicted, the circuit700includes a set of processing components702a-cin the form of arithmetic and logic units (ALUs). In this example, the processing components in the set702a-care identical to one another. The circuit700also includes a plurality of resource components708710712714shared between the processing components702a-c. Each resource component in the plurality of resource components708710712714is analogous to resource component308and includes a respective resource interface analogous to resource interface312(both shown inFIG. 1). In the example depicted:1. Resource components710corresponds to a set of registers2. Resource components712and708correspond to other shared resources such as (for example) an instruction (cache) memory, a data (cache) memory and an advanced computation component;3. Resource components714corresponds to a local memory module

The resource components in the plurality of resource components708710712714may operate asynchronously with one another and may be clocked circuits or asynchronous circuits. A token signal path is provided for each resource component in the plurality of resource components708710712714. Each token signal path is analogous to token signal path310(shown inFIG. 1) and is for propagating a token associated with a given one of the resource components708710712714. Token processing logic allows propagating each one of the tokens associated with the resource components708710712714along a respective token signal path in a manner similar to that described with reference toFIG. 2. The token processing logic propagates each token in the plurality of tokens from one processing component to another processing component along a respective token signal path at a propagation rate that is related to the transaction rate of the resource with which the token is associated. Each token is propagated independently from another in order to grant a processing component access to each resource component independently from other resource components. Possession of a given token by a given processing component enables the given processing component to conduct a transaction with the resource component associated with the given token. In specific examples of implementation of the invention, each token is propagated at a propagation rate that is independent from the propagation rate of other tokens. This may allow, for example, customizing the propagation rate for a given token so that it better suited to the particular shared resource to which it is associated.

Variant

In accordance with a variant, a trigger signal is derived at least in part based on the token associated with the shared resource component. The trigger signal may be embodied in any suitable form including for example an edge (rising or falling), a pulse and/or any other suitable type of signal. In implementations including a plurality of resource components, respective trigger signals may be generated for each shared resource component. For the purpose of simplicity, the description of this variant will be made with respect to a single shared resource component308however the person skilled in the art will appreciate that the concepts described herein may be extended to multiple shared resource component.

The trigger signal conveys the initiation of a transaction with a given processing component and may be propagated to the shared resource component. In accordance with a non-limiting implementation, the shared resource component may use the trigger signal for a number of purposes such as for example resetting internal memory devices/circuit components and/or synchronizing its internal clock amongst others. Optionally the trigger signal may also be used to cause the generation of a clock signal for use by the shared resource component. Optionally still, trigger signal may be used for asynchronously transferring a transaction to a shared resource. Depending on the use made by the shared resource component of the trigger signal, suitable circuitry is provided for processing the trigger signal.

FIG. 6of the drawings depicts the token processing logic550described with reference toFIG. 3modified to further generate a trigger signal in accordance with the above described variant. For the purpose of clarity, the “modified” token processing logic depicted inFIG. 6will be referred to as token processing logic550′.

As can be observed fromFIG. 6, the token processing logic550′ is in communication with the portion320D and portion320A of token signal path310(shown inFIG. 1). In addition to the components of token processing logic550described with reference toFIG. 3, token processing logic550′ includes a trigger control path850which will be described in greater detail below. In the example depicted inFIG. 6, token processing logic550′ omits optional latch580described with reference toFIG. 3since synchronization of the communication with the resource component308is instead achieved via the trigger control path850. In addition, latch522depicted inFIG. 3has been replaced by latch522′ which includes an addition input (labelled as input “G”) for turning on the latch. The addition input “G” is for receiving a signal indication that the processing component #1302A (depicted inFIG. 1) is ready to receive the token associated with the shared component308.

The trigger control path850is in communication with path575and includes the required circuitry for detecting the presence of a transition on path575, which conveys the arrival of a token). In cases where signal808indicates that the shared resource is required by the processing component, the trigger control path850generates a trigger signal upon detection of a transition on path575. The trigger signal is propagated along output810towards the shared resource component.

The specific circuitry used in trigger control path850to generate the trigger signal may vary from one implementation to the other and many possible implementations will become apparent to the person skilled in the art in light of the present description.

In the example depicted inFIG. 6, a combination of logic gates is shown for generating the desired trigger signal. In cases where signal808indicates that the shared resource is required, the trigger control path850will generate a trigger signal in the form of a pulse upon detection of a transition on path575.

It is to be appreciated that, although the circuit depicted generates a pulse as a trigger signal, circuit for generating other forms of trigger signals (e.g. rising/falling edges) may also be contemplated in alternative examples of implementation of the invention.

It is also to be appreciated that, for the purpose of simplicity, certain circuit components external to the token processing logic and/or signals originating from circuit components external to the token processing logic and that may be used by components of token processing logic550′ have been omitted from the circuit shown inFIG. 6. For examples, components for generating signal808conveying whether processing component302A wishes to conduct with the shared resource component308and/or signals conveying the type of transaction required, amongst other, have not been shown in the Figure.

This example of implementation of the above variant of the invention is one of many that provide use of the token passing mechanism where all processing components and shared resources are asynchronous to one another.

Although the present invention has been described in considerable detail with reference to certain preferred embodiments thereof, variations and refinements are possible. Therefore, the scope of the invention should be limited only by the appended claims and their equivalents.