Apparatus and methods are provided for ameliorating distortion issues associated with a conductor that passes over a void in a reference plane. In an example, the signal conductor can include a first part routed over the major surface of a first side of the reference plane structure on a first side of the void and that approaches a first edge of the reference plane structure with a first trajectory, a second part routed over the major surface of the reference plane structure on a second side of the void and that approaches a second edge of the reference plane structure with a second trajectory, and a third portion connecting the first portion with the second portion, the third portion spanning the void, and having a plurality of spurs extending from a body of the third portion.

This application claims the benefit of priority to Malaysian Application Serial No. PI 2017702410, filed Jun. 30, 2017, which is incorporated herein by reference in its entirety.

TECHNICAL FIELD

The disclosure herein relates generally integrated circuits and more particularly to compensating techniques for transmission lines that traverse gaps in an integrated circuit.

BACKGROUND

The continued evolution of integrated circuits have enabled shrinking ever more powerful computational and communication functionality into smaller and smaller devices. As the devices have become smaller and device frequencies higher, these desired characteristics have given rise to challenges that if not dealt with will limit the evolution process. For example, the push to reduce the size of a device can necessitate rearranging sub-devices. The rearrangement can introduce less than ideal conditions for some functionality, such as, routing transmission lines of the device over reference plane voids. Such arrangements can cause distortion of signals using the transmission line.

DETAILED DESCRIPTION

FIG. 1illustrates generally an apparatus or portion of a circuit100or printed circuit board with a signal routing such as a signal conductor101or a signal trace that traverses a void102in a reference plane of a substrate, for example.FIG. 1shows one or more reference planes103,104, a drive circuit105, a receiver circuit106, and a signal conductor101coupling the drive circuit105to the receiver circuit106, where the signal conductor101is routed over the void102. In general, routing a signal conductor101over a void102in one or more reference planes can result in a number of issues including, but not limited to, signal propagation delay due to higher return current inductance, signal rise/fall time distortion due to a signal propagation delay mismatch, and higher trace impedance due to reduced capacitance between the signal conductor and reference plane. These issues can be very prevelant for high speed busses, such as busses operating at 4 gigabits per second (Gbps) or higher. However, such issues can impact the performance of slower busses also such as those operating at 200 megahertz (MHz) or less. As the signal conducts along the signal conductor, current passes through the conductor and the one or more reference planes. As the signal encounters the void, the signal current can fragment and seek one or more alternative paths180. Generally, the alternative paths180can introduce delays, and transitions of the signal can be significantly distorted by the time each transition reaches the receiver. These signal distortion issues are known, however, due to consumer demand and industry trends to miniaturize, having signals traversing reference plane voids has become common. Beyond adding additional layers to provide continuous reference planes, which is contradictory to shrinking circuit size, current solutions can include implementing stitching capacitors107across the void102which can add additional manufacturing processing and cost.

FIG. 2Aillustrates generally an example signal conductor201for spanning a void202that can ameliorate distortion issues associated with a conductor passing straight over a void in a reference plane as illustrated inFIG. 1.FIG. 2Billustrates generally a cross-section view of the example ofFIG. 2A. In certain examples, the portion200of the circuit that includes the void202can include a first reference plane203having a first major surface213, a second reference plane204having a second major surface214, a void202between the first reference plane203and the second reference plane204, a signal conductor201over lying the major surfaces213,214of the first reference plane203and the second reference plane204and spanning the void202, and dielectric material208. In certain examples, the dielectric material208can fill the void202between the first reference plane203and the second reference plane204. In certain examples, the dielectric material208can separate the signal conductor201from the first major surface213of the first reference plane203and from the second major surface214of the second reference plane204. In certain example, the dielectric material208can overlay and or encapsulate the signal conductor201. In certain examples, the dielectric material208can include but not limited to epoxy resin, FR-4 glass-reinforced epoxy, bismaleimide-triazine resin, polyimide, or combinations thereof.

In certain examples, the signal conductor201can include a first portion221routed over the first major surface213and that approaches a first edge of the first reference plane structure203with a first trajectory. The signal conductor201can include a second portion222routed over the second major surface214of the second reference plane structure204and that approaches a second edge of the second reference plane structure204with a second trajectory. In certain examples, the first trajectory can align with the second trajectory. The signal conductor201can include a third portion223that connects the first portion221with the second portion222and spans the void202. In certain examples, the third portion223can include a number of spurs224that extend from the body of the third portion223. The body of the third portion223can be that part of the third portion223that connects the first portion221of the signal conductor201with the second portion222of the signal conductor201. In certain examples, the spurs can extend from the body parallel with the major surfaces213,214of the first and second reference plane structures203,204. In certain examples, each spur can have a corresponding spur extending from the body of the third portion in an opposite direction. In certain examples, the spurs generally extend from the body of the third portion at a right angle. In some examples, the spurs extend from the body of the third portion at an acute angle.

In certain examples, the spurs promote fragmentation of the signal current. In certain examples, the spurs fragmentation of the signal caused by the spurs or the extended signal path length provided by the third portion223of the signal conductor201can operate to equalize signal delay of the signal conductor201with portions of the signal affected by the impedance and capacitive anomalies associated with the reference plane void202. In certain examples, the width or cross-section area of the body of the third portion223of the signal conductor201is the same as or greater than the width or cross-section area of the first portion221of the signal conductor201and is the same as or greater than the width or cross-section area of the second portion222of the signal conductor201. In certain examples, the width or cross-section area of the spurs of the third portion223of the signal conductor201is the same as or greater than the width or cross-section area of the first portion221of the signal conductor201and is the same as or greater than the width or cross-section area of the second portion222of the signal conductor201. In certain examples, the length (L) of the spurs224from the tip of one spur to a corresponding opposing spur can be configurable in accordance to the timing delay mismatch magnitude of the signal conductor201. As a nonexclusive example, for a void202of about 50-100 mils, the length of the spurs224can be in the range of 5 mils to 20 mils to match the non-ideal current return path of the signal. It is understood that the spurs224can include cross-sectional shapes that differ than the shape shown inFIG. 2Bwithout departing from the scope of the present subject matter.

FIG. 3illustrates generally a circuit portion300that includes multiple example conductor301,341traversing a void302between reference plane sections303,304. In certain examples, the portion300of the circuit that includes the void302can include a first reference plane section303having a first major surface, a second reference plane section304having a second major surface, a void302between the first reference plane section303and the second reference plane section304, first and second signal conductors301,341over lying the major surfaces of the first reference plane section303and the second reference plane section304, and spanning the void302, and dielectric material (not shown). In certain examples, the dielectric material can fill spaces between the first reference plane section303and the second reference plane section304. In certain examples, the dielectric material can separate the signal conductors301,341from the first reference plane section303and from the second reference plane section304. In certain example, the dielectric material can overlay and or encapsulate the signal conductors301,341.

In certain examples, the each signal conductor301,341can include a first portion321,361routed over the first major surface of the first reference plane structure303and that approaches a first edge of the first reference plane structure303, at the void302, with a first trajectory. Each signal conductor301,341can include a second portion322,362routed over the second major surface of the second reference plane structure304and that approaches a second edge of the second reference plane structure304, at the void302, with a second trajectory. In certain examples, the first trajectory can align with the second trajectory. Each signal conductor301,341can include a third portion323,363that connects the respective first portion321,361with the respective second portion322,362and spans the void302.

In certain examples, the third portion323,363of each signal conductor301.341can include a number of spurs324,364that extend from the body of the third portion323,363. The body of the third portion323,363can be that part of the third portion323,363that connects the first portion321,361of the respective signal conductor301,341with the second portion322,362of the signal conductor301,341. In certain examples, the spurs324,364can extend from the body parallel with the major surfaces313,314of the first and second reference plane structures303,304. In certain examples, each spur324,364can have a corresponding spur extending from the body of the third portion323in an opposite direction. In certain examples, the spurs324,364generally extend from the body of the third portion323,364at a right angle. In some examples, the spurs324,364extend from the body of the third portion323,363at an acute angle. In certain examples, the spurs324from the first signal conductor301can interleave with the spurs364from the second signal conductor341to allow for efficient spacing of the signal conductors301,341.

In each of the figures discussed above, the signal conductors approach the respective edge of the void at 90 degrees. It is understood that approaching the edge of the void, for any of the conductors, at an angle other than 90 degrees is possible and does not depart from the scope of the present subject matter. In each of the figures discussed above, the void appears to be void separating two distinct reference plane structures. In certain examples, such distinct reference plane structures can be at different reference potentials. In certain example, the first reference plane structure303can be associated with a ground (Vss) reference voltage and the second reference plane structure304can be associated with a power (Vcc) reference voltage. It is understood that, in certain examples, the void can be an opening or a slot in a single reference plane structure without departing from the scope of the present subject matter.

FIG. 4illustrates generally an example system400for traversing a void in a reference plane structure with a signal conductor.FIG. 4illustrates generally an example signal conductor401for spanning a void402that can ameliorate distortion issues associated with a conductor passing straight over a void in a reference plane as illustrated inFIG. 1. In certain examples, the portion400of the circuit that includes the void402can include a first reference plane403having a first major surface, a second reference plane404having a second major surface, a void402between the first reference plane403and the second reference plane404, a signal conductor401over lying the major surfaces of the first reference plane403and the second reference plane404and spanning the void402, and dielectric material (not shown). In certain examples, the dielectric material can fill the void402between the first reference plane403and the second reference plane404. In certain examples, the dielectric material can separate the signal conductor401from the first major surface of the first reference plane403and from the second major surface of the second reference plane404. In certain example, the dielectric material can overlay and or encapsulate the signal conductor401.

In certain examples, the signal conductor401can include a first part421routed over the first major surface and that approaches a first edge of the first reference plane structure403with a first trajectory. The signal conductor401can include a second portion422routed over the second major surface of the second reference plane structure404and that approaches a second edge of the second reference plane structure404with a second trajectory. In certain examples, the first trajectory can be parallel with the second trajectory. In some examples, the first trajectory is not parallel with the second trajectory. The signal conductor401can include a third portion423that connects the first portion421with the second portion422and spans the void402. In certain examples, the third portion423can include a number of spurs424that extend from the body of the third portion423. The body of the third portion423can be that part of the third portion423that connects the first portion421of the signal conductor401with the second portion422of the signal conductor401. In certain examples, the spurs424can extend from the body parallel with the major surfaces of the first and second reference plane structures. In certain examples, each spur424can have a corresponding spur extending from an opposite side of the body of the third portion423. In some examples, the spurs424can extend from the body of the third portion423at an acute angle.

FIGS. 5A and 5Billustrate comparatively an example improvement in signal quality at the receiver circuit than can be achieved using a circuit structure as discussed above with reference toFIGS. 2A-4.FIG. 5Aillustrates variation of signal voltages with respect to time of a square wave received at the receiver circuit using a conductor that spans a void in a reference plane structure as shown inFIG. 1.FIG. 5Billustrates generally example variation of signal patterns with respect to time of a square wave received at the receiver circuit using a conductor that spans a void in a reference plane structure as shown in any ofFIGS. 2A-4.

Aggregating signal variation at the receiver can allow for definition of a signal eye501that represents the operating capabilities generally necessary in the receiver circuit to robustly detect the signal. In general, the bigger the eye501, the more relaxed the specifications for the receiver can be to robustly detect and process information received on the signal conductor. In addition, a more relaxed receiver specification can result in less complex or less costly receivers. For a given specification (e.g., at an operating frequency) that requires the illustrated eye501,FIG. 5Aillustrates that the specification may not be possible because the signal extremes plotted inFIG. 5Ado not steer clear of the signal eye501defined by the given specification. A factor that can contribute to the signal not steering clear of the signal eye501(e.g., timing and voltage margins) can be the various conduction delays associated with the signal routing ofFIG. 1. Conversely,FIG. 5Billustrates that routing the signal as discussed above with respect toFIGS. 2A-4can allow for more robust receiver performance of the signal or for reception of higher frequency signals because the signal extremes plotted inFIG. 5Bsteer clear of the signal eye501defined by the given specification. In certain examples, using a routing as shown inFIGS. 2A-4can assist in equalizing the extremes of the conduction delays associated with routing the signal over a void in one or more reference planes.

FIG. 6illustrates a block diagram of an example machine600upon which any one or more of the techniques (e.g., methodologies) discussed herein may perform. In alternative embodiments, the machine600may operate as a standalone device or may be connected (e.g., networked) to other machines. In a networked deployment, the machine600may operate in the capacity of a server machine, a client machine, or both in server-client network environments. In an example, the machine600may act as a peer machine in peer-to-peer (or other distributed) network environment. As used herein, peer-to-peer refers to a data link directly between two devices (e.g., it is not a hub- and spoke topology). Accordingly, peer-to-peer networking is networking to a set of machines using peer-to-peer data links. The machine600may be a single-board computer, an integrated circuit package, a system-on-a-chip (SOC), a personal computer (PC), a tablet PC, a set-top box (STB), a personal digital assistant (PDA), a mobile telephone, a web appliance, a network router, switch or bridge, or any machine capable of executing instructions (sequential or otherwise) that specify actions to be taken by that machine. Further, while only a single machine is illustrated, the term “machine” shall also be taken to include any collection of machines that individually or jointly execute a set (or multiple sets) of instructions to perform any one or more of the methodologies discussed herein, such as cloud computing, software as a service (SaaS), other computer cluster configurations.

Machine (e.g., computer system)600may include a hardware processor602(e.g., a central processing unit (CPU), a graphics processing unit (GPU), a hardware processor core, or any combination thereof), a main memory604and a static memory606, some or all of which may communicate with each other via an interlink (e.g., bus)608. The machine600may further include a display unit610, an alphanumeric input device612(e.g., a keyboard), and a user interface (UI) navigation device614(e.g., a mouse). In an example, the display unit610, input device612and UI navigation device614may be a touch screen display. The machine600may additionally include a storage device (e.g., drive unit)616, a signal generation device618(e.g., a speaker), a network interface device620, and one or more sensors621, such as a global positioning system (GPS) sensor, compass, accelerometer, or other sensor. The machine600may include an output controller628, such as a serial (e.g., universal serial bus (USB), parallel, or other wired or wireless (e.g., infrared (IR), near field communication (NFC), etc.) connection to communicate or control one or more peripheral devices (e.g., a printer, card reader, etc.).

The storage device616may include a machine readable medium622on which is stored one or more sets of data structures or instructions624(e.g., software) embodying or utilized by any one or more of the techniques or functions described herein.

The instructions624may also reside, completely or at least partially, within the main memory604, within static memory606, or within the hardware processor602during execution thereof by the machine600. In an example, one or any combination of the hardware processor602, the main memory604, the static memory606, or the storage device616may constitute machine readable media.

ADDITIONAL EXAMPLES AND NOTES

In Example 1, an apparatus can include a reference plane structure, a void between two edges of the reference plane structure, and a first signal conductor routed over a major surface of the reference plane structure and spanning the void. The first signal conductor can include a first portion routed over the major surface of a first side of the void and that approaches a first edge of the reference plane structure with a first trajectory, a second portion routed over the major surface of a second side of the void and that approaches a second edge of the reference plane structure with a second trajectory in-line with the first trajectory, and a third portion connecting the first portion with the second portion and having a plurality of spurs extending from a body of the third portion.

In Example 2, a length of the third portion in the direction of signal flow via the first signal conductor of Example 1 optionally is consummate with a distance across the void between the first edge and the second edge, the distance across the void measured at first edge where the first part approaches the first edge and at the second edge where the second part approaches the second edge.

In Example 3, a first spur of the plurality of spurs of any one or more of Examples 1-2 optionally extends from the body of the third portion.

In Example 4, a second spur of the plurality of spurs of any one or more of Examples 1-3 optionally extends from the body of the third portion opposite the first spur to form a first spur pair.

In Example 5, each of the first spur and the second spur of any one or more of Examples 1-4 optionally extend from the body of the third portion at an acute angle.

In Example 6, the acute angle associated with the first spur of any one or more of Examples 1-5 optionally is equal to the acute angle associated with the second spur.

In Example 7, the first spur pair of any one or more of Examples 1-6 optionally is one of a plurality of spur pairs and wherein the plurality of spur pairs include the plurality of spurs.

In Example 8, each spur pair of the plurality of spur pairs of any one or more of Examples 1-7 optionally is equidistant from each immediately adjacent spur pair.

In Example 9, a first spur of the plurality of spurs of any one or more of Examples 1-8 optionally extends perpendicular from the body of the third portion.

In Example 10, a second spur of the plurality of spurs of any one or more of Examples 1-9 optionally extends perpendicular from the body of the third portion.

In Example 11, a second spur of the plurality of spurs of any one or more of Examples 1-10 optionally extends perpendicular from the body of the third portion opposite the first spur.

In Example 12, the reference plane of any one or more of Examples 1-11 optionally is a singular structure and the void is part of an opening within the singular structure.

In Example 13, the apparatus of any one or more of Examples 1-12 optionally includes a dielectric configured to separate the first signal conductor from the reference plane structure.

In Example 14, the reference plane structure of any one or more of Examples 1-13 optionally includes a first reference plane including the first edge and configured to be at a first reference potential, and a second reference plane including the second edge and configured to be at a second reference potential different from the first reference potential.

In Example 15, the first trajectory of any one or more of Examples 1-14 optionally is perpendicular to the first edge and the second edge.

In Example 16, the apparatus of any one or more of Examples 1-15 optionally includes a second signal conductor routed over a major surface of the reference plane structure and spanning the void.

In Example 17, the second signal conductor of any one or more of Examples 1-15 optionally includes a first part routed over the major surface of a first side of the void and that approaches a first edge of the reference plane structure with a first trajectory, a second part routed over the major surface of a second side of the void and that approaches a second edge of the reference plane structure with a second trajectory in-line with the first trajectory, and a third portion connecting the first portion with the second portion and having a plurality of spurs extending from a body of the third portion.

In Example 18, one of the plurality of spurs of the third portion of the second signal conductor of any one or more of Examples 1-17 optionally is interleaved with one of the plurality of spurs of the third portion of the first signal conductor.

In Example 19, the plurality of spurs of the third portion of the second signal conductor of any one or more of Examples 1-18 optionally is interleaved with the plurality of spurs of the third portion of the first signal conductor.

In Example 20, a first spur of the plurality of spurs of the second signal conductor of any one or more of Examples 1-19 optionally extends from a body of the third portion of the second signal conductor, a second spur of the plurality of spurs of the second signal conductor of any one or more of Examples 1-19 optionally extends from the body of the third portion opposite the first spur of the second signal conductor to form a first spur pair of the second signal conductor, the first spur pair of the second signal conductor of any one or more of Examples 1-19 optionally is one of a second plurality of spur pairs and wherein the second plurality of spur pairs include the plurality of spurs of the second signal conductor, and each spur pair of the second plurality of spur pairs of any one or more of Examples 1-19 optionally is equidistant from each immediately adjacent spur pair of the second plurality of spur pairs.

Each of these non-limiting examples can stand on its own, or can be combined with one or more of the other examples in any permutation or combination.