Constant on-time switching regulator, and control method and on-time calculation circuit therefor

The present invention discloses a constant on-time switching regulator, a control method therefor, and an on-time calculation circuit for calculating an on-time period of a constant on-time switching regulator. The on-time calculation circuit calculates on-time according to practical conditions. It includes: a driver gate receiving a gate signal of a power switch in a switching regulator, the driver gate operating between high and low levels of a first reference voltage and ground; a low pass filter receiving an output from the driver gate and generating a second reference voltage, a ratio between the second reference voltage and the first reference voltage being substantially the same as a duty ratio of the gate signal; and an on-time generator comparing the second reference voltage with a ramp signal to determine an on-time of the power switch.

CROSS REFERENCE

The present invention claims priority to TW 099124581, filed on Jul. 26, 2010.

BACKGROUND OF THE INVENTION

1. Field of Invention

The present invention relates to a constant on-time switching regulator, and a control method and an on-time calculation circuit therefor.

2. Description of Related Art

Referring toFIGS. 1A and 1B, a prior art constant on-time (also referred to as “Ton”) switching regulator includes an upper gate power switch UG and a lower gate power switch LG, which are respectively controlled by gate signals Vug and Vlg from driver gates21and22to convert an input voltage Vin to an output voltage Vout. The constant Ton switching regulator operates as follows: When a feedback voltage Vfb representing the output voltage Vout is lower than a predetermined voltage Vref, a comparator Com generates a comparison signal Vcom with low level, wherein one edge of the comparison signal Vcom determines a starting point of the on-time of the upper gate power switch UG (in a real case, the starting point may be slightly later than the triggering edge of the comparison signal Vcom due to circuit delay, which is omitted in the figure). A control circuit11controls the operations of the upper gate power switch UG and the lower gate power switch LG according to the triggering edge of the comparison signal Vcom. A constant Ton circuit13generates a signal determining a constant on-time. A one-shot pulse generator12turns on, according to a signal from the control circuit11and the signal from the constant Ton circuit13, the upper gate power switch UG for the constant on-time determined by the constant Ton circuit13. When the on-time is over, the control circuit11turns OFF the upper gate power switch UG and turns ON the lower gate power switch LG, until the next time when the feedback voltage Vfb is again lower than the predetermined voltage Vref, and the control circuit11turns OFF the lower gate power switch LG and turns ON the upper gate power switch UG ON again. The control circuit11operates periodically as thus. In this prior art, because the starting point of the on-time of the upper gate power switch UG depends on the timing when the feedback voltage Vfb is lower than the predetermined voltage Vref, the switching regulator does not operate in a fixed-frequency.

In the above circuit, the comparator Com can be replaced by an error amplifier, that is, the comparison signal Vcom can be a digital signal or an analog signal, and the control circuit11can be different structures correspondingly.

Referring toFIG. 2Awhich shows another prior art constant Ton switching regulator, in order to operate the constant Ton switching regulator by fixed-frequency, this prior art proposes to provide a Ton calculation circuit14which calculates a proper Ton according to the input voltage Vin and the output voltage Vout, such that the circuit can operate in a fixed-frequency. Referring toFIG. 3, in a continuous conduction mode, when the upper gate voltage Vug is at high level (ON), the lower gate voltage Vlg is at low level (OFF); when the upper gate voltage Vug is at low level (OFF), the lower gate voltage Vlg is at high level (ON). A phase voltage Vph at a node between the upper gate power switch UG and the lower gate power switch LG follows the waveform of the upper gate voltage Vug. In an ideal case, when the upper gate power switch UG is ON, the phase voltage Vph is equal to the input voltage Vin; when the lower gate power switch LG is ON, the phase voltage Vph is equal to 0. In other words, in the ideal case, the ratio of the input voltage to the output voltage is equal to the duty ratio D of the upper gate voltage Vug, that is, the ratio of Ton to period T. Thus, if the period T of the constant Ton switching regulator can be controlled by the following way:

T=Ton×V⁢⁢inV⁢⁢out,
then the circuit can operate in a fixed-frequency.

According to the above, the prior art proposes the Ton calculation circuit14shown inFIG. 2B, wherein a current source Cs1generating a current K-times of the input voltage Vin (i.e., the current source Cs1generates a current of K*Vin) charges a capacitor C1having a capacitance of C to generate a voltage Vc across the capacitor. A comparator Com1compares the voltage Vc and the output voltage Vout to generate a square wave signal. According to the equation t=CV/I (time=capacitance*voltage/current), the Ton calculation circuit14generates the desired Ton for the upper gate power switch UG when the comparator Com1outputs a high level signal, as the following:

Ton=CK×V⁢⁢outV⁢in.
In other words, in the ideal case, Ton=(C/K)×D, and Ton can be set to a proper value by adjusting K and C such that the constant Ton switching regulator operates in a fixed-frequency.

However, in a real case as shown inFIG. 4, the high level and low level of the phase voltage Vph are not Vin and 0. Due to the turn-ON resistances of the upper gate power switch UG and the lower gate power switch LG, the high level and low level of the phase voltage Vph are actually Vin−IL*Rug and −IL*Rlg, where IL is the load current and Rug and Rlg are the turn-ON resistances of the upper gate and lower gate power switches, respectively. Thus, under the prior art structure inFIGS. 2A-2B, the output voltage Vout is not equal to Vin*D actually, that is,

Ton=CK×V⁢outV⁢in≠CK×D.
Therefore, the Ton calculation circuit14designed under the ideal case assumption cannot achieve fixed-frequency operation.

SUMMARY OF THE INVENTION

An objective of the present invention is to provide a constant on-time switching regulator.

Another objective of the present invention is to provide a method for controlling the constant on-time switching regulator.

A further other objective of the present invention is to provide an on-time calculation circuit for the constant on-time switching regulator.

To achieve the foregoing objectives, in one perspective of the present invention, it provides a constant on-time switching regulator comprising: a power stage circuit including at least one power switch controlled by a power switch gate signal to convert an input voltage to an output voltage; a comparator comparing a feedback voltage which represents the output voltage with a predetermined voltage to generate a comparison signal; a control circuit controlling an operation of the power switch, the control circuit determining a starting point of an on-time of the power switch according to the comparison signal; and an on-time calculation circuit including: (a) a driver gate receiving the power switch gate signal and generating a driver gate output signal, the driver gate operating between high and low levels of a first reference voltage and ground; (b) a low pass filter receiving the driver gate output signal from the driver gate and generating a second reference voltage, a ratio between the second reference voltage and the first reference voltage being substantially the same as a duty ratio D of the power switch gate signal; and (c) an on-time generator comparing the second reference voltage from the low pass filter with a ramp signal to determine the on-time of the power switch.

In another perspective of the present invention, it provides an on-time calculation circuit for a constant on-time switching regulator having a power stage circuit including at least one power switch controlled by a power switch gate signal to convert an input voltage to an output voltage, wherein the on-time calculation circuit calculates a constant on-time of the power switch, the on-time calculation circuit comprising: a driver gate receiving the power switch gate signal and generating a driver gate output signal, the driver gate operating between high and low levels of a first reference voltage and ground; a low pass filter receiving the driver gate output signal from the driver gate and generating a second reference voltage, a ratio between the second reference voltage and the first reference voltage being substantially the same as a duty ratio D of the power switch gate signal; and an on-time generator comparing the second reference voltage from the low pass filter with a ramp signal to determine an on-time of the power switch.

In yet another perspective of the present invention, it provides a method for controlling a constant on-time switching regulator having a power stage circuit including at least one power switch controlled by a power switch gate signal to convert an input voltage to an output voltage, the method comprising: comparing a feedback voltage which represents the output voltage with a predetermined voltage to generate a comparison signal; determining a starting point of an on-time of the power switch according to the comparison signal; generating a first signal with high and low levels of a first reference voltage and ground according to the power switch gate signal, wherein a duty ratio D of the first signal is substantially the same as a duty ratio of the power switch gate signal; obtaining an average value of the first signal as a second signal; and comparing the second signal with a ramp signal to determine an on-time of the power switch.

In the foregoing on-time calculation circuit, the constant on-time switching regulator, or the control method, in one embodiment, the on-time can be calculated by: charging a capacitor having a capacitance of C by a current source having a current I, and comparing the second reference voltage or second signal with a voltage across the capacitor by a comparator. When the current source generates a current I equivalent to K times of the first reference voltage, the on-time is:

on⁢-⁢time=CK×duty⁢⁢ratio⁢⁢D.
When the current I is not correlated to the first voltage, the on-time is:

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Referring toFIG. 4, the inaccuracy in the prior art results from the assumption that Vin=Vout*D. However, due to non-ideal effects (such as the turn-ON resistances of the upper and lower gate power switches UG and LG), the duty ratio D in a real case is quite different from that in an ideal case, so that the calculated on-time is incorrect and the constant Ton switching regulator cannot operate in a fixed-frequency. To overcome the drawbacks in the prior art, the present invention proposes solutions as described in the following.

FIG. 5shows a circuit structure of a first embodiment according to the present invention. In this embodiment, the upper and lower gate power switches UG and LG and an inductor construct a power stage circuit30which is shown in the figure as a buck converter for example, but it can be other types of power converters. A comparison circuit23generates, according to a comparison result of a feedback voltage Vfb which represents the output voltage Vout and a predetermined reference voltage Vref, a comparison signal Vcom which is sent to a control circuit11to determine a starting point of the Ton of the upper gate power switch UG, wherein the comparison circuit23may be a comparator or an error amplifier and the comparison signal Vcom may be a digital signal or an analog signal. The control circuit11controls the operations of the upper gate power switch UG and the lower gate power switch LG, wherein the on-time of the upper gate power switch UG is determined by a Ton calculation circuit15, and a one-shot pulse generator12generates, according to output signals from the control circuit11and the Ton calculation circuit15, a one-shot pulse which controls the starting point and the on-time of the upper gate power switch UG. In order to provide a proper gate driving voltage, the one-shot pulse generator12drives the upper gate power switch UG through a driver gate21and the control circuit11drives the lower gate power switch LG through a driver gate22.

One feature of the present invention is to provide the Ton calculation circuit15which calculates the Ton of the upper gate power switch UG according to practical conditions. Referring toFIG. 6, the Ton calculation circuit in the present invention includes a Ton generator150, a driver gate151and a low pass filter152, wherein the Ton generator150comprises a ramp generator153and a comparator Com2. The driver gate151operates according to high and low operation levels which are, respectively, reference voltage Vref1and ground GND. The driver gate151receives the upper gate voltage Vug and generates an output; the output of the driver gate151passes through the low pass filter152to generate a reference Vref2which is sent to one input terminal of the comparator Com2in the Ton generator150. Further, the ramp generator153generates a voltage signal Vc which is sent to the other input terminal of the comparator Com2. Thus, the Ton calculation circuit15can generate the correct Ton at the output of the comparator Com2.

The following description explains how the Ton calculation circuit15generates the Ton which is more correct than the Ton in the prior art.FIGS. 7A-7Bshow an embodiment of the Ton calculation circuit15. In this embodiment, a RC (resistor-capacitor) circuit forms the low pass filter152(FIG. 7A). Referring toFIG. 8, because the driver gate151operates according to high and low operation levels of the reference voltage Vref1and ground GND, as the driver gate151receives the upper gate voltage Vug, it outputs a square wave signal having a duty ratio D the same as the duty ratio of the upper gate voltage Vug, while the square wave signal has the high and low levels of the reference voltage Vref1and ground GND. The output of the driver gate151passes through the low pass filter152to generate a reference voltage Vref2which is equal to an average of the reference voltage Vref1, that is, the ratio of the reference voltage Vref2to the reference voltage Vref1can precisely reflect the duty ratio D of the constant Ton switching regulator, as expressed below:

Referring toFIG. 7B, the ramp generator153includes a current source Cs2whose current I is K-times of the reference voltage Vref, that is, I=K*Vref1, and the current source Cs2charges a capacitor C2having a capacitance of C to generate a voltage Vc across the capacitor C2. The comparator Com2compares the voltage Vc and the reference voltage Vref2. According to t=CV/I (time=capacitance*voltage/current), the on-time of the upper gate voltage Vug can be generated as below:

Ton=CK×reference⁢⁢voltage⁢⁢⁢Vref⁢⁢2reference⁢⁢voltage⁢⁢⁢Vref⁢⁢1=CK×D.
In other words, the comparator Com2(and thus the Ton calculation15) generates an output which has a correct duty ratio D such that the whole circuit can actually operate in a fixed-frequency.

FIGS. 9A-9Bshow a second embodiment of the Ton calculation circuit15. Referring toFIG. 9B, in this embodiment, the ramp signal generator includes a current source Cs3having a current I, and it charges a capacitor C2having a capacitance of C. In this embodiment the current source Cs3is an independent current source, that is, its current I does not need to correlate to the reference voltage Vref1. The on-time of the upper gate switch UG can be calculated by the following equation:

Ton=C×reference⁢⁢voltage⁢⁢Vref⁢⁢2I=C×reference⁢⁢voltage⁢⁢Vref⁢⁢1I×D=K′×D.
That is, because the capacitance C, the reference voltage Vref1and the current I are constants, it can be regarded as K′=C×Vref1/I; in this way, the comparator Com2(and thus the Ton calculation circuit15) outputs a signal which has a correct correlation with the duty ratio D such that the whole circuit can actually operate in a fixed-frequency.

In the embodiments shown inFIGS. 7A-7B,8and9A-9B, it should be explained that it is not necessary for the ground GND to be 0V; instead, it can be a relative ground provided in the circuit. As can be understood fromFIGS. 7A-7Band9A-9B, as long as the low operation level of the driver gate151, the low side of the low pass filter152and the low side of the capacitor C2are at the same level, the comparator Com2can generate the required output; therefore, it is not necessary for the relative ground GND to be absolute 0V.

Furthermore, the basic concept of the present invention is to find a signal which correlates to the correct duty ratio and let this signal pass through a driver with known high and low operational levels. In the above embodiments, an example of such signal which correlates to the correct duty ratio is the upper gate voltage Vug, but there are other signals which also correlate to the correct duty ratio, such as the low gate voltage Vlg, the input of the driver gate21(the output of the one-shot pulse generator12), etc. These signals can be used in the same or similar manner as the upper gate voltage Vug to generate the correct duty ratio, and the present invention should not be limited to the example of using the upper gate voltage Vug.

The present invention has been described in considerable detail with reference to certain preferred embodiments thereof. It should be understood that the description is for illustrative purpose, not for limiting the scope of the present invention. Those skilled in this art can readily conceive variations and modifications within the spirit of the present invention. For example, the power stage circuit30can be other power stage converters instead of the synchronous buck converter shown inFIG. 5, such as the synchronous or asynchronous buck, boost or inverting converter shown inFIGS. 10A-10F. As another example, a device which does not affect the primary functions of the circuits can be interposed between two devices or circuits shown to be in direct connection in the illustrated embodiments. As yet another example, the upper and lower gate power switches UG and LG in the power stage circuit30can be NMOSFETs or PMOSFETs or a combination of NMOSFET and PMOSFET; the meaning expressed by high level of a signal can instead be expressed by low level, with corresponding modifications in the circuit. As another example, the control circuit11and the one-shot pulse generator12can be integrated as one circuit, or arranged in different order. Thus, the present invention should cover all such and other modifications and variations, which should be interpreted to fall within the scope of the following claims and their equivalents.