According to one embodiment, an Ethernet communication device is configured to be connected to one or more twisted-pair links, each twisted-pair link having a particular capacity. The Ethernet communication device includes a physical interface transceiver. The physical interface transceiver sets a data transmission rate of the Ethernet communication device based on a total capacity of the twisted-pair links connected to the Ethernet communication device. The physical interface transceiver transmits data over the twisted-pair links connected to the Ethernet communication device at the data transmission rate.

BACKGROUND

Some types of Ethernet transceivers, for example gigabit Ethernet transceivers are configured to transmit data over copper cabling. Take, for example, 1000BASE-T Ethernet transceivers. Conventional 1000BASE-T Ethernet transceivers include a PHY (physical interface transceiver) having four transmit and receive sections for implementing full-duplex physical layer signaling. Gigabit Ethernet speed can be achieved by connecting the PHY to a Category-5 (CAT-5) type copper cable or higher having four different twisted-pair links. The transmit/receive sections of the PHY are coupled to different ones of the twisted-pair links. Each twisted-pair link has an individual capacity of approximately 250 Mbps (Mega bits per second) for cable lengths of about 100 m or less. Thus, a total link capacity of approximately 1000 Mbps is available when all four links are employed.

During operation, eight bits of data are transmitted each transmission window over the four twisted-pair links using a 125 MHz symbol rate. The twisted-pair links employ a five-point, 1-dimensional (1D) constellation having five symbol values (−2, −1, 0, +1, +2) encoded using three bits. The four twisted-pair links collectively form a 4-dimensional (4D) constellation where each twisted-pair link represents one of the dimensions. Thus, a 4D symbol is transmitted at gigabit Ethernet speeds by encoding eight bits of data into four symbols and transmitting each of the four symbols over a different one of the twisted-pair links in parallel.

Gigabit Ethernet transceivers are not always connected to cabling having gigabit transmission bandwidth. For example, Cateogry-3 (CAT-3) or other comparable 2-pair type of cabling cannot support gigabit Ethernet speeds. Conventional Ethernet PHYs have an auto-negotiation feature for detecting the type of cabling and configuring the PHYs accordingly. Typically, the data transmission rate of a gigabit Ethernet PHY is reduced from 1000 Mbps (1000BASE-T) to 100 Mbps (100BASE-TX) or 10 Mbps (10BASE-TX) when sub-gigabit capacity cabling is connected to the PHY. However, each twisted-pair link connected to the PHY still has a capacity of approximately 250 Mbps at cable lengths of about 100 m or less. Transceiver performance is not optimized when the PHY operates at 100 Mbps or 10 Mbps even though each twisted-pair link has a much greater capacity.

SUMMARY

According to the methods and apparatus taught herein, an Ethernet communication device is configured to be connected to one or more twisted-pair links, each twisted-pair link having a particular capacity. The Ethernet communication device includes a physical interface transceiver. The physical interface transceiver sets a data transmission rate of the Ethernet communication device based on a total capacity of the twisted-pair links connected to the Ethernet communication device. The physical interface transceiver transmits data over the twisted-pair links connected to the Ethernet communication device at the data transmission rate.

DETAILED DESCRIPTION

FIG. 1illustrates an embodiment of an Ethernet transceiver100which may for example be a gigabit Ethernet transceiver. The transceiver100is connected to copper cabling110and enables physical layer signaling with a device (not shown) coupled to the transceiver100at the far end of the cable110. The copper cable110includes one or more (e.g., 4 for CAT5 cabling) twisted-pair links120for carrying data between the transceiver100and the far end device. In one embodiment, a transformer130electromagnetically couples each twisted-pair link120to the transceiver100. The transceiver100is also coupled to a MAC (media access controller)140which provides data link layer (i.e., layer-2) functionality. During transmit operations, the MAC140sends data frames to the transceiver100. The transceiver100encodes the data frames into symbols and transmits the symbols over the cable110to the far end device. Conversely, the transceiver100receives data symbols from the far end device during receive operations and decodes the symbols. The decoded data is sent to the MAC140as frames for higher-layer processing.

In some applications, the copper cabling110includes enough twisted-pair links120of sufficient capacity to enable gigabit Ethernet speeds (i.e., 1000 Mbps or greater). For example, the cabling110may be a CAT-5 type cable or higher that includes at least four twisted-pair links120having a total capacity of 1000 Mbps or greater. In other applications, the copper cabling110does not include enough twisted-pair links120of sufficient capacity to enable gigabit Ethernet speeds. For example, the cabling110may be a CAT-3 type cable that includes less than four twisted-pair links120. Conventional gigabit Ethernet transceivers reduce their data rate to 100 Mbps or 10 Mbps when connected to copper cabling having a total capacity less than 1000 Mbps. However, sub-gigabit capacity cabling often includes one or more twisted-pair links each having a capacity greater than that utilized by conventional transceivers when operating at 100 Mbps or 10 Mbps. For example, some types of CAT3 cabling comprise two to four twisted-pair links each having a capacity greater than 100 Mbps when the cable length is about 100 m or less. Thus, the cable has a total capacity far exceeding 100 Mbps, but less than 1000 Mbps. This additional bandwidth typically goes unutilized by conventional gigabit Ethernet transceivers when operated at a data rate of 100 Mbps or lower.

The Ethernet transceiver embodiments disclosed herein utilize this additional cabling capacity when operating at sub-gigabit data rates. The transceiver100is configurable to be connected to one or more twisted-pair links120of a cable110. In one embodiment, the cable configuration is determined by the transceiver100using any appropriate detection method, e.g., auto-negotiation, cable diagnostics or link training. In another embodiment, the transceiver100is notified of the cable configuration via higher-layer signaling, e.g., via the MAC140. In yet another embodiment, the transceiver is pre-configured for a particular number of twisted pair links120.

Data rate control logic150included in the Ethernet transceiver100sets the transceiver data transmission rate based on the total capacity of the twisted-pair links120connected to the transceiver100, e.g., as illustrated by Step200ofFIG. 2. This way, the data transmission rate is not arbitrarily set to 100 Mbps or lower when the cabling bandwidth limits transceiver performance to sub-gigabit Ethernet speeds. Instead, the data transmission rate of the transceiver100is a function of the total available cable capacity. This way, more of the cable bandwidth is utilized when the transceiver100operates in a sub-gigabit Ethernet mode. In one embodiment, each available twisted pair link120is set to a full-duplex transmission rate of 250 Mbps similar to the operation of a conventional Gigabit Ethernet Transceiver on a per twisted pair basis. Data is transmitted over the twisted-pair links120connected to the transceiver100at the data transmission rate set by the data rate control logic150, e.g., as illustrated by Step202ofFIG. 2.

In one embodiment, the transceiver100has a data rate of 1000 Mbps or greater when the cable110has at least four twisted-pair links120each having a capacity of about 250 Mbps. The transceiver data rate is decreased when the cable110has less than four twisted-pair links120because the total capacity of the cable110is below 1000 Mbps. However, transceiver performance is not arbitrarily decreased, e.g., to 100 Mbps or 10 Mbps as is conventionally done. Instead, the transceiver data rate corresponds to the number of twisted-pair links120connected to the transceiver1100and their respective capacity. In one embodiment, the data transmission rate of the transceiver100is set to approximately 250 Mbps when a single twisted-pair link120is connected to the transceiver100and is increased in approximately 250 Mbps increments for each additional twisted-pair link120connected to the transceiver100. This way, the transceiver100operates at about 250 Mbps instead of 100 Mbps (or lower) when a single twisted-pair link120is connected to the transceiver100, about 500 Mbps when two twisted-pair links120are connected to the transceiver100and about 750 Mbps when three twisted-pair links120are connected to the transceiver100.

Alternatively, or in addition, the cable configuration information can be used to set the symbol transmission rate (i.e., Baud) of the transceiver100. Symbol rate control logic160included in the transceiver100sets the transceiver Baud based on the lengths of the twisted-pair links120connected to the transceiver100, e.g., as illustrated by Step300ofFIG. 3. This, way the symbol transmission rate of the transceiver100can be adjusted accordingly to accommodate different length cables. In one embodiment, the symbol rate control logic160sets the symbol transmission rate to a default value of approximately 125 MBd (1.25×108Baud) when the cable110is about 100 m or less. The symbol rate is decreased when the cable110is longer. This way, cables of different length can be readily used without adversely affecting transceiver operation. Data symbols are transmitted over the twisted-pair links120connected to the transceiver100at the symbol transmission rate set by the symbol rate control logic160, e.g., as illustrated by Step302ofFIG. 3.

FIG. 4illustrates an embodiment of the Ethernet transceiver100. According to this embodiment, a PHY (physical interface transceiver)400controls physical layer signaling. The PHY400includes an analog signal processor (ASP)402coupled to each physical layer I/O (input/output)404of the PHY400. Each physical layer I/O404is also electromagnetically coupled to an I/O406of the transformer130. The other end of the transformer130has I/Os408for connecting to one or more twisted-pair links120of the copper cabling110. Each ASP402is coupled to a corresponding digital signal processor (DSP)410via a media signal router (MSR)412that functions as a multiplexer. As such, each DSP410can be multiplexed to any one of the ASPs402and vice-versa. Each ASP402/DSP410combination forms one transmit and receive section of the PHY400. In one embodiment, the PHY400includes four transmit and receive sections for supporting gigabit Ethernet speeds. The DSPs410perform functions like PMA (physical medium attachment) framing, octet synchronization and detection, and scrambling/descrambling. The ASPs402provide the physical signaling interface with the copper cabling. The ASPs402and DSPs410may include digital adaptive equalizers, encoders, decoders, echo cancellers, crosstalk cancellers, phase lock loop(s), line drivers, etc. and any accompanying support circuitry. The PHY400also includes PCS (physical coding sublayer) logic414for performing coding such as Trellis/Convolutional coding and auto-negotiation, including determining the cable capacity in one embodiment.

During operation, the PHY400receives layer-2 data frames from the MAC140. The PHY400codes the frames into data symbols. In one embodiment, eight bits of data are encoded into four symbols. The encoded data are transmitted at a rate corresponding to the number of twisted-pair links120connected to the PHY400. The data rate control logic150sets the data rate based on the total capacity of the twisted-pair links120connected to the PHY400. In one embodiment, the data rate is set to 1000 Mbps or above when four twisted-pair links120are connected to the PHY400. Accordingly, all four ASP402/DSP410sections are active. The data rate is lowered to approximately 500 Mbps when two twisted-pair links120are connected to the PHY400. Accordingly, two of the four ASP402/DSP410sections are active. One of the ASP402/DSP410sections transmits the encoded data at a rate of approximately 250 Mbps when a single twisted-pair link120is connected to the PHY400.

The PHY400groups the symbols to be transmitted based on the number of twisted-pair links120connected to the PHY400. Each group of symbols is then transmitted over a different one of the twisted-pair links120. When four links120are present, each symbol is transmitted over a different one of the links120in parallel. Half of the symbols are transmitted in serial over a first one of the twisted-pair links120and the other half of the symbols transmitted in serial over a second one of the twisted-pair links120when two links120are connected to the PHY400. All of the symbols are transmitted in serial over the same twisted-pair link120when a single link120is connected to the PHY400. The symbol rate control logic160can similarly adjust the symbol rate based on the lengths of the twisted-pair links120connected to the PHY400. This way, the cabling capacity is optimally utilized by the PHY400regardless of how many twisted-pair links120are connected to the PHY400and/or cable length.

In some applications such as an Ethernet switch SOC (system-on-chip), data rate adjustments made by the PHY400are also made at the MAC-PHY interface416to ensure proper system operation. In one embodiment, the PCS logic414sets the data transmission rate at the layer-2 interface416based on the PHY data rate. Accordingly, if the PHY data rate is set below 1000 Mbps, the MAC-PHY interface416also correspondingly runs below 1000 Mbps. This prevents data transmission errors between the MAC140and PHY400. In other applications, the layer-2 interface416between the MAC140and PHY400is a standard interface such as an MII (Media Independent Interface) or GMII (gigabit MII) interface that does not support sub-gigabit data rates. Accordingly, data rate adjustments made by the PHY400cannot be equalized at the MAC-PHY interface416when the MAC-PHY interface data rate is fixed. In one embodiment, data transmitted between the MAC140and PHY400is buffered to account for any data rate differences that may exist at the MAC-PHY layer-2 interface416.

FIG. 5illustrates an embodiment of the Ethernet transceiver100including buffer circuitry500coupled between the MAC140and PHY400. The buffer circuitry500equalizes the data rate differences between the PHY400and the MAC-PHY layer-2 interface416. In one embodiment, the data rate of the MAC-PHY layer-2 interface416is fixed at 1000 Mbps or greater. Depending on the type of copper cabling110coupled to the PHY400, the PHY400may have a data rate below 1000 Mbps as described above. Accordingly, transmit and receive errors will occur at the MAC-PHY boundary416unless the data rate discrepancy is resolved. To this end, the buffer circuitry500includes a transmit buffer510, a receive buffer520and buffer control logic530. The buffer control logic530manages operation of the transmit and receiver buffers510,520so that data underflow/overflow errors do not occur between the MAC140and PHY400, making it appear to the MAC140as if the PHY400is running at 1000 Mbps even when it is not.

During receive operations, the PHY400processes symbols received from a far end device over the copper cabling110. The PHY400decodes the symbols into data bits and sends the data to the MAC140in frames. The MAC-PHY interface416operates at a fixed data rate regardless of the PHY data rate. As such, enough of each frame received by the PHY400is stored in the receive buffer520before the transceiver100begins to transmit the frame data from the receive buffer520to the MAC140. This way, a frame transmission to the MAC140is not disrupted by the receive buffer520running empty before the MAC140receives the entire frame. Otherwise, the MAC will detect a frame error when only part of the frame is received before the receive buffer runs520empty. The amount of frame data stored in the receive buffer520before the buffer control logic530allows data to flow from the receive buffer520to the MAC140depends on the data rate of the PHY400. The slower the PHY400operates, the more frame data that is buffered before frame transmission to the MAC begins. Thus, the receive buffer520does not run empty before the entire frame is transmitted to the MAC140. In one embodiment, a received frame is fully buffered before the transceiver100begins to transmit the frame to the MAC140.

During transmit operations, the PHY400processes data frames sent by the MAC140. The PHY400encodes the data frames into symbols and transmits the symbols to a far end device over the copper cabling110. Again, the MAC-PHY interface416operates at a fixed data rate regardless of the PHY data rate. As such, the transceiver100stores data frames received from the MAC140in the transmit buffer510. The buffered data is sent to the PHY400without delay where it is transmitted over the copper cabling110. The buffer control logic530manages the flow of data into and out of the transmit buffer510. When the PHY400operates slower than the MAC-PHY layer-2 interface416, the transmit buffer510fills-up faster than the PHY400can process the frame data. For example, if the layer-2 interface416operates at 1000 Mbps and the PHY400operates at 500 Mbps, the transmit buffer510fills-up twice as fast as the PHY400can process data retrieved from the buffer510.

The buffer control logic530monitors the transmit buffer capacity to prevent buffer overflow errors. When the capacity of the transmit buffer510falls below a threshold, the buffer control logic530indicates this condition to the MAC140. In response, the MAC140does not send a new frame until instructed otherwise. In this operational mode, the MAC-PHY interface416is operated in half-duplex mode while the PHY400can still operate the media interface in full-duplex mode. In one embodiment, the transceiver100activates a collision signal (e.g., the COL collision detect signal) transmitted to the MAC140for indicating when the transmit buffer capacity falls below the threshold. The collision signal virtually indicates to the MAC140that the physical medium (i.e., cable110) is busy. The collision signal is conventionally activated to avoid collisions during half-duplex operation when the PHY400is receiving symbols. In response, the MAC140defers sending new frames to the PHY400until the collision signal is deactivated. According to this embodiment, the PHY400does not actually operate in half-duplex mode. Instead, the PHY400continues to operate in full-duplex mode. Only the MAC-PHY interface416operates in half-duplex mode when the collision signal is activated. Accordingly, the MAC ‘sees’ a virtual PHY400operating at 1000 Mbps in half-duplex mode even though the PHY400actually operates in full-duplex mode. The PHY400continues to transmit data retrieved from the transmit buffer510while the MAC140waits for the collision signal to be deactivated before sending new frame data. Thus, the collision signal is used by the transceiver100as a backpressure mechanism for preventing transmit buffer510overflow instead of for avoiding collisions. In another embodiment, Flow-Control can be used by means of Pause-Frames. This allows the MAC140interface to continue full-duplex mode operation.

As the PHY400continues to transmit the buffered data in full-duplex mode, the transmit buffer510empties. Eventually, the storage capacity of the transmit buffer510increases above a certain threshold indicating that the buffer510now has sufficient capacity to begin receiving new frame data from the MAC140. In response, the transceiver100deactivates the collision signal, indicating to the MAC140that new frames can be sent. To prevent frequent activation and deactivation of the collision signal, the transceiver100may use different thresholds for determining when to activate and deactivate the collision signal, respectively. Broadly, the buffer circuitry500enables the transceiver100to equalize data rate differences between the PHY400and MAC140when the MAC-PHY interface416does not support sub-gigabit data rates or is otherwise fixed.

According to one embodiment, the Ethernet transceiver100communicates its sub-gigabit operating states (e.g., 250 Mbps, 500 Mbps, etc.) to the far end device coupled to the other end of the copper cabling110, e.g. when insufficient number of twisted pair links120are available caused by legacy or limited space cabling infrastructure. This way, the cabling capacity can be optimally utilized even when the capacity is less than 1000 Mbps. In one embodiment, the transceiver100communicates its transmission capability to the far end device by embedding the transmission information in one or more Next Pages exchanged with the far end device. Next Pages, extending the auto-negotiation feature, is a mechanism by which interconnected Ethernet devices can exchange information. Each Next Page includes code fields in which information such as the data and/or symbol rate capability of the transceiver100can be embedded and communicated to the far end device. The far end device can similarly communicate its transmission capability to the transceiver100. The least common denominator of the data and/or symbol transmission rate can be implemented by the interconnected devices. If the far end device does not support Next Page exchanges or does not support the PHY140modes identified herein, the data transmission rate can be set to a default of 10baseT or 100baseT. As such, the enhanced PHY140is interoperable with far end devices which cannot accommodate non-standard Ethernet speeds such as 250 Mbps or 500 Mbps.