Electro-optical device and electronic apparatus

An electro-optical device comprising a first substrate, a second substrate facing the first substrate, a light-emitting layer arranged between the first substrate and the second substrate which is capable of emitting light from a plurality of pixels including at least a first subpixel and a second subpixel, the first subpixel forming a first image and the second subpixel forming a second image, and a light-shielding layer arranged between the second substrate and the light-emitting layer having an opening which is capable of transmitting light emitted from a first subpixel in the light-emitting layer through the second substrate to a first range and transmitting light emitted from the second subpixel of the light-emitting layer through the second substrate to a second range.

The entire disclosures of Japanese Patent Application Nos. 2008-001896, filed Jan. 9, 2008 and 2008-001899, filed Jan. 9, 2008 are expressly incorporated herein by reference.

BACKGROUND OF THE INVENTION

1. Technical Field

The present invention relates to electro-optical devices and electronic apparatuses. More specifically, the present invention relates to electro-optical devices and electronic apparatuses capable of displaying a plurality of displays in different directions.

2. Related Art

One example of an electro-optical device currently known in the art is an organic electroluminescent device, known as an organic EL device. For example, one such device described in Japanese Patent Application No. JP-A-2001-318341 discloses an organic EL display capable of displaying a stereoscopic image by alternately blocking light emitted from an organic EL element using a pair of adjacent liquid crystal elements.

The display includes an organic EL element and a pair of liquid crystal elements, along with a mechanism for displaying two different images in two directions, and will be described with reference to the cross-sectional views shown inFIGS. 27A and 27B. As shown inFIG. 27A, the display600includes an organic EL element601and a pair of liquid crystal elements603. The pair of liquid crystal elements603face the organic EL element and includes a first liquid crystal sub-element603aand a second liquid crystal sub-element603b.

Because the second liquid crystal sub-element603bblocks a portion of the light emanating from the organic EL element601, the light is displayed at a first range605. In this case, when the organic EL element601forms a first image, the first image can be viewed from the first range605.

As shown inFIG. 27B, because the first liquid crystal sub-element603ablocks a portion of the light emanating from the organic EL element601, the light is displayed a second range607. In this case, when the organic EL element601forms a second image, the second image can be viewed from the second range607.

The first and second images can be viewed as a continuous image by alternately switching which of the first and second liquid crystal subelements603aand603bare blocking the display, so that a first and second image may be displayed by the organic EL element601.

As shown inFIG. 28A, there is a subrange611in which the first range605and the second range607overlap. As such, a superimposed image of the first and second images may be seen in the subrange611.

Only the first image can be seen in a subrange613aportion of the first range605, which excludes the subrange611. Similarly, only the second image can be seen in the subrange613bof the second range607, which excludes the subrange611from the second range607. The subrange613aand the subrange613bare referred to as a suitable viewing range613aand a suitable viewing range613b, respectively.

As shown inFIG. 28B, the suitable viewing ranges613aand613bcan be extended by reducing the distance L between the organic EL element601and the pair of liquid crystal elements603.

In the display described in JP-A-2001-318341, a glass substrate is arranged between the organic EL element and the liquid crystal elements. In order to reduce the distance L in the display, the thickness of the glass substrate must be reduced. The reduction in the thickness of the glass substrate, however, leads to many disadvantages, such as a reduction in yield, an increase in production time, and a reduction in quality, due to a reduction in the strength of the substrate.

That is, the display in the related art has the unsolved problem of difficulty in extending the suitable viewing range.

BRIEF SUMMARY OF THE INVENTION

An advantage of some aspects of the invention is that it provides the following aspects and embodiments.

A first aspect of the invention is an electro-optical device comprising a first substrate, a second substrate facing the first substrate, a light-emitting layer arranged between the first substrate and the second substrate which is capable of emitting light from a plurality of pixels including at least a first subpixel and a second subpixel, the first subpixel forming a first image and the second subpixel forming a second image, and a light-shielding layer arranged between the second substrate and the light-emitting layer having an opening which is capable of transmitting light emitted from a first subpixel in the light-emitting layer through the second substrate to a first range and transmitting light emitted from the second subpixel of the light-emitting layer through the second substrate to a second range.

Thus, the first image formed by the first subpixel can be seen in the first range. The second image formed by the second subpixel can be seen in the second range. In the electro-optical device, therefore, the directional display can be performed in at least two directions.

The light-shielding layer is arranged between the second substrate and the light-emitting layer. That is, the light-shielding layer is arranged between the first substrate and the second substrate. Thus, the distance between the plurality of pixels and the light-shielding layer can be reduced as compared to the case where the light-shielding layer is arranged outside the first substrate and the second substrate. In the electro-optical device, therefore, suitable viewing ranges in the directions in which the directional display is performed can be easily extended.

DESCRIPTION OF EXEMPLARY EMBODIMENTS

A display including an organic EL device, which is an example of an electro-optical device capable of performing aspects of the invention, will be described with reference to the attached drawings.

In one embodiment of the invention, the display1includes a display surface3as shown inFIG. 1.

The display1includes a plurality of pixels5. The plurality of pixels5are arranged in a display region7in the X and Y directions in order to form a matrix M in which the X direction defines the row direction and the Y direction defines the column direction. In the display1, the plurality of pixels5form the matrix M in which the number of rows is m, where m represents an integer of 1 or more, and the number of columns is 2×n, where n represents an integer of 1 or more. The display1can display an image on the display surface3by selectively emitting light from the plurality of pixels5through the display surface to the outside of the display1. The display region7indicates a region where an image can be displayed. InFIG. 1, the pixels5are exaggerated in order to facilitate understanding of the structure.

As shown inFIG. 2which is a cross-sectional view taken along line II-II inFIG. 1, the display1includes an element substrate11and a sealing substrate13.

The element substrate11includes switching elements, described below, which correspond to the plurality of pixels5on the display surface3, i.e., on the side of display where the sealing substrate13is disposed.

The sealing substrate13faces the element substrate and is located at a position which is closer to the display surface3than the element substrate11. The sealing substrate13includes a light-shielding film, described more fully below, located adjacent to a bottom surface15, which comprises the back surface of the display surface3of the display1, which is adjacent to the element substrate11.

A portion between the element substrate11and the sealing substrate13is sealed with a seal17surrounding the display region7at a position inside the perimeter of the display1.

As shown inFIG. 3, each of the pixels5in the display1is configured to emit light through the display surface3in such a manner that the color of the light is selected from red (R), green (G), and blue (B). That is, the plurality of pixels5constituting the matrix M are divided into pixels5rthat emit red light, pixels5gthat emit green light, and pixels5bthat emit blue light.

Red (R) is not limited to a pure red hue but includes orange and the like. Green (G) is not limited to a pure green hue but includes bluish green, yellowish green, and the like. Blue (B) is not limited to a pure blue hue but includes bluish purple, bluish green, and the like. More specifically, red (R) light is defined as light having a peak wavelength of 570 nm or more and within the visible region. Green (G) light is defined as light having a peak wavelength of 500 nm to 565 nm, and blue (B) light is defined as light having a peak wavelength of 415 nm to 495 nm.

In the matrix M, the plurality of pixels5aligned at the same position in the Y direction constitute one pixel column21. The plurality of pixels5aligned at the same position in the X direction constitute one pixel row23. Each of the pixels5in one pixel column21are configured to emit R, G, or B light. That is, the matrix M includes pixel columns21reach consisting of a plurality of red pixels5raligned at the same position in the Y direction, pixel columns21geach constituted by the plurality of green pixels5galigned in the same position in the Y direction, and pixel columns21beach constituted by the plurality of blue pixels5baligned in same position in the Y direction. In the display1, two pixel columns21rof red pixels, two pixel columns21gof green pixels, and two pixel columns21bof blue pixels are arranged in a repeating pattern in the X direction.

The plurality of pixels5of the matrix M are divided into a plurality of first pixels51and a plurality of second pixels52in the display1, as shown inFIG. 4. The display1can display a first image on the display surface3by selectively emitting light from the plurality of first pixels51to the outside of the display1through the display surface3. Furthermore, the display1can display a second image on the display surface3by selectively emitting light from the plurality of second pixels52to the outside of the display1through the display surface3.

The first image and the second image may be the same image or may be different. Hereinafter, the expressions “pixels5”, “pixels5r,5g, and5b”, and “first pixels51and second pixels52” may be used, depending on the context of the description. In the case where R, G, and B of the first and second pixels51and52are distinguished, the expressions “first pixels5r1,5g1, and5b1” and “second pixels5r2,5g2, and5b2” may also be used.

In the display1, the first pixels51and the second pixels52are arranged in an alternating configuration in the X direction. One pixel column21is constituted by a plurality of first pixels51or a plurality of second pixels52. That is, the matrix M includes pixel columns211and212, where the pixel columns211are formed of the plurality of first pixels51aligned at the same position in the Y direction, and each of the pixel columns212are formed of the plurality of second pixels52aligned at the same position in the Y direction. Hereinafter, the expressions “pixel column21”, “pixel columns21r,21g, and21b”, and “pixel columns211and212” may be used to describe the columns of pixels. In the case where R, G, and B of the pixel columns211and212are distinguished, the expressions “pixel columns21r1,21g1, and pixel columns21b1” and “pixel columns21r2,21g2, and21b2” may also be used.

The plurality of pixels5constituting the matrix M are divided into a plurality of pixel groups25in the display1, with each pixel group25being constituted by adjacent pixels5, such as first pixel51and the adjacent second pixel52in the X direction. The order of the sequence of the first and second pixels51and52in each of the pixel groups25is the same in all the pixel groups25. As shown inFIG. 4, in the display1, the first pixels51and the second pixels52are arranged in this order from left to right in the X direction. Either the first pixel51or the second pixel52may be located on the left side or the right side as long as the order of the sequence of the first and second pixels51and52is the same among the plurality of pixel groups25.

In the display1, the first pixels51and the second pixels52constituting the pixel groups25are each configured to emit R, G, or B light. That is, the first pixels5r1and the second pixels5r2constitute one pixel group25. The first pixels5g1and the second pixels5g2constitute one pixel group25. The first pixels5b1and the second pixels5b2constitute one pixel group25. Hereinafter, in the case where R, G, and B pixel groups25are distinguished from the pixel groups25as a whole, the expressions “pixel groups25r”, “pixel groups25g”, and “pixel groups25b” will be used.

In the matrix M, as shown inFIG. 5, the plurality of pixel groups25are arranged in the X and Y directions. That is, the plurality of pixel groups25are arranged in a matrix.

In the display1, as described above, the plurality of pixels5form the matrix M in which the number of rows is m and the number of columns is 2×n. Thus, the plurality of pixel groups25form an m×n matrix.

In the display1, as shown inFIG. 6which illustrates a circuit configuration, each of the pixels5includes a select transistor27, a drive transistor29, a capacitor element31, a pixel electrode33, an organic layer35, and a common electrode37. The select transistor27and the drive transistor29are formed of a thin-film transistor (TFT) element and also serve as switching elements. In the display1, the select transistor27is formed of an N-channel TFT element. The drive transistor29is formed of a P-channel TFT element.

The display1includes m scan lines GT1, m scan lines GT2, n data lines SI1, n data lines SI2, and m power lines PW.

Hereinafter, a particular scan line GT1is identified, the expression “scan lines GT1(h)” may be used, wherein h represents an integer of 1 to m. Similarly, when a particular scan line GT2is identified, the expression “scan lines GT2(h)” may be used. Further, when a particular power line is identified, the expression “power lines PW(h)” may be used.

When a particular data lines SI1is identified, the expression “data lines SI1(j)” may be used, wherein j represents an integer of 1 to n. When a particular data line SI2is identified, the expression “data lines SI2(j)” may be used, wherein j represents an integer of 1 to n.

The m scan lines GT1and the m scan lines GT2extend in the X direction and are separated apart from one another a predetermined distance in the Y direction. The n data lines SI1and the n data lines SI2extend in the Y direction and are formed apart from one another a predetermined distance in the X direction. The m scan lines GT1and the n data lines SI1are arranged in a lattice. The first pixels51are arranged at positions corresponding to intersections between the scan lines GT1and the data lines SI1.

Similarly, the m scan lines GT2and the n data lines SI2are arranged in a lattice. The second pixels52are arranged at the intersections of the scan lines GT2and the data lines SI2.

The scan lines GT1and the scan lines GT2comprise the pixel rows23(seeFIG. 3). As shown inFIG. 6, each of the scan lines GT1corresponds to a first pixel51in a corresponding pixel row23. Each of the scan lines GT2corresponds to a second pixel52in a corresponding pixel row23.

The data lines SI1and the data lines SI2comprise the pixel columns21(seeFIG. 3). As shown inFIG. 6, each of the data lines SI1corresponds to a first pixel51in a corresponding pixel column21. That is, each of the data lines SI1corresponds to a pixel column211(seeFIG. 4). Each of the data lines SI2corresponds to a second pixel52in a corresponding pixel column21. That is, each of the data lines SI2corresponds to a pixel column212(seeFIG. 4).

As shown inFIG. 6, the m power lines PW extend in the X direction and are separated by a predetermined distance in the Y direction. Each of the power lines PW corresponds to a pixel row23(seeFIG. 3).

The gate electrode of each of the select transistors27shown inFIG. 6is electrically connected to a corresponding scan line GT1or GT2. The source electrode of each of the select transistors27is electrically connected to a corresponding data line SI1or SI2. The drain electrode of each of the select transistors27is electrically connected to the gate electrode of a corresponding drive transistor29and one electrode of a corresponding capacitor element31.

The other electrode of the corresponding capacitor element31and the source electrode of the corresponding drive transistor29are electrically connected to a corresponding power line PW.

The drain electrode of each of the drive transistors29is electrically connected to a corresponding pixel electrode33. Each pixel electrode33and common electrode37form a pair of electrodes, the pixel electrode33serving as a positive electrode, and the common electrode37serving as a negative electrode.

The common electrode37is arranged across the plurality of pixels5constituting the matrix M and operates across the plurality of pixels5.

Each of the organic layers35arranged between the corresponding pixel electrode33and the common electrode37are composed of an organic material and include a light-emitting sublayer.

Scan signals are supplied to the scan lines GT1and GT2connected to the select transistors27, so as to turn on the select transistors27. At this point, data signals are supplied through the data lines SI1and SI2connected to the select transistors27to turn on the drive transistors29. Gate potentials of the drive transistors29are held only for a certain period of time by holding potentials of the data signals across the capacitor elements31for a predetermined period of time, so that the drive transistors29remain in the ON state for a predetermined period of time.

When the drive transistors29remain in the ON state, in response to the gate potentials of the drive transistors29, currents flow from the power lines PW to the common electrode37through the pixel electrodes33and the organic layers35. The light-emitting sublayers included in the organic layers35emit light beams having luminance levels in proportional to the currents flowing through the organic layers35. The display1is one of top-emission organic EL devices in which light emanating from the light-emitting sublayers in the organic layers35emerges from the display surface3through the sealing substrate13.

The structures of the element substrate11and the sealing substrate13will be described in more detail below.

The element substrate11includes a first sub-substrate41as shown inFIG. 7, which is a cross-sectional view taken along line VII-VII inFIG. 4.

The first sub-substrate41is composed of a light-transmitting material such as glass or quartz. The first sub-substrate41has a first surface42afacing toward the display surface3and a second surface42bfacing toward the bottom surface15.

A gate insulating film43is arranged on the first surface42aof the first sub-substrate41. An insulating film45is arranged on the surface of the gate insulating film43adjacent to the display surface3. An insulating film47is arranged on the surface of the insulating film45adjacent to the display surface3. An insulating film49is arranged on the surface of the insulating film47adjacent to the display surface3.

First semiconductor layers51corresponding to the drive transistors29of the pixels5and second semiconductor layers53corresponding to the select transistors27of the pixels5are provided on the first surface42aof the first sub-substrate41.

As shown inFIG. 8, the first semiconductor layers51and the second semiconductor layers53are each arranged so as to correspond to a pixel5.FIG. 7is a cross-sectional view taken along line VII-VII inFIG. 8.

The first semiconductor layers51and the second semiconductor layers53are arranged adjacent to each other in the Y direction at predetermined intervals in the Y direction.

Each of the first semiconductor layers51includes a source region51a, a channel region51b, a drain region51c, and an electrode portion51d. The source region51a, the channel region51b, and the drain region51care aligned in the X direction. The electrode portion51dand the channel region51bare aligned in the Y direction at predetermined intervals in the Y direction. The electrode portion51dand the drain region51care aligned in the Y direction at predetermined intervals in the Y direction. The electrode portion51dand the source region51aare connected and arranged adjacent to each other in the X direction.

Each of the second semiconductor layers53includes a source region53a, channel regions53b, and a drain region53c. The source region53a, the channel region53b, and the drain region53care aligned in the X direction.

The contours of the first semiconductor layers51of each pixel group25are rotationally symmetric between the first and second pixels51and52when viewed from above. Similarly, the contours of the second semiconductor layers53are rotationally symmetric between the first and second pixels51and52when viewed from above.

As shown inFIG. 7, surfaces of the first semiconductor layers51and the second semiconductor layers53adjacent to the display surface3are covered with the gate insulating film43. The gate insulating film43may be composed of, for example, silicon oxide.

As shown inFIG. 9which is a plan view, island electrodes55overlapping the first semiconductor layers51, the scan lines GT1and GT2, and the data lines SI1and SI2are provided on the surface of the gate insulating film43adjacent to the display surface3.

As shown inFIG. 10which is a plan view, each of the island electrodes55includes a gate electrode portion55aand an electrode portion55b. The gate electrode portion55aand the electrode portion55bare connected and arranged in the Y direction.

Each of the gate electrode portions55ais superposed on the channel region51bof a corresponding first semiconductor layer51, as shown inFIG. 8. Each of the electrode portions55bare superposed on the electrode portion51dof a corresponding first semiconductor layer51in plan. The electrode portion51dand the electrode portion55bpartially constitute a corresponding capacitor element31.

Each of the scan lines GT1and GT2have two gate electrode portions57for a corresponding pixel5, the two gate electrode portions57extending toward the corresponding pixel5in the Y direction. The gate electrode portions57are superposed on the channel regions53bof the second semiconductor layers53shown inFIG. 8.

Each of the island electrodes55in a corresponding pixel5are adjacent to a corresponding data line SI1or SI2which correspond to a pixel5in the X direction. In the display1, two island electrodes55are located between the data line SI1corresponding to the first pixel51and the data line SI2corresponding to the second pixel52in each of the pixel groups25in the X direction.

Furthermore, the two island electrodes55in each of the pixel groups25are located in the Y direction between the scan line GT1corresponding to the first pixel51and the scan line GT2corresponding to the second pixel52in the pixel group25.

Examples of materials constituting the island electrodes55, the scan lines GT1and GT2, and the data lines SI1and SI2include metals such as aluminum, copper, molybdenum, tungsten, and chromium, and alloys containing these metals. As shown inFIG. 7, surfaces of the gate electrode portions55a, including the island electrodes55, the gate electrode portions57, including the scan lines GT1and GT2, and the data lines SI1and SI2adjacent to the display surface3are covered with the insulating film45.

As shown inFIG. 11which is a plan view, the insulating film45has contact holes CH1, CH2, CH3, CH4, CH5, CH6, and CH7corresponding to each of the pixels5.

Each of the contact holes CH1is arranged in a portion of the insulating film45which is superposed on a corresponding data lines SI1or SI2as viewed from above. Each contact hole CH1faces the source region53aof a corresponding second semiconductor layer53in the X direction. Each contact hole CH1communicates with the corresponding data line SI1or SI2.

Each of the contact holes CH2are arranged in a portion of the insulating film45superposed over a corresponding source regions53a. Each contact hole CH2is adjacent to a corresponding contact holes CH1in the X direction. Each contact hole CH2communicates with the source region53aof a second semiconductor layer53.

Each of the contact holes CH3are arranged in a portion of the insulating film45superposed over a corresponding drain region53c. Each contact hole CH3communicates with the drain region53cof a corresponding second semiconductor layer53.

Each contact hole CH4is arranged in a portion of the insulating film45over on a corresponding electrode portion55b. Each contact hole CH4is adjacent to a corresponding contact hole CH3in the Y direction. Each contact hole CH4communicates with a corresponding electrode portion55b.

Two contact holes CH5are arranged in each portion of the insulating film45above the drain region51cof a corresponding first semiconductor layer51. Each of the contact holes CH5communicate with the drain region51cof the corresponding first semiconductor layer51.

Each of the contact holes CH6are arranged in a portion of the insulating film45above a corresponding data line SI1or SI2. Each contact hole CH6is arranged at a position facing a corresponding gate electrode portion55awith a corresponding source regions51aprovided therebetween in the X direction. Each contact hole CH6communicates with the corresponding data line SI1or SI2.

Two contact holes CH7are arranged in each portion of the insulating film45above a corresponding source region51a. Each of the contact holes CH7are arranged between a corresponding data line SI1or SI2corresponding to the corresponding pixel5and the electrode portion55bof a corresponding island electrode55, and face the corresponding electrode portion55bin the X direction. Each contact hole CH7communicates with the source region51aof a corresponding first semiconductor layer51.

As shown inFIG. 12which is a plan view, the power lines PW, drain electrodes59, relay electrodes61, and relay electrodes63are arranged on the surface of the insulating film45, having the contact holes CH1to CH7, adjacent to the display surface3.

Each of the power lines PW extends across a corresponding pixel row23(seeFIG. 3) in the X direction. As shown inFIG. 12, each power line PW has a width in the Y direction which is sufficient to cover two contact holes CH7aligned in the Y direction. Each power line PW covers the plurality of contact holes CH7arranged in a corresponding pixel row23.

In each of the pixels5, the power lines PW are located between a corresponding select transistor27and drive transistor29. In other words, each of the select transistors27faces a corresponding drive transistor29with a power line PW provided therebetween. The source region53a, the channel regions53b(seeFIG. 8), and the drain region53cof each of the select transistor27are located outside a corresponding power line PW. The channel region51b(seeFIG. 8), the drain region51c, and part of the source region51aof each of the drive transistors29are located outside a corresponding power lines PW in plan.

As shown inFIG. 12, in each of the pixel groups25, the select transistor27located in one of the first and second pixels51or52is adjacent to the drive transistor29located in the adjacent pixel51or52in the X direction. In the first and second pixels51and52of each pixel group25, one select transistor27lies on the opposite side of the power line PW than the other select transistor27lies in the adjacent first or second pixel51and52in the Y direction. Similarly, in the first and second pixels51and52of each pixel group25, one drive transistor29lies on the opposite side of the power line PW opposite than the drive transistor29lies in the adjacent first or second pixel51and52in the Y direction.

As shown inFIG. 13which is a cross-sectional view taken along line XIII-XIII inFIG. 12, each of the power lines PW are connected to the source regions51aof the first semiconductor layers51through the contact holes CH7. In the display1, portions which are located in the contact holes CH7and between the power lines PW and the source regions51aare referred to as source electrode portions65.

As described above, each of the contact holes CH7are arranged between a corresponding data line SI1or SI2corresponding to a pixel5and the electrode portion55bof a corresponding island electrode55. Thus, each of the source electrode portions65are also arranged between a corresponding data lines SI1and SI2corresponding to a pixel5and the electrode portion55bof a corresponding island electrode55.

Each of the capacitor elements31are formed in a region where a corresponding power line PW overlaps the electrode portion55bof a corresponding island electrode55, and the electrode portion51dof a corresponding first semiconductor layer51. Thus, the capacitor elements31can be considered to be arranged between the first sub-substrate41and the power lines PW. The electrode portions55b, the electrode portions51d, and the power lines PW partially comprise the capacitor elements31.

As shown inFIG. 12, each of the drain electrodes59are arranged in a corresponding pixel5and cover a corresponding contact hole CH5. As shown inFIG. 14, which is an enlarged cross-sectional view taken along line XIV-XIV inFIG. 7, each drain electrode59is connected to the drain region51cof a corresponding first semiconductor layer51through the corresponding contact hole CH5. In the display1, portions which are located in the contact holes CH5and between the drain electrodes59and the drain regions51care referred to as connecting portions67.

As shown inFIG. 12, the relay electrodes61are provided so as to correspond to the pixels5. In two adjacent pixels5in the Y direction, each of the relay electrodes61extends from the contact hole CH1of one pixel5to the contact hole CH6of the other pixel5. Furthermore, in each pixel5, each relay electrode61extends from the contact hole CH1to the contact hole CH2.

In two adjacent pixels5in the Y direction, each relay electrode61covers the contact holes CH1and CH2of one pixel5and the contact hole CH6of the other pixel5. Thus, two adjacent data lines SI1in the Y direction are electrically connected to each other through the corresponding relay electrode61. Furthermore, two adjacent data lines SI2in the Y direction are electrically connected to each other through the corresponding relay electrode61.

Moreover, each of the data lines SI1are electrically connected to the source region53aof a second semiconductor layer53through a relay electrode61. Each of the data lines SI2are electrically connected to the source region53aof a second semiconductor layer53through a relay electrode61.

Each of the relay electrodes63are arranged in a pixel5and extend from the contact hole CH3to the contact hole CH4arranged in the pixel5. Each relay electrode63covers the contact holes CH3and CH4outside the contour of a corresponding power line PW. Thus, the drain region53cof a second semiconductor layer53of each pixel5is electrically connected to the electrode portion55bof a island electrode55outside the corresponding power line PW.

Examples of materials which may be used to manufacture the power lines PW, the drain electrodes59, the relay electrodes61, and the relay electrodes63include metals such as aluminum, copper, molybdenum, tungsten, and chromium, and their alloys. As shown inFIG. 7, surfaces of the drain electrodes59, the relay electrodes61, and the relay electrodes63adjacent to the display surface3are covered with the insulating film47. The surfaces of the power lines PW adjacent to the display surface3are also covered with the insulating film47.

The surface of the insulating film47adjacent to the display surface3is covered with the insulating film49.

The contact holes CH8are formed in the insulating films47and49.

As shown inFIG. 12, each of the contact holes CH8are arranged in a corresponding pixel5. Each contact hole CH8is located in portions of the insulating films47and49above a drain electrode59so as to communicate with the corresponding drain electrode59.

Each of the drain electrodes59extend in the direction opposite to the gate electrode portion55ain the X direction. Each contact hole CH8communicates with the extension of the corresponding drain electrode59in plan. Thus, in this example, each of the contact holes CH5are not formed above the contact holes CH8. Alternatively, each contact hole CH5may be formed above the contact hole CH8.

As shown inFIG. 7, the pixel electrode33is arranged in each of the pixels5on the surface of the insulating film49where the contact holes CH8are formed, adjacent to the display surface3.

As shown inFIG. 15which is a plan view, each of the pixel electrodes33extends across a corresponding scan line GT1and scan line GT2in the Y direction. Each pixel electrode33extends across a corresponding contact hole CH8and a corresponding data line SI1or SI2. Each pixel electrode33covers the corresponding contact hole CH8.

In the display1, as shown inFIG. 14, portions which are located in the contact holes CH8and between the pixel electrodes33and the drain electrodes59are referred to as connecting portions69.

Examples of materials which may be used as the pixel electrodes33include light-reflective metals, such as silver, aluminum, and copper, and their alloys. In the case where the pixel electrodes33serve as positive electrodes, the pixel electrodes33are preferably composed of a material having a relatively high work function, for example, silver or platinum. Alternatively, a structure in which the pixel electrodes33are composed of, for example, indium tin oxide (ITO) or indium zinc oxide (IZO) with a light-reflective member arranged between the pixel electrodes33and the first sub-substrate41may be used.

Examples of materials which may be used as the insulating film47and49include silicon oxide, silicon nitride, and acrylic resins.

As shown inFIG. 7, a bank71configured to demarcate the active areas of the pixels5is arranged in regions72located between adjacent pixel electrodes33. The bank71extends to the insulating film49between adjacent pixel electrodes33. The bank71is composed of a resin, such as an acrylic resin or polyimide, containing a material having high light absorbency, for example, carbon black or chromium. As shown inFIG. 16which is a plan view, the bank71is arranged in a lattice pattern.

The bank71is arranged across the display region7. Thus, the active areas of the plurality of pixels5in the display region7are demarcated by the bank71. As shown inFIG. 16, perimeters of the pixel electrodes33overlap the bank71in plan.

The bank71has bank portions71alocated between adjacent pixel groups25in the X direction and bank portions71blocated between the first pixel51and the second pixel52. The width of each of the bank portions71bin the X direction is longer than that of each of the bank portions71ain the X direction.

As shown inFIGS. 14 and 16, the connecting portions69of the pixel electrodes33and the contact holes CH8in the pixels5are formed above the bank portions71bin plan. That is, the connecting portions69and the contact holes CH8are masked with the bank portions71bin plan.

As shown inFIG. 7, the organic layers35are arranged on surfaces of the pixel electrodes33adjacent to the display surface3in regions surrounded by the bank71.

Each of the organic layers35are arranged in a corresponding pixel5and include a hole injection sublayer73, a hole transport sublayer75, and a light-emitting sublayer77.

The hole injection sublayers73are composed of an organic material. The hole injection sublayers73are arranged on surfaces of the pixel electrodes33adjacent to the display surface3and in regions surrounded by the bank71in plan. The hole injection sublayers73can be formed by application of a liquid organic material.

Examples of materials which may be used as the hole injection sublayers73include mixtures of polythiophene derivatives, such as poly(3,4-ethylenedioxythiophene) (PEDOT), and polystyrene sulfonate (PSS). Examples of materials which may be used as the hole injection sublayers73further include polystyrene, polypyrrole, polyaniline, polyacetylene, and derivatives thereof.

The hole transport sublayers75are composed of an organic material. The hole transport sublayers75are arranged on the surface of the hole injection sublayers73adjacent to the display surface3in regions surrounded by the bank71. The hole transport sublayers75can be formed by application of a liquid organic material.

The hole transport sublayers75may be composed of, for example, a material containing a triphenylamine polymer, such as TFB, represented as the compound 1.

The light-emitting sublayers77are composed of an organic material. The light-emitting sublayers77are arranged on the surface of the hole transport sublayers75adjacent to the display surface3in regions surrounded by the bank71. The light-emitting sublayers77can be formed by application of a liquid organic material.

The light-emitting sublayers77corresponding to the pixels5rthat emit red (R) light may be composed of, for example, CN-PPV represented as the compound 2.

The light-emitting sublayers77corresponding to the pixels5gthat emit green (G) light may be composed of, for example, a mixture containing F8BT represented as the compound 3 and TFB represented as the compound 1 in a ratio of 1:1.

The light-emitting sublayers77corresponding to the pixels5bthat emit blue (B) light may be composed of, for example, polydioctylfluorene (F8) represented as the compound 4.

As shown inFIG. 7, the common electrode37is arranged on the surface of the organic layers35adjacent to the display surface3. The common electrode37may be composed of, for example, a light-transmitting material, such as ITO or indium zinc oxide. Alternatively, the common electrode37may be formed of, for example, a light-transmitting thin film composed of a magnesium-silver alloy or the like. The organic layers35cover the surfaces of the organic layers35and the bank71adjacent to the display surface3across the plurality of pixels5.

In the display1, a light-emitting region in each pixel5is surrounded by the bank71in order to form a region where the pixel electrode33, organic layers35, and the common electrode37are formed in a stack.

Auxiliary leads39are arranged on the surface of the common electrode37adjacent to the display surface3. The auxiliary leads39are located closer to the display surface3than the common electrode37and are arranged above bank portions71b. Examples of materials that may be used to form the auxiliary leads39include metals, such as aluminum, copper, gold, silver, molybdenum, tungsten, and chromium, and their alloys.

The auxiliary leads39are electrically connected to the common electrode37so as to improve the electrical conduction of the common electrode37.

The sealing substrate13includes a second sub-substrate81. The second sub-substrate81is composed of light-transmitting material such as glass or quartz. The second sub-substrate81has an outward surface82afacing the display surface3and an opposite surface82bfacing the bottom surface15.

A light-shielding film83is arranged on the opposite surface82bof the second sub-substrate81. The light-shielding film83can be composed of, for example, a carbon black-containing resin or a material having high light absorbency, e.g., chromium. The light-shielding film83is arranged across the plurality of pixels5of the matrix M. That is, the light-shielding film83is arranged in a region above on the plurality of pixels5constituting the matrix M.

The light-shielding film83has openings85above the first pixels51and second pixels52of the pixel groups25.

As shown inFIG. 17which is a plan view of the light-shielding film83and the pixel groups25, the openings85are formed so as to correspond to the pixel groups25. InFIG. 17, the light-shielding film83is hatched in order to facilitate understanding of the structure.

As show inFIG. 7, color filters87are arranged on the opposite surface82bof the second sub-substrate81, the color filters87covering the openings85in the bottom surface15. The color filters87are arranged in the respective openings85.

The color filters87can transmit light beams having predetermined wavelength ranges among incident light beams. The color filters87are composed of, for example, different-colored resins in response to the pixel groups25r,25g, and25b.

The color filters87corresponding to the pixel groups25rcan transmit red (R) light. The color filters87corresponding to the pixel groups25gcan transmit green (G) light. The color filters87corresponding to the pixel groups25bcan transmit blue (B) light. Hereinafter, when R, G, and B are distinguished among the color filters87, the expression “color filters87r,87g, and87b” may be used.

In the display1, the light-emitting sublayers77arranged in the pixels5remit red (R) light. Red (R) light emitted from the light-emitting sublayers77in the pixels5rpasses through the color filters87rto increase the color purity of red (R) light. Green (G) light emitted from the light-emitting sublayers77arranged in the pixels5gpasses through the color filters87gto increase the color purity of green (G) light. Blue (B) light emitted from the light-emitting sublayers77arranged in the pixels5bpasses through the color filters87bto increase the color purity of blue (B) light.

A coating layer89is arranged on surfaces of the light-shielding film83and the color filters87adjacent to the bottom surface15. The coating layer89is composed of, for example, a light-transmitting resin and covers the light-shielding film83and the color filters87from the bottom15surface.

A resin layer93is arranged on the surface of the coating layer89adjacent to the bottom surface15. The resin layer93is composed of, for example, a light-transmitting resin, such as an acrylic resin or an epoxy resin. The resin layer93has prismatic portions95aand95bcorresponding to the pixels5. The prismatic portions95ain the display1correspond to the first pixels51. The prismatic portions95bcorrespond to the second pixels52.

In the sealing substrate13having the foregoing structure and the element substrate11, the resin layer93is bonded to the common electrode37with an adhesive97so that that the prismatic portions95aand95bof the resin layer93face the common electrode37.

In the display1, the seal17shown inFIG. 2is held by the first surface42aof the first sub-substrate41and the opposite surface82bof the second sub-substrate81shown inFIG. 7. That is, in the display1, the adhesive97is sealed with the first sub-substrate41, the second sub-substrate81, and the seal17. The seal17may be arranged between the resin layer93and the common electrode37. In this case, the adhesive97can be considered to be sealed with the element substrate11, the sealing substrate13, and the seal17.

The adhesive97is also filled into the prismatic portions95aand95bof the resin layer93. The adhesive97can comprise a material having optical transparency and a refractive index which is different from that of the resin layer93. Thus, light emanating from the light-emitting sublayers77in the pixels5toward the prismatic portions95aand95bcan be refracted through the prismatic portions95aand95b.

In the display1, the resin layer93has a refractive index which is higher than that of the adhesive97. In addition, the prismatic portions95aand95bhave shapes such that light emanating from the light-emitting sublayers77in the pixels5is refracted toward the openings85.

The display1having the foregoing structure controls display by allowing the light-emitting sublayer77in each pixel5to emit light. The emitting state of the light-emitting sublayer77in each pixel5can be changed by controlling the current flowing through the organic layers35using the corresponding drive transistor29.

As shown inFIG. 6, a control signal CS1(h) is supplied to the scan line GT1(h). Similarly, a control signal CS2(h) is also supplied to the scan line GT2(h). The control signal CS1(h) and the control signal CS2(h) are alternately supplied. That is, after a control signal CS1(1) is supplied to a scan line GT1(1), a control signal CS2(1) is supplied to a scan line GT2(1).

An image signal DS1(j) is supplied as a parallel signal to the data line SI1(j). Similarly, an image signal DS2(j) is supplied as a parallel signal to the data line SI2(j). The image signal DS1(j) and the image signal DS2(j) are alternately supplied. That is, after image signals DS1(1) to DS1(n) are supplied to data lines SI1(1) to SI1(n), image signals DS2(1) to DS2(n) are supplied to data lines SI2(1) to SI2(n).

As shown inFIG. 18, each of the control signals CS1(h) and the control signals CS2(h) are maintained at a selective potential with a high level one time for a period of t1during the frame period. Only one of the control signals CS1(h) and the control signals CS2(h) can have the selective potential at any given timing.

When the selective potential is applied to the scan line GT1(h), the select transistors27in the plurality of first pixels51corresponding to the scan line GT1(h) are turned on. In this case, image signals DS1(1) to DS1(n) supplied to the data lines SI1(L) to SI1(n) are supplied to the gate electrode portions55aand the electrode portions55b(seeFIG. 12) of the drive transistors29through the select transistors27. That is, in the first pixels51, a potential is applied to each of the gate electrode portions55aand the electrode portions55bin response to the image signal DS1(j).

Similarly, when the selective potential is applied to the scan line GT2(h), the select transistors27in the plurality of second pixels52corresponding to the scan line GT2(h) are turned on. In this case, image signals DS2(1) to DS2(n) supplied to the data lines SI2(1) to SI2(n) are supplied to the gate electrode portions55aand the electrode portions55b(seeFIG. 12) of the drive transistors29through the select transistors27. That is, a potential in response to the image signal DS2(j) is applied to each of the gate electrode portions55aand the electrode portions55bof the second pixels52.

At this point, currents flow from the power line PW(h) to the drain regions51cthrough the source regions51aand the channel regions51bin response to the potentials at the gate electrode portions55aof the drive transistors29.

The currents from the power line PW(h) flow into the organic layers35(seeFIG. 7) through the drain electrodes59and the pixel electrodes33.

Meanwhile, charge is accumulated between the electrode portions55band the power line PW(h) (seeFIG. 13) and between the electrode portions55band the electrode portions51d, so that the potentials at the gate electrode portions55aof the drive transistors29are maintained for a certain period. Thus, the currents continue to flow through the organic layers35during the period for which the potentials at the gate electrode portions55aare held.

In this way, the currents flow through the organic layers35in response to the image signal DS1(j) and the image signal DS2(j), so that light emanating from the light-emitting sublayer77in each pixel5can be controlled so as to have luminance in the display1in response to the potential of the image signal DS1(j). The display1can display a gray-scale image.

In the display1, the image signal DS1(j) and the image signal DS2(j) can be supplied at different timings for each of the first and second pixels51and52. Thus, the image signal DS1(j) corresponding to the first image and the image signal DS2(j) corresponding to the second image can be separately supplied. Hence, the need to supply the image signal DS1(j) corresponding to the first image and the image signal DS2(j) corresponding to the second image in a combined signal at the same time can be omitted.

The display1includes the light-shielding film83having the openings85corresponding to the pixel groups25as described above. Light from the light-emitting sublayers77in the first pixels51travels toward the display surface3through the openings85.

In this case, as shown inFIG. 19which is a schematic cross-sectional view of the plurality of pixel groups25and the light-shielding film83, light beams111aemitted from the first pixels51toward the display surface3arrive at a first range113through the openings85.

Furthermore, light beams111bemitted from the second pixels52toward the display surface3arrive at a second range115through the openings85.FIG. 19is a cross-sectional view taken along line XIX-XIX inFIG. 1.

The light beams111afrom the first pixels51can be seen from the first range113through the openings85. The light beams111bfrom the second pixels52can be seen from the second range115through the openings85. When a viewing point is located in the first range113, the first image formed by the light beams111afrom the plurality of first pixels51can be seen. When the viewing point is located in the second range115, the second image formed by the light beams111bfrom the plurality of second pixels52can be seen. That is, the first image is displayed in the first range113, and the second image is displayed in the second range115, which is separate from the first range113. Thus the display1is a multiple-view directional display.

There is a subrange117in which the first range113and the second range115overlap each other. A superimposed image of the first and second images may be seen in the subrange117. Only the first image can be seen in a subrange119a(hereinafter, referred to as a “suitable viewing range119a”) defined by excluding the subrange117from the first range113. Only the second image can be seen in a subrange119b(hereinafter, referred to as a “suitable viewing range119b”) defined by excluding the subrange117from the second range115.

The display1has a structure such that the light beams111aemitted from the plurality of first pixels51intersect at both ends of the first range113and that the light beams111bemitted from the plurality of second pixels52intersect at both ends of the second range115. This structure can be made by setting the distance Pa between adjacent openings85in the X direction to be smaller than the distance Pb between adjacent pixel groups25in the X direction.

Thereby, a uniform amount of light seen at any viewing point located in the suitable viewing range119acan be observed among the plurality of first pixels51. Similarly, a uniform amount of light seen at any viewing point located in the suitable viewing range119bcan be observed among the plurality of first pixels51.

In the display1, the light-shielding film83comprises a light-shielding layer. The pixel electrodes33comprise first electrodes. The common electrode37comprises a second electrode. The drive transistors29comprise transistors. The select transistors27comprise switching elements. The scan lines GT1and the scan lines GT2comprise control lines. The data lines SI1and the data lines SI2comprise signal lines. The source electrode portions65and the contact holes CH7comprise connecting portions. The connecting portions69and the contact holes CH8comprise second connecting portions. The bank portions71bcomprise second light-shielding layers. The X direction corresponds to a first direction. The Y direction corresponds to a second direction.

In the display1, the light-shielding film83is arranged on the second sub-substrate81. That is, the light-shielding film83is arranged between the first sub-substrate41and the second sub-substrate81. Thus, the distance between the plurality of pixels5and the light-shielding film83can be reduced when compared with the case where the light-shielding film83is located outside the element substrate11and the sealing substrate13. Thus, the suitable viewing range119aand the suitable viewing range119bin the directional display mode can be easily extended.

In the display1, the power lines PW extend in the X direction. Thus, for example, the distance between adjacent pixels5in the X direction can be easily reduced when compared with the case where the power lines PW extend in the Y direction between adjacent pixels5in the X direction. This can easily increase the pixel density in the X direction, thereby easily resulting in higher definition in the directional display mode.

In the display1, a top-emission organic EL device is used so that light from the light-emitting sublayers77can emerge from the display surface3through the sealing substrate13.

If a bottom-emission EL device in which light from the light-emitting sublayers77emerges from the first sub-substrate41of the element substrate11is used, the first sub-substrate41is located between the light-emitting sublayers77and the light-shielding film83. Thus, in the bottom-emission EL device, it is difficult to reduce the distance between the light-emitting sublayers77and the light-shielding film83.

In the display1, since the top-emission EL device is used, the distance between the light-emitting sublayers77and the light-shielding film83can be easily reduced.

In the display1, the select transistors27and the drive transistors29are located at positions closer to the bottom15than the light-emitting sublayers77. Meanwhile, light from the light-emitting sublayers77is emitted from the display surface3through the sealing substrate13. That is, the select transistors27and the drive transistors29do not preclude the travel of the light from the light-emitting sublayers77toward the display surface3, so that the use efficiency of light from the light-emitting sublayers77can be easily increased. Furthermore, the degree of flexibility of the arrangement of the select transistors27, the drive transistors29, and the like can be easily improved.

In the display1, the resin layer93is located between the light-emitting sublayers77and the light-shielding film83. The thickness of the resin layer93can be easily adjusted when compared to brittle materials such as glass and quartz. In the display1, thus, the suitable viewing ranges119aand119bcan be easily adjusted by adjusting the thickness of the resin layer93.

In the display1, the resin layer93has the prismatic portions95aand95b. Thus, light from the light-emitting sublayers77can be easily introduced to the openings85, so that the light use efficiency can be improved.

In the display1, each of the plurality of light-emitting sublayers77emits red (R) light, green (G) light, or blue (B) light in a corresponding pixel5, so that color images can be displayed in the directional display mode.

In the display1, the color filter87is arranged in each opening85. The openings85correspond to the pixel groups25. Thus, one color filter87can be used for both first and second pixels51and52which comprise the pixel groups25.

The color filters87are arranged in the openings85, so that the thickness of the display1can be easily reduced.

In the display1, the capacitor elements31are located between the first sub-substrate41and the power lines PW and above the power lines PW in plan, so that the region of each pixel5can be easily reduced. This can more easily increase the pixel density, thereby more easily resulting in higher definition in the directional display mode.

In the display1, the select transistor27of each pixel lies on the opposite side of the power line PW than the drive transistor29in the Y direction. Thus, the capacitor element31can be easily arranged between the select transistor27and the drive transistor29, so that the region in each pixel5can be easily reduced.

In the display1, the source region51a, the channel region51b, and the drain region51cof each drive transistor29are aligned in the X direction. The source region53a, the channel regions53b, and the drain region53cof each select transistor27are aligned in the X direction. Thus, a region between the select transistor27and the drive transistor29can be easily extended. Hence, the capacitor element31can be more easily arranged between the select transistor27and the drive transistor29.

The island electrode55of each drive transistor29has a gate electrode portion55aand an electrode portion55b. The first semiconductor layer51has the electrode portion51d. The electrode portion55band the electrode portion51dface each other and are formed above the corresponding power line PW. The electrode portion55bis electrically connected to the drain region53cof the corresponding select transistor27. The electrode portion51dis electrically connected to the power line PW. Thus, the electrode portion55b, the electrode portion51d, and the power line PW can partially constitute the capacitor element31.

Meanwhile, the gate electrode portion55aof the island electrode55, the source region51a, the channel region51b, and the drain region51cof the first semiconductor layer51comprise the drive transistor29. That is, the drive transistor29and the capacitor element31of the display1can be shared. Thus, the region in each pixel5can be more easily reduced, thereby more easily resulting in higher definition in the directional display mode.

The drain region51cof each first semiconductor layer51of the display1is arranged outside the corresponding power line PW. The drain region51cof each first semiconductor layer51is electrically connected to the corresponding pixel electrode33outside the power line PW. Thus, each drive transistor29can be electrically connected to the corresponding pixel electrode33without being inhibited by the power line PW.

One drain region51cof the first semiconductor layer51in the first and second pixels51and52of one pixel group25lies on the opposite side of the power line PW than the other drain region51cof the first semiconductor layer51. Thus, the distance between the drain regions51cof the first semiconductor layers51can be easily increased in the first and second pixels51and52. Hence, the distance between the contact holes CH8can be easily increased in the first and second pixels51and52. Thereby, in the first and second pixels51and52, the region of each contact hole CH8can be easily increased. Therefore, a region of each connecting portion69can be easily increased, so that the electrical conduction of the connecting portion69can be easily improved.

In the display1, the scan lines GT1correspond to the first pixels51. The scan lines GT2correspond to the second pixels52. Thus, the plurality of select transistors27can be turned on at different timings for each of the first and second pixels51and52. Thereby, the image signal DS1(j) and the image signal DS2(j) can be supplied at different timings for each of the first and second pixels51and52. Thus, the image signal DS1(j) corresponding to the first image and the image signal DS2(j) corresponding to the second image can be treated separately.

The select transistors27and the drive transistors29of the first and second pixels51and52of one pixel group25are located between the data lines SI1and SI2corresponding to the first and second pixels51and52, respectively. Thus, the distance between the first and second pixels51and52can be easily reduced in the X direction.

In the display1, each power line PW extends across adjacent pixel groups25in the X direction. Two data lines SI1and SI2extend in the Y direction between adjacent pixel groups25in the X direction. The corresponding power line PW extends across the two data lines SI1and SI2in the X direction.

Parasitic capacitance is easily formed between the two data lines SI1and SI2. In the display1, since the power line PW extends across the two data lines SI1and SI2, capacitance can be easily formed between the power line PW and the data lines SI1and between the power line PW and the data lines SI2. This can reduce the electrical interference between the two data lines SI1and SI2, thereby improving the quality of the display.

The contact holes CH7and the source electrode portions65of each pixel5are located between the electrode portion55bof the island electrode55and the data line SI1or SI2. This can reduce the electrical interference between the capacitor element31and each of the data lines SI1and SI2, thereby improving the quality of display.

In the display1, the connecting portions69of the pixel electrodes33and the contact holes CH8are formed above the bank portions71b. Thus, the connecting portions69and the contact holes CH8can be easily masked with the bank portions71b.

In the display1, the auxiliary leads39are formed over the bank71. Thus, the auxiliary leads39do not preclude the light from the light-emitting sublayers77from emitting toward the display surface3. Hence, the auxiliary leads39can be made from a light-shielding material. Furthermore, each of the auxiliary leads39can have a large thickness, thereby improving the electrical conduction of the auxiliary leads39.

In the display1, the width of each of the bank portions71bin the X direction is longer than that of each of the bank portions71ain the X direction. Each of the bank portions71bare located between the first and second pixels51and52of one pixel group25. That is, the bank portions71bare formed above on the openings85.

A larger width dimension of each bank portion71bin the X direction can result in a reduction in the size of the subrange117where the first image is formed above the second image in the directional display mode. Thus, the suitable viewing ranges119aand119bof display1can be easily extended in the directional display mode.

The auxiliary leads39are arranged in regions above the bank portions71b. Thus, the width of each auxiliary lead39in the X direction can be increased as compared to the case where the auxiliary leads39are arranged in regions above the bank portions71a. This can further improve the electrical conduction of the auxiliary leads39.

In the display1, N-channel TFT elements are used as the select transistors27, and P-channel TFT elements are used as the drive transistors29. However, the select transistors27are not limited to the N-channel TFT elements and may be formed of P-channel TFT elements. Similarly, the drive transistors29are not limited to the P-channel TFT elements and may be formed of N-channel TFT elements.

While a structure in which the drain region53cof each select transistor27is electrically connected to the electrode portion55bof the corresponding drive transistor29is described above, the structure between each select transistor27and the corresponding drive transistor29is not limited to the configuration described above. Rather, a structure in which a capacitor element is arranged between the drain region53cof each select transistor27and the electrode portion55bof the corresponding drive transistor29may be used.

In the example described above, an application method of liquid organic materials is used to form the organic layers35. However, the formation of the organic layers35is not limited to the application method. For example, an evaporation method which utilizing vapor deposition technology may also be employed.

An active matrix display in which the select transistor27and the drive transistor29are arranged in each pixel5is used as an example. However, the configuration of the display1is not so limited, and a passive matrix display may also be used. As shown inFIG. 20, in a passive matrix display10, an element substrate20includes the first sub-substrate41, a plurality of first electrodes131, the organic layers35, the bank71, and a plurality of second electrodes133. The display10has the same structure as the display1, except for the element substrate20. Hereinafter, thus, elements corresponding to those of the display1are designated using the same reference numerals, and detailed descriptions are not repeated.

The first electrodes131are located between the first sub-substrate41and the organic layers35. Each of the first electrodes131forms a strip extending in the Y direction. The plurality of first electrodes131are aligned in the X direction at predetermined intervals.

The second electrodes133are located between the organic layers35and the sealing substrate13. Each of the second electrodes133forms a strip extending in the X direction. The plurality of second electrodes133are aligned in the Y direction at predetermined intervals.

The first electrodes131intersect the second electrodes133with the organic layers35provided therebetween. In the display10, each of the pixels5can be defined as a region surrounded by the bank71in plan where a corresponding first electrode131and second electrode133formed above the bank71.

Both the display1and the display10have a color filter87arranged in each opening85, but the structure is not limited thereto. A structure without the color filter87may also be used. In each of the display1and the display10, each of the plurality of light-emitting sublayers77emit red (R) light, green (G) light, or blue (B) light in a corresponding pixel5, so that color display can be performed even when the color filter87is not arranged.

In both the display1and the display10described above, each of the plurality of light-emitting sublayers77emit red (R) light, green (G) light, or blue (B) light in a corresponding pixel5, but the structure of the displays1and10are not so limited. Rather, the display1may have a structure including white-light-emitting sublayers77in place of the light-emitting sublayers77capable of emitting red (R), green (G), or blue (B) light. Since the display1includes color filters87r,87g, and87barranged in the respective openings85, color display can be performed even when all the light-emitting sublayers77emit white light.

In both the display1and the display10, the organic layers35can be formed across the plurality of pixels5. When the organic layers35are formed across the plurality of pixels5, each of the pixels5can be defined as a region between the corresponding pixel electrode33and common electrode37.

When the organic layers35are formed across the plurality of pixels5in the display10, each of the pixels5can be defined as a region between a first electrode131and a second electrode133, as shown inFIG. 21.

InFIGS. 20 and 21, the pixels5are hatched in order to facilitate understanding of the structure.

In both the display1and the display10, as shown inFIG. 5, the plurality of pixel groups25are arranged in the X and Y directions, i.e., in a matrix. However, the arrangement of the plurality of pixel groups25is not so limited. For example, as shown inFIG. 22, the plurality of pixel groups25may be arranged in a staggered pattern in the Y direction. In the case of the arrangement shown inFIG. 22, the first and second pixels51and52, shown inFIG. 4, are alternately arranged in the X direction and in the Y direction.

In both the display1and the display10, as shown inFIG. 23, the opening85in the light-shielding film83is arranged in each pixel group25. To correspond to the staggered arrangement of the plurality of pixel groups25in the Y direction, the plurality of openings85are also arranged in a staggered pattern. Thus, the distance between diagonally adjacent openings85can be reduced compared with the arrangement in which the plurality of pixel groups25are arranged in a matrix in the X and Y directions. This can easily increase the resolution in each of the first image and the second image in the diagonal direction, thereby more easily resulting in higher definition in the directional display mode.

In a display100in which the staggered arrangement of the plurality of pixel groups25in the Y direction is used as the display1, as shown inFIG. 24, the scan lines GT1and GT2can be shared between diagonally adjacent pixel groups25in the Y direction.

In the display1described above, the scan lines GT1and GT2are arranged for each pixel row23. In contrast, in the display100, one scan line GT1or one scan line GT2can be shared between adjacent pixel groups25in the Y direction. Thus, in the display100, the number of the scan lines GT1and GT2can be less than with the display1.

In the display100, one pixel column21(seeFIG. 3) includes the first and second pixels51and52. Thus, data lines SI corresponding to the pixel columns21do not correspond to each of the first and second pixels51and52. That is, the data lines SI are shared between the first and second pixels51and52.

The display100may have a structure without the color filter87. Even when the display100has the structure without the color filter87, color display can be performed in the same way as described with the displays1and10.

In the case of the display100not including the color filter87, it is preferable that one pixel column21r, one pixel column21g, and one pixel column21b, which are shown inFIG. 3, are arranged in a repeating configuration so as to reduce the conversion of data sequences supplied to the data lines SI1and SI2.

In each of the displays1,10, and100and similar structures which exclude the color filters87, the resin layer93has the prismatic portions95aand95b, but the structure of the resin layer93is not limited thereto. As shown inFIG. 25, the resin layer93may have lens portions141. In this case, the adhesive97having a refractive index larger than that of the resin layer93can be used.

Each of the displays1,10, and100and structures excluding the color filters87from these displays described above can be applied to, for example, a display portion510of an electronic apparatus500as shown inFIG. 26. The electronic apparatus500is a display device used for a car navigation system. In the electronic apparatus500, the use of the display portion510to which the display1,10, or100or a similar structure excluding the color filters87is used can result in the visual recognition of, for example, a map image as the first image from the driver side and the visual recognition of a second image, such as a movie, from the passenger side.

Furthermore, since the display1,10, or100or similar structure excluding the color filters87, is applied to the display portion510, the suitable viewing range119aand the suitable viewing range119bcan be easily extended in the directional display mode.

Moreover, in the electronic apparatus500, the pixel density in the X direction can be easily increased in the display1,10, or100or similar structure excluding the color filters87, thereby resulting in higher definition in the directional display mode.

The electronic apparatus500is not limited to the display used for the car navigation system and examples of apparatuses capable of utilizing aspects of the invention include various electronic apparatuses, such as cellular phones, mobile computers, digital still cameras, digital video cameras, vehicle-mounted apparatuses, and audio apparatuses.