Electronic device and power management method therefor

An electronic device includes a processor, a battery, a charging circuit, a controller, and an arithmetic logic unit. The processor is capable of operating at a preset frequency or a low frequency. The charging circuit is electrically connected to an external power supply and a battery and transmits a disconnection signal and to be powered by the battery when the external power supply and the charging circuit are changed from a connected state to a disconnected state. The controller is configured to transmit a first control signal when the external power supply and the charging circuit are changed from the connected state to the disconnected state. The arithmetic logic unit is configured to transmit a frequency reduction signal to the processor according to the disconnection signal and the first control signal, so that the processor reduces the preset frequency to the low frequency and operates at the low frequency.

This application claims the benefit of Taiwan application Serial No. 109126332, filed Aug. 4, 2020, the subject matter of which is incorporated herein by reference.

BACKGROUND

Technical Field

The present invention relates to a device and a management method therefor, and in particular, to an electronic device and a power management method therefor.

Related Art

When an electronic device is connected to an external power supply, the external power supply can provide sufficient currents for the electronic device. When the electronic device is not connected to the external power supply, a battery inside the electronic device supplies power to the electronic device. However, when the external power supply and the electronic device are suddenly powered off, such as a sudden power failure or sudden falling of a plug that transmits an external power supply from the electronic device, unexpected shutdown may occur as a result of overload of the battery.

Therefore, there is an urgent need to provide an electronic device and a power management method that can improve the above conventional problems.

SUMMARY

In view of the above, the present invention provides an electronic device and a power management method therefor, which can alleviate the conventional problems.

An embodiment of the present invention provides an electronic device. An electronic device includes a processor, a battery, a charging circuit, a controller, and an arithmetic logic unit. The processor is capable of operating at a preset frequency or a low frequency. The charging circuit is electrically connected to an external power supply and the battery. The charging circuit is configured to transmit a disconnection signal and to be powered by the battery in response to the external power supply and the charging circuit being changed from a connected state to a disconnected state. The controller is configured to output a first control signal in response to the external power supply and the charging circuit being changed from the connected state to the disconnected state. The arithmetic logic unit is electrically connected to the charging circuit and the controller and is configured to transmit a frequency reduction signal to the processor according to the disconnection signal and the first control signal, so that the processor reduces the preset frequency to the low frequency and operates at the low frequency.

Another embodiment of the present invention provides a power management method of an electronic device. The power management method is adapted to the electronic device. The electronic device includes a processor, a battery, a charging circuit, and an arithmetic logic unit. The charging circuit is electrically connected to an external power supply and the battery. The processor is configured to operate at a preset frequency or a low frequency, and is powered by the battery in response to the charging circuit being not connected to the external power supply. The power management method includes the following steps: transmitting, by the charging circuit, a disconnection signal in response to the external power supply and the charging circuit being changed from a connected state to a disconnected state; transmitting, by the controller, a first control signal in response to the external power supply and the charging circuit being changed from the connected state to the disconnected state; and transmitting, by the arithmetic logic unit, a frequency reduction signal to the processor according to the disconnection signal and the first control signal, so that the processor reduces the preset frequency to the low frequency and operates at the low frequency.

In order to better understand the above and other aspects of the present invention, specific embodiments are listed and described in detail below with reference to the accompanied drawings.

DETAILED DESCRIPTION

Referring toFIG. 1A,FIG. 1B, andFIG. 2toFIG. 4,FIG. 1Aillustrates a schematic diagram showing connection between an electronic device100and an external power supply10according to an embodiment of the present invention,FIG. 1Billustrates a schematic diagram showing disconnection of the electronic device100inFIG. 1Afrom the external power supply10, andFIG. 2toFIG. 4illustrate timing diagrams of a signal transmitted by a charging circuit110, a signal transmitted by a controller120, and a signal transmitted by an arithmetic logic unit130in a plurality of different embodiments inFIG. 1A.

The electronic device100includes a battery105, a charging circuit110, a controller120, an arithmetic logic unit130, and at least one processor140. In an embodiment, at least two of the charging circuit110, the controller120, the arithmetic logic unit130, and the processor140may be integrated into a single element, or at least two of the charging circuit110, the controller120, and the arithmetic logic unit130may be integrated into the processor140. In an embodiment, the controller120is, for example, an embedded controller (EC). The processor140is, for example, a central processing unit (CPU) and/or a graphics processing unit (GPU). A number of processors140is not limited in the embodiments of the present invention. One or more processors, such as two or more processors may be provided. In an embodiment, the processor140can operate at a preset frequency or a low frequency. The “preset frequency” herein is within a range, for example, between a highest operating frequency and a lowest operating frequency, and the “low frequency” is, for example, greater than at least the lowest operating frequency or is the lowest operating frequency. A specific value of the highest operating frequency and a specific value of the lowest operating frequency may depend on a specification and/or a type of the electronic device100, which are not limited in the embodiments of the present invention.

The charging circuit110is configured to connect the external power supply10to the battery105. When the charging circuit110is electrically connected to the external power supply10, the charging circuit110may store power of the external power supply10into the battery105. When the charging circuit110is not connected to the external power supply10, the battery105supplies power to components inside the electronic device100, for example, the charging circuit110, the controller120, the arithmetic logic unit130, the processor140, and/or other components to maintain normal operation of the electronic device100.

In an embodiment, as shown inFIG. 2, the charging circuit110is configured to transmit a disconnection signal S1to the arithmetic logic unit130when the external power supply10and the charging circuit110are changed from a connected state (as shown inFIG. 1A) to a disconnected state (as shown inFIG. 1B), for example, at a time point t1. The controller120is configured to transmit a first control signal C1to the arithmetic logic unit130when the external power supply10and the charging circuit110are changed from the connected state to the disconnected state. The arithmetic logic unit130is electrically connected to the charging circuit110and the controller120and is configured to transmit a frequency reduction signal R1to the processor140according to the disconnection signal S1and the first control signal C1. The controller120is further configured to transmit a second control signal C2to the processor140after a specific time T1since the frequency reduction signal R1was transmitted, for example, at a time point t2. The arithmetic logic unit130is further configured to transmit a recovery signal R2to the processor140according to the disconnection signal S1and the second control signal C2. In an embodiment, the processor140may perform frequency reduction according to the frequency reduction signal R1, that is, enable frequency reduction protection, so that the processor140reduces the preset frequency to the low frequency and operates at the low frequency, to prevent the battery105from being overloaded, thereby avoiding unexpected shutdown caused by overload of the battery, and cancels the frequency reduction protection procedure according to the recovery signal R2, so that the processor140is recovered from the low frequency to the preset frequency to operate.

Based on the above, when the external power supply10and the charging circuit110are changed from the connected state to the disconnected state, the processor140may reduce a frequency within a short response time or almost simultaneously, so that the frequency reduction protection can be enabled before the battery is overloaded, avoiding or reducing a probability of unexpected shutdown caused by overload of the battery. In detail, when the external power supply10and the charging circuit110are changed from the connected state to the disconnected state, for example, at the time point t1, the controller120can cause the processor140to quickly execute a frequency reduction procedure only by changing a signal state by using the charging circuit110, for example, changing the signal state from a connection signal S2to the disconnection signal S1without changing a state of the control signal that is sent, that is, through maintaining the current first control signal C1. In addition, when the external power supply10and the charging circuit110are changed from the connected state to the disconnected state, the charging circuit110almost simultaneously transmits the disconnection signal S1to the arithmetic logic unit130. In this way, the processor140can reduce the frequency within a short response time or almost simultaneously. In an embodiment, when the external power supply10and the charging circuit110are changed from the connected state to the disconnected state, the processor140can reduce the frequency within 10 microseconds.

As shown inFIG. 2, the connection signal S2and the second control signal C2have a first voltage level, and the disconnection signal S1and the first control signal C1have a second voltage level. In an embodiment, the first voltage level is, for example, a high voltage level, and the second voltage level is, for example, a low voltage level.

As shown inFIG. 1A,FIG. 1B, andFIG. 2, the arithmetic logic unit130includes a logic gate131and a switch132. The switch132electrically couples the logic gate131to the processor140. The logic gate131includes a first input terminal131a, a second input terminal131b, and an output terminal131c. The first input terminal131ais configured to receive a control signal transmitted by the controller120, for example, the first control signal C1or the second control signal C2. The second input terminal131bis configured to receive a connection status signal transmitted by the charging circuit110, for example, the disconnection signal S1or the connection signal S2. The logic gate131performs a logical operation on the received connection status signal and control signals, and outputs a corresponding output signal N1. The switch132includes a gate G, a drain D, and a source S. The gate G is electrically connected to the output terminal131cof the arithmetic logic unit130, the drain D is electrically connected to a power terminal P of the processor140, and the source S is electrically connected to a ground terminal GND.

In this embodiment, the logic gate131is, for example, a NOR logic gate. As shown inFIG. 2, the logic gate131performs a NOR logic operation on the received connection status signal and control signals, and outputs the corresponding output signal N1. The output signal N1of the logic gate131is inputted to the gate G of the switch132. In this embodiment, the switch132is, for example, a metal oxide semiconductor field effect transistor (MOSFET), such as an NMOS. As shown inFIG. 2, the switch132is turned on according to a high-level region of the output signal N1to output the frequency reduction signal R1to the processor140, and is turned off according to a low-level region of the output signal N1to output the recovery signal R2to the processor140.

In addition, the above time interval T1is, for example, any value between 2 seconds and 4 seconds, or may be longer or shorter. In this embodiment, the time interval T1is preferably 3 seconds. The time interval T1is sufficient for the processor140to complete the frequency reduction protection procedure. If the charging circuit110and the external power supply10maintain the disconnected state within the time interval T1, for example, at the time points t1-t2shown inFIG. 2, which indicates that “the charging circuit110and the external power supply10are changed from the connected state to the disconnected state” is not an “unexpected event”, the controller120transmits the second control signal C2to the arithmetic logic unit130. The “unexpected event” herein is, for example, an event such as a sudden power failure or sudden falling of a plug that transmits the external power supply10from the electronic device100.

If the charging circuit110and the external power supply10are changed from the disconnected state to the connected state within the time interval T1, for example, at a time point t2′ shown inFIG. 3, the controller120maintains transmitting of the first control signal C1to the arithmetic logic unit130, and the charging circuit110transmits the connection signal S2to the arithmetic logic unit130. The arithmetic logic unit130transmits the recovery signal R2to the processor140according to the first control signal C1and the connection signal S2. The processor140cancels the frequency reduction protection procedure according to the recovery signal R2.

In another embodiment, as shown inFIG. 1A,FIG. 1B, andFIG. 2, the charging circuit110is further configured to transmit the connection signal S2to the arithmetic logic unit130when the external power supply10and the charging circuit110are changed from the disconnected state (as shown inFIG. 1B) to the connected state (as shown inFIG. 1A) after the specific time T1, for example, at a time point t3inFIG. 2. The controller120is further configured to transmit the first control signal C1to the arithmetic logic unit130when the external power supply10and the charging circuit110are changed from the disconnected state to the connected state. As shown inFIG. 2, the charging circuit110senses, at the time point t3, that the external power supply10and the charging circuit110are changed from the disconnected state to the connected state. Since the signal transmission takes time and the controller120also requires a time for response, the controller120transmits the first control signal C1with a slight delay relative to the time point t3. The arithmetic logic unit130is further configured to transmit the recovery signal R2to the processor140according to the connection signal S2and the first control signal C1. The processor140cancels the frequency reduction protection procedure according to the recovery signal R2.

As shown inFIG. 2, due to characteristics of the arithmetic logic unit130, even if the external power supply10and the charging circuit110are changed from the disconnected state to the connected state, the arithmetic logic unit130can maintain transmitting of the recovery signal R2to the processor140if there is no requirement for frequency reduction protection. For example, after the time point t3inFIG. 2, although the external power supply10and the charging circuit110are changed from the disconnected state to the connected state, the arithmetic logic unit130can maintain transmitting of the recovery signal R2to the processor140due to no requirement for frequency reduction protection.

In another embodiment, as shown inFIG. 4, when the external power supply10and the charging circuit110maintain the disconnected state, for example, maintain the disconnected state after the time point t2, the charging circuit110maintains transmitting of the disconnection signal S1to the arithmetic logic unit130, and the controller120maintains transmitting of the second control signal C2to the arithmetic logic unit130after the time point t2. The arithmetic logic unit130maintains transmitting of the recovery signal R2to the processor140according to the disconnection signal S1and the second control signal C2.

FIG. 5illustrates a flowchart of a power management method of the electronic device100inFIG. 1A.

In step S110, the charging circuit110determines whether the external power supply10and the charging circuit110are changed from the connected state to the disconnected state. If yes, the process proceeds to step S115, for example, at the time point t1inFIG. 2. If no, the process proceeds to step S155, and a power mode of the electronic device100is set to a mode in which power is supplied by the external power supply. For example, the power mode of the electronic device100is changed from a battery-powered mode to a mode in which power is supplied by the external power supply, or an original mode in which power is supplied by the external power supply is maintained.

In step S115, for example, at the time point t1inFIG. 2, the external power supply10and the charging circuit110are changed from the connected state to the disconnected state. Therefore, the charging circuit110transmits the disconnection signal S1to the arithmetic logic unit130. Then, in step S120, the controller120transmits the first control signal C1to the arithmetic logic unit130. Then, the arithmetic logic unit130transmits the frequency reduction signal R1to the processor140according to the disconnection signal S1and the first control signal C1. Then, the processor140enables frequency reduction protection according to the frequency reduction signal R1, so that the processor140reduces the preset frequency to the low frequency and operates at the low frequency, to prevent the battery105from being overloaded, thereby avoiding unexpected shutdown caused by overload of the battery.

In step S130, the power mode of the electronic device100is set to the battery-powered mode. For example, the controller120instructs a basic input/output system (BIOS) (not shown) of the electronic device100to set the power mode of the electronic device100to the battery-powered mode.

In step S135, referring toFIG. 3at the same time, within the specific time T1since the frequency reduction signal R1was transmitted, the charging circuit110determines whether the external power supply10and the charging circuit110are changed from the disconnected state to the connected state. If yes, it indicates that the external power supply10and the charging circuit110are connected again within the specific time T1. If no, the process proceeds to step S155, and the power mode of the electronic device100is set to the mode in which power is supplied by the external power supply. For example, at the time point t2′ inFIG. 3, the external power supply10and the charging circuit110are changed from the disconnected state to the connected state, which indicates that the external power supply10and the charging circuit110are connected again after the unexpected disconnection within the specific time T1. In this case, the process proceeds to step S155, and the power mode of the electronic device100is set to the mode in which power is supplied by the external power supply.

If no, it indicates that the external power supply10and the charging circuit110still maintain a disconnected state. For example, between the time point t1and the time point t2inFIG. 2, the external power supply10and the charging circuit110maintain the disconnected state. In this case, the process proceeds to step S140.

In step S140, after the specific time T1since the frequency reduction signal R1was transmitted, for example, at the time point t2shown inFIG. 2, the charging circuit110determines whether the external power supply10and the charging circuit110maintain the disconnected state. If yes, the process proceeds to step S145. The above specific time T1is, for example, between 2 seconds and 4 seconds, such as 3 seconds, or may be longer or shorter.

The time interval T1is sufficient for the processor140to complete the frequency reduction procedure. If the charging circuit110and the external power supply10maintain the disconnected state within the time interval T1, which indicates that “the charging circuit110and the external power supply10are changed from the connected state to the disconnected state” is not an “unexpected event”, the process proceeds to step S145.

In step S145, the controller120transmits a second control signal C2. Then, the process proceeds to step S150. The arithmetic logic unit130transmits the recovery signal R2to the processor140according to the disconnection signal S1and the second control signal C2. The processor140cancels the frequency reduction protection procedure according to the recovery signal R2, so that the processor140recovers the preset frequency from the low frequency and operates at the low frequency and operates at the preset frequency.

In step S140, if the external power supply10and the charging circuit110do not maintain the disconnected state within the specific time T1, which indicates that the external power supply10and the charging circuit110are connected again, for example, the external power supply10and the charging circuit110are changed from the disconnected state to the connected state at a time point t2′ inFIG. 3, the process proceeds to step S155, and the power mode of the electronic device100is set to the mode in which power is supplied by the external power supply.

In step S155, the power mode of the electronic device100is set to a mode in which power is supplied by the external power supply in such a way, for example, the controller120instructs the BIOS of the electronic device100to set the power mode of the electronic device100to the mode in which power is supplied by the external power supply. Then, in step S160, the controller120transmits the first control signal C1. Then, in step S165, the arithmetic logic unit130transmits the recovery signal R2to the processor140according to the connection signal S2and the first control signal C1.

Based on the above, the power management method of the electronic device100in the embodiments of the present invention can reduce a capacity of the battery105and/or a number of cells. For example, compared with a conventional power management method, the power management method of the electronic device100in the embodiments of the present invention can reduce the capacity of the battery from 60 watt-hours (Whr) to 42 watt-hours and/or reduce the number of cells from 3 to 2.

Based on the above, although the present invention is disclosed in the above embodiments, the embodiments are not intended to limit the present invention. Those with ordinary knowledge in the technical field to which the present invention belongs can make various changes and refinements without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention is subject to scope defined by the attached claims.