Electronic device, communication method, audio device and amplifier device using pulse density modulation for communication

The present invention discloses an electronic device using pulse density modulation for communication, comprising: a pulse density modulation interface; a first circuit to output a clock signal and a data signal through the pulse density modulation interface; and a second circuit to receive the clock and data signals and thereby determine whether the level change times of the data signal reach a predetermined threshold while the clock signal remains unchanged, so as to verify whether the clock and data signals satisfy a start protocol. In an embodiment of the present invention, the above-mentioned predetermined threshold is equal to or more than three.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to devices and methods using pulse density modulation, especially to an electronics device, a communication method, an audio device and an amplifying device using pulse density modulation for communication.

2. Description of Related Art

Pulse density modulation (PDM) is a modulation technique to express an analog signal by a stream composed of many one-bit digital signals. Unlike pulse code modulation (PCM) which evaluates analog signals of different amplitudes by distinct multi-bits digital signals, pulse density modulation shows the strength of an analog signal by the density of said one-bit digital signals.

Generally speaking, a pulse density modulation interface is quite simple, which is composed of a clock pin and a data pin and usually applied to an audio device. Said clock pin can transmit a clock signal; and said data pin can transmit signals of left and right sound channels in light of the rising and falling edges of the clock signal respectively. Because of the simple hardware frame of pulse density modulation, a former pulse density modulation interface is limited to data transmission with no control function in the early days, but the state of the art has allowed the pulse density modulation interface to transmit a specific data pattern for write control; more specifically, a modern pulse density modulation interface is capable of transmitting digital data in a specific pattern (e.g. 11000101 or 10010101 repeating for 64 times) according to the periodic change of the foresaid clock signal, so as to control a reception end to perform a write process in accordance with the digital data (e.g. 11000101 repeating for 64 times indicating that a value “1” should be written down, and 11000101 repeating for 64 times indicating that a value “0” should be written down). However, this control method can only manipulate a predetermined component in the reception end, but can't choose a component in interest to perform a write process; moreover, the control method only allows a transmission end to control a reception end in a unidirectional way, which means that the reception end is not able to provide data for the transmission end reversely.

SUMMARY OF THE INVENTION

In consideration of the imperfections of the prior art, an object of the present invention is to provide an electronic device, a communication method, an audio device and an amplifying device using pulse density modulation for communication, so as to make an improvement over the prior art.

The present invention discloses an electronic device using pulse density modulation for communication. An embodiment of said electronic device comprises: a pulse density modulation interface; a first circuit to output a clock signal and a data signal through the pulse density modulation interface; and a second circuit to receive the clock and data signals through the pulse density modulation interface and determine whether the level change times of the data signal reach a predetermined threshold while the clock signal remains unchanged, so as to verify whether the clock and data signals conform to a start protocol, wherein the predetermined threshold is equal to or more than three.

In the above embodiment, after the first circuit outputted the clock and data signals conforming to the start protocol, the first circuit is operable to output write information to the second circuit through the pulse density modulation interface, so as to allow the second circuit to perform a process in accordance with the write information. Besides, the first circuit is also operable to output a read request to the second circuit through the pulse density modulation interface to thereby make the second circuit provide read data for the first circuit through the pulse density modulation interface. Accordingly, a bilateral communication can be realized.

The present invention also discloses a communication method using pulse density modulation for communication, which is carried out by the electronic device of the present invention or its equivalent. An embodiment of said method comprises a modulation output step and a reception decision step. Said modulation output step includes: keeping the level of a clock signal unchanged and outputting the clock signal through a pulse density modulation interface; and changing the level of a data signal for N times and outputting the data signal through the pulse density modulation interface during the level of the clock signal staying the same in which the N is equal to or more than 3. Said reception decision step receives the clock and data signals through the pulse density modulation interface, and includes: determining whether the level change times of the data signal reach the N times while the level of the clock signal remains the same, so as to verify whether a start protocol is accomplished.

The above mentioned communication method can further comprise: an access request step to output write information or a read request through the pulse density modulation interface if the reception decision step determines that the start protocol is verified; and an access respondent step to receive the write information or the read request through the pulse density modulation interface, and perform a process according to the write information or provide read data through the pulse density modulation interface according to the read request.

The present invention further discloses an electronic device using pulse density modulation for communication, which carries out an access operation if a start protocol is verified. An embodiment of said electronic device comprises: a pulse density modulation interface including a clock path and a data path; a first circuit to output a clock signal through the clock path and a data signal through the data path; and a second circuit to receive the clock signal through the clock path and the data signal through the data path, and determine whether the clock and data signals conform to the start protocol, wherein if the clock and data signals conform to the start protocol, the first circuit is operable to output write information to the second circuit through the pulse density modulation interface to thereby allow the second circuit to perform a process in accordance with the write information, and operable to output a read request to the second circuit through the pulse density modulation interface to thereby allow the second circuit to provide read data for the first circuit through the pulse density modulation interface in accordance with the read request.

The present invention further discloses an audio device using pulse density modulation for communication. An embodiment of said audio device comprises: a pulse density modulation interface composed of a clock path and a data path; and an audio circuit to output a clock signal through the clock path and a data signal through the data path, and notify a reception end of preparing for an access operation by the clock and data signals, wherein when the audio circuit is operable to notify the reception end of preparing for the access operation, the audio circuit keeps the level of the clock signal unchanged and changes the level of the data signal for at least three times to thereby accomplish the notification.

The present invention further discloses an amplifying device using pulse density modulation for communication. An embodiment of said amplifying device comprises: a pulse density modulation interface composed of a clock path and a data path; and an amplifying circuit to receive a clock signal through the clock path and a data signal through the data path, and determine whether the level change times of the data signal reach a predetermined threshold during the level of the clock signal remaining unchanged, so as to decide whether to execute an access operation, wherein the predetermined threshold is equal to or more than three.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

The following description is written by referring to terms of this invention field. If any term is defined in the specification, such term should be explained accordingly. Besides, the connection between objects or events in the following embodiments can be direct or indirect provided that these embodiments are still applicable under such connection. Said “indirect” means that an intermediate object or a physical space is existed between the objects, or an intermediate event or a time interval is existed between the events. In addition, the following description relates to pulse density modulation (PDM), and the detail known in this field will be omitted if such detail has little to do with the features of the present invention. Furthermore, the shape, size, and ratio of any element and the step sequence of any flow chart in the disclosed figures are just exemplary for understanding, not for limiting the scope of this invention.

Besides, each embodiment in the following description includes one or more features; however, this doesn't mean that one carrying out the present invention should make use of all the features of one embodiment at the same time, or should only carry out different embodiments separately. In other words, if an implementation derived from one or more of the embodiments is applicable, a person of ordinary skill in the art can selectively make use of some or all of the features in one embodiment or selectively make use of the combination of some or all features in several embodiments to have the implementation come true, so as to increase the flexibility of carrying out the present invention.

The present invention discloses devices and methods using pulse density modulation for communication. The devices and methods are applicable to an audio system (e.g. an audio player or an audio recorder) or other systems using pulse density modulation (e.g. a dimming system); however, these applications are not limitations to the present invention, just for understanding. People of ordinary skill in the art can choose components or steps equivalent to those described in this specification to carry out the present invention, which means that the scope of this invention is not limited to the embodiments in the specification. On account of that some or all elements of said device invention could be known, the detail of such elements will be omitted provided that this omission nowhere dissatisfies the specification and enablement requirements. Besides, said method invention can be in the form of firmware and/or software which could be carried out by the device of this invention or the equivalent thereof; hence, the following description on the method invention will abridge the hardware details or well-known parts provided that the remaining disclosure is still enough for understanding and enablement.

Please refer toFIG. 1which illustrates an embodiment of the electronic device of the present invention using pulse density modulation for communication. This embodiment is capable of executing a write or read operation after a start protocol is verified, and the electronic device100in this embodiment comprises: a pulse density modulation interface110including a clock path112and a data path114or simply composed of the clock and data paths112,114without any other paths; a first circuit120, coupled with the pulse density modulation interface110, to output a clock signal through the clock path112and a data signal through the data path114; and a second circuit130to receive the clock signal by the clock path112and the data signal by the data path114, and then verify whether the aforementioned start protocol is accomplished according to the clock and data signals. For example, said second circuit130can check to see if the level change times of the data signal (e.g. the total number of the rising and falling edges of the data signal) reach a predetermined threshold while the level of the clock signal remains unchanged, so as to determine whether the clock and data signals from the first circuit120conform to the start protocol. In this embodiment, said predetermined threshold is equal to or more than three.

In light of the above, in the present embodiment, said first circuit120includes an audio circuit (such as an audio codec (coder/decoder)) to output a digital audio signal; said second circuit130includes one or more amplifying circuits to amplify the digital audio signal for sound playing. When the first circuit120is going to change one or more setting values of the second circuit130to realize different playing effects, or read one or more setting values of the second circuit130to ascertain its hardware capability for an adaptive adjustment, the first circuit120will modify the foresaid clock and data signals in a predetermined manner and output them to the second circuit130, so as to notify the second circuit130of a coming write or read operation. More specifically, the second circuit130will find out whether the foresaid start protocol is satisfied according to the clock and data signals and thereby carry out the write or read operation if the start protocol is accomplished. Besides, in order to prevent the noise caused by the data signal for start protocol negotiation, the first circuit120may give the second circuit130a mute indication by transmitting a predetermined digital data stream to the second circuit130in accordance with the level variation of the clock signal before notifying the second circuit130of preparing the write/read operation, which consequently keeps the second circuit130silent; afterwards, the first circuit120may modulate the clock and data signals in a predetermined manner and output the modulated signals to the second circuit130for initializing a following procedure (e.g. said write or read operation). Please note that said mute indication could be replaced by some other indication such as a low volume indication as long the noise could be eliminated or eased. Please also note that although this embodiment adopts the audio circuit and amplifying circuit for instance, such instance is merely for those of ordinary skill in the art to understand the present invention, not for limiting the present invention. In other words, said first and second circuits may comprise other circuits (e.g. a dimming circuit and a lighting circuit) to realize other applications.

Besides, in order to achieve said write/read operation, after the first circuit120outputted the clock and data signals conforming to the start protocol, the first circuit120is operable to output write information to the second circuit130through the pulse density modulation interface110, so as to allow the second circuit130to perform a process in accordance with the write information; furthermore, the first circuit120is also operable to output a read request to the second circuit130through the pulse density modulation interface110, so that the second circuit130can provide read data for the first circuit120through the pulse density modulation interface110in response to the read request. Please refer toFIG. 2, an example of said write information200(Write Info) includes: a write request210, write data (WD)220and an interval column (T)230standing between the write request210and the write data220. Said write request210includes a write component identification code (ID)212, a memory write address (ADDR)214and a write indication (W)216in which the write component identification code212plays a role to point out at least one component in the second circuit130, the memory write address214plays a role to indicate a data storage address in connection with the at least one component, and the write indication216is an instruction to ask the second circuit130to prepare for a write operation. Said write data is used to update the information of the memory write address214. Said interval column230is used to handle the period of access transition between the write request210and the write data220; in the meantime, another interval column230may be set behind the write data220as the separation from a next data. Similarly, as shown inFIG. 3, an example of said read request310includes: a read component identification code (ID)312, a memory read address (ADDR)314and a read indication (R)316in which the read component identification code312is for indicating at least one component in the second circuit130, the memory read address314is for indicating a data storage address in connection with the at least one component, and the read indication316is for asking the second circuit130to prepare for a read operation. After the second circuit130received the read request310, it can provide read data (RD)320in association with the memory read address314for the first circuit120; similarly, an interval column (T)330may exist between the read request310and the read data320to deal with a period of access transition while another interval column may exist behind the read data320as a separation. In this embodiment, said read request310, interval column330and read data320are included in read information (Read Info)300.

Please note that the formats of the above-described write information200and read information300are exemplary, not limitation. Other known or self-defined formats could be adopted in this invention provided that the whole invention is still workable. For instance, if the intended objects of the write and read operations are one and the same and constant, the aforementioned write component identification code212and read component identification code312will become unnecessary, which means that in this case the write information200may merely include the memory write address214, write indication216, write data220and interval column230while the read information may merely include the memory read address314, read indication316, read data320and interval column330. For another instance, if the interval columns230,330have little to do with the second circuit130taking care of the write information200and/or read information300, they won't be necessary.

The foresaid start protocol is the key to determining whether the write or read operation should go on. As the previous description said, the embodiment ofFIG. 1defines the start protocol by a specific combination of the clock and data signals; more specifically, as shown inFIG. 1andFIG. 4, the second circuit130will determine that the clock signal410and the data signal420fulfill the start protocol jointly if the clock signal410remains unchanged (e.g. the clock signal410staying at a high or low level as the dotted line inFIG. 4pointed out) and the level change times of the data signal420reach a predetermined threshold (e.g. the threshold equal to or more than three as the arrows inFIG. 4show). Furthermore, in order to find out whether the start protocol is accomplished, as shown inFIG. 5, an embodiment of the second circuit130includes: a counting unit510to count the level change times of the data signal during the level of the clock signal keeping the same, and thereby generate a counting result; and a decision unit520to compare the counting result with the predetermined threshold and accordingly determine whether the clock and data signals conform to the start protocol jointly. Moreover, in an alternative embodiment of the present invention, the decision unit520can reset the counting unit510for the next determination after finishing comparing the counting result with the predetermined threshold. Please note that the given embodiment of the second circuit130is exemplary, not limitation; other equivalent circuits could be used to implement the second circuit130. For instance, the counting unit510and the decision unit520can be realized through a ripple counter. Since the principle of ripple counter is taking the output signal of a previous stage to be the input clock of a next stage under the condition that the input signal (e.g. the clock signal ofFIG. 4) of each stage keeps the same, if the level of the output signal at the last stage of a K-stages ripple counter changed, it means that the level of the input clock (e.g. the data signal ofFIG. 4) of the K-stages ripple counter changed for a certain times (e.g. 2Ktimes); therefore, the level state of the last output signal could be deemed an indication of the start protocol in satisfaction or dissatisfaction. Please also that the scenario of start protocol could be other combinations of the clock and data signals; for instance, the first circuit120may transmit the data signal in a specific duty cycle or pattern during the clock signal keeping the same to thereby notify the second circuit130of the start protocol. Since those ordinary skill in the art can appreciate how to choose an appropriate combination of the clock and data signals to represent the start protocol according to the teaching of the present invention, repeated and redundant description is therefore omitted.

Please refer toFIG. 1again. The first circuit120inFIG. 1could stand alone. For instance, the first circuit120could be an audio device using pulse density modulation for communication, comprising: a pulse density modulation interface composed of a clock path and a data path (such as a clock pin and a data pin); and an audio circuit to output a clock signal through the clock path and a data signal through the data path, and notify a reception end (such as the second circuit130inFIG. 1) of an access operation, wherein when the audio circuit is going to notify the reception end of the access operation, the audio circuit will keep the clock signal unchanged and change the level of the data signal for at least three times, so as to accomplish the notification. Similarly, the second circuit130inFIG. 1(orFIG. 5) could stand alone. For instance, the second circuit130could be an amplifying device using pulse density modulation for communication, comprising: a pulse density modulation interface composed of a clock path and a data path (e.g. a clock pin and a data pin); and an amplifying circuit to receive a clock signal through the clock path and a data signal through the data path, and verify whether the level change times of the data signal reach a predetermined threshold during the clock signal remaining unchanged, so as to determine whether to comply with a coming access operation request or not. Said predetermined threshold here could be equal to or more than three; and said amplifying circuit may include required or auxiliary circuits (e.g. the counting unit510and decision unit520inFIG. 5) for verifying whether the level change times of the data signals reach the predetermined threshold. As to more of the implementation details and modifications of said audio device and amplifying device, since one of ordinary skill in the art can appreciate the details and modifications through the fore-disclosed embodiments ofFIG. 1throughFIG. 5, repeated and redundant description is therefore omitted to save pages.

Please refer toFIG. 6. In addition to the foresaid electronic device, audio device and amplifying device, the present invention further discloses a communication method using pulse density modulation for communication. Said communication method can be carried out by the electronic device of the present invention or its equivalent, and comprises the following steps:Step S610: a modulation output step to output a predetermined combination of clock and data signals through a pulse density modulation interface. In this embodiment, step S610includes: keeping the level of a clock signal unchanged and outputting the clock signal through the pulse density modulation interface; and changing the level of a data signal for N times and outputting the data signal through the pulse density modulation interface while the level of the clock signal remains the same in which the N is equal to or more than 3.Step S620: a reception decision step to receive the clock and data signals through the pulse density modulation interface, and accordingly determine whether a start protocol is accomplished. In this embodiment, step S620includes: determining whether the level change times of the data signal reach the above-mentioned N times within a period that the level of the clock signal remains the same; if so, the start protocol is fulfilled, and if not, the start protocol is not yet fulfilled.

The aforementioned step S610could be executed by a first circuit and step S620could be executed by a second circuit. In this embodiment, the first circuit includes an audio circuit and the second circuit includes an amplifying circuit for realizing an application in the audio field. However, people of ordinary skill in the art may have the first and second circuits include other circuits (e.g. a dimming circuit and a lighting circuit) to realize other applications on the basis of the present invention. Please note that if this method embodiment is applied to an application of audio field, it may further include a mute step to avoid unwanted noise. This mute step should be executed before step S610, and could be accomplished by outputting a mute indication or a low volume indication through the pulse density modulation interface to quiet said second circuit.

Besides, once step S620found that the start protocol is accomplished, this method embodiment may carry out the following steps (as shown inFIG. 7) for an access operation:Step S630: an access request step to provide write information and/or a read request. In this embodiment, step S630includes: outputting the write information and/or the read request through the pulse density modulation interface if step S620determines that the start protocol is verified.Step S640: an access respondent step to receive the write information and/or the read request through the pulse density modulation interface, and reply accordingly. In this embodiment, step S640includes: performing a process according to the write information (e.g. a process to change at least a circuit setting value in accordance with the write information) or providing read data through the pulse density modulation interface according to the read request.

Similarly, since those of ordinary skill in the art can appreciate the implementation detail and modification of the method inventions in association withFIG. 6andFIG. 7byFIG. 1throughFIG. 5and the descriptions thereof, repeated and redundant description is thus omitted. Please note that there is no step sequence limitation for the method inventions as long as the execution of each step is applicable.

To sum up, the present invention not only allows a transmission end (i.e. the aforementioned first circuit) to optionally control an object in interest, but also allows a reception end (i.e. the aforementioned second circuit) to provide data for the transmission end reversely; hence, the present invention achieves the purpose of flexible control and bilateral communication through a very limited transmission interface.