An electronic device substrate with a substantially planar surface formed from an electrically non-conductive material is provided with one or more metalized pads on the substantially planner surface. Each of the one or more metalized pads is surrounded by and coplanar with the first electrically nonconductive material along an outer boundary of the metalized pad. The metalized pad is patterned such that portions of the metalized pad form metalized fingers that extend radially from the outer boundary of the metalized pad in an interdigitated arrangement with the first electrically nonconductive material. The metalized pad has a solderable surface.

FIELD OF THE INVENTION

Embodiments of the subject matter described herein relate to structures and methods for flip-chip bonding of electronic devices.

BACKGROUND OF THE INVENTION

In flip-chip bonding a semiconductor die is provided with metal surface contacts disposed at the bottom of openings in a layer of passivation material that protects the surface of the die. Additional passivation materials and metalized structures are added to create external metal pads surrounded by passivation material such that the surface of the semiconductor die is completely covered and protected. The external metal pads are configured to allow selective bonding of solder materials to the external metal pads, resulting in solder balls or “bumps” on a top surface of the die. Semiconductor die having such solder bumps may then be inverted and bonded face-down to pads on a circuit board or other surface via the solder bumps.

SUMMARY OF THE INVENTION

In an example embodiment, an electronic device substrate is provided. The substrate includes a repassivation material layer having a substantially planar surface formed on the substrate from a first electrically nonconductive material. The substrate also includes a metalized pad surrounded by and coplanar with the first electrically nonconductive material along an outer boundary of the metalized pad. The metalized pad has a solderable surface and electrically contacts an electrical contact pad on the substrate beneath the metalized pad.

In an example embodiment, a method of fabricating a semiconductor device is provided. The method includes forming a repassivation material layer having a substantially planar surface on a substrate from a first electrically nonconductive material above a substrate having an electrical contact pad. The method also includes forming an aperture in the repassivation material layer that exposes an electrical contact pad on the substrate. The method also includes forming, within the aperture, a metalized pad that is surrounded by and coplanar with the repassivation material layer along an edge of the aperture, wherein the metalized pad has a solderable surface and electrically contacts the electrical contact pad.

DETAILED DESCRIPTION

The following detailed description provides examples for the purposes of understanding and is not intended to limit the invention or the application and uses of the same. Furthermore, there is no intention to be bound by any expressed or implied theory presented in the preceding technical field, background, or the following detailed description.

For simplicity and clarity of illustration, the drawing figures illustrate the general manner of construction, and descriptions and details of well-known features and techniques may be omitted to avoid unnecessarily obscuring the invention. Additionally, elements in the drawing figures are not necessarily drawn to scale. For example, the dimensions of some of the elements or regions in the figures may be exaggerated relative to other elements or regions to help improve understanding of embodiments of the invention.

The terms “first,” “second,” “third,” “fourth” and the like in the description and the claims, if any, may be used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the invention described herein are, for example, capable of operation in sequences other than those illustrated or otherwise described herein. Furthermore, the terms “comprise,” “include,” “have” and any variations thereof, are intended to cover non-exclusive inclusions, such that a process, method, article, or apparatus that comprises a list of elements is not necessarily limited to those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. The term “coupled,” as used herein, is defined as directly or indirectly connected in an electrical or non-electrical manner. As used herein the terms “substantial” and “substantially” mean sufficient to accomplish the stated purpose in a practical manner and that minor imperfections, if any, are not significant for the stated purpose.

Directional references such as “top,” “bottom,” “left,” “right,” “above,” “below,” and so forth, unless otherwise stated, are not intended to require any preferred orientation and are made with reference to the orientation of the corresponding figure or figures for purposes of illustration.

FIG.1Ashows an example environment100in which substrate110(e.g., an electronic device substrate such as a semiconductor die) provided with metalized pads140disposed within and above an electrically insulating passivation material130and so-called repassivation material132. The substrate110is further provided with volumes of soldering material (solder bumps150) which are metallurgically bonded (and as such, electrically coupled) to the metalized pads140. The substrate110is protected by a passivation material130which can be selectively patterned to allow the deposition of electrical contact pads (not shown) or to expose previously formed contacts, leaving the rest of the substrate protected. A second passivation layer (the repassivation material132) is typically formed above a layer of the passivation material130and has a lower modulus of elasticity (Young's modulus) than the passivation material130. This can be desirable in substrates intended to be bonded to chip carriers or other structures in order to reduce the risk of damage to the substrate when pressure is applied during bonding processes as discussed further below.

As shown, the metalized pads have a topography that forms recessed “cups” with edges that are disposed over the passivation material130and the repassivation material132, within which the solder bumps150rest on top of the substrate110. These recessed area can be useful to keep solid beads in place after being placed on the substrate110(prior to heating the substrate110to reflow the solder), As illustrated, the substrate110may be rotated such that the solder bumps150face another substrate190having metalized pads195to which the solder bumps150may be metallurgically bonded (e.g., by heating and reflowing of the solder bumps150), thereby bonding (and electrically coupling) the metalized pads140of the substrate110to corresponding metalized pads195of the substrate190. As an example, the substrate110may be a semiconductor die configured to be bonded (and also electrically coupled) to a printed circuit board in order to integrate circuitry within the substrate110with other circuitry bonded to the substrate190or otherwise electrically coupled to the substrate190.FIG.1Cshows a plan view of the portion of the substrate110shown inFIG.1A. The solder bumps150ofFIG.1Acan be seen disposed within the boundaries of the metalized pads140which are surrounded by the repassivation material132. It will be understood that the illustrations described above are schematic in nature and do not necessarily represent the actual shape of solder bumps once properly bonded to a substrate. For instance, it will be understood that once sufficiently heated, a solder bump will tend to melt and wet the surface of a metalized pad on which it rests, similarly to the solder bump depicted inFIG.2.

FIG.2depicts a cross-section of an example of a known structure200in which solder bump250(e.g., a solder bump150) that is metallurgically bonded to a metalized pad240on a substrate210and to another substrate298(e.g., a printed circuit board) via a metalized pad299on that substrate. In a representative process, the soldering material forming the solder bump250may be placed on top of the metalized pad240in solid form (e.g., as pellet or ball of solder). The substrate210may then be heated to a suitable reflow temperature (for instance 220° C., as a nonlimiting example), whereupon the solder flows causing its shape to conform to the geometry of the underlying metalized pad. The solder and the substrate then cool to ambient temperature, whereupon the solder material solidifies, metallurgically bonding the soldering material to the substrate210and forming the solder bump250as shown. The entire structure may then be bonded to another substrate (e.g., the substrate298shown inFIG.2) by way of one or more solder bumps250. In such an example structure, mechanical stresses are induced as a solder bump250and the substrate210coo after being heated during the bonding process. In the example structure200and related structures, areas of high tensile stress within the substrate210will tend to form in the regions290beneath the edges of the solder bump250while areas of high compressive stress will tend to form in the die in the region295beneath the center of the solder bump250as wells as tensile stresses in the solder bump itself in the vicinity of the regions290,295. As an example, such stresses can be undesirable because they can result in altered performance of electronic devices within the die if they are too close to solder bump250. It will be understood that the solder bump250is depicted schematically for purposes of illustration and that the exact shape of a solder bump used to bond two substrates may differ from the shape of the solder bump250as shown inFIG.2.

Accordingly, as illustrated inFIG.3AandFIG.3B, embodiments herein include structures and methods to provide electronic device substrates with metalized pads which are configured and arranged to reduce mechanical stresses at the interface between an electronic device substrate and solder bumps which are metallurgically bonded to such substrates. As will be explained below in connection withFIG.6A,FIG.6B, andFIG.6C, the example embodiments and related embodiments may confer certain benefits including, for instance, reducing or preventing stresses in the vicinity of a solder bump; that is, at the interface between the solder bump and a substrate to which it is bonded, and/or in an underlying semiconductor die, when compared with bonding solder bumps to substrates using metalized pads fabricated according to previous approaches (e.g., as illustrated and described above inFIGS.1A-1CandFIG.2). In particular the process of bonding a solder bump to metalized pad as shown inFIG.2tends to induce cracks that originate at the edges of the metalized pad. Metalized pads according to embodiments herein described below can enable reduced peeling stresses at the interface between a solder bump and a metalized pad, thereby reducing the incidence of crack formation induced between solder bump and a semiconductor die or other device substrate.

FIG.3Ashows plan view a cross-sectional schematic view of an example structure300A according to embodiments herein. In the example structure300A, a substrate310(e.g., a substrate110/210) includes one or more contacts320(e.g., a metal contact electrically coupled to one or more electronic devices within the substrate310). Each contact320(and other structures on or near the surface315of the substrate310) are protected by a first electrically insulating material (which may be referred to as a “passivation,” “passivation material,” or a “passivation layer”330) and a second electrically insulating material332A (which may be referred to as a “repassivation,” “repassivation material,” or a repassivation material”332A). The repassivation material332A forms a substantially planar surface335above the top surface315of the substrate310. One or more metalized pads340A are disposed within the substantially planar surface335and are electrically coupled to a corresponding contact320through an aperture in the passivation material330and the repassivation material332A. As shown, the metalized pad340A is surrounded by the repassivation material332A and is coplanar with the repassivation material332A along an outer boundary region that is partially defined by the diameter352A relative to a central region349A defined by the dimension352A. As shown the metalized pad340A is recessed below the planar surface335of the repassivation material332A within the central region349A above the contact320indicated by the dimension354A. However, it will be appreciated that, in one or more related embodiments, the recessed area is not required.

FIG.3Bshows plan view a cross-sectional schematic view of an example structure300B that is an alternative to the structure300A in one or more embodiments. In the structure300B, the metalized pad340B is patterned inversely to the metalized pad340A. That is, the metalized pad340B surrounds a central area349B (indicated by the dimension352B) where the metallization is absent and includes an interior region in which the metalized pad340B and the repassivation material332B (e.g., the repassivation material332A). When compared to the structure300A, the structure300B may have lower thermal and electrical conductivity, making it suitable for applications in which thermal power dissipation is lower compared to applications for which the structure300A is suited. It will be understood that, in one or more embodiments, repassivation material (e.g., the repassivation material332B) and an adjacent portion of a metalized pad (e.g., the metalized pad340B) are recessed below the substantially planar surface335, as depicted in the cross-sectional view inFIG.3Bof the structure300B. As above, it will be appreciated that, in one or more related embodiments, the recessed area is not required.

The passivation material330and the repassivation material(s)332A,332B may be any suitable materials. In one or more embodiments, the passivation material is a crystalline, semicrystalline, or amorphous oxide or nitride material (e.g., SiO2, SiOX where x is a number other than two, Si3N4, or Si3NX where x is a number other than four, as nonlimiting examples). In one or more embodiments, the repassivation material332A or the repassivation material332B is a dielectric material with a low elastic modulus compared to the elastic modulus of the repassivation material332(e.g., polyimide, polybenzoxazole, etc., as nonlimiting examples). Similarly, the metalized pads340A,340B may be formed from any suitable materials and by any suitable process(es). In one or more embodiments, metalized pads340A or340B have a metal surface that is wettable by one or more solder materials (i.e., the surface is “solderable”). In one or more embodiments, metalized pads340A or340B are formed by a stack of two or more electrically conductive materials. In one example, a metalized pad may include one or more conductive adhesion layers (e.g., Ti, Ni, Ti/Cr as nonlimiting examples) covered by another conductive material such as Cu or Au, as nonlimiting examples. In general, the topmost metallization material which will contact a solder bump may be chosen to have favorable properties such as being easily wetted by a chosen solder material in a molten state.

FIG.4illustrates formation of the structure300A on the substrate110during various steps of an example process400having steps410,420,430,440,450,460,470, and480. At step410, the substrate310is shown already provided with contact pads320, the passivation material330and the repassivation material332. These contact pads320may be any suitable conductive material (e.g., aluminum, copper, gold, etc.) and may be coupled to vias in the substrate310or exposed electrical traces on the surface of the substrate310. In the example of step410, a masking material412(e.g., photoresist) is deposited on top of the repassivation material332and patterned as shown. A seed metallization layer414(e.g., Ti followed by Ni) is deposited over patterned masking material412(e.g., photoresist).

At step420, the seed metallization414is patterned in a subtractive lift-off process in which the masking material412is removed (e.g., by a solvent rinse), leaving the seed metallization414only on desired portions of the substrate310. It will be understood that even though a lift-off process is described for the patterning of the seed metallization414, any suitable process may be used, including a subtractive process wherein the seed metallization is deposited over the entire surface and then substantively patterned (by an etching process, for example). An inset top view427of step420is also shown, indicating the positioning of the seed metallization414.

At step430, additional repassivation material432is deposited on the substrate310followed by a masking material434(e.g., photoresist) which is patterned as shown.

At step440, a suitable etching process (e.g., one which does not appreciably etch the seed metallization414or etches the seed metallization414at a much slower rate than it etches the additional repassivation material432and the repassivation material332) is used to etch portions of the additional repassivation material432and the repassivation material332leaving an aperture in the repassivation material332within which the contact pad320is exposed. An inset top view447of step440is also shown, indicating the positioning of the exposed contact320relative to the seed metallization414.

At step450, the masking material434has been removed and additional seed metallization material414or other suitable metallization material is deposited as metallization material452over the initial seed metallization material414. As an example, the metallization material422may deposited via electroplating, sputtering, or evaporation to a desired thickness.

At step460, another masking material464(e.g., photoresist) is deposited and patterned, as shown. Additional metallization material462may then be deposited in a pattern defined by the masking material464using any suitable process including electroplating, sputtering, or thermal evaporation, as nonlimiting examples.

At step470, the masking material464is removed and the residual seed metallization414, which was previously protected by the masking material464(shown as the residual metal466in step460), is removed using any suitable process including wet chemical etching, dry plasma etching, or chemical-mechanical polishing, as nonlimiting examples, resulting in the metalized pad340A, which is coplanar (or substantially coplanar) with the repassivation332A along its outer edge and recessed below the plane of the repassivation material332A as shown inFIG.3A. The cross-sectional view of step470shown corresponds to a plane indicated by the dashed line479that bisects the inset top view477of step470.

Finally, at step480, the solder bump350is bonded to the metalized pad340A by any suitable process. For example, a solid volume of solder may be placed on the metalized pad and heated until the solder wets the metalized pad and then bonds to the pad upon cooling.

FIG.5illustrates formation of the structure300B on the substrate310during various steps of an example process500having steps510,520,530,540,550,560,570, and580. At step510, the substrate310is shown already provided with contact pads320, the passivation material330and the repassivation material332. In the example of step510, a masking material512(e.g., masking material412) is deposited on top of the repassivation material332and patterned as shown. A seed metallization layer514(e.g., the seed metallization414) is deposited over the patterned masking material512.

At step520(e.g., the step420of the process400), the seed metallization514is patterned in a subtractive lift-off process in which the masking material512is removed, leaving the seed metallization414only on desired portions of the substrate310. It will be understood that even though a lift-off process is described for the patterning of the seed metallization414, any suitable process may be used, including a subtractive process wherein the seed metallization is deposited over the entire surface and then substantively patterned (by an etching process, for example). An inset top view527of step520is also shown, indicating the positioning of the seed metallization514.

At step530, additional repassivation material532(e.g., the additional repassivation material432) is deposited on the substrate310followed by deposition of a masking material532(the masking material432) which is patterned as shown. In contrast to step430of the process400, the masking material534in step530covers the seed metallization514and also an area between the two areas of seed metallization514.

At step540, a suitable etching process is used to etch portions of the additional repassivation material532and the repassivation material332(e.g., as previously described in connection with step440of the process400) leaving apertures in the repassivation material332within which the contact pad320is exposed.

At step550, the masking material534is removed and additional seed metallization material514or another additional metallization material is deposited over initial seed metallization514as the metallization material552. As an example, metallization material514or metallization material552may deposited via electroplating, sputtering, or evaporation to a desired thickness, as previously described in connection with step450of the process400.

At step560, another masking material564(e.g., the masking material464of the process400) is deposited and patterned, as shown. Additional metallization material562may then be deposited in a pattern defined by the masking material564using any suitable process, as previously described in connection with step460of the process400.

At step570, the masking material562is removed and the residual seed metallization414, which was previously protected by the masking material464(shown as the residual metal566in step560), is removed using any suitable process including wet chemical etching, dry plasma etching, or chemical-mechanical polishing, as nonlimiting examples, resulting in the metalized pad340B which is coplanar with the repassivation332B along its outer edge and recessed below the plane of the repassivation material332B as shown inFIG.3B. The cross-sectional view of step570shown corresponds to a plane indicated by the dashed line579that bisects the inset top view577of step570.

At step580, masking material582(e.g., photoresist) is patterned over the center of the metalized pad340B and the additional repassivation material532in that region is partially removed using any suitable process (e.g., wet etching, or dry plasma etching as nonlimiting examples) to create the recessed profile of the shown in which the additional repassivation material532is substantially coplanar with the surrounding recessed portion of the metalized pad340B. It will be appreciated that, in one or more embodiments, the recessed profile shown can be achieved in any suitable manner including performing the step580or a similar step at a different point in the process500. For example, the additional repassivation material532could be patterned immediately after step540as one non-limiting example.

Finally, at step590(e.g., the step480of the process400), after the masking material582has been removed, the solder bump350is bonded to the metalized pad340B by any suitable process, as previously described in connection with step480of the process400.

It will further be appreciated that, in or more embodiments, modifications to various steps shown may be employed. For instance, at step510, the masking material512may be patterned such that an additional segment of the seed metallization514is present on the surface of the repassivation material332at subsequent steps520,530, and540.

It will also be appreciated that although processes400and500as shown inFIG.4andFIG.5, respectively are described as having various patterning steps which involve patterning one or masking materials (e.g., photoresist) that, in some instances, areas of the repassivation material (e.g., additional repassivation material432,532and/or repassivation material332) may be patterned directly using known lithographic techniques to selectively cross-link or depolymerize the repassivation materials.

FIG.6Aincludes a plot600A showing the result of computational simulations of the peeling stresses (stresses that are concentrated at edges when two materials are bonded together) on the surface of semiconductor provided with a conventionally-shaped metalized pad with a non-planar topography (e.g., a metalized pad140as shown inFIG.1AandFIG.1B) when a solder ball (e.g., a solder ball150) is joined to the metalized pads. A concentrated annular area610A of high peeling stress values can be seen. Note that only one quadrant is simulated, as shown by the schematic top view illustration602A. An isometric view604A shows that the simulated structure is not coplanar with the surrounding repassivation material.

FIG.6Bincludes a plot600B showing the result of computational simulations of the peeling stresses on the surface of semiconductor die provided with metalized pad that is patterned similarly to the metalized pad340A but without the planarized topography present in embodiments herein (e.g., the metalized pad340A). Areas of high peeling stresses are present in the annular region610B (analogous to the annular region610A), but areas of reduced stress (indicated by dashed ellipses) are seen within the annular region610B. The peak peeling stress in the simulation represented by the plot600B is reduced by approximately 7% compared to the simulation represented by the plot ofFIG.6A. As above only one quadrant is simulated, as shown by the schematic top view illustration602B. An isometric view604B shows that the simulated pad structure is not coplanar with the surrounding repassivation material.

FIG.6Cincludes a plot600C showing the result of computational simulations of the peeling stresses on the surface of semiconductor die provided with a metalized pad according to embodiments herein (i.e., a pad similar to the metalized pad340A) Areas of high peeling stresses are present in the annular region610C (analogous to the annular regions610A and610B) and areas of reduced stress (indicated by dashed ellipses) are present as in the annular region610B. But it can be seen that the combination of a shaped metalized pad and coplanarity of the pad with the surrounding repassivation material can result in significantly reduced peak values for the peeling stresses. The peak peeling stress in the simulation represented by the plot600C ofFIG.6Cis reduced by approximately 44% compared to the simulation represented by the plot600A ofFIG.6A. As above, only one quadrant is simulated, as shown by the schematic top view illustration602C. An isometric view604C shows that the simulated pad structure, in contrast to the structures ofFIG.6AandFIG.6B, is coplanar with the surrounding repassivation material at its outer boundary with the repassivation material.

Although various illustrations and examples herein describe metalized pads that are patterned to have an interdigitated arrangement with a repassivation layer it should be understood that other patterns can be used in one or more embodiments. Non-limiting examples of suitably patterned metalized pads are shown inFIG.7and include annular structures702,704, and706; a slotted annular structure708; a Greek cross712and a separated Greek cross714; and an inverted trefoil716. It will be understood that nothing herein is intended to limit the topology of metalized pads according to embodiments to any particular number or types of patterns. Additionally, it will be understood that although one or more embodiments may include recessed areas such as those shown inFIG.3AandFIG.3B, that in one or more other embodiments, such recessed areas can be omitted.

It will be appreciated that the steps of various processes described herein are non-limiting examples of suitable processes according to embodiments and are for the purposes of illustration. Systems and devices according to embodiments herein may use any suitable processes including those that omit steps described herein, perform those steps and similar steps in different orders, and the like. It will also be appreciated that well-known steps or other well-known process features may be omitted for clarity.

Features of embodiments may be understood by way of one or more of the following examples:

Example 1: An electronic device substrate includes a repassivation material layer and a metalized pad. The repassivation material layer has a substantially planar surface formed on the substrate from a first electrically nonconductive material and the metalized pad is surrounded by and coplanar with the first electrically nonconductive material along an outer boundary of the metalized pad. The metalized pad has a solderable surface and electrically contacts an electrical contact pad on the substrate beneath the metalized pad.

Example 2: The substrate of Example 1, in which the metalized pad includes metalized fingers that extend radially from the outer boundary of the metalized pad in interdigitated arrangement with the repassivation material layer.

Example 3: The substrate of Example 2 in which the metalized fingers of the metalized pad extend radially outward from a central portion of the metalized pad.

Example 4: The substrate of any of Examples 1-3, in which the metalized pad includes a recessed portion inside the outer boundary that is recessed below the substantially planar surface.

Example 5: The substrate of any of Examples 2-4, in which the metalized fingers of the metalized pad extend radially inward from the outer boundary of the metalized pad toward a central region formed from the first electrically nonconductive material of the repassivation material layer.

Example 6: The substrate of Example 5, in which a portion of each metalized finger includes a recessed portion inside the outer boundary that is recessed below the substantially planar surface. The central region formed from the first electrically nonconductive material of the repassivation material layer is also recessed below the substantially planar surface and is substantially coplanar with the recessed portion of each metalized finger.

Example 7: The substrate of any of Examples 1-6, in which the metalized pad includes a recessed portion inside the outer boundary that is recessed below the substantially planar surface.

Example 8: The substrate of any of Examples 1-7. The electronic device substrate of claim2, further comprising a passivation material layer formed from a second electrically nonconductive material underlying the substantially planar surface of the repassivation material layer.

Example 9: The substrate of Example 8, in which the first electrically nonconductive material is a polymeric material characterized by a first elastic modulus and the second electrically nonconductive material is characterized by a second elastic modulus that is higher than the first elastic modulus.

Example 10: The substrate of any of Examples 1-9, further including an electrically conductive contact beneath the metalized pad. The metalized pad is electrically coupled to the electrically conductive contact within an aperture that passes through the repassivation material layer and the passivation material layer.

Example 11: The substrate of any of Examples 1-10 wherein the metalized pad and first electrically nonconductive material of the repassivation material are jointly configured and arranged such that mechanical strain in the metallized pad is at least partially relieved by elastic deformation of the repassivation material layer.

Example 12: A method of fabricating an electronic device substrate that includes forming a repassivation material layer having a substantially planar surface on a substrate from a first electrically nonconductive material above a substrate having an electrical contact pad. The method further includes. The method further includes forming an aperture in the repassivation material layer that exposes an electrical contact pad on the substrate. The method further includes forming, within the aperture, a metalized pad that is surrounded by and coplanar with the repassivation material layer along an edge of the aperture, wherein the metalized pad has a solderable surface and electrically contacts the electrical contact pad.

Example 13: The method of Example 12, in which forming the metalized pad includes forming metalized fingers that extend radially from an outer boundary of the metalized pad in an interdigitated arrangement with the repassivation material layer.

Example 14: The method of Example 13, in which the metalized fingers of the metalized pad extend radially outward from a central portion of the metalized pad.

Example 15: The method of Example 14 or Example 13, in which forming the metalized pad includes forming a recessed portion of the metalized pad inside the outer boundary that is recessed below the substantially planar surface.

Example 16: The method of any of Examples 13-15, further including forming a central region from the first electrically nonconductive material of the repassivation material layer. In this example, the metalized fingers of the metalized pad extend radially inward from the outer boundary of the metalized pad toward a central region formed from the first electrically nonconductive material of the repassivation material layer.

Example 17: The method of any of Examples 13-16, in which forming the metalized fingers includes forming a recessed portion of each metalized finger that is recessed below the substantially planar surface and disposed inside the outer boundary. In this example, the central region formed from the first electrically nonconductive material of the repassivation material layer is also recessed below the substantially planar surface and is coplanar with the recessed portion of each metalized finger.

Example 18: The method of any of Examples 12-17, in which forming the metalized pad includes forming a recessed portion of the metalized pad that is recessed below the substantially planar surface and disposed inside the outer boundary.

Example 19: The method of any of Examples 12-18 in which the repassivation material layer is formed over a passivation material layer on the substrate formed from a second electrically nonconductive material. The first electrically nonconductive material is a polymeric material characterized by a first elastic modulus and the second electrically nonconductive material characterized by a second elastic modulus that is higher than the first elastic modulus. This example further includes jointly configuring and arranging the metalized pad and the first electrically nonconductive material of the repassivation material layer such that mechanical strain in the metallized pad is at least partially relieved by elastic deformation of the repassivation material layer.

Example 20: The method of any of Examples 12-19, further including electrically coupling the metalized pad to the electrical contact pad within the aperture that passes through the repassivation material layer.

The preceding detailed description and examples are merely illustrative in nature and are not intended to limit the embodiments of the subject matter or the application and uses of such embodiments. As used herein, the word “exemplary” means “serving as an example, instance, or illustration.” Any implementation described herein as exemplary is not necessarily to be construed as preferred or advantageous over other implementations. Furthermore, there is no intention to be bound by any expressed or implied theory presented in the preceding technical field, background, or detailed description.

The foregoing description refers to elements or nodes or features being “connected” or “coupled” together. As used herein, unless expressly stated otherwise, “connected” means that one element is directly joined to (or directly communicates with) another element, and not necessarily mechanically. Likewise, unless expressly stated otherwise, “coupled” means that one element is directly or indirectly joined to (or directly or indirectly communicates with, electrically or otherwise) another element, and not necessarily mechanically. Thus, although the schematic shown in the figures depict one example arrangement of elements, additional intervening elements, devices, features, or components may be present in one or more embodiments of the depicted subject matter.