Driving device of display panel and display device

A driving device of a display panel and a display device are provided. A source driver expands display data of a low-resolution image to be displayed in a first working mode, and cooperates with the source driver to receive and processes display data of a high-resolution display image in a second working mode, which makes the driving device of the display panel has good compatibility.

FIELD OF INVENTION

The present application relates to a field of display technology, and particularly relates to a driving device of a display panel and a display device.

BACKGROUND OF INVENTION

Currently, for high-end liquid crystal display device products, such as high refresh rates or high-resolution products, a timing controller that can process high-resolution display data is required. However, cost of the timing controller that can process high-resolution display data is relatively high.

Therefore, it is necessary to propose a technical solution to solve a problem of excessively high cost of the timing controller of the high-end liquid crystal display device.

Technical Problem

An objective of the present application is to provide a driving device of a display panel and a display device to allow the driving device of the display device can be compatible with timing controllers that process display data with different resolutions.

SUMMARY OF INVENTION

In order to achieve the above objective, the technical solutions are as follows:

A driving device of a display panel, the driving device includes:

n source drivers, wherein n is an integer greater than or equal to 2, and each of the source drivers has a first working mode and a second working mode, each of the source drivers is configured to receive a corresponding first display data set in the first working mode and expand display data of the first display data set to obtain a second display data set, and transmit the second display data set to the display panel, display data of n first display data sets corresponding to n source drivers constitute a first image to be displayed, and a data quantity of display data in the second display data set is different from a data quantity of display data in the first display data set;

each of the source drivers is further configured to receive a corresponding third display data set in the second working mode, and transmit the third display data set to the display panel, and display data of n third display data sets corresponding to n source drivers constitute a second image to be displayed; and

wherein a resolution of the second image to be displayed is greater than a resolution of the first image to be displayed.

A display device, the display device includes the above-mentioned driving device and a display panel electrically connected to the driving device.

BENEFICIAL EFFECT

The present application provides a driving device of a display panel and a display device. A source driver expands display data of a low-resolution image to be displayed in a first working mode, and cooperates with the source driver to receive and processes display data of a high-resolution display image in a second working mode to allow the driving device of the display panel can be equipped with a timing controller for processing low-resolution display data and can also be equipped with a timing controller that processes high-resolution display data. As a result, the driving device of the display panel has good compatibility.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

The technical solutions in the embodiments of the present application will be clearly and completely described with reference to the drawings in the embodiments of the present application. Obviously, the embodiments described are only a part of the embodiments of the present application, rather than all the embodiments. Based on these embodiments in the present application, all other embodiments obtained by those skilled in the art without doing creative work shall fall within the protection scope of the present application.

As shown inFIG.1, it is a schematic diagram of a display device in a first working mode according to an embodiment of the present application. The display device100can be a liquid crystal display device or an organic light-emitting diode display device. The display device100includes a display panel10, a driving device, and a timing controller30. The driving device includes n source drivers201, gate drivers202, a plurality of transmission circuit boards203, and transmission lines205, where n is an integer greater than or equal to 2. The timing controller30is disposed on a control circuit board204.

In this embodiment, a display panel10is a liquid crystal display panel. The display panel10includes a plurality of sub-pixels101, a plurality of data lines102, and2pscan lines103, where p is an integer greater than or equal to 1. The plurality of sub-pixels are arranged in an array, and each column of sub-pixels emits the same light. Each column of the plurality of sub-pixels is connected to the same data line102, and each row of the plurality of sub-pixels is connected to the same scan line103, that is, the display panel adopts a 1G1D architecture. The plurality of sub-pixels includes a red sub-pixel R, a blue sub-pixel B, and a green sub-pixel G. One red sub-pixel R, one blue sub-pixel B, and one green sub-pixel G constitute one pixel. Specifically, display panel10is an 8 k display panel, that is, the resolution of the display panel is 7680×4320.

In this embodiment, gate driver202is used to transmit scan signals to 2p scan lines103. The gate driver202can be integrated on display panel10, and the gate driver202can also be bonded on display panel10. The gate driver202provides scanning signals to a plurality of adjacent scanning lines103at the same time so that multiple adjacent sub-pixels of the display panel10in the column direction input the same display data information at the same time. It provides conditions for displaying display data of low-resolution images on a high-resolution display panel.

Specifically, gate driver202is used to simultaneously output scan signals to 2q−1th scan line and 2qth scan line, where q is an integer greater than or equal to 1 and less than or equal to p. Therefore, the display data written in the sub-pixels in 2q−1th row and 2qth row in the same column are the same. For example, gate driver202provides scan signals to the first scan line and the second scan line at the same time. The gate driver202provides scan signals to third scan line and fourth scan line at the same time. Gate driver202provides scan signals to fifth scan line and sixth scan line at the same time, and so on.

In this embodiment, each source driver201is disposed on a flip-chip film, and a plurality of flip-chip films are bonded to one side of the display panel10. The source drivers201are electrically connected to display panel10through a flip-chip film. Each source driver201includes a plurality of output channels. Each output channel is electrically connected to a data line102to transmit a data signal to the data line102, and the data line102transmits display data to corresponding sub-pixels. It can be understood that source drivers201can also be directly bonded to the display panel10.

Specifically, n is 24, that is, the driving device of this embodiment includes 24 source drivers. Each source driver includes 960 output channels, each source driver outputs 320 columns of pixel information, and each pixel information includes three sub-pixel information. The three sub-pixel information are red sub-pixel information, blue sub-pixel information, and green sub-pixel information.

In this embodiment, each source driver201has a first working mode and a second working mode. In the first working mode, the source driver201receives display data of low-resolution images and expands the display data of the low-resolution images to increase data amount of display data of the low-resolution images. Furthermore, it provides more display data for the high-resolution display panel and cooperates with gate driver202to provide scanning signals to multiple adjacent scanning lines at the same time, so as to provide conditions for low-resolution images to be displayed on the high-resolution display panel. In the second working mode, the source driver201receives display data of high-resolution images and transmits the display data of the high-resolution images to a high-resolution display panel after processing. That is, in the second working mode, the source driver is in a normal working mode. Therefore, each source driver has the ability to process low-resolution display data as well as high-resolution display data. This provides conditions for the source driver to be equipped with a timing controller that outputs low-resolution display data and a timing controller that outputs high-resolution display data. The source driver of the display device can be compatible with timing controllers with different processing capabilities, which is beneficial to reduce costs.

In this embodiment, as shown inFIG.2, is a schematic diagram of a source driver shown inFIG.1being electrically connected to a first output circuit, a second output circuit, and a third output circuit. Each source driver201includes a first detection module2011, and the first detection module2011is configured to detect signal input by a corresponding source driver and control the working mode of the corresponding source driver. When the first detection module detects that the corresponding source driver is input with a first preset signal, the corresponding source driver is in the first working mode, and when the first detection module2011detects that source driver201is input with a second preset signal, the source driver201is in the second working mode. The second preset signal is different from the first preset signal. For example, after the display device100is turned on, the first detection module2011enters a detection mode, and the working mode of the source driver201is adjusted according to a detection result of the first detection module2011. Specifically, the first preset signal is a high-level signal, and the second preset signal is a low-level signal. It can be understood that the first preset signal can be a low-level signal, and the second preset signal can be a high-level signal.

In this embodiment, as shown inFIG.2andFIG.3.FIG.3is a schematic diagram of the second output circuit shown inFIG.2. The driving device further includes n second output circuits206, and each second output circuit206is electrically connected to the first detection module2011of the corresponding source driver201.

Specifically, the n second output circuits206are electrically connected to the first detection modules2011of then source drivers201in a one-to-one manner. Each second output circuit206includes a third power line2061, a fourth power line2062, and a first output terminal O1. The third power line2061transmits a third electrical level, the fourth power line2062transmits a fourth electrical level, the first output terminal O1is electrically connected to the first detection module2011, and the fourth electrical level is different from the third electrical level. As shown inFIG.3(A). When first output terminal O1is electrically connected to third power line2061and the first output terminal O1is disconnected from fourth power line2062, second output circuit206outputs the first preset signal to the first detection module2011. Wherein, when the first output terminal O1is electrically connected to the third power line2061, a first voltage divider unit2063is connected in series between the first output terminal O1and the third power line2061. When the first output terminal O1and the fourth power line2062are disconnected, the wire between the first output terminal O1and the fourth power line2062is in a disconnection state.

As shown inFIG.3(B), when the first output terminal O1is electrically connected to the fourth power line2062and the first output terminal O1is disconnected from the third power line2061, the second output circuit206outputs the second preset signal to the first detection module2011. Wherein, when the first output terminal O1is electrically connected to the fourth power line2062, the second voltage divider unit2064is connected in series between the first output terminal O1and the fourth power line2062. When the first output terminal O1is disconnected from the third power line2061, the wire between the first output terminal O1and the third power line2061is in a disconnection state.

Specifically, a first wire2065is provided between the third power line2061and the first output terminal O1, and the first wire2065has a first breakpoint I1and a second breakpoint I2. When the first voltage divider unit2063is connected between first breakpoint I1and second breakpoint I2, the third power line2061is electrically connected to the first output terminal O1, and the first output terminal O1outputs the first preset signal. When the first voltage divider unit2063is not connected between the first breakpoint I1and the second breakpoint I2, the third power line2061is disconnected from the first output terminal O1. A second wire2066is provided between the fourth power line2062and the first output terminal O1, and the second wire2066has a third breakpoint I3and a fourth breakpoint I4. When second voltage divider unit2064is connected between the third breakpoint I3and the fourth breakpoint I4, the fourth power line2062is electrically connected to the first output terminal O1, and the first output terminal O1outputs the second preset signal. When the second voltage divider unit2064is not connected between the third breakpoint I3and the fourth breakpoint I4, the fourth power line2062is disconnected from the first output terminal O1. The third electrical level is a high electrical level, and the fourth electrical level is a low electrical level. For example, the third electrical level is a voltage of 1.8V, and the fourth electrical level is a voltage of 0V that is grounded. The first voltage divider unit2063is a first resistor R1, and the second voltage divider unit2064is a second resistor R2. The resistance values of the first resistor R1and the second resistor R2may be the same or different. The first voltage divider unit2063can be connected between the first breakpoint I1and the second breakpoint I2by soldering or the like. The second voltage divider unit2064can also be connected between the third breakpoint I3and the fourth breakpoint I4by soldering or the like.

In this embodiment, as shown inFIG.2. Each source driver201further includes a first pin2012, and the first pin2012is electrically connected to the first output terminal O1of the second output circuit206. The first detection module2011of each source driver201is further electrically connected to the first pin2012.

In this embodiment, when the display device needs to use a timing controller for processing low-resolution display data, by connecting a first resistor R1in series on the first wire2065between the third power line2061of the first output circuit206and the first output terminal O1and disconnecting the second wire2066, so that the first output circuit206outputs the first selection signal to the first pin2012. When first detection module detects first preset signal transmitted by the first pin2012, the source driver201enters the first working mode. When the display device uses a timing controller for processing high-resolution display data, by connecting a second resistor R2in series on the second wire2066between the fourth power line2062of the first output circuit206and the first output terminal O1and disconnecting first wire2065, so that the first output circuit206outputs second preset signal to the first pin2012. When the first detection module detects second preset signal transmitted by the first pin2012, the source driver201enters the second working mode.

In this embodiment, when the n source drivers201are in the first working mode, the n source drivers201are divided into one or more groups. Each group of source drivers201aincludes a plurality of cascaded source drivers201, and the number of source drivers201in any two groups of source drivers201ais the same. As shown inFIG.4, it is a schematic diagram of cascaded source drivers in a group of source drivers. The transmission line205is a point-to-point transmission line, and the transmission line205is connected between the timing controller30and the source driver201. A pair of transmission lines205(two transmission lines205) are used to transmit the same display data to a plurality of cascaded source drivers201in a group of source drivers201a. Each transmission line205includes a transmission main line2051and a plurality of transmission branch lines2052. One end of the transmission main line2051is connected to the timing controller30, and the other end of the transmission main line2051is connected to one end of the multiple transmission branch lines2052of each transmission line205. The other ends of the plurality of transmission branch lines2052of each transmission line205are electrically connected to the plurality of source drivers201of each group of source drivers201ain a one-to-one manner. A pair of transmission lines is connected to a group of source drivers201a, that is, each source driver201is connected to two transmission branch lines2052of a pair of transmission lines. For each transmission line205, the connection node P between the transmission main line2051and the plurality of transmission branch lines2052is arranged on the control circuit board204to facilitate the adjustment of the connection relationship between the timing controller30and the multiple source drivers201when the source driver201switches between the first working mode and the second working mode. Specifically, each transmission line205includes a transmission main line2051and two transmission branch lines2052. One transmission main line2051and two transmission branch lines2052are connected in a T-shape. It is understandable that the number of source drivers201in the at least two groups of source drivers201amay also be different. The number of cascaded source drivers201in each group of source drivers201acan also be three or more.

In this embodiment, when the n source drivers201are in the first working mode, the timing controller30receives first low-resolution image to be displayed. The timing controller30splits the display data of the first image to be displayed into a plurality of parallel input display data sets, each input display data set is composed of continuous multiple columns of pixel display data. Each pair of transmission lines transmits display data of one input display data set to a group of source drivers201. Specifically, when the first image to be displayed is a 4 k image, the 4 k image includes 11520 columns of sub-pixel display data (corresponding to 3840 columns of pixel display data). The display data of the first image to be displayed is split into 12 parallel input display data sets, and each input display data set includes 960 columns of sub-pixel display data. The timing controller30includes 12 first interfaces. Each source driver201has 24 second interfaces. The transmission line is a P2P transmission line. The number of transmission lines is 12 pairs of transmission lines. Each transmission line205is a T-type transmission line. The first pair of T-shaped transmission lines transmit display data of the sub-pixels from 1st column to 960th column to the first group of source drivers. The second pair of T-shaped transmission lines transmit display data of the sub-pixels from 961th column to 1920th column to the second group of source drivers. The third pair of T-shaped transmission lines transmit display data of the sub-pixels from 1921th column to 2880th column to the third group of source drivers, and so on.

In this embodiment, as shown inFIG.2, each source driver201further includes an identification module2013. When the source driver201is in the first working mode, the identification module2013is activated and identifies the identification signal corresponding to the source driver201to obtain an identification result. Part of display data in the input display data set received by each source driver201according to the identification result and preset rule is a corresponding display data of the first display data set, and display data of the first display data set received by the plurality of source drivers201arranged in cascade in each group of source drivers201acollectively constitute the input display data set.

Specifically, each group of source drivers201aincludes a cascaded first source driver and a second source driver, and the identification signal includes a first identification signal and a second identification signal. Each input display data set consists of continuous display data of i columns of pixels, i is an integer greater than or equal to 2. The preset rule is: One of the first source driver and the second source driver receives first identification signal and display data of consecutive first i/2 columns of pixels, another one of the first source driver and the second source driver receives second identification signal and display data of consecutive last i/2 columns of pixels. For example, as shown inFIG.5. Two cascaded source drivers201are used as a set of source drivers, and each input display data set is composed of display data of 960 columns of sub-pixels (corresponding to 320 columns of pixel display data). After the first source driver receives a first identification signal, the first source driver receives display data of the first 480 columns of consecutive sub-pixels (corresponding to display data of the first 160 columns of pixels, each column of pixels includes three columns of sub-pixels). After the second source driver receives second identification signal, the second source driver receives display data of the last 480 columns of consecutive sub-pixels (corresponding to display data of the last 160 columns pixels). Therefore, the first source driver201receives display data of pixels from 1-160th columns to form a first display data set, the second source driver201receives display data of pixels from 161-320th columns to form the first display data set, the third source driver receives display data of pixels from 321-480th columns to form the first display data set, and the fourth source driver receives display data of pixels from 481-640th columns to form the first display data set.

It should be noted that each source driver201is provided with a selector, and when the transmission line transmits display data of the input display data set to the source driver201. The selector will select part of the display data in the input display data set as valid data, and the valid data is the display data in the first display data set received by each source driver201. The selector is a module in the current source driver and will not be described in detail herein.

In this embodiment, as shown inFIG.6, is a schematic diagram of the first output circuit shown inFIG.2. The driving device further includes n second first output circuits207, and each first output circuit207is electrically connected to the identification module2013of a corresponding source driver201. Specifically, the n first output circuits207are electrically connected to the identification modules2013of the n source drivers201in a one-to-one manner. Each first output circuit207includes a first power line2071, a fourth second power line2072, and a second output terminal O2. The first power line2071transmits first electrical level, the fourth second power line2072transmits fourth electrical level, and the second output terminal O2is electrically connected to the identification module2013. The second output terminal O2is electrically connected to the first power line2071or the fourth second power line2072, where the first electrical level is different from the fourth electrical level. Each first output circuit207includes a first power line2071, a fourth second power line2072, and a second output terminal O2. The first power line2071transmits first electrical level, the fourth second power line2072transmits fourth electrical level, and the second output terminal O2is electrically connected to the identification module2013. The second output terminal O2is electrically connected to the first power line2071or the fourth second power line2072, where the first electrical level is different from the fourth electrical level. As shown inFIG.6(A), when the second output terminal O2is electrically connected to the first power line2071and the second output terminal O2is disconnected from the fourth second power line2072, the first output circuit207outputs first identification signal to identification module2013. Wherein, when the second output terminal O2is electrically connected to the first power line2071, the third voltage divider unit2073is connected in series between the second output terminal O2and the first power line2071. When the second output terminal O2is disconnected from the fourth second power line2072, the wire between the second output terminal O2and the fourth second power line2072is in a disconnection state. As shown inFIG.6(B), when the second output terminal O2is electrically connected to the fourth second power line2072and the second output terminal O2is disconnected from the first power line2071, the first output circuit207outputs second identification signal to the identification module2013. Wherein, when the second output terminal O2is electrically connected to fourth second power line2072, a fourth voltage divider unit2074is provided between the second output terminal O2and the fourth second power line2072. When the second output terminal O2is disconnected from the first power line2071, the wire between the second output terminal O2and the first power line2071is in a disconnection state.

Specifically, a third wire2075is provided between the first power line2071and the second output terminal O2, and the third wire2075has a fifth breakpoint I5and a sixth breakpoint I6. When the third voltage divider unit2073is connected between the fifth breakpoint I5and the sixth breakpoint I6, the first power line2071is electrically connected to the second output terminal O2, and the second output terminal O2outputs first identification signal. When the third voltage divider unit2073is not connected between the fifth breakpoint I5and the sixth breakpoint I6, the first power line2071is disconnected from the second output terminal O2. A fourth wire2076is provided between the fourth second power line2072and the second output terminal O2, and the fourth wire2076has a seventh breakpoint I7and an eighth breakpoint I8. When the fourth voltage divider unit2074is connected between the seventh breakpoint I7and the eighth breakpoint I8, the fourth second power line2072is electrically connected to the second output terminal O2, and the second output terminal O2outputs second identification signal. When the fourth voltage divider unit2074is not connected between the seventh breakpoint I7and the eighth breakpoint I8, the fourth second power line2072is disconnected from the second output terminal O2. The third electric level is a high electric level, and the fourth electric level is a low electric level. For example, the third electric level is a voltage of 1.8V, that is, the third electric level is the same as the third electrical level. The second electric level is a grounded 0V voltage, that is, the fourth electric level is the same as the second electric level. The third voltage divider unit2073is a third resistor R3, and the fourth voltage divider unit2074is a fourth resistor R4. The resistance values of the third resistor R3and the fourth resistor R4can be the same or different. The third voltage divider unit2073can be connected between the fifth breakpoint I5and the sixth breakpoint I6by soldering or the like. The fourth voltage divider unit2074can also be connected between the seventh breakpoint I7and the eighth breakpoint I8by soldering or the like.

In this embodiment, as shown inFIG.2, each source driver201further includes a second pin2014. The second pin2014is electrically connected to the second output terminal O2of the first output circuit207. The identification module2013of each source driver201is also electrically connected to the second pin2014.

In this embodiment, by setting the first output circuit207electrically connected to each source driver201to control the identification signal received by each source driver201and cooperating with the preset rule to control the effective display data received by each source driver201. The effective display data is the basis for the source driver201to expand display data.

In this embodiment, as shown inFIG.2, each source driver201further includes a data copying module2017. The data copying module2017is configured to copy display data in the first display data set to obtain display data of the second display data set.

Specifically, as shown inFIG.7, before expansion, the first display data set contains display data of pixels from first to 160th columns. After expansion, the display data in the first display data set is copied once to obtain the second display data set. In the second display data set, the display data of the two groups of pixels are the same. The data quantity of the display data in the second display data set is twice the data quantity of the display data in the first display data set.

In this embodiment, when the source driver201is in the first working mode, the source driver201maps the display data in the second display data set to the corresponding output channel and outputs the display data to the data line on the display panel10through the output channel. Specifically, as shown inFIG.9, each source driver includes 6m output channels, where m is greater than or equal to 1. 6 adjacent output channels form a group, the 6 output channels are composed of the 6m output channel, the 6m−1 output channel, the 6m−2 output channel, the 6m−3 output channel, the 6m−4 output channel, and the 6m−5 output channel. A set of output channels output corresponding display data to two adjacent pixels (6 sub-pixels101) on the display panel10. Wherein, the display data of the sub-pixels output by the 6m output channel and the 6m−3 output channel (for example, output channel CH6and output channel CH3) are the same. The display data of the sub-pixels output by the 6m−1 output channel and the 6m−4 output channel (for example, output channel CH5and output channel CH2) are the same. The display data of the sub-pixels output by the 6m−2 output channel and the 6m−5 output channel (for example, output channel CH4and output channel CH1) are the same.

In this embodiment, in the first working mode, each source driver201is configured to receive a corresponding first display data set, expand the display data in the first display data set to obtain a second display data set, map the display data of the second display data set to the corresponding output channel, and transmit it to the display panel10. The display data of then first display data sets corresponding to the n source drivers201constitute the first image to be displayed. The data quantity of the display data in the second display data set is different from the data quantity of the display data in the first display data set. When the source driver201is in the first working mode, the data quantity of the display data is increased by copying the display data.

In this embodiment, as shown inFIG.2, each source driver201further includes a second detection module configured to be activated in the first working mode2015. When the source driver201is input with a third preset signal, the second detection module is configured to control the data copying module2017to turn on. When the source driver201is input with a fourth preset signal, the second detection module is further configured to control the data copying module2017to turn off.

In this embodiment, as shown inFIG.8, the driving device further includes n third output circuits208, and each third output circuit208is electrically connected to the second detection module2015of the corresponding source driver201. Specifically, the n third output circuits208are electrically connected to the second detection modules2015of the n source drivers201in a one-to-one manner. The third output circuit208includes a fifth power line2081, a sixth power line2082, and a third output terminal O3. The fifth power line2081transmits a fifth electric level, the sixth power line2082transmits a sixth electric level, and the sixth electric level is different from the fifth electric level. The third output terminal O3is electrically connected to the second detection module2015. As shown inFIG.8(A), when the third output terminal O3is electrically connected to the fifth power line2081and the third output terminal O3is disconnected from the sixth power line2082, the third output circuit208outputs third preset signal to the second detection module2015. As shown inFIG.8(B), when the third output terminal O3is electrically connected to sixth power line2082and the third output terminal O3is disconnected from the fifth power line2081, the third output circuit208outputs fourth preset signal to the second detection module2015.

Specifically, a fifth wire2085is provided between the fifth power line2081and the third output terminal O3, and the fifth wire2085has a ninth breakpoint I9and a tenth breakpoint I10. When a fifth voltage divider unit2083is connected between the ninth breakpoint I9and the tenth breakpoint I10, the fifth power line2081is electrically connected to the third output terminal O3, and the third output terminal O3outputs third preset signal. After receiving the third preset signal, the second detecting module2015controls the data copying module2017to be turned on to copy the display data. When a sixth voltage divider unit2084is not connected between the eleventh breakpoint I11and the twelfth breakpoint I12, the sixth power line2082is disconnected from the third output terminal O3. A sixth wire2086is provided between the sixth power line2082and the third output terminal O3, and the sixth wire2086has an eleventh breakpoint I11and a twelfth breakpoint I12. When the sixth voltage divider unit2084is connected between the eleventh breakpoint I11and the twelfth breakpoint I12, the sixth power line2082is electrically connected to the third output terminal O3, and the third output terminal O3outputs the fourth preset signal. When the fifth voltage divider unit2083is not connected between the ninth breakpoint I9and the tenth breakpoint I10, the fifth power line2081and the third output terminal O3are disconnected. The fifth electric level is a high electric level, and the sixth electric level is a low electric level. For example, the fifth electric level is a voltage of 1.8V, that is, the fifth electric level is the same as the third electrical level. The sixth electric level is a grounded 0V voltage, that is, the sixth electric level is the same as the second electric level. The fifth voltage divider unit2083is a fifth resistor R5, and the sixth voltage divider unit2084is a sixth resistor R6. The resistance values of the fifth resistor R5and the sixth resistor R6can be the same or different. The fifth voltage divider unit2083can be connected between the ninth breakpoint I9and the tenth breakpoint I10by soldering or the like. The sixth voltage divider unit2084can also be connected between the eleventh breakpoint I11and the twelfth breakpoint I12by soldering or the like.

In this embodiment, as shown inFIG.2, each source driver201further includes a third pin2016. The third pin2016is electrically connected to the third output terminal O3of the third output circuit208, and the second detection module2015of each source driver201is also electrically connected to the third pin2016.

In this embodiment, when the source driver201is in the first working mode, the third output circuit208is adjusted to output the third preset signal, such that the data copying module2017of the source driver201is turned on. When the source driver is in the second working mode, the third output circuit208is adjusted to output the fourth preset signal, such that the data copying module2017of the source driver201is turned off.

In this embodiment, the transmission circuit board203is served as a carrier substrate, and each transmission circuit board203is connected between the flip-chip film carrying a plurality of source drivers201and the timing controller30. The n second output circuits206, n first output circuits207, and n third output circuits208are all arranged on the transmission circuit board203. Each second output circuit206is configured corresponding to one source driver201. Specifically, each transmission circuit board203is connected to six flip-chip films carrying source drivers201.

In this embodiment, each source driver201is further configured to receive the corresponding third display data set in the second working mode, and transmit the third display data set to the display panel10. The display data of n third display data sets corresponding to n source drivers201constitute a second image to be displayed, wherein a resolution of the second image to be displayed is greater than a resolution of the first image to be displayed. As shown inFIG.10, in the second working mode, each source driver201and the timing controller30transmit signals through a pair of P2P (point-to-point) transmission lines210. In this situation, the working mode of the source driver201is the same as the working mode of the source driver of the prior art, and will not be described in detail herein.

In this embodiment, the resolution of the second image to be displayed is equal to the resolution of the display panel10, and the resolution of the second image to be displayed is twice the resolution of the first image to be displayed. For example, the second image to be displayed is an 8 k image, and the first image to be displayed is a 4 k image.

The source driver of the display device of this embodiment can be used with a timing controller that processes high-resolution display data, or it can be used with a timing controller that processes low-resolution display data, so as to increase the compatibility of the source driver. The source driver is equipped with a timing controller for processing low-resolution images, and when low-resolution images are displayed on a high-resolution display panel, a display effect of the display panel is between a display effect of a low-resolution display panel displaying low-resolution images and a display effect of a high-resolution display panel displaying high-resolution images. Compared with the prior art, while the display effect of the display device is improved, the cost of the display device is reduced.

The descriptions of the embodiments are only used to help understand the technical solutions and core ideas of the present application. Those of ordinary skill in the art should understand that they can modify the technical solutions described in the foregoing embodiments, or equivalently replace some of the technical features. However, these modifications or replacements do not cause the essence of the technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.