Transimpedance (TIA) circuit usable for burst mode communications

A transimpedance amplifier (TIA) circuit usable for burst mode communications is provided. The TIA circuit includes a TIA stage, a limiter-amplifier, and a DC restoration loop. The invention overcomes problems of the prior art relating to burst communications, such as a DC level in the output signal which can change from burst to burst and a duty-cycle distortion in large signals. This is achieved by using a DC restoration loop that ensures achieving zero DC potential within variable acquisition periods.

FIELD OF THE INVENTION

The present invention generally relates to transimpedance amplifiers (TIA) circuits, and in particular to burst mode TIA circuits of optical receivers.

REFERENCES CITED

Patents and Applications

BACKGROUND OF THE INVENTION

In the related art, most optical receivers and optical communications involve continuous mode communication. One new method for optical communication involves burst mode communication. Burst mode communication is useful, for example, in point to multipoint communication, such as occurs when a single operator is linked to many users. In such operation mode, many users are connected to a single operator using fiber optic lines that are split between the users. In order to prevent interference between the users, every user performs the transmission using a different carrier. Thus, at multiple times, the user communication is quiet, then the user starts a burst of transmission, and then the user shuts down again, waiting for a next period for transmission.

The difficulties of receiving and distinguishing between receivers are exacerbated by typically large variations in the magnitude of power of transmission bursts between different users.FIG. 1is a graphical representation of a signal100demonstrating a low power burst following a high power burst, that typically occurs in a burst communication, and as is known in the art. The power difference between two successive bursts in signal100can be about 15-25 dB. Also, the high power burst can raise the average power level of a successive low power burst, which decays slowly over time.

Architecture of the prior art for continuous mode optical receivers fail to operate properly for burst mode communications.FIG. 2shows a typical architecture of a continuous mode optical receiver200. The receiver200includes an optical detector (e.g., a photodiode)210coupled to an input of a transimpedence amplifier (TIA)220, a limiter-amplifier230, and a direct current (DC) restoration loop240. The TIA stage220receives a weak signal output from the optical detector210coupled, for example, to an optical fiber line, and amplifies the signal. The limiter-amplifier230clips the output signal of the TIA stage220at specific high and low voltage levels.

The optical receiver200must discriminate between a high level and a low level signal that is received. The optical signal typically includes “on/off keying,” which consists of transmitted “on” signals (also referred to as “ones”) and “off” signals (also referred to as “zeros”). With an optical device, the transmitted “on” signal is a pulse of light, while the transmitted “off” signal is the non-transmittal of light. For this purpose, the current produced by the received light is amplified by the TIA220and the DC restoration loop240filters the noise from the amplified signal, i.e., removes the DC portion of the signal. Examples of circuits implementing DC restoration loops may be found in U.S. Pat. Nos. 6,876,259, 6,720,827, and 6,552,605, each of which is incorporated herein by reference for their useful background descriptions of the state of the art heretofore.

Since the data is transmitted in bursts, a problem arises in that the optical receiver200must receive and distinguish bursts of data. The receiver200must recognize each transmitter that transmits data, and the receiver typically must estimate the power of the data to distinguish among bursts. In order to make this determination, the receiver must acquire the signal for the data burst within a short time period at the beginning of the burst.

In the prior art, continuous mode transmission and reception has typically been used with two station transmitters, from which data is continuously transmitted. That is, no stopping and restarting of data occurs, as is the case with burst mode transmission. As a result, in continuous transmission, it has not mattered how long it takes for the receiver to acquire the signal, and thus the receiver is not designed to acquire signal in a short period of time as required in burst transmission. Furthermore, trying to perform DC restoration on burst signals, ends with the inability to differentiate between light and dark, i.e., between “ones” and “zeros”.FIG. 1Bshows an exemplary output signal110produced by the optical receiver200in response to the signal100. In such signal a RX threshold that is typically utilized for distinguishing between “ones” and “zeros” cannot be properly set.

Therefore, it would be advantageous to provide a TIA circuit usable for burst mode communications.

SUMMARY OF THE INVENTION

It is therefore an object of the invention to provide a transimpedence amplifier circuit usable for burst mode communications.

This object is realized in accordance with a first aspect of the invention by a burst-mode transimpedance amplifier (TIA) circuit, comprising:

a TIA stage;

a limiter-amplifier having a first input coupled to said TIA stage, a second input coupled to a direct current (DC) restoration loop and two differential outputs coupled to said direct current (DC) restoration loop, wherein said differential outputs are also outputs of said burst-mode TIA circuit; and

a DC restoration loop coupled between the differential outputs and the second input of said limiter-amplifier and being configured to perform DC cancellation within variable acquisition periods.

According to a second aspect of the invention there is provided a burst-mode transimpedance amplifier (TIA) circuit, comprising:

a TIA stage;

a limiter-amplifier having a first input coupled to said TIA stage and a second input coupled to a first reference voltage;

a DC restoration loop having two differential outputs coupled to respective outputs of said limiter-amplifier and two inputs connected to said limiter-amplifier, wherein said DC restoration loop is capable of performing at least DC cancellation within variable acquisition periods.

According to a third aspect of the invention there is provided a burst-mode transimpedance amplifier (TIA) circuit, comprising:

a TIA stage;

a limiter-amplifier having a first input coupled to said TIA stage, a second input coupled to a first reference voltage and two differential outputs connected to a direct current (DC) restoration loop, wherein the differential outputs are also outputs of said burst-mode TIA circuit; and

a DC restoration loop coupled to said differential outputs and being configured to perform DC cancellation within variable acquisition periods.

DETAILED DESCRIPTION OF EMBODIMENTS

The present invention provides a TIA circuit usable for burst mode communications. The TIA circuit includes a TIA stage, a limiter-amplifier, and a direct current (DC) restoration loop. The invention overcomes known problems relating to burst communications, such as a DC level in the output signal which can change from burst to burst, and a duty-cycle distortion in large signals. The present invention solves these problems by using a DC restoration loop that ensures achieving substantially zero DC potential within variable acquisition periods.

FIG. 3shows a non-limiting schematic diagram of a burst-mode TIA circuit300disclosed in accordance with an embodiment of the present invention. Biasing and other accompanying circuitry are not shown, merely for keeping the description simple and without limiting the scope of the disclosed invention. The TIA circuit300includes a TIA stage310, a limiter-amplifier320, and a DC restoration loop330. The burst-mode TIA circuit300finds particular use in an optical receiver having an optical detector340coupled to an input of the TIA stage310. The optical detector340may be, for example, a photodiode, a PIN diode, and the likes. The optical detector340produces current (Pcurrent) in proportion to the amount of light of the received optical signal. The photo current Pcurrent is provided as an input, in a port301, to the TIA stage310. The TIA stage310generates an amplified voltage signal, at a port302, based on the current Pcurrent.

The limiter-amplifier320clips the TIA stage310output signal at specific high and low voltage levels. Specifically, the limiter-amplifier320multiplies the difference of two input voltage signals, fed to inputs302and304, by the differential gain and provides differential voltage signals, V+outand V−outat outputs305and306respectively. The resistors321and322as well as the two transistors323and324of the limiter-amplifier320are identical. The limiter-amplifier320is the input stage of the DC restoration loop330which acts as a negative feedback loop. The DC restoration loop330is designed to ensure zero DC potential difference between outputs305and306regardless of the waveform of the input optical signal and the current Pcurrent.

The DC restoration loop330includes an integrator331(e.g., an operational amplifier (Op-Amp) that is configured to operate as integrator), a resistor332, a switch333, and a capacitor334. For simplification of the description, the components utilized to form the integrator331(e.g., a capacitor connected between the output and the negative input port and other resistors) are not shown. The non-inverting and the inverting inputs of the integrator331are respectively connected to the outputs305and306. The resistor332is coupled at one end to the output of the integrator331and is coupled at its other end to the input304of the limiter-amplifier320. The capacitor334is coupled at one end to the input304of the limiter-amplifier320, its other end being connected to GND. The switch333is switchably connected across the resistor332so that the resistor332, the switch333, and the capacitor334form a feedback network to set the DC cancellation. The output of the DC restoration loop330is connected to port304(V−in) of the limiter-amplifier320. The switch333is controlled by control logic (not shown), which may or may not be part of the TIA circuit300.

To allow the DC cancellation in circuit300, i.e., zero DC potential difference between outputs305and306, the integrator331measures the differential DC between these outputs and adds the measured offset to the input voltage of the limiter-amplifier320. The DC offset is controlled by charging the capacitor334to a voltage having positive and negative potential as provided by the integrator331. Specifically, if the voltage level of a signal in output305is higher than the level in the output306, the capacitor334is charged to the positive potential difference of the outputs305and306. On the other hand, if the voltage level of a signal at the output305is lower than the level of signal at the output306, the capacitor334is discharged, i.e., it charges to the negative potential difference of the outputs305and306.

The DC potential on the capacitor334provides a DC offset level required for the DC cancellation. Specifically, if the V+outlevel (at the output305) is higher than V−out(at the output306) the voltage level at the input304is increased. Consequently, the transistor324increases its current level, and hence lifts the voltage present at its emitter. The result is that the rise in the voltage at the input304, while keeping the voltage level at the input302fixed, causes more current to flow via resistor322and less through resistor321. This means that the voltage drop across resistor321reduces, hence the voltage at V+outmoves down towards V−out. Similarly, if V−outis greater than V+out, the voltage level at the input304decreases, the voltage drop across the resistor322increases and the voltage V−outmoves up towards V+out.

The acquisition time required to achieve zero DC potential is controlled by the switch333. A fast acquisition time is required at the beginning of the burst and slow acquisition when the circuit300is stabilized around a zero DC potential point. Fast acquisition is achieved by closing the switch333. In such condition, the current does not flow via the resistor332, but rather through the switch333, and hence the capacitor334is rapidly charged. Once the switch333is opened, the current flows via the resistor332, and hence the capacitor334is slowly charged. This allows reaching stable voltage levels at V+outand V−outwithout rippling the waveform of the output signals.

Switch333is switched in response to the optical input signal. Specifically, the switch333is opened, every time that the signal rises, for a preconfigured time interval (e.g., 35 nanoseconds). As an example, for the signal shown inFIG. 1a, the switch is open at ΔT1and ΔT3and stays closed at ΔT2. Other embodiments for controlling the acquisition time are disclosed in U.S. Pat. No. 6,686,799, titled “Burst-mode Limited Amplifier” assigned to the common assignee and is incorporated herein by reference in its entirely.

FIGS. 4athrough4ddepict exemplary graphs of signals400exemplifying the operation of the TIA circuit300.FIG. 4ashows an optical input signal400-1received at the optical detector340. The signal400-1is a low power burst that follows a high power burst, as typically occurs in a burst communication.FIG. 4bshows a Pcurrentsignal400-2generated by the optical detector340responsive to the signal400-1. Ideally, a RX threshold should be set to the average of the peak and valley amplitudes of the optical detector340. Not setting the RX threshold correctly would result in the inability to distinguish between “ones” and “zeros”, and thus in data being lost.FIG. 4cshows V+outand V−outsignals400-3and400-4at the outputs305and306respectively. These signals are generated in accordance with the techniques mentioned above and do not include any DC offset. As illustrated inFIG. 4c, the RX thresholds in signals400-3and400-4are set to be the average of the high and low level of each signal.FIG. 4ddepicts a signal400-5in port304, which is a superposition of the V+outand V−outsignals. The “ones” and “zeros” can be easily detected in signal400-5, i.e., each rise is “one” and each drop is “zero”. This is opposed to signals generated by prior art circuits and shown, for example, inFIG. 1b.

FIG. 5shows a non-limiting schematic diagram of a burst-mode TIA circuit500disclosed in accordance with another embodiment of the present invention. Biasing and other accompanying circuitry are not shown, merely for keeping the description simple and without limiting the scope of the disclosed invention. As shown in the figure, the circuit500is configured for use in an optical receiver that includes a TIA stage510, a limiter-amplifier520, and an optical detector540having the same functionality as described above. Circuit500further includes a DC restoration loop530and a first and second reference voltage levels (VR1and VR2) utilized to perform at least DC cancellation. The VR1is set to a voltage level that limits the output voltage signals V+outand V−out. The VR1is fed to an inverting input504of a limiter-amplifier536.

The DC restoration loop530comprises an integrator531, a resistor532, a switch533, a capacitor534and two differential amplifiers535and536. The VR2reference is fed to the inverting input of the amplifier535and set to be approximately equal to the RX threshold. The output V−outof the limiter-amplifier520is fed to the inverting input of the amplifier536, whose non-inverting input is connected to the feedback network of the DC restoration loop530. The feedback network comprises the resistor532, switch533, and capacitor534. The resistor532and the capacitor534are commonly coupled at one end to the output of the integrator531. An opposite end of the resistor532at coupled to the non-inverting input of the differential amplifier536and the capacitor534is connected at its other end to GND. The switch333is switchably connected across the resistor532.

To reach zero DC potential difference between the outputs505and506of the TIA circuit500, the integrator531measures the differential DC between these outputs. The capacitor534can be charged with a positive potential or “discharged” with a negative potential. The V+outsignal is the difference between the two voltages V1outproduced by the limiter-amplifier520and VR2. The V−outsignal is the difference between the two voltages V2outproduced by the limiter-amplifier520and the potential on the capacitor534. Therefore, charging the capacitor534to the difference between V+outand V−outensures DC cancellation. For example, given that the level of the V1outsignal at the input503is +2V, VR2is set to +1V, and the level of the V2outsignal at the input504, is −2V, then the voltage level of V+outis +1V. Initially, the potential on the capacitor534is 0V, and thus the voltage level of V−outis −2V. As a result the capacitor534becomes charged to a voltage level of +1V (i.e., the output of the integrator531), and the thus the voltage level of V−outmoves up to −1V and the DC potential difference between V+outand V−outis zero. The acquisition time in the TIA circuit500is also controlled by the switching switch533as described in greater detail above.

FIG. 6shows a non-limiting schematic diagram of a burst-mode TIA circuit600disclosed in accordance with yet another embodiment of the present invention. Biasing and other accompanying circuitry are not shown, merely for keeping the description simple and without limiting the scope of the disclosed invention. As shown in the figure, the circuit600is configured for use in an optical receiver that includes a TIA stage610, a limiter-amplifier620, and an optical detector640having the same functionality as described in greater detail above. The TIA circuit600further includes a DC restoration loop630and a first and second reference voltage level (VR1and VR2) utilized to perform the DC cancellation. The VR1is set to a level that limits the output voltage signals V+outand V−out. The VR1is provided in an input604of the limiter-amplifier620.

The DC restoration loop630comprises an integrator631having respective inverting and non-inverting inputs and outputs, four resistors632,633,634and635, two switches636and637, as well as capacitors638and639. The VR2reference is connected to the integrator631and approximately equal to the RX threshold. The inverting input of the integrator631is connected to one end of the resistor632and to one end of the capacitor638. The other end of the resistor632is tied to the V−outrail606and the other end of the capacitor638is coupled to the non-inverting output of the integrator631. The non-inverting input of the integrator631is connected to one end of the resistor635and to one end of the capacitor639. The other end of the resistor635is tied to the V+outrail605and the other end of the capacitor639is coupled to the inverting output of the integrator631. The resistor633is connected between the non-inverting output of the integrator631and V−outrail606. The resistor635is connected between the inverting output of the integrator631and V+outrail605.The switches636and637are connected across the resistors632and635respectively. That is, the capacitor638can be charged via the resistor632when the switch636is open or directly via the switch636when it is closed. Similarly, the capacitor639can be charged via the resistor635when the switch637is open or directly via the switch637when it is closed.

In such an arrangement, the resistors632and633together with the switch636and the capacitor638form a first feedback loop. Likewise, the resistors634and635together with the switch637and the capacitor639form a second feedback loop, and the acquisition periods are varied by switching the switches636and637.

To reach zero DC potential difference in the TIA circuit600, the integrator631measures the DC difference between two voltages V+outand V−outat the outputs605and606respectively. If the DC difference is not zero, the capacitors638and639are charged to adjust the voltage level of signal V+outand V−out. Specifically, charging the capacitor638decreases the voltage level of V−outand charging the capacitor639increases the voltage level of V+out. The acquisition time in the TIA circuit600is also controlled by switching the switches636and637using a control unit (not shown) as described above.

In accordance with a preferred embodiment of the present invention each of the burst-mode TIA circuits can be integrated in a receiver of an optical line terminal (OLT) of a passive optical network (PON). The OLT receives, via a fiber optic line, upstream signals sent from multiple optical network units (ONU). Typically, the ONU is installed in a central office (CO) and the ONUs may be geographically distributed. Thus, the communication between the OLT and ONUs is a burst communication.

The burst-mode transimpedance amplifier (TIA) circuit has been described with particular application to an improved optical receiver, wherein an optical detector is coupled to an input of the TIA stage of the burst-mode transimpedance amplifier (TIA) circuit. However, it is to be understood that the burst-mode transimpedance amplifier (TIA) circuit according to the invention finds general application in other types of circuit having other inputs, in which case there is no need for an optical detector. In any case, when used in optical receivers, the optical detector is generally part of the optical receiver although it may be integral with the burst-mode transimpedance amplifier (TIA) circuit if desired.