Gray tone uniformity control over substrate topography

Embodiments of the present disclosure generally relate to lithography systems. More particularly, embodiments of the present disclosure relate to a method, a system, and a software application for a lithography process to control transmittance rate of write beams and write gray tone patterns in a single exposure operation. In one embodiment, a plurality of shots are provided by an image projection system in a lithography system to a photoresist layer. The plurality of shots exposes the photoresist layer to an intensity of light emitted from the image projection system. The local transmittance rate of the plurality of shots within an exposure area is varied to form varying step heights in the exposure area of the photoresist layer.

BACKGROUND

Field

Embodiments of the present disclosure generally relate to lithography systems. More particularly, embodiments of the present disclosure relate to a system, a software application, and a method of a lithography process to control transmittance rate of write beams to write gray tone patterns in a single exposure operation.

Description of the Related Art

Photolithography is widely used in the manufacturing of semiconductor devices, such as for back-end processing of semiconductor devices, and display devices, such as liquid crystal displays (LCDs). For example, large area substrates are often utilized in the manufacture of LCDs. LCDs, or flat panel displays, are commonly used for active matrix displays, such as computers, touch panel devices, personal digital assistants (PDAs), cell phones, television monitors, and the like. Generally, flat panel displays include a layer of liquid crystal material as a phase change material at each pixel, sandwiched between two plates. When power from a power supply is applied across or through the liquid crystal material, an amount of light passing through the liquid crystal material is controlled, i.e., selectively modulated, at the pixel locations enabling images to be generated on the display.

A conventional digital lithography system utilizes a plurality of image projection systems. Each image projection system is configured to project a plurality of write beams into a photoresist layer on a surface of the substrate. A pattern, also known as a mask pattern, is written into the photoresist layer on the surface of the substrate by the write beams projected by the projection lens system.

With a conventional lithography system, to write a pattern of a plurality of gray tone portions into a photoresist disposed over a substrate, multiple passes of the substrate under the writable area of the lithography system are required. Multiple passes of the substrate under the writable area of a digital lithography system decreases throughput.

Accordingly, what is needed in the art is a system, a software application, and a method of a lithography process with an improved ability to write gray tone patterns in a single exposure operation with a single exposure.

SUMMARY

In one embodiment, a method for a lithography process is provided. The method includes providing a mask pattern data having a plurality of exposure areas to a processing unit of a lithography system. The processing unit includes a plurality of image projection systems that receive the mask pattern data, wherein each exposure area includes a gray pattern. The gray pattern includes a plurality of sub-grids and a plurality of pattern units in each sub-grid. Each of the plurality of pattern units are include a plurality of patterned lines. The plurality of patterned lines in the plurality of pattern units of each sub-grid correspond to a local transmittance rate of a plurality of shots to be received in each sub-grid. In a single scan of a substrate having a photoresist layer disposed thereon under the plurality of image projection systems, the method further includes projecting a plurality of shots to the plurality of patterned lines in each of the plurality of pattern units of the gray pattern to the photoresist layer, and developing the photoresist layer to form a desired profile in the photoresist layer, the desired profile defined by the local transmittance rate at each sub-grid of each exposure area.

In another embodiment, a layered film device is provided. The layered film device includes a substrate and a patterned photoresist layer having a predetermined profile disposed on the substrate. The patterned photoresist is formed from a photoresist layer in a single exposure operation by a lithography system. The predetermined profile of the patterned photoresist may be formed by providing a mask pattern data having a plurality of exposure areas to a processing unit of the lithography system. The processing unit of the lithography system has an image projection system that receives the mask pattern data, and the mask pattern data corresponds to the predetermined profile of the patterned photoresist. Each of the plurality of exposure areas in the mask pattern data includes a gray pattern having a plurality of sub-grids with each sub-grid having a plurality of pattern units. Each of the plurality of pattern units includes a plurality of patterned lines. The plurality of patterned lines in each of the plurality of sub-grids corresponds to a local transmittance rate of a plurality of shots to each sub-grid. The predetermined profile of the patterned photoresist may be formed by next projecting the plurality of shots at a designated dose to the plurality of patterned lines in each of the plurality of pattern units of the gray pattern, and then developing the photoresist layer to form the predetermined profile in the photoresist layer. The predetermined profile defined by the local transmittance rate of the plurality of shots at the designated dose received in each sub-grid of each exposure area.

In another embodiment, a system for a lithography process is provided. The system includes a slab and a moveable stage disposable over the slab. The moveable stage configured to support a substrate having a photoresist layer disposed thereon. The system also includes a controller configured to provide mask pattern data to a lithography system. The mask pattern data includes an exposure area with a gray pattern and the gray pattern is defined by a plurality of sub-grids. Each of the sub-grids include a plurality of pattern units defined therein. The system further includes a lithography system support coupled to the slab having an opening to allow the moveable stage to pass thereunder. The lithography system has a processing unit with a plurality of image projection systems that receive the mask pattern data and each image projection system comprising a spatial light modulator with a plurality of spatial light modulator pixels to project a plurality of shots. The controller is configured to dispose a plurality of patterned lines in each of the plurality of pattern units within each of the sub-grids to vary a local transmittance rate at each sub-grid, and the controller is configured to instruct each of the spatial light modulators to project the plurality of shots to the plurality of patterned lines in each of the plurality of pattern units in each sub-grid of the gray pattern.

In yet another embodiment, a non-transitory computer-readable medium for a lithography process is provided. The non-transitory computer-readable medium stores instructions that, when executed by a processor, cause a computer system to perform the operations of providing a mask pattern data having a plurality of exposure areas to a processing unit of a lithography system. The processing unit includes a plurality of image projection systems that receive the mask pattern data and each exposure area includes a gray pattern. The gray pattern includes a plurality of sub-grids and a plurality of pattern units in each sub-grid. Each of the plurality of pattern units includes a plurality of patterned lines. The plurality of patterned lines in each sub-grid correspond to a local transmittance rate of each sub-grid. in a single scan of a substrate having a photoresist layer disposed thereon under the plurality of image projection systems, the operations further include projecting a plurality of shots to the plurality of patterned lines of the gray pattern to the photoresist layer, and developing the photoresist layer to form a desired profile in the photoresist layer, the desired profile defined by the local transmittance rate at each sub-grid of each exposure area.

DETAILED DESCRIPTION

Embodiments of the present disclosure relate to a system, a software application, and a method of a lithography process to control the transmittance rate of write beams delivered to a substrate to write gray tone patterns in a single exposure operation. One embodiment of the system includes a controller configured to provide mask pattern data to a lithography system. The mask pattern data includes a gray pattern. The lithography system has a processing unit with a plurality of image projection systems that receive the mask pattern data. Each image projection system includes a spatial light modulator with a plurality of spatial light modulator pixels to project a multiplicity of shots. The controller is configured to vary the local beam shots across the substrate.

FIG.1is a perspective view of a system100, such as a digital lithography system, that may benefit from embodiments described herein. The system100includes a stage114and a processing apparatus104. The stage114is supported by a pair of tracks116disposed on a slab102. A substrate120is supported by the stage114. The stage114is supported by a pair of tracks116disposed on the slab102. The stage114moves along the pair of tracks116in the X direction as indicated by the coordinate system shown inFIG.1. In one embodiment, which can be combined with other embodiments described herein, the pair of tracks116is a pair of parallel magnetic channels. As shown, each track of the pair of tracks116extends in a straight line path. An encoder118is coupled to the stage114in order to provide information of the location of the stage114to a controller122.

The controller122is generally designed to facilitate the control and automation of the processing techniques described herein. The controller122may be coupled to or in communication with the processing apparatus104, the stage114, and the encoder118. The processing apparatus104and the encoder118may provide information to the controller122regarding the substrate processing and the substrate aligning. For example, the processing apparatus104may provide information to the controller122to alert the controller122that substrate processing has been completed. The controller122facilitates the control and automation of methods of a lithography process that includes varying the local beam transmittance during a single exposure. A program (or computer instructions), which may be referred to as an imaging program, readable by the controller122, determines which tasks are performable on a substrate120. The program includes a mask pattern data and code to monitor and control the processing time and substrate position. The mask pattern data corresponds to a pattern to be written into the photoresist using the electromagnetic radiation.

The substrate120comprises any suitable material, for example, glass, which is used as part of a flat panel display. In other embodiments, which can be combined with other embodiments described herein, the substrate120is made of other materials capable of being used as a part of the flat panel display. The substrate120has a film layer to be patterned formed thereon, such as by pattern etching thereof, and a photoresist layer formed on the film layer to be patterned, which is sensitive to electromagnetic radiation, for example ultra-violet (UV) or deep UV “light”. A positive photoresist includes portions of the photoresist, when exposed to radiation, are respectively soluble to a photoresist developer applied to the photoresist after the pattern is written into the photoresist using the electromagnetic radiation. A negative photoresist includes portions of the photoresist, when exposed to radiation, will be respectively insoluble to photoresist developer applied to the photoresist after the pattern is written into the photoresist using the electromagnetic radiation. The chemical composition of the photoresist determines whether the photoresist is a positive photoresist or negative photoresist. Examples of photoresists include, but are not limited to, at least one of diazonaphthoquinone, a phenol formaldehyde resin, poly(methyl methacrylate), poly(methyl glutarimide), and SU-8. After exposure of the photoresist to the electromagnetic radiation, the resist is developed to leave a patterned photoresist on the underlying film layer. Then, using the patterned photoresist, the underlying thin film is transfer etched to form a similar pattern in the underlying film layer. The underlying film layer is utilized to form a portion of the electronic circuitry of the display panel.

The processing apparatus104includes a support108and a processing unit106. The processing apparatus104straddles the pair of tracks116and is disposed on the slab102, and thereby includes an opening112for the pair of tracks116and the stage114to pass under the processing unit106. The processing unit106is supported over the slab102by a support108. In one embodiment, which can be combined with other embodiments described herein, the processing unit106is a pattern generator configured to expose a photoresist in a photolithography process. In some embodiments, which can be combined with other embodiments described herein, the pattern generator is configured to perform a maskless lithography process. The processing unit106includes a plurality of image projection systems. One example of an image projection system is show inFIG.2A. In one embodiment, which can be combined with other embodiments described herein, the processing unit106contains as many as 84 image projection systems. Each image projection system is disposed in a case110. The processing unit106is useful to perform maskless direct pattern writing to a photoresist or other electromagnetic radiation sensitive materials.

FIG.2Ais a schematic, cross-sectional view of an image projection system200that may be used in system100. The image projection system200includes a spatial light modulator210and projection optics212. The components of the image projection system200vary depending on the spatial light modulator210being used. The spatial light modulator210includes an array of electrically addressable elements. The electrically addressable elements include, but are not limited to, digital micromirrors, liquid crystal displays (LCDs), liquid crystal over silicon (LCoS) devices, ferroelectric liquid crystal on silicon (FLCoS) devices, and microshutters. The spatial light modulator210includes a plurality of spatial light modulator pixels. Each spatial light modulator pixel of the plurality of spatial light modulator pixels are individually controllable and are configured to project a write beam corresponding to a pixel of a plurality of pixels. The compilation of plurality of pixels form the pattern written into the photoresist, referred to herein as the mask pattern. The projection optics212includes projection lenses, for example 10× objective lenses, used to project the light onto the substrate120. In operation, based on the mask pattern data provided to the spatial light modulator210by the controller122, each spatial light modular pixel of the plurality of spatial light modulator pixels is at an “on” position or “off” position. Each spatial light modular pixel at an “on” position forms a write beam that the projection optics212then projects the write beam to the photoresist layer surface of the substrate120to form a pixel of the mask pattern. As used herein, a write beam is also referred to as a “shot.”

In one embodiment, which can be combined with other embodiments described herein, the spatial light modulator210is a DMD. The image projection system200includes a light source202, an aperture204, a lens206, a frustrated prism assembly208, the DMD, and the projection optics212. The DMD includes a plurality of mirrors, i.e, the plurality of spatial light modulator pixels. Each mirror of the plurality of mirrors corresponds to a pixel that may correspond to a pixel of the mask pattern. In some embodiments, which can be combined with other embodiments described herein, the DMD includes 2560×1600 mirrors. In some examples, the DMD includes more than about 4,000,000 mirrors. The light source202is any suitable light source, such as a light emitting diode (LED) or a laser, capable of producing a light having a predetermined wavelength. In one embodiment, which can be combined with other embodiments described herein, the predetermined wavelength is in the blue or near ultraviolet (UV) range, such as less than about 450 nm. The frustrated prism assembly208includes a plurality of reflective surfaces. In operation, a light beam201is produced by the light source202. The light beam201is reflected to the DMD by the frustrated prism assembly208. When the light beam201reaches the mirrors of the DMD, each mirror at an “on” position reflect the light beam201, i.e., forms a write beam, also known as a “shot”, that the projection optics212then projects as a shot to the photoresist layer surface of the substrate120. The plurality of write beams203, also known as a plurality of shots, forms a plurality of pixels of the mask pattern.

FIG.2Bis a schematic view of the spatial light modulator210that is a DMD. The plurality of mirrors213, also known as the plurality of spatial light modulator pixels, are arranged in a grid having M rows and N columns. Each of the plurality of mirrors213is operable to be in an “on” position or an “off” position. A pixel pitch215is defined as the distance between the centroid of adjacent spatial light modulator pixels.

The plurality of spatial light modulator pixels of the spatial light modulator210are configured in an aggregated shot pattern604(shown inFIG.6) where each spatial light modulator pixel corresponds to a potential shot606(shown inFIG.6). Each potential shot606represents the centroid of a mirror213. The controller122(shown inFIG.1) provides instructions to the spatial light modulator210based on the mask pattern data. The mask pattern data determines which of the plurality of mirrors213are in the “on” position. In embodiments when a mirror213is in the “on” position, a shot is delivered. In embodiments when a mirror213is in the “off” position, a shot is not delivered.

FIG.3is a schematic view of a computing system300configured for varying a local beam transmittance across a substrate in which embodiments of the disclosure may be practiced. As shown inFIG.3, the computing system300may include a plurality of servers308, a single exposure lithography application312, and a plurality of controllers122(i.e., computers, personal computers, mobile/wireless devices, only two of which are shown for clarity), each connected to a communications network306(for example, the Internet). The servers308may communicate with the database314via a local connection (for example, a Storage Area Network (SAN) or Network Attached Storage (NAS)) or over the Internet. The servers308are configured to either directly access data included in the database314or to interface with a database manager that is configured to manage data included within the database314.

Each controller122may include components of a computing device, for example, a processor, system memory, a hard disk drive, a battery, input devices such as a mouse and a keyboard, and/or output devices such as a monitor or graphical user interface, and/or a combination input/output device such as a touchscreen which not only receives input but also displays output. Each server308and the single exposure lithography application312may include a processor and a system memory (not shown), and may be configured to manage content stored in database314using, for example, relational database software and/or a file system. The I/O device interfaces408, as shown inFIG.4, may be programmed to communicate with one another, the controllers122, and the single exposure lithography application312using a network protocol such as, for example, the TCP/IP protocol. The single exposure lithography application312may communicate directly with the controllers122through the communications network306. The controllers122are programmed to execute software304, such as programs and/or other software applications, and access applications managed by servers308.

In the embodiments described below, users may respectively operate the controllers122that may be connected to the servers308over the communications network306. Pages, images, data, documents, and the like may be displayed to a user via the controllers122. Information and images may be displayed through a display device and/or a graphical user interface in communication with the controller122.

It is noted that the controller122may be a personal computer, laptop mobile computing device, smart phone, video game console, home digital media player, network-connected television, set top box, and/or other computing devices having components suitable for communicating with the communications network306and/or the required applications or software. The controller122may also execute other software applications configured to receive content and information from the single exposure lithography application312.

FIG.4is a schematic view of the single exposure lithography application312. The single exposure lithography application312includes, without limitation, a central processing unit (CPU)402, a network interface404, memory420, and storage430communicating via an interconnect406. The single exposure lithography application312may also include I/O device interfaces408connecting I/O devices410(for example, keyboard, video, mouse, audio, touchscreen, etc.). The single exposure lithography application312may further include the network interface504(shown inFIG.5) configured to transmit data via the data communications network.

The CPU402retrieves and executes programming instructions stored in the memory420and generally controls and coordinates operations of other system components. Similarly, the CPU402stores and retrieves application data residing in the memory420. The CPU402is included to be representative of a single CPU, multiple CPU's, a single CPU having multiple processing cores, and the like. The interconnect406is used to transmit programming instructions and application data between the CPU402, I/O device interfaces408, storage430, network interfaces404, and memory420.

The memory420is generally included to be representative of a random access memory and, in operation, stores software applications and data for use by the CPU402. Although shown as a single unit, the storage430may be a combination of fixed and/or removable storage devices, such as fixed disk drives, floppy disk drives, hard disk drives, flash memory storage drives, tape drives, removable memory cards, CD-ROM, DVD-ROM, Blu-Ray, HD-DVD, optical storage, network attached storage (NAS), cloud storage, or a storage area-network (SAN) configured to store non-volatile data.

The memory420may store instructions and logic for executing an application platform426which may include single exposure lithography application software428. The storage430may include a database432configured to store data434and associated application platform content436. The database432may be any type of storage device.

Network computers are another type of computer system that can be used in conjunction with the disclosures provided herein. Network computers do not usually include a hard disk or other mass storage, and the executable programs are loaded from a network connection into the memory420for execution by the CPU502(shown inFIG.5). A typical computer system will usually include at least a processor, memory, and an interconnect coupling the memory to the processor.

FIG.5is a schematic view of a controller122used to access the single exposure lithography application312and retrieve or display data associated with the application platform426. The controller122may include, without limitation, a central processing unit (CPU)502, a network interface504, an interconnect506, a memory520, storage530, and support circuits540. The controller122may also include an I/O device interface508connecting I/O devices510(for example, keyboard, display, touchscreen, and mouse devices) to the controller122.

Like CPU402, CPU502is included to be representative of a single CPU, multiple CPU's, a single CPU having multiple processing cores, etc., and the memory520is generally included to be representative of a random access memory. The interconnect506may be used to transmit programming instructions and application data between the CPU502, I/O device interfaces508, storage530, network interface504, and memory520. The network interface504may be configured to transmit data via the communications network306, for example, to transfer content from the single exposure lithography application312. Storage430, such as a hard disk drive or solid-state storage drive (SSD), may store non-volatile data. The storage530may contain a database531. The database531may contain data532, other content534, and an image process unit536having data538and control logic539. Illustratively, the memory520may include an application interface522, which itself may display software instructions524, and/or store or display data526. The application interface522may provide one or more software applications which allow the controller to access data and other content hosted by the single exposure lithography application312.

As shown inFIG.1, the system100includes the controller122. The controller122includes a central processing unit (CPU)502, memory520, and support circuits540(or I/O508). The CPU502may be one of any form of computer processors that are used in industrial settings for controlling various processes and hardware (e.g., pattern generators, motors, and other hardware) and monitor the processes (e.g., processing time and substrate position). The memory520, as shown inFIG.5, is connected to the CPU502, and may be one or more of a readily available memory, such as random access memory (RAM), read only memory (ROM), floppy disk, hard disk, or any other form of digital storage, local or remote. Software instructions and data can be coded and stored within the memory for instructing the CPU502. The support circuits540are also connected to the CPU502for supporting the processor in a conventional manner. The support circuits540may include conventional cache542, power supplies544, clock circuits546, input/output circuitry548, subsystems550, and the like. A program (or computer instructions) readable by the controller122determines which tasks are performable on a substrate120. The program may be software readable by the controller122and may include code to monitor and control, for example, the processing time and substrate position.

The present example also relates to an apparatus for performing the operations herein. This apparatus may be specially constructed for the required purposes, or it may comprise a general purpose computer selectively activated or reconfigured by a computer program stored in the computer. Such a computer program may be stored in a computer readable storage medium, such as, but is not limited to, read-only memories (ROMs), random access memories (RAMs), EPROMs, EEPROMs, flash memory, magnetic or optical cards, any type of disk including floppy disks, optical disks, CD-ROMs, and magnetic-optical disks, or any type of media suitable for storing electronic instructions, and each coupled to a computer system interconnect.

The algorithms and displays presented herein are not inherently related to any particular computer or other apparatus. Various general purpose systems may be used with programs in accordance with the teachings herein, or it may prove convenient to construct a more specialized apparatus to perform the required method operations. The structure for a variety of these systems will appear from the description above. In addition, the present examples are not described with reference to any particular programming language, and various examples may thus be implemented using a variety of programming languages.

As described in greater detail within, embodiments of the disclosure relate to a lithography application relating to the ability to apply mask pattern data to a substrate120in a single exposure lithography process. The embodiments described herein relate to a software application platform. The software application platform includes methods of forming three-dimensional profiles in a single exposure.

FIG.6is a schematic, plan view of a portion600of the substrate120during a digital lithography process. The substrate120includes a photoresist layer601disposed over the substrate120. In some embodiments, which can be combined with other embodiments described herein, an underlying film layer is disposed under the photoresist layer. An image projection system200(shown inFIG.2) corresponding to the portion600of the substrate120receives the mask pattern data from the controller122. The mask pattern data defines one or more exposure areas602overlaid on the substrate120. The exposure areas602define an area of the photoresist layer601to be exposed to write beams from the image projection system200. The exposure area602includes, but is not limited to, a square, circular, triangular, elliptical, regular polygonal, irregular polygonal, and/or irregular shape. One or more exposure areas602may be provided in the mask pattern data.

The plurality of spatial light modulator pixels of the spatial light modulator210are configured in an aggregated shot pattern604. The aggregated shot pattern604is overlaid on the substrate120. Each spatial light modulator pixel of the spatial light modulator210corresponds to a potential shot606. The aggregated shot pattern604depicts the locations where each of the potential shots606could be projected on the substrate120. The mask pattern data determines which of the plurality of spatial light modulator pixels is in an “off” position or an “on” position. Each potential shot606represents the centroid of a mirror213(shown inFIG.2B). When the spatial light modulator pixel is in the “on” position, the potential shot606is projected to the corresponding location on the substrate120.

As shown inFIG.6, a grid608of a plurality of unit areas610is overlaid on the substrate120. Each unit area610corresponds to one spatial light modulator pixel of the spatial light modulator210. In the embodiment shown inFIG.6, each unit area610is operable to receive five distinct potential shots606(i.e., a first shot606A, a second shot606B, a third shot606C, a fourth shot606D, and a fifth shot606E) depending on the mask pattern data. Each unit area610may include hundreds of shots606, such as between about 50 and about 500 potential shots. For example, in an embodiment, each unit area610includes between 70 and 350 potential shots606. Increasing the number of potential shots606will allow for finer control of light concentration on the photoresist layer601. Each of the first shot606A, the second shot606B, the third shot606C, the fourth shot606D, and the fifth shot606E across the plurality of spatial light modulator pixels are projected sequentially.

The aggregated shot pattern604has an aggregated shot pitch612. The aggregated shot pitch612is the distance between adjacent potential shots606. The aggregated shot pitch612is determined by the pixel pitch215(shown inFIG.2B) and the magnification of the image projection system200. Each plurality of potential shots606has a shot step614between each potential shot606. The plurality of potential shots606are uniformly distributed within each unit area610to minimize the distance between each of the potential shots606. The spatial light modulator210is slightly rotated against the shot step614direction by θDMR. The image projection system200can be installed on the support108such that the spatial light modulators210are rotated by θDMR.

When the substrate120scans under the image projection system200, the processing unit106projects the plurality of shots606corresponding to the plurality of spatial light modulator pixels in the “on” position to the portion600of the substrate120. Each shot606of the plurality of shots606is projected inside the exposure area602, as defined according to the mask pattern data. The plurality of shots606in the exposure area602may partially overlap. For example, when the plurality of shots606are sufficiently dense within the exposure area602, a pattern corresponding to the exposure area602is exposed in the photoresist layer601.

FIG.7Ais a schematic, plan view of an exposure area602divided into a plurality of sub-grids702. Each sub-grid702has a length L. A gray pattern700is provided in the mask pattern data by the controller122. The gray pattern700defines the transmittance rate of the write beams to be delivered to the exposure area602. The gray pattern700is determined according to the method1000described herein. In some embodiments, which can be combined with other embodiments described herein, the area of the sub-grid702is less than the area of the plurality of mirrors213(shown inFIG.2B). In certain embodiments, the length L may be larger than the optical resolution of the image projection system200and larger than the pixel pitch215. Alternatively, the length L may be less than the optical resolution of the image projection system200and the optical resolution is less than the pixel pitch215. Additionally, the length L may be reduced to achieve a desired profile with greater step height variations. Reducing the length L will provide for steeper slopes in the topography of the profile to be formed by the corresponding increase in the number of sub-grids702in the exposure area602.

FIG.7Bis a schematic, plan view of the gray pattern700with a plurality of sub-grids702. The sub-grids702are utilized to designate the transmittance rate of the write beam on certain portions of the exposure area602. As the plurality of shots606(shown inFIG.6) corresponding to the plurality of spatial light modulator pixels in the “on” positon are provided to the exposure area602, the gray pattern700may be utilized to vary the shots received within each sub-grid702, thereby designating the local transmittance rate to be delivered to each sub-grid702.

A plurality of pattern units704are defined within each sub-grid702by the mask pattern data. The plurality of pattern units704are used to designate the local transmittance rate in each sub-grid702. The plurality of pattern units704are designed with a plurality of parallel spaced apart patterned lines708A used to achieve the local transmittance rate. The plurality of parallel patterned lines708A,708B designate portions of the sub-grid702that receive and do not receive “shots” from the image projection system200. The local transmittance rate therefore corresponds to the area of the pattern units704designated to receive “shots.” For example, in order to reduce the local transmittance rate in a specific sub-grid702by 50%, the patterned lines708within each of the plurality of pattern units704are formed with an area that is 50% of the respective pattern unit704that in turn translates to covering 50% of the respective sub-grid702the respective pattern units704make up. In such an example, only “shots” which fall into the patterned lines708A of the plurality of pattern units704, and hence, in each sub-grid702, will be provided in order to achieve the desired transmittance rate during processing. The ratio of the area of the patterned lines708to the area of each of the pattern units704defines a gray pattern transmittance map. The gray pattern transmittance map is utilized to define a shape and size of the plurality of pattern units704.

FIGS.8A-8Dis a schematic, plan view of a plurality of pattern units704, according to certain embodiments.FIGS.8A-8Dshow examples of the pattern units704in each sub-grid702. The plurality of pattern units704are not limited to those shown inFIGS.8A-8D. In certain embodiment, each of the pattern units704are designed with alternating patterned lines708A and non-patterned lines708B. In certain embodiments, the alternating patterned and non-patterned lines708A,708B in each of the pattern units704may be vertical or disposed at a rotation angle within the pattern unit704. The design of the pattern units704are determined based on complexity of the exposure area602and imperfections from the image projection system200. The plurality of pattern units704in each sub-grid702may achieve a local transmittance rate of between 0% and 100% in each sub-grid702.

FIG.8Ashows an embodiment of pattern unit704A formed with 2-pitch vertical patterned lines708A. In such an embodiment, each pattern unit704A includes two (2) patterned lines708A alternating with two (2) non-patterned lines708B.FIG.8Bshows an embodiment of pattern unit704B formed with 2.5-pitch vertical patterned lines708A. In such an embodiment, each pattern unit704B includes 3 patterned lines708A alternating with 2 non-patterned lines708B.

In another embodiment,FIG.8Cdepicts pattern unit704C formed with 3-pitch vertical patterned lines708A. In such an embodiment, each pattern unit704C includes 3 patterned lines708A alternating with 3 non-patterned lines708B. In yet another embodiment,FIG.8Ddepicts pattern unit704D formed with 3-pitch angled patterned lines708A. Increases in the patterned line pitch count of the pattern units704allows for greater and finer control over the transmittance rate delivered to the pattern units704, thereby allowing for more control over the amount of photoresist removed from the photoresist layer601and the resulting topography thereon. However, increasing the pitch of the pattern units704correspondingly also increases the complexity of the data thereby reducing the efficiency and throughput of the system. As such, when designing the of the pattern unit704, consideration should be given to the complexity of the exposure area and need for pattern units704with higher pitch counts.

Delivery of the potential shots606(shown inFIG.6) in each sub-grid702and corresponding to the plurality of spatial light modulator pixels overlapping with the patterned lines708of the gray pattern700in the “on” position, is instructed by the controller122according to the mask pattern data. In one embodiment, which can be combined with other embodiments described herein, the plurality of pattern units704corresponds with the plurality of unit areas610in which the plurality of shots606are uniformly distributed in. The local transmittance rate in the sub-grid702is therefore determined by the ratio of the area of the plurality of pattern lines708to the area of the respective pattern units704in the sub-grids702of the gray pattern700.

As shown inFIGS.9A and9B, the local transmittance rate in sub-grids702may therefore by adjusted by varying a width “W” of the patterned lines708A in the plurality of pattern units704defined in the respective sub-grid702. As discussed herein, since only “shots” which fall into the patterned lines708A of the plurality of pattern units704will be provided in each respective sub-grid702, the number of the plurality of shots606received by a pattern unit704and the corresponding sub-grid702therein, may therefore also align with the ratio of the width of the plurality of pattern lines708to the width of the respective pattern unit704. In some embodiments, the number of the plurality of shots606and the local transmittance rate in each sub-grid702may not perfectly align with the ratio of an area of the plurality of pattern lines708to the area of the pattern unit704due to the discrete nature of digital lithography.

The plurality of pattern units704defined in a single sub-grid702may therefore achieve a local transmittance rate in the respective sub-grid702. In one embodiment, which can be combined with other embodiments described herein, to vary the local transmittance rate in sub-grids702, the width of the patterned lines708A are increased to correspondingly increase the transmittance rate to the specific sub-grid702. InFIG.9A, an example of a plurality of pattern units704formed with 2-pitch vertical patterned lines708is shown with the width “W1” of the patterned lines708A sized to cover 50% of the pattern units704to achieve a 50% local transmittance rate in the corresponding sub-grid702. InFIG.9B, the width of the patterned lines708A in the same sub-grid702is increased by 25% to “W2”, which correspondingly increases the local transmittance rate by 25% to 62.5%. The increased local transmittance rate translates to the sub-grid702shown inFIG.9Bsuch that the sub-grid702inFIG.9Bwill receive more of the plurality of potential shots606than the sub-grid702shown inFIG.9A. Conversely, decreasing the width of the patterned lines708A correspondingly decreases the transmittance rate to the corresponding sub-grid702.

In one embodiment, which can be combined with other embodiments described herein, each sub-grid702includes pattern units704having the same local transmittance rate. In another embodiment, which can be combined with other embodiments described herein, the local transmittance rate of pattern units704is different in at least two adjacent sub-grids702.

FIG.10is a schematic cross-sectional view of the formation of varying step heights in the profile of the photoresist layer601, according to certain embodiments. The local transmittance rate of the plurality of shots606delivered to each of the sub-grids702of the gray pattern700may be varied from 0% to 100% across the exposure area602. In an example shown inFIG.10, varying the local shot transmittance rate causes formation of different step heights in the photoresist layer601(shown inFIG.6) which can then be transferred into one or more underlying layers by an etch process (e.g., an anisotropic etch process) for incorporation in an integrated circuit, display, etc. In embodiments where the transmittance rate is 0% (i.e., the width of the pattern lines708A in the pattern unit704is “0”), the respective sub-grid702therein would not receive any of the plurality of shots606and thus the thickness of the photoresist layer601remaining would be 100%. In embodiments where the transmittance rate is 100% (i.e., the width of the non-pattern lines708B in the pattern unit704is “0” such that the pattern lines708A occupy the entire area of the plurality of pattern units704), the entire area of the respective sub-grid702would receive 100% of the plurality of shots606and thus the photoresist layer601would be completely removed. Therefore, varying the local transmittance rate of sub-grids702across the exposure area602by defining the pattern units704provides increased control in the light delivered to the photoresist layer601and the topography profile formed therein. In certain embodiments, the topography profile formed in the photoresist layer601can be curved, spherical, aspherical, concave, convex, tapered, half-cylindrical, or angled profile.

In addition to forming different step heights in the photoresist layer601, varying the local transmittance rate of the write beams delivered to the sub-grids702can be utilized to flatten or planarize a top surface of the photoresist layer601.FIG.11is a cross-sectional view of a film stack layer before and after exposure at varying local transmittance rates. In an embodiment, flattening the topography profile of the photoresist layer601can be useful for photoresist layers used to form planarization and/or passivation layers. Planarization of surface topography reduces surface roughness and electrical passivation in order to reduce capacitive coupling between formed components and underlying substrates and layers. Typically, subsequent etching of the resist and/or polishing is required to achieve planarization of the resist layer. However, use of the method described herein to also planarize the surface of the photoresist layer used to form a planarization layer may reduce the need for and possibly even avoid altogether, any subsequent processes (i.e. chemical mechanical polishing (CMP)) to prepare and flatten the surface of the resist layer.

FIG.11is a cross-sectional schematic view of a photoresist layer802disposed over a plurality of features804formed on a substrate806. Portions “A” of the photoresist layer802disposed directly on the substrate806is formed with a height “H1” from the surface of the substrate806. On the other hand, the topography of the plurality of features804causes respective portions “B” of the photoresist layer802to correspondingly be formed with an increased height “H2” from the surface of the substrate806. In addition to removing portions of the photoresist layer802in accordance with the mask pattern data by using a local transmittance rate of 100% during exposure, the topography of the photoresist layer802can also be planarized without any additional processes by varying the local transmittance rate over portions A and B of the photoresist layer802to reduce the topography of portions “B” of the photoresist layer802from H2to H1. In the example shown inFIG.11, the exposure over portions A of the photoresist layer802is performed with a 0% local transmittance rate in order to maintain the H1height and thickness of the photoresist layer801. Whereas a 100% local transmittance rate is shown to completely remove the photoresist layer801in portions B and expose the surface of the features804, a 40% local transmittance rate over portions B would only partially remove the photoresist layer and reduce the topography of the respective portions “B” of the photoresist layer802to H1. Accordingly, the disclosure described herein provides several benefits over conventional methods and systems.

FIG.12is a graph of remaining photoresist thickness of a gray pattern after exposure at varying transmittance rates and dose amounts. As shown, the remaining photoresist thickness depends on both the transmittance rate and dose amount of the write beam. The dose amount may be varied by changing a dwell time and/or intensity of the exposure relative to other dose amounts. In one embodiment, which can be combined with other embodiments described herein, the dose amount may be selected based on the photoresist material and the maximum photoresist thickness required to be removed according to the mask pattern data. The dose amount may accordingly be selected such that 100% transmittance at the designated dose amount is sufficient to remove the maximum photoresist thickness required to be removed. In certain embodiments, the maximum photoresist thickness to be removed may be equal to the entire photoresist thickness. Alternatively, the maximum photoresist thickness to be removed may be less than the original photoresist thickness.

Varying the local shot transmittance rate between portions of the photoresist layers601to form different step heights can in some instances cause irregularities in the pattern actually written in the photoresist layer601due to the optical or process proximity effect. Proximity effects are caused by the unavoidable scattering of electrons after the write beam from the image projection system200contacts the photoresist layer601. The result is that edge placement integrity between sub-grids702of varying step height, or exposed and unexposed sub-grids702, becomes blurred with the edge portions between the sub-grids702being somewhere in between. Such resulting unintended irregularities may impact or alter the electrical properties of the component being fabricated. In another embodiment, proximity effects may also be caused by process steps such as development and/or curing of the photoresist layer. Generally, optical proximity correction processes including subsequent exposure corrections, are required to correct these errors by moving edges or adding extra polygons to the pattern being written. However, by varying and using a different local transmittance rate at edge/boundary portions, such additional correction processes can be avoided with correction already accounted for.

FIG.13is a cross-sectional view of an example of an exposed photoresist layer900formed and extending between a pad902and a via904. In the example shown, the photoresist900has a remaining thickness ranging from 4.252 μm near the portion of the photoresist where the pad902is formed and where the local transmittance rate of received write beams is 0%, down to 0 μm near the via904and where the local transmittance rate was 100%. The region of the photoresist900disposed between the pad902and the via904is a relatively flat half-tone region905formed by exposure to write beams with a 50% local transmittance rate. As shown inFIG.13, at a boundary region901of the photoresist900between the portion of the photoresist layer900disposed over the pad902and the half-tone region905, a dent906is formed due to the optical proximity effect in the photoresist layer900. Specifically, that in the example shown, the optical proximity effect causes the photoresist layer900at the dent906to be formed thinner (about 2.476 μm) than the half-tone region905(between about 2.481 μm and 2.523 μm) of the photoresist layer900. At a boundary region903of the photoresist900where the portion of the photoresist layer900disposed over the half-tone region transitions to the portion near the via904, a hump908is also formed in the topography of photoresist layer900due to the optical proximity effect. Specifically, that the hump portion907of the photoresist layer900is formed thicker (about 2.649 μm) than the half-tone region905(between about 2.481 μm and 2.523 μm) of the photoresist layer900before dropping down 0 μm at the via904.

To avoid such irregularities, the local transmittance rate at such boundary regions can be varied, such as by decreasing the local transmittance rate at the boundary region901to 40% and increasing the local transmittance rate at the boundary region903to 60%.FIGS.14A and14Bdepict an example illustration of corresponding gray patterns formed for the boundary regions901,903with varying transmittance rates utilized for the boundary regions. InFIG.14A, a gray pattern between the half-tone region905and the via904is shown with the 0.09 width of the patterned lines708in the half-tone region905being increased to 0.11 in the transition region, thereby increasing transmission rates, as the position moves closer to the 100% transmission rate at the via904. InFIG.14B, a gray pattern between the half-tone region905and the pad902is shown with the 0.09 width of the patterned lines708in the half-tone region905is decreased to 0.07 in the transition region, thereby decreasing transmission rates, as the position moves closer to the 0% transmission rate at the pad902. By varying and using a different transmittance rate at each of the respective boundary regions, the effects of the optical proximity effect can be controlled and minimized.

In some embodiments, the number of shots606projected in each sub-grid702of the gray pattern700will not always lead to a smooth thickness transition between adjacent sub-grids702of the photoresist layer601. Therefore, a widening of the laser pulse of the light source202projected to the substrate120by increasing shot time or utilizing a higher printing scan speed may be performed to improve the transition of thickness in the photoresist layer601. As the stage114(shown inFIG.1) moves at a constant speed during a scan, widening the laser pulse (i.e., increasing the pulse width) will reduce the roughness of the photoresist layer601in the direction of movement of the stage114. Conventionally, the pulse width of the light source202multiplied by the speed of the stage114is about 40% or less of a pixel pitch215(shown inFIG.2B). However, in the first smoothing operation, the pulse width of the light source202multiplied by the speed of the stage114is about 100% to about 150% of the pixel pitch215to allow for blending of the plurality of shots606that have been projected. The blending occurs in the direction of movement of the stage114.

The transmittance control method described herein allows the photoresist profile to be formed in a single exposure operation of the image projection system200. Executing the exposure operation in a single pass can reduce the occurrence of multiple exposures. The single exposure operation leads to increases in throughput and reduces alignment issues. Further, regardless of the queue time (the time between the exposure and development of the photoresist layer601), the profile will be formed due to only requiring a single exposure. Thus, the gray pattern700allows for improved throughput, ability to flatten as well as develop different step heights in the profiles of the photoresist layer601, control and minimize the irregularities caused by optical proximity effect, reduces overlay issues associate with the usage of multiple masks.

FIG.15is a flow diagram of a method1000for generating a desired profile in a photoresist layer601by controlling transmittance rates in a lithography process. The method1000allows for defining the gray pattern700according to the desired photoresist profile. A controller122as described herein facilitates the operations of the method1000. The method1000is performed in a single exposure operation of the image projection system200. Prior to the method1000, a desired photoresist profile is determined. The method1000may be at least partially executed by the single exposure lithography application312.

At operation1001, step heights of a photoresist layer are determined to achieve a desired photoresist profile. The step heights are utilized to determine a necessary local transmittance rate at a designated dose to remove a certain thicknesses of a photoresist layer and modify the photoresist profile. The local transmittance rate and designated dose necessary to obtain the step heights of the desired photoresist profile may be empirically determined beforehand, and applicable for future operations. At operation1002, a map of the photoresist thickness to be removed across the photoresist layer is determined to achieve the desired photoresist profile. The map depicts the removed thickness of the photoresist at each position. The designated dose utilized may be determined based on the resist type and maximum resist thickness needed to be removed. The map of the removed thickness is determined based on the contrast curve.

At operation1003, a transmittance rate map is determined. The transmittance rate map is determined by referencing the map of the removed thickness against the contract curve. The transmittance rate corresponds to a percentage of the photoresist layer601that is developed from exposing the photoresist to the intensity of light emitted from a light source202of the image projection system200at the designated dose. For example, by determining the removed thickness at each location, the necessary transmittance rate for the designated dose can be determined at each location.

At operation1004, a gray pattern rate map is determined. The gray pattern rate map is derived by determining a ratio of the local transmittance rate at each location (i.e., at each sub-grid702) to a nominal transmittance rate. The gray pattern rate map determines the number of shots606to be projected per sub-grid702based on the transmittance rate map. The gray pattern rate map determines a local transmittance rate at each sub-grid702. At operation1005, a gray pattern700is generated based on the gray pattern rate map. The gray pattern rate map dictates the ratio of the local transmittance rate to the nominal transmittance rate. A plurality of pattern units704in each sub-grid702define the gray pattern700. The pattern areas704for each sub-grid702are determined at operation1005to correspond with the gray pattern density map. The gray pattern700is provided to the image projection system200by the controller122in the form of mask pattern data.

At operation1006, the gray pattern is printed and measured. When the substrate120scans under the image projection system200in a single pass the processing unit106projects a plurality of shots606according to the gray pattern700. The local transmittance rate is varied across the plurality of sub-grids702. As the transmittance rate at each sub-grid702depends on the local transmittance rate, the thickness of photoresist layer601removed will vary across the substrate120. Therefore, the profile of the photoresist layer601will have varying step heights. The thickness of the may then be measured. At operation1007, the thickness of the desired photoresist profile is compared with the thickness of the profile formed in the photoresist layer601at the operation1006. In embodiments where the thicknesses do not match, the rate map is adjusted accordingly. For example, the transmittance rate at each location can be increased or decreased. As a result, the pattern lines708in respective pattern units704will increase or decrease in area responsively. Operations1003-1007may then be repeated until the thickness of the profile formed is equal with the thickness of the desired photoresist profile.

At operation1008, the photoresist layer601is smoothed. In some embodiments, the number of shots606projected in each sub-grid702of the gray pattern700will not always lead to a smooth thickness transition between adjacent sub-grids702of the photoresist layer601. Therefore, one of a first smoothing operation and second smoothing operation may be performed to improve the transition of thickness in the photoresist layer601.

The first smoothing operation includes tuning the image projection system200to print the gray pattern700slightly out of focus. Therefore, the plurality of shots606projected in the exposure area602will be blurred. The plurality of shots606being blurred will increase the blending of the adjacent shots606. Therefore, when the photoresist layer601is developed, the thickness transitions will be smoother.

The second smoothing operation includes a baking process. The baking process may be performed on photoresist layer601after exposure (i.e., the operation1006). The baking process may be performed on an underlying film layer after development of the photoresist layer601. The baking temperature is about 150° C. to about 250° C. The baking has a diffusion effect, which allows the photoresist or the underlying film layer to slightly melt. Thus, the photoresist or the underlying film will be smoothed.

In summation, a system, a software application, and a method of a lithography process to control write beam transmission rates and form a desired profile of a photoresist layer in a single exposure operation is provided herein. To form the desired profile in the photoresist layer, a local transmission rate of a plurality of shots within an exposure area is varied. A plurality of pattern units corresponding to portions of the exposure area to receive the plurality of shots is used to determine the local transmission rate provided by an image projection system at each sub-grid of the exposure area. The local transmission rate will determine the thickness of a photoresist layer when the plurality of shots are projected to the photoresist layer. By adjusting the local transmission rate by defining the plurality of pattern units and where the plurality of shots are to be projected within each sub-grid of the exposure area, the thickness of the photoresist layer can be formed with the desired profile and/or a top surface of the photoresist layer can be planarized. The desired profile and the flattening of the top surface of the photoresist layer may be formed in a single exposure operation of the lithography system. Utilizing the gray pattern allows for improved throughput, ability to planarize as well as develop different step heights in the desired profiles of the photoresist layer, control and minimize the irregularities caused by the optical proximity effect, and reduces overlay issues associate with the usage of multiple masks.