Integrated circuit socket and board

An assembly for testing integrated packages comprising, a test circuit board for simultaneously testing a plurality of integrated circuit packages with each package having a plurality of rows of leads extending in parallel array from the body of the package, the board having a plurality of sockets each shaped with a top, sidewalls and a bottom with the top having means forming a plurality of rows of depending recesses spaced to receive, one each, the leads, and also having a plurality of auxiliary recesses, each positioned within the sidewalls and each shaped to receive a discrete component and each associated with one of the depending lead recesses, and means for electrically connecting discrete components within the auxiliary recesses and integrated circuit package leads in the associated depending lead recesses to each other and through the sockets to the circuit board, each discrete component being electrically connected to no more than one of the circuit package leads.

FIELD OF INVENTION 
The present invention relates generally to a board for multiple testing of 
integrated circuit packages, and in particular to a socket arrangement for 
receiving integrated circuit packages for simultaneously use or testing on 
a test board. 
BACKGROUND OF INVENTION 
Integrated circuit packages are made in a variety of electronic 
configurations. These packages, however, are commonly configured within 
standard packages: one of these is often referred to as dual in-line 
packages, hereafter referred to as DIPS. These DIPS are used ina wide 
range of electronic applications, frequently including military apparatus. 
Because of the substantial reliability requirements of such DIPS, a 
variety of tests have been developed to assure proper functioning of these 
DIPS. These tests, including, for example, a burn in test required as a 
military prescreen, often involves the insertion of the chips into an 
"electrical circuit" for repetitive or other types of testing. In view of 
the very large number of DIPS tests, it has been common to develop a test 
board designed to simultaneously receive a plurality of DIPS for common 
and efficient testing. These test boards must be designed to receive a 
plurality of DIPS from automatic insertion machinery. After testing, the 
DIPS are automatically removed and a new set inserted. Consequently, the 
sockets designed to receive the DIPS must provide good electrical 
connections to the DIP leads and further must be designed to readily 
receive and securely hold the DIPS during the testing cycle. The contact 
between the socket and the DIP must be such as to permit easy insertion 
and removal, while nonetheless providing good electrical connections. 
A wide-range of test boards are used to receive the many different types of 
DIPS. Thus, for example, the test boards used for memory DIPS are 
different from those used for logic DIPS. The circuit on these test boards 
are generally formed in the lower surface of the test board with some 
components such as capacitors and resistors secured on the other side of 
the board adjacent or in between the sockets designed to receive the DIPS. 
Heretofore, these sockets have ordinarily been secured by solder to a 
printed circuit board, and the associated electronic components, such as 
resistors and capacitors, are placed on the test board with their leads 
appropriately soldered to the test board circuit. Since these components 
occupy a portion of the test board surface, the remaining space left for 
sockets to receive the DIPS is limited. In turn, this means fewer DIPS can 
be tested at a given time. 
Since testing and prescreening of DIPS require the use of expensive ovens 
with limited interior space, it is important to provide a test circuit 
board with as many sockets designed to receive DIPS as possible. By using 
smaller resistors, such as ceramic chip resistors, capacitors, or other 
passive components and by providing a socket particularly designed to 
receive both DIPS and one or more ceramic chip resistors or the like in 
lieu of axial resistors, a considerable space savings upon the surface of 
the printed circuit board may be effected. As a consequence more DIPS may 
be tested at a given time on a board. 
Several attempts have been made to provide DIPS test boards that achieve 
these results. Insofar as the applicant is aware,the most relevant efforts 
are exemplified by U.S. Pat. No. 4,478,476 which issued Oct. 23, 1982 to 
Jones. That patent generally discloses a socket for use on a test board. 
However, it makes no provisions for the integration within the socket of 
means for receiving a discrete component such as a capacitor or resistor. 
Other references illustrative of the prior art include, for example. U.S. 
Pat. No. 4,356,532 issued Oct. 26, 1982, U.S. Pat. No. 4,080,026 issued 
Mar. 21, 1968 and U.S. Pat. No. 4,116,519 issued Sept. 26, 1978. 
Accordingly, it is an object of the present invention to provide a socket 
for securing DIPS to a circuit board including, but not limited to, test 
circuit baords. 
A further object of the present invention is to provide an improved socket 
for a variety of circuit packages, such as DIPS, pin grid arrays, leadless 
chip carrier packages, flat packs, and the like that permits a more 
compact arrangement of the integrated circuit packages on the board. 
A further object of the present invention is to provide an improved 
integrated circuit socket adapted to receive combinations of an integrated 
circuit package and a variety of discrete components for electrical 
connection of the components and integrated circuit package to the 
circuitry of a circuit board. 
A futher object of the present invention is to provide a means for 
achieving greater flexibility in mounting an integrated circuit package on 
a circuit board by incorporating into the socket a means for receiving 
discrete components such as resistors and capacitors. 
A further object of the present invention is to provide an improved circuit 
board having a plurality of sockets secured thereto in electrical contact 
with the circuit of the circuit board, wherein the sockets are adapted to 
commonly receive both integrated circuit packages and discrete passive 
components. 
A still further object of the present invention is to provide an improved 
socket for receiving integrated circuit packages in a manner that permits 
ready insertion and removal of the packages into the socket, thereby 
permitting use of the sockets on a test board circuit. 
Another object of this invention is to provide means for solderless secure 
components within a socket and in conductive contact with leads of an 
integrated circuit package. 
SUMMARY OF INVENTION 
The objects and advantages of the present invention, including those 
outlined above are achieved by the socket of the present invention, which, 
in a preferred form, includes a body having a plurality of rows of 
depending recesses extending downwardly from the top, with these recesses 
spaced and shaped to receive, one each, the leads of an integrated circuit 
package. Additionally, a plurality of auxiliary recesses, each shaped to 
receive a discrete passive component are each associated with one of the 
depending lead recesses. The socket is provided with two groups of leads 
with one group having an upper end projecting into the auxiliary recess 
for conductive engagement with discrete components positioned within the 
auxiliary recess. The other group of socket leads are connected to 
conductive spring members that are contained, one each, in the depending 
recesses for the integrated circuit package leads. These spring members 
are designed to frictionally engage the integrated circuit leads and 
provide an electrical connection to the discrete passive component and the 
circuitry of the printed circuit board. 
The design of the present invention is shaped specifically to be compatible 
with existing "burn-in" style sockets and for use with automatic machinery 
that inserts and removes integrated circuit packages from test circuit 
baords. In this connection the depending recesses in the sockets are 
spaced and arranged to receive the footprint pattern of subtending leads 
of mounting pins of the integrated circuit packages. The height of the 
socket is such as to permit accommodation in the presently available 
testing ovens.

DESCRIPTION OF THE PREFERRED EMBODIMENT 
Referring to FIG. 1, there is illustrated a plan view of a test board 
embodying the invention. In this arrangement, the test board 1 is 
conventionally formed with a suitable circuit for testing a multiplicity 
of integrated circuit packages. This circuit (not shown) may include large 
components such as capacitors having axial leads 4 which are conductively 
connected through the board to the circuit on the undersurface of the 
board. Additionally, the board 1 is provided with an array of rows 6 of 
individual sockets 8, each adapted to simultaneously receive similar 
integrated circuit chips 10. 
Since resistors are integrally secured within the individual sockets 8, and 
therefore need not be separately mounted on the board 1 in a manner 
similar to capacitors 2, the configuration of board 1 may be arranged more 
compactly than would be the case with separate mounting of individual 
resistors. As illustrated in FIG. 1, the array of sockets 8 permits a 
greater number of parallel rows 6 of these sockets with spacing between 
them sufficient only for attachment of capacitors 2. 
The individual sockets 8 are illustrated in FIGS. 2, 3 and 4. As 
illustrated, the sockets are provided with a top 12, sidewalls 14 and 
bottom 16. A plurality of rows 18 of depending recesses 20 are formed in 
the top 12 of each socket. These recesses 20 are spaced to receive leads 
from the integrated circuit package. Additionally, a plurality of rows 22 
of auxiliary recess 24 also depend from the top 12 of the socket 8. the 
auxiliary recesses 24 are each shaped to receive a discrete component such 
as a small resistor. Each auxiliary recess 24 is associated with one of 
the depending lead recesses 20 as best illustrated in FIG. 5. As 
illustrated in FIG. 5, the recesses 20 are separated from the auxiliary 
recesses 24 by a wall 26 that preferably has a beveled upper end 28 
terminating short of the top 12. The recesses 20 are preferably 
rectangular in shape and are each positioned, sized and shaped to receive 
a depending lead of an integrated circuit package such as a DIP. The array 
of rows 18 are spaced with the individual recesses 20 also spaced to 
readily receive the array of integrated circuit package leads 30 that 
ordinarily form part of the integrated circuit packages being tested. In a 
typical arrangement the center leads of an integrated circuit packages are 
spaced apart 0.3 inches and accordingly, the center line of the adjacent 
recesses 20 are correspondingly spaced. 
Each auxiliary recess 24 is shaped to receive a discrete component 32 which 
ordinarily would comprise a resistor forming a part of the test circuit. 
The discrete component 32 is secured within the auxiliary recess 24 with 
its lower end adapted to be conductively engaged by one lead 34 of a row 
of depending integrated circuit package leads 34. An additional set of 
rows of depending circuit leads 36 also extend downwardly from the bottom 
16 of the socket. The lower ends 38 of the leads 34 and 36 are shaped, 
sized and positioned to extend through appropriate openings in the test 
board 1 for connection to the test circuit in a conventional manner. 
The upper ends of leads 36 are conductively connected to the conductive 
spring 40. A conductive spring 40 is positioned within each of the 
depending recesses 20. The conductive spring 40 may be made of any 
conventional conductive spring material such as copper and includes a 
bight section 42 with a pair of upwardly extending arms 44 and 46. The 
upwardly extending arms are preferably formed with a constriction 48 
intermediate the ends to provide a spring-like grip for any integrated 
circuit leads 30 that are inserted into the socket, thereby forming a 
conductive engagement with the leads of the integrated circuit being 
tested. The upper end of spring arm 46 bears against a wall of the recess 
20 at 50. The other upwardly extending arm 44 above the construction 48 
extends outwardly over beveled upper edge 28 into auxiliary recess 24. The 
upper end 52 of arm 44 is curled to form a conductive contact with the 
discrete component 32. 
In operation individual integrated circuit packages are inserted one each 
in the array of sockets 8 as illustrated in FIG. 1. In this arrangement 
each integrated circuit package is conductively connected with its leads 
30 engaging springs 40 which in turn conductively interconnects the 
discrete component 32 into the test board circuitry. Because of the 
arrangement, the integrated circuit package may be readily inserted and 
removed by automatic means, not shown.