Regulation circuit associated with synchronous rectifier providing cable compensation for the power converter and method thereof

A regulation circuit of a power converter for cable compensation according to the present invention comprises a signal generator generating a compensation signal in accordance with a synchronous rectifying signal. An error amplifier has a reference signal for generating a feedback signal in accordance with an output voltage of the power converter. The compensation signal is coupled to program the reference signal. The feedback signal is coupled to generate a switching signal for regulating an output of the power converter. The regulation circuit of the present invention compensates the output voltage without a shunt resistor to sense the output current of the power converter for reducing power loss.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention is related to a regulation circuit, especially to a regulation circuit associated with a synchronous rectifier providing cable compensation for the power converter.

2. Description of the Related Art

FIG. 1shows a prior art of a power converter. A PWM controller (PWM)30generates a switching signal SPWMto switch a transformer10having a primary winding NPand a secondary winding NSvia a power transistor20in accordance with a feedback signal VFBfor regulating the output of the power converter. The primary winding NPof the transformer10is coupled to receive an input voltage VIN. The feedback signal VFBis generated by an opto-coupler60in response to the output voltage VOof the power converter. The opto-coupler60is controlled by an error amplifier50. The error amplifier50generates a signal VFcoupled to control the opto-coupler60. The error amplifier50includes a reference signal VRsupplied with a positive input terminal of the error amplifier50for regulating the output voltage VO. The output voltage VOis coupled to an negative input terminal of the error amplifier50via a voltage divider developed by resistors51and52. A capacitor53is coupled between the negative input terminal of the error amplifier50and an output terminal of the error amplifier50.

The secondary winding NSis coupled to an output terminal of the power converter to generate the output voltage VO. A rectifier40is coupled to one terminal of the secondary winding NS. An output capacitor45is coupled to the other terminal of the secondary winding NSand the output terminal of the power converter to generate the output voltage VO. A resister62is coupled form the capacitor45and the rectifier40to the opto-coupler60.

Generally, the output cable of the power converter has a voltage drop proportional to its output current. Sensing the output current to offset the voltage drop is an approach for the output cable compensation. However, it will generate a significant power loss while sensing the output current by using a shunt resistor. The present invention provides a method and apparatus to compensate the output voltage without the need of sensing the output current of the power converter by the shunt resistor.

BRIEF SUMMARY OF THE INVENTION

The object of the present invention is to provide a regulation circuit and a method with output cable compensation for the power converter. The regulation circuit and method compensate the output voltage without a shunt resistor to sense the output current of the power converter for reducing power loss.

The regulation circuit with output cable compensation for the power converter according to the present invention comprises a signal generator and an error amplifier. The signal generator generates a compensation signal in accordance with a synchronous rectifying signal. The error amplifier has a reference signal for generating a feedback signal in accordance with an output voltage of the power converter. The compensation signal is coupled to program the reference signal. The feedback signal is coupled to generate a switching signal for regulating an output of the power converter.

A method for the regulation circuit of the power converter according to the present invention comprises receiving the synchronous rectifying signal for generating the compensation signal, compensating the reference signal of the error amplifier of the regulation circuit in accordance with the compensation signal, and generating the feedback signal in accordance with the reference signal and the output voltage of the power converter. The feedback signal is coupled to generate the switching signal for regulating the output of the power converter.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 2is a circuit diagram of a preferred embodiment of the power converter having a regulation circuit100according to the present invention. The power converter comprises the transformer10, the power transistor20, the PWM controller (PWM)30, the opto-coupler60, a synchronous rectifying (SR) controller70, a power transistor75, and the regulation circuit (REG)100. The power transistor20is coupled from the primary winding NPof the transformer10to the ground for switching the transformer10. The PWM controller30generates the switching signal SPWMto switch the power transistor20in accordance with the feedback signal VFBfor regulating the output (output voltage VOand/or the output current IO) of the power converter.

The opto-coupler60is coupled to the secondary winding NSof the transformer10through the resistor62. The opto-coupler60generates the feedback signal VFBcoupled to the PWM controller30in response to the output voltage VO. The secondary winding NSis coupled to the output terminal of the power converter to generate the output voltage VO. The output capacitor45is coupled to the secondary winding NSand the output terminal of the power converter to generate the output voltage VO. The output voltage VOis outputted to the load through the output cable. The output current IOof the power converter flows through the output cable.

The power converter has a synchronous rectifying circuit to improve the power efficiency of the power converter. The synchronous rectifying circuit includes the synchronous rectifying controller70and the power transistor75having a parasitic diode76. The power transistor75is used for a synchronous rectifier to replace the rectifier40(shown inFIG. 1) for rectification. A drain terminal of the power transistor75is coupled to the secondary winding NS, and a source terminal of the power transistor75is coupled to the output terminal of the power converter. The parasitic diode76is coupled between the drain terminal and the source terminal of the power transistor75. The synchronous rectifying controller70generates a synchronous rectifying signal (SR signal) SSRcoupled to a gate terminal of the power transistor75to control the on/off of the power transistor75.

The detail operation of the synchronous rectifying circuit can be found in the prior art of “Synchronous rectification circuit for power converters”, U.S. Pat. No. 7,440,298. Refer to equation (9) of this prior art, it is,

Tdischarge=VSVO×Tcharge(1)
where the Tchargeis equal to the on-time TONof the switching signal SPWM; Tdischargeis the “turn on period” of the SR signal SSR. The VSis the magnetized voltage that is correlated to the input voltage VINof the power converter. Thus, the equation (1) can be rewritten as equation (2),

TSSR=K×VINVO×TON(2)
where K is a constant.

Refer to an output power POof the flyback power converter, it can be expressed as,

PO=VO×IO=VIN2×TON22×LP×T(3)
where LPis the inductance of the primary winding NPof the transformer10; T is the switching period of the switching signal SPWM.

In accordance with the equations (2) and (3), if the output voltage VOis fixed value, then the period TSSR(“turn on period” of the SR signal SSR) is correlated to the output current IO. In other words, the SR signal SSRis correlated to the output current IO. Therefore, the SR signal SSRcan be used instead of the output current IOto control the output voltage VOfor the cable compensation.

The regulation circuit100is coupled to receive the SR signal SSRand the signal VAfor generating the signal VF. The signal VFis future coupled to drive the opto-coupler60and generate the feedback signal VFB. The signal VAis produced in accordance with the output voltage VOvia the voltage divider developed by the resistors51and52. Therefore, the regulation circuit100is used for generating the feedback signal VFBin accordance with the output voltage VO. The voltage drop of the output voltage VOin the output cable can be compensated by the control of the SR signal SSR. Further, a resistor115is coupled to a terminal RPof the regulation circuit100.

FIG. 3is a circuit diagram of a preferred embodiment of the regulation circuit100according to the present invention. A signal generator (S/I)200is coupled to receive the SR signal SSRfor generating a compensation signal ICOMP. The resistor115is coupled to the terminal RPof the signal generator200to determine the ratio of signal generation. The resistor115is used for programming the level of the compensation signal ICOMPin accordance with the SR signal SSR. An output terminal of a buffer amplifier110having a reference voltage VR1supplied with a positive input terminal of the buffer amplifier110is coupled to a resistor117. The resistor117is further coupled to an output terminal of the signal generator200. A negative input terminal of the buffer amplifier110is coupled to the output terminal of the buffer amplifier110and the resistor117. The compensation signal ICOMPand the resistor117are utilized to generate a compensation voltage at the resistor117.

A resistor165and a capacitor150develop a filter coupled to the output terminal of the signal generator200and the resistor117. The resistor165is coupled from the output terminal of the signal generator200and the resistor117to a terminal of the capacitor150. The other terminal of the capacitor150is coupled to the ground. Through the filter, a reference signal VREFis generated at the capacitor150.
VREF=VR1+(ICOMP×R117)  (4)
The capacitor150of the filter is used for filtering the reference signal VREF. According to equation (4), the reference signal VREFis correlated to the compensation signal ICOMP. Therefore, the compensation signal ICOMPcan program and compensate the reference signal VREF, and the reference signal VREFis programmable in response to the output current IO(as shown inFIG. 2) due to the compensation signal ICOMPis correlated to the SR signal SSRand the SR signal SSRis correlated to the output current IO. Further, according to equation (4), the reference signal VREFis further correlated to the reference voltage VR1of the buffer amplifier110. Therefore, the buffer amplifier110is coupled to the compensation signal ICOMPfor generating the reference signal VREF.

An error amplifier170is coupled to receive the reference signal VREFand the signal VAto generate the signal VFfor generating the feedback signal VFB(as shown inFIG. 2). A positive input terminal and a negative input terminal of the error amplifier170receive the reference signal VREFand the signal VArespectively. An output terminal of the error amplifier170generates the signal VF. A capacitor175is coupled between the negative input terminal of the error amplifier170and the output terminal of the error amplifier170.

FIG. 4is a circuit diagram of a preferred embodiment of the signal generator200according to the present invention. A pulse generator210receives the SR signal SSRand generates pulse signals S1and S2in response to the SR signal SSR. The waveforms of the pulse signals S1and S2are shown inFIG. 5. The first pulse signal S1is enabled when the SR signal SSRis disabled. Once the first pulse signal S1is disabled, the second pulse signal S2is enabled after a delay time. The SR signal SSRis further coupled to control a charge circuit to charge a capacitor250for providing a voltage. The voltage provided by the capacitor250is correlated the SR signal SSR. The charge circuit includes a current source230and a charge switch231. The current source230is coupled between a supply voltage VCCand the charge switch231to charge the capacitor250through the charge switch231. The capacitor250is coupled from the charge switch231to the ground. The charge switch231is controlled by the SR signal SSR.

The first pulse signal S1is coupled to control a sample switch232for sampling the voltage of the capacitor250to a capacitor270. The sample switch232is coupled between the capacitor250and the capacitor270. The capacitor270is further coupled to the ground.

The second pulse signal S2is coupled to control a discharge switch233for discharging the capacitor250. The discharge switch233is coupled between the capacitor250and the ground. The voltage of the capacitor270is correlated to the voltage of the capacitor250. The capacitor270is further coupled to a voltage to current converter to convert the voltage of the capacitor270to a current I310for generating the compensation signal ICOMP. In other words, the voltage to current converter converts the voltage of the capacitor250to the current I310for generating the compensation signal ICOMP. The voltage to current converter includes an operational amplifier300and a transistor310. The resistor115(at RP terminal) is coupled to the voltage to current converter.

The capacitor270is coupled to a positive input terminal of the operational amplifier300. A negative input terminal of the operational amplifier300is coupled to a source terminal of the transistor310and the resistor115through the RP terminal. The source terminal of the transistor310is coupled to the resistor115through the RP terminal. The voltage to current converter converts the voltage of the capacitor270to the current I310at a drain terminal of the transistor310in accordance with the resistance of the resistor115(at RP terminal). The resistor115is utilized to program the current I310in accordance with the SR signal SSRfor programming the level of the compensation signal ICOMP.

A gate terminal of the transistor310is controlled by an output terminal of the operational amplifier300for producing the current I310. The current I310is further coupled to a current mirror formed by transistors311and312. The current mirror generates the compensation signal ICOMP. Source terminals of the transistors311and312are coupled to the supply voltage VCC. Gate terminals of the transistors311and312and drain terminals of the transistors310and311are coupled together. A drain terminal of the transistor312generates the compensation signal ICOMP.

Although the present invention and the advantages thereof have been described in detail, it should be understood that various changes, substitutions, and alternations can be made therein without departing from the spirit and scope of the invention as defined by the appended claims. That is, the discussion included in this invention is intended to serve as a basic description. It should be understood that the specific discussion may not explicitly describe all embodiments possible; many alternatives are implicit. The generic nature of the invention may not fully explained and may not explicitly show that how each feature or element can actually be representative of a broader function or of a great variety of alternative or equivalent elements. Again, these are implicitly included in this disclosure. Neither the description nor the terminology is intended to limit the scope of the claims.