Electronic circuit device

A surface-mount component (10A) having a pair of connection terminals (12a, 12b) with an inter-terminal pitch L2 therebetween is mounted on a circuit substrate (20A) having a pair of electrode pads (22a, 22b) with an inter-electrode pitch L1 therebetween (L2>L1). Standard position indication marks (23) are formed on the circuit substrate (20A). When heating is performed under a state in which solder non-wetting of the left electrode pad (22a) occurs, the solder applied to the right electrode pad (22b) solder connects the right electrode pad (22b) and the connection terminal (12b), and the surface-mount component (10A) is attracted to the left and is offset or displaced from the standard position indication marks (23) by an offset dimension δ7. If the solder is applied to the left and right electrode pads (22a, 22b), there is no offset dimension.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to an electronic circuit device in which small surface-mount components are densely mounted on a circuit substrate using lead-free solder with deteriorated solder wettability and which is improved so as to prevent occurrence of soldering defects.

2. Description of the Related Art

In a solder connection between a connection terminal formed on a surface-mount component side and an electrode pad formed on a circuit substrate side, as the area of the electrode pad becomes smaller as the surface-mount component becomes smaller, it becomes more difficult for solder paste to be squeezed through openings in a metal mask onto the surface of the electrode pad, and a soldering defect may occur due to solder non-wetting phenomena on the electrode pad.

However, in the case of a small component in which the connection terminal is formed on aback surface of the surface-mount component to reduce the footprint thereof, it is difficult to detect the soldering defect.

With reference to FIG. 2 of Japanese Patent Application Laid-open No. 2002-353578 “SUBSTRATE FOR SURFACE-MOUNT COMPONENT AND METHOD OF MOUNTING THE SURFACE-MOUNT COMPONENT ON SUBSTRATE”, mounting position indication marks14indicating a normal mounting position A and misregistration indication marks15are formed at diagonal positions of a surface-mount component1mounted on a substrate11. The surface-mount component1is adapted to be solder joined through molten solder balls3under a state of being mounted on the substrate11and being positioned with respect to one of the misregistration indication marks15.

As a result, in the case of appropriate soldering, the surface-mount component1is normally moved to a position defined by the mounting position indication marks14by a self-alignment action. However, in the case of an unmolten solder material or insufficient wetting, the surface-mount component1does not move to the position defined by the mounting position indication marks14as the normal mounting position A, which can be visually detected.

Further, in FIG. 14 and paragraphs [0041] to [0043] of Japanese Patent Application Laid-open No. 2002-353578, there is disclosed that not the solder balls3(seeFIG. 2) but the cream solder16′ is applied to the surface-mount component1, the misregistration indication marks15are displaced by substantially a half of a diameter L1of a component-side electrode2, and the component-side electrodes2and substrate-side electrodes13may be formed substantially in the shape of a circle or in the shape of a polygon such as a rectangle.

A “method of mounting a surface-mount component” in Japanese Patent Application Laid-open No. 2002-353578 can detect whether or not there are soldering defects at many electrode portions due to, for example, unsatisfactory temperature control in soldering in a large surface-mount component having a large number of electrodes, but is not appropriate for detecting a soldering defect with regard to one electrode among a large number of electrodes.

Further, even if a case is assumed in which the concept given here is applied to a surface-mount component having a small number of electrodes, when solder non-wetting in which solder is not applied to one connection surface occurs, the self-alignment effect acting on other connection surfaces can move the surface-mount component to an appropriate mounting position (because the inter-electrode pitch is the same between the component side and the substrate side), and thus, there is a problem that the state cannot be detected as a failure.

Further, the surface-mount component is intentionally mounted at an offset or displaced position, and thus, when the self-alignment effect does not act satisfactorily, a state occurs in which the item is determined to be non-defective but the surface-mount component is not mounted at an ideal position. There is a problem of a potential deterioration over time.

SUMMARY OF THE INVENTION

It is accordingly an object of the present invention to provide an electronic circuit device including two to four connection terminals that are formed on a back surface of a surface-mount component and two to four electrode pads that are formed on a circuit substrate correspondingly thereto and adapted to be solder connected thereto, respectively, and being capable of detecting solder non-wetting state in which a solder material is not applied to a solder surface.

An electronic circuit device according to the present invention comprises: a plurality of electrode pads formed on a front surface of a circuit substrate; and a plurality of connection terminals formed as many as the plurality of electrode pads on a back surface of a surface-mount component, the plurality of electrode pads and the plurality of connection terminals being connected with heated solder, respectively, wherein the solder comprises lead-free solder having a lead content of 0.1% or less in mass ratio, wherein the plurality of connection terminals are not formed on a side end surface and on a front surface of the surface-mount component and are formed on the back surface of the surface-mount component to be opposed to the front surface of the circuit substrate, wherein a component mount surface which is the front surface of the circuit substrate has standard position indication marks formed thereon at least at diagonal positions of the surface-mount component, wherein the standard position indication marks indicate a contour position of the surface-mount component as a reference relative position where the plurality of connection terminals are mounted at central positions of the plurality of electrode pads, respectively, and wherein in order that, when a part of the solder applied to the plurality of electrode pads is lacked and solder non-wetting state of one of a pair of electrode pads among the plurality of electrode pads occurs, an actual contour position of the surface-mount component becomes different from the contour position indicated by the standard position indication marks, one of a horizontal inter-electrode pitch and a vertical inter-electrode pitch of the plurality of electrode pads is smaller than corresponding one of a horizontal inter-terminal pitch and a vertical inter-terminal pitch of the plurality of connection terminals.

As described above, in the electronic circuit device according to the present invention, the circuit substrate with the surface-mount component has the inter-electrode pitch on the substrate side that is smaller than the inter-terminal pitch of the surface-mount component having the plurality of back surface terminals, the circuit substrate and the surface-mount component being solder connected to each other, and the standard position indication marks are formed on the substrate surface at positions corresponding to a contour position of the surface-mount component.

Therefore, the electrode pads on the circuit substrate side are confined within a back surface position corresponding to the contour position of the surface-mount component to enable miniaturization design. On the other hand, an electrode area and a wiring pattern area connecting thereto become smaller to reduce the opening area of the metal mask having the openings for applying the solder therethrough. A problem arises that the possibility of solder non-wetting occurred due to a transfer failure of the solder increases.

However, in the occurrence of such solder non-wetting, at the time of performing the soldering, the mounted component is attracted from a non-wetted terminal side to a normal terminal side by the self-alignment effect, and the surface-mount component is to be settled at a position off the standard position indication marks. This can be determined by visual observation or by image recognition using an electronic camera to enable corrections of a defective item and removal of solder that remains in the openings in the metal mask in a clogging state.

Therefore, it is effective that a small circuit substrate can be obtained and can be put to practical use, which is designed to have a high density without an outflow of a defective item by using lead-free solder with deteriorated solder wettability.

Further, the following effects are obtained. When solder non-wetting state does not occur but the mounting position of the surface-mount component varies, the surface-mount component is moved to the standard position by the self-alignment effect. The connection terminals are not formed on the end surfaces of the side portions of the surface-mount component. Thus, occurrence of a rise phenomenon thereof can be prevented. When the movement to the standard position does not occur or abnormal rise of the surface-mount component occurs even if solder non-wetting state does not occur, the surface-mount component after the solder is heated is at a position off the standard position indication mark, which can be determined by visual observation or by image recognition using an electronic camera to enable prevention of an outflow of a defective item.

DETAILED DESCRIPTION OF THE EMBODIMENTS

(1) Detailed Description of Structure

The structure of an electronic circuit device according to Embodiment 1 of the present invention will be described below with reference toFIG. 1as a back view of a surface-mount component according to Embodiment 1 of the present invention,FIG. 2as a plan view of a circuit substrate according to Embodiment 1 of the present invention, andFIG. 3as a sectional view of the circuit substrate taken along the line III-III ofFIG. 2.

First, with reference toFIG. 1, a surface-mount component10A is formed by, for example, arranging a power diode on a rectangular ceramic substrate (not shown) and applying a cladding material11as a moisture-proof coating material. As illustrated inFIG. 1, a pair of rectangular connection terminals12aand12bare exposed on a back surface of the surface-mount component10A with an inter-terminal pitch L2between center lines thereof.

Next, with reference toFIG. 2, a pair of electrode pads22aand22bare arranged on a front surface of a circuit substrate20A housed in a housing (not shown) with an inter-electrode pitch L1between center lines thereof. The electrode pads22aand22bform ends of copper foil patterns26aand26b, respectively, that will be described below with reference toFIG. 3, and other ends of the copper foil patterns26aand26bare adapted to be connected to other circuit components (not shown) that are mounted on the circuit substrate20A.

An entire area resist film25is applied to substantially an entire surface of a base surface21of the circuit substrate20A. Solder resist films24aand24bas part of the entire area resist film25are applied to portions around contours of the electrode pads22aand22band surfaces of the copper foil patterns26aand26b, respectively, so that solder does not attach thereto.

The entire area resist film25and the solder resist films24aand24bare illustrated as separate elements for the sake of convenience of illustration in the drawings, but are, in reality, the same thing formed of the same material without distinction, and are applied to the front surface of the circuit substrate20A in the same step.

Further, standard position indication marks23formed on the front surface of the circuit substrate20A indicate a reference mounting position of the surface-mount component10A. The base surface is exposed in the shape of hooks at positions corresponding to four corners of the surface-mount component10A, and can be visually observed as the standard position indication marks23against the entire area resist film25of a different color.

Besides, the standard position indication marks23may be, for example, formed by silk printing in white in the shape of hooks.

Next, with reference toFIG. 3as a sectional view taken along the line III-III ofFIG. 2, the pair of electrode pads22aand22bconnecting to the copper foil patterns26aand26b, respectively, are formed by etching on the front surface of the circuit substrate20A of, for example, a glass epoxy material.

Further, the solder resist films24aand24bcover the portions around the contours of the pair of electrode pads22aand22band the surfaces of the copper foil patterns26aand26b, respectively, and contour center portions of the pair of electrode pads22aand22bform exposed surfaces.

A metal mask30is mounted on the front surface of the circuit substrate20A having the solder resist films24aand24bapplied thereto. The metal mask30has openings30aand30bformed therein at positions opposed to the contour center portions of the pair of electrode pads22aand22b, respectively.

When solder material paste is squeezed with a squeegee (spatula) from an outer surface side of the metal mask30, the solder material is applied into the openings30aand30b. The volume of the applied solder material at this time corresponds to a product of a depth dimension, which is the sum of the thickness dimension of the metal mask30and the thickness dimension of the solder resist films24aand24b, and the areas of the openings30aand30b, that is, the areas of the exposed portions of the electrode pads22aand22b.

Next, description will be made with reference toFIG. 4as a sectional view of the electronic circuit device in a normal case according to Embodiment 1 of the present invention, andFIG. 5as a sectional view similar toFIG. 4of the electronic circuit device in a case of a soldering defect.

With reference toFIG. 4, the surface-mount component10A is mounted on the circuit substrate20A at an appropriate position. Through heating of solders31aand31bapplied to the electrode pads22aand22b, respectively, inFIG. 3, the surface-mount component10A and the circuit substrate20A are integrated to form an electronic circuit device100A.

The solders31aand31bare illustrated as being in a state of cooled and solidified after being heated and molten. The solders applied to the entire exposed surfaces of the electrode pads22aand22bare spread over entire surfaces of the offset connection terminals12aand12b, respectively.

At this time, a sum W of an overlapping dimension L3, which is the width of portions at which the left and right electrode pads22aand22bas well as the left and right connection terminals12aand12bmutually overlap, and a non-overlapping dimension L4, which is the width of non-overlapping portions, that is, L3+L4, is equal to a width W of the connection terminals12aand12b.

Therefore, the relationship of L3=(L2−L1)/2 holds, where L3is the overlapping dimension. As design values, the overlapping dimension L3and the non-overlapping dimension L4are equal to each other, and all of the width W=L3+L4of the connection terminals12aand12band the width W of the electrode pads22aand22bare of the same value.

FIG. 5is a sectional view of the electronic circuit device100A in a case in which heat processing is performed under a state in which the solder material is applied to the right electrode pad22b, but is not applied to the left electrode pad22a. In this case, by a self-alignment action due to surface tension acting on the molten solder, a center position of the right electrode pad22band a center position of the connection terminal12bare spatially coincident with each other. As a result, a connected position of the surface-mount component10A after the soldering is moved to the left with respect to the position defined by the standard position indication marks23, with an offset dimension δ of W/2, where W is the electrode width of the electrode pad22b.

(2) Detailed Description of Operation

Next, local action of soldering of the electronic circuit device100A structured as illustrated inFIG. 4will be described in detail with reference toFIG. 6A,FIG. 6B,FIG. 7A, andFIG. 7B.

FIG. 6Ais a plan view in phantom before soldering of the electronic circuit device illustrated inFIG. 4, where parts are defectively set;FIG. 6Bis a plan view in phantom after soldering of the electronic circuit device inFIG. 6A;FIG. 7Ais a plan view in phantom before soldering of the electronic circuit device in solder non-wetting state inFIG. 5, where parts are normally set; andFIG. 7Bis a plan view in phantom after soldering of the electronic circuit device inFIG. 7A.

First, as a process of fabricating the electronic circuit device100A, as illustrated inFIG. 3, the metal mask30is mounted on the circuit substrate20A illustrated inFIG. 2, and the solder material paste is squeezed and applied through the openings30aand30b. Then, under a state in which the metal mask30is removed, the surface-mount component10A illustrated inFIG. 1and other circuit components (not shown) are mounted on the circuit substrate20A. After that, the entire circuit substrate20A with the components mounted thereon is preheated, heated, and cooled to make solder connection.

FIG. 6Ais an illustration of a state in which the solder material is correctly applied to the left and right electrode pads22aand22b, the mounting position of the surface-mount component10A has an error, and the surface-mount component10A is mounted at a position that is offset or displaced to the left from the standard position indication marks23by an offset dimension δ6that is smaller than W/2.

Therefore, the overlapping dimension between the right electrode pad22band the connection terminal12bis close to a maximum value, and the overlapping dimension between the left electrode pad22aand the connection terminal12ais close to a minimum value.

FIG. 6Bis an illustration of a state after heat processing of the entire circuit substrate20A in the state illustrated inFIG. 6Ais performed. Surface tension of the solder material that is applied to the left and right electrode pads22aand22bmoves the surface-mount component10A to the right and settles the surface-mount component10A at the predetermined position defined by the standard position indication marks23.

As described above, for movement toward the center by the self-alignment effect, it is important that, when the overlapping dimension of one electrode portion is at the maximum, at least a minimum overlapping dimension is left for the another electrode portion.

FIG. 7Ais an illustration of a state in which, although the surface-mount component10A is mounted at an appropriate position on the circuit substrate20A, the solder is not applied to the left electrode pad22a, but is applied only to the right electrode pad22b.

FIG. 7Bis an illustration of a state after heat processing of the entire circuit substrate20A in the state illustrated inFIG. 7Ais performed. Surface tension of the solder material that is applied to the right electrode pad22bmoves the surface-mount component10A to the left, and the surface-mount component10A is offset from the predetermined position defined by the standard position indication marks23by an offset dimension δ7that is equal to W/2.

With regard to the offset dimension δ7, whether or not there is abnormality can be determined by visual observation or by display analysis of an image taken by an electronic camera (not shown). This enables monitoring of the state of solder connection on the back surface side of the surface-mount component10A that cannot be visually observed.

The connection terminals12aand12bare formed on the back surface of the surface-mount component10A and are not extended to end surfaces of side portions thereof, and thus, even if the component is mounted at a position to lack in balance, a rise phenomenon (also popularly known as Manhattan phenomenon or tombstone phenomenon) of the mounted component is less liable to occur.

Further, each of the electrode pads22aand22bis in the shape of a modified narrow rectangle, and has a longitudinal dimension (vertical dimension inFIG. 6A) that is larger than the electrode width (horizontal dimension inFIG. 6A). Thus, compared with a case in which circular electrodes are used, a sideways slide or a roll between the solder material and the connection terminals is less liable to occur to stabilize the mounting position of the surface-mount component10A.

The same applies to Embodiments 2 and 3 of the present invention. In Embodiments 2 and 3, even though circular electrode pads are used, a plurality of electrode pads as a whole support the surface-mount component with stability.

(3) Gist and Features of Embodiment 1

As apparent from the above description, the electronic circuit device according to Embodiment 1 of the present invention is the electronic circuit device100A, including:

the plurality of electrode pads22aand22bformed on the front surface of the circuit substrate20A; and

the plurality of connection terminals12aand12bformed as many as the plurality of electrode pads22aand22bon the back surface of the surface-mount component10A,

the plurality of electrode pads22aand22band the plurality of connection terminals12aand12bbeing connected with heated solders31aand31b, respectively,

in which the solders31aand31bare lead-free solder having a lead content of 0.1% or less in mass ratio,

in which the plurality of connection terminals12aand12bare not formed on the end surface of the side portion and on the front surface of the surface-mount component10A and are formed on the back surface of the surface-mount component10A to be opposed to the front surface of the circuit substrate20A,

in which a component mount surface which is the front surface of the circuit substrate20A has the standard position indication marks23formed thereon at least at diagonal positions of the surface-mount component10A,

in which the standard position indication marks23indicate a contour position of the surface-mount component10A at a reference relative position where the plurality of connection terminals12aand12bare mounted at central positions of the plurality of electrode pads22aand22b, respectively, and

in which in order that when a part of the solders31aand31bapplied to the plurality of electrode pads22aand22bis lacked and solder non-wetting state of one of a pair of electrode pads among the plurality of electrode pads22aand22boccurs, an actual contour position of the surface-mount component10A becomes different from the contour position indicated by the standard position indication marks23, a horizontal inter-electrode pitch L1of the plurality of electrode pads22aand22bis smaller than a horizontal inter-terminal pitch L2of the plurality of connection terminals12aand12b.

When the surface-mount component10A is mounted at the reference relative position, the overlapping dimension L3that is a width of portions at which the plurality of electrode pads22aand22band the plurality of connection terminals12aand12bmutually overlap, is equal to or larger than at least the thickness dimension of the plurality of electrode pads22aand22b, and the non-overlapping dimension L4that is a width of portions at which the plurality of electrode pads22aand22band the plurality of offset connection terminals12aand12bdo not mutually overlap, is larger than a minimum indication line width of the standard position indication marks23capable of being visually recognized.

The overlapping dimension L3is a requirement for the solders31aand31bapplied to the plurality of electrode pads22aand22bto be connected to the plurality of connection terminals12aand12band to be molten and spread on surfaces of the plurality of connection terminals12aand12b.

The non-overlapping dimension L4is a maximum dimension by which the surface-mount component10A moves toward the center by the self-alignment effect when the solder non-wetting occurs.

As described above, with reference to claim2of the present invention, when the surface-mount component is mounted at the normal position on the circuit substrate and normal soldering is performed, the overlapping dimension between the electrode pad and the connection terminal is equal to or larger than the thickness dimension of the electrode pad, and the non-overlapping dimension that is the dimension of movement toward the center in the case of solder non-wetting is equal to or larger than the minimum indication line width of the standard position indication marks.

The sum of the overlapping dimension and the non-overlapping dimension equals to the width of the connection terminal. If the overlapping dimension is excessively large, the non-overlapping dimension becomes excessively small. When solder non-wetting occurs, the force toward the center caused by the self-alignment effect reduces to disable detection of the failure. Even if movement toward the center is caused due to the failure, the dimension of the movement is excessively small, which makes the determination by visual observation difficult.

On the other hand, if the overlapping dimension is excessively small, the strength of the integration of the surface-mount component and the circuit substrate is reduced. Taking into consideration the variation in dimensions when mounting the surface-mount component, it is appropriate that, in reality, the overlapping dimension and the non-overlapping dimension be substantially the same.

By setting the inter-electrode pitch and the inter-terminal pitch to be predetermined values corresponding to the dimension of the electrode pads, an appropriate overlapping dimension is secured, and still, self-alignment action sufficient for detection of solder non-wetting can be obtained.

The same applies to Embodiments 2 and 3 described below.

Non-solder regions of the plurality of electrode pads22aand22band the copper foil patterns26aand26bconnected to the plurality of electrode pads are covered with the solder resist films24aand24bas part of the entire area resist film25for an entire area of the front surface of the circuit substrate.

The entire area resist film25forming the solder resist films24aand24bis in a color that is different from a color of the base surface21of the circuit substrate20A.

The standard position indication marks23are formed by leaving the entire area resist film25unapplied and exposing part of the base surface21in the shape of hooks, or printing, on the applied entire area resist film25, white hooks of a color different from the color of the entire area resist film.

As described above, with reference to claim3,13of the present invention, the solder resist material applied to the non-soldered regions of the electrode pads and the copper foil patterns for wiring is of a color different from that of the base of the circuit substrate. The standard position indication marks are formed by leaving the solder resist material unapplied in the shape of hooks or by printing white hooks on the applied solder resist material.

In the case of exposing the base surface, the standard position indication marks can be formed easily, and there is no risk that the thin standard position indication marks peel off.

In the case of silk printing in white, image recognition using an electronic camera is easy.

The same applies to Embodiments 2 and 3 described below.

The surface-mount component10A includes, on the back surface thereof, the pair of connection terminals12aand12bformed in the shape of a rectangle and arranged in parallel with each other.

The circuit substrate20A includes, on the front surface thereof, the pair of electrode pads22aand22bformed in the shape of a rectangle or a modified narrow rectangle with end portions thereof being rounded or chamfered, and arranged in parallel with each other.

The solder resist films24aand24bas part of the entire area resist film25are applied around the pair of electrode pads24aand22b.

The openings30aand30bin the metal mask30for squeezing and applying the solders31aand31bto the surface of the pair of electrode pads22aand22bare opposed to an entire area of exposed portions of the pair of electrode pads22aand22bwithout the solder resist films24aand24bapplied thereto.

The thickness dimension of the metal mask30is larger than the thickness dimension of the solder resist films24aand24b. When the squeezed solders31aand31bare molten, the thickness dimension of the solder material is reduced to a predetermined value and the solder material spreads on entire surfaces of the pair of connection terminals12aand12b, the predetermined value being larger than the thickness dimension of the solder resist films24aand24b.

As described above, with reference to claim4,14of the present invention, each of the connection terminals of the two-terminal surface-mount component is in the shape of a rectangle, and each of the electrode pads of the circuit substrate corresponding thereto is in the shape of a modified narrow rectangle. The solder resist film is formed between the pair of electrode pads. The openings in the metal mask are of the same dimension as that of the exposed surfaces of the electrode pads, and the molten solder is adapted to spread on the entire surfaces of the connection terminals.

Therefore, the molten solder goes around onto offset portions at which the electrode pads and the connection terminals do not mutually overlap, which can extend electrical connection surfaces between the electrode pads and the connection terminals, respectively.

The surface-mount component10A is a heat-generating component, which principally includes one power diode, which is formed on a silicon substrate having a plane area of 1 mm2to 4 mm2, and which includes the moisture-proof protective film as the cladding material11.

The ratio L4/L3between the overlapping dimension L3, which is a width of portions at which exposed portions of the plurality of electrode pads22aand22bwithout the solder resist films24aand24bapplied thereto and the plurality of connection terminals12aand12bat the reference relative position mutually overlap, and the non-overlapping dimension L4of the plurality of connection terminals12aand12bis from 1.1 to 0.9.

As described above, with reference to claims8-12,18-22of the present invention, the surface-mount component is a small heat-generating component that is not encapsulated in resin, and the overlapping dimensions and the non-overlapping dimensions between the connection terminals and the electrode pads, respectively, are substantially the same.

Therefore, the electrode pads are formed using the back surface of the surface-mount component, and both the overlapping dimensions for securing the strength of the solder connection and the dimensions of movement toward the center in the case of solder non-wetting can be secured.

Further, heat generated by the surface-mount component is transferred from the connection terminals thereof to the electrode pads efficiently. The heat can be dissipated by transfer from the circuit substrate to the housing, and the heat can also be dissipated by radiation via the moisture-proof protective film into the housing.

(1) Detailed Description of Structure

The structure of an electronic circuit device according to Embodiment 2 of the present invention will be described below with reference toFIG. 8as a back view of a surface-mount component according to Embodiment 2 of the present invention,FIG. 9as a plan view of a circuit substrate according to Embodiment 2 of the present invention, andFIG. 10as a sectional view of the circuit substrate taken along the line X-X ofFIG. 9.

An electronic circuit device100B according to Embodiment 2 is different from the electronic circuit device100A according to Embodiment 1 mainly in that the electronic circuit device100B is of a four-circular-terminal type and includes four connection terminals12ato12dand four electrode pads22ato22d, and like reference symbols are used to designate like or corresponding members throughout the figures.

First, with reference toFIG. 8, the surface-mount component10B is formed by, for example, arranging a power transistor and components relating to a gate circuit section of the transistor on a rectangular ceramic substrate (not shown) and applying the cladding material11as a moisture-proof coating material. Two pairs of circular connection terminals12aand12b, as well as12cand12dare exposed on the back surface of the surface-mount component10B with inter-terminal pitches L2xand L2ybetween center lines thereof.

Reference symbol L2xis an inter-terminal pitch along a horizontal axis, and reference symbol L2yis an inter-terminal pitch along a vertical axis.

Next, with reference toFIG. 9, two pairs of circular electrode pads22aand22b, and22cand22dare arranged on a front surface of a circuit substrate20A housed in the housing (not shown) with inter-electrode pitches L1xand L1ybetween center lines thereof. The electrode pads22ato22dform ends of copper foil patterns26ato26d, respectively, that will be described below with reference toFIG. 10(the copper foil patterns26cand26dare not shown), and other ends of the copper foil patterns26aand26bare adapted to be connected to other circuit components (not shown) that are mounted on the circuit substrate20B.

Reference symbol L1xis an inter-electrode pitch along a horizontal axis, and reference symbol L1yis an inter-electrode pitch along a vertical axis.

The entire area resist film25is applied to substantially the entire surface of the base surface21of the circuit substrate20B. Solder resist films24ato24das part of the entire area resist film25are applied to portions around contours of the electrode pads24ato24dand surfaces of the copper foil patterns26ato26d, respectively, so that solder does not attach thereto.

The entire area resist film25and the solder resist films24ato24dare illustrated as separate elements for the sake of convenience of illustration in the drawings, but are, in reality, the same thing formed of the same material without distinction, and are applied to the front surface of the circuit substrate20B in the same step.

Further, the standard position indication marks23formed on the front surface of the circuit substrate20B indicate a reference mounting position of the surface-mount component10B. The base surface is exposed in the shape of hooks at positions corresponding to four corners of the surface-mount component10B, and can be visually observed as the standard position indication marks23against the entire area resist film25of a different color.

Besides, the standard position indication marks23may be, for example, formed by silk printing in white in the shape of hooks.

Next, with reference toFIG. 10as a sectional view taken along the line X-X ofFIG. 9, the two pairs of electrode pads24ato24dconnecting to the copper foil patterns26ato26d, respectively, are formed by etching on the front surface of the circuit substrate20B of, for example, a glass epoxy material.

Further, the solder resist films24ato24dcover the portions around the contours of the two pairs of electrode pads22ato22dand the surfaces of the copper foil patterns26ato26d, respectively, and contour center portions of the two pairs of electrode pads22ato22dare exposed surfaces.

The metal mask30is mounted on the front surface of the circuit substrate20B having the solder resist films24ato24dapplied thereto. The metal mask30has openings30ato30d(the openings30cand30dare not shown) formed therein at positions opposed to the contour center portions of the two pairs of electrode pads22ato22d, respectively.

When solder material paste is squeezed with a squeegee (spatula) from the outer surface side of the metal mask30, the solder material is applied into the openings30ato30d. The volume of the applied solder material at this time corresponds to a product of a depth dimension, which is the sum of the thickness dimension of the metal mask30and the thickness dimension of the solder resist films24ato24d, and the areas of the openings30ato30d, that is, the areas of the exposed portions of the electrode pads22ato22d.

Next, description is made with reference toFIG. 11as a sectional view of the electronic circuit device in a normal case according to Embodiment 2 of the present invention, andFIG. 12as a sectional view similar toFIG. 11of the electronic circuit device in a case of a soldering defect.

The sectional position ofFIG. 11corresponds to the sectional position taken along the line XI-XI ofFIG. 9.

With reference toFIG. 11, the surface-mount component10B is mounted on the circuit substrate20B at an appropriate position. Through heating of solders31ato31d(the solders31aand31bare not shown) applied to the electrode pads22ato22d, respectively, inFIG. 10, the surface-mount component10B and the circuit substrate20B are integrated to form the electronic circuit device100B.

The solders31ato31dare illustrated as being in a state of cooled and solidified after having been heated and molten. The solders applied over the entire exposed surfaces of the electrode pads22ato22dare spread on entire surfaces of the offset connection terminals12ato12d, respectively.

At this time, the sum W of the overlapping dimension L3, which is the width of portions at which the left and right electrode pads22aand22b, and22cand22dand the left and right connection terminals12aand12b, and12cand12dmutually overlap, and the non-overlapping dimension L4, which is the width of the non-overlapping portions, that is, L3+L4, is equal to a diameter D of the connection terminals12ato12d.

Therefore, the relationship of L3=(L2x−L1x)/2 holds, where L3is the overlapping dimension. As design values, the overlapping dimension L3and the non-overlapping dimension L4are equal to each other. All of the diameter D=L3+L4of the connection terminals12ato12dand the diameter D of the electrode pads22ato22dare of the same value.

FIG. 12is a sectional view of the electronic circuit device100B in a case in which heat processing is performed under a state in which the solder material is applied to the right electrode pads22band22d, but is not applied to the left electrode pads22aand22c. In this case, by a self-alignment action due to surface tension acting on the molten solder, a center position of each of the right electrode pads22band22dand a center position of each of the connection terminals12band12dare spatially coincident with each other As a result, a connected position of the surface-mount component10B after the soldering is moved to the left with respect to the position defined by the standard position indication marks23, with an offset dimension δ of D/2, where D is the diameter of the electrode pad22d.

(2) Detailed Description of Action

Next, local action of soldering of the electronic circuit device100B structured as illustrated inFIG. 11will be described in detail with reference toFIG. 13A,FIG. 13B,FIG. 14A, andFIG. 14B.

FIG. 13Ais a plan view in phantom in a first aspect before soldering of the electronic circuit device inFIG. 12, where one point of four points is in solder non-wetting state;FIG. 13Bis a plan view in phantom in a first aspect after soldering of the electronic circuit device inFIG. 12, where diagonal two points are in solder non-wetting state;FIG. 14Ais a plan view in phantom in a second aspect before soldering of the electronic circuit device inFIG. 12, where vertical two points are in solder non-wetting state; andFIG. 14Bis a plan view in phantom in a second aspect after soldering of the electronic circuit device inFIG. 12, where horizontal two points are in solder non-wetting state.

First, as a process of fabricating the electronic circuit device100B, as illustrated inFIG. 10, the metal mask30is mounted on the circuit substrate20B illustrated inFIG. 9, and the solder material paste is squeezed and applied through the openings30ato30d. Then, under a state in which the metal mask30is removed, the surface-mount component10B illustrated inFIG. 8and other circuit components (not shown) are mounted on the circuit substrate20B. After that, the entire circuit substrate20B with the components mounted thereon is preheated, heated, and cooled to make solder connection.

FIG. 13Ais an illustration of a state after solder connection is made with the surface-mount component10B being mounted at the standard position under a state in which solder non-wetting of the upper left electrode pad22aoccurs and the solder material is correctly applied to other electrode pads22bto22d.

In this case, the lower right connection terminal12dat the diagonal position is attracted to the electrode pad22dside. Thus, the surface-mount component10B is attracted toward the upper left corner and is offset from the standard position indication marks23by offset dimensions ε1and ε2.

FIG. 13Bis an illustration of a state before solder connection is made with the surface-mount component10B being mounted at the standard position under a state in which solder non-wetting state of the upper left electrode pad22aand the lower right electrode pad22don a rightwardly descending diagonal line22adoccurs and the solder material is correctly applied to the lower left electrode pad22cand the upper right electrode pad22bon a rightwardly ascending diagonal line22cb.

In this case, when the ratio L2x/L2ybetween the inter-terminal pitch L2xalong the horizontal axis and the inter-terminal pitch L2yalong the vertical axis inFIG. 8is set to be different from the ratio L1x/L1ybetween the inter-electrode pitch L1xalong the horizontal axis and the inter-electrode pitch L1yalong the vertical axis inFIG. 9, in a normal state, the lower left connection terminal12cand the electrode pad22c, and the upper right connection terminal12band the electrode pad22b, which are located on the rightwardly ascending diagonal lines12cband22cb, are not arranged on one straight line. If solder non-wetting of the electrode pads22aand22don the rightwardly descending diagonal line22adoccurs, the surface-mount component10B rotates and moves so that the lower left connection terminal12cand the electrode pad22c, and the upper right connection terminal12band the electrode pad22b, which are located on the rightwardly ascending diagonal lines12cband22cb, are arranged on one straight line to be settled at a position at which the straight line forms an offset tilt angle θ with a line connecting the standard position indication marks23at the lower left corner and the upper right corner.

FIG. 14Ais an illustration of a state after solder connection is made with the surface-mount component10B being mounted at an appropriate position on the circuit substrate20B under a state in which solder is not applied to the two left electrode pads22aand22c, but is applied only to the two right electrode pads22band22d.

In this case, the right connection terminals12band12dare attracted to the electrode pads12band12d, and thus, the surface-mount component10B is attracted to the left and is offset from the standard position indication marks23by an offset dimension δ14a.

FIG. 14Bis an illustration of a state after solder connection is made with the surface-mount component10B being mounted at an appropriate position on the circuit substrate20B under a state in which solder is not applied to the two lower electrode pads22cand22d, but is applied only to the two upper electrode pads22aand22b.

In this case, the upper connection terminals12aand12bare attracted to the electrode pads22aand22b, and thus, the surface-mount component10B is attracted downward and is offset from the standard position indication marks23by an offset dimension δ14b.

With regard to the offset dimensions ε1and ε2, the offset tilt angle θ, and the offset dimensions δ14aand δ14billustrated inFIG. 13A,FIG. 13B,FIG. 14A, andFIG. 14B, whether or not there is abnormality is determined by visual observation or by display analysis of an image taken by an electronic camera (not shown). This enables monitoring of the state of solder connection on the back surface side of the surface-mount component10B that cannot be visually observed.

In the above description, the connection terminals12ato12dand the electrode pads22ato22dare in the shape of a circle, but the shape may be a polygon such as a hexagon or an octagon.

(3) Gist and Features of Embodiment 2

As apparent from the above description, the electronic circuit device according to Embodiment 2 of the present invention is the electronic circuit device100B, including:

the plurality of electrode pads22ato22dformed on the front surface of the circuit substrate20B; and

the plurality of connection terminals12ato12dformed as many as the plurality of electrode pads22ato22don the back surface of the surface-mount component10B,

the plurality of electrode pads22ato22dand the plurality of connection terminals12ato12dbeing connected with heated solders31ato31d, respectively,

in which the solders31ato31dare lead-free solder having a lead content of 0.1% or less in mass ratio,

in which the plurality of connection terminals12ato12dare not formed on the end surface of the side portion and on the front surface of the surface-mount component10B and are formed on the back surface of the surface-mount component10B to be opposed to the front surface of the circuit substrate20B,

in which the front surface of the circuit substrate20B serving as a component mount surface has the standard position indication marks23formed thereon at least at diagonal positions of the surface-mount component10B,

in which the standard position indication marks23indicate a contour position of the surface-mount component10B as a reference relative position where the plurality of connection terminals12ato12dare mounted at central positions of the plurality of electrode pads22ato22d, respectively, and

in which in order that when a part of the solders31ato31dapplied to the plurality of electrode pads22ato22dis lacked and solder non-wetting state of one of a pair of electrode pads among the plurality of electrode pads22ato22doccurs, an actual contour position of the surface-mount component10B becomes different from the contour position indicated by the standard position indication marks23, one of the horizontal inter-electrode pitch L1xand the vertical inter-electrode pitch L1yof the plurality of electrode pads22ato22dis smaller than corresponding one of the horizontal inter-terminal pitch L2xand the vertical inter-terminal pitch L2yof the plurality of connection terminals12ato12d.

When the surface-mount component10B is mounted at the reference relative position, the overlapping dimension L3that is a width of portions at which the plurality of electrode pads22ato22dand the plurality of connection terminals12ato12dmutually overlap, is equal to or larger than at least the thickness dimension of the plurality of electrode pads22ato22d. The non-overlapping dimension L4that is a width of portions at which the plurality of electrode pads22ato22dand the plurality of offset connection terminals12ato12ddo not mutually overlap, is larger than a minimum indication line width of the standard position indication marks23capable of being visually recognized.

The overlapping dimension L3is a requirement for the solders31ato31dapplied to the plurality of electrode pads22ato22dto be connected to the plurality of connection terminals12ato12dand to be molten and spread on surfaces of the plurality of connection terminals12ato12d.

The non-overlapping dimension L4is a maximum dimension by which the surface-mount component10B moves toward the center by the self-alignment effect when the solder non-wetting occurs.

Non-solder regions of the plurality of electrode pads22ato22dand the copper foil patterns26ato26dconnected to the plurality of electrode pads are covered with solder resist films24ato24das part of the entire area resist film25for an entire area of the front surface of the circuit substrate.

The entire area resist film25forming the solder resist films24ato24dis in a color that is different from a color of the base surface21of the circuit substrate20B.

The standard position indication marks23are formed by leaving the entire area resist film25unapplied and exposing part of the base surface21in the shape of hooks, or printing, on the applied entire area resist film25, white hooks of a color different from the color of the entire area resist film.

The surface-mount component10B includes, on the back surface thereof, the two pairs of connection terminals12ato12dformed in the shape of a circle or a polygon, and arranged at vertices of a rectangle.

The circuit substrate20B includes, on the front surface thereof, the two pairs of electrode pads22ato22dformed in the shape of a circle or a polygon, and arranged at vertices of a rectangle.

The solder resist films24ato24das a part of the entire area resist film25are applied around the two pairs of electrode pads22ato22d.

The openings30ato30din the metal mask30for squeezing and applying the solders31ato31dto the surfaces of the two pairs of electrode pads22ato22dare opposed to an entire area of exposed portions of the two pairs of electrode pads22ato22dwithout the solder resist films24ato24dbeing applied thereto.

The thickness dimension of the metal mask30is larger than the thickness dimension of the solder resist films24ato24d. When the squeezed solders31ato31dare molten, the thickness dimension of the solder material is reduced to a predetermined value and the solder material spreads on entire surfaces of the two pairs of connection terminals12ato12d, the predetermined value being larger than the thickness dimension of the solder resist films24ato24d.

As described above, with reference to claim5,15of the present invention, each of the connection terminals of the four-terminal surface-mount component and each of the electrode pads of the circuit substrate corresponding thereto has a shape of circle. The solder resist films are formed between the two pairs of electrode pads. While the openings in the metal mask are of the same dimension as that of the exposed surfaces of the electrode pads, the molten solder is adapted to spread on the entire surfaces of the connection terminals.

Therefore, the molten solder goes around onto offset or displaced portions at which the electrode pads and the connection terminals do not mutually overlap, which can extend electrical connection surfaces between the electrode pads and the connection terminals, respectively.

In the two pairs of electrode pads22ato22d, the inter-electrode pitch L1xbetween a pair of electrode pads22aand22barranged along the horizontal axis and the inter-electrode pitch L1xbetween remaining another pair of electrode pads22cand22dare the same, and the inter-electrode pitch L1ybetween a pair of electrode pads22aand22carranged along the vertical axis and the inter-electrode pitch L1ybetween remaining another pair of electrode pads22band22dare the same.

In the two pairs of connection terminals12ato12d, the inter-terminal pitch L2xbetween a pair of connection terminals12aand12barranged along the horizontal axis and the inter-terminal pitch L2xbetween remaining another pair of connection terminals12cand12dare the same, and the inter-terminal pitch L2ybetween a pair of connection terminals12aand12carranged along the vertical axis and the inter-terminal pitch L2ybetween remaining another pair of connection terminals12band12dare the same.

The horizontal inter-electrode pitch L1xand the vertical inter-electrode pitch L1yin a pair are smaller than the horizontal inter-terminal pitch L2xand the vertical inter-terminal pitch L2yin a pair, respectively. A ratio L1x/L1ybetween the horizontal inter-electrode pitch L1xand the vertical inter-electrode pitch L1yand a ratio L2x/L2ybetween the horizontal inter-terminal pitch L2xand the vertical inter-terminal pitch L2yare set to have different values, so that when a part of the solders31ato31dapplied to the plurality of electrode pads22ato22dis lacked and solder non-wetting state of an electrode pad occurs, an actual contour position of the surface-mount component10B becomes different from the contour position indicated by the standard position indication marks23.

As described above, with reference to claim6,16of the present invention, by setting the horizontal inter-electrode pitch L1xand the vertical inter-electrode pitch L1yin a pair with regard to the four-terminal surface-mount component to be smaller than the horizontal inter-terminal pitch L2xand the vertical inter-terminal pitch L2yin a pair, respectively, when solder non-wetting of one, two along the horizontal axis, or two along the vertical axis of the four electrode pads occurs, the solder non-wetting state is detected by the contour position of the surface-mount component after the solder connection that is different from the position of the standard position indication marks. Further, by setting the aspect ratio of the inter-electrode pitches and the aspect ratio of the inter-terminal pitches so as to be different from each other, when a solder non-wetting state of a pair of electrode pads along a diagonal line occurs, the diagonal line passing through the electrode pads and the diagonal line passing through the connection terminals to which solder is attached are spatially coincident with each other, and the tilt angle is formed by the connected position of the surface-mount component. This state can be detected by comparison with the relative position with respect to the standard position indication marks.

Therefore, the scheme of arranging the electrode pads and the connection terminals enables the detection of various kinds of solder non-wetting.

The surface-mount component10B is a heat-generating component, which principally includes two power transistors, which is formed on a silicon substrate having a plane area of 1 mm2to 4 mm2, and which includes a moisture-proof protective film as the cladding material11.

The ratio L4/L3between the overlapping dimension L3, which is a width of portions at which exposed portions of the plurality of electrode pads22ato22dwithout the solder resist films24ato24dapplied thereto and the plurality of connection terminals12ato12dat the reference relative position mutually overlap, and the non-overlapping dimension L4of the plurality of connection terminals12ato12dis from 1.1 to 0.9.

As described above, with reference to claims8-12,18-22of the present invention, the surface-mount component is a small heat-generating component that is not encapsulated in resin, and the overlapping dimensions and the non-overlapping dimensions between the connection terminals and the electrode pads, respectively, are substantially the same.

Therefore, the electrode pads are formed using the back surface of the surface-mount component, and both the overlapping dimensions for securing the strength of the solder connection and the dimensions of movement toward the center in the case of solder non-wetting can be secured.

Further, heat generated by the surface-mount component is transferred from the connection terminals thereof to the electrode pads efficiently. The heat can be dissipated by transfer from the circuit substrate to the housing, and the heat can also be dissipated by radiation via the moisture-proof protective film into the housing.

(1) Detailed Description of Structure and Action

A structure of an electronic circuit device according to Embodiment 3 of the present invention will be described below with reference toFIG. 15as a back view of a surface-mount component according to Embodiment 3 of the present invention,FIG. 16as a plan view of a circuit substrate according to Embodiment 3 of the present invention, andFIG. 17as a sectional view of the circuit substrate taken along the line XVII-XVII ofFIG. 16.

An electronic circuit device100C according to Embodiment 3 is different from the electronic circuit device100A according to Embodiment 1 mainly in that the electronic circuit device100C is of a mixed-three-terminal type and includes two circular connection terminals12aand12cand one oval connection terminal12e, and two circular electrode pads22aand22cand one oval electrode pad22ecorresponding thereto, respectively, where like reference symbols are used to designate like or corresponding members throughout the figures.

First, with reference toFIG. 15, a surface-mount component10C is formed by, for example, arranging a power transistor on a rectangular ceramic substrate (not shown) and applying the cladding material11as a moisture-proof coating material. The circular connection terminals12aand12cand the oval connection terminal12eare exposed on the back surface of the surface-mount component10C with inter-terminal pitches L2xand L2ybetween center lines thereof.

Reference symbol L2xis an inter-terminal pitch along a horizontal axis, and reference symbol L2yis an inter-terminal pitch along a vertical axis.

Next, with reference toFIG. 16, the circular electrode pads22aand22cand the oval electrode pad22eare arranged on a front surface of a circuit substrate20C housed in the housing (not shown) with inter-electrode pitches L1xand L1ybetween center lines thereof. The electrode pads22a,22c, and22eform ends of copper foil patterns26a,26c, and26e, respectively, that will be described below with reference toFIG. 17(the copper foil pattern26cis not shown). The other ends of the copper foil patterns26a,26c, and26eare adapted to be connected to other circuit components (not shown) that are mounted on the circuit substrate20C.

Reference symbol L1xis an inter-electrode pitch along a horizontal axis, and reference symbol L1yis an inter-electrode pitch along a vertical axis.

The entire area resist film25is applied to substantially the entire surface of the base surface21of the circuit substrate20C. Solder resist films24a,24c, and24eas a part of the entire area resist film25are applied to portions around contours of the electrode pads22a,22c, and22eand surfaces of the copper foil patterns26a,26c, and26e, respectively, so that solder does not attach thereto.

The entire area resist film25and the solder resist films24a,24c, and24eare illustrated as separate elements for the sake of convenience of illustration in the drawings, but are, in reality, the same thing formed of the same material without distinction, and are applied to the front surface of the circuit substrate20C in the same step.

Further, the standard position indication marks23formed on the front surface of the circuit substrate20C indicate a reference mounting position of the surface-mount component10C. The base surface is exposed in the shape of hooks at positions corresponding to four corners of the surface-mount component10C, and can be visually observed as the standard position indication marks23against the entire area resist film25of a different color.

Besides, the standard position indication marks23may be, for example, formed by silk printing in white in the shape of hooks.

Next, with reference toFIG. 17as a sectional view taken along the line XVII-XVII ofFIG. 16, the electrode pads22a,22c, and22econnecting to the copper foil patterns26a,26c, and26e, respectively, are formed by etching on the front surface of the circuit substrate20C of, for example, a glass epoxy material.

Further, the solder resist films24a,24c, and24ecover the portions around the contours of the electrode pads22a,22c, and22eand the surfaces of the copper foil patterns26a,26c, and26e, respectively, and contour center portions of the electrode pads22a,22c, and22eare exposed surfaces.

The metal mask30is mounted on the front surface of the circuit substrate20C having the solder resist films24a,24c, and24eapplied thereto. The metal mask30has openings30a,30c, and30e(the opening30cis not shown) formed therein at positions opposed to the contour center portions of the electrode pads22a,22c, and22e, respectively.

When solder material paste is squeezed with a squeegee (spatula) from the outer surface side of the metal mask30, the solder material is applied into the openings30a,30c, and30e. The volume of the applied solder material at this time corresponds to a product of a depth dimension, which is the sum of the thickness dimension of the metal mask30and the thickness dimension of the solder resist films24a,24c, and24eand the areas of the openings30a,30c, and30e, that is, the areas of the exposed portions of the electrode pads22a,22c, and22e.

Next, descriptions of the structure and action will be made with reference toFIG. 18as a sectional view of the electronic circuit device in a normal case according to Embodiment 3 of the present invention, andFIG. 19as a sectional view similar toFIG. 18of the electronic circuit device in a case of a soldering defect.

With reference toFIG. 18, the surface-mount component10C is mounted on the circuit substrate20C at an appropriate position. Through heating of solders31a,31c, and31e(the solder31cis not shown) applied to the electrode pads22a,22c, and22e, respectively, inFIG. 17, the surface-mount component10C and the circuit substrate20C are integrated to form the electronic circuit device100C.

The solders31a,31c, and31eare illustrated as being in a state of cooled and solidified after being heated and molten. The solders applied to the entire exposed surfaces of the electrode pads22a,22c, and22eare spread on entire surfaces of the offset connection terminals12a,12c, and12e, respectively.

At this time, a sum of the overlapping dimension L3, which is the width of portions at which the electrode pads22a,22c, and22eand the connection terminals12a,12c, and12emutually overlap, and the non-overlapping dimension L4, which is the width of the non-overlapping portions, that is, L3+L4, is equal to a diameter D or a width W of the connection terminals12a,12c, and12e.

Therefore, the relationship of L3=(L2x−L1x)/2 holds, where L3is the overlapping dimension. As design values, the overlapping dimension L3and the non-overlapping dimension L4are equal to each other, and the diameter D=L3+L4of the connection terminals12aand12cor the width W=L3+L4of the connection terminal12e, and the diameter D or the width W of the electrode pads22a,22c, and22eare of the same value.

FIG. 19is a sectional view of the electronic circuit device100C in a case in which heat processing is performed under a state in which the solder material is applied to the right electrode pad22e, but is not applied to the left electrode pads22aand22c. In this case, by a self-alignment action due to surface tension acting on the molten solder, a center position of the right electrode pad22eand a center position of the connection terminal12eare spatially coincident with each other, and, as a result, a connected position of the surface-mount component10C after the soldering is moved to the left with respect to the position defined by the standard position indication marks23, with an offset dimension δ of W/2, where W is the electrode width of the electrode pad22e.

If solder non-wetting state of the right electrode pad22eoccurs and solder is applied to the left electrode pads22aand22c, after the solder connection, the connection terminals12aand12care attracted to the electrode pads22aand22c, respectively, the surface-mount component10C moves to the right, and the offset dimension δ thereof is D/2, where D is the electrode diameter of the electrode pads22aand22c.

If solder non-wetting state of any one of the left electrode pads22aand22coccurs, after the solder connection, one of the connection terminal12aand the connection terminal12cis attracted to the corresponding one of the electrode pad22aand the electrode pad22c, the surface-mount component10C is rotated, and the offset tilt angle is formed.

With regard to the offset dimension and the offset tilt angle, whether or not there is abnormality is determined by visual observation or by display analysis of an image taken by an electronic camera (not shown). This enables monitoring of the state of solder connection on the back surface side of the surface-mount component10C that cannot be visually observed.

Meanwhile, in the case of lead-free solder, there is a problem in that the melting temperature of the solder becomes higher and the electrode pads are more liable to peel off, and overcoating outer peripheral portions of the electrode pads with a solder resist film is an effective measure thereagainst.

However, overcoating the outer peripheral portions of the electrode pads having a very small area reduces an effective area of solder connection surfaces.

To minimize this area reduction rate, a circular electrode pad that has a shorter circumference for the same area is advantageous over a rectangular electrode pad.

Specifically, when, for example, a circular electrode having a diameter D1is used for the purpose of obtaining an electrode area S, a circumference L1thereof is calculated by the following Expression 1:
π×D1×D1/4=S, ∴D1=2√(S/π),L1=π×D1=2×√(S×π)  (Expression 1)

When a square electrode having a side length D2is used for the purpose of obtaining the same electrode area S, a circumference L2thereof is calculated by the following Expression 2:
D2×D2=S, ∴D2=√(S),L2=4×D2=4×√(S)  (Expression 2)
A ratio L1/L2of the circumferences is √(π)/2=0.886, which indicates that the circular electrode is advantageous.

In the above description, the connection terminals12aand12cand the electrode pads22aand22care in the shape of a circle, but the shape may be a polygon such as a hexagon or an octagon.

The same applies to the electrode pads22ato22din Embodiment 2.

(2) Gist and Features of Embodiment 3

As apparent from the above description, the electronic circuit device according to Embodiment 3 of the present invention is the electronic circuit device100C, including:

the plurality of electrode pads22a,22c, and22eformed on the front surface of the circuit substrate20C; and

the plurality of connection terminals12a,12c, and12eformed as many as the plurality of electrode pads22a,22c, and22eon the back surface of the surface-mount component10A,10B, or10C,

the plurality of electrode pads22a,22c, and22eand the plurality of connection terminals12a,12c, and12ebeing connected with heated solders31a,31c, and31e, respectively,

in which the solders31a,31c, and31eare lead-free solder having a lead content of 0.1% or less in mass ratio,

in which the plurality of connection terminals12a,12c, and12eare not formed on the end surface of the side portion and on the front surface of the surface-mount component100and are formed only on the back surface of the surface-mount component100to be opposed to the front surface of the circuit substrate20C,

in which a component mount surface which is the front surface of the circuit substrate20C has the standard position indication marks23formed thereon at least at diagonal positions of the surface-mount component10C,

in which the standard position indication marks23indicate a contour position of the surface-mount component100as a reference relative position where the plurality of connection terminals12a,12c, and12eare mounted at central positions of the plurality of electrode pads22a,22c, and22e, respectively, and

in which in order that when a part of the solders31a,31c, and31eapplied to the plurality of electrode pads22a,22c, and22eis lacked and solder non-wetting state of one of a pair of electrode pads among the plurality of electrode pads22a,22c, and22eoccurs, an actual contour position of the surface-mount component100becomes different from the contour position indicated by the standard position indication marks23, one of the horizontal inter-electrode pitch L1xand the vertical inter-electrode pitch L1yof the plurality of electrode pads22a,22c, and22eis smaller than corresponding one of the horizontal inter-terminal pitch L2xand the vertical inter-terminal pitch L2yof the plurality of connection terminals12a,12c, and12e.

When the surface-mount component100is mounted at the reference relative position, the overlapping dimension L3that is a width of portions at which the plurality of electrode pads22a,22c, and22eand the plurality of connection terminals12a,12c, and12emutually overlap, is equal to or larger than at least the thickness dimension of the plurality of electrode pads22a,22c, and22e. The non-overlapping dimension L4that is a width of portions at which the plurality of electrode pads22a,22c, and22eand the plurality of offset connection terminals12a,12c, and12edo not mutually overlap, is larger than a minimum indication line width of the standard position indication marks23capable of being visually recognized.

The overlapping dimension L3is a requirement for the solders31a,31c, and31eapplied to the plurality of electrode pads22a,22c, and22eto be connected to the plurality of connection terminals12a,12c, and12eand to be molten and spread on surfaces of the plurality of connection terminals12a,12c, and12e.

The non-overlapping dimension L4is a maximum dimension by which the surface-mount component10C moves toward the center by the self-alignment effect when the solder non-wetting state occurs.

Non-solder regions of the plurality of electrode pads22a,22c, and22eand the copper foil patterns26a,26c, and26econnected to the plurality of electrode pads are covered with the solder resist films24a,24c, and24eas a part of the entire area resist film25over an entire area of the front surface of the circuit substrate.

The entire area resist film25forming the solder resist films24a,24c, and24eis in a color that is different from a color of the base surface21of the circuit substrate20C.

The standard position indication marks23are formed by leaving the entire area resist film25unapplied and exposing a part of the base surface21in the shape of hooks, or printing, on the applied entire area resist film25, white hooks of a color different from the color of the entire area resist film.

The surface-mount component10C includes, on the back surface thereof and in three directions, two connection terminals12aand12cformed in the shape of a circle or a polygon and one connection terminal12ebeing formed in the shape of a rectangle or an oval and having an area that is a sum of areas of the two connection terminals.

The circuit substrate20C includes, on the front surface thereof and in the three directions, two electrode pads22aand22cformed in the shape of a circle or a polygon and one electrode pad22ebeing formed in the shape of a rectangle or an oval and having an area that is a sum of areas of the two electrode pads.

The solder resist films24a,24c, and24eas a part of the entire area resist film25are around the plurality of electrode pads22a,22c, and22e.

The openings30a,30c, and30ein the metal mask30for squeezing and applying the solders31a,31c, and31eto the surfaces of the plurality of electrode pads22a,22c, and22eare opposed to an entire area of exposed portions of the plurality of electrode pads22a,22c, and22ewithout the solder resist films24a,24c, and24eapplied thereto.

The thickness dimension of the metal mask30is larger than the thickness dimension of the solder resist films24a,24c, and24e. When the squeezed solders31a,31c, and31eare molten, the thickness dimension of the solder material is reduced to a predetermined value and the solder material spreads on entire surfaces of the plurality of connection terminals12a,12c, and12e, where the predetermined value is larger than the thickness dimension of the solder resist films24a,24c, and24e.

As described above, with reference to claim7,17of the present invention, as the connection terminals of the three-terminal surface-mount component and the electrode pads corresponding thereto of the circuit substrate, circular ones and square or oval ones are used in combination. The solder resist film is formed at the center of the three electrode pads. The openings in the metal mask are of the same dimension as that of the exposed surfaces of the electrode pads, but the molten solder is adapted to spread on the entire surfaces of the connection terminals.

Therefore, the molten solder goes around onto offset portions at which the electrode pads and the connection terminals do not mutually overlap, which can extend electrical connection surfaces between the electrode pads and the connection terminals, respectively.

Further, by setting the area of one of the three electrode pads and one of the three connection terminals corresponding thereto so as to be equivalent to the sum of the areas of the remaining two electrode pads and the remaining two connection terminals corresponding thereto, the mounting position of the surface-mount component can be, when offset, returned toward the center by the self-alignment effect.

Further, when solder non-wetting state of, among the one large electrode pad and the two small electrode pads, either of the two small ones or only the large one occurs, similarly to the case of the two-terminal surface-mount component, misregistration from the standard position indication marks occurs when soldering is performed, thereby enabling detection of abnormality. When solder non-wetting state of only one of the two small electrode pads occurs, the surface-mount component is tilted to cause misregistration from the standard position indication marks when soldering is performed, thereby enabling detection of abnormality.

The surface-mount component10A,10B, or10C is a heat-generating component, which principally includes two power diodes or one power transistor, which is formed on a silicon substrate having a plane area of 1 mm2to 4 mm2, and which includes a moisture-proof protective film as the cladding material11.

The ratio L4/L3between the overlapping dimension L3, which is a width of portions at which exposed portions of the plurality of electrode pads22a,22c, and22ewithout the solder resist films24a,24c, and24eapplied thereto and the plurality of connection terminals12a,12c, and12eat the reference relative position mutually overlap, and the non-overlapping dimension L4of the plurality of connection terminals12a,12c, and12eis from 1.1 to 0.9.

As described above, with reference to claims8-12,18-22of the present invention, the surface-mount component is a small heat-generating component that is not encapsulated in resin, and the overlapping dimensions and the non-overlapping dimensions between the connection terminals and the electrode pads, respectively, are substantially the same.

Therefore, the electrode pads are formed using the back surface of the surface-mount component, and both the overlapping dimensions for securing the strength of the solder connection and the dimensions of movement toward the center in the case of solder non-wetting can be secured.

Further, heat generated by the surface-mount component is transferred from the connection terminals thereof to the electrode pads efficiently. The heat can be dissipated by transfer from the circuit substrate to the housing, and the heat can also be dissipated by radiation via the moisture-proof protective film into the housing.

Exemplary electronic components to be mounted include one power transistor, and two power diodes having one common terminal.