Power control system using a nonlinear delta-sigma modulator with nonlinear power conversion process modeling

A power control system includes a switching power converter and a power factor correction (PFC) and output voltage controller. The switching power converter utilizes a nonlinear energy transfer process to provide power to a load. The PFC and output voltage controller generates a control signal to control power factor correction and voltage regulation of the switching power converter. The PFC and output voltage controller includes a nonlinear delta-sigma modulator that models the nonlinear energy transfer process of the switching power converter. The nonlinear delta-sigma modulator generates an output signal used to determine the control signal. By using the nonlinear delta-sigma modulator in a control signal generation process, the PFC and output voltage controller generates a spectrally noise shaped control signal. In at least one embodiment, noise shaping of the control signal improves power factor correction and output voltage regulation relative to conventional systems.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates in general to the field of signal processing, and, more specifically, to a power control system that includes a nonlinear delta-sigma modulator with nonlinear power conversion process modeling.

2. Description of the Related Art

Many electronic systems utilize nonlinear processes to generate output signals. For example, plant systems, such as servo control systems and power conversion systems, often utilize nonlinear processes. Power control systems often utilize a switching power converter to convert alternating current (AC) voltages to direct current (DC) voltages or DC-to-DC. Switching power converters often includes a nonlinear energy transfer process to provide power factor corrected energy to a load. Power control systems provide power factor corrected and regulated output voltages to many devices that utilize a regulated output voltage.

FIG. 1represents a power control system100, which includes a switching power converter102. Voltage source101supplies an alternating current (AC) input voltage Vin(t) to a full, diode bridge rectifier103. The voltage source101is, for example, a public utility, and the AC voltage Vin(t) is, for example, a 60 Hz/110 V line voltage in the United States of America or a 50 Hz/220 V line voltage in Europe. The rectifier103rectifies the input voltage Vin(t) and supplies a rectified, time-varying, line input voltage Vx(t) to the switching power converter.

The switching power converter102includes power factor correction (PFC) stage124and driver stage126. The PFC stage124is controlled by switch108and provides power factor correction. The driver stage126is also controlled by switch108and regulates the transfer of energy from the line input voltage Vx(t) through inductor110to capacitor106. The inductor current iLramps ‘up’ when the switch108conducts, i.e. is “ON”. The inductor current iLramps down when switch108is nonconductive, i.e. is “OFF”, and supplies current iLto recharge capacitor106. The time period during which inductor current iLramps down is commonly referred to as the “inductor flyback time”. Diode111prevents reverse current flow into inductor110. In at least one embodiment, the switching power converter102operates in discontinuous current mode, i.e. the inductor current iLramp up time plus the inductor flyback time is less than the period of switch108.

Input current iLis proportionate to the ‘on-time’ of switch108, and the energy transferred to inductor110is proportionate to the ‘on-time’ squared. Thus, the energy transfer process is one embodiment of a nonlinear process. In at least one embodiment, control signal CS0is a pulse width modulated signal, and the switch108is an n-channel field effect transistor that conducts when the pulse width of CS0is high. Thus, the ‘on-time’ of switch108is determined by the pulse width of control signal CS0. Accordingly, the energy transferred to inductor110is proportionate to a square of the pulse width of control signal CS0.

Capacitor106supplies stored energy to load112. The capacitor106is sufficiently large so as to maintain a substantially constant output voltage Vx(t), as established by a power factor correction (PFC) and output voltage controller114(as discussed in more detail below). The output voltage Vx(t) remains substantially constant during constant load conditions. However, as load conditions change, the output voltage Vx(t) changes. The PFC and output voltage controller114responds to the changes in Vx(t) and adjusts the control signal CS0to resume a substantially constant output voltage as quickly as possible. The output voltage controller114includes a small capacitor115to filter any high frequency signals from the line input voltage Vx(t).

The power control system100also includes a PFC and output voltage controller114. PFC and output voltage controller114controls switch108and, thus, controls power factor correction and regulates output power of the switching power converter102. The goal of power factor correction technology is to make the switching power converter102appear resistive to the voltage source101. Thus, the PFC and output voltage controller114attempts to control the inductor current iLso that the average inductor current iLis linearly and directly related to the line input voltage Vx(t). Prodić,Compensator Design and Stability Assessment for Fast Voltage Loops of Power Factor Correction Rectifiers, IEEE Transactions on Power Electronics, Vol. 22, No. 5, September 2007, pp. 1719-1729 (referred to herein as “Prodić”), describes an example of PFC and output voltage controller114. The PFC and output voltage controller114supplies a pulse width modulated (PWM) control signal CS0to control the conductivity of switch108. In at least one embodiment, switch108is a field effect transistor (FET), and control signal CS0is the gate voltage of switch108. The values of the pulse width and duty cycle of control signal CS0depend on two feedback signals, namely, the line input voltage Vx(t) and the capacitor voltage/output voltage Vc(t).

PFC and output controller114receives two feedback signals, the line input voltage Vx(t) and the output voltage Vc(t), via a wide bandwidth current loop116and a slower voltage loop118. The line input voltage Vx(t) is sensed from node120between the diode rectifier103and inductor110. The output voltage Vc(t) is sensed from node122between diode111and load112. The current loop116operates at a frequency fcthat is sufficient to allow the PFC and output controller114to respond to changes in the line input voltage Vx(t) and cause the inductor current iLto track the line input voltage to provide power factor correction. The current loop frequency is generally set to a value between 20 kHz and 100 kHz. The voltage loop118operates at a much slower frequency fv, typically 10-20 Hz. By operating at 10-20 Hz, the voltage loop118functions as a low pass filter to filter an alternating current (AC) ripple component of the output voltage Vc(t).

The PFC and output voltage controller114controls the pulse width (PW) and period (TT) of control signal CS0. Thus, PFC and output voltage controller114controls the nonlinear process of switching power converter102so that a desired amount of energy is transferred to capacitor106. The desired amount of energy depends upon the voltage and current requirements of load112. To regulate the amount of energy transferred and maintain a power factor correction close to one, PFC and output voltage controller114varies the period of control signal CS0so that the input current iLtracks the changes in input voltage Vx(t) and holds the output voltage VC(t) constant. Thus, as the input voltage Vx(t) increases, PFC and output voltage controller114increases the period T of control signal CS0, and as the input voltage Vx(t) decreases, PFC and output voltage controller114decreases the period of control signal CS0. At the same time, the pulse width PW of control signal CS0is adjusted to maintain a constant duty cycle (D) of controls signal CS0, and, thus, hold the output voltage VC(t) constant. In at least one embodiment, the PFC and output voltage controller114updates the control signal CS0at a frequency much greater than the frequency of input voltage Vx(t). The frequency of input voltage Vx(t) is generally 50-60 Hz. The frequency 1/TT of control signal CS0is, for example, between 25 kHz and 100 kHz. Frequencies at or above 25 kHz avoid audio frequencies and frequencies at or below 100 kHz avoids significant switching inefficiencies while still maintaining good power factor correction, e.g. between 0.9 and 1, and an approximately constant output voltage VC(t).

FIG. 2depicts a generalized representation of a power control system200described in Prodić. The PFC and output voltage controller202of Prodić includes an error generator204to determine an error signal ed(t). The error signal ed(t) represents a difference between the output voltage Vx(t) and a reference voltage VREF. The reference voltage VREFis set to the desired value of output voltage Vc(t). A comb filter206filters the error signal ed(t). The comb filter206has significant attenuation at equally spaced frequencies (referred to as “notches”) and has unity gain at other frequencies. The comb filter206automatically tunes the notches to match twice the line frequency fLand harmonics of the line frequency. The line frequency fLis the frequency of input voltage Vin(t). According to Prodić, the comb filter206generates a “ripple free” error signal evf(t). Compensator208processes the filtered error signal, and input voltage feedback signal Vx(t) generates a compensator output signal. The pulse width modulator (PWM)210processes the compensator output signal to generate control signal CS0.

SUMMARY OF THE INVENTION

In one embodiment of the present invention, a power factor correction controller includes a processor to receive and process one or more switching power converter feedback signals and generate a pulse width control signal using each processed feedback signal. The power factor correction controller also includes a pulse width modulator, coupled to the signal processor, having an input to receive the pulse width control signal and generate a pulse width modulated, power factor correction (PFC) control signal to control a switch that controls a power factor correction stage of the switching power converter. A pulse width of the PFC control signal varies approximately with a square root of the PWM control signal.

In another embodiment of the present invention, a method of controlling power factor correction of a switching power converter includes receiving one or more switching power converter feedback signals and processing each received feedback signal. The method further includes generating a pulse width control signal using each processed feedback signal and generating a pulse width modulated, power factor correction (PFC) control signal to control a switch that controls a power factor correction stage of the switching power converter. A pulse width of the PFC control signal varies approximately with a square root of the PWM control signal.

In a further embodiment of the present invention, an apparatus to control power factor correction of a switching power converter includes means for receiving one or more switching power converter feedback signals. The apparatus also includes means for generating a pulse width control signal using each processed feedback signal and means for generating a pulse width modulated, power factor correction (PFC) control signal to control a switch that controls a power factor correction stage of the switching power converter. A pulse width of the PFC control signal varies approximately with a square root of the PWM control signal.

DETAILED DESCRIPTION

A power control system includes a switching power converter and a power factor correction (PFC) and output voltage controller. The switching power converter utilizes a nonlinear energy transfer process to provide power to a load. The PFC and output voltage controller generates a control signal to control power factor correction and voltage regulation of the switching power converter. The PFC and output voltage controller includes a nonlinear delta-sigma modulator that models the nonlinear energy transfer process of the switching power converter. The nonlinear delta-sigma modulator generates an output signal used to determine the control signal. By using the nonlinear delta-sigma modulator in a control signal generation process, the PFC and output voltage controller generates a spectrally noise shaped control signal. In at least one embodiment, noise shaping of the control signal improves power factor correction and output voltage regulation relative to conventional systems.

In at least one embodiment, the PFC and output voltage controller control signal is a pulse width modulated signal. The period of the pulse width modulated control signal controls output voltage regulation, and the duty cycle of the control signal controls power factor correction. In at least one embodiment, the period of the control signal is increased for lower power demands of the switching power converter and lower input voltages. The period of the control signal can also be modulated in accordance with any number of modulation strategies. For example, in at least one embodiment, the PFC and output voltage controller modulates the period of the control signal in accordance with a spread spectrum strategy to reduce electromagnetic interference of the power control system.

FIG. 3depicts power control system300, and power control system300includes a PFC and output voltage controller302. The PFC and output voltage controller302includes a pulse width (PW) and period control signal generator304to generate a pulse width control signal QPW(n) and a period control signal QP(n). The PW and period signal generator304includes a nonlinear delta-sigma modulator310. The nonlinear delta-sigma modulator310models a nonlinear energy transfer process of switching power converter306. Switching power converter306includes a PFC stage308to provide power factor correction in accordance with control signal CS1.

The control signal CS1controls power factor correction by causing the inductor current iLto directly and linearly track changes in the line input voltage Vx(t). In at least one embodiment, PFC stage308is identical to PFC stage124. Switching power converter306also includes a driver stage316to provide an approximately constant voltage and, thus, approximately constant power to load112in accordance with control signal CS1. The control signal CS1controls output voltage regulation by causing the output voltage Vc(t) to track a reference voltage VREF. In at least one embodiment, the reference voltage VREFis set to a desired output voltage of switching power converter306. For example, a light emitting diode fixture may have a 400 V input voltage rating, and reference voltage VREFis set to 400 V. In at least one embodiment, the reference voltage can be manually or automatically modified to account for differing power demands as, for example, load112changes. In at least one embodiment, driver stage316is identical to driver stage126. Unless explicitly indicated otherwise, the term “approximately” represents a nearly exact or an exact match. A value is “nearly exact” if the value achieves acceptable performance.

Power control system300also includes a pulse width modulator312to generate the pulse width modulated control signal CS1. Pulse width modulator312modifies the pulse width and period of control signal CS1in accordance with the pulse width control signal QPW(n) and modifies the period of control signal CS1in accordance with period input signal QP(n). In at least one embodiment, pulse width control signal QPW(n) and period control signal QP(n) are discrete, quantization output signals of respective delta-sigma modulators. Pulse width modulator312provides the control signal to switch108, and control signal CS1controls the conductive state of switch108. In at least one embodiment, switch108is a field effect transistor (FET), such as an n-channel, and control signal CS1is the gate voltage of switch108.

The PFC and output voltage controller302utilizes the line input voltage Vx(t) and the output voltage Vc(t) of switching power converter306to determine control signal CS1. In at least one embodiment, feedback signal(s) VFB(s)(t) represents line input voltage Vx(t), output voltage Vc(t), a switch node voltage at switch node314, or any combination thereof. In at least one embodiment, feedback signal VFB(s)(t) is a single feedback signal representing the voltage at the switch node314. In this embodiment, the PFC and output voltage controller302can determine both the line input voltage Vx(t) and the output voltage Vc(t) from the single feedback signal VFB(s)(t) as, for example, described in U.S. patent application entitled “Power Factor Correction Controller With Feedback Reduction”, inventor John L. Melanson, assignee Cirrus Logic, Inc., and Ser. No. 11/967,271 (“Melanson I”) and U.S. patent application entitled “Power Factor Correction Controller With Switch Node Feedback”, inventor John L. Melanson, assignee Cirrus Logic, Inc., and Ser. No. 11/967,272 (“Melanson II”). Melanson I and Melanson II are incorporated herein by reference in their entireties.

In at least one embodiment, each signal represented by feedback signal(s) VFB(s)(t) is scaled to a value that is useable by PFC and output voltage controller302without damaging PFC and output voltage controller302. For example, in at least one embodiment, PFC and output voltage controller302is implemented entirely as an integrated circuit or in combination with digital and/or analog components. The integrated circuit has a maximum input signal voltage. Accordingly, each feedback signal(s) VFB(s)(t) is scaled as, for example, described in Melanson I and Melanson II.

As subsequently described in more detail, in at least one embodiment, the nonlinear delta-sigma modulator310processes an input signal, models the nonlinear energy transfer process of switching power converter306, and provides a noise shaped output signal. In at least one embodiment, the nonlinear process of switching power converter306is identical to the nonlinear energy transfer process of switching converter102. By modeling the nonlinear energy transfer process, in at least one embodiment, the nonlinear delta-sigma modulator310can be used to provide spectral noise shaping of the control signal CS1. The presence of noise in control signal CS1within a baseband frequency of control signal CS1allows the noise to influence the power factor correction and output voltage regulation of switching power converter306. By removing the influence of noise from a baseband of control signal CS1, the control signal CS1exercises improved control over switching power converter306.

FIG. 4depicts PFC and output voltage controller400, which represents one embodiment of PFC and output voltage controller302, and depicts PW and period control signal generator402, which represents one embodiment of PW and period signal generator304. The PW and period signal generator304includes systems404and406to determine control signal CS1. The period control system404determines the period of control signal CS1, and the pulse width control system406determines the pulse width of the control signal CS1. In at least one embodiment, the PFC and output voltage controller400updates control signal CS1at a frequency between 25 kHz and 100 Mhz. Updating above 25 kHz avoids audible switching noises, and updating below 100 MHz results in a more efficient operation of switch108.

The period control system404includes a period generator408to generate a period control signal TTC. The period control signal TTC controls the period of control signal CS1. In at least one embodiment, the period generator408receives line input voltage Vx(t), and period generator408generates period control signal TTC in response to line input voltage Vx(t). In at least one embodiment, the line input voltage is sampled to generate a discrete value for use by period generator408. In at least one embodiment, the period generator408generates a longer period of control signal CS0for lower power requirements of load112and as rectified, line input voltage Vx(t) decreases. In at least one embodiment, the period generator408determines the period of control signal CS1in accordance with a spread spectrum strategy. The spread spectrum strategy adjusts the period of control signal CS1, and, thus, the frequency of control signal CS1, using a strategy that reduces electro-magnetic interference generated by, for example, switching power converter306.

In at least one embodiment, the period control system404also includes a delta-sigma modulator409. The delta-sigma modulator409receives the period control signal TTC and generates a period control signal QP(n). In this embodiment, the period control signal QP(n) is an output of a quantizer (not shown) of delta-sigma modulator409. The delta-sigma modulator409spectrally noise shapes the control signal TTC. Spectral noise shaping reduces the influence of noise on the control signal TTC and, thus, allows PFC and output voltage controller400to provide better power factor correction and output voltage regulation control for switching power converter306. Exemplary conventional delta-sigma modulator design and operation is described in the bookUnderstanding Delta-Sigma Data Convertersby Schreier and Temes, IEEE Press, 2005, ISBN 0-471-46585-2. In at least one embodiment, the period control system404does not include the delta-sigma modulator409, and the period generator308provides the period control signal TTC directly to the pulse width modulator312.

Pulse width control system406determines a pulse width of control signal CS1so that control signal CS1tracks the line input voltage Vx(t) and minimizes any difference between the output voltage Vc(t) and the reference voltage VREF. An error generator410determines an error signal evbetween the reference voltage VREFand the output voltage Vc(t) by subtracting the output voltage Vc(t) from the reference voltage VREF. A proportional integrator412processes the error signal evto generate proportional-integral (PI) signal PIPW. The proportional integrator412adjusts the rate of response of PFC and output voltage controller400to changes in the output voltage Vc(t). The PI signal PIPWreflects the rate adjustment. If the response is too slow, then the output voltage Vc(t) may fail to track changes in power demand of load112and, thus, fail to maintain an approximately constant value. If the response is too fast, then the output voltage Vc(t) may react to minor, brief fluctuations in the power demand of load112. Such fast reactions could cause oscillations in PFC and output voltage controller400, damage or reduce the longevity of components, or both. Thus, the particular rate of response by proportional integrator412is a design choice. Setting the rate of response is subsequently discussed with reference toFIG. 7.

The pulse width control system also includes a pulse width generator414to determine a pulse width control signal T1. The pulse width generator414generates the pulse width control signal T1so that the duty cycle of control signal CS1tracks the line input voltage Vx(t) and, thus, provides power factor correction. In at least one embodiment, the pulse width T1of control signal CS1is determined in accordance with Equation [1]:

T⁢⁢12=2·LVrms2·PPW·TT·(1-VXVC).[1]
“T1” is the pulse width of the control signal CS1as represented by period control signal QP(n). “L” represents an inductor value of PFC stage308, such as inductor110. “Vrms” represents the root mean square of line input voltage Vin(t). “PIPW” represents PI signal PIPW, which is the output of the proportional integrator412. “TT” is the period of control signal CS1as generated by period control system404. In at least one embodiment, TT is the quantizer output signal QP(n) of delta-sigma modulator409. In at least one embodiment, TT is the period control signal TTC generated by period generator408, if delta-sigma modulator409is not included in period control system404“VX” is a sampled value of the current value of the line input voltage Vx(t). “VC” is a sampled value of the output voltage Vc(t) used to generate the PI output signal PIPW.

In at least one embodiment, the switching power converter306operates in discontinuous current mode. When operating in discontinuous current mode, the period generator408ensures that the period of control signal CS1exceeds the ramp-up and ramp-down times of inductor current iL. In at least one embodiment to ensure that switching power converter306operates in discontinuous current mode, an inductor L of PFC stage308, such as inductor110is set in accordance with Equation [2]:

L=Vmin2/[(Pmax·J)·(2·fmax)·[1-2⁢(VminVcap)].[2]
“L” is the value of the inductor of PFC stage308. “Vmin” is the root mean square (rms) minimum input voltage Vin(t). “Pmax” is the maximum power demand of load112. “J” is an overdesign factor and any value greater than 1 indicates an overdesign. In at least one embodiment, “J” is 1.1. “fmax” is a maximum frequency of control signal CS1. “Vcap” is a nominal expected output voltage for load112.

For the inductor L value of Equation [2], in at least one embodiment, the switching power converter will operate in discontinuous current mode if the pulse width control signal satisfies Equation [3]:

The nonlinear portion of the energy transfer process is associated with the energy provided to an input inductor in the PFC stage, such as inductor110(FIG. 8). Thus, the nonlinear delta-sigma modulator310is associated with power factor correction. The pulse width of the control signal CS1and the relation of the pulse width to the period of control signal CS1, i.e. the duty cycle of control signal CS1, controls power factor correction. Accordingly, the nonlinear delta-sigma modulator310is used by pulse width control system406to spectrally noise shape the pulse width control signal T1. The nonlinear delta-sigma modulator310generates the pulse width control signal QPW(n) as a quantizer output signal. By removing the influence of noise from a baseband of control signal CS1, the control signal CS1exercises improved control over switching power converter306.

FIG. 5depicts a nonlinear delta-sigma modulator500, which is one embodiment of nonlinear delta-sigma modulator310. The nonlinear delta-sigma modulator500includes a ‘nonlinear system’ feedback model502in a feedback path504of nonlinear delta-sigma modulator500. The feedback model502models nonlinearities of a nonlinear process, such as the nonlinear energy transfer process of switching power converter306. In at least one embodiment, the feedback model502is represented by f(x). The pulse width control signal QPW(n) is fed back through a delay506, and the feedback model502processes the delayed quantizer output signal QPW(n−1) in accordance with f(QPW(n−1)). The error generator508determines a difference signal d(n) representing a difference between the feedback model502output f(QPW(n−1)) and pulse width control signal T1. A kthorder loop filter510filters the difference signal d(n) to generate a loop filter output signal u(n), where k is an integer greater than or equal to one and the value of k is a design choice. Generally, increasing values of k decrease baseband noise and increase out-of-band noise.

The nonlinear delta-sigma modulator500includes a nonlinearity compensation module512. However, in at least one embodiment, a nonlinearity compensation module is not included as part of the nonlinear delta-sigma modulator500. The nonlinearity compensation module512compensates for nonlinearities introduced by the nonlinear feedback model502. In at least one embodiment, the nonlinearity compensation module512processes the loop filter output signal u(n) using a compensation function of approximately f1(x), which is an inverse of the feedback model502function f(x), e.g. if f(x)=x2, then f1(x)=˜x1/2. Quantizer514quantizes the output of compensation module512to determine pulse width control signal QPW(n). In at least one embodiment, the compensation function f1(x) of compensation module512is an estimate of the inverse of the nonlinear system feedback model502. In at least one embodiment, the compensation function f1(x) in the forward path511of nonlinear delta-sigma modulator500provides good noise shaping across all frequencies. In at least one embodiment, an imperfect compensation function, i.e. approximate f1(x), allows more noise at all frequencies. In at least one embodiment, the compensation function f1(x) provides stability to nonlinear delta-sigma modulator500.

In at least one embodiment, the nonlinearity compensation module512is incorporated as part of the quantizer514rather than as a process separate from a quantization process. The compensation module512causes the quantizer514to quantize the loop filter output signal u(n) in accordance with a quantization compensation function. In at least one embodiment, the quantizer compensation function determines pulse width control signal QPW(n) in accordance with a derivative df(x) of the feedback model502. For example, if the nonlinear system feedback model502function f(x) equals x2, then the quantizer compensation function is 2x. The quantizer compensation function can be estimated as x. Decision points of the quantizer514are then x+/−½.

FIG. 6depicts nonlinear delta-sigma modulator600, which represents one embodiment of nonlinear delta-sigma modulator310. The nonlinear energy transfer process of switching power converter306can be modeled as a square function, x2. Nonlinear delta-sigma modulator600includes a nonlinear system feedback model602represented by x2. The nonlinear system feedback model represents one embodiment of nonlinear system feedback model502. Thus, the output of feedback model602is the square of the delay-by-one quantizer output signal QPW(n), i.e. [QPW(n−1)]2. The nonlinear delta-sigma modulator600operates in the same manner as nonlinear delta-sigma modulator300and includes a compensation module604that is separate from quantizer314. The nonlinearity compensation module604processes output signal u(n) of the loop filter310with a square root function x1/2. The output c(n) of compensation module604is quantized by quantizer514to generate quantizer output signal QPW(n).

FIG. 7depicts a proportional integrator700, which represents one embodiment of proportional integrator412. The proportional integrator700generates the PI output signal PIPW. The PIPWvaries as the difference between the reference voltage VREFand the output voltage Vc(t), as represented by error signal evfrom error generator701, varies. The difference between the The proportional integrator700includes an integral signal path702and a proportional signal path704. The integral signal path includes an integrator706to integrate the error signal ev, and a gain module708to multiple the integral of error signal evby a gain factor g2and generate the integrated output signal IPW. The proportional path704includes a gain module710to multiply the error signal evby a gain factor g1and generate the proportional output signal PPW. Adder712adds the integrated output signal IPWand the proportional output signal PPWto generate the PI signal PIPW. The values of gain factors g1and g2are a matter of design choice. The gain factors g1and g2affect the responsiveness of PFC and output voltage controller400. Exemplary values of gain factors g1and g2are set forth in the emulation code ofFIGS. 8-31. Faster response times of the PFC and output voltage controller400allow the control signal CS1to more rapidly adjust to minimize the error signal ev. As previously stated, if the response is too slow, then the output voltage Vc(t) may fail to track changes in power demand of load112and, thus, fail to maintain an approximately constant value. If the response is too fast, then the output voltage Vc(t) may react to minor, brief fluctuations in the power demand of load112. Such fast reactions could cause oscillations in PFC and output voltage controller400, damage or reduce the longevity of components, or both. Thus, the particular rate of response by proportional integrator412is a design choice.

FIG. 8depicts power control system800, which represents one embodiment of power control system300. Power control system includes a switching power converter102, which is identical to the switching power converter of power control system100. In power control system800, PFC and output voltage controller302controls power factor correction and output voltage regulation of switching power converter102.

FIG. 9-31depict a Mathematica® program that emulates power control system800and includes graphs depicting emulation results. The Mathmatica® program is available from Wolfram Research, Inc. with office in Champaign, Ill.

Thus, a PFC and output voltage controller includes a nonlinear delta-sigma modulator that models the nonlinear energy transfer process of a switching power converter. The nonlinear delta-sigma modulator generates an output signal used to determine the control signal. By using the nonlinear delta-sigma modulator in a control signal generation process, the PFC and output voltage controller generates a spectrally noise shaped control signal. In at least one embodiment, noise shaping of the control signal improves power factor correction and output voltage regulation relative to conventional systems.

Thus, the nonlinear delta-sigma modulator includes a feedback model that models a nonlinear process being controlled and facilitates spectral shaping to shift noise out of a baseband in a spectral domain of a response signal of the nonlinear process.