Digital radar control system and method

A digital system for processing return energy in a aircraft pulsed doppler radar system which includes a wave energy transmitter and a receiver for detecting the wave energy returned to the receiver by reflection. A digital signal processor develops target and noise information from the return energy and the return energy related information is supplied to a digital computer. The computer determines the range from which the return energy is reflected and provides digital range data. The width of the return energy in the time domain and the amplitude of the return energy are evaluated to provide digital width and digital amplitude data. The return energy is designated as clutter and clutter AGC and blanking signals are generated to control the receiver in response to an evaluated width and amplitude of the return energy above predetermined minimum values. The return energy is designated as an altitude line and the altitude line designated return energy is tracked in response to a predetermined number of detections of the return energy at about the same range over a predetermined period of time. The altitude line designating and tracking loop has a tracking loop response sufficient to account for changes in terrain beneath the aircraft and for sudden range changes of short duration so that the altitude line is not lost due to changes in the terrain beneath the aircraft. The return energy is designated as a target and the target designated return energy is tracked in response to the range determination, the amplitude determination and an evaluated width of the return energy below the predetermined value.

BACKGROUND OF THE INVENTION 
1. Field of the Invention 
The present invention relates to radar systems and, in particular, to a 
method and radar system for acquiring and tracking targets through the use 
of digital techniques performed primarily by a low cost, high reliability 
programmed digital computer. 
2. State of the Prior Art 
Typical prior art radar systems employ analog and digital techniques for 
performing the functions required to acquire and track targets in a radar 
system. For example, in previous radar systems, the target tracker and 
automatic gain control functions are typically hardware functions and the 
angular tracking error signals are usually developed by specific hardware 
elements. Such systems are typically very complex and, because of this 
complexity, are not as reliable as desired. Moreover, the versatility of 
such systems is minimal because changes in the hardware configuration 
require redesign and rewiring. 
The use of a programmed computer to perform these functions is desirable 
but has presented numerous problems. In addition to the complexity of the 
functions performed in acquiring and tracking targets in a radar system 
and the resultant program complexity, typical hardware techniques cannot 
be directly employed. Moreover, it is desirable to employ a small, low 
cost, high reliability computer such as the Westinghouse Millicomputer but 
such computers have a memory structure which is very difficult to program 
for complex operations such as those encountered in a radar system. 
Another major problem in employing a programmed computer is the timing 
associated with the transfer of information throughout the system. In a 
typical radar system employing a Millicomputer, multiple computers may be 
employed depending upon the basic instruction execution time of the 
selected Millicomputer. For example, a radar control computer may be 
utilized as a master computer and may request and send information from 
and to other computers by self-command. This intercomputer communication 
is via direct memory access (DMA). While one DMA is occurring, all others 
are prevented from occurring. Therefore, if the radar control computer is 
sending or receiving information from another computer and the digital 
signal processor (DSP) has information to send to the computer, the DSP 
must wait. If the DSP is made to wait too long, the information is lost. 
Therefore the timing for DMA's is critical. 
SUMMARY OF THE INVENTION 
In order to overcome these and other problems, the radar system in 
accordance with the present invention utilizes a number of novel 
techniques and performs a number of novel functions in processing the 
radar data. For example, a range tracker in accordance with the present 
invention determines unambiguous range to a target through the use of a 
double precision technique which achieves the accuracy required for target 
tracking. The ambiguous target range from the digital signal processor is 
centroided by analyzing the amplitude of the target signal in the range 
cells above and below the target range cell. This ambiguous target range 
is then compared with the ambiguous track range developed from a tracking 
routine using double precision to produce a range tracking error which is 
accurate to 1/2.sup.15 range cells (approximately 1/80 foot). The range 
tracking error is integrated to develop a range rate. Main beam clutter 
velocity is subtracted from the range rate and the difference is filtered 
to provide target velocity. The difference is also used to develop 
unambiguous tracking range for display and control of the DSP. Unambiguous 
tracking range is also modulated by radar interpulse period (IPP) to 
produce the ambiguous track range used in developing the range tracking 
error. 
In the development of azimuth and elevation angular tracking errors in 
accordance with the present invention, the computer develops the amplitude 
of the tracking error signal by first obtaining the difference between the 
target signal received from the DSP and the target AGC level (TAGC) 
developed by a target AGC routine. This error amplitude is normalized by 
the TAGC level and then demodulated in the computer by a timed delayed, 
phase corrected lobe on receive only (LORO) signal to develop the azimuth 
and elevation angular tracking error for use by the angle track loop. The 
phase correction is required because of the signal time delay through the 
receiver and the digital signal processor. The error amplitude is 
developed in double precision arithmetic to obtain maximum accuracy. 
Noise AGC level (NAGC) is developed in accordance with the present 
invention by the programmed computer through the summation of a plurality 
of noise samples (e.g., 6 noise samples, one at each of 6 pulse repetition 
frequencies) during antenna turn-around, and by subtracting an average 
noise sum. This difference is then put into a first order filter simulated 
by the computer and the output is the noise/target AGC level used by the 
radar receiver. 
Clutter AGC level (CAGC) is developed in accordance with the present 
invention by filtering the main beam clutter amplitude signal received 
from the digital signal processor. The CAGC level is based upon the larger 
of the clutter and target levels. This level is computed using double 
precision arithmetic and is used to adjust the state of a low noise 
amplifier (LNA) and a diode attenuator in the radar receiver. 
The radar system according to the present invention also includes an 
altitude line tracker which locates and tracks the altitude line, i.e., 
the undesirable side lobe return from directly beneath the aircraft. The 
altitude line is located by locating apparent target return which, over a 
predetermined time period, remains at substantially the same range. In 
accordance with the invention, target data providing n of m correlations 
at about the same range over some relatively long period of time is 
designated the altitude line and such correlation places an altitude line 
tracker in A-line track mode. The altitude line (i.e., the apparent target 
data designated the altitude line) is thereafter tracked by a tracking 
loop which tolerates large range perturbations for relatively short 
periods of time but which cannot track at a high range rate. In the target 
track mode of the radar system, the target is excluded from the 
calculations for locating and tracking the altitude line. 
With respect to transfer of information between computers, all inputs and 
outputs from the main radar control computer are accomplished in a block 
transfer. For example, inputs to the main computer are accomplished by 
first inhibiting all DMA's and requesting an internal computer DMA from 
the main computer to one of the other computers. After the inputs are 
ready, the internal computer DMA is allowed to occur and then all DMA's 
are allowed. This scheme minimizes lockout time. Each time an element 
wants to transfer information to the main computer, the information 
consisting of all words to be sent to the computer is stored in a buffer 
and the entire buffer is output. Therefore, most of the data transferred 
is that which the main computer already has in memory. However, if only 
new information were transferred each time, it would require more time to 
send only the selected data then to send all of the data because of the 
selection process.

DETAILED DESCRIPTION 
General System Description 
A radar system operable in accordance with the present invention is 
illustrated in FIG. 1. Since the invention has particular utility in the 
environment of an airborne radar system, the invention is illustrated in 
FIG. 1 in this environment in the forward portion of an aircraft 10 and is 
described hereinafter in this connection. It should, however, be 
understood that the invention may have other applications. 
Referring to FIG. 1, the illustrated radar system generally includes an 
antenna assembly 12, suitable conventional radar hardware 14 such as 
transmit/receive units, antenna drive units and aircraft attitude signal 
generators, an antenna commanded position computer and a radar control 
computer 16 and a suitable pilot display and control unit 18. In the 
disclosed embodiment, the computers 16 are commercially available 
Westinghouse Electric Corp. Millicomputers and are connected to the 
external equipment through a commercially available Digibus 20. A manual 
test panel may be connected to the computers 16 through the Digibus 20 as 
described in U.S. patent application by Etow et al Ser. No. 691,145, filed 
May 28, 1976, which is a continuation-in-part of Ser. No. 384,337, filed 
July 31, 1973 entitled "Method and System for the Monitoring and Testing 
of Computer Controlled Systems," now abandoned. 
The antenna assembly 12, in the illustrated embodiment, is a casagrain type 
antenna and may include a sub-reflector 22 and a twist-reflector 24. The 
twist-reflector 24 may be gimbled for movement in azimuth and elevation 
and may be controlled as described in U.S. Pat. No. 3,821,738 by Elmen C. 
Quesinberry et al. The Quesinberry et al patent is assigned to the 
assignee of the present invention and the disclosure is hereby 
incorporated herein by reference. 
In the system illustrated in FIG. 1, the radar hardware 14 positions the 
twist-reflector 24 of the antenna assembly 12 and transmits and receives 
wave energy by way of the antenna assembly 12 in response to control 
signals generated by the computer 16. In positioning the sub-reflector 24, 
the required commanded position signals are preferably generated as 
described in the foregoing Quesinberry et al patent and as further 
described in U.S. Pat. No. 3,793,634 by Robert I. Heller et al entitled 
"Digital Antenna Positioning System and Method" and assigned to the 
assignee of the present invention. The disclosure of the Heller et al 
patent is hereby incorporated herein by reference. 
In the foregoing Heller et al patent, an entirely digital system for 
commanding radar antenna position is disclosed and claimed. In accordance 
with the present invention, radar signal processing involved in scanning 
or searching for a target, acquiring and tracking a target and providing a 
visual display function typically performed by hard wired analog 
circuitry, is performed digitally. In the preferred embodiment of the 
invention, a programmed radar control computer operable in conjunction 
with the radar hardware performs these functions as will hereinafter be 
described in greater detail. 
For example, various automatic gain control (AGC) signals such as noise AGC 
(NAGC), clutter AGC (CAGC), and target AGC (TAGC) levels are typically 
computed through the use of hardware associated with the radar 
transmitter/receiver unit. In the system of the present invention, the 
transmitter/receiver unit of the radar system of FIG. 1 is still included 
as part of the radar hardware 14 but the various AGC computations are 
performed digitally by the radar control computer 16. Similarly, target 
tracking, target acquisition and target displaying computations are 
performed digitally in accordance with the invention as will subsequently 
be described. 
In FIG. 2 there is provided a more detailed functional block diagram 
showing the relationship between the radar system hardware 14 and the 
computer 16. With reference to FIG. 2, the antenna 12 may be driven in 
azimuth (AZ) and elevation (EL) through a servo unit 30 under the control 
of servo control signals SC from a radar control computer 32. A 
transmitter/stable oscillator (STALO) unit 34 may be controlled by a 
signal PRF from the radar control computer 32 to transmit a signal TX by 
way of the antenna 12. A transmitter status signal TXST may be supplied 
from the transmitter/STALO unit 34 to the computer 32, and a signal STALO 
from the unit 34 may be applied to a microwave receiver 36 for mixing with 
return or echo signals RTN supplied to the receiver 36 from the antenna 
12. 
Detected or received radar signals RCV from the microwave receiver 36 may 
be applied to a suitable digital processor (DSP) 38 for generation of 
target and threshold information. A validity signal VLD indicative of the 
status of the microwave receiver 36 may be supplied to the computer 32 and 
various AGC and receiver control signals may be supplied from the computer 
32 to the receiver 36. 
The digital signal processor 38 may supply target and threshold data 
signals TGTI to the radar control computer 32 together with monitoring 
signals MTR indicative of the various operations being performed by the 
digital signal processor 38. The radar control computer 32 may supply 
fixed or constant reference data