DISPLAY DEVICE

A display device includes sub-pixels including a light emitting part, and sub-areas on respective sides of the light emitting part in a first direction, a first electrode in the light emitting part and extending in the first direction, and a second electrode extending in the first direction and spaced apart from the first electrode in a second direction crossing the first direction, a first insulating layer on the first electrode and the second electrode, and a light emitting element on the first electrode and the second electrode in the light emitting part, wherein the second electrode includes an electrode stem part extending in the first direction, and electrode branch parts branched from the electrode stem part.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority to, and the benefit of, Korean Patent Application No. 10-2021-0101304 filed on Aug. 2, 2021 in the Korean Intellectual Property Office, the contents of which in its entirety are herein incorporated by reference.

BACKGROUND

The present disclosure relates to a display device.

2. Description of the Related Art

The importance of display devices has increased with the development of multimedia. Accordingly, various types of display devices, such as an organic light emitting display (OLED) and a liquid crystal display (LCD), have been used.

There is a self-light emitting display device including a light emitting element as a device displaying an image of the display device. The self-light emitting display device is a light emitting element, and includes an organic light emitting display device using an organic material as a light emitting material, an inorganic light emitting display device using an inorganic material as a light emitting material, or the like.

SUMMARY

Aspects of the present disclosure provide a display device in which the number of lines is decreased by applying the same second source voltage to each of adjacent sub-pixels through the same second electrode.

According to embodiments, a display device includes sub-pixels including a light emitting part, and sub-areas on respective sides of the light emitting part in a first direction, a first electrode in the light emitting part and extending in the first direction, and a second electrode extending in the first direction and spaced apart from the first electrode in a second direction crossing the first direction, a first insulating layer on the first electrode and the second electrode, and a light emitting element on the first electrode and the second electrode in the light emitting part, wherein the second electrode includes an electrode stem part extending in the first direction, and electrode branch parts branched from the electrode stem part.

The display device may further include a bank layer separating adjacent ones of the sub-pixels, wherein the sub-pixels are arranged along the first direction and the second direction.

The bank layer may be in a lattice shape along the first direction and the second direction.

The light emitting part and the sub-area may be surrounded by portions of the bank layer extending in the first direction and the second direction.

The first electrode may be over the sub-area, and may define an opening hole in the sub-area.

The display device may further include a second insulating layer on the first insulating layer, and separation parts respectively in sub-areas, the first insulating layer and the second insulating layer not being therein, wherein the first electrode contacts adjacent ones of the separation parts of adjacent ones of the sub-areas.

The display device may further include a first connection electrode on the first electrode in the light emitting part, and in contact with the light emitting element, and a second connection electrode on the second electrode in the light emitting part, and in contact with the light emitting element, wherein the first insulating layer further includes a first contact part overlapping the first electrode in the light emitting part, and a second contact part overlapping the second electrode in the light emitting part, wherein the first connection electrode is in contact with the first electrode through the first contact part, and wherein the second connection electrode is in contact with the second electrode through the second contact part.

The display device may further include a third insulating layer on the second insulating layer, and covering the separation parts in the sub-area.

The electrode stem part may overlap a portion of the bank layer extending in the first direction, and is on one side of the sub-area in the second direction.

The electrode branch parts may be branched from a first portion of the electrode stem part at a portion of the bank layer extending in the first direction and at a portion of the bank layer extending in the second direction, and are bent to respective sides in the second direction.

The electrode branch parts may cross the light emitting part in the first direction, are bent again, and may be integrated with a second portion of the electrode stem part to be connected to each other.

The electrode branch parts of the second electrode may include a first electrode branch part on a left side of the first electrode, and a second electrode branch part on a right side of the first electrode.

The electrode branch parts in one second electrode may be respectively in the light emitting parts of adjacent ones of the sub-pixels neighboring in the second direction, wherein the electrode branch parts of different ones of the second electrodes are in one sub-pixel.

The display device may further include a first bank pattern at a central portion of the light emitting part, and second bank patterns spaced apart from the first bank pattern with the first bank pattern interposed therebetween, wherein the first bank pattern and the second bank patterns are alternately arranged along the second direction, and wherein the light emitting element is between the first bank pattern and one of the second bank patterns.

The first electrode may be at a center of the sub-pixel, wherein a portion of the first electrode in the light emitting part is on the first bank pattern, and wherein the first electrode extends in the first direction from the sub-area to a sub-area of an adjacent sub-pixel.

A width of the first electrode in the second direction may be different depending on a position thereof in the first direction, wherein the portion of the first electrode in the light emitting part on the first bank pattern has a width that is greater than a width of the first bank pattern.

The first electrode may cover both side surfaces of the first bank pattern.

According to embodiments, a display device includes sub-pixels including a light emitting part, and sub-areas on respective sides of the light emitting part in a first direction, a first electrode in the light emitting part and extending in the first direction, and a second electrode extending in the first direction and spaced apart from the first electrode in a second direction crossing the first direction, a first insulating layer on the first electrode and the second electrode, a light emitting element on the first electrode and the second electrode in the light emitting part, a first bank pattern at a central portion of the light emitting part below the first electrode and the second electrode, second bank patterns spaced apart from the first bank pattern with the first bank pattern interposed therebetween, and a bank layer on the first insulating layer, and separating adjacent ones of the sub-pixels, wherein the light emitting element is between the first bank pattern and one of the second bank patterns, and wherein the first insulating layer defines an opening pattern overlapping the bank layer.

The sub-pixels may be arranged along the first direction and the second direction, wherein the bank layer is in a lattice shape along the first direction and the second direction, and wherein the opening pattern is arranged along the bank layer, and extends in the first direction in plan view.

The second electrode may include an electrode stem part extending in the first direction, and electrode branch parts branched from the electrode stem part, wherein the opening pattern is between the electrode branch parts in plan view.

Detailed contents of other embodiments are described in a detailed description and are illustrated in the drawings.

With the display device according to embodiments, the number of lines may be decreased by applying the same second source voltage to each of adjacent sub-pixels through the same second electrode.

The aspects of the present disclosure are not limited to the aforementioned aspects, and various other aspects are included in the present specification.

DETAILED DESCRIPTION

Aspects of some embodiments of the present disclosure and methods of accomplishing the same may be understood more readily by reference to the detailed description of embodiments and the accompanying drawings. Hereinafter, embodiments will be described in more detail with reference to the accompanying drawings. The described embodiments, however, may have various modifications and may be embodied in various different forms, and should not be construed as being limited to only the illustrated embodiments herein. Rather, these embodiments are provided as examples so that this disclosure will be thorough and complete, and will fully convey the aspects of the present disclosure to those skilled in the art, and it should be understood that the present disclosure covers all the modifications, equivalents, and replacements within the idea and technical scope of the present disclosure. Accordingly, processes, elements, and techniques that are not necessary to those having ordinary skill in the art for a complete understanding of the aspects of the present disclosure may not be described.

Unless otherwise noted, like reference numerals, characters, or combinations thereof denote like elements throughout the attached drawings and the written description, and thus, descriptions thereof will not be repeated. Further, parts that are not related to, or that are irrelevant to, the description of the embodiments might not be shown to make the description clear.

Thus, the regions illustrated in the drawings are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to be limiting. Additionally, as those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present disclosure.

It will be understood that when an element, layer, region, or component is referred to as being “formed on,” “on,” “connected to,” or “coupled to” another element, layer, region, or component, it can be directly formed on, on, connected to, or coupled to the other element, layer, region, or component, or indirectly formed on, on, connected to, or coupled to the other element, layer, region, or component such that one or more intervening elements, layers, regions, or components may be present. In addition, this may collectively mean a direct or indirect coupling or connection and an integral or non-integral coupling or connection. For example, when a layer, region, or component is referred to as being “electrically connected” or “electrically coupled” to another layer, region, or component, it can be directly electrically connected or coupled to the other layer, region, and/or component or intervening layers, regions, or components may be present. However, “directly connected/directly coupled,” or “directly on,” refers to one component directly connecting or coupling another component, or being on another component, without an intermediate component. Meanwhile, other expressions describing relationships between components such as “between,” “immediately between” or “adjacent to” and “directly adjacent to” may be construed similarly. In addition, it will also be understood that when an element or layer is referred to as being “between” two elements or layers, it can be the only element or layer between the two elements or layers, or one or more intervening elements or layers may also be present.

It will be understood that, although the terms “first,” “second,” “third,” etc., may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section described below could be termed a second element, component, region, layer or section, without departing from the spirit and scope of the present disclosure. The description of an element as a “first” element may not require or imply the presence of a second element or other elements. The terms “first”, “second”, etc. may also be used herein to differentiate different categories or sets of elements. For conciseness, the terms “first”, “second”, etc. may represent “first-category (or first-set)”, “second-category (or second-set)”, etc., respectively.

FIG.1is a schematic plan view of a display device according to some embodiments.

Referring toFIG.1, a display device10displays a moving image or a still image. The display device10may refer to all electronic devices that provide display screens. For example, televisions, laptop computers, monitors, billboards, the Internet of Things (IoT), mobile phones, smartphones, tablet personal computers (PCs), electronic watches, smart watches, watch phones, head mounted displays, mobile communication terminals, electronic notebooks, electronic books, portable multimedia players (PMPs), navigation devices, game machines, digital cameras, camcorders, and the like, which provide display screens, may be included in the display device10.

The display device10includes a display panel providing a display screen. Examples of the display panel may include an inorganic light emitting diode display panel, an organic light emitting display panel, a quantum dot light emitting display panel, a plasma display panel, a field emission display panel, and the like. Hereinafter, a case where an inorganic light emitting diode display panel is applied as an example of the display panel will be described by way of example, but the present disclosure is not limited thereto, and the same technical spirit may be applied to other display panels if applicable.

A shape of the display device10may be variously changed. For example, the display device10may have a shape such as a rectangular shape with a width that is greater than a length, a rectangular shape with a length that is greater than a width, a square shape, a rectangular shape with rounded corners (vertices), other polygonal shapes, or a circular shape. A shape of a display area DPA of the display device10may also be similar to an overall shape of the display device10. InFIG.1, the display device10having a rectangular shape with a greater length in a second direction DR2than a width in a first direction DR1is illustrated.

The display device10may include a display area DPA and a non-display area NDA. The display area DPA is an area in which a screen may be displayed, and the non-display area NDA is an area in which a screen is not displayed. The display area DPA may also be referred to as an active area, and the non-display area NDA may also be referred to as a non-active area. The display area DPA may occupy substantially the center of the display device10.

The display area DPA may include a plurality of pixels PX. The plurality of pixels PX may be arranged in a matrix direction. A shape of each pixel PX may be a rectangular shape or a square shape in plan view, but is not limited thereto, and may also be a rhombic shape of which each side is inclined with respect to one direction. The respective pixels PX may be alternately arranged in a stripe type or a PENTILE™ type (e.g., a PENTILE™ matrix structure, a PENTILE™ structure, or an RGBG structure). PENTILE™ is a registered trademark of Samsung Display Co., Ltd., Republic of Korea. In addition, each of the pixels PX may include one or more light emitting elements emitting light of a corresponding wavelength band to display a corresponding color.

The non-display area NDA may be located around the display area DPA. The non-display area NDA may entirely or partially surround the display area DPA. The display area DPA may have a rectangular shape, and the non-display area NDA may be located adjacent to four sides of the display area DPA. The non-display area

NDA may constitute a bezel of the display device10. Lines or circuit drivers included in the display device10may be located, or external devices may be mounted, in the non-display area NDA.

FIG.2is a layout diagram illustrating sub-pixels according to some embodiments.

Referring toFIG.2, the plurality of pixels PX may be arranged in a first direction DR1and a second direction DR2in the display area DA. Each of the plurality of pixels PX may include a plurality of sub-pixels SPX1, SPX2, and SPX3. For example, each of the plurality of pixels PX may include three sub-pixels, that is, a first sub-pixel SPX1, a second sub-pixel SPX2, and a third sub-pixel SPX3, as illustrated inFIG.2, but the number of sub-pixels included in each of the plurality of pixels PX is not limited thereto. For example, each of the plurality of pixels PX may include four or more sub-pixels.

The plurality of sub-pixels SPX1, SPX2, and SPX3may be arranged in the second direction DR2, but an arrangement direction of the plurality of sub-pixels SPX1, SPX2, and SPX3is not limited thereto. For example, the plurality of sub-pixels SPX1, SPX2, and SPX3may be arranged in the first direction DR1.

Each of the plurality of sub-pixels SPX1, SPX2, and SPX3may include a light emitting part and a light blocking part. For example, the first sub-pixel SPX1may include a first light emitting part EMA1and a light blocking part BA (e.g., a portion of the light blocking part BA), the second sub-pixel SPX2may include a second light emitting part EMA2and a light blocking part BA (e.g., an additional portion of the light blocking part BA), and the third sub-pixel SPX3may include a third light emitting part EMA3and a light blocking part BA (e.g., another portion of the light blocking part BA).

The first light emitting part EMA1, the second light emitting part EMA2, and the third light emitting part EMA3may emit light of the same color. In this case, the first sub-pixel SPX1may convert light of a third color output from the first light emitting part EMA1into light of a first color, and may output the light of the first color. The second sub-pixel SPX2may convert light of a third color output from the second light emitting part EMA2into light of a second color, and may output the light of the second color. The third sub-pixel SPX3may output light of a third color that is output from the third light emitting part EMA3as it is.

Alternatively, the first light emitting part EMA1, the second light emitting part EMA2, and the third light emitting part EMA3may emit light of different respective colors. In this case, the first sub-pixel SPX1may output light of a first color that is output from the first light emitting part EMA1, the second sub-pixel SPX2may output light of a second color that is output from the second light emitting part EMA2, and the third sub-pixel SPX3may output light of a third color that is output from the third light emitting part EMA3.

It has been illustrated inFIG.2that the first light emitting part EMA1, the second light emitting part EMA2, and the third light emitting part EMA3have the same area, but the present disclosure is not limited thereto. The first light emitting part EMA1, the second light emitting part EMA2, and the third light emitting part EMA3may have different areas corresponding to respective colors of the light or wavelength bands of the light.

FIG.3is a cross-sectional view illustrating an example of a display panel taken along the line Q1-Q1′ ofFIG.2.

Referring toFIGS.2and3, the display device may include a substrate SUB, a buffer layer BL, a thin film transistor layer TFTL, and a light emitting element layer EML.

The substrate SUB may be a base substrate or a base member, and may be made of an insulating material such as a polymer resin. As an example, the substrate

SUB may be a rigid substrate. When the substrate SUB is the rigid substrate, the substrate SUB may include a glass material or a metal material, but is not limited thereto. As another example, the substrate SUB may be a flexible substrate that may be bent, folded, or rolled. When the substrate SUB is the flexible substrate, the substrate SUB may include polyimide PI, but is not limited thereto.

The buffer layer BL may be located on the substrate SUB. The buffer layer BL may be formed as an inorganic film capable of reducing or preventing permeation of air or moisture. For example, the buffer layer BL may include a plurality of inorganic films that are alternately stacked.

The thin film transistor layer TFTL may include a thin film transistor T, a gate insulating film GI, an interlayer insulating film IL1, and a via layer VIA.

The thin film transistor T may be located on the buffer layer BL, and may constitute a pixel circuit of each of the plurality of pixels. For example, the thin film transistor T may be a driving transistor (e.g., a first transistor T1ofFIG.6) or a switching transistor of the pixel circuit. The thin film transistor T may include a semiconductor layer ACT, a gate electrode GE, a source electrode SE, and a drain electrode DE.

The semiconductor layer ACT may be provided on the buffer layer BL. The semiconductor layer ACT may overlap the gate electrode GE, the source electrode SE, and the drain electrode DE. The semiconductor layer ACT may be in direct contact with the source electrode SE and the drain electrode DE, and may face the gate electrode GE with the gate insulating film GI interposed therebetween.

The gate electrode GE may be located on the gate insulating film GI. The gate electrode GE may overlap the semiconductor layer ACT with the gate insulating film GI interposed therebetween.

The source electrode SE and the drain electrode DE may be spaced apart from each other on the interlayer insulating film IL1. The source electrode SE may be in contact with one end of the semiconductor layer ACT through a contact hole provided in the gate insulating film GI and the interlayer insulating film IL1. The drain electrode DE may be in contact with the other end of the semiconductor layer ACT through a contact hole provided in the gate insulating film GI and the interlayer insulating film IL1. The drain electrode DE may be connected to a first electrode RME1of a light emitting member EL through the contact hole provided in the gate insulating film GI and the interlayer insulating film IL1.

The gate insulating film GI may be provided on the semiconductor layer

ACT. For example, the gate insulating film GI may be located on the semiconductor layer ACT and the buffer layer BL, and may insulate the semiconductor layer ACT and the gate electrode GE from each other. The gate insulating film GI may include a contact hole through which the source electrode SE penetrates therethrough, and a contact hole through which the drain electrode DE penetrates therethrough.

The interlayer insulating film IL1may be located on the gate electrode GE. For example, the interlayer insulating film IL1may include a contact hole through which the source electrode SE penetrates therethrough, and a contact hole through which the drain electrode DE penetrates therethrough. Here, the contact holes of the interlayer insulating film IL1may be connected to, or in continuity with, the contact holes of the gate insulating film GI.

The via layer VIA may be provided on the interlayer insulating film IL1to planarize an upper end of the thin film transistor T. For example, the via layer VIA may include a contact hole through which the first electrode RME1of the light emitting member EL penetrates therethrough. Here, the contact hole of the via layer VIA may be connected to, or in continuity with, the contact hole of the first gate insulating film GI.

The light emitting element layer EML may include the light emitting member EL, bank patterns BP (BP1and BP2), a bank layer BNL, a first passivation layer PAS1, a second passivation layer PAS2, and a third passivation layer PAS3.

The light emitting member EL may be provided on the thin film transistor T. The light emitting member EL may include the first electrode RME1, a second electrode RME2, and a light emitting element ED.

The first electrode RME1may be provided on the via layer VIA. For example, the first electrode RME1may be located on the bank pattern BP (e.g., a first bank pattern BP1) located on the via layer VIA to cover the bank pattern BP. In addition, the first electrode RME1may be connected to the drain electrode DE of the thin film transistor T. The first electrode RME1may be an anode electrode of the light emitting element ED, but is not limited thereto.

The second electrode RME2may be provided on the via layer VIA. For example, the second electrode RME2may be located on the bank pattern BP (e.g., a second bank pattern BP2) located on the via layer VIA to cover the bank pattern BP.

For example, the second electrode RME2may receive a common voltage supplied to all pixels. The second electrode RME2may be a cathode electrode of the light emitting element ED, but is not limited thereto.

The first insulating layer PAS1may cover a portion of the first electrode RME1and a portion of the second electrode RME2adjacent to each other, and may insulate the first electrode RME1and the second electrode RME2from each other.

The light emitting element ED may be located between the first electrode RME1and the second electrode RME2above the via layer VIA. The light emitting element ED may be located on the first insulating layer PAS1. One end of the light emitting element ED may be connected to the first electrode RME1, and the other end of the light emitting element ED may be connected to the second electrode RME2. For example, a plurality of light emitting elements ED may include active layers having the same material to emit light of the same wavelength band, or to emit light of the same color. Light emitted from each of the first to third light emitting parts EMA1, EMA2, and EMA3may have the same color. For example, the plurality of light emitting elements ED may emit light of a third color, or blue light, having a peak wavelength in the range of about 440 nm to about 480 nm. Therefore, the light emitting element layer EML may emit the light of the third color or the blue light.

The bank layer BNL may be located on the via layer VIA. The bank layer BNL may separate and insulate the first electrodes RME1or the second electrodes RME2of each of a plurality of light emitting members EL from each other.

The second passivation layer PAS2and the third passivation layer PAS3may be located on the plurality of light emitting members EL and the bank layer BNL. The second passivation layer PAS2may cover the plurality of light emitting members EL, and may protect the plurality of light emitting members EL. The second passivation layer PAS2and the third passivation layer PAS3may reduce or prevent permeation of impurities, such as moisture or air from the outside, to reduce or prevent the likelihood of damage to the plurality of light emitting members EL.

The display device10may further include a first planarization layer OC1, a first capping layer CAP1, a first light blocking member BK1, a first wavelength conversion part WLC1, a second wavelength conversion part WLC2, a light transmission part LTU, a second capping layer CAP2, a second planarization layer OC2, a second light blocking member BK2, first to third color filters CF1, CF2, and CF3, a fourth passivation layer PAS4, and an encapsulation layer ENC.

The first planarization layer OC1may be provided on the light emitting element layer EML to planarize an upper end of the light emitting element layer EML. The first planarization layer OC1may include an organic material. For example, the first planarization layer OC1may include at least one of an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, and a polyimide resin.

The first capping layer CAP1may be located on the first planarization layer OC1. The first capping layer CAP1may seal lower surfaces of the first and second wavelength conversion parts WLC1and WLC2and the light transmission part LTU. The first capping layer CAP1may include an inorganic material. For example, the first capping layer CAP1may include at least one of silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, titanium oxide, tin oxide, cerium oxide, and silicon oxynitride.

The first light blocking member BK1may be located in the light blocking parts BA and on the first capping layer CAP1. The first light blocking member BK1may overlap the bank layer BNL in a thickness direction. The first light blocking member BK1may block transmission of light. The first light blocking member BK1may reduce or prevent colors being mixed with each other due to permeation of the light between the first to third light emitting parts EMA1, EMA2, and EMA3to improve a color reproduction rate. The first light blocking member BK1may be located in a lattice shape surrounding the first to third light emitting parts EMA1, EMA2, and EMA3in plan view.

The first light blocking member BK1may include an organic light blocking material and a liquid repellent component. Here, the liquid repellent component may be made of a fluorine-containing monomer or a fluorine-containing polymer, and, for example, may include a fluorine-containing aliphatic polycarbonate. For example, the first light blocking member BK1may be made of a black organic material including a liquid repellent component. The first light blocking member BK1may be formed through coating and exposing processes or the like of an organic light blocking material including a liquid repellent component.

The first light blocking member BK1includes the liquid repellent component, and may thus separate the first and second wavelength conversion parts WLC1and WLC2and the light transmission part LTU into corresponding light emitting parts EMA. For example, when the first and second wavelength conversion parts WLC1and WLC2and the light transmission part LTU are formed in an inkjet manner, an ink composition may flow onto an upper surface of the first light blocking member BK1. In this case, the first light blocking member BK1may include the liquid repellent component to guide the ink compositions to flow into each of transmission areas. Accordingly, the first light blocking member BK1may reduce or prevent the ink compositions being mixed with each other.

The first wavelength conversion part WLC1may be located in the first light emitting part EMA1on the first capping layer CAP1. The first wavelength conversion part WLC1may be surrounded by the first light blocking member BK1. The first wavelength conversion part WLC1may include a first base resin BS1, first scatterers SCT1, and first wavelength shifters WLS1.

The first base resin BS1may include a material having a relatively high light transmittance. The first base resin BS1may be made of a transparent organic material. For example, the first base resin BS1may include at least one of organic materials such as an epoxy-based resin, an acrylic resin, a cardo-based resin, and an imide-based resin.

The first scatterer SCT1may have a refractive index different from that of the first base resin BS1, and may form an optical interface with the first base resin BS1. For example, the first scatterer SCT1may include a light scattering material or a light scattering particle for scattering at least a portion of transmitted light. For example, the first scatterer SCT1may include a metal oxide such as titanium oxide (TiO2), zirconium oxide (ZrO2), aluminum oxide (Al2O3), indium oxide (In2O3), zinc oxide (ZnO), or tin oxide (SnO2) or include an organic particle such as an acrylic resin or a urethane-based resin. The first scatterer SCT1may scatter light in a random direction regardless of an incident direction of incident light without substantially converting a peak wavelength of the incident light.

The first wavelength shifter WLS1may convert or shift the peak wavelength of the incident light to a first peak wavelength. For example, the first wavelength shifter WLS1may convert the blue light provided from the display device10into red light having a single peak wavelength in the range of about 610 nm to about 650 nm, and may emit the red light. The first wavelength shifter WLS1may be a quantum dot, a quantum rod, or a phosphor. The quantum dot may be a particulate matter for emitting a corresponding color while electrons are transitioning from a conduction band to a valence band.

For example, the quantum dot may be a semiconductor nanocrystal material. The quantum dot may have a corresponding band gap according to its composition and size to absorb light, and then may emit light having a unique wavelength. Examples of semiconductor nanocrystals of the quantum dot may include group IV nanocrystals, group II-VI compound nanocrystals, group III-V compound nanocrystals, group IV-VI compound nanocrystals, or combinations thereof.

For example, the binary compound, the ternary compound, or the quaternary compound may be present in a particle at a uniform concentration or may be present in the same particle in a state in which concentration distributions are partially different from each other.

For example, the quantum dot may have a core-shell structure including a core including the above-described nanocrystals and a shell surrounding the core. The shell of the quantum dot may serve as a protective layer for maintaining semiconductor characteristics by reducing or preventing chemical modification of the core and/or serve as a charging layer for imparting electrophoretic characteristics to the quantum dot. The shell may be a single layer or a multilayer. An interface between the core and the shell may have a concentration gradient in which a concentration of element present in the shell decreases toward the center. The shell of the quantum dot may be made of a metal or non-metal oxide, a semiconductor compound, a combination thereof, or the like.

The light emitted by the first wavelength shifter WLS1may have a full width of half maximum (FWHM) of an emission wavelength spectrum of about 45 nm or less, about 40 nm or less, or about 30 nm or less, and may further improve color purity and color reproducibility of colors displayed by the display device10. The light emitted by the first wavelength shifter WLS1may be emitted toward several directions regardless of the incident direction of the incident light. Accordingly, side visibility of a red color displayed on the first light emitting part EMA1may be improved.

A portion of the blue light provided from the light emitting element layer EML may be transmitted through the first wavelength conversion part WLC1without being converted into red light by the first wavelength shifter WLS1. Light incident on the first color filter CF1without being converted by the first wavelength conversion part WLC1in the blue light provided from the light emitting element layer EML may be blocked by the first color filter CF1. In addition, the red light converted by the first wavelength conversion part WLC1in the blue light provided from the display device10may be transmitted through the first color filter CF1and then emitted to the outside. Accordingly, the first light emitting part EMA1may emit the red light.

The second wavelength conversion part WLC2may be located in the second light emitting part EMA2on the first capping layer CAP1. The second wavelength conversion part WLC2may be surrounded by the first light blocking member BK1.

The second wavelength conversion part WLC2may include a second base resin BS2, second scatterers SCT2, and second wavelength shifters WLS2.

The second base resin BS2may include a material having a relatively high light transmittance. The second base resin BS2may be made of a transparent organic material. For example, the second base resin BS2may be made of the same material as the first base resin BS1, or may be made of the material exemplified in the first base resin BS1.

The second scatterer SCT2may have a refractive index different from that of the second base resin BS2, and may form an optical interface with the second base resin BS2. For example, the second scatterer SCT2may include a light scattering material or a light scattering particle for scattering at least a portion of transmitted light. For example, the second scatterer SCT2may be made of the same material as the first scatterer SCT1, or may be made of the material exemplified in the first scatterer SCT1.

The second scatterer SCT2may scatter light in a random direction regardless of an incident direction of incident light without substantially converting a peak wavelength of the incident light.

The second wavelength shifter WLS2may convert or shift the peak wavelength of the incident light to a second peak wavelength that is different from the first peak wavelength corresponding to the first wavelength shifter WLS1. For example, the second wavelength shifter WLS2may convert the blue light provided from the display device10into green light having a single peak wavelength in the range of about 510 nm to about 550 nm, and may emit the green light. The second wavelength shifter WLS2may be a quantum dot, a quantum rod, or a phosphor. The second wavelength shifter WLS2may include the same material as the material exemplified in the first wavelength shifter WLS1. The second wavelength shifter WLS2may be made of the quantum dot, the quantum rod, or the phosphor so that a wavelength conversion range of the second wavelength shifter WLS2is different from a wavelength conversion range of the first wavelength shifter WLS1.

The light transmission part LTU may be located in the third light emitting part EMA3on the first capping layer CAP1. The light transmission part LTU may be surrounded by the first light blocking member BK1. The light transmission part LTU may transmit incident light therethrough while maintaining a peak wavelength of the incident light. The light transmission part LTU may include a third base resin BS3and third scatterers SCT3.

The third base resin BS3may include a material having a relatively high light transmittance. The third base resin BS3may be made of a transparent organic material. For example, the third base resin BS3may be made of the same material as the first or second base resin BS1or BS2, or may be made of the material exemplified in the first or second base resin BS1or BS2.

The third scatterer SCT3may have a refractive index that is different from that of the third base resin BS3, and may form an optical interface with the third base resin BS3. For example, the third scatterer SCT3may include a light scattering material or a light scattering particle for scattering at least a portion of transmitted light. For example, the third scatterer SCT3may be made of the same material as the first or second scatterer SCT1or SCT2, or may be made of the material exemplified in the first or second scatterer SCT1or SCT2. The third scatterer SCT3may scatter light in a random direction regardless of an incident direction of incident light without substantially converting a peak wavelength of the incident light.

Because the first and second wavelength conversion parts WLC1and WLC2and the light transmission part LTU are located on the light emitting element layer EML (e.g., above the first planarization layer OC1and the first capping layer CAP1), the display device10may not require a separate substrate for the first and second wavelength conversion parts WLC1and WLC2and the light transmission part LTU. Accordingly, the first and second wavelength conversion parts WLC1and WLC2and the light transmission part LTU may be suitably aligned in the first to third light emitting parts EMA1, EMA2and EMA3, respectively, and a thickness of the display device10may be relatively decreased.

The second capping layer CAP2may cover the first and second wavelength conversion parts WLC1and WLC2, the light transmission part LTU, and the first light blocking member BK1. For example, the second capping layer CAP2may seal the first and second wavelength conversion parts WLC1and WLC2and the light transmission part LTU to reduce or prevent the likelihood of damage to, or contamination of, the first and second wavelength conversion parts WLC1and WLC2and the light transmission part LTU. The second capping layer CAP2may be made of the same material as the first capping layer CAP1, or may be made of the material exemplified in the first capping layer CAP1.

The second planarization layer OC2may be located on the second capping layer CAP2to planarize upper ends of the first and second wavelength conversion parts WLC1and WLC2and the light transmission part LTU. The second planarization layer OC2may include an organic material. For example, the second planarization layer OC2may include at least one of an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, and a polyimide resin.

The second light blocking member BK2may be located in the light blocking parts BA on the second planarization layer OC2. The second light blocking member BK2may overlap the first light blocking member BK1or the bank layer BNL in the thickness direction. The second light blocking member BK2may block transmission of light. The second light blocking member BK2may reduce or prevent colors being mixed with each other due to permeation of the light between the first to third light emitting parts EMA1, EMA2, and EMA3to improve a color reproduction rate. The second light blocking member BK2may be located in a lattice shape surrounding the first to third light emitting parts EMA1, EMA2, and EMA3in plan view.

The first color filter CF1may be located in the first light emitting part EMA1on the second planarization layer OC2. The first color filter CF1may be surrounded by the second light blocking member BK2. The first color filter CF1may overlap the first wavelength conversion part WLC1in the thickness direction. The first color filter CF1may selectively transmit light of a first color (e.g., red light), and may block or may absorb light of a second color (e.g., green light) and light of a third color (e.g., blue light). For example, the first color filter CF1may be a red color filter, and may include a red colorant. The red colorant may be made of a red dye or a red pigment.

The second color filter CF2may be located in the second light emitting part EMA2on the second planarization layer OC2. The second color filter CF2may be surrounded by the second light blocking member BK2. The second color filter CF2may overlap the second wavelength conversion part WLC2in the thickness direction. The second color filter CF2may selectively transmit the light of the second color (e.g., the green light), and may block or may absorb the light of the first color (e.g., the red light) and the light of the third color (e.g., the blue light). For example, the second color filter CF2may be a green color filter, and may include a green colorant. The green colorant may be made of a green dye or a green pigment.

The third color filter CF3may be located in the third light emitting part EMA3on the second planarization layer OC2. The third color filter CF3may be surrounded by the second light blocking member BK2. The third color filter CF3may overlap the light transmission part LTU in the thickness direction. The third color filter CF3may selectively transmit the light of the third color (e.g., the blue light), and may block or may absorb the light of the first color (e.g., the red light) and the light of the second color (e.g., the green light). For example, the third color filter CF3may be a blue color filter, and may include a blue colorant. The blue colorant may be made of a blue dye or a blue pigment.

The first to third color filters CF1, CF2, and CF3may absorb a portion of light introduced from the outside of the display device10to reduce reflected light due to external light. Therefore, the first to third color filters CF1, CF2, and CF3may reduce or prevent distortion of colors due to external light reflection.

Because the first to third color filters CF1, CF2, and CF3are located on the first and second wavelength conversion parts WLC1and WLC2and the light transmission part LTU, respectively, through the second planarization layer OC2, the display device10may not require a separate substrate for the first to third color filters CF1, CF2, and CF3. Accordingly, a thickness of the display device10may be relatively decreased.

The fourth passivation layer PAS4may cover the first to third color filters CF1, CF2, and CF3. The fourth passivation layer PAS4may protect the first to third color filters CF1, CF2, and CF3.

The encapsulation layer ENC may be located on the fourth passivation layer PAS4. For example, the encapsulation layer ENC may include at least one inorganic film to reduce or prevent permeation of oxygen or moisture. In addition, the encapsulation layer ENC may include at least one organic film to protect the display device10from foreign materials, such as dust.

FIG.4is a plan view illustrating one pixel of the display device according to some embodiments.FIG.5is a view illustrating a first sub-pixel ofFIG.4.FIG.6is a cross-sectional view taken along the lines N1-N1′, N2-N2′, and N3-N3′ ofFIG.5.FIG.7is a cross-sectional view taken along the lines N4-N4′, N5-N5′, and N6-N6′ ofFIG.5.FIG.6illustrates a cross section crossing respective contact parts CT1and CT2together with both ends of light emitting elements ED1and ED2in the first sub-pixel SPX1.FIG.7illustrates a cross section crossing respective contact holes CTD, CTS, and CTA in the first sub-pixel SPX1.FIG.13is a schematic view illustrating outgassing through an opening hole of a first insulating layer according to some embodiments.

Referring toFIGS.4to7, the display device10according to some embodiments may include electrodes RME (RME1and RME2), bank patterns BP (BP1and BP2), a bank layer BNL, and connection electrodes CNE (CNE1, CNE2, and CNE3).

The bank layer BNL may extend in the first direction DR1and the second direction DR2to be located in a complete lattice pattern. Areas surrounded by portions of the bank layer BNL extending in the first direction DR1and the second direction DR2may be an emission area EMA and a sub-area SA of each sub-pixel SPXn. Correspondingly, respective sub-pixels SPXn of one pixel PX may have substantially the same structure. Unlike some embodiments ofFIG.2, the sub-area SA may be located on the upper side of (e.g., above, in a plan view) the emission area EMA, which is one side of the emission area EMA in the first direction DR1, and emission areas EMA and sub-areas SA of different sub-pixels SPXn may be located side by side in the second direction DR2.

A plurality of bank patterns BP1and BP2may have a shape extending in the first direction DR1, and may be smaller than a length of the emission area EMA in the first direction DR1. In addition, widths of the plurality of bank patterns BP1and BP2measured in the second direction DR2may be different from each other, and any one of the bank patterns BP1and BP2may be located over the sub-pixels SPXn neighboring to each other in the second direction DR2. For example, the bank patterns BP1and BP2may include a first bank pattern BP1located in the emission area EMA of each sub-pixel SPXn, and a second bank pattern BP2located over the emission areas EMA of the different adjacent sub-pixels SPXn.

The first bank pattern BP1is located at a central portion of the emission area EMA, and the second bank patterns BP2are spaced apart from the first bank pattern BP1with the first bank pattern BP1therebetween. The first bank patterns BP1and the second bank patterns BP2may be alternately located along the second direction DR2. The plurality of light emitting elements ED may be located between the first bank pattern BP1and the second bank patterns BP2spaced apart from each other.

The first bank pattern BP1and the second bank pattern BP2may have the same length in the first direction DR1, but may have different widths measured in the second direction DR2. A portion of the bank layer BNL extending in the first direction DR1may overlap the second bank pattern BP2in the thickness direction. The bank patterns BP1and BP2may be located as island-shaped patterns in the entirety of the display area DPA.

A plurality of electrodes RME include the first electrode RME1located at a central portion of each sub-pixel SPXn, and the second electrodes RME2located over the different adjacent sub-pixels SPXn. The first electrode RME1and the second electrode RME2may generally have a shape extending in the first direction DR1, but portions of the first electrode RME1and the second electrode RME2located in the emission area EMA may have different shapes.

The first electrode RME1may be located at the center of the sub-pixel SPXn, and a portion of the first electrode RME1located in the emission area EMA may be located on the first bank pattern BP1. The first electrode RME1may extend from the sub-area SA in the first direction DR1, and may extend to a sub-area SA of another sub-pixel SPXn. The first electrode RME1may have a shape in which a width thereof measured in the second direction DR2varies depending on a position along the first direction DR1, and at least a portion of the first electrode RME1located on the first bank pattern BP1in the emission area EMA may have a width that is greater than that of the first bank pattern BP1. The first electrode RME1may cover both side surfaces of the first bank pattern BP1.

The second electrode RME2may include a portion extending in the first direction DR1, and portions branched in the vicinity of the emission area EMA. In some embodiments, the second electrode RME2may include an electrode stem part RM_S extending in the first direction DR1, and a plurality of electrode branch parts RM_B1and RM_B2branched from the electrode stem part RM_S, bent in or toward the second direction DR2, and then extending again in the first direction DR1. The electrode stem part RM_S may overlap a portion of the bank layer BNL extending in the first direction DR1, and may be located on one side of the sub-area SA in the second direction DR2. The electrode branch parts RM_B1and RM_B2may be branched from the electrode stem part RM_S located at a portion of the bank layer BNL extending both in the first direction DR1and in the second direction DR2, and may be bent (e.g., outwardly) to both sides corresponding the second direction DR2, respectively. The electrode branch parts RM_B1and RM_B2may cross the emission area EMA in the first direction DR1, may be bent again (e.g., inwardly), and may be integrated with the electrode stem part RM_S to be connected to each other. That is, the electrode branch parts RM_B1and RM_B2of the second electrode RME2may be branched away from each other on the upper side of the emission area EMA of any one sub-pixel SPXn, and then connected to each other again on the lower side of the emission area EMA.

The second electrode RME2may include a first electrode branch part RM_B1located on the left side of the first electrode RME1, and a second electrode branch part RM_B2located on the right side of the first electrode RME1. The electrode branch parts RM_B1and RM_B2included in one second electrode RME2may be located in the emission areas EMA of sub-pixels SPXn neighboring each other in the second direction DR2, respectively, and the electrode branch parts RM_B1and RM_B2of a different second electrode RME2may be located in one of the aforementioned sub-pixels SPXn and in another neighboring sub-pixel SPXn. The first electrode branch part RM_B1of one second electrode RME2may be located on the left side of the first electrode RME1, and the second electrode branch part RM_B2of another second electrode RME2may be located on the right side of the first electrode RME1.

The respective electrode branch parts RM_B1and RM_B2of the second electrodes RME2may be located on respective sides of the second bank patterns BP2. The first electrode branch part RM_B1of one second electrode RME2may be located on the second bank pattern BP2located on the left side of the first bank pattern BP1, and the second electrode branch part RM_B2of another second electrode RME2may be located on the second bank pattern BP2located on the right side of the first bank pattern BP1. Both sides of the first electrode RME1may be spaced apart from and face different electrode branch parts RM_B1and RM_B2of different second electrodes RME2, and respective intervals between the first electrode RME1and adjacent electrode branch parts RM_B1and RM_B2may be less than an interval between the bank patterns BP1and BP2.

In addition, a width of the first electrode RME1measured in the second direction DR2may be greater than those of the electrode stem part RM_S and the electrode branch parts RM_B1and RM_B2of the second electrode RME2. The first electrode RME1may cover both sides of the first bank pattern BP1, while the second electrodes RME2may be formed to have a relatively small width, such that the electrode branch parts RM_B1and RM_B2may respectively cover only one side of the second bank patterns BP2.

The first electrode RME1may be in contact with a second conductive pattern CDP2of a third conductive layer through a first contact hole CTD at a portion thereof overlapping a portion of the bank layer BNL extending in the second direction DR2. Unlike some embodiments corresponding toFIG.2, the first contact hole CTD is not located in the sub-area SA, and may be located below the bank layer BNL. The second electrode RME2may be in contact with a second voltage line VL2of the third conductive layer through a second contact hole CTS at the electrode stem part RM_S. In addition, the first electrode RME1may be in contact with a first connection electrode CNE1through a first contact part CT1of the first insulating layer PAS1located at a portion thereof located in the sub-area SA. The second electrode RME2may include a portion protruding from the electrode stem part RM_S in the third direction DR3and located in the sub-area SA, and may be in contact with a second connection electrode CNE2through a second contact part CT2of, or defined by, the first insulating layer PAS1and located at the protruding portion.

Meanwhile, positions of the first contact holes CTD of the sub-pixels SPXn in one pixel PX may be different from each other. For example, in the first sub-pixel SPX1, the first contact hole CTD may be located on the upper side of the emission area EMA, and in the second sub-pixel SPX2and the third sub-pixel SPX3, the first contact holes CTD may be located on the lower side of the emission areas EMA.

The first electrodes RME1may be located up to (e.g., to have a corresponding edge in) separation parts ROP of the sub-areas SA, while the second electrodes RME2may not be separated in the sub-areas SA. One second electrode RME2may include a plurality of electrode stem parts RM_S and electrode branch parts RM_B1and RM_B2to have a shape extending in the first direction DR1, and may be branched in the vicinity of the emission area EMA of each sub-pixel SPXn. The first electrode RME1may be located between the separation parts ROP located in the sub-areas SA of respective adjacent sub-pixels SPXn, and may cross the emission area EMA.

According to some embodiments, the display device10may include a dummy pattern DP located in the sub-area SA, and located between the first electrodes RME1of the different sub-pixels SPXn. The dummy pattern DP may be in the sub-area SA, and may be spaced apart from adjacent first electrodes RME1with respective separation parts ROP interposed therebetween. Two separation parts ROP may be located in one sub-area SA. The dummy pattern DP may be spaced apart from the first electrode RME1located in one sub-pixel SPXn with a lower separation part ROP interposed therebetween, and may be spaced apart from the first electrode RME1located in another sub-pixel SPXn (e.g., another sub-pixel SPXn above and adjacent to the one sub-pixel SPXn) with an upper separation part ROP interposed therebetween.

The dummy pattern DP may be initially formed in a state in which it is connected to different first electrodes RME1through an electrode connection part CEP (e.g., seeFIGS.10and11). Because the first insulating layer PAS1and the second insulating layer PAS2are not located in the separation parts ROP, a process of removing the electrode connection part CEP may be performed in the separation parts ROP, and a plurality of first electrodes RME1connected to the dummy pattern DP may be separated from each other.

In some embodiments, the dummy pattern DP may be connected to a first voltage line VL1of the third conductive layer through a third contact hole CTA penetrating through the via layer VIA. The first electrode RME1may be formed in a state in which it is connected to the dummy pattern DP, and an electrical signal applied to arrange or align the light emitting elements ED may be applied from the first voltage line VL1to the first electrode RME1through the dummy pattern DP. In a process of arranging or aligning the light emitting element ED, signals may be applied to the first voltage line VL1and the second voltage line VL2, and may be transferred to the first electrode RME1and the second electrode RME2, respectively.

The plurality of light emitting elements ED may be located on different electrodes RME between different bank patterns BP1and BP2. The light emitting elements ED may include first light emitting elements ED1having both ends located on the first electrode RME1and the second electrode branch part RM_B2of the second electrode RME2, respectively, and second light emitting elements ED2having both ends located on the first electrode RME1and the first electrode branch part RM_B1of the other second electrode RME2, respectively. The first light emitting elements ED1may be located on the right side with respect to the first electrode RME1, and the second light emitting elements ED2may be located on the left side with respect to the first electrode RME1.

A plurality of connection electrodes CNE may include a first connection electrode CNE1and a second connection electrode CNE2, which are first-type connection electrodes, and a third connection electrode CNE3, which is a second-type connection electrode.

The first connection electrode CNE1may have a shape extending in the first direction DR1, and may be located on the first electrode RME1. A portion of the first connection electrode CNE1located on the first bank pattern BP1may overlap the first electrode RME1, and the first connection electrode CNE1may extend from such a portion in the first direction DR1to be located up to the sub-area SA at the upper side of the emission area EMA beyond the bank layer BNL. The first connection electrode CNE1may be in contact with the first electrode RME1through the first contact part CT1in the sub-area SA.

The second connection electrode CNE2may have a shape extending in the first direction DR1, and may be located on the second electrode RME2. A portion of the second connection electrode CNE2located on the second bank pattern BP2may overlap the second electrode RME2, and the second connection electrode CNE2may extend from such a portion in the first direction DR1to be located up to the sub-area SA at the upper side of the emission area EMA beyond the bank layer BNL. The second connection electrode CNE2may be in contact with the second electrode RME2through the second contact part CT2in the sub-area SA.

The third connection electrode CNE3may include extension parts CN_E1and CN_E2extending in the first direction DR1, and a first connection part CN_B1connecting the extension parts CN_E1and CN_E2to each other. The first extension part CN_E1faces the first connection electrode CNE1in the emission area EMA and is located on the second electrode branch part RM_B2of the second electrode RME2, and the second extension part CN_E2faces the second connection electrode CNE2in the emission area EMA and is located on the first electrode RME1. The first connection part CN_B1may extend in the second direction DR2on the bank layer BNL located on the lower side of the emission area EMA to connect the first extension part CN_E1and the second extension part CN_E2to each other. The third connection electrode CNE3may be located in the emission area EMA and on the bank layer BNL, and may not be directly connected to the electrodes RME. The second electrode branch part RM_B2located below the first extension part CN_E1may be electrically connected to the second voltage line VL2, but a second source voltage applied to the second electrode branch part RM_B2might not be transferred to the third connection electrode CNE3. The first connection electrode CNE1and the second connection electrode CNE2may be the first-type connection electrodes directly connected to the electrodes RME, and the third connection electrode CNE3may be the second-type connection electrode that is not connected to the electrodes RME.

Meanwhile, similar to some of the above-described embodiments, the separation parts ROP, which exist after a process of separating the electrodes RME is performed, are located in the sub-area SA, and the third contact hole CTA is located in the sub-area SA as a contact hole penetrating through the via layer VIA. The first insulating layer PAS1might not be located in the separation parts ROP, and may include an opening hole OP overlapping the third contact hole CTA, and the second insulating layer PAS2might not be located in the separation parts ROP, but may cover the opening hole OP.

Meanwhile, the first insulating layer PAS1of the display device according to some embodiments may include at least one opening pattern OP_PA. The at least one opening pattern OP_PA may overlap the bank layer BNL. The number of opening patterns OP_PA may be plural. The plurality of opening patterns OP_PA may be arranged along the first direction DR1, as illustrated inFIG.5. The plurality of opening patterns OP_PA arranged along the first direction DR1may overlap the bank layer BNL extending along the first direction DR1.

The opening pattern OP_PA may have a quadrangular shape in plan view. For example, the opening pattern OP_PA may have a square shape or a rectangular shape in plan view.

Some of the opening patterns OP_PA in plan view may be located between respective ones of the plurality of electrode branch parts RM_B1and RM_B2, as illustrated inFIG.5. For example, some of the opening patterns OP_PA in plan view may be located between the first electrode branch part RM_B1and the second electrode branch part RM_B2. The opening patterns OP_PA located between the first electrode branch part RM_B1and the second electrode branch part RM_B2may be spaced apart from each of the first electrode branch part RM_B1and the second electrode branch part RM_B2adjacent thereto.

In the opening pattern OP_PA of the first insulating layer PAS1, the bank layer BNL may be in direct contact with the bank pattern BP. For example, in the opening pattern OP_PA of the first insulating layer PAS1, the bank layer BNL may be in direct contact with an upper surface of the second bank pattern BP2overlapping the bank layer BNL in the thickness direction. In other words, as illustrated inFIG.13, on the opening pattern OP_PA of the first insulating layer PAS1, a gas GAS trapped in the second bank pattern BP2may be discharged upward through the bank layer BNL (e.g., seeFIG.13).

FIG.8is an enlarged view of portion B ofFIG.5.FIG.9is a cross-sectional view taken along the line N7-N7′ ofFIG.8.FIG.8illustrates a portion in which the dummy pattern DP and the separation parts ROP are located in the sub-area SA of one sub-pixel SPXn, andFIG.9illustrates a cross section crossing a plurality of separation parts ROP and the opening hole OP.

Referring toFIGS.8and9in conjunction withFIG.5, the dummy pattern DP spaced apart from the first electrodes RME1may be located in the sub-area SA, and a plurality of insulating layers PAS1, PAS2, and PAS3may be located on, or at respective layers above, the dummy pattern DP. In the sub-area SA of the display device10, the plurality of separation parts ROP may be formed with the dummy pattern DP interposed therebetween, and the first electrodes RME1of the different sub-pixels SPXn may be in contact with different separation parts ROP, respectively. The first electrode RME1of one sub-pixel SPXn may be in contact with the separation part ROP on the lower side (e.g., in a plan view) of the dummy pattern DP, and the first electrode RME1of another sub-pixel SPXn neighboring to the one sub-pixel SPXn in the first direction DR1may be in contact with the separation part ROP on the upper side (e.g., in a plan view) of the dummy pattern DP. In some embodiments, the second electrode RME2may be located so that the electrode stem part RM_S overlaps the bank layer BNL, and is spaced apart from the separation part ROP and the dummy pattern DP of the sub-area SA.

The display device10may be initially formed in a state in which the first electrodes RME1and the dummy pattern DP are connected to each other in the separation parts ROP of the sub-area SA. Thereafter, a process of separating the first electrodes RME1and the dummy pattern DP from each other is performed. A process of removing the electrode connection parts CEP connecting the dummy pattern DP and the first electrodes RME1to each other may be performed. The first insulating layer PAS1and the second insulating layer PAS2might not be located in the separation parts ROP of the sub-area SA, and the third insulating layer PAS3may cover the separation parts ROP. The third insulating layer PAS3may be in direct contact with an upper surface of the via layer VIA in the separation parts ROP, and may be in partial direct contact with the first electrodes RME1and the dummy patterns DP spaced apart from each other in the separation parts ROP.

The first insulating layer PAS1might not be located on the separation parts ROP in the sub-area SA, and may include or define the opening hole OP exposing a portion of the dummy pattern DP. The opening hole OP may overlap the third contact hole CTA, and may have a diameter that is greater than that of the third contact hole CTA. In some embodiments, an area of the separation part ROP, which is a portion where the first insulating layer PAS1is not located, may be greater than an area of the opening hole OP.

In some embodiments, the second insulating layer PAS2may cover the entirety of the sub-area SA except for the separation parts ROP. The second insulating layer PAS2may be in direct contact with the dummy pattern DP while covering the opening hole OP. The process of removing the electrode connection parts CEP in the sub-area SA may be performed in a state in which the first insulating layer PAS1and the second insulating layer PAS2are not located in the separation parts ROP, and an area other than the separation parts ROP may be protected by the second insulating layer PAS2.

FIGS.10and11are views illustrating shapes of electrodes in a sub-area in a process of manufacturing the display device.FIG.10is a plan view illustrating a state in which the dummy pattern DP and the first electrodes RME1are connected to each other by the electrode connection parts CEP in the sub-area SA, andFIG.11is a cross-sectional view taken along the line N8-N8′ ofFIG.10, and illustrates a cross section crossing the separation parts ROP and the opening hole OP.

Referring toFIGS.10and11, the display device10may be formed in a state in which the first electrodes RME1and the dummy pattern DP located in each sub-pixel SPXn are connected to each other by the electrode connection parts CEP. The dummy pattern DP may be connected to the first electrodes RME1located on the upper side and the lower side of the dummy pattern DP (e.g., in a plan view) by the electrode connection parts CEP, respectively. Because the electrode connection parts CEP are removed in a subsequent process, the separation parts ROP of the sub-area SA may be set as areas in which the electrode connection parts CEP are located.

The first insulating layer PAS1may cover the electrodes RME, but may also expose a portion of the electrode connection parts CEP and the dummy pattern DP. Locations of portions of the electrode connection parts CEP respectively connecting the dummy pattern DP and the first electrodes RME to each other become the separation parts ROP, and the first insulating layer PAS1is not located on the separation parts ROP. In addition, the first insulating layer PAS1may include or define an opening hole OP exposing a portion of the dummy pattern DP overlapping the third contact hole CTA.

The light emitting elements ED are arranged in the emission area EMA by applying electrical signals to the electrodes RME in a state in which the first insulating layer PAS1is formed. The electrical signals may be applied to the first voltage line VL1and the second voltage line VL2, and the electrical signal applied to the first voltage line VL1may be transferred to the dummy pattern DP connected to the first voltage line VL1through the third contact hole CTA. Because the dummy pattern DP is connected to the first electrodes RME1through the electrode connection parts CEP, the electrical signal may be transferred to the first electrodes RME1.

The second insulating layer PAS2may cover the light emitting elements ED after the light emitting elements ED are located. The second insulating layer PAS2may cover the emission area EMA and the sub-area SA, but might not be located in the separation parts ROP. Because the process of removing the electrode connection parts CEP is performed at the separation parts ROP, the second insulating layer PAS2may expose the electrode connection parts CEP. On the other hand, the second insulating layer PAS2covers the opening hole OP of the first insulating layer PAS1in the sub-area SA, and thus, the dummy pattern DP may not be completely exposed (e.g., may be partially covered).

Thereafter, in the process of removing the electrode connection parts CEP, areas of the sub-areas SA other than the separation parts ROP are covered by the second insulating layer PAS2, and thus, damage to the other electrodes RME due to residues generated in a patterning process may be reduced or prevented. For example, the second insulating layer PAS2covers the opening hole OP, such that the dummy pattern DP overlapping the third contact hole CTA may be protected.

FIG.12is a view illustrating a light emitting element according to some embodiments.

Referring toFIG.12, the light emitting element ED may be a light emitting diode. For example, the light emitting element ED may have a size of a micro-meter or a nano-meter scale, and may be an inorganic light emitting diode including an inorganic material. The inorganic light emitting diode may be aligned between two electrodes facing each other according to an electric field formed in a corresponding direction between the two electrodes.

The light emitting element ED may have a shape extending in one direction. The light emitting element ED may have a shape such as a rod shape, a wire shape, or a tube shape. As an example, the light emitting element ED may have a cylindrical shape or a rod shape. As another example, the light emitting element ED may have various shapes, for example, a polygonal prismatic shape such as a cubic shape, a rectangular parallelepiped shape, or a hexagonal prismatic shape or a shape extending in one direction and partially inclined. A plurality of semiconductors of the light emitting element ED may have a structure in which they are sequentially located or stacked along one direction.

The light emitting element ED may include a first semiconductor layer31, a second semiconductor layer32, an active layer36, an electrode layer37, and an insulating film38.

The first semiconductor layer31may be an n-type semiconductor. For example, when the light emitting element ED emits blue light, the first semiconductor layer31may include a semiconductor material having a chemical formula of AlxGayIn1-x-yN (0≤x≤1, 0≤y≤1, and 0≤x+y≤1). The first semiconductor layer31may include at least one semiconductor material of AlGaInN, GaN, AlGaN, InGaN, AlN, and InN doped with an n-type dopant. The first semiconductor layer31may be doped with an n-type dopant such as Si, Ge, or Sn. The first semiconductor layer31may be made of n-GaN doped with n-type Si. A length of the first semiconductor layer31may be in the range of about 1.5 μm to about 5 μm, but is not limited thereto.

The second semiconductor layer32may be located on the active layer36. For example, when the light emitting element ED emits blue light or green light, the second semiconductor layer32may include a semiconductor material having a chemical formula of AlxGayIn1-x-yN (0≤x≤1, 0≤y≤1, and 0≤x+y≤1). For example, the second semiconductor layer32may include at least one semiconductor material of AlGaInN, GaN, AlGaN, InGaN, AlN, and InN doped with a p-type dopant. The second semiconductor layer32may be doped with a p-type dopant such as Mg, Zn, Ca, Se, or Ba. The second semiconductor layer32may be made of p-GaN doped with p-type Mg. A length of the second semiconductor layer32may be in the range of about 0.05 μm to about 0.10 μm, but is not limited thereto.

Each of the first and second semiconductor layers31and32may be formed as one layer, but is not limited thereto. For example, each of the first and second semiconductor layers31and32may have a plurality of layers by further including a clad layer or a tensile strain barrier reducing (TSBR) layer.

The active layer36may be located between the first and second semiconductor layers31and32. The active layer36may include a material having a single or multiple quantum well structure. When the active layer36includes the material having the multiple quantum well structure, the active layer36may include a plurality of quantum layers and well layers that are alternately stacked. The active layer36may emit light by a combination of electron-hole pairs according to an electrical signal applied through the first and second semiconductor layers31and32. For example when the active layer36emits blue light, the active layer36may include a material such as AlGaN or AlGaInN. When the active layer36has a multiple quantum well structure, that is, a structure in which the quantum layers and the well layers are alternately stacked, the quantum layers may include a material such as AlGaN or AlGaInN, and the well layers may include a material such as GaN or AlInN. The active layer36may emit the blue light by including AlGaInN as a material of the quantum layers and AlInN as a material of the well layers.

As another example, the active layer36may have a structure in which semiconductor materials having large band gap energy and semiconductor materials having small band gap energy are alternately stacked, and may include Group III to Group V semiconductor materials depending on a wavelength band of emitted light. The light emitted by the active layer36is not limited to the blue light, and in some case, the active layer36may emit red or green light. A length of the active layer36may be in the range of about 0.05 μm to about 0.10 μm, but is not limited thereto.

The light emitted from the active layer36may be emitted not only in a length direction of the light emitting element ED, but also to both sides of the light emitting element ED. Directions of the light emitted from the active layer36are not particularly limited.

The electrode layer37may be an ohmic contact electrode. As another example, the electrode layer37may be a Schottky contact electrode. The light emitting element ED may include at least one electrode layer37. The electrode layer37may decrease resistance between the light emitting element ED and either an electrode or a connection electrode CTE when the light emitting element ED is electrically connected thereto. The electrode layer37may include a metal having conductivity. The electrode layer37may include at least one of aluminum (Al), titanium (Ti), indium (In), gold (Au), silver (Ag), indium tin oxide (ITO), indium zinc oxide (IZO), and indium tin zinc oxide (ITZO). The electrode layer37may also include an n-type or p-type doped semiconductor material.

The insulating film38may surround outer surfaces of the plurality of semiconductor layers and the electrode layers. The insulating film38may surround an outer surface of the active layer36, and may extend in a direction in which the light emitting element ED extends. The insulating film38may protect the light emitting element ED. For example, the insulating film38may surround a side surface of the light emitting element ED, and may expose both ends of the light emitting element ED in the length direction.

The insulating film38may include materials having insulating properties, such as silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy), aluminum nitride (AlN), and aluminum oxide (Al2O3). Accordingly, the insulating film38may reduce or prevent the likelihood of an electrical short circuit that may occur when the active layer36is in direct contact with an electrode through which an electrical signal is transferred to the light emitting element ED. In addition, the insulating film38protects an outer surface of the light emitting element ED as well as the active layer36, and thus may reduce or prevent a decrease in luminous efficiency.

An outer surface of the insulating film38may be surface-treated. When the display device10is manufactured, an ink (e.g., a predetermined ink) may be jetted onto electrodes in a state in which the light emitting elements ED are dispersed in the ink, such that the light emitting elements300may be aligned. Here, a hydrophobic or hydrophilic treatment is performed on a surface of the insulating film38, such that the light emitting elements ED may be maintained in a state in which the light emitting elements ED are dispersed without being agglomerated with other adjacent light emitting elements ED in the ink.

FIG.14is a plan view illustrating one pixel of a display device according to other embodiments.FIG.15is a plan view illustrating one pixel of a display device according to still other embodiments.

Referring toFIGS.14and15, display devices according to the present embodiments are different from the display device according to embodiments corresponding toFIG.5in that shapes of opening patterns OP_PA_1and OP_PA_2in plan view are different from that of the opening pattern OP_PA.

For example, as illustrated inFIG.14, a shape of the opening pattern OP_PA_1in plan view may be circular. In addition, as illustrated inFIG.15, a shape of the opening pattern OP_PA_1in plan view may be elliptical.

However, the present disclosure is not limited thereto, and the shapes of the opening patterns OP_PA_1and OP_PA_2in plan view may be modified. For example, the shapes of the opening patterns OP_PA_1and OP_PA_2in plan view may also be triangular, pentagonal, or hexagonal.

Embodiments of the present disclosure have been described hereinabove with reference to the accompanying drawings, but it will be understood by one of ordinary skill in the art to which the present disclosure pertains that various modifications and alterations may be made without departing from the technical spirit or essential feature of the present disclosure. Therefore, it is to be understood that the embodiments described above are illustrative rather than being restrictive in all aspects.