Method And Apparatus For Scheduling Of Multi-Cell Uplink And Downlink Transmissions With Single Downlink Control Information

Various solutions for improvement of scheduling multi-cell PUSCH/PDSCH transmission with a single DCI are described. An apparatus may receive a DCI scheduling cells from a network node. The DCI includes at least one of a first DCI, a second DCI, and a third DCI. The apparatus may determine a DCI size budget of the DCI counted in one cell. The apparatus may perform a DCI decoding according to the DCI size budget and perform a PDSCH reception or a PUSCH transmission with at least one cell based on the DCI. The first DCI includes a common bit field, a first specific bit field and a plurality of designated bit fields corresponding to the cells, the second DCI includes the common bit field, a second specific bit field and a first part of the designated bit fields, and the third DCI includes a second part of the designated bit fields.

TECHNICAL FIELD

The present disclosure is generally related to mobile communications and, more particularly, to scheduling of multi-cell physical uplink shared channel/physical downlink shared channel (PUSCH/PDSCH) transmission with a single downlink control information (DCI).

BACKGROUND

For current network implementations, one base station (BS) is operable to provide radio coverage to a specific geographical area using a plurality of cells forming a radio access network. The BS may support the operations of the plurality of cells, and each cell may be operable to provide services to at least one user equipment (UE) within its radio coverage. Specifically, each cell may provide services to serve one or more UEs within its radio coverage based on at least one downlink control information (DCI), where a radio coverage of one cell may overlap with another radio coverage of other cell(s). In one example, each cell may schedule a downlink/uplink (DL/UL) resource to one UE within its radio coverage by one DCI for performing a DL/UL transmission.

If the UE can support more than one cells/carriers (e.g., in dual connectivity/carrier aggregation), the UE may receive more than one DCI for scheduling DL/UL transmissions with the more than one cells. As that, the network and the BS have to configure a plurality of DCIs corresponding to the plurality of cells respectively to the UE, so as to schedule resources for the DL/UL transmissions between the UE and the cells, which may lack of transmission efficiency and waste available network resources. In addition, there is a bit number limit for decoding the DCI if one specific decoding technique (e.g., polar decoding technique) is utilized by the UE. Accordingly, a field number/size of the DCI should comply with a bit-limit rule/regulation.

Accordingly, how to improve a scheduling of multi-cell PUSCH/PDSCH transmission with a single DCI becomes an important issue for the newly developed wireless communication network. Therefore, there is a need to provide a proper DCI structure/segment design to improve scheduling efficiency and comply with some specific decoding rules.

SUMMARY

An objective of the present disclosure is to propose solutions or schemes that address the aforementioned issues pertaining to improvement of a scheduling of multi-cell UL (e.g., PUSCH)/DL (e.g., PDSCH) transmission with a single DCI.

In one aspect, a method may involve a processor of an apparatus receiving a DCI scheduling a plurality of cells from a network node of a wireless network. The DCI includes at least one of a first DCI, a second DCI, and a third DCI, the first DCI corresponds to a one-segment DCI structure, and the second DCI and the third DCI correspond to a two-segment DCI structure. The method may also involve the processor of the apparatus determining a DCI size budget of the DCI counted in one of the plurality of cells. The method also involve the processor of the apparatus performing a DCI decoding according to the DCI size budget. The method also involve the processor of the apparatus performing a PDSCH reception or a PUSCH transmission with at least one of the plurality of cells based on the DCI. The first DCI includes a common bit field, a first specific bit field and a plurality of designated bit fields corresponding to the plurality of cells, the second DCI includes the common bit field, a second specific bit field and a first part of the designated bit fields corresponding to at least one of the plurality of cells, and the third DCI includes a second part of the designated bit fields corresponding to at least one of the plurality of cells.

In one aspect, a method may involve a processor of an apparatus receiving a DCI scheduling a plurality of cells from a network node of a wireless network. The DCI includes at least one of a first DCI, a second DCI, and a third DCI, the first DCI corresponds to a one-segment DCI structure, and the second DCI and the third DCI correspond to a two-segment DCI structure. The method may also involve the processor of the apparatus determining a blinding decoding (BD) or control channel element (CCE) budget of the DCI counted in one of the plurality of cells. The method also involve the processor of the apparatus performing a DCI decoding according to the BD or CCE budget. The method also involve the processor of the apparatus performing a PDSCH reception or a PUSCH transmission with at least one of the plurality of cells based on the DCI. The first DCI includes a common bit field, a first specific bit field and a plurality of designated bit fields corresponding to the plurality of cells, the second DCI includes the common bit field, a second specific bit field and a first part of the designated bit fields corresponding to at least one of the plurality of cells, and the third DCI includes a second part of the designated bit fields corresponding to at least one of the plurality of cells.

In one aspect, an apparatus may include a transceiver which, during operation, wirelessly communicates with a network node of a wireless network. The apparatus may also include a processor communicatively coupled to the transceiver. The processor, during operation, may perform operations including receiving a DCI scheduling a plurality of cells from the network node. The DCI includes at least one of a first DCI, a second DCI, and a third DCI, the first DCI corresponds to a one-segment DCI structure, and the second DCI and the third DCI correspond to a two-segment DCI structure. The processor, during operation, may further perform operations including determining a DCI size budget of the DCI counted in one of the plurality of cells. The processor, during operation, may further perform operations including performing a DCI decoding according to the DCI size budget. The processor, during operation, may further perform operations including performing a PDSCH reception or a PUSCH transmission with at least one of the plurality of cells based on the DCI. The first DCI includes a common bit field, a first specific bit field and a plurality of designated bit fields corresponding to the plurality of cells, the second DCI includes the common bit field, a second specific bit field and a first part of the designated bit fields corresponding to at least one of the plurality of cells, and the third DCI includes a second part of the designated bit fields corresponding to at least one of the plurality of cells.

In one aspect, a method may involve a processor of an apparatus transmitting a capability report to a network node of a wireless network to indicate a maximum number of cells that can be simultaneously scheduled. The method may also involve the processor of the apparatus receiving a DCI scheduling one or multiple cells with a number of co-scheduled cells being smaller than or equal to the maximum number of cells. The DCI includes at least one of a first DCI, a second DCI, and a third DCI, the first DCI corresponds to a one-segment DCI structure, and the second DCI and the third DCI correspond to a two-segment DCI structure. The method may also involve the processor of the apparatus performing a PDSCH reception or a PUSCH transmission with at least one of the number of co-scheduled cells based on the DCI. The first DCI includes a common bit field, a first specific bit field and a plurality of designated bit fields corresponding to the number of co-scheduled cells, the second DCI includes the common bit field, a second specific bit field and a first part of the designated bit fields corresponding to at least one of the number of co-scheduled cells, and the third DCI includes a second part of the designated bit fields corresponding to at least one of the number of co-scheduled cells.

In one aspect, an apparatus may include a transceiver which, during operation, wirelessly communicates with a network node of a wireless network. The apparatus may also include a processor communicatively coupled to the transceiver. The processor, during operation, may perform operations including transmitting a capability report to a network node of a wireless network to indicate a maximum number of cells that can be simultaneously scheduled. The processor, during operation, may perform operations including receiving a DCI scheduling one or multiple cells with a number of co-scheduled cells being smaller than or equal to the maximum number of cells from the network node. The DCI includes at least one of a first DCI, a second DCI, and a third DCI, the first DCI corresponds to a one-segment DCI structure, and the second DCI and the third DCI correspond to a two-segment DCI structure. The processor, during operation, may further perform operations including performing a PDSCH reception or a PUSCH transmission with at least one of the number of co-scheduled cells based on the DCI. The first DCI includes a common bit field, a first specific bit field and a plurality of designated bit fields corresponding to the number of co-scheduled cells, the second DCI includes the common bit field, a second specific bit field and a first part of the designated bit fields corresponding to at least one of the number of co-scheduled cells, and the third DCI includes a second part of the designated bit fields corresponding to at least one of the number of co-scheduled cells.

In one aspect, a method may involve a processor of a network node receiving a capability report from an apparatus of a wireless network to indicate a maximum number of cells that can be simultaneously scheduled for the apparatus. The method may also involve the processor of the network node configuring a DCI scheduling one or multiple cells with a number of co-scheduled cells being smaller than or equal to the maximum number of cells. The DCI includes at least one of a first DCI, a second DCI, and a third DCI, the first DCI corresponds to a one-segment DCI structure, and the second DCI and the third DCI correspond to a two-segment DCI structure. The method may also involve the processor of the network node transmitting the DCI to the apparatus to schedule a PDSCH reception or a PUSCH transmission with at least one of the number of co-scheduled cells. The first DCI includes a common bit field, a first specific bit field and a plurality of designated bit fields corresponding to the number of co-scheduled cells, the second DCI includes the common bit field, a second specific bit field and a first part of the designated bit fields corresponding to at least one of the number of co-scheduled cells, and the third DCI includes a second part of the designated bit fields corresponding to at least one of the number of co-scheduled cells.

In one aspect, a method may involve a processor of an apparatus receiving a DCI scheduling a plurality of cells from a network node of a wireless network. The DCI includes at least one of a first DCI, a second DCI, and a third DCI, the first DCI corresponds to a one-segment DCI structure, and the second DCI and the third DCI correspond to a two-segment DCI structure. The method may also involve the processor of the apparatus performing a PDSCH reception or a PUSCH transmission with at least one of the plurality of cells based on the DCI. The first DCI includes a common bit field, a first specific bit field and a plurality of designated bit fields corresponding to the plurality of cells, the second DCI includes the common bit field, a second specific bit field and a first part of the designated bit fields corresponding to at least one of the plurality of cells, and the third DCI includes a second part of the designated bit fields corresponding to at least one of the plurality of cells.

In one aspect, an apparatus may include a transceiver which, during operation, wirelessly communicates with a network node of a wireless network. The apparatus may also include a processor communicatively coupled to the transceiver. The processor, during operation, may perform operations including receiving a DCI scheduling a plurality of cells from the network node. The DCI includes at least one of a first DCI, a second DCI, and a third DCI, the first DCI corresponds to a one-segment DCI structure, and the second DCI and the third DCI correspond to a two-segment DCI structure. The processor, during operation, may further perform operations including performing a PDSCH reception or a PUSCH transmission with at least one of the plurality of cells based on the DCI. The first DCI includes a common bit field, a first specific bit field and a plurality of designated bit fields corresponding to the plurality of cells, the second DCI includes the common bit field, a second specific bit field and a first part of the designated bit fields corresponding to at least one of the plurality of cells, and the third DCI includes a second part of the designated bit fields corresponding to at least one of the plurality of cells.

It is noteworthy that, although description provided herein may be in the context of certain radio access technologies, networks and network topologies such as Long-Term Evolution (LTE), LTE-Advanced, LTE-Advanced Pro, 5th Generation (5G), New Radio (NR), Internet-of-Things (IoT) and Narrow Band Internet of Things (NB-IoT), Industrial Internet of Things (IIoT), and 6th Generation (6G), the proposed concepts, schemes and any variation(s)/derivative(s) thereof may be implemented in, for and by other types of radio access technologies, networks and network topologies. Thus, the scope of the present disclosure is not limited to the examples described herein.

DETAILED DESCRIPTION OF PREFERRED IMPLEMENTATIONS

Overview

In 3rdGeneration Partnership Project (3GPP), a radio access network (e.g., 5G NR access network) may include a plurality of BSs (e.g., Next Generation Node-Bs (gNBs)) to communicate with a plurality of mobile stations referred as UEs. For current network implementations, one BS is operable to provide radio coverage to a specific geographical area using a plurality of cells forming a radio access network. The BS may support the operations of the plurality of cells, and each cell may be operable to provide services to at least one UE within its radio coverage. Specifically, each cell may provide services to serve one or more UEs within its radio coverage based on at least one DCI, where a radio coverage of one cell may overlap with another radio coverage of other cell(s). In one example, each cell may schedule a DL/UL resource to one UE within its radio coverage by one DCI for performing a DL/UL transmission. If the UE can support more than one cell (e.g., application in dual connectivity or carrier aggregation), the UE may receive more than one DCI for scheduling DL/UL transmissions with the more than one cells.

FIG.1illustrates an example scenario100of a DCI reception corresponding to a plurality of cells in accordance with the present disclosure. As shown in scenario100, at least one BS may serve the UE for providing four DCIs102,104,106and108. Specifically, the DCI102is utilized for a scheduling of a 1stcell with the UE, the DCI104is utilized for a scheduling of a 2ndcell with the UE, the DCI106is utilized for a scheduling of a 3rdcell with the UE, and the DCI108is utilized for a scheduling of a 4th cell with the UE. In one example, each DCI is attached with a cyclic redundancy check (CRC) for error decoding, and includes at least one designated bit field (e.g., 60 bits) and one CRC field (e.g., 24 bits), where the designated bit field includes a scheduling information for one cell. As that, the UE may communicate with the four cells (e.g., 1stcell, 2ndcell, 3rdcell and 4thcell) and perform a PDSCH reception or a PUSCH transmission scheduled by the four DCIs102,104,106and108, respectively.

Based on different transmissions and capabilities of the UE, the network and the BS may configure a plurality of DCIs corresponding to a plurality of cells to the UE, so as to schedule relevant resources for the DL/UL transmissions between the UE and the cells. However, it seems less efficient if the network resource(s) may not be enough to serve all UEs within the radio coverages. In addition, there is a bit-limit (e.g., less than 140 bits) for decoding the DCI if one specific decoding technique (e.g., polar decoding technique) is utilized by the UE. As that, it is proposed with a DCI aggregation by configuring a single DCI transmitted from the BS to the UE for a scheduling of multi-cell PUSCH/PDSCH transmission.

FIG.2Aillustrates an example scenario200illustrating a DCI structure in accordance with implementations of the present disclosure, andFIG.2Billustrates another example scenario210illustrating another DCI structure in accordance with implementations of the present disclosure. As shown inFIG.2AandFIG.2B, scenario200or scenario210being similar to scenario100may include at least one BS serving the UE with at least one cell (e.g., at least one of 1stcell, 2ndcell, 3rdcell and 4thcell), and the difference is that the BS in the scenario200or scenario210may configure a single DCI to the UE for its communication(s) with the at least one cell (e.g., at least one of 1stcell, 2ndcell, 3rdcell and 4thcell). If more than one cells are configured to the UE, the UE may receive the single DCI via one cell (e.g., 1stcell), and the other cells (e.g., 2ndcell, 3rdcell and/or 4thcell) are scheduled by the same single DCI received in the previous cell (e.g., 1stcell). Since the UE may utilize one specific decoding technique (e.g., polar decoding technique) for decoding the single DCI, the network and/or the BS may adaptively configure a field number/size of the single DCI complying with the bit-limit rule (e.g., less than 140 bits).

In some implementations, based on the bit-limit rule, the single DCI may have two types of DCI structure, i.e., a one-segment DCI structure shown inFIG.2Aand a two-segment DCI structure shown inFIG.2B. In one example, the one-segment DCI structure shown inFIG.2Amay be an aggregated DCI including a common bit field (e.g., including 24 bits), a first specific bit field (e.g., including less than 10 bits), at least one designated bit field (e.g., including 36 bits) corresponding to at least one cell (e.g., 1stcell, 2ndcell, 3rdcell and/or 4th cell), and a CRC bit field (e.g., including 24 bits). Also, a number of bit field(s) of the common bit field, the first specific bit field and/or the designated bit field inFIG.2Amay be adaptively adjusted based on different requirements, i.e., more than one common bit fields and/or more than one specific bit fields may also be adopted into the one-segment DCI structure with the at least one designated bit field corresponding to at least one cell (e.g., 1stcell, 2ndcell, 3rdcell and/or 4thcell).

Specifically, the one-segment DCI structure may include four types based on a number of cell(s) configured by the BS to the UE. For example, the BS may transmit DCI201to configure one cell (e.g., 1stcell) to the UE. Alternatively, the BS may transmit DCI202to configure two cells (e.g., 1stcell and 2ndcell) to the UE, or the BS may transmit DCI203to configure three cells (e.g., 1stcell, 2ndcell and 3rdcell) to the UE, or the BS may transmit DCI204to configure four cells (e.g., 1stcell, 2ndcell, 3rdcell and 4thcell) to the UE.

As shown inFIG.2B, the two-segment DCI structure shown may include one or more DCI segments based on a number of cell(s) configured to the UE. If only one cell is configured by the BS to the UE, DCI211shown inFIG.2Bmay share a similar structure and compositions as the DCI201shown inFIG.2A, i.e., the DCI211may include the common bit field (e.g., including 24 bits), a second specific bit field (e.g., including less than 10 bits), one designated bit field (e.g., including 36 bits) corresponding to one cell (e.g., 1stcell), and a CRC bit field (e.g., including 24 bits).

If more than one cells are configured by the BS to the UE, the two-segment DCI structure (e.g., DCI212, DCI213and DCI214) shown inFIG.2Bmay include two DCI segments (e.g., 1stDCI segment and 2ndDCI segment) that can be formed by adaptively dividing the one-segment DCI structure as two independent DCIs, and the UE may link both the two DCI segments together before deciding the DCI for scheduling information. Specifically, as shown inFIG.2B, the two-segment DCI structure may include two DCI segments, where one DCI segment may include the common bit field (e.g., including 24 bits), the second specific bit field (e.g., including less than 10 bits), a first part of designated bit fields (e.g., each designated bit field including 36 bits) corresponding to at least one cell and the CRC bit field (e.g., including 24 bits), and the other DCI segment may include a second part of designated bit fields (e.g., each designated bit field including 36 bits) corresponding other cells and the CRC bit field (e.g., including 24 bits). Certainly, a number of bit field(s) of the common bit field, the second specific bit field and/or the designated bit field inFIG.2Bmay be adaptively adjusted based on different requirements.

In one example, if two cells are configured to the UE, the DCI212may include two DCI segments2120and2121, where the DCI segment2120may include the common bit field, the second specific bit field, the designated bit field corresponding to one cell (e.g., 1stcell) and the CRC bit field, and the other DCI segment2121may include another designated bit field corresponding another cell (e.g., 2ndcell) and the CRC bit field. If three cells are configured to the UE, the DCI213may include two DCI segments2130and2131, where the DCI segment2130may include the common bit field, the second specific bit field, the designated bit field corresponding to one cell (e.g., 1stcell) and the CRC bit field, and the other DCI segment2131may include the other designated bit fields corresponding the other cells (e.g., 2ndcell and 3rdcell) and the CRC bit field. If four cells are configured to the UE, the DCI214may include two DCI segments2140and2141, where the DCI segment2140may include the common bit field, the second specific bit field, the designated bit field corresponding to one cell (e.g., 1stcell) and the CRC bit field, and the other DCI segment2141may include the other designated bit fields corresponding the other cells (e.g., 2ndcell, 3rdcell and 4thcell) and the CRC bit field.

In other words, a first part of bit fields of the one-segment DCI structure (e.g., DCI201, DCI202, DCI203and DCI204inFIG.2A) and/or the two-segment DCI structure (e.g., DCI211, DCI212, a DCI213and a DCI214inFIG.2B) may be defined as the common bit field, and a second part of bit fields of the one-segment DCI structure (e.g., DCI201, DCI202, DCI203and DCI204inFIG.2A) and/or the two-segment DCI structure (e.g., DCI211, DCI212, a DCI213and a DCI214inFIG.2B) may be configured as the common bit field or the designated bit field(s), where a number of bit field(s) of the common bit field and/or the designated bit field may also be adjusted. Specifically, the BS may transmit a radio resource control (RRC) configuration to the UE, to configure which bit field of the one-segment DCI structure (e.g., DCI201, DCI202, DCI203and DCI204inFIG.2A) and/or the two-segment DCI structure (e.g., DCI211, DCI212, a DCI213and a DCI214inFIG.2B) to be the common bit field or to be the designated bit field(s).

In some embodiments, complying with the bit-limit rule, the two-segment DCI structure (e.g., DCI211, DCI212, a DCI213and a DCI214inFIG.2B) may adaptively adjust a number of designated bit field(s) including in either one of the 1stDCI segment and 2ndDCI segment if more than two cells are configured to the UE. For example, if four cells (e.g., 1stcell, 2ndcell, 3rdcell and 4thcell) are configured to the UE, one DCI segment (e.g., 1stDCI segment) may include the common bit field, the second specific bit field, two designated bit fields corresponding to two cells (e.g., 1stcell and 2ndcell) and the CRC bit field, and the other DCI segment (e.g., 2ndDCI segment) may include two designated bit fields corresponding to the other two cells (e.g., 3rdcell and 4thcell) and the CRC bit field.

In some embodiments, a bit field order of the one-segment DCI structure (e.g., DCI201, DCI202, DCI203and DCI204inFIG.2A) and/or the two-segment DCI structure (e.g., DCI211, DCI212, a DCI213and a DCI214inFIG.2B) may also be adaptively adjusted based on different decoding techniques or mapping requirements. In other words, the common bit field, the designated bit field and the specific bit fields corresponding to different cells may adaptively change their bit field order allocated inside the DCI based on different decoding techniques or mapping requirements.

In some embodiments, the first specific bit field of the one-segment DCI structure (e.g., DCI201, DCI202, DCI203and DCI204inFIG.2A) and/or the second specific bit field of the two-segment DCI structure (e.g., DCI211, DCI212, a DCI213and a DCI214inFIG.2B) may include a bitmap that indicates a scheduling information of a plurality of cells, and a size of the bitmap indicates a number of cells scheduled by the DCI. For example, the size of the DCI segment2140of the DCI214inFIG.2Bmay be four to indicate four cells (e.g., 1stcell, 2ndcell, 3rdcell and 4thcell) being simultaneously configured to the UE via the two DCI segments (e.g., DCI segments2140and2141).

FIG.3illustrates an example illustrating a bitmap300of a specific bit field in a DCI in accordance with implementations of the present disclosure. In one example, the BS may configure four cells to the UE in the bitmap300, and there may be four bit fields corresponding to the four cells (e.g., 1stcell, 2ndcell, 3rdcell and 4thcell) in the bitmap300. If the BS simultaneously configures multiple cells to the UE in the one-segment DCI structure, all the scheduling information may be configured by the first specific bit field of the single DCI (e.g., DCI201, DCI202, DCI203and DCI204inFIG.2A). Alternatively, if the BS simultaneously configures multiple cells to the UE in the two-segment DCI structure, all the scheduling information may be configured by the second specific bit field of the 1stDCI segment (e.g., DCI211, DCI2120, DCI2130and DCI2140inFIG.2B) of the two-segment DCI structure.

Based on simultaneously configuring four cells to the UE in the two-segment DCI structure, if a sequence of the bitmap300includes one bit (e.g., only an ‘1’ value in the specific bit field), the UE may be indicated that the BS may only transmit a 1stDCI segment (e.g., DCI segment2140inFIG.2B) and may not transmit another 2ndDCI segment (e.g., DCI segment2141inFIG.2B). In other words, if the bitmap300only includes an ‘1’, the DCI may have a 1stDCI segment (e.g., DCI segment2140inFIG.2B) that is similar to the one-segment DCI structure (e.g., DCI204inFIG.2A).

In some implementations, if the BS configures a DCI that is the two-segment DCI structure to configure a plurality of cells (e.g., configuring four cells as 1stcell, 2ndcell, 3rdcell and 4thcell) to the UE, one scheduled cell with a lowest cell index may be indicated by a 1stDCI segment (e.g., DCI segment2140inFIG.2B), and the other of the plurality of scheduled cells may be indicated by a 2ndDCI segment (e.g., DCI segment2141inFIG.2B). For example, if the four scheduled cells have their ServCellIndex values (e.g., setting ServCellIndex values to be ‘1’, ‘2’, ‘3’ and ‘4’ corresponding to 1stcell, 2ndcell, 3rdcell and 4thcell, respectively), one cell having the lowest cell index (e.g., ServCellIndex value ‘1’ corresponding to 1stcell) may be configured by the 1stDCI segment (e.g., DCI segment2140inFIG.2B), and the other cells (e.g., ServCellIndex values ‘2’, ‘3’ and ‘4’ corresponding to 2ndcell, 3rdcell and 4thcell, respectively) may be configured by the 2ndDCI segment (e.g., DCI segment2141inFIG.2B).

As shown inFIG.3, if at least two of the four bit fields corresponding to the four cells (e.g., 1stcell, 2ndcell, 3rdcell and 4thcell) of the bitmap300are indicated ‘1’ (e.g., 2ndcell bit and 3rdcell bit), the cell with the lowest cell index (e.g., ‘1’ in 2ndcell bit) may be configured by the 1stDCI segment (e.g., DCI segment2140inFIG.2B), and the other cell(s) with its cell index (e.g., ‘1’ in 3rdcell bit) may be configured by the 2ndDCI segment (e.g., DCI segment2141inFIG.2B).

In some embodiments, based on the two-segment DCI structure, the BS may configure an additional DCI bit or an RRC configuration to the UE, so as to indicate utilizing/existing of the 2ndDCI segment (e.g., DCI segment2121,2131or2141inFIG.2B) for the UE. In one example, the additional DCI bit may be included in the 1stDCI segment (e.g., DCI segment2120,2130or2140inFIG.2B), or in the 2ndDCI segment (e.g., DCI segment2121,2131or2141inFIG.2B). Alternatively, the BS may configure a new DCI to carry the additional DCI bit to the UE.

In some embodiments, based on four cells configuration of the UE, after the UE receives two DCI segments from the BS, the UE may determine whether the two DCI segments are received from one cell as well as in a same time duration (e.g., in a same slot or in a same symbol). If the two DCI segments are received from the same cell as well as in the same time duration, the UE may determine that the two segments are associated to each other (e.g., DCI segment2140and DCI segment2141inFIG.2B). Next, the UE may link the two DCI segments (e.g., DCI segment2140and DCI segment2141inFIG.2B) to obtain the single and integral DCI, so as to decode the scheduling information for the four cells. In addition, the UE may further determine whether the two segments are both downlink (DL) scheduling DCI or uplink (UL) scheduling DCI before decoding. If the two DCI segments are both associated with the DL scheduling DCI or associated with the UL scheduling DCI, the UE may further determine that the two DCI segments are associated to each other (e.g., DCI segment2140and DCI segment2141inFIG.2B), and it is allowable to combine the two DCI segments (e.g., DCI segment2140and DCI segment2141inFIG.2B), so as to obtain the single and integral DCI for decoding the scheduling information of the four cells.

In some embodiments, for the one-segment DCI structure or the two-segment DCI structure configuring a plurality of cells, the UE may determine a DCI size budget of the DCI counted in one of the plurality of cells (e.g., one scheduling cell or one non-scheduling cell), so as to reduce UE burdens and simplify computing/waiting period of the network. After determining the DCI size budget of the single DCI, the UE may perform a DCI decoding according to the DCI size budget.

In some embodiments, based on multiple-cell configuration in a DCI, if the DCI is the one-segment DCI structure to configure a first number of the plurality of cells to the UE, the UE may perform the DCI decoding according to a first decoding size for the DCI, where the first decoding size is determined according to the first number of the plurality of cells. In other words, the UE may apply the DCI decoding with the same size if the same number of cells are scheduled. In addition, the BS may pad one or more ‘0’ to the DCI for complying with the same decoding size (i.e., first decoding size) if the same number of cells are scheduled by the DCI.

In some embodiments, if the DCI is the two-segment DCI structure to configure a second number of the plurality of cells to the UE, the UE may perform the DCI decoding according to a second decoding size for the DCI. The second decoding size may have four combinations based on a number of cells being configured to the UE, and the BS may adaptively pad one or more ‘0’ to the DCI for complying with the same decoding size (i.e., second decoding size) if the same number of cells are scheduled by the DCI.

For introducing the four combinations with the two-segment DCI structure, if one cell is configured to the UE, the 1stDCI segment (e.g., DCI211inFIG.2B) may be a non-fallback size (e.g., a Long format). If two cells are configured to the UE, the 1stDCI segment (e.g., DCI2120inFIG.2B) may be a non-fallback size (e.g., a Long format) and the 2ndDCI segment (e.g., DCI2121inFIG.2B) may be a fallback size (e.g., a Short format). If three cells are configured to the UE, the 1stDCI segment (e.g., DCI2130inFIG.2B) may be a non-fallback size (e.g., a Long format) and the 2ndDCI segment (e.g., DCI2131inFIG.2B) may be a non-fallback size (e.g., a Long format). If four cells are configured to the UE, the 1stDCI segment (e.g., DCI2140inFIG.2B) may be a non-fallback size (e.g., a Long format) and the 2ndDCI segment (e.g., DCI2141inFIG.2B) may be a 3-cell segment size (e.g., an Ultra Long format).

In some embodiments, for the one-segment DCI structure or the two-segment DCI structure configuring a plurality of cells, the UE may determine a blind decoding (BD) or control channel element (CCE) budget counted in one of the plurality of cells. Then, the UE may perform the DCI decoding according to the BD or CCE budget. As that, by utilizing the BD or CCE budget for the UE performing the DCI decoding, the UE may efficiently reduce its complexity while receiving the multi-cell scheduling DCI.

In some embodiments, if the BS configure the one-segment DCI structure to the UE for scheduling a plurality of cells, the UE may determine the BD or CCE budget by multiplying a pre-defined BD or CCE budget by a first scaling number. The first scaling number is no less than 1 and no more than a number of the plurality of cells. Specifically, if each scheduled cell has a sub-carrier space (SCS) as μ, the number of the plurality of co-scheduled cells is N and the UE may monitor at a slot for a physical downlink control channel (PDCCH), the pre-defined BD or CCE budget is min(MPDCCHmax,slot,μ,MPDCCHtotal,slot,μ), the UE may determine the BD or CCE budget to be M*min(MPDCCHmax,slot,μ,MPDCCHtotal,slot,μ), where the first scaling number is M with 1≤M≤N. In addition, the BS may configure the BD or CCE budget to the UE via a dedicated/specific signaling, and the first scaling number is pre-determined or configured by the BS.

In some embodiments, if the BS configure the two-segment DCI structure to the UE for scheduling a plurality of cells, the UE may determine the BD or CCE budget for the 1stDCI segment by multiplying the pre-defined BD or CCE budget by a second scaling number as well as determine the BD or CCE budget for the 2ndDCI segment by multiplying the pre-defined BD or CCE budget by a third scaling number. The second scaling number is no more than the number of the plurality of cells, and the third scaling number is no more than the number of the plurality of cells. Specifically, if each scheduled cell has the SCS as μ, the number of the plurality of co-scheduled cells is N, the UE may monitor at a slot for a PDCCH, and the pre-defined BD or CCE budget is min(MPDCCHmax,slot,μ,MPDCCHtotal,slot,μ), the UE may determine the BD or CCE budget for the 1stDCI segment to be α1*min(MPDCCHmax,slot,μ,MPDCCHtotal,slot,μ) as well as determine the BD or CCE budget for the 2ndDCI segment to be α2min(MPDCCHmax,slot,μ,MPDCCHtotal,slot,μ), where the second scaling number is α1with α1≤N, the third scaling number is α2with α2≤N. Also, for determining the BD or CCE budget for the 1stDCI segment/2ndDCI segment, it is proposed α2≤α1to avoid error propagation. In addition, the BS may configure the BD or CCE budget to the UE via a dedicated/specific signaling, and the second scaling number or the third scaling number is pre-determined or configured by the BS.

In some embodiments, the UE may transmit a capability report to the BS to indicate a maximum number of cells that can be simultaneously scheduled. In other words, the UE may report its capability to the BS for indicating the maximum number of cells that can be supported by the UE. As that, the BS may correspondingly configure one or multiple cells with a number of co-scheduled cells to the UE for simultaneous transmission between the UE and the BS, and the number of co-scheduled cells may be smaller than or equal to the maximum number of cells. Based on different transmission criteria, the BS may adaptively configure the number of co-scheduled cells to the UE, and the configured number of co-scheduled cells may not be larger than the maximum number of cells.

In some embodiments, for multi-cell scheduling/transmission, the BS may configure a configuration of a plurality of cell sets to the UE. As that, the UE may receive the configuration of the plurality of cell sets for multi-cell scheduling in one cell group, and each of the plurality of cell sets may include at least one cell that can be simultaneously scheduled for the UE. In other words, if the BS adaptively configures the plurality of cell sets to the UE in one cell group and there are four cells in each of the cell sets, the UE may select one of the cell sets and simultaneously perform multi-cell transmission with the four cells within the selected cell set.

In some embodiments, for the one-segment DCI structure or the two-segment DCI structure configuring a plurality of cells, the BS may configure a CCE index of a search space for the DCI according to a cell set index, and the UE may determine the CCE index of the search space for the DCI according to the cell set index that is configured by the BS. Specifically, the cell set index and/or the CCE index may correspond to one of the plurality of cell sets, the cell set index nCImay be configured as different values for different cell set, respectively, (e.g., nCI=1 for 1stcell set, nCI=2 for 2ndcell set, etc.) and the CCE index may be specified by the formula as

where ‘s’ is a search space set, ‘p’ is a control resource set (CORESET), ‘L’ is an aggregation level, ms,nCIis a PDCCH candidate, ns,fμis a slot for an active DL bandwidth part (BWP) of a serving cell.

While applying the above formula for the two-segment DCI structure, the cell set index nCImay be zero for the 1stDCI segment. For the 2ndDCI segment, a corresponding RRC configuration may be utilized to replace the cell set index nCI, and the corresponding RRC may be a parameter SearchSpace or a predefined number from the BS.

As that, the search space for the DCI corresponding to the plurality of cell sets may be adaptively staggered by utilizing the above cell set index and/or CCE index configured by the BS. In some embodiments, based on the one-segment DCI structure, the UE may receive a plurality of DCIs corresponding to the plurality of cell sets, and the plurality of DCIs may be transmitted with different CCE indexes in a frequency domain for the UE monitoring.

FIG.4illustrates an example illustrating a staggered search space400in accordance with implementations of the present disclosure. As shown inFIG.4, after receiving an RRC indicating that the 2ndDCI segment is existed and configured to the UE, the BS may apply one additional information element (IE) SegmentId under the parameter SearchSpace to specify which search space is for the 1stDCI segment and which search space is for the 2ndDCI segment. In other words, the BS and/or the network may ensure that the two search spaces for the 1stDCI segment and for the 2ndDCI segment are not overlapped to avoid ambiguity for distinguishing the two DCI segments. In addition, the BS may apply the cell set index nCIas well as the IE SegmentId under the parameter SearchSpace to specify which search space is for the 1stDCI segment or for the 2ndDCI segment.

Illustrative Implementations

FIG.5illustrates an example communication system500having an example communication apparatus510and an example network apparatus520in accordance with an implementation of the present disclosure. Each of communication apparatus510and network apparatus520may perform various functions to implement schemes, techniques, processes and methods described herein pertaining to improvement of a scheduling of multi-cell PUSCH/PDSCH transmission with a single DCI, including scenarios/schemes described above as well as processes600to1300described below.

Communication apparatus510may be a part of an electronic apparatus, which may be a UE such as a portable or mobile apparatus, a wearable apparatus, a wireless communication apparatus or a computing apparatus. For instance, communication apparatus510may be implemented in a smartphone, a smartwatch, a personal digital assistant, a digital camera, or a computing equipment such as a tablet computer, a laptop computer or a notebook computer. Communication apparatus510may also be a part of a machine type apparatus, which may be an IoT, NB-IoT, or IIoT apparatus such as an immobile or a stationary apparatus, a home apparatus, a wire communication apparatus or a computing apparatus. For instance, communication apparatus510may be implemented in a smart thermostat, a smart fridge, a smart door lock, a wireless speaker or a home control center. Alternatively, communication apparatus510may be implemented in the form of one or more integrated-circuit (IC) chips such as, for example and without limitation, one or more single-core processors, one or more multi-core processors, one or more reduced-instruction set computing (RISC) processors, or one or more complex-instruction-set-computing (CISC) processors. Communication apparatus510may include at least some of those components shown inFIG.5such as a processor512, for example. Communication apparatus510may further include one or more other components not pertinent to the proposed scheme of the present disclosure (e.g., internal power supply, display device and/or user interface device), and, thus, such component(s) of communication apparatus510are neither shown inFIG.5nor described below in the interest of simplicity and brevity.

Network apparatus520may be a part of an electronic apparatus, which may be a network node such as a base station, a small cell, a router or a gateway. For instance, network apparatus520may be implemented in an eNodeB in an LTE, LTE-Advanced or LTE-Advanced Pro network or in a gNB in a 5G, NR, IoT, NB-IoT or IIoT network. Alternatively, network apparatus520may be implemented in the form of one or more IC chips such as, for example and without limitation, one or more single-core processors, one or more multi-core processors, or one or more RISC or CISC processors. Network apparatus520may include at least some of those components shown inFIG.5such as a processor522, for example. Network apparatus520may further include one or more other components not pertinent to the proposed scheme of the present disclosure (e.g., internal power supply, display device and/or user interface device), and, thus, such component(s) of network apparatus520are neither shown inFIG.5nor described below in the interest of simplicity and brevity.

In some implementations, communication apparatus510may also include a transceiver516coupled to processor512and capable of wirelessly transmitting and receiving data. In some implementations, communication apparatus510may further include a memory514coupled to processor512and capable of being accessed by processor512and storing data therein. In some implementations, network apparatus520may also include a transceiver526coupled to processor522and capable of wirelessly transmitting and receiving data. In some implementations, network apparatus520may further include a memory524coupled to processor522and capable of being accessed by processor522and storing data therein. Accordingly, communication apparatus510and network apparatus520may wirelessly communicate with each other via transceiver516and transceiver526, respectively. To aid better understanding, the following description of the operations, functionalities and capabilities of each of communication apparatus510and network apparatus520is provided in the context of a mobile communication environment in which communication apparatus510is implemented in or as a communication apparatus or a UE and network apparatus520is implemented in or as a network node of a communication network.

In some implementations, processor512may receive, via transceiver516, a DCI scheduling a plurality of cells from the network apparatus520, wherein the DCI includes at least one of a first DCI, a second DCI, and a third DCI, the first DCI corresponds to a one-segment DCI structure, and the second DCI and the third DCI correspond to a two-segment DCI structure. Then, processor512may perform a PDSCH reception or a PUSCH transmission with at least one of the plurality of cells based on the DCI. The first DCI includes a common bit field, a first specific bit field and a plurality of designated bit fields corresponding to the plurality of cells, the second DCI includes the common bit field, a second specific bit field and a first part of the designated bit fields corresponding to at least one of the plurality of cells, and the third DCI includes a second part of the designated bit fields corresponding to at least one of the plurality of cells.

In some implementations, a first part of bit fields of the first DCI, the second DCI or the third DCI are defined as the common bit field, and a second part of bit fields of the first DCI, the second DCI or the third DCI are configured as the common bit field or the designated bit fields.

In some implementations, processor512may receive, via transceiver516, an RRC configuration to configure which bit field of the first DCI, the second DCI or the third DCI to be the common bit field or to be the designated bit fields.

In some implementations, the first specific bit field or the second specific bit field includes a bitmap indicating a scheduling information of the plurality of cells. A size of the bitmap indicates a number of cells scheduled by the DCI. In an event that a sequence of the bitmap includes only one bit value, the DCI includes the first DCI. In an event that the DCI comprises the second DCI and the third DCI to indicate a plurality of scheduled cells for the apparatus, one scheduled cell with a lowest cell index is indicated by the second DCI, and the other of the plurality of scheduled cells are indicated by the third DCI.

In some implementations, processor512may determine that the DCI includes the second DCI or the third DCI according to an additional DCI bit or an RRC configuration.

In some implementations, processor512may link the second DCI and the third DCI after determining that the second DCI and the third DCI are received from one cell in a same time duration. Both the second DCI and the third DCI are DL scheduling DCI, or both the second DCI and the third DCI are UL scheduling DCI.

In some implementations, processor522may configure a DCI scheduling a plurality of cells. The DCI includes at least one of a first DCI, a second DCI, and a third DCI, the first DCI corresponds to a one-segment DCI structure, and the second DCI and the third DCI correspond to a two-segment DCI structure in a SIB. Then, processor522may transmit, via transceiver526, the DCI to the communication apparatus510to schedule a PDSCH reception or a PUSCH transmission with at least one of the plurality of cells based on the DCI. The first DCI includes a common bit field, a first specific bit field and a plurality of designated bit fields corresponding to the plurality of cells, the second DCI includes the common bit field, a second specific bit field and a first part of the designated bit fields corresponding to at least one of the plurality of cells, and the third DCI includes a second part of the designated bit fields corresponding to at least one of the plurality of cells.

In some implementations, a first part of bit fields of the first DCI, the second DCI or the third DCI are defined as the common bit field, and a second part of bit fields of the first DCI, the second DCI or the third DCI are configured as the common bit field or the designated bit fields.

In some implementations, processor522may configure an RRC configuration to the communication apparatus510to indicate which bit field of the first DCI, the second DCI or the third DCI to be the common bit field or to be the designated bit fields.

In some implementations, the first specific bit field or the second specific bit field includes a bitmap indicating a scheduling information of the plurality of cells. A size of the bitmap indicates a number of cells scheduled by the DCI. In an event that a sequence of the bitmap includes only one bit value, the DCI includes the first DCI. In an event that the DCI includes the second DCI and the third DCI to indicate a plurality of scheduled cells for the apparatus, one scheduled cell with a lowest cell index is indicated by the second DCI, and the other of the plurality of scheduled cells are indicated by the third DCI.

In some implementations, processor522may indicate that the DCI includes the second DCI or the third DCI by an additional DCI bit or an RRC configuration.

In some implementations, processor512may receive, via transceiver516, a DCI scheduling a plurality of cells from the network apparatus520, wherein the DCI includes at least one of a first DCI, a second DCI, and a third DCI, the first DCI corresponds to a one-segment DCI structure, and the second DCI and the third DCI correspond to a two-segment DCI structure. Then, processor512may determine a DCI size budget of the DCI counted in one of the plurality of cells. Further, the processor512may perform a DCI decoding according to the DCI size budget and perform a PDSCH reception or a PUSCH transmission with at least one of the plurality of cells based on the DCI. The first DCI includes a common bit field, a first specific bit field and a plurality of designated bit fields corresponding to the plurality of cells, the second DCI includes the common bit field, a second specific bit field and a first part of the designated bit fields corresponding to at least one of the plurality of cells, and the third DCI includes a second part of the designated bit fields corresponding to at least one of the plurality of cells.

In some implementations, processor512may perform the DCI decoding according to a first decoding size for the DCI in an event that the DCI includes the first DCI to configure a first number of the plurality of cells, wherein the first decoding size is determined according to the first number of the plurality of cells.

In some implementations, processor512may perform the DCI decoding according to a second decoding size for the DCI in an event that the DCI includes the second DCI and the third DCI to configure a second number of the plurality of cells, wherein the second decoding size includes four combinations. The second DCI includes a non-fallback size in an event that one cell is configured to the apparatus, the second DCI includes a non-fallback size and the third DCI includes a fallback size in an event that two cells are configured to the apparatus, both the second DCI and the third DCI include a non-fallback size in an event that three cells are configured to the apparatus, and the second DCI includes a non-fallback size and the third DCI includes a 3-cell segment size in an event that four cells are configured to the apparatus.

In some implementations, processor512may receive, via transceiver516, a DCI scheduling a plurality of cells from the network apparatus520, wherein the DCI includes at least one of a first DCI, a second DCI, and a third DCI, the first DCI corresponds to a one-segment DCI structure, and the second DCI and the third DCI correspond to a two-segment DCI structure. Then, processor512may determine a BD or CCE budget counted in one of the plurality of cells. Further, the processor512may perform a DCI decoding according to the BD or CCE budget and perform a PDSCH reception or a PUSCH transmission with at least one of the plurality of cells based on the DCI. The first DCI includes a common bit field, a first specific bit field and a plurality of designated bit fields corresponding to the plurality of cells, the second DCI includes the common bit field, a second specific bit field and a first part of the designated bit fields corresponding to at least one of the plurality of cells, and the third DCI includes a second part of the designated bit fields corresponding to at least one of the plurality of cells.

In some implementations, processor512may determine the BD or CCE budget by multiplying a pre-defined BD or CCE budget by a first scaling number in an event that the DCI includes the first DCI, wherein the first scaling number is no less than 1 and no more than a number of the plurality of cells.

In some implementations, processor512may determine the BD or CCE budget by multiplying the pre-defined BD or CCE budget by a second scaling number in an event that the DCI includes the second DCI, wherein the second scaling number is no more than the number of the plurality of cells.

In some implementations, processor512may determine the BD or CCE budget by multiplying the pre-defined BD or CCE budget by a third scaling number in an event that the DCI includes the third DCI, wherein the third scaling number is no more than the number of the plurality of cells.

In some implementations, the first scaling number, the second scaling number or the third scaling number is pre-determined or configured by the network apparatus520.

In some implementations, the second scaling number is greater than the third scaling number.

In some implementations, processor522may configure a DCI scheduling a plurality of cells. The DCI includes at least one of a first DCI, a second DCI, and a third DCI, the first DCI corresponds to a one-segment DCI structure, and the second DCI and the third DCI correspond to a two-segment DCI structure in a SIB. Then, processor522may configure a DCI size budget of the DCI counted in one of the plurality of cells to the communication apparatus510. Further, processor522may transmit, via transceiver526, the DCI to the communication apparatus510to schedule a PDSCH reception or a PUSCH transmission with at least one of the plurality of cells based on the DCI. The first DCI includes a common bit field, a first specific bit field and a plurality of designated bit fields corresponding to the plurality of cells, the second DCI includes the common bit field, a second specific bit field and a first part of the designated bit fields corresponding to at least one of the plurality of cells, and the third DCI includes a second part of the designated bit fields corresponding to at least one of the plurality of cells.

In some implementations, processor522may configure a DCI scheduling a plurality of cells. The DCI includes at least one of a first DCI, a second DCI, and a third DCI, the first DCI corresponds to a one-segment DCI structure, and the second DCI and the third DCI correspond to a two-segment DCI structure in a SIB. Then, processor522may configure a BD or CCE budget counted in one of the plurality of cells to the communication apparatus510. Further, the processor522may transmit, via transceiver526, the DCI to the communication apparatus510to schedule a PDSCH reception or a PUSCH transmission with at least one of the plurality of cells based on the DCI. The first DCI includes a common bit field, a first specific bit field and a plurality of designated bit fields corresponding to the plurality of cells, the second DCI includes the common bit field, a second specific bit field and a first part of the designated bit fields corresponding to at least one of the plurality of cells, and the third DCI includes a second part of the designated bit fields corresponding to at least one of the plurality of cells.

In some implementations, the processor522may configure the BD or CCE budget by multiplying a pre-defined BD or CCE budget by a first scaling number in an event that the DCI includes the first DCI, wherein the first scaling number is no less than 1 and no more than a number of the plurality of cells.

In some implementations, the processor522may configure the BD or CCE budget by multiplying the pre-defined BD or CCE budget by a second scaling number in an event that the DCI includes the second DCI, wherein the second scaling number is no more than the number of the plurality of cells.

In some implementations, the processor522may configure the BD or CCE budget by multiplying the pre-defined BD or CCE budget by a third scaling number in an event that the DCI includes the third DCI, wherein the third scaling number is no more than the number of the plurality of cells.

In some implementations, the first scaling number, the second scaling number or the third scaling number is pre-determined or configured by the network node.

In some implementations, the second scaling number is greater than the third scaling number.

In some implementations, processor512may transmit, via transceiver516, a capability report to a network apparatus520of a wireless network to indicate a maximum number of cells that can be simultaneously scheduled. Then, processor512may receive, via transceiver516, a DCI scheduling one or multiple cells with a number of co-scheduled cells being smaller than or equal to the maximum number of cells, wherein the DCI includes at least one of a first DCI, a second DCI, and a third DCI, the first DCI corresponds to a one-segment DCI structure, and the second DCI and the third DCI correspond to a two-segment DCI structure. Further, processor512may perform a PDSCH reception or a PUSCH transmission with at least one of the number of co-scheduled cells based on the DCI. The first DCI includes a common bit field, a first specific bit field and a plurality of designated bit fields corresponding to the number of co-scheduled cells, the second DCI includes the common bit field, a second specific bit field and a first part of the designated bit fields corresponding to at least one of the number of co-scheduled cells, and the third DCI includes a second part of the designated bit fields corresponding to at least one of the number of co-scheduled cells.

In some implementations, processor512may receive, via transceiver516, a configuration of a plurality of cell sets for multi-cell scheduling in one cell group, wherein each of the plurality of cell sets includes at least one cell that can be simultaneously scheduled.

In some implementations, processor512may determine a CCE index of a search space for the DCI according to a cell set index.

In some implementations, the cell set index is configured by the network apparatus520corresponding to one of the plurality of cell sets.

In some implementations, processor512may receive, via transceiver516, a plurality of DCIs corresponding to the plurality of cell sets, wherein each of the plurality of DCIs includes the first DCI.

In some implementations, the plurality of DCIs are transmitted with different CCE indexes in a frequency domain.

In some implementations, processor522may receive, via transceiver526, a capability report from a communication apparatus510of a wireless network to indicate a maximum number of cells that can be simultaneously scheduled for the communication apparatus510. Then, processor522may configure a DCI scheduling one or multiple cells with a number of co-scheduled cells being smaller than or equal to the maximum number of cells. The DCI includes at least one of a first DCI, a second DCI, and a third DCI, the first DCI corresponds to a one-segment DCI structure, and the second DCI and the third DCI correspond to a two-segment DCI structure. Further, processor522may transmit, via transceiver526, the DCI to the communication apparatus510to schedule a PDSCH reception or a PUSCH transmission with at least one of the number of co-scheduled cells based on the DCI. The first DCI includes a common bit field, a first specific bit field and a plurality of designated bit fields corresponding to the number of co-scheduled cells, the second DCI includes the common bit field, a second specific bit field and a first part of the designated bit fields corresponding to at least one of the number of co-scheduled cells, and the third DCI includes a second part of the designated bit fields corresponding to at least one of the number of co-scheduled cells.

In some implementations, processor522may configure a configuration of a plurality of cell sets for multi-cell scheduling in one cell group, wherein each of the plurality of cell sets includes at least one cell that can be simultaneously scheduled.

In some implementations, processor522may configure a CCE index of a search space for the DCI according to a cell set index. Further, processor522may configure the cell set index that corresponds to one of the plurality of cell sets.

In some implementations, processor may transmit, via transceiver526, a plurality of DCIs corresponding to the plurality of cell sets, wherein each of the plurality of DCIs includes the first DCI. The plurality of DCIs are transmitted with different CCE indexes in a frequency domain.

Illustrative Processes

FIG.6illustrates an example process600in accordance with an implementation of the present disclosure. Process600may be an example implementation of above scenarios/schemes, whether partially or completely, with respect to improvement of a scheduling of multi-cell PUSCH/PDSCH transmission with a single DCI. Process600may represent an aspect of implementation of features of communication apparatus510. Process600may include one or more operations, actions, or functions as illustrated by one or more of blocks610to620. Although illustrated as discrete blocks, various blocks of process600may be divided into additional blocks, combined into fewer blocks, or eliminated, depending on the desired implementation. Moreover, the blocks of process600may be executed in the order shown inFIG.6or, alternatively, in a different order. Process600may be implemented by communication apparatus510or any suitable UE or machine type devices. Solely for illustrative purposes and without limitation, process600is described below in the context of communication apparatus510. Process600may begin at block610.

At610, process600may involve processor512of an apparatus (e.g., communication apparatus510) receiving a DCI scheduling a plurality of cells from a network node (e.g., network apparatus520) of a wireless network, wherein the DCI includes at least one of a first DCI, a second DCI, and a third DCI, the first DCI corresponds to a one-segment DCI structure, and the second DCI and the third DCI correspond to a two-segment DCI structure. Process600may proceed from610to620.

At620, process600may involve processor512performing a PDSCH reception or a PUSCH transmission with at least one of the plurality of cells based on the DCI, wherein the first DCI includes a common bit field, a first specific bit field and a plurality of designated bit fields corresponding to the plurality of cells, the second DCI includes the common bit field, a second specific bit field and a first part of the designated bit fields corresponding to at least one of the plurality of cells, and the third DCI includes a second part of the designated bit fields corresponding to at least one of the plurality of cells.

In some implementations, a first part of bit fields of the first DCI, the second DCI or the third DCI are defined as the common bit field, and a second part of bit fields of the first DCI, the second DCI or the third DCI are configured as the common bit field or the designated bit fields. Then, process600may further involve processor512receiving an RRC configuration to configure which bit field of the first DCI, the second DCI or the third DCI to be the common bit field or to be the designated bit fields.

In some implementations, the first specific bit field or the second specific bit field includes a bitmap indicating a scheduling information of the plurality of cells. A size of the bitmap indicates a number of cells scheduled by the DCI. In an event that a sequence of the bitmap includes only one bit value, the DCI includes the first DCI. In an event that the DCI includes the second DCI and the third DCI to indicate a plurality of scheduled cells for the apparatus, one scheduled cell with a lowest cell index is indicated by the second DCI, and the other of the plurality of scheduled cells are indicated by the third DCI.

In some implementations, process600may further involve processor512determining that the DCI includes the second DCI or the third DCI according to an additional DCI bit or an RRC configuration. Then, process600may further involve processor512linking the second DCI and the third DCI after determining that the second DCI and the third DCI are received from one cell in a same time duration. Both the second DCI and the third DCI are DL scheduling DCI, or both the second DCI and the third DCI are UL scheduling DCI.

FIG.7illustrates an example process700in accordance with an implementation of the present disclosure. Process700may be an example implementation of above scenarios/schemes, whether partially or completely, with respect to improvement of a scheduling of multi-cell PUSCH/PDSCH transmission with a single DCI. Process700may represent an aspect of implementation of features of network apparatus520. Process700may include one or more operations, actions, or functions as illustrated by one or more of blocks710to720. Although illustrated as discrete blocks, various blocks of process700may be divided into additional blocks, combined into fewer blocks, or eliminated, depending on the desired implementation. Moreover, the blocks of process700may be executed in the order shown inFIG.7or, alternatively, in a different order. Process700may be implemented by network apparatus520or any suitable BS or network nodes. Solely for illustrative purposes and without limitation, process700is described below in the context of network apparatus520. Process700may begin at block710.

At710, process700may involve processor522of a network node (e.g., network apparatus520) configuring a DCI scheduling a plurality of cells, wherein the DCI includes at least one of a first DCI, a second DCI, and a third DCI, the first DCI corresponds to a one-segment DCI structure, and the second DCI and the third DCI correspond to a two-segment DCI structure. Process700may proceed from710to720.

At720, process700may involve processor522transmitting the DCI to an apparatus (e.g., communication apparatus510) of a wireless network to schedule a PDSCH reception or a PUSCH transmission with at least one of the plurality of cells based on the DCI, wherein the first DCI includes a common bit field, a first specific bit field and a plurality of designated bit fields corresponding to the plurality of cells, the second DCI includes the common bit field, a second specific bit field and a first part of the designated bit fields corresponding to at least one of the plurality of cells, and the third DCI includes a second part of the designated bit fields corresponding to at least one of the plurality of cells.

In some implementations, a first part of bit fields of the first DCI, the second DCI or the third DCI are defined as the common bit field, and a second part of bit fields of the first DCI, the second DCI or the third DCI are configured as the common bit field or the designated bit fields. Then, process700may further involve processor522configuring an RRC configuration to indicate which bit field of the first DCI, the second DCI or the third DCI to be the common bit field or to be the designated bit fields.

In some implementations, the first specific bit field or the second specific bit field includes a bitmap indicating a scheduling information of the plurality of cells. A size of the bitmap indicates a number of cells scheduled by the DCI. In an event that a sequence of the bitmap includes only one bit value, the DCI includes the first DCI. In an event that the DCI includes the second DCI and the third DCI to indicate a plurality of scheduled cells for the apparatus, one scheduled cell with a lowest cell index is indicated by the second DCI, and the other of the plurality of scheduled cells are indicated by the third DCI.

In some implementations, process700may further involve processor522indicating that the DCI includes the second DCI or the third DCI by an additional DCI bit or an RRC configuration.

FIG.8illustrates an example process800in accordance with an implementation of the present disclosure. Process800may be an example implementation of above scenarios/schemes, whether partially or completely, with respect to improvement of a scheduling of multi-cell PUSCH/PDSCH transmission with a single DCI. Process800may represent an aspect of implementation of features of communication apparatus510. Process800may include one or more operations, actions, or functions as illustrated by one or more of blocks810to840. Although illustrated as discrete blocks, various blocks of process800may be divided into additional blocks, combined into fewer blocks, or eliminated, depending on the desired implementation. Moreover, the blocks of process800may be executed in the order shown inFIG.8or, alternatively, in a different order. Process800may be implemented by communication apparatus510or any suitable UE or machine type devices. Solely for illustrative purposes and without limitation, process800is described below in the context of communication apparatus510. Process800may begin at block810.

At810, process800may involve processor512of an apparatus (e.g., communication apparatus510) receiving a DCI scheduling a plurality of cells from a network node (e.g., network apparatus520) of a wireless network, wherein the DCI includes at least one of a first DCI, a second DCI, and a third DCI, the first DCI corresponds to a one-segment DCI structure, and the second DCI and the third DCI correspond to a two-segment DCI structure. Process800may proceed from810to820.

At820, process800may involve processor512determining a DCI size budget of the DCI counted in one of the plurality of cells. Process800may proceed from820to830.

At830, process800may involve processor512performing a DCI decoding according to the DCI size budget. Process800may proceed from830to840.

At840, process800may involve processor512performing a PDSCH reception or a PUSCH transmission with at least one of the plurality of cells based on the DCI, wherein the first DCI includes a common bit field, a first specific bit field and a plurality of designated bit fields corresponding to the plurality of cells, the second DCI includes the common bit field, a second specific bit field and a first part of the designated bit fields corresponding to at least one of the plurality of cells, and the third DCI includes a second part of the designated bit fields corresponding to at least one of the plurality of cells.

In some implementations, process800may further involve processor512performing the DCI decoding according to a first decoding size for the DCI in an event that the DCI include the first DCI to configure a first number of the plurality of cells, wherein the first decoding size is determined according to the first number of the plurality of cells.

In some implementations, process800may further involve processor512performing the DCI decoding according to a second decoding size for the DCI in an event that the DCI includes the second DCI and the third DCI to configure a second number of the plurality of cells, wherein the second decoding size includes four combinations. The second DCI includes a non-fallback size in an event that one cell is configured to the apparatus, the second DCI includes a non-fallback size and the third DCI includes a fallback size in an event that two cells are configured to the apparatus, both the second DCI and the third DCI include a non-fallback size in an event that three cells are configured to the apparatus, and the second DCI includes a non-fallback size and the third DCI comprises a 3-cell segment size in an event that four cells are configured to the apparatus.

FIG.9illustrates an example process900in accordance with an implementation of the present disclosure. Process900may be an example implementation of above scenarios/schemes, whether partially or completely, with respect to improvement of a scheduling of multi-cell PUSCH/PDSCH transmission with a single DCI. Process900may represent an aspect of implementation of features of communication apparatus510. Process900may include one or more operations, actions, or functions as illustrated by one or more of blocks910to940. Although illustrated as discrete blocks, various blocks of process900may be divided into additional blocks, combined into fewer blocks, or eliminated, depending on the desired implementation. Moreover, the blocks of process900may be executed in the order shown inFIG.9or, alternatively, in a different order. Process900may be implemented by communication apparatus510or any suitable UE or machine type devices. Solely for illustrative purposes and without limitation, process900is described below in the context of communication apparatus510. Process900may begin at block910.

At910, process900may involve processor512of an apparatus (e.g., communication apparatus510) receiving a DCI scheduling a plurality of cells from a network node (e.g., network apparatus520) of a wireless network, wherein the DCI includes at least one of a first DCI, a second DCI, and a third DCI, the first DCI corresponds to a one-segment DCI structure, and the second DCI and the third DCI correspond to a two-segment DCI structure. Process900may proceed from910to920.

At920, process900may involve processor512determining a BD or CCE budget counted in one of the plurality of cells. Process900may proceed from920to930.

At930, process900may involve processor512performing a DCI decoding according to the BD or CCE budget. Process900may proceed from930to940.

At940, process900may involve processor512performing a PDSCH reception or a PUSCH transmission with at least one of the plurality of cells based on the DCI, wherein the first DCI includes a common bit field, a first specific bit field and a plurality of designated bit fields corresponding to the plurality of cells, the second DCI includes the common bit field, a second specific bit field and a first part of the designated bit fields corresponding to at least one of the plurality of cells, and the third DCI includes a second part of the designated bit fields corresponding to at least one of the plurality of cells.

In some implementations, process900may further involve processor512determining the BD or CCE budget by multiplying a pre-defined BD or CCE budget by a first scaling number in an event that the DCI includes the first DCI, wherein the first scaling number is no less than 1 and no more than a number of the plurality of cells. Then, process900may further involve processor512determining the BD or CCE budget by multiplying the pre-defined BD or CCE budget by a second scaling number in an event that the DCI includes the second DCI, wherein the second scaling number is no more than the number of the plurality of cells. Then, process900may further involve processor512determining the BD or CCE budget by multiplying the pre-defined BD or CCE budget by a third scaling number in an event that the DCI includes the third DCI, wherein the third scaling number is no more than the number of the plurality of cells. The first scaling number, the second scaling number or the third scaling number is pre-determined or configured by the network node. The second scaling number is greater than the third scaling number.

FIG.10illustrates an example process1000in accordance with an implementation of the present disclosure. Process1000may be an example implementation of above scenarios/schemes, whether partially or completely, with respect to improvement of a scheduling of multi-cell PUSCH/PDSCH transmission with a single DCI. Process1000may represent an aspect of implementation of features of network apparatus520. Process1000may include one or more operations, actions, or functions as illustrated by one or more of blocks1010to1030. Although illustrated as discrete blocks, various blocks of process1000may be divided into additional blocks, combined into fewer blocks, or eliminated, depending on the desired implementation. Moreover, the blocks of process1000may be executed in the order shown inFIG.10or, alternatively, in a different order. Process1000may be implemented by network apparatus520or any suitable BS or network nodes. Solely for illustrative purposes and without limitation, process1000is described below in the context of network apparatus520. Process1000may begin at block1010.

At1010, process1000may involve processor522of a network node (e.g., network apparatus520) configuring a DCI scheduling a plurality of cells, wherein the DCI includes at least one of a first DCI, a second DCI, and a third DCI, the first DCI corresponds to a one-segment DCI structure, and the second DCI and the third DCI correspond to a two-segment DCI structure. Process1000may proceed from1010to1020.

At1020, process1000may involve processor522configuring a DCI size budget of the DCI counted in one of the plurality of cells to an apparatus (e.g., communication apparatus510) of a wireless network. Process1000may proceed from1020to1030.

At1030, process1000may involve processor522transmitting the DCI to the apparatus (e.g., communication apparatus510) to schedule a PDSCH reception or a PUSCH transmission with at least one of the plurality of cells based on the DCI, wherein the first DCI includes a common bit field, a first specific bit field and a plurality of designated bit fields corresponding to the plurality of cells, the second DCI includes the common bit field, a second specific bit field and a first part of the designated bit fields corresponding to at least one of the plurality of cells, and the third DCI includes a second part of the designated bit fields corresponding to at least one of the plurality of cells.

FIG.11illustrates an example process1100in accordance with an implementation of the present disclosure. Process1100may be an example implementation of above scenarios/schemes, whether partially or completely, with respect to improvement of a scheduling of multi-cell PUSCH/PDSCH transmission with a single DCI. Process1100may represent an aspect of implementation of features of network apparatus520. Process1100may include one or more operations, actions, or functions as illustrated by one or more of blocks1110to1130. Although illustrated as discrete blocks, various blocks of process1100may be divided into additional blocks, combined into fewer blocks, or eliminated, depending on the desired implementation. Moreover, the blocks of process1100may be executed in the order shown inFIG.11or, alternatively, in a different order. Process1100may be implemented by network apparatus520or any suitable BS or network nodes. Solely for illustrative purposes and without limitation, process1100is described below in the context of network apparatus520. Process1100may begin at block1110.

At1110, process1100may involve processor522of a network node (e.g., network apparatus520) configuring a DCI scheduling a plurality of cells, wherein the DCI includes at least one of a first DCI, a second DCI, and a third DCI, the first DCI corresponds to a one-segment DCI structure, and the second DCI and the third DCI correspond to a two-segment DCI structure. Process1100may proceed from1110to1120.

At1120, process1100may involve processor522configuring a BD or CCE budget counted in one of the plurality of cells to an apparatus (e.g., communication apparatus510) of a wireless network. Process1100may proceed from1120to1130.

At1130, process1100may involve processor522transmitting the DCI to the apparatus (e.g., communication apparatus510) to schedule a PDSCH reception or a PUSCH transmission with at least one of the plurality of cells based on the DCI, wherein the first DCI includes a common bit field, a first specific bit field and a plurality of designated bit fields corresponding to the plurality of cells, the second DCI includes the common bit field, a second specific bit field and a first part of the designated bit fields corresponding to at least one of the plurality of cells, and the third DCI includes a second part of the designated bit fields corresponding to at least one of the plurality of cells.

In some implementations, process1100may further involve processor522configuring the BD or CCE budget by multiplying a pre-defined BD or CCE budget by a first scaling number in an event that the DCI includes the first DCI, wherein the first scaling number is no less than 1 and no more than a number of the plurality of cells. Then, process1100may further involve processor522configuring the BD or CCE budget by multiplying the pre-defined BD or CCE budget by a second scaling number in an event that the DCI includes the second DCI, wherein the second scaling number is no more than the number of the plurality of cells. Then, process1100may further involve processor522configuring the BD or CCE budget by multiplying the pre-defined BD or CCE budget by a third scaling number in an event that the DCI includes the third DCI, wherein the third scaling number is no more than the number of the plurality of cells. The first scaling number, the second scaling number or the third scaling number is pre-determined or configured by the network node (e.g., network apparatus520). The second scaling number is greater than the third scaling number.

FIG.12illustrates an example process1200in accordance with an implementation of the present disclosure. Process1200may be an example implementation of above scenarios/schemes, whether partially or completely, with respect to improvement of a scheduling of multi-cell PUSCH/PDSCH transmission with a single DCI. Process1200may represent an aspect of implementation of features of communication apparatus510. Process1200may include one or more operations, actions, or functions as illustrated by one or more of blocks1210to1230. Although illustrated as discrete blocks, various blocks of process1200may be divided into additional blocks, combined into fewer blocks, or eliminated, depending on the desired implementation. Moreover, the blocks of process1200may be executed in the order shown inFIG.12or, alternatively, in a different order. Process1200may be implemented by communication apparatus510or any suitable UE or machine type devices. Solely for illustrative purposes and without limitation, process1200is described below in the context of communication apparatus510. Process1200may begin at block1210.

At1210, process1200may involve processor512of an apparatus (e.g., communication apparatus510) transmitting a capability report to a network node (e.g., network apparatus520) of a wireless network to indicate a maximum number of cells that can be simultaneously scheduled. Process1200may proceed from1210to1220.

At1220, process1200may involve processor512receiving a DCI scheduling one or multiple cells with a number of co-scheduled cells being smaller than or equal to the maximum number of cells, wherein the DCI includes at least one of a first DCI, a second DCI, and a third DCI, the first DCI corresponds to a one-segment DCI structure, and the second DCI and the third DCI correspond to a two-segment DCI structure. Process1200may proceed from1220to1230.

At1230, process1200may involve processor512performing a PDSCH reception or a PUSCH transmission with at least one of the number of co-scheduled cells based on the DCI, wherein the first DCI includes a common bit field, a first specific bit field and a plurality of designated bit fields corresponding to the number of co-scheduled cells, the second DCI includes the common bit field, a second specific bit field and a first part of the designated bit fields corresponding to at least one of the number of co-scheduled cells, and the third DCI includes a second part of the designated bit fields corresponding to at least one of the number of co-scheduled cells.

In some implementations, process1200may further involve processor512receiving a configuration of a plurality of cell sets for multi-cell scheduling in one cell group, wherein each of the plurality of cell sets includes at least one cell that can be simultaneously scheduled. Then, process1200may further involve processor512determining a CCE index of a search space for the DCI according to a cell set index. The cell set index is configured by the network node (e.g., network apparatus520) corresponding to one of the plurality of cell sets.

In some implementations, process1200may further involve processor512receiving a plurality of DCIs corresponding to the plurality of cell sets, wherein each of the plurality of DCIs includes the first DCI. The plurality of DCIs are transmitted with different CCE indexes in a frequency domain.

FIG.13illustrates an example process1300in accordance with an implementation of the present disclosure. Process1300may be an example implementation of above scenarios/schemes, whether partially or completely, with respect to improvement of a scheduling of multi-cell PUSCH/PDSCH transmission with a single DCI. Process1300may represent an aspect of implementation of features of network apparatus520. Process1300may include one or more operations, actions, or functions as illustrated by one or more of blocks1310to1330. Although illustrated as discrete blocks, various blocks of process1300may be divided into additional blocks, combined into fewer blocks, or eliminated, depending on the desired implementation. Moreover, the blocks of process1300may be executed in the order shown inFIG.13or, alternatively, in a different order. Process1300may be implemented by network apparatus520or any suitable BS or network nodes. Solely for illustrative purposes and without limitation, process1300is described below in the context of network apparatus520. Process1300may begin at block1310.

At1310, process1300may involve processor522of a network node (e.g., network apparatus520) receiving a capability report from an apparatus (e.g., communication apparatus510) of a wireless network to indicate a maximum number of cells that can be simultaneously scheduled for the apparatus (e.g., communication apparatus510). Process1300may proceed from1310to1320.

At1320, process1300may involve processor522configuring a DCI scheduling one or multiple cells with a number of co-scheduled cells being smaller than or equal to the maximum number of cells, wherein the DCI includes at least one of a first DCI, a second DCI, and a third DCI, the first DCI corresponds to a one-segment DCI structure, and the second DCI and the third DCI correspond to a two-segment DCI structure. Process1300may proceed from1320to1330.

At1330, process1300may involve processor522transmitting the DCI to the apparatus (e.g., communication apparatus510) to schedule a PDSCH reception or a PUSCH transmission with at least one of the number of co-scheduled cells, wherein the first DCI includes a common bit field, a first specific bit field and a plurality of designated bit fields corresponding to the number of co-scheduled cells, the second DCI includes the common bit field, a second specific bit field and a first part of the designated bit fields corresponding to at least one of the number of co-scheduled cells, and the third DCI includes a second part of the designated bit fields corresponding to at least one of the number of co-scheduled cells.

In some implementations, process1300may further involve processor522configuring a configuration of a plurality of cell sets for multi-cell scheduling in one cell group, wherein each of the plurality of cell sets includes at least one cell that can be simultaneously scheduled. Then, process1300may further involve processor522configuring a CCE index of a search space for the DCI according to a cell set index. Then, process1300may further involve processor522configuring the cell set index that corresponds to one of the plurality of cell sets.

In some implementations, process1300may further involve processor522transmitting a plurality of DCIs corresponding to the plurality of cell sets, wherein each of the plurality of DCIs includes the first DCI. The plurality of DCIs are transmitted with different CCE indexes in a frequency domain.

ADDITIONAL NOTES