Method for manufacturing semiconductor device

A method for manufacturing a semiconductor device is provided. In particular, a method for removing unwanted material layers from an edge and lower bevel region of a wafer is provided. The method includes performing a first etch of an edge region of a wafer having material layers formed thereon, coating the wafer with a photoresist layer, and patterning the photoresist layer to expose at least the edge and an upper bevel region of the wafer for etching the material layers remaining after performing the first etch.

This application claims the benefit under 35 USC §119(e) of Korean Patent Application No. 10-2005-0132296 filed Dec. 28, 2005, which is incorporated herein by reference in its entirety.

FIELD OF THE INVENTION

The present invention relates to a method for manufacturing a semiconductor device.

BACKGROUND OF THE INVENTION

The manufacturing process of a semiconductor integrated circuit typically includes a series of processes for depositing conductive layers and insulating layers on the entire surface of a semiconductor wafer and patterning the material layers forming each layer to realize the semiconductor integrated circuit as designed.

In general, a semiconductor integrated circuit includes a plurality of units of semiconductor chips formed by carrying out the same processes in the same steps with respect to the plurality of semiconductor chips on the semiconductor wafer. Thus, after forming an uppermost material layer on each semiconductor chip unit, the semiconductor wafer is diced into the semiconductor chips and end parts thereof are discarded as unnecessary portions.

Because the manufacturing process for the semiconductor device is typically carried out relative to the entire surface of a semiconductor wafer, the material layers tend to form on the edge of the semiconductor wafer. However, the edge of the semiconductor wafer is an imperfect region in terms of crystallization, energy distribution, and mechanical strength, so the edge of the semiconductor wafer causes various defects in the process of forming the semiconductor integrated circuit.

That is, as semiconductor integrated circuits have become highly integrated, material layers accumulated on the edge and the bevel region of the wafer may cause various types of defects, such as expansion due to a thermal budget derived from, for example, deposition of a subsequent material layer, a lifting of a material layer, an incomplete removal of a material layer caused by a difference of selectivity between layers relative to a chemical used in dry etching or wet etching, and polymer residue. Such defects may generate particles, which penetrate into a semiconductor chip region in the process of manufacturing the semiconductor integrated circuit, thereby causing defects of the semiconductor integrated circuit.

Therefore, the material layers formed on an edge of the wafer have to be periodically removed therefrom during the manufacturing process for the semiconductor integrated circuit.

FIGS. 1 and 2show a conventional method for processing a wafer edge.

In order to remove such unnecessary material layers formed on the edge of the wafer60, in a conventional process, a photoresist layer64is coated on the entire surface of the wafer60including a semiconductor chip region (not shown) and then a pattern of the photoresist layer64having a regular width is formed from the edge of the wafer60through a photo process.

Referring toFIG. 2, the silicon oxide layer63exposed at the edge and a rear side of the wafer60is removed by a wet chemical etch using the photoresist layer64as a mask. Then, the photoresist layer64is removed by ashing and stripping processes.

After that, the exposed silicon nitride layer62is removed by using an appropriate chemical while employing the silicon oxide layer63as a mask. Subsequently, the exposed tungsten silicide layer or tungsten layer61is removed.

However, the conventional method does not completely remove the silicon oxide layer63from the edge and a lower region of the wafer60. Instead, the residue of the silicon oxide layer63may remain on the edge and the lower region of the wafer60.

Therefore, it is necessary to ensure that the silicon oxide layer or other material layers remaining on the edge and the lower region of the wafer are removed.

BRIEF SUMMARY

Accordingly, an object of the present invention to provide a method for completely removing material layers formed on an edge and a bevel region of a wafer.

In accordance with one aspect of the present invention, there is provided a method for manufacturing a semiconductor device, the method comprising the steps of: performing a first etch of material layers formed on a wafer with respect to an edge region and a lower bevel region of the wafer; coating a photoresist layer on the material layers on the wafer; and patterning the photoresist layer to expose at least the edge region and the lower bevel region of the wafer, wherein at least a portion of the material layers formed on the edge region and the lower bevel region of the wafer is removed before forming the photoresist layer.

DETAILED DESCRIPTION OF THE INVENTION

Hereinafter, a manufacturing process for a semiconductor device in accordance with embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 3is a view for schematically illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.

Referring toFIG. 3, a wafer210can be placed between a lower plate220and an upper plate230. In one embodiment, an oxide layer formed on an edge region and a lower region of the wafer210can be removed by feeding a reaction gas into a chamber where the wafer210is interposed between the plates220and230.

Material layers, such as an oxide layer, a metallic layer, etc., can be formed on the wafer210during previous processes. For the process for removing the material layers from an edge and lower region of the wafer using plates220and230, the lower plate220and the upper plate230can be part of a plasma processing apparatus.

When a wafer210is placed between the lower plate220and the upper plate230, the plates220and230can make close contact with a portion of the wafer210to prevent penetration of the reaction gas at the contacted portion of the wafer. Therefore, the plates220and230can prevent a portion of the wafer210from reacting with the plasma.

Therefore, a portion of the oxide layer exposed to the reaction gas can be removed from the edge region and lower region of the wafer210. Thus, according to embodiments of the present invention, an etching process can be selectively carried out with respect to a bevel region of the wafer210.

In a further embodiment, the above described processes can be repeatedly carried out for a wafer including a metallic material such as an aluminum material formed on the edge region and the lower region of the wafer210in addition to the oxide layer.

According to one embodiment of the subject invention, the metallic material and the oxide layer formed on the edge region and the lower region of the wafer210can be simultaneously removed.

In a specific embodiment, dry etching process may be carried out in the plasma processing apparatus under the conditions of 1 to 2 Torr, 400 to 900 Watt, 50 to 150 SCCM SF6, 50 to 200 SCCM CF4, and 5 to 30 SCCM O2.

By removing impurities existing on the edge and the lower region (the bevel region) of the wafer210, it may be possible to prevent characteristics of the semiconductor device from being affected by particles in subsequent processes.

FIGS. 4 to 6are sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.

InFIGS. 4 to 6, a cross section of the wafer210is shown. In particular,FIG. 4shows an edge region4aand a lower bevel region4bof the wafer210.

Referring toFIG. 4, in one method of manufacturing a semiconductor device, a metallic layer211, a nitride layer212and an oxide layer213can be sequentially deposited on a wafer210.

During the process steps for depositing the metallic layer211, the nitride layer212and the oxide layer213, these material layers211,212, and213can also form on the edge region4aof the wafer. In addition, the oxide layer213can also form on the lower region of the wafer including the lower bevel region4b.

To remove unwanted portions of the material layers, such as material layers211,212, and213, the wafer210can be interposed between an upper plate230and a lower plate220before a step of forming a photoresist pattern for exposing the end region of the wafer. The upper plate230and the lower plate220can be installed as a part of a plasma processing apparatus.

In a specific embodiment, the wafer210can make close contact with the upper plate230and the lower plate220while exposing the edge region4aand the lower bevel region4bof the wafer210.

Thereafter, SF6, CF4and O2gases can be injected into the plasma processing apparatus. These injected gases can make contact with the exposed edge region4aand the lower bevel region4bof the wafer210to perform an etch of the exposed regions.

In one embodiment, the dry etching may be carried out in the plasma processing apparatus under the conditions of 1 to 2 Torr, 400 to 900 Watt, 50 to 150 SCCM SF6, 50 to 200 SCCM CF4, and 5 to 30 SCCM O2.

According to embodiments, the injected gases do not reach a predetermined portion of the wafer210that makes close contact with the upper plate230and the lower plate220, but the injected gases do make contact with the exposed edge region4aand the lower bevel region4bof the wafer210.

Referring toFIG. 5, by the dry etching in the plasma processing apparatus, the oxide layer213formed on the edge region4aand the lower bevel region4bof the wafer210can be removed.

Then, a photoresist layer214can be formed and patterned on the wafer210such that an end region including the edge region4aof the wafer210is exposed.

Referring toFIG. 6, the oxide layer213, the nitride layer212and the metallic layer211can be etched using the photoresist layer214as an etch mask.

The etching process using the photoresist layer214as the mask may include a wet etching process. In addition, because the oxide layer213can be removed from the edge region4aand the lower bevel region4bof the wafer210in a first etch step, the material layers including the oxide layer will not be left remaining on the edge region4aand the lower bevel region4bof the wafer210.

In a specific embodiment, the wet etching process may be carried out under the conditions of 55° C., HF 49% to 55%, and 500 to 1000 RPM.