Electroluminescence display device

Provided is an electroluminescence display device. The electroluminescence display device includes a display area, a non-display area positioned the outer periphery of the display area, a thin film transistor in the display area, and a power supply line in the non-display area and connected to the thin film transistor. The power supply line includes a first part and a second part separated from each other, and a third part connected to the first part and the second part, and also includes a first layer formed along an edge portion of the power supply line and covering the edge portion of the power supply line.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the priority of Korean Patent Application No. 10-2016-0143389 filed on Oct. 31, 2016, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference.

BACKGROUND

Technical Field

The present disclosure relates to an electroluminescence display device and more particularly, to an electroluminescence display device capable of minimizing defects caused by moisture or oxygen permeation into a power supply line area and improving the reliability.

Description of the Related Art

An electroluminescence display device is a self-luminous type display device. The electroluminescence display device uses a light emitting element in which electrons and holes are injected into an emission layer from an electrode (cathode) for injecting electrons and an electrode (anode) for injecting holes, respectively, and the electrons and holes are combined into excitons. When the excitons transit from an excited state to a ground state, lights are emitted from the light emitting element.

The electroluminescence display device can be classified into a top emission type, a bottom emission type, and a dual emission type depending on a direction of light emission, and can also be classified into a passive matrix type and an active matrix type depending on a driving method.

The electroluminescence display device does not require a separate light source unlike a liquid crystal display (LCD) device. Thus, the electroluminescence display device can be manufactured into a lightweight and thin form. Further, the electroluminescence display device is not only advantageous in terms of power consumption since it is driven with a low voltage, but also, the electroluminescence display device has excellent color expression ability, a high response speed, a wide viewing angle, and a high contrast ratio (CR). Therefore, the electroluminescence display device has been researched as a next-generation display device.

BRIEF SUMMARY

An electroluminescence display device is vulnerable to moisture or oxygen. Therefore, if moisture or oxygen permeates into the electroluminescence display device, a metal electrode of the electroluminescence display device may be oxidized or a light emitting layer may degenerate. Thus, various image quality defects such as pixel shrinkage or dark spot and a reduction in lifetime may occur.

The pixel shrinkage refers to darkening from an edge of a pixel caused by oxidation or degeneration of an interface of a metal electrode and an light emitting layer due to moisture or oxygen permeation. If the pixel shrinkage continues for a long time, it may be worsened to the dark spot which refers to darkening of the whole pixel area, which may greatly affect the reliability of the electroluminescence display device.

As for a conventional electroluminescence display device, moisture or oxygen permeation occurs through damage or cracks at an edge of a power supply line or a void formed along the edge of the power supply line under a protective layer during a process of manufacturing the electroluminescence display device in an unreliable environment of high temperature and high humidity. Therefore, image quality defects such as pixel shrinkage or dark spot occur and are demanded to be improved.

In this regard, the inventors of the present disclosure invented an electroluminescence display device capable of minimizing defects caused by moisture or oxygen permeation through an edge of a power supply line.

Accordingly, an object to be achieved by the present disclosure is to provide an electroluminescence display device capable of minimizing defects caused by moisture or oxygen permeation through an edge of a power supply line. In electroluminescence display device, the power supply line includes a power supply line under a protective layer and a connection part formed on another layer and also includes an anti-moisture permeation pattern formed along the edge of the power supply line and covering the edge of the power supply line.

The objects of the present disclosure are not limited to the aforementioned objects, and other objects, which are not mentioned above, will be apparent to a person having ordinary skill in the art from the following description.

In order to achieve the above object, there is provided an electroluminescence display device which minimizes moisture or oxygen permeation along an edge of a power supply line and thus can reduce the possibility of occurrence of image quality defects and improve the reliability.

According to an aspect of the present disclosure, there is provided an electroluminescence display device. The electroluminescence display device includes a display area, a non-display area positioned adjacent to an the outer periphery of the display area, a thin film transistor in the display area, a power supply line in the non-display area and connected to the thin film transistor, and first layer formed along an edge portion of the power supply line and covering the edge portion of the power supply line. The power supply line includes a first part and a second part separated from each other, and a third part connected to the first part and the second part.

According to another aspect of the present disclosure, there is provided an electroluminescence display device. The electroluminescence display device includes a substrate including a display area and a non-display area. The electroluminescence display device includes a power supply line positioned in the non-display area and connected to a thin film transistor positioned in the display area, a protective layer configured to cover at least a part of the power supply line, and an anti-moisture permeation pattern formed along an edge portion of the power supply line and covering the edge portion of the power supply line.

Details of other exemplary embodiments will be included in the detailed description of the disclosure and the accompanying drawings.

According to the present disclosure, in an electroluminescence display device, a power supply line includes at least one connection part formed on a different layer from the power supply line under a protective layer and an anti-moisture permeation pattern is formed along an edge portion of the power supply line and covering the edge portion of the power supply line. Thus, it is possible to block a moisture permeation path generated by voids formed along the edge portion of the power supply line under the protective layer or damage or cracks at the edge portion of the power supply line. Therefore, it is possible to minimize the occurrence of moisture or oxygen permeation into the electroluminescence display device through the edge portion of the power supply line.

Further, according to the present disclosure, the electroluminescence display device can minimize the occurrence of moisture or oxygen permeation through the edge of the power supply line. Thus, it is possible to minimize image quality defects of the electroluminescence display device and also possible to improve the reliability of the electroluminescence display device.

The effects of the present disclosure are not limited to the aforementioned effects, and other effects, which are not mentioned above, will be apparent to a person having ordinary skill in the art from the following description.

The objects to be achieved by the present disclosure, the aspects, and the effects of the present disclosure described above do not specify essential features of the claims, and, thus, the scope of the claims is not limited to the disclosure of the present disclosure.

DETAILED DESCRIPTION

Advantages and features of the present disclosure, and methods for accomplishing the same will be more clearly understood from exemplary embodiments described below with reference to the accompanying drawings. However, the present disclosure is not limited to the following exemplary embodiments but may be implemented in various different forms. The exemplary embodiments are provided only to complete disclosure of the present disclosure and to fully provide a person having ordinary skill in the art to which the present disclosure pertains with the category of the disclosure, and the present disclosure will be defined by the appended claims.

The features of various embodiments of the present disclosure can be partially or entirely bonded to or combined with each other and can be interlocked and operated in technically various ways as can be fully understood by a person having ordinary skill in the art, and the embodiments can be carried out independently of or in association with each other.

FIG. 1is a diagram schematically illustrating a structure of an electroluminescence display device according to an exemplary embodiment of the present disclosure.

As illustrated inFIG. 1, an electroluminescence display device100according to an exemplary embodiment of the present disclosure includes an image processor11, a timing controller12, a data driver13, a gate driver14, and a display panel15.

The image processor11outputs a data enable signal DE together with a data signal DATA supplied from the outside. The image processor11may output one or more of a vertical synchronization signal, a horizontal synchronization signal, and a clock signal in addition to the data enable signal DE. The image processor11is formed as an integrated circuit (IC) in a system circuit board.

The timing controller12is supplied with the data signal DATA as well as the data enable signal DE or a driving signal including one or more of the vertical synchronization signal, the horizontal synchronization signal, and the clock signal from the image processor11.

The timing controller12outputs a gate timing control signal GDC for controlling an operation timing of the gate driver14and a data timing control signal DDC for controlling an operation timing of the data driver13in response to the driving signal. The timing controller12is formed as an IC in a control circuit board.

The data driver13samples and latches the data signal DATA supplied from the timing controller12and then converts the data signal DATA into a gamma reference voltage and outputs the gamma reference voltage in response to the data timing control signal DDC supplied from the timing controller12. The data driver13outputs the data signal DATA through a plurality of data lines DL1to DLn. The data driver13is formed as an IC in a data circuit board.

The gate driver14outputs a gate signal in response to the gate timing control signal GDC supplied from the timing controller12. The gate driver14outputs the gate signal through a plurality of gate lines GL1to GLm. The gate driver14may be formed as an IC in a gate circuit board or may be formed in the form of GIP (Gate In Panel) on the display panel15.

The display panel15displays an image corresponding to the data signal DATA and the gate signal supplied from the data driver13and the gate driver14. The display panel15includes a plurality of sub-pixels SP that display the image.

Depending on a structure of the electroluminescence display device100, the sub-pixels SP may include a red sub-pixel, a green sub-pixel, and a blue sub-pixel, or a white sub-pixel, a red sub-pixel, a green sub-pixel, and a blue sub-pixel. Further, the sub-pixels SP may have one or more light emission areas different from each other depending on light emission characteristics.

The electroluminescence display device100according to an exemplary embodiment of the present disclosure may be applied to various electronic devices including a TV, a mobile PC, a tablet PC, a monitor, a laptop computer, a display device for vehicle, and a lighting device for vehicle, etc. The electroluminescence display device100may also be applied to a wearable display device, a foldable display device, and a rollable display device.

FIG. 2is a diagram schematically illustrating a circuit configuration of a sub-pixel of an electroluminescence display device.

Further,FIG. 3is an exemplary diagram illustrating a circuit configuration of a sub-pixel in an electroluminescence display device according to an exemplary embodiment of the present disclosure.

As illustrated inFIG. 2, a sub-pixel of the electroluminescence display device100according to an exemplary embodiment of the present disclosure includes a switching transistor SW, a driving transistor DR, a capacitor Cst, a compensation circuit CC, and a light emitting diode LED. The electroluminescence display device operates to emit a light depending on a driving current generated by the driving transistor DR.

The switching transistor SW performs a switching operation such that a data signal supplied through a first data line DL1is stored as a data voltage in the capacitor Cst in response to a gate signal supplied through a first1agate line GL1a. The driving transistor DR operates to allow the driving current to flow between a high-voltage power supply line VDD and a low-voltage power supply line VGND depending on the data voltage stored in the capacitor Cst.

The compensation circuit CC is configured to compensate a threshold voltage of the driving transistor DR. The compensation circuit CC includes one or more thin film transistors and/or a capacitor. The compensation circuit CC may have various configurations depending on a compensation method. In the present disclosure, an exemplary compensation circuit will be described with reference toFIG. 3.

As described inFIG. 3, the compensation circuit CC includes a sensing transistor ST and a reference line VREF. The sensing transistor ST is connected between the reference line VREF and an anode electrode (hereinafter, referred to as “sensing node”) of the light emitting diode LED. The sensing transistor ST operates to supply an initialization voltage (or sensing voltage) transferred through the reference line VREF to the sensing node or sense a voltage or current of the sensing node.

In the switching transistor SW, a gate electrode is connected to the first1agate line GL1a, a first electrode is connected to the first data line DL1, and a second electrode is connected to a gate electrode of the driving transistor DR.

In the driving transistor DR, the gate electrode is connected to the second electrode of the switching transistor SW, a first electrode is connected to the first power supply line VDD, and a second electrode is connected to the anode electrode of the light emitting diode LED.

In the capacitor Cst, a first electrode is connected to the gate electrode of the driving transistor DR and a second electrode is connected to the anode electrode of the light emitting diode LED.

In the light emitting diode LED, the anode electrode is connected to the second electrode of the driving transistor DR and a cathode electrode is connected to the second power supply line VGND.

In the sensing transistor ST, a gate electrode is connected to a first1bgate line GL1b, a first electrode is connected to the reference line VREF, and a second electrode is connected to the second electrode of the driving transistor DR and the anode electrode of the light emitting diode LED, both of which may be referred to as the sensing node.

For example, the sensing transistor ST may be similar or identical to or different from the switching transistor SW in operation time depending on a compensation algorithm (or configuration of a compensation circuit). The reference line VREF may be connected to the data driver. In this case, the data driver may sense a sensing node of a sub-pixel and generate a sensing result in real time for an image non-display period or N-frame period (N is an integer of 1 or more).

Further, a compensation target may be a data signal in digital form or a data signal or gamma reference voltage in analog form depending on a sensing result. Also, a compensation circuit that generates a compensation signal (or compensation voltage) based on the sensing result may be implemented within the data driver or the timing controller or as a separate circuit.

Furthermore, inFIG. 3, a sub-pixel having a3T (Transistor)1C (Capacitor) structure including the switching transistor SW, the driving transistor DR, the capacitor Cst, the light emitting diode LED, and the sensing transistor ST is illustrated as an example. However, depending on the structure of the compensation circuit CC, the subpixel may be configured to have a3T2C,4T2C,5T1C,6T1C,6T2C,7T1C, or any other structure.

Moreover, the thin film transistors TFTs such as the switching transistor SW, the driving transistor DR, and the sensing transistor ST may be implemented in various ways based on a semiconductor layer formed of amorphous silicon (a-Si), polycrystalline silicon (poly-Si), oxide semiconductor, or organic material.

FIG. 4is a plan view of an electroluminescence display device according to an exemplary embodiment of the present disclosure.

As illustrated inFIG. 4, the display panel15of the electroluminescence display device100according to an exemplary embodiment of the present disclosure includes a display area16and a non-display area17around the display area.

More specifically, a first substrate110of the display panel15includes the display area16in which a plurality of sub-pixels SP are formed and the non-display area17in which a first gate driver14a, a second gate driver14b, the high-voltage power supply line VDD, the low-voltage power supply line VGND, the reference line VREF, and a pad part18are formed.

The pad part18is formed in the non-display area17at an upper periphery of the first substrate110. The pad part18is a pad area electrically connected to an external circuit board. For example, the pad part18is connected to a data circuit board on which a data driver is mounted or a control circuit board on which a timing controller is mounted.

The first gate driver14aand the second gate driver14bare formed in the form of GIP (Gate In Panel) on the display panel15and configured as circuits that output gate signals to the sub-pixels SP formed in the display area16. The first gate driver14ais formed in the non-display area17on the left of display area16and configured to supply a gate signal to the display area16. The second gate driver14bis formed in the non-display area17on the right of display area16and configured to supply a gate signal to the display area16.

In the electroluminescence display device100according to an exemplary embodiment of the present disclosure, power supply lines include the high-voltage power supply line VDD, the low-voltage power supply line VGND, and the reference line VREF. Further, the power supply lines are disposed in the non-display area17between the pad part18at the upper periphery of the first substrate110and the display area16.

More specifically, the high-voltage power supply line VDD is configured to transfer high-voltage power supplied from the outside such as a power supply unit to the sub-pixels SP formed in the display area16through the pad part18.

Further, the low-voltage power supply line VGND is configured to transfer low voltage power (or ground power) supplied from the outside such as the power supply unit to the sub-pixels SP formed in the display area16through the pad part18.

Furthermore, the reference line VREF is configured to transfer an initialization voltage (or sensing voltage) supplied from the outside such as the power supply unit to the sub-pixels SP formed in the display area16through the pad part18or transfer a sensing result to the data driver.

The power supply lines according to an exemplary embodiment of the present disclosure, i.e., the high-voltage power supply line VDD, the low-voltage power supply line VGND, and the reference line VREF, are not necessarily limited to the layout as illustrated inFIG. 4. The power supply lines may be disposed variously in position and number.

For example, the power supply lines may include at least one of the high-voltage power supply line VDD, the low-voltage power supply line VGND, and the reference line VREF. However, it is to be noted that the power supply lines may also include other signal lines, except for the above-mentioned lines VDD, VGND and VREF.

FIG. 5is a cross-sectional view of an electroluminescence display device according to an exemplary embodiment of the present disclosure.

That is,FIG. 5is a diagram illustrating a detailed cross-sectional structure of a thin film transistor and the light emitting diode LED formed in the display area of the electroluminescence display device100according to an exemplary embodiment of the present disclosure.

Referring toFIG. 5, electroluminescence display device100according to an exemplary embodiment of the present disclosure includes a substrate110, a thin film transistor120and a first electrode150positioned on the substrate110, a second electrode160, and the light emitting diode LED positioned between the first electrode150and the second electrode160and having an emission unit155including a plurality of layers and light emitting layers EML.

The electroluminescence display device100includes a plurality of sub-pixels. A sub-pixel refers to an area of a minimum unit for actually emitting a light. Further, a plurality of sub-pixels may form a minimum group that can express a white light. For example, three sub-pixels such as a red sub-pixel, a green sub-pixel, and a blue sub-pixel may form the minimum group. However, the present disclosure is not limited thereto. It is possible to design sub-pixels in various ways.FIG. 5illustrates only one sub-pixel from among the plurality of sub-pixels of the electroluminescence display device100for convenience in explanation.

The substrate110is configured to support various components of the electroluminescence display device100and formed of an insulating material. The substrate110may be formed of glass or a flexible substrate having flexibility. For example, the substrate110may be formed of plastic such as polyethylene terephthalate (PET), polyethylene naphthalate(PEN), polyimide, etc.

A buffer layer115configured to block penetration of impurities from the substrate110or the outside and to protect various components of the electroluminescence display device100may be formed on the substrate110. The buffer layer115may have a single layer or multiple layer structure including, e.g., a silicon oxide film (SiOx), or a silicon nitride film (SiNx). The buffer layer115may be omitted depending on a structure or characteristics of the electroluminescence display device100.

The thin film transistor120including a semiconductor layer121, a gate electrode123, a source electrode127, and a drain electrode128is formed on the buffer layer115.

Specifically, the semiconductor layer121is formed on the substrate110. A gate insulating layer122configured to insulate the semiconductor layer121from the gate electrode123is formed on the semiconductor layer121.

An first interlayer124configured to insulate the gate electrode123from the source electrode127and the drain electrode128is formed on the gate electrode123.

The source electrode127and the drain electrode128each of which is in contact with the semiconductor layer121are formed on the first interlayer124. The source electrode127and the drain electrode128are electrically connected to the semiconductor layer121through a contact hole.

The semiconductor layer121may be formed of amorphous silicon (a-Si), polycrystalline silicon (poly-Si), oxide semiconductor, or organic semiconductor. If the semiconductor layer121is formed of oxide semiconductor, it may be formed of any one of indium gallium zinc oxide (IGZO), zinc tin oxide (ZTO), indium zinc oxide (IZO), or indium gallium oxide (IGO), indium tin zinc oxide (ITZO), but is not limited thereto.

The gate insulating layer122may have a single layer or multiple layer structure formed of an inorganic insulating material such as a silicon oxide film (SiOx), a silicon nitride film (SiNx), etc.

The gate electrode123functions to transfer a gate signal to the thin film transistor120, and may be formed of at least one of metals such as aluminum (Al), molybdenum (Mo), titanium (Ti), and copper (Cu) or alloys thereof. The gate electrode123may have a single layer or multiple layer structure formed of the metals or alloys thereof.

Referring toFIG. 5, electroluminescence display device100according to an exemplary embodiment of the present disclosure may further include a second interlayer126on the first interlayer124.

The source electrode127and the drain electrode128function to transfer an electrical signal transferred from the outside to the emission unit155via the thin film transistor120. The source electrode127and the drain electrode128may be formed of at least one of metals such as aluminum (Al), molybdenum (Mo), titanium (Ti), and copper (Cu) or alloys thereof. The source electrode127and the drain electrode128may have a single layer or multiple layer structure formed of the metals or alloys thereof.

In the present disclosure, the thin film transistor120has been illustrated as a driving transistor for convenience in explanation. Each sub-pixel may further include a switching transistor or a capacitor.

A planarization layer130is formed on the thin film transistor120. The planarization layer130functions to flatten an upper part of the thin film transistor120. The planarization layer130may be configured as a single layer or a plurality of layers, and may be formed of an organic material. For example, the planarization layer130may be formed of any one of polyimide or photo acryl. The planarization layer130includes an anode contact hole135for electrically connecting the thin film transistor120and the first electrode150in each sub-pixel.

The first electrode150is formed on the planarization layer130. The first electrode150may be an anode and may be formed of a conductive material having a relatively high work function value. Thus, the first electrode150functions to supply holes to the light emitting layer EML of the emission unit155. The first electrode150is electrically connected to the thin film transistor120through the anode contact hole135formed in the planarization layer130. For example, the first electrode150may be electrically connected to the source electrode127of the thin film transistor120. Further, the first electrode150is disposed to be spaced from each other between sub-pixels. The first electrode150is formed of a transparent conductive material, and may be formed of, e.g., indium tin oxide (ITO), indium zinc oxide (IZO), etc.

If the electroluminescence display device100according to an exemplary embodiment of the present disclosure is of a top-emission type, a light emitted from the light emitting layer EML of the emission unit155is reflected by the first electrode150. In this case, a reflective layer formed of a metal material, e.g., aluminum (Al) or silver (Ag), having a high reflection efficiency may be further formed on an upper or lower part of the first electrode150in order for the light to be more readily released in an upward direction.

For example, the first electrode150may have a two-layer structure in which a transparent conductive layer formed of a transparent conductive material and a reflective layer is laminated in sequence. Otherwise, the first electrode150may have a three-layer structure in which a transparent conductive layer, a reflective layer, and a transparent conductive layer are laminated in sequence. The reflective layer may be formed of silver (Ag) or an alloy including silver. For example, the reflective layer may be formed of silver (Ag) or APC (Ag/Pd/Cu).

In the exemplary embodiments of the present disclosure, the top-emission type refers to a structure in which a light emitted from the light emitting layer EML of the emission unit155is output in a direction toward the second electrode160. A bottom-emission type refers to a structure in which the light is output in a direction toward the first electrode150on the contrary to the top-emission type.

The electroluminescence display device100according to the present exemplary embodiment is a top-emission electroluminescence display device in which a light emitted from the light emitting layer EML of the emission unit155is output in a direction toward the second electrode160.

A bank layer140is formed on the first electrode150. The bank layer140separates the adjacent sub-pixels and is disposed on one side of the first electrode150to expose a part of the first electrode150. Further, the bank layer140may separate a plurality of sub-pixels.

The bank layer140may be formed of an organic material. For example, the bank layer140may be formed of polyimide, acryl, or benzocyclobutene (BCB)-based resin, but is not limited thereto.

In order to reduce reflection of an external light by the electroluminescence display device100, the bank layer140may be formed of a material that decreases reflection of an external light. For example, the bank layer140of the electroluminescence display device100according to an exemplary embodiment of the present disclosure may include a black pigment. That is, photo resist for forming the bank layer140may be formed of a material including the black pigment. The black pigment may be formed of an organic material or an inorganic material.

The black pigment may be formed of a carbon-based material or metal oxide. Further, the photo resist may include photosensitive compounds including at least one of a polymer, a monomer, and a photoinitiator. Furthermore, the photoresist may include a solvent that disperses the photosensitive compounds.

A spacer141is formed on the bank layer140. The spacer141may function to suppress the occurrence of defects caused by a mask during a process of depositing the plurality of organic layers or light emitting layers EML in the emission unit155or a process of forming the second electrode160. The spacer141may be omitted depending on a method of manufacturing the electroluminescence display device.

The second electrode160is formed on the emission unit155and the first electrode150. The second electrode160may be a cathode and needs to supply electrons to the light emitting layer EML of the emission unit155. Thus, the second electrode160is formed of a conductive material having a low work function. More specifically, the second electrode160may be formed of a metal material such as magnesium (Mg), silver-magnesium (Ag:Mg), etc.

If the electroluminescence display device100according to an exemplary embodiment of the present disclosure is of the top-emission type, the second electrode160may be formed of transparent conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), indium tin zinc oxide (ITZO), zinc oxide (ZnO), and tin oxide (TiO).

The emission unit155is formed between the first electrode140and the second electrode160. The emission unit155may include various layers as necessary and requisitely includes the light emitting layer EML. The layers may include at least one hole transport layer HTL and one electron transport layer ETL. The layers may further include functional layers including a hole injection layer, an electron injection layer, a hole blocking layer, an electron blocking layer, etc.

The light emitting layer EML included in the emission unit155may include a red light emitting layer configured corresponding to a red sub-pixel, a green light emitting layer configured corresponding to a green sub-pixel, and a blue light emitting layer configured corresponding to a blue sub-pixel.

A protective layer170is formed on the second electrode160. The protective layer170may have a structure including a single layer formed as an inorganic film or an organic film or including a plurality of layers in which inorganic films and organic films are laminated. For example, the protective layer170may include a plurality of layers in which a first protective layer171formed as an inorganic film, a second protective layer172formed as an organic film, and a third protective layer173formed as an inorganic film are laminated, but is not necessarily limited thereto. Further, the protective layer170may further include functional layers such as a moisture absorption layer that can adsorb oxygen or moisture from the outside or a buffer layer that can delay permeation of oxygen or moisture.

FIG. 6is a plan view of an electroluminescence display device according to an exemplary embodiment of the present disclosure.

That is,FIG. 6is a diagram provided to explain a detailed plan structure of a power supply line area in a portion X of the non-display area17illustrated inFIG. 4.

Referring toFIG. 6, the power supply lines of the electroluminescence display device100according to an exemplary embodiment of the present disclosure include the high-voltage power supply line VDD, the low-voltage power supply line VGND, and the reference line VREF. The power supply lines are connected to the pad part18at the upper periphery of the first substrate110and function to transfer a signal or power from the outside to the thin film transistor within the display area16.

More specifically, the high-voltage power supply line VDD is configured to transfer high-voltage power supplied from the outside such as a power supply unit to the sub-pixels SP formed in the display area16through the pad part18.

The low-voltage power supply line VGND is configured to transfer low voltage power (or ground power) supplied from the outside such as the power supply unit to the sub-pixels SP formed in the display area16through the pad part18.

The reference line VREF is configured to transfer an initialization voltage (or sensing voltage) supplied from the outside such as the power supply unit to the sub-pixels SP formed in the display area16through the pad part18or transfer a sensing result to the data driver.

In a relative electroluminescence display device, the power supply lines including the high-voltage power supply line VDD, the low-voltage power supply line VGND, and the reference line VREF are formed of the same material on the same layer as data lines, i.e., a source electrode and a drain electrode. The high-voltage power supply line VDD, the low-voltage power supply line VGND, and the reference line VREF are protected by the protective layer which is formed on the power supply lines in a subsequent process.

The high-voltage power supply line VDD, the low-voltage power supply line VGND, and the reference line VREF have sharply slanted edges of the lines due to the structural characteristics. In the power supply lines and the reference line, the edges are sharply slanted. Thus, parts of the edges of the lines may have damage or cracks caused by a developing solution used for a patterning process or an etching solution used for an etching process.

Therefore, in the relative electroluminescence display device, if moisture permeates from the outside through the pad part18, moisture or oxygen may spread from the outside to the inside through the damage or cracks in the edges of the high-voltage power supply line VDD, the low-voltage power supply line VGND, and the reference line VREF along the edges of the high-voltage power supply line VDD, the low-voltage power supply line VGND, and the reference line VREF.

Further, the protective layer formed on the high-voltage power supply line VDD, the low-voltage power supply line VGND, and the reference line VREF may not completely cover the edges of the high-voltage power supply line VDD, the low-voltage power supply line VGND, and the reference line VREF. Thus, voids formed along the edges may form a moisture permeation path. Therefore, moisture or oxygen may spread from the outside to the inside along the edges of the power supply lines.

Referring toFIG. 6, each of the power supply lines, i.e., the high-voltage power supply line VDD, the low-voltage power supply line VGND, and the reference line VREF, of the electroluminescence display device100according to an exemplary embodiment of the present disclosure includes an area A1, an area A2, and an area A3positioned between the area A1and the area A2. And the area A3is connected to the area A1and the area A2. The area A1and the area A2are separate from each other. In this case, the area A1of the power supply lines is adjacent to the pad part18. The area A2of the power supply lines is adjacent to the thin film transistor in the display area. Further, the protective layer170on the power supply lines is formed to cover at least a part of the first area A1of the power supply lines and the protective layer170is formed to completely cover the second area A2and the third area A3of the power supply lines.

More specifically, referring toFIG. 6, the low-voltage power supply line VGND of the the protective layer170according to an exemplary embodiment of the present disclosure includes a first part227ain the area A1, a second part227din the area A2, and a third part223ain the area A3.

Further, the reference line VREF of the protective layer170according to an exemplary embodiment of the present disclosure includes a first part227bin the area A1, a second part227ein the area A2, and a third part223bin the area A3.

Furthermore, the high-voltage power supply line VDD of the the protective layer170according to an exemplary embodiment of the present disclosure includes a first part227cin the area A1, a second part227fin the area A2, and a third part223cin the area A3.

The third part223aof the low-voltage power supply line VGND in the area A3functions as a connection part that connects the first part227ain the area A1and the second part227din the area A2. The first part227aand the second part227dare separate from each other. The third part223amay function to block a moisture permeation path which may be formed along the edge of the low-voltage power supply line VGND.

Further, the third part223bof the reference line VREF in the area A3functions as a connection part that connects the first part227bin the area A1and the second part227ein the area A2. The first part227band the second part227eare separate from each other. The third part223bmay function to block a moisture permeation path which may be formed along the edge of the reference line VREF.

Furthermore, the third part223cof the high-voltage power supply line VDD in the area A3functions as a connection part that connects the first part227cin the area A1and the second part227fin the area A2. The first part227cand the second part227fare separate from each other. The third part223cmay function to block a moisture permeation path which may be formed along the edge of the high-voltage power supply line VDD.

FIG. 7is a cross-sectional view of an electroluminescence display device taken along a line a-a′ inFIG. 6according to an exemplary embodiment of the present disclosure.

Referring toFIG. 7, the first part227cof the high-voltage power supply line VDD in the area A1and the second part227fof the high-voltage power supply line VDD in the area A2are formed on the same layer. The first part227cand the second part227fare separate from each other. The third part223cof the high-voltage power supply line VDD in the area A3may be formed on a different layer from the first part227cand the second part227f. Further, referring toFIG. 7, the third part223chaving a connection part connecting the first part227cand the second part227fmay be connected to each of the first part227cand the second part227fthrough one or more contact holes formed in an interlayer.

For example, the third part223cof the high-voltage power supply line VDD is formed on a different layer from the first part227cand the second part227f. And the third part223cof the high-voltage power supply line VDD functions as a connection part connecting the first part227cand the second part227fthrough at least one contact hole. Thus, the third part223cmay block a moisture permeation path which may be formed along the edge of the high-voltage power supply line VDD and reduce permeation of moisture from the outside.

More specifically, the first part227cof the high-voltage power supply line VDD in the area A1and the second part227fof the high-voltage power supply line VDD in the area A2may be formed of the same material as the source electrode127and the drain electrode128of the thin film transistor formed in the display area as shown inFIG. 5. The first part227cand the second part227fof the high-voltage power supply line VDD may be formed on the second interlayer126, and the first part227cand the second part227fof the high-voltage power supply line VDD may be formed by the same process as the source electrode127and the drain electrode128of the thin film transistor formed in the display area. The first part227cand the second part227fare separate from each other.

Further, the third part223cof the high-voltage power supply line VDD corresponding to a portion between the area A1and the area A2may be formed of the same material as the gate electrode123of the thin film transistor formed in the display area as shown inFIG. 5. The third part223cof the high-voltage power supply line VDD may be formed by the same process as the gate electrode123of the thin film transistor formed in the display area.

Furthermore, the first part227cmay be connected to the third part223cthrough a first contact hole129aformed in the first interlayer124and the second interlayer126. The second part227fmay be connected to the third part223cthrough a second contact hole129bformed in the first interlayer124and the second interlayer126.

Referring toFIG. 6, the electroluminescence display device100according to an exemplary embodiment of the present disclosure includes anti-moisture permeation patterns180a,180b, and180cwhich are layers formed along the edges of the power supply lines in the area A2of the power supply lines, i.e., the high-voltage power supply line VDD, the low-voltage power supply line VGND, and the reference line VREF, and covering the edges of the power supply lines, respectively. The anti-moisture permeation patterns180a,180b, and180care formed under the protective layer170formed to cover the high-voltage power supply line VDD, the low-voltage power supply line VGND, and the reference line VREF.

More specifically, the electroluminescence display device100according to an exemplary embodiment of the present disclosure includes the anti-moisture permeation pattern180aof the low-voltage power supply line VGND. The anti-moisture permeation pattern180aof the low-voltage power supply line VGND is formed along an edge portion of the second part227dof the low-voltage power supply line VGND and covering the edge portion of the second part227dof the low-voltage power supply line VGND. Further, the electroluminescence display device100includes the anti-moisture permeation pattern180bof the reference line VREF. The anti-moisture permeation pattern180bof the reference line VREF is formed along an edge portion of the second part227eof the reference line VREF and covering the edge portion of the second part227eof the reference line VREF. Furthermore, the electroluminescence display device100includes the anti-moisture permeation pattern180cof the high-voltage power supply line VDD. The anti-moisture permeation pattern180cof the high-voltage power supply line VDD is formed along an edge portion of the second part227fof the high-voltage power supply line VDD and covering the edge portion of the second part227fof the high-voltage power supply line VDD.

FIG. 8is a cross-sectional view of an electroluminescence display device taken along a line b-b′ inFIG. 6according to an exemplary embodiment of the present disclosure.

Referring toFIG. 8, the second part227fof the high-voltage power supply line VDD in the area A2may be formed of the same material as the source electrode127and the drain electrode128of the thin film transistor formed in the display area. The second part227fof the high-voltage power supply line VDD may be formed on the second interlayer126. The second part227fof the high-voltage power supply line VDD may be formed by the same process as the source electrode127and the drain electrode128of the thin film transistor formed in the display area. The anti-moisture permeation pattern180cof the high-voltage power supply line VDD is formed to cover the left and right edges portion of the second part227f.

For example, the anti-moisture permeation pattern180cis formed to completely cover the left and right edges portion of the second part227fof the high-voltage power supply line VDD. Thus, it is possible to reduce voids which may serve as a moisture permeation path along the edge portion of the high-voltage power supply line VDD. The voids may be generated when the protective layer170formed on the high-voltage power supply line VDD cannot completely cover the edge portion of the high-voltage power supply line VDD.

Further, in the electroluminescence display device100according to an exemplary embodiment of the present disclosure, the anti-moisture permeation pattern180aof the low-voltage power supply line VGND, the anti-moisture permeation pattern180bof the reference line VREF, and the anti-moisture permeation pattern180cof the high-voltage power supply line VDD may be patterned and formed of the same material as the planarization layer130formed on the thin film transistor in the display area. The anti-moisture permeation pattern180aof the low-voltage power supply line VGND may be formed on the edge portion of the second part227dof the low-voltage power supply line VGND and the second interlayer126. The anti-moisture permeation pattern180bof the reference line VREF may be formed on the edge portion of the second part227eof the reference line VREF and the second interlayer126. The anti-moisture permeation pattern180cof the high-voltage power supply line VDD may be formed on the edge portion of the second part227fof the high-voltage power supply line VDD and the second interlayer126. The anti-moisture permeation patterns (180a,180b,180c) may be formed by the same process as the planarization layer130.

Also, referring toFIG. 6andFIG. 7, the electroluminescence display device100according to an exemplary embodiment of the present disclosure may further include an additional anti-moisture permeation pattern181. The additional anti-moisture permeation pattern181is formed to cover at least a part of the high-voltage power supply line VDD, the low-voltage power supply line VGND, and the reference line VREF in the area A1of the power supply lines. Further, the additional anti-moisture permeation pattern181is formed to be overlapped with at least a part of the protective layer170.

More specifically, the additional anti-moisture permeation pattern181is formed to cover parts of the power supply lines on the first part227aof the low-voltage power supply line VGND, the first part227bof the reference line VREF, and the first part227cof the high-voltage power supply line VDD in the area A1. Also, the additional anti-moisture permeation pattern181is formed to be overlapped with at least a part of the protective layer170. Thus, it is possible to suppress moisture or oxygen permeation through the edges portion of the low-voltage power supply line VGND, the reference line VREF, and the high-voltage power supply line VDD and also possible to protect the low-voltage power supply line VGND, the reference line VREF, and the high-voltage power supply line VDD against the external environment.

The additional anti-moisture permeation pattern181may be patterned and formed of the same material as the planarization layer130formed on the thin film transistor in the display area and may be formed on the first part227aof VGND, the first part227bof VREF, the first part227cof VDD, and the second interlayer126. The additional anti-moisture permeation pattern181may be formed by the same process as the planarization layer130.

For example, in the electroluminescence display device100according to an exemplary embodiment of the present disclosure, the power supply lines VGND, VREF, and VDD include at least one connection part223a,223b,223cformed on a different layer from the power supply lines under the protective layer170. Also, the edge portion of the power supply lines VGND, VREF, and VDD corresponding to the second part (227d,227e,227f) are covered by the anti-moisture permeation patterns180a,180b, and180c. Thus, it is possible to block a moisture permeation path which may be generated by voids, formed along the edges of the power supply lines under the protective layer, or damage or cracks at the edges of the power supply lines. And it is possible to suppress the moisture or oxygen permeation through the edges of the power supply lines of the electroluminescence display device.

Further, in the electroluminescence display device100according to an exemplary embodiment of the present disclosure, the occurrence of moisture or oxygen permeation through the edges of the power supply lines can be reduced, and, thus, it is possible to decrease image quality defects of the electroluminescence display device and also possible to improve the reliability of the electroluminescence display device.

FIG. 9is a cross-sectional view of an electroluminescence display device200taken along a line a-a′ inFIG. 6according to another exemplary embodiment of the present disclosure.

In explaining the electroluminescence display device200according to another exemplary embodiment of the present disclosure, detailed description of components identical or corresponding to those of the above-described exemplary embodiments will be omitted or briefly provided.

Referring toFIG. 9, the electroluminescence display device200according to another exemplary embodiment of the present disclosure may further include an additional connection part255cthat connects the first part227cand the second part227f. The additional connection part255cis connecting the first part227cof the high-voltage power supply line VDD in the area A1and the second part227fof the high-voltage power supply line VDD in the area A2.

The additional connection part255cmay be interposed between the first interlayer124and the second interlayer126. Further, the additional connection part255cmay improve a contact characteristics between the first part227cand the second part227fof the high-voltage power supply line VDD and reduce a resistance of the high-voltage power supply line VDD.

For example, the third part223cof the high-voltage power supply line VDD as a connection part is formed on a different layer from the first part227cand the second part227fand connects the first part227cand the second part227fthrough at least one contact hole. And the additional connection part255cconnects the first part227cand the second part227f. Thus, it is possible to block a moisture permeation path which may be formed along the edge of the high-voltage power supply line VDD and thus possible to reduce permeation of moisture from the outside.

According to an aspect of the present disclosure, an electroluminescence display device includes a display area, a non-display area positioned adjacent to an outer periphery of the display area, a thin film transistor in the display area, and a power supply line in the non-display area and connected to the thin film transistor. The power supply line includes a first part and a second part separated from each other, and a third part connected to the first part and the second part, and also includes a first layer formed along an edge portion of the power supply line and covering the edge portion of the power supply line. For example, in the electroluminescence display device according to an aspect of the present disclosure, the power supply line includes at least one connection part formed on a different layer from the power supply line under the protective layer and the anti-moisture permeation pattern formed along the edge portion of the power supply line and covering the edge portion of the power supply line. Thus, it is possible to block a moisture permeation path generated by voids, formed along the edge portion of the power supply line under the protective layer, or damage or cracks at the edge portion of the power supply line. Therefore, it is possible to suppress the moisture or oxygen permeation into the electroluminescence display device through the edge portion of the power supply line. The electroluminescence display device according to an aspect of the present disclosure can reduce the occurrence of moisture or oxygen permeation through the edge portion of the power supply line. Thus, it is possible to reduce image quality defects of electroluminescence display device and also possible to improve the reliability of the electroluminescence display device.

The electroluminescence display device includes an planarization layer covering the thin film transistor, and the first layer may be formed of the same material as the planarization layer.

The thin film transistor may include a semiconductor layer, a gate insulating layer, a gate electrode, an interlayer and source electrode and drain electrode laminated in sequence.

The first part and the second part may be formed of the same material as the source electrode and drain electrode.

The first part and the second part may be on the same layer, and the third part may include a connection part on a different layer from the first part and the second part.

The connection part of the third part may be connected to each of the first part and the second part through at least one or more contact hole in an interlayer.

The connection part of the third part may be formed of the same material as the gate electrode.

The third part may further include an additional connection part configured to connect the first part and the second part.

The first layer is positioned in the second part.

The power supply line may include at least one of a high-voltage power supply line VDD, a low-voltage power supply line VGND, and a reference power supply line VREF.

The electroluminescence display device according to an exemplary embodiment of the present disclosure may further include a second layer covering the first part.

The electroluminescence display device according to an exemplary embodiment of the present disclosure may include a planarization layer covering the thin film transistor. The second layer may be formed of the same material as the planarization layer.

According to another aspect of the present disclosure, an electroluminescence display device includes a substrate including a display area and a non-display area, a first electrode and a second electrode on the substrate, and an emission unit between the first electrode and the second electrode. The electroluminescence display device includes a power supply line positioned in the non-display area and connected to a thin film transistor positioned in the display area and a protective layer configured to cover at least a part of the power supply line. The power supply line includes a connection part under the protective layer and an anti-moisture permeation pattern formed along an edge of the power supply line and covering the edge of the power supply line. Thus, it is possible to suppress moisture or oxygen permeation through the edge of the power supply line. For example, in the electroluminescence display device according to another aspect of the present disclosure, the power supply line includes at least one connection part formed on a different layer from the power supply line under the protective layer and the anti-moisture permeation pattern formed along the edge of the power supply line and covering the edge of the power supply line. Thus, it is possible to block a moisture permeation path generated by voids, formed along the edge of the power supply line under the protective layer, or damage or cracks at the edge of the power supply line. Therefore, it is possible to reduce the occurrence of moisture or oxygen permeation into the electroluminescence display device through the edge of the power supply line.

The electroluminescence display device according to another aspect of the present disclosure can reduce the occurrence of moisture or oxygen permeation through the edge of the power supply line. Thus, it is possible to decrease image quality defects of the electroluminescence display device and also possible to improve the reliability of the electroluminescence display device.

The electroluminescence display device may further include a pad part in the non-display area. The power supply line may include a first part adjacent to the pad part and a second part adjacent to the thin film transistor in the display area. The connection part may be positioned in a third part between the first part and the second part and may connect the first part and the second part.

The connection part of the third part may be connected to each of the first part and the second part through at least one or more contact hole in an interlayer.

The first part and the second part may be formed of the same material as source electrode and drain electrode of the thin film transistor.

The connection part of the third part may be formed of the same material as a gate electrode of the thin film transistor.

The anti-moisture permeation pattern may be formed of the same material as a planarization layer covering the thin film transistor.

The anti-moisture permeation pattern may be positioned in the second part.

The electroluminescence display device according to another aspect of the present disclosure may include an additional anti-moisture permeation pattern overlapping with at least a part of the protective layer and covering the first part.