Image sensors with through-oxide via structures

An imaging system may include an image sensor die stacked on top of a digital signal processor (DSP) die. The image sensor die may be a backside illuminated image sensor die. Through-oxide vias (TOVs) may be formed in the image sensor die and may extend at least partially into in the DSP die to facilitate communications between the image sensor die and the DSP die. Color filter housing structures may be formed over active image sensor pixels on the image sensor die. In-pixel grid structures may be integrated with the color filter housing structures to help reduce crosstalk. Light shielding structures may be formed over reference image sensor pixels on the image sensor die. The TOVs, the in-pixel grid structures, and the light shielding structures may be formed simultaneously. The formation of the color filter housing structures may also be integrated the formation of the TOVs.

BACKGROUND

This relates generally to imaging systems, and more particularly, to imaging systems with through-oxide vias (TOVs).

Modern electronic devices such as cellular telephones, cameras, and computers often use digital image sensors. Imaging systems (i.e., image sensors) often include a two-dimensional array of image sensing pixels. Each pixel typically includes a photosensitive element such as a photodiode that receives incident photons (light) and converts the photons into electrical signals. The imaging system contains an image sensor die with an image sensor integrated circuit and an array of photodiodes. The image sensor die is mounted on a digital signal processor (DSP) die.

Circuitry within the image sensor die may be coupled to circuitry within the digital signal processor die using through-oxide vias (i.e., metal via structures formed through at least a first oxide layer in the image sensor die and at least a second oxide layer in the DSP die). The amount of time, space, efficiency, and cost for forming via connections in the integrated circuits may, however, be limited. In conventional imaging systems, the steps for forming through-oxide via structures connecting the circuitry in the image sensor die to the circuitry in the DSP die are inefficient and costly.

It would therefore be desirable to provide improved ways of forming via connections in imaging systems.

DETAILED DESCRIPTION

Electronic devices such as digital cameras, computers, cellular telephones, and other electronic devices include image sensors that gather incoming image light to capture an image. The image sensors may include arrays of imaging pixels. The pixels in the image sensors may include photosensitive elements such as photodiodes that convert the incoming image light into image signals. Image sensors may have any number of pixels (e.g., hundreds or thousands or more). A typical image sensor may, for example, have hundreds of thousands or millions of pixels (e.g., megapixels). Image sensors may include control circuitry such as circuitry for operating the imaging pixels and readout circuitry for reading out image signals corresponding to the electric charge generated by the photosensitive elements.

FIG. 1is a diagram of an illustrative electronic device that uses an image sensor to capture images. Electronic device10ofFIG. 1may be a portable electronic device such as a camera, a cellular telephone, a video camera, or other imaging device that captures digital image data. Camera module12may be used to convert incoming light into digital image data. Camera module12may include one or more lenses14and one or more corresponding image sensors16. During image capture operations, light from a scene may be focused onto image sensor16using lens14. Image sensor16may provide corresponding digital image data to processing circuitry18. Image sensor16may, for example, be a backside illumination (BSI) image sensor. If desired, camera module12may be provided with an array of lenses14and an array of corresponding image sensors16. Image sensor16may include an array of image sensor pixels such as an array of image sensor pixels15and a corresponding array of color filter elements.

Processing circuitry18may include one or more integrated circuits (e.g., image processing circuits, microprocessors, storage devices such as random-access memory and non-volatile memory, etc.) and may be implemented using components that are separate from camera module12and/or that form part of camera module12(e.g., circuits that form part of an integrated circuit that includes image sensors16or an integrated circuit within module12that is associated with image sensors16). Image data that has been captured by camera module12may be processed and stored using processing circuitry18. Processed image data may, if desired, be provided to external equipment (e.g., a computer or other device) using wired and/or wireless communications paths coupled to processing circuitry18.

FIG. 2shows an imaging system100that includes an image sensor die102stacked on top of a signal processing die104. Image sensor die102may be a backside illuminated (BSI) image sensor (as an example). Configured in this way, image sensor die102may include an array of image sensor pixels operable to produce image data (i.e., still or video data). Image data produced by image sensor die102may then be fed to signal processing die for further processing. Die104may sometimes be referred to as a digital signal processor (DSP). The example ofFIG. 2is merely illustrative. If desired, image sensor die102may be a front-side illuminated (FSI) image sensor die.

In conventional imaging systems, circuitry within a DSP die may communicate with circuitry within an image sensor die that is stacked on top of the DSP die using through-oxide vias. Through-oxide vias are formed in a first processing step. Light shielding structures are then formed over the through-oxide vias in a second processing step after the first processing step. Color filter housing structures are then formed over corresponding image sensor pixels in the image sensor in a third processing step after the second processing step. Forming image sensor structures in this way requires many processing steps and can be inefficient and costly.

In accordance with an embodiment of the present invention, an image sensor die is provided that can be formed using a reduced number of steps.FIG. 3is a cross-sectional side view of image sensor die102that is stacked on top of signal processing die104. The interface at which dies102and104are stacked is marked by arrow103.

As shown inFIG. 3, image sensor die102may include a substrate110having a front surface and a back surface and interconnect routing layers112formed on the front surface of substrate110. Layers112may include alternating metal routing layers and via layers (e.g., routing structures formed in dielectric material) and may sometimes be referred to collectively as a dielectric stack.

Photosensitive elements such as photodiodes116may be formed at the front surface of substrate110. Photodiodes116that are formed in an “active” portion of image sensor die102may receive incoming light and convert the incoming light into corresponding pixel signals, whereas photodiodes116′ that are formed in a peripheral portion of image sensor102may not receive any incoming light and may serve as reference photodiodes for noise canceling purposes (as an example). Shallow trench isolation (STI) structures such as STI structures118may be formed in the front surface of substrate110between each adjacent pair of photodiodes. STI structures118may serve to ensure that neighboring photodiodes are electrically isolated from one another.

An antireflective coating (ARC) layer such as ARC layer120may be formed at the back surface of substrate110. Layer may be formed from hafnium oxide (as an example). ARC layer120may serve to ensure that light entering substrate110from the back side is not reflected back towards the direction from which it arrived.

A first dielectric layer122(e.g., a first oxide layer) may be formed over layer120. A first passivation layer130may be formed on the first dielectric layer122. A second dielectric layer (e.g., a second oxide layer) may be formed on the first passivation layer130. A second passivation layer134may be formed on the second dielectric layer130. Passivation layers130and134may be formed from nitride material (as an example).

Still referring toFIG. 3, color filter housing structures180may be formed in the active portion of image sensor die102. Color filter housing structures180may include an array of slots182in which color filter elements may be inserted. An array of color filter elements that are contained within such types of housing structures are sometimes referred to as a CFA-in-a-box (abbreviated as “CIAB”). Color filter array housing structures180may have walls that are formed from the dielectric material in layer132and may serve to provide improved light guiding capabilities for directing light to desired image sensor pixels.

In some embodiments, an opaque grid structure such as grid124may be formed over the image sensor pixels in the active portion. Grid124may be formed from metal or other opaque materials and may also help direct light to the desired image sensor pixels. Grid structure124may be a grid-shaped series of intersecting opaque lines that define a rectangular array of pixel openings. Each of the openings in the grid is aligned with a respective color filter element in a corresponding array of color filter elements. Grid structure124formed in this way may sometimes be referred to as an in-pixel grid or an in-pixel matrix. In such embodiments, an additional dielectric sidewall coating such as oxide liner125may be deposited within slots182so that the sidewall coating covers the side of the metal in-pixel grid. Liner125formed in this way may serve to reduce the amount of reflection from grid structures124.

As shown inFIG. 3, inter-die via structures such as via structures128may traverse through at least a portion of die102and die104. Via structures128may serve to connect circuitry within die102to circuitry within die104. For example, vias128may connect metal routing structures114in dielectric stack112of die102to corresponding metal routing structures108in a dielectric stack106within die104. Vias128may be formed through the oxide material in layers122,112, and106and may therefore sometimes be referred to herein as through-oxide vias (TOVs). Vias128may also be formed through STI structures118at the front surface of substrate110.

In the example ofFIG. 3, TOVs128may be constructed during formation of dielectric layer122. For example, after ARC layer120has been formed on the back surface of substrate110, a first hole can be formed through layer120and substrate110(e.g., through shallow trench isolation structures118formed at the back surface of substrate110). Thereafter, oxide material122may be deposited on top of layer120and may coat the sidewall and bottom of the first hole (see, oxide material123inFIG. 3). Once the oxide material for layer122has been formed, a second hole that is smaller than the first hole can be formed through the center of the first hole through layer122, substrate110, layers112, and through at least a portion of the interconnect routing layers106in die104.

Conductive material (e.g., copper, aluminum, tungsten, silver, gold, a combination of these materials, or other suitable conducting material) can then be deposited into the remaining hole to form a TOV structure. InFIG. 3, sidewall liner123and layer122may represent the same dielectric layer.

In one suitable arrangement, light shielding structures such as light shielding structures126and in-pixel grid structures124may be formed at the same time as TOV structure128(e.g., structures124,126, and128may be formed simultaneously). In such arrangements, structures124,126and128may be formed in at least the same dielectric layer (e.g., in oxide layer122). As described above, in-pixel grid124may serve to help direct incoming light and reduce pixel crosstalk. Vias128may facilitate communication between die102and die104. Light shield126may prevent light from reaching the reference photodiodes116′ or yet other structures in the peripheral/inactive portion of image sensor die102.

Since in-pixel grid structures124, light shielding structures126, and TOV structures128are formed simultaneously, structures124,126, and128may be formed from the same conductive and opaque material. Forming these structures in the same processing step can help reduce the total number of manufacturing steps and reduce cost.

In another suitable arrangement, the TOV structures154may be formed at the same time as the color filter housing structures180(see, e.g.,FIG. 4). As shown inFIG. 4, through-oxide vias154may be formed through the second oxide layer132, first passivation layer130, first oxide layer122, image sensor substrate110(e.g., through STI structures118formed at the front surface of substrate110), routing layers112in die102, and at least a portion of the routing layers106in die104.

For example, after passivation layer130has been formed on dielectric layer122, a first hole can be formed through layers130,122,120, and substrate110. Thereafter, oxide material132may be deposited on top of layer130and may coat the sidewall and bottom of the first hole (see, oxide liner156of TOV154inFIG. 4). Once the oxide material for layer132has been formed, a second hole that is smaller than the first hole can be formed through the center of the first hole through layer132, layer130, layer122, substrate110, layers112, and through at least a portion of the interconnect routing layers106in die104.

Conductive material (e.g., copper, aluminum, tungsten, silver, gold, a combination of these materials, or other suitable conducting material) can then be deposited into the remaining hole to form TOV structure154. InFIG. 4, sidewall liner156and layer132may represent the same dielectric layer.

In this arrangement, light shielding structures152and in-pixel grid structures150may be formed at the same time as TOV structure154(e.g., structures150,152, and154may be formed simultaneously). In such arrangements, structures150,152and154may be formed in at least the same dielectric layer (e.g., in second oxide layer132). In-pixel matrix150may serve to help direct incoming light and reduce pixel crosstalk. In such embodiments, an additional dielectric sidewall coating such as oxide liner125may be deposited within the CIAB slots so that the sidewall coating covers the side of metal in-pixel grid150. Liner125formed in this way may serve to reduce the amount of reflection from grid structures150. Vias154may facilitate communication between die102and die104. Light shield152may prevent light from reaching the reference photodiodes116′ or yet other structures in the peripheral/inactive portion of image sensor die102.

Structures150,152, and154may be formed from the same conductive and opaque material. In the example ofFIG. 4, the walls of color filter array housing structure180are formed from the oxide material in layer132. The CIAB oxide walls may therefore be formed at the same as the oxide material156lining TOVs154. Formed in this way, the CFA housing structures (or CIAB structures) are sometimes referred to as being integrated with the through-oxide vias154. Forming structures150,152, and154in the same processing step and integrating the color filter housing structures with the TOV structures can help simplify process flow with fewer steps and fewer masks, can potentially help reduce stack height (i.e., the thickness of die102) for better optical performance, and can also help provide a more uniform thickness across die102(i.e., to help ensure that the stack height in the active pixel imaging region is substantially similar to the stack height in the peripheral inactive region).

FIG. 5shows yet another suitable embodiment. The arrangement ofFIG. 5is similar to the configuration ofFIG. 3, except the arrangement inFIG. 5does not include color filter array housing structures. As shown inFIG. 5, image sensor die102may include in-pixel grid structures170formed over corresponding active image sensor pixels, light shielding structures172, and TOVs174formed in at least dielectric layer122. Structures170,172, and174may be formed simultaneously (e.g., by depositing copper into corresponding cavities patterned in the surface of layer122). Even though CIAB structures are not directly integrated on die102, a separate color filter array structure (not shown) may be formed over die102to filter incoming light.

FIG. 6is a flow chart of illustrative steps for manufacturing an imaging system of the type described in connection withFIG. 4. At step200, the front side of image sensor die102may be stacked directly on the front side of signal processing die104. The front side of each die may generally refer to the side at which interconnect routing layers are formed.

At step202, the back side of substrate110of image sensor102may be thinned down to help reduce stack height. Prior to this step, photodiodes116, shallow trench isolation structures118, other pixel control circuitry, and associated routing circuitry in stack112may have already been formed.

At step204, ARC liner120may be formed on the back side of substrate110. At step206, a first oxide layer122may be formed on the ARC liner120. At step208, a first passivation layer130(e.g., a first nitride liner) may be formed on the first oxide layer.

At step210, a first hole may be etched through layers130,122,120, and substrate110. At step212, oxide material may be deposited on top of layer130to form second oxide layer132and to also coat the sidewall and bottom of the first hole. At step214, additional holes may be patterned in layer132to form recesses for TOV structures, in-pixel grid structures, and light shielding structures. For example, at least an additional second hole may be formed through the center of the first hole and may extend into DSP die104while cavities for the in-pixel grid structures and the light shielding structures may be etched out. During step214, these holes and cavities may be simultaneously filled with opaque, conductive material (e.g., copper) to form structures150,152, and154(see, e.g.,FIG. 4).

At step214, a second passivation layer (e.g., a second nitride liner) may be formed on the second oxide layer132. At step218, CFA housing structures180may be formed over corresponding photodiodes in the active imaging region of die102(e.g., by forming slots through at least layers134and132, where the slots are configured to receive color filter elements).

FIG. 7shows in simplified form a typical processor system500, such as a digital camera, which includes an imaging device400. Imaging device400may include a pixel array402having pixels of the type shown inFIG. 1(e.g., pixel array402may be an array of image pixels formed on an image sensor SOC). Processor system500is exemplary of a system having digital circuits that may include imaging device400. Without being limiting, such a system may include a computer system, still or video camera system, scanner, machine vision, vehicle navigation, video phone, surveillance system, auto focus system, star tracker system, motion detection system, image stabilization system, and other systems employing an imaging device.

Processor system500, which may be a digital still or video camera system, may include a lens such as lens596for focusing an image onto a pixel array such as pixel array30when shutter release button597is pressed. Processor system500may include a central processing unit such as central processing unit (CPU)595. CPU595may be a microprocessor that controls camera functions and one or more image flow functions and communicates with one or more input/output (I/O) devices591over a bus such as bus593. Imaging device400may also communicate with CPU595over bus593. System500may include random access memory (RAM)592and removable memory594. Removable memory594may include flash memory that communicates with CPU595over bus593. Imaging device400may be combined with CPU595, with or without memory storage, on a single integrated circuit or on a different chip. Although bus593is illustrated as a single bus, it may be one or more buses or bridges or other communication paths used to interconnect the system components.

Various embodiments have been described illustrating an electronic device (see, e.g., device10ofFIG. 1) that includes an imaging system and host subsystems. An imaging system may include one or more image sensors. Each image sensor may include an array of image pixels formed on a semiconductor substrate. Each image pixel may include one or more photosensitive elements configured to convert incoming light into electric charges.

In particular, imaging circuitry may include an image sensor die stacked on top of a digital signal processor (DSP) die. The image sensor die may include a substrate having front and back surfaces, a plurality of imaging pixels and shallow trench isolation (STI) structures formed in the front surface of the substrate, interconnect routing layers formed on the front surface of the substrate, a layer of antireflective coating (ARC) material formed on the back surface of the substrate, a first dielectric layer formed on the ARC layer, a first passivation layer formed on the first dielectric layer, a second dielectric layer formed on the first passivation layer, and a second passivation layer formed on the second dielectric layer. The first and second dielectric layers may be formed from oxide, whereas the first and second passivation layers may be formed from nitride (as examples).

In one suitable arrangement, a through-oxide via (TOV) structure may be formed through the first dielectric layer, the second dielectric layer, the substrate, and the interconnect routing layers, and may extend partly into the DSP die. A TOV formed in this way may serve to convey image pixel signals from the image sensor die to the DSP die. The image sensor die may also include light shielding structures and/or in-pixel grid structures that are formed in the second dielectric layer. The TOV structure, the light shielding structure, and/or the in-pixel grid structures may be formed simultaneously using the same opaque, conductive material. In some embodiments, the image sensor die may also include color filter array housing structures (sometimes referred to as CFA-in-a-box structures) having walls that are constructed during formation of the TOV structure (e.g., the color filter array housing structures may be integrated with the TOV structure).

The foregoing is merely illustrative of the principles of this invention and various modifications can be made by those skilled in the art. The foregoing embodiments may be implemented individually or in any combination.

Although the invention has been described in some detail for the purposes of clarity, it will be apparent that certain changes and modifications can be practiced within the scope of the appended claims. Although some of the appended claims are single dependent only or reference only some of their preceding claims, their respective feature(s) can be combined with the feature(s) of any other claim.