Methods for generating schematic diagrams and apparatuses using the same

An embodiment of the invention introduces a method for generating schematic diagrams, executed by a processing unit of an apparatus, which comprises the following steps. A pin-editing interface comprising a data table is generated to assist a user to configure pin settings. A user setting is obtained via the pin-editing interface, and a schematic diagram is generated on a display unit according to the obtained user setting.

CROSS REFERENCE TO RELATED APPLICATIONS

This Application claims priority of Taiwan Patent Application No. 102134238, filed on Sep. 24, 2013, the entirety of which is incorporated by reference herein.

BACKGROUND

1. Technical Field

The present invention relates to schematic design, and in particular, to methods for generating schematic diagrams and apparatuses using the same.

2. Description of the Related Art

It consumes excessive time for an engineer to draw schematic diagrams in schematic design, for example by drawing a line and assigning a net name for each pin. A total number of nets in an information product typically are in the thousands, and each net may include five or more pins. In addition, the connectivity of the net pins usually crosses tens of pages, causing the engineer to spend much time with the trivial tasks of assigning net symbols, net names and cross page symbols. However, the routine manual operations can easily go wrong, and it may cause the production machine to malfunction when the schematic diagram has errors. Thus, it is desirable to have methods for generating schematic diagrams and apparatuses using the same to not only reduce the drawing time but also eliminate errors that happen in schematic diagrams.

BRIEF SUMMARY

An embodiment of the invention introduces a method for generating schematic diagrams, executed by a processing unit of an apparatus, which comprises the following steps. A pin-editing interface comprising a data table is generated to assist a user to configure pin settings. A user setting is obtained via the pin-editing interface, and a schematic diagram is generated on a display unit according to the obtained user setting.

An embodiment of the invention introduces an apparatus for generating schematic diagrams, which comprises a display unit and a processing unit. The processing unit coupled to the display unit generates a pin-editing interface comprising a data table to assist a user to configure pin settings, obtains a user setting via the pin-editing interface, and generates a schematic diagram on a display unit according to the user setting.

DETAILED DESCRIPTION

FIG. 1is the system architecture of an electronic device according to an embodiment of the invention. The system architecture10may be practiced in a desktop computer, a notebook computer, or others, at least including a processing unit110. The processing unit110can be implemented in numerous ways, such as with dedicated hardware, or with general-purpose hardware (e.g., a single processor, multiple processors or graphics processing units capable of parallel computations, or others) that is programmed using microcode or software instructions to perform the functions recited hereinafter. The system architecture10further includes a memory150for storing necessary data in execution, such as variables, data tables, or others, and a storage unit140for storing a wide range of electronic files, such as documents, schematic diagrams, net lists, or others. A communications interface160is included in the system architecture10and the processing unit110can communicate with other electronic devices thereby. The communications interface160may be a LAN (local area network) communications module, a WLAN (wireless local area network) communications module, a Bluetooth® communications module, or others. The system architecture10further includes one or more input devices130to receive a user input, such as a keyboard, a mouse, a touch panel, or others. A user may press hard keys of the keyboard to input characters, control a mouse pointer on a display by operating the mouse, or control an executed application with one or more gestures made on the touch panel. The gestures include, but are not limited to, a one-click, a double-click, a single-finger dragging, and a multi-finger dragging. A display unit120, such as a TFT-LCD (Thin film transistor liquid-crystal display) panel, an OLED (Organic Light-Emitting Diode) panel, or others, may also be included to display input letters, alphanumeric characters, and symbols, dragged paths, drawings, or screens provided by an application for a user's viewing.

FIG. 2is the system architecture of a schematic diagram-generation system according to an embodiment of the invention. An initial schematic diagram220includes information regarding all pins of each component, such as a chip, a chipset, a passive component, which, however, lacks connectivity information between pins of any two or more components. A drawing-assistance system210may import naming suggestions for pins from a rule database230and produce a data-table-based interface to assist settings to each pin by a user, for example, a net name, a connectivity status, a cross-page status, an I/O status, etc.FIG. 3illustrates an initial schematic diagram according to an embodiment of the invention. The initial schematic diagram220shows a USB (Universal Serial Bus) chip300containing pins, and each pin has a pin name310and a pin location320. However, no connectivity of any pin to another component is shown therein. If the USB chip shown is to be packaged in BGA (Ball Grid Array), the pin location320may be designated as a ball location. It should be understood that the initial schematic diagram220being input to the drawing-assistance system210does not limited it to a drawing; it is also feasible to have requisite information in a particular data structure, such as a data table, which is available to depict the drawing as shown inFIG. 3.FIG. 4illustrates a final schematic diagram according to an embodiment of the invention. The final schematic diagram240not only depicts the USB chip300as shown inFIG. 3, but also components400connecting to relevant pins of the USB chip300. In addition, the final schematic diagram240further shows a net symbol410, an in-page I/O symbol420, and a net name430for each pin of the USB chip300and the component400. It means that the signal flowing between the pin and a corresponding component is bi-directional I/O when the pin I/O symbol420is denoted by “<< >>”, single-directional output when it is denoted by “>>”, and single-directional input when it is denoted by “<<”. A cross-page I/O symbol440is presented at a terminal of a pin when a related component connected by the pin is not shown on the same page. It means that the signal flowing between the pin and a corresponding component on another page is bi-directional I/O when the cross-page I/O symbol440is denoted by “<<< >>>”, single-directional output when it is denoted by “>>>”, and single-directional input when it is denoted by “<<<”. It could be observed fromFIG. 4that it presents the same net name for two pins when one pin of the USB chip300connects to one pin of one component400.

FIG. 5is a schematic diagram for generating a rule database according to an embodiment of the invention. In step S520, the processing unit110reads out pin numbers and pin names from an existing library510of the storage device140, and accordingly generates a data table530including at least pin numbers and pin names. The existing library510may be an OrCAD “.olb” file. If a component will be packaged in BGA, the pin number may be designated as a ball number and the pin name may be designated as a ball name, interchangeably. In step S550, the processing unit110generates an editing interface. The editing interface displays an editable data table on the display unit120for a user, which includes pin numbers and pin names imported from the data table530. The editing interface further provides two blank fields: a recommended net name; and a group name for each transaction, which can be input by a user. In addition to the imported pin numbers and pin names, the user may further refer to printed data sheets with other information540to complete the input of the recommended net names and the group names. The user may store the input data to the rule database230via the editing interface. The exemplary results of the rule database230may refer to the following table 1.

TABLE 1Pin_NumberPin_NameRec_Net_NameGroup NameA33USB3TP2USB3_PTX_CRX_P1USB3_CTRXB34USB3TP1USB3_PTX_CRX_P0USB3_CTRXB33USB3TN2USB3_PTX_CRX_N1USB3_CTRXC33USB3TN1USB3_PTX_CRX_N0USB3_CTRXF18USB3RP2USB3_PRX_CTX_P1USB3_CTRXH20USB3RP1USB3_PRX_CTX_P0USB3_CTRXE18USB3RN2USB3_PRX_CTX_N1USB3_CTRXG20USB3RN1USB3_PRX_CTX_N0USB3_CTRXAP13USB2P7USB_PP7USB2_PNAN11USB2P6USB_PP6USB2_PNAN13USB2P5USB_PP5USB2_PNAL15USB2P4USB_PP4USB2_PNAT10USB2P3USB_PP3USB2_PNAT7USB2P1USB_PP1USB2_PNAR13USB2N7USB_PN7USB2_PNAP11USB2N6USB_PN6USB2_PNAM13USB2N5USB_PN5USB2_PNAR10USB2N3USB_PN3USB2_PNAR8USB2N2USB_PN2USB2_PNAR7USB2N1USB_PN1USB2_PNAN8USB2N0USB_PN0USB2_PN
The rule database230may be stored in a relational database server, such as the Microsoft® SQL (structure query language) server, the Sybase®SQL server, or other servers, which can be accessed by an application using the SQL.

FIG. 6is a flowchart illustrating a method for generating schematic diagrams, executed in the drawing-assistance system210, according to an embodiment of the invention. The method is performed when the processing unit110loads and executes relevant program codes. In step S610, the processing unit110may query the relational database server to obtain information regarding group names, pin names and recommended net names of buses associated with a particular component using the SQL, and then, generate a pin-editing interface including a data table for a user to assist the configuration of each pin, such as a net name, a connectivity status, a cross-page status, an I/O status, etc. In step S620, user configurations are obtained via the pin-editing interface. In step S630, a final schematic diagram is generated according to the user configurations.

Detailed technical features of step S610inFIG. 6are described as follows.FIG. 7is a flowchart illustrating a method for generating a pin-editing interface according to an embodiment of the invention. In step S710, a component to be drawn is selected. The processing unit110may obtain a component selected by a user according to a signal output from the input device130. In step S720, the rule database560is queried using the SQL to attempt to obtain recommendation information regarding pin configurations of the buses in the selected component. The recommendation information may include at least the aforementioned group names, pin names and recommended net names. Next, in step S730, it is determined whether the recommendation information associated with the selected component presents according to a reply message. If so, the process proceeds to step S740to generate a pin-editing interface according to the queried recommendation information; otherwise, the process loops back to step S710to re-select a new component. The query results may refer to the following table 2.

TABLE 2Group NamePin_NameRec_Net_NameUSB3_CTRXUSB3TP2USB3_PTX_CRX_P1USB3TP1USB3_PTX_CRX_P0USB3TN2USB3_PTX_CRX_N1USB3TN1USB3_PTX_CRX_N0USB3RP2USB3_PRX_CTX_P1USB3RP1USB3_PRX_CTX_P0USB3RN2USB3_PRX_CTX_N1USB3RN1USB3_PRX_CTX_N0USB2_PNUSB2P7USB_PP7USB2P6USB_PP6USB2P5USB_PP5USB2P4USB_PP4USB2P3USB_PP3USB2P1USB_PP1USB2N7USB_PN7USB2N6USB_PN6USB2N5USB_PN5USB2N2USB_PN2USB2N3USB_PN3USB2N1USB_PN1USB2N0USB_PN0
FIGS. 8A and 8Billustrate an exemplary pin-editing interface. In addition to the display of the queried recommendation information regarding pin configurations, the pin-editing interface800contains two duplication buttons810and820. The processing unit110directs the display unit120to duplicate data of the “pin name” column into the cells of the “confirmation” column when detecting that the duplication button810is pressed by a user. Furthermore, the processing unit110directs the display unit120to duplicate data of the “recommended net name” column into the cells of the “confirmation” column when detecting that the duplication button820is pressed by the user. Every cell of the “pin name” column and the “recommended net name” column is un-editable to prevent the user from altering data, while every cell of the “confirmation” column is editable, enabling the user to decide a resulting net name. The pin-editing interface800further contains drop-down menus830,840and850. The user may set a connectivity status associated with a pin to “Yes” or “No”; an associated cross-page status to “Yes” or “No”; and an associated I/O status to the single-directional input “In”, the single-directional output “Out” or the bi-directional I/O “Bi”. The processing unit110stores the resulting user configuration data in the memory150and/or the storage device140when detecting that the user submits data via the pin-editing interface800. Contrary to revision of net names on the graphical schematic diagram, the pin-editing interface800providing the data-table-based editing enables the user to unify the associated net names efficiently, and prevent the production machine from malfunctions caused by inconsistent naming between two pins that are supposed to be connected. The resulting user configuration data may be stored in a relational database, a text file, or others, with multiple transactions. Each transaction contains at least a group name, a confirmed net name, a connectivity status, a cross-page status, an I/O status, etc. The exemplary user configuration outcome may refer to the following table 3.

FIG. 9is a flowchart illustrating a method for drawing a schematic diagram. In step S910, the processing unit110directs the display unit120to show relevant alphanumeric characters and/or symbols for each pin of the schematic diagram according to the net names of the resulting user configuration data. The exemplary drawing outcome may refer to the net name430ofFIG. 4. In step S920, the processing unit110directs the display unit120to draw a net symbol for each pin of the schematic diagram according to the connectivity status of the resulting user configuration data. The exemplary drawing outcome may refer to the net symbol410ofFIG. 4. In step S930, the processing unit110directs the display unit120to draw an in-page I/O symbol or a cross-page I/O symbol for each pin of the schematic diagram according to the cross-page status and the I/O status of the resulting user configuration data. The exemplary drawing outcome may refer to the in-page I/O symbol420and the cross-page I/O symbol440ofFIG. 4.

Although the embodiment has been described as having specific elements inFIG. 1, it is noted that additional elements may be included to achieve better performance without departing from the spirit of the invention. While the process flows described inFIG. 6,FIG. 7andFIG. 9each include a number of operations that appear to occur in a specific order, it should be apparent that these processes can include more or fewer operations, which can be executed serially or in parallel (e.g., using parallel processors or a multi-threading environment).