Display Device, Manufacturing Method Of Display Device, And Electronic Device

A display device capable of displaying a high-quality image is provided. The display device includes a first light-emitting element, a second light-emitting element, and a gap. The first light-emitting element includes a first lower electrode, a first EL layer over the first lower electrode, and an upper electrode over the first EL layer. The second light-emitting element includes a second lower electrode, a second EL layer over the second lower electrode, and the upper electrode over the second EL layer. The first light-emitting element is adjacent to the second light-emitting element. The gap is provided between the first lower electrode and first EL layer and the second lower electrode and second EL layer.

TECHNICAL FIELD

One embodiment of the present invention relates to a display device and a manufacturing method thereof. One embodiment of the present invention relates to an electronic device.

BACKGROUND ART

In recent years, display devices have been expected to be applied to a variety of uses. Examples of applications of large-sized display devices are television devices for home (also referred to as a TV or a television receiver), digital signage, PID (Public Information Display), and the like. In addition, a smartphone, a tablet terminal, and the like including a touch panel are being developed as portable information terminals.

Furthermore, display devices have been required to have higher resolution. For example, devices for virtual reality (VR), augmented reality (AR), substitutional reality (SR), or mixed reality (MR) are given as devices requiring high-resolution display devices and have been actively developed in recent years.

Light-emitting apparatuses including light-emitting elements (also referred to as light-emitting devices) have been developed as display devices, for example. In particular, light-emitting elements (also referred to as EL elements or EL devices) utilizing an electroluminescence (hereinafter referred to as EL) phenomenon have features such as ease of reduction in thickness and weight, high-speed response to an input signal, and driving with a direct-constant voltage source, and have been used in display devices.

Patent Document 1 discloses a display device for VR using organic EL devices (also referred to as organic EL elements).

REFERENCE

Patent Document

SUMMARY OF THE INVENTION

Problems to be Solved by the Invention

An object of one embodiment of the present invention is to provide a display device that displays a high-quality image. Another object of one embodiment of the present invention is to provide a display device with high light extraction efficiency. Another object of one embodiment of the present invention is to provide a display device with a high aperture ratio. Another object of one embodiment of the present invention is to provide a high-resolution display device. Another object of one embodiment of the present invention is to provide an inexpensive display device. Another object of one embodiment of the present invention is to provide a highly reliable display device. Another object of one embodiment of the present invention is to provide a novel display device.

An object of one embodiment of the present invention is to provide a method for manufacturing a display device that displays a high-quality image. Another object of one embodiment of the present invention is to provide a method for manufacturing a display device with high light extraction efficiency. Another object of one embodiment of the present invention is to provide a method for manufacturing a display device with a high aperture ratio. Another object of one embodiment of the present invention is to provide a method for manufacturing a high-resolution display device. Another object of one embodiment of the present invention is to provide a method for manufacturing a display device with a simplified process. Another object of one embodiment of the present invention is to provide a method for manufacturing a highly reliable display device. Another object of one embodiment of the present invention is to provide a method for manufacturing a novel display device.

Note that the description of these objects does not preclude the existence of other objects. One embodiment of the present invention does not need to achieve all these objects. Note that other objects will be apparent from the description of the specification, the drawings, the claims, and the like, and other objects can be derived from the description of the specification, the drawings, the claims, and the like.

Means for Solving the Problems

One embodiment of the present invention is a display device including a first light-emitting element, a second light-emitting element, and a gap. The first light-emitting element includes a first lower electrode, a first EL layer over the first lower electrode, and an upper electrode over the first EL layer. The second light-emitting element includes a second lower electrode, a second EL layer over the second lower electrode, and the upper electrode over the second EL layer. The first light-emitting element is adjacent to the second light-emitting element. The gap is provided between the first lower electrode and the first EL layer, and the second lower electrode and the second EL layer.

Alternatively, in the above embodiment, the upper electrode may include a region overlapping with the gap.

Alternatively, in the above embodiment, a first protective layer may be provided between the gap and the upper electrode.

Alternatively, in the above embodiment, a second protective layer may be provided over the upper electrode.

Alternatively, in the above embodiment, a first coloring layer may be provided over the second protective layer to include a region overlapping with the first EL layer. A second coloring layer may be provided over the second protective layer to include a region overlapping with the second EL layer. The first EL layer and the second EL layer may have a function of emitting light of the same color. The first coloring layer and the second coloring layer may have a function of transmitting light of the same color.

Alternatively, in the above embodiment, a third protective layer may be provided to include a region in contact with a side surface of the first lower electrode, a side surface of the first EL layer, and a side surface of the gap. The third protective layer may include a region with a refractive index higher than a refractive index of the gap.

Alternatively, in the above embodiment, the first light-emitting element and the second light-emitting element may be provided over an insulating layer. A top surface of the insulating layer may include a region in contact with a bottom surface of the gap. A thickness of the insulating layer in the region where the top surface of the insulating layer is in contact with the bottom surface of the gap may be smaller than a thickness of the insulating layer in a region overlapping with the first lower electrode and a thickness of the insulating layer in a region overlapping with the second lower electrode.

Alternatively, in the above embodiment, a region may be provided where a distance between the side surface of the first EL layer and a side surface of the second EL layer is shorter than or equal to 1 μm.

Alternatively, in the above embodiment, a region may be provided where a distance between the side surface of the first EL layer and the side surface of the second EL layer is shorter than or equal to 100 nm.

Alternatively, in the above embodiment, the gap may contain any one or more selected from nitrogen, oxygen, carbon dioxide, and a Group 18 element.

Alternatively, in the above embodiment, the Group 18 element may include one or more selected from helium, neon, argon, xenon, and krypton.

Alternatively, in the above embodiment, a first transistor and a second transistor may be included. One of a source and a drain of the first transistor may be electrically connected to the first lower electrode. One of a source and a drain of the second transistor may be electrically connected to the second lower electrode. The first transistor and the second transistor may each include silicon or a metal oxide in a channel formation region.

An electronic device including the display device of one embodiment of the present invention and a lens is also one embodiment of the present invention.

Alternatively, one embodiment of the present invention is a method for manufacturing a display device, including depositing a first layer to be a first lower electrode, a second lower electrode, and a third lower electrode and a second layer to be a first EL layer, a second EL layer, and a third EL layer in this order; forming a first opening portion extending in a first direction in the second layer and the first layer; depositing a third layer to be a first upper electrode and a second upper electrode over the second layer; and forming a first light-emitting element including the first lower electrode, the first EL layer, and the first upper electrode, a second light-emitting element including the second lower electrode, the second EL layer, and the second upper electrode, and a third light-emitting element including the third lower electrode, the third EL layer, and the first upper electrode by forming a second opening portion extending in a second direction perpendicular to the first direction in the third layer, the second layer, and the first layer.

Alternatively, in the above embodiment, after the formation of the first to third light-emitting elements, a first coloring layer including a region overlapping with the first EL layer, a second coloring layer including a region overlapping with the second EL layer, and a third coloring layer including a region overlapping with the third EL layer may be formed. The first coloring layer and the second coloring layer may have a function of transmitting light of different colors. The first coloring layer and the third coloring layer may have a function of transmitting light of the same color.

Alternatively, in the above embodiment, after the formation of the first opening portion and before the deposition of the third layer, a fourth layer may be deposited over the second layer and the first opening portion and the fourth layer over the second layer is removed to form a first protective layer in the first opening portion.

Alternatively, in the above embodiment, after the formation of the second opening portion, a second protective layer may be deposited over the first upper electrode and the second upper electrode to coat the second opening portion.

Alternatively, in the above embodiment, a region may be provided where a length of the second opening portion in the first direction is shorter than or equal to 1 μm.

Alternatively, in the above embodiment, a region may be provided where a length of the second opening portion in the first direction is shorter than or equal to 100 nm.

Effect of the Invention

According to one embodiment of the present invention, a display device that displays a high-quality image can be provided. According to one embodiment of the present invention, a display device with high light extraction efficiency can be provided. According to one embodiment of the present invention, a display device with a high aperture ratio can be provided. According to one embodiment of the present invention, a high-resolution display device can be provided. According to one embodiment of the present invention, an inexpensive display device can be provided. According to one embodiment of the present invention, a highly reliable display device can be provided. According to one embodiment of the present invention, a novel display device can be provided.

According to one embodiment of the present invention, a method for manufacturing a display device that displays a high-quality image can be provided. According to one embodiment of the present invention, a method for manufacturing a display device with high light extraction efficiency can be provided. According to one embodiment of the present invention, a method for manufacturing a display device with a high aperture ratio can be provided. According to one embodiment of the present invention, a method for manufacturing a high-resolution display device can be provided. According to one embodiment of the present invention, a method for manufacturing a display device with a simplified process can be provided. According to one embodiment of the present invention, a method for manufacturing a highly reliable display device can be provided. According to one embodiment of the present invention, a method for manufacturing a novel display device can be provided.

Note that the description of these effects does not preclude the existence of other effects. One embodiment of the present invention does not need to have all these effects. Note that other effects will be apparent from the description of the specification, the drawings, the claims, and the like, and other effects can be derived from the description of the specification, the drawings, the claims, and the like.

MODE FOR CARRYING OUT THE INVENTION

In this specification and the like, a semiconductor device refers to a device that utilizes semiconductor characteristics, and means a circuit including a semiconductor element (a transistor, a diode, a photodiode, or the like), a device including the circuit, and the like. In addition, the semiconductor device also means all devices that can function by utilizing semiconductor characteristics. For example, an integrated circuit, a chip including an integrated circuit, and an electronic component including a chip in a package are examples of the semiconductor device. Moreover, a memory device, a display device, a light-emitting apparatus, a lighting device, an electronic device, and the like themselves might be semiconductor devices, or might include semiconductor devices.

In the case where there is description “X and Y are connected” in this specification and the like, the case where X and Y are electrically connected, the case where X and Y are functionally connected, and the case where X and Y are directly connected are regarded as being disclosed in this specification and the like. Accordingly, without being limited to a predetermined connection relation, for example, a connection relation shown in drawings or text, a connection relation other than that shown in the drawings or the text is regarded as being disclosed in the drawings or the text. Each of X and Y denotes an object (e.g., a device, an element, a circuit, a wiring, an electrode, a terminal, a conductive film, or a layer).

For example, in the case where X and Y are electrically connected, one or more elements that allow electrical connection between X and Y (e.g., a switch, a transistor, a capacitor, an inductor, a resistor, a diode, a display element, a light-emitting element, or a load) can be connected between X and Y. Note that a switch has a function of being controlled to be in an on state or an off state. That is, a switch has a function of being in a conduction state (on state) or a non-conduction state (off state) to control whether or not current flows.

For example, in the case where X and Y are functionally connected, one or more circuits that allow functional connection between X and Y (e.g., a logic circuit (an inverter, a NAND circuit, a NOR circuit, or the like); a signal converter circuit (a digital-analog converter circuit, an analog-digital converter circuit, a gamma correction circuit, or the like); a potential level converter circuit (a power supply circuit (a step-up circuit, a step-down circuit, or the like), a level shifter circuit for changing the potential level of a signal, or the like); a voltage source; a current source; a switching circuit; an amplifier circuit (a circuit that can increase signal amplitude, the amount of current, or the like, an operational amplifier, a differential amplifier circuit, a source follower circuit, a buffer circuit, or the like); a signal generation circuit; a memory circuit; a control circuit; or the like) can be connected between X and Y. Note that for example, even when another circuit is sandwiched between X and Y, X and Y are functionally connected when a signal output from X is transmitted to Y.

Note that an explicit description that X and Y are electrically connected includes the case where X and Y are electrically connected (i.e., the case where X and Y are connected with another element or another circuit sandwiched therebetween) and the case where X and Y are directly connected (i.e., the case where X and Y are connected without another element or another circuit sandwiched therebetween).

Note that even when a circuit diagram shows that independent components are electrically connected to each other, one component has functions of a plurality of components in some cases. For example, when part of a wiring also functions as an electrode, one conductive film has functions of both components: a function of the wiring and a function of the electrode. Thus, electrical connection in this specification and the like also includes such a case where one conductive film has functions of a plurality of components, in its category.

In this specification and the like, “node” can be referred to as a terminal, a wiring, an electrode, a conductive layer, a conductor, an impurity region, or the like depending on a circuit structure, a device structure, or the like. Furthermore, a terminal, a wiring, or the like can be referred to as “node”.

In this specification and the like, “voltage” and “potential” can be replaced with each other as appropriate. “Voltage” refers to a potential difference from a reference potential, and when the reference potential is a ground potential, for example, “voltage” can be replaced with “potential”. Note that the ground potential does not necessarily mean 0 V. Moreover, potentials are relative values, and a potential supplied to a wiring, a potential applied to a circuit and the like, and a potential output from a circuit and the like, for example, change with a change of the reference potential.

In addition, ordinal numbers such as “first”, “second”, and “third” in this specification and the like are used to avoid confusion among components. Thus, the ordinal numbers do not limit the number of components. Furthermore, the ordinal numbers do not limit the order of components. For example, a “first” component in one embodiment in this specification and the like can be referred to as a “second” component in other embodiments, the scope of claims, or the like. For another example, a “first” component in one embodiment in this specification and the like can be omitted in other embodiments, the scope of claims, or the like.

In this specification and the like, terms for describing positioning, such as “over”, “under”, “above”, and “below”, are sometimes used for convenience to describe the positional relation between components with reference to drawings. Furthermore, the positional relation between components is changed as appropriate in accordance with a direction in which each component is described. Thus, the positional relation is not limited to the terms described in this specification and the like, and can be described with another term as appropriate depending on the situation. For example, the expression “an insulator positioned over (on) a top surface of a conductor” can be replaced with the expression “an insulator positioned under (on) a bottom surface of a conductor” when the direction of a drawing showing these components is rotated by 180°.

In this specification and the like, the term such as “electrode”, “wiring”, or “terminal” does not limit the function of a component. For example, an “electrode” is used as part of a “wiring” in some cases, and vice versa. Furthermore, the term “electrode” or “wiring” also includes the case where a plurality of “electrodes” or “wirings” are formed in an integrated manner, for example. For example, a “terminal” is used as part of a “wiring” or an “electrode” in some cases, and vice versa. Furthermore, the term “terminal” also includes the case where a plurality of “electrodes”, “wirings”, “terminals”, or the like are formed in an integrated manner, for example. Therefore, for example, an “electrode” can be part of a “wiring” or a “terminal”, and a “terminal” can be part of a “wiring” or an “electrode”. Moreover, the terms such as “electrode”, “wiring”, and “terminal” are each sometimes replaced with the term such as “region” depending on the case.

In this specification and the like, “parallel” indicates a state where two straight lines are placed at an angle greater than or equal to −10° and less than or equal to 10°. Accordingly, the case where the angle is greater than or equal to −5° and less than or equal to 5° is also included. In addition, “approximately parallel” or “substantially parallel” indicates a state where two straight lines are placed at an angle greater than or equal to −30° and less than or equal to 30°. In addition, “perpendicular” indicates a state where two straight lines are placed at an angle greater than or equal to 80° and less than or equal to 100°. Accordingly, the case where the angle is greater than or equal to 85° and less than or equal to 95° is also included. Furthermore, “approximately perpendicular” or “substantially perpendicular” indicates a state where two straight lines are placed at an angle greater than or equal to 60° and less than or equal to 120°.

In this specification and the like, a metal oxide is an oxide of metal in a broad sense. Metal oxides are classified into an oxide insulator, an oxide conductor (including a transparent oxide conductor), an oxide semiconductor (also simply referred to as an OS), and the like. For example, in the case where a metal oxide is used in a semiconductor layer of a transistor, the metal oxide is referred to as an oxide semiconductor in some cases. That is, when a metal oxide can form a channel formation region of a transistor that has at least one of an amplifying function, a rectifying function, and a switching function, the metal oxide can be referred to as a metal oxide semiconductor. In the case where an “OS transistor” is mentioned, the “OS transistor” can also be referred to as a transistor including a metal oxide or an oxide semiconductor.

In this specification and the like, a metal oxide containing nitrogen is also collectively referred to as a metal oxide in some cases. Furthermore, a metal oxide containing nitrogen may be referred to as a metal oxynitride.

In this specification and the like, one embodiment of the present invention can be constituted by combining, as appropriate, a structure described in each embodiment with any of the structures described in the other embodiments. Furthermore, in the case where a plurality of structure examples are described in one embodiment, the structure examples can be combined with each other as appropriate.

Embodiments described in this specification are described with reference to the drawings. Note that the embodiments can be implemented in many different modes, and it will be readily understood by those skilled in the art that the modes and details can be changed in various ways without departing from the spirit and scope thereof. Therefore, the present invention should not be construed as being limited to the description in the embodiments. Note that in the structures of the invention in the embodiments, the same reference numerals are used in common for the same portions or portions having similar functions in different drawings, and repeated description thereof is omitted in some cases. Moreover, some components are omitted in a perspective view, a top view, and the like for easy understanding of the drawings in some cases.

In the drawings in this specification, the size, the layer thickness, or the region is exaggerated for clarity in some cases. Therefore, embodiments of the present invention are not limited to the size, aspect ratio, and the like shown in the drawings. Note that the drawings schematically show ideal examples, and embodiments of the present invention are not limited to shapes, values, and the like shown in the drawings. For example, variation in signal, voltage, or current due to noise or variation in signal, voltage, or current due to difference in timing can be included.

In this embodiment, a display device of one embodiment of the present invention and a manufacturing method thereof will be described with reference to drawings.

One embodiment of the present invention relates to a display device in which pixels each including a light-emitting element such as an organic EL element are arranged in a matrix. In the display device of one embodiment of the present invention, the light-emitting elements provided in the adjacent pixels are isolated from each other by a gap containing a gas such as air. Light emitted from the light-emitting element in an oblique direction can be totally reflected by the gap. This can inhibit entry of light emitted from the light-emitting element into an adjacent pixel.

Structure Example_1 of Display Device

FIG.1Ais a cross-sectional view illustrating a structure example of a display device10.FIG.1Bis a cross-sectional view in the x direction illustrating the structure example of the display device10.FIG.1Cis a cross-sectional view in the y direction illustrating the structure example of the display device10. Note that the scale of the cross-sectional view in the x direction illustrated inFIG.1Bis different from the scale of the cross-sectional view in the y direction illustrated inFIG.1C. Also in the other drawings, the scale of a cross-sectional view in the x direction may be different from the scale of a cross-sectional view in the y direction.

In this specification and the like, the height direction of the display device10is the z direction and the directions perpendicular to the z direction are the x direction and the y direction. The x direction is perpendicular to the y direction. Furthermore, the xy plane, the yz plane, and the zx plane are perpendicular to each other.

The display device10includes an insulating layer61; light-emitting elements20, a protective layer31, and protective layers32over the insulating layer61; a protective layer33over the protective layer31; a microlens array35over the protective layer33; an adhesive layer41over the microlens array35; a coloring layer49R, a coloring layer49G, a coloring layer49B, and light-blocking layers43over the adhesive layer41; an insulating layer45over the coloring layer49R, the coloring layer49G, the coloring layer49B, and the light-blocking layers43; and a substrate47over the insulating layer45. The microlens array35is bonded to the coloring layer49R, the coloring layer49G, the coloring layer49B, and the light-blocking layers43with the adhesive layer41. Note that for clarity of the drawing, components other than the light-emitting element20are omitted inFIG.1A.

In the case where the expression “B over A” or “B under A” is used in this specification and the like, for example, A and B do not always need to include a region where they are in contact with each other.

In this specification and the like, the term “element” can be replaced with the term “device” in some cases. For example, a light-emitting element can be referred to as a light-emitting device.

In this specification and the like, in the case where matters that apply to all of the coloring layer49R, the coloring layer49G, and the coloring layer49B are described or they do not need to be differentiated from each other, for example, the “coloring layer49” is merely stated in some cases. The same applies to other components.

The light-emitting element20includes a lower electrode21over the insulating layer61, an EL layer23over the lower electrode21, and an upper electrode25over the EL layer23and the protective layers32. The EL layer23includes at least a light-emitting layer. The EL layer23can include a hole-injection layer, a hole-transport layer, an electron-transport layer, and an electron-injection layer.

The light-emitting element20can be a top-emission light-emitting element. In the case where the light-emitting element20is a top emission light-emitting element, the lower electrode21has a function of reflecting visible light and the upper electrode25has a function of transmitting visible light. The lower electrode21has a function of a pixel electrode of the display device10.

The display device10includes a pixel50R, a pixel50G, and a pixel50B. The pixel50R is provided with the coloring layer49R, the pixel50G is provided with the coloring layer49G, and the pixel50B is provided with the coloring layer49B. The coloring layer49is provided to include a region overlapping with the EL layer23.

The EL layer23included in the pixel50R, the EL layer23included in the pixel50G, and the EL layer23included in the pixel50B can emit light of the same color. For example, these EL layers23can emit white light. In that case, the light-emitting element20can have a single structure or a tandem structure, for example. Details of the single structure and the tandem structure are described later.

The coloring layer49can change the hue of light passing therethrough. For example, the hue of light passing through the coloring layer49R can be red, the hue of light passing through the coloring layer49G can be green, and the hue of light passing through the coloring layer49B can be blue. Note that the coloring layer49may change the hue of light passing therethrough into a hue of cyan, magenta, yellow, or the like.

Provision of, for example, the coloring layer49R, the coloring layer49G, and the coloring layer49B for the display device10enables full color display. The display device10may include a pixel50not provided with the coloring layer49, for example.

FIG.1AtoFIG.1Cillustrate a structure in which the pixel50R, the pixel50G, and the pixel50B are arranged in this order in the x direction and the pixels50that emit light of the same color are arranged in the y direction.

Examples of a material that can be used for the coloring layer49include a metal material, a resin material, and a resin material containing a pigment or a dye.

The light-blocking layer43is provided at a boundary portion between the adjacent pixels50. With this structure, mixture of light of different colors can be inhibited, so that the display device10can display a high-quality image. Although this embodiment exemplifies the structure in which the light-blocking layer43is provided, one embodiment of the present invention is not limited thereto, and the light-blocking layer43is not necessarily provided. For example, the coloring layers49provided in the adjacent pixels50are made to partly overlap with each other, whereby the light-blocking layer43can be omitted from the display device10.

In this specification and the like, for example, components “A” provided in adjacent pixels are simply referred to as adjacent components “A” in some cases. For example, the light-emitting elements20provided in the adjacent pixels50are referred to as the adjacent light-emitting elements20in some cases.

Note that the EL layer23included in the pixel50R, the EL layer23included in the pixel50G, and the EL layer23included in the pixel50B may have a function of emitting light of different colors. For example, the EL layer23included in the pixel50R may have a function of emitting red light, the EL layer23included in the pixel50G may have a function of emitting green light, and the EL layer23included in the pixel50B may have a function of emitting blue light. In that case, the coloring layer49can be omitted.

In the case of employing a structure in which the EL layer23included in the pixel50R, the EL layer23included in the pixel50G, and the EL layer23included in the pixel50B emit light of different colors, the light-emitting element20is said to have an SBS (Side By Side) structure. By employing the SBS structure for the light-emitting element20, the power consumption of the display device10can be reduced.

The upper electrodes25can be different electrodes between the light-emitting elements20arranged in the x direction. Meanwhile, the upper electrode25can be a common electrode between the light-emitting elements20arranged in the y direction. That is, for example, the upper electrode25can be common to the pixels50that emit light of the same color.

The protective layer31includes a region in contact with the top surface of the insulating layer61, the side surface of the lower electrode21, the side surface of the EL layer23, the side surface of the upper electrode25, and the top surface of the upper electrode25. Specifically, the protective layer31includes a region in contact with the xy plane of the insulating layer61, the yz plane of the lower electrode21, the yz plane of the EL layer23, the yz plane of the upper electrode25, and the xy plane of the upper electrode25. The protective layer32includes a region in contact with the side surface of the lower electrode21and the side surface of the EL layer23. Specifically, the protective layer32includes a region in contact with the zx plane of the lower electrode21and the zx plane of the EL layer23.

The protective layer31and the protective layer32can each be an insulating layer; for example, a metal oxide film or a metal nitride film can be used. The metal oxide film can be a layer containing aluminum oxide or hafnium oxide, for example. The metal nitride film can be a layer containing aluminum nitride or hafnium nitride.

Each of the protective layer31and the protective layer32is a layer in which impurities such as water and oxygen do not easily diffuse. Alternatively, each of the protective layer31and the protective layer32is a layer capable of capturing (also referred to as gettering) impurities such as water and oxygen. This can inhibit impurities from entering the light-emitting element20, specifically, the EL layer23, for example. Thus, the reliability of the display device10can be increased.

The protective layer33is formed over the protective layer31. The protective layer33can be an insulating layer; for example, an oxide, a nitride, or an oxynitride can be used. The oxide can be a layer containing silicon oxide, aluminum oxide, or hafnium oxide. The nitride can be a layer containing silicon nitride or aluminum nitride. The oxynitride can be a layer containing silicon oxynitride, silicon nitride oxide, aluminum oxynitride, or aluminum nitride oxide.

Note that in this specification, silicon oxynitride refers to a material that contains oxygen at a higher proportion than nitrogen, and silicon nitride oxide refers to a material that contains nitrogen at a higher proportion than oxygen. Furthermore, in this specification, aluminum oxynitride refers to a material that contains oxygen at a higher proportion than nitrogen, and aluminum nitride oxide refers to a material that contains nitrogen at a higher proportion than oxygen.

The protective layer33can be a semiconductor layer, for example, a layer containing a metal oxide containing In, Ga, and Zn (also referred to as IGZO). Alternatively, the protective layer33can be a conductive layer and can contain, for example, a light-transmitting conductive material. Although the details will be described later, as a light-transmitting conductive material, for example, a conductive oxide such as indium oxide, indium tin oxide, indium zinc oxide, zinc oxide, or zinc oxide to which gallium is added, or graphene can be used. Alternatively, as a light-transmitting conductive material, an oxide conductor can be used.

The protective layer33may have a stacked-layer structure of two or more layers. For example, a stacked-layer structure of an insulating layer and either a semiconductor layer or a conductive layer may be employed. For example, a stacked-layer structure of a layer containing silicon nitride and a layer containing a metal oxide may be employed. Specifically, for example, the protective layer33may have a stacked-layer structure of two layers in which a lower layer is a layer containing silicon nitride and an upper layer is a layer containing a metal oxide. The protective layer33is preferably a layer in which impurities such as water and oxygen do not easily diffuse or a layer capable of capturing (also referred to as gettering) impurities such as water and oxygen. This can inhibit impurities from entering the EL layer23. Thus, the reliability of the display device10can be increased.

Here, as shown in a cross section in the x direction illustrated inFIG.1B, the adjacent lower electrodes21, the adjacent EL layers23, and the adjacent upper electrodes25are isolated from each other by a gap30. Meanwhile, as shown in a cross section in the y direction illustrated inFIG.1C, the adjacent lower electrodes21and the adjacent EL layers23are isolated from each other by the gap30. As shown in the cross section in the y direction illustrated inFIG.1C, a protective layer36is provided over the gap30and the upper electrode25is provided over the EL layer23and the protective layer36. Note that the side surface of the protective layer32can be in contact with the side surface of the protective layer36.

The protective layer36can include a material similar to that of the protective layer33. That is, the protective layer36can include an oxide, a nitride, or an oxynitride.

Provision of the protective layer36in the display device10can inhibit the entry of the upper electrode25into an opening portion isolating the adjacent light-emitting elements20from each other, for example. Thus, it can be said that the light-emitting element20is protected by the protective layer36.

Here, the protective layer33and the protective layer36are preferably deposited by a method providing a film with low coverage; for example, the protective layer33and the protective layer36are preferably deposited by a method providing a film with lower coverage than that of a film deposited by an atomic layer deposition (ALD) method. For example, the protective layer33and the protective layer36are deposited by a sputtering method or a chemical vapor deposition (CVD) method. Accordingly, an opening portion isolating the adjacent light-emitting elements20from each other is not coated with the protective layer33and the protective layer36, so that the gap30is formed.

The shorter the distance between the EL layers23is, the more easily the gap30is formed. For example, the gap30can be suitably formed when the distance is shorter than or equal to 1 μm, preferably shorter than or equal to 500 nm, further preferably shorter than or equal to 200 nm, shorter than or equal to 100 nm, shorter than or equal to 90 nm, shorter than or equal to 70 nm, shorter than or equal to 50 nm, shorter than or equal to 30 nm, shorter than or equal to 20 nm, shorter than or equal to 15 nm, or 10 nm. Note that in the case where the distance between the EL layers23is sufficiently short and, for example, the upper electrode25does not enter the opening portion isolating the adjacent light-emitting elements20from each other even without the protective layer36, the protective layer36is not necessarily provided.

The gap30contains, for example, any one or more selected from air, nitrogen, oxygen, carbon dioxide, and a Group 18 element. Furthermore, for example, a gas used during the formation of the protective layer36or the protective layer33is sometimes contained in the gap30. For example, in the case where the protective layer36or the protective layer33is deposited by a sputtering method, the gap30may contain a Group 18 element (typically, helium, neon, argon, xenon, krypton, or the like). In the case where a gas is contained in the gap30, a gas can be identified with, for example, a gas chromatography method. Alternatively, in the case where the protective layer36or the protective layer33is deposited by a sputtering method, a gas used in the sputtering is sometimes contained in the protective layer36or the protective layer33. In this case, an element such as argon is sometimes detected when the protective layer36or the protective layer33is analyzed by energy dispersive X-ray analysis (EDX analysis) or the like.

In the case where the refractive index of the gap30is lower than the refractive index of the protective layer31and the refractive index of the protective layer32, light51emitted from the EL layer23and incident on the interface between the EL layer23and the gap30is totally reflected. This can inhibit entry of the light51into the adjacent pixel50. Specifically, the light51emitted from the EL layer23provided in the pixel50G can be inhibited from entering the pixel50R or the pixel50B, for example. With this structure, mixture of light of different colors can be inhibited, so that the display device10can display a high-quality image.

Here, a structure can be employed in which the gap30reaches the inside of the insulating layer61. In this structure, the thickness of the insulating layer61in a region overlapping with the gap30is smaller than the thickness of the insulating layer61in a region overlapping with the EL layer23. Moreover, the thickness of the insulating layer61in the region overlapping with the gap30can be smaller than the thickness of the insulating layer61in a region overlapping with the lower electrode21. In the case where the gap30reaches the inside of the insulating layer61, the protective layer31and the protective layer32can each include a region in contact with the side surface of the insulating layer61.

When the refractive index of the adhesive layer41is lower than the refractive index of a microlens included in the microlens array35, the microlens can condense light emitted from the EL layers23. This can inhibit mixture of colors of light emitted from the EL layers23and inhibit entry of the light into the light-blocking layer43. Therefore, the display device10can display a high-quality image and have high light extraction efficiency. Accordingly, a user of the display device10can look at bright images particularly when the user sees a display surface of the display device10from the front of the display surface.

Materials that can be used for, for example, the components illustrated inFIG.1AtoFIG.1Care described below.

For each of the insulating layers, a single layer or a stacked layer using a material selected from aluminum nitride, aluminum oxide, aluminum nitride oxide, aluminum oxynitride, magnesium oxide, silicon nitride, silicon oxide, silicon nitride oxide, silicon oxynitride, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, tantalum oxide, aluminum silicate, and the like is used. A material in which a plurality of materials selected from an oxide material, a nitride material, an oxynitride material, and a nitride oxide material are mixed may be used.

In this specification and the like, a nitride oxide refers to a compound that contains more nitrogen than oxygen. An oxynitride refers to a compound that contains more oxygen than nitrogen. The content of each element can be measured by Rutherford backscattering spectrometry (RBS), for example.

For example, a surface of the insulating layer may be subjected to CMP treatment. By the CMP treatment, unevenness of a sample surface can be reduced, and coverage with an insulating layer and a conductive layer to be formed later can be increased.

As a conductive material that can be used for the gate, the source, and the drain of the transistor and conductive layers such as various wirings, plugs, and electrodes included in the display device, a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium (Hf), vanadium (V), niobium (Nb), manganese, magnesium, zirconium, beryllium, and the like; an alloy containing the above metal element as a component; an alloy containing the above metal elements in combination; or the like can be used. Alternatively, a semiconductor typified by polycrystalline silicon containing an impurity element such as phosphorus, or silicide such as nickel silicide may be used. There is no particular limitation on the formation method of the conductive material, and a variety of formation methods such as an evaporation method, a CVD method, a sputtering method, and a spin coating method can be employed.

As the conductive material that can be used for the conductive layer, a conductive material containing oxygen, such as indium tin oxide (ITO), indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide to which silicon oxide is added, can be used. Moreover, a conductive material containing nitrogen, such as titanium nitride, tantalum nitride, or tungsten nitride, can be used. In addition, a stacked-layer structure in which a conductive material containing oxygen, a conductive material containing nitrogen, and a material containing the above-described metal element are combined as appropriate can be used.

The conductive material that can be used for the conductive layer may have a single-layer structure or a stacked-layer structure of two or more layers. For example, the conductive layer may have a single layer structure of an aluminum layer containing silicon, a two-layer structure in which a titanium layer is stacked over an aluminum layer, a two-layer structure in which a titanium layer is stacked over a titanium nitride layer, a two-layer structure in which a tungsten layer is stacked over a titanium nitride layer, a two-layer structure in which a tungsten layer is stacked over a tantalum nitride layer, or a three-layer structure including a titanium layer, an aluminum layer stacked over the titanium layer, and a titanium layer formed thereover. Alternatively, an aluminum alloy containing one or more elements selected from titanium, tantalum, tungsten, molybdenum, chromium, neodymium, and scandium may be used as the conductive material.

In the case where the light-emitting element20is a top-emission light-emitting element, the lower electrode21is preferably formed using a conductive material that efficiently reflects light emitted from the EL layer23. Note that the structure of the lower electrode21may be a stacked-layer structure of a plurality of layers without limitation to a single layer. For example, in the case where the lower electrode21is used as an anode, a layer in contact with the EL layer23may be a light-transmitting layer, such as indium tin oxide, and a layer having high reflectance (e.g., aluminum, an alloy containing aluminum, or silver) may be provided in contact with the layer. When the upper electrode25is formed using a light-transmitting conductive material, light emitted from the EL layer23can be efficiently extracted to outside of the display device10.

As the visible-light-reflecting conductive material, a metal material such as aluminum, gold, platinum, silver, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, or palladium or an alloy containing any of these metal materials can be used, for example. Lanthanum, neodymium, germanium, or the like may be added to the metal material and/or the alloy. Alternatively, an alloy containing aluminum (an aluminum alloy) such as an alloy of aluminum and titanium, an alloy of aluminum and nickel, or an alloy of aluminum and neodymium or an alloy containing silver such as an alloy of silver and copper, an alloy of silver, palladium, and copper, or an alloy of silver and magnesium may be used for formation. An alloy containing silver and copper is preferable because of its high heat resistance. Furthermore, a metal film or an alloy film may be stacked with a metal oxide film. When a metal film or a metal oxide film is stacked so as to be in contact with an aluminum alloy film, for example, oxidation of the aluminum alloy film can be inhibited. Other examples of the metal film and the metal oxide film are titanium and titanium oxide. Alternatively, a light-transmitting conductive film and a film containing a metal material may be stacked as described above. For example, a stacked-layer film of silver and indium tin oxide or a stacked-layer film of an alloy of silver and magnesium and indium tin oxide can be used.

As a light-transmitting conductive material, a conductive oxide such as indium oxide, indium tin oxide, indium zinc oxide, zinc oxide, or zinc oxide to which gallium is added, or graphene can be used. Alternatively, as a light-transmitting conductive material, an oxide conductor can be used. Alternatively, a metal material such as gold, silver, platinum, magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, or titanium, or an alloy material containing the metal material can be used. Further alternatively, a nitride of the metal material (e.g., titanium nitride) or the like may be used. Note that in the case of using the metal material or the alloy material (or the nitride thereof), the thickness is set small enough to be able to transmit light. A stacked-layer film of any of the above materials can be used as a conductive layer. For example, a stacked-layer film of indium tin oxide and an alloy of silver and magnesium is preferably used because it can increase the conductivity. These can also be used for conductive layers such as a variety of wirings or electrodes included in a display device, and conductive layers (conductive layers functioning as a lower electrode or an upper electrode) included in a light-emitting element.

Here, an oxide conductor, which is one kind of metal oxide, will be described. In this specification and the like, an oxide conductor may be referred to as OC (Oxide Conductor). For example, the oxide conductor is obtained in the following manner: oxygen vacancy is formed in a metal oxide that is an oxide containing at least indium or zinc (typically, IGZO), and then hydrogen is added to the oxygen vacancy, so that a donor level is formed in the vicinity of the conduction band. As a result, the conductivity of the metal oxide is increased, so that the metal oxide becomes a conductor. The metal oxide having become a conductor can be referred to as an oxide conductor. Metal oxides having a function of a semiconductor (oxide semiconductors) generally have a visible-light-transmitting property because of their large energy gap. Meanwhile, an oxide conductor is a metal oxide having a donor level in the vicinity of the conduction band. Therefore, the influence of absorption due to the donor level is small in the oxide conductor, and the oxide conductor has a visible-light-transmitting property comparable to that of an oxide semiconductor.

As described above, the EL layer23includes at least a light-emitting layer. In addition to the light-emitting layer, the EL layer23may further include a layer containing a substance having a high hole-injection property, a substance having a high hole-transport property, a hole-blocking material, a substance having a high electron-transport property, a substance having a high electron-injection property, a substance with a bipolar property (a substance having a high electron-transport property and a high hole-transport property), or the like.

Either a low molecular compound or a high molecular compound can be used for the EL layer23, and an inorganic compound may also be included. Each of the layers included in the EL layer23can be formed by an evaporation method (including a vacuum evaporation method), a transfer method, a printing method, a coating method, or the like.

The EL layer23may contain an inorganic compound such as quantum dots. For example, when used for the light-emitting layer, the quantum dots can function as a light-emitting material.

In the case where the EL layer23includes an electron-injection layer, the electron-injection layer includes a material having a high electron-injection property (an electron-injection material). As the electron-injection material, an alkali metal, an alkaline earth metal, or a compound thereof, such as lithium, cesium, lithium fluoride (LiF), cesium fluoride (CsF), calcium fluoride (CaF2), 8-(quinolinolato)lithium (abbreviation: Liq), 2-(2-pyridyl)phenolatolithium (abbreviation: LiPP), 2-(2-pyridyl)-3-pyridinolatolithium (abbreviation: LiPPy), 4-phenyl-2-(2-pyridyl)phenolatolithium (abbreviation: LiPPP), lithium oxide (LiOx), or cesium carbonate can be used.

As the adhesive layer41, a variety of curable adhesives, e.g., a photocurable adhesive such as an ultra-violet curable adhesive, a reactive curable adhesive, a thermosetting adhesive, and an anaerobic adhesive can be used. Examples of these adhesives include an epoxy resin, an acrylic resin, a silicone resin, a phenol resin, a polyimide resin, an imide resin, a PVC (polyvinyl chloride) resin, a PVB (polyvinyl butyral) resin, and an EVA (ethylene vinyl acetate) resin. In particular, a material with low moisture permeability, such as an epoxy resin, is preferred. Alternatively, a two-component resin may be used. An adhesive sheet may be used, for example.

Examples of a material that can be used for the light-blocking layer include carbon black, titanium black, a metal, a metal oxide, and a composite oxide containing a solid solution of a plurality of metal oxides. The light-blocking layer may be a film containing a resin material or a thin film of an inorganic material such as a metal. Stacked films containing the material of the coloring layer can also be used for the light-blocking layer. For example, a stacked-layer structure of a film containing a material used for a coloring layer that transmits light of a certain color and a film containing a material used for a coloring layer that transmits light of another color can be used. Material sharing between the coloring layer and the light-blocking layer is preferable because process simplification as well as equipment sharing can be achieved.

Manufacturing Method Example_1 of Display Device

An example of a method for manufacturing the display device10illustrated inFIG.1will be described below with reference to drawings.

Note that insulating layers, semiconductor layers, conductive layers for forming electrodes and wirings, and the like included in the display device can be formed by a sputtering method, a CVD method, a vacuum evaporation method, a pulsed laser deposition (PLD) method, an ALD method, a plasma ALD (PEALD: Plasma Enhanced ALD) method, and the like. As the CVD method, a plasma-enhanced chemical vapor deposition (PECVD) method or a thermal CVD method may be employed. As the thermal CVD method, for example, a metal organic chemical vapor deposition (MOCVD: Metal Organic CVD) method may be employed.

Alternatively, the insulating layers, the semiconductor layers, the conductive layers for forming the electrodes and the wirings, and the like included in the display device may be formed by a method such as spin coating, dipping, spray coating, ink-jetting, dispensing, screen printing, offset printing, slit coating, roll coating, curtain coating, and knife coating.

A PECVD method can provide a high-quality film at a relatively low temperature. With use of a deposition method that does not use plasma at the time of deposition, such as an MOCVD method, an ALD method, or a thermal CVD method, damage is not easily caused on a surface where the film is formed. For example, a wiring, an electrode, an element (a transistor, a capacitor, and the like), and the like included in a semiconductor device might be charged up by receiving electric charge from plasma. In that case, accumulated electric charge might break the wiring, the electrode, the element, or the like included in the semiconductor device. By contrast, in the case of a deposition method not using plasma, such plasma damage is not caused; thus, the yield of semiconductor devices can be increased. Moreover, since plasma damage during deposition is not caused, a film with few defects can be obtained.

When the oxide semiconductor is formed by a sputtering method, a chamber of a sputtering apparatus is preferably evacuated to a high vacuum (to the degree of approximately 5×10−7Pa to 1×10−4Pa) with an adsorption vacuum pump such as a cryopump so that, for example, water acting as an impurity for the oxide semiconductor is removed as much as possible. In particular, the partial pressure of gas molecules corresponding to H2O (gas molecules corresponding to m/z=18) in the chamber in the standby mode of the sputtering apparatus is preferably lower than or equal to 1×10−4Pa, further preferably lower than or equal to 5×10−5Pa. The deposition temperature is preferably higher than or equal to room temperature and lower than or equal to 500° C., further preferably higher than or equal to room temperature and lower than or equal to 300° C., still further preferably higher than or equal to room temperature and lower than or equal to 200° C.

In addition, increasing the purity of a sputtering gas is necessary. For example, as an oxygen gas or an argon gas used for a sputtering gas, a gas which is highly purified to have a dew point of −40° C. or lower, preferably −80° C. or lower, further preferably −100° C. or lower, still further preferably −120° C. or lower is used, whereby entry of moisture or the like into the oxide semiconductor film can be minimized as much as possible.

In the case where the insulating layers, the conductive layers, the semiconductor layers, or the like are formed by a sputtering method using a sputtering gas containing oxygen, oxygen can be supplied to a layer over which these layers are formed. As the amount of oxygen contained in the sputtering gas increases, the amount of oxygen supplied to the layer over which these layers are formed tends to increase.

When the layers (thin films) included in the display device are processed, for example, a photolithography method can be employed for the processing. Alternatively, island-shaped layers may be formed by a deposition method using a blocking mask. Alternatively, the layers may be processed by a nanoimprinting method, a sandblasting method, a lift-off method, or the like. As a photolithography method, a method in which a resist mask is formed over a layer (thin film) to be processed, part of the layer (thin film) is selected and removed by using the resist mask as a mask, and the resist mask is removed, and a method in which a photosensitive layer is deposited, and then the layer is exposed to light and developed to be processed into a desired shape are given.

In the case of using light in the photolithography method, for example, an i-line (a wavelength of 365 nm), a g-line (a wavelength of 436 nm), and an h-line (a wavelength of 405 nm), or combined light of any of them can be used for light exposure. Besides, ultra-violet light, KrF laser light, ArF laser light, or the like can be used. Exposure may be performed by liquid immersion exposure technique. As the light used for the exposure, extreme ultra-violet light (EUV) or X-rays may be used. Furthermore, instead of the light used for the exposure, an electron beam can also be used. It is preferable to use extreme ultra-violet light, X-rays, or an electron beam because extremely minute processing can be performed. Note that when light exposure is performed by scanning of a beam such as an electron beam, a photomask is unnecessary.

For removal (etching) of the layers (thin films), a dry etching method, a wet etching method, or the like can be employed. Alternatively, the etching methods may be employed in combination.

In order to manufacture the display device10illustrated inFIG.1AtoFIG.1C, first, a layer21A to be the lower electrode21and a layer23A to be the EL layer23are deposited in this order over the insulating layer61(FIG.2AtoFIG.2C). The layer21A and the layer23A can be deposited by, for example, an evaporation method or a sputtering method. Without limitation to this, any of the above-described deposition methods can be employed as appropriate. In this specification and the like, the term “layer” and the term “film” can be interchanged with each other as appropriate. For example, “layer” of the layer21A and the layer23A can be replaced with “film”.

Then, the layer21A and the layer23A are processed by, for example, an etching method. Specifically, for example, a resist mask is formed over the layer23A, and then the layer23A and the layer21A are processed by, for example, an etching method, whereby an opening portion150A extending in the x direction is formed. By processing the layer23A, the belt-like layer23B extending in the x direction is formed, and by processing the layer21A, the belt-like layer21B extending in the x direction is formed (FIG.3AtoFIG.3C).

The smaller the width of the opening portion150A (the length of the opening portion150A in the y direction) is, the more easily the gap30is formed in a later step. For example, the width of the opening portion150A can be smaller than or equal to 1 μm, preferably smaller than or equal to 500 nm, further preferably smaller than or equal to 200 nm, smaller than or equal to 100 nm, smaller than or equal to 90 nm, smaller than or equal to 70 nm, smaller than or equal to 50 nm, smaller than or equal to 30 nm, smaller than or equal to 20 nm, smaller than or equal to 15 nm, or 10 nm.

Note that as illustrated inFIG.3C, the insulating layer61may also be etched during the above etching. Thus, the thickness of the insulating layer61in a region overlapping with the opening portion150A may be smaller than the thickness of the insulating layer61in a region overlapping with the layer21B.

Then, a layer32A to be the protective layer32is deposited (FIG.4A1and FIG.4A2). The layer32A is preferably deposited by a deposition method providing a film with high coverage, such as an ALD method. As a result, the layer32A is formed to coat the opening portion150A. That is, the layer32A is formed to include a region in contact with the side surface of the layer23B, the side surface of the layer21B, and the top surface of the insulating layer61in the opening portion150A.

Next, the layer32A is processed. Specifically, the layer32A over the layer23B is removed. For example, the layer32A is etched using the layer23B as an etching stopper. Thus, the protective layer32is formed in the opening portion150A (FIG.4B1and FIG.4B2).

Next, a layer36A to be the protective layer36is deposited. The layer36A is preferably deposited by a method providing a film with low coverage; for example, the layer36A is preferably deposited by a method providing a film with lower coverage than that of a film provided by a method for depositing the layer32A. For example, the layer36A is deposited by a sputtering method or a CVD method. Accordingly, the opening portion150A is not coated with the layer36A, so that the gap30is formed (FIG.4C1and FIG.4C2).

Next, the layer36A is processed. Specifically, the layer36A over the layer23B is removed. For example, the layer36A is etched using the layer23B as an etching stopper. Thus, the protective layer36is formed (FIG.4D1and FIG.4D2).

Then, a layer25A to be the upper electrode25is deposited (FIG.5AtoFIG.5C). The layer25A can be deposited by, for example, an evaporation method or a sputtering method. Without limitation to this, any of the above-described deposition methods can be employed as appropriate.

Next, the layer25A, the layer23B, and the layer21B are processed by, for example, an etching method. Specifically, for example, a resist mask is formed over the layer25A, and then the layer25A, the layer23B, and the layer21B are processed by, for example, an etching method, whereby an opening portion150B extending in the y direction is formed. By processing the layer25A, the belt-like upper electrode25extending in the y direction is formed. By processing the layer23B, the island-shaped EL layer23is formed, and by processing the layer21B, the island-shaped lower electrode21is formed. Accordingly, the light-emitting element20is formed (FIG.6AtoFIG.6C).

The smaller the width of the opening portion150B (the length of the opening portion150B in the x direction) is, the more easily the gap30is formed in a later step. For example, the width of the opening portion150B can be smaller than or equal to 1 μm, preferably smaller than or equal to 500 nm, further preferably smaller than or equal to 200 nm, smaller than or equal to 100 nm, smaller than or equal to 90 nm, smaller than or equal to 70 nm, smaller than or equal to 50 nm, smaller than or equal to 30 nm, smaller than or equal to 20 nm, smaller than or equal to 15 nm, or 10 nm.

Note that as illustrated inFIG.6B, the insulating layer61may also be etched during the above etching. Thus, the thickness of the insulating layer61in a region overlapping with the opening portion150B may be smaller than the thickness of the insulating layer61in a region overlapping with the lower electrode21.

As described above, in one embodiment of the present invention, a metal mask, specifically, a fine metal mask is not used for separately forming EL layers. Therefore, one embodiment of the present invention can be a method for manufacturing a display device with high productivity.

In the case of forming the light-emitting element20with use of a fine metal mask, it is difficult to set the distance between the light-emitting elements20to shorter than or equal to 20 μm due to limitation on dimensional accuracy. Meanwhile, in the method for manufacturing a display device of one embodiment of the present invention, the light-emitting element20is formed without using a fine metal mask; thus, the distance between the adjacent light-emitting elements20can be shorter than or equal to 20 μm. Specifically, for example, the distance between the adjacent EL layers23can be shorter than or equal to 20 μm. For example, the distance between the adjacent light-emitting elements20can be longer than or equal to 0.5 μm and shorter than or equal to 15 μm, preferably longer than or equal to 0.5 μm and shorter than or equal to 10 μm, further preferably longer than or equal to 0.5 μm and shorter than or equal to 5 μm. Thus, an increase in the aperture ratio of the pixel, higher resolution, a smaller size, and the like can be achieved.

In this specification and the like, a device using a metal mask or an FMM (a fine metal mask, a high-resolution metal mask) may be referred to as an MM (a metal mask) structure. In this specification and the like, a device not using a metal mask or an FMM is sometimes referred to as an MML (metal maskless) structure.

Note that in the case where the distance between the light-emitting elements20is set to shorter than or equal to 100 nm, typically shorter than or equal to 90 nm, an optimal light-exposure apparatus is needed. For example, as the light-exposure apparatus, a stepper, a scanner, and the like can be used. A light source that can be used for the light-exposure apparatus has a wavelength of 13 nm (EUV), 157 nm (F2), 193 nm (ArF), 248 nm (KrF), 308 nm (XeCl), 365 nm (an i-line), 436 nm (a g-line), and the like. With the light source having a short wavelength, a high-resolution or miniaturized display device can be obtained.

Then, the protective layer31is deposited (FIG.7A1and FIG.7A2). The protective layer31is preferably deposited by a deposition method providing a film with high coverage, such as an ALD method. As a result, the protective layer31is formed to coat the opening portion150B. That is, the protective layer31is formed to include a region in contact with the side surface of the upper electrode25, the side surface of the EL layer23, the side surface of the lower electrode21, and the top surface of the insulating layer61in the opening portion150B.

Then, the protective layer33is deposited. The protective layer33is preferably deposited by a method providing a film with low coverage; for example, the protective layer33is preferably deposited by a method providing a film with lower coverage than that of a film provided by a method for depositing the protective layer31. For example, the protective layer33is deposited by a sputtering method or a CVD method. Accordingly, the opening portion150B is not coated with the protective layer33, so that the gap30is formed (FIG.7B1and FIG.7B2).

Then, the microlens array35is formed over the protective layer33(FIG.8A1and FIG.8A2). The microlens array35can be formed in the following manner: a resist pattern is formed by a photolithography method, for example, and then the resist is reflowed by performing heat treatment.

Next, the substrate47is prepared; the insulating layer45is formed over the substrate47; the light-blocking layer43is formed over the insulating layer45; and then the coloring layer49R, the coloring layer49G, and the coloring layer49B are formed over the insulating layer45and the light-blocking layer43(FIG.8B1and FIG.8B2). After that, the adhesive layer41is formed over the coloring layer49R, the coloring layer49G, the coloring layer49B, and the light-blocking layer43and the microlens array35is bonded to the coloring layer49and the light-blocking layer43with the adhesive layer41. The adhesive layer41can be formed by a screen printing method, a dispensing method, or the like. Through the above steps, the display device10illustrated inFIG.1AtoFIG.1Ccan be manufactured.

Structure Example_2 of Display Device

FIG.9Ais a perspective view illustrating a structure example of the display device10.FIG.9Bis a cross-sectional view in the x direction illustrating the structure example of the display device10.FIG.9Cis a cross-sectional view in the y direction illustrating the structure example of the display device10. The display device10illustrated inFIG.9AtoFIG.9Cis a variation example of the display device10illustrated inFIG.1AtoFIG.1C. The display device10illustrated inFIG.9AtoFIG.9Cis different from the display device10illustrated inFIG.1AtoFIG.1Cin that the upper electrode25is used in common between the light-emitting elements20arranged in the x direction as well as the light-emitting elements20arranged in the y direction. That is, it can be said that the upper electrode25is a common electrode in the display device10illustrated inFIG.9AtoFIG.9C.

The display device10illustrated inFIG.9AtoFIG.9Cincludes a protective layer34in place of the protective layer31and the protective layer33. The protective layer34is provided over the upper electrode25. Furthermore, the microlens array35is provided over the protective layer34. The protective layer34can include a material similar to that of the protective layer33and can be formed by a deposition method similar to that for the protective layer33.

Also in the cross-sectional view in the x direction of the display device10illustrated inFIG.9AtoFIG.9C, the protective layer36is provided over the gap30and the upper electrode25is provided over the EL layer23, the protective layer32, and the protective layer36, as in the cross-sectional view in the y direction.

Manufacturing Method Example_2 of Display Device

An example of a method for manufacturing the display device10illustrated inFIG.9AtoFIG.9Cwill be described below with reference to drawings. Note that the description of steps similar to those illustrated inFIG.2toFIG.8is omitted as appropriate.

In order to manufacture the display device10illustrated inFIG.9AtoFIG.9C, first, the layer to be the lower electrode21and the layer to be the EL layer23are deposited in this order over the insulating layer61. Next, these layers are processed by, for example, an etching method, whereby an opening portion150extending in the x direction and the y direction is formed. Through the above steps, the island-shaped EL layer23and the island-shaped lower electrode21are formed (FIG.10AtoFIG.10C).

The smaller the width of the opening portion150is, the more easily the gap30is formed in a later step. For example, the width of the opening portion150can be smaller than or equal to 1 μm, preferably smaller than or equal to 500 nm, further preferably smaller than or equal to 200 nm, smaller than or equal to 100 nm, smaller than or equal to 90 nm, smaller than or equal to 70 nm, smaller than or equal to 50 nm, smaller than or equal to 30 nm, smaller than or equal to 20 nm, smaller than or equal to 15 nm, or 10 nm.

Note that as illustrated inFIG.10BandFIG.10C, the insulating layer61may also be etched during the above etching. Thus, the thickness of the insulating layer61in a region overlapping with the opening portion150may be smaller than the thickness of the insulating layer61in a region overlapping with the lower electrode21.

Then, the layer32A to be the protective layer32is deposited (FIG.11A1and FIG.11A2). The layer32A is preferably deposited by a deposition method providing a film with high coverage, such as an ALD method. As a result, the layer32A is formed to coat the opening portion150. That is, the layer32A is formed to include a region in contact with the side surface of the EL layer23, the side surface of the lower electrode21, and the top surface of the insulating layer61in the opening portion150.

Next, the layer32A is processed. Specifically, the layer32A over the EL layer23is removed. For example, the layer32A is etched using the EL layer23as an etching stopper. Thus, the protective layer32is formed in the opening portion150(FIG.11B1and FIG.11B2).

Then, the layer36A to be the protective layer36is deposited. The layer36A is preferably deposited by a method providing a film with low coverage; for example, the layer36A is preferably deposited by a method providing a film with lower coverage than that of a film provided by a method for depositing the layer32A. For example, the layer36A is deposited by a sputtering method or a CVD method. Accordingly, the opening portion150is not coated with the layer36A, so that the gap30is formed (FIG.11C1and FIG.11C2).

Next, the layer36A is processed. Specifically, the layer36A over the EL layer23is removed. For example, the layer36A is etched using the EL layer23as an etching stopper. Thus, the protective layer36is formed (FIG.11D1and FIG.11D2).

After that, the upper electrode25is deposited (FIG.12AtoFIG.12C). Next, the protective layer34is deposited (FIG.13A1and FIG.13A2). The protective layer34can be deposited by a CVD method, a sputtering method, or an ALD method, for example. Then, the microlens array35is formed over the protective layer34(FIG.13B1and FIG.13B2).

Next, the substrate47is prepared; the insulating layer45is formed over the substrate47; the light-blocking layer43is formed over the insulating layer45; and then the coloring layer49R, the coloring layer49G, and the coloring layer49B are formed over the insulating layer45and the light-blocking layer43. After that, the adhesive layer41is formed over the coloring layer49R, the coloring layer49G, the coloring layer49B, and the light-blocking layer43and the microlens array35is bonded to the coloring layer49and the light-blocking layer43with the adhesive layer41. Through the above steps, the display device10illustrated inFIG.9AtoFIG.9Ccan be manufactured.

Structure Example_3 of Display Device

FIG.14AandFIG.14Bare cross-sectional views illustrating a structure example of the display device10and show a variation example of the display device10illustrated inFIG.1BandFIG.1C. The display device10illustrated inFIG.14AandFIG.14Bis different from the display device10illustrated inFIG.1BandFIG.1Cin not including the microlens array35. Note that for an example of a structure of the display device10illustrated inFIG.14AandFIG.14Bseen from an oblique direction, the perspective view inFIG.1Acan be referred to.

When the display device10does not include the microlens array35, the manufacturing process of the display device10can be simplified. This can achieve low manufacturing cost and high yield of the display device10. Accordingly, the display device10can be inexpensive.

FIG.15AandFIG.15Bare cross-sectional views illustrating a structure example of the display device10and show a variation example of the display device10illustrated inFIG.1BandFIG.1C. The display device10illustrated inFIG.15AandFIG.15Bis different from the display device10illustrated inFIG.1BandFIG.1Cin that a partition37is provided over the insulating layer61. The partition37can be an insulating layer, for example. Note that for an example of a structure of the display device10illustrated inFIG.15AandFIG.15Bseen from an oblique direction, the perspective view inFIG.1Acan be referred to.

The partition37is provided between the adjacent pixels50and is provided to cover an end portion of the lower electrode21. In the display device10illustrated inFIG.15AandFIG.15B, the EL layer23is provided over the lower electrode21and the partition37and the protective layer31is provided over the upper electrode25and the partition37. Note that the EL layer23does not necessarily include a region overlapping with the partition37.

The provision of the partition37can inhibit an electrical short circuit that can be generated between, for example, the adjacent lower electrodes21. Meanwhile, a structure not provided with the partition37can increase the aperture ratio of the pixel; for example, the aperture ratio can be higher than or equal to 70%, preferably higher than or equal to 80%, further preferably higher than or equal to 90%.

In the case of manufacturing the display device10illustrated inFIG.15AandFIG.15B, part of the partition37may be etched when the layer to be the EL layer23is etched. Thus, a structure in which the gap30reaches the inside of the partition37can be formed.

FIG.16is a cross-sectional view illustrating a structure example of the display device10.FIG.16is the cross-sectional view illustrating an example of a structure under the insulating layer61in the display device10illustrated inFIG.1B.

As illustrated inFIG.16, the display device10includes transistors80and element isolation layers86over a substrate81. Over the substrate81, an insulating layer131, an insulating layer133, an insulating layer135, and an insulating layer137are provided.

The display device10includes an insulating layer71over the insulating layer137and the insulating layer61over the insulating layer71. AlthoughFIG.16illustrates the structure provided with the insulating layer71as an example, one embodiment of the present invention is not limited thereto. For example, a structure in which not the insulating layer71but the insulating layer61is provided to include a region in contact with the top surface of the insulating layer137may be employed.

The display device10further includes a conductive layer67, a conductive layer69, a conductive layer63, and a conductive layer65. The conductive layer67is embedded in the insulating layer131, the insulating layer133, the insulating layer135, and the insulating layer137and the conductive layer69is embedded in the insulating layer71. The conductive layer63and the conductive layer65are embedded in the insulating layer61. Furthermore, the top surface of the conductive layer67and the top surface of the insulating layer137can be substantially level with each other and the top surface of the conductive layer69and the top surface of the insulating layer71can be substantially level with each other.

As illustrated inFIG.16, the light-emitting element20and the transistor80are provided to be stacked. Here, a layer where the light-emitting element20is provided is referred to as a layer121and a layer where the transistor80is provided is referred to as a layer125.

The transistor80is provided in each of the pixel50R, the pixel50G, and the pixel50B. One of a source and a drain of the transistor80is electrically connected to the lower electrode21through the conductive layer67, the conductive layer69, the conductive layer63, and the conductive layer65.

Here, the conductive layer69has a function of a plug for electrically connecting the conductive layer67to the conductive layer63, for example. The conductive layer65has a function of a plug for electrically connecting the conductive layer63to the lower electrode21, for example.

In the layer125, a transistor included in a driver circuit such as a scan line driver circuit can be provided in addition to the transistor included in the pixel50.

The transistor80can be a transistor (Si transistor) including silicon in a channel formation region. The silicon included in the Si transistor can be single crystal silicon, polycrystalline silicon (polysilicon), amorphous silicon, or the like. In particular, a channel formation region of the transistor80is preferably formed using single crystal silicon.

The transistor80includes a conductive layer82having a function of a gate electrode, an insulating layer83having a function of a gate insulating layer, and part of the substrate81. The transistor80includes a semiconductor region including the channel formation region, a low-resistance region85ahaving a function of one of a source region and a drain region, and a low-resistance region85bhaving a function of the other of the source region and the drain region. The transistor80can be either a p-channel transistor or an n-channel transistor. Alternatively, the transistor80may be a so-called CMOS (Complementary Metal Oxide Semiconductor) transistor in which an n-channel transistor and a p-channel transistor are combined.

The transistor80is electrically isolated from other transistors by the element isolation layer86.FIG.16illustrates the case where the transistors80are electrically isolated from each other by the element isolation layer86. The element isolation layer86can be formed by a LOCOS (LOCal Oxidation of Silicon) method, an STI (Shallow Trench Isolation) method, or the like.

FIG.17Ais a cross-sectional view illustrating a structure example of the transistor80illustrated inFIG.16in the channel width direction (A1-A2direction).

As illustrated inFIG.16andFIG.17A, the semiconductor region of the transistor80has a protruding shape. Moreover, the conductive layer82is provided to cover the side surface and the top surface of the semiconductor region with the insulating layer83therebetween. A material adjusting the work function can be used for the conductive layer82.

A transistor having a protruding semiconductor region, like the transistor80illustrated inFIG.16andFIG.17A, is referred to as a fin-type transistor because a protruding portion of a semiconductor substrate is used. An insulator having a function of a mask for forming a protruding portion may be provided in contact with an upper portion of the protruding portion. AlthoughFIG.16illustrates the structure in which the protruding portion is formed by processing part of the substrate81, a semiconductor having a protruding shape may be formed by processing an SOI (Silicon On Insulator) substrate.

FIG.17BandFIG.17Care cross-sectional views illustrating structure examples of the transistor80in the channel length direction and are variation examples of the transistor80illustrated inFIG.16. The transistor80illustrated inFIG.17Bis different from the transistor80illustrated inFIG.16in having a planar structure. The structure illustrated inFIG.17Cis different from the structure illustrated inFIG.16in that an insulating layer88is provided over the substrate81and the transistor80is provided over the insulating layer88.

The transistor80illustrated inFIG.17Cincludes a semiconductor layer87. The semiconductor layer87can be a thin film, e.g., a thin film containing silicon. Specifically, the semiconductor layer87can be a thin film containing amorphous silicon or low-temperature polysilicon. The semiconductor layer87can be single crystal silicon (SOI) formed over the insulating layer88.

For example, the insulating layer131, the insulating layer133, the insulating layer135, the insulating layer137, and the insulating layer71each have a function of an interlayer film. The insulating layer131, the insulating layer133, the insulating layer135, the insulating layer137, and the insulating layer71may each have a function of a planarization layer that coats an uneven shape thereunder.

Materials and the like that can be used for the substrate81and the substrate47are described below.

There is no great limitation on materials used for the substrate81and the substrate47. The material is determined by the purpose in consideration of whether it has a light-transmitting property, heat resistance high enough to withstand heat treatment, and the like. For example, a glass substrate of barium borosilicate glass, aluminosilicate glass, or the like; a ceramic substrate; a quartz substrate; a sapphire substrate; or the like can be used. Alternatively, a semiconductor substrate, a flexible substrate, an attachment film, a base film, or the like may be used.

Examples of the semiconductor substrate include a semiconductor substrate using silicon, germanium, or the like as a material and a compound semiconductor substrate using silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, or gallium oxide as a material. For the semiconductor substrate, a single-crystal semiconductor or a polycrystalline semiconductor may be used.

In order to increase the flexibility of the display device10, a flexible substrate, an attachment film, a base film, or the like may be used as the substrate81and the substrate47.

As the materials of the flexible substrate, the attachment film, the base film, and the like, for example, a polyester resin such as polyethylene terephthalate (PET) or polyethylene naphthalate (PEN), a polyacrylonitrile resin, an acrylic resin, a polyimide resin, a polymethyl methacrylate resin, a polycarbonate (PC) resin, a polyethersulfone (PES) resin, a polyamide resin (e.g., nylon or aramid), a polysiloxane resin, a cycloolefin resin, a polystyrene resin, a polyamide-imide resin, a polyurethane resin, a polyvinyl chloride resin, a polyvinylidene chloride resin, a polypropylene resin, a polytetrafluoroethylene (PTFE) resin, an ABS resin, cellulose nanofiber, or the like can be used.

When the above-described material is used for the substrate, a lightweight display device can be provided. Furthermore, when the above-described material is used for the substrate, a shock-resistant display device can be provided. Moreover, when the above-described material is used for the substrate, a display device that is less likely to be broken can be provided.

The flexible substrate used as the substrate81and the substrate47preferably has a lower coefficient of linear expansion because deformation due to an environment is inhibited. For the flexible substrate used as the substrate81and the substrate47, for example, a material whose coefficient of linear expansion is lower than or equal to 1×10−3/K, lower than or equal to 5×10−5/K, or lower than or equal to 1×10−5/K is used. In particular, aramid is preferable for the flexible substrate because of its low coefficient of linear expansion.

FIG.18is a cross-sectional view illustrating a structure example of the display device10and is a variation example of the display device10illustrated inFIG.16. The display device10illustrated inFIG.18is different from the display device10illustrated inFIG.16in that a layer123is provided between the layer121and the layer125.

Transistors70are provided in the layer123. The transistor70is provided in each of the pixel50R, the pixel50G, and the pixel50B. In the display device10illustrated inFIG.18, one of a source and a drain of the transistor70is electrically connected to the lower electrode21through the conductive layer63and the conductive layer65.

The transistor70can be a transistor (OS transistor) including a metal oxide in a channel formation region. The metal oxide included in the OS transistor preferably contains at least indium or zinc. In particular, indium and zinc are preferably contained. In addition to them, aluminum, gallium, yttrium, tin, or the like is preferably contained. Furthermore, one or more kinds selected from boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt, and the like may be contained.

Structure Example_4 of Display Device

FIG.19is a cross-sectional view illustrating a structure example of the display device10and illustrates a sealant91, a connection electrode93, an anisotropic conductive layer95, an FPC (Flexible Printed Circuit)97, and the like in addition to the components illustrated inFIG.16.

As illustrated inFIG.19, the substrate47is bonded to the insulating layer61with the sealant91. Moreover, over the insulating layer61and the conductive layer65, the connection electrode93is provided to be electrically connected to one of the source and the drain of the transistor80, for example. The anisotropic conductive layer95is provided over the connection electrode93and the FPC97is provided over the anisotropic conductive layer95. For example, a variety of signals are supplied to the display device10from outside of the display device10through the FPC97. The sealant91may be omitted and the FPC97may be wire-bonded.

FIG.20is a cross-sectional view illustrating a structure example of the display device10and is a variation example of the display device10illustrated inFIG.19. The display device10illustrated inFIG.20is different from the display device10illustrated inFIG.19in including the transistor70that can be, for example, an OS transistor.

FIG.21Ais a block diagram illustrating a structure example of the display device10. The display device10includes a display portion100, a scan line driver circuit101, and a data line driver circuit103. The pixels50are arranged in a matrix in the display portion100. The scan line driver circuit101and the data line driver circuit103can each include the transistor80.

The scan line driver circuit101is electrically connected to the pixels50through a wiring105. The data line driver circuit103is electrically connected to the pixels50through a wiring107. The wiring105and the wiring107can extend in directions orthogonal to each other.

The scan line driver circuit101has a function of generating a selection signal for selecting the pixel50to which image data is written. The data line driver circuit103has a function of generating a signal representing image data (a data signal). The selection signal is supplied to the pixel50through the wiring105and the data signal is supplied to the pixel50through the wiring107.

FIG.21Bis a circuit diagram illustrating a structure example of the pixel50. The pixel50includes the light-emitting element20and a pixel circuit110.

The pixel circuit110includes a transistor111, a transistor140, a transistor113, and a capacitor115. The pixel circuit110is electrically connected to one electrode of the light-emitting element20. Here, the transistor140can be used as, for example, the transistor80illustrated inFIG.16andFIG.17AtoFIG.17Cor the transistor70illustrated inFIG.18.

One of a source and a drain of the transistor111is electrically connected to a gate of the transistor140. The gate of the transistor140is electrically connected to one electrode of the capacitor115. One of a source and a drain of the transistor140is electrically connected to one of a source and a drain of the transistor113. The one of the source and the drain of the transistor113is electrically connected to the other electrode of the capacitor115. The other electrode of the capacitor115is electrically connected to the one electrode of the light-emitting element20. Here, a node to which the one of the source and the drain of the transistor111, the gate of the transistor140, and the one electrode of the capacitor115are electrically connected is referred to as a node117. A node to which the one of the source and the drain of the transistor140, the one of the source and the drain of the transistor113, the other electrode of the capacitor115, and the one electrode of the light-emitting element20are electrically connected is referred to as a node119.

The other of the source and the drain of the transistor111is electrically connected to the wiring107. A gate of the transistor111and a gate of the transistor113are electrically connected to the wiring105. The other of the source and the drain of the transistor140is electrically connected to a potential supply line VL_a. The other of the source and the drain of the transistor113is electrically connected to a potential supply line VL0. The other electrode of the light-emitting element20is electrically connected to a potential supply line VL_b.

The transistor111has a function of controlling the writing of image data to the node117. The capacitor115has a function of a storage capacitor for holding data written to the node117.

In the display device including the pixel circuit110, the pixel circuits110are sequentially selected row by row by the scan line driver circuit101, whereby the transistor111and the transistor113are turned on and image data is written to the nodes117.

When the transistor111and the transistor113are turned off, the pixel circuits110in which the image data has been written to the nodes117are brought into a holding state. The amount of current flowing between the source and the drain of the transistor140is controlled in accordance with the potential of the node119, and thus the light-emitting element20emits light with a luminance corresponding to the amount of current. This operation is sequentially performed row by row; thus, an image can be displayed on the display portion100.

Structure Example of Transistor

FIG.22A,FIG.22B, andFIG.22Care a top view and cross-sectional views of the transistor70and the periphery of the transistor70.

FIG.22Ais a top view of the transistor70.FIG.22BandFIG.22Care cross-sectional views of the transistor70. Here,FIG.22Bis a cross-sectional view of a portion indicated by the dashed-dotted line X1-X2inFIG.22Aand is a cross-sectional view of the transistor70in the channel length direction.FIG.22Cis a cross-sectional view of a portion indicated by the dashed-dotted line Y1-Y2inFIG.22Aand is a cross-sectional view of the transistor70in the channel width direction. Note that some components are omitted in the top view ofFIG.22Afor clarity of the drawing.

As illustrated inFIG.22, the transistor70includes a metal oxide230aplaced over a substrate (not illustrated); a metal oxide230bplaced over the metal oxide230a; a conductor242aand a conductor242bthat are placed apart from each other over the metal oxide230b; an insulator280that is placed over the conductor242aand the conductor242band has an opening between the conductor242aand the conductor242b; a conductor260placed in the opening; an insulator250placed between the conductor260and the metal oxide230b, the conductor242a, the conductor242b, and the insulator280; and a metal oxide230cplaced between the insulator250and the metal oxide230b, the conductor242a, the conductor242b, and the insulator280. Here, as illustrated inFIG.22BandFIG.22C, preferably, the top surface of the conductor260is substantially aligned with the top surfaces of the insulator250, an insulator254, the metal oxide230c, and the insulator280. Hereinafter, the metal oxide230a, the metal oxide230b, and the metal oxide230cmay be collectively referred to as a metal oxide230. The conductor242aand the conductor242bmay be collectively referred to as a conductor242.

In the transistor70illustrated inFIG.22, the side surfaces of the conductor242aand the conductor242bon the conductor260side are substantially perpendicular. Note that the transistor70illustrated inFIG.22is not limited thereto, and the angle formed between the side surfaces and the bottom surfaces of the conductor242aand the conductor242bmay be greater than or equal to 10° and less than or equal to 80°, preferably greater than or equal to 30° and less than or equal to 60°. The side surfaces of the conductor242aand the conductor242bthat face each other may have a plurality of surfaces.

As illustrated inFIG.22, the insulator254is preferably placed between the insulator280and each of an insulator224, the metal oxide230a, the metal oxide230b, the conductor242a, the conductor242b, and the metal oxide230c. Here, as illustrated inFIG.22BandFIG.22C, the insulator254is preferably in contact with the side surface of the metal oxide230c, the top surface and the side surface of the conductor242a, the top surface and the side surface of the conductor242b, the side surfaces of the metal oxide230aand the metal oxide230b, and the top surface of the insulator224.

In the transistor70, three layers of the metal oxide230a, the metal oxide230b, and the metal oxide230care stacked in and around the region where the channel is formed (hereinafter also referred to as channel formation region); however, the present invention is not limited thereto. For example, a two-layer structure of the metal oxide230band the metal oxide230cor a stacked-layer structure of four or more layers may be employed. Although the conductor260is illustrated to have a stacked-layer structure of two layers in the transistor70, the present invention is not limited thereto. For example, the conductor260may have a single-layer structure or a stacked-layer structure of three or more layers. Furthermore, each of the metal oxide230a, the metal oxide230b, and the metal oxide230cmay have a stacked-layer structure of two or more layers.

For example, in the case where the metal oxide230chas a stacked-layer structure including a first metal oxide and a second metal oxide over the first metal oxide, the first metal oxide preferably has a composition similar to that of the metal oxide230band the second metal oxide preferably has a composition similar to that of the metal oxide230a.

Here, the conductor260functions as a gate electrode of the transistor, and the conductor242aand the conductor242beach function as a source electrode or a drain electrode. As described above, the conductor260is formed to be embedded in the opening of the insulator280and the region interposed between the conductor242aand the conductor242b. Here, the positions of the conductor260, the conductor242a, and the conductor242bare selected in a self-aligned manner with respect to the opening of the insulator280. In other words, in the transistor70, the gate electrode can be placed between the source electrode and the drain electrode in a self-aligned manner. Thus, the conductor260can be formed without an alignment margin, resulting in a reduction in the area occupied by the transistor70. Accordingly, the display device can have higher resolution. In addition, the display device can have a narrow bezel.

As illustrated inFIG.22, the conductor260preferably includes a conductor260aprovided on the inner side of the insulator250and a conductor260bprovided to be embedded on the inner side of the conductor260a.

The transistor70preferably includes an insulator214placed over the substrate (not illustrated); an insulator216placed over the insulator214; a conductor205placed to be embedded in the insulator216; an insulator222placed over the insulator216and the conductor205; and the insulator224placed over the insulator222. The metal oxide230ais preferably placed over the insulator224.

An insulator274and an insulator281functioning as interlayer films are preferably placed over the transistor70. Here, the insulator274is preferably placed in contact with the top surfaces of the conductor260, the insulator250, the insulator254, the metal oxide230c, and the insulator280.

The insulator222, the insulator254, and the insulator274preferably have a function of inhibiting diffusion of at least one of hydrogen (e.g., a hydrogen atom and a hydrogen molecule). For example, the insulator222, the insulator254, and the insulator274preferably have a lower hydrogen permeability than the insulator224, the insulator250, and the insulator280. Moreover, the insulator222and the insulator254preferably have a function of inhibiting diffusion of oxygen (e.g., at least one of an oxygen atom and an oxygen molecule). For example, the insulator222and the insulator254preferably have a lower oxygen permeability than the insulator224, the insulator250, and the insulator280.

Here, the insulator224, the metal oxide230, and the insulator250are separated from the insulator280and the insulator281by the insulator254and the insulator274. This can inhibit entry of impurities such as hydrogen contained in the insulator280and the insulator281into the insulator224, the metal oxide230, and the insulator250or excess oxygen into the insulator224, the metal oxide230a, the metal oxide230b, and the insulator250.

A conductor240(a conductor240aand a conductor240b) that is electrically connected to the transistor70and functions as a plug is preferably provided. Note that an insulator241(an insulator241aand an insulator241b) is provided in contact with the side surface of the conductor240functioning as a plug. In other words, the insulator241is provided in contact with the inner wall of an opening in the insulator254, the insulator280, the insulator274, and the insulator281. In addition, a structure may be employed in which a first conductor of the conductor240is provided in contact with the side surface of the insulator241and a second conductor of the conductor240is provided on the inner side of the first conductor. Here, the top surface of the conductor240and the top surface of the insulator281can be substantially level with each other. Although the transistor70has a structure in which the first conductor of the conductor240and the second conductor of the conductor240are stacked, the present invention is not limited thereto. For example, the conductor240may have a single-layer structure or a stacked-layer structure of three or more layers. In the case where a component has a stacked-layer structure, layers may be distinguished by ordinal numbers corresponding to the formation order.

In the transistor70, a metal oxide functioning as an oxide semiconductor (hereinafter also referred to as an oxide semiconductor) is preferably used as the metal oxide230including the channel formation region (the metal oxide230a, the metal oxide230b, and the metal oxide230c). For example, it is preferable to use a metal oxide having a band gap of 2 eV or more, preferably 2.5 eV or more as the metal oxide to be the channel formation region of the metal oxide230.

The metal oxide preferably contains at least indium (In) or zinc (Zn). In particular, the metal oxide preferably contains indium (In) and zinc (Zn). In addition to them, an element M is preferably contained. As the element M, one or more of aluminum (Al), gallium (Ga), yttrium (Y), tin (Sn), boron (B), titanium (Ti), iron (Fe), nickel (Ni), germanium (Ge), zirconium (Zr), molybdenum (Mo), lanthanum (La), cerium (Ce), neodymium (Nd), hafnium (Hf), tantalum (Ta), tungsten (W), magnesium (Mg), and cobalt (Co) can be used. In particular, the element M is preferably one or more of aluminum (Al), gallium (Ga), yttrium (Y), and tin (Sn). Furthermore, the element M preferably contains one or both of Ga and Sn.

As illustrated inFIG.22B, the metal oxide230bin a region that does not overlap with the conductor242sometimes has a smaller thickness than the metal oxide230bin a region that overlaps with the conductor242. The thin region is formed when part of the top surface of the metal oxide230bis removed at the time of forming the conductor242aand the conductor242b. When a conductive film to be the conductor242is deposited, a low-resistance region is sometimes formed on the top surface of the metal oxide230bin the vicinity of the interface with the conductive film. Removing the low-resistance region positioned between the conductor242aand the conductor242bon the top surface of the metal oxide230bin the above manner can prevent formation of the channel in the region.

According to one embodiment of the present invention, a display device that includes small-size transistors and has high resolution can be provided. A display device that includes a transistor with a high on-state current and has high luminance can be provided. A display device that includes a transistor operating at high speed and thus operates at high speed can be provided. A display device that includes a transistor having stable electrical characteristics and is highly reliable can be provided. A display device that includes a transistor with a low off-state current and has low power consumption can be provided.

The structure of the transistor70that can be used in the display device of one embodiment of the present invention is described in detail.

The conductor205is placed to include a region that overlaps with the metal oxide230and the conductor260. Furthermore, the conductor205is preferably provided to be embedded in the insulator216.

The conductor205includes a conductor205a, a conductor205b, and a conductor205c. The conductor205ais provided in contact with the bottom surface and a side wall of the opening provided in the insulator216. The conductor205bis provided to be embedded in a recessed portion formed in the conductor205a. Here, the top surface of the conductor205bis lower in level than the top surface of the conductor205aand the top surface of the insulator216. The conductor205cis provided in contact with the top surface of the conductor205band the side surface of the conductor205a. Here, the top surface of the conductor205cis substantially level with the top surface of the conductor205aand the top surface of the insulator216. That is, the conductor205bis surrounded by the conductor205aand the conductor205c.

Here, for the conductor205aand the conductor205c, it is preferable to use a conductive material having a function of inhibiting diffusion of impurities such as a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, a nitrogen oxide molecule (e.g., N2O, NO, and NO2), and a copper atom. Alternatively, it is preferable to use a conductive material having a function of inhibiting diffusion of oxygen (e.g., at least one of an oxygen atom and an oxygen molecule).

When the conductor205aand the conductor205care formed using a conductive material having a function of inhibiting diffusion of hydrogen, impurities such as hydrogen contained in the conductor205bcan be inhibited from diffusing into the metal oxide230through the insulator224and the like. When the conductor205aand the conductor205care formed using a conductive material having a function of inhibiting diffusion of oxygen, the conductivity of the conductor205bcan be inhibited from being lowered because of oxidation. As the conductive material having a function of inhibiting diffusion of oxygen, for example, titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, or ruthenium oxide is preferably used. Thus, the conductor205ais a single layer or a stacked layer using the above conductive materials. For example, titanium nitride is used for the conductor205a.

For the conductor205b, a conductive material containing tungsten, copper, or aluminum as its main component is preferably used. For example, tungsten is used for the conductor205b.

Here, the conductor260sometimes functions as a first gate (also referred to as top gate) electrode. The conductor205sometimes functions as a second gate (also referred to as bottom gate) electrode. In that case, by changing a potential applied to the conductor205not in synchronization with but independently of a potential applied to the conductor260, Vthof the transistor70can be controlled. In particular, by applying a negative potential to the conductor205, Vthof the transistor70can be higher than 0 V and the off-state current can be made small. Thus, a drain current at the time when a potential applied to the conductor260is 0 V can be lower in the case where a negative potential is applied to the conductor205than in the case where the negative potential is not applied to the conductor205.

The conductor205is preferably provided to be larger than the channel formation region in the metal oxide230. In particular, it is preferable that the conductor205extend beyond an end portion of the metal oxide230that intersects with the channel width direction, as illustrated inFIG.22C. In other words, the conductor205and the conductor260preferably overlap with each other with the insulator placed therebetween, in a region outside the side surface of the metal oxide230in the channel width direction.

With the above structure, the channel formation region of the metal oxide230can be electrically surrounded by electric fields of the conductor260functioning as the first gate electrode and electric fields of the conductor205functioning as the second gate electrode.

Furthermore, as illustrated inFIG.22C, the conductor205extends to function as a wiring as well. However, without limitation to this structure, a structure in which a conductor functioning as a wiring is provided below the conductor205may be employed.

The insulator214preferably functions as a barrier insulating film that inhibits the entry of impurities such as water or hydrogen to the transistor70from the substrate side. Accordingly, it is preferable to use, for the insulator214, an insulating material having a function of inhibiting diffusion of impurities such as a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, a nitrogen oxide molecule (e.g., N2O, NO, and NO2), and a copper atom (an insulating material through which the impurities are less likely to pass). Alternatively, it is preferable to use an insulating material having a function of inhibiting diffusion of oxygen (e.g., at least one of an oxygen atom and an oxygen molecule) (an insulating material through which the oxygen is less likely to pass).

For example, aluminum oxide or silicon nitride is preferably used for the insulator214. Accordingly, it is possible to inhibit diffusion of impurities such as water or hydrogen to the transistor70side from the substrate side through the insulator214. Alternatively, it is possible to inhibit diffusion of oxygen contained in the insulator224and the like to the substrate side through the insulator214.

The permittivity of each of the insulator216, the insulator280, and the insulator281functioning as an interlayer film is preferably lower than that of the insulator214. When a material with a low permittivity is used for an interlayer film, the parasitic capacitance generated between wirings can be reduced. For the insulator216, the insulator280, and the insulator281, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine is added, silicon oxide to which carbon is added, silicon oxide to which carbon and nitrogen are added, porous silicon oxide, or the like can be used as appropriate.

The insulator222and the insulator224have a function of a gate insulator.

Here, the insulator224in contact with the metal oxide230preferably releases oxygen by heating. In this specification, oxygen that is released by heating is referred to as excess oxygen in some cases. For example, silicon oxide, silicon oxynitride, or the like is used as appropriate for the insulator224. When an insulator containing oxygen is provided in contact with the metal oxide230, oxygen vacancies in the metal oxide230can be reduced, leading to improved reliability of the transistor70.

Specifically, an oxide material that releases part of oxygen by heating is preferably used for the insulator224. An oxide that releases oxygen by heating is an oxide film in which the amount of released oxygen converted into oxygen atoms is greater than or equal to 1.0×1018atoms/cm3, preferably greater than or equal to 1.0×1019atoms/cm3, further preferably greater than or equal to 2.0×1019atoms/cm3or greater than or equal to 3.0×1020atoms/cm3in TDS (Thermal Desorption Spectroscopy) analysis. Note that the temperature of the film surface in the TDS analysis is preferably in the range of 100° C. to 700° C., inclusive or 100° C. to 400° C., inclusive.

As illustrated inFIG.22C, the insulator224is sometimes thinner in a region that overlaps with neither the insulator254nor the metal oxide230bthan in the other regions. In the insulator224, the region that overlaps with neither the insulator254nor the metal oxide230bpreferably has a thickness with which the above oxygen can adequately diffuse.

Like the insulator214and the like, the insulator222preferably functions as a barrier insulating film that inhibits the entry of impurities such as water or hydrogen into the transistor70from the substrate side. For example, the insulator222preferably has a lower hydrogen permeability than the insulator224. When the insulator224, the metal oxide230, the insulator250, and the like are surrounded by the insulator222, the insulator254, and the insulator274, the entry of impurities such as water or hydrogen into the transistor70from outside can be inhibited.

Furthermore, it is preferable that the insulator222have a function of inhibiting diffusion of oxygen (e.g., at least one of an oxygen atom and an oxygen molecule) (it is preferable that the oxygen be less likely to pass through the insulator222). For example, the insulator222preferably has a lower oxygen permeability than the insulator224. The insulator222preferably has a function of inhibiting diffusion of oxygen and impurities, in which case oxygen contained in the metal oxide230is less likely to diffuse to the substrate side. Moreover, the conductor205can be inhibited from reacting with oxygen contained in the insulator224or oxygen contained in the metal oxide230.

As the insulator222, an insulator containing an oxide of one or both of aluminum and hafnium, which is an insulating material, is preferably used. As the insulator containing an oxide of one or both of aluminum and hafnium, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like is preferably used. In the case where the insulator222is formed using such a material, the insulator222functions as a layer inhibiting release of oxygen from the metal oxide230and entry of impurities such as hydrogen into the metal oxide230from the periphery of the transistor70.

The insulator222may be a single layer or a stacked layer using an insulator containing a so-called high-k material, such as aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3), or (Ba,Sr)TiO3(BST). With further miniaturization and higher integration of a transistor, a problem such as generation of leakage current may arise because of a thinned gate insulator. When a high-k material is used for the insulator functioning as a gate insulator, a gate potential at the time of operation of the transistor can be reduced while the physical thickness is maintained.

Note that the insulator222and the insulator224may each have a stacked-layer structure of two or more layers. In that case, without limitation to a stacked-layer structure formed of the same material, a stacked-layer structure formed of different materials may be employed. For example, an insulator similar to the insulator224may be provided below the insulator222.

The metal oxide230includes the metal oxide230a, the metal oxide230bover the metal oxide230a, and the metal oxide230cover the metal oxide230b. Including the metal oxide230aunder the metal oxide230bmakes it possible to inhibit diffusion of impurities into the metal oxide230bfrom components formed below the metal oxide230a. Moreover, including the metal oxide230cover the metal oxide230bmakes it possible to inhibit diffusion of impurities into the metal oxide230bfrom components formed above the metal oxide230c.

Note that the metal oxide230preferably has a stacked-layer structure of a plurality of oxide layers that differ in the atomic ratio of metal atoms. For example, in the case where the metal oxide230contains at least indium (In) and the element M, the proportion of the number of atoms of the element M contained in the metal oxide230ato the number of atoms of all elements that constitute the metal oxide230ais preferably higher than the proportion of the number of atoms of the element M contained in the metal oxide230bto the number of atoms of all elements that constitute the metal oxide230b. In addition, the atomic ratio of the element M to In in the metal oxide230ais preferably greater than the atomic ratio of the element M to In in the metal oxide230b. Here, a metal oxide that can be used as the metal oxide230aor the metal oxide230bcan be used as the metal oxide230c.

The energy of the conduction band minimum of each of the metal oxide230aand the metal oxide230cis preferably higher than the energy of the conduction band minimum of the metal oxide230b. In other words, the electron affinity of each of the metal oxide230aand the metal oxide230cis preferably smaller than the electron affinity of the metal oxide230b. In this case, a metal oxide that can be used as the metal oxide230ais preferably used as the metal oxide230c. Specifically, the proportion of the number of atoms of the element M contained in the metal oxide230cto the number of atoms of all elements that constitute the metal oxide230cis preferably higher than the proportion of the number of atoms of the element M contained in the metal oxide230bto the number of atoms of all elements that constitute the metal oxide230b. In addition, the atomic ratio of the element M to In in the metal oxide230cis preferably greater than the atomic ratio of the element M to In in the metal oxide230b.

Here, the energy level of the conduction band minimum gently changes at junction portions between the metal oxide230a, the metal oxide230b, and the metal oxide230c. In other words, the energy level of the conduction band minimum at junction portions between the metal oxide230a, the metal oxide230b, and the metal oxide230cis continuously varied or are continuously connected. This can be achieved by decreasing the density of defect states in a mixed layer formed at the interface between the metal oxide230aand the metal oxide230band the interface between the metal oxide230band the metal oxide230c.

Specifically, when the metal oxide230aand the metal oxide230bor the metal oxide230band the metal oxide230ccontain the same element (as a main component) in addition to oxygen, a mixed layer with a low density of defect states can be formed. For example, an In—Ga—Zn oxide, a Ga—Zn oxide, gallium oxide, or the like may be used as the metal oxide230aand the metal oxide230c, in the case where the metal oxide230bis an In—Ga—Zn oxide. The metal oxide230cmay have a stacked-layer structure. For example, a stacked-layer structure of an In—Ga—Zn oxide and a Ga—Zn oxide over the In—Ga—Zn oxide or a stacked-layer structure of an In—Ga—Zn oxide and gallium oxide over the In—Ga—Zn oxide can be employed. In other words, the metal oxide230cmay have a stacked-layer structure of an In—Ga—Zn oxide and an oxide that does not contain In.

Specifically, as the metal oxide230a, a metal oxide with In:Ga:Zn=1:3:4 [atomic ratio] or 1:1:0.5 [atomic ratio] can be used. As the metal oxide230b, a metal oxide with In:Ga:Zn=4:2:3 [atomic ratio] or 3:1:2 [atomic ratio] can be used. As the metal oxide230c, a metal oxide with In:Ga:Zn=1:3:4 [atomic ratio], In:Ga:Zn=4:2:3 [atomic ratio], Ga:Zn=2:1 [atomic ratio], or Ga:Zn=2:5 [atomic ratio] can be used. Specific examples of a stacked-layer structure of the metal oxide230cinclude a stacked-layer structure of a layer with In:Ga:Zn=4:2:3 [atomic ratio] and a layer with Ga:Zn=2:1 [atomic ratio], a stacked-layer structure of a layer with In:Ga:Zn=4:2:3 [atomic ratio] and a layer with Ga:Zn=2:5 [atomic ratio], and a stacked-layer structure of a layer with In:Ga:Zn=4:2:3 [atomic ratio] and a layer of gallium oxide.

At this time, the metal oxide230bserves as a main carrier path. When the metal oxide230aand the metal oxide230chave the above structure, the density of defect states at the interface between the metal oxide230aand the metal oxide230band the interface between the metal oxide230band the metal oxide230ccan be made low. This reduces the influence of interface scattering on carrier conduction, and the transistor70can have a high on-state current and high frequency characteristics. Note that in the case where the metal oxide230chas a stacked-layer structure, not only the effect of reducing the density of defect states at the interface between the metal oxide230band the metal oxide230c, but also the effect of inhibiting diffusion of the constituent element contained in the metal oxide230cto the insulator250side can be expected. Specifically, the metal oxide230chas a stacked-layer structure in which the upper layer is an oxide that does not contain In, whereby the diffusion of In to the insulator250side can be inhibited. Since the insulator250functions as a gate insulator, the transistor has defects in characteristics when In diffuses. Thus, the metal oxide230chaving a stacked-layer structure allows a highly reliable display device to be provided.

When the conductor242is provided in contact with the metal oxide230, the oxygen concentration of the metal oxide230in the vicinity of the conductor242sometimes decreases. In addition, a metal compound layer that contains the metal contained in the conductor242and the component of the metal oxide230is sometimes formed in the metal oxide230in the vicinity of the conductor242. In such cases, the carrier density of the region in the metal oxide230in the vicinity of the conductor242increases, and the region becomes a low-resistance region.

Here, the region between the conductor242aand the conductor242bis formed to overlap with the opening of the insulator280. Accordingly, the conductor260can be formed in a self-aligned manner between the conductor242aand the conductor242b.

The insulator250functions as a gate insulator. The insulator250is preferably placed in contact with the top surface of the metal oxide230c. For the insulator250, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine is added, silicon oxide to which carbon is added, silicon oxide to which carbon and nitrogen are added, or porous silicon oxide can be used. In particular, silicon oxide and silicon oxynitride, which are thermally stable, are preferable.

As in the insulator224, the concentration of impurities such as water or hydrogen in the insulator250is preferably reduced. The thickness of the insulator250is preferably greater than or equal to 1 nm and less than or equal to 20 nm.

A metal oxide may be provided between the insulator250and the conductor260. The metal oxide preferably inhibits oxygen diffusion from the insulator250into the conductor260. Accordingly, oxidation of the conductor260due to oxygen in the insulator250can be inhibited.

The metal oxide functions as part of the gate insulator in some cases. Therefore, when silicon oxide, silicon oxynitride, or the like is used for the insulator250, a metal oxide that is a high-k material with a high dielectric constant is preferably used as the metal oxide. When the gate insulator has a stacked-layer structure of the insulator250and the metal oxide, the stacked-layer structure can be thermally stable and have a high dielectric constant. Accordingly, a gate potential applied during operation of the transistor can be lowered while the physical thickness of the gate insulator is maintained. In addition, the equivalent oxide thickness (EOT) of the insulator functioning as the gate insulator can be reduced.

Specifically, a metal oxide containing one kind or two or more kinds selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium, and the like can be used. It is preferable to use an insulator containing an oxide of one or both of aluminum and hafnium, such as aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate), in particular.

Although the conductor260is illustrated to have a two-layer structure inFIG.22, the conductor260may have a single-layer structure or a stacked-layer structure of three or more layers.

For the conductor260a, it is preferable to use the aforementioned conductor having a function of inhibiting diffusion of impurities such as a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, a nitrogen oxide molecule (e.g., N2O, NO, and NO2), and a copper atom. Alternatively, it is preferable to use a conductive material having a function of inhibiting diffusion of oxygen (e.g., at least one of an oxygen atom and an oxygen molecule).

When the conductor260ahas a function of inhibiting diffusion of oxygen, it is possible to inhibit reduction of the conductivity due to oxidation of the conductor260bby oxygen contained in the insulator250. As a conductive material having a function of inhibiting oxygen diffusion, for example, tantalum, tantalum nitride, ruthenium, or ruthenium oxide is preferably used.

A conductive material containing tungsten, copper, or aluminum as its main component is preferably used for the conductor260b. The conductor260also functions as a wiring and thus is preferably formed using a conductor having high conductivity. For example, a conductive material containing tungsten, copper, or aluminum as its main component can be used. The conductor260bmay have a stacked-layer structure, for example, a stacked-layer structure of titanium or titanium nitride and the above conductive material.

As illustrated inFIG.22AandFIG.22C, the side surface of the metal oxide230is covered with the conductor260in a region where the metal oxide230bdoes not overlap with the conductor242, that is, the channel formation region of the metal oxide230. Accordingly, electric fields of the conductor260having a function of the first gate electrode are likely to act on the side surface of the metal oxide230. Thus, the on-state current of the transistor70can be increased and the frequency characteristics can be improved.

The insulator254, like the insulator214and the like, preferably functions as a barrier insulating film that inhibits the entry of impurities such as water or hydrogen into the transistor70from the insulator280side. The insulator254preferably has a lower hydrogen permeability than the insulator224, for example. Furthermore, as illustrated inFIG.22BandFIG.22C, the insulator254is preferably in contact with the side surface of the metal oxide230c, the top and side surfaces of the conductor242a, the top and side surfaces of the conductor242b, the side surfaces of the metal oxide230aand the metal oxide230b, and the top surface of the insulator224. Such a structure can inhibit the entry of hydrogen contained in the insulator280into the metal oxide230through the top surfaces or side surfaces of the conductor242a, the conductor242b, the metal oxide230a, the metal oxide230b, and the insulator224.

Furthermore, it is preferable that the insulator254have a function of inhibiting diffusion of oxygen (e.g., at least one of an oxygen atom and an oxygen molecule) (it is preferable that the oxygen be less likely to pass through the insulator254). For example, the insulator254preferably has lower oxygen permeability than the insulator280or the insulator224.

The insulator254is preferably deposited by a sputtering method. When the insulator254is deposited by a sputtering method in an oxygen-containing atmosphere, oxygen can be added to the vicinity of a region of the insulator224that is in contact with the insulator254. Thus, oxygen can be supplied from the region to the metal oxide230through the insulator224. Here, with the insulator254having a function of inhibiting upward diffusion of oxygen, oxygen can be prevented from diffusing from the metal oxide230into the insulator280. Moreover, with the insulator222having a function of inhibiting downward diffusion of oxygen, oxygen can be prevented from diffusing from the metal oxide230to the substrate side. In the above manner, oxygen is supplied to the channel formation region of the metal oxide230. Accordingly, oxygen vacancies in the metal oxide230can be reduced, so that the transistor can be prevented from having normally-on characteristics.

As the insulator254, an insulator containing an oxide of one or both of aluminum and hafnium is preferably deposited, for example. Note that as the insulator containing an oxide of one or both of aluminum and hafnium, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like is preferably used.

The insulator224, the insulator250, and the metal oxide230are covered with the insulator254having a barrier property against hydrogen, whereby the insulator280is isolated from the insulator224, the metal oxide230, and the insulator250by the insulator254. This can inhibit the entry of impurities such as hydrogen from outside of the transistor70, resulting in favorable electrical characteristics and high reliability of the transistor70.

The insulator280is provided over the insulator224, the metal oxide230, and the conductor242with the insulator254therebetween. The insulator280preferably includes, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon oxide to which fluorine is added, silicon oxide to which carbon is added, silicon oxide to which carbon and nitrogen are added, or porous silicon oxide. In particular, silicon oxide and silicon oxynitride are preferable because they are thermally stable. In particular, materials such as silicon oxide, silicon oxynitride, and porous silicon oxide are preferably used, in which case a region containing oxygen to be released by heating can be easily formed.

The concentration of impurities such as water or hydrogen in the insulator280is preferably reduced. In addition, the top surface of the insulator280may be planarized.

Like the insulator214and the like, the insulator274preferably functions as a barrier insulating film that inhibits the entry of impurities such as water or hydrogen into the insulator280from the above. As the insulator274, for example, the insulator that can be used as the insulator214, the insulator254, and the like can be used.

The insulator281functioning as an interlayer film is preferably provided over the insulator274. As in the insulator224or the like, the concentration of impurities such as water or hydrogen in the insulator281is preferably reduced.

The conductor240aand the conductor240bare placed in openings formed in the insulator281, the insulator274, the insulator280, and the insulator254. The conductor240aand the conductor240bare placed to face each other with the conductor260therebetween. Note that the top surfaces of the conductor240aand the conductor240bmay be on the same plane as the top surface of the insulator281.

The insulator241ais provided in contact with the inner walls of the openings in the insulator281, the insulator274, the insulator280, and the insulator254, and the first conductor of the conductor240ais formed in contact with the side surface of the insulator241a. The conductor242ais positioned on at least part of the bottom portion of the opening, and the conductor240ais in contact with the conductor242a. Similarly, the insulator241bis provided in contact with the inner walls of the openings in the insulator281, the insulator274, the insulator280, and the insulator254, and the first conductor of the conductor240bis formed in contact with the side surface of the insulator241b. The conductor242bis positioned on at least part of the bottom portion of the opening, and the conductor240bis in contact with the conductor242b.

The conductor240aand the conductor240bare preferably formed using a conductive material containing tungsten, copper, or aluminum as its main component. The conductor240aand the conductor240bmay have a stacked-layer structure.

In the case where the conductor240has a stacked-layer structure, the aforementioned conductor having a function of inhibiting diffusion of impurities such as water or hydrogen is preferably used as the conductor in contact with the metal oxide230a, the metal oxide230b, the conductor242, the insulator254, the insulator280, the insulator274, and the insulator281. For example, tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, ruthenium oxide, or the like is preferably used. The conductive material having a function of inhibiting diffusion of impurities such as water or hydrogen can be used as a single layer or a stacked layer. The use of the conductive material can inhibit oxygen added to the insulator280from being absorbed by the conductor240aand the conductor240b. Moreover, impurities such as water or hydrogen can be inhibited from entering the metal oxide230through the conductor240aand the conductor240bfrom a layer above the insulator281.

As the insulator241aand the insulator241b, for example, the insulator that can be used as the insulator254or the like can be used. Since the insulator241aand the insulator241bare provided in contact with the insulator254, impurities such as water or hydrogen in the insulator280or the like can be inhibited from entering the metal oxide230through the conductor240aand the conductor240b. Furthermore, oxygen contained in the insulator280can be inhibited from being absorbed by the conductor240aand the conductor240b.

Although not illustrated, a conductor functioning as a wiring may be placed in contact with the top surface of the conductor240aand the top surface of the conductor240b. For the conductor functioning as a wiring, a conductive material containing tungsten, copper, or aluminum as its main component is preferably used. Furthermore, the conductor may have a stacked-layer structure and may be a stack of titanium or a titanium nitride and the above conductive material, for example. Note that the conductor may be formed to be embedded in an opening provided in an insulator.

The EL layer23included in the light-emitting element20can be formed of a plurality of layers such as a layer4420, a light-emitting layer4411, and a layer4430, as illustrated inFIG.23A. The layer4420can include, for example, a layer containing a substance having a high electron-injection property (an electron-injection layer) and a layer containing a substance having a high electron-transport property (an electron-transport layer). The light-emitting layer4411contains a light-emitting compound, for example. The layer4430can include, for example, a layer containing a substance having a high hole-injection property (a hole-injection layer) and a layer containing a substance having a high hole-transport property (a hole-transport layer).

The structure including the layer4420, the light-emitting layer4411, and the layer4430, which is provided between a pair of electrodes, can serve as a single light-emitting unit, and the structure inFIG.23Ais referred to as a single structure in this specification.

FIG.23Bis a variation example of the EL layer23included in the light-emitting element20illustrated inFIG.23A. Specifically, the light-emitting element20illustrated inFIG.23Bincludes a layer4430-1over the lower electrode21, a layer4430-2over the layer4430-1, the light-emitting layer4411over the layer4430-2, a layer4420-1over the light-emitting layer4411, a layer4420-2over the layer4420-1, and the upper electrode25over the layer4420-2. For example, when the lower electrode21is an anode and the upper electrode25is a cathode, the layer4430-1functions as a hole-injection layer, the layer4430-2functions as a hole-transport layer, the layer4420-1functions as an electron-transport layer, and the layer4420-2functions as an electron-injection layer. Alternatively, when the lower electrode21is a cathode and the upper electrode25is an anode, the layer4430-1functions as an electron-injection layer, the layer4430-2functions as an electron-transport layer, the layer4420-1functions as a hole-transport layer, and the layer4420-2functions as a hole-injection layer. With such a layer structure, carriers can be efficiently injected to the light-emitting layer4411, and the efficiency of the recombination of carriers in the light-emitting layer4411can be enhanced.

Note that the structure in which a plurality of light-emitting layers (the light-emitting layer4411, a light-emitting layer4412, and a light-emitting layer4413) are provided between the layer4420and the layer4430as illustrated inFIG.23Cis a variation of the single structure.

The structure in which a plurality of light-emitting units (an EL layer23aand an EL layer23b) are connected in series with an intermediate layer (charge-generation layer)4440therebetween as illustrated inFIG.23Dis referred to as a tandem structure in this specification. In this specification and the like, the structure illustrated inFIG.23Dis referred to as a tandem structure; however, without being limited to this, a tandem structure may be referred to as a stack structure, for example. The tandem structure enables a light-emitting element capable of high luminance light emission.

Also inFIG.23CandFIG.23D, the layer4420and the layer4430may each have a stacked-layer structure of two or more layers as illustrated inFIG.23B.

In the case where the single structure, the tandem structure, and the SBS structure described above are compared with each other, the manufacturing processes of the single structure and the tandem structure are simpler than that of the SBS structure. This can achieve low manufacturing cost and high yield of the display device of one embodiment of the present invention. Accordingly, the display device of one embodiment of the present invention can be inexpensive. Meanwhile, the SBS structure, the tandem structure, and the single structure can have lower power consumption in this order. Thus, to reduce power consumption of the display device of one embodiment of the present invention, the SBS structure is preferably employed.

The emission color of the light-emitting element20can be red, green, blue, cyan, magenta, yellow, white, or the like depending on the material that constitutes the EL layer23. Furthermore, the color purity can be further increased when the light-emitting element20has a microcavity structure.

The light-emitting element that emits white light preferably contains two or more kinds of light-emitting substances in the light-emitting layer. To obtain white light emission, two or more kinds of light-emitting substances are selected such that their emission colors are complementary.

The light-emitting layer preferably contains two or more kinds selected from light-emitting substances that emit light of R (red), G (green), B (blue), Y (yellow), O (orange), and the like.

At least part of this embodiment can be implemented in combination with the other embodiments or examples described in this specification as appropriate.

Described in this embodiment is a metal oxide that can be used in an OS transistor described in the above embodiment.

<Classification of Crystal Structures>

First, the classification of crystal structures of an oxide semiconductor is described with reference toFIG.24A.FIG.24Ais a diagram showing classification of crystal structures of an oxide semiconductor, typically IGZO (a metal oxide containing In, Ga, and Zn).

As shown inFIG.24A, an oxide semiconductor is roughly classified into “Amorphous”, “Crystalline”, and “Crystal”. The term “Amorphous” includes completely amorphous. The term “Crystalline” includes CAAC (c-axis-aligned crystalline), nc (nanocrystalline), and CAC (cloud-aligned composite). Note that the term “Crystalline” excludes single crystal, poly crystal, and completely amorphous (excluding single crystal and poly crystal). The term “Crystal” includes single crystal and poly crystal.

Note that the structures in the thick frame inFIG.24Aare in an intermediate state between “Amorphous” and “Crystal”, and belong to a new crystalline phase. That is, these structures are completely different from “Amorphous”, which is energetically unstable, and “Crystal”.

A crystal structure of a film or a substrate can be analyzed with an X-ray diffraction (XRD) spectrum.FIG.24Bshows an XRD spectrum, which is obtained using GIXD (Grazing-Incidence XRD) measurement, of a CAAC-IGZO film classified into “Crystalline”. InFIG.24B, the horizontal axis represents 20 [deg.], and the vertical axis represents Intensity [a.u.]. Note that a GIXD method is also referred to as a thin film method or a Seemann-Bohlin method. The XRD spectrum that is shown inFIG.24Band obtained by GIXD measurement is hereinafter simply referred to as an XRD spectrum. The CAAC-IGZO film inFIG.24Bhas a composition in the vicinity of In:Ga:Zn=4:2:3 [atomic ratio]. The CAAC-IGZO film inFIG.24Bhas a thickness of 500 nm.

InFIG.24B, the horizontal axis represents 20 [deg.], and the vertical axis represents intensity [a.u.]. As shown inFIG.24B, a clear peak indicating crystallinity is detected in the XRD spectrum of the CAAC-IGZO film. Specifically, a peak indicating c-axis alignment is detected at20around 31° in the XRD spectrum of the CAAC-IGZO film. As shown inFIG.24B, the peak at20around 31° is asymmetric with respect to the axis of the angle at which the peak intensity is detected.

A crystal structure of a film or a substrate can be evaluated with a diffraction pattern obtained by a nanobeam electron diffraction (NBED) method (such a pattern is also referred to as a nanobeam electron diffraction pattern).FIG.24Cshows a diffraction pattern of a CAAC-IGZO film.FIG.24Cshows a diffraction pattern obtained with the NBED method in which an electron beam is incident in the direction parallel to the substrate. The CAAC-IGZO film inFIG.24Chas a composition in the vicinity of In:Ga:Zn=4:2:3 [atomic ratio]. In the nanobeam electron diffraction method, electron diffraction is performed with a probe diameter of 1 nm.

As shown inFIG.24C, a plurality of spots indicating c-axis alignment are observed in the diffraction pattern of the CAAC-IGZO film.

Here, the above-described CAAC-OS, nc-OS, and a-like OS are described in detail.

Note that each of the plurality of crystal regions is formed of one or more fine crystals (crystals each of which has a maximum diameter of less than 10 nm). In the case where the crystal region is formed of one fine crystal, the maximum diameter of the crystal region is less than 10 nm. In the case where the crystal region is formed of a large number of fine crystals, the size of the crystal region may be approximately several tens of nanometers.

In the case of an In-M-Zn oxide (the element M is one or more kinds selected from aluminum, gallium, yttrium, tin, titanium, and the like), the CAAC-OS tends to have a layered crystal structure (also referred to as a layered structure) in which layers containing indium (In) and oxygen (hereinafter In layers) and layers containing the element M, zinc (Zn), and oxygen (hereinafter (M,Zn) layers) are stacked. Indium and the element M can be replaced with each other. Therefore, indium may be contained in the (M,Zn) layer. In addition, the element M may be contained in the In layer. Note that Zn may be contained in the In layer. Such a layered structure is observed as a lattice image in a high-resolution TEM image, for example.

The CAAC-OS is an oxide semiconductor with high crystallinity in which no clear grain boundary is observed. Thus, in the CAAC-OS, a reduction in electron mobility due to the grain boundary is unlikely to occur. Moreover, since the crystallinity of an oxide semiconductor might be decreased by entry of impurities, formation of defects, and the like, the CAAC-OS can be regarded as an oxide semiconductor that has small amounts of impurities or defects (e.g., oxygen vacancies). Thus, an oxide semiconductor including the CAAC-OS is physically stable. Therefore, the oxide semiconductor including the CAAC-OS is resistant to heat and has high reliability. In addition, the CAAC-OS is stable with respect to high temperature in the manufacturing process (what is called thermal budget). Accordingly, the use of the CAAC-OS for an OS transistor can extend the degree of freedom of the manufacturing process.

Next, the above-described CAC-OS is described in detail. Note that the CAC-OS relates to the material composition.

Here, the atomic ratios of In, Ga, and Zn to the metal elements contained in the CAC-OS in an In—Ga—Zn oxide are denoted with [In], [Ga], and [Zn], respectively. For example, the first region in the CAC-OS in the In—Ga—Zn oxide has [In] higher than that in the composition of the CAC-OS film. Moreover, the second region has [Ga] higher than that in the composition of the CAC-OS film. As another example, the first region has higher [In] and lower [Ga] than the second region. Moreover, the second region has higher [Ga] and lower [In] than the first region.

Specifically, the first region includes indium oxide, indium zinc oxide, or the like as its main component. The second region includes gallium oxide, gallium zinc oxide, or the like as its main component. That is, the first region can be referred to as a region containing In as its main component. The second region can be referred to as a region containing Ga as its main component.

For example, energy dispersive X-ray spectroscopy (EDX) is used to obtain EDX mapping, and according to the EDX mapping, the CAC-OS in the In—Ga—Zn oxide has a structure in which the region containing In as its main component (the first region) and the region containing Ga as its main component (the second region) are unevenly distributed and mixed.

In the case where the CAC-OS is used for a transistor, a switching function (on/off switching function) can be given to the CAC-OS owing to the complementary action of the conductivity derived from the first region and the insulating property derived from the second region. That is, the CAC-OS has a conducting function in part of the material and has an insulating function in another part of the material; as a whole, the CAC-OS has a function of a semiconductor. Separation of the conducting function and the insulating function can maximize each function. Accordingly, when the CAC-OS is used for a transistor, a high on-state current (Ion), high field-effect mobility (μ), and an excellent switching operation can be achieved.

An oxide semiconductor has various structures with different properties. Two or more kinds among the amorphous oxide semiconductor, the polycrystalline oxide semiconductor, the a-like OS, the CAC-OS, the nc-OS, and the CAAC-OS may be included in an oxide semiconductor of one embodiment of the present invention.

Next, the case where the above oxide semiconductor is used for a transistor is described.

When the above oxide semiconductor is used for a transistor, a transistor with high field-effect mobility can be achieved. In addition, a transistor having high reliability can be achieved.

A highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a low density of defect states and thus has a low density of trap states in some cases.

Accordingly, in order to obtain stable electrical characteristics of a transistor, reducing the impurity concentration in an oxide semiconductor is effective. In order to reduce the impurity concentration in the oxide semiconductor, it is preferable that the impurity concentration in an adjacent film be also reduced. Examples of impurities include hydrogen, nitrogen, an alkali metal, an alkaline earth metal, iron, nickel, and silicon.

Here, the influence of each impurity in the oxide semiconductor is described.

When the oxide semiconductor contains nitrogen, the oxide semiconductor easily becomes n-type because of generation of electrons serving as carriers and an increase in carrier concentration. As a result, a transistor using an oxide semiconductor containing nitrogen as a semiconductor is likely to have normally-on characteristics. When nitrogen is contained in the oxide semiconductor, a trap state is sometimes formed. This might make the electrical characteristics of the transistor unstable. Therefore, the concentration of nitrogen in the oxide semiconductor, which is obtained using SIMS, is set lower than 5×1019atoms/cm3, preferably lower than or equal to 5×1018atoms/cm3, further preferably lower than or equal to 1×1018atoms/cm3, still further preferably lower than or equal to 5×1017atoms/cm3.

At least part of this embodiment can be implemented in combination with the other embodiments or examples described in this specification as appropriate.

In this embodiment, electronic devices each including a display device of one embodiment of the present invention are described.

FIG.25Ais a diagram illustrating the appearance of a head-mounted display8200.

The head-mounted display8200includes a mounting portion8201, a lens8202, a main body8203, a display portion8204, a cable8205, and the like. A battery8206is incorporated in the mounting portion8201.

The cable8205supplies electric power from the battery8206to the main body8203. The main body8203includes, for example, a wireless receiver, and can display, for example, an image corresponding to the received image data or the like on the display portion8204. The movement of the eyeball or the eyelid of the user is captured by a camera provided in the main body8203and then coordinates of the sight line of the user are calculated using the information to utilize the sight line of the user as an input means.

A plurality of electrodes may be provided in the mounting portion8201at a position in contact with the user. The main body8203may have a function of sensing current flowing through the electrodes along with the movement of the user's eyeball to recognize the user's sight line. The main body8203may have a function of sensing current flowing through the electrodes to monitor the user's pulse. The mounting portion8201may include various sensors such as a temperature sensor, a pressure sensor, and an acceleration sensor to have a function of displaying the user's biological information on the display portion8204. The main body8203may sense, for example, the movement of the user's head to change an image displayed on the display portion8204in synchronization with the movement.

The display device of one embodiment of the present invention can be used in the display portion8204. Thus, a high-quality image can be displayed on the display portion8204.

FIG.25B,FIG.25C, andFIG.25Dare diagrams illustrating the appearance of a head-mounted display8300. The head-mounted display8300includes a housing8301, a display portion8302, a band-shaped fixing unit8304, and a pair of lenses8305. A battery8306is incorporated in the housing8301, and electric power can be supplied from the battery8306to, for example, the display portion8302.

The user can see display on the display portion8302through the lenses8305. It is suitable that the display portion8302be curved and placed. When the display portion8302is curved and placed, the user can feel a high realistic sensation. Note that although the structure in which one display portion8302is provided is described in this embodiment as an example, the structure is not limited thereto, and a structure in which two display portions8302are provided may also be employed. In that case, one display portion is placed for one eye of the user, so that three-dimensional display using parallax is possible, for example.

The display device of one embodiment of the present invention can be used in the display portion8302. Thus, a high-quality image can be displayed on the display portion8302.

Next,FIG.26AandFIG.26Billustrate examples of electronic devices that are different from the electronic devices illustrated inFIG.25AtoFIG.25D.

The electronic devices illustrated inFIG.26AandFIG.26Bhave a variety of functions. Examples include a function of displaying a variety of information (a still image, a moving image, a text image, and the like) on the display portion, a touch panel function, a function of displaying a calendar, date, time, and the like, a function of controlling processing with a variety of software (programs), a wireless communication function, a function of being connected to a variety of computer networks with a wireless communication function, a function of transmitting and receiving a variety of data with a wireless communication function, and a function of reading out a program or data stored in a memory medium and displaying it on the display portion. Note that functions that the electronic devices illustrated inFIG.26AandFIG.26Bcan have are not limited thereto, and the electronic devices can have a variety of functions. Although not illustrated inFIG.26AandFIG.26B, the electronic devices may each include a plurality of display portions. The electronic devices may each include a camera and the like and have a function of taking a still image, a function of taking a moving image, a function of storing the taken image in a memory medium (external or incorporated in the camera), a function of displaying the taken image on the display portion, and the like.

The details of the electronic devices illustrated inFIG.26AandFIG.26Bare described below.

FIG.26Ais a perspective view illustrating a portable information terminal9101. The portable information terminal9101has one or more functions selected from a telephone set, a notebook, an information browsing device, and the like, for example. Specifically, the portable information terminal9101can be used as a smartphone. The portable information terminal9101can display characters or an image on its plurality of surfaces. For example, three operation buttons9050(also referred to as operation icons, or simply icons) can be displayed on one surface of the display portion9001. Furthermore, information9051indicated by dashed rectangles can be displayed on another surface of the display portion9001. Note that examples of the information9051include display indicating reception of an e-mail, an SNS (social networking service), a telephone call, and the like, the title of an e-mail, an SNS, or the like, the sender of an e-mail, an SNS, or the like, date, time, remaining battery, and reception strength of an antenna. Alternatively, the operation buttons9050or the like may be displayed on the position where the information9051is displayed, in place of the information9051.

The display device of one embodiment of the present invention can be used in the portable information terminal9101. Thus, a high-quality image can be displayed on the display portion9001.

FIG.26Bis a perspective view illustrating a watch-type portable information terminal9200. The portable information terminal9200is capable of executing a variety of applications such as mobile phone calls, e-mailing, reading and editing texts, music reproduction, Internet communication, and computer games. The display surface of the display portion9001is curved and provided, and display can be performed along the curved display surface.FIG.26Billustrates an example in which time9251, operation buttons9252(also referred to as operation icons or simply icons), and a content9253are displayed on the display portion9001. The content9253can be a moving image, for example.

The portable information terminal9200can perform near field communication conformable to a communication standard. For example, mutual communication between the portable information terminal9200and a headset capable of wireless communication enables hands-free calling. The portable information terminal9200includes the connection terminal9006, and data can be directly transmitted to and received from another information terminal via a connector. Power charging through the connection terminal9006is also possible. Note that the charging operation may be performed by wireless power feeding without through the connection terminal9006.

The display device of one embodiment of the present invention can be used in the portable information terminal9200. Thus, a high-quality image can be displayed on the display portion9001.

At least part of this embodiment can be implemented in combination with the other embodiments or examples described in this specification as appropriate.

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