In one embodiment, a non-dispersive phase shifter includes a composite right- and left-handed (CRLH) circuit that can be toggled between a first phase delay state and a second phase delay state with a substantially constant phase shift over a range of frequencies.

BACKGROUND

Microwave phase shifters are radio frequency (RF) circuit networks that are used to introduce variable phase delays to RF signals. Their most important application is phased array systems that are typically constructed as one-dimensional or two-dimensional periodic arrangements of multiple individual antenna elements integrated with microwave phase shifters. These systems can electronically steer the direction of maximum or minimum radiation by utilizing the phase shifters to adjust the phase delays between the waves emitted from the individual antenna elements. Therefore, microwave phase shifters play a key role for the cost, efficiency, gain, and bandwidth performance of such phased array systems.

A significant problem related to the design of microwave phase shifters is achieving designs that can provide a constant phase shift over a broad frequency range while maintaining excellent impedance match in each state of the phase shifter. In addition, maintaining the component size and keeping its insertion loss low are also design challenges.

DETAILED DESCRIPTION

As described above, a significant problem related to the design of microwave phase shifters is achieving designs that can provide a constant phase shift over a broad frequency range while maintaining excellent impedance match in all states of the phase shifter. Disclosed herein are microwave phase shifters that provide a substantially constant phase shift while also achieving a very small footprint and low insertion loss. In some embodiments, the operational and design principles of the phase shifters are based on lumped circuit models that provide dispersion properties of composite right- and left-handed transmission lines (also referred to as CRLH metamaterials). The phase shifting is accomplished by switching from a first (e.g., low) phase delay state to a second (e.g., high) phase delay state in a manner in which both the inductances and capacitances of the phase shifter circuit are simultaneously changed.

In the following disclosure, various specific embodiments are described. It is to be understood that those embodiments are example implementations of the disclosed inventions and that alternative embodiments are possible. All such embodiments are intended to fall within the scope of this disclosure.

Engineered metamaterials are often constructed from periodic arrangements of ordinary materials or circuit components and exhibit unique electromagnetic properties that are not found in any of their individual constituents. An important application of such structures is RF circuit miniaturization as their dispersion (K-ω) diagrams can be tailored to reduce phase velocity or even reverse it in some frequency regions. In this context, CRLH metamaterials have drawn strong interest because their unit cells can be conveniently constructed from reactively loaded microstrip line segments.

FIGS. 1A and 1Brespectively depict a general lumped element circuit model of a balanced CRLH unit cell and its representative dispersion (K-ω) diagram. The circuit model comprises a conventional transmission line TL that includes a series inductor LRand a shunt capacitor CR. A series capacitor CLand shunt inductor LLare added to the circuit to generate a frequency region capable of supporting backward waves with opposite group and phase velocities (i.e., left-handed propagation). The unit cell is essentially a band-pass circuit with lower and higher cut-off frequencies that are determined by the products of the left-handed (LL, CL) and right-handed (LR, CR) loads, respectively. As demonstrated inFIG. 1B, the transition from left-handed to right-handed (i.e., parallel phase and group velocity) frequency bands can be accomplished without observing a band gap around the K=0 frequency (ω0) when the CRLH unit cell is designed to be “balanced” by satisfying the ratio LLCR=LRCL. In such a balanced CRLH configuration, the Bloch impedance (i.e., characteristic impedance if Δz=p is a small fraction of wavelength) is simply given by the ratio (LR/CR)1/2=(LL/CL)1/2at K=0 and can be matched to a conventional TL over a broad range of frequencies. Due to the inclusion of the left-handed loads, practical implementations of CRLH unit cells can deliver K=0 phase delay with a much smaller physical size as compared to the conventional TL configurations that require a delay line with K=27 phase shift. Consequently, various phase delays can be realized with miniature structures within the vicinity of ω0to design compact phase shifters and resonant antennas.

For tunable phase shifter applications, the CRLH unit cell presents a unique design opportunity to maintain a broadband constant phase difference between different circuit states. To demonstrate this concept,FIG. 2Apresents a representative dispersion diagram of a two-state phase shifter implemented with CRLH unit cells. The phase shifter is switched from States 1 to 2 by simultaneously varying all values (i.e., L and C) of the series and shunt circuit components. As such, the circuit parameters of State 2 are optimized to maintain a near-identical slope to that of State 1 over a broad frequency band while attaining the same characteristic impedance to provide equal return loss performance. Because of the nearly identical slopes, the phase difference Δφ between the two states is nearly constant over a wide frequency range, essentially providing a broadband non-dispersive microwave phase shifter. On the other hand, as depicted inFIG. 2B, conventional slow-wave structures fail to provide constant phase variation Δφ due to the swift variation in K-ω slope as the phase shifting state is changed, thereby resulting in a dispersive microwave phase shifter.

Recently, techniques have been proposed to develop broadband non-dispersive (or self-compensating) phase shifters. In one such technique, a conventional delay line was combined with an unequal-width, equal-length line to achieve a 49% bandwidth around 30 GHz. However, the presence of conventional delay lines makes the length of the structure considerably large (˜7 mm) for a 45° phase shifter. In another case, a phase shifter topology was proposed that combines open and short-ended stubs, but the phase variation and impedance matching performances were degraded. More recently, it has been proposed to use CRLH unit cells integrated with MEMS switches to realize broadband phase shifters. Nevertheless, all these studies have been limited to varying only the value of the series capacitance CL, thereby resulting in narrow band components.

The disclosed phase shifters alleviate the above issues by integrating the CRLH unit cells with MEMS capacitors to enable simultaneous tuning of all the capacitive and inductive loads. The disclosed phase shifters are the first truly miniature, broadband, impedance-matched, and non-dispersive phase shifters that operate at microwave frequencies. Described below are examples of such phase shifters that are specifically designed for the Ka-band. It is noted, however, that this band is cited only as an example and that the disclosed phase shifters are not limited to that band.

FIG. 3illustrates an Advanced Design Systems (ADS) lumped element circuit model of an ideal non-dispersive CRLH unit cell optimized to operate as a 45° phase shifter from 20 to 30 GHz with minimal phase variation and good impedance match. The low-value state is shown in the top of the figure and the high-value state is shown in the bottom of the figure. Element values for the various components of the circuit (in both the low and high states) are given a table beneath the circuit model in units of pF and nH.

A particular goal of the optimization of the CRLH unit cell ofFIG. 3was to keep the return loss well above 20 dB in the 24.5 to 27 GHz band (as was requested in a proposal solicitation). As mentioned above, each state (State 1 being the low value and State 2 being the high value) is provided using a series LC-shunt LC circuit in which the high-pass (C1-L1, LH parameters) and low-pass (L2-C2, RH parameters) responses are embedded. In the optimized 45° unit cell ofFIG. 3, each element in the high-value state circuit is 2.5× the value of the corresponding element in the low-value state. This exact ratio resulted from the stringent constraint placed on each LC pair to satisfy the property (Lx/Cx)0.5=50 so that a good impedance match in both states can be maintained.

The simulated reflection coefficient S11and phase shift in the 20 to 30 GHz band for the CRLH unit cell ofFIG. 3are respectively shown inFIGS. 4A and 4B. These figures indicate a greater than 20 dB return loss from 24.5 to 27 GHz with a phase variation of approximately ±0.1°. This suggests that a greater than 90° phase shift can also be achieved from the presented equivalent circuit while maintaining a return loss greater than 20 dB in both states. It is also important to note that the example 45° CRLH unit cell can operate with greater than approximately ±1° phase variation over a very wide frequency range (i.e., 20 to 30 GHz) if the constraint on the return loss is relaxed to 15 dB. Similarly, relaxing the constraint on phase variation to (e.g.)<±2.5° can enable greater than a 20 dB return loss over a much broader frequency range.

As described above, the CRLH unit cell comprises two LC sections (series and shunt), each of which having two states depending on the desired state of the phase shifter. There are multiple ways in which the low-value and high-value states of the unit cell can be realized. In a first approach, separate and complete low- and high-value circuits (as illustrated inFIG. 3) can be used that are selected using a switch, such as a single-pull, double-throw (SPDT) RF MEM switch, at each end. In a second approach, a single series LC section that is switchable between two states can be combined with separate and complete shunt LC sections that are selected for each state (or the complement of this approach with separate series LC sections and a single, switchable shunt LC section). In a third approach, single series and shunt LC sections, each of which is switchable between two states, can be used.

Examples of the first and third approaches are detailed below. Of the three approaches, the third approach typically provides the design with the smallest footprint. The first and second approaches are straightforward modifications of the third approach and can be more advantageous depending on the design rules established by the manufacturers.

The miniature series LC section of the phase shifter circuit can be realized using lumped capacitors (metal-insulator-metal (MIM) or interdigital) and short sections of transmission line (t-line) to provide the necessary inductance. An example microstrip series LC section circuit10is shown inFIGS. 5A and 5B, which illustrate the low-value state and the high-value state, respectively. In the low-value state shown inFIG. 5A, the RF signal travels across the top of the structure through the series combination of first and second MIM capacitors12and14(net capacitance value of 0.2 pF), a first MEMS switch16, and the short t-line section18(0.08 nH). In the high-value state shown inFIG. 5B, however, RF signal travels through a lower loop20(0.2 nH) of the circuit10, a second MEMS switch22, and only the second MIM capacitor14(net capacitance of 0.5 pF). The MEMS switches16and22are used to toggle the circuit10between the two states. A simulation of the circuit10was performed using parasitic models for the capacitors12,14and transmission lines, as well as for the MEMS switches16,22(1.0 pF with 0.15 dB insertion loss in the down-state and 0.01 pF in the up-state). The total footprint for the switchable series LC section circuit10was approximately 200×200 μm2. The contact areas of the employed MEMS switches16,22were chosen to be in the range of 50×50 μm2to 70×70 μm2for the mechanical modeling and switching time simulations.

A performance comparison between the ideal circuit ofFIG. 3and the circuit layout shown inFIGS. 5A and 5Bis provided inFIGS. 6A-6D. More particularly,FIGS. 6A and 6Bshow the simulated S11performance for the low- and high-value states for the circuits (FIG. 3circuit in solid lines;FIG. 5circuit in dotted lines), respectively, whileFIGS. 6C and 6Dshow the simulated S21performance for the low- and high-value states for the circuits (FIG. 3circuit in solid lines;FIG. 5circuit in dotted lines), respectively. These graphs show excellent agreement between the two circuits.

The miniature shunt LC section of the phase shifter circuit can be realized using a spiral inductor, with the intrinsic shunt capacitance from the spiral combined with additional discrete capacitors in order to obtain the required LC combination. An example microstrip shunt LC section circuit30is shown inFIGS. 7A and 7B, which illustrate the low-value state and the high-value state, respectively. As shown in these figures, the circuit30comprises a spiral trace32and a MEMS switch34. In the high-value state shown inFIG. 7B, the circuit30behaves as a conventional spiral inductor, with the RF signal traversing the entire spiral trace32and exiting through a bridge36. In the low-value state shown inFIG. 7B, however, the MEMS switch34is closed and provides a shorter path to the center of the spiral trace32, effectively reducing the total inductance and capacitance of the section. A simulation for the layout model was performed using numerical electromagnetic simulation to capture all coupling effects.

Back-etching of the silicon beneath the spiral32(˜100 μm cavity depth) was assumed in order to minimize parasitic capacitance to ground. The total footprint for the shunt LC section circuit30was approximately 270×270 μm2. Based on the overall footprint, switches with contact areas in the range of 50×50 μm2to 70×70 μm2can be used to satisfy the needed performance metrics, such as the switching speed.

A comparison to the ideal circuit ofFIG. 3and the circuit layout shown inFIGS. 7A and 7Bis provided inFIGS. 8A-8D. More particularly,FIGS. 8A and 8Bshow the simulated S11performance for the low- and high-value states for the circuits (FIG. 3circuit in solid lines;FIG. 5circuit in dotted lines), respectively, whileFIGS. 8C and 8Dshow the simulated S21performance for the low- and high-value states for the circuits (FIG. 3circuit in solid lines;FIG. 5circuit in dotted lines), respectively.

FIG. 9illustrates the combined series-shunt LC section circuit40, which combines the circuit10shown inFIG. 5and the circuit30shown inFIG. 7and can be used as a 45° phase shifter. Assuming the dimensions identified above, the overall footprint of the circuit40is approximately 0.4×0.6 mm2. The simulated performance of the circuit is provided inFIGS. 10A and 10B, which show the simulated reflection coefficient S11and phase shift, respectively. The return loss in the low-value state is greater than 20 dB across the 24.5 to 27 GHz range, while further optimization of the shunt LC (spiral32) in the high-value state can be performed to fully comply with the return loss specification. The worst-case insertion loss predicted in the desired frequency band is approximately 0.35 dB. The variation in the phase shift is approximately ±0.5°.

A 4-bit (22.5°, 45°, 90°, and 180°) phase shifter can be realized by cascading multiple series LC-shunt LC sections. Circuit analysis using ideal equivalent circuit representations has been performed to determine the expected number of sections that are required for each bit, enforcing the conditions of greater than 20 dB return loss and less than ±1° variation about the nominal phase shift in the 24.5 to 27 GHz band. Like the 45° bit described above, a single series/shunt section is needed for the 22.5° bit. By reversing the order of the series and shunt combinations in selected sections and combining elements that are in series or parallel, the 90° and 180° bits can be realized using 1.5 and 2 series/shunt sections, respectively.

FIG. 11illustrates an example series-shunt LC section circuit50that can be used as one of the bits of a 4-bit phase shifter. As shown inFIG. 11, the circuit50is formed on a top surface of a substrate52that includes a ground plane54. Generally speaking, the circuit50includes a top path56that can be used in the low-value state and a bottom path58that can be used in the high-value state. An RF signal can be input into the circuit50on an input line60and output from the circuit50using an output line62. The path along which the signal travels depends upon the states of switches within the circuit50. When first and second switches64and66of the top path56are closed and third and fourth switches68and70of the bottom path58are open, as shown inFIG. 11, the signal travels along the top path56. However, when the first and second switches64,66are open and the third and fourth switches68,70are closed, the signal travels along the bottom path58.

The top path56includes a first bias network (comprising traces72and74) that is used to actuate the first switch64and a second bias network (comprising the traces76and78) that is used to actuate the second switch66. Between the two switches64,66are the components that form the series-shunt LC section of the top path56. These components are represented in the top lumped element circuit model ofFIG. 12. Connected to the first switch64is a trace80that is represented by the inductor L1and capacitor Cp1shown in the circuit model ofFIG. 12. Coupled to the trace80is a capacitor82, which is represented by the capacitor C1in the circuit model ofFIG. 12. Connected to the capacitor82by a further trace84is a spiral86, which is represented by the parallel inductor L2and capacitor C2in the circuit model ofFIG. 12. Extending from the spiral86is a further trace88, which is represented by the inductor Lp1and the capacitor Cp1in the circuit model ofFIG. 12. Finally, the top path56includes a further capacitor90that is represented by the capacitor Cbin the circuit model ofFIG. 12.

The bottom path58is similar to the top path56. Accordingly, the bottom path58includes a first bias network (comprising traces92and94) that is used to actuate the third switch68and a second bias network (comprising the traces96and98) that is used to actuate the fourth switch70. Between the two switches68,70are the components that form the series-shunt LC section of the bottom path58, which are represented in the bottom lumped element circuit model ofFIG. 12. Connected to the third switch68is a trace100that is represented by the inductor L3and capacitor Cp3shown in the circuit model ofFIG. 12. Coupled to the trace100is a capacitor102, which is represented by the capacitor C3in the circuit model ofFIG. 12. Connected to the capacitor102with a further trace104is a spiral106, which is presented by the parallel inductor L4and capacitor C4in the circuit model ofFIG. 12. Extending from the spiral106is a further trace108, which is represented by the inductor Lp2and the capacitor C0in the circuit model ofFIG. 12. Finally, the top path58includes a further capacitor110that is represented by the capacitor Cbin the circuit model ofFIG. 12.

Example values for each of the above-identified components of the top and bottom paths56,58when the circuit is optimized as a 45° phase shifter are shown in the table included inFIG. 12.

FIG. 13illustrates an example 4-bit phase shifter120that includes multiple series-shunt LC section circuits similar to that shown inFIG. 13. More particularly,FIG. 13illustrates a phase shifter120that includes a 22.5° bit122, a 45° bit124, a 90° bit126, and a 180° bit128, which are connected to each other in series on a high-resistivity substrate130. Each of the bits122-128is similar in layout to the circuit50shown inFIG. 11, although one notable difference is that the 180° bit includes two spirals on both the top and bottom paths of the circuit. By way of example, the phase shifter120can occupy an area no greater than approximately 2.5×2.88 mm2and the substrate can be approximately 60 μm thick.

Simulations were performed on the 4-bit phase shifter layout shown inFIG. 13and the results of these simulations are provided inFIGS. 14-17. More particularly,FIGS. 14,15,16, and17identify (A) the reflection (dB), (B) insertion loss (dB), (C) phase variation, and (D) amplitude imbalance (dB) for each of the 22.5° bit, 45° bit, 90° bit, and 180° bit, respectively. In these figures, the solid curves are for the top flow paths and the dashed curves are for the bottom flow paths.

It is noted that the phase shifter's low or high states can be implemented with the higher order CRLH circuits. The network can have a T-network shape, a7-network shape, or any possible cascades to enhance bandwidth and return loss.