Wiring board with built-in electronic component and method for manufacturing the same

A wiring board with a built-in electronic component includes a core substrate having a penetrating hole formed in the core substrate, an electronic component accommodated in the penetrating hole in the core substrate, a conductive pattern layer formed on a first surface of the core substrate and including a first conductive pattern and a second conductive pattern, and an interlayer insulation layer formed over the conductive pattern layer and the first surface of the core substrate. The second conductive pattern is formed adjacent to a periphery of the penetrating hole and contoured such that a sheet for positioning the electronic component in the penetrating hole is laminated horizontally with respect to the first surface of the core substrate over the penetrating hole.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention is related to a wiring board with a built-in electronic component in which an electronic component such as a semiconductor element is accommodated.

2. Discussion of the Background

In recent years, electronic devices have become more highly functional and compact. Accordingly, wiring boards mounted inside such electronic devices are further required to be highly functional and highly integrated.

For example, in Japanese Patent Laid-Open Publication 2002-246757, a method for manufacturing a multilayer printed wiring board is described as follows: a step to laminate a sheet such as a UV tape on the bottom of a penetrating hole formed in a core substrate; a step to mount a semiconductor element such as an IC chip on the sheet in such a way that its terminals contact the adhesive surface of the sheet; a step to fill resin in the penetrating hole; a step to cure the filled resin; a step to remove the sheet; and a step to form build-up layers on the top surface of the semiconductor element.

As shown inFIG. 13A, the UV tape or the like may likely warp. Furthermore, if the laminated UV tape or the like is warped, sealing on the bottom side becomes incomplete. Accordingly, as shown inFIG. 13B, filling resin may seep into the gaps between the core substrate and the UV tape or the like. The contents of this publication are incorporated herein by reference in their entirety.

SUMMARY OF THE INVENTION

According to one aspect of the present invention, a wiring board with a built-in electronic component includes a core substrate having a penetrating hole formed in the core substrate, an electronic component accommodated in the penetrating hole in the core substrate, a conductive pattern layer formed on a first surface of the core substrate and including a first conductive pattern and a second conductive pattern, and an interlayer insulation layer formed over the conductive pattern layer and the first surface of the core substrate. The second conductive pattern is formed adjacent to a periphery of the penetrating hole and contoured to laminate a sheet for positioning the electronic component in the penetrating hole horizontally with respect to the first surface of the core substrate over the penetrating hole.

According to another aspect of the present invention, a method for manufacturing a wiring board with a built-in electronic component includes forming a penetrating hole which accommodates an electronic component in a core substrate, forming a conductive pattern layer having a first conductive pattern and a second conductive pattern on one surface of the core substrate such that the second conductive pattern is formed adjacent to a periphery of the penetrating hole and contoured to laminate a sheet for positioning the electronic component in the penetrating hole horizontally with respect to the first surface of the core substrate over the penetrating hole, laminating the adhesive tape over the surface of the core substrate, mounting the electronic component on the adhesive tape forming the bottom of the penetrating hole, filling a resin material in a gap between the electronic component and the core substrate to secure the electronic component in the penetrating hole, and removing the adhesive tape after the electronic component is secured.

DETAILED DESCRIPTION OF THE EMBODIMENTS

FIG. 5is a cross-sectional view schematically showing substrate1with a built-in electronic component manufactured according to a manufacturing method of Embodiment 1. Substrate1with a built-in electronic component has core substrate2, electronic component3accommodated (built in) in core substrate2, conductive patterns4,5formed respectively on both main surfaces of core substrate2, interlayer insulation layers6,7, conductive patterns8,9formed respectively on interlayer insulation layers6,7, and conductive pattern10formed on one main surface of core substrate2.

Core substrate2is a substrate made by impregnating reinforcing material (base material) with resin. Its thickness is approximately 110 μm. As for a reinforcing material, glass cloth, glass non-woven fabric, aramid non-woven fabric or the like may be used preferably. Other than those, any insulative material of equal strength may be used.

Also, as for the resin to be impregnated in the reinforcing material, epoxy resin, BT (bismaleimide triazine) resin, polyimide resin or the like may be employed.

Conductive patterns4,5are made of copper or the like and their thicknesses are each approximately 20 μm. Conductive pattern4is formed on one main surface (hereinafter referred to as the first surface) of core substrate2; and conductive pattern5is formed on the other main surface (hereinafter referred to as the second surface) of core substrate2. Conductive pattern4and conductive pattern5are electrically connected by means of through-hole conductors20.

Electronic component3is an IC chip in the present embodiment, and is accommodated in penetrating hole21of core substrate2in a so-called face-up position.

Interlayer insulation layers6,7are formed with a plate made by impregnating reinforcing material such as glass fabric, aramid fabric or the like with resin such as epoxy resin, polyester resin, polyimide resin, BT resin, phenol resin or the like. In the present embodiment, all the plates are formed with prepreg. Interlayer insulation layer6is formed on the first surface of core substrate2and interlayer insulation layer7is formed on the second surface. Their thicknesses are each approximately 60 μm.

Conductive patterns8,9are made of copper or the like and their thicknesses are each approximately 20 μm. Conductive pattern8is formed on interlayer insulation layer6, and is electrically connected through via conductors60to conductive pattern4and terminals30of electronic component3. On the other hand, conductive pattern9is formed on interlayer insulation layer7and is electrically connected through via conductors70to conductive pattern9.

Conductive pattern10is formed on the second surface of core substrate2the same as in conductive pattern5. Conductive pattern10is made of copper or the like and its thickness is approximately 20 μm. Conductive pattern10is used to precisely position electronic component3as described later in detail, and it is not electrically connected to other conductive patterns.

In the following, a method for manufacturing substrate1with a built-in electronic component is described with reference toFIGS. 1A-4B.

First, as shown inFIG. 1A, a copper-clad laminate is prepared in which copper foils101,102with an approximate thickness of 12 μm are laminated on both main surfaces of core substrate2with an approximate thickness of 110 μm.

In the following, through-holes103are formed in the copper-clad laminate shown inFIG. 1Aby a drilling method using a drill or the like (seeFIG. 1B). Here, through-holes103may be formed using a carbon dioxide gas (CO2) laser, Nd:YAG laser, excimer laser or the like.

In the following, a treatment (desmear treatment) is conducted to remove smearing or the like remaining on the inner surfaces of through-holes103. Then, electroless copper plating and electrolytic copper plating are performed on the copper-clad laminate shown inFIG. 1B. Accordingly, as shown inFIG. 1C, copper-plated films104,105are formed on both main surfaces of the copper-clad laminate shown inFIG. 1Balong with through-hole conductors20.

Then, using a subtractive method, unnecessary portions of copper-plated films104,105are removed to form conductive patterns4,5, (10a) (seeFIG. 1D). Conductive pattern (10a) is an original configuration (before drilling) of conductive pattern10, and as shown inFIG. 4A, it is formed to be greater than the area of the mounting surface (namely, the area where the circuit is not formed) of electronic component3. In the present embodiment, the size of conductive pattern (10a) is equal to the area in which the outline of the surface (rectangular) of electronic component3where the circuit is not formed is enlarged with a predetermined length (L) (approximately 50 μm).

Next, by a drilling method using a drill or the like, penetrating hole21is formed to accommodate electronic component3(seeFIG. 1E). Here, penetrating hole21may be formed using a carbon dioxide gas (CO2) laser, Nd:YAG laser, excimer laser or the like. By drilling such a hole, conductive pattern10is formed. As shown inFIG. 4B, conductive pattern10is configured on the second surface of core substrate2to frame the end surface of penetrating hole21on the second-surface side without leaving gaps in between. The width of the frame which surrounds penetrating hole21is approximately 8.1 mm.

As shown inFIG. 7, conductive pattern10may also be formed in advance before forming penetrating hole21. In such a case, conductive pattern10is formed in the same process of forming conductive patterns4,5.

In the following, sheet or tape201is laminated on the second-surface side of the substrate shown inFIG. 1E(seeFIG. 2A). As for tape201, a UV tape (such as the Adwill D series, made by Lintec Corporation), whose adhesiveness is reduced through UV (ultraviolet) beaming to allow easy removal of the tape, may be used. Various adhesive tapes, for example, polyimide tapes or the like, whose adhesiveness is not reduced by high heat of over 80° C. during provisional curing, may also be used.

During that time, tape201may easily be laminated substantially horizontally without causing warping, since conductive pattern10exists there, which has the same thickness as that of conductive pattern5and is contoured or configured to frame the end surface of penetrating hole21on the second-surface side.

After tape201is laminated, electronic component3is mounted on its bonding (adhesive) surface in a so-called face-up position (seeFIG. 2B). Here, as described above, since tape201is laminated substantially horizontally, electronic component3may be positioned precisely without being shifted vertically.

In the following, on the first surface of the substrate shown inFIG. 2B, a resin film material (prepreg in the present embodiment) with an approximate thickness of 60 μm is laminated using a vacuum lamination method. As a result, as shown inFIG. 3A, interlayer insulation layer6is formed. During such lamination, the resin material flows into through-hole conductors20, while flowing into the gaps in penetrating hole21between electronic component3and the inner walls of core substrate2. Accordingly, the gaps between electronic component3and the inner walls of core substrate2are filled with the resin material.

As described above, conductive pattern10frames the end surface of penetrating hole21on the second-surface side without leaving gaps in between, and adheres to tape201. Therefore, the resin material that flowed into the gaps between electronic component3and the inner walls of core substrate2will not flow out onto the second surface of core substrate2, since pattern10works as a wall to block such flow.

In the following, UV rays are beamed and tape201is removed (seeFIG. 3B). Then, a resin film material (prepreg in the present embodiment) with an approximate thickness of 60 μm is laminated on the second surface of the substrate shown inFIG. 3Busing a vacuum lamination method. By doing so, as shown inFIG. 3C, interlayer insulation layer7is formed. During such lamination, the resin material flows into the interior of through-hole conductors20, thus filling the interior of through-hole conductors20with resin material.

As shown inFIGS. 8A-8C, electronic component3may also be accommodated in a face-down position.

Next, using a carbon dioxide gas (CO2) laser, UV-YAG laser or the like, via-holes are formed at predetermined spots of the substrate shown inFIG. 3C, and conductive patterns8,9and via conductors60,70are formed using an additive method. Accordingly, substrate1with a built-in electronic component is obtained as shown inFIG. 5.

As described, according to the manufacturing method of the present embodiment, conductive pattern10having the same thickness as conductive pattern5is formed on the second surface of core substrate2so as to frame the end surface of penetrating hole21on the second-surface side. Accordingly, tape201may easily be laminated substantially horizontally.

Then, since tape201is laminated substantially horizontally, electronic component3may be mounted in a substantially horizontal way at a predetermined position in penetrating hole21. By doing so, the flatness of interlayer insulation layer6may be ensured. As a result, conductive pattern8may be formed finely on interlayer insulation layer6and via conductors60may also be formed precisely. Therefore, connection reliability between terminals30of electronic component3and via conductors60is enhanced.

Also, since conductive pattern10frames the end surface of penetrating hole21on the second-surface side without leaving gaps in between and thus forms walls, the resin material will not flow out onto the second surface of core substrate2during the lamination process. Therefore, the flatness of the top surface (where the circuit is formed) of accommodated electronic component3may further be ensured.

FIG. 6shows an example of a built-up multilayer printed wiring board obtained by further building up multiple layers on substrate1with a built-in electronic component shown inFIG. 5. In the following, a method for manufacturing such a built-up multilayer printed wiring board is briefly described.

First, on the first and second surfaces of substrate1with a built-in electronic component, interlayer insulation layers601,602are formed respectively. After that, opening portions are formed in interlayer insulation layers601,602that reach conductive patterns8,9formed in substrate1with a built-in electronic component.

Next, on interlayer insulation layers601,602, conductive patterns603,604are formed respectively. During that time, via conductors605,606are also formed respectively in the opening portions of interlayer insulation layers601,602. By doing so, conductive pattern603and conductive pattern8are electrically connected, and conductive pattern604and conductive pattern9are electrically connected.

In the following, on both main surfaces of the substrate, a liquid or dry-film photosensitive resist (solder resist) is either applied or laminated. Then, a mask film with a predetermined pattern is adhered to the surface of the photosensitive resist, which is exposed to ultraviolet rays and developed in an alkaline solution.

As a result, solder-resist layers613,614are formed where openings are arranged to expose portions of conductive patterns609,610which are to become solder pads. Accordingly, the built-up multilayer printed wiring board is obtained as shown inFIG. 6.

The present invention is not limited to the above embodiment, but various modifications may be made within the scope of the present invention.

For example, in the above embodiment, conductive pattern10is formed, as shown inFIG. 4B, to be made substantially flush with the outline of the end surface of penetrating hole21on the second-surface side. However, the present invention is not limited to such. For example, as shown inFIG. 9A, conductive pattern10may be formed while being slightly detached from the outline. In doing so, when forming interlayer insulation layer6, part of the resin material forming interlayer insulation layer6may likely flow out of penetrating hole21and into the second surface of core substrate2. However, since the resin material is blocked by conductive pattern10, core substrate2will be filled with the resin material only to the wall of conductive pattern10. Accordingly, the effect is to enhance adhesiveness between core substrate2and interlayer insulation layer6. However, the distance detached from the outline is preferred to be made shorter than the line width (namely, the frame width) of conductive pattern10.

Alternatively, conductive pattern10may be formed to protrude slightly into the interior of penetrating hole21as shown inFIG. 9B. To configure conductive pattern10in such a way, a slightly complex process is needed, compared with the above embodiment. However, a process to laminate tape201substantially horizontally may be carried out even more easily.

Also, in the above embodiment, the outline of the end surface of penetrating hole21was rectangular and the configuration of conductive pattern10was also rectangular. However, the configuration of the end surface of penetrating hole21or of conductive pattern10is not limited to such in the above embodiment. For example, as shown inFIG. 9C, the outline of the end surface of penetrating hole21and the outline of conductive pattern10may be oval.

Alternatively, the configuration of conductive pattern10is not necessarily the same as the outline of the end surface of penetrating hole21(seeFIG. 9D). Furthermore, the line width of conductive pattern10does not have to be uniform (seeFIG. 9E).

Also, in the above embodiment, conductive pattern10is formed to frame the end surface of penetrating hole21without leaving gaps in between. However, its configuration is not limited to such. For example, as shown inFIG. 9F, multiple fine spaces may exist. If conductive pattern10has such spaces as described, when forming interlayer insulation layer6, there may be a risk that part of the resin material that has flowed into the gaps between electronic component3and the inner walls of core substrate2goes beyond the wall of conductive pattern10and flows onto the second surface of core substrate2. However, the effect that tape201may easily be laminated substantially horizontally remains the same. In addition, by filling the spaces of conductive pattern10with the resin material, another effect will be expected that adherence between core substrate2and interlayer insulation layer6increases.

From the same view point as above, conductive pattern10does not necessarily have to be formed to frame the end surface of penetrating hole21. For example, conductive pattern10may be formed in such configurations as shown inFIGS. 9G-9I. In short, as long as conductive pattern10is configured in such a way as to easily allow tape201to be laminated substantially horizontally, it is sufficient.

Also, conductive pattern10may be formed on both main surfaces of core substrate2instead of only on its one main surface. InFIG. 9J, an example is shown where conductive patterns10are formed on both main surfaces of core substrate2, and copper-plated films900are formed on the side surfaces of penetrating hole21to connect both conductive patterns. As shown inFIG. 9J, if conductive patterns10and copper-plated films900are formed, a shielding effect may also be shown in addition to the above described effect.

Moreover, in the above embodiment, conductive pattern10was described as not electrically connected to other conductive patterns (namely, a dummy conductive pattern). However, conductive pattern10may be electrically connected to other conductive patterns to function as an electric circuit. Alternatively, the second conductive pattern may be used as a power source conductor or ground conductor.

In addition, electronic component3accommodated in core substrate2is not limited to semiconductor elements such as an IC chip or the like. For example, as shown inFIGS. 10A-10C, a capacitor may be accommodated in core substrate2through the same processFIG. 2B-FIG.3B as in the above embodiment.

Also, in the above embodiment, when forming interlayer insulation layer6, the gaps between electronic component3and the inner walls of core substrate2are filled with the resin material forming interlayer insulation layer6to secure electronic component3. However, electronic component3may be secured using other methods. For example, before forming interlayer insulation layer6(namely, before laminating a resin material), insulative resin (such as a resin made of thermosetting resin and inorganic filler) may be filled in the gaps between electronic component3and the inner walls of core substrate2to secure electronic component3.

Furthermore, in the above embodiment, terminals30of electronic component3are connected through via conductors60to conductive pattern8on interlayer insulation layer6. However, electronic component3is not limited to any mounting method; for example, electronic component3may be mounted using a wire bonding connection.

In the process of such a case, as shown inFIG. 11A, electronic component3is mounted in a face-up position on the connection (adhesive) surface of tape201on the substrate shown inFIG. 2A. On the top surface (the surface where circuits are formed) of electronic component3, pads, not shown in the drawings, are arranged instead of connection terminals.

Then, as shown inFIG. 11B, pads of electronic component3and pads on core substrate2(here, parts of conductive pattern4) are connected using wires111(fine wires made of gold or aluminum).

In such a case, since the flatness features of the top surface (where circuits are formed) of electronic component3are ensured as in the above embodiment, the accuracy of wire bonding connections is enhanced.

Also, the present invention may be applied in a case in which electronic component3is flip-chip mounted. In the process in such a case, as shown inFIG. 12A, base material120instead of tape201is laminated on the second-surface side of the substrate shown inFIG. 1E. Base material120is formed with insulative material121such as prepreg or the like, pads122formed on insulative material121and solder bumps123formed on pads122.

Then, as shown inFIG. 12B, electronic component3is mounted in a face-down position. Namely, electronic component3with bumps31is accommodated in penetrating hole21of the substrate shown inFIG. 12Aand mounted on base material120with its surface where circuits are formed facing down. Bumps31of electronic component3are connected to solder bumps123. Then, as shown inFIG. 12C, the gaps in penetrating hole21of core substrate2are filled with underfill material124. Underfill material124is, for example, insulative resin containing inorganic filler such as silica or alumina. It ensures the strength to secure electronic component3, while absorbing warping generated due to the gap in thermal expansion coefficients between electronic component3and core substrate2.

As described, in a case where electronic component3is flip-chip mounted, electronic component3may also be mounted in a predetermined spot in penetrating hole21in a substantially horizontal manner.

Here, the conductive adhesive layers (not shown in the drawings) formed on pads122and bumps31of electronic component3may be electrically connected. The conductive adhesive layers are, for example, formed through tin plating, solder plating, or alloy plating such as tin-silver-copper plating.

A wiring board with a built-in electronic component according to one embodiment of the present invention includes a core substrate, an electronic component accommodated in a penetrating hole formed in the core substrate, a first conductive pattern formed on at least one main surface of the core substrate, a second conductive pattern formed on the same main surface as where the first conductive pattern is formed, and one or multiple interlayer insulation layers and conductive-pattern layers formed on the core substrate. Here, the second conductive pattern is formed on at least part of the periphery of an end surface of the penetrating hole.

A terminal of the electronic component may be electrically connected through a via conductor formed in any of the interlayer insulation layers to the conductive pattern formed on that interlayer insulation layer.

Alternatively, a terminal of the electronic component may be electrically connected to the conductive pattern formed on any of the interlayer insulation layers by means of a conductive bump or a conductive adhesive layer.

Alternatively, a pad of the electronic component may be electrically connected through a wire to another conductive pattern which is different from the first conductive pattern and the second conductive pattern formed on either one of the main surfaces of the core substrate.

On the periphery of an end surface of the penetrating hole, the second conductive pattern may be formed in parts facing each other across the penetrating hole.

The second conductive pattern may frame the periphery of an end surface of the penetrating hole.

The second conductive pattern may be in a continuous line to frame the periphery of an end surface of the penetrating hole.

Alternatively, the second conductive pattern may be in a broken line to frame the periphery of an end surface of the penetrating hole. In the parts between the discontinued lines, the surface of the core substrate may be exposed.

A side surface of the second conductive pattern may be formed on substantially the same level as the inner-wall surface of the core substrate where the penetrating hole is formed.

Alternatively, part of the second conductive pattern may protrude into the penetrating hole.

Alternatively, the second conductive pattern may maintain a predetermined space from the outline of an end surface of the penetrating hole.

The maximum width of the second conductive pattern may be made greater than the maximum width of the first conductive pattern.

The thickness of the second conductive pattern is preferred to be made substantially the same as the thickness of the first conductive pattern.

Resin is preferred to be filled in the gaps between the electronic component in the penetrating hole and the inner walls of the core substrate.

The electronic component is preferred to be accommodated in such a way that the surface of the electronic component where circuits are not formed faces the surface of the core substrate where the second conductive pattern is formed.

The second conductive pattern may be formed on both main surfaces of the core substrate.

A method for manufacturing a wiring board with a built-in electronic component according to another embodiment of the present invention includes the following: a step to form a penetrating hole to accommodate an electronic component in a core substrate; a step to form a first conductive pattern and a second conductive pattern on at least the same main surface of the core substrate; a step to laminate an adhesive tape on the surface of the core substrate where the first conductive pattern and the second conductive pattern are formed; a step to mount an electronic component on the adhesive surface of the adhesive tape at the bottom of the penetrating hole; a step to secure the electronic component by filling resin material in the gaps between the mounted electronic component and the inner walls of the core substrate; and a step to remove the adhesive tape after the electronic component is secured. Here, the second conductive pattern is formed on at least part of the periphery of an end surface of the penetrating hole.

Furthermore, the following steps may be added; a step to form an interlayer insulation layer and a conductive pattern on the electronic component and the core substrate; and a step to form in the insulation layer a via conductor which electrically connects a terminal of the electronic component and the conductive pattern.

On the periphery of an end surface of the penetrating hole, the second conductive pattern may be formed in parts facing each other across the penetrating hole.

The second conductive pattern may frame the periphery of an end surface of the penetrating hole.

The second conductive pattern may be in a continuous line to frame the periphery of an end surface of the penetrating hole.

Alternatively, the second conductive pattern may be in a broken line to frame the periphery of an end surface of the penetrating hole. In the parts between the discontinued lines, the surface of the core substrate may be exposed.

A side surface of the second conductive pattern may be formed on substantially the same level as the inner-wall surface of the core substrate where the penetrating hole is formed.

Alternatively, part of the second conductive pattern may be formed to protrude into the penetrating hole.

Alternatively, the second conductive pattern may maintain a predetermined space from the outline of an end surface of the penetrating hole.

The maximum width of the second conductive pattern may be made greater than the maximum width of the first conductive pattern.

Also, the adhesive tape is preferred to be a UV tape whose adhesiveness is reduced when ultraviolet rays are beamed.

Also, the thickness of the second conductive pattern is preferred to be made substantially the same as the thickness of the first conductive pattern.