Circuit and method for jitter generation in quasi-resonant converter

A Quasi-Resonant (QR) converter includes a power switch controlling the primary current flow and a time-varying capacitance coupled in parallel to the power switch. The time-varying capacitance is configured to add a frequency jitter to the frequency switch of the converter.

BACKGROUND OF THE INVENTION

The present invention relates to switching mode power supplies. More particularly, the invention provides methods and apparatus for reducing electromagnetic interference (EMI) of switching mode power supplies.

Regulated power supplies are indispensable in modern electronics. For example, the power supply in a personal computer often needs to receive power input from various outlets. Desktop and laptop computers often have regulated power supplies on the motherboard to supply power to the CPU, memories, and periphery circuitry. Regulated power supplies are also used in a wide variety of applications, such as home appliances, automobiles, and portable chargers for mobile electronic devices, etc.

In general, a power supply can be regulated using a linear regulator or a switching mode controller. A linear regulator maintains the desired output voltage by dissipating excess power. In contrast, a switching mode controller rapidly switches a power transistor on and off with a variable duty cycle or variable frequency and provides an average output that is the desired output voltage.

In such a switched mode power supply system, a switch is connected to the primary winding of the transformer. In the switching power supplies, the power transistor switches on and off periodically to convert the primary current of the transformer to the secondary side. The stable output voltage will be obtained by regulating the duty cycle or frequency of the primary side switch. Magnetic energy is stored in the inductance of the primary winding when the switch is turned on, and the energy is transferred to the secondary winding when the switch is turned off. The energy transfer results in a current flowing through the secondary winding and the rectifying diode. When the energy transfer is completed, the current stops flowing through the diode. If the switching mode power supply, also referred to as the flyback converter, operates in discontinuous conduction mode (DCM), during the discontinuous time, a resonant waveform of substantially sinusoidal oscillation of decreasing amplitude appears at the secondary winding and across the power switch due to the built-in inductance and capacitance in the converter. After the discontinuous time, the power switch is turned on again in the next switching cycle.

In quasi-resonant (QR) switching, the controller waits for one of the valleys in the resonant waveform of the drain voltage and then turns on the power switch. Compared with the traditional continuous conduction mode (CCM) and discontinuous conduction mode of operation in a flyback converter, quasi-resonant switching can reduce turn-on losses at the power switch, thus increasing efficiency and lowering device temperatures.

Compared with linear regulators, switching mode power supplies have the advantages of smaller size, higher efficiency and larger output power capability. On the other hand, they also have the disadvantages of greater noise, especially electromagnetic Interference (EMI) at the power transistor's switching frequency or its harmonics.

EMI is a critical issue in the design of a switching mode power supply. In order to reduce EMI, different frequency jittering techniques can be used. For example, switching frequencies may be varied by frequency modulation in order to spread out the electromagnetic radiation energy across a frequency range. One way to vary the switching frequency is to add a jitter component to the system clock. This technique helps reducing average EMI emission. However, implementing effective jittering can be difficult in a quasi-resonant (QR) converter, as explained further below.

BRIEF SUMMARY OF THE INVENTION

The inventor has recognized that, in a quasi-resonant (QR) converter, it is difficult to implement effective frequency jitter. Under discontinuous conduction mode (DCM), the flyback converter has an LC resonant waveform during the discontinuous time after the secondary side current is discharged. The QR operation turns on the power switch at a valley point of resonant voltage. The turn-on condition at a valley point of the resonant voltage can limit the switching frequencies of the flyback system and prevent the switching frequency to spread over a relatively large frequency range. As a result, the effectiveness of the jittering is limited.

This invention teaches a technique for introducing jitter in the switching frequency of a power converter. The power converter includes a power switch controlling the primary current flow, and a time-varying capacitance is coupled in parallel to the power switch. The time-varying capacitance adds a frequency jitter to the frequency switch of the converter.

As an example, this invention teaches a method for controlling a quasi-resonant (QR) converter to reduce electromagnetic interference (EMI). The converter includes a power switch coupled to a primary winding of the converter to control a primary current flow, and a sensing signal is monitoring the converter through an auxiliary winding. The method includes turning on the power switch at a valley point of a resonant waveform in the sensing signal during a discontinuous time of the converter for quasi-resonant (QR) operation. The method further includes adding a capacitance in parallel to the power switch at a peak point of the resonant waveform in the sensing signal during the discontinuous time, to vary an oscillation period of the resonant waveform, which leads to variations of the discontinuous time and changes the switching frequency of the converter. A modulation switch with a time-varying on-time can be used to control the duration of time in which the additional capacitance is in effect. For example, the time-varying duration can be a linear function of time to spread out the switching frequency across a relatively large frequency range.

In another example, this invention teaches a control circuit for a quasi-resonant (QR) converter. The control circuit includes a quasi-resonant controller for turning on a power switch at a valley point of a resonant waveform in a sensing signal during a discontinuous time of the converter. The power switch is coupled to a primary winding of the converter to control a primary current flow, and the sensing signal is monitoring the resonant waveform of the converter through an auxiliary winding. The control circuit also includes a jitter controller for adding a capacitance in parallel to the power switch at a peak point of the resonant waveform in the sensing signal during the discontinuous time. The jitter controller varies an oscillation period of the resonant waveform to add a frequency jitter to a switching frequency of the converter.

In another example, this invention teaches a Quasi-Resonant (QR) converter. The converter includes a transformer having a primary winding for coupling to an external input voltage, a secondary winding providing an output voltage of the converter, and an auxiliary winding for providing a sensing signal of the converter. The converter also has a power switch for coupling to the primary winding of the converter to control a primary current flow, and a capacitor and a modulation switch coupled in parallel to the power switch, with the modulation switch coupled in series with the capacitor. The converter also has a control circuit that includes a quasi-resonant controller and a jitter controller. The quasi-resonant controller turns on the power switch at a valley point of a resonant waveform in the sensing signal during a discontinuous time. The jitter controller turns on the modulation switch at a peak point of the resonant waveform in the sensing signal during the discontinuous time. The jitter controller varies a turn-on time of the modulation switch to add a frequency jitter to a switching frequency of the converter.

Definitions

The terms used in this disclosure generally have their ordinary meanings in the art within the context of the invention. Certain terms are discussed below to provide additional guidance to the practitioners regarding the description of the invention. It will be appreciated that the same thing may be said in more than one way. Consequently, alternative language and synonyms may be used.

A power switch as used herein refers to a semiconductor switch, for example, a transistor, that is designed to handle high power levels.

A power MOSFET is a specific type of metal oxide semiconductor field-effect transistor (MOSFET) designed to handle significant power levels. An example of a power MOSFET for switching operations is called a double-diffused MOS or simply DMOS.

A body diode in a power MOSFET is formed when the body and source are coupled together, and the body diode is formed between drain and source. The diode is located between the drain (cathode) and the source (anode) of the MOSFET making it able to block current in only one direction.

A power converter is an electrical or electro-mechanical device for converting electrical energy, such as converting between AC and DC or changing the voltage, current, or frequency, or some combinations of these conversions. A power converter often includes voltage regulation.

A regulator or voltage regulator is a device for automatically maintaining a constant voltage level.

A switching regulator, or switch mode power supply (SMPS) is a power converter that uses an active device that switches on and off to maintain an average value of output. In contrast, a linear regulator is made to act like a variable resistor, continuously adjusting a voltage divider network to maintain a constant output voltage, and continually dissipating power.

Continuous conduction mode (CCM) is an operational mode of a power converter, in which the system turns on the primary side current before secondary side current is stopped.

Discontinuous conduction mode (DCM) is an operational mode of a power converter, in which there exists a discontinuous time period, during which the current flow is stopped on both the primary side and the secondary side. The primary side is turned on again following the discontinuous time period.

Quasi-resonant (QR) mode is an operational mode of a power converter operating in discontinuous conduction mode (DCM), in which the primary side is turned on at a valley point of a resonant waveform during the discontinuous time period. Quasi-resonant operation can reduce switching loss of the power converter.

An operational amplifier (op-amp or opamp) refers to a DC-coupled high-gain electronic voltage amplifier with a differential input and, usually, a single-ended output. An operational amplifier can be characterized by a high input impedance and a low output impedance, and can be used to perform mathematical operations in analog circuits.

A voltage reference is an electronic device that ideally produces a fixed (constant) voltage irrespective of the loading on the device, power supply variations, temperature changes, and the passage of time.

A reference voltage is a voltage value that is used as a target for a comparison operation.

When the term “the same” is used to describe two quantities, it means that the values of two quantities are determined the same within measurement limitations.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 1is a simplified schematic diagram of a flyback converter that embodies certain aspects of this invention. Flyback converter100includes a transformer102, which includes a primary winding141for coupling to an input voltage Vinand a secondary winding142for providing the output voltage Voutthrough a rectifying diode120and a capacitor119. A current in the rectifying diode is ID. Transformer102also has an auxiliary winding143for providing a sensing signal DMEG monitoring a resonant waveform of the converter during a discontinuous time. Auxiliary winding143also provides a voltage Vcc, which can be used as a power supply for the support circuitry, such as a control circuit. InFIG. 1, Vp denotes the voltage at the primary winding, Vs denotes the voltage at the secondary winding, and Va denotes the voltage at the auxiliary winding. InFIG. 1, Lmrepresents the inductance of the primary winding, and N represents the ratio of coil turns in the primary winding to the secondary winding. Cossrepresents the capacitance associated with primary switch101, including the capacitance from the body diode. Vds represents the drain-source voltage across the primary switch.

Converter100includes a control circuit150. Power supply100also includes a power switch101(also designated as QL) coupled to primary winding141and control circuit150for receiving a control signal to turn on and off power switch101to control the primary current through primary winding141in order to regulate output voltage Vo. InFIG. 1, power switch101is shown as a MOSFET power transistor. In the embodiment ofFIG. 1, control circuit150can receive its operating power from Vccprovided by the auxiliary winding. Control circuit150can also receive sensing signal DMEG from auxiliary winding143. Control circuit150can also receive a current sense signal Vcs representative of the primary current through a current sense resistor116with a resistance Rcs. Control circuit150provides a control signal Drive to control power switch101. Control circuit150turns on the power switch101based on information provided by the sensing signal DMEG and turns off the power101based on information provided by the current sense signal Vcs.

As shown inFIG. 1, converter100also has a modulation capacitor130(also designated as Csn) and a modulation switch131(also designated as QM) coupled in parallel to power switch101. In this arrangement, modulation switch131is coupled in series with capacitor130. Control circuit150includes a valley detector151for detecting valley points in the resonant waveform in the sensing signal DMEG during the discontinuous time of converter100. Control circuit150also includes a peak detector152for detecting peak points in the resonant waveform in the sensing signal during the discontinuous time. Control circuit150also includes a quasi-resonant (QR) controller153for turning on the power switch101at a valley point of a resonant waveform in the sensing signal during a discontinuous time. Control circuit150further includes a jitter controller154for turning on the modulation switch131at a peak point of the resonant waveform in the sensing signal during the discontinuous time. Control circuit150also includes an oscillator OSC155, which provides a Tmax signal to jitter controller154. In addition to the Tmax signal, jitter controller154also receives a Ppulse signal from peak detector152, and provides a Mod_Off signal to QR controller153. QR controller153also receives a Vpulse signal from valley detector151. Control circuit150also includes a flipflop156that outputs the Drive signal.

As explained in detail below, the jitter controller154varies a turn-on time of the modulation switch131to add a frequency jitter to the switching frequency of the converter. The waveform of Vds is mirrored to the auxiliary winding and detected by a peak detector and a valley detector. The tjittercontroller determines the target peak count to turn on QM and linearly modulates the on time of QM. After QM is turned off, the QR controller is enabled by the tjitter control to wait for proper valley count and turn on QLat the valley of Vds.

FIG. 2Ais a simplified schematic diagram of part of flyback converter100ofFIG. 1, andFIG. 2Bshows waveform diagrams that illustrate a quasi-resonant operation of the converter that embodies certain aspects of this invention. InFIG. 2B, the following waveforms are shown over a switch cycle T of the converter. The first waveform “Drive” shows the control signal Drive applied to the primary switch101. The second waveform “Vds” shows the drain-to-source voltage Vds of the primary switch, which can be reflected in the sensing signal DMEG ofFIG. 1. The third waveform shows the primary current IPRIfeeding into primary side of the transformer. The fourth waveform shows the secondary current ISECflowing out of secondary side of the transformer. As can be seen inFIG. 2B, the primary switch is turned on during time period tON, and turned off during time period tOFF. During time period tON, the primary current flows through the primary switch. The secondary current flows during a first portion of time period tOFF. Time period tDISis a discontinuous time, during which both the primary current and the secondary current are off. During discontinuous time tDIS, a resonant waveform220exists in the waveforms of Vds, as well as DMEG. In the example ofFIG. 2B, resonant waveform221is shown to have three peak points221,223, and225and three valley points222,224, and226, marked by K=1, K=2, and K=3. In a quasi-resonant operation, the quasi-resonant controller153inFIG. 1turns on the power switch at a valley point of a resonant waveform in the sensing signal during the discontinuous time. InFIG. 2B, the primary switch is turned on at the third valley point (K=3) of resonant waveform220.

In a quasi-resonant operation, the turn-on condition “valley of resonant voltage” can improve power efficiency, but limits the switching frequency of the flyback system. According toFIG. 3, the equation of power delivery POUTin one switching cycle of the converter is:

POUT=ELmT=12⁢Lm⁢Ipeak2VIN+NVOUTLm×Ipeak+(K-12)⁢TQRT=VIN+NVOUTLm×Ipeak+(K-12)⁢TQR
where ELmis the energy stored in Lm, K is the valley count, and TQRis an oscillation period of the resonant waveform. In one switching period T, the power convertor stores energy ELminto Lm during torr and delivers the ELmto output during tOFF. Thus the average transferred power POUTis equal to the ELmover T. In the Pour equation, the only variable that can be modulated is the peak current Ipeakbecause the valley count K should be a natural number. However, a power convertor should deliver Pour equal to the load that application is required. The Ipeakhas only one solution with a specific number K, and the switching period T is a constant value given by the couple of solution Ipeakand K. As a result, any disturbance of Ipeakfor dithering switching period will be compensated by an external feedback loop and the switching frequency will converge to the given value which can fulfill the output load POUT.

The invention teaches a control circuit for a quasi-resonant (QR) converter. As shown in the converter100shown inFIGS. 1, 2A, and 2B, for quasi-resonant operation, control circuit150includes a quasi-resonant controller153for turning on a power switch101at a valley point222,224, or226, etc., of a resonant waveform220in a sensing signal DMEG during a discontinuous time tDISof the converter. The power switch is coupled to a primary winding141of the converter to control a primary switch, and the sensing signal DMEG monitoring the resonant waveform through an auxiliary winding143. Control circuit150also includes a jitter controller154for adding a capacitance130in parallel to the power switch101at a peak point of the resonant waveform220in the sensing signal DMEG during the discontinuous time tDIS. For example, the capacitance can be added at peak points such as peak points221,223, or225, etc. By varying the length of time during which the capacitance is coupled, the jitter controller154can vary the oscillation period TQRof the resonant waveform to add a frequency jitter to the switching frequency of the converter.

FIG. 3is a waveform diagram that illustrates a jitter operation in a quasi-resonant operation of the converter that embodies certain aspects of this invention. InFIG. 3, the following waveforms are shown over a switch cycle T of the converter, with reference toFIGS. 1, 2A, and 2B. The top waveform Vds shows the drain-to-source voltage “Vds” of the primary switch. The middle waveform “Drive” shows the control signal Drive applied to the primary switch101. The bottom waveform “Mod” shows the control signal Mod applied to the modulation switch131. A resonant waveform221exists in the waveforms of Vds during the discontinuous time. In the example ofFIG. 3, resonant waveform320is shown to have three peak points321,323, and325, and three valley points322,324, and326, marked by K=1, K=2, and K=3. In the quasi-resonant operation, the quasi-resonant controller153inFIG. 1turns on the power switch101at a valley point326of the resonant waveform in the sensing signal during the discontinuous time. InFIG. 3, the primary switch is turned on at the third valley point326(K=3) of resonant waveform320, at the end of the switching period T of the switching cycle.

InFIG. 3, the control signal Mod turns on the modulation switch131for a time period tjitter. During the time period tjitter, modulation switch131is on, and modulation capacitor130is connected in parallel with primary switch101, causing a modulation capacitor Csnto be connected in parallel to the capacitance of the primary switch Coss. Accordingly, during the time period tjitter, the oscillation period for resonant waveform320is increased from TQRto TQR1.
TQR=2π√{square root over (LmCOSS)}
TQR1=2π√{square root over (Lm(Coss+Csn))}
where Lmis the inductance of the primary winding, Cossis the capacitance associated with the primary switch, and Csnis the capacitance of the modulation capacitor. By varying the time period during which the modulation capacitor Csnis connected, the period T of the switching cycle of the converter is also changed.

In order to reduce the hard switching loss as turning on MOS transistors, the modulation switch QMshould be turned on at a peak point of Vds, and the primary switch QLshould be turned on at a valley point of Vds. To fulfill the turn on timings, peak and valley detector senses the DMEG node and produces pulse signals PPulseand VPulsebased on the peaks and valleys of Vds sinusoid oscillation.

In order to introduce jitter into the switching cycle, the turn-on time tjitterfor modulation switch131is varied over time.FIGS. 4A-4Dillustrate an example of varying the turn-on time tjitterthat embodies certain aspects of this invention.FIG. 4Ashows that the time period tjitter, the modulation switch on-time, is varied in a linear manner between a minimum of 0 and a maximum of tjitterMax.FIG. 4Bshows a corresponding switch frequency variation over a range of Δf.FIG. 4Cshows a corresponding variation in the switch frequency waveform.FIG. 4Dshows a spectrum plot of the Nth harmonic of the switch frequency waveform, with a center frequency of NFavg. Even though the example inFIGS. 4A-4Dillustrates a linear function for the jitter frequency, other time-varying functions can also be used.

The maximum range of the frequency spectrum is dependent on the valley count of the primary switch turn on and the value of modulation capacitor Csn. If the modulation switch QMturn-on signal is applied on the same valley count as the primary switch turn on, the range of the total switching period will be only a half cycle of mixed LC resonant and can be expressed as follows.

FIGS. 5A and 5Billustrate the waveforms for the QR converter in which the jitter causes the oscillation period for the resonant waveform to vary.FIG. 5Aillustrates the waveforms for the QR converter in which the jitter time tjitteris nearly zero, and the oscillation period for resonant waveform is TQRas described above.FIG. 5Billustrates the waveforms for the QR converter in which the jitter time tjitteris at the maximum, tjitterMax, and the oscillation period for resonant waveform is TQR1as described above.

FIGS. 6-10are schematic or waveform diagrams illustrating the structures and functions of various components in the control circuit in a converter that embody certain aspects of this invention.

FIG. 6shows schematic and waveform diagrams illustrating the structures and functions of a valley detector and a peak detector in the control circuit in a converter that embodies certain aspects of this invention. InFIG. 6, a valley detector610includes a first comparator611for comparing a sensing signal DMEG and a valley reference voltage Vref_V. A peak detector620includes a second comparator622for comparing a sensing signal DMEG and a peak reference voltage Vref_P. Waveform630illustrates the sensing signal DMEG, with the valley reference voltage Vref_V and peak reference voltage Vref_P. Waveform640illustrates the output waveform of the second comparator611, showing a pulse signal Ppulsewhere the sensing signal DMEG is greater than peak reference voltage Vref_P. Waveform650illustrates the output waveform of the first comparator622, showing a pulse signal VPulsewhere the sensing signal DMEG is less than valley reference voltage Vref_V.

FIG. 7Ais a simplified schematic diagram illustrating a jitter controller, andFIG. 7Billustrates a waveform diagram that describes the operation of the jitter controller that embodies certain aspects of this invention. As shown inFIGS. 7A and 7B, jitter controller700is an example of a jitter controller that can be used as jitter controller154in converter100inFIG. 1. Jitter controller700includes two D flipflops. A first D flipflop710has a first input terminal711for receiving a blanking time signal TFMAX, a second input terminal712for receiving the peak pulse signal PPulse, a first output terminal713for providing a modulation-on signal Modon, and a second output terminal714for providing a complement of the modulation on signal. Jitter controller700also includes a jitter duration circuit720having a ramp signal circuit721with a current source722and capacitor723that starts charging the capacitor upon receiving the complement of the modulation on signal, from the second output terminal714of the first D flipflop710, to produce a ramp signal RAMP. Jitter duration circuit720also has a comparator725for comparing the ramp signal RAMP and a jitter reference voltage Vjitterand providing a jitter stop signal727. A second D flipflop730has a first input terminal731for receiving logic high signal Logic H, a second input terminal732for receiving the modulation on signal Modon from the first D flipflop710, a reset terminal735for receiving the jitter stop signal727, a first output terminal733for providing a modulation switch turn-on signal Mod, and a second output terminal734for providing a complement of the modulation switch turn-on signal. Jitter controller700also has an AND circuit740for receiving the modulation on signal Mod_On and the complement of the modulation switch turn-on signal Mod and providing a modulation switch turn-off signal Mod_Off.

FIG. 8Ais a simplified schematic diagram illustrating a blanking time generation circuit, andFIG. 8Billustrates a waveform diagram that describes the operation of a blanking time geneation circuit that embodies certain aspects of this invention. Similar to jitter duration circuit720in jitter controller700, blanking time generation circuit800includes a ramp signal circuit810with a current source and capacitor that starts charging the capacitor upon receiving a Reset signal to produce a ramp signal. As shown inFIG. 8A, the Reset signal is a pulse signal produced by a rising edge one-shot circuit820at the rising edge of the primary switch QLturn-on signal. Blanking time generation circuit800also has a comparator830for comparing the ramp signal and a reference voltage VFMAXand providing blanking time signal TFMAX.FIG. 8Bshows the waveforms for the primary switch turn-on signal QL, blanking time signal TFMAX, and the Reset signal. Blanking time signal TFMAXcan be used to select the on-set of the modulation switch turn-on signal, as described above in connection withFIGS. 7A and 7B. It also limits the lower bound of the switching period.

FIG. 9is a simplified schematic diagram illustrating a first example of a quasi-resonant controller that embodies certain aspects of this invention.FIG. 10is a simplified schematic diagram illustrating a second example of a quasi-resonant controller that embodies certain aspects of this invention. As shown inFIGS. 9 and 10, quasi-resonant controllers900and1000are examples of quasi-resonant controllers that can be used as quasi-resonant controller153in converter100inFIG. 1. As shown inFIG. 9, quasi resonant controller900has a first input terminal901for receiving the modulation switch turn-off signal, a second input terminal902for receiving the valley pulse signal VPulse, and an output terminal903for providing a primary switch turn on signal Trigger. Similarly, as shown inFIG. 10, quasi resonant controller1000has a first input terminal1001for receiving the modulation switch turn-off signal, a second input terminal1002for receiving the valley pulse signal VPulse, and an output terminal1003for providing a primary switch turn on signal Trigger. Both quasi resonant controller900and quasi resonant controller1000provide a primary switch turn-on signal at a valley point of the resonant waveform in the discontinuous time.

As shown inFIG. 9, quasi resonant controller900has a D flipflop910that includes a first input terminal901for receiving the modulation switch off signal Mod_Off, a second input terminal902for receiving the valley pulse signal VPulse, and an output terminal903for providing the primary switch trigger signal915. Waveform Mod illustrates the modulation switch turn-on signal. Waveform Mod_Off indicates that the modulation switch is turned off after the modulation switch has been on for a duration determined by the jitter control circuit. Waveform VPulseshows the valley pulse signals. D flipflop910produces the trigger signal Trigger at the rising edge of the first valley pulse signal VPulseafter the modulation switch is turned off. The primary switch turn-on signal Drive is provided by control circuit150inFIG. 1in response to the Trigger signal. The turning on of primary switch indicates the beginning of a new switching cycle, and the D flipflop910receives a global signal Reset to standby for the new cycle.

As shown inFIG. 10, quasi resonant controller1000has two D flipflops connected in series. A first D flipflop1010includes a first input terminal1011for receiving the modulation switch off signal QM_OFF, and a second input terminal1012for receiving the valley pulse signal VPulse. A second D flipflop1020has a first input terminal1021for receiving an output signal from the first D flipflop1010, and a second input terminal1022for receiving the valley pulse signal. The second D flipflop1020also has an output terminal1023for providing the primary switch trigger signal Trigger.FIG. 10also shows waveforms that illustrate the same signals as those shown inFIG. 9. A difference between quasi resonant controller1000and quasi resonant controller900is that quasi resonant controller1000includes two D flipflops, whereas quasi resonant controller900has only one D flipflop. As a result, in quasi resonant controller1000, the primary switch is turned on at the second valley point after the modulation switch is turned off. The quasi resonant controller1000makes the valley count different from the jitter peak count and the system switching frequency has a wider jitter range.

As described above, quasi resonant controller900has one D flipflop, and quasi resonant controller1000has two D flipflops connected in series. More generally, each quasi resonant controller can have a flipflop chain having one D flipflip or two or more serially-connected D flipflops. A first one of the one or more D flipflops has a first input terminal for receiving the modulation switch off signal and a second input terminal for receiving the valley pulse signal. A last one of the one or more D flipflop has an output terminal for providing the primary switch trigger signal. Each D flipflop other than the first one of the one or more D flipflops has a first input terminal for receiving an output signal from a preceding D flipflop and a second input terminal for receiving the valley pulse signal. Even though the above examples include D flipflops, it is understood that similar functions can be implemented using other flip-flops or latches that have two stable states and can be used to store state information.

FIG. 11Ais a simplified schematic diagram illustrating a quasi-resonant (QR) converter with jitter that embodies certain aspects of this invention.FIG. 11Bis a waveform diagram illustrating the operation of the Quasi-Resonant (QR) converter with the jitter ofFIG. 11Bthat embodies certain aspects of this invention.FIG. 11Ashows part of quasi-resonant (QR) converter1100, which is similar to quasi-resonant (QR) converter100ofFIG. 1, that illustrates that the modulation capacitor and the modulation switch are coupled with the primary switch in parallel between an input node of the power switch and a ground terminal. In this case, the power switch QLis an NMOS transistor and node1101is a drain node of the power switch. The modulation switch QMis a PMOS transistor, which has a source node1103coupled to the ground node GND. In this case, the modulation switch QMis also referred to as a low-side PMOS.FIG. 11Bshows that the modulation switch is turned on at the first peak1111of the resonant waveform in the discontinuous time, and the primary switch is turned on at the third valley1113of the resonant waveform in the discontinuous time. As described above, during the time when the modulation switch is turned on, the modulation capacitor is connected, and the oscillation period of the resonant waveform is TQR1. When the modulation switch is turned off, the modulation capacitor is disconnected, and the oscillation period of the resonant waveform is TQR. Accordingly, with a time-varying TQR1, a jitter is added to the quasi-resonant converter.

FIG. 12Ais a simplified schematic diagram illustrating a quasi-resonant (QR) converter with jitter that embodies certain aspects of this invention.FIG. 12Bis a waveform diagram illustrating the operation of the Quasi-Resonant (QR) converter with the jitter ofFIG. 12Athat embodies certain aspects of this invention.FIG. 12Ashows part of quasi-resonant (QR) converter1200, which is similar to quasi-resonant (QR) converter100ofFIG. 1, except that the modulation capacitor and the modulation switch are coupled with the primary switch in parallel between an input node of the power switch and a power terminal. In this case, the power switch QLis an NMOS transistor and node1201is a drain node of the power switch. The modulation switch QLis an NMOS transistor, which has a drain node1203coupled to a power node in series with the modulation capacitor, in this case, Vin. In this case, the modulation switch QMis also referred to as a high-side NMOS. The NMOS QM needs a bootstrap driving circuit to provide a control signal for the swinging source voltage. Node SW provides a reference ground for the control signal.

The operation of quasi-resonant (QR) converter1200inFIG. 12Bis similar to the operation of quasi-resonant (QR) converter1100inFIG. 11B. As shown inFIG. 12B, the modulation switch is turned on at the first peak1211of the resonant waveform in the discontinuous time, and the primary switch is turned on at the third valley1213of the resonant waveform in the discontinuous time. Similar to above, during the time when the modulation switch is turned on, the oscillation period of the resonant waveform is TQR1. When the modulation switch is turned off, the oscillation period of the resonant waveform is TQR. Accordingly, a jitter is added to the quasi-resonant converter.

FIG. 13is a simplified flowchart that illustrates a method for controlling a quasi-resonant (QR) converter that embodies certain aspects of this invention. As shown inFIG. 13, method1300includes, at1310, identifying valley points and peak points of a resonant waveform in a sensing signal during a discontinuous time of the converter. Method1300also includes, at1320, turning on a modulation switch to add a capacitance in parallel to the power switch at a peak point of the resonant waveform in the sensing signal during the discontinuous time, to vary an oscillation period of the resonant waveform to add a frequency jitter to a switching frequency of the converter. Method1300also includes, at1330, turning on a power switch at a valley point of a resonant waveform in a sensing signal after the modulation switch being turned off. The power switch is coupled to a primary winding of the converter to control a primary current flow, and the sensing signal is representative of the resonant waveform.

In method1300, adding a capacitance in parallel to the power switch can include turning on a modulation switch that is coupled in series with a modulation capacitor. Method1300also includes turning on the modulation switch at a first peak point in the resonant waveform after a blanking time, and turning off the modulation switch after a time period based on a time-varying function to vary a turn-on time of the modulation switch. The method can also include turning on the power switch at a valley point of the resonant waveform after a preset off time of the modulation switch.