Boost converter with a pulse frequency modulation mode for operating above an audible frequency

The embodiments discussed herein relate to systems, methods, and apparatus for executing a pulse frequency modulation (PFM) mode of a boost converter in order to ensure that a switching frequency of the boost converter is a above an audible frequency threshold. In this way, a user operating a display device that is controlled by the boost converter will not be disturbed by audible noises generated at the display device. The PFM mode enforces an audible frequency threshold by using control circuitry designed to increase or decrease the frequency of a pulse signal depending on how the frequency of the pulse signal changes over time. The control circuitry can apply an additional load to the boost converter in order to increase the frequency of the pulse signal when the frequency is approaching the audible frequency threshold.

FIELD OF THE DESCRIBED EMBODIMENTS

The described embodiments relate generally to systems, methods, and apparatus for improving display devices using a backlight controller. Specifically, the embodiments relate to improving noise reduction in display devices using a backlight controller that can operate in a pulse frequency modulation mode.

BACKGROUND

Display devices have in recent times been adapted to project a wide variety of media not limited to video games, movies, applications, among many other forms of media. However, during operation, certain display devices can project audible noise because of certain signals within the display device being transmitted at audible frequencies. Such signals can correspond to switching signals used to turn on and off light emitting diodes (LED's) within the display device. When adjusting a frequency of the switching signals, the power consumption of the display device can be negatively affected because of the charge required to switch on and off each LED. Therefore, reducing noise in display devices can prove futile in some cases when a manufacturer is attempting to reduce noise while also designing the display device to be energy efficient.

SUMMARY

This paper describes various embodiments that relate to systems, methods, and apparatus for enforcing a minimum switching frequency at a display device in order to minimize audible noise. In some embodiments, a control circuit for a display device is set forth. The control circuit can include a boost circuit configured to output a switching signal to a subsystem of the display device based on a cycle period. The control circuit can further include a timing circuit configured to detect a frequency of the switching signal. The control circuit can be configured such that when the timing circuit does not detect a pulse in the switching signal before the cycle period expires, the timing circuit can cause the boost circuit to output a pulse and the cycle period to restart.

In other embodiments, a machine-readable non-transitory storage medium is set forth. The storage medium can store instructions that, when executed by a processor included in a computing device, cause the computing device to carry out steps that include generating a switching signal for a subsystem of a display device based on a cycle period. The steps can further include detecting pulses in the switching signal, wherein, when a pulse is not detected in the switching signal before a cycle period expires, the timing circuit causes a pulse to be output to the subsystem and the cycle period restarts.

In yet other embodiments, a computing device is set forth. The computing device can include a processor and a display device. The display device can include a boost circuit configured to output a switching signal to a subsystem of the display device based on a minimum frequency threshold. The display device can further include a timing circuit configured to detect the frequency of the switching signal. The timing circuit can be further configured such that when the timing circuit determines that the frequency of the switching signal is approaching a minimum frequency threshold, the timing circuit can turn on a current sink electrically coupled to the timing circuit in order to increase a load of the boost circuit thereby causing an increase in the frequency of the switching signal.

DETAILED DESCRIPTION OF SELECTED EMBODIMENTS

The embodiments discussed herein relate to a boost converter of a display device that can operate in a pulse frequency modulation (PFM) mode. The PFM mode is designed to ensure that the frequency of a switching signal used to switch on light emitting diodes (LED's) of the display device is above an audible frequency threshold. In this way, a user who is operating the display device is not interrupted by audible noise generated from the display device. The boost converter is configured to operate according to a minimum switching frequency using control circuitry configured to analyze and respond to changes in the switching signal. The frequency of the switching signal is monitored to determine when the frequency is decreasing, and, in response, a load can be applied to the output of the boost converter until the frequency increases. The monitoring is performed by a control circuit or module within the boost converter, which uses a timer that cycles according a pre-programmed period. The pre-programmed period corresponds to the minimum switching frequency to be enforced on the boost converter. For example, when the minimum switching frequency is set to 20 kilohertz, the pre-programmed period will be 50 microseconds. The timer operates to cause the boost converter to output a pulse according to the minimum switching frequency. In some embodiments, when the timer performs a complete cycle without a pulse being detected in the switching signal, a pulse will be generated by the boost converter and the timer will start a new cycle. Additionally, when a pulse is detected in the switching signal during a cycle of the timer, the timer will reset to start a new cycle. In this way, the timer helps to ensure that a pulse is provided by the boost converter at least during every cycle of the timer. The timer can cause a pulse to be generated, or an increase in switching frequency to occur, by turning on a current sink electrically coupled to the boost converter. Therefore, when the frequency is decreasing, the current sink can be turned on causing the boost converter to compensate for the additional load associated with the current sink. In order to compensate, the boost converter increases the frequency of the switching signal. When the frequency is increasing, the current sink can be turned off in order to prevent the switching frequency from continually increasing after the switching frequency has passed the minimum switching frequency of the boost converter.

FIG. 1illustrates a system diagram100of a backlight driver102according to some embodiments discussed herein. A boost converter104can be used in combination with a light emitting diode (LED) driver124to create the voltages needed for driving an LED string110. However, when using various switching mechanisms at the backlight driver102, there is a potential for audible or acoustic noise to be generated from the components used in the backlight driver102or other components electrically coupled to the backlight driver102. For example, some ceramic capacitors at an input or output of a power supply, such as a direct current (DC) to DC converter, can be the source of such noise. Additionally, the inductors coupled to the backlight driver102can also generate significant audible or acoustic noise. In order to reduce such noise, the backlight driver102can use a fixed frequency pulse width modulation (PWM) mode. During the fixed frequency PWM mode, audible noise can be controlled by choosing the switching frequency that is greater than the human hearing limit (i.e., >20 kHz). However, when the switching frequency is above the human hearing limit, the switching action can still cause vibrations in the backlight driver102to occur. Additionally, during a PWM mode, the switching frequency can be set to inaudible frequencies (e.g., greater than 100 kHz) thereby creating no acoustic issue. However, a power supply providing power to achieve the PWM mode can operate inefficiently during periods where only a small load is being applied to the power supply. In order to improve power efficiency, PWM mode can be switched to a pulse frequency modulation (PFM) mode according to some embodiments discussed here.

During the PFM mode, the switching frequency can change as the load changes. Consequently, unlike PWM mode, in the PFM mode the switching frequency may not be well controlled, thereby allowing the switching frequency to drop to or below the human hearing limit thereby creating audible noise. In order to prevent the generation of audible noise when operating in a PFM mode, a switching frequency can be controlled using control circuitry designed to keep the switching frequency above a pre-programmed minimum frequency. Therefore, audible noise can be avoided by ensuring the PFM mode switching frequency of the backlight driver102is always greater than the frequency of audible sound (i.e., at least 20 kHz).

The backlight driver102can include the boost converter104, which is configured to boost the voltage received by the LED string110. The backlight driver102operates to allow the input signal106to energize an inductor108and a capacitor128when the switch112is opened. The switch112can be opened and closed according to a switch pulse116, which acts to toggle according to a switching frequency. When the switch112is closed, feedback signal114will be provided back to the boost converter104. In this way, the boost converter104can sense the current output provided by the power supply and/or recycle current drawn from the power supply via the input signal106. When the switch112is opened, any energy left in the inductor108and any charge left in a capacitor128will be forced through the LED string110according to the operation of diode122. Current generated during the closing of a switch112can be fed back into the boost converter104via the feedback signal114. In this way, changes in load can be monitored to determine how the load is affecting the switching frequency.

The backlight driver102can further include an LED driver124configured to control a switch112according to a dimming signal126and/or an LED sense132signal. The dimming signal126can determine a frequency at which switch112will be toggled. The dimming switch136can be configured to allow the boost converter104to transmit current through the LED string110. The dimming switch136can frequently receive a driver signal130from the LED driver124and cause the dimming switch136to close, permitting the boost converter104to transmit current through the LED string110. When the dimming switch136is open, little or no current is permitted to transfer through the LED string110. However, the capacitor128can still discharge into the LED string110causing an increase in the fall time for the current through the LED string110. Thereafter, when the capacitor128is being recharged, there will be an increase in the rise time of the current through the LED string110. This rise and fall of the current through the LED string110can be captured by the LED return134provided to the boost converter104to further ensure that the backlight driver102is not operating at an audible frequency. For example, if the backlight driver102is operating at an audible frequency, the backlight driver102can intelligently increase its load by drawing current from a sink current118in order to boost the switching frequency to an inaudible frequency. When in PFM mode, the frequency of switching will vary with the load applied to the boost converter104. As the load current required is lowered (e.g., as a result of dimming the LEDs), the switching frequency is also lowered. However, when the load becomes too low, the switching frequency can drop below a pre-programmed switching frequency threshold (e.g., at least 20 kHz in some embodiments). If the load requirements or any other conditions tend to drive the frequency lower than the switching frequency threshold, an additional switch pulse can be output by the boost converter, or the switching frequency can be increased by increasing the load to ensure the frequency does not drop below the switching frequency threshold. This can be performed according to control circuitry within the boost converter104.

FIG. 2illustrates a system diagram200of the boost converter104and some of the subsystems used to enforce a switching frequency threshold on the boost converter104. The system diagram200incorporates some of the elements fromFIG. 1, however, more detail is provided for understanding the operation of the boost converter104. The boost converter104can include a boost controller214having a timer202configured to measure a time between pulses of a switch pulse116provided by the boost converter104. The timer202can include a start218and a reset220. The start218can be initiated at the beginning of a cycle or period for detecting a pulse or immediately after the reset220is triggered. The start218initiates a counter for detecting a pulse of the switch pulse116and if a pulse is not detected within a predetermined period or cycle, the timer202can cause the pulse generator204to insert a supplemental pulse into the switch pulse116. Once the supplemental pulse is inserted into the switch pulse116, the reset220causes the timer202to reset. If a pulse is detected during the predetermined period, the reset220can cause the timer to reset. In this way, the boost converter104always ensures that a pulse is occurring within the predetermined period or at least at a certain frequency. In some embodiments, the boost converter104can include multiple timers that operate according to different periods respectively such that each timer can adjust the frequency of the switch pulse116independently.

The boost controller214can also be configured such that when the frequency of the switch pulse116approaches a minimum switching frequency, a current sink222is turned on. Specifically, when the time between pulses drops below a predetermined period corresponding to the minimum switching frequency, an additional load is applied to the boost converter by turning on the current sink222. A current increase at the current sink222can cause an increase in frequency for the switch pulse116generated by the pulse generator204. Once the frequency of the switch pulse116has increased to above the minimum switching frequency, the current sink222can be turned off. By turning off the current sink222, a decrease in a load of the boost converter104occurs causing a decrease in frequency or no change in frequency to switch pulse116. In some embodiments, the load can be measured at least partially based on a load sense signal224derived from current that passes through a sense resistor206. The sense resistor206can have a resistive value suitable for measuring the load of the boost converter104. Moreover, in some embodiments, multiple frequency thresholds are enforced by the boost controller214. Each frequency threshold can each be associated with a unique current increase or current decrease. In this way, the changes frequency of the switch pulse116can cause different current increases or decreases depending on a magnitude of the change in frequency of the switch pulse116. In some embodiments, a frequency threshold period can be equal to or greater than 20 kilohertz. In this way, at least one pulse will be generated every 50 microseconds. In other embodiments, the boost controller214can operate according to multiple frequency thresholds not limited to approximately 22, 25, 28, 30, 32 and or 35 kilohertz. In yet other embodiments, the boost controller214can operate according to any suitable frequency thresholds that are less than and/or greater than 20 kilohertz.

In some embodiments, the boost controller214can operate to maintain a charge of the capacitor128at a minimum voltage level without constantly increasing the charge of the capacitor. The capacitor128can be charged according to the switch pulse116, which acts to toggle switch112. However, between pulses of the switch pulse116, the charge delivered to the capacitor128should be discharged by a load before the next switch pulse, otherwise charge accumulates at the capacitor128and the capacitor voltage level starts to rise. In order to curb the rise of the capacitor128voltage level, the boost controller214can be configured to prevent the capacitor voltage level from continually receiving charge. A first approach is to ensure that the minimum possible charge is delivered at the lowest allowable frequency in the PFM mode, and that subsequently the charge is removed from the capacitor128by the load (e.g., the LED string110). A second approach is to allow the capacitor voltage level to rise above its expected value by a programmable or predetermined voltage margin. Once the voltage level of the capacitor128exceeds the voltage margin, a load is connected to discharge the capacitor128to a nominal voltage level. For example, in some embodiments, the boost converter104can include a current sink module208electrically coupled to an LED return134. When the feedback signal114indicates that the voltage level of the capacitor128has risen above the voltage threshold, the boost controller214will enable the current sink module208and cause the current sink module208to discharge the capacitor128to the nominal voltage level. In this way, the boost converter104can operate to reduce power consumption and optimize the performance of a display device in which the boost converter104can be electrically coupled.

FIG. 3illustrates a plot300of how the timer202can be configured to ensure that a pulse is provided by the boost converter104according to a minimum switching frequency during a PFM mode. Specifically, the plot300illustrates an example of the timer202operating according to a programmed period of 50 μs. In this way, the timer202can maintain a minimum switching frequency of 20 kHz when operating in the PFM mode discussed herein. The timer signal302operates as a counter that causes a pulse to be output by the boost converter104at the timer expiration308or when the programmed period ends without detecting a pulse. Therefore, if the timer202never receives a timer reset310during a programmed period, the timer202will cause a pulse to be generated at the end or beginning of every programmed period. A PFM signal304corresponds to pulses generated by the boost converter104operating in the PFM mode. As illustrated in plot300, occasionally the periods between the pulses can vary from 35 μs to 75 μs, which means that the corresponding frequencies sometimes drop below 20 kHz. In order to prevent the switching frequency to not drop below 20 kHz, the timer202can be used to insert a pulse in between periods that exceed 50 μs.

The timer202can be configured to reset according to a timer reset310whenever 50 μs has elapsed or a pulse has been generated by the boost converter104during a cycle or period of the timer202. InFIG. 3, there is initially a new pulse generated by the boost converter104, therefore the 50 μs timer resets upon detecting the first pulse of the switch signal306. After 35 μs, the boost converter104generates a new pulse, so the 50 μs timer resets itself again at timer reset310. Subsequently, after 50 μs, there is no new pulse detected in the PFM signal304by the time of the timer expiration308, so the 50 μs timer causes a new pulse to be generated in the switch signal306and the timer202. After 25 μs, there is a new pulse generated by the boost converter, so the timer202again resets according to the timer reset310. After 50 μs from the subsequent timer reset310, the timer202reaches another timer expiration308because no new pulse was generated for the PFM signal304by the boost converter104. As a result, the 50 μs timer causes a new pulse to be generated in the switch signal306at the timer expiration308and the timer202resets to start a new cycle. Thereafter, after 15 μs, the boost converter generates a new pulse, so the 50 μs timer resets itself at the last timer reset310. As a result, the switch signal306corresponds to a pulsed signal having a period equal to or less than 50 μs and thus a frequency greater than 20 kHz. The boost converter104and other systems depending on the boost converter104will therefore be maintained at a switching frequency that is inaudible. In this way, a user who is operating a display device that includes the boost converter104will not have their user experience interrupted by audible sounds coming from the display device.

FIG. 4illustrates a method400for ensuring that a boost converter104is operating outside of an audible frequency range. The method400can be performed by any suitable apparatus, system, or module discussed herein. The method400can include a step402of starting a timer that operates according to a predetermined period. The predetermined period can correspond to a frequency that a periodic signal is to stay above. At step404, the timer is incremented. The increment can be seconds, milliseconds, microseconds, nanoseconds, or any other suitable time increment. At step406, a determination is made as to whether a pulse has been detected by the timer or other suitable apparatus or module. If a pulse has been detected then the timer is reset at step410and step402is executed again. If no pulse has been detected, then at step408a determination is made as to whether the predetermined period has elapsed. If the predetermined period has elapsed then an output pulse is generated at step412. Thereafter, the timer is reset at step410and step402is executed again. If the predetermined period has not elapsed, then the time is incremented at step404. In this way, the timer will continue operating in a way that ensures the period of the pulses of the periodic signal do not have a period that is greater than the predetermined period.

FIG. 5illustrates a method500for maintaining a switching frequency of a pulse signal from a boost converter above a minimum frequency threshold. The method500can be performed by any suitable apparatus, system, or module discussed herein. The method500can include a step502of determining a frequency or change in frequency of a pulse signal generated by a boost converter. At step504, a determination is made as to whether the frequency is approaching or below a minimum frequency threshold. If the frequency is approaching or below the minimum frequency threshold then, at step506, a current sink connected to the boost converter is turned on and step502is repeated. If the frequency is not approaching or below the minimum frequency threshold then, at optional step508, the current sink is turned off (if the current sink was previously on) in order to reduce a load of the boost converter. The boost converter operates such that an increase or decrease in load will cause an increase or decrease in the pulse signal frequency respectively. In this way, by toggling the current sink based on the frequency of the pulse signal, the frequency of the pulse signal can be kept above the minimum frequency threshold.

FIG. 6is a block diagram of a computing device600that can represent the components of the boost converter104, boost controller214, timer202, or any of the systems, apparatus, and/or modules discussed herein. It will be appreciated that the components, devices or elements illustrated in and described with respect toFIG. 6may not be mandatory and thus some may be omitted in certain embodiments. The computing device600can include a processor602that represents a microprocessor, a coprocessor, circuitry and/or a controller for controlling the overall operation of computing device600. Although illustrated as a single processor, it can be appreciated that the processor602can include a number of processors. The number of processors can be in operative communication with each other and can be collectively configured to perform one or more functionalities of the computing device600as described herein. In some embodiments, the processor602can be configured to execute instructions that can be stored at the computing device600and/or that can be otherwise accessible to the processor602. As such, whether configured by hardware or by a combination of hardware and software, the processor602can be capable of performing operations and actions in accordance with embodiments described herein.

The computing device600can also include user input device604that allows a user of the computing device600to interact with the computing device600. For example, user input device604can take a variety of forms, such as a button, keypad, dial, touch screen, audio input interface, visual/image capture input interface, input in the form of sensor data, etc. Still further, the computing device600can include a display608(screen display) that can be controlled by processor602to display information to a user. Controller610can be used to interface with and control different equipment through equipment control bus612. The computing device600can also include a network/bus interface614that couples to data link616. Data link616can allow the computing device600to couple to a host computer or to accessory devices. The data link616can be provided over a wired connection or a wireless connection. In the case of a wireless connection, network/bus interface614can include a wireless transceiver.

The computing device600can also include a storage device611, which can have a single disk or a number of disks (e.g., hard drives) and a storage management module that manages one or more partitions (also referred to herein as “logical volumes”) within the storage device618. In some embodiments, the storage device618can include flash memory, semiconductor (solid state) memory or the like. Still further, the computing device600can include Read-Only Memory (ROM)620and Random Access Memory (RAM)622. The ROM620can store programs, code, instructions, utilities or processes to be executed in a non-volatile manner. The RAM622can provide volatile data storage, and store instructions related to components of the storage management module that are configured to carry out the various techniques described herein. The computing device600can further include data bus624. Data bus624can facilitate data and signal transfer between at least processor602, controller610, network interface614, storage device618, ROM620, and RAM622.

The various aspects, embodiments, implementations or features of the described embodiments can be used separately or in any combination. Various aspects of the described embodiments can be implemented by software, hardware or a combination of hardware and software. The described embodiments can also be embodied as computer readable code on a computer readable storage medium. The computer readable storage medium can be any data storage device that can store data which can thereafter be read by a computer system. Examples of the computer readable storage medium include read-only memory, random-access memory, CD-ROMs, HDDs, DVDs, magnetic tape, and optical data storage devices. The computer readable storage medium can also be distributed over network-coupled computer systems so that the computer readable code is stored and executed in a distributed fashion. In some embodiments, the computer readable storage medium can be non-transitory.