Power generating apparatus having remote control self-recovery power-off mechanism

A power generating apparatus includes a power supply, a first sub-end circuit, a second sub-end circuit and an integrated signal generator. The first and second sub-end circuits respectively generate first and second sub-end standby power. The first sub-end circuit receives a first integrated control signal. The second sub-end circuit receives a second integrated control signal. The first sub-end circuit cuts off the first sub-end standby power according to the first integrated control signal and turns on the first sub-end standby power again after a first delay time. The second sub-end circuit cuts off the second sub-end standby power according to the second integrated control signal, and turns on the second sub-end standby power again after a second delay time. The integrated signal generator generates the first and second integrated control signals.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims the priority benefit of Taiwan application serial no. 108113566, filed on Apr. 18, 2019. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The invention relates to a power generating apparatus, and more particularly, to a power generating apparatus capable of controlling sub-end standby power in combination with remote system maintenance functions of the existing baseboard management controller for reducing the frequency at which managers need to conduct on-site maintenance.

2. Description of Related Art

In the prior art, a sub-end circuit can cut off an operating power of its own or the other sub-end circuit. However, a standby power supply will exist and cannot be changed after the system is connected to AC power. Since an initializing operation on the sub-end standby power generated by any of the sub-end circuits can only be processed by the maintenance personnel on site, resulting in increased maintenance difficulty and cost waste.

SUMMARY OF THE INVENTION

The invention provides a power generating apparatus capable of controlling the generated sub-end standby powers.

The power generating apparatus of the invention includes a power supply, a first sub-end circuit, a second sub-end circuit and an integrated signal generator. The power supply generates a supply power. The first sub-end circuit and second sub-end circuit respectively generate a first sub-end standby power and a second sub-end standby power. The first sub-end circuit generates a first sub-end control signal and a second sub-end control signal and receives a first integrated control signal. The second sub-end circuit generates a third sub-end control signal and a fourth sub-end control signal and receives a second integrated control signal. The first sub-end circuit cuts off the first sub-end standby power according to the first integrated control signal, and turns on the first sub-end standby power again after a first delay time. The second sub-end circuit cuts off the second sub-end standby power according to the second integrated control signal, and turns on the second sub-end standby power again after a second delay time. The integrated signal generator generates the first integrated control signal according to the first sub-end control signal and the third sub-end control signal, and generates the second integrated control signal according to the second sub-end control signal and the fourth sub-end control signal.

Based on the above, each sub-end circuit in the power generating apparatus of the invention can generate a plurality of sub-end control signals so the integrated signal generator can generate the integrated control signals according to the sub-end control signals. Also, each sub-end circuit can control the generated sub-end standby power according to the received integrated control signal. Accordingly, the power generating apparatus of the invention can improve the capability of remotely maintaining the system, and reduce the frequency at which managers need to conduct on-site maintenance.

DESCRIPTION OF THE EMBODIMENTS

With reference toFIG. 1,FIG. 1is a schematic diagram illustrating a power generating apparatus according to an embodiment of the invention. A power generating apparatus100includes a power supply110, sub-end circuits121and122and an integrated signal generator130. The power supply110is configured to generate a supply power SP. The sub-end circuits121and122are coupled to the power supply110and the integrated signal generator130, and the sub-end circuits121and122are configured to generate sub-end standby power S5P1and S5P2, respectively. Here, the sub-end circuit121generates sub-end control signals CTR11and CTR12, and transmits the sub-end control signals CTR11and CTR12to the integrated signal generator130. The sub-end circuit122generates sub-end control signals CTR21and CTR22, and transmits the sub-end control signals CTR21and CTR22to the integrated signal generator130. The integrated signal generator130generates an integrated control signal ICTR1according to the sub-end control signals CTR11and CTR21, and transmits the integrated control signal ICTR1to the sub-end circuit121. The integrated signal generator130further generates an integrated control signal ICTR2according to the sub-end control signals CTR12and CTR22, and transmits the integrated control signal ICTR2to the sub-end circuit122.

On the other hand, the sub-end circuit121receives the integrated control signal ICTR1and performs a control action of the sub-end standby power S5P1according to the integrated control signal ICTR1. In detail, when the integrated control signal ICTR1is configured to indicate that the control action needs to be performed on the sub-end standby power S5P1, the sub-end circuit121can stop generating (can cut off) the sub-end standby power S5P1at a first time point according to the integrated control signal ICTR1. Also, the sub-end standby power S5P1may be turned on again after a first delay time from the first time point. Here, it should be noted that, by cutting off the sub-end standby power S5P1for one first delay time, the sub-end standby power S5P1can have a sufficient discharge time to be discharged to a relatively lower voltage level. Accordingly, a sub-system connected to the sub-end circuit121can have enough time for discharging and completing a reset action.

Similarly, the sub-end circuit122receives the integrated control signal ICTR2and performs a control action of the sub-end standby power S5P2according to the integrated control signal ICTR2. In detail, when the integrated control signal ICTR2is configured to indicate that the control action needs to be performed on the sub-end standby power S5P2, the sub-end circuit122can stop generating (can cut off) the sub-end standby power S5P2at a second time point according to the integrated control signal ICTR2. Also, the sub-end standby power S5P2may be turned on again after a second delay time from the second time point. As similar to the above description, by cutting off the sub-end standby power S5P2for one second delay time, the sub-end standby power S5P2can have a sufficient discharge time to be discharged to a relatively lower voltage level. Accordingly, a sub-system connected to the sub-end circuit122can have enough time for discharging and completing a reset action.

Here, it should be noted that, the first time point and the second time point may be identical or different, and the first delay time and the second delay time may be identical or different. The invention is not limited thereto.

More specifically, the integrated control signals ICTR1and ICTR2are generated according to the sub-end control signals CTR11, CTR21and CTR12and CTR22, respectively. In other words, one single sub-end circuit (with the sub-end circuit121as an example) can control action of the sub-end circuits121and122for generating the sub-end standby power S5P1and S5P2. For example, the sub-end circuit121can control the sub-end standby power S5P1generated by itself through the generated sub-end control signal CTR11. The sub-end circuit121can also control the sub-end standby power S5P2generated by the sub-end circuit122through the generated sub-end control signal CTR12.

In this embodiment, the integrated signal generator130can perform a logic operation on the sub-end control signals CTR11and CTR21and the sub-end control signals CTR12and CTR22to generate the integrated control signals ICTR1and ICTR2, respectively. For instance, the integrated signal generator130can perform a logic AND operation on the sub-end control signals CTR11and CTR21to generate the integrated control signal ICTR1, and perform the logic AND operation on the sub-end control signals CTR12and CTR22to generate the integrated control signal ICTR2. When both the sub-end control signals CTR11and CTR21are at logic high level, the integrated signal generator130can generate the integrated control signal ICTR1at logic high level. The sub-end circuit121can maintain an output action of the sub-end standby power S5P1normally according to the integrated control signal ICTR1at logic high level. In contrast, when at least one of the sub-end control signals CTR11and CTR21is at logic low level, the integrated signal generator130can generate the integrated control signal ICTR1at logic low level. The sub-end circuit121can cut off the output action of the sub-end standby power S5P1according to the integrated control signal ICTR1at logic low level.

Similarly, when both the sub-end control signals CTR12and CTR22are at logic high level, the integrated signal generator130can generate the integrated control signal ICTR2at logic high level. The sub-end circuit122can maintain an output action of the sub-end standby power S5P2normally according to the integrated control signal ICTR2at logic high level. In contrast, when at least one of the sub-end control signals CTR12and CTR22is at logic low level, the integrated signal generator130can generate the integrated control signal ICTR2at logic low level. The sub-end circuit122can cut off the output action of the sub-end standby power S5P2according to the integrated control signal ICTR2at logic low level.

With reference toFIG. 2,FIG. 2is a schematic diagram illustrating a power generating apparatus according to another embodiment of the invention. A power generating apparatus200includes a power supply210, sub-end circuits221and222and an integrated signal generator230. The power supply210is configured to generate a supply power SP. Here, the power supply210includes a plurality of sub-power supplies211to214. The sub-power supplies211to214are configured to commonly generate the supply power SP. In an embodiment of the invention, the sub-power supplies211to214can operate together to generate the supply power SP. Alternatively, in other embodiments of the invention, a part of the sub-power supplies211to214may be planned as backup power generators and configured to be activated at a proper timing to execute the action of generating the supply power SP.

In addition, the integrated signal generator230may be a circuit board. The integrated signal generator230includes wires WIR1and WIR2disposed on the circuit board. The wire WIR1is configured to receive the sub-end control signal CTR11generated by the sub-end circuit221and the sub-end control signal CTR21generated by the sub-end circuit222, and perform a wire AND operation on the sub-end control signal CTR11and the sub-end control signal CTR21to thereby generate the integrated control signal ICTR1. In addition, the wire WIR2is configured to receive the sub-end control signal CTR12generated by the sub-end circuit221and the sub-end control signal CTR22generated by the sub-end circuit222, and perform the wire AND operation on the sub-end control signal CTR12and the sub-end control signal CTR22to thereby generate the integrated control signal ICTR2.

In this embodiment, the sub-end circuit221includes a control signal generation circuit2212, a standby power controller2213and a baseboard management controller (BNC)2211. The sub-end circuit222includes a control signal generation circuit2222, a standby power controller2223and a baseboard management controller (BNC)2221. The baseboard management controller2211generates the sub-end control signals CTR11and CTR12, and transmits the sub-end control signals CTR11and CTR12to the wires WIR1and WIR2, respectively. When the baseboard management controller2211intends to turn off the sub-end circuit221, simply by pulling down the sub-end control signal CTR11, the integrated control signal ICTR1may become logic low level due to the wire AND logic operation so the control signal generation circuit2112can be notified to generate a voltage on/off control signal POF1for turning off the standby power controller2213. Until the sub-end control signal CTR11is released (the sub-end control signal CTR11is pulled up) by the baseboard management controller2211, the integrated control signal ICTR1is restored to logic high level, and the control signal generation circuit2212can ensure that the voltage on/off control signal POF1is delayed by a period of time in order make sure that the power of the sub-end circuit211can be effectively discharged.

On the other hand, the control signal generation circuit2212receives the integrated control signal ICTR1and generates the voltage on/off control signal POF1according to the integrated control signal ICTR1. The standby power controller2213is coupled to the control signal generation circuit2212, generates the sub-end standby power S5P1according to the voltage on/off control signal POF1, and performs the control action of the sub-end standby power S5P1. The control signal generation circuit2222receives the integrated control signal ICTR2and generates a voltage on/off control signal POF2according to the integrated control signal ICTR2. The standby power controller2223is coupled to the control signal generation circuit2222, generates the sub-end standby power S5P2according to the voltage on/off control signal POF2, and performs the control action of the sub-end standby power S5P2.

It should be noted that, the control signal generation circuits2212and2222can generate the voltage on/off control signals POF1and POF2according to the integrated control signals ICTR1and ICTR2, respectively. When the standby power controllers2213and2223respectively cut off the sub-end standby power S5P1and S5P2respectively according to the voltage on/off control signals POF1and POF2, the sub-end standby power S5P1and S5P2will be maintained in a cut-off state for one delay time, and the output actions of the sub-end standby power S5P1and S5P2will be turned on again respectively by the standby power controllers2213and2223the after the delay time.

It can be seen from the above description that, in the embodiments of the invention, any one of the substrate management controllers2221and2222can control the sub-end standby power S5P1or S5P2generated by the same or different sub-end circuits by sending the sub-end control signal (any one of the sub-end control signals CTR11to CTR22), so as to effectively perform a remote control.

With reference toFIG. 3,FIG. 3is a schematic diagram illustrating a power generating apparatus according to another embodiment of the invention. A power generating apparatus300includes a power supply310, sub-end circuits321to324and an integrated signal generator330. The power supply310includes sub-power supplies311to314configured to commonly generate a supply power SP.

Unlike the foregoing embodiment, the power generating apparatus300includes a higher number of sub-end circuits321to324. The sub-end circuits321to324respectively include baseboard management controllers3211,3221,3231and3241, control signal generation circuits3212,3222,3232and3242and standby power controllers3213,3223,3233and3243. Each of the baseboard management controllers3211,3221,3231and3241generates four sub-end control signals. Here, the baseboard management controller3211generates sub-end control signals CTR11to CTR14; the baseboard management controller3221generates sub-end control signals CTR21to CTR24; the baseboard management controller3231generates sub-end control signals CTR31to CTR34; the baseboard management controller3241generates sub-end control signals CTR41to CTR44. The integrated signal generator330is configured to generate integrated control signals ICTR1to ICTR4, and transmit the integrated control signals ICTR1to ICTR4to the sub-end circuits321to324, respectively.

With reference toFIG. 4,FIG. 4is a schematic diagram illustrating an implementation of a control signal generation circuit according to an embodiment of the invention. A control signal generation circuit410is coupled to a standby power controller420. The control signal generation circuit410includes an isolation circuit411and a delay output circuit412. The isolation circuit411receives an integrated control signal ICTR, and outputs an output signal OS according to the integrated control signal ICTR. The delay output circuit412is coupled to the isolation circuit411, and receives the output signal OS generated from the integrated control signal ICTR. The delay output circuit412delays the output signal OS to generate a voltage on/off control signal POF.

In this embodiment, the isolation circuit411and the delay output circuit412receive the supply power OS as an operational power. Here, in a standby state or a normal operating state, the supply power SP is maintained at a normal voltage value.

In addition, the standby power controller420receives the supply power SP, and determines whether to generate a sub-end standby power S5P based on the supply power SP according to the voltage on/off control signal POF. The standby power controller420may be equivalent to a switch element, and may isolate the power supply SP and the sub-end standby power S5P from each other according to the voltage on/off control signal POF. Also, under the condition that the supply power SP and the sub-end standby power S5P are isolated from each other, a discharge operation of the sub-end standby power S5P does not affect the voltage value of the supply power SP. In this way, the isolation circuit411and the delay output circuit412can still maintain the normal action.

Implementation details regarding to the control signal generation circuit410and the standby power controller420may refer toFIG. 5, which is a circuit schematic diagram illustrating a control signal generation circuit and a standby power controller according to an embodiment of the invention. InFIG. 5, the control signal generation circuit410includes the isolation circuit412and the delay output circuit411. The standby power controller420includes a transistor MA1. Further, the isolation circuit412includes a capacitance pull-up resistor RUP, resistors R1and R2and transistors M1and M2, and the delay output circuit411includes a capacitor C1, resistors R3, R4and R5and a transistor M3. Among them, the capacitor C1and the resistors R3and R4compose a resistor-capacitor circuit.

In this embodiment, a control terminal of the transistor M1receives the integrated control signal ICTR. A first terminal of the resistor R1receives the supply power SP, and a second terminal of the resistor R1is coupled to the control terminal of the transistor M1. A first terminal of the resistor R2is coupled to the control terminal of the transistor M1, and a second terminal of the resistor R2receives a reference ground voltage GND. The pull-up resistor RUP has a first terminal receiving the supply power SP, and a second terminal of the pull-up resistor RUP is coupled to a control terminal of the transistor M2. On the other hand, a first terminal of the transistor M2generates the output signal OS, and a second terminal of the transistor M2receives the reference ground voltage GND.

On the other hand, in the delay output circuit411, a first terminal of the resistor R4is coupled to the first terminal of the transistor M2, and a second terminal of the resistor R4receives the reference ground voltage GND. A first terminal of the resistor R3receives the supply power SP, and a second terminal of the resistor R3is coupled to a control terminal of the transistor M3. A first terminal of the capacitor C1is coupled to the control terminal of the transistor M3, a second terminal of the capacitor C1receives the reference ground voltage GND and is coupled to the resistor R4in parallel. The resistor-capacitor circuit formed by the capacitor C1and the resistors R3and R4can delay the output signal OS to generate a delayed output signal DOS.

The control terminal of the transistor M3is coupled to the first terminal of the capacitor C1and receives the delayed output signal DOS. A first terminal of the transistor M3receives the supply power SP through the resistor R5, and a second terminal of the transistor M3receives the reference ground voltage GND. The transistor M3generates the voltage on/off control signal POF on the first terminal according to the delay output signal DOS. The voltage on/off control signal POF is transmitted to a control terminal of the transistor MA1, and configured to control to turned-on or cut-off states of the transistor MA1.

In this embodiment, the transistors M1to M3are the N-type transistors and the transistor MA1is the P-type transistor.

In terms of action details, when the integrated control signal ICTR is at logic high level, the transistor M1is turned on, the voltage on the control terminal of the transistor M2is pulled down to logic low level (equal to the reference ground voltage GND) so that the transistor M2is cut off. The resistor R3pulls up the voltage on the control terminal of the transistor M3to logic high level according to the supply voltage SP so that the transistor M3is turned on. Correspondingly, the first terminal of the transistor M3can generate the voltage on/off control signal POF equal to logic low level so that the transistor MA is turned on. In this state, the sub-end standby power controller420can generate the sub-end standby power S5P according to the supply power SP.

On the other hand, when the integrated control signal ICTR is switched to logic low level, the transistor M1is cut off. Through the pull-up resistor RUP, the control terminal of the transistor M2is pulled up to logic high level so that the transistor M2is turned on. The first terminal of the transistor M2can generate the output signal OS equal to logic low level. With a delay effect generated by the capacitor C1and the resistors R3and R4, the control terminal of the transistor M3can receive the output signal OS (equal to logic low level) to be correspondingly cut off. Accordingly, through a pull-up operation of the resistor R5, the first terminal of the transistor M3can generate the voltage on/off control signal POF at logic high level so that the transistor MA is cut off and stopped from generating the sub-end standby power S5P.

Here, it should be noted that, the integrated control signal ICTR can be transitioned to logic high level (a low pulse signal) after being maintained at logic low level for over a time period, and the delay effect generated by the capacitor C1and the resistors R3and R4can extend a time length of the voltage on/off control signal POF maintained at logic high level. In other words, a time length of the transistor MA being cut off may be maintained.

In this embodiment, the delay time generated by the delay effect of the capacitor C1and the resistors R3and R4may be determined according to a discharging speed of the sub-end standby power S5P without particular limitations.

In summary, in the power generating apparatus of the invention, each sub-end circuit can control the sub-end standby power generated by any one of the sub-end circuits by sending the sub-end control signal. As a result, each of the sub-end circuits can have the capability of performing the remotely control on each other to effectively improve system performance.