Array substrate and method for manufacturing the same, display apparatus

The present disclosure provides an array substrate and a method for manufacturing the same, and a display apparatus. The array substrate comprises a shielding electrode driven independently, and the shielding electrode covers at least one gate line and/or at least one data line. The shielding electrode can isolate a signal of the at least one gate line and/or the at least one data line, so that the signal of the at least one gate line and/or the at least one data line is prevented from interfering with normal deflections of liquid crystal molecules of a liquid crystal display. Moreover, since the shielding electrode is driven independently, the shielding electrode will not affect a voltage of a common electrode of the liquid crystal display.

CROSS-REFERENCE TO RELATED APPLICATION

The present disclosure claims priority of Chinese Patent Application No. 201621155992.6 filed on Oct. 24, 2016, the disclosure of which is hereby incorporated herein by reference in its entirety.

TECHNICAL FIELD

The present disclosure relates to the field of liquid crystal display technology, and particularly, to an array substrate and a method for manufacturing the same, and a display apparatus.

BACKGROUND

Currently, a thin film transistor liquid crystal display (TFT-LCD) is dominant in the field of display due to its advantages such as small volume, low power consumption, radiation-free, and low manufacturing cost. Generally, a liquid crystal display comprises an array substrate, a color filter substrate, and a liquid crystal layer provided between the array substrate and the color filter substrate. The array substrate comprises a gate line and a data line, signals of which may interfere with normal deflections of liquid crystal molecules in the liquid crystal layer, resulting in a poor quality of an image displayed by the liquid crystal display.

SUMMARY

An embodiment of the present disclosure provides an array substrate comprising a base, and a plurality of gate lines and a plurality of data lines formed on the base, the array substrate further comprises at least one shielding electrode driven independently, and the at least one shielding electrode covers at least one of at least one of the gate lines and at least one of the data lines.

Optionally, the gate lines and the data lines intersect to define a plurality of display regions, and the at least one shielding electrode includes more than one shielding electrodes, the shielding electrodes cover more than one of the gate lines and more than one of the data lines, the shielding electrodes covering more than one of the gate lines and the shielding electrodes covering more than one of the data lines intersect to define at least one shielding region, and the at least one shielding region covers at least one of the display regions.

Optionally, the shielding electrodes covering more than one of the gate lines are arranged at equal intervals, and the shielding electrodes covering more than one of the data lines are arranged at equal intervals.

Optionally, the array substrate further comprises a first driving line for driving the shielding electrodes, and the first driving line is connected to the shielding electrodes covering more than one of the gate lines and the shielding electrodes covering more than one of the data lines.

Optionally, the array substrate further comprises a plurality of second driving lines, and each of the second driving lines is connected to at least one group of the shielding electrodes.

Optionally, driving voltages of the second driving lines are different from each other.

Optionally, a first insulating layer is provided between the at least one shielding electrode and the gate lines or the data lines.

Optionally, the array substrate further comprises a common electrode covering the gate lines and the data lines, the at least one shielding electrode is provided on a side of the common electrode proximal to the gate lines and the data lines.

Optionally, a second insulating layer is provided between the at least one shielding layer and the common electrode.

Optionally, the array substrate further comprises a pixel electrode, the at least one shielding electrode and the pixel electrode are formed of a same material in a same layer.

Alternatively, the array substrate may comprise common electrodes provided in the display regions, the shielding electrodes and the common electrodes are formed of a same material in a same layer.

Optionally, the shielding electrode has a width equal to or larger than a width of the gate line, and/or, the shielding electrode has a width equal to or larger than a width of the data line.

Optionally, the shielding electrode is formed of a transparent conductive material.

An embodiment of the present disclosure further provides a display apparatus comprising a color filter substrate and an array substrate described as above.

Optionally, the color filter substrate comprises a common electrode, an orthographic projection of the common electrode on the array substrate at least partially overlaps with an orthographic projection of the shielding electrode on the array substrate.

Optionally, the common electrode and the shielding electrode are driven by a same driving voltage.

An embodiment of the present disclosure further provides a method for manufacturing the array substrate described as above, the method comprising steps of:

forming a plurality of gate lines and a plurality of data lines on a base;

forming at least one shielding electrode covering at least one of at least one of the gate lines and at least one of the data lines, the at least one shielding electrode being driven independently.

Optionally, the method further comprising a step of: forming a first insulating layer between the at least one shielding electrode and the gate lines or the data lines.

Optionally, the method further comprising a step of: forming a common electrode covering the gate lines and the data lines, the at least one shielding electrode being provided on a side of the common electrode proximal to the gate lines and the data lines.

Optionally, the method further comprising a step of: forming a second insulating layer between the at least one shielding electrode and the common electrode.

DESCRIPTION OF EMBODIMENTS

In order to make a person skilled in the art understand technical solutions of the present disclosure better, the array substrate and the method for manufacturing the same, and the display apparatus provided by the present disclosure will be described in detail below in conjunction with the accompanying drawings.

Generally, a liquid crystal display comprises an array substrate, a color filter substrate, and a liquid crystal layer provided between the array substrate and the color filter substrate.

FIG. 1shows a top view of a structure of an array substrate. As shown inFIG. 1, the array substrate comprises gate lines1, data lines3, thin film transistors2and pixel electrodes4. The gate lines1and the data lines3intersect to define display regions6, and the thin film transistors2and the pixel electrodes4are provided in the display regions6.

According to a display mode of the liquid crystal display, the array substrate may further comprise a common electrode; alternatively, the common electrode may be provided in the color filter substrate.

By providing signals to the gate lines1and the data lines3of the array substrate, electrical fields between the common electrode and the pixel electrodes4may be controlled through the thin film transistors2, so that liquid crystal molecules in the liquid crystal layer deflect, and different polarized light rays are emitted from the display regions6respectively to achieve a display.

However, during displaying, signals of the gate lines1and the data lines3generally interfere with normal deflections of the liquid crystal molecules so that an emission of polarized light rays of the display regions6is affected, resulting in a poor quality of an image displayed by the liquid crystal display.

For example, the common electrode may be provided in the array substrate and covers the gate lines1and the data lines3to reduce an interference of signals of the gate lines1and the data lines3to the liquid crystal molecules; however, signals of the gate lines1and the data lines3also interfere with a voltage of the common electrode, so that electrical fields between the pixel electrodes4and the common electrode are affected, resulting in an non-uniform display and a flicker of the image displayed by the liquid crystal display.

An embodiment of the present disclosure provides an improved array substrate. As shown inFIGS. 2 and 3, the array substrate comprises a base9, and a plurality of gate lines1and a plurality of data lines3formed on the base9. The array substrate further comprises at least one shielding electrode7driven independently, and the at least one shielding electrode7covers at least one of at least one of the gate lines1and at least one of the data lines3.

In the array substrate provided by the embodiment of the present disclosure, the at least one shielding electrode7is provided on the base9to cover at least one of the gate lines1and/or at least one of the data lines3so as to isolate a signal of the at least one of the gate lines1and/or the at least one of the data lines3, and thus the signal of the at least one of the gate lines1and/or the at least one of the data lines3is prevented from interfering with the normal deflections of the liquid crystal molecules, thereby improving the quality of the image displayed by the liquid crystal display.

Moreover, the shielding electrode7is driven independently. For example, the shielding electrode7and the common electrode of the liquid crystal display are driven separately, and thus the shielding electrode7will not interfere with the voltage of the common electrode of the liquid crystal display, thereby avoiding the non-uniform display and the flicker of the image displayed by the liquid crystal display.

For example, each shielding electrode7may be of a strip-like shape to cover one of the gate lines1or one of the data lines3, however, the present disclosure is not limited thereto, an ordinary skilled person in the art can determine the shape of each shielding electrode7as required.

Specific embodiments are described in detail below.

First Embodiment

As shown inFIGS. 2 and 3, the array substrate of the present embodiment comprises a common electrode5covering the gate lines1and the data lines3, and the shielding electrode7is provided on a side of the common electrode5proximal to the gate lines1and the data lines3.

Specifically, as shown inFIGS. 2 and 3, the array substrate comprises the base9, the gate lines1and the data lines3provided on the base9, the common electrode5covering the gate lines1and the data lines3, and the shielding electrode7driven independently. The shielding electrode7covers at least one of the gate lines1and/or at least one of the data lines3, and the shielding electrode7is provided on the side of the common electrode proximal to the gate lines1and the data lines3.

Correspondingly, in the manufacturing process of the array substrate of the present embodiment, the gate lines1and the data lines3are first formed on the base9; the shielding electrode7driven independently is then formed on the gate lines1and the data lines3, the shielding electrode7covering at least one of the gate lines1and/or at least one of the data lines3; and thereafter, the common electrode5is formed on the shielding electrode7, so that a structure, in which the shielding electrode7is provided between the common electrode5, and the gate lines1and the data lines3, is formed.

In the present embodiment, the shielding electrode7is closer to the gate lines1and the data lines3than the common electrode5, that is, the shielding electrode7is provided between the common electrode5, and the gate lines1and the data lines3, so that the shielding electrode7can isolate the signal of the at least one of the gate lines1and/or at least one of the data lines3covered by the shielding electrode7, the signal of the gate lines1and/or at least one of the data lines3is prevented from interfering with the voltage of the common electrode5, and the image is displayed more uniformly by the liquid crystal display.

It should be noted that, the gate lines1may be formed on the base9prior to the formation of the data lines3, or the gate lines1may be formed on the base9after the formation of the data lines3. As shown inFIG. 3, in the present embodiment, an example in which the gate lines1are formed on the base9prior to the formation of the data lines3is described. In order to avoid an electrical connection between the shielding electrode7and the data lines3, a data line insulating layer11may be provided between the shielding electrode7and the data lines3, and in order to avoid an electrical connection between the shielding electrode7and the common electrode5, a shielding electrode insulating layer12may be provided between the shielding electrode7and the common electrode5, and in order to avoid an electrical connection between the data lines3and the gate lines1, a gate line insulating layer16may be provided between the data lines3and the gate lines1.

Optionally, as shown inFIG. 2, the shielding electrode7has a width equal to or larger than a width of the gate line1, and/or, the shielding electrode7has a width equal to or larger than a width of the data line3. Specifically, the shielding electrode7covering the gate line1has a width equal to or larger than the width of the gate line1, and the shielding electrode7covering the data line3has a width equal to or larger than the width of the data line3, thus the shielding electrode7isolates the gate line1and the data line3, signals of the gate lines1and the data lines3are prevented from interfering with the liquid crystal molecules and the voltage of the common electrode5.

In the present embodiment, as shown inFIG. 2, the gate lines1and the data lines3define a plurality of display regions6, the at least one shielding electrode7includes more than one shielding electrodes7, the shielding electrodes7cover more than one of the gate lines1and more than one of the data lines3, the shielding electrodes7covering more than one of the gate lines1and the shielding electrodes7covering more than one of the data lines3intersect to define at least one shielding region8, and the at least one shielding region8covers at least one of the display regions6. That is to say, the shielding electrodes7may cover the gate lines1and the data lines3simultaneously, the shielding electrodes7covering the gate lines1and the shielding electrodes7covering the data lines3intersect to form a net-like structure, and each mesh of the net-like structure is one shielding region8. It should be noted that, a shape and a size of each mesh of the net-like structure depend on a distribution of the shielding electrodes7covering the gate lines and the data lines3, one or more display regions6are provided between adjacent shielding electrodes7covering the gate lines1, and one or more display regions6are provided between adjacent shielding electrodes7covering the data lines3, thus, each mesh of the net-like structure may cover one of the display regions6or more than one of the display regions6.

Optionally, the shielding electrodes7covering the gate lines1are arranged at equal intervals, and the shielding electrodes7covering the data lines3are arranged at equal intervals. In such way, shielding regions8are formed in a same size and a same shape. In the present embodiment, an example in which the shielding regions8have a same size and a same shape and each shielding region8covers one of the display regions6is described. For example, the shielding electrodes7cover all of the gate lines1and the data lines3so as to isolate them, signals of the gate lines1and the data lines3are effectively prevented from interfering with the liquid crystal molecules and the voltage of the common electrode5.

A structure of the shielding electrodes7is described in detail below in conjunction withFIG. 4.

As shown inFIG. 4, the array substrate of the present embodiment may further comprise a first driving line13for driving the shielding electrodes7simultaneously, and the first driving line13is connected to the shielding electrodes7covering the gate lines1and the data lines3. Specifically, the shielding electrodes7covering the gate lines1are connected with the shielding electrodes7covering the data lines3, and the first driving line13is connected to the shielding electrodes7covering the gate lines1and/or the data lines3, which are located nearby. When a driving voltage is applied to the first driving line13, the shielding electrodes7covering the gate lines1and the data lines3are driven by a same voltage.

Optionally, the shielding electrodes7and the common electrode5are driven by a same voltage. In such way, the voltage of the shielding electrodes7will not affect the voltage of the common electrode5, so that the image is displayed more uniformly by the liquid crystal display.

Another structure of the shielding electrodes7is described in detail below in conjunction withFIG. 5.

The shielding electrodes7shown inFIG. 5are distinguished from the shielding electrodes7shown inFIG. 4in that, a same driving voltage is applied to the shielding electrodes7shown inFIG. 4, that is, the shielding electrodes7of all the shielding regions8of the entire array substrate shown inFIG. 4are driven simultaneously by a same driving voltage, in contrast, the shielding electrodes7shown inFIG. 5are driven group by group, each group includes at least one of the shielding electrodes7, for example, the shielding electrodes7of each row of the shielding regions8are driven by a single driving voltage.

As shown inFIG. 5, the array substrate of the present embodiment may comprise a plurality of second driving lines14, and each of the second driving lines14is connected to at least one group of shielding electrodes7, for example, is connected to the shielding electrodes7of at least one shielding region8. Specifically, for example, the array substrate may comprise more than one groups of shielding regions, each group of shielding regions includes at least one shielding region8, the shielding electrodes7of each group of shielding regions are independent of the shielding electrodes7of other groups of shielding regions, that is, the shielding electrodes7of each group of shielding regions are disconnected from the shielding electrodes7of other groups of shielding regions adjacent thereto. As shown inFIG. 5, an example in which each group of shielding regions includes three shielding regions8is described. Each of the second driving lines14is connected to the shielding electrodes7of one group of shielding regions, and when a driving voltage is applied to the second driving line14, the shielding electrodes7connected to the second driving line14are driven.

Optionally, the second driving lines14are provided with different driving voltages, that is, the shielding electrodes7of each group of shielding regions are driven by a driving voltage different from that for driving the shielding electrodes of other groups of shielding regions. Specifically, the shielding electrodes7of each group of shielding regions are driven by a voltage from the second driving line14connected thereto, thus voltages of the common electrode5in different regions may be measured in advance, and then, a corresponding driving voltage is applied to the shielding electrodes7of each region in accordance with the voltage of the common electrode5in the region. In such way, the voltage of the common electrode5may be adjusted by the voltage of the shielding electrodes7in the corresponding region, such that voltages of the common electrode5in different regions are more uniform, the display effect of the image displayed by the liquid crystal display is improved.

Referring toFIGS. 2 and 6, the array substrate of the present embodiment further comprises pixel electrodes4, the shielding electrodes7and the pixel electrodes4are formed of a same material in a same layer. Optionally, the shielding electrodes7are formed of a transparent conductive material.

Correspondingly, in the manufacturing process of the array substrate of the present embodiment, the gate lines1and the data lines3are first formed on the base9; the shielding electrodes7and the pixel electrodes4are then simultaneously formed on the gate lines1and the data lines3, i.e., the shielding electrodes7and the pixel electrodes4are formed by a single patterning process; and thereafter, the common electrode5is formed on the shielding electrodes7and the pixel electrodes4. In such way, the shielding electrodes7are formed without increasing steps of the process, only the pattern to be formed by the patterning process is required to be changed, the process is simple.

Second Embodiment

The structure and the driving mode of the shielding electrodes in the array substrate of the present embodiment are the same as those in the first embodiment, referring toFIGS. 7 and 8, the present embodiment is distinguished from the first embodiment in that, the common electrode5of the first embodiment covers the entire array substrate to cover the gate lines1and the data lines3, the shielding electrodes7are provided between the common electrode5, and the gate lines1and the data lines3, in contrast, common electrodes5of the present embodiment are provided in the display regions respectively, and the shielding electrodes7and the common electrodes5are provided in a same layer.

Specifically, referring toFIGS. 7 and 8, in the array substrate of the present embodiment, each of the common electrodes5is provided within one of the display regions6, the shielding electrodes7and the common electrodes5are formed of a same material in a same layer. Since each of the common electrodes5is provided within one of the display regions6, the gate lines1and the data lines3are not covered by the common electrodes5, and the shielding electrodes7cover at least one of the gate lines1and/or at least one of the data lines3, thus patterns of the common electrodes5do not interfere with patterns of the shielding electrodes7, the common electrodes5and the shielding electrodes7may be formed by a single patterning process, resulting in a simple process.

Correspondingly, in the manufacturing process of the array substrate of the present embodiment, first, the gate lines1and the data lines3are formed on the base9, then the pixel electrodes4are formed on the gate lines1and the data lines3, and thereafter, the common electrodes5and the shielding electrodes7are formed simultaneously on the pixel electrodes4.

Third Embodiment

The present embodiment provides a display apparatus comprising any of the array substrates described as above. The display apparatus of the present embodiment may be any product or part with a display function, such as a liquid crystal display panel, an electronic paper, a mobile phone, a tablet computer, a television, a digital photo frame.

The structure and the driving mode of the shielding electrodes in the display apparatus of the present embodiment are the same as those in the first and second embodiments, referring toFIG. 9, the present embodiment is distinguished from the first and second embodiments in that, the common electrode5in the first and second embodiments is provided in the array substrate, in contrast, the common electrode5of the present embodiment is provided in the color filter substrate.

Specifically, as shown inFIG. 9, the display apparatus of the present embodiment comprises an array substrate and a color filter substrate which are aligned and assembled into a cell, the color filter substrate comprises a base15and the common electrode5provided on the base15, the array substrate comprises the shielding electrodes7, a liquid crystal layer may be provided between the common electrode5and the shielding electrodes7, and the orthographic projection of the common electrode5on the array substrate at least partially overlaps with orthographic projections of the shielding electrodes7on the array substrate, that is to say, there is an overlapped region between the common electrode5and the shielding electrodes7.

Optionally, the shielding electrodes7and the common electrode5are driven by a same driving voltage so that there is no electrical field between the shielding electrodes7and the common electrode5in the overlapped region between the common electrode5and the shielding electrodes7, the liquid crystal molecules in the overlapped region between the common electrode5and the shielding electrodes7will not deflect due to the electrical field between the shielding electrodes7and the common electrode5, thus light leakage due to the electrical field between the shielding electrodes7and the common electrode7is avoided.

It should be understood that, the above embodiments are merely exemplary embodiments for explaining principle of the present disclosure, but the present disclosure is not limited thereto. Various modifications and improvements may be made by those ordinary skilled in the art within the spirit and essence of the present disclosure, these modifications and improvements fall into the protection scope of the present disclosure.