Liquid crystal display device

A liquid crystal display device (1) includes a plurality of source bus lines (14), a plurality of gate bus lines (11) that cross the plurality of source bus lines (14), and a plurality of auxiliary capacitance lines (29) that extend in parallel with the gate bus lines (11). The liquid crystal display device (1) also includes a plurality of pixels (30) to (32) that respectively include TFTs (5), pixel electrodes (19), a common electrode (24), and a liquid crystal layer (4) and that are arranged in a matrix so as to correspond to the respective intersections of the gate bus lines (11) and the source bus lines (14). A pixel electrode (19a) for the pixel (31) is disposed in the pixel (30) that is adjacent to the pixel (31), and in a plan view, the gate bus line (11b) disposed in the pixel (31) and the pixel electrode (19a) for the pixel (31) are arranged apart from each other so as not to overlap.

TECHNICAL FIELD

The present invention relates to an active matrix type liquid crystal display device that uses a switching element such as a thin film transistor.

BACKGROUND ART

In recent years, an active matrix type liquid crystal display device that has advantages such as thin-profile, light-weight, low drive voltage, and low power consumption has been widely used as a display panel for various electronic devices such as mobile terminal devices including mobile phones, portable gaming devices, and the like or laptop computers.

A primary part of such an active matrix type liquid crystal display device includes a liquid crystal display panel as a display section that is constituted of a plurality of pixels that are arranged in a matrix, and a driver circuit therefor. In the liquid crystal display panel, a plurality of data signal lines (hereinafter referred to as “source bus lines”) and a plurality of scanning signal lines (hereinafter referred to as “gate bus lines”) are disposed so as to cross each other in a lattice pattern. Further, a plurality of auxiliary capacitance lines are disposed so as to extend in parallel with the plurality of gate bus lines. At each of the intersections of the plurality of source bus lines and the plurality of gate bus lines, one corresponding pixel is provided. The liquid crystal display panel also includes a common electrode (or an opposite electrode) that is commonly disposed for the plurality of pixels arranged in a matrix and that faces pixel electrodes provided in the respective pixels through a liquid crystal layer.

FIG. 11is an equivalent circuit diagram showing an electrical configuration of two adjacent pixels in a liquid crystal display panel of a liquid crystal display device configured in a manner described above. Each pixel includes a thin film transistor (hereinafter abbreviated as “TFT”)52as a switching element and a pixel electrode53connected to the drain electrode of the TFT52. The source electrode of the TFT52is connected to the source bus line50that passes through an intersection corresponding thereto, and the gate electrode is connected to the gate bus line51that passes through the same intersection. A liquid crystal capacitance C1cis formed by the pixel electrode53and the common electrode54. An auxiliary capacitance Csis formed by the pixel electrode53and the auxiliary capacitance line disposed along the gate bus line51.

These liquid crystal capacitance C1cand auxiliary capacitance Csform a pixel capacitance that holds a voltage that indicates a value of a pixel to be formed by each pixel. Also, in each pixel, a parasitic capacitance Cgd1is formed between the pixel electrode53for the pixel and the gate bus line51.

Because of the parasitic capacitance Cgd1formed between the gate bus line51and the pixel electrode53in each pixel, when a data signal is applied to the source bus line50, and when a voltage of a scanning signal is lowered from an ON voltage Vghof the gate bus line51to an OFF voltage Vg1of the gate bus line51, a level shift ΔVdcaused by the parasitic capacitance Cgd1is generated in a potential (pixel potential) Vdof the pixel electrode53. This level shift ΔVdis referred to as “feed-through voltage,” “lead-in voltage”, or the like. The feed-through voltage ΔVdis represented by the following formula:
ΔVd=(Vgh−Vg1)·Cgd1/(C1c+Cs+Cgd1)  (1)

Such a feed-through voltage ΔVdcauses flickering, quality degradation, and the like in a displayed image. Generally, in a liquid crystal display panel driven by TFTs, an asymmetric voltage applied to a liquid crystal layer causes flickering, thereby significantly lowering the display quality. It also causes image burn-in when left uncontrolled for a long period of time.

A liquid crystal display device for solving this problem has been proposed. Specifically, a liquid crystal display device that includes groups of wiring lines arranged in a matrix, a plurality of active elements, and a liquid crystal layer and that is configured such that conductive layers maintained at a prescribed potential are selectively disposed around pixel electrodes provided for the respective pixels has been disclosed. The disclosure describes that according to such a configuration, parasitic capacitances between the pixel electrodes and the gate bus lines can be reduced, and therefore, a swing of a voltage applied to the liquid crystal layer becomes smaller, resulting in the improvement of the picture quality (see Patent Document 1, for example).

RELATED ART DOCUMENTS

Patent Documents

SUMMARY OF THE INVENTION

Problems to be Solved by the Invention

However, the liquid crystal display device described in Patent Document 1 above had a problem in that because the conductive layers need to be disposed around the pixel electrode to reduce the parasitic capacitances, the aperture ratio is reduced by the conductive layer regions, and as a result, the performance of the liquid crystal display device is lowered.

Also, because the conductive layers need to be disposed separately, it caused another problem of making the manufacturing process more complex and increasing the cost.

The present invention was made in view of the above-mentioned problems. It is an object of the present invention to provide a liquid crystal display device that can prevent degradation in display quality caused by flickering without reducing the aperture ratio or increasing the cost.

Means for Solving the Problems

In order to achieve the above-mentioned object, a liquid crystal display device according to the present invention includes: a plurality of data signal lines; a plurality of scanning signal lines that cross the plurality of data signal lines; a plurality of auxiliary capacitance lines that extend in parallel with the scanning signal lines; a plurality of pixels each including a switching element that turns to an ON state when the scanning signal line is in a selected state and that turns to an OFF state when the scanning signal line is in a non-selected state, and a pixel electrode connected to the data signal line through the switching element, the plurality of pixels being arranged in a matrix so as to correspond to respective intersections of the plurality of data signal lines and the plurality of scanning signal lines, a common electrode disposed so as to face the pixel electrodes, and a liquid crystal layer sandwiched by the pixel electrodes and the common electrode. In the liquid crystal display device according to the present invention, the pixel electrode for a first pixel among the plurality of pixels is disposed in a second pixel that is adjacent to the first pixel, and the scanning signal line disposed in the first pixel and the pixel electrode for the first pixel are disposed apart from each other so as not to overlap in a plan view.

According to this configuration, a parasitic capacitance between the pixel electrode for the first pixel and the scanning signal line disposed in the first pixel can be reduced, allowing for a reduction in a feed-through voltage of the pixel electrode for the first pixel. This makes it possible to prevent degradation of display quality caused by flickering.

The present invention differs from the above-mentioned conventional technique in that there is no need to form conductive layers around the pixel electrodes, and it only requires a modification to wiring lines in the pixels. This makes it possible to prevent degradation of display quality caused by flickering without reducing the aperture ratio or increasing the cost.

The liquid crystal display device according to the present invention may also be configured such that a relationship represented by d1>d2is satisfied, where d1is a distance between the scanning signal line disposed in the first pixel and the pixel electrode disposed in the second pixel, and d2is a distance between the scanning signal line disposed in the first pixel and the pixel electrode disposed in the first pixel.

According to this configuration, the parasitic capacitance between the pixel electrode for the first pixel and the scanning signal line disposed in the first pixel can be reliably reduced. This makes it possible to reliably reduce the feed-through voltage of the pixel electrode for the first pixel.

The liquid crystal display device according to the present invention may also be configured such that the auxiliary capacitance lines are disposed between the pixels, respectively.

Another liquid crystal display device according to the present invention includes: a plurality of data signal lines; a plurality of scanning signal lines that cross the plurality of data signal lines; a plurality of auxiliary capacitance lines that extend in parallel with the scanning signal lines; a plurality of pixels each including a switching element that turns to an ON state when the scanning signal line is in a selected state and that turns to an OFF state when the scanning signal line is in a non-selected state, and a pixel electrode connected to the data signal line through the switching element, the plurality of pixels being arranged in a matrix so as to correspond to respective intersections of the plurality of data signal lines and the plurality of scanning signal lines, a common electrode disposed so as to face the pixel electrodes, and a liquid crystal layer sandwiched by the pixel electrodes and the common electrode. In another liquid crystal display device according to the present invention, the scanning signal lines are disposed between the pixels, respectively, and areas where each scanning signal line overlap the respective pixel electrodes of the two pixels adjacent to the scanning signal line differ from each other in a plan view.

According to this configuration, a parasitic capacitance between the pixel electrode of the first pixel and the scanning signal line disposed for the first pixel can be reduced, allowing for the reduction in a feed-through voltage of the pixel electrode for the first pixel. This makes it possible to prevent degradation of display quality caused by flickering.

The present invention differs from the above-mentioned conventional technique in that there is no need to provide conductive layers around the pixel electrodes, and it only requires a modification to wiring lines in the pixels. This makes it possible to prevent degradation of display quality caused by flickering without reducing the aperture ratio or increasing the cost.

Another liquid crystal display device according to the present invention may also be configured such that a relationship represented by S1<S2is satisfied, where S1is an area where the scanning signal line disposed for a first pixel among the plurality of pixels overlaps the pixel electrode disposed in the first pixel, and S2is an area where the scanning signal line disposed for the first pixel overlaps the pixel electrode disposed in a second pixel adjacent to the first pixel.

According to this configuration, the parasitic capacitance between the pixel electrode for the first pixel and the scanning signal line disposed for the first pixel can be reliably reduced. This makes it possible to reliably reduce the feed-through voltage of the pixel electrode of the first pixel.

Effects of the Invention

According to the present invention, because the feed-through voltage of the pixel electrode can be reduced, degradation of display quality caused by flickering can be prevented. Also, degradation of display quality caused by flickering can be prevented without reducing the aperture ratio or increasing the cost.

DETAILED DESCRIPTION OF EMBODIMENTS

Embodiments of the present invention will be explained below in detail with reference to figures. It should be noted that the present invention is not limited to such embodiments.

FIG. 1is a plan view showing an overall configuration of a liquid crystal display device according to Embodiment 1 of the present invention.FIG. 2is a cross-sectional view of the liquid crystal display device according to Embodiment 1 of the present invention.FIG. 3is a plan view showing adjacent pixels in the liquid crystal display device according to Embodiment 1 of the present invention.FIG. 4is a cross-sectional view along the line A-A inFIG. 3.FIG. 5is an equivalent circuit diagram showing an electrical configuration of adjacent pixels in the liquid crystal display device according to Embodiment 1 of the present invention.FIG. 6is a cross-sectional view showing an overall configuration of a display section of the liquid crystal display device according to Embodiment 1 of the present invention.FIG. 7is a diagram for explaining a distance relationship between pixel electrodes and gate bus lines in the liquid crystal display device according to Embodiment 1 of the present invention.

As shown inFIGS. 1 and 2, a liquid crystal display device1includes a TFT substrate2as a first substrate, a CF substrate3as a second substrate disposed so as to face the TFT substrate2, a liquid crystal layer4as a display medium layer sandwiched between the TFT substrate2and the CF substrate3, and a sealing material40that is sandwiched between the TFT substrate2and the CF substrate3and that is disposed in a frame shape so as to bond the TFT substrate2and the CF substrate3together and seal the liquid crystal layer4.

This sealing material40is formed so as to enclose the liquid crystal layer4, and the TFT substrate2and the CF substrate3are bonded to each other through this sealing material40. The liquid crystal display device1is provided with a plurality of photo spacers (not shown) for controlling a thickness of the liquid crystal layer4(that is, a cell gap).

As shown inFIG. 1, the liquid crystal display device1is formed in a rectangular shape. The TFT substrate2protrudes outside of the CF substrate3in the horizontal direction of the liquid crystal display device1, and in the protruding region, a plurality of display wiring lines such as gate bus lines and source bus lines that will be later described are led out, and are forming a terminal region T.

In the liquid crystal display device1, a display region D that displays an image is defined in a region where the TFT substrate2and the CF substrate3overlap. The display region D is constituted of a plurality of pixels arranged in a matrix. Each pixel is the smallest unit of picture.

As shown inFIG. 1, the sealing material40is disposed in a rectangular frame shape so as to enclose the entire display region D.

As shown inFIGS. 3 to 5, in a respective plurality of pixels30to32provided in the liquid crystal display device1, source bus lines14and gate bus lines11are disposed so as to cross each other.

Thin film transistors (TFTs)5are provided as switching elements. In each of the TFTs5, the gate is connected to the gate bus line11near an intersection of the two signal lines, the source is connected to the source bus line14near the same intersection, and the drain is connected to a pixel electrode19. The TFT5turns to an ON state when the gate bus line11is in a selected state, and turns to an OFF state when the gate bus line11is in a non-selected state.

The pixel electrodes19disposed in the respective plurality of pixels30to32are connected to the source bus lines14through the TFTs5, respectively. A common electrode (opposite electrode)24is arranged so as to face these pixel electrodes19. A liquid crystal layer4as a display medium layer is sandwiched by the pixel electrodes19and the common electrode24, forming liquid crystal capacitances C1c, respectively. A plurality of auxiliary capacitance lines29are formed so as to extend in parallel with the plurality of gate bus lines11, and an auxiliary capacitance Cs is formed in parallel with the liquid crystal capacitance C1c. In this embodiment, as shown inFIG. 3, the auxiliary capacitance lines29are disposed between the respective adjacent pixels. In the auxiliary capacitance Cs, one of auxiliary capacitance electrodes is connected to the pixel electrode19, and the other of the auxiliary capacitance electrodes is connected to the common electrode24. A common voltage potential Vcomis applied to the common electrode24. In the respective pixels30to32, parasitic capacitances Cgd1are formed between the pixel electrodes19and the gate bus lines11.

AlthoughFIG. 3only shows a portion corresponding to the three adjacent pixels, the liquid crystal display device is provided with the plurality of source bus lines14and the plurality of gate bus lines11, respectively, and the plurality of pixels30are arranged in a matrix so as to correspond to the respective intersections of the plurality of source bus lines14and the plurality of gate bus lines11. That is, the respective pixels30to32are disposed in respective regions enclosed by the gate bus lines11and the source bus lines14.

As shown inFIGS. 3 and 4, the TFT substrate2includes an insulating substrate6such as a glass substrate, a base coat layer7formed on the insulating substrate6, a semiconductor layer13formed on the base coat layer7, and a gate insulating film12formed so as to cover the semiconductor layer13. The TFT substrate2also includes the above-mentioned gate bus lines11and the above-mentioned auxiliary capacitance lines29formed on the gate insulating film12, a first interlayer insulating film15formed so as to cover the gate bus lines11and the auxiliary capacitance lines29, and the above-mentioned source bus lines14formed on the first interlayer insulating film15. The TFT substrate2further includes the above-mentioned TFTs5disposed at the respective intersections of the gate bus lines11and the source bus lines14, a second interlayer insulating film16formed so as to cover the source bus lines14and the TFTs5, and a plurality of pixel electrodes19that are arranged in a matrix on the second interlayer insulating film16and that are respectively connected to the TFTs5.

As shown inFIGS. 3 and 4, each of the TFTs5includes the gate electrode17formed by the gate bus line11protruding to the side, and the source electrode18and the drain electrode20that are disposed so as to face each other on the semiconductor layer13. The source electrode18is a portion of the source bus line14protruding to the side, and is connected to the semiconductor layer13through a contact hole42formed in the gate insulating film12and the first interlayer insulating film15in a contact portion41. As shown inFIG. 4, the drain electrode20is connected to the semiconductor layer13through a contact hole44formed in the gate insulating film12and the first interlayer insulating film15in a contact portion43. The drain electrode20is also connected to the pixel electrode19through a contact hole46formed in the second interlayer insulating film16in a contact portion45.

As shown inFIG. 6, in the TFT substrate2and the display section of the liquid crystal display panel1including the TFT substrate2, a reflective region R is defined by a reflective electrode35, and a transmissive region T is defined by a transparent electrode34that is exposed from the reflective electrode35. A surface of the second interlayer insulating film16disposed in a layer below the pixel electrode19has recesses and protrusions as shown inFIG. 6, and a surface of the reflective electrode35disposed on the surface of the second interlayer insulating film16through the transparent electrode34also has recesses and protrusions.

The above-mentioned reflective region R may not necessarily be defined, and a configuration where only the transmissive region T is defined may also be employed.

As shown inFIG. 6, the CF substrate3includes an insulating substrate21such as a glass substrate, a color filter layer22disposed on the insulating substrate21, and a transparent layer23disposed in the reflective region R of the color filter layer22so as to offset the optical path difference between the reflective region R and the transmissive region T. The CF substrate3also includes the common electrode24disposed so as to cover the transmissive region T and the transparent layer23(that is, reflective region R) of the color filter layer22, a photo spacer25disposed in a columnar shape on the common electrode24, and an alignment film26disposed so as to cover the common electrode24and the photo spacer25. The color filter layer22includes colored layers28of red layers R, green layers G, and blue layers B that are disposed so as to correspond to the pixels, respectively, and a black matrix27that is a light-shielding film.

The transflective liquid crystal display device1having the above-mentioned configuration is configured such that, in the reflective region R, light entering from the CF substrate3side reflects off the reflective electrode35, and in the transmissive region T, light from a backlight (not shown) entering from the TFT substrate2side passes through.

In the liquid crystal display device1, display signals (data signals) corresponding to display states of the respective pixels30to32are provided to the source bus lines14by a not-shown data signal line driver mean (source driver). Also, in the liquid crystal display device1, scanning signals (gate signals) that turn the TFTs5on or off are provided to the gate bus lines11by a not-shown scanning signal line driver mean (gate driver).

The liquid crystal display device1is configured as follows: in the pixels30to32provided with the respective pixel electrodes19, when the TFTs5are turned to the ON state by the gate signals sent from the gate bus lines11, the data signals from the source bus lines14are sent to the pixel electrodes19through the source electrodes18and the drain electrodes20, thereby writing a prescribed electrical charge in the pixel electrodes19. This creates a difference in potential between the pixel electrodes19and the common electrode24, and as a result, a prescribed voltage is applied to the liquid crystal layer4. The orientation state of the liquid crystal molecules is changed in accordance with an amount of the applied voltage, and by utilizing such characteristics, the liquid crystal display device1adjusts the transmittance of incoming light from the backlight, and therefore displays images.

In this embodiment, as shown inFIGS. 3 to 5, the pixel electrode19afor the pixel31is disposed in the pixel30that is another pixel adjacent to the pixel31, and the gate bus line11bdisposed in the pixel31and the pixel electrode19afor the pixel31that is disposed in the pixel30are arranged apart from each other so as not to overlap in a plan view.

In a manner similar to above, the pixel electrode19bfor the pixel32is disposed in the pixel31that is another pixel adjacent to the pixel32, and the gate bus line11cdisposed in the pixel32and the pixel electrode19bfor the pixel32that is disposed in the pixel31are arranged apart from each other so as not to overlap in a plan view.

In this case, as shown inFIG. 5, a parasitic capacitance Cgd2is formed between the pixel electrode19bdisposed in the pixel31(that is, the pixel electrode for the pixel32) and the gate bus line11b, and even though the parasitic capacitance Cgd2increases, the parasitic capacitance Cgd1between the pixel electrode19adisposed in the pixel30and the gate bus line11bcan be reduced.

That is, in the pixel31, when the data signal is applied to the source bus line14, and when the voltage of the scanning signal lowers from the ON voltage Vghof the gate bus line11bto the OFF voltage Vg1of the gate bus line11b, the parasitic capacitance Cgd2between the pixel electrode19bdisposed in the pixel31and the gate bus line11bis large. However, as described above, because the gate bus line11bdisposed in the pixel31and the pixel electrode19afor the pixel31are arranged apart from each other so as not to overlap in a plan view, the parasitic capacitance Cgd2has no effect on the pixel31, and it allows for the reduction in the parasitic capacitance Cgd1.

The parasitic capacitance Cgd1is reduced with increase in the parasitic capacitance Cgd2. This is because, as shown inFIG. 7, a relationship represented by d1>d2is satisfied in the pixel31, where d1is a distance between the pixel electrode19afor the pixel31that is disposed in the adjacent pixel30and the gate bus line11b, and d2is a distance between the pixel electrode19bdisposed in the pixel31and the gate bus line11b.

Generally, an electrostatic capacitance can be represented by εS/d (ε: electrostatic capacitance, S: area where gate bus line and pixel electrode overlap, and d: distance between gate bus line and pixel electrode), and therefore, the parasitic capacitance Cgd1between the pixel electrode19afor the pixel31and the gate bus line11b(that is, εS/d1) becomes smaller than the parasitic capacitance Cgd2between the pixel electrode19bdisposed in the pixel31and the gate bus line11b(that is, εS/d2).

In this case, the feed-through voltage ΔVdof the pixel electrode19ais represented by the following formula:
ΔVd=(Vgh−Vg1)·Cgd1/(C1c+Cs+Cgd1+Cgd2)  (2)

Thus, as described above, even though the parasitic capacitance Cgd2is increased, the parasitic capacitance Cgd1is reduced, and therefore, from Formula (2) above, it is possible to reduce the feed-through voltage ΔVdof the pixel electrode19afor the pixel31. As a result, it becomes possible to prevent degradation of display quality caused by flickering.

That is, by satisfying the above-mentioned condition d1>d2, the parasitic capacitance Cgd1can be reduced reliably, which makes it possible to reliably reduce the feed-through voltage ΔVdof the pixel electrode19afor the pixel31.

The present invention differs from the above-mentioned conventional technique in that there is no need to provide conductive layers around the pixel electrodes, and it only requires a modification to wiring lines in the pixels. This makes it possible to prevent degradation of display quality caused by flickering without reducing the aperture ratio or increasing the cost.

As shown inFIGS. 3 and 4, in the pixel32as well, by employing a configuration similar to that of the pixel31above, the feed-through voltage ΔVdof the pixel electrode19bfor the pixel32can be reduced, and therefore, it becomes possible to prevent degradation of display quality caused by flickering. That is, as shown inFIGS. 3 and 4, the pixel32may be configured such that the pixel electrode19bfor the pixel32is disposed in the pixel31that is another pixel adjacent to the pixel32, and that the gate bus line11cand the pixel electrode19bfor the pixel32disposed in the pixel31are arranged apart from each other so as not to overlap in a plan view.

Next, Embodiment 2 of the present invention will be explained. An overall configuration of a liquid crystal display device and an overall configuration of a TFT substrate are similar to those described in Embodiment 1 above, and therefore, the detailed explanations thereof will be omitted. Also, the same reference characters will be given to the same constituting elements as those in Embodiment 1 above, and the explanations thereof will be omitted.

FIG. 8is a plan view showing adjacent pixels in a liquid crystal display device according to Embodiment 2 of the present invention.FIG. 9is a plan view for explaining areas where a gate bus line and pixel electrodes overlap in the liquid crystal display device according to Embodiment 2 of the present invention.FIG. 10is an equivalent circuit diagram showing an electrical configuration of adjacent pixels in the liquid crystal display device according to Embodiment 2 of the present invention.

This embodiment differs from Embodiment 1 above in that, as shown inFIG. 8, the gate bus lines11are configured to be arranged between the respective adjacent pixels. As shown inFIGS. 8 and 9, in this embodiment, areas where the gate bus lines11respectively overlap the pixel electrodes of the two pixels adjacent to the respective gate bus lines11(that is, the two pixel electrodes19band19cthat sandwich the gate bus line11) differ from each other in a plan view.

Specifically, as shown inFIGS. 8 and 9, this embodiment is configured to satisfy the relationship represented by S1<S2, where S1is an area in which the gate bus line11bof the pixel31overlaps the pixel electrode19bof the pixel31, and S2is an area in which the gate bus line11of the pixel31overlaps the pixel electrode19cof the pixel32adjacent to the pixel31.

As described above, generally, the electrostatic capacitance can be represented by εS/d, and therefore, the parasitic capacitance Cgd1between the pixel electrode19bof the pixel31and the gate bus line11b(that is, εS1/d) becomes smaller than the parasitic capacitance Cgd2between the pixel electrode19cof the pixel32and the gate bus line11b(that is, εS2/d).

That is, in a manner similar to Embodiment 1 above, as shown inFIG. 10, the parasitic capacitance Cgd2is formed between the pixel electrode19cand the gate bus line11b, and even though the parasitic capacitance Cgd2increases, the parasitic capacitance Cgd1between the pixel electrode19bdisposed in the pixel31and the gate bus line11bcan be reduced.

That is, in the pixel31, when the data signal is applied to the source bus line14, and when the voltage of the scanning signal lowers from the ON voltage Vghof the gate bus line11bto the OFF voltage Vg1of the gate bus line11b, the parasitic capacitance Cgd2between the pixel electrode19cof the pixel32that is another pixel and the gate bus line11bis large. However, this parasitic capacitance Cgd2has no effect on the pixel31, and it allows for the reduction in the parasitic capacitance Cgd1.

Thus, as described above, even though the parasitic capacitance Cgd2is increased, the parasitic capacitance Cgd1is reduced, and therefore, from Formula (2) above, it is possible to reduce the feed-through voltage ΔVdof the pixel electrode19b. As a result, it becomes possible to prevent degradation of display quality caused by flickering.

That is, by satisfying the above-mentioned condition S1<S2, the parasitic capacitance Cgd1can be reduced reliably, which makes it possible to reliably reduce the feed-through voltage ΔVdof the pixel electrode19bof the pixel31.

The present invention differs from the above-mentioned conventional technique in that there is no need to provide conductive layers around the pixel electrodes, and it only requires a modification to wiring lines in the pixels. This makes it possible to prevent degradation of display quality caused by flickering without reducing the aperture ratio or increasing the cost.

As shown inFIG. 8, in the pixels30and32as well, by employing a configuration similar to that of the pixel31above, the feed-through voltage ΔVdof the pixel electrodes19aand19cof the pixels30and32, respectively, can be reduced, and therefore, it becomes possible to prevent degradation of display quality caused by flickering. That is, the pixel30may be configured such that an area where the gate bus line11aof the pixel30overlaps the pixel electrode19aof the pixel30becomes smaller than an area where the gate bus line11aof the pixel30overlaps the pixel electrode19bof the pixel31that is adjacent to the pixel30, for example.

INDUSTRIAL APPLICABILITY

An application example of the present invention includes an active matrix type liquid crystal display device that uses switching elements such as thin film transistors.

DESCRIPTION OF REFERENCE CHARACTERS

1liquid crystal display device

4liquid crystal layer

d1distance between pixel electrode and gate bus line

d2distance between pixel electrode and gate bus line

S1area where gate bus line and pixel electrode overlap

S2area where gate bus line and pixel electrode overlap