Method and apparatus for driving liquid crystal display deriving modulated data using approximation

The present invention discloses a method and apparatus of driving a liquid crystal display device improving a picture quality. In the method and apparatus, modulated data bands including at least two modulated data centering a gray scale being approximate to a gray scale value of source data are derived. An approximation is carried out in two directions perpendicular to each other within the modulated data bands to derive unregistered modulated data positioned between the modulated data, thereby modulating the source data.

This application claims the benefit of Korean Application No. P2001-54889 filed on Sep. 6, 2001, which is hereby incorporated by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a liquid crystal display, and more particularly, to a method and apparatus for a liquid crystal display. Although the present invention is suitable for a wide scope of applications, it is particularly suitable for improving a picture quality.

2. Discussion of the Related Art

Generally, a liquid crystal display (LCD) controls a light transmittance of each liquid crystal cell in accordance with a video signal, thereby displaying a picture. An active matrix LCD including a switching device for each liquid crystal cell is suitable for displaying a moving picture. The active matrix LCD uses a thin film transistor (TFT) as switching devices.

The LCD has a disadvantage in that it has a slow response time due to inherent characteristics of a liquid crystal, such as a viscosity and an elasticity, etc. Such characteristics can be explained by the following equations (1) and (2):
τr∝γd2/Δε|Va2−VF2|  (1)
where τrrepresents a rising time when a voltage is applied to a liquid crystal, Vais an applied voltage, VFrepresents a Freederick transition voltage at which liquid crystal molecules begin to perform an inclined motion, d is a cell gap of liquid crystal cells, and γ represents a rotational viscosity of the liquid crystal molecules.
τf∝γd2/K(2)
where τfrepresents a falling time at which a liquid crystal is returned into the initial position by an elastic restoring force after a voltage applied to the liquid crystal was turned off, and K is an elastic constant.

A twisted nematic (TN) mode liquid crystal has a response time altered due to physical characteristics of the liquid crystal and a cell gap, etc. Typically, the TN mode liquid crystal has a rising time of 20 to 80 ms and a falling time of 20 to 30 ms. Since such a liquid crystal has a response time longer than one frame interval (i.e., 16.67 ms in the case of NTSC system) of a moving picture, a voltage charged in the liquid crystal cell is progressed into the next frame prior to arriving at a target voltage. Thus, due to a motion-blurring phenomenon, a moving picture is blurred out on the screen.

Referring toFIG. 1, the conventional LCD cannot express desired color and brightness. Upon implementation of a moving picture, a display brightness BL fails to arrive at a target brightness corresponding to a change of the video data VD from one level to another level due to its slow response time. Accordingly, a motion-blurring phenomenon appears from the moving picture and a display quality is deteriorated in the LCD due to a reduction in a contrast ratio.

In order to overcome such a slow response time of the LCD, U.S. Pat. No. 5,495,265 and PCT International Publication No. WO99/05567 have suggested to modulate data in accordance with a difference in the data by using a look-up table (hereinafter referred to as high-speed driving strategy). This high-speed driving scheme allows data to be modulated by a principle as shown inFIG. 2.

Referring toFIG. 2, a conventional high-speed driving scheme modulates input data VD and applies the modulated data MVD to the liquid crystal cell, thereby obtaining a desired brightness MBL. This high-speed driving scheme increases |Va2−VF2| from the above equation (1) on the basis of a difference of the data so that a desired brightness can be obtained in response to a brightness value of the input data within one frame interval, thereby rapidly reducing a response time of the liquid crystal. Accordingly, the LCD employing such a high-speed driving scheme compensates for a slow response time of the liquid crystal by modulating a data value in order to alleviate a motion-blurring phenomenon in a moving picture, thereby displaying a picture at desired color and brightness.

In other words, the high-speed driving scheme compares most significant bits of the previous frame Fn−1 with those of the current frame Fn to select corresponding modulated data Mdata from the look-up table if there is a change in the most significant bits MSB, as shown inFIG. 3. This high-speed driving scheme modulates only several most significant bits so as to reduce a capacity burden of a memory upon implementation of hardware equipment. A high-speed driving apparatus in this manner is as shown inFIG. 4.

Referring toFIG. 4, a conventional high-speed driving apparatus includes a frame memory43connected to the most significant bit bus line42and a look-up table44commonly connected to the most significant bit bus line32and an output terminal of the frame memory43.

The frame memory43stores most significant bit data MSB during one frame interval and supplies the stored data to the look-up table44. Herein, the most significant bit data MSB may be the most significant 4 bits of the 8-bit source data RGB.

The look-up table44compares most significant bits MSB of a current frame Fn inputted from the most significant bit line42with those of the previous frame Fn−1 inputted from the frame memory43as shown in Table 1 or Table 2, and selects the corresponding modulated data Mdata. The modulated data Mdata are added to least significant bits LSB from a least significant bit bus line41to be applied to the LCD.

In the above tables, a furthermost left column is for a data voltage VDn−1 of the previous frame Fn−1 while an uppermost row is for a data voltage VDn of the current frame Fn. Table 1 is look-up table information in which the most significant bits (i.e., 20, 21, 22and 23) are expressed by the decimal number format. Table 2 is look-up table information in which weighting values (i.e., 2425, 26and 27) of the most significant 4 bits are applied to 8-bit data.

However, the conventional high-speed driving scheme has a problem in that, since it looks for the modulated data Mdata registered in the look-up table using the look-up table comparing only the most significant bits, a continuity of the modulated data Mdata is more deteriorated due to a deviation from a real gray scale of the video data. In addition, a data overshoot may be caused between the adjacent modulated data Mdata. For this reason, values of the modulated data Mdata at gray level portions indicated by arrows inFIG. 5are jumped between a gray level of the real input data and a gray level of the modulated data Mdata, thereby causing a larger brightness variation. In order to solve this problem, it is necessary to enlarge a memory size of the frame memory and the look-up table to compare full bits (i.e., 8 bits) of source data, so that full-bit modulated data selected can be derived in accordance with the compared result. However, such a full-bit comparison raises another problem of enlarging a memory size of the frame memory and the look-up table. As a result, a cost required for a circuit configuration increases in the full bit data modulation. For instance, a look-up table comparing 8-bit source data to select 8-bit modulated data Mdata has a memory size of 65536×8=524 kbits.

SUMMARY OF THE INVENTION

Accordingly, the present invention is directed to a method and apparatus for driving a liquid crystal display that substantially obviates one or more of problems due to limitations and disadvantages of the related art.

Another object of the present invention is to provide a method and apparatus of driving a liquid crystal display that is adaptive for improving a picture quality.

To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, a method of driving a liquid crystal display includes setting at least two modulated data, deriving a plurality of modulated data bands including the at least two modulated data centering a gray scale that is approximate to a gray scale value of source data, and carrying out first and second approximations in two directions perpendicular to each other within the modulated data bands to derive unregistered modulated data positioned between the modulated data, thereby modulating the source data.

The method further includes dividing the source data into most significant bits and least significant bits, and delaying each of the most significant bits and the least significant bits for a frame period.

In the method, the driving the modulated data bands includes comparing the most significant bits of a current frame with those of the delayed frame within a look-up table registered with the modulated data to derive the modulated data bands in accordance with the compared result.

The carrying out first and second approximations includes carrying out the first approximation using current least significant bits along a horizontal axis within the modulated data bands to derive two first approximate values existing on the horizontal axis, and carrying out the second approximation using the previous least significant bits on a line between the two first approximate values to derive the unregistered modulated data.

Otherwise, the carrying out first and second includes carrying out the first approximation using previous least significant bits along a vertical axis within the modulated data bands to derive two first approximate values existing on the vertical axis, and carrying out the second approximation using current least significant bits on a line between the two first approximate values to derive the unregistered modulated data.

In another aspect of the present invention, a driving apparatus for a liquid crystal display includes a look-up table having at least two modulated data and deriving a plurality of modulated data bands including the at least two modulated data centering a gray scale that is approximate to a gray scale value of source data, and a modulator approximating in two directions perpendicular to each other within the modulated data bands to derive unregistered modulated data positioned between the modulated data, thereby modulating the source data.

The driving apparatus further includes a first frame memory delaying most significant bits of the source data, and a second frame memory delaying least significant bits of the source data.

In the driving apparatus, the delayed most significant bits are compared non-delayed most significant bits within a look-up table registered with the modulated data to derive the modulated data bands in accordance with the compared result.

The modulator includes a first approximation processor for carrying out a first approximation using current least significant bits along a horizontal axis within the modulated data bands to derive two first approximate values existing on the horizontal axis, and a second approximation processor carrying out a second approximation using previous least significant bits on a line between the two first approximate values to derive the unregistered modulated data.

Otherwise, the modulator includes a first approximation processor carrying out a first approximation using previous least significant bits along a vertical axis within the modulated data bands to derive two first approximate values existing on the vertical axis, and a second approximation processor carrying out a second approximation using current least significant bits on a line between the two first approximate values to derive the unregistered modulated data.

The driving apparatus further includes a data driver applying data modulated by using the modulator to the liquid crystal display, a gate driver applying a scanning signal to the liquid crystal display, and a timing controller applying the source data to the modulator and controlling the data driver and the gate driver.

In a further aspect of the present invention, a liquid crystal display includes a liquid crystal display panel displaying images, a look-up table having at least two registered modulated data and deriving a plurality of modulated data bands including the at least two modulated data centering a gray scale that is approximate to a gray scale value of source data, and a modulator approximating in two directions perpendicular to each other within the modulated data bands to derive unregistered modulated data positioned between the modulated data, thereby modulating the source data.

DETAILED DESCRIPTION OF THE ILLUSTRATED EMBODIMENTS

Reference will now be made in detail to the illustrated embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or like parts.

Referring toFIG. 6, a driving apparatus for a liquid crystal display (LCD) according to the present invention will be explained hereinafter.

The LCD driving apparatus includes a liquid crystal display panel67having a plurality of data lines65and gate lines66crossing each other and having TFTs provided at the intersections therebetween to drive liquid crystal cells Clc. A data driver63supplies data to the data lines65of the liquid crystal display panel67. A gate driver64supplies a scanning pulse to the gate lines66of the liquid crystal display panel67. A timing controller61receives digital video data and horizontal and vertical synchronizing signals H and V. A data modulator62is connected between the timing controller61and the data driver63to modulate data RGB using an approximation of the predetermined modulated data.

More specifically, the liquid crystal display panel67has a liquid crystal formed between two glass substrates and has the data lines65and the gate lines66provided on the lower glass substrate in such a manner to perpendicularly cross each other. The TFT provided at each intersection between the data lines65and the gate lines66responds to the scanning pulse and supplies the data through the data lines65to the liquid crystal cell Clc. To this end, a gate electrode of the TFT is connected to the gate lines66while a source electrode thereof is connected to the data lines65. The drain electrode of the TFT is connected to a pixel electrode of the liquid crystal cell Clc.

The timing controller61rearranges digital video data supplied from a digital video card (not shown). The RGB data rearranged by the timing controller61are supplied to the data modulator62. Further, the timing controller61generates timing signals, such as a dot clock Dclk, a gate start pulse GSP, a gate shift clock GSC (not shown), an output enable/disable signal, and a polarity control signal using horizontal and vertical synchronizing signals H and V to control the data driver63and the gate driver64. The dot clock Dclk and the polarity control signal are applied to the data driver63, while the gate start pulse GSP and the gate shift clock GSC are applied to the gate driver64.

The gate driver64includes a shift register sequentially generating a scanning pulse, that is, a gate high pulse, in response to the gate start pulse GSP and the gate shift clock GSC applied from the timing controller61, and a level shifter shifting a voltage of the scanning pulse into a level suitable for driving the liquid crystal cell Clc. The TFT is turned on in response to the scanning pulse. Upon turning on the TFT, video data on the data lines65are applied to the pixel electrode of the liquid crystal cell Clc.

The data driver63is supplied with red (R), green (G), and blue (B) modulated data X modulated by the data modulator62and receives a dot clock Dclk from the timing controller61. The data driver63samples the R, G, and B modulated data X in accordance with the dot clock Dclk and thereafter latches the modulated data for each line. The data latched by the data driver63are converted into analog data to be simultaneously applied to the data lines65at every scanning interval. Further, the data driver63may apply a gamma voltage corresponding to the modulated data to the data lines65.

The data modulator62modulates current input data RGB using a look-up table in accordance with a change between the previous frame Fn−1 and the current frame Fn. Further, the data modulator62derives a minute modulation value of the modulated data registered in the look-up table using an approximation to better modulate current input data RGB. Herein, a data width of the look-up table may equalize to that of the most significant bits MSB. However, it is preferable that it equalizes to a data width (i.e., 8 bits) of the source data RGB.

FIG. 7shows a detailed block diagram of the data modulator62according to a first embodiment of the present invention.

Referring toFIG. 7, the data modulator62includes a first frame memory73A supplied with least significant bits LSB. A second frame memory73B is supplied with most significant bits MSB. A look-up table74compares the most significant bits MSB of the current frame Fn with those of the previous frame Fn−1 to derive a desired size of the modulated data band. A first approximation processor75carries out a first approximation on the X-axis (i.e., horizontal axis) within the modulated data band. A second approximation processor76carries out a second approximation on the Y-axis (i.e., vertical axis) between the first approximated values.

More specifically, the first frame memory73A is connected to a least significant bit bus line71of the timing controller61(shown inFIG. 6) to store the least significant bits LSB inputted from the timing controller61during one frame interval. The first frame memory73A applies the least significant bit data LSB stored every frame to the second approximation processor76.

The second frame memory73B is connected to a most significant bit bus line72of the timing controller61to store the most significant bits MSB inputted from the timing controller61during one frame interval. The second frame memory73B applies the most significant bits MSB stored into the look-up table74at every frame.

The look-up table74compares the most significant bits MSB of the current frame Fn inputted from the most significant bit bus line72of the timing controller61with those of the previous frame Fn−1 inputted from the frame memory73. In accordance with the compared result, the look-up table74selects a desired data size of modulated data band Band(a, b, c, d) from the modulated data a, b, c, and d satisfying the following equations:
VDn<VDn−1--->MVDn <VDn(i)
VDn=VDn−1--->MVDn =VDn(ii)
VDn>VDn−1--->MVDn >VDn(iii)

In the above equations, VDn−1 represents a data voltage of the previous frame, VDn is a data voltage of the current frame, and MVDn represents a modulated data voltage.

When source data inputted to the data modulator62is 8 bits and the most significant bits inputted to the look-up table74are 4 bits, modulated data registered in the look-up table74are given in the following table:

As shown in Table 3, the look-up table74compares a gray level of the source data RGB at 17×17 and selects 8-bit modulated data set to satisfy the above equations (i) to (iii) in accordance with the compared result. Since a memory size of the look-up table74is 289×8=2,312 bits, it is smaller than those (i.e., 524 kbits) of the look-up table employing an 8-bit comparison/8-bit modulation data system. Herein, 289 is a value obtained by multiplying most significant bits of 17 gray levels of the current frame Fn by those of the previous frame Fn−1 of the source data inputted to the look-up table74.

Gray scale ranges of the source data RGB unregistered in the look-up data, such as gray scale data of 1˜15, 17˜31, 33˜47, 49˜63, 65˜78, 81˜95, 97˜111, 113˜127, 129˜143, 145˜159, 161˜175, 177˜191, 193˜207, 209˜223, 225˜239, and 241˜254, are derived by registering modulated data within the look-up table74and carrying out an approximation between the most adjacent two gray scales. In comparison to this scheme, the conventional scheme determines a gray scale range unregistered in the look-up table74on the basis of the least significant bits LSB added to the modulated data selected from the look-up table74. The modulated data band to be approximated according to a preferred embodiment of the present invention is a data area between a range of gray level values in the horizontal direction and a range of gray level values in the vertical direction with respect to the look-up table74(shown as the data area within the dashed lines inFIG. 9) adjacent to the registered modulated data that are the most approximate to gray level values of the source data RGB.

The first approximation processor75carries out the first approximation along the X-axis using the least significant bits LSB of the current frame Fn within the modulated data band from the look-up table74to derive two first approximate values A1 and A2.

The second approximation processor76carries out the second approximation along the Y-axis between the first approximate values A1 and A2 using the least significant bits LSB of the previous frame Fn−1 to derive modulated data X.

Detailed descriptions for the first and second approximation processes are explained with reference toFIG. 8.

Referring toFIG. 8, in step S81, the most significant bits MSB and the least significant bits LSB of the previous frame Fn−1 delayed by the first and second frame memories73A and73B, respectively, are read out. In step S82, the most significant bits MSB and the least significant bits LSB of the current frame Fn are read out. In step S83, modulated data band Band(a, b, c, d) corresponding to the source data RGB within the look-up table74is derived in accordance with the most significant bits MSB of the current frame Fn and those of the previous frame Fn−1 read out in this manner. The modulated data band Band(a, b, c, d) is are data ranges between four modulated data a, b, c, and d that is most approximate to a modulated data value corresponding to the most significant bits MSB inputted to the look-up table74as shown inFIG. 9.

In step S84, the first approximation processor75carries out the first approximation using values of the least significant bits LSB of the current frame Fn within the modulated data band Band(a, b, c, d) to derive two first approximate values A1 and A2 that are vertically opposite to each other within the modulated data band Band(a, b, c, d). The first approximation is carried out along the X-axis within the modulated data band Band(a, b, c, d) with respect to the look-up table74as shown inFIG. 9.

In step S85, the second approximation processor76carries out a secondary approximation using values of the least significant bits LSB of the previous frame Fn−1 within the modulated data band Band(a, b, c, d) to derive the modulated data X at the vertical line between the two first approximate values A1 and A2. The secondary approximation is carried out along the Y-axis within the modulated data band Band(a, b, c, d) with respect to the look-up table74as shown inFIG. 9.

FIG. 10shows a detailed block diagram of the data modulator62according to a second embodiment of the present invention.

Referring toFIG. 10, the data modulator62includes a first frame memory103A receiving least significant bits LSB and a second frame memory103B supplied with most significant bits MSB. A look-up table104comparing the most significant bits MSB of the previous frame Fn with those of the current frame Fn−1 to derive a desired size of modulated data band. A first approximation processor105carries out a first approximation on the Y-axis (i.e., vertical axis) within the modulated data band and a second approximation processor76carries out a second approximation on the Y-axis (i.e., vertical axis) between the first approximate values.

More specifically, the first frame memory103A is connected to a least significant bit bus line101of the timing controller61to store the least significant bits LSB inputted from the timing controller61during one frame interval. Further, the first frame memory103A applies the least significant bit data LSB stored every frame to the first approximation processor105.

The second frame memory103B is connected to a most significant bit bus line102of the timing controller61to store the most significant bits MSB inputted from the timing controller61during one frame interval. Further, the second frame memory103B applies the most significant bits MSB stored every frame to the look-up table104.

The look-up table104compares the most significant bits MSB of the current frame Fn inputted from the most significant bit bus line102of the timing controller61with those of the previous frame Fn−1 inputted from the frame memory103. In accordance with the compared result, the look-up table104derives modulated data bands a, b, c, and d from the modulated data as given in Table 3 to satisfy the above equations (i) to (iii). The modulated data bands a, b, c, and d derived by using the look-up table104are applied to the first approximation processor105. The modulated data registered in the look-up table104are given in Table 3.

In Table 3, gray scale data of the source data RGB unregistered in the look-up table104have modulated values determined by an approximation carried out within the modulated data bands a, b, c, and d.

The first approximation processor105carries out the approximation along the Y-axis using the least significant bits LSB of the previous frame Fn−1 within the modulated data bands from the look-up table74to derive two first approximate values B1 and B2.

The second approximation processor106carries out a second approximation along the X-axis between the primary approximate values B1 and B2 using the least significant bits LSB of the current frame Fn to derive modulated data X.

FIG. 11shows an approximation process carried out by using the data modulator62according to the second embodiment of the present invention.

Referring toFIG. 11, in step S111, the most significant bits MSB and the least significant bits LSB of the previous frame Fn−1 delayed by the first and second frame memories103A and103B, respectively, are read out. The most significant bits MSB and the least significant bits LSB of the current frame Fn are read out in step S112. In step S113, modulated data band Band(a, b, c, d) corresponding to the source data RGB within the look-up table104is derived in accordance with the most significant bits MSB of the current frame Fn and the previous frame Fn−1 read out in this manner. The modulated data band Band(a, b, c, d) is data ranges between four modulated data a, b, c, and d that is most approximate to modulated data values corresponding to the most significant bits MSB inputted to the look-up table104as source data as shown inFIG. 12.

In step S114, the first approximation processor105carries out the first approximation using values of the least significant bits LSB of the previous frame Fn−1 within the modulated data band Band(a, b, c, d) to derive two first approximate values B1 and B2 that are horizontally opposite to each other within the modulated data band Band(a, b, c, d). The first approximation is carried out along the Y-axis within the modulated data band Band(a, b, c, d), with respect to the look-up table104as shown inFIG. 12.

In step S115, the second approximation processor106carries out the second approximation using values of the least significant bits LSB of the current frame Fn within the modulated data band Band(a, b, c, d) undergoing an approximation to derive modulated data X on the horizontal line between the two first approximate values B1 and B2. This second approximation is carried out along the X-axis within the modulated data band Band(a, b, c, d) with respect to the look-up table104undergoing an approximation, as shown inFIG. 12.

In the mean time, the two frame memories73A and73B and the frame memories103A and103B shown inFIG. 7andFIG. 10, respectively, may be incorporated into a single unit. For example,FIG. 13illustrates the data modulator62(shown inFIG. 6) in which the frame memories73A and73B shown inFIG. 7may be incorporated into a single frame memory73.FIG. 14illustrates the data modulator62in which the frame memories103A and103B shown inFIG. 10may be incorporated into a single frame memory103. Alternatively, the two approximation processors75and76or the two approximation processors105and106carrying out the first and second approximations may be incorporated into a single unit as shown inFIG. 15.

As described above, according to the present invention, a desired size of the modulated data bands is established to carry out approximations within the modulated data bands, thereby selecting the modulated data. Accordingly, the modulated data selected by the approximations are linearly increased and decreased, so that a discontinuity between the modulated data can be eliminated to improve a picture quality. Furthermore, according to the present invention, modulated data unregistered in the look-up table are derived by approximations, so that a memory size of the look-up table is reduced.

The data modulator may be implemented by other means, such as a program and a microprocessor for carrying out this program, rather than a look-up table. Also, the present invention may be applicable to all other fields requiring a data modulation, such as a plasma display panel, an field emission display and an electro-luminescence display, etc.