Attenuating an input signal

Apparatus (301) for switchable attenuation of a differential input signal from a microphone includes positive and negative non-attenuating paths (406, 410) have n- and p-type MOSFETs (421, 422, 423, 424) in back-to-back configurations; positive and negative attenuating paths (405, 409) have n- and p-type MOSFETs (415, 416, 418, 419) in back-to-back configurations in combination with resistors; a gate driver (425) applies a drive signal of one polarity (QNEG) to gates of the n-type MOSFETs in the attenuating paths and the p-type MOSFETs in the non-attenuating paths, and a drive signal of opposite polarity (QPOS) to the gates of the p-type MOSFETs in the attenuating paths and the n-type MOSFETs in the non-attenuating paths; and the state of the MOSFETs depends on the drive signals at their gates, and thus the input signal may be routed via either the non-attenuating paths or the attenuating paths by controlling the drive signals.

CROSS REFERENCE TO RELATED APPLICATIONS

This application claims priority from United Kingdom Patent Application No 15 15 200.2 filed on Aug. 27, 2015, the whole contents of which are incorporated herein by reference in their entirety.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to apparatus for switchable attenuation of a differential input signal from a microphone, and a microphone pre-amplifier comprising the same.

2. Description of the Related Art

It is known to provide switchable attenuation in the signal path between a microphone and a microphone pre-amplifier, possibly forming part of a mixing console, to reduce the level of the input signal by typically 10 to 20 decibels. This is often desirable for very loud sources such as percussion to avoid clipping of the input signal in the pre-amplifier, or to enable the pre-amplifier to be operated in a certain range for creative reasons such as introducing particular kinds of distortion particular to that range of the amplifier.

Such attenuators, which are often referred to as microphone pads, typically only switch in a fixed series resistance. Thus, the level of the input signal immediately drops by a fixed amount, which is equivalent to modulation of the audio signal by a step function. This introduces severe transient distortion, which manifests as a thud or a pop, which can be commercially unacceptable. The attenuator is often switched by means of a relay, and thus whilst it is being switched in the amplifier may be automatically muted to avoid the thud or pop associated therewith.

It is therefore an object of the present invention to provide an improved switchable attenuator for a microphone which does not require the entire input to be muted.

BRIEF SUMMARY OF THE INVENTION

The invention is directed towards apparatus for switchable attenuation of a differential input signal from a microphone. Positive and negative non-attenuating paths are provided that have n- and p-type MOSFETs in back-to-back configurations. Positive and negative attenuating paths are provided that have n- and p-type MOSFETs in back-to-back configurations in combination with an attenuator to provide attenuation. A gate driver applies a drive signal of one polarity to the gates of the n-type MOSFETs in the attenuating paths and the p-type MOSFETs in the non-attenuating paths, and a drive signal of opposite polarity to the gates of the p-type MOSFETs in the attenuating paths and the n-type MOSFETs in the non-attenuating paths.

This means that the state of the MOSFETs is dependent upon the polarities of the drive signals, and thus the input signal may be routed via either the non-attenuating paths or the attenuating paths.

The apparatus may form part of a microphone pre-amplifier, which may be incorporated in a mixing console.

DETAILED DESCRIPTION THE INVENTION

An exemplary audio mixing configuration is illustrated inFIG. 1, in which a mixing console101is being used to mix numerous channels of audio into one output for recording to a hard disk recording system102.

The mixing console101comprises a number of channel strips such as channel strips103,104and105. Each of these channel strips, for instance channel strip103, corresponds to one particular input, such as input106which receives an input signal from a microphone107. The input signal is a differential-mode signal, which is to say the signal is transmitted using two complementary signals of opposite polarity over two conductors. In the illustrated example, each channel strip includes a rotary control such as rotary control109to control the gain applied by the channel's microphone pre-amplifier.

Faders, such as fader108, are also present to control the relative contribution of the channel to the final mix by adjusting the gain of the particular channel's input audio signal. In this example, master faders110and111are also present which control the contribution of each of two stereo channels to the final mix. In the example shown inFIG. 1, a power amplifier112is provided to allow the mix to be monitored by an operator by means of two loudspeakers,113and114. A recording of the final output mix is made by hard disk recording system102.

Whilst not shown in the Figure, as mentioned previously a degree of pre-amplification is applied to input signals received at each input of the mixing console101. The degree of gain applied during this process is very much dependent upon the input source, but gain is particularly important when, as illustrated in the Figure, an input signal is received from a microphone. The output of high-quality microphones, in particular due to their high impedances (known in the art as hi-Z) can in many cases only be of the order of between 1 and 10 millivolts. In order to increase the level of this signal to line-level in order for signal processing to take place, a large degree of gain must be applied, sometimes up to 100 decibels.

However, microphones may be required on occasions to pick up sounds that are themselves very high level, and so the mixing console101includes a switchable attenuator in each channel according to the present invention to, in the present embodiment, introduce 20 decibels of attenuation prior to the channel's input signal being amplified by its pre-amplifier.

As described previously, prior art approaches to introducing attenuation prior to amplification have some shortcomings. A prior art switchable attenuator is shown inFIG. 2.

A differential input signal from a microphone201is routed via the prior art switchable attenuator, identified generally at202. The complementary parts VIN+and VIN−of the differential input signal are received at respectively a positive input203and a negative input204. The switchable attenuator202includes a first relay205in a positive path between positive input203and a positive output206. A second relay is207provided in a negative path between negative input204and a negative output208.

The first relay205and second relay207are mechanically linked so as to switch in unison. Upon activation of the relays, possibly by way of an electromagnet209, a first resistor210in the positive path and a second resistor211of equal resistance in the negative path are switched in to the circuit in series, along with a third resistor212in parallel. This creates a voltage divider operative to attenuate the input signal from the microphone201by an attenuation factor A that is dependent upon the ratio of the value of resistors210and211, to the third resistor212. On activating the switches205and207, which are typically relays, VIN+and VIN−are attenuated to become AVIN+and AVIN−.

The input signal is then presented to the inputs of a microphone pre-amplifier213to produce a signal VOUTwhen the attenuator202is inactive, and AVOUTwhen the attenuator202is active (assuming its gain is fixed).

The characteristic thud or pop when the switches are activated is difficult to mitigate against without affecting the audio signal, even if the switching can be aligned with a zero crossing point of the audio signal, as even this introduces distortion. The problem is compounded by the fact that, even using reed relays, there is always actuation-to-actuation variance in the switching time, along with a period where no signal flows as the relay moves between contacts. Thus, timing the operation of the relay precisely and repeatedly is not possible, resulting in distortion.

Further still, this lack of precision and repeatability means that attenuating devices in the prior art switchable attenuator cannot be switched in concert with adjustments further down the signal path, such as changes to the gain of microphone pre-amplifier, for example.

The present invention therefore proposes use of a different technology to control the switching of a resistance in and out of the signal path, which provides both precision and repeatability in terms of switching time. In an embodiment, this furthermore allows the introduction of an attenuating element into the circuit along with a corresponding increase in the gain of the microphone pre-amplifier, so as to minimise distortion. In another embodiment, it allows the pulse-width modulation of the input signal between an attenuating path and a non-attenuating path so as to provide variable attenuation.

A block diagram of a switchable attenuator of the present invention is shown inFIG. 3, forming part of the mixing console101identified inFIG. 1.

The microphone107provides a differential input signal to a switchable attenuator301according to the present invention, which, when activated, attenuates the two complementary parts VIN+and VIN−by an attenuation factor A to produce an output of AVIN+and AVIN−. The switchable attenuator301will be described in further detail with reference toFIG. 4. Activation of the switchable attenuator301is achieved by a microcontroller302of the known type, which in the present example is responsible for sampling the current position of the rotary control109for controlling the gain to be applied to the input signal.

The microcontroller302is also responsible for controlling the gain of the microphone pre-amplifier303for the channel, which amplifies the input signal from the microphone107to produce an output signal, VOUT.

In the present example, the pre-amplifier303is of one of the types disclosed in U.S. Pat. No. 9,257,951, which is assigned to the present applicant. The gain of the pre-amplifier303is determined by a digitally controlled attenuator therein. The pre-amplifier303and its operation will be described with reference toFIGS. 5 and 6.

In combination, the switchable attenuator301, the microcontroller302, and the pre-amplifier303are configured to receive via the rotary controller109an indication that an operator of the mixing console101wishes to reduce the gain of the input signal below a certain point. At this point, the microcontroller302activates the switchable attenuator301, thereby introducing in the present example 20 decibels of attenuation, whilst at the same time altering the attenuation of the digitally controlled attenuator in the pre-amplifier303so that the gain of the pre-amplifier303is increased by, in the present example, 19.9 decibels. Apart from a slight decrease in the signal to noise ratio, this means that it appears that the gain of the input signal from microphone107has only been reduced by 0.1 decibels, which in the mixing console101, is the standard gain step.

In order to switch predictably and quickly enough, the switchable attenuator301utilises solid-state devices. A circuit diagram of the switchable attenuator301is shown inFIG. 4.

A positive part VIN+of the input signal is received at positive input401, and a negative part VIN−is received at negative input402.

The positive part VIN+is conducted via a positive path403until it reaches a junction404, where it is split into a positive attenuating path405and a positive non-attenuating path406. Similarly, the negative part VIN−is conducted via negative path407until it reaches a junction408, where it is split into a negative attenuating path409and a negative non-attenuating path410.

Positive attenuating path405includes a first resistor411and negative attenuating path409includes a second resistor412of equivalent value. A voltage divider in the positive attenuating path405is formed by a third resistor413which connects to ground, and another voltage divider is formed by a fourth resistor414which connects to ground. In a specific embodiment, the resistors411and412are 6.8 kiloohm, 0.1 percent resistors, whilst resistors413and414are 750 ohm, 0.1 percent resistors. This combination of resistance attenuates the input signal by 20 decibels. Other resistance values could of course be used depending upon the degree of attenuation required.

Switching between the attenuating paths and the non-attenuating paths is achieved in the present embodiment by way of a combination of p- and n-type MOSFETs (metal-oxide-semiconductor field-effect transistors).

Thus, in the positive attenuating path405, a first n-type MOSFET415is provided with current initially applied to its source. As shown in the Figure, the MOSFETs include an inherent body diode and so when off only reject for one polarity of signal. The drain of the first n-type MOSFET415is therefore connected to the source of a first p-type MOSFET416, to create a back-to-back configuration. In this way, when the two MOSFETs are off, no current can flow through the positive attenuating path405. The drain of the first p-type MOSFET416is connected to a positive output417for the switchable attenuator301.

A similar configuration is used for the other paths in the circuit.

In the negative attenuating path409, a second n-type MOSFET418receives current at its source, and is configured so that its drain is connected to the source of a second p-type MOSFET419. The drain of second p-type MOSFET419is connected to a negative output420.

In the positive non-attenuating path406, a third n-type MOSFET421receives current at its source, and is configured so that its drain is connected to the source of a third p-type MOSFET422. The drain of third p-type MOSFET422is connected to the positive output417.

In the negative non-attenuating path410, a fourth n-type MOSFET423receives current at its source, and is configured so that its drain is connected to the source of a fourth p-type MOSFET424. The drain of fourth p-type MOSFET424is connected to negative output420.

In the present embodiment, the MOSFETs employed are power MOSFETs typically used for handling significant power levels such as in switched-mode power supplies, rather than un-amplified microphone signals. However, their high commutation speed (around 15 nanoseconds) and low series resistance (around 1 ohm) makes them particularly suitable for the present application. In a specific example, the MOSFETs are Si1029X complementary n- and p-channel 60 volt MOSFETs available from Vishay Intertechnology, Inc. of Malvern, Pa., USA. This particular power MOSFET incorporates an n- and a p-type MOSFET on a single die allowing for streamlined incorporation into a printed circuit board.

The MOSFETs in switchable attenuator301are operated by applying voltages to their gates. Switchable attenuator301therefore includes a gate driver425configured to generate a first drive signal, QPOS, and a second drive signal, QNEG. A control signal is received from the microcontroller302at a control input426, which typically will be of the order of millivolts and therefore not of high enough voltage to cause the MOSFETs to turn on or off quickly enough by the charging/discharging of their gate capacitors.

The control signal may be high or low, and is compared to a comparison voltage on input427. In this embodiment, generation of the first and second drive signals is achieved by providing the control signal to the non-inverting input of a first differential amplifier428, and to the inverting input of a second differential amplifier429. The comparison signal is supplied to the inverting input of the first differential amplifier428, and to the non-inverting input of the second differential amplifier429. In this way, the first differential amplifier428generates the first drive signal, QPOS, and the second differential amplifier429generates the second drive signal, QNEG. In the present, specific implementation, the differential amplifiers are LM339 differential comparators available from Texas Instruments Inc. of Dallas, Tex., USA.

Thus, in order to control the MOSFETs and activate or inhibit attenuation of the input signal from the microphone, the output of the first differential amplifier428which conveys the first drive signal, QPOS, is connected to the gates of the first n-type MOSFET415, the second n-type MOSFET418, the third p-type MOSFET422, and the fourth p-type MOSFET424. The output of the second differential amplifier429which conveys the second drive signal, QNEG, is connected to the gates of the first p-type MOSFET416, the second p-type MOSFET419, the third n-type MOSFET421, and the fourth n-type MOSFET423.

Thus it may be seen that the drive signals QPOSand QNEGcontrol the state of the MOSFETs in such a way that when the MOSFETs in the positive and negative non-attenuating paths are “on” those in the positive and negative attenuating paths are “off”, and vice versa.

In the present embodiment, therefore, when the control signal is high, the switchable attenuator301is activated and the input signal is conducted via the positive and negative attenuating paths. When the control signal is low, the opposite condition is achieved and the input signal is conducted via the positive and negative non-attenuating paths.

A schematic of the microphone pre-amplifier303is shown inFIG. 5.

A positive supply rail501and a negative supply rail502are provided, which, in the present embodiment have a voltage of +15 volts and −15 volts respectively, providing a balance between available dynamic range and power consumption. A first current path503and a second current path504extend upward from the negative supply rail to a first current mirror505and a second current mirror506. The current mirrors are of the known type and are thus configured to copy the current from one side of the circuit to the other, and maintain current through the current paths regardless of loading in active devices on each side. First current path503and second current path504then extend downward towards the negative supply rail502via two resistors507and508, each having a resistance of around 500 ohms.

From the negative supply rail, first current path503includes a first constant current source509connected to the source of a first field effect transistor (FET)510, which in this particular implementation is an n-channel junction FET. The path continues with the drain of first FET510being connected, via first current mirror505, to the emitter of a first bipolar junction transistor (BJT)511. The collector of first BJT511is then connected to resistor507. In this embodiment the transistors will be recognized as being PNP construction, although it will be appreciated by those skilled in the art that NPN-type components could be used with appropriate modifications to the rest of the circuit being made.

The second current path is substantially similar to the first, having a second constant current source512connected to the source of a second FET513. The drain of second FET513is connected, via current mirror506, to the emitter of a second BJT514, whose collector is in turn connected to resistor508.

Input signals themselves from the switchable attenuator301, are identified as AVIN+and AVIN−. They are received at, respectively, input terminals515and516. Input terminal515is coupled to the base of BJT511, whilst input terminal516is coupled to the base of BJT514. Thus, input voltages received via the input terminals control the flow of current through BJTs511and514. The presence of a differential signal on the two inputs results in the current flowing through BJT511tending to decrease, and the current flowing through BJT514tending to increase. Of course, should an alternative embodiment be constructed utilizing NPN bipolar junction transistors, then the opposite will occur, and so those skilled in the art will appreciate that in such circumstances appropriate measures should be taken to change the polarity of the input terminals.

It will be seen by those skilled in the art that the two BJTs receiving the two complementary parts of the differential signal together form a first differential amplifier, with the input terminals providing inputs for receiving differential input signals. An input-stage shunting resistance517, having a resistance R1, is also placed between the emitters of BJTs511and514.

The voltage formed at the collector of first BJT511(due to the presence of resistor507) is coupled into the inverting input of a second differential amplifier, provided in this embodiment by an operational amplifier518which is configured to provide 100 decibels of gain. It will of course be appreciated that operational amplifier518can be configured to operate with alternative (and perhaps variable) levels of gain in dependence upon the particular application of the amplifier structure.

In addition, the voltage formed at the collector of second BJT514(due to the presence of resistor508) is coupled to the non-inverting input of operational amplifier518, having a negative feedback path518FB. Thus, operational amplifier518amplifies the difference between the voltages developed in first current path503and second current path504following modulation of the currents therein by BJTs511and514.

In the embodiment illustrated inFIG. 5, the negative feedback path518FB around operational amplifier518is configured to operate as a dominant pole compensator, and thus includes a compensation circuit519. The role of compensation circuit519is to encourage stability of the output stage. In this embodiment, this is achieved by configuring the compensation circuit519such that the gain of operational amplifier518reduces to 0 decibels before the phase delay it introduces reaches −180 degrees. Compensation circuit519therefore includes, in one embodiment, a capacitor that provides a dominant pole in the system, and introduces a reasonable phase margin of, say, 60 degrees. In another embodiment, a gang of switchable capacitors are provided, each having a different capacitance to introduce dominant poles at different frequencies, tuned to particular gain ranges of the entire amplifier structure. This allows the stability of the circuit to be guaranteed at all possible gain levels.

The output of operational amplifier518is primarily coupled to a first output terminal520. The output of operational amplifier518is also coupled to a unity gain inverting operational amplifier521, which serves to invert the signal. The output of the inverting operational amplifier521, in effect an inverted version of the output from operational amplifier518, is supplied to a second output terminal522. Thus, a ground-referenced output voltage VOUTis developed between the output terminals.

In addition to being coupled to output terminal522, the output of inverting operational amplifier521is also provided, via a DC servo523, to the gate of FET510.

A digitally controlled attenuator is provided on the other side of the structure, and in the present embodiment is a multiplying digital-to-analog converter (MDAC)524, which is connected to the gate of FET513. In this embodiment, the MDAC is a 14-bit part, and thus provides 214=16384 attenuation steps. However, it will be appreciated that higher or lower precision parts may be substituted in view of cost constraints or resolution, for example. The MDAC524serves to provide attenuation of its input signals, at a degree determined by the provision of a digital word via a control interface. Referring toFIG. 3, the digital word is provided by microcontroller302. It is important to note that MDAC524is capable of switching between any two attenuation levels: it does not need to step through intermediate levels of attenuation.

Referring again toFIG. 5, it will be apparent to those skilled in the art that the configuration of the MDAC in the illustrated circuit is very much dependent upon the type of transistors employed. In this embodiment, due to FETs being used (which control current flowing between their source and drain terminals in response to a voltage being applied to the gate), the MDAC, which alters its output current in response to an input voltage and a pre-set attenuation level, is combined with an operational transimpedance amplifier, thus providing a voltage to the gate of the coupled FET. The precise configuration will be described further with reference toFIG. 6. However, it is also envisaged that in alternative embodiments, FET510and FET513could be replaced by appropriately selected BJTs. As a BJT alters the current flow between its emitter and collector in response to current flowing from or to its base, then the output of an MDAC can be used unaltered.

Referring again toFIG. 5, a feedback-stage shunting resistance525, having a resistance R2, is placed between the drains of FET510and FET513. Responsive to a differential signal synthesized from the output of the output stage, the feedback stage of the pre-amplifier303modulates currents in first current path503and second current path504, so as to introduce a degree of feedback to the input stage. The degree of feedback introduced is determined by the attenuation of the MDAC524present in the feedback stage.

For completeness, a brief overview of the operation of the circuit topology illustrated inFIG. 5will now be provided. Say a differential input voltage of VINvolts is provided across the input terminals515and516. This differential voltage is supplied to the bases of BJTs511and514in the input stage differential amplifier. Modifications then occur to the emitter currents of the BJTs—say, for instance, that current from the emitter of BJT511increases and current from the emitter of BJT514decreases. This characteristic of the transistors means that an attempt is made to impress the input voltage across input-stage shunting resistance517, resulting in a steering current ΔIIN(equal to VINdivided by R1) shunting through the resistance. It will be immediately apparent that any common-mode voltage presented to the input terminals515and516will be completely rejected, as there is simply no forward common-mode path for such voltages to take. If common-mode voltages are present, they will adjust the base voltages of BJTs511and514, but at an equivalent level and in the same sense in terms of polarity. Thus, no current will shunt across the resistance, and no output signal will, in turn, be generated by operational amplifier518.

In any event, unchecked, current will flow from first current path503to second current path504, which will lead to changes to the collector currents of BJTs511and514, and a subsequent large differential voltage being developed across the inputs to operational amplifier518. This will in turn lead to a vast and uncontrolled level of amplification due to the high gain of operational amplifier518, which would eventually become saturated due to the maximum amount of voltage supplied by voltage rails501and502. Thus, feedback must be provided to return the emitter currents of BJTs511and514towards a balanced condition, with just enough voltage drop across the input-stage shunting resistance to cause the output of operational amplifier518to be such that the feedback can continue to be produced.

Being equal but opposite voltages, the voltages applied to the gates of the FETs510and513result in equal and opposite modifications to the drain currents of the FETs. This results in the emergence of a similar condition to that in the input stage, in that a voltage of level VFB(equal to VOUT) is impressed across feedback-stage shunting resistance525(having resistance R2), resulting in a current of magnitude ΔIFB(equal to VOUTdivided by R2) flowing therethrough. However, due to the polarity of the voltages applied to the gates of the FETs, the steering current ΔIFBshunts in the opposite direction to the steering current through input-stage shunting resistance517. This has the effect of rebalancing the circuit, as current mirrors505and506copy the current flowing from the drains to the sources of FETs510and513to the emitters of the BJTs511and514through the respective current paths.

In order for this current balancing to control the collector currents of BJTs511and514at a satisfactory level, the feedback stage steering current ΔIFBis effectively equal to the input steering current ΔIIN, save for a slight difference that is enough to cause a voltage drop across the input-stage shunting resistance517that will, in turn, be amplified by operational amplifier518to provide an output signal VOUTat a sufficient level to cause the generation of the feedback stage steering current ΔIFB.

Thus, the gain G of the amplifier structure as a whole (VOUTdivided by VIN) can be shown to be equal to the ratio of resistances provided by feedback-stage shunting resistance525and input-stage shunting resistance517, or R2divided by R1, assuming no attenuation by MDAC524in the feedback stage. However, should the MDAC's attenuation be increased, then the voltage supplied to the gate of FET513will decrease in magnitude. This will in turn result in a reduction in the voltage across feedback-stage shunting resistance525, and as the degree of resistance R2of feedback-stage shunting resistance525remains fixed, a corresponding reduction in the amount of current shunting therethrough. Thus, the level of current that shunts across input-stage shunting resistance517will tend to increase, which in turn will result in the manifestation of a larger difference in voltage at the inputs of operational amplifier518, giving a more highly amplified output signal VOUT.

In effect, therefore, the gain of the entire circuits increases at a degree determined by the attenuation provided by the MDAC524. The overall gain of the amplifier, G, can therefore be expressed as being proportional to the value of the resistance R1provided by feedback-stage shunting resistance525multiplied by an attenuation variable K provided by the MDAC524, divided by the resistance R2provided by input-stage shunting resistance517, where K ranges between 1 and 2N, with 1 being the lowest available attenuation provided by the MDAC, and 2Nbeing the number of attenuation steps available.

As previously described with reference toFIGS. 5 and 6, the term digitally controlled attenuator as used herein is used to generally refer to a circuit element configured to receive an indication via a control interface of a selected attenuation level. The indication generally takes the form of a digital word, i.e. a group of bits understood as an instruction by the digitally controlled attenuator to adopt a corresponding attenuation level.

The digitally controlled attenuator referred to inFIG. 5interfaces with field effect transistors. As described previously, the present embodiment uses an MDAC, which, as mentioned previously, receives an input voltage and, based on its attenuation, output a current. Thus, extra capability must be provided to convert this current into a voltage such that it can control the gate of the FET.

Such an approach is illustrated inFIG. 6, where MDAC524is shown in greater detail with its supporting circuit.

An operational amplifier601is provided at the output of the MDAC524and is configured to operate as a current-to-voltage converter, i.e. an operational transimpedance amplifier. MDAC524includes an input terminal602at which an input reference voltage is received. Referring toFIG. 5, the reference voltage is the output of operational amplifier518. Referring again toFIG. 6, a control interface603is present as well, and receives from the microcontroller302a digital word identifying a value N for the desired level of attenuation to be adopted by the MDAC. Output current is supplied from an output604in MDAC524to the inverting input of operational amplifier601, whose non-inverting input is coupled to circuit ground. The output of operational amplifier601is provided to an output terminal605, and is also coupled, via a feedback resistor606, to a feedback input607in MDAC524to improve stability. The overall “gain” of the DAC system shown inFIG. 6(provided by the combination of MDAC524and operational amplifier601) can be shown to be equal to the value N supplied to control interface603divided by 2N-1. So, for instance, if a digital word is provided to MDAC524corresponding to a value of N of 8192, and MDAC524is a 14-bit part, the gain will be one half.

An operational plot of a requested gain level, and the corresponding changes to the switchable attenuator301and the microphone pre-amplifier303is shown inFIG. 7.

Plot701identifies a requested gain level, controlled by rotary control109. In this example, the requested gain level undergoes a linear reduction from a high to a low level over a period of time.

In order to satisfy the request, the attenuation provided by, in the present example, MDAC524is gradually decreased to zero, until the microphone pre-amplifier303applies the lowest level of gain it can. This is shown in plot702. At this point, as shown in plot703, the control signal from microcontroller302for the gate driver425switches from a low to a high value, so as to route the input signal through the attenuating paths405and409. This results in, as shown in plot704, an increase in the attenuation of the switchable attenuator301of 20 decibels. At the same time, the attenuation of the MDAC524is adjusted by 19.9 decibels so that the gain of the microphone pre-amplifier303is increased by 19.9 decibels. Further reductions in the requested gain level are achieved by again continuing to gradually reduce the attenuation of MDAC524.

An alternative embodiment of the present invention is shown inFIG. 8in block diagram form.

In this embodiment, the switchable attenuator301is combined with a low pass filter801, the layout of which will be described with reference toFIG. 9. In this embodiment, the microcontroller302is configured to switch the MOSFETs in the switchable attenuator301at a very high frequency (i.e. above the audible frequency range) so as to provide variable attenuation of the input signal from the microphone107. In an alternative embodiment, the low pass filter could be omitted, with appropriate modifications made to the microphone pre-amplifier303itself to filter out ultrasonics, or alternatively relying on downstream digital-to-analog converters to reject said ultrasonics.

In a specific embodiment, the microcontroller302applies a switching waveform to the gate driver425having a frequency of 1 megahertz. This is possible due to the use of MOSFETs, and the response of power MOSFETs is particularly beneficial in this application. The duty cycle of the switching waveform may then be varied between 0 and 100 percent so as to allow control of the degree of attenuation applied to the signal from microphone107.

A diagram of the switchable attenuator301in combination with the low pass filter801is shown inFIG. 9.

The low pass filter801comprises in the present embodiment a first inductor901at the positive output417of the switchable attenuator301, and a second inductor902at the negative output420. A capacitor903is placed across the inductors so as to form, in this embodiment, a passive, second order low pass filter. Use of a passive design is possible due to the high frequency of switching capability provided by the MOSFETs in the switchable attenuator301, which relax the requirements in terms of the attenuation of the filter. Inductors are used in the present embodiment due to their low resistance and low noise.

An operational plot of a requested gain level, and the corresponding changes to the switchable attenuator301and the microphone pre-amplifier303according to this second embodiment of the present invention is shown inFIG. 10.

Plot1001identifies a requested gain level, controlled by rotary control109. In this example, as in plot701, the requested gain level undergoes a linear reduction from a high to a low level over a period of time.

In order to satisfy the request, the attenuation provided by, in the present example, MDAC524is gradually decreased to zero, until the microphone pre-amplifier303applies the lowest level of gain it can. This is shown in plot1002. Unlike in plot702, however, the attenuation of the MDAC524remains at zero in this embodiment.

At this point, as shown in plot1003, the control signal from microcontroller302for the gate driver425begins to switch from a low to a high value using pulse width modulation at a very high, ultrasonic frequency. As described previously, in an embodiment the frequency is 1 megahertz. Initially, the duty cycle of the waveform is in favour of the low value, and so the overall attenuation of the input signal by the switchable attenuator303following low pass filtering is small.

However, as the requested gain level continues to drop, the duty cycle is adjusted by the microcontroller302such that the high state begins to be favoured, thereby increasing the overall attenuation by the switchable attenuator303. This continues until the control signal is permanently high, i.e. the duty cycle can be considered to be 100 percent to the high state, and the maximum attenuation of 20 decibels is achieved as shown in plot1004.