Alternating to direct voltage converter

The converter comprises a first MOS transistor fed by a current source or by a current-limiting element and it receives through an input capacitor the alternating input voltage. The first transistor is biased by a second MOS transistor the distance drain-source of which is connected between the gate and the drain of the first transistor. The second transistor is biased on its gate by a voltage of reference in such a way that its equivalent internal resistance takes a very high value. A filter capacitor is connected between drain and source of the first transistor. A direct voltage is delivered on the drain of the first transistor the value of which being function of the amplitude of the alternating input voltage. The converter can be implemented by any conventional technology for MOS integrated circuits because it uses only standards elements which are easily integrated.

BACKGROUND OF THE INVENTION 
The present invention relates to an alternating to direct voltage converter 
in form of an integrated circuit comprising on a same substrate at least a 
first field effect transistor with insulated gate, a current-limiting 
means feeding said first transistor and a first coupling capacitor 
connected to the input of said first transistor for controlling said first 
transistor by said alternating voltage. 
Such a converter is provided for the regulating circuit Reg of a quartz 
crystal oscillator, e.g. for an electronic watch. FIG. 1 shows the circuit 
diagram of an oscillator comprising a converter according to the present 
invention. The properly so called oscillator comprises an amplifier A1, a 
quartz crystal resonator Q and two phase-shifting capacitors C5 and C6. 
The amplifier A1 is fed by a current source Io like the one described in 
the U.S. Patent Application Ser. No. 968,902, for maintaining the current 
of the oscillator at a determined, relatively small value. The regulating 
circuit Reg of FIG. 1 permits, by acting on the current source Io in 
function of the amplitude of the alternating voltage of the oscillator to 
further reduce the power consumption of the circuit. An amplifier A2 
receives the relatively small alternating signal of the oscillator and 
delivers an amplified signal having sufficient amplitude for adequately 
driving stages normally connected to the oscillator. 
From FIG. 2 of the document (1), "ESSCIRC 1976, Toulouse, New analog CMOS 
IC's based on weak inversion operation, E. Vittoz and S. Fellrath, Centre 
Electronique Horloger SA, Neuchatel, Switzerland", it is known an 
amplitude detector or alternating to direct voltage converter comprising a 
transistor T1 fed by a current source (T2,T6) and further comprising 
associated elements like R1, R2, C1, C2 and C3. In such a circuit, the 
resistors R1 and R2 must have a very high impedance, in the order of 
magnitude of 100 megohms and it is proposed to implement them by back to 
back polycrystalline diodes. Such diodes can be produced by a particular 
technology only (Si-gate technology), which considerably limits their 
possibilities of applications. 
SUMMARY OF THE INVENTION 
An object of the present invention is to realize an alternating to direct 
voltage converter having a configuration less complicated than the one of 
the circuit known from the above mentioned publication (1) and capable to 
be integrated by a conventional technology of the CMOS circuits. To this 
end, the converter is in form of an integrated circuit comprising on a 
same substrate at least a first field effect transistor with insulated 
gate, a current-limiting means feeding said first transistor and a first 
coupling capacitor connected to the input of said first transistor for 
controlling said first transistor by said alternating voltage, further 
comprising a second field effect transistor with insulated gate connected 
between the input and the output of the first transistor, a second 
capacitor connected to the output of the first transistor for 
short-circuiting said output for the alternating voltage signals, said 
first transistor producing on said output a direct voltage function of the 
amplitude of said alternating voltage. 
The invention will be described further by way of example, with reference 
to the accompanying drawings.

DESCRIPTION OF THE PREFERRED EMBODIMENT 
FIG. 2 shows the circuit diagram of a known amplitude detector according to 
(1). This amplitude detector converts the alternating input voltage 
U.sub.E into a direct output voltage U.sub.A. The elements R2, C3 form a 
filter for the alternating voltage on the gate G1 of T1. The value of the 
output voltage U.sub.A, which is equal to the mean value of the gate 
voltage of the transistor T1, is a function of the amplitude of the 
alternating input voltage U.sub.E. 
It is to be seen that in the absence of the input voltage U.sub.E or when 
the output terminal is connected e.g. to the gate of a MOS transistor, no 
direct current flows through either R1 or R2. In this case, the potentials 
on the drain D1, on the gate G1 and on the capacitor C3 are equals: 
U.sub.D1 =U.sub.G1 =U.sub.A. The only direct current circulating in the 
circuit is the current Io delivered in the transistor T1 by the current 
source or by a current limiting element. The preceding shows that the 
elements R2 (resistor) and C3 (capacitor) may be spared without 
appreciably influencing the transfer function of the circuit. 
The circuit of FIG. 2 but without the elements R2,C3 is represented in FIG. 
3. The operation of the circuit of FIG. 3 is the following. 
Without any alternating input voltage, the operating point of transistor T1 
is determined by the current Io which produces a voltage on the drain D1 
and on the gate G1 of transistor T1. This voltage U.sub.A =U.sub.G1 =Uo is 
determined by the characteristic of the drain current in function of the 
gate-source voltage of T1, as indicated in FIG. 4. In FIG. 4a, an 
alternating voltage U.sub.E directly superposed on Uo produces a strong 
increase of the current I.sub.DS during the positive half periods of 
U.sub.E without producing a noticeable decrease of this current during the 
negative half periods of U.sub.E. As a result, the mean current in the 
transistor has a tendency to increase toward a value noticeably greater 
than the current Io delivered by the current source. However, the current 
Io is maintained constant by the current source, so that the capacitor C2 
is forced to discharge which produces a decrease of U.sub.A. Because the 
mean value of the gate voltage U.sub.G is the same than U.sub.A, this gate 
voltage must also decrease until the mean current in the transistor T1 
becomes again equal to Io. This is indicated in FIG. 4b which shows that 
the mean current in the transistor becomes again equal to Io when the 
voltage U.sub.G1 has decreased by an amount .DELTA.U. It is easily seen 
that the greater the amplitude of the alternating input signal U.sub.E, 
the more different from Uo are the output voltage U.sub.A and the mean 
gate voltage U.sub.G1 (equal to U.sub.A). The shifting of an amount 
.DELTA.U of the operating point is therefore a function of the alternating 
input voltage. 
For an input capacitance of 1 pF and an input signal having a frequency of 
32 kHz, the required time constant is about 100 micosecond, so that the 
resistor R1 must have a value in the order of magnitude of 100 megohms. 
Resistors with such a high value are very difficult to implement in an 
integrated circuit. In the previously cited known publication (1) we have 
already seen that these resistors are implemented by back to back 
polycrystalline diodes requiring a particular manufacturing technology. In 
the circuit according to the present invention the resistor R1 is realized 
by a MOS transistor which is integrated by conventional technology. This 
transistor, designated by T2 in FIG. 5, is biased in such manner to have 
an equivalent resistance of a very high value between drain and source. 
The dimensioning of transistor T1 and of current Io is done by taking into 
consideration that without any alternating input signal the output voltage 
U.sub.A =Uo is about the same than the threshold voltage U.sub.T of 
transistor T1. The channel of transistor T2 with the terminals S2 and D2 
is then at the potential of the threshold voltage of transistor T1. In 
FIG. 5, transistor T2 is biased by a gate voltage U.sub.G2 which is 
choosen so that it is only weakly conducting. The voltage between gate and 
source or drain of T2 must therefore have a value about equal to the 
threshold voltage U.sub.T. The value of the voltage U.sub.G2 against 
ground is about twice the threshold voltage. 
FIG. 6 shows that the gate voltage U.sub.G2 of the circuit of FIG. 5 may be 
obtained with an additional current source I1 feeding two MOS transistors 
T4 and T5 connected in series, the drain of each transistor being 
connected to its gate. FIG. 7 shows a circuit simpler than the one of FIG. 
6, which does not require any additional current source but only an 
additional transistor T7 connected in series with the transistor T1. The 
series connection of the transistors T1 and T7 of FIG. 7 replaces the 
series connection of T5 and T4 of FIG. 6 for the production of the bias 
voltage having a value of U.sub.A +U.sub.T. 
The transfer function of the circuit of FIG. 7 is slightly different from 
the one of the circuit of FIG. 6 because in FIG. 7 the voltage of 
reference for the gate of T2 is constant with respect to the output 
voltage U.sub.A (it varies with respect to ground in function of the input 
voltage), while in the circuit of FIG. 6 it is constant with respect to 
ground and varies with respect to the output. For the impedance of the 
transistor however, it is the gate-source voltage which is of importance, 
that is the voltage between gate and output. 
The transistor T2 of FIGS. 5, 6 and 7 has an influence on the transfer 
function of the circuit because its characteristic I.sub.DS =f(U.sub.D) is 
not symmetrical, as shown in FIG. 8. In accordance with FIG. 8c, an 
alternating signal, symmetrical with respect to U.sub.S and applied to the 
drain D2, produces a strong current in the negative half periods, 
particularly for the high values of the input voltage, while, in the 
positive half periods, the current is small and nearly constant as soon as 
the input voltage increases above a certain value. The dc voltage 
component is not zero. Therefore, the capacitor C1 must charge so that 
U.sub.D becomes more positive than U.sub.S. FIG. 8d shows the case where 
the equilibrium is again reached: The rectangular input signal U.sub.E 
superposed to a mean voltage U.sub.D more positive than U.sub.S produces a 
current in transistor T2 having a zero dc component. This condition can 
also be obtained by shifting U.sub.S against a more negative value in 
order for U.sub.D to remain constant. 
Consequently, the conditions in the circuit of FIG. 5 are the following: On 
the one hand, when the amplitude of the input signal increases, the mean 
gate voltage U.sub.G1 of transistor T1 decreases because of the 
non-linearity of the characteristic I.sub.DS =f(U.sub.G) of this 
transistor. The voltage U.sub.G1 of T1 depends only from Io and U.sub.E. 
On the other hand, the transistor T2 produces, as already seen above, a 
shift between the level of the mean gate voltage U.sub.G1 and the output 
voltage U.sub.A in such a way that U.sub.A which which corresponds to 
U.sub.S of FIG. 8 becomes smaller than U.sub.G1 which in its turn 
corresponds to U.sub.D. It is to be seen that both effects combine in the 
same direction, as indicated in FIG. 9. The transfer function 
characteristic as illustrated in FIG. 9 may be adapted to the particular 
requirements of the circuit and, in practice, it is advantageously 
determined empirically. 
The output voltage U.sub.A is a function of the current Io as well as of 
the threshold voltage of transistor T1. However, this is not a real 
drawback because in most cases the voltage U.sub.A is further treated in 
the integrated circuit. The converter is then only a small unit of an 
electronic subassembly. It is possible, in the case of a well dimensioned 
association with other elements of the circuit, to entirely compensate for 
the influence of the two above mentioned parameters from which depends the 
output voltage U.sub.A. 
FIG. 10 shows a first application of the converter of FIG. 7 as an 
amplitude detector. It is to be seen that the output voltage U.sub.A of 
the converter is filtered by a capacitor C2 and that it controls the gate 
of a transistor T10 fed by a current source nIo. The circuit is designed 
so that the output voltage U10, across T10, is at level 1 if U.sub.E 
&gt;U.sub.Ref and at level 0 if U.sub.E &lt;U.sub.Ref. Another application of 
the converter of FIG. 7 is illustrated in FIG. 11 which is the circuit 
diagram of an oscilator with a very small current consumption. The circuit 
of FIG. 11 represents in principle the oscillator of FIG. 1 but without 
the amplfier A2. The quartz crystal resonator Q is connected between the 
input and the output of the transistor T11 which in its turn is connected 
in series with a transistor T10 the gate of which is controlled by the 
converter of FIG. 7 the output voltage of which being filtered by the 
capacitor C2. If the alternating output voltage of the oscillator across 
C5 increases, the output voltage of the converter across C2 decreases 
which reduces the conduction of T10, so that the current in T11 decreases. 
The amplitude of the signal across C5 is adjusted to a small value which 
reduces the current consumption of the oscillator. The capacitor C2 may be 
eliminated if the input capacity of T10 is sufficiently high. 
The above mentioned cases of application show that the converter may be 
used in many different circuits. It comprises less elements than the 
circuit known from prior art in accordance with (1) and it may be 
implemented by any existing technology of the integrated circuits because 
it uses only standard elements which are normally integrated in parcels of 
thousands of pieces easily manufactured. With respect to the known 
circuit, the slope of the output voltage in function of the alternating 
input voltage is higher which permits, as the case may be, to spare 
additional amplifier stages. Moreover, the dimensioning of the circuit is 
not critical, so that e.g. the cut-off frequency of the converter may be 
choosen in order for the stray radiations of low frequencies created by 
the converter to be eliminated. 
FIGS. 12-18 show further different embodiments of the converter of FIG. 5 
having determined advantages in accordance with their particular 
applications. 
The circuit of FIG. 12 shows that the current source of FIG. 5 is 
implemented e.g. by a transistor T3 of complementary type of conductivity 
with respect to the one of T1, the source S3 of transistor T3 being 
connected to the positive pole of the power source, the drain D3 to the 
drain D1 of transistor T1 and the gate G3 to a second potential of 
reference Ref 2, the gate G2 of transistor T2 being connected to a first 
potential of reference Ref 1. 
The circuit of FIG. 13 shows that the current sources Io and I1 of the 
circuit of FIG. 6 are implemented in true concordance with each other by 
the transistors T3 and T6 respectively, of which the sources S3 and S6 are 
connected to the positive pole of the supply and the gates G3 and G6 are 
connected together and to a second potential of reference, the first 
potential of reference being the one of the gate G2 of T2 and of the drain 
D5 of T5. 
FIG. 14 shows how the current source of the circuit of FIG. 7 is 
implemented by a transistor T8 in series with the transistor T7 the source 
S8 of which is connected to the positive pole of the supply, the drain D8 
to the drain D7 of transistor T7 and the gate G8 to a second potential of 
reference. FIG. 15 shows how it is possible to implement a structure 
equivalent to the already known one according to (1) with conventional 
components. In the circuit of FIG. 15, the capacitor C2 may be eliminated 
and the transistor T2 may operate as a voltage amplifier delivering the 
output voltage U.sub.A1 which is the amplified alternating input voltage 
U.sub.E. The output voltage U.sub.A2 is the direct voltage function of the 
amplitude of the alternating input voltage U.sub.E. The output voltage 
U.sub.A2 is filtered by the equivalent resistance of transistor T9 forming 
a low-pass filter with the capacitor C2. The gate G9 of transistor T9 is 
biased by a third potential of reference. The potentials of reference Ref 
1 and Ref 3 may be different from each other, e.g. because it is necessary 
to have different time constants, or identical ones as shown in FIG. 16. 
FIG. 17 represents the circuit of FIG. 14 in which a capacitor C4 is 
connected between the drain D7 of transistor T7 and ground. The drain D7 
of T7 may then be used as an output of the converter delivering the 
voltage U.sub.A3. The current through T7 being constant, the voltage 
between drain and source of T7 is also constant. As the case may be, 
either capacitor C2 or capacitor C4 may be spared. The circuit of FIG. 17 
is particularly well suited for the applications in the differential 
amplifiers. 
Finally, FIG. 18 shows that in the circuit of FIG. 17 it is not obligatory 
to connect the gate G2 of T2 to the output S3. The gate G2 may also be 
connected to a fourth potential of reference Ref 4. This presents the 
advantage with respect to the circuit of FIG. 17 that the voltage drop in 
T7 may be adapted to the requirements of the following stage connected at 
the output delivering the voltage U.sub.A3 without for the output voltage 
U.sub.A3 to take a value not compatible with the requirements for the bias 
of T2. 
The preceding examples show that the converter is easily adapted to the 
requirements of the different cases of applications without any necessity 
to change or modify its basic structure. This, combined with the fact that 
it can be implemented by any MOS technology gives to the converter 
according to the present invention a quite universal range of possible 
applications.