UNIT PIXEL FOR LED DISPLAY AND LED DISPLAY APPARATUS HAVING THE SAME

A unit pixel includes a first light emitting stack, a second light emitting stack disposed under the first light emitting stack, and a third light emitting stack disposed under the second light emitting stack, in which at least one light emitting stack among the first through third light emitting stacks has a mirror symmetrical structure with respect to at least one vertical plane passing through a center of the at least one light emitting stack in plan view.

BACKGROUND

Field

Exemplary embodiments of the invention relate generally to a unit pixel for an LED display that implements an image using a light emitting diode and a display apparatus having the same and, more specifically, to a unit pixel for an LED display capable of implementing a symmetrical light emitting pattern and a display apparatus having the same.

Discussion of the Background

Light emitting diodes are inorganic light sources, which are used in various fields, such as display apparatuses, automobile lamps, general lighting, and the like. The light emitting diodes have advantages over conventional light sources, such as longer lifespan, lower power consumption, and quicker response, and thus, the light emitting diodes have been replacing the conventional light sources.

The conventional light emitting diodes have been generally used as backlight light sources in display apparatuses. However, LED displays that directly realize images using the light emitting diodes have been recently developed.

In general, the display apparatus displays various colors through mixture of blue, green, and red light. In order to realize various images, the display apparatus includes a plurality of pixels each including sub-pixels of blue, green, and red light. A color of a certain pixel is determined based on colors of the sub-pixels, and images can be realized through a combination of such pixels.

LEDs can emit light of various colors depending on materials thereof, and thus, individual light emitting devices emitting blue, green, and red are typically arranged on a two-dimensional plane to provide a display apparatus. The individual light emitting devices correspond to sub-pixels, and blue, green, and red light emitting devices typically form one pixel.

However, when a pixel is formed using the individual light emitting devices emitting blue, green and red, implementing a symmetrical light emitting pattern is difficult.

SUMMARY

Unit pixels constructed according to exemplary embodiments of the invention are capable of improving symmetry of light emitted from each sub-pixel and an LED display apparatus having the same.

A unit pixel according to an exemplary embodiment includes a first light emitting stack, a second light emitting stack disposed under the first light emitting stack, and a third light emitting stack disposed under the second light emitting stack, in which at least one light emitting stack among the first through third light emitting stacks has a mirror symmetrical structure with respect to at least one vertical plane passing through a center of the at least one light emitting stack in plan view.

The unit pixel may have a rectangular shape in plan view, and the at least one vertical plane may pass through a straight line parallel to an edge of the unit pixel.

The first light emitting stack may have a mirror symmetrical structure with respect to a first vertical plane passing through a straight line parallel to a lateral edge of the unit pixel or a second vertical plane passing through a straight line parallel to a vertical edge of the unit pixel.

The first light emitting stack may have a mirror symmetrical structure with respect to each of the first and second vertical planes.

The first light emitting stack may have an octagonal, hexagonal, or rhombus shape.

The first light emitting stack may have a regular octagonal, regular hexagonal, or square shape.

The second light emitting stack may have a protrusion protruding outside of the first light emitting stack in plan view, and the protrusion of the second light emitting stack may extend along a diagonal direction of the unit pixel.

The second light emitting stack may have a mirror symmetrical structure with respect to one of a first vertical plane passing through a straight line parallel to a lateral edge of the unit pixel and a second vertical plane passing through a straight line parallel to a vertical edge of the unit pixel, and gave an asymmetrical structure with respect to the other one of the first and second vertical planes.

The third light emitting stack may have a mirror symmetrical structure with respect to the first vertical plane or the second vertical plane.

The third light emitting stack may have a rectangular shape.

The unit pixel may further include first, second, third, and fourth connection electrodes electrically connected to the first, second, and third light emitting stacks, in which two or more of the first through fourth connection electrodes may be disposed along a diagonal direction of the unit pixel.

The unit pixel may further include a first insulation layer covering the first through third light emitting stacks and having contact holes, first, second, third, and fourth pads disposed on the first insulation layer, and a second insulation layer covering the first through fourth pads and having through holes, in which the first through fourth pads may be electrically connected to the first through third light emitting stacks through the contact holes, and the first through fourth connection electrodes may be electrically connected to the first through fourth pads through the through holes of the second insulation layer.

The unit pixel may further include a first adhesive layer disposed between the first light emitting stack and the second light emitting stack, a second adhesive layer disposed between the second light emitting stack and the third light emitting stack, and a first adhesion enhancement layer disposed between the second adhesive layer and the second light emitting stack.

The unit pixel may further include a second adhesion enhancement layer disposed between the second adhesive layer and the third light emitting stack.

The first adhesion enhancement layer and the second adhesion enhancement layer may include a silicon oxide layer.

The unit pixel may further include a substrate disposed under the third light emitting stack.

A display apparatus according to another exemplary embodiment includes a circuit board, a unit pixel disposed on the circuit board and including a first light emitting stack, a second light emitting stack disposed under the first light emitting stack, and a third light emitting stack disposed under the second light emitting stack, in which at least one light emitting stack among the first through third light emitting stacks may have a mirror symmetrical structure with respect to at least one vertical plane passing through a center of the at least one light emitting stack in plan view.

The unit pixel may have a rectangular shape in plan view, the at least one vertical plane may pass through a straight line parallel to an edge of the unit, and the first light emitting stack may have a mirror symmetrical structure with respect to the at least one vertical plane.

The second light emitting stack may have a mirror symmetrical structure with respect to one of a first vertical plane passing through a straight line parallel to a lateral edge of the unit pixel and a second vertical plane passing through a straight line parallel to a vertical edge of the unit pixel, and may have an asymmetrical structure with respect to the other one of the first and second vertical planes.

The third light emitting stack may have a mirror symmetrical structure with respect to the first vertical plane or the second vertical plane.

DETAILED DESCRIPTION

Hereinafter, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. A light emitting area of a unit pixel according to an exemplary embodiment may be 10,000 μm2or less. However, the inventive concepts are not limited thereto, and in other exemplary embodiments, the unit pixel may have a light emitting area of 4,000 μm2or less, and further, 2,500 μm2or less. A total area of the unit pixel may be 10,000 μm2or more according to some exemplary embodiments.

FIG. 1is a schematic plan view illustrating a display apparatus according to an exemplary embodiment.

Referring toFIG. 1, a display apparatus10000may include a panel substrate2100and a plurality of pixel modules1000. The display apparatus10000may include a virtual reality (VR) display apparatus, such as a micro LED TV, a smart watch, a VR headset, or an argument reality (AR) display apparatus, such as augmented reality glasses, without being limited thereto.

The panel substrate2100may include a circuit for a passive matrix driving or active matrix driving. In an exemplary embodiment, the panel substrate2100may include wirings and resistors therein, and, in another exemplary embodiment, the panel substrate2100may include wirings, transistors, and capacitors. The panel substrate2100may also be formed with pads on an upper surface thereof for electrical connection to the circuit disposed thereon.

In an exemplary embodiment, the plurality of pixel modules1000are arranged on the panel substrate2100. Each of the pixel modules1000may include a circuit board1001and a plurality of unit pixels100disposed on the circuit board1001, and may further include a molding member covering the unit pixels100. In another exemplary embodiment, the plurality of unit pixels100may be arranged directly on the panel substrate2100, and the molding member may cover the unit pixels100.

Each of the unit pixels100will be described in detail with reference toFIGS. 2A, 2B, and 2C.

FIG. 2Ais a schematic plan view illustrating a unit pixel according to an exemplary embodiment, andFIG. 2BandFIG. 2Care schematic cross-sectional views respectively taken along lines A-A′ and B-B′ ofFIG. 2A.

Referring toFIGS. 2A, 2B, and 2C, the unit pixel100may include a light emitting stacked structure, a first connection electrode20ce, a second connection electrode30ce, a third connection electrode40ce, and a fourth connection electrode50ceformed on the light emitting stacked structure, and bonding metal layers20cp,30cp,40cp, and50cpmay be disposed on each of the connection electrodes.

The unit pixel100may include a first LED sub-unit, a second LED sub-unit, and a third LED sub-unit disposed on a substrate11. The first LED sub-unit may include a first light emitting stack20, the second LED sub-unit may include a second light emitting stack30, and the third LED sub-unit may include a third light emitting stack40. While the drawings exemplarily show the light emitting stacked structure including three light emitting stacks20,30, and40, however, the inventive concepts are not limited to a particular number of light emitting stacks. For example, in some exemplary embodiments, the light emitting stacked structure may include two or more light emitting stacks therein. Hereinafter, the light emitting stacked structure will be described with reference to one that includes three light emitting stacks20,30, and40according to an exemplary embodiment.

The substrate11may include a light transmitting insulating material so as to transmit light therethrough. In some exemplary embodiments, however, the substrate11may be formed to be semi-transparent so as to transmit only light having a specific wavelength, or formed to be partially transparent so as to transmit only a portion of light having the specific is wavelength. The substrate11may be a growth substrate capable of epitaxially growing the third light emitting stack40thereon, for example, a sapphire substrate. However, the inventive concepts are not limited thereto, and the substrate11may include various other transparent insulating materials. For example, the substrate11may include a glass, a quartz, a silicon, an organic polymer, or an organic-inorganic composite material, and may include, for example, a silicon carbide (SiC) substrate, a gallium nitride (GaN) substrate, an indium gallium nitride (InGaN) substrate, and aluminum gallium nitride (AlGaN) substrate, an aluminum nitride (AlN) substrate, a gallium oxide (Ga2O3) substrate, or a silicon substrate. In addition, the substrate11may include irregularities on an upper surface thereof, and it may be, for example, a patterned sapphire substrate. The irregularities formed on the upper surface of the substrate11may increase an extraction efficiency of light generated from the third light emitting stack40in contact with the substrate11. In addition, the irregularities of the substrate11may selectively increase a luminosity intensity of the third light emitting stack40compared to those of the first light emitting stack20and the second light emitting stack30. Meanwhile, in another exemplary embodiment, the substrate11may be removed.

The first, second, and third light emitting stacks20,30, and40are configured to emit light towards the substrate11. Accordingly, light emitted from the first light emitting stack20may pass through the second and third light emitting stacks30and40. According to an exemplary embodiment, the first, second, and third light emitting stacks20,30, and40may emit light having different peak wavelengths from one another. In an exemplary embodiment, the light emitting stack that is disposed further away from the substrate11may emit light having a longer wavelength compared to that of the light emitting stack disposed closer to the substrate11to reduce light loss. For example, the first light emitting stack20may emit red light, the second light emitting stack30may emit green light, and the third light emitting stack40may emit blue light, without being limited to.

In another exemplary embodiment, the second light emitting stack30may emit light having a shorter wavelength than that of the third light emitting stack40. In this case, a portion of light emitted from the second light emitting stack30may be absorbed by the third light emitting stack40. Accordingly, it is possible to reduce the luminous intensity of the second light emitting stack30and relatively increase the luminous intensity of the third light emitting stack40, and thus, it is possible to change a luminous intensity ratio of light emitted from the first, second, and third light emitting stacks20,30, and40. For example, the first light emitting stack20may be configured to emit red light, the second light emitting stack30to emit blue light, and the third light emitting stack40to emit green light. In this manner, it is possible to relatively decrease the luminous intensity of blue light and relatively increase the luminous intensity of green light, and thus, it is possible to easily adjust the luminous intensity ratio of red, green, and blue to be close to 3:6:1. Furthermore, light emitting areas of the first, second, and third light emitting stacks20,30, and40may be about 10,000 μm2or less, further, 4,000 μm2or less, and further, 2,500 μm2or less. In addition, the closer the light emitting stack is to the substrate11, the larger the light emitting area may be, and by disposing the third light emitting stack40emitting green light closest to the substrate11, the luminous intensity of green light may be further increased.

The second light emitting stack30has been exemplarily described above as emitting light having the shorter wavelength than that of the third light emitting stack40, but it is contemplated that the second light emitting stack30in other exemplary embodiments may emit light having the longer wavelength than that emitted from the third light emitting stack40, for example, green light.

The first light emitting stack20includes a first conductivity type semiconductor layer21, an active layer23, and a second conductivity type semiconductor layer25. According to an exemplary embodiment, the first light emitting stack20may include, a semiconductor material emitting red light, such as AlGaAs, GaAsP, AlGaInP, and GaP, without being limited thereto.

In an exemplary embodiment, the first light emitting stack20may have a symmetrical structure in plan view. For example, the first light emitting stack20may have a regular octagonal shape as shown inFIG. 2A. The symmetrical structure of the first light emitting stack20will be described in detail later with reference toFIGS. 16A, 16B, and 16C.

A first upper contact electrode21nmay be disposed on the first conductivity type semiconductor layer21and form an ohmic contact with the first conductivity type semiconductor layer21. A first lower contact electrode25pmay be disposed under the second conductivity type semiconductor layer25. According to an exemplary embodiment, a portion of the first conductivity type semiconductor layer21may be patterned to be recessed, and the first upper contact electrode21nmay be disposed in a recessed region of the first conductivity type semiconductor layer21so as to increase a level of ohmic contact. The first upper contact electrode21nmay have a single-layered structure or a multi-layered structure, and may include Al, Ti, Cr, Ni, Au, Ag, Sn, W, Cu, or an alloy thereof, for example, an Au—Te alloy or an Au—Ge alloy, without being limited thereto. In an exemplary embodiment, the first upper contact electrode21nmay have a thickness of about 100 nm, and may include metal having a high reflectance so as to increase light emission efficiency in a downward direction toward the substrate11.

The second light emitting stack30includes a first conductivity type semiconductor layer31, an active layer33, and a second conductivity type semiconductor layer35. According to an exemplary embodiment, the second light emitting stack30may include a semiconductor material emitting blue light, such as GaN, InGaN, ZnSe, or the like, without being limited thereto. A second lower contact electrode35pis disposed under the second conductivity type semiconductor layer35of the second light emitting stack30.

The third light emitting stack40includes a first conductivity type semiconductor layer41, an active layer43, and a second conductivity type semiconductor layer45. According to an exemplary embodiment, the third light emitting stack40may include a semiconductor material emitting green light, such as GaN, InGaN, GaP, AlGaInP, AlGaP, or the like. A third lower contact electrode45pis disposed on the second conductivity type semiconductor layer45of the third light emitting stack40.

According to an exemplary embodiment, each of the first conductivity type semiconductor layers21,31, and41and the second conductivity type semiconductor layers25,35, and45of the first, second, and third light emitting stacks20,30, and40may include a single-layered structure or a multi-layered structure, and in some exemplary embodiments, they may include a superlattice layer. Furthermore, the active layers23,33, and43of the first, second, and third light emitting stacks20,30, and40may have a single quantum well structure or a multi quantum well structure.

Each of the first, second, and third lower contact electrodes25p,35p, and45pmay include a transparent conductive material that transmits light. For example, the lower contact electrodes25p,35p, and45pmay include a transparent conductive oxide (TCO), for example, SnO, InO2, ZnO, ITO, ITZO, or the like, without being limited thereto. The first is lower contact electrode25pmay be thinner than the second and third lower contact electrodes35pand45p. For example, the first lower contact electrode25pmay be formed to have a thickness of about 240 nm, and the second and third lower contact electrodes35pand45pmay be formed to have a thickness of about 300 nm.

A first adhesive layer61is disposed between the first light emitting stack20and the second light emitting stack30, and a second adhesive layer63is disposed between the second light emitting stack30and the third light emitting stack40. The first and second adhesive layers61and63may include a non-conductive material that transmits light. For example, the first and second adhesive layers61and63may include an optically clear adhesive (OCA), for example, epoxy, polyimide, SUB, spin-on-glass (SOG), benzocyclobutene (BCB), without being limited thereto.

A first adhesion enhancement layer37may be disposed between the second adhesive layer63and the second light emitting stack30. For example, the first adhesive enhancement layer37may be disposed between the second adhesive layer63and the second lower contact electrode35pto contact them. The first adhesion enhancement layer37may prevent the second light emitting stack30from being peeled off from the second adhesive layer63in a process involving a rapid stress change, such as a laser lift-off process, and furthermore, may prevent the second light emitting stack30from being cracked. The first adhesion enhancement layer37may be formed of, for example, a silicon oxide film, without being limited thereto.

A second adhesion enhancement layer47may be disposed between the second adhesive layer63and the third light emitting stack40. For example, the second adhesive enhancement layer47may be disposed between the second adhesive layer63and the third lower is contact electrode45pto contact them. The second adhesion enhancement layer47may prevent the third light emitting stack40from being peeled off from the second adhesive layer63in a process involving a rapid stress change, such as a laser lift-off process, and furthermore, may prevent the third light emitting stack40from being cracked. The second adhesion enhancement layer47may be formed of, for example, a silicon oxide film, without being limited thereto.

The first and second adhesion enhancement layers37and47may have a thickness smaller than that of the second and third lower contact electrodes35pand45p, respectively, and may have a thickness of, for example, about 100 nm.

According to the illustrated exemplary embodiment, a first insulation layer71and a second insulation layer73are disposed on at least portions of sides of the first, second, and third light emitting stacks20,30, and40. The first and second insulation layers71and73may include various organic or inorganic insulating materials, for example, polyimide, SiO2, SiNx, Al2O3, or the like. For example, at least one of the first and second insulation layers71and73may include a distributed Bragg reflector DBR. As another example, at least one of the first and second insulation layers71and73may include a black organic polymer. In some exemplary embodiments, an electrically floating metallic reflection layer may be disposed on the first and second insulation layers71and73to reflect light emitted from the light emitting stacks20,30, and40toward the substrate11. In some exemplary embodiments, at least one of the first and second insulation layers71and73may have a single-layered structure or a multi-layered structure formed of two or more insulation layers having different refractive indices from one another.

According to an exemplary embodiment, each of the first, second, and third light emitting stacks20,30, and40may be driven independently. More particularly, a common voltage may be applied to one of the first and second conductivity type semiconductor layers of each of the light emitting stacks, and a separate light emitting signal may be applied to another one of the first and second conductivity type semiconductor layers of each of the light emitting stacks. For example, according to an exemplary embodiment, the first conductivity type semiconductor layers21,31, and41of each of the light emitting stacks may be n-type, and the second conductivity type semiconductor layers25,35, and45thereof may be p-type. In this case, the third light emitting stack40may have a reversed stacked sequence compared to those of the first light emitting stack20and the second light emitting stack30, such that the p-type semiconductor layer45may be disposed over the active layer43, so that a manufacturing process may be simplified. Hereinafter, according to the illustrated exemplary embodiment, the first conductivity type and the second conductivity type semiconductor layers will be described as n-type and p-type, respectively. As described above, however, the n-type and the p-type may be reversed in other exemplary embodiments.

The first, second, and third lower contact electrodes25p,35p, and45prespectively connected to the p-type semiconductor layers25,35, and45of the light emitting stacks may be electrically connected to the first through third connection electrodes20ce,30ce, and40ce, respectively, and receive a corresponding light emitting signal, respectively. Meanwhile, the n-type semiconductor layers21,31, and41of the light emitting stacks may be commonly electrically connected to the fourth connection electrode50ce. Accordingly, the unit pixel100has a common n-type light emitting stacked structure, in which the n-type semiconductor layers21,31, and41of the first, second, and third light emitting stacks20,30and40are commonly connected, and may be driven independently of one another. Since it has the common n-type light emitting stacked structure, sources of voltages applied to the first, is second, and third light emitting stacks20,30, and40may be different from one another.

The unit pixel100according to the illustrated exemplary embodiment has the common n-type structure, but the inventive concepts are not limited thereto. For example, in some exemplary embodiments, the first conductivity type semiconductor layers21,31, and41of each of the light emitting stacks may be p-type, and the second conductivity type semiconductor layers25,35, and45of each of the light emitting stacks may ben-type, and thus, it is possible to form a common p-type light emitting stacked structure. In addition, in some exemplary embodiments, the stacking sequence of each of the light emitting stacks is not limited to that illustrated in the drawings, but may be variously modified. Hereinafter, the unit pixel100will be described with reference to the common n-type light emitting stacked structure.

According to the illustrated exemplary embodiment, the unit pixel100includes a first pad20pd, a second pad30pd, a third pad40pd, and a fourth pad50pd. The first pad20pdis electrically connected to the first lower contact electrode25pthrough a first contact hole20CH defined through the first insulation layer71. The first connection electrode20ceis electrically connected to the first pad20pdthrough a first through hole20ctdefined through the second insulation layer73. The second pad30pdis electrically connected to the second lower contact electrode35pthrough a second contact hole30CH defined through the first insulation layer71. The second connection electrode30ceis electrically connected to the second pad30pdthrough a second through hole30ctdefined through the second insulation layer73.

The third pad40pdis electrically connected to the third lower contact electrode45pthrough a third contact hole40CH defined through the first insulation layer71. The third connection electrode40ceis electrically connected to the third pad40pdthrough a third through hole40ctdefined through the second insulation layer73. The fourth pad50pdis connected to is the first conductivity type semiconductor layers21,31, and41of the first, second, and third light emitting stacks20,30, and40through a first sub-contact hole50CHa, a second sub-contact hole50CHb, and a third sub-contact hole50CHc defined through the first insulation layer71on the first conductivity type semiconductor layers21,31, and41of the first, second, and third light emitting stacks20,30, and40. In particular, the first sub-contact hole50CHa may expose the first upper contact electrode21n, and the fourth pad50pdmay be connected to the first upper contact electrode21nthrough the first sub-contact hole50CHa. In this manner, the fourth pad50pdmay be electrically connected to the first conductivity type semiconductor layers21,31, and41through the sub-contact holes50CHa,50CHb and50CHc, and thus, the manufacturing process of the unit pixel100may be simplified. The fourth connection electrode50ceis electrically connected to the fourth pad50pdthrough a fourth through hole50ctdefined through the second insulation layer73.

In the illustrated exemplary embodiment, although the first through fourth connection electrodes20ce,30ce,40ce, and50ceare illustrated and described as directly contacting the pads20pd,30pd,40pd, and50pd, respectively, in some exemplary embodiments, the first through fourth connection electrodes20ce,30ce,40ce, and50cemay not be directly connected to the pads20pd,30pd,40pd, and50pd, and another connector may be interposed therebetween.

The first, second, third, and fourth pads20pd,30pd,40pd, and50pdare spaced apart and insulated from one another. According to an exemplary embodiment, each of the first, second, third, and fourth pads20pd,30pd,40pd, and50pdmay cover at least a portion of the sides of the first, second, and third light emitting stacks20,30, and40. In this manner, heat generated from the first, second, and third light emitting stacks20,30, and40may be easily is dissipated.

According to the illustrated exemplary embodiment, each of the connection electrodes20ce,30ce,40ce, and50cemay have a substantially upwardly elongated shape from the substrate11. In an exemplary embodiment, the first through fourth connection electrodes20ce,30ce,40ce, and50cemay be disposed in a diagonal direction of the unit pixel100. Accordingly, the light emitting area of the first through third light emitting stacks20,30, and40may be maximally secured.

The first through fourth connection electrodes20ce,30ce,40ce, and50cemay include metal, such as Cu, Ni, Ti, Sb, Zn, Mo, Co, Sn, Ag, or an alloy thereof, without being limited thereto. For example, each of the connection electrodes20ce,30ce,40ce, and50cemay include two or more metals or a plurality of different metal layers so as to reduce the stress from the elongated shape of the connection electrodes20ce,30ce,40ce, and50ce. The first through fourth connection electrodes20ce,30ce,40ce, and50cemay be formed of, for example, Cu, which is advantageous in terms of deposition using plating and cost. Cu forms a natural oxide film, which can be removed by flux in a solder paste in a surface mount technology using the solder paste. However, in the surface mount technology using the solder paste, when a distance between the first through fourth connection electrodes20ce,30ce,40ce, and50ceis about 50 μm or less, an electrical short between the solder pastes may occur, so that the unit pixel100is not suitable for being mounted.

Eutectic bonding technology may be used as a method that can be used to bond light emitting devices of extremely small sizes, such as micro LEDs. However, the natural oxide film on Cu may interfere with eutectic bonding, and may cause a bonding failure.

Accordingly, according to an exemplary embodiment, the bonding metal layers20cp,30cp,40cp, and50cpmay be disposed on the first through fourth connection electrodes20ce,30ce,40ce, and50ce, respectively. The bonding metal layers20cp,30cp,40cp, and50cpare electrically connected to the first through fourth connection electrodes20ce,30ce,40ce, and50ce, respectively. The bonding metal layers20cp,30cp,40cp, and50cpmay be formed of a metallic layer that can be bonded to a circuit board through eutectic bonding, for example, Au or Au/In. In this case, a pad disposed on the circuit board may include, for example, In or Sn. It may be considered to form the bonding metal layers20cp,30cp,40cp, and50cpof In or Sn, but there are drawbacks in that depositing In thick through plating technology is difficult, and it is also difficult to probe Sn for measuring electrical characteristics of the unit pixel100. Accordingly, by forming the bonding metal layers20cp,30cp,40cp, and50cpof Au, a bonding metal layer having a sufficient thickness may be formed, and further, the electrical characteristics of the unit pixel100may be easily measured.

In some exemplary embodiments, a barrier layer may be interposed between the first through fourth connection electrodes20ce,30ce,40ce, and50ceand the bonding metal layers20cp,30cp,40cp, and50cp. The barrier layer prevents the bonding metal layers20cp,30cp,40cp, and50cpfrom being mixed with the connection electrodes20ce,30ce,40ce, and50ce.

A region between the first through fourth connection electrodes20ce,30ce,40ce, and50cemay be filled with a protection layer81. The protection layer81may be formed of, for example, PDMA or black epoxy molding compound (EMC). The protection layer81may surround side surfaces of the first through fourth connection electrodes20ce,30ce,40ce, and50ce. The protection layer81may surround substantially the entire side surfaces of the first through fourth connection electrodes20ce,30ce,40ce, and50ce, and may expose upper surfaces thereof. In an exemplary embodiment, an upper surface of the protection layer81may be flush with the upper surfaces of the first through fourth connection electrodes20ce,30ce,40ce, and50ce. In another exemplary embodiment, the upper surfaces of the first through fourth connection electrodes20ce,30ce,40ce, and50cemay be recessed from the upper surface of the protection layer81. In yet another exemplary embodiment, the upper surfaces of the first through fourth connection electrodes20ce,30ce,40ce, and50cemay protrude from the upper surface of the protection layer81.

According to an exemplary embodiment, when the unit pixel100is a micro LED, which has a surface area less than about 10,000 μm2as known in the art, or less than about 4,000 μm2or 2,500 μm2in other exemplary embodiments, the connection electrodes20ce,30ce,40ce, and50cemay overlap a portion of at least one of the first, second, and third light emitting stacks20,30, and40as shown in the drawings. More particularly, the connection electrodes20ce,30ce,40ce, and50cemay overlap at least one step formed in a side surface of the light emitting stacked structure. As such, since an area of a lower surface of a connection electrode is greater than that of the upper surface thereof, a greater contacting area may be formed between the connection electrodes20ce,30ce,40ce, and50ceand the light emitting stacked structure. Accordingly, the connection electrodes20ce,30ce,40ce, and50cemay be more stably formed on the light emitting stacked structure, and heat generated in the light emitting stacked structure may be more efficiently dissipated to the outside.

In some exemplary embodiments, at least one of the first through fourth connection electrodes20ce,30ce,40ce, and50cemay overlap the side surface of each of the light emitting stacks20,30, and40, and thus, heat generated in the light emitting stacks20,30, and40is efficiently dissipated to the outside. In addition, when the first through fourth connection electrodes20ce,30ce,40ce, and50ceinclude a reflective material such as metal, the first through fourth connection electrodes20ce,30ce,40ce, and50cemay reflect light emitted from at least one or more light emitting stacks20,30, and40, and thus, light efficiency may be improved.

FIG. 3Ais a schematic cross-sectional view illustrating a method of manufacturing a first LED sub-unit of a unit pixel according to an exemplary embodiment,FIG. 3Bis a schematic cross-sectional view illustrating a method of manufacturing a second LED sub-unit of a unit pixel according to an exemplary embodiment, andFIG. 3Cis a schematic cross-sectional view illustrating a method of manufacturing a third LED sub-unit of a unit pixel according to an exemplary embodiment.

Referring toFIG. 3A, a first light emitting stack20is grown on a first temporary substrate S1. The first temporary substrate S1may be, for example, a GaAs substrate. In addition, the first light emitting stack20may be formed of AlGaInP-based semiconductor layers, and includes a first conductivity type semiconductor layer21, an active layer23, and a second conductivity type semiconductor layer25. A first lower contact electrode25pmay be formed on the second conductivity type semiconductor layer25.

Referring toFIG. 3B, a second light emitting stack30is grown on a second temporary substrate S2, and a second lower contact electrode35pis formed on the second light emitting stack30. The second light emitting stack30may include a first conductivity type semiconductor layer31, an active layer33, and a second conductivity type semiconductor layer35.

The second temporary substrate S2is a substrate capable of growing a gallium nitride-based semiconductor layer, and may be, for example, a sapphire substrate. The second light emitting stack30may be formed to emit blue light, for example. Meanwhile, the second lower contact electrode35pis in ohmic contact with the second conductivity type semiconductor layer35. Furthermore, a first adhesion enhancement layer37may be formed on the second lower contact electrode35p. The first adhesion enhancement layer37may be formed of, for example, SiO2.

Referring toFIG. 3C, a third light emitting stack40is grown on a substrate11, and a third lower contact electrode45pis formed on the third light emitting stack40. The third light emitting stack40includes a first conductivity type semiconductor layer41, an active layer43, and a second conductivity type semiconductor layer45.

A third substrate11is a substrate capable of growing a gallium nitride-based semiconductor layer, and may be, for example, a sapphire substrate. The third light emitting stack40may be formed to emit green light, for example. The third lower contact electrode45pis in ohmic contact with the second conductivity type semiconductor layer45. Furthermore, a second adhesion enhancement layer47may be formed on the third lower contact electrode45p. The second adhesion enhancement layer47may be formed of, for example, SiO2.

The first conductivity type semiconductor layer41, the active layer43, and the second conductivity type semiconductor layer45of the third light emitting stack40may be sequentially grown on the substrate11by, for example, a metal organic chemical vapor deposition (MOCVD) method or a molecular beam epitaxy (MBE) method. The third lower contact electrode45pmay be formed on the second conductivity type semiconductor layer45by, for example, a physical vapor deposition method or a chemical vapor deposition method, and may include a transparent conductive oxide (TCO), such as SnO, InO2, ZnO, ITO, or ITZO. When the third light emitting stack40according to an exemplary embodiment emits green light, the substrate11may include Al2O3(e.g., a sapphire substrate), and the third lower contact electrode45pmay include a transparent conductive oxide (TCO). The first and second light emitting stacks20and30may be similarly formed by sequentially growing the first conductivity type semiconductor layer, the active layer, and the second conductivity type semiconductor layer on the temporary substrates S1and S2, respectively. The lower contact electrodes25pand35pincluding the transparent conductive oxide (TCO) may be formed on the second conductivity type semiconductor layers25and35, respectively, by, for example, the physical vapor deposition method or the chemical vapor deposition method.

FIG. 4is a schematic cross-sectional view illustrating a stacked structure of the unit pixel according to an exemplary embodiment. The stacked structure of the unit pixel is formed using the first through third LED sub-units described above with reference toFIGS. 3A, 3B, and 3C.

Referring toFIG. 4, the second light emitting stack30described with reference toFIG. 3Bis bonded to the third light emitting stack40described with reference toFIG. 3C. For example, the first adhesion enhancement layer37and the second adhesion enhancement layer47may be bonded so as to face each other. A second adhesive layer63may be formed on the second adhesion enhancement layer47, and the first adhesion enhancement layer37may be adhered to the second adhesive layer63. The second adhesive layer63may be, for example, a transparent organic material layer or a transparent inorganic material layer. Examples of the organic layer include SU8, poly(methylmethacrylate) (PMMA), polyimide, parylene, benzocyclobutene (BCB), or the like, and examples of the inorganic layer include Al2O3, SiO2, SiNx, or the like. The organic layers may be bonded under a high vacuum and a high pressure. After surfaces of the organic layers are planarized through chemical mechanical polishing, for example, the inorganic layers may be bonded under a high vacuum by lowering a surface energy using plasma or the like.

Thereafter, the second temporary substrate S2may be removed from the second light emitting stack30using a technique such as laser lift-off, chemical lift-off, or the like. In particular, the second temporary substrate S2may be removed using the laser lift-off, and in this case, a sudden stress change may be induced in the second light emitting stack30and the second adhesive layer63. The first and second adhesion enhancement layers37and47prevent the second light emitting stack30from being cracked or being peeled off from such a sudden stress change. Meanwhile, as the second temporary substrate S2is removed, the first conductivity type semiconductor layer31of the second LED stack30is exposed upward. The exposed surface of the first conductivity type semiconductor layer31may be textured.

Subsequently, the first light emitting stack20is bonded to the second light emitting stack30. In an exemplary embodiment, a first adhesive layer61may be formed on the first lower contact electrode25p, and the first light emitting stack20may be coupled onto the second light emitting stack30using the first adhesive layer61. Since the first adhesive layer61is formed on the first lower contact electrode25p, the first adhesive layer61may be formed on the first light emitting stack20while the second light emitting stack30and the third light emitting stack40are bonded, and thus, a process time may be shortened. However, the inventive concepts are not limited thereto, and in other exemplary embodiments, the first adhesive layer61may be formed on the second light emitting stack30, and the first light emitting stack20may be coupled to the second light emitting stack30.

Thereafter, the first temporary substrate S1is removed. The first temporary substrate S1may be removed from the first light emitting stack20using, for example, an etching technique. Accordingly, the light emitting stacked structure shown inFIG. 4is provided. The above-described unit pixel100is formed by processing the light emitting stacked structure.

Hereinafter, a method of manufacturing the unit pixel100using the light emitting stacked structure ofFIG. 4will be described in detail.

First, referring toFIGS. 5A, 5B and 5C, the first lower contact electrode25pis exposed by patterning the first conductivity type semiconductor layer21, the active layer23, and the second conductivity type semiconductor layer25. The first conductivity type semiconductor layer21, the active layer23, and the second conductivity type semiconductor layer25may be patterned using photolithography and etching processes. The photolithography process may be performed using a first mask, and the first conductivity type semiconductor layer21, the active layer23, and the second conductivity type semiconductor layer25may be etched, for example, using a dry etching technique. After patterning, the first light emitting stack20is surrounded by the exposed first lower contact electrode25pwhen viewed in plan. Although one first light emitting stack20is illustrated herein, the first light emitting stack20may be patterned in each of unit pixel regions on the substrate11.

The first light emitting stack20may be disposed in a central portion of the unit pixel region, without being limited thereto. Meanwhile, a planar shape of the first light emitting stack20may have a symmetrical structure. For example, the planar shape of the first light emitting stack20may have a symmetrical structure such as a mirror symmetrical structure or a rotational symmetrical structure. The unit pixel100may have a rectangular or square shape, and the planar shape of the first light emitting stack20may have a mirror symmetrical structure with respect to a vertical plane passing through a straight line parallel to a lateral edge of the unit pixel and/or a vertical plane passing through a straight line parallel to a vertical edge of the unit pixel. The planar shape of the first light emitting stack20may have, for example, an octagonal, hexagonal, or rhombus shape, and further, may have a regular octagonal, regular hexagonal, or square shape, without being limited thereto.

Referring toFIGS. 6A, 6B, and 6C, the first lower contact electrode25pis patterned such that a portion of the first lower contact electrode25pis retained around the first light emitting stack20. The first lower contact electrode25pmay be patterned using a second mask. In this case, the first adhesive layer61may also be patterned together. Accordingly, the first conductivity type semiconductor layer31of the second light emitting stack30may be exposed around the first lower contact electrode25p.

A planar shape of the first lower contact electrode25pis substantially similar to that of the first light emitting stack20, except that a protrusion (a portion near one end of the lead line of the reference number25p) is included on one side of the first light emitting stack20.

The protrusion is disposed in a diagonal direction of the unit pixel100. A region of the first lower contact electrode25pexcluding the protrusion may have a shape substantially identical to the planar shape of the first light emitting stack20. In a particular exemplary embodiment, the first lower contact electrode25pmay have a mirror symmetrical structure with respect to a vertical plane passing through line A-A′, and may have an asymmetrical structure with respect to a vertical plane passing through line B-B′.

Referring toFIGS. 7A, 7B, and 7C, the second lower contact electrode35pis exposed by patterning the first conductivity type semiconductor layer31, the active layer33, and the second conductivity type semiconductor layer35. The first conductivity type semiconductor layer31, the active layer33, and the second conductivity type semiconductor layer35may be patterned using photolithography and etching processes. The photolithography process may be performed using a third mask, and the first conductivity type semiconductor layer31, the active layer33, and the second conductivity type semiconductor layer35may be etched using, for example, a dry etching technique. After patterning, the second light emitting stack30is surrounded by the exposed second lower contact electrode35pwhen viewed in plan.

A planar shape of the second light emitting stack30is substantially similar to that of the first lower contact electrode25p, except that a protrusion (a portion near one end of the lead line of the reference number31) is included on one side of the first lower contact electrode25p. A region of the second light emitting stack30excluding the protrusion may have a shape substantially identical to the planar shape of the first lower contact electrode25p. Accordingly, the second light emitting stack30has the shape substantially similar to the planar shape of the first light emitting stack20, but has protrusions at two portions in the diagonal direction of the unit pixel100. In a particular exemplary embodiment, the second light emitting stack30has a mirror symmetrical structure with respect to a vertical plane dividing an upper part from a lower part of the second light emitting stack30, that is, the vertical plane passing through a straight line parallel to the lateral edge of the unit pixel100. Except for the protrusion of the first lower contact electrode25pand the protrusion of the second light emitting stack30, the second light emitting stack30may have substantially the same planar shape as that of the first light emitting stack20.

Referring toFIGS. 8A, 8B, and 8C, the second lower contact electrode35pis patterned such that a portion of the second lower contact electrode35pis retained around the second light emitting stack30. The second lower contact electrode35pmay be patterned using a fourth mask. In this case, the first adhesion enhancement layer37, the second adhesive layer63, and the second adhesion enhancement layer47may also be patterned together. Accordingly, the third lower contact electrode45pmay be exposed around the second lower contact electrode35p.

A planar shape of the second lower contact electrode35pis substantially similar to that of the second light emitting stack30, except that a protrusion (a portion near one end of the lead line of the reference number35p) is included on one side of the second light emitting stack30. A region of the second lower contact electrode35pexcluding the protrusion may have a shape substantially identical to the planar shape of the second light emitting stack30. In a particular exemplary embodiment, the second lower contact electrode35pmay have a mirror symmetrical structure with respect to the vertical plane passing through line B-B′, and may have an asymmetrical structure with respect to the vertical plane passing through line A-A′.

Referring toFIGS. 9A, 9B, and 9C, the third lower contact electrode45pis patterned such that the third lower contact electrode45pis retained around the second lower contact electrode35p. The third lower contact electrode45pmay be patterned using a fifth mask. Furthermore, the first conductivity type semiconductor layer41may be exposed by patterning the second conductivity type semiconductor layer45and the active layer43. For example, the third lower contact electrode45p, the second conductivity type semiconductor layer45, and the active layer43may be etched using a dry etching technique. Accordingly, the first conductivity type semiconductor layer41is exposed around the third lower contact electrode45p.

A planar shape of the third lower contact electrode45pis substantially similar to that of the second lower contact electrode35p, except that a protrusion (a portion near one end of the line of the reference number45p) is included on one side of the second lower contact electrode35p. A region of the third lower contact electrode45pexcluding the protrusion may have a shape substantially identical to the planar shape of the second lower contact electrode35p. In a particular exemplary embodiment, the planar shape of the third lower contact electrode45pmay have a mirror symmetrical structure with respect to the vertical plane passing through line A-A′, and may have a symmetrical structure with respect to the vertical plane passing through line B-B′. Furthermore, the planar shape of the third lower contact electrode45pmay be substantially rectangular or square.

According to the illustrated exemplary embodiment, the first light emitting stack20has a smallest area among the light emitting stacks20,30, and40. Meanwhile, the third light emitting stack40may have a largest area among the light emitting stacks20,30, and40, and thus, a luminous intensity of the third light emitting stack40may be relatively increased.

Referring toFIGS. 10A, 10B, and 10C, a portion of an upper surface of the first conductivity type semiconductor layer21of the first light emitting stack20may be patterned through wet-etching so as to form a first upper contact electrode21n. The first conductivity type semiconductor layer21may be, for example, an n++ GaAs layer, and a portion of an upper surface of the n++ GaAs layer may be recessed through wet etching.

The first upper contact electrode21nmay be formed in a recessed region of the first conductivity type semiconductor layer21. The first upper contact electrode21nmay be formed of, for example, AuGe/Ni/Au/Ti, and may have a thickness of, for example, 100 nm/25 nm/100 nm/10 nm. Ohmic contact characteristics may be improved by partially removing the surface of the n++ GaAs layer, and allowing the first upper contact electrode21nto contact the first conductivity type semiconductor layer21in the recessed region.

The first upper contact electrode21nmay have an area smaller than that of the first light emitting stack20. However, the first upper contact electrode21nmay have a planar shape substantially identical to that of the first light emitting stack20, without being limited thereto.

Referring toFIGS. 11A, 11B and 11C, a first insulation layer71covering the first through third light emitting stacks20,30, and40is formed. The first insulation layer71covers the first upper contact electrode21n. The first insulation layer71may be formed of, for example, SiN, SiO2, Al2O3, or the like and has a thickness of about 4000 Å.

Meanwhile, a portion of the first insulation layer71may be partially removed so as to form first, second, third, and fourth contact holes20CH,30CH,40CH, and50CH. The first contact hole20CH is defined on the first lower contact electrode25pto expose a portion of the first lower contact electrode25p. The second contact hole30CH may be defined on the second lower contact electrode35pto expose the second lower contact electrode35p. The third contact hole40CH may be defined on the third lower contact electrode45pto expose the third lower contact electrode45p.

The fourth contact hole50CH provides a path for allowing electrical connection to the first conductivity type semiconductor layers21,31, and41of the first through third light emitting stacks20,30, and40. The fourth contact hole50CH may include a first sub-contact is hole50CHa, a second sub-contact hole50CHb, and a third sub-contact hole50CHc. The first sub-contact hole50CHa may be defined on the first conductivity type semiconductor layer21to expose a portion of the first upper contact electrode21n, and the second sub-contact hole50CHb may be defined on the first conductivity type semiconductor layer31to expose a portion of the first conductivity type semiconductor layer31, and the third sub-contact hole50CHc may be defined on the first conductivity type semiconductor layer41to expose a portion of the first conductivity type semiconductor layer41. InFIG. 11C, the third sub-contact hole50CHc is indicated with a dotted line to exemplarily illustrate its position in a cross-sectional view of the unit pixel100.

The first contact hole20CH, the second contact hole30CH, the third contact hole40CH, and the second sub-contact hole50CHb may be disposed on the protrusions disposed at the outside of the first light emitting stack20, respectively. Meanwhile, the first sub-contact hole50CHa may be disposed on the first upper contact electrode21n, and the third sub-contact hole50CHc may be disposed on the first conductivity type semiconductor layer41outside of the third lower contact electrode45p.

Referring toFIGS. 12A, 12B, and 12C, first, second, third, and fourth pads20pd,30pd,40pd, and50pdare formed on the first insulation layer71. The first, second, third and fourth pads20pd,30pd,40pd, and50pdmay be formed by, for example, forming a conductive layer on a substantially entire surface of the substrate11and patterning the conductive layer using photolithography and etching processes.

The first pad20pdmay be formed so as to overlap a region where the first contact hole20CH is formed, and may be connected to the first lower contact electrode25pthrough the first contact hole20CH. The second pad30pdmay be formed so as to overlap a region where the second contact hole30CH is formed, and may be connected to the second lower contact electrode layer35pthrough the second contact hole30CH. The third pad40pdmay be formed so as to overlap a region where the third contact hole40CH is formed, and may be connected to the third lower contact electrode45pthrough the third contact hole40CH. The fourth pad50pdmay be formed so as to overlap a region in which the fourth contact hole50CH is formed, in particular, a region in which the first, second, and third sub-contact holes50CHa,50CHb, and50CHc are formed, and may be electrically connected to the first conductivity type semiconductor layers21,31, and41of the first through third light emitting stacks20,30, and40.

The first through fourth pads20pd,30pd,40pd, and50pdmay include Au, may be formed in, for example, a stacked structure of Ti/Ni/Ti/Ni/Ti/Ni/Au/Ti, and a thickness thereof may be, for example, about 100 nm/50 nm/100 nm/50 nm/100 nm/50 nm/3000 nm/10 nm.

Referring toFIGS. 13A, 13B, and 13C, a second insulation layer73may be formed on the first insulation layer71. The second insulation layer73may be formed of SiNx, SiO2, Al2O3, or the like.

Subsequently, the second insulation layer73may be patterned to form first, second, third, and fourth through holes20ct,30ct,40ct, and50ctexposing the first through fourth pads20pd,30pd,40pd, and50pd.

The first through hole20ctformed on the first pad20pdexposes a portion of the first pad20pd. The second through hole30ctformed on the second pad30pdexposes a portion of the second pad30pd. The third through hole40ctformed on the third pad40pdexposes a portion of the third pad40pd. The fourth through hole50ctformed on the fourth pad50pdexposes a portion of the fourth pad50pd. In the illustrated exemplary embodiment, the first, second, third, and fourth through holes20ct,30ct,40ct, and50ctmay be defined within regions in which the first, second, third, and fourth pads20pd,30pd,40pd, and50pdare formed, respectively. In addition, the first, second, third, and fourth through holes20ct,30ct,40ct, and50ctmay be disposed outside of the first light emitting stack20.

Referring toFIGS. 14A, 14B, and 14C, first, second, third, and fourth connection electrodes20ce,30ce,40ce, and50ceare formed on the second insulation layer73in which the first, second, third, and fourth through-holes20ct,30ct,40ct, and50ctare formed. The first connection electrode20cemay be formed so as to overlap a region in which the first through hole20ctis formed, and may be connected to the first pad20pdthrough the first through hole20ct. The second connection electrode30cemay be formed so as to overlap a region where the second through hole30ctis formed, and may be connected to the second pad30pdthrough the second through hole30ct. The third connection electrode40cemay be formed so as to overlap a region in which the third through hole40ctis formed, and may be connected to the third pad40pdthrough the third through hole40ct. The fourth connection electrode50cemay be formed so as to overlap a region where the fourth through hole50ctis formed, and may be connected to the fourth pad50pdthrough the fourth through hole50ct.

The first, second, third, and fourth connection electrodes20ce,30ce,40ce, and50cemay be spaced apart from one another and formed on the light emitting stacked structure. The first, second, third, and fourth connection electrodes20ce,30ce,40ce, and50cemay be electrically connected to the first, second, third, and fourth pads20pd,30pd,40pd, and50pd, respectively, to transmit an external signal to each of the light emitting stacks20,30, and40.

A method of forming the first, second, third, and fourth connection electrodes20ce,30ce,40ce, and50ceis not particularly limited. For example, according to an exemplary embodiment, a seed layer may be deposited as a conductive surface on the light emitting stacked structure, and a photoresist pattern may be formed such that the seed layer is exposed at a location where a connection electrode is to be formed. According to an exemplary embodiment, the seed layer may be deposited to have a thickness of about 1000 Å, without being limited thereto. The seed layer may be formed of, for example, Ti/Cu. Subsequently, the seed layer may be plated with metal, such as Cu, Ni, Ti, Sb, Zn, Mo, Co, Sn, Ag, or an alloy thereof. Cu is particularly easy to be plated and economical.

Meanwhile, after the plating process is completed, a polishing process may be performed so as to planarize an upper surface of the connection electrode. Thereafter, the photoresist pattern and the seed layer remaining between the connection electrodes may be removed. In some exemplary embodiments, the polishing process may be omitted.

According to the illustrated exemplary embodiment, each of the connection electrodes20ce,30ce,40ce, and50cemay have a substantially elongated shape in a direction away from the substrate11. In another exemplary embodiment, the first through fourth connection electrodes20ce,30ce,40ce, and50cemay include two or more metals or a plurality of different metal layers so as to reduce a stress from the elongated shape of the first through fourth connection electrodes20ce,30ce,40ce, and50ce. However, the inventive concepts are not limited to specific shapes of the first through fourth connection electrodes20ce,30ce,40ce, and50ce, and the connection electrodes may have various shapes in other exemplary embodiments.

The first through fourth connection electrodes20ce,30ce,40ce, and50cemay overlap at least one step formed on a side surface of the light emitting stacked structure. In this manner, a lower surface of the connection electrode may have a width larger than that of an upper surface, and it is possible to provide a larger contact area between the first through fourth connection electrodes20ce,30ce,40ce, and50ceand the light emitting stacked structure, and thus, that the unit pixel100may have a more stable structure capable of withstanding subsequent processes.

Referring toFIGS. 15A, 15B, and 15C, a protection layer81covering the first through fourth connection electrodes20ce,30ce,40ce, and50ceis formed. The protection layer81may fill a region between the first through fourth connection electrodes20ce,30ce,40ce, and50ce, and may cover side surfaces of the first through fourth connection electrodes20ce,30ce,40ce, and50ce. Furthermore, the protection layer81may be first formed so as to cover the upper surfaces of the first through fourth connection electrodes20ce,30ce,40ce, and50ce, and then, may be removed together with portions of upper regions of the first through fourth connection electrodes20ce,30ce,40ce, and50using a grinding technique. For example, the first through fourth connection electrodes20ce,30ce,40ce, and50cemay be covered with an epoxy molding compound using a lamination technique, and after curing them, the epoxy molding compound may be removed using the grinding technique. Accordingly, an upper surface of the protection layer81may be formed flush with the upper surfaces of the first through fourth connection electrodes20ce,30ce,40ce, and50ce. In one exemplary embodiment, the upper surfaces of the first through fourth connection electrodes20ce,30ce,40ce, and50cemay slightly protrude than the upper surface of the protection layer81.

Thereafter, bonding metal layers20cp,30cp,40cp, and50cpare formed on the first through fourth connection electrodes20ce,30ce,40ce, and50ce. The bonding metal layers20cp,30cp,40cp, and50cphaving a multilayer structure of, for example, Ti/Ni/Au (50 nm/50 nm/400 nm) may be formed using a lift-off technique using a photoresist pattern exposing the upper surfaces of the first through fourth connection electrodes20ce,30ce,40ce, and50ce.

The bonding metal layers20cp,30cp,40cp, and50cpmay be deposited using sputtering technology, and before the deposition, a pretreatment of removing natural oxide layers formed on the upper surfaces of the first through fourth connection electrodes20ce,30ce,40ce, and50cemay be performed using sulfuric acid. In an exemplary embodiment, the bonding metal layers20cp,30cp,40cp, and50cpmay have an area smaller than an area of the upper surface of the first through fourth connection electrodes20ce,30ce,40ce, and50ce, respectively. In this case, the upper surfaces of the first through fourth connection electrodes20ce,30ce,40ce, and50cemay include a recessed region. In another exemplary embodiment, the bonding metal layers20cp,30cp,40cp, and50cpmay have an area larger than the area of the upper surface of the first through fourth connection electrodes20ce,30ce,40ce, and50ce, respectively. In this case, portions of the bonding metal layers20cp,30cp,40cp, and50cpmay be disposed on the protection layer81.

Since the first through fourth connection electrodes20ce,30ce,40ce, and50ceare formed of metal that is advantageous for plating, they may not be suitable for bonding. Furthermore, natural oxide layers that may be formed on the upper surfaces of the first through fourth connection electrodes20ce,30ce,40ce, and50cewould cause contact failure. Accordingly, the natural oxide layers may be removed by partially removing the upper surfaces of the first through fourth connection electrodes20ce,30ce,40ce, and50ce, and in addition, the unit pixel100may be easily mounted on a circuit board using eutectic bonding technology by employing the bonding metal layers20cp,30cp,40cp, and50cp.

Thereafter, individualized unit pixels100may be completed by dividing the substrate11into unit pixel regions. The substrate11may be divided using a laser scribing technique. In other exemplary embodiments, the substrate11may be removed from the third light emitting stack40.

The unit pixels100may be bonded onto the circuit board1001or a pixel substrate2100ofFIG. 1using the bonding metal layers20cp,30cp,40cp, and50cpto provide a display apparatus10000. Accordingly, the unit pixels100are bonded such that the substrate11is disposed on a user's side in the display apparatus10000, and light emitted from the first light emitting stack20, the second light emitting stack30, and the third light emitting stack40is emitted to the outside through the substrate11.

FIG. 16Ais a schematic plan view illustrating a shape of the unit pixel100according to an exemplary embodiment.

Referring toFIG. 16A, the first light emitting stack20may have a symmetrical structure with respect to an X-axis dividing an upper part from a lower part in plan view. In addition, the first light emitting stack20may have a symmetrical structure with respect to a Y axis dividing a left part from a right part in plan view. Accordingly, light emitted from the first light emitting stack20may exhibit a symmetrical emission pattern in the X-axis direction, and may also exhibit a symmetrical emission pattern in the Y-axis direction. In the illustrated exemplary embodiment, the first light emitting stack20has a regular octagonal shape. Accordingly, the emission pattern in the X-axis direction and the emission pattern in the Y-axis direction may be substantially similar. However, the shape of the first light emitting stack20is not limited to the regular octagon, and the first light emitting stack20may have any octagonal shape that is symmetrical left and right and up and down in other exemplary embodiments.

Meanwhile, the second light emitting stack30has a shape substantially similar to that of the first light emitting stack20, but includes additional regions for electrical connection. For example, it may have protrusions in regions near the ends of the lead lines of reference numerals25pand31(for example, seeFIG. 7A). Accordingly, the second light emitting stack30may have a symmetrical structure with respect to the X-axis, but may have an asymmetrical structure with respect to the Y-axis. However, the additional region of the second light emitting stack30is out of the X and Y axes. Accordingly, when only the second light emitting stack30on the X and Y axes is considered, the second light emitting stack30has the symmetrical structure. Accordingly, light emitted from the second light emitting stack30may also exhibit a generally symmetrical light emitting pattern in the X-axis direction and the Y direction.

Further, the third light emitting stack40has a shape including regions indicated by reference numerals25p,31,35p, and45p, that is, a rectangular or square shape, and thus, it has the symmetrical structure with respect to the X and Y axes. (For example, seeFIG. 9A). Accordingly, light emitted from the third light emitting stack40may exhibit a generally symmetric light emitting pattern.

FIG. 16Bis a schematic plan view illustrating a shape of the unit pixel according to another exemplary embodiment.

Referring toFIG. 16B, the first light emitting stack20may have a symmetrical structure with respect to an X-axis dividing an upper part from a lower part in plan view. In addition, the first light emitting stack20may have a symmetrical structure with respect to a Y axis dividing a left part from a right part in plan view. Accordingly, light emitted from the first light emitting stack20may exhibit a symmetrical emission pattern in the X-axis direction, and may also exhibit a symmetrical emission pattern in the Y-axis direction. In the illustrated exemplary embodiment, the first light emitting stack20has a regular hexagonal shape. However, the shape of the first light emitting stack20is not limited to the regular hexagon, and the first light emitting stack20may have any hexagonal shape that is symmetrical left and right and up and down.

Meanwhile, the second light emitting stack30has a shape substantially similar to that of the first light emitting stack20, but includes additional regions for electrical connection. For example, it may have protrusions in regions near ends of the lead lines for reference numerals25pand31. Accordingly, the second light emitting stack30may have a symmetrical structure with respect to the X-axis, but may have an asymmetrical structure with respect to the Y-axis. However, the additional region of the second light emitting stack30is out of the X and Y axes. Accordingly, when only the second light emitting stack30on the X and Y axes is considered, the second light emitting stack30has the symmetrical structure. Accordingly, light emitted from the second light emitting stack30may also exhibit a generally symmetrical light emitting pattern in the X-axis direction and the Y direction.

Further, the third light emitting stack40has a shape including regions indicated by reference numerals25p,31,35p, and45p, that is, a rectangular or square shape, and thus, it has a symmetrical structure with respect to the X and Y axes. Accordingly, light emitted from the third light emitting stack40may exhibit a generally symmetric light emitting pattern.

FIG. 16Cis a schematic plan view illustrating a shape of the unit pixel according to another exemplary embodiment.

Referring toFIG. 16C, the first light emitting stack20may have a symmetrical structure with respect to an X-axis dividing an upper part from a lower part in plan view. In addition, the first light emitting stack20may have a symmetrical structure with respect to a Y axis dividing a left part from a right part in plan view. Accordingly, light emitted from the first light emitting stack20may exhibit a symmetrical emission pattern in the X-axis direction, and may also exhibit a symmetrical emission pattern in the Y-axis direction. In the illustrated exemplary embodiment, the first light emitting stack20has a rhombus shape. In the illustrated exemplary embodiment, a length of the X-axis direction and a length of the Y-axis direction of the first light emitting stack20may be identical, without being limited thereto.

Meanwhile, the second light emitting stack30has a shape substantially similar to that of the first light emitting stack20, but includes additional regions for electrical connection. For example, it may have protrusions in regions near ends of the lead lines of reference numerals25pand31. Accordingly, the second light emitting stack30may have a symmetrical structure with respect to the X-axis, but may have an asymmetrical structure with respect to the Y-axis. However, the additional region of the second light emitting stack30is out of the X and Y axes. Accordingly, when only the second light emitting stack30on the X and Y axes is considered, the second light emitting stack30has the symmetrical structure. Accordingly, light emitted from the second light emitting stack30may also exhibit a generally symmetrical light emitting pattern in the X-axis direction and the Y direction.

Further, the third light emitting stack40has a shape including regions indicated by reference numerals25p,31,35p, and45p, that is, a rectangular or square shape, and thus, has a symmetrical structure with respect to the X and Y axes. Accordingly, light emitted from the third light emitting stack40may exhibit a generally symmetric light emitting pattern.

FIG. 17is a schematic plan view showing a conventional unit pixel200having light emitting devices R, G, and B arranged.FIGS. 18A and 18Bare graphs illustrating light emission patterns in X and Y directions of the conventional unit pixel, andFIGS. 19A and 19Bare graphs illustrating light emission patterns in X and Y directions of the unit pixel according to an exemplary embodiment, respectively.

Referring toFIG. 17, the conventional unit pixel200includes the light emitting devices R, G, and B arranged on a same plane. The light emitting devices may emit red light, green light, and blue light, respectively. As illustrated, a red light emitting device R and a blue light emitting device B are disposed on both sides in the Y-axis direction with a green light emitting device G therebetween at the center.

Referring toFIGS. 18A and 18B, the unit pixel200exhibits a generally symmetrical emission pattern in the X-axis direction, but exhibits a relatively asymmetrical emission pattern in the Y-axis direction. In particular, a symmetry of red light and blue light emitted from the red light emitting device R and the blue light emitting device B is less favorable than that of green light emitting device G disposed at the center.

Referring toFIGS. 19A and 19B, the unit pixel100according to an exemplary embodiment exhibits symmetrical emission patterns in the X-axis direction and the Y-axis direction for all of red light, blue light, and green light.