DISPLAY PANEL, MANUFACTURING METHOD THEREOF, AND SPLICING DISPLAY DEVICE

The present application provides a display panel, a manufacturing method thereof, and a splicing display device. The display panel includes: a substrate; a driving circuit layer, and the driving circuit layer includes a plurality of thin film transistors; light-emitting units; and a plurality of scanning lines and a plurality of data lines disposed on a side of the substrate away from the driving circuit layer. The display panel comprises a plurality of display areas, and each of the display areas is provided with one of the light-emitting units and one of the thin film transistors electrically connected to the one of the light-emitting units, one of the scanning lines, and one of the data lines, respectively.

BACKGROUND OF INVENTION

Field of Invention

The present application relates to a field of display technology, and specifically to a display panel, a manufacturing method thereof, and a splicing display device.

Description of Prior Art

A submillimeter light-emitting diode (mini-LED) and a micron light-emitting diode (micro-LED) are collectively referred to as M-LEDs. M-LED display technology has entered a stage of accelerated development in recent years. Compared with an organic light-emitting diode (OLED) screen, an M-LED display shows better performance in cost, contrast, high brightness, and thin and lightweight shape. In the M-LED display technology, subject to a size limitation of a transfer equipment in a rear section, types of current M-LED transfer substrates are all small- and medium-sized, so in order to realize its large-sized commercial display applications, it is necessary to correspondingly develop seamless splicing technology.

However, current M-LED splicing methods are mainly realized by a method of side printed lines or side physical vapor deposition (PVD) film-formation, which is difficult to manufacture and has high cost. In addition, since the side printed lines and the side PVD film-formation both form line structures on sides, it is difficult to achieve seamless splicing, and the line structures of the sides are easily scratched due to mutual extrusion during a splicing process, resulting in a decline in yield.

SUMMARY OF INVENTION

The present application provides a display panel, a manufacturing method thereof, and a splicing display device, which can effectively solve problems that an existing M-LED splicing display is difficult to achieve a seamless splicing and a splicing yield is low.

In order to achieve above purposes, the display panel, the manufacturing method thereof, and the splicing display device of the present application adopt following technical schemes.

On one hand, the present application provides a display panel, wherein the display panel includes:a substrate;a driving circuit layer disposed on a side of the substrate, and the driving circuit layer includes a plurality of thin film transistors;a plurality of light-emitting units disposed on a side of the driving circuit layer away from the substrate; anda plurality of scanning lines and a plurality of data lines disposed on a side of the substrate away from the driving circuit layer;wherein the display panel includes a plurality of display areas arranged in an array, and each of the display areas is correspondingly provided with one of the light-emitting units and one of the thin film transistors electrically connected to the one of the light-emitting units, one of the scanning lines, and one of the data lines, respectively.

Alternatively, the display panel further includes gap areas defined among the plurality of display areas, wherein the display panel further includes a buffer layer disposed between the substrate and the driving circuit layer, and the buffer layer is defined with grooves in the gap areas.

Alternatively, the display panel further includes an encapsulation layer disposed on a side of the light-emitting units away from the driving circuit layer, the encapsulation layer includes an encapsulation cover plate, and a hardness of the encapsulation cover plate is greater than a hardness of the substrate.

Alternatively, a surface roughness of the side of the substrate away from the driving circuit layer is greater than a surface roughness of a side of the substrate facing the driving circuit layer; wherein the display panel further includes a planarization layer, the planarization layer is disposed on a surface of the side of the substrate away from the driving circuit layer, and the data lines and the scanning lines are all located on a side of the planarization layer away from the substrate.

Alternatively, the display panel further includes a plurality of vias penetrating the substrate and the planarization layer, and the data lines and the scanning lines are electrically connected to the thin film transistors through the vias, respectively; wherein an opening area of each of the vias gradually increases in a direction of the substrate away from the driving circuit layer.

Alternatively, the display panel further includes a first metal layer disposed on the side of the planarization layer away from the substrate, an interlayer insulating layer disposed on a side of the first metal layer away from the planarization layer, and a second metal layer disposed on a side of the interlayer insulating layer away from the first metal layer, wherein the first metal layer includes the scanning lines, and the second metal layer includes the data lines.

On another hand, the present application further provides a manufacturing method of a display panel, the manufacturing method of the display panel includes:providing a bearing plate, and forming a substrate on a side of the bearing plate;forming a driving circuit layer on a side of the substrate away from the bearing plate;forming a plurality of light-emitting units on a side of the driving circuit layer away from the substrate;forming an encapsulation layer on sides of the driving circuit layer and the light-emitting units away from the substrate, so as to form a display substrate on the bearing plate;peeling the display substrate from the bearing plate; andforming a plurality of data lines and a plurality of scanning lines on a side of the substrate away from the driving circuit layer, so as to form the display panel;wherein the display panel includes a plurality of display areas arranged in an array, and each of the display areas is correspondingly provided with one of the light-emitting units and a thin film transistor electrically connected to the one of the light-emitting units, one of the scanning lines, and one of the data lines, respectively.

Alternatively, after forming the substrate on the side of the bearing plate, the manufacturing method further includes a following step:forming a buffer layer including grooves on the side of the substrate away from the bearing plate;wherein the display panel further includes gap areas defined among the plurality of display areas, the buffer layer is disposed between the substrate and the driving circuit layer, and the grooves are located in the gap areas.

Alternatively, after peeling the display substrate from the bearing plate, the manufacturing method further includes following steps:forming a planarization layer on a surface of the substrate away from the driving circuit layer, and forming a plurality of vias penetrating the planarization layer and the substrate.

On another hand, the present application further provides a splicing display device, the splicing display device includes a shell and a plurality of display panels described in any one of the above embodiments; wherein the shell defines a holding space, the plurality of display panels are arranged in the holding space in an array, and two adjacent ones of the display panels are in contact with each other.

The present application provides the display panel, the manufacturing method thereof, and the display device. In the present application, the display panel is divided into the plurality of display areas in a unit of the one of the light-emitting units, and each of the display areas is correspondingly provided with one of the light-emitting units and one of the thin film transistors electrically connected to the one of the light-emitting units, one of the scanning lines, and one of the data lines, respectively. By transferring the scanning lines used for transmitting scanning signals and the data lines used for transmitting data signals to the thin film transistors in the display areas from an original driving circuit layer to the side of the substrate away from the driving circuit layer, the present application can avoid problems of a large frame width, an easy scratching of line structures, and a low yield of the display panel caused by a formation of the line structures on a side of the display panel.

DETAILED DESCRIPTION OF EMBODIMENTS

Technical solutions in embodiments of the present application will be described clearly and completely below in combination with drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative work fall within a protection scope of the present application. In addition, it should be understood that specific embodiments described herein are only for a purpose of explaining and interpreting the present application and are not intended to limit the present application. In the present application, in an absence of a contrary explanation, location words used, such as “up” and “down”, usually refer to the up and down under an actual use or a working state of devices, specifically drawing directions in the attached drawings; and words “inside” and “outside” are for outline of the devices.

A following disclosure provides many different embodiments or examples for implementing different structures of the present application. In order to simplify the disclosure of the present application, components and settings of specific examples are described below. Of course, they are merely examples and are not intended to limit the present application. In addition, the present application may repeat reference numerals and/or reference letters in different examples for a purpose of simplification and clarity, and does not in itself indicate relationships between the various embodiments and/or settings discussed. In addition, the present application provides examples of various specific processes and materials, but those skilled in the art may be aware of the present application of other processes and/or uses of other materials. The following is a detailed description. It should be noted that an order of description of the following embodiments is not a limitation of a preferred order of the embodiments.

Inventors of the present application have found that current M-LED splicing methods are mainly realized by a method of side printed lines or side physical vapor deposition (PVD) film-formation, which is difficult to manufacture and has high cost. In addition, since the side printed lines and the side PVD film-formation both form line structures on sides, these cause a frame of a display panel to be wide, and it is difficult to achieve seamless splicing. In addition, line structures of the sides are easily scratched due to mutual extrusion during a splicing process, resulting in a decline in yield.

A display panel, a manufacturing method thereof, and a splicing display device provided by the present application aim to solve the above technical problems of the prior art.

Technical solutions of the present application and how the technical solutions of the present application solve the above technical problems will be described in detail with specific embodiments.

FIG.1is a schematic planar diagram of a display panel provided by an embodiment of the present application;FIG.2is a schematic cross-sectional diagram of the display panel in one display area provided by the embodiment of the present application. Referring toFIG.1andFIG.2, the embodiment of the present application provides the display panel, and the display panel includes: a substrate10; a driving circuit layer30disposed on a side of the substrate10, and the driving circuit layer30includes a plurality of thin film transistors31; a plurality of light-emitting units50disposed on a side of the driving circuit layer30away from the substrate10; a plurality of scanning lines81and a plurality of data lines111disposed on a side of the substrate10away from the driving circuit layer30. Wherein the display panel includes a plurality of display areas P arranged in an array, and each of the display areas P is correspondingly provided with one of the light-emitting units50and one of the thin film transistors31, one of the thin film transistors31is electrically connected to a corresponding one of the light-emitting units50, a corresponding one of the scanning lines111, and a corresponding one of the data lines81, respectively.

In the present application, the display panel is divided into the plurality of display areas P in a unit of a light-emitting unit50, and each of the display areas P is provided with a thin film transistor31electrically connected to the light-emitting unit a data line111, and a scanning line81, respectively. By transferring the scanning line81used for transmitting a scanning signal and the data line111used for transmitting a data signal to the thin film transistor31in the display areas P from an original driving circuit layer30to the side of the substrate10away from the driving circuit layer30, the present application can avoid problems of a large frame width, easily scratched line structures, and a low yield of the display panel caused by a formation of the line structures on a side of the display panel.

In some embodiments of the present application, the display panel is an M-LED display panel; and the substrate10is made of a flexible material, such as polyimide.

In some embodiments of the present application, the driving circuit layer includes the plurality of thin film transistors31, the thin film transistors31are at least one type of amorphous silicon thin film transistors, low-temperature polycrystalline silicon thin film transistors, and metal oxide thin film transistors. The thin film transistor31includes a gate electrode314, a source electrode312, a drain electrode313, and an active layer311including a channel The source electrode312, the drain electrode313, and the active layer311are disposed on a same layer, the gate electrode314is located above the channel, and a gate insulating layer32is located between the active layer311and the gate electrode314. Furthermore, the driving circuit layer30includes a source-drain electrode and the active layer311disposed on a same layer, and the gate insulating layer32, a gate electrode layer, a protective layer33, and a binding electrode layer sequentially disposed on the active layer311in a stack. Wherein the source-drain electrode includes the source electrode312and the drain electrode313, and the source-drain electrode can be formed by conducting the active layer311; the gate electrode layer includes the gate electrode314and a transfer line315, and the scanning line81is electrically connected to the gate electrode314through the transfer line315. The binding electrode layer includes a first binding electrode34and a second binding electrode35.

In some embodiments of the present application, the light-emitting unit50is a mini-LED chip or a micro-LED chip, and includes a first electrode51and a second electrode52, wherein the first electrode51is one of a positive electrode and a negative electrode, and the second electrode52is another one of the positive electrode and the negative electrode. The first electrode51is electrically connected to the first binding electrode34through a solder40, and the second electrode52is electrically connected to the second binding electrode35through the solder40.

FIG.3is a schematic diagram of a position distribution of the thin film transistors located on a buffer layer in the plurality of display areas provided by the embodiment of the present application. As shown inFIG.1toFIG.3, in some embodiments of the present application, the display panel comprises the plurality of display areas P arranged in the array, and the display areas P correspond to pixel areas of the display panel one-to-one, for instance, that is, only one light-emitting unit50is disposed in each of the display areas P. Furthermore, at least one thin film transistor31is disposed in each of the display areas P, wherein the gate electrode314, the source electrode312, and the drain electrode313of the thin film transistor31are electrically connected to one of the scanning lines81, one of the data lines111, and the first electrode51of one of the light-emitting units50, respectively. Wherein the gate electrode314, the source electrode312, and the drain electrode313of the thin film transistor31are electrically connected to the scanning line81, the data line111, and the first electrode51of the light-emitting unit50through a method of a via connection, respectively. Meanwhile since the substrate10is made of the flexible material, difficulty of opening vias in the substrate10can be reduced, thereby facilitating an electrical connection between the gate electrode314and the source electrode312of the thin-film transistor31with the scanning line81and the data line111, respectively.

In some embodiments of the present application, the display panel further includes gap areas G defined among the plurality of display areas P, wherein the display panel further includes the buffer layer20disposed between the substrate10and the driving circuit layer30, and the buffer layer20is defined with grooves21in the gap areas G among the display areas P. In the display panel provided by the present application, since the substrate10is made of the flexible material, the substrate10will be placed on a hard bearing plate in a production process, so as to facilitate a subsequent formation of the driving circuit layer30on a side of the substrate10away from the bearing plate and a binding of the light-emitting units50. However, since the scanning lines81and the data lines111further need to be formed on the side of the substrate10away from the driving circuit layer30, therefore, the production process of the display panel further includes a process of separating the substrate10from the bearing plate, wherein stress generated in a separation process will adversely affect the driving circuit layer30and the light-emitting units50. However, the present application can effectively release the stress generated during the separation process of the substrate10and the bearing plate by defining the grooves21in the buffer layer20corresponding to the gap areas G among the display areas P, so as to avoid quality problems generated by the stress affecting the thin film transistors31and the light-emitting units50in the display areas P. Furthermore, a depth of each of the grooves21ranges from 3000 Å to 6000 Å; each of the grooves21includes two side walls disposed opposite to each other, and a spacing between the two side walls ranges from 10 μm to 20 μm.

In some embodiments of the present application, any two adjacent ones of the display areas P (including two horizontal adjacent ones, two vertical adjacent ones, and two diagonal adjacent ones) form a display area group, and each of the gap areas G in the display area group is defined with one of the grooves21, so that an area of the grooves21in the gap areas G can be maximized to better release the stress generated during the separation process of the substrate10from the bearing plate. However, the present application does not limit a specific position of the grooves21in the buffer layer20. In other embodiments of the present application, the grooves21may be disposed only in the gap area G in a part of the display area groups.

In some embodiments of the present application, the display panel further includes an encapsulation layer60disposed on a side of the light-emitting units50away from the driving circuit layer30, the encapsulation layer60includes an encapsulation cover plate, the encapsulation cover plate is located at an outermost side of the encapsulation layer60, and a hardness of the encapsulation cover plate is greater than a hardness of the substrate10. Specifically, the encapsulation cover plate is a glass cover plate, and a hardness of the glass cover plate is greater than the hardness of the substrate10. In the production process, when the data lines111and the scanning lines81are formed on the side of the substrate10away from the driving circuit layer30, the substrate10needs to be inverted, since the hardness of the encapsulation layer60is greater than the hardness of the substrate10, therefore, the encapsulation layer60can provide good support and facilitate a film-forming operation after an inversion step.

In some embodiments of the present application, a surface roughness of the side of the substrate10away from the driving circuit layer30is greater than a surface roughness of the side of the substrate10facing the driving circuit layer30. Wherein the display panel further includes a planarization layer70, the planarization layer70is disposed on a surface of the side of the substrate10away from the driving circuit layer and the data lines111and the scanning lines81are all located on a side of the planarization layer70away from the substrate10. As mentioned above, the production process of the display panel includes the process of separating the substrate10from the bearing plate, such as a laser lift-off process, however, the laser lift-off process will increase the surface roughness of the side of the substrate10away from the driving circuit layer30. Therefore, in the present application, the planarization layer70is disposed on the surface of the side of the substrate10away from the driving circuit layer30, thereby creating a planarization condition for a subsequent arrangement of the data lines111and the scanning lines81, which is conducive to improving film-forming quality of the side of the substrate10away from the driving circuit layer30. Furthermore, a thickness of the planarization layer70ranges from 1 μm to 3 μm.

In some embodiments of the present application, the display panel further includes a plurality of vias penetrating the substrate10and the planarization layer70, the data lines111and the scanning lines81are electrically connected to the thin film transistors31through the vias, respectively. Wherein an opening area of each of the vias gradually increases in a direction of the substrate10away from the driving circuit layer30. Specifically, as mentioned above, the substrate10needs to be inverted before forming the planarization layer70, accordingly, film-forming directions and shapes of the vias formed by etching will also change accordingly. Therefore, in the direction of the substrate10away from the driving circuit layer30, the opening area of each of the vias penetrating the substrate10and the planarization layer70gradually increases. Wherein each of the vias penetrating the substrate10and the planarization layer70includes a first via01and a second via02, the data line111is electrically connected to the source electrode312of the thin film transistor31through the first via01, and the scanning line81is electrically connected to the gate electrode314of the thin film transistor31through the second via02and the transfer line315. Furthermore, diameters of the first via01and the second via02range from 6 μm to 10 μm, and a process of the etching is dry etching.

In some embodiments of the present application, the display panel further includes a VDD wiring and a VSS wiring112, the VDD wiring and the VSS wiring112are further disposed on the side of the substrate10away from the driving circuit layer30, each of the vias penetrating the substrate10and the planarization layer70further includes a third via03, and the VSS wiring112is electrically connected to the second electrode52of the light-emitting unit50through the third via03.

In some embodiments of the present application, the display panel further includes a via located in the driving circuit layer30, such as a fourth via04. The first electrode51of the light-emitting unit50is electrically connected to the drain electrode313of the thin film transistor31through the first binding electrode34and the fourth via04. An opening area of the fourth via04gradually decreases in the direction of the substrate10away from the driving circuit layer30.

In some embodiments of the present application, the scanning lines81and the data lines111are respectively located in different film layers. Specifically, the display panel further includes a first metal layer80, an interlayer insulating layer90, and a second metal layer110located on the side of the planarization layer70away from the substrate10. One of the scanning lines81and the data lines111is formed by patterning the first metal layer80, and another of the scanning lines81and the data lines111is formed by patterning the second metal layer110. Furthermore, the display panel includes the first metal layer80disposed on the side of the planarization layer70away from the substrate10, the interlayer insulating layer90disposed on a side of the first metal layer80away from the planarization layer70, and the second metal layer110disposed on a side of the interlayer insulating layer90away from the first metal layer80, wherein the first metal layer80includes the scanning lines81, and the second metal layer110includes the data lines111. By disposing the scanning lines81and the data lines111in different layers, transmission of different signals in different metal layers can be realized and difficulty of a routing design can be reduced.

On another hand, the present application further provides a manufacturing method of the display panel.FIG.4is a schematic flow diagram of the manufacturing method of the display panel provided by an embodiment of the present application. Referring toFIG.1toFIG.4, the manufacturing method of the display panel includes following steps:S01: providing a bearing plate, and forming a substrate10on a side of the bearing plate;S02: forming a driving circuit layer30on a side of the substrate10away from the bearing plate;S03: forming a plurality of light-emitting units50on a side of the driving circuit layer30away from the substrate10;S04: forming an encapsulation layer60on sides of the driving circuit layer30and the light-emitting units50away from the substrate10, so as to form a display substrate on the bearing plate;S05: peeling the display substrate from the bearing plate; andS06: forming a plurality of data lines111and a plurality of scanning lines81on a side of the substrate10away from the driving circuit layer30, so as to form the display panel;

Wherein the display panel includes the plurality of display areas P arranged in an array, and each of the display areas P is correspondingly provided with one of the light-emitting units50and one of the thin film transistors31electrically connected to the one of the light-emitting units50, one of the scanning lines111, and one of the data lines81, respectively.

FIG.5is a schematic cross-sectional diagram of forming the substrate and the buffer layer on a side of the bearing plate provided by the embodiment of the present application. Referring toFIG.3andFIG.5, in some embodiments of the present application, the step S01includes: a step S01-1: providing the bearing plate100and forming the substrate10on the bearing plate100; and a step S01-2: forming the buffer layer20including the grooves21on the side of the substrate10away from the bearing plate100. Wherein the display panel further includes the gap areas G defined among the plurality of display areas P, the buffer layer20is disposed between the substrate10and the driving circuit layer30, and the grooves21are located in the gap areas G.

FIG.6is a schematic cross-sectional diagram of forming the driving circuit layer on the side of the substrate away from the bearing plate provided by the embodiment of the present application. Referring toFIG.6, in some embodiments of the present application, the step S02includes: preparing and forming the driving circuit layer30on the substrate10. Wherein the driving circuit layer30includes the plurality of thin film transistors31, each of the thin film transistors31includes the active layer311, the source electrode312, the drain electrode313, and the gate electrode314, the driving circuit layer30further includes a plurality of first binding electrodes34and a plurality of second binding electrodes35, and the first binding electrode34is electrically connected to the drain electrode313of the thin film transistor31through the fourth via04formed in the driving circuit layer30.

FIG.7is a schematic cross-sectional diagram of forming the light-emitting units on the side of the driving circuit layer away from the substrate provided by the embodiment of the present application. Referring toFIG.7, in some embodiments of the present application, the step S03includes: transferring the plurality of light-emitting units50arranged in an array on a substrate to be transferred to the driving circuit layer binding and electrically connecting the first electrode51of the light-emitting unit with the first binding electrode34through the solder40, and binding and electrically connecting the second electrode52of the light-emitting unit50with the second binding electrode35through the solder40.

FIG.8is a schematic cross-sectional diagram of forming the encapsulation layer on the sides of the driving circuit layer and the light-emitting units away from the substrate provided by the embodiment of the present application. Referring toFIG.8, in some embodiments of the present application, the step S04includes: forming the encapsulation layer60on the driving circuit layer30and the light-emitting unit50, so as to form the display substrate on the bearing plate100. Wherein the encapsulation layer60includes the encapsulation cover plate.

FIG.9is a schematic cross-sectional diagram of forming the planarization layer on the surface of the substrate away from the driving circuit layer provided by the embodiment of the present application. Referring toFIG.9, in some embodiments of the present application, the step S05includes: a step S05-1: peeling the display substrate from the bearing plate100by a method of laser lift-off. Due to strong laser energy, a plurality of uneven microstructures are formed on the surface of the side of the substrate10away from the driving circuit layer30, so that the surface roughness of the substrate10away from the driving circuit layer30is greater than the surface roughness of the substrate10facing the driving circuit layer30. Therefore, the step S05further includes a step S05-02: turning the display substrate upside down, forming the planarization layer70on the surface of the side of the substrate10away from the driving circuit layer30, and forming the plurality of vias penetrating the planarization layer70and the substrate10. Wherein, the data lines111and the scanning lines81are electrically connected to the thin film transistors31through the vias penetrating the planarization layer70and the substrate10, and the opening area of each of the vias gradually increases in the direction of the substrate10away from the driving circuit layer30. Furthermore, after the display substrate is turned upside down, organic photoresist is coated on the surface of the side of the substrate10away from the driving circuit layer30and thermally cured to form the planarization layer70.

FIG.10is a schematic cross-sectional diagram of forming the data lines and the scanning lines on the side of the planarization layer away from the substrate provided by the embodiment of the present application. Referring toFIG.10, in some embodiments of the present application, the step S06includes: a step S06-1: forming the first metal layer80on the side of the planarization layer70away from the substrate10, and patterning the first metal layer80to form the scanning lines81. Wherein the scanning line81is electrically connected to the transfer line315through the second via02penetrating the planarization layer70and the substrate10, and then electrically connected to the gate electrode314of the thin film transistor31through the transfer line315; a step S06-2: forming the interlayer insulating layer90on the side of the first metal layer80away from the planarization layer70, and etching and perforating the interlayer insulating layer90; and step S06-3: forming the second metal layer110on the side of the interlayer insulating layer90away from the first metal layer80, and patterning the second metal layer110to form the data lines111, the VDD line, and the VSS line112. Wherein the data line111is electrically connected to the source electrode312of the thin film transistor31through the first via01penetrating the planarization layer70and the substrate10; the VSS line112is electrically connected to the second binding electrode35through the third via03penetrating the planarization layer70and the substrate10, and then is electrically connected to the second electrode52of the light-emitting unit50through the second binding electrode35.

On another hand, the present application further provides a splicing display device. The splicing display device includes a shell and the plurality of display panels described in any one of the above embodiments, wherein the shell defines a holding space, the plurality of display panels are arranged in the holding space in an array, and two adjacent ones of the display panels are in contact with each other.

To sum up, the present application provides the display panel, the manufacturing method thereof, and the splicing display device. The display panel includes: the substrate; the driving circuit layer disposed on the side of the substrate, and the driving circuit layer includes the plurality of thin film transistors; the plurality of light-emitting units disposed on the side of the driving circuit layer away from the substrate; the plurality of scanning lines and the plurality of data lines disposed on the side of the substrate away from the driving circuit layer; wherein the display panel includes the plurality of display areas arranged in an array, and each of the display areas is correspondingly provided with one of the light-emitting units and one of the thin film transistors electrically connected to the one of the light-emitting units, one of the scanning lines, and one of the data lines, respectively. In the present application, by disposing the scanning lines for transmitting the scanning signals and the data lines for transmitting the data signals to the thin film transistors on the side of the substrate away from the driving circuit layer, problems of a large splicing seam and a low production yield caused by disposing the line structures on the side of the display panel are avoided, thereby greatly improving a display effect of the splicing display device.

The above describes the display panel, the manufacturing method thereof, and the splicing display device provided by the embodiments of the present application in detail. In this paper, specific examples are used to explain a principle and an implementation mode of the present application. The description of the above embodiments is only used to help understand a method and a core idea of the present application. At a same time, for those skilled in the art, according to the idea of the present application, there will be changes in a specific implementation mode and a scope of application. In conclusion, contents of the specification should not be understood as restrictions on the present application.