Stacked electronic device and method for fabricating the same

A method for fabricating a stacked electronic device is provided. A first three-dimensional (3D) printing is performed to form a first insulating layer and a plurality of first redistribution layers (RDLs) on a first substrate. A second 3D printing is performed to form a second substrate and a plurality of through-substrate vias (TSVs) on the first insulating layer, in which the plurality of TSVs is electrically connected to the plurality of first RDLs. A third 3D printing is performed to form a second insulating layer and a plurality of second RDLs on the second substrate, in which the plurality of second RDLs is electrically connected to the plurality of TSVs. A plurality of contacts of a third substrate is bonded to the plurality of second RDLs, so that the substrate is mounted onto the second insulating layer. The disclosure also provides a stacked electronic device formed by such a method.

CROSS REFERENCE TO RELATED APPLICATIONS

This application claims the benefit of China Patent Application No. 201510230562.X filed on May 8, 2015, entitled “STACKED ELECTRONIC DEVICE AND METHOD FOR FABRICATING THE SAME” which is hereby incorporated herein by reference.

BACKGROUND

Field of the Disclosure

The present disclosure relates to a semiconductor technology, and in particular, it relates to a stacked electronic device fabricated by using a three-dimensional (3D) printing technology.

Description of the Related Art

Developments have driven the semiconductor industry to increase the integration or density of electronic devices such as transistors, diodes, resistors, and capacitors. In an attempt to further increase integrated circuit (IC) density, three-dimensional ICs (3DICs) have been investigated. Typically, 3DICs use through-substrate vias (TSVs) as electrical connection paths to accomplish a stack structure of wafers or chips, thereby increasing the electronic device integration or density.

In the fabrication of the 3DIC, chips or wafers are bonded together with a substrate (e.g., a chip, wafer or printed circuit board (PCB)), and electrical connections are formed between each chip/wafer and the contacts of the substrate. Moreover, TSVs are typically fabricated by forming via holes in the substrate (e.g., a chip or wafer) using a dry etching or laser drilling process, and then filling the via holes with conductive materials. Thereafter, the substrate, another wafer/chip and a carrier substrate are arranged in a stack, and then a substrate thinning process is performed by a chemical mechanical polishing (CMP) process, so that the via holes become through holes with exposed conductive materials, so as to form TSVs. Finally, the carrier substrate is removed to form a stacked electronic device. Compared to the traditional electronic device with bonding wires, the 3D stacked electronic device with TSVs may reduce the internal electrical connection paths, thereby increasing the transmission speed of the device, reducing the noise, and enhancing the device performance.

However, as mentioned above, since the fabrication of TSV includes the steps of forming via holes, filling the via holes with conductive materials, thinning the substrate, and removing the carrier substrate, it cannot effectively reduce the fabrication time, simplify the process, or reduce the manufacturing cost. Therefore, there is a need to develop a method for fabricating a stacked electronic device capable of addressing the above problems.

SUMMARY

In some embodiments of the disclosure, a method for fabricating a stacked electronic device is provided. The method includes providing a first substrate. A first three-dimensional (3D) printing is performed to form a first insulating layer and a plurality of first redistribution layers (RDLs) on the first substrate. The plurality of first RDLs is embedded in the first insulating layer. A second 3D printing is performed to form a second substrate and a plurality of through-substrate vias (TSVs) on the first insulating layer. The plurality of TSVs passes through second substrate and is electrically connected to the plurality of first RDLs. A third 3D printing is performed to form a second insulating layer and a plurality of second RDLs on the second substrate. The plurality of second RDLs is embedded in the second insulating layer and electrically connected to the plurality of TSVs. A plurality of contacts of a third substrate is bonded to the plurality of second RDLs, so that the third substrate is mounted onto the second insulating layer.

In some embodiments of the disclosure, a stacked electronic device is provided. The stacked electronic device includes a first substrate. A first insulating layer and a plurality of first RDLs are disposed on the first substrate. The plurality of first RDLs is embedded in the first insulating layer. A second substrate and a plurality of TSVs are disposed on the first insulating layer. The plurality of TSVs passes through second substrate and is electrically connected to the plurality of first RDLs. A second insulating layer and a plurality of second RDLs are disposed on the second substrate. The plurality of second RDLs is embedded in the second insulating layer and electrically connected to the plurality of TSVs. A third substrate is mounted onto the second insulating layer. The third substrate has a plurality of contacts bonded to the plurality of second RDLs. The first insulating layer, the plurality of first RDLs, the second substrate, the plurality of TSVs, the second insulating layer, and the plurality of RDLs are formed of materials used in 3D printing.

DETAILED DESCRIPTION

The following description is of the best-contemplated mode of carrying out the disclosure. This description is made for the purpose of illustrating the general principles of the disclosure and should not be taken in a limiting sense. These are, of course, merely examples and are not intended to be limited. In addition, the disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.

Referring toFIG. 1D, which illustrates a cross section of an exemplary embodiment of a stacked electronic device according to the present disclosure. The stacked electronic device200includes a first substrate100, a first insulating layer102, a plurality of RDLs104, a second substrate106, a plurality of TSVs108, a second insulating layer110, a plurality of second RDLs112, and a third substrate130. In one embodiment, the first substrate100may include a PCB, a wafer, a chip, or a combination thereof.

The first insulating layer102and the plurality of first RDLs104are disposed on the first substrate100, in which the plurality of first RDLs104is embedded into the first insulating layer102and is electrically connected to contacts (not shown) of the first substrate100. The contacts of the first substrate100may include pads, solder bumps, conductive posts, or a combination thereof. Here, in order to simplify the diagram, only two single conductive layers are depicted to represent the plurality of first RDLs104. However, note that each of the plurality of first RDLs104may include a single conductive layer or a multi-layer conductive structure, and the number of first RDLs104is based on the demands of the design and is not limited to that shown inFIG. 1D.

In the embodiment, the first insulating layer102and the plurality of first RDLs104are formed of materials that are used in a 3D printing. For example, the first insulating layer102may include a ceramic material, a polymer material, a resin material, or a dielectric material used for a 3D printing technology. Moreover, the plurality of first RDLs104may include a conductive metal used for a 3D printing technology, such as aluminum, copper, gold, lead-free solder, their alloys, or other metal alloys.

The second substrate106and the plurality of TSVs108are disposed on the first insulating layer104. The plurality of TSVs108passes through the second substrate106and is electrically connected to the plurality of first RDLs104. Here, in order to simplify the diagram, only two TSVs are depicted. However, note that the number of TSVs108is based on the demands of the design and is not limited to that shown inFIG. 1D.

In the embodiment, the second substrate106is free from any active or passive device therein. Moreover, the second substrate106and the plurality of TSVs108are formed of materials that are used in a 3D printing. For example, the second substrate106may include a molding compound material, a ceramic material, a polymer material, a resin material, or a dielectric material used for a 3D printing technology. Moreover, the plurality of TSVs108may include a conductive metal used for a 3D printing technology, such as tungsten, aluminum, copper, gold, lead-free solder, their alloys, or other metal alloys. In another embodiment, the second substrate106may include a semiconductor material, such as silicon or germanium. In this case, the stacked electronic device200may further include insulating spacers to electrically isolate the second substrate106from the plurality of TSVs108. The insulating spacer may include a ceramic material, a polymer material, a resin material, or a dielectric material used for a 3D printing technology.

The second insulating layer110and the plurality of second RDLs112are disposed on the second substrate106, in which the plurality of second RDLs112is embedded into the second insulating layer110and is electrically connected to the plurality of TSVs108. Here, in order to simplify the diagram, only two single conductive layers are depicted to represent the plurality of second RDLs112. However, note that each of the plurality of second RDLs112may include a single conductive layer or a multi-layer conductive structure, and the number of second RDLs112is based on the demands of the design and is not limited to that shown inFIG. 1D.

In the embodiment, the second insulating layer110and the plurality of second RDLs112are formed of materials that are used in a 3D printing. For example, the second insulating layer110may include a ceramic material, a polymer material, a resin material, or a dielectric material used for a 3D printing technology. Moreover, the plurality of second RDLs112may include a conductive metal used for a 3D printing technology, such as aluminum, copper, gold, lead-free solder, their alloys, or other metal alloys.

The third substrate130is mounted onto the second insulating layer110. In the embodiment, the third substrate130may be a wafer, a chip, or a combination thereof. Moreover, the third substrate130has a plurality of contacts120that is bonded to the plurality of second RDLs112. The plurality of contacts120may include pads, solder bumps, conductive posts, or a combination thereof. Here, exemplary solder bumps are represented for the plurality of contacts120.

Next, referring toFIGS. 1A to 1DandFIG. 2, in whichFIGS. 1A to 1Dillustrate cross sections of a method for fabricating a stacked electronic device according to an embodiment of the present disclosure, andFIG. 2shows a flow chart of a method300for fabricating a stacked electronic device according to an embodiment of the present disclosure. In the embodiment, the method300begins in step301, in which a first substrate100is provided, as shown inFIG. 1A. In one embodiment, the first substrate100may include a PCB, a wafer, a chip, or a combination thereof. The first substrate100may include contacts (not shown), such as pads, solder bumps, conductive posts, or a combination thereof.

Next, still referring toFIGS. 1A and 2, in step303, a first 3D printing20is performed using a 3D printer10, to form a first insulating layer102and a plurality of first RDLs104on the first substrate100. The plurality of first RDLs104is embedded in the first insulating layer102and is electrically connected to the contacts (not shown) of the first substrate100. In the embodiment, the 3D printer10may have multiple print heads so as to simultaneously form the first insulating layer102and the plurality of first RDLs104after performing the first 3D printing20. For example, during the first 3D printing20, the 3D printer10moves back and forth along a direction parallel to the first substrate100, to form the first insulating layer102by using a first print head10aand form the plurality of first RDLs104by using a second print head10b. In the embodiment, the first insulating layer102may include a ceramic material, a polymer material, a resin material, or a dielectric material used for a 3D printing technology. Moreover, the plurality of first RDLs104may include a conductive metal, such as aluminum, copper, gold, lead-free solder, their alloys, or other metal alloys.

Next, referring toFIGS. 1B and 2, in step305, a second 3D printing20′ that is similar to the first 3D printing20is performed using the 3D printer10, to form a second substrate106and a plurality of TSVs108on the first insulating layer102. The plurality of TSVs108passes through the second substrate106and is electrically connected to the plurality of first RDLs104. In the embodiment, the second substrate106and the plurality of TSVs108are simultaneously formed after performing the second 3D printing20′. For example, during the second 3D printing20′, the second substrate106is formed by using the first print head10aand the plurality of TSVs108by using the second print head10b. In the embodiment, the second substrate106may include a molding compound material, a ceramic material, a polymer material, a resin material, or a dielectric material used for a 3D printing technology. Moreover, the plurality of TSVs108may include a conductive metal, such as tungsten, aluminum, copper, gold, lead-free solder, their alloys, or other metal alloys. In the embodiment, the time for performing the second 3D printing20′ may be adjusted, so that the formed second substrate106has a desired thickness. Moreover, the plurality of TSVs108is exposed from the surface of the second substrate106because the plurality of TSVs108passes through the second substrate106. Therefore, there is no need to perform any polishing process (e.g., a CMP process) to adjust the thickness of the second substrate106for formation of the plurality of TSVs108.

In another embodiment, the second substrate106may include a semiconductor material (e.g., silicon or germanium) used for a 3D printing technology. In this case, the 3D printer10may include at least three print heads, and the second 3D printing20′ is performed to further form insulating spacers to electrically isolate the second substrate106from the plurality of TSVs108. The insulating spacer may include a ceramic material, a polymer material, a resin material, or a dielectric material.

Next, referring toFIGS. 1C and 2, in step307, a third 3D printing20″ that is similar to the first 3D printing20is performed using the 3D printer10, to form a second insulating layer110and a plurality of second RDLs112on the second substrate106. The plurality of second RDLs112is embedded in the second insulating layer110and is electrically connected to plurality of TSVs108. In the embodiment, the second insulating layer110and the plurality of second RDLs112are simultaneously formed after performing the third 3D printing20″. For example, during the third 3D printing20″, the second insulating layer110is formed by using the first print head10aof the 3D printer10and the plurality of second RDLs112is formed by using a second print head10bof the 3D printer10. In the embodiment, the second insulating layer110may include a material that is the same as or different from that of the first insulating layer102. Moreover, the plurality of second RDLs112may include a material that is the same as or different from that of the plurality of first RDLs104.

Next, referring toFIGS. 1D and 2, in step309, a plurality of contacts120of a third substrate130is bonded to the plurality of second RDLs112, so that the third substrate130is mounted onto the second insulating layer110. In the embodiment, the third substrate130may be a wafer, a chip, or a combination thereof. Moreover, the plurality of contacts120is bonded to the plurality of second RDLs112. The plurality of contacts120may include pads, solder bumps, conductive posts, or a combination thereof. For example, the third substrate130includes a chip and the plurality of contacts120includes a plurality of solder bumps. Moreover, the plurality of contacts120is bonded to the plurality of second RDLs112by a flip chip technology.

According to the foregoing embodiments, since the first insulating layer102and the plurality of first RDLs104, the second substrate106and the plurality of TSVs108, and the second insulating layer110and the plurality of second RDLs112are successively formed by 3D printing, the manufacturing time for the stacked electronic device can be effectively reduced. Moreover, the TSV is formed by 3D printing can eliminate the gap-filling difficulty caused by high aspect ratio. As a result, TSVs with high reliability can be accomplished. Moreover, compared to the traditional fabrication of TSVs, there is no need to perform the additional processing steps of forming via holes, filling the via holes with conductive materials, thinning the substrate, and removing the carrier substrate by the use of 3D printing for formation of TSVs. As a result, the processes for fabricating the device can be effectively simplified and the manufacturing cost can be reduced while problems caused by the additional processing steps mentioned above can be eliminated.