Phase detectors for detecting a mutual phase difference between two signals

A phase detector for detecting a mutual phase difference between two signals, such as first and second microwave signals, comprises first and second signal paths for being supplied with first and second input signals of the same frequency, respectively, and providing with a predetermined additional mutual phase difference between the first and second input signals at their output ends and a field effect transistor having a pair of input electrodes connected to the output ends of the first and second signal paths, respectively, and an output electrode from which an output signal representing a mutual phase difference which the first and second input signals have originally therebetween is derived. The first and second input signals at the input electrodes of the field effect transistor have the original mutual phase difference which is to be detected and the predetermined additional mutual phase difference added by the first and second signal paths therebetween. The field effect transistor is biased to operate with a gate bias voltage nearly equal to a pinch-off voltage thereof. In order to establish such biasing state without reducing the operational gain of the field effect transistor, a biasing resistance connected to the source of the field effect transistor is selected to be low and a current source is provided for supplying an external biasing current to the biasing resistance, thereby to produce the gate bias voltage required.

BACKGROUND OF THE INVENTION 
This invention relates generally to phase detectors suitable for use for 
detecting a mutual phase difference between two microwave signals, and 
more particularly, to an improved phase detector comprising a field effect 
transistor and being able to detect a mutual phase difference between two 
microwave signals with high sensitivity and superior stability. 
For detecting a mutual phase difference between two microwave signals, 
there has been already proposed a phase detector which is composed of a 
pair of input signal paths, a quarter wavelength hybrid ring which has 
four branch signal paths each selected in length substantially to 
correspond to a quarter of the wavelength of an input signal and 
interconnected to form a rectangular signal path with a pair of input ends 
connected to the input signal paths respectively and a pair of output 
ends, and a pair of diodes connected to the output ends of the quarter 
wavelength hybrid ring, respectively, in the respective directions 
opposite to each other. In such a phase detector, first and second 
microwave signals having a mutual phase difference therebetween are 
supplied to the input ends of the quarter wavelength hybrid ring through 
the input signal paths, respectively, and transmitted to the output ends 
of the quarter wavelength hybrid ring through the rectangular signal path 
therein. The microwave signals appearing at the output ends of the quarter 
wavelength hybrid ring are supplied to the diodes connected thereto in the 
opposite directions, respectively. The diodes detect the supplied 
microwave signals and cooperate with each other to combine their detected 
outputs so as to produce an output signal representing the mutual phase 
difference between the first and second microwave signals supplied to the 
input signal paths. Thus, the mutual phase difference between the first 
and second microwave signals is detected. 
In the previously proposed phase detector as above mentioned, a portion for 
detecting substantially a mutual phase difference between two input 
microwave signals is composed with a pair of diodes as described above. 
Consequently, with the previously proposed phase detector, it is quite 
difficult to increase the sensitivity of the phase detecting operation. 
Further, a reflection characteristic in relation to an input microwave 
signal at each of the diodes and a temperature characteristic in relation 
to the DC detected output and an input microwave signal at each of the 
diodes may vary depending on the power of the input signal. It is also 
very difficult to make such variations in the characteristics identical 
between both of the diodes used in a pair, and therefore the previously 
proposed phase detector tends to be lacking in stability in detecting 
operation. 
OBJECTS AND SUMMARY OF THE INVENTION 
Accordingly, it is an object of the present invention to provide an 
improved phase detector for detecting a mutual phase difference between 
two signals which avoids the above described problems encountered with the 
prior art. 
Another object of the present invention is to provide an improved phase 
detector for detecting a mutual phase difference between two microwave 
signals which performs phase detecting operation with high sensitivity and 
superior stability. 
A further object of the present invention is to provide an improved phase 
detector for detecting a mutual phase difference between two microwave 
signals, wherein a reflection characteristic in relation to input 
microwave signals varies hardly in spite of variations in the power of the 
input microwave signals. 
A still further object of the present invention is to provide an improved 
phase detector for detecting a mutual phase difference between two 
microwave signals which comprises a field effect transistor and is formed 
with simple configuration. 
According to an aspect of the present invention, a phase detector for 
detecting a mutual phase difference between two signals comprises first 
and second input signal paths for being supplied with two input signals, 
respectively, and provides a predetermined additional phase difference 
between these two input signals and a field effect trasistor having two of 
its input electrodes connected to the first and second input signal paths, 
respectively, and an output electrode from which an output signal 
representing the mutual phase difference between the input signals 
supplied to the first and second input signal paths is derived. The 
signals supplied to the field effect transistor have the original mutual 
phase difference which is to be detected and another mutual phase 
difference added by the first and second input signal paths therebetween. 
The field effect transistor is biased to operate with such a gate bias 
voltage as to be nearly equal to its pinch-off voltage. In order to 
establish such biasing condition without reducing the operational gain of 
the field effect transistor, a biasing resistor of a low resistance value 
is connected to the source electrode of the field effect transistor and a 
biasing circuit is connected to this biasing resistor, thereby to supply 
an external biasing current to the biasing resistor to produce the 
required gate bias voltage constantly. 
The above, and other objects, features and advantages of the present 
invention will be apparent in the following detailed description taken in 
conjunction with accompanying drawings.

DESCRIPTION OF THE PREFERRED EMBODIMENTS 
First, a previously proposed phase detector for detecting a mutual phase 
difference between two microwave signals will be explained with reference 
to FIG. 1. In the previously proposed phase detector illustrated in FIG. 
1, a pair of strip lines 1 and 2 having input ends 1a and 2a, 
respectively, are provided for being supplied with two microwave signals 
S.sub.1 and S.sub.2 from their input ends 1a and 2a, respectively. The 
strip lines 1 and 2 are connected to a pair of input ends of a directional 
coupler 3 formed into a quarter wavelength hybrid ring and having a pair 
of output ends 4 and 5. These output ends 4 and 5 are connected to the 
ground through a pair of diodes 6 and 7 connected thereto in the 
directions opposite to each other, respectively. The cathode of the diode 
6 and the anode of the diode 7 are connected in common to the ground 
through an inductor 8 provided for being an obstruction against a high 
frequency signal and a load resistor 9, and an output terminal 10 is 
derived from the connecting point between the inductor 8 and the load 
resistor 9. 
The microwave signal S.sub.1 from the input end 1a of the strip line 1 is 
transmitted through the strip line 1 and a branch line 3a of the 
directional coupler 3 which is selected in length substantially to 
correspond to a quarter of the wavelength of the microwave signal S.sub.1 
to the output end 4 of the directional coupler 3, and also transmitted 
through the strip line 1 and branch lines 3c and 3b of the directional 
coupler 3 which are also selected in length substantially to correspond to 
a quarter of the wavelength of the microwave signal S.sub.1 or through the 
strip line 1, the branch line 3a and a branch line 3d of the directional 
coupler 3 which is selected in length substantially to correspond to a 
quarter of the wavelength of the microwave signal S.sub.1 to the output 
end 5 of the directional coupler 3. The microwave signals appearing at the 
output ends 4 and 5 respectively in response to the microwave signal 
S.sub.1 have a mutual phase difference of (.pi./2) provided therebetween 
by the directional coupler 3. 
Further, the microwave signal S.sub.2 from the input end 2a of the strip 
line 2 is transmitted through the strip line 2 and the branch line 3d to 
the output end 5, and also transmitted through the strip line 2 and the 
branch lines 3c and 3a or through the strip line 2 and the branch lines 3b 
and 3d to the output end 4, and the microwave signals appearing at the 
output ends 5 and 4 respectively in response to the microwave signal 
S.sub.2 also have a mutual phase difference of (.pi./2) provided 
therebetween by the directional coupler 3. 
These microwave signals transmitted to the output ends 4 and 5 are detected 
by the diodes 6 and 7 and the detected outputs of the diodes 6 and 7 are 
combined to produce an output signal representing a mutual phase 
difference which the microwave signals S.sub.1 and S.sub.2 have originally 
therebetween. The output signal thus obtained is derived from the output 
terminal 10. 
In such detection of a mutual phase difference between two microwave 
signals by the previously proposed phase detector, however, an output 
signal representing the mutual phase difference which is to be detected is 
obtained by means of utilizing detecting operation of a pair of diodes and 
therefore the aforementioned problems arise therein. 
Now, one embodiment of the present invention will be explained with 
reference to FIGS. 2 to 6 hereinafter. 
FIG. 2 shows an example of a phase detector for detecting a mutual phase 
difference between two signals according to the present invention, to 
which the microwave signals S.sub.1 and S.sub.2 mentioned above are 
supplied as a pair of input signals. 
In this example, a single-gate field effect transistor (hereinafter 
referred to as a FET) 11, such as a Shottky gate FET employing a GaAs 
semiconductor, is provided and a pair of strip lines 12 and 13 having 
input ends 12a and 13a, respectively, are connected to a gate G and a 
source S of the FET 11, respectively. The strip line 12 is grounded for a 
direct current (DC) through an inductor 14 for being an obstruction 
against a high frequency signal and the microwave signals S.sub.1 and 
S.sub.2 are supplied to the input ends 12a and 13a of the strip lines 12 
and 13, respectively. The length of the strip line 12 from its input end 
12a to the gate G of the FET 11 and the length of the strip line 13 from 
its input end 13a to the source S of the FET 11 are so selected that the 
former is shorter than the latter and the phase shift caused in the 
microwave signal S.sub.1 by the strip line 12 through which the microwave 
signal S.sub.1 is transmitted to the gate G of the FET 11 is different 
from the phase shift caused in the microwave signal S.sub.2 by the strip 
line 13 through which the microwave signal S.sub.2 is transmitted to the 
source S of the FET 11 by the amount of phase .theta. satisfying the 
following equation; 
##EQU1## 
where k represents a ratio of the amplitude of the microwave signal 
S.sub.2 to the amplitude of the microwave signal S.sub.1. 
The source S of the FET 11 is connected to the ground through an inductor 
16 provided for being an obstruction against a high frequency signal and a 
biasing resistor 17. Between one end of the biasing resistor 17 and a 
voltage source +B, a variable resistor 18 is connected to supply a biasing 
current to the biasing resistor 17. 
Further, a drain D of the FET 11 is connected to one end of a strip line 
19. The other end of the strip line 19 is connected through a capacitor 20 
provided for being an obstruction against a direct current to a terminal 
resistor 21 so that the strip line 19 is terminated at the other end 
thereof with a matching impedance for a high frequency signal to avoid the 
reflection of the high frequency signal thereat. The strip line 19 is also 
connected to the voltage source +B through an inductor 22 provided for 
being an obstruction against a high frequency signal and a load resistor 
23, and an output terminal 24 is derived from the connecting point between 
the inductor 22 and the load resister 23. 
An equivalent circuit for a direct current (DC) of the above described 
phase detector shown in FIG. 2 can be illustrated as shown in FIG. 3. In 
the circuit of FIG. 3, the FET 11 is biased by the voltage produced across 
the biasing resistor 17 through which the biasing current flows so that 
the potential at the gate G becomes lower than the potential at the source 
S and operates with a gate bias voltage nearly equal to its pinch-off 
voltage. A drain current of the FET 11 varies in response to variations in 
both microwave signals supplied to the gate G and the source S, 
respectively, and an output is obtained from variations in the voltage 
apearing across the load resistor 23 in response to the variations in the 
drain current and derived to the output terminal 24. In this case, for the 
purpose of increasing the ratio of the voltage variations obtained across 
the load resistor 23 to the variations in the microwave signals supplied 
to the gate G and source S, that is, for the purpose of increasing the 
sensitivity of the circuit, the biasing resistor 17 connected to the 
source S is selected to have a very low resistance value. However, in case 
that the resistance value of the biasing resistor 17 is so low, since a 
source current I.sub.f flowing out from the source S of the FET 11 which 
is biased to operate with the gate bias voltage nearly equal to the 
pinch-off voltage is very small, the voltage necessary for biasing the FET 
11 to provide with the required gate bias voltage could not be obtained 
across the biasing resistor 17 by only the flow of the source current 
I.sub.f. Accordingly, an additional biasing current I.sub.p is caused to 
flow into the biasing resistor 17 from the voltage source +B through the 
variable resistor 18 and therefore the voltage necessary for biasing the 
FET 11 to provide with the required gate bias voltage is obtained by the 
flow of the sum I.sub.f +I.sub.p of the source current I.sub.f and the 
additional biasing current I.sub.p. The value of the additional biasing 
current I.sub.p is adjusted by the variable resistor 18 to be, for 
example, more than ten times of the value of the source current I.sub.f. 
Thus, both intentions for increasing the sensitivity of the circuit by 
means of employing the biasing resistor of the low resistance value and 
for obtaining the voltage necessary for biasing the FET 11 to provide with 
the required gate biasing voltage across the biasing resistor 17 are 
achieved. 
Next, an equivalent circuit for a high frequency signal of the FET 11 can 
be illustrated as shown in FIG. 4. In the circuit of FIG. 4, g.sub.DG and 
C.sub.DG stand for the conductance and capacitance between the drain D and 
gate G, respectively, g.sub.GS and C.sub.GS stand for the conductance and 
capacitance between the gate G and source S, respectively, g.sub.DS and 
C.sub.DS stand for the conductance and capacitance between the drain D and 
source S, respectively, .DELTA.V.sub.GS stands for the variation in a 
gate-source voltage V.sub.GS between the gate G and source S, g.sub.m 
stands for the transfer conductance and i.sub.D stands for the drain 
current. 
Although the drain current i.sub.D is to vary in response to variations in 
not only the gate bias voltage but also a drain bias voltage, the 
variations in the drain current i.sub.D caused in response to the 
variations in the drain bias voltage can be neglected in the practical 
operation state because the drain bias voltage is selected to be 
sufficiently high so that the FET 11 operates in the saturation region in 
its operation mode. Besides, the transfer conductance g.sub.m is expressed 
in the form containing a term of the first degree to a term of infinitely 
high degree as follows; 
##EQU2## 
With the transfer conductance g.sub.m expressed in the form in which the 
terms of higher than the sixth degree are eliminated as being negligible, 
an average value .DELTA.i.sub.D of variations .DELTA.i.sub.D in the drain 
current i.sub.D depending on the variations .DELTA.V.sub.GS in the 
gate-source voltage V.sub.GS which are caused by voltage variations in the 
microwave signals supplied to the gate G and source S, respectively, is 
expressed in the following equation; 
##EQU3## 
where .alpha. is a constant. 
Assuming that there is a phase difference .theta.' between the phase of the 
microwave signal (S.sub.1 ') supplied to the gate G and the phase of the 
microwave signal (S.sub.2 ') supplied to the source S and the microwave 
signals S.sub.1 and S.sub.2 have voltage values V.sub.G and V.sub.S 
expressed as follows, respectively; 
EQU V.sub.G =a.multidot.cos .omega.t, V.sub.S =b.multidot.cos 
(.omega.t+.theta.'), 
the following equation is obtained; 
EQU .DELTA.V.sub.GS =V.sub.G -V.sub.S =a.multidot.cos .omega.t-b.multidot.cos 
(.omega.t+.theta.') (2) 
The value of each of the terms g.sub.m1 to g.sub.m5 of the transfer 
conductance g.sub.m is obtained in calculation as shown in FIG. 5, where 
the abscissa indicates the gate-source voltage V.sub.GS, in case that the 
pinch-off voltage (V.sub.p) of the FET 11 is 3.3 volt. 
Now, substituting the right member of the equation (2) for .DELTA.V.sub.GS 
in the equation (1), the following equation is obtained; 
##EQU4## 
In calculating to this equation (3), the first, third and fifth terms in 
the right member of the equation (1) are eliminated because the average of 
each of them becomes zero and the second term in the right member of the 
equation (1) is also eliminated because the FET 11 operates with the gate 
bias voltage nearly equal to the pinch-off voltage V.sub.p and, as shown 
in FIG. 5, g.sub.m2 is much less that g.sub.m4 when the gate-source 
voltage V.sub.GS is nearly equal to the pinch-off voltage V.sub.p. 
Developing the right member of the equation (3), the terms concerning high 
frequency components are eliminated because the average of each of them 
becomes zero and consequently the following equation is obtained; 
##EQU5## 
Since the ratio of the amplitude of the microwave signal S.sub.2 to the 
amplitude of the microwave signal S.sub.1 is represented by k, k=(b/a) is 
satisfied. Accordingly, the equation (4) can be rearranged to the 
following equation; 
##EQU6## 
Assuming that the following equation is satisfied; 
##EQU7## 
when k&lt;0, 1/2(k+(1/k)).gtoreq.1 is satisified and A increases monotonously 
in response to variations of cos .theta.', so that A takes a maximum value 
Amax when cos .theta.'=-1 and a minimum value Amin when cos .theta.'=1. 
Accordingly, Amax and Amin are obtained as expressed in the following 
equations, respectively; 
EQU Amax=12k.sup.2 +12k(1+k.sup.2)+3(1+k.sup.4)+6k.sup.2 
EQU Amin=12k.sup.2 -12k(1+k.sup.2)+3(1+k.sup.4)+6k.sup.2 
and an average value Aave of A is expressed in the following equation; 
##EQU8## 
Assuming that the equation: .theta.'=.theta..sub.0 '+.DELTA..theta.', where 
.theta..sub.0 ' is a fixed phase difference and .DELTA..theta.' is a 
variable phase difference, that is, a phase difference to be detected, is 
satisfied and a value of .theta.' by which the right member of the 
equation (6) takes the average value Aave expressed in the equation (7) is 
employed as the above mentioned .theta..sub.0 ', .DELTA..theta.' becomes 
zero in this case and accordingly A becomes an odd function of 
.DELTA..theta.'. Further, according to the equations (5) and (6), the 
equation: 
##EQU9## 
is satisfied. As a result of this, it is apparent that .DELTA.i.sub.D is 
also an odd function of .DELTA..theta.' and varies in response to positive 
and negative variations of .DELTA..theta.'. 
Accordingly, in the equation (6), substituting Aave for A in the left 
member and .theta..sub.0 ' for .theta.' in the right member, the following 
equation is obtained; 
##EQU10## 
Since .vertline.cos .theta..sub.0 '.vertline. is less than or equal to 1, 
cos .theta..sub.0 ' should be expressed in the following equation; 
##EQU11## 
In accordance with the above description, it is understood that when there 
is the fixed phase difference .theta..sub.0 ' satisfying the equation (9) 
between the microwave signal S.sub.1 ' supplied to the gate G and the 
microwave signal S.sub.2 ' supplied to the source S, the average value 
.DELTA.i.sub.D of the variations .DELTA.i.sub.D in the drain current 
i.sub.D varies in response to the variations of the variable phase 
difference .DELTA..theta.' between the microwave signals S.sub.1 ' and 
S.sub.2 ' and therefore the variable phase difference .DELTA..theta.' can 
be detected on the strength of the average value .DELTA.i.sub.D. 
In the circuit of FIG. 2, the strip lines 12 and 13 are so selected that 
the microwave signal S.sub.1 transmitted to the gate G of the FET 11 
through the strip line 12 and the microwave signal S.sub.2 transmitted to 
the source S of the FET 11 through the strip line 13 have therebetween the 
additional mutual phase difference .theta. satisfying the equation: 
##EQU12## 
as described above. That is, when the microwave signals S.sub.1 and 
S.sub.2 are supplied to the gate G and source S as the microwave signals 
S.sub.1 ' and S.sub.2 ', respectively, the microwave signals S.sub.1 ' and 
S.sub.2 ' have therebetween the mutual phase difference which the 
microwave signals S.sub.1 and S.sub.2 have originally therebetween as a 
variable phase difference and the additional phase difference .theta. 
which is added by the strip lines 12 and 13 as a fixed phase difference. 
This fixed phase difference .theta. is identical with the fixed phase 
different .theta..sub.0 ' satisfying the above mentioned equation (9) and 
consequently the average value .DELTA.i.sub.D of the variations 
.DELTA.i.sub.D of the drain current i.sub.D of the FET 11 in the circuit 
shown in FIG. 2 varies in response to the variations in the variable phase 
difference between the microwave signals S.sub.1 ' and S.sub.2 ', that is, 
the variations in the phase difference between the microwave signals 
S.sub.1 and S.sub.2. This average value .DELTA.i.sub.D causes variations 
in the voltage across the load resistor 23 and an output signal V.sub.o 
obtained at the output terminal 24 is varied in response to the voltage 
variations across the load resistor 23. Accordingly, the mutual phase 
difference between the microwave signals S.sub.1 and S.sub.2 is detected 
in the form of the output signal V.sub.o. 
According to the above description, it is apparent that the circuit of FIG. 
2 is operative as a phase detector for detecting the mutual phase 
difference between the microwave signals S.sub.1 and S.sub.2 supplied to 
the input ends 12a and 13a, respectively. 
In the case of this circuit of FIG. 2, the ratio of the variations in the 
output signal V.sub.o to the variations in the phase difference between 
the microwave signals S.sub.1 and S.sub.2 is increased owing to the low 
resistance value of the biasing resistor 17 connected to the source S of 
the FET 11 and therefore high sensitivity for phase detection can be 
obtained. Further, since the phase detection is substantially achieved at 
one FET, that is, the FET 11, operation for the phase detection can be 
performed very stably. 
Incidentally, since the right member of the equation (9) always takes an 
negative value, the fixed phase difference .theta..sub.0 ' is to be more 
than 90 degrees and less than 270 degrees. Accordingly, a difference 
between the length of the strip line 12 and the length of the strip line 
13 is selected to be longer than 1/4.multidot..lambda. and shorter than 
3/4.multidot..lambda. (.lambda. is a transfer wavelength). 
Further, the relation between the fixed phase difference .theta..sub.0 ' 
and the ratio k is shown in FIG. 6. The fixed phase difference 
.theta..sub.0 ' takes a value in the range of about 110 to about 115 when 
the ratio k takes a value in the range of 0.5 to 2, that is, when the 
amplitude of one of the microwave signals S.sub.1 and S.sub.2 is equal to 
or more than a half of the amplitude of the other of the microwave signals 
S.sub.1 and S.sub.2. In practice, it is usual that the fixed phase 
difference .theta..sub.0 ' is arranged to take such a value in the range 
of about 110 to about 115. 
FIG. 7 shows a frequency discriminator to which the phase detector 
according to the present invention and shown in FIG. 2 is applied. In the 
circuit shown in FIG. 7, the phase detector 25 is shown with the 
references common to FIG. 2 and another pair of strip lines 26 and 27 are 
connected to the input ends 12a and 13a of the phase detector 25, 
respectively. Further, a dielectric resonator 28 having a resonant 
frequency f.sub.o (for example, 11.66 GHz) is provided between the strip 
lines 26 and 27 so as to couple electrically with both of them. At one end 
of the strip line 26 an input end 26a is provided and a microwave signal 
S.sub.3 having a frequency f.sub.s which is, for example, centered at 
11.66 GHz and variable to deviate by about 10 MHz from 11.66 GHz is 
supplied therefrom. A transfer wavelength .lambda..sub.g of the phase 
detector 25 is selected to be identical with the wavelength of a microwave 
signal having the frequency f.sub.o. 
The microwave signal S.sub.3 supplied to the input end 26a of the strip 
line 26 is transmitted to the input end 12a of the phase detector 25 
through the strip line 26 and also to the input end 13a of the phase 
detector 25 through a portion of the strip line 26, the dielectric 
resonator 28 and the strip line 27 because the electrical coupling between 
the strip line 26 and the dielectric resonator 28 and between the 
dielectric resonator 28 and the strip line 27 allows the microwave signal 
S.sub.3 to be transmitted to the strip line 27 from the strip line 26. In 
this case, assuming that S'.sub.3 stands for the microwave signal at the 
input end 12a and S".sub.3 stands for the microwave signal at the input 
end 13a, the phase of the microwave signal S'.sub.3 is shifted by the 
amount of phase depending on the frequency f.sub.s from a reference phase 
which the microwave signal S'.sub.3 could have if the dielectric resonator 
28 were not provided in a first phase direction and the phase of the 
microwave signal S".sub.3 is also shifted by the amount of phase depending 
on the frequency f.sub.s from the above mentioned reference phase in a 
second phase direction opposite to the first phase direction. 
Such phase shift in each of the microwave signals S'.sub.3 and S".sub.3 
will be explained in more detail with reference to FIG. 8 hereinafter. 
The phase of the microwave signal S'.sub.3 having the frequency f.sub.s is 
made identical with the above mentioned reference phase when the frequency 
f.sub.s is equal to the frequency f.sub.o, delayed compared with the 
reference phase when the frequency f.sub.s is lower than the frequency 
f.sub.o and advanced compared with the reference phase when the frequency 
f.sub.s is higher than the frequency f.sub.o. This phase shift in the 
microwave signal S'.sub.3 is caused within the phase range of -(.pi./2) to 
+(.pi./2) in relation to the reference phase and the amount of phase 
shifted is determined depending on a difference between the frequency 
f.sub.s and the frequency f.sub.o. The relation between the amount of 
phase .phi. shifted from the reference phase and the frequency f.sub.s for 
the microwave signal S'.sub.3 is shown with a broken line in FIG. 8. 
On the other hand, the phase of the microwave signal S".sub.3 also having 
the frequency f.sub.s is made identical with the reference phase when the 
frequency f.sub.s is equal to the frequency f.sub.o, advanced compared 
with the reference phase when the frequency f.sub.s is lower than the 
frequency f.sub.o and delayed compared with the reference frequency when 
the frequency f.sub.s is higher than the frequency f.sub.o. This phase 
shift in the microwave signal S".sub.3 is also caused within the phase 
range of -(.pi./2) to +(.pi./2) in relation to the reference phase and the 
amount of phase shifted is also determined depending on the difference 
between the frequency f.sub.s and the frequency f.sub.o. The relation 
between the amount of phase .phi. shifted from the reference phase and the 
frequency f.sub.s for the microwave signal S".sub.3 is shown with a solid 
line in FIG. 8. 
As apparent from the above description and FIG. 8, the microwave signals 
S'.sub.3 and S".sub.3 have a mutual phase difference which depends on the 
frequency f.sub.s therebetween. Assuming that this mutual phase difference 
between the microwave signals S'.sub.3 and S".sub.3 is referred to as 
.theta..sub.3 ', the mutual phase difference .theta..sub.3 ' is zero when 
the frequency f.sub.s is equal to the frequency f.sub.o. 
Accordingly, in the circuit of FIG. 7, the microwave signals S'.sub.3 and 
S".sub.3 having the mutual phase difference .theta..sub.3 ' which varies 
in response to variations in the frequency f.sub.s of the microwave signal 
S.sub.3 are supplied to the input ends 12a and 13a of the phase detector 
25, respectively, and therefore an output signal V'.sub.o representing the 
mutual phase difference .theta..sub.3 ' is obtained at the output terminal 
24 through such operation of the phase detector 25 as explained with 
reference to the circuit of FIG. 2. The output signal V'.sub.o varies in 
response to variations in the mutual phase difference .theta..sub.3 ', 
that is, in response to variations in the frequency f.sub.3 of the 
microwave signal S.sub.3, and this means that the circuit of FIG. 7 is 
operative as a frequency discriminator for producing an output depending 
on the frequency of an input signal. 
As for the circuits shown in FIGS. 2 and 7, it is possible to substitute a 
transistor having emitter, collector and base electrodes for the variable 
resistor 18. In such a case, the emitter and collector electrodes of the 
transistor are connected to one end of the biasing resistor 17 coupled 
with the source S of the FET 11 and the voltage source +B, respectively, 
and the base of the transistor is supplied with a predetermined bias 
voltage, so that the potential at the source S of the FET 11 is determined 
by the potential at the base of the transistor so as to hardly vary in 
response to variations in the source current on the FET 11. This results 
in that the resistant value of the biasing resistor 17 is equivalently 
reduced and consequently the sensitivity of the circuit is further 
increased. 
In addition, it is possible in the above case to achieve the temperature 
compensation for the output signal obtained at the output terminal 24 by 
means of controlling the potential at the base electrode of the transistor 
in response to temperature variations. 
FIG. 9 shows another example of the phase detector according to the present 
invention, to which the microwave signals S.sub.1 and S.sub.2 mentioned 
above are supplied in the same manner as the example of FIG. 2. 
In this example, a dual-gate field effect transistor (hereinafter referred 
to as a DG FET) 31 having first and second gates G.sub.1 and G.sub.2, a 
source S and a drain D is provided and a pair of strip lines 32 and 33 
having input ends 32a and 33a, respectively, are connected to the first 
and second gates G.sub.1 and G.sub.2 of the DG FET 31, respectively. The 
strip lines 32 and 33 are grounded for a direct current (DC) through 
inductors 34 and 35 provided for being obstructions against a high 
frequency signal, respectively, and the microwave signals S.sub.1 and 
S.sub.2 are supplied to the input ends 32a and 33a of the strip lines 32 
and 33, respectively. The length of the strip line 32 from the input end 
32a to the first gate G.sub.1 and the length of the strip line 33 from the 
input end 33a to the second gate G.sub.2 are so selected that the former 
is longer by an odd multiple of a quarter of a transfer wavelength 
.lambda..sub.g ' than the latter and consequently the phase shift caused 
in the microwave signal S.sub.1 by the strip line 32 through which the 
microwave signal S.sub.1 is transmitted to the first gate G.sub.1 is 
different by an odd multiple of (.pi./2) from the phase shift caused in 
the microwave signal S.sub.2 by the strip line 33 through which the 
microwave signal S.sub.2 is transmitted to the second gate G.sub.2. 
Another strip line 36 having the length corresponding to an odd multiple of 
a quarter of the transfer wavelength .lambda..sub.g ' is connected to the 
source S of the DG FET 31. One end of the strip line 36 is opened so that 
the source S of the DG FET 31 is grounded for a high frequency signal of 
the same wavelength as the transfer wavelength .lambda..sub.g '. The strip 
line 36 is also connected through an inductor 37 provided for being an 
obstruction against a high frequency signal and a biasing resistor 38 to 
the ground. Between one end of the biasing resistor 38 and a voltage 
source +B having a voltage value V.sub.B, a variable resistor 39 is 
connected. 
Further, the drain D of the DG FET 31 is connected to one end of further 
strip line 40. The other end of the strip line 40 is connected through a 
capacitor 41 provided for being an obstruction against a direct current to 
a terminal resistor 42 so that the strip line 40 is terminated at the 
other end thereof with a matching impedance for a high frequency signal to 
avoid the reflection of the high frequency signal thereat. The strip line 
40 is also connected to the voltage source +B through an inductor 43 and a 
load resistor 44 having a resistant value r, and an output terminal 45 is 
derived from the connecting point between the inductor 43 and the load 
resistor 44. 
An equivalent circuit for a direct current (DC) of the phase detector shown 
in FIG. 9 can be illustrated as shown in FIG. 10. In the circuit of FIG. 
10, the DG FET 31 is biased by the voltage produced across the biasing 
resistor 38 through which a source current I.sub.f and an additional 
biasing current I.sub.p from the variable resistor 39 flow so that the 
potentials at the first and second gates G.sub.1 and G.sub.2 become lower 
that the potential at the source S and operates with a gate bias voltage 
nearly equal to its pinch-off voltage. A drain current of the DG FET 31 
varies in response to variations in both microwave signals supplied to the 
first and second gates G.sub.1 and G.sub.2, respectively, and an output is 
obtained from variations in the voltage appearing across the load resistor 
44 in response to the variations in the drain current and derived to the 
output terminal 45. 
The resistance value of the biasing resistor 38 is selected to be low in 
the same manner as the biasing resistor 17 in the circuit of FIG. 2 for 
the purpose of increasing the sensitivity of the circuit and further the 
variable resistor 39 is provided for the same purpose as the variable 
resistor 18 in the circuit of FIG. 2. 
The DG FET 31 is equivalent to a serial connection of a pair of FETs in 
which the source of one of them is connected to the drain of the other of 
them, such as the serial connection of a pair of FETs 46 and 47 as shown 
in FIG. 11A. With such an equivalent of the DG FET 31, an equivalent 
circuit for a high frequency signal of the phase detector shown in FIG. 9 
can be illustrated as shown in FIG. 11B. In the equivalent circuit shown 
in FIG. 11B, the gate of the FET 46 and the gate of the FET 47 correspond 
to the first and second gates G.sub.1 and G.sub.2 of the DG FET 31, 
respectively, and the drain of the FET 46 and the source of the FET 47 
correspond to the drain D and the source S of the DG FET 31, respectively. 
In the circuit of FIG. 11B, v.sub.g1 stands for the gate-source voltage of 
the FET 46, v.sub.g2 stands for the gate-source voltage of the FET 47, 
v'.sub.g1 stands for the gate-ground voltage of the FET 46, v.sub.d2 
stands for the drain-source voltage of the FET 47, i.sub.d1 stands for the 
drain current of the FET 46 and i.sub.d2 stands for the drain current of 
the FET 47. 
Since the DG FET 31 is biased to operate with the gate bias voltage nearly 
equal to the pinch-off voltage as mentioned above, each of the FETs 46 and 
47 is to be also biased to operate with the gate bias voltage nearly equal 
to its pinch-off voltage. 
In general, when a FET operates with such a gate bias voltage supplied 
thereto as to be nearly equal to its pinch-off voltage V.sub.p, a 
gate-source voltage v.sub.g and a drain current i.sub.d therein satisfy 
the following equation; 
EQU i.sub.d =I(V.sub.p -K.multidot.v.sub.g).sup.2, 
where I and K are constants. 
Accordingly, as for the FET 46 in the circuit of FIG. 11B, the following 
equation is obtained; 
EQU i.sub.d1 =I(V.sub.p1 -K.sub.1 .multidot.v.sub.g1).sup.2 =I{V.sub.p1 
-K.sub.1 .multidot.(v'.sub.g1 -v.sub.d2)}.sup.2 (10) 
where V.sub.p1 is the pinch-off voltage of the FET 46 and K.sub.1 is a 
constant. 
v.sub.d2 is a function of v.sub.g2 and the following equation is obtained 
as a reasonable approximation; 
EQU v.sub.d2 =R.multidot.v.sub.g2 (11), 
where R is a constant. 
From the equations (10) and (11), the following equation is obtained; 
##EQU13## 
v'.sub.g1 and v.sub.g2 correspond to the voltage values of the microwave 
signals S.sub.1 and S.sub.2 at the first and second gates G.sub.1 and 
G.sub.2, respectively, and assuming that there is a mutual phase 
difference .gamma. between the microwave signal S.sub.1 at the input end 
32a and the microwave signal S.sub.2 at the input end 33a, and the 
microwave signal S.sub.1 at the input end 32a and the microwave signal 
S.sub.2 at the input end 33a have voltage values cos (.omega.t+.gamma.) 
and cos .omega.t, respectively, since the microwave signal S.sub.1 at the 
first gate G.sub.1 and the microwave signal S.sub.2 at the second gate 
G.sub.2 have therebetween an additional phase difference of an odd 
multiple of (.pi./2), which is provided by the strip lines 32 and 33, as 
explained above, v'.sub.g1 and v.sub.g2 are expressed as follows, 
respectively; 
##EQU14## 
Substituting the right member of the equation (13) for v'.sub.g1 in the 
equation (12) and also the right member of the equation (14) for v.sub.g2 
in the equation (12) to rearrange the equation (12), an average value 
i.sub.d1 of the drain current i.sub.d1 of the FET 46 is obtained from the 
rearranged equation (12) as shown in the following equation; 
##EQU15## 
In solving this equation, the terms concerning high frequency components 
are eliminated because the average of each of them becomes zero. 
Further, the average of cos (2 .omega.t+.phi.) becomes zero and therefore 
the following equation is obtained; 
##EQU16## 
As apparent from the equation (15), the average value i.sub.d1 of the drain 
current of the FET 46 is an odd function of the mutual phase difference 
.gamma. between the microwave signals S.sub.1 and S.sub.2. 
An output signal V.sub.o ' obtained at the output terminal 45 of the 
circuit shown in FIGS. 9 and 10 is obtained by subtracting the voltage 
value across the load resistor 44 from the voltage value V.sub.B of the 
voltage source +B and the voltage value across the load resistor 44 is 
obtained as a product of the resistant value r of the load resistor 44 and 
the current value of the drain current of the DG FET 31, that is, the 
average value i.sub.d1 of the drain current i.sub.d1 of the FET 46. 
Accordingly, the following equation is obtained; 
##EQU17## 
As apparent from the above final equation, the output signal V.sub.o ' 
obtained at the output terminal 45 is an odd function of the mutual phase 
difference .gamma. between the microwave signals S.sub.1 and S.sub.2, that 
is, the output signal V.sub.o ' is a direct current (DC) voltage varying 
in response to variations in the mutual phase difference .gamma. between 
the microwave signals S.sub.1 and S.sub.2. 
According to the above, it is apparent that the circuit of FIG. 9 is 
operative as a phase detector for detecting the mutual phase difference 
between the microwave signals S.sub.1 and S.sub.2 supplied to the input 
ends 32a and 33a, respectively. 
In the case of the circuit of FIG. 9, high sensitivity for phase detection 
can be obtained owing to the low resistant value of the biasing resistor 
38 in the same manner as the circuit of FIG. 2. Besides, in practice, the 
first and second gates G.sub.1 and G.sub.2 of the DG FET 31, to which the 
microwave signals S.sub.1 and S.sub.2 are supplied to have their mutual 
phase difference detected, are formed at positions very close to each 
other on a semiconductor substrate so that little difference in various 
characteristics between both gates S.sub.1 and S.sub.2 is found and 
therefore, in this case, phase detecting operation with superior stability 
can be performed.