Capacitive switch controller

A controller controls a plurality of sensor electrodes. To a plurality of sense pins, the plurality of sensor electrodes are connected. A plurality of capacitance detection circuits respectively measure capacitance values of the corresponding sense pins. A calibration circuit calibrates the plurality of capacitance detection circuits. A relative relationship among the respective capacitance values of the plurality of sense pins is used for abnormality detection.

CROSS REFERENCE TO RELATED APPLICATION

The present application claims priority under 35 U.S.C § 119(e) to Japanese Application No. 2017-198415, filed on Oct. 12, 2017, and Japanese Application No. 2018-172151, filed on Sep. 14, 2018 the entire contents of all three of which are also incorporated herein by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a capacitive switch controller.

2. Description of the Related Art

An OA device such as a printer, a telephone, and a facsimile or a home appliance such as an air conditioner, a refrigerator, and a rice cooker includes as a user interface a user-touchable switch. In recent years, as such a switch, a capacitive switch prevails instead of a mechanical TACT switch.

Each ofFIG. 1AandFIG. 1Bis a block diagram of a capacitive switch1100. The capacitive switch1100includes a plurality of sensor electrodes1102and a capacitive switch controller (hereinbelow referred to simply as a controller)1200. The capacitive switch1100is a self-capacitance-type touch switch. The electrostatic capacitance of each of the sensor electrodes1102changes when a user's finger touches or approaches the electrode.

The controller1200measures the respective electrostatic capacitance values of the plurality of sensor electrodes1102and determines whether or not the respective sensor electrodes1102are touched in accordance with the change amounts of the values.

FIG. 1Aillustrates an example in which the plurality of sensor electrodes1102and the controller1200are mounted on a same printed board1300. The plurality of sensor electrodes1102are connected to the controller1200via wires1104formed on the printed board1300.

FIG. 1Billustrates an example in which the plurality of sensor electrodes1102and the controller1200are implemented on different printed boards1302and1304. In the layout inFIG. 1B, the two printed boards1302and1304are connected via a flexible printed circuits (FPC) board1306. Hence, the wires1104connecting the sensor electrodes1102to the controller1200pass the printed boards1302and1304, the flexible printed circuits board1306, and connectors1308.

FIG. 2is an equivalent circuit diagram of the capacitive switch1100.FIG. 2illustrates a configuration for one channel. The wire1104between the sensor electrode1102and the controller1200contains parasitic capacitance CP. The parasitic capacitance CPis generated between the adjacent wires1104, between the wire1104and a ground pattern, in the connector, or in another place.

The controller1200includes a capacitance detection circuit1202. The capacitance detection circuit1202detects combined capacitance of electrostatic capacitance CSformed between the sensor electrode1102and the human body (finger) and the parasitic capacitance CP.

The electrostatic capacitance CSdepends on the material and the thickness of a dielectric film covering the sensor electrode1102, the touch area of the human body, and the like and is typically lower than 1 pF in many cases. On the other hand, the parasitic capacitance CPdepends on the layout of the wiring pattern and is typically several pF to several tens of pF, which is higher than the electrostatic capacitance CS. Also, the parasitic capacitance CPis susceptible to production tolerance.

Under such circumstances, the controller1200executes calibration to suppress the variation of the parasitic capacitance CP. The calibration is executed so that the measurement value of the parasitic capacitance CPdetected by the capacitance detection circuit1202may approximate a predetermined reference value when no touch is generated, that is, when the electrostatic capacitance CSis substantially zero.

As a result of considering the touch switches inFIG. 1AandFIG. 1B, the present inventors have recognized the following problems.

In the touch switches inFIG. 1AandFIG. 1B, in a case in which the wire1104is disconnected, in which an implementation failure (solder separation) of a pin of the controller1200is generated, or in which connector detachment is generated, the touch switches will lose their functions. Particularly inFIG. 1B, since the flexible printed circuits board1306is easily subject to external stress, the disconnection is easily generated.

For example, when the wire1104is disconnected, this will bring about a change of the parasitic capacitance CP. However, as described above, due to the calibration function of the controller1200, the change of the parasitic capacitance CPcaused by the disconnection is canceled out. That is, the calibration function makes it difficult to detect an abnormality such as the disconnection.

SUMMARY OF THE INVENTION

The present invention is accomplished by taking such problems as mentioned above into consideration thereof, and one of illustrative purposes of an embodiment thereof is to provide a capacitive switch controller enabling an abnormality such as disconnection to be detected without impairing a calibration function.

An embodiment of the present invention relates to an abnormality detection method in a system, a circuit, a device, or the like including a plurality of sensor electrodes. In this method, a relative relationship among capacitance values of a plurality of sense pins is obtained. The obtained relative relationship is compared with an expected value for the relative relationship, and an abnormality is detected based on a comparison result.

It is to be noted that any arbitrary combination or rearrangement of the above-described structural components and so forth is effective as and encompassed by the present embodiments. Moreover, this summary of the invention does not necessarily describe all necessary features so that the invention may also be a sub-combination of these described features.

DETAILED DESCRIPTION OF THE INVENTION

Overview of Embodiments

An embodiment disclosed in the present description relates to a capacitive switch controller. The capacitive switch controller includes a plurality of sense pins to be coupled to a plurality of sensor electrodes, a plurality of capacitance detection circuits respectively measuring capacitance values of the corresponding sense pins, a calibration circuit structured to calibrate the plurality of capacitance detection circuits, and an abnormality detection circuit structured to obtain a relative relationship among the capacitance values of the plurality of sense pins.

In a case in which an abnormality such as disconnection, a ground fault, and a power supply fault is generated in electric connection between the sense pin and the corresponding sensor electrode, the capacitance of the sense pin changes. The abnormality can be detected by comparing a relative relationship among the capacitance values of the plurality of sense pins in a normal state (expected order) to the relative relationship obtained during a circuit operation.

The abnormality detection circuit may obtain an order of the capacitance values of the plurality of sense pins. As a result, it is possible to determine in which sense pin the abnormality is generated.

The abnormality detection circuit may apply to all of the sense pins a calibration result obtained when one reference pin selected from the plurality of sense pins is set as a pin to be calibrated and, based on a resulting measured capacitance value of each of the sense pins, may determine a relative relationship between the reference pin and each of the other sense pins.

For example, in a case in which the measured capacitance value of one of the other sense pins exceeds an upper limit of a measurement range, the capacitance value of the sense pin may be determined to be higher than the capacitance value of the reference pin. Conversely, in a case in which the measured capacitance value of one of the other sense pins falls below a lower limit of the measurement range, the capacitance value of the sense pin may be determined to be lower than the capacitance value of the reference pin.

An equal operation may be repeated while the plurality of sense pins are sequentially selected as a reference pin one by one. Accordingly, an order of the capacitance of all of the plurality of sense pins can be determined.

The capacitance detection circuit may include a variable circuit element. The calibration circuit may control a characteristic of the variable circuit element so that a measured capacitance value of each of the sense pins may approximate a reference value.

The abnormality detection circuit may detect an abnormality based on a relative relationship among the controlled characteristics of the variable circuit elements. The controlled characteristic of the variable circuit element in each of the capacitance detection circuits correlates with the capacitance value of the sense pin. Accordingly, information about the relative relationship among the capacitance values of the plurality of sense pins can be obtained by this method as well.

The capacitance detection circuit may include a variable capacitor for calibration connectable to the sense pin. The calibration circuit may control a capacitance value of the variable capacitor so that a measured capacitance value of the sense pin at each channel may approximate a reference value.

The abnormality detection circuit may detect an abnormality based on a relative relationship among the controlled capacitance values of the variable capacitors.

The abnormality detection circuit may detect an abnormality based on a relative relationship among change amounts of measurement values when a predetermined capacitance change is applied to each of the sense pins.

Hereinbelow, the present invention will be described with reference to the drawings based on preferred embodiments. Similar or identical components, members, processes illustrated in the respective figures are shown with the same reference numerals, and description of the duplicate components is omitted as needed. Also, the embodiments are not intended to limit the invention and are illustrative only, and all characteristics and combinations thereof described in the embodiments are not always essential to the invention.

In the present description, “a state in which a member A is connected to a member B” includes a case in which the member A and the member B are connected physically directly and a case in which the member A and the member B are connected indirectly via another member which has no substantial effect on the electric connection state between the members or which does not impair a function and an effect obtained by the connection between the members.

Similarly, “a state in which a member C is provided between a member A and a member B” includes a case in which the member A and the member C, or the member B and the member C, are connected directly and a case in which the member A and the member C, or the member B and the member C, are connected indirectly via another member which has no substantial effect on the electric connection state between the members or which does not impair a function and an effect obtained by the connection between the members.

First Embodiment

FIG. 3is a block diagram of a capacitive switch100according to a first embodiment. The capacitive switch100includes a plurality of sensor electrodes102and a capacitive switch controller (hereinbelow referred to simply as a controller)200. The controller200is connected to an external processor (host controller)300via an Inter IC (I2C) interface, a serial peripheral interface (SPI), or the like and is operated based on control of the processor300.

The controller200includes a plurality of sense pins202_1to202_N, a plurality of capacitance detection circuits210_1to210_N, a touch determination unit220, a calibration circuit230, and an abnormality detection circuit250.

The touch determination unit220, the calibration circuit230, and the abnormality detection circuit250may be configured integrally as a digital signal processing circuit290. The respective functions of the touch determination unit220, the calibration circuit230, and the abnormality detection circuit250may be fulfilled by means of hardware or a combination of software and a CPU. The function of the touch determination unit220may be fulfilled by means of the processor300.

To each of the sense pins202is connected the corresponding one out of the plurality of sensor electrodes102via a wire104. It is to be noted that each wire104inFIG. 3comprehensively represents a wire on a printed board, a wire on a connector or a flexible board, and the like. The number (channel number) of the sense pins202is not particularly limited and is N=2, 4, 8, 16, 32, or the like. InFIG. 3, a case in which N=4 is described.

To facilitate understanding, in parasitic capacitance CP1to CP4of the wires104_1to104_4, a relationship of CP1>CP2>CP3>CP4shall be established in a normal state in which disconnection or the like is not generated.

The capacitance detection circuits210_1to210_N measure capacitance of the corresponding sense pins202_1to202_N and generate digital measurement values D1to DNindicating measured capacitance. Each of the capacitance detection circuits210is configured so that it can be calibrated in a hardware form. The configuration of the capacitance detection circuit210is not particularly limited and may be a known circuit configuration.

The calibration circuit230calibrates the plurality of capacitance detection circuits210so that the measurement values D1to DNin a non-touch state may correspond to a reference value DREF. The calibration may be executed each time of activation of the controller200. The calibration can also be executed in response to a request from the external processor300.

During an actual operation, the touch determination unit220determines based on the measurement values D1to DNobtained by the plurality of capacitance detection circuits210whether or not the sensor electrodes102_1to102_N have been touched. Each of the measurement values at this time represents combined capacitance of the parasitic capacitance CPand electrostatic capacitance CSformed between a human body and the sensor electrode102.

For example, in terms of an ith channel CHi, when a difference between a measurement value Diand the reference value DREFexceeds a threshold value, it is determined that the sensor electrode is in a touch state.

The abnormality detection circuit250obtains a relative relationship among capacitance values of the plurality of sense pins202in a non-touch state. The capacitance of the sense pins in the non-touch state is nothing less than the parasitic capacitance CP. What is needed here is the relative relationship among the capacitance CP1to CPNof the plurality of sense pins202, not absolute capacitance values of the plurality of sense pins202. Also, it is to be noted that the capacitance values of the sense pins202are true capacitance values not influenced by calibration by means of the calibration circuit230and are thus different from the measurement values D1to DNafter calibration. In other words, the measurement values D1to DNobtained by the calibrated capacitance detection circuits210do not represent the capacitance values of the sense pins202.

Meanwhile, in a case in which the capacitance values of the sense pins202are measured by the capacitance detection circuits210before being calibrated, the capacitance values are highly possibly out of the measurement ranges of the capacitance detection circuits210. Accordingly, the measurement values D1to DNobtained by the capacitance detection circuits210before being calibrated do not represent the capacitance values of the sense pins202either.

A method for obtaining the relative relationship among the capacitance values of the plurality of sense pins202will be described below.

The abnormality detection circuit250has stored therein as an expected value a relative relationship among the capacitance values of the plurality of sense pins202in a normal state in which disconnection or the like is not generated. In the present embodiment, the relationship of CP1>CP2>CP3>CP4is the expected value (expected order).

Based on a comparison result between a relative relationship among the plurality of capacitance values obtained as a result of measurement and an expected value for the relative relationship, the abnormality detection circuit250determines whether or not there is an abnormality. More specifically, in a case in which the relative relationship among the plurality of capacitance values obtained as a result of measurement corresponds to the expected value, the case is determined to be normal. In a case of no correspondence, the case is determined to be abnormal.

Preferably, the abnormality detection circuit250may obtain an order of the capacitance values of the plurality of sense pins202in a non-touch state. The abnormality detection circuit250stores the order of the capacitance values of the plurality of sense pins202in the normal state as an expected value. Accordingly, it is possible to determine in which of the plurality of sense pins202an abnormality is generated.

The configuration of the capacitive switch100has been described above. Next, the operation thereof will be described.

Although the capacitance values themselves of the plurality of sense pins vary due to a manufacture variation, the degree of the variation is as small as not having an effect on the relative relationship among the capacitance values. The abnormality detection circuit250obtains a relative relationship (or an order) among capacitance values of the plurality of sense pins202. In a case in which no disconnection or the like is generated, the obtained capacitance order corresponds to the expected order.

In a case in which the wire104at a certain channel is disconnected, the capacitance of the sense pin202at the channel is low, and the obtained capacitance order does not correspond to the expected order. For example, when a disconnection is generated at the second channel, the capacitance order based on the measurement result is CP1>CP3>CP4>CP2. In this case, a channel at which the disconnection is generated can be specified from the obtained capacitance order.

When the abnormality detection circuit250detects the abnormality, the abnormality detection circuit250notifies the processor300. As a result, the processor300can notify the user of the failure or log the failure.

Meanwhile, in a normal state, there is a case in which the capacitance values of the sense pins202at several channels are close, and in which the order may be switched due to the manufacture variation even when no disconnection is generated. In this case, the switching may be permitted to define the expected order.

For example, in a case in which order switching between CP1and CP2is permitted, the expected order may be defined as (CP1, CP2)>CP3>CP4. (CP1, CP2) represents permission to switch the order.

For example, two expected orders, CP1>CP2>CP3>CP4and CP2>CP1>CP3>CP4, may be defined, and in a case in which the order corresponds to either one of them, the case may be determined to be normal.

Next, a method for obtaining an order of capacitance values of the plurality of sense pins202will be described.

First Obtaining Method

In a first obtaining method, an order of capacitance values of the plurality of sense pins is obtained with use of a calibration function of the calibration circuit230.

The calibration circuit230sets as a calibration target a reference pin selected from the plurality of sense pins202_1to202_N. The abnormality detection circuit250applies a calibration result obtained at this time to all of the sense pins202and obtains measurement values D1to DNof the capacitance of the plurality of sense pins202at this time. The abnormality detection circuit250determines a relative relationship between the reference pin and the other sense pins202based on the measurement values D1to DN.

For example, the sense pin202_1at a first channel CH1is selected as a reference pin, and calibration is performed at the first channel CH1. As a result, a calibration result (calibration value) for the capacitance detection circuit210_1is obtained. This calibration value is applied to the capacitance detection circuits210_2to210_N at the other channels. At this time, at a certain channel CHj, in a case in which a measurement value Djis above an upper limit of a measurement range of the capacitance detection circuit210, the order is determined as CP1<CPj. Conversely, in a case in which the measurement value Djis below the upper limit of the measurement range of the capacitance detection circuit210, the order is determined as CP1>CPj.

In general terms, when a sense pin202_kat a kth channel CHk is a reference pin, and a measurement value Djis above an upper limit of a measurement range of the capacitance detection circuit210at a certain channel CHj, the order is determined as CPk<CPj. Conversely, in a case in which the measurement value Djis below the upper limit of the measurement range of the capacitance detection circuit210, the order is determined as CPk>CPj.

Meanwhile, the measurement value of the capacitance of the reference pin202_kcorresponds to the reference value DREFas a result of calibration. In a case in which a measurement value Djat a certain channel CHj falls within a measurement range of the capacitance detection circuit210and is higher than the reference value DREF, the order may be determined as CPk<CPj. In a case in which the measurement value Djis lower than the reference value DREF, the order may be determined as CPk>CPj.

By repeating an equal operation while sequentially selecting the plurality of sense pins202as a reference pin one by one, the magnitude relationship (order) among the capacitance CP1to CPNof all of the sense pins can be obtained.

Second Obtaining Method

As described above, the capacitance detection circuit210is configured so that it can be calibrated in a hardware form and specifically includes a variable circuit element for calibration. Examples of the variable circuit element include, without limitation, a variable capacitor, a variable resistor, and a variable electric current source. The calibration circuit230controls a characteristic (a capacitance value, a resistance value, or a current value) of the variable circuit element so that a measured capacitance value of each of the sense pins202may approximate the reference value DREF. In this case, the controlled characteristic of the variable circuit element correlates with the capacitance (parasitic capacitance) of the sense pin. Accordingly, the abnormality detection circuit250can determine whether or not there is an abnormality based on a relative relationship among the controlled characteristics of the variable circuit elements.

FIG. 4is a circuit diagram of a configuration example of the capacitance detection circuit210.FIG. 4illustrates a configuration for one channel. The capacitance detection circuit210includes a capacitance-voltage (C/V) conversion circuit214and an A/D converter216. The C/V conversion circuit214converts capacitance into voltage. The A/D converter216converts output voltage of the C/V conversion circuit214into a digital measurement value Di.

The capacitance detection circuit210is provided with a variable capacitor212as a variable circuit element. The variable capacitor212is connected to the sense pin202. Calibration can be performed by optimizing a characteristic (capacitance value) of the variable capacitor212so that variation of the parasitic capacitance CPof the wire104may be canceled out.

A capacitance value CVof the variable capacitor212is high at a channel at which the capacitance value of the parasitic capacitance CPis low while the capacitance value CVof the variable capacitor212is low at a channel at which the capacitance value of the parasitic capacitance CPis high. Accordingly, based on calibrated capacitance values of the variable capacitors212at plural channels, a relative relationship among the capacitance values of the plurality of sense pins can be estimated. Based on a relationship between the estimated order and the expected order, whether the state is normal or abnormal can be determined. Meanwhile, the abnormality detection circuit250may store as an expected order an order of calibrated capacitance values of the variable capacitors212in a normal state.

The variable circuit element is not limited to the capacitor and may be another one depending on the detection type and the circuit configuration of the CNconversion circuit. In a case in which the CNconversion circuit is one that supplies current to the sense pin202, causes capacitance (CP+CS) to be detected to be subject to a predetermined voltage change, and measures capacitance based on the total amount of current flowing in the capacitance at this time, the variable circuit element may be a variable current source supplying current to the sense pin.

Third Obtaining Method

Depending on the magnitude of the parasitic capacitance CPthat can be detected from the sense pin202, the change amount (or a detection sensitivity) of the measurement value D when a capacitance change is generated in the sense pin202differs. That is, the detection sensitivity at each channel correlates with the magnitude of the parasitic capacitance CP. In a third obtaining method, an abnormality is detected based on an order of sensitivities of the plurality of channels.

FIG. 4is referred to. At all of the channels, calibration is performed by the calibration circuit230. The capacitance value CVof the variable capacitor212is optimized so that the measurement value Dimay correspond to the reference value DREF.

Also, the calibration circuit230optimizes gains of the C/V conversion circuits214so that the detection sensitivities of the plurality of channels may be uniform. In this case, the controlled gain at each channel correlates with the parasitic capacitance CP. The abnormality detection circuit250determines whether the state is normal or abnormal by comparing an order of the calibrated gains at the plurality of channels with an expected order.

FIG. 5is a sequence diagram of abnormality detection. An expected value (expected order) of a relative relationship among a plurality of capacitance values is transmitted from the processor300to the controller200(S100). Subsequently, a command to start a diagnosis is transmitted from the processor300to the controller200(S102). In response to the start command, the controller200obtains the relative relationship among the plurality of capacitance values (S104). The controller200compares the relative relationship based on the measurement result with the expected order to determine whether or not there is an abnormality (S106). A flag indicating normality or abnormality at each channel may be stored in a register.

The controller200transmits the diagnostic result to the processor300(S108). Specifically, in a case in which no abnormality is detected, the controller200notifies the processor300of normality. In a case in which an abnormality is detected, the controller200notifies the processor300of abnormality. For this notification, it is preferable to use interrupt. When the processor300receives an interrupt notification of abnormality, the processor300can access the register with use of the I2C interface or the like and obtain a channel at which the abnormality is generated.

Also, the controller200invalidates the channel corresponding to the abnormal sensor and validates the channel corresponding to the normal sensor (S110). In a case in which an abnormality is detected, the processor300may invalidate all of the sensors, or the controller200may let the processor300determine which channel is to be invalidated.

In this example, the expected order is stored in the processor300in a non-volatile manner and is loaded into the controller200. However, the present invention is not limited to this. The controller200may be provided with a non-volatile memory and store the expected order by itself.

Modification Example 1

In the above description, the controller200performs the comparison processing between the relative relationship based on the measurement result and the expected order. However, the present invention is not limited to this. The processor300may perform the comparison processing.FIG. 6is a sequence diagram of abnormality detection according to Modification Example 1.

A command to start a diagnosis is transmitted from the processor300to the controller200(S200). In response to the start command, the controller200obtains a relative relationship among a plurality of capacitance values (S202).

The controller200transmits the relative relationship based on the measurement result to the processor300(S204). The processor300compares the received relative relationship with an expected order to determine whether or not there is an abnormality (S206).

The processor300determines a channel that is to be invalidated based on the comparison result (S208) and transmits to the controller200data indicating the channel to be invalidated (S210). For example, the controller200may include a register for setting validity or invalidity for each channel, and the processor300may access the register for each channel to set validity or invalidity. The controller200invalidates a channel specified by the processor300.

Application

FIG. 7illustrates an electronic device600including the capacitive switch100according to the embodiment. The electronic device600is an OA device or a home appliance, and a multi-function printer is raised as an example here. The electronic device600includes a power supply button602, a start button604, and selection buttons606and608. The power supply button602is touched when the electronic device600is turned on or off. The start button604is touched by the user when the user starts copying or scanning. The selection buttons606and608are touched when the user operates a graphical user interface (GUI) displayed on a display612. The layout and type of these buttons vary in accordance with the type and the function of the electronic device600. In the plurality of buttons602,604,606, and608, the aforementioned sensor electrodes are buried, and the sensor electrodes are controlled by a common controller (not illustrated).