Execution traces

In one or more embodiments, one or more systems, processes, and/or methods may utilize a trace unit that stores trace data via a trace buffer in a memory medium and may utilize a network interface that provides the trace data from the trace buffer to a network. In one example, the network interface may provide the trace data from the trace buffer to the network in response to a trigger. In one instance, the trigger may include a modification of a pointer to an address of the trace buffer. In another instance, the trigger may include an expiration of a timer. In another example, the trace unit may filter the trace data. In one or more embodiments, storing the traced data and providing the trace data to the network may be performed without involving a main processor of an information handling system that includes the trace unit.

BACKGROUND

Field of the Disclosure

This disclosure relates generally to information handling systems and more particularly to utilizing trace units of respective information handling systems.

Description of the Related Art

In the past, software debugging was often performed in real-time. Moreover, when a problem was reported, a person in charge of troubleshooting usually needed to reproduce conditions of the problem and observe the problem to determine one or more of a cause and a fix. This was frequently difficult. This issue spans the information technology industry. In software and/or firmware development, one tool devised to contend with this problem is an execution trace buffer. This is also a dated concept, available with in-circuit emulators and more recently designed into ASICs (application specific integrated circuits) alongside main processors. These tools can generate execution traces, but the execution traces are too large to store locally. Hence, a lot of information from the execution traces is lost, either by not producing enough information in an attempt to reduce an execution trace size or by overwriting information in the execution trace buffer.

SUMMARY

In one or more embodiments, one or more systems, processes, and/or methods may utilize a trace unit that stores trace data via a trace buffer in a memory medium and may utilize a network interface that provides the trace data from the trace buffer to a network. In one example, the network interface may provide the trace data from the trace buffer to the network in response to a trigger. In one instance, the trigger may include a modification of a pointer to an address of the trace buffer. In a second instance, the trace buffer may include a circular queue, and the point to the address of the trace buffer may store an address of a tail of the circular queue. In another instance, the trigger may include an expiration of a timer that expires after an amount of time transpires. In another example, the trace unit may filter the trace data based on at least one of a subset of processor instructions and at least one event before the trace unit stores the trace data via the trace buffer. In one or more embodiments, the trace unit may store the trace data via the trace buffer, without involving a main processor of an information handling system that includes the trace unit, and the network interface may provide the trace data from the trace buffer to the network, without involving the main processor.

DETAILED DESCRIPTION

As used herein, a reference numeral followed by a letter refers to a specific instance of an element and the numeral only form of the reference numeral refers to the collective element. Thus, for example, device ‘12A’ refers to an instance of a device class, which may be referred to collectively as devices ‘12’ and any one of which may be referred to generically as a device ‘12’.

In one or more embodiments, a trace unit may capture trace data from various sources of an information handling system. For example, the trace unit185may capture trace data from one or more of a processor of the information handling system, system trace messaging, a management controller, and architectural event trace, among others. In one or more embodiments, trace data may chronicle one or more interactions between hardware and software and/or one or more behaviors of one or more interactions of hardware. In one example, the trace data may chronicle one or more instruction execution traces of one or more cores of a processor of the information handling system. In another example, the trace data may chronicle one or more interrupt traces of the information handling system.

In one or more embodiments, a trace unit may store trace data in a memory medium of the information handling system. For example, the trace unit may store trace data in one or more buffers of the memory medium. In one or more embodiments, remote direct memory access (RDMA) may be utilized with the one or more buffers of the memory medium in transferring, via a network, the trace data to another information handling system and/or to a network attached storage device and/or system. For example, transferring the trace data to another information handling system and/or to the network attached storage device and/or system may permit additional trace data to be stored via the one or more buffers. For instance, capturing the trace data may not be delayed and/or discarding the trace data and replacing the trace data with the additional trace data may not occur if the trace data is transferred to another information handling system and/or to the network attached storage device and/or system. In this fashion, the trace data may span time periods of hours or days, according to one or more embodiments.

Turning now toFIG. 1, an exemplary information handling system is illustrated, according to one or more embodiments. An information handling system (IHS)110may include a hardware resource or an aggregate of hardware resources operable to compute, classify, process, transmit, receive, retrieve, originate, switch, store, display, manifest, detect, record, reproduce, handle, and/or utilize various forms of information, intelligence, or data for business, scientific, control, entertainment, or other purposes, according to one or more embodiments. For example, IHS110may be a personal computer, a desktop computer system, a laptop computer system, a server computer system, a mobile device, a personal digital assistant (PDA), a consumer electronic device, an electronic music player, an electronic camera, an electronic video player, a network storage device, or another suitable device and may vary in size, shape, performance, functionality, and price. In one or more embodiments, components of IHS110may include one or more storage devices, one or more communications ports for communicating with external devices as well as various input and output (I/O) devices, such as a keyboard, a mouse, and a video display, among others. In one or more embodiments, IHS110may include one or more buses operable to transmit communication between or among two or more hardware components. In one example, a bus of IHS110may include one or more of a memory bus, a peripheral bus, and a local bus, among others. In another example, a bus of IHS110may include one or more of a Micro Channel Architecture (MCA) bus, an Industry Standard Architecture (ISA) bus, an Enhanced ISA (EISA) bus, a Peripheral Component Interconnect (PCI) bus, HyperTransport (HT) bus, an inter-integrated circuit (I2C) bus, a serial peripheral interface (SPI) bus, a low pin count (LPC) bus, a universal serial bus (USB), a system management bus (SMBus), and a Video Electronics Standards Association (VESA) local bus, among others.

In one or more embodiments, IHS110may include firmware that controls and/or communicates with one or more hard drives, network circuitry, one or more memory devices, one or more I/O devices, and/or one or more other peripheral devices. For example, firmware may include software embedded in an IHS component utilized to perform tasks. In one or more embodiments, firmware may be stored in non-volatile memory, such as storage that does not lose stored data upon loss of power. In one example, firmware associated with an IHS component may be stored in non-volatile memory that is accessible to one or more IHS components. In another example, firmware associated with an IHS component may be stored in non-volatile memory that may be dedicated to and includes part of that component. For instance, an embedded controller may include firmware that may be stored via non-volatile memory that may be dedicated to and includes part of the embedded controller.

As shown, IHS110may include a processor120, a volatile memory medium150, non-volatile memory media160and170, an I/O subsystem175, and network interface180A and180B. As illustrated, volatile memory medium150, non-volatile memory media160and170, I/O subsystem175, and network interfaces180A and180B may be communicatively coupled to processor120.

In one or more embodiments, one or more of volatile memory medium150, non-volatile memory media160and170, I/O subsystem175, and network interfaces180A and180B may be communicatively coupled to processor120via one or more buses, one or more switches, and/or one or more root complexes, among others. In one example, one or more of volatile memory medium150, non-volatile memory media160and170, I/O subsystem175, and network interfaces180A and180B may be communicatively coupled to processor120via one or more PCI-Express (PCIe) root complexes. In a second example, one or more of I/O subsystem175and network interfaces180A and180B may be communicatively coupled to processor120via one or more PCIe switches. In another example, one or more of volatile memory medium150, non-volatile memory media160and170, I/O subsystem175, and network interfaces180A and180B may be communicatively coupled to processor120via a platform controller hub.

In one or more embodiments, term “memory medium” may mean a “storage device”, a “memory”, a “memory device”, “tangible computer readable storage medium”, and/or “computer-readable medium”. For example, computer-readable media may include, without limitation, storage media such as a direct access storage device (e.g., a hard disk drive, a floppy disk, etc.), a sequential access storage device (e.g., a tape disk drive), a compact disk (CD), a CD-ROM, a digital versatile disc (DVD), a random access memory (RAM), a read-only memory (ROM), an electrically erasable programmable read-only memory (EEPROM), and/or a flash memory, a solid state drive (SSD), or any combination of the foregoing, among others.

In one or more embodiments, one or more protocols may be utilized in transferring data to and/or from a memory medium. For example, the one or more protocols may include one or more of small computer system interface (SCSI), Serial Attached SCSI (SAS) or another transport that operates with the SCSI protocol, advanced technology attachment (ATA), serial ATA (SATA), advanced technology attachment packet interface (ATAPI), serial storage architecture (SSA), integrated drive electronics (IDE), or any combination thereof, among others.

Volatile memory medium150may include volatile storage such as, for example, RAM, DRAM (dynamic RAM), EDO RAM (extended data out RAM), SRAM (static RAM), etc. One or more of non-volatile memory media160and170may include nonvolatile storage such as, for example, a read only memory (ROM), a programmable ROM (PROM), an erasable PROM (EPROM), an electrically erasable PROM, NVRAM (non-volatile RAM), ferroelectric RAM (FRAM), a magnetic medium (e.g., a hard drive, a floppy disk, a magnetic tape, etc.), optical storage (e.g., a CD, a DVD, a BLU-RAY disc, etc.), flash memory, a SSD, etc. In one or more embodiments, a memory medium can include one or more volatile storages and/or one or more nonvolatile storages.

In one or more embodiments, network interface180may be utilized in communicating with one or more networks and/or one or more other information handling systems. In one example, network interface180may enable IHS110to communicate via a network utilizing a suitable transmission protocol and/or standard. In a second example, network interface180may be coupled to a wired network. In a third example, network interface180may be coupled to an optical network. In another example, network interface180may be coupled to a wireless network.

In one or more embodiments, network interface180may be communicatively coupled via a network to a network storage resource. For example, the network may be implemented as, or may be a part of, a storage area network (SAN), personal area network (PAN), local area network (LAN), a metropolitan area network (MAN), a wide area network (WAN), a wireless local area network (WLAN), a virtual private network (VPN), an intranet, an Internet or another appropriate architecture or system that facilitates the communication of signals, data and/or messages (generally referred to as data). For instance, the network may transmit data utilizing a desired storage and/or communication protocol, including one or more of Fibre Channel, Frame Relay, Asynchronous Transfer Mode (ATM), Internet protocol (IP), other packet-based protocol, Internet SCSI (iSCSI), or any combination thereof, among others.

In one or more embodiments, processor120may execute processor instructions in implementing one or more systems, flowcharts, methods, and/or processes described herein. In one example, processor120may execute processor instructions from one or more of memory media150-170in implementing one or more systems, flowcharts, methods, and/or processes described herein. In another example, processor120may execute processor instructions via network interface180in implementing one or more systems, flowcharts, methods, and/or processes described herein.

In one or more embodiments, processor120may include one or more of a system, a device, and an apparatus operable to interpret and/or execute program instructions and/or process data, among others, and may include one or more of a microprocessor, a microcontroller, a digital signal processor (DSP), an application specific integrated circuit (ASIC), and another digital or analog circuitry configured to interpret and/or execute program instructions and/or process data, among others. In one example, processor120may interpret and/or execute program instructions and/or process data stored locally (e.g., via memory media150-170and/or another component of IHS110). In another example, processor120may interpret and/or execute program instructions and/or process data stored remotely (e.g., via a network storage resource).

In one or more embodiments, I/O subsystem175may represent a variety of communication interfaces, graphics interfaces, video interfaces, user input interfaces, and/or peripheral interfaces, among others. For example, I/O subsystem175may include one or more of a touch panel and a display adapter, among others. For instance, a touch panel may include circuitry that enables touch functionality in conjunction with a display that is driven by a display adapter.

As shown, non-volatile memory medium160may include an operating system (OS)162, and applications (APPs)164-168. In one or more embodiments, one or more of OS162and APPs164-168may include processor instructions executable by processor120. In one example, processor120may execute processor instructions of one or more of OS162and APPs164-168via non-volatile memory medium160. In another example, one or more portions of the processor instructions of the one or more of OS162and APPs164-168may be transferred to volatile memory medium150, and processor120may execute the one or more portions of the processor instructions of the one or more of OS162and APPs164-168via volatile memory medium150.

As illustrated, non-volatile memory medium170may include information handling system firmware (IHSFW)172. In one or more embodiments, IHSFW172may include processor instructions executable by processor120. For example, IHSFW172may include one or more structures and/or functionalities of one or more of a basic input/output system (BIOS), an Extensible Firmware Interface (EFI), a Unified Extensible Firmware Interface (UEFI), and an Advanced Configuration and Power Interface (ACPI), among others. In one instance, processor120may execute processor instructions of IHSFW172via non-volatile memory medium170. In another instance, one or more portions of the processor instructions of IHSFW172may be transferred to volatile memory medium150, and processor120may execute the one or more portions of the processor instructions of IHSFW172via volatile memory medium150.

As shown, processor120may include a trace unit185. For example, trace unit185may be or include an Intel trace hub. In one or more embodiments, a platform controller hub (not specifically illustrated) may include trace unit185. In one example, the platform controller hub may be external to processor120. In another example, processor120and one or more components of IHS110may be included in a system-on-chip (SoC). For instance, the SoC may include processor120and the platform controller hub.

In one or more embodiments, trace unit185may capture trace data from various sources of IHS110. For example, trace unit185may capture trace data from one or more of system trace messaging (STM), a management controller, and architectural event trace (AET), among others. For instance, the management controller may be or include an Intel Management Engine. In one or more embodiments, trace unit185may capture the trace data that may chronicle and/or provide one or more interactions between hardware and software and/or one or more behaviors of the one or more interactions of hardware. For example, trace unit185may provide instruction execution trace data of one or more cores of processor120.

As illustrated, volatile memory medium150may store a trace region header152and a trace buffer154. In one or more embodiments, IHSFW172may allocate one or more of trace region header152and trace buffer154. In one or more embodiments, RDMA may be utilized to transfer trace data captured by trace unit185to another IHS via a network. For example, utilizing RDMA may provide and/or implement zero-copy networking. For instance, network interface180may transfer trace data from trace buffer154to a network. In one or more embodiments, utilizing RDMA may eliminate copying trace data from trace buffer154to one or more data buffers of OS162and providing the trace data from the one or more data buffers of OS162to network interface180. For example, copying the trace data from trace buffer154to the one or more data buffers of OS162and providing the trace data from the one or more data buffers of OS162to network interface180may involve utilizing processor120. For instance, utilizing processor120may involve one or more OS162, one or more caches of processor120, and one or more context switches, among others.

In one or more embodiments, utilizing RDMA to transfer trace data captured by trace unit185to another IHS via a network may provide one or more advantages. In one example, a first advantage may include not involving processor120(e.g., a main processor). In one instance, trace data may include one or more metrics and/or performance information associated with processor120, and utilizing processor120in transferring the trace data may alter the one or more metrics and/or performance information associated with processor120. In a second instance, trace data may include one or more metrics and/or performance information associated with one or more caches of processor120, and utilizing the one or more caches of processor120in transferring the trace data may alter the one or more metrics and/or performance information associated with the one or more caches of processor120. In a second example, a second advantage may include not involving OS162. In one instance, trace data may include one or more metrics and/or performance information associated with OS162, and utilizing OS162in transferring the trace data may alter the one or more metrics and/or performance information associated with OS162. In another instance, involving OS162to transfer the trace data from trace buffer154to network interface may require additional time. In another example, another advantage may include permitting trace unit185to another IHS via the network in parallel, while one or more other components of IHS110may perform one or more operations.

In one or more embodiments, trace region header152may be utilized by network interface180. For example, trace region header152may include metadata that may be utilized by network interface180in accessing trace data stored via trace buffer154. In one or more embodiments, trace region header152may store one or more pointers that store one or more addresses of a trace buffer. In one example, the trace buffer may store a circular queue that may store trace data, and a first pointer of the one or more pointers may store an address of a tail of the circular queue. For instance, trace unit185may change the address stored via the first pointer when trace unit185stores trace data to the circular queue. In another example, the trace buffer may store a circular queue that may store trace data, and a second pointer of the one or more pointers may store an address of a head of the circular queue. For instance, network interface180may change the address stored via the second pointer when network interface180retrieves trace data from the circular queue. In one or more embodiments, IHSFW172may be utilized in configuring one or more of trace region header152and network interface180. In one or more embodiments, trace buffer154may be or include a circular queue. For example, network interface180may access the circular queue to for newly added trace data. For instance, network interface180may provide the newly added trace data from the circular queue to the network.

In one or more embodiments, trace unit185may be configured to filter trace data. In one example, trace unit185may filter the trace data based on a subset of processor instructions. For instance, trace unit185may capture the trace data in accordance with a subset of instructions of processor120. In another example, trace unit185may filter the trace data based on one or more events. For instance, trace unit185may capture the trace data in accordance with one or more interrupts and/or one or more message signal interrupts, among others. In one or more embodiments, trace unit185filtering trace data may permit filtered trace data to be stored via IHS110. For example, the filtered trace data to be stored via non-volatile memory medium160.

In one or more embodiments, two or more trace buffers may utilize different network interfaces. For example, trace unit185may capture trace data associated with two or more processor cores, and the trace data associated with each core of the two or more processor cores may be stored in a respective trace buffer. In one instance, first one or more respective trace buffers may be associated with a RDMA system, process, and/or method that utilizes network interface180A. In a second instance, second one or more respective trace buffers may be associated with a RDMA system, process, and/or method that utilizes network interface180B. In one or more embodiments, IHS110may include multiple processors120(not explicitly illustrated). In one example, processor120may include multiple processor cores. In another example, each of multiple processors120(not explicitly illustrated) may include a single processor core.

Turning now toFIG. 2, an exemplary computing environment is illustrated, according to one or more embodiments. As shown, information handling systems (IHSs)110A-110G may be coupled to a network210. In one or more embodiments, network210may include a wired network, a wireless network, an optical network, or a combination of the foregoing, among others. For example, network210may include and/or be coupled to various types of communications networks. For instance, network210may include and/or be coupled to a LAN, a WAN (e.g., a private WAN, a corporate WAN, a public WAN, etc.), an Internet, a public switched telephone network (PSTN), a cellular telephone network, a satellite telephone network, or a combination of the foregoing, among others.

As shown, one or more storages220may be communicatively coupled an IHS110. For example, a storage220E may be communicatively coupled to IHS110E, storages220FA-220FC may be communicatively coupled to IHS110F, and storages220GA and220GB may be communicatively coupled to IHS110G. In one or more embodiments, an IHS110may include one or more one or more storages220.

In one or more embodiments, one or more of IHSs110A-110D may provide data to one or more of IHSs110E-110G via network210. For example, one or more of IHSs110E-110G may store the data via one or more respectively communicatively coupled storage210. For instance, the data may include trace data from one or more respective trace units185of one or more of IHSs110A-110D.

In one or more embodiments, one or more of IHSs110E-110G and storages210E,210FA-210FC,210GA, and210GB may form one or more of a SAN and a NAS, among others. In one or more embodiments, one or more of IHSs110E-110G and storages210E,210FA-210FC,210GA, and210GB may be utilized in providing a storage service. For example, the storage service may cater to receiving and storing trace data from one or more IHSs. In one instance, the service may be offered for a fee. In another instance, the service may be offered as a part of a membership (e.g., a membership benefit).

In one or more embodiments, the service may be or include a metered service. In one example, a reservation of a trace unit may be metered. In another example, the metered service may include network traffic. In one or more embodiments, the service may be dynamically enabled. For example, memory (e.g., storage space of volatile memory150) and a device driver for network interface180may be included in the metered service. In one or more embodiments, the service may be or include a security repudiation service. For example, trace unit185may capture one or more events that indicate one or more intrusions. For instance, the service may filter events that are indicative of one or more intrusions.

In one or more embodiments, stored trace data may be utilized in one or more analyses. For example, the stored trace data may be utilized in profiling a set of processor instructions. In one instance, a profiler may utilize the stored trace data in profiling one or more of APPs164-168, among others. In another instance, the profiler may utilize the stored trace data in profiling OS162, among others. In one or more embodiments, a profiler may utilize stored trace data in measuring one or more of an amount of memory, an amount of time, a frequency of instruction usage, and a duration of a subroutine, among others. For example, the profiler may utilize one or more of an event-based technique and a statistical technique in analyzing the stored trace data.

Turning now toFIG. 3, multiple trace buffers are illustrated, according to one or more embodiments. As shown, volatile memory medium150may include trace region headers152A-152D and corresponding trace buffers154A-154D. As illustrated, non-volatile memory medium160may include trace region headers152A-152D and corresponding trace buffers154A-154D. In one or more embodiments, trace unit185may store trace data via one or more of trace buffers154A-154D. In one example, trace unit185may store trace data associated with a first processor core via trace buffer154A and store trace data associated with a second processor core, different from the first processor core, via trace buffer154B. In a second example, trace unit185may store trace data associated with one or more events via trace buffer154C. In another example, trace unit185may store filtered trace data via trace buffer154D.

In one or more embodiments, one or more of trace buffers154A-154D may be associated with a network interface. In one example, trace buffers154A-154C may be associated with network interface180A. For instance, network interface180A may be included in a RDMA system, process, and/or method that includes utilizing trace buffers154A-154C. In a second example, trace buffer154D may be associated with network interface180B. For instance, network interface180B may be included in a RDMA system, process, and/or method that includes utilizing trace buffer154D. In another example, trace buffers154A and154B may be associated with network interface180A, and trace buffers154C and154D may be associated with network interface180B. For instance, network interface180A may be included in a RDMA system, process, and/or method that includes utilizing trace buffers154A and154B, and network interface180B may be included in a RDMA system, process, and/or method that includes utilizing trace buffers154D and154D.

Turning now toFIG. 4, a method of operating an information handling system is illustrated, according to one or more embodiments. At410, a trace unit may capture trace data. For example, trace unit185may capture trace data from various sources of IHS110. At415, the trace unit may store the trace data via a trace buffer. For example, trace unit185may store the trace data via trace buffer154. In one or more embodiments, trace unit185may store the trace data via multiple trace buffers. For example, trace unit185may store the trace data via two or more of trace buffers154A-154D.

At420, at least one network interface may be triggered to retrieve the trace data via the trace buffer. In one example, network interface180A may be triggered to retrieve the trace data via trace buffer154. In a second example, network interface180B may be triggered to retrieve the trace data via trace buffer154. In a third example, network interface180A may be triggered to retrieve the trace data via trace buffer154A. In another example, network interface180B may be triggered to retrieve the trace data via trace buffer154D.

In one or more embodiments, triggering the at least one network interface to retrieve the trace data via the trace buffer may include modifying a pointer to an address of the trace buffer. For example, the trace buffer may include a circular queue that may store the trace data, and the address of the trace buffer may be an address of a tail of the circular queue. For instance, the address of the tail of the circular queue may be changed (e.g., changed by trace unit185) as new trace data is stored via the circular queue. In one or more embodiments, triggering the at least one network interface to retrieve the trace data via the trace buffer may include modifying trace region header152. For example, trace region header152may store an address of a tail of a circular queue stored via trace buffer154. For instance, the address of the tail of the circular queue may be changed (e.g., changed by trace unit185) as new trace data is stored the circular queue.

In one or more embodiments, triggering the at least one network interface to retrieve the trace data via the trace buffer may include a timer expiring after an amount of time transpires. For example, the timer expiring may trigger the at least one network interface to retrieve the trace data via the trace buffer. In one or more embodiments, the amount of time that transpires may be modified to determine an appropriate amount of time to retrieve data from the trace buffer. For example, after the timer expiring after the amount of time transpires, an amount of the trace data stored via the trace buffer may be determined. In one instance, if the amount of the trace data stored via the trace buffer is above a threshold (e.g., a high-water mark, an optimal capacity threshold, etc.), the amount of time may be decreased. In another instance, if the amount of the trace data stored via the trace buffer is below the threshold, the amount of time may be increased. In one or more embodiments, trace unit185may determine the amount of data stored via the trace buffer after the timer expires and increase or decrease the amount of time until the timer expires again.

In one or more embodiments, an amount of time that transpires until the timer expires may include a predicted amount of time that trace unit185utilizes in storing trace data from processor120. In one example, processor120may include multiple cores, and the amount of time that trace unit185utilizes in storing trace data from processor120may be modified and/or adjusted by a number of the multiple cores. In another example, the amount of time that trace unit185utilizes in storing trace data from processor120may be modified and/or adjusted by one or more clock rates (e.g., frequencies) of respective one or more cores of processor120.

At425, the at least one network interface may provide the trace data from the trace buffer to a network. For example, network interface180may provide the trace data from trace buffer154to network210. In one instance, network interface180A may provide the trace data from trace buffer154to network210. In a second instance, network interface180B may provide the trace data from trace buffer154to network210. In a third instance, network interface180A may provide the trace data from trace buffer154B to network210. In another instance, network interface180B may provide the trace data from trace buffer154D to network210.

In one or more embodiments, the method ofFIG. 4may be repeated. For example, the method ofFIG. 4may be repeated in capturing new trace data. In one instance, the method ofFIG. 4may be repeated a number of times. In another instance, the method ofFIG. 4may be repeated a number until it explicitly halted.

In one or more embodiments, one or more of the method and/or process elements and/or one or more portions of a method and/or processor elements may be performed in varying orders, may be repeated, or may be omitted. Furthermore, additional, supplementary, and/or duplicated method and/or process elements may be implemented, instantiated, and/or performed as desired, according to one or more embodiments. Moreover, one or more of system elements may be omitted and/or additional system elements may be added as desired, according to one or more embodiments.