CHIP MODULE AND METHOD OF FORMING SAME

A chip module (40a, 40b, 62) is disclosed as including an integrated-circuit (IC) chip (34, 64), a first flexible substrate layer (18) with a number of holes (28), a second adhesive substrate layer (16) with a number of holes (26), and a third substrate layer (14) made of an electrically conductive material, the second substrate layer being sandwiched between and fixedly engaged with the first and third substrate layers, the holes of the first substrate layer and the holes of the second substrate layer being aligned with each other to form a number of cavities (12, 66) each receiving at least a part of the IC chip.

FIELD OF THE INVENTION

This invention relates to a chip module, such as an integrated-circuit (IC) chip module, a chip module card inlay with such a chip module, a method of forming such a chip module, and a method of forming such a chip module card inlay.

BACKGROUND OF THE INVENTION

Chip module card inlays are frequently used for the production of smart cards, e.g. credit cards, identity cards, etc. Such cards are used frequently, and may be subjected to warping and bending when carried around by the users or in use. Such warping and bending of the cards may adversely affect the structural integrity and proper functioning of the cards. Furthermore, conventional chip modules in the smart card industry do not provide a flat and uniform top surface, which adversely affect the manufacturing process of chip module card inlays and smart cards. In particular, chip modules are conventionally of a two-level stepped structure or formed with an uneven top housing, as in the chip on board method.

It is thus an object of the present invention to provide a chip module, a chip module card inlay, a method of forming a chip module, and a method of forming a chip module card inlay in which the aforesaid shortcoming is mitigated, or at least to provide a useful alternative to the trade and public.

SUMMARY OF THE INVENTION

According to a first aspect of the present invention, there is provided a chip module including an integrated-circuit (IC) chip, a first substrate layer made at least partly of a flexible material and with a first hole, a second substrate layer made at least partly of an adhesive material and with a second hole, and a third substrate layer made at least partly of an electrically conductive material, wherein said second substrate layer is sandwiched between and fixedly engaged with said first substrate layer and said third substrate layer, wherein said first hole of said first substrate layer and said second hole of said second substrate layer are aligned with each other to form a first cavity, and wherein at least a first part of said IC chip is received within said first cavity.

According to a second aspect of the present invention, there is provided a chip module card inlay including at least one chip module, said chip module including an integrated-circuit (IC) chip, a first substrate layer made at least partly of a flexible material and with a first hole, a second substrate layer made at least partly of an adhesive material and with a second hole, and a third substrate layer made at least partly of an electrically conductive material, wherein said second substrate layer is sandwiched between and fixedly engaged with said first substrate layer and said third substrate layer, wherein said first hole of said first substrate layer and said second hole of said second substrate layer are aligned with each other to form a first cavity, and wherein at least a first part of said IC chip is received within said first cavity.

According to a third aspect of the present invention, there is provided a method of forming a chip module including providing a first substrate layer made at least partly of a flexible material and with a plurality of first holes, providing a second substrate layer made at least partly of an adhesive material and with a plurality of second holes, providing a third substrate layer made at least partly of an electrically conductive material, aligning said first holes of said first substrate layer with said second holes of said second substrate layer to form a plurality of first cavities, sandwiching said second substrate layer between said first substrate layer and said third substrate layer, fixedly engaging said first substrate layer, said second substrate layer and said third substrate layer to form a first layered structure, fixedly engaging at least a first part of an integrated-circuit (IC) chip within one of said first cavities of said first layered structure, and cutting out at least one chip module from said first layered structure fixedly engaged with said IC chip.

According to a fourth aspect of the present invention, there is provided a method of forming a chip module card inlay including forming at least one chip module including providing a first substrate layer made at least partly of a flexible material and with a plurality of first holes, providing a second substrate layer made at least partly of an adhesive material and with a plurality of second holes, providing a third substrate layer made at least partly of an electrically conductive material, aligning said first holes of said first substrate layer with said second holes of said second substrate layer to form a plurality of first cavities, sandwiching said second substrate layer between said first substrate layer and said third substrate layer, fixedly engaging said first substrate layer, said second substrate layer and said third substrate layer to form a first layered structure, fixedly engaging at least a first part of an integrated-circuit (IC) chip within one of said first cavities of said first layered structure, and cutting out at least one chip module from said first layered structure fixedly engaged with said IC chip.

DESCRIPTION OF THE EMBODIMENTS

FIG.1shows a length of chip housing carrier10formed of five substrate layers for forming a chip module and a chip module card inlay according to an embodiment of the present invention. The chip housing carrier10is elongate in shape and may be wound around itself in a reel form, and then unwound for subsequent steps for forming the chip module and chip module card inlay. Along the chip housing carrier10are formed a number of cavities12. The cavities12may be of a square, rectangular, or circular transverse cross sectional shape. As shown as an example inFIG.1, the cavities12are arranged in three rows, although it should be understood that the chip housing carrier10may be formed with other numbers of rows of cavities12.

FIG.2is a disassembled perspective view of the length of chip housing carrier10shown inFIG.1. This chip housing carrier10according to this embodiment is made of five substrate layers14,16,18,20,22stacked one on top of the other. It should be understood that, according to the present invention, the chip housing carrier10may be formed of a different number of substrate layers, e.g. only of the substrate layers14,16,18.

The five substrate layers14,16,18,20and22are shown separately inFIG.3. The substrate layer14is made of copper (or other electrically conductive material(s)). Three rows of slits24are formed along the length of the substrate layer14. On top of the substrate layer14is the substrate layer16with three rows of holes26along its length. The substrate layer16is made of an adhesive material. On top of the substrate layer16is the substrate layer18with three rows of holes28along its length. The substrate layer18is flexible, e.g. being made of a flexible material, such as one or more of polyimide (PI), polyethylene terephthalate (PET), and a glass-reinforced epoxy laminate material (such as “FR-4”, which is a composite material composed of woven fiberglass cloth with an epoxy resin binder that is flame resistant).

On top of the substrate layer18is the substrate layer20with three rows of holes30along its length. The substrate layer20is made of an adhesive material. On top of the substrate layer20is the substrate layer22with three rows of holes32. The substrate layer22is made of or electro-plated with one or more electrically conductive materials, e.g. copper and nickel.

The holes26,28,30,32of the respective substrate layers16,18,20,22are of the same size and shape, and are arranged such that when the substrate layers16,18,20,22are duly assembled and stacked one on top of another, their respective holes26,28,30,32are aligned with one another such that they collectively form a number of cavities12extending through the substrate layer16to the substrate layer22. The substrate layer16are positioned under and in contact with the substrate layer14such that a respective slit24is positioned below each cavity12formed by a row of the holes26,28,30,32aligned with one another.

FIG.4shows an integrated-circuit (IC) chip34. The IC chip34may be a contactless chip or other types of chip. In electronics manufacturing, integrated circuit (IC) packaging is the final stage of semiconductor device fabrication, in which the block of semiconductor material is encapsulated in a supporting case (also known as a “package”) that prevents physical damage and corrosion. A common plastic used for making the package is epoxy-cresol-novolak (also called “epoxy-cresol-novolac”). In the IC chip34, two electrically conductive legs36are shown as extending and leading from a package38of the IC chip34.

Turning toFIG.5, such shows a length of chip housing carrier10with a number of cavities12formed by the alignment of the holes26,28,30,32of the respective substrate layers16,18,20,22with the substrate layer14forming a bottom. The substrate layers14,16,18,20,22are then laminated to fixedly engaged with one another to form the chip housing carrier10, which is of a layered-structure. The IC chip34is positioned within one of the cavities12such that the IC chip34is fully received within the cavity12with the legs36contacting the substrate layer14as to establish electrical and physical connection between the legs36(and thus the IC chip34) with the substrate layer14. The depth of the cavity12formed by the alignment of the holes26,28,30,32of the substrate layers16,18,20,22is no shorter than the total height h of the IC chip34, with a part of the IC chip34received within the cavity formed by the holes26,28and another part of the IC chip34received within the cavity formed by the holes30,32.

When the IC chip34is received within the cavity12(and with its legs36physically and electrically connected with the substrate layer14), an adhesive (glue) is filled into any space within the cavity12not occupied by the IC chip34, so as to enhance the fixed engagement of the IC chip34within the cavity12and with the chip housing carrier10.

When the IC chips34are fixedly engaged with and received within the cavities12of the chip housing carrier10, a plurality of chip modules40a,40bare cut out from the chip housing carrier10, e.g. by die-cutting. Each of the chip modules40a,40bcomprises an IC chip34fixedly received within and engaged with the substrate layers14,16,18,20,22, with the substrate layer14fixedly engaged with the legs36of the IC chip34. The chip modules40a,40bdiffer with each other in their respective shape, in that the chip module40ais in the shape of a generally rectangular prism, and the chip module40bis in the shape of a generally elliptical cylinder. Generally speaking, the chip modules40a,40baccording to the present invention may be in the shape of a prism, a cylinder, or an elliptical cylinder, more particularly, a right prism, a right cylinder, or a right elliptical cylinder, all of a relatively short thickness/height. The two opposite major surfaces of the chip module40a(of which only one of which,41a, is shown inFIG.5) are planar, of the same shape and parallel with each other. Similarly, the two opposite major surfaces of the chip module40b(of which only one of which,41b, is shown inFIG.5) are planar, of the same shape and parallel with each other. Thus, the chip modules40a,40bare not in of a two-level stepped structure or formed with an uneven top housing, as in the case of conventional chip modules.

FIGS.6to9shows steps of forming a chip module card inlay, using the chip module40aas an example.

As shown inFIG.6, the chip module40ais positioned within a hole42of a substrate layer44, which may be made of a plastic material, such as polycarbonate (PC), polyvinyl chloride (PVC), or polyethylene terephthalate glycol (PETG). In the case of the conventional two-level stepped structured chip modules, at least two such substrate layers (also called “compensation layers”) are required, to cater for the different shapes of the two levels. On the other hand, as the chip modules according to the present invention may be in the shape of a prism, a cylinder, or an elliptical cylinder, more particularly, a right prism, a right cylinder, or a right elliptical cylinder, only one compensation layer is required. This facilitates the production of the chip module card inlays (to be discussed below) and subsequently the smart cards.

As further shown inFIG.7, an electrically conductive wire46(e.g. made of copper) is embedded on a major surface48of the substrate layer44. The wire46may be embedded on the major surface48of the substrate layer44for several rounds, e.g. to form an antenna. Two free ends of the wire46are bonded with the chip module40a, e.g. by thermo-bonding.

The substrate layer44is sandwiched between two protective substrate layers50,52. The two substrate layers50,52may also be made of PC, PVC or PETG. The substrate layers44,50,52thus stacked together with one another are then laminated so as to fixedly engage the substrate layers44,50,52to form a chip module card inlay54, which is in a layered-structure.

FIG.10shows a sectional view of a chip module card inlay60with a chip module62. The chip module62has an IC chip64received within a cavity66formed of alignment of the holes26,28of the respective substrate layers16,18. The legs36of the IC chip64are connected physically and electrically with the substrate layer14on top of the substrate layer16. The substrate layer16is thus sandwiched between and fixedly engaged with the substrate layers14,18.

The chip module62is received within a hole68of an inner substrate layer70, and is electrically connected (e.g. by bonding) to an antenna formed of an electrically conductive wire72(which may be made of copper). The inner substrate layer70is sandwiched between two outer substrate layers74,76. The substrate layers70,74,76are laminated and thus fixedly engaged with one another to form the chip module card inlay60in a layered structure. The depth of the cavity66formed by the alignment of the holes26,28of the substrate layers16,18is no shorter than the total height of the IC chip64.

It should be understood that the above only illustrates and describes examples whereby the present invention may be carried out, and that modifications and/or alterations may be made thereto without departing from the spirit of the invention.