Method and arrangement for regenerating timing information from a pulse train of the NRZ-type

The present invention relates to a method and to an arrangement for regenerating timing pulses from an information-carrying pulse train of the NRZ-type. The method can be used in a telecommunication system to create a timing signal which is synchronous with the information-carrying pulse train, so as to enable the pulses of the generated timing signal to be used as clock pulses when reading information from the original pulse train. The information-carrying pulse train is differentiated and rectified in a known manner, wherein the rectified pulse train signal will contain solely positive or solely negative pulses originating from level shifts of the pulse train signal. A commutating filter is given a resonance frequency which corresponds to the frequency of the NRZ-signal, and the rectified pulse train signal is supplied to the commutating filter, which generates timing pulses during those periods in which no pulses occur in the rectified pulse train signal. The commutating filter produces a timing signal which contains one pulse for each bit in the original information-carrying pulse train.

TECHNICAL FIELD 
The invention relates to a method and an arrangement for regenerating 
timing pulses from an information-carrying pulse train of the NRZ-type. 
PRIOR ART 
One known method of transmitting information digitally in a pulse train is 
the NRZ-method (Non Return to Zero) and a modification thereof, namely 
NRZ1. In the NRZ-method, a binary one is represented by high level and a 
binary zero by low level, whereas in the NRZ.sub.1 -method, a binary one 
is represented by a shift in levels (low to high and high to low 
respectively), whereas a binary zero is represented by the level which 
remains unchanged (low or high). 
Since the mutually sequential bits in the binary coded message transmitted 
are not necessarily represented by a pulse, it is necessary to regenerate 
timing pulses which can be used in the separate bit interval to read the 
signal level in the binary coded message. Since quite a number of bit 
intervals can pass between the level shifts that can be used to regenerate 
said timing pulses, slots will occur in the regenerated timing signal when 
timing pulses are generated solely upon the occurrence of level shifts. 
It is known, for instance, from Swedish patent specification 312822, the 
German Published patent application 21 41 445 and the U.S. patent 
specification 2,957,045 to generate a continuous clock pulse train, by 
derivating the incoming pulses and delivering the derivated pulses to an 
oscillation circuit of high Q-value. The oscillation circuit, which has a 
resonance frequency that coincides with the frequency of the incoming 
pulses, is excited by the pulses and produces a continuous wave which 
subsequent to pulse formation and phase adjustment can be used as clock 
pulses when reading the binary coded message. 
It is also known to use a phase locked loop (PLL-circuit) instead of an 
LC-type oscillation circuit, in order to regenerate the timing of the 
information-carrying pulse train of the NRZ-type. 
DISCLOSURE OF THE INVENTION 
The known technique for regenerating timing pulses or clock pulses from the 
information-carrying pulse train requires the presence of a high-quality 
resonator for the timing pulse frequency in both the oscillation circuit 
and in the PLL-circuit. A resonator of this kind is expensive and normally 
has to be trimmed when fitted. Alternatively, a SAW-filter can be used, 
although such a filter is highly expensive. 
The inventive method and arrangement solves these problems, by regenerating 
timing pulses from the information-carrying pulse train with the aid of a 
commutating filter. The inventive arrangement is applied in a 
telecommunication system, for instance in a telephone exchange having an 
exchange clock, said pulse train having a frequency which corresponds to 
the exchange clock frequency with any desired phase position. In addition 
to a derivating and rectifying circuit, the arrangement also includes the 
aforesaid commutating filter, which is operative to regenerate timing 
pulses during those periods in which the information-carrying pulse train 
includes no level shifts. The commutating filter includes a number of 
capacitors and a cyclic switch which functions to connect the capacitors 
to the signal rectified in the rectifier in a cyclic sequence. The 
commutating filter is given a resonance frequency that is equal to the 
frequency of the exchange clock, which means that the switch will switch 
each of the capacitors sequentially to the rectified signal once for each 
clock period. With each clock period in which a pulse appears in the 
rectified signal, part of the capacitors are charged and for each clock 
period which does not contain a pulse, the earlier charged capacitors are 
discharged, whereby the commutating filter delivers a continuous clock 
signal which contains one pulse for each bit in the original 
information-carrying pulse train. 
Several advantages are afforded by the use of a commutating filter in 
accordance with the invention, instead of an oscillation circuit or a 
PLL-circuit in accordance with known technique. The resonance frequency of 
the commutating filter is not dependent on the accuracy of the filter 
components, but depends on the accuracy of the exchange clock. 
Consequently, the components of the commutating filter need not have a 
high degree of accuracy, which makes the filter relatively inexpensive. 
Neither is it necessary to trim the filter. A commutating filter is also 
easier to integrate on silicon than the earlier mentioned circuits used 
according to known techniques. Finally, the commutating filter possesses a 
highly advantageous property such that when the frequency of the 
NRZ-signal drives slowly, the charge distribution in the filter is 
displaced so that the generated timing signal will be constantly 
synchronous with the NRZ-signal.

BEST MODE OF CARRYING OUT THE INVENTION 
The present invention relates to a method and to an arrangement for 
regenerating timing information from an information-carrying bit-divided 
pulse train of the NRZ-type. The method and the arrangement are intended 
for use in a telecommunication system, for example a telephone exchange 
having an exchange clock which determines the timing of outgoing signals. 
Signals arriving at the exchange will not normally deviate from this 
timing, although the phase position is totally random, due to conductor 
delays. Thus, an information-carrying pulse train of the NRZ-type will 
have in the telephone exchange a frequency which corresponds to the clock 
frequency but an arbitrary phase position. The object of the inventive 
method is to provide a timing signal which is synchronous with the 
information-carrying pulse train, so that the clock signal pulses can be 
used as clock pulses when reading the information in the pulse train. The 
timing signal is created from the information-carrying pulse train with 
the aid of an arrangement illustrated in FIG. 1. The information-carrying 
pulse train is also referred to as the pulse train signal or the 
NRZ-signal. 
The arrangement includes a derivating circuit 10 for differentiation of the 
pulse train signal 1. Connected to the output of the derivating circuit 10 
is a rectifier 11 which functions to rectify the signal delivered from the 
derivating circuit 10. Connected to the output of the rectifier 11 is a 
commutating filter 12 which functions to generate timing pulses over 
periods in which no level shifts occur in the original pulse train signal 
1. The commutating filter 12 produces a timing signal 4 which is delivered 
to an amplifier 13 connected to the filter 12. Finally, the arrangement 
includes a delay circuit 14 whose input is connected to the output of the 
amplifier 13. The delay circuit 14 produces on its output a delayed timing 
signal which can be used when reading information from the original pulse 
train 1. 
FIG. 2 illustrates an example of a pulse train signal 1 of the NRZ-type. 
Each bit in the signal occupies a time period corresponding to the clock 
period T.sub.c of the exchange clock, since the NRZ-signal has the same 
frequency as the exchange clock. In the illustrated embodiment, the level 
shift of the pulse train signal 1 is exaggeratingly slow, since these 
level shifts are used to generate the aforesaid timing signal. The 
creation of a timing signal is commenced by first differentiating the 
pulse train 1 in the derivating circuit 10, in a known manner. The 
differentiated pulse train signal 2 contains pulses at level changes in 
the information-carrying pulse train 1, these pulses being positive pulses 
in the case of changes from low to high levels and negative pulses in the 
case of changes from high to low levels. The differentiated pulse train 
signal 2 is then rectified in the rectifier 11, in a known manner, 
wherewith the negative pulses are converted to positive pulses in the 
rectified pulse-train signal 3. The rectified pulse-train signal 3 will 
only contain pulses when the original pulse train signal 1 changes from 
one level to another, and in order to create timing pulses also during 
those limited periods in which the pulse train 1 does not change levels, 
the rectified pulse train 3 is delivered to the commutating filter 12. 
The commutating filter 12 includes a number of capacitors C.sub.1, . . . 
C.sub.N, a resistor R and a cyclicly operating switch g which couples the 
capacitors in a cyclic sequence to said rectified pulse train signal 3 
between the resistor R and the input of the amplifier 13. The commutating 
filter 12 is given a resonance frequency which corresponds to the 
frequency of the exchange clock, wherein the switch g, when seen 
operationally, rotates one revolution during the clock period T.sub.c, 
i.e. each of the capacitors C.sub.1, . . . C.sub.N is coupled to the 
rectified pulse train signal 3 once during the clock period. If, at the 
beginning of the clock period, the switch g connects the rectified pulse 
train signal to, for instance, the first capacitor C.sub.1, the switch 
will consequently connect the rectified pulse train signal to the N:th 
capacitor C.sub.N at the end of the clock period. The commutating filter 
12 will allow signals with retained curve shape to pass through if these 
signals have a frequency which is equal to or almost equal to the 
resonance frequency of the filter, since harmonic overtones are also 
allowed to pass through. Since the rectified pulse train 3 has the same 
frequency as the resonance frequency of the commutating filter, the pulses 
will always charge the same capacitors in the commutating filter 12. Only 
a part of the capacitors C.sub.1, . . . C.sub.N are charged, since pulses 
only occur during a part of the time period T.sub.c. When there are no 
pulses in the rectified pulse train signal 3, i.e. no level shift between 
two bits in the original signal 1, the capacitors earlier charged are 
discharged, wherewith pulses are regenerated in a timing signal 4 on the 
input of the amplifier 13. The regenerated timing signal 4 will therewith 
contain one timing pulse for each bit in the original pulse train 1. In 
order to ensure that the capacitors remain charged for as long as 
possible, so as to enable several pulses to be regenerated sequentially, 
the time constant N R C of the filter is given a very large value in 
relation to the period time Tc of the exchange clock. Since the mean value 
of the voltage level on the timing pulses 4 from the commutating filter 12 
is half the pulse level in the rectified pulse train 3 the arrangement 
also includes an amplifier 13 in which the timing pulses 4 are amplified. 
Thus, an amplified timing signal 5 (not shown in the signal diagram) is 
produced on the output of the amplifier 13. 
Subsequent to phase adjustment, the timing signal 4 shall be used to read 
the information in the original information-carrying pulse train 1. The 
generated timing signal 4 includes clock pulses at each bit shift in the 
pulse train 1. The timing signal 4 in the clock pulses shall be used to 
read the signal level in the information-carrying pulse train 1 at each 
individual bit interval. In order to enable the timing pulses in the 
generated timing signal 4 to be used to clock the information-carrying 
pulse train 1 in the centre of each bit, the amplified timing signal 5 is 
delayed through 180.degree. in the delay circuit 14, so as to produce a 
delayed timing signal 6 suitable for reading purposes. As illustrated in 
FIG. 2 in broken lines, when reading is effected at the leading flanks of 
the pulses in the delayed timing signal 6, the pulse level will be read in 
the centre of each bit in the information-carrying pulse train 1. 
Alternatively, a rotating switch can be used to effect reading 180 out of 
phase with the earlier mentioned. 
Hitherto, the invention has been described on the understanding that the 
frequency of the original pulse train 1, and thus also of the rectified 
pulse train 3, is precisely the same as the frequency of the exchange 
clock. However, it is possible that the frequency of the 
information-carrying pulse train 1 will drift slightly so that the 
frequency of the signal arriving at the commutating filter 12 will deviate 
somewhat from the given resonance frequency (which corresponds to the 
frequency of the exchange clock). Accordingly, the commutating filter 12 
is influenced in a manner such that the charge state of the capacitors 
C.sub.1, . . . C.sub.N is slowly displaced through one revolution, so a to 
generate a timing signal 4 which is constantly synchronous with the 
NRZ-signal 1, despite this frequency change. The cycle time of the cyclic 
switch g is always constant and equal to the period time of the exchange 
clock. In order to provide sufficient time for the commutating filter 12 
to accommodate this deviation in frequency so as to slowly displace the 
charge distribution of the capacitors, the filter components are selected 
so that the time constant N.multidot.R.multidot.C of the filter will be 
shorter than the shortest time of a frequency change. 
The invention can also be applied when the NRZ-signal has a frequency which 
is completely different to the frequency of the exchange clock. For 
instance, the frequency of the NRZ-signal may be twice as high. In this 
case, the commutating filter is given a resonance frequency which 
corresponds to the frequency of the NRZ-signal, wherein the switch g 
obtains a cycle time which corresponds to the clock period of the 
NRZ-signal. The switch g will then connect each of the capacitors C.sub.1, 
. . . C.sub.N to the pulse train signal 3 with each period in the 
NRZ-signal. Thus, the commutating filter is always given a resonance 
frequency which corresponds to the frequency of the NRZ-signal. 
Instead of rectifying the negative pulses from the differentiating stage to 
positive pulses, it is conceivable to rectify the positive pulses to 
negative pulses. Such an alternate embodiment would operate in the same 
fashion as the exemplary embodiment described with respect to FIG. 2 
except that the rectifying circuit 11 would convert the positive pulses to 
negative pulses. FIG. 3 illustrates how the pulse train signals of FIG. 2 
would appear according to this exemplary embodiment of the present 
invention. In FIG. 3, pulse train signals corresponding to those of FIG. 2 
are denotes using similar pulse train numbers. Accordingly, all of the 
pulses of pulse train signals 3, 4, and 5 will be negative pulses as a 
result of the operation of the rectifying circuit 11.