Broadband input matching and video bandwidth circuits for power amplifiers

A system may include a radio frequency (RF) amplifier device that includes an input impedance matching network and first and second baseband decoupling circuits, which may remove intermodulation distortion products from signal energy input to the RF amplifier device at baseband frequencies. The input impedance matching network may act as a band-pass or low-pass filter. A gate bias voltage may be applied to the gate of a transistor in the RF amplifier device through one of the baseband decoupling circuits or, alternatively, at an input node of the RF amplifier device.

TECHNICAL FIELD

Embodiments of the subject matter herein relate generally to packaged semiconductor devices, and more particularly to packaged, radio frequency (RF) semiconductor devices with impedance matching circuits that include baseband decoupling circuits to potentially enhance performance.

BACKGROUND

A typical high power, radio frequency (RF) semiconductor device may include one or more input leads, one or more output leads, one or more transistors, bond wires coupling the input lead(s) to the transistor(s), and bond wires coupling the transistor(s) to the output lead(s). The bond wires have inductive reactance at high frequencies, and such inductances are factored into the design of input and output impedance matching circuits for a device. In some cases, input and output impedance matching circuits may be contained within the same package that contains the device's transistor(s). More specifically, an in-package, input impedance matching circuit may be coupled between a device's input lead and a control terminal (e.g., the gate) of a transistor, and an in-package, output impedance matching circuit may be coupled between a current conducting terminal (e.g., the drain) of a transistor and a device's output lead.

In the field of amplifier design, it is often preferable to perform amplification of dual frequency modulated signals. Intermodulation distortion products are generated when these signals are processed by an RF power amplifier due to non-linear input capacitance of the RF power amplifier. These intermodulation distortion products may cause undesirable noise in the RF power amplifier system, and may occur primarily near the baseband frequency of the modulated signals. Due to their high change in input capacitance over voltage, gallium nitride (GaN) RF power amplifiers may experience higher magnitude intermodulation distortion products compared to other technologies such as laterally diffused metal oxide semiconductor (LDMOS) RF power amplifiers. Accordingly, in various amplification systems, and particularly RF power amplifiers, it may be preferable to reduce intermodulation distortion products.

DETAILED DESCRIPTION

The present disclosure relates to improved input impedance matching circuitry for radio frequency (RF) amplifiers. Intermodulation distortion (IMD) products are the result of the interaction of the amplitude modulation of two or more signals having different respective frequencies (e.g., a multi-tone amplitude modulated signal) with the nonlinearities of the amplifier system. The intermodulation between each frequency component of the modulated signals forms additional signals at frequencies that are different from harmonic frequencies of the modulated signals. These additional signals occur at the sum and difference frequencies of the frequencies of the modulated signals and at multiples of those sum and difference frequencies. These additional distortion components are referred to as IMD products and can be caused, in the present example, by non-linear behavior of the RF amplifier used to process the multi-tone amplitude modulated signal. These IMD products may introduce undesirable distortion in an RF amplifier system and, as a result, may indirectly reduce efficiency of the RF amplifier system since inefficient schemes would be needed to maintain the RF amplifier system linearity.

RF power amplifiers generally have an intrinsic non-linear input capacitance (e.g., between a gate terminal of an RF power amplifier and a source terminal of the RF power amplifier). This non-linear input capacitance may increase the magnitude of IMD products generated when an RF power amplifier receives and amplifies a multi-tone amplitude-modulated signal, which may, in turn, increase the amount of distortion observed at an output of the RF power amplifier and may thereby decrease the efficiency of the RF power amplifier when compensation techniques are used to improve linearity of the system.

Another contributor to the magnitude of IMD products can be tone spacing. Tone spacing herein refers to the frequency difference between two tones of a multi-tone AM signal. As this tone spacing increases, the magnitude of IMD products generated by the multi-tone AM signal passing through the amplifier also increases.

Video bandwidth (VBW) refers to a frequency range over which an amplifier shows symmetrical and constant IMD products. It should be noted that the linearity of these IMD products affects the complexity of signal filtering that needs to be performed on the multi-tone AM signal in order to remove the IMD products. For example, when the IMD products produced by the multi-tone signal passing through the amplifier are substantially constant with respect to tone spacing, the signal filtering needed to remove or reduce the IMD products is simple compared to the signal filtering needed to remove or reduce the substantially frequency variant IMD products.

An important component of the noise generated as a result of IMD products occurs near the baseband of the multi-tone amplitude modulated signal.FIG. 1shows a graph100of voltage vs. frequency for a two-tone amplitude modulated (AM) signal across a gate terminal and a source terminal of an amplifier. The voltage (Vgs) is shown in decibels (e.g., on a logarithmic scale), while the frequency is shown in gigahertz (GHz). The two-tone AM signal includes a first input tone at 1.75 GHz and a second input tone at 2.25 GHz. The amplitude modulation of the first and second input tones generates several IMD products, IMD2, IMD3, IMD4, IMD5, and IMD6 each of which occur in frequency-symmetric pairs. IMD2 has a magnitude of roughly −15 dB and therefore is the greatest contributor to IMD generated noise of the baseband IMD products102shown in graph100. As a result, it may be desirable to remove IMD2, IMD4 and IMD6 through baseband decoupling at the input of the amplifier.

FIG. 2shows a block diagram of an amplifier system200that includes a transistor202having a gate terminal240(e.g., a control terminal), a source terminal244, and a drain terminal242. Source terminal244is connected to ground terminal221(e.g., ground reference node), which may be connected to a ground reference source, or which may be a ground plane of a package (e.g., package400,FIG. 4) that houses amplifier system200. Transistor202may be a High Electron Mobility Transistor (HEMT) formed on a substrate. This is merely illustrative and transistor202may be any desired type of transistor, including a bi-polar junction transistor (BJT), a laterally diffused metal oxide semiconductor (LDMOS) transistor, or another type of field effect transistor. Transistor202may also be formed on any desired, suitable semiconductor substrate, including, but not limited to, gallium arsenide (GaAs), silicon carbide (SiC), silicon (Si), silicon-on-insulator (SoI), sapphire, gallium nitride (GaN), GaN on silicon, GaN on SiC, and indium phosphide (InP) substrates, although other substrates also may be suitable. For instances in which transistor202is a BJT transistor, gate terminal240will be instead be a base terminal, source terminal244will instead be an emitter terminal, and drain terminal242will instead be a collector terminal.

Amplifier system200includes an output matching network204connected between the drain terminal242of transistor202and a load (not illustrated). Output matching network204may include a variety of capacitive, resistive, and inductive components designed to match an output impedance of transistor202to a predefined impedance of the load that is driven by the amplifier system200. The load may be, for example, an antenna driven by amplifier system200. This output impedance matching may reduce the amount of signal reflection that occurs when an output signal of transistor202passes from drain terminal242to the load through output matching network204, compared to the amount of signal reflection that would occur with a mismatched impedance between drain terminal242and the load.

Amplifier system200also includes input circuitry coupled to gate terminal240of transistor202, which includes an input matching network208, an internal baseband decoupling circuit210, and an external baseband decoupling circuit206. Input matching network208may match an input impedance of transistor202to a predefined impedance of an RF signal source201that supplies an input signal (e.g., RF signal) to input node222of input matching network208. RF signal source201may be, for example, external circuitry that produces one or more RF signals and is electrically coupled (e.g., connected to) the input node222of the input matching network208. Input matching network208is coupled between gate terminal240of transistor202and an input node222, which may be, for example, one or more RF input/output (I/O) leads. Input matching network208includes inductance235having a first terminal coupled to input node222, and an L-section match that includes an inductance224coupled between a second terminal of inductance235and ground terminal221, and further includes a capacitor226coupled between the second terminal of inductance235and a node230, which may act as an RF cold point.

Input matching network208further includes a capacitor228coupled between node230and ground terminal221, and an inductance232coupled between the node230and the gate terminal240of transistor202. Internal baseband decoupling circuit210is coupled between the node230and ground terminal221. According to an embodiment, inductance235has an inductance value in a range of about 50 picohenries (pH) to about 200 pH, inductance224has an inductance value in a range of about 100 pH to about 350 pH, inductance235has an inductance value in a range of about 50 pH to about 200 pH, capacitor226has a capacitance value in a range of about 30 picofarads (pF) to about 75 pF, capacitor228has a capacitance value in a range of about 100 pF to about 300 pF, and inductance232has an inductance value in a range of about 20 pH to about 150 pH, although these components may have values that are lower or higher than these ranges, as well. Inductance232and capacitor228may, together, act as a low-pass filter, allowing lower frequency signal energy to pass from node230to gate terminal240, while directing higher frequency signal energy to ground terminal221. Inductance224and capacitor226may, together, act as a high-pass filter, allowing higher frequency (e.g., RF) signal energy to pass from input node222to node230, while directing lower frequency signal energy to ground terminal221. Together, the high-pass filter of inductance224and capacitor226combined with the low-pass filter of inductance232and capacitor228may act as a band-pass filter, allowing only signal energy within a predetermined frequency range (e.g., 1.5 GHz to 2.5 GHz) to pass from input node222to gate terminal240. In this way, input matching network208may be a band-pass input matching network, and node230may be an RF cold point node (e.g., a node that provides a low-impedance path to ground for RF signal energy within a predetermined frequency range of the frequency range of the band-pass filter of input matching network208).

Internal baseband decoupling circuit210includes resistor234, inductance236, and capacitor238coupled in series between node230and ground terminal221. According to an embodiment, inductance236has an inductance value in a range of about 70 pH to about 300 pH, resistor234has a resistance value in a range of about 0.1 ohms to about 1 ohm, and capacitor238has a capacitance value in a range of about 0.5 nanofarads (nF) to about 30 nF, although these components may have values that are lower or higher than these ranges, as well.

External baseband decoupling circuitry206is coupled between node230and ground terminal220(e.g., ground reference node that is coupled to an external ground reference that may, for example, be external to a package containing amplifier system200, such as package400,FIG. 4), which may be separate from ground terminal221or may be electrically connected to ground terminal221, depending on how the package containing input matching network208, internal baseband decoupling circuit210, transistor202, and output matching network204is arranged. External baseband decoupling circuit206includes an inductance214, a resistance216, and a capacitor218coupled in series between node230and ground terminal220. In some embodiments, resistance216(and resistances516,616,716, described later) may be excluded. Ground terminal220may be an out-of-package (e.g., external) ground terminal that is different from ground terminal221. Bias voltage source250may be coupled to a node between resistance216and capacitor218, and may generate and provide a gate bias voltage Vgg for gate terminal240. Alternatively, the bias voltage may be provided through an external gate bias circuit (e.g., external gate bias circuit712,FIG. 7). According to an embodiment, inductance214has an inductance value in a range of about 200 pH to about 1000 pH, resistance216has a resistance value in a range of about 0.1 ohms to about 2 ohm, and capacitor218has a capacitance value in a range of about 1 microfarads (uF) to about 20 uF, although these components may have values that are lower or higher than these ranges, as well.

Baseband decoupling circuits206and210can be used to create low-impedance paths between node230and ground terminals220and221, respectively, for baseband frequency signals that oscillate at baseband frequencies. Node230is an “RF cold point” in that, at RF frequencies, impedance at node230through internal baseband decoupling circuit210may be significantly greater (e.g., roughly 5 times greater) than the impedance at node230through capacitor228. At node230, external baseband decoupling circuit206may have an even greater impedance (e.g., roughly 30 times greater) than the impedance through capacitor228at RF frequencies. For example, at RF frequencies (e.g., frequencies greater than 1 GHz), as observed from node230, capacitor228may exhibit an impedance between about 0.2 ohms and about 0.7 ohms, internal baseband decoupling circuit210may exhibit an impedance between about 1.2 ohms and about 5 ohms, and external baseband decoupling circuit206may exhibit an impedance between about 15 ohms and about 30 ohms. The capacitor228and circuits210,206may exhibit lower or higher impedances than the above-given ranges, as well.

At low frequencies (e.g., baseband frequencies), current is directed to ground through baseband decoupling circuits206and210, rather than through capacitor228or to gate240through inductance232. External decoupling circuit206may provide the lowest impedance path to ground for signals having frequencies less than a first threshold (e.g., 30 megahertz (MHz)), while baseband decoupling circuit210may provide the lowest impedance path to ground for signals having frequencies between the first threshold (e.g., 30 MHz) and a second threshold (e.g., 1 GHz). For example, at baseband frequencies less than the first threshold, as observed from node230, capacitor228may exhibit an impedance between about 20 ohms and about 1000 ohms, internal baseband decoupling circuit210may exhibit an impedance between about 1 ohm and about 6 ohms, and external baseband decoupling circuit206may exhibit an impedance between about 0.3 ohms and about 1 ohm. At baseband frequencies between the first threshold and the second threshold, as observed from node230, capacitor228may exhibit an impedance between about 20 ohms and about 100 ohms, internal baseband decoupling circuit210may exhibit an impedance between about 0.5 ohms and about 1 ohm, and external baseband decoupling circuit206may exhibit an impedance between about 1 ohm and about 10 ohms. Once again, the capacitor228and circuits210,206may exhibit lower or higher impedances than the above-given ranges, as well.

By directing signals at baseband frequencies to ground through baseband decoupling circuits206and210, IMD products occurring at or near baseband frequencies may be removed from the input signal, which may increase the signal-to-noise ratio for amplifier system200compared to circuit configurations that lack these baseband decoupling circuits. By voltage biasing gate terminal240through inductance214and resistance216of external baseband decoupling circuit206, it may not be necessary to include a quarter-wave bias line that is traditionally used for providing gate terminal voltage biasing, which may preserve circuit board space. By using a 2-section band-pass input matching network (e.g., input matching network208) that includes band-pass filter implemented by a high-pass filter (e.g., inductance224and capacitor226) and a low-pass filter (e.g., inductance232and capacitor228) to create an RF cold point at node230to which input-side baseband terminating circuits (e.g., internal baseband decoupling circuit210and external baseband decoupling circuit206) may be connected, decoupling of baseband frequency signal energy (e.g., including intermodulation distortion products) may be improved with negligible gain/VBW compromise.

FIG. 3shows a top-down view of an illustrative circuit layout that may be used in implementing a portion of an amplifier system, such as amplifier system200ofFIG. 2or the amplifier paths in package400ofFIG. 4. Circuit300(sometimes referred to herein as an input matching network, such as input matching network300-1,300-2,FIG. 4) may be an integrated circuit die having a semiconductor substrate formed from silicon (Si), silicon-on-insulator (SoI), silicon carbide (SiC), sapphire, gallium nitride (GaN), GaN on silicon, GaN on SiC, gallium arsenide (GaAs), indium phosphide (InP) or any other desired semiconductor material. Circuit300may be used to provide input impedance matching for the input of an amplifier (e.g., gate terminal of transistor202). A stack-up of multiple metal and dielectric layers may be formed on the surface of the substrate of circuit300using, for example, photolithography, physical vapor deposition (PVD) techniques (e.g., thermal evaporation, electron-beam evaporation, sputtering, chemical vapor deposition (CVD), etc.), etching techniques (e.g., reactive ion etching, electron cyclotron resonance etching, inductively coupled plasma etching, etc.), or any appropriate combination of these. In alternate embodiments, circuit300may be implemented using alternating ceramic (or other insulator) and patterned metal layers. Either way, as circuit300includes primarily (or only) passive electrical components (e.g., capacitors, inductors, and resistors), in an embodiment, circuit300may more generically be referred to as an “integrated passive device” or “IPD.”

The IPD containing circuit300may include a metallized backplane (not shown) on the bottom surface of the IPD, and that metallized backplane may be coupled to the body of a package (e.g., of package400,FIG. 4), which may act as a ground terminal. Circuit300includes many components of RF matching circuitry308(e.g., input matching network208,FIG. 2) and baseband termination circuitry310(e.g., internal baseband decoupling circuit210,FIG. 2). Although the various components are depicted in the top-down view ofFIG. 3for illustration purposes, various ones of the components may be hidden below the top surface.

RF matching circuitry308may provide input impedance matching at RF frequencies for an amplifier (e.g., transistor202,FIG. 2; amplifier402-1,402-2,FIG. 4) and may include a bond pad352, inductors324, capacitors326, and a capacitor328. Bond pad352, which is exposed at the top surface of circuit300, may act as an input node (e.g., input node222,FIG. 2) for circuit300. Bond wires (e.g., bond wires434,FIG. 4) may couple bond pad352to a RF signal source (e.g., RF signal source201,FIG. 2) that may supply RF signals to bond pad352(e.g., for amplification at transistor202,FIG. 2; amplifier402-1,402-2,FIG. 4). Each of inductors324(e.g., inductance224FIG. 2) may be coupled between bond pad352and a ground terminal (e.g., a ground terminal or ground plane of package400,FIG. 4; ground terminal221,FIG. 2) (e.g., inductors324may be coupled to the metallized backplane using conductive vias). Inductors324may be coupled in parallel with one another to create an effective inductance (e.g., the inductance224,FIG. 2) between bond pad352and the ground terminal. Capacitors326(e.g., capacitor226,FIG. 2) may be coupled in parallel between bond pad352and a first terminal of capacitor328(e.g., such that input terminals of capacitors326are coupled to bond pad352and output terminals of capacitors326are coupled to the first terminal of capacitor328) so as to create an effective capacitance (e.g., the capacitance represented by capacitor226,FIG. 2) between bond pad352and the first terminal of capacitor328. Capacitor328may have a second terminal coupled to the ground terminal (e.g., capacitor328may be coupled to the metallized backplane using conductive vias), and thereby may act as a shunt capacitor (e.g., capacitor228,FIG. 2).

Baseband termination circuitry310(e.g., internal baseband decoupling circuit210,FIG. 2) may provide low impedance paths to ground for signals at or near baseband frequencies when circuit300is implemented in a circuit package (e.g., package400,FIG. 4). Baseband termination circuitry310includes bond pads350, a bond pad354, a capacitor338, and inductors336. Bond pad354(e.g., node230,FIG. 2) acts as a connection between the first terminal of capacitor328, bond pads350, and an external transistor (e.g., transistor202,FIG. 2, amplifier402-1,402-2,FIG. 4). For example, bond pad354may be coupled to the external transistor (e.g., to a gate terminal of the external transistor such as gate terminal240of transistor202,FIG. 2) using bond wires (e.g., inductance232,FIG. 2; bond wires432,FIG. 4). Inductors336(e.g., inductance236,FIG. 2) are coupled between bond pads350and capacitor338(e.g., capacitor238,FIG. 2), and may be low-Q inductors (e.g., inductors with low quality factors, having a greater intrinsic resistance that contributes to resistance234,FIG. 2, compared to high-Q inductors). Inductors336and capacitor338may have respective intrinsic resistances (e.g., which may cumulatively be represented as resistor234,FIG. 2). Capacitor338may be a shielded high density capacitor, or any other suitable capacitor. In alternate embodiments, capacitor338may instead be disposed on a separate substrate or chip and may be coupled to bond pads350using bond wires, where the bond wires act as inductors, replacing inductors336. Either way, capacitor338is coupled to a ground terminal (e.g., capacitor338may be coupled to the metallized backplane using conductive vias).

FIG. 4shows a top-down view of an illustrative circuit package that may include an amplifier system, such as amplifier system200ofFIG. 2, implemented with input matching and baseband termination circuitry, such as circuitry300ofFIG. 3. Package400includes two amplifiers402-1,402-2(e.g., which may be arranged to operate as a Doherty or inverted Doherty amplifier system), two output matching networks404-1,404-2, two input matching networks including circuits300-1,300-2(e.g., each corresponding to circuit300,FIG. 3) and bond wires434-1,434-2,432-1,432-2, additional bond wires414-1,414-2, gate supply leads422-1,422-2, leads401-1,401-2, optional resistors403-1,403-2, and capacitors405-1,405-2.

The amplifier paths that include amplifier402-1and402-2are now described, and it should be understood that the component arrangements described in connection with the amplifier path that includes amplifier402-1may also apply to the amplifier path that includes amplifier402-2.

Amplifier402-1(e.g., which includes a transistor such as transistor202,FIG. 2) is coupled to output matching network404-1(e.g., output matching network204,FIG. 2), and further coupled to an input matching network (e.g., input matching network208,FIG. 2) that includes bond wires434-1(e.g., inductance235,FIG. 2), circuitry300-1(e.g., circuitry300,FIG. 3), and bond wires432-1(e.g., inductance232,FIG. 2). Gate supply lead422-1may provide a RF signal to the input matching network, which may in turn provide the RF signal to the gate terminal of amplifier402-1.

As discussed previously, and according to an embodiment, the amplifier system includes both an internal baseband decoupling circuit (e.g., circuit210,FIG. 2), and an external baseband decoupling circuit (e.g., circuit206,FIG. 2). The input matching network, or more specifically circuitry300-1(e.g., one of bond pads350of circuit300,FIG. 3), may be coupled to lead401-1through bond wires414-1(e.g., which may act as inductance214,FIG. 2). Bond wires414-1, which may carry bias voltage signals (e.g., gate bias voltage Vgg), may be arranged such that they are perpendicular to bond wires432-1and434-1, which may primarily carry RF signals, in order to reduce coupling between bond wires carrying bias voltage signals and bond wires carrying RF signals (e.g., compared to arrangements in which these sets of bond wires are not arranged perpendicularly). Lead401-1may be a highly inductive bias lead that is connected to an external ground terminal (e.g., ground terminal220,FIG. 2, which may be different from the ground plane of package400) through an optional resistor403-1and a capacitor405-1(e.g., capacitor218,FIG. 2). Voltage biasing for the gate/control terminal of amplifier402-1may be applied through lead401-1, which may replace quarter-wave bias lines that are conventionally used to provide such voltage biasing. For example, a DC bias voltage source (e.g., bias voltage source250,FIG. 2) may be coupled to the bond pad between resistor403-1and capacitor405-1in order to provide a gate bias voltage, Vgg. Capacitor405-1and optional resistor403-1may be discrete components, such as surface mount components. Bond wires414-1, lead401-1, and (optionally) resistor403-1may have a cumulative series resistance (e.g., which contribute to resistance216,FIG. 2).

Amplifier402-2(e.g., which includes a transistor such as transistor202,FIG. 2) is coupled to output matching network404-2(e.g., output matching network204,FIG. 2), and further coupled to input matching network300-2(e.g., circuitry300,FIG. 3; input matching network208,FIG. 2) through bond wires432-2(e.g., inductance232,FIG. 2). Input matching network300-2is coupled to gate supply lead422-2through bond wires434-2. Gate supply lead422-2may provide a RF signal to input matching network300-2, which may in turn provide the RF signal to the gate terminal of amplifier402-2. Another instance of input matching network, or more specifically circuitry300-2(e.g., one of bond pads350of circuit300,FIG. 3), may be coupled to lead401-2through bond wires414-2(e.g., which may act as inductance214,FIG. 2). Bond wires414-2, which may primarily carry bias voltage signals, may be arranged such that they are perpendicular to bond wires432-2and434-2, which may primarily carry RF signals, in order to reduce coupling between bond wires carrying bias voltage signals and bond wires carrying RF signals (e.g., compared to arrangements in which these sets of bond wires are not arranged perpendicularly). Lead401-2may be a highly inductive bias lead that is connected to an external ground terminal (e.g., ground terminal220,FIG. 2, which may be different from the ground plane of package400) through an optional resistor403-2and a capacitor405-2(e.g., capacitor218,FIG. 2). Voltage biasing for the gate/control terminal of amplifier402-2may be applied through lead401-2, which may replace quarter-wave bias lines that are conventionally used to provide such voltage biasing. For example, a DC bias voltage source (e.g., bias voltage source250,FIG. 2) may be coupled to the bond pad between resistor403-2and capacitor405-2in order to provide a gate bias voltage, Vgg. Capacitor405-2and optional resistor403-2may be discrete components, such as surface mount components. Bond wires414-2, lead401-2, and (optionally) resistor403-2may have a cumulative series resistance (e.g., which contribute to resistance216,FIG. 2).

FIG. 5shows a circuit diagram of an illustrative amplifier system500, which may be used, for example, as an alternative to the amplifier system200ofFIG. 2. Amplifier system500includes a transistor502having a gate terminal540, a source terminal544, and a drain terminal542. Source terminal544is connected to ground terminal521, which may be connected to a ground reference source, or which may be a ground plane of a package (e.g., package400,FIG. 4) that houses amplifier system500. Transistor502may be a HEMT transistor formed on a substrate. This is merely illustrative and transistor502may be any desired type of transistor, including a BJT or a LDMOS transistor, or another type of field effect transistor. Transistor502may also be formed on any desired, suitable semiconductor substrate, including, but not limited to, GaAs, SiC, Si, SoI, sapphire, GaN, GaN on silicon, substrates. For instances in which transistor502is a BJT transistor, gate terminal540will be instead be a base terminal, source terminal544will instead be an emitter terminal, and drain terminal542will instead be a collector terminal.

Amplifier system500includes an output matching network504connected to drain terminal542of transistor502. Output matching network504may include a variety of capacitive, resistive, and inductive components designed to match an output impedance of transistor502to a predefined impedance of a load that is driven by the amplifier system500. The load may be, for example, an antenna driven by amplifier system500. This output impedance matching may reduce the amount of signal reflection that occurs when an output signal of transistor502passes from drain terminal542to the load through output matching network504, compared to the amount of signal reflection that would occur with a mismatched impedance between drain terminal542and the load.

Amplifier system500also includes input circuitry coupled to gate terminal540of transistor502, which includes an input matching network508, an internal baseband decoupling circuit510, and an external baseband decoupling circuit506. Input matching network508may match an input impedance of transistor502to a predefined impedance of an RF signal source501that supplies an input signal (e.g., a RF signal) to input node522of input matching network508. RF signal source501may be, for example, external circuitry that produces one or more RF signals and that is electrically coupled (e.g., connected to) the input node522of the input matching network508. Input matching network508is coupled between gate terminal540of transistor502and an input node522, which may be, for example, one or more RF input/output (I/O) leads.

Input matching network508includes an inductance535coupled between input node522and node530, a capacitor528coupled between node530and ground terminal521, and an inductance532coupled between node530and gate terminal540of transistor502. Bias voltage source550may be coupled to a node between resistance516and capacitor518, and may generate and provide a gate bias voltage Vgg for gate terminal540. Alternatively, the bias voltage may be provided through an external gate bias circuit (e.g., external gate bias circuit712,FIG. 7). According to an embodiment, inductance535has an inductance value in a range of about 50 pH to about 200 pH, capacitor528has a capacitance value in a range of about 100 pF to about 300 pF, and inductance532has an inductance value in a range of about 20 pH to about 150 pH, although these components may have values that are lower or higher than these ranges, as well. Inductance532and capacitor528may, together, act as a low-pass filter, allowing lower frequency signal energy to pass from node530to gate terminal540, while directing higher frequency signal energy to ground terminal521. In this way, input matching network508may be a low-pass input matching network, and node530may be an RF cold point node (e.g., a node that provides a low-impedance path to ground for RF signal energy within a predetermined frequency range above of the frequency range of the low-pass filter of input matching network508).

Internal baseband decoupling circuit510is coupled between the node530and ground terminal521. Internal baseband decoupling circuit510includes resistor534, inductance536, and capacitor538coupled in series between node530and ground terminal521. External baseband decoupling circuitry506is coupled between node530and ground terminal520, which may be separate from ground terminal521or may be electrically connected to ground terminal521, depending on how the package containing input matching network508, internal baseband decoupling circuit510, transistor502, and output matching network504is arranged. External baseband decoupling circuit506includes a resistor516, an inductance514, and a capacitor518coupled in series between node530and ground terminal520. Ground terminal520may be an out-of-package (e.g., external) ground terminal that is different from ground terminal521. Baseband decoupling circuits506and510may operate similarly to baseband decoupling circuits206and210described above in connection withFIG. 2.

Input matching network508excludes the L-section match of inductance224and capacitor226ofFIG. 2, and instead input node522is coupled to node530directly through inductance535. This arrangement may reduce the circuit footprint of amplifier system500, although the removal of the L-section match may reduce the quality of the impedance match provided by input matching network508, compared to that of input matching network208ofFIG. 2.

FIG. 6shows a circuit diagram of an illustrative amplifier system600, which may be used, for example, as an alternative to the amplifier systems200and500ofFIGS. 2 and 5. Amplifier system600includes a transistor602having a gate terminal640, a source terminal644, and a drain terminal642. Source terminal644is connected to ground terminal621, which may be connected to a ground reference source, or which may be a ground plane of a package (e.g., package400,FIG. 4) that houses amplifier system600. Transistor602may be a HEMT transistor formed on a substrate. This is merely illustrative and transistor602may be any desired type of transistor, including a BJT or a LDMOS transistor. Transistor602may also be formed on any desired, suitable semiconductor substrate, including, but not limited to GaAs, SiC, Si, SoI, sapphire, GaN, GaN on silicon, GaN on SiC, and InP substrates. For instances in which transistor602is a BJT transistor, gate terminal640will be instead be a base terminal, source terminal644will instead be an emitter terminal, and drain terminal642will instead be a collector terminal.

Amplifier system600includes an output matching network604connected to drain terminal642of transistor602. Output matching network604may include a variety of capacitive, resistive, and inductive components designed to match an output impedance of transistor602to a predefined impedance of a load that is driven by the amplifier system600. The load may be, for example, an antenna driven by amplifier system600. This output impedance matching may reduce the amount of signal reflection that occurs when an output signal of transistor602passes from drain terminal642to the load through output matching network604, compared to the amount of signal reflection that would occur with a mismatched impedance between drain terminal642and the load.

Amplifier system600also includes input circuitry coupled to gate terminal640of transistor602, which includes an input matching network608, an internal baseband decoupling circuit610, and an external baseband decoupling circuit606. Input matching network608may match an input impedance of transistor602to a predefined impedance of a RF signal source601that supplies an input signal (e.g., a RF signal) to input node622of input matching network608. RF signal source601may be, for example, external circuitry that produces one or more RF signals and that is electrically coupled (e.g., connected to) the input node622of the input matching network608. Input matching network608is coupled between gate terminal640of transistor602and an input node622, which may be, for example, one or more RF input/output (I/O) leads. Input matching network608includes an inductance635having a first terminal coupled to input node622, an L-section match that includes an inductance624and capacitor648that are coupled together in series between ground terminal621and a second terminal of inductance635, and that further includes a capacitor626that is coupled between the second terminal of inductance635and node630. A bypass resistor646is coupled in parallel with capacitor626between the second terminal of inductance635and node630.

Input matching network608further includes a capacitor628coupled between node630and ground terminal621, and an inductance632coupled between the node630and the gate terminal640of transistor602. Bias voltage source650may be coupled to a node between resistance616and capacitor618, and may generate and provide a gate bias voltage Vgg for gate terminal640. Alternatively, the bias voltage may be provided through an external gate bias circuit (e.g., external gate bias circuit712,FIG. 7). According to an embodiment, inductance635has an inductance value in a range of about 50 pH to about 200 pH, inductance624has an inductance value in a range of about 100 pH to about 350 pH, capacitor648has a capacitance value in a range of about 100 pF to about 200 pF, capacitor626has a capacitance value in a range of about 30 pF to about 75 pF, resistor646has a resistance value in a range of about 50 ohms to about 200 ohms, capacitor628has a capacitance value in a range of about 100 pF to about 300 pF, and inductance632has an inductance value in a range of about 20 pH to about 150 pH, although these components may have values that are lower or higher than these ranges, as well. Inductance632and capacitor628may, together, act as a low-pass filter, allowing lower frequency signal energy to pass from node630to gate terminal640, while directing higher frequency signal energy to ground terminal621. Inductance624, capacitor626, and capacitor648may, together, act as a high-pass filter, allowing higher frequency (e.g., RF) signal energy to pass from input node622to node630, while directing lower frequency signal energy to ground terminal621. Together, the high-pass filter of inductance624and capacitor626combined with the low-pass filter of inductance632and capacitor628may act as a band-pass filter, allowing only signal energy within a predetermined frequency range (e.g., 1.5 GHz to 2.5 GHz) to pass from input node622to gate terminal640. In this way, input matching network608may be a band-pass input matching network, and node630may be an RF cold point node (e.g., a node that provides a low-impedance path to ground for RF signal energy within a predetermined frequency range above of the frequency range of the band-pass filter of input matching network608).

Internal baseband decoupling circuit610is coupled between the node630and ground terminal621. Internal baseband decoupling circuit610includes resistor634, inductance636, and capacitor638coupled in series between node630and ground terminal621. External baseband decoupling circuitry606is coupled between node630and ground terminal620, which may be separate from ground terminal621or may be electrically connected to ground terminal621, depending on how the package containing input matching network608, internal baseband decoupling circuit610, transistor602, and output matching network604is arranged. External baseband decoupling circuit606includes a resistor616, an inductance614, and a capacitor618coupled in series between node630and ground terminal620. Ground terminal620may be an out-of-package (e.g., external) ground terminal that is different from ground terminal621. Baseband decoupling circuits606and610may operate similarly to baseband decoupling circuits206and210described above in connection withFIG. 2.

Amplifier system600differs from amplifier system200ofFIG. 2through the inclusion of bypass resistor646and capacitor648. Through the addition of bypass resistor646in parallel with capacitor626, flexibility for direct current (DC) biasing may be improved. For example, a gate bias voltage may be applied through input node622(e.g., through an input lead, such as lead422-1,422-2,FIG. 4) to gate terminal640due to the presence of bypass resistor646. Capacitor648may be included in order to prevent short circuiting to ground terminal621through inductance624when a gate bias voltage is applied at input node622, and thereby may act as a DC blocking capacitor.

FIG. 7is a block diagram of an illustrative amplifier system700that includes a two-section low-pass matching network, in accordance with another embodiment. Amplifier system700includes a transistor702having a gate terminal740(e.g., a control terminal), a source terminal744, and a drain terminal742. Source terminal744is connected to ground terminal721(e.g., ground reference node), which may be connected to a ground reference source, or which may be a ground plane of a package (e.g., package400,FIG. 4) that houses amplifier system700. Transistor702may be a HEMT formed on a substrate. This is merely illustrative and transistor702may be any desired type of transistor, including a BJT, an LDMOS transistor, or another type of field effect transistor. Transistor702may also be formed on any desired, suitable semiconductor substrate, including, but not limited to, GaAs, SiC, Si, SoI, sapphire, GaN, GaN on silicon, GaN on SiC, and InP substrates, although other substrates also may be suitable. For instances in which transistor702is a BJT transistor, gate terminal740will be instead be a base terminal, source terminal744will instead be an emitter terminal, and drain terminal742will instead be a collector terminal.

Similar to previously described embodiments, amplifier system700includes an output matching network704connected between the drain terminal742of transistor702and a load (not illustrated). Output matching network704may include a variety of capacitive, resistive, and inductive components designed to match an output impedance of transistor702to a predefined impedance of the load that is driven by the amplifier system700.

Amplifier system700also includes input circuitry coupled to gate terminal740of transistor702, which includes an input matching network708, an internal baseband decoupling circuit710, and an external baseband decoupling circuit706. Input matching network708may match an input impedance of transistor702to a predefined impedance of an RF signal source701that supplies an input signal (e.g., RF signal) to an input node722of input matching network708. RF signal source701may be, for example, external circuitry that produces one or more RF signals and is electrically coupled (e.g., connected to) the input node722of the input matching network708through an input PCB matching network799. Input matching network708is coupled between gate terminal740of transistor702and the input node722, which may be, for example, one or more RF I/O leads. Input matching network708includes inductance735having a first terminal coupled to input node722, and an L-section match that includes a capacitance749coupled between a second terminal of inductance735and ground terminal721, and further includes an inductance746coupled between the second terminal of inductance735and a node730, which may act as an RF cold point.

Input matching network708further includes a capacitor728coupled between node730and ground terminal721, and an inductance747coupled between the node730and the gate terminal740of transistor702. Internal baseband decoupling circuit710is coupled between the node730and ground terminal721. According to an embodiment, inductance735has an inductance value in a range of about 50 pH to about 400 pH, capacitor749has a capacitance value in a range of about 5 pF to about 50 pF, inductance746has an inductance value in a range of about 50 pH to about 400 pH, capacitor728has a capacitance value in a range of about 100 pF to about 300 pF, and inductance747has an inductance value in a range of about 50 pH to about 400 pH, although these components may have values that are lower or higher than these ranges, as well. Inductances746,747and capacitors728,749may, together, act as a two-section low-pass filter, allowing lower frequency signal energy to pass from node730to gate terminal740, while directing higher frequency signal energy to ground terminal721. The two-section low-pass filter made up of inductances746,747and capacitors728,749allow only signal energy within a predetermined frequency range (e.g., less than 2.4 GHz) to pass from input node722to gate terminal740. In this way, input matching network708may be a low-pass input matching network, and node730may be an RF cold point node (e.g., a node that provides a low-impedance path to ground for RF signal energy within a predetermined frequency range below the frequency range of the low-pass filter of input matching network708).

Internal baseband decoupling circuit710includes resistor734, inductance736, and capacitor738coupled in series between node730and ground terminal721. According to an embodiment, inductance736has an inductance value in a range of about 70 pH to about 300 pH, resistor734has a resistance value in a range of about 0.1 ohms to about 1 ohm, and capacitor738has a capacitance value in a range of about 0.5 nF to about 30 nF, although these components may have values that are lower or higher than these ranges, as well.

External baseband decoupling circuitry706is coupled between node730and ground terminal720(e.g., ground reference node that is coupled to an external ground reference that may, for example, be external to a package containing amplifier system700, such as package400,FIG. 4), which may be separate from ground terminal721or may be electrically connected to ground terminal721, depending on how the package containing input matching network708, internal baseband decoupling circuit710, transistor702, and output matching network704is arranged. External baseband decoupling circuit706includes an inductance714, a resistance716, and a capacitor718coupled in series between node730and ground terminal720. Ground terminal720may be an out-of-package (e.g., external) ground terminal that is different from ground terminal721. According to an embodiment, inductance714has an inductance value in a range of about 200 pH to about 1000 pH, resistance716has a resistance value in a range of about 0.1 ohms to about 2 ohm, and capacitor718has a capacitance value in a range of about 1 microfarads (uF) to about 20 uF, although these components may have values that are lower or higher than these ranges, as well.

Baseband decoupling circuits706and710can be used to create low-impedance paths between node730and ground terminals720and721, respectively, for baseband frequency signals that oscillate at baseband frequencies. Similar to previously described embodiments, node730is an “RF cold point” in that, at RF frequencies, impedance at node730through internal baseband decoupling circuit710may be significantly greater (e.g., roughly 5 times greater) than the impedance at node730through capacitor728. At node730, external baseband decoupling circuit706may have an even greater impedance (e.g., roughly 30 times greater) than the impedance through capacitor728at RF frequencies. For example, at RF frequencies (e.g., frequencies greater than 1 GHz), as observed from node730, capacitor728may exhibit an impedance between about 0.2 ohms and about 0.7 ohms, internal baseband decoupling circuit710may exhibit an impedance between about 1.2 ohms and about 5 ohms, and external baseband decoupling circuit706may exhibit an impedance between about 15 ohms and about 30 ohms. The capacitor728and circuits710,706may exhibit lower or higher impedances than the above-given ranges, as well.

At low frequencies (e.g., baseband frequencies), current is directed to ground through baseband decoupling circuits706and710, rather than through capacitor728or to gate740through inductance747. External decoupling circuit706may provide the lowest impedance path to ground for signals having frequencies less than a first threshold (e.g., 30 megahertz (MHz)), while baseband decoupling circuit710may provide the lowest impedance path to ground for signals having frequencies between the first threshold (e.g., 30 MHz) and a second threshold (e.g., 1 GHz). For example, at baseband frequencies less than the first threshold, as observed from node730, capacitor728may exhibit an impedance between about 20 ohms and about 1000 ohms, internal baseband decoupling circuit710may exhibit an impedance between about 1 ohm and about 6 ohms, and external baseband decoupling circuit706may exhibit an impedance between about 0.3 ohms and about 1 ohm. At baseband frequencies between the first threshold and the second threshold, as observed from node730, capacitor728may exhibit an impedance between about 20 ohms and about 100 ohms, internal baseband decoupling circuit710may exhibit an impedance between about 0.5 ohms and about 1 ohm, and external baseband decoupling circuit706may exhibit an impedance between about 1 ohm and about 10 ohms. Once again, the capacitor728and circuits710,706may exhibit lower or higher impedances than the above-given ranges, as well.

By directing signals at baseband frequencies to ground through baseband decoupling circuits706and710, IMD products occurring at or near baseband frequencies may be removed from the input signal, which may increase the signal-to-noise ratio for amplifier system700compared to circuit configurations that lack these baseband decoupling circuits. By using a low-pass input matching network (e.g., input matching network708) that includes a two-section low-pass filter (e.g., inductances746,747and capacitors728,749) to create an RF cold point at node730to which input-side baseband terminating circuits (e.g., internal baseband decoupling circuit710and external baseband decoupling circuit706) may be connected, decoupling of baseband frequency signal energy (e.g., including intermodulation distortion products) may be improved with negligible gain/VBW compromise.

It should be noted that another difference between the system700and previously-described embodiments is that system700includes an external gate bias circuit712that includes a quarter wave transmission line752, a capacitor754, and bias voltage source750coupled to input node722and ground reference720(e.g., ground reference node that is coupled to an external ground reference). In some embodiments, capacitor754and quarter wave transmission line752may be coupled in series between input node722and ground reference720. At a node between the transmission line752and capacitor754, the bias voltage source750may generate and provide a gate bias voltage Vgg for gate terminal740. In an alternate embodiment, the gate bias voltage may be provided at a node between inductance714and capacitor718of external baseband decoupling circuit706, as previously described.

The foregoing description refers to elements or nodes or features being “connected” or “coupled” together. As used herein, unless expressly stated otherwise, “connected” means that one element is directly joined to (or directly communicates with) another element, and not necessarily mechanically. Likewise, unless expressly stated otherwise, “coupled” means that one element is directly or indirectly joined to (or directly or indirectly communicates with, electrically or otherwise) another element, and not necessarily mechanically. Thus, although the schematic shown in the figures depict one exemplary arrangement of elements, additional intervening elements, devices, features, or components may be present in an embodiment of the depicted subject matter.

In accordance with an embodiment, a device may include an amplifier, an input terminal, a first ground terminal, an impedance matching network, and a first baseband decoupling circuit. The amplifier may include a control terminal. The impedance matching network may be electrically connected between the control terminal of the amplifier and the input terminal. The impedance matching network may include a radio frequency (RF) cold point node that provides a low impedance path to the first ground terminal for signals within a predetermined frequency range. The first baseband decoupling circuit may be electrically connected between the RF cold point node and the first ground terminal.

In accordance with another aspect of the embodiment, the device may include a second baseband decoupling circuit that is coupled in parallel with the first baseband decoupling circuit. The second baseband decoupling circuit may be electrically connected to the RF cold point node.

In accordance with another aspect of the embodiment, the first baseband decoupling circuit may include a first resistance, a first inductor, and a first capacitor that are electrically connected in series between the RF cold point node and the first ground terminal. The first baseband decoupling circuit may be a low impedance path to the first ground terminal for baseband frequency signals that oscillate at baseband frequencies.

In accordance with another aspect of the embodiment, the second baseband decoupling circuit may include a second resistance, a second inductor, and a second capacitor that are electrically connected in series between the RF cold point node and a second ground terminal.

In accordance with another aspect of the embodiment, the impedance matching network may include a first capacitor electrically connected between the RF cold point node and the first ground terminal, and a first inductance electrically connected between the RF cold point node and the control terminal of the amplifier.

In accordance with another aspect of the embodiment, the impedance matching network may include a second inductance electrically connected between the first ground terminal and the input terminal, and a second capacitor electrically connected between the input terminal and the RF cold point node.

In accordance with another aspect of the embodiment, the impedance matching network may include a bypass resistor electrically connected in parallel with the second capacitor between the input terminal and the RF cold point node, and a third capacitor electrically connected between the second inductance and the first ground terminal.

In accordance with another aspect of the embodiment, the amplifier may include a high electron mobility transistor formed on a semiconductor substrate.

In accordance with an embodiment, a system may include a packaged electronic device and that includes a transistor, an RF input terminal, a first ground reference node, and an impedance matching network. The transistor may have a control terminal. The impedance matching network may be electrically connected between the control terminal of the transistor and the RF input terminal. The impedance matching network may include a radio frequency (RF) cold point node that presents a low impedance path to the first ground reference node for signals within a predetermined frequency range. The system may further include a second baseband decoupling circuit having a portion that is external to the packaged electronic device and that is connected between the RF cold point node and a second ground reference node.

In accordance with another aspect of the embodiment, the first baseband decoupling circuit may include a first resistance, a first inductance, and a first capacitor that are electrically connected in series between the RF cold point node and the first ground reference node.

In accordance with another aspect of the embodiment, the second baseband decoupling circuit may include a second resistance, a second inductance, and a second capacitor, that are electrically connected in series between the RF cold point node and the second ground reference node.

In accordance with another aspect of the embodiment, the second inductance may include a plurality of bond wires and a package lead. The second resistance may include a surface mount resistor. The second capacitor may include a surface mount capacitor.

In accordance with another aspect of the embodiment, the impedance matching network may include a first capacitor electrically connected between the RF cold point node and the first ground reference node, and a first inductance electrically connected between the RF cold point node and the control terminal of the transistor.

In accordance with another aspect of the embodiment, the impedance matching network may include a second inductance electrically connected between the first ground reference node and the RF input terminal, and a second capacitor electrically connected between the RF input terminal and the RF cold point node.

In accordance with another aspect of the embodiment, the impedance matching network may include a bypass resistor electrically connected in parallel across the second capacitor between the RF input terminal and the RF cold point node, and a third capacitor electrically connected between the second inductance and the first ground reference node.

In accordance with an embodiment, a packaged RF amplifier device may include a transistor, a first lead, and an integrated device electrically coupled between the first lead and the transistor. The integrated device may include a portion of an impedance matching circuit that includes a RF cold point node, and a first baseband decoupling circuit that is coupled to the RF cold point node of the impedance matching circuit. The packaged RF amplifier device may further include a second lead that is coupled to the RF cold point node.

In accordance with another aspect of the embodiment, the first baseband decoupling circuit may include a first resistance, a first inductance, and a first capacitor. The packaged RF amplifier device may further include a first ground terminal. The first resistance, the first inductance, and the first capacitor may be coupled in series between the RF cold point node and the first ground terminal. The first baseband decoupling circuit may be configured to pass signal energy at baseband frequencies to the first ground terminal.

In accordance with another aspect of the embodiment, the second lead may form a portion of a second baseband decoupling circuit that includes the second lead, a second resistance, a second inductance, and a second capacitor that are coupled in series between the RF cold point node and a second ground terminal that is external to the packaged RF amplifier device.

In accordance with another aspect of the embodiment, the impedance matching network may include a first capacitor coupled between the RF cold point node and a ground terminal, a first inductance coupled between the RF cold point node and the transistor, a second inductance coupled between the ground terminal and the first lead, and a second capacitor coupled between the first lead and the RF cold point node.

In accordance with another aspect of the embodiment, the integrated device may include a semiconductor substrate. The transistor may include a high electron mobility transistor.