CMOS image sensor and method for manufacturing the same

A CMOS image sensor and a method for manufacturing the same are provided. The CMOS image sensor may be capable of improved thickness uniformity form microlenses formed at a reduced distance from the photodiodes. The CMOS image sensor can include: a semiconductor substrate on which a pixel array is formed, the pixel array including photodiodes formed on the semiconductor substrate to different depths for sensing red, green, and blue signals, respectively; an interlayer dielectric formed on the semiconductor substrate and having a trench at an upper portion of the pixel array; an insulating layer sidewall formed at a side of the trench; and a plurality of microlenses formed on the interlayer dielectric in the trench at predetermined intervals.

This application claims priority under 35 U.S.C. §119(e) of Korean Patent Application No. 10-2005-0133164 filed Dec. 29, 2005, which is incorporated herein by reference in its entirety.

FIELD OF THE INVENTION

The present invention relates to an image sensor and a method for manufacturing the same, and more particularly, to a CMOS image sensor capable of improving the uniformity of a microlens array in the CMOS image sensor during a formation process of the microlens array, and a method for manufacturing the same.

BACKGROUND OF THE INVENTION

In general, image sensors are semiconductor devices that transform an optical image to electrical signals. Among the types of image sensors, a CMOS (complementary-metal-oxide-semiconductor) image sensor has adapted a switch mode by forming transistors for each unit pixel with a CMOS technology, and using control circuits and signal-processing circuits in conjunction with the transistors to sequentially detect outputs.

Efforts are continually being made to improve the photosensitivity of the image sensor.

For example, the CMOS image sensor is composed of a photodiodes for sensing light and a CMOS logic circuit for processing the sensed light into electric signals to convert them to data. For better photosensitivity, two methods have been proposed. In a first method, efforts are used to increase an occupied area of the photodiode with respect to the total area of the image sensor. In a second method, technologies are used to reduce an incident path of light, to form a microlens at an upper portion thereof, and to receive more light in a photodiode region.

The CMOS image sensor is classified as a 3T type, a 4T type or a 5T type according to the number of transistors formed in a unit pixel. The 3T type CMOS image sensor includes a single photodiode and three transistors, and the 4T type CMOS image sensor includes a single photodiode and four transistors. The 3T CMOS image sensor will now be described with reference to an equivalent circuit diagram and a layout thereof.

FIG. 1is an equivalent circuit diagram of a 3T type CMOS image sensor according to the related art.FIG. 2is a layout view showing a unit pixel of the 3T type CMOS image sensor.

As shown inFIG. 1, the unit pixel of the typical 3T CMOS image according to the related art includes one photodiode (PD) and three NMOS transistors T1, T2and T3. The photodiode includes a cathode connected to the drain of the first NMOS transistor T1and the gate of the second NMOS transistor T2.

Further, the sources of the first and second NMOS transistors T1and T2are connected to a power line that supplies a reference voltage, and the gate of the first NMOS transistor T1is connected to a reset line that supplies a reset signal.

The source of the third NMOS transistor T3is connected to the drain of the second NMOS transistor, and the drain of the third NMOS transistor T3is connected to a reading circuit (not shown) through a signal line. The gate of the third NMOS transistor T3is connected to a column selection line that supplies a selection signal SLCT.

Accordingly, the first NMOS transistor T1functions as a reset transistor Rx, the second NMOS transistor T2functions as a driver transistor DX, and the third NMOS transistor T3functions as a selection transistor Sx.

As shown inFIG. 2, an active region10is defined for a general unit pixel of the 3T CMOS image sensor. One photodiodes20is formed at a wider part of the active region10. Three gate electrodes120,130,140of the transistors overlap the remaining parts of the active region10.

FIGS. 3A through 3Fare cross-sectional views for describing a method for manufacturing a CMOS sensor having a vertical photodiodes construction according to the related art.

Referring toFIG. 3A, a pixel array32is formed by selectively implanting impurity ions in a semiconductor substrate31at a photodiode region. The pixel array32includes photodiodes, which are formed at the semiconductor substrate31to different depths and sense red (R), green (G), and blue (B) signals, respectively.

Next, a device (not shown) for processing signals and a multilayer metal wire (not shown) are sequentially formed on the semiconductor substrate31in which the pixel array32is formed. The multilayer metal wire functions to connect respective parts to each other.

Then, an interlayer dielectric33is formed at an entire surface of the semiconductor substrate31. An oxide layer is formed on the interlayer dielectric33to obtain a passivation layer34in order to protect the device from moisture or an externally physical shock.

Referring toFIG. 3b, after a photoresist35is coated on the passivation layer34, the photoresist35is selectively patterned to expose an upper portion of the pixel array32by exposure and developing processes.

As shown inFIG. 3C, the passivation layer34formed at an upper portion of the pixel array32is selectively removed using the patterned photoresist35as a mask.

The process for selectively removing the passivation layer34includes a pad opening process for exposing a metal pad, which is formed at a pad region of the semiconductor substrate31.

Referring toFIG. 3D, the photoresist35is removed, and an interlayer dielectric33disposed at an upper portion of the pixel array32is selectively removed through a dry etch by performing photolithography and etch processes, thereby forming a trench36to a predetermined depth from a surface of the interlayer dielectric.

As shown inFIG. 3E, a photoresist layer37afor a microlens is coated on an entire surface of the semiconductor substrate31.

Referring toFIG. 3F, after the photoresist layer37afor a microlens is selectively patterned, a reflow process is performed to form a plurality of microlenses37at predetermined intervals on the interlayer dielectric33in the trench36.

However, in the conventional method for manufacturing the semiconductor device, as shown inFIG. 3E, the interlayer dielectric33and the passivation layer34disposed at a side of the trench36have a vertical profile when coating the photoresist layer37a. Accordingly, the photoresist layer37ais not coated with uniform thickness and causes striation.

BRIEF SUMMARY

Accordingly, embodiments of the present invention are directed to a CMOS image sensor and a method for manufacturing the same that substantially obviates one or more problems due to limitations and disadvantages of the related art.

An object of embodiment of the present invention is to provide a CMOS image sensor and a method for manufacturing the same, which is capable of reducing the distance of light passed through a microlens to a photodiode and preventing the occurrence of striation upon coating a photoresist layer for the microlens.

To achieve these objects and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, there is provided a CMOS (complementary metal oxide semiconductor) image sensor comprising: a semiconductor substrate on which a pixel array is formed, the pixel array comprising photodiode formed on the semiconductor substrate to different depths for sensing red, green, and blue signals, respectively; an interlayer dielectric formed at an upper portion of the pixel array having a trench of a predetermined depth formed therein; an insulating layer sidewall formed at an inner side of the trench of the interlayer dielectric; and a plurality of microlenses formed on the interlayer dielectric in the trench at predetermined intervals.

In another aspect of the present invention, there is provided a method for manufacturing a CMOS image sensor comprising the steps of: forming a pixel array for sensing red, green, and blue signals on a semiconductor substrate; sequentially forming an interlayer dielectric and a passivation layer on the semiconductor substrate including the pixel array; selectively removing the passivation layer and the interlayer dielectric at an upper portion of the pixel array to form a trench to a predetermined depth from a surface; forming an insulating layer sidewall at an inner side of the trench of the interlayer dielectric; and forming a plurality of microlenses on the interlayer dielectric in the trench.

DETAILED DESCRIPTION OF THE INVENTION

Hereinafter, the image sensor and a method for manufacturing the same according to an embodiment of the present invention will be described with reference to the accompanying drawings in detail.

FIG. 4gis a cross-sectional view showing a CMOS image sensor according to an embodiment the present invention.

As shown inFIG. 4g, the CMOS image sensor comprises a semiconductor substrate101, an interlayer dielectric103, an insulating layer sidewall107, and a plurality of microlenses108. A pixel array can be formed in the semiconductor substrate101. The pixel array includes photodiodes, which are formed on the semiconductor substrate101to different depths and sense red R, green G, and blue B signals, respectively. The interlayer dielectric103can be formed on the semiconductor substrate101to have a trench of a predetermined depth at an upper portion of the pixel array. The insulating layer side wall107can be formed at an inner side of the trench of the interlayer dielectric103. The plurality of microlens108can be formed on the interlayer dielectric103in the trench106at predetermined intervals.

A plurality of devices and metal wires can be formed on the semiconductor substrate101except for above the pixel array102. A passivation layer104can be further formed thereon for protecting a device from moisture and external physical shock.

The insulating layer side wall can have a slope angle ranging from 40 to 70 degrees.

FIGS. 4A through 4Gare cross-sectional views for describing a method for manufacturing a CMOS sensor according to an embodiment of the present invention.

Referring toFIG. 4A, a pixel array can be formed by selectively implanting impurity ions in the semiconductor substrate101. The pixel array102includes photodiodes, which are formed at a photodiodes region to have different depths and can sense red R, green G, and blue B signals, respectively.

Here, a red R photodiode can be formed at the deepest position, and a green G photodiode and a blue B photodiode can be sequentially formed on the red photodiode.

Further, the red R photodiode may be formed to a predetermined depth in a surface of the semiconductor substrate101, and the green G photodiode may be formed to a predetermined depth in a surface of a first epitaxial layer, which is formed by a first epitaxial process of the semiconductor substrate101. Moreover, the blue B photodiode can be formed to a predetermined depth in a surface of a second epitaxial layer, which is formed on the first epitaxial layer by a second epitaxial process of the semiconductor substrate101.

Next, a device (not shown) for processing signals and multilayer metal wiring (not shown) can be sequentially formed on the semiconductor substrate101in which the pixel array102is formed. The multilayer metal wiring functions to connect respective parts to each other.

Then, an interlayer dielectric103can be formed on an entire surface of the semiconductor substrate101. An oxide layer can be formed on the interlayer dielectric103to form a passivation layer104for protecting the device from moisture or an external physical shock.

Referring toFIG. 4B, after a photoresist105is coated on the passivation layer104, the photoresist105can be selectively patterned to expose the passivation layer104at an upper portion of the pixel array102by exposure and developing processes.

Referring toFIG. 4C, the passivation layer104formed at the upper portion of the pixel array102can be selectively removed using the patterned photoresist105as a mask.

In a further embodiment, the process for selectively removing the passivation layer104can include a pad opening process for exposing a metal pad, which is formed at a pad region of the semiconductor substrate101.

Referring toFIG. 4D, the photoresist105can be removed, and the interlayer dielectric103disposed at the upper portion of the pixel array102can be selectively removed through a dry etch by performing photolithography and etch processes, thereby forming a trench106to a predetermined depth from a surface.

Here, a reason of forming the trench106in the interlayer dielectric103at an upper portion of the pixel array102is for reducing the distance between a microlens and the pixel array101in order to improve the sensitivity.

Although the embodiment described above indicates that the passivation layer104and the interlayer dielectric103are removed by separate photolithography and etch processes, the present invention is not limited thereto. For example, the trench can be formed using the photoresist105as a mask without removing the photoresist105.

In another embodiment, the trench may be formed by selectively removing the interlayer dielectric103using the passivation layer104as a hard mask layer.

Referring to an insulating layer sidewall107can be formed at sidewalls of the interlayer dielectric103and the passivation layer104by coating an entire surface of the semiconductor substrate101having the trench106with an insulating layer, and then etching back the insulating layer.

A reason for forming the insulating layer sidewall107is to reduce the rapid slope of a side of the trench106, which is formed at the interlayer dielectric103.

It is preferred that the insulating layer sidewall has a slope angle ranging from 40 to 70 degrees. So as to do this, in a specific embodiment the insulating layer is preferably formed to have a thickness ranging from 1 to 2 μm.

The insulating layer can be formed of an HDP oxide layer, an oxide system PSG or USG, a PETEOS layer, or a silicon nitride Si3N4.

Referring toFIG. 4F, an entire surface of the semiconductor substrate101including the insulating layer sidewall107and the trench106can be coated with a photoresist layer108afor a microlens.

Here, upon coating the entire surface of the semiconductor substrate101with a photoresist layer108afor a microlens, because a side of the trench106has a predetermined slope due to the insulating layer sidewall107, no striation is formed in the photoresist layer108a, and the entire surface of the semiconductor substrate101can be coated with a photoresist layer108ahaving a uniform thickness.

Referring toFIG. 4G, after the photoresist layer108afor the microlens is selectively patterned, a reflow process can be performed to form a plurality of microlenses108at predetermined intervals on the interlayer dielectric103in the trench106.

Here, the reflow process can be carried out by a hot plate or a furnace. At this time, a curvature of the microlens108changes according to constricting and heating methods. The collimating effect also varies according to the curvature of the microlens108.

Next, infrared rays can be irradiated to the microlens108to cure the microlens108. Here, the microlens108can maintain an optimal curvature radius by irradiating the infrared rays to the microlens108.

As is clear from the forgoing description, the CMOS image sensor and a method for manufacturing the same according to embodiments of the present invention have following advantages.

That is, because microlenses are formed in a trench, a path of light being incident to a photodiodes through a microlens is reduced to increase the efficiency of the light. In addition, because an insulating layer sidewall is formed at a side of a trench, during a coating of the photoresist layer for a microlens, striation can be prevented from occurring, thereby forming the microlens with uniform thickness.