Sync mark system for two dimensional magnetic recording

A data processing system includes an analog to digital converter operable to sample an analog signal obtained from a magnetic storage medium to yield digital samples, and a sync mark detector operable to search for a particular one of a number of sync marks in the digital samples. Each of the data tracks on the magnetic storage medium is associated with one of the sync marks. The sync mark on each of the data tracks has a different pattern than the sync marks on neighboring tracks.

FIELD OF THE INVENTION

Various embodiments of the present invention provide systems and methods for locating the position of the start of user data in each sector in each track, and more particularly to a sync mark system with multiple alternating sync mark patterns.

BACKGROUND

In a typical magnetic storage system, digital data is stored in a series of concentric circles or spiral tracks along a storage medium. Data is written to the medium by positioning a read/write head assembly over the medium at a selected location as the storage medium is rotated, and subsequently passing a modulated electric current through the head assembly such that a corresponding magnetic flux pattern is induced in the storage medium. To retrieve the stored data, the head assembly is positioned again over the track as the storage medium is rotated. In this position, the previously stored magnetic flux pattern induces a current in the head assembly that can be converted to the previously recorded digital data. The location of the start of user data is detected using a sync mark stored on the storage medium.

SUMMARY

Various embodiments of the present invention provide systems, apparatuses and methods for locating the position of the start of user data in each sector in each track in a two dimensional magnetic recording system using multiple alternating sync mark patterns.

In some embodiments, a data processing system includes an analog to digital converter operable to sample an analog signal obtained from a magnetic storage medium to yield digital samples, and a sync mark detector operable to search for a particular one of a number of sync marks in the digital samples. Each of the data tracks on the magnetic storage medium is associated with one of the sync marks. The sync mark on each of the data tracks has a different pattern than the sync marks on neighboring tracks.

This summary provides only a general outline of some embodiments of the invention. The phrases “in one embodiment,” “according to one embodiment,” “in various embodiments”, “in one or more embodiments”, “in particular embodiments” and the like generally mean the particular feature, structure, or characteristic following the phrase is included in at least one embodiment of the present invention, and may be included in more than one embodiment of the present invention. Importantly, such phrases do not necessarily refer to the same embodiment. This summary provides only a general outline of some embodiments of the invention. Additional embodiments are disclosed in the following detailed description, the appended claims and the accompanying drawings.

DETAILED DESCRIPTION OF THE INVENTION

In the sync mark system disclosed herein for two dimensional magnetic recording, at least two different sync marks are included to enable sync mark detection and to reduce the likelihood of false detection of sync marks in neighboring data tracks. In the two dimensional magnetic recording system, multiple readers are provided on a read/write head assembly. In embodiments with relatively narrow track width, there can be significant interference from neighboring tracks while reading a target track. The different sync marks are used in alternating data tracks, so the sync marks that are sought while reading a target track are different than those in the neighboring tracks. The sync marks are selected patterns or sequences with high auto-correlation values, so that a sync mark detector will readily detect the sync mark in the target track. The sync marks also have low cross-correlation values, so that when the sync mark detector is searching for a particular sync mark in the target track, the likelihood of false detection of another sync mark in a neighboring track is reduced or eliminated.

Turning toFIG. 1, a magnetic storage medium100is shown with an example data track116and its two adjacent neighboring data tracks118,120, indicated as dashed lines. The tracks116,118,120are segregated by servo data written within servo wedges112,114. It should be noted that while three tracks116,118,120and two servo wedges112,114are shown, hundreds of wedges and tens of thousands of tracks may be included on a given storage medium.

The servo wedges112,114include servo data130that is used for control and synchronization of a read/write head assembly over a desired location on storage medium100. In particular, the servo data130generally includes a preamble pattern132followed by a servo address mark134, a Gray code136, a burst field138, and a repeatable run-out (RRO) field140. In some embodiments, a servo data set has two or more fields of burst information. It should be noted that different information can be included in the servo fields. Between the servo data bit patterns130aand130b, a user data region142is provided. User data region142can include one or more sets of data that are stored to storage medium100. The data sets can include user synchronization information some of which may be used as a mark to establish a point of reference from which processing of the data within user data region142may begin.

The sync mark system for two dimensional magnetic recording is operable to detect target track sync marks with a reduced likelihood of erroneously detecting different sync marks in neighboring tracks.

In operation, storage medium100is rotated in relation to a sensor that senses information from the storage medium. In a read operation, the sensor would sense servo data from wedge112(i.e., during a servo data period) followed by user data from a user data region between wedge112and wedge114(i.e., during a user data period) and then servo data from wedge114. In a write operation, the sensor would sense servo data from wedge112then write data to the user data region between wedge112and wedge114, with location information in the user data region provided by a user sync mark144and a user preamble146.

As used herein, the phrase “sync mark” is used in its broadest sense to mean any pattern that may be used to establish a point of reference. Thus, for example, the different alternating sync mark patterns disclosed herein are used in some embodiments as user sync marks144as are known in the art, or for one or more portions of servo data bit patterns130. Based upon the disclosure provided herein, one of ordinary skill in the art may recognize other sync marks that could be used in relation to different embodiments of the present invention.

Turning toFIG. 2, a storage system200is disclosed which includes a read channel circuit202with a sync mark detector which detects multiple different sync marks on alternating tracks in accordance with some embodiments of the present invention. Storage system200may be, for example, a hard disk drive. Storage system200also includes a preamplifier204, an interface controller206, a hard disk controller210, a motor controller212, a spindle motor214, a disk platter216, and a read/write head assembly220. Interface controller206controls addressing and timing of data to/from disk platter216. The data on disk platter216consists of groups of magnetic signals that may be detected by read/write head assembly220when the assembly is properly positioned over disk platter216. In one embodiment, disk platter216includes magnetic signals recorded in accordance with either a longitudinal or a perpendicular recording scheme.

In a typical read operation, read/write head assembly220is accurately positioned by motor controller212over a desired data track on disk platter216. Motor controller212both positions read/write head assembly220in relation to disk platter216and drives spindle motor214by moving read/write head assembly220to the proper data track on disk platter216under the direction of hard disk controller210. Spindle motor214spins disk platter216at a determined spin rate (RPMs). Once read/write head assembly220is positioned adjacent the proper data track, magnetic signals representing data on disk platter216are sensed by read/write head assembly220as disk platter216is rotated by spindle motor214. The sensed magnetic signals are provided as a continuous, minute analog signal representative of the magnetic data on disk platter216. This minute analog signal is transferred from read/write head assembly220to read channel circuit202via preamplifier204. Preamplifier204is operable to amplify the minute analog signals accessed from disk platter216. In turn, read channel circuit202digitizes and decodes the received analog signal to recreate the information originally written to disk platter216. This data is provided as read data222to a receiving circuit. A write operation is substantially the opposite of the preceding read operation with write data224being provided to read channel circuit202. This data is then encoded and written to disk platter216. During read operations, read channel circuit202searches for a sync mark to locating the position of the start of user data. Different sync marks are written to alternating data tracks, reducing the likelihood of erroneously detecting a sync mark in a neighboring track when searching for a sync mark in a target track. In some embodiments, the sync mark detector in the read channel circuit202is adapted to search for the particular sync mark associated with the target track. Such a sync mark detector which detects multiple different sync marks on alternating tracks can be implemented consistent with that disclosed in relation toFIGS. 3-8. In some cases, methods of detecting different sync marks on alternating tracks are performed consistent with the flow diagram disclosed in relation toFIG. 9.

It should be noted that in some embodiments storage system200is integrated into a larger storage system such as, for example, a RAID (redundant array of inexpensive disks or redundant array of independent disks) based storage system. Such a RAID storage system increases stability and reliability through redundancy, combining multiple disks as a logical unit. Data may be spread across a number of disks included in the RAID storage system according to a variety of algorithms and accessed by an operating system as if it were a single disk. For example, data may be mirrored to multiple disks in the RAID storage system, or may be sliced and distributed across multiple disks in a number of techniques. If a small number of disks in the RAID storage system fail or become unavailable, error correction techniques may be used to recreate the missing data based on the remaining portions of the data from the other disks in the RAID storage system. The disks in the RAID storage system may be, but are not limited to, individual storage systems such storage system200, and may be located in close proximity to each other or distributed more widely for increased security. In a write operation, write data is provided to a controller, which stores the write data across the disks, for example by mirroring or by striping the write data. In a read operation, the controller retrieves the data from the disks. The controller then yields the resulting read data as if the RAID storage system were a single disk.

In addition, it should be noted that in some embodiments storage system200is modified to include solid state memory that is used to store data in addition to the storage offered by disk platter216. This solid state memory may be used in parallel to disk platter216to provide additional storage. In such a case, the solid state memory receives and provides information directly to read channel circuit202. Alternatively, the solid state memory may be used as a cache where it offers faster access time than that offered by disk platter216. In such a case, the solid state memory may be disposed between interface controller206and read channel circuit202where it operates as a pass through to disk platter216when requested data is not available in the solid state memory or when the solid state memory does not have sufficient storage to hold a newly written data set. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of storage systems including both disk platter216and a solid state memory.

Turning toFIG. 3, a series of three read heads306,310,312is shown as it could be positioned to read three adjacent data tracks300,302,304in a two dimensional magnetic recording system in accordance with some embodiments of the present invention. In this embodiments, multiple read heads306,310,312are positioned to read multiple data tracks300,302,304simultaneously. Because of the width of the data tracks300,302,304and the size and position of the read heads306,310,312, the data signals from each of the read heads306,310,312can have a significant interference component from adjacent data tracks. In some embodiments, the width of each of the read heads306,310,312is larger than the width of a single data track300,302,304. The sectors in adjacent data tracks300,302,304are not necessarily aligned.

During operation, the disk platter spins and the read heads306,310,312move over the data tracks300,302,304searching for sync marks in preparation for a read or write operation. The read head306passes over data track300, for example reading from preamble320and sync mark322to prepare to read or write a user data field324, but receiving some signal contribution from neighboring data track302(and another neighboring data track, not shown). The read head310passes over data track302, for example reading from preamble326and sync mark330to prepare to read or write a user data field332, but receiving some signal contribution from neighboring data tracks300,304. The read head312passes over data track304, for example reading from preamble334and sync mark336to prepare to read or write a user data field340, but receiving some signal contribution from neighboring data track302(and another neighboring data track, not shown). The readback signal from read head310can therefore contain a significant contribution from data tracks300and304as it reads target data track302.

In some embodiments, the model for the readback signal obtained from read head310is set forth in Equation 1:
r2(t)=s2(t)+γ1s1(t−Δt1)+γ3s3(t−Δt3)+n2(t)  (Eq 1)

where r2(t) is the readback signal from read head310, where s1is the signal contribution from neighboring track300, offset by a Δt1based on the offset between data tracks300and302, and the offset between read heads306and310, where γ1is a power coefficient indicating the level of interference from track300, where s3is the signal contribution from neighboring track304, offset by a Δt3based on the offset between data tracks300and304, and the offset between read heads310and312, where γ3is a power coefficient indicating the level of interference from track304, and where n2(t) is the noise in the readback signal. The readback signal r2(t) from read head310thus contains three sync mark components, one from the target track302and two from neighboring tracks300,304. By using a different sync mark in neighboring tracks300,304, false detection of those sync marks when reading the target track302will be avoided, even when the level of interference from neighboring tracks300,304is relatively large.

Turning toFIG. 4, a series of three read heads442,444,446is shown as it could be positioned to read a data track402, with two adjacent data tracks400,404also shown in a two dimensional magnetic recording system in accordance with some embodiments of the present invention. In this embodiments, multiple read heads442,444,446are positioned to read one data track402, generating multiple readback signals that can be jointly processed to improve data detection. Because of the width of the data tracks400,402,404and the size and position of the read heads442,444,446, the data signals from one or more of the read heads442,444,446can have a significant interference component from adjacent data tracks. Each data track400,402,404can contain one or more data sectors, with a preamble420,426,434and sync mark422,430,436identifying the location of the data field424,432,440. When reading data track402, the readback signals from read heads (e.g.,442,446) can contain significant contributions from neighboring data tracks (e.g.,400,404, respectively) as they read target data track402. By using different sync marks in alternating data tracks, e.g., one sync mark pattern in data track402and a different sync mark pattern in neighboring data tracks400,404, detection of the sync mark pattern in the target data track402can be improved while reducing likelihood of false detection of sync marks422,436in neighboring data tracks400,404.

When selecting bit patterns to use as the sync marks, patterns with good auto-correlation values δ(k) are selected to allow the sync marks to be detected. In some embodiments of this selection process, a threshold value for the δ(k) is used, considering from among a group of candidate patterns to find those that have auto-correlation values δ(k) above the threshold. In some embodiments, the auto-correlation value δ(k) is given by the discrete time convolution summation in Equation 2:

where g1(n) is the sync mark being sought in the target track and g1(n+k) is the sync mark, offset by k, in the received data from the target track.

Furthermore, when selecting bit patterns to use as the sync marks, patterns with low cross-correlation values are selected to prevent false detection of sync marks from neighboring tracks based on interference from neighboring tracks during read and write operations. In some embodiments of this selection process, patterns are sought with cross-correlation values of zero, or in other embodiments, with cross-correlation values below a lower threshold. In some embodiments, the cross-correlation is given by the discrete time convolution summation in Equation 3:

where g2(n) is the sync mark in the neighboring track which should not be detected, and g1(n+k) is the sync mark, offset by k, in the received data from the target track.

The correlation algorithms applied herein, including auto-correlation and cross-correlation, can be any suitable correlation algorithm, such as, but not limited to, direct correlation, block correlation, norm-distance based approaches, etc. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of correlation algorithms that may be used both when selecting patterns for use as sync marks and when detecting sync marks during read and write operations.

In the sync mark system for two dimensional magnetic recording disclosed herein, at least two different sync marks500,502are used in alternating data tracks as shown inFIG. 5, such that the different sync marks500,502have different bit patterns or sequences. In some embodiments, one sync mark500is used on every other data track, such as, but not limited to, odd numbered tracks, and another sync mark502is used on the intervening data tracks, such as, but not limited to, even numbered tracks. In other embodiments, more than two different sync marks are used, such that sync marks in any given target track are different from and have low cross-correlation values with sync marks in its adjacent neighboring tracks.

In some embodiments, the sync marks are Gold codes or Gold sequences, binary codes with bounded low cross-correlations within a set. A set of Gold codes contains (2n−1) sequences with length (2n−1). A number of criteria are applied to the set of Gold codes to select the sync marks to be stored on the storage medium and detected when reading from the storage medium to locate the start of user data. Each Gold sequence has a good auto-correlation property, facilitating sync mark detection, and any arbitrary pair of Gold sequences have low cross-correlation, although particular sequences can be selected for use which provide a good balance of high auto-correlation and low cross-correlation values. The highest absolute cross-correlation value among the set of (2n−1) sequences is (2(n+2)/2+1) for even n and for (2(n+1)/2+1) for odd n.

When selecting from among the Gold sequences to use as the sync marks, patterns that are balanced, that is, having a number of 0's and 1's that differs by only one, or that are nearly balanced, will reduce the direct current (DC) component in the readback signal. This simplifies the design and operation of an analog front end in the read channel that compensates for DC bias in the readback signal. The level at which each selected Gold sequence used as a sync mark is balanced can be selected as desired based on the level of DC bias that can be corrected in the analog front end and based on the characteristics of the available Gold sequences. For example, in some embodiments it may be desirable to accept a small amount of DC bias from an incompletely balanced Gold sequences but which have superior auto-correlation levels and/or lower cross-correlation levels.

The set of Gold sequences from which the sync marks are selected are generated in some embodiments using two maximum length sequences. Maximum length sequences are pseudorandom binary bit sequences that can be generated using maximal linear feedback shift registers. The term “maximum length sequence” is derived from the fact that they are periodic and reproduce every binary sequence that can be represented by the shift registers, i.e., for length-n registers they produce a sequence of length of (2n−1). The pair of maximum length sequences to be used to generate the set of Gold sequences have length (2n−1) and a cross-correlation less than or equal to (2(n+2)/2), where n is the size of the linear feedback shift register used to generate the maximum length sequences. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize how to generate a pair of maximum length sequences with a cross-correlation less than or equal to (2(n+2)/2).

To generate the Gold sequences from the pair of maximum length sequences, one of the maximum length sequences is fixed in position while the other is shifted through a series of circular shifts of the second of the maximum length sequences, combining the fixed first sequence with each of the shifted second sequences in XOR operations to generate the set of Gold sequences. For example, the following pair of maximum length sequences c1 and c2, each with length 31, can be combined to form a set of 31 Gold sequences:

If c1 is fixed and c2 is shifted through each possible circular shift, and the two are combined in an XOR operation, the result is a member of the set of Gold sequences. One Gold sequence is generated with a circular shift of 0 in c2, where c2 appears as above. (In some embodiments, 0's in the patterns set forth herein are stored as −1's on the magnetic storage medium, but are shown herein as 0's for simplicity.) Another Gold sequence is generated with a circular shift of 1 in c2, as follows:

Based upon the disclosure provided herein, one of ordinary skill in the art will recognize how to generate a set of Gold sequences based a pair of maximum length sequences. Because the resulting set of Gold sequences contains more than two patterns, an opportunity is provided to select a pair of Gold sequences from the set which will meet the needs of a particular recording system. The Gold sequences will have relatively high auto-correlation values and relatively low cross-correlation values. In some embodiments, additional criteria by which the Gold sequences to use as sync marks are selected from the set includes selecting sequences with patterns that have a relatively low probability of appearing in user data, sequences that have less impact on or cross-correlation with the preamble, and sequences that are balanced to reduce the DC component of the readback signal.

Turning toFIG. 6, a graph600shows a plot of auto-correlation values602for a first Gold sequence, correlated with shifted versions of itself as occurs when the sync mark detector searches for the first Gold sequence in the readback signal as it is shifted in bit by bit when reading a data track using the first Gold sequence as the sync mark. Notably, the auto-correlation values602for the first Gold sequence have a relatively high peak (at shift offset 31 where the first Gold sequence is fully shifted into the sync mark detector). The auto-correlation values602for the first Gold sequence have relatively low auto-correlation values at other shift values, where the first Gold sequence is offset and the sync mark detector is also considering preamble data or user data along with a portion of the first Gold sequence.

Graph600also shows a plot of auto-correlation values604for a second Gold sequence, correlated with shifted versions of itself as occurs when the sync mark detector searches for the second Gold sequence in the readback signal as it is shifted in bit by bit when reading a data track using the second Gold sequence as the sync mark. Notably, the auto-correlation values604for the second Gold sequence have a relatively high peak (at shift offset 31 where the second Gold sequence is fully shifted into the sync mark detector). The auto-correlation values604for the second Gold sequence have relatively low auto-correlation values at other shift values, where the second Gold sequence is offset and the sync mark detector is also considering preamble data or user data along with a portion of the second Gold sequence.

Graph600also shows a plot of cross-correlation values606between the first and second Gold sequences, showing a relatively low cross-correlation for all shift values. As a result, the likelihood of false detection of a sync mark in a neighboring track when reading a target track is low.

Turning toFIG. 7, a plot700shows cross-correlation values702between a first Gold sequence and shifted versions of the first Gold sequence at different circular shift indexes. Lower cross-correlation values indicate shifted versions of the first Gold sequence that are good candidates for use as a sync mark on alternate data tracks from the first Gold sequence. Notably, a peak in the cross-correlation values702between about shift indexes 10 and 15 indicate that shifted Gold sequences from indexes 10 and 15 would not be the best candidates to select. In some embodiments, a threshold is used to identify shift indexes for good candidates, such as, but not limited to, a peak correlation value of about 10.5.

Plot700also shows cross-correlation values704between the preamble and shifted versions of the first Gold sequence at different circular shift indexes. For example, at sequence shift index 6, the absolute peak sidelobe value for the cross-correlation between the 6thGold sequence and the first Gold sequence is 7. Again, lower cross-correlation values indicate shifted versions of the first Gold sequence that are good candidates for use as a sync mark. In some embodiments, a threshold is used to identify shift indexes for good candidates, such as, but not limited to, a peak correlation value of about 7.5. An example of a good candidate selected for a sync mark based on the cross-correlation values702,704is at sequence shift index 6 (among others), where the cross-correlation values702,704both fall below the mentioned thresholds. Similar consideration of cross-correlation between the second Gold sequence and non-return to zero (NRZ) data in the readback signal can be used to help select a candidate Gold sequence for use as a sync mark.

In some embodiments, the sync marks used in the two dimensional magnetic recording system are not Gold codes, but shift tolerant orthogonal sequences. In these embodiments, the offset between different sync marks on adjacent tracks is limited to a maximum phase offset of D bits, so the cross-correlation constraints are relaxed. The maximum phase offset of D is a limit on the offset between the two sequences when used as sync marks on alternating tracks. If D=2, the offset can be −2, −1, 0, 1 or 2. If D=4, the offset can be −4, −3, −2, −1, 0, 1, 2, 3, or 4. Because of this limit, the cross-correlation only needs to be considered at the allowable offsets, rather than across the entire sequences. In these embodiments, a set of pseudo-random patterns {gi} are used as the sync marks for different data tracks, satisfying:

where the sync pattern length is L+2D, and where D is the maximum write phase offset between the neighboring tracks (excluding effects of inter-symbol interference). As a special case, the sync pattern length can be L, by assuming the preamble 2T pattern and user data patterns for preceding and following bits, respectively.

For example, the following pair of shift tolerant orthogonal sequences g1 and g2 are used in some embodiments as sync marks in alternating data tracks:

where L=20 and D=2, where the bold sections of g1 and g2 are sync patterns of length L, the preceding two bits are preamble bits and the following two bits are user data bits. For these shift tolerant orthogonal sequences g1 and g2, the auto-correlation and cross-correlation values can be represented as:

In some embodiments with L=20 and D=4, the following pair of shift tolerant orthogonal sequences g1 and g2 are used as sync marks in alternating data tracks:

where the bold sections of g1 and g2 are sync patterns of length L, and the preceding four bits are preamble bits and the following two bits are user data bits. For these shift tolerant orthogonal sequences g1 and g2, the auto-correlation and cross-correlation values can be represented as:

With leading preamble and following user data bits, the shift tolerant orthogonal sequences have somewhat different auto-correlation and cross-correlation values depending on the values of the leading preamble and following user data bits:

Turning toFIG. 8, a data processing circuit800is showing including a sync mark detector820for multiple sync marks826,832in accordance with some embodiments of the present invention. Data processing circuit800is operable to read a data track with multiple read sensors. From a first read sensor, a first analog front end circuit804receives an analog signal802read from the data track. Analog front end circuit804processes analog signal802and provides a processed analog signal806to an analog to digital converter circuit810. Analog front end circuit804may include, but is not limited to, a DC compensation circuit, an analog filter and an amplifier circuit as are known in the art. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of circuitry that may be included as part of analog front end circuit804. In some cases, analog input signal802is derived from a read/write head assembly (not shown) that is disposed in relation to a storage medium (not shown). Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of sources from which analog signal802may be derived.

Analog to digital converter circuit810converts processed analog signal806into a corresponding series of digital samples812. Analog to digital converter circuit810can be any circuit known in the art that is capable of producing digital samples corresponding to an analog input signal. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of analog to digital converter circuits that may be used in relation to different embodiments of the present invention.

From a second read sensor, a second analog front end circuit824receives an analog signal822read from the data track. Analog front end circuit824processes analog signal822and provides a processed analog signal826to an analog to digital converter circuit830. Analog front end circuit824may include, but is not limited to, a DC compensation circuit, an analog filter and an amplifier circuit as are known in the art. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of circuitry that may be included as part of analog front end circuit824.

Analog to digital converter circuit830converts processed analog signal826into a corresponding series of digital samples832. Analog to digital converter circuit830can be any circuit known in the art that is capable of producing digital samples corresponding to an analog input signal. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of analog to digital converter circuits that may be used in relation to different embodiments of the present invention.

A joint equalizer circuit834receives digital samples812,832and applies a joint equalization algorithm to digital samples812,832to yield an equalized output836corresponding to the data track being read. In some embodiments of the present invention, equalizer circuit834is a digital finite impulse response filter circuit as are known in the art.

Equalized output836is provided to a sync mark detector840. Sync mark detector840compares equalized output836as it is received with a sync mark target for one of multiple sync marks846,852, selected based on the target data track and the particular sync mark associated with the target data track. In some embodiments, the sync mark target is obtained by convolving the sync mark pattern with an equalization target response which is sometimes also known as partial response target. A multiplexer854selects between the multiple sync marks846,852under control of a sync mark select signal856, yielding the sync mark860being sought.

Again, at least two different sync marks846,852are used in alternating data tracks, such that the different sync marks846,852have different bit patterns or sequences. In some embodiments, one sync mark846is used on every other data track, such as, but not limited to, odd numbered tracks, and another sync mark852is used on the intervening data tracks, such as, but not limited to, even numbered tracks, with the sync mark select signal856controlling the multiplexer854based on the sync mark used in the target track. In other embodiments, more than two different sync marks are used, such that sync marks in any given target track are different from and have low cross-correlation values with sync marks in its adjacent neighboring tracks.

The sync marks846,852are stored in sync mark pattern registers844,850in some embodiments. Sync mark pattern registers844,850can either be hard coded, or reprogrammable depending upon the particular implementation. In some embodiments of the present invention, the sync marks846,852stored in sync mark pattern registers844,850are Gold sequences selected based on the criteria disclosed above. In some other embodiments of the present invention, the sync marks846,852stored in sync mark pattern registers844,850are shift tolerant orthogonal sequences.

Sync mark detector840compares equalized output836as it is received with the sync mark860(or sync mark target) corresponding with the target track being read, yielding a sync found signal842when the sync mark860is detected. This indicates the location of the start of user data in that particular sector.

The algorithm applied by sync mark detector840to correlate the equalized output836with the sync mark860to detect the sync mark can be any suitable correlation algorithm, such as, but not limited to, direct correlation, block correlation, norm-distance based approaches, etc. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of correlation algorithms that could be used by sync mark detector840in relation to different embodiments of the present invention. In some embodiments, the comparison metric is a Euclidean distance between equalized output836and the a target output for the sync mark860in accordance with the following equation:

where k represents an individual sample value. In some embodiments, the sync mark target is obtained by convolving the sync mark pattern860with an equalization target response which is sometimes also known as partial response target. When the metric exceeds a threshold, the sync mark detector840asserts the sync found signal842, indicating that the sync mark860has been detected in equalized output836.

In some embodiments, the sync mark detector operates on the digital samples, or X samples, from the analog to digital converters810,830, rather than on equalized samples836, or Y samples, from the joint equalizer834.

Turning toFIG. 9, a data processing circuit900is showing including a sync mark detector940for multiple sync marks946,952in accordance with some embodiments of the present invention. Data processing circuit900is operable to read multiple data tracks with multiple read sensors, or more particularly, to read two data tracks with two read sensors. A sync found signal is produced for each of the two data tracks, by detecting a different sync mark in each of the two data tracks. From a first read sensor, a first analog front end circuit904receives an analog signal902read from the first data track. Analog front end circuit904processes analog signal902and provides a processed analog signal906to an analog to digital converter circuit910. Analog front end circuit904may include, but is not limited to, a DC compensation circuit, an analog filter and an amplifier circuit as are known in the art. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of circuitry that may be included as part of analog front end circuit904. In some cases, analog input signal902is derived from a read/write head assembly (not shown) that is disposed in relation to a storage medium (not shown). Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of sources from which analog signal902may be derived.

Analog to digital converter circuit910converts processed analog signal906into a corresponding series of digital samples912. Analog to digital converter circuit910can be any circuit known in the art that is capable of producing digital samples corresponding to an analog input signal. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of analog to digital converter circuits that may be used in relation to different embodiments of the present invention.

From a second read sensor, a second analog front end circuit924receives an analog signal922read from the second data track. Analog front end circuit924processes analog signal922and provides a processed analog signal926to an analog to digital converter circuit930. Analog front end circuit924may include, but is not limited to, a DC compensation circuit, an analog filter and an amplifier circuit as are known in the art. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of circuitry that may be included as part of analog front end circuit924.

Analog to digital converter circuit930converts processed analog signal926into a corresponding series of digital samples932. Analog to digital converter circuit930can be any circuit known in the art that is capable of producing digital samples corresponding to an analog input signal. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of analog to digital converter circuits that may be used in relation to different embodiments of the present invention.

A joint equalizer circuit934receives digital samples912,932and applies a joint equalization algorithm to digital samples912,932to yield an equalized output916corresponding to the data track being read. In some embodiments of the present invention, equalizer circuit934is a digital finite impulse response filter circuit as are known in the art.

Equalized output936, corresponding to the first data track being read, is provided to a sync mark detector940. Sync mark detector940compares equalized output936as it is received with a sync mark target for one of multiple sync marks946,952, selected based on the target data track and the particular sync mark associated with the target data track. In some embodiments, the sync mark target is obtained by convolving the sync mark pattern with an equalization target response which is sometimes also known as partial response target. A multiplexer954selects between the multiple sync marks946,952under control of a sync mark select signal956, yielding the sync mark960being sought.

Again, at least two different sync marks946,952are used in alternating data tracks, such that the different sync marks946,952have different bit patterns or sequences. In some embodiments, one sync mark946is used on every other data track, such as, but not limited to, odd numbered tracks, and another sync mark952is used on the intervening data tracks, such as, but not limited to, even numbered tracks, with the sync mark select signal956controlling the multiplexer954based on the sync mark used in the target track. In other embodiments, more than two different sync marks are used, such that sync marks in any given target track are different from and have low cross-correlation values with sync marks in its adjacent neighboring tracks.

The sync marks946,952are stored in sync mark pattern registers944,950in some embodiments. Sync mark pattern registers944,950can either be hard coded, or reprogrammable depending upon the particular implementation. In some embodiments of the present invention, the sync marks946,952stored in sync mark pattern registers944,950are Gold sequences selected based on the criteria disclosed above. In some other embodiments of the present invention, the sync marks946,952stored in sync mark pattern registers944,950are shift tolerant orthogonal sequences.

Sync mark detector940compares equalized output936as it is received with the sync mark960(or sync mark target) corresponding with the target track being read, yielding a sync found signal942when the sync mark960is detected. This indicates the location of the start of user data in that particular sector in the first data track.

Equalized output966, corresponding to the second data track being read, is provided to a second sync mark detector970, which searches for a different sync mark than sync mark detector940. Sync mark detector970compares equalized output966with a sync mark target for one of multiple sync marks976,982, selected based on the target data track and the particular sync mark associated with the target data track. In some embodiments, the sync mark target is obtained by convolving the sync mark pattern with an equalization target response which is sometimes also known as partial response target. A multiplexer984selects between the multiple sync marks976,982under control of a sync mark select signal986, yielding the sync mark990being sought.

The sync marks976,982are stored in sync mark pattern registers974,980, which, in some embodiments, are the same registers as944,950. In some embodiments of the present invention, the sync marks976,982are Gold sequences selected based on the criteria disclosed above. In some other embodiments of the present invention, the sync marks976,982are shift tolerant orthogonal sequences.

Sync mark detector970compares equalized output966with the sync mark990(or sync mark target) corresponding with the target track being read, yielding a sync found signal972when the sync mark990is detected. This indicates the location of the start of user data in that particular sector in the second data track.

Turning toFIG. 10, a flow diagram1000shows a method for locating the position of the start of user data in a data track in accordance with some embodiments of the present invention. Following flow diagram1000, a data input is received, read from a current track on a magnetic storage medium. (Block1002) A sync mark is selected from among a number of different sync marks used on the magnetic storage medium, where the selected sync mark is associated with the current track. (Block1004) In some embodiments, the sync marks are different Gold sequences with relatively high auto-correlation values and relatively low cross-correlation values with each other and with the preamble and NRZ data. In some embodiments, the sync marks are shift tolerant orthogonal sequences with relatively high auto-correlation values and with relatively low cross-correlation values over limited offsets. The sync mark is searched for in the data from the current track to locate the position of the start of user data. (Block1006)

In conclusion, the present invention provides novel sync mark systems and methods for two dimensional magnetic recording. While detailed descriptions of one or more embodiments of the invention have been given above, various alternatives, modifications, and equivalents will be apparent to those skilled in the art without varying from the spirit of the invention. Therefore, the above description should not be taken as limiting the scope of the invention, which is defined by the appended claims.