Semiconductor device

A current limiting circuit is connected to the gate (input terminal) of an amplifying transistor. The current limiting circuit includes a protecting transistor, a first protecting resistor connecting the drain to the gate of the protecting transistor, and a second protecting resistor connecting the source to the gate of the protecting transistor. The current limiting circuit limits current, so that electric power larger than the maximum electric power allowable for the amplifying transistor does not pass.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a small and light semiconductor device that can be manufactured at low costs, and is highly resistant to destruction even if excessively large electric power is supplied.

2. Background Art

FIG. 22is a circuit diagram showing a conventional single-stage amplifier. An amplifying transistor11is a field effect transistor (FET) used for high-frequency waves of 0.1 GHz to 110 GHz, for example, the 2.1 GHz band. Input signals from the exterior are inputted in the gate (input terminal) of the amplifying transistor11. The output signals of the amplifying transistor11are outputted to an antenna (not shown) from the drain (output terminal) via a matching circuit27. Generally in communications systems and radars, a plurality of amplifiers are connected to the antenna to output electric waves.

However, if the antenna is positioned in the vicinity of a metal surface, outputted electromagnetic waves may be reflected and fed back to the amplifying transistor11. In such a case, if large electric power is fed back, the amplifying transistor11may be destructed. To prevent this, an isolator100is connected to the output side of the amplifying transistor11(for example, refer to Japanese Patent Laid-Open No. 4-31782).

FIG. 23is a graph showing the results of calculations for the input-output characteristics of a conventional amplifier at 2.1 GHz. InFIG. 23, Pindenotes input power, Podenotes output power, Iddenotes drain current, and Igdenotes gate current. The gate width of the amplifying transistor11is 1 mm, and the maximum current Imaxis 400 mA. It is known from these results that an average current of 50 mA/mm flows in the gate when Pinexceeds 25 dBm. Since the amplifying transistor11is destructed if such a large current flows, input of Pinnot less than 25 dBm must be prevented.

FIG. 24is a circuit diagram showing a conventional terminating resistor. An end of the terminating resistor53is grounded in terms of high-frequency waves. In microwave-band equipment, the resistance value of the terminating resistor53is 50Ω, which is common as impedance.

FIG. 25is a circuit diagram showing a conventional T-shaped attenuator. First and second resistors54and55are connected in series. An end of a third resistor56is connected to the connecting point of the first resistor54and the second resistor55, and the other end is grounded in terms of high-frequency waves. By selecting the resistance values of the first to third resistors54to56, a desired attenuation can be obtained.

SUMMARY OF THE INVENTION

In the circuit shown inFIG. 22, since the isolator100is a magnetic circuit, there is a problem wherein the size and weight are increased, and the magnet is enlarged to treat large electric power, resulting in high costs. There is also a problem wherein an excessively high high-frequency voltage is supplied to the gate by unexpected electromagnetic conduction or the failure of the equipment, and the amplifying transistor11is destructed.

Also in the circuits shown inFIGS. 24 and 25have a problem wherein if high-frequency signals exceeding the allowable power are supplied, the terminating resistor53or first to third resistors54to56are burned and destructed. In order to elevate the allowable power, the sizes of the terminating resistor53or first to third resistors54to56must be enlarged to improve heat dissipation, and there is a problem of high costs due to the elevation of the sizes and weights of the terminating resistor53or first to third resistors54to56.

To solve the above-described problems, it is an object of the present invention to provide a small and light semiconductor device that can be manufactured at low costs, and is highly resistant to destruction even if excessively large electric power is supplied.

According to one aspect of the present invention, a semiconductor device comprising: an amplifying transistor and a current limiting circuit connected to the input terminal of said amplifying transistor, wherein said current limiting circuit limits current so that an electric power larger than the maximum electric power allowable to said amplifying transistor does not pass.

According to the present invention, a small and light semiconductor device that is highly resistant to destruction even if an excessive electric power is supplied can be obtained at low costs.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

First Embodiment

FIG. 1is a circuit diagram showing a semiconductor device according to the first embodiment of the present invention. An amplifying transistor11is a field effect transistor used for high-frequency waves not less than 0.1 GHz and not more than 110 GHz, for example, in the 2.1 GHz band. A current limiting circuit12is connected to the gate (input terminal) of the amplifying transistor11. The source of the amplifying transistor11is grounded in terms of high-frequency waves, and output signals are outputted from the drain (output terminal) of the amplifying transistor11.

The current limiting circuit12has a protecting transistor13, a first protecting resistor14that connects the source and the gate of the protecting transistor13, and a second protecting resistor15that connects the drain and the gate of the protecting transistor13.

FIG. 2is a top view showing the semiconductor device according to the first embodiment of the present invention. Active regions16are formed by implanting an impurity into a semiconductor layer. The interiors of the active regions16function as transistors. Source electrodes17and a drain electrode18are ohmically connected to the active regions16. Gate electrodes19are provided between the source electrodes17and the drain electrode18. These source electrodes17, drain electrode18, and gate electrodes19constitute the amplifying transistor11.

A source electrode21and a drain electrode22are ohmically connected to the active regions16. A gate electrode23is provided between the source electrode21and the drain electrode22. These source electrode21, drain electrode22, and gate electrode23constitute the protecting transistor13. The source electrode21and the gate electrode23of the protecting transistor13are connected by a first protecting resistor14composed of a metal film, and the drain electrode22and the gate electrode23are connected by a second protecting resistor15composed of a metal film. The drain electrode22of the protecting transistor13is connected to the gate electrodes19of the amplifying transistor11.

FIG. 3is a graph showing the results of calculating the voltage-current characteristics of a current limiting circuit according to the first embodiment of the present invention when the resistance value of the first and second resistors is 50 kΩ; andFIG. 4is a graph showing the results of calculating the voltage-resistance characteristics of the same current limiting circuit. If the voltage across the ends of the current limiting circuit12is as low as not exceeding 0.4 V, the current limiting circuit12exhibits linear voltage-current characteristics, similar to the voltage-current characteristics of a resistor. Here, the resistance value per unit gate width is about 1.3Ω. Specifically, the current flowing through the current limiting circuit12is 300 mA/mm or less, the current limiting circuit12functions as a resistor of 1.3Ω. On the other hand, when the current exceeds 300 mA/mm, the resistance value of the current limiting circuit12is sharply elevated, and current exceeding 420 mA/mm does not flow.

Even when high-frequency signals with an excessive electric power are thus inputted as input signals, the current limiting circuit12limits current so that electric power larger than the maximum power allowable to the amplifying transistor11does not pass. Therefore, a semiconductor device that is highly resistant to destruction even if an excessive electric power is supplied can be obtained. The current limiting circuit12can also be realized to be small and light at low costs.

FIG. 5is a graph showing the results of calculating input-output characteristics when a current limiting circuit of the maximum current of 86 mA is connected to an amplifying transistor.FIG. 6is a circuit diagram showing a circuit used for calculation. The circuit has a configuration wherein matching circuits26and27are connected to the input terminal and the output terminal, respectively, and electric power is supplied from the exterior to the amplifying transistor11. The gate width of the protecting transistor13is 0.2 mm. Since the maximum current of the amplifying transistor11is 400 mA, the current limiting circuit12limits the current to ⅕ the maximum current of the amplifying transistor11.

From the results of calculation, no gate current flows even when the input power up to 50 dBm is supplied. Although the amplifying transistor11was conventionally destructed when the input power was elevated to 25 dBm, after providing a current limiting circuit12the amplifying transistor11is not destructed even when the input power is 50 dBm. Therefore, when a current limiting circuit12that limits current to ⅕ or lower the maximum current of the amplifying transistor11is used, a semiconductor device that is highly resistant to destruction even if an excessive electric power is supplied can be obtained.

When impedance Zo is 50Ω and the input power is 50 dBm, the voltage supplied to the current limiting circuit12is about +35 V. Therefore, to allow the semiconductor device according to the present invention to function, both the breakdown voltage between the gate and the drain and the breakdown voltage between the gate and the source of the protecting transistor13must be at least 35V. This is a value that can be realized in a GaAs transistor. However, if a GaN transistor is used as the protecting transistor13, higher breakdown voltage, such as 60V or higher, can be realized.

FIG. 7is a graph showing the results of calculating input-output characteristics when a current limiting circuit of the maximum current of 26 mA is connected to an amplifying transistor. The gate width of the protecting transistor13is 0.06 mm. Since the maximum current of the amplifying transistor11is 400 mA, the current limiting circuit12limits the current to 1/15 the maximum current of the amplifying transistor11. Since the current limiting circuit12limits current to be lower than the current in the example shown inFIG. 5, it functions as a limiter amplifier that limits output power to be constant against input power within a wide range between 16 and 50 dBm.

FIG. 8is a graph showing the results of calculating the voltage-current characteristics of a current limiting circuit according to the first embodiment of the present invention when the resistance value of the first resistors is 50 kΩ and the resistance value of second resistors is 150 kΩ; andFIG. 9is a graph showing the results of calculating the Voltage-resistance characteristics of the same current limiting circuit. Even when the resistance value of the first protecting resistor14is different from the resistance value of the second protecting resistor15, current can be similarly limited. However, the current values become asymmetric depending to whether the voltage across the current limiting circuit12is positive or negative. Therefore, there is disadvantage wherein direct-current components are strayed by the asymmetry of wave forms when high-frequency power is supplied. Therefore, to obtain a constant output power especially as a limiter amplifier, it is preferable that the resistance values of the first and second resistors14and15are equalized, and the current flowing into the current limiting circuit12is symmetry to the polarity of the voltage supplied to the current limiting circuit12.

If the current limiting circuit12provided in the close vicinity of the gate of the amplifying transistor11, unnecessary LC parasitic components do not enter between the current limiting circuit12and the gate of the amplifying transistor11, the current of the current limiting circuit12becomes the gate current of the amplifying transistor11as it is, and high-frequency current can be more limited.

In the first embodiment, although a field effect transistor is used as the amplifying transistor, other types of transistors, such as a bipolar transistor, may also be used. Also in the first embodiment, although a source-grounded transistor is used as the amplifying transistor11, the present invention is not limited thereto, but a gate-grounded transistor may also be used. In this case, the current limiting circuit12is connected to the source of the amplifying transistor11. If a similar current limiting circuit is connected to the input terminal of other high-frequency circuit, such as a phase shifter and a switch, the other high-frequency circuit can be protected from excessive electric power.

Second Embodiment

FIG. 10is a circuit diagram showing a semiconductor device according to the second embodiment of the present invention; andFIG. 11is a top view showing the semiconductor device according to the second embodiment of the present invention. The current limiting circuit12has a transmission line model (TLM) structure equivalent to the epitaxial structure of a double hetero PHEMT (pseudomorphic high electron mobility transistor) without a gate. Other configurations are same as the configurations of the first embodiment.

FIG. 12is a sectional view showing a current limiting circuit according to the second embodiment of the present invention. A buffer layer32, an n-AlGaAs layer33, an i-InGaAs layer34, an n-AlGaAs layer35, an i-AlGaAs layer36, an i-GaAs layer37, and an n-GaAs layer38are sequentially laminated on an n-GaAs substrate31. To the active regions formed in the semiconductor layers, first and second electrodes39and40are ohmically connected. Specifically, the current limiting circuit has an epitaxial structure that becomes a PHEMT when a gate electrode is added.

FIG. 13is a graph showing the voltage-current characteristics of a current limiting circuit according to the second embodiment of the present invention. As shown in the graph, the current limiting circuit12according to the second embodiment has current limiting characteristics similar to the current limiting characteristics of the first embodiment. Therefore, a semiconductor device that is highly resistant to destruction even if an excessive electric power is supplied can be obtained. The second embodiment has advantages wherein the structure is simpler and the chip area is smaller than those in the first embodiment.

It is known that although the maximum current changes little when the length LTLMis increased, the linear resistance value when the voltage supplied to the current limiting circuit12is low is elevated. When input power is small, since the lower the resistance, the lower the passage loss, and lower linear resistance value is desirable, a shorter LTLMis preferable. On the other hand, since higher breakdown voltage of the current limiting circuit12is desirable for elevating the maximum allowable power, a longer LTLMis preferable. The optimal length LTLMis determined by the tradeoff of these factors.

As shown inFIG. 14, by forming an n′ layer41(high concentration region) in the active region by the implantation of an impurity between the first electrode39and the second electrode40, the electric field can be reduced, and breakdown voltage can be elevated. Furthermore, as shown inFIG. 15, by forming a recess42in the active region between the first electrode39and the second electrode40, the linear resistance value can be lowered while elevating breakdown voltage. Also by using a GaN layer as the semiconductor layer, the linear resistance value can be lowered and breakdown voltage can be elevated without enlarging the length LTLM.

Although an epitaxial structure of a double hetero HEMT is used in the second embodiment, other epitaxial structures, such as HFET (hetero-structure field effect transistor) and MESFET (metal semiconductor field effect transistor) can also be used.

Third Embodiment

FIG. 16is a circuit diagram showing a semiconductor device according to the third embodiment of the present invention. A current limiting circuit12is connected to the drain (output terminal) of an amplifying transistor11via a matching circuit27. The current limiting circuit12limits current so as not to pass an electric power larger than the maximum power allowed to the amplifying transistor11. The configuration of the current limiting circuit12is the same as the current limiting circuit12according to the embodiments 1 and 2.

Thereby, since the current limiting circuit12limits current even if excessive electric power returns from the output side, no excessive electric power is supplied to the drain of the amplifying transistor11. Therefore, a semiconductor device that is highly resistant to destruction even if an excessive electric power is supplied can be obtained. In addition, since an isolator, which has been conventionally required can be omitted, the size and weight of the semiconductor device can be reduced, and costs can be lowered.

In the third embodiment, although the current limiting circuit12is connected to the outside of the matching circuit27, the current limiting circuit12can be connected to the middle of the matching circuit27.

Fourth Embodiment

FIG. 17is a circuit diagram showing a semiconductor device according to the fourth embodiment of the present invention. An end of a ¼ wavelength line51is connected to the drain (output terminal) of an amplifying transistor11via a matching circuit27and a current limiting circuit12a. An end of a current limiting circuit12bis connected to the other end of the ¼ wavelength line51, and the other end of the current limiting circuit12bis grounded in terms of high-frequency waves. The configuration of the current limiting circuits12aand12bis the same as the current limiting circuit12according to the embodiments 1 and 2.

In the third embodiment, although no return power from the output side passes when the output end is short-circuited or has intermediate impedance, there is possibility that only voltage is supplied and no current is supplied to destruct the amplifying transistor11, when the output impedance is open and the output of the amplifying transistor11is turned off. Whereas, in the fourth embodiment, even when only voltage is supplied, the current limiting circuit12bconnected to the ¼ wavelength line51limits the current. Therefore, output is short-circuited by the ¼ wavelength line51, and the supply of excessive voltage to the amplifying transistor11is prevented.

Fifth Embodiment

FIG. 18is a circuit diagram showing a semiconductor device according to the fifth embodiment of the present invention. An end of a current limiting circuit12is connected to a terminating resistor53, and the other end of the current limiting circuit12is grounded in terms of high-frequency waves. The configuration of the current limiting circuit12is the same as the current limiting circuit12according to the embodiments 1 and 2. The sum of the linear resistance value of the current limiting circuit12and the resistance value R of the terminating resistor53is set to agree with the impedance Zo.

When the maximum power allowed to the terminating resistor53is Pmax(W), the current ITLMflowing in the current limiting circuit12is given by the following Formula 1:

ITLM<π4⁢2⁢PMAXR[Formula⁢⁢1]
where π/4 is a factor wherein the fundamental wave component of a square wave is corrected.

If the current limiting circuit12is designed so as to satisfy the above-described conditions, the current limiting circuit12can limit current so that no electric power larger than the allowable maximum power Pmaxpasses through the terminating resistor53. For example, when the current of the current limiting circuit12is 0.157 A for the terminating resistor53having a resistance of 50Ω and an allowable power of 1 W, the maximum power supplied to the terminating resistor53becomes 1 W. At this time, 100-W high-frequency power having impedance Zo of 50Ω is supplied, the voltage of the current limiting circuit12is about 50 V. Consequently, if the breakdown voltage of the current limiting circuit12is not lower than 50 V, the terminating resistor53is not burned. Therefore, a semiconductor device that is highly resistant to destruction even if an excessive electric power is supplied can be obtained. In the fifth embodiment, although the impedance of the terminating resistor53is 50Ω, the present invention is not limited thereto, but the terminating resistor53may have any impedance.

Sixth Embodiment

FIG. 19is a circuit diagram showing a semiconductor device according to the sixth embodiment of the present invention. First and second resistors54and55are connected in series. An end of a third resistor56is connected to the connecting point of the first resistor54and the second resistor55, and the other end is grounded in terms of high-frequency waves. Current limiting circuits12aand12bare connected to the first resistor54and the second resistor55, respectively. The current limiting circuits12aand12bhave the same configuration as the current limiting circuits according to the first and second embodiments, and limit current so that no power larger than the allowable maximum power passes through the first to third resistors54to56.

Thereby, since current is limited by the current limiting circuits12aand12beven if high-frequency signals of excessive power are supplied to the input-output terminal, the first to third resistors54to56become difficult to burn. Therefore, a semiconductor device that is highly resistant to destruction even if an excessive electric power is supplied can be obtained.

The resistance values of the first to third resistors54to56are set so that desired attenuation and input-output impedance are obtained by adding the linear resistance of the current limiting circuits12aand12b. Instead of the current limiting circuits12aand12b, either one of them can also be used.

Seventh Embodiment

FIG. 20is a circuit diagram showing a semiconductor device according to the seventh embodiment of the present invention. A plurality of amplifying transistors11ato11care connected in parallel. A plurality of current limiting circuits12ato12care connected to the gates (input terminals) of the amplifying transistors11ato11c, respectively. Each of the current limiting circuits12ato12chas the same configuration of the current limiting circuits according to the first and second embodiments, and limits current so that no power larger than the allowable maximum power passes through the corresponding amplifying transistors11ato11c.

Since each amplifying transistor is thus provided with a current limiting circuit, high-frequency current flowing in the gate of each amplifying transistor can be limited without intervention of unnecessary parasitic components of LC compared with the case wherein current flowing through a plurality of amplifying transistors are collectively limited. Therefore, even high-frequency waves, such as millimeter-waves, can limit high-frequency current flowing through the gate of each amplifying transistor. Thereby, the semiconductor device is highly resistant to destruction even if excessive power is supplied, and can be used as a limiter amplifier at high frequencies.

In the seventh embodiment, although each amplifying transistor is equipped with a current limiting circuit, each group of two or more amplifying transistors may be equipped with a current limiting circuit.

Eighth Embodiment

FIG. 21is a circuit diagram showing a semiconductor device according to the eighth embodiment of the present invention. A plurality of current limiting circuits12ato12care connected to the gate (input terminal) of an amplifying transistor in series. The plurality of current limiting circuits12ato12chave the same configuration as the current limiting circuits according to the first and second embodiments, and limit current so that no power larger than the allowable maximum power passes through the amplifying transistor11.

In the eighth embodiment, since three current limiting circuits are connected in series, the semiconductor device can resist to a voltage three times the breakdown voltage of each current limiting circuit. Therefore, a semiconductor device that is highly resistant to destruction even if an excessive electric power is supplied can be obtained.

In the eighth embodiment, although three current limiting circuits are provided, the present invention is not limited thereto, but the provision of two or more current limiting circuits is required.

The entire disclosure of a Japanese Patent Application No. 2007-137127, filed on May 23, 2007 including specification, claims, drawings and summary, on which the Convention priority of the present application is based, are incorporated herein by reference in its entirety.