Cryocooler controller systems and methods

Techniques are disclosed for systems and methods to control operation of a cryocooler/refrigeration system to provide cryogenic and/or general cooling of a device or sensor system. A cryocooler controller includes a motor driver controller configured to generate motor driver control signals based on operational parameters corresponding to operation of a cryocooler controlled by the controller, and a motor driver configured to generate corresponding drive signals to drive a motor of the cryocooler. The motor driver includes a first stage with a first pair of switches coupled serially between an input of the motor driver and a ground of the motor driver, a second pair of switches coupled serially between an output of the first stage and the ground of the motor driver, and an inductor coupled between the first and second pairs of switches, where operation of each switch is independently controlled by the motor driver control signals.

TECHNICAL FIELD

One or more embodiments of the invention relate generally to cryogenic refrigeration devices and more particularly, for example, to controllers for refrigeration systems and methods.

BACKGROUND

Cryogenic refrigeration systems, or cryocoolers, are typically used to cool other devices to temperatures approaching or below approximately 120 Kelvin, and, more generally, can be used to cool devices to between 200 and 60 Kelvin, for example, depending on the overall heat load presented by a particular device. Such cooled devices are often one of a variety of different types of sensor systems that operate better (e.g., produce measurements with less noise, higher sensitivity, higher accuracy, higher responsiveness, and/or with other generally more desirable performance metrics) when cooled. For example, one such category of sensor systems that can benefit from being cooled includes infrared cameras (e.g., including a focal plane array (FPA) of individual infrared sensors), which measure or capture infrared (e.g., thermal) emissions from objects as infrared/thermal images and/or video. Cooling such infrared cameras generally increases detector sensitivity (e.g., by decreasing thermal noise intrinsic to the individual infrared sensors), which can result in overall more accurate and reliable infrared imagery.

Cryocoolers for use with infrared cameras can be quite small (e.g., designed to fit within a volume of approximately 3×3×2 inches, or less), yet be able to provide sufficient cooling power (e.g., a measure, typically in Watts, of a refrigerator's ability to extract heat from a coupled device) to cool at least portions of an infrared camera to the range of temperatures desired for, for example, relatively low noise thermal imagery, while experiencing the thermal load typical of an operating infrared camera. Waste heat generated by system electronics, such as a controller for the cryocooler (e.g., a device configured to power and operate the cryocooler according to a desired temperature and/or other operating parameters) can have substantial negative impact on the weight, cost, and overall performance of the cryocooler and/or sensor system. Moreover, reductions in system size and weight, and increases in electrical efficiency, can be helpful to facilitate various low power, size, and weight applications, including integration with a flight platform.

Thus, there is a need in the art for a relatively compact and efficient cryocooler controller that is able to maintain or increase overall system performance relative to conventional controllers.

SUMMARY

Techniques are disclosed for systems and methods to control operation of a cryocooler/refrigeration system to provide cryogenic and/or general cooling of a device or sensor system.

In one embodiment, a system may include a motor driver controller configured to receive operational parameters corresponding to operation of a cryocooler controlled by the cryocooler controller and generate motor driver control signals based, at least in part, on the received operational parameters. The system may also include a motor driver configured to receive the motor driver control signals from the motor driver controller and generate drive signals based, at least in part, on the motor driver control signals, to drive a motor of the cryocooler. The motor driver may include a first stage including or consisting of a first pair of switches coupled serially between an input of the motor driver and a ground of the motor driver, a second pair of switches coupled serially between an output of the first stage and the ground of the motor driver, and an inductor coupled between the first and second pairs of switches, where operation of each switch of the first and second pairs of switches is independently controlled by the motor driver control signals generated by the motor driver controller.

In another embodiment, a method may include receiving operational parameters corresponding to operation of a cryocooler controlled by a cryocooler controller, generating motor driver control signals based, at least in part, on the received operational parameters, receiving, by a motor driver of the cryocooler controller, the motor driver control signals, and generating, by the motor driver of the cryocooler controller, drive signals to drive a motor of the cryocooler. The motor driver may include a first stage comprising or consisting of a first pair of switches coupled serially between an input of the motor driver and a ground of the motor driver, a second pair of switches coupled serially between an output of the first stage and the ground of the motor driver, and an inductor coupled between the first and second pairs of switches, where operation of each switch of the first and second pairs of switches is independently controlled by the motor driver control signals generated by the motor driver controller.

DETAILED DESCRIPTION

In accordance with various embodiments of the present disclosure, compact and powerful refrigeration systems and methods may advantageously employ an efficient and flexible cryocooler controller that includes a low power but highly flexible and feature-rich motor driver controller and a robust motor driver design that can be implemented with few electrical components yet generate a relatively clean/noise-free and configurable/variable drive signal for driving a motor for the refrigeration system. For example, the motor driver for the cryocooler controller may be implemented by a buck-boost inverter stage including only four switches and an inductor and a commutator stage including only an additional four switches. The motor driver controller can control operation of the 8 total switches to produce an alternating current (AC) output signal with a configurable/variable frequency, amplitude, and/or other waveform characteristics, for example, and the drive signal produced by the motor driver can be generated with a voltage amplitude exceeding the input voltage level of a direct current (DC) input power signal provided to the motor driver. The buck-boost inverter stage may additionally include a single capacitor that, with the inductor, form a single low pass filter that is integrated with the buck-boost inverter stage and that substantially eliminates switching and/or other system noise from the AC output signal generated by the motor driver.

By limiting the number of components in the motor driver, embodiments of the cooler controller can be configured to produce driver signals at a device efficiency (e.g., defined as the rms output power delivered to the motor for the refrigeration system divided by the rms input power provided to all the elements of the cryocooler controller) greater than approximately 95-96% across the full range of power supplied to the motor for the refrigeration system. Conventional controllers typically only reach efficiencies approaching 90% or worse and, moreover are typically relatively noisy (e.g., by allowing unfiltered switching noise to reach the motor for the refrigeration system).

Such relatively high efficiencies allows embodiments to operate with minimal waste heat, which in turn allows such embodiments to be packaged more compactly and less expensively within or about the refrigeration system, for example, without negatively affecting the cooling performance of the refrigeration system. In addition, the increased efficiency and flexibility of the cryocooler controller can help constituent refrigeration systems reach higher cooling powers (and lower achievable operating temperatures) than similarly sized conventional systems, particularly when operated at similar input power. Moreover, the reduced number of components allows embodiments to be implemented within relatively small size constraints, which in turn allow further reduction of the overall size and weight of the refrigeration system.

Because embodiments of the present disclosure produce relatively noise-free motor drive signals and can provide relatively high cooling powers and low operating temperatures, coupled cooled sensor systems can operate according to higher performance characteristics than achievable with conventional refrigeration systems, particularly where compactness and efficiency are at a premium, such as in applications involving spaceflight, unmanned aircraft systems, relatively large and/or high power-dissipating sensor systems, and/or battery or solar powered systems. In particular, higher cooling powers and/or lower operating temperatures can increase general performance in the operation of infrared cameras.

For example, infrared cameras may be used for nighttime or other applications when ambient lighting is poor or when environmental conditions are otherwise non-conducive to visible spectrum imaging, and they may also be used for applications in which additional non-visible-spectrum information about a scene is desired, such as for gas leak detection. In each application, it is typically desirable to reduce noise and variability in images captured by the infrared camera by cooling at least a focal plane array (FPA) of the infrared camera to a cryogenic and/or relatively stable temperature while the images are captured. It is also typically desirable to minimize system noise and/or other extrinsic signals that can cause heating and/or interference with operation of the infrared camera. The higher cooling powers provided by embodiments of the present disclosure can cool larger and/or more power dissipative FPAs (e.g., higher performance FPAs), for example, and/or can provide lower and more stable operating temperatures; lower operating temperatures result in lower noise in resulting infrared imagery, and more stable operating temperatures result in more reliable and accurate infrared images (e.g., in particular, thermal images).

FIG.1illustrates a block diagram of a refrigeration system100including a cryocooler controller120in accordance with an embodiment of the disclosure. As shown inFIG.1, refrigeration system100includes power supply112providing an input power signal over power leads113to cooler controller120, which then provides motor drive signals over power leads123to drive motor172of cryocooler170. In general, cryocooler170operates to cool cold finger176, which is thermally coupled to and configured to cool/extract heat from at least a portion (e.g., FPA182) of electronic device/sensor/camera180through thermal interface177. As shown inFIG.1, cryocooler controller120may be configured to receive various sensor signals (e.g., corresponding to an input voltage of the input power signal provided by power supply112, an output voltage of motor drive signals generated by motor driver140/cryocooler controller120, temperatures of various components of refrigeration system100measured by temperature sensors134, and/or other sensor signals corresponding to operation of cryocooler170and/or other elements of refrigeration system100) as feedback of operation of cryocooler170and/or other elements of refrigeration system100, and to adjust drive signals provided to motor172accordingly (e.g., so as provide a stable and/or desired temperature and/or cooling power at cold finger176).

Also shown inFIG.1is user interface110. User interface110may be implemented as a personal computer, a tablet, a smart phone, a mobile computing device and/or vehicle interface, and/or one or more of a display, a touch screen, a keyboard, a mouse, a joystick, a knob, button, or switch, and/or any other device capable of accepting user input and/or providing feedback to a user. More generally, user interface110may be configured to provide user-level control of refrigeration system100and to provide operational feedback to a user of system100.

User interface110may be integrated with any appropriate logic device (e.g., processing device, microcontroller, processor, application specific integrated circuit (ASIC), field programmable gate array (FPGA), memory storage device, memory reader, or other device or combinations of devices) that may be adapted to execute, store, and/or receive appropriate instructions, such as software instructions implementing a control loop for controlling various operations of system100. In addition, user interface110may include a machine readable medium provided for storing non-transitory instructions for loading into and execution by user interface110. In these and other embodiments, user interface110may be implemented with other components where appropriate, such as volatile memory, non-volatile memory, and/or various analog and/or digital components for interfacing with devices of system100.

In various embodiments, user interface110may be configured to provide an initialization signal to cryocooler controller120to begin operation of cryocooler170, for example, or to provide a temperature set point and/or other operational parameters (e.g., corresponding to a desired operational state of cryocooler170) to cryocooler controller120. In specific embodiments, user interface110may be configured to provide and/or update configuration data, including logic-level configuration data, to cryocooler controller120to facilitate control of operation of cryocooler170, as described herein. User interface110may also be configured to receive an operating temperature, power draw, efficiency, and/or other operating characteristic and/or measured feedback of operation of cryocooler170and/or other elements of refrigeration system100(e.g., from cryocooler controller120and/or other elements of system100) and provide such information for display or indication to a user. In some embodiments, user interface110may be configured to receive infrared images captured by camera180(e.g., over data leads111) and provide the infrared images for display to a user.

Power supply112may be implemented as a battery, solar cell, mechanical generator, and/or other power generating and/or delivery device, which may be provided specifically to power refrigeration system100, for example, and/or be coupled to, integrated with, or generated as part of the operation of a separate platform, such as a sensor, vehicle, aircraft, watercraft, or other fixed or mobile platform. In some embodiments, power supply112may be configured to provide an input DC power signal over power leads113, such as a 12V, 40V, 48V, or other voltage level DC power signal. More generally, power supply112may be configured to provide any type of input power signal over power leads113that can be converted by cryocooler controller120into motor drive signals appropriate to drive motor172.

As shown inFIG.1, cryocooler controller120includes motor driver controller130, feedback interface132, motor driver140, and optional other modules122. In additional embodiments, such as where cryocooler170includes multiple motors, cryocooler controller120may be implemented with multiple motor drivers, for example, that may each be controlled independently by motor driver control signals generated by motor driver controller130.

Motor driver controller130may be implemented as any appropriate logic device (e.g., processing device, microcontroller, processor, ASIC, FPGA, memory storage device, memory reader, or other device or combinations of devices) that may be adapted to execute, store, and/or receive appropriate instructions, such as software instructions implementing a control loop for controlling various operations of cryocooler170and/or other components of system100. For example, motor driver controller130may be configured to receive operational parameters corresponding to operation of cryocooler170and generate motor driver control signals configured to control operation of motor driver140based, at least in part, on the received operational parameters.

In addition, motor driver controller130may include a machine readable medium provided for storing data and/or non-transitory instructions for loading into and execution by motor driver controller130. In these and other embodiments, motor driver controller130may be implemented with other components where appropriate, such as volatile memory, non-volatile memory, and/or various analog and/or digital components for interfacing with devices of system100. In a particular embodiment, motor driver controller130may be implemented substantially entirely by a programmable logic device (PLD), such as an FPGA, which may be configured to implement (e.g., using programmable resources) and perform any of the methods described herein. In such embodiments, user interface110may be configured to provide/update configuration data over data leads111to motor driver controller130that is configured to implement/update/modify such methods in programmable resources and/or other elements of motor driver controller130. Various embodiments of motor driver controller130are described in more detail with reference toFIGS.7-9.

Motor driver140may be implemented by one or more electrical components, such as various electrically controllable switches/transistors, an inductor, and a capacitor, that are configured to receive motor driver control signals from the motor driver controller and to generate drive signals based, at least in part, on the motor driver control signals, to drive motor172of cryocooler170. An embodiment of motor driver140is described in more detail with reference toFIG.3.

Feedback interface132may be implemented by one or more of a multichannel analog to digital converter, a reference signal source, a temperature sensor, a digital communication interface, and/or other electrical or electronic components configured to receive and/or measure sensor signals corresponding to operation of cryocooler170and/or other elements of system100(e.g., over sensor leads124) and convert such sensor signals into corresponding feedback data indicative of an operational state of cryocooler170and/or other elements of system100. Feedback interface132may be configured to provide such feedback data to motor driver controller130to help adjust operation of cryocooler170and/or other elements of system100according to various desired operational characteristics or states of cryocooler170and/or other elements of system100.

For example, feedback interface132may be configured to receive one or more sensor signals (e.g., from temperature sensor134) and generate feedback data corresponding to operation of cryocooler170, and motor driver controller120may be configured to receive the feedback data from feedback interface132and generate motor driver control signals based, at least in part, on the feedback data. In some embodiments, one or more of temperature sensors134may be implemented as diodes with characteristic voltage/temperature responses. Feedback interface132may be configured to provide a reference current to a diode and to measure/digitize the resulting voltage developed across the diode, which is proportional to the temperature of the temperature sensor134. Advantageously, such diodes may be integrated with FPA182of camera180, for example, allowing direct and precise measurement and feedback of a temperature of FPA182.

In some embodiments, the one or more sensor signals received by feedback interface132may include a measured temperature of cold finger176of cryocooler170and/or electronic device180thermally coupled to cryocooler170(e.g., via thermal interface177). Corresponding feedback data may be provided to motor driver controller120, which may be configured to determine a feedback error based, at least in part, on a set point corresponding to a desired temperature for cold finger176and/or electronic device180and the received feedback data. In such embodiments, motor driver controller120may be configured to generate motor driver control signals based, at least in part, on the determined feedback error.

More generally, motor driver controller120may be configured to determine the feedback error, a ramp enable state corresponding to an operational state of cryocooler170, and/or a ramp error based, at least in part, on feedback data (e.g., generated by feedback interface132) corresponding to a measured temperature of cold finger176and/or electronic device180, a measured input voltage of a power signal received by motor driver140, a measured output voltage of drive signals generated by motor driver140, and/or a measured temperature of cryocooler controller120(e.g., measured by feedback interface132). In such embodiments, motor driver controller120may be configured to generate motor driver control signals based, at least in part, on the determined feedback error, ramp enable state, and/or ramp error. Optional other modules122may include various power, digital, and/or analog signal interfaces, sensors, and/or additional circuitry configured to facilitate operation of any element of cryocooler controller120.

Cryocooler170may be implemented as any cooler or refrigeration system configured to convert electrical power delivered over power leads123to motor172into cooling power generated by refrigerator174at cold finger176. In some embodiments, cryocooler170may be implemented as a Stirling refrigerator, for example, and in particular embodiments, as a miniature split-pair Stirling refrigerator, as described in more detail with reference toFIGS.2A-B. As shown inFIG.1, cryocooler170may include one or more temperature sensors134configured to provide sensor signals indicative of a measured temperature of a corresponding element of cryocooler170(e.g., of motor172, for fault detection, or of cold finger176, for operating temperature feedback) to feedback interface132of cryocooler controller120. Optional other modules178may include additional temperature or electrical signal sensors, various mechanical or thermal linkages, dewar cavities, working fluid reservoirs, and/or other mechanical or electrical components or sensors configured to facilitate operation of any element of cryocooler170and/or provide additional operational feedback to cryocooler controller120.

As shown inFIG.1, cryocooler170may be thermally coupled to electronic device/sensor/camera180via thermal interface177. For example, thermal interface177may be implemented by thermal grease, thermal tape, copper or aluminum plate or film, and/or other materials and/or structures configured to provide a reliable and highly thermally conductive link between cryocooler170and at least a portion of electronic device/sensor/camera180. Electronic device/sensor/camera180may be any device, sensor, or imaging device that operates better (e.g., with higher signal to noise operational characteristics and/or with higher performance according to other performance metrics) when cooled.

For example, electronic device/camera180may include an infrared imaging sensor implemented as FPA182, which may be coupled to optics184and be configured to image infrared radiation (e.g., including thermal radiation) emitted from a scene in view of optics184. In some embodiments, cryocooler170may be directly coupled (e.g., via thermal interface177) to a sensor (e.g., /FPA182) of electronic device/camera180and primarily be configured to cool such sensor. In other embodiments, cryocooler170may be coupled to various elements of electronic device/camera180(e.g., optics184, camera body181, and/or other modules186) and be configured to cool such various elements to help increase performance of electronic device/camera180.

As shown inFIG.1, electronic device/camera180may include one or more temperature sensors134configured to provide sensor signals indicative of a measured temperature of a corresponding element of electronic device/camera180(e.g., of FPA182, for operating temperature feedback) to feedback interface132of cryocooler controller120. Optional other modules186may include additional temperature or electrical signal sensors, FPAs of sensors sensitive to different spectrums (e.g., visible light), other optical elements, and/or other mechanical or electrical components or sensors configured to facilitate operation of any element of electronic device/camera180and/or provide additional operational feedback to cryocooler controller120.

Also shown inFIG.1as optional are other modules190of system100coupled to user interface120over data leads111and to other elements of system100over leads192. Other modules190may include additional sensors, additional temperature or electrical signal sensors, an actuated gimbal and associated control subsystem to aim electronic device/camera180according to a desired direction, an accelerometer, a gyroscope, a global navigation satellite system receiver, a compass, other orientation and/or position sensors, vibration sensors, thermal management subsystems, structural support, thermal and/or electrical shielding, and/or other mechanical or electrical components or sensors configured to facilitate operation of any element of refrigeration system100and/or provide additional operational feedback to cryocooler controller120.

FIG.2Aillustrates a block diagram of a split-pair Stirling refrigerator/cryocooler170that may be controlled by cryocooler controller120ofFIG.1in accordance with an embodiment of the disclosure. In the embodiment shown inFIG.2A, cryocooler170includes motor/compressor172in fluid communication with refrigerator174via gas transfer line/tube277. In general operation, motor/compressor172may be energized by motor driver140to compress working gas within the compression space (e.g., between pistons271) and deliver a compression wave/mass flow of working gas through gas transfer line277to refrigerator174. Heat in the working gas generated at least in part by the compression is extracted at the motor/compressor172and dissipated into the environment, rather than injected into refrigerator174.

The compression wave/mass flow causes regenerator/displacer274to move towards cold finger176and extend spring278within bounce space279, and at least a portion of the working gas travels through porous regenerator/displacer274and into expansion space276. The restoring force provided by spring278and the draw-back of pistons271(as controlled by drive signals provided by motor driver140) in between compression strokes draws regenerator/displacer274back towards bounce space279and expands the working gas within expansion space276, thereby extracting heat from the environment through cold finger176and embedding it within the expanded working gas. Repeated operation of such cycle moves heat extracted from cold finger176(e.g., and anything thermally coupled to cold finger176) to motor/compressor172, and that transferred heat is dissipated into the environment (e.g., using various heat exchangers and thermal management coupled to motor/compressor172), as is common with various Stirling cycle refrigeration systems.

As shown inFIG.2A, motor/compressor172may be implemented with inductive windings272configured to cause pistons271to move towards each other to compress gas within the compression space therebetween. In some embodiments, motor driver140of cryocooler controller120may be electrically coupled to windings272of motor/compressor172(e.g., over power leads123) and the motor drive signals generated by motor driver140may be used to drive pistons271to generate the compression wave/mass flow, as in a linear motor arrangement, as described herein. Other motor/compressor arrangements are contemplated, including various linear motor arrangements, other compressor arrangements, and/or cyclical motor and/or motor/compressor arrangements.

FIG.2Billustrates an image of a split-pair Stirling refrigerator/cryocooler170that may be controlled by cryocooler controller120ofFIG.1in accordance with an embodiment of the disclosure.FIG.2Billustrates the general size of a miniaturized cryocooler170that is analogous to cryocooler170ofFIG.2Aand that may be used to cool FPA182of camera180inFIG.1. For example, motor/compressor172may be approximately 2.6″ in length, gas transfer line may be approximately the same length (e.g., or short or longer, depending on application needs), and refrigerator174may be approximately 2″ in length with a cold finger diameter of approximately 0.5″. In general, a cryocooler of a size and type similar to cryocooler170ofFIG.2Bmay be controlled by cryocooler controller120to reach stable operating temperatures, under typical head loads, of approximately 77K to 120K, or higher temperatures depending on the application needs. More generally, various cryocooler arrangements (e.g., including cryocooler arrangements including and/or different from a split-pair Stirling refrigerator arrangement) may be controlled by cryocooler controller120to reach a wide range of stable operating temperatures, cooling powers, and/or subject to a wide variety of different size, power, and weight constraints.

FIG.3illustrates a circuit diagram of motor driver140for cryocooler controller120in accordance with an embodiment of the disclosure. For example, as shown inFIG.3, motor driver140includes a first stage340that itself includes a first pair of switches342and344coupled serially between an input313of motor driver140and a ground of motor driver140, a second pair of switches346and348coupled serially between an output350of the first stage and the ground of motor driver140, and an inductor352coupled between the first and second pairs of switches, as shown. In general, first stage340may be referred to and/or operate as a buck-boost inverter stage, as described herein. Motor driver140ofFIG.3also includes a second stage360coupled to output350of first stage340that itself includes a third pair of switches362and364and a fourth pair of switches366and368coupled serially between output350of first stage340and the ground of motor driver140, as shown. A differential output323of motor driver140may be coupled between the third and fourth pairs of switches such that at least one switch362-368of the third and fourth pairs of switches is coupled between each lead of differential output323and output350of first stage340or the ground of the motor driver, as shown. In general, second stage360may be referred to and/or operate as a commutator stage, as described herein.

In general, operation of each switch342-348and362-368of the first, second, third, and fourth pairs of switches may be independently controlled by motor driver control signals generated by motor driver controller130. In some embodiments, motor driver control signals (e.g., generated by motor driver controller130) provided to switches342-348may be configured to cause first stage340to convert a DC power signal received at input313into a rectified sine wave drive signal generated at output350. When configured in a buck-mode, as indicated by table341, first stage340may generate output signals at output350with voltage levels up to approximately a voltage level Vin of an input power signal provided at input313. For example, while in a buck-mode, the duty cycle of main drive switch342is proportional to the percentage of the input voltage Vin (e.g., provided at input313) that is desired at output350(Vout). When configured in a boost-mode, as also indicated by table341, first stage340may generate output signals at output350with voltage levels greater than approximately a voltage level of an input power signal provided at input313. For example, while in a boost-mode, the duty cycle of main drive switch348may be equal to 1−Vin/Vout.

Motor driver control signals (e.g., also generated by motor driver controller130) provided to switches362-368may be configured to cause second stage360to convert a rectified sine wave generated by first stage340at output350into a full sine wave motor drive signal generated at differential outputs323of motor driver140. For example, table361indicates two switch configurations for switches362-368that are configured to select a polarity of differential output323relative to output350of first stage340. In such embodiments, motor drive signals generated by motor driver140across differential output323include the full sine wave generated by second stage360.

In various embodiments, each of switches342-348and362-368may be implemented by enhancement mode gallium nitride (GaN) field effect transistors (FETs) with very low parasitic properties and zero reverse recovery loss, which greatly reduces associated switching and conduction losses and improves electrical efficiency as measured across the entirety of cryocooler controller120. For example, each switch may have an Rds(on) of approximately 15 mOhms and a gate capacitance low enough to allow switching frequencies substantially above any typical need when generating motor drive signals using an embodiment of motor driver140. As an example, a typical PWM switching rate can be approximately 53 kHz in order to generate a relatively clean and pure (e.g., high resolution with little distortion) rectified sine wave with an intrinsic frequency less than approximately 200 Hz (e.g., or more typically between 60 and 100 Hz) and a switching frequency high enough to be effectively eliminated from the motor drive signals by a low pass filter integrated with first stage340, as described herein. In addition, such FETs may be configured to accept 3.3V logic, which allows various types of PLDs, including particular FPGAs, to drive switches342-348and362-368directly without giving up board space and additional power draw that would otherwise be needed for a logic level translator.

In various embodiments, first stage340may include a capacitor354coupled between output350and the ground of motor driver140such that capacitor354and inductor352form a low pass filter that is integrated with first stage340and configured to low pass filter signals generated by first stage340. For example, a capacitance of capacitor354may be chosen to cause the resulting low pass filter to filter switching noise associated with operation of switches342-348(e.g., PWM frequency-scale switching noise), regardless of the chosen inductance for inductor352. Because such low pass filter is integrated with first stage340(e.g., by utilizing inductor352as an element of the low pass filter), the total number of electrical components required to enable low pass filtering of the output of first stage140is reduced, thereby reducing overall size while retaining relatively desirable low noise characteristics, and the electrical efficiency of motor driver140may be increased (e.g., by limiting the parasitic series resistance and/or other detrimental operating characteristics of circuitry generally associated with an increased number of electrical components in a signal path).

FIG.4illustrates buck-mode driver control signals generated by motor driver controller130for switches342and344of motor driver140in accordance with an embodiment of the disclosure. For example, while generating a portion of a rectified sine wave at output350of first stage340with a voltage level Vout below the voltage level Vin of a DC input voltage supplied by power supply112to input313of motor driver140, first stage340may be in a buck-mode (e.g., as set forth in table341ofFIG.3), and motor driver controller130may be configured to provide PWM pulses modulated similar to the main drive signal trace provided to switch342and the complementary signal trace provided to switch344, while holding switch346closed and switch348open. While in buck-mode, the duty cycle D of the main drive PWM pulses is roughly proportional to the output voltage Vout of first stage340, according to the equation D=Vout/Vin. As shown inFIG.4, signal traces342,344, and350illustrate a buck-mode of motor driver140, as selected by the control signals generated by motor driver controller130up to an approximate buck-mode output voltage level (for a rectified sine wave output) of half the input voltage level, indicated by arrow441, which corresponds to main drive PWM pulses with a duty cycle of 50% (e.g., equal on and off pulse width durations).

FIG.5illustrates boost-mode driver control signals generated by motor driver controller130for switches346and348of motor driver140in accordance with an embodiment of the disclosure. For example, while generating a portion of a rectified sine wave at output350of first stage340with a voltage level Vout above the voltage level Vin of the DC input voltage supplied by power supply112to input313of motor driver140, first stage340may be in a boost-mode (e.g., as set forth in table341ofFIG.3), and motor driver controller130may be configured to provide PWM pulses modulated similar to the main drive signal trace provided to switch348and the complementary signal trace provided to switch346, while holding switch342closed and switch344open. While in boost-mode, the duty cycle D of the main drive PWM pulses roughly follows the equation D=1−Vin/Vout. As shown inFIG.5, signal traces346,348, and350illustrate a boost-mode of motor driver140, as selected by the control signals generated by motor driver controller130increasing from an approximate boost-mode output voltage level (for a rectified sine wave output) of approximately 10-11% above the input voltage level, indicated by arrow541, which corresponds to main drive PWM pulses with a duty cycle of approximately 10% (e.g., on for 10% of a single PWM cycle, and off for 90% of a single PWM cycle).

FIG.6illustrates buck-mode and boost-mode driver control signals generated by motor driver controller130for switches342-348of motor driver140and resulting output motor drive signals in accordance with an embodiment of the disclosure. In addition,FIG.6illustrates the expected minimal or non-existent signal transient when motor driver140transitions between buck-mode and boost-mode, as controlled by motor driver controller130, which is roughly indicated by arrows643and644in first stage output voltage signal trace350, referenced by overlaid DC input voltage signal trace313. In particular, signal traces342-348illustrate a time series of various PWM and mode selection driver control signals provided to switches342-348that are configured to generate a rectified sine wave at output350of first stage340with a voltage amplitude greater than a voltage level Vin of the DC input voltage supplied by power supply112to input313of motor driver140. As shown inFIG.6, signal trace640includes buck-mode output641of first stage340separate from boost-mode output642of first stage340(e.g., which is also negatively biased by Vin to emphasize the separation), and signal trace313/350includes the aggregate buck-mode and boost-mode output350of first stage340overlaid by input voltage signal trace313for visual reference.

By providing a motor driver140capable of both buck and boost-mode operation, and controlled to provide such operations substantially without transients between mode transitions, embodiments are able to provide a highly flexible cryocooler controller that can provide a relatively wide range of cooling powers and/or stable operating temperatures for a given supply voltage. Moreover, because the output signal voltage amplitude is not hard limited to the maximum input supply voltage, embodiments are able to employ feedback techniques that can compensate for, and provide relatively stable cryocooler operation in spite of, a varying or drifting supply voltage.

FIG.7illustrates a block diagram of motor driver controller130for cryocooler controller120in accordance with an embodiment of the disclosure. In various embodiments, elements of motor driver controller130may be implemented in digital and/or analog circuitry configured to perform the operations described herein. In some embodiments, all the elements of motor driver controller120and their functionality may be implemented in a PLD. As such, elements of motor driver controller120, their interconnections, and/or their functionality may be configured and/or updated (e.g., by user interface110) to perform any of the methods described herein, for example, including updates that take place substantially during runtime of motor driver controller130.

As shown inFIG.7, motor driver controller130may include communication interface710, drive error generator720, and/or driver control signal generator730, each of which may be configured to communicate with memory740(e.g., to store and/or retrieve operational parameters, sensor and/or feedback data, operational state data, time series of such data, and/or other information, as described herein). In general, driver control signal generator730may be configured to receive a drive error from drive error generator720and/or additional operational parameters or other data from memory740and generate corresponding control signals to control operation of motor driver140, as shown.

Communication interface710may be configured to support digital communication of data according to a variety of different formats and/or protocols between motor driver controller130and/or elements of motor driver controller130, feedback interface132, user interface120, and/or other components of system100ofFIG.1. For example, communication interface710may be configured to support UART based data communication between user interface110and memory740, SPI based data communication between feedback interface132, memory740, and/or drive error generator720, and/or other digital communication between components of system100.

In addition, communication interface710may be configured to support other signal interfaces facilitating operation of motor driver controller130, such as a system clock input interface and/or on/off/standby enable/disable signal interfaces configured to manually enable/override programmatic operation of motor driver controller130(e.g., by analog switches coupled directly to/integrated with cryocooler controller120, as opposed to similar functionality provided through digital communications to elements of motor driver controller130).

Drive error generator720may be configured to receive feedback data corresponding to measured sensor signals, operational states, and/or other operational characteristics of motor172, cold finger176, and/or other elements of cryocooler170, and/or various components of system100, for example, along with various operational parameters corresponding to operation of cryocooler170controlled by cryocooler controller120, and to generate a drive error based on the received data. In general, the drive error represents a measure of the error between a desired operational state of cryocooler170and a measured operational state of cryocooler170. In some embodiments, the drive error may take the form of a gain factor used to adjust driver control signals generated by motor driver controller130, such that voltage levels/amplitudes of resulting drive signals generated by motor driver140(e.g., as controlled by the driver control signals generated by motor driver controller130) are effectively scaled by the drive error in an attempt to force the measured operational state of cryocooler170to converge towards the desired operational state of cryocooler170(e.g., to compensate for and/or reduce the magnitude of the drive error). Additional details regarding an implementation of driver error generator720are provided with reference toFIG.8.

Driver control signal generator730may be configured to receive a drive error from drive error generator720, for example, along with various operational parameters corresponding to operation of cryocooler170controlled by cryocooler controller120, and to generate corresponding drive control signals configured to operate motor driver140and/or drive motor172of cryocooler170according to a desired operational state or characteristic of cryocooler170and/or other elements of system100. Additional details regarding an implementation of driver control signal generator730are provided with reference toFIG.9A.

Memory740may be implemented by registers, memory cells, flash memory, and/or other memory structures and/or logic devices or structures configured to store digital data provided by various elements of motor driver controller130, cryocooler controller120, and/or system100, and/or to provide stored data to such elements, as described herein. As noted herein, in embodiments where motor driver controller130is implemented by a PLD, memory740may be implemented at least in part by registers implemented or designated within configurable resources of the PLD, which can be reconfigured (e.g., to increase or reduce storage capacity) prior to operation/execution of motor driver controller130and/or during runtime.

FIG.8illustrates a block diagram of drive error generator720for motor driver controller130of cryocooler controller120in accordance with an embodiment of the disclosure. In general, drive error generator720may generally include one or more proportional-integral-derivative feedback mechanisms (e.g., PID controllers) and/or other types of feedback mechanisms configured to monitor a deviation from a desired operational state of cryocooler170and/or other elements of system100and generate a drive error862configured to compensate for and/or minimize the deviation from the desired operational state (e.g., when used to adjust operation of cryocooler170by adjusting driver control signals used, in turn, to control operation of motor driver140, as described herein).

As shown inFIG.8, elements810through840generally implement a PID controller configured to generate a feedback error842based on a measured temperature741(e.g., of cold finger176and/or FPA182) and a desired temperature (e.g., set point742). In particular, error sample averager810may be configured to average a series of measured temperatures741(e.g., typically 1 to 4 samples, which may be provided by feedback interface132and/or stored within/retrieved from memory740) and determine a difference between the average measured temperature and set point742(e.g., an operational parameter, which may be provided by user interface110and/or stored within/retrieved from memory740), which is then provided to variable gain blocks812and814.

Variable gain blocks812and814may be controlled by gain or scale factors743and744provided by user interface110and/or stored within/retrieved from memory740. In some embodiments, variable gain blocks812and814may be implemented as bit shifters configured to shift values provided to blocks812and814by a set number of bits (e.g., individually set by gain factors/registers743and744) to increase/decrease the proportional (e.g., block812) or integral (e.g., block814) contribution to feedback error842. Differentiator820may be configured to determine a differential contribution to feedback error842, and integrator830may be configured to determine the integral contribution to feedback error842. Combination block840may be configured to combine the various PID contributions to generate feedback error842.

Additional PID or similar controllers configured to generate feedback errors related to other operational states of system100(e.g., a measured input voltage of a power signal received at input313of motor driver140, a measured output voltage of drive signals generated by motor driver140, a measured temperature of cryocooler controller120, and/or other operation states of system100) may also be implemented as part of drive error generator720(e.g., other feedback errors844), and all such feedback errors may be combined at combination block840(e.g., according to individual weight factors and/or other aggregation mechanisms) to produce an aggregate feedback error842configured to compensate for and/or minimize deviations away from one or more corresponding desired operational states.

At various points within the data flow illustrated byFIG.8and/or elsewhere inFIGS.1and7-9C, measured, retrieved, and/or calculated data may be clipped (e.g., limited to a range of values) in order to minimize and/or foreclose unphysical or undesirable feedback errors, drive errors, and/or resulting control signals and/or other operational parameters. For example, in some embodiments, drive error generator720may include clipper block816disposed between variable gain block812and differentiator820/combination block840and configured to limit the proportional contribution to a certain bit width (e.g., magnitude). Similar clipper blocks may be disposed within averager810and/or integrator830to limit the effect of transients and/or otherwise stabilize operation of drive error generator720, for example.

In some embodiments, drive error generator720may be implemented with ramp controller850, which may be configured to reduce a risk of knocking caused by relatively high drive signal amplitudes being provided to motor172while refrigerator174and/or the associated working gas is relatively warm and (typically) viscous. In embodiments where drive error generator720includes ramp controller850, ramp controller850may be configured to determine if cryocooler170is in a initialization, warm, or cool-down state, for example, based on feedback data corresponding to an operational state of cryocooler170, such as measured temperature741(e.g., of cold finger176and/or electronic device/camera180), a detected change in a measured output voltage of drive signals generated by motor driver140(e.g., from zero to non-zero), and/or other feedback data, which may be compared to various operational parameters and/or operational states stored within/retrieved from memory740(e.g., a measured ambient temperature and/or temperature of cryocooler controller120, and/or other parameters, states, or feedback data). If such state is detected, ramp controller850may be configured to set ramp enable signal852to “true,” thereby selecting ramp error854as the drive error862at error/ramp selector860, as shown.

Ramp controller850may be configured to generate ramp error854based on a ramp profile745(e.g., provided by user interface110and/or stored within/retrieved from memory740), which may correspond to a drive error862that gradually increases from a value of zero (e.g., resulting in a drive signal generated by motor driver140with a voltage amplitude of zero) to a value of 1 (e.g., resulting in a drive signal generated by motor driver140with a default or steady-state/unadjusted voltage amplitude). In some embodiments, ramp profile745may take the form of a scale factor, which may be used to adjust the counting rate and/or step size of a counter (e.g., implemented within ramp controller850and triggered by a clock signal driving motor driver controller130) configured to start incrementing a count when ramp enable 852 is set to true. In such embodiments, ramp error854may be set equal to the incrementing count. Other non-linear ramp profiles are contemplated, for example, and in general ramp error854may depend on ramp profile745and various feedback data and/or operational states of cryocooler170(e.g., including one or more measured temperatures of elements of cryocooler170and/or other components of system100, such that ramp error854is temperature dependent). Upon detecting an end of a time-based ramp profile745and/or a sufficiently low measured temperature741(e.g., below a stored threshold temperature or approaching set point742), ramp controller850may set ramp enable signal852to “false” to select feedback error842as the drive error862at error/ramp selector860, as shown.

FIG.9Aillustrates a block diagram of driver control signal generator730for motor driver controller130of cryocooler controller120in accordance with an embodiment of the disclosure. In general, driver control signal generator730may be configured to generate various control signals to control operation of switches342-348of first stage340of motor driver140and operation of switches362-368of second stage360of motor driver140to cause motor driver140to produce drive signals according to a desired waveform. Typically, such desired waveform is a pure sine wave with programmatically variable amplitude that may be adjusted by drive error862to force cryocooler170to operate at a desired operational state or to converge towards the desired operational state over time. More generally, such desired waveform may have any desired shape with a programmatically variable amplitude, frequency, and/or other waveform characteristic that may be adjusted to adjust (e.g., typically improve) a performance of cryocooler170and/or other components of system100.

In the embodiment illustrated byFIG.9A, driver control signal generator730includes drive signal table pointer910configured to provide a pointer index to drive signal phase selector920and control signal seed generator930. Drive signal phase selector920is configured to provide control signals to switches362-368of second stage360of motor driver140, which in some embodiments may be configured to cause switches362-368to convert a rectified sine wave generated by first stage340of motor driver140into a full sine wave across differential output323. Such full sign wave may then be provided to motor172, as shown inFIG.3.

For example, in some embodiments drive signal table pointer910may be implemented by a counter counting through the indexes of a table corresponding to a rectified sine wave version of drive signal profile746. Upon reaching an end of such table, drive signal table pointer910may restart the count to the beginning of such table. Drive signal phase selector920may be configured to detect the restart of the count and provide control signals to switches362-368of second stage360to cause switches362-368to reverse a polarity of differential output323relative to output350of first stage340and generate a full sine wave across differential output323, as described herein.

Control signal seed generator930may be configured to retrieve a drive signal profile746(e.g., from memory740) and determine a control signal seed parameter based on the pointer index provided by drive signal table pointer910and drive signal profile746, and the determined control signal seed parameter may then be provided to error compensator940. For example, drive signal profile746may be implemented as a table of main drive PWM control signal duty cycles (e.g., a table of control signal seed parameters) configured to cause motor driver140to generate a rectified sine wave with a predetermined or desired voltage amplitude at output350(e.g., when supplied as a time series of control signals with corresponding boost/buck control signals as appropriate). Such predetermined voltage amplitude may be selected (e.g., based on prior operation of system100) to produce a desired cool-down time, steady state cooling power or operating temperature, and/or other desired operational state of cryocooler170and/or system100, for example, to operate motor driver140in a buck-mode by default, or to maximize available cooling power generated by cryocooler170by default (e.g., prior to adjustment by drive error862). Other drive signal profiles corresponding to different waveforms and/or including different control signal seed parameters are contemplated.

Error compensator940may be configured to receive drive error862(e.g., provided by drive error generator720) and a control signal seed parameter from control signal seed generator930and determine a corresponding error-adjusted control signal parameter941, and the determined error-adjusted control signal parameter941may then be provided to control signal generator950. For example, error compensator940may receive a main drive PWM control signal duty cycle from control signal seed generator930and be configured to multiply the received main drive PWM control signal duty cycle by drive error862to generate an error-adjusted main drive PWM control signal duty cycle configured to cause motor driver140to generate a motor drive signal tending to minimize deviation from and/or converge towards a desired operational state of cryocooler170and/or other components of system100over time, as described herein.

Control signal generator950may be configured to receive error-adjusted control signal parameter941generated by error compensator940and to provide corresponding control signals to switches342-348of first stage340of motor driver140, which may be configured to cause switches342-348to generate a drive signal corresponding to drive signal profile746with an amplitude or other waveform characteristic adjusted by drive error862. For example, control signal generator950may receive an error-adjusted main drive PWM control signal duty cycle from error compensator940and be configured to generate a corresponding error-adjusted main drive PWM control signal, a complementary PWM control signal, and corresponding boost/buck control signals, and provide each and/or all four control signals to switches342-348as appropriate (e.g., as indicated by table341inFIG.3).

In a particular related embodiment, the resolution (in bits) of the error-adjusted main drive PWM control signal duty cycle may be selected (e.g., along with other characteristics of data processed by driver control signal generator730and/or motor driver controller130) such that the most significant bit of the error-adjusted main drive PWM control signal duty cycle enables or disables a boost-mode of first stage340of motor driver140, and the remaining least significant bits define the main drive PWM control signal duty cycle/pulse width. As such, when processed within embodiments of driver control signal generator730, the error-adjusted main drive PWM control signal duty cycle may, at its extremes, vary roughly from 0% to 200% (e.g., from values of zero to two), relative to a maximum output of first stage340of motor driver140while in a buck-mode. Clipping (e.g., upper, lower, and/or magnitude clipping) may be applied at various points within driver control signal generator730to help limit excursions of the error-adjusted main drive PWM control signal duty cycle outside of this range.

In addition to the above, drive signal phase selector920and control signal generator950may each be configured to insert a specified dead time in between complementary switching states and/or buck/boost-mode transitions (e.g., of first stage340) and/or polarity transitions (e.g., of second stage360), so as to provide shoot-through protection to prevent shorting input313or output350to ground. For example, with respect to first stage340, such dead time may be a duration of a single clock cycle of the clock signal driving motor driver controller130, or may be sufficiently long to account for a switching time of any of switches342-348. A similar dead time may be selected for second stage360. While such switching can produce transients within motor driver140, any such transients generated within first stage340are roughly the same or higher frequency as the maximum switching frequency of switches342-348, and such frequencies are effectively filtered by the low pass filter integrated with first stage340, as described herein. Moreover, such dead times are typically only generated in second stage360approximately when drive signals output by first stage340at output350are approximately zero, and so the amplitude of any such transients in second stage360are typically also approximately zero and do not negatively impact the noise characteristics of motor driver140.

While the embodiments of drive error generator720illustrated inFIG.8and driver control signal generator730illustrated inFIG.9Aare primarily configured to adjust an amplitude of the resulting drive signals generated by motor driver140, in other embodiments, drive error generator720and/or control signal generator730may be implemented with logic to adjust a frequency and/or other waveform characteristics of the resulting drive signals to help minimize a deviation from a desired operational state, for example, and/or to maximize cryocooler performance. For example, the number of entries in a table corresponding to drive signal profile746and/or the increment rate of a counter configured to implement drive signal table pointer910may be adjusted (e.g., relative to a clock signal driving operation of driver control signal generator730and/or motor driver controller130) to adjust a frequency of a drive signal corresponding to drive signal profile746.

Such adjustments may be propagated out to drive signal phase selector920, error compensator940, and/or control signal generator950, and the resulting drive signals generated by motor driver140may produce changes in the operational characteristics of cryocooler170and/or other components of system100that can be measured and fed back into cryocooler controller120and tracked over a range of drive signal frequencies and/or other operational parameters to determine a relationship between drive signal frequency and performance. Such relationship can change over time, due to wear associated with long term operation of motor172and/or other elements of cryocooler170, for example, and a performance search may be performed periodically to track such relationship over time and identify updated optimum operating parameters as system100ages. More generally, any such performance to operational parameter relationship may be searched and tracked over time to help select optimum operational parameters for system100.

FIG.9Billustrates a block diagram of control signal generator950for driver control signal generator730of cryocooler controller120in accordance with an embodiment of the disclosure. In general, control signal generator950may be configured to control operation of switches342-348of first stage340of motor driver140to cause motor driver140to produce drive signals according to a desired waveform. More specifically, as noted in the discussion ofFIGS.8-9A, control signal generator950may be configured to receive error-adjusted control signal parameter941generated by error compensator940and to provide corresponding control signals to switches342-348of first stage340of motor driver140, which may be configured to cause switches342-348to generate a drive signal corresponding to drive signal profile746with an amplitude or other waveform characteristic adjusted by drive error862, for example, and/or additional compensation values, as described herein.

For example, in the embodiment illustrated byFIG.9B, control signal generator950includes buck-boost (BB) input voltage compensator951configured to provide an input voltage compensated control signal parameter (e.g., based on error-adjusted control signal parameter941provided by error compensator940) to BB gain selector953, which in turn may be configured to apply a selected BB gain to the input voltage compensated control signal parameter provided by (BB) input voltage compensator951and provide the resulting compensated control signal parameter to PWM pulse counter956, as shown. PWM clock954, PWM cycle counter955, and PWM pulse counter956may be configured to generate PWM control signals corresponding to the compensated control signal parameter generated by BB input voltage compensator951and/or BB gain selector953and provide such control signals to switches342-348of first stage340of motor driver140, which may be configured to cause switches342-348to generate a drive signal corresponding to drive signal profile746and/or error-adjusted control signal parameter941with an amplitude or other waveform characteristic adjusted by BB input voltage compensator951and/or BB gain selector953.

For example, PWM pulse counter956may be configured to receive a compensated main drive PWM control signal duty cycle from BB input voltage compensator951and/or BB gain selector953and to generate a corresponding compensated main drive PWM control signal and a complementary PWM control signal (e.g., based on a PWN clock signal provided by PWM clock954and a PWM cycle signal provided by PWM cycle counter955), and provide each and/or all four control signals to switches342-348as appropriate (e.g., as indicated by table341inFIG.3). In a particular related embodiment, the resolution (in bits) of the compensated main drive PWM control signal duty cycle provided by BB input voltage compensator951and/or BB gain selector953may be selected (e.g., along with other characteristics of data processed by control signal generator950) such that the most significant bit952of the compensated main drive PWM control signal duty cycle enables or disables a boost-mode of first stage340of motor driver140, and the remaining least significant bits define the main drive PWM control signal duty cycle/pulse width. Clipping (e.g., upper, lower, and/or magnitude clipping) may be applied at various points within control signal generator950to help limit excursions of the compensated main drive PWM control signal duty cycle.

BB input voltage compensator951may be configured to retrieve a BB set point747(e.g., from memory740) and determine an input voltage compensated control signal parameter based on BB set point747and error-adjusted control signal parameter941. Such input voltage compensated control signal parameter may be configured to help produce a desired peak output voltage level at output350of motor driver140(e.g., Vout), regardless of and/or to compensate for fluctuations in Vin provided at input313. In various embodiments, BB input voltage compensator951may be configured to multiply error-adjusted control signal parameter941by BB set point747to scale error-adjusted control signal parameter941by BB set point747. BB set point747may in some embodiments be implemented as a table value selected from a table of BB set points based on the DC input voltage Vin provided at input313of motor driver140and configured to cause motor driver140to generate a rectified sine wave with a predetermined or desired peak voltage amplitude (e.g., Vout) at output350. In other embodiments, BB set point747may be implemented as a relatively high bit-resolution (e.g., relative to a table value) calculated value provided by logic (e.g., set point generator947ofFIG.9C) configured to calculate BB set point747during operation of motor driver controller130, as shown and described in additional detail inFIG.9C.

BB gain selector953may be configured to retrieve a BB gain register value748(e.g., from memory740) and apply a BB gain corresponding to BB gain register value748and/or other BB gain values to the input voltage compensated control signal parameter provided by BB input voltage compensator951based, at least in part, on a buck or boost-mode of cryocooler controller120. For example, in some embodiments, BB gain selector953may configured to apply a gain of 1 to the input voltage compensated control signal parameter provided by BB input voltage compensator951while cryocooler controller120is in a buck-mode (e.g., while most significant bit952of the compensated main drive PWM control signal duty cycle is ‘0’) and to apply a gain corresponding to BB gain register value748while cryocooler controller120is in a boost-mode (e.g., while most significant bit952of the compensated main drive PWM control signal duty cycle is ‘1’). In various embodiments, BB gain register value748may be implemented as a table value selected from a table of gain values configured to cause motor driver140to generate a rectified sine wave with a predetermined voltage amplitude at output350while in a boost-mode.

In embodiments where the control signals generated by control signal generator950are PWM control signals, PWM clock may optionally be integrated within control signal generator950, motor driver controller130, cryocooler controller120, and/or other elements of system100, for example, and be configured to provide a constant or variable clock signal to PWM cycle counter955and PWM pulse counter956. Mode selector/most significant bit952may be combined with control signals generated by PWM pulse counter956and/or PWM cycle counter955to cause each and/or all four corresponding control signals (e.g., main drive control signal, complementary PWM control signal, on, off control signals) to switches342-348as appropriate (e.g., as indicated by table341inFIG.3).

FIG.9Cillustrates a block diagram of a set point generator947for control signal generator950of cryocooler controller120in accordance with an embodiment of the disclosure. In general, set point generator947may be configured to calculate BB set point747during operation of motor driver controller130based, at least in part, on a desired peak voltage level (Vout) generated by motor driver140at output350and/or across differential output323, and a DC input voltage Vin provided at input313of motor driver140, as shown inFIG.3. More specifically, as noted in the discussion ofFIG.9B, BB set point747may be used to scale error-adjusted control signal parameter941to generate (e.g., using BB input voltage compensator951) an input voltage compensated control signal parameter. Such input voltage compensated control signal parameter may be configured to help produce a desired peak output voltage level at output350of motor driver140(e.g., Vout), regardless of and/or to compensate for fluctuations in Vin provided at input313.

Embodiments of set point generator947offer benefits over table lookup methods by reducing the memory resources needed to have a table for each different input voltage (or different input voltage bounds) and by providing relatively high resolution values for BB set point747, which produces a relatively smooth sine wave output at output350and/or across differential output323for a relatively wide range of input voltages and changes in input voltages over time. Moreover, embodiments of set point generator947may be implemented relatively compactly in logic by replacing numerical division logic with an iterative approximation that instead relies on multiplication logic, as described herein, which can be of particular benefit when set point generator947is implemented in a PLD.

For example, in the embodiment illustrated byFIG.9C, set point generator947includes an AC output voltage scaler960, a DC input voltage scaler962, a comparator964, a BB set point accumulator966, and an optional BB set point latch968configured to provide BB set point747. In various embodiments, BB set point latch968may be configured to store or latch BB set point747into memory740and/or provide BB set point747to BB input voltage compensator951. In general, set point generator947may be configured to determine BB set point747such that when DC input voltage is scaled by BB set point747, the result is roughly equivalent to desired AC peak voltage750scaled by scale constant751, as shown.

AC output voltage scaler960may be configured to retrieve a desired AC peak voltage750and a scale constant751(e.g., from memory740) and generate a scaled desired AC peak voltage as output B to comparator964. In various embodiments, scale constant751may be selected to correspond to half the input voltage Vin equivalent of desired AC peak voltage750, for example, and may be implemented as a 16 bit number. Desired AC peak voltage750may be retrieved and/or derived from ramp profile745or drive signal profile746, for example. In some embodiments, AC output voltage scaler960may be configured to multiply desired AC peak voltage750by scale constant751and generate a scaled desired AC peak voltage (e.g., the product) with a specific selected and clipped bit width. For example, in some embodiments, AC output voltage scaler960may be configured to clip the top 3 bits of the product and provide the following 16 bits of the product as the scaled desired AC peak voltage (e.g., output B) to comparator964.

DC input voltage scaler962may be configured to retrieve or receive a DC input voltage963(e.g., from memory740or voltage sensor configured to measure Vin) and generate a scaled desired AC peak voltage as output A to comparator964. In some embodiments, DC input voltage scaler962may be configured to multiply DC input voltage963by an initialized set point967(e.g., provided by BB set point accumulator966) and generate a scaled DC input voltage (e.g., the product), which may in some embodiments have the same specific selected and clipped bit width as provided by embodiments of AC output voltage scaler960.

In various embodiments, comparator964may be configured to compare outputs A and B (e.g., the scaled DC input voltage and the scaled desired AC peak voltage) and provide a comparator output to BB set point accumulator966corresponding to a difference between output A and B. BB set point accumulator966may be configured to generate an updated set point967configured to reduce, minimize, and/or eliminate differences between outputs A and B identified by comparator964and forward a resulting accumulated set point967as BB set point747to BB set point latch968and/or BB input voltage compensator951, as described herein.

In a particular embodiment, comparator964, BB set point accumulator966, and DC input voltage scaler962may be operated in a iterative loop, for example, to iteratively adjust updated/accumulated set point967generated by BB set point accumulator966to converge towards a BB set point747that reduces, minimizes, and/or eliminates differences between outputs A and B (for a particular DC input voltage963and desired AC peak voltage750). For example, an initial 16 bit set point967may be initialized to all ‘0’s in all bit positions. Comparator964, BB set point accumulator966, and DC input voltage scaler962may be iterated for each bit position within 16 bit outputs A and B, starting at the most significant bit (e.g., i=15) and proceeding to the least significant bit (e.g., i=0).

For each iteration, BB set point accumulator966may be configured to set bit(i) in accumulated set point967to ‘1’ and forward accumulated set point967to DC input voltage scaler962; DC input voltage scaler962may be configured to scale DC input voltage963by the resulting updated/accumulated set point967; and comparator964may be configured to compare bit(i) in A to bit(i) in B. When bit(i) in A<=bit(i) in B (e.g., comparator964returns ‘true’), BB set point accumulator966allows bit(i) in accumulated set point967to remain ‘1’ and the loop proceeds to bit(i−1). When bit(i) in A>bit(i) in B (e.g., comparator964returns ‘false’), BB set point accumulator966sets bit(i) in accumulated set point967to ‘0’ and the loop proceeds to bit(i−1).

Upon completion of the iterations (e.g., at bit(0)), output A is roughly equal to output B (e.g., within the bit resolution of set point generator947) and the resulting accumulated set point967is forwarded on as BB set point747, as shown. Such iterative method of successive approximation thus provides a relatively accurate and reliable BB set point747and resulting Vin-normalized Vout at output350, which increases overall reliability and performance of system100under a larger range of environmental conditions, including a thermally or circumstantially variable power supply112.

FIG.10illustrates a block diagram of cryocooler controller120in accordance with an embodiment of the disclosure. InFIG.10, an embodiment of cryocooler controller120is shown next to a quarter in U.S. currency to illustrate an approximate size of cryocooler controller120. For example, length1012may be approximately 1.8 inches, width1010may be approximately 1 inch, and the height may be approximately between 0.5 and 1 inch. In the embodiment illustrated byFIG.10, cryocooler controller120includes socket1022along with motor driver controller130, feedback interface132, and motor driver140, all of which can be soldered together onto a printed circuit board1025with length1012and width1010, as shown.

As noted herein, such embodiments are able to reach electrical efficiencies (e.g., including all power used to operate motor driver controller130and feedback interface132, in addition to the power used by motor driver140to generate drive signals to drive motor172) greater than 95% at typical power loads. Embodiments are able to generate relatively low noise pure sine wave motor drive signals (e.g., with 40 mV or less ripple and/or noise envelope) with configurable frequencies ranging from approximately 4 Hz to 200 Hz. Embodiments are able to produce AC waveforms with amplitudes greater than 20 Vrms from 12 VDC input power signals, can drive 50 W cryocoolers, and are able to control cryocoolers similar to cryocooler170to produce operating temperatures (e.g., as measured at FPA182) stable to 0.1K in a range from approximately 77K to 150K.

FIG.11is a flowchart illustrating a method for operating a cryocooler controller in accordance with an embodiment of the disclosure. One or more portions of process1100may be performed by cryocooler controller120and utilizing any elements of systems, components, logic, or methods described with reference toFIGS.1-10. It should be appreciated that any step, sub-step, sub-process, or block of process1100may be performed in an order or arrangement different from the embodiment illustrated byFIG.11. In some embodiments, any portion of process1100may be implemented in a loop so as to continuously operate, such as in a control loop, for example.

At block1102, operational parameters for a cryocooler are received. For example, motor driver controller130of cryocooler controller120may be configured to receive operational parameters from user interface110and/or memory740, such as a temperature set point corresponding to a desired temperature for cold finger176and/or FPA182. In some embodiments, motor driver controller130may also be configured to receive feedback data corresponding to operation of cryocooler170from feedback interface132. Feedback interface132may be configured to receive one or more sensor signals (e.g., from temperature sensors134and/or other sources) and generate corresponding feedback data to be delivered to motor driver controller130, as described herein.

At block1104, motor driver control signals based, at least in part, on operational parameters for a cryocooler are generated. For example, motor driver controller130of cryocooler controller120may be configured to generate motor driver control signals for cryocooler170based, at least in part, on operational parameters received in block1102. In some embodiments, motor driver controller130may be configured to generate motor driver control signals based, at least in part, on feedback data and/or operational parameters received in block1102. For example, motor driver controller130may be configured to determine feedback error742based, at least in part, on set point742corresponding to a desired temperature for cold finger176and/or electronic device180and feedback data corresponding to measured temperature741of cold finger176and/or electronic device180. Motor driver controller130may then generate motor driver control signals based, at least in part, on the determined feedback error.

In further embodiments, motor driver controller130may be configured to determine feedback error742, ramp enable state852corresponding to an operational state of cryocooler170, and/or ramp error854based, at least in part, on feedback data corresponding to measured temperature741, a measured input voltage of a power signal received at input313of motor driver140, a measured output voltage of drive signals generated by motor driver140, and/or a measured temperature of cryocooler controller120. Motor driver controller130may then generate motor driver control signals based, at least in part, on the determined feedback error842, ramp enable state852, and/or ramp error854.

At block1106, motor drive signals based on motor driver control signals are generated. For example, motor driver controller130of cryocooler controller120may be configured to provide motor driver control signals generated in block1104to switches342-348of first stage340and/or362-368of second stage360of motor driver140. In some embodiments, the motor driver control signals provided to switches342-348of first stage340are configured to cause first stage340to convert a direct current power signal received at input313of motor driver140into a rectified sine wave generated at output350of first stage340. In various embodiments, second stage360of motor driver140may be configured to convert the rectified sine wave at output350of first stage340into a full sine wave generated at differential output323of motor driver140.