Error correction method and memory device capable of reading pages continuously

The present invention discloses an error correction method applied to a memory device, wherein the memory device has a plurality of pages. The error correction method includes: sequentially retrieving data of a plurality of first sectors of a first page of the pages in response to a first read command; performing a first error correction by an error correction module during retrieval the data of the first page; producing a second read command when the data of the first sectors of the first page are all retrieved; and starting to sequentially retrieve data of a plurality of second sectors of a second page of the pages in response to the second read command after the data of the first sectors of the first page are all retrieved.

CROSS REFERENCE TO RELATED APPLICATIONS

This application claims priority of Taiwan Patent Application No. 102109427, filed on Mar. 18, 2013, the entirety of which is incorporated by reference herein.

BACKGROUND OF THE INVENTION

Field of the Invention

The present invention is related to an error correction method applied to a memory device, and in particular to an error correction method capable of reading pages continuously.

Description of the Related Art

A non-volatile memory is generally used for many applications, for example, in solid-state disks (SSD), memory cards, digital cameras, digital video cameras, multimedia players, mobile phones, computers and other related electronic devices.

However, when the processing data (i.e. firmware) stored in the flash memory is missing or damaged (or due to poor design), the processing unit of the flash memory controller cannot operate normally, such that the user cannot read the content of the flash memory. Thus, there is a need for a flash memory controller which can analyze data in a flash memory and identify the locations of errors, when the processing data stored in the flash memory includes errors.

Generally, the error correction process and page reading process are preformed simultaneously for each page. Namely, devices must finish the reading and the error correction processes of the first page, and read and correct the next page after that. Therefore, the time that the system waits is lengthened, such that data cannot be read efficiently.

BRIEF SUMMARY OF THE INVENTION

The present invention discloses an error correction method applied to a memory device, wherein the memory device has a plurality of pages. The error correction method includes: sequentially retrieving data of a plurality of first sectors of a first page of the pages in response to a first read command; performing a first error correction by an error correction module while retrieving the data of the first page; producing a second read command when the data of the first sectors of the first page is all retrieved; and starting to sequentially retrieve data of a plurality of second sectors of a second page of the pages in response to the second read command after the data of the first sectors of the first page is all retrieved.

The present invention further discloses an error correction method applied to a memory device, wherein the memory device includes a plurality of pages. The error correction method includes: sequentially retrieving data of a plurality of first sectors of a first page of the pages in response to a first read command; performing a first error correction by an error correction module during retrieval the data of the first page; producing a second read command when the data of the first sectors of the first page is all retrieved and the first error correction is not finished; and sequentially retrieving data of a plurality of second sectors of a second page of the pages in response to the second read command.

The present invention further discloses a memory device including a flash memory, a memory controller and a processing device. The flash memory has a plurality of pages. The memory controller is arranged to sequentially retrieve data of a plurality of first sectors of a first page of the pages in response to a first read command, and start to sequentially retrieve data of a plurality of second sectors of a second page of the pages in response to a second read command after the data of the first sectors of the first page is all retrieved, wherein the memory controller further comprises an error correction module arranged to perform a first error correction on the retrieved data of the first page during retrieval the data of the first page. The processing device is arranged to produce the first read command, and to produce the second read command when the data of the first sectors of the first page is all retrieved.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 1is a schematic diagram illustrating an embodiment of a memory device of the present invention. The memory device100includes a flash memory110, a memory controller120and a processing device130. The flash memory110has a plurality of pages, wherein each of the pages has a plurality of sectors arranged to store data. The memory controller120is arranged to sequentially retrieve (read) the data stored in the sectors of the pages DAP1-DAPN according to a plurality of read commands CMD1-CMDN produced by the processing device130. It should be noted that the sectors of the first page are referred to as “first sectors”, the sectors of the second page are referred to as “second sectors”, and so on. For example, the memory controller120is arranged to sequentially retrieve (read) the data stored in all of the sectors of the first page DAP1 according to a first read command CMD1. Next, after the data of the sectors of the first page is all retrieved, the memory controller120starts to sequentially retrieve (read) all of the data of the sectors of the second page DAP2 according to a second read command CMD2, and so on. It should be noted that the memory controller120further includes a register122and an error correction module124.

The register122is arranged to store the meta data META1-META2 of the read commands CMD1-CMDN. For example, the memory controller120stores the first meta data META1 included in the first read command CMD1 in the register122after the memory controller120receives the first read command CMD1 from the processing device130. The memory controller120is further arranged to provide the first meta data META1 to the error correction module124while the error correction module124is executing the first error correction on the first page. Next, the memory controller120stores the second meta data META2 of the second read command CMD2 in the register122after the memory controller120receives the second read command CMD2 from the processing device130. The memory controller120is further arranged to provide the second meta data META2 to the error correction module124while the error correction module124is executing the second error correction on the second page, and so on.

The error correction module124is arranged to execute error correction on the data of the sectors which has been retrieved by the memory controller120while the memory controller120is retrieving the pages corresponding to the received read command. For example, the error correction module124executes the first error correction on the data of the first page, which has been retrieved by the memory controller120, during the period that the memory controller120is reading the first page. It should be noted that the error correction module124is further arranged to continually execute the first error correction on the data DAP1 when the first error correction is not finished during the period that the memory controller120is reading the second page, and start to execute the second error correction on the data DAP2 when the first error correction is finished during the period that the memory controller120is reading the second page, and so on. In another embodiment of the present invention, the error correction module124is further arranged to retrieve the first meta data META1 during the first error correction, and retrieve the second meta data META2 during the second error correction, and so on. Therefore, when the error correction module124determines that an error has occurred, the error correction module124is arranged to determine whether the error belongs to the first sectors or the second sectors according to the retrieved first meta data or the retrieved second meta data.

Namely, the error correction module124is arranged to sequentially execute error corrections on the pages retrieved by the memory controller120, and the memory controller120is arranged to sequentially and continuously retrieve the pages. Even if the error correction module124has not finished the error correction of the last page, the memory controller120will still retrieve the data of the next page. Therefore, the memory controller120of the present invention is arranged to sequentially and continuously retrieve the pages of the flash memory110without effecting an error correction. Namely, in some embodiments, the error correction module124executes the error correction of the last page when the memory controller120is already reading the data of the next page, but it is not limited thereto.

The processing device130is arranged to produce the read commands CMD1-CMDN. For example, the processing device130produces the first read command CMD1, and transmits the first read command CMD1 to the memory controller120, such that the memory controller120retrieves the data of the sectors of the first page DAP1 sequentially according to the first read command CMD1. Next, the processing device130produces the second read command CMD2 and transmits the second read command CMD2 to the memory controller120after the memory controller120has retrieved all of the data of the sectors of the first page DAP1, such that the memory controller120can retrieve the data of the sectors of the second page DAP2 sequentially in response to the second read command CMD2, and so on. It should be noted that each of the read commands CMD1-CMDN includes a corresponding meta data META1-METAN, and each of the meta data META1-METAN includes a logic address, a physical address and/or DMA (Direct Memory Access, DMA) information of the corresponding page, but it is not limited thereto. It should be noted that, in some embodiments, the processing device130is arranged to produce the second read command CMD2 after all of the data of the sectors of the first page DAP1 has been retrieved and while the first error correction is not finished.

FIG. 2is a schematic diagram of signal streams of the memory device. When the processing device130produces the first read command CMD1 including the first meta data META1, the memory controller120starts to retrieve the data of the sectors of the first page sequentially. Next, the error correction module124executes the first error correction202on the data of the sectors of the first page DAP1 sequentially. The processing device130produces the second read command CMD2 including the second meta data META2 after the memory controller120finishes retrieving the data of the sectors of the first page DAP1 no matter whether the data of the sectors of first page is all retrieved, and the memory controller120starts to retrieve the data of the sectors of second page DAP2 according to the second read command CMD2. If the first error correction202is not finished, the period of retrieving the data of the sectors of the second page DAP2 by the memory controller120will overlap with the period of the first error correction202until the first error correction202is finished. When the first error correction202is finished, the error correction module124starts to execute the second error correction204on the data of the sectors of the second page DAP2, sequentially, and so on. It should be noted that, in other embodiments, the period of retrieving the data of the sectors of the second page DAP2 by the memory controller120will not overlap with the period of first error correction202, but it is not limited thereto.

For example, each of the pages of the flash memory110has 8 sectors, and each of the sectors has 1K bits, but it is not limited thereto. The memory controller120starts to sequentially retrieve the 8 sectors of the first page of the flash memory110in response to the first read command CMD1, and the error correction module124starts to execute the error correction on the retrieved data of the sectors of the first page DAP1. When the memory controller120has retrieved the 8 sectors of the first page, the processing device130produces the second read command CMD2 and provides the second read command CMD2 to the memory controller120. Therefore, the memory controller120starts to retrieve the 8 sectors of the second page right after finishing retrieve all of the eighth sectors of the first page in response to the second read command CMD2. In one embodiment, when the memory controller120has retrieved the first to eighth sectors of the first page, the error correction module124only finishes the error correction of the first to sixth sectors of the first page. The memory controller120is arranged to retrieve the sectors of the second page when the memory controller120has retrieved all of the 8 sectors and the error correction module124has not finished the first error correction of the first page. In this embodiment, the error correction module124continuous to execute the remaining error corrections of the seventh and the eighth sectors of the first page until the error correction module124finishes the error correction of the eighth sector of the first page. When the error correction module124completes the error correction of the eighth sector of the first page, the error correction module124starts to execute the error correction on the data of the sectors of the second page DAP2 which has been retrieved by the memory controller120.

FIG. 3is a flowchart of an error correction method according to an embodiment of the present invention, wherein the error correction method is applied to the memory device100ofFIG. 1. The process starts at step S302.

In step S302, the memory controller120sequentially retrieves the data of the sectors of the first page DAP1 according to the first read command CMD1. It should be noted that, in some embodiments, the first read command CMD1 further includes a first meta data META1. The memory controller120is further arranged to store the first meta data META1 in the register122.

Next, in step S304, the error correction module124executes the first error correction on the data of the sectors of the first page DAP1 which has been retrieved by the memory controller120during the period that the memory controller120is reading the first page. It should be noted that, in some embodiments, when the error correction module124is further arranged to retrieve the first meta data META1 from the register122during the first error correction. Furthermore, when the error correction module124determines that an error has occurred, the error correction module124determines that the error belongs to the first sectors of the first page according to the retrieved first meta data META1.

Next, in step S306, the processing device130determines whether all of the data of the sectors of the first page has been retrieved by the memory controller120. When all of the data of the sectors of the first page has been retrieved by the memory controller120, the process goes to step S308, otherwise, the processing device130continuous to determine whether the data of the sectors of the first page has all been retrieved by the memory controller120.

In step S308, the processing device130produces a second read command CMD2, and the memory controller120starts to sequentially retrieve (read) the data of the sectors of the second page DAP2 according to the second read command CMD2. It should be noted that, in some embodiments, the second read command CMD2 further includes a second meta data META2. The memory controller120is further arranged to store the second meta data META2 in the register122.

Next, in step S310, the error correction module124determines whether the first error correction is finished. When the first error correction is finished, the process goes to step S312. When the first error correction is not finished, the process goes to step S314.

In step S312, when the first error correction is finished and the memory controller120is retrieving the second page, the error correction module124starts to execute a second error correction on the data of the sectors of the second page DAP2. It should be noted that, in some embodiment, the error correction module124is further arranged to retrieve the second meta data META2 from the register122during the period that the error correction module124is executing the second error correction. When the error correction module124determines that an error is occurred, the error correction module124determines that the error belongs to the second sectors of the second page according to the retrieved second meta data META2. The process ends at the step S312, but it is not limited thereto. In other embodiments, the processing device130continuous to produce the read commands corresponding to the third page, the fourth page, etc., and the following operations of the memory controller120and the error correction module124are similar to the steps S302-S318.

In step S314, the error correction module124continuous to execute the first error correction on the retrieved data of the sectors DAP1 when the first error correction is not finished during the period that the memory controller120is retrieving the second page. It should be noted that, in some embodiments, the processing device130is arranged to produce the second read command CMD2 when the first error correction is not finished and the memory controller120has retrieved all of the data of the sectors of the first page DAP1.

Next, in step S316, the error correction module124determines whether the first error correction is finished. When the first error correction is finished, the process goes to step S318, otherwise, the error correction module124continuous to determine whether the first error correction is finished.

In step S318, the error correction module124starts to execute the second error correction on the retrieved data of the sectors of the second page DAP2 when the first error correction is finished during the period that the memory controller120is retrieving the second page. It should be noted that, in some embodiment, when the error correction module124executes the second error correction, the error correction module124is further arranged to retrieve the second meta data META2 from the register122. When the error correction module124determines that an error is occurred, the error correction module124determines that the error belongs to the second sectors of the second page according to the retrieved second meta data META2. The process ends at step S318, but it is not limited thereto. In other embodiments, the processing device130continuous to produce the read commands corresponding to the third page, the fourth page, etc. Next, the operation of the memory controller120and the error correction module124is similar to the steps S302-S318.