Control circuitry used in a computing system, and power supply having the control circuitry

The present disclosure provides a control circuitry used in a computing system, for enabling or disabling a standby module of a power supply. The control circuitry is electrically coupled to two nodes of the standby module, and comprises a determination circuit, a transistor, and an optical coupler. The present disclosure further provides a power saving method used in a computing system is illustrated. Whether the computing system is turned off is determined. If the computing system is turned off, a setting that whether the turned off computing system requires the standby voltage is judged. If the turned off computing system does not require the standby voltage, a standby module of a power supply is disabled.

TECHNICAL FIELD

The present disclosure relates to a power supply of a computing system, in particular, to a power saving method and a control circuitry related to a power supply.

BACKGROUND OF THE INVENTION

The information technology manufacture now provides a mother board with a wake-up function, such as Wake-up On LAN technology (WOL) or advanced management technology (AMT). A power of the mother board with the wake-up function is provided by a power supply having a system module and a standby module, and the power supply for example is an Advanced Technology eXtended (ATX) power supply. When the user turns off the computing system, the system module of the power supply is turned off without providing the system voltage to the mother board, but the standby module of the power supply is still turned on, such that the standby module is able to provide a standby voltage to the mother board for waiting to receive a wake-up signal. Once the mother board receives the wake-up signal, the computing system will be turned on soon.

Referring toFIG. 1,FIG. 1is a block diagram of a conventional power supply. The conventional power supply1is used in a computing system for providing a power to the mother board. The conventional power supply1includes an AC rectification block11, a system module12, and a standby module13. The AC (alternative current) rectification block11receives an AC (alternative current) power from an AC (alternative current) power supply source2electrically coupled thereto, and thus outputs a DC power to the system module12and the standby module13. The AC rectification block11is further used to adjust the power factor of the DC power.

The system module12outputs a plurality of voltages such as +12V, +5V, and +3.3V. The system module12is substantially a DC/DC converter or a switched power supply module, which includes a system switch block121, an isolation transformer122, a system output block123, and a system feedback block124.

The DC power is inputted to the isolation transformer122and the system switch block121. The primary winding of the isolation transformer122is electrically coupled to the AC rectification block31and the system switch block121respectively. The system feedback block124is electrically coupled between the system switch block121and the system voltage (+5V). The system output block123electrically coupled to the two ends of the secondary winding of the isolation transformer122, and outputs the system voltages (+12V, +5V, and +3.3V) to the mother board.

The composition and function of standby module13is similar to system module12expect the output voltage. The outputted voltage of the standby module13is single for providing standby voltage, such as +5V (SB5V), to the wake-up module of the mother board.

It is noted that the system module12is turned on when the computing system is turned on, but is turned off when the computing system is turned off. The standby module13is turned on even when the computing system is turned off, such that the computing system is able to be wake-up when a wake-up signal is used to trigger the wake-up module of the mother board. Even when the computing system or the mother board is not used to support the wake-up function, the standby module13still provides the standby voltage, and thus the unnecessary power consumption is increased.

Currently, more and more people take care of the environmental protection issue, and most countries are dedicated to reduce the unnecessary power consumption. To save the power, the user must pull the plug of the power supply or switch the on/off bottom of the conventional power supply to turn off the standby module, and thus it is inconvenient to the user.

SUMMARY OF THE INVENTION

An exemplary embodiment of the present disclosure provides a control circuitry used in a computing system, for enabling or disabling a standby module of a power supply. The control circuitry is electrically coupled to two nodes of the standby module, and comprises a determination circuit, a transistor, and an optical coupler. The determination circuit judges a setting that whether the turned off computing system requires a standby voltage. The transistor has a control end electrically coupled to the determination circuit. When the determination circuit judges the setting that the turned off computing system requires a standby voltage correspondingly, the transistor is turned off, otherwise, the transistor is turned on. The optical coupler is electrically coupled to the transistor. When the transistor is turned on, the optical coupler shorts the two nodes of the standby module to enable the standby module, and when the transistor is turned off, the optical coupler disconnects the two nodes of the standby module to disable the standby module.

An exemplary embodiment of the present disclosure provides a power supply comprising an AC rectification block, a system module, and a standby module. The system module is coupled to the AC rectification block. The standby module is coupled to the AC rectification block. The standby module has a control circuitry. The control circuitry judges a setting that whether the turned off computing system requires a standby voltage correspondingly to enable or disable the standby module.

An exemplary embodiment of the present disclosure provides a power saving method used in a computing system. Whether the computing system is turned off is determined. If the computing system is turned off, a setting that whether the turned off computing system requires the standby voltage is judged. If the turned off computing system does not require the standby voltage, a standby module of a power supply is disabled.

To sum up, the power saving method and the control circuitry disclosed in the exemplary embodiment of the present disclosure therefore meet the environmental protection tends, and bring the convenience to the user.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Referring toFIG. 2A,FIG. 2Ais a block diagram of a computing system according to an exemplary embodiment of the present disclosure. The computing system4comprises a mother board40, a memory45, and a hard disk46. The memory45and the hard disk46are electrically coupled to the mother board40. The mother board40comprises a processor41, a local area network (LAN) module42, a south bridge chip43, a flash44, and a control circuitry335. The south bridge chip43is electrically coupled to the processor41, the LAN module42, and the flash44. The control circuitry335is electrically coupled to the power supply3.

The control circuitry335controls the power supply3whether to output the standby voltage to computing system4. That is, the standby module of the power supply can be turned off by the control of the control circuitry335when the computing system4does not require the standby voltage, such that the power consumption is saved.

The control circuitry335is integrated in the mother board40in the exemplary embodiment ofFIG. 2A, but the present disclosure is not limited thereto. Referring toFIG. 2B,FIG. 2Bis a block diagram of a computing system according to an exemplary embodiment of the present disclosure. In this embodiment, the control circuitry335is integrated in the power supply3′ instead of integrating in the mother board40of the exemplary embodiment ofFIG. 2A. In some consideration such as for guarantee the requirement of the electromagnetic compatibility (EMC) or to prevent the damage of the component of the mother board from high volts output of AC rectification block, it is preferred to integrate the control circuitry335in the power supply3′ asFIG. 2Bdemonstrated.

Referring toFIG. 3,FIG. 3is a flow chart of a power saving method according to an exemplary embodiment of the present disclosure. The power saving method is used in control circuitry for controlling power supply whether to output the standby voltage to a computing system. The control circuitry receives a least one of specific signals, such as the signal SLP_LAN_N (or the signals SLP_LAN_N and SLP_S5) from the mother board to determine whether the standby module should be turned off or turned on when the computing system is turned off. The control circuitry may be implemented by a firmware, hardware, software or the combination thereof.

In step S200, whether the computing system is tuned off is determined by the control circuitry in the power supply. The control circuitry detects the voltage level of at least one of the system state signals that is presented of the system state of the computing system, so as to determine whether the computing system is turned off according to the at least one of the received system state signals. For example, the system state signal can be the signal SLP_S5or SLP_S4, and the control circuitry detects the voltage level of the signal SLP_S5or SLP_S4to determine whether the computing system is turned off. In practice, after the user pushes the power switch or orders a turned off command through the operating system, the system state signal SLP_S5would be the low level. If the computing system is not turned off, step200will be executed again. If the computing system is turned off, step S202will be executed.

In step S202, a setting of the computing system is judged. The control circuitry judges the setting according to a judging table or at least one of standby voltage demand signals, wherein the standby voltage demand signal is presented of the requirement of the standby voltage in the computing system. The standby voltage demand signal can be the wake-up function supportable signal, for example, the signal SLP_LAN_N. The setting can be simply judged according to the voltage level of the signal SLP_LAN_N, or the setting can be judged according to both of the voltage levels of the signals SLP_LAN_N and SLP_S5.

If the control circuitry judges the setting that computing system should enter the saving mode, step S204will be executed. If the computing system judges the setting that the computing system should not enter the saving mode, i.e., the computing system should enter a normal mode, step S206will be executed.

In step S204, the control circuitry disables the standby module of the power supply, such that the computing system enters the saving mode, and the power supply does not provide the standby voltage (SB5V) to the mother board. In step S206, the control circuitry enables the standby module of the power supply, such that the computing system enters the normal mode, and thus the standby voltage (SB5V) is provided to the mother board.

Referring toFIG. 4,FIG. 4is a table showing the relation among the system state, the standby voltage, the signal SLP_LAN_N, and the condition whether the computing system supports the wake-up function according to an exemplary embodiment of the present disclosure. In this exemplary embodiment, when the system state of the computing system is turned off, whether the standby module is disable or enable is judged according to the signal SLP_LAN_N. If the condition is that the mother board or the computing system is not able to support the wake-up function, the signal SLP_LAN_N would be the low level, and thus the setting that the computing system should enter the saving mode is judged. Conversely, if the condition is that the mother board and the computing system are able to support the wake-up function, the signal SLP_LAN_N would be the high level, and thus the setting that the computing system should enter the normal mode is judged.

It is noted that the foregoing example is not used to limit the present disclosure. The user mutually specify the condition whether the computing system should not enter a saving mode by configuring BIOS (Basic Input and Output System) or adjusting jumpers on the mother board.

The aforementioned method is very convenient to the user without pulling the plug of the power supply or switching the on/off bottom of the power supply to turn off the whole power supply, such that the standby module is disabled, and the unnecessary power consumption is saved.

When the computing system in the saving mode, the user can push the power switch of the computing system to restart the computing system, and thus the battery (such as VCC battery) can be used to activate the control circuitry to enable the standby module of the power supply. Then, the voltage levels of the standby voltage (SB5V), and the signals SLP_S5, SLP_LAN_N would change to be the high level.

Referring toFIG. 5A,FIG. 5Ais a block diagram of a power supply according to an exemplary embodiment of the present disclosure. The power supply3is used to provide different voltages to the mother board. The power supply3includes an AC rectification block31, a system module32, and a standby module33. The control circuitry335in the mother board is electrically coupled to the standby module33. The AC power supply source2is electrically coupled to the AC rectification block31through nodes N1and N2respectively. The AC rectification block31outputs a DC power to the system module32and the standby module33through node N3. The AC rectification block31further adjusts the power factor of the DC power.

The system module32outputs a plurality of voltages for computing system such as +12V, +5V, and +3.3V. The system module32is substantially a DC/DC converter or a switched power supply module, which includes a system switch block321, an isolation transformer322, a system output block323, and a system feedback block324.

The DC power is inputted to the isolation transformer322, the system switch block321, and the standby module33through node N3. The primary winding of the isolation transformer322is electrically coupled to the output of AC rectification block31and the system switch block321through nodes N3and N4respectively. The system feedback block324is electrically coupled between system switch block321through node N7and one of the system voltage outputs such as +5V. The system output block323is electrically coupled to the secondary winding of the isolation transformer322through nodes N5and N6, and outputs the multiple system voltages, such as +12V, +5V, and +3.3V, to the mother board.

The control circuitry335in the mother board is electrically coupled to the standby module33, and used to judge the setting whether the standby module33should be disabled or enabled. The standby module33outputs a standby voltage (SB5V) when the computing system operates in the normal mode, otherwise it is disable to output the standby voltage (SB5V) when the computing system enters the saving mode. The standby module33is substantially a DC/DC converter or a switched power supply module, which includes a standby switch block331, an isolation transformer332, a standby output block333, and a standby feedback block334.

The control circuitry335in the mother board is electrically coupled to the standby module33respectively through the nodes N8, N11. The DC power is inputted to the isolation transformer332and the standby switch block331through node N3. The primary winding of the isolation transformer332is electrically coupled to the AC rectification block31and the control circuitry335respectively through nodes N3and N8. The standby feedback block334is electrically coupled between the standby switch block331through node N12and the output of standby module33. The standby output block333is electrically coupled to the secondary winding of the isolation transformer332through nodes N9and N10, and the output of standby module33which connected to the mother board.

The control circuitry335can be a hardware based implementation for enabling or disabling the standby module33, and the control circuitry335receives at least one of the system state signals and standby voltage demand signals, such as SLP_S5and SLP_LAN_N signals from the mother board. Once the computing system enters the saving mode, the control circuitry335disconnects the nodes N8and N11, and thus the standby module33is disabled to output the standby voltage (SB5V). Otherwise, the control circuitry335shorts the nodes N8and N11, and thus the computing system keeps operating in the normal mode and outputting the standby voltage (SB5V).

As mentioned above, the control circuitry335may be implemented in the power supply3′ as shown inFIG. 5B.FIG. 5Bis a block diagram of a power supply according to another exemplary embodiment of the present disclosure. In this embodiment, the standby module33′ includes the control circuitry335, and the power supply3′ electrically coupled to the mother board to receive the signals SLP_S5and SLP_LAN_N.

Referring toFIG. 6,FIG. 6is a block diagram of a control circuitry according to an exemplary embodiment of the present disclosure. The control circuitry335is a hardware implementation, but the present disclosure is not limited thereto. In the exemplary embodiment, the control circuitry335receives two signals SLP_LAN_N and SLP_S5from the mother board to judge the setting. It is noted that, in the other exemplary embodiment, the control circuitry may receive at least one of system state signals and standby voltage demand signals, wherein the standby voltage demand signal can be the wake-up function supportable signal.

The control circuitry335includes a flow controller3351, a power switch SW1, resistors R17, R18, R19, a transistor M4, diodes D10, D11, an optical coupler62, and a determination circuit61. The flow controller3351is electrically coupled to the battery voltage (VCC_BATTERY), the standby voltage (SB5V), and a pin P3of the power switch SW1. Pins P1and P2of the power switch SW1are electrically coupled to the power ends (PW+, PW−) of the AC power supply source2respectively. One end of diode D10is electrically coupled to SB5V and the other end is electrically coupled to the resistor R19, a pin P4of the power switch SW1and one end of diode D11. The other end of diode D11is electrically coupled to the resistor R17. The resistor R18is electrically coupled to the ground and the resistor R17. A first end of the transistor M4is electrically coupled to a pin P6of the optical coupler62, a second end of the transistor M4is electrically coupled to the ground, and a control end of the transistor M4is electrically coupled to the determination circuit61, resistors R17and R18. A pin P5of the optical coupler62is electrically coupled to the resistor R19. Pins P7and P8of the optical coupler62are electrically coupled to nodes N8and N11respectively. The determination circuit61is electrically coupled to the mother board to receive the signals SLP_LAN_N and SLP_S5.

In the exemplary embodiment, the determination circuit61is implemented by a logic-OR operation gate OR1for receiving the signals SLP_LAN_N and SLP_S5. In other practices, the determination circuit61may be any combination of logic gates, and the determination circuit61may receive at least one of signals system state signals and standby voltage demand signals, wherein the standby voltage demand signal can be the wake-up function supportable signal.

Referring toFIG. 7A,FIG. 7Ais a wave diagram of the signals in the control circuitry when computing system supports the wake-up function according to an exemplary embodiment of the present disclosure. At time T1, the computing system supporting WOL technology and AMT is turned off (i.e. the system state is for example G3).

During the time T2, when the user pushes the power switch SW1to turn on the computing system to support WOL technology and AMT (i.e. the system state is for example the S5state), the pins P1and P2are shorted, and the pins P3and P4are shorted. A current is flowing from the battery VCC_BATTERY to the ground through the diode D8, the pins P3, P4, the diode D11and the resistor R17, R18, and the transistor M4is turned on. Since the transistor M4is turned on, the pins P5and P6are shored, and pins P7and P8are shorted. Thus, the standby module is enabled to provide the standby voltage SB5V to the mother board. The diode D9of the flow controller3351is then turned on, and the diode D8of the flow controller3351is turned off. Thus, a current is flowing from the standby voltage SB5V to the ground through the diode D9, the pins P3, P4, the diode D11and the resistor R17, R18, and the transistor M4keep turning on.

After the computing system is turned on at time T2, the computing system enters the system states S0and S3respectively at time T3and T4. At time T5, the computing system is turned off, and the system state is for example S5. The signals SLP_LAN_N and SLP_S5are the high level and the low level respectively, and thus the determination circuit61outputs a high level voltage, and the transistor M4is still turned on. Thus, the nodes N8and N11are still shorted, and the standby module of the power supply keeps enabled when the signal SLP_S4or SLP_S5changes from high level to low level.

Referring toFIG. 7B,FIG. 7Bis a wave diagram of the signals in the control circuitry when computing system does not supports the wake-up function according to an exemplary embodiment of the present disclosure. At time T1, the computing system is turned off (i.e. the system state is for example G3). Then, at time T2, the user pushes the power switch SW1to turn on the computing system (i.e. the system state is for example the S5state), the pins P1and P2are shorted, and the pins P3and P4are shorted. A current is flowing from the battery VCC_BATTERY to the ground through the diode D8, the pins P3, P4, the diode D11, and the resistor R17, R18, and the transistor M4is turned on. Since the transistor M4is turned on, the pins P5and P6are shored, and pins P7and P8are shorted, a current is flowing from the standby voltage SB5V to the ground through the diode D10, the resistor R19, and the transistor M4. Thus, the standby module is enabled to provide the standby voltage SB5V to the mother board, and the diode D9of the flow controller3351is then turned on, the diode D8of the flow controller3351is turned off. Thus, a current is flowing from the standby voltage SB5V to the ground through the diode D9, the pins P3, P4, the diode D11and the resistor R17, R18, and the transistor M4is keep turning on.

After the computing system is turned on at time T2, the computing system enters the system states S0and S3respectively at time T3and T4. From time T4to time T5, both of the signals SLP_LAN_N and SLP_S5change from high level to low level. At time T5, the signals SLP_LAN_N and SLP_S5are the low level, thus the determination circuit61outputs a low level voltage, and the transistor M4is turned off. Accordingly, the nodes N8and N11are disconnected, and the standby module of the power supply is disabled.

To sum up, exemplary embodiments of the present disclosure provide a power saving method and the control circuitry used in the computing system which can automatically turn off the standby module when the turned off computing system does not require the standby voltage (SB5V). The control circuitry disclosed in the exemplary embodiment of the present disclosure therefore meets the environmental protection tends, and brings the convenience to the user to save unnecessary power consumption without pulling the plug of the power supply or switching the on/off bottom of the power supply to disable the standby module.