RRAM STRUCTURE AND METHOD OF FABRICATING THE SAME

An RRAM structure includes a bottom electrode, a resistive switching layer, a top electrode, a spacer and a conductive line. The bottom electrode is a first cylinder. The resistive switching layer includes a second cylinder and a three-dimensional disk. A first bottom of the second cylinder directly contacts a top surface of the three-dimensional disk. The top electrode is a third cylinder. The third cylinder includes a top base, a second bottom base and a sidewall. The first cylinder is embedded within the second cylinder and the three-dimensional disk. The second cylinder is embedded within the third cylinder and the second bottom base of the third cylinder directly contacts the top surface of the three-dimensional disk. The spacer surrounds and directly contacts a side surface of the three-dimensional disk. The conductive line encapsulates the top base and the sidewall of the third cylinder.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a resistive random access memory (RRAM), in particular to an RRAM and a fabricating method for of an RRAM with increased resistance difference between a high resistance state and a low resistance state.

2. Description of the Prior Art

Nonvolatile memory is capable of retaining the stored information even when unpowered. Non-volatile memory may be used for secondary storage or long-term persistent storage. RRAM technology has been gradually recognized as having exhibited those semiconductor memory advantages.

RRAM cells are non-volatile memory cells that store information by changes in electric resistance, not by changes in charge capacity. In general, the resistance of the resistive switching layer varies according to an applied voltage. An RRAM cell can be in a plurality of states in which the electric resistances are different. Each different state may represent a digital information. The state can be changed by applying a predetermined voltage or current between the electrodes. A state is maintained as long as a predetermined operation is not performed.

With the growth of electronic data, the demand for memory with high capacity, higher read/write endurance and faster read/write speed is also increased. In order to achieve operation with high performance, it is necessary to increase the retention and endurance of RRAM.

SUMMARY OF THE INVENTION

According to a preferred embodiment of the present invention, an RRAM structure includes a bottom electrode, a resistive switching layer, a top electrode, a spacer and a conductive line. The bottom electrode is a first cylinder. The resistive switching layer includes a second cylinder and a three-dimensional disk, wherein a first bottom base of the second cylinder directly contacts a top surface of the three-dimensional disk. The top electrode is a third cylinder, wherein the third cylinder includes a top base, a second bottom base and a sidewall, the first cylinder is embedded within the second cylinder and the three-dimensional disk, the second cylinder is embedded within the third cylinder and the second bottom base of the third cylinder directly contacts the top surface of the three-dimensional disk. The spacer surrounds and directly contacts a side surface of the three-dimensional disk. The conductive line encapsulates the top base and the sidewall of the third cylinder.

According to another preferred embodiment of the present invention, a fabricating method of an RRAM structure includes forming a bottom electrode, a resistive switching layer and a top electrode in sequence, wherein the bottom electrode is a first cylinder, the resistive switching layer includes a second cylinder and a three-dimensional disk, the top electrode is a third cylinder, the third cylinder includes a top base, a second bottom base and a sidewall. Later, a spacer is formed to surround the resistive switching layer. Finally, a conductive line is formed to encapsulate and directly contact the top base and the sidewall of the third cylinder.

DETAILED DESCRIPTION

FIG.1depicts a three-dimensional diagram of an RRAM according to a preferred embodiment of the present invention.FIG.2depicts an exploded view ofFIG.1.FIG.3depicts a three-dimensional diagram of an RRAM structure according to a preferred embodiment of the present invention.

As shown inFIG.1andFIG.2, an RRAM100includes a bottom electrode BE, a resistive switching layer R, a top electrode TE and a spacer S. The bottom electrode BE is a solid first cylinder10. The resistive switching layer R includes a second cylinder12and a three-dimensional disk14. The second cylinder12has an accommodating space12dfor accommodating the bottom electrode BE, and a first bottom base12of the second cylinder12directly contacts a top surface14bof the three-dimensional disk14. The diameter of the top surface14bof the three-dimensional disc14is greater than the diameter of the first bottom base12a. The top electrode TE is a third cylinder16. The third cylinder16includes a top base16b, a second bottom base16aand a sidewall16c, and the third cylinder16also has an accommodating space16d. The first cylinder10passes through the three-dimensional disk14and is embedded in the accommodating space12dof the second cylinder12. The second cylinder12is embedded in the accommodating space16dof the third cylinder16. The second bottom base16aof the third cylinder16directly contacts the top surface14bof the three-dimensional disk14. The spacer S surrounds and directly contacts a side surface14cof the three-dimensional disk14, and part of the sidewall16cof the third cylinder16. That is to say, the spacer S entirely covers a sidewall of the resistive switching layer R aligning with the top electrode TE and an interface between the resistive switching layer R and the top electrode TE. In this way, the resistive switching layer R is kept from being exposed to the environment, thus oxidation of the resistive switching layer R can be prevented and moisture can also be kept from getting into the resistive switching layer R. As shown inFIG.3, a conductive line ML is disposed on the top electrode TE of the RRAM100. In details, the conductive line ML encapsulates the top base16band the sidewall16cof the third cylinder16.

The bottom electrode BE includes tantalum, titanium, titanium nitride, tantalum nitride or other metal materials. The top electrode TE includes iridium, titanium nitride, tantalum nitride or other metal materials. The resistive switching layer R includes tantalum oxide, nickel oxide, hafnium oxide or other transition metal oxides. The spacer S includes silicon nitride. The conductive line ML includes copper, aluminum, tungsten or other metals or alloys.

FIG.4toFIG.10are schematic diagrams of a fabricating process of an RRAM structure according to a preferred embodiment of the present invention. The fabrication method of the RRAM100and the RRAM structure200shown inFIG.1toFIG.3will be described with reference toFIG.4toFIG.10, wherein elements which are substantially the same as those inFIG.1toFIG.3are denoted by the same reference numerals; an accompanying explanation is therefore omitted.

As shown inFIG.4, a dielectric layer18aand a dielectric layer18bare provided. The dielectric layer18bcovers the dielectric layer18a, and a metal line20is disposed within the dielectric layer18a. A conductive plug22is disposed in the dielectric layer18b, and the conductive plug22contacts the metal line20. Next, a dielectric layer18cis formed to cover the dielectric layer18band contacts the conductive plug22. The dielectric layer18ccan be nitrogen-doped carbide. Later, a dummy material layer24is formed to cover and contact the dielectric layer18c. The dielectric layer18aand the dielectric layer18bmay include silicon oxide, silicon nitride or other insulating materials. The metal line20and the conductive plug22may include copper, aluminum, tungsten or other conductive materials. The dummy material layer24includes silicon oxide.

Then, the dummy material layer24is etched to form a hole24a, the hole24ais preferably in a shape of a cylinder. Afterwards, a bottom electrode material layer (not shown) is formed to cover the dummy material layer24and fill in the hole24a. Subsequently, the bottom electrode material layer is planarized to remove the bottom electrode material layer outside the hole24a. Now, the bottom electrode material layer remaining in the hole24aserves as the bottom electrode BE. As shown inFIG.5, the dummy material layer24is removed. Now, the bottom electrode BE protrudes from the dielectric layer18c. Afterwards, a resistive switching material layer R1and a top electrode material layer TE1are sequentially formed to conformally cover the bottom electrode BE and the dielectric layer18c. According to a preferred embodiment of the present invention, the resistive switching material layer R1includes an oxygen atom storage material layer26aand a current formation material layer28a, the current formation material layer28ais disposed on the oxygen atom storage material layer26a. In details, the oxygen atom storage material layer26aincludes tantalum oxide (TaOx, x<2.5), and the current formation material layer28aincludes tantalum pentoxide (Ta2O5).

As shown inFIG.6, the top electrode material layer TE1and the resistive switching material layer R1are patterned to form a top electrode TE and a resistive switching layer R. The oxygen atom storage material layer26aafter patterning becomes an oxygen atom storage layer26, and the current formation material layer28aafter patterning becomes a current formation layer28a. It is added that: inFIG.1andFIG.2, in order to make the illustrations clear and concise, the resistive switching layer R is shown as a single layer. In fact, in the embodiment of the present invention, the resistive switching layer R preferably includes the oxygen atom storage layer26and the current formation layer28shown inFIG.6. Furthermore, when viewing from a sectional view, the top electrode TE forms an inverted U shape, and the resistive switching layer R forms a square wave shape. The square wave shape includes an inverted U shape with a rectangular respectively connecting to two ends of the inverted U shape. The rectangular extends toward a lateral direction X, and the lateral direction X is parallel to a top surface of the dielectric layer18c.

As shown inFIG.7, a spacer material layer S1is formed to cover the top electrode TE, the resistive switching layer R and the bottom electrode BE. As shown inFIG.8, the spacer material layer S1is etched to form a spacer S. The height of the spacer S should not less than a vertical sidewall of the rectangular at the end of the inverted U shape of the resistive switching layer R. Preferably, the height of the spacer S needs to be greater than the thickness of the resistive switching layer R. That is, the spacer S needs to completely cover the vertical sidewall of the rectangular at the end of the inverted U shape of the resistive switching layer R. According to a preferred embodiment of the present invention, the spacer S can further extend to contact the sidewall of the top electrode TE. In other words, the spacer S completely covers the interface between the resistive switching layer R and the top electrode TE. Now, an RRAM100of the present invention is completely. As shown inFIG.9, a dielectric layer18dis formed to cover the top electrode TE, the resistive switching layer R, the bottom electrode BE and the spacer S. The dielectric layer18dis preferably silicon oxide. As shown inFIG.10, the dielectric layer18dis etched to expose the top electrode TE. In details, the dielectric layer18dis etched to form a trench (not shown), so that the top electrode TE is exposed through the bottom of the trench. Next, a conductive line ML is formed to fill the trench and cover the top electrode TE. When viewing from a sectional view, the conductive line ML contacts the inverted U shape formed by the top electrode TE. Now, an RRAM structure200of the present invention is completely. Moreover, the etching depth of the dielectric layer18dcan be adjusted according to different requirements. It is noteworthy that when etching the dielectric layer18d, because the material of the spacer S and the material of the dielectric layer18dare different, the spacer S is not etched during the etching process. Therefore, even the top electrode TE is completely exposed in the etching process, the spacer S can still protect the resistive switching layer R from been damaged during the etching process. In a preferred embodiment of the present invention, after etching the dielectric layer18dto form the trench, the thickness of the remaining dielectric layer18dat the bottom of the trench is still greater than the height of the spacer S to keep the spacer S from exposing through the dielectric layer18dat the bottom of the trench. However, in other embodiments, the dielectric layer18dmay be etched to expose a portion of the spacer S.

In the present invention, the conductive line ML covers the top base16band the sidewall16cof the third cylinder16formed by the top electrode TE, so that the contact area between the top electrode TE and the conductive line ML increases. In this way, during a forming process of the RRAM100, current is increased, and the forming process of the RRAM100can be performed more quickly. In addition, conductive filaments can be formed between the circumference of the second cylinder12and the bottom electrode BE and between the bottom electrode BE and a first top base12bof the second cylinder12. Therefore, as the total amount of conductive filaments increase, the resistance of the low resistance state of the RRAM100is smaller than the resistance of the low resistance state of the general RRAM. In this way, the resistance difference between the high resistance state and the low resistance state of the RRAM100of the present invention can be increased, and the retention and read/write endurance of the RRAM100can be increased.