METHOD FOR FORMING CONTACT STRUCTURE, SEMICONDUCTOR STRUCTURE AND MEMORY

A method for forming a contact structure includes: a base is provided and a sacrificial layer is formed on the base; the sacrificial layer is patterned to form a first gap exposing the base in the sacrificial layer; a dielectric layer is deposited in the first gap; the sacrificial layer is removed to form a second gap between dielectric layers; at least part of the dielectric layer at a periphery of the second gap is etched, to enlarge a size of an opening of the second gap.

BACKGROUND

A Dynamic Random Access Memory (DRAM) is a kind of semiconductor memory. With the development of DRAM manufacturing technology, Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) devices are shrinking in size, and the Aspect-Ratio (AR) of a contact structure is getting larger. Under-etching is prone to occur when etching under high aspect ratio (HAR), which leads to disconnection.

SUMMARY

The present disclosure relates to, but is not limited to, a method for forming a contact structure, a semiconductor structure, and a memory.

The embodiments of the disclosure provide a method for forming a contact structure, a semiconductor structure and a memory.

According to some embodiments, a first aspect of the embodiments of the present disclosure provides a method for forming a contact structure, which includes the following operations. A base is provided and a sacrificial layer is formed on the base. The sacrificial layer is patterned to form a first gap exposing the base in the sacrificial layer. A dielectric layer is deposited in the first gap. The sacrificial layer is removed to form a second gap between dielectric layers. At least part of the dielectric layer is etched at a periphery of the second gap, to enlarge a size of an opening of the second gap.

According to some embodiments, a second aspect of the embodiments of the present disclosure provides a semiconductor structure, which includes: a base; a dielectric layer on the base, a second gap is in the dielectric layer, the second gap has different sizes in a direction parallel to the substrate; and a contact structure, the second gap is filled with the contact structure.

According to some embodiments, a third aspect of the embodiments of the present disclosure provides a semiconductor memory including the contact structure described in any of the preceding embodiments.

LIST OF REFERENCE NUMERALS

DETAILED DESCRIPTION

In order to make the objectives, technical solutions and advantages of the embodiments of the present disclosure clearer, the embodiments of the present disclosure will be described in further detail below in combination with specific implementations with reference to the accompanying drawings. It should be understood that these descriptions are exemplary only and are not intended to limit the scope of the disclosed embodiments. Furthermore, in the following description, a description of well-known structures and techniques is omitted to avoid unnecessarily confusing the concepts of the present disclosure.

As shown inFIG.1, a method for forming a contact structure is provided, which includes the following operations.

At S10, a base100is provided and a sacrificial layer200is formed on the base100.

At S20, the sacrificial layer200is patterned to form a first gap300exposing the base100in the sacrificial layer.

At S30, a dielectric layer400is deposited in the first gap300.

At S40, the sacrificial layer200is removed to form a second gap500between dielectric layers400.

At S50, at least part of the dielectric layer400at a periphery of the second gap500is etched, to enlarge a size of an opening of the second gap500.

According to the method for forming the contact structure600provided by the embodiment of the present disclosure, a sacrificial layer200is deposited on a base100, a first gap300is formed in the sacrificial layer200and a dielectric layer400filling the first gap300is formed, then a second gap500for being filled with the contact structure600is formed after removing the sacrificial layer200. In the method, under-etching is not prone to occur for the second gap500, which is useful to solve the disconnection problem of the contact structure600caused by under-etching under HAR.

In some embodiments, the base100is a conductive base100.

Exemplarily, the base100may be a conductive layer on a substrate. Herein, the substrate may be a semiconductor substrate, a silicon-on-insulator (SOI) substrate, a germanium-on-insulator (GOI) substrate, a single crystal metal oxide substrate, and the like. A surface area of the substrate may be formed with a plurality of deep grooves. An isolation material is filled in deep grooves to form isolation areas. A plurality of active areas are isolated by the isolation areas on the substrate. A plurality of active areas distributed in an array or other forms may be isolated by the isolation areas on the substrate. The active areas can be formed by implanting impurities into the substrate. For example, the active areas can be formed by an ion implantation process. The conductive layer may be a wire layer electrically connected to the active areas of the substrate or may be a wire layer interconnected with other wires. It is to be noted that those skilled in the art will understand that there are other structures for normal operation of the memory in the substrate, besides the isolation areas and the active areas.

As shown inFIG.2, in operation S10, a sacrificial layer200is formed on a base100.

In some embodiments, the sacrificial layer200may be polycrystalline silicon, monocrystalline silicon or silicide, and the sacrificial layer200may be formed by a Spin-On Deposition (SOD) process, a chemical vapor deposition (CVD) process, a plasma enhanced chemical vapor deposition (PECVD) process, a high density plasma chemical vapor deposition (HDP-CVD) process, or the like. For example, the sacrificial layer200is polycrystalline silicon formed by SOD. The sacrificial layer200formed by SOD has better adhesion and gap filling ability.

As shown inFIG.3, in operation S20, a first gap300exposing the base100is formed in the sacrificial layer200.

In some embodiments, a plurality of the first gaps300are formed on the base100, the sacrificial layer200is between adjacent first gaps300, the sacrificial layer200between the first gaps300has a maximum size D in a direction parallel to the base100, and the maximum size D is smaller than or equal to one tenth of a size of an opening of the first gap300.

In some embodiments, the size of the opening of the first gap300may gradually decrease in a direction perpendicular to the base100, so that the sacrificial layer200between the first gaps300is trapezoidal, thereby the sacrificial layer200is not prone to collapse during the formation of the first gap300. Exemplarily, a spacing exists between adjacent sacrificial layers200in the direction parallel to the base100, the spacing gradually decreases in the direction perpendicular to the base.

In other exemplary embodiments, the size of the opening of the first gap300may also constant in the direction perpendicular to the base100.

In some embodiments, the formation process of the first gap300may be wet etching or dry etching, such as, wet etching with phosphoric acid (H3PO4) as an etching solution or dry etching with N2 plasma as an etching gas.

In some embodiments, in order to form the contact structure600with a HAR structure, the sacrificial layer200between respective the first gaps300has a first height H in a direction perpendicular to the base100, the first height H is not smaller than ten times the maximum size D of the sacrificial layer200.

As shown inFIG.4, in operation S30, a dielectric layer400is deposited in the first gap300.

In some embodiments, the dielectric layer400may include silicon oxide, silicon nitride, silicon oxynitride, and the like. For example, the dielectric layer400may be formed by using undoped silicate glass (USG), spin on glass (SOG), phosphosilicate glass (PSG), borosilicate glass (BSG), boron-phosphosilicate glass (BPSG), flowable oxide (FOX), tetraethyllorthosilicate (TEOS), plasma enhanced TEOS (PE-TEOS), Tonen silazane (TOSZ), high density plasma chemical vapor deposition (HDP-CVD) oxide, and the like, which may be used alone or in combination. In addition, the dielectric layer400may be formed by a SOD process, a CVD process, a PECVD process, a HDP-CVD process, and the like.

In some embodiments, the dielectric layer400includes a first dielectric layer410and a second dielectric layer420on the first dielectric layer410. The first dielectric layer410has a first thickness h1in the direction perpendicular to the base100. The second dielectric layer420has a second thickness h2in the direction perpendicular to the base100. The first thickness h1is greater than the second thickness h2.

Exemplarily, the dielectric layer400may be formed by: depositing a first dielectric film within the first gap300, removing a part of the first dielectric film so that its surface reaches a preset height to form the first dielectric layer410, depositing a second dielectric film within the first gap300and on the first dielectric layer410, removing a part of the second dielectric film so that its surface is flush with the surface of the sacrificial layer200to form the second dielectric layer420.

As shown inFIG.5, in operation S40, the sacrificial layer200is removed to form a second gap500between dielectric layers400.

In some embodiments, the sacrificial layer200may be removed by using a wet cleaning process, for example, wet etching with phosphoric acid (H3PO4) as an etching solution.

In this embodiment, in the method adopting the wet cleaning process, a suitable etching material can be selected, so that the wet cleaning has a certain etching selection ratio for the sacrificial layer200and the dielectric layer400, thereby avoiding the etching of the dielectric layer400which may damage the structure in the process of etching the sacrificial layer200. In other embodiments, the material of the sacrificial layer200is a carbonaceous material, and in the subsequent process of removing the sacrificial layer200to form the second gap500, the sacrificial layer200may be removed by an ashing process. The ashing gas reacts with the carbonaceous material to generate a carbon dioxide gas, thereby converting the sacrificial layer200into gaseous carbon dioxide to remove the sacrificial layer200. Therefore, a collapse phenomenon due to a large impact on the dielectric layer400in the sidewall is prevented during the formation of the second gap500.

As shown inFIG.6, in operation S50, at least part of the dielectric layer400at a periphery of the second gap500is etched to enlarge a size of an opening of the second gap500.

In some embodiments, the size of the opening of the second gap500may be enlarged by etching the second dielectric layer420. After the size of the opening of the second gap500is enlarged, the formed contact structure600may has a smaller contact resistance. In consideration of the demand of the final size of the second gap500, the second dielectric layer420does not need to be too thick, because the top opening size may be too large if the second dielectric layer420is too thick, but the size of the remaining gap is not effectively enlarged.

In some embodiments, at least part of the second dielectric layer420at the periphery of the second gap500may be etched by using a wet cleaning process, such as, wet etching with phosphoric acid (H3PO4) as an etching solution.

As shown inFIG.7, in some embodiments, the method for forming the contact structure600further includes the following operations.

A conductive material is filled into the second gap500after the etching process, to form a contact structure600.

Exemplarily, the material of the contact structure600may include tungsten, silicon nitride, silicon oxynitride and the like. For example, a stop layer may be formed by using undoped silicate glass (USG), spin on glass (SOG), phosphosilicate glass (PSG), borosilicate glass (BSG), boron-phosphosilicate glass (BPSG), flowable oxide (FOX), tetraethyllorthosilicate (TEOS), plasma enhanced TEOS (PE-TEOS), Tonen silazane (TOSZ), high density plasma chemical vapor deposition (HDP-CVD) oxide, and the like, which can be used alone or in combination.

As shown inFIG.8, an embodiment of the present disclosure also provides a contact structure. The contact structure includes: a base100; a dielectric layer400on the base100, a second gap500is in the dielectric layer400, the second gap500has different sizes in a direction parallel to the substrate100; and a contact structure600, the second gap500is filled with the contact structure600.

For the contact structure600according to the embodiment of the present disclosure, a sacrificial layer200may be deposited on a base100, a first gap300is formed in the sacrificial layer200and a dielectric layer400filling the first gap300is formed, then a second gap500for being filled with the contact structure600is formed after removing the sacrificial layer200. In the method, under-etching is not prone to occur for the second gap500, which is useful to solve the disconnection problem of the contact structure600caused by under-etching under HAR.

In some embodiments, the base100includes metal wire layer.

Exemplarily, the base100includes a conductive layer on a substrate. Herein, the substrate may be a semiconductor substrate, a silicon-on-insulator (SOI) substrate, a germanium-on-insulator (GOI) substrate, a single crystal metal oxide substrate, and the like. A surface area of the substrate may be formed with a plurality of deep grooves. An isolation material is filled in deep grooves to form isolation areas. A plurality of active areas are isolated by the isolation areas on the substrate. A plurality of active areas distributed in an array or other forms may be isolated by the isolation areas on the substrate. The active areas can be formed by implanting impurities into the substrate. For example, the active areas can be formed by an ion implantation process. It is to be noted that those skilled in the art will understand that there are other structures for normal operation of the memory in the substrate, besides the isolation areas and the active areas.

In some embodiments, in order to form a contact structure600with a HAR structure, the contact structure600has a first height H in a direction perpendicular to the base100, and the contact structure600has a maximum size D in the direction parallel to the base100. The first height H is not smaller than ten times the maximum size D.

In some embodiments, in the direction parallel to the base100, the contact structure600has a first maximum size d1in the second gap500in the first dielectric layer410. In this embodiment, the first maximum size d1is equal to the maximum size D of the contact structure600. In the direction parallel to the base100, the contact structure600has a second maximum size d2in the second gap500in the second dielectric layer420, the second maximum size d2is not smaller than the first maximum size d1.

Exemplarily, the first maximum size d1may be a size of one end of the contact structure600which is contiguous to the base100, and the second maximum size d2may be a size of the end of the contact structure600away from the base100in the first dielectric layer410. Such a contact structure600has a larger contact area and thus a smaller contact resistance.

In order to form the contact structure600having the first maximum size d1and the second maximum size d2at both ends respectively, at first, a matched second gap500may be formed. For example, in order to form a matched second gap500, a trapezoidal gap may be formed in the dielectric layer firstly, and then a size of the opening of the trapezoidal gap may be etched and enlarged to form the required second gap500.

In some embodiments, the dielectric layer400may be layered in order to facilitate enlargement of the opening of the trapezoidal gap. However, if the to-be-etched portion of the dielectric layer400is thick, the top opening size of the second gap500may be too large, but the size of the remaining gap cannot be effectively enlarged, therefore, the thickness of the to-be-etched portion of the dielectric layer400may be reduced.

Exemplarily, the dielectric layer400includes a first dielectric layer410and a second dielectric layer420on the first dielectric layer410. The first dielectric layer410has a first thickness h1in the direction perpendicular to the base100. The second dielectric layer420has a second thickness h2in the direction perpendicular to the base100. The first thickness h1is greater than the second thickness h2.

In some embodiments, the dielectric layer400may include silicon oxide, silicon nitride, silicon oxynitride, and the like. For example, the dielectric layer400may be formed by using undoped silicate glass (USG), spin on glass (SOG), phosphosilicate glass (PSG), borosilicate glass (BSG), boron-phosphosilicate glass (BPSG), flowable oxide (FOX), tetraethyllorthosilicate (TEOS), plasma enhanced TEOS (PE-TEOS), Tonen silazane (TOSZ), high density plasma chemical vapor deposition (HDP-CVD) oxide, and the like, which may be used alone or in combination. In addition, the dielectric layer400may be formed by a SOD process, a CVD process, a PECVD process, a HDP-CVD process, and the like.

In some embodiments, the material of the contact structure600may include tungsten, silicon nitride, silicon oxynitride and the like.

As shown inFIG.9, an embodiment of the present disclosure also provides a semiconductor structure. The semiconductor structure includes: a substrate700, an isolation area710and an active area720are formed on the substrate700; a base100, the base100is formed on the substrate700and adjacent to the active area720; a dielectric layer400on the base100, a second gap500is in the dielectric layer400, the second gap500has different sizes in a direction parallel to the substrate100; and a contact structure600, the second gap500is filled with the contact structure600.

For, the contact structure600according to the embodiment of the present disclosure, a sacrificial layer200may be deposited on a base100, a first gap300is formed in the sacrificial layer200and a dielectric layer400filling the first gap300is formed, then a second gap500for being filled with the contact structure600is formed after removing the sacrificial layer200. In the method, under-etching is not prone to occur for the second gap500, which is useful to solve the disconnection problem of the contact structure600caused by under-etching under HAR.

In some embodiments, the substrate may be a semiconductor substrate, a silicon-on-insulator (SOI) substrate, a germanium-on-insulator (GOI) substrate, a single crystal metal oxide substrate, and the like. A surface area of the substrate may be formed with a plurality of deep grooves. An isolation material is filled in deep grooves to form isolation areas. A plurality of active areas are isolated by the isolation areas on the substrate. A plurality of active areas distributed in an array or other forms may be isolated by the isolation areas on the substrate. The active areas can be formed by implanting impurities into the substrate. For example, the active areas can be formed by an ion implantation process. It is to be noted that those skilled in the art will understand that there are other structures for normal operation of the memory in the substrate, besides the isolation areas and the active areas.

In some embodiments, the base100includes a metal wire layer.

In some embodiments, in order to form a contact structure600with a HAR structure, the contact structure600has a first height H in a direction perpendicular to the base100, and the contact structure600has a maximum size D in the direction parallel to the base100The first height H is not smaller than ten times the maximum size D.

In some embodiments, in the direction parallel to the base100, the contact structure600has a first maximum size d1in the second gap500in the first dielectric layer410. In this embodiment, the first maximum size d1is equal to the maximum size D of the contact structure600. In the direction parallel to the base100, the contact structure600has a second maximum size d2in the second gap500in the second dielectric layer420. The second maximum size d2is not smaller than the first maximum size d1.

Exemplarily, the first maximum size d1may be a size of one end of the contact structure600which is contiguous to the base100, and the second maximum size d2may be a size of the end of the contact structure600away from the base100in the first dielectric layer410. Such a contact structure600has a larger contact area and thus a smaller contact resistance.

In order to form the contact structure600having the first maximum size d1and the second maximum size d2at both ends respectively, at first, a matched second gap500may be formed. For example, in order to form a matched second gap500, a trapezoidal gap may be formed in the dielectric layer firstly, and then a size of the opening of the trapezoidal gap may be etched and enlarged to form the required second gap500.

In some embodiments, the dielectric layer400may be layered in order to facilitate enlargement of the opening of the trapezoidal gap. However, if the to-be-etched portion of the dielectric layer400is thick, the top opening size of the second gap500may be too large, but the size of the remaining gap cannot be effectively enlarged. Therefore, the thickness of the to-be-etched portion of the dielectric layer400may be reduced.

Exemplarily, the dielectric layer400includes a first dielectric layer410and a second dielectric layer420on the first dielectric layer410. The first dielectric layer410has a first thickness h1in the direction perpendicular to the base100. The second dielectric layer420has a second thickness h2in the direction perpendicular to the base100. The first thickness h1is greater than the second thickness h2.

In some embodiments, the dielectric layer400may include silicon oxide, silicon nitride, silicon oxynitride, and the like. For example, the dielectric layer400may be formed by using undoped silicate glass (USG), spin on glass (SOG), phosphosilicate glass (PSG), borosilicate glass (BSG), boron-phosphosilicate glass (BPSG), flowable oxide (FOX), tetraethyllorthosilicate (TEOS), plasma enhanced TEOS (PE-TEOS), Tonen silazane (TOSZ), high density plasma chemical vapor deposition (HDP-CVD) oxide, and the like, which may be used alone or in combination. In addition, the dielectric layer400may be formed by a SOD process, a CVD process, a PECVD process, a HDP-CVD process, and the like.

In some embodiments, the material of the contact structure600may include tungsten, silicon nitride, silicon oxynitride and the like. For example, a stop layer may be formed by using undoped silicate glass (USG), spin on glass (SOG), phosphosilicate glass (PSG), borosilicate glass (BSG), boron-phosphosilicate glass (BPSG), flowable oxide (FOX), tetraethyllorthosilicate (TEOS), plasma enhanced TEOS (PE-TEOS), Tonen silazane (TOSZ), high density plasma chemical vapor deposition (HDP-CVD) oxide, and the like, which may be used alone or in combination.

An embodiment of the present disclosure also provides a memory, which includes the contact structure or the semiconductor structure described in the preceding embodiments.

Herein, the memory may include a Random Access Memory (RAM) or a Read-Only Memory (Read-Only Memory). Optionally, the memory includes a non-transitory computer-readable storage medium. The memory may be used to store instructions, programs, codes, code sets or instruction sets.

The above-described technical solutions of the embodiments of the disclosure have at least the following beneficial technical effects:

With a method for forming a contact structure according to the embodiments of the present disclosure, a sacrificial layer is deposited on a base, a first gap is formed in the sacrificial layer and a dielectric layer filling the first gap is formed, forming a second gap for being filled with the contact structure is formed after removing the sacrificial layer. In the method, under-etching is not prone to occur for the second gap, which is useful to solve the disconnection problem of the contact structure caused by under-etching under HAR. In addition, before filling the contact structure, the method also etches at least part of the dielectric layer on at the periphery of the second gap, so that the size of the opening of the second gap can be enlarged, which is useful to reduce the contact resistance of the contact structure.

It should be understood that the above-described specific implementations according to the embodiments of the present disclosure are merely used to illustrate or explain the principles of the present disclosure, rather than limiting the present disclosure. Therefore, any modifications, equivalents, improvements, etc. made without departing from the spirit and scope of the present disclosure shall be incorporated into the protection scope of the present disclosure. Furthermore, the appended claims of the present disclosure are intended to cover all variations and modifications falling within the scope and boundaries of the appended claims or equivalent forms of such scope and boundaries.