Spin current generator for STT-MRAM or other spintronics applications

Spin current generators and systems and methods for employing spin current generators. A spin current generator may be configured to generate a spin current polarized in one direction, or a spin current selectively polarized in two directions. The spin current generator may by employed in spintronics applications, wherein a spin current is desired.

BACKGROUND

1. Field of Invention

The invention relates generally to current generators, and more particularly, to spin current generators for spintronics applications.

2. Description of Related Art

The development of microelectronics has led to large increases in integration density and efficiency. However, the conventional electronic methods of operation by applying voltage to control electron charge are fundamentally limited. Further improvements in nonvolatility, speed, and size of electronic devices may require advancements in new technology. Spintronics, or spin electronics (also known as spin transport electronics and magnetoelectronics), refers to the study of the spin of an electron in solid state physics and the possible devices that may advantageously use electron spin properties instead of, or in addition to, the conventional use of electron charge.

The spin of an electron has two states and is characterized as being either “spin up” or “spin down.” Conventional spintronics devices have relied on systems that provide bidirectional current to alter the electron spins in the device. For example, one spintronics application involves data storage through a spintronics effect known as giant magnetoresistance (GMR). The GMR structure includes alternating ferromagnetic and nonmagnetic metal layers, and the magnetizations and electron spins in each of these magnetic layers provide resistance changes through the layers. The resistance of the GMR may change from low (if the magnetizations are parallel) to high (if the magnetizations are antiparallel), and the inducing and detecting of such magnetoresistance changes are the basis for writing and reading data. Another example of spintronics devices includes spin torque transfer magnetic random access memory (STT-MRAM). STT-MRAM also exploits electron spin polarity by utilizing the electron spin to switch the magnetization of ferromagnetic layers to provide two programmable states of low and high resistance.

This alteration of magnetization typically employs a bidirectional programming current to change the magnetizations of the layers in a memory cell. However, bidirectional programming logic requires more cell space. A transistor select device is required for each memory cell, and this also increases the cell area. Furthermore, bidirectional programming logic is generally more complicated and less efficient than unidirectional programming logic.

DETAILED DESCRIPTION

Spintronics devices write and store information by manipulating electron spin in a particular orientation. As previously discussed, information may be stored by programming magnetic layers in a memory cell into low resistance and high resistance states. Switching between the two resistance states typically employs a bidirectional programming current, where a current passed in one direction may orient the magnetization of memory cell layers to a low resistance state, and a current passed in an opposite direction may orient the magnetization of memory cell layers to a high resistance state. Since bidirectional programming logic requires more complicated circuitry and more chip space, a method of generating electron currents with desired spin polarizations may reduce the complexity and size of memory cell area or other devices requiring currents of different polarities by facilitating unidirectional programming. The following discussion describes the systems and devices, and the operation of such systems and devices in accordance with the embodiments of the present technique.

FIG. 1depicts a processor-based system, generally designated by reference numeral10. As is explained below, the system10may include various electronic devices manufactured in accordance with embodiments of the present technique. The system10may be any of a variety of types such as a computer, pager, cellular phone, personal organizer, control circuit, etc. In a typical processor-based system, one or more processors12, such as a microprocessor, control the processing of system functions and requests in the system10. As is explained below, the processor12and other subcomponents of the system10may include resistive memory devices manufactured in accordance with embodiments of the present technique.

The system10typically includes a power supply14. For instance, if the system10is a portable system, the power supply14may advantageously include a fuel cell, a power scavenging device, permanent batteries, replaceable batteries, and/or rechargeable batteries. The power supply14may also include an AC adapter, so the system10may be plugged into a wall outlet, for instance. The power supply14may also include a DC adapter such that the system10may be plugged into a vehicle cigarette lighter, for instance.

Various other devices may be coupled to the processor12depending on the functions that the system10performs. For instance, a user interface16may be coupled to the processor12. The user interface16may include buttons, switches, a keyboard, a light pen, a mouse, a digitizer and stylus, and/or a voice recognition system, for instance. A display18may also be coupled to the processor12. The display18may include an LCD, an SED display, a CRT display, a DLP display, a plasma display, an OLED display, LEDs, and/or an audio display, for example. Furthermore, an RF sub-system/baseband processor20may also be coupled to the processor12. The RF sub-system/baseband processor20may include an antenna that is coupled to an RF receiver and to an RF transmitter (not shown). One or more communication ports22may also be coupled to the processor12. The communication port22may be adapted to be coupled to one or more peripheral devices24such as a modem, a printer, a computer, or to a network, such as a local area network, remote area network, intranet, or the Internet, for instance.

The processor12generally controls the system10by implementing software programs stored in the memory. The software programs may include an operating system, database software, drafting software, word processing software, and/or video, photo, or sound editing software, for example. The memory is operably coupled to the processor12to store and facilitate execution of various programs. For instance, the processor12may be coupled to the system memory26, which may include spin torque transfer magnetic random access memory (STT-MRAM), magnetic random access memory (MRAM), dynamic random access memory (DRAM), and/or static random access memory (SRAM). The system memory26may include volatile memory, non-volatile memory, or a combination thereof. The system memory26is typically large so that it can store dynamically loaded applications and data. In some embodiments, the system memory26may include STT-MRAM devices, such as those discussed further below.

The processor12may also be coupled to non-volatile memory28, which is not to suggest that system memory26is necessarily volatile. The non-volatile memory28may include STT-MRAM, MRAM, read-only memory (ROM), such as an EPROM, resistive read-only memory (RROM), and/or flash memory to be used in conjunction with the system memory26. The size of the ROM is typically selected to be just large enough to store any necessary operating system, application programs, and fixed data. Additionally, the non-volatile memory28may include a high capacity memory such as a tape or disk drive memory, such as a hybrid-drive including resistive memory or other types of non-volatile solid-state memory, for instance. As is explained in greater detail below, the non-volatile memory28may include STT-MRAM devices manufactured in accordance with embodiments of the present technique.

Both the system memory26and the non-volatile memory28may include memory cells programmable by manipulation of electron spin or other spintronics components. For example, the memory cells may include MRAM cells, STT-MRAM cells, or memory cells that utilize the giant magnetoresistive (GMR) effect. The system memory26and the non-volatile memory28may further include a spin current generator to generate single-spin polarity current (i.e., a current that can be generated with a spin polarity in only one direction), bi-spin polarity current (i.e., a current that can be generated with a spin polarity in either direction), non-polarized current or arbitrary spin-polarized current to program the memory cells, as will be further described below.

FIG. 2depicts an example of a portion of a spintronics device and a method by which a spin current generator100may be used to program the device in accordance with embodiments of the present technique. The portion of the spintronics device illustrated here includes an array102of memory cell components104with magnetic layers106and108. As will be appreciated, each memory cell component104may form the memory portion of a single memory cell in the array102. The memory cell components104may include magnetic tunnel junctions (MTJs), stacks of ferromagnetic and nonmagnetic layers, or any other structure in which magnetization may be manipulated to alter the structure's magnetoresistance state. Furthermore, the memory cell components104may be components of magnetic random access memory (MRAM) cells, spin torque transfer magnetic random access memory (STT-MRAM) cells, or any other device exploiting the manipulation of electron spin to program the cell.

In this example, the memory cell component104includes a pinned layer106and a free layer108. A memory cell may be “written” or “programmed” by switching the magnetization of the free layer108in the memory cell component104, and the cell may be read by determining the resistance across the free layer108and the pinned layer106. The layers108and106may comprise ferromagnetic materials, such as Co, Fe, Ni or its alloys, NiFe, CoFe, CoNiFe, or doped alloys CoX, CoFeX, CoNiFeX (X=B, Cu, Re, Ru, Rh, Hf, Pd, Pt, C), or other half-metallic ferromagnetic material such as Fe3O4, CrO2, NiMnSb and PtMnSb, and BiFeO, for instance. The pinned layer106is so named because it has a magnetization with a fixed or pinned preferred orientation, and this is represented by the unidirectional arrow illustrated in the pinned layer106. An additional layer of antiferromagnetic material may be deposited below the pinned ferromagnetic layer to achieve the pinning through exchange coupling. The bidirectional arrow illustrated in the free layer108represents that the free layer108may be magnetized either in a direction parallel to the pinned layer106, which gives a low resistance, or in a direction antiparallel to the pinned layer106, which gives a high resistance. The memory cell component104may also include a nonmagnetic layer between the free layer108and the pinned layer106to serve as an insulator between the two layers108and106, thereby forming a MTJ structure in this example. The nonmagnetic layer may include materials such as AlxOy, MgO, AlN, SiN, CaOx, NiOx, HfO2, Ta2O5, ZrO2, NiMnOx, MgF2, SiC, SiO2, SiOxNy, for example.

The spin current generator100is connected to each memory cell in the array102through source lines110. In the presently illustrated embodiment, each of the memory cell components104is coupled in series to form a string, such that each of the memory cell components104is coupled to a common source line110. When a memory cell is selected to be programmed, the spin current generator100sends a spin polarized current through the source line110to the selected memory cell and memory cell component104. If the memory cell is to be programmed to a low resistance state (“write 1 operation”)114, the spin current generator100will generate a current polarized in one direction (e.g., to the left)116, and the left-polarized current will switch the magnetization of the free layer108to the left. Because the magnetization of the pinned layer106is also directed to the left, the magnetizations of the free layer108and the pinned layer106are parallel, and the memory cell is programmed to a low resistance state. Likewise, if the memory cell is to be programmed to a high resistance state (“write 0 operation”)118, the spin current generator100will generate a current polarized in an opposite direction (to the right)120, and the right-polarized current will switch the magnetization of the free layer108to the right. Because the magnetization of the pinned layer106is directed to the left, the magnetizations of the free layer108and the pinned layer106are antiparallel, and the memory cell is programmed to a high resistance state.

The method depicted in accordance with embodiments of the present technique thus enables the memory cells or other spintronics devices to be programmed by a unidirectional current, allowing for simpler unidirectional programming logic. As previously discussed, conventional spintronics devices, including STT-MRAM devices, typically use bidirectional programming logic, meaning the write current is driven in opposite directions through a device cell stack to switch the cell between different programmable states. For example, in a STT-MRAM cell, a write current may be driven from a transistor source to a transistor drain, and then through a MTJ to program the memory cell to a high resistant state. To program a memory cell to a low resistance state, a write current may be driven from a MTJ to a transistor drain to a transistor source. Unidirectional programming logic may be simpler and more efficient than bidirectional programming logic. Also, the array102may be fabricated without a separate transistor for each cell, which further decreases cell size and cost. By utilizing a spin current generator100which may generate a spin current polarized in either direction (a bi-spin polarity current), the memory cell component104may be programmed with a unidirectional current, as described further below. Further, in certain embodiments, a single-spin polarity current, or a non-polarized spin current may be utilized to program a memory cell component104, by adding certain features or layers to the memory cell component104, such that the memory cell component104is able to exploit the properties of the current to facilitate the changing of the magnetization of a free ferromagnetic layer, therein. For example, inFIG. 2, if a non-polarized current is passed through the memory cell component104, the the pinned layer106may reflect the current towards the free layer108and switch the magnetization direction of the free layer108to the opposite direction of the pinned layer106.

One embodiment of the present invention, a spin current generator configured to generate a unidirectional current to adjust polarization direction in a spintronics device, is illustrated inFIG. 3, where a spin current generator200can generate a non-polarized current212or a single-spin polarized current214. The bidirectional arrows depicting the non-polarized current212represent that the current is not yet polarized in any direction. Conversely, the unidirectional arrow depicting the polarized current214represent that the current is polarized in one direction (single-spin polarized). The spin current generator200includes a spin-polarizing layer202, which may comprise ferromagnetic materials, such as Co, Fe, Ni or its alloys, NiFe, CoFe, CoNiFe, or doped alloys CoX, CoFeX, CoNiFeX (X=B, Cu, Re, Ru, Rh, Hf. Pd, Pt, C), or other half-metallic ferromagnetic material such as Fe3O4, CrO2, NiMnSb and PtMnSb, and BiFeO, for instance. The spin current generator200may also include a nonmagnetic layer204which may be nonconductive and include some combination of AlxOy, MgO, AlN, SiN, CaOx, NiOx, HfO2, Ta2O5, ZrO2, NiMnOx, MgF2, SiC, SiO2, or SiOxNy, for example, or conductive and include some combination of Cu, Au, Ta, Ag, CuPt, CuMn or other nonmagnetic transition metal, for example. The spin-polarizing layer202and the nonmagnetic layer204may be isolated from a material206by an insulative material208. In some embodiments, the material206may generate heat (“heater material”), and in other embodiments, the material206may comprise piezoelectric materials (“piezoelectric material”).

In some embodiments, the material206may incorporate some combination of heat generating and piezoelectric materials, or the material206may comprise more than one heat generating and/or piezoelectric material. As used in the present specification, the term “layer” refers to materials formed in parallel, with one material disposed over another (e.g., layers204,202, and210ofFIG. 3). In contrast other materials, not referred to as layers, may be formed perpendicular to a stack of parallel materials (e.g., layers206and208are perpendicular to layers204,202, and210ofFIG. 3), as spacers other structures formed adjacent to the layers. As also used herein, it should be understood that when a layer is said to be “formed on” or “disposed on” another layer, the layers are understood to be parallel to one another, but there may be intervening layers formed or disposed between those layers. In contrast, “disposed directly on” or “formed directly on” refers to layers in direct contact with one another. Similarly, if materials are said to be “adjacent” to other materials, the materials are in the same cross-sectional plane (e.g., the layer206is adjacent to the layers202,204and210). Further, if a material is said to be adjacent to another material or layer, there may be intervening materials therebetween, while “directly adjacent,” connotes no intervening materials therebetween.

Since heat decreases magnetization and spin-polarization efficiency in magnetic materials, a heater material206may apply heat to decrease or eliminate the magnetization or spin polarization of the spin-polarizing layer202, and the spin current generator200may output a non-polarized or less spin polarized current212. Specifically, when voltage is applied to the spin current generator200through the transistor216, the heater material206may heat up the spin-polarizing layer close to or above its curie temperature, which may be in a range of approximately 160° C. to 300° C. The spin-polarizing layer202would then substantially lose its magnetization, and current would be non-polarized or not highly polarized after it passes through the demagnetized spin-polarizing layer202. The spin-polarizing layer202may retain its magnetization through an exchange interaction with the antiferromagnetic layer210when the spin-polarizing layer202is cooled to approximately room temperature. Thus, the spin current generator200may produce a unidirectional non-polarized current to program a spintronics device. One example of how a unidirectional non-polarized current may program a spintronics device is to pass non-polarized current that becomes spin polarized by magnetic layers of fixed magnetization in a spintronics device. Further, magnetic layers may be switched by reflected currents polarized by other layers in a spintronics device.

Alternatively, the spin current generator200may produce polarized current214of various polarization degrees through a transient stress effect induced by the piezoelectric stress material206. The piezoelectric stress material206may apply varying stress to adjust the spin polarization of the spin-polarizing layer202. When voltage is applied to the piezoelectric stress material206through the transistor216, the piezoelectric stress material206may induce a stress that modulates the spin-polarization efficiency of the spin-polarizing layer202such that the current output of the spin current generator200may be polarized to a desired degree.

Specifically, the spin polarization degree of the output current is determined by the spin-polarization efficiency of the spin-polarizing layer202, which may be adjusted by either heat or stress to the spin-polarizing layer202. If the spin current generator200sends a polarized current214to a spintronics device, voltage may be applied to the spin current generator200, and the piezoelectric material206may generate a transient stress in the spin-polarizing layer202. The transient stress influences the spin-polarization efficiency of the spin-polarizing layer202, which affects the degree of polarization of the output current. Thus, embodiments in accordance with the present technique may produce unidirectional single-spin polarized current to switch the magnetization of a spintronics device. The direction of the spin current that may be output by the spin current generator200is dependent on the arrangement of the transistor216, as will be appreciated.

Another embodiment of the present invention is illustrated inFIG. 4, where a spin current generator300can generate arbitrary spin current or spin current polarized in either direction (bi-spin polarity). As used in the present specification, arbitrary spin current refers to spin current polarized in either direction with any desired polarization degree. The spin current generator300uses two structures302and304of opposite magnetization. Each structure has a respective spin polarizing layer306and a nonmagnetic layer308. The spin-polarizing layer306in the structures302and304have opposite magnetizations, and this enables the spin current generator300to generate current spin-polarized in an arbitrary degree for a spintronics device, or in a specified direction based on the selection of the appropriate transistor314or316. The spin current generator300may be employed in applications and systems benefiting from a spin current generator capable of producing a bi-spin polarity current (i.e., a current with a spin-polarity in either direction), such as the memory cells ofFIG. 1.

For example, if a memory cell (as inFIG. 2) is selected to be programmed to a low resistance state, a current would pass through the structure304of the spin current generator300, via the transistor316, where the spin-polarizing layer306polarizes the spin of the electrons to the left. The spin current generator300then outputs a programming current spin polarized to the left310, and the left-polarized current310switches the magnetization of free layer108(ofFIG. 2) to the left, parallel to the pinned layer106, writing the cell in a low resistance state. If a memory cell is selected to be programmed to a high resistance state, a current would pass through the structure302of the spin current generator300, via the transistor314, where the spin-polarizing layer306polarizes the spin of the electrons to the right. The programming current is spin polarized to the right312, and the right-polarized current312switches the magnetization of free layer108to the right, antiparallel to the pinned layer106, writing the cell in a high resistance state.

This embodiment and other embodiments in accordance with the present technique may be used in spintronics applications, or in conjunction with or incorporated in any device using electron spin properties. As an example, STT-MRAM cells are programmed into low or high resistance states by switching the magnetization of a free ferromagnetic layer in the memory cell. As previously discussed, the memory cell is programmed to a low resistance state when a programming current switches the magnetization of the free layer to be parallel with the magnetization of a pinned layer in the STT-MRAM cell. The memory cell is programmed to a high resistance state when a programming current switches the magnetization of the free layer to be antiparallel with the magnetization of the pinned layer in the STT-MRAM cell. The typical STT-MRAM cell is structured with bidirectional programming logic, as the free layer requires programming current polarized in both directions, depending on the resistance state it will be switched to. In the embodiments of the present technique, a spin current generator capable of generating current polarized in either direction, or not polarized at all, may allow for simpler unidirectional programming logic in the STT-MRAM cell or other spintronics components.