Closely-spaced VCSEL and photodetector for application requiring their independent operation

A monolithically integrated VCSEL and photodetector, and a method of manufacturing the same, are disclosed for applications where the VCSEL and photodetector require separate operation such as duplex serial data communications applications. A first embodiment integrates a VCSEL with an MSM photodetector on a semi-insulating substrate. A second embodiment builds layers of a p-i-n photodiode on top of layers forming a VCSEL using a standard VCSEL process. The p-i-n layers are etched away in areas where VCSELs are to be formed and left where photodetectors are to be formed. The VCSELs underlying the photodetectors are inoperable, and serve to recirculate photons which are not initially absorbed back into the photodetector. The transmit and receive pairs are packaged into a single package for interface to multifiber ferrules. The distance between the devices is precisely defined photolithographically, thereby making alignment easier. In a further alternate embodiment, a FET is coupled to the p-i-n photodiode to form an integrated detector preamplifier along with the VCSEL transmitter all on the same optical reference plane.

FIELD OF THE INVENTION

The present invention relates to vertical cavity surface emitting lasers (VCSELs) and photodetectors, and more particularly to the application of such optoelectronic devices where they must operate independently but where it is also desirable to have a transmitter and a receiver closely-spaced.

BACKGROUND OF THE INVENTION

There are a number of data communications applications that make use of optoelectronic sending and receiving devices (i.e. light emitters and photodetectors). For fiber optic data communication applications requiring less than 200 MBits/sec., light emitting diodes (LEDs) are the light emitters of choice because they are relatively inexpensive to manufacture. For applications requiring higher speeds, lasers are typically used as the light emitters.

Until recently, most high speed data communications applications employed edge emitting lasers in a serial (single channel) format. With the advent of Vertical Cavity Surface Emitting Lasers (VCSELs), many such applications are now implemented using VCSEL arrays that can be interfaced to ferrules carrying multiple fibers to transmit several bits of data in parallel. At the receiving end, an array of photodetectors is coupled to the multiple fibers. The ability to manufacture VCSELs in arrays (an advantage of LEDs), combined with their high speed of operation (an advantage of lasers), makes VCSELs desirable in such applications.

For high-speed serial duplex data communications applications, however, separately packaged light emitters (usually edge emitting lasers) and photodetectors are still employed. For long-haul applications (typically having distances greater than 1 kilometer), wavelength division multiplexing is often employed to transmit and receive data for a duplex channel over the same fiber. Because the primary cost of a long-haul duplex serial data channel resides in the fiber and its installation, complex beam-splitting techniques can be justified at the ends of the channel to separate the transmit and receive data streams from the single fiber.

For short-haul or “premises” applications, however, the cost of fiber and fiber installation is relatively less important than the cost of the many transmit and receive functions. Thus, it is the cost of the data transmit and receive components, and particularly the optoelectronic devices and their packaging, that drives cost considerations for short-haul applications. Typical short-haul implementations of a high-speed serial fiber optics data communications channel operating in full duplex still employ two multimode fibers, each one to connect an individually packaged transmitting light emitter to an individually packaged receiving photodetector. This is because the cost of complex beam-splitting components often cannot be justified.

FIGS. 1(a) and1(b) illustrate the components comprising a typical implementation of a transmit or receive link for a short-haul high-speed duplex data communications application.FIG. 1(a) illustrates a fiber assembly12. A round ferrule26houses an optical fiber28, which is located precisely in the center of ferrule26. A typical diameter for ferrule26is approximately 2.5 mm. Ferrule26comes with a latching mechanism30, which is used to clamp and secure the ferrule to a barrel32of an optical sub-assembly10, which is depicted inFIG. 1(b). Barrel32houses optoelectronic device14typically in a TO can package16centrally located in the barrel as shown. Optoelectronic device14is typically located at an appropriate point within can16by a standoff2. Driver or amplifier circuitry is coupled to optoelectronic device14through leads22. A window18is provided in the top of the can package to allow transmitted light out or received light in, depending upon whether the optoelectronic device is a light emitter or a photodetector. The TO package is aligned with fiber28and epoxied using epoxy24to fix the position of the optoelectronic device with respect to the ferrule26and hence fiber28. Optical elements such as lens20are typically provided to focus the light for optimal optical efficiency, particularly where the light emitter is an edge emitting laser. Barrel32is designed to mate with latching mechanism30of fiber assembly12.

Both fiber assembly12and barrel10are precision manufactured for precise mating. Active alignment TO package16and optoelectronic device is ordinarily performed in the x, y and z axes. First, the optoelectronic device is precisely aligned within the package16. Second, the package16is precisely aligned within barrel10. Finally, optical element20is precisely aligned with respect to its distance from the optoelectronic device14to achieve proper optical operation. Because a separate package is required for both the transmit side and the receive side of the duplex data channel, a total of twelve active alignments are typically performed for each channel and each channel includes the cost of eight precision-manufactured coupling parts.

FIG. 2illustrates a typical duplex serial data communications module40, which has mounted to it an optical subassembly52containing a light emitting device13disposed in a TO can package9having a window17, which is to be mated with an optical fiber assembly46and which is dedicated to data transmission. Module40also has an optical subassembly50mounted to it containing a photodetector15disposed in TO can package11and which is to be mated with optical fiber assembly48and dedicated to receiving data from a remote module not shown. Because of the differing optical requirements of the transmit and receive devices, the modules must often be mounted in a staggered fashion as shown. Moreover, the transmit devices are located at an optically appropriate point in their can packages by standoffs4and6respectively.

Because of the cost of the precision components and the large number of alignments required for implementing duplex serial modules40, it is highly desirable to integrate the transmit and receive optoelectronic devices (i.e. light emitter and photodetector) into one package. The integration of the two devices into a single package is not, however, an easily achieved solution. The prior art implementations as illustrated inFIGS. 1a–dand2cannot be readily adapted to multifiber ferrules currently available for unidirectional data transmission using VCSEL arrays. These multifiber ferrules have fiber spacings which are typically about 250 microns and can be less. The diameter of the TO can package14commonly used in present implementations is itself 5600 microns in diameter. Thus, the standard ferrule and barrel would have to grow substantially in diameter to accommodate two fibers having the spacing dictated by the TO cans housing the optoelectronic devices.

Even if a substantially larger barrel could be created to integrate the light emitter and photodetector as commonly packaged to receive both a transmit and a receive fiber, it is not clear that the resulting package could provide the necessary separation of incoming and scattered outgoing light beams to prevent crosstalk between the transmit and receive signals (at least not without complex optics and possibly some form of isolation). Although solutions have been disclosed to stack a light emitter (typically an LED) on top of a photodetector to transmit and receive wavelength division multiplexed signals (the light emitter is transparent to the received wavelength), beam-splitting must still be employed at the opposite end.

Closely spaced VCSELs and photodetectors can suffer leakage effects which can degrade the sensitivity of and induce excess noise into the operation of the photodetector. Also, current leakage from the VCSEL to the photodetector can unacceptably alter the operating characteristics of the photodetector over time.

Conventional photodetectors output low amplitude current signals that are highly susceptible to noise and crosstalk with the VCSEL. Therefore, conventional photodetectors require highly sensitive interface electronics, typically Gallium Arsenide (GaAs) for high speed, low noise integration with the photodetector. The use of GaAs receiver electronics, however, greatly adds to the cost of high speed data communications.

Thus, there is room in the art for an improvement in the area of optoelectronic device fabrication which facilitates the integration of one or more pairs of transmit and receive devices, without current leakage between them, for interfacing with a single ferrule carrying one or more pairs of fibers having spacings of 250 microns or less, to substantially reduce the cost and complexity of implementing high-speed serial duplex data communications channels including the cost of receiver interface electronics.

SUMMARY OF THE INVENTION

It is therefore an objective of the present invention to provide a VCSEL device sufficiently close to a photodetector device to permit the use of commercially available multifiber ferrules having fibers spaced on the order of 750 microns to 250 microns or less. Ferrules having fiber spacing of 750 microns are referred to as having a small form factor (SMFF).

The present invention provides closely-spaced but independently operable optoelectronic devices by monolithically integrating the two devices on the same substrate. The invention also provides a process by which multiple pairs of VCSELs and photodetectors can be arrayed on the same substrate. The invention further provides a process by which the closely-spaced but independently operable optoelectronic devices can be packaged using known lead-frame or ceramic packaging technologies. The invention may be used to integrate any requisite optics with either the semiconductor manufacturing technology or the packaging technology.

The invention simplifies significantly the alignment of the fibers to the closely-spaced optoelectronic devices by taking advantage of the photolithographic nature of monolithic semiconductor processing to precisely define the separation between the optoelectronic devices.

The invention also provides closely-spaced but independently operable VCSEL and photodetector pairs capable of near-field operation requiring no optics and which permit butt coupling between a package containing the optoelectronic devices and a flat faced multifiber ferrule.

In a first preferred embodiment of the invention, one or more VCSELs are formed using a known process for manufacturing such devices. The one or more VCSELs comprise an n-type GaAs substrate and a first mirror formed on the substrate, which is a well-known distributed Bragg reflector (DBR), and a first spacer or cladding layer which is formed on top of mirror. This first mirror is also preferably doped n-type. An active region is then formed on top of the first cladding layer, the active region comprising at least one quantum well layer or bulk layer. A second spacer or cladding layer is formed on the active region, with a second DBR being formed on the second spacer layer and doped to have p-type conductivity.

On top of the VCSEL layers is grown an etch-stop layer of AlGaAs having about 90% or greater Al content. An extended p-type layer of AlGaAs having more typical alloy proportions is then grown on top of the etch-stop layer. On top of this p-type layer is grown an intrinsic layer (i) which is undoped GaAs. On top of the intrinsic layer is grown an n-type region of AlGaAs. An etching process is then performed to etch away the extended p, i, and n layers where the one or more VCSELs are to be formed. The etching process uses the etch-stop layer to mark the end of the etching process so that the VCSEL area has exposed the top surface of an appropriately designed mirror. A proton implant region is created which separates the one or more VCSELs and the photodetectors formed by the unetched p, i, and n layers. Anode contacts are formed over the non-implanted p regions to form apertures for the VCSELs. A VCSEL cathode contact is formed on the substrate. Anode contacts are also formed on the p region of the p-i-n photodiode and a cathode contact is made to the n region of the p-i-n photodiode.

Thus, in this preferred embodiment, a VCSEL circuit can be isolated from a p-i-n photodiode using a proton implant isolation region which is commonly used to isolate VCSELs formed in arrays. The anode contacts to the p region of the p-i-n photodiode may be coupled to ground so that the VCSEL structure which lies underneath the p-i-n photodiode is never turned on and other bipolar parasitic effects are avoided. The width of the proton implant isolation region is typically between 50 and 100 microns. Thus, the VCSEL and the p-i-n photodiode can be separated by an accurately known distance, significantly less than 25 microns if desired. Moreover, the difference in thickness between the VCSEL and the p-i-n photodiode is small, thereby permitting near-field coupling of the optoelectronic devices to fibers.

One significant advantage of the first embodiment of the invention is that it requires very few additional steps to an otherwise typical VCSEL manufacturing process. A second advantage is that, when an anti-reflection coating of silicon nitride is applied to the photo-receiving n region of the photodiode, in conjunction with the p-type mirror which underlies the p-i-n photodiode, a high degree of efficiency is achieved. The silicon nitride anti-reflection coating increases transmission of incoming light into the surface of the p-i-n photodiode. Additionally, any light which is not absorbed by the intrinsic layer of the photodiode on its way through will be reflected from the underlying p-type mirror back into the intrinsic layer and will then have a second opportunity to be absorbed.

A second preferred embodiment of the invention employs a VCSEL with an MSM photodiode. The VCSEL is manufactured on a semi-insulating substrate. Because the MSM photodetector employs the semi-insulating layer as its common cathode, the two optoelectronic devices are virtually isolated from one another electronically as a result. A photolithographically defined minimum spacing of 250 microns or less can also be achieved using the second preferred embodiment of the invention. An anti-reflection coating is also preferably employed over the MSM photodetector to increase efficiency. To further enhance electrical isolation between the two devices, an isolation region can also be formed, preferably by implantation. Another advantage of using an MSM photodiode is that the two anode terminals can be used to drive a differential amplifier, thereby permitting common-mode rejection of noise.

Either of the two preferred embodiments can be integrated with optically transmissive materials that can be formed into lenses on the surface of the semiconductor. Either embodiment can also be implemented within standard precision manufactured barrels to be aligned with circular ferrules containing multiple fibers. Finally, either embodiment can be encapsulated using known lead-frame or ceramic packaging technology to permit near-field flat coupling between a flat package having an optically transmissive surface and a commercially available flat rectangular ferrule containing multiple fibers.

An alternative embodiment of the present invention provides a low cost method of repeatably manufacturing a closely-spaced or small form factor (SMFF) package for optical transceivers. The system includes a highly insulative, proton implantation region that isolates the photodetector and eliminates current leakage (i.e. crosstalk) between the VCSEL and photodetector. In an alternate embodiment of the present invention, the photodetector is integrated with a FET to form a high speed integrated detector preamplifier on a single chip.

In one aspect, the present inventions provides a method of manufacturing monolithic VCSEL and photodetector pairs by forming VCSEL layers directly on a semiconductor wafer substrate by forming first mirror layers, forming a first cladding layer on the first mirror layers, forming an active region on the first cladding layer, forming a second cladding layer on the active region, forming second mirror layers on the second cladding layer, forming photodiodes distributed across the wafer, and defining active and inactive VCSELs by forming isolation regions around the second mirror layers of the active VCSELs.

In another aspect, the present inventions provides method of manufacturing monolithic VCSEL and photodetector pairs by forming VCSEL layers directly on a semiconductor wafer substrate by forming first mirror layers, forming a first cladding layer on the first mirror layers, forming an active region on the first cladding layer, forming a second cladding layer on the active region, forming second mirror layers on the second cladding layer, forming photodiodes distributed across the wafer, and defining active and inactive VCSELs by forming proton implant isolation regions around the second mirror layers of the active VCSELs.

In a still further aspect, the present invention provides a method of manufacturing monolithic VCSEL and photodetector pairs by forming VCSEL layers directly on a semiconductor wafer substrate by forming first mirror layers, forming a first cladding layer on the first mirror layers, forming an active region on the first cladding layer, forming a second cladding layer on the active region, forming second mirror layers on the second cladding layer, forming photodiodes distributed across the wafer, and defining active and inactive VCSELs by forming proton implant isolation regions 50–100 microns wide around the second mirror layers and extending vertically through the second mirror layers to the second cladding layer.

In still another aspect, the present invention provides a method of manufacturing monolithic VCSEL and photodetector pairs by forming VCSEL layers directly on a semiconductor wafer substrate by forming first mirror layers, forming a first cladding layer on the first mirror layers, forming an action region on the first cladding layer, forming a second cladding layer on the active region, forming second mirror layers on the second cladding layer, forming photodiodes distributed across the wafer, and forming VCSEL anode contacts overlapping a topmost second mirror layer and the isolation region of the active VCSELs.

In still another aspect, the present invention provides a method of manufacturing monolithic VCSEL and photodetector pairs by forming VCSEL layers directly on a semiconductor wafer substrate, then forming photodiodes distributed across the wafer directly on the semiconductor wafer substrate at discrete locations.

In still another aspect, the present invention provides a method of manufacturing monolithic VCSEL and photodetector pairs by forming VCSEL layers directly on a semiconductor wafer substrate by forming first mirror layers, forming a first cladding layer on the first mirror layers, forming an active region on the first cladding layer, forming a second cladding layer on the active region, forming second mirror layers on the second cladding layer, defining active regions and inactive regions by forming isolation regions in the VCSEL layers, and then forming photodiodes distributed across the wafer on the second mirror layers of inactive VCSELs.

In still another aspect, the present invention provides a method of manufacturing monolithic VCSEL and photodetector pairs by forming VCSEL layers directly on a semiconductor wafer substrate by forming first mirror layers, forming an active region on the first cladding layer, forming a second cladding layer on the active region, forming second mirror layers on the second cladding layer, forming photodiodes distributed across the wafer by forming distributed p-type layers on a topmost second mirror layer, forming an intrinsic layer on the distributed p-type layers, forming an n-type layer on the intrinsic layers, forming a photodiode cathode contact on each of the n-type layers, and forming distributed photodiode anode contacts on the topmost second mirror layer.

In another aspect, the present invention provides a method of manufacturing an integrated VCSEL and photodetector pair by forming layers of VCSEL on a semiconductor substrate, forming layers of a photodiode on a top-most layer of a first portion of the VCSEL layers, isolating a second portion of the VCSEL layers from the photodiode layers by implanting an isolation region between the first and second portions of the VCSEL layers, forming a VCSEL cathode contact connected to the semiconductor substrate, forming a VCSEL anode contact connected to the top-most VCSEL layer in the second portion, forming a photodiode cathode contact on a topmost layer of the photodiode layers, and forming a photodiode anode contact on the top-most VCSEL layer of the first portion of the VCSEL layers.

The present invention provides a method of manufacturing an integrated VCSEL and photodetector pairs by forming VCSEL layers directly on a semiconductor wafer substrate, then forming photodiodes distributed across the VCSEL layers at discrete locations, forming active and inactive regions of the VCSEL by forming isolation regions in the VCSEL layers, and isolating the VCSEL from the photodiodes by forming proton implant isolation regions around the photodiodes.

The present invention further provides a method of manufacturing an integrated VCSEL and photodetector pairs by forming VCSEL layers directly on a semiconductor wafer substrate; then forming photodiodes on the VCSEL at discrete locations, forming a photodiode n-type contact (cathode) on the upper most photodiode layer; and forming a photodiode p-type contact (anode) on the upper most VCSEL layer, forming a VCSEL p-type contact (anode) on the topmost VCSEL layer; forming a VCSEL n-type contact (cathode) coupled to the semiconductor substrate; forming active and inactive regions of the VCSEL by creating isolation regions in the VCSEL layers; then isolating the VCSEL layers from the photodiodes by forming proton implant isolation regions around the photodiodes.

In another aspect, the present invention provides a method of manufacturing monolithic VCSEL and photodetector pairs by forming VCSEL layers directly on a semiconductor wafer substrate, then forming an etch stop layer on the VCSEL layers, then forming photodiodes distributed across the wafer directly on the etch stop layer at discrete locations.

In still another aspect, the present invention provides a method of manufacturing monolithic VCSEL and photodetector pairs by forming VCSEL layers directly on a semiconductor wafer substrate by; forming first mirror on the substrate, forming a cladding layer on the first mirror, forming an active region on the first cladding layer, forming a second cladding layer on the active region, forming a second mirror on the second cladding layer, forming an etch stop layer on the second mirror, forming photodiodes distributed across the wafer at discrete locations by forming distributed p-type layers on a top most second mirror layer, forming an intrinsic layer on the distributed p-type layers, forming an n-type layer on the intrinsic layers, forming a photodiode n-type contact on each of the n-type layers, and forming distributed photodiode p-type contacts on the topmost second mirror.

In still another aspect, the present invention provides a method of manufacturing monolithic VCSEL and photodetector pairs by: forming VCSEL layers directly on a semiconductor wafer substrate; then forming an etch stop layer directly on the VCSEL; then forming photodiode layers distributed across said etch stop layer at discrete locations then forming a photodiode n-type contact (cathode) on said upper most photodiode layer; and forming a photodiode p-type contact (anode) on said upper most VCSEL layer; then forming a VCSEL p-type contact (anode) on said topmost VCSEL layer; forming a VCSEL n-type contact (cathode) coupled to said semiconductor substrate; defining active and inactive regions of the VCSEL by forming isolation regions in the VCSEL layers; then isolating said VCSEL layers from said photodiodes layers by forming proton implant isolation regions around said photodetector.

In still another aspect, the present invention provides a method of manufacturing monolithic VCSEL and photodetector pairs by: forming VCSEL layers directly on a semiconductor wafer substrate; then forming photodiode layers distributed across the VCSEL layers at discrete locations; forming a photodiode n-type contact (cathode) on said upper most photodiode layer; and forming a photodiode p-type contact (anode) on said upper most VCSEL layer; forming a VCSEL p-type contact (anode) on said topmost VCSEL layer; forming a VCSEL n-type contact (cathode) coupled to said semiconductor substrate; defining active and inactive regions of the VCSEL by forming isolation regions in the VCSEL layers; then isolating said VCSEL layers from said photodiodes layers by forming proton implant isolation regions around said photodiodes, forming interconnect metal pads on said photodiode anode and cathode and VCSEL anode; forming a dielectric matching layer on said VCSEL layers; forming vias in the dielectric matching layer for the interconnect metal pads; forming an anti-reflective coating on said photodetector.

In still another aspect, the present invention provides a method of manufacturing a monolithic VCSEL and integrated photodetector preamplifier by: forming VCSEL layers directly on a semiconductor wafer substrate; then forming an etch stop layer on the uppermost VCSEL layer; forming photodiodes distributed across said wafer directly on said VCSEL layers at discrete locations; then forming one or more transistors coupled to the photodiode.

In still another aspect, the present invention provides a method of manufacturing an integrated photodetector preamplifier by forming photodiodes directly on a semiconductor wafer substrate, and then forming one or more transistors coupled to the photodiodes.

DETAILED DESCRIPTION OF THE INVENTION

The present invention generally pertains to a monolithic semiconductor device having a VCSEL integrated with a photodetector on the same substrate, wherein the VCSEL and photodetector are to be operated independently as transmit and receive devices respectively. The VCSEL and photodetector are physically situated in close enough proximity to permit packaging of one or more pairs of the VCSEL and photodetector such that they may be coupled to multifiber ferrules having fiber spacing on the order of 250 microns or less. The present invention also includes a method of manufacturing the independently operated VCSEL and photodetector, as well as the packaging and coupling of one or more pairs of the integrated VCSEL and photodetector to multifiber ferrules.

A first preferred embodiment of the invention is now discussed in detail in conjunction withFIGS. 3 and 4. As shown inFIG. 3, a VCSEL and a metal-semiconductor-metal (MSM) photodetector are integrated on the same semi-insulating GaAs substrate60. The conductance of the semi-insulating substrate60is typically between about 10−12and 10−5ohm-cm. The VCSEL is built on top of the substrate60beginning with an n− layer68, upon which an n+ layer70is grown to form the cathode of the VCSEL.

A first mirror78is formed on layer70, which is preferably an epitaxially formed distributed Bragg reflector (DBR) which comprises a plurality of alternating semiconductor layers having high and low indices of refraction, with each layer having a thickness of λ/4n, where λ is the wavelength of the optical radiation emitted from the laser and n is the index of refraction of the layer. The semiconductor layers are doped to achieve n-type conductivity. A quantum well (QW) active region74is formed between a first spacer73and a second spacer75, with first spacer73formed on the top layer of the first mirror78. Active region74has at least one QW layer.

A second mirror76is formed on second spacer75and is preferably an epitaxially grown DBR which is comprised of a plurality of alternating semiconductor layers having high and low indices of refraction, with each layer having a thickness of λ/4n, where λ is the wavelength of the optical radiation emitted from the laser and n is the index of refraction of the layer. The second mirror76is doped to achieve p-type conductivity. An isolation implant81is formed around the second mirror76, and preferably extends to a depth just inside spacer75. A mesa region is then etched around the outside of the VCSEL89to a depth that exposes the cathode layer70. A cathode contact72is then formed on the exposed surface of cathode layer70, and an anode contact82is formed which overlaps the surface of isolation implant region81and the topmost layer of second mirror76, and which further defines an aperture88which comprises a portion of the surface of the top-most layer of second mirror76. Radiation84is emitted through aperture88.

The MSM photodetector62is formed on the surface of the semi-insulating substrate60as two non-electrically coupled metal patterns66and64, each having fingers that are interdigitated with one another. When one or both of the patterns is biased to some voltage, carriers generated by received light are swept to the anodes of the two diodes by the applied electric field. Because the MSM62operates without conducting any current through the substrate60, there is virtually no electrical crosstalk or leakage between the VCSEL89and the MSM photodetector62. Thus, the VCSEL89can emit radiation84from aperture88based on digital data to be transmitted while MSM photodetector62can receive radiation86in which is encoded digital data received from a remote data source. To achieve even better isolation, an isolation region80can be formed preferably by proton implant between VCSEL89and MSM photodetector62.

FIG. 4illustrates a plan view of the device that is shown as a cross-section inFIG. 3. For clarity, corresponding structures will be indicated by identical index numbers. The cathode layer70and its metal cathode contact72of the VCSEL are extended to the boundary of substrate60, which is furthest away from MSM photodetector62. Bond wire71can then be used to connect cathode contact72to a bond pad of, for example, a lead frame. The VCSEL anode contact82is brought to the same substrate boundary by bond wire77, metal extender79and bond wire69. Metal patterns66and64, which form the anode and anode terminals of MSM photodetector62, are also bonded to the leads of whatever form of packaging is used. One of the metal patterns is typically coupled to a bias voltage while the other is coupled to ground or a different bias voltage. An anti reflection coating can be employed on the MSM62to increase optical efficiency.

A second preferred embodiment is disclosed inFIG. 5a. For convenience and clarity, like structures will be denoted by the same index numbers as in previous figures. This particular embodiment is preferred because it can be implemented using more standard VCSEL manufacturing processes. A first mirror78is formed on a standard semiconductor GaAs substrate79. The first mirror is preferably a semiconductor DBR comprising twenty to thirty periods of AlAs/AlGaAs layers. Each of the layers has a thickness of λ/(4n) and is doped to have n-type conductivity. A first spacer or cladding layer73is then formed on first mirror78, which is either undoped or very lightly doped. An active region74is then formed on the first spacer73, which comprises at least one GaAs QW layer. A second mirror76is then formed on top of a second undoped or very lightly doped spacer or cladding layer75. The second mirror76again preferably consists of alternating layers of AlAs/AlGaAs layers, each being λ/(4n) thick. Second mirror76is doped to have p-type conductivity. On top of second mirror76is formed a thin etch-stop layer93, which has a significantly higher ratio of Al to Ga, about 9 to 1 or greater. On top of the etch-stop layer93, an extended p-type layer100of AlGaAs is formed. On top of p-type layer100is formed an intrinsic layer (i)102of undoped GaAs. Finally, an n-type layer104is formed on top of intrinsic layer102.

The structure is then etched in those areas where a VCSEL is to be formed, and not etched where a p-i-n photodiode is to be formed. The etch strips away the n-type layer104and intrinsic layer102and continues into p-type layer100until the etch-stop layer93is detected. The etching process is terminated so that the etch-stop layer93is etched away and an appropriately thick top layer of second mirror76is exposed. Those of skill in the art will recognize that there are other well-known techniques by which the endpoint of an etching process may be detected to end the etching process at the appropriate time and which are intended to be within the scope of the present invention.

A proton isolation implant is performed to create isolation region80between VCSEL92and p-i-n photodiode90. The implant region80typically achieves a depth, which extends just inside spacer layer75and has a width preferably between about 50 and 100 microns. A circular metal contact82is then formed on the top of mirror76and which overlaps slightly implant region80. Contact82provides access to the anode of VCSEL92. A contact81is then formed on the backside of substrate79and serves as the cathode terminal of VCSEL92. Contacts94are preferably formed on both sides of p-i-n photodiode90which provide electrical access to the anode of p-i-n photodiode90as well as to the anode of the VCSEL91, which underlies p-i-n photodiode90. Finally, contact96is formed on n-type layer104to form the cathode of p-i-n in photodiode90. An anti-reflection coating preferably having a thickness of about one quarter wavelength is applied to photo-receiving surface101.

A simplified schematic of the structure ofFIG. 5ais shown inFIG. 5b. VCSEL92is operated with forward bias between anode terminal82and cathode terminal98to produce radiation84having a wavelength of λ. The p-i-n photodiode90is operated with reverse bias between cathode contact96and anode contacts94. Moreover, anode contacts94are shorted to substrate contact98to ensure that VCSEL91will not become forward biased and emit light. Thus, VCSEL92can be operated to emit light encoded with data to be transmitted to a remote receiver employing a similar structure, and p-i-n photodiode90can operate to receive radiation86, which is encoded with data received from the same remote terminal.

Those of skill in the art will recognize many advantages of the second preferred embodiment ofFIG. 5ais that a typical process used to create arrays of VCSELs, including the isolation implant commonly used to separate the individual VCSELs of the array, can be used to create arrays of VCSEL/p-i-n photodiode pairs. The additional steps required to build the p-i-n photodiode on top of the VCSEL process are negligible in cost. Moreover, the difference in the thickness of the two devices is also negligible for purposes of facilitating near-field coupling of the devices to fibers to eliminate the need for optics. Additionally, due to the underlying second mirror of inoperable VCSEL91, any light not absorbed by the intrinsic layer102of p-i-n photodiode90will be reflected back into intrinsic layer102, thus having a second chance to be absorbed. Finally, the thicker the intrinsic layer102, the lower the capacitance of the p-i-n diode90(the faster its operation) and the better its optical efficiency.

FIG. 6(a) illustrates how the commonly used single fiber round ferrule can be implemented using two or more fibers. Such fibers are now currently available from Siecor as prototypes. The cylindrical ferrule110has the same dimensions (i.e., 2.5 mm) as those ferrules commonly used with only one fiber. Thus, one fiber112can be used for transmitting data as coupled to a VCSEL while fiber114can be used to receive data from a remote transmitter as coupled to a photodetector.

FIG. 6(b) illustrates a commonly available rectangular ferrule which can have eight or more fibers122, and which has guides120for receiving alignment pins. Rectangular ferrule116typically has a polished face118for coupling to an array of transmitting VCSELs. This rectangular ferrule116can be easily adapted to devices made in accordance with the present invention, such that each pair of fibers122can be aligned with a pair of integrated VCSEL/photodetectors.

FIG. 7(a) illustrates how a single VCSEL/photodetector pair could be packaged using standard lead-frame technology to be interfaced to a rectangular multifiber ferrule such as the one illustrated inFIG. 6(b). Integrated transmit/receive chip130can be epoxied to lead frame128and then bonded to bond pads141via bond wires143. If optics are required, lenses138and136can be formed over VCSEL89,92and photodetector62,90respectively, either using materials which are formed over chip130during the manufacturing of chip130or such optics can be integrated within the surface of the plastic encapsulation formed by the package. Lead frame128can also have guide pins140to be used in conjunction with a rectangular ferrule such as the one shown inFIG. 6(b).FIG. 7(b) shows a side view ofFIG. 7ato illustrate the use of optics over photodetector62,90and VCSEL89,92.

FIG. 7(c) illustrates how lead frame128can be butt coupled to a rectangular ferrule150containing two fibers124and126. If distance160is fairly precisely known, and distance147between fibers124and126is fairly precise, a fairly accurate alignment can be achieved between fibers124and126and VCSEL89,92and photodetector62,90because the distance between VCSEL89,92and photodetector is62,90are fairly precise based on the photo-optical alignment process used in manufacturing the integrated semiconductor130. Thus, a fairly accurate positioning of the chip130with respect to the lead frame128during packaging will provide a reasonably accurate passive alignment. Of course, fine alignment can be achieved using well-known active alignment techniques. A further advantage of the coupling technique shown inFIG. 7is that no optics must be interposed between package128and ferrule150if the coupling distance152is close enough. Of course, a flat transmissive surface148can be easily achieved on package128.

FIG. 8illustrates a lead-frame package which can be used to interface with a round multifiber ferrule such as the two fiber ferrule ofFIG. 6(a) Barrel127is designed to precisely mate with the round ferrule ofFIG. 6(b).

An alternate embodiment of the present invention relates to a monolithic semiconductor device having a VCSEL integrated with a photodetector and preamplifier on the same substrate, the VCSEL and photodetector to be operated independently as a transmit and receive device respectively. The present invention also includes a method of manufacturing the independently operated VCSEL and photodetector with integrated FET preamplifier.

This alternate embodiment of the present invention is implemented using standard VCSEL manufacturing techniques. The conventional VCSEL portion of this alternative embodiment of the present invention as shown inFIG. 9includes a substrate201, a first or lower mirror202, an optical cavity203, and a second or upper mirror204. The substrate201is made of gallium arsenide (GaAs) or any other suitable material. The first and second mirrors202,204are comprised of multilayered distributed Bragg reflectors, (DBRs) as is conventional in the art. In this alternate embodiment, aluminum gallium arsenide (AlGaAs) and aluminum arsenide (AlAs), with varying concentrations of aluminum and gallium are used to fabricate the upper and lower mirrors202,204. The optical thickness of each mirror layer is typically designed to be a quarter wavelength of the emitted light of the laser where the optical thickness is given by the product of the physical thickness and the index of refraction.

The conventional optical cavity203includes an active region surrounded by first and second cladding regions. The first and second cladding regions are made of AlGaAs in the exemplary embodiment. In the active region203, at least one quantum well made of GaAs is disposed on adjacent barrier layers made of Al0.25Ga0.5As. As is generally understood in the art, the number of and materials forming the quantum wells and surrounding barrier layers can be varied depending on the design.

In this alternate embodiment, the first or lower mirror202is doped to n-type conductivity while the second or upper mirror204is doped to have p-type conductivity. The p-type second mirror204is capped by a layer of GaAs205, which is approximately 100 Angstroms thick.

A thin etch stop layer206, consisting of approximately 100–200 Angstroms of AlAs is deposited on the p-type mirror cap205. On top of the etch stop layer206an additional intrinsic i-type layer207is deposited, consisting of an absorbing GaAs material. The p-doping extends through the AlAs etch stop layer206into the i-type region207to avoid heterostructural barriers and band problems. Finally an n-type layer208of Al00.25Ga0.75As is formed on top of the intrinsic layer207with a thin GaAs cap.

This alternate embodiment minimizes photodetector pulse deformation due to minority carrier drift within the p-i-n photodiode211structure. The GaAs i-type layer207absorbs light at 850 nanometers whereas the n-type layer208is non-absorbent at this wavelength. Therefore, photon absorption is confined to the i-type layer207wherein the photons are removed by the reverse electric fields. If photocarrier absorption occurs in the n-type region208or the p-type region204on either side of the i-type region207, minority photons are absorbed, and minority carriers are generated. There is no electric field within the background doped n-type region208or p-type region204to remove these minority carriers. These minority carriers must then drift and diffuse through normal diffusion processes eventually being swept into the i-type region207. This diffusion processes deforms the shape of the photodetector output pulse by creating a long time tail to the trailing edge of the pulse.

As shown in the cross-sectional view ofFIG. 10(a) circular n-ohmic209is formed to make contact with the photodiode n-type region208while the surface is planar.FIG. 10(b) is a top view of the ring contact209deposited on the n-type region208. The structure is then masked and etched in those areas where the transmit VCSEL210is to be formed,FIG. 11(a), and not etched where the photodetector211is to be formed. There are well known techniques by which the endpoint of an etching process may be detected to end the etching process at the appropriate time. A disadvantage of these etch techniques is the non-uniformity of etch rates over the surface of the wafer. Etch rate variation is created by fluid motion, surface effects, light effects and various other phenomenon. This variation in etch rate results in imperfections in the surface finish of the VCSEL and added complexity in the manufacturing control process.

In response to the drawbacks of the prior art, this alternate embodiment of the present invention incorporates an AlAs etch stop layer206to facilitate selective etching of the upper n-type region208and i-type region207. The n-type region208and i-type region207are etched using a known combination of citric acid with a high percentage of peroxide. When the etch solution reaches the etch stop layer206the peroxide interacts with the AlAs to form an oxide surface. The citric acid solution is not sufficiently strong to remove the aluminum oxides so that the oxide surface in effect inhibits or stops the etch. This selective etch technique removes the time critical aspect of conventional etch techniques and greatly simplifies the manufacturing process. From a timing standpoint, the device can now be over etched assuring the uniform removal of the upper n-type region208and i-type region207over the entire surface of the VCSEL210. Next, the etch stop layer206is removed using an alternate etch solution which will not etch the GaAs cap205on the upper p-type mirrors204. Preferably, a solution of hydrochloric acid, with 10 percent water is used to remove the etch stop layer206. As is shown inFIG. 11(a), a photodetector mesa211, with a slight undercut in the AlAs etch stop layer206, is closely coupled to a surrounding VCSEL210. The present invention achieves the required device uniformity without implementation of rigorous process controls required by other known techniques.FIG. 11(b) is a top view of the photodetector mesa211with integrated n-type contact209.

Referring toFIG. 12(a) in this alternate embodiment of the present invention, a metal contact212is formed on the bottom of the substrate201and serves as the cathode212terminal of the VCSEL210. The contact metalization forming the n-ohmic contact212on the bottom of the substrate201may be, for example, eutectic gold germanium deposited by electron beam evaporation or sputtering. Additionally, p-ohmic contacts213,214and215are then formed on the top of the second or upper mirror204. As shown in the top view ofFIG. 12(b) a circular metal contact213is formed on the outside of the photodetector211, while at the same time circular contacts214,215are formed on the upper most surface205of the VCSEL210. The top contact metalization forming p-ohmic contacts213,214, and215may be, for example, gold with 2 percent beryllium added or a layered structure of titanium/platinum/gold, preferably deposited by electron beam evaporation.

In this alternate embodiment of the present invention, a proton implant is performed to create an isolation region216between the VCSEL210and the photodetector211(FIG. 13(a)). The standard proton implantation process that is used for current constriction within the conventional VCSEL217,218, is used to create a highly insulative guard band216(top viewFIG. 13(b)) around the photodetector211thereby isolating the VCSEL210structure from the photodetector211. In the top view ofFIG. 13(b), it can be seen that a guard band216of highly insulative material is formed between the n-type contact209and the p-ohmic contact213of the photodetector211. This alternate embodiment has several advantages over prior art isolation mechanisms. For example, the operating time constants of a p-i-n photodetector211are inversely proportional to the capacitance of the device. The capacitance of the device is directly proportional to the surface area of the device. As is shown in the top view ofFIG. 13(b) the highly insulative guard band216decreases the active surface area of the device, thereby reducing the capacitance of the device and increasing the maximum operating speed of the photodetector211.

The photodetector guard band216also increases the sensitivity of the photodetector211by eliminating leakage paths through which current could otherwise flow between the VCSEL210and the photodetector211. Typical photodetectors must receive very low optical power levels so that most photodetectors are low current devices. Therefore, a relatively small amplitude leakage current can severely degrade the sensitivity of the photodetector211by introducing excess noise into the receiver system as well as unacceptably changing the performance of the p-i-n photodetector211over time. The guard band region216effectively stops electrical conduction at the edge of the highly resistive guard band region216between the p-type contact213and n-type contact209, thereby eliminating all leakage paths.

Current constriction within the conventional VCSEL210is provided by using proton implant regions217and218to creating active and inactive regions of the VCSEL. The VCSEL proton implant regions217and218convert the upper mirror DBR204into areas of high resistivity around the active VCSEL210device. The VCSEL proton implant regions217,218typically achieve depths that extend just inside the spacer layer. In this alternate embodiment of the present invention, the thicknesses of the photodetector211i-type region207and n-type region208are chosen so that the implant depth that is appropriate for the VCSEL210is also appropriate for the photodetector211. The forced commonality between the proton implant region217,218of the VCSEL210and the proton implant guard band216of the photodetector211allows for a more efficient manufacturing process. The process sequence that was appropriate for the VCSEL210, with a modified mask layout is also appropriate for the photodetector211. Therefore, all proton implantations216,217and218can be performed in a single process step with a single mask layout.

Referring toFIG. 13(a), the photodetector proton implant region216completely transects the n-type region207and penetrates into the i-type region208. However, the proton implant region216does not fully penetrate the p-type region204providing a conduction path to the p-type contact213, to maintain the required continuity between the n-type contact209and p-type contact213of the photodetector211. In this alternate embodiment of the present invention, the n-type region208is approximately 3000 Angstroms thick, the absorbing i-type region207is approximately 2.5 microns in thickness and the area where the p-type region extends over into the i-type region207is approximately 2000 Angstroms so that the entire thickness of the photodetector mesa211is approximately 3 microns.

A dielectric protective layer219(FIG. 14(a)) is deposited to protect the outermost surface205of the VCSEL210and the photodetector211. Silicon nitride is preferably used for the dielectric protective layer219. Therefore, vias must be etched into the dielectric protective layer219to provide access to the p-type contacts214and215of the VCSEL210, as well as the n-type contact209and p-type contact213of the photodetector211.

A thicker inter-connect metal220and221is deposited on the photodetector n-type contact209and p-type contact213respectively, as shown in the cross section ofFIG. 15(a). Also, a thicker inter-connect metal222and223is deposited on the p-type contacts214and215of VCSEL210. The inter-connect metal deposits220–223, provide a low resistance, good electrical conductor contact for wire bonding, probing, etc. The metal deposits used for the n-type and p-type contacts209,213–215, are generally very thin and relatively high resistance and are designed for transitioning from metal to semiconductors through ohmic contacts that have a non-barrier between the work function of the two materials. Therefore, the inter-connect metal is chosen to provide low contact resistance for current flow.FIG. 15(b) shows a top view of the interconnect metal220and221integrated with the photodetector211.

In an alternate embodiment of the present invention, a dielectric phase shifting layer224, is preferably disposed on the conventional VCSEL structure210(FIG. 16(a)). The dielectric phase shifting layers224increase the total transmission out of the VCSEL210as is disclosed in U.S. Patent Application “VERTICAL CAVITY SURFACE EMITTING CONSISTENT SLOPE EFFICIENCIES”, application Ser. No. 09/237,580; the contents of which are incorporated herein by reference. In this alternate embodiment of the present invention, deposition of the dielectric phase shifting layers224is halted prior to the deposition of the last quarter optical wavelength of the material. The dielectric phase shifting layers224are then completely etched off the photodetector211as shown inFIG. 16(a). Next a quarter optical wavelength of the dielectric material225is deposited over the VCSEL210to complete its mirror as well as on the photodetector211to create an anti-reflective coating (FIG. 17(a)). The quarter optical wavelength material is preferably silicon nitride as is known in the art.

When the anti-reflective coating225of silicon nitride is applied to the photodetector211n-type region, in conjunction with the p-type region of the upper mirror204, which underlies the photodiode211, a high degree of efficiency is achieved. The anti-reflective coating225increases the transmission of incoming light into the p-i-n photodiode structure211. Additionally, any light that does not get absorbed in the i-type region207is reflected off the upper mirror204of the VCSEL210and is absorbed as it propagates back through the i-type region207for the second time. Because of this double pass mechanism the absorption characteristics of the i-type region207is twice what it otherwise would be, providing excellent quantum efficiencies, and very high response at gigabit speeds.

In an alternate embodiment of the present invention, a variable tuning layer (not shown) is deposited on the outer surface of the dielectric phase shifting layer224. The variable tuning layer facilitates predictable adjustment of the optical efficiency of the laser during fabrication to achieve lasers with substantially similar slopes on a wafer-to-wafer basis. The manufacture and use of a variable tuning layer is disclosed in U.S. Provisional Patent Application “ENCAPSULATED LASER WITH CONTROLLED SLOPE EFFICIENCY”, Application No. 60/125,916, filed on March 24, 1999, the contents of which are hereby incorporated by reference. In this alternate embodiment, the initial VCSELs are tested by any conventional technique, preferably on a representative sample, to determine characteristics of the initial VCSELs, such as the slope efficiency distribution. The thickness of the variable thickness dielectric layer required to tune the slope efficiency distribution to within the target specification is calculated. This calculated thickness is then used to interrupt the prior layer deposition, etch the dielectric layers off the photodetector and then deposit the remaining phase shifting layer thickness and tuning layer. If the calculated thickness of the dielectric tuning layers was ⅛ of a wavelength, the phase shifting layer deposition would be interrupted at ⅛ of a wavelength less complete, the dielectric would be etched off the photodetector211and the remaining phase shifting layer dielectric and tuning layer thickness would be deposited. The combination of the two materials would then be a quarter wavelength to complete the design of the anti-reflective coating225for the photodetector211.

FIG. 18(a) is a cross section of the present invention, including the mask layout, with approximate dimensions, for manufacturing this alternate embodiment of the present invention. Also shown are the p-i-n laser226, a parasitic VCSEL227underneath the photodetector211and the p-i-n photo diode228. The p-type contact213of the p-i-n photodetector211may be coupled to ground so that the parasitic VCSEL227structure, which lies underneath the p-i-n photodetector211, is never turned on and other bipolar parasitic effects are avoided.

Referring toFIG. 19, in an alternate embodiment of the present invention, an epitaxial n-i-p structure,230,231and232respectively, along with highly insulative proton implant regions233and234, are used to integrate an FET onto the photodetector211to create an integrated detector pre-amplifier.FIG. 19shows a perspective view of the integrated detector pre-amplifier229. Metal deposits are formed on the outer most surface235of the photodetector211to form the source236, gate237and drain238on an n-type channel of a typical transistor structure. In this alternate embodiment the proton implant regions233and234intersect the back of the source236, gate237and drain238as well as the lower surface of the source237and drain238. In this way the proton implant regions233and234form an isolated conductive region239or well, within a highly insulative field formed by the proton implantations233and234. The width of the conductive region239is arbitrary and can be tailored to produce a predetermined transistor. To achieve gigabit data communication rates, the length of the gate237, which is the critical transistor design parameter, can be on the order of one micron. The GaAs layer upon which the metal layers are deposited is a highly conductive material also with very good frequency response. A one-micron metal deposit is well within reasonable process control technology known in the art. The gate237, is typically a layered structure of titanium, platinum and gold which can be deposited by any suitable method known in the art, such as by sputtering or electron beam vaporization. The thicknesses of the metal deposits are typically 500 Å, 1000 Å, and 3000 Å for the Ti, Pt, and Au respectively as is well known in the GaAs transistor art.

The source236and the drain238are typically layered structures of nickel with gold on gold germanium, n-ohmics. The nickel acts as a barrier to prohibit the gold from interfusing with the gold germanium and changing the eutectics of the gold germanium. In the preferred embodiment of the present invention a ratio of 88 percent gold to 12 percent germanium is used to form a eutectic, which has a phase melting point near 3600° C. to make a good ohmic contact.

This alternate embodiment of the present invention is less susceptible to receiver noise, crosstalk etc. than conventional photodetector designs. The coupled FET and photodetector create an integrated detector pre-amp such that the output signal of the photo detector is amplified by the FET and converted from a current signal to a voltage signal. Therefore, a relatively large voltage single is being modulated rather than a low level current signal. In conventional SMFF transceiver designs, the photodetector is susceptible to crosstalk from the high drive currents of the VCSEL as well as receiver noise and other degradations to receiver sensitivity. In this alternate embodiment the photo detector is integrated on the same mesa as the amplifying transistor circuitry so that the output signals of the integrated detector pre-amp are no longer very low current signals that are sensitive to noise, crosstalk and the like but are more stable amplified voltage signals.

The signal to noise ratio of conventional optical receiver is limited by the front-end noise. Currently, front end receivers which interface with conventional high speed photodetectors, utilize GaAs technology because high speed, highly sensitive, low noise performance is required to accurately amplify the low level current output of the conventional photodetector. In this embodiment of the present invention, the low noise circuitry is integrated with the photodetector on the same wafer. In this embodiment, the integrated amplifier is realized with relatively simple transistor circuits. The transistor circuits are readily implemented with techniques known in the art without resorting to the highly integrated processes required for GaAs integrated circuits. These relatively simple transistor circuits are generally bond pad limited. Coupling the photodetector to the transistors eliminates capacitance and bond wire inductance which otherwise limit system performance. The amplified output signal of the integrated detector preamplifier, which is no longer susceptible to noise and other degradations, allows the front end receiver amplifier to be implemented with CMOS integrated circuit technology that is comparably a much lower cost than the more complex GaAs integrated circuit technology required for conventional photodetectors.

In an alternate embodiment of the present invention the integrated detector preamplifier is coupled with VCSEL transmit technology to provide a closely spaced transmit241, receive242, amplifier243circuit240on a single integrated circuit chip as shown in the top view ofFIG. 20. Conventional transceiver designs require closely coupled high-speed integrated circuitry for reduced delay times. The high-speed integrated circuitry generally considerable power dissipation and heat to the packaged system. The integrated device with the wire bonds244coming off the VCSEL and integrated receive amplifier can then be mounted onto lead frames245, which is a low cost packaging technology.

The transmit/receive amplifier circuit embodiment of the present invention has the added benefit of being relatively easy to manufacture. This alternate embodiment of the present invention is implemented using standard VCSEL manufacturing techniques and process sequences as previously described. The AlAs etch stop layer would be deposited on a conventional VCSEL. On top of the etch stop layer an additional intrinsic i-type layer is deposited, consisting of an absorbing GaAs material. The p-doping extends through the AlAs etch stop layer into the i-type region to avoid heterostructural barriers and band problems. Finally, an n-type layer of Al0.25Ga00.75As is formed on top of the intrinsic layer with a thin GaAs cap.

Next, the transistor, source236, gate237and drain238and n-type contacts209for the photodetector211are deposited preferably by electron beam evaporation. In this alternate embodiment, the source236and drain238contacts are the same n-type contact that was used for the photodetector209. Next selective etching to expose the VCSEL and form the integrated photodetector preamplifier mesa would be performed. The p-type contacts213,214and215would then be deposited, preferably by electron beam evaporation, followed by a proton implantation for the transistor233and234, photodetector guard ring216and VCSEL217. As previously described, dielectric layers are next deposited. Dielectric material is deposited on the transistor to decrease degradation and increase the operating life of the device. Silicon nitride is the preferred dielectric material. Next vias are etched into the dielectric layers to allow the interconnect metal220,221,222and223to be deposited. Finally, an anti-reflective coating225is applied to the photodetector211.

It should be noted that a number of variations to the inventions described above will be apparent to those skilled in the art. For example, the p-i-n photodiode can be deposited directly on a semiconductor substrate along with the proton implant guard ring to create a high performance photodetector. In this alternate embodiment the device capacitance can be matched exactly with the mask design and the reverse bias to achieve complete depletion of the i-type region as is required for high-speed performance. In addition, the above photodetector can be integrated with the FET to form a high-speed integrated detector preamplifier. The VCSEL could include a power monitoring photodetector, wherein the monitoring photodetector may be below the VCSEL or on the side or in another location within the package to provide controlled monitoring and feedback.

Those of skill in the art will recognize that the exact order in which the process steps take place, as well as the particular material system used, are irrelevant to the patentability of the present invention. For example, one material system might include a GaAs substrate GaAs quantum wells, DBR layers of AlAs and AlGaAs, and an intrinsic layer of GaAs. The p and n layers of the p-i-n would also be made of AlGaAs. Other known material systems may be used to produce different wavelengths of emitted radiation and the particular dimensions of the integrated devices may be changed to suit particular transmission modes or packaging requirements. Moreover, although it is desirable that the photolithographically defined spacings between the transmit and receive pairs are preferably small, of course larger spacings can be easily accommodated by the present invention.