Apparatus and method for setting filter coefficient, and recording medium having a program recorded thereon

Echo preventing circuit includes first and second FIR filters. The outputs of the first and second FIR filters are converted into first and second analog signals. An input/output terminal outputs the first analog signal or receives a third analog signal. An AD converter converts an analog signal obtained by subtracting the second analog signal from a signal formed by combining the first analog signal and the third analog signal. A response signal acquiring unit acquires a first response signal from an output of the first FIR filter to an output of the AD converter. A filter coefficient setting unit sets the filter coefficients of the second FIR filter based on the first response signal and sets the filter coefficients of the first FIR filter based on second response signal of a section from and output of the second FIR filter to an output of the AD converter.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims the benefit of priority to Japanese Patent Application No. 2006-32540, filed Feb. 9, 2006, of which full contents are incorporated herein by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a filter coefficient setting apparatus, a filter coefficient setting method, and a recording medium recorded with a program.

2. Description of the Related Art

Recently, for example, each of some communicating apparatuses such as a mobile phone and a hands-free phone that can each be connected to an earphone microphone, incorporates an echo preventing circuit to prevent echoes generated due to sound coupling that travels along from a speaker to a microphone, electric reflection in a circuit, etc. For example, Japanese Patent Application Laid-Open Publication No. 3293029 discloses a circuit that prevents echoes by canceling an input signal using a signal having a phase that is an inverse of that of and the amplitude level equal to that of the input signal. However, the configuration disclosed in the above '029 publication needs to set the circuit constants of the circuit elements with high precision to cancel echoes with high precision. However, such a configuration is not easy and this circuit can not cancel echoes with high precision.

Therefore, a method of canceling echoes with high precision using digital processing is considered.FIG. 8depicts an example of an echo preventing circuit that uses a DSP100. As depicted, an analog signal indicating sound transmitted from a counterpart using a mobile phone, etc., is inputted into an AD converter101. The signal converted into a digital signal by the AD converter101is applied with a convoluting process by FIR filters102and103in the DSP100based on the filter coefficients thereof, and is outputted. A signal outputted from the FIR filter102is inputted into a DA converter104. The signal converted into an analog signal by the DA converter104is outputted to an earphone microphone through an input/output terminal105and is inputted into one of two terminals of a differential amplifying circuit106. The signal outputted from the FIR filter103is inputted into a DA converter107. The signal outputted from the DA converter107is inputted into the other terminal of the differential amplifying circuit106.

The signal outputted from the differential amplifying circuit106is converted into a digital signal by an AD converter108and is inputted into the DSP100. After being outputted from the DSP100, this digital signal is converted into an analog signal by a DA converter109and is outputted as an output signal of the echo preventing circuit.

The DSP100acquires an impulse response of a section from the DA converter104to the AD converter108based on the output of the AD converter108obtained when the DSP100outputs an impulse to the DA converter104. The DSP100acquires an impulse response of a section from the DA converter107to the AD converter108based on the output of the AD converter108obtained when the DSP100outputs an impulse to the DA converter107. By setting properly the filter coefficients of the FIR filters102and103based on these impulse responses, echoes can be canceled with high precision.

When the impulse responses are acquired, impulse responses with high precision can not be obtained unless the magnitude of the impulse is proper and, as a result, the echoes can not be canceled effectively.FIGS. 9A to 9Cdepict examples of impulse responses corresponding to the magnitude of an impulse. As depicted inFIG. 9A, when the magnitude of the impulse is proper, an impulse response having the proper magnitude can be obtained. In contrast, as depicted inFIG. 9B, when the magnitude of the impulse is too small, the signal level of the impulse response is small and the precision of the impulse response is degraded due to background noises, circuit noises, etc. As depicted inFIG. 9C, when the magnitude of the impulse is too large, the impulse response overflows in the AD converter108and no accurate impulse response can be obtained.

Therefore, it is necessary to obtain an impulse having the proper magnitude as depicted inFIG. 9Aby generating an impulse having a proper magnitude. However, the magnitude of the impulse varies depending on the internal impedance of an earphone microphone used, the sensitivity of a speaker, the sensitivity of a microphone, or dispersion of the resistors used in the differential amplifying circuit106, etc. caused through manufacture thereof, etc. Therefore, it is difficult to determine in advance the proper magnitude of the impulse. Therefore, when the filter coefficients of the FIR filters102and103are set based on an impulse response obtained by generating a impulse having a predetermined magnitude, the echoes can not always be canceled effectively.

SUMMARY OF THE INVENTION

It is therefore the object of the present invention to provide a filter coefficient setting apparatus, a filter factor setting method, and a recording medium recorded with a program that can set a proper filter factor to prevent echoes.

In order to achieve the above object, according to a first aspect of the present invention there is provided a filter factor setting apparatus that sets the filter coefficients of an echo preventing circuit, the echo preventing circuit having a first FIR filter that is inputted with a first digital signal and that outputs a second digital signal, a second FIR filter that is inputted with the first digital signal at the same time that the first FIR filter is inputted with the first digital signal, and that outputs a third digital signal, a first DA converter that converts the second digital signal into a first analog signal and outputs the first analog signal, a second DA converter that converts the third digital signal into a second analog signal and outputs the second analog signal, an input/output terminal that outputs the first analog signal or that is inputted with a third analog signal, a subtracting circuit that outputs a fourth analog signal obtained by subtracting the second analog signal from a signal formed by combining the first analog signal and the third analog signal, and an AD converter that converts the analog signal outputted from the subtracting circuit into a digital signal and outputs the digital signal, the apparatus comprising a response signal acquiring unit that acquires a first response signal of a section from an output of the first FIR filter to an output of the AD converter by generating a first signal, adjusts the magnitude of the first signal in response to the magnitude of the first response signal, and acquires again the first response signal; a filter coefficient setting unit that sets the filter coefficients of the second FIR filter based on the first response signal acquired again and sets the filter coefficients of the first FIR filter based on a second response signal of a section from an output of the second FIR filter to an output of the AD converter; and a signal level adjusting unit that adjusts the signal levels of the first and the second analog signals based on the amount by which the level of the first signal is to be adjusted such that the fourth analog signal is a signal obtained by removing or attenuating the first analog signal from a signal formed by combining the first analog signal and the third analog signal.

In order to achieve the above object, according to a second aspect of the present invention there is provided a filter coefficient setting method of an echo preventing circuit, the echo preventing circuit having a first FIR filter that is inputted with a first digital signal and that outputs a second digital signal, a second FIR filter that is inputted with the first digital signal at the same time that the first FIR filter is inputted with the first digital signal, and that outputs a third digital signal, a first DA converter that converts the second digital signal into a first analog signal and outputs the first analog signal, a second DA converter that converts the third digital signal into a second analog signal and outputs the second analog signal, an input/output terminal that outputs the first analog signal or that is inputted with a third analog signal, a subtracting circuit that outputs a fourth analog signal obtained by subtracting the second analog signal from a signal formed by combining the first analog signal and the third analog signal, and an AD converter that converts the analog signal outputted from the subtracting circuit into a digital signal and outputs the digital signal, the method comprising the steps of acquiring a first response signal of a section from an output of the first FIR filter to an output of the AD converter by generating a first signal; adjusting the magnitude of the first signal in response to the magnitude of the first response signal; acquiring again the first response signal; setting the filter coefficients of the second FIR filter based on the first response signal acquired again; setting the filter coefficients of the first FIR filter based on a second response signal of a section from an output of the second FIR filter to an output of the AD converter; and adjusting the signal levels of the first and the second analog signals based on the amount by which the level of the first signal is to be adjusted such that the fourth analog signal is a signal obtained by removing or attenuating the first analog signal from a signal formed by combining the first analog signal and the third analog signal.

In order to achieve the above object, according to a third aspect of the present invention there is provided a recording medium having recorded thereon a program to set filter coefficients of an echo preventing circuit, the echo preventing circuit having a processor, a first FIR filter that is inputted with a first digital signal and that outputs a second digital signal, a second FIR filter that is inputted with the first digital signal at the same time that the first FIR filter is inputted with the first digital signal, and that outputs a third digital signal, a first DA converter that converts the second digital signal into a first analog signal and outputs the first analog signal, a second DA converter that converts the third digital signal into a second analog signal and outputs the second analog signal, an input/output terminal that outputs the first analog signal or that is inputted with a third analog signal, a subtracting circuit that outputs a fourth analog signal obtained by subtracting the second analog signal from a signal formed by combining the first analog signal and the third analog signal, and an AD converter that converts the analog signal outputted from the subtracting circuit into a digital signal and outputs the digital signal, the program being operable to cause the processor to implement the functions of acquiring a first response signal of a section from an output of the first FIR filter to the AD converter by generating a first signal; adjusting the magnitude of the first signal in response to the magnitude of the first response signal and acquiring again the first response signal; setting the filter coefficients of the second FIR filter based on the first response signal acquired again and setting the filter coefficients of the first FIR filter based on a second response signal of a section from an output of the second FIR filter to an output of the AD converter; and adjusting the signal levels of the first and the second analog signals based on the amount by which the level of the first signal is to be adjusted such that the fourth analog signal is a signal obtained by removing or attenuating the first analog signal from a signal formed by combining the first analog signal and the third analog signal.

Other features of the present invention will be clear by referencing the accompanying drawings and the description herein.

DETAILED DESCRIPTION OF THE INVENTION

At least the following items will be clear according to the description herein and in the accompanying drawings.

Entire Configuration

FIG. 1depicts a block diagram of an example of an echo preventing circuit applied with the present invention. An echo preventing circuit1includes a CPU (Central Processing Unit)2, a digital signal processing circuit (DSP: Digital Signal Processor)3, AD converters4and5, DA converters6to8, amplifying circuits9to11, a differential amplifying circuit12, and an input/output terminal13. The DA converter6corresponds to a first DA converter of the present invention and the DA converter7corresponds to a second DA converter of the present invention. The differential amplifying circuit12corresponds to a subtracting circuit of the present invention. Though the CPU2is a structural requirement for the echo preventing circuit1in the embodiment, the CPU2may not be a structural requirement.

The DSP3is configured to include input terminals30and31, output terminals32to34, a DSP core40, a RAM (random Access Memory)41, and a ROM (Read Only Memory)42. The DSP3includes FIR (Finite Impulse Response) filters50and51. These FIR filters50and51are realized by execution by the DSP core40of a program stored in the RAM41or the ROM42. In this case, the FIR filter50corresponds to a first FIR filter of the present invention and the FIR filter51corresponds to a second FIR filter of the present invention. The FIR filters50and51can also be realized by hardware.

The AD converter4is inputted with, for example, a sound signal. The AD converter4applies an analog-to-digital conversion process to the sound signal and inputs a digital signal obtained (a first digital signal) into the DSP3through the input terminal30.

The digital signal inputted into the DSP3is inputted to each of the FIR filters50and51. The FIR filter50applies a convolution calculating process to the digital signal inputted thereinto based on the filter coefficients of the FIR filter50and outputs a digital signal obtained (a second digital signal) to the output terminal32. Simultaneously, the FIR filter51applies the convolution calculating process to the digital signal inputted thereinto based on the filter coefficients of the FIR filter51and outputs a digital signal obtained (a third digital signal) to the output terminal33.

The DA converter6is inputted with the output signal from the FIR filter50through the output terminal32. The DA converter6applies a digital-to-analog conversion process to the output signal from the FIR filter50and outputs an analog signal obtained (a first analog signal) to the amplifying circuit9. The amplifying circuit9amplifies the analog signal by a predetermined amplification factor and outputs the amplified analog signal.

The input/output terminal13is connected to an earphone microphone20. The earphone microphone20has a speaker function of generating sound by vibrating a diaphragm not shown based on a sound signal inputted from the input/output terminal13. The earphone microphone20also has a microphone function of generating a sound signal by converting into vibration of the diaphragm the vibration of the eardrum caused when a person wearing the earphone microphone20in his/her ear emanates sound. The earphone microphone20is a known technology and is described in Japanese Patent Application Laid-Open Publication No. 2003-9272, etc. The sound signal (the third analog signal) generated by the earphone microphone20is inputted into a positive input terminal of the differential amplifying circuit12through the input/output terminal13. The signal outputted to the earphone microphone20through the input/output terminal13is reflected, is inputted from the input/output terminal13, and is inputted into the positive input terminal of the differential amplifying circuit12. In this case, the “signal reflected” refers to collectively signals such as the signal that travels back through the earphone microphone20and the signal that is formed by converting reflected sound of the sound outputted from the earphone microphone20and reflected inside an ear into a sound signal by the earphone microphone20. The input/output terminal13is not a terminal into which an output signal is inputted or which outputs an input signal, both exclusively. For example, the input/output terminal13can simultaneously be inputted with an output signal and output an input signal.

The DA converter7is inputted with an output signal from the FIR filter51through the output terminal33. The DA converter7applies a digital-to-analog converting process to the output signal from the FIR filter51and outputs an analog signal obtained (a second analog signal) to the amplifying circuit11. The amplifying circuit11amplifies the analog signal by a predetermined amplification factor and outputs the analog signal amplified to a negative input terminal of the differential amplifying circuit12.

The differential amplifying circuit12outputs the sound signal from the input/output terminal13to the amplifying circuit10. The amplifying circuit10amplifies the sound signal by a predetermined amplification factor and outputs the sound signal amplified to the AD converter5. The positive input terminal of the differential amplifying circuit12is inputted with the analog signal from the amplifying circuit9. The differential amplifying circuit12outputs a signal (a fourth analog signal) formed by amplifying the difference between the analog signal inputted into the positive input terminal of the circuit12and the analog signal inputted into the negative input terminal of the circuit12.

The AD converter5applies an analog-to-digital converting process to the sound signal from the amplifying circuit10and inputs a digital signal obtained to the DSP3through the input terminal31. The digital signal inputted into the input terminal31is outputted from the output terminal34. The DA converter8is inputted with the digital signal outputted from the DSP3through the output terminal34. The DA converter8applies a digital-to-analog converting process to the digital signal and outputs an analog signal obtained.

The CPU2controls the entire echo preventing circuit1. When the CPU2is inputted with, for example, a resetting signal to reset the echo preventing circuit1, the CPU2outputs to the DSP3an instructing signal to cause an impulse response acquiring process described below to be executed. For example, the CPU2may output the above instructing signal to the DSP3when the CPU2detects turning on of the power to operate the echo preventing circuit1. The CPU2may output the above instructing signal to the DSP3when the CPU2detects electric variation of the analog circuit (for example, variation of the amplitude of the output of the amplifying circuit10).

The DSP core40(a processor) can realize various types of process in the DSP3by executing the program stored in the RAM41or the ROM42.FIG. 2depicts the configuration of a functional block that is realized by execution by a DSP core40of a program. The DSP3includes an impulse response acquiring unit60, a filter coefficient setting unit61, and a signal level adjusting unit62. A processing apparatus constituted of the impulse response acquiring unit60, the filter coefficient setting unit61, and the signal level adjusting unit62corresponds to a filter coefficient setting apparatus of the present invention.

The impulse response acquiring unit60acquires an impulse response IR1′(Z) (a first response signal) of a path A indicated by a solid line ofFIG. 1from the input terminal31by outputting an impulse (a first signal) from the output terminal32. The impulse response acquiring unit60acquires another impulse response IR2′(Z) (a second response signal) of a path B indicated by another solid line ofFIG. 1from the input terminal31by outputting another impulse (a second signal) from the output terminal33. The impulse response acquiring unit60can adjust the magnitude of each of the impulses outputted respectively from the output terminal32and33such that each of the impulse responses IR1′(Z) and IR2′(Z) has proper magnitude.

The filter coefficient setting unit61sets the filter coefficients of the FIR filter51based on the impulse response IR1′(Z) acquired. The filter coefficient setting unit61also sets the filter coefficients of the FIR filter50based on the impulse response IR2′(Z) acquired.

The signal level adjusting unit62adjusts the signal level of each of the signals respectively outputted from the output terminal32and33based on the amount by which the magnitude of each of the impulses from the impulse response acquiring unit60is to be adjusted.

Principle of Canceling Echoes

Description will be given for the principle of canceling echoes in the echo preventing circuit1. The impulse response (the transfer function) of a section from the output terminal32to the positive input terminal of the differential amplifying circuit12indicated by a dotted line ofFIG. 1is denoted by IR1(Z). The impulse response (the transfer function) of a section from the output terminal33to the negative input terminal of the differential amplifying circuit12indicated by a dotted line ofFIG. 1is denoted by IR2(Z). The impulse response (the transfer function) of a section from the latter stage of the positive/negative input terminal of the differential amplifying circuit12to the input terminal31indicated by a dotted line ofFIG. 1is denoted by W(Z).

In this case, the impulse response (the transfer function) IR1′(Z) of the path A indicated by a solid line of theFIG. 1is as IR1′(Z)=IR1(Z)·W(Z). The impulse response (the transfer function) IR2′(Z) of the path B indicated by a solid line of theFIG. 1is as IR2′(Z)=−IR2(Z)·W(Z). Why the phase of IR2(Z) is inversed is because the impulse is inputted into the negative input terminal of the differential amplifying circuit12.

Assuming that the filter coefficients of the FIR filter50is −IR2′(Z) formed by inverting the phase of IR2′(Z), the characteristic IRa11_1(Z) of a section from the input of the FIR filter50to the input terminal31is as follows.

Assuming that the filter coefficients of the FIR filter51is IR1′(Z), the characteristic IRa11_2(Z) of a section from the input of the FIR filter51to the input terminal31is as follows.

That is, it can be seen that the characteristic IRa11_1(Z) of the section from the input of the FIR filter50to the input terminal31and the characteristic IRa11_2(Z) of the section from the input of the FIR filter51to the input terminal31each have a characteristic of canceling each other. As a result, it can be seen that −IR2′(Z) obtained by inverting the phase of IR2′(Z) may be set as the filter coefficients of the FIR filter50and IR1′(Z) may be set as the filter coefficients of the FIR filter51.

Assuming that the filter coefficients of the FIR filter50is IR2′(Z), the characteristic IRa11_1(Z) of the section from the input of the FIR filter50to the input terminal31is as follows.

Assuming that the filter coefficients of the FIR filter51is −IR1′(Z) obtained by inverting the phase of IR1′(Z), the characteristic IRa11_2(Z) of a section from the input of the FIR filter51to the input terminal31is as follows.

That is, it can be seen that the characteristic IRa11_1(Z) of the section from the input of the FIR filter50to the input terminal31and the characteristic IRa11_2(Z) of the section from the input of the FIR filter51to the input terminal31each have a characteristic of canceling each other. As a result, it can be seen that IR2′(Z) may be set as the filter coefficients of the FIR filter50and −IR1′(Z) obtained by inverting the phase of IR1′(Z) may be set as the filter coefficients of the FIR filter51.

By setting the filter coefficients of the FIR filters50and51as above, the differential amplifying circuit12can cancel the signal traveling on the path A using the signal traveling on the path B. As a result, the above echoes generated when the digital signal is inputted into the input terminal30can be prevented.

As shown inFIG. 1, by acquiring the impulse response IR1′(Z) while the earphone microphone20is connected, and setting IR1′(Z) as the filter coefficients of the FIR filter51, effective echo prevention can be executed corresponding to the transfer characteristic of the earphone microphone20. By acquiring the impulse response IR1′(Z) while the earphone microphone20connected is set to the ear by inserting the earphone microphone20into the earhole or covering the ear pinna with the earphone microphone20, and setting IR1′(Z) as the filter coefficients of the FIR filter51, effective echo prevention can be executed corresponding to the transfer characteristic of the earphone microphone20and the transfer characteristic of the interior of the ear of the user. The filter coefficients of the FIR filter51can be set based on the impulse response IR1′(Z) that is acquired while the earphone microphone20is not connected.

Filter Coefficients Setting Process

When the magnitude of each of the impulses outputted respectively from the output terminal32and33is too small, the precision of the impulse responses IR1′(Z) and IR2′(Z) is degraded by the background noises, the circuit noises, etc. When the magnitude of each of the impulses is too large, the impulses overflow in the AD converter and, therefore, the impulse responses IR1′(Z) and IR2′(Z) can not be acquired accurately. Therefore, the DSP3acquires the impulse responses IR1′(Z) and IR2′(Z) each having the proper magnitude by adjusting the magnitude of the impulse and sets the filter coefficients of the FIR filters50and51based on the impulse responses IR1′(Z) and IR2′(Z) each having the proper magnitude.

FIG. 3depicts a flowchart of an example of a process to set the filter coefficients of the FIR filter50. The impulse response acquiring unit60sets the initial value of an impulse imp(n) (n=0 to N) (S301). The initial value of imp(n) may be, for example, imp(0)=0×1,800, imp(1) to imp(N)=0, and N=128. “0×” indicates that the number therewith is represented in the hexadecimal numeration system. The impulse response acquiring unit60acquires an impulse response ir2′(n) by outputting an impulse imp(n) from the output terminal33(S302). The impulse response acquiring unit60detects the maximal value Imax of the acquired impulse response ir2′(n) (S303). The maximal value Imax is the maximum of the absolute value of each of the signals constituting the impulse response ir2′(n) as shown inFIGS. 4A to 4C.

The impulse response acquiring unit60judges how many bits Imax has (S304). That is, assuming that the AD converter5has the precision of, for example, 16 bits, the impulse response acquiring unit60judges whether Imax is equal to or larger than 8,192 and equal to or smaller than 16,383 (15 bits) or Imax is smaller than 8,192 (smaller than 15 bits) or larger than 16,383 (larger than 15 bits).

When Imax is equal to or larger than 8,192 and equal to or smaller than 16,383, the impulse response ir2′(n) has a proper magnitude as shown inFIG. 4A. In this case, the filter coefficient setting unit61sets −ir2′(n) obtained by inverting the phase of ir2′(n) as the filter coefficients of the FIR filter50(S305).

When Imax is smaller than 8,192, the impulse response ir2′(n) is too small as shown inFIG. 4B. The impulse response acquiring unit60obtains a value (k) that indicates by how much the impulse should be enhanced, for example, k=8,191/Imax (S306). When k is obtained, the decimal fraction portion of the obtained value is rounded down. The impulse response acquiring unit60shifts the impulse imp(n) toward the left by k bits (S307) and generates the shifted impulse imp(n) (S308). The impulse response acquiring unit60acquires again the impulse response ir2′(n) using the impulse imp(n) of which the magnitude has been adjusted (S309). That is, the impulse imp(n) has been shifted toward the left by k bits and, thereby, has been multiplied by 2k. Thereby, the impulse response ir2′(n) that has been acquired again has the proper magnitude as shown inFIG. 4A. The filter coefficient setting unit61sets −ir2′(n) obtained by inverting the phase of ir2′(n) acquired again as the filter coefficients of the FIR filter50(S305).

When Imax is larger than 16,383, the impulse response ir2′(n) overflows as shown inFIG. 4C. In this case, because the impulse response acquiring unit60does not know the extent of the overflowing, the unit60repeatedly acquires the impulse response ir2′(n) reducing stepwise the magnitude of the impulse imp(n). More specifically, the impulse response acquiring unit60shifts the impulse imp(n) toward the right by, for example, one bit (S310) and generates the shifted impulse imp(n) (S311). The impulse response acquiring unit60acquires again the impulse response ir2′(n) using the impulse imp(n) that has been shifted toward the right by one bit and of which the magnitude has been reduced to one half of the original magnitude thereof (S312). The impulse response acquiring unit60judges whether Imax of the impulse response ir2′(n) acquired again is larger than 16,383 (S313). When the impulse response ir2′(n) is larger than 16,383 (S313: YES), the process of shifting of the impulse imp(n) toward the right and re-acquiring of the impulse response ir2′(n) (S310to S312) is repeatedly executed. When Imax is equal to or smaller than 16,383 (S313: NO), the impulse response ir2′(n) acquired again has a proper magnitude as shown inFIG. 4A. The filter coefficient setting unit61sets −ir2′(n) obtained by inverting the phase of the impulse response ir2′(n) acquired again as the filter coefficients of the FIR filter50.

A process to set the filter coefficients of the FIR filter51is executed.FIG. 5depicts a flowchart of an example of a process to set the filter coefficients of the FIR filter51. The impulse response acquiring unit60sets the magnitude of the impulse imp(n) to be the magnitude set when the impulse response ir2′(n) has been acquired last (S501). The impulse response acquiring unit60acquires the impulse response ir1′(n) by outputting impulse imp(n) from the output terminal32(S502). The impulse response acquiring unit60detects the maximum Imax of the impulse response ir1′(n) acquired again (S503) and sets the initial value “zero” as a variable m that indicates the amount by which the impulse is to be adjusted (S504).

The impulse response acquiring unit60judges how many bits Imax has (S505). That is, assuming that the AD converter5has the precision of, for example, 16 bits, the impulse response acquiring unit60judges whether Imax is equal to or larger than 8,192 and equal to or smaller than 16,383 (15 bits) or Imax is smaller than 8,192 (smaller than 15 bits) or larger than 16,383 (larger than 15 bits).

When Imax is equal to or larger than 8,192 and equal to or smaller than 16,383, the impulse response ir1′(n) has a proper magnitude as shown inFIG. 4A. In this case, the filter coefficient setting unit61sets ir1′(n) obtained as the filter coefficients of the FIR filter51(S506).

When Imax is smaller than 8,192, the impulse response ir1′(n) is too small as shown inFIG. 4B. The impulse response acquiring unit60obtains a value (k) that indicates by how much the impulse should be enhanced, for example, k=8,191/Imax (S507). When k is obtained, the decimal fraction portion of the obtained value is rounded down. The impulse response acquiring unit60shifts the impulse imp(n) toward the left by k bits (S508) and generates the shifted impulse imp(n) (S509). The impulse response acquiring unit60acquires again the impulse response ir1′(n) using the impulse imp(n) of which the magnitude has been adjusted (S510). That is, the impulse imp(n) has been shifted toward the left by k bits and, thereby, has been multiplied by 2k. Thereby, the impulse response ir1′(n) that has been acquired again has the proper magnitude as shown inFIG. 4A. The filter coefficient setting unit61sets ir1′(n) acquired again as the filter coefficients of the FIR filter51(S506).

When Imax is larger than 16,383, the impulse response ir1′(n) overflows as shown inFIG. 4C. In this case, because the impulse response acquiring unit60does not know the extent of the overflowing, the unit60repeatedly acquires the impulse response ir1′(n) reducing stepwise the magnitude of the impulse imp(n). More specifically, the impulse response acquiring unit60shifts the impulse imp(n) toward the right by, for example, one bit (S511), counts up the variable m (S512), and generates the shifted impulse imp(n) (S513). The impulse response acquiring unit60acquires again the impulse response ir1′(n) using the impulse imp(n) that has been shifted toward the right by one bit and of which the magnitude has been reduced to one half of the original magnitude thereof (S514). The impulse response acquiring unit60judges whether Imax of the impulse response ir1′(n) acquired again is larger than 16,383 (S515). When the impulse response ir1′(n) is larger than 16,383 (S515: YES), the process of shifting of the impulse imp(n) toward the right and re-acquiring of the impulse response ir1′(n) (S511to S514) is repeatedly executed. When Imax is equal to or smaller than 16,383 (S515: NO), the impulse response ir1′(n) acquired again has a proper magnitude as shown inFIG. 4A. The filter coefficient setting unit61sets ir1′(n) acquired again as the filter coefficients of the FIR filter51.

When the magnitude of the impulse imp(n) employed when the impulse response ir1′(n) has been acquired and that employed when the impulse response ir2′(n) has been acquired differ from each other, the signal level of the signal inputted into the differential amplifying circuit12needs to be adjusted to set IRa11_2(Z) as IRa11_2(Z)=−IRa11_1(Z) as above. For example, when the impulse imp(n) is shifted toward the left by k bits in the case where the impulse response ir1′(n) is acquired, the signal level adjusting unit62outputs from the output terminal33the signal outputted from the FIR filter51after shifting this signal toward the right by k bits or outputs from the output terminal32the signal outputted from the FIR filter50after shifting this signal toward the left by k bits.

When the impulse imp(n) is shifted toward the right by m bits in the case where the impulse response ir1′(n) is acquired, the signal level adjusting unit62outputs from the output terminal33the signal outputted from the FIR filter51after shifting this signal toward the left by m bits or outputs from the output terminal32the signal outputted from the FIR filter50after shifting this signal toward the right by m bits.

By adjusting the filter coefficients set for the FIR filters50and51, the signal level of the signals outputted from the output terminals32and33can be adjusted. For example, when the impulse imp(n) is shifted toward the left by k bits in the case where the impulse response ir1′(n) is acquired, the signal level adjusting unit62shifts the acquired impulse response ir1′(n) toward the right by k bits and the filter coefficient setting unit61sets the impulse response ir1′(n) that has been shifted toward the right by k bits as the filter coefficients of the FIR filter51and, thereby, the signal level of the signal outputted from the output terminal33can be adjusted. Otherwise, in this case, the signal level adjusting unit62shifts the acquired impulse response ir2′(n) toward the left by k bits and the filter coefficient setting unit61sets the impulse response ir2′(n) that has been shifted toward the left by k bits as the filter coefficients of the FIR filter50and, thereby, the signal level of the signal outputted from the output terminal32can be adjusted.

For example, when the impulse imp(n) is shifted toward the right by m bits in the case where the impulse response ir1′(n) is acquired, the signal level adjusting unit62shifts the acquired impulse response ir1′(n) toward the left by m bits and the filter coefficient setting unit61sets the impulse response ir1′(n) that has been shifted toward the left by m bits as the filter coefficients of the FIR filter51and, thereby, the signal level of the signal outputted from the output terminal33can be adjusted. Otherwise, in this case, the signal level adjusting unit62shifts the acquired impulse response ir2′(n) toward the right by m bits and the filter coefficient setting unit61sets the impulse response ir2′(n) that has been shifted toward the right by m bits as the filter coefficients of the FIR filter50and, thereby, the signal level of the signal outputted from the output terminal32can be adjusted.

By adjusting as above the signal levels of the signals outputted respectively from the output terminals32and33based on the amount by which the impulse imp(n) employed when the impulse response ir1′(n) is acquired is to be adjusted, the relation of the above IRa11_2(Z)=−IRa11_1(Z) can be established and the echoes generated when the digital signal is inputted into the input terminal30can be prevented.

Though the relation of IRa11_2(Z)=−IRa11_1(Z) can be established by adjusting the signal levels of the signals outputted respectively from the output terminals32and33in the embodiment, the relation of IRa11_2(Z)=−IRa11_1(Z) may be established by adjusting the signal levels of the signals outputted respectively from the DA converters6and7and the amplifying circuits9and11.

Though the phase of the impulse response ir2′(n) is inverted and the phase-inverted ir2′(n) is set as the filter coefficients of the FIR filter50and the impulse response ir1′(n) is set as the filter coefficients of the FIR filter51in the embodiment, the impulse response ir2′(n) may be set as the filter coefficients of the FIR filter50and the phase of the impulse response ir1′(n) may be inverted and the phase-inverted ir1′(n) may be set as the filter coefficients of the FIR filter51.

Though the filter coefficients of the FIR filter50is firstly set based on the impulse response ir2′(n) acquired by adjusting the magnitude of the impulse imp(n) and the filter coefficients of the FIR filter51is secondly set based on the impulse response ir1′(n) acquired by adjusting the magnitude of the impulse imp(n) in the embodiment, the above order may be reversed. That is, the filter coefficients of the FIR filter51may be firstly set based on the impulse response ir1′(n) acquired by adjusting the magnitude of the impulse imp(n) and the filter coefficients of the FIR filter50may be secondly set based on the impulse response ir2′(n) acquired by adjusting the magnitude of the impulse imp(n). In this case, the signal level adjusting unit62may adjust the signal levels of the signals outputted respectively from the output terminals32and33based on the amount by which the impulse imp(n) employed when the impulse response ir2′(n) is acquired is to be adjusted.

Application of Echo Preventing Circuit

Description will be given for an application of the echo preventing circuit.FIG. 6depicts a schematic view of a mobile phone70applied with the echo preventing circuit1.FIG. 7depicts a block diagram of an example of the configuration of the mobile phone70shown inFIG. 6. As shown inFIGS. 6 and 7, the mobile phone70is connected to an earphone microphone20. Though the earphone microphone20and the mobile phone70are connected being wired, the earphone20and the phone70may be connected by wireless.

The mobile phone70includes the echo preventing circuit1, an antenna71, an RF (Radio Frequency) unit72, a base-band processing unit73, a displaying unit74, a CPU75, an input unit76, an AD converter77, a DA converter78, a microphone79, and a speaker80. The configuration of the mobile phone70shown inFIG. 7is an example and a mobile phone to which the echo preventing circuit1is applied is not limited to the mobile phone having this configuration.

The antenna71receives a sound signal transmitted to the mobile phone70. The antenna71transmits the sound signal from the RF unit72.

The RF unit72executes a decoding process such as a demodulating process to the sound signal at a predetermined frequency band of the sound signal that the antenna71receives. The RF unit72executes a modulating process to the sound signal from the base-band processing unit73, for example, an encoding process under TDMA (Time Division Multiplex Access) scheme.

The base-band processing unit73applies predetermined signal processing to the sound signal demodulated to a base-band signal by the RF unit72and outputs the processed signal to the CPU75. The base-band processing unit73applies predetermined signal processing to a sound signal from the CPU75and outputs the processed signal to the RF unit72.

The CPU75controls the entire mobile phone70. To reproduce the sound corresponding to the sound signal from the base-band processing unit73using the speaker80or the earphone microphone20, the CPU75outputs the sound signal to the DA converter78. The CPU75outputs to the base-band processing unit73the sound signal from the microphone79or the earphone microphone20that is from the AD converter77. When, for example, the mobile phone70is executing packet communication, the CPU75outputs a signal to the displaying unit74to display an image based on the received packet data. The CPU75applies a predetermined process to cause the displaying unit74to display the inputted data inputted into the input unit76or to transmit the inputted data by the packet communication and outputs the data to the base-band processing unit73.

The AD converter77applies an analog-to-digital converting process to the sound signal from the microphone79or the earphone microphone20and outputs the converted digital signal to the CPU75. The DA converter78applies an digital-to-analog converting process to the sound signal from the CPU75and outputs the converted analog signal to the speaker80or the echo preventing circuit1. Description will be given hereinafter in the embodiment assuming that, when the earphone microphone20is connected to the mobile phone70, the analog signal from the DA converter78is inputted into the echo preventing circuit1.

Description will be given for the operations of the echo preventing circuit1. Description will be given hereinafter in the application assuming that the setting of the filter coefficients of the FIR filters50and51has been executed according to the above processes.

The sound signal that the antenna20receives is applied with the above processes by the components of the mobile phone70and is outputted from the DA converter78to the AD converter4of the echo preventing circuit1.

The sound signal inputted into the AD converter4is applied with analog-to-digital signal processing by the AD converter4, is converted into a digital signal, and is inputted into the FIR filters50and51through the input terminal30. An output signal outputted from the FIR filter50is inputted into the DA converter6through the output terminal32. The output signal is applied with a digital-to-analog converting process by the DA converter6, is converted into an analog signal, and is inputted into the amplifying circuit9. The analog signal inputted into the amplifying circuit9is amplified by a predetermined amplification factor and is outputted. The analog signal from the amplifying circuit9is outputted to the earphone microphone20though the input/output terminal13. As a result, the diaphragm is vibrated and sound is generated by the speaker function of the earphone microphone30. The analog signal from the amplifying circuit9is also inputted into the positive input terminal of the differential amplifying circuit12.

The output signal outputted from the FIR filter51is inputted into the DA converter through the output terminal33. The output signal is applied with a digital-to-analog converting process, is converted into an analog signal, and is inputted into the amplifying circuit11. The analog signal inputted into the amplifying circuit11is amplified by a predetermined amplification factor and is inputted into the negative input terminal of the differential amplifying circuit12.

The filter coefficients of the FIR filters50and51are set according to the above process. Therefore, the differential amplifying circuit12can cancel a signal formed by combining the analog signal (the first analog signal) outputted from the amplifying circuit9and a reflected signal of the analog signal reflected by the earphone microphone20, etc., that are inputted into the positive input terminal using the analog signal (the second analog signal) from the amplifying circuit11that is inputted into the negative input terminal. As a result, echoes generated when the digital signal is inputted into the input terminal30can be prevented. Even when the sound signal (the third analog signal) by the microphone function of the earphone microphone20, and the signal formed by combining the analog signal (the first analog signal) from the amplifying circuit9and a reflected signal of the analog signal reflected by the earphone microphone20, etc., are superposed on each other and are inputted into the positive input terminal of the differential amplifying circuit12, the signal component that causes the echoes (that is, the analog signal from the amplifying circuit9and the reflected signal of the analog signal) can be subtracted from the superposed signal by inputting the signal from the FIR filter51(the second analog signal) into the negative input terminal.

In the case where the filter coefficients of the FIR filter51is set based on the impulse response IR1′(Z) that is acquired while the earphone microphone20is not connected, the differential amplifying circuit12can cancel the analog signal (the first analog signal) outputted from the amplifying circuit9using the analog signal (the second analog signal) outputted from the amplifying circuit11.

However, as described in the embodiment, by setting the filter coefficients of the FIR filter51based on the impulse response IR1′(Z) that is acquired while the earphone microphone20is connected, the differential amplifying circuit12can cancel not only the analog signal (the first analog signal) outputted from the amplifying circuit9but also the reflected signal of the analog signal reflected by the earphone microphone20, etc., and therefore echoes can be canceled with high precision.

Though the description has been given for the case where the echo preventing circuit1is applied to the mobile phone70in the application, the application is not limited to this. The echo preventing circuit1can be applied to any apparatus that may generate the above echoes and can be applied to, for example, an IT (Information Technology) communicating apparatus (for example, a PC (Personal Computer)) and an intercommunicating apparatus (a phone, a transceiver, an on-vehicle apparatus, etc.).

The description has been given for an embodiment of the present invention. As above, the DSP3acquires the impulse response ir1′(n) having a proper magnitude by adjusting the magnitude of the impulse imp(n) and sets the filter coefficients of the FIR filter51based on the impulse response ir1′(n). That is, the impulse response ir1′(n) having a proper magnitude can be acquired regardless of the internal impedance of the earphone microphone20, the sensitivity of the speaker, the sensitivity of the microphone, or dispersion of the resistors used in the amplifying circuit9, differential amplifying circuit12, etc. caused through manufacture thereof, etc. Therefore, the echo preventing circuit1can effectively cancel the echoes.

The DSP3acquires the impulse response ir2′(n) having a proper magnitude by adjusting the magnitude of the impulse imp(n) and sets the filter coefficients of the FIR filter50based on the impulse response ir2′(n). That is, the impulse response ir2′(n) having a proper magnitude can be acquired regardless of dispersion of the resistors used in the amplifying circuit11, differential amplifying circuit12, etc. caused through manufacture thereof, etc. Therefore, the echo preventing circuit1can effectively cancel the echoes.

In the case where the magnitude of the impulse imp(n) is adjusted when the impulse response ir1′(n) is acquired, by adjusting the signal levels of the signal outputted from the FIR filter50or the FIR filter51based on the amount by which the impulse imp(n) is to be adjusted, the relation of IRa11_2(Z)=−IRa11_1(Z) can be establish.

In the case where the magnitude of the impulse imp(n) is adjusted when the impulse response ir2′(n) is acquired, by adjusting the signal levels of the signal outputted from the FIR filter50or the FIR filter51based on the amount by which the impulse imp(n) is to be adjusted, the relation of IRa11_2(Z)=−IRa11_1(Z) can be establish.

In the case where the magnitude of the impulse imp(n) is adjusted when the impulse response ir1′(n) is acquired, by varying the impulse response ir1′(n) based on the amount by which the impulse imp(n) is to be adjusted and setting the varied impulse response ir1′(n) as the filter coefficients of the FIR filter51, the relation of IRa11_2(Z)=−IRa11_1(Z) can be establish.

In the case where the magnitude of the impulse imp(n) is adjusted when the impulse response ir2′(n) is acquired, by varying the impulse response ir2′(n) based on the amount by which the impulse imp(n) is to be adjusted and setting the varied impulse response ir2′(n) as the filter coefficients of the FIR filter50, the relation of IRa11_2(Z)=−IRa11_1(Z) can be establish.

When the level of the maximum Imax of the impulse response ir1′(n) or the impulse response ir2′(n) is smaller than a predetermined level (for example, 8,192), the DSP3varies at one time the magnitude of the impulse imp(n) such that the level of Imax is equal to or larger than the predetermined level. That is, the process to set the filter coefficients can be executed at a high speed because the adjustment of the impulse (n) is executed at one time.

When the level of the maximum Imax of the impulse response ir1′(n) or the impulse response ir2′(n) is larger than a predetermined level (for example, 16,383), the DSP3reduces stepwise the magnitude of the impulse imp(n) by, for example, shifting the impulse imp(n) toward the right by one bit such that Imax is equal to or smaller than the predetermined level. That is, when the level of Imax is larger than the predetermined level, the DSP3does not know the extent of the overflowing and, therefore, the impulse response ir1′(n) or the impulse response ir2′(n) having a proper magnitude can be obtained by reducing stepwise the magnitude of the impulse imp(n).

The above embodiment and application are for facilitating understanding of the present invention and are not for interpreting limiting the present invention. The present invention can be modified and improved without departing from the purview thereof and the present invention includes equivalents thereof.

Though, for example, an impulse response obtained by generating an impulse is set as the filter coefficients of a FIR filter in the embodiment, a signal used to set the filter coefficients is not limited to an impulse. For example, the filter coefficients of a FIR filter may be set based on a response signal obtained when a step signal is generated.