DUPLEXER MEASUREMENT AND TUNING SYSTEMS

Systems and methods combine a test signal with a wanted (downlink or uplink) signal at an input of a duplexer of a communication device, and receive the test signal at an output of the duplexer. The test signal may include a radio frequency signal having less power than the wanted signal to avoid interference, or a digital signal that is added to or extracted from the wanted signal when the wanted signal does not have a radio frequency. A processor of the communication device causes the duplexer to operate in a tuning state (e.g., to transmit signals having a transmission frequency and receive signals having a receive frequency). The measurement system determines a difference or ratio in power between the test signal at the duplexer output and the duplexer input, and adjusts the tuning state based on the difference or ratio (e.g., to decrease or minimize the difference or ratio).

BACKGROUND

The present disclosure relates generally to wireless communication, and more specifically to isolation of wireless signals between transmitters and receivers in wireless communication devices.

In an electronic device, a transmitter and a receiver may each be coupled to one or more antennas to enable the electronic device to both transmit and receive wireless signals. The electronic device may include a duplexer that isolates the transmitter from received signals of a first frequency range, and isolates the receiver from transmission signals of a second frequency range (e.g., thus implementing frequency division duplex (1-13D) operations). In this manner, interference between the transmission and received signals may be reduced when communicating using the electronic device. However, these communications may be negatively impacted by insertion loss resulting from components of the duplexer providing less than ideal isolation of the transmission and/or received signals.

SUMMARY

In one embodiment, an electronic device includes a memory storing a tuning state, an antenna that receives a first signal, a receiver, a duplexer including a tunable component having multiple tuning states, a combiner coupled to the antenna and the duplexer, a splitter coupled to the duplexer and the receiver, and a processor coupled to the combiner and the splitter. The processor combines a second signal with the downlink signal at the combiner to generate a combined signal, receives the combined signal at the splitter, and adjusts the tuning state based on the combined signal.

In another embodiment, a method includes configuring, via processing circuitry, a tunable component of a duplexer with a tuning state. The method also includes combining, at an input of the duplexer, a first signal with a second signal to generate a combined signal. The method further includes receiving, at an output of the duplexer, the combined signal. The method also includes adjusting, via the processing circuitry, the tuning state based on the combined signal.

In yet another embodiment, a radio frequency front end includes an antenna, a transmitter that transmits a first signal, a duplexer including a tunable component having multiple tuning states, a combiner coupled the transmitter and the duplexer, a splitter coupled to the duplexer and the antenna, and a processor coupled to the combiner and the splitter. The processor combines a second signal with the first signal at the combiner to generate a combined signal, receives the combined signal at the splitter, and adjusts the tunable component based on the combined signal.

DETAILED DESCRIPTION OF SPECIFIC EMBODIMENTS

When introducing elements of various embodiments of the present disclosure, the articles “a,” “an,” and “the” are intended to mean that there are one or more of the elements. The terms “comprising,” “including,” and “having” are intended to be inclusive and mean that there may be additional elements other than the listed elements. Additionally, it should be understood that references to “one embodiment” or “an embodiment” of the present disclosure are not intended to be interpreted as excluding the existence of additional embodiments that also incorporate the recited features. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. Use of the terms “approximately,” “near,” “about,” “close to,” and/or “substantially” should be understood to mean including close to a target (e.g., design, value, amount), such as within a margin of any suitable or contemplatable error (e.g., within 0.1% of a target, within 1% of a target, within 5% of a target, within 10% of a target, within 25% of a target, and so on). Moreover, it should be understood that any exact values, numbers, measurements, and so on, provided herein, are contemplated to include approximations (e.g., within a margin of suitable or contemplatable error) of the exact values, numbers, measurements, and so on. Additionally, the term “set” may include one or more. That is, a set may include a unitary set of one member, but the set may also include a set of multiple members.

This disclosure is directed to isolating wireless signals between a transmitter and a receiver in a wireless communication device using a duplexer (e.g., an electrical balanced duplexer (EBD), a phase balanced duplexer (PBD), Wheatstone balanced duplexer (WBD), a double balanced duplexer (DBD), a circular balanced duplexer (CBD), or any other duplexer used to isolate wireless signals between transmitters and receivers). A tunable duplexer includes components that may be adjusted or tuned (e.g., phase shifters and/or impedance tuners) to alter isolation performance and insertion loss (e.g., loss resulting from the components of the duplexer providing less than ideal isolation of the transmission and/or received signals) between the transmitter, the receiver, and/or one or more antennas coupled to the transmitter and the receiver.

In particular, these tunable components may be tuned or adjusted to different tuning states to enable the transmitter to transmit and/or the receiver to receive signals over different frequencies and bandwidths (enabling multi-band tenability). The tuning states may be stored in, and/or received or retrieved from a data structure (e.g., a lookup table) of the device, generated via a machine-learning model, a tuning algorithm, a state machine, a control loop, and so on. Each tuning state may provide a different isolation and insertion loss (e.g., different key performance indicators). It may be desired to determine a tuning state for given transmission and receive frequencies that enable better or the best isolation performance (e.g., the highest isolation, approaching infinite isolation) and better or the best insertion loss (e.g., the least insertion loss, zero decibel (dB) insertion loss). However, it may be difficult to measure the isolation and insertion loss performance, as a measurement system of the communication device may combine test or measurement signals (e.g., pilot tones) used for measurement with “wanted” transmission or receive signals, and, because the test signals may have similar frequencies and/or power as the transmission and receive signals, the signals may interfere with each other, resulting in inaccurate measurement or destruction of the wanted signals, thus impairing or preventing further usage of the wanted signals.

Systems and methods are disclosed that combine a test signal with a wanted signal at an input of a duplexer of a communication device, and receive the test signal at an output of the duplexer. It should be understood that any input of the duplexer may be treated as an output of the duplexer, and vice versa. As such, a measurement system that generates the test signal may be external to the duplexer. The measurement system may be coupled to the duplexer input at a first node shared by one of a receiver, a transmitter, or an antenna of the communication device, and coupled to the duplexer output at a second node shared by another one, or even the same one, of the receiver, the transmitter, or the antenna. As such, the test signal may include a radio frequency signal having less power than the wanted signal to avoid interference, but a same or similar frequency as the wanted signal. In additional or alternative embodiments, the test signal may include a digital signal (e.g., in-phase and/or quadrature signals) that is added to or extracted from the wanted signal when the wanted signal does not have a radio frequency (e.g., has a baseband or intermediate frequency). A processor of the communication device may cause the duplexer to operate in a tuning state (e.g., to transmit signals having a transmission frequency and receive signals having a receive frequency). The measurement system may determine a difference (e.g., a power difference) between the test signal at the duplexer output and the duplexer input, and adjust the tuning state based on the difference (e.g., to decrease or minimize the difference), as the difference indicates isolation or insertion loss performance of the duplexer.

In some embodiments, the measurement system may include a transmitter, a receiver, or a transceiver (having both the transmitter and the receiver) having one or more amplifiers (e.g., one or more power amplifiers, a low noise amplifier) to amplify the test signal. In one embodiment, the measurement system may include averaging logic (e.g., software, hardware, or both) that increases power (e.g., greater than the wanted signal) of the test signal by averaging multiple measurements of a signal combining the test signal and the wanted signal. This may enable the measurement system to more easily detect and extract the test signal from the combined signal.

In some embodiments, the measurement system may include code spreading logic (e.g., software, hardware, or both) that applies code spreading (e.g., via a pseudo-random code, such as Gold code, Walsh code, or any other code-division multiple access (CDMA) code or pseudo-random noise sequence) to the test signal prior to combining with the wanted signal, causing the test signal to be spread over a wider bandwidth having lower power compared to the wanted signal. The measurement system may also include code de-spreading logic that applies code de-spreading to the combined signal, which may cause the test signal to de-spread over a narrower bandwidth having higher power and cause the wanted signal to spread over a wider bandwidth having lower power. The measurement system may then more easily detect and extract the test signal from the combined signal.

In additional or alternative embodiments, the test signal may include an orthogonal frequency-division modulation (OFDM) signal. Advantageously, the OFDM signal may include multiple tones that are independent and may be combined without interference. Moreover, because the OFDM signal is similar to certain cellular signals (e.g., fourth generation (4G) or fifth generation (5G) cellular signals), the communication device may implement the OFDM signal as the test signal without additional or with minimal additional hardware or logic. In particular, the test signal may prevent the multiple, individual tones from interfering with one another.

In this manner, the disclosed systems and methods may measure performance (e.g., isolation and insertion loss) of a duplexer of a communication device, while avoiding inaccuracies caused by interference between test signals and wanted transmission and/or receive signals, and adjust tuning states of the duplexer in real-time (e.g., while the communication device is in operation). In particular, the disclosed systems and methods may measure the performance of the duplexer and dynamically provide tuning state adjustments based on real-time measurements (which may reflect changes in operation of the communication device due to aging of components, obstructions to the antenna, signal quality or power changes, and so on).

With the foregoing in mind,FIG.1is a block diagram of an electronic device10, according to embodiments of the present disclosure. The electronic device10may include, among other things, one or more processors12(collectively referred to herein as a single processor for convenience, which may be implemented in any suitable form of processing circuitry), memory14, nonvolatile storage16, a display18, input structures22, an input/output (I/O) interface24, a network interface26, and a power source29. The various functional blocks shown inFIG.1may include hardware elements (including circuitry), software elements (including machine-executable instructions) or a combination of both hardware and software elements (which may be referred to as logic). The processor12, memory14, the nonvolatile storage16, the display18, the input structures22, the input/output (I/O) interface24, the network interface26, and/or the power source29may each be communicatively coupled directly or indirectly (e.g., through or via another component, a communication bus, a network) to one another to transmit and/or receive signals between one another. It should be noted thatFIG.1is merely one example of a particular implementation and is intended to illustrate the types of components that may be present in the electronic device10.

By way of example, the electronic device10may include any suitable computing device, including a desktop or notebook computer (e.g., in the form of a MacBook®, MacBook® Pro, MacBook Air®, iMac®, Mac® mini, or Mac Pro® available from Apple Inc. of Cupertino, California), a portable electronic or handheld electronic device such as a wireless electronic device or smartphone (e.g., in the form of a model of an iPhone® available from Apple Inc. of Cupertino, California), a tablet (e.g., in the form of a model of an iPad® available from Apple Inc. of Cupertino, California), a wearable electronic device (e.g., in the form of an Apple Watch® by Apple Inc. of Cupertino, California), and other similar devices. It should be noted that the processor12and other related items inFIG.1may be embodied wholly or in part as software, hardware, or both. Furthermore, the processor12and other related items inFIG.1may be a single contained processing module or may be incorporated wholly or partially within any of the other elements within the electronic device10. The processor12may be implemented with any combination of general-purpose microprocessors, microcontrollers, digital signal processors (DSPs), field programmable gate array (FPGAs), programmable logic devices (PLDs), controllers, state machines, gated logic, discrete hardware components, dedicated hardware finite state machines, or any other suitable entities that may perform calculations or other manipulations of information. The processors12may include one or more application processors, one or more baseband processors, or both, and perform the various functions described herein.

In the electronic device10ofFIG.1, the processor12may be operably coupled with a memory14and a nonvolatile storage16to perform various algorithms. Such programs or instructions executed by the processor12may be stored in any suitable article of manufacture that includes one or more tangible, computer-readable media. The tangible, computer-readable media may include the memory14and/or the nonvolatile storage16, individually or collectively, to store the instructions or routines. The memory14and the nonvolatile storage16may include any suitable articles of manufacture for storing data and executable instructions, such as random-access memory, read-only memory, rewritable flash memory, hard drives, and optical discs. In addition, programs (e.g., an operating system) encoded on such a computer program product may also include instructions that may be executed by the processor12to enable the electronic device10to provide various functionalities.

In certain embodiments, the display18may facilitate users to view images generated on the electronic device10. In some embodiments, the display18may include a touch screen, which may facilitate user interaction with a user interface of the electronic device10. Furthermore, it should be appreciated that, in some embodiments, the display18may include one or more liquid crystal displays (LCDs), light-emitting diode (LED) displays, organic light-emitting diode (OLED) displays, active-matrix organic light-emitting diode (AMOLED) displays, or some combination of these and/or other display technologies.

The input structures22of the electronic device10may enable a user to interact with the electronic device10(e.g., pressing a button to increase or decrease a volume level). The I/O interface24may enable electronic device10to interface with various other electronic devices, as may the network interface26. In some embodiments, the I/O interface24may include an I/O port for a hardwired connection for charging and/or content manipulation using a standard connector and protocol, such as the Lightning connector provided by Apple Inc. of Cupertino, California, a universal serial bus (USB), or other similar connector and protocol. The network interface26may include, for example, one or more interfaces for a personal area network (PAN), such as an ultra-wideband (UWB) or a BLUETOOTH® network, a local area network (LAN) or wireless local area network (WLAN), such as a network employing one of the IEEE 802.11x family of protocols (e.g., WI-FI®), and/or a wide area network (WAN), such as any standards related to the Third Generation Partnership Project (3GPP), including, for example, a 3rdgeneration (3G) cellular network, universal mobile telecommunication system (UMTS), 4thgeneration (4G) cellular network, long term evolution (LTE®) cellular network, long term evolution license assisted access (LTE-LAA) cellular network, 5thgeneration (5G) cellular network, and/or New Radio (NR) cellular network, a 6thgeneration (6G) or greater than 6G cellular network, a satellite network, a non-terrestrial network, and so on. In particular, the network interface26may include, for example, one or more interfaces for using a cellular communication standard of the 5G specifications that include the millimeter wave (mmWave) frequency range (e.g., 24.25-300 gigahertz (GHz)) that defines and/or enables frequency ranges used for wireless communication. The network interface26of the electronic device10may allow communication over the aforementioned networks (e.g., 5G, Wi-Fi, LTE-LAA, and so forth).

The network interface26may also include one or more interfaces for, for example, broadband fixed wireless access networks (e.g., WIMAX®), mobile broadband Wireless networks (mobile WIMAX®), asynchronous digital subscriber lines (e.g., ADSL, VDSL), digital video broadcasting-terrestrial (DVB-T®) network and its extension DVB Handheld (DVB-H®) network, ultra-wideband (UWB) network, alternating current (AC) power lines, and so forth.

As illustrated, the network interface26may include a transceiver30. In some embodiments, all or portions of the transceiver30may be disposed within the processor12. The transceiver30may support transmission and receipt of various wireless signals via one or more antennas, and thus may include a transmitter and a receiver. The power source29of the electronic device10may include any suitable source of power, such as a rechargeable lithium polymer (Li-poly) battery and/or an alternating current (AC) power converter.

FIG.2is a functional diagram of the electronic device10ofFIG.1, according to embodiments of the present disclosure. As illustrated, the processor12, the memory14, a radio frequency front end (RFFE)50having the transceiver30, which includes a transmitter52and a receiver53, and isolation circuitry54, and/or antennas55(illustrated as55A-55N, collectively referred to as an antenna55) may be communicatively coupled directly or indirectly (e.g., through or via another component, a communication bus, a network) to one another to transmit and/or receive signals between one another.

The transmitter52and/or the receiver53may respectively enable transmission and reception of signals between the electronic device10and an external device via, for example, a network (e.g., including base stations or access points) or a direct connection. As illustrated, the transmitter52and the receiver53may be combined into the transceiver30. The electronic device10may also have one or more antennas55A-55N electrically coupled to the transceiver30via the isolation circuitry54. The antennas55A-55N may be configured in an omnidirectional or directional configuration, in a single-beam, dual-beam, or multi-beam arrangement, and so on. Each antenna55may be associated with a one or more beams and various configurations. In some embodiments, multiple antennas of the antennas55A-55N of an antenna group or module may be communicatively coupled a respective transceiver30and each emit radio frequency signals that may constructively and/or destructively combine to form a beam. The electronic device10may include multiple transmitters, multiple receivers, multiple transceivers, and/or multiple antennas as suitable for various communication standards. In some embodiments, the transmitter52and the receiver53may transmit and receive information via other wired or wireline systems or means.

The RFFE50may include components of the electronic device10that receive as input, output, and/or process signals having radio frequency, including at least some components (e.g., the power amplifier66, the filter68) of the transmitter52, at least some components (e.g., the low noise amplifier82, the filter84) of receiver53, and the isolation circuitry54. As illustrated, the isolation circuitry54is communicatively coupled between the transmitter52and the receiver53, as well as the one or more antennas55. The isolation circuitry54enables signals (e.g., transmission signals) of a first frequency range from the transmitter52to pass through to the one or more antennas55and blocks the signals of the first frequency range from passing through to the receiver53. The isolation circuitry54also enables signals (e.g., received signals) of a second frequency range received via the one or more antennas55to pass through to the receiver53and blocks the received signals of the second frequency range from passing through to the transmitter52. Each frequency range may be of any suitable bandwidth, such as between 0 and 100 gigahertz (GHz) (e.g., 10 megahertz (MHz)), and include any suitable frequencies. For example, the first frequency range (e.g., a transmit frequency range) may be between 880 and 890 MHz, and the second frequency range (e.g., a receive frequency range) may be between 925 and 936 MHz.

As illustrated, the various components of the electronic device10may be coupled together by a bus system56. The bus system56may include a data bus, for example, as well as a power bus, a control signal bus, and a status signal bus, in addition to the data bus. The components of the electronic device10may be coupled together or accept or provide inputs to each other using some other mechanism.

The isolation circuitry54may include tunable components57that may be adjusted or tuned, such as impedance tuners and/or phase shifters (e.g., including variable resistive devices such as variable resistors, variable inductive devices such as variable inductors, variable capacitive devices such as variable capacitors, and so on) to alter isolation performance and insertion loss (e.g., loss resulting from the components of the isolation circuitry54between the transmitter52, the receiver53, and/or the antenna55). In particular, the processor12may adjust or tune the tunable components57based on tuning states58stored in the memory14and/or the storage16. The tuning states58may include different configurations of the tunable components57stored in a data structure saved in the memory14that enable a target isolation range and target insertion loss range associated with the transmitter52, the receiver53, and/or the antenna55. A tuning algorithm59, which may also be stored in the memory14and/or the storage16, and be executed by the processor12, may include one or more algorithms that, when performed, enable the processor12to adjust the tuning states58to better achieve the target isolation range and target insertion loss range associated with the transmitter52, the receiver53, and/or the antenna55.

FIG.3is a schematic diagram of the RFFE50of the electronic device10, according to embodiments of the present disclosure. As described above, the RFFE50includes the isolation circuitry54that isolates the transmitter52from received signals of a first frequency range, and isolates the receiver53from transmission signals of a second frequency range. Due to a non-ideal nature of components of the isolation circuitry54, when isolating the receiver53from a transmission signal generated by the transmitter52, some of the transmission signal (e.g., a transmit leakage signal) may propagate toward the receiver53. If a frequency of the transmit leakage signal is within the receive frequency range (e.g., is a frequency supported by the receiver53), the transmit leakage signal may interfere with a receive signal and/or the receiver53. Similarly, when isolating the transmitter52from a received signal received via the one or more antennas55, some of the received signal (e.g., a receive leakage signal) may propagate toward the transmitter52. If a frequency of the receive leakage signal is within the transmit frequency range (e.g., is a frequency supported by the transmitter52), the receive leakage signal may interfere with the transmit signal and/or the transmitter52. These leakage signals may be referred to as insertion loss.

FIG.4is a schematic diagram of the transmitter52(e.g., transmit circuitry), according to embodiments of the present disclosure. As illustrated, the transmitter52may receive outgoing data60in the form of a digital signal to be transmitted via the one or more antennas55. A digital-to-analog converter (DAC)62of the transmitter52may convert the digital signal to an analog signal, and a modulator64may combine the converted analog signal with a carrier signal to generate a radio wave. A power amplifier (PA)66receives the modulated signal from the modulator64. The power amplifier66may amplify the modulated signal to a suitable level to drive transmission of the signal via the one or more antennas55. A filter68(e.g., filter circuitry and/or software) of the transmitter52may then remove undesirable noise from the amplified signal to generate transmitted signal70to be transmitted via the one or more antennas55. The filter68may include any suitable filter or filters to remove the undesirable noise from the amplified signal, such as a bandpass filter, a bandstop filter, a low pass filter, a high pass filter, and/or a decimation filter.

The power amplifier66and/or the filter68may be referred to as part of a radio frequency front end (RFFE)69, and more specifically, a transmit front end (TXFE) of the electronic device10. Additionally, the transmitter52may include any suitable additional components not shown, or may not include certain of the illustrated components, such that the transmitter52may transmit the outgoing data60via the one or more antennas55. For example, the transmitter52may include a mixer and/or a digital up converter. As another example, the transmitter52may not include the filter68if the power amplifier66outputs the amplified signal in or approximately in a desired frequency range (such that filtering of the amplified signal may be unnecessary).

FIG.5is a schematic diagram of the receiver53(e.g., receive circuitry), according to embodiments of the present disclosure. As illustrated, the receiver53may receive received signal80from the one or more antennas55in the form of an analog signal. A low noise amplifier (LNA)82may amplify the received analog signal to a suitable level for the receiver53to process. A filter84(e.g., filter circuitry and/or software) may remove undesired noise from the received signal, such as cross-channel interference. The filter84may also remove additional signals received by the one or more antennas55that are at frequencies other than the desired signal. The filter84may include any suitable filter or filters to remove the undesired noise or signals from the received signal, such as a bandpass filter, a bandstop filter, a low pass filter, a high pass filter, and/or a decimation filter. The low noise amplifier82and/or the filter84may be referred to as part of the RFFE69, and more specifically, a receiver front end (RXFE) of the electronic device10.

A demodulator86may remove a radio frequency envelope and/or extract a demodulated signal from the filtered signal for processing. An analog-to-digital converter (ADC)88may receive the demodulated analog signal and convert the signal to a digital signal of incoming data90to be further processed by the electronic device10. Additionally, the receiver53may include any suitable additional components not shown, or may not include certain of the illustrated components, such that the receiver53may receive the received signal80via the one or more antennas55. For example, the receiver53may include a mixer and/or a digital down converter.

FIG.6is a circuit diagram of the RFFE50having a duplexer100that isolates the transmitter52from received signals of a first frequency range, and isolates the receiver53from transmission signals of a second frequency range, according to embodiments of the present disclosure. The duplexer100may be an example of the isolation circuitry54, and is illustrated as an electrical balanced duplexer, though the isolation circuitry54may include any suitable duplexer used to isolates wireless signals between the transmitter52and the receiver53, such as a phase balanced duplexer (PBD), Wheatstone balanced duplexer (WBD), a double balanced duplexer (DBD), a circular balanced duplexer (CBD), and so on.

The electrical balancer duplexer100may use electrical balancing in hybrid junctions to isolate wireless signals between the transmitter52and the receiver53. As shown, a power amplifier (PA)66of the transmitter52, a low noise amplifier (LNA)82of the receiver53, one or more antennas55, and an impedance tuner102, may each be connected to different terminals of a four-port hybrid junction104. Isolation between the transmitter52and the receiver53may be increased or achieved when an impedance of the impedance tuner102and an impedance of the antenna(s)55are the same. The impedance tuner102may include the tunable components57described above with respect toFIGS.2and3. The duplexer100includes a hybrid transformer106, formed with a first inductor108and second inductor110coupled to the antenna(s)55. This portion of the hybrid transformer106may make up a transmitter port112. A third inductor114may be magnetically coupled to the first and second inductors108,110of the hybrid transformer106, and this portion of the hybrid transformer106may make up a receiver port116. The hybrid transformer106may couple the transmitter52and the receiver53to the antenna(s)55while maintaining a level of isolation between the power amplifier66and low noise amplifier82.

As another example, in the case where the duplexer100is a phase-balanced duplexer instead of the electrical-balanced duplexer, one or more phase shifters having the tunable components57may be adjusted to perform isolation between the transmitter52and the receiver53, instead of the impedance tuner102. Similarly, for other types of duplexers (e.g., a Wheatstone balanced duplexer, a double balanced duplexer, a circular balanced duplexer), other adjustable devices may be used to perform isolation between the transmitter52and the receiver53that may include the tunable components57.

However, insertion loss may occur from transmission signals transmitted from the transmitter52to the antenna(s)55leaking into the receiver53and/or received signals received at the antenna(s) leaking to the transmitter52, due to components (e.g., the impedance tuner102, phase shifters, or the like) of the duplexer100not acting in an ideal or as-designed manner. This may be due to environmental factors (e.g., temperature surrounding the electronic device10, obstructions to the antenna(s)), age of the duplexer100, manufacturing imperfections of the components of the duplexer100, and so on. The duplexer100may be tunable, such that certain components of the duplexer100, such as the tunable components57of the impedance tuner102, may be adjusted or tuned to alter isolation performance and insertion loss, thus compensating for non-ideal behavior of the components.

However, it may be difficult to measure the isolation and insertion loss performance (e.g., key performance indicators) of the duplexer100, as a measurement system of the electronic device10may combine test or measurement signals (e.g., pilot tones) used for measurement with “wanted” transmission (e.g., uplink) or receive (e.g., downlink) signals, and, because the test signals may have similar frequencies and/or power as the transmission and receive signals, the signals may interfere with each other, resulting in inaccurate measurement or unusability of the wanted signal. In particular, measurement may occur for each tuning state58of the tunable components57. And not only should the measurement system be in operation when testing or manufacturing the electronic device10, but also as the electronic device10is in operation (e.g., when a user uses the electronic device10). For example, it is desirable for the measurement system to determine the key performance indicators as the electronic device10is in use, as the key performance indicators may change over time (e.g., due to aging or imperfections of components of the electronic device10) or in real-time (e.g., due to environmental factors such as temperature, obstruction of the antenna55due to real world objects, such as trees, buildings, a body part of the user, and so on), and adjusting the tuning state58of the tunable components57(e.g., by the tuning algorithm59) may enable better isolation and insertion loss, and thus better communication performance and user experience.

As such, the electronic device10may be in use, and, more particularly, transmitting signals having a transmission frequency and receiving signals having a receive frequency, to place the tunable components57in a tuning state58. Ideally, the test signal may mimic or copy these wanted signals in both frequency and power, while the tunable components57are in the tuning state58, as the measurement system should measure how the electronic device10actually operates. The measurement system may then determine a difference (e.g., a power difference) of the test signal as it is originally input and as measured, to determine the key performance indicators, and the tuning algorithm59may adjust the tuning state58based on the difference. However, if the test signal is the same in both frequency and power as a wanted signal, there may be interference between the two signals. It is undesirable for measurement of the key performance indicators of the duplexer100to interfere with these wanted signals, as that would impair communication performance of the electronic device10, and negatively impact user experience. Moreover, it would be undesirable for the wanted signals to impair the test signals, as this may result in inaccurate measurements of the key performance indicators.

Instead, the disclosed embodiments combine a test signal with a wanted signal at an input of the duplexer100of the electronic device10, and receive the test signal at an output of the duplexer100, wherein the test signal may have less power than the wanted signal.FIG.7is a schematic diagram of the RFFE50having a measurement system130coupled to the antenna55and the receiver53to determine receiver insertion loss, according to embodiments of the present disclosure. The measurement system130may be implemented as hardware (e.g., circuitry), software (e.g., instructions stored in the memory14and/or the storage16and executable by the processor12), or both (e.g. logic). As illustrated, the measurement system130is external to the duplexer100, and, as such, may not be reliant on a type of the duplexer100(e.g., EBD, PBD, WBD, DBD, CBD, and so on) to determine performance of the duplexer100. Moreover, if the measurement system130were to be internal to the duplexer100, injecting a test signal within the duplexer100may result in the undesirable interference between the test signal and a wanted signal, resulting in poor user experience due to a corrupted wanted signal and/or inaccurate measurements from a corrupted test signal. That said, the measurement system130may be implemented as part of the transceiver30, or external to the transceiver30.

As illustrated, the measurement system130injects a test signal132into a downlink wanted signal134(e.g., a receive signal received at the antenna55) at combiner136, which is disposed between the antenna55and the duplexer100. The test or measurement signal132may include any signal (e.g., a pilot tone, a single tone signal, a multi-tone signal) having a power and frequency that the measurement system130is aware of (e.g., stores in the memory14, the storage16, and so on), such that the measurement system130may subsequently compare to the test signal132when output by the duplexer100, to determine a change in the power and/or the frequency. Additionally, it should be understood that the combiner136may be any suitable circuitry that may combine the test signal132and the wanted signal134(e.g., a coupler, a hybrid). As such, the duplexer100receives the test signal132and the wanted signal134as a combined signal138. To avoid interference with the wanted signal134, the test signal132may have lower power. That is, compared to the wanted signal134, the test signal132may be a very weak signal that may have similar or same frequency.

The measurement system130may receive the combined signal138via a splitter140, which may be disposed between the duplexer100and the receiver53. It should be understood that the splitter140may be any suitable circuitry that may split the combined signal138along multiple circuit paths (e.g., a divider, a hybrid). As illustrated, the measurement system130may receive the test signal142A as output by the duplexer100. As such, the test signal132input into the duplexer100may be referred to as an “input test signal132,” and the test signal142A output by the duplexer100may be referred to as an “output test signal142A.” The receiver53may also receive the combined signal138, which may include the wanted signal134. In some embodiments, the measurement system130may extract the output test signal142A from the combined signal138, and/or the receiver53may extract the wanted signal134from the combined signal138. In additional or alternative embodiments, the splitter140may extract or split the output test signal142A from the wanted signal134, and send the output test signal142A (and not the wanted signal134) to the measurement system130, and send the wanted signal134(and not the output test signal142A) to the receiver53.

As the splitter140is disposed between the duplexer100and the receiver53, the resulting output test signal142A received by the measurement system130from the duplexer100via the splitter140may have a radio frequency. However, in some embodiments, an output test signal142B may be received by the measurement system130from the receiver53(e.g., after downconversion). As such, the output test signal142B may instead not have the radio frequency (e.g., it may have a baseband or intermediate frequency less than the radio frequency), and include a digital signal, such as in-phase and/or quadrature signals.

The measurement system130may then compare the output test signal142A,142B (collectively142) to the input test signal132, and determine a difference (e.g., a power difference, a phase difference) between the two, which may represent the receiver insertion loss. That is, the difference between the output test signal142and the input test signal132may represent loss in the test signal142(and thus the wanted signal134) caused by the duplexer100. In some implementations, the measurement system130may include a current sensor, voltage sensor, or power detector that receives the output test signal142to measure the current, voltage, or power of the output test signal142and determine the power or phase of the output test signal142. The measurement system130may then compare the power or phase of the output test signal142with that of the input test signal132to determine the difference. The measurement system130may send an indication of the difference to the tuning algorithm59, which may then adjust the current tuning state58of the duplexer to reduce or minimize the difference, thus reducing or minimizing the receiver insertion loss. That is, an ideal receiver insertion loss would be zero dB power loss.

WhileFIG.7illustrates the test signal132injected at the combiner136between the antenna55and the duplexer100and measured at the splitter140between the duplexer100and the receiver53, in some embodiments, this may be reversed. That is, the combiner136may be the splitter140, the splitter140may be the combiner136, and the test signal132may be injected between the duplexer100and the receiver53and measured between the antenna55and the duplexer100. Additionally, the processor12may configure the duplexer100to operate in a tuning state58by adjusting the tunable components57according to the tuning algorithm59. The measurement system130may operate while the duplexer100is in the tuning state58, and the tuning algorithm59may adjust the tuning state58and save the adjustments based on the difference between the output test signal142and the input test signal132. In particular, the measurement system130may operate while the transmitter52is transmitting uplink signals of a given transmission frequency and the receiver53is receive downlink signals of a given receive frequency. However, in some embodiments, there may be no uplink or downlink signals present while the measurement system130operates and the tuning algorithm59adjusts the tuning state58.

In some embodiments, the measurement system130may also or alternatively measure transmitter insertion loss.FIG.8is a schematic diagram of the RFFE50having a measurement system130coupled to the transmitter52and the antenna55to determine transmitter insertion loss, according to embodiments of the present disclosure. As with the measurement system130shown inFIG.7, the measurement system130is external to the duplexer100, and, as such, may not be reliant on a type of the duplexer100, and may avoid injecting the test signal132to interfere with a wanted signal.

As illustrated, the measurement system130injects an input test signal132A into an uplink wanted signal134(e.g., a transmission signal sent by the transmitter52) at combiner136, which is disposed between the transmitter52and the duplexer100. As such, the duplexer100receives the test signal132A and the wanted signal134as a combined signal138. The measurement system130may receive the combined signal138via a splitter140, which may be disposed between the duplexer100and the antenna55. The antenna55may also receive the combined signal138, which may include the wanted signal134. In some embodiments, the measurement system130may extract the output test signal142from the combined signal138. In additional or alternative embodiments, the splitter140may extract or split the output test signal142from the wanted signal134, and send the output test signal142(and not the wanted signal134) to the measurement system130, and send the wanted signal134(and not the output test signal142) to the antenna55.

As the combiner136is disposed between the transmitter52and the duplexer100, the input test signal132A sent by the measurement system130to the duplexer100via the combiner136may have a radio frequency. However, in some embodiments, the measurement system130may send an input test signal132B to the transmitter52to be upconverted to have the radio frequency. As such, the input test signal132B may instead not have the radio frequency (e.g., it may have a baseband or intermediate frequency less than the radio frequency), and include a digital signal, such as in-phase and/or quadrature signals.

The measurement system130may then compare the output test signal142to the input test signal132A,132B (collectively132), and determine a difference (e.g., a power difference, a phase difference) between the two, which may represent a transmitter insertion loss. That is, the difference between the output test signal142and the input test signal132may represent loss in the test signal142(and thus the wanted signal134) caused by the duplexer100. In some implementations, the measurement system130may include a current sensor, voltage sensor, or power detector that receives the output test signal142to measure the current, voltage, or power of the output test signal142and determine the power or phase of the output test signal142. The measurement system130may then compare the power or phase of the output test signal142with that of the input test signal132to determine the difference. The measurement system130may send an indication of the difference to the tuning algorithm59, which may then adjust the current tuning state58of the duplexer to reduce or minimize the difference, thus reducing or minimizing the transmitter insertion loss. That is, an ideal transmitter insertion loss would be zero dB power loss.

WhileFIG.8illustrates the test signal132injected at the combiner136between the transmitter52and the duplexer100and measured at the splitter140between the duplexer100and the antenna55, in some embodiments, this may be reversed. That is, the combiner136may be the splitter140, the splitter140may be the combiner136, and the test signal132may be injected between the antenna55and the duplexer100and measured between the duplexer100and the transmitter52. Additionally, the processor12may configure the duplexer100to operate in a tuning state58by adjusting the tunable components57according to the tuning algorithm59. The measurement system130may operate while the duplexer100is in the tuning state58, and the tuning algorithm59may adjust the tuning state58and save the adjustments based on the difference between the output test signal142and the input test signal132. In particular, the measurement system130may operate while the transmitter52is transmitting uplink signals of a given transmission frequency and the receiver53is receive downlink signals of a given receive frequency. However, in some embodiments, there may be no uplink or downlink signals present while the measurement system130operates and the tuning algorithm59adjusts the tuning state58.

The measurement system130may also or alternatively measure isolation between the receiver53and the transmitter52.FIG.9is a schematic diagram of the RFFE50having a measurement system130coupled to the receiver53and the transmitter52to determine isolation between the receiver53and the transmitter52, according to embodiments of the present disclosure. As with the measurement system130shown inFIG.7, the measurement system130is external to the duplexer100, and, as such, may not be reliant on a type of the duplexer100, and may avoid injecting the test signal132to interfere with a wanted signal.

As illustrated, the measurement system130injects an input test signal132A into the wanted signal134(e.g., a transmission or uplink signal sent by the transmitter52) at combiner136, which is disposed between the transmitter52and the duplexer100. As such, the duplexer100receives the test signal132A and a wanted uplink signal134A as a combined uplink signal138A. The measurement system130may receive a combined downlink signal138B via a splitter140, which may be disposed between the duplexer100and the antenna55. The receiver53may also receive the combined signal138B, which may include an output test signal142A and a downlink wanted signal134B. In some embodiments, the measurement system130may extract the output test signal142A from the combined downlink signal138B. In additional or alternative embodiments, the splitter140may extract or split the output test signal142A from the wanted downlink signal134B, and send the output test signal142A (and not the wanted downlink signal134B) to the measurement system130, and send the wanted downlink signal134B (and not the output test signal142A) to the receiver53.

As the combiner136is disposed between the transmitter52and the duplexer100, and the splitter140is disposed between the duplexer100and the receiver53, the input test signal132A sent by the measurement system130to the duplexer100via the combiner136may have a radio frequency. However, in some embodiments, the measurement system130may send an input test signal132B to the transmitter52to be upconverted to have the radio frequency. As such, the input test signal132B may instead not have the radio frequency (e.g., it may have a baseband or intermediate frequency less than the radio frequency), and include a digital signal, such as in-phase and/or quadrature signals. Similarly, as the splitter140is disposed between the duplexer100and the receiver53, the resulting output test signal142A received by the measurement system130from the duplexer100via the splitter140may have a radio frequency. However, in some embodiments, an output test signal142B may be received by the measurement system130from the receiver53(e.g., after downconversion). As such, the output test signal142B may instead not have the radio frequency (e.g., it may have a baseband or intermediate frequency less than the radio frequency), and include a digital signal, such as in-phase and/or quadrature signals.

The measurement system130may then compare the output test signal142A,142B (collectively142) to the input test signal132A,132B (collectively132), and determine a difference (e.g., a power difference, a phase difference) between the two, which may represent isolation between the receiver53and the transmitter52. That is, the difference between the output test signal142and the input test signal132may represent isolation in the test signal142(and thus the wanted signal134) caused by the duplexer100. In particular, the isolation may be defined by a ratio between the power of the output test signal142divided by the power of the input test signal132. As such, an ideal isolation would be zero, where the output test signal142may have zero power, indicating that the receiver53receives zero power of the test signal132transmitted by the measurement system130. In some implementations, the measurement system130may include a current sensor, voltage sensor, or power detector that receives the output test signal142to measure the current, voltage, or power of the output test signal142and determine the power or phase of the output test signal142. The measurement system130may then compare the power or phase of the output test signal142with that of the input test signal132to determine the ratio. The measurement system130may send an indication of the ratio to the tuning algorithm59, which may then adjust the current tuning state58of the duplexer to reduce or minimize the ratio, thus reducing or minimizing the isolation.

WhileFIG.9illustrates the test signal132injected at the combiner136between the transmitter52and the duplexer100and measured at the splitter140between the duplexer100and the receiver53, in some embodiments, this may be reversed. That is, the combiner136may be the splitter140, the splitter140may be the combiner136, and the test signal132may be injected between the receiver53and the duplexer100and measured between the duplexer100and the transmitter52. Additionally, the processor12may configure the duplexer100to operate in a tuning state58by adjusting the tunable components57according to the tuning algorithm59. The measurement system130may operate while the duplexer100is in the tuning state58, and the tuning algorithm59may adjust the tuning state58and save the adjustments based on the difference between the output test signal142and the input test signal132. In particular, the measurement system130may operate while the transmitter52is transmitting uplink signals of a given transmission frequency and the receiver53is receive downlink signals of a given receive frequency. However, in some embodiments, there may be no uplink or downlink signals present while the measurement system130operates and the tuning algorithm59adjusts the tuning state58.

It should be understood that any or all three of the embodiments of the measurement system130shown inFIGS.7-9may be implemented in the electronic device10. That is, the electronic device10may implement any or all of the combiners136and/or the splitters140shown in theFIGS.7-9, which may be coupled to the measurement system130.FIG.10is a flowchart of a method150for adjusting a tuning state58of the duplexer100based on a difference or ratio of the test signal132,142at a duplexer input and a duplexer output, according to embodiments of the present disclosure. The duplexer input may refer to where the input test signal132is injected (e.g., at the combiner136), and the duplexer output may refer to where the output test signal142is measured (e.g., at the splitter140). Any suitable device (e.g., a controller) that may control components of the electronic device10, such as the processor12, may perform the method150. In some embodiments, the method150may be implemented by executing instructions stored in a tangible, non-transitory, computer-readable medium, such as the memory14or storage16, using the processor12. For example, the method150may be performed at least in part by one or more software components, such as an operating system of the electronic device10, one or more software applications of the electronic device10, and the like. While the method150is described using steps in a specific sequence, it should be understood that the present disclosure contemplates that the described steps may be performed in different sequences than the sequence illustrated, and certain described steps may be skipped or not performed altogether.

In process block152, the processor12configures the duplexer100with a tuning state58. In particular, the processor12may receive an indication of a transmission frequency for which to transmit uplink signals using the transmitter52and a receive frequency for which to receive downlink signals using the receiver53. In some embodiments, the processor12may receive the indication from a base station, a wireless communication network, an access point, a communication node, a communication hub, and so on. The tuning algorithm59may provide the tuning state58based on the transmission and receive frequencies, and the processor12may adjust the tunable components57(e.g., one or more impedance tuners, one or more phase shifters, and so on) of the duplexer100based on the tuning state58.

In process block154, the processor12combines the test signal132with the wanted signal134at the duplexer input. In particular, the processor12may cause the measurement system130to send the input test signal132to the combiner136between the antenna55and the duplexer100to be combined with the wanted downlink signal134as shown inFIG.7, send the input test signal132to the combiner136between the transmitter52and the duplexer100to be combined with the wanted uplink signal134as shown inFIG.8, and/or send the input test signal132to the combiner136between the transmitter52and the duplexer100to be combined with the wanted uplink signal134A as shown inFIG.9.

In process block156, the processor12receives the test signal142at the duplexer output. In particular, the processor12may cause the measurement system130to detect or measure the output test signal142at the splitter140between the duplexer100and the receiver53as part of the combined downlink signal138as shown inFIG.7, detect or measure the output test signal142at the splitter140between the duplexer100and the antenna55as part of the combined uplink signal138as shown inFIG.8, and/or detect or measure the output test signal142at the splitter140between the duplexer100and the receiver53as part of the combined downlink signal138B as shown inFIG.9.

In process block158, the processor12determines a difference or ratio between the test signal142at the duplexer output and the test signal132at the duplexer input. In particular, to determine the receiver or transmitter insertion loss, the processor12may determine a power loss between the test signal142at the duplexer output and the test signal132at the duplexer input. To determine the isolation between the receiver53and the transmitter52, the processor12may determine a ratio between power of the test signal142at the duplexer output and power of the test signal132at the duplexer input.

In process block160, the processor12adjusts (e.g., using the tuning algorithm59) the tuning state58based on the difference or ratio. In particular, the processor12may adjust the tuning state58of the tunable components57of the duplexer100to reduce or minimize the receiver insertion loss, the transmitter insertion loss, and/or the isolation ratio (thus increasing or maximizing isolation) between the receiver53and the transmitter52. In this manner, the method150may adjust the tuning state58of the duplexer100based on a difference or ratio of the test signal132,142at the duplexer input and the duplexer output to improve insertion loss and/or isolation performance of the duplexer100.

In some embodiments, the measurement system130may adjust power or frequency of the input test signal132and/or the output test signal142.FIG.11is a schematic diagram of the RFFE50having a measurement system130coupled to an additional transceiver170(e.g., a measurement transceiver) that may adjust the power or frequency of the input test signal132and/or the output test signal142, according to embodiments of the present disclosure. While the measurement transceiver170is illustrated as coupled to the measurement system130, in some embodiments, the measurement system130may include the measurement transceiver170. As illustrated, the measurement transceiver170may include a transmitter172(e.g., a measurement transmitter) and a receiver174(e.g., a measurement receiver). The measurement transmitter172may include one or more amplifiers176(e.g., power amplifiers), and the measurement receiver174may include one or more amplifiers178(e.g., low noise amplifiers). The one or more amplifiers176of the measurement transmitter172may amplify the input test signal132to increase power of the input test signal132. Additionally or alternatively, the measurement transmitter172may include one or more phase shifters, mixers, or frequency conversion circuitry to adjust a frequency of the input test signal132(e.g., to match a wanted signal134, or differentiate from the wanted signal134). Similarly, one or more amplifiers178of the measurement receiver174may amplify the output test signal142to increase power of the output test signal142. Moreover, the measurement receiver174may include one or more phase shifters, mixers, or frequency conversion circuitry to adjust a frequency of the output test signal142(e.g., to match the wanted signal134, or differentiate from the wanted signal134).

While the measurement transceiver170is illustrated as having both the measurement transmitter172having the one or more amplifiers176and the measurement receiver174having the one or more amplifiers178, in additional or alternative embodiments, the measurement transceiver170may have only the measurement transmitter172, or only the measurement receiver174. Moreover,FIG.11illustrates the measurement transceiver170being implemented to facilitate measuring receiver insertion loss. In additional or alternative embodiments, the measurement transceiver170may facilitate measuring transmitter insertion loss (e.g., such that the measurement transmitter172is coupled to the combiner136between the transmitter52and the duplexer100and the measurement receiver174is coupled to the splitter140between the duplexer100and the antenna55, as shown inFIG.8) and/or isolation (e.g., such that the measurement transmitter172is coupled to the combiner136between the transmitter52and the duplexer100and the measurement receiver174is coupled to the splitter140between the duplexer100and the receiver53, as shown inFIG.9).

Because the test signal132(e.g., a pilot tone) may have weak power (e.g., less than a wanted signal134with which it is combined), detecting and extracting the test signal (e.g., the output test signal142) from a combined signal138may be difficult. In some embodiments, the RFFE50and/or the measurement system130may include averaging logic (e.g., hardware, software, or both) that increases power of the test signal142by averaging multiple measurements of the combined signal138, such that the test signal142is more easily detectable and extractible by the measurement system130.FIG.12is a schematic diagram of the RFFE50having averaging logic190that increases power of the test signal142by averaging multiple measurements of the combined signal138to facilitate detection and extraction of the test signal142, according to embodiments of the present disclosure. The averaging logic190may include any suitable components, such as capacitive elements (e.g., one or more capacitors) that may enable increasing the power of the test signal142for the time period. In some embodiments, the averaging logic190may include more complex components, such as switching circuitry (e.g., one or more switches) to facilitate increasing the power of the test signal142by averaging multiple measurements of the combined signal138. As illustrated, the averaging logic190may average the combined signal138to enable a more detectable and extractible output test signal142. As such, the averaging logic190may be coupled between the splitter140(e.g., at an output of the duplexer100) and the measurement system130. Additionally, the blocks52,53,55may each represent one of the receiver53, the transmitter52, and the antenna55, illustrating that the averaging logic190may be coupled between any of these components52,53,55and the measurement system130. The averaging logic190may perform any suitable signal averaging technique by obtaining or receiving multiple measurements of the combined signal138, in the time domain, and averaging the multiple measurements to increase the strength of the test signal142relative to noise that is obscuring it, in this case the wanted signal134. By averaging the multiple measurements of the combined signal138, the averaging logic190may increase a signal-to-noise ratio of the test signal142relative to the wanted signal134(e.g., in proportion to a square root of the number of measurements).

FIG.13is a set of frequency diagrams indicating power of a combined signal138having a test signal142and a wanted signal134, before and after averaging, as performed by the averaging logic190, according to embodiments of the present disclosure. Each frequency diagram represents frequency horizontally and power or voltage vertically. Before averaging, the test signal142may have less power200than the wanted signal134. In particular, for a bandwidth202of the combined signal138(e.g., 5 megahertz (MHz) or less, 10 MHz or less, 20 MHz or less, 60 MHz or less, 100 MHz or less, 200 MHz or less, and so on), the test signal142may have a signal-to-noise ratio of less than 1, where the wanted signal134is noise relative to the test signal142. However, after averaging multiple measurements of the combined signal138, an averaged combined signal204the power of the test signal142may increase206over that of the wanted signal134. As such, the test signal142in the averaged combined signal204may have a signal-to-noise ratio of greater than 1 relative to the wanted signal134. This may make the test signal142more detectable and easier to extract for the measurement system130.

As noted above, the test signal132may have a lower power than the wanted signal134. In some cases, the power associated with the test signal132may approach or exceed a noise floor of the measurement system130of the electronic device10. To enable detection and extraction of the test signal132that is associated with this low power, and enable the measurement system130to accurately measure the output test signal142, the measurement system130may use a code spreading technique, or other similar technique. This may also be used to prevent the test signal132from influencing (e.g., drowning out or interfering with) the wanted signal134.FIG.14is schematic diagram of the RFFE50having code spreading logic220and code de-spreading logic222that applies a spreading code224to the test signal132to enable low power associated with the test signal132, according to embodiments of the present disclosure. The code spreading logic220and the code de-spreading logic222may be implemented in hardware, software, or both. The spreading code224applied or encoded by the code spreading logic220, and removed or decoded by the code de-spreading logic222, may include a pseudo-random code, such as Gold code, Walsh code, or any other code-division multiple access (CDMA) code or pseudo-random noise sequence.

In particular, the code spreading logic220may be coupled to the combiner136(e.g., at an input of the duplexer100) and receive the test signal132. The code spreading logic220may apply the spreading code224to the test signal132to generate a spreaded test signal226. For example, the test signal132may include one or more tones having narrower bandwidth and higher power.FIG.15is a set of frequency diagrams illustrating application of the spreading code224, according to embodiments of the present disclosure. Each frequency diagram includes a horizontal axis representing frequency and a vertical axis representing power (e.g., power spectral density (PSD)), as well as a noise floor239of the measurement system130(e.g., a sum of noise sources received or detected by the measurement system130). The bottom left frequency diagram240illustrates the test signal132, which may have a single tone241A, or include multiple tones (including tones241A and241B). As noted, the test signal132(e.g., the tone241A or tones (including241A,241B, collectively241) has a bandwidth within a frequency band of interest244, which may include a transmission frequency range or a receive frequency range, and has a higher power.

Applying the spreading code224to the test signal132may resulting in generating the spreaded test signal226having a wider bandwidth and lower power (e.g., than that of the one or more tones241prior to spreading). A bottom right frequency diagram242ofFIG.15illustrates the spreaded test signal226after the code spreading logic220has applied the spreading code224to the test signal132. As illustrated, the spreaded test signal226has a wider bandwidth and lower power than the input test signal132of the frequency diagram240. Indeed, the power of the spreaded test signal226is near, and, in certain portions, may even exceed the noise floor239.

The top left frequency diagram243ofFIG.15illustrates the wanted signal134(e.g., uplink or downlink), which is shown having a higher power at the frequency band of interest244. The measurement system130may combine the spreaded test signal226and the wanted signal134at the combiner136to generate the combined signal138. The top right frequency diagram246ofFIG.15illustrates the combined signal138having the wanted signal134and the spreaded test signal226. As illustrated, the spreaded test signal226has much lower power than the wanted signal134.

Referring back toFIG.14, the combined signal138may then traverse the duplexer100and, as output by the duplexer100, reach the splitter140. The splitter140may send the combined signal138to the receiver53or the antenna55, as well as the code de-spreading logic222. From the standpoint of the receiver53or the antenna55, because the power of the spreaded test signal226in the combined signal138is much lower than that of the wanted signal134, the spreaded test signal226may have little to no effect on data in the wanted signal134when received at the receiver53or transmitted via the antenna55, and thus may not interfere with the wanted signal134.FIG.16is a set of frequency diagrams illustrating removal of the spreading code224, according to embodiments of the present disclosure. Each frequency diagram includes a horizontal axis representing frequency and a vertical axis representing power (e.g., PSD), as well as the noise floor239of the measurement system130. The top frequency diagram260illustrates the combined signal138as output by the duplexer100at the splitter140, which may be received by the receiver53or the antenna55, as well as the code de-spreading logic222. As illustrated, the power of the spreaded test signal228of the combined signal138output by the duplexer100is much lower than that of the wanted signal134, and, as such, may not interfere with the wanted signal134. As the spreaded test signal226ofFIG.15is input to the duplexer100(e.g., at the combiner136), and the spreaded test signal228is output by the duplexer100(e.g., at the splitter140), the spreaded test signal226may be referred to as an input spreaded test signal, and the spreaded test signal228may be referred to as an output spreaded test signal.

The bottom frequency diagram262illustrates the combined signal138after de-spreading. In particular, the code de-spreading logic222may receive the combined signal138output by the duplexer100, and decode the output test signal142by removing the spreading code224. Accordingly, the output spreaded test signal228may be de-spreaded, generating the output test signal142. As with the input test signal132shown in the bottom left frequency diagram240ofFIG.15, the output test signal142may include one or more tones264A,264B, depending on whether the test signal is single- or multi-tone. Additionally, de-spreading the wanted signal134generates a de-spreaded wanted signal266. Advantageously, like the spreaded test signal226ofFIG.15, the de-spreaded wanted signal266has a wider bandwidth and lower power than the wanted signal134before de-spreading. Moreover, it has a much lower power than the output test signal142, which may enable the measurement system130to easily detect and extract the output test signal142. The measurement system130may then compare the output test signal142to the input test signal132to determine a difference or ratio, and determine insertion loss or isolation performance based on the difference or ratio, as discussed above. By leveraging the power difference in signals due to spreading and de-spreading, desired signals (e.g., the output test signal142) may be easily detected and extracted, and, in some cases, foregoing a need of using a filter or other circuitry or devices used to detect or extract the desired signals. Indeed, a simple splitter140may be sufficient to detect or extract the desired signals when used in conjunction with the code spreading logic220and the code de-spreading logic222.

In some embodiments, the test signal132may include an orthogonal frequency-division modulation (OFDM) signal.FIG.17is a frequency diagram illustrating the test signal132implemented as an OFDM signal280, according to embodiments of the present disclosure. The frequency diagram includes a horizontal axis representing frequency and a vertical axis representing power. Advantageously, the OFDM signal280may include multiple tones or subcarriers282, each having a frequency resolution284. As such, the OFDM signal280may enable a test signal132having multiple tones282that are independent (e.g., where the tones282may not interfere with one another due to their respective frequency resolutions284). That is, the OFDM signal280may enable combining multiple tones282, without interference between the tones282. Moreover, because the OFDM signal280is similar to certain cellular signals (e.g., fourth generation (4G) or fifth generation (5G) cellular signals), the electronic device10may implement the OFDM signal280as the test signal132without additional or with minimal additional hardware or logic.

In embodiment, an electronic device comprises a memory storing a tuning state; an antenna configured to receive a downlink signal; a receiver; a transmitter configured to transmit an uplink signal; a duplexer comprising a tunable component configurable based on the tuning state; a combiner coupled to the transmitter and the duplexer; a splitter coupled to the duplexer and the receiver; and a processor coupled to the combiner and the splitter. The processor is configured to combine a first signal with the uplink signal at the combiner to generate a first combined signal, receive a second combined signal comprising a second signal and the downlink signal at the splitter, and adjust the tuning state based on the first signal and the second signal.

The processor may be configured to compare a power of the first signal to a power of the second signal to determine a power ratio, and adjust the tuning state based on the power ratio.

The processor may be configured to adjust the tuning state to reduce the power ratio.

The electronic device may comprise an additional transmitter coupled to the combiner and the processor. The additional transmitter may be configured to adjust a power or frequency of the first signal.

The electronic device may comprise an additional receiver coupled to the splitter and the processor. The additional receiver may be configured to adjust a power or frequency of the second combined signal.

The processor may be configured to apply a spreading code to the first signal to generate a spreaded signal having wider bandwidth and lower power than the first signal.

The processor may be configured to remove the spreading code from the second combined signal to generate the second signal. The second signal may have a narrow bandwidth and higher power than the spreaded signal.

In an embodiment, a method comprises configuring, via processing circuitry, a tunable component of a duplexer with a tuning state; combining, at an input of the duplexer, a first signal with an uplink signal to generate a first combined signal; receiving, at an output of the duplexer, a second combined signal comprising a second signal and a downlink signal; and adjusting, via the processing circuitry, the tuning state based on the first signal and the second signal.

The method may comprise receiving an indication of a transmission frequency to transmit the uplink signal and a receive frequency to receive the downlink signal, wherein the tuning state corresponds to the transmission frequency and the receive frequency.

The method may comprise receiving multiple measurements of the second combined signal.

The method may comprise averaging the multiple measurements to determine the second signal in the second combined signal.

Averaging the multiple measurements may increase power of the second signal compared to the downlink signal in the second combined signal.

The first signal may comprise a single tone.

The first signal may comprise multiple tones.

In an embodiment, a radio frequency front end comprises an antenna configured to receive a downlink signal; a receiver; a transmitter configured to transmit an uplink signal; a duplexer coupled to the receiver and the transmitter, the duplexer comprising a tunable component having a plurality of tuning states; and a processor coupled to the receiver, the transmitter, and the duplexer. The processor is configured to combine an input pilot tone with the uplink signal to generate a first combined signal, the input pilot tone have less power than the uplink signal, receive a second combined signal comprising an output pilot tone and the downlink signal, and adjust the tunable component based on the input pilot tone and the output pilot tone.

The processor may be configured to compare a power of the input pilot tone to a power of the output pilot tone to determine a power ratio, and adjust the tunable component based on the power ratio.

The processor may be configured to adjust the tunable component to reduce the power ratio.

The input pilot tone may comprise an orthogonal frequency-division modulation (OFDM) signal.

The input pilot tone may comprise a single tone of the OFDM.

The input pilot tone may comprise multiple tones of the OFDM.