Switch circuit having adjustable linearity of differential mode resistances

A switch circuit includes a pair of metal oxide semiconductor (MOS) switches and an adjusting unit. Each of the MOS switches has an input terminal and an output terminal. The MOS switches receive a pair of differential input voltages at the input terminals thereof, and output a pair of differential output voltages at the output terminals thereof when the MOS switches conduct. The adjusting unit changes a difference between common mode levels of the input terminals and the output terminals of the MOS switches so as to adjust linearity of differential mode resistances of the MOS switches.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority of Taiwanese application no. 096137688, filed on Oct. 8, 2007.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The invention relates to a switch circuit, more particularly to a linearity-adjustable switch circuit.

2. Description of the Related Art

A conventional switch circuit for relaying differential voltages includes a pair of metal oxide semiconductor (MOS) switches, each of which has an input terminal and an output terminal. Each of the MOS switches can be a NMOS switch, a PMOS switch or a CMOS switch. The MOS switches receive a pair of differential input voltages (Vin+, Vin−) at the input terminals thereof, and output a pair of differential output voltages (Vout+, Vout−) at the output terminals thereof when the MOS switches conduct.

FIGS. 1 and 2illustrate relevant simulation results of a conventional switch circuit. The horizontal axis represents a difference (Vdiff) between the differential input voltages (Vin+, Vin−), and the vertical axis represents a ratio of differential mode resistances (Rdiff) of the MOS switches (based on Rdiffacquired when Vdiff=0). Curve21is obtained when the MOS switches are NMOS switches or PMOS switches. Curve22is obtained when the MOS switches are CMOS switches. The definitions of Vdiffand Rdiffare as follows:
Vdiff=Vin+−Vin−,
Rdiff=(Vin+−Vin−)/(Iin+−Iin−),

where (Iin+, Iin−) are a pair of differential input currents received at the input terminals of the MOS switches.

As shown inFIGS. 1 and 2, differential mode resistances (Rdiff) of the MOS switches change according to the difference (Vdiff) between the differential input voltages (Vin+, Vin−). As such, when the switch circuit is applied to a linear circuit (such as a filter or an amplifier), linearity of the linear circuit will be restricted.

SUMMARY OF THE INVENTION

Therefore, the object of the present invention is to provide a linearity-adjustable switch circuit.

Accordingly, a switch circuit of the present invention comprises a pair of metal oxide semiconductor (MOS) switches and an adjusting unit. Each of the MOS switches has an input terminal and an output terminal. The MOS switches receive a pair of differential input voltages at the input terminals thereof, and output a pair of differential output voltages at the output terminals thereof when the MOS switches conduct. The adjusting unit is for changing a difference between common mode levels of the input terminals and the output terminals of the MOS switches so as to adjust linearity of differential mode resistances of the MOS switches.

DETAILED DESCRIPTION OF THE EMBODIMENTS

Before the present invention is described in greater detail with reference to the accompanying embodiments, it should be noted herein that like elements are denoted by the same reference numerals throughout the disclosure.

Referring toFIG. 3, the first embodiment of a switch circuit according to the present invention is shown to include a pair of metal oxide semiconductor (MOS) switches31,32and an adjusting unit5. Each of the MOS switches31,32has an input terminal and an output terminal. In this embodiment, the MOS switches31,32are NMOS switches. However, in practice, the MOS switches31,32may as well be PMOS switches or CMOS switches. The MOS switches31,32receive a pair of differential input voltages (Vin+, Vin−) at the input terminals thereof, and output a pair of differential output voltages (Vout+, Vout−) at the output terminals thereof when the MOS switches31,32conduct. The adjusting unit5is for changing a difference (Vdcm) between common mode levels (Vcm,in, Vcm,out) of the input terminals and the output terminals of the MOS switches31,32so as to adjust linearity of differential mode resistances (Rdiff) of the MOS switches31,32. The definitions of Vcm,in, Vcm,out, Vdcmand Rdiffare as follows:
Vcm,in=(Vin++Vin−)/2,
Vcm,out=(Vout++Vout−)/2,
Vdcm=Vcm,in−Vcm,out,
Rdiff=(Vin+−Vin−)/(Iin+−Iin−),

where (Iin+, Iin−) are a pair of differential input currents received at the input terminals of the MOS switches31,32.

In this embodiment, the adjusting unit5includes four current sources501-504connected to the input terminals and the output terminals of the MOS switches31,32, respectively. The input terminal and the output terminal of each of the MOS switches31,32receive from the respective ones of the current sources501-504electric currents having substantially the same magnitude but with opposite directions relative to each other. For example, if the current source501inputs an electric current into the input terminal of the MOS switch31, the current source502draws from the output terminal of the MOS switch31an electric current having substantially the same magnitude as that from the current source501, and vice versa. Through the electric currents generated by the current sources501-504and flowing through the MOS switches31,32, as well as the conduction resistances of the MOS switches31,32, the difference (Vdcm) between the common mode levels (Vcm,in, Vcm,out) of the input terminals and the output terminals of the MOS switches31,32can be changed accordingly.

FIGS. 4 to 8illustrate relevant simulation results of the first embodiment. Referring toFIG. 4, the horizontal axis represents a difference (Vdiff) between the differential input voltages (Vin+, Vin−), and the vertical axis represents differential mode resistances (Rdiff) of the MOS switches31,32. Curves601-605are obtained when Vdcm=60 mV, 30 mV, 0V, −30 mV and −60 mV, respectively, wherein (Vdcm) is a difference between common mode levels (Vcm,in, Vcm,out) of the input terminals and the output terminals of the MOS switches31,32. The definition of (Vdiff) is as follows:
Vdiff=Vin+−Vin−.

Referring toFIG. 5, the horizontal axis represents a difference (Vdiff) between the differential input voltages (Vin+, Vin−), and the vertical axis represents ratios of the differential mode resistances (Rdiff) of the MOS switches31,32(based on Rdiffacquired when Vdiff=0). Curves611-615are obtained when Vdcm=60 mV, 30 mV, 0V, −30 mV and −60 mV, respectively, wherein (Vdcm) is a difference between common mode levels (Vcm,in, Vcm,out) of the input terminals and the output terminals of the MOS switches31,32.

It can be observed fromFIGS. 4 and 5that, when the difference (Vdcm) between the common mode levels (Vcm,in, Vcm,out) of the input terminals and the output terminals of the MOS switches31,32is close to 30 mV, variations in the differential mode resistances (Rdiff) of the MOS switches31,32are minimal. Moreover, when (Vdcm) becomes smaller, (Rdiff) becomes smaller as well, and a region around where the difference (Vdiff) between the differential input voltages (Vin+, Vin−)=0 and whereat variations in (Rdiff) are minimal becomes larger.

Subsequently, a range of the difference (Vdiff) between the differential input voltages (Vin−, Vin−) is reduced, and a range of the difference (Vdcm) between the common mode levels (Vcm,in, Vcm,out) of the input terminals and the output terminals of the MOS switches31,32is increased.

Referring toFIG. 6, the horizontal axis represents a difference (Vdiff) between the differential input voltages (Vin+, Vin−), and the vertical axis represents differential mode resistances (Rdiff) of the MOS switches31,32. Curves621-627are obtained when Vdcm=60 mV, 30 mV, 0V, −30 mV, −60 mV, −90 mV and −120 mV, respectively, wherein (Vdcm) is a difference between common mode levels (Vcm,in, Vcm,out) of the input terminals and the output terminals of the MOS switches31,32.

Referring toFIG. 7, the horizontal axis represents a difference (Vdiff) between the differential input voltages (Vin+, Vin−), and the vertical axis represents ratios of the differential mode resistances (Rdiff) of the MOS switches31,32(based on Rdiffacquired when Vdiff=0). Curves631-637are obtained when Vdcm=60 mV, 30 mV, 0V, −30 mV, −60 mV, −90 mV and −120 mV, respectively, wherein (Vdcm) is a difference between common mode levels (Vcm,in, Vcm,out) of the input terminals and the output terminals of the MOS switches31,32.

Referring toFIG. 8, the horizontal axis represents the difference (Vdcm) between the common mode levels (Vcm,in, Vcm,out) of the input terminals and the output terminals of the MOS switches31,32, and the vertical axis represents the differences between the ratios of differential mode resistances (Rdiff) of the MOS switches31,32inFIGS. 7 and 1. Curve641is obtained when Vdiff=50 mV, wherein (Vdiff) is a difference between the differential input voltages (Vin+, Vin−).

It can be observed fromFIGS. 6 to 8that, although there is one solution (as shown in point651) for a difference (Vdcm) between the common mode levels (Vcm,in, Vcm,out) of the input terminals and the output terminals of the MOS switches31,32such that variation of the differential mode resistances (Rdiff) of the MOS switches31,32is at the minimum, if (Vdcm) becomes smaller, another solution is obtained because (Rdiff) becomes smaller, and the variation of (Rdiff) also becomes smaller.

Referring toFIG. 9, the second embodiment of a switch circuit according to the present invention is shown to include a pair of MOS switches31,32, an adjusting unit5, and a pair of capacitors71,72. The MOS switches31,32receive a pair of differential input voltages (Vin+, Vin−) at the input terminals thereof through the capacitors71,72, respectively, and output a pair of differential output voltages (Vout−, Vout−) at the output terminals thereof when the MOS switches31,32conduct.

The adjusting unit5includes four resistors511-514. The MOS switches31,32receive a first common mode voltage at the input terminals thereof through two of the resistors511,513, and receive a second common mode voltage at the output terminals thereof through the other two of the resistors512,514. The first and second common mode voltages respectively set the common mode levels (Vcm,in, Vcm,out) of the input terminals and the output terminals of the MOS switches31,32.

Referring toFIG. 10, the third embodiment of a switch circuit according to the present invention is shown to be similar to the second embodiment, and differs therefrom in that, in this embodiment, four inductors521-524are used in lieu of the four resistors511-514.

Since the relevant simulation results of the second and third embodiments are similar to those of the first embodiment, they will not be discussed herein for the sake of brevity.

The switch circuit of the present invention is suitable for application to a variable gain amplifier (seeFIG. 11a), for selecting which one of two receivers is to receive a signal (seeFIG. 11b), for selecting which one of two transmitters is to transmit a signal (seeFIG. 11c), and for selecting which one of two circuits is to output a signal to a next stage circuit (seeFIG. 11d). However, the application of the present invention should not be limited to the above examples.

In sum, through changing the difference (Vdcm) between common mode levels (Vcm,in, Vcm,out) of the input terminals and the output terminals of the MOS switches31,32, linearity of differential mode resistances (Rdiff) of the MOS switches31,32can be adjusted accordingly, thereby achieving the object of the present invention.