Display device and method for manufacturing the same

A display device and method for manufacturing the same are disclosed. In one aspect, the display device includes a substrate including a display area and a pad area, a semiconductor layer formed over the substrate, and an insulating layer formed over the semiconductor layer. The display device also includes a metal wire formed over the insulating layer in the display area and a pad electrode formed over the insulating layer in the pad area, wherein the pad electrode is electrically connected to the metal wire. The display device further includes a pattern formed between an edge of the substrate and an end portion of the pad electrode. The edge of the substrate is adjacent to the pad electrodes and the pattern is spaced apart from the end portion of the pad electrode.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims priority to and the benefit of Korean Patent Application No. 10-2013-0156140, filed on Dec. 16, 2013, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.

BACKGROUND

The described technology generally relates to a display device including a pattern on a pad area and to a manufacturing method thereof.

2. Description of the Related Technology

Flat panel displays (FPDs) such as liquid crystal displays (LCDs) and organic light-emitting diode (OLED) displays include a pair of electric field generating electrodes and an electro-optical active layer interposed therebetween. A liquid crystal layer is included as the electro-optical active layer in LCDs and an organic light-emitting layer is included as the electro-optical active layer in OLED displays.

One of the electrodes is connected to a switching element so as to receive an electrical signal. The electro-optical active layer converts the electrical signal into an optical signal so that an image is displayed.

SUMMARY OF CERTAIN INVENTIVE ASPECTS

One inventive aspect is a display device including a pattern on an end portion of a pad area, the pattern being configured to substantially prevent side moisture penetration and a lifting phenomenon of a protective layer, and a method of manufacturing the display device.

Another aspect is a display device including a substrate including a display area and a pad area, a semiconductor layer formed on the substrate, an insulating layer formed on the semiconductor layer, a metal wire formed on the insulating layer of the display area, a pad electrode formed on the insulating layer of the pad area, the pad electrode being connected to the metal wire, and a pattern spaced apart from an end portion of the pad electrode of the pad area.

The pattern may be formed on the insulating layer.

The display device may further include a protective layer on the metal wire and the pad electrode, the protective layer being configured to cover a part of the pattern.

The metal wire, the pad electrode, and the pattern may be formed on the same layer.

The protective layer may have a contact hole configured to expose the pad electrode.

The display device may further include a driver formed on the protective layer, which is connected to the pad electrode through the contact hole, and an anisotropic conductive film (ACF) formed between the protective layer and the driver.

The pattern may be formed on the same layer as the semiconductor layer.

The insulating layer may include a protrusion on an area corresponding to the pattern.

The display device may further include a protective layer formed on the metal wire and the pad electrode, which is configured to cover a part of the protrusion.

The pattern may have a line shape.

The pattern may extend along a side of the pad area.

The metal wire may be a source electrode, a drain electrode, a storage electrode, or a data line.

Another aspect is a method of manufacturing a display device including preparing a substrate including a display area and a pad area, forming a semiconductor layer on the substrate, forming a gate insulating layer on the semiconductor layer, forming a gate electrode and a gate line on the gate insulating layer, forming an insulating layer on the gate electrode and the gate line, forming a source electrode, a drain electrode, and a data line on the insulating layer of the display area, and forming a pad electrode and a pattern on the insulating layer of the pad area, and forming a protective layer on the source electrode, the drain electrode, and the data line.

In the forming of the protective layer, the protective layer may cover a part of the pattern.

In the forming of the pattern, the pattern may be formed to be spaced apart from an end portion of the pad electrode.

Another aspect is a method of manufacturing a display device including preparing a substrate including a display area and a pad area, forming a semiconductor layer on the display area of the substrate, and forming a pattern on the pad area of the substrate, forming a gate insulating layer on the semiconductor layer, forming a gate electrode and a gate line on the gate insulating layer, forming an insulating layer on the gate electrode and the gate line, forming a source electrode, a drain electrode, and a data line on the insulating layer of the display area, and forming a pad electrode on the insulating layer of the pad area, and forming a protective layer on the source electrode, the drain electrode, and the data line.

Another aspect is a display device including a substrate including a display area and a pad area, a semiconductor layer formed over the substrate, an insulating layer formed over the semiconductor layer, a metal wire formed over the insulating layer in the display area, a pad electrode formed over the insulating layer in the pad area, wherein the pad electrode is electrically connected to the metal wire, and a pattern formed between an edge of the substrate and an end portion of the pad electrode, wherein the edge of the substrate is adjacent to the pad electrodes, and wherein the pattern is spaced apart from the end portion of the pad electrode.

The pattern is formed on the insulating layer. The display device further includes a protective layer formed over the metal wire and the pad electrode, wherein the protective layer covers at least a portion of the pattern. The metal wire, the pad electrode, and the pattern are formed on the same layer. The protective layer has a contact hole at least partially overlapping the pad electrode. The display device further includes a pixel circuit, a driver formed over the protective layer and electrically connected to the pad electrode via the contact hole, wherein the driver is configured to drive the pixel circuit, and an anisotropic conductive film interposed between the protective layer and the driver. The pattern and the semiconductor layer are formed on the same layer. The insulating layer includes a protrusion in an area overlapping the pattern. The display device further includes a protective layer formed over the metal wire and the pad electrode, wherein the protective layer covers a portion of the protrusion. The pattern has a substantially line shape. The pattern extends along the edge of the substrate. The metal wire includes one or more of a source electrode, a drain electrode, a storage electrode, and a data line.

Another aspect is a method of manufacturing a display device, the method including providing a substrate including a display area and a pad area, forming a semiconductor layer over the substrate, forming a gate insulating layer over the semiconductor layer, forming a gate electrode and a gate line over the gate insulating layer, forming an insulating layer over the gate electrode and the gate line, forming a source electrode, a drain electrode, and a data line over the insulating layer in the display area, forming a pad electrode and a pattern over the insulating layer in the pad area, wherein the pattern is interposed between the pad electrode and an edge of the substrate and wherein the edge of the substrate is adjacent to the pad electrode, and forming a protective layer over the source electrode, the drain electrode, and the data line.

The protective layer covers a portion of the pattern. The pattern is spaced apart from an end portion of the pad electrode.

Another aspect is a method of manufacturing a display device, the method including providing a substrate including a display area and a pad area, forming a semiconductor layer in the display area of the substrate, forming a pattern in the pad area of the substrate, forming a gate insulating layer over the semiconductor layer, forming a gate electrode and a gate line over the gate insulating layer, forming an insulating layer over the gate electrode and the gate line, forming a source electrode, a drain electrode, and a data line over the insulating layer in the display area, forming a pad electrode over the insulating layer in the pad area, wherein the pattern is closer to an edge of the substrate than the pad electrode and wherein the edge of the substrate is adjacent to the pad electrode, and forming a protective layer over the source electrode, the drain electrode, and the data line.

The protective layer is formed over a portion of the pad electrode so as to expose the pad electrode and wherein the protective layer at least partially overlaps the pattern.

Another aspect is an organic light-emitting diode (OLED) display including a substrate including a display area and a pad area, a plurality of pixels formed in the display area, each pixel including a thin film transistor (TFT) and an OLED, an insulating layer formed in the display area and the pad area, a plurality of pad electrodes formed over the insulating layer in the pad area and electrically connected to the TFTs, and a spacer formed closer to an edge of the substrate than the pad electrodes, wherein the edge of the substrate is adjacent to the pad electrodes.

The insulating layer is formed over the spacer so as to form a protrusion in the insulating layer. The spacer has a substantially line shape.

According to at least one embodiment, the display device may prevent bubbles from being formed between the insulating layer and the anisotropic conductive film, lifting of the protective layer, and moisture penetration into the end portion of the pad area.

DETAILED DESCRIPTION OF CERTAIN INVENTIVE EMBODIMENTS

Flat panel displays include a display area that displays images and a non-display area adjacent to and surrounding the display area on one substrate. Pixels including thin film transistors (TFTs) are arranged in the display area and pad electrodes configured to transmit electrical signals received from a driving circuit to a pixel area are formed on a pad area in the non-display area.

Different configurations for connecting the pad area to an external circuit can be employed. Examples of such configurations include a flexible printed circuit (FPC), chip on glass (COG), or tape carrier package (TCP) which are applied to the pad area. An FPC is connected to the pad electrode by an adhesive such as anisotropic conductive film (ACF).

A protective layer is formed to cover the pad electrode in the pad area and is not formed on an end portion of the pad area in order to ensure separation of display cells when they are cut from a mother substrate. However, when the protective layer is not formed on the end portion, moisture more easily penetrates through the end portion and the protective layer can be lifted off of the substrate.

Advantages and features of the described technology and methods for achieving them will be made clear from the embodiments described in detail below with reference to the accompanying drawings. The described technology may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the described technology to those skilled in the art. The described technology is merely defined by the scope of the claims. Therefore, well-known constituent elements, operations and techniques are not described in detail in the embodiments in order to prevent the described technology from being obscurely interpreted. Like reference numerals refer to like elements throughout the specification.

The spatially relative terms “below”, “beneath”, “lower”, “above”, “upper”, and the like, may be used herein for ease of description to describe the relations between one element or component and another element or component as illustrated in the drawings. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation, in addition to the orientation depicted in the drawings. For example, when a device shown in the drawings is turned over, the component positioned “below” or “beneath” another component in the drawings is then located “above” the other component. Accordingly, the illustrative term “below” may include both the lower and upper positions. The device may also be oriented in the other direction, and thus the spatially relative terms are to be interpreted differently depending on the orientations. As used herein, the term “connected” includes “electrically connected.”

The terminology used herein is for the purpose of describing particular embodiments only and is not construed as limiting the described technology. As used herein, the singular forms “a,” “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” and/or “comprising,” when used in this specification, specify the presence of mentioned component, step, operation and/or element, but do not exclude the presence or addition of one or more other components, steps, operations and/or elements.

Hereinafter, a display device according to an embodiment will be described in detail with reference toFIGS. 1 to 4. Depending on the embodiment, the display device includes a liquid crystal display (LCD) or an organic light-emitting diode (OLED) display. Hereinafter, the display device is described as an OLED display.

Referring toFIG. 1, the OLED display100includes a substrate101, an encapsulation substrate201, and a sealing member300, but the described technology is not limited thereto. A substrate body111may be encapsulated by an encapsulation film other than the illustrated encapsulation substrate201.

The substrate101includes a display area DA that displays images via light emission and a non-display area NDA surrounding the display area DA. An OLED, a thin film transistor (TFT) configured to drive the OLED, and a wire are formed in the display area DA. The non-display area NDA includes a pad area PA where a plurality of pad electrodes400are formed. The pad electrodes400receive external signals and transmit the received signals to drive the OLED to emit light.

The display area DA and the pad area PA will be described in detail below with reference toFIGS. 2 and 3.

In the accompanying drawings, the OLED display is illustrated as an active matrix (AM) OLED display having a 2Tr-1Cap structure including two thin film transistors (TFTs)10and20and one capacitor80in each pixel of the display area corresponding to “DA” shown inFIG. 1, but embodiments of the described technology are not limited thereto.

Thus, in other embodiments, the OLED display includes three or more TFTs and/or two or more capacitors in each pixel and has various structures including additional wires that are not illustrated. As used herein, a pixel refers to the smallest unit that displays an image and the display area DA displays images via a plurality of pixels.

Referring toFIGS. 2 and 3, the substrate101includes a switching TFT10, a driving TFT20, a capacitor80, and an OLED70in each pixel included in the substrate body111. The substrate101further includes a gate line151extending in one direction, a data line171and a common power source line172that are insulated from each other and cross the gate line151.

Each pixel area is defined by the intersection between gate line151, the data line171, and the common power source line172, however, the described technology is not limited thereto.

The OLED70includes a pixel electrode710, an organic light-emitting layer720on the pixel electrode710, and a common electrode730on the organic light-emitting layer720. One or more pixel electrode710is formed in each pixel and thus the substrate101includes a plurality of pixel electrodes710spaced apart from each other.

In some embodiments, the pixel electrode710is an anode which is a hole injection electrode and the common electrode730is a cathode which is an electron injection electrode. However, the described technology is not limited thereto, and in other embodiments the pixel electrode710is the cathode and the common electrode730is the anode.

Holes and electrons injected into the organic light-emitting layer720are recombined with each other to form an exciton and light is emitted when the exciton decays from an excited state to a ground state.

The capacitor80includes a pair of storage electrodes158and178with an insulating layer160interposed therebetween. The insulating layer160is a dielectric. The capacitance of the capacitor80is determined by the electric charge stored in the capacitor80and the voltage between the pair of storage electrodes158and178.

The switching TFT10includes a switching semiconductor layer131, a switching gate electrode152, a switching source electrode173, and a switching drain electrode174. The driving TFT20includes a driving semiconductor layer132, a driving gate electrode155, a driving source electrode176, and a driving drain electrode177.

The switching TFT10is used as a switching element configured to select a desired pixel to emit light. The switching gate electrode152is connected to the gate line151. The switching source electrode173is connected to the data line171. The switching drain electrode174is spaced apart from the switching source electrode173and is connected to the first storage electrode158.

The driving TFT20applies driving power to the pixel electrode710so that the organic light-emitting layer720of the OLED70in a selected pixel emits light. The driving gate electrode155is connected to the first storage electrode158that is connected to the switching drain electrode174. The driving source electrode176and the second storage electrode178are connected to the common power source line172.

The driving drain electrode177is connected to the pixel electrode710of the OLED70through a first contact hole181.

With the above-described structure, the switching TFT10is operated by a gate voltage applied to the gate line151so as to transmit a data voltage received from the data line171to the driving TFT20.

A voltage equivalent to the difference between a common voltage applied from the common power source line172to the driving TFT20and the data voltage transmitted from the switching TFT10and stored in the capacitor80is applied to the OLED. Additionally, a current corresponding to the voltage stored in the capacitor80flows to the OLED70through the driving TFT20such that the OLED70emits light.

The display area DA and the pad area PA will be described below in greater detail with reference toFIGS. 2 and 3.

The OLED70, the driving TFT20, the capacitor80, the data line171, and the common power source line172illustrated inFIG. 3will be described below. The switching semiconductor layer131, the switching gate electrode152, the switching source electrode173, and the switching drain electrode174of the switching TFT10respectively have substantially the same laminated structure as the driving semiconductor layer132, the driving gate electrode155, the driving source electrode176, and the driving drain electrode177of the driving TFT20and thus further description thereof will not be provided.

The substrate body111may include an insulating substrate formed of glass, quartz, ceramic, or plastic. However, the described technology is not limited thereto and the substrate body111may also include a metal substrate formed of stainless steel, or the like.

A buffer layer120is formed on the substrate body111. The buffer layer120planarizes the top surface of the substrate body and acts to block the penetration of undesirable elements such as impurities. The buffer layer120may include various materials to achieve the above functions. For instance, the buffer layer120may include one or more material selected from the group of silicon nitride (SiNx), silicon oxide (SiO2), and silicon oxynitride (SiOxNy). However, the buffer layer120is not necessary in every embodiment and may be omitted based on the configuration or material of the substrate body111and process conditions thereof.

The driving semiconductor layer132is formed on the buffer layer120in the display area DA. The driving semiconductor layer132includes one or more semiconductor material selected from the group of polycrystalline silicon, amorphous silicon, and oxide semiconductor. Further, the driving semiconductor layer132includes a channel area135that is not doped with impurities, and in some embodiments, p-doped source and drain areas136and137on opposing sides of the channel area135. In these embodiments, p-type impurities such as boron B are used as dopant ions, and for example, B2H6can be used as a dopant. Herein, the specific impurities used vary depending on the configuration of the TFT. In other embodiments, the source and drain areas136and137are n-doped.

A gate insulating layer140including silicon nitride or silicon oxide is formed on the driving semiconductor layer132. The gate insulating layer140may include one or more material selected from the group of tetraethyl orthosilicate (TEOS), silicon nitride (SiNx), and silicon oxide (SiO2). For example, the gate insulating layer140may have a double layer structure in which a silicon nitride layer having a thickness of about 40 nm and a tetraethyl orthosilicate layer having a thickness of about 80 nm are sequentially laminated, but the structure and thickness of the gate insulating layer140is not limited thereto.

The driving gate electrode155, the gate line151, and the first storage electrode158are formed on the gate insulating layer140. The driving gate electrode155overlaps at least a part of the driving semiconductor layer132, namely the channel area135. The driving gate electrode155substantially prevents the channel area135from being doped with impurities when the source and drain areas136and137of the driving semiconductor layer132are doped.

The gate electrode155and the first storage electrode158are formed on the same layer and are formed of the same metal material. The material may include one or more material selected from the group of molybdenum (Mo), chromium (Cr), and tungsten (W). In some embodiments, the gate electrode155and the first storage electrode158are formed of molybdenum (Mo) or molybdenum alloys.

The insulating layer160covers the driving gate electrode155and is formed on the gate insulating layer140. The insulating layer160may be an interlayer insulating layer. The insulating layer160may be formed of silicon nitride or silicon oxide in the same way as the gate insulating layer140. The gate insulating layer140and the insulating layer160have contact holes exposing the source area136and the drain area137of the driving semiconductor layer132.

The driving source electrode176, the driving drain electrode177, the data line171, the power source line172, and the second storage electrode178are formed on the insulating layer160in the display area DA. The driving source electrode176and the driving drain electrode177are respectively connected to the source area136and the drain area137of the driving semiconductor layer132through the contact holes.

In detail, the driving source electrode176, the driving drain electrode177, the data line171, the common power source line172, and the second storage electrode178may be formed of refractory metals including one or more material selected from the group of molybdenum, chromium, tantalum and titanium, or alloys thereof, and may have a multilayer structure in which a refractory metal layer and a low resistance conductive layer are included. The multilayer structure may include, for example, a double layer consisting of a chromium or molybdenum (or alloys thereof) lower layer and an aluminum (or alloys thereof) upper layer, and a triple layer consisting of a molybdenum (or alloys thereof) lower layer, an aluminum (or alloys thereof) intermediate layer, and a molybdenum (or alloys thereof) upper layer.

The driving source electrode176, the driving drain electrode177, the data line171, the common power source line172, and the second storage electrode178may be formed of many different conductive materials besides the above-described materials.

Accordingly, the driving TFT20includes the driving semiconductor layer132, the driving gate electrode155, the driving source electrode176, and the driving drain electrode177and is formed in the display area DA. The structure of the driving TFT20is not limited thereto, and may be configured in various ways.

A plurality of pad electrodes400are formed on the insulating layer160in the pad area PA. The pad electrodes400may be formed by the same process as the driving source electrode176, the driving drain electrode177and the like in the display area DA, and may be formed of the same material and on the same layer.

A pattern or spacer500is formed on the insulating layer and is separated at a predetermined distance from end portions of the pad electrodes400. The pattern500may be formed by the same process as the pad electrode400in the pad area PA and the driving source electrode176, the driving drain electrode177, and the like in the display area DA, and may be formed of the same material and on the same layer.

According to some embodiments, the pattern500has a line shape. The pattern500extends across the ends the pad electrodes400, namely along a lower part of the pad area PA as illustrated inFIG. 1. The pattern500is spaced apart from the end portions of the pad electrodes400and extends substantially parallel to an imaginary line connecting the end portions of the pad electrodes400on a side surface of the pad area PA. Referring toFIG. 1, the pattern500extends substantially linearly along the entire lower portion of the pad area PA. The pattern500is formed to have the same height as the pad electrode400in the pad area PA and the driving source electrode176, the driving drain electrode177, and the like in the display area DA.

A protective layer180covers the driving source electrode176, the driving drain electrode177, and the pad electrode400and is formed on the insulating layer160. The protective layer180may be formed of an organic material such as polyacryl, polyimide, or the like. The protective layer180may be a planarization layer.

The protective layer180may be formed of one or more material selected from the group of polyacrylate resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylene ether resin, polyphenylene sulfide resin, and benzocyclobutene (BCB).

The protective layer180has a first contact hole181exposing the driving drain electrode177and a second contact hole182exposing the pad electrode400.

According to the embodiment, the protective layer180covers a portion of the pattern500or is formed only between the pattern500and the pad electrode400. Thus, the protective layer180is not necessarily formed on the pattern500.

When the pattern500is not formed in the display device, the protective layer forms a step on the insulating layer160at the end of the device, thereby generating a weak point where moisture can penetrate through the side of the protective layer180and a lifting phenomenon separating the protective layer180from the insulating layer160.

However, according to at least one embodiment, the penetration of moisture through the side of the display and the lifting of the protective layer180are substantially prevented due to the structure of the protective layer180and/or the pattern500described above.

Referring back toFIGS. 3 and 4, the pixel electrode710is formed on the protective layer180in the display area DA and the pixel electrode710is connected to the driving drain electrode177through the first contact hole181in the protective layer180.

A conductive adhesive member800is formed on the pad electrode400exposed by the second contact hole182in the protective layer180in the pad area PA.

The conductive adhesive member800includes an insulating adhesive material810and conductive particles820. The insulating adhesive material810is cured by light and heat so as to bond a driver600to the substrate101. The conductive particles820are dispersed in the insulating adhesive material810so as to electrically connect the driver600to the pad electrode400. The conductive adhesive member800may include, for example, an anisotropic conductive film (ACF). The driver600may include, for example, flexible printed circuit connected to an external circuit substrate so as to transmit external signals, chip on glass (COG), or tape carrier package (TCP). In some embodiments, the driver600is a data driver that applies data signals to the pixels.

A pixel defining layer190covers a portion of the pixel electrode710and is formed on the protective layer180. The pixel defining layer190has an opening199exposing a portion the pixel electrode710.

The pixel electrode710is forming in an area corresponding to the opening199in the pixel defining layer190. The pixel defining layer190may be formed of polyacrylate resin, polyimide resin, or the like.

The organic light-emitting layer720is formed on the pixel electrode710in the opening199of the pixel defining layer190and the common electrode730is formed on the pixel defining layer190and the organic light-emitting layer720.

As described above, the OLED70includes the pixel electrode710, the organic light-emitting layer720, and the common electrode730.

The pixel electrode710or the common electrode730may be formed of a transparent conductive material and the other may be formed of transflective or reflective conductive material. According to the materials included in the pixel electrode710and the common electrode730, an OLED display900can be classified into a top-emission type, a bottom-emission type, or a dual-emission type.

The transparent conductive material may include one or more material selected from the group of Iridium Tin Oxide (ITO), Indium Zinc Oxide (IZO), zinc oxide (ZnO), and indium oxide (In2O3). The reflective material may include one or more material selected from the group of lithium (Li), Calcium (Ca), lithium fluoride/Calcium (LiF/Ca), lithium fluoride/aluminum (LiF/Al), aluminum (Al), silver (Ag), magnesium (Mg), and gold (Au).

The organic light-emitting layer720may include a low molecular weight organic material or a high molecular weight organic material. Further, the organic light-emitting layer720may be formed to be a multilayer including at least one of an emission layer, hole injection layer (HIL), hole transporting layer (HTL), electron transporting layer (ETL), and electron injection layer (EIL). In some embodiments, the hole injection layer (HIL) is formed on the pixel electrode710serving as an anode, and the hole transporting layer (HTL), emission layer, electron transporting layer (ETL), and electron injection layer (EIL) are sequentially laminated on the hole injection layer (HIL).

According to some embodiments, the organic light-emitting layer720is formed only in the opening199of the pixel defining layer190, but the described technology is not limited thereto. At least one layer of the organic light-emitting layer720can be formed between the pixel defining layer190and the common electrode730as well as on the pixel electrode710in the opening199of the pixel defining layer190. In more detail, the hole injection layer (HIL), hole transporting layer (HTL), electron transporting layer (ETL), and electron injection layer (EIL) of the organic light-emitting layer720can also be formed on areas other than the opening199via deposition with an open mask, and the emission layer of the organic light-emitting layer720can be formed in each opening199via deposition with a fine metal mask (FMM).

Meanwhile, when the display device a liquid crystal display (LCD), the pixel electrode710is physically and electrically connected to the driving drain electrode177through the first contact hole181and receives a data voltage from the driving drain electrode177. The pixel electrode710receiving the data voltage generates an electric field, together with the common electrode (not shown) receiving common voltage, thereby controlling the orientation of liquid crystal molecules included in a liquid crystal layer (not shown) between the two electrodes. The pixel electrode710and the common electrode form a capacitor (hereinafter referred to as a “liquid crystal capacitor”) so as to maintain the applied voltage after a thin film transistor is turned off.

Hereinafter, a method of manufacturing an OLED display according to an embodiment will be described with reference toFIGS. 3 and 5Ato5F. Further description of the OLED display, which is previously described, will not be provided.

FIGS. 5A to 5Fare cross-sectional views showing a method of manufacturing an OLED display according to an embodiment.

As illustrated inFIG. 5A, a substrate main body111including a display area and a pad area is prepared. A buffer layer120is formed on the substrate main body111. Inorganic insulating materials, e.g., silicon nitride (SiNx), silicon oxide (SiO2), or the like, are deposited on the substrate main body111by a known deposition method such as plasma-enhanced chemical vapor deposition (PECVD) so as to form the buffer layer120.

A driving semiconductor layer132is formed on the buffer layer120. The driving semiconductor layer132may be formed by a photolithography process. A gate insulating layer140is formed on the driving semiconductor layer132. The gate insulating layer140may include a silicon nitride layer and a tetraethyl orthosilicate (TEOS) layer on the silicon nitride layer. The above inorganic layers may be formed by a known method such as the PECVD.

A driving gate electrode155, a gate line151, and a first storage electrode158are formed on the gate insulating layer140. An insulating layer160is formed on the driving gate electrode155, the gate line151, and the first storage electrode158and thereafter contact holes exposing a source area136and a drain area137of the driving semiconductor layer132are formed in the insulating layer160. The insulating layer160may include one or more material selected from the group of tetraethyl orthosilicate (TEOS), silicon nitride (SiNx), and silicon oxide (SiOx) in the same way as the gate insulating layer140, and may be formed by a known method such as the PECVD.

As illustrated inFIG. 5B, a metal layer40ais coated on the insulating layer160and thereafter a photoresist50ais coated on the metal layer40a. According to some embodiments, the photoresist50ahas a thickness of about 1000 nm to about 2000 nm. The photoresist50ais exposed to light by using a mask60. However, in other embodiments, the photoresist50ahas a thickness of less than about 1000 nm or greater than about 2000 nm.

As illustrated inFIG. 5C, the photoresist50ais developed to form a photoresist pattern50b. The photoresist pattern50bis formed in areas where a driving source electrode176, a driving drain electrode177, a data line171, a common power source line172, a second storage electrode178, a pad electrode400, and a pattern500will be formed.

As illustrated inFIG. 5D, the metal layer40ais etched via an etching process using the photoresist pattern50bso as to form the driving source electrode176, the driving drain electrode177, the data line171, the common power source line172, the second storage electrode178, the pad electrode400, and the pattern500.

As illustrated inFIG. 5E, the photoresist pattern50bis stripped by a dry etching or wet etching process using a plasma.

As illustrated inFIG. 5F, a protective layer180is formed on the driving source electrode176, the driving drain electrode177, the data line171, the common power source line172, the second storage electrode178, and the pad electrode400. In some embodiments, the protective layer180covers a portion of the pattern500. A first contact hole exposing the driving drain electrode177and a second contact hole exposing the pad electrode400are formed in the protective layer180.

As illustrated inFIG. 3, a pixel electrode710is formed on the protective layer180and thereafter a pixel defining layer190, an organic light-emitting layer720, and a common electrode730are sequentially formed.

Hereinafter, a display device according to another embodiment will be described with reference toFIG. 6. Only those configurations of the display device which are different from that of the previously described display device will be described below. Therefore, a pad area PA that is different from that of the previous embodiment will be discussed below.

FIG. 6is cross-sectional views showing a display area, taken along line A-A′ ofFIG. 2, and a pad area, taken along line B-B′ ofFIG. 1together, according to another embodiment.

A pattern500is formed on the buffer layer120in the pad area PA. The pattern500may be formed by the same process as the driving semiconductor layer132of the display area DA and may be formed of the same material and on the same layer.

A gate insulating layer140is formed on the pattern500in the pad area PA. The gate insulating layer140protrudes from the buffer layer farther in an area corresponding to the area where the pattern500is formed.

An insulating layer160is formed on the gate insulating layer140in the pad area PA. The insulating layer160of the pad area PA also protrudes farther over the pattern500.

The protrusion of the insulating layer160performs the same function as the pattern500of the previous embodiment. In other words, the penetration of moisture from the side and lifting phenomenon of the protective layer180are substantially prevented due to the configuration of the protective layer180and the protrusion of the insulating layer160.

When the pattern500is not formed, a step is formed at an end portion of the insulating layer160due to the protective layer180, thereby causing the penetration of moisture between the protective layer180and insulating layer160and lifting of the protective layer180from the insulating layer. However, these problems can be prevented by forming the protrusion in the insulating layer160.

From the foregoing, it will be appreciated that various embodiments of the invention have been described herein for purposes of illustration, and that various modifications may be made without departing from the scope and spirit of the invention. Accordingly, the various embodiments disclosed herein are not intended to be limiting, with the true scope and spirit being indicated by the following claims, and equivalents thereof.