Performing memory copy operations by a processor by employing a compression hardware device

The described technology is generally directed towards performing memory copy operations. According to an embodiment, a system can comprise a memory that stores computer executable components, a compression component, and a processor that can execute the computer executable components stored in the memory. The computer executable components comprise an instruction decoder that can receive an instruction from a host application, resulting in a decoded instruction. The components can also comprise a compression component controller to control the compression component, and a memory copier to employ the compression component controller to control the compression component to copy the value from the first memory location to a second memory location in the second memory, in accordance with the decoded instruction.

TECHNICAL FIELD

The subject application generally relates to microprocessor operations, and, for example, to memory copy operations, and related embodiments.

BACKGROUND

The performance of memory copy commands can, in some circumstances, be a significant factor in the performance of a software system. Memory operations, including those that can perform memory operations on blocks of memory, like memcpy, are generally synchronous, blocking I/O operations, which rely on thread-based concurrency, e.g., every thread allocated uses up resources, more context switching will happen between them than with other types of operations, and the OS has a maximum number of threads. Further, if data to be copied is not already cached memory copying operations, such as memcpy, can become highly inefficient, e.g., because program execution is paused until the data is fetched onto the cache registers. This can be further aggravated by varying size data packets received from a network being pointed to by data to be copied. In addition, copying network packet data from memory can be difficult because this data can be scattered and distributed anywhere in a host memory while being received from the network. Even in other circumstances with different execution characteristics, e.g., asynchronous and/or non-blocking, memory copy commands can divert processing resources from other important activities performed by application threads.

Based at least on these characteristics of the execution of memory copy commands, in some host applications, these commands can be highly Central Processing Unit (CPU) expensive and consume more computational cycles than other types of operations.

SUMMARY

According to an embodiment, a system can comprise a memory that stores computer executable components, a compression component, and a processor that can execute the computer executable components stored in the memory. The computer executable components comprise an instruction decoder that can receive an instruction from a host application, resulting in a decoded instruction. The components can also comprise a compression component controller that can control the compression component, and a memory copier to employ the compression component controller to control the compression component to copy the value from the first memory location to a second memory location in the second memory, in accordance with the decoded instruction.

According to another embodiment, a computer-implemented method can comprise receiving, by a compression component comprising a first processor, from a second processor, an instruction from a host application to copy a value from a first memory location to a second memory location in a memory coupled to the second processor. The method can further comprise copying, by the compression component, the value from the first memory location to the second memory location, in accordance with the instruction. The method can further comprise communicating, by the compression component, a result of the copying to the second processor.

According to another embodiment, a computer program product is provided. The computer program product can comprise machine-readable storage medium comprising executable instructions that, when executed by a processor, facilitate performance of operations comprising receiving an instruction from a host application, resulting in a decoded instruction, and controlling a compression component to copy a value from a first memory location to a second memory location, in accordance with the decoded instruction.

Other embodiments may become apparent from the following detailed description when taken in conjunction with the drawings.

DETAILED DESCRIPTION

Various aspects described herein are generally directed to facilitating memory copy operations by a processor by employing a compression component. As will be understood, the implementation(s) described herein are non-limiting examples, and variations to the technology can be implemented.

Reference throughout this specification to “one embodiment,” “an embodiment,” “one implementation,” “an implementation,” etc. means that a particular feature, structure, or characteristic described in connection with the embodiment/implementation is included in at least one embodiment/implementation. Thus, the appearances of such a phrase “in one embodiment,” “in an implementation,” etc. in various places throughout this specification are not necessarily all referring to the same embodiment/implementation. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments/implementations.

The computer processing systems, computer-implemented methods, apparatus and/or computer program products described herein employ hardware and/or software to solve problems that are highly technical in nature (e.g., reconfiguring hardware, accessing memory locations), that are not abstract and cannot be performed as a set of mental acts by a human. For example, a human, or even a plurality of humans, cannot efficiently, accurately and effectively, manually perform multithreaded memory operations to manipulate data with the same level of accuracy and/or efficiency as the various embodiments described herein.

FIG. 1illustrates a block diagram of an example, non-limiting system100that can facilitate memory copy operations by a processor by employing compression component130, in accordance with various aspects and implementations of the subject disclosure.

In one or more embodiments, system100includes a server150, which can have memory116and a processor190. Compression component130is coupled to processor190, and can provide compression functions that can offer a range of benefits including, but not limited to storage capacity savings increased network transmission speed. As depicted, compression component130can be a part of server150, or can be independent but accessible by processor190. Compression component can also be used by other hardware devices, including compression client application135, which can also use functions provided by compression component130.

It should be noted that compression component130can be a device with a separate processor (not shown), with computer-executable components customized with algorithms that can provide compression functions, e.g., implemented in combination of hardware and software to provide the functions of compression component130described herein.

An example system that can use an instance of compression component130is a storage system that can facilitate data replication, data backup, and data recovery. Generally speaking, storage Systems can copy host data from data servers to local storage or to primary and secondary storage located in different geographical locations, e.g., for disaster recovery and fault tolerance. The data storage systems can be connected in a variety of ways, including but not limited to, employing an Ethernet network. Storage systems can have compression capable components that are used to enable applications to compress data. Replication systems, a type of storage system, can also use a compression component to compress replication data to reduce the network bandwidth usage.

An example of a storage system that can employ various features described herein, is the VMAX All Flash® system provided by DELL EMC. In some implementations of VMAX, a compression component130that can include software and hardware elements can be used to improve storage capacity, e.g., the VMAX Adaptive Compression Engine (ACE) provided by DELL EMC. Other types of direct connections to storage processor and data mover components are also available, e.g., Asteroid Compression Hardware based on the XR8204 Compression Coprocessor provided by Exar, Corp.

In another example of the use of system100described below, processor190can perform a memory operation that is unrelated to the operation of compression component130, e.g., an operation to copy a value from a first memory location M1to a second memory location M2, e.g. a block memory copy operation such as memcpy.

In one or more embodiments processor190can provide a move instruction160to compression component130, and this component can access memory116and perform the memory copy operation, avoiding the above described access to memory116by processor190, and moving a value at memory location M1to memory location M2. As described in more detail withFIGS. 2-6below, one or more embodiments can signal compression component130to only perform a memory copy operation which can temporarily disable certain functions of compression component130, and use compression component130to directly access a value in the first memory location and copy the value to a second memory location.

In some embodiments, processor190can comprise one or more of a central processing unit, multi-core processor, microprocessor, dual microprocessors, microcontroller, System on a Chip (SOC), array processor, vector processor, and/or another type of processor. Further examples of processor190are described below with reference to processing unit1014andFIG. 10. Such examples of processor190can be employed with any embodiments of the subject disclosure.

As discussed further below withFIG. 10, in some embodiments, memory116can comprise volatile memory (e.g., random access memory (RAM), static RAM (SRAM), dynamic RAM (DRAM), etc.) and/or non-volatile memory (e.g., read only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), etc.) that can employ one or more memory architectures. Further examples of memory116are described below with reference to system memory1016andFIG. 10. Such examples of memory116can be employed to implement any embodiments of the subject disclosure. It should also be noted that, as described further below, memory116can comprise memory buffers used to pass values between components.

According to multiple embodiments, processor160can comprise one or more types of processors and/or electronic circuitry that can implement one or more computer and/or machine readable, writable, and/or executable components and/or instructions that can be stored on memory116. For example, processor160can perform various operations that can be specified by such computer and/or machine readable, writable, and/or executable components and/or instructions including, but not limited to, logic, control, input/output (I/O), arithmetic, and/or the like.

FIG. 2illustrates a more detailed example, non-limiting system200, similar to the system discussed above withFIG. 1. For purposes of brevity, description of like elements and/or processes employed in other embodiments is omitted.

As depicted, instruction decoder292can receive an instruction from host application205to move a value from memory location M1to memory location M2. In the example implementation depicted, processor190receives the instruction and, instead of accessing memory116directly, as described above, executes the instruction by employing memory copier296to interface with compression component130by employing compression component controller234. In this example, the instruction from host application205comprises a block copy command, similar to memcpy, noted above.

An example of the approach used by compression component controller is discussed withFIG. 5below, and after receiving the instruction from host application205, compression component130can use a direct memory access (DMA) capability to retrieve a value from the specified memory location M1. In one or more embodiments, compression component130can have this DMA capability to enable functions for which compression component130is directed, e.g., retrieving one or more values from memory116to enable compression of the values.

Continuing this example, once retrieved from memory location M1, DMA component270and compression component can, instead of performing any operations on the value (e.g., compression), copy the value to memory location M2. In one or more embodiments, compression component130can have this DMA capability because completion queue can used alternatively by compression component130to output results of a function, e.g., compression. An alternative memory location to copy the value includes cache295.

FIG. 3illustrates an example flow diagram for a method300that can facilitate memory copy operations by a processor by employing compression component130. For purposes of brevity, description of like elements and/or processes employed in other embodiments is omitted.

Method300begins with host application205instructing processor190to copy a value from memory location M1to memory location M2. The example below details one approach used by processor190to employ memory copier296to convey the instruction to compression component130.

One approach to implementing compression component controller234uses compression component task queue310to receive the instructions, e.g., using command and value descriptors311that can specify the memory copy command to be performed by compression component130, including source and destination memory locations. Upon receiving the instructions, compression component can employ DMA component270to retrieve and store the value, as described withFIG. 2above.

FIG. 4depicts a flow diagram showing an example use of the compression component130task queue210, in accordance with one or more embodiments. For purposes of brevity, description of like elements and/or processes employed in other embodiments is omitted.

In one or more embodiments, task queue210can be used by compression component130to receive tasks, both tasks requiring compression or another additionally supported specialized function (e.g., encryption and authentication) and tasks described herein, where a block copy command is performed by compression component130. One approach to facilitating this dual use is to, as depicted inFIG. 4, determine, at block430, the type of task, e.g., a task using engines of the compression component130, e.g., compression, encryption, and authentication, or a memory copy432task.

When the task type is compression, encryption, or authentication434task, the task is performed according to the standard features of compression component130(although this component is specified as for compression, it should be noted that other types of functions can be performed by this component). It should be noted that, various embodiments described herein describe employing a compression component not only for data compression, but also as a way of enabling particular types of data memory copy operations not normally performed.

When the task is determined to be a memory copy432command, one or more embodiments can temporarily disable450the function engines of the compression component, e.g., as depicted inFIG. 5and discussed below, one or more of a compression engine, an encryption engine, or an authentication engine. In one or more embodiments, this disabling may improve performance of the memory copy task.

FIG. 5illustrates a block diagram of an interface portion of a system facilitating memory copy operations by a processor by employing compression component130, in accordance with or more embodiments. For purposes of brevity, description of like elements and/or processes employed in other embodiments is omitted.

As noted above, system100can include a compression component controller234that, for memory copy operations described above, can relay instructions to, and receive results from compression component130.FIG. 5depicts one approach that can be used by one or more embodiments, but it should be appreciated that other approaches can be used for this interface, without departing from the scope of the description herein.

As described above, one of the ways that compression component130can perform compression functions is by the use of source and destination buffers, these respectively providing source information (instructions as to what function to perform, and values for this performance) and destination information (this location being for the retrieval of the results of the instruction by the host process). In one or more embodiments, these defined source and destination buffers can be used for task queue310(as described above, being used to relay instructions from processor190to compression component130) and a completion queue510for results of the block copy operations (e.g., holding results similar to the destination buffer described above). As noted above, compression component controller234can post descriptors in task queue310to store tasks (e.g., command descriptors) and task arguments (e.g., source and destination data descriptors) for execution by compression component130.

In additional embodiments, approaches can be implemented that can further increase the performance of memory copy operations. For example, compression component controller234, that can be used for some overhead functions, such as providing commands and receiving results, can be implemented using one or more threads of processor190that have been preferentially allocated. In some embodiments, this preferential allocation can be implemented using resource allocation algorithms in a task scheduler, and in other embodiments, the one or more threads can be dedicated to compression component controller (e.g., dedicated thread590), thus reducing overhead in some circumstances, e.g., in some circumstances this offloading of the memory copy processes can render this command non-blocking, in contrast to the blocking approach described above.

One the descriptors have been posted in task queue310, compression component130can parse several fields of the command structure posted by the compression component controller. Because, as described withFIG. 4above, one or more of the engines (compression, encryption, and authentication) of compression component130are disabled, the source data specified by descriptors can be directly copied to the host memory destination data location specified by the descriptors. For example, as depicted, value505can be copied562from memory location M1, and subsequently stored564in memory location M2.

It should be noted that, in some circumstances, one or more embodiments can facilitate the copying data packets received from a network (e.g., MTU chunks) to a single destination buffer across any two storage systems. In addition, one or more embodiments can reduce the application thread computation cycles used to later process this data on multiple received data buffers.

Also, with respect to DMA operations, one or more embodiments can provide an alternate approach to using a serve an alternate solution to an execute device diagnostic command to DMA data from or to, memory116, the application memory, or global memory.

FIG. 6illustrates another view of a system facilitating memory copy operations by a processor by employing compression component130, in accordance with one or more embodiments. For purposes of brevity, description of like elements and/or processes employed in other embodiments is omitted.

As noted above with the description ofFIG. 6, compression component130can use DMA component270to copy and store values from memory116. In some circumstances, specialized processing devices, such as compression component130can have DMA component270capabilities that exceed the capabilities of a DMA for use by processor190. In one or more embodiments, server150can have an instance of DMA component270with parallel DMA channels620, e.g., accessing memory116, in some circumstances, in parallel. Because of these parallel channels, in some circumstances compression component130can perform several requests at the same time, thus potentially further increasing throughput of memory copy operations performed by one or more embodiments described herein. As depicted, values in memory locations M1and M3are respectively copied to memory locations M2and M4in destination buffer690.

As depicted in this example, engines630of compression component130can be disabled to facilitate performing a memory copy operation by the compression component, e.g., engines including, but not limited to, compression635A, encryption635B, and authentication635C.

FIG. 7illustrates an example flow diagram for a method700that can facilitate memory copy operations by a processor by employing compression component130, in accordance with one or more embodiments. For purposes of brevity, description of like elements and/or processes employed in other embodiments is omitted.

At element702, method700can comprise receiving, by a compression component130comprising a first processor, from a second processor190, an instruction (e.g., a descriptor posted to task queue310by compression component controller234) from host application205to copy a value from a first memory location M1to a second memory location M2in a memory116coupled to the second processor190.

At element704, method700can further comprise copying, by the compression component130, value505from the first memory location M1to the second memory location M2, in accordance with the instruction. At element706, method700can further comprise communicating, by the compression component130, results of the copying to the second processor190, e.g., by storing value505in destination buffer690.

FIG. 8is a flow diagram800representing example operations of a system800facilitating memory copy operations by a processor by employing compression component130, in accordance with one or more embodiments. For purposes of brevity, description of like elements and/or processes employed in other embodiments is omitted.

System800can include a compression component130and computer executable components that can comprise an instruction decoder292that can be configured802to receive an instruction from a host application205, resulting in a decoded instruction. Compression component controller234can be configured804to control the compression component130, and memory copier296can be configured806to employ compression component controller234to control compression component130to copy value505from the first memory location M1in memory116to a second memory location M2, in accordance with the decoded instruction.

FIG. 9is a schematic block diagram of a computing environment900with which the disclosed subject matter can interact. The system900comprises one or more remote component(s)910. The remote component(s)910can be hardware and/or software (e.g., threads, processes, computing devices). In some embodiments, remote component(s)910can be a distributed computer system, connected to a local automatic scaling component and/or programs that use the resources of a distributed computer system, via communication framework940. Communication framework940can comprise wired network devices, wireless network devices, mobile devices, wearable devices, radio access network devices, gateway devices, femtocell devices, servers, etc.

The system900also comprises one or more local component(s)920. The local component(s)920can be hardware and/or software.

One possible communication between a remote component(s)910and a local component(s)920can be in the form of a data packet adapted to be transmitted between two or more computer processes. Another possible communication between a remote component(s)910and a local component(s)920can be in the form of circuit-switched data adapted to be transmitted between two or more computer processes in radio time slots. The system900comprises a communication framework940that can be employed to facilitate communications between the remote component(s)910and the local component(s)920, and can comprise an air interface, e.g., Uu interface of a UMTS network, via a long-term evolution (LTE) network, etc. Remote component(s)910can be operably connected to one or more remote data store(s)950, such as a hard drive, solid state drive, SIM card, device memory, etc., that can be employed to store information on the remote component(s)910side of communication framework940. Similarly, local component(s)920can be operably connected to one or more local data store(s)930, that can be employed to store information on the local component(s)920side of communication framework940.

In the subject specification, terms such as “store,” “storage,” “data store,” “data storage,” “database,” and substantially any other information storage component relevant to operation and functionality of a component, refer to “memory components,” or entities embodied in a “memory” or components comprising the memory. It is noted that the memory components described herein can be either volatile memory or non-volatile memory, or can comprise both volatile and non-volatile memory, by way of illustration, and not limitation, volatile memory1020(see below), non-volatile memory1022(see below), disk storage1024(see below), and memory storage, e.g., local data store(s)930and remote data store(s)950, see below. Further, non-volatile memory can be included in read only memory, programmable read only memory, electrically programmable read only memory, electrically erasable read only memory, or flash memory. Volatile memory can comprise random access memory, which acts as external cache memory. By way of illustration and not limitation, random access memory is available in many forms such as synchronous random access memory, dynamic random access memory, synchronous dynamic random access memory, double data rate synchronous dynamic random access memory, enhanced synchronous dynamic random access memory, SynchLink dynamic random access memory, and direct Rambus random access memory. Additionally, the disclosed memory components of systems or methods herein are intended to comprise, without being limited to comprising, these and any other suitable types of memory.

FIG. 10illustrates a block diagram of a computing system1000operable to execute the disclosed systems and methods in accordance with one or more embodiments/implementations described herein. Computer1012can comprise a processing unit1014, a system memory1016, and a system bus1018. System bus1018couples system components comprising, but not limited to, system memory1016to processing unit1014. Processing unit1014can be any of various available processors. Dual microprocessors and other multiprocessor architectures also can be employed as processing unit1014.

System bus1018can be any of several types of bus structure(s) comprising a memory bus or a memory controller, a peripheral bus or an external bus, and/or a local bus using any variety of available bus architectures comprising, but not limited to, industrial standard architecture, micro-channel architecture, extended industrial standard architecture, intelligent drive electronics, video electronics standards association local bus, peripheral component interconnect, card bus, universal serial bus, advanced graphics port, personal computer memory card international association bus, Firewire (Institute of Electrical and Electronics Engineers1394), and small computer systems interface.

System memory1016can comprise volatile memory1020and non-volatile memory1022. A basic input/output system, containing routines to transfer information between elements within computer1012, such as during start-up, can be stored in non-volatile memory1022. By way of illustration, and not limitation, non-volatile memory1022can comprise read only memory, programmable read only memory, electrically programmable read only memory, electrically erasable read only memory, or flash memory. Volatile memory1020comprises read only memory, which acts as external cache memory. By way of illustration and not limitation, read only memory is available in many forms such as synchronous random access memory, dynamic read only memory, synchronous dynamic read only memory, double data rate synchronous dynamic read only memory, enhanced synchronous dynamic read only memory, SynchLink dynamic read only memory, Rambus direct read only memory, direct Rambus dynamic read only memory, and Rambus dynamic read only memory.

Computer1012can also comprise removable/non-removable, volatile/non-volatile computer storage media.FIG. 10illustrates, for example, disk storage1024. Disk storage1024comprises, but is not limited to, devices like a magnetic disk drive, floppy disk drive, tape drive, flash memory card, or memory stick. In addition, disk storage1024can comprise storage media separately or in combination with other storage media comprising, but not limited to, an optical disk drive such as a compact disk read only memory device, compact disk recordable drive, compact disk rewritable drive or a digital versatile disk read only memory. To facilitate connection of the disk storage devices1024to system bus1018, a removable or non-removable interface is typically used, such as interface1026.

Computing devices typically comprise a variety of media, which can comprise computer-readable storage media or communications media, which two terms are used herein differently from one another as follows.

Computer-readable storage media can be any available storage media that can be accessed by the computer and comprises both volatile and non-volatile media, removable and non-removable media. By way of example, and not limitation, computer-readable storage media can be implemented in connection with any method or technology for storage of information such as computer-readable instructions, program modules, structured data, or unstructured data. Computer-readable storage media can comprise, but are not limited to, read only memory, programmable read only memory, electrically programmable read only memory, electrically erasable read only memory, flash memory or other memory technology, compact disk read only memory, digital versatile disk or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or other tangible media which can be used to store desired information. In this regard, the term “tangible” herein as may be applied to storage, memory or computer-readable media, is to be understood to exclude only propagating intangible signals per se as a modifier and does not relinquish coverage of all standard storage, memory or computer-readable media that are not only propagating intangible signals per se. In an aspect, tangible media can comprise non-transitory media wherein the term “non-transitory” herein as may be applied to storage, memory or computer-readable media, is to be understood to exclude only propagating transitory signals per se as a modifier and does not relinquish coverage of all standard storage, memory or computer-readable media that are not only propagating transitory signals per se. Computer-readable storage media can be accessed by one or more local or remote computing devices, e.g., via access requests, queries or other data retrieval protocols, for a variety of operations with respect to the information stored by the medium. As such, for example, a computer-readable medium can comprise executable instructions stored thereon that, in response to execution, can cause a system comprising a processor to perform operations, comprising determining a mapped cluster schema, altering the mapped cluster schema until a rule is satisfied, allocating storage space according to the mapped cluster schema, and enabling a data operation corresponding to the allocated storage space, as disclosed herein.

A user can enter commands or information into computer1012through input device(s)1036. In some embodiments, a user interface can allow entry of user preference information, etc., and can be embodied in a touch sensitive display panel, a mouse/pointer input to a graphical user interface (GUI), a command line controlled interface, etc., allowing a user to interact with computer1012. Input devices1036comprise, but are not limited to, a pointing device such as a mouse, trackball, stylus, touch pad, keyboard, microphone, joystick, game pad, satellite dish, scanner, TV tuner card, digital camera, digital video camera, web camera, cell phone, smartphone, tablet computer, etc. These and other input devices connect to processing unit1014through system bus1018by way of interface port(s)1038. Interface port(s)1038comprise, for example, a serial port, a parallel port, a game port, a universal serial bus, an infrared port, a Bluetooth port, an IP port, or a logical port associated with a wireless service, etc. Output device(s)1040use some of the same type of ports as input device(s)1036.

Thus, for example, a universal serial busport can be used to provide input to computer1012and to output information from computer1012to an output device1040. Output adapter1042is provided to illustrate that there are some output devices1040like monitors, speakers, and printers, among other output devices1040, which use special adapters. Output adapters1042comprise, by way of illustration and not limitation, video and sound cards that provide means of connection between output device1040and system bus1018. It should be noted that other devices and/or systems of devices provide both input and output capabilities such as remote computer(s)1044.

Computer1012can operate in a networked environment using logical connections to one or more remote computers, such as remote computer(s)1044. Remote computer(s)1044can be a personal computer, a server, a router, a network PC, cloud storage, a cloud service, code executing in a cloud computing environment, a workstation, a microprocessor-based appliance, a peer device, or other common network node and the like, and typically comprises many or all of the elements described relative to computer1012. A cloud computing environment, the cloud, or other similar terms can refer to computing that can share processing resources and data to one or more computer and/or other device(s) on an as needed basis to enable access to a shared pool of configurable computing resources that can be provisioned and released readily. Cloud computing and storage solutions can store and/or process data in third-party data centers which can leverage an economy of scale and can view accessing computing resources via a cloud service in a manner similar to a subscribing to an electric utility to access electrical energy, a telephone utility to access telephonic services, etc.

For purposes of brevity, only a memory storage device1046is illustrated with remote computer(s)1044. Remote computer(s)1044is logically connected to computer1012through a network interface1048and then physically connected by way of communication connection1050. Network interface1048encompasses wire and/or wireless communication networks such as local area networks and wide area networks. Local area network technologies comprise fiber distributed data interface, copper distributed data interface, Ethernet, Token Ring and the like. Wide area network technologies comprise, but are not limited to, point-to-point links, circuit-switching networks like integrated services digital networks and variations thereon, packet switching networks, and digital subscriber lines. As noted below, wireless technologies may be used in addition to or in place of the foregoing.

Communication connection(s)1050refer(s) to hardware/software employed to connect network interface1048to bus1018. While communication connection1050is shown for illustrative clarity inside computer1012, it can also be external to computer1012. The hardware/software for connection to network interface1048can comprise, for example, internal and external technologies such as modems, comprising regular telephone grade modems, cable modems and digital subscriber line modems, integrated services digital network adapters, and Ethernet cards.