Demodulator having automatic quadrature control function

A demodulator for automatically performing quadrature control in which there is no necessity for the modulator side to perform precision adjustment and deterioration in characteristics e.g., error rate is suppressed for long. The demodulator includes a quadrature controller fed with an in-phase component and a quadrature component output from the quadrature detecting unit to correct quadrature error between phases of in-phase and quadrature signals based on a quadrature error signal, an automatic gain controller AGC outputting in-phase and quadrature components of a demodulated signal corrected for amplitude errors by an amplitude error signal, an error detection unit fed with in-phase and quadrature components of the demodulated signal to output in-phase and quadrature components and polarity signals, an amplitude error detector outputting in-phase and quadrature components of the amplitude error to the AGC based on the in-phase and quadrature components and the respective polarity signals, and a quadrature error detection unit generating a quadrature error signal Qd based on the in-phase and quadrature components and the polarity signals to output the generated quadrature error signal to the quadrature controller.

FIELD OF THE INVENTION

This invention relates to a demodulator and, more particularly, to a demodulator for automatically correcting errors in a detection signal of a quadrature detected modulated signal in a digital radio communication system.

BACKGROUND OF THE INVENTION

FIG. 11shows a typical structure of a conventional demodulator. Referring toFIG. 11, this demodulator includes a quadrature detecting unit1, an automatic amplitude controller (AGC)3, an error detection unit3and an amplitude error detection unit4.

An input modulated signal is assumed to have been modulated in accordance with a quadrature modulation system, such as QPSK (quadrature phase shift keying) or QAM (quadrature amplitude modulation). The respective quadrature components (channels) are termed an in-phase component or channel (Ich) and a quadrature component or channel (Qch), respectively. A quadrature detecting unit1receives a quadrature modulated signal, as an IF (intermediate frequency) signal, and outputs an output signal as baseband signals Ich1and Ich2. Meanwhile, the quadrature detecting unit1is made up of a known detection circuit, such as a synchronous detector, a semi-synchronous detector, or a delay detector.

The AGC2is fed with Ich2and Qch2and, using amplitude error signals Ai, Aq, fed from the amplitude error detection unit4, corrects the amplitude errors to output signals Ich3, Qch3each having a regular amplitude.

The error detection unit3uses (receives) Ich3, Qch3, output from the AGC2, to output error signals Ei, Eq and polarity signals Di, Dq.

The amplitude error detection unit4uses the signals Ei, Eq, Di and Dq, output by the error detection unit3, to output Ai and Aq as respective amplitude error signals of Ich and Qch.

SUMMARY OF THE DISCLOSURE

However, there is much to be desired in the art and various problems have been encountered in the course of the investigations toward the present invention. That is, it is not possible with the conventional demodulator shown inFIG. 11to correct quadrature deviation produced in modulation.

Recently, an analog IC devices, termed quadrature modulators, are manufactured and marketed, such that there is now commercially available such a device automatically performing quadrature adjustment of the modulator. However, this device cannot be said to be of high precision. In particular, the device cannot be said to cope with multi-value modulation system, such as QAM, such that, if this device is put to practical use, the BER (bit error rate) tends to be lowered. Ultimately, the quadrature deviation in a modulator in the multi-valued modulation system has to be adjusted mainly by manual operations.

As described above, it is not possible in the conventional demodulators to correct the quadrature deviation produced at the time of modulation.

It was necessary to make manual analog adjustment except if an analog quadrature modulator can be applied. So, a quadrature adjustment process was required during device production etc., thus necessitating redundant time and operating steps.

Moreover, the demodulation circuit, adjusted manually in an analog fashion, is liable to degradation due to temperature or humidity of the analog components, while being liable to deterioration with lapse of time, resulting in that quadrature properties cannot be maintained for prolonged time.

Thus, if quadrature errors are produced on the modulator side, correction is not possible with the conventional demodulator so that demodulated signals (playback signals) such as shown inFIG. 8are produced, thus naturally deteriorating the characteristics such as error rate.

In view of the above-described status of the art, it is an object of the present invention to provide a demodulator which, by performing automatic correction of quadrature errors in a digital fashion.

It is another object of the present invention, to provide a demodulator which renders it unnecessary to make precision adjustment on the modulator side and which assures operational stability and high reliability without producing deterioration in characteristics such as error rate for a prolonged time.

Further objects of the present invention will become apparent in the entire disclosure.

According to an aspect of the present invention there is provided a demodulator which comprises;a quadrature controller for correcting quadrature errors of a signal quadrature-detected by a quadrature detecting unit, and a quadrature error detection unit for detecting a quadrature error based on an error signal detected as to in-phase and quadrature components from a demodulated signal output from an automatic gain controller fed with an input signal corrected for quadrature errors as an output signal of the quadrature controller, to feed the detected quadrature error (signal) to the quadrature controller.

According to a second aspect of the present invention, there is provided a demodulator which comprises;(a) a quadrature detecting unit fed with and quadrature-detecting a quadrature modulated signal to output an in-phase component and a quadrature component;(b) a quadrature controller fed with the in-phase component and the quadrature component output from the quadrature detecting unit, the quadrature controller correcting a quadrature error between the in-phase component and the quadrature component based on an input quadrature error signal, and outputting the resulting signal;(c) an automatic gain controller fed with the in-phase component and the quadrature component output from the quadrature controller and outputting signals corrected for amplitude errors based on the input amplitude error signal as the in-phase component and the quadrature component of a demodulated signal;(d) an error detection unit detecting, from the in-phase component and the quadrature component of the demodulated signal output from the automatic gain controller, an in-phase component of the error signal and a polarity signal of the in-phase component of the demodulated signal, and a quadrature component of the error signal and a polarity signal of the quadrature component of the demodulated signal;(e) an amplitude error detection unit generating an in-phase component and a quadrature component of an amplitude error signal based on the in-phase component of the error signal output from the error detection unit and the polarity signal of the in-phase component of the demodulated signal, and on the quadrature component of the error signal and the polarity signal of the quadrature component of the demodulated signal, to output the generated in-phase and quadrature components of the amplitude error signal to the automatic gain controller; and(f) a quadrature error detect ion unit generating a quadrature error signal based on the in-phase component of the error signal and the polarity signal of the in-phase component of the demodulated signal, both output from the error detection unit, and on the in-phase component of the error signal and the polarity signal of the quadrature component of the demodulated signal to feed the generated quadrature error signal to the quadrature controller.

According to a third aspect of the present invention there is provided a demodulator which comprises;(a) a quadrature detecting unit fed with a quadrature modulated signal as an input signal to quadrature-detect the input signal to output in-phase and quadrature components of a regular amplitude;(b) a quadrature controller fed with the in-phase and quadrature components output from the quadrature detection unit to correct the quadrature error between phases of the in-phase and quadrature components, based on a quadrature error signal;(c) an automatic gain controller fed with the in-phase and quadrature components output from the quadrature controller to output signals corrected for respective amplitude errors as in-phase and quadrature components of a demodulated signal;(d) an error detection unit detecting an in-phase component of an error signal and a polarity signal of the in-phase component of the demodulated signal, and a quadrature component of the error signal and a polarity signal of the quadrature component of the demodulated signal, from the in-phase and quadrature components of the demodulated signal output from the automatic gain controller; and(e) a quadrature error detection unit generating a quadrature error signal based on the in-phase component of the error signal and the polarity signal of the in-phase component of the demodulated signal, and the quadrature component of the error signal and a polarity signal of the quadrature component of the demodulated signal, all output from the error detection unit, to feed the generated quadrature error signal to the quadrature controller.

Further aspects of the present invention are disclosed in the claims, particularly in the dependent claims.

In a fourth aspect, the quadrature controller comprises;a first low-pass filter fed with the quadrature error signal output from the quadrature error detection unit to smooth out and output the quadrature error signal;a first multiplier multiplying the quadrature component output from the quadrature detecting unit with an output of the first low-pass filter; anda first adder adding the in-phase component output from the quadrature detecting unit and an output of the first multiplier;the quadrature component output from the quadrature detecting unit being directly output, an output of the first adder being output as an in-phase component corrected for quadrature errors.

In a fifth aspect, the quadrature error detection unit comprises;a second multiplier multiplying the in-phase component of the error signal (Ei) output from the quadrature detecting unit with the polarity signal (Dq) of the quadrature component of the demodulated signal;a third multiplier multiplying the quadrature component of the error signal (Eq) output from the quadrature detecting unit with the polarity signal (Di) of the in-phase component of the demodulated signal; anda second adder summing outputs of the second and third multipliers;an output signal of the second adder being output as the quadrature error signal (Qd).

In a sixth aspect, the automatic gain controller comprises;a second low-pass filter smoothing out and outputting the in-phase component of the amplitude error signal output from the amplitude error detection unit;a third low-pass filter smoothing out and outputting the quadrature component of the amplitude error signal output from the amplitude error detection unit;a fourth multiplier multiplying the in-phase component output from the quadrature controller as an input signal with an in-phase component of the amplitude error signal smoothed out by the second low-pass filter, the fourth multiplier outputting the result of multiplication as the in-phase component of the demodulated signal; anda fifth multiplier multiplying the quadrature component output from the quadrature controller as an input signal with a quadrature component of the amplitude error signal smoothed out by the third low-pass filter, the fifth multiplier outputting the result of multiplication as the quadrature component of the demodulated signal.

In a seventh aspect, the automatic gain controller comprises;a first absolute value computing circuit determining an absolute value of the in-phase component output from the quadrature controller;a second absolute value computing circuit determining an absolute value of the quadrature component output from the quadrature controller;a third adder adding together outputs from the first and second absolute value computing circuit;a fourth low pass filter smoothing out an output of the third adder;a sixth multiplier multiplying an in-phase component output from the quadrature controller with an output of the fourth low pass filter; andwherein the quadrature component output from the quadrature controller is directly output as the quadrature component, and an output of the sixth multiplier is output as the in-phase component of the demodulated signal.

PREFERRED EMBODIMENTS OF THE INVENTION

A preferred embodiment of the present invention is now explained. Referring toFIG. 1, a preferred embodiment of the demodulator of the present invention includes a quadrature detecting unit1, a quadrature controller6, and an automatic amplitude controller (AGC)2in this order of signal flow, and further a feed back circuitry comprising an error detection unit3, an amplitude error detection unit4and quadrature error detection unit5. The quadrature detecting unit1is fed as an input signal with an intermediate frequency (IF IN) signal for quadrature-detecting the input signal to output an in-phase component Ich1and a quadrature component Qch1. The quadrature controller6is fed with an in-phase component and a quadrature component output from the quadrature detecting unit1to correct the quadrature error based on quadrature error signal Qd. The automatic gain controller AGC2is fed with the in-phase and quadrature components Ich2, Qch2output from the quadrature controller6to output signals, which are corrected for respective amplitude errors by in-phase and quadrature components Ai, Aq of the amplitude error, as in phase and quadrature components Ich3, Qch3of the demodulated signal. The error detection unit3is fed with the in-phase and quadrature components Ich2, Qch3of the demodulated signal output from the automatic gain controller2, and detects and outputs an in-phase component and a polarity signal Ei, Di of the error signal and a quadrature component and a polarity signal Eq, Dq of the error signal. The amplitude error detection unit4outputs an in-phase component and a quadrature component Ai, Aq of the amplitude error to the automatic gain controller2based on a polarity signal Di of the in-phase component Ich3of the demodulated signal and the in-phase component Ei of the error signal, and on a polarity signal Dq of the quadrature component Qch3of the demodulated signal and the quadrature component Eq of the error signal, Di, Dq, Ei and Eq being output by the error detection unit3. The quadrature error detection unit5generates a quadrature error signal Qd based on an in-phase component Ei and a polarity signal Di of the error signal and a quadrature component Eq and polarity signal Dq of the error signal, Ei, Di, Eq and Dq being output from the error detection unit3, and outputs the quadrature error signal Qd to the quadrature controller6. The quadrature error between phases of the in-phase component Ich and the quadrature component Qch generated at the time of modulation is corrected by the quadrature controller6.

Referring toFIG. 7, the quadrature controller6includes a first low-pass filter63for smoothing the quadrature error signal Qd output from the quadrature error detection unit, a first multiplier62for multiplying the quadrature component Qch1output from the quadrature detecting unit with an output of the first low-pass filter63, and a first adder61for adding the in-phase component Ich1output from the quadrature detecting unit and an output of the first multiplier62. The quadrature component output from the quadrature detecting unit is directly output as Qch2, an output of the first adder61being output as an in-phase component Ich2corrected for quadrature errors.

Referring toFIG. 6, the quadrature error detection unit5includes a second multiplier51for multiplying an in-phase component of an error signal (Ei) output from the error detection unit3with a polarity signal Dq of a quadrature component Qch3of the demodulated signal, a third multiplier52for multiplying a quadrature component Eq of the error signal output from the error detecting unit3with a polarity signal Di of the in-phase component Ich3of the demodulated signal, and a second adder53for summing outputs of the second and third adders51,52, wherein an output of the second adder53is output as a quadrature error signal (Qd).

Referring toFIG. 2, the automatic gain controller2includes a second low-pass filter24for smoothing out an in-phase component Ai of an amplitude error signal output from the amplitude error detection unit4; a third low-pass filter23for smoothing out a quadrature component Aq of the amplitude error signal output from the amplitude error detection unit4; a fourth multiplier21for multiplying the in-phase component Ich2output from the quadrature controller6with an in-phase component Ai of the amplitude error signal smoothed out by the second low-pass filter24for outputting the result of multiplication as an in-phase component Ich3of the demodulated signal; and a fifth multiplier22for multiplying the quadrature component Qch2output from the quadrature controller6with a quadrature component Aq of the amplitude error signal smoothed out by the third low-pass filter23for outputting the result of multiplication as a demodulated quadrature signal Qch3.

In a preferred embodiment, shown inFIG. 9, the demodulator of the present invention includes quadrature detecting unit7fed as an input signal with an intermediate frequency signal IF IN for quadrature-detecting the input signal to output an in-phase component Ich1and a quadrature component Qch1; a quadrature controller6fed with the in-phase and quadrature components output from the quadrature detecting unit1to correct the quadrature error based on quadrature error signal Qd; an automatic gain controller8fed with the in-phase and quadrature components Ich2, Qch2output from the quadrature controller6to output signals corrected for respective amplitude errors as in-phase and quadrature components Ich3, Qch3of a demodulated signal; an error detection unit3fed with the in-phase and quadrature components of the demodulated signal output from the automatic gain controller8to detect and output an in-phase component and its polarity signal (Ei, Di) of the error signal and a quadrature component and its polarity signal (Eq, Dq) of the error signal; and a quadrature error detection unit5for generating a quadrature error signal Qd based on an in-phase component Ei and its polarity signal Di of the error signal output from the error detect ion unit3and on a quadrature component Eq and its polarity signal Dq of the error signal to output the quadrature error signal Qd to the quadrature controller6.

Referring toFIG. 10, the automatic gain controller8includes a first absolute value computing circuit82for determining an absolute value of an in-phase component output from the quadrature controller; a second absolute value computing circuit83for calculating an absolute value of a quadrature component Qch2output from the quadrature controller6; an adder84for summing an output value of the second absolute value computing circuit83with an output value of the first absolute value computing circuit82; a fourth low-pass filter85for smoothing an output of the adder84; and a sixth multiplier81for multiplying the in-phase component Ich2output from the quadrature controller with an output of the fourth low-pass filter85. An output Qch2of quadrature controller6is output directly as a quadrature component Qch3of the demodulated signal, while an output of the sixth multiplier81is output as an in-phase component Ich3of the demodulated signal.

For further explaining the preferred embodiments of the present invention, an example of the present invention is explained with reference to the drawings.

FIG. 1shows a configuration of an embodiment of a demodulator of the present invention. Referring toFIG. 1, an embodiment of the present invention includes a quadrature detecting unit1, an AGC2, an error detection unit3, an amplitude error detection unit4, a quadrature error detection unit5, and a quadrature controller6. It is assumed that the input modulation signal has been modulated in accordance with the quadrature modulation system, such as QPSK or QAM. For each of the quadrature components (channels), appellations of in-phase component (channel, Ich) and quadrature component (channel, Qch) are used.

The quadrature-detecting unit1demodulates input quadrature modulated signals, as IF (intermediate frequency) signals, into baseband signals Ich1and Qch1. Meanwhile, the quadrature-detecting unit1is made up of known detection circuits, such as a synchronous detection circuit, a sub (or quasi)-synchronous circuit and/or a delay detection circuit.

The quadrature controller6is fed with baseband signals Ich1, Qch1, output by the quadrature detecting unit1, to output signals Ich2, Qch2, freed of quadrature errors, using a quadrature error signal Qd input from the quadrature error detection unit5.

The AGC2is fed with Ich2, Qch2to output Ich3, Qch3, having regular (or normal) amplitudes, using amplitude error signals Ai, Aq input from the amplitude error detection unit4.

The error detection unit3outputs error signals Ei, Eq and polarity signals Di, Dq, using Ich3, Qch3, output from the AGC2.

The quadrature error detection unit5outputs the quadrature error signal Qd, using the outputs Ei, Eq, Di, Dq supplied from the error detection unit3.

Referring to the drawings, the structure of respective elements of the demodulator are hereinafter explained.

FIG. 2shows an illustrative structure of the AGC2. Referring toFIG. 2, the AGC2is made up of multipliers21,22and low-pass filters (LPFs)23,24. The AGC2performs amplitude control so that the signals Ich2, Qch2output by the quadrature controller6will be at regular signal point positions, using the amplitude error signals Ai, Aq, output by the amplitude error detection unit4, to produce modulated signals Ich3, Qch3.

FIG. 3shows an illustrative structure of the LPFs23,24of the AGC2and an LPF63contained in the quadrature controller6. Referring toFIG. 3, the LPF is comprised of an integrator made up of a flip-flop232operating as a delay element and an adder231. That is, the current signal and a signal delayed by one clock by the flip-flop23are summed together by the adder231and latched and output by the flip-flop232.

FIG. 4shows an illustrative structure of the error detection unit3. Referring toFIG. 4, the error detection unit1is made up of signal point error detection units31,32. The signal point error detection units31,32detect errors (deviations) from the regular signal point positions of the input signals Ich3, Qch3to output error (deviation) signals Ei Eq.

If the input signals Ich3, Qch3are deviated in the positive or negative direction from the regular signal point positions, the output error signals Ei, Eq assume negative and positive values, respectively. Since the regular signal point positions vary with modulation systems used, a signal MOD specifying the modulation system is supplied to the signal point error detection units31,32. The polarity signals Di, Dq represent polarities of the signal Ich3, Qch3, respectively, and are acquired from respective sign bits.

FIG. 5shows the structure of the amplitude error detection unit4. Referring toFIG. 5, the amplitude error detection unit4includes a multiplier42for multiplying the in-phase component Ei of the error signal and its polarity signal Di to output the amplitude error signal Ai, and a multiplier41for multiplying the quadrature component Eq of the error signal and its polarity signal Dq to output an amplitude error signal Aq.

FIG. 6shows the structure of the quadrature error detection unit5. Referring toFIG. 6, the quadrature error detection unit5is made up of multipliers51,52and an adder53. The results of multiplication of Ei with Dq and those of Eq with Di in the multipliers51,52are summed together in the adder53to give a quadrature error signal Qd (see the following equation (1)).

FIG. 7shows the structure of the quadrature controller6. Referring toFIG. 7, the quadrature controller6is made up of an adder61, a multiplier62and a low pass filter LPF63.

The quadrature error signal Qd, output from the quadrature error detection unit5, is smoothed by the LPF63, an output of which is multiplied by the multiplier62with Qch1. The resulting product is summed (added) in the adder61with Ich1(Ich1less the product obtained on multiplication) and the resulting sum is output as Ich2to correct the quadrature error. The output Qch2on the Qch side is no other than Qch1.

The operation of an example of the present invention is explained mainly with reference to the quadrature controller6.

The signal point error signals Ei, Eq, obtained by the error detection unit3, and the polarity signals Di, Dq, indicate whether the reproduced signal is deviated from the regular signal point position in the positive direction or in the negative direction. For quadrature control, these signals need to be converted into quadrature error (deviation) signals.

FIG. 8shows on an I-Q complex plane the modulated signal in case of occurrence of a quadrature deviation. It is seen fromFIG. 8that, since the distances between respective signal points and the point of origin are inherently equal to each other, the signal points should be positioned on apex points of a square. However, these signal points are actually positioned on apex points of a diamond shape. In order to correct this state, such error signals, which will correct the deviation in the diagonal directions from the regular signal points, as shown inFIG. 8, are required.

For obtaining these error signals, it is only sufficient if the quadrature error signals Qd, represented by the following equation (1):
Qd=Ei·Dq+Eq·Di(1)is used.

The quadrature error detection unit5generates this Qd.

The quadrature error control based on quadrature error signals is explained. Assume that the IF input signal to a quadrature detection unit7is A (t), an angular velocity of a local oscillator, not shown, in the quadrature detection unit7, is ω rad/sec and a quadrature error is δ rad, the signals Ich, Qch input to an A/D (analog/digital) converter, not shown, supplying Ich1, Qch1of digital signals to the quadrature controller6, are given by the following equations (2) and (3):
Ich=A(t)cos(ωt+δ)=A(t)cos ωt·cos δ−A(t) sin ωt·sin δ=A(t)cos ωt·cos δ−Qch·sin δ  (2)
Qch=A(t)sin ωt(3).

For demodulating this signal regularly, δ in Ich of the above equation (2) needs to be eliminated. However, the term of A(t)cos ωt·cos δ represents merely a lowered gain of Ich and can be corrected by AGC2.

So, in the Ich of the above equation (2), it suffices if the term of −Qch·sin δ in Ich of the equation (2) is corrected.

Since δ may be regarded as a constant for a short period of time, the product of the quadrature error signal with the Qch value may be summed (added) to Ich to correct the quadrature error. In an embodiment of the present invention, the above-mentioned correction operation is performed in the quadrature controller6shown in FIG.7.

A further embodiment of the present invention is now explained.FIG. 9shows a second embodiment of the present invention. Referring toFIG. 9, the second embodiment of the present invention differs from the first embodiment shown inFIG. 1as to the quadrature detecting unit7and the AGC8.

In the above-described first embodiment, in which the AGC2corrects the amplitudes of Ich and Qch, it is unnecessary for the quadrature-detecting unit1to output a signal of the regular amplitude. On the other hand, in the second embodiment of the present invention, the quadrature detecting unit7outputs signals of the regular amplitude. So, it is unnecessary for the AGC8to perform the operation for causing the output signal to be on the regular amplitude, such that it is only necessary for the AGC8to correct the lowering of the gain of Ich that is not corrected by the quadrature controller6.

FIG. 10shows an illustrative structure of the AGC8. Referring toFIG. 11, the AGC8is made up of a (sixth) multiplier81, absolute value circuits (calculating units)82,83, an adder84and an (fourth) LPF85. The absolute value circuits82,83determine the amplitudes of Ich2and Qch2and a relative magnitude (difference) thereof by the adder84to obtain an amplitude error signal between Ich and Qch. It is noted that the adder84operates as a subtractor for outputting a difference value corresponding to the output value of the absolute value circuit83less the output value of the absolute value circuit82. The amplitude error signal obtained by the adder84is smoothed by the LPF85. The smoothed amplitude error signal is multiplied by the Ich by the multiplier81. The resulting product is output as Ich3. The Qch2from the quadrature controller6is directly output as Qch3to correct the ampitude difference between Ich and Qch.

The present invention provides a configuration comprising a quadrature controller correcting quadrature errors of a signal quadrature-detected by a quadrature detecting unit, and a quadrature error detecting unit detecting a quadrature error, wherein the quadrature errors are corrected based on an error signal detected as to in-phase and quadrature components of a demodulated signal output from an automatic gain controller fed as an input signal with an output signal of the quadrature controller, and the detected quadrature error Qd is fed to the quadrature controller. Therefore, it is unnecessary to make manual adjustment of analog circuit elements such that quadrature errors of the modulator can be eliminated fully digitally and automatically. Moreover, the present invention gives a meritorious effects that full digitization facilitates designing as LSI.

Also it should be noted that any combination of the disclosed and/or claimed elements, matters and/or items might fall under the modifications aforementioned.