Voltage controlled oscillator

The present invention provides a voltage controlled oscillator having a wide frequency variation range and an oscillation frequency that shows favorable linearity with respect to control voltage. The present invention includes an amplifier circuit 21, a piezoelectric element 22 connected in parallel to the amplifier circuit 21 and forming a feedback loop, variable capacitive elements 24 and 25 respectively connected to an input terminal and an output terminal of the amplifier circuit 21 and having a capacitance value that is dependent on control voltage, and an analog operation circuit 26 that generates a control voltage Vcs based on an inputted control voltage Vc. In this arrangement, the control voltage Vc is applied to the variable capacitive element 24 and the control voltage Vcs generated by the analog operation circuit 26 is applied to the variable capacitive element 25.

TECHNICAL FIELD

The present invention relates to a voltage controlled oscillator which uses variable capacitive elements with capacitance values that change according to a control voltage as a load capacitance for a piezoelectric element, and in particular to a voltage controlled oscillator which has a wide variable range of frequencies and a substantially improved linearity of a oscillation frequency with respect to a variable capacitance control voltage.

The present invention also relates to a method for generating a control voltage applied to such a voltage controlled oscillator.

BACKGROUND ART

Voltage controlled oscillators utilizing piezoelectric elements have been widely used as frequency signal sources in various communications devices and other electronic devices.

Moreover, voltage controlled oscillators utilizing, as a load capacitance of the piezoelectric element, at least one variable capacitive element whose capacitance value varies according to a DC control voltage have been used to suppress frequency differences over a wide range of usage temperatures, to synchronize a frequency to a reference frequency, and the like.

In this type of voltage controlled oscillator, a wide range of frequency variation and linearity of oscillation frequency with respect to control voltage are desirable. Specifically, in order to improve the linearity of oscillation frequency with respect to control voltage, it is necessary to ensure that the load capacitance is linear with respect to the control voltage.

The devices described in patent document 1 and patent document 2 are known voltage controlled oscillators of this type.

As shown inFIG. 17, the voltage controlled oscillator described in patent document 1 includes a CMOS inverter1, a quartz oscillator2connected in parallel between the input and output terminals of the CMOS inverter1to form a feedback loop, a resistor3forming a feedback loop, fixed capacitors4and5respectively connected to input and output sides of the CMOS inverter1, a variable capacitance element6with a capacitance value that changes according to an applied control voltage Vc and is connected in series with the fixed capacitor4on the input side of the CMOS inverter1, and a bias-use resistor7.

In this type of voltage controlled oscillator the oscillation frequency generated using the quartz oscillator2is varied by causing the capacitance value of the variable capacitive element6connected on the input side of the CMOS inverter1to vary using the control voltage Vc.

As shown inFIG. 18, the voltage controlled oscillator described in patent document 2 includes an amplifier circuit11, a piezoelectric element12that is connected in parallel between an input terminal and an output terminal of the amplifier circuit11and forms a feedback loop, a resistor13that forms a feedback loop, variable capacitive elements (varicap)14and15respectively connected to the input and output sides of the amplifier circuit11and each having a capacitance value that changes according to an applied control voltage Vc, and a frequency-adjustment voltage generating circuit16that generates the control voltage Vc.

In the voltage controlled oscillator with this type of construction, the oscillation frequency generated using the piezoelectric element12is varied by changing the capacitance values of the variable capacitive elements14and15that are connected to respective terminals of the piezoelectric element12. The control voltage Vc is generated by the frequency-adjustment voltage generating circuit16, using as the load capacitance the variable capacitive elements14and15with the capacitance value that changes according to the control voltage Vc.

As shown inFIGS. 17 and 18, forms of the voltage controlled oscillator having at least one variable capacitive element include a form in which a single variable capacitive element connects to a terminal on one of the input and output sides of the amplifier circuit and a fixed capacitor connects to the other terminal, and a form in which a variable capacitive element is connected each of the two terminals of the amplifier circuit.

For both forms, a load capacitance CL that determines the oscillation frequency is a series capacitance of an input-side capacitance Cin and an output-side capacitance Cout. The series capacitance is expressed below in equation (1).
CL=(Cin×Cout)/(Cin+Cout)  (1)

The following is a discussion of a variable range of the oscillation frequency for the voltage controlled oscillators shown inFIG. 17andFIG. 18.

As shown inFIG. 17, in the form in which the variable capacitive element connects to the terminal on one of the input and output sides of the amplifier circuit, the above-described load capacitance is a combined capacitance that includes the capacitance of the variable capacitive element connected to one of the input-terminal or the output-side terminal of the amplifier circuit and the capacitance of fixed capacitor connected to the other terminal.

As shown inFIG. 18, in the form in which a variable capacitive element connects to both terminals of the amplifier circuit, the above-described load capacitance is a combined capacitance that includes the capacitance of the variable capacitive element connected to the input-side terminal and the capacitance of the variable capacitive element connected to the output-side terminal.

Thus, from equation (1) it is clear that the amount of change in load capacitance will be greater in the latter form.

Therefore, in the form, shown inFIG. 18, in which variable capacitive elements are attached to both the input and output-side terminals of the amplifier circuit, an achievable oscillation frequency range is wider than in the form, shown inFIG. 17, in which the variable capacitive element is used only on one side.

The following is a discussion of the linearity of the change in oscillation frequency with respect to control voltage in the voltage controlled oscillators shown inFIG. 17andFIG. 18.

As described above, the oscillation frequency is determined by the load capacitance. Hence, to have linearity in the change in oscillation frequency with respect to control voltage, it is necessary to have linearity in the change in load capacitance with respect to control voltage.

FIG. 19shows an example of the changes in input and output-side capacitances with respect to control voltage for the form in which the variable capacitive element connects, as shown inFIG. 17, to one of the input-side and output-side terminals of the amplifier circuit.

The capacitance of the variable capacitive element changes according to the control voltage, but the fixed capacitance is constant and independent of the control voltage. The change in the load capacitance, which is the combined capacitance calculated using equation (1), with respect to the control voltage is shown inFIG. 20. As is clear fromFIG. 20, in a region where the change in capacitance begins, the change in the load capacitance is large, but in a region where the change in capacitance ends, the change in load capacitance becomes smaller. In short, the change in load capacitance with respect to control voltage is non-linear.

In the other form, in which variable capacitive elements are used at both the input and output terminal of the amplifier circuit as shown inFIG. 18, a central operating voltage and an amplitude of a oscillated wave form differ at the input-side terminal and output-side terminal of the amplifier circuit. Hence, the change in capacitance of the variable capacitive element with respect to the control voltage is different on the input and output sides.

Thus, an input voltage range over which the change in capacitance occurs in the variable capacitive element connected to the terminal where the amplitude of the oscillation wave form is large, is larger than a section over which the change in capacitance occurs in the variable capacitive element connected to the terminal where the amplitude of the oscillation wave form is small. A smallest value and a largest value of the oscillation wave form vary according to differences in the central operating voltage and the amplitude of the oscillation wave form. Hence, the control voltage at which the change in capacitance begins and the control voltage at which the change in capacitance ends differ between sides.

Generally, in an oscillator of the type shown inFIG. 18, the oscillation wave form on the output side has a higher central operating voltage than the wave form on the input side. Also, the change in the capacitance of the variable capacitive elements on the input and output sides with respect to the control voltage when the amplitude is large, is as illustrated inFIG. 21. The change in the capacitance begins at a higher control voltage in the output-side variable capacitive element than in the input-side variable capacitive element. Moreover, the range of control voltage over which the change in the capacitance occurs is larger.

In this case linearity of the change in the load capacitance with respect to the control voltage is poor, as shown inFIG. 22.

Thus, in conventional voltage controlled oscillators that use variable capacitive elements, obtaining a wide frequency variation range and making the change of oscillation frequency linear with respect to the control voltage are problems.

The object of the present invention is solve these problems by providing a voltage controlled oscillator having a wide frequency variation range and an oscillation frequency that shows favorable linearity with respect to control voltage.

DISCLOSURE OF THE INVENTION

The present invention is a voltage controlled oscillator including an amplifier circuit; a piezoelectric element that is connected between an input terminal and an output terminal of the amplifier circuit and forms a feedback loop; first and second variable capacitive elements with capacitance values that change according to a control voltage respectively connected to the input terminal and the output terminal; and an analog operation circuit that generates a desired control voltage based on an inputted control voltage and applies the desired control voltage to at least one of the first and second variable capacitive elements, wherein the analog operation circuit has a multiplicative gain and generates an offset potential difference.

As an aspect of the present invention, the inputted control voltage may be applied to one of the first and second variable capacitive elements, and the desired control voltage generated by the analog operation circuit may be applied to the other of the first and second variable capacitive elements.

As an aspect of the present invention, the analog operation circuit may include a first analog operation circuit that generates a desired first control voltage based on the inputted control voltage and a second analog operation circuit that generates a desired second control voltage based on the inputted control voltage, and the first control voltage may be applied to one of the first and second variable capacitive elements and the second control voltage may be applied to the other of the first and second variable capacitive elements.

As an aspect of the present invention, the analog operation circuit may include a third analog operation circuit that generates a desired third control voltage based on the inputted control voltage and a fourth analog operation circuit that generates a desired fourth control voltage based on the third control voltage, and the third control voltage may be applied to one of the first and second variable capacitive elements and the fourth control voltage may be applied to the other of the first and second variable capacitive elements.

As an aspect of the present invention, when the inputted control voltage varies in a range of ±V1from a reference voltage Vc1and the desired control voltage varies in a range of ±V2from a reference voltage Vc2, the gain of the analog operation circuit may be V2/V1and the offset potential difference may be (Vc2−Vc1).

As an aspect of the present invention, when the inputted control voltage varies in a range of ±V1from a reference voltage Vc1, the first control voltage varies in a range of ±V5from a reference voltage Vc5, and the second control voltage varies in a range of ±V6from a reference voltage Vc6, in the first analog operation circuit the gain may be V5/V1and the offset potential difference may be (Vc5−Vc1) and in the second analog operation circuit the gain may be V6/V1and the offset potential difference may be (Vc6−Vc1).

As an aspect of the present invention, when the inputted control voltage varies in a range of ±V1from a reference voltage Vc1, the third control voltage varies in a range of ±V7from a reference voltage Vc7, and the fourth control voltage varies in a range of ±V8from a reference voltage Vc8, in the third analog operation circuit the gain may be V7/V1and the offset potential difference may be (Vc7−Vc1) and in the fourth analog operation circuit the gain may be V8/V7and the offset potential difference may be (Vc8−Vc7).

As an aspect of the present invention, when the oscillation amplitude at the input terminal is V3, the oscillation amplitude at the output terminal is V4, a central operating voltage at the input terminal is Vc3, and a central operating voltage at the output terminal is Vc4, in the analog operation circuit the gain may be V4/V3and the offset potential difference may be (Vc4−Vc3).

As an aspect of the present invention, when the oscillation amplitude at the input terminal is V3, the oscillation amplitude at the output terminal is V4, a central operating voltage at the input terminal is Vc3, and a central operating voltage at the output terminal is Vc4, a ratio of the gain in the first analog operation circuit and the gain in the second analog operation circuit may be V4/V3and a difference between the offset potential difference of the first analog operation circuit and the offset potential difference in the second analog operation circuit may be (Vc4−Vc3).

As an aspect of the present invention, when the oscillation amplitude at the input terminal is V3, the oscillation amplitude at the output terminal is V4, a central operating voltage at the input terminal is Vc3, and a central operating voltage at the output terminal is Vc4, in the fourth analog operation circuit the gain may be V4/V3and the offset potential difference may be (Vc4−Vc3).

As an aspect of the present invention, the analog operation circuit may generate the desired control voltage so that a change in capacitance value of the first variable capacitive element with respect to the inputted control voltage matches a change in capacitance value of the second variable capacitive element with respect to the inputted control voltage.

As an aspect of the present invention, the analog operation circuit may generate the desired control voltage so that a beginning point for the change in the capacitance value of the first variable capacitive element with respect to the inputted control voltage matches a beginning point for the change in the capacitance value of the second variable capacitive element with respect to the inputted control voltage, and an end point for the change in the capacitance value of the first variable capacitive element with respect to the inputted control voltage matches an end point for the change in the capacitance value of the second variable capacitive element with respect to the inputted control voltage.

As an aspect of the present invention, a change in a combined capacitance value that includes the capacitance value of the first variable capacitive element and the capacitance value of the second variable capacitive element may be linear with respect to the inputted control voltage.

As an aspect of the present invention, the gain and the offset potential difference of the analog operation circuit may be alterable.

As an aspect of the present invention, when the analog operation circuits are ICs, the gain and the offset potential difference of the analog operation circuit may be set to different values in each IC.

As an aspect of the present invention, the amplifier circuit, the first and second variable capacitive elements, and the analog operation circuit may be formed on a same substrate and built into an IC.

As an aspect of the present invention, the piezoelectric element may be a surface acoustic wave piezoelectric element.

As an aspect of the present invention, the voltage controlled oscillator may further include a voltage measuring unit operable to measure the respective voltages at the input terminal and the output terminal; and a control unit operable to control the gain and the offset potential difference of the analog operation circuit based on both of the measured voltages.

The present invention is a method for generating and applying a control voltage for a voltage controlled oscillator that includes an amplifier circuit, a piezoelectric element that is connected between an input terminal and an output terminal of the amplifier circuit and forms a feedback loop, and first and second variable capacitive elements with capacitance values that change according to the control voltage respectively connected to the input terminal and the output terminal, the method including steps of: generating a desired control voltage based on the inputted control voltage so that the change in capacitance value in the first variable capacitive element with respect to the inputted control voltage matches the change in capacitance value in the second variable capacitive element with respect to the inputted control voltage, and applying the generated desired control voltage to the at least one of the first and second variable capacitive elements.

As an aspect of the present invention, a change in a combined capacitance value that includes the capacitance value of the first variable capacitive element and the capacitance value of the second variable capacitive element may be linear with respect to the inputted control voltage during the operation of the voltage controlled oscillator.

The present invention is also a method for designing a voltage controlled oscillator including an amplifier circuit; a piezoelectric element that is connected between an input terminal and an output terminal of the amplifier circuit and forms a feedback loop; first and second variable capacitive elements with capacitance values that change according to a control voltage respectively connected to the input terminal and the output terminal; and an analog operation circuit that generates a desired control voltage based on an inputted control voltage and applies the desired control voltage to at least one of the first and second variable capacitive elements, the method including: a steps of measuring respective voltage values at the input and output terminals; a step of determining a desired control voltage so that the change in capacitance value in the first variable capacitive element with respect to the inputted control voltage matches the change in capacitance value in the second variable capacitive element with respect to the inputted control voltage, based on both of the measured voltage values; and a step of setting values of gain and offset potential difference in the analog operation circuit so that the analog operation circuit generates the desired control voltage.

As an aspect of the present invention, the change in a combined capacitance value that includes the capacitance value of the first variable capacitive element and the capacitance value of the second variable capacitive element is linear with respect to the inputted control voltage.

In a voltage controlled oscillator of the present invention having this type of construction, since different control voltages are applied to the respective variable capacitive elements on the input side and the output side according to the difference in the central operating voltage and the difference in the oscillation amplitude at the input-side terminal and the output-side terminal of the amplifier circuit, the changes in capacitance in the variable capacitive elements with respect to control voltage on the input side can be made to match the change in capacitance with respect to control voltage on the output side. As a result, the load capacitance can be made to vary linearly with respect to the control voltage.

Also, by increasing the offset potential difference between the voltages applied to the respective variable capacitive elements on the input and output sides, it is possible to adjust a rate of change of frequency with respect to control voltage while retaining linearity in the change in capacitance with respect to control voltage.

BEST MODE FOR CARRYING OUT THE INVENTION

The following describes embodiments of the present invention with reference to the drawings.

First Embodiment

A construction of a first embodiment of a voltage controlled oscillator of the present invention is described below with reference toFIG. 1.

The voltage controlled oscillator of the first embodiment includes, as shown inFIG. 1, an amplifier circuit21, a piezoelectric element22connected in parallel between an input terminal and an output terminal of the amplifier circuit21and forming a feedback loop, a resistor23forming a feedback loop, variable capacitive elements24and25respectively connected to the input terminal and the output terminal of the amplifier circuit21and each having a capacitance value that varies according to an applied control voltage, and an analog operation circuit26. The piezoelectric element22is a device such as a surface acoustic wave piezoelectric element, a crystal resonator, or a ceramic resonator.

Here, the amplifier circuit21, the variable capacitive elements24and25, the analog operation circuit26and the like may formed on a same substrate as part of an IC. The above-described construction is substantially the same in each of the following embodiments.

In the first embodiment, a control voltage Vc is applied to the variable capacitive element24to change the capacitance value of the variable capacitive element24, and a desired following control voltage (hereinafter control voltage) Vcs that follows the control voltage Vc is generated based on the control voltage Vc by the analog operation circuit26, and applied to the variable capacitive element25to change the capacitance value of the variable capacitive element25.

Any circuit construction is acceptable for the analog operation circuit26of the first embodiment provided that the circuit receives the control voltage Vc as an input and outputs the desired control voltage Vcs, which differs from the control voltage Vc.

FIG. 2shows an implementation of the analog operation circuit26. The analog operation circuit26includes a resistor261, a resistor262, a DC power source263, an input terminal264, and an output terminal265. Terminals of the resistor261respectively connect to the input terminal264and the output terminal265. The resistor262and the DC power source263are connected in series, with one end connected to the output terminal265and the other end connected to ground.

In the analog operation circuit26of this construction, it is possible to obtain the desired control voltage Vcs, which differs from the control voltage Vc inputted to the input terminal264, from the output terminal265by altering a portion or all of the values of the resistor261, the resistor262and the DC power source263.

FIG. 3shows an example construction of the variable capacitive element24and the variable capacitive element25used in the first embodiment.

The variable capacitive elements24and25are each formed using a MOS transistor M1and include a capacitor C1. When the MOS transistor M1is used as the variable capacitive element24or the variable capacitive element25, a drain terminal is connected to an input terminal or an output terminal of the amplifier circuit21.

A source terminal of the MOS transistor M1is connected to ground via the capacitor C1. When the MOS transistor M1is used as the variable capacitive element24or the variable capacitive element25, the control voltage Vcs from the analog operation circuit26or the control voltage Vc is applied to a gate terminal.

In the variable capacitive element24of this construction, the capacitance value changes according to the control voltage Vc applied to the gate terminal of the MOS transistor M1. In the variable capacitive element25, on the other hand, the capacitance value varies according to the control voltage Vcs from the analog operation circuit26applied to the gate terminal of the MOS transistor M1.

When a connection method of the type shown inFIG. 3is used, the change in capacitance of the variable capacitive elements24and25with respect to the control voltage applied to the gate terminal is positive in polarity. Thus, as the control voltage applied to the gate terminal increases, the capacitance value of the variable capacitive element in question grows larger.

Second Embodiment

A construction of a second embodiment of a voltage controlled oscillator of the present invention is described below with reference toFIG. 4.

The voltage controlled oscillator of the second embodiment includes, as shown inFIG. 4, the amplifier circuit21, the piezoelectric element22connected in parallel between the input terminal and the output terminal of the amplifier circuit21to form a feedback loop, the resistor23that forms a feedback loop, the variable capacitive elements24and25respectively connected to the input terminal and the output terminal of the amplifier circuit21and each having a capacitance value that varies according to the applied control voltage, and the analog operation circuit26.

In the second embodiment, the control voltage Vc is applied to the variable capacitive element25to change the capacitance value of the variable capacitive element24, and the control voltage Vcs is generated by the analog operation circuit26based on the control voltage Vc and applied to the variable capacitive element24to change the capacitance value of the variable capacitive element24.

Thus, the difference between the first and second embodiments is in that the control voltage Vc is switched from being applied to the variable capacitive element24in the first embodiment to being applied to the variable capacitive element25in the second, and the control voltage Vcs from the analog operation circuit26is switched accordingly from being applied to the variable capacitive element25to being applied to the variable capacitive element24.

Otherwise, the other constructions of the second embodiment are the same as the first embodiment, and either of the implementations shown inFIG. 2andFIG. 3can be used.

Third Embodiment

A construction of a third embodiment of the voltage controlled oscillator of the present invention is described below with reference toFIGS. 5A and 5B.

The voltage controlled oscillator of the third embodiment includes, as shown inFIGS. 5A and 5B, the amplifier circuit21, the piezoelectric element22connected in parallel between the input terminal and the output terminal of the amplifier circuit21to form a feedback loop, the resistor23that forms a feedback loop, the variable capacitive elements24and25respectively connected to the input terminal and the output terminal of the amplifier circuit21and each having a capacitance value that varies according to the applied control voltage, and analog operation circuits26and27having different functions (operations).

In the third embodiment, as shown inFIG. 5A, the analog operation circuit26generates a prescribed control voltage (hereinafter control voltage) Vcs1, which follows the control voltage Vc, based on the control voltage Vc, and applies the generated control voltage Vcs1to the variable capacitive element24to change the capacitance value of the variable capacitive element24. The analog operation circuit27generates a desired control voltage (hereinafter control voltage) Vcs2based on the control voltage Vc, and applies the generated control voltage Vcs2to the variable capacitive element25to change the capacitance value of the variable capacitive element25.

As shown inFIG. 5B, the analog operation circuit26generates the desired control voltage Vcs1, which follows the control voltage Vc, based on the control voltage Vc, and applies the generated control voltage Vcs1to the variable capacitive element24to change the capacitance value of the variable capacitive element24. The analog operation circuit27generates the desired control voltage Vcs2, which follows the control voltage Vcs1, based on the control voltage Vcs1which is generated in the analog operation circuit26, and applies the generated control voltage Vcs2to the variable capacitive element25to change the capacitance value of the variable capacitive element25.

Here, in the third embodiment, the analog operation circuits26and27are constructed in the same way as the analog operation circuit26in the first embodiment, and the implementation shown inFIG. 2is applicable. The variable capacitive elements24and25in the third embodiment are constructed in the same as the variable capacitive elements24and25in the first embodiment, and the implementation shown inFIG. 3is applicable.

Fourth Embodiment

A construction of a fourth embodiment of the voltage controlled oscillator of the present invention is described below.

The voltage controlled oscillator of the fourth embodiment is an arrangement of any of the first to third embodiments in which the analog operation circuit26or the analog operation circuit27constructed from an analog operation circuit having a non-zero multiplicative gain.

Other portions in the construction of the fourth embodiment, are substantially the same as in the first to third embodiments, and so a description of these other portions is omitted.

FIG. 6is an example construction of the above-described analog operation circuit of the fourth embodiment.

The analog operation circuit ofFIG. 6is a non-inverting amplifier circuit that includes a differential operational amplifier circuit (operational amplifier)601, a DC power source602, a resistor603, and a resistor604, and it is possible to change the gain of the circuit using a ratio between values of the resistor603and the resistor604. With this arrangement a DC voltage is applied by the DC power source602.

Specifically, the + input terminal of the differential operational amplifier circuit601is connected to an input terminal605, and the control voltage Vc is applied to the input terminal605. The DC power source602and the resistor603are connected in series. The terminal at one end of the series circuit connects to ground, and the terminal at the other end connects to the − input terminal of the differential operational amplifier circuit601. The resistor604is connected between the − input terminal and the output terminal of the differential operational amplifier circuit601, and the output terminal of the differential operational amplifier circuit601is connected to an output terminal606. The control voltage Vcs is outputted from the output terminal606.

Any circuit construction is acceptable for the analog operation circuit of the fourth embodiment provided that the circuit has a non-zero multiplicative gain (control voltage Vcs/control voltage Vc).

Fifth Embodiment

A construction of a fifth embodiment of the voltage controlled oscillator of the present invention is described below.

The voltage controlled oscillator of the fifth embodiment is the arrangement of any of the first to third embodiments, in which the analog operation circuit26or the analog operation circuit27constructed from an analog operation circuit that has a non-zero multiplicative gain and generates an offset potential difference between central operating voltages of input and output voltages.

Note that other portions in the construction of the fifth embodiment are substantially the same as in the first to third embodiments, and so a description of these other portions is omitted.

In the analog operation circuit of the fifth embodiment, the offset potential difference between the central operating voltages of the input and output voltages can be generated by a method of, for instance, the DC power source602inFIG. 6applying a voltage that differs from the central operating voltage of the input voltage.

Any circuit construction is acceptable for the analog operation circuit of the fifth embodiment provided that the circuit has a non-zero multiplicative gain, and an offset potential difference between the central operating voltages of the input and output voltages.

Sixth Embodiment

A construction of a sixth embodiment of the voltage controlled oscillator of the present invention is described below.

The voltage controlled oscillator of the sixth embodiment is the arrangement of any of the first to fifth embodiments, in which the analog operation circuit26or the analog operation circuit27made up of one or more resistors and one or more amplifier circuits.

Other portions of the sixth embodiment are of substantially the same construction as in the first to fifth embodiments, and so a description of these other portions is omitted.

The analog operation circuit of the sixth embodiment is not limited to circuit constructions of the type shown inFIG. 6. Any construction is acceptable provided that one or more resistors and one or more amplifier circuits are used. For instance, a construction of the type shown inFIG. 7may be used.

FIG. 7shows an example construction of the analog operation circuit of the sixth embodiment.

The analog operation circuit ofFIG. 7is an inverting amplifier circuit that includes a differential operational amplifier circuit701, a DC power source702, a resistor703, and a resistor704. A gain of the circuit can be changed using a ratio between a value of the resistor703and a value of the resistor704, and it is possible to adjust an offset voltage difference between an input voltage and an output voltage by means of the voltage value of the DC power source702.

In this analog operation circuit, if the resistor703is denoted R1and the resistor704is denoted R2, the gain is −(R2/R1), and the polarities of the input voltage and the output voltage are different. Hence, it is necessary to reverse the polarity of the change in capacitance with respect to control voltage in the variable capacitive elements on the input and output sides of the amplifier circuit.

For instance, when a variable capacitive element of the type shown inFIG. 8is used, one method for connecting a variable capacitive element to the input or output side of the amplifier circuit is to connect the gate terminal inFIG. 8to the amplifier circuit side terminal and apply the control voltage to a common source-drain terminal. With this method, the change in capacitance with respect to control voltage is positive. The method for connecting the other variable capacitive element is to connect the common source drain terminal to the amplifier circuit side terminal and apply the control voltage to the gate terminal. With this method, the change in capacitance with respect to control voltage is negative. Thus, the polarities of the changes in capacitance in the variable capacitive elements on the input and output sides of the amplifier circuit are made to match equivalently.

Alternatively, with the variable capacitive elements connected in the same way on the input and output sides of the amplifier circuit, the analog operation circuit ofFIG. 7is replaced with a circuit shown inFIG. 9. This enables the same polarities to be achieved in the control voltages for the variable capacitive elements on the input and output sides. As a result, the polarity of the change in capacitance with respect to control voltage on the input side matches the polarity of the change in capacitance with respect to control voltage on the output side.

The analog operation circuit ofFIG. 9is constructed from a first inverting amplifier circuit that includes a differential operational amplifier circuit901, a DC power source902, a resistor903, a resistor904and a second inverting amplifier circuit that includes a differential amplifier circuit905, a DC power source902, a resistor906, and a resistor907. The first and second inverting amplifier circuits are connected together to form a single non-inverting amplifier circuit.

A gain of the whole circuit can be changed by varying values of the resistors903,904,906, and907, and it is possible to adjust an offset voltage difference between an input voltage and an output voltage by means of a voltage value of the DC power source902.

In the analog operation circuit with this construction, if the resistor903is denoted R1, the resistor904denoted R2, the resistor906denoted R3, and the resistor907denoted R4, the gain is (R2/R1)×(R4/R3), and the polarities of the input voltage and the output voltage are the same.

Note that in the above-described embodiments, besides the MOS transistors shown inFIG. 3and FIG.8, the MOS transistor shown inFIG. 10or a variable capacitive element diode may be used as the variable capacitive element. Any number, where the number is an integer not less than one, of variable capacitive elements may be connected to the input side, the output side, or both sides of the amplifier circuit. Moreover, one or more fixed capacitors may be used together with the one or more variable capacitive elements on the input side, the output side, or on both sides.

Examples of the Embodiments in Operation

Examples of embodiments in operation of the present invention are described below.

The following describes operations of the fifth embodiment as an example of an embodiment in operation. Since the fifth embodiment is based on the construction of the first embodiment, the description refers toFIG. 1andFIG. 6.

In this embodiment, the oscillation wave forms at the input terminal and the output terminal of the amplifier circuit21have differing amplitude and differing central operating voltages. To clarify the operations, an example of wave forms at the input terminal X and the output terminal Y during oscillation inFIG. 1are shown inFIGS. 11A and 11Bas an example.

Further,FIG. 12shows the respective changes in capacitance in the variable capacitive element24and the variable capacitive element25with respect to control voltage when a same control voltage is applied to the output-side variable capacitive element25and the input-side variable capacitive element24inFIG. 1. In other words, the control voltage Vc is not passed through the analog operation circuit26. Note that the variable capacitive elements24and25make use of the circuit construction shown inFIG. 3.

According toFIG. 12, the capacitance of the input-side variable capacitive element24increases continuously between a control voltage Vc in the region of 0.9 V and control voltage Vc in the region of 1.7 V. On other hand, the capacitance of the output-side variable capacitive element25increases continuously between a control voltage Vc in the region of 1.4 V and control voltage Vc in the region of 2.5 V.

Hence, the change with respect to the control voltage Vc in the combined capacitance of the input and output-side variable capacitive elements24and25is as shown inFIG. 13, and the linearity of the change in load capacitance with respect to control voltage Vc is poor.

Here, the gain and offset voltage of the analog operation circuit26inFIG. 1are adjusted so that the analog operation circuit26generates a control voltage Vcs that causes the control voltage section corresponding to the change in capacitance in the output-side variable capacitive element25to match the control voltage section corresponding the change in capacitance in the input-side variable capacitive element24. This control voltage Vcs is then applied to the output-side variable capacitive element25.

In other words, the analog operation circuit26generates the control voltage Vcs in accordance with the control voltage Vc in order to match on the input and output side the changes in capacitance of the variable capacitive elements24and25with respect to control voltage to apply to the variable capacitive element25.

Thus, the analog operation circuit26generates the desired control voltage Vcs so that the beginning point of the change in capacitance value of the variable capacitive element24with respect to inputted control voltage matches the beginning point of the change in capacitance value of the variable capacitive element25with respect to inputted control voltage, and the ending point of the change in capacitance value of the variable capacitive element24with respect to inputted control voltage matches the ending point of the change in capacitance value of the variable capacitive element25with respect to inputted control voltage.

The following is a practical description of a method to determine the control voltage Vcs, and refers toFIG. 1,FIG. 3,FIG. 11A,FIG. 11BandFIG. 12.

When the variable capacitive element24shown inFIG. 1is of the circuit construction shown inFIG. 3, the control voltage Vc is applied to the gate terminal of the MOS transistor M1, and the drain terminal has a central operating voltage of 0.5 V and a wave-form peak-to-peak voltage difference Vpp (hereinafter Vpp) of 0.6 V (seeFIG. 11A). At this point, since a minimum voltage at the drain terminal is 0.2 V and a maximum voltage is 0.8 V, when the threshold voltage for the variable capacitive element24(MOS transistor) is denoted Vt (V), the change in the capacitance of the variable capacitive element24begins at a control voltage Vc of 0.2+Vt (V) and ends at a control voltage Vc of 0.8+Vt (V). The central voltage for the change in capacitance is an oscillation amplitude central operating voltage of 0.5 V+Vt (V).

When the variable capacitive element25shown inFIG. 1is of the circuit construction shown inFIG. 3, the control voltage Vcs generated by the analog operation circuit26is applied to the gate terminal of the MOS transistor M1, and the drain terminal has a central operating voltage of 1.0 V and a Vpp of 1.0 V (seeFIG. 11B). At this point, since at the drain terminal a minimum voltage is 0.5 V and a maximum voltage is 1.5 V, when the threshold voltage for the variable capacitive element25(MOS transistor) is denoted Vt (V), the change in the capacitance of the variable capacitive element25begins at a control voltage Vcs of 0.5+Vt (V) and ends at a control voltage Vcs of 1.5+Vt (V). The central voltage for the change in capacitance is an oscillation amplitude central operating voltage of 1.0+Vt (V).

Now, with a threshold voltage Vt of 0.7 V for the variable capacitive elements24and25, the change in the capacitance of the variable capacitive element24begins at a control voltage Vc of 0.9 V and ends at a control voltage Vc of 1.5 V. The central voltage for the change in capacitance is 1.2 V. The change in the capacitance of the variable capacitive element25is considered to begin at a control voltage Vcs of 1.2 V and end at a control voltage Vcs of 2.2 V. The central voltage for the change in capacitance is 1.7 V. In regions near the voltages at which the change in capacitance begins and ends, the change in capacitance of the variable capacitive element varies minutely, and so the beginning and end voltages may differ slightly from the stated values. The change in capacitance will however substantially match that shown inFIG. 12.

In summary, in the variable capacitive element24the changes in capacitance occur at control voltages Vc in the range 1.2±0.3 V, and in the variable capacitive element25the changes in capacitance occur at control voltages Vcs that are generated by the analog operation circuit26in the range 1.7±0.5 V.

In short, the changes in capacitance in the variable capacitive elements24and25are determined by the wave forms at oscillation terminals (the input and output terminals of the amplifier circuit21) to which the variable capacitive elements are connected. A section D of the control voltage over which the change in capacitance occurs in the variable capacitive elements24and25is found as follows using equation (2).
D=(central operating voltage of oscillation wave form+threshold voltage of variable capacitive element)±oscillation wave formVpp/2  (2).

As described above, the range of control voltages Vc over which the change in capacitance of the variable capacitive element24occurs is 1.2±0.3 V, and the range of control voltages Vcs over which the change in capacitance of the variable capacitive element25occurs is 1.7±0.5 V. Thus, when Vc=Vcs, the changes in capacitance fail to match, as shown inFIG. 12.

The gain and offset (offset potential difference) of the analog operation circuit26are therefore adjusted so that, in the section where the control voltage Vc is 1.2±0.3 V, the control voltage Vcs becomes 1.7±0.5 V.

If the gain of the analog operation circuit26is denoted Ga, the offset (offset potential difference) is donated Oa, and a reference voltage for the control voltage Vc is denoted Vcc, the control voltage (output voltage) Vcs from the analog operation circuit26may be expressed as follows in equation (3) in the case of the control voltage Vc is inputted.
Vcs=(Vc−Vcc)×Ga+(Vcc+Oa)  (3).

The gain Ga is set so that the control voltage Vcs varies ±0.5 V for the ±0.3 V section of the control voltage Vc, and can therefore be found as follows.
Ga=0.5/0.3=1.67.

When the reference voltage for the control voltage Vc is 1.2 V, the offset Oa is set so that the reference voltage for the control voltage Vcs is 1.7 V, and can therefore be found as follows.
Oa=1.7−1.2=0.5(V).

Substituting these into equation (3) gives the control voltage Vcs as follows.

Cases in which the gain Ga and the offset Oa of the analog operation circuit26are varied individually are described below.

If the gain Ga is made larger than 1.67, the change in the control voltage Vcs is larger than ±0.5 V for the ±0.3 V range of the control voltage Vc, and the change in capacitance of the variable capacitive element25becomes steeper.

If the offset Oa is made larger than 0.5 V, when the control voltage Vc is 1.2 V the control voltage Vcs becomes larger than 1.7 V, and so the beginning and end voltages for the change in capacitance in the variable capacitive element25with respect to the control voltage Vc become equivalently smaller.

In other words, to match the changes in capacitance with respect to the control voltage Vc in the variable capacitive elements24and25, it is necessary to adjust the gain Ga and the offset Oa of the analog operation circuit26.

More specifically, since the section over which the change in capacitance occurs in the variable capacitive elements24and25is expressed by equation (2), the gain Ga of the analog operation circuit26is found using a ratio of the Vpp at the oscillation terminals respectively connecting to the variable capacitive elements24and25. In other words, the gain Ga is found as follows.
Ga=(Vppfrom oscillation amplitude at terminal connected to variable capacitive element 25)/(Vppfrom oscillation amplitude at terminal connected to variable capacitive element 24)=1.0/0.6=1.67.

Similarly, the offset Oa of the analog operation circuit26is found using a difference between the central operating voltages at the oscillation terminals connecting to the variable capacitive elements24and25. In other words, the offset Oa is found as follows.
Oa=(central operating voltage at terminal connected to variable capacitive element 25)−(central operating voltage of oscillation amplitude at terminal connected to variable capacitive element 24)=1.0−0.5=0.5(V).

Use of these properties enables the gain and the offset potential difference of the analog operation circuit26to be adjusted by observing the oscillation wave form using monitor as described below.

FIG. 14shows an example of the relationship between the control voltage Vcs generated by the analog operation circuit26and the control voltage Vc inputted to the analog operation circuit26.

When the circuit ofFIG. 6is used as the analog operation circuit26, the resistor603is denoted R1, and the resistor604is denoted R2, the gain Ga is expressed as follows in equation (4).
Ga=1+(R2/R1)  (4).

The relationship between R1and R2is therefore R1:R2=1:0.67.

The voltage V1applied by the DC power source602, which is the voltage V1generated by the DC power source602, is V1=0.454 (V) from equation (5).
V1=1.2−(1.7−1.2)×(R1/R2)=0.454  (5).

As a result of these operations by the analog operation circuit26, the changes in capacitance with respect to the control voltage Vc in the variable capacitive elements24and25on the input and output side of the amplifier circuit21can be substantially matched, as shown inFIG. 15.

As shown inFIG. 16, since it is possible, by using the above embodiments, to make the change in the combined capacitance substantially linear with respect to the control voltage, the linearity of the change in oscillation frequency with respect to control voltage can be greatly improved.

When a smaller rate of change in oscillation frequency with respect to control voltage is desired, the following may be used.

For instance, adjusting the voltage of the DC power source602of the analog operation amplifier circuit26(seeFIG. 6) reduces the value of the generated control voltage Vcs and causes the change in capacitance in the input-side variable capacitive element24to occur first and the change in capacitance in the output-side variable capacitive element25to occur second. Alternatively, the value of the control voltage Vcs may be increased so that the change in capacitance of the output-side variable capacitive element25occurs first and the change in capacitance of the input-side variable capacitive element24occurs second. In both cases, the rate of change of oscillation frequency with respect to control voltage can be lowered.

When doing this, it is possible to retain the linearity of the change in oscillation frequency with respect to control voltage by adjusting the gain of the analog operation circuit26.

Though it is the operations of the fifth embodiment that are described above with reference to theFIG. 1andFIG. 6, circuit operations in the other embodiments are substantially the same.

For instance, in the embodiment with the construction shown inFIG. 4, generating the control voltage Vcs by the analog operation circuit26so that the change in capacitance of the input-side variable capacitive element24corresponds to the change in capacitance of the output-side variable capacitive element25achieves effects resembling those in the circuit construction ofFIG. 1. Moreover, as described above, it is possible to reduce the rate of change of frequency with respect to control voltage by adjusting the gain and the offset of the analog operation circuit26.

Moreover, in the embodiment having the circuit construction shown inFIGS. 5A and 5B, it is possible to alter the section corresponding to the change in capacitance with respect to the control voltage Vc while retaining the linearity of the change by having the analog operation circuits26and27generate control voltages Vcs1and Vcs2that are smaller (or larger) than the control voltage Vc. This also makes it possible to adjust the rate of the change of frequency.

When the changes in capacitance in the input and output-side variable capacitive elements24and25are matched using the circuit construction ofFIG. 1, the change in load capacitance is still as described above and shown inFIG. 16, but the range of the control voltages Vc over which the change in capacitance occurs is 1.2±0.3 V.

For instance, a control voltages Vc range of 1.5±1.5 V as the desired section corresponding to the change in capacitance is possible by using the circuit construction ofFIG. 5and adjusting the control voltages Vcs1and Vcs2inputted to the variable capacitive elements24and25.

The change in capacitance in the variable capacitive element24occurs in the section where the control voltage Vcs1is 1.2±0.3 V, and the change in capacitance in the variable capacitive element25occurs in the section where the control voltage Vcs2is 1.7±0.5 V. Thus, by adjusting the gain and offset of the analog operation circuits26and27so as to output Vcs1=1.2±0.3 V and Vcs2=1.7±0.5 V for Vc=1.5±1.5 V, it is possible to vary the section over which the change in load capacitance occurs and thereby adjust the rate of change of capacitance (in other words the rate of change of frequency).

To satisfy the above condition using the circuit construction ofFIG. 5A, a gain Ga1and an offset Oa1of the analog operation circuit26are set so that Ga1=0.3/1.5=0.2 and Oa1=1.2−1.5=−0.3 (V). Meanwhile, the gain Ga2and the offset Oa2of the analog operation circuit27are set so that Ga2=0.5/1.5=1/3 and Oa2=1.7−1.5=0.2 (V).

If, however, the circuit construction ofFIG. 5Bis used, the gain Ga1and the offset Oa1of the analog operation circuit26are set so that Ga1=0.3/1.5=0.2 and Oa1=1.2−1.5=−0.3 (V). The gain Ga2and the offset Oa2of the analog operation circuit27are set so that Ga2=0.5/0.3=5/3 and Oa2=1.7−1.2=0.5 (V).

More specifically, the gains Ga1and Ga2of the analog operation circuits26and27are found using the ratio of Vpp at the oscillation terminals to which the variable capacitive elements24and25are respectively connected.

In other words, Ga1/Ga2can be found as follows.
Ga1/Ga2=(Vppfor oscillation amplitude at terminal connected to variable capacitive element 25)/(Vppfor oscillation amplitude at terminal connected to variable capacitive element 24).

Hence if one of the gains Ga1and Ga2is set to a desired value, the other can be determined.

The offsets Oa of the analog operation circuits26and27are found in a similar manner using the differences in the central operating voltages at the oscillation terminals respectively connected to the variable capacitive elements24and25.

The offset Oa can be found as follows.
Oa=(central operating voltage at terminal connected to variable capacitive element 25)−(central operating voltage of oscillation amplitude at terminal connected to variable capacitive element 24).

Use of these characteristics enables adjustment of the gain and offset of the analog operation circuits26and27by observing the oscillation wave form.

These methods are useful when the amplitude of oscillation wave form is exceedingly large, when the amplitude of oscillation wave form is exceeding small and when the circuit is being operated using a low-power source voltage.

Also, none of the embodiments demand that all parts are included in one or more IC. Operations equivalent to the operations of the embodiments can be achieved using present methods. In other words, the circuits may be constructed from individual parts.

In any one or more of the embodiments, adjustments to the gain and offset voltage of the analog operation circuit can be from within the IC, or from an external part using an external digital signal.

Internal adjustment of the IC enables the variation in performance that is introduced during IC manufacture to be suppressed.

External adjustment to the IC enables an equivalent suppression of the manufacturing variation in parts other than the IC. For example, in circuit construction where the piezoelectric element and the IC are combined, even if the IC variation (manufacturing variation in components other than the piezoelectric element) is suppressed, the characteristics of the combined circuit will vary due to the variation resulting from the piezoelectric element manufacturing process. However, if external adjustment of the IC is used to eliminate the piezoelectric element variation, it is possible to reduce variation in the characteristics of the combined circuit.

Possible methods for adjusting the gain and offset of the analog operation circuit include altering the values of the resistors603and604and the DC power source602in the circuit ofFIG. 6by switching one or more switches that control the values of the resistors603and604and the DC power source602. The switching is controlled using an external signal and volatile memory, non-volatile memory or the like.

Seventh Embodiment

A construction of a seventh embodiment of the voltage controlled oscillator of the present invention is described below.

The voltage controlled oscillator of the seventh embodiment is the arrangement of any of the first to fifth embodiments, in which the wave form at the input and output terminals of the amplifier circuit21is monitored, the gain and the offset of the analog operation circuit26or the analog operation circuit27can be adjusted or controlled, and the adjustment and control is performed using memory or the like. Other portions of the seventh embodiment have a construction that is substantially the same as in the first to fifth embodiments, and so a description of these other portions is omitted.

FIG. 23shows an implementation of the seventh embodiment.FIG. 24shows an example construction of the analog operation circuit inFIG. 23.

The seventh embodiment is based on the construction of the first embodiment shown inFIG. 1, but further includes a monitor (voltage measuring device)31that measures respective wave forms at an input terminal X and an output terminal Y of the amplifier circuit21and a memory32that sets the gain and the offset for the analog operation circuit26based on the voltages measured by the monitor31. The memory32is, for instance, made up of non-volatile memory that allows free data reading and writing.

The seventh embodiment may include two measured terminals (not shown in the drawings) at which the respective voltage wave forms at the input terminal X and the output terminal Y of the amplifier circuit21are measured. Both measured terminals may connect to measurement probes or the like in the monitor31so as to enable measurement of the respective voltage wave forms (voltage values).

The analog operation circuit26includes, as shown inFIG. 24, the differential operational amplifier circuit601, an electronic volume control607, constructed from a transistor or the like, and an electronic volume control608constructed from a transistor or the like.

The electronic volume control607alters the ratio of the input resistor and the feedback resistor of the differential operational amplifier circuit601and thereby sets the gain of the analog operation circuit26to a desired value. In order to achieve this, a first side of the electronic volume control607is connected to an output terminal of the electronic volume control608, and an other side is connected to the output terminal of the differential operational amplifier circuit601. A middle tab of the electronic volume control607is connected via a switch to the − input terminal of the differential amplifier circuit601. It is then possible to have the electronic volume control607set (adjust) the gain of analog operation circuit26to a desired value by switching the switch according to a control signal (control data) from the memory32. After setting, the set value is maintained by the memory32.

The electronic volume control608sets (controls) the offset potential difference of the analog operation circuit26to a desired value. In order to achieve this, a first end of the electronic volume control608is supplied with the reference voltage, an other end is connected to ground, and a middle tab is connected via a switch to the first end side of the electronic volume control607. It is then possible to alter the resistance value of the electronic volume control608by switching the switch according to a control signal from the memory32, and thereby set (adjust) the offset potential difference of the analog operation circuit26to a desired value. After setting, the set value is maintained by the memory32.

When the seventh embodiment is constructed using an IC, the wave form measured using the monitor31may be temporarily outputted to an external part and then fed back to the memory32, or may be processed within the IC without being outputted to the external part. If the arrangement allows the values in the memory32to be set from the external part of IC, it is possible to freely adjust the gain and offset potential difference of the analog operation circuit26.

The following describes, with reference toFIG. 23andFIG. 24, an example of a design (production) procedure for a voltage controlled oscillator with desired characteristics according to the seventh embodiment having the above construction.

First, the voltage controlled oscillator shown inFIG. 23is put into an oscillating state, and the voltage wave forms (voltage values) at the input terminal X and the output terminal Y of the amplifier circuit21are measured using the monitor31.

Next, the desired control voltage Vcs to be generated by the analog operation circuit26is determined based on the measured voltage values. The desired control voltage Vcs is selected so that the change in capacitance value in the variable capacitive element24with respect to the inputted control voltage value Vc matches the change in capacitance value in the variable capacitive element25with respect to the inputted control voltage value Vc.

The values of the gain and the offset of the analog operation circuit26are set while measuring (monitoring) both of the voltage wave forms using the monitor31, so that the analog operation circuit26generates the desired control voltage Vcs. Setting to these values is performed by switching the switches of the electronic volume controls607and608of the analog operation circuit26using control signals from the memory32.

By designing the voltage controlled oscillator using this procedure, the change in the combined capacitance value, which includes the capacitance value of the variable capacitive element24and the capacitance value of the variable capacitive element25, with respect to the inputted control voltage Vc can be made linear.

INDUSTRIAL APPLICABILITY

According to the above invention, different control voltages are applied to input and output-side variable capacitive elements according to differences in oscillation amplitudes and central operating voltages at the input-side terminal and the output-side terminal of an amplifier circuit, and it is thereby possible to match changes in capacitance with respect to control voltage in the variable capacitive elements on the input and output sides, and as a result, to make the change in load capacitance linear with respect to the control voltage.

Also, by increasing the offset potential difference between the voltages applied to the respective input and output-side variable capacitive elements, it is possible to adjust a rate of change of frequency with respect to the control voltage while retaining the linearity in the change in capacitance with respect to control voltage.