Solid state image pickup device

There is provided a solid state image pickup device provided with an image pickup unit containing plural photoelectric conversion elements and a reference clock generation circuit for determining the timing of the drive pulse, wherein the image pickup unit and the reference clock generation circuit are formed in a same semiconductor chip in order to reduce the electric power consumption.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to driving control for a solid state image pickup device.

2. Related Background Art

Conventionally there is known a method for driving a solid state image pickup device as shown inFIG. 1, in which there are shown an image sensor chip1, a drive timing control device2such as a microcomputer (hereinafter called microcomputer) for controlling the image sensor chip1by outputting driving pulses therefore, drive mode control wirings3, drive pulse wirings5, a reference clock wiring6, a drive pulse generation circuit21provided in the image sensor chip1, and an image pickup unit/peripheral circuit22including plural photoelectric converting elements etc. and a peripheral circuit including horizontal and vertical scanning circuits.

FIG. 2shows another conventional configuration, wherein shown are an image sensor chip1including the image pickup unit/peripheral circuit22shown inFIG. 1, a drive pulse generation circuit4, and drive pulse wirings5. The drive pulse generation circuit4is not integrated in an image sensor chip. InFIG. 2, the microcomputer2, the drive mode control wirings3, and the reference clock wiring6are the same as those in FIG.1.

In the configuration shown inFIG. 1, the image sensor for outputting the image signal is operated by driving the image pickup unit and peripheral circuit22either directly by the drive mode control wirings3and the reference clock wiring6or by drive pulses generated in a circuit in the image sensor chip based on the drive mode control wirings3and the reference clock wiring6. The configuration shown inFIG. 2is employed in case requiring drive pulses of a strong driving force, wherein the required drive pulses are generated by the chip of the drive pulse generation circuit4, based on the drive mode control wirings3and the reference clock wiring6.

In either case, the operation mode of the image sensor chip1and the timing thereof are determined by the drive timing controlling device2such as the microcomputer, and the microcomputer2has to be operated in order to drive the image sensor chip1.

However such conventional operation of the image sensor chip solely by the external drive causes a drawback in certain situations.

For example, such drawback occurs in a case where the image sensor chip performs a preliminary operation and a main operation, in which the main operation accesses the required image information, and the preliminary operation monitors the projection of the required image onto the image sensor chip. In such process, the main operation starts after the necessary image is projected on the image sensor chip in the preliminary operation, but the preliminary operation may continue for a long period during which the microcomputer2and the drive pulse generation circuit4have to be continuously operated, so that the consumption of the electric power continues even while the access of the required image information does not take place.

SUMMARY OF THE INVENTION

The object of the present invention is to provide a solid state image pickup device, capable of saving the electric power consumption.

The above-mentioned object can be attained, according to an aspect of the present invention, by a solid state image pickup device in which a reference clock generation circuit for determining the basic timing of the drive pulses for the image pickup unit is formed in a same semiconductor chip as that of the image pickup unit or the drive pulse generation circuit.

According to an another aspect of the present invention, there is provided a solid state image pickup device comprising an image pickup unit including plural photoelectric conversion elements, a drive pulse generation circuit for driving the image pickup unit, a reference pulse generation circuit for determining the timing of the drive pulses, a first control circuit for controlling the operation mode of the drive pulse generation circuit, a second control circuit for controlling the operation mode of the drive pulse generation circuit, and a switch for connecting either the first control circuit or the second control circuit to the drive pulse generation circuit.

Other objects of the present invention, and the features thereof, will become fully apparent from the following description, which is to be taken in conjunction with the attached drawings.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

In the following there will be given a detailed explanation on the first embodiment of the present invention, with reference to the attached drawings.FIG. 3shows a solid state image pickup device constituting the first embodiment, wherein shown a sensor chip1constituted, for example, by a sensor unit30including an image pickup unit containing photoelectric conversion elements and peripheral circuits containing horizontal and vertical scanning circuits for reading the charges converted from light by the photoelectric conversion elements, and a drive pulse generation circuit21; a drive timing control device2such as a microcomputer (hereinafter called microcomputer) for controlling the sensor chip1by outputting the drive pulses of the main operation mode thereof; drive mode control wirings3for the main operation mode from the microcomputer2; a reference clock wiring6for the main operation mode; and drive pulse wirings5.

There are also shown a reference clock generation circuit7for the preliminary operation mode; a preliminary operation mode generation circuit8for generating a preliminary operation mode clock signal based on the reference clock signal generated by the reference clock generation circuit7; switches9-1to9-4for selecting either the clock signals from the microcomputer2or the clock signal of the reference clock generation circuit7and the preliminary operation mode generation circuit8; and an output line10from the microcomputer2for selecting the states of the switches9-1to9-4. The voltage on the output line10is for example at a low level in case the microcomputer2is turned off, whereby the switches9-1to9-4select the outputs of the internal reference clock generation circuit7and the preliminary operation mode generation circuit8, but assumes a high level in case the microcomputer2is turned on whereby the switches9-1to9-4select the pulses of the drive mode control wirings3and the reference clock wiring6from the microcomputer2.

There are further provided a detection circuit11for detecting whether the output of the sensor unit in the preliminary operation mode contains a necessary image signal, and a latch circuit12for latching the output of the detection circuit11, and the output13of the latch circuit12is transmitted to the microcomputer2. A switch14transmits the output of the sensor30either to the image detection circuit11or the microcomputer2. For example the voltage of the output13can be selected as high or low respectively when the image pickup unit fetches or not the necessary image. In such situation, the microcomputer2in the off state can be turned on by a shift of the output13from the low level to the high level, whereby the operation of the image sensor can shift from the preliminary operation under the control of the reference clock generation circuit7and the preliminary operation mode generation circuit8to the main operation under the control of the microcomputer2.

The microcomputer2can access the necessary image information exactly from the sensor output20in the main operation. A drive pulse generation circuit21gives various drive pulses such as drive pulses for horizontal scanning, drive pulses for vertical scanning, and a reset pulse for the image pickup unit etc., to the sensor unit.

In the following there will be explained the operation of the present embodiment.

At first, in the preliminary operation mode, the clock pulses from the preliminary operation mode generation circuit8and from the reference clock generation circuit7are input, respectively through the switches9-1to9-4into the drive pulse generation circuit21. Also the switch14switches the sensor output into the detection circuit11.

Based on the signals from the reference clock generation circuit7and the preliminary operation mode generation circuit8, the drive pulse generation circuit21transmits pulses to the horizontal and vertical scanning circuits, thereby reading the signals from the photoelectric conversion elements of the sensor unit30. The signals read from the sensor unit30are entered into the image detection circuit11, and, if the necessary image is detected, the output13of the latch circuit12is shifted to a high level state whereby the microcomputer2is turned on. At the same time the switches9-1to9-4are so shifted that the signal from the microcomputer2is supplied to the drive pulse generation circuit21. Also the switch14is so shifted that the sensor output is connected to the microcomputer2.

Based on the control signal from the microcomputer2, the drive pulse generation circuit21sends pulses to the horizontal and vertical scanning circuits, whereby the signals are read from the photoelectric conversion elements of the sensor unit30. The signals read from the sensor unit30are entered into the microcomputer2and subjected to image signal processing such as color processing, white balancing etc. to obtain an image signal.

The above-described embodiment reduces wasteful power consumption in the microprocessor, by turning off the microcomputer2in the preliminary operation because only a simple signal process is executed, and starting the control by the microcomputer2in the main operation in which the image information has to be fetched. The preliminary operation reduces power consumption by operating low-resolution readout, and by performing an intermittent operation, for example every 500 ms. Such intermittent operation can be realized by counting the reference clock signals with a counter.

Specifically, in the preliminary operation, the preliminary operation mode generation circuit8generates a drive control signal of the preliminary operation mode based on the reference clock signal generated by the reference clock generation circuit7on the image sensor chip, and the drive pulse generation circuit21generates drive pulses based on the generated drive control signal to drive the peripheral scanning circuits. The image pickup unit sequentially reads out the image signal corresponding to light received in the preliminary operation mode. In the case that the image detection circuit11determines that the sensor receives the necessary image, the latch circuit12is latched. This determination may be attained by simple image detection, such as detection of an image signal component whose level is greater than a predetermined level. In the preliminary operation, it is therefore possible in a scanning and read-out operation to reduce the number of the horizontal and vertical scanning lines in image signal reading to a half of that in the main operation mode or to perform the operation intermittently, since the sensor is operated as a monitor to merely determine whether or not the sensor receives the necessary image. The power consumption in this case can be significantly reduced not only in the microcomputer but also in the solid state image pickup device.

In the following there will be given a detailed explanation on the second embodiment of the present invention, with reference to the attached drawings.FIG. 4shows the second embodiment of the present invention. An image sensor chip1is driven by a drive pulse generation chip4. InFIG. 4, the microcomputer2, drive mode control pulse3, drive pulse5, reference clock pulse6, reference clock generation circuit7, preliminary operation mode generation circuit8, switches9-1to9-4, mode switching selection pulse10, image detection circuit11, latch12, image detection discriminating output13, drive pulse generation circuit21, and sensor output20in the microcomputer control are the same as those shown in FIG.3and will not be explained again.

In this configuration, though the entire device is composed of the image sensor chip1and the drive pulse generation chip4, the latter is provided therein with the reference clock generation circuit7, the preliminary operation mode generation circuit8and the switches9-1to9-4, so that, in the preliminary operation, the image pickup unit and the peripheral scanning circuit30the image sensor chip1are operated in synchronization with the reference clock signal generated in the reference clock generation circuit7, thereby outputting the image signal to the detection circuit11via switch14.

Also in the main operation, the reference clock pulse6and the drive mode control pulse3are supplied to the drive pulse generation circuit21according to the reference clock signal in the microcomputer2to operate the image pickup unit and the peripheral scanning circuit30in the image sensor chip1, thereby outputting the image signal to the sensor output20.

In the second embodiment shown inFIG. 4, in the preliminary operation, the image sensor chip1operates at the timing of the reference clock generation circuit7formed in the drive pulse generation chip4, and the microcomputer2remains in the turned-off state.

As in the first embodiment, the control is switched to the microcomputer2when it is turned on, thereby suppressing the power consumption of the microcomputer2in the preliminary operation and also suppressing the power consumption in the entire device.

As explained in the foregoing, the first and second embodiments allow the selection of the drive mode control for the sensor unit30by the external microcomputer2or by the reference clock generation circuit7and the preliminary operation mode generation circuit8formed on the image sensor chip1or on the drive pulse generation circuit chip4, whereby it is rendered possible to suspend the operation of the microcomputer2during the preliminary operation mode in which the signal processing by the external microcomputer2is not required, thereby suppressing the wasteful power consumption in the microcomputer2.

Also in the preliminary operation, further suppression of the power consumption is possible since the image pickup unit and the peripheral scanning circuit30can be independently operated on the image sensor chip1or the drive pulse generation circuit chip4.

In the foregoing first embodiment, the sensor unit30, the reference clock generation circuit7, the drive pulse generation circuit21etc. are assumed to be integrated into a single chip, but it is also possible to integrate only the sensor unit30and the reference clock generation circuit7into a single chip. It is thus possible to change the combination of the circuits to be integrated into a single chip, or to form such circuits as separate components.