Semiconductor chip, method of manufacturing the semiconductor chip and semiconductor chip package including an inclined via hole

In a semiconductor chip, a body has a top surface where a pattern is formed, an underside surface opposing the top surface and a plurality of side surfaces. A plurality of electrode pads are formed on the top surface of the body to connect to an external terminal. A shielding conductive film is formed on the surfaces excluding the top surface of the body where the pattern is formed. A conductive via is extended through the body to connect one of the electrode pads with the conductive film.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a semiconductor chip package, more particularly, in which a shielding conductive film is connected to a ground through a via hole, and a manufacturing method thereof.

2. Description of the Related Art

A high frequency module for use in a mobile telecommunication device such as a mobile phone is constructed of a high frequency circuit including a high frequency semiconductor device and a periphery circuit that are formed on a substrate thereof.

In general, current propagating in an electronic device induces electric field and magnetic field therearound, thereby generating a space due to electric potential difference. Here, the electric field changes with time and generates electric magnetic field therearound. That is, regardless of the induction of the device, current flows to create electromagnetic noise, which is an unnecessary energy.

Such electromagnetic noise, if transferred to other devices through a path, leads to degradation in performance and malfunction thereof.

To shield the electromagnetic noise and protect the semiconductor device, a shielding technique for forming a shielding film has been employed.

FIGS. 1aand1billustrate a shielding structure according to the prior art.

FIG. 1ais a cross-sectional view illustrating a high frequency module having a high frequency semiconductor device12on a substrate11shielded via a metal cap13.

In the conventional shielding structure of the high frequency module shown inFIG. 1a, the metal cap13, if reduced in its thickness, cannot remain strong but is easily warped, potentially contacting the high frequency device. To prevent short-circuit caused by contact between the metal cap13and the high frequency device, a certain space should be preserved under the metal cap13to accommodate the metal cap13that may be warped. For example, the metal cap should be formed to a thickness of 100 μm, and an inner space thereof should be designed to a thickness of 80 μm. This physical volume stands in the way of miniaturization of the high frequency module.

FIG. 1bis a cross-sectional view illustrating the high frequency module in which the shielding film is formed via a metal film15after resin molding.

InFIG. 1b, the high frequency semiconductor device12is mounted on the substrate11and resin molded to be hermetically sealed. Then the shielding film is formed on a surface of a mold14using the metal film15.

This leads to smaller physical volume compared to a case where the metal cap is adopted. Yet, the metal film formed on the mold is not connected to a ground of the substrate, thus insignificant in terms of shielding effects.

SUMMARY OF THE INVENTION

The present invention has been made to solve the foregoing problems of the prior art and therefore an aspect of the present invention is to provide a semiconductor chip which has a shielding layer formed thereon to connect to a ground, when the semiconductor chip is mounted on a substrate, thereby to enhance shielding effects and ensure the chip to be mounted in a minimal volume, and a semiconductor package having the semiconductor chip.

Another aspect of the present invention is to provide a method of manufacturing the semiconductor chip having the shielding layer formed on a wafer.

According to an aspect of the invention, the invention provides a semiconductor chip including a body having a top surface where a pattern is formed, an underside surface opposing the top surface and a plurality of side surfaces; a plurality of electrode pads formed on the top surface of the body to connect to an external terminal; a shielding conductive film formed on the surfaces excluding the top surface of the body where the pattern is formed; and a conductive via extending through the body to connect one of the electrode pads with the conductive film.

The electrode pad connected to the conductive via may be connected to an external ground and grounded.

The conductive film is formed only on the underside surface of the body.

According to another aspect of the invention, the invention provides a semiconductor chip package including the semiconductor chip as described above; a substrate where a ground lead pattern and a plurality of lead patterns are formed; and a plurality of bumps disposed between the respective electrode pads of the semiconductor chip and the respective lead patterns of the substrate to electrically connect the semiconductor chip with the substrate.

The electrode pad connected to the via hole is connected to the ground lead pattern of the substrate.

The conductive film is formed only on the underside surface of the semiconductor chip.

According to further another aspect of the invention, the invention provides a method for manufacturing a semiconductor chip including:

forming via holes in a wafer including unit chip areas to connect from an electrode pad on a top surface of a wafer where a pattern is formed to an underside surface of the wafer opposing the top surface so that at least one of the via holes is formed in each of the unit chip areas;

filling the via hole with conductive material;

forming a conductive film on the underside surface of the wafer to contact the conductive material filled in the via hole; and

cutting the wafer into unit chips.

The manufacturing method may further include forming a shielding conductive material on a side surface of the cut semiconductor chip.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

FIG. 2is a cross-sectional view illustrating a semiconductor chip package having a semiconductor chip mounted on a substrate according to an embodiment of the invention.

The semiconductor chip20has a body22provided with a plurality of electrode pads28on a top surface22athereof.

A conductive film25is formed on an underside surface22band side surfaces of the body22of the semiconductor chip where the electrode pads are not formed. Also, a via hole27is perforated through the top surface22aand one of the side surfaces of the body22.

The package substrate21is manufacturable by the same process as the one for fabricating a printed circuit board (PCB), or by High Temperature Chemical Cleaning (HTCC) or Low Temperature Co-fired Ceramics (LTCC).

A circuit pattern is disposed on the package substrate21to input and output a signal, and vias are formed to be connected respectively with electrode pads on the circuit pattern to form a ground lead pattern. The ground lead pattern is configured to electrically connect the electrode pads on overlying and underlying layers together.

As shown inFIG. 2, bumps23made of metal are formed on the lead patterns of the circuit pattern disposed on the package substrate21, and the semiconductor chip is mounted on the electrode pads28via the bumps23. The flip-bonded semiconductor chip allows the electrode pads28to be electrically connected to the lead patterns on the package substrate21by the bumps23.

In the semiconductor chip, the electrode pads28on the top surface22aof the body22are connected to the substrate21by the bumps23, some of which are ground bumps23aconnected to a ground of the substrate. The bumps23formed between the lead patterns29of the substrate21and the electrode pads28of the semiconductor chip are made of gold, copper, aluminum or alloys thereof and serve to connect wires of the substrate with the semiconductor chip.

The ground bumps23aare in direct contact with a conductive via filled with a conductive material in the via hole27and serve to electrically connect the conductive film25with the ground. Of course, although the conductive via27ais directly connected to the bumps23, the conductive via27a, if electrically connected to the ground bumps23aon the substrate, may realize this feature of the invention.

In this fashion, the conductive film25formed on the underside surface22band the side surfaces of the body22of the semiconductor chip is electrically connected to the ground. As a result, electromagnetic wave generated from the semiconductor chip is induced to flow toward the ground, and thus blocked. This accordingly inhibits occurrence of noises. Further, this shields electromagnetic wave induced to the semiconductor chip from outside, thereby suppressing interference from the electromagnetic wave.

To easily form the conductive film25on the underside surface22band the side surfaces of the semiconductor chip, conductive paint is directly applied on the top surface and side surfaces of the semiconductor chip or sprayed thereonto.

FIG. 3ais a perspective view illustrating a semiconductor chip according to an embodiment of the invention.

Referring toFIG. 3a, the semiconductor chip has a body provided with electrode pads38on a top surface32athereof where patterns are formed, and a metal film35on an underside surface32bthereof. The metal film35has a via hole37perforated through the body32of the semiconductor chip. The metal film35is brought in contact with a conductive via37afilled with a conductive material in the via hole37. The via hole37is connected to the electrode pads38on the top surface32aof the semiconductor chip body32.

The via hole37can be formed by laser processing or dry etching such as reactive ion etch. The via hole37may feature various shapes such as a circle, a triangle and a polygon. The via hole37may have a uniform cross-section. Alternatively, the via hole37may have a cross-section that is greater or smaller in proportion to its proximity to the top surface32athereof.

The via hole37is filled with a conductive material to form the conductive via37aand extended to the electrode pads on the top surface32aof the semiconductor chip body32to electrically connect the conductive film35with a ground on the substrate.

The conductive via37acan be formed by electroplating and the conductive material adopts all electroplatable metals such as gold (Au), silver (Ag), copper (Cu), aluminum (Al), nickel (Ni), and tungsten (W).

Alternatively, the conductive via37amay be formed by vacuum evaporation, sputtering, chemical vapor deposition and by filling-up and sintering of a conductive paste. The conductive material for filling the via hole37is exemplified by gold (Au), silver (Ag), copper (Cu), aluminum (Al), nickel (Ni), tungsten (W) and alloys thereof.

To easily form the conductive film35on the underside surface32bof the semiconductor chip body32, conductive paint is directly applied to the underside surface of the semiconductor chip body or sprayed thereonto.

FIG. 3bis a cross-sectional view illustrating a semiconductor chip package having a semiconductor chip mounted on a substrate.

Referring toFIG. 3b, the semiconductor chip is flip-bonded onto the substrate31.

The semiconductor chip has a body32provided with a plurality of electrode pads38on a top surface32athereof.

A conductive film35is formed on an underside surface32bof the semiconductor chip body32where electrode pads are not formed. Also, a via hole37is perforated through the top surface32aand the underside surface32bof the semiconductor chip body32.

Further, the electrode pads38on the top surface32aof the semiconductor chip body32are connected to lead patterns39on the substrate31via bumps33, some of which are ground bumps33aconnected to a ground on the substrate. The bumps formed between the lead patterns39of the substrate31and the electrode pads38of the semiconductor chip are made of gold, copper, aluminum or alloys thereof, and serve to connect wires of the substrate with the chip.

The ground bumps33aare made in direct contact with the conductive via37afilled with a conductive material in the via hole37and serve to electrically connect the conductive film35to the ground on the substrate. Of course, although the conductive via37ais directly connected to another one of the bumps33, the conductive via37a, if electrically connected to the ground bumps33aon the substrate, may realize this feature of the invention.

Although not illustrated, a barrier metal film may be formed to facilitate bonding between the ground bumps33aand the conductive via37aand prevent cracks from heat accompanied by use of the chip, thereby ensuring reliability of the chip. The barrier metal film may be made of one selected from a group consisting of titanium (Ti), titanium nitride (TiN), tantalum nitride (TaN), Ti/TiN and Ta/TaN. The barrier metal film is preferably formed by chemical vapor deposition.

The via hole37is filled with a conductive material to form the conductive via37aand extended to the ground bumps33aformed on the electrode pads disposed on the top surface32aof the semiconductor chip body32to electrically connect the conductive film35with the ground on the substrate.

In this fashion, the conductive film35formed on the underside surface32bof the semiconductor chip body32is electrically connected to the ground. As a result, electromagnetic wave generated from the semiconductor chip is induced to flow toward the ground, and thus blocked. This accordingly inhibits occurrence of noises. Also, this shields electromagnetic wave induced to the semiconductor chip from the outside, thereby suppressing interference from the electromagnetic wave.

The conductive film35can be formed merely on the underside surface32bof the semiconductor chip body32when individual semiconductor chips are applied with a conductive film material separately from one another.

Here, at least one via hole is perforated through the top surface and underside surface of the semiconductor chip body32and filled with a conductive material. Then a conductive film is formed on the underside surface of the semiconductor chip body to be brought in contact with the conductive material. The conductive film35can be easily formed by directly applying or spraying conductive paint for shielding electromagnetic wave.

Alternatively, in a structure where the conductive film is formed on the underside surface of the semiconductor chip, the via hole and the conductive film are formed on a wafer before being cut into the unit chips, and then cut into the unit chips. This accordingly simplifies a manufacturing method.

FIGS. 4ato4dillustrate a manufacturing method in which the semiconductor chip ofFIG. 3ais fabricated on a wafer.

To fabricate the semiconductor chip having a conductive film therein on the wafer, the wafer is prepared, at least one via hole is formed in each of unit chip areas on the wafer, a conductive material is filled in the via hole, a conductive film is formed on an underside surface of the wafer and the wafer is cut into unit chips.

Referring toFIG. 4a, a via hole is formed on each of the unit chip areas to connect from electrode pads on the top surface of the wafer where patterns and the electrode pads are formed to the underside surface of the wafer.FIG. 4ais a perspective view in which the underside surface of the wafer faces upward. The via hole47is formed by mechanical polishing or laser processing. To realize an aspect of the invention, at least one via hole is necessarily formed on each of the unit chip areas. Here, the via hole is connected to one of the electrode pads disposed around patterns (not illustrated) formed on the top surface of the wafer. That is, the electrode pads are connected to a ground of the substrate.

Referring toFIG. 4b, the via hole47formed on each of the unit chip areas is filled with a conductive material to form a conductive via47a. This allows the conductive film45on the underside surface of the semiconductor chip body42to electrically connect to the ground of the substrate.

Referring toFIG. 4c, the conductive film is formed on the underside surface of the wafer. The conductive film45can be formed by directly applying or spraying conductive paint for shielding electromagnetic wave. This simplifies a process and saves material costs compared with a case where the conductive film is formed on each of the unit chips.

Here, the conductive film45is in direct contact with the conductive via47afilled with a conductive material in the via hole47. Preferably, the conductive film45is made of the same conductive material filled in the via hole47.

Referring toFIG. 4d, the wafer is cut into each of the unit chips to produce the semiconductor chip according to the invention. The conductive film45is formed on the underside surface of the semiconductor chip body42and brought in contact with the conductive material filled in the via hole47. Accordingly, the conductive via47aconnects the conductive film45with the ground of the substrate.

Furthermore, optionally a shielding conductive material may be formed on side surfaces of the cut semiconductor chip to boost shielding effects of the conductive film.

Although not illustrated, the cut semiconductor chip is flip bonded onto the substrate to connect the conductive via to the ground of the substrate, thereby producing the semiconductor chip package according to the invention.

The embodiments and the accompanying drawings are illustrative only but do not limit the invention. Thus, the conductive film and the via hole can be located variously.

As set forth above, according to exemplary embodiments of the invention, when a semiconductor chip is mounted on a substrate, a shielding metal film is connected to a ground to boost shielding effects of electromagnetic wave and ensure the chip to be mounted in a minimal volume.

In addition, the semiconductor chip can be fabricated on a wafer to simplify a manufacturing process.