Current-mode sensing structure used in high-density multiple-port register in logic processing and method for the same

A current-mode sensing structure used in a high-density multiple-port register in logic processing and a method for the same are proposed. First, a reference current is defined by a dummy word line of a dummy cell and output. A multiple-port register file cell is then used to send out a select signal of “0” or “1” and output a cell current according to the select signal and the reference current. Finally, the cell current and the reference current are sent to a current comparator amplifier, which senses and outputs a difference value between the cell current and the reference current to perform session at once (SAO) recording. Because the difference value has only two possibilities: the reference current or its negative, the sensing time of the current comparator amplifier can be shortened.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a high-density multiple-port register sensing circuit and, more particularly, to a current-mode sensing structure used in a high-density multiple-port register in logic processing and a method for the same.

2. Description of Related Art

Generally speaking, the design of multiple-port register predominantly adopts the single-ended voltage sensing scheme. As shown inFIG. 1, a 5-port register file cell10has two ports for writing, respectively having bit lines WBL1and WBL2and word lines WWL1and WWL2, and three ports for reading, respectively having bit lines RDL1, RBL2and RBL3and word lines RWL1, RWL2and RWL3. After the bit line RBL3of the 5-port register file cell inputs a voltage V(b1) to a single-ended voltage-mode sensing amplifier (VSA)12, the VSA12will sense the input voltage and then send it out.

The voltage sensing scheme has the drawbacks of a low speed and a too small dynamic noise margin. The sense voltage input to the voltage sensing scheme needs to be large enough. Moreover, in a high-density register, the larger the load of a bit line, the longer the sensing time, as the following equation shows
T(sense)=C(b1)×V(sense)/Icell
where C(b1) is the resistance of a bit line in the multiple-port register, and Icellis the current input from the multiple-port register to the voltage sensing scheme. Because the sense voltage is large, the sensing time is relatively long. Besides, because the voltage sensing scheme is single-ended, the common mode rejection ratio (CMRR) is inferior, causing a larger error.

The present invention aims to propose a current-mode sensing structure used in a high-density multiple-port register in logic processing and a method for the same to effectively solve the above problems in the prior art.

SUMMARY OF THE INVENTION

An object of the present invention is to provide a current-mode sensing structure used in a high-density multiple-port register in logic processing and a method for the same, in which a dummy cell is used to output a reference current for comparison with a current of a multiple-port register file cell to obtain a comparison result of the reference current or its negative, thereby shortening the sensing time of the current comparator amplifier.

Another object of the present invention is to provide a current-mode sensing structure used in a high-density multiple-port register in logic processing and a method for the same, in which a select signal is input to a multiple-port register file cell to let the cell current of the multiple-port register file cell be 0 or twice the reference current.

Another object of the present invention is to provide a current-mode sensing structure used in a high-density multiple-port register in logic processing and a method for the same, in which a dummy cell is used to input a current to a current comparator amplifier so as to shorten the sensing time and enlarge the dynamic noise margin.

To achieve the above objects, the present invention provides a current-mode sensing structure used in a high-density multiple-port register in logic processing and a method for the same. A reference current is defined by a dummy word line of a dummy cell and then output. A multiple-port register file cell is used to send out a select signal of “0” or “1”. A cell current is output according to the select signal and the reference current. If the select signal is “1”, the cell current is close to 0; if the select signal is “0”, the cell current is twice the reference current. Both the cell current and the reference current are sent to a current comparator amplifier, which senses and outputs a difference value between the cell current and the reference current to perform session at once (SAO) recording. Because the difference value has only two possibilities: the reference current or its negative, the sensing time of the current comparator amplifier can be shortened.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

The present invention provides a current-mode sensing structure used in a high-density multiple-port register in logic processing and a method for the same. As shown inFIG. 2, the current-mode sensing structure comprises a 3-port register file cell14, a dummy cell16and a current comparator amplifier18. The 3-port register file cell14has a port for writing and two ports for reading. The three ports have bit lines WBL, RBL1and RBL2and word lines WWL, RWL1and RWL2, respectively. In front of the reading ports, a select signal20is input externally. The 3-port register file cell14outputs a cell current Icell. The dummy cell16can have a plurality of gates each connected to a bit line and a word line. InFIG. 2, the dummy cell16has only a gate. The size of the gate is half that of the gate in the 3-port register file cell14. The dummy word line DWL is connected to the dummy cell16, and defines a reference current Iref. The current comparator amplifier18is a current-mode sensing amplifier (CSA).

FIG. 3is a flowchart of the method of the present invention. After the dummy word line DWL defines the reference current Iref, the dummy cell16outputs the reference current Irefto the current comparator amplifier18(Step S10). Next, as described by steps S12to S18, the select signal20input externally can be used to determine what the cell current Icelloutput by the 3-port register file cell14is. Because the reference current Irefdefined in the present invention is ½×Icell, when the select signal20is “0”, the cell current Icellis twice the reference current Iref. On the contrary, when the select signal20is “1”, the cell current Icellis close to 0. No matter the cell current Icellis close to 0 or twice the reference current Iref, the bit line RBL2in the 3-port register file cell14will output the cell current Icellto the current comparator amplifier18. Subsequently, as described by steps S20to S22, after both the reference current Irefand the cell current Icellflow to the current comparator amplifier18, the current comparator amplifier18will compare these two currents and sense and output a difference value between them to perform session at once (SAO) recording.

FIG. 4is a diagram showing the relationships of the cell current provided by the 3-port register file cell and the reference current provided by the dummy cell relative to the voltage. As can be seen in this figure, when the select signal is “0”, the difference value between these two currents ΔI=Icell(0)−Iref≈2Iref−Iref=Iref; when the select signal is “1”, the difference value between these two currents ΔI=Icell(1)−Iref=−Iref. Because the difference value has only two possibilities: the reference current Irefor its negative −Irefand the reference current Irefis defined by the dummy word line, the sense speed of the current comparator amplifier can be enhanced to greatly shorten the sensing time and also obtain a better dynamic noise margin.

To sum up, the present invention proposes a current-mode sensing structure used in a high-density multiple-port register in logic processing and a method for the same, in which a current-mode sensing system is adopted, and a dummy cell is used to output a reference current to a differential current comparator amplifier. Because the difference value between the reference current and the cell current is the reference current or its negative and the reference current is defined by the dummy word line and the size of the dummy cell is only half that of the gate in the multiple-port register file cell, the current comparator amplifier of the present invention has a shorter sensing time and a better dynamic noise margin as compared to voltage-mode sensing amplifiers used in the prior art.