Voltage regulator with phase compensation

Provided is a voltage regulator capable of performing appropriate phase compensation. Even when a difference between an input voltage and an output voltage is small, an appropriate phase compensation voltage based on an output voltage (Vout) is generated in a resistor circuit (19), and the appropriate phase compensation voltage is applied to a phase compensation capacitor (20). Accordingly, the voltage regulator is capable of performing appropriate phase compensation.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a voltage regulator.

2. Description of the Related Art

A voltage regulator includes a phase compensation circuit for stable operation.

FIG. 4is a circuit diagram of a conventional voltage regulator including a phase compensation circuit.

When an output voltage Vout increases, a divided voltage Vfb also increases. When the divided voltage Vfb becomes higher than a reference voltage Vref, an output voltage of a differential amplifier circuit76increases. Accordingly, a gate voltage of an output transistor73increases, and a drain current of the output transistor73decreases, whereby the output voltage Vout decreases. As a result, the output voltage Vout is controlled to be a desired constant voltage. On this occasion, a gate voltage of a sense transistor77also increases, and thus a drain current of the sense transistor77also decreases. For this reason, a current flowing through a resistor78decreases, with the result that a voltage generated in the resistor78also decreases. Through a change in voltage applied to a phase compensation capacitor79as described above, phase compensation is performed.

In this case, the divided voltage Vfb is a voltage obtained by superimposing a phase compensation signal which is sent from the differential amplifier circuit76via the sense transistor77and the phase compensation capacitor79back to the differential amplifier circuit76on a signal which is sent from the differential amplifier circuit76via the output transistor73and a voltage divider circuit74back to the differential amplifier circuit76.

Even when the output voltage Vout decreases, the output voltage Vout is controlled to be a desired constant voltage as in the case of the above. On this occasion, phase compensation is performed as in the case of the above (for example, see JP 2005-316788 A).

However, in the conventional voltage regulator, when a difference between an input voltage and an output voltage is small, a voltage between a source and a drain of the sense transistor77becomes small depending on a condition of a load, and in some cases, the sense transistor77operates in non-saturation while the output transistor73operates in saturation. As a result, fluctuations in drain voltage of the sense transistor77do not coincide with fluctuations in drain voltage of the output transistor73. Phase compensation is performed based on the drain voltage of the sense transistor77, and hence, the phase compensation is inappropriately performed.

SUMMARY OF THE INVENTION

The present invention has been made in view of the above-mentioned problem, and therefore provides a voltage regulator capable of performing appropriate phase compensation.

In order to solve the above-mentioned problem, a voltage regulator according to the present invention comprises: an output transistor; a voltage divider circuit; a differential amplifier circuit; an amplifier circuit provided between the differential amplifier circuit and the output transistor; a current supply circuit that is connected to an output terminal of the differential amplifier circuit and supplies a phase compensation current; a resistor circuit that generates a phase compensation voltage based on the phase compensation current; and a phase compensation capacitor that is provided between the resistor circuit and an output terminal of the voltage divider circuit and performs phase compensation based on the phase compensation voltage and a divided voltage.

According to the present invention, even when a difference between an input voltage and an output voltage is small, an appropriate phase compensation voltage based on an output voltage of the voltage regulator is generated in the resistor circuit, and is applied to the phase compensation capacitor. Accordingly, the voltage regulator is capable of performing the appropriate phase compensation.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

Hereinafter, an embodiment of the present invention is described with reference to the drawings.

First, a configuration of a voltage regulator is described.FIG. 1is a circuit diagram illustrating the voltage regulator.FIG. 2is a circuit diagram illustrating a current supply circuit and a resistor circuit.

The voltage regulator includes an input terminal10, a ground terminal11, and an output terminal12. The voltage regulator further includes an output transistor13, a voltage divider circuit14, a reference voltage generation circuit15, a differential amplifier circuit16, an amplifier circuit17, a current supply circuit18, a resistor circuit19, and a phase compensation capacitor20.

The output transistor13has a gate connected to an output terminal of the amplifier circuit17, a source connected to the input terminal10, and a drain connected to the output terminal12. The voltage divider circuit14is provided between the output terminal12and the ground terminal11. The differential amplifier circuit16has a non-inverting input terminal connected to an output terminal of the reference voltage generation circuit15, and an inverting input terminal connected to an output terminal of the voltage divider circuit14. The amplifier circuit17has an input terminal connected to an output terminal of the differential amplifier circuit16. The current supply circuit18has an input terminal connected to the output terminal of the differential amplifier circuit16, and an output terminal connected to a connection point between the resistor circuit19and the phase compensation capacitor20. The phase compensation capacitor20is provided between a connection point between the current supply circuit18and the resistor circuit19, and the output terminal of the voltage divider circuit14.

The current supply circuit18includes a PMOS transistor30and NMOS transistors31and32.

The PMOS transistor30has a gate connected to the output terminal of the differential amplifier circuit16, and a source connected to the input terminal10. The NMOS transistor31has a gate and a drain which are connected to a drain of the PMOS transistor30, and a source connected to the ground terminal11. The NMOS transistor32has a gate connected to the gate and the drain of the NMOS transistor31, a source connected to the ground terminal11, and a drain connected to a connection point between a resistor40and the phase compensation capacitor20. In other words, the NMOS transistors31and32are current-mirror-connected to each other.

The resistor circuit19includes the resistor40.

The resistor40is provided between the input terminal10, and a connection point between the drain of the NMOS transistor32and the phase compensation capacitor20.

The output transistor13outputs an output voltage Vout based on an output voltage of the amplifier circuit17and an input voltage Vin. The voltage divider circuit14receives and divides the output voltage Vout, and outputs a divided voltage Vfb. The reference voltage generation circuit15generates a reference voltage Vref. The differential amplifier circuit16controls the output transistor13based on the divided voltage Vfb and the reference voltage Vref so that the output voltage Vout becomes a desired constant voltage. The amplifier circuit17receives and amplifies an output voltage of the differential amplifier circuit16, and outputs an output voltage. The current supply circuit18supplies a phase compensation current based on the output voltage of the differential amplifier circuit16. The resistor circuit19generates a phase compensation voltage based on the phase compensation current. The phase compensation capacitor20performs phase compensation based on the divided voltage Vfb and the phase compensation voltage.

The PMOS transistor30supplies the phase compensation current based on the output voltage of the differential amplifier circuit16and the input voltage Vin. The phase compensation current flows into a current mirror circuit formed of the NMOS transistors31and32, and thus, a current of the same amount as that of the phase compensation current is drawn from the resistor40through the current mirror. The resistor40generates the phase compensation voltage based on the phase compensation current.

In this case, the current flowing through the PMOS transistor30and the current flowing through the resistor40are controlled by the output voltage of the differential amplifier circuit16, thereby being limited to a predetermined value or less.

In a case where the output transistor13operates in saturation, the PMOS transistor30and the NMOS transistors31and32are capable of operating based on the output voltage Vout, with the result that the resistor40is also capable of generating a phase compensation voltage based on the output voltage Vout. That is, there occurs no phenomenon in which a sense transistor operates in non-saturation and the phase compensation voltage is not based on the output voltage Vout as in a conventional case.

Next, an operation of the voltage regulator is described.

When the output voltage Vout increases, the divided voltage Vfb also increases. When the divided voltage Vfb becomes higher than the reference voltage Vref, an increased amount with respect to the reference voltage Vref is amplified, and the output voltage of the differential amplifier circuit16decreases. Then, a decreased amount thereof is inverted and amplified, whereby the output voltage of the amplifier circuit17increases. As a result, a gate voltage of the output transistor13also increases, and the output transistor13is gradually turned off, whereby the output voltage Vout decreases. Accordingly, the output voltage Vout is controlled to be a desired constant voltage. On this occasion, based on the output voltage of the differential amplifier circuit16, the current supply circuit18supplies the phase compensation current to the resistor circuit19. The resistor circuit19generates the phase compensation voltage based on the phase compensation current. The phase compensation voltage and the divided voltage Vfb are applied to one end and the other end of the phase compensation capacitor20, respectively, with the result that phase compensation is performed.

Here, the divided voltage Vfb is a voltage obtained by superimposing a phase compensation signal which is sent from the differential amplifier circuit16via the current supply circuit18and the phase compensation capacitor20back to the differential amplifier circuit16on a signal which is sent from the differential amplifier circuit16via the amplifier circuit17, the output transistor13, and the voltage divider circuit14back to the differential amplifier circuit16.

Even when the output voltage Vout decreases, the output voltage Vout is controlled to be a desired constant voltage as in the case of the above. On this occasion, phase compensation is performed as in the case of the above.

In the manner described above, even when a difference between an input voltage and an output voltage is small, an appropriate phase compensation voltage which is based on the output voltage Vout is generated in the resistor circuit19, and the appropriate phase compensation voltage is applied to the phase compensation capacitor20, with the result that the voltage regulator is capable of performing appropriate phase compensation. Accordingly, the voltage regulator is resistant to oscillating, and thus is capable of operating in a stable manner.

InFIG. 2, the resistor40is provided between the input terminal10, and the connection point between the drain of the NMOS transistor32and the phase compensation capacitor20. However, as illustrated inFIG. 3, the resistor40may be eliminated, and there may be provided a PMOS transistor50which has a gate and a drain connected to the connection point between the drain of the NMOS transistor32and the phase compensation capacitor20and a source connected to the input terminal10, and is diode-connected.18current supply circuit19resistor circuit