TECHNIQUES TO AGGREGATE COMPUTE, MEMORY AND INPUT/OUTPUT RESOURCES ACROSS DEVICES

Examples are disclosed for aggregating compute, memory and input/output (I/O) resources across devices. In some examples, a first device may migrate to a second device at least some compute, memory or I/O resources associated with executing one or more applications. Migration of at least some compute, memory or I/O resources for executing the one or more applications may enable the first device to save power and/or utilize enhanced processing capabilities of the second device. In some examples, migration of compute, memory or I/O resources for executing the one or more applications may occur in a manner transparent to an operating system for the first device or the second device. Other examples are described and claimed.

TECHNICAL FIELD

Examples described herein are generally related to aggregating resources across computing devices.

BACKGROUND

Computing devices in various form factors are being developed that include increasing amounts of computing power, networking capabilities and memory/storage capacities. Some form factors attempt to be small and/or light enough to actually be worn by a user. For example, eyewear, wrist bands, necklaces or other types of wearable form factors are being considered as possible form factors for computing devices. Additionally, mobile form factors such as smart phones or tablets have greatly increased computing and networking capabilities and their use has grown exponentially over recent years.

DETAILED DESCRIPTION

Examples are generally directed to improvements for aggregating compute, memory and input/output (I/O) resources across devices. Aggregation across devices such as computing devices may be influenced by possibly utilizing multiple computing devices that may each have different functionality and/or capabilities. For example, some computing devices may be small enough for a user to actually wear the computing device. Other types of small form factor computing devices may include smart phones or tablets where size/weight and a long battery life are desirable traits for users of these devices. Hence, wearable, smart phone or tablet computing devices may each be relatively light weight and may use low amounts of power to extend battery life.

Other types of computing devices may be somewhat stationary and may therefore have a larger form factor that is powered by a fixed power source or a comparatively larger battery compared to wearable, smart phone or tablet computing devices. These other computing devices may include desktop computers, laptops, or all-in-one computers having an integrated, large format (e.g., greater than 15 inches) display. The large form factor of these other devices and the use of a fixed power source (e.g., via a power outlet) or a large battery power source may allow for considerably more computing, memory or I/O resources to be included with or attached to these form factors. In particular, a higher thermal capacity associated with a larger form factor along with possible use of active cooling (e.g., via one or more fans) may allow for the considerably more computing, memory or I/O resources as compared to smaller form factors.

In contrast, wearable, smart phone or tablet computing devices, as mentioned are in relatively small form factors that depend on battery power and likely do not have active cooling capabilities. Also, power circuitry and use of a battery may reduce current-carrying capacity of these types of devices. A reduced current-carrying capacity may restrict types of potentially powerful computing resources from being implemented in these smaller form factors.

Aggregation of compute, memory and input/output (I/O) resources across computing devices having different capabilities may be a desirable objective. Current attempts to aggregate these resources across computing devices have relied primarily on software implementations. These types of software implementations usually result in high latencies and degraded user experience. For example, user-perceptible delays associated with software implementations may result when streaming high-definition video or gaming information between aggregating devices such as a smart phone and an all-in-one computer. The user-perceptible delays may result in a choppy video and frustratingly slow responses to user inputs. Thus a seamless aggregation of computing resources across multiple computing devices may be problematic when relying primarily on software implementations for the aggregation. It is with respect to these and other challenges that the examples described herein are needed.

According to some examples, example first methods may be implemented at a first device having a first circuitry, e.g., processing element(s) and/or graphic engine(s). One or more applications may be executed on the first circuitry. A second device having second circuitry capable of executing the one or more applications may be detected. Logic and/or features at the first device may cause the first device to connect to the second device and may then flush context information from a first near memory for the first circuitry. For these examples, the flushed context information may be for executing the one or more applications. The logic and/or features at the first device may then send the flushed context information to a second near memory for the second circuitry. The second circuitry may then use the context information in its near memory to execute the one or more applications. Also, for this example first methods, logic and/or features at the first device may route I/O information. The I/O information may be associated with the second circuitry executing the one or more applications. The logic and/or features at the first device may route the I/O information in a manner that is transparent to a first operating system (OS) for the first device or the second device.

In some other examples, example second methods may be implemented at a first device having a first circuitry. For these example second methods, an indication that a second device having second circuitry has connected to the first device may be detected. Context information flushed from a first near memory for the second circuitry may then be received by logic and/or features at the first device. The received flushed context information may enable the first circuitry at the first device to execute one or more applications previously executed by the second circuitry prior to the second device flushing the context information. The logic and/or features at the first device may cause the received context information to be at least temporarily stored to a second near memory for the first circuitry. Also, for these example second methods, I/O information associated with the first circuitry executing the one or more applications may also be received. The I/O information may be received by the logic and/or features at the first device in a manner that is transparent to a first OS for the first device or the second device.

FIG. 1illustrates an example first system. In some examples, the example first system includes system100. System100, as shown inFIG. 1, includes a device105and a device155. According to some examples, devices105and155may represent two examples of different form factors for computing devices. As described more below, device105may be a smaller form factor that may operate primarily off battery power while device155may be a relatively larger form factor that may operate primarily off a fixed power source such as an alternating current (A/C) received via a power outlet associated, for example, with power purchased from a power utility.

In some examples, device105is shown inFIG. 1as observed from a front side that may correspond to a side of device105that includes a touchscreen/display110that may present a view of executing application(s)144(a) to a user of device105. Similarly, device155is shown inFIG. 1as observed from a front side that includes a touchscreen/display150that may present a view of executing application144(b) to a user of device155. Although, in some examples, a display may also exist on back side of device105or device155, for ease of explanation,FIG. 1does not include a back side display for either device.

According to some examples, the front side views of devices105and155include elements/features that may be at least partially visible to a user when viewing these devices from a front view. Also, some elements/features may not be visible to the user when viewing devices105or155from a front side view. For these examples, solid-lined boxes may represent those features that may be at least partially visible and dashed-line boxes may represent those element/features that may not be visible to the user (e.g., underneath a skin or cover). For example, transceiver/communication (comm.) interfaces102and180may not be visible to the user, yet at least a portion of camera(s)104, audio speaker(s)106, input button(s)108, microphone(s)109or touchscreen/display110may be visible to the user.

According to some examples, as shown inFIG. 1, a comm. link107may wirelessly couple device100via network interface103. For these examples, network interface103may be configured and/or capable of operating in compliance with one or more wireless communication standards to establish a network connection with a network (not shown) via comm. link107. The network connection may enable device105to receive/transmit data and/or enable voice communications through the network.

In some examples, various elements/features of device105may be capable of providing sensor information associated with detected input commands (e.g., user gestures or audio command). For example, touch screen/display110may detect touch gestures. Camera(s)104may detect spatial/air gestures or pattern/object recognition. Microphone(s)109may detect audio commands. In some examples, a detected input command may be to affect executing application144(a) and may be interpreted as a natural UI input event. Although not shown inFIG. 1a physical keyboard or keypad may also receive input command that may affect executing application(s)144(a).

According to some examples, as shown inFIG. 1, device105may include circuitry120, a battery130, a memory140and a storage145. Circuitry120may include one or more processing elements and graphic engines capable of executing App(s)144at least temporarily maintained in memory140. Also, circuitry120may be capable of executing operating system (OS)142which may also be at least temporarily maintained in memory140.

In some examples, as shown inFIG. 1, device155may include circuitry160, storage175, memory170and transceiver/comm. interface180. Device155may also include fan(s)165which may provide active cooling to components of device155. Also, as shown inFIG. 1, device155may include integrated components182. Integrated components182may include various I/O devices such as, but not limited to, cameras, microphones, speakers or sensors that may be integrated with device155.

According to some examples, as shown inFIG. 1, device155may be coupled to a power outlet195via a cord194. For these examples, device155may receive a fixed source of power (e.g., A/C power) via the coupling to power outlet195via cord194.

In some examples, as shown inFIG. 1, device155may couple to peripheral(s)185via comm. link184. For these examples, peripheral(s)185may include, but are not limited to, monitors, displays, external storage devices, speakers, microphones, game controllers, cameras, I/O input devices such as a keyboard, a mouse, a trackball or stylus.

According to some examples, logic and/or features of device105may be capable of detecting device155. For example, transceiver/comm. interfaces102and180may each include wired and/or wireless interfaces that may enable device105to establish a wired/wireless communication channel to connect with device155via interconnect101. In some examples, device105may physically connect to a wired interface (e.g., in docking station or a dongle) coupled to device155. In other examples, device105may come within a given physical proximity that may enable device105to establish a wireless connection such as a wireless docking with device155. Responsive to the wired or wireless connection, information may be exchanged that may enable device105to detect device155and also to determine at least some capabilities of device155such as circuitry available for executing App(s)144.

In some examples wired and/or wireless interfaces included in transceiver/comm. interfaces102and180may operate in compliance with one or more low latency, high bandwidth and efficient interconnect technologies. Wired interconnect technologies may include, but are not limited to, those associated with industry standards or specifications (including progenies or variants) to include the Peripheral Component Interconnect (PCI) Express Base Specification, revision 3.0, published in November 2010 (“PCI Express” or “PCIe”) or interconnects similar Intel® QuickPath Interconnect (“QPI”). Wireless interconnect technologies may include, but are not limited to, those associated with WiGig™ and/or Wi-Fi™ and may include establishing and/or maintaining wireless communication channels through various frequency bands to include Wi-Fi and/or WiGig frequency bands, e.g., 2.4, 5 or 60 GHz. These types of wireless interconnect technologies may be described in various standards promulgated by the Institute of Electrical and Electronic Engineers (IEEE). These standards may include Ethernet wireless standards (including progenies and variants) associated with the IEEE Standard for Information technology—Telecommunications and information exchange between systems—Local and metropolitan area networks—Specific requirements Part 11: WLAN Media Access Controller (MAC) and Physical Layer (PHY) Specifications, published March 2012, and/or later versions of this standard (“IEEE 802.11”). One such standard related to WiFi and WiGig and also to wireless docking is IEEE 802.11ad.

According to some examples, circuitry160may include one or more processing elements and graphics engines capable of executing OS172. Circuitry160may also be capable of executing at least a portion of App(s)144. In some examples, context information associated with executing applications such as App(s)144may be sent from logic and/or features of device105via interconnect101. The context information may enable circuitry160to execute at least a portion of App(s)144. As described in more detail for other examples below, the context information may be flushed from a first near memory used by circuitry120(e.g., included in memory140) and then sent to a second near memory at device155(e.g., included in memory170). The second near memory now having the flushed context information may enable circuitry160to execute the at least portion of App(s)144which may result in a presentation of that execution on display150as executing application144(b).

In some examples, App(s)144may include types of applications that a user of device105may desire to utilize increased computing, memory or I/O resources available at device155. For example, due to active cooling, a fixed power source and a larger form factor, circuitry160may include a significantly higher amount of computing power than circuitry120. This may be due, at least in part, to a higher thermal capacity for dissipating heat from circuitry160via use of fan(s)165and also to greater surface areas to dissipate heat via passive means such as large heat sinks or heat pipes. Thus, circuitry160can operate within a significantly higher thermal range. Further, receiving power via power outlet195may allow device155to provide a significantly higher current-carry capacity to circuitry160. A higher current-carrying capacity may enable circuitry160to more quickly respond to rapid bursts of computing demand that may be common with some types of applications such as interactive gaming or video editing.

App(s)144may also include types of applications such as high definition streaming video applications (e.g., having at least 4K resolution) to be presented on larger displays such as displays having a vertical display distance of 15 inches or more. For example, circuitry120may be adequate for presenting high definition video on a relatively small touchscreen/display110but a larger touchscreen/display150may exceed the capability of circuitry120and/or the thermal capacity of device105. Thus, circuitry160may be utilized to execute these types of applications to present the high definition streaming to the larger touchscreen/display150or to an even larger display possibly included in peripheral(s)185.

App(s)144may also include a touch screen application capable of being used on large or small displays. For example, the touch screen application may be executed by circuitry160to present larger sized and/or higher resolution touch screen images to touchscreen/display150. Also, the touch screen application may be able to mirror touch screen images on multiple screens. For example, a portion of the touch screen application may be implemented by circuitry120to present executing application144(a) to touchscreen/display110and another portion may be implemented by circuitry160to present executing application144(b) to touchscreen/display150. For this example, coherency information may be exchanged between circuitry120and circuitry160via interconnect101to enable the joint execution of the touch screen application.

According to some examples, logic and/or features at device105may be capable of routing I/O information associated with circuitry160executing App(s)144. For these examples, the I/O information may be routed in a manner that is transparent to at least OS142of device105. As described more below, use of a two-level memory (2LM) system may allow for this type of information exchange that is transparent to an operating system such as OS142.

An example of I/O information that may be routed is I/O information indicating an input command for App(s)144being executed by circuitry160that may have been detected by one or more components of device105such as a physical keyboard. The input command may also be detected via a natural UI input event such as a touch gesture, an air gesture, a device gesture, an audio command, an image recognition or a pattern recognition. The natural UI input event may be detected by one or more of camera(s)104, microphone(s)109, input button(s) or touchscreen/display110

Another example of I/O information that may be routed includes a high definition video stream (e.g., at least 4K resolution) received through a network connection maintained by device105via comm. link107. For this example, logic and/or features at device105may route the high definition video stream via interconnect101for circuitry160, when executing a video display application, to cause the high definition video stream to be presented on a display coupled to device155. The display coupled to device155may include touchscreen/display150or larger sized display that may have a vertical display distance of 15 inches or greater.

FIG. 2illustrates an example second system. In some examples, the example second system includes system200. System200as shown inFIG. 2includes various components of a device205and a device255. According to some examples, components of device205may be coupled to components of device255via an interconnect201. Similar to device105and155mentioned above forFIG. 1, interconnect201may be established via wired or wireless communication channels through wired and/or wireless interfaces operating in compliance with various interconnect technologies and/or standards. As a result, interconnect201may represent a low latency, high bandwidth and efficient interconnect to allow for computing, memory or I/O resources to be aggregated between at least some components of devices205and255.

In some examples, as shown inFIG. 2, device205may have circuitry220that includes processing element(s)222and graphic engine(s)224. These elements of circuitry220may be capable of executing one or more applications similar to App(s)144mentioned above forFIG. 1. Also, device255may have circuitry260that includes processing element(s)262and graphic engine(s)264. The relative sizes of the elements of circuitry220as depicted inFIG. 2compared to circuitry260may represent increased computational abilities for device255compared to device205. These increased computation abilities may be attributed, at least in part, to the various examples given above for device155when compared to device105(e.g., fixed power source, higher thermal capacity, high current-carrying capacity, larger form factor, etc.).

According to some examples, in addition to a low latency, high bandwidth and efficient interconnect, a 2LM scheme may be implemented at device205and device255to facilitate a quick and efficient exchange of context information for an application being executed by circuitry220to be switched and then executed by circuitry260in a somewhat seamless manner (e.g., occurs in a fraction of a second). For example, near/first level memory240at device205may low latency/higher performance types of memory such as Double-Data-Rate (DDR) random-access memory (RAM). Also near/first level memory270at device255may include similar types of memory. As part of the 2LM scheme, far/second level memory245may include higher latency/lower performance types of memory such as, but not limited to, one or more of 3-D cross-point memory, NAND flash memory, NOR flash memory, ferroelectric memory, silicon-oxide-nitride-oxide-silicon (SONOS) memory, polymer memory such as ferroelectric polymer memory, ferroelectric transistor random access memory (FeTRAM) or FeRAM) or ovonic memory.

In some examples, far/second level memory245may include a hybrid or multi-mode type of solid state drive (SSD) that may enable a relatively small portion of memory arrays/devices to fulfill the role as a type of system memory as observed by an OS for device205or255. A relatively much larger portion of memory arrays/devices may then serve as storage for device205.

In some examples, following establishment of interconnect201, logic and/or features of device205may determine that an application being executed by circuitry220can be executed by circuitry260at device255. For these examples, the logic and/or features of device205may flush context information for executing the application from near/first level memory240. The flushed context information may then be sent, via interconnect201, to near/first level memory270that may be accessible to circuitry260for execution of the application. Since types of memory included in near/first level memory240and near/first level memory270have low latencies as does interconnect201, the flushing, sending and receiving of the context information may occur rapidly such that a user of device205may perceive the switch as nearly instantaneous.

According to some examples, logic and/or features at device205may then route I/O information associated with circuitry260now executing the application. For these examples, the at least portion of far/second level memory245serving as system memory for device205may facilitate this routing of I/O information such that an OS for device205and/or device255may not be aware of which near/first level memory is being used. As a result, the routing of the I/O information between device205and device255may be done in manner that is transparent to the OS for device205and/or an OS for device255.

In some examples, the hybrid or multi-mode functionality of near/first level memory240may enable device205to use substantially less power by not having to maintain operating power levels for volatile types of system memory such as DDR RAM once context information is flushed. Additionally, the at least portion of far/second level memory245observed by the OS as system memory may mask or make transparent exchanges of information between devices205and255. As such, the OS may not notice that the application has migrated for execution on circuitry existing on a separate device. Further, additional power may be saved by logic and/or features of device205powering down circuitry220to a sleep or similar type of power state following the flushing of context information from near/first level memory240. Other components of device205may remain powered such a wireless comms.240, I/O210and far/second level memory245. But these other components may use a considerably less amount of power and thus device205may conserve a significant amount of battery power.

Although not shown inFIG. 2, in some examples, a far/second memory may also be maintained at device255. For these examples, the far/second memory at device255may server as a type of cache to compensate for potential latency issues associated with interconnect201. Also, the far/second memory at device255may allow logic and/or features of device255to use both near/first level memory270and the far/second memory at device255to support varying memory aperture sizes to be configured during connection with device205. Thus, near/first level memory270may be dynamically sized to match a capacity to receive flushed context information from near/first level memory240.

In some examples a forced memory migration may occur between the entire contents of near/first level memory240to near/first level memory270. For these examples, rather than just flushing context information all information is flushed from near/first level memory240and then migrated to near/first level memory270in a similar manner as described above for context information.

According to some examples, as shown inFIG. 2, wireless comms.240may couple to device205. For these examples, wireless comms.240may be means via which device205may serve as a tether for device255to either a wireless network or another device. This may occur through various type of wireless communication channels such as a Bluetooth™, WiFi, WiGig or a broadband wireless/4G wireless communication channel. I/O information associated with execution of the application may be received via these types of wireless communication channels. For example, high definition video may be streamed through a 4G wireless communication channel associated with a subscription or user account to access a 4G wireless network using device205but not device255. For these examples, I/O210may be capable of receiving the streaming video information through wireless comms.240and at least temporarily store the streaming video at far/second level memory245. Logic and/or features at device205may then route this I/O information via interconnect201to near/first level memory270for execution of a video display application by circuitry260. Logic and/or features at device205may then cause the high definition video to be presented to a display (not shown) coupled to device255through I/O250.

In some examples, logic and/or features of device205may receive an indication that the connection to device255via interconnect201is to be terminated. For example, a user of device255and/or205may indicate via an input command (e.g., detected via keyboard or natural UI input event) that device205is about to be physically disconnected from a wired communication channel. Alternatively, if interconnect201is through a wireless communication channel, logic and/or features of device205may detect movement of device205in a manner that may result in device205moving outside of a given physical proximity to device255. The given proximity may be a range which device205may maintain an adequate wireless communication channel to exchange information via interconnect201.

According to some examples, responsive to receiving the indication of a pending termination of interconnect201, logic and/or features of device205may cause circuitry220and near/first level memory240to power back up to an operational power state. As mentioned above, these components of device205may have been powered down following the flushing of context information. For these examples, logic and/or features of device255may cause context information for executing an application at circuitry260to be flushed from near/first level memory270and sent to near/first level memory240via interconnect201. Once the context information is received to near/first level memory240, circuitry220may then resume execution of the application. In some examples, logic and/or features at device255may then power down circuitry260or near/first level memory270once the context information is flushed and sent to device205via interconnect201.

In some examples, various schemes may be implemented by logic and/or features of device255to facilitate a rapid flushing of context information from near/first level memory270following an indication of a pending termination of interconnect201. The various schemes may be needed due to a potentially large difference in memory capacities between near/first level memory270and near/first level memory240. This large difference may be due to similar reasons for the difference in computational resources (e.g., fixed power, higher thermal capacity, larger form factor, etc.). The various schemes may include restricting an amount of context information maintained in near/first level memory270during execution of an application such that context information can be flushed and sent to near/first level memory240without overwhelming the capacity of near/first level memory240and/or interconnect201to handle that context information in an efficient and timely manner.

FIG. 3illustrates an example process300. In some examples, process300may be for a first device having first circuitry to migrate at least a portion of execution of an application to a second device having second circuitry. For these examples, elements of system200as shown inFIG. 2may be used to illustrate example operations related to process300. However, the example operations are not limited to implementations using elements of system200.

Beginning at process3.0(Execute Application(s)), circuitry220of device205may be executing one or more applications. For example, the one or more applications may include a video streaming application to present streaming video to a display at device205.

Proceeding to process3.1(Detect Device), logic and/or features at device205may detect device255having circuitry260capable of executing at least a portion of the one or more applications being executed by device255.

Proceeding to process3.2(Connect via Interconnect), logic and/or features at device205may cause device205to connect to device255via interconnect201. In some examples, the connection for interconnect201may be via a wired communication channel. In other examples, the connection for interconnect201may be via a wireless communication channel.

Proceeding to process3.3(Flush Context Information from Near Memory), logic and/or features at device205may cause context information used to execute the at least portion of the one or more applications to be flushed from near/first level memory240. For example, video frame information at least temporarily maintained in near/first level memory240may be flushed. For these examples, the logic and/or features at device205, following the flush of context information may cause quiescent execution of the at least portion of application(s) by circuitry220.

Proceeding to process3.4(Send Flushed Context Information via Interconnect), logic and/or feature at device205may cause the flushed context information to be sent to device255via interconnect201. In some examples, the flushed context information may be first sent to far/second memory245prior to being sent to device255via interconnect201.

Proceeding to process3.5(Receive Flushed Context Information to Near Memory), logic and/or features at device255may receive the flushed context information to near/first level memory270.

Proceeding to process3.6(Execute at least Portion of Application(s)), circuitry260may execute the at least portion of applications using the flushed context information received to near/first level memory270. For example, video frame information for executing the video display application may be used to present streaming video to a display coupled to device255. The streaming video may be high definition video (e.g., at least 4K resolution) presented to a large size display (e.g., greater than 15 inches).

Proceeding to process3.7(Route I/O Information Associated with Executing Application(s) via Interconnect in Manner Transparent to OS(s)), logic and/or features at device205may route I/O information via interconnect201in a manner transparent to an OS for device205and/or device255. For example, the I/O information may include user input commands associated with the user viewing displayed video. The user input commands may be detected by logic and/or features at device205(e.g., a user gesture) and may indicate pausing a video. The I/O information to pause the video may be routed to device255via interconnect201and the video display application being executed by circuitry260may cause the video to be paused.

Proceeding to process3.8(Maintain Coherency Information), logic and/or features at both device205and device255may maintain coherency information between circuitry220and circuitry260. In some examples, rather than powering down circuitry220following the flushing of context information, circuitry220may continue to execute at least a portion of the one or more applications. This may enable execution of the one or more applications in a distributed or shared manner. For these examples, circuitry270may execute at least the portion of the one or more applications while circuitry240executes a remaining portion of the one or more applications.

In some examples, process300may continue until a disconnection/termination of interconnect201. As mentioned above, logic and/or features at device205and255may implement various actions to allow the at least portion of the one or more applications to migrate back to circuitry220prior to the termination of interconnect201.

FIG. 4illustrates a block diagram for a first apparatus. As shown inFIG. 4, the first apparatus includes an apparatus400. Although apparatus400shown inFIG. 4has a limited number of elements in a certain topology or configuration, it may be appreciated that apparatus400may include more or less elements in alternate configurations as desired for a given implementation.

The apparatus400may include a computing device and/or firmware implemented apparatus400having processor circuit420arranged to execute one or more logics422-a. It is worthy to note that “a” and “b” and “c” and similar designators as used herein are intended to be variables representing any positive integer. Thus, for example, if an implementation sets a value for a=8, then a complete set of logics422-amay include logics422-1,422-2,422-3,422-4,422-5,422-6,422-7or422-8. The examples are not limited in this context.

According to some examples, apparatus400may be part a first device having first circuitry for executing an application (e.g. device105or205). The examples are not limited in this context.

In some examples, as shown inFIG. 4, apparatus400includes processor circuit420. Processor circuit420may be generally arranged to execute one or more logics422-a. Processor circuit420can be any of various commercially available processors, including without limitation an AMD® Athlon®, Duron® and Opteron® processors; ARM® application, embedded and secure processors; IBM® and Motorola® DragonBall® and PowerPC® processors; IBM and Sony® Cell processors; Qualcomm® Snapdragon®; Intel® Celeron®, Core (2) Duo®, Core i3, Core i5, Core i7, Itanium®, Pentium®, Xeon®, Atom® and XScale® processors; and similar processors. Dual microprocessors, multi-core processors, and other multi-processor architectures may also be employed as processor circuit420. According to some examples processor circuit420may also be an application specific integrated circuit (ASIC) and logics422-amay be implemented as hardware elements of the ASIC.

According to some examples, apparatus400may include a detect logic422-1. Detect logic422-1may be executed by processor circuit420to detect a second device having second circuitry capable of executing at least a portion of an application. For example, detect logic422-1may receive detect information405that may indicate that the second device has connected to the first device via either a wired or wireless communication channel.

In some examples, apparatus400may also include a connect logic422-2. Connect logic422-2may be executed by processor circuit420to cause the first device to connect to the second device via an interconnect. For example, connect logic422-2may connect to the second device via an interconnect that may operate in compliance with one or more low latency, high bandwidth and efficient interconnect technologies such as PCIe, QPI, WiGig or Wi-Fi.

According to some examples, apparatus400may also include a flush logic422-3. Flush logic422-3may be executed by processor circuit420to flush context information from a near memory for the first circuitry. This flushed context information may be for at least the portion of the application.

According to some examples, apparatus400may include a send logic422-4. Send logic422-4may be executed by processor circuit420to send, via the interconnect, the flushed context information to a second near memory for the second circuitry to execute at least the portion of the application. For example, the flushed context information may be included in flushed context information435.

In some examples, apparatus400may also include an I/O logic422-5. I/O logic422-5may be executed by processor circuit420to route, via the interconnect, I/O information associated with the second circuitry executing at least the portion of the application. The I/O information may be routed in a manner that is transparent to a first OS for the first device or the second device. For example, the I/O information may be received via NW I/O information410and then included in routed I/O information445. Routed I/O information may include such information as detected user input commands for affecting the execution of the at least portion of the application.

According to some examples, apparatus400may also include a coherency logic422-6. Coherency logic422-6may be executed by processor circuit420to maintain coherency information between the first circuitry and the second circuitry via the interconnect to enable execution of the application in a distributed or shared manner. For these examples, the second circuitry may execute at least the portion of the application while the first circuitry executes a remaining portion of the application. For example, coherency information included in coherency information455may be exchanged between the first and second device to allow coherency logic422-6to maintain the coherency information.

According to some examples, apparatus400may include a power logic422-7. Power logic422-7may be executed by processor circuit420to either cause the first circuitry and the first near memory to be powered down or powered up. For example, the first circuitry and the first near memory may be powered down to a lower power state following the sending of flushed context information435to the second device. The first circuitry and the first near memory may subsequently be powered up to a higher power state following an indication that the interconnect between the first and second devices is about to be terminated. The indication may be included in connection information415(e.g., user input command or wireless range detection).

In some examples, apparatus400may also include a context logic422-8. Context logic422-8may be executed by processor circuit420to receive context information flushed from the second near memory for the second circuitry that may cause the first circuitry to resume execution of the application. For these examples, the flushed context information may be received in flushed context information and based on at least temporarily storing the received context information flushed from the second near memory to the first near memory, the first circuitry may resume the execution of the application. This may allow for a seamless migration of execution of the application back to the first circuitry at the first device.

A logic flow may be implemented in software, firmware, and/or hardware. In software and firmware embodiments, a logic flow may be implemented by computer executable instructions stored on at least one non-transitory computer readable medium or machine readable medium, such as an optical, magnetic or semiconductor storage. The embodiments are not limited in this context.

FIG. 5illustrates an example of a first logic flow. As shown inFIG. 5, the first logic flow includes a logic flow500. Logic flow500may be representative of some or all of the operations executed by one or more logic, features, or devices described herein, such as apparatus400. More particularly, logic flow500may be implemented by detect logic422-1, connect logic422-2, flush logic422-3, send logic422-4, I/O logic422-5, coherency logic422-6, power logic422-7or context logic422-8.

In the illustrated example shown inFIG. 5, logic flow500at block502may execute, at a first device having first circuitry, one or more applications on first circuitry at a first device.

According to some examples, logic flow500at block504may detect a second device having second circuitry capable of executing at least a portion of the one or more applications. For these examples, detect logic422-1may detect the second device having the second circuitry.

In some examples, logic flow500at block506may connect to the second device. For these examples, connect logic422-2may cause the connection via an interconnect to become established through either a wired or wireless communication channel.

According to some examples, logic flow at block508may flush context information from a first near memory for the first circuitry. The context information may be for executing at least the portion of the one or more applications. For these examples, flush logic422-3may cause the context information to be flushed.

In some examples, logic flow at block510may send the flushed context information to a second near memory for the second circuitry to execute at least the portion of the one or more applications. For these examples, send logic422-4may cause the flushed context information to be sent.

According to some examples, logic flow at block512may route I/O information associated with the second circuitry executing at least the portion of the one or more applications. The I/O information may be routed in a manner that is transparent to a first OS for the first device or the second device. For these examples, I/O logic422-5may cause the I/O information to be routed in the manner that is transparent to the first OS.

FIG. 6illustrates an embodiment of a first storage medium. As shown inFIG. 6, the first storage medium includes a storage medium600. Storage medium600may comprise an article of manufacture. In some examples, storage medium600may include any non-transitory computer readable medium or machine readable medium, such as an optical, magnetic or semiconductor storage. Storage medium600may store various types of computer executable instructions, such as instructions to implement logic flow500. Examples of a computer readable or machine readable storage medium may include any tangible media capable of storing electronic data, including volatile memory or non-volatile memory, removable or non-removable memory, erasable or non-erasable memory, writeable or re-writeable memory, and so forth. Examples of computer executable instructions may include any suitable type of code, such as source code, compiled code, interpreted code, executable code, static code, dynamic code, object-oriented code, visual code, and the like. The examples are not limited in this context.

FIG. 7illustrates a block diagram for a second apparatus. As shown inFIG. 7, the second apparatus includes an apparatus700. Although apparatus700shown inFIG. 7has a limited number of elements in a certain topology or configuration, it may be appreciated that apparatus700may include more or less elements in alternate configurations as desired for a given implementation.

The apparatus700may comprise a computer-implemented apparatus700having a processor circuit720arranged to execute one or more logics722-a. Similar to apparatus400forFIG. 4, “a” and “b” and “c” and similar designators may be variables representing any positive integer.

According to some examples, apparatus700may be part a first device having first circuitry for executing an application (e.g. device155or255). The examples are not limited in this context.

In some examples, as shown inFIG. 7, apparatus700includes processor circuit720. Processor circuit720may be generally arranged to execute one or more logics722-a. Processor circuit720can be any of various commercially available processors to include, but not limited to, those previously mentioned for processor circuit420for apparatus400. Dual microprocessors, multi-core processors, and other multi-processor architectures may also be employed as processor circuit720. According to some examples processor circuit720may also be an application specific integrated circuit (ASIC) and logics722-amay be implemented as hardware elements of the ASIC.

According to some examples, apparatus700may include a detect logic722-1. Detect logic722-1may be executed by processor circuit720to detect an indication that a second device having second circuitry has connected to the first device via an interconnect. For example, detect logic722-1may receive detect information705that may indicate that the second device has connected to the first device via either a wired or wireless communication channel.

In some examples, apparatus700may also include a context logic722-2. Context logic722-2may be executed by processor circuit720to receive, via the interconnect, context information flushed from a first near memory for the second circuitry. The flushed context information may enable the first circuitry at the first device to execute at least a portion of one or more applications previously executed by the second circuitry prior to flushing the context information. The received context information may be at least temporarily stored to a second near memory for the first circuitry at the first device. For these examples, context logic722-2may receive the flushed context information in flushed context information710.

In some examples, apparatus700may also include an I/O logic722-3. I/O logic722-3may be executed by processor circuit720to receive, via the interconnect, I/O information associated with the first circuitry executing at least the portion of the one or more applications. The I/O information may be received in a manner that is transparent to a first OS for the first device or the second device. For example, the I/O information may be included in I/O information715and may include such information as detected user input commands at the second device for affecting the execution of the at least portion of the one or more applications.

According to some examples, apparatus700may also include a coherency logic722-4. Coherency logic722-4may be executed by processor circuit720to maintain coherency information between the first circuitry and the second circuitry via the interconnect to enable execution of the one or more applications in a distributed or shared manner. For these examples, the second circuitry may execute at least the portion of the one or more applications while the first circuitry executes a remaining portion of the one or more applications. For example, coherency information included in coherency information735may be exchanged between the first and second device to allow coherency logic722-4to maintain the coherency information.

In some examples, apparatus700may also include a flush logic722-5. Flush logic722-5may be executed by processor circuit720to flush context information for executing at least the portion of the one or more applications from the second near memory for the first device. This flushed context information may be responsive to a detection by detect logic722-1of an indication that the connection to the second device via the interconnect is about to be terminated.

According to some examples, apparatus700may include a send logic722-6. Send logic722-6may be executed by processor circuit720to send, via the interconnect, the flushed context information from the second near memory to the first near memory at the second device. The sent flushed context information may be for the second circuitry to resume execution of at least the portion of the one or more application. For example, the flushed context information may be included in flushed context information710.

In some examples, apparatus700may include a power logic722-7. Power logic722-7may be executed by processor circuit720to either power down or power up the first circuitry and the second near memory at the first device. For example, the first circuitry and the second near memory may be powered down to a lower power state following the sending of flushed context information710to the second device.

Various components of apparatus700and a device implementing apparatus700may be communicatively coupled to each other by various types of communications media to coordinate operations. The coordination may involve the uni-directional or bi-directional exchange of information. For instance, the components may communicate information in the form of signals communicated over the communications media. The information can be implemented as signals allocated to various signal lines. In such allocations, each message is a signal. Further embodiments, however, may alternatively employ data messages. Such data messages may be sent across various connections. Example connections include parallel interfaces, serial interfaces, and bus interfaces.

A logic flow may be implemented in software, firmware, and/or hardware. In software and firmware embodiments, a logic flow may be implemented by computer executable instructions stored on at least one non-transitory computer readable medium or machine readable medium, such as an optical, magnetic or semiconductor storage. The embodiments are not limited in this context.

FIG. 8illustrates an example of a second logic flow. As shown inFIG. 8, the second logic flow includes a logic flow800. Logic flow800may be representative of some or all of the operations executed by one or more logic, features, or devices described herein, such as apparatus800. More particularly, logic flow800may be implemented by detect logic722-1, context logic722-2, I/O logic722-3, coherency logic722-4, flush logic722-5, send logic722-6or power logic722-7.

In the illustrated example shown inFIG. 8, logic flow800at block802may detect, at a first device having first circuitry, an indication that a second device having second circuitry has connected to the first device. For example, detect logic722-1may detect the second device.

In some examples, logic flow800at block804may receive context information flushed from a first near memory for the second circuitry. The flushed context information may enable the first circuitry at the first device to execute at least a portion of one or more applications previously executed by the second circuitry prior to flushing the context information. The received context information at least temporarily stored to a second near memory for the first circuitry. For these examples, context logic722-2may receive the flushed context information.

According to some examples, logic flow800at block806may receive I/O information associated with the first circuitry executing at least a portion of the one or more applications. The I/O information received in a manner that may be transparent to a first OS for the first device or the second device. For these examples, I/O logic722-3may receive the I/O information.

FIG. 9illustrates an embodiment of a second storage medium. As shown inFIG. 9, the second storage medium includes a storage medium900. Storage medium900may comprise an article of manufacture. In some examples, storage medium900may include any non-transitory computer readable medium or machine readable medium, such as an optical, magnetic or semiconductor storage. Storage medium900may store various types of computer executable instructions, such as instructions to implement logic flow800. Examples of a computer readable or machine readable storage medium may include any tangible media capable of storing electronic data, including volatile memory or non-volatile memory, removable or non-removable memory, erasable or non-erasable memory, writeable or re-writeable memory, and so forth. Examples of computer executable instructions may include any suitable type of code, such as source code, compiled code, interpreted code, executable code, static code, dynamic code, object-oriented code, visual code, and the like. The examples are not limited in this context.

FIG. 10illustrates an embodiment of a device1000. In some examples, device1000may be configured or arranged for aggregating compute, memory and input/output (I/O) resources with another device. Device1000may implement, for example, apparatus400/700, storage medium600/900and/or a logic circuit1070. The logic circuit1070may include physical circuits to perform operations described for apparatus400/700. As shown inFIG. 10, device1000may include a radio interface1010, baseband circuitry1020, and computing platform1030, although examples are not limited to this configuration.

The device1000may implement some or all of the structure and/or operations for apparatus400/700, storage medium600/900and/or logic circuit1070in a single computing entity, such as entirely within a single device. The embodiments are not limited in this context.

Radio interface1010may include a component or combination of components adapted for transmitting and/or receiving single carrier or multi-carrier modulated signals (e.g., including complementary code keying (CCK) and/or orthogonal frequency division multiplexing (OFDM) symbols and/or single carrier frequency division multiplexing (SC-FDM symbols) although the embodiments are not limited to any specific over-the-air interface or modulation scheme. Radio interface1010may include, for example, a receiver1012, a transmitter1016and/or a frequency synthesizer1014. Radio interface1010may include bias controls, a crystal oscillator and/or one or more antennas1018-f. In another embodiment, radio interface1010may use external voltage-controlled oscillators (VCOs), surface acoustic wave filters, intermediate frequency (IF) filters and/or RF filters, as desired. Due to the variety of potential RF interface designs an expansive description thereof is omitted.

Baseband circuitry1020may communicate with radio interface1010to process receive and/or transmit signals and may include, for example, an analog-to-digital converter1022for down converting received signals, a digital-to-analog converter1024for up converting signals for transmission. Further, baseband circuitry1020may include a baseband or physical layer (PHY) processing circuit1026for PHY link layer processing of respective receive/transmit signals. Baseband circuitry1020may include, for example, a processing circuit1028for medium access control (MAC)/data link layer processing. Baseband circuitry1020may include a memory controller1032for communicating with MAC processing circuit1028and/or a computing platform1030, for example, via one or more interfaces1034.

In some embodiments, PHY processing circuit1026may include a frame construction and/or detection logic, in combination with additional circuitry such as a buffer memory, to construct and/or deconstruct communication frames (e.g., containing subframes). Alternatively or in addition, MAC processing circuit1028may share processing for certain of these functions or perform these processes independent of PHY processing circuit1026. In some embodiments, MAC and PHY processing may be integrated into a single circuit.

Computing platform1030may further include a network interface1060. In some examples, network interface1060may include logic and/or features to support network interfaces operated in compliance with one or more wireless or wired technologies such as those described above for connecting to another device via a wired or wireless communication channel to establish an interconnect between the devices.

Device1000may be, for example, user equipment, a computer, a personal computer (PC), a desktop computer, a laptop computer, a notebook computer, a netbook computer, a tablet computer, an ultra-book computer, a smart phone, a wearable computing device, embedded electronics, a gaming console, a server, a server array or server farm, a web server, a network server, an Internet server, a work station, a mini-computer, a main frame computer, a supercomputer, a network appliance, a web appliance, a distributed computing system, multiprocessor systems, processor-based systems, or combination thereof. Accordingly, functions and/or specific configurations of device1000described herein, may be included or omitted in various embodiments of device1000, as suitably desired.

Embodiments of device1000may be implemented using single input single output (SISO) architectures. However, certain implementations may include multiple antennas (e.g., antennas1018-f) for transmission and/or reception using adaptive antenna techniques for beamforming or spatial division multiple access (SDMA) and/or using multiple input multiple output (MIMO) communication techniques.

Some examples may be described using the expression “coupled”, “connected”, or “capable of being coupled” along with their derivatives. These terms are not necessarily intended as synonyms for each other. For example, descriptions using the terms “connected” and/or “coupled” may indicate that two or more elements are in direct physical or electrical contact with each other. The term “coupled,” however, may also mean that two or more elements are not in direct contact with each other, but yet still co-operate or interact with each other.

In some examples, an example first apparatus may include a processor circuit for a first device having first circuitry to execute an application. The example first apparatus may also include a detect logic to detect a second device having second circuitry capable of executing at least a portion of the application. The example first apparatus may also include a connect logic to cause the first device to connect to the second device. The example first apparatus may also include a flush logic to flush context information from a first near memory for the first circuitry, the context information for executing at least the portion of the application. The example first apparatus may also include a send logic to send the flushed context information to a second near memory for the second circuitry to execute at least the portion of the application. The example first apparatus may also include an I/O logic to route I/O information associated with the second circuitry executing at least the portion of the application, the I/O information routed in a manner that is transparent to a first operating system for the first device or the second device.

According to some examples for the example first apparatus, the flush logic may flush the context information to a far memory at the first device prior to the send logic sending the flushed context information to the second near memory. The first near memory, the second near memory and the far memory may be included in a 2LM scheme implemented at least at the first device.

According to some examples, the example first apparatus may also include a power logic to cause the first circuitry and the first near memory to power down to a lower power state following the sending of the flushed context information to the second near memory. The power logic may also cause power to be continued for I/O components of the first device. The I/O components may include one or more of the far memory, a storage device, a network interface or a user interface.

In some examples for the example first apparatus, the connect logic may receive an indication the connection to the second device is to be terminated. For these examples, the power logic may then cause the first circuitry and the first near memory to power up the first circuitry and the first near memory to a higher power state. The example first apparatus may also include a context logic to receive context information flushed from the second near memory for the second circuitry and cause the first circuitry to resume execution of the application.

According to some examples, the example first apparatus may also include a coherency logic to maintain coherency information between the first circuitry and the second circuitry to enable execution of the application in a distributed or shared manner. The second circuitry may execute at least the portion of the application while the first circuitry executes a remaining portion of the application.

In some examples for the example first apparatus, the detect logic may detect the second device responsive to the first device coupling to a wired interface that enables the connect logic to establish a wired communication channel to connect with the second device via an interconnect.

According some examples for the example first apparatus, the detect logic may detect the second device responsive to the first device coming within a given physical proximity that enables the connect logic to establish a wireless communication channel to connect with the second device via an interconnect.

In some examples for the example first apparatus, the I/O logic may route I/O information indicating an input command for the application. The input command may be received via a keyboard input event at the first device or via a natural UI input event detected by the first device. The natural UI input event may include a touch gesture, an air gesture, a first device gesture that includes purposeful movement of at least a portion of the first device, an audio command, an image recognition or a pattern recognition.

According some examples for the example first apparatus, the first device may include one or more of the first device having a lower thermal capacity for dissipating heat from the first circuitry compared to a higher thermal capacity for dissipating heat from the second circuitry at the second device, the first device operating on battery power or the first device having a lower current-carrying capacity for powering the first circuitry compared to a higher current-carrying capacity for powering the second circuitry at the second device.

In some examples, example first methods may include executing on first circuitry at a first device one or more applications. The example first methods may also include detecting a second device having second circuitry capable of executing at least a portion of the one or more applications. The example first methods may also include connecting to the second device. The example first methods may also include flushing context information from a first near memory for the first circuitry. The context information may be for executing at least the portion of the one or more applications. The example first methods may also include sending the flushed context information to a second near memory for the second circuitry to execute at least the portion of the one or more applications. The example first methods may also include routing input/output (I/O) information associated with the second circuitry executing at least the portion of the one or more applications. The I/O information may be routed in a manner that is transparent to a first operating system for the first device or the second device.

According to some examples, the first example methods may also include flushing the context information to a far memory at the first device prior to sending the flushed context information to the second near memory. The first near memory, the second near memory and the far memory included in a 2LM scheme implemented at least at the first device.

In some examples, the first example methods may also include powering down the first circuitry and the first near memory to a lower power state following the sending of the flushed context information to the second near memory. Power to I/O components of the first device may be continued. These I/O components may include one or more of the far memory, a storage device, a network interface or a user interface.

In some examples, the first example methods may also include receiving an indication that the connection to the second device is to be terminated. Based on the indication the first circuitry and the first far memory may be powered up to a higher power state. The first example methods may also include receiving context information flushed from the second near memory for the second circuitry and the resuming execution of the one or more applications on the first circuitry by at least temporarily storing the received context information flushed from the second near memory in the far memory prior to sending the flushed context information to the first near memory.

According to some examples, the first example methods may also include maintaining coherency information between the first circuitry and the second circuitry to enable execution of the one or more applications in a distributed or shared manner. The second circuitry may execute at least the portion of the one or more applications while the first circuitry executes a remaining portion of the one or more applications.

In some examples for the first example methods, detecting the second device may be responsive to the first device coupling to a wired interface that enables the first device to establish a wired communication channel to connect with the second device via an interconnect.

According to some examples for the first example methods, detecting the second device may be responsive to the first device coming within a given physical proximity that enables the first device to establish a wireless communication channel to connect with the second device via an interconnect.

In some examples for the first example methods, the one or more applications may include one of at least a 4K resolution streaming video application, an application to present at least a 4K resolution image or graphic to a display, a gaming application including video or graphics having at least a 4K resolution when presented to a display, a video editing application or a touch screen application for user input to a display coupled to the second device having touch input capabilities.

According to some examples for the first example methods, routing I/O information associated with the second circuitry executing at least the portion of the one or more applications may include routing 4K resolution streaming video information obtained by the first device via a network connection. The at least 4K resolution streaming video application may cause the 4K streaming video to be presented on a display coupled to the second device having a vertical display distance of at least 15 inches.

In some examples for the first example methods, routing I/O information associated with the second circuitry executing at least the portion of the one or more applications may include routing I/O information indicating an input command for the one or more applications. The input command may be received via a keyboard input event at the first device or via a natural user interface (UI) input event detected by the first device. The natural UI input event may include a touch gesture, an air gesture, a first device gesture that includes purposeful movement of at least a portion of the first device, an audio command, an image recognition or a pattern recognition.

According to some examples for the first example methods, the first device may include one or more of the first device having no active cooling capacity for the first circuitry, the first device having a lower thermal capacity for dissipating heat from the first circuitry compared to a higher thermal capacity for dissipating heat from the second circuitry at the second device, the first device operating on battery power or the first device having a lower current-carrying capacity for powering the first circuitry compared to a higher current-carrying capacity for powering the second circuitry at the second device.

In some examples for the first example methods, active cooling may include using a powered fan for dissipating heat.

According to some examples for the first example methods, the first circuitry may include one or more processing elements and a graphics engine.

In some examples, an example first at least one machine readable medium comprising a plurality of instructions that in response to being executed on a first device having first circuitry causes the first device to execute on first circuitry at the first device one or more applications. The instructions may also cause the first device to detect a second device having second circuitry capable of executing at least a portion of the one or more applications. The instructions may also cause the first device to connect to the second device. The instructions may also cause the first device to flush context information from a first near memory for the first circuitry, the context information for executing the one or more applications. The instructions may also cause the first device to send the flushed context information to a second near memory for the second circuitry to execute the one or more applications. The instructions may also cause the first device to route I/O information associated with the second circuitry executing the one or more applications. The I/O information may be routed in a manner that is transparent to a first operating system for the first device or the second device.

According to some examples for the first at least one machine readable medium, the instructions may also cause the first device to detect the second device responsive to the first device coupling to a wired interface that enables the first device to establish a wired communication channel to connect with the second device via an interconnect.

In some examples for the first at least one machine readable medium, the instructions may also cause the first device to detect the second device responsive to the first device coming within a given physical proximity that enables the first device to establish a wireless communication channel to connect with the second device via an interconnect.

According to some examples for the first at least one machine readable medium, the one or more applications may include one of at least a 4K resolution streaming video application, an application to present at least a 4K resolution image or graphic to a display, a gaming application including video or graphics having at least a 4K resolution when presented to a display, a video editing application or a touch screen application for user input to a display coupled to the second device having touch input capabilities.

In some examples for the first at least one machine readable medium, the instructions may also cause the first device to route I/O information associated with the second circuitry executing the one or more applications comprises routing 4K resolution streaming video information obtained by the first device via a network connection. For these examples, the at least 4K resolution streaming video application may cause the 4K streaming video to be presented on a display coupled to the second device having a vertical display distance of at least 15 inches.

According to some examples for the first at least one machine readable medium, the first device may include one or more of the first device having a lower thermal capacity for dissipating heat from the first circuitry compared to a higher thermal capacity for dissipating heat from the second circuitry at the second device. The first device may be operating on battery power or the first device having a lower current-carrying capacity for powering the first circuitry compared to a higher current-carrying capacity for powering the second circuitry at the second device.

In some examples for the first at least one machine readable medium, the first circuitry may include one or more processing elements and a graphics engine.

In some examples, an example second apparatus may include a processor circuit for a first device having first circuitry. The example second apparatus may also include a detect logic to detect an indication that a second device having second circuitry has connected to the first device. The example second apparatus may also include a context logic to receive, context information flushed from a first near memory for the second circuitry. The flushed context information may enable the first circuitry at the first device to execute at least a portion of one or more applications previously executed by the second circuitry prior to flushing the context information. The received context information may be at least temporarily stored to a second near memory for the first circuitry. The example second apparatus may also include an I/O logic to receive I/O information associated with the first circuitry executing at least the portion of the one or more applications. The I/O information may be received in a manner that is transparent to a first operating system for the first device or the second device.

According to some examples for the example second apparatus, the I/O logic may continue to receive the I/O information routed from the second device in a manner that is transparent to the first operating system. For these examples, the I/O logic may provide the continually received I/O information for the first circuitry to continue to execute at least a portion of the one or more applications.

In some examples for the example second apparatus, the context information may be initially flushed to a far memory at the second device and then routed to the second near memory at the first device, the first near memory. The second near memory and the far memory may be included in a 2LM scheme implemented at both the first and second devices.

According to some examples for the example second apparatus, the detection logic may receive an indication that the connection to the second device via the interconnect is to be terminated. The example second apparatus may also include a flush logic to flush context information for executing at least the portion of the one or more applications from the second near memory for the first device. The example second apparatus may also include a send logic to send the flushed context information from the second near memory to the far memory at the second device and then to the first near memory at the second device, the sent flushed context information for the second circuitry to resume execution of at least the portion of the one or more applications. The example second apparatus may also include a power logic to power down the first circuitry and the second near memory to a lower power state following the context logic sending the flushed context information to the first near memory.

In some examples, the example second apparatus may also include a coherency logic to maintain coherency information between the first circuitry and the second circuitry to enable execution of the one or more applications in a distributed or shared manner. The second circuitry may execute at least the portion of the one or more applications while the first circuitry executes a remaining portion of the one or more applications.

According to some examples for the example second apparatus, the detect logic may detect the indication that the second device has connected responsive to the second device coupling to a wired interface that enables the first device to establish a wired communication channel to connect with the second device via an interconnect.

In some examples for the example second apparatus, the detect logic may detect the indication that the second device has connected responsive to the second device coming within a given physical proximity that enables the first device to establish a wireless communication channel to connect with the second device via an interconnect.

According to some examples for the example second apparatus, the first circuitry executing at least the portion of the one or more applications may include one of causing at least a 4K resolution streaming video to be presented on a display coupled to the first device, causing at least a 4K resolution image or graphic to be presented on a display coupled to the first device or causing a touch screen to be presented on a display coupled to the first device, the display having touch input capabilities.

In some examples for the example second apparatus, the first device may include one or more of the first device having a higher thermal capacity for dissipating heat from the first circuitry compared to a lower thermal capacity for dissipating heat from the second circuitry at the second device. The first device may be operating on a fixed power source from a power outlet or the first device having a higher current-carrying capacity for powering the first circuitry compared to a lower current-carrying capacity for powering the second circuitry at the second device.

In some examples, example second methods may include detecting, at a first device having first circuitry, an indication that a second device having second circuitry has connected to the first device. Context information may be received that was flushed from a first near memory for the second circuitry. The flushed context information may enable the first circuitry at the first device to execute at least a portion of one or more applications previously executed by the second circuitry prior to flushing the context information. The received context information may be at least temporarily stored to a second near memory for the first circuitry. I/O information may then be received the I/O information may be associated with the first circuitry executing at least a portion of the one or more applications. The I/O information may be received in a manner that is transparent to a first operating system for the first device or the second device.

According to some examples for the second example methods, at least the portion of the one or more applications may continue to be executed based on the I/O information being routed from the second device in the manner that is transparent to the first operating system.

In to some examples for the second example methods, the context information may be initially flushed to a far memory at the second device and then routed to the second near memory at the first device. The first near memory, the second near memory and the far memory included in a 2LM scheme implemented at both the first and second devices.

According to some examples, the example second methods may also include receiving an indication that the connection to the second device is to be terminated and then flushing context information for executing at least the portion of the one or more applications from the second near memory for the first device. The flushed context information may then be sent from the second near memory to the far memory at the second device and then to the first near memory at the second device. The sent flushed context information may be for the second circuitry to resume execution of at least the portion of the one or more applications. The first circuitry and the second near memory may then be powered down to a lower power state following the sending of the flushed context information to the first near memory.

In to some examples, the second example methods may also include maintaining coherency information between the first circuitry and the second circuitry to enable execution of the one or more applications in a distributed or shared manner. The second circuitry may execute at least the portion of the one or more applications while the first circuitry executes a remaining portion of the one or more applications.

According to some examples for the second example methods, detecting the indication that the second device has connected may be responsive to the second device coupling to a wired interface that enables the first device to establish a wired communication channel to connect with the second device via an interconnect.

In to some examples for the second example methods, detecting the indication that the second device has connected may be responsive to the second device coming within a given physical proximity that enables the first device to establish a wireless communication channel to connect with the second device via an interconnect.

According to some examples for the second example methods, executing at least the portion of the one or more applications may include one of causing at least a 4K resolution streaming video to be presented on a display coupled to the first device, causing at least a 4K resolution image or graphic to be presented on a display coupled to the first device or causing a touch screen to be presented on a display coupled to the first device, the display having touch input capabilities.

In to some examples for the second example methods, the first device may include one or more of the first device having a higher thermal capacity for dissipating heat from the first circuitry compared to a lower thermal capacity for dissipating heat from the second circuitry at the second device. The first device may be operating on a fixed power source from a power outlet or the first device having a higher current-carrying capacity for powering the first circuitry compared to a lower current-carrying capacity for powering the second circuitry at the second device.

In some examples, an example second at least one machine readable medium comprising a plurality of instructions that in response to being executed on a first device having first circuitry causes the first device to detect an indication that a second device having second circuitry has connected to the first device. The instructions may also cause the first device to receive context information flushed from a first near memory for the second circuitry. The flushed context information may enable the first circuitry at the first device to execute one or more applications previously executed by the second circuitry prior to flushing the context information. The received context information may be at least temporarily stored to a second near memory for the first circuitry. The instructions may also cause the first device to receive I/O information associated with the first circuitry executing the one or more applications. The I/O information may be received in a manner that is transparent to a first operating system for the first device or the second device.

According to some examples for the second at least one machine readable medium, the second circuitry may continue to execute the one or more applications based on the I/O information being routed from the second device via the interconnect in the manner that is transparent to the first operating system.

In some examples for the second at least one machine readable medium, the context information initially flushed to a far memory at the second device and then routed to the second near memory at the first device. The first near memory, the second near memory and the far memory may be included in a 2LM scheme implemented at both the first and second devices.

According to some examples for the second at least one machine readable medium, the instructions may also cause the first device to receive an indication that the connection to the second device is to be terminated, flush context information for executing the one or more applications from the second near memory for the first device and send the flushed context information from the second near memory to the far memory at the second device and then to the first near memory at the second device. The sent flushed context information for the second circuitry to resume execution of the one or more applications. The instructions may also cause the first device to power down the first circuitry and the second near memory to a lower power state following the sending of the flushed context information to the first near memory.

In some examples for the second at least one machine readable medium, the instructions to also cause the first device to detect the indication that the second device has connected responsive to the second device coupling to a wired interface that enables the first device to establish a wired communication channel to connect with the second device via an interconnect.

According to some examples for the second at least one machine readable medium, the instructions to also cause the first device to detect the indication that the second device has connected responsive to the second device coming within a given physical proximity that enables the first device to establish a wireless communication channel to connect with the second device via an interconnect.

In some examples for the second at least one machine readable medium, the first circuitry executing the one or more applications may include one of causing at least a 4K resolution streaming video to be presented on a display coupled to the first device, causing at least a 4K resolution image or graphic to be presented on a display coupled to the first device or causing a touch screen to be presented on a display coupled to the first device, the display having touch input capabilities.

According to some examples for the second at least one machine readable medium, the first device may include one or more of the first device having a higher thermal capacity for dissipating heat from the first circuitry compared to a lower thermal capacity for dissipating heat from the second circuitry at the second device. The first device may be operating on a fixed power source from a power outlet or the first device having a higher current-carrying capacity for powering the first circuitry compared to a lower current-carrying capacity for powering the second circuitry at the second device.