Power amplifier spurious cancellation

This disclosure relates generally to power amplification devices and methods of operating the same. The power amplification devices are capable of reducing (and possibly cancelling) modulation of a ripple variation of a supply voltage level of a supply voltage onto a radio frequency (RF) signal. In one embodiment, a power amplification device includes a power amplification circuit configured to amplify an RF signal with a supply voltage such that a ripple variation in a supply voltage level of the supply voltage is modulated onto the RF signal in accordance with a conversion gain. However, the power amplification device also includes a plurality of ripple rejection circuits. The plurality of ripple rejection circuits is configured to produce phase shifts and one or more amplitude shifts in the RF signal so as to reduce the conversion gain of the power amplification circuit.

FIELD OF THE DISCLOSURE

This disclosure relates generally to power amplification devices.

BACKGROUND

Power amplification devices are typically powered by one or more input signals, such as supply voltages, bias signals, supply currents, and/or the like. In practice, the input signals have a signal level that undergoes a ripple variation as a result of non-ideal circuit behavior (e.g., ripple variation resulting from circuitry performing DC to DC conversions, ripple variation resulting from AC to DC conversions, ripple variation in low dropout (LDO) regulators, etc.). Ideally, these power amplification devices have infinite ripple rejection. Thus, ideally, the conversion gain of the power amplification devices is zero (0). Consequently, none of the ripple variation in the input signals is modulated onto a radio frequency (RF) signal being amplified by a power amplification device, in which case the ripple variation of the input signals would have no adverse effect on the performance of the power amplification device. However, in practice, while the ripple rejection of the power amplification devices may be large, the ripple rejection is not infinite, and thus, the conversion gain of the power amplification devices is typically greater than zero. Therefore, the ripple variation of the input signals is modulated onto a signal level of the RF signal being amplified as spurious emissions. Accordingly, to reduce the spurious emission in the RF signal, power amplification devices are needed that are capable of reducing modulation of a ripple variation of the input signals onto the RF signal.

SUMMARY

This disclosure relates generally to power amplification devices and methods of operating the same. The power amplification devices are capable of eliminating, or at least reducing, modulation of a ripple variation of a supply voltage level of a supply voltage onto a radio frequency (RF) signal. In one embodiment, a power amplification device includes a power amplification circuit configured to amplify an RF signal with a supply voltage such that a ripple variation in a supply voltage level of the supply voltage is modulated onto the RF signal in accordance with a conversion gain. However, the power amplification device also includes a plurality of ripple rejection circuits. The plurality of ripple rejection circuits is configured to produce phase shifts and one or more amplitude shifts in the RF signal so as to reduce the conversion gain of the power amplification circuit. In this manner, the power amplification device is capable of reducing (and possibly completely cancelling) modulation of a ripple variation of a supply voltage.

DETAILED DESCRIPTION

This disclosure relates generally to systems and methods for providing amplification to radio frequency (RF) signals. More specifically, embodiments of power amplification devices and methods of operating the same are disclosed that provide amplification to RF signals using a supply voltage. In addition, the power amplification devices and methods disclosed are capable of eliminating or at least reducing modulation of a ripple variation in a supply voltage level of the supply voltage onto the RF signal. As such, the power amplification devices and methods described herein can provide amplification of RF signals while reducing the spurious emissions in the RF signal that may result from amplification.

FIG. 1is a block diagram of one embodiment of a power amplification device10capable of reducing and/or eliminating spurious emissions. The power amplification device10includes a power amplification circuit12and a plurality of ripple rejection circuits (referred to generically as elements14, and specifically as elements14A,14B,14C, and14D).

The power amplification circuit12has both an amplification gain and a conversion gain. More specifically, the power amplification circuit12is configured to amplify an RF signal16with a supply voltage18. The supply voltage18thereby powers amplification of the RF signal16where the amplification gain of the power amplification circuit12is simply a measure of an RF signal level of the RF signal16at an input of the power amplification circuit12, versus the RF signal level of the RF signal16at an output. In this embodiment, the amplification gain of the power amplification circuit12is based on a supply voltage level V1of the supply voltage18. The power amplification circuit12includes a supply voltage input terminus20for receiving the supply voltage18.

The supply voltage level V1of the supply voltage18may have a ripple variation. For example, the ripple variation in the supply voltage level V1of the supply voltage18may result in the supply voltage level V1of the supply voltage18oscillating about an average DC value of the supply voltage level V1. This ripple variation in the supply voltage level V1may thus cause a variation in the amplification gain based on the ripple variation in the supply voltage level V1. As a result, the ripple variation in the supply voltage level V1in the supply voltage18is modulated onto the RF signal16. The conversion gain of the power amplification circuit12is thus simply a measure of a magnitude of the ripple variation modulated onto the RF signal16at an output versus a magnitude of the ripple variation in the supply voltage level V1of the supply voltage18at an input (e.g., the supply voltage input terminus20). Thus, the power amplification circuit12is configured to amplify the RF signal16with the supply voltage18such that the ripple variation in the supply voltage level V1of the supply voltage18is modulated onto the RF signal16in accordance with the conversion gain of the power amplification circuit12.

The ripple variation in the supply voltage level V1of the supply voltage18may be the result of various electrical conditions and/or components. For example, the ripple variation in the supply voltage level V1of the supply voltage18may be generated by an RF power converter using a switching topology. RF power converters that use switching topologies naturally generate the supply voltage18where the supply voltage level V1oscillates in accordance with a ripple variation. Alternatively, the supply voltage18may be generated by the RF power converter using a voltage regulation circuit, such as a low drop-out voltage regulation circuit. While ideally, voltage regulation circuits generate the supply voltage18so that the supply voltage level V1does not have a ripple variation, in practice, the voltage regulation circuit does generate the supply voltage18with the supply voltage level V1having a ripple variation. This ripple variation of the supply voltage level V1may be due to various factors, such as the response feed of the voltage regulation circuit, power source voltage fluctuations, temperature fluctuations, and/or the like. Furthermore, the ripple variation in the supply voltage level V1of the supply voltage18may be the result of either impedance mismatches or chaotic idiosyncrasies of the electrical components being utilized to generate the supply voltage18and/or of the power amplification device10.

The power amplification device10further includes an RF input terminus22for exogenously receiving the RF signal16and an RF output terminus24for exogenously transmitting the RF signal16to upstream RF circuitry (not shown) once the RF signal16has been amplified by the power amplification circuit12. In this example, the power amplification circuit12further includes amplification circuit input termini (referred to generically as elements26, and specifically as elements26A,26B,26C, and26D). In this embodiment, the amplification circuit input termini26are a plurality of input terminals other than the supply voltage input terminus20for receiving the supply voltage18. Thus, the amplification circuit input termini26do not include the supply voltage input terminus20.

In the embodiment shown inFIG. 1, each of the ripple rejection circuits14A,14B,14C, and14D is coupled to one of the amplification circuit input termini26A,26B,26C, and26D, respectively. Thus, the plurality of ripple rejection circuits14is coupled so as to correspond injectively with the plurality of amplification circuit input termini26. Note also that in this particular embodiment, the ripple rejection circuits14are also coupled to correspond surjectively with the plurality of amplification circuit input termini26. As explained in further detail below, in other embodiments, the ripple rejection circuits14may not correspond surjectively with the amplification circuit input termini26. However, with regard to the embodiment of the power amplification device10shown inFIG. 1, there is both injective and surjective correspondence between the plurality of ripple rejection circuits14and the amplification circuit input termini26. As such, the plurality of ripple rejection circuits14ofFIG. 1is coupled so that the amplification circuit input termini26correspond bijectively to the plurality of amplification circuit input termini26.

Note that in this embodiment, the ripple rejection circuit14D is coupled between the RF input terminus22and the amplifier circuit input terminus26D. The power amplification circuit12thus receives the RF signal16as an input signal at the amplifier circuit input terminus26D. However, as shall be explained in further detail below, in other embodiments, the power amplification circuit12may not include a separate amplification circuit input terminus26, such as the amplifier circuit input terminus26D, in order to receive the RF signal16. Instead, the RF input terminus22may also be an amplification circuit input terminus26of the power amplification circuit12. Furthermore, with regard to the term “terminus,” terminus refers to any component or set of components configured to input and/or output a signal. For example, inFIG. 1, the power amplification device10is illustrated as receiving the RF signal16as a single-ended signal at the RF input terminus22. Thus, the RF input terminus22shown inFIG. 1may be provided by a single terminal. However, in other embodiments, the RF signal16may be received as a differential signal. In this embodiment, the RF input terminus22would be provided as a pair of terminals configured to receive and/or transmit differential signals. Also, note that termini may be provided by terminals, combinations of terminals, nodes, combinations of nodes, ports, combinations of ports, contacts, combinations of contacts, pads, combinations of pads, combinations of the aforementioned types of termini, and/or the like.

Referring again toFIG. 1, the higher the conversion gain of the power amplification circuit12, the more noise is introduced into the RF signal16by the ripple variation in the supply voltage level V1of the supply voltage18. In contrast, the spurious emissions caused by the ripple variation in the supply voltage level V1of the supply voltage18are reduced more and more the lower the conversion gain of the power amplification circuit12. Accordingly, the plurality of ripple rejection circuits14is configured to produce phase shifts and one or more amplitude shifts in the RF signal16so as to reduce the conversion gain of the power amplification circuit12. At least two phase shifts are provided by the plurality of ripple rejection circuits14and at least one amplitude shift is provided by the plurality of ripple rejection circuits14.

In the embodiment shown inFIG. 1, the ripple rejection circuit14A is coupled to the amplification circuit input terminus26A and is configured to produce a first amplitude shift and a first phase shift in the RF signal16. The ripple rejection circuit14B is coupled to the amplification circuit input terminus26B and is configured to produce a second amplitude shift and a second phase shift in the RF signal16. The ripple rejection circuit14C is coupled to the amplification circuit input terminus26C and is configured to produce a third amplitude shift and a third phase shift in the RF signal16. The ripple rejection circuit14D is coupled to the amplification circuit input terminus26D and is configured to produce a fourth phase shift in the RF signal16, but not another amplitude shift. Each of the amplitude shifts (e.g., the first amplitude shift, the second amplitude shift, and the third amplitude shift) and each of the phase shifts (e.g., the first phase shift, the second phase shift, the third phase shift, and the fourth phase shift) is based on the supply voltage level V1of the supply voltage18and is proportioned so as to reduce the conversion gain of the power amplification circuit12.

For example, the ripple rejection circuit14A may be a ripple correction circuit, the ripple rejection circuit14B may be another ripple correction circuit, and the ripple rejection circuit14C may be yet another ripple correction circuit. The ripple rejection circuit14D may be a phase modulator. Each of the amplification circuit input termini26A,26B, and26C is operable to receive one of a plurality of input signals (referred to generically as element28, and specifically as elements28A,28B, and28C). More specifically, the amplification circuit input terminus26A is operable to receive the input signal28A. The amplification circuit input terminus26B is operable to receive the input signal28B. Finally, the amplification circuit input terminus26C is operable to receive the input signal28C.

Each of the ripple rejection circuits14A,14B,14C is configured to generate one of a plurality of ripple correction signals (referred to generically as elements30, and specifically as elements30A,30B,30C). More specifically, the ripple rejection circuit14A generates the ripple correction signal30A based on the supply voltage level V1of the supply voltage18. The ripple rejection circuit14A is coupled to the amplification circuit input terminus26A so as to apply the ripple correction signal30A to the input signal28A. The input signal28A is then received at the amplification circuit input terminus26A once the ripple correction signal30A has been applied to the input signal28A. By applying the ripple correction signal30A to the input signal28A, the ripple rejection circuit14A produces the first amplitude shift and the first phase shift in the RF signal16.

The ripple rejection circuit14B generates the ripple correction signal30B based on the supply voltage level V1of the supply voltage18. The ripple rejection circuit14B is coupled to the amplification circuit input terminus26B so as to apply the ripple correction signal30B to the input signal28B. The input signal28B is then received at the amplification circuit input terminus26B once the ripple correction signal30B has been applied to the input signal28B. By applying the ripple correction signal30B to the input signal28B, the ripple rejection circuit14B produces the second amplitude shift and the second phase shift in the RF signal16.

The ripple rejection circuit14C generates the ripple correction signal30C based on the supply voltage level V1of the supply voltage18. The ripple rejection circuit14C is coupled to the amplification circuit input terminus26C so as to apply the ripple correction signal30C to the input signal28C. The input signal28C is then received at the amplification circuit input terminus26C once the ripple correction signal30C has been applied to the input signal28C. By applying the ripple correction signal30C to the input signal28C, the ripple rejection circuit14C produces the third amplitude shift and the third phase shift in the RF signal16.

The amplifier circuit input terminus26D is configured to receive the RF signal16as an input signal. As mentioned above, the ripple rejection circuit14D may be a phase modulator coupled to the amplifier circuit input terminus26D. More specifically, the ripple rejection circuit14D is coupled between the RF input terminus22and the amplifier circuit input terminus26D, and thus is operable to receive the RF signal16from the RF input terminus22. The ripple rejection circuit14D then produces a phase shift in the RF signal16based on the supply voltage level V1of the supply voltage18. The RF signal16is then received at the amplifier circuit input terminus26D once the ripple rejection circuit14D has applied the fourth phase shift.

The ripple rejection circuits14produce the phase shifts (e.g., the first phase shift, the second phase shift, the third phase shift, and the fourth phase shift) and the amplitude shifts (e.g., the first amplitude shift, the second amplitude shift, and the third amplitude shift) by adjusting a transfer response of the power amplification device10from the RF input terminus22to the RF output terminus24. More specifically, the power amplification device10has a transfer response from the RF input terminus22to the RF output terminus24. The transfer response has an amplitude response and a phase response. As such, an amplitude of the RF signal16received at the RF input terminus22is adjusted by the amplitude response when the RF signal16is transmitted from the RF output terminus24. Similarly, a phase of the RF signal16is adjusted in accordance with the phase response when the RF signal16is transmitted from the RF output terminus24. The plurality of ripple rejection circuits14is configured to produce the phase shifts (e.g., the first phase shift, the second phase shift, the third phase shift, and the fourth phase shift) in the phase response of the transfer response and thereby in the RF signal16. Similarly, the ripple rejection circuits14are configured to produce the amplitude shifts (e.g., the first amplitude shift, the second amplitude shift, and the third amplitude shift) in the amplitude response of the transfer response and thereby in the RF signal16. In other words, the ripple rejection circuit14A produces the first amplitude shift in the amplitude response and the first phase shift in the phase shift response by applying the ripple correction signal30A to the input signal28A. The ripple rejection circuit14B produces the second amplitude shift in the amplitude response and the second phase shift in the phase response by applying the ripple correction signal30B to the input signal28B. The ripple rejection circuit14C produces the third amplitude shift in the amplitude response and the third phase shift in the phase shift response by applying the ripple correction signal30C to the input signal28C. The ripple rejection circuit14D produces the fourth phase shift in the phase response of the transfer response.

The plurality of ripple rejection circuits14is configured to produce phase shifts (e.g., the first phase shift, the second phase shift, the third phase shift, and the fourth phase shift) and amplitude shifts (e.g., the first amplitude shift, the second amplitude shift, and the third amplitude shift) in the RF signal16, and more specifically in the transfer response of the power amplification device10from the RF input terminus22to the RF output terminus24, so as to reduce the conversion gain of the power amplification circuit12such that the conversion gain of the power amplification circuit12is substantially eliminated. In other words, as a result of the conversion gain of the power amplification circuit12being substantially eliminated, the modulation of the ripple variation in the supply voltage level V1of the supply voltage18onto the RF signal16is substantially rejected. Whether the conversion gain of the power amplification circuit12is eliminated may depend on performance parameters, the RF application being implemented, and/or the sensitivity of electronic components being utilized in the RF application. Some or all of these considerations may be taken into account when determining whether the conversion gain is sufficiently close to zero such that it can be considered to have been substantially eliminated.

In this embodiment, the power amplification circuit12may include a plurality of amplifier stages. These amplifier stages may be cascaded. For example, the supply voltage input terminus20may be coupled to a final amplifier stage where the supply voltage18provides the power for amplification by the final amplifier stage. Also, the amplification circuit input termini26A,26B may also be the supply voltage input termini20where an input signal I1is a supply voltage that provides power to a driver amplifier stage and an input signal I2is another supply voltage that provides power to a different driver amplifier stage. In contrast, the amplification circuit input terminus26C may be a bias input terminus and the input signal28C may be a bias voltage. Accordingly, a signal level of the input signal28A may be represented by a voltage level VA, a signal level of the input signal28B may be represented by a voltage level VB, and a signal level of the input signal28C may be represented by a voltage level VC. The ripple correction signal30A has a signal level RCA, the ripple correction signal30B has a signal level RCB, and the ripple correction signal30C has a signal level RCC, wherein in this example, the signal level RCA, the signal level RCB, and the signal level RCC are each voltage levels.

The ripple rejection circuit14A is configured to generate the ripple correction signal30A such that:
RCA≅KA×V1, where KAis a scaling parameter.

The ripple rejection circuit14B is configured to generate the ripple correction signal30B such that:
RCB≅KB×V1, where KBis a scaling parameter KB.

The ripple rejection circuit14C is configured to generate the ripple correction signal30C such that:
RCC≅KC×V1, where KCis a scaling parameter KC.

Representing the fourth phase shift provided by the ripple rejection circuit14D as PD, the ripple rejection circuit14D is configured to produce the phase shift PD such that:
PD≅KD×V1, where KDis a scaling parameter KD.

The values of the scaling parameters KA, KB, Kc, and KDare selected such that equations

KA⁢∂AO∂VA+KB⁢∂AO∂VB+KC⁢∂AO∂VC+∂AO∂V⁢⁢1≅0⁢⁢andKA⁢∂PO∂VA+KB⁢∂PO∂VB+KC⁢∂PO∂VC+KD⁢∂PO∂VD+∂PO∂V⁢⁢1≅0
are satisfied. In the above equations, AO is an amplitude of the RF signal16at the RF output terminus24, while PO is a phase of the RF signal16at the RF output terminus24. Note that based on the above equations, the scaling parameters KA, KB, Kc, and KDare selected such that:

With respect to the ripple correction signal30A with the signal level RCA, the ripple correction signal30B with the signal level RCB, the ripple correction signal30C with the signal level RCC, and the fourth phase shift with the phase shift value PD, changes in the amplitude and phase of the RF signal16at the RF output terminus24counteract the changes in amplitude and phase resulting from the ripple variation in the supply voltage level V1. As a result, changes in the supply voltage level V1of the supply voltage18are cancelled by the first phase shift, the second phase shift, the third phase shift, and the fourth phase shift, and by the first amplitude shift, the second amplitude shift, and the third amplitude shift. As such, the ripple rejection circuits14are configured to produce the phase shifts (e.g., the first phase shift, the second phase shift, the third phase shift, and the fourth phase shift) and the amplitude shifts (e.g., the first amplitude shift, the second amplitude shift, and the third amplitude shift) such that the gain conversion of the power amplification circuit12is substantially eliminated.

Referring now toFIG. 2,FIG. 2illustrates one embodiment of a power amplification device10(1). The power amplification device10(1) is one embodiment of the power amplification device10shown inFIG. 1. In this embodiment, the power amplification device10(1) includes a power amplification circuit12(1), which is an embodiment of the power amplification circuit12shown inFIG. 1. The power amplification circuit12(1) includes a plurality of amplifier stages (e.g., an initial amplifier stage32and a final amplifier stage34) coupled in cascade. The amplifier stages32,34therefore provide amplification to the RF signal16in sequence.

The power amplification circuit12(1) shown inFIG. 2has the initial amplifier stage32and the final amplifier stage34. However, other embodiments of the power amplification circuit12(1) may include any number of amplifier stages (such as the initial amplifier stage32and the final amplifier stage34) greater than or equal to two (2). The initial amplifier stage32is the amplifier stage at a beginning of the sequence for amplification by the power amplification circuit12(1). The final amplifier stage34is the amplifier stage at an end of the sequence for amplification by the power amplification circuit12(1). Since at least two amplifier stages are needed to provide cascaded amplifier stages, the power amplification circuit12(1) includes at least the initial amplifier stage32and the final amplifier stage34. However, the number of amplifier stages may be any integer greater than or equal to one (1). As such, there may be any number (greater than or equal to one (1)) of amplifier stages, as will be explained in further detail below.

Since the initial amplifier stage32and the final amplifier stage34are coupled in cascade, the amplifier stages32,34provide amplification to the RF signal16in sequence. Accordingly, the initial amplifier stage32initially provides amplification to the RF signal16in accordance with an initial amplification gain Ginitial. Once the RF signal16is amplified by the initial amplifier stage32, the final amplifier stage34amplifies the RF signal16in accordance with a final amplification gain Gfinal. As such, the amplification gain of the power amplification circuit12(1) may be approximately equal to Ginitial*Gfinal. As explained in further detail below, if an intermediate amplifier stage were coupled between the initial amplifier stage32and the final amplifier stage34, then the amplification gain for this amplification stage would also be multiplied by the initial amplification gain Ginitial and the final amplification gain Gfinal to obtain the amplification gain of the power amplification circuit12(1) as a whole. To amplify the RF signal16, the initial amplifier stage32receives the RF signal16at an amplifier input terminus36. The amplifier input terminus36is an exemplary embodiment of the amplifier circuit input terminus26D described above with respect toFIG. 1. The initial amplifier stage32amplifies the RF signal16in accordance with the initial amplification gain Ginitial, and then transmits the RF signal16to the final amplifier stage34. The final amplifier stage34then receives the RF signal16and amplifies the RF signal16in accordance with the final amplification gain Gfinal. Once the final amplifier stage34has provided amplification to the RF signal16, the final amplifier stage34transmits the RF signal16from the RF output terminus24to downstream RF circuitry (not shown).

To provide power for amplification, the initial amplifier stage32receives a supply voltage38at a supply voltage input terminus40. Accordingly, the supply voltage38is an example of the input signal28A shown inFIG. 1and the supply voltage input terminus40is an example of the amplification circuit input terminus26A shown inFIG. 1. The power provided by the supply voltage38is then transferred to the RF signal16by the initial amplifier stage32. As such, the supply voltage38has a supply voltage level VS. The initial amplifier stage32is configured to set the initial amplification gain Ginitial of the initial amplifier stage32in accordance with the supply voltage level VS of the supply voltage38. The final amplifier stage34then receives the RF signal16after amplification by the initial amplifier stage32. To provide power for amplification, the final amplifier stage34receives the supply voltage18from the supply voltage input terminus20. The power provided by the supply voltage18is then transferred to the RF signal16. Accordingly, the supply voltage level V1of the supply voltage18sets the final amplification gain Gfinal of the final amplifier stage34.

Note that as the RF signal16progresses through the sequence of amplifier stages32,34, each of the amplifier stages32,34handles an increasing amount of power. Therefore, the initial amplifier stage32handles the least amount of power, since it receives the RF signal16at the amplifier input terminus36prior to amplification and transmits the RF signal16amplified only in accordance with the initial amplification gain Ginitial. When the final amplifier stage34receives the RF signal16, the RF signal16has already been amplified by the initial amplification gain Ginitial. The final amplifier stage34further amplifies the RF signal16in accordance with the final amplification gain Gfinal. Thus, the final amplifier stage34is operable to transmit the RF signal16amplified in accordance with the amplification gain Ginitial*Gfinal. Often, the initial amplifier stage32and any intermediate amplifier stages (not shown) that are prior to the final amplifier stage34are classified as “driver amplifier stages.” Each of the amplifier stages32,34may include a transistor or a network of transistors to provide amplification. However, since the final amplifier stage34handles the most power, some embodiments of the final amplifier stage34may include arrays of transistors or stacks of transistors in order to handle the power level seen by the final amplifier stage34.

The power amplification device10(1) has a plurality of ripple rejection circuits. In this example, the ripple rejection circuits are the phase modulator42and the ripple correction circuit44. As mentioned above, the plurality of ripple rejection circuits is configured to produce at least two phase shifts and one amplitude shift in order to reduce the conversion gain of the power amplification circuit12(1).

The phase modulator42is an embodiment of the ripple rejection circuit14D shown inFIG. 1and generates a phase shift PS1having a phase shift value of PSA1. The phase modulator42is coupled between the RF input terminus22and the amplifier input terminus36. This phase modulator42is configured to produce the phase shift PS1having the phase shift value PSA1in the RF signal16such that relative to the RF input terminus22the RF signal16is received at the amplifier input terminus36with the phase shift PS1having the phase shift value PSA1. The phase shift PS1is based on the supply voltage level V1of the supply voltage18. More specifically, the phase modulator42is operable to receive a feedback signal45having a feedback signal level that is indicative of the signal level of the RF signal16at the RF output terminus24. The phase modulator42produces the phase shift PS1in the RF signal16such that:
PSA1≅K1×V1 where K1is a scaling parameter K1.

The power amplification circuit12(1) is configured to receive a bias voltage46at a bias input terminus48. Thus, the bias voltage46is an embodiment of the input signal28C shown inFIG. 1, and the bias input terminus48is an example of the amplification circuit input terminus26C shown inFIG. 1. The bias voltage46is received by the power amplification circuit12(1) at the bias input terminus48, wherein the bias voltage46has a bias voltage level that sets the operating point of both the initial amplifier stage32and the final amplifier stage34at their inputs.

Referring again toFIG. 2, the ripple correction circuit44is configured to generate a ripple correction signal50and apply the ripple correction signal50to the bias voltage46prior to the bias voltage46being received at the bias input terminus48. The ripple correction circuit44is thus an embodiment of the ripple rejection circuit14C shown inFIG. 1, and the ripple correction signal50is an embodiment of the ripple correction signal30C shown inFIG. 1. The ripple correction signal50has a ripple correction voltage level RC that is based on the supply voltage level V1of the supply voltage18. More specifically, the ripple correction circuit44is coupled to receive a feedback signal52having a feedback signal level that indicates the signal level of the RF signal16at the RF output terminus24. Using the feedback signal52, the ripple correction circuit44generates the ripple correction signal50such that:
RC≅K2×V1, where K2is a scaling parameter K2.

Thus, by applying the ripple correction signal50to the bias voltage46before the bias voltage46is provided at the bias input terminus48, the ripple correction circuit44produces an amplitude shift AS having an amplitude shift level AS1and another phase shift PS2having a phase shift value PSVS. The scaling parameters K1and K2are provided such that the conversion gain of the power amplification circuit12(1) is substantially eliminated such that the ripple variation in the supply voltage level V1of the supply voltage18is substantially rejected.

Referring now toFIGS. 2 and 3,FIG. 3illustrates one embodiment of an output spectrum54of the power amplification device10(1) as a function of frequency when both the phase modulator42and the ripple correction circuit44shown inFIG. 2are deactivated. For the sake of clarity, the output spectrum54is centered about a carrier frequency of the RF signal16, and thus the frequencies shown in the graph ofFIG. 3are relative frequency distances from the carrier frequency. As shown inFIG. 3, when the phase modulator42and the ripple correction circuit44are deactivated, the ripple variation in the supply voltage18is modulated onto the RF signal16, and thus creates a low side band56and a high side band58in the output spectrum54. In this example, it is assumed that the ripple variation of the supply voltage level V1has a 10 millivolt (mV) peak magnitude. The output spectrum54has a maximum spectrum magnitude59at a carrier frequency C. The low side band56and the high side band58are each approximately 3.14 MHz from the carrier frequency C. The output spectrum54shows that the conversion gain of the power amplification circuit12(1) is provided so that a peak L of the low side band56and a peak H of the high side band58are each about 57.7 dB below the maximum magnitude of the output spectrum54at the carrier frequency c.

Referring now toFIGS. 2 and 4,FIG. 4illustrates a transfer response of the power amplification device10(1) from the RF input terminus22to the RF output terminus24. More specifically, the transfer response of the power amplification device10(1) is represented using an S21parameter, which is one way of representing the transfer function of the power amplification device10(1) from the RF input terminus22to the RF output terminus24. As such, with regard to the S21parameter shown inFIG. 4, port1for the S21parameter is assumed to be the RF input terminus22and port2for the S21parameter is assumed to be the RF output terminus24. The S21parameter of the power amplification device10(1) is illustrated inFIG. 4as an amplitude response60and a phase response62, where the amplitude response60and the phase response62are shown varying in time.

As shown inFIG. 4, the ripple variation in the supply voltage18causes little to no variation in the phase response62and the phase shift value of the S21response remains relatively steady. However, the ripple variation in the supply voltage level V1of the supply voltage18results in a large variation in a magnitude level of the amplitude response60as a function of time. As such, when the phase modulator42and the ripple correction circuit44are deactivated, the ripple variation in the supply voltage level V1of the supply voltage18causes the amplitude response60(i.e., the amplification gain) of the power amplification circuit12(1) (and in particular, the final amplifier stage34) to vary, which modulates the RF signal16with the ripple variation in accordance with the amplitude response60.

Referring now toFIGS. 2 and 5,FIG. 5illustrates one embodiment of the supply voltage18and an output power64of the RF signal16as a function of time. As shown inFIG. 5, the supply voltage level V1of the supply voltage18has an average supply voltage level AVG. In this embodiment, the average supply voltage level AVG is around 3.1 mV and remains relatively DC. The supply voltage level V1has a ripple variation that varies about the average supply voltage level AVG by up to 10 mV. As expected when the ripple correction circuit44and the phase modulator42are deactivated, the output power64of the RF signal16varies in accordance with the ripple variation of the supply voltage level V1in accordance with the conversion gain of the power amplification circuit12(1).

Referring toFIGS. 2 and 6,FIG. 6is a graph illustrating the output spectrum54of the power amplification circuit12(1) when the ripple correction circuit44is activated but the phase modulator42is deactivated. By applying the ripple correction signal50to the bias voltage46, the ripple correction circuit44produces the amplitude shift AS and the phase shift PS2. Since the phase modulator42is deactivated, the phase shift PS1is not being produced by the phase modulator42. As can be seen fromFIG. 6, the conversion gain of the power amplification circuit12(1) has actually been worsened when the phase modulator42is deactivated and only the ripple correction circuit44is activated. Instead of reducing the low side band56and the high side band58, the ripple correction circuit44has increased the peak L of the low side band56and the peak H of the high side band58by approximately 9 dB.

Referring now toFIGS. 2 and 7,FIG. 7is another graph of the transfer response of the power amplification device10(1) from the RF input terminus22to the RF output terminus24when the phase modulator42is deactivated and the ripple correction circuit44is activated. The reason for the worsening in the conversion gain is easy to see from the S21parameter described inFIG. 7as a function of time. As shown inFIG. 7, the phase response62provided as a result of applying the ripple correction signal50to the bias voltage46has essentially eliminated the variation of the amplitude response60(compareFIG. 7toFIG. 3). However, applying the ripple correction signal50also produces the phase shift PS2having the phase shift value PSVS. As a result, when the phase modulator42is deactivated, the phase response62is shifted by the phase shift value PSVS of the phase shift PS2, which is produced by the ripple correction signal50. As shown inFIG. 7, in this case, the phase response62has a phase value that varies peak to peak by about 0.84 degrees. As a result, the conversion gain of the power amplification circuit12(1) actually increases, rather than decreasing, as demonstrated by the output spectrum54shown inFIG. 6.

Referring now toFIGS. 2 and 8,FIG. 8illustrates one embodiment of the supply voltage level V1and the output power64of the RF signal16as a function of time. The average supply voltage level AVG of the supply voltage level V1of the supply voltage18is also shown.FIG. 8illustrates that when the ripple correction circuit44is on and the phase modulator42is deactivated, the ripple correction circuit44substantially cancels the ripple variation in the amplitude of the RF signal16(as shown by the output power64). However, instead of reducing the conversion gain, the phase shift PS2resulting from the ripple correction signal50results in the phase shift PS2being applied to the RF signal16, and thus the phase of the RF signal16varies in accordance with the ripple variation in the supply voltage level V1of the supply voltage18.

Referring now toFIGS. 2 and 9,FIG. 9is a graph of the output spectrum54of the power amplification device10(1) when the ripple correction circuit44and the phase modulator42are activated. As shown inFIG. 9, the peak L of the low side band56and the peak H of the high side band58are now more than 110 dB below the maximum spectrum magnitude59at the carrier frequency. As such, when both the phase modulator42and the ripple correction circuit44are activated, the phase shift PS1produced by the phase modulator42and the amplitude shift AS with the phase shift PS2produced by applying the ripple correction signal50to the bias voltage46substantially cancel the conversion gain of the power amplification circuit12(1).

Referring now toFIGS. 2 and 10,FIG. 10illustrates one embodiment of the transfer response of the power amplification device10(1) when both the phase modulator42and the ripple correction circuit44are activated. In particular, the graph inFIG. 10is of the S21response and illustrates the amplitude response60and the phase response62when both the phase modulator42and the ripple correction circuit44are activated. As shown inFIG. 10, by applying the ripple correction signal50to the bias voltage46, the ripple correction circuit44produces the phase shift PS1, which results in the cancellation of the ripple variation in the magnitude of the amplitude response60(shown inFIG. 10). The scaled parameter K2is thus selected so that a magnitude of the amplitude response60is substantially eliminated by the amplitude shift AS generated by the ripple correction signal50of the ripple correction circuit44. However, as described above, the application of the ripple correction signal50results in the phase shift PS2having the phase shift value PSVS that results in the phase value of the phase response62varying in accordance with the ripple variation of the supply voltage level V1. As shown inFIG. 10, when the phase modulator42is activated, the phase shift PS1produced by the phase modulator42substantially cancels the ripple variation in the phase value of the phase response62. In other words, in this example, the scaling parameter K1for the phase shift value PSA1is set so that the phase shift PS1cancels, or is substantially opposite to, the phase shift PS2resulting from the application of the ripple correction signal50.

Referring now toFIGS. 2 and 11,FIG. 11illustrates one embodiment of the supply voltage18and the output power of the RF signal16as a function of time when both the phase modulator42and the ripple correction circuit44are activated simultaneously. The output power64of the RF signal16is shown to be exactly the same as the output power64of the RF signal16inFIG. 8, thereby reflecting that the ripple correction circuit44produces the amplitude shift AS such that the ripple variation of the supply voltage level V1is substantially eliminated from the amplitude response60(shown inFIG. 10). However, as shown inFIG. 9, the modulation of the ripple variation in the phase response62(shown inFIG. 10) as a result of the phase shift PS2(which was produced as a result of the ripple correction signal50) is substantially eliminated by the phase shift PS1provided by the phase modulator42, and thus the conversion gain of the power amplification circuit12(1) is substantially eliminated. In other words, the ripple variation in the supply voltage level V1of the supply voltage18is substantially rejected.

Referring now toFIG. 12,FIG. 12is a circuit diagram of an exemplary embodiment of the power amplification device10(1). Thus, the power amplification device10(1) shown inFIG. 12operates in the same manner as described above inFIGS. 2-11. However, the exemplary embodiment of the power amplification device10(1) shown inFIG. 12further includes an RF power converter66and bias circuitry68. The RF power converter66has a power source terminus70. In this manner, the RF power converter66is operable to receive a power source voltage72. For example, the power source voltage72may be received at the RF power converter66from a battery, an AC-to-DC converter, and/or the like. The RF power converter66is configured to generate the supply voltage18from the power source voltage72, and is also configured to generate the supply voltage38from the power source voltage72. As such, the RF power converter66may include one or more switching converters, voltage regulation circuits, and/or the like that are configured to generate the supply voltages18,38from the power source voltage72. The RF power converter66is coupled to the supply voltage input terminus40and the supply voltage input terminus20in order to provide the supply voltage38and the supply voltage18, respectively, to the power amplification circuit12(1).

As shown inFIG. 12, the initial amplifier stage32includes a transistor TX, which in this example is a bipolar junction transistor (BJT). The transistor TX includes a base BX, a collector CX, and an emitter EX. The collector CX is coupled to the supply voltage input terminus40in order to receive the supply voltage38. The transistor TX has the initial amplification gain Ginitial, which is set in accordance with a supply voltage level of the supply voltage38. In this embodiment, the collector CX is coupled to the supply voltage input terminus40so that the supply voltage38powers amplification by the initial amplifier stage32. The base BX of the transistor TX is coupled to the amplifier input terminus36so that the transistor TX receives the RF signal16. The emitter EX of the transistor TX is coupled to ground in this example. The transistor TX is configured to amplify the RF signal16with the supply voltage38, which is then transmitted to the final amplifier stage34from the collector CX.

The final amplifier stage34also includes a transistor TZ, which is also a BJT. The transistor TZ includes a collector CZ, an emitter EZ, and a base BZ. The transistor TZ has the final amplification gain Gfinal, which is set in accordance with the supply voltage level V1of the supply voltage18. More specifically, the collector CZ of the transistor TZ is coupled to the supply voltage input terminus20in order to receive the supply voltage18from the RF power converter66. The emitter EZ of the transistor TZ is coupled to ground in this example. The base BZ of the transistor TZ is coupled to the collector CX of the transistor TX in order to receive the RF signal16after amplification by the transistor TX. The transistor TZ then amplifies the RF signal16with the supply voltage18. The collector CZ of the transistor TZ is coupled to the RF output terminus24. The transistor TZ transmits the RF signal16from the collector CZ to the RF output terminus24after the RF signal16has been amplified by the transistor TZ.

As shown inFIG. 12, the bias circuitry68is configured to generate the bias voltage46. The ripple correction circuit44is coupled between the bias input terminus48and the bias circuitry68so that the ripple correction signal50is applied to the bias voltage46before the bias voltage46is received at the bias input terminus48. Note that both the base BX of the transistor TX and the base BZ of the transistor TZ are coupled to the bias input terminus48. In this manner, the bias voltage46is applied at both the base BX and the base BZ to the RF signal16. Thus, the bias voltage46sets the quiescent operating voltage level for amplification of the RF signal16by both the transistor TX and the transistor TZ.

One embodiment of the phase modulator42is shown inFIG. 12. The phase modulator42is coupled between the RF input terminus22and the amplifier input terminus36to apply the phase shift PS1to the RF signal16as described above. The phase modulator42is also coupled to the RF output terminus24in order to receive the feedback signal52in order to generate the phase shift PS1based on the supply voltage level V1. The phase modulator42is configured to have the scaling parameter K1, as described above.

One embodiment of the ripple correction circuit44is also shown inFIG. 12. The ripple correction circuit44includes an operational amplifier74, a DC voltage source76, and a feedback circuit78. The feedback circuit78is coupled to the RF output terminus24in order to receive the feedback signal52. The feedback circuit78is configured to attenuate the feedback signal level of the feedback signal52and then transmit the feedback signal52to an operational amplifier input terminal M1of the operational amplifier74. The DC voltage source76is configured to generate a DC voltage80having a DC voltage level DCL. The DC voltage80is received at an operational amplifier input terminal M2of the operational amplifier74. Note that the feedback signal level of the feedback signal52will vary in accordance with the supply voltage level V1of the supply voltage18. The DC voltage level DCL generated by the DC voltage80is indicative of the average supply voltage level AVG (seeFIGS. 5, 8, and 11) which the supply voltage18would have if there were no ripple variation in the supply voltage18. The operational amplifier74then generates the ripple correction signal50from an operational amplifier output terminal O1based on a voltage difference between the feedback voltage level at the operational amplifier input terminal M1and the DC voltage level DCL at the operational amplifier input terminal M2. More specifically, the ripple correction voltage level RC (see equation above) of the ripple correction signal50is generated by the operational amplifier74to produce the amplitude shift AS and the phase shift PS1as described above with regard toFIGS. 2-11.

The ripple correction circuit44shown inFIG. 12is configured such that a feedback resistance of the feedback circuit78sets a gain of the operational amplifier74. Given this feedback resistance, the expected feedback signal range of the feedback voltage level of the feedback signal52at the operational amplifier input terminal M1, the operational characteristics of the operational amplifier74, and other factors important to calibration, the feedback resistance of the feedback circuit78is set so that the scaling constant K2is provided at the appropriate value. Given the characteristics described above with regard toFIGS. 2-11, the optimum value of the scaling constant K1was found to be approximately equal to 42.62 and the optimum value of the scaling constant K2was found to be approximately −21.29. With the bias voltage level of the bias voltage being represented by VBS, the scaling parameters K1and K2have been provided to satisfy the following differential equations:

The value of the partial derivative of the phase of the RF signal16with respect to the supply voltage level V1is zero (0), as demonstrated by the discussion with respect toFIG. 4. The other partial derivatives in the equations above have been determined through circuit simulations assuming that the average supply voltage level AVG (seeFIGS. 5, 8, and 11) was approximately equal to 3.10 volts (V). To determine the values of the scaling constants K1and K2once the partial derivatives have been determined is simply a matter of solving the two simultaneous equations. Note that to determine the partial derivatives rather than circuit simulations, empirical observations may also be utilized. While the values of the scaling constants K1and K2were determined assuming that the average supply voltage level AVG was 3.10 V and was maintained substantially constant, in other embodiments, such as for envelope tracking, the average supply voltage level AVG may be changing over time. As such, the values of the scaling constants K1and K2would also have to change in order to meet the differential equations at the particular average supply voltage level AVG of the supply voltage18. In this case, the partial derivatives from the equations above may be determined at various values of the supply voltage level V1depending on the expected range of the supply voltage level V1. The corresponding values for the scaling constants K1and K2that would satisfy the equations above throughout the range of the supply voltage level V1would also be determined. In this case, a control circuit (not shown) may be provided to adjust the scaling constant K1of the phase modulator42accordingly, and the scaling constant K2of the ripple correction circuit44accordingly. With regard to the ripple correction circuit44shown inFIG. 2, the feedback resistance of the feedback circuit78may be variable, thus allowing the scaling constant K2to be adjusted when the average supply voltage level AVG is changed. Similarly, the DC supply voltage level DCL of the DC voltage80may likewise be adjustable by the control circuit so that it corresponds with the appropriate supply voltage level V1

FIG. 13illustrates another embodiment of a power amplification device10(2). The power amplification device10(2) is another embodiment of the power amplification device10shown inFIG. 1. The power amplification device10(2) includes the power amplification circuit12(1) described above with respect toFIG. 2and the ripple correction circuit44also described above with respect toFIG. 2. The ripple correction circuit44operates in the same manner as described above, except that the scaling parameter K2has been set to a different value for reasons described below. In this embodiment, the initial amplifier stage32is coupled to the RF input terminus22, and the RF input terminus22thus also serves as an amplifier input terminus. Thus, a separate amplifier input terminus36like the one shown inFIG. 2does not have to be provided. This embodiment of the power amplification device10(2) does not include the phase modulator42shown inFIG. 2. Rather, the power amplification device10(2) includes a ripple correction circuit82. As mentioned above, the ripple correction circuit44produces the phase shift PS2and the amplitude shift AS by applying the ripple correction signal50to the bias voltage46. In this embodiment, the ripple correction circuit82is configured to produce a phase shift PS3and an amplitude shift AS3on the RF signal16. The ripple correction circuit82is coupled to the supply voltage input terminus40and is thus one embodiment of the ripple rejection circuit14A illustrated inFIG. 1. The phase shift PS3and the amplitude AS3are produced by the ripple correction circuit82in combination with the amplitude shift AS and the phase shift PS2produced by the ripple correction circuit44to reduce, and in this case substantially eliminate, the conversion gain of the power amplification circuit12(1). To produce the phase shift PS3and the amplitude shift AS3, the ripple correction circuit82is configured to generate a ripple correction signal84based on the supply voltage level V1of the supply voltage18. The ripple correction circuit82is coupled to the supply voltage input terminus40such that the ripple correction signal84is applied to the supply voltage38before the supply voltage38is received by the supply voltage input terminus40and the initial amplifier stage32. The ripple correction signal84is thus an embodiment of the ripple correction signal30A and the supply voltage38is an embodiment of the input signal28A shown inFIG. 1.

Referring again toFIG. 13, the ripple correction circuit82produces the amplitude shift AS3and the phase shift PS3by applying the ripple correction signal84to the supply voltage38. The ripple correction circuit82is configured to generate the ripple correction signal84having a ripple correction voltage level RC3set such that:
RC3≅K3×V1, where K3is a scaling constant K3.

As shown by the equation above, the ripple correction voltage level RC3of the ripple correction signal84is based on the supply voltage level V1. To do this, the ripple correction circuit82may receive a feedback signal86having a feedback voltage level that is indicative of the supply voltage level V1of the supply voltage18. When the ripple correction circuit44generates the ripple correction signal50and the ripple correction circuit82generates the ripple correction signal84simultaneously, the modulation of the ripple variation in the supply voltage level V1of the supply voltage18onto the RF signal16is substantially rejected as a result of the conversion gain of the power amplification circuit12(1) being substantially eliminated. The particular values of the scaling parameters K2and K3are set to provide the phase shifts PS2, PS3and the amplitude shifts AS, AS3to substantially eliminate the conversion gain of the power amplification circuit12(1).

Referring now toFIGS. 13 and 14,FIG. 14illustrates one embodiment of transfer response of the power amplification device10(2) when the ripple correction circuit44is activated and the ripple correction circuit82is deactivated. In particular, the transfer response shown inFIG. 14is illustrated as an S21parameter of the power amplification device10(2) from the RF input terminus22to the RF output terminus24, and thus the transfer response has the amplitude response60and the phase response62. Note that when both the ripple correction circuit44and the ripple correction circuit82are deactivated, the transfer response is the same as the transfer response shown inFIG. 4when the phase modulator42and the ripple correction circuit44were deactivated. Thus, when both the ripple correction circuit44and the ripple correction circuit82shown inFIG. 13are deactivated, the output spectrum54is provided as shown inFIG. 3.

Also, note that the amplitude response60and the phase response62are different than the amplitude response60and the phase response62shown inFIG. 7. This is because the scaling parameter K2for the ripple correction circuit44is different inFIG. 14than inFIG. 7. In particular, the scaling parameter K2has been set to equal −13.372. The amplitude shift AS and the phase shift PS1are thus applied to the amplitude response60and the phase response62, respectively, such that the amplitude response60and the phase response62are provided as shown inFIG. 14.

Referring now toFIG. 13andFIG. 15,FIG. 15illustrates a graph of the transfer response (and in particular the S21response) of the power amplification device10(2) when the ripple correction circuit82is activated and the ripple correction circuit44is deactivated. Comparing the transfer response shown inFIG. 4for the power amplification device10(1) shown inFIG. 2with the transfer response shown inFIG. 15for the power amplification device10(2) shown inFIG. 13, the transfer response of the power amplification device10(1) and the power amplification device10(2) are the same if the ripple correction circuit44and the phase modulator42of the power amplification device10(1) shown inFIG. 2are deactivated and the ripple correction circuit44and the ripple correction circuit82of the power amplification device10(2) shown inFIG. 13are deactivated. In this embodiment,FIG. 15demonstrates that the amplitude shift AS3and the phase shift PS3adjust the amplitude response60and the phase response62such that the amplitude response60and the phase response62are provided as shown inFIG. 15. Again, the amplitude shift AS3and the phase shift PS3are produced by the ripple correction circuit82by applying the ripple correction signal84to the supply voltage38before the supply voltage38is received by the initial amplifier stage32. In this example, the scaling parameter K3is −5.35.

Referring now toFIGS. 13 and 16,FIG. 16illustrates one embodiment of the output spectrum54of the power amplification device10(2) when the ripple correction circuit44and the ripple correction circuit82are both activated. In comparison to the output spectrum54shown inFIG. 3, it can be seen that the ripple correction circuits44and82have substantially eliminated the conversion gain of the power amplification circuit12(1) shown inFIG. 14. In particular, the peak L of the low side band56and the peak H of the high side band58have been reduced so as to be almost 90 dB lower than the maximum spectrum magnitude59at the carrier frequency C.

Referring now toFIGS. 13 and 17,FIG. 17illustrates the transfer response of the power amplification device10(2) when both the ripple correction circuit44and the ripple correction circuit82are activated. As mentioned above, the ripple correction circuit44generates the phase shift PS2and the amplitude shift AS by applying the ripple correction signal50to the bias voltage46. In addition, the ripple correction circuit82produces the phase shift PS3and the amplitude shift AS3by applying the ripple correction signal84to the supply voltage38.

As can be seen fromFIG. 17, the amplitude shift AS resulting from the ripple correction signal50and the amplitude shift AS3resulting from the ripple correction signal84adjust the amplitude response60of the power amplification device10(2) so as to substantially eliminate the modulation of the ripple variation in the supply voltage level V1of the supply voltage18in the amplitude response60. In addition, the phase shift PS2produced by the ripple correction circuit44by applying the ripple correction signal50and the phase shift PS3produced by the ripple correction circuit82by applying the ripple correction signal84substantially eliminate the modulation of the ripple variation in the supply voltage level V1of the supply voltage18on the phase response62of the power amplification device10(2). Accordingly, the ripple correction circuit44and the ripple correction circuit82are configured to produce the phase shifts PS2, PS3and the amplitude shifts AS, AS3such that the conversion gain of the power amplification circuit12(1) is substantially eliminated and the modulation of the ripple variation in the supply voltage level V1of the supply voltage18onto the RF signal16is substantially rejected.

Referring now toFIGS. 13 and 18,FIG. 18illustrates one embodiment of the supply voltage18and the output power64of the RF signal16as functions of time when both the ripple correction circuit44and the ripple correction circuit82are activated. As shown inFIG. 18, the supply voltage level V1of the supply voltage18has a ripple variation of approximately 20 mV peak to peak, where the supply voltage level V1of the supply voltage18varies about the average supply voltage level AVG of approximately 3.10 V. As shown byFIG. 18, the amplitude shift AS and the amplitude shift AS3produced by the ripple correction circuits44,82have substantially eliminated the ripple variation in the magnitude (i.e., the signal level) of the RF signal16. This is demonstrated by the output power64of the RF signal16as shown inFIG. 18.

Referring now toFIGS. 13 and 19,FIG. 19illustrates one embodiment of the supply voltage18; the supply voltage38once the ripple correction signal84has been applied; and the bias voltage46once the ripple correction signal50has been applied. The supply voltage level of the supply voltage38is represented by VS, and the bias voltage level of the bias voltage46is represented by VBS (the supply voltage level of the supply voltage18is V1, as described throughout this disclosure). As shown inFIG. 19, the average supply voltage level of the supply voltage level V1and an average supply voltage level of the supply voltage level VS are both at the same average supply voltage level AVG, which in this example is approximately 3.1 V. An average bias voltage level of the bias voltage level VBS is a voltage level AVG2, which in this example is approximately 3.7 V. Since the ripple correction signal50has been applied to the bias voltage46, the bias voltage46varies in accordance with the ripple variation of the supply voltage level V1of the supply voltage18because the ripple correction signal50is based on the supply voltage18. Similarly, note that the supply voltage level VS of the supply voltage38also varies in accordance with the ripple variation in the supply voltage level V1of the supply voltage18because the ripple correction signal84is based on the supply voltage level V1of the supply voltage18. In this embodiment, both the supply voltage38and the bias voltage46are opposite in phase to the supply voltage18.

Referring now toFIG. 20,FIG. 20is a circuit diagram illustrating one exemplary embodiment of the power amplification device10(2) shown inFIG. 13. The power amplification device10(2) includes the power amplification circuit12(1) shown inFIG. 12. However, in this embodiment, the base BX of the transistor TX in the initial amplifier stage32is connected to the RF input terminus22of the power amplification device10(2). The power amplification device10(2) also includes the RF power converter66and the bias circuitry68described above with regard toFIG. 12. In addition, the power amplification device10(2) includes the same embodiment of the ripple correction circuit44described above with respect toFIG. 12.

The scaling parameters K2, K3were determined by solving:

In this embodiment, the ripple correction circuit44has been configured to provide the scaling constant K2at −13.372. The power amplification device10(2) further includes an embodiment of the ripple correction circuit82described above with respect toFIG. 13. The ripple correction circuit82is similar to the ripple correction circuit44shown inFIG. 1, except that the scaling constant K3is around −5.35.

The ripple correction circuit82includes an operational amplifier88, a DC voltage source90, and a feedback circuit92. The feedback circuit92is coupled to the supply voltage input terminus40(coupling is not explicitly shown) in order to receive the feedback signal86. The operational amplifier88has an operational amplifier input terminal N1coupled to the DC voltage source90and an operational amplifier input terminal N2connected to the feedback circuit92. The feedback circuit92is configured to attenuate the feedback signal level of the feedback signal86and then transmit the feedback signal86to the operational amplifier input terminal N2of the operational amplifier88. The DC voltage source90is configured to generate a DC voltage94having a DC voltage level DCR. The DC voltage94is received at the operational amplifier input terminal N1of the operational amplifier88. Note that the feedback signal level of the feedback signal86will vary in accordance with the supply voltage level VS of the supply voltage38. The DC voltage level DCR generated by the DC voltage94is indicative of the average supply voltage level which the supply voltage38would have if there were no ripple variation in the supply voltage38. The operational amplifier88then generates the ripple correction signal84from an operational amplifier output terminal O2based on a voltage difference between the feedback voltage level at the operational amplifier input terminal N2and the DC voltage level DCR at the operational amplifier input terminal N1. More specifically, the ripple correction voltage level RC3(see equation above) of the ripple correction signal84is generated by the operational amplifier88to produce the amplitude shift AS3and the phase shift PS3as described above with regard toFIGS. 17-19.

The ripple correction circuit82shown inFIG. 20is configured such that a feedback resistance of the feedback circuit92sets a gain of the operational amplifier88. Given this feedback resistance, the expected feedback signal range of the feedback voltage level of the feedback signal86at the operational amplifier input terminal N2, the operational characteristics of the operational amplifier88, and other factors important to calibration, the feedback resistance of the feedback circuit92is set so that the scaling constant K3is provided at the appropriate value. Given the characteristics described above with regard toFIGS. 17-19, the optimum value of the scaling constant K2was found to be approximately equal to −5.35 and the optimum value of the scaling constant K3was found to be approximately −13.372.

The partial derivatives of the amplitude of the RF signal16at the RF output terminus24and the partial derivatives of the phase of the RF signal16at the RF output terminus24are each determined with respect to the supply voltage level V1of the supply voltage18, the bias voltage level VBS of the bias voltage46, and the supply voltage level VS of the supply voltage38, since each of these is to vary in accordance with the supply voltage level V1of the supply voltage18, and thus in accordance with the ripple variation of the supply voltage level V1. Assuming that the average bias voltage level of the bias voltage46is set to AVG2, as shown inFIG. 19, and the average supply voltage levels V1, VS are set to AVG as shown inFIG. 19, the partial derivatives were determined to be as follows:

The values of the partial derivatives may be determined using circuit models of the power amplification device10(2) shown inFIG. 20. Furthermore, if the average supply voltage level V1of the supply voltage18, the average supply voltage level VS of the supply voltage38, and the average bias voltage level VBS of the bias voltage46are adjustable (for example, for envelope tracking), a control circuit with a lookup table and digital-to-analog converters (not shown) may be used to adjust a feedback resistance of the feedback circuit92, the DC supply voltage level DCL, the feedback resistance of the feedback circuit78, and the DC supply voltage level DCR to set the scaling parameters K2, K3based on the partial derivatives for those average voltage levels V1, VS, VBS.

FIG. 21is a circuit diagram illustrating another exemplary embodiment of a power amplification device10(3). The power amplification device10(3) includes a power amplification circuit12(2), the ripple correction circuit44, an amplitude and phase modulator96, and a supplementary ripple correction circuit98. In this embodiment, the power amplification circuit12(2) only includes an amplifier stage34′, which is similar to the final amplifier stage34described above with respect toFIG. 2. Thus, the power amplification circuit12(2) is a single stage amplifier.

The ripple correction circuit44operates in the same manner described above with respect toFIG. 2. However, in this embodiment, the amplitude and phase modulator96is provided instead of the phase modulator42shown inFIG. 2. It is presumed that the scaling parameter of the amplitude and phase modulator96is difficult to provide at a desired value. As such, the supplementary ripple correction circuit98is operably associated with the amplitude and phase modulator96. In this embodiment, the supplementary ripple correction circuit98has a scaling parameter that is easier to control. As such, the supplementary ripple correction circuit98is configured to receive the feedback signal45and generate a supplementary feedback signal100, which is a version of the feedback signal45scaled by the scaling parameter of the supplementary ripple correction circuit98. The amplitude and phase modulator96is configured to receive the supplementary feedback signal100. In this manner, the amplitude and phase modulator96provides a phase shift and an amplitude shift in accordance with a supplementary feedback signal level of the supplementary feedback signal100and the scaling parameter of the amplitude and phase modulator96. The combination of the scaling parameter of the amplitude and phase modulator96and the scaling parameter of the supplementary ripple correction circuit98provides an overall scaling parameter at the desired value. In this manner, the amplitude and phase modulator96, the supplementary ripple correction circuit98, and the ripple correction circuit44provide phase shifts and amplitude shifts that reduce a conversion gain of the power amplification circuit12(2).