Isolation device with half duplex channel

An isolation system and isolation device are disclosed. An illustrative isolation device is disclosed to include first circuitry having at least a first emitter and a first detector, second circuitry having at least a dual-purpose component, an isolation material configured to electrically isolate the first circuitry from the second circuitry, and switching circuitry adapted to connect the dual-purpose component to emit a first signal for detection by the first detector in a first configuration, and to receive a second signal from the first emitter in a second configuration.

FIELD OF THE DISCLOSURE

The present disclosure is generally directed toward electronic isolation and devices for accommodating the same.

BACKGROUND

There are many types of electrical systems that benefit from electrical isolation. Galvanic isolation is a principle of isolating functional sections of electrical systems to prevent current flow, meaning that no direct electrical conduction path is permitted between different functional sections. As one example, certain types of electronic equipment require that high-voltage components (e.g., 1 kV or greater) interface with low-voltage components (e.g., 10V or lower). Examples of such equipment include medical devices and industrial machines that utilize high-voltage in some parts of the system, but have low-voltage control electronics elsewhere within the system. The interface of the high-voltage and low-voltage sides of the system relies upon the transfer of data via some mechanism other than electrical current.

Other types of electrical systems such as signal and power transmission lines can be subjected to voltage surges by lightning, electrostatic discharge, radio frequency transmissions, switching pulses (spikes), and perturbations in power supply. These types of systems can also benefit from electrical isolation.

Electrical isolation can be achieved with a number of different types of devices. Some examples of isolation products include galvanic isolators, opto-couplers, inductive, and capacitive isolators. Previous generations of electronic isolators used two chips in a horizontal configuration with wire bonds between the chips. These wire bonds provide a coupling point for large excursions in the difference between the grounds of the systems being isolated. These excursions can be on the order of 25,000 V/usec.

As mentioned above, electrical isolation can be achieved with capacitive, inductive isolators, optical, and/or RF isolators to transmit data across an isolation boundary. There is a desire to add more optical channels to optical couplers in an attempt to meet the complex functionality requirements for various applications. However, there are concerns with respect to chip space utilization and chip pin utilization. Simply adding more channels to an optical coupler will increase package size and/or pin counts, which translates to a larger footprint on a Printed Circuit Board (PCB), which is generally undesirable in end products. It is a challenge to incorporate additional features into an existing number of channels already established in an optocoupler package.

DETAILED DESCRIPTION

Various aspects of the present disclosure will be described herein with reference to drawings that are schematic illustrations of idealized configurations. As such, variations from the shapes of the illustrations as a result, for example, manufacturing techniques and/or tolerances, are to be expected. Thus, the various aspects of the present disclosure presented throughout this document should not be construed as limited to the particular shapes of elements (e.g., regions, layers, sections, substrates, etc.) illustrated and described herein but are to include deviations in shapes that result, for example, from manufacturing. By way of example, an element illustrated or described as a rectangle may have rounded or curved features and/or a gradient concentration at its edges rather than a discrete change from one element to another. Thus, the elements illustrated in the drawings are schematic in nature and their shapes are not intended to illustrate the precise shape of an element and are not intended to limit the scope of the present disclosure.

It will be understood that when an element such as a region, layer, section, substrate, or the like, is referred to as being “on” another element, it can be directly on the other element or intervening elements may also be present. In contrast, when an element is referred to as being “directly on” another element, there are no intervening elements present. It will be further understood that when an element is referred to as being “formed” or “established” on another element, it can be grown, deposited, etched, attached, connected, coupled, or otherwise prepared or fabricated on the other element or an intervening element.

Furthermore, relative terms, such as “lower” or “bottom” and “upper” or “top” may be used herein to describe one element's relationship to another element as illustrated in the drawings. It will be understood that relative terms are intended to encompass different orientations of an apparatus in addition to the orientation depicted in the drawings. By way of example, if an apparatus in the drawings is turned over, elements described as being on the “lower” side of other elements would then be oriented on the “upper” side of the other elements. The term “lower” can, therefore, encompass both an orientation of “lower” and “upper” depending of the particular orientation of the apparatus. Similarly, if an apparatus in the drawing is turned over, elements described as “below” or “beneath” other elements would then be oriented “above” the other elements. The terms “below” or “beneath” can therefore encompass both an orientation of above and below.

Referring now toFIGS. 1-10, various configurations of isolation systems, isolators, and isolation devices are depicted and described. In some embodiments, the isolators described herein may be incorporated into any system which requires current and/or voltage monitoring, but is susceptible to transients. In some embodiments, the isolation system in which an isolator described herein is rated to operate at about 5 kV, 10 kV, or more. Stated another way, the input side (e.g., a high-voltage side) of the isolator or isolation system may be directly connected to a 5 kV, 10 kV, 15 kV or greater source without damaging the isolator or any electronic devices attached to the output side (e.g., a low-voltage side) of the isolator. Accordingly, an isolation system which employs one or more of the isolators disclosed herein may be configured to operate in high-voltage or high-current systems but may also be configured to separate the high-voltage or high-current systems from a low-voltage or low-current system.

Referring now toFIG. 1, a first isolation system100will be described in accordance with at least some embodiments of the present disclosure. The system100is shown to include a first circuit104and second circuit108separated by an isolation boundary112. In some embodiments, an isolator116may provide a mechanism for carrying communication signals across the isolation boundary112.

The first circuit104may be operating in a high-voltage environment (e.g., with a ground potential at or exceeding 1 kV) whereas the second circuit108may be operating in a low-voltage environment (e.g., with a ground potential below 100V). Of course, the opposite condition may also be true without departing from the scope of the present disclosure. The isolation boundary112may provide the mechanism for protecting the low-voltage environment from the high-voltage environment. The isolator116may be configured to establish and maintain the isolation boundary112while simultaneously facilitating the exchange of communications from the first circuit104to the second circuit108and vice versa. It should be appreciated, however, that the second circuit108may be operating in the high-voltage environment and the first circuit104may be operating in the low-voltage environment.

In some embodiments, the first circuit104receives a first input signal120at a first voltage (e.g., a high voltage). The first circuit104outputs a first output signal124to the isolator116. The first output signal124is still at the same nominal voltage as the first input signal120. The isolator116communicates information from the first output signal124to the second circuit108via a second input signal128. The second input signal128is now as a second voltage (e.g., a low voltage) by operation of the isolator116. The second circuit108then processes the second input signal128and generates a second output signal132that is communicated to additional circuitry or controller components.

Conversely, to facilitate a bi-directional flow of information across the isolation boundary112, a third input signal136may be received at the second circuit108. The second circuit108may generate a third output signal140based on the third input signal136. The third output signal140may be provided to the isolator116. In some embodiments, the third output signal140is nominally at a similar voltage to the second input signal128. The isolator116may operate on the third output signal140in a similar fashion to the way that the first output signal124is processed, except in reverse. Specifically, the isolator116may produce a fourth input signal144that carries information previously contained in the third output signal140. The fourth input signal144may be nominally at a similar voltage to the first output signal124. The further input signal144may be provided to the first circuit104, which produces a fourth output signal148based on the fourth input signal144.

Even though the first circuit104operates at a different voltage than the second circuit108and there is an electrical isolation between the two circuits104,108, the isolator116is able to preserve the information from the first output signal124and communicate that information to the second circuit108via the second input signal128. The second input signal128may correspond to a logical representation or copy of the first output signal124. The second input signal128is essentially a reproduction of the first output signal124on different circuitry and at a different potential. Likewise, the isolator116is able to preserve information from the third output signal140and communicate that information to the first circuit104via the fourth input signal144. The fourth input signal144is essentially a reproduction of the third output signal140on different circuitry and at a different potential. It should be appreciated that the isolator116may be designed to carry information across the isolation boundary112in two different directions, either sequentially or simultaneously.

With reference now toFIG. 2, additional details of the isolator116will be described in accordance with at least some embodiments of the present disclosure. The isolator116, as discussed above, is responsible for communicating information between the first circuit104and second circuit108while simultaneously maintaining the isolation boundary112between the circuits104,108. Communication of the signal124across the isolation boundary112is achieved by one or more isolation components204,208, which may correspond to optical or optoelectronic isolation components as will be discussed in further detail herein.

The isolator116may comprise first isolation component(s)204on its first side and second isolation component(s)208on its second side. The first isolation component(s)204and second isolation component(s)208may correspond to optoelectronic devices (e.g., LEDs, photodetectors, photodiodes, lasers, etc.) or the like that work together to communicate signals between one another wirelessly, thereby maintaining the isolation boundary112. In some embodiments, the isolation components204,208communicate with one another via optical coupling (e.g., by the transmission and reception of optical signals in the form of photons). Other coupling techniques such as inductive coupling, magnetic coupling, capacitive coupling, or the like may also be used by isolator116.

FIGS. 3A and 3Bdepict a first illustrative example of an isolation device300in accordance with at least some embodiments of the present disclosure.FIG. 4illustrates a similar isolation device400to that depicted inFIG. 3, with the exception that isolation device400shows a physical layout of some isolation components that may be included in the isolation device300,400. Unless otherwise described, it should be appreciated that similar components in isolation devices300,400may have similar or identical features/functions without departing from the scope of the present disclosure.

With reference initially toFIGS. 3A and 3B, the isolation device300is shown to include first circuitry304and second circuitry308separated by an isolation boundary312. In some embodiments, the isolation boundary312may be an optional element of isolation device300.

The first circuitry304includes a first emitter332, a first Integrated Circuit (IC) chip324, and a second emitter340. A second detector328may be included or integrated into the second IC chip324. Each component of the first circuitry304may be mounted on a common lead or leadframe of an optoelectronic isolation or communication package. Alternatively or additionally, some components of the first circuitry304may be mounted on a first leadframe or substrate and other components of the first circuitry304may be mounted on a second leadframe or substrate.

The second circuitry308includes a first IC chip316and a dual-purpose optoelectronic component336. A first detector320may be included or integrated into the first IC chip316. In some embodiments, the first emitter332produces a first optical signal352that is detected at the first detector320and converted into an electrical signal within the first IC chip316. This first optical signal352may be communicated via a first communication channel344. The first communication channel344may be optically isolated from a second communication channel348, which exists between the dual-purpose optoelectronic component336and the second detector328/second emitter340. The second communication channel348may carry a second optical signal356and/or a third optical signal360. The second optical signal356may travel from the dual-purpose optoelectronic component336to the second detector328on the second IC324whereas the third optical signal may travel from the second emitter340to the dual-purpose optoelectronic component336.

In some embodiments, the emitters332,340may correspond to any type of optoelectronic device capable of receiving an electronic signal as an input and producing an optical signal in response thereto. Non-limiting examples of suitable emitters332,340include LEDs, lasers, VCSELS, an array of LEDs, an array of lasers, combinations thereof, and the like.

In some embodiments, the detectors320,328may correspond to any type of optoelectronic device capable of receiving an optical signal as an input and producing an electrical signal in response thereto. The detectors320,328may provide their electrical signal outputs to their respective IC chips316,324, respectively, for further processing. Non-limiting examples of suitable detectors320,328include photodiodes, an array of photosensitive cells provided on an IC chip, or the like.

The dual-purpose optoelectronic component336may correspond to an optoelectronic device that is capable of operating as a light emitter in a first operating configuration/condition and that is capable of operating as a light detector in a second operating configuration/condition. As a non-limiting example, the dual-purpose optoelectronic component336may correspond to a diode that acts as an LED in a first operating configuration and that acts as a photodiode in a second operating configuration. When operating in the first operating configuration the dual-purpose optoelectronic device336may produce the second optical signal356. The second optical signal356may be used to convey high-speed fault information and/or status information related to the second circuitry308. In some embodiments, the second optical signal356is communicated relatively quickly (e.g., as a fast signal). When operating in the second operating configuration, the dual-purpose optoelectronic device336may receive the third optical signal360and produce an electrical signal in response thereto. The third optical signal360travels through the same communication channel as the second optical signal356(e.g., the second communication channel348), but travels in a direction opposite to the second optical signal356. The third optical signal360may communication status or sensor information from the first circuitry304to the second circuitry308. As compared to the second optical signal356, the third optical signal360may be relatively slower (e.g., modulated slower, activated/deactivated slower, turned on/off slower, etc.) as compared to the second optical signal356.

The first optical signal352is transmitted at a first rate (f1), the second optical signal356is transmitted at a second rate (f2) and the third optical signal360is transmitted at a third rate (f3). The first rate (f1) is substantially at the same speed as the second rate (f2). The third rate (f3) is slower than the first rate (f1) and the second rate (f2). In one embodiment, the first rate (f1) and the second rate (f2) may be at least 50% faster than the third rate (f3). In another embodiment, the first rate (f1) and the second rate (f2) may be at least 2 times the third rate (f3). For example, the first and second rates may be in few MHz, while the third rate may be in the order of few hundred kHz.

In some embodiments, the dual-purpose optoelectronic component336is connected to a separate ground than the first IC chip316. Such a configuration may enable the dual-purpose optoelectronic component336to be appropriately biased to allow the dual-purpose optoelectronic component336to toggle or switch between operating as an emitter and operating as a detector. More specifically, the dual-purpose optoelectronic component336may be forward biased to enable the dual-purpose optoelectronic component336to emit the second optical signal356and operate in the first operating configuration. Conversely, the dual-purpose optoelectronic component336may be reverse biased to enable the dual-purpose optoelectronic component336to receive the third optical signal360. The circuitry responsible for switching the biasing of the dual-purpose optoelectronic component336may reside in or be part of the first IC chip316.

FIG. 3Bdepicts the isolation device300during manufacture. In particular, a detailed view of the second IC chip324and the second emitter340is depicted. A limiting structure364is also depicted as a component used during the manufacture of the isolation device300. In some embodiments, it is desirable to encapsulate the optical components with an encapsulant material380that helps establish the second communication channel348(and first communication channel344as well).

The encapsulant material380may correspond to an electrically-insulative material that is also optically transparent to light emitted by the second emitter340(and other emitters of the isolation device300). In some embodiments, it may be desirable to encapsulate the optical components with the encapsulant material380but not encapsulate other portions of the second IC chip324with the encapsulant material380. In particular, the second IC chip324is shown to have a first side368and a second side372. There are a number of electrical bonding pads provided adjacent to the first side368of the second IC chip324and the second detector328is shown as being adjacent or closer to the second side372of the second IC chip324. This means that it may be desirable to deposit the encapsulant material380in such a way that most of the second side372of the second IC chip324is covered whereas the first side368of the second IC chip324is not covered by the encapsulant material380. It may also be desirable to ensure that the encapsulant material380does not flow so far that it crosses the isolation boundary312or otherwise comes into contact with components like the dual-purpose optoelectronic component336. Unfortunately, the distribution (e.g., size and shape) of the encapsulant material380may be difficult given the nature of the material and the fact that a dispensing unit may not be capable of precision dispensing operations. To address this issue, the limiting structure364may be provided as a way to limit the size and/or shape of the encapsulant material380when deposited on the first circuitry304. The limiting structure364shown inFIG. 3Bis illustratively drawn to represent a structure that may be employed to limit the size of the encapsulant material380. Alternatively, the limiting structure364or an additional limiting structure3641may be placed between the second detector328and the wire bonds.

The limiting structure364helps to ensure that the encapsulant material380does not leak across the isolation boundary312. Additionally, use of the limiting structure364allows the center of the encapsulant material380to be moved away from the center of the second IC chip324. This may enable the bonding pads on the first side368of the second IC chip324to not have the encapsulant material380provided thereon whereas the encapsulant material380may be enabled to simultaneously cover the second detector328and second emitter340. Thus, the encapsulant material380may be able to encapsulate some of the second side372of the second IC chip324but not the first side368of the second IC chip324.

In some embodiments, the limiting structure364may correspond to any type of material or collection of materials that help to prevent a flow of the encapsulant material380when the material is in a liquid form. Non-limiting examples of a suitable limiting structure364include a dummy wire, a dummy chip, a leadframe material, tape, and a solid structure attached adjacent to the second IC chip324and near the second side372of the second IC chip324. As will be discussed in connection withFIG. 4, the limiting structure364helps to establish a sub-chamber over the second IC chip324that protects the second detector328but also acts as a light-guide during operation of the isolation device300. As can be appreciated, the limiting structure364can be used to control the size and/or shape of the encapsulant material380, which effectively controls the size and/or shape of the sub-chamber created thereby.

With reference now toFIG. 4, one possible physical configuration for an isolation device400will be described in accordance with at least some embodiments of the present disclosure. The isolation device400may only correspond to a portion of isolation device300, meaning that not all components of isolation device300are depicted in connection with the isolation device400. It should be appreciated, however, that isolation device400may include all components depicted and described in connection with isolation device300. For ease of discussion and illustration, isolation device400only depicts the components used for communicating via the second communication channel348.

The isolation device400is shown to include a first side404and a second side408that is electrically isolated from the first side404. In some embodiments, the elements on the first side404may correspond to elements provided on the first circuitry304whereas elements on the second side408may correspond to elements provided on the second circuitry308. Specifically, the first side404is shown to include a first substrate or leadframe416supporting a second emitter424and second IC chip428. The second side408is shown to include a second substrate or leadframe supporting the dual-purpose optoelectronic component436. In some embodiments, the second emitter424is similar or identical to second emitter340, the second IC chip428is similar or identical to second IC chip324, the second detector432is similar or identical to the second detector328, and the dual-purpose optoelectronic component436is similar or identical to dual-purpose optoelectronic component336. These similarities are not a requirement, however.

The first side404is electrically isolated from the second side408by an isolation material412. In some embodiments, the isolation material412corresponds to an electrically-insulative material that is also optically transparent (completely or partially) to the wavelength of light produced by components424,436. Non-limiting examples of the isolation material412include Kapton® tape, glass, an insulative film, or the like. The isolation material412helps to establish and maintain the isolation boundary312.

The second emitter424is shown as being directly mounted on the first substrate or leadframe416in addition to being electrically connected to the first substrate or leadframe416via a wirebond452. The second IC chip428is also shown to be directly mounted on the first substrate or leadframe416in addition to being electrically connected to the first substrate or leadframe416via wirebonds452. The photosensitive area of the second IC chip428is shown to include the second detector432. The second detector432and second emitter424are encapsulated or covered by transparent dispense dots440,444, respectively. The dispense dots may correspond to an amount of transparent material used to simultaneously protect the optoelectronic components on the first side404and maintain the second communication channel348. In some embodiments, the dispensed dots440,444may correspond to amounts of silicone deposited over the components424,432.

The dual-purpose optoelectronic component436is also shown to be encapsulated by a dispensed dot448. In some embodiments, the dispensed dot448may correspond to an amount of silicone deposited over the dual-purpose optoelectronic component436. Collectively, the dots440,444,448may help to create a lightguide or the like that establishes the second communication channel348. It should be appreciated that for such an optical pathway to be established, it may be desirable to have the dots440,444,448overlap one another even though they are separated by the isolation material412. Such an overlap may help to create an efficient optical pathway for the optical signals460,464. In some embodiments, optical signal460corresponds to the third optical signal while optical signal464corresponds to the second optical signal356. In some embodiments, these optical signals460,464are not transmitted at substantially the same time, thereby helping to avoid crosstalk, the introduction of noise, etc. Circuitry within the first IC chip316may help to ensure that the optical signals460,464are not simultaneously transmitted.

The combination of the dispensed dots440,444,448may establish the second optical channel348, for example, in the form of a light guide. In some embodiments, the light guide that establishes the second communication channel348may be considered to have a number of sub-chambers, where those sub-chambers correspond to the different dispensed dots during a manufacturing stage shown in dotted lines inFIG. 4. The sub-chambers are to be inter-connected when the isolation device400is completed. In some embodiments, the light guide includes a sub-chamber corresponding to the first dispensed dot440, another sub-chamber corresponding to the second dispensed dot444, and a third sub-chamber corresponding to the third dispensed dot448. As discussed in connection withFIG. 3B, the size and/or shape of the sub-chamber corresponding to the first dispensed dot440may be controlled by the limiting structure364. It should be appreciated that the size and/or shape of other sub-chambers may also be controlled by the limiting structure364or by other mechanisms not depicted. In a subsequent stage of the manufacturing process, the dispensed dots will be connected together as illustrated by the solid lines inFIG. 4. In a final manufactured form of the isolation device400, the sub-chambers440,444and448may be merged to define a single light guide456which is configured to direct the optical signals. In other words, in the final manufactured form of the isolation device400, the first, second and third sub-chambers correspond to the light guide portions adjacent to the second detector432, the second emitter424and the dual-purpose optoelectronic component436respectively. As shown inFIG. 4, a diameter of the sub-chamber corresponding to the first dispensed dot440may be smaller than a diameter of the sub-chamber corresponding to the second dispensed dot444. Similarly, the diameter of the sub-chamber corresponding to the first dispensed dot440may be significantly smaller (e.g., less than half the size) than a diameter of the sub-chamber corresponding to the third dispensed dot448. The isolation material412is shown as being sandwiched between the third dispensed dot448and the other dispensed dots440,444on the first side404. The sub-chambers corresponding to the second dispensed dot444and the first dispensed dot440that reside on the same side will be merged. The merged sub-chambers (shown as solid line on the first side) may have a size that is substantially similar to the sub-chamber corresponding to the third dispensed dot448after processing (shown as solid line on the second side).

In addition to providing an electrical connection, the wirebonds452may also be strategically used to support a placement and/or position of the isolation material412between the sides404,408.

FIG. 5depicts a second illustrative example of an isolation device500in accordance with at least some embodiments of the present disclosure.FIG. 6illustrates a similar isolation device600to that depicted inFIG. 5, with the exception that isolation device600shows a physical layout of some isolation components that may be included in the isolation device500,600. Unless otherwise described, it should be appreciated that similar components in isolation devices500,600may have similar or identical features/functions without departing from the scope of the present disclosure.

With reference now toFIG. 5, the isolation device500is shown to include a package body504that houses components similar or identical to those depicted and described in connection with isolation device300. The isolation device500further exhibits a first inner mold508and a second inner mold512provided in the package504. In some embodiments, the first inner mold508helps to create or define the first communication channel344(which carries the first optical signal352). The second inner mold512helps to create or define the second communication channel348(which carries the second optical signal356and third optical signal360).

The first inner mold508may be provided in such a way as to surround the first emitter332and the first IC chip316. The second inner mold512may be provided in such a way as to surround the second emitter340, the second IC chip324, and the dual-purpose optoelectronic component336. In some embodiments, the ground terminals are contained within the second inner mold512rather than the first inner mold508. It should be appreciated, however, that one or more of the ground terminals (or reference voltage terminals) may be provided in the first inner mold508without departing from the scope of the present disclosure.

In some embodiments, as shown inFIG. 6, the isolation device600, which may be similar to isolation device500, is shown to have a first communication channel604and second communication channel608. As discussed above, the first communication channel604may be established with the first inner mold508and the second communication channel608may be established with the second inner mold512. The first and second inner molds508,512may include any type of translucent or transparent material, such as silicone, white plastic material, clear plastic material, etc. A mold separator612may be provided as an outer mold around the first and second inner molds508,512. The mold separator612, in some embodiments, may establish the format of the package504. The mold separator612may correspond to an outer mold material that is opaque or non-transparent to the light emitted by the emitters of the device500,600. As an example, the mold separator612may correspond to a black plastic or encapsulant material.

A set of substrates or leadframes640,644are shown as being provided within the first communication channel604. Substrate or leadframe640may support the first emitter648, which may be similar or identical to first emitter332. Substrate or leadframe644may support a first IC chip652, which may be similar or identical to first IC chip316. A first detector656may be provided on the first IC chip652. The first detector656may detect light emitted by the first emitter648, that is contained within the first communication channel604.

Another set of substrates or leadframes616,620are shown as being provided within the second communication channel608. Substrate or leadframe616may support the second emitter624and second IC chip628, which may be similar or identical to second emitter340and second IC chip324, respectively. A second detector632may be provided on the second IC chip628. Substrate or leadframe620may support the dual-purpose optoelectronic component636, which may be similar or identical to dual-purpose optoelectronic component336.

Although depicted as separate components, the substrates or leadframes616,620,640,644may correspond to different portions of a common substrate or leadframe that has simply been separated by the mold materials508,512. Said another way, the substrates or leadframes616,620,640, and/or644may be formed on a common material (e.g., a common metal leadframe), but the common material may be divided into discrete portions to establish the different communication channels604,608depicted and described herein.

FIG. 7depicts a third illustrative example of an isolation device700in accordance with at least some embodiments of the present disclosure.FIG. 8illustrates a portion of a similar isolation device800to that depicted inFIG. 7, with the exception that isolation device800shows a physical layout of some isolation components that may be included in the isolation device700,800. Unless otherwise described, it should be appreciated that similar components in isolation devices700,800may have similar or identical features/functions without departing from the scope of the present disclosure.

With reference now toFIG. 7, the isolation device700is shown to include a package body704that houses components similar or identical to those depicted and described in connection with isolation device300. The isolation device700further exhibits an isolation boundary708that separates a high voltage side of the device from a low voltage side of the device. The device700further exhibits a first light guide712and a second light guide716. The first light guide712is provided between the first emitter332and first detector320whereas the second light guide716is provided between the second IC chip324and dual-purpose optoelectronic component336. In some embodiments, the light guides712,716may include a clear silicone or any other type of transparent or translucent material capable of carrying light across the isolation boundary708but not carrying electrical current across the isolation boundary708.

The isolation device700also exhibits an emitter as part of the second IC chip324rather than providing an emitter separate from the second IC chip324. More specifically, the second IC chip324still possesses the second detector328, but the second IC chip324also possesses a stacked emitter720thereon. The stacked emitter720operates similar to the second emitter340except that the stacked emitter720is provided on or in the second IC chip324.

As shown inFIG. 8, a stacked emitter824may be provided on top of the second IC chip828, but on a different area on which the second detector832is provided. In this particular embodiment, the second detector832and stacked emitter824may share a common ground or reference voltage (e.g., a ground of the second IC chip828). In some embodiments, the stacked emitter824is an LED or array of LEDs that are flip-chip attached to the second IC chip828.

The isolation device800depicts the elements of isolation device700included in the second light guide716. It should be appreciated that no all components of isolation device700are depicted in the isolation device800to enable a better understanding of the elements that communicate via the second light guide716. Isolation device800shows a first side804and a second side808. The first side804includes a first substrate or leadframe816having the second IC chip828mounted directly thereon. The second side808includes a second substrate or leadframe820having the dual-purpose optoelectronic component836mounted thereon. The dual-purpose optoelectronic component836and second IC chip828are shown as being in a face-to-face orientation (similar to other orientations depicted and described herein). The second IC chip828has a first side mounted to the first substrate or leadframe816and its opposite second side includes the second detector832as well as the stacked emitter824mounted thereto. The stacked emitter824may also be electrically connected to the second IC chip828via one or more wirebonds848and then the second IC chip828may be electrically connected to the first substrate or leadframe816via another set of wirebonds848. Likewise, the dual-purpose optoelectronic component836may be electrically connected to the second substrate or leadframe808via one or more wirebonds848.

An isolation or insulation material812is shown to electrically isolate or separate the first side804from the second side808. The isolation or insulation material812may be similar or identical to isolation material412. The isolation material812is shown as being positioned between a first encapsulant840and a second encapsulant844. The first encapsulant840may correspond to an amount of clear or semi-transparent silicone deposited over the top of the second IC chip828and stacked emitter824. The second encapsulant844may correspond to an amount of clear or semi-transparent silicone deposited over the dual-purpose optoelectronic device836. The combination of the first encapsulant840and second encapsulant844may create the second light guide716that facilitates communications between the different sides of the isolation device700,800.

FIG. 9depicts a fourth illustrative example of an isolation device900in accordance with at least some embodiments of the present disclosure. The isolation device900is similar to other isolation devices depicted and described herein except that the package904of the isolation device900contains three discrete light guides908,912,916. The first light guide908may correspond to an amount of clear or semi-transparent material (e.g., silicone) deposited over the first emitter332and the first detector320. It should be appreciated that the first light guide908may also partially or completely cover the rest of the first IC chip316without departing from the scope of the present disclosure.

The second light guide912may correspond to a second amount of clear or semi-transparent material (e.g., silicone) deposited over the second detector328and the dual-purpose optoelectronic device336. The third light guide916may correspond to a third amount of clear or semi-transparent material (e.g., silicone) deposited over the second emitter340and the dual-purpose optoelectronic device336. In some embodiments, all of the light guides908,912,916may be further encapsulated by an inner mold material (e.g., white silicone or epoxy/plastic). This inner mold material may be further encapsulated by an outer mold material (e.g., black epoxy/plastic) that establishes the final format of the package904.

With reference now toFIG. 10, an illustrative control circuit used to effect the functionality of the dual-purpose optoelectronic device, which is illustratively depicted as LED. The components of the circuit may be incorporated into the first IC chip316(e.g., as internal components of the first IC chip316). In some embodiments, the control circuit enables the dual-purpose optoelectronic device to be configured as a light source/emitter in one mode of operation and as a light detector in another mode of operation.

In the depicted embodiment, one node of the dual-purpose optoelectronic device is connected to a ground or reference voltage, which is also connected to a voltage source or power supply VB. The voltage source or power supply VB may correspond to a negative power supply that is also connected to a positive terminal of a transimpedance amplifier (TIA). The other node of the dual-purpose optoelectronic device is connected between a pair of switches SW and SWB. The first switch SW may selectively connect the dual-purpose optoelectronic device to a control voltage VCC through a resistor RLED. The second switch SWB may selectively connect the dual-purpose optoelectronic device to a negative terminal of the TIA. In a first mode of operation or configuration, the circuit may be configured such that the first switch SW is closed, thereby connecting the dual-purpose optoelectronic device to the control voltage VCC. In this first mode of operation or configuration, the second switch SWB may be open. When the first switch SW is closed and the second switch SWB is open, the dual-purpose optoelectronic device may operate as a light source/emitter, thereby enabling the transmission of the second optical signal356. The resistor RLED helps to limit the amount of current flowing to the dual-purpose optoelectronic device during this mode of operation.

In a second mode of operation or configuration, the circuit may be configured such that the first switch SW is opened and the second switch SWB is closed. This creates a reverse bias with the voltage source or power supply VB and causes the dual-purpose optoelectronic device to operate as a light detector or photodiode. In some embodiments, when the second switch SWB is closed, the TIA is able to convert the photodetected current (e.g., the output of the dual-purpose optoelectronic device) into a voltage that can be read out by other components within the first IC chip316or by other components connected to the first IC chip316via a wirebond. In other words, the TIA can produce an output voltage VOUT that is representative of an electrical signal produced by the dual-purpose optoelectronic device when photons are detected at the dual-purpose optoelectronic device.

As can be appreciated, by utilizing a dual-purpose optoelectronic device as depicted and described herein, an isolation device is realized with a relatively reduced package size and/or footprint. Moreover, with the elimination of an additional IC chip and corresponding diode, the overall real estate of the isolation device package can be reduced.

As can be appreciated, any of the isolators or isolation devices depicted and described herein may be implemented as on-chip solutions (e.g., as a single silicon wafer). In some embodiments, the isolators or isolation devices may be implemented in an Integrated Circuit (IC) chip having other circuit elements provided therein. Moreover, the terms isolator and isolation device may be interchangeable terms as used herein. Indeed, any system, system component, or specific device exhibiting features and/or functions of an electrical isolator as well as an optical coupler may be considered either an isolator or isolation device.

Specific details were given in the description to provide a thorough understanding of the embodiments. However, it will be understood by one of ordinary skill in the art that the embodiments may be practiced without these specific details. In other instances, well-known circuits, processes, algorithms, structures, and techniques may be shown without unnecessary detail in order to avoid obscuring the embodiments.