Electronic circuit, frequency divider and radio set

A master stage 101 comprises a differential circuit composed of transistors 1 and 2, a differential circuit composed of transistors 3 and 4, a differential circuit composed of transistors 5 and 6, a load circuit 7 (a first load circuit), a load circuit 8 (a second load circuit), and a current source transistor 9. The load circuit 7 (the first load circuit) is composed of an inductor 7A (a first inductor), an inductor 7B (a fifth inductor), and a capacity 7C (a first capacity). The inductor 7B and capacity 7C cooperates together in forming a parallel resonance circuit (a first LC parallel resonance circuit), while the parallel resonance circuit is connected in series to the inductor 7A.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to an electronic circuit and a frequency divider capable of varying and broadening a dividable input frequency band as well as a radio set capable of using two or more radio communication systems by using such electronic circuit and frequency divider.

2. Description of the Related Art

Conventionally, as a frequency divider capable of varying a dividable input frequency band, there is known a frequency divider which is disclosed in the patent reference 1.FIG. 9is a circuit diagram of a conventional frequency divider disclosed in the patent reference 1.

InFIG. 9, a frequency divider700is a half frequency divider which divides an input signal into a signal of a half frequency and outputs the half-frequency signal therefrom. The frequency divider700is a master-slave mode D flip flop in which multiplier circuits are connected in two stages.

A master stage701comprises: a differential circuit composed of transistors Q1and Q2; a differential circuit composed of transistors Q3and Q4; a differential circuit composed of transistors Q9and Q10; a current source transistor Q13; a load circuit composed of load resistors R1A, R1B and transistor switches Q1A, Q1B; and, a load circuit composed of load resistors R2A, R2B and transistor switches Q2A, Q2B.

A slave stage702comprises: a differential circuit composed of transistors Q5and Q6; a differential circuit composed of transistors Q7and Q8; a differential circuit composed of transistors Q11and Q12; a current source transistor Q14; a load circuit composed of load resistors R3A, R3B and transistor switches Q3A, Q3B; and, a load circuit composed of load resistors R4A, R4B and transistor switches Q4A, Q4B.

An input terminal IN is connected to the respective bases of the transistors Q9and Q12. An input terminal INB is connected to the respective bases of the transistors Q10and Q11. The output of the master stage701is input to the respective bases of the transistors Q5and Q6of the slave stage702.

The output of the slave stage702is input not only to the respective bases of transistors Q15and Q16but also to the respective bases of the transistors Q1and Q2of the master stage701. An input signal is input to the input terminals IN and INB in the form of a differential signal. The output of the flip flop is obtained from the respective emitters of the transistors Q15and Q16.

The bases of the current source transistors Q13and Q14are respectively connected to a programmable band gap regulator711. The programmable band gap regulator711is able to vary an output potential VREG selectively. This can in turn vary the base potentials of the current source transistors Q13and Q14, thereby being able to selectively vary a current IBIAS flowing in the master and slave stages.

The transistor switches Q1A, Q2A, Q3A and Q4A are respectively connected to a resistance select signal terminal VA. Also, the transistor switches Q1B, Q2B, Q3B and Q4B are respectively connected to a resistance select signal terminal VB.

According to signals which are input to the resistance select signal terminals VA and VB, the load of the present frequency diver can be switched to the load resistors R1A˜R4A or load resistors R1B˜R4B. When a potential to be applied to the resistance select signal terminal VA is a potential Vcc and a potential to be applied to the resistance select signal terminal VB is 0V, the transistor switches Q1A˜Q4A are respectively turned on and the transistor switches Q1B˜Q4B are respectively turned off. And, as regards the load of the frequency divider, there is obtained a state in which the load resistors R1A˜R4A are selected.

Also, when a potential to be applied to the resistance select signal terminal VA is 0V and a potential to be applied to the resistance select signal terminal VB is the potential Vcc, the transistor switches Q1A˜Q4A are respectively turned off and the transistor switches Q1B˜Q4B are respectively turned on. And, for the load, there is obtained a state in which the load resistors R1B˜R4B are selected. This makes it possible to vary the operation amplitude of the frequency divider selectively.

Based on the foregoing description, the patent reference 1 insists that, due to provision of the structure capable of varying two or more bias currents or the structure capable of varying two or more operation amplitudes, even when using the same chip and same power voltage, the frequency divider is able to vary a dividable frequency band greatly without saturating the circuits thereof.

DISCLOSURE OF THE INVENTION

Problems that the Invention is to Solve

However, in the conventional structure disclosed in the above-mentioned patent reference 1, to vary the dividable frequency band, there is necessary the control to switch the load resistors over to each other according to bias currents applied. For this reason, in order for the frequency divider to carry out its frequency dividing operation successively in a wide frequency band, it is necessary to prepare a large number of load resistors and switch them over to each other. And, it is also found that, as the input frequency of the frequency divider increases, the current consumption thereof increases.

Also, conventionally, an inductor used on an integrated circuit provides a large production error, so that, when an LC resonator is formed using such inductor, resonance cannot be obtained at the frequency that has been deigned.

The present invention aims at solving the problems found in the above-mentioned conventional structure. Thus, it is an object of the invention to provide not only an electronic circuit and a frequency divider which can vary and broaden a dividable frequency band without carrying out the control for varying the load resistors, but also a radio set using such electronic circuit and frequency divider.

Also, it is another object of the invention to provide not only en electronic circuit and a frequency divider which can widen the allowable range of the production error of the inductor and reduce the value of the inductor to thereby be able to reduce the occupation area thereof on an integrated circuit.

An electronic circuit according to the invention is an electronic circuit to be connected to a master-slave mode D flip flop which constitutes a frequency divider. The present electronic circuit comprises first and second circuit elements connected in series to each other, in which the first circuit element has a free run frequency which, when the electronic circuit is used as the load circuit of the above-mentioned D flip flop, functions as a first free run frequency, and a second element has a free run frequency which, when the electronic circuit is used as the load circuit of the above-mentioned D flip flop, functions as a second free run frequency different from the first free run frequency.

According to the above structure, by setting the first and second free run frequencies in a desired frequency band, a frequency divider, to which an electronic circuit according to the invention is connected as a load circuit, has two more free run frequencies such as the first and second free run frequencies, and thus is able to broaden a dividable frequency band without requiring control for varying the load circuit. Also, because the control for varying the load circuit is not required, the circuit scale of the frequency divider can be reduced as well as the circuit configurations thereof can be simplified.

Also, an electronic circuit according to the invention has the following structure. That is, the above-mentioned first circuit element is composed of inductors and the second circuit element is composed of LC parallel resonance circuits; and, the electronic circuit comprises a master stage and a slave stage. Specifically, the master stage includes: a first load circuit composed of a first inductor and a first LC parallel resonance circuit connected in series to each other; and a second load circuit composed of a second inductor and a second LC parallel resonance circuit connected in series to each other. And, the slave stage includes: a third load circuit composed of a third inductor and a third LC parallel resonance circuit connected in series to each other; and, a fourth load circuit composed of a fourth inductor and a fourth LC parallel resonance circuit connected in series to each other.

According to the above structure, since each of the load circuits of the master-slave mode D flip flop load circuit is composed of the inductor and LC parallel resonance circuit connected together in series, a frequency divider, to which an electronic circuit according to the invention is connected as a load circuit, can have two or more free run frequencies including free run frequencies provided by the inductors and free run frequencies provided by the LC parallel resonance circuits; and, dividable frequency bands including the respective free run frequencies are respectively broadened at a low Q factor, and such dividable frequency bands are overlapped on each other. Therefore, the present frequency divider is able to broaden the dividable frequency bands with no need for control for varying the load circuits. Also, because each load circuit is composed of the inductor and LC parallel resonance circuit and is thereby prevented against saturation, the present frequency divider is also able to control a current in a dividable frequency band in a wider range. Further, since there is eliminated the need for the control for varying the load circuit, not only the scale of the circuit can be reduced and thus the circuit can be simplified, but also the noise characteristic of the frequency divider can be improved. In this case, to obtain a wide band characteristic, it is not necessary to sharpen the resonance characteristic of the resonance circuit but the Q factor of the inductor may be set low. Also, since it is not necessary to sharpen the resonance characteristic of the resonance circuit, even when there exists a production error in the L value of the inductor, the wide band characteristic can be prevented from being deteriorated.

Also, an electronic circuit according to the invention includes: a first capacity which uses in common the capacity of the first LC parallel resonance circuit and the capacity of the second LC parallel resonance circuit by virtual grounding; and, a second capacity which uses in common the capacity of the third LC parallel resonance circuit and the capacity of the fourth LC parallel resonance circuit by virtual grounding.

According to the above structure, a frequency divider, to which an electronic circuit according to the invention is connected as a load circuit, not only can broaden a dividable frequency band with no need for the control for varying the load circuit, but also, by using the capacities each using two LC parallel resonance circuits by virtual grounding, can reduce the scale of the circuits thereof to simplify the circuits and thus can improve the noise characteristic of the frequency divider.

Also, according to the electronic circuit of to the invention, the inductor of the first LC parallel resonance circuit and the inductor of the second LC parallel resonance circuit cooperate together in constituting a transformer, while the inductor of the third LC parallel resonance circuit and the inductor of the fourth LC parallel resonance circuit cooperate together in constituting a transformer.

According to the above structure, a frequency divider, to which an electronic circuit according to the invention is connected as a load circuit, not only can broaden the dividable frequency band with no need for the control for varying the load circuits but also can reduce the scale of the circuit to thereby improve the noise characteristic of the frequency divider. Also, since the L values can be reduced by constituting the transformers, the occupation area of the frequency divider on an integrated circuit can be reduced.

Also, according to the electronic circuit of the invention, the first inductor and the inductor of the first LC parallel resonance circuit cooperate together in constituting a transformer, the second inductor and the inductor of the second LC parallel resonance circuit cooperate together in constituting a transformer, the third inductor and the inductor of the third LC parallel resonance circuit cooperate together in constituting a transformer, and the fourth inductor and the inductor of the fourth LC parallel resonance circuit cooperate together in constituting a transformer.

According to the above structure, a frequency divider, to which an electronic circuit according to the invention is connected as a load circuit, not only can broaden a dividable frequency band with no need for the control for varying the load circuits but also can reduce the scale of the circuits further to thereby be able to improve the noise characteristic of the frequency divider.

Also, according to the electronic circuit of the invention, first spiral inductors respectively constitute the first inductor and the inductor of the first LC parallel resonance circuit, second spiral inductors respectively constitute the second inductor and the inductor of the second LC parallel resonance circuit, the first capacity connects the first and second spiral inductors to each other, third spiral inductors respectively constitute the third inductor and the inductor of the third LC parallel resonance circuit, fourth spiral inductors respectively constitute the fourth inductor and the inductor of the fourth LC resonance circuit, and the second capacity connects the third and fourth spiral inductors to each other.

According to the above structure, a frequency divider, to which an electronic circuit according to the invention is connected as a load circuit, not only can broaden a dividable frequency band with no need for the control for varying a load circuit but also can reduce the scale of the circuit further to thereby be able to improve the noise characteristic of the frequency divider.

Also, according to the electronic circuit of the invention, the first free run frequency is higher than the second free run frequency.

According to the above structure, a frequency divider, to which an electronic circuit according to the invention is connected as a load circuit, can broaden a dividable frequency band with no need for the control for varying the load circuits.

Also, a frequency divider according to the invention includes an electronic circuit according to the invention.

According to the above structure, the present frequency divider can broaden a dividable frequency band with no need for the control for varying the load circuits and thus can be effectively used as a multi-band frequency divider.

And, a frequency divider according to the invention includes a control part for varying the bias current of the master-slave mode flip flop.

According to the above structure, by varying the bias current of the master-slave mode flip flop, the frequency characteristics of the transistors can be varied, whereby a dividable frequency band can be broadened with no need for the control for varying the load circuits.

Also, a radio set according to the invention incorporates therein a frequency divider according to the invention.

According to the above structure, by dividing the output of a voltage control oscillator to a wide frequency band, the radio part of the radio set can be simplified as well as can be reduced in size and cost. Also, since the noise characteristic of the radio set can be improved, the receiving characteristic of the radio set can be improved.

According to the invention, a dividable frequency band can be varied and broadened with no need for the control for varying the load circuits. Also, because of no control for varying the load circuits, not only the electronic circuit can be reduced in size and thus the electronic circuit can be simplified but also the noise characteristic of the electronic circuit can be improved.

DESCRIPTION OF REFERENCE CHARACTERS AND SIGNS

BEST MODE FOR CARRYING OUT THE INVENTION

Now, description will be given below of embodiments according to the invention with reference to the accompanying drawings.

In the present embodiment 1, description will be given below of a multi-band frequency divider which can vary and broaden a dividable frequency band with no need for control for switching the load of the frequency divider.

FIG. 1is a circuit diagram of a multi-band frequency divider according to the embodiment 1 of the invention. InFIG. 1, the multi-band frequency divider100is a half frequency divider which divides a signal input therein into a signal of a half frequency and then outputs the resultant signal therefrom. The frequency divider100is composed of a master-slave mode D flip flop including multiplier circuits connected together in two stages.

A master stage101comprises a differential circuit composed of transistors1and2, a differential circuit composed of transistors3and4, a differential circuit composed of transistors5and6, a load circuit7(a first load circuit), a load circuit8(a second load circuit), and a current source transistor9.

The emitters of the transistors1and2are respectively connected to the collector of the transistor5. The emitters of the transistors3and4are respectively connected to the collector of the transistor6. The emitters of the transistors5and6are respectively connected to the collector of the current source transistor9.

The collectors of the transistors1and3are respectively connected not only to a power voltage Vcc through the load circuit7but also to the base of the transistor4. The collectors of the transistors2and4are respectively connected not only to the power voltage Vcc through the load circuit8but also to the base of the transistor3.

A slave stage102comprises a differential circuit composed of transistors11and12, a differential circuit composed of transistors13and14, a differential circuit composed of transistors15and16, a load circuit17(a third load circuit), a load circuit18(a fourth load circuit), and a current source transistor19.

The emitters of the transistors11and12are respectively connected to the collector of the transistor15. The emitters of the transistors13and14are respectively connected to the collector of the transistor16. The emitters of the transistors15and16are respectively connected to the collector of the current source transistor19.

The collectors of the transistors11and13are respectively connected not only to the power voltage Vcc through the load circuit17but also to the base of the transistor14. The collectors of the transistors12and14are respectively connected not only to the power voltage Vcc through the load circuit18but also to the base of the transistor13.

An input terminal21is connected to the respective bases of the transistors5and16. An input terminal22is connected to the respective bases of the transistors6and15. A bias terminal23is connected to the respective bases of the current source transistors9and19. The emitters of the current source transistors9and19are respectively connected the ground.

According to a potential to be applied to the bias terminal23, the bias current of the multi-band frequency divider100can be controlled. A control part103applies a bias control signal to the bias terminal23and also applies an oscillation control signal to an oscillator104.

The oscillator104inputs input signals each having a frequency according to the oscillation control signal to the input terminals21and22in the form of differential signals. The current source transistor9supplies a bias current, which corresponds to the bias control signal, to the master stage101. The current source transistor9supplies a bias current, which corresponds to the bias control signal, to the slave stage102.

An I output terminal24is connected to the respective collectors of the transistors2and4. An IB output terminal25is connected to respective collectors of the transistors1and3. A Q output terminal26is connected to the respective collectors of the transistors11and13. A QB output terminal27is connected to respective collectors of the transistors12and14.

Input signals are respectively input to the master stage101from the input terminals21and22in the form of differential signals. The output of the master stage101is output from the I output terminal and IB output terminal in the form of a differential signal, that is, as a differential I signal, as well as is input to the respective bases of the transistors11and12of the slave stage102.

The output of the slave stage102is output from the Q output terminal26and QB output terminal27in the form of a differential signal, that is, as a differential Q signal, as well as is input to the respective bases of the transistors1and2of the master stage101. The differential I signal and differential Q signal have a phase difference of 90° with respect to each other.

The load circuit (the first load circuit) is composed of an inductor7A (a first inductor), an inductor7B (a second inductor), and a capacity7C (a first capacity). The inductor7B and capacity7C cooperate together in constituting a parallel resonance circuit (a first LC parallel resonance circuit), while the first LC parallel resonance circuit is connected in series to the inductor7A.

The load circuits8,17and18(the second, third and fourth load circuits) are similar in structure to the load circuit7. The inductors7A,8A,17A and18A have the same L value. The inductors7B,8B,17B and18B also have the same L value. The capacities7C,8C,17C and18C have the same C value. Thanks to this, the multi-band frequency divider100have two or more free run frequencies, that is, a free run frequency provided by the inductors7A,8A,17A and18A, and a free run frequency provided by the parallel resonance circuits respectively composed of the inductors7B,8B,17B and18B and their associated capacities7C,7B,17C and18C; and, therefore, the multi-band frequency divider100is able to broaden a dividable frequency band.

Now,FIG. 2is a graphical representation of the analysis results of the minimum input power necessary for frequency division with respect to an input frequency. InFIG. 2, the analysis result of the present embodiment 1 is shown by a graph “load: L+resonance circuit”. Also, the analysis result, in a case where the load circuit is composed of only inductors, is shown by a graph “load: L”. In this case, the L value of the inductors is equal to that of the inductors7A,8A,17A and18A.

The analysis result, in a case where the load circuit is composed of only parallel resonance circuits, is shown by a graph “load: resonance circuit”. In this case, the L value of the inductors of the parallel resonance circuits is equal to that of the inductors7B,8B,17B and18B and, at the same time, the C value of the capacities of the parallel resonance circuits is equal to that of the capacities7C,8C,17C and18C. In all graphs, the bias current is equal.

Generally, a frequency divider is able to divide frequencies in a frequency band the minimum input power (the minimum input power necessary for frequency division) of which is equal to or less than the power that is input from an oscillator. For example, it is assumed that the input power of a signal to be input to the multi-band frequency divider100from the oscillator104is of the order of −10 dBm. In this case, a frequency band (about 3 GHz˜17 GHz), which corresponds to the minimum input power necessary for frequency division of −10 dBm or less, provides the dividable frequency band that the multi-band frequency divider100is able to divide.

The multi-band frequency divider100according to the present embodiment 1 has the same free run frequencies as a frequency divider in which load circuits are respectively composed of only the inductors. Also, even in the vicinity of the free run frequency of the frequency divider the load circuits of which are respectively composed of only the parallel resonance circuits, the minimum input power necessary for frequency division in the multi-band frequency divider100is equal to or less than −10 dBm; and thus, it is obvious that the multi-band frequency divider100is able to divide the frequency of a signal even in the vicinity of such free run frequency. Therefore, the multi-band frequency divider100is able to divide the frequency of a signal in two frequency bands, that is, a frequency band in which a frequency divider having load circuits respectively composed of only inductors can divide the frequency of a signal, and a frequency band in which a frequency divider having load circuits respectively composed of only parallel resonance circuits can divide the frequency of a signal. Also, according to the analysis results shown inFIG. 2, the multi-band frequency divider100is also able to divide frequencies existing in a frequency band between a free run frequency provided by a frequency divider having load circuits respectively composed of only inductors and a free run frequency provided by a frequency divider having load circuits respectively composed of only parallel resonance circuits.

Accordingly, when the free run frequency of a frequency divider having load circuits respectively composed of only the inductors and the free run frequency of a frequency divider having load circuits respectively composed of only the parallel resonance circuits are designed such that they belong to different frequency bands, the dividable frequency band of the multi-band frequency divider100can be broadened.

Also, preferably, the free run frequency of a frequency divider having load circuits respectively composed of only the inductors7A,8A,17A and18B may be set higher than the free run frequency of a frequency divider having load circuits respectively composed of only the parallel resonance circuits that are respectively made of the inductors7B,8B,17B and18B and capacities7C,8C,17C and18C.

And, when, in a frequency band ranging between the free run frequency of a frequency divider having load circuits respectively composed of only inductors and the free run frequency of a frequency divider having load circuits respectively composed of only parallel resonance circuits, the minimum input power necessary for frequency division is designed such that it does not exceed the input power of the oscillator104, the frequency dividing operation can be executed successively in a wide frequency band.

Also, althoughFIG. 2shows the analysis results obtained when the bias current is set constant, by varying the bias current according to the bias control signal of the control part103, the dividable frequency band can be varied. In this case, since the load circuit provides no voltage drop, there is no possibility that the electronic circuit can be saturated. Also, the noise characteristic of the multi-band frequency divider100can also be improved.

And, since an electronic circuit according to the present embodiment is able to obtain a wide band characteristic with no need to sharpen the resonance characteristics of the resonance circuits, the Q factor of the inductors may be set low. Thanks to this, because the resonance characteristic of the resonance circuit is not sharp, even when there is a production error in the L value of the inductors, the wide band characteristic of the present electronic circuit cannot be impaired. Preferably, the Q factor of the inductors and capacities used in the load circuits of a multi-band frequency divider may be set low, about 1˜3.

From the foregoing description, according to the multi-band frequency divider of the present embodiment, a dividable frequency band can be broadened with no need for control for varying a load circuit. Elimination of the need for control for varying a load circuit can reduce the scale of the circuit and thus simplify the circuit. Also, the noise characteristic of the multi-band frequency divider can also be improved.

By the way, in the present embodiment, description has been given of a multi-band frequency divider using bipolar transistors. However, there may also be used FET. Also, in the present embodiment, although description has been given of a load circuit which is composed of inductors and a single parallel resonance circuit connected in series to each other, the load circuit may also use two or more parallel resonance circuits. This makes it possible to broaden a dividable frequency band more. And, in the present embodiment, description has been given of the multi-band frequency divider for dividing a signal into a signal of a half frequency, but there may also be employed a structure in which the number of frequencies divided is other than 2.

In the present embodiment 2, description will be given below of another structure of a multi-band frequency divider which can vary and broaden a dividable frequency band with no need for control for switching the load of the frequency divider.

FIG. 3is a circuit diagram of a multi-band frequency divider according to the embodiment 2 of the invention. InFIG. 3, the multi-band frequency divider200is a half frequency divider which divides a signal input therein into a signal of a half frequency and then outputs the resultant signal therefrom. In the embodiment 2, the same circuits as those described above in the embodiment 1 of the invention are given the same designations and the duplicate description thereof is omitted here. The embodiment 2 is different from the embodiment 1 in that it uses a load circuit31in a master stage201and a load circuit32in a slave stage202.

The load circuit31is composed of an inductor31A, an inductor31B, an inductor31C, an inductor31D, and a capacity31E (a fifth capacity). The inductors31A and31C are connected in series to each other. The respective collectors of transistors1and3are connected through the inductors31A and inductor31C to a power voltage Vcc.

The inductors31B and31D are connected in series to each other. The respective collectors of transistors2and4are connected through the inductors31B and inductor31D to the power voltage Vcc.

The capacity31E is connected between the connecting point of the inductors31A and31C and the connecting point of the inductors31B and31D. The capacity31E virtually grounds a portion interposed between the connecting point of the inductors31A and31C and the connecting point of the inductors31B and31D. Therefore, a resonance circuit composed of the inductor31C and capacity31E is connected in series to the inductor31A. And, a resonance circuit composed of the inductor31D and capacity31E is connected in series to the inductor31B.

Also, the load circuit32is similar in structure to the load circuit31. The inductors31A,31B,31C, and31D have the same L value. The capacities31E and32E have the same C value.

Thanks to this structure, although one capacity is reduced from the load circuits employed in the embodiment 1 according to the invention, the embodiment 2 can provide an equivalent characteristic to the embodiment 1. Also, preferably, the inductors and capacities used in the load circuits of the multi-band frequency divider may have a low Q factor, that is, about 1˜3.

From the foregoing description, according to the multi-band frequency divider of the present embodiment, a dividable frequency band can be broadened with no need for control for varying the load circuits. Elimination of the need for control for varying the load circuits can reduce the scale of the circuit and thus can simplify the circuit. Also, the noise characteristic of the multi-band frequency divider can be improved.

By the way, in the present embodiment, description has been given above of a multi-band frequency divider using bipolar transistors. However, there may also be used an FET. Also, in the present embodiment, description has been given above of a multi-band frequency divider for dividing a signal into a signal of a half frequency. However, there may also be employed a structure in which the divided number of the frequency of a signal is other than two.

In the present embodiment 3, description will be given below of still another structure of a multi-band frequency divider which can vary and broaden a dividable frequency band with no need for control for switching the load of the frequency divider.

FIG. 4is a circuit diagram of a multi-band frequency divider according to the embodiment 3 of the invention. InFIG. 4, the multi-band frequency divider300is a half frequency divider which divides a signal input therein into a signal of a half frequency and then outputs the resultant signal therefrom. In the embodiment 3, the same circuits as those described above in the embodiment 1 of the invention are given the same designations and the duplicate description thereof is omitted here. The embodiment 3 is different from the embodiment 1 in that it uses a load circuit33in a master stage301and a load circuit34in a slave stage302.

The load circuit33is composed of an inductor33A, an inductor33B, an inductor33C, an inductor33D, and a capacity33E. The inductors33A and33C are connected in series to each other. The respective collectors of transistors1and3are connected through the inductors33A and33C to a power voltage Vcc.

The inductors33B and33D are connected in series to each other. The respective collectors of transistors2and4are connected through the inductors33B and inductor33D to the power voltage Vcc.

The capacity33E is connected between the connecting point of the inductors33A and33C and the connecting point of the inductors33B and33D. The inductors33C and33D cooperate together in constituting a transformer (a first transformer) the polarities of which are opposite to each other (in which the inductors33C and33D are differentially connected to each other).

Also, the load circuit34is similar in structure to the load circuit33. The inductors33A,33B,34A, and34B have the same L value. The inductors33C,33D,34C, and34D have the same L value. The capacities33E and34E have the same C value.

Thanks to this structure, since one capacity can be reduced from the load circuits employed in the embodiment 1 according to the invention and the L values of the inductors constituting the transformer can be reduced, the embodiment 3 not only can reduce the occupation area of the circuits but also can provide an equivalent characteristic to the embodiment 1. Also, preferably, the inductors and capacities used in the load circuits of the multi-band frequency divider may have a low Q factor, that is, about 1˜3.

From the foregoing description, according to the multi-band frequency divider of the present embodiment, a dividable frequency band can be broadened with no need for control for varying the load circuits. Elimination of the need for control for varying the load circuits can reduce the scale of the circuit and thus can simplify the circuit. Also, the noise characteristic of the multi-band frequency divider can be improved.

By the way, in the present embodiment, description has been given above of a multi-band frequency divider using bipolar transistors. However, there may also be used an FET. Also, in the present embodiment, description has been given above of a multi-band frequency divider for dividing a signal into a signal of a half frequency. However, it is also possible to employ another structure in which the divided number of the frequency of a signal is other than two.

In the present embodiment 4, description will be given below of a fourth structure of a multi-band frequency divider which can vary and broaden a dividable frequency band with no need for control for switching the load of the frequency divider.

FIG. 5is a circuit diagram of a multi-band frequency divider according to the embodiment 4 of the invention. InFIG. 5, the multi-band frequency divider400is a half frequency divider which divides a signal input therein into a signal of a half frequency and then outputs the resultant signal therefrom. In the embodiment 4, the same circuits as those described above in the embodiment 1 of the invention are given the same designations and the duplicate description thereof is omitted here. The embodiment 4 is different from the embodiment 1 in that it uses a load circuit35in a master stage401and a load circuit36in a slave stage402.

The load circuit35is composed of an inductor35A, an inductor35B, an inductor35C, an inductor35D, and a capacity35E. The inductors35A and35C are connected in series to each other. The respective collectors of transistors1and3are connected through the inductors35A and35C to a power voltage Vcc.

The inductors35B and35D are connected in series to each other. The respective collectors of transistors2and4are connected through the inductors35B and inductor35D to the power voltage Vcc.

The capacity35E is connected between the connecting point of the inductors35A and35C and the connecting point of the inductors35B and35D. The inductors35A and35C cooperate together in constituting a transformer (a third transformer) the polarities of which are opposite to each other. The inductors35B and35D cooperate together in constituting a transformer (a fourth transformer) the polarities of which are opposite to each other.

Also, the load circuit36is similar in structure to the load circuit35. The inductors35A,35B,36A and36B have the same L value. The inductors35C,35D,36C, and36D have the same L value. The capacities35E and36E have the same C value.

FIG. 6is a circuit diagram of the equivalent circuit of the load circuit35. Generally, it is known that a transformer having one terminal shared in common can be treated as a T-type equivalent circuit composed of three inductances with no mutual inductance. The transformer composed of the inductors35A and35C can be replaced with an inductor35A′, an inductor35C′ and an inductor35F. Also, the transformer composed of the inductors35B and35D can be replaced with an inductor35B′, an inductor35D′ and an inductor35G.

Therefore, in the load circuit35, there is employed a structure in which a resonance circuit composed of the inductors35C′,35F and capacity35E is connected in series to the inductor35A′. Also, in the load circuit35, similarly, there is also employed a structure in which a resonance circuit composed of the inductors35D′,35G and capacity35E is connected in series to the inductor35B′.

As described above, in the present embodiment, since one capacity can be reduced from the load circuits employed in the embodiment 1 according to the invention and the L values of the inductors constituting the transformer can be reduced, the embodiment 4 not only can reduce the occupation area of the circuits but also can provide an equivalent characteristic to the embodiment 1. Also, preferably, the inductors and capacities used in the load circuits of the multi-band frequency divider may have a low Q factor, that is, about 1˜3.

From the foregoing description, according to the multi-band frequency divider of the present embodiment, a dividable frequency band can be broadened with no need for control for varying the load circuits. Elimination of the need for control for varying the load circuits can reduce the scale of the circuit and thus can simplify the circuit. Also, the noise characteristic of the multi-band frequency divider can be improved.

By the way, in the present embodiment, description has been given above of a multi-band frequency divider using bipolar transistors. However, an FET may also be used. Also, in the present embodiment, description has been given above of a multi-band frequency divider for dividing a signal into a signal of a half frequency. However, the divided number of the frequency of a signal may also be other than two.

In the present embodiment 5, description will be given below of a fifth structure of a multi-band frequency divider which can vary and broaden a dividable frequency band with no need for control for switching the load of the frequency divider.

FIG. 7is a circuit diagram of a multi-band frequency divider according to the embodiment 5 of the invention. InFIG. 7, the multi-band frequency divider500is a half frequency divider which divides a signal input therein into a signal of a half frequency and then outputs the resultant signal therefrom. In the embodiment 5, the same circuits as those described above in the embodiment 1 of the invention are given the same designations and the duplicate description thereof is omitted here. The embodiment 5 is different from the embodiment 1 in that it uses a load circuit37in a master stage501and a load circuit38in a slave stage502.

The load circuit37is composed of an inductor37A, an inductor37B, and a capacity37C. The inductors37A and37B are respectively a spiral inductor (a first spiral inductor). The respective collectors of transistors1and3are connected through the inductor37A to a power voltage Vcc. The respective collectors of transistors2and4are connected through the inductor37B to the power voltage Vcc.

The capacity37C is connected between a point on the inductor37A and a point on the inductor37B (a second spiral inductor). In the load circuit37, as an example, the midpoint of the inductor37A and the midpoint are connected together by the capacity37C (a fifth capacity). Also, the load circuit38is similar in structure to the load circuit37. The inductors37A,37B,38A and38B have the same L value. The capacities37C and38C have the same C value.

As described above, in the present embodiment, since one capacity can be reduced from the load circuits employed in the embodiment 1 according to the invention and the L values of the inductors constituting the transformer can be reduced, the embodiment 5 can reduce the occupation area of the circuits and can provide an equivalent characteristic to the embodiment 1. Also, preferably, the inductors and capacities used in the load circuits of the multi-band frequency divider may have a low Q factor, that is, about 1˜3.

From the foregoing description, according to the multi-band frequency divider of the present embodiment, a dividable frequency band can be broadened with no need for control for varying the load circuits. Elimination of the need for control for varying the load circuits can reduce the scale of the circuit and thus can simplify the circuit. Also, the noise characteristic of the multi-band frequency divider can be improved.

By the way, in the present embodiment, description has been given above of a multi-band frequency divider using bipolar transistors. However, an FET may also be used. Also, in the present embodiment, description has been given above of a multi-band frequency divider for dividing a signal into a signal of a half frequency. However, the divided number of the frequency of a signal may also be other than two.

Also, in the present embodiment, description has been given above of a case in which the inductors of the load circuits are composed of square-shaped spiral inductors. However, they may also be composed of octagonal-shaped or circular-shaped spiral inductors. And, in the present embodiment, description has been given above in such a manner that the capacities of the load circuit are connected to the midpoints of the spiral inductors. However, the capacities may also be connected to other positions on the spiral inductors.

In the present embodiment 6, description will be given below of a multi-band radio set which uses a multi-band frequency divider described in the above-mentioned embodiments 1 to 5.

FIG. 8is a block diagram of a multi-band radio set according to the embodiment 6 of the invention. InFIG. 8, the multi-band radio set is a radio set which is capable of communication using two or more radio communication systems.

An antenna601is connected to a switch602. The switch602is used to switch the connection of the antenna601to a receive part603or to a transmit part604. The receive part603is composed of a low-noise amplifier605and a demodulator606. The transmit part604is composed of a power amplifier607and a modulator608. An oscillator609is connected to a multi-band frequency divider610. The oscillator609includes, for example, two or more LC resonance circuits and is able to output a signal to a wide frequency band. The multi-band frequency divider610inputs a local oscillation signal to the demodulator606and modulator608. A signal process part611is connected to the receive part603and transmit part604.

Now, description will be given below of the receiving operation of the multi-band radio set600. The switch602is connected to the receive part603. A high frequency receive signal received by the antenna601is amplified by the low-noise amplifier605and is then input to the demodulator606. The demodulator606mixes together the high frequency receive signal and local oscillation signal and then inputs a base band receive signal to the signal process part611.

Next, description will be given below of the transmitting operation of the multi-band radio set600. The switch602is connected to the transmit part604. The signal process part611inputs a base band transmit signal to the modulator608. The modulator608mixes together the base band transmit signal and local oscillation signal and then inputs the high frequency transmit signal to the power amplifier607. The high frequency transmit signal is amplified by the power amplifier607and is then radiated from the antenna601. The multi-band frequency divider610can divide the signal of the oscillator609into a wide frequency band and also can supply the divided signal to the receive part603and transmit part604.

Thanks to the above structure, according to the multi-band radio set of the present embodiment, since the multi-band frequency divider divides the output of the oscillator into a wide frequency band, the radio part of the radio set can be simplified as well as can be reduced in size and cost. Also, because the noise characteristic of the radio set can be improved, the receiving characteristic of the radio set can also be improved.

By the way, in the present embodiment, description has been given above of an example in which the frequency divider includes the load circuits. However, the load circuits may only be connected to the frequency divider and it is not always necessary to incorporate the load circuits in the frequency divider. Also, in the present embodiment, the transmission and reception are switched by using a switch. However, there may also be used a duplexer. Further, in the present embodiment, there is employed the structure in which the radio frequencies are converted directly to the base band frequencies. However, there may also be employed other structures than this structure.

Although description has been given heretofore in detail of the invention with reference to the specific embodiments thereof, it is obvious to persons skilled in the art that various changes and modifications are possible without departing from the spirit and scope of the invention.

The present patent application is based on the Japanese patent application (patent application No. 2005-256781) filed on Sep. 5, 2005 and the Japanese patent application (patent application No. 2006-220002) filed on Aug. 11, 2006 and thus the contents thereof are incorporated herein for reference.

INDUSTRIAL APPLICABILITY

The present invention provides an effect that it can vary and broaden a dividable frequency band with no need for control for varying a load circuit. Therefore, the invention can apply effectively to an electronic circuit and a frequency divider for varying and broadening a dividable input frequency band, as well as to a radio set capable of using two or more radio communication systems by using such electronic circuit and frequency divider.