Method of manufacturing a cooling circuit on an integrated circuit chip using a sacrificial material

A method for manufacturing a cooling circuit on at least one integrated circuit chip includes producing a cooling circuit on a first face of the chip. Producing the cooling circuit includes forming a definition pattern of the cooling circuit on the first face of the chip, the pattern having at least one layer of a sacrificial material; coating the pattern with at least one resin layer; and at least partially removing the sacrificial material from the pattern so as to open the cooling circuit.

FIELD OF THE INVENTION

The present invention relates to microelectronic devices and the manufacture thereof. A microelectronic device is understood herein to mean any type of device made using microelectronic means. In addition to devices intended for purely electronic purposes, said devices in particular include micromechanical or electromechanical devices (MEMS, NEMS, etc.) as well as optical or optoelectronic devices (MOEMS, etc.).

It particularly relates to the cooling of integrated circuit chips forming or comprised within such devices. In particularly, the invention allows for the creation of a cooling circuit, which circuit can be used in conjunction with a heat transfer fluid.

TECHNOLOGICAL BACKGROUND

Electronic circuits generate heat energy which must be dissipated. Certain components are low-power components and the heat can escape via the electrical connection elements which are good heat conductors, such as connection members, for example pads of printed circuit boards (PCB). For more high-power components, fin heat sinks are often used, procuring a larger heat exchange surface at the rear of the components. The remainder of the chips is generally coated in a resin layer used to encapsulate and protect the chip.

Moreover, the patent publication FR3030112 A1 discloses a method for manufacturing an assembly between a chip and a support plate, this method comprising producing metal walls defining channels, followed by depositing sacrificial resin between the metal walls, then assembling the chip and the plate, these steps being carried out such that the channels have closed sections defined by the walls and the opposing faces of the chip and the plate. The resin is then removed and the channels are subsequently open. Cooling is permitted through the channels, however at the cost of a relatively complex method (in particular due to the metal walls) that is closely connected to the assembly phase of the chip and the plate.

The patent publication WO 2012/005706 A1 discloses a cooling circuit on the surface of a microelectronic system. It uses side walls formed by electrodeposition delimiting a space for the integration of a sacrificial material and intended to form cooling channels.

There is currently thus a need for an alternative method for producing cooling channels for a chip.

One of the purposes of the invention is to at least partially overcome the drawbacks of the current techniques in order to fulfil this need.

SUMMARY OF THE INVENTION

One non-limiting aspect of the invention relates to a method for manufacturing a cooling circuit on at least one integrated circuit chip, comprising producing a cooling circuit on a first face of the chip.

Advantageously, the method is characterised in that the production of the cooling circuit comprises:forming a definition pattern of the cooling circuit located at least partially on the first face of the chip, said pattern comprising at least one layer of a sacrificial material;forming a coating of said pattern by at least one resin layer; andat least partially removing the sacrificial material from said pattern so as to open the cooling circuit.

Another separable aspect of the present invention relates to a microelectronic device comprising at least one integrated circuit chip, a cooling circuit and a support.

Advantageously, this device is such that the cooling circuit is located on a first face of the chip, the chip being assembled via a second face of the chip, opposite the first face of the chip, to a first face of the support, the walls of the cooling circuit being defined, for a first of the walls, by the first face of the chip, and for the other walls, by channels formed in a resin coating.

Preferably, this device is obtained by the method of the invention.

Thus, the channels of the cooling circuit are defined in the coating resin. This significantly simplifies the manufacture thereof, in particular avoiding the need for complex lithography and etching steps. Moreover, the coating is preferably that which is used to package the chip, i.e. to form a package at least partially surrounding same. It is therefore not an additional part in this case.

Whereas the current technique tends towards solutions involving the dissipation of heat essentially via the materials of the chip, in particular silicon or metals, since they are good heat conductors, the invention adopts an alternative approach with the use of the coating resin. It goes without saying that this material is less effective, from a thermal perspective, however channels having a large section can be formed where necessary; and channel walls made of good thermally-conductive materials can still be used, such as the top wall of the chip, which is generally silicon-based, or such as, in a non-limiting case, a lining on the resin wall of the channels.

The opening of the cooling circuit, by removal of the sacrificial material, allows for fluid circulation within the circuit between two apertures of this circuit. This removal, which is advantageously carried out by melting or dissolution, is simple and uses the necessary apertures of the cooling circuit, which apertures are thus used both during manufacture (to remove the sacrificial material) and during cooling (to allow a coolant to enter and drain).

Another separable aspect of the invention is an embodiment wherein the manufacture of the cooling circuit is collective, that is to say it is carried out on the basis of a support common to a plurality of chips; the chip singularisation phase preferably simultaneously produces an access to the apertures of each circuit, thus significantly simplifying the production steps.

The drawings are provided by way of example and are not intended to limit the scope of the invention.

They constitute diagrammatic views intended to ease the understanding of the invention and are not necessarily to the scale of practical applications. In particular, the relative thicknesses of the layers are not representative of reality.

DETAILED DESCRIPTION

Before providing the detailed description of possible embodiments of the invention, the options that the invention can comprise are listed hereinbelow, these options being provided for information purposes only and are not limiting in nature, which options can be implemented individually or according to any combination therebetween:the removal comprises melting or dissolution of the sacrificial material;the cooling circuit2comprises a first aperture21and a second aperture22, removal comprising an injection of a fluid via the first aperture21and an expulsion of the sacrificial material via the second aperture22;the method comprises the formation of at least one first opening through the coating6configured so as to form an access (for fluid intake) to the pattern4, the removal comprising an injection of a fluid via the at least one first opening, and/or the method comprises the formation of at least one second opening through the coating6configured so as to form an access (for fluid output) to the pattern4, the removal comprising an expulsion of the sacrificial material via the at least one second opening; in such a case, the openings in question are advantageously separate from the apertures of the cooling circuit. There can be a plurality of first openings and/or a plurality of second openings; different types of openings can be combined: some (at least one) can be solely dedicated to injection or removal, with openings (at least one) produced by an aperture of the cooling circuit; more specifically, such an aperture is a specific mode of opening in the broad sense for the injection and/or removal steps. At least one first or second opening can be re-closed after the injection or removal respectively.the formation of said pattern comprises the formation of the at least one layer of a sacrificial material42on the first face of the chip, then the formation of at least one second layer43on the at least one layer of sacrificial material42, the at least one second layer43being configured such that it is not removed during the removal of the sacrificial material;the formation of said pattern comprises the formation of at least one preliminary layer on the first face10of the chip1, then the formation of the at least one layer of a sacrificial material42on the preliminary layer, the at least one preliminary layer being configured such that it is not removed during the removal of the sacrificial material;the method comprises assembling the chip, via a second face of the chip opposite the first face of the chip, on a first face30of a support3before producing the cooling circuit;a formation of an overlay layer on the first face30of the support3configured such that only the first face10of the chip1is left exposed;the formation of said pattern comprises the formation of a first pattern portion40on the first face of the chip1and the formation of a second pattern portion41on an area adjacent to the first face of the chip1, in particular on the exposed face of the overlay layer5;the assembly on the first face30of the support3and the cooling circuit are carried out for a plurality of chips1;the formation of the second pattern portion41is configured so as to connect the two first pattern portions associated with different chips1of the plurality of chips1;a separation of portions of the support each comprising at least one chip1of the plurality of chips, after formation of the coating6and before removal of the sacrificial material;the separation is configured so as to cut the second pattern portions so as to produce the first aperture21and/or the second aperture22of at least one chip1of the plurality of chips.

It is specified that, within the scope of the present invention, the terms “on” or “above” do not necessarily mean “in contact with”. Thus, for example, the deposition of a layer on another layer does not necessarily mean that the two layers are directly in contact with one another, but rather means that one of the layers overlays at least partially the other while being either directly in contact therewith, or while being separated therefrom by a film, or even by another layer or by another element. Moreover, a layer can be constituted by a plurality of sub-layers made of the same material or made of different materials.

It is specified that, within the scope of the present invention, the thickness of a layer or of the chip substrate, or of the support, is measured in a direction perpendicular to the surface along which lies the maximum extension of this layer, of this substrate, or of this support. A lateral direction is understood to be directed perpendicularly to the thickness.

Unless stipulated otherwise, the features described with reference to one embodiment of the invention can be used in other embodiments.

Before providing the description corresponding to the embodiments presented in the figures, it is specified that the invention can be used in different contexts. More specifically, the invention can be implemented for chips collectively disposed on a substrate plate, generally referred to as a wafer, before conventional dicing and packaging of the chips; it can also be implemented on an individual scale for each chip. The invention further applies to structures of microelectronic devices that are more complex than individual chips, in particular for stacks of components on a support, for example of the printed circuit board (PCB) type; in this context, the zone in which the cooling circuit is created by channels defined in resin can be located, for example, in an interstitial space between the board and an upper level of the entire system, or on the top face of the system itself. In another case of a complex system, a plurality of chips can be packaged in a single resin package then fixed to a connection plate, for example of the PCB type. In particular, the packaging technique known as “3D fan-out packaging” falls within the scope of the invention insofar as it has relatively large volumes of resin coating which are favourable for the application of the invention.

To summarise, in general, the invention relates, on the one hand, to the collective manufacturing of chips, and on the other hand to individual manufacturing phases. Moreover, the invention relates as much to final microelectronic devices only including a single chip as it does to more complex devices including an association of juxtaposed and/or superimposed chips and/or an association of at least one chip with other components, for example a printed circuit board, an electrical connection base or an interposer.

The invention allows a cooling circuit to be defined. This definition is understood to mean that the form and location of the circuit (in particular the channels) are determined at certain locations and in particular at the cavities in a resin coating, and facing one face of the chip. This definition of a circuit in the form of a cavity (hollows in the coating and facing the chip) does not prohibit one or more of the layers from overlaying, at the circuit, the coating resin and/or the face of the chip.

One aspect of the invention involves using a polymer material, i.e. a resin, to define the contour of the whole part of the cooling circuit above the first face of the chip. Thus, the coating has a three-dimensional shape, with a wall forming a raised portion projecting onto the first face of the chip1and a wall closing the channels of the cooling circuit, via the top side thereof, opposite the face of the chip. Even though the walls of the cooling circuit can be overlaid with other materials, they are thus structurally defined by a casing made entirely by the resin layer, above the first face of the chip, including in the direction of the height of the circuit, corresponding to a thickness dimension of the substrate and to a dimension perpendicular to the first face of the chip. There is thus no need to use vertical channel walls produced by metal electrodeposition according to existing technologies.

FIG. 1shows a partial view of the constitution of channels20that can be used to create a cooling circuit above a first face10of a chip1. The invention does not make any assumptions as regards the technologies of the chips1. In particular, the latter will advantageously have a base formed by materials of the semiconductor type, and are for example silicon-based. The first face10of the chip will typically be that opposite an electrical connection face having electrical connection elements. The first face10is shown in a planar and homogeneous manner, however this example is not limiting; it can be an electrically insulating portion that is nonetheless a good thermal conductor; in particular, heat sinks can be present in this location.

In this figure, it is noted that the channels20are defined above the material of the chip itself, with preferentially a bottom wall24formed by a portion of the face10of the chip1, a top wall26and a double side wall25; the following description given with reference to the manufacturing steps shown fromFIG. 2onwards explains how the side walls and top wall are defined.

FIG. 2shows one example of the initial disposition of a plurality of chips1on a support3, the second face of the chips, opposite the first face10thereof, being mounted on a first face30of the support3. This support can be a substrate or an electrical connection base, for example an array of connection pads of the ball grid type (ball grid array, BGA).

On this base, in accordance withFIG. 3, the chips1can be encapsulated. In particular, an injection of an encapsulant product can be used, in particular a resin, and for example an epoxy resin. The overlay advantageously extends over the entirety of the first face30of the support3and advantageously entirely submerges the chips1. The encapsulant product is then crosslinked so as to produce a stable and solid moulding in the form of an overlay layer denoted by the reference numeral5.

A thinning of the layer5allows the first faces10of the chips to be exposed. A planarisation technique can be used to carry out the thinning, in particular by grinding, stopping the abrasion when the first face10of the chips is reached. The result of this step, shown inFIG. 4, is advantageous insofar as a top surface of the overlay layer5is obtained which is planar and aligned with the first face10of the chips. This is seen to be useful for the formation of the cooling circuit. A physiognomy of the overlay layer5, equivalent to that ofFIG. 4, can be obtained by methods different to full overlay and thinning; in particular, moulding can also be carried out, whereby one part of the mould is placed in direct contact with the first face of the chips; they are thus not overlaid, but the moulding material surrounds same and overlays the first face30of the support.

On this base, patterns4can be created which allow the geometry of the cooling circuits2associated with the chips1to be defined. This is shown in the graphical representation inFIG. 5. At least one portion of the first face10of each chip is overlaid by a pattern, corresponding to the first pattern portion given the reference numeral40. Another part of the patterns4corresponds to a second portion41extending on either side of the first portions40and in particular allowing the first portions40to be connected. In general, a first portion40forms a fluid passage circuit above the corresponding chip. It can comprise a plurality of channels20, preferably parallel, the channels joining together at the ends thereof by fluid manifold parts. It is understood that a first manifold allows for fluid intake in the channels, whereas a second, preferably located opposite the first, provides for fluid output.

According to the invention, a sacrificial material is used to form, at least partially, a part of the thickness of the pattern. Thus, in another phase of the method, the removal of the sacrificial material will define, in the form of hollows, the cooling circuit.

In a first approach, the sacrificial material is removed by the melting thereof; in this context, materials having a relatively low melting point, preferably far from a degradation temperature of the chip are advantageously used. At the same time, the melting point is ideally higher than the curing temperature of the resins used for the coating. For example, metal materials, in particular alloys, can satisfy these conditions. Preferably, this can include alloy pastes adapted to screen printing, such as SnAg, SnAgCu, or SnZn, etc., for example an alloy comprising 96.5% tin and 3.5% silver providing a satisfactory melting point of about 225° C. Alloys with a lower melting point (120-200° C.) can also be cited, formed by a mixture of indium, tin and bismuth. These must be used with epoxy moulding resins at a lower cross-linking temperature (for example 80-120° C.).

In another approach, the sacrificial material is removed by the dissolution thereof; it is the fluid derived from the dissolution that removes the sacrificial material; in this context, use can be made of any material that is easily soluble without degrading the surrounding materials or making same soluble. Papermaking pulp, sugar, salt or even porous foams can be used.

The use of porous foams paves the way for numerous materials, including porous polymers and metal foams. The porosity allows for reduced etching durations compared to a solid material by facilitating the circulation of the chemical through the pores: solvent (for example acetone) for polymers and acid (for example aqua regia) for metals. The use of an encapsulating layer43for encapsulating the sacrificial material can, in such a case, also be used to isolate the etching chemical from the coating resin. In such a case, a method for depositing the layer43that is not or that is barely shaping is used, such as lamination so as not to take on the form of the pores. In the case wherein no encapsulating layer43is used, the sacrificial material is adapted to the coating resin. A coating resin is thus chosen to have a “filler” (commonly silica particles) size that is, where possible, greater than the size of the pores of the sacrificial material and a high viscosity so as not to fill the pores with resin.

The patterns4are formed as raised portions projecting above the first faces10of the chips1and the overlay layer5. In particular, this does not involve portions hollowed out from the chips, meaning that there is no need to carry out photolithography and etching steps using silicon-type material in order to produce the channels of the invention.

In particular, methods of the screen printing type can be implemented. In particular, a drawn mask defines the desired pattern shapes. Printing with a screen printing paste is then carried out. 2D printing or 3D printing can also be implemented, or even electrochemical deposition (for example for metal materials). The 3D printing has the advantage of being able to produce a three-dimensional cooling circuit in a single step, whereas a plurality of mask levels and a plurality of encapsulations are required to produce the same three-dimensional circuit with a screen printing type method.

In the step corresponding toFIG. 6, a coating6is formed. Potentially, it is produced using a material that is equivalent to that of the overlay layer5. The material used is preferentially a resin, for example an epoxy resin. The coating6is configured so as to overlay the entirety of the patterns4formed such that they overhang the top face of the overlay layer5. By way of illustration, the thickness of the coating layer6can be greater than 10 μm, or even greater, for example more than 100 μm. The coating6can be produced in a similar manner to that described for the layer5, whereby an injection of material in liquid resin form can be implemented, followed by crosslinking by annealing. Advantageously, the materials of the layer5and of the layer6will be merged so as to produce a coherent and one-piece assembly.

It should be noted that the coating6overlays the patterns while preferentially constituting a packaging layer for each chip.

The chips1can then be separated, in particular by conventional dicing. Advantageously, dicing is carried out so as to expose parts that will be used as an inlet and outlet for the channels20of the cooling circuit4. More specifically,FIG. 7shows that a chip, with a corresponding portion of the support3, of the overlay layer5and of the coating6, has been separated from the others. The layer6is shown transparently so as to allow the underlying pattern4to appear. Parallel channels described hereinabove are present and the ends thereof join together at two fluid collection portions40,41, one whereof will be used at the fluid inlet and the other at the fluid outlet. The dicing here has been configured so as to expose, along the thickness of the coating6, the edge of the first and second portions40,41.

An inlet and an outlet are thus obtained for removing the sacrificial material at least partially forming the pattern4. Thus, the first inlet40can be connected by a pressurised liquid or gas pipe (for example nitrogen, in particular at a pressure that lies in the range 1 to 2 MPa, such as 1.4 MPa). Then, in the case of an embodiment implementing melting, heating is carried out, for example by placing the assembly comprising the chip in a furnace and by bringing it to above the melting point of the sacrificial material. In the case cited hereinabove using an alloy of tin and silver, a temperature of 250° C. is satisfactory. The injection of a fluid via the first portion40(or via the second41) allows the molten sacrificial material to be propelled towards the second portion41(or the first40), thus forming an outlet of the circuit for removing the sacrificial material. The latter can be recycled, in particular if this is a fusible metal. In particular, sacrificial materials can be chosen that have a melting temperature that lies in the range 200 to 240° C. In the option involving the removal of the sacrificial material by dissolution, an aqueous liquid solution can be fed in via the first portion40, the sacrificial material can be gradually dissolved along the channels, and the solution can be drained via the second portion41for example.

FIG. 8shows the result of the removal of the sacrificial material, revealing, shown transparently through the coating layer6, a cooling circuit2including, in the example, a plurality of channels20, between a first aperture21and a second aperture22. It is understood from the above description that the circuit2has a height, in the thickness dimension of the layers and of the chip, made by hollowing out the material of the coating6. Thus, the invention is based on the excavation of the coating material, above the chip thanks to the sacrificial material.

It should be noted that not all of the sacrificial material must necessarily be removed. For example, a residual part of the sacrificial material can remain at at least one of the walls of the circuit2. These residues can potentially increase the thermal conductivity of the circuit, or even protect the surrounding materials, and in particular the coating resin6, from external attack, for example resulting from the coolant. However, removal must allow the cooling circuit to be opened, that is to say fluid communication to be provided between the first aperture21and the second aperture22.

The embodiment corresponding to the sequence inFIGS. 2 to 8relates to collective manufacture on the basis of a BGA-type support. The result shown inFIG. 8can also be achieved by processing the chips individually. In the illustration shown inFIG. 9, a collective method has been produced for a plurality of chips2on the basis of a wafer-type substrate. Moreover, a separation zone23is shown, at which the singularisation of the chips further allows the ends of the first and second portions40,41of the patterns to be opened, which will be used to form the apertures21,22. One alternative embodiment is possible, even in the absence of zones41. The moulding is pierced by the layer6in order to achieve the pattern of the circuit by forming openings (at least one first opening for fluid intake and/or at least one second opening for output), for example at microchannel nozzles. The side walls are thus left whole and without cavities after dicing. The inlets and the outlets are thus advantageously vertical (along the thickness of the chip) in this scenario. They pass through the thickness of the coating6from end to end. In the case of removal by melting, at least one second opening can suffice, simply to remove the material in the liquid phase.

FIGS. 10ato 10egive another example configuration of the patterns4and of the method of the invention.

FIG. 10adiagrammatically shows a cross-section of a chip1at the first face10thereof. InFIG. 10b, the pattern parts have been built in the form of a layer42of a sacrificial material; the portions represented can correspond to the section of the two parts intended to form channels. It goes without saying that the layer42can be formed by a plurality of sub-layers deposited successively.

Then, a second layer43is formed so as to overlay the layer of sacrificial material42, the set of layers forming the complete definition of the pattern4. It goes without saying that the second layer43can be formed by a plurality of sub-layers deposited successively. In the case shown, the second layer43entirely overlays the layer42, however this is not mandatory. Moreover, in the example shown, the layer43also overlays the first face10of the chip, outside the layer42, however this is not mandatory.

For example, the second layer43can be deposited by chemical or physical vapour deposition techniques; the technique used will depend on the desired materials. The material of the layer43can be a better thermal conductor than the coating resin and/or a waterproof material.

InFIG. 10d, the coating6is formed as described hereinabove. The latter is in contact with the second layer43; advantageously, the sacrificial material of the layer42is isolated from the coating resin6. As described hereinabove, the sacrificial material42is removed so as to produce an excavation within the volume of the coating6;FIG. 10eshows the result thereof. In this instance, the side walls25and the top wall26, in particular of the channels20, correspond to the material of the second layer43. As described hereinabove, the bottom wall24corresponds to the material of the first face10of the chip. It should be noted that the coating6overlays both the sides (directed with a non-zero component according to the thickness dimension of the substrate) and the tip of the patterns (which is the highest part of these patterns, which is, for example, a top face of the patterns, which can be planar and potentially parallel to the first face10). The coating6forms a continuous and integral casing on either side of the pattern defined by the sacrificial material42above the first face10.

In general, the second layer43can fulfil at least one of the following functions:increase thermal conduction between the substrate and the heat transfer fluid;act as an impervious barrier to prevent alteration or swelling of the moulding;act as a chemical barrier if a heat transfer fluid could react with the moulding;limit erosion of the walls of the moulding; andmake the surface hydrophilic to prevent air/gas bubbles from remaining stuck to the wall during cooling if liquid.

According to another possibility, not shown, which can be combined with or implemented as an alternative to the embodiments corresponding toFIGS. 10ato 10e, a preliminary layer can be deposited before the formation of the layer of sacrificial material42, so as to at least partially cover the first face10of the chip.

At the end of the process of the invention, the microelectronic device thus constituted on the basis of a chip1can be cooled by the circulation of a coolant, in particular a liquid, within the circuit2.

For the phase involving the removal of the sacrificial material, one of the apertures21,22can be assembled with a fluid intake pipe. For example, a capillary tube connected, in a sealed manner, to the corresponding aperture, can be installed. Advantageously, this pipe is conserved and reused for the coolant intake.

It should be noted that the section of the portions forming the cooling circuit2can be high; for example, the height of the channels can reach up to 50 microns, in particular between 50 and 150 microns; the width thereof is, in general, greater than 30 microns, or even greater than 50 microns, and in particular potentially lies in the range 50 to 1,000 microns. Such dimensions are achieved without altering or modifying the chips themselves.

REFERENCES