Substrate for mounting semiconductor chip, mounting structure of semiconductor chip, and mounting method of semiconductor chip

A substrate for mounting a semiconductor chip is formed as a multilayer substrate by alternately laminating insulation layers and wiring layers. Wires of the wiring layers are electrically connected through a via-hole for interlayer continuity. A through-hole provided through the insulation layer of the outermost surface layer is formed. A bump is inserted in the through-hole to a bump allocating position of the semiconductor chip to be mounted in the insulation layer of the outermost surface layer. A portion of the wire in the wiring layer of the outermost surface layer is projected to the internal side of through-hole at the aperture of the through-hole.

CROSS REFERENCE TO RELATED APPLICATIONS

This application is based upon, claims the benefit of priority of, and incorporates by reference the contents of Japanese Patent Application No. 2003-397794 filed on Nov. 27, 2003 and Japanese Patent Application No. 2004-210626 filed on Jul. 16, 2004.

FIELD OF THE INVENTION

The present invention relates generally to a substrate for mounting a semiconductor chip, a mounting structure of semiconductor chip, and a mounting method of semiconductor chip.

BACKGROUND OF THE INVENTION

Wire bonding and flip chip mounting have been proposed as methods for mounting a semiconductor chip.FIG. 28Aillustrates a cross-sectional view of a flip chip mounted to a laminated substrate100. In the flip chip mounting, a semiconductor chip110is mounted face down on the substrate100and connected to the substrate100through bumps111. When high density mounting is required, a bonding pad is unnecessary for the periphery of semiconductor chip110and the flip chip which requires less occupation area on the substrate100of the semiconductor chip110is suitable. Moreover, as illustrated inFIG. 28B, as the flip chip structure to the single layer substrate120, the chip110is allocated over the substrate120and bumps111and wires121are joined.

As a multilayer wiring substrate100for flip chip mounting required to realize high density wiring, interlayer continuity is realized not by using a through-hole (TH) which is provided through all layers but by an inner via-hole (IVH)101which may be individually arranged for each layer for enabling high density wiring. The inner via-hole (IVH)101can be formed to the laminated substrate which is represented by a ceramics multilayer substrate. The ceramics multiplayer substrate can be manufactured, as illustrated inFIG. 29, through the boring process of insulation base material, paste printing process, simultaneous laminating process, and simultaneous thermal baking process.

In recent years, a mobile computer is more and more required to realize reduction in size through the high density mounting technology because of increase in various control computers due to introduction of sophisticated functions of automobile (using electronic circuits) and reduction in mounting space of computer due to the requirement for expansion of the residential space. Therefore, for actual mounting of the semiconductor chip, adaptation of the flip chip bonding technology is required to realize higher density mounting. However, in the flip chip bonding, the substrates100and120and semiconductor chip110are bonded, as illustrated inFIGS. 28A and 28B, via a very small gap G (20 μm to 70 μm) through the bump111. Therefore, stress generated due to difference in the line expansion coefficients of the semiconductor chip110and substrates100and120is concentrated to the bonding area of the bump111and substrates100and120, resulting in the problem that the connecting portion is broken when the applied temperature is repeatedly changed. Because of such problem, application into such mobile computer to be placed under the severe operation environment becomes difficult.

SUMMARY OF THE INVENTION

The present invention has been proposed under the background described above and an object of the present invention is therefore to provide a substrate for mounting a semiconductor chip which assures higher connection reliability with a newly proposed structure, a mounting structure of semiconductor chip, and a mounting method of semiconductor chip.

A substrate for mounting a semiconductor chip according to a first aspect is characterized in that a through-hole provided through at least an insulation layer of the outermost surface layer is formed to insert a bump to the bump allocating position of semiconductor chip to be mounted at least in the insulation layer of the outermost surface layer and a part of wire at the wiring layer of the outermost surface layer is projected to the internal side of the through-hole at the aperture thereof. According to this substrate for mounting semiconductor chip, since the wire of the connecting portion to the bump by the flip chip connection is not fixed to the insulation layer (base material), the stress alleviating capability of wiring portion is improved to ensure higher reliability of the connection.

According to a second aspect, in the substrate for mounting semiconductor chip according to the first aspect, when the wire for flip chip connection is provided at the bottom portion of the through-hole provided through at least the insulation layer of the outermost surface layer, connection with the bump can be made even at the bottom surface of the through-hole, connecting area of the bump and wire can be increased, and connection reliability can also be improved.

According to a third aspect, in the substrate for mounting semiconductor chip according to the first or second aspect, the through-hole provided through at least the insulation layer of the outermost surface layer is also provided through the insulation layer on the internal layer side than the insulation layer of the outermost surface layer, and when a part of wire of wiring layer on the internal layer side than the wiring layer in the outermost surface layer is projected to the through-hole from the side wall of the through-hole, the connecting area to the bump can be increased and connection reliability can also be improved by providing the wire to be projected also from the side wall of the through-hole.

The mounting structure of semiconductor chip according to the fourth aspect is characterized in that the semiconductor chip provided with the bump is flip chip connected, under the condition that the bump and through-hole are matched in the position, to the substrate for mounting semiconductor chip according to any of the first to third aspects, and the wire which is deformed because the bump is inserted into the through-hole is electrically connected to the bump. According to this mounting structure of a semiconductor chip, the wire is deformed with the bump when the bump is inserted into the through-hole and is connected to the side surface of bump. In this case, since the wire of connecting portion to the bump is not fixed to the insulation layer (base material), the stress alleviating capability can be given to the wiring portion and thereby higher connection reliability can be attained.

The mounting method of semiconductor chip according to a fifth aspect is characterized in that the semiconductor chip provided with the bump is flip chip connected to the substrate for mounting semiconductor described in any of the first to third aspects through electrical connection of deformed wire and bump, while the bump is inserted into the through-hole while application of ultrasonic wave vibration and thereby a metal coupling is formed to the connecting portion of the bump and wire under the condition that the bump and through-hole are matched in the position. According to this mounting method of a semiconductor chip, since the bump is placed in contact with the newly generated surface which is generated by sharpening the surfaces of the bump and wire due to application of the ultrasonic wave vibration, the bump and wire surely form the metal coupling to improve the connection strength. As a result, connection reliability can be improved.

According to a sixth aspect, in the mounting structure of semiconductor chip according to the fourth aspect, when the connecting portion of the bump and wire in the through-hole is filled with silver paste, a connecting resistance can be lowered by filling the connecting portion of the bump and wire with the silver paste. Moreover, connection between the bump and wire can be reinforced. In addition, even if direct connection between the bump and wire is broken, since the indirect electrical connection is maintained with the silver paste, connection failure does not occur and higher connection reliability can be realized.

The substrate for mounting semiconductor chip according to a seventh aspect is characterized in that the through-hole provided through at least the insulation layer of the outermost surface layer is formed to insert the bump to the bump allocating position of semiconductor chip to be mounted in at least the insulation layer of the outermost surface layer, the wire for connection of bump is provided at the bottom portion of the through-hole, and at least the insulation layer of the outermost surface layer is formed of thermoplastic resin. According to this substrate for mounting semiconductor chip, the bump is accommodated within the through-hole and the substrate is connected with the bump at the bottom portion of through-hole. Accordingly, the active surface of the semiconductor chip can be placed in contact with the surface layer of substrate. Moreover, since the surface layer of the substrate is formed of thermoplastic resin, the connecting portion and active surface of semiconductor chip can be sealed simultaneously with the connection of bump with the heat and applied pressure at the time of flip chip mounting. Moreover, since the insulation layer of the outermost surface layer of the substrate is used as an under-fill material, stress at the connecting portion due to difference in the thermal expansion coefficients of chip and substrate can be alleviated and thereby higher connection reliability can be attained. In addition, the flip chip connection process can be simplified.

The substrate for mounting semiconductor chip according to an eighth aspect is characterized in that the through-hole provided through two insulation layers including at least the insulation layer of the outermost surface layer is formed to insert the bump to the bump allocating position of the semiconductor chip to be mounted in the two insulation layers including at least the insulation layer of the outermost surface layer, a part of wire of the wiring layer sandwiched by two insulation layers including at least the insulation layer of the outermost surface layer, to which the through-hole is formed, is projected into the through-hole, and at least the insulation layer of the outermost surface layer is formed of the the thermoplastic resin. According to this substrate for mounting the semiconductor chip, since the wire of the connecting portion to the bump by the flip chip connection is not fixed to the insulation layer (base material), the stress alleviating capability of the wiring portion can be improved. Moreover, since the surface layer of the substrate is formed with the thermoplastic resin, the connecting portion and active surface of semiconductor chip can be sealed simultaneously with connection of the bump with the heat and applied pressure at the time of flip chip mounting. In addition, since the insulation layer of the outermost surface layer of the substrate is used as the under-fill material, stress generated at the connecting portion due to difference in the thermal expansion coefficients of chip and substrate can be alleviated and thereby connection reliability can also be improved. Moreover, the flip chip connection process can also be simplified.

According to a ninth aspect, in the substrate for mounting semiconductor chip of the eighth aspect, since the wire for flip chip connection is provided at the bottom portion of the through-hole, connection with the bump can be realized even at the bottom surface of through-hole, connection area between the bump and wire can be increased, and connection reliability can also be improved.

The mounting structure of semiconductor chip according to a tenth aspect is characterized in that since the semiconductor chip provided with the bump is flip chip connected, under the condition that the bump and through-hole are matched in the position, to the substrate for mounting semiconductor chip according to any of the seventh to ninth aspects, and the wire and bump are electrically connected under the condition that since the bump is inserted into the through-hole, the active surface of semiconductor chip and the substrate for mounting semiconductor chip are bonded with the thermoplastic resin insulation layer of the outermost surface layer of the substrate for mounting semiconductor chip. According to this mounting structure of semiconductor chip, the wire and bump are connected when the bump is inserted into the through-hole. Moreover, since the insulation layer of the outermost surface layer of substrate is used as the under-fill material, stress generated at the connecting portion due to difference in the thermal expansion coefficients of the chip and substrate can be alleviated and thereby connection reliability can be improved.

The mounting method of semiconductor chip according to an eleventh aspect is characterized in that the semiconductor chip provided with the bump is flip chip connected to the substrate for mounting semiconductor chip according to any of the seventh to ninth aspects under the condition that the bump and through-hole are matched in the position, and the bump on the chip side and wire on the substrate side are electrically connected while the active surface of the semiconductor chip and substrate for mounting semiconductor chip are bonded with the thermosetting resin insulation film of the outermost surface layer of the substrate for mounting semiconductor chip by inserting the bump into the through-hole through application of at least heat and pressure. According to this mounting method of semiconductor chip, the active surface of the semiconductor chip can be placed in contact with the surface layer of substrate by accommodating the bump into the through-hole and making connection to the bump. Since the surface layer of the substrate is formed of the thermosetting resin, the connecting portion and active surface of the semiconductor chip can be sealed simultaneously with connection of bump with the heat and applied pressure at the time of flip chip connection. Moreover, since the insulation layer of the outermost surface layer of substrate is used as the under-fill material, higher connection reliability can be attained. Moreover, the flip chip connection process can be simplified.

According to a twelfth aspect, in the mounting method of semiconductor chip according to the eleventh aspect, when a metal coupling is formed at the connecting portion of the bump and wire through application of ultrasonic wave vibration, when the heat and pressure are applied, even in the longest period, from the time of the contact between the bump and the bottom portion of the through-hole until the time when the active surface of the semiconductor chip is in contact with the insulation layer of the outermost surface layer of the substrate for mounting semiconductor chip, the surfaces of bump and wire are sharpened with the ultrasonic wave vibration and the newly generated surfaces are placed in contact with each other. Accordingly, the metal coupling of bump and wire can surely be formed and thereby connection strength can be improved. Therefore, reliability of flip chip connection can further be improved. Moreover, since the ultrasonic wave vibration is not applied in the stage where the active surface of the semiconductor chip is placed in contact with the substrate surface, the simultaneous sealing with the thermoplastic resin at the surface layer can be realized and processes can also be simplified without resulting in any damage on the active surface of the semiconductor chip.

According to a thirteenth aspect, in the mounting structure of semiconductor chip according to the tenth aspect, when the connecting portion of the bump and wire is filled with the silver paste within the through-hole, the connection resistance can be lowered by filling the connecting portion of the bump and wire with the silver paste. Moreover, connection of bump and wire can be reinforced. Moreover, even when the direct connection of bump and wire is broken, connection failure does not occur and higher connection reliability can be realized because the electrical connection is maintained directly with the silver paste.

The substrate for mounting semiconductor chip according to a fourteenth aspect is characterized in that the through-hole provided through the insulation base material is formed to insert the bump at the bump allocating position of the semiconductor chip to be mounted and a part of wire is projected to the aperture of the through-hole at the aperture of the through-hole. According to this substrate for mounting semiconductor chip, since the wire of connecting portion to the bump by the flip chip connection is not fixed to the insulation base material, the stress alleviating capability of wiring portion can be improved and higher connection reliability can also be attained.

The mounting structure of semiconductor chip according to a fifteenth aspect is characterized in that the semiconductor chip provided with the bump is flip chip connected to the substrate for mounting semiconductor chip according to the fourteenth aspect, under the condition that the bump and through-hole are matched in the position, from the surface where a part of wire is projected to the aperture of the through-hole and the wire which is deformed because the bump is inserted into the through-hole is electrically connected to the bump. According to this mounting structure of semiconductor chip, since the wire of connecting portion to the bump with the flip chip connection is not fixed to the insulation base material, the stress alleviating capability of wiring portion can be improved and thereby the higher connection reliability can also be attained.

The mounting method of semiconductor chip according to a sixteenth aspect is characterized in that the semiconductor chip provided with the bump is flip chip connected to the substrate for mounting semiconductor chip according to the fourteenth aspect from the surface where a part of wire is projected to the aperture of the through-hole by electrically connecting the deformed wire and the bump, while the bump is inserted into the through-hole during application of ultrasonic wave vibration and a metal coupling is thereby formed at the connecting portion of the bump and wire under the condition that the bump and through-hole are matched in the position. According to this mounting method of semiconductor chip, since the surfaces of the bump and wire are sharpened with the ultrasonic wave vibration and thereby newly generated surfaces are placed in contact, the bump and wire surely form the metal coupling and thereby connection strength can be improved. Accordingly, higher connection reliability can be attained.

The mounting structure of semiconductor chip according to a seventeenth aspect is characterized in that the semiconductor chip is bonded, in the face down manner, to the substrate for mounting semiconductor chip according to the fourteenth aspect from the surface opposing to the surface where a part of wire is projected to the aperture of the through-hole, under the condition that the electrode and through-hole of the semiconductor chip are matched in the position, and the wire, which is deformed because the bump is inserted into the through-hole from the surface where a part of wire is projected to the aperture of through-hole and is bonded to the electrode of semiconductor chip, is electrically connected to the bump. According to this mounting structure of semiconductor chip, since the wire of the connecting portion to the bump by the flip chip connection is not fixed to the insulation base material, the stress alleviating capability of wiring portion can be improved and thereby higher connection reliability can also be attained.

According to an eighteenth aspect, in the mounting structure of semiconductor chip according to the seventeenth aspect, when the end part of the bump is wire-bonded to the wire, electrical connection of thinner wire can be attained and thereby the thin wire is capable of having the excellent stress alleviating property and reliability of this thin wire can be attained.

The mounting method of semiconductor chip according to a nineteenth aspect is characterized by comprising a first step for mounting the semiconductor chip, in the face down manner, through a bonding agent to the surface opposing to the surface where a part of wire is projected to the aperture of the through-hole of the substrate for mounting semiconductor chip according to a fourteenth aspect, under the condition that the electrode and through-hole of the semiconductor chip are matched in the position, and a second step for bonding the bump to the electrode of semiconductor chip by inserting the bump into the through-hole from the surface where a part of wire is projected to the aperture of through-hole in the substrate for mounting semiconductor chip. According to this mounting method of semiconductor chip, since the wire of the connecting portion to the bump by the flip chip connection is not fixed to the insulation base material, the stress alleviating capability of wiring portion can be improved and thereby higher connection reliability can also be attained. Moreover, mounting of bump to the electrode and connection of bump and wire can be conducted simultaneously in the bonding process of bump and thereby the process can be simplified.

According to a twentieth aspect, in the mounting method of semiconductor chip according to the nineteenth aspect, when a structural member of a bump projected from the surface of the substrate for mounting semiconductor chip is pressed and crushed from the surface side where a part of wire is projected to the aperture of through-hole after the bump is bonded to the electrode of semiconductor chip, since the bump is crushed (plastically deformed), the bonding area of the wire projected to the aperture of through-hole and bump is increased, and thereby reliability of electrical connection can be improved.

The substrate for mounting semiconductor chip according to a twenty-first aspect is characterized in that the through-hole provided through the insulation base material is formed to insert the end part of bonding tool at the position where the electrode of semiconductor chip to be mounted is allocated and a part of wire is projected to the aperture of the through-hole at the aperture of the through-hole. According to this substrate for mounting semiconductor chip, since the wire of the connecting portion to the electrode on the side of chip by flip chip connection is not fixed to the insulation base material, the stress alleviating capability of wiring portion is improved and thereby higher connection reliability can be attained.

The mounting structure of semiconductor chip according to a twenty-second aspect is characterized in that the semiconductor chip is bonded, in the face down manner, to the substrate for mounting semiconductor chip according to the twenty-first aspect from the surface opposing to the surface where a part of wire is projected to the aperture of the through-hole under the condition that the electrode and through-hole of the semiconductor chip are matched in the position, the wire projected to the aperture is bonded to the electrode of semiconductor chip, and the wire and electrode of semiconductor chip are electrically connected. According to this mounting structure of semiconductor chip, since the wire of connecting portion to the semiconductor chip is not fixed, the stress alleviating capability of wiring portion can be improved and thereby higher connection reliability can be attained.

The mounting structure of semiconductor chip according to a twenty-third aspect is characterized in that the semiconductor chip where a stud bump is formed to an electrode is bonded, in the face down manner, to the substrate for mounting semiconductor chip according to twenty-first aspect from the surface opposed to the surface where a part of the wire is projected to the aperture of the through-hole under the condition that the electrode and through-hole of the semiconductor chip are matched in the position, the wire projected to the aperture is bonded to the stud bump of the semiconductor chip, and thereby the wire and electrode of semiconductor chip are electrically connected. According to this mounting structure of semiconductor chip, since the wire of the connecting portion to the semiconductor chip is not fixed to the insulation base material, the stress alleviating capability of wiring portion can be improved and thereby higher connection reliability can be attained. Moreover, the wire projected to the aperture of the through-hole sticks to stud bump due to the plastic deformation of stud bump. Accordingly, more strong and stable connection can be obtained.

The mounting structure of the semiconductor chip according to a twenty-fourth aspect is characterized in that the semiconductor chip where a plated bump is formed to an electrode is bonded, in the face down manner, to the substrate for mounting a semiconductor chip according to a twenty-first aspect from the surface opposed to the surface where a part of wire is projected to the aperture of through-hole under the condition that the electrode and through-hole of the semiconductor chip are matched in the position, the wire projected to the aperture is bonded to the plated bump of semiconductor chip, and the wire and electrode of semiconductor chip are electrically connected. According to this mounting structure of semiconductor chip, since the wire of the connecting portion to the semiconductor chip is not fixed to the insulation base material, the stress alleviating capability of the wiring portion can be improved and thereby higher connection reliability can be attained. Moreover, since the plated bump can be formed simultaneously under the wafer condition, manufacturing cost can be lowered in comparison with that of the stud bump.

The mounting method of semiconductor chip according to a twenty-fifth aspect is characterized by comprising the first process for mounting, in the face down manner, through a bonding agent, the semiconductor chip to the surface opposing to the surface where a part of the wire is projected to the aperture of through-hole in the substrate for mounting a semiconductor chip according to the twenty-first aspect under the condition that the electrode and through-hole of the semiconductor chip are matched in the position, and the second process for bonding the wire projected to the aperture to the electrode of semiconductor chip using the bonding tool from the surface where a part of wire is projected to the aperture of through-hole in the substrate for mounting the semiconductor chip. According to this mounting method of semiconductor chip, since the wire of the connecting portion to the semiconductor chip is not fixed to the insulation base material, the stress alleviating capability of wiring portion can be improved and higher connection reliability can also be attained.

In the invention according to a twenty-sixth aspect, the insulation base material is formed of thermoplastic resin base material in the substrate for mounting semiconductor chip according to the fourteenth or twenty-first aspects. Moreover, in the twenty-seventh aspect, the substrate for mounting semiconductor chip according to the twenty-sixth aspect is used in the mounting structure of semiconductor chip according to the seventeenth, eighteenth, twenty-second, twenty-third, and twenty-fourth aspects. According to the twenty-sixth and twenty-seventh aspects, since the thermoplastic resin base material is used, the semiconductor chip can be bonded to the base material through the thermal compression bonding. Accordingly, the bonding agent is not required and the coating process of bonding agent (bonding agent supplying process) can be eliminated.

The mounting method of semiconductor chip according to the twenty-eight aspect is characterized by comprising the first process for thermal compression bonding of the semiconductor chip, in the face down manner, to the insulation base material formed of the thermoplastic resin base material on the surface opposing to the surface where a part of wire is projected to the aperture of through-hole in the substrate for mounting semiconductor chip according to the fourteenth aspect under the condition that the electrode and through-hole of the semiconductor chip are matched in the position, and the second process for inserting the bump into the through-hole and bonding the bump to the electrode of semiconductor chip from the surface where a part of wire is projected to the aperture of through-hole in the substrate for mounting semiconductor chip. According to this mounting method of semiconductor chip, since the wire of the connecting portion to the bump by the flip chip connection is not fixed to the insulation base material, the stress alleviating capability of wiring portion can be improved and higher connection reliability can be attained. Moreover, in the bump bonding process, mounting of bump to the electrode and connection between the bump and wire can be performed simultaneously and thereby the processes can be simplified. In addition, the semiconductor chip can be bonded to the base material through the thermal compression bonding by using the thermoplastic resin base material. Accordingly, the bonding agent is no longer required and the coating process of bonding agent (bonding agent supply process) can be eliminated.

The mounting method of a semiconductor chip according to the twenty-ninth aspect is characterized by comprising the first step for the thermal compression bonding, in the face down manner, of the semiconductor chip to the insulation base material formed of the thermoplastic resin base material on the surface opposing to the surface where a part of wire is projected to the aperture of through-hole in the substrate for mounting semiconductor chip according to the twenty-first aspect, in which the insulation base material is formed of thermoplastic resin base material, under the condition that the electrode and through-hole of the semiconductor chip are matched in the position, and the second process for bonding the wire projected to the aperture to the electrode of semiconductor chip, using the bonding tool, from the surface where a part of the wire is projected to the aperture of the through-hole in the substrate for mounting semiconductor chip. According to this mounting method of a semiconductor chip, since the wire of the connecting portion to the semiconductor chip is not fixed to the insulation base material, the stress alleviating capability of the wiring portion can be improved and thereby higher connection reliability can be attained. Moreover, since the thermoplastic resin base material is used, the semiconductor chip can be bonded to the base material through the thermal compression bonding. In addition, the bonding agent is no longer required and the coating process of bonding agent (bonding agent supplying process) can be eliminated.

BRIEF DESCRIPTION OF THE PREFERRED EMBODIMENTS

The first embodiment embodying the present invention will be described below in accordance with the accompanying drawings.

InFIG. 1, a substrate1for mounting a semiconductor chip and a semiconductor chip20before the mounting in this first embodiment are illustrated. A mobile computer (electronic control apparatus) is constructed by the substrate1for mounting semiconductor chip, the semiconductor chip20, and the like. The semiconductor chip20is provided with bumps (projected electrodes)21.

FIGS. 2A and 2Bare partially enlarged views of the substrate1for mounting the semiconductor chip.FIG. 2Ais a plan view of the substrate1, whileFIG. 2Bis a cross-sectional view along the line IIB—IIB ofFIG. 2A. In theseFIGS. 2A and 2B, the substrate1for mounting the semiconductor chip is formed by alternately stacking the insulation layers (base materials)2a,2b, etc. and wiring layers3a,3b,3c, etc. to the insulation layers (base materials)2a,2b, etc. Via-holes4for interlayer continuity are formed for electrically connecting the wire of each layer. The wire of each layer is electrically connected by the via-holes4, more specifically, with the conductor5filling the via-hole4.

Wires6and7are formed with the wiring layer3aof the outermost surface layer and a through-hole (cavity)10is formed to the connecting position of the wires6and7in the insulation layer2aof the outermost surface layer and semiconductor chip20. The plane of the through-hole (cavity)10has the circular shape. The wires6and7are projected as the projected portions11a,11bat the upper surface of the through-hole (cavity)10. Each through-hole (cavity)10may be individually allocated in each connecting point or a continuous through-hole may also be formed for a plurality of connecting points. The projected portions11a,11bof the wires6and7at the surface layer may be formed by edging (not illustrated) only one wire at the center of the connecting point as illustrated inFIGS. 2A and 2B.

As described above, the substrate1for mounting the semiconductor chip is formed as the multilayer substrate by alternately stacking the insulation layers2a,2b, etc. and wiring layers3a,3b, etc. The wires by each wiring layer3a,3b,3care electrically connected by a via-hole4for interlayer continuity and the semiconductor chip20inFIG. 1is flip chip mounted. Moreover, over the insulation layer2aof the outermost surface layer, the through-hole10is formed to insert the bump21to the allocating position of bump21of the semiconductor chip20and a part of the wires6and7in the wiring layer3aof the outermost surface layer is projected to the inside of through-hole10at the aperture of through-hole10.

Next, the processes for flip chip mounting the semiconductor chip20ofFIG. 1will be described using the substrate1for mounting semiconductor chip ofFIGS. 2A and 2B.

As illustrated inFIG. 1, the semiconductor chip20provided with the bump21is positioned to the substrate1for mounting a semiconductor chip through the bump21and through-hole (cavity)10. Under this condition, while at least heat and pressure are applied, the bump21is inserted into the through-hole10for the flip chip connection as illustrated inFIG. 3. In this case, since the bump21is inserted into the through-hole10, the projected portions11aand11bof the wire are deformed and these projected portions11aand11bare electrically connected to the bump21. In more detail, when the bump21is inserted into the through-hole10, the projected portions of wires11aand11bare deformed with the bump21and thereby the side surface of bump21is connected to the projected portions11aand11bof wires. When the bump is inserted, the bump21and projected portions11aand11bof wires are rubbed with each other to remove the oxide films and form newly generated surfaces. Accordingly, a metal coupling of the wire6and bump21can be formed.

During this flip chip mounting, it is preferable to set the heating temperature to about 50° C. to 200° C. in order to ensure the metal coupling. Moreover, the semiconductor chip20has been loaded to the substrate1in the mounting process described above while heat and pressure are applied. Moreover, the ultrasonic wave vibration may be applied during the flip chip mounting. As the mounting method of semiconductor chip, as described above, the semiconductor chip20provided with the bump21is flip chip connected to the substrate1for mounting the semiconductor chip by electrically connecting the deformed wire6and bump21while the bump21is inserted to the through-hole10during application of ultrasonic wave vibration to form the metal coupling in the connecting portion between the bump and wire under the condition that the bump21and through-hole10are matched in the position. Accordingly, since the surfaces of the bump and wire are sharpened due to the ultrasonic wave vibration and the newly generated surfaces are placed in contact, the metal coupling of bump and wire is surely formed. Thereby, connection strength can be improved and reliability of flip chip connection can further be improved (connection reliability becomes higher). In more detail, generation of new surfaces due to the sharpening of the surfaces of bump and wire can be accelerated stably, a metal coupling between the bump and wire is surely formed, and connection strength can also be improved. Moreover, as the bump21, it is recommended to use a gold stud bump which has been formed by welding a gold ball formed by discharge of gold wire to the electrode of semiconductor chip using the ultrasonic wave vibration, heat and pressure. Namely, the gold stud bump is suitable because it is high and soft and enters the through-hole10resulting in the plastic deformation. In addition, since a gold-plated film is formed over the wire surface, the gold-to-gold bonding can be attained making easier the coupling.

As described above, the through-hole10is formed, to the substrate1for mounting the semiconductor chip20, to insert the bump21through at least the insulation layer2aof the outermost surface layer in the allocating position of the bump21of the semiconductor chip20to be mounted in at least the insulation layer2aof the outermost surface layer. Moreover, a part of wire6in the wiring layer3aof the outermost surface layer is projected in the internal side of the through-hole10at the aperture of the through-hole10. Therefore, according to this substrate1for mounting the semiconductor chip, since the wire of connecting portion to the bump21by such flip chip mounting is not fixed to the insulation layer (base material)2a, the stress alleviating capability of wiring portion can be improved remarkably and the higher connection reliability can also be attained.

Moreover, in the mounting structure (FIG. 3) of the semiconductor chip obtained, the semiconductor chip20provided with the bump21is flip chip connected to the substrate1for mounting the semiconductor chip under the condition that the bump21and through-hole10are matched in the position and the wire6which is deformed because the bump21is inserted to the through-hole10is electrically connected to the bump21. According to this mounting structure of the semiconductor chip, the wire is deformed with the bump21when the bump is inserted into the through-hole10and is connected to the side surface of the bump21. In this case, since the wires6and7of connecting portion to the bump21are not fixed to the insulation layer (base material)2a, the stress alleviating capability can be given to the wiring portion, and reliability of flip chip connection can be improved distinctively (the stress alleviating capability of wiring portion can be improved remarkably and higher connection reliability can be attained.)

As the alternative structure ofFIGS. 2A and 2B, it is also possible that the end portions of wires6and7are projected at the upper surface of the through-hole (cavity)10by placing these end portions to the upper end aperture of the through-hole (cavity)10as illustrated inFIGS. 4A and 4B. Namely, the end portions11cof the wires6and7may be projected within the though-hole10.

As the alternative structure ofFIGS. 2A and 2B, the wire12may be provided, as illustrated inFIG. 5, for the flip chip connection to the bottom part of through-hole10. In this case, since the wire12is also provided at the bottom surface of through-hole10, the bump21can be connected to the wire12at the bottom surface of through-hole10. Accordingly, connection reliability can be improved by increasing the connection area between the bump and wire.

In addition, as the alternative structure ofFIGS. 2A and 2B, the through-hole10may be provided through two layers from the surface layer. In more detail, the through-hole (cavity)10aat the insulation layer2aof the outermost surface layer and the through-hole (cavity)10bat the insulation layer2bunder the insulation layer2aare constructed continuously. The wire (3b) of the internal layer is projected into the through-hole10like the surface layer wire (3a). Namely, the through-hole10provided through at least the insulation layer2aof the outermost surface layer is also provided through the insulation layer2bon the internal layer side as well as the insulation layer2aof the outermost surface layer and a part of wiring by the wiring layer3bon the internal layer side as well as the wiring layer3aof the outermost surface layer is projected into the through-hole10from the side wall of the through-hole10. In this case, as illustrated inFIG. 7, since the wire is projected also from the side wall of through-hole10(internal layer in the through-hole10), the connection area at the side wall of the bump21can be increased (connection points with the bump can be increased) and thereby higher connection reliability can be attained. Here, the substrate structure can also be adapted to the case where the wire12is provided at the bottom part of the through-hole10as inFIG. 5. Moreover, regarding the projection of the wire from the internal layer, the wires of two or more layers may be projected in addition to the case ofFIG. 6.

Moreover, as an alternative to the structure ofFIG. 3, the through-hole10may be filled with silver paste35in order to fill the connecting portion of the bump21and the projected portions11aand11bof wire with the silver paste35as illustrated inFIG. 8. Since the connecting portion of the bump21and wire in the through-hole10is filled with the silver paste35as described above, connection resistance can be lowered and the connection between the bump21and projected portions11aand11bof wire can be reinforced. In addition, even if direct connection of the bump21and projected portions11a,11bof wire is broken, since the electrical connection can be maintained directly be the silver paste35, connection failure is not generated and higher connection reliability can be attained.

Next, the second embodiment will be described with reference to the accompanying drawings.

FIGS. 9A and 9Billustrate the substrate50for mounting the semiconductor chip20and the semiconductor chip20itself in this embodiment.FIG. 9Aillustrates the condition before the mounting andFIG. 9Billustrates the condition after the mounting.

FIGS. 10A and 10Bare partially enlarged diagrams of the substrate50for mounting semiconductor chip, in whichFIG. 10Ais a plan view of the substrate50andFIG. 10Bis a cross-sectional view along the line XB—XB inFIG. 10A. InFIGS. 10A and 10B, the substrate50for mounting the semiconductor chip is formed by alternately stacking the insulation layers (base materials)51a,51b, etc. and wiring layers52a,52b, etc. The insulation layers (base materials)51a,51b, etc. are also provided with via-holes54for interlayer continuity to electrically connect the wiring of each layer. The wire of each layer is electrically connected through the via-hole54by the conductor55filling the via-hole54.

Moreover, the insulation layer51aof the outermost surface layer is formed of thermoplastic resin and the through-hole (cavity)56is formed at the connecting position with the semiconductor chip20. At the bottom part of the though-hole56, a part of wire53is exposed. Each through-hole (cavity)56may be allocated individually in each connecting point or a continuous through-hole (cavity) may be formed for a plurality of connecting points.

As described above, the substrate50for mounting the semiconductor chip is a multilayer substrate formed by alternately stacking the insulation layers51a,51b, etc. and the wiring layers52a,52b, etc. The wires of wiring layers52a,52bare electrically connected with the via-hole54for interlayer continuity and the semiconductor chip20illustrated inFIG. 9Ais flip chip mounted. Moreover, the through-hole56is formed so that the bump21may be inserted through at least the insulation layer51aat the outermost surface layer51ato the allocating position of the bump21. Moreover, the wire53is provided at the bottom part of the through-hole56for connection with the bump21and at least the insulation layer51aof the outermost surface layer is formed of thermoplastic resin.

In this case, the preferable conditions for the flip chip connection in order to simultaneously completing the sealing by the thermoplastic resin are as follows. Namely, temperature is 250° C. to 350° C., applied pressure is 3 to 5 kgf/cm2(3×9.8 to 5×9.8 newton/cm2), and the preferable pressure application and heating time is 10 seconds.

Accordingly, the connecting portion and active surface of semiconductor chip can be sealed simultaneously with connection of bump and thereby flip chip connection process can be simplified remarkably. In addition, since the under-fill material is no longer required and the thermal expansion coefficient is approximated to that of the material on the substrate side, higher reliability can be attained.

As described above, the active surface of the semiconductor chip20can be placed in contact with the surface layer of the substrate50by accommodating the bump21within the through-hole56and connecting it to the bump21at the bottom part thereof. Moreover, the connecting portion and the active surface of semiconductor chip20can be sealed simultaneously with connection of the bump21with the heat and applied pressure at the time of flip chip connection by forming the surface layer of substrate50with the thermoplastic resin. As described above, stress of the connecting portion depending on difference of thermal expansion coefficients of the chip20and substrate50can be alleviated and higher connection reliability can be attained by using the insulation layer51aof the outermost surface layer of the substrate as the under-fill material. Moreover, the flip chip connection process can be distinctively simplified.

That is, as the mounting structure of semiconductor chip, the semiconductor chip20provided with the bump21is flip chip connected to the substrate50under the condition that the bump21and through-hole56are matched in the position. Moreover, since the bump21is inserted into the through-hole56, the wire and bump21are electrically connected under the condition that the active surface of the semiconductor chip20is bonded to the substrate50for mounting the semiconductor chip20with the the thermoplastic resin insulation layer51aof the outermost surface layer of the substrate50. According to this mounting structure, when the bump21is inserted into the through-hole56, it is connected to the wire. Moreover, the insulation layer51aof the outermost surface layer of the substrate50is used as the under-fill material and the higher connection reliability can be attained as described above.

As the alternative structure ofFIGS. 10A and 10B, the through-hole56may be formed, at the connecting position with the semiconductor chip, through the insulation layer51bunder the insulation layer51aof the outermost surface layer (thermoplastic resin layer) in addition to the insulation layer51a. In more detail, the through-hole (cavity)56aof the insulation layer51aof the outermost surface layer is continued, as the structure, to the through-hole (cavity)56bat the insulation layer51bunder the layer51a. The through-hole56is provided through two layers as described above and the wire59of the internal layer is projected into the through-hole56.

The projected portions59aand59bof wires from the internal layer may also be formed by projecting the wires of two or more layers in addition to that illustrated inFIGS. 11A and 11B. In wider meaning, the through-hole56provided through the insulation layers51aand51bof two layers including at least the insulation layer51aof the outermost surface layer is formed to insert the bump21in the substrate at the allocating position of the bump21of the semiconductor chip20. Moreover, a part of the wire by the wiring layer52asandwiched by the insulation layers51aand51bis projected into the through-hole56. In addition, at least the insulation layer51aof the outermost surface layer is formed of the the thermoplastic resin. Accordingly, since the wire of the connecting portion to the bump21by the flip chip connection is not fixed to the insulation layers (base materials)51aand51b, the stress alleviation capability of wiring portion can be improved distinctively. Moreover, since the surface layer of the substrate50is formed with the thermoplastic resin, the connecting portion and active surface of the semiconductor chip20can be sealed simultaneously with connection of the bump21with the heat and pressured applied during the flip chip mounting. As described above, stress at the connecting portion due to the difference in the thermal expansion coefficients of the chip20and substrate50can be alleviated and higher connection reliability can be attained by using the insulation layer51aof the outermost surface layer of substrate as the under-fill material. Moreover, the flip chip connection process can be simplified remarkably.

Referring toFIG. 12, it is also possible to provide a wire60for the flip chip connection at the bottom part of the through-hole56in alternative to the structure illustrated inFIGS. 11A and 11B. As described above, the wire can be connected to the bump21at the bottom surface of the through-hole and thereby the connecting area of the bump21and wire can be increased and connection reliability can be improved. InFIGS. 11A,11B, andFIG. 12, for the projected portion of the internal layer wire59, only one wire is edged (not illustrated) at the center of the connecting point as illustrated inFIGS. 11A and 11B.

For the mounting to the substrate50ofFIG. 12, the bump21is inserted into the through-hole56as illustrated inFIG. 13and is electrically connected to the wire60at the bottom part of the through-hole56. In addition, the bump21is electrically connected to the wires59(59aand59b) which have been deformed because the bump21is inserted into the through-hole56. The active surface of the semiconductor chip20and connecting portion are sealed simultaneously with the flip chip connection with the insulation layer of the outermost surface layer (thermoplastic resin layer)51a.

According to this connecting structure, the bonding area of the bump21increases because the bonding area of the wire60is added to the bonding area of the wires59(59aand59b). In addition, a thermal stress is likely added to the bonding area between the bump21and wire60because it operates in the X direction inFIG. 13(the shearing stress is easily applied), but since the wires59(59aand59b) are also bonded to the bump21, reliability can be improved. Namely, since the connecting portion to the bump21in the internal wire59is not fixed to the insulation layers (base materials)51aand51b, the stress alleviating capability of the wiring portion can be improved remarkably. In addition, the bump21is connected to the wire60even at the bottom part of the through-hole56, the connecting area of bump21and wire can be increased, and thereby higher flip chip connection reliability can be improved.

As the mounting method of the semiconductor chip, the semiconductor chip20provided with the bump21is mounted to the substrate50under the condition that the bump21and through-hole56are matched in the position and the bump21on the side of chip20and the wire on the side of substrate50are electrically connected while the active surface of semiconductor chip20and the substrate50are bonded with the thermoplastic resin insulation layer51aof the outermost surface layer of the substrate50by inserting the bump21into the through-hole56by applying at least heat and pressure. Accordingly, the active surface of semiconductor chip20can be placed in contact with the surface layer of substrate50by accommodating the bump21into the through-hole56for connection with the bump21. In this case, the connecting portion and active surface of the semiconductor chip20can be sealed simultaneously with the bump21through application of heat and pressure during the flip-flop mounting by forming the surface layer of the substrate50with the thermoplastic resin. Moreover, higher connection reliability can also be attained by using the insulation layer51aof the outermost surface layer of the substrate as the under-fill material. In addition, the flip chip connection process can be simplified distinctively.

Moreover, generation of new surfaces due to sharpening of the surfaces of bump21and wires59(59aand59b) can be accelerated stably with application of ultrasonic wave vibration during the flip chip connection and accordingly a metal coupling is surely formed between the bump21and wires59(59aand59b) and connection strength can also be improved. In this case, since the active surface of the semiconductor chip20is likely to be damaged if the ultrasonic wave vibration is applied while the semiconductor chip20is in contact with the surface layer of the substrate50, the ultrasonic wave vibration is applied, even in the case of longest period, during the period from the contact between the bump21and bottom portion of the through-hole until the active surface of semiconductor chip20is in contact with the surface layer of substrate. Namely, a metal coupling is formed in the connecting portion of the bump21and wire, when heat and pressure are applied, by applying the ultrasonic wave vibration, even in the case of the longest period, during the period from the contact between the bump21and the bottom part of through-hole56until the active surface of semiconductor chip20is in contact with the insulation layer51aof the outermost surface layer of the substrate50for mounting the semiconductor chip50. Accordingly, since the new surfaces are placed in contact because the surfaces of the bump21and the wire are sharpened with the ultrasonic wave vibration, the metal coupling can surely be formed by the bump21and the wire and the connection strength can be improved. Therefore, the flip chip connection reliability can further be improved. Moreover, the active layer of the semiconductor chip20can be freed from damage, simultaneous sealing can be realized with the thermoplastic resin at the surface layer, and the processes can be simplified by applying only heat and pressure without application of ultrasonic wave vibration in the stage where the active surface of the semiconductor chip20is in contact with the surface of substrate.

Regarding projection of wires59of internal layer inFIGS. 11A,11B andFIG. 12, only one wire is edged (not illustrate) at the center of the connecting point as illustrated inFIGS. 11A and 11B. Otherwise, it is also possible to bring the end part of the wire59into the through-hole56as illustrated inFIGS. 14A and 14B. Namely, the end part59cof wire59may be projected into the through-hole56.

Moreover, as the alternative structure ofFIG. 9B, the through-hole56is filled with the silver paste70and the connecting portion of the bump21and wire53is filled with the silver paste70as illustrated inFIG. 15. Since the connecting portion of the bump21and wire is filled with the silver paste70within the through-hole56, connection resistance can be lowered and connection between the bump21and wire53can also be reinforced. Moreover, even if the direct connection of bump21and wire53is broken, since the indirect electrical connection is maintained with the silver paste70, connection failure does not occur and higher connection reliability can be attained.

As the substrates1and50for mounting the semiconductor chip20, a laminated substrate is used in which a plurality of thermoplastic resin base material layers, to which the surface layer wire and via-hole for interlayer continuity are formed, are laminated and thermally pressed simultaneously.

Detail process flow of thermoplastic resin laminated substrate is illustrated inFIG. 16. Wires are formed by the etching process. Moreover, a hole is bored with the laser or the like only to the resin portion of the via-hole for interlayer continuity. Next, the hole is filled with the metal paste. Each layer formed with such process is simultaneously stacked and thermally pressed simultaneously. As described above, a laminated layer substrate has been formed.

The process flow of a related art ceramic multilayer substrate ofFIG. 29will be discussed for comparison. InFIG. 29, a base material including alumina of 90% or more is prepared and a hole is bored to the via-hole portion for continuity of the base material. A wire is formed by printing the metal paste and the hole is filled with the metal paste. In addition, each layer is simultaneously baked through the simultaneous stacking of layer. Accordingly, a laminated substrate can be formed.

In such comparison betweenFIG. 16andFIG. 29, a patterned wiring layer is formed and a via-hole for interlayer continuity is formed in one surface of the thermoplastic resin insulation layer inFIG. 16. A plurality of base materials is stacked and thermally pressed simultaneously. Therefore, the laminated substrate has the following merits. With the method of forming the ceramics multilayer substrate illustrated inFIG. 29, the projected portion of wires cannot be formed over the above surface or within the through-holes inFIGS. 2A,2B andFIG. 6. On the other hand, in the thermoplastic resin laminated substrate illustrated inFIG. 16, the projected portion of wire can be formed with the ordinary process at the upper surface or within the through-hole inFIGS. 2A,2B, andFIG. 6.

Moreover, in the laminated substrate, wires must be formed to the front and rear surfaces of any one of the outermost surface layers of the front and rear sides and process is different from that of the other layer. However, in the substrate ofFIGS. 10A,10B andFIGS. 11A,11B, the flip chip surface can be manufactured with the identical process for all layers because the wiring is not required. Accordingly, the manufacturing cost can be lowered.

As described above, even in the structure that wires are projected into the through-hole (via-hole) by using the simultaneously laminated substrate of the thermoplastic resin base material, the substrate can be manufactured in the process which is identical to that when the through-hole is not formed. Moreover, the substrate manufactured has an excellent recycling property because all layers are formed with the thermoplastic resin. In addition, an individual via-hole is used for interlayer continuity of each layer, high density wiring can be formed, and reduction in size of substrate can additionally be realized.

That is, in regard to the flip chip connection of the semiconductor chip via the bump, the through-holes are provided to the substrate, the wires for connection with the electrodes of semiconductor chip are projected at the upper surface of the through-holes, the substrate wires to be connected with the semiconductor chip are not fixed to the substrate because these wires are projected. Accordingly, the connection reliability in the flip chip connection can be improved by alleviating the stress.

Next, the third embodiment will be described with reference to the accompanying drawings.

FIGS. 17A and 17Bare vertical cross-sectional views before and after the mounting of the semiconductor chip in this third embodiment.FIG. 18Ais an enlarged plan view of the substrate80for mounting the semiconductor chip in this embodiment, whileFIG. 18Bis a vertical cross-sectional view along the line XVIIIB—XVIIIB inFIG. 18A.

InFIGS. 18A and 18B, the substrate80for mounting the semiconductor chip includes the wire82patterned over the surface of the insulation base material sheet81. As the insulation base material81, the glass and epoxy base materials can be used. Moreover, the wire82is constructed by sequentially forming the nickel film and gold plated film over the patterned copper foil. The semiconductor chip20is flip chip mounted on this substrate80for mounting semiconductor chip.

Moreover, the through-hole83is formed through the insulation base material81in the substrate80for mounting the semiconductor chip and this through-hole83is formed at the allocating position of bump21of the semiconductor chip20to be mounted. This through-hole83is formed to insert the bump21. The through-hole83has the circular plane shape. At the aperture of the through-hole83, a part of the wire83is projected to the aperture of the through-hole83as the projected portions84aand84b.

The through-hole83may be individually allocated in each connecting point or a continuous through-hole may also be formed for a plurality of connecting points.

The projected portions84aand84bof the wire82are formed, as illustrated inFIGS. 18A and 18B, by edging (not illustrated) one wire at the center of the connecting point. As an alternative structure, the projected portion84cmay also be formed by projecting the wire82from one direction as illustrated inFIGS. 19A and 19B.

Next, the process for flip chip mounting semiconductor chip20to the substrate80for mounting semiconductor chip will be described with reference toFIGS. 17A and 17B.

The substrate80for mounting the semiconductor chip illustrated inFIGS. 18A and 18Bis prepared and the semiconductor chip20provided with the bump21is mounted to the substrate80, as illustrated inFIG. 17A, from the side of a surface where a part of the wire is projected to the aperture of the through-hole83while the bump21and through-hole83are matched in the position. Under the condition that the bump21and through-hole83are matched in the position, the bump21is inserted into the through-hole83as illustrated inFIG. 17Bfor the flip chip connection while at least heat and pressure are applied. In this case, since the bump21is inserted into the through-hole83, the projected portions84aand84bof the wire are deformed and thereby the deformed projected portions84aand84bare electrically connected to the bump21. In more detail, when the bump21is inserted into the through-hole83, the projected portions84aand84bof the wire are deformed with the bump21and thereby the side surface of the bump21is connected with the projected portions84aand84bof the wire. At the time of insertion, the bump21and the projected portions of wire84aand84bare rubbed with each other. Accordingly, the oxide film is removed and new surfaces are generated. The metal coupling between the wire82and the bump21is formed through this process.

In this connection structure, since the wire82to be bonded with the bump21is not fixed to the base material81, stress applied to the bonded area due to difference in the thermal expansion coefficients of the semiconductor chip20and the base material81can be alleviated through deformation of the wire82. Accordingly, the connection reliability can be remarkably improved in comparison with the related art structure illustrated inFIG. 28Bwhere the wire is fixed to the base material.

In such flip chip connection, it is recommended to set the heating temperature for ensuring a metal coupling to about 200° C. to 300° C. Moreover, in the mounting process described above, the semiconductor chip20has been mounted on the substrate80while heat and pressure are applied. In addition, it is also permitted that ultrasonic wave vibration be applied during the flip chip connection.

As the method of mounting the semiconductor chip described above, the semiconductor chip20provided with the bump21is flip chip connected to the substrate80from the surface where a part of the wire is projected to the aperture of the through-hole83under the condition that the bump21and the through-hole83are matched in the position by electrically connecting the deformed wire82and bump21, while the bump21is inserted into the through-hole83by applying ultrasonic wave vibration thereto in order to form a metal coupling at the connecting portion of the bump21and the wire82. Accordingly, since the surfaces of the bump21and the wire82are sharpened with the ultrasonic wave vibration and new surfaces are placed in contact with each other, the bump21and wire82surely form the metal coupling and the connection strength can be improved. Therefore, the flip chip connection reliability can further be improved (connection reliability becomes high.) In more detail, generation of new surfaces due to the sharpening of the surfaces of the bump21and wire82is stably accelerated, metal coupling between the bump21and wire82is surely formed, and the connection strength can be improved. Moreover, as the bump21, it is recommended to use a gold stud bum which has been formed by welding a gold ball formed by discharge of gold wire to the electrodes of the semiconductor chip through application of ultrasonic wave vibration, heat, and pressure. Namely, the gold stud bump is suitable because it is high and soft and enters the through-hole83resulting in plastic deformation. Moreover, since a gold-plated film is formed over the wire surface, the gold-to-gold bonding is attained making easier the coupling.

Subsequently, inFIG. 17B, the under-fill material30is supplied to the gap between the substrate80and semiconductor chip20. This under-fill material30diffuses the stress generated by the difference in the thermal expansion coefficients of the semiconductor chip20and the base material81not only to the bump21but also to the entire surface of the semiconductor chip20. Accordingly, electrical connection reliability can be further improved for temperature difference which is repeatedly applied. This under-fill material30can also be supplied before the mounting of the semiconductor chip20. In this case, the under-fill material30is hardened due to the heat generated when the semiconductor chip20is mounted. Fixing and sealing by the under-fill material30are completed simultaneously with the mounting of semiconductor chip20. In this case, moreover, the time required for mounting of semiconductor chip20is set at least to the time required by the under-fill material30to be hardened temporarily. In more detail, temperature is set to 150° C. or higher and the time, to five seconds or longer.

As described above, the through-hole83provided through the insulation base material81is formed to insert the bump21at the allocating position in the substrate80for mounting the semiconductor chip. A part of the wire82is projected to the aperture of the through-hole83at the aperture of the through-hole83. Accordingly, since the wire82of the connecting portion to the bump21by the flip chip connection is not fixed to the insulation base material81, the stress alleviating capability of the wiring portion can be improved and the higher connection reliability can be attained.

Moreover, in the mounting structure of the semiconductor chip obtained (FIG. 17B), the semiconductor chip20provided with the bump21is flip chip connected to the substrate80for mounting the semiconductor chip from the surface where a part of the wire is projected to the aperture of the through-hole83under the condition that the bump21and through-hole83are matched in the position. The wire82, which is deformed by insertion of the bump21into the through-hole83, is electrically connected to the bump21. According to this mounting structure of the semiconductor chip, since the wire of connecting portion to the bump21by the flip chip connection is not fixed to the insulation base material81, the stress alleviating capability of the wiring portion can be improved and higher connection reliability can be attained.

Next, the fourth embodiment of the present invention will be described mainly in regard to differences from the third embodiment.

First, the substrate80for mounting the semiconductor chip illustrated inFIGS. 18A and 18Bis prepared. As illustrated inFIG. 20A, the surface opposing to the surface to form the wire82in the substrate80for mounting semiconductor chip is defined as the semiconductor chip mounting surface and the bonding agent85is supplied (for the coating) to this surface. As illustrated inFIG. 20B, the through-hole83of substrate80and the electrode87of semiconductor chip86are matched in the position, and the semiconductor chip86is mounted to the substrate80in the face down manner.

Next, the substrate80is set upside down and the bump88similar to that described above is bonded to the electrode87of semiconductor chip via the through-hole83from the side of projected wire in the substrate80as illustrated inFIG. 20C. When the bump88is bonded, the projected portions84aand84bof wire are deformed and the wire82is electrically connected to the semiconductor chip86based on the principle described in the third embodiment. In addition to the effect of the third embodiment that the connection reliability can be improved, connection of wire82and electrode87is completed in the bonding process of the bump88. That is, the subsequent flip chip process can be eliminated to simplify the total processes. The bonding agent85may also be hardened with the heat used for the bonding process of bump88. Or, it is also allowed that the bonding agent hardening process is conducted before the bonding of the bump88.

Moreover, the following processes are performed as required. The bump88is leveled by applying pressure with a leveling tool89, as illustrated inFIG. 21A, to a part of the bump88projected from the upper surface of substrate80. As a result, since the bump88is deformed, the bump88catches more effectively the projected portions84aand84bof the wire as illustrated inFIG. 21B, and thereby such electrical connection can be more stabled.

As the method of mounting the semiconductor chip, the semiconductor chip86is mounted in the face down manner via the bonding agent85to the surface opposing to the surface where a part of wire is projected to the aperture of the through-hole83in the substrate80for mounting the semiconductor chip under the condition that the electrode87of the semiconductor chip and the through-hole83are matched in the position (first process). Next, the bump88is bonded to the electrode87of the semiconductor chip by inserting the bump88into the through-hole83from the surface where a part of the wire is projected to the through-hole83in the substrate80for mounting the semiconductor chip (second process). According to this method, since the wire of the connecting portion to the bump88by the flip chip connection is not fixed to the insulation base material81, the stress alleviating capability of the wiring portion can be improved and higher connection reliability can also be attained. Moreover, since mounting of the bump88to the electrode87and connection between the bump88and the wire82can be performed simultaneously in the bonding process of the bump88, the processes can be simplified. Particularly, after the bump88is bonded to the electrode87of the semiconductor chip, the structural member of the bump88projected from the front surface of the substrate80for mounting the semiconductor chip is pressed and crushed from the side of the surface where a part of the wire is projected to the aperture of the through-hole83. Accordingly, since the bump is crushed (plastically deformed), the bonding area of wires (84aand84b) projected to the aperture of through-hole83and bump88increases and electrical connection reliability can also be increased.

In the mounting structure of the semiconductor chip ofFIG. 20C, the semiconductor chip86is bonded in the face down manner to the substrate80from the side of the surface opposing to the surface where a part of wire is projected to the aperture of through-hole83under the condition that the electrode87of the semiconductor chip86and the through-hole83are matched in the position. Moreover, the wire82, which is deformed because the bump88is inserted into the through-hole83from the surface where a part of the wire is projected to the aperture of the through-hole83and thereby it is bonded to the electrode87of semiconductor chip, is electrically connected to the bump88. According to this mounting structure of semiconductor chip, since the wire of connecting portion to the bump88by the flip chip connection is not fixed to the insulation base material81, the stress alleviating capability of wiring portion can be improved and thereby higher connection reliability can be attained.

Moreover, the end part of thin wire (gold wire) is torn off upon bonding as illustrated inFIG. 20C, but it is also possible to bond such end part to the wire82near the through-hole83as illustrated inFIG. 22. When the end part of the bump88is wire-bonded to the wire83, electrical connection of thin wire (gold wire) can be maintained. Accordingly, the thin wire (gold wire)90has excellent stress alleviating capability and can improve reliability of connection. Namely, the thin wire (gold wire)90has excellent stress alleviating capability and surely attains higher reliability even if the projected portions84aand84bof wire are broken.

Next, the fifth embodiment of the present invention will be described mainly in regard to differences from the third embodiment.

First, the substrate80for mounting the semiconductor chip illustrated inFIGS. 19A and 19Bis prepared. As illustrated inFIG. 23A, the surface opposing to the surface where the wire82is formed in the substrate80for mounting the semiconductor chip is defined as the semiconductor chip mounting surface and this surface is thereafter supplied (coated) with a bonding agent91. Next, as illustrated inFIG. 23B, the semiconductor chip86is mounted in the face down manner to the substrate80under the condition that the through-hole83of the substrate80and the electrode87of the semiconductor chip are matched in the position.

Moreover, as illustrated inFIG. 24A, the substrate80is placed upside down and the end part of a bonding tool92is inserted into the through-hole83from the side of the projected wire of the substrate80in order to put the projected portion84cof the wire on the electrode87of the semiconductor chip and then bond the end part of wire and the electrode through application of ultrasonic wave vibration. Namely, the substrate80for mounting the semiconductor chip in this embodiment has the structure that the through-hole83provided through the insulation base material81is formed to insert the end part of the bonding tool92at the allocating position of the electrode87of the semiconductor chip86to be mounted and a part of the wire82is projected to the aperture of the through-hole83. As the bonding tool92ofFIG. 24A, a capillary is used. The bonding agent91is thermally hardened in the bonding process. As an alternative, it is also allowed that the bonding agent hardening process is prepared before the bonding process.

As a result, stress can be alleviated with the projected portion84cof the wire which is not fixed to the base material81and thereby the connection reliability can be improved. That is, since the wire of the connecting portion to the electrode87on the chip side by the flip chip connection is not fixed to the insulation base material81, the stress alleviating capability of the wiring portion can be improved and higher connection reliability can also be attained by using the substrate80including the through-hole83to insert the end part of the bonding tool92.

As the mounting method of the semiconductor chip, as described above, the semiconductor chip86is mounted in the face down manner via the bonding agent91to the surface opposing to the surface where a part of wire is projected to the aperture of through-hole83in the substrate80for mounting the semiconductor chip under the condition that the electrode87of semiconductor chip and through-hole83are matched in the position (first process). Next, the wire (84C) projected to the aperture is bonded to the electrode87of semiconductor chip using the bonding tool92from the surface where a part of wire is projected to the aperture of the through hole83in the substrate80for mounting the semiconductor chip (second process). According to this method, since the wire of the connecting portion to the semiconductor chip86is not fixed to the insulation base material81, the stress alleviating capability of the wiring portion can be improved and higher connection reliability can be attained.

Moreover, as the mounting structure of the semiconductor chip, the semiconductor chip86is bonded in the face down manner to the substrate80for mounting the semiconductor chip from the surface opposed to the surface where a part of the wire is projected to the aperture of the through-hole83under the condition that the electrode87of the semiconductor chip and the through-hole83are matched in the position. In addition, the wire (84C) projected to the aperture is bonded to the electrode87of the semiconductor chip and the wire82and the electrode87of semiconductor chip are electrically connected. According to this mounting structure of the semiconductor chip, since the wire82of the connecting portion to the semiconductor chip86is not fixed to the insulation base material81, the stress alleviating capability of the wiring portion can be improved and higher connection reliability can be attained.

As an alternative ofFIG. 24B, it is also possible to previously provide a stud bump93to the electrode87of the semiconductor chip as illustrated inFIG. 25A. Namely, as the mounting structure of the semiconductor chip, the semiconductor chip86with the stud bump93is formed on the electrode87is bonded in the face down manner to the substrate80for mounting the semiconductor chip from the surface opposed to the surface where a part of wire is projected to the aperture of through-hole83under the condition that the electrode87of the semiconductor chip and the through-hole83are matched in the position. Moreover, the wire (84C) projected to the aperture is bonded to the stud bump93of the semiconductor chip86and the wire82and electrode87of the semiconductor chip are electrically connected. According to this mounting structure of the semiconductor chip86, since the wire of the connecting portion to the semiconductor chip86is not fixed to the insulation base material81, the stress alleviating capability of the wiring portion can be improved and higher connection reliability can be attained. Moreover, the projected portion84C of the wire sticks to the stud bump93because of plastic deformation of the stud bump93and thereby strong and stable connection can be obtained. Moreover, the gold-to-gold bonding of the gold-plated film of wire and gold stud bump93can be attained by utilizing the gold stud bump as the stud bump93. Accordingly, a metal coupling can be obtained easily.

As an alternative ofFIG. 24B, a plated bump94may be provided previously to the electrode87of semiconductor chip. Namely, as the mounting structure of semiconductor chip, the semiconductor chip86with the plated bump94formed to the electrode87is bonded in the face down manner to the substrate80for mounting the semiconductor chip from the surface opposing to the surface where a part of wire is projected to the aperture of through-hole93under the condition that the electrode87of semiconductor chip and through-hole are matched in the position. Moreover, the wire (84C) projected to the aperture is bonded to the plated bump94of semiconductor chip86and the wire82and electrode87of semiconductor chip are electrically connected. According to this mounting structure of the semiconductor chip, since the wire of the connecting portion to the semiconductor chip86is not fixed to the insulation base material81, the stress alleviating capability of the wiring portion can be improved and higher connection reliability can be attained. In addition, the plated bump94shows less plastic deformation (because it is hard) and when the ultrasonic wave vibration is applied during the bonding of projected portion84C of wire, the vibration is transferred stably to the interface of bonding and thereby stable bonding effect can be attained. In addition, since the plated bump94can be formed simultaneously under the wafer condition, reduced manufacturing cost can be attained in comparison with the stud bump. Furthermore, the gold-to-gold junction of the gold plated film of wire and gold plated bump94can be attained by utilizing the gold plated bump as the plated bump94. Accordingly, the metal coupling can be obtained easily.

Thickness of substrate described in the three to fifth embodiments will be described. As illustrated inFIG. 17, thickness tS of the substrate is preferably identical to the thickness tB of the bump21. The preferable thickness of the substrate ranges from 5 μm to 100 μm. Accordingly, it is recommended to use a flexible substrate in which the base material81is formed of polyimide. Moreover, in the fifth embodiment illustrated inFIGS. 23A,23B andFIGS. 24,24B, it is better to use a thinner substrate80. This is because the projected portion84C of wire can be easily bonded to the electrode87of chip through deformation. In practice, for example, the thickness of the insulation base material81is set to 25 μm, while the thickness of the wire82is set to 17 μm, and the thickness of the bonding agent91is set to 10 to 15 μm. Generally, it is recommended to set the thickness of the insulation base material81to two times or less the thickness of the wire82(for example, when the thickness of wire82is 15 μm, the thickness of insulation base material81is 30 μm or less).

Next, the sixth embodiment will be described mainly in regard to differences between the fourth and fifth embodiments.

As illustrated inFIGS. 26A and 26B, an insulation base material95of the substrate80is formed of thermoplastic resin base material and the semiconductor chip86is mounted on the substrate80. Polyimide may be selected as the thermoplastic resin base material. The mounting structure illustrated inFIG. 20B,FIG. 22,FIG. 24B,FIG. 25A, andFIG. 25Bis formed using the substrate80.

In this case, the semiconductor chip86is bonded directly to the substrate80without use of bonding agent.

That is, as the mounting method using this base material, the semiconductor chip86is fixed to the substrate80through the compression bonding of about 10 seconds under 200° C. to 300° C., as illustrated inFIG. 26A, by positioning the semiconductor chip86to the substrate80and thereafter applying a bonding head96to the semiconductor chip86. Namely, the semiconductor chip86is fixed, with the thermal compression bonding, to the insulation base material95formed of the thermoplastic resin base material, in the face down manner, on the surface opposing to the surface where a part of the wire is projected to the aperture of the through-hole83in the substrate80for mounting the semiconductor chip provided with the through-hole to insert the bump under the condition that the electrode87of semiconductor chip and through-hole83are matched in the position (first process). Thereafter, the substrate80is placed upside down and a bump97is bonded to the electrode87of the semiconductor chip via the through-hole83of the substrate80as illustrated inFIG. 26B. Namely, the bump97is inserted into the through-hole83from the surface where a part of the wire is projected to the aperture of the through-hole83in the substrate80for mounting the semiconductor chip and thereby the bump97is bonded to the electrode87of the semiconductor chip (second process). According to this method, since the wire of the connecting portion to the bump97by the flip chip connection is not fixed to the insulation base material81, the stress alleviating capability of the wiring portion can be improved and higher connection reliability can be attained. Moreover, since the mounting of the bump97to the electrode87and connection between the bump97and the wire82can be conducted simultaneously in the bonding process of the bump97, the processes can be simplified. In addition, the semiconductor chip86can be bonded to the base material through the thermal compression bonding using the thermoplastic resin base material, the bonding agent can be eliminated, and the coating process of the bonding agent (bonding agent supplying process) can also be eliminated. The bonding principle is similar to that in the fourth embodiment.

Next, bonding of the projected portion84C of wire to the electrode87of semiconductor chip86will be described with reference toFIGS. 27A,27B, and27C.

As illustrated inFIG. 27A, the substrate80for mounting the semiconductor chip includes the through-hole83to insert the end part of the bonding tool. The semiconductor chip86is fixed, in the face down manner, through the thermal compression bonding to the insulation base material95consisting of the thermoplastic resin base material to the surface opposing to the surface where a part of the wire is projected to the aperture of through-hole83in the substrate80(first process). In this case, heat and pressure are applied using the bonding head96. Next, as illustrated inFIG. 27B, the wire (84C) projected to the aperture is bonded, as illustrated inFIG. 27B, to the electrode87of the semiconductor chip with the bonding tool92from the surface where a part of the wire is projected to the aperture of the through-hole83in the substrate80for mounting the semiconductor chip (second process). As a result, as illustrated inFIG. 27C, the projected portion of the wire84C is bonded to the electrode87of the semiconductor chip. According to this method, since the wire of the connecting portion to the semiconductor chip86is not fixed to the insulation base material95, the stress alleviating capability of the wiring portion can be improved and higher connection reliability can be attained. Moreover, the semiconductor chip86can be bonded to the base material through the thermal pressure bonding by utilizing the thermoplastic resin base material. Accordingly, the bonding agent is no longer required and the bonding agent coating process (bonding agent supplying process) can also be eliminated.