Insulating film, printed circuit board using the same, and method of manufacturing the printed circuit board

There are provided an insulating film, a printed circuit board including the insulating film, and a method of manufacturing the printed circuit board. The insulating film includes a first insulating material; a second insulating material; and a metal thin film disposed between the first insulating material and the second insulating material.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims the benefit of Korean Patent Application No. 10-2014-0096672, filed on Jul. 29, 2014, entitled “Insulating Film, Printed Circuit Board Including the Same, and Method of Manufacturing the Printed Circuit Board” which is hereby incorporated by reference in its entirety into this application.

BACKGROUND

The present disclosure relates to an insulating film, a printed circuit board using the insulating film, and a method of manufacturing the printed circuit board.

A demand for miniaturization of materials applied to boards is also increasing because of lightweight, thin, short, and small electronic devices. As specifications of electronic devices such as high functionality, high speed, etc. become higher, importance of boards capable of performing further stable and efficient signal transmission is also increasing. For stable and efficient signal transmission of boards, importance of a function of shielding noise due to a high frequency is further increasing. A process of additionally forming a ground layer is performed so as to shield noise for providing a stable signal transmission of a board and low impedance.

RELATED ART DOCUMENT

Patent Document

SUMMARY

An aspect of the present disclosure may provide an insulating film capable of reducing the number of processes by omitting a process of additionally forming a ground layer, a printed circuit board including the insulating film, and a method of manufacturing the printed circuit board.

Another aspect of the present disclosure may provide an insulating film capable of shielding signal noise, a printed circuit board including the insulating film, and a method of manufacturing the printed circuit board.

Another aspect of the present disclosure may provide an insulating film capable of improving reliability of a signal transmission due to a reduction in a signal transmission distance, a printed circuit board including the insulating film, and a method of manufacturing the printed circuit board.

According to an aspect of the present disclosure, an insulating film may include: a first insulating material; a second insulating material; and a metal thin film disposed between the first insulating material and the second insulating material.

According to another aspect of the present disclosure, a printed circuit board may include: a board on which an inner layer buildup layer is formed; a first insulating layer formed on the inner layer buildup layer; a metal layer formed on the first insulating layer; a second insulating layer formed on the metal layer; a via formed to pass through the first insulating layer, the metal layer, and the second insulating layer and be in contact with an inner layer circuit layer of the inner layer buildup layer; and an insulating coating layer formed between the first insulating layer, the metal layer, and the second insulating layer and the via.

The metal layer may be formed to be in contact with an entire one surface of the first insulating layer.

The metal layer may be a ground layer.

According to another aspect of the present disclosure, a method of manufacturing a printed circuit board may include preparing a board on which an inner layer buildup layer is formed; forming an insulating film comprising a first insulating material, a second insulating material, and a metal thin film disposed between the first insulating material and the second insulating material, on the inner layer buildup layer; forming a via hole in the insulating film to expose a part of an inner layer circuit layer of the inner layer buildup layer; forming an insulating coating layer on the insulating film and a side wall of the via hole; and forming a via formed in the via hole and contacting the exposed inner layer circuit layer.

DESCRIPTION OF EMBODIMENTS

The objects, features and advantages of the present disclosure will be more clearly understood from the following detailed description of the exemplary embodiments taken in conjunction with the accompanying drawings. Throughout the accompanying drawings, the same reference numerals are used to designate the same or similar components, and redundant descriptions thereof are omitted. Further, in the following description, the terms “first,” “second,” “one side,” “the other side” and the like are used to differentiate a certain component from other components, but the configuration of such components should not be construed to be limited by the terms. Further, in the description of the present disclosure, when it is determined that the detailed description of the related art would obscure the gist of the present disclosure, the description thereof will be omitted.

Insulating Film

FIG. 1is an exemplary diagram showing an insulating film according to an exemplary embodiment of the present disclosure.

Referring toFIG. 1, the insulating film100according to an exemplary embodiment of the present disclosure includes a first insulating material110, a second insulating material130, and a metal thin film120.

According to an exemplary embodiment of the present disclosure, the first insulating material110and the second insulating material130are complex polymer resin usually used as an interlayer insulating material. For example, the first insulating material110and the second insulating material130may be formed of epoxy based resin such as prepreg, ABF (Ajinomoto Build Up Film), FR4, BT (Bismaleimide Triazine), etc. The first insulating material110and the second insulating material130may be formed in the form of a film. However, the materials forming the first insulating material110and the second insulating material130and the shapes in the exemplary embodiment of the present disclosure are not limited as described above. That is, any insulating materials and shapes used in a circuit board field may be applied to the first insulating material110and the second insulating material130.

According to an exemplary embodiment of the present disclosure, the metal thin film120is formed between the first insulating material110and the second insulating material130. The metal thin film120may be formed of metal such as copper, silver, nickel, etc. In the exemplary embodiment of the present disclosure, the metal thin film120may be formed of copper. However, a material forming the metal thin film120is not limited to copper. That is, the material forming the metal thin film120may be possible if the material is a metal material having conductivity used in the circuit board field.

As such, the insulating film100according to an exemplary embodiment of the present disclosure has a structure in which the first insulating material110, the metal thin film120, and the second insulating material130are sequentially stacked. In this regard, the metal thin film120of the insulating film100performs the same function as a ground layer of a board. That is, if the insulating film100according to an exemplary embodiment of the present disclosure is applied to the board, noise is shielded by the metal thin film120. Thus, a stable signal transmission between circuit patterns formed on the board may be possible.

A thickness of the insulating film100according to an exemplary embodiment of the present disclosure may be adjustable. That is, the entire thickness of the insulating film100may be adjustable by adjusting a thickness of the metal thin film120according to a board to which the insulating film100is to be applied.

Printed Circuit Board

FIG. 2is an exemplary diagram showing a printed circuit board according to an exemplary embodiment of the present disclosure.

Referring toFIG. 2, the printed circuit board200according to an exemplary embodiment of the present disclosure includes a board210, an inner layer buildup layer, a first insulating layer230, a metal layer240, a second insulating layer250, a via260, an insulating coating layer270, an outer layer buildup layer, and a solder resist layer290.

According to an exemplary embodiment of the present disclosure, the board210is complex polymer resin usually used as an interlayer insulating material. For example, the board210may manufacture a thinner printed circuit board200by employing prepreg. Alternatively, the board210may easily implement a fine circuit by employing ABF (Ajinomoto Build Up Film). In addition, the board210may use epoxy based resin such as FR4, BT (Bismaleimide Triazine), etc. but is not particularly limited thereto. The board210may be formed by using a copper clad laminate (CCL). The board210is configured as a single insulating layer in the exemplary embodiment of the present disclosure but the present disclosure is not limited thereto. That is, the board210may be configured as one or more insulating layers, a circuit layer, and a via.

According to an exemplary embodiment of the present disclosure, the inner layer buildup layer may be formed on the board210. The inner layer buildup layer may include an inner layer circuit layer220. The inner layer circuit layer220may include an inner layer circuit pattern221and a via pad222. The inner layer circuit layer220is formed of a conductive material. For example, the inner layer circuit layer220may be formed of copper. However, a material forming the inner layer circuit layer220is not limited to copper. That is, the material forming the inner layer circuit layer220may be applied without restriction if the material is used as a conductive material for a circuit in the circuit board field. The inner layer buildup layer is configured as the inner layer circuit layer220of one layer inFIG. 2but the configuration of the inner layer buildup layer is not limited thereto. For example, the inner layer buildup layer may be formed as the inner layer circuit layers220of multi layers and inner layer insulating layers (not shown) formed between the inner layer circuit layers220for insulating the inner layer circuit layers220from each other.

According to an exemplary embodiment of the present disclosure, the first insulating layer230is formed on the inner layer buildup layer. The first insulating layer230is formed of complex polymer resin usually used as an interlayer insulating material. For example, the first insulating layer230may be formed of epoxy based resin such as prepreg, ABF (Ajinomoto Build Up Film), FR4, BT (Bismaleimide Triazine), etc. However, the materials forming the first insulating layer230in the exemplary embodiment of the present disclosure are not limited as described above. That is, any insulating materials used in the circuit board field may be applied to the first insulating layer230.

According to an exemplary embodiment of the present disclosure, the metal layer240is formed on the first insulating layer230. According to an exemplary embodiment of the present disclosure, the metal layer240is formed to contact an entire one surface of the first insulating layer230. Referring toFIG. 2, the metal layer240is continuously formed on the first insulating layer230except for a part in which the via260is formed. The metal layer240is formed of metal such as copper, silver, nickel, etc. In the exemplary embodiment of the present disclosure, the metal layer240may be formed of copper. However, a material forming the metal layer240is not limited to copper. That is, the material forming the metal layer240may be possible if the material is a metal material having conductivity used in the circuit board field. According to an exemplary embodiment of the present disclosure, the above-formed metal layer240is a ground layer.

According to an exemplary embodiment of the present disclosure, the second insulating layer250is formed on the metal layer240. The second insulating layer250is formed of complex polymer resin usually used as an interlayer insulating material. For example, the second insulating layer250may be formed of epoxy based resin such as prepreg, ABF (Ajinomoto Build Up Film), FR4, BT (Bismaleimide Triazine), etc. However, the materials forming the second insulating layer250in the exemplary embodiment of the present disclosure are not limited as described above. That is, any insulating materials used in the circuit board field may be applied to the second insulating layer250.

According to an exemplary embodiment of the present disclosure, the via260is formed to pass through the first insulating layer230, the second insulating layer250, and the metal layer240. According to an exemplary embodiment of the present disclosure, one surface of the via260is in contact with the inner layer circuit layer220of the inner layer buildup layer. Another surface of the via260is in contact with the outer layer circuit layer280of the outer layer buildup layer. The above-formed via260electrically connects the inner layer buildup layer and the outer layer buildup layer. According to an exemplary embodiment of the present disclosure, the via260may be formed of copper. However, a material forming the via260is not limited to copper. That is, the material forming the via260may be possible if the material is a conductive material used in the circuit board field.

According to an exemplary embodiment of the present disclosure, the insulating coating layer270is formed between the first insulating layer230, the second insulating layer250, the metal layer240, and the via260. The insulating coating layer270is formed to insulate between the via260and the metal layer240. The insulating coating layer270prevents residues of the first insulating layer230and the second insulating layer250that occur when forming a via hole (not shown) for the via260or a defect caused by a burr. In this regard, the insulating coating layer270is not formed between the via260and the inner layer buildup layer or the outer layer buildup layer for an electrical connection between the via260and the inner layer buildup layer or the outer layer buildup layer.

According to an exemplary embodiment of the present disclosure, the insulating coating layer270is formed of complex polymer resin usually used as an interlayer insulating material. For example, the insulating coating layer270may be formed of epoxy based resin such as prepreg, ABF (Ajinomoto Build Up Film), FR4, BT (Bismaleimide Triazine), etc. However, the materials forming the insulating coating layer270in the exemplary embodiment of the present disclosure are not limited as described above. That is, any insulating materials used in the circuit board field may be applied to the insulating coating layer270.

According to an exemplary embodiment of the present disclosure, the outer layer buildup layer is formed on the second insulating layer250and the via260. The outer layer buildup layer includes the outer layer circuit layer280. The outer layer circuit layer280includes an outer layer circuit pattern281and an external connection pad282.

According to an exemplary embodiment of the present disclosure, the external connection pad282is a component electrically connected to the outside through an external connection terminal, etc. For example, the external connection terminal may be a solder ball.

According to an exemplary embodiment of the present disclosure, the outer layer circuit layer280is formed of a conductive material. For example, the outer layer circuit layer280may be formed of copper. However, a material forming the outer layer circuit layer280is not limited to copper. That is, if a material is used as a conductive material for a circuit in the circuit board field, the material may be applied to the outer layer circuit layer280without restriction.

The outer layer buildup layer is configured as the outer layer circuit layer280of one layer inFIG. 2but the configuration of the outer layer buildup layer is not limited thereto. For example, the outer layer buildup layer may be formed as the outer layer circuit layers280of multi layers and outer layer insulating layers (not shown) formed between the outer layer circuit layers280for insulating the outer layer circuit layers280from each other.

According to an exemplary embodiment of the present disclosure, the solder resist layer290is formed on the outer layer buildup layer. The solder resist layer290is formed to prevent solder from being coated on the outer layer circuit pattern281or oxidized when a soldering process is performed. The solder resist layer290is formed to surround the outer layer circuit pattern281and expose the outer connection pad282. For example, the solder resist layer290is formed of a heat resisting sheath material.

The printed circuit board200according to an exemplary embodiment of the present disclosure shields signal noise since the metal layer240performs a function of a ground layer. Thus, a stable signal transmission is possible between a circuit pattern formed on the printed circuit board200and an electronic component (not shown) connected to the printed circuit board200later. In the printed circuit board200according to an exemplary embodiment of the present disclosure, the via260passes through the metal layer240and is directly connected to the inner layer circuit layer220and the outer layer circuit layer280. Thus, a signal transfer distance between the inner layer circuit layer220and the outer layer circuit layer280is reduced, thereby improving performance of a signal transmission.

Method of Manufacturing a Printed Circuit Board

FIGS. 3 through 10are exemplary diagrams for explaining a method of manufacturing a printed circuit board according to an exemplary embodiment of the present disclosure.

Referring toFIG. 3, the board210on which an inner layer buildup layer is formed is prepared.

The board210according to an exemplary embodiment of the present disclosure is complex polymer resin usually used as an interlayer insulating material. For example, the board210may manufacture a thinner printed circuit board200by employing prepreg. Alternatively, the board210may easily implement a fine circuit by employing ABF (Ajinomoto Build Up Film). In addition, the board210may use epoxy based resin such as FR4, BT (Bismaleimide Triazine), etc. but is not particularly limited thereto. The board210may be formed by using a copper clad laminate (CCL). The board210is configured as a single insulating layer in the exemplary embodiment of the present disclosure but the present disclosure is not limited thereto. That is, the board210may be configured as one or more insulating layers, a circuit layer, and a via.

According to an exemplary embodiment of the present disclosure, the inner layer buildup layer may be formed on the board210. The inner layer buildup layer may include the inner layer circuit layer220. The inner layer circuit layer220may include the inner layer circuit pattern221and the via pad222. The via pad222is in contact with and is electrically connected to a via that is formed later.

According to an exemplary embodiment of the present disclosure, the inner layer circuit layer220is formed of a conductive material. For example, the inner layer circuit layer220may be formed of copper. However, a material forming the inner layer circuit layer220is not limited to copper. That is, the material forming the inner layer circuit layer220may be applied without restriction if the material is used as a conductive material for a circuit in the circuit board field. The inner layer buildup layer is configured as the inner layer circuit layer220of one layer inFIG. 3but the configuration of the inner layer buildup layer is not limited thereto. For example, the inner layer buildup layer may be formed as the inner layer circuit layers220of multi layers and inner layer insulating layers (not shown) formed between the inner layer circuit layers220for insulating the inner layer circuit layers220from each other.

According to an exemplary embodiment of the present disclosure, the insulating film100includes the first insulating material110, the second insulating material130, and the metal thin film120.

According to an exemplary embodiment of the present disclosure, the first insulating material110and the second insulating material130are formed of complex polymer resin usually used as an interlayer insulating material. For example, the first insulating material110and the second insulating material130may be formed of epoxy based resin such as prepreg, ABF (Ajinomoto Build Up Film), FR4, BT (Bismaleimide Triazine), etc. The first insulating material110and the second insulating material130may be formed in the form of a film. However, the materials forming the first insulating material110and the second insulating material130and the shapes in the exemplary embodiment of the present disclosure are not limited as described above. That is, any insulating materials and shapes used in a circuit board field may be applied to the first insulating material110and the second insulating material130.

According to an exemplary embodiment of the present disclosure, the metal thin film120is formed between the first insulating material110and the second insulating material130. The metal thin film120may be formed of metal such as copper, silver, nickel, etc. In the exemplary embodiment of the present disclosure, the metal thin film120may be formed of copper. However, a material forming the metal thin film120is not limited to copper. That is, the material forming the metal thin film120may be possible if the material is a metal material having conductivity.

As such, the insulating film100according to an exemplary embodiment of the present disclosure has a structure in which the first insulating material110, the metal thin film120, and the second insulating material130are sequentially stacked.

Referring toFIG. 5, an insulating film (100ofFIG. 4) is stacked on an inner layer buildup layer.

According to an exemplary embodiment of the present disclosure, the insulating film (100ofFIG. 4) is pressurized after being positioned on the inner layer circuit layer220of the inner layer buildup layer.

According to an exemplary embodiment of the present disclosure, a first insulating material (110ofFIG. 4) of the insulating film (100ofFIG. 4) formed on the inner layer buildup layer is the first insulating layer230of the printed circuit board200. A second insulating material (130ofFIG. 4) of the insulating film (100ofFIG. 4) formed on the inner layer buildup layer is the second insulating layer250of the printed circuit board200. The metal thin film120of the insulating film (100ofFIG. 4) is the metal layer240of the printed circuit board200and functions as a ground layer.

The via hole261according to an exemplary embodiment of the present disclosure may pass through the first insulating layer230, the metal layer240, and the second insulating layer250and expose the via pad222of the inner layer buildup layer. According to an exemplary embodiment of the present disclosure, the via hole261may be formed by using a Yag laser drill. However, a method of forming the via hole261is not limited to using the Yag laser drill. The via hole261may be formed by using one of a router and laser drill.

The insulating coating layer270according to an exemplary embodiment of the present disclosure is formed in an inner wall of the via hole261and the via pad222exposed by the via hole261. The insulating coating layer270is formed to insulate the metal layer240and a via (260ofFIG. 9) that is to be formed in the via hole261later.

The insulating coating layer270according to an exemplary embodiment of the present disclosure is formed of complex polymer resin usually used as an interlayer insulating material. For example, the insulating coating layer270may be formed of epoxy based resin such as prepreg, ABF (Ajinomoto Build Up Film), FR4, BT (Bismaleimide Triazine), etc. However, the materials forming the insulating coating layer270in the exemplary embodiment of the present disclosure are not limited as described above. That is, any insulating materials used in the circuit board field may be applied to the insulating coating layer270.

The above-formed insulating coating layer270prevents residues of the first insulating layer230and the second insulating layer250that occur when forming the via hole261or a reliability degradation due to a defect caused by a burr.

Referring toFIG. 8, the insulating coating layer270formed in the via pad222is removed. According to an embodiment of the present disclosure, the insulating coating layer270formed in the via pad222is removed for an electrical connection between the via pad222and a via (260ofFIG. 9) formed in the via hole261later. For example, the insulating coating layer270may be removed by using a CO2 laser drill. However, a method of removing the insulating coating layer270is not limited to using the CO2 laser drill. The insulating coating layer270may be removed by applying one of methods of removing an insulating material known in the circuit board field. Insulating residues of the via pad222may be removed by further performing a desmear process after removing the insulating coating layer270by using a laser drill, etc.

Referring toFIG. 9, the via260and the outer layer buildup layer are formed.

According to an exemplary embodiment of the present disclosure, the via260is formed inside the via hole261. That is, the via260is formed to pass through the first insulating layer230, the second insulating layer250, and the metal layer240. According to an exemplary embodiment of the present disclosure, one surface of the via260is in contact with the inner layer circuit layer220of the inner layer buildup layer. Another surface of the via260is in contact with the outer layer circuit layer280of the outer layer buildup layer. The above-formed via260electrically connects the inner layer buildup layer and the outer layer buildup layer. According to an exemplary embodiment of the present disclosure, the via260may be formed of copper. However, a material forming the via260is not limited to copper. That is, the material forming the via260may be possible if the material is a conductive material.

According to an exemplary embodiment of the present disclosure, the outer layer buildup layer is formed on the second insulating layer250and the via260. The outer layer buildup layer includes the outer layer circuit layer280. The outer layer circuit layer280includes an outer layer circuit pattern281and an external connection pad282. In this regard, the external connection pad282is a component electrically connected to the outside through an external connection terminal, etc. For example, the external connection terminal may be a solder ball.

According to an exemplary embodiment of the present disclosure, the outer layer circuit layer280is formed of a conductive material. For example, the outer layer circuit layer280may be formed of copper. However, a material forming the outer layer circuit layer280is not limited to copper. That is, if a material is used as a conductive material for a circuit in the circuit board field, the material may be applied to the outer layer circuit layer280without restriction.

According to an exemplary embodiment of the present disclosure, the via260and the outer layer circuit layer280may be simultaneously formed by using plating resist (not shown) or etching resist (not shown). The via260and the outer layer circuit layer280may be individually formed. The via260and the outer layer circuit layer280according to an exemplary embodiment of the present disclosure may be formed by using methods of forming a circuit pattern and a via known to the circuit board field.

In the exemplary embodiment of the present disclosure, the outer layer circuit layer280of one layer is formed in the via260. However, the outer layer buildup layer is configured as the outer layer circuit layer280of one layer but the configuration of the outer layer buildup layer is not limited thereto. For example, the outer layer buildup layer may be formed as the outer layer circuit layers280of multi layers and outer layer insulating layers (not shown) formed between the outer layer circuit layers280for insulating the outer layer circuit layers280from each other.

In the related art, processes of forming an insulating layer, exposure, development, etching, and plating need to be performed so as to form a ground layer. However, according to an exemplary embodiment of the present disclosure, the ground layer may be formed by only stacking the insulating film100in which the metal thin film120is interposed without a separate process. Thus, the method of manufacturing the printed circuit board200using the insulating film100according to an exemplary embodiment of the present disclosure reduces the number of processes compared to the related art. The method of manufacturing the printed circuit board200using the insulating film100according to an exemplary embodiment of the present disclosure may save cost expense owing to the reduction in the number of processes.

The above-formed printed circuit board200shields signal noise since the metal layer240performs a function of the ground layer. Thus, a stable signal transmission is possible between a circuit pattern formed on the printed circuit board200and an electronic component (not shown) connected to the printed circuit board200later. In the printed circuit board200formed according to an exemplary embodiment of the present disclosure, the via260passes through the metal layer240and is directly connected to the inner layer circuit layer220and the outer layer circuit layer280. Thus, a distance of a signal transmission between the inner layer circuit layer220and the outer layer circuit layer280is reduced, thereby improving performance of the signal transmission.

The solder resist layer290according to an exemplary embodiment of the present disclosure is formed on the outer layer buildup layer. The solder resist layer290is formed to prevent solder from being coated on the outer layer circuit pattern281or oxidized when a soldering process is performed. The solder resist layer290is formed to surround the outer layer circuit pattern281and expose the outer connection pad282. For example, the solder resist layer290is formed of a heat resisting sheath material.

Although the embodiments of the present disclosure have been disclosed for illustrative purposes, it will be appreciated that the present disclosure is not limited thereto, and those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the disclosure.

Accordingly, any and all modifications, variations or equivalent arrangements should be considered to be within the scope of the disclosure, and the detailed scope of the disclosure will be disclosed by the accompanying claims.