Active matrix liquid crystal display device

The first output buffer 22 of the driving LSI 20 outputs the first video signal voltage V and the second output buffer outputs the second video signal voltage *V with the opposite polarity from that of the first video signal voltage. The first and the second video signal voltages V, *V are fed to the drain driver 2 of the display panel 1 through a pair of signal wirings. The drain driver 2 supplies the first video signal voltage V to a pixel and the second video signal voltage with the opposite polarity to the pixel adjacent to the fist pixel through the drain line 5 and the TFT9. In this way, any pair of the adjacent pixels in horizontal and vertical direction receives the video signal voltages with opposite polarities from each other.

CROSS-REFERENCE OF THE INVENTION

This invention is based on Japanese Patent Application No. 2004-067866, the content of which is incorporated herein by reference in its entirety.

BACKGROUND OF THE INVENTION

1. Field of Invention

This invention relates to an active matrix display device.

2. Description of Related Art

The deterioration of liquid crystal is prevented by the common AC driving that gives AC potential to a common electrode and a supplemental capacitance in the active matrix display device where an image signal is applied to a pixel electrode through a switching element such as a thin film transistor (TFT). Also, low energy consumption is achieved by lowering both electric current and voltage of a drain driver through the minimization of the voltage difference between the positive and negative polarities of video signal inputted to the drain driver. The voltage polarity of the common electrode and all the supplemental capacitance lines is inverted at each horizontal period in a line inversion driving system where polarity of the video signal given to the drain line is inverted at each horizontal period during the common AC driving.

The Japanese patent publication 2003-150127 discloses the common DC dot inversion driving system, in which the video voltages with opposite polarities are applied to the pixels in such way that any pair of the adjacent pixels in horizontal and vertical direction have opposite polarity from each other by supplying the video voltage with opposite polarities to the pixel electrodes next to each other in gate line direction with the voltage Vcom of the common electrode potential as the DC potential.

However, line-flicker easily appears in the line inversion driving system, deteriorating the display quality. Although the common DC dot inversion driving system can achieve the high quality display since it does not cause line-flicker, its energy consumption is large because of the wider dynamic range of the video signals V, V* (signal V* signifies the signal with the opposite polarity from that of signal V) as shown inFIG. 12.

SUMMARY OF THE INVENTION

The invention provides an active matrix display device that includes a plurality of a first pixel electrodes and a plurality of a second pixel electrodes. Each of the second pixel electrodes is disposed adjacent a corresponding first pixel electrode. The device also includes a signal processing circuit outputting a composite video signal having a first video signal and a second video signal that has a polarity opposite from a polarity of the fist video signal. The dynamic range of the composite video signal is not larger than the sum of the dynamic range of the first video signal and the dynamic range of the second video signal. The device further includes a driver circuit supplying the first video signal to the first pixel electrodes and the second vide signal to the second pixel electrodes.

DETAILED DESCRIPTION OF THE INVENTION

Next, the first embodiment of the active matrix display device of this invention will be explained by referring to the figures.FIG. 1is a circuit block chart of the active matrix display device.FIG. 2is a model view of the pixel region of the display panel of the active matrix display device.FIG. 3is a pattern view of the display region of the display panel of the active matrix display device, andFIG. 4is its equivalent circuit diagram.

A display panel1and a driving LSI20that supplies a driving signal to the display panel1are provided, as shown inFIG. 1. The configuration of the display panel1will be explained.

A drain driver2is disposed in row direction and a gate driver3is disposed in column direction on a display panel. A display region4for displaying image is disposed surrounded with the drain driver2and gate driver3. A plurality of drain lines5and a plurality of rectangular pixel electrode with the longitudinal side in column direction are disposed in column direction and a gate line7, a first supplemental capacitance line8aand a second supplemental capacitance line8bare disposed in row direction in the display region4, as shown inFIGS. 3 and 4.

A TFT9and a first supplemental capacitance10aor a second supplemental capacitance10bare formed in the region with the pixel electrode6(referred to as “a pixel” hereinafter). That is, the first supplemental capacitance10ais disposed in the first pixel GS1and the second supplemental capacitance10bis disposed in the second pixel GS2adjacent to the first pixel GS1. The first pixel GS1and the second pixel GS2are alternatively formed in row direction.

The TFT9includes a gate electrode9gextending from the gate line7, a drain region9dthat is a semiconductor layer electrically connected to the drain line5through a contact, and a source region9sthat is a semiconductor layer electrically connected to the pixel electrode6through a contact. The first supplemental capacitance10aincludes a supplemental capacitance electrode10xthat is a semiconductor layer connected to the TFT9and a supplemental capacitance electrode10yextending from the first supplemental capacitance line8aand superimposing over the supplemental capacitance electrode10xwith a capacitance-insulating layer. The second supplemental capacitance10bincludes the supplemental capacitance electrode10xmentioned above and a supplemental capacitance electrode10zextending from the second supplemental capacitance line8band superimposing over the supplemental capacitance electrode10xwith a capacitance-insulating layer.

A first parasitic capacitance15ais formed between the pixel electrode6and the second supplemental capacitance line8bin the first pixel GS1, and a second parasitic capacitance15bis formed between the pixel electrode6and the first supplemental capacitance line8ain the second pixel GS2. A liquid crystal is sealed in between the substrate with the TFT9formed on it and the other substrate facing against the first substrate. A common electrode11is formed on the other substrate, forming a supplemental capacitance electrode corresponding to the pixel electrode6of a liquid crystal capacitance12.

The driving LSI20, which will be explained below, formed outside of the display panel1supplies the first video signal voltage V and the second video signal voltage *V with the polarities opposite to each other to the drain driver2. The drain driver2, then, consecutively selects the drain line5, feeding either the first video signal voltage V or the second video signal voltage *V. The first video signal voltage V and the second video signal voltage *V have voltages with the polarities opposite to each other, the voltage of the common electrode11(referred to as the common electrode potential Vcom, hereinafter) being their the reference voltage.

That is, the drain driver2supplies the first video signal voltage V (indicated as “+” inFIG. 2) to the pixel electrode6of a pixel and supplies the second video signal *V (indicated as “−” inFIG. 2) with the opposite polarity from that of the first video signal voltage to the pixel electrode6of the pixel adjacent to the pixel with the first video signal voltage. In this way, any pair of the adjacent pixels in horizontal and vertical direction receives the video signal voltages with opposite polarities from each other.

The gate driver3consecutively selects the gate line7and applies the gate signal GV. The display region4is a region for image display with a plurality of pixel electrodes6. The drain line5is the wiring for transmitting either the first video signal voltage V or the second video signal voltage *V that have the polarities opposite from each other to the TFT9through the contact. The pixel electrode6, which is a display unit configuring the pixel region, is the electrode for driving the liquid crystal by the video signal voltages V, *V transmitted from the drain line5through TFT9together with the common electrode11.

The gate line7, selected by the gate driver3receives the gate signal GV, turning the TFT9on. The first supplemental capacitance line8ais formed in the same layer as the layer of the gate line7together with the supplemental capacitance electrode10yarranged in row direction, connecting the first supplemental capacitances10aformed in each row. The second supplemental capacitance line8bis formed in the same layer as the layer of the gate line7together with the supplemental capacitance electrode10zarranged in row direction, connecting the second supplemental capacitances10bformed in each row.

The first supplemental capacitance line8aand the second supplemental capacitance line8breceive a high potential SCH and a low potential SCL with the opposite polarities from a SC driver and the polarities are inverted with a predetermined timing. The SC driver includes a shift resistor and a signal supply circuit.

The TFT9is a switching element for letting the electric current go through a channel region, which is a semiconductor layer, located directly under the gate electrode9g, either from the source region9sto the drain region9dor from the drain region9dto the source region9sonly when the voltage is applied to the gate electrode9g. The first supplemental capacitance10aand the second supplemental capacitance10bhold the electric load coming from the video signal voltages V and *V supplied from the drain line5through the TFT9for one frame period, supplementing the loss of electric load of the liquid crystal capacitance12. The common electrode11, with a certain amount of voltage applied drives the liquid crystal with the pixel electrode6according to the video signal voltages V and *V applied to the pixel electrode6. The electric load of the liquid crystal capacitance12comes from the video signal voltages V, and *V supplied from the drain line5through the TFT9and held by the liquid crystal.

However, the electric charge held by the liquid crystal12easily leaks due to current leakage because of impurities in the liquid crystal while the TFT9is off. Therefore, the electric charge held in the first supplemental capacitance10aand the second supplemental capacitance10bsupplements the electric load of the liquid crystal capacitance12.

Next, the configuration of the driving LSI20provided outside of the display panel1will be explained. An analog video signal inputted from outside is processed into the first video signal voltage V and the second video signal voltage *V with the polarities opposite from that of the first video signal voltage through a polarity switching circuit21. The polarities of the first video signal voltage V and the second video signal voltage *V are inverted for each horizontal period.

The first video signal voltage V and the second video signal voltage *V are outputted to a pair of signal wirings through an output buffer22and an output buffer23respectively, and then fed to the drain driver2of the display panel1.

The reference numeral24denotes a potential source for generating the high potential SCH, which is outputted through a high potential buffer25. The reference numeral26denotes a potential source for generating the low potential SCL, which is outputted through a low potential buffer27. The High potential SCH and the low potential SCL are supplied to the SC driver16.

The reference numeral28denotes a potential source for generating a common electrode potential Vcom, which is outputted through an output buffer29. The high potential SCH and the low potential SCL outputted from the first and the second output buffers25,27have the polarities opposite from that of the common electrode potential Vcom outputted from the output buffer29. Since the high potential SCH, the low potential SCL and the common electrode potential Vcom are all DC potential, the energy consumption of the driving LSI20will be reduced.

The driving LSI20generates a horizontal start signal STH, a horizontal clock signal CKH, a vertical start signal STV, a vertical clock signal CKV, a SC driver controlling clock CKVS and other controlling clocks and supplies these signals to the display panel1.

An analog video signal is inputted into the driving LSI20in the active matrix display device mentioned above. However, it is also possible to input a digital video signal and change it into an analog video signal.FIG. 5shows a block circuit diagram of the active matrix display device with this configuration. A digital video signal inputted from outside is processed into a pair of digital video signals, whose polarities are inverted at each horizontal period, by an inversion processing circuit61. The pair of the digital video signals is inputted into DA converters (digital analog converter)62,63respectively, and inverted into analog video signals, a first video signal potential V and the second video signal potential*V with the opposite polarities.

The first video signal voltage V and the second video signal voltage *V are outputted to a pair of signal wirings through an output buffer22and an output buffer23respectively, and then fed to the drain driver2of the display panel1. Other configuration is the same as that of the active matrix display device shown inFIG. 1.

Next, the driving method of the active matrix display device mentioned above will be explained.FIG. 6is a timing chart showing the relation among signals in the display panel. The chart shows the timing of the potential change of the vertical start signal STV, the gate signal GV, the horizontal start signal STH, the horizontal clock signal CKH, the potential SCa of the first supplemental capacitance line8aand the potential SCb of the second supplemental capacitance line8b.

First, the pulse of the gate signal GV1starts up after the pulse of the vertical start signal STV starts up, turning on the TFT9connected to the gate line7in the first row which receives the gate signal GV1. Then, the pulse of the horizontal start signal STH starts up, and it is synchronized with the pulse of the horizontal clock signal CKH while the gate signal GV1is supplied to the gate line7in the first row. The drain driver2consecutively selects the drain line5and the first and the second video signal voltages V, *V are consecutively applied to the pixel electrode6, the first supplemental capacitance10a, and the second supplemental capacitance10bthrough the TFT9.

The first video signal voltage V is fed to the pixel electrode6of the first pixel GS1, the first supplemental capacitance10aand the first parasitic capacitance15a. The second video signal voltage *V is fed to the pixel electrode6of the second pixel GS2, the second supplemental capacitance10band the first parasitic capacitance15b.

The gate signal GV1is not supplied to the gate line7on the first row, turning off the TFT9that is connected to the gate line7when the video signal voltage VD is fed to all the drain lines5. Then, the pulse of the gate signal GV2and gate signal GV3consecutively get started, feeding the gate signal GV2to the gate line7on the second row and the gate signal GV3to the gate line7on the third row. This operation is repeated.

The polarity of the potential SCa of the first supplemental capacitance line8aand the potential SCb of the second supplemental capacitance line8bare inverted while the TFT9connected to the gate line7is off because the gate line7does not receive the gate signal GV. That is, the polarity is inverted for the period staring from the time when the gate signal GV1gets halted to the time when the gate signal GV2gets started. The SC driver16controls the potential SCa of the first supplemental capacitance line8ato change from the high potential SCH into low potential SCL and the potential SCb of the second supplemental capacitance line8bto change from the low potential SCL into the high potential SCH. The inversion of the polarities between the potential SCa of the first supplemental capacitance line8aand the potential SCb of the second supplemental capacitance line8btakes place for each row with one frame circle.

The voltage of the pixel electrode6(refereed to as the pixel voltage Vp, hereinafter) changes either to the positive voltage direction or the negative voltage direction through its capacitance coupling with the first supplemental capacitance10aand first parasitic capacitance15aor the capacitance coupling with the second supplemental capacitance1band the second parasitic capacitance15b, performing the dot inversion driving, based on the voltage change ΔVs of the supplemental capacitance line. Then, the pulse of the vertical start signal STV starts up again when the gate signal GV is fed to all the gate line7, feeding the gate signal GV to the gate line7on the first row. The same operation is repeated.

Therefore, each pixel in the first row receives the video signals with the polarity of +−+− , , , , each pixel in the second row receives the video signals with the polarity of −+−+ , , , , and each pixel in the third row receives the video signals with the polarity of +−+− , , , . This operation is repeated, performing the dot inversion driving.

FIGS. 7A and 7Bare the waveform showing the driving method of the display device of an embodiment of this invention.FIG. 7Ashows the change of the pixel voltage Vp of the first pixel GS1around the time when the polarity of the voltage SCa of the first supplemental capacitance line8ais inverted.FIG. 7Bshows the change of the pixel voltage Vp of the second pixel GS2around the time when the polarity of the voltage SCb of the second supplemental capacitance line8bis inverted.

It shows that the voltage SCa of the first supplemental capacitance line8ais inverted from 3.15V to 0V and the voltage SCb of the second supplemental capacitance line8bis inverted from 0V to 3.15V after the gate signal GV1drops down to low level.

The pixel voltage Vp of the first pixel GS1changes in negative voltage direction against the stable voltage Vcom of the common electrode11and the pixel voltage Vp of the second pixel electrode GS2changes in positive voltage direction against the stable voltage Vcom of the common electrode11through the capacitance coupling mentioned above according to the voltage change ΔVsc.

The active matrix display device of this embodiment described above can improve the quality of image by performing the dot inversion driving. Additionally, since the video signal is not a single-phased signal, but a double-phased signal with the first and second video signal voltages V and *V, it is possible to make the inversion circle one horizontal period (1H period), leading to the smaller electric load to the driving LSI20and the reduction of the energy consumption, as shown inFIG. 8. If the video signal is a single-phased signal, the video signal should be inverted at a high speed within one horizontal period for each pixel (for each dot) in order to make the dot inversion driving possible, as shown inFIG. 9, leading to the larger energy consumption by the driving LSI20.

The dynamic range of the compound signal of the first and the second video signal voltages V, *V is the same dynamic range of each of the first and second video signal voltages V, *V (for example, about 2.5V) in this embodiment, as shown inFIG. 7, leading to the further reduction of the energy consumption by the driving LSI20. Additionally, it is possible to further reduce the energy consumption if the dynamic range of the composite signal of the first and the second video signal voltages V, *V is smaller than the sum of the dynamic range of the first and second video signal voltages V, *V.

The double-phased video signal with the first and the second video signal voltages V, *V is fed to the display panel1in this embodiment, the video signal voltage of any even-numbered phase, such as the video signal voltage with four phases, six phases or eight phases can also be generated in the driving LSI20and fed to the display panel1. For example, the first and the third video signal voltages V1and V3has the same polarity and the second and the fourth video signal voltages V2and V4has the polarity opposite from that of the first and the third video signal voltages, when the video signal with four phases is generated. The video signals V1, V2, V3, and V4are fed in this order to each of the pixels, achieving the low energy-consumption dot inversion driving.

Next, the second embodiment of the active matrix display device of this invention will be explained by referring to the figures.FIG. 10is a circuit block chart of the active matrix display device. AndFIG. 11is a model view of the pixel region of the display panel of the active matrix display device of this invention.

The first embodiment relates to the active matrix display device with black and white display. However, the active matrix display device of the second embodiment of this invention is a multiple-color display.

The video signals with three primary colors, RGB are supplied to the driving LSI40in this active matrix display device. Polarity switching circuits41,42,43corresponding to the video signals with three primary colors, RGB, and a pair of output buffers to amplify the output of the switching elements are formed in the driving LSI40.

The video signal voltage SR and the video signal voltage *SR with the polarity opposite from that of the video signal RS are acquired as to the red color. Likewise, the video signal voltage SG and the video signal voltage *SG with the polarity opposite from that of the video signal SG are acquired as to the green color, and the video signal voltage SB and the video signal voltage *SB with the polarity opposite from that of the video signal SB are acquired as to the blue color. That is, the video signal with two phases that has the opposite polarities with the common electrode voltage Vcom as the reference voltage is generated for each color.

These video signal voltages are fed to a drain driver32of a display panel51through6signal wirings. Pixels corresponding to three primary colors, RGB, are formed in the order of R, G, and B in a display region34of the display panel51as shown inFIG. 10. The drain driver32applies the video signal voltages SR and *SR to the pixels in such way that the red pixels adjacent to each other receive the video signal voltages with the opposite polarities. Likewise, the drain driver32applies the video signal voltages SR and *SR to the pixels in such way that the green pixels adjacent to each other receive the video signal voltages with the opposite polarities, and video signal voltages SB and *SB to the pixels in such way that the blue pixels adjacent to each other receive the video signal voltages with the opposite polarities.

The dot inversion driving can be achieved in this way in the full-color active matrix display device. Since the video signals corresponding to each color has the inversion circle of one horizontal period, as in the first embodiment, it is possible to make the electric load of the driving LSI40smaller, leading to the reduced energy consumption. Also, the dynamic range of the video signals corresponding to each color is set narrower, as in the first embodiment, the smaller load of the driving LSI40is achieved, leading to the further reduction of the energy consumption.

The first and the second embodiments of this invention can achieve the high quality active matrix display device that is capable of both the line inversion driving with the low energy consumption and the dot inversion driving with high quality display.

The driving LSIs20,40are formed outside the display panels1,51respectively in the first and the second embodiments. However, it is also possible to form the driving LSIs20,40within the display panels1,51, respectively. The TFT is used as the switching element for each pixel. The TFT can be poly-silicon TFT or amorphous TFT. It is also possible to use TFD (thin film diode) instead of TFT, as a switching element.