Input voltage dependent control for active clamp flyback

A method for controlling a power converter includes turning on a power switch to maintain a desired output voltage, wherein the power switch is coupled to a primary winding to control a primary current flow and the output voltage is provided by a secondary winding. The method also includes adding a capacitance in parallel to the power switch at a time determined by a magnitude of an input voltage to the power converter. Here, the timing of adding the capacitance depends on the operation mode of the power controller. In a low input voltage mode, the capacitance is added in a demagnetization-time during which the secondary winding discharges. In a high input voltage mode, the capacitance is added in a discontinuous time.

BACKGROUND OF THE INVENTION

The present invention relates to switching mode power supplies. More particularly, the invention provides methods and apparatus for reducing electromagnetic interference (EMI) of switching mode power supplies.

Regulated power supplies are indispensable in modern electronics. For example, the power supply in a personal computer often needs to receive power input from various outlets. Desktop and laptop computers often have regulated power supplies on the motherboard to supply power to the CPU, memories, and periphery circuitry. Regulated power supplies are also used in a wide variety of applications, such as home appliances, automobiles, and portable chargers for mobile electronic devices, etc.

In general, a power supply can be regulated using a linear regulator or a switching mode controller. A linear regulator maintains the desired output voltage by dissipating excess power. In contrast, a switching mode controller rapidly switches a power transistor on and off with a variable duty cycle or variable frequency and provides an average output that is the desired output voltage.

In such a switched mode power supply system, a switch is connected to the primary winding of the transformer. In the switching power supplies, the power transistor switches on and off periodically to convert the primary current of the transformer to the secondary side. The stable output voltage will be obtained by regulating the duty cycle or frequency of the primary side switch. Magnetic energy is stored in the inductance of the primary winding when the switch is turned on, and the energy is transferred to the secondary winding when the switch is turned off. The energy transfer results in a current flowing through the secondary winding and the rectifying diode. When the energy transfer is completed, the current stops flowing through the diode. If the switching mode power supply, also referred to as the flyback converter, operates in discontinuous conduction mode (DCM), during the discontinuous time, a resonant waveform of substantially sinusoidal oscillation of decreasing amplitude appears at the secondary winding and across the power switch due to the built-in inductance and capacitance in the converter. After the discontinuous time, the power switch is turned on again in the next switching cycle.

In quasi-resonant (QR) switching, the controller waits for one of the valleys in the resonant waveform of the drain voltage and then turns on the power switch. Compared with the traditional continuous conduction mode (CCM) and discontinuous conduction mode (DCM) of operation in a flyback converter, quasi-resonant switching can reduce turn-on losses at the power switch, thus increasing efficiency and lowering device temperatures.

Compared with linear regulators, switching mode power supplies have the advantages of smaller size, higher efficiency and larger output power capability. On the other hand, they also have the disadvantages of greater noise, especially electromagnetic Interference (EMI) at the power transistor's switching frequency or its harmonics.

EMI is a critical issue in the design of a switching mode power supply. In order to reduce EMI, different frequency jittering techniques can be used. For example, switching frequencies may be varied by frequency modulation in order to spread out the electromagnetic radiation energy across a frequency range. One way to vary the switching frequency is to add a jitter component to the system clock. This technique helps reducing average EMI emission. However, implementing effective jittering can be difficult in a quasi-resonant (QR) converter, as explained further below.

BRIEF SUMMARY OF THE INVENTION

The inventor has recognized that, in a quasi-resonant (QR) converter, it is difficult to implement effective frequency jitter. Under discontinuous conduction mode (DCM), the flyback converter has an LC resonant waveform during the discontinuous time after the secondary side current is discharged. The QR operation turns on the power switch at a valley point of resonant voltage. The turn-on condition at a valley point of the resonant voltage can limit the switching frequencies of the flyback system and prevent the switching frequency to spread over a relatively large frequency range. As a result, the effectiveness of the jittering is limited.

This invention teaches a technique for introducing jitter in the switching frequency of a power converter. The power converter includes a power switch controlling the primary current flow, and a time-varying capacitance is coupled in parallel to the power switch. The time-varying capacitance adds a frequency jitter to the frequency of the converter.

This invention also teaches a power converter having a power switch controlling current flow in the power converter and a variable capacitance coupled in parallel to the power switch. The variable capacitance is configured to add a frequency jitter to the power converter. In some embodiments, the frequency jitter comprises a first portion that varies with an input voltage of the power converter and a second portion that is a time-varying function. The first portion that varies with an input voltage can reduce the switching loss of the power converter. In some embodiments, the variable capacitance comprises a transistor coupled in series with a capacitor.

As an example, this invention teaches a power converter that includes a transformer having a primary winding for coupling to an input voltage, a secondary winding providing an output voltage of the power converter, and a sensing circuit for providing a sensing signal, which monitors a resonant waveform of the power converter during discontinuous time. The power converter includes a power switch for coupling to the primary winding of the power converter to control a primary current flow, and a capacitor and a modulation switch coupled in parallel to the power switch.

The power converter can also include a control circuit that includes a power controller for turning on the power switch in response to the resonant waveform in the sensing signal during a discontinuous time, and a jitter controller for turning on the modulation switch in response to the resonant waveform in the sensing signal during the discontinuous time. The jitter controller varies a turn-on time of the modulation switch to add a frequency jitter to a switching frequency of the power converter. The frequency jitter can include a first portion that varies with the input voltage of the power converter and a second portion that is a time-varying function.

As another example, this invention teaches a method for controlling a power converter. The method includes turning on a power switch in response to a resonant waveform in a sensing signal during a discontinuous time of the power converter, wherein the power switch is coupled to a primary winding of the power converter to control a primary current flow. The method also includes adding a capacitance in parallel to the power switch during the discontinuous time, to vary an oscillation period of the resonant waveform to add a frequency jitter to a switching frequency of the power converter. The method can add a capacitance in parallel to the power switch by turning on a modulation switch that is coupled in series with a capacitor, wherein the capacitor and the modulation switch are coupled in parallel with the power switch. The frequency jitter can include a first portion that varies with an input voltage of the power converter and a second portion that is a time-varying function.

The invention also teaches a power converter having a power switch controlling current flow in the power converter and a variable capacitance coupled in parallel to the power switch. The variable capacitance is configured to add a frequency jitter to the power converter. In some embodiments, the frequency jitter comprises a first portion that varies with an input voltage of the power converter and a second portion that is a time-varying function. In some embodiments, the variable capacitance comprises a transistor couple in series with a capacitor.

In another example, this invention teaches a method for controlling a quasi-resonant (QR) converter to reduce electromagnetic interference (EMI). The converter includes a power switch coupled to a primary winding of the converter to control a primary current flow, and a sensing signal monitoring the converter through an auxiliary winding. The method includes turning on the power switch at a valley point of a resonant waveform in the sensing signal during a discontinuous time of the converter for quasi-resonant (QR) operation. The method further includes adding a capacitance in parallel to the power switch at a peak point of the resonant waveform in the sensing signal during the discontinuous time, to vary an oscillation period of the resonant waveform, which leads to variations of the discontinuous time and changes the switching frequency of the converter. A modulation switch with a time-varying on-time can be used to control the duration of time in which the additional capacitance is in effect. For example, the time-varying duration can be a linear function of time to spread out the switching frequency across a relatively large frequency range.

In another example, this invention teaches a control circuit for a quasi-resonant (QR) converter. The control circuit includes a quasi-resonant controller for turning on a power switch at a valley point of a resonant waveform in a sensing signal during a discontinuous time of the converter. The power switch is coupled to a primary winding of the converter to control a primary current flow, and the sensing signal is monitoring the resonant waveform of the converter through an auxiliary winding. The control circuit also includes a jitter controller for adding a capacitance in parallel to the power switch at a peak point of the resonant waveform in the sensing signal during the discontinuous time. The jitter controller varies an oscillation period of the resonant waveform to add a frequency jitter to a switching frequency of the converter.

In another example, this invention teaches a quasi-resonant (QR) converter. The converter includes a transformer having a primary winding for coupling to an external input voltage, a secondary winding providing an output voltage of the converter, and an auxiliary winding for providing a sensing signal of the converter. The converter also has a power switch for coupling to the primary winding of the converter to control a primary current flow, and a capacitor and a modulation switch coupled in parallel to the power switch, with the modulation switch coupled in series with the capacitor. The converter also has a control circuit that includes a quasi-resonant controller and a jitter controller. The quasi-resonant controller turns on the power switch at a valley point of a resonant waveform in the sensing signal during a discontinuous time. The jitter controller turns on the modulation switch at a peak point of the resonant waveform in the sensing signal during the discontinuous time. The jitter controller varies a turn-on time of the modulation switch to add a frequency jitter to a switching frequency of the converter.

In another example, this invention teaches a control circuit for a quasi-resonant (QR) converter. The control circuit includes a quasi-resonant controller for turning on a power switch at a valley point of a resonant waveform in a sensing signal during a discontinuous time of the converter, wherein the power switch is coupled to a primary winding of the converter to control a primary current flow, and the sensing signal monitors the resonant waveform of the converter through an auxiliary winding. The control circuit also includes a jitter controller for modulating a capacitance coupled in parallel to the power switch to vary an oscillation period of the resonant waveform to add a frequency jitter to a switching frequency of the converter. The frequency jitter includes a first portion that varies with an input voltage of the converter and a second portion that is a time-varying function. In an embodiment, the jitter controller starts varying the oscillation period at a peak point of the resonant waveform in the sensing signal during the discontinuous time.

In another example, this invention teaches a method for controlling a quasi-resonant (QR) converter. The method includes turning on a power switch at a valley point of a resonant waveform in a sensing signal during a discontinuous time of the converter. The power switch is coupled to a primary winding of the converter to control a primary current flow, and the sensing signal monitors the resonant waveform of the converter through an auxiliary winding. The method also includes modulating a capacitance coupled in parallel to the power switch to vary an oscillation period of the resonant waveform to add a frequency jitter to a switching frequency of the converter. The oscillation period includes an offset that varies with an input voltage of the converter and a time-varying dithering period. In an embodiment, the method also includes starting to vary the oscillation period at a peak point of the resonant waveform in the sensing signal during the discontinuous time.

In a flyback converter, to reduce the switching loss, a modulation switch QMcan be turned on to connect a modulation capacitor CSNin parallel with the capacitance COSSof the power switch for inducing a larger negative resonant current on Lm. However, in order to precisely control the negative current on Lm, the control circuit needs to accurately detect the peak of the resonant waveform for turning on the QM. As a result, the transformer must be operated under discontinuous conduction mode (DCM).

An aspect of this invention teaches to change the operating mode of the flyback system according to the input voltage. The efficiency of a flyback system is determined by different factors depending on the input voltage. The efficiency of a flyback system is often dominated by switching loss under high input voltage, and can be dominated by conduction loss under low input voltage. By changing the operating mode, the flyback system can benefit from lower peak current under low input voltage and can also benefit from drain-source voltage VDSreduction under high input voltage.

In an example, this invention teaches a power converter that includes a transformer having a primary winding for coupling to an input voltage, a secondary winding providing an output voltage of the power converter, and a sensing circuit for providing a sensing signal monitoring the converter through an auxiliary winding. The power converter also includes a power switch for coupling to the primary winding of the power converter to control a primary current flow, a capacitor and a modulation switch coupled in parallel to the power switch, the modulation switch being coupled in series with the capacitor, and a control circuit. The control circuit includes a power controller for turning on the power switch to maintain a desired output voltage and a mode selection circuit for comparing the input voltage with a reference voltage and providing a mode selection signal that indicates a high input voltage mode if the input voltage is higher than the reference voltage and a low input voltage mode if the input voltage is lower than the reference voltage. The control circuit further includes a modulation controller configured to turn on the modulation switch to activate the capacitor according to the mode selection signal. In the low input voltage mode, the modulation switch is turned on in a demagnetization-time during which the secondary winding discharges. In the high input voltage mode, the modulation switch is turned on in a discontinuous time during which no current flows in the transformer and the sensing signal is characterized by a resonant waveform.

In another example, this invention teaches a control circuit for a power converter. The controller includes a power controller for turning on a power switch to maintain a desired output voltage. The power switch is coupled to a primary winding of the power converter to control a primary current flow. The controller also includes a modulation controller configured to activate a modulation capacitance coupled in parallel to the power switch. In a low input voltage mode, the modulation switch is turned on in a demagnetization-time during which the secondary winding discharges. In a high input voltage mode, the modulation switch is turned on in a discontinuous time.

In another example, the invention teaches a method for controlling a power converter. The method includes turning on a power switch to maintain a desired output voltage, wherein the power switch is coupled to a primary winding to control a primary current flow and the output voltage is provided by a secondary winding. The method also includes adding a capacitance in parallel to the power switch at a time determined by a magnitude of an input voltage to the power converter. In a low input voltage mode, the capacitance is added in a demagnetization-time during which the secondary winding discharges. In a high input voltage mode, the capacitance is added in a discontinuous time.

DEFINITIONS

The terms used in this disclosure generally have their ordinary meanings in the art within the context of the invention. Certain terms are discussed below to provide additional guidance to the practitioners regarding the description of the invention. It will be appreciated that the same thing may be said in more than one way. Consequently, alternative language and synonyms may be used.

A power switch as used herein refers to a semiconductor switch, for example, a transistor, that is designed to handle high power levels.

A power MOSFET is a specific type of metal oxide semiconductor field-effect transistor (MOSFET) designed to handle significant power levels. An example of a power MOSFET for switching operations is called a double-diffused MOS or simply DMOS.

A body diode in a power MOSFET is formed when the body and source are coupled together, and the body diode is formed between drain and source. The diode is located between the drain (cathode) and the source (anode) of the MOSFET making it able to block current in only one direction.

A power converter is an electrical or electro-mechanical device for converting electrical energy, such as converting between AC and DC or changing the voltage, current, or frequency, or some combinations of these conversions. A power converter often includes voltage regulation.

A regulator or voltage regulator is a device for automatically maintaining a constant voltage level.

A switching regulator, or switch mode power supply (SMPS) is a power converter that uses an active device that switches on and off to maintain an average value of output. In contrast, a linear regulator is made to act like a variable resistor, continuously adjusting a voltage divider network to maintain a constant output voltage, and continually dissipating power.

Continuous conduction mode (CCM) is an operational mode of a power converter, in which the system turns on the primary side current before the secondary side current is stopped.

Discontinuous conduction mode (DCM) is an operational mode of a power converter, in which there exists a discontinuous time period, during which the current flow is stopped on both the primary side and the secondary side. The primary side is turned on again following the discontinuous time period.

Quasi-resonant (QR) mode is an operational mode of a power converter operating in discontinuous conduction mode (DCM), in which the primary side is turned on at a valley point of a resonant waveform during the discontinuous time period. Quasi-resonant operation can reduce switching loss of the power converter.

An operational amplifier (op-amp or opamp) refers to a DC-coupled high-gain electronic voltage amplifier with a differential input and, usually, a single-ended output. An operational amplifier can be characterized by a high input impedance and a low output impedance, and can be used to perform mathematical operations in analog circuits.

A voltage reference is an electronic device that ideally produces a fixed (constant) voltage irrespective of the loading on the device, power supply variations, temperature changes, and the passage of time.

A reference voltage is a voltage value that is used as a target for a comparison operation.

When the term “the same” is used to describe two quantities, it means that the values of two quantities are determined the same within measurement limitations.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 1is a simplified schematic diagram of a flyback converter that embodies certain aspects of this invention. Flyback converter100includes a transformer102, which includes a primary winding141for coupling to an input voltage Vinand a secondary winding142for providing the output voltage Voutthrough a rectifying diode120and a capacitor119. A current in the rectifying diode is ID. Transformer102also has an auxiliary winding143for providing a sensing signal DMEG monitoring a resonant waveform of the converter during a discontinuous time. Auxiliary winding143also provides a voltage Vcc, which can be used as a power supply for the support circuitry, such as a control circuit. InFIG. 1, Vp denotes the voltage at the primary winding, Vs denotes the voltage at the secondary winding, and Va denotes the voltage at the auxiliary winding. InFIG. 1, Lmrepresents the inductance of the primary winding, and N represents the ratio of coil turns in the primary winding to the secondary winding. Cossrepresents the capacitance associated with primary switch101, including the capacitance from the body diode. Vds represents the drain-source voltage across the primary switch.

Converter100includes a control circuit150. Power supply100also includes a power switch101(also designated as QL) coupled to primary winding141and control circuit150for receiving a control signal to turn on and off power switch101to control the primary current through primary winding141in order to regulate output voltage VOUT. InFIG. 1, power switch101is shown as a MOSFET power transistor. In the embodiment ofFIG. 1, control circuit150can receive its operating power from Vccprovided by the auxiliary winding. Control circuit150can also receive sensing signal DMEG from auxiliary winding143. Control circuit150can also receive a current sense signal Vcs representative of the primary current through a current sense resistor116with a resistance Rcs. Control circuit150provides a control signal Drive to control power switch101. Control circuit150turns on the power switch101based on information provided by the sensing signal DMEG and turns off the power101based on information provided by the current sense signal Vcs.

As shown inFIG. 1, converter100also has a modulation capacitor130(also designated as Csn) and a modulation switch131(also designated as QM) coupled in parallel to power switch101. In this arrangement, modulation switch131is coupled in series with capacitor130. Control circuit150includes a valley detector151for detecting valley points in the resonant waveform in the sensing signal DMEG during the discontinuous time of converter100. Control circuit150also includes a peak detector152for detecting peak points in the resonant waveform in the sensing signal during the discontinuous time. Control circuit150also includes a quasi-resonant (QR) controller153for turning on the power switch101at a valley point of a resonant waveform in the sensing signal during a discontinuous time. Control circuit150further includes a jitter controller154for turning on the modulation switch131at a peak point of the resonant waveform in the sensing signal during the discontinuous time. Control circuit150also includes an oscillator OSC155, which provides a TFMAXsignal to jitter controller154. In addition to the TFMAXsignal, jitter controller154also receives a Ppulse signal from peak detector152, and provides a Mod_Off signal to QR controller153. QR controller153also receives a Vpulse signal from valley detector151. Control circuit150also includes a flipflop156that outputs the Drive signal.

As explained in detail below, the jitter controller154varies a turn-on time of the modulation switch131to add a frequency jitter to the switching frequency of the converter. The waveform of Vds is mirrored to the auxiliary winding and detected by a peak detector and a valley detector. The jitter controller determines the target peak count to turn on QMand linearly modulates the on time of QM. After QMis turned off, the QR controller is enabled by the jitter controller to wait for proper valley count and turn on QLat the valley of Vds.

FIG. 2Ais a simplified schematic diagram of part of flyback converter100ofFIG. 1, andFIG. 2Bshows waveform diagrams that illustrate a quasi-resonant operation of the converter that embodies certain aspects of this invention. InFIG. 2B, the following waveforms are shown over a switch cycle T of the converter. The first waveform “Drive” shows the control signal Drive applied to the primary switch101. The second waveform “Vds” shows the drain-to-source voltage Vds of the primary switch, which can be reflected in the sensing signal DMEG ofFIG. 1. The third waveform shows the primary current IPRIfeeding into the primary side of the transformer. The fourth waveform shows the secondary current ISECflowing out of the secondary side of the transformer. As can be seen inFIG. 2B, the primary switch is turned on during time period tON, and turned off during time period tOFF. During time period tON, the primary current flows through the primary switch. The secondary current flows during a first portion of time period tOFF. Time period tDISis a discontinuous time, during which both the primary current and the secondary current are off. During discontinuous time tDIS, a resonant waveform220exists in the waveforms of Vds, as well as DMEG. In the example ofFIG. 2B, resonant waveform220is shown to have three peak points221,223, and225and three valley points222,224, and226, marked by K=1, K=2, and K=3. In a quasi-resonant operation, the quasi-resonant controller153inFIG. 1turns on the power switch at a valley point of a resonant waveform in the sensing signal during the discontinuous time. InFIG. 2B, the primary switch is turned on at the third valley point (K=3) of resonant waveform220.

In a quasi-resonant operation, the turn-on condition “valley of resonant voltage” can improve power efficiency, but limits the switching frequency of the flyback system. According toFIG. 2, the equation of power delivery POUTin one switching cycle of the converter is:

POUT=ELmT=12⁢Lm⁢Ipeak2VIN+NVOUTLm×Ipeak+(K-12)⁢TQRT=VIN+NVOUTLm×Ipeak+(K-12)⁢TQR
where ELmis the energy stored in Lm, K is the valley count, and TQRis an oscillation period of the resonant waveform. In one switching period T, the power convertor stores energy ELminto Lm during tONand delivers the ELmto output during tOFF. Thus, the average transferred power POUTis equal to the ELmover T. In the POUTequation, the only variable that can be modulated is the peak current Ipeakbecause the valley count K should be a natural number. However, a power convertor should deliver POUTequal to the load that application is required. The Ipeakhas only one solution with a specific number K, and the switching period T is a constant value given by the couple of solution Ipeakand K. As a result, any disturbance of Ipeakfor dithering switching period will be compensated by an external feedback loop and the switching frequency will converge to the given value which can fulfill the output load POUT.

The invention teaches a control circuit for a quasi-resonant (QR) converter. As shown in the converter100shown inFIGS. 1, 2A, and 2B, for quasi-resonant operation, control circuit150includes a quasi-resonant controller153for turning on a power switch101at a valley point222,224, or226, etc., of a resonant waveform220in a sensing signal DMEG during a discontinuous time tDISof the converter. The power switch is coupled to a primary winding141of the converter to control a primary switch, and the sensing signal DMEG monitoring the resonant waveform through an auxiliary winding143. Control circuit150also includes a jitter controller154for adding a capacitance130in parallel to the power switch101at a peak point of the resonant waveform220in the sensing signal DMEG during the discontinuous time tDIS. For example, the capacitance can be added at peak points such as peak points221,223, or225, etc. By varying the length of time during which the capacitance is coupled, the jitter controller154can vary the oscillation period TQRof the resonant waveform to add a frequency jitter to the switching frequency of the converter.

FIG. 3is a waveform diagram that illustrates a jitter operation in a quasi-resonant operation of the converter that embodies certain aspects of this invention. InFIG. 3, the following waveforms are shown over a switch cycle T of the converter, with reference toFIGS. 1, 2A, and 2B. The top waveform Vds shows the drain-to-source voltage “Vds” of the primary switch. The middle waveform “Drive” shows the control signal Drive applied to the primary switch101. The bottom waveform “Mod” shows the control signal Mod applied to the modulation switch131. A resonant waveform220exists in the waveforms of Vds during the discontinuous time. In the example ofFIG. 3, resonant waveform320is shown to have three peak points321,323, and325, and three valley points322,324, and326, marked by K=1, K=2, and K=3. In the quasi-resonant operation, the quasi-resonant controller153inFIG. 1turns on the power switch101at a valley point326of the resonant waveform in the sensing signal during the discontinuous time. InFIG. 3, the primary switch is turned on at the third valley point326(K=3) of resonant waveform320, at the end of the switching period T of the switching cycle.

InFIG. 3, the control signal Mod turns on the modulation switch131for a time period tjitter. During the time period tjitter, modulation switch131is on, and modulation capacitor130is connected in parallel with primary switch101, causing a modulation capacitor Csnto be connected in parallel to the capacitance of the primary switch Coss. Accordingly, during the time period tjitter, the oscillation period for resonant waveform320is increased from TQRto TQR1.
TQR=2π√{square root over (LmCOSS)}
TQR1=2π√{square root over (Lm(COSS+Csn))}
where Lmis the inductance of the primary winding, Cossis the capacitance associated with the primary switch, and Csnis the capacitance of the modulation capacitor. By varying the time period during which the modulation capacitor Csnis connected, the period T of the switching cycle of the converter is also changed.

In order to reduce the hard switching loss as turning on MOS transistors, the modulation switch QMshould be turned on at a peak point of Vds, and the primary switch QLshould be turned on at a valley point of Vds. To fulfill the turn on timings, peak and valley detectors sense the DMEG node and produce pulse signals PPulseand VPulsebased on the peaks and valleys of Vds sinusoid oscillation.

In order to introduce jitter into the switching cycle, the turn-on time tjitterfor modulation switch131is varied over time.FIGS. 4A-4Dillustrate an example of varying the turn-on time tjitterthat embodies certain aspects of this invention.FIG. 4Ashows that the time period tjitter, the modulation switch on-time, is varied in a linear manner between a minimum of 0 and a maximum of tjitterMax.FIG. 4Bshows a corresponding switch frequency variation over a range of Δf.FIG. 4Cshows a corresponding variation in the switch frequency waveform.FIG. 4Dshows a spectrum plot of the Nth harmonic of the switch frequency waveform, with a center frequency of Nfavg. Even though the example inFIGS. 4A-4Dillustrates a linear function for the jitter frequency, other time-varying functions can also be used.

The maximum range of the frequency spectrum is dependent on the valley count of the primary switch turn on and the value of modulation capacitor Csn. If the modulation switch QMturn-on signal is applied on the same valley count as the primary switch turn on, the dithering range of the total switching period will be only a half cycle of mixed LC resonant and can be expressed as follows.

FIGS. 5A and 5Billustrate the waveforms for the QR converter in which the jitter causes the oscillation period for the resonant waveform to vary.FIG. 5Aillustrates the waveforms for the QR converter in which the jitter time tjitteris nearly zero, and the oscillation period for resonant waveform is TQR, as described above.FIG. 5Billustrates the waveforms for the QR converter in which the jitter time tjitteris at the maximum, tjitterMax, and the oscillation period for resonant waveform is TQR1, as described above.

FIGS. 6-10are schematic or waveform diagrams illustrating the structures and functions of various components in the control circuit in a converter that embody certain aspects of this invention.

FIG. 6shows schematic and waveform diagrams illustrating the structures and functions of a valley detector and a peak detector in the control circuit in a converter that embodies certain aspects of this invention. InFIG. 6, a valley detector610includes a first comparator611for comparing a sensing signal DMEG and a valley reference voltage Vref_V. A peak detector620includes a second comparator622for comparing a sensing signal DMEG and a peak reference voltage Vref_P. Waveform630illustrates the sensing signal DMEG, with the valley reference voltage Vref_V and peak reference voltage Vref_P. Waveform640illustrates the output waveform of the second comparator622, showing a pulse signal PPulsewhere the sensing signal DMEG is greater than peak reference voltage Vref_P. Waveform650illustrates the output waveform of the first comparator611, showing a pulse signal VPulsewhere the sensing signal DMEG is less than valley reference voltage Vref_V.

FIG. 7Ais a simplified schematic diagram illustrating a jitter controller, andFIG. 7Billustrates a waveform diagram that describes the operation of the jitter controller that embodies certain aspects of this invention. As shown inFIGS. 7A and 7B, jitter controller700is an example of a jitter controller that can be used as jitter controller154in converter100inFIG. 1. Jitter controller700includes two D flipflops. A first D flipflop710has a first input terminal711for receiving a blanking time signal TFMAX, a second input terminal712for receiving the peak pulse signal PPulse, a first output terminal713for providing a modulation-on signal Mod_On, and a second output terminal714for providing a complement of the modulation on signal. Jitter controller700also includes a jitter duration circuit720having a ramp signal circuit721with a current source722and capacitor723that starts charging the capacitor upon receiving the complement of the modulation on signal, from the second output terminal714of the first D flipflop710, to produce a ramp signal RAMP. Jitter duration circuit720also has a comparator725for comparing the ramp signal RAMP and a jitter reference voltage Vjitterand providing a jitter stop signal727. A second D flipflop730has a first input terminal731for receiving logic high signal Logic H, a second input terminal732for receiving the modulation on signal Mod_On from the first D flipflop710, a reset terminal735for receiving the jitter stop signal727, a first output terminal733for providing a modulation switch turn-on signal Mod, and a second output terminal734for providing a complement of the modulation switch turn-on signal. Jitter controller700also has an AND circuit740for receiving the modulation on signal Mod_On and the complement of the modulation switch turn-on signal Mod and providing a modulation switch turn-off signal Mod_Off. InFIG. 7B, TPON illustrates the on-time of the modulation switch.

FIG. 8Ais a simplified schematic diagram illustrating a blanking time generation circuit, andFIG. 8Billustrates a waveform diagram that describes the operation of a blanking time generation circuit that embodies certain aspects of this invention. Similar to jitter duration circuit720in jitter controller700, blanking time generation circuit800includes a ramp signal circuit810with a current source and capacitor that starts charging the capacitor upon receiving a Reset signal to produce a ramp signal. As shown inFIG. 8A, the Reset signal is a pulse signal produced by a rising edge one-shot circuit820at the rising edge of the primary switch QLturn-on signal. Blanking time generation circuit800also has a comparator830for comparing the ramp signal and a reference voltage VFMAXand providing blanking time signal TFMAX.FIG. 8Bshows the waveforms for the primary switch control signal Drive, blanking time signal TFMAX, and the Reset signal. Blanking time signal TFMAXcan be used to select the on-set of the modulation switch turn-on signal, as described above in connection withFIGS. 7A and 7B. It also limits the lower bound of the switching period.

FIG. 9is a simplified schematic diagram illustrating a first example of a quasi-resonant controller that embodies certain aspects of this invention.FIG. 10is a simplified schematic diagram illustrating a second example of a quasi-resonant controller that embodies certain aspects of this invention. As shown inFIGS. 9 and 10, quasi-resonant controllers900and1000are examples of quasi-resonant controllers that can be used as quasi-resonant controller153in converter100inFIG. 1. As shown inFIG. 9, quasi-resonant controller900has a first input terminal901for receiving the modulation switch turn-off signal, a second input terminal902for receiving the valley pulse signal VPulse, and an output terminal903for providing a primary switch turn on signal Trigger. Similarly, as shown inFIG. 10, quasi-resonant controller1000has a first input terminal1001for receiving the modulation switch turn-off signal, a second input terminal1002for receiving the valley pulse signal VPulse, and an output terminal1003for providing a primary switch turn on signal Trigger. Both quasi-resonant controller900and quasi-resonant controller1000provide a primary switch turn-on signal at a valley point of the resonant waveform in the discontinuous time.

As shown inFIG. 9, quasi-resonant controller900has a D flipflop910that includes a first input terminal901for receiving the modulation switch off signal Mod_Off, a second input terminal902for receiving the valley pulse signal VPulse, and an output terminal903for providing the primary switch turn on signal Trigger. Waveform Mod illustrates the modulation switch turn-on signal. Waveform Mod_Off indicates that the modulation switch is turned off after the modulation switch has been on for a duration determined by the jitter control circuit. Waveform VPulseshows the valley pulse signals. D flipflop910produces the trigger signal Trigger at the rising edge of the first valley pulse signal VPulseafter the modulation switch is turned off. The primary switch control signal Drive is provided by control circuit150inFIG. 1in response to the Trigger signal. The turning on of primary switch indicates the beginning of a new switching cycle, and the D flipflop910receives a global signal Reset to standby for the new cycle.

As shown inFIG. 10, quasi-resonant controller1000has two D flipflops connected in series. A first D flipflop1010includes a first input terminal1011for receiving the modulation switch off signal Mod_Off, and a second input terminal1012for receiving the valley pulse signal VPulse. A second D flipflop1020has a first input terminal1021for receiving an output signal from the first D flipflop1010, and a second input terminal1022for receiving the valley pulse signal. The second D flipflop1020also has an output terminal1023for providing the primary switch trigger signal Trigger.FIG. 10also shows waveforms that illustrate the same signals as those shown inFIG. 9. A difference between quasi-resonant controller1000and quasi-resonant controller900is that quasi-resonant controller1000includes two D flipflops, whereas quasi-resonant controller900has only one D flipflop. As a result, in quasi-resonant controller1000, the primary switch is turned on at the second valley point after the modulation switch is turned off. The quasi-resonant controller1000makes the valley count different from the jitter peak count and the system switching frequency has a wider jitter range.

As described above, quasi-resonant controller900has one D flipflop, and quasi-resonant controller1000has two D flipflops connected in series. More generally, each quasi-resonant controller can have a flipflop chain having one D flipflop or two or more serially-connected D flipflops. A first one of the one or more D flipflops has a first input terminal for receiving the modulation switch off signal and a second input terminal for receiving the valley pulse signal. A last one of the one or more D flipflops has an output terminal for providing the primary switch trigger signal. Each D flipflop other than the first one of the one or more D flipflops has a first input terminal for receiving an output signal from a preceding D flipflop and a second input terminal for receiving the valley pulse signal. Even though the above examples include D flipflops, it is understood that similar functions can be implemented using other flipflops or latches that have two stable states and can be used to store state information.

FIG. 11Ais a simplified schematic diagram illustrating a quasi-resonant (QR) converter with jitter that embodies certain aspects of this invention.FIG. 11Bis a waveform diagram illustrating the operation of the quasi-resonant (QR) converter with the jitter ofFIG. 11Bthat embodies certain aspects of this invention.FIG. 11Ashows part of quasi-resonant (QR) converter1100, which is similar to quasi-resonant (QR) converter100ofFIG. 1, that illustrates that the modulation capacitor and the modulation switch are coupled with the primary switch in parallel between an input node of the power switch and a ground terminal. In this case, the power switch QLis an NMOS transistor and node1101is a drain node of the power switch. The modulation switch QMis a PMOS transistor, which has a source node1103coupled to the ground node GND. In this case, the modulation switch QMis also referred to as a low-side PMOS.FIG. 11Bshows that the modulation switch is turned on at the first peak1111of the resonant waveform in the discontinuous time, and the primary switch is turned on at the third valley1113of the resonant waveform in the discontinuous time. As described above, during the time when the modulation switch is turned on, the modulation capacitor is connected, and the oscillation period of the resonant waveform is TQR1. When the modulation switch is turned off, the modulation capacitor is disconnected, and the oscillation period of the resonant waveform is TQR. Accordingly, with a time-varying duration of TQR1, a jitter is added to the quasi-resonant converter.

FIG. 12Ais a simplified schematic diagram illustrating a quasi-resonant (QR) converter with jitter that embodies certain aspects of this invention.FIG. 12Bis a waveform diagram illustrating the operation of the quasi-resonant (QR) converter with the jitter ofFIG. 12Athat embodies certain aspects of this invention.FIG. 12Ashows part of quasi-resonant (QR) converter1200, which is similar to quasi-resonant (QR) converter100ofFIG. 1, except that the modulation capacitor and the modulation switch are coupled with the primary switch in parallel between an input node of the power switch and a power terminal. In this case, the power switch QLis an NMOS transistor and node1201is a drain node of the power switch. The modulation switch QMis an NMOS transistor, which has a drain node1203coupled to a power node in series with the modulation capacitor, in this case, Vin. In this case, the modulation switch QMis also referred to as a high-side NMOS. The NMOS QMneeds a bootstrap driving circuit to provide a control signal for the swinging source voltage. Node SW provides a reference ground for the control signal.

The operation of quasi-resonant (QR) converter1200inFIG. 12Bis similar to the operation of quasi-resonant (QR) converter1100inFIG. 11B. As shown inFIG. 12B, the modulation switch is turned on at the first peak1211of the resonant waveform in the discontinuous time, and the primary switch is turned on at the third valley1213of the resonant waveform in the discontinuous time. Similar to above, during the time when the modulation switch is turned on, the oscillation period of the resonant waveform is TQR1. When the modulation switch is turned off, the oscillation period of the resonant waveform is TQR. Accordingly, a jitter is added to the quasi-resonant converter.

FIG. 13is a simplified flowchart that illustrates a method for controlling a quasi-resonant (QR) converter that embodies certain aspects of this invention. As shown inFIG. 13, method1300includes, at1310, identifying valley points and peak points of a resonant waveform in a sensing signal during a discontinuous time of the converter. Method1300also includes, at1320, turning on a modulation switch to add a capacitance in parallel to the power switch at a peak point of the resonant waveform in the sensing signal during the discontinuous time, to vary an oscillation period of the resonant waveform to add a frequency jitter to a switching frequency of the converter. Method1300also includes, at1330, turning on a power switch at a valley point of a resonant waveform in a sensing signal after the modulation switch has been turned off. The power switch is coupled to a primary winding of the converter to control a primary current flow, and the sensing signal is representative of the resonant waveform.

In method1300, adding a capacitance in parallel to the power switch can include turning on a modulation switch that is coupled in series with a modulation capacitor. Method1300also includes turning on the modulation switch at a first peak point in the resonant waveform after a blanking time, and turning off the modulation switch after a time period based on a time-varying function to vary a turn-on time of the modulation switch. The method can also include turning on the power switch at a valley point of the resonant waveform after a preset off time of the modulation switch.

FIG. 14is a simplified schematic diagram illustrating a power converter with jitter that embodies certain aspects of this invention.FIG. 14shows part of a power converter1400, which is similar to flyback converter100ofFIG. 1, including the inductance Lmof the primary winding and auxiliary winding AUX providing VCC. In this example, a modulation capacitor CSNis shunted with parasitic capacitor COSSto change the resonant period and modulation switch QMis in series with CSNto control the shunted time tjitter.

FIG. 15illustrates the waveforms for the power converter ofFIG. 14that embodies certain aspects of this invention.FIG. 15plots the Drive signal that turns on the power switch QL, the Mod signal that turns on the modulation switch QM, and the drain-source voltage VDSof the power switch QL. As shown inFIG. 15, the switching period of the flyback system can be varied by different tjitterwhich changes the quasi-resonant oscillation period from TQRto TQR1, where, as described above in connection withFIGS. 5A and 5B, TQR=2π√{square root over (LmCOSS)} is the oscillation period of resonant waveform with modulation switch QMturned off, and TQR1=2π√{square root over (Lm(COSS+Csn))} is the oscillation period of resonant waveform with modulation switch QMturned on.

By linearly changing the tjitter, the switching frequency of the converter can be spread out in a frequency range as shown inFIG. 16, similar to that described above in connection withFIGS. 4A-4D. The benefits of spectrum separating for electro-magnetic interference (EMI) and quasi-resonant control for COSSswitching loss can be achieved at the same time. However, the inventor has recognized that the switching loss of the power converter can be further improved. For example, the COSSswitching loss can still be large with high input voltage VIN.

FIG. 17plots the Drive signal that turns on the power switch QL, the Mod signal that turns on the modulation switch QM, the drain-source voltage VDSof the power switch QL, and the current Imin the primary winding Lm. As shown inFIG. 17, the CSNchanges the resonant period, but keeps the resonant amplitude the same at the boundary of frequency modulation region. As a result, the switching loss is still similar to the traditional quasi-resonant control, and the flyback system can have lower efficiency with high input AC voltage.

This invention further teaches a technique to reduce the switching loss of COSSassociated with the power switch for the power converter. In an example, in order to reduce the switching loss of the power switch COSS, the inductor current Imflowing into input voltage source VINis kept in inductor Lmat the end of the modulation switch QMmodulation time.

FIG. 18shows an example of generating the negative inductor current IM.FIG. 18plots the Drive signal that turns on the power switch QL, the Mod signal that turns on the modulation switch QM, the drain-source voltage VDSof the power switch QL, and the current Imin the primary winding Lm. In an example, a large CSNis selected to have TQR1»tjitter_MAX, and the modulation time of QMincludes a dithering tjitter(t) variant with time and an offset T(VIN) controlled by input voltage VIN. In other words, the frequency jitter includes a first portion that varies with the input voltage of the power converter and a second portion that is a time-varying function. With a high VIN, the large T(VIN) causes the Lmto have a large negative Imas soon as the QMis turned off. This initial current increases the amplitude of the following quasi-resonant waveform and reduces the valley switching voltage on COSS.

FIGS. 19A-19Cplot the Mod signal that turns on the modulation switch QM, the drain-source voltage VDSof the power switch QL, and the current Imin the primary winding Lmat different input voltages VIN.FIG. 19Ashows the waveforms at a high VIN,FIG. 19Bshows the waveforms at a medium VIN, andFIG. 19Cshows the waveforms at a low VIN. With smaller input voltage VIN, the smaller T(VIN) can induce less Imand less resonant amplitude to adapt to less QL-VDSon capacitance COSS.

FIG. 20shows the example of generating the negative Imat low VIN. Similar toFIG. 18,FIG. 20plots the Drive signal that turns on the power switch QL, the Mod signal that turns on the modulation switch QM, the drain-source voltage VDSof the power switch QL, and the current Imin the primary winding Lm. However, inFIG. 20, the VINis relatively low, and T(VIN) is small so the modulation switch QMis turned off earlier. It induces less negative Imand less quasi-resonant amplitude subsequently, which is suitable for the low VINsince the resonant waveform already have low VDSdrop at the valley point.

FIG. 21is a simplified schematic diagram of a power converter that embodies certain aspects of this invention. Power converter2100includes many components similar to those in converter100ofFIG. 1, as described in detailed below. However, in power converter2100, an input voltage magnitude detector2160is added to provide a signal f(VIN) to the jitter controller2154to provide a frequency jitter that includes a first portion that varies with the input voltage of the power converter and a second portion that is a time-varying function. The switching loss of the power transistor is reduced and power efficiency can be improved.

Power converter2100includes a transformer2102, which includes a primary winding2141for coupling to an input voltage VINand a secondary winding2142for providing the output voltage VOUTthrough a rectifying diode2120and a capacitor2119. A current in the rectifying diode is ID. Transformer2102also has an auxiliary winding2143for providing a sensing signal DMEG monitoring a resonant waveform of the converter during a discontinuous time. Auxiliary winding2143also provides a voltage VCC, which can be used as a power supply for the support circuitry, such as a control circuit. InFIG. 21, Vp denotes the voltage at the primary winding, Vs denotes the voltage at the secondary winding, and Va denotes the voltage at the auxiliary winding. InFIG. 21, Lmrepresents the inductance of the primary winding, and N represents the ratio of coil turns in the primary winding to the secondary winding. Cossrepresents the capacitance associated with primary switch2101, including the capacitance from the body diode. Vds represents the drain-source voltage across the primary switch.

Converter2100includes a control circuit2150. Converter2100also includes a power switch2101(also designated as QL) coupled to primary winding2141and control circuit2150for receiving a control signal to turn on and off power switch2101to control the primary current through primary winding2141in order to regulate output voltage VOUT. InFIG. 21, power switch2101is shown as a MOSFET power transistor. In the embodiment ofFIG. 21, control circuit2150can receive its operating power from Vccprovided by the auxiliary winding. Control circuit2150can also receive sensing signal DMEG from auxiliary winding2143. Control circuit2150can also receive a current sense signal representative of the primary current through a current sense resistor with a resistance (as shown inFIG. 1, but not shown inFIG. 21). Control circuit2150provides a control signal Drive to control power switch2101. Control circuit2150turns on the power switch2101based on information provided by the sensing signal DMEG and turns off the power2101based on information provided by the current sense signal Vcs.

As shown inFIG. 21, converter2100also has a modulation capacitor2130(also designated as CSN) and a modulation switch2131(also designated as QM) coupled in parallel to power switch2101. In this arrangement, modulation switch2131is coupled in series with capacitor2130. Control circuit2150includes a valley detector2151for detecting valley points in the resonant waveform in the sensing signal DMEG during the discontinuous time of converter2100. Control circuit2150also includes a peak detector2152for detecting peak points in the resonant waveform in the sensing signal during the discontinuous time. Control circuit2150also includes a power controller2153for turning on the power switch2101at a valley point of a resonant waveform in the sensing signal during a discontinuous time. Control circuit2150further includes a jitter controller2154for turning on the modulation switch2131at a peak point of the resonant waveform in the sensing signal during the discontinuous time. Control circuit2150also includes an oscillator OSC2155, which provides a TFMAXsignal to jitter controller2154. In addition to the TFMAXsignal, jitter controller2154also receives a Ppulse signal from peak detector2152, and provides a Mod_Off signal to power controller2153. Power controller2153also receives a Vpulse signal from valley detector2151. Control circuit2150also includes a flipflop2156that outputs the Drive signal.

As explained in detail below, jitter controller2154varies a turn-on time of the modulation switch2131to add a frequency jitter to the switching frequency of the converter. The waveform of Vds is mirrored to the auxiliary winding and detected by a peak detector and a valley detector. The jitter controller determines the target peak count to turn on QMand linearly modulates the on time of QM. After QMis turned off, the power controller is enabled by the jitter controller to wait for proper valley count and turn on QLat the valley of Vds.

Power converter2100also includes an input voltage magnitude detector2160to provide a signal f(VIN) to the jitter controller2154to provide a frequency jitter that includes a first portion that varies with the input voltage of the power converter and a second portion that is a time-varying function. In the example ofFIG. 21, the input voltage magnitude detector2160includes a sample-and-hold block (VINS/H) to sense the VINinformation through the DMEG node during the on-time of QL. The sampled f(VIN) is used to add a variable of QMmodulation time which is T(VIN)+tjitter(t). In an example, the controller turns on the QMat a peak of Vdsand turns off QMaccording to the QMmodulation time. After the QMis turned off, the Vdsfalls rapidly due to the increasing amplitude of quasi-resonant waveform. Thus the valley detector sends a signal to turn on QLand a new switching cycle begins.

FIG. 22shows schematic and waveform diagrams illustrating the structures and functions of a valley detector and a peak detector in the control circuit in a converter that embodies certain aspects of this invention. InFIG. 22, a valley detector2210includes a first comparator2211for comparing a sensing signal DMEG and a valley reference voltage Vref_V. A peak detector2220includes a second comparator2222for comparing a sensing signal DMEG and a peak reference voltage Vref_P. Waveform2230illustrates the sensing signal DMEG, with the valley reference voltage Vref_V and peak reference voltage Vref_P. Waveform2240illustrates the output waveform of the second comparator2222, showing a pulse signal PPulsewhere the sensing signal DMEG is greater than peak reference voltage Vref_P. Waveform2250illustrates the output waveform of the first comparator2211, showing a pulse signal VPulsewhere the sensing signal DMEG is less than valley reference voltage Vref_V. This example detects peaks and valleys of Vdsthrough the DMEG voltage. The rising edge of PPulseand VPulseare sent to turn on QMat peak of Vdsand turn on QLat valley of Vds.

FIG. 23shows a schematic for an input voltage magnitude detector2300, which can be used as input voltage magnitude detector2160in control circuit2150inFIG. 21. As shown inFIG. 23, input voltage magnitude detector2300includes an inverting amplifier2310and a sample-and-hold block2320to sense the VINinformation through the DMEG node during the on-time of QL. During the on-time of QL, the VINis applied on the primary side of transformer to store energy into inductor Lm, and the auxiliary winding induces a negative voltage proportional to VINaccording to the turn ratio. With the inverting amplifier, the VINinformation on DMEG node is converted into a signal which is a function of VIN, and a sample and hold circuit is applied to keep the signal measured during the QLon time. The sampled signal f(VIN) is used to add a variable of QMmodulation time which is T(VIN)+tjitter(t). Inverting amplifier2310is coupled to a reference signal VOS. A switch in the ample-and-hold block2320is controlled by the Drive signal.FIG. 23also plots the Drive signal that turns on the power switch QL, the DMEG signal, which has a negative amplitude proportional to VINduring the QLon time, and the output f(VIN) of the input voltage magnitude detector2300.

FIG. 24is a simplified schematic diagram illustrating a jitter controller, andFIG. 25illustrates a waveform diagram that describes the operation of the jitter controller that embodies certain aspects of this invention. As shown inFIGS. 24 and 25, jitter controller2400is an example of a jitter controller that can be used as jitter controller2154in converter2100inFIG. 21. Jitter controller2400includes two D flipflops. A first D flipflop2410has a first input terminal2411for receiving a blanking time signal TFMAX, a second input terminal2412for receiving the peak pulse signal PPulse, a first output terminal2413for providing a modulation-on signal Mod_On, and a second output terminal2414for providing a complement of the modulation on signal.

Jitter controller2400also includes a jitter duration circuit2420having a first ramp signal circuit2421with a current source2422and capacitor2423that starts charging the capacitor upon receiving the complement of the modulation on signal, from the second output terminal2414of the first D flipflop2410, to produce a first ramp signal VRAMP1. Jitter duration circuit2420also has a first comparator2425for comparing the first ramp signal VRAMP1and an input voltage reference voltage f(VIN) and providing a jitter offset signal2427.

Jitter duration circuit2420also has a second ramp signal circuit2451with a current source2452and capacitor2453that starts charging the capacitor upon receiving jitter offset signal2427through an inverter2428to produce a second ramp signal VRAMP2. Jitter duration circuit2420also has a comparator2455for comparing the second ramp signal VRAMP2and a time-varying jitter reference voltage Vjitter(t) and providing a jitter stop signal2457.

InFIG. 24, a second D flipflop2430has a first input terminal2431for receiving logic high signal Logic H, a second input terminal2432for receiving the modulation on signal Mod_On from the first D flipflop2410, a reset terminal2435for receiving the jitter stop signal2457, a first output terminal2433for providing a modulation switch turn-on signal Mod, and a second output terminal2434for providing a complement of the modulation switch turn-on signal. Jitter controller2400also has an AND circuit2440for receiving the modulation on signal Mod_On and the complement of the modulation switch turn-on signal Mod and providing a modulation switch turn-off signal Mod_Off.

FIG. 25shows example waveforms of the jitter controller2400, also referred to as the modulation time controller.FIG. 25plots the Drive, TFMAX, PPulse, VRAMP1, VRAMP2, Mod, Mod_Off, and Reset signals. As shown inFIG. 25, the beginning of the modulation time is triggered by the first PPulsesignal after a blanking time signal TFMAXgoes high. The TFMAXsignal inFIG. 25is generated by a timer shown inFIG. 26to limit the maximum value of the system switching frequency, and the PPulseis signal from the peak detector to turn on QMwith less switching loss. As described above in connection withFIG. 24, the length of modulation time MOD is determined by two timers in series. The first timer generates a delay T(VIN) according to the signal f(VIN), and the second timer generates another delay tjitter(t) according to a time variant signal Vjitter(t). The summation of the two delays determines a signal Mod to drive QMand achieves the modulation time with time variant dithering and VINcontrolled offset. In some embodiments, the time-varying signal can be provided by an oscillator, for example.

After the QMturn off, the modulation time controller enables a Mod_Off flag. Since the offset of modulation time of QMincreases the resonant amplitude of Vds, the QLshould be turned on at the first valley after the modulation time to have lower switching loss.

FIG. 26shows a simplified schematic diagram illustrating a blanking time generation circuit and a waveform diagram that describes the operation of timer circuit2600that can be used as a blanking time generation circuit that embodies certain aspects of this invention. Timer circuit2600includes a ramp signal circuit2610with a current source and capacitor that starts charging the capacitor upon receiving a Reset signal to produce a ramp signal. As shown inFIG. 26, the Reset signal is a pulse signal produced by a rising edge one-shot circuit2620at the rising edge of the primary switch QLturn-on signal. Blanking time generation circuit2600also has a comparator2630for comparing the ramp signal and a reference voltage VFMAXand providing blanking time signal TFMAX.FIG. 26also shows the waveforms for the primary switch control signal Drive, blanking time signal TFMAX, and the Reset signal. Blanking time signal TFMAXcan be used to select the on-set of the modulation switch turn-on signal, as described above in connection withFIGS. 24 and 25. It also limits the lower bound of the switching period.

FIG. 27is a simplified schematic diagram illustrating a first example of a power controller that embodies certain aspects of this invention. As shown inFIG. 27, power controller2700is an example of power controller that can be used as power controller2153in converter2100inFIG. 21. As shown inFIG. 27, power controller2700has a first input terminal2701for receiving the modulation switch turn-off signal Mod_Off, a second input terminal2702for receiving the valley pulse signal VPulse, and an output terminal2703for providing a primary switch turn on signal Trigger. Power controller2700provides a primary switch turn-on signal at a valley point of the resonant waveform in the discontinuous time.

As shown inFIG. 27, power controller2700has a D flipflop2710that includes a first input terminal2701for receiving the modulation switch off signal Mod_Off, a second input terminal2702for receiving the valley pulse signal VPulse, and an output terminal2703for providing the primary switch turn on signal Trigger. Waveform Mod illustrates the modulation switch turn-on signal. Waveform Mod_Off indicates that the modulation switch is turned off after the modulation switch has been on for a duration determined by the jitter control circuit. Waveform VPulseshows the valley pulse signals. D flipflop2710produces the trigger signal Trigger at the rising edge of the first valley pulse signal VPulseafter the modulation switch is turned off. The primary switch control signal Drive is provided by control circuit2150inFIG. 21in response to the Trigger signal. Turning on the primary switch indicates the beginning of a new switching cycle, and the D flipflop2710receives a global signal Reset to standby for the new cycle. The power controller sends the trigger signal with the first VPulseafter the Mod_Off flag is enabled. The trigger signal turns on QLand begins the next switching cycle of system.

FIG. 28is a simplified flowchart that illustrates a method for controlling a power converter that embodies certain aspects of this invention. As shown inFIG. 28, method2800includes, at2810, turning on a power switch in response to a resonant waveform in a sensing signal during a discontinuous time of the power converter. Method2800also includes, at2820, adding a capacitance in parallel to the power switch during the discontinuous time, to vary an oscillation period of the resonant waveform to add a frequency jitter to a switching frequency of the power converter.

Examples of power converters implementing method2800are described above in connection withFIGS. 14-27. In some embodiments, the frequency jitter can include a first portion that varies with an input voltage of the power converter and a second portion that is a time-varying function. In method2800, adding a capacitance in parallel to the power switch can include turning on a modulation switch that is coupled in series with a modulation capacitor. Method2800can also include turning on a power switch in response to a resonant waveform in a sensing signal during a discontinuous time of the power converter, wherein the power switch is coupled to a primary winding of the power converter to control a primary current flow. The method can also include adding a capacitance in parallel to the power switch during the discontinuous time, to vary an oscillation period of the resonant waveform to add a frequency jitter to a switching frequency of the power converter. The method can add a capacitance in parallel to the power switch by turning on a modulation switch that is coupled in series with a capacitor, wherein the capacitor and the modulation switch are coupled in parallel with the power switch. The frequency jitter can include a first portion that varies with an input voltage of the power converter and a second portion that is a time-varying function.

FIG. 29is a simplified waveform diagram illustrating signals for a flyback power controller that embodies certain aspects of this invention.FIG. 29illustrates part of a power controller2900, which is similar to flyback converter2100ofFIG. 21.FIG. 29illustrates similar components as those shown inFIG. 21.FIG. 29also illustrates control signals and waveforms of a modulation circuit in the power controller, similar to those shown inFIG. 18. Therefore, detailed descriptions of the common components and signals are not repeated here. The modulation circuit is implemented to reduce switching loss of flyback system. During the discontinuous time of the system, a modulation switch QMis turned on to connect a modulation capacitor CSNin parallel with the COSSat the peak of the resonant waveform. The increasing total capacitance can enlarge the resonant current on the magnetizing inductor Lm. By turning off QMat the proper time with larger negative im(t) as shown in the plot of Ifluxof LminFIG. 29, the following resonant waveform can have larger voltage amplitude and the control circuit can turn on the power switch QLwith less VDSdrop, which means less switching loss.

However, this control method illustrated inFIG. 29can have a drawback on transformer design. In order to precisely control the negative current on Lm, the control circuit needs to accurately detect the peak of a resonant waveform for turning on the QM. As a result, the transformer must be operated under discontinuous conduction mode (DCM).

FIG. 30is a simplified waveform diagram illustrating signals for flyback controller2900ofFIG. 29operated under discontinuous conduction mode (DCM) that embodies certain aspects of this invention.FIG. 30shows the waveforms of the signals under full load and low input voltage. For example, tONis the on time of power switch QL, and tOFFis the off time of power switch QL. The off time tOFFcan include a demagnetization-time tDEMAGand a discontinuous time tDIS. During the demagnetization-time tDEMAG, the secondary winding discharges, and during the discontinuous time tDIS, no current flows, but a resonant waveform can be detected. The demagnetization-time tDEMAGcan be expressed as

tD⁢E⁢M⁢A⁢G=VINNVO⁢U⁢T⁢tO⁢N.
In this example, at the beginning of a switching cycle, the low input voltage causes a long power switch QLon-time tON. Further, at the end of the switching cycle, the control circuit needs a discontinuous time tDISto detect the peak of the quasi-resonant (QR) waveform and turn on modulation switch QM. As shown inFIG. 30, the peak current can be expressed as

Ipeak⁢⁢_⁢⁢Mod=2N⁢IO⁢U⁢T×tO⁢N+VINNVOUT⁢tO⁢N+tDISVINNVOUT⁢tO⁢N.
It can be seen that the tONand tDISreduce the duty of tDEMAG, and the system needs larger peak current Ipeak_Modto deliver the output current IOUT. The higher peak current means that the transformer needs lower equivalent series resistance (ESR) and higher maximum flux density (BMAX). Both of these requirements increase the size and cost of transformer.

An aspect of this invention teaches to change the operating mode of the flyback system according to the input voltage. The efficiency of a flyback system is determined by different factors depending on the input voltage. The efficiency of a flyback system is often dominated by switching loss under high input voltage, and can be dominated by conduction loss under low input voltage. By changing the operating mode, the flyback system can benefit from lower peak current under low input voltage and can also benefit from drain-source voltage VDSreduction under high input voltage.

An aspect of this invention teaches a control method to change the turn-on timing of modulation switch QMin the flyback system according to the input voltage. When the input voltage is low, the QMis turned on in the demagnetizing time. During the QMon-time, the leakage inductor energy, which is stored into CSNwhen power switch QLis turned off, is released to VOUTin parallel with the Ifluxthrough secondary side diode. Since the QMdoes not have to be turned on again at the end of switching cycle, duty of tDEMAGincreases with the reduced this and the peak current in each switching cycle can be reduced.

FIG. 31is a simplified waveform diagram illustrating signals for flyback controller2900ofFIG. 29operated under quasi-resonant (QR) that embodies certain aspects of this invention.FIG. 31shows the waveforms of the QR mode flyback under low input voltage. The power switch QLis turned on at the first valley of quasi-resonant waveform. It reduces the tDISto ½TQRand increases the turn-on VDSof QLto VIN−NVOUT. Since the VDS is still small with low VIN, this trade-off can slightly improve total efficiency and ease the requirement of transformer with less maximum flux density.

FIG. 32is a simplified waveform diagram illustrating signals for flyback controller2900ofFIG. 29operated under continuous conduction mode (CCM) that embodies certain aspects of this invention.FIG. 32shows the waveforms of the CCM flyback under low input voltage. Since QLis turned on when the Ifluxis still flowing to VOUT, the peak current can be further reduced because of the trapezoidal demagnetizing current. The greatly reduced maximum flux density can save the cost and size of the transformer, but the switching loss of QLincreases because of the increasing turn-on VDSVIN+NVOUT. However, the low input voltage eases the drawback, and the low peak current may restore some efficiency with smaller conduction loss.

FIG. 33is a simplified waveform diagram illustrating signals for flyback controller2900ofFIG. 29operated in high input voltage mode that embodies certain aspects of this invention.FIG. 33shows the system waveforms under high input voltage. When the input voltage is high, the QMis turned on at the end of tDISto induce negative im(−) for reducing QLswitching loss. Since the tONof QLis greatly reduced with high input voltage, the saved time can cover the requirement of QMcontrol. The flyback system may have similar peak current compared with low input voltage. It means that the control method can improve switching loss with the same transformer design.

FIG. 34is a simplified schematic diagram of a power converter that embodies certain aspects of this invention. Power converter3400includes many components similar to those in converter2100inFIG. 21and converter100ofFIG. 1. Therefore, detailed descriptions of the common components and operations are omitted here. It is noted that, in power converter3400, controller circuit3450includes a high/low input voltage mode selector3410, which provides a signal “flag” to modulation controller3454for changing the operating mode of the flyback system between low input voltage mode and high input voltage mode depending on the input voltage. As a result, the switching loss or conduction loss of the power transistor is reduced and power efficiency can be improved.

Mode selector3410in control circuit3450detects the input voltage of the system and sends a “flag” signal3411that determines the operating mode. In a high input voltage mode, the modulation switch QMis turned on during a discontinuous time to generate the negative current im(−) on Lmfor reducing switching loss of QL. In contrast, in a low input voltage mode, the modulation switch QMis turned on during demagnetization-time to release the leakage energy stored in CSNto the output. Control circuit3450also includes a valley detector3451, a peak detector3452, a power controller3453, a modulation controller3454(labeled as QMcontroller), an oscillator3455, and a flipflop3456. The functions of these components are described below.

FIG. 35is a simplified schematic diagram for a mode selector that embodies certain aspects of this invention. As shown inFIG. 35, mode selector3500is an example of a mode selector that can be used as mode selector3410in power converter3400ofFIG. 34. As shown, mode selector3500includes a voltage divider3510for sensing the input voltage VINand a comparator3520for outputting a signal3530, labeled “flag” inFIG. 35. The signal3530, labeled “flag,” indicates whether the input voltage VINis high or low, and is used for changing the operating mode of the controller. As shown inFIG. 35, f(VIN) is a sampled value of input voltage VINand Vrefis a reference voltage. The output of comparator3520sets the signal “flag” to 1, if VINis greater than Vref, and sets the signal “flag” to 0, if VINis less than Vref. As an example, the power converter can operate with an input voltage of either 110V or 220V. In this case, the parameters in the voltage divider and the reference voltage can be selected such that the power converter operates in the low input voltage mode if VINis less than, e.g., 150V, and in the high input voltage mode, otherwise.

FIG. 36is a simplified schematic diagram for an alternative mode selector that embodies certain aspects of this invention. As shown inFIG. 36, mode selector3600is another example of a mode selector that can be used as mode selector3410in power converter3400ofFIG. 34. As shown inFIG. 36, mode selector3600obtains the information of input voltage through the auxiliary winding, for example, the DMEG signal in power converter3400inFIG. 34. Mode selector3600includes an inverting amplifier3610to sense the signal on DMEG during the on-time of the power switch QL, as shown by the Drive signal. Mode selector3600also includes a sample and hold circuit3620to provide an output signal f(VIN), which is an input to a comparator3630to generate the “flag” signal for determining the operating mode of the converter.

FIG. 37is a simplified schematic diagram for an example of the QMcontroller in power converter3400ofFIG. 34that embodies certain aspects of this invention. As shown inFIG. 37, modulation controller3700, also referred to as QMcontroller, includes an inverter3710, a delay circuit3720, a one-shot circuit3730, multiplexers3741and3742, a first D-flipflop3750, a second D-flipflop3760, a QMon-time calculator3770, and an AND circuit3780. The QMcontroller3700provides a Mod signal to drive the modulation switch QM, and a QR_EN signal to enable the power controller block3453in flyback controller3400inFIG. 34. Two multiplexers are controlled by the flag signal to select the output signals Mod and QR_EN for different operating modes of the flyback system.

FIG. 38shows a portion of modulation controller3700ofFIG. 37and signal waveforms for operation in low input voltage mode that embodies certain aspects of this invention. Modulation controller3700(also referred to as QMcontroller) is set in the low input voltage mode, when the flag signal is 0. In low input voltage mode, modulation switch QMis turned on during the demagnetization-time to release the leakage inductance energy stored in CSNto the output.FIG. 38shows a portion of modulation controller3700, labeled circuit block3800, for turning on and off the modulation switch QMin low input voltage mode. As shown inFIG. 38, circuit block3800includes inverter3710, delay circuit3720, one-shot circuit3730, and multiplexers3741and3742in modulation controller3700inFIG. 37. The modulation switch QMis turned on by the Mod signal right after the power switch QLis turned off by the Drive signal and a small dead-time tdead. A small on-time of QMis generated by the one-shot circuit3730. Since the modulation switch QMis turned on and turned off quickly after the beginning of demagnetization-time, the on-time duration of QMis in the demagnetization-time, and the QMis turned off before the maximum frequency period TFMAX. In this example, in the low input voltage mode, the modulation controller is configured to turn on the modulation switch after a pre-set delay time after the power switch is turned off in every switching cycle of the power converter. tdeadis selected to ensure QMis turned on in the demagnetization-time. For example, in an application with switching frequencies in the 60-70 kHz, the discharge time or demagnetization-time is 2-20 μsec, and the delay time can be 200-500 nsec. In applications with higher switching frequencies, the delay time can be adjusted accordingly.

FIG. 39shows another portion of QMcontroller3700ofFIG. 37and signal waveforms for operation in high input voltage mode that embodies certain aspects of this invention. Modulation controller3700(also referred to as QMcontroller) is set in the high input voltage mode, when the flag signal is 1. In the high input voltage mode, modulation switch QMis turned on during the continuous time to release the leakage inductance energy stored in CSNto the output.FIG. 39shows a portion of modulation controller3700, labeled circuit block3900, for turning on and off the modulation switch QMin high input voltage mode. As shown inFIG. 39, circuit block3900is similar to jitter controller2400illustrated inFIG. 24, but without the time-varying components in the on-time calculator intended for introducing the jitters. As shown, circuit block3900includes the first D-flipflop3750, the second D-flipflop3760, QMon-time calculator3770, AND circuit3780, and multiplexers3741and3742in modulation controller3700inFIG. 37. Their functions are similar to the corresponding components inFIG. 24.

FIG. 39also shows the waveforms of the QMcontroller in high input voltage mode when the flag signal is 1. In high input voltage mode, QMis turned on during the discontinuous time to induce a negative current on Lmbefore the power switch QLis turned on. In this embodiment, QMis turned on at the first peak of the resonant waveform after the maximum frequency period TFMAX, and is turned off by a QMon-time calculator. After QMis turned off, the QR_EN signal is set high to enable the power controller block, which determines the turn on timing of the power switch QL.

FIG. 40Ais a simplified block diagram of an alternative modulation controller for a multi-mode flyback system, andFIG. 40Billustrates corresponding signal waveforms for operation in a low input voltage mode that embodies certain aspects of this invention. Modulation controller4000inFIG. 40is similar to modulation controller3700inFIG. 37. One difference is that modulation controller4000includes a low-frequency enable signal to block most of the Mod driving signal in low input voltage mode. Since the function of QMis to release the leakage energy stored in CSNto output, in some cases, QMdoes not need to be turned on in each switching cycle. In this embodiment, the QMis turned on in the first switching cycle after the rising edge of a timing signal TRecovery. The timing signal can be selected to extend through multiple switching cycles of the power converter. Therefore, the modulation controller is configured to turn on the modulation switch after the pre-set delay time after the power switch is turned off once in multiple switching cycles of the power converter. During the other switching cycles, QMstays open to save switching loss and the leakage energy is stacked into CSNthrough the body diode of QM. This function is implemented with a D flipflop4010with an input Logic high and the timing signal TRecovery.FIG. 40Bshows various timing signals for modulation controller4000.

FIG. 41illustrates a simplified block diagram of a power controller and its operating waveforms in different operating mode that embodies certain aspects of this invention. As shown inFIG. 41, power controller4100is an example of a power controller that can be used as power controller3453in power converter3400inFIG. 34. Many components and signals inFIG. 41are similar to those in the examples described above. After the QR_EN is set to high, the power controller generates duration Twindowto detect the VPulsesignal. If the system is in a high input voltage mode or low input voltage mode with light load, the power controller will send the Trigger signal to turn on QLat the rising edge of the first VPulsesignal in Twindow. If the system is in low input voltage mode with a heavy load, there will be no VPulsesignal and the power controller will send the Trigger signal at the end of Twindowto turn on QL. Thus, the flyback system will be operated in continuous conduction mode (CCM).

FIG. 42illustrates a simplified block diagram of another example of a power controller and its operating waveforms in different operating mode that embodies certain aspects of this invention. As shown inFIG. 42, power controller4200is another example of a power controller that can be used as power controller3453in power converter3400inFIG. 34. With this power controller, the flyback system will not enter continuous conduction mode (CCM). In low input voltage mode, the power controller keeps waiting until the first quasi-resonant (QR) valley arrives and sends the Trigger signal to turn on QL. In High Input Voltage mode, the power controller will turn on the QLafter the modulation switched QMinducing proper im(−).

FIG. 43illustrates a simplified block diagram of an oscillator block that embodies certain aspects of this invention. As shown inFIG. 43, oscillator4300is an example of an oscillator that can be used as oscillator3455in power converter3400inFIG. 34. The oscillator block4300generates a global signal Reset to inform the beginning of a new switching cycle, and generates a blanking time signal TFMAXfor the QMcontroller. Since the switching cycle is ended after the operation of QMcontroller and power controller, the TFMAXlimits the lower bound of the system switching period.

FIG. 44illustrates a simplified block diagram of the peak detector and valley detector and the associated waveforms that embodies certain aspects of this invention. As shown inFIG. 44, circuit4400is an example of a peak detector and valley detector that can be used as peak detector3452and valley detector3451in power converter3400inFIG. 34.FIG. 44shows an embodiment which detects peaks and valleys of VDSthrough DMEG voltage during tDIS. The rising edges of PPulseand VPulseare sent to turn on QMat peak of VDSand turn on QL at valley of VDS.

FIG. 45illustrates a simplified block diagram of an embodiment of a QMon-time calculator and the associated waveforms that embodies certain aspects of this invention. As shown inFIG. 45, circuit4500is an example of a QMon-time calculator that can be used as the QMon-time calculator in modulation converter3700inFIG. 37. QMon-time calculator4500determines the on-time of QMin high input voltage mode for specific purpose. With this embodiment, the on-time of QMis increasing with the input voltage VIN, which can induce larger negative im(−) corresponding to larger VDSvoltage.

FIG. 46illustrates a simplified block diagram of another embodiment of a QMon-time calculator and the associated waveforms that embodies certain aspects of this invention. As shown inFIG. 46, circuit4600is an example of another QMon-time calculator that can be used as the QMon-time calculator in modulation converter3700inFIG. 37. In QMon-time calculator4600, the on-time of QMincludes an offset period determined by VINand a time varying period. This embodiment can generate a time varying QMon-time in high input voltage mode for both VDSswitching loss reduction and system switching frequency jitter.

FIG. 47is a simplified flowchart that illustrates a method for controlling a power converter that embodies certain aspects of this invention. As shown inFIG. 47, method4700for controlling a power converter includes, at4710, turning on a power switch to maintain a desired output voltage, wherein the power switch is coupled to a primary winding to control a primary current flow and the output voltage is provided by a secondary winding. Method4700also includes, at4720, adding a capacitance in parallel to the power switch at a time determined by a magnitude of an input voltage to the power converter. Here, the timing of adding the capacitance depends on the operation mode of the power controller. In a low input voltage mode, at4730, the capacitance is added in a demagnetization-time during which the secondary winding discharges. In a high input voltage mode, at4740, the capacitance is added in a discontinuous time.

In the examples described above, adding the capacitance in parallel to the power switch comprises turning on a modulation switch that is coupled in series with a capacitor. The capacitor and the modulation switch are coupled in parallel with the power switch.

In another example described above, in the low input voltage mode, adding the capacitance comprises turning on the modulation switch after a pre-set delay time after the power switch is turned off. In the high input voltage mode, adding the capacitance includes turning on the modulation switch at a first peak point in a resonant waveform in the discontinuous time after a blanking time, and turning off the modulation switch after a time period based on a time-varying function to vary a turn-on-time of the modulation switch.