Display source divider

In an implementation of a display source divider, a video generation system generates a video display source that includes display data for multiple display regions on a display device. For example, a gaming system generates a video display source that includes display data for a partitioned display, where each region of the partitioned display corresponds to a different player of the gaming system. A display source divider receives the video display source and generates multiple video streams each corresponding to a different display region of the partitioned display.

TECHNICAL FIELD

This invention relates to a multi-display system and, in particular, to a display source divider that receives a video display source which includes display data for multiple display regions of a partitioned display, and generates multiple video streams each corresponding to a different one of the display regions.

BACKGROUND

Some video systems, such as multi-player gaming systems, generate video that is divided into different display regions of a partitioned display screen. For example, a display screen can be partitioned into two display regions for two players of a race car driving game. An upper display region shows an image of the first player's race car, a section of the race course, and surrounding terrain as the first player interacts with the gaming system to navigate the race course. Similarly, a lower display region shows an image of the second player's race car, a section of the race course, and surrounding terrain as the second player interacts with the gaming system to navigate the race course. The upper display region provides the visual feedback for the first player to interact, via a game controller, with the gaming system and the lower display region provides the visual feedback for the second player to interact, via a second game controller, with the gaming system. A display screen may also be partitioned into thirds or quadrants where each of the display regions has a different image that corresponds to one of the players of a gaming system. Each display region of a partitioned display screen can contain an image that is different from, or similar to, images contained in the other display regions.

Typically, these video generation systems, such as multi-player gaming systems, are designed to generate a single stream of video data that includes all of the display data for each of the different display regions which are configured for simultaneous display on a single partitioned display screen. In most instances, a multi-player gaming system is connected to only one display device, such as a television. Thus, this one television has to provide the visual feedback for multiple players of the gaming system. One problem associated with partitioning a display device for multi-player interactive feedback is that the display regions are smaller than if displayed full-screen. More display regions results in smaller viewing areas for each player of a multi-player gaming system which may be inadequate to provide a desirable interactive visual feedback to the players.

A further problem associated with partitioned displays is that each player of a multi-player gaming system can see the visual feedback for all of the other players as well. This type of multi-player feedback may enhance the interaction for both players of the race car driving game, but is not desirable for such competitive activities as football games where a first player independently selects an offensive play while the second player independently selects a defensive play hoping to counteract the selected offensive play. In this example, the first player has a great interest in keeping the selected offensive play from being known by the second player. However, with a partitioned display, the second player can easily observe the first player's selection and vice-versa.

Accordingly, for video systems that generate a single stream of video data that includes display data for different display regions of a single partitioned display screen, it is desirable that each display region can be isolated and independently rendered on a separate display device.

SUMMARY

A display source divider is described herein.

In an implementation, a display source divider receives display data for multiple display regions of a partitioned display and replicates the display data to generate multiple video streams each corresponding to a different one of the display regions. The display source divider includes multiple display region processors that each obscure the pixel data of all but a designated one of the display regions and shifts the timing synchronization for the designated display region such that each display region is re-positioned for display on a respective display device.

In another implementation, a display source divider receives display data for multiple display regions of a partitioned display and horizontally resamples the display data to generate display region data that corresponds to one or more of the display regions being re-sized horizontally. The display source divider vertically resamples the display region data such that the one or more display regions are re-sized vertically. The display source divider includes multiple display region timing generators, each of which generates timing synchronization data for a different one of the display regions such that a display region is positioned for full-screen display on a respective display device.

DETAILED DESCRIPTION

A display source divider is described that receives display data for multiple display regions of a partitioned display and generates multiple video streams each corresponding to a different one of the display regions. Video systems, such as multi-player gaming systems, generate a single stream of video data that includes display data for different display regions of a single partitioned display screen. The display source divider isolates and processes each display region to be independently rendered on a separate display device. As described herein, the timing synchronization data for a particular display region can be shifted, the pixel data corresponding to the display region can be resampled, and/or the display region can be re-sized for display on a respective display device.

FIG. 1illustrates an exemplary multi-display system100in which a multi-display output divider102can be implemented. The multi-display system100includes a video generation system104that generates a video display source106which is encoded to include display data for multiple display regions of a partitioned display. For example, the video generation system104may be a multi-player gaming system that includes game controllers108which are provided for player interaction with the gaming system. The gaming system104(i.e., video generation system) generates the video display source106that includes the display data for multiple players of the gaming system. Although not shown in this example, the video generation system104may be implemented with any number and combination of differing components as further described below with reference to the exemplary computing device shown inFIG. 10.

The video display source106can be generated to include display data for any number of display regions of a partitioned display. For example, a display device110can be connected to the video generation system104to receive the video display source106which can include display data for a partitioned display112that is rendered on display device110. In this display mode, the partitioned display112includes two display regions, the first being rendered as an upper display region and the second being rendered as a lower display region. The display regions of a partitioned display can be separated by what appears as a black bar or line between the display regions to identify the visually distinct regions. Alternatively, the display regions can be positioned, or otherwise rendered, adjacent each other on a display in an edge-to-edge fashion. In such a case, the visual distinctiveness of the individual display regions is apparent by the difference in appearance between the display regions, such as motion and/or color variation differences.

In this example of partitioned display112, the first display region can show an image of a first player's race car and a section of a race course for a race car driving game as a first player interacts with the gaming system104via controller108(1) to navigate the race course. Similarly, the second display region can show an image of a second player's race car and a section of the race course as the second player interacts with the gaming system104via controller108(2) to navigate the race course. The first display region provides the visual feedback for the first player to interact with the gaming system104and the second display region provides the visual feedback for the second player to interact with the gaming system104. Although the partitioned display112is shown to have a first, upper display region and a second, lower display region, the two display regions may be generated as right and left display regions of the partitioned display112.

The video display source106may also be generated to include display data for other display modes, such as partitioned display114rendered on display device116and partitioned display118rendered on display device120. Although shown together inFIG. 1, each of these display modes are alternate configurations that are typically generated by a video generation system depending on, for example, how many players are engaged to interact with the multi-player gaming system at any one time. If only two players are participating in the race car driving game, the application program for the driving game can generate the video display source106to include only display data for the two players and be configured for partitioned display112on display device110. If, however, a third player joins to participate in the race car driving game, the application program can then generate the video display source106to include display data for the three players and be configured for partitioned display114on display device116.

Different video generation systems can generate any number of different display modes having different display region configurations to be rendered on a partitioned display device. Further, each display region of a partitioned display can contain an image that is different from, or similar to images contained in other regions of the partitioned display. For example, each of the four display regions in partitioned display118on display device120may have a different image, one for each of four different players of the gaming system104(i.e., the video generation system).

The multi-display output divider102is implemented in the multi-display system100to receive the video display source106and generate multiple video streams122each corresponding to a different display region of what would be a partitioned display. For example, if video display source106is generated to include display data for the three display regions of partitioned display114, the multi-display output divider102generates a first video stream122(1) corresponding to the first display region for display on a first display device124(1), a second video stream122(2) corresponding to the second display region for display on a second display device124(2), and a third video stream122(N) corresponding to the third display region for display on a third display device124(N).

Each of the multiple display devices124receive a different one of the video streams122and render a display of a different one of the display regions. The display devices are coupled to the multi-display output divider102via an RF (radio frequency) link, S-video link, composite video link, component video link, or other similar communication link. Additionally, the display devices124need not be located within visual proximity of each other. For example, the display devices124can each be located in a different room of a house where each player of a multi-player gaming system cannot see the other players, or the other players' visual feedback displays.

The multi-display output divider102can be implemented as an independent appliance device that is coupled to the video generation system104via video and/or audio cable connections. Alternatively, the multi-display output divider102can be implemented as an integral or attachable audio-visual component of a video generation system to isolate and generate display data for individual display regions such that each display region can be independently rendered on a separate display device. Although not shown in this example, the multi-display output divider102may be implemented with any number and combination of differing components as further described below with reference to the exemplary computing device shown inFIG. 10.

The multi-display output divider102can also be implemented to receive configuration information associated with a video display source106that includes any number of display regions of a partitioned display. The configuration information about the number and display mode of the display regions can be utilized by the multi-display output divider102to generate a corresponding number of video streams122and to format the display data for each individual display region. The configuration information can be encoded within the video display source106, such as information generated by an application program of the video generation system to identify the display mode layout of the display regions. In this case, a game developer encodes the game application to partition the single video display source106into non-overlapping regions.

The configuration information can also be received as a user-configurable selection control, or can be determined with an auto-detection system incorporated as a component system of the multi-display output divider102. One example of a display region auto-detection system is described in a concurrently-filed U.S. patent application Ser. No. 10/409,507 filed Apr. 8, 2003, entitled “Video Division Detection Methods and Systems”, to Mike Love, the disclosure of which is incorporated by reference herein.

FIG. 2illustrates an exemplary implementation200of the multi-display output divider102(FIG. 1) which includes a display source divider202, a digital video decoder204, an analog-to-digital video converter206, and a video encoder208. The digital video decoder204receives the video display source106as digital video data106(D), or the analog-to-digital video converter206receives the video display source106as analog video data106(A). In an event that the video display source106is received as analog video data106(A), the analog-to-digital video converter206digitizes the analog video data106(A) to generate digital video data210for input to the digital video decoder204.

The digital video decoder204converts the digital video data input106(A), or210, into uncompressed digital pixel data in an event that the video inputs are not already. The digital video decoder204outputs a digital video display source212that is input to the display source divider202. The digital video display source212includes the display data (now uncompressed digital display data) for the multiple display regions of a partitioned display. The display source divider202generates multiple video streams214that each correspond to a different one of the display regions.

The multiple video streams214are input to the video encoder208which includes multiple digital-to-analog converters216that each convert a different one of the multiple video streams214to analog video data such that each display region is configured for display on a separate display device124. For example, if video display source106is generated to include display data for the three display regions of partitioned display114(FIG. 1), the display source divider202generates a first video stream214(1) corresponding to the first display region, a second video stream214(2) corresponding to the second display region, and a third video stream214(N) corresponding to the third display region.

A first digital-to-analog converter216(1) of the video encoder208converts the first video stream214(1) to analog video data stream122(1) for display on the first display device124(1). A second digital-to-analog converter216(2) converts the second video stream214(2) to analog video data stream122(2) for display on the second display device124(2), and a third digital-to-analog converter216(N) converts the third video stream214(N) to analog video data stream122(N) for display on the third display device124(N).

FIG. 3illustrates a method300for a multi-display output divider. The order in which the method is described is not intended to be construed as a limitation, and any number of the described method blocks can be combined in any order to implement the method. Furthermore, the method can be implemented in any suitable hardware, software, firmware, or combination thereof.

At block302, a video display source is received that includes display data for multiple display regions of a partitioned display. For example, multi-display output divider102receives video display source106that includes display data for multiple display regions (e.g., any of the 1st, 2nd, 3rd, and 4thdisplay regions) of a partitioned display (e.g., any of partitioned displays112,114, and118). The video display source can be received from a gaming system that generates the display data for multiple players of the gaming system.

At block304, a determination is made as to whether the video display source is received as analog video data. If the video display source is received as analog video data (i.e., “yes” from block304), the analog video display source is converted to digital video data at block306. For example, the analog-to-digital video converter206receives analog video data106(A) and converts the analog video data106(A) to digital video data210.

If the video display source is received as digital video data (i.e., “no” from block304), or after the analog video display source has been converted to digital video data at block306, multiple video streams are generated that each correspond to a different display region such that each display region is configured for display on a separate display device, at block308. For example, display source divider202generates multiple video streams214. Each video stream214corresponds to a different display region of a partitioned display (e.g., any of partitioned displays112,114, and118) such that each display region (e.g., any of the 1st, 2nd, 3rd, and 4thdisplay regions) can be independently displayed on a separate display device124.

At block310, each of the multiple video streams is converted to analog video data for display on separate display devices. For example, the digital-to-analog converters216of the video encoder208each convert one of the video streams214to analog video data122for display on a respective display device124.

FIG. 4illustrates an exemplary implementation400of a display source divider402(this is an example implementation of the display source divider202shown inFIG. 2). The display source divider402includes a timing extraction component404and a display source replicator406. The timing extraction component404processes the digital video display source212to determine such information as the video format and the timing synchronization data for the multiple display regions. The format of the digital video display source212can be any number of different standard definition television formats such as NTSC, PAL, SECAM, and the like.

The display source replicator406receives the digital video display source212and replicates the video display source to generate multiple video streams408. As described above, the digital video display source212includes the display data for the multiple display regions of a partitioned display device. The display source replicator406generates as many video streams408as there are display regions encoded in the video display source212.

The display source divider402also includes multiple display region processors410that each receive one of the replicated video streams408. A display region processor410receives a video stream408, as well as information from the timing extraction component404, and processes the digital video stream408to configure a designated one of the display regions for display on a respective display device. For example, display region processor410(1) receives a video stream408and processes the video stream to generate video stream214(1) which corresponds to one of the display regions being configured for display on a separate display device. The video stream214(1) is input to the digital-to-analog converter216(1) in video encoder208to convert the digital video stream214(1) to the analog video data stream122(1) for display on the first display device124(l) (FIG. 2).

A display region processor410configures a designated one of the display regions for display by obscuring, or otherwise blacking-out, the pixel data of all but the designated display region such that only the designated display region has a discernable image when rendered on a display device. Additionally, the display region processor410shifts the horizontal and vertical timing synchronization for the designated display region such that the designated display region is re-positioned horizontally and/or vertically for display on the display device. In this example, each of the video streams408includes the pixel data for all of the display regions. However, all but the designated display region are obscured so that only the designated display region will be viewable as an image when rendered on a display device.

Each of the display region processors410can receive a selection control input412that designates which of the display regions is to be associated with a particular display region processor. The display region processors410can be automatically associated with a particular display region (i.e., video stream408). For example, display region processor410(1) can be associated with a first display region, display region processor410(2) can be associated with a second display region, and so on. Alternatively, a control input412can be optionally user-selectable such that players of a multi-player gaming system can designate which display regions are processed for display on which display devices.

FIG. 5illustrates an example500of a display region timing shift. Four display regions502(1–4) are arranged in a quadrant display mode in an active region504and are shown as they would be rendered for display on a display device. A blanking region506is shown around the active region504. A horizontal blanking region is utilized by a television to trigger a horizontal retrace of the electron beam that is used to render the image on the television screen. When a horizontal retrace is triggered, the electron beam, which has progressed8from the left of the screen to the right of the screen, returns to the next lower line at the left side of the screen to begin another horizontal tracing pass. A vertical blanking region is utilized by the television to trigger a vertical retrace of the electron beam that is used to render the image on the television screen. When a vertical retrace is triggered, the electron beam returns from the bottommost right side of the screen to the topmost left side of the screen to begin rendering a horizontal line at the top of the screen.

In this example, a display region processor410(FIG. 4) obscures, or otherwise blacks-out, the pixel data of the first, second, and fourth display regions such that only the third display region502(3) has a discernable image when rendered on a display device508. Additionally, the display region processor410shifts the horizontal and vertical timing synchronization codes for display positions510and512which are associated with the third display region502(3) such that the third display region is re-positioned for display514on the display device508. A display region can be re-centered horizontally and/or vertically when being re-positioned for display, or the display region can be re-positioned anywhere on the display. In this example, the third display region502(3) is re-centered for display on the display device508.

The display region processor410shifts the blanking region timing synchronization codes for display position510and the active region timing synchronization codes for display position512to display positions516and518, respectively, which re-centers the display region502(3) horizontally and vertically. The pixel data codes for the display region502(3) are relative to the start and stop timing synchronization codes at display positions510and512. When the display region502(3) is re-positioned for display in this example, the pixel data for the display region is not changed, nor is the display region re-sized to a full-screen display.

For an active region having480vertical lines and640horizontal lines, each display region502is two-hundred and forty (240) vertical lines by three-hundred and twenty (320) horizontal lines. To re-center the third display region502(3), the display region is shifted up one-hundred and twenty (120) vertical lines which, in practice, shifts the timing synchronization codes sixty (60) vertical lines because they are interlaced. The display region is also shifted one-hundred and sixty (160) horizontal lines to the right which requires shifting the timing synchronization codes to the left.

Although this example500illustrates an active region504having four display regions502(1–4) of equal size and arranged in a two-by-two arrangement, any number of display region configurations, sizes, and offsets, to include overlapping display regions, can be processed by a display region processor410such that each of the display regions is individually re-positioned on a display device for viewing.

FIG. 6illustrates a method600for a display source divider. The order in which the method is described is not intended to be construed as a limitation, and any number of the described method blocks can be combined in any order to implement the method. Furthermore, the method can be implemented in any suitable hardware, software, firmware, or combination thereof.

At block602, a video display source is received that includes display data for multiple display regions of a partitioned display. At block604, timing synchronization data is extracted from the video display source for each of the display regions. For example, timing extraction component404extracts the horizontal and vertical timing synchronization data from the digital video display source212for each of the display regions502in the active region504.

At block606, the video display source is replicated to generate multiple video streams each corresponding to a different one of the display regions. For example, display source replicator406replicates the digital video display source212to generate the multiple video streams408where each video stream corresponds to a different display region502.

At block608, pixel data of all but a designated one of the display regions is obscured such that only the designated display region has a discernable image. For example, a display region processor410corresponding to a particular video stream408obscures, or otherwise blacks-out the pixel data of the display regions502(1),502(2), and502(4) such that only the third display region502(3) has a discernable image.

At block610, the timing synchronization for the designated display region is shifted such that the designated display region is re-positioned for display. For example, the display region processor410corresponding to the third display region502(3) shifts the horizontal and vertical timing synchronization data (active region timing synchronization codes for display position512and blanking region timing synchronization codes for display position510) such that the third display region502(3) is re-positioned horizontally and/or vertically for display514on display device508.

FIG. 7illustrates an exemplary implementation700of a display source divider702(this is another example implementation of the display source divider202shown inFIG. 2). The display source divider702includes a timing extraction component704, a horizontal resampler706, a memory component708, and a vertical sampler710. The timing extraction component704processes the digital video display source212to determine such information as the video format and the timing synchronization data for the multiple display regions. The format of the digital video display source212can be any number of different standard definition television formats such as NTSC, PAL, SECAM, and the like.

The horizontal resampler706receives the digital video display source212and horizontally resamples the video display source to generate display region data712that corresponds to one or more of the display regions being re-sized horizontally. As described above, the digital video display source212includes the display data for the multiple display regions of a partitioned display device. The memory component708is implemented as a buffer to maintain the horizontally resampled display region data712.

The vertical resampler710resamples the display region data712such that the one or more display regions are also re-sized vertically. The horizontal resampler706and the vertical resampler710can be implemented to horizontally and vertically resample the digital video display source to maintain a preset aspect ratio of any one of the display regions. In this example, the digital video display source212can be received in a high definition format from which any number of the display regions can be horizontally and vertically resampled for standard definition format display. Additionally, any number of the display regions can be maintained for high definition format display.

The display source divider702also includes multiple display region timing generators714each of which receives the horizontal and vertical resampled digital video display source. Each of the display region timing generators714receives the resampled video display source, as well as information from the timing extraction component704, and generates timing synchronization data for a different one of the display regions such that a respective display region is configured for full-screen display on a respective display device. For example, display region timing generator714(1) receives the resampled video display source and processes the video stream to generate video stream214(1) which corresponds to one of the display regions being re-sized and configured for display on a separate display device. The video stream214(1) is input to the digital-to-analog converter216(1) in video encoder208to convert the digital video stream214(1) to the analog video data stream122(1) for display on the first display device124(1) (FIG. 2).

A display region timing generator714can also receive the resampled video display source, as well as the information from the timing extraction component704, and generate the timing synchronization data for a different one of the display regions such that a respective display region can be displayed at any resolution (e.g., not just a full-screen display). For example, a display region having a four-by-three (4×3) aspect ratio source can be re-sized to display with a sixteen-by-nine (16×9) aspect ratio and have black bars shown on the sides of the viewable image. Similarly, a quadrant display region having a sixteen-by-nine (16×9) aspect ratio source can be re-sized to display with a four-by-three (4×3) aspect ratio and have black bars shown on the top and bottom of the display.

Each of the display region timing generators714can receive a selection control input716that designates which of the display regions is to be associated with a particular display region timing generator. The display region timing generators can be automatically associated with a particular display region of the resampled digital video display source. For example, display region timing generator714(1) can be associated with a first display region, display region timing generator714(2) can be associated with a second display region, and so on. Alternatively, a control input716can be optionally user-selectable such that players of a multi-player gaming system can designate which display regions are processed for display on which display devices.

FIG. 8illustrates another exemplary multi-display system800in which the multi-display output divider102can be implemented. The multi-display system800also includes the video generation system104which may be implemented as a multi-player gaming system that includes game controllers802which are provided for player interaction with the gaming system. The gaming system104(i.e., video generation system) generates a video display source804which is encoded to include left and right display data for head-mounted display devices806.

Each player of the gaming system104can receive interactive visual feedback from independent left and right images displayed on a left and a right display panel within a head-mounted display device806. For example, a first player can interact with the gaming system104via game controller802(1) and receive an interactive visual feedback from a left display image808(L) and a right display image808(R) displayed within the head display device806(1). Similarly, a second player can interact with the gaming system104via game controller802(2) and receive an interactive visual feedback from a left display image810(L) and a right display image810(R) displayed within the head display device806(2).

The multi-display output divider102generates a left eye display video stream and an associated right eye display video stream for each of the head display devices806. The multi-display output divider102can be implemented to generate the video streams as described above with reference to the exemplary implementation200(FIG. 2) of the multi-display output divider, the exemplary implementation400(FIG. 4) of display source divider402, and/or the exemplary implementation700of display source divider702.

FIG. 9illustrates a method900for a display source divider. The order in which the method is described is not intended to be construed as a limitation, and any number of the described method blocks can be combined in any order to implement the method. Furthermore, the method can be implemented in any suitable hardware, software, firmware, or combination thereof.

At block902, a video display source is received that includes display data for multiple display regions of a partitioned display. The video display source can be received from a gaming system (e.g., video generation system104shown inFIG. 8) that generates the display data for multiple players of the gaming system, where the multiple display regions are for left eye display regions808(L) and810(L) and corresponding right eye display regions808(R) and810(R), respectively, for head display devices806.

At block904, timing synchronization data is extracted from the video display source for each of the multiple display regions. For example, timing extraction component704extracts the horizontal and vertical timing synchronization data from the digital video display source212for each of the display regions of a partitioned display, or head display devices806.

At block906, the video display source is horizontally resampled to generate display region data that corresponds to one or more of the display regions being re-sized horizontally. For example, horizontal resampler706resamples the display data of video display source212to generate display region data712. At block908, the display region data is maintained with a memory component. For example, the horizontally resampled display region data712is maintained, or otherwise buffered, with memory component708.

At block910, the display region data is vertically resampled such that the one or more display regions are re-sized vertically. For example, vertical resampler710resamples the display region data712(which has been horizontally resampled) such that the display regions of the partitioned display are re-sized vertically as well as horizontally.

At block912, timing synchronization data for the multiple display regions is generated such that the display regions are each positioned for full-screen display on a separate display device. For example, a particular display region timing generator714receives input from the timing extraction component704and generates the timing synchronization for a corresponding display region that has been re-sized (e.g., horizontally and/or vertically resampled) such that the display region is positioned for a full-screen display.

The methods300(FIG. 3),600(FIG. 6), and900(FIG. 9) for a display source divider may be described in the general context of computer-executable instructions. Generally, computer-executable instructions include routines, programs, objects, components, data structures, procedures, and the like that perform particular functions or implement particular abstract data types. The methods may also be practiced in a distributed computing environment where functions are performed by remote processing devices that are linked through a communications network. In a distributed computing environment, computer-executable instructions may be located in both local and remote computer storage media, including memory storage devices.

FIG. 10illustrates an exemplary computing device1000that includes one or more processors1002(e.g., any of microprocessors, controllers, and the like) which process various instructions to control the operation of computing device1000and to communicate with other electronic and computing devices. Computing device1000can be implemented with one or more memory components, examples of which include a random access memory (RAM)1004, a disk storage device1006, non-volatile memory1008(e.g., any one or more of a read-only memory (ROM)1010, flash memory, EPROM, EEPROM, etc.), and a floppy disk drive1012.

Disk storage device1006can include any type of magnetic or optical storage device, such as a hard disk drive, a magnetic tape, a recordable and/or rewriteable compact disc (CD), a DVD, DVD+RW, and the like. The one or more memory components provide data storage mechanisms to store various information and/or data such as configuration information for computing device1000, graphical user interface information, and any other types of information and data related to operational aspects of computing device1000. Alternative implementations of computing device1000can include a range of processing and memory capabilities, and may include any number of differing memory components than those illustrated inFIG. 10.

Exemplary computing device1000includes a firmware component1014that is implemented as a permanent memory module stored on ROM1010, or with other components in computing device1000, such as a component of a processor1002. Firmware1014is programmed and distributed with computing device1000to coordinate operations of the hardware within computing device1000and contains programming constructs used to perform such operations.

An operating system1016and one or more application program(s)1018can be stored in non-volatile memory1008and executed on processor(s)1002to provide a runtime environment. A runtime environment facilitates extensibility of computing device1000by allowing various interfaces to be defined that, in turn, allow the application programs1018to interact with computing device1000. The application programs1018can include a browser to browse the Web (e.g., “World Wide Web”), an email program to facilitate electronic mail, and any number of other application programs.

Exemplary computing device1000includes a disc drive1020that can be implemented to read any type of removable optical disc, such as a compact disc (CD), a DVD, and the like. Computing device1000further includes one or more communication interfaces1022and a modem1024. The communication interfaces1022can be implemented as any one or more of a serial and/or parallel interface, as a wireless interface, any type of network interface, and as any other type of communication interface. A wireless interface enables computing device1000to receive control input commands and other information from an input device, such as from a remote control device or from another infrared (IR), 802.11, Bluetooth, or similar RF input device.

A network interface provides a connection between computing device1000and a data communication network which allows other electronic and computing devices coupled to a common data communication network to communicate information to computing device1000via the network. Similarly, a serial and/or parallel interface provides a data communication path directly between computing device1000and another electronic or computing device. Modem1024facilitates computing device1000communication with other electronic and computing devices via a conventional telephone line, a DSL connection, cable, and/or other type of connection.

Computing device1000may include user input devices1026that can include a keyboard, mouse, pointing device, controller, and/or other mechanisms to interact with, and to input information to computing device1000. Computing device1000also may include an integrated display device1028, such as for a potable computing device and similar mobile computing devices.

Computing device1000also includes an audio/video processor1030that generates display content for display on the display device1028, and/or for display on an external display device. The audio/video processor1030also generates audio content for presentation by a presentation device, such as one or more speakers (not shown). The audio/video processor1030can include a display controller that processes the display content to display corresponding images on the display device1028, or on an external display device. A display controller can be implemented as a graphics processor, microcontroller, integrated circuit, and/or similar video processing component to process the images. Video signals and audio signals can be communicated from computing device1000to an external display device via an RF (radio frequency) link, S-video link, composite video link, component video link, or other similar communication link. Although shown separately, some of the components of computing device1000may be implemented in an application specific integrated circuit (ASIC). Additionally, a system bus (not shown) typically connects the various components within computing device1000. A system bus can be implemented as one or more of any of several types of bus structures, including a memory bus or memory controller, a peripheral bus, an accelerated graphics port, or a local bus using any of a variety of bus architectures.

Although the invention has been described in language specific to structural features and/or methods, it is to be understood that the invention defined in the appended claims is not necessarily limited to the specific features or methods described. Rather, the specific features and methods are disclosed as exemplary implementations of the claimed invention.