Nanostructure semiconductor light emitting device

A nanostructure semiconductor light emitting device may includes: a base layer having first and second regions and formed of a first conductivity-type semiconductor material; a plurality of light emitting nanostructures disposed on an upper surface of the base layer, each of which including a nanocore formed of the first conductivity-type semiconductor material, and an active layer and a second conductivity-type semiconductor layer sequentially disposed on the nanocore; and a contact electrode disposed on the plurality of light emitting nanostructures, wherein a tip portion of each of light emitting nanostructures disposed on the first region may not be covered with the contact electrode, and a tip portion of each of light emitting nanostructures disposed on the second region may be covered with the contact electrode.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims the priority to Korean Patent Application No. 10-2014-0106794 filed on Aug. 18, 2014, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference.

TECHNICAL FIELD

The present disclosure relates to a nanostructure semiconductor light emitting device.

BACKGROUND

A semiconductor light emitting device such as a light emitting diode (LED) is a device including a material that emits light, in which energy generated through electron-hole recombination is converted into light to be emitted therefrom. LEDs are commonly used as light sources in lighting devices, display devices, and the like, and the development of LEDs has thus been accelerated.

In recent years, semiconductor light emitting devices using nanostructures and technologies for manufacturing the same have been proposed to improve crystallinity and luminous efficiency. In such a semiconductor light emitting device using nanostructures, the generation of heat may be relatively reduced or prevented and a surface area may be increased due to the use of nanostructures, whereby a light emitting area may be increased to enhance luminous efficiency. In addition, an active layer may be obtained from a non-polar plane or a semi-polar plane, whereby luminous efficiency resulting from polarization may be reduced or prevented and efficiency droop characteristics may be improved.

A portion of an active layer formed on a tip portion of a nanostructure is relatively thin, and therefore has a higher risk of leakage current. However, in a case in which a portion of a contact electrode in contact with the tip portion of the nanostructure is removed in order to solve the aforementioned problem, this may result in an increase in operating voltage of the nanostructure.

SUMMARY

An example embodiment in the present disclosure may provide a nanostructure semiconductor light emitting device having stable light emission characteristics through resolving problems in terms of changes in wavelengths of emitted light, leakage currents, and/or increases in operating voltages, which may occur in tip portions of nanostructures.

According to an example embodiment in the present disclosure, a nanostructure semiconductor light emitting device may include: a base layer having first and second regions and formed of a first conductivity-type semiconductor material; a plurality of light emitting nanostructures disposed on an upper surface of the base layer, each of which including a nanocore formed of the first conductivity-type semiconductor material, and an active layer and a second conductivity-type semiconductor layer sequentially disposed on the nanocore; and a contact electrode disposed on the plurality of light emitting nanostructures, wherein tip portions of light emitting nanostructures disposed on the first region may not be covered with the contact electrode, and tip portions of light emitting nanostructures disposed on the second region may be covered with the contact electrode.

The plurality of light emitting nanostructures disposed on the second region and the contact electrode may include a current blocking layer interposed therebetween.

The current blocking layer may be extended to cover an upper portion of the base layer.

The current blocking layer may be formed of an insulating material including SiO2, SiN, Al2O3, HfO, TiO2, or ZrO.

The nanostructure semiconductor light emitting device may further include a second electrode disposed on the second region.

The second electrode may be disposed to contact the contact electrode.

The contact electrode may electrically connect the light emitting nanostructures disposed on the first region to the light emitting nanostructures disposed on the second region.

A side surface of the nanocore may have a crystal plane perpendicular to the upper surface of the base layer.

The side surface of the nanocore may be a non-polar plane.

The tip portions of the light emitting nanostructures may have non-planar surfaces, and the tip portions and side surfaces of the light emitting nanostructures may include crystal planes having different polarities.

The nanostructure semiconductor light emitting device may further include an insulating layer disposed on the base layer and having openings, each of which exposing a portion of the base layer, and the nanocore may be disposed on the portion of the base layer exposed through the opening.

The nanostructure semiconductor light emitting device may further include an insulating protective layer filling a space between the plurality of light emitting nanostructures.

The insulating protective layer may be disposed on the first region.

The insulating protective layer may be formed of a material including at least one of SiO2, SiNx, tetraethyl orthosilicate (TEOS), borophosphosilicate glass (BPSG), CVD-SiO2, spin-on glass (SOG), and spin-on dielectric (SOD).

According to another example embodiment in the present disclosure, a nanostructure semiconductor light emitting device may include: a base layer formed of a first conductivity-type semiconductor material; a plurality of light emitting nanostructures disposed on the base layer, each of which including a nanocore formed of the first conductivity-type semiconductor material, and an active layer and a second conductivity-type semiconductor layer sequentially disposed on the nanocore; a contact electrode disposed on the plurality of light emitting nanostructures; a first electrode electrically connected to the base layer; and a second electrode disposed to cover one region of the contact electrode, wherein one region of the contact electrode may cover tip portions of some light emitting nanostructures among the plurality of light emitting nanostructures, and the other region of the contact electrode may expose tip portions of the other light emitting nanostructures among the plurality of light emitting nanostructures.

According to another example embodiment in the present disclosure, a nanostructure semiconductor light emitting device, may comprise: a base layer including first and second regions; a plurality of light emitting nanostructures on an upper surface of the base layer; and a contact electrode on the plurality of light emitting nanostructures, wherein tip portions of a first subset of the plurality of light emitting nanostructures in the first region are not covered with the contact electrode, and tip portions of a second subset of the plurality of light emitting nanostructures in the second region are covered with the contact electrode.

The nanostructure semiconductor light emitting device may further comprise a current blocking layer between the contact electrode and the plurality of light emitting nanostructures in the second region.

The nanostructure semiconductor light emitting device may further comprise a second electrode on the current blocking layer on the plurality of light emitting nanostructures in the second region.

The nanostructure semiconductor light emitting device may further include a second electrode configured to contact the contact electrode.

The nanostructure semiconductor light emitting device may further include a contact electrode covering main portions of both the first subset of the plurality of light emitting nanostructures in the first region and the second subset of the plurality of light emitting nanostructures in the second region.

DETAILED DESCRIPTION

The inventive concepts will now be described more fully hereinafter with reference to the accompanying drawings, in which example embodiments of the inventive concepts are shown. The advantages and features of the inventive concepts and methods of achieving them will be apparent from the following example embodiments that will be described in more detail with reference to the accompanying drawings. It should be noted, however, that the inventive concepts are not limited to the following example embodiments, and may be implemented in various forms. Accordingly, the example embodiments are provided only to disclose the inventive concepts and let those skilled in the art know the category of the inventive concepts. In the drawings, example embodiments of the inventive concepts are not limited to the specific examples provided herein and are exaggerated for clarity.

Additionally, example embodiments in the detailed description will be described with sectional views as ideal example views of the inventive concepts. Accordingly, shapes of the example views may be modified according to manufacturing techniques and/or allowable errors. Therefore, example embodiments of the inventive concepts are not limited to the specific shape illustrated in the example views, but may include other shapes that may be created according to manufacturing processes. Areas exemplified in the drawings have general properties, and are used to illustrate specific shapes of elements. Thus, this should not be construed as limited to the scope of the inventive concepts.

Accordingly, the cross-sectional view (s) illustrated herein provide support for a plurality of devices according to various example embodiments described herein that extend along two different directions in a plan view and/or in three different directions in a perspective view. For example, when a single active region is illustrated in a cross-sectional view of a device/structure, the device/structure may include a plurality of active regions and transistor structures (or memory cell structures, gate structures, etc., as appropriate to the case) thereon, as would be illustrated by a plan view of the device/structure.

A nanostructure semiconductor light emitting device100according to an example embodiment in the present disclosure is described with reference toFIGS. 1 and 2.

FIG. 1is a plan view of a nanostructure semiconductor light emitting device according to an example embodiment in the present disclosure, andFIG. 2is a cross-sectional view of the nanostructure semiconductor light emitting device ofFIG. 1, taken along line A-A′. To allow for a better understanding of the device,FIGS. 1 and 2are illustrated by enlarging or reducing device portions, rather than being to the same scale.

As illustrated inFIGS. 1 and 2, the nanostructure semiconductor light emitting device100according to an example embodiment in the present disclosure may include a base layer120formed of a first conductivity-type semiconductor material, a plurality of light emitting nanostructures140disposed on the base layer120, and contact electrodes160aand160bdisposed on surfaces of the plurality of light emitting nanostructures140.

The base layer120may be formed on a substrate110, and may not only provide a growth surface for the light emitting nanostructures140but may also serve to form electrical connections between portions of the light emitting nanostructures140having the same polarity.

The base layer120may include a first region A1and second regions A2and A3. The first region A1may be defined as a region that receives electrical signals to emit light externally, and the second regions A2and A3may be defined as regions that do not emit light externally even when electrical signals are applied thereto. The second regions may include the region A3having a plurality of light emitting nanostructures but failing to emit light, and the region A2having no light emitting nanostructures.

The substrate110may be an insulating substrate, a conductive substrate, or a semiconductor substrate. For example, the substrate110may be formed of sapphire, SiC, Si, MgAl2O4, MgO, LiAlO2, LiGaO2, or GaN. The base layer120may be a nitride semiconductor satisfying AlxInyGa1-x-yN (0≦x≦1, 0≦y≦1, 0≦x+y<1), and may be doped with impurities to have a particular conductivity-type. For example, the base layer120may be doped with n-type impurities such as silicon (Si).

An insulating layer130having openings may be formed on the base layer120and the openings may be provided to facilitate growth of the light emitting nanostructures140(especially, nanocores141). Portions of the base layer120may be exposed through the openings131, and the nanocores141may be formed on the exposed portions of the base layer120. The insulating layer130may be used as a mask for growth of the nanocores141. The insulating layer130may be formed of an insulating material such as SiO2or SiNxthat may be used in a semiconductor process.

The light emitting nanostructures140may each include the nanocore141formed of a first conductivity-type semiconductor material and an active layer142and a second conductivity-type semiconductor layer143sequentially formed on a surface of the nanocore141.

The active layer142may include a multi-quantum well (MQW) structure in which quantum well layers and quantum barrier layers are alternately stacked. For example, in a case in which the active layer142is a nitride semiconductor, a GaN/InGaN structure may be used. However, a single quantum well (SQW) structure may also be used. The second conductivity-type semiconductor layer143may be a crystal satisfying p-type AlxInyGa1-x-yN (0≦x<1, 0≦y<1, 0≦x+y<1). The second conductivity-type semiconductor layer143may include an electron blocking layer in a portion thereof adjacent to the active layer142. The electron blocking layer may have a structure in which a plurality of layers having different compositions of n-type AlxInyGa1-x-yN (0≦x<1, 0≦y<1, 0≦x+y<1) are stacked, or may include one or more layers formed of AlyGa(1-y)N (0≦y<1). The electron blocking layer may have a higher band gap than that of the active layer142, thereby reducing or preventing electrons from flowing to the second conductivity-type semiconductor layer143.

A tip portion T of the light emitting nanostructure140may have a non-planar surface. As illustrated inFIG. 2, according to an example embodiment in the present disclosure, the tip portion of the light emitting nanostructure140may have a pyramid shape of which the cross-section is triangular.

Examples of nanocores that may be used in example embodiments are described in more detail with reference toFIGS. 4A and 4B.

The nanocore141illustrated inFIG. 4Amay be divided, into a main portion M providing side surfaces, each of which is a first crystal plane, and a tip portion T providing surfaces, each of which is a second crystal plane different from the first crystal plane, in a growth direction.

In a case in which the nanocore141has a hexagonal crystal structure such as a nitride single crystal, the first crystal plane may be a non-polar plane (e.g. an m-plane) and the second crystal plane may be a semi-polar plane (e.g. an r-plane). The nanocore141may have a rod structure in which the tip portion T is of a hexagonal pyramid shape.

Even in a case in which the active layer is grown on the surface of the nanocore141using the same process, the compositions of portions of the active layer (for example, a content of indium (In) in a case of growth of an InGaN layer) may differ due to differences in characteristics of the respective crystal planes, and a wavelength of light generated in the active layer grown on the r-plane of the tip portion T of the nanocore141may be different from a wavelength of light generated in the active layer grown on the m-plane of the side surface of the nanocore141. This may result in increasing dispersion of wavelengths of emitted light and difficulties in producing light having a desired wavelength.

In example embodiments, a portion of the contact electrode in contact with the tip portion of the light emitting nanostructure may be removed to reduce or prevent a portion of the active layer disposed on the tip portion T of the nanocore from emitting light. Therefore, the removal of the portion of the contact electrode in contact with the tip portion of the light emitting nanostructure may reduce or prevent the dispersion of wavelengths of emitted light and the leakage current, thereby improving luminous efficiency. Also, the wavelength of light may be designed precisely by allowing the portion of the active layer disposed on the tip portion of the nanocore to not be involved in emitting light. Moreover, since the tip portion of the light emitting nanostructure is exposed, at least a portion of light generated in one light emitting nanostructure may be emitted upwardly prior to being multiply reflected or absorbed by the contact electrode disposed on adjacent light emitting nanostructures, and thus, the amount of light emitted therefrom may be increased.

The removal of the portion of the contact electrode in contact with the tip portion of the light emitting nanostructure as described above may be applied to other nanocores having various crystal structures and forms different from those of the nanocore illustrated inFIG. 4A, as long as tip portions and side surfaces of the other nanocores have different crystal planes. For example, it may be applied in a similar manner to light emitting nanostructures, each of which includes a nanocore having a tip portion which is not formed of a semi-polar plane, as illustrated inFIG. 4B.

As illustrated inFIG. 4B, a nanocore141′, similarly to the nanocore illustrated inFIG. 4A, may have a main portion M providing side surfaces, each of which is a first crystal plane m. The nanocore141′ may have a tip portion T providing surfaces, each of which is a second crystal plane c different from the first crystal plane m, but the second crystal plane c may not be completely semi-polar.

In the aforementioned structure of the nanocore141′, the compositions or thicknesses of portions of an active layer grown thereon may differ due to differences in characteristics of respective crystal planes, which may cause a leakage current and differences in wavelengths of light emitted therefrom. By removing a portion of the contact electrode disposed on the tip portion T of the nanocore141′ in the same manner as illustrated inFIG. 4A, a current may be reduced or prevented from flowing to the active layer142on the tip portion T of the nanocore141′. As a result, the leakage current and the differences in the wavelengths of light may be resolved, whereby a higher efficiency nanostructure semiconductor light emitting device may be provided.

On the other hand, the removal of a portion of the contact electrode160ain contact with the tip portion T of the light emitting nanostructure140may reduce or prevent an area of the contact electrode160a, causing an increase in operating voltage of the light emitting nanostructure140and an increase in contact resistance of the contact electrode160a. In example embodiments, portions of the contact electrodes in contact with the tip portions T of some of the light emitting nanostructures140may be removed selectively, depending on whether the light emitting nanostructures140are disposed on the first region or the second region.

The contact electrodes160aand160bare detailed below.

The contact electrodes160aand160bmay be disposed on the surfaces of the light emitting nanostructures140. The contact electrodes160aand160bmay be formed of an ohmic contact material having ohmic contact with the second conductivity-type semiconductor layer143. For example, the contact electrodes160aand160bmay include at least one of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, and Au, and may be provided as a single- or multiple-layer structure. Alternatively, the contact electrodes160aand160bmay include a transparent electrode material such as ITO. As necessary, ZnO or graphene may be used therefor.

The nanostructure semiconductor light emitting device100according to the present example embodiment may include the contact electrodes160aand160bdisposed on the surfaces of the light emitting nanostructures140. As illustrated inFIG. 2, the contact electrodes160aand160bmay be disposed on the surfaces of the light emitting nanostructures140; however, the contact electrodes160aand160bmay have different shapes, respectively, depending on whether the light emitting nanostructures140are disposed on the first region A1or the second region A3.

The contact electrode160amay only be formed on the side surfaces of the light emitting nanostructures140disposed on the first region A1while not being formed on the tip portions T of the light emitting nanostructures140. Here, the top of the contact electrode160adisposed on the side surfaces of the light emitting nanostructures140may be spaced apart from the tip portions T of the light emitting nanostructures140by a predetermined and/or desired interval W, in consideration of manufacturing tolerance.

By removing portions of the contact electrode from the tip portions T of the light emitting nanostructures140, the concentration of leakage current on the tip portions T of the light emitting nanostructures140may be resolved. However, a reduction in contact area between the contact electrode160aand a second electrode190electrically connected to the contact electrode may cause increases in contact resistance and the operating voltage of the light emitting nanostructures140.

In example embodiments, in the nanostructure semiconductor light emitting device according to the present example embodiment, the contact electrode160bmay be formed to cover the tip portions T of the light emitting nanostructures140disposed on the second region A3, thereby increasing the contact area with the second electrode190electrically connected to the contact electrode. Thus, the contact resistance between the contact electrode160band the second electrode190may be reduced or prevented and the operating voltage of the light emitting nanostructure140may be lowered. Also, since the light emitting nanostructures140disposed in the second region A3are not capable of emitting light, an increase in dispersion of emitted light wavelengths may not occur even in a case in which the contact electrode160bis formed on the tip portions T of the light emitting nanostructures140.

The following measurement results were listed in table1by comparing a comparative example EF in which the contact electrode is formed on both the tip portion and the side surface of the light emitting nanostructure, a comparative example EP in which the contact electrode is only formed on the side surface of the light emitting nanostructure, and an inventive example SEP:

It can be seen that the problem of increasing operating voltage in comparative example EP in which the contact electrode is only formed on the side surface of the light emitting nanostructure was resolved in inventive example SEP, and the reverse leakage current in inventive example SEP was reduced by 21% as compared to comparative example EP.

A current blocking layer150may be interposed between the plurality of light emitting nanostructures140disposed on the second region A3and the contact electrode160b. The current blocking layer150may include an insulation material such as SiO2, SiN, Al2O3, HfO, TiO2, or ZrO, and may block the flow of current between the light emitting nanostructures140disposed on the second region A3and the contact electrode160b, thereby reducing or preventing the active layers142of the corresponding light emitting nanostructures140from emitting light.

An insulating protective layer170may be formed on the upper surfaces of the light emitting nanostructures140as a passivation layer. Such an insulating protective layer170may reduce or prevent undesired exposure of portions of the light emitting nanostructures140, such as the active layer142, and protect the light emitting nanostructures140. The insulating protective layer170may be formed to have a uniform thickness on the light emitting nanostructures140disposed on the first region A1. Alternatively, as illustrated inFIG. 3, an insulating protective layer170′ may be provided in a modified form, with a height h corresponding to the height of the side surface of the light emitting nanostructures140, thereby covering the side surfaces, other than the tip portions, of the light emitting nanostructures140disposed on the second region A3. As illustrated inFIG. 3, in the case in which the insulating protective layer170′ is formed to cover the side surfaces of the light emitting nanostructures140disposed on the second region A3, breakage of the light emitting nanostructures140may be reduced or prevented during the manufacturing process.

The insulating protective layer may be formed of an electrical insulating material that may be used as a passivation in a semiconductor manufacturing process. Such an insulating protective layer may include a material capable of filling a space between the plurality of light emitting nanostructures140, such as SiO2, SiNx, tetraethyl orthosilicate (TEOS), borophosphosilicate glass (BPSG), CVD-SiO2, spin-on glass (SOG), and spin-on dielectric (SOD).

As illustrated inFIG. 1, the nanostructure semiconductor light emitting device100may include a first electrode180and a second electrode190. Also, as illustrated inFIG. 2, the first electrode180may be disposed in the second region A2in which a portion of the base layer120formed of the first conductivity-type semiconductor material is exposed, and the second electrode190may be disposed in the second region A3in which the upper portion of the contact electrode160bis exposed.

InFIG. 1, the first electrode180and the second electrode190are illustrated as including pad portions180aand190aand one or more finger portions180band190bextending from the pad portions180aand190a, respectively; however, the first electrode180and the second electrode190are not limited thereto.

The nanostructure semiconductor light emitting device100having the aforementioned novel structure may be obtained by using various manufacturing methods.FIGS. 5A to 5Hare views illustrating a method of manufacturing the nanostructure semiconductor light emitting device ofFIG. 1.

As illustrated inFIG. 5A, the insulating layer130may be formed as a mask on the base layer120formed of a first conductivity-type semiconductor material, and the plurality of light emitting nanostructures140may be formed on the base layer120.

The base layer120may be formed on the substrate110, and may not only provide a crystal growth surface for the light emitting nanostructures140, but may also be provided as a structure for electrical connections between portions of the light emitting nanostructures140having the same polarity. Thus, the base layer120may be formed as a semiconductor single crystal having electrical conductivity. In a case in which the base layer120is grown directly, the substrate110may be a crystal growth substrate.

The base layer120may be a nitride semiconductor satisfying AlxInyGa1-x-yN (0≦x<1, 0≦y<1, 0≦x+y<1), and may be doped with n-type impurities such as Si. In this case, the substrate110may be formed of sapphire, SiC, Si, MgAl2O4, MgO, LiAlO2, LiGaO2, or GaN.

The insulating layer130may include a plurality of openings131through which portions of the base layer120may be exposed. By forming the plurality of openings131after depositing an insulating material on the base layer120, the insulating layer130may expose the portions of the base layer120. The insulating layer130may be formed of an insulating material such as SiO2or SiNx. The size of the opening131may be determined in consideration of a desired size of the nanocore to be grown therein. For example, the diameter of the opening131may be 500 nm or less, or more specifically, 200 nm. When viewed from above, the shapes and arrangements of the openings131may be varied. For example, the shapes of the openings131may be polygonal, quadrangular, elliptical, or circular.

The nanocores141may be obtained by selectively growing a first conductivity-type semiconductor material using the insulating layer130as a mask. The first conductivity-type semiconductor material of the nanocore141may be an n-type nitride semiconductor, and for example, may be a crystal satisfying n-type AlxInyGa1-x-yN (0≦x<1, 0≦y<1, 0≦x+y<1). The first conductivity-type semiconductor material forming the nanocores141may be the same as the first conductivity-type semiconductor material forming the base layer120. For example, the base layer120and the nanocores141may be formed of n-type GaN.

A nitride single crystal forming the nanocores141may be formed using metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE). The crystal may only be grown on the portions of the base layer120exposed through the openings131, rather than being formed on the insulating layer130, whereby the nanocores141may be formed to have a desired shape. The tip portion T and the side surfaces of the nanocore141may have different crystal planes. According to the present example embodiment, the nanocore141is illustrated as having a rod shape; however, the shape of the nanocore is not limited thereto. For example, the nanocore may have a polypyramidal shape such as a hexagonal pyramid shape. Such various shapes of the nanocores may be obtained by adjusting growth conditions such as growth temperature, growth pressure, and source gas flow.

The active layer142and the second conductivity-type semiconductor layer143may be sequentially grown on the surface of each of the nanocores141. Through the process as described above, each of the light emitting nanostructures140may have a core-shell structure in which the first conductivity-type semiconductor is provided as the nanocore141, and the active layer142covering the nanocore141and the second conductivity-type semiconductor layer143are provided as a shell layer.

The active layer142may include a multi-quantum well (MQW) structure in which quantum well layers and quantum barrier layers are alternately stacked. For example, in a case in which the active layer142is formed of a nitride semiconductor, a GaN/InGaN structure may be used therefor. Alternatively, a single quantum well (SQW) structure may also be used.

The second conductivity-type semiconductor layer143may be a crystal satisfying p-type AlxInyGa1-x-yN (0≦x<1, 0≦y<1, 0≦x+y<1). The second conductivity-type semiconductor layer143may include an electron blocking layer in a portion thereof adjacent to the active layer142. The electron blocking layer may have a structure in which a plurality of layers having different compositions of n-type AlxInyGa1-x-yN (0≦x<1, 0≦y<1, 0≦x+y<1) are stacked or may include one or more layers formed of AlyGa(1-y)N (0≦y<1), and may include a higher band gap than that of the active layer142, thereby reducing or preventing electrons from flowing to the second conductivity-type semiconductor layer143.

The current blocking layer150may be further formed on the surfaces of the light emitting nanostructures140disposed on the region A3. The region A3may be used for the disposition of the second electrode in a subsequent process. As described above, the current blocking layer150may block the current between the light emitting nanostructures and the contact electrode, thereby reducing or preventing the light emitting nanostructures140disposed on the second region A3from emitting light. The thickness of the current blocking layer150may be at least 10 nm, and the current blocking layer150may be extended to the upper surface of the insulating layer130.

Then, as illustrated inFIG. 5B, a contact electrode160may be formed on the surfaces of the light emitting nanostructures140. In a case in which the current blocking layer150is formed in the previous process, the contact electrode160may be formed on the surface of the current blocking layer150. The contact electrode160may be formed of a material capable of forming ohmic contact with the second conductivity-type semiconductor layer143. For example, the contact electrode160may include at least one of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, and Au, and may be provided as a structure including two or more layers such as Ni/Ag, Zn/Ag, Ni/Al, Zn/Al, Pd/Ag, Pd/Al, Ir/Ag, Ir/Au, Pt/Ag, Pt/Al, Ni/Ag/Pt, or the like. Alternatively, the contact electrode160may include a transparent electrode material such as ITO. As necessary, graphene may be used therefor.

Then, as illustrated inFIG. 5C, an etch stop layer151may be formed on the surface of the contact electrode160formed on the light emitting nanostructures140disposed on the region A3. The etch stop layer151may reduce or prevent etching of the upper portions of the contact electrode160formed on the light emitting nanostructures140disposed on the region A3in a subsequent process, and may be formed of the same material as that of the current blocking layer150.

Then, a photoresist may be applied to cover the contact electrode160and the etch stop layer151. As illustrated inFIG. 5D, the photoresist may be etched until the upper portions of the contact electrode160and the etch stop layer151are exposed. The etching process may be performed through dry etching such as CF4plasma etching or O2plasma etching.

Then, the exposed portion of the contact electrode160may be removed, and then the photoresist may be removed. Then, as illustrated inFIG. 5E, the upper portions of the contact electrode160formed on the light emitting nanostructures140disposed on the first region A1may be selectively removed, with the contact electrode160aremaining. Here, the upper portions of the contact electrode160formed on the light emitting nanostructures140disposed on the second region A2may also be selectively removed, with the contact electrode160aremaining. In a case in which the contact electrode160is formed of ITO, the upper portions of the contact electrode160may be selectively removed using an ITO etchant such as LCE-12K.

The portions of the contact electrode disposed on the tip portions of the light emitting nanostructures140may be removed by using the aforementioned selective etching process, exposing the tip portions T of the light emitting nanostructures140. Therefore, the contact electrode160amay only be formed on the side surfaces of the light emitting nanostructures140. Thus, the removal of the contact electrode may expose the second conductivity-type semiconductor layer143, thereby increasing contact resistance and limiting a current flow. Therefore, the concentration of leakage current on the tip portions of the light emitting nanostructures140may be reduced or prevented.

Then, the etch stop layer151may be removed, and as illustrated inFIG. 5F, the insulating protective layer170may be formed to cover the light emitting nanostructures140. The etch stop layer151may be removed through a chemical etching process. For example, the etch stop layer151may be removed through a wet etching process using a buffered oxide etchant (BOE).

The insulating protective layer170may be formed of an electrical insulating material that may be used as a passivation in a semiconductor manufacturing process. Such an insulating protective layer may include a material capable of filling the space between the light emitting nanostructures140, such as SiO2, SiNx, tetraethyl orthosilicate (TEOS), borophosphosilicate glass (BPSG), CVD-SiO2, spin-on glass (SOG), and spin-on dielectric (SOD).

Then, as illustrated inFIG. 5G, a portion of the insulating protective layer170may be selectively etched and removed from the region A3, on which the second electrode is to be formed, to thereby define a region e2which is used for the disposition of the second electrode. The insulating protective layer170may be selectively etched through dry etching or wet etching. For example, in a case in which the insulating protective layer170is formed of an oxide film or a similar material, CF plasma may be used in the dry etching, and an HF-containing etchant such as BOE may be used in the wet etching.

Then, as illustrated inFIG. 5H, a region e1on which the first electrode is to be formed may be defined. Here, a portion of the base layer120may be exposed to define the region e1on which the first electrode is to be formed.

The exposed region e1may be used for the disposition of the first electrode. The removing process may be performed using a photolithography process. In this process, some light emitting nanostructures140disposed on the exposed region e1may be removed; however, by not growing any nanocore141on the region on which the electrode is to be formed, there is no need to remove the light emitting nanostructures140.

Then, as illustrated inFIGS. 2 and 5H, the first electrode180and the second electrode190may be formed on the regions e1and e2, respectively. In this process, a common electrode material may be used for the first and second electrodes180and190. For example, the material for the first and second electrodes180and190may include Au, Ag, Al, Ti, W, Cu, Sn, Ni, Pt, Cr, TiW, AuSn, or eutectic metals thereof.

The manufacturing method according to example embodiments in the present disclosure may be modified in various ways. For example, unlike the aforementioned manufacturing method, the contact electrode formed on the tip portions of the light emitting nanostructures140may be removed using the insulating protective layer, rather than the use of a separate etch stop layer.FIGS. 6A to 6Eare views illustrating a method of a nanostructure semiconductor light emitting device according to another example embodiment in the present disclosure.

The present example embodiment differs from the previous example embodiment in that upper portions of a contact electrode may be removed using an insulating protective layer as a mask, without a separate etch stop layer. Since other features are the same as those in the previous example embodiment, the aforementioned difference is detailed below.

As illustrated inFIG. 6A, an insulating layer230may be formed as a mask on a base layer220formed of a first conductivity-type semiconductor material. A plurality of light emitting nanostructures240may be formed on the base layer220, each of which includes a first conductivity-type semiconductor layer241, a second conductivity-type semiconductor layer243, and an active layer242. A current blocking layer250may be further formed on surfaces of light emitting nanostructures240disposed on a region A3. A contact electrode260may be formed on surfaces of the light emitting nanostructures240. In a case in which the current blocking layer250is formed, the contact electrode260may be formed on a surface of the current blocking layer250. An insulating protective layer270may be formed to cover the contact electrode260. In an example embodiment, a material such as TEOS may be used for the insulating protective layer270.

Then, as illustrated inFIG. 6B, a portion of the insulating protective layer270may be etched and removed, so that upper portions of the contact electrode260disposed on tip portions T of the light emitting nanostructures240may be exposed with the contact electrodes260aand260bremaining. Such an etching process may be performed through dry etching such as CF4plasma etching or O2plasma etching.

Then, as illustrated inFIG. 6C, a photoresist254may be applied to the region A3on which a second electrode is to be formed, and the upper portions of the contact electrode formed on the tip portions of the light emitting nanostructures disposed on a region A2may be selectively etched and removed. This selective etching may be performed using an ITO etchant such as LCE-12K.

Then, the photoresist254may be removed, and as illustrated inFIG. 6D, a region e1on which a first electrode is to be formed may be defined. In this process, a portion of the base layer220may be exposed to define the region e1on which the first electrode is to be formed.

The exposed region e1may be used for the disposition of the first electrode. The removing process may be performed using a photolithography process. In this process, some light emitting nanostructures240disposed on the exposed region e1may be removed; however, by not growing any nanocore241on the region on which the electrode is to be formed, there is no need to remove the light emitting nanostructures240.

Then, as illustrated inFIG. 6E, a first electrode280aand a second electrode290′ may be formed on the regions e1and A3, respectively. In this process, a common electrode material may be used for the first and second electrodes280aand290′. For example, the material for the first and second electrodes280aand290′ may be Au, Ag, Al, Ti, W, Cu, Sn, Ni, Pt, Cr, TiW, AuSn, or eutectic metals thereof.

In the manufacturing method according to an example embodiment, the portions of the contact electrode260on the tip portions of the light emitting nanostructures240may be selectively removed using the insulating protective layer270without the use of a separate etch stop layer, and thus, the manufacturing process may be simplified, as compared with the manufacturing method according to the previous example embodiment.

The nanostructure semiconductor light emitting device according to the above-described example embodiment may be used in various types of package.

FIGS. 7 and 8are schematic views illustrating examples of a backlight unit including a nanostructure semiconductor light emitting device according to an example embodiment in the present disclosure.

Referring toFIG. 7, a backlight unit1000may include at least one light source1001mounted on a board1002, and at least one optical sheet1003disposed above the light source1001. The light source1001may be the aforementioned nanostructure semiconductor light emitting device or a package including the same.

The light source1001in the backlight unit1000ofFIG. 7emits light toward a liquid crystal display (LCD) device disposed thereabove, whereas a light source2001mounted on a board2002in a backlight unit2000according to another embodiment illustrated inFIG. 8emits light laterally and the light is incident to a light guide plate2003such that the backlight unit2000may serve as a surface light source. The light travelling to the light guide plate2003may be emitted upwardly and a reflective layer2004may be disposed below a lower surface of the light guide plate2003in order to improve light extraction efficiency.

FIG. 9is an exploded perspective view illustrating an example of a lighting device including a nanostructure semiconductor light emitting device according to an example embodiment in the present disclosure.

A lighting device3000illustrated inFIG. 9is exemplified as a bulb-type lamp, and may include a light emitting module3003, a driver3008, and an external connector3010.

Also, the lighting device3000may further include exterior structures such as an external housing3006, an internal housing3009, and a cover3007. The light emitting module3003may include a light source3001having the above-described package structure or a structure similar thereto, and a circuit board3002on which the light source3001is mounted. For example, the first and the second electrodes of the above-described semiconductor light emitting device may be electrically connected to electrode patterns of the circuit board3002. According to an example embodiment, a single light source is mounted on the circuit board3002by way of example; however, a plurality of light sources may be mounted on the circuit board, if necessary.

The external housing3006may serve as a heat radiator, and may include a heat sink plate3004directly contacting the light emitting module3003to thereby improve heat dissipation and heat radiating fins3005surrounding a side surface of the lighting device3000. The cover3007may be disposed above the lighting module3003and may have a convex lens shape. The driver3008may be disposed inside the internal housing3009and be connected to the external connector3010such as a socket structure to receive power from an external power source. Also, the driver3008may convert the received power into power appropriate for driving the light source3001of the lighting module3003and supply the converted power thereto. For example, the driver3008may be provided as an AC-DC converter, a rectifying circuit, or the like.

FIG. 10is a view illustrating an example of a headlamp including a nanostructure semiconductor light emitting device according to an example embodiment in the present disclosure.

Referring toFIG. 10, a headlamp4000used in a vehicle or the like may include a light source4001, a reflector4005and a lens cover4004, and the lens cover4004may include a hollow guide part4003and a lens4002. The light source4001may include the aforementioned nanostructure semiconductor light emitting device or the aforementioned package having the same.

The headlamp4000may further include a heat radiator4012externally dissipating heat generated in the light source4001. The heat radiator4012may include a heat sink4010and a cooling fan4011in order to effectively dissipate heat. In addition, the headlamp4000may further include a housing4009allowing the heat radiator4012and the reflector4005to be fixed thereto and supporting them. The housing4009may include a body4006and a central hole4008formed in one surface thereof, to which the heat radiator4012is coupled.

The housing4009may include a forwardly open hole4007formed in the other surface thereof integrally connected to one surface thereof and bent in a direction perpendicular thereto. The reflector4005may be fixed to the housing4009, such that light generated in the light source4001may be reflected by the reflector4005, pass through the forwardly open hole4007, and be emitted outwards.

As set forth above, according to example embodiments in the present disclosure, the leakage current occurring in the active layers formed on the tip portions of the light emitting nanostructures may be reduced or prevented. Also, an increase in the operating voltage of the light emitting nanostructures may be reduced or prevented.

Additionally, each of the features described above may be combined in any appropriate manner to obtain nanostructure semiconductor light emitting devices, light emitting nanostructures, methods, and/or apparatuses with various combinations of features. In this regard, U.S. application Ser. No. 14/551,978, filed Nov. 24, 2014; Ser. No. 14/723,869, filed May 28, 2015; Ser. No. 13/599,430, filed Aug. 30, 2012; and Ser. No. 14/501,232, filed Sep. 30, 2014, are each hereby incorporated by reference in their entirety, thereby disclosing additional nanostructure semiconductor light emitting devices, light emitting nanostructures, methods, and/or apparatuses with various additional combinations of features.

While example embodiments have been shown and described above, it will be apparent to those skilled in the art that modifications and variations could be made without departing from the scope in the present invention as defined by the appended claims.