Switched capacitor voltage regulator with high efficiency over a wide voltage range

In some embodiments, a voltage regulator device may include a switched capacitor voltage regulator to receive an input voltage and to provide an output voltage to a load, and a control unit to receive information related to a desired output voltage for the switched capacitor voltage regulator and to determine a desired input voltage for the switched capacitor voltage regulator based on the desired output voltage and selected operation mode or modes of switched capacitor voltage regulator. Other embodiments are disclosed and claimed.

The invention relates to voltage regulators and more particularly to switched capacitor voltage regulators.

BACKGROUND AND RELATED ART

Voltage converters are well known in the art. U.S. Pat. No. 5,880,945 describes a power conversion system where the active components of the power conversion system are integrated into the integrated circuit for which power is being supplied.

DESCRIPTION

In the following description, for purposes of explanation and not limitation, specific details are set forth such as particular structures, architectures, interfaces, techniques, etc. in order to provide a thorough understanding of the various aspects of the invention. However, it will be apparent to those skilled in the art having the benefit of the present disclosure that the various aspects of the invention may be practiced in other examples that depart from these specific details. In certain instances, descriptions of well known devices, circuits, and methods are omitted so as not to obscure the description of the present invention with unnecessary detail.

With reference toFIG. 1, in accordance with some embodiments of the invention a voltage regulator device10may include a switched capacitor voltage regulator12to receive an input voltage VINand to provide an output voltage VOUT(e.g. to a load) and a control unit14to receive information related to a desired output voltage VOUTfor the switched capacitor voltage regulator12and to determine a desired input voltage VINfor the switched capacitor voltage regulator12based on the desired output voltage VOUT(and/or selected operation mode or modes of the switched capacitor voltage regulator12). For example, the control unit14may be further configured to provide control information related to the desired input voltage VIN. For example, the load may include a processor and the information related to the desired output voltage may include information related to processor performance demands. For example, in some embodiments of the invention the control unit14may be configured to determine the desired input voltage based on information related to one or more of a processor voltage identification, a processor load prediction and a conversion ratio of the switched capacitor voltage regulator12. In some embodiments of the invention, the switched capacitor voltage regulator12, the control unit14, and the processor may be co-located on a same integrated circuit die.

With reference toFIG. 2, in accordance with some embodiments of the invention an electronic system20may include a first voltage regulator device22to receive an input voltage VINand to provide an intermediate voltage VM, a second voltage regulator device24to receive the intermediate voltage VMand to provide an output voltage VOUT, where the second voltage regulator device includes a switched capacitor voltage regulator, a load circuit26coupled to the output voltage VOUT, and a control unit28coupled between the load circuit26and the first voltage regulator device22, where the control unit28is configured to receive information related to a desired output voltage VOUTfor the switched capacitor voltage regulator24and to determine a desired intermediate voltage VMfor the switched capacitor voltage regulator24based on the desired output voltage VOUT.

For example, the control unit28may be further configured to provide control information relating to the desired intermediate voltage VMto the first voltage regulator22. For example, the first voltage regulator22may be configured to adjust the intermediate voltage VMbased on the control information received from the control unit28. For example, the first voltage regulator22may include a buck converter having a variable duty cycle and the buck converter may be configured to adjust the duty cycle based on the control information received from the control unit28(e.g. to provide the desired intermediate voltage VM).

In some embodiments of the electronic system20, the load circuit26may include a processor and the information related to the desired output voltage VOUTmay include information related to processor performance demands. For example, the control unit28may be configured to determine the desired intermediate voltage VMbased on information related to one or more of a processor voltage identification, a processor load prediction and a conversion ratio of the switched capacitor voltage regulator. In some embodiments of the electronic system20, the switched capacitor voltage regulator24, the control unit28, and the processor26may be co-located on a same integrated circuit die29. For example, the integrated circuit including the switched capacitor voltage regulator24, the processor26, and the control unit28may be a system-on-a-chip (SOC)29.

With reference toFIG. 3, a method of operating a voltage regulator in accordance with some embodiments of the invention may include providing a switched capacitor voltage regulator (e.g. at block31), receiving an input voltage at the switched capacitor voltage regulator (e.g. at block32), providing an output voltage from the switched capacitor voltage regulator to a load (e.g. at block33), receiving information related to a desired output voltage for the switched capacitor voltage regulator (e.g. at block34), and determining a desired input voltage for the switched capacitor voltage regulator based on the desired output voltage (e.g. at block35).

For example, some embodiments of the invention may further include providing control information related to the desired input voltage (e.g. at block36). Some embodiments of the invention may further include adjusting at least one of the input voltage and the conversion ratio for the switched capacitor voltage regulator based on the control information (e.g. at block37).

In some embodiments of the invention, providing the output voltage from the switched capacitor voltage regulator to the load may include providing the output voltage from the switched capacitor voltage regulator to a processor, and the information related to the desired output voltage may include information related to processor performance demands (e.g. at block38). For example, in some embodiments of the invention, determining the desired input voltage for the switched capacitor voltage regulator based on the desired output voltage may include determining the desired input voltage based on information related to one or more of a processor voltage identification, a processor load prediction and a conversion ratio of the switched capacitor voltage regulator (e.g. at block39).

Advantageously, some embodiments of the invention may provide an enhanced CPU power delivery scheme with a switched capacitor voltage regulator. For example, some embodiments of the invention may address the complexity of satisfying two trends that pull CPU power delivery solutions in opposing directions. The first trend relates to tighter requirements on the CPU supply voltage (e.g. tolerance level) as the process moves to smaller and smaller geometries. For example, some embodiments of the invention may provide fine grain voltage steps for each frequency bin in order to run the CPU at relatively low or the lowest possible power for that frequency. The second trend relates to integrated VR circuits on the CPU die itself (sometimes referred to as FiVR—Fully Integrated Voltage Regulator).

For example, some FiVR designs may include one or more switched capacitor voltage regulators (SCVRs), which generally don't use any inductors. An example of a switched capacitor voltage regulator is described in U.S. patent application Ser. No. 12/242,584, filed Sep. 30, 2008, and entitled SWITCHED CAPACITOR VOLTAGE REGULATOR, which is incorporated by reference herein in its entirety.

In some systems, one or more SCVRs may be integrated on the die with a processor and may all run off a single fixed voltage generated by a buck VR on the platform. For example, the buck VR may generate the single fixed voltage from an input voltage. For example, the single fixed voltage may be a value determined by the highest voltage that the CPU process can tolerate to meet reliability requirements.

In some systems, the two trends described above may have conflicting forces since an SCVR may operate more efficiently at discrete voltage levels set at integer ratios between input and output voltages. For example, any voltage regulated away from these discrete voltage points may cause an increase of power consumption linearly (e.g. approximately VN−KN), or sometimes even worse in the power of 2 (e.g. approximately (VN−KN)2).

However, the CPU may operate better at very closely spaced voltage points. For example, a preferred operating point for the CPU may be at a voltage level between any two of these consecutive discrete voltage points. Operating at a voltage level between the two discrete voltage points may cause significant power loss due to CPU power delivery in order to achieve a fine grain CPU supply voltage. For example, the output voltage may only be regulated efficiently at discrete voltage points rather than continuous adjustable VIDs (ex: VRM 11 Spec. 12.5 mV resolution) demanded from the CPU.

The output voltage, VOUT, is the function of the input voltage, VINin the relationship of:
VOUT=n/m VM, to optimize SCVR efficiency, wheren, mare integers
VM=D VIN, where,Dis a constant value representing step-down voltage conversion ratio.
Therefore,
VOUT=(D*n/m)VIN

For example, if VINis 5V, a buck VR with step-down ratio of 5 will give the intermediate voltage of VMof 1V. Assume that SCVR can work on multiple conversion ratios of n/m, 1/3, 2/3 and 3/4. Therefore, such a power delivery network operates more efficiently at the output voltages of 0.333V, 0.666V and 0.750V. Power efficiency will reduce significantly away from these three voltage levels if CPU performance demands to have a different supply voltage.

With reference toFIG. 4, a graph of an intermediate voltage VMversus CPU supply voltage VOUTillustrates an example principle of some embodiments of the invention. Instead of a fixed value of the intermediate voltage level (e.g. the dashed line inFIG. 4), some embodiments of the invention may utilize a variable value of VM(e.g. the solid line inFIG. 4with a constant slope (e.g. K1=(m/n)SCVR). Advantageously, some embodiments of the invention may address the problem of power loss/reduction of SCVR power delivery for CPU applications which require or benefit from fine grain voltage steps. For example, some embodiments of the invention may adjust the intermediate voltage, VM, on-the-fly based on CPU supply voltage requirements while integer conversion ratios of the 2nd stage VR, the SCVR, are held constant.

With reference toFIG. 5, a graph of CPU supply voltage versus power efficiency illustrates an example principle of some embodiments of the invention. A fixed intermediate voltage (e.g. corresponding to the dashed line inFIG. 4) provides efficient operation at discrete CPU supply voltage points but with efficiency falling off substantially between those discrete voltage points (e.g. corresponding to the dashed line inFIG. 5). In accordance with some embodiments of the invention, adjusting the intermediate voltage (e.g. corresponding to the solid line inFIG. 4) provides efficient operation across a wide range of CPU supply voltages (e.g. corresponding to the solid line inFIG. 5). Advantageously, some embodiments of the invention may provide substantially continuous or fine grain supply voltage steps to meet CPU demands while also providing relatively high or higher efficiency for the SCVR at discrete voltage points.

With reference toFIG. 6, in accordance with some embodiments of the invention an electronic system60may include a first voltage regulator device, e.g. buck VR62, to receive an input voltage VINand to provide an intermediate voltage VM(x,y), a second voltage regulator device64to receive the intermediate voltage VMand to provide an output voltage VOUT, where the second voltage regulator device includes a switched capacitor voltage regulator, a load circuit, e.g. CPU load66, coupled to the output voltage VOUT, and a control unit, e.g. control interface68, coupled between the CPU load66and the buck VR62, where the control interface68is configured to receive information related to a desired output voltage VOUTfor the switched capacitor voltage regulator64and to determine a desired intermediate voltage VMfor the switched capacitor voltage regulator64based on the desired output voltage VOUT.

For example, the control interface68may be further configured to provide control information relating to the desired intermediate voltage VMto the buck VR62. For example, the buck VR62may be configured to adjust the intermediate voltage VMbased on the control information received from the control interface68. For example, the buck VR62may include a buck converter having a variable duty cycle and the buck converter may be configured to adjust the duty cycle based on the control information received from the control interface68(e.g. to provide the desired intermediate voltage VM).

In some embodiments of the electronic system60, the CPU load66may include a processor and the information related to the desired output voltage VOUTmay include information related to processor performance demands. For example, the control interface68may be configured to determine the desired intermediate voltage VMbased on information related to one or more of a processor voltage identification (VID), a processor load prediction and a conversion ratio of the switched capacitor voltage regulator64. In some embodiments of the electronic system60, the switched capacitor voltage regulator64, the control interface68, and the CPU load66may be co-located on a same integrated circuit die. For example, the integrated circuit including the switched capacitor voltage regulator64, the processor66, and the control interface68may be a system-on-a-chip (SOC).

For example, the control interface68may generate a corresponding voltage reference for the intermediate voltage VM(x, y) based on CPU performance demands such as CPU VID, CPU load range/prediction, and SCVR conversion ratio of n/m. For example, the control interface68may include a look-up table to select a duty cycle for the buck VR62based on one or more of the various inputs. The duty cycle of the buck VR62can be fine tuned, providing corresponding fine tuning of the SCVR input voltage, the intermediate voltage of VM(x, y). Advantageously, the CPU supply voltage, VOUT, can be well regulated in a broad range even under a fixed conversion ratio of SCVR. In addition, adjusting the intermediate voltage VMcan cause the SCVR to operate at more efficient or substantially optimally efficient discrete voltage conversion ratios of n/m. Advantageously, some embodiments of the invention may overcome the problem of SCVR power loss under fine grain voltage regulation.

With reference toFIG. 7-9, in accordance with some embodiments of the invention, an electronic system may include a mixed signal integrated circuit (MSIC) including a buck VR as a first stage of a cascaded voltage regulator arrangement. A second stage of the cascaded VR may include two or more SCVRs having different conversion ratio constants (e.g. corresponding to the two solid lines inFIG. 8). In addition to selecting a desired VMas an input to the SCVR, the control interface can also select a desired conversion ratio for the SCVR based on CPU needs. For the 1st stage of the cascade VR (e.g. the buck converter), the power efficiency is not impacted directly, at least in the first order, by its output voltage (or VM) under a normal range of CPU applications (e.g. corresponding to the substantially horizontal dashed line inFIG. 9, labeled First Stage). For example, commercially available buck VRs can be 85%±2% efficient within a specified voltage regulation range of 3V˜1V.

By adjusting the conversion ratio and/or intermediate voltages, an optimal or relatively high efficiency voltage point can be selected for the second stage (e.g. corresponding to the multiple curved dashed lines inFIG. 9, labeled Second Stage). Therefore, an overall combined power efficiency of the cascaded Buck VR and SCVR may be maintained at a relative high level regardless at any regulated output voltage (e.g. corresponding to the solid line inFIG. 9). Advantageously, some embodiments of the invention may provide fine grain voltage regulation and high efficiency of power delivery at any regulated voltage by tuning the intermediate voltage and/or properties of the VRs on-the-fly according to CPU requirements.

The foregoing and other aspects of the invention are achieved individually and in combination. The invention should not be construed as requiring two or more of such aspects unless expressly required by a particular claim. Moreover, while the invention has been described in connection with what is presently considered to be the preferred examples, it is to be understood that the invention is not limited to the disclosed examples, but on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and the scope of the invention.