Frequency compensation scheme for stabilizing the LDO using external NPN in HV domain

A voltage regulator may comprise a regulator output configured to provide a regulated voltage, which may be controlled by an error amplifier based on the regulated voltage and a reference voltage. The error amplifier may control a source-follower stage to mirror a multiple of the current flowing in the source-follower stage into an internal pass device. A voltage developed by the mirror current may control an external pass device configured to deliver the load current into the regulator output. A first resistor may be configured to decouple a load capacitor coupled between the regulator output and reference ground, when the load current is below a specified value. A second resistor may be configured to create a bias current in the internal pass device even when the external pass device is close to cut-off region. A third resistor may be configured to counter the effects of negative impedance at the control terminal of the external pass device caused by the current-gain of the external pass device. A compensation capacitor and resistor may be coupled in series between the output of the error amplifier and the output of the voltage regulator to provide frequency compensation for the Miller-Effect.

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates generally to the field of semiconductor circuit design, and more particularly to the design of improved power regulators.

2. Description of the Related Art

Many electronic power supplies feature voltage regulators, or regulator circuits, designed to automatically maintain a constant output voltage level to effectively provide a steady voltage to the electronic circuit to which power is being supplied, typically referred to as the load. More particularly, the object of a voltage regulator circuit is to maintain a steady output voltage regardless of current drawn by the load. Most present day voltage regulators operate by comparing the actual output voltage to a fixed—typically internal—reference voltage. The difference between the actual output voltage and reference voltage is amplified, and used for controlling a regulation element, to form a negative feedback servo control loop. The regulation element is typically configured to produce a higher voltage when the output voltage is too low, and in case of some regulators, to produce a lower voltage when the output voltage is too high. In many cases, the regulation element may be configured to simply stop sourcing current, and depend on the current drawn by the driven load to pull down the regulator output voltage. The control loop has to be carefully designed to produce the desired tradeoff between stability and speed of response.

The operation of power supplies is typically affected by variations on the input voltage (or power supply) line that provides the voltage based on which the regulated output voltage is generated. Any signal or noise (including transients, which may reach very high levels relative to the level of the desired output voltage) on the supply line may couple into, and may be amplified by the active circuitry, thereby degrading the performance of the power supply. Therefore, in addition to design considerations related to stability and speed of response, power supplies are also typically designed to achieve a desired power supply rejection ratio (PSRR), which is indicative of the amount of noise (on the supply line) that the power regulator is capable of rejecting. Various systems may specify different power supply rejection requirements.

Another important measure of the effectiveness of a voltage regulator circuit is its ability to quickly stabilize when responding to a demand for high current. For example, when the demand for current to be supplied by the voltage regulator suddenly changes, an ideal voltage regulator should be able to meet the demand for increased current while maintaining its desired output voltage Vout. However, this may not always be practical for a given voltage regulator circuit and a given load. For example, in many cases an external pass-device, typically a pass-transistor is used to ensure sufficient load current for high-voltage applications. As the load current quickly rises from no current to maximum load current, the voltage regulator may become unstable. Many present day implementations use a large internal pass transistor, and/or large current load at the output of the regulator to help stabilize the voltage regulator. However, system requirements oftentimes prevent the use of these devices, and other solutions might be preferable, or even required.

Many other problems and disadvantages of the prior art will become apparent to one skilled in the art after comparing such prior art with the present invention as described herein.

SUMMARY OF THE INVENTION

In one set of embodiments, a voltage regulator may comprise a regulator output configured to provide a regulated voltage, built around an error amplifier powered by a supply voltage and having a first input configured to receive a reference signal. A source-follower stage may be controlled by the output of the error amplifier to mirror a multiple of the current flowing in the source-follower stage into an internal pass device. A voltage developed by the mirror current (which is a multiple of the current flowing in the source-follower stage) may be used to control an external pass device configured to deliver the load current to the regulator output. A first resistor may be configured to decouple a load capacitor coupled between the regulator output and reference ground, when the load current is below a specified value, such as when the load current initially begins to rise (from a zero value, for example). A second resistor may be configured to create a bias current in the internal pass device even when the external pass device is close to cut-off region (i.e. it is not providing a load current into the regulator output. In one set of embodiments, a third resistor may be configured to counter the effects of negative impedance at the control terminal of the external pass device caused by the current-gain of the external pass device.

Other aspects of the present invention will become apparent with reference to the drawings and detailed description of the drawings that follow.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

As used herein, the term “nominal value” is used to denote an expected, stable value. For example, the nominal value of a first supply voltage is used to denote the final, stable value reached by the first supply voltage. While the term “nominal” typically refers to a specified theoretical value from which an actual value may deviate ever so slightly, in order to simplify references to certain voltage values detailed herein, “nominal value” is used to refer to the final, expected stable value reached by a supply voltage. For example, as used herein, when a supply voltage has a nominal value of 3.3V, it means that the supply voltage is configured to settle and reside at a value of 3.3V. Of course, the actual value of the supply voltage may deviate ever so slightly from this value, and the term “nominal value” is meant to account for such deviations. Furthermore, as referenced herein, a “low load current” is expected to be in the range of a few μA (microamps), while a “high load current” is expected to be in the range of a few mA (milliamps).

Also, as used herein, a first signal “tracking” or “following” a second signal, or the value of the first signal “tracking” or “following” the value of the second signal denotes that the first signal changes as the second signal changes. In other words, if the second signal rises at a first rate, the first signal also rises at the first rate. Similarly, if the second voltage changes from 1V to 2V, the first signal also changes from 1V to 2V, and so on. Thus, a first signal tracking (or following) a second signal is meant to denote that the first signal is configured to have a value that is the same as the value of the second signal, and furthermore to change in the same manner as the second signal changes.

Various embodiments of circuits presented herein comprise a resistor or resistors. Those skilled in the art will appreciate that resistors in integrated circuit may be obtained in a variety of different ways, and that the resistors disclosed herein are meant to represent circuit elements whose electrical characteristics would match the electrical characteristics of resistors as configured in the disclosed embodiments. In other words, there may be embodiments where one or more transistor devices are configured to behave in a manner commensurate with the behavior of a resistor or resistors, and the resistors disclosed herein are meant to embody all components and/or circuit elements that may be configured as resistors. Similarly, any reference to “diodes” is meant to encompass all components and/or circuit elements that may be configured as diodes. For example, a “diode-connected transistor” may be used interchangeably with a “diode”.

References are made herein to “channels” of transistors. While the structure of a (Metal-Oxide Semiconductor Field Effect Transistors) MOSFET comprises an identifiable channel that is well known to those skilled in the art, bipolar devices (also referred to as bipolar junction devices or bipolar junction transistors—BJT) may oftentimes be swapped with MOSFET devices in certain circuit configurations to obtain similar or identical operating characteristics in those circuits. While the structure of a bipolar device might not comprise an identifiable “channel” exactly like a MOSFET (or FET) device, for the sake of simplicity, a conductive or operational path established between the collector and emitter of a bipolar device (or BJT) is also referenced herein as the “channel” of that device. In other words, when referencing the “channel” of a given transistor, the word “channel” may equally refer to the operational (or conductive) path established between the drain and the source of the transistor device if the device is a MOSFET (FET), or between the collector and the emitter of the transistor device if the device is a bipolar device (e.g. BJT).

As also used herein, a “ratio” of a current mirror device refers to a ratio between the current conducted by the input branch of the current mirror and the current conducted by the output, or mirror branch of the current mirror. Thus, a current mirror having a “very high” ratio may indicate that the ratio of the input current vs. the mirrored current may be in the range of 1:1000. Furthermore, the “size” of a transistor or transistor device may refer to the channel width to channel length ratio (W/L) of the transistor device. Those skilled in the art will also appreciate that the value of an equivalent mirror current, that is, the mirror current for a current mirror having a ratio of 1, may typically be within 1% of the value of the mirrored current, and that various techniques may be employed to minimize or eliminate mismatch errors between the transistor devices comprised in the current mirror. Such mismatch errors may be present due to fabrication process variations, for example, and may be remedied using well known methods in the art, e.g. dynamic element matching (DEM).

FIG. 1is a schematic diagram of one embodiment of a voltage regulator circuit100configured to provide load current for high-voltage applications, according to prior art. In the embodiment shown, an input supply voltage VDDis provided to operational amplifier104. The voltage regulator circuit provides an output voltage from the terminal of transistor120coupled to node131, which would typically be the emitter of an external NPN transistor, in this case a bipolar junction device, or transistor (BJT), also powered by VDD. The current through transistor120is controlled via a feedback path from VOUT122to the inverting input of amplifier104. Amplifier is an error amplifier, used in the circuit to indicate an error between a reference voltage Vref102, which is provided to the non-inverting terminal of amplifier104, and the voltage at the output122. Operational amplifier104is configured to provide an output signal that is proportional to the difference between the reference voltage Vrefand the output voltage VOUT. External transistor120may be used to handle larger currents, to reduce the size requirements on internal pass device112. In other words, by configuring external pass device120, as shown, internal pass transistor112may be relatively small. Regulator100may be configured on-chip, as part of an integrated circuit (IC), with nodes130and131corresponding to pins configured to couple to external components. More specifically, node130may be configured to couple to an external transistor120to provide the load current for high-voltage applications, and node131may be configured to provide the regulated output voltage VOUT122. The load to be powered by regulator100may thus be coupled to the output node131.

In order to protect voltage regulator100while providing the necessary current to the load, the output of amplifier104may be used to control PMOS device108configured in a current branch conducting a current having a limited magnitude as determined by current limiter110. This current branch may be configured as a source-follower stage as shown inFIG. 1. A current mirror comprising PMOS devices106and112is configured to mirror a multiple of the current flowing in PMOS device106to PMOS device112(i.e., to the drain of PMOS device112). A bias current source116is provided to control the current flowing into output node131, and diode devices114(which may be diode-connected transistors) are provided to clamp the voltage at output node131, as protective measures. The ratio of the current mirror comprising PMOS devices106and112may be 1:M as indicated inFIG. 1, to obtain a mirror current at the drain of PMOS device112, with the mirror current having a magnitude that is M times the magnitude of the current flowing through PMOS transistor106. Capacitor CL126is an output capacitor, with resistor124indicating the equivalent series resistance of capacitor126. Finally, the impedance from the emitter to the base of external transistor120appears as a negative impedance at the base of the external transistor120, caused by the β (current-gain) of external transistor120. A resistor R1118may be used to counter the effects of this negative impedance, with the value of resistor118determined by the β (current-gain) of external transistor120.

One disadvantage of regulator100is that it may become unstable when the load current flowing into node131varies from zero to a maximum possible load current. During such a fast current increase, the poles and zeros of regulator100may vary not only based on the quickly varying load current, but also based on the region of operation of external transistor120. One way to compensate for this may be the use of a large internal pass transistor112and elimination of external pass transistor120, (i.e. making transistor112relatively large), and/or placing a large current load at output122(output node131) of voltage regulator100to help stabilize voltage regulator100. However, the use of these techniques may not always be possible. For example, use of a large current load may not provide a good solution as it may violate the current specification of the IC (on which voltage regulator100may be configured), which may be on the order of few tens of μA's (micro-Amperes) in deep sleep mode. In addition, configuring internal pass transistor112to be large enough to obviate the need for external transistor120may also not be an option, since high-voltage transistors don't have the same drive strength as low-voltage transistors, causing the die area required for a sufficiently large pass transistor112to be extremely large on a chip where die size may be limited.

Referring again to voltage regulator100, as transistor120begins to turn on, its region of operation changes from being close to cutoff to entering the linear (active) region, thereby creating left-half-plane (LHP) poles (considering the system response of regulator100), hence making the system unstable.FIG. 2shows a small-signal circuit model200for the system that includes voltage regulator100shown inFIG. 1. The small signal circuit includes a representation of the transconductance202and equivalent output resistance204and output capacitance206of the differential stage (comprising amplifier104), as well as a representation of the transconductance208and equivalent output resistance210of the intermediate source-follower stage (comprising PMOS devices106and108). Transistor device112(labeled “PASS DEVICE112” inFIG. 2) is represented by its gate-source capacitance212, and equivalent current source214(a product of gmpand the gate source voltage Vgsof transistor112). The resistance seen at the drain of transistor112is represented by resistor216. Finally, external transistor device120(labeled “PASS DEVICE120” inFIG. 2) is represented by equivalent current source224and the equivalent resistance220seen at the emitter of transistor device120, with the magnitude of the current provided by current source224being the product of gmnand voltage V1, which corresponds to the voltage across equivalent resistance220. A load coupled to node131(VOUT122) is represented by load resistor222.

In the small-signal AC analysis of the small-signal circuit200ofFIG. 2, the output capacitor CL(126) and the output impedance (using the corresponding output transconductance value gmn) of external transistor device120may determine the dominant pole of the system, given by P1in the first equation below. The other two poles and the zero of the system are given in the subsequent equations shown below. From the small-signal model, the pole due to external transistor120may be given by:

P1=gmn2⁢⁢π⁢⁢CL.
The pole due to pass transistor112may be given by:

P2=12⁢⁢π⁢⁢Ro⁢-⁢pass·CL.
The pole due to the output of error amplifier104may be given by:

P3=12⁢⁢π⁢⁢Ro⁢⁢2·Cgs.
The zero created by the equivalent series resistance (ESR) of output capacitor126may be given by:

The poles at the output of error amplifier104and pass transistor112may create an unstable system with a total of three poles (P1through P3as expressed in the equations above), each of which may cause a 90° deterioration in phase margin, which may result in the system becoming unstable. All three poles described above may be very low frequency poles as a result of the high voltage devices having very high impedance, and regulator100utilizing very low current. The overall quiescent current of regulator100in this application may be about 7.5 μA.

FIG. 3shows one embodiment of a frequency compensation technique that may be implemented in regulator circuit100. In one set of embodiments, frequency compensation, and thus stabilization of regulator100, may be performed by adding four components, resistors306,308and302, and capacitor304as shown. Resistor R3may be used to decouple external capacitor126from node132, which is coupled to the inverting input of error amplifier104, during a no-ILoadcondition when only a small bias current is available. When the load-current (ILoad) is low, there may be two paths for the current to flow, as shownFIG. 4(paths402). The external transistor device120may have very little current flowing through it, as most of the current may flow through resistor R2306as shown. The pole due to the external transistor device120may therefore be decoupled during this period, with most of the current flowing through resistor R2306. Since resistor R3328may be configured to decouple external capacitor CL126(as shown), the pole that would be created due to external capacitor CLmay thereby be isolated. Configuring resistor328as shown may therefore also create an additional LHP zero, increasing the stability of regulator100. As shown inFIG. 5, with an increasing load current ILoad, (for example, as a result of the load coupled to node131decreasing), most of the current may be flowing through external transistor120(current paths502), with very little current flowing through resistor R2306. The increasing load current ILoad(decreasing load resistance504) may result in most of the current flowing through external pass device120, which in turn may result in resistor R3328becoming a part of the feedback network.

A simplified small-signal model of the frequency compensated voltage regulator300ofFIG. 3is shown inFIG. 6. Since resistor R3308may be configured to decouple external capacitor CL126, the pole that would be created due to capacitor126may be isolated under a no-load-current (no ILoad) condition. An additional LHP zero may thereby also be created, aiding in providing better stability to the voltage regulator300under no ILoadconditions. Thus, the pole created by external pass device120may be given by:

P1=gmn2⁢⁢π⁢⁢CL,
and the zero created by decoupling resistor328under a no ILoadcondition (or low ILoadcondition; more generally when external pass device120is not operating in the active region), may be given by:

Z2=12⁢⁢π⁢⁢R3·CL.
As can be seen from the above expressions, as the load current increases, the transconductance (gmn) of external transistor device120may increase, capacitor CL126may no longer be decoupled, and the pole due to external pass transistor120may be pushed to a higher frequency as the transconductance is proportional to current (gmn∝I). In addition, the zero Z2may move to higher frequencies as the load current ILoadincreases.

As the load current ILoadincreases, pole P2may increase at a faster rate, (Ro-pass216decreases linearly with increasing current, 1/λI, where λ is the channel-length modulation parameter of MOS devices), than the rate at which the gain of the system (gmp) decreases. Therefore, a desired (optimal) behavior of voltage regulator300may be obtained by choosing the capacitor with the right ESR. The type and value of capacitor126may therefore determine the location of poles P1and P2, and zero Z1. Pole2may be expressed as:

P2=12⁢⁢π⁢⁢Ro⁢-⁢pass·CL,
and zero1may be expressed as:

A compensation capacitance CC304shown inFIG. 6may be bi-directional. In other words, both feedback and feed-forward currents may flow through capacitor304at the same time. The feedback current may be the Miller-effect current flowing from the output to the input, between two nodes which are opposite in phase. The feed-forward current from amplifier104may flow through capacitor Cc304, which may result in a small output signal that is in phase with the input. This is the current that may cause the zero. It may be a right-hand-plane (RHP) zero because it provides an output signal, which may be opposite in phase compared with the amplified output signal. To cancel the effect of the RHP zero, a resistor RC302may be used, whose value may be greater than 1/gm of MOS pass device112.

The regulator output voltage VOUTwith the addition of resistors118,306, and328may then be expressed by:

Vout=Vout_in·R2R2+R3,
where R2may be much larger than R3in order to avoid a large offset in the output voltage.

Referring again toFIG. 3, the operation of voltage regulator300may be summarized as follows. A first resistor R3308may be configured to decouple load capacitor CL126from node132when there is no load current, or more generally, when the load current ILoadis small/low, or is below a specified value, as external pass transistor120starts to turn on and enter the active (linear) operating region. A second resistor, resistor R2306may be configured to couple the output at node130to the output at node132, to create a bias current through internal pass transistor device112even when external transistor120is close to the cut-off region. A third resistor, resistor R1may be configured between the drain terminal of internal pass transistor112and output node130to counter the effects of negative impedance at the base of external transistor120caused by the β (Current-gain) of external transistor120. A compensation capacitance316to conduct a feedback current (resulting from the Miller-Effect) may be configured between the inverting input and the output of error amplifier104. In order to cancel the effect of an output signal opposite in phase to the amplified output signal (resulting from a feed-forward current also flowing in capacitor316), a fourth resistor302—having a value greater than the transimpedance of pass transistor112—may be configured between the output of error amplifier104and capacitor316.

It should be noted again that voltage regulator300may also be operated without external transistor120, depending on the expected magnitude of the load current to be provided into node131. Depending on its size, internal pass transistor112may be capable of delivering a certain amount of load current, as long as a path exists through pass transistor112into node131to a load coupled to node131(such as load504shown inFIG. 5, for example). For example, the size of pass transistor112may be large enough for delivering a few hundred μA of current. In that case, without external transistor120, current may flow through internal pass transistor112, through resistors118,306, and308, into node131and into a load coupled to node131. While the necessary path for a current to flow from internal transistor112to node131may be established without resistor118and resistor308, as long as node131is conductively coupled to the drain of transistor112, an added advantage of various embodiments that include resistors118,306, and308is that they may equally be used without external transistor120, while also providing the added benefits as disclosed herein when operated with external transistor120.

Although the embodiments above have been described in considerable detail, other versions are possible. Numerous variations and modifications will become apparent to those skilled in the art once the above disclosure is fully appreciated. It is intended that the following claims be interpreted to embrace all such variations and modifications. Note the section headings used herein are for organizational purposes only and are not meant to limit the description provided herein or the claims attached hereto.