Schottky contact

The present disclosure relates to a Schottky contact for a semiconductor device. The semiconductor device has a body formed from one or more epitaxial layers, which reside over a substrate. The Schottky contact may include a Schottky layer, a first diffusion barrier layer, and a third layer. The Schottky layer is formed of a first metal and is provided over at least a portion of a first surface of the body. The first diffusion barrier layer is formed of a silicide of the first metal and is provided over the Schottky layer. The third layer is formed of a second metal and is provided over the first diffusion barrier layer. In one embodiment, the first metal is nickel, and as such, the silicide is nickel silicide. Various other layers may be provided between or above the Schottky layer, the first diffusion barrier layer, and the third layer.

FIELD OF THE DISCLOSURE

The present disclosure relates to contacts for semiconductor devices, and in particular to Schottky contacts.

BACKGROUND

Semiconductor devices, such as high electron mobility transistors (HEMTs), Schottky diodes, metal semiconductor field effect transistors (MESFETS) and the like employ a Schottky contact. Schottky contacts are generally metal contacts that are formed on a semiconductor material to create a metal-semiconductor junction that tends to provide a rectifying effect due to an inherent potential barrier that is formed at the metal-semiconductor junction.

A Schottky contact may be created by forming one or more layers on the surface of a semiconductor body where the Schottky contact is desired. For example, a Schottky gate contact for a HEMT maybe formed on the semiconductor body and between corresponding source and drain contacts. If the semiconductor material on which the HEMT's Schottky gate contact is formed includes aluminum gallium nitride (AlGaN), two common metals that are often used in a Schottky gate contact for a HEMT are nickel (Ni) and gold (Au). A Ni layer may be formed over the semiconductor body, and an Au layer may be formed over the Ni layer. Notably, other layers may be provided between the Ni and Au layers.

The Ni layer is formed over the AlGaN to form the lower Schottky layer of the Schottky gate contact. Ni is often used with AlGaN due to the relatively high barrier height provided between these two materials. The upper Au layer is formed at or near the top of the Schottky gate contact to form a contact layer. Use of Au for the contact layer helps to minimize resistance associated with the Schottky gate contact.

Unfortunately, when Ni and Au are used in the different layers of a Schottky gate contact, the Ni in the Schottky layer tends to diffuse into the Au of the contact layer, and the Au of the contact layer tends to diffuse into the Ni of the Schottky layer at elevated fabrication and operational temperatures. As such, the Ni and Au in the Schottky gate contact mix with each other. These issues are not limited to Ni and Au. For example, Aluminum (Al) is often used as an alternative to Au for the contact layer, and Al readily mixes with Ni.

When the various metals in the Schottky gate contact mix with one another, the performance of the Schottky gate contact, and thus the HEMT as a whole, is often significantly degraded. For example, the leakage currents of the Schottky gate contact may significantly increase to unacceptable levels. Similar issues arise in other devices, such as Schottky diodes and MESFETs, which employ Schottky contacts, and in devices that are fabricated using other material systems.

Accordingly, there is a need for an improved Schottky contact that substantially prevents, or at least significantly reduces, the extent to which metals from the different layers mix with one another during fabrication and operation.

SUMMARY

The present disclosure relates to a Schottky contact for a semiconductor device. The semiconductor device has a body formed from one or more epitaxial layers, which reside over a substrate. The Schottky contact may include a Schottky layer, a first diffusion barrier layer, and a third layer. The Schottky layer is formed of a first metal and is provided over at least a portion of a first surface of the body. The first diffusion barrier layer is formed of a silicide of the first metal and is provided over the Schottky layer. The third layer is formed of a second metal and is provided over the first diffusion barrier layer. In one embodiment, the first metal is nickel, and as such, the silicide is nickel silicide. Various other layers may be provided between or above the Schottky layer, the first diffusion barrier layer, and the third layer.

One technique for fabricating the Schottky contact involves initially forming the Schottky contact to have a Schottky layer precursor formed of a first metal and a first diffusion barrier layer precursor formed of silicon. The Schottky layer is formed over a portion of the first surface, and the first diffusion barrier layer precursor is formed over the Schottky layer precursor. An annealing process is employed to form the first diffusion barrier layer from the first diffusion barrier layer precursor. The annealing process involves heating the Schottky contact such that the silicon of the first diffusion barrier layer precursor and the first metal of the Schottky layer react with one another, wherein the silicon of the first precursor layer is substantially, if not completely, consumed. The remaining portion of the Schottky layer precursor forms the Schottky layer. In one embodiment, the first diffusion barrier layer precursor is completely consumed during the annealing process.

DETAILED DESCRIPTION

The present disclosure relates to a Schottky contact for a semiconductor device. The semiconductor device has a body formed from one or more epitaxial layers, which reside over a substrate. The Schottky contact may include a Schottky layer, a first diffusion barrier layer, and a third layer. The Schottky layer is formed of a first metal and is provided over at least a portion of a first surface of the body. The first diffusion barrier layer is formed of a silicide of the first metal and is provided over the Schottky layer. The third layer is formed of a second metal and is provided over the first diffusion barrier layer. In one embodiment, the first metal is nickel, and as such, the silicide is nickel silicide. Various layer other layers may be provided between or above the Schottky layer, the first diffusion barrier layer, and the third layer.

One technique for fabricating the Schottky contact involves initially forming the Schottky contact to have a Schottky layer precursor formed of a first metal and a first diffusion barrier layer precursor formed of silicon. The Schottky layer is formed over a portion of the first surface, and the first diffusion barrier layer precursor is formed over the Schottky layer precursor. An annealing process is employed to form the first diffusion barrier layer from the first diffusion barrier layer precursor. The annealing process involves heating the Schottky contact such that the silicon of the first diffusion barrier layer precursor and the first metal of the Schottky layer react with one another, wherein the silicon of the first diffusion barrier layer precursor layer is substantially, if not completely, consumed. The remaining portion of the Schottky layer precursor forms the Schottky layer. In one embodiment, the first diffusion barrier layer precursor is completely consumed during the annealing process.

Prior to delving into the details of the Schottky contact of the present disclosure and an exemplary technique for fabricating the same, an overview of an exemplary high electron mobility transistor (HEMT)10on which the Schottky contact may be employed is provided in association withFIG. 1. In the illustrated example, the HEMT described is a Gallium Nitride (GaN) based device that is formed on substrate12formed of Silicon Carbide (SiC). Those skilled in the art will recognize the applicability to the concepts of the present disclosure for various devices, including Schottky diodes, metal semiconductor field effect devices (MESFETs), and the like, using various material systems.

In the illustrated example, the substrate12is a semi-insulating substrate formed of a 4H polytype of SiC. Optional SiC polytypes include 3C, 6H, and 15R polytypes. The term “semi-insulating” is used in a relative rather than absolute sense. Alternative materials for the substrate12may include sapphire, aluminum nitride (AlN), aluminum gallium nitride (AlGaN), gallium nitride (GaN), silicon (Si), gallium arsenide (GaAs), zinc oxide (ZnO), and indium phosphide (InP). The substrate12is generally between 300 micrometers and 500 micrometers□ thick.

A nucleation layer14may be formed over the substrate12to provide an appropriate crystal structure transition between the SiC of the substrate12and the various epitaxial layers that are to be formed over the substrate12. The nucleation layer14may be a single layer or a series of layers. The nucleation layer14is generally between 300 micrometers and 500 micrometers thick.

A channel layer16is formed over the nucleation layer14with one or more epitaxial layers. For this example, the channel layer16is a Group III-nitride, such as GaN or AlXGa1-XN, where 0≦X<1. In other embodiments, the channel layer16may be indium gallium nitride (InGaN), aluminum indium gallium nitride (AlInGaN) or the like. The channel layer16may be undoped, or at least unintentionally doped, and may be grown to a thickness of greater than about 20 Angstroms. In certain embodiments, the channel layer16may employ a multilayer structure, such as a superlattice or alternating layers of different Group III-nitrides, such as GaN, AlGaN or the like.

A barrier layer18is formed on the channel layer16. The barrier layer18may have a bandgap that is greater than the bandgap of the underlying channel layer16. Further, the barrier layer18may have a smaller electron affinity than the channel layer16. In this illustrated embodiment, the barrier layer18is AlGaN; however, the barrier layer18may include AlGaN, AlInGaN, AlN or various combinations of these layers.

The barrier layer18is generally between 20 Angstroms and 400 Angstroms thick; however, the barrier layer18should not be so thick as to cause cracking or substantial defect formation therein. The barrier layer18may be either undoped, or at least unintentionally doped, or doped with an n-type dopant to a concentration less than about 1×1019cm−3.

As shown inFIG. 1, a dielectric layer20is formed on the barrier layer18and is etched using known etching techniques to the shape shown. The dielectric layer20may include silicon nitride (SiN), silicon dioxide (SiO2), aluminum silicon nitride (AlSiN), silicon oxynitride (SiON), or the like. It will be understood that the terms “SixNy,” “SiN,” and “silicon nitride” are used herein interchangeably to refer to both stoichiometric and non-stoichiometric silicon nitride.

Other materials may also be used for the dielectric layer20. For example, the dielectric layer20could also include magnesium oxide, scandium oxide, aluminum oxide and/or aluminum oxynitride. Furthermore, the dielectric layer20may be a single layer or may include multiple layers of uniform or nonuniform composition. The material of the dielectric layer20should be capable of withstanding relatively high temperatures, and should allow at least a portion to be removed without significantly damaging the underlying barrier layer18.

In general, the dielectric layer20may provide a relatively high breakdown field strength and a relatively low interface trap density at the interface with an underlying Group III-nitride layer such as the barrier layer18. The dielectric layer20may have a high etch selectivity with respect to the material of the barrier layer18, and may not be reactive to the material of the barrier layer18. Moreover, the dielectric layer20may have a relatively low level of impurities therein. For example, the dielectric layer20may have a relatively low level of hydrogen and other impurities, including oxygen, carbon, fluorine and chlorine. The dielectric layer20is generally between 800 Angstroms and 2000 Angstroms thick.

As illustrated, the dielectric layer20is etched to expose surface portions22A,22B, and22C of the barrier layer18. The area beneath the surface portion22A corresponds to the drain region, and the area beneath the surface portion22B corresponds to the source region. The areas beneath the surface portions22A and22B, which correspond to the drain and source regions, are subjected to a “shallow implant” to form respective shallow implant regions24, which are shown with hashing. The shallow implant regions24extend through barrier layer18and at least partially into the channel layer16. As such, the ions for the doping material come to rest in both the barrier layer18and at least the upper portion of the channel layer16beneath the surface portions22A and22B.

As used herein, the term “shallow implant” means that the implants are made directly into the barrier layer with no substantive capping or protection layer over the surface portions22A,22B of the barrier layer18during implantation. The implanted ions of the doping material may be implanted such that the peak of the implant profile is located just below the interface between the channel layer16and the barrier layer18where a two-dimensional electron gas (2-DEG) plane is formed during operation and in which electron conductivity is modulated. While the doping concentrations may vary based on desired performance parameters, first exemplary doping conditions may provide implant regions24with a peak doping concentration of 1×1018 cm-3 or greater and a straggle of 50 nm or less. For example, in some embodiments, the dose and energy of the implants may be selected to provide a peak doping concentration of about 5×1019 cm-3 and a straggle of about 30 nm. In order to form n-type implant regions24in a nitride based barrier layer18, the implanted ions may include silicon ions, sulfur ions, oxygen ions, or a combination thereof.

On the surface portion22A, a drain contact26is formed. The drain contact26is an ohmic contact that cooperates with the implant region24residing beneath the surface portion22A to provide a low resistance connection to the drain region of the HEMT10. Similarly, on the surface portion22B, a source contact28is formed. The source contact28is an ohmic contact that cooperates with the implant region24residing beneath the surface portion22B to provide a low resistance connection to the source region of the HEMT10. The source and drain regions connect with the opposite sides of the 2-DEG plane, which is just below the junction of the channel layer16and barrier layer18. Exemplary configurations for the drain contact26and the source contact28are provided further below.

As noted above, the dielectric layer20is also etched to expose the surface portion22C of the barrier layer18. The surface portion22C resides between the surface portions22A and22B and corresponds to a gate region of the HEMT10. A Schottky gate contact30is formed with one or more metallic layers over the surface portion22C of the barrier layer18. As illustrated, a portion of the Schottky gate contact30may be formed directly on the barrier layer18, which itself may be formed from multiple epitaxial layers. Typically, an opening is etched through the dielectric layer20to expose the surface portion22C. As illustrated, the Schottky gate contact30may have a portion that resides within the opening in contact with the surface portion22C as well as portions that reside along the sidewalls of the opening and on an upper surface of the dielectric layer20on either side of the opening. The portions of the Schottky gate contact30that reside on the upper surface of the dielectric layer20on either side of the opening form field plates32. The field plates32reduce the negative impact of nearby electromagnetic fields on the gate of the HEMT10.

With reference toFIGS. 2 and 3, an exemplary process for forming the Schottky gate contact30is described.FIG. 2illustrates the structure of a Schottky gate contact precursor30P, which is annealed as described below to form the actual structure of the Schottky gate contact30, which is illustrated inFIG. 3. The particular process for forming and the actual structures of the illustrated Schottky gate contact precursor30P and Schottky gate contact30are merely exemplary and should be considered non-limiting.

A process for forming the Schottky gate contact precursor30P is described in association withFIG. 2. Assume that the dielectric layer20has already been formed, and the hole that exposes the surface portion22C of the barrier layer18has been etched through the dielectric layer20. Initially, a Schottky layer precursor34P is formed over the upper surfaces of the dielectric layer20, the side walls of the hole formed in the dielectric layer20, and the surface portion22C of the barrier layer18. In this embodiment, the Schottky layer precursor34P is formed from nickel (Ni) using known evaporation techniques.

Next, a first diffusion barrier layer precursor36P is formed over the Schottky layer precursor34P. In this embodiment, the first diffusion barrier layer precursor36P is formed from silicon (Si) using known evaporation techniques. A second diffusion barrier layer38is formed over the first diffusion barrier layer precursor36P. In this embodiment, the second diffusion barrier layer38is formed from titanium (Ti) using known evaporative techniques. A third diffusion barrier layer40is formed over the second diffusion barrier layer38. In this embodiment, the third diffusion barrier layer40is formed from platinum using known evaporative techniques. A contact layer42is formed over the third diffusion barrier layer40. In this embodiment, the contact layer42is formed from gold (Au) or aluminum (Al) using known evaporative techniques. Finally, a protection layer44is formed over the contact layer42using known evaporative techniques. In this embodiment, the protection layer44is formed from Ti. While evaporative techniques are described for applying the various layers of the Schottky gate contact precursor30P, known sputtering or like deposition techniques may be used as an alternative.

While the thicknesses of the various layers of the Schottky gate contact precursor30P may vary, the following thicknesses are provided merely for reference and should not be considered to limit the scope of the disclosure. The thickness of the Schottky layer precursor34P may range from 120 Angstroms to 600 Angstroms. The thickness of the first diffusion barrier layer precursor36P may range from 80 Angstroms to 650 Angstroms. The thickness of the second diffusion barrier layer38may range from 50 Angstroms to 300 Angstroms. The thickness of the third diffusion barrier layer40may range from 50 Angstroms to 300 Angstroms. The thickness of the contact layer42may range from 1000 Angstroms to 10000 Angstroms, and the thickness of the protection layer44may range from 50 Angstroms to 200 Angstroms.

After the protection layer44is formed, the HEMT10is subjected to a thermal annealing process. Notably, the thicknesses of the Schottky layer precursor34P and the first diffusion barrier layer precursor36P are selected such that in a subsequent annealing process, which is described in detail further below, the Ni and Si of these respective layers react with one another to form a Schottky layer34formed of Ni and a first diffusion barrier layer36formed of nickel silicide (NiXSi), as shown inFIG. 3. In this embodiment, the Si of the first diffusion barrier layer precursor36P is substantially completely consumed by the reaction caused by the annealing process, such that the first diffusion barrier layer precursor36P that is formed from Si is essentially no longer present. Although the Si is consumed during the reaction, not all of the Ni of the Schottky layer precursor34P is consumed. As such, the remaining Ni effectively forms a Schottky layer34of Ni.

In certain embodiments, the thickness of the Ni for the Schottky layer precursor34P is greater than or equal to about 0.54 times the thickness of the Si for the first diffusion barrier layer precursor36P. While the various layers illustrated in the figures are not drawn to scale, the thickness of the Ni for the Schottky layer precursor34P is about 0.6 times the thickness of the Si for the first diffusion barrier layer precursor36P in the illustrated embodiment.

For the HEMT10, Ni is a desired material for the Schottky layer34, especially when the barrier layer is formed from AlGaN, because Ni has a high barrier height with AlGaN. Notably, Ni may readily diffuse into, and thus mix with, certain other metals in the absence of an appropriate diffusion barrier. For example, Ni readily mixes with Au and Al. When formed with NiXSi, the first diffusion barrier layer36has proven to be an excellent diffusion barrier that substantially prevents Ni from the Schottky layer34from mixing with the Au or Al of the contact layer42or with the Pt of the third diffusion barrier layer40.

The Ti of the second diffusion barrier layer38substantially prevents mixing of the Au or Al of the contact layer42or the Pt of the third diffusion barrier layer40with the NiXSi of the first diffusion barrier layer36. At lower annealing temperatures, such as those below 400 Celsius, Ti will not react with the NiXSi of the first diffusion barrier layer36. The Pt of the third diffusion barrier layer40substantially prevents mixing of the Ti of the second diffusion barrier layer38and the Au or Al of the contact layer42. The Au or Al of the contact layer42facilitates a low resistance path to the gate region of the HEMT10. The Ti of the protection layer44provides a protective coating over the Au or Al of the contact layer42, which is generally susceptible to damage or erosion during subsequent processing and operation of the HEMT10.

As indicated above, the annealing process may take place after each of the layers (34-44) of the Schottky gate contact is formed and etched to the shape illustrated inFIG. 3. In one embodiment, the annealing process is provided in a rapid thermal annealing (RTA) machine, which is commonly available in semiconductor fabrication facilities. In general, the annealing process involves heating the HEMT10at a desired temperature for a given period of time or heating the HEMT10to various temperatures according to a defined heating profile. Various annealing processes are acceptable. The following provides exemplary annealing processes.

For the first exemplary annealing process, the HEMT10is initially loaded into the RTA machine at room temperature. For the first step, the ambient temperature of the HEMT10is ramped to 250° C. over a one (1) minute period. After ramping the ambient temperature to 250° C., the ambient temperature is maintained at 250° C. for five (5) to ten (10) minutes for the second step. During this time some of the Ni from the Schottky layer34diffuses into the Si of the first diffusion barrier layer precursor36P (FIG. 2). After the second step, the ambient temperature is quickly raised to 350° C. to 400° C. over a 45 to 60 second period for the third step. The HEMT10is held at the ambient temperature of 350° C. to 400° C. for about two (2) minutes, for the fourth step. After the fourth step, the ambient temperature is rapidly dropped to 150° C. or less in 60 seconds or less, wherein the HEMT10is allowed to cool.

In an alternative process, the ambient temperature may be slowly ramped to a desired temperature and held for a desired period. For example, the ambient temperature may be ramped to 375° C. over a two (2) minute period, and held at 375° C. for two (2) to five (5) minutes before being cooled.

The annealing process is generally controlled to allow for the Si of the first diffusion barrier layer precursor36P to be substantially completely consumed by the reaction of the Si of the first diffusion barrier layer precursor36P with some of the Ni of the Schottky layer precursor34P to form the first diffusion barrier layer36of NiXSi. As such, the annealing temperature and the length of the annealing process should be sufficient to allow for the consumption of the Si of the first diffusion barrier layer precursor36P and the resultant formation of the NiXSi for the first diffusion barrier layer36. However, the annealing temperatures and the length of the annealing process should be limited to prevent or at least substantially minimize the diffusion of the Ti of the second diffusion barrier layer38into the NiXSi of the first diffusion barrier layer36. When Ti is used for the second diffusion barrier layer38and the first diffusion barrier layer36is NiXSi, the annealing temperatures are generally maintained below 400° C. throughout the annealing process to prevent, or at least substantially minimize, the diffusion of the Ti into the NiXSi.

The thickness of the Schottky layer34may range from 40 Angstroms to 300 Angstroms, and the thickness of the first diffusion barrier layer36may range from 100 Angstroms to 800 Angstroms. While Ni, Si, Ti, Pt, Au, and Ti are respectively used in the embodiment described above for the Schottky layer precursor34P, the first diffusion barrier layer precursor36P, the second diffusion barrier layer38, the third diffusion barrier layer40, the contact layer42, and the protection layer44, these layers are not limited to these materials. These materials have simply been found to work well in devices where the Schottky gate contact30or like Schottky contact is formed on group III-nitride material, such as AlGaN. As such, the resultant silicide for the first diffusion barrier layer36is a silicide of the material used for the Schottky layer precursor34P, and thus, the Schottky layer34. For example, the Schottky layer precursor34P could be formed from Platinum (Pt). As a result of annealing, the silicide of the first diffusion barrier layer36would be Platinum Silicide (PtSi). The second diffusion barrier layer38could be formed from Titanium (Ti) or Titanium Tungsten (TiW). The third diffusion barrier layer40could be formed from Platinum.

Exemplary structures for the drain contact26and the source contact28are shown inFIGS. 4 and 5, respectively. In this embodiment, the drain contact and the source contact28are formed on the respective surface portions22A and22B of the barrier layer18of the HEMT10. However, the additional layers may be provided between the barrier layer18and either of drain contact26and the source contact28. Further, the drain contact26and the source contact28may be recessed into the barrier layer18.

In the illustrated embodiment ofFIGS. 4 and 5, each of the drain contact26and the source contact28includes a first contact layer46, a second contact layer48over the first contact layer46, a third contact layer50over the second contact layer48, and a fourth contact layer52over the third contact layer50. Each of the contact layers (46,48,50,52) may be formed using evaporative, sputtering, or like deposition techniques. Further, one or more of these contact layers (46,48,50,52) may be formed at the same time and using the same material as corresponding layers of the Schottky gate contact30or Schottky gate contact precursor are being formed.

As illustrated, the first contact layer46is formed from Ti; however, alternative materials may be used. The second contact layer48is formed from Si; however, alternative materials may be used. The third contact layer50is formed from Ni; however, alternative materials may be used. The fourth contact layer52is formed from Pt; however, alternative materials may be used.

The structure used for the Schottky gate contact30ofFIG. 3can be applied to any type of semiconductor device that employs a Schottky contact. The devices include, but are not limited to SiC, MESFETs, and Schottky diodes, such as the Schottky diode54that is illustrated inFIG. 6. The Schottky diode54illustrated is a GaN-based, lateral Schottky diode that has an anode contact56that is formed in the same manner as the Schottky gate contact30described above in association with the HEMT10.

As illustrated, the Schottky diode54is formed on a SiC substrate58, wherein a GaN buffer layer60is formed over the substrate58, and an AlGaN barrier layer62is formed over the buffer layer60. Other layers, such as nucleation layers and the like, may be provided between the illustrated layers, as will be appreciated by those skilled in the art. A SiN dielectric layer64is formed over the barrier layer62.

The right side of the structure is etched to form an angled wall66that runs along all of the dielectric layer64and the barrier layer62and into an etched recess68in the buffer layer60. The anode contact56is formed over a portion of the dielectric layer64(56A), along the angled wall66(56B), and along the recessed portion of the buffer layer60(56C).

On the left side of the structure, a cathode recess70is etched through the dielectric layer64and the barrier layer62to the buffer layer60. A cathode contact72is formed over the cathode recess70. A 2-DEG plane is formed during operation just below the junction of the barrier layer62and the buffer layer60and between the anode contact56and the cathode contact72. Notably, the portion56A of the anode contact56that resides on the top surface of the dielectric layer64may serve as a field plate.

With reference toFIGS. 7 and 8, an exemplary process for forming the anode contact56is described. This process is analogous to the process illustrated above for forming the Schottky gate contact30.FIG. 7illustrates the structure of an anode contact precursor56P, which is annealed as described above to form the actual structure of the anode contact56, which is illustrated inFIG. 8.

An exemplary process for forming the anode contact precursor56P is described in association withFIG. 7. Assume that the angled wall66has already been formed. Initially, a Schottky layer precursor74P is formed over at least a portion of the dielectric layer64(56A), along the angled wall66(56B), and along the recessed portion of the buffer layer60(56C). In this embodiment, the Schottky layer precursor74P is formed from nickel (Ni).

Next, a first diffusion barrier layer precursor76P is formed over the Schottky layer precursor74P. In this embodiment, the first diffusion barrier layer precursor76P is formed from silicon (Si). A second diffusion barrier layer78is formed over the first diffusion barrier layer precursor76P. In this embodiment, the second diffusion barrier layer78is formed from titanium (Ti). A third diffusion barrier layer80is formed over the second diffusion barrier layer78. The third diffusion barrier layer80is formed from platinum using known evaporation techniques. A contact layer82is formed over the third diffusion barrier layer80. The contact layer82is formed from gold (Au) or aluminum (Al). Finally, a protection layer84is formed over the contact layer82. In this embodiment, the protection layer84is formed from Ti. While evaporative techniques may be used for applying the various layers of the anode contact precursor56P, known sputtering or like deposition techniques may be used an alternative.

After the protection layer84is formed, the Schottky diode54is subjected to a thermal annealing process, which is described in detail above. In general, the thicknesses of the Schottky layer precursor74P and the first diffusion barrier layer precursor76P are selected such that in a subsequent annealing process, which is described in detail further below, the Ni and Si of these respective layers react with one another to form a Schottky layer74formed of Ni and a first diffusion barrier layer76formed of a nickel silicide (NiXSi), as shown inFIG. 8. In this embodiment, the Si of the first diffusion barrier layer precursor76P is substantially completely consumed by the reaction caused by the annealing process, such that the first diffusion barrier layer precursor76P that is formed from Si is essentially no longer present. Although the Si is consumed during the reaction, not all of the Ni of the Schottky layer precursor74P is consumed. As such, the remaining Ni effectively forms a Schottky layer74of Ni.

While Ni, Si, Ti, Pt, Au, and Ti are respectively used in the embodiment described above for the Schottky layer precursor74P, the first diffusion barrier layer precursor76P, the second diffusion barrier layer78, the third diffusion barrier layer80, the contact layer82, and the protection layer84, these layers are not limited to these materials. These materials have simply been found to work well in devices where the anode contact56or like Schottky contact is formed on group III-nitride material, such as AlGaN. As such, the resultant silicide for the first diffusion barrier layer76is a silicide of the material used for the Schottky layer precursor74P, and thus, the Schottky layer74.

For example, the Schottky layer precursor74P could be formed from Platinum. As a result of annealing, the silicide of the first diffusion barrier layer36would be Platinum Silicide. The second diffusion barrier layer78could be formed from Titanium or Titanium Tungsten. The third diffusion barrier layer80could be formed from Platinum.