Radio frequency integrated circuit having an antenna diversity structure

A radio frequency integrated circuit includes a power amplifier, a low noise amplifier, a first transformer balun, and a second transformer balun. The power amplifier includes a first power amplifier section and a second power amplifier section. When enabled, the first and second power amplifier sections amplify an outbound radio frequency (RF) signal to produce a first amplified outbound RF signal and a second amplified outbound RF signal, respectively. The power amplifier provides the first amplified outbound RF signal to the first transformer balun and the second outbound RF signal to the second transformer balun, where the first transformer balun is coupled to a first antenna and the second transformer balun is coupled to a second antenna. The low noise amplifier includes a first low noise amplifier section and a second low noise amplifier section. When enabled, the first low noise amplifier section amplifies a first inbound RF signal to produce a first amplified inbound RF signal, and, when enabled, the second low noise amplifier section amplifies a second inbound RF signal to produce a second amplified inbound RF signal. The low noise amplifier receives the first inbound RF signal from the first transformer balun and receives the second inbound RF signal from the second transformer balun.

TECHNICAL FIELD OF THE INVENTION

This invention relates generally to communication systems and, more particularly, to radio receivers and transmitters used within such communication systems.

DESCRIPTION OF RELATED ART

For each wireless communication device to participate in wireless communications, it includes a built-in radio transceiver (i.e., receiver and transmitter) or is coupled to an associated radio transceiver (e.g., a station for in-home and/or in-building wireless communication networks, RF modem, etc.). As is known, the receiver receives RF signals, demodulates the RF carrier frequency from the RF signals via one or more intermediate frequency stages to produce baseband signals, and demodulates the baseband signals in accordance with a particular wireless communication standard to recapture the transmitted data. The transmitter converts data into RF signals by modulating the data in accordance with the particular wireless communication standard to produce baseband signals and mixes the baseband signals with an RF carrier in one or more intermediate frequency stages to produce RF signals.

To recapture data from RF signals a receiver includes a low noise amplifier, down conversion module and demodulation module. To convert data into RF signals, a transmitter includes a power amplifier, an up-conversion module and a modulation module. For radio-frequency integrated circuits (RFICs), it is desirable to provide the low noise amplifier and the power amplifier with differential RF signals, instead of single-ended RF signals, to improve noise performance and common mode rejection. To convert received single-ended RF signals into differential RF signals for a receiver, and to convert differential RF signals into single-ended signals for a transmitter, the receiver and/or the transmitter includes a balun (i.e., a balanced/unbalanced transformer).

An issue that arises with most wireless communication devices is fading. As is known, fading is a by-product of multiple path communications in which a transmitted signal is received via multiple communication paths. The multiple communication paths include a direct path between the transmitter and receiver and reflected paths where the transmitted signal bounces off of objects (e.g., buildings, hills, mountains, etc.) before being received. Each of the multiple paths have different lengths, thus the signal is received multiple times at different phases. In some instances, the phase differences align to dramatically reduce the signal strength of the received signal, which may cause interruption of a communication.

One solution to minimize the reduction of signal strength due to fading is to include a diversity antenna arrangement within the wireless communication device. As is known, a diversity antenna arrangement includes two or more antennas that are physically spaced by a distance corresponding to a quarter wavelength, a half wavelength, and/or a full wavelength of the RF signals. By spacing the antennas in such a manner, one antenna may be experiencing significant fading, while another antenna is not. Thus, the antenna not experiencing the fading can be selected for the communication.

Currently, when a wireless communication device includes a radio frequency integrated circuit (RFIC) to perform the conversion of outbound data into outbound RF signals and to convert inbound RF signals into inbound data, the circuitry for a diversity antenna structure is off-chip. In particular, the power amplifier and low noise amplifier of the radio are on-chip, but the antenna switch for transmit/receive selection, the antenna switch for diversity antenna selection, and the impedance matching circuitry are off-chip. With consume demand for more integration, it is desirable to integrate as much of the diversity antenna structure as possible.

Therefore, a need exists for an integrated radio frequency (RF) integrated circuit that includes a diversity antenna structure.

BRIEF SUMMARY OF THE INVENTION

The radio frequency integrated circuit (RFIC) having an antenna diversity structure of the present invention substantially meets these needs and others. In one embodiment, the RFIC includes a power amplifier, a low noise amplifier, a first transformer balun, and a second transformer balun. The power amplifier includes a first power amplifier section and a second power amplifier section. When enabled, the first and second power amplifier sections amplify an outbound radio frequency (RF) signal to produce a first amplified outbound RF signal and a second amplified outbound RF signal, respectively. The power amplifier provides the first amplified outbound RF signal to the first transformer balun and the second outbound RF signal to the second transformer balun, where the first transformer balun is coupled to a first antenna and the second transformer balun is coupled to a second antenna. The low noise amplifier includes a first low noise amplifier section and a second low noise amplifier section. When enabled, the first low noise amplifier section amplifies a first inbound RF signal to produce a first amplified inbound RF signal, and, when enabled, the second low noise amplifier section amplifies a second inbound RF signal to produce a second amplified inbound RF signal. The low noise amplifier receives the first inbound RF signal from the first transformer balun and receives the second inbound RE signal from the second transformer balun. With such a structure, on-chip diversity antenna system is obtained.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 1illustrates a schematic block diagram of a communication system10that includes a plurality of base stations and/or access points12-16, a plurality of wireless communication devices18-32and a network hardware component34. The wireless communication devices18-32may be laptop host computers18and26, personal digital assistant hosts20and30, personal computer hosts24and32and/or cellular telephone hosts22and28. The details of the wireless communication devices will be described in greater detail with reference to FIG.2.

The base stations or access points12are operably coupled to the network hardware34via local area network connections36,38and40. The network hardware34, which may be a router, switch, bridge, modem, system controller, et cetera, provides a wide area network connection42for the communication system10. Each of the base stations or access points12-16has an associated antenna or antenna array to communicate with the wireless communication devices in its area. Typically, the wireless communication devices resister with a particular base station or access point12-14to receive services from the communication system10. For direct connections (i.e., point-to-point communications), wireless communication devices communicate directly via an allocated channel.

Typically, base stations are used for cellular telephone systems and like-type systems, while access points are used for in-home or in-building wireless networks. Regardless of the particular type of communication system, each wireless communication device includes a built-in radio and/or is coupled to a radio. The radio includes an integrated RF from end architecture as disclosed herein to enhance performance of radio frequency integrated circuits.

FIG. 2illustrates a schematic block diagram of a wireless communication device that includes, the host device18-32and an associated radio60. For cellular telephone hosts, the radio60is a built-in component. For personal digital assistants hosts, laptop hosts, and/or personal computer hosts, the radio60may be built-in or an externally coupled component.

As illustrated, the host device18-32includes a processing module50, memory52, radio interface54, input interface58and output interface56. The processing module50and memory52execute the corresponding, instructions that are typically done by the host device. For example, for a cellular telephone host device, the processing module50performs the corresponding communication functions in accordance with a particular cellular telephone standard.

Radio60includes a host interface62, a receiver section, a transmitter section, local oscillation module74, a first transformer balun73, a second transformer balun77, and diversity antennas86. The receiver section includes a digital receiver processing module64, analog-to-digital converter66, filtering/gain module68, down conversion module70, low noise amplifier (LNA)72, which may be implemented in accordance with the teachings of the present invention, and at least a portion of memory75. The transmitter section includes a digital transmitter processing module76, digital-to-analog converter78, filtering/gain module80, up-conversion module82, power amplifier84, which may be implemented in accordance with the teachings of the present invention, and at least a portion of memory75.

The diversity antennas86may include two or more antennas that are physically spaced by a quarter wavelength, a half wavelength, and/or a full wavelength of the RF signals. In this embodiment, two antennas are shown, where a first antenna is coupled to the first transformer balun73and a second antenna is coupled to the second transformer balun77. The transformer baluns73and77convert differential signals into single-ended signals, where the single-ended signals are conveyed with the antennas86. The transformer baluns may be constructed in accordance with the teachings of co-pending patent application entitled ON-CHIP TRANSFORMER BALUN, having a filing date of Jan. 23, 2002, and a Ser. No. 10/055,425.

The LNA72includes two sections that may be implemented in a variety of ways as will be described with reference toFIGS. 3-5that are independently enabled to receive RF signals from one of the antennas. For instance, when the first antenna86is selected to receive the inbound RF signals, the LNA72receives the RF signals via the first transformer balun73. Accordingly, the section of the LNA coupled to the first transformer balun73is active, while the section of the LNA coupled to the second transformer balun77is inactive. Conversely, when the second antenna86is selected to receive the inbound RF signals, the LNA72receives the RF signals via the second transformer balun77. Accordingly, the section of the LNA coupled to the second transformer balun77is active, while the section of the LNA coupled to the first transformer balun73is inactive.

The PA84includes two sections that may be implemented in a variety of ways as will be described with reference toFIGS. 6 and 7that are independently enabled to transmit RF signals from one of the antennas. For instance, when the first antenna86is selected to transmit the outbound RF signals, the PA84transmits the RF signals via the first transformer balun73. Accordingly, the section of the PA coupled to the first transformer balun73is active, while the section of the PA coupled to the second transformer balun77is inactive. Conversely, when the second antenna86is selected to transmit the outbound RF signals, the PA84transmits the RF signals via the second transformer balun77. Accordingly, the section of the PA coupled to the second transformer balun77is active, while the section of the PA coupled to the first transformer balun73is inactive.

The digital receiver processing module64and the digital transmitter processing module76, in combination with operational instructions stored in memory75, execute digital receiver functions and digital transmitter functions, respectively. The digital receiver functions include, but are not limited to, digital intermediate frequency to baseband conversion, demodulation, constellation demapping, decoding, and/or descrambling. The digital transmitter functions include, but are not limited to, scrambling, encoding, constellation mapping, modulation, and/or digital baseband to IF conversion. The digital receiver and transmitter processing modules64and76may be implemented using a shared processing device, individual processing devices, or a plurality of processing devices. Such a processing device may be a microprocessor, micro-controller, digital signal processor, microcomputer, central processing unit, field programmable gate array, programmable logic device, state machine, logic circuitry, analog circuitry, digital circuitry, and/or any device that manipulates signals (analog and/or digital) based on operational instructions. The memory75may be a single memory device or a plurality of memory devices. Such a memory device may be a read-only memory, random access memory, volatile memory, non-volatile memory, static memory, dynamic memory, flash memory, and/or any device that stores digital information. Note that when the processing module64and/or76implements one or more of its functions via a state machine, analog circuitry, digital circuitry, and/or logic circuitry, the memory storing the corresponding operational instructions is embedded with the circuitry comprising the state machine, analog circuitry, digital circuitry, and/or logic circuitry.

In operation, the radio60receives outbound data94from the host device via the host interface62. The host interface62routes the outbound data94to the digital transmitter processing module76, which processes the outbound data94in accordance with a particular wireless communication standard (e.g., IEEE 802.11a, IEEE 802.11b, Bluetooth, et cetera) to produce digital transmission formatted data96. The digital transmission formatted data96will be a digital base-band signal or a digital low IF signal, where the low IF will be in the frequency range of zero to a few megahertz.

The digital-to-analog converter78converts the digital transmission formatted data96from the digital domain to the analog domain. The filtering/gain module80filters and/or adjusts the gain of the analog signal prior to providing it to the up-conversion module82. The up-conversion module82directly converts the analog baseband or low IF signal into an RF signal based on a transmitter local oscillation provided by local oscillation module74. The power amplifier84amplifies the RF signal to produce outbound RF signal98and routes the outbound RF signal98to the antenna86via the antenna coupling structure73. The antenna86transmits the outbound RF signal98to a targeted device such as a base station, an access point and/or another wireless communication device.

The radio60also receives, via the antenna86and the antenna coupling structure73, an inbound RF signal88, which can be transmitted by a base station, an access point, or another wireless communication device. The antenna coupling structure73provides the inbound RF signal88to the LNA72, which amplifies the signal88to produce an amplified inbound RF signal. The RF front-end72provides the amplified inbound RF signal to the down conversion module70, which directly converts the amplified inbound RF signal into an inbound low IF signal based on a receiver local oscillation provided by local oscillation module74. The down conversion module70provides the inbound low IF signal to the filtering/gain module68, which filters and/or adjusts the gain of the signal before providing it to the analog to digital converter66.

The analog-to-digital converter66converts the filtered inbound low IF signal from the analog domain to the digital domain to produce digital reception formatted data90. The digital receiver processing module64decodes, descrambles, demaps, and/or demodulates the digital reception formatted data90to recapture inbound data92in accordance with the particular wireless communication standard being implemented by radio60. The host interface62provides the recaptured inbound data92to the host device18-32via the radio interface54.

As one of average skill in the art will appreciate, the radio may be implemented in a variety of ways to receive RF signals and to transmit RF signals and may be implemented using a single integrated circuit or multiple integrated circuits. Further, at least some of the modules of the radio60may be implemented oil the same integrated circuit with at least some of the modules of the host device18-32. Regardless of how the radio is implemented, the concepts of the present invention are applicable.

FIG. 3is a schematic block diagram of an embodiment of the low noise amplifier72including a first LNA section72-1, a second LNA section72-2, an enable switch, a resistive load (RLOAD) load inductors L1and L2, and input inductors L3and L4. The first LNA section72-1includes a first selectable bias circuit, input transistors (TIN1—N) and (TIN1—P), and load transistors (T1LOAD—N) and (T1LOAD—P). The first selectable bias circuit includes capacitors C1and C2and resistors R1and R2coupled to receive a first select bias114and to the first transformer balun73. The second LNA section72-2includes a second selectable bias circuit, input transistors (TIN2—N) and (TIN2—P), and load transistors (T2LOAD—N) and (T2LOAD—P). The second selectable bias circuit includes capacitors C3and C4and resistors R3and R4coupled to receive a second select bias115and to the second transformer balun77. In this embodiment, the load transistors (T1LOAD—N), (T1LOAD—P), T2LOAD—N) and (T2LOAD—P) of both sections are biased to the same voltage (LNA bias116).

In operation, when the RF signals are to be received via the first transformer balun73, the first select bias114is set to a level to enable the input transistors (TIN1—N) and (TIN1—P) of th-first LNA section72-1and the second select bias115is set to a voltage that holds the input transistors (TIN2—N) and (TIN2—P) of the second LNA section72-2off. With the input transistors of the second LNA section72-2disabled, the2nd LNA section72-2is disabled, thus only the first LNA section72-1is active. With the first LNA section72-1active, the first LNA section amplifies the differential signals received via the first transformer balun73and, in conjunction with the load inductors and resistive load, produces the LNA differential output112.

Conversely, when the RF signals are to be received via the second transformer balun77, the second select bias115is set to a level to enable the input transistors (TIN2—N) and (TIN2—P) of the second LNA section72-2and the first select bias114is set to a voltage that holds the input transistors (TIN1—N) and (TIN1—P) of the first LNA section72-1off. With the input transistors of the first LENA section72-1disabled, the first LNA section72-1is disabled, thus only the second LNA section72-2is active. With the second LNA section72-2active, the second LNA section amplifies the differential signals received via the second transformer balun77and, in conjunction with the load inductors and resistive load, produces the LNA differential output112.

FIG. 4is a schematic block diagram of an embodiment of the low noise amplifier72including a first LNA section72-1, a second LNA section72-2, an enable switch, a resistive load (RLOAD), load inductors L1and L2, and input inductors L3and L4. The first LNA section72-1includes a first selectable bias circuit, input transistors (TIN1—N) and (TIN1—I), and load transistors T1LOAD—N) and (T1LOAD—P). The first selectable bias circuit includes capacitors C1and C2and resistors R1and R2coupled to receive an LNA input bias121and to the first transformer balun73. The second LNA section72-2includes a second selectable bias circuit, input transistors (TIN2—N) and (TIN2—P), and load transistors (T2LOAD—N) and (T2LOAD—P). The second selectable bias circuit includes capacitors C3and C4and resistors R3and R4coupled to receive the LNA input bias and to the second transformer balun77. In this embodiment, the load Transistors (T1LOAD—N) and (T1LOAD—P) of the first LNA section72-1are biased by a first load bias117and the load transistors (T2LOAD—N) and (T2LOAD—P) of the second LNA section72-2are biased by a second load bias119. Note that the LNA input bias121is of a voltage to active the input transistors (TIN1—N), (TIN1—P), (TIN2—N) and (TIN2—P) of both LNA sections.

In operation, when the RF signals are to be received via the first transformer balun73, the first load bias117is set to a level to enable the load transistors (T1LOAD—N) and (T1LOAD—P) of the first LNA section72-1and the second load bias119is set to a voltage that holds the load transistors (T2LOAD—N) and (T2LOAD—P) of the second LNA section72-2off. With the load transistors of the second LNA section72-2disabled, the 2nd LNA section72-2is disabled, thus only the first LNA section72-1is active. With the first LNA section72-1active, the first LNA section amplifies the differential signals received via the first transformer balun73and, in conjunction with the load inductors and resistive load, produces the LNA differential output112.

Conversely, when the RF signals are to be received via the second transformer balun77, the second load bias119is set to a level to enable the load transistors T2LOAD—N) and (T2LOAD—P) of the second LNA section72-2and the, first load bias117is set to a voltage that holds the load transistors (T1LOAD—N) and (T1LOAD—P) of the first LNA section72-1off. With the load transistors of the first LNA section72-1disabled, the first LNA section72-1is disabled, thus only the second LNA section72-2is active. With the second LNA section72-2active, the second LNA section amplifies the differential signals received via the second transformer balun77and, in con unction with the load inductors and resistive load, produces the LNA differential output112.

FIG. 5is a schematic block diagram of an embodiment of the low noise amplifier72including a first LNA section72-1, a second LNA section72-2, an enable switch, load transistors (TLOAD—N) and (TLOAD—P), a resistive load (RLOAD), load inductors L1and L2, and input inductors L3and L4. The first LNA section72-1includes a first selectable bias circuit and input transistors (TIN1—N) and (TIN1—P). The first selectable bias circuit includes capacitors C1and C2and resistors R1and R2coupled to receive a first select bias114and to the first transformer balun73. The second LNA section72-2includes a second selectable bias circuit and input transistors (TIN2—N) and (TIN2—P). The second selectable bias circuit includes capacitors C3and C4and resistors R3and R4coupled to receive a second select bias115and to the second transformer balun77. In this embodiment, the load transistors (TLOAD—N) and (TLOAD—P) ar biased to the same voltage (load bias123) such that the load transistors are enabled.

In operation, when the RF signals are to be received via the first transformer balun73, the first select bias114is set to a level to enable the input transistors (TIN1—N) and (TIN1—P) of the first LNA section72-1and the second select bias115is set to a voltage that holds the input transistors (TIN2—N) and (TIN2—P) of the second LNA section72-2off. With the input transistors of the second LNA section72-2disabled, the 2ndLNA section72-2is disabled, thus only the first LNA section72-1is active. With the first LNA section72-1active, the first LNA section amplifies the differential signals received via the first transformer balun73and, in conjunction with the load inductors, load transistors, and resistive load, produces the LNA differential output112.

Conversely, when the RF signals are to be received via the second transformer balun77, the second select bias115is set to a level to enable the input transistors (TIN2—N) and (TIN2—P) of the second LNA section72-2and the first select bias114is set to a voltage that holds the input transistors (TIN1—N) and (TIN1—P) of the first LNA section72-1off. With the input transistors of the first LNA section72-1disabled, the first LNA section72-1is disabled, thus only the second LNA section72-2is active. With the second LNA section72-2active, the second LNA section amplifies the differential signals received via the second transformer balun77and, in conjunction with the load inductors, the load transistors, and resistive load, produces the LNA differential output112.

FIG. 6is a schematic block diagram of a power amplifier84that includes an input section and two output sections. One of the output section, couples to the first transformer balun73and the second output section coupled to the second transformer balun77. The input section includes enable transistors T5and T10, input transistors T6and T11, drive transistors T7and T12, input capacitors C3and C5bias resistors R3and R5, and current sources. The first output section includes output transistors T9and T14and output gating circuitry that includes transistors T8and T13, capacitors C4and C6, and resistors R4and R6. The second output section includes output transistors T15and T16and the output gating circuitry.

In operation, the input section receives differential outbound RF signals via the input transistors T6and T11. With proper biasing of transistors T6, T11, T7, and T12, a current that represents the differential outbound RF signals is flowing through inductors L5and L6. Based on the currents, a voltage is imposed across the inductors L5and L6, with reference to the supply voltage. This voltage is coupled via capacitors C4and C6to transistors T8and T13. When the differential outbound RF signals are to be provided to the first transformer balun73, the first PA load bias125is a logic low and the second PA load bias127is a logic high. With the PA load biases125and127in these states, transistors T9and T14are active and transistors T15and T16are inactive. As such, the amplified outbound RF signals are provided to the first transformer balun73.

Conversely, when the amplified outbound RF signals are to be provided to the second transformer balun77, the first PA load bias125is a logic high and the second PA load bias127is a logic low. With the PA load biases125and127in these states, transistors T9and T14are inactive and transistors T15and T16are active. As such, the amplified outbound RF signals are provided to the second transformer balun77.

FIG. 7is a schematic block diagram of a power amplifier84that includes an input section and two output sections. One of the output sections couples to the first transformer balun73and the second output section coupled to the second transformer balun77. The input section includes enable transistors T5and T10input transistors T6and T11, drive transistors T7and T12, input capacitors C3and C5, bias resistors R3and R5, and current sources. The first output section includes output transistors T8, T9, T13, and T14, capacitors C4and C6and resistors R4and R6. The second output section includes output transistors T15, T16, T17and T18, capacitors C7land C8and resistors R7and R8.

In operation, the input section receives differential outbound RF signals via the input transistors T6and T11. With proper biasing of transistors T6, T11, T7, and T12, a current that represents the differential outbound RF signals is flowing through inductors L5and L6. Based on the currents, a voltage is imposed across the inductors L5and L6, with reference to the supply voltage. This voltage is coupled via capacitors C4and C6to transistors T8and T13and to transistors T17and T18via capacitors C7and C8. When the differential outbound RF signals are to be provided to the first transformer balun73, the first PA bias131is of a voltage to enable transistors T8and T13and the second PA bias133is of a voltage to inactivate transistors T17and T18. With the PA biases131and133in these states, transistors T9and T14are active and transistors T15and T16are inactive. As such, the amplified outbound RF signals are provided to the first transformer balun73.

Conversely, when the amplified outbound RF signals are to be provided to the second transformer balun77, the first PA bias131is of a voltage that inactivates transistors T8and T9and the second PA bias133is of a voltage that activates transistors T17and T18. With the PA biases131and133in these states, transistors T9and T14are inactive and transistors T15and T16are active. As such, the amplified outbound RF signals are provided to the second transformer balun77.

As one of average skill in the art will appreciate, another embodiment of the power amplifier84may implemented where the first power amplifier section includes a first input stage and a first output drive stage, wherein the first input section includes AC coupling capacitors, input transistors, first output transistors, first loads, and first drive stage AC coupling capacitors. The AC coupling capacitors are operably coupled to provide the outbound RF signal to the input transistors, wherein the input transistors are operably coupled to the first output transistors, wherein the first output transistors are operably coupled to the first loads. When enabled via a first bias voltage, the first output transistors provide, in combination with the first loads and via the first driver stage AC coupling capacitors, a first intermediate amplifier outbound RF signal to the first output drive stage, and wherein the first output drive stage provides the first amplifier RF signal.

The second power amplifier section includes a second input stage and a second output drive stage. The second input section includes the AC coupling capacitors, the input transistors, second output transistors, second loads, and second drive stage AC coupling capacitors. The AC coupling, capacitors are operably coupled to provide the outbound RF signal to the input transistors, wherein the input transistors are operably coupled to the second output transistors, and wherein the second output transistors are operably coupled to the second loads. When enabled via a second bias voltage, the second output transistors provide, in combination with the second loads and via the second driver stage AC coupling capacitors, a second intermediate amplifier outbound RF signal to the second output drive stage, wherein the second output drive stage provides the second amplifier RF signal.

The preceding discussion has presented a radio frequency integrated circuit having a diversity antenna structure. To support an on-chip diversity antenna structure, the low noise amplifier and power amplifier may be implemented in accordance with the teachings of the present invention. As one of average skill in the art will appreciate, other embodiments may be derived from the teachings of the present invention without deviating from the scope of the claims.