Display panel and driving method thereof

A display panel and a driving method thereof are provided. In a pixel array substrate of the display panel, each first transistor electrically connects to a corresponding first pixel electrode, each second transistor electrically connects to a corresponding second pixel electrode, each third transistor electrically connects to a corresponding third pixel electrode, and each fourth transistor electrically connects to a corresponding fourth pixel electrode. A plurality of data lines electrically connect to the corresponding first, second, third and fourth transistors. Each first scan line electrically connects to the first and third transistors. Each second scan line electrically connects to the second and fourth transistors. A plurality of third scan lines are located between the corresponding first and second scan lines and electrically connect to the corresponding third and fourth pixel electrodes via fifth transistors.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims the priority benefit of Taiwan application serial no. 101124262, filed on Jul. 5, 2012. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The invention is related to a display panel and a method of driving the display panel, and especially related to a display panel having a favorable aperture ratio and a method of driving the display panel.

2. Description of Related Art

In recent years, with the progress of semiconductor industry and relevant electronics industry, the use of digital appliances such as a mobile phone, a digital camera and a notebook computer becomes more and more common, and develops toward the direction of convenience, multi-function and good design, in order to provide users with more choices. As users' demand for digital products gradually increases, a display panel that plays an important role in digital products also becomes the focal point of designers' attention, wherein a liquid crystal display panel has become the mainstream of display panels.

Among current liquid crystal display panels, the vertical alignment (VA) mode liquid crystal display panel has a problem of color washout when viewed in a large viewing angle.FIG. 1is a top-view schematic diagram of a portion of a conventional pixel array substrate. Referring toFIG. 1, to solve the problem of color washout in the liquid crystal display panel, each pixel100on a pixel array substrate50of the liquid crystal display panel may be divided into two portions, namely a primary pixel110and a secondary pixel120, making the primary pixel110and the secondary pixel120have different voltages. When the primary pixel110and the secondary pixel120have different voltages, liquid crystal molecules within the same pixel100may have more arrangement directions, and then the problem of color washout that occurs in the liquid crystal display panel in the large viewing angle may be improved.

However, in order to make the liquid crystal display panel have the above effect in a driving method of a reverse scan, a scan line140has to be added into the same pixel100. But the addition of the scan line140reduces the aperture ratio of each pixel100and leads to a lowered transmittance. Besides, in order to control signals transmitted to an original scan line130and the newly added scan line140respectively, the number of driver chips has to increase to a double of the original number, leading to an increased cost of products. Therefore, how to attend simultaneously to an ideal aperture ratio of the pixels, a lower overall cost and a solution to the problem of color washout of the liquid crystal display panel is an issue worth exploring in the design of the liquid crystal display panel.

SUMMARY OF THE INVENTION

The invention provides a display panel having a favorable aperture ratio.

The invention provides a driving method capable of solving a phenomenon of color washout of the display panel in a large viewing angle, while maintaining the favorable aperture ratio.

The invention provides a display panel, including a first substrate, a display medium, and a pixel array substrate. The display medium is configured between the first substrate and the pixel array substrate. The pixel array substrate includes a plurality of first pixel electrodes, a plurality of second pixel electrodes, a plurality of third pixel electrodes, a plurality of fourth pixel electrodes, a plurality of first scan lines, a plurality of second scan lines, and a plurality of third scan lines. Each of a plurality of first transistors electrically connects with one corresponding first pixel electrode, each of a plurality of second transistors electrically connects with one corresponding second pixel electrode, each of a plurality of third transistors electrically connects with one corresponding third pixel electrode, and each of a plurality of fourth transistors electrically connects with one corresponding fourth pixel electrode. The pixel array substrate includes a plurality of fifth transistors and a plurality of data lines, and each of the plurality of data lines electrically connects to the corresponding first, second, third, and fourth transistors. Each of the first scan lines electrically connects to the first and third transistors, and each of the second scan lines electrically connects to the second and fourth transistors. Each of the third scan lines is located between the corresponding first and second scan lines, and each of the third scan lines electrically connects to the corresponding third and fourth pixel electrodes via the fifth transistor.

According to an embodiment of the invention, the third pixel electrode of the display panel is located between the first and third scan lines electrically connected to the third pixel electrode.

According to an embodiment of the invention, the first and third pixel electrodes electrically connected to the first scan line of the display panel are located on the same side of the first scan line.

According to an embodiment of the invention, the fourth pixel electrode of the display panel is located between the second and third scan lines electrically connected to the fourth pixel electrode.

According to an embodiment of the invention, the second and fourth pixel electrodes electrically connected to the second scan line of the display panel are located on the same side of the second scan line.

According to an embodiment of the invention, the pixel array substrate of the display panel further includes a plurality of capacitors, wherein each of the fifth transistors is electrically connected between the corresponding capacitor and the corresponding third pixel electrode or electrically connected between the corresponding capacitor and the corresponding fourth pixel electrode.

According to an embodiment of the invention, the display medium of the display panel is a liquid crystal.

According to an embodiment of the invention, the first substrate of the display panel is a color filter substrate.

The invention provides a driving method for driving the display panel, and the driving method includes the following steps. In a first period within a frame period of the display panel, a first scan signal is provided to a No. i first scan line to turn on the plurality of first and third transistors electrically connected to the No. i first scan line. A plurality of first display data are correspondingly written into the plurality of first pixel electrodes electrically connected to the plurality of first transistors electrically connected to the No. i first scan line and the plurality of third pixel electrodes electrically connected to the plurality of third transistors electrically connected to the No. i first scan line via the plurality of data lines. The i is an integer equal to or larger than 1.

According to an embodiment of the invention, a second scan signal is provided to a No. i second scan line to turn on the plurality of second and fourth transistors electrically connected to the No. i second scan line in a second period within the frame period. A plurality of second display data are correspondingly written into the plurality of second pixel electrodes electrically connected to the plurality of second transistors electrically connected to the No. i second scan line and the plurality of fourth pixel electrodes electrically connected to the plurality of fourth transistors electrically connected to the No. i second scan line via the plurality of data lines.

According to an embodiment of the invention, a third scan signal is provided to a No. i third scan line to turn on the plurality of fifth transistors electrically connected to the No. i third scan line and to influence the plurality of first display data written into the plurality of third pixel electrodes electrically connected to the No. i first scan line and the plurality of second display data written into the plurality of fourth pixel electrodes electrically connected to the No. i second scan line in a third period within the frame period. In the third period, a fourth scan signal is synchronously provided to a No. i+1 first scan line to turn on the plurality of first and third transistors electrically connected to the No. i+1 first scan line. A plurality of third display data are correspondingly written into the first pixel electrodes electrically connected to the first transistors electrically connected to the No. i+1 first scan line and the third pixel electrodes electrically connected to the third transistors electrically connected to the No. i+1 first scan line via the plurality of data lines.

According to an embodiment of the invention, a fifth scan signal is provided to a No. i+1 second scan line to turn on the plurality of second and fourth transistors electrically connected to the No. i+1 second scan line in a fourth period within the frame period. A plurality of fourth display data are correspondingly written into the second pixel electrodes electrically connected to the second transistors electrically connected to the No. i+1 second scan line and the fourth pixel electrodes electrically connected to the fourth transistors electrically connected to the No. i+1 second scan line via the plurality of data lines.

The invention provides a display panel, including a first to fourth pixel electrodes, a first to fourth transistors, two fifth transistors, a data line, a first scan line, a second scan line and a third scan line. The first transistor electrically connects to the first pixel electrode, the second transistor electrically connects to the second pixel electrode, the third transistor electrically connects to the third pixel electrode, and the fourth transistor electrically connects to the fourth pixel electrode. One of the fifth transistors electrically connects to the third pixel electrode, and the other of the fifth transistors electrically connects to the fourth pixel electrode. The data line electrically connects to the first, second, third and fourth transistors. The first scan line electrically connects to the first and third transistors. The second scan line electrically connects to the second and fourth transistors, and the third scan line electrically connects to the two fifth transistors.

According to an embodiment of the invention, the first scan line is configured to receiving a first scan signal to turn on the first transistor and the third transistor, and the data line is configured to correspondingly write a first display data into the of the first pixel electrode and the third pixel electrode.

Based on the above, the display panel of the invention uses a design of sharing the third scan line to make the display panel obtain the favorable aperture ratio. In addition, the driving method of the invention drives the display panel that adopts the design of the shared third scan line, and solves the problem of color washout of the display panel.

To make the aforementioned and other features and advantages of the invention more comprehensible, several embodiments accompanied with figures are described in detail below.

DETAILED DESCRIPTION OF DISCLOSED EMBODIMENTS

Several exemplary embodiments accompanied with drawings are described in detail below to further describe the invention in detail.

FIG. 2is a cross-sectional schematic diagram of a portion of a display panel according to an embodiment of the invention. Referring toFIG. 2, a display panel200includes a first substrate210, a display medium220, and a pixel array substrate230. The display medium220is configured between the first substrate210and the pixel array substrate230.

FIG. 3is a top-view schematic diagram of a portion of the pixel array substrate inFIG. 2, andFIG. 4is an equivalent circuit diagram of the pixel array substrate inFIG. 3. Referring to bothFIGS. 3 and 4, the pixel array substrate230includes a first pixel electrode231, a second pixel electrode232, a third pixel electrode233, a fourth pixel electrode234, a data line DL, a first scan line SL1, a second scan line SL2and a third scan line SL3. In the embodiment, the display panel200includes a plurality of first pixel electrodes231, a plurality of second pixel electrodes232, a plurality of third pixel electrodes233, a plurality of fourth pixel electrodes234, a plurality of data lines DL, a plurality of first scan lines SL1, a plurality of second scan lines SL2and a plurality of third scan lines SL3, for example. SinceFIGS. 3 and 4merely illustrate a portion of the pixel array substrate230, merely one of the plurality of third scan lines SL3are schematically illustrated.

Besides, the pixel array substrate230includes a first transistor235, a second transistor236, a third transistor237, a fourth transistor238and a plurality of fifth transistors239aand239b. In the embodiment, the example is provided with a plurality of first transistors235, a plurality of second transistors236, a plurality of third transistors237, and a plurality of fourth transistors238, and thereforeFIGS. 3 and 4illustrate the plurality of first transistors235, the plurality of second transistors236, the plurality of third transistors237, and the plurality of fourth transistors238.

In the embodiment, the transistors may be Thin Film Transistors (TFTs), in order to serve as a switching element of each pixel unit in the pixel array substrate230. Each of the transistors, in coordination with the corresponding data line DL, the corresponding first scan line SL1, the corresponding second scan line SL2and the corresponding third scan line SL3, may select a specific pixel electrode, and display a corresponding display data by means of providing an adequate operating voltage.

In the embodiment, each of the plurality of first transistors235electrically connects to one corresponding first pixel electrode231, each of the plurality of second transistors236electrically connects to one corresponding second pixel electrode232, each of the plurality of third transistors237electrically connects to one corresponding third pixel electrode233, and each of the plurality of fourth transistors238electrically connects to one corresponding fourth pixel electrode234. Each of the plurality of data lines DL electrically connects to each corresponding first transistor235, second transistor236, third transistor237and fourth transistor238.

Besides, the first scan line SL1electrically connects to the first transistor235and the third transistor237, and the second scan line SL2electrically connects to the second transistor236and the fourth transistor238. Each of the plurality of third scan lines SL3is located between the corresponding first scan line SL1and the corresponding second scan line SL2, and the third scan line SL3electrically connects to each corresponding third pixel electrode233via the fifth transistor239a, or to each corresponding fourth pixel electrode234via the fifth transistor239b.

In the embodiment, the third scan line SL3is used in receiving control signals for controlling each of the plurality of fifth transistors239aand239b, and the fifth transistors239aand239bfurther electrically connect to the corresponding third pixel electrode233and fourth pixel electrode234. Thereby, the third pixel electrode233and the fourth pixel electrode234substantively adopt a design of sharing the third scan line SL3, and the design of sharing makes the display panel obtain a favorable aperture ratio.

In the embodiment, the third pixel electrode233is located between the first scan line SL1and the third scan line SL3electrically connected to the third pixel electrode233. The first pixel electrode231and the third pixel electrode233electrically connected to the first scan line SL1are located on the same side of the first scan line SL1. The fourth pixel electrode234is located between the second scan line SL2and the third scan line SL3electrically connected to the fourth pixel electrode234. The second pixel electrode232and the fourth pixel electrode234electrically connected to the second scan line SL2are located on the same side of the second scan line SL2. From another aspect, the third pixel electrode233and the fourth pixel electrode234electrically connected to the third scan line SL3are located on the two sides of the third scan line SL3respectively.

The pixel array substrate230in the embodiment further includes a plurality of capacitors C1and C2. The fifth transistor239aelectrically connects between the corresponding capacitor C1and the corresponding third pixel electrode233. The fifth transistor239belectrically connects between the corresponding capacitor C2and the corresponding fourth pixel electrode234.

In the embodiment, each first pixel electrode231and each third pixel electrode233are substantively located within one pixel, and each fourth pixel electrode234and each second pixel electrode232are substantively located in another identical pixel. In other words, a design of a pixel structure in the embodiment is to divide one pixel into two portions, that is a primary pixel and a secondary pixel. Scan signals are received in coordination with the data line DL and the third scan line SL3to control the fifth transistors239aand239b, and the third pixel electrode233and the fourth pixel electrode234correspondingly connected to the fifth transistors239aand239bare controlled by means of the fifth transistors239aand239b. The primary pixel corresponds to the first pixel electrode231and the second pixel electrode232, and the secondary pixel corresponds to the third pixel electrode233and the fourth pixel electrode234.

Accordingly, the fifth transistor239aelectrically connects between the corresponding capacitor C1and the corresponding third pixel electrode233, and the fifth transistor239belectrically connects between the corresponding capacitor C2and the corresponding fourth pixel electrode234. Thereby, when the third scan line SL3receives a scan signal, voltages of the third pixel electrode233and the fourth pixel electrode234corresponding to the capacitors C1and C2may be changed by means of operation of the capacitors C1and C2. When the voltages of the third pixel electrode233and the fourth pixel electrode234change, a gray scale value within the same pixel differs slightly, in order to improve on the problem of color washout of the display panel200in a large viewing angle.

Besides, both the fifth transistors239aand239bthat may serve as control switches of the third pixel electrode233and the fourth pixel electrode234electrically connect to the third scan line SL3. Compared with the conventional technology of disposing a data line in each pixel, the design of the pixel array substrate230in the embodiment makes each third pixel electrode233and each fourth pixel electrode234share the corresponding third scan line SL3. That means, in the embodiment, the sub-pixel electrodes in every two pixels share a scan line. Compared with the conventional technology of disposing the data line in each pixel, the embodiment obtains a favorable aperture ratio while improving on the problem of color washout of the display panel200in the large viewing angle. Besides, sharing the third scan line SL3reduces the number of driver chips controlling the scan lines, and thereby has the benefit of cost saving.

Referring toFIG. 2again, in the embodiment, the display medium220of the display panel200may be a liquid crystal, and therefore the display panel200in the embodiment is substantively a liquid crystal display panel. Besides, the first substrate210may be a color filter substrate. The color filter substrate may include color filter films of various colors. When light passes through red, green and blue filter films in the color filter substrate, a red light, a green light and a blue light are displayed respectively, and accordingly the display panel200achieves the effect of color display.

The configuration of each element and relevant functions thereof in the display panel200in the embodiment are introduced in the above, and a driving method for driving the display panel200is introduced in the following.FIG. 5is a time sequential waveform diagram of an equivalent circuit of the pixel array substrate inFIG. 4. Referring to bothFIGS. 4 and 5, the driving method includes the following steps. Firstly, a first scan signal S1is provided to a No. i first scan line SL1to turn on a plurality of first transistors235and a plurality of third transistors237electrically connected to the No. i first scan line SL1in a first period t1within a frame period of the display panel200. A plurality of first display data are correspondingly written into a plurality of first pixel electrodes231electrically connected to the plurality of first transistors235electrically connected to the No. i first scan line SL1and a plurality of third pixel electrodes233electrically connected to the plurality of third transistors237electrically connected to the No. i first scan line SL1via a plurality of data lines DL, and the i is an integer equal to or larger than 1.

Then, a second scan signal S2is provided to a No. i second scan line SL2to turn on a plurality of second transistors236and a plurality of fourth transistors238electrically connected to the No. i second scan line SL2, and a plurality of second display data are correspondingly written into a plurality of second pixel electrodes232electrically connected to the plurality of second transistors236electrically connected the No. i second scan line SL2and a plurality of fourth pixel electrodes234electrically connected to the plurality of fourth transistors238electrically connected the No. i second scan line SL2via the plurality of data lines DL in a second period t2within the frame period.

Next, a third scan signal S3is provided to a No. i third scan line SL3to turn on a plurality of fifth transistors239aand239belectrically connected to the No. i third scan line SL3in a third period t3within the frame period. Meanwhile, the plurality of first display data written into the plurality of third pixel electrodes233electrically connected to the fifth transistors239aelectrically connected to the No. i first scan line SL1and the plurality of second display data written into the plurality of fourth pixel electrodes234electrically connected to the fifth transistors239belectrically connected to the No. i second scan line SL2are influenced. Synchronously, a fourth scan signal S4is provided to a No. i+1 first scan line SL12to turn on a plurality of first transistors235and a plurality of third transistors237electrically connected to the No. i+1 first scan line SL12, and a plurality of third display data are correspondingly written into the first pixel electrodes231electrically connected to the first transistors235electrically connected to the No. i+1 first scan line SL12and the third pixel electrodes233electrically connected to the third transistors237electrically connected to the No. i+1 first scan line SL12via the plurality of data lines DL.

Afterwards, a fifth scan signal S5is provided to a No. i+1 second scan line SL22(not shown inFIG. 4and schematically demonstrated inFIG. 5) to turn on a plurality of second transistors236and a plurality of fourth transistors238electrically connected to the No. i+1 second scan line SL22, and a plurality of fourth display data are correspondingly written into a second pixel electrode232electrically connected to the second transistor236electrically connected to the No. i+1 second scan line SL22and a fourth pixel electrode234electrically connected to the No. i+1 second scan line SL22(not shown inFIG. 4) connected to the fourth transistor238correspondingly electrically connected to the No. i+1 second scan line SL22via the plurality of data lines DL in a fourth period t4within the frame period.

More specifically, in the embodiment, since the fifth transistor239aconnects between the third pixel electrode233and a corresponding capacitor C1, and the fifth transistor239bconnects between the fourth pixel electrode234and a corresponding capacitor C2, the fifth transistors239aand239bcontrol the corresponding capacitors C1and C2respectively to influence voltages of the corresponding third pixel electrode233and fourth pixel electrode234when the third scan line SL3receives the third scan signal S3in the third period t3within the frame period.

More concretely, the first pixel electrode231and the third pixel electrode233are located in the same pixel, and the second pixel electrode232and the fourth pixel electrode234are located in the same pixel. Thereby, when the voltages of the third pixel electrode233and the fourth pixel electrode234change, there is a voltage difference between the first pixel electrode231and the third pixel electrode233; on the other hand, there is also a voltage difference between the fourth pixel electrode234and the second pixel electrode232. If there is the voltage difference between the first pixel electrode231and the third pixel electrode233within the same pixel, the gray scale values thereof are different, and the problem that the colors in the display panel200appear lighter in a large viewing angle is improved. Similarly, the same effect is achieved if there is the voltage difference between the second pixel electrode232and the fourth pixel electrode234.

Besides, in the third period t3within the frame period, the fifth transistors239aand239bcontrolling and making each of the pixel electrodes within the same pixel have the voltage difference electrically connect to the third scan line SL3. Thereby, at the mean time that the third scan line SL3receives the third scan signal S3and makes the voltage difference between each of the pixel electrodes within the same pixel change, a fourth scan signal S4may be synchronously provided to the No. i+1 first scan line SL12to turn on the plurality of first transistors235and the plurality of third transistors237electrically connected to the No. i+1 first scan line SL12, and the plurality of third display data may be correspondingly written into the plurality of first pixel electrodes231electrically connected to the plurality of first transistors235electrically connected to the No. i+1 first scan line SL12and the plurality of third pixel electrodes233electrically connected to the plurality of third transistors237electrically connected to the No. i+1 first scan line SL12via the plurality of data lines DL. Besides, although the driving method applies to a circumstance of a forward scan in the display panel200, the driving method in the embodiment is similarly suitable when a circumstance of a reverse scan is adopted in the display panel200. The steps of the reverse scan are similar to those of the forward scan, and therefore the steps are not elaborated here.

Based on the above, the display panel of the invention includes a plurality of third scan lines shared by pixel electrodes within different pixels, and the shared scan lines are used to increase the aperture ratio of the display panel. Besides, the plurality of fifth transistors electrically connected to the third scan lines may serve as the control switches controlling whether the scan signals enter each of the pixel electrodes connected to the third scan lines. In coordination with the capacitors electrically connected to each of the fifth transistors, the voltage of each of the pixel electrodes connected to the third scan lines may be changed, in order to improve on the problem of color washout of the display panel in the large viewing angle. In addition, in the driving method for driving the display panel provided in the invention, the third scan signal may be provided to the No. i third scan line and the fourth scan signal may be provided to the No. i+1 first scan line simultaneously within one particular display period in the frame period, in order to solve the problem of color washout of the display panel. The driving method is suitable for the circumstances of both the forward scan and the reverse scan in the display panel.

Although the invention has been described with reference to the above embodiments, it is apparent to one of ordinary skill in the art that modifications and variations of the described embodiments may be made without departing from the spirit of the invention. Accordingly, the scope of the invention shall be defined by the attached claims, rather than by the above detailed descriptions.