Computing device and method for accessing BIOS using middleware controller of the computing device

A computing device includes a first BIOS chip and a second BIOS chip. Each of the first and second BIOS chips store a BIOS image and comprises a plurality of data blocks to store BIOS data of the BIOS image. During a booting process of the computing device, the BIOS data stored in odd data blocks of the first BIOS chip and the BIOS data stored in even data blocks of the second BIOS chip are respectively accessed and are stored in a cache of a middleware controller. A processor of the computing device accesses the BIOS data from the cache of the middleware controller during the booting process.

BACKGROUND

1. Technical Field

Embodiments of the present disclosure relate to method of accessing basic input output system (BIOS) of computing device, and particularly to a computing device and method for accessing BIOS using a middleware controller of the computing device.

2. Description of Related Art

A basic input/output system (BIOS) is an important program executed during a booting process of computing devices, such as computers and servers. During the booting process, a processor of the computing device will access the BIOS from a BIOS chip. At this time, most hardware components of the computing device are not working. In a traditional BIOS access method, when data error occurs during access of the BIOS, the data cannot be recovered in time, which may cause the computing device to be unstable. Further, since many computing devices only have a single BIOS chip, the traditional method for accessing the BIOS from the single BIOS chip is inefficient. Therefore, there is room for improvement in the art.

DETAILED DESCRIPTION

FIG. 1is a schematic block diagram illustrating one embodiment of a computing device100. The computing device100can be a personal computer or a server. The computing device100includes a first basic input output system (BIOS) chip10, a second BIOS chip11, a middleware controller20, and a host30. Each of the first and second BIOS chips10,11stores a BIOS image, to provide a dual BIOS function for the computing device. The host30includes a motherboard11, a storage32, a processor33, and other relevant components of the computing device100. The middleware controller20can independently work without powering the host30.

In this embodiment, the middleware controller20is a filed programmable gate array (FPGA) chip or a baseboard management controller (BMC). The first BIOS chip10, the second BIOS chip11, the middleware controller20and the host30are directly or indirectly connected with each other for data transmission and interaction. Each of the first BIOS chip10and the second BIOS chip11may be, for example, a flash chip, an erasable programmable read only memory (EPROM) chip, or an electrically erasable programmable read only memory (EEPROM) chip.

FIG. 2shows that each of the first and second BIOS chips10,11includes a plurality of data blocks. The plurality of data blocks includes n first data blocks (e.g., block 1, block 2 . . . block n) and a second data block. The n first data blocks are configured to store BIOS data of the computing device. Each first data block includes a cyclic redundancy check (CRC) column that stores a CRC code. The CRC code is calculated according to the BIOS data stored in a corresponding first data block when the BIS data is written into the first data block. The second data block stores a metadata which describes basic information of the BIOS image of the first and second BIOS chips10,11. The metadata includes a signature indicating a format of the BIOS image, a timestamp indicating time information when the BIOS image is written into the first BIOS chip10or the second BIOS chip, and a size of the BIOS image.

FIG. 3shows a block diagram of the middleware controller20. The middleware controller20accesses the BIOS image of the first and second BIOS chips10,11during a booting process of the computing device100. The middleware controller20includes a BIOS access system21, a storage unit22, a microprocessor23, and a cache24. The BIOS access system21includes a plurality of functional modules. Each of the functional modules may include a plurality of programs in the form of one or more computerized instructions stored in the storage unit22and executed by the microprocessor23to perform operations of the middleware controller20. In the embodiment, the BIOS access system21includes a metadata acquisition module201, a data update module202, a BIOS access module203, a verification module204, a cache module205, and a recovery module206.

FIG. 4shows a flowchart of one embodiment of a BIOS access method device implemented by the functional modules of the BIOS access system21ofFIG. 3. Depending on the embodiment, additional steps may be added, others removed, and the ordering of the steps may be changed.

In step S1, when the computing device100is powered on to boot the computing device100, the metadata acquisition module201acquires the metadata of the first BIOS chip10and the second BIOS chip11.

In step S2, the data update module202determines whether the timestamp of the first BIOS chip10is the same as the timestamp of the second BIOS chip11. If the timestamp of the first BIOS chip10is the same as the timestamp of the second BIOS chip11, step S4is implemented. Otherwise, if the timestamp of the first BIOS chip10is different from the timestamp of the second BIOS chip11step S3is implemented.

In step S3, the data update module202updates the BIOS image of one of the first and second BIOS chips10,11which has an earlier timestamp according to the BIOS image of another of the first and second BIOS chips10,11which has a latest timestamp.

In this embodiment, if the timestamp of the BIOS image of the first BIOS chip10is earlier than the timestamp of the BIOS image of the second BIOS chip11, the data update module202first deletes the BIOS image from the first BIOS chip10, and then copies the BIOS image from the second BIOS chip11to the first BIOS chip10, to update the BIOS image of the first BIOS chip10. Accordingly, if the timestamp of the BIOS image of the second BIOS chip11is earlier than the timestamp of the BIOS image of the first BIOS chip10, the data update module202first deletes the BIOS image from the second BIOS chip11, and then copies the BIOS image from the first BIOS chip10to the second BIOS chip11, to update the BIOS image of the second BIOS chip11. Thus, when the BIOS image of the computing device100needs to be updated, a user only needs to update the BIOS image of one of the first and second BIOS chips10,11, because the BIOS image of another of the first and second BIOS chips10,11can be automatically updated by the data update module202.

In addition, when the first BIOS chip10does not have the BIOS image or the BIOS image of the first BIOS chip10has been damaged, the data update module202copies the BIOS image from the second BIOS chip11to the first BIOS chip10. When the second BIOS chip11does not have the BIOS image or the BIOS image of the second BIOS chip11has been damaged, the data update module202copies the BIOS image from the first BIOS chip10to the second BIOS chip11.

In step S4, the BIOS access module203acquires BIOS data from each odd first data block of the first BIOS chip10and from each even first data block of the second BIOS Chip10, and calculates a CRC code for each first data block Bn according to the acquired BIOS data of the first data block Bn. The first data block Bn can be either the odd first data block of the first BIOS chip10or the even first data block of the second BIOS chip11.

In step S5, the verification module204verifies whether the calculated CRC code is the same as the CRC code stored in the first data block Bn. If the calculated CRC code is the same as the CRC code stored in the first data block Bn, step S6is implemented. Otherwise, if the calculated CRC code is different from the CRC code stored in the first data block Bn, step S7is implemented.

In step S6, the cache module205temporally stores the acquired BIOS data of the first block Bn in the cache24, the procedure goes to step S8.

In step S7, the recovery module206recovers the BIOS data of the first block Bn. In this embodiment, when the calculated CRC code is different from the CRC code stored in the first data block Bn, it indicates that data error of the first data block Bn occurs. If the first data block Bn is the odd first data block of the first BIOS chip10, the recovery module206recovers the BIOS data and the CRC code of first data block Bn of the first BIOS chip10according to the BIOS data and the CRC code of first data block Bn of the second BIOS chip11. In contrast, if the first data block Bn is the even first data block of the second BIOS chip11, the recovery module206recovers the BIOS data and the CRC code of first data block Bn of the second BIOS chip11according to the BIOS data and the CRC code of first data block Bn of the first BIOS chip10. Then the recovered BIOS data is temporally stored in the cache24.

In step S8, the processor33of the computing device100accesses the BIOS data stored in the cache24of the middleware controller20during the booting process of the computing device100.

In view of the above, the BIOS access of the computing device100is performed using the middleware controller20. When data error occurs during the booting process of the computing device100, the BIOS data can be automatically recovered. Thus, the stability of the computing device is improved.