Systems and methods for regulating output currents of power conversion systems

Systems and methods are provided for regulating a power conversion system. An example system controller includes a first controller terminal and a second controller terminal. The first controller terminal is configured to receive a first signal associated with an input signal for a primary winding of a power conversation system. The second controller terminal is configured to output a drive signal to a switch to affect a first current flowing through the primary winding of the power conversion system, the drive signal being associated with an on-time period, the switch being closed during the on-time period. The system controller is configured to adjust a duration of the on-time period based on at least information associated with the first signal.

1. CROSS-REFERENCES TO RELATED APPLICATIONS

This application claims priority to Chinese Patent Application No. 201410157557.6, filed Apr. 18, 2014, commonly assigned, incorporated by reference herein for all purposes.

2. BACKGROUND OF THE INVENTION

The present invention is directed to integrated circuits. More particularly, the invention provides a system and method for current regulation. Merely by way of example, the invention has been applied to power conversion systems in quasi-resonance mode. But it would be recognized that the invention has a much broader range of applicability.

Light emitting diodes (LEDs) are widely used for lighting applications. Oftentimes, approximately constant currents are used to control working currents of LEDs to achieve constant brightness.FIG. 1is a simplified diagram showing a conventional power conversation system for LED lighting. The power conversion system100includes a controller102, resistors104,124,126and132, capacitors106,120and134, a diode108, a transformer110including a primary winding112, a secondary winding114and an auxiliary winding116, a power switch128, a current sensing resistor130, and a rectifying diode118. The controller102includes terminals (e.g., pins)138,140,142,144,146and148. For example, the power switch128is a bipolar junction transistor. In another example, the power switch128is a MOS transistor.

An alternate-current (AC) input voltage152is applied to the system100. A bulk voltage150(e.g., a rectified voltage no smaller than 0 V) associated with the AC input voltage152is received by the resistor104. The capacitor106is charged in response to the bulk voltage150, and a voltage154is provided to the controller102at the terminal138(e.g., terminal VCC). If the voltage154is larger than a predetermined threshold voltage in magnitude, the controller102begins to operate normally, and outputs a drive signal156through the terminal142(e.g., terminal GATE). For example, the drive signal156is a pulse-width-modulation (PWM) signal with a switching frequency and a duty cycle. The switch128is closed (e.g., being turned on) or open (e.g., being turned off) in response to the drive signal156so that the output current158is regulated to be approximately constant.

The auxiliary winding116charges the capacitor106through the diode108when the switch128is opened (e.g., being turned off) in response to the drive signal156so that the controller102can operate normally. For example, a feedback signal160is provided to the controller102through the terminal140(e.g., terminal FB) in order to detect the end of a demagnetization process of the secondary winding118for charging or discharging the capacitor134using an internal error amplifier in the controller102. In another example, the feedback signal160is provided to the controller102through the terminal140(e.g., terminal FB) in order to detect the beginning and the end of the demagnetization process of the secondary winding118. The resistor130is used for detecting a primary current162flowing through the primary winding112, and a current-sensing signal164is provided to the controller102through the terminal144(e.g., terminal CS) to be processed during each switching cycle. Peak magnitudes of the current-sensing signal164are sampled and provided to the internal error amplifier. The capacitor120is used to maintain an output voltage168so as to keep a stable output current through an output load (e.g., one or more LEDs122). For example, the system100operates in a quasi-resonant mode.

FIG. 2is a simplified conventional diagram showing the controller102as part of the system100. The controller102includes a ramp-signal generator202, an under-voltage lock-out (UVLO) component204, a modulation component206, a logic controller208, a driving component210, a demagnetization detector212, an error amplifier216, and a current-sensing component214.

As shown inFIG. 2, the UVLO component204detects the signal154and outputs a signal218. If the signal154is larger than a first predetermined threshold in magnitude, the controller102begins to operate normally. If the signal154is smaller than a second predetermined threshold in magnitude, the controller102is turned off. The second predetermined threshold is smaller than the first predetermined threshold in magnitude. The error amplifier216receives a signal220from the current-sensing component214and a reference signal222and outputs an amplified signal224to the modulation component206. The modulation component206also receives a signal228from the ramp-signal generator202and outputs a modulation signal226. For example, the signal228is a ramping signal and increases, linearly or non-linearly, to a peak magnitude during each switching period. The logic controller208processes the modulation signal226and outputs a control signal230to the driving component210which generates the signal156to turn on or off the switch128. For example, the demagnetization detector212detects the feedback signal160and outputs a signal232for determining the end of the demagnetization process of the secondary winding114. In another example, the demagnetization detector212detects the feedback signal160and outputs the signal232for determining the beginning and the end of the demagnetization process of the secondary winding114. In addition, the demagnetization detector212outputs a trigger signal298to the logic controller208to start a next cycle. The controller102is configured to keep an on-time period associated with the modulation signal226approximately constant for a given output load.

The controller102is operated in a voltage-mode where, for example, the signal224from the error amplifier216and the signal228from the oscillator202are both voltage signals and are compared by the comparator206to generate the modulation signal226to drive the power switch128. Therefore, an on-time period associated with the power switch128is determined by the signal224and the signal228.

FIG. 3is a simplified conventional diagram showing the current-sensing component214and the error amplifier216as parts of the controller102. The current-sensing component214includes a switch302and a capacitor304. The error amplifier216includes switches306and308, an operational transconductance amplifier (OTA)310.

As shown inFIG. 3, the current-sensing component214samples the current-sensing signal164and the error amplifier216amplifies the difference between the signal220and the reference signal222. Specifically, the switch302is closed (e.g., being turned on) or open (e.g., being turned off) in response to a signal314in order to sample peak magnitudes of the current-sensing signal164in different switching periods. If the switch302is closed (e.g., being turned on) in response to the signal314and the switch306is open (e.g., being turned off) in response to the signal232from the demagnetization detector212, the capacitor304is charged and the signal220increases in magnitude. If the switch306is closed (e.g., being turned on) in response to the signal232, the switch308is open (e.g., being turned off) in response to a signal312and the difference between the signal220and the reference signal222is amplified by the amplifier310. The signal312and the signal232are complementary to each other. For example, during the demagnetization process of the secondary winding114, the signal232is at a logic high level. The switch306remains closed (e.g., being turned on) and the switch308remains open (e.g., being turned off). The OTA310, together with the capacitor134, performs integration associated with the signal220.

Under stable normal operations, an average output current is determined, according to the following equation, without taking into account any error current:

Io_=12×N×Vref_eaRcs(Equation⁢⁢1)
where N represents a turns ratio between the primary winding112and the secondary winding114, Vref_earepresents the reference signal222and Rcsrepresents the resistance of the resistor130. As shown in Equation 1, the parameters associated with peripheral components, such as N and Rcs, can be properly selected through system design to achieve output current regulation.

For LED lighting, efficiency, power factor and total harmonic are also important. For example, efficiency is often needed to be as high as possible (e.g., >90%), and a power factor is often needed to be greater than 0.9. Moreover, total harmonic distortion is often needed to be as low as possible (e.g., <10%) for some applications. But the system100often cannot satisfy all these needs.

Hence it is highly desirable to improve the techniques of regulating output currents of power conversion systems.

3. BRIEF SUMMARY OF THE INVENTION

The present invention is directed to integrated circuits. More particularly, the invention provides a system and method for current regulation. Merely by way of example, the invention has been applied to power conversion systems. But it would be recognized that the invention has a much broader range of applicability.

According to one embodiment, a system controller for regulating a power conversion system includes a first controller terminal and a second controller terminal. The first controller terminal is configured to receive a first signal associated with an input signal for a primary winding of a power conversation system. The second controller terminal is configured to output a drive signal to a switch to affect a first current flowing through the primary winding of the power conversion system, the drive signal being associated with an on-time period, the switch being closed during the on-time period. The system controller is configured to adjust a duration of the on-time period based on at least information associated with the first signal.

According to another embodiment, a system controller for regulating a power conversion system includes a first controller terminal, a ramp-signal generator, and a second controller terminal. The first controller terminal is configured to provide a compensation signal based on at least information associated with a first current flowing through a primary winding of a power conversion system. The ramp-signal generator is configured to receive a first signal associated with the compensation signal and generate a ramping signal based on at least information associated with the first signal, the ramping signal being associated with a ramping slope. The second controller terminal is configured to output a drive signal to a switch based on at least information associated with the ramping signal to affect the first current. The system controller is configured to adjust the ramping slope of the ramping signal based on at least information associated with the compensation signal.

According to yet another embodiment, a method for regulating a power conversion system includes: receiving a first signal from a first controller terminal, the first signal being associated with an input signal for a primary winding of a power conversation system; adjusting a duration of an on-time period related to a drive signal based on at least information associated with the first signal; and outputting the drive signal from a second controller terminal to a switch to affect a first current flowing through the primary winding of the power conversion system, the switch being closed during the on-time period.

According to yet another embodiment, a method for regulating a power conversion system includes: providing a compensation signal by a first controller terminal based on at least information associated with a first current flowing through a primary winding of a power conversion system; generating a first signal based on at least information associated with the compensation signal; and processing information associated with the first signal. The method further includes: adjusting a ramping slope associated with a ramping signal based on at least information associated with the first signal; receiving the ramping signal; generating a drive signal based on at least information associated with the ramping signal; and outputting the drive signal from a second controller terminal to a switch to affect the first current.

Depending upon embodiment, one or more benefits may be achieved. These benefits and various additional objects, features and advantages of the present invention can be fully appreciated with reference to the detailed description and accompanying drawings that follow.

5. DETAILED DESCRIPTION OF THE INVENTION

The present invention is directed to integrated circuits. More particularly, the invention provides a system and method for current regulation. Merely by way of example, the invention has been applied to power conversion systems. But it would be recognized that the invention has a much broader range of applicability.

FIG. 4(a)is a simplified diagram showing a power conversion system according to an embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. The system400includes a controller402, resistors404,424,426,432,466and498, capacitors406,420,434and470, a diode408, a transformer410including a primary winding412, a secondary winding414and an auxiliary winding416, a power switch428, a current sensing resistor430, and a rectifying diode418. The controller402includes terminals (e.g., pins)438,440,442,444,446,448and464. For example, the power switch428includes a bipolar junction transistor. In another example, the power switch428includes a MOS transistor. In yet another example, the power switch428includes an insulated-gate bipolar transistor. The system400provides power to an output load422, e.g., one or more LEDs. In some embodiments, the resistor432is removed. For example, the system400operates in a quasi-resonant mode.

According to one embodiment, an alternate-current (AC) input voltage452is applied to the system400. For example, a bulk voltage450(e.g., a rectified voltage no smaller than 0 V) associated with the AC input voltage452is received by the resistor404. In another example, the capacitor406is charged in response to the bulk voltage450, and a voltage454is provided to the controller402at the terminal438(e.g., terminal VCC). In yet another example, if the voltage454is larger than a predetermined threshold voltage in magnitude, the controller402begins to operate normally, and outputs a signal through the terminal442(e.g., terminal GATE). In yet another example, the switch428is closed (e.g., being turned on) or open (e.g., being turned off) in response to a drive signal456so that the output current458is regulated to be approximately constant.

According to another embodiment, the auxiliary winding416charges the capacitor406through the diode408when the switch428is opened (e.g., being turned off) in response to the drive signal456so that the controller402can operate normally. For example, a feedback signal460is provided to the controller402through the terminal440(e.g., terminal FB) in order to detect the end of a demagnetization process of the secondary winding414for charging or discharging the capacitor434using an internal error amplifier in the controller402. In another example, the feedback signal460is provided to the controller402through the terminal440(e.g., terminal FB) in order to detect the beginning and the end of the demagnetization process of the secondary winding414. As an example, the capacitor434is charged or discharged in response to a compensation signal474at the terminal448(e.g., terminal COMP). In another example, the resistor430is used for detecting a primary current462flowing through the primary winding412, and a current-sensing signal496is provided to the controller402through the terminal444(e.g., terminal CS) to be processed during each switching cycle. In yet another example, peak magnitudes of the current-sensing signal496are sampled and provided to the internal error amplifier. In yet another example, the capacitor434is coupled to an output terminal of the internal error amplifier. In yet another example, the capacitor420is used to maintain an output voltage468.

According to yet another embodiment, the bulk voltage450is sensed by the controller402through the terminal464(e.g., terminal VAC). For example, the controller402includes a ramp-signal generator which generates a ramping signal, and the controller402is configured to change the ramping slope of the ramping signal based on at least information associated with a signal472related to the bulk voltage450. In another example, an on-time period associated with the drive signal456varies based on at least information associated with the signal450. As an example, the duration of the on-time period increases when the bulk voltage450is at a peak magnitude. In another example, the duration of the on-time period decreases when the bulk voltage450is at a valley magnitude. The signal472is determined according to the following equation:

VAC=R9R8+R9×Vbulk(Equation⁢⁢2)Vbulk=A⁢⁢sin⁡(ω⁢⁢t+ϕ)(Equation⁢⁢3)
where VAC represents the signal472, Vbulkrepresents the bulk voltage450, R8represents a resistance of the resistor466, and R9represents a resistance of the resistor498. In addition, A represents a magnitude, ω represents a frequency, and φ represents a phase angle. In some embodiments, the controller is configured to adjust the ramping signal based on information associated with both the signal472and the compensation signal474. In certain embodiments, the controller402is configured to adjust the ramping slope of the ramping signal based on information associated with the signal472or the compensation signal474.

FIG. 4(b)is a simplified diagram showing the controller402as part of the power conversion system400according to an embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. The controller402includes a ramp-signal generator602, an under-voltage lock-out (UVLO) component604, a modulation component606, a logic controller608, a driving component610, a demagnetization detector612, an error amplifier616, a current-sensing-and-sample/hold component614, a jittering-signal generator699, and voltage-to-current-conversion components640and642.

According to one embodiment, the UVLO component604detects the signal454and outputs a signal618. For example, if the signal454is larger than a first predetermined threshold in magnitude, the controller402begins to operate normally. If the signal454is smaller than a second predetermined threshold in magnitude, the controller402is turned off. In another example, the second predetermined threshold is smaller than the first predetermined threshold in magnitude. In yet another example, the error amplifier616receives a signal620from the current-sensing-and-sample/hold component614and a reference signal622, and the signal474is provided to the modulation component606and the voltage-to-current-conversion component642. As an example, the voltage-to-current-conversion component640receives the signal472and outputs a signal636to the ramp-signal generator602. In another example, the ramp-signal generator602also receives a current signal694and a jittering signal697(e.g., a jittering current) generated by the jittering-signal generator699and generates a ramping signal628.

According to another embodiment, the jittering current697flows from the jittering-signal generator699to the ramp-signal generator602. For example, the jittering current697flows from the ramp-signal generator602to the jittering-signal generator699. In another example, the modulation component606receives the ramping signal628and outputs a modulation signal626. For example, the signal628increases, linearly or non-linearly, to a peak magnitude during each switching period. The logic controller608processes the modulation signal626and outputs a control signal630to the current-sensing-and-sample/hold component614and the driving component610.

According to yet another embodiment, the current-sensing-and-sample/hold component614samples the current sensing signal496in response to the control signal630and then holds the sampled signal until the current-sensing-and-sample/hold component614samples again the current sensing signal496. For example, the driving component610generates a signal656related to the drive signal456to affect the switch428. As an example, the demagnetization detector612detects the feedback signal460and outputs a demagnetization signal632for determining the end of the demagnetization process of the secondary winding414. As another example, the demagnetization detector612detects the feedback signal460and outputs the demagnetization signal632for determining the beginning and the end of the demagnetization process of the secondary winding414. In yet another example, the demagnetization detector612outputs a trigger signal698to the logic controller608to start a next cycle (e.g., corresponding to a next switching period). In yet another example, when the signal656is at a logic high level, the signal456is at a logic high level, and when the signal656is at a logic low level, the signal456is at a logic low level. In yet another example, the capacitor434is coupled to the terminal448and forms, together with the error amplifier616, an integrator or a low-pass filter. In yet another example, the error amplifier616is a transconductance amplifier and outputs a current which is proportional to a difference between the reference signal622and the signal620. In yet another example, the error amplifier616together with the capacitor434generates the signal474which is a voltage signal. In yet another example, the ramping slope of the ramping signal628is modulated in response to the jittering signal697.

In some embodiments, the jittering signal697corresponds to a deterministic signal, such as a triangle waveform (e.g., with a frequency of several hundred Hz), or a sinusoidal waveform (e.g., with a frequency of several hundred Hz). For example, the jittering signal697is associated with multiple jittering cycles corresponding to a predetermined jittering frequency (e.g., approximately constant) related to a predetermined jittering period (e.g., approximately constant). As an example, the signal656is associated with multiple modulation cycles corresponding to a modulation frequency (e.g., not constant) related to a modulation period (e.g., not constant). In another example, the system controller402changes the ramping slope associated with the ramping signal628based on at least information associated with the jittering signal628so that, within a same jittering cycle of the multiple jittering cycles, the ramping slope is changed (e.g., increased, or decreased) by different magnitudes corresponding to different modulation cycles respectively. In yet another example, the ramping slope is changed during different modulation cycles adjacent to each other. In yet another example, the ramping slope is changed during different modulation cycles not adjacent to each other. In yet another example, the system controller402adjusts the modulation frequency based on at least information associated with the changed ramping slope.

In certain embodiments, the jittering signal697corresponds to a random (e.g., pseudo-random) signal with a random (e.g., pseudo-random) waveform. For example, the system controller402changes the ramping slope associated with the ramping signal628based on at least information associated with the random jittering signal628so that the ramping slope is changed by random magnitudes corresponding to different modulation cycles respectively. In yet another example, the ramping slope is changed during different modulation cycles that are adjacent to each other. In yet another example, the ramping slope is changed during different modulation cycles that are not adjacent to each other. In yet another example, the system controller402adjusts the modulation frequency based on at least information associated with the ramping slope changed by the random magnitudes.

In some embodiments, the signal636represents a current and is used for adjusting a ramping slope associated with the ramping signal628. In certain embodiments, the signal638represents a current and is used for adjusting the ramping slope associated with the ramping signal628. For example, information associated with both the signal636and the signal638is used for adjusting the ramping slope associated with the ramping signal628, so as to adjust the duration of an on-time period associated with the drive signal456. In another example, the current636flows from the voltage-to-current-conversion component640to the ramp-signal generator602. In yet another example, the current636flows from the ramp-signal generator602to the voltage-to-current-conversion component640. In yet another example, the current638flows from the voltage-to-current-conversion component642to the ramp-signal generator602. In yet another example, the current638flows from the ramp-signal generator602to the voltage-to-current-conversion component642.

FIG. 4(c)is a simplified timing diagram for the controller402as part of the power conversion system400according to an embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. The waveform902represents the signal626as a function of time, the waveform904represents the signal656as a function of time, the wave form906represents the demagnetization signal632as a function of time, the waveform908represents the trigger signal698as a function of time, and the waveform910represents the ramping signal628as a function of time.

An on-time period and an off-time period associated with the signal656are shown inFIG. 4(c). The on-time period begins at a time t3and ends at a time t5, and the off-time period begins at the time t5and ends at a time t7. For example, t0≦t1≦t2≦t3≦t4≦t5≦t6≦t7.

According to one embodiment, at t0, the demagnetization signal632changes from the logic low level to the logic high level. For example, the demagnetization detector612generates a pulse (e.g., between t0and t2) in the trigger signal698to trigger a new cycle. As an example, the ramping signal628begins to increases from a magnitude912to a magnitude914(e.g., at t4). In another example, at t1, the signal626changes from the logic low level to the logic high level. After a short delay, the signal656changes (e.g., at t3) from the logic low level to the logic high level, and in response the switch428is turned on. In yet another example, at t4, the signal626changes from the logic high level to the logic low level, and the ramping signal628decreases from the magnitude914to the magnitude912. After a short delay, the signal656changes (e.g., at t5) from the logic high level to the logic low level, and in response, the switch428is turned off. As an example, at t6, the demagnetization signal632changes from the logic low level to the logic high level which indicates a beginning of a demagnetization process. In another example, at t7, the demagnetization signal632changes from the logic high level to the logic low level which indicates an end of the demagnetization process. In yet another example, the demagnetization detector612generates another pulse in the trigger signal698to start a next cycle. In yet another example, the magnitude914of the ramping signal628is associated with the magnitude of the signal474.

According to another embodiment, the magnitude change of the ramping signal628during the on-time period is determined as follows:
ΔVramp=Vcomp−Vref_1=slope×Ton(Equation 4)
where ΔVramprepresents the magnitude changes of the ramping signal628, Vcomprepresents the signal474, Vref_1represents a predetermined voltage magnitude, slope represents a ramping slope associated with the ramping signal628, and Tonrepresents the duration of the on-time period. For example, Vref_1corresponds to a minimum magnitude of the ramping signal628. Based on Equation 4, the duration of the on-time period is determined as follows:

As shown in Equation 5, for a given compensation signal (e.g., the signal474), the duration of the on-time period is determined by the ramping slope of the ramping signal628. In some embodiments, the ramping slope of the ramping signal628is adjusted according to the signal636and the signal638, so that the duration of the on-time period associated with the drive signal456is adjusted. For example, adjusting the ramping slope of the ramping signal628to change the duration of the on-time period is applicable to power conversion systems with a buck-boost topology operated in a quasi-resonant (QR) mode. In another example, a slope of the waveform910between t1and t4corresponds to the ramping slope of the ramping signal628.

As discussed above and further emphasized here,FIGS. 4(b) and 4(c)are merely examples, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. For example, the voltage-to-current-conversion component642is removed from the controller402, as shown inFIG. 4(d).

FIG. 4(d)is a simplified diagram showing the controller402as part of the power conversion system400according to another embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. The controller402includes a ramp-signal generator1402, an under-voltage lock-out (UVLO) component1404, a modulation component1406, a logic controller1408, a driving component1410, a demagnetization detector1412, an error amplifier1416, a current-sensing-and-sample/hold component1414, a jittering-signal generator1499, and a voltage-to-current-conversion component1440.

In some embodiments, the ramp-signal generator1402receives a current signal1494, a jittering signal1497(e.g., a jittering current) generated by the jittering-signal generator1499and a signal1436from the voltage-to-current-conversion component1440and outputs a ramping signal1428. For example, the jittering current1497flows from the jittering-signal generator1499to the ramp-signal generator1402. In another example, the jittering current1497flows from the ramp-signal generator1402to the jittering-signal generator1499. For example, a ramping slope associated with the ramping signal1428is adjusted based on at least information associated with the signal1436that is related to the bulk voltage450. The operations of other components inFIG. 4(d)are similar to what are described inFIG. 4(b). For example, the timing diagram for the controller402as part of the system400is similar to what is shown inFIG. 4(c). As an example, the signal1436represents a current. In another example, the current1436flows from the voltage-to-current-conversion component1440to the ramp-signal generator1402. In yet another example, the current1436flows from the ramp-signal generator1402to the voltage-to-current-conversion component1440. In yet another example, the ramping slope of the ramping signal1428is modulated in response to the jittering signal1497.

In certain embodiments, the jittering signal1497corresponds to a deterministic signal, such as a triangle waveform (e.g., with a frequency of several hundred Hz), or a sinusoidal waveform (e.g., with a frequency of several hundred Hz). For example, the jittering signal1497is associated with multiple jittering cycles corresponding to a predetermined jittering frequency (e.g., approximately constant) related to a predetermined jittering period (e.g., approximately constant). As an example, the signal1456is associated with multiple modulation cycles corresponding to a modulation frequency (e.g., not constant) related to a modulation period (e.g., not constant). In another example, the system controller402changes the ramping slope associated with the ramping signal1428based on at least information associated with the jittering signal1428so that, within a same jittering cycle of the multiple jittering cycles, the ramping slope is changed (e.g., increased, or decreased) by different magnitudes corresponding to different modulation cycles respectively. In yet another example, the ramping slope is changed during different modulation cycles adjacent to each other. In yet another example, the ramping slope is changed during different modulation cycles not adjacent to each other. In yet another example, the system controller402adjusts the modulation frequency based on at least information associated with the changed ramping slope.

In certain embodiments, the jittering signal1497corresponds to a random (e.g., pseudo-random) signal with a random (e.g., pseudo-random) waveform. For example, the system controller402changes the ramping slope associated with the ramping signal1428based on at least information associated with the random jittering signal1428so that the ramping slope is changed by random magnitudes corresponding to different modulation cycles respectively. In yet another example, the ramping slope is changed during different modulation cycles that are adjacent to each other. In yet another example, the ramping slope is changed during different modulation cycles that are not adjacent to each other. In yet another example, the system controller402adjusts the modulation frequency based on at least information associated with the ramping slope changed by the random magnitudes.

As discussed above and further emphasized here,FIG. 4(a),FIG. 4(b),FIG. 4(c), and/orFIG. 4(d)are merely examples, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. For example, the ramping slope associated with an internal ramping signal in a controller is adjusted using a current signal associated with a bulk voltage, as shown inFIG. 5(a),FIG. 5(b), andFIG. 5(c).

FIG. 5(a)is a simplified diagram showing a power conversion system according to another embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. The system800includes a controller802, resistors804,824,826,832and866, capacitors806,820, and834, a diode808, a transformer810including a primary winding812, a secondary winding814and an auxiliary winding816, a power switch828, a current sensing resistor830, and a rectifying diode818. The controller802includes terminals (e.g., pins)838,840,842,844,846,848and864. For example, the power switch828includes a bipolar junction transistor. In another example, the power switch828includes a MOS transistor. In yet another example, the power switch828includes an insulated-gate bipolar transistor. The system800provides power to an output load822, e.g., one or more LEDs. In some embodiments, the resistor832is removed. For example, the system800operates in a quasi-resonant mode.

According to one embodiment, an alternate-current (AC) input voltage852is applied to the system800. For example, a bulk voltage850(e.g., a rectified voltage no smaller than 0 V) associated with the AC input voltage852is received by the resistor804. In another example, the capacitor806is charged in response to the bulk voltage850, and a voltage854is provided to the controller802at the terminal838(e.g., terminal VCC). In yet another example, if the voltage854is larger than a predetermined threshold voltage in magnitude, the controller802begins to operate normally, and outputs a signal through the terminal842(e.g., terminal GATE). In yet another example, the switch828is closed (e.g., being turned on) or open (e.g., being turned off) in response to a drive signal856so that the output current858is regulated to be approximately constant.

According to another embodiment, the auxiliary winding816charges the capacitor806through the diode808when the switch828is opened (e.g., being turned off) in response to the drive signal856so that the controller802can operate normally. For example, a feedback signal860is provided to the controller802through the terminal840(e.g., terminal FB) in order to detect the end of a demagnetization process of the secondary winding814for charging or discharging the capacitor834using an internal error amplifier in the controller802. In another example, the feedback signal860is provided to the controller802through the terminal840(e.g., terminal FB) in order to detect the beginning and the end of the demagnetization process of the secondary winding814. As an example, the capacitor834is charged or discharged in response to a compensation signal874at the terminal848(e.g., terminal COMP). In another example, the resistor830is used for detecting a primary current862flowing through the primary winding812, and a current-sensing signal896is provided to the controller802through the terminal844(e.g., terminal CS) to be processed during each switching cycle. In yet another example, peak magnitudes of the current-sensing signal896are sampled and provided to the internal error amplifier. In yet another example, the capacitor834is coupled to an output terminal of the internal error amplifier. In yet another example, the capacitor820is used to maintain an output voltage868.

According to yet another embodiment, the bulk voltage850is sensed by the controller802through the terminal864(e.g., terminal IAC). For example, the controller802includes a ramp-signal generator which generates a ramping signal, and the controller802is configured to change the ramping slope of the ramping signal based on at least information associated with a signal872related to the bulk voltage850. In another example, an on-time period associated with the drive signal856varies based on at least information associated with the signal850. As an example, the duration of the on-time period increases when the bulk voltage850is at a peak magnitude. In another example, the duration of the on-time period decreases when the bulk voltage850is at a valley magnitude. The signal872is determined according to the following equation:

Iac=μ×VbulkR8(Equatio⁢⁢n⁢⁢6)
where Iacrepresents the signal872, Vbulkrepresents the bulk voltage850, R8represents a resistance of the resistor866, and μ represents a constant.

In some embodiments, the controller is configured to adjust the ramping signal based on information associated with both the signal872and the compensation signal874. In certain embodiments, the controller is configured to adjust the ramping signal based on information associated with the signal872or the compensation signal874.

FIG. 5(b)is a simplified diagram showing the controller802as part of the power conversion system800according to an embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. The controller802includes a ramp-signal generator1002, an under-voltage lock-out (UVLO) component1004, a modulation component1006, a logic controller1008, a driving component1010, a demagnetization detector1012, an error amplifier1016, a current-sensing-and-sample/hold component1014, another current-sensing component1040, a jittering-signal generator1099, and a voltage-to-current-conversion components1042.

According to one embodiment, the UVLO component1004detects the signal854and outputs a signal1018. For example, if the signal854is larger than a first predetermined threshold in magnitude, the controller802begins to operate normally. If the signal854is smaller than a second predetermined threshold in magnitude, the controller802is turned off. In yet another example, the second predetermined threshold is smaller than the first predetermined threshold in magnitude. In yet another example, the error amplifier1016receives a signal1020from the current-sensing-and-sample/hold component1014and a reference signal1022, and the signal874is provided to the modulation component1006and the voltage-to-current-conversion component1042. As an example, the current-sensing component1040receives the signal872and outputs a signal1036to the ramp-signal generator1002which also receives a current signal1094and a jittering signal1097(e.g., a jittering current) generated by the jittering-signal generator1099. In another example, the jittering current1097flows from the jittering-signal generator1099to the ramp-signal generator1002. In yet another example, the jittering current1097flows from the ramp-signal generator1002to the jittering-signal generator1099. In yet another example, the modulation component1006receives a ramping signal1028from the ramp-signal generator1002and outputs a modulation signal1026. For example, the signal1028increases, linearly or non-linearly, to a peak magnitude during each switching period. The logic controller1008processes the modulation signal1026and outputs a control signal1030to the current-sensing-and-sample/hold component1014and the driving component1010. For example, the driving component1010generates a signal1056related to the drive signal856to affect the switch828. As an example, the demagnetization detector1012detects the feedback signal860and outputs a demagnetization signal1032for determining the end of the demagnetization process of the secondary winding814. As another example, the demagnetization detector1012detects the feedback signal860and outputs the demagnetization signal1032for determining the beginning and the end of the demagnetization process of the secondary winding814. In another example, the demagnetization detector1012outputs a trigger signal1098to the logic controller1008to start a next modulation cycle. In yet another example, when the signal1056is at a logic high level, the signal856is at a logic high level, and when the signal1056is at a logic low level, the signal856is at a logic low level. In yet another example, the ramping slope of the ramping signal1028is modulated in response to the jittering signal1097.

In some embodiments, the jittering signal1097corresponds to a deterministic signal, such as a triangle waveform (e.g., with a frequency of several hundred Hz), or a sinusoidal waveform (e.g., with a frequency of several hundred Hz). For example, the jittering signal1097is associated with multiple jittering cycles corresponding to a predetermined jittering frequency (e.g., approximately constant) related to a predetermined jittering period (e.g., approximately constant). As an example, the signal1056is associated with multiple modulation cycles corresponding to a modulation frequency (e.g., not constant) related to a modulation period (e.g., not constant). In another example, the system controller802changes the ramping slope associated with the ramping signal1028based on at least information associated with the jittering signal1028so that, within a same jittering cycle of the multiple jittering cycles, the ramping slope is changed (e.g., increased, or decreased) by different magnitudes corresponding to different modulation cycles respectively. In yet another example, the ramping slope is changed during different modulation cycles adjacent to each other. In yet another example, the ramping slope is changed during different modulation cycles not adjacent to each other. In yet another example, the system controller802adjusts the modulation frequency based on at least information associated with the changed ramping slope.

In certain embodiments, the jittering signal1097corresponds to a random (e.g., pseudo-random) signal with a random (e.g., pseudo-random) waveform. For example, the system controller802changes the ramping slope associated with the ramping signal1028based on at least information associated with the random jittering signal1028so that the ramping slope is changed by random magnitudes corresponding to different modulation cycles respectively. In yet another example, the ramping slope is changed during different modulation cycles that are adjacent to each other. In yet another example, the ramping slope is changed during different modulation cycles that are not adjacent to each other. In yet another example, the system controller802adjusts the modulation frequency based on at least information associated with the ramping slope changed by the random magnitudes.

In some embodiments, the signal1036represents a current and is used for adjusting a ramping slope associated with the ramping signal1028. In certain embodiments, the signal1038represents a current and is used for adjusting the ramping slope associated with the ramping signal1028. For example, information associated with both the signal1036and the signal1038is used for adjusting the ramping slope associated with the ramping signal1028, so as to adjust the duration of an on-time period associated with the drive signal856. For example, the timing diagram for the controller802as part of the system800is similar to what is shown inFIG. 4(c). In another example, the current1036flows from the current-sensing component1040to the ramp-signal generator1002. In yet another example, the current1036flows from the ramp-signal generator1002to the current-sensing component1040. In yet another example, the current1038flows from the voltage-to-current-conversion component1042to the ramp-signal generator1002. In yet another example, the current1038flows from the ramp-signal generator1002to the voltage-to-current-conversion component1042.

FIG. 5(c)is a simplified diagram showing the controller802as part of the power conversion system800according to another embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. The controller802includes a ramp-signal generator1502, an under-voltage lock-out (UVLO) component1504, a modulation component1506, a logic controller1508, a driving component1510, a demagnetization detector1512, an error amplifier1516, a current-sensing-and-sample/hold component1514, a jittering-signal generator1599, and another current-sensing component1540.

In some embodiments, the ramp-signal generator1502receives a current signal1594, a jittering signal1597(e.g., a jittering current) generated by the jittering-signal generator1599, and a signal1536from the current-sensing component1540and outputs a ramping signal1528. As an example, the jittering current1597flows from the jittering-signal generator1599to the ramp-signal generator1502. As another example, the jittering current1597flows from the ramp-signal generator1502to the jittering-signal generator1599. For example, a ramping slope associated with the ramping signal1528is adjusted based on at least information associated with the signal1536that is related to a current signal associated with the bulk voltage850. The operations of other components inFIG. 5(c)are similar to what are described inFIG. 5(b). As an example, the signal1536represents a current. In another example, the current1536flows from the current-sensing component1540to the ramp-signal generator1502. In yet another example, the current1536flows from the ramp-signal generator1502to the current-sensing component1540. In yet another example, the ramping slope of the ramping signal1528is modulated in response to the jittering signal1597.

In some embodiments, the jittering signal1597corresponds to a deterministic signal, such as a triangle waveform (e.g., with a frequency of several hundred Hz), or a sinusoidal waveform (e.g., with a frequency of several hundred Hz). For example, the jittering signal1597is associated with multiple jittering cycles corresponding to a predetermined jittering frequency (e.g., approximately constant) related to a predetermined jittering period (e.g., approximately constant). As an example, the signal1556is associated with multiple modulation cycles corresponding to a modulation frequency (e.g., not constant) related to a modulation period (e.g., not constant). In another example, the system controller802changes the ramping slope associated with the ramping signal1528based on at least information associated with the jittering signal1528so that, within a same jittering cycle of the multiple jittering cycles, the ramping slope is changed (e.g., increased, or decreased) by different magnitudes corresponding to different modulation cycles respectively. In yet another example, the ramping slope is changed during different modulation cycles adjacent to each other. In yet another example, the ramping slope is changed during different modulation cycles not adjacent to each other. In yet another example, the system controller802adjusts the modulation frequency based on at least information associated with the changed ramping slope.

In certain embodiments, the jittering signal1597corresponds to a random (e.g., pseudo-random) signal with a random (e.g., pseudo-random) waveform. For example, the system controller802changes the ramping slope associated with the ramping signal1528based on at least information associated with the random jittering signal1528so that the ramping slope is changed by random magnitudes corresponding to different modulation cycles respectively. In yet another example, the ramping slope is changed during different modulation cycles that are adjacent to each other. In yet another example, the ramping slope is changed during different modulation cycles that are not adjacent to each other. In yet another example, the system controller802adjusts the modulation frequency based on at least information associated with the ramping slope changed by the random magnitudes.

As discussed above and further emphasized here,FIG. 4(a),FIG. 4(b),FIG. 5(a), and/orFIG. 5(b)are merely examples, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. For example, a terminal (e.g., the terminal464, the terminal864) configured to receive signals related to a bulk voltage (e.g., the bulk voltage450, the bulk voltage850) is removed from a controller (e.g., the controller402, the controller802) for a power conversion system, as shown inFIG. 6(a)andFIG. 6(b).

FIG. 6(a)is a simplified diagram showing a power conversion system according to yet another embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. The system500includes a controller502, resistors504,524,526and532, capacitors506,520and534, a diode508, a transformer510including a primary winding512, a secondary winding514and an auxiliary winding516, a power switch528, a current sensing resistor530, and a rectifying diode518. The controller502includes terminals (e.g., pins)538,540,542,544,546and548. For example, the power switch528is a bipolar junction transistor. In another example, the power switch528is a MOS transistor. In yet another example, the power switch528includes an insulated-gate bipolar transistor. The system500provides power to an output load522, e.g., one or more LEDs. In some embodiments, the resistor532is removed. For example, the system500operates in a quasi-resonant mode.

According to one embodiment, an alternate-current (AC) input voltage552is applied to the system500. For example, a bulk voltage550(e.g., a rectified voltage no smaller than 0 V) associated with the AC input voltage552is received by the resistor504. In another example, the capacitor506is charged in response to the bulk voltage550, and a voltage554is provided to the controller502at the terminal538(e.g., terminal VCC). In yet another example, if the voltage554is larger than a predetermined threshold voltage in magnitude, the controller502begins to operate normally, and outputs a signal through the terminal542(e.g., terminal GATE). In yet another example, the switch528is closed (e.g., being turned on) or open (e.g., being turned off) in response to a drive signal556so that the output current558is regulated to be approximately constant.

According to another embodiment, the auxiliary winding516charges the capacitor506through the diode508when the switch528is opened (e.g., being turned off) in response to the drive signal556so that the controller502can operate normally. For example, a feedback signal560is provided to the controller502through the terminal540(e.g., terminal FB) in order to detect the end of a demagnetization process of the secondary winding514for charging or discharging the capacitor534using an internal error amplifier in the controller502. In another example, the feedback signal560is provided to the controller502through the terminal540(e.g., terminal FB) in order to detect the beginning and the end of the demagnetization process of the secondary winding514. As an example, the capacitor534is charged or discharged in response to a compensation signal574provided at the terminal548(e.g., terminal COMP). In another example, the resistor530is used for detecting a primary current562flowing through the primary winding512, and a current-sensing signal564is provided to the controller502through the terminal544(e.g., terminal CS) to be processed during each switching cycle. In yet another example, peak magnitudes of the current-sensing signal564are sampled and provided to the internal error amplifier. In yet another example, the capacitor520is used to maintain an output voltage568. In some embodiments, the controller502includes a ramp-signal generator which generates a ramping signal, and the controller502is configured to change the ramping slope of the ramping signal based on at least information associated with the compensation signal574.

FIG. 6(b)is a simplified diagram showing the controller502as part of the power conversion system500according to an embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. The controller502includes a ramp-signal generator702, an under-voltage lock-out (UVLO) component704, a modulation component706, a logic controller708, a driving component710, a demagnetization detector712, an error amplifier716, a current-sensing-and-sample/hold component714, a jittering-signal generator799, and a voltage-to-current-conversion component742.

According to one embodiment, the UVLO component704detects the signal554and outputs a signal718. For example, if the signal554is larger than a first predetermined threshold in magnitude, the controller502begins to operate normally. If the signal554is smaller than a second predetermined threshold in magnitude, the controller502is turned off. In another example, the second predetermined threshold is smaller than the first predetermined threshold in magnitude. In yet another example, the error amplifier716receives a signal720from the current-sensing-and-sample/hold component714and a reference signal722and the compensation signal574is provided to the modulation component706and the voltage-to-current-conversion component742. In yet another example, the voltage-to-current-conversion component742receives the signal574and outputs a signal738to the ramp-signal generator702which also receives a current signal794and a jittering signal797(e.g., a jittering current) generated by the jittering-signal generator799. In yet another example, the jittering current797flows from the jittering-signal generator799to the ramp-signal generator702. In yet another example, the jittering current797flows from the ramp-signal generator702to the jittering-signal generator799. In yet another example, the modulation component706receives a ramping signal728from the ramp-signal generator702and outputs a modulation signal726. For example, the signal728increases, linearly or non-linearly, to a peak magnitude during each switching period. In another example, the logic controller708processes the modulation signal726and outputs a control signal730to the current-sensing-and-sample/hold component714and the driving component710. In yet another example, the driving component710generates a signal756associated with the drive signal556to affect the switch528. As an example, the demagnetization detector712detects the feedback signal560and outputs a signal732for determining the end of the demagnetization process of the secondary winding514. As another example, the demagnetization detector712detects the feedback signal560and outputs the signal732for determining the beginning and the end of the demagnetization process of the secondary winding514. In another example, the demagnetization detector712outputs a trigger signal798to the logic controller708to start a next cycle (e.g., corresponding to a next switching period). In yet another example, when the signal756is at a logic high level, the signal556is at a logic high level, and when the signal756is at a logic low level, the signal556is at a logic low level. In yet another example, the ramping slope of the ramping signal728is modulated in response to the jittering signal797.

In some embodiments, the jittering signal797corresponds to a deterministic signal, such as a triangle waveform (e.g., with a frequency of several hundred Hz), or a sinusoidal waveform (e.g., with a frequency of several hundred Hz). For example, the jittering signal797is associated with multiple jittering cycles corresponding to a predetermined jittering frequency (e.g., approximately constant) related to a predetermined jittering period (e.g., approximately constant). As an example, the signal756is associated with multiple modulation cycles corresponding to a modulation frequency (e.g., not constant) related to a modulation period (e.g., not constant). In another example, the system controller502changes the ramping slope associated with the ramping signal728based on at least information associated with the jittering signal728so that, within a same jittering cycle of the multiple jittering cycles, the ramping slope is changed (e.g., increased, or decreased) by different magnitudes corresponding to different modulation cycles respectively. In yet another example, the ramping slope is changed during different modulation cycles adjacent to each other. In yet another example, the ramping slope is changed during different modulation cycles not adjacent to each other. In yet another example, the system controller502adjusts the modulation frequency based on at least information associated with the changed ramping slope.

In certain embodiments, the jittering signal797corresponds to a random (e.g., pseudo-random) signal with a random (e.g., pseudo-random) waveform. For example, the system controller502changes the ramping slope associated with the ramping signal728based on at least information associated with the random jittering signal728so that the ramping slope is changed by random magnitudes corresponding to different modulation cycles respectively. In yet another example, the ramping slope is changed during different modulation cycles that are adjacent to each other. In yet another example, the ramping slope is changed during different modulation cycles that are not adjacent to each other. In yet another example, the system controller502adjusts the modulation frequency based on at least information associated with the ramping slope changed by the random magnitudes.

In some embodiments, the signal738represents a current and is used for adjusting the ramping slope associated with the ramping signal728. For example, information associated with the signal738is used for adjusting the ramping slope associated with the ramping signal728, so as to adjust the duration of an on-time period associated with the drive signal556. For example, the timing diagram for the controller502as part of the system500is similar to what is shown inFIG. 4(c). In another example, the current738flows from the voltage-to-current-conversion component742to the ramp-signal generator702. In yet another example, the current738flows from the ramp-signal generator702to the voltage-to-current-conversion component742.

FIG. 7(a)is a simplified diagram showing a power conversion system according to yet another embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. The system1100includes a controller1102, resistors1104,1124,1126and1132, capacitors1106,1120and1134, a diode1108, a transformer1110including a primary winding1112, a secondary winding1114and an auxiliary winding1116, a power switch1128, a current sensing resistor1130, and a rectifying diode1118. The controller1102includes terminals (e.g., pins)1138,1140,1142,1144,1146and1148. For example, the power switch1128is a bipolar junction transistor. In another example, the power switch1128is a MOS transistor. In yet another example, the power switch1128includes an insulated-gate bipolar transistor. The system1100provides power to an output load1122, e.g., one or more LEDs. In some embodiments, the resistor1132is removed. For example, the system1100operates in a quasi-resonant mode.

According to one embodiment, an alternate-current (AC) input voltage1152is applied to the system1100. For example, a bulk voltage1150(e.g., a rectified voltage no smaller than 0 V) associated with the AC input voltage1152is received by the resistor1104. In another example, the capacitor1106is charged in response to the bulk voltage1150, and a voltage1154is provided to the controller1102at the terminal1138(e.g., terminal VCC). In yet another example, if the voltage1154is larger than a predetermined threshold voltage in magnitude, the controller1102begins to operate normally, and outputs a signal through the terminal1142(e.g., terminal GATE). In yet another example, the switch1128is closed (e.g., being turned on) or open (e.g., being turned off) in response to a drive signal1156so that the output current1158is regulated to be approximately constant.

According to another embodiment, the auxiliary winding1116charges the capacitor1106through the diode1108when the switch1128is opened (e.g., being turned off) in response to the drive signal1156so that the controller1102can operate normally. For example, a signal1160is provided at the terminal1140(e.g., terminal FB). In another example, during an on-time period associated with the drive signal1156, the signal1198is related to the bulk voltage1150through the transformer's coupling. In yet another example, the bulk voltage1150is sensed through the terminal1140(e.g., terminal FB). In yet another example, during an off-time period associated with the drive signal1156, the signal1160is related to an output voltage1168and is used to detect the end of a demagnetization process of the secondary winding1114for charging or discharging the capacitor1134using an internal error amplifier in the controller1102. As an example, the capacitor1134is charged or discharged in response to a compensation signal1174provided at the terminal1148(e.g., terminal COMP). For example, the resistor1130is used for detecting a primary current1162flowing through the primary winding1112, and a current-sensing signal1164is provided to the controller1102through the terminal1144(e.g., terminal CS) to be processed during each switching cycle. In yet another example, peak magnitudes of the current-sensing signal1164are sampled and provided to the internal error amplifier. In yet another example, the capacitor1120is used to maintain the output voltage1168. In some embodiments, the controller1102includes a ramp-signal generator which generates a ramping signal, and the controller1102is configured to change the ramping slope of the ramping signal based on at least information associated with the signal1160and the compensation signal1174.

FIG. 7(b)is a simplified diagram showing the controller1102as part of the power conversion system1100according to an embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. The controller1102includes a ramp-signal generator1202, an under-voltage lock-out (UVLO) component1204, a modulation component1206, a logic controller1208, a driving component1210, a demagnetization detector1212, an error amplifier1216, a current-sensing-and-sample/hold component1214, another current-sensing component1240, a jittering-signal generator1299, and a voltage-to-current-conversion component1242.

According to one embodiment, the UVLO component1204detects the signal1154and outputs a signal1218. For example, if the signal1154is larger than a first predetermined threshold in magnitude, the controller1102begins to operate normally. If the signal1154is smaller than a second predetermined threshold in magnitude, the controller1102is turned off. In another example, the first predetermined threshold is larger than the second predetermined threshold in magnitude. In yet another example, the error amplifier1216receives a signal1220from the current-sensing-and-sample/hold component1214and a reference signal1222and the compensation signal1174is provided to the modulation component1206and the voltage-to-current-conversion component1242. In yet another example, the voltage-to-current-conversion component1242receives the signal1174and outputs a signal1238to the ramp-signal generator1202which also receives a current signal1294and a jittering signal1297(e.g., a jittering current) generated by the jittering-signal generator1299. In yet another example, the jittering current1297flows from the jittering-signal generator1299to the ramp-signal generator1202. In yet another example, the jittering current1297flows from the ramp-signal generator1202to the jittering-signal generator1299. In yet another example, the current-sensing component1240outputs a signal1236to the ramp-signal generator1202in response to a current signal1296associated with the terminal1140(e.g., terminal FB). As an example, the current signal1296is related to the bulk voltage1150during the on-period associated with the driving signal1156. In yet another example, the ramping slope of the ramping signal1228is modulated in response to the jittering signal1297.

In some embodiments, the jittering signal1297corresponds to a deterministic signal, such as a triangle waveform (e.g., with a frequency of several hundred Hz), or a sinusoidal waveform (e.g., with a frequency of several hundred Hz). For example, the jittering signal1297is associated with multiple jittering cycles corresponding to a predetermined jittering frequency (e.g., approximately constant) related to a predetermined jittering period (e.g., approximately constant). As an example, the signal1256is associated with multiple modulation cycles corresponding to a modulation frequency (e.g., not constant) related to a modulation period (e.g., not constant). In another example, the system controller1102changes the ramping slope associated with the ramping signal1228based on at least information associated with the jittering signal1228so that, within a same jittering cycle of the multiple jittering cycles, the ramping slope is changed (e.g., increased, or decreased) by different magnitudes corresponding to different modulation cycles respectively. In yet another example, the ramping slope is changed during different modulation cycles adjacent to each other. In yet another example, the ramping slope is changed during different modulation cycles not adjacent to each other. In yet another example, the system controller1102adjusts the modulation frequency based on at least information associated with the changed ramping slope.

In certain embodiments, the jittering signal1297corresponds to a random (e.g., pseudo-random) signal with a random (e.g., pseudo-random) waveform. For example, the system controller1102changes the ramping slope associated with the ramping signal1228based on at least information associated with the random jittering signal1228so that the ramping slope is changed by random magnitudes corresponding to different modulation cycles respectively. In yet another example, the ramping slope is changed during different modulation cycles that are adjacent to each other. In yet another example, the ramping slope is changed during different modulation cycles that are not adjacent to each other. In yet another example, the system controller1102adjusts the modulation frequency based on at least information associated with the ramping slope changed by the random magnitudes.

According to another embodiment, the modulation component1206receives a ramping signal1228from the ramp-signal generator1202and outputs a modulation signal1226. For example, the signal1228increases, linearly or non-linearly, to a peak magnitude during each switching period. In another example, the logic controller1208processes the modulation signal1226and outputs a control signal1230to the current-sensing-and-sample/hold component1214and the driving component1210. In yet another example, the driving component1210generates a signal1256associated with the drive signal1156to affect the switch1128. As an example, the demagnetization detector1212detects the signal1160and outputs a signal1232(e.g., during an off-time period associated with the drive signal1156) for determining the end of the demagnetization process of the secondary winding1114. As another example, the demagnetization detector1212detects the signal1160and outputs the signal1232(e.g., during the off-time period associated with the drive signal1156) for determining the beginning and the end of the demagnetization process of the secondary winding1114. In another example, the demagnetization detector1212outputs a trigger signal1298to the logic controller1208to start a next cycle (e.g., corresponding to a next switching period). In yet another example, when the signal1256is at a logic high level, the signal1156is at a logic high level, and when the signal1256is at a logic low level, the signal1156is at a logic low level.

In some embodiments, the signal1236represents a current and is used for adjusting a ramping slope associated with the ramping signal1228. In certain embodiments, the signal1238represents a current and is used for adjusting the ramping slope associated with the ramping signal1228. For example, information associated with both the signal1236and the signal1238is used for adjusting the ramping slope associated with the ramping signal1228, so as to adjust the duration of an on-time period associated with the drive signal1156. In another example, the current1236flows from the current-sensing component1240to the ramp-signal generator1202. In yet another example, the current1236flows from the ramp-signal generator1202to the current-sensing component1240. In yet another example, the current1238flows from the voltage-to-current-conversion component1242to the ramp-signal generator1202. In yet another example, the current1238flows from the ramp-signal generator1202to the voltage-to-current-conversion component1242.

Referring toFIG. 7(a)andFIG. 7(b), during an on-time period, a voltage1198associated with the auxiliary winding1116is determined as follows, in some embodiments:

Vaux=-NauxNp×Vbulk(Equation⁢⁢7)
where Vauxrepresents the voltage1198, Naux/Nprepresents a turns ratio between the auxiliary winding1116and the primary winding1112, and Vbulkrepresents the bulk voltage1150. In certain embodiments, when a voltage at the terminal1140(e.g., terminal FB) is regulated to be approximately zero, the current signal1296is detected by the current-sensing component1240:

IFB=VauxR6=NauxNp×R6×Vbulk(Equation⁢⁢8)
where IFBrepresents the current signal1296and R6represents the resistance of the resistor1124. According to some embodiments, the current signal1296indicates a waveform of the bulk voltage1150during the on-time period associated with the drive signal1156, and the signal1236is determined as follows:

Similar to what is described above inFIG. 4(c), the ramping signal1228increases in magnitude during the on-time period, in certain embodiments. For example, the ramping slope of the ramping signal1228is modulated based on at least information associated with the signal1236generated through detecting the current signal1296during the on-time period. For example, the timing diagram for the controller1102as part of the system1100is similar to what is shown inFIG. 4(c).

FIG. 7(c)is a simplified diagram showing the controller1102as part of the power conversion system1100according to another embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. The controller1102includes a ramp-signal generator1602, an under-voltage lock-out (UVLO) component1604, a modulation component1606, a logic controller1608, a driving component1610, a demagnetization detector1612, an error amplifier1616, a current-sensing component1614, a jittering-signal generator1699, and another current-sensing component1640.

In some embodiments, the ramp-signal generator1602receives a current signal1694, a jittering signal1697(e.g., a jittering current) generated by the jittering-signal generator1699, and a signal1636from the current-sensing component1640and outputs a ramping signal1628. In yet another example, the jittering current1697flows from the jittering-signal generator1699to the ramp-signal generator1602. In yet another example, the jittering current1697flows from the ramp-signal generator1602to the jittering-signal generator1699. For example, a ramping slope associated with the ramping signal1628is adjusted based on at least information associated with the signal1636that is related to a current signal1696detected at the terminal1140(e.g., terminal FB) during an on-time period associated with the driving signal1156. The operations of other components inFIG. 7(c)are similar to what are described inFIG. 7(b). As an example, the signal1636represents a current. In another example, the current1636flows from the current-sensing component1640to the ramp-signal generator1602. In yet another example, the current1636flows from the ramp-signal generator1602to the current-sensing component1640. In yet another example, the ramping slope of the ramping signal1628is modulated in response to the jittering signal1697.

In some embodiments, the jittering signal1697corresponds to a deterministic signal, such as a triangle waveform (e.g., with a frequency of several hundred Hz), or a sinusoidal waveform (e.g., with a frequency of several hundred Hz). For example, the jittering signal1697is associated with multiple jittering cycles corresponding to a predetermined jittering frequency (e.g., approximately constant) related to a predetermined jittering period (e.g., approximately constant). As an example, the signal1656is associated with multiple modulation cycles corresponding to a modulation frequency (e.g., not constant) related to a modulation period (e.g., not constant). In another example, the system controller1102changes the ramping slope associated with the ramping signal1628based on at least information associated with the jittering signal1628so that, within a same jittering cycle of the multiple jittering cycles, the ramping slope is changed (e.g., increased, or decreased) by different magnitudes corresponding to different modulation cycles respectively. In yet another example, the ramping slope is changed during different modulation cycles adjacent to each other. In yet another example, the ramping slope is changed during different modulation cycles not adjacent to each other. In yet another example, the system controller1102adjusts the modulation frequency based on at least information associated with the changed ramping slope.

In certain embodiments, the jittering signal1697corresponds to a random (e.g., pseudo-random) signal with a random (e.g., pseudo-random) waveform. For example, the system controller1102changes the ramping slope associated with the ramping signal1628based on at least information associated with the random jittering signal1628so that the ramping slope is changed by random magnitudes corresponding to different modulation cycles respectively. In yet another example, the ramping slope is changed during different modulation cycles that are adjacent to each other. In yet another example, the ramping slope is changed during different modulation cycles that are not adjacent to each other. In yet another example, the system controller1102adjusts the modulation frequency based on at least information associated with the ramping slope changed by the random magnitudes.

FIG. 8(a)is a simplified diagram showing certain components as part of the controller402as shown inFIG. 4(b), the controller802as shown inFIG. 5(b), and/or the controller1102as shown inFIG. 7(b)according to some embodiments of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. A ramp-signal generator1300includes transistors1308,1310,1312,1314,1316and1320, an amplifier1322, and a NOT gate1324. In addition, current-source components1302,1304,1306and1399are included in the controller402as shown inFIG. 4(b), the controller802as shown inFIG. 5(b), and/or the controller1102as shown inFIG. 7(b).

According to one embodiment, the current-source components1302,1304,1306and1399are related to currents1332,1334,1336and1397respectively. For example, a current-mirror circuit including the transistors1308,1310,1312and1314is configured to generate a charging current1340(e.g., Icharge) that flows through the transistor1316which is controlled by a signal1328. In another example, the amplifier1322receives a reference signal1330and outputs an amplified signal1338. In yet another example, the capacitor1318is charged or discharged to generate a ramping signal1398as the output signal of the ramp-signal generator1300.

In some embodiments, the ramp-signal generator1300is the same as the ramp-signal generator602, the ramp-signal generator1002, or the ramp-signal generator1202. For example, the current1332is the same as the current636that flows between the ramp-signal generator602and the voltage-to-current-conversion component640, the current1036that flows between the ramp-signal generator1002and the current-sensing component1040, or the current1236that flows between the ramp-signal generator1202and the current-sensing component1240. In another example, the current1334is the same as the current638that flows between the ramp-signal generator602and the voltage-to-current-conversion component642, the current1038that flows between the ramp-signal generator1002and the voltage-to-current-conversion component1042, or the current1238that flows between the ramp-signal generator1202and the voltage-to-current-conversion component1242. In yet another example, the current1336is the same as the current694, the current1094, or the current1294. In yet another example, the current1397is the same as the jittering current697, the jittering current1097, or the jittering current1297. In yet another example, the ramping signal1398is the same as the ramping signal628, the ramping signal1028, or the ramping signal1228. In yet another example, the current-source component1302is included in the voltage-to-current-conversion component640, the current-sensing component1040, or the current-sensing component1240. In yet another example, the current-source component1304is included in the voltage-to-current-conversion component642, the voltage-to-current-conversion component1042, or the voltage-to-current-conversion component1242. In yet another example, the current-source component1399is included in the jittering-signal generator699, the jittering-signal generator1099, or the jittering-signal generator1299.

In certain embodiments, the ramping slope of the ramping signal1398is determined as follows:
slope=f(I0,Iac,Icomp,Ij)  (Equation 10)
For example, specifically, the ramping slope of the ramping signal1398is determined as follows:
slope∝(α×I0−β×Iac−δ×Icomp−γ×Ij)  (Equation 11A)
where I0represents the signal1336, Iacrepresents the signal1332, and Icomprepresents the signal1334. In addition, α, β, δ, and γ represent coefficients (e.g., larger than 0). In another example, the ramping slope of the ramping signal1398is determined as follows:
slope∝(α×I0−β×Iac−δ×Icomp+γ×Ij)  (Equation 11B)
In yet another example, the signal1332and the signal1334are determined as follows:
Iac=f1(Vbulk)
Icomp=f2(Vcomp)  (Equation 12)
where f1 and f2 represent non-linear or linear operators. As an example,
Iac=γ×(Vbulk−Vth2),Iac=0 whenVbulk≦Vth2
Icomp=η×(Vcomp−Vth1),Icomp=0 whenVbulk≦Vth1(Equation 13)
where γ and η represent coefficients (e.g., larger than 0), Vth1and Vth2represent predetermined thresholds.

In one embodiment, if a ratio related to the transistors1308and1310is K and another ratio related to the transistors1312and1314is M, the charging current1340is determined as follows:
Icharge=K×M×(I0−Iac−Icomp−Ij)  (Equation 14)
For example, a ramping slope associated with the ramping signal1398is determined as follows:

slope=IchargeC(Equation⁢⁢15)
where Ichargerepresents the charging current1340, and C represents the capacitance of the capacitor1318. In certain embodiments, for a given I0and Icomp, the ramping slope of the ramping signal1398decreases in magnitude and in turn the duration of an on-time period increases when a bulk voltage increases in magnitude. In yet another example, Ichargeis also determined as follows:
Icharge=K×M×(I0−Iac−Icomp+Ij)  (Equation 16)

FIG. 8(b)is a simplified diagram showing certain components as part of the controller402as shown inFIG. 4(d), the controller802as shown inFIG. 5(c), and/or the controller1102as shown inFIG. 7(c)according to certain embodiments of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. A ramp-signal generator1800includes transistors1808,1810,1812,1814,1816and1820, an amplifier1822, and a NOT gate1824. In addition, current-source components1802,1806and1899are included in the controller402as shown inFIG. 4(d), the controller802as shown inFIG. 5(c), and/or the controller1102as shown inFIG. 7(c).

According to one embodiment, the current-source components1802,1806and1899are related to currents1832,1836and1897respectively. For example, a current-mirror circuit including the transistors1808,1810,1812and1814is configured to generate a charging current1840(e.g., Icharge) that flows through the transistor1816which is controlled by a signal1828. In another example, the amplifier1822receives a reference signal1830and outputs an amplified signal1838. In yet another example, the capacitor1818is charged or discharged to generate a ramping signal1898as the output signal of the ramp-signal generator1800.

In some embodiments, the ramp-signal generator1800is the same as the ramp-signal generator1402. For example, the current1832is the same as the current1436that flows between the ramp-signal generator1402and the voltage-to-current-conversion component1440, the current1536that flows between the ramp-signal generator1502and the current-sensing component1540, or the current1636that flows between the ramp-signal generator1602and the current-sensing component1640. In another example, the current1836is the same as the current1494, the current1594, or the current1694. In yet another example, the current1897is the same as the current1497, the current1597, or the current1697. In yet another example, the ramping signal1898is the same as the ramping signal1428, the ramping signal1528, or the ramping signal1628. In yet another example, the current-source component1802is included in the voltage-to-current-conversion component1440, the current-sensing component1540, or the current-sensing component1640. In yet another example, the current-source component1899is included in the jittering-signal generator1499, the jittering-signal generator1599, or the jittering-signal generator1699.

FIG. 8(c)is a simplified diagram showing certain embodiments as part of the controller502according to another embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. A ramp-signal generator1700includes transistors1708,1710,1712,1714,1716and1720, an amplifier1722, and a NOT gate1724. In addition, current-source components1704,1706and1799are included in the controller502.

According to one embodiment, the current-source components1704,1706and1799are related to currents1734,1736and1797respectively. For example, a current-mirror circuit including the transistors1708,1710,1712and1714is configured to generate a charging current1740(e.g., Icharge) that flows through the transistor1716which is controlled by a signal1728. In another example, the amplifier1722receives a reference signal1730and outputs an amplified signal1738. In yet another example, the capacitor1718is charged or discharged to generate a ramping signal1798as the output signal of the ramp-signal generator1700.

In some embodiments, the ramp-signal generator1700is the same as the ramp-signal generator502. For example, the current1734is the current738that flows from the ramp-signal generator702to the voltage-to-current-conversion component742. In yet another example, the current1736is the same as the current794. In yet another example, the current1797is the same as the current797. In yet another example, the ramping signal1798is the same as the ramping signal728. In yet another example, the current-source component1704is included in the voltage-to-current-conversion component742. In yet another example, the current-source component1799is included in the jittering-signal generator799.

FIG. 9is a simplified diagram showing certain components of a controller according to yet another embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. The controller1900includes voltage-to-current-conversion components1902and1904, current-source components1906and1997, and a ramp-signal generator1999. The ramp-signal generator1999includes transistors1908,1910,1912,1914,1916and1920, an amplifier1922, and a NOT gate1924. The voltage-to-current-conversion component1902includes an operational amplifier1970, a current-source component1958, transistors1960,1962,1964and1968, and a resistor1966. The voltage-to-current-conversion component1904includes an operational amplifier1976, a current-source component1984, transistors1978,1980,1986and1988, and a resistor1982.

According to one embodiment, the voltage-to-current-conversion components1902and1904, the current-source component1906, and the current-source component1997are related to currents1932,1934,1936and1995respectively. For example, a current-mirror circuit including the transistors1908,1910,1912and1914is configured to generate a charging current1940(e.g., Icharge) that flows through the transistor1916which is controlled by a signal1928. In another example, the amplifier1922receives a reference signal1930and outputs an amplified signal1938. In yet another example, the capacitor1918is charged or discharged to generate a ramping signal1998as the output signal of the ramp-signal generator1999.

According to another embodiment, the operational amplifier1976receives a compensation signal1974and outputs a signal1990which is received by a current-mirror circuit including the transistors1978,1980,1986and1988to generate the current1934. For example, the operational amplifier1970receives a signal1972and outputs a signal1956which is received by a current-mirror circuit including transistors1968,1964,1962and1960to generate the current1932.

In some embodiments, the controller1900is the same as the controller402. For example, the ramp-signal generator1999is the same as the ramp-signal generator602. As an example, the current1932is the same as the current636that flows between the ramp-signal generator602and the voltage-to-current-conversion component640. In another example, the current1934is the same as the current638that flows between the ramp-signal generator602and the voltage-to-current-conversion component642. In yet another example, the current1936is the same as the current694. In yet another example, the current1995is the same as the jittering current697. In yet another example, the ramping signal1998is the same as the ramping signal628. In yet another example, the compensation signal1974is related to the compensation signal474, and the signal1972is related to the signal472. In yet another example, the voltage-to-current-conversion component1902is the same as the voltage-to-current-conversion component640. In yet another example, the voltage-to-current-conversion component1904is the same as the voltage-to-current-conversion component642. In yet another example, the current-source component1997is included in the jittering-signal generator699.

According to another embodiment, based on Equation 12 and Equation 13, a current1992(e.g., Ib1) related to the current-source component1984is associated with η×Vth1, and a current1954(e.g., Ib2) related to the current-source component1958is associated with γ×Vth2. For example, the ramping signal1998increases, linearly or non-linearly, to a peak magnitude during each switching period of the power conversion system. In another example, a ramping slope associated with the ramping signal1998is determined as follows:

slope=IchargeC(Equation⁢⁢16)
where Ichargerepresents the charging current1940, and C represents the capacitance of the capacitor1918. In yet another example, an on-time period associated with a drive signal related to a power switch is determined as follows:

Ton=Vcomp-VrefIcharge×C(Equatio⁢⁢n⁢⁢17)
where Vcomprepresents the signal1974, Vrefrepresents the signal1930, Ichargerepresents the charging current1940, and C represents the capacitance of the capacitor1918.

As discussed above and further emphasized here,FIG. 9is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. For example, the current-source component1904is removed from the controller1900, and the ramp-signal generator1999is then the same as the ramp-signal generator1800. In another example, the current-source component1902is removed from the controller1900, and the ramp-signal generator1999is then the same as the ramp-signal generator1700.

According to one embodiment, a system controller for regulating a power conversion system includes a first controller terminal and a second controller terminal. The first controller terminal is configured to receive a first signal associated with an input signal for a primary winding of a power conversation system. The second controller terminal is configured to output a drive signal to a switch to affect a first current flowing through the primary winding of the power conversion system, the drive signal being associated with an on-time period, the switch being closed during the on-time period. The system controller is configured to adjust a duration of the on-time period based on at least information associated with the first signal. For example, the system controller is implemented according to at leastFIG. 4(a),FIG. 4(b),FIG. 4(d),FIG. 5(a),FIG. 5(b),FIG. 5(c),FIG. 7(a),FIG. 7(b),FIG. 7(c),FIG. 8(a),FIG. 8(b), and/orFIG. 9.

According to another embodiment, a system controller for regulating a power conversion system includes a first controller terminal, a ramp-signal generator, and a second controller terminal. The first controller terminal is configured to provide a compensation signal based on at least information associated with a first current flowing through a primary winding of a power conversion system. The ramp-signal generator is configured to receive a first signal associated with the compensation signal and generate a ramping signal based on at least information associated with the first signal, the ramping signal being associated with a ramping slope. The second controller terminal is configured to output a drive signal to a switch based on at least information associated with the ramping signal to affect the first current. The system controller is configured to adjust the ramping slope of the ramping signal based on at least information associated with the compensation signal. For example, the system controller is implemented according to at leastFIG. 4(a),FIG. 4(b),FIG. 5(a),FIG. 5(b),FIG. 6(a),FIG. 6(b),FIG. 7(a),FIG. 7(b),FIG. 8(a),FIG. 8(c), and/orFIG. 9.

According to yet another embodiment, a method for regulating a power conversion system includes: receiving a first signal from a first controller terminal, the first signal being associated with an input signal for a primary winding of a power conversation system; adjusting a duration of an on-time period related to a drive signal based on at least information associated with the first signal; and outputting the drive signal from a second controller terminal to a switch to affect a first current flowing through the primary winding of the power conversion system, the switch being closed during the on-time period. For example, the method is implemented according to at leastFIG. 4(a),FIG. 4(b),FIG. 4(d),FIG. 5(a),FIG. 5(b),FIG. 5(c),FIG. 7(a),FIG. 7(b),FIG. 7(c),FIG. 8(a),FIG. 8(b), and/orFIG. 9.

According to yet another embodiment, a method for regulating a power conversion system includes: providing a compensation signal by a first controller terminal based on at least information associated with a first current flowing through a primary winding of a power conversion system; generating a first signal based on at least information associated with the compensation signal; and processing information associated with the first signal. The method further includes: adjusting a ramping slope associated with a ramping signal based on at least information associated with the first signal; receiving the ramping signal; generating a drive signal based on at least information associated with the ramping signal; and outputting the drive signal from a second controller terminal to a switch to affect the first current. For example, the method is implemented according to at leastFIG. 4(a),FIG. 4(b),FIG. 5(a),FIG. 5(b),FIG. 6(a),FIG. 6(b),FIG. 7(a),FIG. 7(b),FIG. 8(a),FIG. 8(c), and/orFIG. 9.

For example, some or all components of various embodiments of the present invention each are, individually and/or in combination with at least another component, implemented using one or more software components, one or more hardware components, and/or one or more combinations of software and hardware components. In another example, some or all components of various embodiments of the present invention each are, individually and/or in combination with at least another component, implemented in one or more circuits, such as one or more analog circuits and/or one or more digital circuits. In yet another example, various embodiments and/or examples of the present invention can be combined.