Switching voltage regulator

Exemplary embodiments are related to a switching voltage regulator. A switching voltage regulator may include a current limit detector configured to detect an over-current condition. The switching voltage regulator may further include a pulse-width modulation (PWM) module coupled to the current limit detector and configured to convey a PWM signal based on a programmed switching frequency and an output voltage and in response to the over-current condition.

BACKGROUND

The present invention relates generally to switching voltage regulators. More specifically, the present invention relates to embodiments for operating a switching voltage regulator at or near a current limit with enhanced efficiency, and without impacting regulation.

An electronic device, such as a mobile telephone, may include a voltage regulator that receives an input voltage from a power supply and generates an output voltage for a load. An integrated circuit may include a voltage regulator for providing a stable voltage reference for on-chip components such as a digital component, an analog component, and/or a radio-frequency (RF) component.

A voltage regulator may comprise a switching voltage regulator, which rapidly switches a power transistor between triode (i.e., completely on) and cutoff (i.e., completely off) with a variable duty cycle. A resulting rectangular waveform is low pass filtered in order to produce a nearly constant output voltage proportional to the average value of the duty cycle. One advantage of a switching voltage regulator compared to a linear voltage regulator is greater efficiency because the switching transistor dissipates little power as heat in either a saturated state or a cutoff state.

As understood by a person having ordinary skill in the art, limiting an output current of a switching voltage regulator is important to protect from output short-circuit conditions, which can cause almost immediate permanent damage to an associated device. Conventional devices and methods for reducing output current may cause a severe and immediate reduction in the output current when an over-current condition is detected, even transiently, thus causing an output voltage to fall out of regulation.

A need exists for an enhanced switching voltage regulator. More specifically, a need exists for embodiments related to operating a switching voltage regulator at or near a current limit with enhanced efficiency and regulation.

DETAILED DESCRIPTION

As noted above, conventional voltage regulators, upon detection of an over-current condition, may cause a severe and immediate reduction of an output current (e.g., the output current may be reduced to substantially zero amps), which may cause an output voltage to fall out of regulation. Stated another way, conventional voltage regulators, upon detection of an over-current condition, may generate a pulse-width modulation signal for causing the output current to decrease to zero amps.

Exemplary embodiments, as described herein, are directed to devices, systems, and methods for operating a switching voltage regulator near an over-current protection limit without adversely impacting efficiency or risking severe disruption to the regulated output voltage. According to one exemplary embodiment, a voltage regulator may include a current limit detector configured to detect an over-current condition. The voltage regulator may further include a pulse-width modulation (PWM) module coupled to the current limit detector and configured to convey a PWM signal based on a programmed switching frequency and an output voltage. According to another exemplary embodiment, a voltage regulator may include a current limit detector configured to detect an over-current condition. The voltage regulator may further include a pulse-width PWM module coupled to the current limit detector and configured to receive a first PWM signal and convey a second, modified PWM signal based on a programmed switching frequency and an output voltage and in response to a signal indicative of the over-current condition.

According to another exemplary embodiment, the present invention includes methods for operating a voltage regulator. Various embodiments of such a method may include receiving a first signal based on an output voltage of a switching voltage regulator and receiving a second signal indicative of an over-current condition. Further, the method may include conveying a PWM signal based on a programmed switching frequency and an output voltage of the switching voltage regulator and in response to receipt of the first signal and the second signal. In accordance with another exemplary embodiment, a method may include receiving a pulse-width modulation (PWM) signal and conveying a modified PWM signal based on a programmed switching frequency and an output voltage of a switching voltage regulator upon detection of an over-current condition.

Other aspects, as well as features and advantages of various aspects, of the present invention will become apparent to those of skill in the art though consideration of the ensuing description, the accompanying drawings and the appended claims.

FIG. 1illustrates a switching voltage regulator100, according to an exemplary embodiment of the present invention. By way of example only, switching voltage regulator100may comprise a buck converter. Switching voltage regulator100, which is configured to receive an input voltage Vin and convey an output voltage Vout, includes a controller102, a pulse-width modulation (PWM) state machine and lookup table104, and a current limit detector106. It is noted that PWM state machine and lookup table104may also be referred to herein as a “PWM module.”

Switching voltage regulator100further includes an inverter108, a switching element M1, and a switching element M2. By way of example only, switching element M1 may comprise a n-channel transistor and switching element M2 may comprise a p-channel transistor. As illustrated inFIG. 1, switching element M1 is coupled between input voltage Vin and switching element M2, which is further coupled to a ground voltage GRND. Switching voltage regulator100may also include an inductor L and a capacitor C, and may be configured to generate output voltage Vout.

Current limit detector106may be configured to determine if a measured output current (e.g., a current through inductor L) is greater than or equal to threshold current value. It is noted that the output current may be measured via any known and suitable manner. By way of example only, the output current may be determined by measuring a current through inductor L, measuring a current through a sense resistor, measuring a current across switching element M1, or any other known and suitable manner. Further, if current limit detector106determines that the output current is greater than or equal to the threshold current, current limit detector106may convey a signal to PWM module104indicative of an over-current condition (i.e., when an output current is equal to or greater than a current limit).

In addition, controller102may be configured to receive a reference voltage and output voltage Vout via a feedback path110. In response to receipt of the reference voltage and output voltage Vout, controller102may generate and convey a requested pulse-width modulated (PWM) signal112to PWM module104. PWM module104may be configured to receive PWM signal112and the signal from current limit detector106. Further, PWM module104may be configured to convey an actual PWM signal114to inverter108, which may convey a signal to a gate of each of switching elements M1 and M2 to cause either switching element M1 or switching element M2 to conduct for generating output voltage Vout.

During a contemplated operation of switching voltage regulator100, in the event that PWM module104does not receive a signal from current limit detector106indicative of an over-current condition, PWM module104may convey actual PWM signal114, which is substantially equal to requested PWM signal112, to inverter108. Stated another way, if an over-current condition is not detected, actual PWM signal114, which is conveyed from PWM module104to inverter108, is substantially equal to requested PWM signal, which is conveyed from controller102to PWM module104.

Conversely, in the event that current limit detector106determines that the output current is greater than or equal to the threshold current and, thus, conveys a signal to PWM module104indicative of a over-current condition, PWM module104may generate and convey actual PWM signal114, which is modified with respect to requested PWM signal112. According to various exemplary embodiments of the present invention, in response to receipt of a signal, via current limit detector106, indicative of an over-current condition, PWM module104may be configured to generate actual PWM signal114based on output voltage Vout and a programmed switching frequency of switching voltage regulator100. More specifically, PWM module104may, via a lookup table (LUT), and based on the programmed switching frequency and output voltage Vout, determine an “off-time” for switching element M1. The “off-time”, and the resulting actual PWM signal114, may be generated such that the switching frequency and current ripple of switching voltage regulator100during an over-current condition are similar to the switching frequency and current ripple of switching voltage regulator100during normal operation (i.e., without an over-current condition). Therefore, in comparison to conventional regulators operating in or near over-current conditions, an efficiency of switching voltage regulator100may be increased and disturbances of output voltage Vout may decreased.

FIG. 2is a plot200illustrating various signals related to a switching voltage regulator, such as switching voltage regulator100. With reference toFIGS. 1 and 2, plot200includes a signal202, which represents an output current of a switching voltage regulator, such as a current through inductor L. In addition, plot200illustrates a current limit204relative to the current depicted by signal202. Plot200further includes a signal206that represents a PWM signal, such as requested PWM signal112conveyed from controller102to PWM module104. In addition, plot200includes a signal208, which represents a modified PWM signal, such an actual PWM signal conveyed by PWM module104. As illustrated in plot200, signal202, which represents the output current, is at, or near current limit204during an over-current condition. It is noted that during an over-current condition, signal202is increased to current limit204during a first time period and decreased during a second time period (i.e., the “off-time” determined by PWM module204).

FIG. 3depicts a state diagram250illustrating a contemplated operation of switching voltage regulator100(seeFIG. 1). State diagram250includes states252,254,256, and258. For example only, state252represents a state wherein switching element M2 is in a conductive state and switching element M1 is in a non-conductive state. Further, state254represents a state wherein switching element M1 is in a conductive state and switching element M2 is in a non-conductive state. In addition, state256represents a current limit latching state and state258represents a current limit state.

During operation, upon requested PWM signal112transitioning from a low state to a high state, switching voltage regulator100may transition from state252to state254(i.e., switching element M1 will transition to a conductive state and switching element M2 will transition to a non-conductive state). Further, upon detection of an over-current condition while in state254, switching voltage regulator100may transition from state254to state256, where the over-current condition will be latched. Subsequently, switching voltage regulator100may transition from state256to state258wherein an “off-time” delay will be initiated. It is noted that the “off-time” delay may be determined by PWM module104via a lookup table and based on the programmed switching frequency and the output voltage of switching voltage regulator100. After completion of the “off-time” delay, switching voltage regulator100may transition from state258to state252. It is noted that if, upon switching voltage regulator100transitioning from state258to state252, requested PWM signal112is in the high state, switching voltage regulator100may quickly transition from state252to state254. It is further noted that upon requested PWM signal112transitioning from the high state to a low state switching, and without detection of an over-current limit, voltage regulator100may transition from state254to state252(i.e., switching element M2 will transition to a conductive state and switching element M1 will transition to a non-conductive state).

As will be appreciated by a person having ordinary skill in the art, switching voltage regulators have a peak efficiency point, or an output current at which efficiency is maximized. At current significantly above and below the peak efficiency point, efficiency of switching voltage regulator degrades substantially. Moreover, power conversion efficiency is typically very low while operating in the normal power mode with light output loads. Accordingly, pulse-frequency modulation (PFM) and other light-load modes are typically used to increase efficiency for these use cases.

In accordance with other various exemplary embodiments, the present invention may relate to maximizing power conversion efficiency in switching voltage regulators at low output currents. More specifically, according to one exemplary embodiment, a current “burst” may begin when an output voltage of a switching power regulator decreases to a lower threshold voltage. Further, the burst may end when the output voltage is charged to a second, upper threshold voltage. During the burst, an output current (e.g., a current through an inductor) is increased from zero amps to a lowered current limit (i.e., a current limit that is lowered with respect to the current limit described above with reference toFIGS. 1-3). Further, the output current is decreased for a time period (i.e., look-up table (LUT) based “off-time” duration), which is derived from a programmed switching frequency and an output voltage of the switching voltage regulator. The output current is then increased back to the lowered current limit, and this cycle may be repeated until the output voltage exceeds the upper threshold voltage. After the output voltage exceeds the upper threshold voltage, the output current is decreased back to zero amps. The combination of the lowered current limit and the LUT-based “off-time” are designed such that the switching waveform of the switching voltage regulator during the burst closely approximates the switching waveform at a peak efficiency load during normal operation, thus maximizing light load efficiency.

FIG. 4illustrates a switching voltage regulator400, according to an exemplary embodiment of the present invention. By way of example only, switching voltage regulator400may comprise a buck converter. Switching voltage regulator400, which is configured to receive input voltage Vin and convey output voltage Vout, includes a hysteretic voltage comparator402, a PWM state machine and lookup table404, and a current limit detector406. It is noted that PWM state machine and lookup table404may also be referred to herein as a “PWM module.”

Switching voltage regulator400further includes an inverter408, switching element M1, and switching element M2. As illustrated inFIG. 4, switching element M1 is coupled between input voltage Vin and switching element M2, which is further coupled to ground voltage GRND. Switching voltage regulator400also includes inductor L and capacitor C, and may be configured to generate output voltage Vout.

Similar to current limit detector106, current limit detector406may be configured to determine if a measured output current (e.g., a current through inductor L) is greater than or equal to a threshold current limit. However, in the embodiment illustrated inFIG. 4, the threshold current limit is reduced (i.e., lowered) with respect to the threshold current described above with reference toFIGS. 1-3. Stated another way, the current limit is lowered from the protection level in a normal power mode to force switching near a peak efficiency point of switching voltage regulator400. If current limit detector406determines that the output current is greater than or equal to the lowered threshold current, current limit detector406may convey a signal to PWM state machine and lookup table404indicative of an over-current condition.

In addition, hysteretic voltage comparator402may be configured to receive a reference voltage and output voltage Vout via a feedback path410. It is noted that the reference voltage may comprise a lower threshold voltage and an upper threshold voltage. In response to receipt of the reference voltage and output voltage Vout, comparator402may generate and convey a comparator output412to PWM state machine and lookup table404. It is noted that comparator output412may comprise a high or low signal depending on the comparison between output voltage Vout and the reference voltage. PWM state machine and lookup table404may be configured to receive comparator output412and the signal from current limit detector406. Further, PWM state machine and lookup table404may be configured to convey an PWM signal414to inverter408, which may convey a signal to a gate of each of switching elements M1 and M2 to cause either switching element M1 or switching element M2 to conduct for generating output voltage Vout.

A contemplated operation of switching voltage regulator400will now be described. Upon detecting that output voltage Vout is less than a lower threshold voltage, comparator output412may cause an output current (e.g., the current through inductor L) to rise to the lowered current limit. Further, upon detecting an over-current condition (i.e., via current limit detector404), PWM state machine and lookup table404may be configured to generate PWM signal414based on output voltage Vout and a programmed switching frequency of switching voltage regulator400. More specifically, PWM module404may, via a lookup table (LUT), and based on the programmed switching frequency and output voltage Vout, generate an “off-time” for switching element M1, which causes the output current to be reduced. The output current is then increased back to the lowered current limit, and this cycle may be repeated until the output voltage exceeds the upper threshold voltage. Upon output voltage Vout exceeding the second, upper threshold voltage, comparator output412may cause the output current to decrease back to zero amps. The “off-time”, and the resulting PWM signal414, may be generated such that the switching frequency and current ripple of switching voltage regulator400during an over-current condition are similar to the switching frequency and current ripple of switching voltage regulator100during normal operation (i.e., without an over-current condition). Therefore, in comparison to conventional voltage regulators, an efficiency of switching voltage regulator400may be increased.

FIG. 5illustrates another plot500illustrating various signals related to a switching voltage regulator, such as switching voltage regulator400. With reference toFIGS. 4 and 5, plot500includes a signal502, which represents an output current, such as a current through inductor L. In addition, plot500illustrates a current limit504relative to the current and a peak efficiency point, which is depicted by reference numeral506. Plot500further includes a signal508that represents a hysteretic feedback signal, such as comparator output412conveyed from comparator402to PWM module404. In addition, plot500includes a signal510, which represents an output voltage, such as output voltage Vout. Plot500further depicts an upper threshold voltage512and a lower threshold voltage514As illustrated in plot500, as signal510(e.g., output voltage Vout) decreases to or below lower threshold voltage514at time t0, signal508transitions “high.” Upon signal508going high, signal502, which represents the output current, is ramped to the lowered current limit504and then reduced during an “off-time” of switching element M1. This cycle may be repeated until signal508goes low, which occurs when signal510(e.g., output voltage Vout) increases to or above upper threshold voltage512at time t1. It is noted that while signal508is high (i.e. during a current burst), signal502is increased to current limit504during a first time period and decreased during a second time period (i.e., the “off-time” determined by PWM module404).

FIG. 6depicts a state diagram550illustrating a contemplated operation of switching voltage regulator400(seeFIG. 4). State diagram550includes states552,554,556, and558. For example only, state552represents a state wherein switching element M2 is in a conductive state and switching element M1 is in a non-conductive state. Further, state554represents a state wherein switching element M1 is in a conductive state and switching element M2 is in a non-conductive state. In addition, state556represents a current limit latching state and state558represents a current limit state.

During operation, upon comparator output412transitioning from a low state to a high state, switching voltage regulator400may transition from state552to state554(i.e., switching element M1 will transition to a conductive state and switching element M2 will transition to a non-conductive state). Further, upon detection of an over-current condition while in state554, switching voltage regulator400may transition from state554to state556, where the over-current condition will be latched. Subsequently, switching voltage regulator400may transition from state556to state558wherein an “off-time” delay will be initiated. After completion of the “off-time” delay, switching voltage regulator400may transition from state558to state552. It is noted that if, upon switching voltage regulator400transitioning from state558to state552, comparator output412is in the high state, switching voltage regulator400may quickly transition from state552to state554. It is further noted that upon comparator output412transitioning from the high state to a low state switching, and without detection of an over-current condition, voltage regulator100may transition from state554to state552(i.e., switching element M2 will transition to a conductive state and switching element M1 will transition to a non-conductive state).

FIG. 7is a flowchart illustrating a method800, in accordance with one or more exemplary embodiments. Method800may include receiving a first signal based on an output voltage of a switching voltage regulator (depicted by numeral802). Method800may also include receiving a second signal indicative of an over-current condition (depicted by numeral804). Further, method800may include conveying a pulse-width modulation (PWM) signal based on a programmed switching frequency and an output voltage of the switching voltage regulator and in response to receipt of the first signal and the second signal (depicted by numeral806).

FIG. 8is a flowchart illustrating a method850, in accordance with one or more exemplary embodiments. Method850may include receiving a pulse-width modulation (PWM) signal (depicted by numeral852). Method850may also include conveying a modified PWM signal based on a programmed switching frequency and an output voltage of a switching voltage regulator upon detection of an over-current condition (depicted by numeral854).

FIG. 9is a block diagram of a wireless communication device900. In this exemplary design, wireless communication device900includes digital module904, an RF module906, and power management module904. Digital module204may comprise memory and one or more processors. RF module906, which may comprise a radio-frequency integrated circuit (RFIC) may include a transceiver including a transmitter and a receiver and may be configured for bi-directional wireless communication via an antenna908. In general, wireless communication device900may include any number of transmitters and any number of receivers for any number of communication systems, any number of frequency bands, and any number of antennas. Further, power management module904may include one or more voltage regulators, such as switching voltage regulators100and400, respectively illustrated inFIGS. 1 and 4.