Black level calibration method and system

Black level calibration methods and systems are generally disclosed. According to one embodiment of the present invention, a method of calibrating a black level signal in a frame includes performing an iteration of averaging a first set of digital values corresponding to a first set of adjusted black level signals associated with a first set of black pixels of the frame, determining whether an average value based on the first set of digital values has reached a target black level, determining a calibration offset based on a difference between the average value and the target black level and an accumulator step, converting the calibration offset to an analog signal, generating a calibration signal based on the analog signal for a second set of black pixels of the frame, and repeating the iteration for the frame until a predetermined condition is determined to have been met.

BACKGROUND

1. Field of the Invention

The present invention generally relates to image processing, and more particularly to a black level calibration method and system.

2. Description of the Related Art

Image sensors such as CMOS or CCD sensors are made up of an array of individual pixels, each of which collects photons incident on the image sensor. The number of photons collected in each pixel is converted into an electrical charge by a photodiode and this charge is then converted into an analog voltage, which may be amplified, adjusted, and converted to a digital value by an analog-to-digital converter, so that the information obtained from the individual pixels can be processed, usually by a digital signal processor, into a final digital image.

Most image sensors require some form of calibration before use so that the data obtained from the image sensor can be used to produce digital images that faithfully reproduce the optical characteristics (e.g., intensity and color) of the scene or object whose image was captured. One type of calibration is referred to as black level calibration, which effectively sets a threshold below which digital data values obtained from the image sensor will be considered to represent a black level, or to represent the absence or substantial absence of light. Accurate black-level calibration helps to achieve a digital picture with full contrast and subtle details in dark shadow regions. If the black level is too low, information in dark areas may be lost. Conversely, if the black level is too high, signal range may be sacrificed.

In conventional systems, a border of an image-sensing array is surrounded with a number of rows and columns of light shielded, or black, pixels. These pixels provide black reference information or black pixel data to stabilize downstream image processing and establish the correct value for black in the output image.

Calibration purely in the digital domain reduces the range of the system and reduces image quality. On the other hand, to accomplish high resolution and a wide calibration range simultaneously in the analog domain, existing solutions often involve circuits with large size and high power consumption.

SUMMARY OF THE INVENTION

One embodiment of the present invention sets forth a method of calibrating a black level signal in a frame, which includes performing an iteration of averaging a first set of digital values corresponding to a first set of adjusted black level signals associated with a first set of black pixels of the frame, determining whether an average value based on the first set of digital values has reached a target black level, determining a calibration offset based on a difference between the average value and the target black level and an accumulator step, converting the calibration offset to an analog signal, generating a calibration signal based on the analog signal for a second set of black pixels of the frame, and repeating the iteration for the frame until a predetermined condition is determined to have been met.

At least one advantage of the present invention disclosed herein is to achieve high resolution and a wide calibration range for black level calibration in a power efficient manner.

DETAILED DESCRIPTION

Various embodiments are described hereinafter with reference to the figures. It should be noted that the figures are not drawn to scale. It should also be noted that the figures are only intended to facilitate the description of embodiments. They are not intended as an exhaustive description of the present invention or as a limitation on the scope of the present invention. In addition, an aspect described in conjunction with a particular embodiment is not necessarily limited to that embodiment and can be practiced in any other embodiments.

FIG. 1is a simplified block diagram illustrating an example image processing system100, according to one embodiment of the present invention. The image processing system100includes a summing junction104, an amplifier106, an analog-to-digital converter (ADC)108, and a black level calibration (BLC) block110. The summing junction104is configured to receive a source signal102, which may include a black level signal and/or an image signal. The black level signal is a read-out of an array of black level pixels, and the image signal is an output from an array of active pixels corresponding to a captured image.

The BLC block110is configured to adjust the received black level signal during a certain calibration period to generate a calibrated black level signal. In one implementation, the BLC block110includes an averaging unit112, a comparator114, an accumulation116, a digital-to-analog converter (DAC)118, and a level integrator120.

In addition to receiving the source signal102, the summing junction104is also configured to receive a calibration signal122from the BLC block110. The summing junction104may adjust the source signal102with the calibration signal122. The amplifier106is configured to further adjust the output of the summing junction104to better utilize the range supported by the ADC108and to reduce quantization noises. The ADC108is configured to output a digital signal124corresponding to the adjusted analog output signal from the amplifier106.

The averaging unit112is configured to add and average the received digital signals124for different pixels and send the resulting averaged value to the comparator114for further processing. The accumulator116is configured to process the output of the comparator114and output a calibration offset. After having converted the calibration offset back to an analog signal by the DAC118, the level integrator120is configured to prepare the calibration signal122based on the calibration offset. Additional details of the image processing system100will be further described in the following paragraphs.

FIG. 2is a flow chart illustrating a process200for performing black level calibration, according to one embodiment of the present invention. In one implementation, the process200may be carried out by the image processing system100shown inFIG. 1. During a black level calibration period in a frame, in operation202, a calibration signal is applied to a black level signal in a source signal. The adjusted black level signal is converted to a digital signal in operation204, and the digital signals of multiple pixels are added and averaged in operation206. In operation208, the averaged value is processed and compared to a target black level. If the target black level is determined to not to have been reached, then the averaged value is further processed in operation210to determine a calibration offset. The calibration offset is converted back to an analog signal in operation212, and the analog signal is utilized to generate a calibration signal in operation214. The calibration loop in the process200continues during the black level calibration period in the frame, until the target black level target is determined in operation208to have been reached. Then, the process200is configured to exit black level calibration in operation216. The calibration signal is instead applied to the image signal of the source signal in the frame. In one implementation, the calibration loop in the process200may also exit the black level calibration period when the black pixels in the frame have been processed.

FIG. 3Ais a schematic diagram illustrating an example comparator300, according to one embodiment of the present invention. In one implementation, the comparator300may correspond to the comparator114ofFIG. 1and is configured to perform some aspects of operation208shown inFIG. 2. The comparator300receives an input signal302, a target black level304, a black level ceiling306, and a reset signal308. The target black level304may be set during initialization and may be modified depending on different lighting conditions. The black level ceiling306, which may be used to dampen the system response to potentially varying black levels, may be programmable and may be represented in 8 bits to reduce power consumption. In one implementation, the comparator300resets via the reset signal308when a new frame starts.

FIG. 3Bis a flow chart illustrating a process350performed by the comparator300to generate an output signal310, according to one embodiment of the present invention. For illustration, one example output signal310is represented by 9 bits and is also referred to as output_signal[8:0] in the following paragraphs. In operation352, a sign bit is set based on the relationship between the input signal302, which may correspond to the averaged digital value of multiple pixels, and the target black level304. For example, if the input signal302is less than the target black level304(e.g., A<B), the sign bit may be set to 1 (i.e., output_signal[8]=1). Otherwise (e.g., A>=B), the sign bit may be set to 0 (i.e., output_signal[8]=0). In operation354, the output signal310is generated based on the difference between the input signal302and the target black level304, the black level ceiling306, also the sign bit. For example, if the absolute difference between the input signal302and the target black level304is greater than the black level ceiling306(e.g., |A−B|>C), then the output signal310is the combination of the sign bit and the black level ceiling306(e.g., output_signal[8]corresponds to the sign bit, and output_signal[7:0] is represented by the black level ceiling306). On the other hand, if the absolute difference between the input signal302and the target black level304is less than or equal to the black level ceiling306(e.g., |A−B|<=C), then the output signal310is the combination of the sign bit and the absolute difference.

FIG. 4Ais a schematic diagram illustrating an example accumulator400, according to one embodiment of the present invention. In one implementation, the accumulator400may correspond to the accumulator116ofFIG. 1and is configured to perform some aspects of operation208and also operation210ofFIG. 2. The accumulator400receives a black level value402, an accumulator step404, and a reset signal406. In one implementation, the accumulator step404is a positive integer number, and the accumulator400resets via the reset signal406when a new frame starts.

FIG. 4Bis a flow chart illustrating a process450performed by the accumulator400to generate a calibration offset408, according to one embodiment of the present invention. In operation452, if the output_signal[7:0] from a comparator, such as the comparator114ofFIG. 1, is greater than or equal to the accumulator step404, then the calibration offset408is generated based on the sign bit (i.e., output_signal[8]) and the accumulator step404. Specifically, if the sign bit is 1 as determined in operation454, then the calibration offset408is set to be the negative accumulator step404(i.e.,—accumulator step404) in operation456. Otherwise, the calibration offset408is set to be just the accumulator step404in operation458. If the output_signal[7:0] is less than the accumulator step404, then the BLC is terminated, and the calibration offset408is set to 0 in operation460.

In one implementation, the calibration offset408is sent to a DAC to be converted to an analog signal, and the converted calibration offset408is then processed by a level integrator to generate a calibration signal. The DAC and the level integrator may correspond to the DAC118and the level integrator120shown inFIG. 1.

To further illustrate how the calibration signal may be generated and utilized in the calibration loop as discussed above and illustrated inFIG. 2, some example pixel values from a pixel array are selected to be processed by a BLC block, such as the BLC block110shown inFIG. 1.FIG. 5Ais a schematic diagram of a sample image sensor500, which includes a two-dimensional pixel array having multiple pixels arranged in rows502and columns504. The image sensor500includes rows of black pixels506. The black pixels506are designed to prevent light from reaching the light detection portion of the pixels. The image sensor500also includes rows of active pixels, such as red (R), green (G), and blue (B) pixels. Although the illustrated pixel array is regularly shaped, the array may have an arrangement different than what is illustrated (e.g., including more or less pixels, rows, and columns).

FIG. 5Billustrates an example BLC block annotated with example pixel values that correspond to different phases of the calibration loop in a frame, according to one embodiment of the present invention. Here, the example BLC block corresponds to the BLC block110ofFIG. 1. Suppose all the black pixels shown inFIG. 5Ahave the same analog pixel value, which may correspond to a digital value of 232, and suppose further than the black pixels are being read out in time in a left-to-right sequence. In other words, P1is read out first in time, and P2is read out subsequent to the reading out of P1, and P3is read out subsequent to the reading out of P2, and so on. Also, for simplicity and as an example, suppose the summing junction104is configured to apply the calibration signal122to four incoming pixels at a time; suppose the amplifier106scales the output of the summing junction104by a factor of 1; and the averaging unit112is configured to add and average four adjusted digital pixel values at a time. In addition, suppose the target black level is set to 32, the black level ceiling is set to 300, and the accumulator step is set to 10.

In the first iteration of the calibration loop, the accumulator116outputs an initial calibration offset of zero to the DAC118and the level integrator120. In one implementation, the level integrator120generates a calibration signal by accumulating the received calibration offset. Although the calibration signal in one implementation is an analog signal, the analog calibration signal may correspond to one or more digital values. The one or more digital values are used below to illustrate the calibration loop. The calibration signal is zero in the first iteration, and the summing junction104applies this zero to the incoming pixel values of P1-P4, i.e., all at 232. When the averaging unit112receives the adjusted digital pixel values of P1-P4, i.e., still unchanged at 232, it calculates an average value of 232 for P1-P4and sends the averaged value to the comparator114. Because the difference between 232 and the target black level (i.e., 32) is 200, the target black level has not been reached. Also, because 200 is less than the black level ceiling of 300, the comparator114sends the output signal of 200 to the accumulator116for a second iteration of processing in the calibration loop.

Since 200 is greater than the accumulator step (i.e., 10), the calibration loop continues, and the calibration offset is set to be the accumulator step. The level integrator120generates the calibration signal of 10, and the summing junction104applies the calibration signal to a set of new incoming pixel values of P5-P8. Specifically, the pixel values of 232 are subtracted by 10. The adjusted digital pixel values of 222 for P5-P8are processed by the averaging unit112, and the averaged value of 222 is sent to the comparator114. Similar to the first iteration, because the difference between 222 and the target black level (i.e., 32) is 190, the target black level has not been reached. Also, because 190 is less than the black level ceiling of 300, the comparator114sends the output signal of 190 to the accumulator116for a third iteration of processing in the calibration loop.

Since 190 is still greater than the accumulator step of 10, the calibration loop continues, and the accumulator116sets the calibration offset to be the accumulator step yet again. The level integrator120in this iteration generates the calibration signal of 20 by accumulating the received calibration offsets, and the summing junction104applies the calibration signal to another set of new incoming pixel values. Here, the pixel values of 232 are subtracted by 20.

In the 21stiteration of the illustrated calibration loop, in which the output signal from the comparator114is equal to the accumulator step. The calibration signal of 200is applied to a set of new incoming pixel values, and the comparator114determines that the target black level of 32 is reached. In one implementation, after having reached the target black level, the calibration loop is terminated, and the calibration signal is applied to the other active pixels in the frame.

While the foregoing is directed to embodiments of the present invention, other and further embodiments of the present invention may be devised without departing from the basic scope thereof. For example, the illustrated image processing system may include separate components to handle different channels in parallel to improve image quality. In one implementation, the image processing system may include a first ADC and a second ADC. The first ADC may be configured to handle the blue and the red channels, and the second ADC may be configured to handle the green channel. Also, the resolution of the ADC (e.g., 10-bit resolution) may differ from the resolution of the DAC (e.g., 8-bit resolution) in the image processing system to reduce computation complexity. The above examples, embodiments, and drawings should not be deemed to be the only embodiments, and are presented to illustrate the flexibility and advantages of the present invention as defined by the following claims.