Semiconductor light-emitting device and method of manufacturing semiconductor light-emitting device

A semiconductor light-emitting device includes a stacked body, a cutout section, and a high-resistance region. The stacked body includes a first conductive-type semiconductor layer, an active layer, and a second conductive-type semiconductor layer in this order and has paired side faces opposed to each other. The cutout section is provided on at least one of the paired side faces of the stacked body and has a bottom face where the first conductive-type semiconductor layer is exposed. The high-resistance region is provided from the vicinity of the bottom face of the cutout section to the side face of the stacked body and has electric resistance higher than the electric resistance of the stacked body in a periphery of the high-resistance region.

CROSS REFERENCE TO RELATED APPLICATIONS

This application is a U.S. National Phase of International Patent Application No. PCT/JP2019/005605 filed on Feb. 15, 2019, which claims priority benefit of Japanese Patent Application No. JP 2018-050642 filed in the Japan Patent Office on Mar. 19, 2018. Each of the above-referenced applications is hereby incorporated herein by reference in its entirety.

TECHNICAL FIELD

The present technology relates to a semiconductor light-emitting device and a manufacturing method thereof. The semiconductor light-emitting device has a stacked structure of a first conductive-type semiconductor layer, an active layer, and a second conductive-type semiconductor layer, for example.

BACKGROUND ART

A semiconductor light-emitting device such as a semiconductor laser or the like includes a semiconductor layer in which a first conductive-type semiconductor layer, an active layer, and a second semiconductor layer are stacked in this order (See PTL 1 and PTL 2, for example). This semiconductor layer is mounted on a support member via, for example, a solder layer or the like.

CITATION LIST

Patent Literature

SUMMARY OF THE INVENTION

In such a semiconductor light-emitting device, it is desired to suppress occurrence of a non-conforming item.

Therefore, it is desirable to provide a semiconductor light-emitting device configured to suppress occurrence of a non-conforming item and a manufacturing method thereof.

A semiconductor light-emitting device (1) according to an embodiment of the present technology includes a stacked body, a cutout section, and a high-resistance region. The stacked body includes a first conductive-type semiconductor layer, an active layer, and a second conductive-type semiconductor layer in this order and has paired side faces opposed to each other. The cutout section is provided on at least one of the paired side faces of the stacked body and has a bottom face where the first conductive-type semiconductor layer is exposed. The high-resistance region is provided from the vicinity of the bottom face of the cutout section to the side face of the stacked body and has electric resistance higher than the electric resistance of the stacked body in a periphery of the high-resistance region.

In the semiconductor light-emitting device (1) according to the embodiment of the present technology, the cutout section is provided on the side face of the stacked body, and the high-resistance region is provided from the vicinity of the bottom face of the cutout section to the side face of the stacked body. This provides the high-resistance region on the side face of the first conductive-type semiconductor layer of the side faces of the stacked body.

A method of manufacturing (1) a semiconductor light-emitting device according to the embodiment of the present technology includes forming a stacked body including a first conductive-type semiconductor layer, an active layer, and a second conductive-type semiconductor layer in this order; forming, on at least one side face of the stacked body, a cutout section having a bottom face where the first conductive-type semiconductor layer is exposed; and forming a high-resistance region from the vicinity of the bottom face of the cutout section to the side face of the stacked body. The high-resistance region has electric resistance higher than the electric resistance of the stacked body in a periphery of the high-resistance region.

In the method of manufacturing (1) the semiconductor light-emitting device according to the embodiment of the present technology, the cutout section is formed on the side face of the stacked body, and the high-resistance region is formed from the vicinity of the bottom face of the cutout section to the side face of the stacked body. This forms the high-resistance region on the side face of the first conductive-type semiconductor layer of the side faces of the stacked body.

A semiconductor light-emitting device (2) according to an embodiment of the present technology incudes a substrate, a stacked body, a cutout section, and a high-resistance region. The stacked body is provided on the substrate, includes a first conductive-type semiconductor layer, an active layer, and a second conductive-type side face in this order, and has paired side faces opposed to each other. The cutout section is provided from at least one of the paired side faces of the stacked body to the substrate and has a bottom face where the substrate is exposed. The high-resistance region is provided in the vicinity of the bottom face of the cutout section and has electric resistance higher than the electric resistance of the substrate in a periphery of the high-resistance region.

In the semiconductor light-emitting device (2) according to the embodiment of the present technology, the cutout section is provided from the side face of the stacked body to the substrate, and the high-resistance region is provided in the vicinity of the bottom face of this cutout section. This provides the high-resistance region on the substrate.

A method of manufacturing (2) a semiconductor light-emitting device according to the embodiment of the present technology includes forming a stacked body that includes a first conductive-type semiconductor layer, an active layer, and a second conductive-type semiconductor layer in this order on a substrate; forming, from at least one side face of the stacked body to the substrate, a cutout section having a bottom face where the substrate is exposed; and forming, in the vicinity of the bottom face of the cutout section, a high-resistance region having electric resistance higher than the electric resistance of the substrate in a periphery.

In the method of manufacturing (2) the semiconductor light-emitting device according to the present technology, the cutout section is formed from the side face of the stacked body to the substrate, and the high-resistance region is formed in the vicinity of the bottom face of this cutout section. This forms the high-resistance region on the substrate.

With the semiconductor light-emitting device (1) and the semiconductor light-emitting device (2) according to the embodiments of the present technology, the high-resistance region is provided on the side face of the first conductive-type semiconductor layer or on the substrate. This makes it possible to suppress occurrence of shorting via a solder layer even if the solder layer provided on side of the second conductive-type semiconductor is in contact with the side face of the first conductive-type semiconductor layer. In addition, with the method of manufacturing (1) the semiconductor light-emitting device and the method of manufacturing (2) the semiconductor light-emitting device according to the embodiments of the present technology, the high-resistance region is formed on the side face of the first conductive-type semiconductor layer or on the substrate. This makes it possible to suppress the occurrence of the shorting via the solder layer even if the solder layer provided on the side of the second conductive-type semiconductor is in contact with the side face of the first conductive-type semiconductor layer. Therefore, it is possible to suppress the production of the non-conforming item.

It is to be noted that the foregoing content is merely an example of the present disclosure. The effects of the present disclosure are not limited to the foregoing, and may be other effects or further include other effects.

MODES FOR CARRYING OUT THE INVENTION

In the following, some embodiments of the present technology are described in detail with reference to the drawings. It is to be noted that description is given in the following order.

1. First Embodiment

A semiconductor light-emitting device having a first conductive-type semiconductor layer exposed on a bottom face of a cutout section

2. Second Embodiment

A semiconductor light-emitting device having a substrate exposed on a bottom face of a cutout section

First Embodiment

FIG.1illustrates a schematic cross-sectional configuration of a semiconductor light-emitting device (semiconductor light-emitting device10) according to a first embodiment of the present technology. This semiconductor light-emitting device10is, for example, a semiconductor laser that outputs light having a wavelength in a visible region, and includes a substrate11, a stacked body20, a support member30, and a solder layer40. This semiconductor light-emitting device10is mounted by means of a so-called junction down method. On the support member30are provided the solder layer40, the stacked body20, and the substrate11in this order.

The substrate11is, for example, a gallium nitride (GaN) substrate and has a thickness of 300 μm to 500 μm, for example. The substrate11may include, for example, gallium arsenic (GaAs), indium phosphorus (InP) gallium indium nitride (InGaN), sapphire, silicon (Si), or silicon carbide (SiC), etc.

The stacked body20has a stacked structure in which, for example, an n-type clad layer12(first conductive-type semiconductor layer), an active layer13, and a p-type clad layer14(second conductive-type semiconductor layer) are stacked in this order from side of the substrate11. The stacked body20includes, for example, a group III-V nitride semiconductor layer. The group III-V nitride semiconductor layer is a gallium nitride-based compound including Ga (gallium) and N (nitrogen), for example. Specifically, examples of the gallium nitride-based compound include GaN, AlGaN (aluminum gallium nitride), and AlGaInN (aluminum nitride gallium indium), etc. Alternatively, the stacked body20may include a semiconductor material based on AlGaAs (aluminum gallium arsenide), aluminum indium gallium arsenide (AlInGaAs), or aluminum gallium indium phosphide (AlGaInP), etc. It is to be noted that in the following, a stacking direction (Z-axis direction inFIG.1) of the stacked body20is referred to as a vertical direction, an output direction of laser light (Y direction inFIG.1) is referred to as an axial direction, and a direction (X direction inFIG.1) perpendicular to the axial direction and the vertical direction is referred to as a horizontal direction. The stacked body20has a size of, for example, 1 μm to 10 μm in the vertical direction.

The n-type clad layer12provided on the substrate11includes n-type AlGaN, for example. The n-type clad layer12includes, for example, a group IV element, a group VI element, or the like as an n-type impurity. Specifically, examples of the n-type impurity include Si (silicon), Ge (germanium), O (oxygen), or Se (selenium), etc.

The active layer13provided between the n-type clad layer12and the p-type clad layer14has an undoped GaInN multiple quantum well structure, for example. For example, an n-type guide layer including n-type GaN may be provided between the active layer13and the n-type clad layer12. For example, a p-type guide layer including p-type GaN may be provided between the active layer13and the p-type clad layer14.

The p-type clad layer14opposed to the n-type clad layer12with the active layer13in-between includes p-type AlGaN, for example. The p-type clad layer14includes a group II element or the group IV element, or the like, as a p-type impurity. Specifically, examples of the p-type impurity include Mg (magnesium), Zn (zinc), or C (carbon), etc. The p-type clad layer14is opposed to the substrate11with the active layer13and the n-type clad layer12in-between.

A portion of the p-type clad layer14constitutes a ridge portion (protrusion)15extending in the axial direction. Of the active layer13, a region corresponding to the ridge portion15is a current injection region (light-emitting region). This ridge portion15has a function to limit a size of the current injection region of the active layer13, and to control an optical mode in the horizontal direction to a basic (zero order) mode in a stable manner to guide a wave to the axial direction. A p-type contact layer may be provided between the p-type clad layer14and a p-side contact electrode layer21to be described later. The p-type contact layer includes p-type GaN, for example. At this time, the ridge portion15includes the portion of the p-type clad layer14and the p-type contact layer.

A pair of side faces S20(YZ plane inFIG.1) is provided in the stacked body20. The pair of the side faces S20is spaced from the ridge portion15and provided parallel to an extending direction of the ridge portion15(the axial direction). The side faces S20in the pair are opposed to each other. In the present embodiment, a cutout section N is provided on both of the side faces S20in this pair. This cutout section N is a portion where a portion from the p-type clad layer14to the n-type clad layer12is cut out in the vertical direction. In the portion where the cutout section N is provided, a width of the stacked body20in the horizontal direction is small. The n-type clad layer12is exposed on a bottom face of this cutout section N. The cutout section N has a size of 0.5 μm to 10 μm, for example, in the vertical direction.

Here, a high-resistance region20ais provided from the n-type clad layer12in the vicinity of the bottom face of this cutout section N to each of the side faces S20of the stacked body20. The high-resistance region20ais provided across the n-type clad layer12to a portion of the substrate11. That is, the high-resistance region20ais provided on the n-type clad layer12in the vicinity of the bottom face of the cutout section N and the side face of the substrate11. This high-resistance region20ais a region having higher electric resistance than the electric resistance of the stacked body20in the periphery. The high-resistance region20ahas an electric resistance of approximately 102Ωcm or higher, for example. Although details are described later, provision of the high-resistance region20aon the side faces of the n-type clad layer12makes it possible to suppress the occurrence of the shorting between the n-type clad layer12and the p-type clad layer14via the solder layer40.

The high-resistance region20ais formed by ion injection using, for example, elements such as Al (aluminum), B (boron), or C (carbon), which is described later. Such elements are included in the high-resistance region20a. The ion injection destroys crystals in some region (high-resistance region20a) of the stacked body20or inactivates carriers in some region of the stacked body20and makes the region highly resistive. The high-resistance region20ahas the size of, for example, 0.5 μm or greater in the vertical direction. The size of the high-resistance region20ain the horizontal direction is smaller than the size of the cutout section N in the horizontal direction, for example. The size of the high-resistance region20ain the horizontal direction may be larger than or the same as the size of the cutout section N in the horizontal direction.

FIG.2illustrates a configuration of the stacked body20in which the high-resistance region20ais provided across a wider region. As such, the high-resistance region20amay be provided across the side face of the active layer13and the side face of the p-type clad layer14from the vicinity of the bottom face of the cutout section N.

The semiconductor light-emitting device10has the p-side contact electrode layer21and a p-side pad electrode layer22between the ridge portion15of the stacked body20and the solder layer40. An insulating film23covers from the side face of the ridge portion15to the cutout section N of the stacked body20. A pair of unillustrated reflecting mirror films is provided on an end face (resonator end face). The end face is parallel to a face (XZ plane) perpendicular to the extending direction of the ridge portion15(axial direction). These reflecting mirror films in the pair each have mutually different reflectance. With this, light generated in the active layer13is amplified by reciprocating between the pair of reflecting mirror films and outputted from one of the reflecting mirror films as a laser beam.

The p-side contact electrode layer21is provided in contact with the p-type clad layer14of the stacked body20. It is preferable that the p-side contact electrode layer21include a material which forms a good contact (ohmic contact) with the p-type clad layer14. The p-side contact electrode layer21includes, for example, Ni (nickel), Pd (palladium), Pt (platinum), or ITO (Indium Thin Oxide), etc. The p-side contact electrode layer21may have a single-layer structure or a multi-layer structure.

The p-side pad electrode layer22is opposed to the p-type clad layer14with the p-side contact electrode layer21in-between and is provided to cover at least whole of the p-side contact electrode layer21. That is, the p-side pad electrode layer22is in contact with a whole top face of the p-side contact electrode layer21. It is to be noted that the p-side contact electrode21may not be in direct contact with the p-side pad electrode layer22as long as the p-side contact electrode layer21is electrically coupled with the p-side pad electrode layer22. That is, another electrically-conducting material may be provided between the p-side contact electrode layer21and the p-side pad electrode layer22. The p-side pad electrode layer22may have the single-layer structure or the multi-layer structure. In a case where the p-side pad electrode layer22has the multi-layer structure, the multi-layer structure may be a stacked structure including, for example, a Ti (titanium) layer, a Pt layer, and an Au (gold) layer.

The insulating film23is provided between the p-side pad electrode layer22and the side face of the ridge portion15. This insulating film23is provided from the side face of the ridge portion15to the side face and the bottom face of the cutout section N. A portion of the n-type clad layer12(n-type clad layer12below the cutout section N) and the side face of the substrate11are exposed from the insulating film23, for example. To efficiently trap light into the ridge portion15, the insulating film23preferably includes an insulating material having a lower refractive index than the refractive index of the semiconductor material that constitutes the stacked body20. Examples of constituent materials of such an insulating film23include SiO2(silicon dioxide), etc. Alternatively, the insulating film23may include SiN (silicon nitride), etc.

An n-side electrode layer24is provided on a rear face of the substrate11. The rear face is a face opposite to a face where the stacked body20is provided. The n-side electrode layer24has a structure in which the Ti layer, the Pt layer, and the Au layer, for example, are stacked in sequence from side of the substrate11. Alternatively, the n-side electrode layer24may have the single-layer structure.

The support member30provided opposite to the ridge portion15of the stacked body20is a so-called sub-mount. This support member30is provided opposite to the substrate11with the stacked body20in-between. More specifically, the support member30is opposed to the n-type clad layer12with the active layer13and the p-type clad layer14in-between. The support member30includes, for example, AlN (aluminum nitride), SiC (silicon carbide), or Si (silicon), etc. Of these, the support member30preferably includes AlN or SiC. One reason for this is that the support member30preferably includes a material having high heat conductivity, in terms of heat dissipation.

The solder layer40is provided between the support member30and the p-side pad electrode layer22and is to join the stacked body20to the support member30. This solder layer40is provided over a wider region than the stacked body20and the substrate11and greater in width than the stacked body20in the horizontal direction. The solder layer40includes, for example, a tin-based solder such as AuSn (gold-tin) or AgSn (silver-tin), etc.

It is possible to manufacture the semiconductor light-emitting device10having such a configuration in the following manner, for example.

FIGS.3A,3B,3C,3D,3E,3F,3G, and3Hare cross-sectional schematic diagrams illustrating the manufacturing method in the order of processes. First, to form the semiconductor light-emitting device10, the stacked body20is formed on the substrate11by means of a metalorganic chemical vapor deposition method, for example. The stacked body20is formed on the substrate11by stacking the n-type clad layer12, the active layer13, and the p-type clad layer14in this order. At this time, for example, trimethyl aluminum (TMA), trimethyl gallium (TMG), trimethyl indium (TMIn), or ammonia (NH3) is used as a raw material of a GaN-based compound semiconductor. For example, silane (SiH4) is used as a raw material of a donor impurity. For example, bis-cyclopentadienyl magnesium (Cp2Mg) is used as a raw material of an acceptor impurity.

After the stacked body20is formed, grooves are formed in a stripe form, as illustrated inFIG.3A. Each groove penetrates the p-type clad layer14and the active layer13, reaching a portion of the n-type clad layer12. That is, the n-type clad layer12is exposed from the bottom face of the groove. The groove has a size of 0.5 μm to 10 μm in the vertical direction, for example. The groove has a size of 5 μm or larger in the horizontal direction, for example. This groove forms the cutout section N in each chip.

After the cutout section N is formed, ion injection is performed on the bottom face of the cutout section N, as illustrated inFIG.3B. This forms the high-resistance region20ain the vicinity of the bottom face of the cutout section N. For example, elements such as Al, B, or C, etc. are used for the ion injection. It is preferable that the ion injection be performed all across the bottom face of the cutout section N. This makes it possible to suppress variations in the size of the high-resistance region20ain each chip. Formation of the high-resistance region20amay also be performed through the use of a method other than the ion injection, such as heat diffusion or the like, for example. Expanding a size in the horizontal direction of a region where the ion injection is performed also makes it possible to form the high-resistance region20aon the side face of the active layer and the side face of the p-type clad layer14(SeeFIG.2).

After the high-resistance region20ais formed, the p-side contact electrode layer21extending like a belt is formed on the p-type clad layer14, as illustrated inFIG.3C. Thereafter, the ridge portion15is formed on an upper part of the stacked body20(FIG.3D). The ridge portion15is formed in the following manner, for example. First, an unillustrated mask layer is selectively formed on the p-side contact electrode layer21, for example. After that, a portion of the p-type clad layer14being in the exposed region and not covered by that mask layer is removed by means of a reactive ion etching (Reactive Ion Etching: RIE) method. Thereafter, the mask layer is removed. This forms the belt-like ridge portion15.

Subsequently, as illustrated inFIG.3E, the insulating film23is formed. The insulating film23is formed to cover the top face of the ridge portion15to the side face and the bottom face of the cutout section N. For example, the side face of the n-type clad layer12and the side face of the substrate11below the cutout section N are exposed from the insulating film23. Then, as illustrated inFIG.3F, lithography processing and etching are performed on this insulating film23to form an opening on the insulating film23. The p-side contact electrode layer21is exposed from the opening of this insulating film23.

Next, as illustrated inFIG.3G, the p-side pad electrode layer22, which is in contact with the p-side contact electrode21, is formed. The p-side pad electrode layer22is formed to cover the top face and the side face of the ridge portion15. Next, after a thickness of the substrate11is adjusted by wrapping side of the rear face of the substrate11, the n-side electrode layer24is formed by the lithography processing, the etching, and lift-off processing being performed. After this, as illustrated inFIG.3H, chip individualization is performed in accordance with a position of each cutout section N.

After this, the stacked body20is joined to the support member30via the solder layer40. The semiconductor light-emitting device10is finished through such processes.

FIGS.4A and4Billustrate another example (1) of the method of manufacturing the semiconductor light-emitting device10described above.

First, the stacked body20and the p-side contact electrode layer21are formed in this order on a base511(FIG.4A). Then, the ridge portion15is formed on the upper part of the stacked body20(FIG.4B). The formation of the cutout section N and the ion injection (SeeFIGS.3A and3B) may be performed after the ridge portion15is formed.

FIGS.5A and5Billustrate other example (2) of the method of manufacturing the semiconductor light-emitting device10described above.

First, after the stacked body20is formed on the substrate11, the cutout section N is formed (SeeFIG.3A). Then, the p-side contact electrode layer21, the ridge portion15, and the insulating film23are formed (FIG.5A). After this, as illustrated inFIG.5B, the ion injection may be performed via the insulating film23, thus forming the high-resistance region20a.

[Workings and Effects of Semiconductor Light-Emitting Device10]

In this semiconductor light-emitting device10, when a predetermined voltage is applied between the p-side contact electrode layer21of the ridge portion15and the n-side electrode layer24, a current blocked by the ridge portion15is injected into the current injection region (light-emitting region). This results in emission of light due to re-combination of an electron and a hole. This light is reflected by the pair of reflecting mirror films. The light causes laser oscillation at a wavelength a phase change of which is an integral multiple of 2π when the light makes a round trip. The light is externally outputted as a beam.

In the present embodiment, the high-resistance region20ais provided on the side face S20of the stacked body20, specifically, the side face of the n-type clad layer12. Therefore, even if the solder layer40is in contact with the side face of the n-type clad layer12, it is possible to suppress the occurrence of the shorting between the n-type clad layer12and the p-type clad layer14via the solder layer40. In the following, description is given of the workings and effects by means of a comparative example.

FIG.6illustrates a schematic cross-sectional configuration of a semiconductor light-emitting device (semiconductor light-emitting device100) according to the comparative example. This semiconductor light-emitting device100has no high-resistance region (high-resistance region20aofFIG.1) on the side face S20of the stacked body20. In addition, no cutout section (cutout section N ofFIG.1) is provided on the side face S20of the stacked body20. In the semiconductor light-emitting device100, the stacked body20is joined to the support member30by means of the junction down method.

In such a semiconductor light-emitting device100, it is likely that the solder layer40between the stacked body20and the support member30is eutectically formed in a state swelling from the side of the ridge portion15(p-type clad layer14) to a periphery of the stacked body20. When this swelled solder layer40is in contact with the side face of the n-type clad layer12, shorting (shorting C) occurs between the n-type clad layer12and the p-type clad layer14. This shorting C results in a non-conforming item.

Moreover, formation of the high-resistance region without providing the cutout section on the side face S20of the stacked body20might not allow for formation of the high-resistance region at a sufficient depth. That is, there is a possibility that the high-resistance region is not formed on the side face of the n-type clad layer12.

In contrast to this, in the semiconductor light-emitting device10, the cutout section N is provided on the side face S20of the stacked body20, and the high-resistance region20ais provided from the vicinity of the bottom face of this cutout section N to the side face S20of the stacked body20. This ensures provision of the high-resistance region20aon the side face of the n-type clad layer12of the side face S20of the stacked body20. Therefore, even if the solder layer40is in contact with the n-type clad layer12, it is possible to suppress the occurrence of the shorting via the solder layer40. Hence, it is possible to suppress the production of the non-conforming item.

As described above, in the present embodiment, the high-resistance region20ais provided on the side face of the n-type clad layer12of the side face S20of the stacked body20. Therefore, even if the solder layer40provided on side of the p-type clad layer14is in contact with the side face of the n-type clad layer12, it is possible to suppress the occurrence of the shorting via the solder layer40. Hence, it is possible to suppress the production of the non-conforming item.

In addition, the high-resistance region20amay also be provided on the side face of the active layer13and the side face of the p-type clad layer14together with the side face of the n-type clad layer12(FIG.2). This allows for more reliable suppression of the occurrence of the shorting via the solder layer40.

Although another embodiment is hereinafter described, the same components as the components of the foregoing embodiment are denoted by the same reference numerals in the following description, and description thereof is omitted where appropriate.

Second Embodiment

FIG.7schematically illustrates a cross-sectional configuration of a semiconductor light-emitting device (semiconductor light emitting device10A) according to a second embodiment of the present technology. The substrate11is exposed on the bottom face of the cutout section N of this semiconductor light-emitting device10A. Except for this point, the semiconductor light-emitting device10A has a similar configuration to the semiconductor light-emitting device10of the foregoing first embodiment, and the workings and effects thereof are also similar.

In the semiconductor light-emitting device10A, the cutout section N is provided from the side face S20of the stacked body20to the substrate11. The substrate11is exposed on the bottom face of the cutout section N. The high-resistance region20ais provided in the vicinity of the bottom face of this cutout section N, that is, the side face of the substrate11.

The insulating film23covers the side face of the ridge portion15to the side face and the bottom face of the cutout section N. This insulating film23covers the side face of the n-type clad layer12.

The cutout section N may be formed deeper in this manner, and the substrate11may be exposed on the bottom face of the cutout section N. In this case, it is also possible to obtain the effects equivalent to the effects of the foregoing first embodiment. It is possible to manufacture the semiconductor light-emitting device10A with a method similar to the method described in the foregoing first embodiment.

Although description has been given of the present technology as above, the present technology is not limited to the foregoing embodiments, and it is possible to make different variations thereto. For example, the components, the disposition, and the number of the semiconductor light-emitting devices10and10A which are exemplified in the foregoing embodiments are merely examples, and the semiconductor light-emitting devices10and10A may further have other components, for example.

In addition, in the semiconductor light-emitting devices10and10A, although description is given of the case where the cutout section N is provided on either of the side faces S20in the pair of the stacked body20, it is sufficient that the cutout section N is provided on at least one of the side faces S20in the pair.

In addition, in the foregoing embodiments, although description is given of the method of manufacturing the semiconductor light-emitting device10, order of formation and a method of formation of the respective components or the like are not limited thereto. For example, the cutout section N may be formed after the ion injection is performed.

Moreover, in the foregoing embodiments, although description is given of the case where the semiconductor light-emitting devices10and10A are each the semiconductor laser, it is also possible to apply the present technology to a semiconductor light-emitting device such as a LED (Light Emitting Diode), or the like, for example.

In addition, in the foregoing embodiments, although description is given of the case where the first conductive-type and the second conductive-type of the present technology are the n-type and the p-type, respectively, the first conductive-type may be the p-type and the second conductive-type may be the n-type.

It is to be noted that the effects described herein are merely illustrative, and are not limited thereto. There may be any effects other than the effects described herein.

Moreover, the present technology may have the following configurations, for example.

A semiconductor light-emitting device including:a stacked body that includes a first conductive-type semiconductor layer, an active layer, and a second conductive-type semiconductor layer in this order and has paired side faces opposed to each other;a cutout section that is provided on at least one of the paired side faces of the stacked body and has a bottom face where the first conductive-type semiconductor layer is exposed; anda high-resistance region that is provided from vicinity of the bottom face of the cutout section to the side face of the stacked body and has electric resistance higher than electric resistance of the stacked body in a periphery of the high-resistance region.
(2)

The semiconductor light-emitting device according to (1), in which the cutout section is provided on both of the paired side faces.

The semiconductor light-emitting device according to (1) or (2), further including a substrate opposed to the second conductive-type semiconductor layer with the first conductive-type semiconductor layer and the active layer in-between.

The semiconductor light-emitting device according to any one of (1) to (3), further including:a support member that is opposed to the first conductive-type semiconductor layer with the active layer and the second conductive-type semiconductor layer in-between; anda solder layer that is provided between the support member and the stacked body.
(5)

The semiconductor light-emitting device according to (4), in which the solder layer is provided between the support member and the stacked body and greater in width than the stacked body.

The semiconductor light-emitting device according to any one of (1) to (5), further including an insulting film that covers the cutout section.

The semiconductor light-emitting device according to any one of (1) to (6), in which the semiconductor light-emitting device functions as a semiconductor laser.

The semiconductor light-emitting device according to any one of (1) to (7), in whicha ridge portion is provided on the second conductive-type semiconductor layer, the ridge portion extending in a direction, andthe paired side faces are provided parallel to the direction in which the ridge portion extends.
(9)

The semiconductor light-emitting device according to any one of (1) to (8), including aluminum (Al), boron (B), or carbon (C) in the high-resistance region.

The semiconductor light-emitting device according to any one of (1) to (9), in which the high-resistance region is provided in the first conductive-type semiconductor layer.

The semiconductor light-emitting device according to any one of (1) to (10), in which the high-resistance region is provided in the first conductive-type semiconductor layer, the active layer, and the second conductive-type semiconductor layer.

A semiconductor light-emitting device including:a substrate;a stacked body that is provided on the substrate, includes a first conductive-type semiconductor layer, an active layer, and a second conductive-type semiconductor layer in this order, and has paired side faces opposed to each other;a cutout section that is provided from at least one of the paired side faces of the stacked body to the substrate and has a bottom face where the first conductive-type semiconductor layer is exposed; anda high-resistance region that is provided in vicinity of the bottom face of the cutout section and has electric resistance higher than electric resistance of the stacked body in a periphery of the high-resistance region.
(13)

A method of manufacturing a semiconductor light-emitting device including:forming a stacked body that includes a first conductive-type semiconductor layer, an active layer, and a second conductive-type semiconductor layer in this order;forming a cutout section that has, on at least one side face of the stacked body, a bottom face where the first conductive-type semiconductor layer is exposed; andforming a high-resistance region from vicinity of the bottom face of the cutout section to the side face of the stacked body, the high resistance region having electric resistance higher than the electric resistance of the stacked body in a periphery of the high resistance region.
(14)

The method of manufacturing the semiconductor light-emitting device according to (13), wherein the high-resistance region is formed by performing ion injection on the bottom face of the cutout section.

The method of manufacturing the semiconductor light-emitting device according to (13) or (14), further including:disposing a support member opposed to the first conductive-type semiconductor layer with the active layer and the second conductive-type semiconductor layer in-between; andjoining the support member and the stacked body by means of a solder layer.
(16)

A method of manufacturing a semiconductor light-emitting device including:forming a stacked body that includes a first conductive-type semiconductor layer, an active layer, and a second conductive-type semiconductor layer in this order on a substrate;forming a cutout section from at least one side face of the stacked body to the substrate, the cutout section having a bottom face where the substrate is exposed; andforming a high-resistance region in vicinity of the bottom face of the cutout section, the high-resistance region having electric resistance higher than the electric resistance of the substrate in a periphery of the high-resistance region.

This application claims the benefits of Japanese Priority Patent Application JP 2018-50642 filed with the Japan Patent Office on Mar. 19, 2018, the entire contents of which are incorporated herein by reference.

It should be understood that those skilled in the art could conceive various modifications, combinations, sub-combinations, and alterations depending on design requirements and other factors, insofar as they are within the scope of the appended claims or the equivalents thereof.