Display panel and electronic device

A display panel and an electronic device including the display panel are provided. The display panel includes a binding region and a signal bus line region. The signal bus line region includes a first region defined aligned to the binding region and a second region located on two opposite sides of the first region. By reducing a distance between sides away from each other of a first and a last of the signal bus lines in the first region, a distance between the binding region and the display region is reduced, thereby reducing a width of a lower bezel of the display panel.

BACKGROUND OF INVENTION

Field of Invention

The present invention relates to the field of display technology, and particularly to a display panel and an electronic device.

Description of Prior Art

With development of display technology and continuous changes of panel market requirements, requirements for screen-to-body ratios of electronic devices such as mobile phones, computers, and televisions are increasingly higher, so that narrow bezels or even bezel-free designs of the display panels get more and more attention by the industry.

In structures of current display panels, due to signal bus line regions being defined in the non-display regions below display regions, widths of each signal bus line in the signal bus line region being kept consistent, and spacing between each signal bus line being designed large; the signal bus line regions are made to occupy a large area in the non-display regions, resulting in excessively wide lower bezels of the display panels, which is not conducive to the realization of panel designs of a narrow bezel or even bezel-free.

In summary, the current display panels have the problem that the signal bus line regions occupy a lot of space, which leads to the excessive width of the lower bezels of the display panels. Therefore, a display panel and an electronic device need to be provided to solve the defect.

SUMMARY OF INVENTION

Embodiments of the present application provide a display panel and an electronic device configured to reduce a space occupied by a signal bus line region, thereby reducing a width of a lower bezel of the display panel.

One embodiment of the present application provides a display panel, including a display region, a binding region defined on a side of the display region, and a signal bus line region located between the display region and the binding region. The display panel further includes:a plurality of signal bus lines disposed in the signal bus line region, wherein the plurality of signal bus lines extend along a first direction and are spaced apart in a second direction, the first direction is different from the second direction.

Wherein, the signal bus line region includes a first region defined aligned to the binding region and a second region located on two opposite sides of the first region, and a distance between sides away from each other of a first and a last of the plurality of signal bus lines in the first region is smaller than a distance between sides away from each other of a first and a last of the plurality of signal bus lines in the second region.

According to one embodiment of the present application, the distance between the sides away from each other of the first and the last of the plurality of signal bus lines in the second region gradually decreases from an end away from the first region to an end close to the first region.

According to one embodiment of the present application, the signal bus lines include first portions located in the first region and second portions located in the second region and connected to the first portions, a distance between a side of one of the first portions and a same side of an adjacent one of the first portions is less than a distance between a side of one of the second portions and a same side of an adjacent one of the second portions.

According to one embodiment of the present application, the distance between the side of the one of the second portions and the same side of the adjacent one of the second portions gradually decreases from an end away from the first portions to an end close to the first portions.

According to one embodiment of the present application, a width of the second portions in the second direction gradually decreases from the end away from the first portions to the end close to the first portions.

According to one embodiment of the present application, distances between any two adjacent second portions are equal, and the distances between any two adjacent second portions are greater than or equal to distances between two adjacent first portions.

According to one embodiment of the present application, a distance between any two adjacent second portions gradually decreases from the end away from the first portions to the end close to the first portions.

According to one embodiment of the present application, the display panel includes a demultiplexing circuit region, and the demultiplexing circuit region is defined between the display region and the signal bus line region. The display panel further includes:a plurality of first fan-out wirings including first segments led out from the binding region along the second direction, second segments connected to the first segments and extending along a direction different from the first direction and the second direction, and third segments connected to the second segments and extending to the demultiplexing circuit region through the first region along the second direction; anda plurality of second fan-out wirings including fourth segments led out from the binding region along the second direction, fifth segments connected to the fourth segments and extending along a direction different from the first direction and the second direction, and sixth segments connected to the fifth segments and extending to the demultiplexing circuit region through the second region along the second direction; andwherein an included angle between the second segments and the second direction is less than an included angle between the fifth segments and the second direction, and ends of the sixth segments connected to the fifth segments are located on a side of the signal bus line region away from the demultiplexing circuit region.

According to one embodiment of the present application, the ends of the sixth segments of at least two of the plurality of second fan-out wirings located on any side of the first region and connected to the fifth segments are located in a same inclined straight line, and an extending direction of the inclined straight line is different from the first direction and the second direction.

According to one embodiment of the present application, a distance between the ends of the sixth segments connected to the fifth segments and the demultiplexing circuit region gradually increases from the end close to the first region to the end away from the first region.

According to one embodiment of the present application, a distance between a side of one of the plurality of second fan-out wirings and a same side of an adjacent one of the plurality of second fan-out wirings is greater than a distance between a side of one of the plurality of first fan-out wirings and a same side of an adjacent one of the plurality of first fan-out wirings.

According to one embodiment of the present application, the distance between the side of the one of the plurality of second fan-out wirings and the same side of the adjacent one of the plurality of second fan-out wirings gradually decreases from the end away from the first portions to the end close to the first portions.

One embodiment of the present application further provides an electronic device. The electronic device includes a display panel. The display panel includes a display region, a binding region defined on a side of the display region, and a signal bus line region located between the display region and the binding region. The display panel further includes:a plurality of signal bus lines disposed in the signal bus line region, wherein the plurality of signal bus lines extend along a first direction and are spaced apart in a second direction, and the first direction is different from the second direction.

Wherein, the signal bus line region includes a first region defined aligned to the binding region and a second region located on two opposite sides of the first region, and a distance between sides away from each other of a first and a last of the plurality of signal bus lines in the first region is smaller than a distance between sides away from each other of a first and a last of the plurality of signal bus lines in the second region.

According to one embodiment of the present application, the distance between the sides away from each other of the first and the last of the plurality of signal bus lines in the second region gradually decreases from an end away from the first region to an end close to the first region.

According to one embodiment of the present application, the signal bus lines include first portions located in the first region and second portions located in the second region and connected to the first portions, and a distance between a side of one of the first portions and a same side of an adjacent one of the first portions is less than a distance between a side of one of the second portions and a same side of an adjacent one of the second portions.

According to one embodiment of the present application, the distance between the side of the one of the second portions and the same side of the adjacent one of the second portions gradually decreases from an end away from the first portions to an end close to the first portions.

According to one embodiment of the present application, a width of the second portions in the second direction gradually decreases from the end away from the first portions to the end close to the first portions.

According to one embodiment of the present application, distances between any two adjacent second portions are equal, and the distances between any two adjacent second portions are greater than or equal to distances between two adjacent first portions.

According to one embodiment of the present application, a distance between any two adjacent second portions gradually decreases from the end away from the first portions to the end close to the first portions.

According to one embodiment of the present application, the display panel includes a demultiplexing circuit region, and the demultiplexing circuit region is defined between the display region and the signal bus line region. The display panel further includes:a plurality of first fan-out wirings including first segments led out from the binding region along the second direction, second segments connected to the first segments and extending along a direction different from the first direction and the second direction, and third segments connected to the second segments and extending to the demultiplexing circuit region through the first region along the second direction; anda plurality of second fan-out wirings including fourth segments led out from the binding region along the second direction, fifth segments connected to the fourth segments and extending along a direction different from the first direction and the second direction, and sixth segments connected to the fifth segments and extending to the demultiplexing circuit region through the second region along the second direction; andwherein an included angle between the second segments and the second direction is less than an included angle between the fifth segments and the second direction, and ends of the sixth segments connected to the fifth segments are located on a side of the signal bus line region away from the demultiplexing circuit region.

Beneficial effects of embodiments of the present disclosure: The embodiments of the present application provide a display panel and an electronic device. The electronic device includes the display panel. The display panel includes a display region, a binding region defined on a side of the display region, and a signal bus line region located between the display region and the binding region. The display panel includes a driving chip disposed in the binding region, and a plurality of signal bus lines disposed in the signal bus line region. The plurality of signal bus lines extend along a first direction and are spaced apart in a second direction. The first direction is different from the second direction. The signal bus line region includes a first region defined aligned to the binding region and a second region located on two opposite sides of the first region. By reducing a distance between sides away from each other of a first and a last of the signal bus lines in the first region, a distance between the binding region and the display region is reduced, thereby reducing a width of a lower bezel of the display panel.

DETAILED DESCRIPTION OF EMBODIMENTS

The descriptions of embodiments below refer to accompanying drawings in order to illustrate certain embodiments which the present disclosure can implement. The directional terms of which the present disclosure mentions, for example, “top”, “bottom”, “upper”, “lower”, “front”, “rear”, “left”, “right”, “inside”, “outside”, “side”, etc., are only refer to directions of the accompanying figures. Therefore, the used directional terms are for illustrating and understanding the present disclosure, but not for limiting the present disclosure. In the figures, units with similar structures are used same labels to indicate.

The present disclosure will be further described in detail below in combination with the drawings and specific embodiments.

Illustrated inFIG.1is a structural schematic diagram of a current display panel. In a structures of a current display panel, a signal bus line region13is generally defined in a non-display region11below a display region10. Due to widths of each signal bus line40in the signal bus line region13being kept consistent and spacing between each signal bus line40being designed large, the signal bus line region13is made to occupy a large area in the non-display region11, resulting in an excessively wide lower bezel of the display panels, which is not conducive to realization of panel designs of a narrow bezel or even bezel-free.

Embodiments of the present application provide a display panel configured to reduce the space occupied by the signal bus line region, thereby reducing the width of the lower bezel of the display panel. Illustrated inFIG.2is a schematic diagram of a planar structure of a display panel provided by one embodiment of the present application. The display panel100includes a display region10and a non-display region11defined on a periphery of the display region10.

The non-display region11includes a binding region12defined on a side of the display region10, and a signal bus line region13located between the display region10and the binding region12.

The display panel100further includes a driving chip20. The driving chip20is disposed in the binding region12. A plurality of binding terminals30are disposed in the binding region12. The driving chip20is electrically connected to the binding chips30.

The display panel100further includes a plurality of signal bus lines40. The signal bus lines40are disposed in the signal bus line region13. The plurality of signal bus lines40extend along a first direction X and are spaced apart in a second direction Y. The first direction X is different from the second direction Y.

In one embodiment of the present application, taking the planar schematic diagram illustrated inFIG.2as an example, the first direction X is a horizontal direction, the second direction Y is a vertical direction, and the first direction X is perpendicular to the second direction Y.

The display panel further includes a demultiplexing circuit region14. The demultiplexing circuit region14is defined between the display region10and the signal bus line region13. The display panel includes a demultiplexing circuit. The demultiplexing circuit is disposed in the demultiplexing circuit region14.

The display panel further includes a plurality of fan-out wirings50. An end of the fan-out wirings50is electrically connected to the corresponding binding terminals30in the binding region12. Another end of the fan-out wirings50extends to the demultiplexing circuit region14through the signal bus line region13and is connected to the corresponding demultiplexing circuit.

The fan-out wirings50and the signal bus lines40are disposed in different layers. An orthogonal projection of the signal bus lines40in a thickness direction of the display panel overlaps with an orthogonal projection of the fan-out wirings50in the thickness direction of the display panel.

The signal bus line region13includes a first region131defined aligned to the binding region12and a second region132located on two opposite sides of the first region131. From the second region132of a side, the signal bus lines40can sequentially pass through the first region131and the second region132located on another side along the first direction X.

In one embodiment of the present application, illustrated inFIG.3is an enlarged schematic diagram of a binding region provided by one embodiment of the present application. A distance b1between sides away from each other of a first and a last of the signal bus lines40in the first region131in the second direction Y is smaller than a distance b2between sides away from each other of a first and a last of the signal bus lines40in the second region132in the second direction Y.

With reference toFIG.2andFIG.3, the driving chip20is disposed directly below the first region131, a width of a lower bezel of the display panel100relates to the distance b1between the sides away from each other of the first and the last of the signal bus lines40in the first region131in the signal bus line region13in the second direction Y, a width of the binding region12in the second direction Y, and a width between the first region131and the binding region12in the second direction Y. Increasing the distance b2between the sides away from each other of the first and the last of the signal bus lines40in the second region132will not affect the width of the lower bezel of the display panel100.

Illustrated inFIG.4is a comparison schematic diagram of the current display panel and the display panel provided by one embodiment of the present application. Compared to the current display panel illustrated on the left side ofFIG.4, the width of the first region131in the signal bus lines of the display panel provided by the embodiments of the present application can be smaller than the width of the signal bus line region13in the current display panel. Hence, by reducing the distance b1between the sides away from each other of the first and the last of the signal bus lines40in the first region131in the signal bus line region13in the second direction Y, a distance between the binding region12and the demultiplexing circuit region14can be reduced, thereby being able to reduce a certain width a of the lower bezel of the display panel100.

Furthermore, the distance b2between the sides away from each other of the first and the last of the plurality of signal bus lines in the second region132in the second direction Y gradually decreases from an end away from the first region131to an end close to the first region131.

It should be noted that the distance between the sides away from each other of the first and the last of the signal bus lines in the signal bus line region13in the second direction Y refers to a sum of the width of each of the signal bus lines40in the signal bus line region13and the distance between each of the signal bus lines40. By reducing the width of each signal bus line40in the first region131, and/or by reducing the distance between each signal bus line40in the first region131, the distance b1between the sides away from each other of the first and the last of the signal bus lines in the first region131in the second direction Y is allowed to be reduced at a certain extent. By increasing the width of each signal bus line40in the second region132, and/or by increasing the distance between each signal bus line40in the second region132, the distance b2between the sides away from each other of the first and the last of the signal bus lines in the second region132in the second direction Y is allowed to be increased at a certain extent.

In one embodiment of the present application, the signal bus lines40include first portions41located in the first region131and second portions42located in the second region132and connected to the first portions41, and a distance between a side of the first portion41and a same side of an adjacent first portion41is less than a distance between a side of the second portion42and a same side of an adjacent second portion42.

With reference toFIG.2andFIG.3, in one embodiment of the present application, the signal bus lines40include signal bus lines40_1,40_2, and40_3spaced apart from each other along the second direction Y. Taking the signal bus line40_1as an example, the signal bus line40_1includes the first portion41located in the first region131and the second portion42of the second region132located on two sides of the first region131, and the second portion42is connected to the first portion41. The structures of other signal bus lines in the signal bus line region13can refer to the structure of the signal bus line40_1, redundant description will not be mentioned herein again.

It should be noted thatFIG.2andFIG.3only schematically show arrangement manners and structural features of the signal bus lines40in the signal bus line region13, and a number of signal bus lines40in the signal bus line region13inFIG.1andFIG.2does not represent a number in practical application.

Furthermore, the distance between the side of the second portion42and the same side of the second portion42gradually decreases from the end away from the first portions41to the end close to the first portions41.

In one embodiment of the present application, taking the signal bus lines40_1and40_2as an example, a distance b4between an upper side of the second portion42of the signal bus line40_1and an upper side of the second portion42of the signal bus line40_2is a sum of a width of the second portion42of the signal bus line40_1and a distance between a lower side of the second portion42of the signal bus line40_1and an upper side of the second portion42of the signal bus line40_2.

Furthermore, a distance between a side of the second portion42and a same side of an adjacent second portion42is greater than a distance between a side of the first portion41and a same side of an adjacent first portion41.

In one embodiment of the present application, taking the signal bus lines40_1and40_2as an example, a distance b3between an upper side of the first portion41of the signal bus line40_1and an upper side of the first portion41of the signal bus line40_2is less than the distance b4between the upper side of the second portion42of the signal bus line40_1and the upper side of the second portion42of the signal bus line40_2.

The distance b3between the upper side of the second portion42of the signal bus line40_1and the upper side of the second portion42of the signal bus line40_2gradually decreases from the end away from the first portion41to the end close to the first portion41. After accumulation of the plurality of signal bus lines40, the width of the second region132in the second direction Y is allowed to gradually decrease from the end away from the first region131to the end close to the first region131, and the width of the first region131is allowed to be smaller than the width of the second region132. Hence, the width between the binding region12and the signal bus line region13is reduced, thereby effectively reducing the width of the lower bezel of the display panel.

In one embodiment of the present application, a width of the second portions42in the second direction gradually decreases from the end away from the first portions41to the end close to the first portions41, and the width of the first portion41in the second direction Y is equal everywhere.

As illustrated inFIG.3, taking the signal bus lines40_1and40_2as an example, the signal bus line40_1is the one farthest from the binding region12, the first portion41of the signal bus line40_1is a straight line segment parallel to the first direction X, and the width of the first portion41in the second direction Y is equal everywhere. The width of the second portion42of the signal bus line40_1in the second direction Y gradually decreases from the end away from the first portion41to the end close to the first portion41, and a lower side of the second portion42is an inclined straight line segment intersecting with the first direction X, meanwhile, the width of the second portion42in the second direction Y is greater than the width of the first portion41in the second direction Y.

The first portion41of the signal bus line40_2is a straight line segment parallel to the first direction X, and the width of the second portion42of the signal bus line40_2gradually decreases from the end away from the first portion41to the end close to the first portion41, and an upper side and a lower side of the second portion42are inclined straight line segments intersecting with the first direction X. The structure of other signal bus lines40below the signal bus line40_2can refer to the structure of the signal bus line40_2, redundant description will not be mentioned herein again. In this way, an overall width of the first region131can be reduced by reducing the width of each first portion41in the first region131, thereby reducing the width of the lower bezel of the display panel100. Meanwhile, by increasing the width of the second portion42in the second region132, impedance of each signal bus line40is kept unchanged or within a preset range, thereby preventing the impedance of the signal bus line40from increasing due to decrement of the width of the first portion41.

In one of the embodiments, distances between any two adjacent second portions42are equal, and the distances between any two adjacent second portions42are greater than or equal to distances between two adjacent first portions41.

Specifically, taking the signal bus lines40_1and40_2as an example, while the second portions42of the signal bus lines40_1and40_2gradually decrease from the end away from the first portions41to the end close to the first portions41, the distance between the first portion41of the signal bus line40_1and the first portion41of the signal bus line40_2is equal everywhere at the same time, and the distance between the second portion42of the signal bus line40_1and the second portion42of the signal bus line40_2is also equal everywhere. Furthermore, the distance between two adjacent second portions42is greater than the distance between two adjacent first portions41.

In one of the embodiments, a distance between any two adjacent second portions42gradually decreases from the end away from the first portions41to the end close to the first portions41, the distance between two adjacent second portions42is greater than the distance between two adjacent first portions41, and the distance between any two adjacent first portions41are equal everywhere.

Specifically, please refer toFIG.3, taking the signal bus lines40_1and40_2as an example, while the second portions42of the signal bus lines40_1and40_2gradually decrease from the end away from the first portions41to the end close to the first portions41, the distance between the first portion41of the signal bus line40_1and the first portion41of the signal bus line40_2is equal everywhere at the same time, and the distance between the second portion42of the signal bus line40_1and the second portion42of the signal bus line40_2gradually decreases from the end away from the first portions41to the end close to the first portions41. In this way, the distance between the side of the second portion42and the same side of the adjacent second portion42is allowed to be represented in a gradually decrement trend, thereby allowing to decrease the width of the first region131in the second direction Y. Meanwhile, the closer the distance between adjacent signal bus lines40is, the lager the parasitic capacitance is. By increasing the distance between the adjacent second portions42located in the second region132, the parasitic capacitance of the signal bus lines40can be effectively reduced, and increment of a resistor-capacitor (RC) load of the signal bus lines40incurred by increment of the parasitic capacitance of the signal bus lines40due to reduction of the distance between the adjacent first portions41in the first region131is prevented.

In one of the embodiments, the width of the second portion42in the second direction Y is equal everywhere, a distance between any two adjacent second portions42gradually decreases from the end away from the first portions41to the end close to the first portions41, and the distance between two adjacent second portions42is greater than the distance between two adjacent first portions41.

Specifically, taking the signal bus lines40_1and40_2as an example, the widths of the second portion42of the signal bus line40_1in the second direction Y are all equal, and the width of the first portion41of the signal bus line40_1in the second direction Y can be equal to the width of the second portion42in the second direction Y, or the width of the first portion41of the signal bus line40_1in the second direction Y can also be smaller than the width of the second portion42in the second direction Y. The distance between the second portions42of the signal bus line40_1and the second portion42of the signal bus line40_2gradually decreases from the end away from the first portions41to the end close to the first portions41. The distance between the second portion42of the signal bus line40_1and the second portion42of the signal bus line40_2is greater than the distance between the first portion41of the signal bus line40_1and the first portion41of the signal bus line40_2. In this way, the distance between the adjacent first portions41can be made to be smaller than the distance between adjacent second portions42, so that the distance between the adjacent second portions42is made to be in a gradually decreasing trend. In this way, the width of the first region131in the second direction Y can also be reduced.

In one embodiment of the present application, the signal bus line40can be the demultiplexing signal bus line, the signal bus line40can be connected to a control terminal of the demultiplexing circuit, the fan-out wiring50can be connected to an input terminal of the demultiplexing circuit, and an output terminal of the demultiplexing circuit can be connected to a corresponding data signal line in the display region10.

In practical applications, the signal bus line40is not limited to the demultiplexing signal bus line in the aforesaid embodiments. The signal bus line40can also be a cell test bus line or a common electrode signal bus line. For example, when the signal bus line40is the common electrode signal bus line, the signal bus line region13can be disposed between the demultiplexing circuit region14and the display region10.

As illustrated inFIG.3, the plurality of fan-out wirings50include a plurality of first fan-out wirings51. The first fan-out wirings51include first segments511led out from the binding region12along the second direction, second segments512connected to the first segments511and extending along a direction different from the first direction X and the second direction Y, and third segments513connected to the second segments512and extending to the demultiplexing circuit region14through the first region131along the second direction Y.

The fan-out wirings50further include a plurality of second fan-out wirings52. The second fan-out wirings52include fourth segments521led out from the binding region12along the second direction Y, fifth segments522connected to the fourth segments521and extending along a direction different from the first direction X and the second direction Y, and sixth segments523connected to the fifth segments522and extending to the demultiplexing circuit region14through the second region132along the second direction Y.

Furthermore, both the second segments512and the fifth segments522are located on a side of the signal bus lines40away from the demultiplexing circuit region14, and an included angle between the second segments512and the second direction Y is less than an included angle between the fifth segments522and the second direction Y.

As illustrated inFIG.3, taking the first fan-out wiring51and the second fan-out wiring52marked in the figure as an example, the first segment511of the first fan-out wiring51is led out from the binding region12along the second direction Y, an end of the second segment512is connected to the first segment511, another end of the second segment512extends toward the first region131in an inclined direction different from the first direction X and the second direction Y, and the second segments512of each of the first fan-out wiring51are all disposed on the side of the signal bus line region13away from the demultiplexing circuit region14.

The third segment513is connected to another end of the second segment512, extends to the demultiplexing circuit region14through the first region131along the second direction Y, and overlaps with the first portion41of the plurality of signal bus lines40in the first region131in a thickness direction of the display panel. Ends of each of the third segments513connected to the second segments512are on a same straight line parallel to the first direction X and are disposed on a side of the signal bus line region13away from the demultiplexing circuit region14. The fourth segment521of the second fan-out wiring52is led out from the binding region12along the second direction Y. An end of the fifth segment522is connected to the fourth segment521. Another end of the fifth segment522extends toward the second region132in an inclined direction different from the first direction X and the second direction Y. In one same second region132, the fifth segments522of each of the second fan-out wiring52are all disposed on the side of the signal bus line region13away from the demultiplexing circuit region14.

The sixth segment523is connected to another end of the fifth segment522, extends to the demultiplexing circuit region through the second region132along the second direction Y, and overlaps with the second portion42of the plurality of signal bus lines in the second region132in the thickness direction of the display panel. Ends of the sixth segments523connected to the fifth segments522are all disposed on a side of the signal bus line region13away from the demultiplexing circuit region14.

The second segments512of the plurality of first fan-out wirings51are disposed in parallel and spaced apart from each other. An included angle between the second segment512of the first fan-out wiring51and the second direction Y is a. The fifth segments522of the plurality of second fan-out wirings52are disposed in parallel and spaced apart from each other. An included angle between the fifth segment522of the second fan-out wiring52and the second direction Y is β. The included angle α is less than the included angle β.

The display panel can further include a plurality of signal wirings60extending along the second direction Y. An end of the signal wirings60can be connected to the corresponding signal bus lines40. Another end of the signal wirings60can be connected to the corresponding demultiplexing circuit in the demultiplexing circuit region14. The signal wirings60and the signal bus lines40can be disposed in different film layers. The signal wirings60can be connected to the signal bus lines40through via holes between the different film layers. The signal wirings60and the fan-out wirings50can be disposed in a same layer.

It should be noted that in related art illustrated inFIG.1, the fan-out wirings50can include a first vertical section501, an inclined section502, and a second vertical section503connected in sequence. The first vertical section501and the second vertical section503both extend along the second direction Y. The inclined section502extends in a direction different from the first direction X and the second direction Y. The inclined section502is disposed on a side of the signal bus lines40away from the demultiplexing circuit region14. Ends of the second vertical section503of each of the fan-out wirings50connected to the inclined section502are disposed on a same straight line parallel to the first direction X.

With reference toFIG.1toFIG.3, if the wiring manner of the fan-out wirings50in the related art illustrated inFIG.1is adopted in both the first fan-out wiring51and the second fan-out wiring52in the embodiments of the present application, the end of the sixth segment523connected to the fifth segment522in the second fan-out wiring52and the end of the third segment513connected to the second segment512in the first fan-out wiring51are located in a same straight line parallel to the first direction X. As the signal wirings60are disposed in the same layer as the first fan-out wirings51and the second fan-out wirings52, and the length of the plurality of signal wirings60corresponding to the second region132gradually increases from the side close to the first region131to the side away from the first area131, when the signal wirings60reach a certain length, they can intersect with the fifth segments522inclinedly disposed in the second fan-out wirings52, resulting in appearance of short circuit.

By increasing the included angle β between the fifth segment522of the second fan-out wirings52and the second direction Y, the included angle β is made to be larger than the included angle α between the second segment512of the first fan-out wiring51and the second direction Y. Hence, inclination extent of the fifth segment522is reduced, so that the ends of the fifth segment522connected to the sixth segment523can all be disposed on the side of the signal bus line region13away from the demultiplexing circuit region14. In this way, intersection between the fifth segment522of the second fan-out wiring52and the signal wiring60is prevented, thereby being able to prevent the short circuit between the second fan-out wirings52and the signal wirings60.

In one of the embodiments, from the side close to the first region131to the side away from the first region131, the distance b2between the sides away from each other of the first and the last of the signal bus lines40in the second region132gradually increase. The length of the signal wirings60increases as the distance b2increases, and a distance b6between the end of the sixth segment523connected to the fifth segment522and the demultiplexing circuit region14also gradually increases, thereby preventing intersection from appearing between the fifth segment522and the signal wiring60.

In one of the embodiments, a distance b5between the end of the second segment512connected to the third segment513and the demultiplexing circuit region14is less than the distance b6between the end of the fifth segment522connected to the sixth segment523and the demultiplexing circuit region14.

Furthermore, the ends of the sixth segments523of at least two second fan-out wirings52located on any side of the first region131and connected to the fifth segments522are located in a same inclined straight line.

In one of the embodiments, as illustrated inFIG.3, taking the plurality of second fan-out wirings52located on the left side of the first region131as an example, the ends of the sixth segment523of the plurality of second fan-out wirings52connected to the fifth segment522are all in the same inclined straight line L1. An extending direction of the inclined straight line L1is different from the first direction X and the second direction Y. The signal bus lines40can be disposed on a side of the inclined straight line L1close to the demultiplexing circuit region14.

In one of the embodiments, taking the plurality of second fan-out wirings52located on a left side of the first region131as an example, the ends of the sixth segments523of 2, 3, or more than 3 of the second fan-out wirings52connected to the fifth segment522can all be located in the same inclined straight line L1, the ends of the sixth segment523of the other second fan-out wirings52connected to the fifth segments522can be not in the inclined straight line L1, but they only need to be located on the side of the signal bus region13away from the demultiplexing circuit region14, which is also possible to prevent intersection with the signal trace60from appearing.

Furthermore, a distance between a side of the second fan-out wiring52and a same side of an adjacent second fan-out wiring52is greater than than a distance between a side of the first fan-out wiring51and a same side an adjacent first fan-out wiring51.

In one of the embodiments, the distance between the side the second fan-out wiring52and the same side the second fan-out wiring52gradually decreases from the end away from the first portions131to the end close to the first portions131.

As illustrated inFIG.3, taking the fifth segment522of the second fan-out wiring52as an example, a distance b7between a side of the fifth segment522and a same side of the fifth segment522of the adjacent second fan-out trace52in the first direction X is greater than the distance between a side of the second segment512in the first fan-out wiring51and a same side of the adjacent second segment512, the distance b7between the side of the fifth segment522and the same side of the fifth segment522of the adjacent second fan-out trace52in the first direction X gradually decreases from the side away from the first region131to the side close to the first region131. In this way, by increasing the distance b7between the same sides of the fifth segments522of the two adjacent second fan-out wirings52on the side away from the first region131, intersection between the fifth segment522and the second portion42of the signal bus lines40is possible to prevent.

According to the display panel provided by the aforesaid embodiments of the present application, one embodiment of the present application further provides an electronic device. The electronic device includes the display panel of provided by the aforesaid embodiments. The electronic device can be a mobile terminal, e.g., a color electronic paper, a color e-book, a smart phone, etc., the electronic device can also be a wearable terminal, e.g., a smart watch, a smart bracelet, etc., and the electronic device can also be a fixed terminal, e.g., a color electronic billboard, a color electronic poster, etc.

Beneficial effects of the embodiments of the present application: The embodiments of the present application provide a display panel and an electronic device. The electronic device includes the display panel. The display panel includes a display region, a binding region defined on a side of the display region, and a signal bus line region located between the display region and the binding region. The display panel includes a driving chip disposed in the binding region, and a plurality of signal bus lines disposed in the signal bus line region. The plurality of signal bus lines extend along a first direction and are spaced apart in a second direction. The first direction is different from the second direction. The signal bus line region includes a first region defined aligned to the binding region and a second region located on two opposite sides of the first region. By reducing the distance between the sides away from each other of the first and the last of the signal bus lines in the first region, hereby, a width of a lower bezel of the display panel is reduced.

In summary, although the present application has disclosed the preferred embodiments as above, however the above-mentioned preferred embodiments are not to limit to the present application. A person skilled in the art can make any change and modification, therefore the scope of protection of the present application is subject to the scope defined by the claims.