Wireless transceiver circuit with reduced area

A wireless power transmission/reception system includes a wireless power transmission circuit and a wireless power reception circuit. The wireless power transmission circuit includes an oscillator, a DC-AC converter that converts a direct current to an alternating current and is turned on/off in response to a control signal, a power transmission coil that transmits AC power, a signal reception coil, and a signal receiver that transfers the control signal to the DC-AC converter. The wireless power reception circuit includes a power reception coil, a rectifier that converts an alternating current to a direct current and is turned on or off in response to the control signal, an control signal generator that generates the control signal, a signal transmission coil, and a signal transmitter that transmits the control signal through the signal transmission coil.

CROSS-REFERENCE TO RELATED APPLICATIONS

The present application claims priority to Korean Patent Application No. 10-2013-0091292, filed on Aug. 1, 2013, and to Korean Patent Application No. 10-2013-0094350, filed on Aug. 8, 2013, which are incorporated herein by reference in their entirety.

BACKGROUND

Embodiments of the present invention relate to a technology for wirelessly transmitting and receiving signals and power, and more particularly, to a technology for transmitting and receiving a signals and power between integrated circuit (IC) chips or between an IC chip and test equipment in a near field.

Before many types of ICs, including memories, are delivered to customers, whether the ICs operate normally is tested before and after a packaging step. This includes testing the ICs during a wafer test step, before the ICs formed on a wafer are singulated into individual IC chips. In the related art, the wafer test step is performed by placing probe tips, referred to herein as needles, in contact with pads of an IC formed on the wafer and transmitting and receiving signals using the needles. The needles used in the wafer test step are formed on a probe card. The number of needles on the probe card corresponds to the product of the number of IC chips which can be simultaneously tested using the probe card, which may include all of the IC chips formed on one wafer, and the number of pads to be probed in each IC chip.

In a wired test scheme in which signals are transmitted and received using needles formed on a probe card, problems arise from having a large number of needles on the probe card. Particularly, an increase in the number of ICs formed on each wafer, in the number of ICs simultaneously tested using the probe card, and/or in the number of pads formed on an IC results in an increase in the number of needles. The increased number of needles produces an increase in a pressure applied to a wafer by the probe card.

To solve the problems of the aforementioned wired test scheme, a technology has been proposed in which signals are wirelessly exchanged between an IC on a wafer and a probe card, or wirelessly exchanged between a plurality of IC chips stacked in one package. The technology uses the wireless signal transmission/reception technology using inductively coupled coils disclosed in Korean Patent Reg. No. 1066128.

SUMMARY

Embodiments of the present invention are directed towards reducing an area of a wireless transceiver circuit and towards wirelessly transmitting and receiving power.

In accordance with an embodiment of the present invention, a wireless transceiver circuit includes: a coil; a first pull-up driver configured to source a current to a first terminal of the coil; a first pull-down driver configured to sink a current from the first terminal of the coil; a second pull-up driver configured to source a current to a second terminal of the coil; a second pull-down driver configured to sink a current from the second terminal of the coil; and a controller configured to activate the first pull-up driver and the second pull-down driver or activate the second pull-up driver and the first pull-down driver in a transmission operation of the wireless transceiver circuit, and to activate the first pull-up driver, the first pull-down driver, the second pull-up driver, and the second pull-down driver in a reception operation of the wireless transceiver circuit.

A wireless reception circuit in accordance with another embodiment of the present invention includes a coil, and a differential latch that latches a voltage change in the first terminal of the coil and a voltage change in the second terminal of the coil, and generates a positive signal and a negative signal. The wireless reception circuit may further include a differential amplifier that amplifies the positive signal and the negative signal. The differential latch includes a first load coupled between a high voltage terminal and a negative output terminal on which the negative signal is loaded, a first pull-down driver that pull-down drives the negative output terminal in response to a voltage of the first terminal of the coil, a second load coupled between the high voltage terminal and a positive output terminal on which the positive signal is loaded, a second pull-down driver that pull-down drives the positive output terminal in response to a voltage of the second terminal of the coil, a third pull-down driver that pull-down drives the negative output terminal in response to a voltage of the positive output terminal; and a fourth pull-down driver that pull-down drives the positive output terminal in response to a voltage of the negative output terminal. The differential amplifier includes a third load coupled between the high voltage terminal and a negative data terminal, a fifth pull-down driver that pull-down drives the negative data terminal in response to the voltage of the positive output terminal, a fourth load coupled between the high voltage terminal and a positive data terminal, and a sixth pull-down driver that pull-down drives the negative data terminal in response to the voltage of the negative output terminal. The wireless reception circuit may further include a bias voltage applying terminal, a first resistor between the bias voltage applying terminal and the first terminal of the coil, and a second resistor between the bias voltage applying terminal and the second terminal of the coil. A transmission circuit for transmitting a signal through the coil may be coupled to the first terminal and the second terminal of the coil, and may apply a predetermined level of voltage to the first terminal and the second terminal of the coil at the time of activation of a reception circuit.

A wireless transceiver circuit in accordance with another embodiment of the present invention includes a coil, a reception circuit that receives signal using a voltage change at both terminals of the coil, and a transmission circuit that induces the voltage change at both terminals of the coil to transmit a signal, and applies a predetermined voltage to both terminals of the coil in an operation of the reception circuit. The transmission circuit may allow a current to flow from the first terminal to the second terminal of the coil when transmission data changes from ‘low’ to ‘high’, and allow a current to flow from the second terminal to the first terminal of the coil when the transmission data changes from ‘high’ to ‘low’.

In accordance with another embodiment of the present invention, a wireless power transmission circuit includes: an oscillator; a DC-AC converter configured to convert a direct current to an alternating current in response to a periodic wave generated by the oscillator and to be turned on/off in response to an on/off signal; a power transmission coil configured to transmit AC power converted by the DC-AC converter; a signal reception coil; and a signal receiver configured to transfer the on/off signal received through the signal reception coil to the DC-AC converter.

In accordance with another embodiment of the present invention, a wireless power reception circuit includes: a power reception coil; a rectifier configured to convert an alternating current received through the power reception coil to a direct current and to be turned on/off in response to an on/off signal; an on/off signal generator configured to generate the on/off signal indicating whether a level of a direct voltage converted by the rectifier is sufficient; a signal transmission coil; and a signal transmitter configured to transmit the on/off signal through the signal transmission coil.

In accordance with another embodiment of the present invention, a wireless power transmission/reception system includes a wireless power transmission circuit and a wireless power reception circuit. The wireless power transmission circuit includes: an oscillator; a DC-AC converter configured to convert a direct current to an alternating current in response to a periodic wave generated by the oscillator and to be turned on/off in response to an on/off signal; a power transmission coil configured to transmit AC power converted by the DC-AC converter; a signal reception coil; and a signal receiver configured to transfer the on/off signal received through the signal reception coil to the DC-AC converter. The wireless power reception circuit includes: a power reception coil; a rectifier configured to convert an alternating current received through the power reception coil to a direct current and to be turned on/off in response to the on/off signal; an on/off signal generator configured to generate the on/off signal indicating whether a level of a direct voltage converted by the rectifier is sufficient; a signal transmission coil; and a signal transmitter configured to transmit the on/off signal through the signal transmission coil.

According to the embodiments of the present invention, the wireless transmission circuit supplies a bias voltage for the wireless reception circuit and therefore a separate circuit for applying the bias voltage is not necessary. Furthermore, the first stage of the wireless reception circuit is realized by a differential latch, so that it is possible to amplify a signal of the coil and simultaneously to restore digital data.

In addition, according to the embodiments of the present invention, the wireless power reception circuit receiving substantially more power than necessary is prevented. Specifically, the power transmission of the wireless power transmission circuit is effectively turned on and off.

DETAILED DESCRIPTION

FIG. 1is a diagram of a wireless transceiver circuit100in accordance with an embodiment of the present invention. The wireless transceiver circuit100includes a coil110, a transmission circuit120, and a reception circuit130.

The coil110of the wireless transceiver circuit100creates inductive coupling with a coil of another wireless transceiver circuit, and exchanges a signal therewith. The coil110has first and second terminals A and B, and transmits and/or receives a signal according to whether a current flows from the first terminal A to the second terminal B or from the second terminal B to the first terminal A. In an embodiment, the coil110is formed using an interconnection on a substrate in which the wireless transceiver circuit100is formed, such as, for example, an interconnect in a metal layer of an IC chip of a semiconductor wafer, or a trace in a package or printed circuit board.

The transmission circuit120transmits transmission data TX_DATA through the coil110. In wireless data transmission using the coil110, the data transmission is performed when the transmission data TX_DATA changes. For example, when the transmission data TX_DATA changes from ‘low’ to ‘high’, the transmission circuit120is driven such that a current flows from the first terminal A to the second terminal B of the coil110, and when the transmission data TX_DATA changes from ‘high’ to ‘low’, the transmission circuit120is driven such that a current flows from the second terminal B to the first terminal A of the coil110.

When the wireless transceiver circuit100receives data, that is, when the reception circuit130receives data, the transmission circuit120applies a predetermined level of bias voltage to both terminals A and B of the coil110. InFIG. 1, a signal TX/RX has a first value when the wireless transceiver circuit100transmits data and has a second value when the wireless transceiver circuit100receives data.

The reception circuit130detects a change in a voltage induced across terminals A and B of the coil110and generates reception data RX_DATA. In order for the reception circuit130to accurately detect a small voltage change across the terminals A and B of the coil110, a predetermined bias voltage is applied to both terminals A and B of the coil110. In an embodiment, since the bias voltage is supplied by the transmission circuit120during the operation of the reception circuit130, a separate circuit for applying the bias voltage to both terminals A and B of the coil110is not necessary.

FIG. 2is a diagram of the transmission circuit120ofFIG. 1in accordance with one embodiment. The transmission circuit120includes a first pull-up driver210, a first pull-down driver220, a second pull-up driver230, a second pull-down driver240, and a controller250.

The first pull-up driver210is configured for sourcing a current to the first terminal A of the coil110, and when activated applies a high voltage VDD to the first terminal A. The first pull-up driver210is activated in response to a first pull-up driving signal PU1, and may include a PMOS transistor as illustrated inFIG. 2.

InFIG. 2, the high voltage applied to the first terminal A of the coil110by the first pull-up driver210is indicated by a power supply voltage VDD. However, a person of skill in the art in light of the teachings and disclosures herein would understand that any sufficiently high voltage may be used.

The first pull-down driver220is configured for sinking a current from the first terminal A of the coil110, and when activated applies a low voltage to the first terminal A. The first pull-down driver220is activated in response to a first pull-down driving signal PD1, and may include an NMOS transistor as illustrated inFIG. 2.

InFIG. 2, the low voltage applied to the first terminal A of the coil110by the first pull-down driver220is indicated by a ground voltage. However, a person of skill in the art in light of the teachings and disclosures herein would understand that any sufficiently low voltage may be used.

The second pull-up driver230is configured for sourcing a current to the second terminal B of the coil110, and when activated applies the high voltage VDD to the second terminal B. The second pull-up driver230is activated in response to a second pull-up driving signal PU2, and may include a PMOS transistor as illustrated inFIG. 2.

The second pull-down driver240is configured for sinking a current from the second terminal B of the coil110, and when activated applies the low voltage to the second terminal B. The second pull-down driver240is activated in response to a second pull-down driving signal PD2, and may include an NMOS transistor as illustrated inFIG. 2.

The controller250generates the first pull-up driving signal PU1, the first pull-down driving signal PD1, the second pull-up driving signal PU2, and the second pull-down driving signal PD2. Table 1, below, andFIG. 17illustrate an operation of the controller250.

When the wireless transceiver circuit100transmits data (in the period in which TX/RX=H), the controller250generates the driving signals PU1, PD1, PU2, and PD2such that a current may flow from the first terminal A of the coil110to the second terminal B of the coil110during a first transmission operation or from the second terminal B to the first terminal A during a second transmission operation. The first or second transmission operation occur when the transmission data TX_DATA changes.

When the transmission data TX_DATA changes from low (L) to high (H), the first transmission operation occurs. The controller250activates the first pull-up driving signal PU1and the second pull-down driving signal PD2to activate the first pull-up driver210and the second pull-down driver240, respectively. When the first pull-up driver210and the second pull-down driver240are activated, a current flows from the first terminal A to the second terminal B.

When the transmission data TX_DATA changes from H to L, the second transmission operation occurs. The controller250activates the first pull-down driving signal PD1and the second pull-up driving signal PU2to activate the first pull-down driver220and the second pull-up driver230, respectively. When the first pull-down driver220and the second pull-up driver230are activated, a current flows from the second terminal B to the first terminal A.

When TX/RX=H and the transmission data TX_DATA is not changing, the controller250deactivates all the driving signals PU1, PD1, PU2, and PD2and thereby deactivates all the drivers210,220,230, and240.

When the wireless transceiver circuit100receives data (in the period in which TX/RX=L), the controller250activates all the driving signals PU1, PD1, PU2, and PD2in order to activate all the drivers210,220,230, and240. Thus, a bias voltage having an intermediate voltage level between the high voltage VDD and the low voltage is applied to both terminals A and B of the coil110, which enhances the accuracy of a data reception operation of the reception circuit130.

For the level of the bias voltage applied to both terminals A and B of the coil110to be the intermediate voltage level between the high voltage and the low voltage when the wireless transceiver circuit100receives data, turn-on resistance values of the PMOS transistors210and230and the NMOS transistors220and240may be designed to be substantially equal to each other. “Substantially equal” includes a difference less than a process error within a margin of a fabrication process. The desired bias voltage applied to both terminals A and B of the coil110when the wireless transceiver circuit100receives data may be varied by the design, and a resistance ratio of the PMOS transistors210and230relative to the NMOS transistors220and240may be selected according to the desired bias voltage.

FIG. 3is a circuit diagram of a reception circuit130A in accordance with an embodiment, which may be used in the reception circuit130ofFIG. 1. The reception circuit130A includes a differential amplifier310and a differential latch320.

The differential amplifier310amplifies a voltage change across the first terminal A and the second terminal B of the coil110, and outputs an amplified value to a positive output terminal C and a negative output terminal D. The differential amplifier310includes a load311coupled between a high voltage terminal VDD and the negative output terminal D, a load312coupled between the high voltage terminal VDD and the positive output terminal C, a pull-down driver313that pull-down drives the negative output terminal D in response to the voltage of the first terminal A, and a pull-down driver314that pull-down drives the positive output terminal C in response to the voltage of the second terminal B.

The differential latch320amplifies and latches a voltage difference between the positive output terminal C and the negative output terminal D, and thereby restores reception data. The differential latch320includes a load321coupled between the high voltage terminal VDD and a negative data terminal RX_DATAB, a load322coupled between the high voltage terminal VDD and a positive data terminal RX_DATA, a pull-down driver323that pull-down drives the negative data terminal RX_DATAB in response to the voltage of the positive output terminal C, and a pull-down driver324that pull-down drives the positive data terminal RX_DATA in response to the voltage of the negative output terminal D. The differential latch320further includes a pull-down driver325that pull-down drives the negative data terminal RX_DATAB in response to the voltage of the positive data terminal RX_DATA, and a pull-down driver326that pull-down drives the positive data terminal RX_DATA in response to the voltage of the negative data terminal RX_DATAB.

FIG. 4illustrates waveforms related to the reception circuit130A ofFIG. 3. The waveforms show voltages at the first terminal A of the coil110, the positive output terminal C, and the positive data terminal RX_DATA shown inFIG. 3.

As shown inFIG. 4, a voltage change at the first terminal A is amplified to produce the signal at the positive output terminal C. A person of skill in the art would understand that a complementary signal is produced at the negative output terminal D ofFIG. 3.

When the signal at the positive output terminal C is driven low and the complementary signal at the negative output terminal D (not shown) is driven high, the differential latch320is caused to enter a first state. When the differential latch320is in the first state, the positive data terminal RX_DATA outputs a low signal as shown inFIG. 4and the negative data terminal RX_DATAB (not shown) complementally outputs a high signal.

The differential latch320maintains the first state until the signal at the positive output terminal C is driven high and the signal at the negative output terminal D is driven low, which causes the differential latch320to enter a second state. When the differential latch320is in the second state, the positive data terminal RX_DATA outputs a high signal and the negative data terminal RX_DATAB outputs a low signal.

The differential latch320maintains the second state until the signal at the positive output terminal C is driven low and the signal at the negative output terminal D is driven high.

FIG. 5is a circuit diagram of a reception circuit130B in accordance with another embodiment, which may be used in the reception circuit130ofFIG. 1. The reception circuit130B includes a differential latch510and a differential amplifier520.

In the embodiment illustrated inFIG. 3, the first stage of the reception circuit130A is the differential amplifier310and the second stage thereof is the differential latch320. In contrast, in the embodiment ofFIG. 5, the first stage of the reception circuit130B is the differential latch510and the second stage is the differential amplifier520.

The differential latch510latches voltage changes of the first terminal A and the second terminal B of the coil110, and outputs restored data to a positive output terminal C and a negative output terminal D. Since the differential latch510is configured as the first stage of the reception circuit130B, but has amplification and latch functions, output signals C and D of the differential amplifier510have the form of the restored data.

The differential latch510includes a load511coupled between a high voltage terminal VDD and the negative output terminal D, a load512coupled between the high voltage terminal VDD and the positive output terminal C, a pull-down driver513that pull-down drives the negative output terminal D in response to the voltage of the first terminal A of the coil110, and a pull-down driver514that pull-down drives the positive output terminal C in response to the voltage of the second terminal B of the coil110. The differential latch510further includes a pull-down driver515that pull-down drives the negative output terminal D in response to the voltage of the positive output terminal C, and a pull-down driver516that pull-down drives the positive output terminal C in response to the voltage of the negative output terminal D.

The differential amplifier520amplifies a voltage difference between the positive output terminal C and the negative output terminal D, and outputs an amplified signal to a positive data terminal RX_DATA and a negative data terminal RX_DATAB. The differential amplifier520includes a load521coupled between the high voltage terminal VDD and the negative data terminal RX_DATAB, a load522coupled between the high voltage terminal VDD and the positive data terminal RX_DATA, a pull-down driver523that pull-down drives the negative data terminal RX_DATAB in response to the voltage of the positive output terminal C, and a pull-down driver524that pull-down drives the positive data terminal RX_DATA in response to the voltage of the negative output terminal D.

FIG. 6is waveforms related to the reception circuit130B ofFIG. 5, and illustrates voltage changes in the first terminal A of the coil110, the positive output terminal C, and the positive data terminal RX_DATA. Referring toFIG. 6, because the first stage of the reception circuit130is configured as the differential latch510, it is noted that a voltage level of the positive output terminal C has a form similar to the restored data.

As shown inFIG. 6, when the signal at the first terminal A goes low and the complementary signal at the second terminal B (not shown) goes high, the differential latch510is caused to enter a first state. When the differential latch510is in the first state, the positive output terminal C outputs a low signal and the negative output terminal D (not shown) outputs a high signal.

The differential latch510maintains the first state until the signal at the first terminal A goes high and the signal at the second terminal B goes low, which causes the differential latch510to enter a second state. When the differential latch510is in the second state, the positive output terminal C outputs a high signal and the negative output terminal D outputs a low signal.

The differential latch510maintains the second state until the signal at the first terminal A goes low and the signal at the second terminal B goes high.

The differential amplifier520amplifies the signals output on the positive output terminal C and the negative output terminal D to produce signals at the positive data terminal RX_DATA and the negative data terminal RX_DATAB.

Because the differential latch510is the first stage of the reception circuit130B, transistors constituting the differential latch510should have high performance. In an embodiment wherein the differential latch510has sufficient amplification performance, digital data is directly restored by the differential latch510, and the differential amplifier520is omitted.

FIG. 7is a diagram of a wireless transceiver circuit700in accordance with another embodiment of the present invention.

The wireless transceiver circuit700includes the wireless transceiver circuit100ofFIG. 1, and further includes a bias voltage applying terminal VBIAS and first and second resistors701and702. The bias voltage applying terminal VBIAS and the resistors701and702provide a bias voltage VBIAS (such as, for example, a half of a high voltage level) to both terminals A and B of the coil110.

In the embodiment ofFIG. 7, since the bias voltage for the operation of the reception circuit130is applied to both terminals A and B of the coil110by the bias voltage applying terminal VBIAS and the resistors701and702, the transmission circuit120does not need to supply the bias voltage for the reception circuit130. Accordingly, in the embodiment ofFIG. 7, the transmission circuit120may be designed such that all the internal drivers210,220,230, and240are deactivated when the wireless transceiver circuit700receives data, that is, in the period in which TX/RX=‘L’.

FIG. 8andFIG. 9are diagrams illustrating applications of a wireless transceiver circuit in accordance with an embodiment.

Referring toFIG. 8, wireless transceiver circuits100_1to100_4are provided to an IC chip810and a probe card820, and are used to transmit and/or receive test signals. Coils of the wireless transceiver circuit100_1and the wireless transceiver circuit100_3use inductive coupling to exchange a signal, and coils of the wireless transceiver circuit100_2and the wireless transceiver circuit100_4use inductive coupling to exchange a signal. Because the IC chip810to be tested and the probe card820for testing the IC chip810wirelessly transmit and receive signals, the need for a number of conventional needles may be reduced or eliminated.

Referring toFIG. 9, wireless transceiver circuits100_1to100_4are provided to IC chips910and920stacked or otherwise incorporated together in a semiconductor package900, and are used to transmit and receive signals between the IC chips910and920in the package900. Coils of the wireless transceiver circuit100_1and the wireless transceiver circuit100_3use inductive coupling to exchange a signal, and coils of the wireless transceiver circuit100_2and the wireless transceiver circuit100_4use inductive coupling to exchange a signal. In the related art, a wire bond, a through-silicon via (TSV), or a similar wired interconnect are used to transmit and/or receive a signal between the chips910and920stacked in the package900. However, these wired interconnects can be replaced with the wireless transceiver circuits100_1to100_4.

InFIG. 1toFIG. 9, a technology for wirelessly transmitting and/or receiving a signal has been described. Hereinafter, a technology for wirelessly transmitting and receiving power will be described.

FIG. 10is a circuit diagram of a wireless power transmission/reception system1000in accordance with an embodiment of the present invention. The wireless power transmission/reception system1000includes a wireless power transmission circuit1010and a wireless power reception circuit1050.

Because the wireless power transmission circuit1010wirelessly transmits power and the wireless power reception circuit1050wirelessly receives the transmitted power, the wireless power transmission circuit1010and the wireless power reception circuit1050are generally provided to different apparatuses. In an embodiment, the wireless power transmission circuit1010and the wireless power reception circuit1050are provided to the probe card820and the IC chip810ofFIG. 8, respectively, and are used to wirelessly supply power to the IC chip810during a test. In another embodiment, the wireless power transmission circuit1010and the wireless power reception circuit1050are provided to the IC chip910and the IC chip920ofFIG. 9, respectively, and are used to supply power from the IC chip910to the IC chip920.

The wireless power transmission circuit1010includes an oscillator1011that generates periodic waves on signals OSC and OSCB, and a DC-AC converter1013that converts a direct current into an alternating current in response to the periodic waves on signals OSC and OSCB. The oscillator1011and the DC-AC converter1013are turned on or off in response to a control signal, e.g., an on/off signal ON/OFF. The wireless power transmission circuit1010also includes a power transmission coil1015used to transmit the AC power generated by the DC-AC converter1013.

The wireless power transmission circuit1010further includes a signal reception coil1017and a signal receiver1019that transfers the on/off signal ON/OFF received through the signal reception coil1017to the DC-AC converter1013.

The wireless power reception circuit1050includes a power reception coil1051, a rectifier1053that converts an alternating current received through the power reception coil1051into a direct current and is turned on or off in response to the on/off signal ON/OFF, and a control signal generator1055that generates the on/off signal ON/OFF indicating whether a level of a direct voltage VOUT produced using the rectifier1053is sufficiently high. The wireless power reception circuit1050further includes a signal transmitter1059that transmits the on/off signal ON/OFF generated by the control signal generator1055using a signal transmission coil1057.

The power transmission coil1015of the wireless power transmission circuit1010is inductively coupled to the power reception coil1051of the wireless power reception circuit1050. The signal transmission coil1057of the wireless power reception circuit1050is inductively coupled to the signal reception coil1017of the wireless power transmission circuit1010.

When the amount of power received by the wireless power reception circuit1050is sufficient, the on/off signal ON/OFF is deactivated and thus the DC-AC converter1013and the rectifier1053are deactivated. As a result, it is possible as to minimize unnecessary power loss and improve the overall power efficiency of the system.

FIG. 11is a diagram of the wireless power reception circuit1050ofFIG. 10in accordance with an embodiment. The wireless power reception circuit1050includes the power reception coil1051, the rectifier1053, the control signal generator1055, the signal transmitter1059, and the signal transmission coil1057.

The power reception coil1051inductively couples with the power transmission coil1015of the wireless power transmission circuit1010and receives AC power thereby. The AC power received in the power reception coil1051is rectified by the rectifier1053and is converted into DC power. The rectifier1053may include a DC-DC converter for converting a received voltage converted into DC into a desired level. An output voltage VOUT of the rectifier1053is used to operate internal circuits (not illustrated) of an apparatus including the wireless power reception circuit1050. The rectifier1053is activated or deactivated according to a logic level of the on/off signal ON/OFF.

The control signal generator1055generates the on/off signal ON/OFF according to whether the output voltage VOUT of the rectifier1053is sufficiently high. The control signal generator1055includes a comparator that compares the level of the output voltage VOUT of the rectifier1053with a reference voltage VREF, as illustrated inFIG. 11. When the level of the output voltage VOUT is higher than the reference voltage VREF, the on/off signal ON/OFF has a ‘high’ level, and when the output voltage VOUT is lower than the reference voltage VREF, the on/off signal ON/OFF has a ‘low’ level. When the on/off signal ON/OFF has a ‘low’ level, the DC-AC converter1013and rectifier1053controlled by the on/off signal ON/OFF are activated, and when the on/off signal ON/OFF has a ‘high’ level, the elements1013and1053are deactivated.

The on/off signal ON/OFF generated by the control signal generator1055is transferred to the wireless power transmission circuit1010through the signal transmitter1059and the signal transmission coil1057. In an embodiment, the signal transmitter1059includes the transmission circuit120shown inFIG. 2.

FIG. 12is a circuit diagram of a wireless power transmission circuit1010A in accordance with a first embodiment, suitable for use in the wireless power transmission circuit1010ofFIG. 10. The wireless power transmission circuit1010A includes an oscillator1011, a DC-AC converter1013A, a power transmission coil1015, a signal reception coil1017, and a signal receiver1019.

The signal receiver1019receives the on/off signal ON/OFF from the wireless power reception circuit1050through the signal reception coil1017. The signal receiver1019transfers the received on/off signal ON/OFF to the oscillator1011and the DC-AC converter1013A. In an embodiment, the signal receiver1019includes the reception circuit130described inFIG. 3orFIG. 5.

The oscillator1011generates periodic waves on signals OSC and OSCB. The periodic wave on signal OSC and the periodic wave on signal OSCB have opposite phases, and have logic levels that are continuously changed like a clock, that is, the logic levels alternate between a first state and a second state.

The oscillator1011may be activated or deactivated in response to the on/off signal ON/OFF. For example, when the on/off signal ON/OFF has a ‘low’ level, the oscillator1011periodically changes the levels of the periodic waves on signals OSC and OSCB. However, when the on/off signal ON/OFF has a ‘high’ level, the oscillator1011fixes the level of each of the signals OSC and OSCB to a predetermined level.

The DC-AC converter1013A converts DC power to AC power in response to the periodic waves on the signals OSC and OSCB, and transmits the AC power through the power transmission coil1015. The DC-AC converter1013A includes a switch1201, a first pull-down driver1202, and a second pull-down driver1203.

The switch1201supplies a high voltage VDD to a center terminal of the power transmission coil1015in response to the on/off signal ON/OFF. The center terminal is electrically connected to the power transmission coil1015between a first terminal A and a second terminal B of the power transmission coil1015.

When the on/off signal ON/OFF has a ‘low’ level, the switch1201is turned on to supply the high voltage VDD to the center terminal of the coil1015. However, when the on/off signal ON/OFF has a ‘high’ level, the switch1201is turned off so that the high voltage VDD is not supplied to the center terminal. Accordingly, when the on/off signal ON/OFF has a ‘high’ level, the DC-AC converter1013is deactivated.

The switch1201may be a PMOS transistor as illustrated inFIG. 12. The high voltage supplied by the switch1201is illustrated as being the power supply voltage VDD. However, a person of skill in the art would understand that any sufficiently high voltage could be used instead of the power supply voltage VDD.

The first pull-down driver1202pull-down drives the first terminal A of the power transmission coil1015, and the second pull-down driver1203pull-down drives the second terminal B of the power transmission coil1015. The first pull-down driver1202and the second pull-down driver1203are alternately turned on according to the logic states of the signals OSC and OSCB. When the signal OSC has a ‘high’ level, the first pull-down driver1202is turned on to pull-down drive the first terminal A of the power transmission coil1015, and when the signal OSCB has a ‘high’ level, the second pull-down driver1203is turned on to pull-down drive the second terminal B of the power transmission coil1015.

Therefore, the first pull-down driver1202and the second pull-down driver1203alternately pull-down drive the first terminal A and the second terminal B of the coil1015, so that AC power is transferred to the wireless power reception circuit1050through the coil1015. The first pull-down driver1202and the second pull-down driver1203may be NMOS transistors as illustrated inFIG. 12.

FIG. 13is a circuit diagram of a wireless power transmission circuit1010B in accordance with a second embodiment, suitable for use in the wireless power transmission circuit1010ofFIG. 10. In the embodiment shown inFIG. 13as compared to the embodiment ofFIG. 12, transistors1301and1302are added to the DC-AC converter1013A ofFIG. 12.

Because the DC-AC converter is designed to wirelessly transmit power, it generates a large amount of AC power. Therefore, a high internal voltage may occur in the DC-AC converter and as a result the first pull-down driver1202and the second pull-down driver1203may be subjected to a voltage greater than a breakdown voltage. Accordingly, in the embodiment ofFIG. 13, the first and second transistors1301and1302are added to form a cascode circuit that reduces the probability that the first pull-down driver1202and the second pull-down driver1203are subjected to the breakdown voltage. The transistors1301and1302may be NMOS transistors as illustrated inFIG. 13, and an appropriate bias voltage VBIAS for turning on the transistors1301and1302is applied to gates of the transistors1301and1302.

FIG. 14is a circuit diagram of a wireless power transmission circuit1010C in accordance with a third embodiment, suitable for use in the wireless power transmission circuit1010ofFIG. 10. In the embodiment ofFIG. 14as compared with the embodiment ofFIG. 13, a third pull-down driver1401and a fourth pull-down driver1402are added to the DC-AC converter1013B ofFIG. 13. The third pull-down driver1401pull-down drives a node C in response to a level of a node D, and the fourth pull-down driver1402pull-down drives the node D in response to the level of the node C. Adding the third pull-down driver1401and the fourth pull-down driver1402increases the amplification provided by the DC-AC converter1013B and provides a higher power gain at substantially the same input power.

The third pull-down driver1401and the fourth pull-down driver1402may be NMOS transistors similar to the first pull-down driver1202and the second pull-down driver1203.

FIG. 15is a circuit diagram of a wireless power transmission circuit1010D in accordance with a fourth embodiment, suitable for use in the wireless power transmission circuit1010ofFIG. 10. In the embodiment ofFIG. 15as compared with the embodiment ofFIG. 13, the switch1201is removed from the DC-AC converter1013B and a bias voltage generator1501is added. The high voltage VDD is directly applied to the center terminal of the coil1015without passing through a switch. Accordingly, the activation or deactivation of the DC-AC converter1013D is not controlled by the presence or absence of the high voltage VDD at the center terminal of the coil1015.

Instead, the bias voltage generator1501adjusts the level of the bias voltage VBIAS according to the logic level of the on/off signal ON/OFF. When the on/off signal ON/OFF has a ‘low’ level, the bias voltage generator1501generates a bias voltage VBIAS sufficient to turn on the transistors1301and1302. When the on/off signal ON/OFF has a ‘high’ level, the bias voltage generator1501generates a bias voltage VBIAS that turns off the transistors1301and1302. Accordingly, when the on/off signal ON/OFF has a ‘low’ level, the flow of a current from the coil1015to the first pull-down driver1202or the second pull-down driver1203is not blocked by the transistors1301and1302, and the operation of the DC-AC converter1013D is activated. However, when the on/off signal ON/OFF has a ‘high’ level, the flow of the current from the coil1015to the first pull-down driver1202or the second pull-down driver1203is blocked by the transistors1301and1302, and the operation of the DC-AC converter1013D is deactivated.

In the embodiments ofFIGS. 12 through 14, wherein the activation or deactivation of the DC-AC converter is controlled through the switch1201, all currents of the DC-AC converter flow through the switch1201. Accordingly, the current flowing through the switch1201may be excessive, and a large power loss occurs in the switch1201. Furthermore, since a large amount of current will flow through the switch1201, the size of a transistor serving as the switch1201should be designed to be very large.

However, in the embodiment ofFIG. 15, because the activation or deactivation of the DC-AC converter1013D is controlled by adjusting the level of the bias voltage VBIAS, the power loss that would otherwise have occurred in the switch1201of the embodiments ofFIGS. 12 through 14is reduced as is the power consumption of the DC-AC converter1013D itself.

FIG. 16is a circuit diagram of a wireless power transmission circuit1010E in accordance with a fifth embodiment, suitable for use in the wireless power transmission circuit1010ofFIG. 10. In the embodiment ofFIG. 16, a DC-AC converter1013E includes a third pull-down driver1401and a fourth pull-down driver1402in addition to the DC-AC converter1013D of the embodiment ofFIG. 15. Similarly to as described for the embodiment ofFIG. 14, the addition of the third and fourth pull-down drivers1401and1402to the DC-AC converter1013D increases the amplification provided by of the DC-AC converter1013D and produces a high power gain at substantially the same input power.

While the present invention has been described with respect to the specific embodiments, it will be apparent to those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined in the following claims. For example, a person of skill in the art would understand that the devices described herein as NMOS or PMOS transistors could instead be, or could in addition include, one or more MOS transistors, junction field effect transistors, bipolar junction transistors, or other suitable devices.