Source driver and operating method thereof

A source driver and an operating method thereof are provided. The source driver includes a high voltage circuit, a low voltage circuit and a sensing circuit. The low voltage circuit is coupled to the high voltage circuit. The high voltage circuit and low voltage circuit drive a display panel. The sensing circuit is coupled to the low voltage circuit. The sensing circuit senses the display panel during an analog-to-digital operating period. At least one of the high voltage circuit and the low voltage circuit is disabled during at least part of the analog-to-digital operating period.

BACKGROUND

Technical Field

The disclosure relates to a display driver, and particularly relates to a source driver and an operating method thereof.

Description of Related Art

In general, owing to the aging problem of the display panel, the product life of the electronic product having the display panel is limited by the aging speed of the display panel. In particular, when the display panel has only a slight brightness decay, other electronic units in the electronic product can still work normally. Therefore, in order to maintain the display quality to extend the product life of the electronic product, monitoring the panel state of the display panel to provide corresponding drive compensation during the operation of the display panel is one of the main solutions at present. However, how to accurately monitor the panel state of the display panel has not been effectively solved. In view of this, how to efficiently and accurately monitor the display panel, the solutions of several embodiments are provided below.

SUMMARY

The disclosure is directed to a source driver and an operating method thereof that are capable of effectively reducing noise interference generated by some circuit units inside the source driver when the source driver is sensing the display panel.

The source driver of the disclosure includes a high voltage circuit, a low voltage circuit and a sensing circuit. The low voltage circuit is coupled to the high voltage circuit. The high voltage circuit and low voltage circuit are configured to drive a display panel. The sensing circuit is coupled to the low voltage circuit. The sensing circuit is configured to sense the display panel during an analog-to-digital operating period. At least one of the high voltage circuit and the low voltage circuit is disabled during at least part of the analog-to-digital operating period.

In an embodiment of the disclosure, the analog-to-digital operating period includes a sampling period and a data conversion period. The at least one of the low voltage circuit and the high voltage circuit is disabled during at least one of the sampling period and the data conversion period.

In an embodiment of the disclosure, the sensing circuit includes a sample circuit. The sample circuit coupled to the display panel. The sample circuit is configured to sample the display panel to receive a plurality of sample signals from the display panel during the sampling period.

In an embodiment of the disclosure, the sensing circuit further includes an analog-to-digital converter circuit. The analog-to-digital converter circuit is coupled to the display pane. The analog-to-digital converter circuit is configured to convert a sample result from the display panel during the data conversion period.

In an embodiment of the disclosure, the low voltage circuit includes a receiving circuit and a latch circuit. The receiving circuit is coupled to the sensing circuit. The latch circuit is coupled to the receiving circuit and the high voltage circuit. The receiving circuit outputs a first toggle signal to the latch circuit to toggle the latch circuit, and the receiving circuit masks the first toggle signal during the at least part of the analog-to-digital operating period to disable the latch circuit.

In an embodiment of the disclosure, the receiving circuit is disabled simultaneously during the at least part of the analog-to-digital operating period.

In an embodiment of the disclosure, the high voltage circuit includes a level shifter circuit and an operational amplifier circuit. The operational amplifier circuit is coupled to the level shifter circuit. The level shifter circuit outputs a second toggle signal to the high voltage circuit according to a first toggle signal, and the second toggle signal is masked during the at least part of the analog-to-digital operating period to disable the operational amplifier circuit.

In an embodiment of the disclosure, the receiving circuit simultaneously disables the level shifter circuit during the at least part of the analog-to-digital operating period.

In an embodiment of the disclosure, the high voltage circuit further includes a digital-to-analog converter circuit. The digital-to-analog converter circuit is coupled to the latch circuit and the operational amplifier circuit. The digital-to-analog converter circuit is simultaneously disabled during the at least part of the analog-to-digital operating period.

The operating method of the disclosure includes steps of: toggling a low voltage circuit and a high voltage circuit to drive a display panel; operating a sensing circuit to sense the display panel during an analog-to-digital operating period; and disabling at least one of the low voltage circuit and the high voltage circuit during at least part of the analog-to-digital operating period.

In an embodiment of the disclosure, the analog-to-digital operating period includes a sampling period and a data conversion period. The step of disabling the at least one of the low voltage circuit and the high voltage circuit during the at least part of the analog-to-digital operating period comprises: disabling the at least one of the low voltage circuit and the high voltage circuit during at least one of the sampling period and the data conversion period.

In an embodiment of the disclosure, the sensing circuit includes a sample circuit. The sample circuit is configured to sample the display panel to receive a plurality of sample signals from the display panel during the sampling period.

In an embodiment of the disclosure, the sensing circuit includes an analog-to-digital converter circuit. The analog-to-digital converter circuit is configured to convert a sample result from the display panel during the data conversion period.

In an embodiment of the disclosure, the low voltage circuit includes a receiving circuit and a latch circuit. The receiving circuit outputs a first toggle signal to the latch circuit to toggle the latch circuit. The step of disabling the at least one of the low voltage circuit and the high voltage circuit during the at least part of the analog-to-digital operating period comprises: masking the first toggle signal during the at least part of the analog-to-digital operating period to disable the latch circuit.

In an embodiment of the disclosure, the step of disabling the at least one of the low voltage circuit and the high voltage circuit during the at least part of the analog-to-digital operating period further comprises: simultaneously disabling the receiving circuit during the at least part of the analog-to-digital operating period.

In an embodiment of the disclosure, the high voltage circuit comprises a level shifter circuit and an operational amplifier circuit. The level shifter circuit outputs a second toggle signal to the high voltage circuit according to a first toggle signal. The step of disabling the at least one of the low voltage circuit and the high voltage circuit during the at least part of the analog-to-digital operating period includes: masking the second toggle signal during the at least part of the analog-to-digital operating period to disable the operational amplifier circuit.

In an embodiment of the disclosure, the step of disabling the at least one of the low voltage circuit and the high voltage circuit during the at least part of the analog-to-digital operating period further comprises: simultaneously disabling the level shifter circuit during the at least part of the analog-to-digital operating period.

In an embodiment of the disclosure, the high voltage circuit further comprises a digital-to-analog converter circuit. The step of disabling the at least one of the low voltage circuit and the high voltage circuit during the at least part of the analog-to-digital operating period further comprises: simultaneously disabling the digital-to-analog converter circuit during the at least part of the analog-to-digital operating period.

Based on the above, the source driver and the operating method of the disclosure can effectively reduce noise interference generated by some circuit units inside the source driver to provide effective and accurate panel sensing results.

DESCRIPTION OF THE EMBODIMENTS

FIG. 1is a block diagram illustrating a source driver according to an embodiment of the disclosure. Referring toFIG. 1, a source driver100includes a sensing circuit110, a low voltage circuit120and a high voltage circuit130. The sensing circuit110is coupled to the low voltage circuit120, and the low voltage circuit120is coupled to the high voltage circuit130. In the embodiment, the source driver100is a driver chip, and the low voltage circuit120and the high voltage circuit130of the source driver100may be used to drive an organic light-emitting diode (OLED) display panel or light-emitting diode (LED) display panel, etc., but the disclosure is not limited thereto. In the embodiment, the source driver100may be coupled to a display panel and a timing controller (TCON).

For example, due to a plurality of pixel units in the organic light-emitting diode display panel may have panel aging problem, such as brightness attenuation which is resulted by the repeating displaying operations, the source driver100of the embodiment may operates the sensing circuit110by sensing a voltage or current to sense the brightness of the pixel units of the display panel or other panel status, so that the source driver100may adjust the driving signal of display panel by performing a voltage or current compensation. Therefore, in the embodiment, the sensing circuit110is used to sense or sample the pixel units in the display panel to obtain a plurality of analog sample signals, and the sensing circuit110converts an analog sample data corresponding to the analog sample signals to a digital sample data. Further, the sensing circuit110may further output the digital sample data to the timing controller, so that the timing controller may compensate the display panel based on the digital sample data.

In the embodiment, the source driver100is a high voltage and low voltage hybrid circuit. The low voltage circuit120and the high voltage circuit130are used to drive the pixel units of the display panel. In the embodiment, the low voltage circuit120may include a low voltage analog circuit, a receiving circuit, a transmitter circuit or a logic circuit, etc., but the disclosure is not limited thereto. The high voltage circuit130may include an operational amplifier circuit, a digital-to-analog converter circuit, a chopper circuit or a level shifter circuit, etc., but the disclosure is also not limited thereto. In the embodiment, the sensing circuit110may include an analog-to-digital converter circuit for converting the sensing result about the display panel, and the analog-to-digital converter circuit may be very sensitive to noise. However, while the low voltage circuit120or the high voltage circuit130is being operated, the low voltage circuit120or the high voltage circuit130may generate a low voltage noise or a high voltage noise to interfere the sensing result of the sensing circuit110, especially during an analog-to-digital operating period of the sensing circuit110. Therefore, in the embodiment, at least one of the low voltage circuit120and the high voltage circuit130is disabled during at least part of the analog-to-digital operating period of the sensing circuit110to effectively reduce noise interference.

FIG. 2is a block diagram illustrating a source driver according to another embodiment of the disclosure. Referring toFIG. 2, a source driver200includes a sensing circuit210, a low voltage circuit220and a high voltage circuit230. The sensing circuit210is coupled to the low voltage circuit220, and the low voltage circuit220is coupled to the high voltage circuit230. In the embodiment, the sensing circuit210includes a sample circuit211and an analog-to-digital converter circuit (ADC)212. The sample circuit211may, for example, include a plurality of sample-and-hold circuit and a plurality of sensing channels, and the sample circuit211may receive a plurality of analog sample signals S_1-S_M by the sensing channels from a display panel, but the disclosure is not limited thereto. M is a positive integer greater than 1. In some embodiments, the analog-to-digital converter circuit212may include a plurality of analog-to-digital converter. That is, the sample circuit211transmits an analog sample data SD corresponding to the analog sample signals S_1-S_M to the analog-to-digital converter circuit212, and the analog-to-digital converter circuit212converts the analog sample data SD into digital data regarding panel information and output an output signal TS including the digital data to a timing controller, so that the timing controller may perform related compensation operations for display driving based on the output signal TS. In some embodiments, the sensing circuit210may further include other circuit, such as a latch circuit or a parallel to serial (P2S) circuit, etc., which is not limited by the disclosure.

In the embodiment, the low voltage circuit220includes a receiving circuit221and a latch circuit222, the receiving circuit221and the latch circuit222are operated by a low voltage level. The receiving circuit221is coupled to the sensing circuit210and the latch circuit222, and may couple to the timing controller to receive an input signal IS from the timing controller. The input signal IS may include a variety of signal, such as clock signal, control signal or image signal, etc., which is not limited by the disclosure. The receiving circuit221may output a first toggle signal LS to the latch circuit222to toggle (or to enable) the latch circuit222, or may output an enable signal ES to the sensing circuit210to ask the sensing circuit210to start the above sensing operations. It should be noted that, the first toggle signal LS may be a low voltage, and be used to toggle some low voltage circuit units, thereby enabling the low voltage circuit units. In some embodiments, the low voltage circuit220may further include other circuit, such as a low voltage analog circuit, a transmitter circuit or a logic circuit, etc., which is not limited by the disclosure.

In the embodiment, the high voltage circuit230includes a digital-to-analog converter circuit231, a level shifter circuit (LVSH)232and an operational amplifier circuit233. The digital-to-analog converter circuit231is coupled to the latch circuit222, and receives the digital data from the latch circuit222. In the embodiment, the digital-to-analog converter circuit231includes a plurality of digital-to-analog converters (DAC)231_1-231_N, and the operational amplifier circuit233includes a plurality of operational amplifiers (OP)233_1-233_N. N is a positive integer greater than 1. The digital-to-analog converters231_1-231_N convert the digital data into analog data, and output the analog data to the operational amplifiers233_1-233_N. Hence, the operational amplifiers233_1-233_N may output a plurality of driving signals DS_1-DS_N to the pixel units of the display panel according to the analog data.

In the embodiment, the level shifter circuit232is coupled to the operational amplifier circuit233. The receiving circuit221may further output the first toggle signal LS to the level shifter circuit232, and the level shifter circuit232converts the first toggle signal LS having a low voltage level to a second toggle signal HS having a high voltage level. The level shifter circuit232outputs the second toggle signal HS to the operational amplifiers233_1-233_N to toggle (or to enable) the operational amplifiers233_1-233_N. It should be noted that, the second toggle signal HS may be a high voltage, and be used to toggle some high voltage circuit units, thereby enabling the high voltage circuit units. Moreover, in some embodiments, the latch circuit222may further provide a plurality of toggle signal having the low voltage level to another plurality of level shifters, so as to correspondingly output another plurality of toggle signals having the high voltage level to each of the digital-to-analog converters231_1-231_N.

More specifically, during a driving period, the receiving circuit221may receive the input signal IS having some panel driving data from the timing controller, and output the first toggle signal LS to the latch circuit222and the level shifter circuit232to enable the latch circuit222based on the input signal IS. Then, the level shifter circuit232output the second toggle signal HS to the operational amplifiers233_1-233_N, and the digital-to-analog converters231_1-231_N are enabled at the same time. However, when the receiving circuit221receives the input signal IS having some sensing request instruction from the timing controller, the receiving circuit221outputs the enable signal ES to the sensing circuit210based on the input signal IS, so as to ask the sensing circuit210to start the above sensing operations. In the embodiment, the sample operation of the sample circuit211and the conversion operation of the analog-to-digital converter circuit212may both be very sensitive to noise, so at least one of the low voltage circuit220and the high voltage circuit230is simultaneously disabled during the sample period and the conversion period. Therefore, at least one of the sample circuit211and the analog-to-digital converter circuit212may reduce the noise interference from the at least one of the low voltage circuit220and the high voltage circuit230during an analog-to-digital operating period, where the analog-to-digital operating period includes the sample period and the conversion period.

FIG. 3is a signal timing diagram of a first toggle signal and a second toggle signal according to an embodiment of the disclosure. Referring toFIG. 2andFIG. 3, to be more particularly, when the sensing circuit210is sensing the display panel during the analog-to-digital operating period P0, the receiving circuit221may simultaneously mask the first toggle signal LS and the second toggle signal HS as shown inFIG. 3. It should be noted that, in some embodiments, the receiving circuit221may operate a switch circuit to disable or uncouple the first toggle signal LS and the second toggle signal HS to the low voltage circuit220and the high voltage circuit230, or mask the first toggle signal LS and the second toggle signal HS by other signal control methods. Thus, during an analog-to-digital operating period P0, the latch circuit222, the level shifter circuit232and the operational amplifier circuit233are disabled at the same time, and the digital-to-analog converter circuit231may be simultaneously disabled by the receiving circuit221. However, the signal timing diagram of the present disclosure about masking the trigger signals is not limited to theFIG. 3. In one embodiment, the source driver200may disable the high voltage circuit and the low voltage circuit during at least part of the analog-to-digital operating period P0.

Furthermore, the analog-to-digital operating period P0includes a sampling period P1and a data conversion period P2. During the sampling period P1, the sample circuit211receives the sample signals S_1-S_M from the display panel and transmits the analog sample data corresponding to the sample signals S_1-S_M to the analog-to-digital converter circuit212. During the data conversion period P2, the sample circuit211is stop to receive the sample signals S_1-S_M from the display panel, and the analog-to-digital converter circuit212converts the analog sample data SD and outputs the output signal TS to the timing controller. That is, in some embodiments, the source driver200may disable the low voltage circuit220and the high voltage circuit230only during the sampling period P1or during the data conversion period P2. Moreover, in another some embodiments, the source driver200may only disable the low voltage circuit220or the high voltage circuit230only during the sampling period P1or during the data conversion period P2.

FIG. 4is a flowchart of an operating method according to an embodiment of the disclosure. Referring toFIG. 1andFIG. 4the operating method of this embodiment may at least be adapted to the source driver100in the embodiment ofFIG. 1. The source driver100can execute steps S410to S430. In step S410, the source driver100toggles the low voltage circuit120and the high voltage circuit130and to drive the display panel. In step S420, the source driver100operates the sensing circuit110to sense the display panel during an analog-to-digital operating period. In step S430, the source driver100disables at least one of the low voltage circuit120and the high voltage circuit130during at least part of the analog-to-digital operating period. Therefore, the source driver100executing the operating method can effectively reduce the sensing result of the sensing circuit110suffer the noise interference from the at least one of the low voltage circuit120and the high voltage circuit130during the at least part of the analog-to-digital operating period.

In addition, enough teaching, suggestion, and implementation regarding related device features, implementation methods and technical details of the source driver100of this embodiment may be obtained with reference to the foregoing embodiments ofFIG. 1toFIG. 3, which are not repeated hereinafter.

In summary, the source driver and the operating method of the disclosure can effectively reduce noise interference by disabling at least one of the high voltage circuit and the low voltage circuit during the at least part of the analog-to-digital operating period, so that the source driver and the operating method of the disclosure can provide effective and accurate panel sensing results.