Substrate structure

A substrate structure is provided, including a substrate body having a conductive pad, an insulation layer formed on the substrate body and exposing the conductive pad, a conductive pillar disposed on the conductive pad, and a metal pad disposed on the insulation layer and electrically connected to the conductive pillar. A conductive component can be coupled to the metal pad. During a high-temperature process, the conductive pillar and the metal pad disperse the remaining stress generated due to heat, thereby preventing the conductive component from being cracked.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims under 35 U.S.C. § 119(a) the benefit of Taiwanese Patent Application No. 105104042 filed Feb. 5, 2016, the entire contents of which are incorporated herein by reference.

BACKGROUND

1. Technical Field

The present disclosure relates to semiconductor structures, and, more particularly, to a substrate structure for improving reliability and yield of products.

2. Description of Related Art

Along with the vigorous development of the electronic industry, electronic products are gradually developing toward the trend of multi-function and high performance. A wide range of technologies are currently used in the field of wafer packaging, for example, flip-chip packaging modules such as chip scale packages (CSPs), direct chip attached (DCA) packages and multi-chip modules (MCM), etc., or chip stacking technology for integrating a chip into a 3D integrated circuit, and so on.

FIG. 1is a schematic cross-sectional view of a semiconductor package1of 3D chip stacking technology according to the prior art. A through silicon interposer (TSI)10has a chip mounting side10band an opposite external connection side10a, and a plurality of conductive through-silicon vias (TSVs)100communicating the chip mounting side10band the external connection side10a. A redistribution layer (RDL) structure11is formed on the chip mounting side10b. Electrode pads60of a semiconductor chip6with smaller spacing distance are electrically connected to the RDL structure11through a plurality of solder bumps61. Thereafter, an underfill62is formed between the semiconductor chip6and the RDL structure11for encapsulating the sold bumps61. The conductive TSVs100are electrically connected to bonding pads70of a package substrate7with larger spacing distance through a plurality of conductive components17, such as bumps. After that, an encapsulating colloid8is formed on the package substrate7for encapsulating the semiconductor chip6.

Specifically, as shown inFIG. 1′, an insulation layer12is formed on the external connection side10aof the TSI10and exposing an end surface of the conductive TSV100therefrom, an insulation protective layer15is formed on the insulation layer12and exposing the end surface of the conductive TSV100, and then a UBM layer16is formed on the end surface of the conductive TSV100for combining with the conductive component17.

However, the disadvantage for the conventional semiconductor package1is that during a high-temperature process, such as a reflow process that is performed to weld the conductive components17to the bonding pads70, a remaining stress is generated due to heat and concentrated on an interface between the conductive components17and the conductive TSVs100, as the thermal stress concentrated area K shown inFIG. 1, which causes the interface between the conductive components17and the conductive TSVs100to be cracked, thereby reducing the reliability and yield of the semiconductor chip1.

In addition, the same problem may also occur on the solder bumps61disposed between the semiconductor chip6and the RDL structure11, causing the interface between the solder bumps61and the RDL structure11to be cracked, as the thermal stress concentrated area K shown inFIG. 1.

Therefore, there is an urgent need in solving the foregoing problems.

SUMMARY

In order to solve the problems encountered in the conventional technology, the present disclosure is to provide a substrate structure, which includes a substrate body having at least a conductive pad; at least an insulation layer formed on the substrate body and having at least an open hole correspondingly exposing the conductive pads; at least a conductive pillar disposed in the open hole and electrically connected to the conductive pad; and a metal pad disposed on and electrically connected to each of the at least a conductive pillar.

In an embodiment, the substrate body has a plurality of the conductive pads, and the insulation layer has a plurality of the open holes. In an embodiment, each of the conductive pillars is disposed in each of the open holes.

In an embodiment, the plurality of the conductive pads are coupled to the metal pads through the plurality of the conductive pillars, respectively.

In an embodiment, each of the conductive pads is coupled to the plurality of the conductive pillars thereon.

In an embodiment, the substrate structure further includes a conductive circuit formed on the insulation layer and being in contact with the at least a metal pad and the at least a conductive pillar. In an embodiment, the at least a conductive circuit and the at least a metal pad form a circuit layer.

In an embodiment, the substrate structure further includes an insulation protective layer formed on the insulation layer and the at least a metal pad and having at least an opening for exposing the at least a metal pad. In another embodiment, the substrate structure further comprises a metal layer formed in the at least an opening or at least a conductive component disposed on the metal pad.

In summary, the substrate structure according to the present disclosure utilizes the conductive pillar and the metal pad that are formed between the conductive component and the conductive pad to disperse the remaining stress generated due to heat during a high-temperature process. Therefore, compared to the prior art, the substrate structure according to the present disclosure can prevent the conductive component from being cracked, thereby enhancing the reliability and yield of the substrate structure.

DETAILED DESCRIPTION

The present disclosure is described in the following with specific embodiments, so that one skilled in the pertinent art can easily understand other advantages and effects of the present disclosure from the disclosure of the present disclosure.

It is to be understood that the scope of the present disclosure is not limited to the disclosed embodiments. On the contrary, it is intended to cover various modifications and similar arrangements. The scope of the claims, therefore, should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements. In addition, words such as “on”, and “a” are used to explain the preferred embodiment of the present disclosure only and should not limit the scope of the present disclosure.

FIG. 2is a cross-sectional view of a substrate structure according to a first embodiment of the present disclosure.

As shown inFIG. 2, a substrate structure2comprises a substrate body20, a plurality of insulation layers21,22, a conductive pillar23, a metal pad24, an insulation protective layer25, a metal layer26, and other elements.

The substrate body20further includes a plurality of conductive pads200. In an embodiment, the substrate body20is an insulation board, a metal board, or a semiconductor board made of a material such as wafer, chip, silicon material, glass, and the like. For example, the substrate body20is a TSI or a glass substrate and having TSVs.

The insulation layers21and22are sequentially formed on the substrate body20, and each of the insulation layers21,22is formed with a plurality of open holes210corresponding in position for exposing the conductive pads200therethrough.

In an embodiment, the insulation layers21,22can be made of the same or different materials. In an embodiment, the insulation layers21,22can be made of oxide layers or nitride layers, such as silicon oxide (SiO2) or silicon nitride (SixNy).

In addition, the single conductive pad200is exposed through the single open hole210that penetrates the insulation layer21,22.

The conductive pillar23is disposed in the open hole210and coupled to the conductive pad200.

In an embodiment, the conductive pillar23is a metal pillar, such as a copper pillar, and the single conductive pad200is combined with the single conductive pillar23thereon.

The metal pad24is disposed on the insulation layers21,22and electrically connected to the conductive pillar23.

In an embodiment, the metal pad24is in direct contact with an end surface of the conductive pillar23.

The insulation protective layer25is formed on a portion of the surface of the insulation layer22and the metal pad24, and has an opening250for exposing the metal pad24. In an embodiment, the insulation protective layer25is made of Polybenzoxazole (PBO), Polyimide (PI), or Benzocyciclobutene (BCB).

The metal layer26is formed on the metal pad24disposed in the opening250, and extends to a portion of a surface of the insulation protective layer25to form a conductive component27, such as a solder ball, on the metal layer26, for combining with an electronic device, such as a semiconductor element, a package substrate or a circuit board, etc.

In an embodiment, the metal layer26is an under bump metal (UBM) layer, and the metal layer26is made of, for example, titanium/copper/nickel or titanium/nickel vanadium/copper. A patterning process can be performed by the method of sputtering or plating in combination with exposure and development, to form the metal layer26.

In addition, the structure and material of the metal layer26can be selective from a variety of choices which are not specifically limited.

Further, in an embodiment, a plurality of conductive pads200′ can be coupled to the single metal pad24respectively through conductive pillars23′, as the substrate structure2′ shown inFIG. 2′. Alternatively, the single conductive pad200is combined with the plurality of conductive pillars23′, as the substrate structure2″ shown inFIG. 2″.

The substrate structures2,2′,2″ according to the present disclosure are to form the conductive pillars23,23′ and the metal pads24between the conductive component27and the conductive pads200,200′ to disperse the remaining stress generated due to heat during a high-temperature process (such as during the time that the conductive component27is welded to a semiconductor chip or a package substrate after being reflowed). Therefore, compared to the prior art, the substrate structure2,2′,2″ according to the present disclosure can avoid the conductive component27from being cracked, so as to improve the reliability and yield of the substrate structure2,2′,2″.

FIGS. 3 and 3′ are schematic views of a substrate structure3according to a second embodiment of the present disclosure. The second embodiment differs from the first embodiment in an insulation layer31and a newly added conductive circuit340.

Refer toFIGS. 3 and 3′. In addition to a substrate body20, an insulation layer31, a conductive pillar23, a metal pad24, an insulation protective layer25, a metal layer26, and other components, the substrate structure3further includes a conductive circuit340formed on the insulation layer31and being in contact with the metal pad24and the conductive pillar23.

In an embodiment, the conductive circuit340and the metal pad24form a circuit layer34. For example, the circuit layer24is formed by a process of RDL.

The substrate structure3according to the present embodiment is to form the conductive pillar23, the conductive circuit340, and the metal pad24between the conductive component27and the conductive pad200to disperse the remaining stress generated due to heat during the time that the conductive component27is welded to a semiconductor chip or a package substrate after being reflowed. Therefore, compared to the prior art, the substrate structure3can avoid the conductive component27from being cracked, so as to improve the reliability and yield of the substrate structure3.

FIGS. 4 and 4′ are schematic views of a substrate structure4according to a third embodiment of the present disclosure. The third embodiment differs from the first embodiment as shown inFIG. 2′ in an insulation layer42and a newly added conductive circuit440.

Refer toFIGS. 4 and 4′. In addition to a substrate body20, an insulation layer42, a plurality of conductive pillars23′, a metal pad24, an insulation protective layer25, a metal layer26, and other components, the substrate structure4further includes a conductive circuit440formed on the insulation layer42and being in contact with the metal pad24and the conductive pillars23′.

In an embodiment, the conductive circuit440and the metal pad24form a circuit layer44. For example, the circuit layer44is formed by a process of the RDL.

The substrate structure4according to the present embodiment is to form the plurality of conductive pillars23′, the conductive circuit340, and the metal pad24between the conductive component27and the conductive pad200′ to disperse the remaining stress generated due to heat during the time that the conductive component27is welded to a semiconductor chip or a package substrate after being reflowed. Therefore, compared to the prior art, the substrate structure4can avoid the conductive component27from being cracked, so as to improve the reliability and yield the substrate structure4.

On the other hand, in other embodiments the substrate structure5as shown inFIG. 5may have the insulation protective layer25and the metal layer26omitted, such that the conductive component27can be in direct contact with the metal pad24.

In summary, the substrate structure according to the present disclosure utilizes the design of a metal pad and a conductive pillar to reduce the occurrence of cracking due to thermal stress, thereby enhancing the reliability and yield of the substrate structure.

The present disclosure has been described using exemplary preferred embodiments. However, it is to be understood that the scope of the present disclosure is not limited to the disclosed embodiments. On the contrary, it is intended to cover various modifications and similar arrangements. The scope of the claims, therefore, should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.