Control circuit arrangement for generating a control signal for a voltage converter

Control circuit for controlling a switched converter generating an output voltage which is independent of variations of the input voltage. For this purpose, a forward control is used with a sawtooth voltage of which both the variation during the pulse duration of the pulses applied to the switch of the converter and the slope are linear functions of the input voltage and of an adjusting voltage. The output voltage is proportional to the adjusting voltage. This can be derived from the output voltage by means of a feedback coupling.

The invention relates to a control circuit arrangement for generating a 
periodic pulsatory control signal for controlling a switch in a converter 
for converting an input direct voltage into an output direct voltage which 
is substantially independent of variations of the input voltage. The 
control circuit comprises a current source and a controllable switch for 
generating a sawtooth voltage across a capacitor as well as a threshold 
level detector for converting the sawtooth voltage into said pulsatory 
control signal, the pulse duration being controllable under the influence 
of an adjusting voltage. 
In such a circuit arrangement the use of negative feedback is rather 
universal. This means that a voltage derived from the output voltage is 
compared with a reference voltage and that, depedent upon the error signal 
formed in this manner, the pulse duration of the control signal is varied. 
As a result of this the output voltage is made independent of variations 
of the input voltage, which variations may be caused by variations of the 
voltage of the electric supply source from which the input voltage is 
derived by means of rectification. 
With a sufficiently high amplification factor of the negative feedback loop 
the influence of slow variations of the input voltage on the output 
voltage can in this manner be removed substantially. However, the 
influence of rapid variations is more difficult to remove. Not only is the 
output voltage generated across a smoothing capacitor, but the loop itself 
introduces a delay since a given bandwidth is associated with a given 
stabilization factor. Such a rapid variation of the input voltage is 
caused by the ripple superimposed thereon and remaining after 
rectification and filtering. Usually the control signal is not capable of 
removing a leading edge of the ripple voltage. In television receivers, 
for example, the requirement applies that the deflection voltage should 
remain constant within 0.1 percent so as not to cause disturbing 
variations of the image width. When the ripple voltage is 10% of the input 
voltage, a stabilization factor of 100 is necessary, which corresponds to 
an inertia which is too great. 
It will be obvious that a solution can be provided by a better filtering of 
the ripple voltage, that is by means of electrolytic capacitors of greater 
capacitance, choke coils and the like. This unfortunately results in more 
expensive and bulky circuit arrangements. Still another drawback remains, 
namely the fact that the loop amplification is larger for a higher value 
of the input voltage. In order to avoid instability the amplification 
should be made smaller, as a result of which it cannot be optimum for the 
nominal value of the input voltage. 
French Patent Application No. 2,225,879 discloses a control circuit for a 
converter in which the feedback coupling is combined with a forward 
control. Thus information on the variations of the input voltage is also 
supplied to the control circuit. By means of this information the 
conduction time of the switch of the converter also is influenced. Due to 
the choice of said information, in some cases, the patent application that 
states a complete compensation can be achieved, whereas in some other 
cases the compensation is only partial. 
It is an object of the invention to provide a universal control circuit 
arrangement by means of which the influence of all variations of the input 
voltage can substantially entirely be removed accurately and without 
inertia, the ripple voltage also having substantially no influence, 
without more effective smoothing taking place and which can be used in 
converters of any type. For that purpose, the control circuit arrangement 
according to the invention is characterized by a first circuit having a 
first and a second input terminal and means for adjusting the value of the 
current generated by the current source as a linear function of both the 
input direct voltage and an adjusting voltage, and by a second circuit 
likewise having a first and a second input terminal and means for 
adjusting the variation of the sawtooth voltage during the occurrence of 
the control signal as a linear function of both the input direct voltage 
and the adjusting voltage, the two first input terminals being connectable 
to the input direct voltage and the two second input terminals being 
connectable to the adjusting voltage. 
Due to the measure according to the invention the output voltage depends 
only on the adjusting voltage and can therefore be adjusted at will and 
with the desired accuracy. The circuit arrangement according to the 
invention may also be characterized by a feedback circuit for generating 
the adjusting voltage, which feedback circuit comprises a comparison stage 
for comparing the output voltage with a reference voltage. As a result of 
this a circuit arrangement is obtained which shows both the advantages of 
the forward control mentioned above and the known advantages of a backward 
control.

FIG. 1 shows a switched-mode voltage supply circuit of the series type. The 
AC supply voltage present between two input terminals 1 and 2 is rectified 
by a rectifier 3 and the resulting voltage is smoothed by means of a 
capacitor 4. A direct voltage V.sub.B is available across capacitor 4 
which follows the variations of the supply voltage and on which a ripple 
voltage of supply frequency, or double thereof if rectifier 3 is of the 
Graetz type, is superimposed. The end of the capacitor 4 connected to the 
terminal 2 is connected to ground. The converter further comprises an 
npn-switching transistor Tr, an inductance L having a tap connected to the 
cathode of a diode D, and a smoothing capacitor 5. The collector of 
transistor Tr is connected to the junction point of elements 3 and 4 and 
the emitter is connected to one end of inductance L. The anode of diode D 
and the free end of capacitor 5 are connected to ground. The other end of 
inductance L forms an output terminal 6 at which a direct voltage V.sub.o 
is present. A load 7 is connected between terminal 6 and ground. 
Periodic control pulses are supplied to the base of transistor Tr so that 
it is alternately conductive and cut off. If .delta.T is the part of the 
cycle T in which the transistor Tr is conductive and if 1 : n is the ratio 
of the total number of turns of inductance L to the number of turns 
thereof between the tap and the terminal 6, the following relationship 
between voltages V.sub.B and V.sub.o can be derived: 
##EQU1## 
This relationship assumes that inductance L is discharged incompletely at 
the end of the cut-off time of transistor Tr. 
In known circuit arrangements the ratio .delta. is varied by means of 
negative feedback to provide a pulse duration modulation in a manner such 
that the variation of the output voltage V.sub.o is independent of 
variations of input voltage V.sub.B. In a special case, V.sub.o can be 
kept constant. For this purpose voltage V.sub.o should be compared with a 
reference voltage. 
In FIG. 1 the control circuit arrangement of transistor Tr comprises an 
oscillator 8 which generates pulses of a frequency of, for example, 10 to 
20 kHz. These pulses are applied to a controllable switch S which is 
connected in series with a voltage source V.sub.1. A capacitor C and a 
current source I are connected parallel to said series arrangement, the 
free connections of elements 8, V.sub.1, C and I being connected to 
ground. Capacitor C is connected to an input terminal of a threshold level 
detector Dr to another input terminal of which a voltage source V.sub.2 is 
connected, voltage V.sub.2 being lower than voltage V.sub.1. The output 
terminal of the level detector Dr controls the base of transistor Tr, 
possibly via a driver stage, not shown. 
FIG. 2 shows the variation as a function of time of the voltage V.sub.C 
across capactior C. By a shortlasting conduction of the switch S, voltage 
V.sub.C assumes the value V.sub.1 so that transistor Tr is cut off. The 
switch S is cut off and capacitor C is discharged by current source I. 
Voltage V.sub.C therefore decreases linearly, the slope of the resulting 
sawtooth being determined by the current I. At the instant at which 
V.sub.C falls below the value V.sub.2, the transistor Tr becomes 
conductive. It remains conductive until the switch S, after a time 
interval .delta.T, receives a pulse from oscillator 8 and is again made 
conductive for a short period of time which introduces the beginning of a 
new cycle. 
The following values are chosen: 
EQU V.sub.1 = kV.sub.B 
EQU v.sub.2 = nV.sub.r 
and 
EQU I = C/T [V.sub.1 + (1 - n) V.sub.r ], 
wherein k is a number to be chosen and V.sub.r is an adjusting voltage 
still to be chosen. Current I causes in one cycle a reduction of the 
voltage across the capacitor equal to 
EQU IT/C = V.sub.1 + (1 - n) V.sub.r 
Voltage V.sub.C reaches the value V.sub.2 after a time (1 - .delta.)T 
which, as shown in FIG. 2, satisfies the following relationship: 
##EQU2## 
When herein the above chosen values are filled in, it may be derived that 
##EQU3## 
Herewith it is proved that formula (1) is satisfied, provided the value 
EQU V.sub.r = k/n V.sub.o 
is chosen for the adjusting voltage as a function of the desired output 
voltage V.sub.o. In other words, the output voltage is determined by the 
adjusting voltage since it is proportional thereto and is independent of 
the variations of the input voltage and without negative feedback being 
used. The adjusting voltage can be accurately adjusted so that the output 
voltage is fixed with the same accuracy, while it can supply considerably 
more power. 
In a practical circuit arrangement for a television receiver in which the 
oscillator 8 is the line oscillator of the receiver, it applies that: 
T = 64 .mu.s. If n = 0.8 and a value of 0.01 is chosen for k, then the 
value of Vr is equal to 3V for a constant value of V.sub.o /n = 300 V. For 
C a capacitor of 4.7 nF is chosen. Current I is the sum of two currents, 
namely kC/T V.sub.B and C/T (1 - n) V.sub.r. If the first current is 
derived from the voltage V.sub.B via a resistor R.sub.B, then it applies 
that R.sub.B = T/kC = 1.36 M .OMEGA.. 
Similarly, the second current can be derived via a resistor R.sub.r from 
voltage V.sub.r so that it applies that 
##EQU4## 
while the voltages V.sub.1 and V.sub.2, respectively, can be derived from 
the voltages V.sub.B and V.sub.r, respectively, by means of a resistive 
potentiometer. 
In FIG. 2, capacitor C is discharged entirely so that voltage V.sub.C 
becomes zero before the end of the cycle. Of course, this is not 
necessary. The broken lines in the Figure show the variation of voltage 
V.sub.C in the case in which said voltage decreases linearly during the 
whole cycle. It may be noted that the level at which transistor Tr becomes 
conductive is higher than the resulting minimum value of voltage V.sub.C 
by an amount equal to V.sub.2 increased by the voltage drop caused by the 
above-mentioned second current, that is V.sub.2 + (1 - n) V.sub.r = 
V.sub.r, that is the adjusting voltage, while the variation of voltage 
V.sub.C during the cut off period (1 - .delta.)T of transistor Tr is equal 
to 
EQU .DELTA.V = V.sub.1 - V.sub.2 = kV.sub.B = nV.sub.r. From this it appears 
that both I and .DELTA.V are linear functions of V.sub.B and V.sub.r. In 
the special case in which n = 1, i.e. where diode D is not connected to a 
tap on the inductance L but to the junction point thereof with the emitter 
of the transistor Tr, the current I does not depend on V.sub.r. When the 
variation .DELTA.V varies, for example because the voltage V.sub.B varies, 
then the value of voltage V.sub.c in FIG. 2 does not vary at the final 
instant of the period T. Actually, this final value depends only on 
voltages V.sub.2 and V.sub.r. 
It has been assumed above that the conduction time of the switch S is 
infinitely short and coincides with the instant at which the cycle is 
completed. In practice, however, the transistor Tr has a finite 
switching-off time in the order of 7 to 10 .mu.s, so that switch S must be 
conductive at least during said time t.sub.s. It is also possible to keep 
the switch S conductive still longer. FIG. 3 shows the variation of the 
resulting voltage V.sub.C in which switch S is made conductive a time 
t.sub.s .mu.s before the end of the cycle and is cut off again at an 
instant of time .beta.T .mu.s before the end of the next cycle. It appears 
from FIG. 3 that the total amplitude kV.sub.B + (1 - n) V.sub.r of the 
sawtooth voltage should be multiplied by a factor .beta. and that the 
sawtooth waveform is truncated. 
The above results in the embodiment of the control circuit arrangement 
according to the invention shown in FIG. 4. Line oscillator 8 applies 
blocking pulses having a duration t.sub.s + (1 - .beta.)T to the base of a 
transistor 9 the collector of which controls the base of the switch S 
constructed as an emitter follower transistor, said switch being 
conductive during the occurrence of the pulses from oscillator 8. By means 
of a resistor 10 incorporated between the base of transistor S and a 
terminal K.sub.B, a resistor 11 incorporated between the same base and a 
terminal K.sub.r and the series arrangement of a resistor 12 and a diode 
13 between the base and ground, terminal K.sub.B being connected to the 
voltage V.sub.B carrying line and terminal K.sub.r being connected to the 
voltage V.sub.r carrying line, it is ensured that the emitter of 
transistor S during its conduction time has the voltage .beta.[kV.sub.B + 
(1 - n)V.sub.r ]. For example, when k = 0.01, .beta. = 0.75 and n = 0.5 it 
is derived that the values of resistors 10, 11 and 12 may be approximately 
390 k.OMEGA., 7.8 k.OMEGA. and 4.7 k.OMEGA.. The voltage drop across diode 
13 compensates for the voltage difference between the base and the emitter 
of transistor S. 
Capacitor C is connected between the emitter of transistor S and the base 
of a transistor 14, to the base of which resistor R.sub.r and the series 
arrangement of a fixed resistor R.sub.B1 and an adjustable resistor 
R.sub.B2 are connected. Resistors R.sub.r and R.sub.B2, respectively, are 
connected at one end to terminals K'.sub.r and K'.sub.B, respectively, 
terminal K'.sub.B being connected to the voltage V.sub.B carrying line and 
terminal K'.sub.r being connected to the voltage V.sub.r carrying line. 
The resistor R.sub.B2 is adjusted so that the sum of the values R.sub.B1 
and R.sub.B2 is equal to the above found value of resistor R.sub.B. The 
emitter of transistor 14 is connected to ground while that of transistor S 
and the collector of transistor 14 are connected together via a resistor 
15 of, for example, 1.5 k .OMEGA.. During the charging of capacitor C the 
resistor 15 limits the collector current of transistor 14. 
During the time interval .beta.T transistor 9 is conductive so that 
transistor 15 is cut off. Capacitor C discharges across resistor 15 in 
which the discharge current I is also the collector current of transistor 
14 and is therefore much greater than the base current which keeps the 
transistor conductive. Elements S, 14, 15 and C form a Miller oscillator 
so that the voltage V.sub.C present at the emitter of transistor S has a 
good linearity. Because capacitor C is incorporated in the base line of a 
transistor, resistors R.sub.r and R.sub.B1 + R.sub.B2 may indeed be 
considered as current sources. Threshold level detector Dr consists of a 
pnp transistor the emitter of which has a voltage V.sub.r and the base of 
which is connected to the voltage V.sub.C. During the interval .delta.T 
transistor Dr is conductive, in which interval a positively directed pulse 
is formed at its collector. This pulse is reversed by a transistor 16 so 
that a driver transistor 17 is cut off. The transistor Tr is controlled by 
a transformer and is made conductive in the interval .delta.T in which 
transistor 17 is cut off. Voltage V.sub.r is generated at a point A by 
means of a Zener diode 18 in series with a compensating diode. 
Thus the circuit arrangement shown in FIG. 4 comprises a first circuit 
having terminals K.sub.B and K.sub.r and a second circuit having terminals 
K'.sub.B and K'.sub.r. When the former terminals are connected to voltages 
V.sub.B and V.sub.r, respectively, and when the correct values are chosen 
for resistors 10, 11 and 12, the amplitude variation of voltage V.sub.c 
assumes the desired value. When terminals K'.sub.B and K'.sub.r are 
connected to voltages V.sub.B and V.sub.r, respectively, and when the 
correct values are chosen for resistors R.sub.B1 + R.sub.B2, the current I 
assumes the desired value. Both the said amplitude variation and the 
current are linear functions of voltages V.sub.B and V.sub.r. For the 
above-mentioned case in which n = 1, terminals K.sub.r and K'.sub.r are 
not connected. 
The above description relates to a forward control in which the circuit 
arrangement does not receive information as regards the output voltage 
V.sub.o. However, it may be desirable to also use a backward control. For 
this purpose the adjusting voltage V.sub.r may be determined by a feedback 
coupling: it is hence not fixedly adjusted. The advantage of this measure 
is that the influence of tolerances and of the temperature are removed by 
the feedback regulation. This also applies to the influence of possible 
variations of load 7 on the voltage V.sub.o so that this might vary all 
the same. Because the value of voltage V.sub.o is proportional to that of 
V.sub.r, the amplification of the negative feedback loop is constant. 
Therefore, this loop can be designed optimally without the danger of 
instability at higher input voltages. FIG. 5 shows how the voltage V.sub.r 
can be obtained. A voltage derived from V.sub.o by means of a resistive 
potentiometer 19, 20 is applied to an input terminal of a differential 
amplifier 21. A reference voltage present across a Zener diode 22 is 
applied to the other input terminal of the amplifier 21. The difference 
between the two input voltages of the amplifier is amplified to the 
desired value of adjusting voltage V.sub.r, which voltage is available at 
the output terminal of the amplifier. A current originating from a voltage 
source of, for example, 12 V flows through Zener diode 22. This source, 
which can also supply the collector current of transistor S in FIG. 4, may 
be derived either from voltage V.sub.B or from voltage V.sub.o. So the 
circuit arrangement of FIG. 5 may replace the Zener diode 18 of FIG. 4. 
It should be noted that in the known circuit arrangements in which only 
negative feedback coupling is used, the ratio .delta. is controlled in 
accordance with the output voltage V.sub.o. With the measure described 
above .delta. varies in accordance with input voltage V.sub.B and is 
readjusted under the influence of variations of voltage V.sub.o. 
A requirement of a switched-mode voltage supply circuit arrangement is that 
the output voltage thereof should rise slowly after switching on. 
Otherwise, the peak current through the transistor Tr might become too 
large since capacitor 5 is not yet charged. This can be achieved by 
causing voltage V.sub.B to rise slowly but it will be obvious that it is 
more practical to cause the ratio .delta. to grow slowly from zero. The 
result of this is, however, that the ripple voltage at the input is 
transferred to the output, which again may cause too large a peak current 
through the transistor. As a result of this a safety circuit may respond 
so that the supply circuit arrangement cannot start. A solution for this 
is to cause adjusting voltage V.sub.r to grow slowly too during the 
starting period. 
An embodiment of this idea is also shown in FIG. 5. A capacitor 23 is 
charged by a current originating from source V.sub.B which flows through a 
resistor 24, the time constant being large. The junction point of elements 
23 and 24 is connected via two diodes 25 and 26 to the output terminal of 
the difference amplifier 21, the diodes being polarized so that as between 
the voltage at the amplifier output terminal and the voltage across 
capacitor 23, they pass the lower voltage. After switching on, the 
last-mentioned voltage slowly increases. The ratio .delta. and 
consequently the voltage V.sub.o also increase slowly. As a result of the 
operation of amplifier 21, voltage V.sub.r has a high value. The result of 
this is that the diode 25 is conductive. The junction point of diodes 25 
and 26 is connected to the point A in FIG. 4, in which the Zener diode 18 
is omitted, so that the voltage at point A, which serves as an adjusting 
voltage, starts slowly indeed. At the instant at which the voltage at the 
junction point of resistors 19 and 20 reaches the value of the reference 
voltage across Zener diode 22, voltage V.sub.r decreases. At a given 
instant, diode 26 therefore becomes conductive while diode 25 is cut off. 
In the final condition voltages V.sub.o and V.sub.r are proportional to 
each other. 
The above description relates to circuit arrangements in which transistor 
Tr is conductive at the end of the cycle in FIG. 1, that is to say in the 
last part of the discharge period of capacitor C. The circuit arrangement 
shown in FIG. 1 and hence also embodiments derived therefrom can, however, 
be proportioned so that transistor Tr is conductive at the beginning of 
the discharge period of capacitor C. In FIG. 2 the time intervals .delta.T 
and (1 - .delta.)T and in FIG. 1 the input terminals of the threshold 
detector Dr should then be interchanged. If in that case the following is 
chosen: 
EQU .DELTA.V = n(V.sub.B = V.sub.r) 
and 
EQU I = C/T [nV.sub.B + (1 - n) V.sub.r ] 
wherein .DELTA.V is the variation of voltage V.sub.C during the cut off 
time of transistor Tr, then the variation V.sub.C during the conduction 
time thereof is equal to V.sub.r and it applies that: 
##EQU5## 
which is not too different from formula (1). In this case too, both I and 
.DELTA.V are linear functions of V.sub.B and V.sub.r, while the voltages 
V.sub.o and V.sub.r are proportional to each other. 
In FIG. 6, capacitor C is not discharged by the current I as is the case in 
FIG. 1, but is charged. A voltage source in series with the switch S is 
therefore not necessary. In this Figure are shown only those elements 
which are of importance now. The variation of the voltage V.sub.C across 
capacitor C as a function of time is plotted in FIG. 7. It has an 
ascending sawtooth shape whereas the sawtooth shape in FIG. 2 is 
descending. When variation .DELTA.V varies, for example because voltage 
V.sub.B varies, then the value of voltage V.sub.c in FIG. 7 does not vary 
at the initial instant of period T. When transistor Tr is conductive in 
the first part of the cycle and if the same values are chosen as in the 
corresponding case of the descending sawtooth, then it can be seen that 
formula (1) is satisfied. Both I and the variation .DELTA.V of the 
sawtooth voltage during the cut off time of transistor Tr are linear 
functions of V.sub.B and V.sub.r. It can be proved in the same manner as 
above for the descending sawtooth that this is the case also if transistor 
Tr is conductive in the second part of the cycle of the ascending 
sawtooth. 
All of the embodiments described relate to switched converters of the 
series types (forward converters) for which formula (1) applies. FIG. 8 
shows a circuit arrangement having a parallel converter (flyback 
converter) which is a circuit arrangement in which inductance L and diode 
D have changed places as compared with those of FIG. 1, while voltage 
V.sub.B must be negative and transistor Tr is of the npn-type, and which 
circuit is controlled in the same manner as in FIG. 1. It can be proved 
that for series converters and parallel converters the following 
relationship applies: 
##EQU6## 
Formula (2) changes into formula (1) if m = n: this is the series 
converter while the parallel converter satisfies formula (2) with m = 0. 
In view of the resemblance of formula (2) to formula (1) it will be 
obvious that the circuit arrangement according to the invention may be 
used indeed for the control of a parallel converter, in which current I 
and voltage variation .DELTA.V can be proportioned in a similar manner as 
above. 
A circuit arrangement which also satisfies formula (2) and for which 
therefore the circuit arrangement according to the invention may be used 
is the combined line deflection and supply voltage circuit for a 
television receiver described in U.S. Pat. No. 3,950,674 and which is 
shown in FIG. 9 of the present patent application. It will be sufficient 
here to state that Ly is the line deflection coil, C.sub.t is the trace 
capacitor and C.sub.r is the retrace capacitor, while D.sub.1 is the 
parallel diode, and that inductance L is constructed as a transformer 
T.sub.1, while diode D is connected to a tap on a winding 27 of a 
transformer T.sub.2. Transformer T.sub.1 has a transformation ratio of 1 : 
n and the ratio of the number of turns of winding 27 to that of the above 
shown part thereof is equal to 1 : m, wherein n and m are the parameters 
which occur in formula (2). Supply voltages for parts of the receiver and 
also the high tension for the final anode of a picture display tube (not 
shown) are formed across secondary windings of the transformer T.sub.2. 
Transformers T.sub.1 and T.sub.2 may in known manner have one and the same 
core. 
The voltage across the capacitor 5 in series with the winding 27 may serve 
as the output voltage V.sub.o. By means of the circuit arrangement shown 
in FIG. 5 an adjusting voltage V.sub.r is obtained in which amplifier 21 
is constructed by means of an npn-transistor. Between diode 25 and the 
junction point of resistor 24 and capacitor 23, a low value resistor 28 is 
incorporated and a safety thyristor 29 is connected between ground and the 
junction point of diode 25 and resistor 28. Thyristor 29 is made 
conductive by a safety circuit 29' for example, when the current consumed 
by the circuit arrangement is too large so that capacitor 23 is 
discharged. The junction point of diodes 25 and 26 is connected to point A 
via an emitter follower. The voltage across a Zener diode 30 incorporated 
in the emitter lead of the transistor 17 serves as a stabilized supply 
voltage for the starting circuit, for switch S as well as for oscillator 
8, which voltage is present immediately after switching on. 
The following values have been chosen in practice: 
n = 0.49 
m = 0.29 
.beta. = 0.8 
k = 0.01 
C = 4.7 nF 
value of resistor 10 = 390 k .OMEGA.. Oscillator 8 is an integrated circuit 
Philips type TBA 920. It has been found that the voltage V.sub.o has a 
substantially constant value of 140 V and is substantially free from 
ripple at the supply frequency with a variation of voltage V.sub.B between 
200 and 370 V on which a ripple voltage of approximately 30 V peak-to-peak 
is superimposed. Capacitor 4 may have a comparatively small capacitance of 
100 .mu.F or even lower. 
FIG. 10 shows a switched converter for which formula (2) does not apply. In 
this circuit arrangement (termed in English an "up converter") inductance 
L is connected between the lead supplying voltage V.sub.B and switch Tr, 
while diode D is incorporated between a tap on inductance L and output 
terminal 6. If 1 : n is the ratio of the number of turns of inductance L 
to the number of turns shown above the tap, the following relationship may 
be derived: 
##EQU7## 
It can be seen that the circuit arrangement according to the invention may 
be used in this case too in which the sawtooth voltage is either ascending 
or descending. FIG. 10 shows detector Dr. In this case too both current I 
and voltage variation .DELTA.V are linear functions of input voltage 
V.sub.B and of an adjusting voltage V.sub.r which is proportional to the 
desired output voltage V.sub.o, however, with the understanding that 
.DELTA.V is the variation of voltage V.sub.C in the time interval .delta.T 
in which transistor Tr is conductive. In the special case in which n = 1, 
i.e. in which diode D is not connected to a tap on inductance L but to the 
junction point thereof with the collector of transistor Tr, it appears 
that current I is not dependent upon voltage V.sub.B, so that terminal 
K'.sub.B is not to be connected to voltage V.sub.B. 
For most applications the supply voltage circuit arrangement will be used 
for generating a constant output voltage. One application is that in which 
voltage V.sub.o varies in accordance with the variations of the adjusting 
voltage. Such a case presents itself in a color television receiver if the 
adjusting voltage Vr varies according to a parabola-like function with the 
field frequency, while voltage V.sub.o is the supply voltage of the line 
deflection circuit. As a result of this the line deflection current 
experiences a modulation at the field frequency which is required for the 
so-called east-west correction.