Systems, methods, and apparatus for associating computational device functions with compute engines

A method may include creating an association identifier based on an association between a computational device function and a compute engine of a computational device, and invoking an execute command to perform an execution of the computational device function using the compute engine, wherein the execute command uses the association identifier. The compute engine may be a first compute engine, and the association may be further between the computational device function and a second compute engine of the computational device. The execute command may perform an execution of the computational device function using the second compute engine. The execution of the computational device function using the first compute engine and the execution of the computational device function using the second compute engine may overlap. The execute command may include the association identifier. The creating the association identifier may include invoking a create association command.

TECHNICAL HELD

This disclosure relates generally to computational devices, and more specifically to systems, methods, and apparatus for associating computational device functions with compute engines.

BACKGROUND

A computational device such as an accelerator or a computational storage device may implement one or more functions that may perform operations on data. A host may offload a processing task to the computational device by invoking a function that may be implemented by the device. The computational device may perform the function, for example, using one or more compute resources.

The above information disclosed in this Background section is only for enhancement of understanding of the background of the inventive principles and therefore it may contain information that does not constitute prior art.

SUMMARY

A method may include creating an association identifier based on an association between a computational device function and a compute engine of a computational device, and invoking an execute command to perform an execution of the computational device function using the compute engine, wherein the execute command uses the association identifier. The compute engine may be a first compute engine, and the association may be further between the computational device function and a second compute engine of the computational device. The execute command may perform an execution of the computational device function using the second compute engine. The execution of the computational device function using the first compute engine and the execution of the computational device function using the second compute engine may overlap. The execute command may include the association identifier. The creating the association identifier may include invoking a create association command. The method may further include returning, based on the create association command, the association identifier. The create association command may include first information to identify the computational device function and second information to identify one or more compute engines. The first information may include an identifier for the computational device function. The identifier for the computational device function may identify a function slot at the computational device. The second information may include one or more identifiers for one or more compute engines of the computational device. The second information may include a pointer to one or more identifiers for one or more compute engines of the computational device. The method may further include modifying the association. The modifying the association may include invoking a modify association command. The modify association command may use the association identifier. The method may further include providing information about one or more compute engines of the computational device. The providing may include returning, based on a request command, the information about one or more compute engines of the computational device. The information about one or more compute engines may include one or more of a number of engines, one or more identifiers for one or more compute engines, or one or more capabilities of one or more compute engines.

A method may include performing a first execution of a computational device function using a first compute engine of a computational device, and performing a second execution of the computational device function using a second compute engine of the computational device, wherein the first execution and the second execution overlap. The first execution may include a first thread of the computational device function, and the second execution may include a second thread of the computational device function. The method may further include creating an association identifier based on an association between the computational device function, the first compute engine, and the second compute engine. The first execution and the second execution may be based on an execute command, and the execute command may be based on the association identifier. The creating the association identifier may include invoking a create association command. The create association command may include first information to identify the computational device function and second information to identify the first compute engine and the second compute engine.

A device may include a compute engine configured to execute a computational device function, and at least one processor configured to create an association identifier based on an association between the computational device function and the compute engine, and invoke an execute command, using the association identifier, to perform an execution of the computational device function using the compute engine. The compute engine may be a first compute engine, the device further may include a second compute engine, and the association may be further between the computational device function and the second compute engine. The execute command may perform an execution of the computational device function using the second compute engine. The execution of the computational device function using the first compute engine and the execution of the computational device function using the second compute engine may overlap. The at least one processor may be configured to receive a create association command, and create, based on the create association command, the association identifier. The at least one processor may be configured to return the association identifier based on the create association command. The at least one processor may be configured to receive a modify association command, and modify, based on the modify association command, the association identifier. The at least one processor may be configured to provide information about one or more compute engines of the computational device. The at least one processor may be configured to provide the information about the one or more compute engines based on a request command. The information about the one or more compute engines may include one or more of a number of compute engines, one or more identifiers for the one or more compute engines, or one or more capabilities of the one or more compute engines.

DETAILED DESCRIPTION

Computational devices such as accelerators, computational storage devices, and/or the like, may include one or more compute engines that may be configured to execute one or more computational device functions that may be used, for example, to offload processing tasks from a host. A computational device may implement a pairing scheme to pair a computational device function with a compute engine at the device. However, the scheme may not enable a computational device function to be paired with more than one compute engine. Depending on the implementation details, this may prevent the pairing scheme from scaling to use a computational device function with more than one compute engine, for example, to execute a multi-threaded function. Moreover, depending on the implementation details, the pairing scheme may be difficult to implement.

An association scheme for computational device functions and compute engines in accordance with example embodiments of the disclosure may enable a computational device function to be associated with one or more compute engines. For example, in some embodiments, an association scheme may implement an association identifier that may be used to identify an association between a computational device function (which may also be referred to as a function) and one or more compute engines that may execute the function. The association identifier may be used, for example, by an execute command to identify a function to execute and one or more compute engines to use to execute the function. Depending on the implementation details, more than one compute engine may execute the function simultaneously, for example, if the function is a multi-threaded function.

In some embodiments, an association scheme may implement one or more commands to manage and/or use association identifiers. For example, a create association command may create an association of a function with one or more compute engines based on one or more inputs such as a function identifier and one or more compute engine identifiers. The create association command may return an association identifier that identifies an association between one or more functions and one or more compute engines, a status of the command, and/or the like.

As another example, a modify association command may modify (e.g., delete) an association previously created by a create association command. For example, a delete association command may delete an association based on an input such as an association identifier. The modify association command may return one or more status values, for example, indicating success or failure.

As a further example, an association scheme may implement a discovery feature that may enable a computational device to advertise one or more compute engines, capabilities, and/or the like. For example, in response to a request command (e.g., a get log command), a computational device may return information such as a number of compute engines and/or engine types available at the device, a list of identifiers, capabilities, and/or the like of the compute engines, and/or the like.

Depending on the implementation details, an association scheme for computational device functions and compute engines in accordance with example embodiments of the disclosure may provide one or more benefits, for example, the ability to scale an association scheme for use with multi-threaded computational functions, the ability to integrate into an existing computational device architecture, command structure, and/or the like, the simplification of namespace management, and/or the like.

For purposes of illustration, some embodiments may be described in the context of computational storage devices and/or devices that may implement a Nonvolatile Memory Express (NVMe) protocol. However, the principles are not limited to use with storage devices or an NVMe protocol, and may be applied to any computational devices that may implement one or more computational device functions with one or more compute engines and any communication protocol.

FIG.1illustrates an embodiment of a scheme for implementing one or more computational device functions with one or more compute engines at a computational device in accordance with example embodiments of the disclosure. The embodiment illustrated inFIG.1may include a host102, and a computational device104connected by a communication fabric103, in some embodiments, the host102may offload one or more tasks to one or more computational device functions implemented by the computational device104.

The computational device104may include a device controller105, a function memory area108, a data memory109, one or more compute resources114, and/or a device functionality circuit112, The device controller105may control the overall operation of the computational device104. For example, in some embodiments, the device controller105may parse, process, invoke, and/or the like, commands received from the host102. The device functionality circuit112may include any hardware to implement the primary function of the computational device104. For example, if the computational device104is implemented as a storage device, the device functionality circuit112may include a storage medium such as one or more flash memory devices, a flash translation layer (FTL), and/or the like. In some embodiments, a computational storage device may be implemented as a computational storage drive (CSD), a computational storage processor (CSP), and/or a computational storage array (CSA).

As another example, if the computational device104is implemented as a network interface card (NIC), the device functionality circuit112may include one or more modems, network interfaces, physical layers (PHYs), medium access control layers (MACS), and/or the like. As a further example, if the computational device104is implemented as an accelerator, the device functionality circuit112may include one or more compute resources such as field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), embedded processors, and/or the like.

The host102may be implemented with any component or combination of components that may utilize the computational resources114of the computational device104. For example, the host102may include to one or more of a client device, a server, a storage node, a central processing unit (CPU), a personal computer, a tablet computer, a smartphone, and/or the like. Moreover, the embodiment illustrated inFIG.1may include any number of hosts.

The communication fabric103may be implemented with one or more interconnects, one or more networks, a network of networks (e.g., the internet), and/or the like, or a combination thereof, using any type of interface and/or protocol. For example, the fabric103may be implemented with Peripheral Component Interconnect Express (PCIe), Nonvolatile Memory Express (NVMe), NVMe-over-fabric (NVMe-oF), Ethernet, Transmission Control Protocol/Internet Protocol (TCP/IP), Direct Memory Access (DMA) Remote DMA (RDMA), RDMA over Converged Ethernet (ROCE), FibreChannel, InfiniBand, Serial ATA (DATA), Small Computer Systems Interface (SCSI), Serial Attached SCSI (SAS), iWARP, and/or the like, or any combination thereof. For example, in an embodiment in which the computational device104is implemented as a storage device, the controller105may implement a storage protocol such as NVMe that may enable the host102and the computational device104to exchange commands, data, and/or the like, over the communication fabric103. In some embodiments, the communication fabric103may include one or more switches, hubs, nodes, routers, and/or the like.

The memory area108may include one or more function slots110(in this example, four function slots110a-110d) for storing one or more executable computational device functions106(in this example, functions106a-106d), The one or more computational device functions106(e.g., software implemented functions) may be executed, for example, using one or more compute engines116(in this example, compute engines116a-116d) in the computational resources114. In some embodiments, the data memory109may be used by one or more of the computational device functions106when being executed with one or more of the compute engines116. For example, the data memory109may be used to hold input data, output data, transitional data, and/or the like, for one or more of the computational device functions106.

In some embodiments, one or more of the compute engines116may include one or more processing resources such as embedded processors (e.g., CPUs such as complex instruction set computer (CISC) processors such as x86 processors and/or reduced instruction set computer (RISC) processors such as ARM processors), ASICs, FPGAs, graphics processing units (GPUs), neural processing units (NPUs), tensor processing units (TPUs), and/or the like, executing instructions that may execute one or more of the computational device functions106. In some embodiments, one or more of the compute engines116may execute one or more of the executable computational device functions106in an execution environment such as a container, a virtual machine, an operating system such as Linux, an Extended Berkeley Packet Filter (eBPF) environment, and/or the like, or a combination thereof.

In some embodiments, one or more of the compute engines may provide full or partial (e.g., hybrid) hardware implementations of one or more of the computational device functions106(in this example, computational device functions106aand106b). For example, in some embodiments, one or more of the compute engines116may include combinational logic, sequential logic, one or more timers, counters, registers, and/or state machines, one or more complex programmable logic devices (CPLDs), FPGAs, ASICs, and/or a combination thereof configured to process a bitstream for a computational device function106that may be implemented, for example, as a soft FPGA function.

In some embodiments, one or more of the computational device functions106may be downloaded, for example, from the host102and/or any other source. In some embodiments, one or more of the computational device functions106may be loaded into the device104when is it manufactured, shipped, installed, updated, and/or upgraded (e.g., through a firmware updated and/or upgrade) and/or the like. In some embodiments, a function may be referred to as a program, for example, in the context of executable computational device functions106that may be downloaded.

In some embodiments, the host102may run one or more applications128that may utilize the computational device functions106and/or compute engines116of the computational device104using, for example, an association scheme as disclosed herein.

In some embodiments, a computational device function may refer to any type of function that may be performed by one or more compute resources of a computational device such as an algorithm, data movement, data management, data selection, filtering, encryption and/or decryption, compression and/or decompression, checksum calculation, hash value calculation, cyclic redundancy check (CRC), and/or the like. In some embodiments, a computational device function may refer to a function that may be intended to be executed by a computational device, adapted to be executed by a computational device, and/or the like. In some embodiments, a compute engine may refer to a component or combination of components that may be capable of executing one or more computational device functions.

FIG.2illustrates an embodiment of a create association command in accordance with example embodiments of the disclosure. The create association command230illustrated inFIG.2, may be used, for example, to create an association between one or more computational device functions and one or more compute engines in the system illustrated inFIG.1.

Referring toFIG.2, the create association command230may include one or more parameters such as one or more function identifiers232and one or more compute engine identifiers234. Depending on the implementation details, the create association command230may create an association between one or more computational device functions identified by the one or more function identifiers232and one or more compute engines identified by the one or more compute engine identifiers234. In some embodiments, if the command230executes successfully, the create association command230may return a value of an association identifier (which may also be referred to as a function association identifier (FAI)) that identifies the association created by the command230. If, however, the create association command230encounters an error (e.g., an incorrect parameter), the create association command230may return a status (e.g., an error code) that may identify the error it encountered.

When used with the embodiment illustrated inFIG.1, the create association command230may be sent from the host102(e.g., by an application128) to a command parser at a computational device (e.g., a command parser implemented at the device controller105). Depending on the implementation details, the device controller105may process the create association command230and perform one or more related operations. For example, the device controller105may maintain a table or other data structure of the associations that have been created, perform error checking based on the parameters that are passed with the command230, return a value of an association identifier (e.g., an FAD that identifies the association created by the command230, and/or the like.

FIG.3illustrates an embodiment of a modify association command in accordance with example embodiments of the disclosure. The modify association command336illustrated inFIG.3, may be used, for example, to modify an association (which may have been created, for example, by the create association command230illustrated inFIG.2) between a computational device function and one or more compute engines in the system illustrated inFIG.1.

Referring toFIG.3, the modify association command336may include one or more parameters such as one or more association identifiers338(e.g., one or more FAIs). Depending on the implementation details, the modify association command336may modify an association identified by the one or more association identifiers338. For example, in some embodiments, the modify association command336may delete an association identified by the one or more association identifiers338.

When used with the embodiment illustrated inFIG.1, the modify association command336may be sent from the host102(e.g., by an application128) to a command parser at a computational device (e.g., a command parser implemented at the device controller105). Depending on the implementation details, the device controller105may process the modify association command336and perform one or more related operations. For example, the device controller105may modify a table or other data structure of the associations that have been created, for example, by the create association command230, perform error checking based on the parameters that are passed with the modify association command336, return a status value that may indicate a successful execution of the command or identify an error (e.g., an incorrect parameter) encountered by the modify association command336, and/or the like.

FIG.4illustrates an embodiment of an execute command in accordance with example embodiments of the disclosure. The execute command440illustrated inFIG.4, may be used, for example, to execute one or more computational device functions using one or more compute engines that may have been associated with the one or more computational device functions, for example, by the create association command230illustrated inFIG.2.

Referring toFIG.4, the execute command440may include one or more parameters such as one or more association identifiers438(e.g., one or more FAIs) that may identify one or more computational device functions to be executed and one or more compute engines on which the one or more computational device functions are to be executed. The execute command440may include one or more additional parameters such as one or more arguments442that may be passed to the one or more compute engines, a number444of the arguments442passed to the one or more compute engines, one or more data pointers448that may specify the location of input and/or output data for the identify one or more computational device functions and/or one or more generic parameters446that may be used by the execute command440.

Depending on the implementation details, the execute command440may invoke (e.g., start, initiate, launch, and/or the like) the execution of the one or more computational device functions using the one or more compute engines specified by the one or more association identifiers438. As part of invoking the execution process, one or more of the arguments442and/or generic parameters446may be passed to the one or more compute engines. The one or more compute engines identified by the one or more association identifiers438may then execute the one or more computational device functions identified by the one or more association identifiers438using, for example, input data pointed to by the one or more data pointers448.

In some embodiments, if the one or more compute engines successfully execute the one or more computational device functions, the one or more compute engines may place output data in a location pointed to by one or more of the data pointers448, and the execute command440may return a status indicating successful completion of the one or more computational device functions. If, however, one or more errors are encountered during the execution of the one or more computational device functions, or if the execute command440encounters is passed an incorrect parameter, the execute command440may return one or more status values (e.g., error codes) that may identify the error it encountered.

When used with the embodiment illustrated inFIG.1, the execute command440may be sent from the host102(e.g., by an application128) to a command parser at a computational device (e.g., a command parser implemented at the device controller105). Depending on the implementation details, the device controller105may process the execute command440and perform one or more related operations. For example, the device controller105may invoke (e.g., start, initiate, launch, and/or the like) the execution of the one or more computational device functions using the one or more compute engines specified by the one or more association identifiers438, perform error checking based on the parameters that are passed with the execute command440, return a status value that may indicate a successful execution of the command or identify an error (e.g., an incorrect parameter) encountered by the execute command440, and/or the like.

FIG.5illustrates another embodiment of a create association command in accordance with example embodiments of the disclosure. The create association command530illustrated inFIG.5, illustrates some possible implementation details that may be used, for example, to implement the create association command230illustrated inFIG.2. The create association command530may be used, for example, to create an association between a computational device function and one or more compute engines in the system illustrated inFIG.1. For purposes of illustration, the command530may be illustrated in the context of an NVMe command, but the inventive principles are not limited to use with NVMe or any other protocol or any of the implementation details (e.g., command format, byte numbers, bit numbers, and/or the like) illustrated inFIG.5. The create association command530may be used, for example, to associate a relatively small number of compute engines (e.g.,12or fewer compute engines) with a computational device function.

Referring toFIG.5, the create association command530may include sixteen command double words (CDWx), where x may be any number from0to15. Each command double word CDWx may include 32 bits identified (from left to right) as bits 31 through 00 as indicated at the top ofFIG.5. In some embodiments, the command double words CDWx may also be divided into 8-bit bytes. For example, CDW0may include (from left to right) bytes 03-00, CDW1may include bytes 07-04, and so forth for a total of 64 bytes (identified as bytes 63-0). In some embodiments, command double words may also be referred to as Command Dwords or command dwords.

Table 1 illustrates embodiments of Command Dwords that may be used with the create association command530illustrated inFIG.5in accordance with example embodiments of the disclosure.

Referring toFIG.5and Table 1, CDW0may include one or more of the following fields: Opcode (OPC), Fused Operation (FUSE), PRP or SGL for Data Transfer (PSDT) (where PRP may refer to Physical Region Page and SGL may refer to Scatter/Gather List), and/or Command Identifier (CID), In some embodiments, the fields included in CDW0may be implemented as standard fields.

CDW1may be used for a Namespace Identifier (NSID). In some embodiments, (e.g., in an NVMe storage device) a namespace may refer to a memory or storage area (e.g., a collection of logical block addresses (LBAs) that may appear as a separate (e.g., logical) storage device to a host and/or an application.

CDW2may be used to identify a computational device function and one or more compute engines that are to be associated. In some embodiments, this information may be implemented as follows.

Number Of Compute Engines (NOCE): this field may occupy bits 31:16 of CDW2and may specify the number of compute engines that are associated with the function slot (FS) field. If the number of compute engines is less than or equal to a predetermined value (e.g., 12), the compute engines may be identified in a list of compute engine identifiers (CEIDs) located at CDW10through CDW15as described below. However, if the number of compute engines exceeds the predetermined value (e.g., 12), a different version of the create association command530may be used as described below with respect toFIG.6. In some embodiments, the NOCE field may not exceed the value specified in a compute engine (CE) log page.

Function Slot (FS): this field may occupy bits 15:00 of CDW2and may specify a function slot for a computational device function that may be associated with one or more compute engines. If the value of FS is non-zero with a valid program slot, the create association command530(processed, for example, by the device controller105) may associate the function located at this function slot with one or more compute engines identified by one or more CEIDs located at CDW10through CDW15as described below. If, however, the function slot is zero or invalid, create association command530may fail and return a status value that may indicate that invalid program slot was passed with the command530.

Compute Engine Identifier List (CEIDL): this field may occupy some or all of CDW10through CDW15and may include a list of one or more CEIDs that may identify one or more compute engines that are to be associated with the function at the function slot indicated by FS. (The number of compute engines listed in CEIDL may be indicated by NOCE.) In the example illustrated inFIG.5and Table 1, each CEID may be 16 bits long, and thus, 12 CEIDs may occupy up to 192 bits at CDW10through CDW15, but any other CEID size and/or number of CDWs may be used.

In some embodiments, the create association command530may be implemented as an administrative command, for example, in an NVMe implementation. Depending on the implementation details, the create association command530may be submitted (e.g., to a submission queue (SQ)) while one or more other commands in an administrative submission queue, an input and/or output (I/O or IO) submission queue, and/or the like may be outstanding. In some embodiments, the create association command530may only allow a function association with one or more compute engines for valid compute engines, for example, as may be defined in a compute engine log page.

Upon completion of the create association command530, a completion queue (CQ) entry indicating the status of the command may be posted (e.g., by a controller such as controller105illustrated inFIG.1). In some embodiments, the completion queue entry may include an association identifier (e.g., an FAI), for example, in CDW0of the completion queue entry. The association identifier may be used, for example, by a modify association command, a delete association command, an execute command, and/or the like. Table 2 illustrates some example embodiments of command completion status values that may indicate command-specific errors if the create association command530is not successful.

FIG.6illustrates another embodiment of a create association command in accordance with example embodiments of the disclosure. In some aspects, the create association command630illustrated inFIG.6, may be similar to the create association command530illustrated inFIG.5, however, the command630illustrated inFIG.6may be used, for example, to associate a relatively large number of compute engines (e.g., more than 12 compute engines) with a computational device function. For purposes of illustration, the command630may be illustrated in the context of an NVMe command, but the inventive principles are not limited to use with NVMe or any other protocol or any of the implementation details (e.g., command format, byte numbers, bit numbers, and/or the like) illustrated inFIG.6.

Table 3 illustrates embodiments of Command Dwords that may be used with the create association command630illustrated inFIG.6in accordance with example embodiments of the disclosure.

Referring toFIG.6, and Table 3, the create association command630may use CDW0, CDW1, and/or CDW2in a manner similar to command530illustrated inFIG.5. However, when the number of compute engines that are to be associated with a function is greater than a predetermined number (e.g., 12) (e.g., for a value of NOCE in CDW2>12), the create association command630illustrated inFIG.6may use a data pointer (DPTR) located at CDW6through CDW9to point to a data location that may contain a list of compute engine identifiers (CEIDs) that may identify the compute engines that are to be associated with the function. For example, in some embodiments, the data pointer field DPTR may specify a host buffer that may contain a list of CEIDs. The length of the buffer may be determined, for example, by the NOCE field. In this embodiment, CDW10through CDW15may be unused.

In some embodiments, completion of the create association command630may be implemented in a manner similar to that described above with respect to the create association command530illustrated inFIG.5. For example, in some embodiments, the create association command630may be implemented as an administrative command (e.g., in an NVMe implementation). As another example, a completion queue entry may be posted in which an association identifier (e.g., an FAI) for the newly created association, one or more status values may indicate the status of the command (e.g., as illustrated in Table 2), and/or the like.

FIG.7illustrates an embodiment of a delete association command in accordance with example embodiments of the disclosure. The delete association command736illustrated inFIG.7, illustrates some possible implementation details that may be used, for example, to implement the modify association command336illustrated inFIG.3. The delete association command736may be used, for example, to delete an association between a computational device function and one or more compute engines in the system illustrated inFIG.1. For purposes of illustration, the command736may be illustrated in the context of an NVMe command, but the inventive principles are not limited to use with NVMe or any other protocol or any of the implementation details (e.g., command format, byte numbers, bit numbers, and/or the like) illustrated inFIG.7.

Table 4 illustrates embodiments of Command Dwords that may be used with the delete association command736illustrated inFIG.7in accordance with example embodiments of the disclosure.

Referring toFIG.7, and Table 4, the delete association command736may have a structure similar to that of the create association command530illustrated inFIG.5and may use CDW0, and CDW1in a similar manner. However, the delete association command736may use CDW10for an association identifier (e.g., an FAI) to identify the association to delete.

In some embodiments, the delete association command736may be implemented as an administrative command, for example, in an NVMe implementation. Depending on the implementation details, the delete association command736may be submitted (e.g., to a submission queue) while one or more other commands in an administrative submission queue, an10submission queue, and/or the like may be outstanding.

Upon completion of the delete association command736, a completion queue entry indicating the status of the command may be posted (e.g., by a controller such as controller105illustrated inFIG.1). Table 5 illustrates some example embodiments of command completion status values that may indicate command-specific errors if the delete association command736is not successful.

TABLE 5Delete Association Command Status ValuesValueDescription06hInvalid Function Association Identifier: The delete associationoperation may have failed as the specified input may be invalidand/or not available.07hFunction Association Identifier In Use: The specified functionassociation identifier may be currently in use by the computationaldevice and may not be deleted.

FIG.8illustrates an embodiment of an execute function command in accordance with example embodiments of the disclosure. The execute function command840illustrated inFIG.8, illustrates some possible implementation details that may be used, for example, to implement the execute command440illustrated inFIG.4. The execute function command840may be used, for example, to execute a computational device function using one or more compute engines as specified by an association identifier (e.g., an FAI) that may have been created, for example, by either of the create association commands530and/or630described above with respect toFIG.5and/orFIG.6, respectively. For purposes of illustration, the command840may be illustrated in the context of an NVMe command, but the inventive principles are not limited to use with NVMe or any other protocol or any of the implementation details (e.g., command format, byte numbers, bit numbers, and/or the like) illustrated inFIG.8.

Table 6 illustrates embodiments of Command Dwords that may be used with the execute function command840illustrated inFIG.8in accordance with example embodiments of the disclosure.

Referring toFIG.8, and Table 6, the execute function command840may use CDW0and/or CDW1in a manner similar to command530illustrated inFIG.5. However, the execute function command840may use CDW2to pass one or more parameters as described below to the computational device function for use during execution using the one or more compute engines.

Referring toFIG.8and Table 6, in some embodiments, CDW2may include one or more of the following fields:

Function Association Identifier (FAI): this field may specify a function association identifier that may be used by the execute function command840. If the value of FAI is non-zero with a valid FM field, then the computational device may execute the function with the function parameters provided. If the FM field is zero or invalid, the computational device may fail the command and return a status of Invalid Function Association Identifier.

Function Arguments Option (FAQ): in some embodiments, if the FAO field is set to ‘1’, it may indicate that the execute function command840may use one or more function arguments located in the PARAMD field (and the DPTR field may be ignored). If the FAO field is set to ‘0’, it may indicate that the execute function command840may use one or more arguments pointed to by the data pointer DPTR field (and the PARAMD field may be ignored).

Upon completion of the execute function command840, a completion queue entry indicating the status of the command may be posted (e.g., by a controller such as controller105illustrated inFIG.1). Moreover, output data from the function execution may be provided, for example, at one or more locations pointed to by the data pointer DPTR field.

In some embodiments, and depending on the implementation details, one or more of the features (e.g., the fields FAI, NOTA, FOA, and/or the like) may prevent a user (e.g., an application, a host, and/or the like) from making a such as not associating a function with one or more compute engines. In some embodiments, the execute function command840may perform one or more error checks on one or more of the fields FAI, NOFA, FOA, and/or the like and report errors, for example, by passing a status value in the completion queue entry.

In some embodiments, an association scheme may implement a discovery feature that may enable a computational device to advertise one or more compute engines, capabilities, and/or the like. For example, Table 7 illustrates example embodiments of a data structure that a computational device may return in response to a request command (e.g., an NVMe GetLog command).

TABLE 7Computational Device Compute Engine ListBytesDescription01:00Number of Compute Engines in List4096:02Array of Compute Engines in sequential order where eachcompute engine is represented by an identifier (e.g., of16-bits)

In some embodiments, and depending on the implementation details, an association scheme in accordance with example embodiments of the disclosure may provide a simplified technique for namespace management. For example, in some embodiments without an association scheme as described herein, a process for preparing and executing a function using a compute engine may involve the following operations: (1) a namespace is created with a specific compute engine; (2) a function may be activated on the specific compute engine; and (3) the function may be invoked by specifying the namespace (e.g., with the compute engine implied) and the function (e.g., by specifying a function slot). However, in some embodiments that may implement an association scheme in accordance with example embodiments of the disclosure, a process for preparing and executing a function using a compute engine may involve one or more of the following operations: (1) a namespace may be created with the association of a function and one or more compute engines (in some embodiments, this may be characterized as an implicit activation of the function); and (2) the function may be invoked by specifying the namespace (e.g., with the compute engine and the function implied).

Any of the functionality disclosed herein, including, for example, the device controller105, or any of the functionality implemented at a host, a computational device, and/or the like, may be implemented with hardware, software, firmware, or any combination thereof including combinational logic, sequential logic, one or more timers, counters, registers, and/or state machines, one or more complex programmable logic devices CPLDs, FPGAs, ASICs, CPUs, GPUs, NPUs, TPUs, and/or the like, executing instructions stored in any type of memory, or any combination thereof. In some embodiments, one or more components may be implemented as a system-on-chip (SOC).

FIG.9illustrates an embodiment of a computational device having one or more subsystems for implementing one or more computational device functions with one or more compute engines in accordance with example embodiments of the disclosure. The computational device904illustrated inFIG.9may include one or more NVMe subystems913-1, . . . ,913-N. Each of the one or more NVMe subystems913-1, . . . ,913-N may include a corresponding device controller905-1,905-N, function memory908-1,908-N, compute resources914-1, . . . ,914-N, and/or data memory909-1, . . . ,909-N. The function memories908-1, . . . ,908-N may each include any number of function slots that may be used to store computational device functions (e.g., computational device functions906a-1,906b-1,906c-1, and/or906d-1in function memory908-1). The compute resources914-1, . . . ,914-N may each include any number of compute engines (e.g., compute engines916a-1,916b-1,916c-1, and/or916d-1in compute resources914-1).

Each of the one or more NVMe subystems913-1, . . . ,913-N may further include one or more corresponding network ports907-1, . . . ,907-N that may connect a corresponding one of the NVMe subystems913-1, . . . ,913-N to one or more hosts, for example, through one or more network connections903, In some embodiments, one or more of the NVMe subystems913-1, . . . ,913-N may share one or more network ports. In some embodiments, one or more of the NVMe subystems913-1,913-N may have more than one network port.

Each of the one or more NVMe subystems913-1, . . . ,913-N may further include one or more corresponding namespaces915-1, . . . ,915-N, which may be implemented, for example, as storage namespaces.

In some embodiments, one or more of the components in each of the one or more NVMe subystems913-1, . . . ,913-N may operate in a manner similar to the corresponding components in the computational device104illustrated inFIG.1, However, in some embodiments, the components in each of the one or more NVMe subystems913-1, . . . ,913-N may use a corresponding namespace915-1, . . . ,915-N. Thus, in some embodiments, one or more of the compute resources may be arranged in, and/or accessed as, an association based on a namespace (e.g., by one or more hosts). In some embodiments, such an association may be referred to as a domain.

For purposes of illustration, the embodiment illustrated inFIG.9may be described in the context of NVMe subsystems, but the inventive principles may be implemented with any type of subsystem used with any type of interface, protocol, and/or the like.

FIG.10illustrates an example embodiment of a host apparatus in accordance with example embodiments of the disclosure. The host apparatus illustrated inFIG.10may be used, for example, to implement any of the hosts disclosed herein. The host apparatus1000illustrated inFIG.10may include a processor1002, which may include a memory controller1004, a system memory1006, host logic1008, and/or a communication interface1010. Any or all of the components illustrated inFIG.10may communicate through one or more system buses1012. In some embodiments, one or more of the components illustrated inFIG.10may be implemented using other components. For example, in some embodiments, the host control logic1008may be implemented by the processor1002executing instructions stored in the system memory1006or other memory. In some embodiments, the host logic1008may implement any of the host functionality disclosed herein including, for example, running an application, sending commands to, and/or receiving responses from, a computational device, and availing the host1000and/or an application running thereon, of an association scheme as disclosed herein.

FIG.11illustrates an example embodiment of a computational device that may be used to provide a user with access to one or more computational resources through a programming interface in accordance with example embodiments of the disclosure. The embodiment1100illustrated inFIG.11may be used, for example, to implement any of the computational devices disclosed herein. The computational device1100may include a device controller1102, one or more computational resources1108, command logic1116(e.g., to parse one or more commands and/or return one or more responses), a device functionality circuit1106, and a communication interface1110. The components illustrated inFIG.11may communicate through one or more device buses1112. In some embodiments, the device controller1102and/or one or more computational resources1108may include all or a portion of data memory109illustrated inFIG.1.

The device functionality circuit1006may include any hardware to implement the primary function of the device1000. For example, if the device1000is implemented as a storage device, the device functionality circuit1006may include a storage medium such as one or more flash memory devices, an FTL, and/or the like. As another example, if the device1000is implemented as a network interface card (MC), the device functionality circuit1006may include one or more modems, network interfaces, physical layers (PHYs), medium access control layers (MACs), and/or the like. As a further example, if the device1000is implemented as an accelerator, the device functionality circuit1006may include one or more accelerator circuits, memory circuits, and/or the like. In some embodiments, the device functionality circuit1006may include all or a portion of the data memory109illustrated inFIG.1.

FIG.12illustrates an embodiment of a method for implementing an association scheme for one or more computational device functions and one or more compute engines in accordance with example embodiments of the disclosure. The method may begin at operation1202. At operation1204, the method may create an association identifier based on an association between a computational device function and a compute engine of a computational device. For example, an application may call a create association command that may create an association based on a function identifier and a compute engine identifier and return the association identifier. At operation1206, the method may invoke an execute command to perform an execution of the computational device function using the compute engine, wherein the execute command may use the association identifier. For example, a command parser (e.g., running on a device controller at the computational device) may invoke the compute engine identified by the association identifier to run the function identified by the association identifier. The method may end at operation1208.

FIG.13illustrates an embodiment of a method for executing a computational device function using two compute engines in accordance with example embodiments of the disclosure. The method may begin at operation1302. At operation1304, the method may perform a first execution of a computational device function using a first compute engine of a computational device. For example, the first execution may include executing a first thread of the function. At operation1306, the method may perform a second execution of the computational device function using a second compute engine of the computational device. For example, the second execution may include executing a second thread of the function. In some embodiments, the first execution and the second execution overlap (e.g., the first and second threads may be executed simultaneously by the first and second compute engines, respectively). The method may end at operation1308.

The embodiments illustrated inFIG.12andFIG.13, as well as all of the other embodiments described herein, are example operations and/or components. In some embodiments, some operations and/or components may be omitted and/or other operations and/or components may be included. Moreover, in some embodiments, the temporal and/or spatial order of the operations and/or components may be varied. Although some components and/or operations may be illustrated as individual components, in some embodiments, some components and/or operations shown separately may be integrated into single components and/or operations, and/or some components and/or operations shown as single components and/or operations may be implemented with multiple components and/or operations.

Some embodiments disclosed above have been described in the context of various implementation details, but the principles of this disclosure are not limited to these or any other specific details. For example, some functionality has been described as being implemented by certain components, but in other embodiments, the functionality may be distributed between different systems and components in different locations and having various user interfaces. Certain embodiments have been described as having specific processes, operations, etc., but these terms also encompass embodiments in which a specific process, operation, etc. may be implemented with multiple processes, operations, etc., or in which multiple processes, operations, etc. may be integrated into a single process, step, etc. A reference to a component or element may refer to only a portion of the component or element. For example, a reference to a block may refer to the entire block or one or more subblocks. The use of terms such as “first” and “second” in this disclosure and the claims may only be for purposes of distinguishing the elements they modify and may not indicate any spatial or temporal order unless apparent otherwise from context. In some embodiments, a reference to an element may refer to at least a portion of the element, for example, “based on” may refer to “based at least in part on,” and/or the like. A reference to a first element may not imply the existence of a second element. The principles disclosed herein have independent utility and may be embodied individually, and not every embodiment may utilize every principle. However, the principles may also be embodied in various combinations, some of which may amplify the benefits of the individual principles in a synergistic manner. The various details and embodiments described above may be combined to produce additional embodiments according to the inventive principles of this patent disclosure.

Since the inventive principles of this patent disclosure may be modified in arrangement and detail without departing from the inventive concepts, such changes and modifications are considered to fall within the scope of the following claims.