Processing system and method for chemically treating a TERA layer

A processing system and method for chemically treating a TERA layer on a substrate. The chemical treatment of the substrate chemically alters exposed surfaces on the substrate. In one embodiment, the system for processing a TERA layer includes a plasma-enhanced chemical vapor deposition (PECVD) system for depositing the TERA layer on the substrate, an etching system for creating features in the TERA layer, and a processing subsystem for reducing the size of the features in the TERA layer.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is related to co-pending U.S. patent application Ser. No. 10/705,201, entitled “Processing System and Method for Treating a Substrate”, filed on Nov. 12, 2003; co-pending U.S. patent application Ser. No. 10/704,969, entitled “Processing System and Method for Thermally Treating a Substrate”, filed Nov. 12, 2003; co-pending U.S. patent application Ser. No. 10/705,397, entitled “Method and Apparatus for Thermally Insulating Adjacent Temperature Controlled Chambers”, filed on Nov. 12, 2003; and co-pending U.S. patent application Ser. No. 10/644,958, entitled “Method and Apparatus For Depositing Materials With Tunable Optical Properties And Etching Characteristics”, filed on Aug. 21, 2003. The contents of each of those applications are herein incorporated by reference in their entireties.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a system and method for treating a Tunable Etch Rate ARC (TERA) layer, and more particularly to a system and method for chemical treatment of a TERA layer.

2. Description of the Related Art

During semiconductor processing, a (dry) plasma etch process can be utilized to remove or etch material along fine lines or within vias or contacts patterned on a silicon substrate. The plasma etch process generally involves positioning a semiconductor substrate with an overlying patterned, protective layer, for example a photoresist layer, in a processing chamber. Once the substrate is positioned within the chamber, an ionizable, dissociative gas mixture is introduced within the chamber at a pre-specified flow rate, while a vacuum pump is throttled to achieve an ambient process pressure. Thereafter, a plasma is formed when a fraction of the gas species present are ionized by electrons heated via the transfer of radio frequency (RF) power either inductively or capacitively, or microwave power using, for example, electron cyclotron resonance (ECR). Moreover, the heated electrons serve to dissociate some species of the ambient gas species and create reactant specie(s) suitable for the exposed surface etch chemistry. Once the plasma is formed, selected surfaces of the substrate are etched by the plasma. The process is adjusted to achieve appropriate conditions, including an appropriate concentration of desirable reactant and ion populations to etch various features (e.g., trenches, vias, contacts, gates, etc.) in the selected regions of the substrate. Such substrate materials where etching is required include silicon dioxide (SiO2), low-k dielectric materials, poly-silicon, and silicon nitride. During material processing, etching such features generally comprises the transfer of a pattern formed within a mask layer to the underlying film within which the respective features are formed. The mask can, for example, comprise a light-sensitive material such as (negative or positive) photo-resist, multiple layers including such layers as photo-resist and an anti-reflective coating (ARC), or a hard mask formed from the transfer of a pattern in a first layer, such as photo-resist, to the underlying hard mask layer.

SUMMARY OF THE INVENTION

The principles of the present invention, as embodied and broadly described herein, provide a method of processing a Tunable Etch Rate ARC (TERA) layer on a substrate. The TERA layer processing method includes depositing the TERA layer on the substrate using a plasma enhanced chemical vapor deposition (PECVD) system, creating features in the TERA layer using an etching system, and reducing the size of the features in the TERA layer.

Additionally, a system for processing a TERA layer is presented. The system includes a plasma enhanced chemical vapor deposition (PECVD) system for depositing the TERA layer on the substrate, an etching system for creating features in the TERA layer, and a processing subsystem for reducing the size of the features in the TERA layer.

Numerous other aspects of the invention will be made apparent from the description that follows and from the drawings appended hereto, as would be appreciated by those skilled in the art.

DETAILED DESCRIPTION

In material processing methodologies, pattern etching comprises the application of a thin layer of light-sensitive material, such as photoresist, to an upper surface of a substrate that is subsequently patterned in order to provide a mask for transferring this pattern to the underlying thin film during etching. The patterning of the light-sensitive material generally involves exposure by a radiation source through a reticle (and associated optics) of the light-sensitive material using, for example, a micro-lithography system, followed by the removal of the irradiated regions of the light-sensitive material (as in the case of positive photoresist), or non-irradiated regions (as in the case of negative resist) using a developing solvent.

Additionally, multi-layer and hard masks can be implemented for etching features in a thin film. For example, when etching features in a thin film using a hard mask, the mask pattern in the light-sensitive layer is transferred to the hard mask layer using a separate etch step preceding the main etch step for the thin film. The hard mask can, for example, comprise a TERA layer that can be selected from several materials for silicon processing including silicon dioxide (SiO2), silicon nitride (Si3N4), and carbon, for example.

In order to reduce the feature size formed in the thin film, the hard mask can be trimmed laterally using, for example, a two-step process involving a chemical treatment of the exposed surfaces of the hard mask layer in order to alter the surface chemistry of the hard mask layer, and a post treatment of the exposed surfaces of the hard mask layer in order to desorb the altered surface chemistry.

FIG. 1illustrates a schematic representation of a processing system according to an embodiment of the invention. In the illustrated embodiment, a processing system1for processing a substrate using, for example, TERA layer trimming is shown. Processing system1can comprise a multi-element manufacturing system10, a deposition system20coupled to the multi-element manufacturing system10, a treatment system30coupled to the multi-element manufacturing system10, and an etching system70coupled to the multi-element manufacturing system10.

The treatment system30can comprise a transfer module40, a thermal treatment module50, and a chemical treatment module60. Also, as illustrated inFIG. 1, the transfer module40can be coupled to the thermal treatment module50in order to transfer substrates into and out of the thermal treatment module50and the chemical treatment module60, and exchange substrates with a multi-element manufacturing system10.

As should be apparent to those skilled in the art, the multi-element manufacturing system10can comprise additional processing elements (not shown) including such devices as etch systems, deposition systems, coating systems, cleaning systems, polishing systems, patterning systems, metrology systems, alignment systems, lithography systems, and transfer systems. Also, the multi-element manufacturing system10can permit the transfer of substrates to and from the processing elements (20,30, and70) and the additional processing elements (not shown).

As should be appreciated by those skilled in the art, the exact type and arrangement of components for processing system1may vary without departing from the scope of the invention. As such, processing system1is not limited solely to components20,30,40,50,60and70as described or the layout depicted. The invention is intended to encompass a plethora of variations too numerous to list here.

In one embodiment, deposition system20can comprise a chemical vapor deposition (CVD) system, a plasma enhanced chemical vapor deposition (PECVD) system, a physical vapor deposition (PVD) system, an ionized physical vapor deposition (iPVD) system, or an atomic layer deposition (ALD) system, or a combination of two or more thereof. The process gas can comprise an oxygen-containing gas, a nitrogen containing gas, a fluorine-containing gas, or a chlorine-containing gas, or a combination of two or more thereof. Alternately, an inert gas can also be included.

For example, an oxygen-containing gas can comprise O2, CO, NO, N2O, or CO2, or a combination of two or more thereof. The nitrogen-containing gas can comprise NO, N2O, N2, or NF3, or a combination of two or more thereof. The fluorine-containing gas can comprise NF3, SF6, CHF3, or C4F8, or a combination of two or more thereof. It will be appreciated that similar combinations to the fluorine-containing gas can be used for the chlorine-containing gas. Moreover, hybrids of gas containing both fluorine and chlorine may be employed.

The flow rate for an oxygen-containing gas can vary from approximately 0 sccm to approximately 500 sccm and alternately from approximately 0 sccm to approximately 300 sccm. The flow rate for an nitrogen-containing gas can vary from approximately 0 sccm to approximately 200 sccm and alternately from approximately 0 sccm to approximately 100 sccm. The flow rate for a fluorine-containing gas can vary from approximately 0 sccm to approximately 200 sccm and alternately from approximately 0 sccm to approximately 100 sccm. The flow rate for a chlorine-containing gas can vary from approximately 0 sccm to approximately 200 sccm and alternately from approximately 0 sccm to approximately 100 sccm.

In order to isolate the processes occurring in the deposition system20, an isolation assembly25can be utilized to couple the deposition system20to the multi-element manufacturing system10. The isolation assembly25can comprise a thermal insulation assembly to provide thermal isolation and/or a gate valve assembly to provide vacuum isolation. In alternate embodiments, the processing element20can comprise multiple modules.

As indicated above, in one embodiment, the treatment system30can comprise the transfer module40, the thermal treatment module50, which may be a physical heat treatment (PHT) module, and the chemical treatment module60, which may be a chemical oxide removal (COR) module. In order to isolate the processes occurring in the different modules, isolation assemblies35,45,55can be utilized to couple the different modules. The isolation assembly35can be used to couple the transfer module40to the multi-element manufacturing system10; the isolation assembly45can be used to couple the transfer module40to the PHT module50; and the isolation assembly55can be used to couple the PHT module50to the COR module60. The isolation assemblies35,45,55can comprise a thermal insulation assembly to provide thermal isolation and/or a gate valve assembly to provide vacuum isolation. In alternate embodiments, a different number of isolation assemblies35,45,55can be used.

In general, the transfer module40and/or the PHT module50of the processing system1depicted inFIG. 1can comprise at least two transfer openings to permit the passage of the substrate therethrough. For example, as depicted inFIG. 1, the PHT module50comprises two transfer openings. The first transfer opening permits the passage of the substrate between the PHT module50and the transfer system40, and the second transfer opening permits the passage of the substrate between the PHT module50and the COR module60. Alternately, each treatment system element can comprise at least one transfer opening to permit the passage of the substrate therethrough.

In one embodiment, the transfer system40, the PHT module50, and the COR module60can be configured as in-line elements. Alternately, the transfer system40, the PHT module50, and the COR module60can be configured in any number of arrangements. For example, a stacked arrangement or a side-by-side arrangement can be used.

In one embodiment, the etching system70can comprise a dry etching system and/or a wet etching system. For example, the etching system70can comprise a plasma etching system. In order to isolate the processes occurring in the etching system70, an isolation assembly65can be utilized to couple the etching system70to the multi-element manufacturing system10. The isolation assembly65can comprise a thermal insulation assembly to provide thermal isolation and/or a gate valve assembly to provide vacuum isolation. In alternate embodiments, the etching system70can comprise multiple modules.

In the embodiment shown inFIG. 1, a controller90can be coupled to the multi-element manufacturing system10, the deposition system20, the transfer module40, the PHT module50, the COR module60, and the etching system70. For example, the controller90can be used to control the multi-element manufacturing system10, the deposition system20, the transfer module40, the PHT module50, the COR module60, and the etching system70. The controller90can also be connected to various components in any of a number of different ways without departing from the scope of the invention.

Additionally, the multi-element manufacturing system10can exchange substrates with one or more substrate cassettes (not shown). Additionally, for example, an isolation assembly can serve as part of a processing element.

FIG. 2illustrates a simplified flow diagram of a method for operating a processing system in accordance with an embodiment of the invention. In the illustrated embodiment, a procedure is shown for reducing the size of features on a TERA layer.

Procedure200begins at task210. In task220, a TERA layer is deposited on a substrate. TERA layers can be deposited on top of many different layers of a substrate. For example, a TERA layer can be deposited on an oxide layer, a dielectric layer, or a metallic layer. The deposition of the TERA layer is discussed in greater detail herein.

Features are then created in a TERA layer, as indicated by task230. In one embodiment, a photoresist layer can be deposited on the TERA layer and a pattern may be transferred into the photoresist layer using at least one photolithography step. The pattern can be developed to form features in the photoresist layer; and an etching process can be used to create features in the TERA layer. In an alternate embodiment, a hard mask layer can be deposited on the TERA layer.

While performing process200, a stabilization step can be performed before and/or after an individual processing step. Alternately, the stabilization step may be avoided altogether.

Stabilization processes may encompass a variety of operational parameters, such as process time and chamber pressure. For example, the process time can vary from approximately 2 seconds to approximately 150 seconds and alternately from approximately 4 seconds to approximately 15 seconds. The chamber pressure can vary from approximately 2 mTorr to approximately 800 mTorr and alternately from approximately 10 mTorr to approximately 90 mTorr.

As discussed at length above, the process gas can comprise an oxygen-containing gas, a nitrogen containing gas, a fluorine-containing gas, or a chlorine-containing gas, or a combination of two or more thereof. Alternately, an inert gas can also be included. For example, an oxygen-containing gas can comprise O2, CO, NO, N2O, or CO2, or a combination of two or more thereof; the nitrogen-containing gas can comprise NO, N2O, N2, or NF3, or a combination of two or more thereof; and the fluorine-containing gas can comprise NF3, SF6, CHF3, or C4F8, or a combination of two or more thereof. The chlorine-containing gas can comprise similar combinations as the fluorine-containing gas.

The flow rate for an oxygen-containing gas can vary from approximately 0 sccm to approximately 500 sccm and alternately from approximately 0 sccm to approximately 300 sccm. The flow rate for an nitrogen-containing gas can vary from approximately 0 sccm to approximately 200 sccm and alternately from approximately 0 sccm to approximately 100 sccm. The flow rate for a fluorine-containing gas can vary from approximately 0 sccm to approximately 200 sccm and alternately from approximately 0 sccm to approximately 100 sccm. The flow rate for a chlorine-containing gas can vary from approximately 0 sccm to approximately 200 sccm and alternately from approximately 0 sccm to approximately 100 sccm.

In one embodiment, a photoresist trim process can be performed. Alternately, the photoresist trim process can be avoided altogether. Photoresist processes may also encompass a variety of operational parameters, such as process time and chamber pressure. For example, the process time can vary from approximately 0 seconds to approximately 180 seconds and alternately from approximately 10 seconds to approximately 40 seconds. The chamber pressure can vary from approximately 10 mTorr to approximately 120 mTorr and alternately from approximately 10 mTorr to approximately 90 mTorr. Also, as discussed above, the process gas can comprise an oxygen-containing gas, a nitrogen-containing gas and/or an inert gas. And, the flow rates for an oxygen-containing gas can vary from approximately 0 sccm to approximately 500 sccm and alternately from approximately 0 sccm to approximately 300 sccm, while the flow rates for a nitrogen-containing gas can vary from approximately 0 sccm to approximately 1000 sccm and alternately from approximately 0 sccm to approximately 200 sccm.

RF power can be supplied to an upper electrode and the upper RF power can vary from approximately 0 watts to approximately 1500 watts and alternately from approximately 100 watts to approximately 300 watts. In addition, RF power can be supplied to a lower electrode and the lower RF power can vary from approximately 0 watts to approximately 500 watts and alternately from approximately 40 watts to approximately 150 watts.

In one embodiment, a TERA cap etch process can be performed. Alternately, the TERA cap etch process may be avoided altogether. The TERA cap etch process may also encompass a variety of operational parameters, such as process time and chamber pressure. For example, the process time can vary from approximately 0 seconds to approximately 50 seconds and alternately from approximately 0 seconds to approximately 18 seconds. The chamber pressure can vary from approximately 10 mTorr to approximately 120 mTorr and alternately from approximately 10 mTorr to approximately 90 mTorr.

Also, as discussed above, the process gas can comprise an oxygen-containing gas, a nitrogen-containing gas, a fluorine-containing gas, or a chlorine-containing gas, an inert gas, or a combination of two or more thereof. And the flow rate for an oxygen-containing gas can vary from approximately 0 sccm to approximately 500 sccm and alternately from approximately 0 sccm to approximately 300 sccm. The flow rate for a nitrogen-containing gas can vary from approximately 0 sccm to approximately 200 sccm and alternately from approximately 0 sccm to approximately 100 sccm. The flow rate for a fluorine-containing gas can vary from approximately 0 sccm to approximately 200 sccm and alternately from approximately 0 sccm to approximately 100 sccm. The flow rate for a chlorine-containing gas can vary from approximately 0 sccm to approximately 200 sccm and alternately from approximately 0 sccm to approximately 100 sccm.

In task240, the size of the features in the TERA layer can be reduced. In one embodiment, the exposed surfaces of the features in the TERA layer can be oxidized, and a removal process can be performed to remove at least a part of the oxidized portion of the TERA features. A trimming amount can be established and the oxidation process can be controlled so that the correct trimming amount is achieved. During a removal process, a chemical oxide removal (COR) process can be performed. In an alternate embodiment, the oxidation process and the COR process can be performed a number of times to reduce the size of the features in the TERA layer to predetermined dimensions.

During an exemplary TERA oxidation process, the process time can vary from approximately 0 seconds to approximately 180 seconds and alternately from approximately 0 seconds to approximately 18 seconds. The chamber pressure can vary from approximately 10 mtorr to approximately 300 mtorr and alternately from approximately 150 mtorr to approximately 250 mtorr. The process gas can comprise an oxygen-containing gas. Alternately, an inert gas can also be included. The flow rate for an oxygen-containing gas can vary from approximately 0.0 sccm to approximately 500 sccm and alternately from approximately 150 sccm to approximately 300 sccm. RF power can be supplied to an upper electrode and the upper RF power can vary from approximately 0.0 watts to approximately 1500 watts and alternately from approximately 200 watts to approximately 400 watts. In addition, RF power can be supplied to a lower electrode and the lower RF power can vary from approximately 0.0 watts to approximately 500 watts and alternately from approximately 30 watts to approximately 100 watts.

During the oxidation process, the TERA layer can be partially or fully oxidized. For example, TERA layers ranging from approximately 1 nm to approximately 5 nm can be fully oxidized in less than 12 seconds. The COR process does not remove non-oxidized TERA material. The COR process can be used to remove all or part of the oxidized TERA layer, as would be appreciated by those skilled in the art.

For example, the transfer module40, the PHT module50, and the COR module60can be used to perform a removal process. The removal process can use a COR recipe to perform the processing and the COR recipe can begin when a substrate is transferred to the COR module. The substrate can be received by lift pins that are housed within a substrate holder, and the substrate can be lowered to the substrate holder. Thereafter, the substrate can be secured to the substrate holder using a clamping system, such as an electrostatic clamping system, and a heat transfer gas can be supplied to the backside of the substrate.

Next, the COR recipe can be used to set one or more chemical processing parameters for the chemical treatment of the substrate, and these parameters can include a chemical treatment processing pressure, a chemical treatment wall temperature, a chemical treatment substrate holder temperature, a chemical treatment substrate temperature, a chemical treatment gas distribution system temperature, a chemical treatment process gas, or a chemical treatment process gas flow rate, or a combination of two or more thereof. Then, the substrate can be chemically treated for a first period of time. The first period of time can range from 30 to 360 seconds, for example.

Next, the substrate can be transferred from the chemical treatment chamber to the PHT module50. During which time, the substrate clamp can be removed, and the flow of heat transfer gas to the backside of the substrate can be terminated. The substrate can be vertically lifted from the substrate holder to the transfer plane using the lift pin assembly housed within the substrate holder. The transfer system can receive the substrate from the lift pins and can position the substrate within the PHT module. Therein, a substrate lifter assembly can receive the substrate from the transfer system, and can lower the substrate to the substrate holder.

Then, the PHT recipe can be used to set one or more thermal processing parameters for thermal treatment of the substrate by the PHT module. In the PHT recipe, the substrate can be treated thermally for a second period of time. For example, the one or more thermal processing parameters can comprise a thermal treatment wall temperature, a thermal treatment upper assembly temperature, a thermal treatment substrate temperature, a thermal treatment substrate holder temperature, a thermal treatment substrate temperature, a thermal treatment processing pressure, a thermal treatment process gas, or a thermal treatment process gas flow rate, or a combination of two or more thereof. The second period of time can range from 30 to 360 seconds, for example.

In an exemplary process, the treatment system30can comprise a chemical oxide removal (COR) system for trimming an oxidized TERA film. The treatment system30can comprise the COR module50for chemically treating exposed surface layers, such as oxidized surface layers, on a substrate, whereby adsorption of the process chemistry on the exposed surfaces affects a chemical alteration of the surface layers. Additionally, the treatment system30can comprise the PHT module60for thermally treating the substrate, whereby the substrate temperature is elevated in order to desorb (or evaporate) the chemically altered exposed surfaces on the substrate.

In one embodiment, a COR module can use a process gas comprising HF and NH3, and the processing pressure can range from approximately 1 to approximately 100 mTorr and, for example, can range from approximately 2 to approximately 25 mTorr. The process gas flow rates can range from approximately 1 to approximately 200 sccm for each specie and, for example, can range from approximately 10 to approximately 100 sccm. In addition, a substantially uniform pressure field can be achieved. Additionally, the COR module chamber can be heated to a temperature ranging from 30° to 100° C. and, for example, the temperature can be approximately 40° C. Additionally, the gas distribution system can be heated to a temperature ranging from approximately 40° to approximately 100° C. and, for example, the temperature can be approximately 50° C. The substrate can be maintained at a temperature ranging from approximately 10° to approximately 50° C. and, for example, the substrate temperature can be approximately 20° C.

In addition, in the PHT module50, the thermal treatment chamber can be heated to a temperature ranging from approximately 50° to approximately 100° C. and, for example, the temperature can be approximately 80° C. Additionally, the upper assembly can be heated to a temperature ranging from approximately 50° to approximately 100° C. and, for example, the temperature can be approximately 80° C. The substrate can be heated to a temperature in excess of approximately 100° C. Alternatively, the substrate can be heated in a range from approximately 100° to approximately 200° C., and, for example, the temperature can be approximately 135° C.

The COR and PHT processes described herein can produce an etch amount of an exposed oxidized surface in excess of approximately 10 nm per 60 seconds of chemical treatment for oxidized TERA. The treatments can also produce an etch variation across the substrate of less than approximately 2.5 percent.

FIGS. 3A–3Fillustrate simplified schematic views of a method for processing a substrate in accordance with an embodiment of the invention. InFIG. 3A, a simplified schematic view of a partially processed semiconductor device is shown. In the illustrated embodiment, the semiconductor device has been processed using a photoresist development process and an etch process. A substrate layer310is shown, and the substrate layer can comprise silicon (Si), germanium (Ge), or gallium arsenide (GaAs), or a combination of two or more thereof. An additional layer320is shown on top of the substrate layer310. The additional layer can comprise one or more layers and each layer can comprise an oxide, a metal, or a dielectric material, or a combination of two or more thereof.

A TERA layer330is shown on top of the additional layer, and the TERA layer can comprise TERA features332. In addition, a photoresist layer340is shown on top of the TERA layer330, and the photoresist layer340can comprise photoresist features342. For example, the photoresist features342can be produced when the photoresist layer is developed, and the TERA features332can be produced when the photoresist features342are transferred into the TERA layer330using an etch process.

InFIG. 3B, another simplified schematic view of a partially processed semiconductor device is shown. In the illustrated embodiment, the semiconductor device has been processed using an etching process. Features332have been created in the TERA layer330A by transferring the photoresist features342using an etch process. A substrate layer310is shown, and the substrate layer can comprise of silicon (Si), germanium (Ge), or gallium arsenide (GaAs), or a combination of two or more thereof. An additional layer320is shown on top of the substrate layer310. The additional layer can comprise one or more layers and each layer can comprise an oxide, a metal, or a dielectric material, or a combination of two or more thereof.

A processed (etched) TERA layer330A is shown on top of the additional layer, and the processed TERA layer330A can comprise features332. In addition, a photoresist layer340is shown on top of the processed TERA layer330A, and the photoresist layer340can comprise photoresist features342.

InFIG. 3C, another simplified schematic view of a partially processed semiconductor device is shown. In the illustrated embodiment, the semiconductor device has been processed using an oxidation process. The photoresist features have been removed by the oxidation (ashing) process, and oxidized areas333and335have been created in the TERA features332in the TERA layer330B. The oxidized areas333on the sides of the TERA feature can have a different thickness than the oxidized areas335on the top of the TERA features. For example, the top portion of the TERA layer can comprise a cap portion that has a higher resistance to etching than the other portions of the TERA layer.

InFIG. 3C, a substrate layer310is shown, and the substrate layer can comprise silicon (Si), germanium (Ge), or gallium arsenide (GaAs), or a combination of two or more thereof. An additional layer320is shown on top of the substrate layer310. The additional layer can comprise one or more layers and each layer can comprise an oxide, a metal, or a dielectric material, or a combination of two or more thereof. A processed TERA layer330B is shown on top of the additional layer, and the processed TERA layer330B can comprise features332having oxidized areas333and335.

InFIG. 3D, another simplified schematic view of a partially processed semiconductor device is shown. In the illustrated embodiment, the semiconductor device has been processed using a COR process. Oxidized areas have been removed creating reduced TERA features337in the TERA layer330C by removing the oxidized areas of the TERA features using a COR process. A substrate layer310is shown, and the substrate layer can comprise silicon (Si), germanium (Ge), or gallium arsenide (GaAs), or a combination of two or more thereof. An additional layer320is shown on top of the substrate layer310. The additional layer can comprise one or more layers and each layer can comprise an oxide, a metal, or a dielectric material, or a combination of two or more thereof. A processed TERA layer330C is shown on top of the additional layer, and the processed TERA layer330C can comprise reduced size TERA features337.

InFIG. 3E, another simplified schematic view of a partially processed semiconductor device is shown. In the illustrated embodiment, the semiconductor device has been processed using an etch process, and one or more of the layers in the additional layer320has been etched using the reduced size TERA features337as a mask. The reduced size TERA features337can be used as mask features and a dry etching process and/or a wet etching process can be performed. A substrate layer310is shown, and the substrate layer can comprise silicon (Si), germanium (Ge), or gallium arsenide (GaAs), or a combination of two or more thereof.

A processed (etched) additional layer320A is shown on top of the substrate layer310. The processed (etched) additional layer320A can comprise vias324and additional layer features322. The additional layer features322can comprise one or more layers and each layer can comprise an oxide, a metal, or a dielectric material, or a combination of two or more thereof. A processed (partially etched) TERA layer330C is shown on top of the additional layer, and the processed (partially etched) TERA layer330C can comprise reduced size TERA features337. For example, the additional layer features can comprise a nitride layer and a doped poly layer.

InFIG. 3F, another simplified schematic view of a partially processed semiconductor device is shown. In the illustrated embodiment, the semiconductor device has been processed using a removal process, and the reduced size TERA features337have been removed. A substrate layer310is shown, and the substrate layer can comprise silicon (Si), germanium (Ge), or gallium arsenide (GaAs), or a combination of two or more thereof. A processed (etched) additional layer320A is shown on top of the substrate layer310. The processed (etched) additional layer320A can comprise vias324and additional layer features322. The additional layer features322can comprise one or more layers and each layer can comprise an oxide, a metal, or a dielectric material, or a combination of two or more thereof. In this manner, reduced size features can be created in the additional layer and smaller critical dimensions (gate widths) can be achieved. In one embodiment, further processing can be performed.

FIGS. 4A–4Gillustrate simplified schematic views of a method for processing a substrate in accordance with another embodiment of the invention.

InFIG. 4A, a simplified schematic view of a partially processed semiconductor device is shown. In the illustrated embodiment, the semiconductor device has been processed using a hard mask development process. A substrate layer410is shown, and the substrate layer can comprise silicon (Si), germanium (Ge), or gallium arsenide (GaAs), or a combination of two or more thereof. An additional layer420is shown on top of the substrate layer410. The additional layer can comprise one or more layers, and each layer can comprise an oxide, a metal, or a dielectric material, or a combination of two or more thereof. A TERA layer430is shown on top of the additional layer, and the TERA layer can be used as a hard mask. In addition, a hard mask layer440is shown on top of the TERA layer430, and the hard mask layer440can comprise hard mask features442. For example, the hard mask features442can be produced using a photoresist layer (not shown).

InFIG. 4B, another simplified schematic view of a partially processed semiconductor device is shown. In the illustrated embodiment, the semiconductor device has been processed using an etching process. Features432have been created in the TERA layer430A by transferring the hard mask features442using an etch process. A substrate layer410is shown, and the substrate layer can comprise silicon (Si), germanium (Ge), or gallium arsenide (GaAs), or a combination of two or more thereof.

An additional layer420is shown on top of the substrate layer410. The additional layer can comprise one or more layers, and each layer can comprise an oxide, a metal, or a dielectric material, or a combination of two or more thereof. In addition, a photoresist layer440is shown on top of the processed TERA layer430A, and the photoresist layer440can comprise photoresist features442.

InFIG. 4C, another simplified schematic view of a partially processed semiconductor device is shown. In the illustrated embodiment, the semiconductor device has been processed using an oxidation process. Oxidized areas435have been created in the TERA features432in the TERA layer430B by oxidizing the exposed surfaces of the TERA features432using an oxidation process. A substrate layer410is shown, and the substrate layer can comprise silicon (Si), germanium (Ge), or gallium arsenide (GaAs), or a combination of two or more thereof.

An additional layer420is shown on top of the substrate layer410. The additional layer can comprise one or more layers, and each layer can comprise an oxide, a metal, or a dielectric material, or a combination of two or more thereof. A processed TERA layer430B is shown on top of the additional layer, and the processed TERA layer430B can comprise features432having oxidized areas435. In addition, a photoresist layer440is shown on top of the processed TERA layer430B, and the photoresist layer440can comprise photoresist features442.

InFIG. 4D, another simplified schematic view of a partially processed semiconductor device is shown. In the illustrated embodiment, the semiconductor device has been processed using a COR process. Oxidized areas can be removed using a COR process thereby creating reduced size TERA features437in the TERA layer430C. Alternately, another substantially lateral etch process can be performed in which the oxidized areas435can be removed creating the reduced TERA features437in the TERA layer430C. A substrate layer410is shown, and the substrate layer can comprise silicon (Si), germanium (Ge), or gallium arsenide (GaAs), or a combination of two or more thereof.

An additional layer420is shown on top of the substrate layer410. The additional layer can comprise one or more layers, and each layer can comprise an oxide, a metal, or a dielectric material, or a combination of two or more thereof. A processed (laterally etched) TERA layer430C is shown on top of the additional layer, and the processed (laterally etched) TERA layer430C can comprise reduced size TERA features437. In addition, hard mask features can be shown on top of the reduced size TERA features437.

InFIG. 4E, another simplified schematic view of a partially processed semiconductor device is shown. In the illustrated embodiment, the semiconductor device has been processed using a removal process, and the hard mask features442have been removed. The hard mask features can be removed using an ashing process, a dry etching process, or a wet etching process, or a combination of two or more thereof. A substrate layer410is shown, and the substrate layer can comprise silicon (Si), germanium (Ge), or gallium arsenide (GaAs), or a combination of two or more thereof.

An additional layer420is shown on top of the substrate layer410. The additional layer can comprise one or more layers, and each layer can comprise an oxide, a metal, or a dielectric material, or a combination of two or more thereof. A processed (laterally etched) TERA layer430C is shown on top of the additional layer, and the processed (laterally etched) TERA layer430C can comprise reduced size TERA features437. InFIG. 4E, hard mask features have been removed from the top surfaces of the reduced size TERA features437.

InFIG. 4F, another simplified schematic view of a partially processed semiconductor device is shown. In the illustrated embodiment, the semiconductor device has been processed using an etch process, and the additional layer420has been etched using the reduced size TERA features437as a mask. The reduced size TERA features437can be used as mask features and a dry etching process and/or a wet etching process can be performed. A substrate layer410is shown, and the substrate layer can comprise silicon (Si), germanium (Ge), or gallium arsenide (GaAs), or a combination of two or more thereof.

A processed (etched) additional layer420A is shown on top of the substrate layer410. The processed (etched) additional layer420A can comprise vias424and additional layer features422. The additional layer features422can comprise one or more layers, and each layer can comprise an oxide, a metal, or a dielectric material, or a combination of two or more thereof. A processed (laterally etched) TERA layer430C is shown on top of the additional layer, and the processed (laterally etched) TERA layer430C can comprise reduced size TERA features437. For example, the additional layer features can comprise a nitride layer and a doped poly layer.

InFIG. 4G, another simplified schematic view of a partially processed semiconductor device is shown.

In the illustrated embodiment, the semiconductor device has been processed using a removal process, and the reduced size TERA features437have been removed. A substrate layer410is shown, and the substrate layer can comprise silicon (Si), germanium (Ge), or gallium arsenide (GaAs), or a combination of two or more thereof. A processed (etched) additional layer420A is shown on top of the substrate layer410. The processed (etched) additional layer420A can comprise vias424and additional layer features422. The additional layer features422can comprise one or more layers, and each layer can comprise an oxide, a metal, or a dielectric material, or a combination of two or more thereof. In this manner, reduced size features can be created in the additional layer and smaller critical dimensions (gate widths) can be achieved.

FIG. 5illustrates a simplified block diagram of a PECVD system in accordance with an embodiment of the invention. In the illustrated embodiment, the PECVD system500comprises a processing chamber510, an upper electrode540as part of a capacitively coupled plasma source, a shower plate assembly520, a substrate holder530for supporting a substrate535, a pressure control system580, and a controller590.

In one embodiment, the PECVD system500can comprise a remote plasma system575that can be coupled to the processing chamber510using a valve578. In another embodiment, a remote plasma system and valve are not included.

In one embodiment, the PECVD system500can comprise the pressure control system580that can be coupled to the processing chamber510. For example, the pressure control system580can comprise a throttle valve (not shown) and a turbomolecular pump (TMP) (not shown) and can provide a controlled pressure in processing chamber510. In alternate embodiments, the pressure control system580can comprise a dry pump (not shown). For example, the chamber pressure can range from approximately 0.1 mTorr to approximately 100 mTorr. Alternatively, the chamber pressure can range from approximately 0.1 mTorr to approximately 20 mTorr.

The processing chamber510can facilitate the formation of plasma in the process space502. The PECVD system500can be configured to process substrates of any size, such as 200 mm substrates, 300 mm substrates, or larger substrates. Alternately, the PECVD system500can operate by generating plasma in one or more processing chambers.

The PECVD system500comprises the shower plate assembly520coupled to the processing chamber510. The shower plate assembly520is mounted opposite the substrate holder530. The shower plate assembly520comprises a center region522, an edge region524, and a sub region526. A shield ring528can be used to couple the shower plate assembly520to the processing chamber510.

The center region522is coupled to a gas supply system531by a first process gas line523. The edge region524is coupled to the gas supply system531by a second process gas line525. The sub region526is coupled to the gas supply system531by a third process gas line527.

The gas supply system531provides a first process gas to the center region522, a second process gas to the edge region524, and a third process gas to the sub region526. The gas chemistries and flow rates can be individually controlled to these regions. Alternately, the center region522and the edge region524can be coupled together as a single primary region, and the gas supply system531can provide the first process gas and/or the second process gas to the primary region. In alternate embodiments, any of the regions can be coupled together and the gas supply system531can provide one or more process gasses, as appropriate.

The gas supply system531can comprise at least one vaporizer (not shown) for providing precursors. Alternately, a vaporizer is not required. In an alternate embodiment, a bubbling system can be used.

The PECVD system500comprises an upper electrode540that can be coupled to the shower plate assembly520and also to the processing chamber510. The upper electrode540can comprise temperature control elements542. The upper electrode540can be coupled to a first RF source546using a first match network544. As would be appreciated by those skilled in the art, the first match network544need not be provided between the first RF source546and the upper electrode540.

The first RF source546provides a TRF signal to the upper electrode540, and the first RF source546can operate in a frequency range from approximately 0.1 MHz. to approximately 200 MHz. The TRF signal can be in the frequency range from approximately 1 MHz. to approximately 100 MHz. or alternatively in the frequency range from approximately 2 MHz. to approximately 60 MHz. The first RF source546can operate in a power range from approximately 0 watts to approximately 10000 watts, or alternatively the first RF source546can operate in a power range from approximately 0 watts to approximately 5000 watts.

The upper electrode540and the RF source546are parts of a capacitively-coupled plasma source. The capacitively-coupled plasma source may be replaced with or augmented by other types of plasma sources, such as an inductively coupled plasma (ICP) source, a transformer-coupled plasma (TCP) source, a microwave powered plasma source, an electron cyclotron resonance (ECR) plasma source, a Helicon wave plasma source, and a surface wave plasma source. As is well known in the art, the upper electrode540may be eliminated or reconfigured in the various suitable plasma sources.

The substrate535can be, for example, transferred into and out of the processing chamber510through a slot valve (not shown) and chamber feed-through (not shown) via a robotic substrate transfer system (not shown), and it can be received by the substrate holder530and mechanically translated by devices coupled thereto. Once the substrate535is received from the substrate transfer system, the substrate535can be raised and/or lowered using a translation device550that can be coupled to the substrate holder530by a coupling assembly552.

The substrate535can be held or affixed to the substrate holder530via an electrostatic clamping system. For example, the electrostatic clamping system can comprise an electrode516and an ESC supply556. Clamping voltages that can range from approximately −2000 V to approximately +2000 V, for example, can be provided to the clamping electrode516. Alternatively, the clamping voltage can range from approximately −1000 V to approximately +1000 V. In alternate embodiments, the ESC system and the ESC supply556are not required.

The substrate holder530can comprise lift pins (not shown) for lowering and/or raising the substrate535to and/or from the surface of the substrate holder530. In alternate embodiments, different lifting devices can be provided in the substrate holder530, as would be appreciated by those skilled in the art. In alternate embodiments, gas can, for example, be delivered to the backside of the substrate535via a backside gas system to improve the gas-gap thermal conductance between the substrate535and the substrate holder530.

A temperature control system can also be provided. Such a system can be utilized when temperature control of the substrate535is required at elevated or reduced temperatures. For example, a heating element532, such as resistive heating elements, or thermo-electric heaters/coolers can be included, and the substrate holder530can further include a heat exchange system534. The heating element532can be coupled to a heater supply558. The heat exchange system534can include re-circulating coolant flow passages that receive heat from the substrate holder530and transfer the heat to a heat exchanger system (not shown), or when heating, transfers the heat from the heat exchanger system to the substrate holder530.

Also, the electrode516can be coupled to a second RF source560using a second match network562. Alternately, the second match network562is not required.

The second RF source560provides a bottom RF signal (BRF) to the lower electrode516, and the second RF source560can operate in a frequency range from approximately 0.1 MHz. to approximately 200 MHz. The BRF signal can be in the frequency range from approximately 0.2 MHz. to approximately 30 MHz. or alternatively, in the frequency range from approximately 0.3 MHz. to approximately 15 MHz. The second RF source560can operate in a power range from approximately 0.0 watts to approximately 1000 watts, or alternatively, the second RF source560can operate in a power range from approximately 0.0 watts to approximately 500 watts. In various embodiments, the lower electrode516may not be used, or may be the sole source of plasma within the chamber510, or may augment any additional plasma source.

The PECVD system500can further comprise the translation device550that can be coupled by a bellows554to the processing chamber510. Also, coupling assembly552can couple the translation device550to the substrate holder530. The bellows554are configured to seal the vertical translation device550from the atmosphere outside the processing chamber510.

The translation device550allows a variable gap504to be established between the shower plate assembly520and the substrate535. The gap504can range from approximately 10 mm to approximately 200 mm, and alternatively, the gap504can range from approximately 20 mm to approximately 80 mm. The gap504can remain fixed or the gap504can be changed during a deposition process.

Additionally, the substrate holder530can further comprise a focus ring506and a ceramic cover508. Alternately, the focus ring506and/or the ceramic cover508need not be included, as would be appreciated by those skilled in the art.

At least one chamber wall512can comprise a coating514to protect the wall. For example, the coating514can comprise a ceramic material. In an alternate embodiment, the coating514is not required. Furthermore, a ceramic shield (not shown) can be used within the processing chamber510.

In addition, the temperature control system can be used to control the chamber wall512temperature. For example, ports can be provided in the chamber wall512for controlling temperature. The chamber wall512temperature can be maintained relatively constant while a process is being performed in the chamber510.

Also, the temperature control system can be used to control the temperature of the upper electrode540. The temperature control elements542can be used to control the upper electrode540temperature. The upper electrode540temperature can be maintained relatively constant while a process is being performed in the chamber510.

In addition, the PECVD system500can also comprise the remote plasma system575that can be used for chamber510cleaning.

Furthermore, the PECVD system500can also comprise a purging system (not shown) that can be used for controlling contamination and/or chamber510cleaning.

In an alternate embodiment, the processing chamber510can, for example, further comprise a monitoring port (not shown). The monitoring port can, for example, permit optical monitoring of the process space502.

The PECVD system500also comprises the controller590. The controller590can be coupled to the chamber510, the shower plate assembly520, the substrate holder530, the gas supply system531, the upper electrode540, the first RF match544, the first RF source546, the translation device550, the ESC supply556, the heater supply558, the second RF match562, the second RF source560, the purging system595, the remote plasma device575, and the pressure control system580. The controller590can be configured to provide control data to these components and receive data such as process data from these components. For example, the controller590can comprise a microprocessor, a memory, and a digital I/O port capable of generating control voltages sufficient to communicate and activate inputs to the processing system500as well as monitor outputs from the PECVD system500.

Moreover, the controller590can exchange information with system components. Also, a program stored in the memory can be utilized to control the aforementioned components of the PECVD system500according to a process recipe. In addition, controller590can be configured to analyze the process data, to compare the process data with target process data, and to use the comparison to change a process and/or control the deposition tool. Also, the controller590can be configured to analyze the process data, to compare the process data with historical process data, and to use the comparison to predict, prevent, and/or declare a fault.

During the deposition of a TERA layer, the substrate535can be placed on the translatable substrate holder530. For example, the translatable substrate holder530can be used to establish the gap between the upper electrode540surface and the surface of the translatable substrate holder530. The gap504can range from approximately 10 mm to approximately 200 mm, or alternatively, the gap504can range from approximately 20 mm to approximately 80 mm. In alternate embodiments, the gap504size can be changed.

During a TERA layer deposition process, a TRF signal can be provided to the upper electrode540using the first RF source544. For example, the first RF source544can operate in a frequency range from approximately 0.1 MHz. to approximately 200 MHz. Alternatively, the first RF source544can operate in a frequency range from approximately 1 MHz. to approximately 100 MHz., or the first RF source544can operate in a frequency range from approximately 2 MHz. to approximately 60 MHz. The first RF source544can operate in a power range from approximately 10 watts to approximately 10000 watts, or alternatively, the first RF source544can operate in a power range from approximately 10 watts to approximately 5000 watts

Also, during a TERA layer deposition process, a BRF signal can be provided to the lower electrode530using the second RF source560. For example, the second RF source560can operate in a frequency range from approximately 0.1 MHz. to approximately 200 MHz. Alternatively, the second RF source560can operate in a frequency range from approximately 0.2 MHz. to approximately 30 MHz. or the second RF source can operate in a frequency range from approximately 0.3 MHz. to approximately 15 MHz. The second RF source560can operate in a power range from approximately 0.0 watts to approximately 1000 watts, or alternatively, the second RF source560can operate in a power range from approximately 0.0 watts to approximately 500 watts. In an alternate embodiment, a BRF signal is not required.

In addition, a process gas can be provided to the processing chamber510using the shower plate assembly520. For example, process gas can comprise a silicon-containing precursor, a carbon-containing precursor, or oxygen containing gas, or a combination of two or more thereof. An inert gas can also be included. For example, the flow rate for the silicon-containing precursor and the carbon-containing precursor can range from approximately 0 sccm to approximately 5000 sccm and the flow rate for the inert gas can range from approximately 0 sccm to approximately 10000 sccm. The silicon-containing precursor can comprise monosilane (SiH4), tetraethylorthosilicate (TEOS), monomethylsilane (1MS), dimethylsilane (2MS), trimethylsilane (3MS), tetramethylsilane (4MS), octamethylcyclotetrasiloxane (OMCTS), dimethyidimethoxysilane (DMDMOS), or tetramethylcyclotetrasilane (TMCTS), or a combination of two or more thereof. The carbon-containing precursor can comprise CH4, C2H4, C2H2, C6H6, or C6H5OH, or a combination of two or more thereof. The inert gas can comprise argon, helium, or nitrogen, or a combination of two or more thereof. For example, the oxygen containing gas can comprise at O2, CO, NO, N2O, or CO2, or a combination of two or more thereof, and the flow rate can range from approximately 0 sccm to approximately 10000 sccm.

The TERA layer can comprise a material having a refractive index (n) ranging from approximately 1.5 to approximately 2.5 when measured at a wavelength of at least one of 248 nm, 193 nm, or 157 nm, and an extinction coefficient (k) ranging from approximately 0.10 to approximately 0.9 when measured at a wavelength of at least one of 248 nm, 193 nm, or 157 nm. For example, a TERA layer can comprise a SiCOH material, or a SiCH material, or a combination thereof. The TERA layer can comprise a thickness ranging from approximately 30 nm to approximately 500 nm, and the deposition rate can range from approximately 100 Å/min to approximately 10000 Å/min. The TERA layer can comprise one or more layers having different etch-resistance and/or optical properties.

Furthermore, the chamber pressure and substrate temperature can be controlled during the deposition of the TERA layer. For example, the chamber pressure can range from approximately 0.1 mTorr to approximately 100.0 mTorr, and the substrate temperature can range from approximately 0° C. to approximately 500° C.

FIG. 6illustrates a simplified block diagram for a processing system600in accordance with an embodiment of the invention. In the illustrated embodiment, the processing system600for performing a chemical treatment and a thermal treatment of a substrate642is presented. The processing system600comprises a chemical treatment system610, and a thermal treatment system620coupled to the chemical treatment system610. The chemical treatment system610comprises a chemical treatment chamber611, which can be temperature-controlled. The thermal treatment system620comprises a thermal treatment chamber621, which can be temperature-controlled. The chemical treatment chamber611and the thermal treatment chamber621can be thermally insulated from one another using a thermal insulation assembly630, and vacuum isolated from one another using a gate valve assembly696.

As illustrated inFIG. 6, the chemical treatment system610further comprises a temperature controlled substrate holder640configured to be substantially thermally isolated from the chemical treatment chamber611and configured to support the substrate642. A vacuum pumping system650is coupled to the chemical treatment chamber611to evacuate the chemical treatment chamber611. A gas distribution system660is also connected to the chemical treatment chamber611for introducing a process gas into a process space662within the chemical treatment chamber611.

Also, the thermal treatment system620further comprises a temperature controlled substrate holder670mounted within the thermal treatment chamber621. The substrate holder670is configured to be substantially thermally insulated from the thermal treatment chamber621and is configured to support a substrate642′. A vacuum pumping system680is used to evacuate the thermal treatment chamber621. A substrate lifter assembly690is coupled to the thermal treatment chamber621. The lifter assembly690can vertically translate the substrate642″ between a holding plane (solid lines) and the substrate holder670(dashed lines), or a transfer plane located therebetween. The thermal treatment chamber621can further comprise an upper assembly684.

Additionally, the chemical treatment chamber611, thermal treatment chamber621, and thermal insulation assembly630define a common opening694through which a substrate642can be transferred. During processing, the common opening694can be sealed closed using the gate valve assembly696in order to permit independent processing in the two chambers611,621. Furthermore, a transfer opening698can be formed in the thermal treatment chamber621in order to permit substrate exchanges with a transfer system as illustrated inFIG. 1. For example, a second thermal insulation assembly631can be implemented to thermally insulate the thermal treatment chamber621from a transfer system (not shown). Although the opening698is illustrated as part of the thermal treatment chamber621, the transfer opening698can be formed in the chemical treatment chamber611and not the thermal treatment chamber621, or the transfer opening698can be formed in both the chemical treatment chamber611and the thermal treatment chamber621.

As illustrated inFIG. 6, the chemical treatment system610comprises the substrate holder640and the substrate holder assembly644in order to provide several operational functions for thermally controlling and processing the substrate642. The substrate holder640and the substrate holder assembly644can comprise an electrostatic clamping system (or mechanical clamping system) in order to electrically (or mechanically) clamp the substrate642to the substrate holder640. Furthermore, the substrate holder640can, for example, further include a cooling system having a re-circulating coolant flow that receives heat from the substrate holder640and transfers heat to a heat exchanger system (not shown), or when heating, transfers heat from the heat exchanger system.

Moreover, a heat transfer gas can, for example, be delivered to the back-side of the substrate642via a backside gas system to improve the gas-gap thermal conductance between the substrate642and the substrate holder640. For instance, the heat transfer gas supplied to the back-side of the substrate642can comprise an inert gas such as helium, argon, xenon, krypton, a process gas, or other gas such as oxygen, nitrogen, or hydrogen. Such a system can be utilized when temperature control of the substrate642is required at elevated or reduced temperatures. For example, the backside gas system can comprise a multi-zone gas distribution system such as a two-zone (center-edge) system, wherein the back-side gas gap pressure can be independently varied between the center and the edge of the substrate642. In other embodiments, heating/cooling elements, such as resistive heating elements, or thermoelectric heaters/coolers can be included in the substrate holder640, as well as the chamber wall of the chemical treatment chamber611.

Also, the substrate holder640can further comprise a lift pin assembly (not shown) capable of raising and lowering three or more lift pins (not shown) in order to vertically translate the substrate642to and from an upper surface of the substrate holder640and a transfer plane in the processing system600.

In addition, the temperature of the temperature-controlled substrate holder640can be monitored using a temperature sensing device (not shown) such as a thermocouple (e.g. a K-type thermocouple, Pt sensor, etc.). Furthermore, a controller can utilize the temperature measurement as feedback to the substrate holder640assembly in order to control the temperature of substrate holder640. For example, a fluid flow rate, fluid temperature, heat transfer gas type, heat transfer gas pressure, clamping force, resistive heater element current or voltage, thermoelectric device current or polarity, or a combination of two or more thereof can be adjusted in order to affect a change in the temperature of substrate holder640and/or the temperature of the substrate642.

Referring again toFIG. 6, chemical treatment system610comprises a gas distribution system660. In one embodiment, a gas distribution system660can comprise a showerhead gas injection system (not shown). The gas distribution system660can further comprise one or more gas distribution orifices to distribute a process gas to the process space662within the chemical treatment chamber611. Additionally, the process gas can, for example, comprise NH3, HF, H2, O2, CO, CO2, Ar, He, etc.

As shown inFIG. 6, the chemical treatment system620further comprises the temperature controlled chemical treatment chamber611that is maintained at an elevated temperature. For example, a wall heating element666can be coupled to a wall temperature control unit668, and the wall heating element666can be configured to couple to the chemical treatment chamber611. The heating element666can, for example, comprise a resistive heater element such as a tungsten, nickel-chromium alloy, aluminum-iron alloy, aluminum nitride, etc., filament. Examples of commercially available materials to fabricate resistive heating elements include Kanthal, Nikrothal, Akrothal, which are registered trademark names for metal alloys produced by Kanthal Corporation of Bethel, Conn. The Kanthal family includes ferritic alloys (FeCrAI) and the Nikrothal family includes austenitic alloys (NiCr, NiCrFe).

When an electrical current flows through the filament, power is dissipated as heat, and, therefore, the wall temperature control unit668can, for example, comprise a controllable DC power supply. For example, wall heating element666can comprise at least one Firerod cartridge heater commercially available from Watlow (1310 Kingsland Dr., Batavia, Ill., 60510). A cooling element can also be employed in the chemical treatment chamber611. The temperature of the chemical treatment chamber611can be monitored using a temperature-sensing device such as a thermocouple (e.g. a K-type thermocouple, Pt sensor, etc.). Furthermore, a controller can utilize the temperature measurement as feedback to the wall temperature control unit668in order to control the temperature of the chemical treatment chamber611.

Referring again toFIG. 6, the chemical treatment system610can further comprise a temperature controlled gas distribution system660that can be maintained at any selected temperature.

Furthermore, inFIG. 6, the vacuum pumping system650is shown that can comprise a vacuum pump652and a gate valve654for throttling the chamber pressure. The vacuum pump652can, for example, include a turbo-molecular vacuum pump (TMP) capable of a pumping speed up to 5000 liters per second (and greater). For example, the TMP can be a Seiko STP-A803 vacuum pump, or an Ebara ET1301W vacuum pump. TMPs are useful for low pressure processing, typically less than 50 mTorr. For high pressure (i.e., greater than 100 mTorr) or low throughput processing (i.e., no gas flow), a mechanical booster pump and dry roughing pump can be used.

In one embodiment, the processing system600can be controlled using a controller, such as controller90inFIG. 1. In an alternate embodiment, the processing system600can comprise a controller (not shown) that can be coupled to the chemical treatment system610and the thermal treatment system620. For example, the controller can comprise a processor, memory, and a digital I/O port capable of exchanging information with the chemical treatment system610as well as the thermal treatment system620.

As shown inFIG. 6, the thermal treatment system620further comprises a temperature controlled substrate holder670. The substrate holder670can further comprise a heating element676embedded therein and a substrate holder temperature control unit678coupled thereto. The heating element676can, for example, comprise a resistive heater element such as a tungsten, nickel-chromium alloy, aluminum-iron alloy, aluminum nitride, etc., filament. Examples of commercially available materials to fabricate resistive heating elements include Kanthal, Nikrothal, and Akrothal, which are registered trademark names for metal alloys produced by Kanthal Corporation of Bethel, Conn. The Kanthal family includes ferritic alloys (FeCrAl) and the Nikrothal family includes austenitic alloys (NiCr, NiCrFe).

As discussed above, when an electrical current flows through the filament, power is dissipated as heat, and, therefore, the substrate holder temperature control unit678can, for example, comprise a controllable DC power supply. Alternately, the temperature controlled substrate holder670can, for example, be a cast-in heater commercially available from Watlow (1310 Kingsland Dr., Batavia, Ill., 60510) capable of a maximum operating temperature of 400 to 450 C, or a film heater comprising aluminum nitride materials that is also commercially available from Watlow and capable of operating temperatures as high as 300 C and power densities of up to 23.25 W/cm2. Alternatively, a cooling element can be incorporated in the substrate holder670.

The temperature of the substrate holder670can be monitored using a temperature-sensing device such as a thermocouple (e.g. a K-type thermocouple). Furthermore, a controller can utilize the temperature measurement as feedback to the substrate holder temperature control unit678in order to control the temperature of the substrate holder670.

Referring again toFIG. 6, the thermal treatment system620can further comprise a temperature controlled thermal treatment chamber621that is maintained at a selected temperature. For example, a thermal wall heating element683can be coupled to a thermal wall temperature control unit681, and the thermal wall heating element683can be configured to couple to the thermal treatment chamber621. The heating element683can, for example, comprise a resistive heater element such as a tungsten, nickel-chromium alloy, aluminum-iron alloy, aluminum nitride, etc., filament. Examples of commercially available materials to fabricate resistive heating elements include Kanthal, Nikrothal, Akrothal, which are registered trademark names for metal alloys produced by Kanthal Corporation of Bethel, Conn. The Kanthal family includes ferritic alloys (FeCrAI) and the Nikrothal family includes austenitic alloys (NiCr, NiCrFe).

When an electrical current flows through the filament, power is dissipated as heat, and, therefore, the thermal wall temperature control unit681can, for example, comprise a controllable DC power supply. For example, thermal wall heating element683can comprise at least one Firerod cartridge heater commercially available from Watlow (1310 Kingsland Dr., Batavia, Ill., 60510). Alternatively, or in addition, cooling elements may be employed in thermal treatment chamber621. The temperature of the thermal treatment chamber621can be monitored using a temperature-sensing device such as a thermocouple (e.g. a K-type thermocouple, Pt sensor, etc.). Furthermore, a controller can utilize the temperature measurement as feedback to the thermal wall temperature control unit681in order to control the temperature of the thermal treatment chamber621.

In addition, thermal treatment system620can further comprise an upper assembly684. The upper assembly684can, for example, comprise a gas injection system for introducing a purge gas, process gas, or cleaning gas to the thermal treatment chamber621. Alternately, the thermal treatment chamber621can comprise a gas injection system separate from the upper assembly. For example, a purge gas, process gas, or cleaning gas can be introduced to the thermal treatment chamber621through a side-wall thereof.

In an alternate embodiment, the upper assembly684can comprise a radiant heater such as an array of tungsten halogen lamps for heating the substrate642″ positioned on the substrate lifter assembly690. The thermal treatment system620can further comprise a temperature controlled upper assembly684that can be maintained at a selected temperature. For example, the upper assembly684can comprise a heating element. The temperature of the upper assembly684can be monitored using a temperature-sensing device. Furthermore, a controller can utilize the temperature measurement as feedback to control the temperature of the upper assembly684. The upper assembly684may additionally or alternatively include a cooling element.

Referring again toFIG. 6, the thermal treatment system620can further comprise a substrate lifter assembly690. The substrate lifter assembly690can be configured to lower a substrate642′ to an upper surface of the substrate holder670, as well as raise a substrate642″ from an upper surface of the substrate holder670to a holding plane, or a transfer plane therebetween. At the transfer plane, the substrate642″ can be exchanged with a transfer system utilized to transfer substrates into and out of the chemical and thermal treatment chambers611,621. At the holding plane, the substrate642″ can be cooled while another substrate is exchanged between the transfer system and the chemical and thermal treatment chambers611,621.

The thermal treatment system620further comprises a vacuum pumping system680. The vacuum pumping system680can, for example, comprise a vacuum pump, and a throttle valve such as a gate valve or butterfly valve. The vacuum pump can, for example, include a turbo-molecular vacuum pump (TMP) capable of a pumping speed up to 5000 liters per second (and greater). TMPs are useful for low pressure processing, typically less than 50 mTorr. For high pressure processing (i.e., greater than 100 mTorr), a mechanical booster pump and dry roughing pump can be used.

In addition, a gate valve assembly696can be utilized to vertically translate a gate valve in order to open and close the common opening694. The gate valve assembly696can vacuum seal the common opening694.

In one embodiment, the processing system600can comprise a chemical oxide removal (COR) system610for trimming oxidized features of a TERA layer. The processing system600comprises the chemical treatment system610for chemically treating exposed surfaces of features on a TERA layer, such as oxidized surfaces, whereby adsorption of the process chemistry on the exposed surfaces of the features on a TERA layer affects chemical alteration of the exposed surfaces. Additionally, the processing system600comprises the thermal treatment system620for thermally treating the substrate, whereby the substrate temperature is elevated in order to desorb (or evaporate) the chemically altered exposed surfaces of the features on a TERA layer.

An exemplary COR process can comprise a number of process steps. For example, the substrate642can be transferred into the chemical treatment system610using the substrate transfer system. The substrate642can be received by lift pins that are housed within the substrate holder640, and the substrate642is lowered to the substrate holder640. Thereafter, the substrate642can be secured to the substrate holder660using a clamping system, such as an electrostatic clamping system, and a heat transfer gas can be supplied to the backside of the substrate642.

Next, one or more chemical processing parameters for chemical treatment of the substrate642can be established. For example, the one or more chemical processing parameters comprise a chemical treatment processing pressure, a chemical treatment wall temperature, a chemical treatment substrate holder temperature, a chemical treatment substrate temperature, a chemical treatment gas distribution system temperature, or a chemical treatment gas flow rate, or a combination of two or more thereof. Then, the substrate642can be chemically treated for a first period of time. The first period of time can range from 10 to 480 seconds, for example.

Next, the substrate642can be transferred from the chemical treatment chamber611to the thermal treatment chamber621. During which time, the substrate clamp can be removed, and the flow of heat transfer gas to the backside of the substrate642can be terminated. The substrate642can be vertically lifted from the substrate holder640to the transfer plane using the lift pin assembly housed within the substrate holder640. The transfer system can receive the substrate642from the lift pins and can position the substrate642within the thermal treatment system620. Therein, the substrate lifter assembly690receives the substrate641′,642″ from the transfer system, and lowers the substrate642′ to the substrate holder670

FIG. 7illustrates a simplified block diagram of a processing subsystem700in accordance with an embodiment of the invention. In the illustrated embodiment, the processing subsystem700for performing a number of processes, such as etching, ashing, cleaning, and oxidizing, is presented. In the illustrated embodiment, the processing subsystem700can comprise a processing chamber710, an upper assembly720, a gas supply system750, a shower plate assembly756, a substrate holder730for supporting a substrate705, a pressure control system780, and a controller790.

In one embodiment, the processing subsystem700can comprise the pressure control system780that can be coupled to the processing chamber710. For example, the pressure control system780can comprise a throttle valve (not shown) and a turbomolecular pump (TMP) (not shown) and can provide a controlled pressure in the processing chamber710. In alternate embodiments, the pressure control system700can comprise a dry pump. For example, the chamber pressure can range from approximately 0.1 mTorr to approximately 100 mTorr. Alternatively, the chamber pressure can range from approximately 0.1 mTorr to approximately 20 mTorr.

The processing chamber710can facilitate the formation of plasma in a process space702. The processing subsystem700can be configured to process substrates of any size, such as 200 mm substrates, 300 mm substrates, or larger substrates. Alternately, the processing subsystem700can operate by generating plasma in one or more processing chambers.

The processing subsystem700can comprise a shower plate758coupled to gas distribution system components756and752. For example, the gas distribution system component752can be coupled to a gas distribution system750. the shower plate758can comprise quartz and can be mounted opposite the substrate holder730. the shower plate758can comprise one or more distribution regions (not shown). A shield ring744can be used to couple the shower plate758to the gas distribution system component756. Ceramic insulators740,742, and746can be used to couple the gas distribution system component756and the shower plate758to the processing chamber710.

The gas distribution system750can provide process gas to the gas distribution system components756,752and to the shower plate758. The gas chemistries and flow rates can be individually controlled.

The processing subsystem700can comprise an upper electrode725that can be coupled to the gas distribution system components756,752, to the shower plate758and to the processing chamber710. The upper electrode725can comprise temperature control elements (not shown). The upper electrode725can be coupled to a first RF source770using a first match network772. Alternately, a separate match network772is not required.

The first RF source770can provide a TRF signal to the upper electrode, and the first RF source770can operate in a frequency range from approximately 0.1 MHz. to approximately 200 MHz. The TRF signal can be in the frequency range from approximately 1 MHz. to approximately 100 MHz. or alternatively in the frequency range from approximately 10 MHz. to approximately 100 MHz. The first RF source790can operate in a power range from approximately 0 watts to approximately 10000 watts, or alternatively the first RF source770can operate in a power range from approximately 0 watts to approximately 5000 watts.

The upper electrode725and the first RF source770can be parts of a capacitively coupled plasma source. The capacitively couple plasma source may be replaced with or augmented by other types of plasma sources, such as an inductively coupled plasma (ICP) source, a transformer-coupled plasma (TCP) source, a microwave powered plasma source, an electron cyclotron resonance (ECR) plasma source, a Helicon wave plasma source, and a surface wave plasma source. As is well known in the art, the upper electrode725may be eliminated or reconfigured in the various suitable plasma sources.

The substrate705can be, for example, transferred into and out of processing chamber710through a slot valve (not shown) and chamber feed-through (not shown) via robotic substrate transfer system (not shown), and it can be received by the substrate holder730. In an alternate embodiment, the processing chamber710can comprise a translation device (not shown), and when the substrate705is received from the substrate transfer system, the substrate705can be raised and/or lowered using a translation device (not shown) that can be coupled to the substrate holder730.

The substrate705can be affixed to the substrate holder730via an electrostatic clamping system764. For example, the electrostatic clamping system764can comprise an electrode and an ESC supply. Clamping voltages that can range from approximately −5000 V to approximately +5000 V, for example, can be provided to the clamping electrode. Alternatively, the clamping voltage can range from approximately −2500 V to approximately +2500 V. In alternate embodiments, an ESC system and supply may be omitted altogether.

The substrate holder730can comprise lift pins (not shown) for lowering and/or raising the substrate705to and/or from the surface of the substrate holder730. In alternate embodiments, different lifting means can be provided in the substrate holder730. In alternate embodiments, gas can, for example, be delivered to the backside of the substrate705via a backside gas system to improve the gas-gap thermal conductance between the substrate705and the substrate holder730.

A temperature control system can also be provided. Such a system can be utilized when temperature control of the substrate is required at elevated or reduced temperatures. For example, temperature control elements (not shown) can be included in the substrate holder730, the processing chamber710and/or the upper assembly720.

Also, an electrode768can be coupled to a second RF source775using a second match network777. Alternately, the match network777may be omitted altogether.

The second RF source775can provide a bottom RF signal (BRF) to the lower electrode768, and the second RF source775can operate in a frequency range from approximately 0.1 MHz. to approximately 200 MHz. The BRF signal can be in the frequency range from approximately 0.2 MHz. to approximately 30 MHz. or alternatively, in the frequency range from approximately 0.3 MHz. to approximately 15 MHz. The second RF source775can operate in a power range from approximately 0.0 watts to approximately 2500 watts, or alternatively, the second RF source775can operate in a power range from approximately 0.0 watts to approximately 500 watts. In various embodiments, the lower electrode768may be not used, or may be the sole source of plasma within the chamber, or may augment any additional plasma source.

Additionally, the substrate holder730can further comprise a quartz focus ring762and quartz isolators760,766. Alternately, the focus ring762and/or quartz isolators760,766may be omitted altogether.

The processing chamber710can further comprise a chamber liner714and at least one protective element716. For example, the protective element716can comprise a ceramic material, and can be used to protect the substrate holder730and the wall. In an alternate embodiment, the protective element716may be omitted altogether.

In one embodiment, a gap can be established between the shower plate758and the substrate holder730using different wall heights for the processing chamber710. For example, a170mm gap can be established. In alternate embodiments, different gap sizes can be used. In other embodiments, a translation device (not shown) can be used to provide a variable gap, and the gap can remain fixed or the gap can be changed during a process.

In an alternate embodiment, the processing chamber710can, for example, further comprise a monitoring port (not shown). A monitoring port can, for example, permit optical monitoring of the process space702.

The processing subsystem700can also comprise the controller790. The controller790can be coupled to the processing chamber710, the gas supply system750, the first RF match772, the first RF source770, the second RF match787, the second RF source785, and the pressure control system780. The controller790can be configured to provide control data to these components and receive data such as process data from these components. For example, controller790can comprise a microprocessor, a memory, and a digital I/O port capable of generating control voltages sufficient to communicate and activate inputs to the processing system700as well as monitor outputs from the processing subsystem700.

Moreover, the controller790can exchange information with system components. Also, a program stored in the memory can be utilized to control the aforementioned components of the processing subsystem700according to a process recipe. In addition, controller790can be configured to analyze the process data, to compare the process data with target process data, and to use the comparison to change a process and/or control the deposition tool. Also, the controller790can be configured to analyze the process data, to compare the process data with historical process data, and to use the comparison to predict, prevent, and/or declare a fault. During the etching of a TERA layer, the substrate705can be placed on the substrate holder730in the processing chamber710. For example, the processing chamber710can be chosen based on the gap size between the upper electrode surface725and a surface of the substrate holder730. The gap can range from approximately 10 mm to approximately 200 mm, or alternatively, the gap can range from approximately 150 mm to approximately 190 mm. In alternate embodiments, the gap size can be different.

During a TERA layer etching process, a TRF signal can be provided to the upper electrode725using the first RF source770. For example, the first RF source770can operate in a frequency range from approximately 0.1 MHz. to approximately 200 MHz. Alternatively, the first RF source770can operate in a frequency range from approximately 1 MHz. to approximately 100 MHz., or the first RF source770can operate in a frequency range from approximately 20 MHz. to approximately 100 MHz. The first RF source770can operate in a power range from approximately 10 watts to approximately 10000 watts, or alternatively, the first RF source770can operate in a power range from approximately 10 watts to approximately 5000 watts

Also, when etching a TERA layer, a BRF signal can be provided to the lower electrode768using the second RF source775. For example, the second RF source775can operate in a frequency range from approximately 0.1 MHz. to approximately 200 MHz. Alternatively, the second RF source775can operate in a frequency range from approximately 0.2 MHz. to approximately 30 MHz, or the second RF source can operate in a frequency range from approximately 0.3 MHz. to approximately 15 MHz. The second RF source775can operate in a power range from approximately 0.0 watts to approximately 1000 watts, or alternatively, the second RF source775can operate in a power range from approximately 0.0 watts to approximately 500 watts. In an alternate embodiment, a BRF signal is not required.

In addition, a process gas can be provided to the processing chamber710using the shower plate758. For example, the process gas can comprise an oxygen-containing gas and an inert gas. For example, the oxygen-containing gas can comprise O2, CO, NO, N2O, or CO2, or a combination of two or more thereof, and the flow rate can range from approximately 0 sccm to approximately 10000 sccm. The inert gas can comprise argon, helium, or nitrogen, or a combination of two or more thereof, and the flow rate for the inert gas can range from approximately 0 sccm to approximately 10000 sccm.

Furthermore, the chamber pressure and substrate temperature can be controlled during the etching of the TERA layer. For example, the chamber pressure can range from approximately 0.1 mTorr to approximately 100.0 mTorr, and the substrate temperature can range from approximately 0° C. to approximately 500° C.

During the oxidation of the features of a TERA layer, the substrate can be placed on the substrate holder730in a processing chamber710. For example, the processing chamber710can be chosen based on the gap size between the upper electrode surface725and a surface of the substrate holder730. The gap can range from approximately 10 mm to approximately 200 mm, or alternatively, the gap can range from approximately 150 mm to approximately 190 mm. In alternate embodiments, the gap size can be selected from a wide variety of predetermined values.

During the oxidation of the features of a TERA layer, a TRF signal can be provided to the upper electrode725using the first RF source770. For example, the first RF source770can operate in a frequency range from approximately 0.1 MHz. to approximately 200 MHz. Alternatively, the first RF source770can operate in a frequency range from approximately 1 MHz. to approximately 100 MHz. or the first RF source770can operate in a frequency range from approximately 20 MHz. to approximately 100 MHz. The first RF source770can operate in a power range from approximately 10 watts to approximately 10000 watts, or alternatively, the first RF source770can operate in a power range from approximately 10 watts to approximately 5000 watts

Also, when oxidizing the features of a TERA layer, a BRF signal can be provided to the lower electrode768using the second RF source775. For example, the second RF source775can operate in a frequency range from approximately 0.1 MHz. to approximately 200 MHz. Alternatively, the second RF source775can operate in a frequency range from approximately 0.2 MHz. to approximately 30 MHz. or the second RF source can operate in a frequency range from approximately 0.3 MHz. to approximately 15 MHz. The second RF source775can operate in a power range from approximately 0.0 watts to approximately 1000 watts, or alternatively, the second RF source775can operate in a power range from approximately 0.0 watts to approximately 500 watts. In an alternate embodiment, a BRF signal is not required.

In addition, when oxidizing the features of a TERA layer, a process gas can be provided to the processing chamber710using the shower plate758. For example, the process gas can comprise an oxygen-containing gas and/or an inert gas. For example, the oxygen containing gas can comprise O2, CO, NO, N2O, or CO2, or a combination of two or more thereof, and the flow rate can range from approximately 0.0 sccm to approximately 10000 sccm. The inert gas can comprise argon, helium, or nitrogen, or a combination of two or more thereof, and the flow rate for the inert gas can range from approximately 0 sccm to approximately 10000 sccm. Furthermore, the chamber pressure and substrate temperature can be controlled when oxidizing the features of a TERA layer. For example, the chamber pressure can range from approximately 0.1 mTorr to approximately 100.0 Torr, and the substrate temperature can range from approximately 0° C. to approximately 500° C.

Although only certain embodiments of this invention have been described in detail above, those skilled in the art will readily appreciate that many modifications are possible in the embodiments without materially departing from the novel teachings and advantages of this invention. Accordingly, all such modifications are intended to be included within the scope of this invention.

Thus, the description is not intended to limit the invention and the configuration, operation, and behavior of the present invention has been described with the understanding that modifications and variations of the embodiments are possible, given the level of detail present herein. Accordingly, the preceding detailed description is not meant or intended to, in any way, limit the invention—rather the scope of the invention is defined by the appended claims. Moreover, where list are provided herein, those lists are intended to be exemplary only. Being open-ended, the list is not meant to limit the scope of the invention solely to the specific embodiments enumerated. To the contrary, as should be appreciated by those skilled in the art, further components, stages, arrangements, etc. may be easily added or substituted without departing from the intended scope of the invention.