Lead frame and method for stacking discrete components to be embedded in semiconductor device

A method of stacking discrete components to be embedded in a semiconductor device comprises providing a lead frame defining a plurality of strips arranged end-to-end lengthwise with a gap between each pair of adjacent strips, a rail extending parallel to the strips, and a plurality of segments respectively connecting the strips to the rail, placing a plurality of discrete components on the lead frame, each of the discrete components having electrically isolated first and second terminals and being placed so as to bridge the gap between a pair of adjacent strips with the first and second terminals of the discrete component being respectively on one of the pair of adjacent strips and the other of the pair of adjacent strips, removing the rail from the lead frame, and folding the lead frame between the discrete components so as to bring the discrete components into a stacked configuration.

CROSS-REFERENCE TO RELATED APPLICATIONS

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BACKGROUND

Stacking of capacitors and other passive devices advantageously reduces the area taken up by the devices on a printed circuit board (PCB) or within a substrate such as a package substrate or interposer of a semiconductor device. In the case of stacked capacitors, the smaller footprint may allow for increased capacitance nearer to the integrated circuit, for example, resulting in shorter conduction paths and reduced equivalent series resistance (ESR) to enable the capacitors to access higher frequencies. Unfortunately, existing processes for stacking individual discrete capacitors and other components are not readily scalable, reducing manufacturing throughput and limiting the cost effectiveness of the benefits that might otherwise be provided.

BRIEF SUMMARY

The present disclosure contemplates various devices and methods for overcoming drawbacks accompanying the related art. One aspect of the embodiments of the present disclosure is a method of stacking discrete components which may thereafter be embedded in a semiconductor device. The method may comprise providing a lead frame defining a plurality of strips arranged end-to-end lengthwise with a gap between each pair of adjacent strips, a first rail extending parallel to the plurality of strips, and a first plurality of segments respectively connecting the plurality of strips to the first rail. The method may further comprise placing a plurality of discrete components on the lead frame, each of the discrete components having electrically isolated first and second terminals and being placed so as to bridge the gap between a pair of adjacent strips with the first and second terminals of the discrete component being respectively on one of the pair of adjacent strips and the other of the pair of adjacent strips. The method may further comprise removing the first rail from the lead frame and folding the lead frame between the discrete components so as to bring the discrete components into a stacked configuration.

The lead frame may define a second rail extending parallel to the plurality of strips on an opposite side of the plurality of strips from the first rail and a second plurality of segments respectively connecting the plurality of strips to the second rail. The method may comprise removing the second rail from the lead frame. The folding may comprise performing a first fold so that a front side of a first of the plurality of discrete components faces a front side of a second of the plurality of discrete components. The folding may comprise performing a second fold in an opposite direction relative to the first fold so that a back side of a third of the plurality of discrete components faces a back side of the second of the plurality of discrete components.

The method may comprise placing the stacked configuration of discrete components in a cavity defined in a substrate such as a package substrate or an interposer of a semiconductor device. The method may comprise filling the cavity with a polymer. The polymer may encapsulate exposed first portions of the strips that are electrically connected to the first terminals of the discrete components and exposed second portions of the strips that are electrically connected to the second terminals of the discrete components. The polymer may be an epoxy resin. The method may comprise forming a via through the encapsulated first portions of the strips that are electrically connected to the first terminals of the discrete components. The method may comprise forming a via through the encapsulated second portions of the strips that are electrically connected to the second terminals of the discrete components.

The method may comprise, after the folding, connecting together exposed first portions of the strips that are electrically connected to the first terminals of the discrete components. The method may comprise, after said folding, connecting together exposed second portions of the strips that are electrically connected to the second terminals of the discrete components. The method may comprise deforming the connected together first portions to produce one or more first outer terminals electrically connected to the first terminals of the discrete components. The method may comprise deforming the connected together second portions to produce one or more second outer terminals electrically connected to the second terminals of the discrete components. The method may comprise encapsulating the stacked configuration of discrete components. The encapsulating may be performed while the stacked configuration is on a carrier. The one or more first outer terminals may include at least two first outer terminals. The method may comprise positioning a first of the at least two first outer terminals on a front side of the encapsulated stacked configuration of discrete components. The method may comprise positioning a second of the at least two first outer terminals on a back side of the encapsulated stacked configuration of discrete components opposite the front side. The one or more second outer terminals may include at least two second outer terminals. The method may comprise positioning a first of the at least two second outer terminals on a front side of the encapsulated stacked configuration of discrete components. The method may comprise positioning a second of the at least two second outer terminals on a back side of the encapsulated stacked configuration of discrete components opposite the front side.

The plurality of discrete components may be capacitors. The first and second terminals may be respective electrodes of each capacitor.

Another aspect of the embodiments of the present disclosure is a method of stacking discrete components to be embedded in a semiconductor device. The method may comprise providing a lead frame and providing a first discrete component having a front side and a back side opposite the front side, the back side of the first discrete component defining electrically isolated first and second terminals of the first discrete component and being attached to the lead frame with the first and second terminals being attached respectively to electrically isolated portions of the lead frame. The method may further comprise providing a second discrete component having a front side and a back side opposite the front side, the second discrete component being stacked on the first discrete component such that the front side of the second discrete component faces the front side of the first discrete component, the back side of the second discrete component defining electrically isolated first and second terminals of the second discrete component and being attached to the lead frame with the first and second terminals being attached respectively to electrically isolated portions of the lead frame. The method may further comprise providing a third discrete component having a front side and a back side opposite the front side, the third discrete component being stacked on the second discrete component such that the back side of the third discrete component faces the back side of the second discrete component, the back side of the third discrete component defining electrically isolated first and second terminals of the third discrete component and being attached to the lead frame with the first and second terminals being attached respectively to electrically isolated portions of the lead frame. The method may further comprise encapsulating the first, second, and third discrete components and at least a portion of the lead frame.

Another aspect of the embodiments of the present disclosure is a device. The device may comprise a lead frame and a first discrete component having a front side and a back side opposite the front side, the back side of the first discrete component defining electrically isolated first and second terminals of the first discrete component and being attached to the lead frame with the first and second terminals being attached respectively to electrically isolated portions of the lead frame. The device may further comprise a second discrete component having a front side and a back side opposite the front side, the second discrete component being stacked on the first discrete component such that the front side of the second discrete component faces the front side of the first discrete component, the back side of the second discrete component defining electrically isolated first and second terminals of the second discrete component and being attached to the lead frame with the first and second terminals being attached respectively to electrically isolated portions of the lead frame. The device may further comprise a third discrete component having a front side and a back side opposite the front side, the third discrete component being stacked on the second discrete component such that the back side of the third discrete component faces the back side of the second discrete component, the back side of the third discrete component defining electrically isolated first and second terminals of the third discrete component and being attached to the lead frame with the first and second terminals being attached respectively to electrically isolated portions of the lead frame.

The first terminals of the first, second, and third discrete components may be attached to respective portions of the lead frame that are electrically connected to each other. The second terminals of the first, second, and third discrete components may likewise be attached to respective portions of the lead frame that are electrically connected to each other.

DETAILED DESCRIPTION

The present disclosure encompasses various embodiments of methods of stacking discrete components to be embedded in a semiconductor device or surface mounted, along with lead frames used therewith and resulting devices. The detailed description set forth below in connection with the appended drawings is intended as a description of several currently contemplated embodiments and is not intended to represent the only form in which the disclosed subject matter may be developed or utilized. The description sets forth the functions and features in connection with the illustrated embodiments. It is to be understood, however, that the same or equivalent functions may be accomplished by different embodiments that are also intended to be encompassed within the scope of the present disclosure. It is further understood that the use of relational terms such as first and second and the like are used solely to distinguish one from another entity without necessarily requiring or implying any actual such relationship or order between such entities.

FIG.1is a top view of a lead frame100for stacking discrete components200(seeFIG.2) according to an embodiment of the present disclosure. The lead frame100may comprise a conductive frame made of a single sheet of metal (e.g., copper), which may be designed to be folded over itself to bring the components200placed thereon into a stacked configuration. To this end, as shown inFIG.1, the lead frame100may define a plurality of strips110arranged end-to-end lengthwise in a first direction (horizontal inFIG.1) with a gap120between each pair of adjacent strips110(e.g., in the manner of a dashed line). In another sense, the strips110may be disposed sequentially in the first direction with each strip110being longitudinally aligned with the others. To support the strips110, the lead frame100may further define a first rail130aextending parallel to the plurality of strips110and a first plurality of segments140arespectively connecting the plurality of strips110to the first rail130a. Additional support may be provided by a second rail130bextending parallel to the plurality of strips110on an opposite side of the plurality of strips110from the first rail130aand a second plurality of segments140brespectively connecting the plurality of strips110to the second rail130b. The first and/or second segments140a,140bmay extend perpendicular to the arrangement direction of the strips110as shown (i.e., vertical inFIG.1) and may extend from a midpoint of each strip110. The lead frame100including the strips110, first and/or second rail(s)130a,130b, and connecting segment(s)140a,140bmay continue in the first direction indefinitely and may be unwound from a spool in the manner of a tape reel to provide for stacking of an arbitrary number of components200as described herein.

A method of stacking discrete components200may begin with placing a plurality of discrete components200on the lead frame100. (Prior to or during the placement of the discrete components200, the lead frame100may be unwound from a spool to reveal the necessary strips110for accommodating the contemplated number of discrete components200to be stacked.) Each discrete component200may have electrically isolated first and second terminals210,220, which may be separated by a dielectric230. For example, in a case where the discrete components200are capacitors, the first and second terminals210,220may be respective cathode and anode terminals (designated “C” and “A” inFIG.2). Each discrete component200may be placed so as to bridge the gap120between a pair of adjacent strips110, with the first and second terminals210,220thereof being respectively on one of the pair of adjacent strips110and the other of the pair of adjacent strips110. As shown inFIGS.1and2, for example, a conductive adhesive150(e.g., an ink or paste) may be provided at the ends of each strip110, and the first terminal210(e.g., cathode terminal C) of the discrete component200may be adhered to the end of a first strip110by the conductive adhesive150while the second terminal220(e.g., anode terminal A) is adhered to the end of a second strip110by the conductive adhesive150. The dielectric230that electrically isolates the first and second terminals210,220within the discrete component200may be aligned with the gap120. In order to effectuate electrical connection between like terminals (e.g., cathode to cathode or anode to anode) in the final stack, the discrete components200may be placed alternatingly as shown inFIG.2so that a first discrete component200is arranged first terminal210(“C”) then second terminal220(“A”), a second discrete component200is arranged second terminal220(“A”) then first terminal210(“C”), a third discrete component200is arranged first terminal210(“C”) then second terminal220(“A”), and so on, with each conductive strip110connecting either the first terminals210(“C”) of two discrete components200or the second terminals220(“A”) of two discrete components200.

After placement of the discrete components200, the first rail130amay be removed from the lead frame100(e.g., discarded or recycled), along with the second rail130bif included. For example, as depicted with the dashed lines inFIG.2, the segments140a,140bthat connect the strips110to the rails130a,130bmay be severed, resulting in the singulated lead frame100shown inFIG.3. In particular, because of the gaps120separating the strips110(not visible inFIG.3because they are underneath the dielectric230of each discrete component200), the removal of the rails130a,130belectrically isolates the first terminals210(“C”) from the second terminals220(“A”). After this (or, alternatively, prior to removal of the rails130a,130b), the lead frame100may then be folded between the discrete components200so as to bring the discrete components200into a stacked configuration.

An exemplary folding scheme is illustrated inFIGS.3and4, in which the portions of the strips110between the discrete components200are alternatingly folded and reverse (“serpentine”) folded to achieve the stacked configuration. Folding may be performed manually or by a folding or bending machine. For purposes of illustration, five discrete components200are shown, numbered200-1,200-2,200-3,200-4, and200-5. Folding each strip110where indicated inFIG.3may result in the stacked configuration shown inFIG.4. For example, the folding may comprise performing a first fold so that a front side201of the first discrete component200-1faces a front side201of the second discrete component200-2. In particular, the strip110between the first discrete component200-1and the second discrete component200-2may be folded to bring the second discrete component200-2upward and then down again facing the first discrete component200-1. The folding may further comprise performing a second fold in an opposite direction relative to the first fold so that a back side202of the third discrete component200-3faces a back side202of the second discrete component200-2. As shown, for example, the strip110between the second discrete component200-2and the third discrete component200-3may be reverse folded to bring the third discrete component200-3upward and then down again with its back side202facing the back side202of the second discrete component200-2. The folding may continue in this way to bring an arbitrary number of discrete components200into a stacked configuration as exemplified inFIG.4. In particular, the disclosed subject matter may enable efficient stacking of any number of capacitors at low cost, with the resulting capacitive stacks advantageously increasing capacitance density and reducing equivalent series resistance (ESR).

As described in more detail below, the folding processes described herein may result in there being one or more exposed first portions112of the strips110that are electrically connected to the first terminals210of the discrete components200as shown inFIG.4, as well as one or more exposed second portions114of the strips110that are electrically connected to the second terminals220of the discrete components200. The length of the exposed portions112,114(or leads) may be determined from the length of each strip110in the lead frame100(as well as the size of each discrete component200relative to the length of the strip110) and may be set as desired.

FIG.5shows a device made by embedding the lead frame100and stacked discrete components200in a substrate300, which may be a PCB or a package substrate or interposer of a semiconductor device, for example, or other chiplet enabling technologies for semiconductor device applications. Referring toFIGS.6and7, the process may begin with placing the stacked configuration of discrete components200(e.g., as shown inFIG.5) in a cavity310defined in the substrate300. The cavity310may be pre-formed in the substrate300by laser ablation or etching, for example. The stacked configuration of discrete components200may be placed in the illustrated orientation so that the stacking direction is aligned with the normal direction of the substrate300. In this way, the exposed portions112,114of the lead frame100may extend laterally from the stack and may both be accessible from above. The process may continue with filling the cavity310with a polymer320as shown inFIG.7. The polymer320, which may be an epoxy resin, for example, may encapsulate the exposed first portions112of the strips110that are electrically connected to the first terminals210of the discrete components200as well as the exposed second portions114of the strips110that are electrically connected to the second terminals220of the discrete components200.

Referring toFIG.8, the cavity310containing the stack of discrete components200and the polymer320may then be covered by applying dielectric or laminate to build the substrate300above and over the embedded stack. The process may then continue with forming one or more vias330,340to enable access to the stack of discrete components200from outside the substrate300. In particular, a first via330may be drilled or otherwise formed through the encapsulated first portions112of the strips110that are electrically connected to the first terminals210of the discrete components200, and a second via340may be formed through the encapsulated second portions114of the strips110that are electrically connected to the second terminals220of the discrete components200. Referring toFIG.9and referring back to the side view ofFIG.5, the vias330,340may be filled with a conductive via fill350(e.g., copper) to form pillars/plating and final patterning to connect the terminals210,220of the discrete components200to an external circuit. As can be seen inFIG.5, each of the encapsulated first portions112of the strips110may be electrically connected together by the via fill350of the first via330, while each of the encapsulated second portions114of the strips110may likewise be electrically connected together by the via fill350of the second via340, with the resulting plating providing access (from above and/or below the substrate300) to the combined first terminals210(e.g., cathodes) of the discrete components200and to the combined second terminals220(e.g., anodes) of the discrete components200.

FIGS.10-12show process steps for manufacturing a surface mount device from the stack of discrete components200. As noted above and illustrated inFIG.4, there may be one or more exposed first portions112of the strips110that are electrically connected to the first terminals210of the discrete components200one or more exposed second portions114of the strips110that are electrically connected to the second terminals220of the discrete components200. By setting the length of the exposed portions112,114appropriately, the exposed portions112,114may be used to form outer terminals113,115(seeFIG.12) of a surface mount device.

Referring first toFIGS.10and11, after the folding process described above in relation toFIGS.3and4, the manufacturing process may proceed with connecting together the exposed first portions112of the strips110that are electrically connected to the first terminals210of the discrete components220and then deforming the connected together first portions112to produce one or more first outer terminals113. Likewise, the exposed second portions114of the strips110that are electrically connected to the second terminals220of the discrete components200may be connected together and deformed to produce one or more second outer terminals115. For example, the first portions112(and likewise the second portions114) may be pinched together and resistance welded, after which the resulting outer terminals113,115or leads may be extended downward and then straight out to the side (laterally) as shown inFIGS.10and11. Extending the leads downward and laterally in this way may allow for the stack to be placed in a raised position as shown, allowing for encapsulant to be filled beneath the stack. InFIGS.10and11, the stack is shown on a carrier400(though it is also contemplated that a carrier400may not be used) going through a molding machine, where the encapsulant360may be applied in a restricted area as shown by the dashed lines inFIG.10. InFIG.11, the encapsulant360has been applied, leaving exposed only the ends of the leads defining the outer terminals113,115. These exposed outer terminals113,115are electrically connected to the first and second terminals210,220, respectively, of the discrete components220as described above.

Referring toFIG.12, the exposed leads defining the outer terminals113,115may be bent from below the encapsulant360upward and around to the top of the encapsulant360. In this way, the one or more first outer terminals113may be positioned to define at least two first outer terminals, with one being on a front side361of the encapsulant360and another being on a bottom side362of the encapsulant360as shown. In the same way, the one or more second outer terminals115may be positioned to define at least two second outer terminals, with one being on a front side361of the encapsulant360and another being on a bottom side362of the encapsulant360as shown. In this way, the outer terminals113,115may provide access (from above and/or below the substrate encapsulant360) to the combined first terminals210(e.g., cathodes) of the discrete components200and to the combined second terminals220(e.g., anodes) of the discrete components200, with no drilling of vias being necessary. The resulting stack of discrete components200may be surface mounted to a PCB or may itself be embedded in an integrated passive device (IPD) such as a tile as described in Applicant's own U.S. patent application Ser. No. 18/408,914 (“the '914 application”), filed Jan. 10, 2024 and entitled “Embeddable Tiles Containing Passive Devices for Packaged Semiconductor Devices,” the entire contents of which is incorporated by reference herein. The thickness of the IPD may vary and may be increased as long as the leads defining the outer terminals113,115are long enough (which may be determined by length of the strips110of the lead frame100as described above).