Method of manufacturing a semiconductor device

A method of manufacturing a semiconductor device according to an embodiment includes bringing a pattern part for transfer formed on a template and a viscous material disposed on a material to be processed into contact with each other; and adjusting a distance between a surface of the material to be processed and a surface of the pattern part for transfer that faces the material to be processed so as to become a desired distance, in the contact situation of the pattern part for transfer and the viscous material.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is based upon and claims the benefit of priority from Japanese Patent Application No. 2009-176316, filed on Jul. 29, 2009, the entire contents of which are incorporated herein by reference.

FIELD

Embodiments described herein relate generally to a method of manufacturing a semiconductor device.

BACKGROUND

As a conventional technique, a fine processing device is known that uses an imprinting method including an original board in which a pattern composed of a plurality of concave portions is formed, a substrate to be transferred whose surface is coated with a resist, alignment marks formed in the original board and the substrate to be transferred for an alignment, an alignment measurement means for measuring the relative displacement between the original board and the substrate to be transferred based on the alignment marks, and an alignment scope for measuring a gap between the original board and the substrate to be transferred.

According to the fine processing device, the gap is measured by the alignment scope and the relative displacement is measured by the alignment measurement means before the alignment mark of the original board comes into contact with the resist, so that the resist and the like on the substrate to be transferred do not adhere to the alignment mark, and the alignment measurement can be achieved with a high degree of accuracy, and the superposition accuracy of the original board and the substrate to be transferred.

However, in the recent years, defects of the transfer pattern or the like due to no filling of the resist into the concave portion of the pattern or due to a failure of adhesion between the concave portion of the pattern and the resist has been known, and it is difficult to eliminate the defects only by carrying out the superposition with a high degree of accuracy, so that they have become problematic.

DETAILED DESCRIPTION

A method of manufacturing a semiconductor device according to an embodiment includes bringing a pattern part for transfer formed on a template and a viscous material disposed on a material to be processed into contact with each other; and adjusting a distance between a surface of the material to be processed and a surface of the pattern part for transfer that faces the material to be processed so as to become a desired distance, in the contact situation of the pattern part for transfer and the viscous material.

Hereinafter, an example of the method of manufacturing a semiconductor device will be explained. First, compositions of a processing device and a template used in an imprint process constituting the method of manufacturing a semiconductor are explained.

FIG. 1is an explanatory view schematically showing a processing device used in a first embodiment.FIG. 2is a function block diagram schematically showing a processing device used in the first embodiment. Further, a, b and c inFIG. 1respectively show a direction perpendicular to each other. In addition, the processing device1explained below is used for moving the template2in a direction of the semiconductor substrate3, but the processing device1can be used for moving the semiconductor substrate3in a direction of the template2or moving both of them.

As shown inFIG. 1, the processing device1has a structure that a base plate101and a top board103are combined with a supporting column102. An ab stage104is disposed on the base plate101, and a chuck105for fixing the semiconductor substrate3by an electrostatic adsorption, vacuum adsorption or the like is disposed on the ab stage104.

A plurality of actuators108for moving up and down an upper stage106by a plurality of guide bars107in a direction of the c axis are installed in the top board103. Upper end parts of the guide bars107are combined with a guide plate109. The ab stage104moves the chuck105in directions of the a axis and the b axis.

For example, a pressure sensor118is disposed on the top board103. The pressure sensor118is disposed, for example, between a convex portion (Non-illustration) of the guide bar107located in a direction almost parallel to the top board103and the top board103, measures a pressure generated between the two points and outputs the measured pressure as a pressure signal to a control part117described below. The control part117is formed so as to convert the pressure signal to a pressure generated between the template2and the resist material5. Further, the pressure sensor118is not limited to the above-mentioned example, if it can measure the pressure, it can be used regardless of an installation location, a type and the like.

A template chuck110for fixing the template2by an electrostatic adsorption, vacuum adsorption or the like is installed in the upper stage106. In addition, an irradiation part111for irradiating the resist material5formed on the semiconductor substrate3with an ultraviolet light via the upper stage106, the template chuck110and the template2is disposed in the lower surface of the top board103. An opening for allowing the ultraviolet light irradiated from the irradiation part111to pass through is formed in the upper stage106and the template chuck110.

In addition, the irradiation part111also emits a laser light6used for an optical alignment of the main pattern part20other than the ultraviolet light. The laser light6is, for example, a He laser light having a wavelength of 633 nm.

An actuator112is installed in the ab stage104and is able to move the ab stage104in directions of the a axis and the b axis at the time of optical between the template2and the semiconductor substrate3.

Further, a rear surface of the template2can be pushed to a side of semiconductor substrate3via a fluid (liquid or gas). Due to this, an influence of flatness in the rear surface of the template2can be reduced.

In addition, the processing device1includes measurement parts114,115for measuring a diffraction light of the laser light6reflected from a region that has a one-dimensional lattice shape and is formed by that a mark pattern part21of the template2and a substrate side mark pattern part30of the semiconductor substrate3are superposed. The measurement parts114,115output, for example, the incident diffraction light to a calculation part116as a first signal (I+1) and a second signal (I−1).

Further, as shown inFIG. 2, the processing device1includes the calculation part116, the control part117and a memory part119.

The calculation part116calculates a light intensityI described below based on the first signal (I+1) and the second signal (I−1) outputted from the measurement parts114,115, and outputs a light intensity signal based on the calculated light intensityI to the control part117.

The control part117controls the irradiation part111, the actuators108,112and the like based on a process information120stored in the memory part119so as to control the manufacturing process of the semiconductor device.

The memory part119, for example, includes a hard disk drive (HDD) and stores the process information120and a table121. The process information120is information such as processes relating to a method of manufacturing a semiconductor device, parameters used for each process and the like. The table121will be described later.

FIG. 3Ais an explanatory view schematically showing a contact surface of a template used in the first embodiment.FIG. 3Bis a cross-sectional view schematically showing an essential part of a semiconductor substrate and the template that are set to the processing device.FIG. 3Bshows cross-sections of the semiconductor substrate and the template taken along the line III-III inFIG. 3A.

As shown inFIGS. 3A and 3B, the template2roughly includes the contact surface22that is a side coming into contact with the resist material5, the main pattern part20that is formed on the contact surface22and forms a mask part after the resist material5is filled and hardened, and the mark pattern part21that is formed on the contact surface22and is used for an optical alignment of the mask part.

The template2is formed of, for example, a light transmissive material to ultraviolet light such as a quarts material.

The main pattern part20as a pattern part for transfer is used as, for example, a mold for forming a circuit pattern of a semiconductor element or the like and as shown inFIG. 3B, includes a plurality of concave portions200and a plurality of convex portions201.

For example, a plurality of the mark pattern parts21as a first pattern part for an optical alignment are formed around the main pattern part20in a different direction. The mark pattern part21forms a pattern that, for example, a plurality of lines are arranged at equal intervals by that a plurality of the concave portions210and a plurality of the convex portions211are arranged at equal intervals when viewed from a side of the contact surface22. In addition, with regard to the measurement of relative displacement between the template and the semiconductor substrate3, only the relative displacement in a direction parallel to a direction that the lines are arranged can be measured from single mark pattern part21, but the relative displacement in the directions of the a axis and the b axis can be measured by that the mark pattern part21having a different angle by 90 degrees in the direction that the lines are arranged is further arrange. Further, a pattern of the main pattern part20can be also used as a pattern for an optical alignment.

The semiconductor substrate3is formed, for example, a silicon based material, and a plurality of the substrate side mark pattern part30are formed thereon corresponding to the mark pattern part21of the template2. The substrate side mark pattern part30is formed, for example, so as to have a concave and convex portion having almost the same width and interval as the concave portion210and the convex portion211of the mark pattern part21.

The film to be processed4is formed of, for example, a silicon nitride, a silicon oxide, a metallic material or the like, and formed of a single film or a plurality of films. Further, a material to be processed is not limited to the film to be processed4, but the semiconductor substrate3can be also used.

The resist material5as the viscous material is, for example, an ultraviolet cure resist and is formed of an ultraviolet cure resin that is hardened by irradiation of ultraviolet. Further, the resist material5is not limited to the ultraviolet cure resist, but for example, a resist material that is hardened by that the hardening process is applied thereto in a state of being filled in the template2, such as a resist material that is hardened by that heat is applied thereto, a resist material that is hardened by that after an energy ray is applied thereto, heat is applied thereto can be also used.

Here, a gap z, a relative location difference d and a pitch P shown inFIG. 3Bwill be explained. The gap z is a distance between the surface of the film to be processed4and the surface of the mark pattern part21facing the film to be processed4, but is also a distance between the surface of the film to be processed4and the surface of the main pattern part20, since both distances from the surfaces of the main pattern part20and the mark pattern part21to the surface of the film to be processed4are equal to each other. The relative location difference d is an amount of relative displacement between the mark pattern part21of the template2and the substrate side mark pattern part30of the semiconductor substrate3. The pitch P is a distance between the concave portions210of the mark pattern part21.

FIG. 4is a table showing an example of a relationship between an evaluation value of defects of a transfer pattern and a gap and a pressure in the first embodiment. The evaluation value of defects of the transfer pattern means, for example, a number of the defects, a rate of the defects, an area ratio of the transfer pattern and the defects. The gap inFIG. 4means a distance between the surface of the main pattern part20and the surface of the film to be processed4.

With regard to the gap, for example, as shown inFIG. 4, there is a tendency that the smaller the gap is, the higher the evaluation value is, and the larger the gap is, the lower the evaluation value is. This is due to the fact that, for example, there is a tendency that the smaller the gap is, the more the resist material5can be tightly filled in the concave portion200of the main pattern part20, and the larger the gap is, the more the space is generated between the concave portion200and the resist material5so that defects are easily generated. In addition, for example, there is a tendency that the higher the pressure is, the more the resist material5can be tightly or adhesively filled in the concave portion200, and the smaller the pressure is, the more the space is generated and the less the adhesiveness becomes so that defects are easily generated. InFIG. 4, a circle mark (◯) shows that defects is small in the number and it is an optimal condition, a triangle mark (Δ) shows that defects is medium in the number and it is a suitable condition, and a cross mark (x) shows that defects is large in the number and it is an unsuitable condition.

The table121stores information about the gap and the pressure as shown inFIG. 4. Due to the table121, the control part117adjusts the gap z and the pressure based on combinations for reducing the defects of the transfer pattern. The control part117controls the actuator108and the like, for example, based on the values of the gap and the pressure for carrying out the combination of “gap is small” and “pressure is large” due to the table121, if the combination of “gap is small” and “pressure is large” can be carried out, the combination being capable of reducing the generation of the defects of the transfer pattern in the number. Each value of the table121is obtained by, for example, an experiment or a simulation.

Hereinafter, an example of a calculation method of the gap z as a desired distance will be explained. By measuring a diffraction light from a side of the film to be processed4due to the calculation method, the gap z can be easily measured. Further, for the calculation method, “A Dual Grating Alignment Method Insensitive to Mask-Wafer Gap Variation” by Norio Uchida, Yoriyuki Ishibashi, Ryoichi Hirano, Nobutaka Kikuiri and Mitsuo Tabata, Journal of the Japan Society of Precision Engineering, Vol. 54, No. 10, p123-128, 1988 has been referred to. Further, hereinafter, an explanation is carried out on the basis that both distances from the surfaces of the main pattern part20and the mark pattern part21to the surface of the film to be processed4are equal to each other, but a case that both distances are different from each other will be explained later.

First, in a system shown inFIG. 2, assuming that the laser light6(wavelength is λ) emitted from the irradiation part111enters perpendicularly to the template2, an n-dimensional light intensity Inof a diffraction light reflected from a region that is formed so as to have a one-dimensional lattice shape by that the mark pattern part21and the substrate side mark pattern part30are superposed can be represented as the following formula (1).
In=|AΣkΣjCj·Ck−j·Cn−kexp(−2πi{(k−j)X+(k2+j2)Z})|  (1)

Here, each variable number is as follows.

d: Relative location difference

Cjand Cn−k: Fourier coefficient in a side of the template2.

Ck−j: Fourier coefficient in a side of the semiconductor substrate3.

In addition, the following formulae (2) and (3) are used.
X=d/P(2)
Z=λz/2P2(3)

Next, for example, the following formula (4) is calculated from a first signal (I+1) based on a (+1)-dimensional diffraction light outputted from the measurement parts114,115and a second signal (I−1) based on a (−1)-dimensional diffraction light.
ΔI=I+1−I−1(4)

From the formula (4), a light intensity ΔI of a diffraction light can be calculated based on the following formulae considering only the terms whose diffraction order is zero-order and ±one-order.
ΔI∝1/π4(sin 6πZ+sin 10πZ)sin 2πX+4/π6sin 8πZ sin 4πX  (5)

FIG. 5is a graph showing a relationship between a relative displacement X and a light intensity ΔI in the first embodiment.FIG. 5shows, as an example, a relationship between X and ΔI in the case of assigning Z=0.2 to the above-mentioned formula (5). The formula (5) can be represented as the following formula (6), when a coefficient of sin 2πX is defined as α and a coefficient of sin 4πX is defined as β.
ΔI∝α sin 2πX+β sin 4πX  (6)

From the formula (6), it is understood that the light intensity ΔI has a maximum value when X=0.25. Then, X=0.25 is assigned to the formula (5) so that the formula (7) can be obtained.
ΔI∝2/π4sin 8πZ cos 2πZ  (7)

FIG. 6is a graph showing a relationship between Z and ΔI in a formula (7) in the first embodiment. As shown inFIG. 6, the light intensity ΔI has a maximum value when Z=0.06. For example, when each value of the gap z=15 nm, and wavelength of laser light=633 nm used in the method of manufacturing the semiconductor device by the processing device1is assigned to the formula (3), pitch P=280 nm is calculated. Namely, when pitch P=280 nm, the template2and the semiconductor substrate3are moved to a location of the relative location difference d=70 nm satisfying the relative dislocation X=0.25, so that the template2can be moved to a location of the gap z=15 nm. Further, for example, patterns having a plurality of pitches corresponding to a plurality of the gaps z are formed in the template2and the semiconductor substrate3, and the light intensity ΔI of each pattern is measured, so that a plurality of the gaps z can be measured.

Hereinafter, an example of a method of manufacturing a semiconductor device according to the embodiment will be explained.

FIGS. 7A to 7Fare cross-sectional views respectively showing an essential part of each step of a method of manufacturing a semiconductor device according to the first embodiment. Hereinafter, a He laser light having a wavelength of 633 nm is used as the laser light6and the pitch P is defined as 280 nm.

First, the resist material5having a shape of, for example, a droplet is disposed on the film to be processed4formed on the semiconductor substrate3fixed to the chuck105. The resist material5is disposed, for example, in a place corresponding to the main pattern part20on the film to be processed4so that each droplet is the same in quantity.

Next, the template2is fixed to the template chuck110of the processing device1so that the contact surface22in which the main pattern part20and the mark pattern part21of the template2are formed is located in a side of the XY stage104. Subsequently, the contact surface22and the semiconductor substrate3are arranged so as to face each other.

Next, as shown inFIG. 7A, the main pattern part20formed on the template2and the resist material5formed on the film to be processed4are brought into contact with each other.

In particular, the control part117determines a contact state of the template2and the resist material5based on a pressure signal outputted from the pressure sensor118while lowering the template2via the actuator108, and after determining as the contact state, it stops the template2being lowered. Subsequently, in order to move the semiconductor substrate3from a location of the light intensity ΔI=0 to a location of the relative location difference d=70 nm where X=0.25, first, the control part117moves the semiconductor substrate3in directions of the a axis and the b axis via the actuator112to a location of d=0. Sequentially, the control part117moves the semiconductor substrate3in directions of the a axis and the b axis via the actuator112from a location of X=0 to a location of the relative location difference d=70 nm where X=0.25. Further, an amount of the moving of the semiconductor substrate3can be calculated, for example, from an amount of displacement of the actuator112, or can be measured from an amount of the moving of the ab stage104with a laser interferometer. Further, in the above, the semiconductor substrate3is moved, but the template2or both of them can be also moved.

Next, as shown inFIG. 7B, in the contact state of the main pattern part20and the resist material5, the gap z between the surface of the film to be processed4and the surface of the main pattern part20facing the film to be processed4is adjusted so that the gap z becomes a desired gap of Z=15 nm. The adjustment of the distance is carried out by irradiating a region that is formed by that the mark pattern part21formed in the template2and the substrate side mark pattern part30formed in a side of film to be processed4, namely on the semiconductor substrate3are superposed, with the laser light6via the upper stage106, the template chuck110and the template2, measuring a light intensity ΔI of a diffraction light emitted from the region, and using the measured light intensity as a basis of the adjustment.

In particular, the irradiation part111irradiates a region having a one-dimensional lattice shape formed by that the mark pattern part21and the substrate side mark pattern part30are superposed with the laser light6. Subsequently, the measurement parts114,115measures the diffraction light emitted from the region of the one-dimensional lattice shape by irradiation of the laser light6, and outputs the first and second signals to the calculation part116. Subsequently, the calculation part116calculates the light intensity ΔI based on the first and second signals from the above-mentioned formula (4), and based on the calculated light intensity ΔI, outputs a light intensity signal to the control part117. Subsequently, the control part117moves the template2to a location at which the light intensity ΔI becomes maximal via the actuator108in a direction of the c axis. At this time, the control part117moves the template2so that the light intensity ΔI becomes maximal while controlling the gap and the pressure based on the table121. After reaching a desired gap z, as shown inFIG. 7C, the resist material5is filled in the concave portion200of the main pattern part20.

At this time, a resist material film5ais formed between the template2and the semiconductor substrate3, and in the concave portion200by the filled resist material5.

Next, as shown inFIG. 7D, the laser light6is irradiated from the irradiation part111to the semiconductor substrate3via the upper stage106, the template chuck110and the template2, an alignment of the template2and the semiconductor substrate3is carried out.

In particular, for example, by irradiating the laser light6, interference stripes formed by the diffraction light emitted from the region of the one-dimensional lattice shape formed by that the mark pattern part21and the substrate side mark pattern part30are superposed is measured by the measurement parts114,115, the actuator112is driven and the ab stage114is moved so that the interference stripes are disposed at equal intervals, and the location of the semiconductor substrate3is adjusted. Further, the alignment of the template2and the semiconductor substrate3can be also carried out by moving the template2, and can be also carried out by adjusting the template2or the semiconductor substrate3based on inclining it or deforming it due to adding a pressure to it.

Next, as shown inFIG. 7E, after the alignment of the template2and the semiconductor substrate3is completed, an ultraviolet light7is irradiated from the irradiation part111to the resist material film5avia the upper stage106, the template chuck110and the template2.

Next, as shown inFIG. 7F, after the resist material film5ais hardened, the actuator108is driven and the upper stage106is moved up so that the resist pattern5bthat is a transfer pattern formed by that the main pattern part20formed in the template2is transferred is formed on the film to be processed4. When the imprint process is carried out based on the optimal gap z and pressure, the defects of the transfer pattern due to no filling of the resist material5into the concave portion200of the main pattern part20, an adhesion failure between the concave portion200and the resist material5, or the like can be prevented.

Subsequently, after the resist pattern5bis etched back so as to expose a part of the film to be processed4, a process of carrying out an etching by using the remaining resist pattern as a mask and the like are passed through, and a desired semiconductor device can be obtained.

FIG. 8is a cross-sectional view schematically showing an essential part of the template and the semiconductor substrate used in a second embodiment. The embodiment differs from the first embodiment in that the convex portions201,211of the main pattern part20and the mark pattern part21are formed so as to project form the contact surface22of the template2and heights of the convex portions201,211are different from each other. Hereinafter, with regard to elements having the same construction and function as those of the first embodiment, the same references as those of the first embodiment will be used, and detail explanation will be omitted.

A gap between the convex portion201of the main pattern part20and the surface of the film to be processed4is z1, and difference of length between the convex portion211of the mark pattern part21and the convex portion201of the main pattern part20is z2, so that the gap z between the convex portion211of the mark pattern part21and the surface of the film to be processed4is z1+z2. Consequently, in order that the light intensity ΔI becomes large when the template2is located so as to keep a desired gap, namely a gap z1between the convex portion201of the main pattern part20and the surface of the film to be processed4, z1+z2is assigned to the gap z of the above-mentioned formula (3) and the pitch P is calculated. The processing device1carries out the imprint process based on the calculated gap z and the like.

FIGS. 9A and 9Bare explanatory views schematically showing a region formed by that a mark pattern part and a substrate side mark pattern part are superposed in a third embodiment.FIG. 9Ashows a two-dimensional lattice pattern andFIG. 9Bshows a checker lattice pattern. The embodiment differs from the other embodiments in that the region of the lattice shape has the two-dimensional lattice pattern and the checker lattice pattern. Further, shaded parts inFIGS. 9A and 9Bshow shapes formed when the concave portions formed in the mark pattern part21and the substrate side mark pattern part30are superposed.

The processing device1in the embodiment has four measurement parts, for example, the four measurement parts are arranged at each corner of a square. The processing device1is able to carry out the alignment of the template2and the semiconductor substrate3by measuring a two-divisional dislocation instead of a one-dimensional dislocation due to the light intensity ΔI of the diffraction light from the two-dimensional lattice pattern and the checker lattice pattern.

The embodiment differs from the other embodiments in that the adjustment of the gap z includes adjusting a speed until the gap z between the main pattern part20and the resist material5that are in a contact situation becomes a desired distance.

Here, there is a tendency that the larger the speed is, the more the resist material5can be tightly and adhesively filled in the concave portion200of the main pattern part20, and the smaller the speed is, the more the space is generated and the adhesion lowered, so that defects are easily generated.

The control part117calculates the speed of the template2due to, for example, a driving amount and a driving time of the actuator108. The control part117obtains the optimal speed for reducing the defects due to, for example, an experiment or a simulation, and stores it in the table121. The control part117controls the imprint process based on, for example, the optimal speed, pressure and gap z. Further, it can be also adopted that a device for measuring a distance between the template2and the semiconductor substrate3is installed in the processing device1, and the speed is calculated from the measured distance and time. In addition, it can be also adopted that acceleration is calculated from the speed, the optimal acceleration for reducing the defects is calculated based on an experiment or a simulation, it is stored in the table121, and it is utilized at the time of the imprint process.

Further, in each of the above-mentioned embodiments, for example, the resist material5can be coated on the surface of the semiconductor substrate3in a thin film-like shape by using a spin coater or the like.

According to the above-explained embodiments, the defects of the transfer pattern in the imprint process can be prevented. In addition, the defects of the transfer pattern can be prevented, so that manufacturing cost of the semiconductor device can be reduced.

While certain embodiments have been described, these embodiments have been presented by way of example only, and not intended to limit the scope of inventions. Indeed, the novel methods described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the methods described herein may be made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such form or modifications as would fall within the scope and spirit of the inventions.