Multilevel semiconductor module and method for fabricating the same

A semiconductor module is formed by alternately stacking resin boards and sheet members. Each of the resin boards includes first buried conductors. A semiconductor chip is mounted on the upper face of each of the resin boards. Each of the sheet members having an opening for accommodating the semiconductor chip and including second buried conductors electrically connected to the first buried conductors. A first resin board located at the bottom is thicker than second resin boards. Each of the sheet members includes an adhesive member covering the upper and side faces of the semiconductor chip.

FIELD OF THE INVENTION

The present invention relates to three-dimensional multilevel semiconductor modules formed by alternately stacking sheet members and resin boards on which semiconductor chips are mounted and also relates to methods for fabricating the modules.

DESCRIPTION OF THE RELATED ART

With demands for size reduction and performance improvement of various electronic devices such as cellular phones and digital cameras, multilevel semiconductor modules formed by stacking and uniting a plurality of electronic components, especially semiconductor chips, have been proposed.

Methods for easily manufacturing such multilevel semiconductor modules at low cost have been proposed to date.

A conventional semiconductor module is formed by stacking, as one unit, a printed board on which a given circuit is formed, a semiconductor chip mounted on the printed board, and an interlayer member that has an opening capable of accommodating the semiconductor chip and includes a conductive bump capable of being connected to the circuit on the printed board. Such a conventional semiconductor module is fabricated by a method including the steps of: attaching protective films to both faces of an insulating base serving as an interlayer member; forming a through hole at a given position of the insulating base; filling the through hole with a conductive paste so as to form a conductive bump; peeling off the protective films; forming, in the insulating base, an opening capable of accommodating a semiconductor chip; and alternately stacking and bonding insulating bases and printed boards (see, for example, Japanese Unexamined Patent Publication No. 2002-64179).

With this method, a through hole is formed at a given position in an insulating base to both faces of which protective films are attached, the through hole is filled with a conductive paste, and then the protective films are peeled off, thereby forming conductive bumps protruding from the faces of the insulating base. Since the through hole penetrating the insulating base is filled with the conductive paste with this method, generation of a gap in a hole during the filling is avoided and connection reliability is enhanced, as compared to the case of using a via hole whose one open side is closed. In addition, electroplating that requires time and labor is unnecessary. Accordingly, a semiconductor module is easily fabricated at low cost.

Further, with miniaturization of electronic equipment such as IC cards and cellular phones, the density of semiconductor modules needs to be further increased and the thickness thereof needs to be further reduced. For this purpose, a semiconductor module having a stacked structure in which circuit boards on which semiconductor chips are mounted and interlayer members are alternately stacked and then are compressed with application of heat has been proposed (e.g., Japanese Unexamined Patent Publication No. 2003-218273). Specifically, circuit boards on which semiconductor chips have been mounted beforehand and interlayer members having openings capable of accommodating the semiconductor chips are alternately stacked with adhesive layers interposed therebetween, and then this stacked structure is compressed with application of heat. In this manner, the semiconductor chips are buried in the openings of the interlayer members so that electrical connection is established between the semiconductor chips through conductive posts formed on the interlayer members. With this method, the distance between the semiconductor chips is reduced, and failures caused by wiring resistance and inductance are reduced. As a result, electric signals are transmitted without delay and the density and function of the printed board are enhanced and the thickness thereof is reduced.

SUMMARY OF THE INVENTION

In recent years, techniques for reducing the thickness of semiconductor chips by polishing and techniques for mounting the thin semiconductor chips on boards with high yields have been developed, so that the number of levels of such stacked semiconductor chips has been further increasing. In addition, in a semiconductor memory, for example, as the memory capacity increases, the chip area increases. If a module is formed by stacking large semiconductor chips in multiple levels, the problem of a warp of the module arises. As the thickness of a printed board decreases, the degree of warp of the module increases. Accordingly, to stack printed boards on which semiconductor chips are mounted and interlayer members in multiple levels, it is important to suppress the occurrence of a warp.

On the other hand, to reduce the size and thickness of electronic devices, semiconductor chips and semiconductor modules are often packaged by, for example, a ball grid array (BGA) method in recent years. With such a packaging method, solder balls and bump electrodes formed to establish connection to a mother board cannot be so high. Accordingly, if a warp occurs at room temperature or is caused by heating during bonding, a semiconductor module cannot be mounted on the mother board or the warp causes a partial failure in packaging. That is, a semiconductor module can be defective in packaging though it is non-defective in its electric characteristics. A module formed principally of memories, a combination of a DRAM and an SRAM and a combination of a DRAM and a flash memory, for example, needs to be embedded and controlling semiconductor chips for controlling these memories also need to be mounted. Accordingly, it is required to suppress a warp occurring when semiconductor chips having different thicknesses and characteristics are stacked.

In addition, though size reduction and thickness reduction are required in a module because of its purpose, moisture resistance reliability as high as that in other types of semiconductor devices is also required. However, considering the structure formed by stacking circuit boards on which semiconductor chips are mounted, it is difficult to obtain high moisture resistance reliability enough to stand rigorous conditions, as compared to general semiconductor devices.

To solve the foregoing problems, the methods described above only provide structures in which boards on which semiconductor chips of the same shape are respectively mounted and include processes for forming the structures. However, no measures are taken to suppress a warp of a semiconductor module formed by stacking the boards and to enhance moisture resistance reliability of the semiconductor module.

It is therefore an object of the present invention to provide a multilevel semiconductor module in which occurrence of a warp is suppressed and a method for fabricating the module.

To solve the foregoing problems, a multilevel semiconductor module according to the present invention is formed by alternately stacking resin boards and sheet members. Each of the resin boards includes a first resin base and one or more first buried conductors penetrating the first resin base. A semiconductor chip is mounted on an upper face of each of the resin boards. Each of the sheet members includes a second resin base having an opening for accommodating the semiconductor chip and one or more second buried conductors penetrating the second resin base and electrically connected to the first buried conductors. The multilevel semiconductor module includes an adhesive member covering upper and side faces of the semiconductor chip. One of the resin boards located at the bottom has a thickness larger than that of each of the other resin board or boards. The upper and side faces of the semiconductor chip may be covered with either the adhesive member or a low-stress member which is softened at a temperature lower than that for the adhesive member and has a stiffness lower than that of the adhesive member.

In the multilevel semiconductor module of the present invention, the resin board at the bottom is thicker than the other resin boards, thereby suppressing occurrence of a warp of the entire multilevel semiconductor module. In addition, the exposed part of the semiconductor chip is covered with the adhesive member or a resin material having a low softening point and a low stiffness, so that water, moisture and corrosive gas, for example, causing corrosion of a wire material used for the semiconductor chips and the resin boards are blocked, thereby preventing occurrence of failures due to disconnection of wires.

A portion of the adhesive member located above the opening preferably has a thickness larger than the other portion. Then, the semiconductor chip is more securely covered and the number of components is reduced. The multilevel semiconductor module of this embodiment can be modified in various manners. For example, the diameter of some of the first and second buried members may be increased or a rigid plate may be attached to the module. In a structure in which the semiconductor chip is mounted with the back surface thereof facing the resin board, the semiconductor chip may be encapsulated with a resin.

A first method for fabricating a multilevel semiconductor module according to the present invention includes the steps of: (a) preparing one or more first resin boards, a second resin board and one or more sheet members, each of the first resin boards having an upper face on which a semiconductor chip is mounted and including one or more first buried conductors, the second resin board having an upper face on which a semiconductor chip is mounted, including one or more first buried conductors and having a thickness larger than that of each of the first resin boards, each of the sheet members including a resin base having an opening larger than the semiconductor chip when viewed from above, an adhesive member placed on at least one of upper and lower faces of the resin base and one or more second buried conductors penetrating the resin base; (b) placing the second resin board at the bottom and alternately stacking the sheet members and the first resin boards over the second resin board so that the semiconductor chip is housed in the opening; and (c) applying heat and pressure to the first and second resin boards and the sheet members stacked at the step (b) from the bottom and the top of the stacked structure so as to bond the first and second resin boards and the sheet members together, connect the first buried conductors and the second buried conductors to each other, and cause the adhesive member to flow so that the semiconductor chip is covered with the adhesive member.

With the method of the present invention, heat and pressure are applied with the adhesive member placed on at least one of the upper and lower faces of the second resin base at the step (b), so that an exposed part of the semiconductor chip is covered without an increase in the number of process steps, as compared to conventional methods. Accordingly, the present invention provides a multilevel semiconductor module having high resistance to entering of moisture, for example.

A second method for fabricating a multilevel semiconductor module according to the present invention includes the steps of: (a) preparing one or more first resin boards, a second resin board, one or more sheet members and one or more low-stress members, each of the first resin boards having an upper face on which a semiconductor chip is mounted and including one or more first buried conductors, the second resin board having an upper face on which a semiconductor chip is mounted, including one or more first buried conductors and having a thickness larger than that of each of the first resin boards, each of the sheet members including a resin base having an opening larger than the semiconductor chip when viewed from above, adhesive layers placed on upper and lower faces of the resin base in respective regions surrounding the opening when viewed from above and one or more second buried conductors penetrating the resin base, each of the low-stress members being made of a resin having a softening point lower than that of each of the adhesive layers and a stiffness lower than that of each of the adhesive layers, each of the low-stress members being smaller than the opening when viewed from above; (b) placing the second resin board at the bottom, alternately stacking the sheet members and the first resin boards over the second resin board so that the semiconductor chip is housed in the opening, and placing the low-stress members on associated ones of the semiconductor chips; and (c) applying heat and pressure to the first and second resin boards and the sheet members stacked at the step (b) from the bottom and the top to cause the low-stress members to flow so that the semiconductor chips are covered with the respective low-stress members, and (d) heating the first and second resin boards and the sheet members stacked at the step (b) from the bottom and the top to a temperature higher than a temperature at the step (c) with application of pressure, thereby bonding the first and second resin boards and the sheet members together and connecting the first buried conductors and the second buried conductors to each other.

With this method, the upper and side faces of the semiconductor chip are covered at the step (c) before the step (d) at which the components are united, thus ensuring covering of the semiconductor chip.

In the multilevel semiconductor module of the present invention, the resin board located at the bottom and connected to the external boards out of the stacked resin boards is thicker than the other boards, so that occurrence of a warp of the entire semiconductor module is suppressed. Accordingly, even if the number of terminals is increased, the module is coupled to a mother board with high reliability and functional enhancement and cost reduction of electronic equipment are effectively achieved. In addition, since the exposed parts of the semiconductor chips are covered with, for example, the adhesive members, moisture and corrosive gas, for example, are prevented from entering. Accordingly, failures are less likely to occur as compared to a conventional semiconductor module.

DETAILED DESCRIPTION OF THE INVENTION

Configuration of Semiconductor Module

FIG. 1is a perspective view schematically illustrating an overall configuration of a multilevel semiconductor module according to a first embodiment of the present invention.FIG. 2is a cross-sectional view of the multilevel semiconductor module of this embodiment taken along the line II-II inFIG. 1.FIG. 3Ais a plan view schematically illustrating the upper face of a resin board used in the multilevel semiconductor module of this embodiment.FIG. 3Bis a cross-sectional view of the resin board of this embodiment taken along the line IIIb-IIIb inFIG. 3A.FIG. 3Cis a plan view schematically illustrating the lower face of the resin board of this embodiment.FIGS. 4A and 4Bare a plan view illustrating an example of an adhesive member included in a sheet member used in the multilevel semiconductor module of this embodiment and a cross-sectional view illustrating an adhesive member taken along the line IVb-IVb, respectively.FIGS. 4C and 4Dare a plan view illustrating another example of the adhesive member of this embodiment and a cross-sectional view illustrating the adhesive member taken along the line IVd-IVd, respectively.FIGS. 5A and 5Bare a plan view illustrating a second resin base included in the sheet member of this embodiment and a cross-sectional view illustrating the second resin base taken along the line Vb-Vb, respectively. In these drawings, the thicknesses and lengths, for example, of components of the semiconductor module are selected so as to be easily shown, and therefore are different from those of actual components. The numbers and shapes of buried conductors and external connection terminals for external connection are different from those of actual conductors and terminals are selected to be easily shown in the drawings. The “upper face” and the “lower face” of each component are defined based on the vertical direction inFIGS. 1 and 2.

As illustrated inFIGS. 1 and 2, a semiconductor module1of this embodiment is formed by alternately stacking first resin boards3having upper faces on which semiconductor chips2are mounted and sheet members5. In the semiconductor module1, the resin board located at the bottom (i.e., a second resin board4) is thicker than the other resin boards and solder balls17serving as external connection terminals are provided on the lower face of the second resin board4. In the semiconductor module1, the first resin boards3, the second resin board4and the sheet members5are stacked and united by application of heat and pressure. In the example of this embodiment, the first resin boards3are stacked together with the sheet members5in the semiconductor module1. In the semiconductor module1of this embodiment, the upper faces (the back surfaces, i.e., the faces opposite to the principal surfaces) and the side faces of the respective semiconductor chips2are covered with first adhesive members151and second adhesive members152forming the sheet members5.

The configuration of the semiconductor module of this embodiment will be more specifically described.

As illustrated inFIGS. 3A through 3C, each of the first resin boards3includes: a first resin base (a first resin core)8; a plurality of semiconductor-device connecting terminals11formed on a center region of the upper face of the first resin base8, for example, and used for establishing connection to a semiconductor chip2; a plurality of first buried conductors7formed in an area of the first resin base8around the perimeter thereof and penetrating the first resin base8; a plurality of connection lands13provided on both faces of the first resin base8and around both ends of the respective first buried conductors7; and a plurality of wires12connecting predetermined ones of the semiconductor-device connecting terminals11to associated ones of the connection lands13and the first buried conductors7.

As a material for the first buried conductors7, a conductive resin material or a plated conductor is used. A base made of a thermosetting resin and a reinforcing material may be used as the first resin base (first resin core)8. As the thermosetting resin, at least one material selected from the group consisting of an epoxy resin, a polyimide resin, a polyphenylene ether resin, a phenol resin, a fluorocarbon resin and an isocyanate resin may be used. As the reinforcing material, a woven or nonwoven fabric made of glass fibers or a woven or nonwoven fabric made of aramid fibers, which are organic fibers, may be used.

The second resin board4has a structure similar to that of the first resin boards3as a whole, and includes: a first resin base8; semiconductor-device connecting terminals11; first buried conductors7; and connection lands13. However, the second resin board4is thicker than each of the first resin boards3and has a structure in which solder balls17are formed on the connection lands13, serving as external connection terminals for connection to a mother board, at given intervals on the lower face of the board. The semiconductor module1is coupled to the mother board using the solder balls17.

The semiconductor chips2are connected to the semiconductor-device connecting terminals11of the first resin boards3and the second resin board4through electrode bumps28provided on the principal surfaces thereof, and the peripheries of the semiconductor chips2are protected by a sealing resin24. The sealing resin24protects the principal surfaces (i.e., the lower faces inFIG. 1) of the semiconductor chips2against external environment and absorbs thermal distortion, for example. The “principal surface of a semiconductor chip” herein is a circuitry surface on which semiconductor devices, for example, are formed.

As illustrated inFIGS. 4A through 4DandFIGS. 5A and 5B, each of the sheet members5includes: a second resin base (a second resin core)16; a first adhesive member151formed on the upper face of the second resin base16; a second adhesive member152formed on the lower face of the second resin base16; and second buried conductors9provided at positions corresponding to the first buried conductors7of the first resin board3and made of a conductive resin material. An opening10capable of accommodating the semiconductor chip2is formed in a center region of the second resin base16. Accordingly, the planar size of the opening10is larger than that of the semiconductor chip2. Each of the first and second adhesive members151and152may be in the shape of a sheet having a uniform thickness as illustrated inFIGS. 4A and 4B. Alternatively, as illustrated inFIGS. 4C and 4D, a center portion of the first adhesive member151is thicker than the other portion and the second adhesive member152is in the shape of a sheet having a uniform thickness. This further ensures covering of the side face and upper face (i.e., the face opposite to the principal surface) of the semiconductor chip2during application of pressure and heat in stacking the sheet members5and the resin boards. In this case, the first adhesive member151is greatly deformed along the semiconductor chip2during application of heat and pressure. In view of this, the first adhesive member151is preferably in the shape of a sheet with a uniform thickness. It should be noted that the shapes of the first and second adhesive members151and152are not limited to this. A portion of the first adhesive member151not overlapping with the opening10when viewed from above bonds the second resin base16and the first resin base8together. A portion of the second adhesive member152not overlapping with the opening10when viewed from above connects either the second resin base16and the first resin base8forming the second resin board4or the second resin base16and the first resin base8forming the first resin board3to each other.

The semiconductor module1is characterized in that portions of the respective first and second adhesive members151and152overlapping with the opening10when viewed from above are fused together to cover the side face and upper face (i.e., the face opposite to the principal surface) of the semiconductor chip2.

The semiconductor chips2mounted on the upper faces of the first resin boards3and the second resin board4are placed in the respective openings10of the second resin bases16in the semiconductor module1. In each of the openings10, a gap between the semiconductor chip2and the second resin base16and a gap between the semiconductor chip2and the first resin board3located above are filled with the first adhesive member151and the second adhesive member152. As specifically described later, such a structure is formed by applying heat and pressure to the stack of the first resin boards3, the second resin board4and the sheet members5. Specifically, the openings10are filled with the first and second adhesive members151and152in the state of fluid due to heating.

The first and second adhesive members151and152may be made of a prepreg base obtained by impregnating a reinforcing material made of a glass woven fabric or an aramid nonwoven fabric with an epoxy resin or a thermoplastic resin that is dissolved and softened by applying pressure and heat. The thermoplastic resin may be an organic film, for example, and is exemplified by wholly aromatic polyester, a fluorocarbon resin, a polyphenylene oxide resin, a syndiotactic polystyrene resin, a polyimide resin, a polyamide resin, an aramid resin and a polyphenylene sulfide resin.

As illustrated inFIG. 5B, the second buried conductors9penetrate the second resin base16and having both ends project from the upper and lower faces of the second resin base16to a given height. The parts of the second buried conductors9projecting from the second resin base16are shown as projections310.

The second buried conductors9are semi-cured before stacking. The second buried conductors9are compressed and cured by application of pressure and heat after stacking, and establish electrical connection to the first buried conductors7in the first resin boards3and the second resin board4mainly by mechanical contact.

In the semiconductor module1of this embodiment, vias formed in the first resin boards3and the second resin board4are filled with the first buried conductors7. Alternatively, both of the first resin boards3and the second resin board4may be general build-up printed wiring boards. In this case, vias in the build-up printed wiring boards are formed by plating in the shape of recesses, so that the effect of joining the vias and the projections310of the second buried conductors9in the sheet members5together enhances reliability in obtaining electrical connection and alignment is easily performed.

The second resin bases16forming the sheet members5may be made of the same material as that for the first resin boards3and the second resin board4, i.e., may be made of a glass-epoxy resin or an aramid-epoxy resin, for example. Alternatively, the first resin boards3and the second resin board4may be made of different materials. For example, a glass-epoxy resin may be used for the first resin boards3and the second resin board4and an aramid-epoxy resin may be used for the sheet members5. The outer dimensions of the sheet members5are the same as those of the first resin boards3and the second resin board4in plan view. To bond the stack of the second resin bases16forming the sheet members5and the first resin boards3or the second resin board4together, the first and second adhesive members151and152made of a prepreg of an epoxy resin or an aramid-epoxy resin may be used. The outer dimensions thereof are the same as those of the resin boards in plan view.

An example of the shapes of main portions of components in the multilevel semiconductor module1of this embodiment will be hereinafter described.

The entire shape of the semiconductor module is, for example, a rectangular solid. The thickness of each of the semiconductor chips is preferably in the range from 30 μm to 150 μm, both inclusive. The thickness of each of the first resin boards3is in the range from 60 μm to 200 μm, both inclusive. Each of the first buried conductors7has a diameter ranging from 50 μm to 500 μm, both inclusive. The first buried conductors7are arranged at a pitch ranging from 100 μm to 750 μm, both inclusive. Using these ranges, the semiconductor module is appropriately designed.

The thickness of the second resin board4is in the range from 100 μm to 300 μm, both inclusive, and larger than that of at least each of the first resin boards3. The diameter and pitch of the first buried conductors7in the second resin board4are the same as those in the first resin boards3.

The thickness of each of the second resin bases16as a component of the sheet members5is in the range from 45 μm to 200 μm, both inclusive, and is larger than that of at least each of the semiconductor chips2. An adhesive layer having a thickness ranging from 10 μm to 100 μm, both inclusive, is provided on each face of the second resin bases16. The diameter and pitch of the second buried conductors9in each of the sheet members5are the same as those in the first resin boards3.

Each of the first and second adhesive members151and152forming the sheet members5is a prepreg of a resin such as a glass-epoxy resin or an aramid epoxy resin and has a thickness ranging from 15 μm to 150 μm, both inclusive.

Based on the design using the ranges described above, the multilevel semiconductor module1of this embodiment is fabricated.

—Effects and Advantages of Semiconductor Module—

In the configuration of the multilevel semiconductor module1of this embodiment described above, the second resin board4at the bottom is thicker than each of the first resin boards3, so that a warp is greatly suppressed even in the multilevel configuration. In addition, in the semiconductor module1of this embodiment, the side and upper faces of the semiconductor chips2are covered with the first and second adhesive members151and152, so that water, moisture and corrosive gas, for example, causing corrosion of a wire material are less likely to enter the openings10. Accordingly, occurrence of failures due to disconnection of wires is prevented. That is, moisture resistance of the semiconductor module1of this embodiment is higher than a conventional semiconductor module. Accordingly, failures are less likely to occur in mounting on a mother board using the solder balls17. As a result, even if the number of terminals is increased, a highly-reliable semiconductor module is implemented at low cost.

A necessary electrical inspection and a necessary burn-in test are performed on the first resin boards3and the second resin board4after mounting of the semiconductor chips2so that only non-defective boards are used. During stacking of the resin boards and the sheet members5, the second buried conductors9in the second resin bases16forming the sheet members5are compressed and cured with application of pressure and heat, so that electrical connection between the second buried conductors9and the first buried conductors7and the reduction of resistance of the second buried conductors9are achieved at the same time.

In addition, if the second resin bases16having a high stiffness and forming the sheet members5are made thicker than the semiconductor chips2, loads applied to the semiconductor chips2are reduced during fabrication, thus preventing failures from occurring in the semiconductor chips2themselves and in connection portions between the semiconductor chips2and the resin boards.

Semiconductor devices formed on the semiconductor chips2are not specifically limited. A structure in which semiconductor memories are formed on the semiconductor chips2mounted on the first resin boards3whereas a control semiconductor device for controlling the semiconductor memories is formed on the semiconductor chip2mounted on the second resin board4may be adopted.

Now, a method for fabricating a semiconductor module of this embodiment will be described with reference to the drawings.

First, a method for obtaining a semiconductor chip2having a given shape will be described.

FIGS. 6A through 6Care cross-sectional views illustrating an example of a method for forming a semiconductor chip to be mounted on the semiconductor module1of this embodiment.

As illustrated inFIG. 6A, electrode bumps28are formed by, for example, electroplating or stud bump bonding (SBB) on bonding pads on the principal surfaces of a plurality of semiconductor chips2in a semiconductor wafer30that has been subjected to a circuit formation process necessary for the semiconductor chips.

Then, as illustrated inFIG. 6B, the semiconductor wafer30is partially cut to the middle with a dicing saw or a laser from the principal surface along a separation zone located between the semiconductor chips2.

Thereafter, as illustrated inFIG. 6C, a back-surface portion of the semiconductor wafer30is removed by a method such as chemical etching, back-surface polishing, plasma etching or a method using these techniques so that the thickness of the semiconductor wafer is reduced to a thickness ranging from about 30 μm to about 150 μm, both inclusive, thereby separating the semiconductor chips2from each other.

Next, an example of a method for fabricating the first resin boards3and the second resin board4for mounting the semiconductor chips2thereon will be described with reference toFIG. 7A through 7D. Hereinafter, description will be given on one of the first resin boards3as an example. In the following example, a glass-epoxy resin is used as the first resin base8forming each of the first resin board3and copper foil19is used as the wires12and the connection lands13.FIGS. 7A through 7Dare cross-sectional views showing a method for forming a resin board for use in the semiconductor module of this embodiment.

As illustrated inFIG. 7A, a two-side copper-clad board18formed by covering both faces of the first resin base8with copper foil19is prepared. In the two-side copper-clad board18, the copper foil19having a thickness of one of 9 μm, 12 μm, 24 μm and 35 μm is appropriately bonded to each face of the first resin base8having a thickness of 70 μm, so that the total thickness of the two-side copper-clad board18is about 100 μm.

Then, as illustrated inFIG. 7B, the two-side copper-clad board18is irradiated with a laser focused on given positions, thereby forming through holes70. The through holes70may be formed with a drill.

Subsequently, as shown inFIG. 7C, photosensitive films20are attached to both faces of the two-side copper-clad board18and semiconductor-device connecting terminals11, connection lands13and wires12connecting the semiconductor-device connecting terminals11and the connection lands13to each other are formed on one face of the first resin base8. Connection lands13are also formed on the other face of the first resin base8. The pattern for these components is formed by photolithography and etching using the photosensitive films20. Thereafter, the photosensitive films20are peeled off from the both faces of the two-side copper-clad board18(not shown).

Thereafter, as illustrated inFIG. 7D, the through holes70are filled with, for example, a conductive paste. This conductive paste is cured with heat, thereby obtaining a first resin board3including first buried conductors7. The first resin boards3and the second resin board4are not necessarily formed by the method described above and may be formed by a method for forming a general two-side circuit board and by using general materials.

Next, a method for forming a second resin base16forming a sheet member5will be described with reference toFIGS. 8A through 8F.FIGS. 8A through 8Fare cross-sectional views showing a method for forming a sheet member for use in the semiconductor module of this embodiment.

First, as shown inFIG. 8A, a second resin base16thicker than a semiconductor chips2is prepared. A glass fabric epoxy resin, for example, is used as the second resin base16. If the thickness of the semiconductor chip2is 75 μm, the thickness of the second resin base16is about 100 μm.

Next, as shown inFIG. 8B, heat-resistance protective films205made of polyimide or PET (polyethylene terephthalate) resin, for example, and each having a thickness of about 15 μm are formed on the upper and lower faces of the second resin base16.

Thereafter, as illustrated inFIG. 8C, through holes90are formed in given portions of the second resin base16with a laser. Simultaneously with the formation of the through holes90, an opening10capable of accommodating the semiconductor chip2is formed with the laser in a center region of the second resin base16. Thereafter, the heat-resistance protective films205are peeled off from the upper and lower faces of the second resin base16.FIG. 8Cshows a process step up to the formation of the through holes90and the opening10.

Then, as illustrated inFIG. 8D, masking films21having holes at positions corresponding to the through holes90in the second resin base16are attached to both faces of the second resin base16, and then the through holes90are filled with a conductive paste by, for example, screen printing. The masking films21are used for forming projections310of the second buried conductors9.

Subsequently, as illustrated inFIG. 8E, the conductive paste filling the through holes90and the holes in the masking films21is heated with application of pressure to be semi-cured, and the filling density of the conductive paste is increased. In this manner, the conductive paste becomes electrically low-resistive.

Then, as shown inFIG. 8F, the masking films21are peeled off, thereby forming a second resin base16forming a sheet member5. The second buried conductors9made of the conductive paste are still semi-cured, so that the second buried conductors9have the property of being compressed and cured simultaneously upon application of pressure and heat.

Now, a method for forming a first adhesive member151for a sheet member5illustrated inFIGS. 4A and 4Bwill be described (not shown).

First, a liquid resin which is a main component of a thermosetting resin such as a glass-epoxy resin or an aramid-epoxy resin, a curing agent, an accelerator, an inorganic filler and a coupling agent, for example, are mixed in given amounts. Then, the mixture is sufficiently stirred with the temperature maintained in the range from 40° C. to 120° C., both inclusive. Thereafter, as an example, the mixture is poured between rollers between which a uniform gap of 20 μm is previously set with the temperature maintained in the range from 40° C. to 120° C., both inclusive. In this manner, the mixture is changed into a thin plate made of a cured resin and having a thickness of 20 μm between the rollers. Then, the resultant resin thin plate is cut into pieces of the sizes of the first resin boards3, the second resin board4or the second resin bases16using a press, a laser or a cutter. It should be noted that the length and width of the cured resin thin plate may be integral multiples of those boards or bases if necessary. The mixture may contain no inorganic filler according to the purpose. In this manner, a first adhesive member151is formed.

Now, a method for forming a second adhesive member152for a sheet member5illustrated inFIGS. 4C and 4Dwill be described.

First, rollers between which the mixture described above is to pass are set to have a uniform gap of 40 μm and the mixture is poured between the rollers at a temperature lower than the range described above. In this manner, a thin plate of a semi-cured resin is obtained. Thereafter, a portion of the thin plate corresponding to an opening10of a second resin base16is pressed with a molding die which is used for forming a projection smaller than the opening, thereby forming a second adhesive member152whose center part is thicker than the other part as illustrated inFIGS. 4C and 4D. The molding die is kept at a temperature of 40° C. to 120° C., both inclusive.

With the foregoing methods, the first and second adhesive members151and152used in sheet members5are formed. During stacking of the resin boards, adhesive members each having a uniform thickness may be attached to both faces of the second resin base16or adhesive members whose center portions are thicker than the other portions thereof may also be attached to both faces of the second resin base16.

Now, a process of mounting the semiconductor chips2on the first resin boards3and the second resin board4will be described.

In mounting the semiconductor chips2on the first resin boards3and the second resin board4, the electrode bumps28of the semiconductor chips2are bonded to the semiconductor-device connecting terminals11of the first resin boards3and the second resin board4using, for example, solder or a conductive resin. Though not shown, the semiconductor chips2may be mounted in the following manner. First, the back surfaces of the semiconductor chips2face the respective resin boards and the semiconductor chips2and the semiconductor-device connecting terminals11are connected together by wire bonding. Then, a sealing resin24is applied onto the semiconductor chips2and then is cured to fill gaps formed after the bonding. In this manner, the first and second resin boards3and4on which the semiconductor chips2are mounted are obtained. Thereafter, an electrical inspection and a burn-in test are performed, so that the resultant semiconductor device is as reliable as a semiconductor device incorporated in a general package.

Now, a process of stacking the first and second resin boards3and4on which the semiconductor chips2are mounted and the sheet members5and then uniting the stacked components will be described with reference toFIG. 9.FIG. 9is a view illustrating the semiconductor module of the first embodiment illustrated inFIG. 1in a disassembled state. InFIG. 9, to simplify description, the first resin boards3are individually referred to as a first-level first resin board31, a second-level first resin board32and a third-level first resin board33. Likewise, the second resin bases16forming the respective sheet members5are referred to as a first-level second resin base51, a second-level second resin base52and a third-level second resin base53. The first adhesive members151and the second adhesive members152are also referred to as a first-level first adhesive member251, a second-level first adhesive member252, a third-level first adhesive member253, a first-level second adhesive member351, a second-level second adhesive member352and a third-level second adhesive member353.

As illustrated inFIG. 9, the second resin board4is placed at the bottom. Over the second resin board4, the first-level second adhesive member351, the first-level second resin base51, the first-level first adhesive member251and the first-level first resin board31are placed in this order. Then, the second-level second adhesive member352, the second-level second resin base52, the second-level first adhesive member252, the second-level first resin board32, the third-level second adhesive member353, the third-level second resin base53, the third-level first adhesive member253and the third-level first resin board33are placed in this order.

These components are stacked in such a manner that the semiconductor chips2are mounted on the upper faces of the first resin boards3and the second resin board4. The first resin boards3and the second resin board4are placed such that the semiconductor chips2are housed in the openings10of the second resin bases16forming the respective sheet members5. The connection lands13of the first resin boards3and the second resin board4are accurately positioned with respect to the projections310of the second buried conductors9in the second resin bases16forming the sheet members5.

Then, the resin boards and the sheet members are stacked in the manner described above and are made in close contact with each other. Thereafter, the stacked structure is subjected to application of heat and pressure in the atmosphere.

With this process, the adhesive members provided at the first through third levels are softened, thereby bonding the second resin board4and the first-level through third-level first resin boards31through33together. In addition, through application of pressure and heat, the second buried conductors9whose both ends are formed as the projections310penetrate the softened first and second adhesive members151and152on the upper and lower faces of the second resin bases16. Accordingly, the second buried conductors9are brought into mechanical contact with the connection lands13provided on the second resin board4, the first-level first resin board31, the second-level first resin board32and the third-level first resin board33to establish electrical connection.

At the same time, the first and second adhesive members151and152flow to cover the side faces and upper faces (i.e., faces opposite to the respective principal surfaces) of the semiconductor chips2placed in the openings10of the second resin bases16and to fill the openings10. Specifically, with application of pressure and heat, the first and second adhesive members151and152are softened and the semi-cured conductive paste is compressed so that through holes are densely filled therewith. In addition, excellent contact with the connection lands13is obtained, thus achieving connection with low resistance. After application of pressure and heat for a given period, the stacked structure is cooled and then taken out, thereby obtaining a multilevel semiconductor module in which the components are stacked and united with both faces of each of the semiconductor chips2covered with the conductive members.

In the multilevel structure, for each of the first-level second resin base51, the second-level second resin base52and the third-level second resin base53, the first-level first adhesive member251and the first-level second adhesive member351, the second-level first adhesive member252and the second-level second adhesive member352, or the third-level first adhesive member253and the third-level second adhesive member353may be previously attached to both faces except for the projections310of the second buried conductors9or resin bases each including an adhesive member only at one face thereof may be used (not shown).

Thereafter, if solder balls17are bonded to the lands formed on the lower face of the second resin board4, a multilevel semiconductor module1capable of being mounted on a mother board is obtained. In the foregoing method for fabricating the semiconductor module1of this embodiment, the second resin board is made thick. Accordingly, a warp is less likely to occur in fabricating the multilevel semiconductor module1and mounting the module on a mother board. In addition, since the semiconductor chips2are covered with the first and second adhesive members151and152, mounting with high moisture resistance and high reliability in mechanical environment is achieved. In the foregoing example, three first resin boards3are stacked in a module. Alternatively, four or more first resin boards3may be stacked.

Now, how the side and upper faces of the semiconductor chips2are covered with the first adhesive members151and152in the process of uniting the stacked structure described by application of heat and pressure will be more specifically described.

FIGS. 10A through 10Dare cross-sectional views illustrating how the first and second adhesive members151and152cover the side and upper faces of the semiconductor chips2in process steps of fabricating a semiconductor module according to this embodiment.

First, as illustrated inFIG. 10A, the second resin board4on which the semiconductor chip2is mounted, the first-level second adhesive member351, the first-level second resin base51, the first-level first adhesive member251and the first-level first resin board31on which the semiconductor chip2is mounted are stacked in this order with positions thereof in the width and length directions being adjusted.

Next, as illustrated inFIG. 10B, heat is applied to the stacked structure with pressure applied between the face (i.e., the lower face) facing the surface of the second resin board4on which the semiconductor chip2is mounted and the face of the first-level first resin board31on which the semiconductor chip2is mounted. At this process step, pressure is applied until these components are in contact with each other.

Then, as illustrated inFIG. 10C, the first-level second adhesive member351which is softened by heat covers the upper face (i.e., the face opposite to the principal surface) and the side face of the semiconductor chip2to start filling the opening10of the first-level second resin base51and, at the same time, part of the projections310of the second buried conductors9in the first-level second resin base51enters both of the first-level first adhesive member251and the first-level second adhesive member351.

Subsequently, as illustrated inFIG. 10D, the first-level first adhesive member251and the first-level second adhesive member351completely cover the semiconductor chip2to completely fill the opening10of the first-level second resin base51. In addition, the projections310at both ends of the second buried conductors9in a first-level resin board3apenetrate the first-level first adhesive member251and the first-level second adhesive member351to be brought into mechanical contact with the connection lands13on the first-level first resin board31and the second resin board4. This makes an electrical connection between the connection lands13and the second buried conductors9. At the same time, the first-level first resin board31and the second resin board4are stacked and bonded together with the first-level second resin base51interposed therebetween, thereby obtaining a multilevel semiconductor module. With the foregoing method for fabricating the semiconductor module1of this embodiment, the second resin boards are made thick. Accordingly, a warp is less likely to occur even when the semiconductor module1has a multilevel configuration and is mounted on the mother board. In addition, since each of the semiconductor chips2is covered with the first and second adhesive members151and152, packaging with high moisture resistance and high reliability in mechanical environment is enabled.

To fill the openings10with the first and second adhesive members151and152, it is sufficient to apply pressure and heat in the air. Alternatively, pressure and heat may be applied in a vacuum in order to completely bury the semiconductor chips2with no gaps. It is also effective to previously provide holes for releasing the air in the resin boards.

In a case where the adhesive members having thick portions at their respective centers as illustrated inFIGS. 4C and 4Dare used, filling of the openings10is further ensured as compared to the case of using adhesive members with uniform thickness.

Hereinafter, a multilevel semiconductor module100according to a second embodiment of the present invention will be described with reference toFIG. 11throughFIG. 14.

FIG. 11is a perspective view schematically illustrating an overall configuration of a multilevel semiconductor module100according to this embodiment.FIG. 12is a cross-sectional view of the multilevel semiconductor module of this embodiment taken along the line XII-XII inFIG. 11. In these drawings, the thicknesses and lengths, for example, of components of the semiconductor module are selected so as to be easily shown, and therefore are different from those of actual components. The numbers and shapes of buried conductors and external connection terminals for external connection are different from those of actual conductors and terminals and are selected to be easily shown in the drawings. This is also applied to the other drawings. InFIGS. 11 and 12, components already described in the first embodiment are denoted by the same reference numerals inFIGS. 1 and 2.

The multilevel semiconductor module100of this embodiment is different from the multilevel semiconductor module of the first embodiment in that adhesive layers (second adhesive members)15have been previously bonded to the lower faces of respective sheet members5in the step of stacking resin boards.

As illustrated inFIGS. 11 and 12, the semiconductor module100of this embodiment is formed by alternately stacking first resin boards3having upper faces on which semiconductor chips2are mounted and sheet members5. In the semiconductor module100, the resin board at the bottom (i.e., a second resin board4) is thicker than the other resin boards and solder balls17serving as external connection terminals are provided on the lower face of the second resin board4. In the semiconductor module100, the first resin boards3, the second resin board4and the sheet members5are stacked and united by applying heat and pressure. In the example of this embodiment, the first resin boards3are stacked together with the sheet members5in the semiconductor module100. In the semiconductor module100of this embodiment, the upper faces (the back surfaces, i.e., the faces opposite to the respective principal surfaces) and the side faces of the semiconductor chips2are covered with first adhesive members151which are part of the sheet members5. The semiconductor module of this embodiment is different from that of the first embodiment in that the semiconductor chips2are not covered with the second adhesive members.

The configuration of the semiconductor module of this embodiment will be more specifically described.

The structures of the first resin boards3and the second resin board4used in the semiconductor module100of this embodiment are the same as those in the first embodiment, and description thereof will be omitted.

Each of the sheet members5includes: a second resin base16in which an opening10capable of accommodating a semiconductor chip2is formed in a center region; second buried conductors9made of a conductive resin material and buried in the second resin base16at positions corresponding to first buried conductors7in a first resin board3; an adhesive layer15in which an opening10capable of accommodating the semiconductor chip2is formed in a center region and provided on the lower face of the second resin base16; a first adhesive member151provided on the upper face of the second resin base16, covering, in a center portion, the upper and side faces of the semiconductor chip2and filling the opening10.

The first adhesive member151and the adhesive layer15are made of materials which are softened to be adhesive when heated, or may be made of an identical material.

Both ends of each of the second buried conductors9project from the surfaces of the second resin base16, the first adhesive member151and the adhesive layer15to a given height to form projections310. The second buried conductors9are semi-cured before stacking. The second buried conductors9are compressed and cured by application of pressure and heat after stacking, and electrically connected to the first buried conductors7in the first resin boards3and the second resin board4mainly by mechanical contact. The upper faces of the second resin bases16forming the respective sheet members5are the same as that shown inFIG. 5A. In the semiconductor module100, the first adhesive members151each bonding the lower face (i.e., the face opposite to the mount face) of the first resin board3and the upper face of the sheet member5is the same as the first adhesive members151of the first embodiment, and thus description thereof is omitted. Each of the first adhesive members151may have a uniform thickness or is thicker in a center portion than in the other portion.

The semiconductor module100of this embodiment has the foregoing structure. The first resin bases8forming the first resin boards3and the second resin board4and the second resin bases16forming the sheet members5may be made of an identical material such as a glass-epoxy resin or an aramid-epoxy resin. Alternatively, the first resin boards3and the second resin board4may be made of different materials. For example, a glass-epoxy resin may be used for the first resin boards3and the second resin board4and an aramid-epoxy resin may be used for the sheet members5. The outer dimensions of the first resin boards3, the second resin board4and the sheet members5are the same in plan view. The first adhesive members151and the adhesive layers15provided in the sheet members5may be made of a prepreg of a glass-epoxy resin or an aramid-epoxy resin, for example. The outer dimensions thereof are the same as those of the resin boards in plan view.

Before the resin boards and the sheet members5are stacked, a first-level first adhesive member251, a second-level first adhesive member252and a third-level first adhesive member253may be attached to the faces (i.e., the upper faces) of a first-level second resin base51, a second-level second resin base52and a third-level second resin base53, respectively, on which the adhesive layers15are not provided except for projections310of the second buried conductors9(not shown, seeFIG. 9for reference numerals).

Alternatively, a structure in which adhesive members are provided on the lower faces of the respective second resin bases16whereas the adhesive layers15are previously attached to the upper faces thereof before stacking the boards and the sheet members may be provided (not shown).

The semiconductor module100of this embodiment described above has substantially the same advantages as those of the semiconductor module1of the first embodiment. In the semiconductor module of this embodiment, the second resin board4at the bottom is thicker than each of the first resin boards3, so that a warp is greatly suppressed even in a multilevel configuration. In addition, in the semiconductor module100of this embodiment, the first and second adhesive members151and152cover the side and upper faces of the semiconductor chips2, water, moisture, corrosive gas and other substances causing corrosion of a wire material are less likely to enter the openings10, so that occurrence of failures due to disconnection of wires is prevented. That is, moisture resistance of the semiconductor module100of this embodiment is higher than a conventional semiconductor module. Accordingly, failures are less likely to occur in mounting the module on a mother board using the solder balls17. As a result, a highly-reliable semiconductor module is implemented at low cost.

In addition, if the second resin bases16having high stiffness and forming the sheet members5are made thicker than the semiconductor chips2, loads applied to the semiconductor chips2are reduced during fabrication, thus preventing failures from occurring in the semiconductor chips2themselves and in connection portions between the semiconductor chips2and the resin boards.

Now, a process of stacking and uniting the first and second resin boards3and4on which the semiconductor chips2are mounted and the sheet members5located between the resin boards will be described with reference toFIGS. 13A through 13GandFIG. 14.

FIGS. 13A through 13Gare cross-sectional views illustrating process steps of fabricating a sheet member for use in the semiconductor module of this embodiment.FIG. 14is a view showing the semiconductor module of this embodiment illustrated inFIGS. 11 and 12in a disassembled state.

First, as shown inFIG. 13A, as a second resin base16of a sheet member5of this embodiment, a glass fabric epoxy resin thicker than a semiconductor chip2, for example, is prepared. For example, if the semiconductor chip2has a thickness of 75 μm, the thickness of the second resin base16is preferably about 100 μm.

Next, as shown inFIG. 13B, a prepreg adhesive layer (adhesive layer15) made of a glass-epoxy resin or an aramid-epoxy resin is formed on one face of the second resin base16. This adhesive layer15has a thickness of 20 μm or more.

Then, as shown inFIG. 13C, heat-resistance protective films205made of polyimide or PET resin are formed on both faces of the second resin base16.

Thereafter, as illustrated inFIG. 13D, through holes90are formed in given portions of the second resin base16, the adhesive layer15and the heat-resistance protective films205with a laser. Simultaneously with the formation of the through holes90, an opening10capable of accommodating the semiconductor chip2is formed in a center region of the second resin base16. Thereafter, the heat-resistance protective films205are peeled off from the second resin base16and the adhesive layer15.

Then, as illustrated inFIG. 13E, masking films21in which holes are formed at positions corresponding to the through holes90when viewed from above are attached to the upper face of the second resin base16and the lower face of the adhesive layer15. These holes are used to form projections310of the second buried conductors9. Thereafter, the through holes90are filled with a conductive paste by, for example, screen printing. At this time, the masking film21provided on the face on which the adhesive layer15is formed is thinner than that provided on the other face. In this manner, the projections310of the second resin base16from the upper face of the second buried conductors9and the projections310from the lower face of the second resin base16have the same height. It should be noted that the heights of the projections310are not necessarily the same on both faces of the second resin base16and may differ from each other.

Subsequently, as illustrated inFIG. 13F, the conductive paste filling the through holes90and the holes in the masking films21is heated with application of pressure, so that the conductive paste comes to have a higher filling density to be electrically low-resistive and is changed into a semi-cured state.

Then, as shown inFIG. 13G, the masking films21are peeled off from the second resin base16, thereby forming a second resin base16having the adhesive layer15at one face of a sheet member5. The second buried conductors9are still semi-cured at the end of this process step, so that the second buried conductors9have the property of being compressed and cured simultaneously upon application of pressure and heat.

A method for mounting a semiconductor chip2on each resin board, a method for connecting the solder balls17to the second resin board4and other methods are the same as those described in the first embodiment, and descriptions thereof will be omitted.

With the foregoing structure of the sheet member5, the number of components is reduced so that fabrication cost is reduced, in addition to the advantages of the semiconductor module of the first embodiment.

Then, a process in which the first and second resin boards3and4on which the semiconductor chips2are mounted and the sheet members5each including the second resin base16provided with the adhesive layer15at one face and the first adhesive member151are stacked and united together will be described with reference toFIG. 14. InFIG. 14, to simplify description, the three first resin boards3are individually referred to as a first-level first resin board31, a second-level first resin board32and a third-level first resin board33. Likewise, the second resin bases16forming the respective sheet members5are referred to as a first-level second resin base51, a second-level second resin base52and a third-level second resin base53. The first adhesive members151are also referred to as a first-level first adhesive member251, a second-level first adhesive member252and a third-level first adhesive member253.

As illustrated inFIG. 14, the second resin board4is located at the bottom. Over the second resin board4, the first-level second resin base51, the first-level first adhesive member251and the first-level first resin board31are placed in this order. Then, a second-level second resin base52, a second-level first adhesive member252, a second-level first resin board32, a third-level second resin base53, a third-level first adhesive member253and a third-level first resin board33are placed in this order.

These components are stacked in such a manner that the semiconductor chips2mounted on the first resin boards3overlap with the semiconductor chip2mounted on the second resin board4when viewed from above. The first resin boards3and the second resin board4are placed such that the semiconductor chips2are housed in the respective openings10of the second resin bases16. The connection lands13of the first resin boards3and the second resin board4are accurately positioned with respect to the projections310of the second buried conductors9provided in the sheet members5.

With this arrangement, the resin boards and the sheet members5are stacked and are made in close contact with each other. Thereafter, the stacked structure is subjected to heat and pressure in the atmosphere. Accordingly, the first adhesive members151provided at the first through third levels and the adhesive layer15provided on one face of each of the second resin bases16are softened so that the second resin board4and the first-level through third-level first resin boards31through33are bonded together. In addition, the second resin board4and the connection lands13on the first-level first resin board31through the third-level first resin board33are also bonded together. At this time, the projections310of the second buried conductors9penetrate the softened first adhesive member151provided on one face of each of the second resin bases16to be brought into mechanical contact with the first buried conductors7, thereby forming an electrical connection. At the same time, the first adhesive member151flows to be injected into the opening10in the second resin base16, so that the upper and side faces of the semiconductor chip2housed in the opening10are covered and the opening10is filled with the first adhesive member151.

That is, with application of pressure and heat, the first adhesive member151is softened and the semi-cured conductive paste is compressed, so that the through holes are filled therewith with high density. In addition, a good contact with the connection lands13is formed and connection with low resistance is obtained. After application of pressure and heat for a given period, the stacked structure is cooled and then taken out, thereby obtaining a multilevel semiconductor module in which the components are stacked and united with the semiconductor chips2covered with the first adhesive members151.

With the foregoing method for fabricating the semiconductor module100of this embodiment, the second resin board4is made thick, so that a warp is less likely to occur in the case of having a multilevel structure or mounting the module on a mother board. In addition, since the semiconductor chips2are covered with the first adhesive members151, moisture resistance and reliability in mechanical environment are enhanced as compared to a conventional semiconductor module.

Hereinafter, a multilevel semiconductor module110according to a third embodiment of the present invention will be described with reference toFIGS. 15 through 18.

FIG. 15is a perspective view schematically illustrating an overall configuration of a multilevel semiconductor module according to the third embodiment.FIG. 16is a cross-sectional view of the semiconductor module of this embodiment taken along the line XVI-XVI inFIG. 15. InFIGS. 15 and 16, components already described in the first and second embodiments are denoted by the same reference numerals inFIGS. 1 and 2andFIGS. 11 and 12.

As illustrated inFIGS. 15 and 16, the semiconductor module110of this embodiment includes a second resin board4on which a semiconductor chip2is mounted and a stacked structure provided on the second resin board4. The stacked structure is formed by alternately stacking sheet members5provided with openings10for housing semiconductor chips2and first resin boards3on which semiconductor chips2are mounted. The second resin board4at the bottom of the resin boards is thicker than each of the first resin boards3. Solder balls17serving as external connection terminals for connection to a mother board (not shown) are provided on the lower face of the second resin board4. The second resin board4and the first resin boards3are bonded together and are united with adhesive layers15which are part of the sheet members5.

The semiconductor module110of this embodiment is characterized in that the upper face (i.e., back surface) and side faces of each of the semiconductor chips2housed in the openings10are covered with a low-stress resin320which is softened at a temperature lower than that for the adhesive layers15and the openings10are filled with the low-stress resin320.

The configuration of the semiconductor module of this embodiment will be more specifically described.

The structures of the first resin boards3and the second resin board4used in the semiconductor module110of this embodiment are the same as those in the first embodiment, and description thereof will be omitted.

Each of the sheet members5includes: a second resin base16in which an opening10capable of accommodating a semiconductor chip2is formed in a center portion; second buried conductors9made of a conductive resin material and buried in the second resin base16at positions corresponding to first buried conductors7in a first resin board3; and adhesive layers15in which openings10capable of accommodating the semiconductor chip2are formed in center portions thereof and respectively provided on the upper and lower faces of the second resin base16.

As described above, the upper and side faces of the semiconductor chips2other than the semiconductor chip2located at the top are covered with the low-stress resin320. The low-stress resin320is made of a material which is softened at a temperature lower than that for the adhesive layers15and has a stiffness lower than that of the adhesive layers15at room temperature. As a material for the low-stress resin320, an epoxy resin, a butadiene-based resin or a resin obtained by modifying these resins using another low-stress resin having a low softening point may be used. The low-stress resin320is provided on the sheet members5in the stacking step. In each of the sheet members5before the stacking, the thickness of the low-stress resin320is preferably smaller than that of the second resin base16.

Both ends of each of the second buried conductors9in the sheet members5project from the surfaces of the second resin bases16and the adhesive layers15to form projections310and are semi-cured before being stacked in fabrication. The second buried conductors9are brought into mechanical contact with the first buried conductors7under application of heat and pressure during fabrication, and are electrically connected to the first buried conductors7and semiconductor devices, for example, formed on the semiconductor chips2. The second resin bases16forming the sheet members5are the same as that described in the first embodiment with reference toFIG. 5A.

With the foregoing structure of the semiconductor module110of this embodiment, stress applied to the semiconductor chips2mounted on the resin boards are reduced, thus preventing disconnection and connection failures in the semiconductor chips2and connection failures between the semiconductor chips2and the resin boards, for example.

The first resin bases8forming the first resin boards3and the second resin board4and the second resin bases16forming the sheet members5may be made of an identical material such as a glass-epoxy resin or an aramid-epoxy resin. Alternatively, the first and second resin boards3and4may be made of different materials from that of the sheet members5. For example, a glass-epoxy resin may be used for the first and second resin boards3and4and an aramid-epoxy resin may be used for the sheet members5. The outer dimensions of the sheet members5are the same as those of the resin boards in plan view. To bond the second resin base16forming the sheet members5and the first and second resin boards3and4together, adhesive layers15made of a prepreg of a glass-epoxy resin or an aramid-epoxy resin, for example, may be used.

Now, a process of stacking and uniting the first and second resin boards3and4on which the semiconductor chips2are mounted and the sheet members5placed between the resin boards will be described with reference toFIGS. 17A through 17GandFIG. 18.

FIGS. 17A through 17Gare cross-sectional views illustrating process steps of fabricating a sheet member for use in the semiconductor module of this embodiment.FIG. 18is a view showing the semiconductor module of this embodiment illustrated inFIGS. 15 and 16in a disassembled state.

First, as shown inFIG. 17A, as a second resin base16of a sheet member5of this embodiment, a glass fabric epoxy resin thicker than a semiconductor chip2is prepared. For example, if the semiconductor chip2has a thickness of 75 μm, the thickness of the second resin base16is preferably about 100 μm.

Next, as shown inFIG. 17B, prepreg adhesive layers (adhesive layers15) formed by using a glass-epoxy resin or an aramid epoxy resin are formed on both faces of the second resin base16. Each of the adhesive layers15has a thickness of 20 μm or more.

Then, as shown inFIG. 17C, heat-resistance protective films205made of polyimide or PET resin are formed on both faces of the second resin base16.

Thereafter, as illustrated inFIG. 17D, through holes90are formed in given portions of the second resin base16, the adhesive layers15and the heat-resistance protective films205with a laser. Simultaneously with the formation of the through holes90, an opening10capable of accommodating the semiconductor chip2is formed in a center region of the second resin base16. Thereafter, the heat-resistance protective films205are peeled off from the adhesive layers15.

Then, as illustrated inFIG. 17E, masking films21in which holes are formed at positions overlapping with the through holes90in plan view are attached to the adhesive layers15formed on both faces of the second resin base16. These holes are used to form projections310of the second buried conductors9. Thereafter, the through holes90are filled with a conductive paste by, for example, screen printing.

Subsequently, as illustrated inFIG. 17F, the conductive paste filling the through holes90and the holes in the masking films21is heated with application of pressure, so that the conductive paste comes to be electrically low-resistive with the filling density increased and is changed into a semi-cured state.

Lastly, as shown inFIG. 17G, the masking films21are peeled off from the second resin base16, thereby forming a second resin base16having the adhesive layers15at both faces of a sheet member5. The second buried conductors9are still semi-cured at the end of this process step, so that the second buried conductors9have the property of being compressed and cured simultaneously with application of pressure and heat.

A method for mounting a semiconductor chip2on each resin board, a method for connecting the solder balls17to the second resin board4and other methods are the same as those described in the first embodiment, and descriptions thereof will be omitted.

The foregoing structure of the sheet members5allows a semiconductor module to be formed without using adhesive members as illustrated inFIGS. 4A through 4D. In this case, since adhesive members having a shape similar to that of the semiconductor chips2are additionally provided, the adhesive members are easily formed as compared to the semiconductor module of the first embodiment. Accordingly, adhesive members are easily formed, so that fabrication cost of a semiconductor module is reduced, in addition to the advantages of the semiconductor module of the first embodiment.

Then, a process in which the first and second resin boards3and4on which the semiconductor chips2are mounted and the sheet members5each including the second resin base16provided with the adhesive layers15on both faces thereof and the low-stress resin320are stacked and united together will be described with reference toFIG. 18. InFIG. 18, to simplify description, the three first resin boards3are individually referred to as a first-level first resin board31, a second-level first resin board32and a third-level first resin board33. Likewise, the low-stress resin320provided in three levels is individually referred to as a first-level low-stress resin41, a second-level low-stress resin42and a third-level low-stress resin43. The second resin bases16forming the respective sheet members5are also referred to as a first-level second resin base51, a second-level second resin base52and a third-level second resin base53.

As illustrated inFIG. 18, the second resin board4is located at the bottom. Over the second resin board4, the first-level second resin base51, the first-level low-stress resin41and the first-level first resin board31are placed in this order. Then, a second-level second resin base52, the second-level low-stress resin42, a second-level first resin board32, a third-level second resin base53, the third-level low-stress resin43and a third-level first resin board33are placed in this order.

These components are stacked in such a manner that the semiconductor chips2mounted on the first resin boards3overlap with the semiconductor chip2mounted on the second resin board4when viewed from above. The first resin boards3and the second resin board4are placed such that the semiconductor chips2are housed in the openings10of the second resin bases16.

Then, the low-stress resin320smaller than the openings10in plan view and made of a material which is softened at a temperature lower than that for the adhesive layers15and has a stiffness lower than that of the adhesive layers15is placed on each of the semiconductor chips2housed in the openings10.

Thereafter, the first resin board3, the sheet member5and the low-stress resin320at the next level are placed. The connection lands13of the first resin boards3and the second resin board4are accurately positioned with respect to the projections310of the second buried conductors9buried in the second resin bases16.

With this arrangement, the resin boards and the sheet members5are stacked and are brought in close contact with each other. Thereafter, the stacked structure is subjected to heat and pressure in the atmosphere. Accordingly, the low-stress resin320provided at the first through third levels is softened, and then the adhesive layers15in contact with both faces of each of the resin boards are softened. In this manner, the second resin board4and the first-level first resin board31through the third-level first resin board33are bonded to the respective adjacent second resin bases. In addition, the second resin board4, the connection lands13on the first-level through third-level first resin boards31through33and the projections310of the second buried conductors9are brought into mechanical contact with each other, thereby establishing electrical connection. At the same time, the low-stress resin320flows to cover the upper and side faces of the semiconductor chips2housed in the openings10, resulting in that the openings10are filled with the low-stress resin320.

That is, with application of pressure and heat, the adhesive layers15are softened and the semi-cured conductive paste is compressed to fill the through holes with high density. In addition, an excellent contact with the connection lands13is formed and connection with low resistance is formed. After application of pressure and heat for a given period, the stacked structure is cooled and then taken out, thereby obtaining a multilevel semiconductor module in which the semiconductor chips2are covered with the low-stress resin320and the stacked resin boards on which semiconductor chips are respectively mounted are united.

Hereinafter, a multilevel semiconductor module according to a fourth embodiment of the present invention will be described with reference toFIG. 19.FIG. 19is a cross-sectional view illustrating an overall configuration of the semiconductor module of the fourth embodiment.

As illustrated inFIG. 19, a semiconductor module125according to this embodiment is characterized in that semiconductor chips2aand2dmounted on a first resin board3located at the top and a second resin board4located at the bottom, respectively, are thicker than semiconductor chips2band2cmounted on the other first resin boards3. Accordingly, a lower sheet member5aout of sheet members5in the semiconductor module125of this embodiment has a large thickness. With respect to the other aspects, the semiconductor module125of this embodiment is the same as the semiconductor modules1,100and110of the first through third embodiments, and description thereof will be omitted.

With the foregoing configuration of the semiconductor module125, the stiffness of the semiconductor chips2aand2dis increased, so that occurrence of a warp is suppressed in forming a module. In addition, the semiconductor chips2aand2dat the top and bottom, respectively, to which pressure is readily applied during application of pressure and heat, are made thick so that the multilevel semiconductor module125which has high moisture resistance and in which cracks and other failures are less likely to occur even during application of pressure to semiconductor devices is obtained.

Hereinafter, a multilevel semiconductor module130according to a fifth embodiment of the present invention will be described with reference toFIG. 20.FIG. 20is a cross-sectional view illustrating a configuration of the semiconductor module130of the fifth embodiment.

As illustrated inFIG. 20, the semiconductor module130of this embodiment is different from the semiconductor modules1,100and110of the first through third embodiments in that a rigid plate22having the same size as that of first resin boards3in plan view is attached to the resin board at the top level of the module.

Specifically, in addition to the configurations of the semiconductor modules of the first through third embodiments, the semiconductor module130of this embodiment further includes: a resin base23attached to the first resin board3at the top of the resin boards and having the same outer shape as that of the first resin boards3in plan view; and a rigid plate22attached to the resin base23, having the same outer shape as that of the first resin boards3and having a thermal conductivity higher than those of first resin bases8and second resin bases16.

As a method for bonding the resin base23and the rigid plate22together, in the process of stacking the resin boards and the sheet members5, the resin base23and the rigid plate22may be stacked together with the other components to be united with the resultant stacked structure at a time by application of pressure and heat. Alternatively, after a multilevel semiconductor module has been formed, the base23and the rigid plate22may be attached to the module.

The rigid plate22may be made of a metal having a high stiffness and a high thermal conductivity such as copper, iron, aluminum or 42 alloy or, for example, a ceramic material such as zirconia or plastic containing metal powder.

In addition, a warp occurring in, for example, the semiconductor module1of the first embodiment may be measured so that the thickness and material of the rigid plate22are selected so as to cancel this warp. Alternatively, in fabricating the module under given conditions, if it is previously known that a warp occurs in one direction, a rigid plate22designed to cancel the warp during application of pressure and heat may be placed at the top before application of pressure and heat. To cancel a warp, it is sufficient to obtain a material having a thermal expansion coefficient different from those of the bases, the resin boards and the sheet members and the thickness thereof by calculation, according to the direction of the warp. Accordingly, a semiconductor module in which a warp is minimized is fabricated, and occurrence of connection failures between a mother board and solder balls17is suppressed.

In this manner, in the semiconductor module130of this embodiment, occurrence of a warp in the entire module is suppressed. Accordingly, the rigid plate22allows heat to be uniformly applied to the sheet members and the resin boards during heating.

All the semiconductor chips2in the semiconductor module130may have the same thickness. Alternatively, the semiconductor chip2mounted on the second resin board4may be thicker than the semiconductor chips2on the first resin boards3. In this case, an upper portion of the module is reinforced by the rigid plate22and a warp of the semiconductor module is more effectively suppressed.

FIG. 21is a cross-sectional view illustrating a modified example of the multilevel semiconductor module130of this embodiment.

A semiconductor module140according to this modified example is characterized by including a rigid plate22attached to a sheet member5instead of the first resin board3which is located at the top in the semiconductor modules1,100and110of the first through third embodiments and on which the semiconductor chip2is mounted. In this example, at least a surface portion of the rigid plate22has an insulating property. In this structure, a material having the property of canceling a warp may also be selected as the rigid plate22.

Hereinafter, a multilevel semiconductor module170according to a sixth embodiment of the present invention will be described with reference toFIG. 22.FIG. 22is a cross-sectional view illustrating a configuration of the semiconductor module of the sixth embodiment.

In the semiconductor module170of this embodiment, the diameter of first buried conductors7aformed in first resin boards3aand3blocated at a middle level is larger than that of first buried conductors7bformed in a first resin boards3clocated at the top of the resin boards and in a second resin board4.

In addition, the diameter of second buried conductors9aformed in a sheet member5cat a middle level is also larger than that of second buried conductors9bformed in a sheet member5bplaced on the second resin board4at the bottom (of the resin boards) and a sheet members5dunder the first resin board3clocated at the top.

During application of heat and pressure to the stacked components, pressure is not readily applied to the sheet members5and the first resin boards3near the middle level so that the first buried conductors7and the second buried conductors9are not sufficiently compressed in some cases. However, in the semiconductor module of this embodiment, the first resin boards3and the sheet members5are alternately stacked and the second resin board4is placed at the bottom so that electrical resistance of all the buried conductors including those at the middle level is made uniform during application of heat and pressure for uniting these components. Accordingly, even when pressure and heat are insufficiently supplied to the middle level of the semiconductor module as compared to the upper and lower levels of the module, the resistance of the buried conductors at the middle level is reduced. In addition, as in the semiconductor modules of the foregoing embodiments, the upper and side faces of the semiconductor chips2are covered with adhesive layers or adhesive members, so that the semiconductor module170of this embodiment has high moisture resistance.

A multilevel semiconductor module according to a seventh embodiment of the present invention will be described with reference toFIGS. 23A and 23B,FIGS. 24A and 24BandFIG. 25.

FIGS. 23A and 23Bare views illustrating upper and lower faces, respectively, of a first resin board for use in the semiconductor module of the seventh embodiment. In this embodiment, the upper face of a first resin board300is a face on which a semiconductor chip2is to be mounted.

As illustrated inFIGS. 23A and 23B, the semiconductor module of this embodiment is characterized in that semiconductor-device connecting terminals110are collectively provided on a center region on which a semiconductor chip200is to be mounted in each of the first resin board300and a second resin board (not shown).

Because of this arrangement, wires120connecting the semiconductor-device connecting terminals110to connection lands131are also different from those of the semiconductor module1of the first embodiment. Specifically, as illustrated inFIGS. 23A and 23B, in the semiconductor module of this embodiment, the wires120are formed on both the upper and lower faces of the resin boards, so that the wires120are arranged at a relatively wide pitch with the semiconductor-device connecting terminals110arranged at a fine pitch.

FIGS. 24A and 24Bare a plan view of a semiconductor chip200to be mounted on a first resin board according to this embodiment and a cross-sectional view of the semiconductor chip taken along the line XXIVb-XXIVb of the first resin board shown inFIG. 24A, respectively. As illustrated inFIGS. 24A and 24B, electrode bumps280are collectively formed on a center portion of the semiconductor chip200and auxiliary projections330having the same height are provided at both ends in the length direction.

FIG. 25is a cross-sectional view illustrating a state in which the semiconductor chip200of this embodiment is mounted on the first resin board300. As illustrated inFIG. 25, in mounting the semiconductor chip200, the semiconductor chip200is placed on the first resin board300and the electrode bumps280and the semiconductor-device connecting terminals110are bonded together with solder or a conductive adhesive. In positioning for this bonding, the auxiliary projections330of the semiconductor chip200prevent the semiconductor chip200from being tilted so that the semiconductor chip200and the first resin board300are bonded together, being in parallel with each other with high accuracy. In addition, the auxiliary projections330also prevents occurrence of cracks and other failures even upon application of a load to the semiconductor chip200.

After the mounting, a gap between the first resin board300and the semiconductor chip200is filled with a liquid resin240containing an inorganic filler and sealed. If through holes250are previously formed near semiconductor-device connecting terminals11of the first resin board300, the liquid resin240is easily injected from the back surface after the semiconductor chip is mounted. If dummy electrodes140are provided at positions corresponding to the auxiliary projections330of the semiconductor chip200, the semiconductor chip200and the first resin board300are kept in parallel with each other with higher accuracy. The sealing using the liquid resin240is not necessarily performed and may be omitted. Alternatively, after sealing with the liquid resin240, a peripheral portion including the auxiliary projections330may be encapsulated using a more flexible resin material. The use of a flexible material enables absorption of stress caused by a difference in linear expansion coefficient.

In each of the first resin boards300, the semiconductor-device connecting terminals110, the connection lands131, the wires120, the dummy electrodes140are formed on a first resin base80and first buried conductors7are formed in the first resin base80. The first resin boards300or a second resin board (not shown) formed in the same manner as the first resin boards300and sheet members of a shape associated with the arrangement of the resin boards are alternately stacked and united with application of heat and pressure, thereby completing a semiconductor module according to this embodiment (not shown).

In the multilevel semiconductor module of this embodiment thus fabricated, each of the semiconductor chips200is in contact with the first resin board300or the second resin board (not shown) in a small contact area and the contact portions are collectively arranged, so that a warp of the bimetal structure caused by the difference in linear expansion coefficient between the semiconductor chip200and the first resin board300(or the second resin board) is effectively suppressed.

A multilevel semiconductor module according to an eighth embodiment of the present invention will be described with reference toFIG. 26.FIG. 26is a plan view illustrating a first resin board400used in the semiconductor module of this embodiment.

As illustrated inFIG. 26, the semiconductor module of this embodiment is characterized in that the diameter of first buried conductors132connected to electrode bumps on a semiconductor chip is larger than that of the other first buried conductors7. In this embodiment, the electrode bumps are previously formed and are input/output terminals requiring high-speed operation (e.g., transmission of digital signals at 100 MHz or higher) of, for example, the semiconductor chip, power-supply terminals, ground terminals and analog terminals, for example. The resistances and impedances of these terminals need to be reduced so as to form stable lines. On the other hand, the electrode bumps and wires connected to the bumps need to be densely arranged, so that it is necessary to reduce the diameters of wires and vias for the other terminals as much as possible according to signal characteristics. In this embodiment, the diameter of first buried conductors (not shown) forming transmission lines connected to input/output terminals requiring high-speed operation of a semiconductor chip, power sources, ground terminals and analog terminals, for example, and the diameter of connection lands131formed around the first buried conductors are increased.

Though not shown, the diameter of associated second buried conductors in sheet members is also large. The first resin boards400having the foregoing structure, a second resin board4and sheet members5are stacked and subjected to application of pressure and heat in the same manner as in the fabrication method of the first embodiment, thereby obtaining a multilevel semiconductor module (not shown) of this embodiment.

In the semiconductor module of this embodiment, in the case of requiring transmission lines for transmitting/receiving high-speed signals or analog signals out of signals processed through input/output terminals on semiconductor chips, electric signals are transmitted/received with stability because the diameters of first and second buried conductors forming part of the transmission lines are larger than those of the others. In particular, in a stacked structure, problems such as the difference in diameter between conductors and holes for burying the conductors, formation of insufficient junction at buried conductor portions, and variation of connection resistance because of, for example, a warp might arise in each of stacked resin boards and sheet members. Accordingly, impedance can vary among the levels and signals can be reflected because of mismatching among the levels, resulting in the possibility of variation in characteristics. However, in the semiconductor module of this embodiment, such problems are prevented. In addition, resistance components on transmission lines are reduced, thus suppressing heat generation inside the module caused by Joule heat.

In the first through eighth embodiments, examples in which a glass-epoxy resin, for example, is used as the first resin board400are mainly described. However, the present invention is not limited to this. For example, a mixture containing 70 wt % to 95 wt % of an inorganic filler and a thermosetting resin may be used for the first resin bases8forming the first and second resin boards400and4or the second resin bases16forming the sheet members5. The use of such a material allows thermal expansion coefficients of the resin boards to approach that of semiconductor chips, and thus the present invention is effective in suppressing a warp.

Hereinafter, a multilevel semiconductor module160according to a ninth embodiment of the present invention will be described with reference toFIG. 27,FIGS. 28A through 28DandFIGS. 29A through 29D.

FIG. 27is a cross-sectional view illustrating the multilevel semiconductor module160of this embodiment. InFIG. 27, the thicknesses and lengths, for example, of components of the semiconductor module are selected so as to be easily shown, and therefore are different from those of actual components. The numbers and shapes of buried conductors and external connection terminals for external connection are different from those of actual conductors and terminals and are selected to be easily shown in the drawings.

The semiconductor module160of this embodiment is formed by alternately stacking first resin boards3on which semiconductor chips210are respectively mounted and sheet members5. In the semiconductor module160, the resin board at the bottom (i.e., a second resin board4) is thicker than the other resin boards and solder balls17serving as external connection terminals are provided on the lower face of the second resin board4.

Each of the sheet members5includes: a second resin base16in which an opening10for accommodating a semiconductor chip210is formed in a center portion; a first adhesive member151covering the side and upper faces of the semiconductor chip210encapsulated in a resin in a center region; a second adhesive member152formed on the lower face of the second resin base16and fused with the first adhesive member151in the center region to cover the side and upper faces of the resin-encapsulated semiconductor chip210; and second buried conductors9penetrating the second resin base16, the first adhesive member151and the second adhesive member152.

Each of the first resin boards3includes: a first resin base8; a plurality of semiconductor-device connecting terminals (not shown) formed on the upper face of the first resin base8and connected to the principal surface of the semiconductor chip210; a plurality of first buried conductors7formed in an area of the first resin base8around the perimeter thereof and penetrating the first resin base8; a plurality of connection lands13provided on both faces of the first resin base8and around both ends of the respective buried conductors7; and a plurality of wires12connecting predetermined ones of the semiconductor-device connecting terminals to associated ones of the connection lands13and the first buried conductors7. Connection lands13are also provided on both faces of the second resin board4and wires12and semiconductor-device connecting terminals are provided on the upper face of the second resin board4in the same manner as on the upper face of the first resin boards3.

The semiconductor module160of this embodiment is characterized in that the back surfaces of the respective semiconductor chips210are bonded to the first resin boards3and the second resin board4with an insulating fixing agent62, and the principal surfaces of the semiconductor chips210are connected to the semiconductor-device connecting terminals with fine metal wires60. The principal surface of each of the semiconductor chips210and the fine metal wires60are encapsulated in an encapsulating resin66smaller than the opening10in plan view and thinner than the second resin base16. As described later, the semiconductor chips210are mounted on the resin boards by a conventional die bonding method and a conventional wire bonding method.

In the semiconductor module160of this embodiment, sheet members as described in the second and third embodiments may be used instead of the sheet members as described in the first embodiment. The materials and structures of the adhesive members and resin bases are the same as those in the first embodiment, and description thereof will be omitted.

As described above, the structure of the semiconductor module of this embodiment is applicable to a case in which the semiconductor chips210are connected to the terminals on the resin boards using the fine metal wires60.

Now, a process of forming a resin-molded semiconductor chip210mounted on a resin board will be described with reference toFIGS. 28A through 28D.FIGS. 28A through 28Dare cross-sectional views showing a method for forming a first resin board3provided with a resin-molded semiconductor chips210in the semiconductor module of this embodiment.

First, as shown inFIG. 28A, a first resin board3(or a second resin board4) each provided with semiconductor-device connecting terminals11, wires12, connection lands13and first buried conductors7, for example, is prepared.

Next, as shown inFIG. 28B, a center region of the upper face of the first resin board3is coated with an insulating fixing agent62and a semiconductor chip210is placed thereon. Thereafter, die bonding is performed with heat. Subsequently, terminals on the principal surface of the semiconductor chip210and the semiconductor-device connecting terminals11on the first resin board3are connected to each other by a conventional wire bonding method using fine metal wires60made of, for example, gold, copper or aluminum.

Then, as show inFIG. 28C, a resin-molding die64having a cavity capable of accommodating the semiconductor chip210, the fine metal wires60and the semiconductor-device connecting terminals11is pressed onto the first resin board3. In this process step, the resin-molding die64and the first resin board3are kept at a temperature at which the encapsulating resin66is melted.

Thereafter, as shown inFIG. 28D, the encapsulating resin66is injected into the cavity of the resin-molding die64. After the injection, the resin-molding die64is held for a given time until the encapsulating resin66is hardened. Then, the resin-molding die64is removed. In this manner, a first resin board3used in the semiconductor module160of this embodiment is obtained.

As a modified example of the semiconductor module160of this embodiment, instead of the resin-molding die64, a liquid encapsulating resin68may be used for encapsulating the semiconductor chip210and the fine metal wires60.

Hereinafter, a process of forming a first resin board3aon which an encapsulated semiconductor chip210is to be mounted and which is used in the semiconductor module160of the modified example of this embodiment will be described with reference toFIGS. 29A through 29D.FIGS. 29A through 29Dare cross-sectional views showing a method for forming a first resin board3aon which a semiconductor chip210is mounted in the semiconductor module of the modified example of this embodiment.

The process steps shown inFIGS. 29A and 29Bare the same as those shown inFIGS. 28A and 28B, and description thereof will be omitted.

Then, as shown inFIG. 29C, a liquid encapsulating resin68having an appropriate viscosity and kept in a syringe is dropped from the tip of a needle thereof with pressure and time adjusted, thereby covering the semiconductor chip210, fine metal wires60and semiconductor-device connecting terminals11with the liquid encapsulating resin68. At this time, the amount of dropped liquid encapsulating resin68is adjusted such that the encapsulated body is smaller than the area of the opening10in the second resin base16and is thinner than the second resin base16.

Thereafter, as shown inFIG. 29D, the applied liquid encapsulating resin68is hardened with heat with the temperature and time adjusted so as to ensure hardening of the liquid encapsulating resin68. In this manner, a first resin board3aforming a semiconductor module (not shown) of this modified example is obtained.

As described above, the semiconductor chips210and the fine metal wires60mounted on the first resin boards3are subjected to pre-molding by die molding or potting encapsulation beforehand, so that a warp occurring in the semiconductor module is suppressed. In addition, even when a load is applied to the semiconductor chips210, occurrence of cracks and other failures is prevented. As the semiconductor modules of the foregoing embodiments, the semiconductor module of this embodiment exhibits excellent moisture resistance.

In a multilevel semiconductor module according to the present invention, the occurrence of a warp is suppressed and the module is coupled to a mother board with high yield. Accordingly, the multilevel semiconductor module is useful for size reduction and functional enhancement of various electronic devices such as cellular phones and digital cameras.