Semiconductor device and method of fabricating the same

An aspect of the present embodiment, there is provided a semiconductor device, including a semiconductor substrate, a first insulator above the semiconductor substrate, the first insulator containing tungsten, germanium and silicon, a charge storage film on the first insulator, a second insulator on the charge storage film and, a control gate electrode on the second insulator.

CROSS REFERENCE TO RELATED APPLICATION

This application is based upon and claims the benefit of priority from prior Japanese Patent Application No. 2012-059478, filed on Mar. 15, 2012, the entire contents of which are incorporated herein by reference.

FIELD

An exemplary embodiment described herein generally relates to a semiconductor device and a method of manufacturing the semiconductor device.

BACKGROUND

In a non-volatile semiconductor memory device typified by a NAND type memory, when a control gate voltage is set to be higher in order to obtain a constant floating gate voltage in a rewriting operation, deterioration of a gate insulator is faster, and breakdown of the gate insulator may be occur.

Therefore, it is necessary to improve charge injection efficiency into a charge storage layer such as the floating gate electrode to reduce a rewriting voltage.

DETAILED DESCRIPTION

An aspect of the present embodiment, there is provided a semiconductor device, including a semiconductor substrate, a first insulator above the semiconductor substrate, the first insulator containing tungsten, germanium and silicon, a charge storage film on the first insulator, a second insulator on the charge storage film and, a control gate electrode on the second insulator.

Another aspect of the present embodiment, there is provided a method of fabricating a semiconductor device, including providing a tungsten-contained insulator and a germanium-contained insulator above a semiconductor substrate, providing a silicon-contained insulator on the tungsten-contained insulator or the germanium-contained insulator.

Hereinafter, the embodiment is described with reference to the drawings described above.

In the description, throughout all the drawings, the same components are represented by the same reference numerals. In addition, a dimensional ratio of the drawings is not limited to a ratio represented in the drawings.

Embodiment

A semiconductor device1aaccording to an embodiment mainly includes tungsten and germanium in a gate insulator formed of oxide silicon, for example, SiO2.

Device Structure of Semiconductor Device

A device structure of the semiconductor device1aaccording to the embodiment is described with reference toFIGS. 1A,1B andFIGS. 2A,2B.FIG. 1Ais a cross sectional view showing a device structure along a word line direction in a semiconductor device1aaccording to the embodiment, andFIG. 1Bis a cross sectional view showing the device structure along a bit line direction in the semiconductor device1aaccording to the embodiment.FIG. 2Ais a graph showing a tunnel current related to a tungsten content of a tunnel insulator according to the embodiment, andFIG. 2Bis a graph showing the tunnel current and a germanium content of the tunnel insulator according to the embodiment.

As shown inFIG. 1A, the semiconductor device1aaccording to the embodiment includes a semiconductor substrate10and a tunnel insulator50(first insulator) provided on the semiconductor substrate10. As the semiconductor substrate10, for example, silicon (Si) or the like is used. The tunnel insulator50is configured to be constituted with a tungsten-contained insulator11, a germanium-contained insulator12, and a silicon-contained insulator13. The silicon-contained insulator13includes tungsten diffused from the tungsten-contained insulator11and germanium diffused from the germanium-contained insulator12. The tungsten-contained insulator11includes tungsten oxide such as WO2, for example. The germanium-contained insulator12includes germanium oxide such as GeO, for example. The silicon-contained insulator13includes silicon oxide such as SiO2, for example. Further, inFIGS. 1A and 1B, for example, showing the structure of the embodiment, the tungsten-contained insulator11and the germanium-contained insulator12are represented as being divided as a matter of practical convenience. Thereafter, the laminated structure mentioned above is described as a WO2/GeO/SiO2structure.

The semiconductor device1afurther includes a charge storage film14provided on the tunnel insulator50, an intermediate insulator (second insulator)15provided on the charge storage film14, and a control gate electrode16provided on the intermediate insulator15.

As shown inFIG. 1B, in an area where an element of the semiconductor substrate10is formed, a source area17aand a drain area17bare provided. The area between the source area17aand the drain area17bis set to be as a channel area. In addition, in a periphery of the area where the element is formed, an element isolation film30having a shallow trench isolation (STI) structure formed of silicon oxide or the like is formed. Herein, STI is one of the element isolation methods in a semiconductor manufacturing step. In particular, after shallow grooves are formed on a substrate, an insulator such as the silicon oxide covers the grooves to form an element isolation area. Generally, the STI structure has an advantage in that the STI is rarely spread in a horizontal direction and the element is easily made to be fined.

Herein, in the insulator composed of the WO2/GeO/SiO2provided on a silicon substrate,FIGS. 2A and 2Bshow results of measuring a leakage current when electrons are injected from the silicon substrate side or an electrode side. As shown inFIGS. 2A and 2B, a content of the tungsten or the germanium is changed. As shown inFIGS. 2A and 2B, the tungsten or the germanium included in the tungsten-contained insulator11and germanium-contained insulator12, respectively, has desirably an area density of not less than 1.0×1014atoms/cm2and not more than 1.0×1016atoms/cm2. Meanwhile, even in a case where a lower limit is 1.0×1013atoms/cm2or more, the lower limit is in an acceptable range, and therefore a following result may be obtained. Further, when the content of the tungsten or the germanium is higher than 1.0×1016atoms/cm2, a film thickness of the tungsten-contained insulator11or the germanium-contained insulator12becomes thick. Therefore, there are problems in that a writing speed is reduced, the element is difficult to be fined, or the like. Further, when the tungsten and the germanium are diffused into the silicon-contained insulator13, the area density of the tungsten and the germanium in the silicon-contained insulator13is approximately the same value as the above-described value.

Further, in the embodiment, although the drawings represent the intermediate insulator15as a single layer, which is not limited to the drawings, the intermediate insulator15may be formed of an ONO (oxide-nitride-oxide) film or the like having the laminated structure of a silicon oxide layer, silicon nitride layer, and silicon oxide.

Operation of Semiconductor Device

Next, an operation of the semiconductor device1ais described.

The semiconductor device1ais used as a non-volatile semiconductor memory (electrically erasable and programmable read only memory; EEPROM) which is electrically writable and erasable. As the operation, the electron is injected by applying high voltage to the control gate electrode16so that the electron passes through the tunnel insulator50from the side of the semiconductor substrate10into the charge storage film14via the intermediate insulator15, or the electron is drawn out of the charge storage film14. A case where the electron is injected in the charge storage film15is a writing operation, and a case where the electron is drawn out of the charge storage film15is an erasing operation.

Method of Manufacturing Semiconductor Device

Next, a method of manufacturing the semiconductor device1ais described with reference toFIGS. 3A-3E.FIGS. 3A-3Eare cross sectional views describing the method of manufacturing the semiconductor device1aaccording to the embodiment.

As shown inFIG. 3A, in order to form the tunnel insulator50on the semiconductor substrate10, firstly, a tungsten-contained insulator11(WO2) having an area density of not less than 1.0×1013atoms/cm2and not more than 1.0×1016atoms/cm2and the film thickness of approximately 0.03 nm to 3 nm is formed. A film-depositing technique by using an atomic layer deposition (ALD), for example, is employed. ALD includes a process which a substrate surface is exposed alternately to different types of vapor reactants (precursors) to be able to control a growth as an atomic layer. Further, at an ALD process used in of the embodiment, a cycle in which tungsten hexafluoride and oxygen, for example, are alternately exposed on the surface of the semiconductor substrate10at a growth temperature of approximately 300° C., is repeatedly performed 1 time to about 20 times.

Thereafter, a germanium-contained insulator12(GeO) having the area density of not less than 1.0×1013atoms/cm2and not more than 1.0×1016atoms/cm2and the film thickness of approximately 0.03 nm to 3 nm is provided on the tungsten-contained insulator11. In a case of the germanium-contained insulator12, the film-depositing technique by using ALD, for example, is also applied. In the case of ALD, a cycle in which germanium hydride (GeH4) and oxygen, for example, are alternately exposed on the surface of the semiconductor substrate10at a growth temperature of approximately 500° C., is repeatedly performed 1 time to about 20 times.

The silicon-contained insulator13(SiO2) having the film thickness of approximately 0.1 nm to 20 nm is provided on the germanium-contained insulator12. In a case of the silicon-contained insulator13, the film-depositing technique by using ALD, for example, is also applied. In the case of ALD, a cycle in which a silicon organic compound and oxygen, for example, are alternately exposed on the surface of the semiconductor substrate10at a growth temperature of approximately 550° C., is repeatedly performed about 10 time to 200 times.

The method of forming the tungsten-contained insulator11, the germanium-contained insulator12, and the silicon-contained insulator13includes ALD, for example. However, a chemical sputtering in an oxidation atmosphere may be used. Further, the operation may be also performed by using a chemical vapor deposition (CVD), a physical vapor deposition (PVD), a coating method, an spray method, and the like.

Further, as described above, the forming steps of the germanium-contained insulator12and the silicon-contained insulator13after the forming of the tungsten-contained insulator11is accompanied with increasing the temperature of the semiconductor substrate. Accordingly, tungsten in the tungsten-contained insulator11and germanium in the germanium-contained insulator12are diffused to form the tunnel insulator50. In addition, the tungsten and the germanium may be diffused by increasing the temperature in the forming steps of the charge storage film14, the intermediate insulator15, the element isolation film30, and the control gate electrode16, which are described below. Furthermore, a thermal treatment step to diffuse the tungsten and the germanium may be performed.

As described above, after the tunnel insulator50is formed, the charge storage film14having the film thickness of about 10 nm to 50 nm is provided by using CVD or the like. The charge storage film14is formed of poly crystalline silicon, for example. Next, a silicon nitride40having the film thickness of about 50 nm to 200 nm is provided on the charge storage film14by using CVD or the like. In addition, a silicon oxide41having the film thickness of about 50 nm to 400 nm is provided by using CVD or the like, to thereby obtain the device structure as shown inFIG. 3B.

Thereafter, a photoresist (not shown) is coated on the silicon oxide41and then the photoresist is patterned by an exposure printing. The silicon oxide41is etched by using the photoresist as an etching resistance mask. After etching, the photoresist is removed. A part of the silicon nitride40, the charge storage film14, the silicon-contained insulator13, the germanium-contained insulator12, the tungsten-contained insulator11and the semiconductor substrate10is etched using the etched silicon oxide41as a mask. As a result, the grooves for the element isolation are formed. Further, the element isolation film30having the thickness of about 200 nm to 1500 nm is provided by using a coating technology and the element isolation grooves are buried. As a result, the structure as shown inFIG. 3Cis obtained. In addition, in a state as shown inFIG. 3C, the element isolation film30is carried out to be higher density by performing the thermal treatment under an oxygen atmosphere or a water-vapor atmosphere.

Next, the silicon nitride40is used as a stopper to perform planarization by using a chemical mechanical polishing (CMP) which increases a polishing effect by the machine using an abrasive (slurry) and is capable of obtaining a smooth polished surface. Further, only an element isolation film30is etched using an etching condition having selectivity with respect to the silicon nitride40, that is, in a condition that the element isolation film30is etched more preferentially than the silicon nitride40. Thereafter, the silicon nitride40is removed to obtain the structure as shown inFIG. 3D.

The intermediate insulator15is provided on the charge storage film14and the element isolation film30by using CVD or the like. In a case where the intermediate insulator15, for example, is the ONO film as described above, the silicon oxide having the film thickness of about 1 nm to 10 nm is provided, the silicon nitride having the film thickness of about 1 nm to 5 nm is provided on an upper portion of the silicon oxide, and further the silicon oxide having the film thickness of about 1 nm to 10 nm is provided. In the above step, densification to densify the intermediate insulator15or to improve an interface (densification by the thermal treatment), oxidation to improve the interface, or the like may be performed. Further, by setting a shape of the intermediate insulator15to a U-shape around the charge storage film14, a surface area of the charge storage film14in contact with the intermediate insulator15may be increased as possible. When a contact area becomes wide, the electric field involved with the intermediate insulator15becomes small. Therefore, an electric field stress applied to the intermediate insulator15can be relaxed. As a result, it is possible to suppress deterioration in the interface characteristic of the charge storage film14and the intermediate insulator15, and deterioration in insulation property of the intermediate insulator15.

The control gate electrode16is formed on the intermediate insulator15to obtain the device structure of the semiconductor device1aas shown inFIG. 3E. Finally, the control gate electrode16is patterned by exposure printing (not shown).

Main Effect of the Embodiment

A main effect of the embodiment is described with reference toFIG. 4.FIG. 4is a graph showing a relationship between a tunnel current and an electric field characteristic of a tunnel insulator according to the embodiment. A longitudinal axis represents an amount of the tunnel current, and a horizontal axis represents an electric field of the tunnel insulator (voltage applied to the tunnel insulator).

FIG. 4shows the tunnel current and the electric field characteristic of the tunnel insulator according to a comparative example in addition to the embodiment. The comparative example is different from the embodiment in that a tunnel insulator which does not include both tungsten and germanium is used. That is to say, a structure of the tunnel insulator in a manufacturing step is a GeO/SiO2(not shown). Further, even when the structure of the tunnel insulator in the manufacturing step is a WO2/SiO2or a SiO2single layer, the tunnel current and the electric field characteristic which is approximately in the same manner as that of the GeO/SiO2is obtained (not shown).

As shown inFIG. 4, the graph of the semiconductor device1aaccording to the embodiment shows that a rising current with respect to the electric field of the tunnel insulator is steep. Further, in a low electric field side, a difference between a current value according to the embodiment and a current value according to the comparative example is small. Meanwhile, in a high electric field side, the tunnel current according to the embodiment is higher than that according to the comparative example by about a single digit. In other words, the effect is indicated that break down voltage of the semiconductor device1ais improved. The result is considered because the tungsten and the germanium reduce an interface state density between the semiconductor substrate10and the tunnel insulator50. In addition, the interface state density is a defect density formed on an interface between the semiconductor substrate10and the tunnel insulator50.

Further, it is indicated that, in the low electric field (low applied voltage), the same leakage current as that according to the comparative example may flow, and, in the high electric field (high applied voltage), the same current as that according to the comparative example may flow at a lower electric field (applied voltage). That is to say, two of the effects realized based on the semiconductor device1aaccording to the embodiment. As a first effect, an injection efficiency of an electron (effect of reducing a write voltage or an erase voltage) is improved in the high electric field side. As a second effect, a data (charge) retention characteristic is maintained in the low electric field side, (effect of maintaining a leakage current to be low). Therefore, a ratio of On to Off is increased.

The result described above is considered because the silicon-contained insulator13having low density is stacked in the manufacturing step. The silicon-contained insulator13having the low density has the effect in which permittivity of the tunnel insulator50is lowered and a barrier height is reduced. Therefore, a ratio of On to Off is increased by the effect.

Additionally, since a value of the tunnel current in the high electric field side is higher than that in the comparative example by about a single digit, the effect on improvement of break down voltage of the semiconductor device1ais achieved.

In the embodiment, the tunnel insulator50is stacked as the structure of WO2/GeO/SiO2, so that the tunnel insulator50has the silicon-contained insulator13in which the tungsten and the germanium are diffused. Meanwhile, in the processing step, when the tungsten-contained insulator11and the germanium-contained insulator12are reversed, that is, even when stacked so as to become the structure of the GeO/WO2/SiO2, the same effect can be obtained.

Modification

Herein, a modification of the embodiment is described with reference toFIGS. 5A and 5B.FIG. 5Ais a cross sectional view along a word line direction in a semiconductor device1baccording to the modification, andFIG. 5Bis a cross sectional view along a bit line direction in the semiconductor device1baccording to the modification. Further, a dimensional ratio of the drawings is not limited to a ratio represented in the drawings.

The semiconductor device1baccording to the modification is different from the semiconductor device1aaccording to the embodiment, in that the intermediate insulator15has a planar structure.

A contact area between the charge storage film14and the intermediate insulator15is narrower than that of the semiconductor device1aby having the planar structure of the intermediate insulator15according to the embodiment. Therefore, an electric field stress applied to the intermediate insulator15described above, may not be reduced. Meanwhile, the effect in which the injection efficiency and break down voltage are improved can be obtained as the same as that of the semiconductor device1aaccording to the embodiment.

In the embodiment, the structure of the WO2/GeO/SiO2is used when the tunnel insulator50is provided. Meanwhile, the tunnel insulator50is not limited to the structure in the embodiment. The silicon-contained insulator13may be SiON including nitrogen (N) or a combination thereof, for example. The germanium-contained insulator12may be GeB, GeC, GeN, Ge, GeON, and the like which include boron (B), carbon (C), or the like, or a combination thereof. Further, the tungsten-contained insulator11may be WB, WC, WN, W, WON and the like, or a combination thereof.