Semiconductor device

A semiconductor device includes a main IGBT region in which an IGBT is provided, a main diode region in which a diode is provided, a sense IGBT region in which an IGBT is provided, and a sense diode region in which a diode is provided. A clearance between the body region and the anode region is longer than a product of electron mobility and electron lifetime in the n-type region between the body region and the anode region. A clearance between an end of the collector region on a sense diode region side and the body region is longer than a product of electron mobility and electron lifetime in the n-type region between the end and the body region.

TECHNICAL FIELD

This application is related application of and claims priority to Japanese Patent Application No. 2014-023867 filed on Feb. 10, 2014, the entire contents of which are hereby incorporated by reference into the present application.

The art disclosed in the present specification relates to a semiconductor device.

BACKGROUND ART

International Publication No. WO2011/138832 discloses a semiconductor device that has an IGBT and a diode provided in the same semiconductor substrate. Moreover, aside from a main IGBT through which a main current flows, a sense IGBT through which a smaller current flows is provided in this semiconductor substrate. By detecting the current that flows through the sense IGBT, it is possible to detect a current that flows through the main IGBT. Moreover, aside from the main diode through which a main current flows, a sense diode through which a smaller current flows is provided in this semiconductor substrate. Moreover, by detecting the current that flows through the sense diode, it is possible to detect a current that flows through the main diode.

SUMMARY OF INVENTION

Technical Problem

In the above-mentioned semiconductor device, it is desirable to further improve detection accuracy of the sense IGBT and the sense diode.

Solution to Technical Problem

A first semiconductor device provided herein comprises a semiconductor substrate including a main IGBT region in which an IGBT is provided, a main diode region in which a diode is provided, a sense IGBT region in which an IGBT is provided, and a sense diode region in which a diode is provided. An area of the sense IGBT region is smaller than an area of the main IGBT region. An area of the sense diode region is smaller than an area of the main diode region. An n-type region is provided across the sense IGBT region and the sense diode region. An emitter region, a body region, the n-type region, a collector region, a gate insulating film, and a gate electrode are provided in the sense win region. The emitter region is of n-type and exposed on a front surface of the semiconductor substrate. The body region is of p-type and in contact with the emitter region. The n-type region is separated from the emitter region by the body region. The collector region is of p-type, exposed on a rear surface of the semiconductor substrate, and separated from the body region by the n-type region. The gate insulating film is in contact with the body region. The gate electrode faces the body region via the gate insulating film. An anode region and the n-type region are provided in the sense diode region. The anode region is of p-type and exposed on the front surface of the semiconductor substrate. The n-type region is in contact with the anode region and exposed on the rear surface of the semiconductor substrate. The body region is separated from the anode region by the n-type region. A clearance between the body region and the anode region is longer than a product of electron mobility and electron lifetime in the n-type region between the body region and the anode region. The anode region is separated from the collector region by the n-type region. A clearance between the anode region and the collector region is longer than a product of electron mobility and electron lifetime in the n-type region between the anode region and the collector region. A clearance between an end of the collector region on a sense diode region side and the body region is longer than a product of electron mobility and electron lifetime in the n-type region between the end and the body region.

Notably, in the present specification, the term “area” means an area when the semiconductor substrate is seen along its thickness direction.

In this semiconductor device, the clearance between the body region and the anode region is longer than the product of electron mobility and electron lifetime in the n-type region between the body region and the anode region. Accordingly, movement of carriers between the body region and the anode region is suppressed. Moreover, in this semiconductor device, the clearance between the anode region and the collector region is longer than the product of electron mobility and electron lifetime in the n-type region between the anode region and the collector region. Accordingly, movement of carriers between the anode region and the collector region is suppressed. Moreover, in this semiconductor device, the clearance between the end of the collector region on the sense diode region side and the body region is longer than the product of electron mobility and electron lifetime in the n-type region between the end and the body region. On the sense diode region side in the collector region, the n-type region is exposed on the rear surface of the semiconductor substrate. This n-type region thus exposed functions as a so-called cathode of the diode. In other words, the clearance between the end and the body region corresponds to a clearance between the cathode of the diode and the body region. Since this clearance is longer than the product of electron mobility and electron lifetime in the n-type region, the movement of carriers between the cathode and the body region is suppressed. As such, in this semiconductor device, the movement of carriers between the sense IGBT region and the sense diode region is suppressed. In other words, a current interference between the sense IGBT and the sense diode is suppressed. The current in each of the sense IGBT region and the sense diode region can therefore be detected correctly.

The first semiconductor device described above may further comprise an external p-type region exposed on the rear surface of the semiconductor substrate in a region located on an opposite side of the sense IGBT region with respect to the sense diode region. The anode region may be separated from the external p-type region by the n-type region. A clearance between the anode region and the external p-type region may be longer than a product of electron mobility and electron lifetime in the n-type region between the anode region and the external p-type region.

According to such a configuration, the movement of carriers between the anode region and the external p-type region can be suppressed.

A second semiconductor device provided herein comprises a semiconductor substrate including a main IGBT region in which an IGBT is provided, a main diode region in which a diode is provided, a sense IGBT region in which an IGBT is provided, and a sense diode region in which a diode is provided. An area of the sense IGBT region is smaller than an area of the main IGBT region. An area of the sense diode region is smaller than an area of the main diode region. An emitter region, a body region, an IGBT drift region, a collector region, a gate insulating film, and a gate electrode are provided in the sense IGBT region. The emitter region is of n-type and exposed on a front surface of the semiconductor substrate. The body region is of p-type and in contact with the emitter region. The IGBT drift region is separated from the emitter region by the body region. The collector region is of p-type, exposed on a rear surface of the semiconductor substrate, and separated from the body region by the IGBT drift region. The gate insulating film is in contact with the body region. The gate electrode faces the body region via the gate insulating film. An anode region, a diode drift region and a cathode region are provided in the sense diode region. The anode region is of p-type and exposed on the front surface of the semiconductor substrate. The diode drift region is in contact with the anode region. The cathode region is of n-type, is separated from the anode region by the diode drift region, is exposed on the rear surface of the semiconductor substrate, and has a higher n-type impurity density than the diode drift region. The body region is separated from the anode region by the IGBT drift region and the diode drift region. A high density n-type region having a higher n-type impurity density than the IGBT drift region and the diode drift region is provided between the IGBT drift region and the diode drift region.

In the high density n-type region having a higher n-type impurity density, carriers are scattered by n-type impurities or defects. Since in this semiconductor device, the high density n-type region is provided between the IGBT drift region and the diode drift region, the movement of carriers between the sense IGBT region and the sense diode region is suppressed. The current in each of the sense IGBT region and the sense diode region can therefore be detected correctly.

In the second semiconductor device described above, the high density n-type region may extend from the front surface to a position deeper than center portions in a thickness direction of the IGBT drift region and the diode drift region.

A third semiconductor device described herein comprises a semiconductor substrate including a main IGBT region in which an IGBT is provided, a main diode region in which a diode is provided, a sense IGBT region in which an IGBT is provided, and a sense diode region in which a diode is provided. An area of the sense IGBT region is smaller than an area of the main IGBT region. An area of the sense diode region is smaller than an area of the main diode region. An emitter region, a body region, an IGBT drift region, a collector region, a gate insulating film, and a gate electrode are provided in the sense IGBT region. The emitter region is of n-type and exposed on a front surface of the semiconductor substrate. The body region is of p-type and in contact with the emitter region. The IGBT drift region is separated from the emitter region by the body region. The collector region is of p-type, exposed on a rear surface of the semiconductor substrate, and separated from the body region by the IGBT drift region. The gate insulating film is in contact with the body region. The gate electrode faces the body region via the gate insulating film. An anode region, a diode drift region and a cathode region are provided in the sense diode region. The anode region is of p-type and exposed on the front surface of the semiconductor substrate. The diode drift region is in contact with the anode region. The cathode region is of n-type, separated from the anode region by the diode drift region, exposed on the rear surface of the semiconductor substrate, and has a higher n-type impurity density than the diode drift region. The body region is separated from the anode region by the IGBT drift region and the diode drift region. An insulating layer is provided between the IGBT drift region and the diode drift region.

Since in this semiconductor device the insulating layer is provided between the IGBT drift region and the diode drift region, the movement of carriers between the sense IGBT region and the sense diode region is suppressed. The current in each of the sense IGBT region and the sense diode region can therefore be detected correctly.

In the third semiconductor device described above, the insulating layer may extend from the front surface to a position deeper than center portions in a thickness direction of the IGBT drift region and the diode drift region.

DESCRIPTION OF EMBODIMENTS

First Embodiment

A semiconductor device10in an embodiment shown inFIG. 1has a semiconductor substrate12in which main IGBT regions20, main diode regions40, a sense IGBT region60, and a sense diode region80are provided. There may hereinafter be a case where the main IGBT regions20and the main diode regions40are collectively referred to as a main region. Moreover, there may hereinafter be a case where the sense IGBT region60and the sense diode region80are collectively referred to as a sense region. The main region is provided in an approximately central portion of the semiconductor substrate12. In the main region, a plurality of the main IGBT regions20and a plurality of the main diode regions40are alternately and repeatedly provided. The sense region is provided outside the main region. As shown inFIG. 1, when a front surface of the semiconductor substrate12is seen in a plan view, an area of the sense IGBT region60is smaller than an area of the main IGBT regions20. If each IGBT is turned on, a current that corresponds to an area ratio of the sense IGBT region60to the main IGBT regions20flows through the sense IGBT region60. By detecting the current that flows through the sense IGBT region60, it is therefore possible to detect a current that flows through the main IGBT regions20at that time. Moreover, as shown inFIG. 1, when the front surface of the semiconductor substrate12is seen in a plan view, an area of the sense diode region80is smaller than an area of the main diode regions40. Therefore, if each diode is turned on, a current that corresponds to an area ratio of the sense diode region80to the main diode regions40flows through the sense diode region80. By detecting the current that flows through the sense diode region80, it is therefore possible to detect a current that flows through the main diode regions40.

FIG. 2shows a cross-sectional structure of the sense region. In the sense region, a front surface electrode15is provided on the front surface of the semiconductor substrate12, and a rear surface electrode16is provided on a rear surface of the semiconductor substrate12.

Emitter regions62, a body region64, a drift region66, a buffer region67, and a collector region68are provided in the semiconductor substrate12in the sense IGBT region60.

The emitter regions62are n-type regions, and provided in ranges exposed on an upper surface of the semiconductor substrate12. The emitter regions62are ohmic-connected to the front surface electrode15.

The body region64is a p-type region, and provided in a range exposed on the upper surface of the semiconductor substrate12. The body region64extends from lateral sides of the emitter regions62to an underside of the emitter regions62. The body region64is ohmic-connected to the front surface electrode15.

The drift region66is an n-type region, and provided on an underside of the body region64. The drift region66is separated from the emitter regions62by the body region64. An n-type impurity density in the drift region66is preferably lower than 14×1014atoms/cm3.

The buffer region67is an n-type region, and provided on an underside of the drift region66. An n-type impurity density in the buffer region67is higher than that in each of the drift region66and a cathode region84.

The collector region68is a p-type region, and provided on an underside of the buffer region67. The collector region68is provided in a range exposed on a lower surface of the semiconductor substrate12. The collector region68is ohmic-connected to the rear surface electrode16. The collector region68is separated from the body region64by the drift region66.

A plurality of trenches is provided in the upper surface of the semiconductor substrate12in the sense IGBT region60. Each trench is provided at a position adjacent to the corresponding emitter region62. Each trench extends to a depth at which it reaches the drift region66.

An inner surface of each trench in the sense IGBT region60is covered with a gate insulating film72. Moreover, a gate electrode74is disposed in each trench. Each gate electrode74is insulated from the semiconductor substrate12by the gate insulating film72. Each gate electrode74faces the emitter region62, the body region64, and the drift region66via the gate insulating film72. An insulating film76is provided on a top of each gate electrode74. Each gate electrode74is insulated from the front surface electrode15by the insulating film76.

An anode region82, the drift region66, the buffer region67, and the cathode region84are provided in the semiconductor substrate12in the sense diode region80.

The anode region82is provided in a range exposed on the upper surface of the semiconductor substrate12. The anode region82is ohmic-connected to the front surface electrode15.

The above-mentioned drift region66is provided on an underside of the anode region82. The above-mentioned buffer region67is provided on the underside of the drift region66.

The cathode region84is an n-type region, and provided on the underside of the buffer region67in the sense diode region80. The cathode region84is provided in a range exposed on the lower surface of the semiconductor substrate12. The cathode region84has a higher n-type impurity density than the drift region66. The n-type impurity density in the cathode region84is preferably 1×1018atoms/cm3or higher. The cathode region84is ohmic-connected to the rear surface electrode16.

The drift region66and the buffer region67mentioned above are provided in a separation region90between the sense IGBT region60and the sense diode region80. In other words, the drift region66and the buffer region67extend continuously from an inside of the sense IGBT region60to an inside of the sense diode region80. In other words, an n-type region formed of the drift region66, the buffer region67, and the cathode region84extends from the sense IGBT region60to the sense diode region80, across the sense IGBT region60and the sense diode region80. The body region64is separated from the anode region82by the drift region66located in the separation region90. Moreover, the body region64is separated from the cathode region84by the drift region66located in the separation region90. Moreover, the anode region82is separated from the collector region68by the drift region66located in the separation region90. Moreover, the collector region68extends into the separation region90, and the cathode region84extends into the separation region90. A boundary78between the collector region68and the cathode region84is provided in the separation region90.

Moreover, an external p-type region92is provided in a range exposed on the rear surface of the semiconductor substrate12, in a region located on an opposite side of the collector region68with respect to the cathode region84. In other words, the cathode region84is located between the external p-type region92and the collector region68. The external p-type region92is separated from the anode region82by the drift region66.

A distance A (the shortest distance) between the body region64and the anode region82is longer than a product of electron mobility in the drift region66and electron lifetime in the drift region66. Accordingly, a flow of electrons between the body region64and the anode region82is prevented. Moreover, since hole mobility in the drift region66is smaller than electron mobility in the drift region66, a flow of holes between the body region64and the anode region82is also prevented. A flow of a current between the body region64and the anode region82is therefore prevented.

A distance B (the shortest distance) between the anode region82and the collector region68is longer than a product of electron mobility in the drift region66and electron lifetime in the drift region66. Notably, in the present embodiment, a thickness of the buffer region67is negligibly small relative to the thickness of the drift region66. Accordingly, the distance B is set as described above, to thereby prevent a flow of electrons between the anode region82and the collector region68. Moreover, since hole mobility in the drift region66is smaller than electron mobility in the drift region66, a flow of holes between the anode region82and the collector region68is also prevented. A flow of a current between the anode region82and the collector region68is therefore prevented.

A distance C (the shortest distance) between the body region64and the cathode region84is longer than a product of electron mobility in the drift region66and electron lifetime in the drift region66. Notably, in the present embodiment, the thickness of the buffer region67is negligibly small relative to the thickness of the drift region66. Accordingly, the distance C is set as described above, to thereby prevent a flow of electrons between the body region64and the cathode region84. Moreover, since hole mobility in the drift region66is smaller than electron mobility in the drift region66, a flow of holes between the body region64and the cathode region84is also prevented. A flow of a current between the body region64and the cathode region84is therefore prevented. Notably, if the drift region66and the cathode region84are seen as a common n-type region, the above-mentioned distance C can also be said as a distance between the body region64and an end surface78of the collector region68.

A distance G (the shortest distance) between the anode region82and the external p-type region92is longer than a product of electron mobility in the drift region66and electron lifetime in the drift region66. Notably, in the present embodiment, the thickness of the buffer region67is negligibly small relative to the thickness of the drift region66. Accordingly, the distance G is set as described above, to thereby prevent a flow of electrons between the anode region82and the external p-type region92. Moreover, since hole mobility in the drift region66is smaller than electron mobility in the drift region66, a flow of holes between the anode region82and the external p-type region92is also prevented. A flow of a current between the anode region82and the external p-type region92is therefore prevented.

FIG. 3shows a cross-sectional structure of the main region (the main IGBT region20and the main diode region40). A front surface electrode14is provided on the front surface of the semiconductor substrate12in the main region. On the semiconductor substrate12, the front surface electrode14is separated from the above-mentioned front surface electrode15. The rear surface electrode16, which is shared with the sense region, is provided on the rear surface of the semiconductor substrate12in the main region. Moreover, the drift, region66and the buffer region67mentioned above are also provided in the main region. In other words, the drift region66and the buffer region67extend across the main region to the sense region. A structure of the main IGBT regions20is approximately equal to that of the sense IGBT region60. In other words, each of emitter regions22, a body region24, a collector region44, gate electrodes34, gate insulating films32, and insulating films36in the main IGBT regions20has a configuration approximately similar to that in the sense IGBT region60. Moreover, a structure of the main diode regions40is approximately equal to that of the sense diode region80. In other words, each of an anode region42and a cathode region30in the main diode regions40has a configuration approximately similar to that in the sense diode region80. Notably, the gate electrodes34and the gate insulating films32mentioned above are also provided in the main diode regions40. It should be noted that, in other embodiments, the gate electrodes34and the gate insulating films32may not be provided in the main diode regions40.

Next, an operation of the IGBT in the sense region will be described. When the rear surface electrode16is at a higher potential relative to the potential of the front surface electrode15, and a potential that is equal to or higher than a threshold value is applied to the gate electrodes74, the IGBT in the sense IGBT region60is turned on. In other words, channels are formed in the body region64in proximity of the gate insulating films72, causing electrons to flow from the front surface electrode15to the rear surface electrode16through the emitter regions62, the channels, the drift region66, the buffer region67, and the collector region68. Moreover, holes flow from the rear surface electrode16to the front surface electrode15through the collector region68, the buffer region67, the drift region66, and the body region64. Accordingly, in the sense IGBT region60, a current flows from the rear surface electrode16toward the front surface electrode15. At this occasion, since a reverse voltage is applied to the diode in the sense diode region80, the diode is off. In other words, no current flows through the sense diode region80. Here, since each of the above-mentioned distances A, B, and C is set to a distance that does not allow any current to flow therein, a flow of a current between the sense IGBT region60and the sense diode region80is prevented. In other words, a current interference between the sense IGBT region60and the sense diode region80is prevented.

At this occasion, the IGBT and the diode in the main region operate similarly to the IGBT and the diode in the sense region, respectively. Therefore, when a current flows through the IGBT in the sense region, a current also flows through the IGBT in the main region. As described above, since a current interference in the sense region is prevented, a ratio between the current that flows through the sense IGBT region60and the current that flows through the main IGBT regions20becomes much closer to the ratio between the area of the sense IGBT region60and the area of the main IGBT regions20. Therefore, by detecting the current that flows through the sense IGBT region60(i.e., the current that flows through the front surface electrode15in the sense region), it is possible to correctly detect a current that flows through the main IGBT regions20.

Next, an operation of the diode in the sense region will be described. When the front surface electrode15becomes at a higher potential relative to the potential of the rear surface electrode16, the diode in the sense diode region80is turned on. In other words, electrons flow from the rear surface electrode16to the front surface electrode15through the cathode region84, the buffer region67, the drift region66, and the anode region82. Moreover, holes flow from the front surface electrode15to the rear surface electrode16through the anode region82, the drift, region66, the buffer region67, and the cathode region84. Accordingly, in the sense diode region80, a current flows from the front surface electrode15toward the rear surface electrode16. At this occasion, since a reverse voltage is applied to the IGBT in the sense IGBT region60, the IGBT is off. In other words, no current flows through the sense IGBT region60. Here, since each of the above-mentioned distances A, B, and C is set to a distance that does not allow any current to flow therein, a flow of a current between the sense IGBT region60and the sense diode region80is prevented. Moreover, since the above-mentioned distance G is set to a distance that does not allow any current to flow therein, a flow of a current between the anode region82and the external p-type region92is prevented. In other words, a current interference between the sense diode region80and each of its peripheral regions (i.e., the sense IGBT region60and the external p-type region92) is prevented.

At this occasion, the IGBT and the diode in the main region operate similarly to the IGBT and the diode in the sense region, respectively. Therefore, when a current flows through the diode in the sense region, a current also flows through the diode in the main region. As described above, since a current interference in the sense region is prevented, a ratio between the current that flows through the sense diode region80and the current that flows through the main diode regions40becomes much closer to the ratio between the area of the sense diode region80and the area of the main diode regions40. Therefore, by detecting the current that flows through the sense diode region80(i.e., the current that flows through the front surface electrode15in the sense region), it is possible to correctly detect a current that flows through the main diode regions40.

Notably, electron mobility changes depending on temperature. Therefore, each of the distances A, B, and C is preferably set based on a temperature of the semiconductor device10during an operation. For example, if the semiconductor substrate12is made of silicon, has a thickness of 165 μm, and has an operating temperature of 150° C., and the drift region66has an n-type impurity density of 1×1015to 1017atoms/cm3, each of distances D, E, and F shown inFIG. 2can be set to 580 μm or longer, to thereby set each of the above-mentioned distances A, B, C, and G to a distance that causes no current interference. Notably, the distance D is a distance between the body region64and the boundary78in a transverse direction (a direction parallel to the rear surface of the semiconductor substrate12), the distance E is a distance between the anode region82and the boundary78in the transverse direction, and the distance F is a distance between the anode region82and the external p-type region92in the transverse direction.

Second Embodiment

A configuration of a semiconductor device in a second embodiment is equal to that of the semiconductor device10in the first embodiment, except for high density n-type regions100and102. In the semiconductor device in the second embodiment, as shown inFIG. 4, the high density n-type region100is provided in the semiconductor substrate12in the separation region90. The high density n-type region100has a higher n-type impurity density than the drift region66. The n-type impurity density in the high density n-type region100is preferably 1×1016atoms/cm3or higher. The high density n-type region100extends from the front surface of the semiconductor substrate12to the boundary78between the collector region68and the cathode region84. Accordingly, the drift region66is divided into an IGBT drift region66aand a diode drift region66b. Moreover, the high density n-type region102, which is approximately similar to the high density n-type region100, is also provided on a boundary between the external p-type region92and the cathode region84. Notably, in the semiconductor device in the second embodiment, each of the above-mentioned distances A to G may be set arbitrarily.

Each of the above-mentioned high density n-type regions100and102has n-type impurities in a high density. The N-type impurities scatter carriers. Since the high density n-type region100is provided between the sense IGBT region60and the sense diode region80, the high density n-type region100prevents a current interference between the sense IGBT region60and the sense diode region80. Moreover, since the high density n-type region102is provided between the sense diode region80and the external p-type region92, the high density n-type region102prevents a current interference between the sense diode region80and the external p-type region92. Therefore, by detecting the current in the sense IGBT region60, it is possible to correctly detect a current in the main IGBT regions20. Moreover, by detecting the current in the sense diode region80, it is possible to correctly detect a current in the main diode regions40.

Notably, inFIG. 4, although the high density n-type regions100and102extend from the front surface of the semiconductor substrate12to the regions on the rear surface side of the semiconductor substrate12(i.e., the collector region68, the cathode region84, and the external p-type region92), the high density n-type regions100and102may be provided exclusively in a shallower region. In other words, the high density n-type regions may be provided from the front surface of the semiconductor substrate12to a prescribed depth, and the drift region66may be provided on an underside of those high density n-type regions (i.e., the IGBT drift region66aand the diode drift region66bdo not have to be separated completely). It should be noted that, in this case, each of the high density n-type regions100and102preferably extends from the front surface of the semiconductor substrate12to a position deeper than an center portion in the thickness direction of the drift region66. By providing each of the high density n-type regions to such a degree of depth, it is possible to effectively suppress a current interference. Moreover, inFIG. 4, although the high density n-type regions100and102are provided to be exposed on the front surface of the semiconductor substrate12, an upper end of each of the high density n-type regions may be located inside the semiconductor substrate12. In this case, another semiconductor layer (e.g., the drift region66) resultantly exists between the upper end of each of the high density n-type regions and the front surface of the semiconductor substrate12. Even with such a configuration, if a clearance between the upper end of each of the high density n-type regions and the front surface of the semiconductor substrate12is extremely small, a current interference can sufficiently be suppressed.

Third Embodiment

A configuration of a semiconductor device in a third embodiment is equal to that of the semiconductor device10in the first embodiment, except for insulating layers110and112. In the semiconductor device in the third embodiment, as shown inFIG. 5, a trench may be provided in the front surface of the semiconductor substrate12in the separation region90, and the insulating layer110may be provided in the trench. The insulating layer110extends from the front surface of the semiconductor substrate12into the drift region66. The drift region66exists on an underside of a lower end of the insulating layer110. In other words, in the third embodiment, the IGBT drift region66aand the diode drift region66bare not separated completely. Moreover, the insulating layer112, which is similar to the insulating layer110, is also provided above the boundary between the external p-type region92and the cathode region84. Notably, in the semiconductor device in the third embodiment, each of the above-mentioned distances A to G may be set arbitrarily.

Since the insulating layer110is provided between the sense IGBT region60and the sense diode region80, the insulating layer110prevents a current interference between the sense IGBT region60and the sense diode region80. Moreover, since the insulating layer112is provided between the sense diode region80and the external p-type region92, the insulating layer112prevents a current interference between the sense diode region80and the external p-type region92. Therefore, by detecting the current in the sense IGBT region60, it is possible to correctly detect a current in the main IGBT regions20. Moreover, by detecting the current in the sense diode region80, it is possible to correctly detect a current in the main diode regions40.

Notably, in the third embodiment, each of the insulating layers110and112preferably extends from the front surface of the semiconductor substrate12to a position deeper than the center portion in the thickness direction of the drift region66. By providing each of the insulating layers to such a degree of depth, it is possible to effectively suppress a current interference. Moreover, each of the insulating layers110and112may penetrate the drift layer66. Moreover, inFIG. 5, although the insulating layers110and112are provided to be exposed on the front surface of the semiconductor substrate12, an upper end of each of the insulating layers may be located inside the semiconductor substrate12. In other words, the insulating layers may be embedded in the semiconductor substrate12. In this case, another semiconductor layer (e.g., the drift region66) resultantly exists between the upper end of each of the insulating layers and the front surface of the semiconductor substrate12. Even with such a configuration, if a clearance between the upper end of each of the insulating layers and the front surface of the semiconductor substrate12is extremely small, a current interference can sufficiently be suppressed.

Notably, although the semiconductor devices each having a trench-type gate electrode have been described in each of the first to third embodiments mentioned above, the art disclosed in the present specification may also be applied to a semiconductor device having a planar-type gate electrode.

Moreover, in other embodiments, the buffer region67may not be provided. In this case, the collector region68, the cathode region84, and the external p-type region92are in contact with the drift region66.

The embodiments have been described in detail in the above. However, these are only examples and do not limit the claims. The technology described in the claims includes various modifications and changes of the concrete examples represented above. The technical elements explained in the present description or drawings exert technical utility independently or in combination of some of them, and the combination is not limited to one described in the claims as filed. Moreover, the technology exemplified in the present description or drawings achieves a plurality of objects at the same time, and has technical utility by achieving one of such objects.