Printed circuit board mounting piezoelectric transformer

A printed circuit board comprises a first mounting surface, a second mounting surface, and a piezoelectric transformer. The piezoelectric transformer has a piezoelectric substance, external electrodes, and a frame substrate. The second mounting surface has a projection region. There is a first region from a first location, where an end portion further from the output electrode out of end portions of the input electrode is projected onto the second mounting surface in the projection region, to a second location, where an end portion closer to the output electrode out of the end portions of the input electrode is projected onto the second mounting surface, the first region being a mounting allowed region where an electronic component is mounted.

BACKGROUND OF THE INVENTION

Field of the Invention

The present invention relates to a printed circuit board mounting a piezoelectric transformer, a power supply apparatus, and an image forming apparatus.

Description of the Related Art

An electrophotographic type image forming apparatus has a power supply apparatus for generating a charging voltage, a developing voltage, and a transfer voltage. These voltages are high voltages, and are generated using a piezoelectric transformer. By Japanese Patent Laid-Open No. 2006-108332, a piezoelectric transformer that accommodates a plate-shaped piezoelectric ceramic in a resin case and has a pin terminal protruding from the resin case is proposed. By Japanese Patent Laid-Open No. 2016-76577, a surface mount (SMT) type piezoelectric transformer is recited.

In recent years, a double-sided printing substrate capable of mounting a plurality of electronic components on a single printed circuit board has been developed. When the resin case type piezoelectric transformer recited in Japanese Patent Laid-Open No. 2006-108332 is mounted to a double-sided printing substrate on a first surface, it is not possible to arrange a component near a land on a second surface where a pin is soldered. In contrast, in the case of a surface-mounted type piezoelectric transformer, mounting is performed to a land on a first surface, and therefore a second surface can be effectively used. However, an electric field or the like generated from a piezoelectric transformer exerts an influence on the performance of electronic components mounted on a second surface. Accordingly, it is not the case that electronic components can be mounted to all regions of the second surface.

SUMMARY OF THE INVENTION

The present invention promotes high-density integration of electronic components on a printed circuit board capable of mounting electronic components on both surfaces.

The present invention provides a printed circuit board comprising: a first mounting surface; a second mounting surface that is a surface opposite the first mounting surface; and a piezoelectric transformer surface-mounted to the first mounting surface, wherein the piezoelectric transformer has a piezoelectric substance having an input electrode and an output electrode, a plurality of external electrodes electrically connected to the input electrode or the output electrode, and a frame substrate that supports the piezoelectric substance and is arranged to surround side surfaces of the piezoelectric substance, the second mounting surface has a projection region onto which the piezoelectric substance is projected, and a first region is provided in the projection region, the first region located from a first location to a second location, the first location being a location where an end portion further from the output electrode out of end portions of the input electrode is projected onto the second mounting surface, the second location being a location where an end portion closer to the output electrode out of the end portions of the input electrode is projected onto the second mounting surface, and the first region being a mounting allowed region where an electronic component is mounted.

DESCRIPTION OF THE EMBODIMENTS

Embodiments of the present invention are explained below based on the drawings. Note that the embodiments indicated below are examples, and are not intended to limit the technical scope of the invention thereto. Configurations for working the present invention are explained in detail below using the embodiments, while referring to the attached drawings.

FIG. 1is a plan view illustrating a surface-mounted type piezoelectric transformer PT. Surface mounted refers to SMT (Surface Mount Technology), which is a technique for mounting electronic components to a surface of a printed circuit board. In surface mounting, an electronic component is mounted to a printed circuit board using a reflow. Note that a surface-mounted electronic component is referred to as an SMD (Surface Mount Device). A piezoelectric substance100is an approximately plate-shaped rectangular parallelepiped, and has six exterior surfaces. In particular, out of two exterior surfaces that form a pair in a thickness direction, one exterior surface is a bottom surface that faces a printed circuit board, and the other exterior surface is a top surface on which a first input electrode101, a second input electrode102, and an output electrode103are formed. The thickness direction is a normal direction of the top surface and the bottom surface. A frame substrate104is a frame-shaped member that is provided so as to surround the four side surfaces of the piezoelectric substance100. The frame substrate104is thicker than the piezoelectric substance100. In other words, the piezoelectric substance100is thinner than the frame substrate104. A rectangular hole105is provided in the center of the frame substrate104. The piezoelectric substance100is accommodated in the hole105. In a plan view, the area of the rectangular hole105is larger than the area of the piezoelectric substance100. In other words, a length in a shorter side direction of the hole105is longer than a length in shorter side direction of the piezoelectric substance100, and a length in a lengthwise direction of the hole105is longer than a length in the lengthwise direction of the piezoelectric substance100. Accordingly, the four side surfaces of the piezoelectric substance100do not contact with interior surfaces of the frame substrate104. In other words, in a state where the piezoelectric substance100is arranged in the hole105, an appropriate clearance (space) is ensured between an outer circumferential surface of the piezoelectric substance100and an inner circumferential surface of the hole105. With such a configuration, the size and the shape of the hole105is a size and shape such that the piezoelectric substance100can be arranged in the hole105. The hole105is formed by extending through (opening) a plate-shaped substrate which is the frame substrate104in a thickness direction.

The frame substrate104has two long portions and two short portions. Substrate electrodes106aand106bwhich are each connected to the first input electrode101via a gold line107aare provided left and right of the first input electrode101on top surfaces of long portions of the frame substrate104. The substrate electrodes106aand106bare lands formed as conductive patterns on the top surface of the frame substrate104. The first input electrode101is soldered to the gold line107aby solder108a. The substrate electrodes106aand106bare respectively soldered to the gold line107aby solder108band108c.

Substrate electrodes106cand106dwhich are each connected to the second input electrode102via a gold line107bare provided left and right of the second input electrode102on the top surface of the frame substrate104. The substrate electrodes106cand106dare lands formed as conductive patterns on the top surface of the frame substrate104. The second input electrode102is soldered to the gold line107bby solder108d. The substrate electrodes106cand106dare respectively soldered to the gold line107bby solder108eand108f.

Substrate electrodes106eand106fwhich are each connected to the output electrode103via a gold line107care provided left and right of the output electrode103on the top surface of the frame substrate104. The substrate electrodes106eand106fare lands formed as conductive patterns on the top surface of the frame substrate104. The output electrode103is soldered to the gold line107cby solder108g. The substrate electrodes106eand106fare respectively soldered to the gold line107cby solder108hand108i.

As illustrated inFIG. 1, the gold lines107a,107b, and107care bridged to the two long portions (a left member and a right member) that configure the frame substrate104, and support the piezoelectric substance100so as to suspend the piezoelectric substance100.

As illustrated inFIG. 1, external electrodes109ato109dare formed on end surfaces of the two short portions that are on both sides of the frame substrate104in the lengthwise direction. The external electrodes109ato109dare connected to a wiring pattern formed in an inner layer of the frame substrate104. The external electrode109ais connected to the substrate electrodes106cand106d. The external electrode109bis connected to the substrate electrodes106aand106b. The external electrodes109cand109dare connected to the substrate electrodes106eand106f. Accordingly, when mounting a piezoelectric transformer PT on a printed circuit board, the external electrodes109ato109dare soldered onto lands on the printed circuit board.

FIG. 2is a cross-sectional view achieved by cutting the piezoelectric transformer PT inFIG. 1by an A-A cutting line. The frame substrate104is thicker than the piezoelectric substance100. By supporting the piezoelectric substance100by only a top surface side of the frame substrate104, the piezoelectric substance100floats above the bottom surface of the frame substrate104. Accordingly, when the piezoelectric transformer PT is surface-mounted to a printed circuit board with the frame substrate104as a base, the bottom surface of the piezoelectric substance100will not contact the printed circuit board.

Explanation is given for an arrangement of electronic components in a double-sided printing substrate50, with reference toFIG. 3andFIG. 4.FIG. 3andFIG. 4are cross-sectional views achieved by cutting the piezoelectric transformer PT inFIG. 1by a B-B cutting line. The double-sided printing substrate50has a first mounting surface301and a second mounting surface302that are each capable of mounting electronic components. The piezoelectric transformer PT is surface-mounted to the first mounting surface301by soldering so that the bottom surface of the frame substrate104of the piezoelectric transformer PT faces the first mounting surface301. The piezoelectric substance100does not contact the first mounting surface301because the bottom surface of the piezoelectric substance100floats above the bottom surface of the frame substrate104. Therefore, the double-sided printing substrate50does not inhibit mechanical vibration of the piezoelectric substance100.

Note that a diode D1is mounted to the first mounting surface301. An inductor L1, a field-effect transistor Tr, a capacitor C3, or the like which are parts of a driving circuit for driving the piezoelectric transformer PT are mounted to the second mounting surface302. Note that the first input electrode101has four sides because it is approximately rectangular, but a location of a side closest to the output electrode103of these four sides is assumed to be P2. Note that a cross-sectional shape of the second input electrode102is approximately U-shaped. In other words, the second input electrode102extends over the top surface, a side surface, and the bottom surface of the piezoelectric substance100. In other words, a portion of the second input electrode102arranged on the bottom surface of the piezoelectric substance100faces the first input electrode101and thereby sandwiches the piezoelectric substance100. In other words, the first input electrode101and the second input electrode102form a pair of respective faced electrodes. An electric field occurs inside the piezoelectric substance100in accordance with a potential difference between the first input electrode101and the second input electrode102, and a mechanical vibration is generated in the piezoelectric substance100. The second input electrode102extends until the location P2on the bottom surface of the piezoelectric substance100. A region of the second mounting surface302leftward of the location P2is a first region303on which mounting of electronic components is allowed. In other words, mounting of electronic components is also allowed for at least a region from a location P1to the location P2out of the first region303. The location P1is the end portion of the second input electrode102, and is the location of the end portion farthest from the end portion of the output electrode103.

As illustrated inFIG. 4, a clearance space provided between the piezoelectric substance100and the first mounting surface301is a second region401. As illustrated inFIG. 4, the second region401is a region from the location P1to a location P3. The location P3is a location of an end portion farthest from the first input electrode101or the second input electrode102, out of end portions of the output electrode103. It is possible to lower a mounting height of the piezoelectric transformer PT, by making the second region401be a region in which arrangement of electronic components is prohibited. Note that the height of the second region401increases if the thickness if the piezoelectric substance100is made sufficiently thicker than the thickness of the frame substrate104. In other words, it is also possible to mount electronic components to the second region401without inhibiting mechanical vibration by the piezoelectric substance100. This may be employed when there is leeway in the mounting height of the piezoelectric transformer PT and a cost increase for the piezoelectric transformer PT due to increasing the thickness of the frame substrate104is acceptable. For example, there may be a case where an SMD such as a chip resistor, a chip condenser, or a field-effect transistor (FET) can be mounted.

As described above, the first region303, to which electronic components can be mounted, is provided leftward of the location P2on the second mounting surface302. As illustrated byFIG. 4, a third region402, in which mounting of electronic components is prohibited, is provided rightward of the location P2on the second mounting surface302. The third region402is a region from the location P2to the location P3. For the piezoelectric transformer PT to output a high voltage, a voltage of 200 [V] or less, for example, is applied from the driving circuit configured from the field-effect transistor Tr, the inductor L1, the capacitor C3, and the like to the first input electrode101and the second input electrode102. In testing by the inventors, no degradation of the performance of electronic components mounted to the first region303was found. In other words, it was found that capacitive coupling between the piezoelectric transformer PT and these electronic components is sufficiently small. In contrast, the third region402is a region that faces a segment of the piezoelectric substance100that uses mechanical vibration to gradually boost the voltage inputted from the driving circuit. When the driving circuit was arranged on the third region402, it was confirmed that capacitive coupling between the driving circuit and the piezoelectric transformer PT could not be ignored. In addition, it was also confirmed that an electric field occurring due to the piezoelectric effect by the piezoelectric transformer PT influenced the driving circuit arranged in the third region402.

Accordingly, by allocating the first region303in the second mounting surface302and mounting the driving circuit for driving the piezoelectric transformer PT to the first region303, it is possible to effectively use the second mounting surface302. In other words, high-density mounting is realized. In comparison to a resin-case type piezoelectric transformer, the piezoelectric transformer PT of the present embodiment is flow mounted as thus does not need a dead space. In other words, it is possible to mount electronic components to this dead space, and advantageous in miniaturization of the circuit area.

FIG. 5is a side view of a short side of the piezoelectric transformer PT seen from an input electrode. With reference toFIG. 5, explanation is given for soldering portions of the piezoelectric transformer PT which is surface-mounted to the double-sided printing substrate50.

The double-sided printing substrate50is a printed circuit board in which metal wiring is formed on both sides: the first mounting surface301and the second mounting surface302which are of a substrate (for example: made of a glass epoxy resin) referred to as a core. Metal wiring may also be formed inside the substrate in addition to on the first mounting surface301and the second mounting surface302which are principal surfaces of the substrate.

Wiring provided on a top surface of the double-sided printing substrate50includes four lands that are electrically connected to the external electrodes109ato109d. InFIG. 5, lands501aand501bthat are respectively connected to the external electrodes109aand109bof an input side are illustrated. The side surface for the external electrodes109cand109dof an output side is a similar configuration to that of the external electrodes109aand109bof the input side, and thus illustration thereof is omitted.

As illustrated inFIG. 5, the external electrode109ais soldered to the land501avia a conductive jointing material SLa. Similarly, the external electrode109bis soldered to the land501bvia a conductive jointing material SLb. The conductive jointing material SLa and the conductive jointing material SLb are solder of a type that melts in a reflow oven. The conductive jointing material SLa and the conductive jointing material SLb may be an alloy of tin and lead for example, and may be an alloy that does not use lead.

[Cracking Due to Differences in Coefficients of Thermal Expansion Between Substrates]

Cracking or the like may occur in the conductive jointing material SLa and SLb, due to a temperature change of the environment in which a power supply apparatus having the double-sided printing substrate50and the piezoelectric transformer PT is installed. This is because of stress due to a difference between the coefficient of thermal expansion of the double-sided printing substrate50and the coefficient of thermal expansion of the frame substrate104of the piezoelectric transformer PT on the conductive jointing material SLa and SLb. Accordingly, the inventors performed heat cycle testing to confirm the existence or absence of cracks in soldered portions.

[Coefficient of Thermal Expansion of Substrate]

The printed circuit board expands or shrinks in accordance with heat. The coefficient of thermal expansion of the substrate differs in accordance with the type of the substrate or the orientation of glass fibers. CEM-3 and FR-4, which are general-purpose materials, were selected for the double-sided printing substrate50and the material of the frame substrate104of the piezoelectric transformer PT. CEM-3 has a coefficient of thermal expansion in a longitudinal direction of 20 to 25 ppm/° C., and a coefficient of thermal expansion in a horizontal direction of 23 to 28 ppm/° C. FR-4 has a coefficient of thermal expansion in a longitudinal direction of 10 to 14 ppm/° C., and a coefficient of thermal expansion in a horizontal direction of 12 to 16 ppm/° C. ppm is an abbreviation of parts per million, and means 10−6.

In the heat cycle testing, the double-sided printing substrate50on which the piezoelectric transformer PT was mounted was arranged in a thermostatic bath. Conditions of the heat cycle testing were set in accordance with the test conditions recited in ET-7404A “Environmental and endurance test methods for CSP/BGA package on mounting condition” which is a JEITA standard. JEITA is an abbreviation of Japan Electronics and Information Technology Industries Association. Here, usage conditions (power off, standby, operation) of an image forming apparatus in which a high voltage power supply that employs the piezoelectric transformer PT is mounted are considered. A maximum temperature is 125° C. A minimum temperature is −25° C. A temperature holding period (an amount of time until the double-sided printing substrate50on which the piezoelectric transformer PT is mounted acclimatizes to the environment of the thermostatic bath is 30 minutes. One cycle is a course of transitioning from 125° C. to −25° C., and then returning to 125° C. 800 cycles are executed as heat cycle testing.

FIG. 6is a table that illustrates combinations of the double-sided printing substrate50and the frame substrate104. Numbers indicate differences in the coefficient of thermal expansion. A portion surrounded by a thick frame inFIG. 6indicates combinations for which a test was actually performed. Diagonal lines indicate combinations for which cracks occurred. In order to confirm the reliability of a soldered portion of the piezoelectric transformer PT which was surface-mounted to the double-sided printing substrate50, the heat cycle testing was performed for various combinations of the type of substrate and the orientation of fibers. The inventors confirmed the existence or absence of cracks in soldered portions after the heat cycle testing completed. As indicated by the bold-line frame, in order to improve test efficiency, selection of the substrate for the double-sided printing substrate50is fixed to FR-4, and the orientation of fibers is fixed to a longitudinal direction. In contrast, combinations of the orientation and the substrate of the frame substrate104that were combined with the double-sided printing substrate50were variously changed. Soldered portions of the piezoelectric transformer PT which was surface-mounted to the double-sided printing substrate50were subject to cross-sectional polishing, and the existence or absence of cracks in the polished portion was confirmed through a microscope.

As indicated byFIG. 6, when CEM-3 was employed as the substrate of the frame substrate104, cracking occurs with no dependence on the orientation of the fibers. When focus is given to differences in coefficients of thermal expansion with the double-sided printing substrate50, it was ascertained that cracking occurred with combinations having a difference of 6 ppm/° C. or more. In other words, it is understood that the occurrence of cracking is reduced or avoided if the difference in the coefficient of thermal expansion between the double-sided printing substrate50and the frame substrate104is less than 6 ppm/° C.

Conditions employed in heat cycle testing are not limited to the foregoing example. The conditions may be changed in accordance with capabilities or the like of the thermostatic bath or an envisioned usage for a test subject. Regarding coefficients of thermal expansion recited in the present embodiment, focus was given to coefficients in the longitudinal direction and coefficients in the horizontal direction. Regarding thickness directions, a difference in coefficients of thermal expansion between substrates is set to a level that is unlikely to cause cracking.

FIG. 7illustrates an image forming apparatus1of the intermediate transfer method that is capable of applying a power supply apparatus that uses a piezoelectric transformer. The image forming apparatus1may be an image forming apparatus for forming a monochrome image, but here is an electrophotographic type image forming apparatus that forms a multicolor image by color mixing of a plurality of colorants. The image forming apparatus1uses toner of four colors such as yellow (Y), magenta (M), cyan (C), and black. Characters indicating a color are added to the end of reference numerals inFIG. 7, but these characters are omitted when matters common to the four colors are explained.

Photosensitive drums6C,6M,6Y, and6BK are arranged at regular intervals to each other, and are image carriers for carrying an electrostatic latent image or a toner image. An engine controller20controls a high voltage power supply30to generate a charging voltage, and supplies the charging voltage to a primary charger2. The primary charger2uses the charging voltage to uniformly charge a surface of a photosensitive drum6. An optical scanning apparatus3emits toward the photosensitive drum6a light beam (a laser beam) L that is respectively modulated based on an input image. The light beam (laser beam) L forms an electrostatic latent image on the surface of the photosensitive drum6. The engine controller20controls the high voltage power supply30to generate a developing voltage, and supplies the developing voltage to a developer4. The developer4causes cyan, magenta, yellow, and black toner to adhere to the electrostatic latent image, via a sleeve or a blade to which the developing voltage is respectively is applied. By this, the electrostatic latent image is developed and a developer image (a toner image) is formed.

A sheet feed roller8one at a time feeds a sheet P accommodated in a feeding tray7. A registration roller9feeds the sheet P synchronized to a write start timing of an image toward a secondary transfer unit.

The engine controller20controls the high voltage power supply30to generate a primary transfer voltage, and supplies the primary transfer voltage to a primary transfer roller5. The primary transfer roller5primary transfers the toner image carried by the photosensitive drum6onto an intermediate transfer belt10. The primary transfer voltage applied to the primary transfer roller5promotes the primary transfer of the toner image. The intermediate transfer belt10functions as an intermediate transfer body. A driving roller11is a roller that causes the intermediate transfer belt10to rotate. A secondary transfer unit has a secondary transfer roller14. The engine controller20controls the high voltage power supply30to generate a secondary transfer voltage, and supplies the secondary transfer voltage to the secondary transfer roller14. In the secondary transfer unit, by the intermediate transfer belt10and the secondary transfer roller14conveying while pinching the sheet P, the multicolor toner image carried on the intermediate transfer belt10is secondary transferred to the sheet P. The secondary transfer voltage promotes the secondary transfer. After this, the sheet P is conveyed to a fixing device12. The fixing device12applies heat and pressure to the toner image carried on the sheet P to cause fixing. A discharging roller13discharges the sheet P on which the image is formed.

[Configuration of High Voltage Power Supply]

FIG. 8is a view for explaining the engine controller20and the high voltage power supply30. The engine controller20has a CPU21and high voltage control units22athrough22d. The CPU21sets a target voltage for the charging voltage to the high voltage control unit22a. The CPU21sets a target voltage for the developing voltage to the high voltage control unit22b. The CPU21sets a target voltage for the primary transfer voltage to the high voltage control unit22c. The CPU21sets a target voltage for the secondary transfer voltage to the high voltage control unit22d. The high voltage power supply30has a plurality of power supply circuits. The high voltage power supply30has a booster circuit32afor generating the charging voltage, a booster circuit32bfor generating the developing voltage, a booster circuit32cfor generating the primary transfer voltage, and a booster circuit32dfor generating the secondary transfer voltage. The high voltage control unit22acontrols the booster circuit32aby outputting a control signal Vcont so that the charging voltage outputted by the booster circuit32abecomes the target voltage. The high voltage control unit22bcontrols the booster circuit32bby outputting a control signal Vcont so that the developing voltage outputted by the booster circuit32bbecomes the target voltage. The high voltage control unit22ccontrols the booster circuit32cby outputting a control signal Vcont so that the primary transfer voltage outputted by the booster circuit32cbecomes the target voltage. The high voltage control unit22dcontrols the booster circuit32dby outputting a control signal Vcont so that the secondary transfer voltage outputted by the booster circuit32dbecomes the target voltage.

[Circuit Configuration of High Voltage Power Supply]

UsingFIG. 9A, explanation is given regarding a booster circuit32, which is an example of a power supply circuit. In the booster circuit32, the piezoelectric transformer PT is employed in place of a conventional wire wound type electromagnetic transformer. Output of a secondary side terminal the piezoelectric transformer PT is rectified and smoothed to a positive voltage by a rectification smoothing circuit. The rectification smoothing circuit is configured by a high-voltage capacitor C1and diodes D1and D2for rectification. The output voltage of the piezoelectric transformer PT is output from an output terminal117connected to a path stretching from the piezoelectric transformer PT, and is supplied to a load such as the primary transfer roller5described above. The output voltage is divided by resistors R1, R1, and R3, and is inputted to a non-inverting input terminal (a positive terminal) of an operational amplifier OP via a resistor R4for protection and a capacitor C2.

In contrast, the control signal Vcont which is inputted from an input terminal118is inputted to the inverting input terminal (a negative terminal) of the operational amplifier OP via a resistor R5. The operational amplifier OP, the resistor R5, and the capacitor C3function as an integrating circuit. In other words, the control signal Vcont, which is smoothed in accordance with an integration time constant that is decided in accordance with component constants of the resistor R5and the capacitor C3, is inputted to the operational amplifier OP. The output terminal of the operational amplifier OP is connected to a voltage controlled oscillator (VCO)119. The voltage controlled oscillator119is an example of an oscillator for variably setting a frequency of an output signal in accordance with an inputted control signal.

In addition, the output terminal of the voltage controlled oscillator119is connected to the gate of the field-effect transistor Tr. The field-effect transistor Tr is a switching element that is driven by the output signal from the oscillator, and is an example of a semiconductor component for driving a piezoelectric element. The drain of the field-effect transistor Tr is connected to a power supply Vcc (for example: +24V or the like) via the inductor L1, and is also grounded via a capacitor C4. The inductor L1is an element connected between the switching element and a power supply, and is an example of an element having an inductance component to which a voltage is applied intermittently in accordance with driving of the switching element. Furthermore, the drain is connected to one primary side electrode of the piezoelectric transformer PT. The other primary side electrode of the piezoelectric transformer PT is grounded. In addition, the source of the field-effect transistor Tr is also grounded.

The voltage controlled oscillator119switches the field-effect transistor Tr by a frequency in accordance with the output voltage of the operational amplifier OP. The inductor L1and the capacitor C4form a resonance circuit. A voltage amplified by the resonance circuit is supplied to the primary side of the piezoelectric transformer PT. In this way, the piezoelectric transformer PT is connected to a connection point between a switching element and an element having an inductance component, and, when a signal that oscillates by a predetermined resonance frequency is applied, outputs a voltage in accordance with a frequency characteristic thereof.

Incidentally, a piezoelectric transformer contributes to miniaturization of a power supply apparatus by being used instead of electromagnetic transformer. As a method for mounting a piezoelectric transformer to a printed circuit board, a flow method is common. In the flow method, the piezoelectric transformer is placed on a printed circuit board, and soldered by passing through a high-temperature solder jet flow. Incidentally, a piezoelectric transformer generates a high voltage in accordance with a pyroelectric effect when heated. This high voltage may destroy, for example, other semiconductor components placed on the printed circuit board. Japanese Patent Laid-Open No. 2008-193804 recites reducing an influence of a pyroelectric voltage by making a mount location of a piezoelectric transformer be a location rearward of the mount location of a semiconductor component in a conveyance direction of a printed circuit board. Japanese Patent Laid-Open No. 2013-33929 recites reducing an influence of a pyroelectric voltage by forming a resistor in accordance with conductive coating between two primary side electrodes of a piezoelectric transformer.

As indicated by Japanese Patent Laid-Open No. 2016-76577, making a piezoelectric element be a surface mount component (SMD) is progressing. A reflow method exists as a method for surface-mounting an SMD to a printed circuit board. In the reflow method, the entirety of a printed circuit board passes through a high-temperature space, differing to the flow method. Accordingly, sufficiently suppressing the pyroelectric voltage of a piezoelectric element is difficult in a conventional method. Accordingly, the present embodiment protects a semiconductor component from a pyroelectric voltage generated on a primary side of a piezoelectric element surface-mounted to a printed circuit board by the reflow method.

[Pyroelectric Effect of Piezoelectric Transformer in Reflow Oven]

A process when surface-mounting the piezoelectric transformer PT to the double-sided printing substrate50is as follows. Cream solder is applied onto a land formed on the double-sided printing substrate50via a metal mask. Cream solder may be referred to as solder paste. The piezoelectric transformer PT is mounted to a mount location on the double-sided printing substrate50. The cream solder melts and soldering is performed by the double-sided printing substrate50to which the piezoelectric transformer PT is mounted passing through a reflow oven.

FIG. 10illustrates relations between a pyroelectric voltage Vp and a surface temperature Tb of the piezoelectric transformer PT, and a reflow oven temperature Ta, in a period from when the double-sided printing substrate50is loaded into the reflow oven until it is discharged. The pyroelectric voltage is a voltage occurring in the piezoelectric transformer PT in accordance with the pyroelectric effect.

The processing for passing through the reflow oven has a preliminary heating step and a soldering step. A step from a time t1to a time t3is the preliminary heating step. A step from a time t4to a time t5is the soldering step. In the preliminary heating step, the reflow oven temperature Ta rises to Temp3from a room temperature Temp1in a factory where the reflow oven is installed. Temp3is 150° C. to 180° C., for example. Consequently, flux contained in the cream solder is heated and activates, and the surfaces of the lands501provided on the double-sided printing substrate50and the surfaces of the external electrodes109of the piezoelectric transformer PT are cleaned so that an oxide layer or the like is removed. To improve the accuracy of the cleaning, the preliminary heating step is continued for a predetermined period. Subsequently, in order to solder the double-sided printing substrate50and the piezoelectric transformer PT, for the reflow oven, the temperature in the oven is caused to increase to be greater than or equal to a melting point Temp4of the solder. This is because there is a necessity for soldered electronic components to be sufficiently heated. The melting point Temp4is 230° C., for example, but this depends on components of the cream solder.

The double-sided printing substrate50after being discharged from the reflow oven cools in accordance with natural heat dissipation or the like, and the melted solder cures. By this, the lands and the electronic components are reliably electrically connected. In this way, the reflow method differs from the flow method, and the entirety of the double-sided printing substrate50passes through the inside of the reflow oven, and the entirely of the double-sided printing substrate50is heated at once. Accordingly, it is not possible to define an order in which electronic components are soldered by a mount location in a conveyance direction inside a reflow oven.

A conveyance speed at which the double-sided printing substrate50is conveyed in the reflow oven is adjusted so that a temperature gradient of the ambient temperature of the double-sided printing substrate50in the reflow oven becomes 5° C./sec or smaller. As illustrated inFIG. 1or the like, a large portion of the piezoelectric substance100of the piezoelectric transformer PT which is a surface-mounted type is exposed externally. Accordingly, the surface temperature of the piezoelectric substance100increases so as to track the temperature profile of the reflow oven.

UsingFIG. 10, explanation is given for a pyroelectric voltage Vp arising in the piezoelectric transformer PT. The piezoelectric transformer PT is mounted onto cream solder applied on the lands of the double-sided printing substrate50, but at this point in time the piezoelectric transformer PT and the lands501are not electrically connected. This is because an oxide film that impedes electrical conductivity is present on respective surfaces of the lands501, the external electrodes109, and the cream solder. As described above, oxide films are removed by flux contained in the cream solder. A temperature Temp2at which flux activates (achieves efficacy for removing oxide films) is approximately 100° C. or more. InFIG. 10, the surface temperature of the piezoelectric substance100reaches Temp2at the time t2. In other words, in the preliminary heating step, in a segment from the time t1to the time t2, the piezoelectric transformer PT and the double-sided printing substrate50are not electrically connected. Accordingly, when no countermeasure is performed, the pyroelectric voltage Vp becomes a high voltage as illustrated by the dashed line ofFIG. 10. As a result, there is a possibility for a spark discharge to be generated in the gap occurring between the external electrodes109of the piezoelectric transformer PT and the lands501of the double-sided printing substrate50, precipitating an electrostatic withstand voltage breakdown for the semiconductor component.

[Method of Reducing Pyroelectric Voltage and Effect Thereof]

FIG. 9Billustrates a booster circuit32in which a pyroelectric countermeasure has been embedded. Note that the same reference numerals are added to electronic components that have been already explained, and the explanation thereof is invoked. As illustrated inFIG. 9B, resistors R6and R7are connected in parallel to the primary electrode pair of the piezoelectric transformer PT. The primary electrode pair is a pair formed by the first input electrode101and the second input electrode102. In other words, one terminal of the resistor R6is connected to the first input electrode101, and the other terminal of the resistor R6is connected to the second input electrode102. Similarly, one terminal of the resistor R7is connected to the first input electrode101, and the other terminal of the resistor R7is connected to the second input electrode102. Note that the resistor R6is an example of a first resistor. The resistor R7is an example of a second resistor.

Because the double-sided printing substrate50has the first mounting surface301and the second mounting surface302, it is loaded into the reflow oven twice. Accordingly, in the present embodiment, the mounting order is contrived so that the piezoelectric transformer PT and a semiconductor component are protected from a pyroelectric voltage (represented here by the transistor Tr). In other words, the mounting surface on which the piezoelectric transformer PT is mounted differs from mounting surface on which the semiconductor component is mounted.

The role of the resistors R6and R7is for the discharge of a pyroelectric current occurring in the piezoelectric substance100due to the pyroelectric effect in the reflow. By this, it becomes less likely for the pyroelectric voltage to be applied to the semiconductor component, and thus electrostatic withstand voltage breakdown becomes less likely to occur.

FIG. 11is a cross-sectional view illustrating the double-sided printing substrate50to which electronic components are mounted. This cross section is a cross section formed by the B-B cutting line inFIG. 1. As illustrated byFIG. 11, the piezoelectric transformer PT is mounted to the first mounting surface301, but the transistor Tr which is a protection target is arranged on the second mounting surface. In addition, the resistor R6which is connected in parallel to the primary electrode pair is mounted to the first mounting surface301. The resistor R7which is connected in parallel to the primary electrode pair is mounted to the second mounting surface302.

FIG. 12is a flowchart which describes each step of a reflow. When the first reflow is started, in step S1, cream solder is applied to the first mounting surface301of the double-sided printing substrate50. Next, in step S2, the piezoelectric transformer PT which is of a surface-mounted type, and the resistor R6which is connected in parallel to the primary electrode pair of the piezoelectric transformer PT are mounted to the first mounting surface301. In step S3, the double-sided printing substrate50is inserted into the reflow oven, and the piezoelectric transformer PT and the resistor R6are soldered to the first mounting surface301. In this way, in the first reflow, various electronic components including the piezoelectric transformer PT and the resistor R6are mounted to the first mounting surface301. A pyroelectric voltage is generated in the piezoelectric transformer PT during the first reflow, but because the transistor Tr is not present on the first mounting surface301, the transistor Tr is not affected by the pyroelectric voltage.

When the second reflow is started, in step S4, cream solder is applied to the second mounting surface302of the double-sided printing substrate50. Next, in step S5, the transistor Tr which forms a driving circuit for driving the piezoelectric transformer PT is mounted to the second mounting surface302. In addition, other electronic components such as the resistor R7are mounted. In step S6, the double-sided printing substrate50is inserted into the reflow oven, and the transistor Tr or the resistor R7are soldered to the second mounting surface302.

Because the first mounting surface301also passes through a high-temperature space in the second reflow similarly to in the first time, a pyroelectric voltage is generated in the piezoelectric transformer PT. The piezoelectric transformer PT and the resistor R6are already soldered to the double-sided printing substrate50by the first reflow. In other words, because the primary electrode pair of the piezoelectric transformer PT forms a closed loop via the resistor R6, the pyroelectric current flows through the resistor R6, and is converted to heat thereby. Accordingly, electrostatic withstand voltage breakdown of the transistor Tr is suppressed.

Incidentally, configuration may be taken such that electronic components are mounted to the second mounting surface302in the first reflow, and electronic components are mounted to the first mounting surface301in the second reflow. When the first reflow is started, cream solder is applied to the second mounting surface302of the double-sided printing substrate50. Next, the transistor Tr which forms a driving circuit for driving the piezoelectric transformer PT is mounted to the second mounting surface302. In addition, other electronic components such as the resistor R7are mounted. The double-sided printing substrate50is inserted into the reflow oven, and the transistor Tr or the resistor R7are soldered to the second mounting surface302.

When the second reflow is started, firstly cream solder is applied to the first mounting surface301of the double-sided printing substrate50. Next, the piezoelectric transformer PT which is of a surface-mounted type, and the resistor R6which is connected in parallel to the primary electrode pair of the piezoelectric transformer PT are mounted to the first mounting surface301. The double-sided printing substrate50is inserted into the reflow oven, and the piezoelectric transformer PT and the resistor R6are soldered to the first mounting surface301. In this way, in the second reflow, various electronic components including the piezoelectric transformer PT and the resistor R6are mounted to the first mounting surface301. A pyroelectric voltage is generated in the piezoelectric transformer PT in the second reflow, but because the transistor Tr and the resistor R7are soldered by the first reflow, the pyroelectric current flows through the resistor R7and is converted to heat. In this way, in a case where electronic components are mounted to the second mounting surface302before the first mounting surface301, electrostatic withstand voltage breakdown of the transistor Tr is suppressed by the resistor R7.

In this way, when the first mounting surface301passes through the reflow oven first the resistor R6reduces the pyroelectric current, and when the second mounting surface302passes through the reflow oven first the resistor R7reduces the pyroelectric current. When it is unknown which mounting surface will pass through reflow first, semiconductor components are reliably protected by mounting both of the resistors R6and R7. In addition, when a mounting surface that will be loaded into a reflow oven first is confirmed, it should be sufficient if a resistor, out of the resistors R6and R7, is mounted to the mounting surface that will be loaded into the reflow oven first.

Resistances of the resistors R6and R7are decided so as to satisfy two conditions. The first condition is achieving a pyroelectric countermeasure by just one resistor out of the resistors R6and R7. The greater the resistance the harder it will be for a pyroelectric current to flow to the resistors R6and R7, and more pyroelectric current will flow to semiconductor components. Accordingly, resistances of the resistors R6and R7must be small to a level where semiconductor components are not subject to electrostatic withstand voltage breakdown.

The second condition is making the driving circuit be able to drive the piezoelectric transformer PT so that power supply performance of the power supply circuit satisfies a defined performance. As illustrated byFIG. 9B, the driving circuit has the transistor Tr and an LC parallel resonance circuit formed by the capacitor C3and the inductor L1. In addition, the resistors R6and R7are connected in parallel to the primary electrode pair of the piezoelectric transformer PT. Accordingly, when the resistances of the resistors R6and R7are too small, power loss in the resistors R6and R7increases, and the power supply performance of the power supply circuit ceases to satisfy the defined performance (an output characteristic or the like).

FIG. 13is a table that illustrates test results performed in order to decide resistances of the resistors R6and R7for satisfying both of the two conditions. ∘ indicates satisfactory. Δ indicates insufficient. x indicates unsuitable. The inductance of the inductor L1is 150 [μH]. The capacitance of the capacitor C3is 470 [pF]. The resonance frequency of the piezoelectric transformer PT is 140 [kHz]. In the tests, the first mounting surface301was subject to a reflow before the second mounting surface302.

As illustrated byFIG. 13, a resistance at which the resistors R6and R7can independently achieve a pyroelectric countermeasure is 3 [MΩ] or less. It was found that an influence on the driving performance of the piezoelectric transformer PT was smaller if a combined resistance of the resistors R6and R7was 6.0 [kΩ)] or more. Note that, in a case where only one of the resistors R6and R7is used, it is sufficient if the resistance of that resistor is 6.0 [kΩ)] or more.

In this way, the resistance of the resistors R6and R7are decided to be greater than or equal to 6.0 [kΩ] (or 12.0 [kΩ]) and less than or equal to 3.0 [MΩ]. However, resistors have individual differences. In other words, there is variation for resistances. Accordingly, in addition to the test results, when consideration is given to variation of resistances, it is considered appropriate that the resistance of the resistors R6and R7be approximately 1.0 [MΩ].

In this way, by virtue of this embodiment, the piezoelectric transformer PT and a semiconductor component are mounted to different mounting surfaces on the double-sided printing substrate50, and the resistors R6and R7, which are connected in parallel to the primary electrode pair of the piezoelectric transformer PT, are provided. Accordingly, it is possible to protect a semiconductor component from a pyroelectric voltage generated on a primary side of a piezoelectric element surface-mounted to the double-sided printing substrate50by the reflow method.

InFIG. 13, the resistance of the resistor R6and the resistance of the resistor R7are the same, but these may be different. In other words, as long as the two conditions described above are satisfied, the resistance of the resistor R6and the resistance of the resistor R7can be set freely.

The technical concept of the present embodiment can also be applied to a printed circuit board that employs a reversible layout. A reversible layout means that, out of arrangement patterns for forming a plurality of substrates on a sheet for substrates, arrangement patterns of electronic components mounted on a front surface and arrangement patterns for electronic components mounted on a back surface are the same. By virtue of this embodiment, the present embodiment is also effective for a configuration having a reversible layout because resistors for a pyroelectric countermeasure are mounted to both surfaces.

FIG. 14AandFIG. 14Bare cross-sectional views illustrating examples in which a plurality of power supply circuits1401aand1401bthat use the piezoelectric transformer PT are arranged on the double-sided printing substrate50. The cross sections here are cross sections in accordance with the B-B cutting line. Note that the same reference numerals are added to electronic components that have been already explained, and the explanation thereof is invoked. The plurality of power supply circuits1401aand1401bmay be pyroelectric circuits as described above.

As illustrated byFIG. 14A, the technical concept of the embodiment can be applied even if a plurality of the piezoelectric transformer PT are arranged on the same mounting surface. As illustrated byFIG. 14B, the technical concept of the embodiment can be applied even if a plurality of the piezoelectric transformer PT are arranged on different mounting surfaces. The power supply circuits1401aand1401bwhich use the piezoelectric transformer PT are respectively independent circuits. Accordingly, by arranging the resistors R6and R7for each of the power supply circuits1401aand1401b, semiconductor components such as the transistor Tr are protected from pyroelectric voltages.

In this way, even if the plurality of power supply circuits1401aand1401bwhich use the piezoelectric transformer PT are arranged on the double-sided printing substrate50, semiconductor components in each power supply circuit are protected. As explained by the embodiment, the piezoelectric transformer PT and a semiconductor component are mounted to different mounting surfaces in each of the plurality of power supply circuits1401aand1401b. Furthermore, the resistor R6and the resistor R7are respectively provided on the first mounting surface301and the second mounting surface302. In addition, the resistor R6and the resistor R7are connected in parallel to the primary electrode pair of the piezoelectric transformer PT. Note that it is sufficient if a resistor is provided on only a mounting surface that will be loaded into the reflow oven first out of the two mounting surfaces. In other words, it is not the case that both of the resistor R6and the resistor R7are always necessary.

As illustrated inFIG. 3or the like, the double-sided printing substrate50has the first mounting surface301and the second mounting surface302which is on a surface opposite the first mounting surface301. The piezoelectric transformer PT is surface-mounted to the first mounting surface301. The piezoelectric transformer PT has the piezoelectric substance100which has the output electrode103and an input electrode, and the frame substrate104that supports the piezoelectric substance100. The first input electrode101and the second input electrode102are examples of the input electrode. As illustrated inFIG. 1, the frame substrate104is arranged so as to surround the side surfaces of the piezoelectric substance100. In addition, the frame substrate104has the plurality of external electrodes109athrough109dthat are electrically connected to the input electrodes or the output electrode. The second mounting surface302has a projection region onto which the piezoelectric substance100is projected. The projection region is a region onto which the top surface or the bottom surface of the piezoelectric substance100is projected in a normal direction of the second mounting surface302. The first region303which is a mounting allowed region where electronic components are mounted is included in the projection region. The first region303is a region from the first location P1to the second location P2. The first location P1is a location at which, out of the end portions of the input electrode, an end portion farther from the output electrode103is projected onto the second mounting surface. More specifically, the first location P1is a location at which a perpendicular line drawn from, out of the end portions of the input electrode, the end portion farther from the output electrode103toward the second mounting surface302intersects the second mounting surface302. The second location P2is a location at which, out of the end portions of the input electrode, an end portion closer to the output electrode103is projected onto the second mounting surface302. More specifically, the second location P2is a location at which a perpendicular line drawn from, out of the end portions of the input electrode, the end portion closer to the output electrode103toward the second mounting surface302intersects the second mounting surface. As described above, when the entirety of the projection region of the piezoelectric transformer PT is set as a mounting prohibited region of the electronic component, high-density integration of electronic components on the second mounting surface302cannot be achieved. Because the first region303has a low influence from, for example, an electric field from the piezoelectric transformer PT, in the case of this region it is possible to mount an electronic component with a decrease in the performance of the electronic component hardly introduced. In this way, by making the first region303be a region where electronic components can be mounted, it becomes possible to have high-density mounting of electronic components on the second mounting surface302. As illustrated inFIG. 3or the like, at the least some electronic components for configuring a driving circuit for driving the piezoelectric transformer PT are arranged on the first region303. As illustrated inFIG. 3orFIG. 9, the at least some electronic components that configure the driving circuit are the capacitor C3, the field-effect transistor Tr, or the inductor L1, for example.

As illustrated inFIG. 4, the first mounting surface301is a region on a first mounting surface, and may have the second region401that faces the piezoelectric substance100. The second region401may be a mounting prohibited region in which mounting of electronic components is prohibited. By providing the second region401, the piezoelectric substance100and electronic components cease to be in contact, and the piezoelectric substance100becomes capable of sufficient mechanical vibration. Note that an electronic component that is prohibited from being mounted on the second region401is a surface mount component (SMD), for example. Note that the second region401may be a region where electronic components having a height so that there is no contact with the piezoelectric substance100even if the piezoelectric substance100mechanically vibrates are mounted.

As illustrated inFIG. 4, the projection region described above may have the third region402from the second location P2to the third location P3. The third region402may be a mounting prohibited region in which mounting of electronic components is prohibited. The third location P3is a location at which, out of the end portions of the input electrode, an end portion far from the output electrode103is projected onto the second mounting surface302. More specifically, the third location P3is a location at which a perpendicular line drawn from, out of the end portions of the input electrode, the end portion far from the output electrode103toward the second mounting surface intersects the second mounting surface. As described above, the third region402is a region that is likely to be influenced by the piezoelectric substance100. Accordingly, by prohibiting the arrangement of electronic components in the third region402, decrease in the performance of such electronic components should be avoided.

As illustrated inFIG. 1, a space may be provided between the side surfaces of the piezoelectric substance100and the interior surface of the frame substrate104. By this, the piezoelectric substance100can mechanically vibrate without interfering with the frame substrate104. The piezoelectric substance100is thinner than the frame substrate104, and a space is provided between the bottom surface of the piezoelectric substance100and the first mounting surface301. By this, the piezoelectric substance100can mechanically vibrate without interfering with the first mounting surface301.

As illustrated inFIG. 1, for the input electrode, the first input electrode101which is a first faced electrode provided on the top surface of the piezoelectric substance100and the second input electrode102which includes a second faced electrode on the bottom surface of the piezoelectric substance100may be comprised. As illustrated inFIG. 3, a portion out of the second input electrode102that functions as the second faced electrode extends to the top surface of the piezoelectric substance100via a side surface of the piezoelectric substance100. Consequently, an electric field may be generated in a thickness direction of the piezoelectric substance100. In addition, because the first input electrode101and some of the second input electrode102are respectively provided on the top surface of the piezoelectric substance100, it is possible to support the piezoelectric substance100so that the piezoelectric substance100is suspended by the frame substrate104.

As explained usingFIG. 6, a difference between the coefficient of thermal expansion of the substrate of the double-sided printing substrate50and the coefficient of thermal expansion of the frame substrate104may be less than 6×10−6/° C. Consequently, even if the double-sided printing substrate50is mounted in the high voltage power supply30of the image forming apparatus1, cracking is unlikely to occur in a soldering portion between the double-sided printing substrate50and the frame substrate104.

As illustrated inFIG. 7, the photosensitive drum6is an example of an image carrier. The primary charger2is an example of a charging unit for uniformly charging an image carrier. The optical scanning apparatus3is an example of an exposure unit for forming an electrostatic latent image by exposing the image carrier. The developer4is an example of a developing unit for forming a toner image by developing the electrostatic latent image. The primary transfer roller5, the intermediate transfer belt10, and the secondary transfer roller14are an example of a transfer unit for transferring a toner image to a sheet. The high voltage power supply30is an example of a power supply apparatus for generating a charging voltage supplied to a charging unit, a developing voltage supplied to a developing unit, or a transfer voltage supplied to a transfer unit.

As explained usingFIG. 11orFIG. 12, the piezoelectric transformer PT and a semiconductor component are mounted to different mounting surfaces on the double-sided printing substrate50. Furthermore, the resistors R6and R7that are connected in parallel to a primary electrode pair of the piezoelectric transformer PT are provided. Accordingly, it is possible to protect a semiconductor component from a pyroelectric voltage generated on a primary side of the piezoelectric substance100which is surface-mounted to the double-sided printing substrate50by using the reflow method. Note that is not necessary to provide both of the resistors R6and R7. It is sufficient if a resistor is provided on, out of the first mounting surface301and the second mounting surface302, a mounting surface that is soldered in a reflow oven first. In such a case, it is sufficient if the resistance of this resistor is greater than or equal to 6.0 KΩ and less than or equal to 3.0 MΩ. Note that it is sufficient if the resistance of the resistor is a value such that a pyroelectric voltage decreases and a reduction in power supply performance of a power supply circuit that includes the piezoelectric transformer PT is within a predetermined range. The pyroelectric voltage is a voltage that is generated in the primary electrode pair of the piezoelectric transformer PT in accordance with a piezoelectric effect when the double-sided printing substrate50passes through a reflow oven in order to solder a semiconductor component to the second mounting surface302. In a case where both of the resistors R6and R7are provided, it is sufficient if the resistance values of the resistors R6and R7are respectively 3.0 MΩ or less, and a combined resistance of the resistors R6and R7is 6.0 kΩ or more.

An example of a semiconductor component is a switching element for driving the piezoelectric transformer PT. A switching element such as the transistor Tr is more likely to suffer electrostatic withstand voltage breakdown in comparison to other semiconductor components. Accordingly, by applying the present embodiment, electrostatic withstand voltage breakdown of a switching element should be reduced.

Other Embodiments

This application claims the benefit of Japanese Patent Application No. 2017-024262, filed Feb. 13, 2017, and Japanese Patent Application No. 2017-024263, filed Feb. 13, 2017 which are hereby incorporated by reference herein in their entirety.