DISPLAY PANEL

A display panel, in which a plurality of first emission areas, a plurality of second emission areas, and a plurality of third emission areas are defined, includes a first spacer spaced apart from one of the plurality of third emission areas in a first direction, a second spacer spaced apart from the first spacer in the first direction, and a plurality of protruding portions spaced apart from the plurality of third emission areas in a second direction crossing the first direction, wherein m third emission areas (m is an integer greater than or equal to 4) among the plurality of third emission areas are between the first spacer and the second spacer.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority to and the benefit of Korean Patent Application No. 10-2020-0111137, filed on Sep. 1, 2020, the entire content of which is hereby incorporated by reference.

BACKGROUND

One or more embodiments of the present disclosure relate to a display panel with improved manufacturing yield and reliability.

A display panel may include a plurality of pixels. Each of the plurality of pixels may include a light emitting layer between electrodes facing each other. The light emitting layer may be formed through various suitable methods, and one of them may be a deposition method using a mask. The display panel may include spacers supporting the mask.

SUMMARY

One or more embodiments of the present disclosure provide a display panel with improved manufacturing yield and reliability.

One or more embodiments of the present disclosure provide a display panel in which a plurality of first emission areas, a plurality of second emission areas, and a plurality of third emission areas are defined, the display panel including: a first spacer spaced apart from one of the plurality of third emission areas in a first direction; a second spacer spaced apart from the first spacer in the first direction; and a plurality of protruding portions spaced apart from the plurality of third emission areas in a second direction crossing the first direction, wherein m third emission areas (m is an integer greater than or equal to 4) among the plurality of third emission areas are between the first spacer and the second spacer.

In one or more embodiments, the plurality of protruding portions may be arranged in the first direction between the first spacer and the second spacer, and the plurality of protruding portions may have the same shape.

In one or more embodiments, an interval between adjacent protruding portions among the plurality of protruding portions in a region near the first spacer may be greater than an interval between adjacent protruding portions in a central region between the first spacer and the second spacer.

In one or more embodiments, an interval between adjacent ones of the plurality of protruding portions may be the same.

In one or more embodiments, the plurality of protruding portions may be respectively adjacent to boundaries between adjacent third emission areas among the m third emission areas.

In one or more embodiments, the plurality of first emission areas and the plurality of second emission areas may be alternately arranged one by one along the first direction, and wherein the plurality of protruding portions may be respectively adjacent to boundaries between adjacent first emission area and second emission area among the plurality of first emission areas and the plurality of second emission areas.

In one or more embodiments, the plurality of protruding portions may include a first protruding portion spaced apart from the first spacer in the second direction, and a second protruding portion spaced apart from the first spacer in the first direction, and wherein a shape of the first protruding portion and a shape of the second protruding portion may be different from each other.

In one or more embodiments, the second protruding portion may include a first portion between adjacent first emission area and second emission area among the plurality of first emission areas and the plurality of second emission areas, a second portion extending from a first end portion of the first portion, and a third portion extending from a second end portion of the first portion, and wherein a width of the first portion in the first direction may be smaller than a maximum width of each of the second portion and the third portion in the first direction.

In one or more embodiments, an area of the first protruding portion may be smaller than an area of the second protruding portion.

In one or more embodiments, each of the first spacer and the second spacer may include a first portion, a second portion protruding from the first portion, and a third portion protruding from the first portion, wherein the second portion and the third portion may be spaced apart in the second direction with the first portion therebetween, and wherein on a plane, a shape of the first portion may be a square, and a shape of each of the second portion and the third portion may be a triangle.

In one or more embodiments, the plurality of protruding portions may include a first protruding portion and a second protruding portion coupled integrally with the first spacer, and a third protruding portion and a fourth protruding portion coupled integrally with the second spacer, wherein the first protruding portion and the second protruding portion may be spaced apart in the second direction with the first spacer therebetween, wherein the third protruding portion and the fourth protruding portion may be spaced apart in the second direction with the second spacer therebetween.

In one or more embodiments, the display panel may further include one light emitting layer between the first spacer and the second spacer, wherein the m third emission areas (m is an integer of 2 or more) may be defined in the one light emitting layer.

In one or more embodiments, the plurality of protruding portions may be adjacent to the one light emitting layer.

In one or more embodiments, a width of each of the plurality of third emission areas in the first direction may be greater than a width of the first spacer in the first direction, and wherein a width of each of the plurality of third emission areas in the second direction may be smaller than a width of the first spacer in the second direction.

In one or more embodiments, a width of the first spacer in the first direction may be greater than a width of each of the plurality of first emission areas and the plurality of second emission areas in the first direction, and wherein a width of the first spacer in the second direction may be greater than a width of each of the plurality of first emission areas and the plurality of second emission areas in the second direction.

In one or more embodiments of the present disclosure, a display panel includes: one light emitting layer; a first spacer; a second spacer spaced apart from the first spacer in a first direction with the one light emitting layer therebetween; and a plurality of protruding portions arranged along the first direction and spaced apart from the one light emitting layer in a second direction crossing the first direction.

In one or more embodiments, a plurality of first emission areas may be defined in the one light emitting layer.

In one or more embodiments, an area of each of the first spacer and the second spacer may be larger than an area of each of the plurality of protruding portions.

In one or more embodiments, an interval between adjacent protruding portions among the plurality of protruding portions may be the same.

In one or more embodiments, an interval between adjacent protruding portions among the plurality of protruding portions in a region near the first spacer may be greater than an interval between adjacent protruding portions in a central region between the first spacer and the second spacer.

DETAILED DESCRIPTION

In this specification, when an element (or region, layer, part, etc.) is referred to as being “on”, “connected to”, or “coupled to” another element, it means that it may be directly placed on/connected to/coupled to other components (without any intervening third components therebetween), or a third component may be arranged between them.

Like reference numerals refer to like elements. Additionally, in the drawings, the thicknesses, proportions, and dimensions of components are exaggerated for effective description.

“And/or” includes all of one or more combinations defined by related components. As used herein, expressions such as “at least one of”, “one of”, and “selected from”, when preceding a list of elements, modify the entire list of elements and do not modify the individual elements of the list. Further, the use of “may” when describing embodiments of the present disclosure refers to “one or more embodiments of the present disclosure”.

It will be understood that the terms “first” and “second” are used herein to describe various components but these components should not be limited by these terms. The above terms are used only to distinguish one component from another. For example, a first component may be referred to as a second component and vice versa without departing from the scope of the present disclosure. The terms of a singular form may include plural forms unless otherwise specified.

In addition, terms such as “below”, “the lower side”, “on”, and “the upper side” are used to describe a relationship of configurations shown in the drawings. The terms are described as a relative concept based on a direction shown in the drawings, and are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the drawings.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this present disclosure belongs. In addition, terms defined in a commonly used dictionary should be interpreted as having a meaning consistent with the meaning in the context of the related technology, and unless interpreted in an ideal or overly formal sense, the terms are explicitly defined herein.

In various embodiments of the present disclosure, the term “include,” “comprise,” “including,” or “comprising,” specifies a property, a region, a fixed number, a step, a process, an element and/or a component but does not exclude other properties, regions, fixed numbers, steps, processes, elements and/or components.

FIG. 1is a plan view of a display device according to one or more embodiments of the present disclosure.

Referring toFIG. 1, the display device100may be a device that is activated according to an electrical signal. For example, the display device100may be a mobile phone, a tablet, a car navigation system, a game console, and/or a wearable device, but is not limited thereto. InFIG. 1, it is illustrated that the display device100is a tablet (or a medium-sized mobile device).

The display device100may include a display area100A and a peripheral area100N. The peripheral area100N may enclose the display area100A, and in some embodiments, the peripheral area100N may be omitted.

The display device100may display an image through the display area100A. The display area100A may include a plane (e.g., a planar surface) defined by the first direction DR1and the second direction DR2. The display area100A may further include curved surfaces each bent from at least two sides of the plane. However, the shape of the display area100A is not limited thereto. For example, the display area100A may include only the plane, and the display area100A may further include at least two or more, for example, four curved surfaces each bent from four sides of the plane.

The thickness direction of the display device100may be parallel to the third direction DR3intersecting the first direction DR1and the second direction DR2. Accordingly, the front (or upper) and rear (or lower) surfaces of the members constituting the display device100may be defined with respect to the third direction DR3.

FIG. 2Ais a schematic cross-sectional view of a display device according to one or more embodiments of the present disclosure.

Referring toFIG. 2A, the display device100may include a display panel110(or a display layer) and a sensor layer120.

The display panel110may be a component that substantially generates an image. The display panel110may be a light emitting display layer, and for example, the display panel110may be an organic light emitting display layer, a quantum dot display layer, and/or a micro LED display layer.

The display panel110may include a base substrate111, a circuit layer112, a light emitting element layer113, a sealing substrate114, and a coupling member115.

The base substrate111may provide a base surface on which the circuit layer112is positioned. The base substrate111may be a glass substrate, a metal substrate, and/or a polymer substrate, but is not particularly limited thereto.

The circuit layer112may be on the base substrate111. The circuit layer112may include an insulating layer, a semiconductor pattern, a conductive pattern, and a signal line. Here, an insulating layer, a semiconductor layer, and a conductive layer may first be formed on the base substrate111by a method such as coating and/or deposition, and thereafter, the formed insulating layer, semiconductor layer, and conductive layer may be selectively patterned through a plurality of photolithography processes. After that, a semiconductor pattern, a conductive pattern, and a signal line included in the circuit layer112may be formed.

The light emitting element layer113may be on the circuit layer112. The light emitting element layer113may include a light emitting element. For example, the light emitting element layer113may include an organic light emitting material, a quantum dot, a quantum rod, and/or a micro LED.

The sealing substrate114may be on the light emitting element layer113. The sealing substrate114may protect the light emitting element layer113from foreign substances such as moisture, oxygen, and/or dust particles.

The coupling member115may be between the base substrate111and the sealing substrate114. The coupling member115may couple the sealing substrate114to the base substrate111or the circuit layer112. The coupling member115may include an inorganic material or an organic material. For example, the inorganic material may include a frit seal, and the organic material may include a photocurable resin and/or a photoplastic resin. However, the material constituting the coupling member115is not limited to the above examples.

The sensor layer120may be on the display panel110. The sensor layer120may detect an external input applied from the outside. The external input may be a user's input. The user's input may include various suitable types of external inputs such as a part of the user's body, light, heat, pen, and/or pressure.

The sensor layer120may be directly on the sealing substrate114. “Directly disposed” may mean that a third component is not present between the sensor layer120and the display panel110. For example, a separate adhesive member may not be provided between the sensor layer120and the display panel110. However, the present disclosure is not limited thereto, and an adhesive layer may be further positioned between the sensor layer120and the sealing substrate114.

FIG. 2Bis a schematic cross-sectional view of a display device according to one or more embodiments of the present disclosure.

Referring toFIG. 2B, the display device100_1may include a display panel110_1(or a display layer) and a sensor layer120_1. The display panel110_1may include a base layer111_1, a circuit layer112_1, a light emitting element layer113_1, and a sealing layer114_1.

The base layer111_1may provide a base surface on which the circuit layer112_1is positioned. The base layer111_1may be a glass substrate, a metal substrate, and/or a polymer substrate. However, the embodiments are not limited thereto, and the base layer111_1may be an inorganic layer, an organic layer, or a composite material layer.

The base layer111_1may have a multilayer structure. For example, the base layer111_1may include a first synthetic resin layer, a silicon oxide (SiOx) layer on the first synthetic resin layer, an amorphous silicon (a-Si) layer on the silicon oxide layer, and a second synthetic resin layer on the amorphous silicon layer. The silicon oxide layer and the amorphous silicon layer may be referred to as a base barrier layer.

Each of the first and second synthetic resin layers may include a polyimide resin. In one or more embodiments, each of the first and second synthetic resin layers may include at least one of acrylic resin, methacrylate resin, polyisoprene resin, vinyl resin, epoxy resin, urethane resin, cellulose resin, siloxane resin, polyamide resin, or perylene resin. As used herein, in the present specification “˜˜” resin or “˜˜”-based resin may refer to a resin including a functional group of “˜˜”.

The circuit layer112_1may be on the base layer111_1. The light emitting element layer113_1may be on the circuit layer112_1. The light emitting element layer113_1may include a light emitting element. For example, the light emitting element layer113_1may include an organic light emitting material, a quantum dot, a quantum rod, and/or a micro LED.

The sealing layer114_1may be on the light emitting element layer113_1. The sealing layer114_1may include an inorganic layer and an organic layer. The inorganic layer may protect the light emitting element layer113_1from moisture and/or oxygen, and the organic layer may protect the light emitting element layer113_1from foreign substances such as dust particles. The inorganic layer may include a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, an aluminum oxide layer, and/or the like, but is not limited thereto. The organic layer may include an acrylic organic layer, but is not limited thereto.

The sensor layer120_1may be formed on the display panel110_1through a continuous process. For example, a separate adhesive member may not be provided between the sensor layer120_1and the display panel110_1.

FIG. 3Ais a cross-sectional view of a display panel according to one or more embodiments of the present disclosure.

Referring toFIG. 3A, the display panel110may include a plurality of insulating layers, a semiconductor pattern, a conductive pattern, and a signal line. Here, an insulating layer, a semiconductor layer, and a conductive layer may first be formed by a method such as coating and/or vapor deposition. Thereafter, the insulating layer, the semiconductor layer, and the conductive layer may be selectively patterned by a photolithography method. In this way, semiconductor patterns, conductive patterns, and signal lines included in the circuit layer112and the light emitting element layer113of the display panel110are formed. Thereafter, a sealing substrate114covering the light emitting element layer113may be formed.

At least one inorganic layer is formed on the upper surface of the base substrate111. The inorganic layer may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon oxynitride, zirconium oxide, or hafnium oxide. The inorganic layer may be formed in multiple layers. The multi-layered inorganic layers may constitute a barrier layer112brand/or a buffer layer112bf.

The barrier layer112brmay be on the base substrate111. The barrier layer112brmay include any one of silicon oxide, silicon nitride, and/or silicon oxynitride. The buffer layer112bfmay be on the barrier layer112br.The buffer layer112bfmay improve bonding force between the base substrate111and the semiconductor pattern. The buffer layer112bfmay include at least one of silicon oxide, silicon nitride, or silicon oxynitride. For example, the buffer layer112bfmay include alternately stacked silicon oxide and silicon nitride layers.

The semiconductor pattern may be on the buffer layer112bf.The semiconductor pattern may include polysilicon. However, the present disclosure is not limited thereto, and the semiconductor pattern may include an amorphous silicon and/or an oxide semiconductor.

FIG. 3Aillustrates only some semiconductor patterns, and semiconductor patterns may be further provided in other areas. The semiconductor pattern may be arranged in a specific (or set) rule across the pixels. Semiconductor patterns may have different electrical properties depending on whether they are doped or not. The semiconductor pattern may include a first area having high conductivity and a second area having low conductivity. The first area may be doped with an N-type dopant or a P-type dopant (e.g., may include a P-type transistor or an N-type transistor). The P-type transistor may include a doping area doped with a P-type dopant, and the N-type transistor may include a doping area doped with an N-type dopant. The second area may be a non-doping area, or an area doped with a lower concentration of the dopant than the first area.

The conductivity of the first area is greater than that of the second area, and the first area may substantially serve as an electrode or a signal line. The second area may substantially correspond to the active (or channel) region of the transistor. For example, a part of the semiconductor pattern may be an active region of the transistor, another part may be a source or drain of the transistor, and another part may be a connection electrode or a connection signal line.

The pixel may include a plurality of transistors, a capacitor, and a light emitting element LD. InFIG. 3A, one transistor TR and a light emitting element LD included in a pixel are illustrated as an example.

The source SE, the active region AC, and the drain DE of the transistor TR may be formed from the semiconductor pattern. The source SE and the drain DE may extend in opposite directions from the active region AC in a cross sectional view.

A first insulating layer10may be on the buffer layer112bf.The first insulating layer10may overlap a plurality of pixels in common and cover the semiconductor pattern. The first insulating layer10may be an inorganic layer and/or an organic layer, and may have a single layer or multilayer structure. The first insulating layer10may include at least one of aluminum oxide, titanium oxide, silicon oxide silicon oxynitride, zirconium oxide, or hafnium oxide. For example, the first insulating layer10may be a single-layer silicon oxide layer. In addition to the first insulating layer10, an insulating layer of the circuit layer112(to be described hereinbelow) may be an inorganic layer and/or an organic layer, and may have a single layer or multilayer structure. The inorganic layer may include at least one of the above-mentioned materials, but is not limited thereto.

The gate GT of the transistor TR is on the first insulating layer10. The gate GT may be a part of a metal pattern. The gate GT overlaps the active region AC. In the process of doping the semiconductor pattern, the gate GT may function as a mask.

A second insulating layer20is on the first insulating layer10and may cover the gate GT. The second insulating layer20may be an inorganic layer and/or an organic layer, and may have a single layer or multilayer structure. For example, the second insulating layer20may include at least one of a silicon oxide layer, a silicon nitride layer, or a silicon oxynitride layer.

A third insulating layer30may be on the second insulating layer20. The third insulating layer30may have a multilayer structure. For example, the third insulating layer30may include at least one of a silicon oxide layer, a silicon nitride layer, or a silicon oxynitride layer. A first connection electrode CNE1may be on the third insulating layer30. The first connection electrode CNE1may be connected to the drain DE of the transistor TR through a contact hole penetrating the first, second, and third insulating layers10,20, and30.

A fourth insulating layer40may be on the third insulating layer30. The fourth insulating layer40may be an organic layer.

A second connection electrode CNE2may be on the fourth insulating layer40. The second connection electrode CNE2may be connected to the first connection electrode CNE1through a contact hole penetrating the fourth insulating layer40.

A fifth insulating layer50is on the fourth insulating layer40and may cover the second connection electrode CNE2. The fifth insulating layer50may be an organic layer.

The light emitting element layer113including the light emitting element LD may be on the circuit layer112. The light emitting element LD may include a pixel electrode AE (or an anode electrode or a first electrode), a light emitting layer EL, and a common electrode CE (or a second electrode).

The pixel electrode AE may be on the fifth insulating layer50. The pixel electrode AE may be connected to the second connection electrode CNE2through a contact hole penetrating the fifth insulating layer50.

A sixth insulating layer60is on the fifth insulating layer50and may cover a part of the pixel electrode AE. An opening60dois defined in the sixth insulating layer60. The opening60doof the sixth insulating layer60exposes at least a part of the pixel electrode AE. The opening60doof the sixth insulating layer60may define an emission area PXA. A non-emission area NPXA may surround the emission area PXA.

The sixth insulating layer60may include a pixel defining film60dand a spacer60s.The spacer60smay be a protruding portion more (e.g., higher) than the pixel defining film60d.The opening60domay be defined in the pixel defining film60d.The pixel defining film60dand the spacer60smay be simultaneously (e.g., concurrently) formed by one mask. The mask may be a halftone mask.

The light emitting layer EL may be on the pixel electrode AE. The light emitting layer EL may be in an area corresponding to the opening60do.For example, the light emitting layer EL may be formed separately on each of the pixels. In one or more embodiments of the present disclosure, a first color light emitting layer is provided by being connected to some of the plurality of pixels among the plurality of pixels, and a second color light emitting layer and a third color light emitting layer may be separately provided to each of the pixels. The first color may be blue, the second color may be red, and the third color may be green, but this is not particularly limited.

The common electrode CE may be on the light emitting layer EL. The common electrode CE has an integral shape and may be commonly provided on a plurality of pixels.

In one or more embodiments, a hole control layer may be between the pixel electrode AE and the light emitting layer EL. The hole control layer may include a hole transport layer and may further include a hole injection layer. An electron control layer may be between the light emitting layer EL and the common electrode CE. The electron control layer may include an electron transport layer, and may further include an electron injection layer. The hole control layer and the electron control layer may be commonly formed in a plurality of pixels using an open mask.

The sealing substrate114may be on the light emitting element layer113.

FIG. 3Bis a cross-sectional view of a display panel according to one or more embodiments of the present disclosure. In the description ofFIG. 3B, the same (or substantially similar) reference numerals are used for the same (or substantially similar) components as those described inFIG. 3A, and redundant descriptions thereof are not provided.

Referring toFIG. 3B, a pixel defining film60-2and a spacer70of a display panel110_2are different from the pixel defining layer and the spacer in the sixth insulating layer60ofFIG. 3A.

The pixel defining film60-2is on the fifth insulating layer50and may cover a portion of the pixel electrode AE. In the pixel defining film60-2, an opening60dois defined. The opening60doof the pixel defining film60-2exposes at least a part of the pixel electrode AE. The opening60doof the pixel defining film60-2may define the emission area PXA. The non-emission area NPXA may surround the emission area PXA.

The spacer70may be on the pixel defining film60-2. The spacer70may be formed through a process separate from the formation of the pixel defining film60-2.

FIG. 4is a plan view illustrating a partial configuration of a display panel according to one or more embodiments of the present disclosure.

Referring toFIG. 4, a plurality of first emission areas PXA1(hereinafter referred to as first emission areas PXA1) defined in the display panel110(seeFIG. 3A), a plurality of second emission areas PXA2(hereinafter referred to as second emission areas PXA2), and a plurality of third emission areas PXA3(hereinafter referred to as third emission areas PXA3) are illustrated. Each of the first to third emission areas PXA1, PXA2, and PXA3may correspond to the emission area PXA (seeFIG. 3A) described with reference toFIG. 3A.

The first emission areas PXA1and the second emission areas PXA2may be alternately arranged one by one. For example, one first emission area PXA1and one second emission area PXA2may be alternately arranged along the first direction DR1.

The third emission areas PXA3may be arranged along the first direction DR1. One third emission area PXA3may overlap one first emission area PXA1and one second emission area PXA2in a second direction DR2.

An area of each of the third emission areas PXA3may be larger than an area of each of the first emission areas PXA1and an area of each of the second emission areas PXA2. The areas may mean an area when viewed from a plane in a thickness direction of the display panel110(refer toFIG. 3A) or in a direction parallel to the third direction DR3.

One of the first emission areas PXA1and the second emission areas PXA2may be red emission areas, and the other may be green emission areas. The third emission areas PXA3may be blue emission areas. By providing a large area of the third emission areas PXA3including a blue light emitting layer having a relatively short lifespan, the lifespan of the display device100may be improved.

A first spacer MS1, a second spacer MS2, and a plurality of protruding portions SS (hereinafter, protruding portions SS) may be in the non-emission area NPXA. The protruding portions SS may be referred to as sub-spacers, additional spacers, and/or supports.

The first spacer MS1may be between the third emission areas PXA3. For example, the first spacer MS1may be to be spaced apart from one of the third emission areas PXA3in the first direction DR1. The second spacer MS2may be a spacer closest to the first spacer MS1in the first direction DR1.

m number of third emission areas PXA3may be between the first spacer MS1and the second spacer MS2. m is an integer of 4 or more, and may be 4. When compared to the case where spacers are between the third emission areas PXA3, in one or more embodiments of the present disclosure, areas occupied by the first spacer MS1and the second spacer MS2may be reduced. For example, as the area occupied by the first and second spacers MS1and MS2decreases, an area of each of the third emission areas PXA3may increase. When the area of each of the third emission areas PXA3increases, the lifespan of each of the third emission areas PXA3may be improved.

The first spacer MS1may have a first width WTM1in the first direction DR1and a second width WTM2in the second direction DR2. The first width WTM1may be greater than each of a first width WTM11in the first direction DR1of the first emission area PXA1and a first width WTM21in the first direction DR1of the second emission area PXA2. The first width WTM1of the first spacer MS1may be smaller than a first width WTM31in the first direction DR1of the third emission area PXA3.

The second width WTM2may be greater than each of a second width WTM12in the second direction DR2of the first emission area PXA1and a second width WTM22in the second direction DR2of the second emission area PXA2. The second width WTM2may be larger than a second width WTM32in the second direction DR2of the third emission area PXA3, but is not particularly limited thereto, and the second width WTM2may be the same as the second width WTM32of the third emission area PXA3or may be smaller than the second width WTM32.

The protruding portions SS may be spaced apart from the third emission areas PXA3in the second direction DR2. The protruding portions SS may be between the first spacer MS1and the second spacer MS2. The protruding portions SS may be arranged to be spaced apart along the first direction DR1.

The shape of each of the protruding portions SS may be different from the shape of the first spacer MS1. For example, the first spacer MS1may have a square shape. The shapes of the protruding portions SS may be substantially the same as each other. For example, the shape of each of the protruding portions SS may be a triangle. The area of each of the protruding portions SS may be smaller than the area of the first spacer MS1. The area may mean an area as viewed from the third direction DR3.

The protruding portions SS may include a first protruding portion SS1, a second protruding portion SS2, a third protruding portion SS3, a fourth protruding portion SS4, and a fifth protruding portion SSS. The first to fifth protruding portions SS1, SS2, SS3, SS4, and SS5may be arranged to be spaced apart from each other along the first direction DR1.

The first protruding portion SS1may be closest to the first spacer MS1among the first to fifth protruding portions SS1, SS2, SS3, SS4, and SS5, and the third protruding portion SS3may be spaced farthest from both the first and second spacers MS1and MS2among the first to fifth protruding portions SS1, SS2, SS3, SS4, and SS5. The interval DT1between the first protruding portion SS1and the second protruding portion SS2may be greater than the interval DT2between the second protruding portion SS2and the third protruding portion SS3. The first protruding portion SS1and the second protruding portion SS2are adjacent protruding portions among the first to fifth protruding portions SS1, SS2, SS3, SS4, and SS5in a region near the first spacer MS1. The second protruding portion SS2and the third protruding portion SS3are adjacent protruding portions among the first to fifth protruding portions SS1, SS2, SS3, SS4, and SS5in a central region between the first spacer MS1and the second spacer MS2.

The third protruding portion SS3may be adjacent to one spacer arranged in another column in the second direction DR2. For example, the four third emission areas PXA3arranged in the first direction DR1between the first and second spacers MS1and MS2arranged in the n-th column may be arranged in zigzag (e.g., checkered arrangement) with four third emission areas PXA3arranged in a first direction DR1between the first and second spacers MS1and MS2in each of the (n−1)-th column and the (n+1)-th column. For example, a substantially central portion of the four third emission areas PXA3in the (n−1)-th column may overlap the first spacer MS1in the n-th column in the second direction DR2.

According to one or more embodiments of the present disclosure, the protruding portions may be more densely positioned in a region most spaced apart from both the first spacer MS1and the second spacer MS2than in regions adjacent to the first spacer MS1or the second spacer MS2.

According to one or more embodiments of the present disclosure, the area of the third emission area PXA3may be increased by reducing the density or number of the first spacer MS1and the second spacer MS2. Accordingly, the lifespan of the display panel110or110_1(refer toFIG. 2A or 2B) may be improved. In addition, the protruding portions SS may be in an area where the first spacer MS1and the second spacer MS2are not provided. In this case, during the process of forming the display panel110or110_1(seeFIG. 2A or 2B), the probability of occurrence of imprinting on the light emitting layer EL (seeFIG. 3A) by the mask may be eliminated or reduced. In addition, during the process of forming the light emitting layer, the mask is sufficiently supported, so that the probability that the light emitting layer is formed in an area other than the designed area may be eliminated or reduced. Accordingly, a failure rate of the display panel110or110_1(refer toFIG. 2A or 2B) may be reduced, and a manufacturing yield may be improved.

FIG. 5is a cross-sectional view of a display panel cut through an area corresponding to I-I′ ofFIG. 4.FIG. 6is a cross-sectional view of a display panel cut through an area corresponding to II-II′ ofFIG. 4.

Referring toFIG. 5, at least four pixel electrodes AE1, AE2, AE3, and AE4may be between the first spacer MS1and the second spacer MS2. Accordingly, at least four emission areas PXA3_1, PXA3_2, PXA3_3, and PXA3_4may be defined between the first spacer MS1and the second spacer MS2. One light emitting layer EL1may be positioned on the four pixel electrodes AE1, AE2, AE3, and AE4. For example, at least four emission areas PXA3_1, PXA3_2, PXA3_3, and PXA3_4may be defined in one light emitting layer EL1.

A first spacer MS1and a second spacer MS2are in a first direction DR1based on one light emitting layer EL1, and the protruding portions SS (refer toFIG. 4) may be in the second direction DR2.

Referring toFIGS. 5 and 6, the sixth insulating layer60(seeFIG. 3A) may have a first thickness TK1at a portion overlapping the first spacer MS1, and may have a second thickness TK2at a portion overlapping the protruding portion SS. Each of the first thickness TK1and the second thickness TK2may be defined as a maximum thickness within the portions.

The first thickness TK1and the second thickness TK2may be substantially the same as each other. “Substantially the same” may mean that they are the same to each other within a process error range. However, the present disclosure is not particularly limited thereto. The first thickness TK1may be larger than the second thickness TK2.

FIG. 7is a plan view illustrating spacers and protruding portions in area AA′ ofFIG. 4.

Referring toFIGS. 4 and 7, the AA′ area is an area corresponding to an area including the first spacer MS1and the protruding portions SS. The AA′ area indicates the smallest unit of spacers that are identically repeatedly arranged in the display panel110(seeFIG. 3A). When the spacers included in the AA′ area are repeatedly arranged in the first direction DR1and the second direction DR2, they may have the arrangement shape shown inFIG. 4. The spacers include all spacers and protruding portions included in the AA′ area.

The number and/or area of the protruding portions SS may be determined so that the area ratio of the spacers to the AA′ area does not exceed a predetermined (or set) value. For example, when applied to the display device100illustrated inFIG. 2A, the ratio may be 10%. In one or more embodiments, when applied to the display device100_1illustrated inFIG. 2B, the ratio may be 2%. However, the above figures are only examples and are not particularly limited thereto.

Also, the spacers may not overlap contact holes formed in the insulating layers. For example, the first spacer MS1and the protruding portions SS may not be on the contact hole formed in the fifth insulating layer50illustrated inFIG. 3A. In this case, uniformity of each of the first thickness TK1(seeFIG. 5) and the second thickness TK2(seeFIG. 6) is improved, so that the manufacturing yield of the display panel110may be improved.

FIG. 8is a plan view illustrating a partial configuration of a display panel according to one or more embodiments of the present disclosure. In the description ofFIG. 8, the same (or substantially similar) reference numerals are used for the same (or substantially similar) components as those described inFIG. 4, and redundant descriptions thereof are not provided.

Referring toFIG. 8, protruding portions SSa may be adjacent to boundaries BDP between the third emission areas PXA3_1and PXA3_2adjacent to each other among the m third emission areas PXA3between the first spacer MS1and the second spacer MS2.

For example, when four third emission areas PXA3are arranged between the first spacer MS1and the second spacer MS2, the number of the boundaries BDP is three. Accordingly, the number of protruding portions SSa arranged in the first direction DR1may also be three. The protruding portions SSa may include a first protruding portion SSa1, a second protruding portion SSa2, and a third protruding portion SSa3.

The first to third protruding portions SSa1, SSa2, and SSa3may be arranged at equal intervals from each other. For example, the interval DT1abetween the first protruding portion SSa1and the second protruding portion SSa2may be the same as the interval DT2abetween the second protruding portion SSa2and the third protruding portion SSa3.

FIG. 9is a plan view illustrating a partial configuration of a display panel according to one or more embodiments of the present disclosure. In the description ofFIG. 9, the same (or substantially similar) reference numerals are used for the same (or substantially similar) components as those described inFIG. 4, and redundant descriptions thereof are not provided.

Referring toFIG. 9, protruding portions SSb may be between the first spacer MS1and the second spacer MS2. The protruding portions SSb may include first to seventh protruding portions SSb1, SSb2, SSb3, SSb4, SSb5, SSb6, and SSb7. The first to seventh protruding portions SSb1, SSb2, SSb3, SSb4, SSb5, SSb6, and SSb7may be adjacent to boundaries BDPx, respectively, between the first and second emission areas PXA1and PXA2adjacent to the m third emission areas PXA3.

For example, when four third emission areas PXA3are arranged between the first spacer MS1and the second spacer MS2, the total number of the first emission areas PXA1and the second emission areas PXA2adjacent to the four third emission areas PXA3in the second direction DR2may be eight. In this case, the number of the boundaries BDPx may be seven. Accordingly, the number of protruding portions SSb arranged in the first direction DR1may also be seven.

FIG. 10is a plan view illustrating a partial configuration of a display panel according to one or more embodiments of the present disclosure. In the description ofFIG. 10, the same (or substantially similar) reference numerals are used for the same (or substantially similar) components as those described inFIG. 4, and redundant descriptions thereof are not provided.

Referring toFIG. 10, protruding portions SSc may include a first protruding portion SS1cand a second protruding portion SS2c.The first protruding portion SS1cand the second protruding portion SS2cmay be divided according to their respective shape. For example, the first protruding portion SS1cmay have a smaller area than the second protruding portion SS2c.

The first protruding portion SS1cmay be spaced apart from the first spacer MS1in the second direction DR2. The second protruding portion SS2cmay be spaced apart from the first spacer MS1in the first direction DR1.

The distance between one first spacer MS1and another first spacer MS1closest to the one first spacer MS1in the second direction DR2is smaller than the distance between the first spacer MS1and the closest second spacer MS2in the first direction DR1. Accordingly, the size of the first protruding portion SS1cspaced apart from the first spacer MS1in the second direction DR2may be smaller than the size of the second protruding portion SS2c.

The second protruding portion SS2cmay include a first portion SS21, a second portion SS22, and a third portion SS23. The first portion SS21may have a bar shape extending along the second direction DR2, and the first portion SS21may be between the first emission area PXA1and the second emission area PXA2in the first direction DR1.

The second portion SS22may extend from the first end of the first portion SS21, and the third portion SS23may extend from the second end of the first portion SS21. The first end of the first portion SS21and the second end of the first portion SS21may be those in the second direction DR2(e.g., in the extension direction of the first portion SS21).

The width WTS1of the first portion SS21in the first direction DR1may be smaller than each of the maximum width WTS2in the first direction DR1of the second portion SS22and the maximum width WTS3in the first direction DR1of the third portion SS23.

The second protruding portion SS2cmay have a dumbbell shape or a ribbon shape when viewed from a plane. It is shown inFIG. 10that each of the second portion SS22and the third portion SS23has a triangular shape, but the second portion SS22and the third portion SS23may be transformed into various suitable shapes such as a square and/or a circle.

Four second protruding portions SS2cand one first protruding portion SS1cmay be arranged along the first direction DR1between the first spacer MS1and the second spacer MS2. For example, the second protruding portions SS2cmay be spaced apart in the first direction DR1and may be arranged at equal intervals. The first protruding portion SS1cmay be at the middle between the first spacer MS1and the second spacer MS2. Thus, the first spacer MS1, the two second protruding portions SS2c,the first protruding portion SS1c,the two second protruding portions SS2c,and the second spacers MS2may be sequentially arranged along the first direction DR1.

Four second protruding portions SS2cand one first protruding portion SS1cmay be arranged at both a right side and a left side (e.g., along the second direction DR2) of the four third emission areas PXA3positioned between the first spacer MS1and the second spacer MS2.

FIG. 11is a plan view illustrating a partial configuration of a display panel according to one or more embodiments of the present disclosure. In the description ofFIG. 11, the same (or substantially similar) reference numerals are used for the same (or substantially similar) components as those described inFIG. 10, and redundant descriptions thereof are not provided.

Referring toFIG. 11, protruding portions SSd may include a first protruding portion SS1dand a second protruding portion SS2d.The first protruding portion SS1dand the second protruding portion SS2dmay be divided according to their respective shape. For example, the first protruding portion SS1dmay have a smaller area than the second protruding portion SS2d.

The first protruding portion SS1dmay be spaced apart from the first spacer MS1in the second direction DR2. The second protruding portion SS2dmay be spaced apart from the first spacer MS1in the first direction DR1.

Two second protruding portions SS2dand one first protruding portion SS1dmay be arranged along the first direction DR1between the first spacer MS1and the second spacer MS2. For example, one second protruding portion SS2d,the first protruding portion SS1d,and the remaining one second protruding portion SS2dmay be spaced apart in the first direction DR1between the first spacer MS1and the second spacer MS2and arranged at equal intervals.

The two second protruding portions SS2dand one first protruding portion SS1dmay be adjacent to the boundaries BDP between the third emission areas PXA3adjacent to each other in the first direction DR1among the m third emission areas PXA3between the first spacer MS1and the second spacer MS2.

FIG. 12is a plan view illustrating a partial configuration of a display panel according to one or more embodiments of the present disclosure. In the description ofFIG. 12, the same (or substantially similar) reference numerals are used for the same (or substantially similar) components as those described inFIG. 10, and redundant descriptions thereof are not provided.

Referring toFIG. 12, protruding portions SSe may include a first protruding portion SS1eand a second protruding portion SS2e.The first protruding portion SS1eand the second protruding portion SS2emay be divided according to their respective shape. For example, the first protruding portion SS1emay have a smaller shape than the second protruding portion SS2e.

The first protruding portion SS1emay be spaced apart from the first spacer MS1in the second direction DR2. The second protruding portion SS2emay be spaced apart from the first spacer MS1in the first direction DR1.

Six second protruding portions SS2eand one first protruding portion SS1emay be arranged along the first direction DR1between the first spacer MS1and the second spacer MS2. The six second protruding portions SS2eand one first protruding portion SS1emay be adjacent to the boundaries BDPy between the first emission areas PXA1and the second emission areas PXA2that are arranged in the first direction DR1adjacent to the m third emission areas PXA3between the first spacer MS1and the second spacer MS2.

For example, when four third emission areas PXA3are between the first spacer MS1and the second spacer MS2, the total number of the first emission areas PXA1and the second emission areas PXA2adjacent to the four third emission areas PXA3in the second direction DR2may be eight. In this case, the number of the boundaries BDPy may be seven. Accordingly, the total number of the first protruding portion SS1eand the second protruding portion SS2earranged in the first direction DR1may also be seven.

The three second protruding portions SS2e,the first protruding portions SS1e,and the remaining three second protruding portions SS2eare spaced apart in the first direction DR1between the first spacer MS1and the second spacer MS2and may be arranged at equal intervals. The first protruding portion SS1emay be spaced apart from the spacers in another column in the second direction DR2.

FIG. 13is a plan view illustrating a partial configuration of a display panel according to one or more embodiments of the present disclosure.

Referring toFIG. 13, each of the first spacer MS1aand the second spacer MS2amay include a first portion MS11, a second portion MS12, and a third portion MS13. Each of the second portion MS12and the third portion MS13may protrude from the first portion MS11. The second portion MS12and the third portion MS13may be spaced apart from each other with the first portion MS11therebetween.

When viewed from a plane, the first portion MS11may have a square shape, and each of the second portion MS12and the third portion MS13may have a triangular shape. The first portion MS11, the second portion MS12, and the third portion MS13may have an integral shape connected to each other.

The first portion MS11of the first spacer MS1amay be referred to as a first spacer, the second portion MS12may be referred to as a first protruding portion, and the third portion MS13may be referred to as a second protruding portion. In addition, the first portion MS11of the second spacer MS2amay be referred to as a second spacer, the second portion MS12may be referred to as a third protruding portion, and the third portion MS13may be referred to as a fourth protruding portion.

The first spacer MS1amay have a first width WTM1xin the first direction DR1and a second width WTM2xin the second direction DR2. The first width WTM1xmay be smaller than the first width WTM31in the first direction DR1of the third emission area PXA3.

The second width WTM2xmay be greater than the second width WTM32in the second direction DR2of the third emission area PXA3, but is not particularly limited thereto. For example, in one or more embodiments of the present disclosure, the second width WTM2xof the first spacer MS1a may be equal to or smaller than the second width WTM32of the third emission area PXA3.

FIG. 14is a plan view illustrating a partial configuration of a display panel according to one or more embodiments of the present disclosure. In the description ofFIG. 14, the same (or substantially similar) reference numerals are used for the same (or substantially similar) components as those described inFIG. 13, and redundant descriptions thereof are not provided.

Referring toFIG. 14, when compared withFIG. 13, a protruding portion SSf may be further added.

The protruding portion SSf may be provided in an area between the first spacer MS1aand the second spacer MS2a.The protruding portion SSf may be provided on the left side of the four third emission areas PXA3arranged between the first spacer MS1aand the second spacer MS2a,but is not particularly limited thereto. For example, the protruding portion SSf may be provided on both the left and right sides of the four third emission areas PXA3.

The protruding portion SSf may have a triangular shape, but is not limited thereto. For example, the protruding portion SSf may be transformed into various suitable shapes such as a square, a circle, and/or a polygon.

FIGS. 15A, 15B, and 15Care plan views showing shapes of spacers according to one or more embodiments of the present disclosure.

Referring toFIG. 15A, the spacer MSx may have a shape having at least 4 curves (e.g., curved portions) and 4 straight lines. For example, in the spacer MSx, each vertex part in a rectangle may correspond to a curved shape (e.g., curved portion).

Referring toFIG. 15B, the spacer MSy may have a polygonal shape. For example, the spacer MSy may have a chamfered shape in which a corner part in a rectangular shape is cut obliquely. InFIG. 15B, a shape in which all four corners of a rectangle are chamfered is illustrated as an example, but is not particularly limited thereto. For example, only some of the four corners may be chamfered.

Referring toFIG. 15C, the spacer MSz may be circular. The spacer MSz may have an elliptical shape or may be any suitable figure consisting only of a curve.

The shapes of the spacers MSx, MSy, and MSz shown inFIGS. 15A, 15B, and15C only illustrate some embodiments and the present disclosure is not limited thereto.

FIGS. 16A, 16B, and 16Care plan views showing shapes of a protruding portion according to one or more embodiments of the present disclosure.

Referring toFIG. 16A, the protruding portion SSx may include a first portion SSx1extending in a first direction DR1and a second portion SSx2protruding from the first portion SSx1. The second portion SSx2may extend in a direction parallel to the second direction DR2from the first portion SSx1.

FIG. 16Aillustrates an example in which the second portion SSx2protrudes from the central area of the first portion SSx1, but is not particularly limited thereto. The second portion SSx2may extend from an area skewed toward one end from the central area in the longitudinal direction of the first portion SSx1.

Referring toFIG. 16B, the protruding portion SSy includes a first portion SSy1extending in a first direction DR1and a second portion SSy2extending in the second direction DR2from the end of the first portion SSy1.

Referring toFIG. 16C, the protruding portion SSz may include a first portion SSz1extending in the first direction DR1, a second portion SSz2extending in the second direction DR2from the first end portion of the first portion SSz1, and a third portion SSz3extending in the second direction DR2from the second end portion of the first portion SSz1.

The shapes of the protruding portions SSx, SSy, and SSz shown inFIGS. 16A, 16B, and 16Care only illustrate some embodiments and the present disclosure is not limited thereto.

FIG. 17is a diagram illustrating a part of a process of manufacturing a display panel according to one or more embodiments of the present disclosure.FIG. 18is a diagram illustrating an enlarged area BB′ ofFIG. 17.

Referring toFIGS. 17 and 18, a deposition device DPD may include a chamber CHB, a deposition source SOC, a stage STG, a moving plate PP, and a mask assembly MA.

The chamber CHB provides an enclosed space. The deposition source SOC, the stage STG, the moving plate PP, and the mask assembly MA may be in the chamber CHB. The chamber CHB may include at least one gate GT. The chamber CHB may be opened and closed by the gate GT. The target substrate SUB may enter and exit through the gate GT provided in the chamber CHB.

The deposition source SOC includes a deposition material. In this case, the deposition material is any suitable material capable of sublimation and/or vaporization, and may include one or more of inorganic, metal, and organic materials. A case where the deposition source SOC according to the present embodiments includes an organic material for manufacturing an organic light emitting element will be described as an example.

The deposition source SOC may extend along the first direction DR1. The deposition source SOC may reciprocate (e.g., may go back and forth) in the deposition source movement direction SOC-D parallel to the second direction DR2, but is not particularly limited thereto.

The stage STG is on the deposition source SOC. The mask assembly MA may be mounted on the stage STG. The mask assembly MA may face the deposition source SOC. The stage STG may support the mask assembly MA by overlapping a frame FR of the mask assembly MA. The stage STG may not overlap an opening OP of the frame FR. For example, the stage STG may be outside the movement path of the deposition material supplied from the deposition source SOC to the target substrate SUB.

The mask assembly MA may include the frame FR and a mask MK. The frame FR may have a ring shape when viewed on a plane. For example, the opening OP may be provided in a central area of the frame FR. The opening OP may be a hole penetrating from the upper surface of the frame FR to the lower surface of the frame FR. The mask MK is on the frame FR and may be coupled to the frame FR. A plurality of masks MK may be provided, and will be referred to as masks MK.

A plurality of opening patterns MKo may be defined in each of the masks MK. The plurality of opening patterns MKo may overlap the opening OP. The opening patterns MKo may be through-holes passing through the lower surfaces of the masks MK from the upper surfaces of the masks MK.

The target substrate SUB is on the mask assembly MA. The deposition material may pass through the opening patterns MKo to be deposited on the target substrate SUB.

The moving plate PP may align the target substrate SUB on the mask assembly MA. For example, the moving plate PP may generate an electrostatic force or a magnetic force to move the target substrate SUB. The moving plate PP may be movable vertically and/or horizontally.

The moving plate PP according to one or more other embodiments of the present disclosure may fix the target substrate SUB on the mask assembly MA. Because the target substrate SUB is fixed on the mask assembly MA by the moving plate PP, the precision of the deposition process may be improved.

Referring toFIG. 18, the mask MK may contact the target substrate SUB. A deposition material may be deposited on the target substrate SUB exposed by the opening pattern MKo of the mask MK.

The target substrate SUB may be, for example, a substrate on which the base substrate111, the circuit layer112, the pixel electrode AE, and the sixth insulating layer60are formed. The sixth insulating layer60may include a pixel defining film60dand a spacer60s.The spacer60smay be a part protruding more than the pixel defining film60d.The spacer60scorresponds to a part including a spacer and a protruding portion described with reference to the previous embodiments.

The mask MK may contact the sixth insulating layer60. The opening pattern MKo of the mask MK may overlap the opening of the sixth insulating layer60on a plane (e.g., in the third direction DR3). The deposition material may be formed on the pixel electrode AE by passing through the opening pattern MKo of the mask MK. For example, a light emitting layer EL may be formed on the pixel electrode AE. The deposition material may be a material constituting the light emitting layer EL. For example, the light emitting layer EL may be formed of a deposition material deposited on the target substrate SUB.

The light emitting layer EL may include a light emitting material. For example, the light emitting layer EL may be formed of at least one of materials capable of emitting red, green, or blue light. The light emitting layer EL may include a fluorescent material and/or a phosphorescent material. The light emitting layer EL may include an organic light emitting material and/or an inorganic light emitting material.

FIG. 19Ais a plan view illustrating a first mask assembly used when forming light emitting layers.FIG. 19Bis a diagram illustrating an enlarged view of an area CC′ ofFIG. 19A.FIG. 20Ais a plan view illustrating a second mask assembly used when forming light emitting layers.FIG. 20Bis an enlarged view of an area DD′ ofFIG. 20A.

Referring toFIGS. 17, 19A, and 19B, the first mask assembly MA1may include a first frame FR1and first masks MK1. The first masks MK1may be stretched and bonded to the first frame FR1through a welding process.

Light emitting layers may be formed in the first emission areas PXA1by using the first mask assembly MA1. First opening patterns MKo1may be formed in each of the first masks MK1. The first opening patterns MKo may be open areas corresponding to the first emission areas PXA1, respectively.

The first masks MK1may be supported by spacers MS and protruding portions SS. The second emission areas PXA2and the third emission areas PXA3_1, PXA3_2, PXA3_3, and PXA3_4may be covered by the first masks MK1.

The target substrate SUB may include a plurality of display panel units DPU. InFIG. 19A, an area corresponding to one display panel unit DPU is indicated by a dotted line. For example, a light emitting layer may be formed in the first emission areas PXA1of the plurality of display panels using one first mask assembly MA1.

Referring toFIGS. 17, 20A, and 20B, the second mask assembly MA2may include a second frame FR2and second masks MK2. The second masks MK2may be stretched and bonded to the second frame FR2through a welding process.

Light emitting layers may be formed in the second emission areas PXA2by using the second mask assembly MA2. Second opening patterns MKo2may be formed in each of the second masks MK2. The second opening patterns MKo2may be open areas respectively corresponding to the second emission areas PXA2.

The second masks MK2may be supported by spacers MS and protruding portions SS. The first emission areas PXA1and the third emission areas PXA3_1, PXA3_2, PXA3_3, and PXA3_4may be covered by the second masks MK2.

The first opening patterns MKo1may respectively correspond to the first emission areas PXA1(refer toFIG. 4), and the second opening patterns MKo2may respectively correspond to the second emission areas PXA2(refer toFIG. 4).

FIG. 21Ais a plan view illustrating a third mask assembly used when forming light emitting layers.FIG. 21Bis an enlarged view of an area EE′ ofFIG. 21A.

Referring toFIGS. 17, 21A, and 21B, the third mask assembly MA3may include a third frame FR3and third masks MK3. The third masks MK3may be stretched and bonded to the third frame FR3through a welding process.

A light emitting layer may be formed in the third emission areas PXA3_1, PXA3_2, PXA3_3, and PXA3_4by using the third mask assembly MA3. Third opening patterns MKo3may be formed in each of the third masks MK3. Each of the third opening patterns MKo3may be an open area corresponding to the third emission areas PXA3_1, PXA3_2, PXA3_3, and PXA3_4.

One third opening pattern MKo3may overlap at least four emission areas PXA3_1, PXA3_2, PXA3_3, and PXA3_4. Accordingly, one light emitting layer EL1(seeFIG. 5) may be formed in the four emission areas PXA3_1, PXA3_2, PXA3_3, and PXA3_4(seeFIG. 5) by one third opening pattern MKo3.

One third opening pattern MKo3may have a larger size than each of one first opening pattern MKo1(seeFIG. 19A) and one second opening pattern MKo2(seeFIG. 20A).

The third masks MK3may be supported by spacers MS and protruding portions SS. The first emission areas PXA1and the second emission areas PXA2may be covered by the third masks MK3.

According to one or more embodiments of the present disclosure, as the density or number of the first and second spacers MS1and MS2(refer toFIG. 4) decreases, the size of the third opening pattern MKo3may be increased. In addition, the protruding portions SS (seeFIG. 4) may be positioned in an area where the first and second spacers MS1and MS2are not provided. In this case, the masks MK1, MK2, and/or MK3(seeFIG. 19A or 20A) may be sufficiently supported during the process of forming the light emitting layer EL1(seeFIG. 5) so that the probability that the light emitting layer EU is formed in an area other than the area where the light emitting layer EU is to be formed (e.g., in an undesired area) may be eliminated or reduced. Accordingly, a failure rate of the display panel110or110_1(refer toFIG. 2A or 2B) may be reduced, and a manufacturing yield may be improved.

FIG. 22is a perspective view illustrating a part of a process of manufacturing a display panel according to one or more embodiments of the present disclosure.

Referring toFIG. 22, a substrate100MG including display panel units DPU may be cut along cutting lines CTL.FIG. 22illustrates an example in which one substrate100MG includes eight display panel units DPU, but the present disclosure is not limited thereto.

According to the above-description, a specific emission area may be increased by reducing the density and/or number of spacers. Accordingly, the lifespan of the display panel may be improved. In addition, protruding portions may be provided in an area where the spacer is not placed. In this case, during the process of forming the display panel, the probability that the light emitting layer is stamped by the mask may be removed or reduced. In addition, during the process of forming the light emitting layer, the mask is sufficiently supported, so that the probability that the light emitting layer is formed in an area other than the designed (or desired) area may be eliminated or reduced. Accordingly, a failure rate of the display panel may be reduced, and a manufacturing yield may be improved.