Clipping-enhanced data communication

A system and method for communication of digital data includes receiving a plurality of data bits to be transmitted, and generating an output signal for transmission by a transmitter circuit. The generating includes generating a portion of the output signal comprising values of the output signal with magnitude less than a specified threshold, the specified threshold corresponding to a specified transmitter circuit maximum output power; and generating a portion of the output signal comprising a representation of values of the output signal with magnitude greater than the specified threshold.

TECHNICAL FIELD

This document pertains generally, but not by way of limitation, to data communication, and particularly but not by way of limitation to accommodation of signal clipping in data transmissions.

BACKGROUND

Data communication systems, such as visible light communication (VLC) systems, can be used to transmit data between devices. VLC systems communicate data using optical energy, as compared to much longer wavelength radio-frequency energy, for example. In VLC systems, one or more light sources can be controlled to modulate an optical signal to communicate data from one device to another. The receiving device can include one or more sensors configured to sense the optical signal and provide the sensed data to a circuit to recover the communicated data.

SUMMARY

Orthogonal frequency domain multiplexing (OFDM) can be used in radio-frequency (RF) and other communication systems to modulate data onto orthogonal subcarriers in order transmit data high data rates while limiting inter-symbol-interference (ISI). However, the amount of data transmitted can be limited by power output limitations of transmission elements, such as RF amplifiers and light-emitting diodes (LEDs), for example. The present inventors have recognized, among other things, that it is desirable, in addition to transmitting the entirety of the output signal that is within the power limits of the transmission element, to transmit signals representative of information that has been clipped from the output signal due to the power output limitations in order to reduce signal distortion. By transmitting the clipped information, the modulation index can be increased without incurring significant signal distortion from clipping.

In an example, a method of communication of digital data includes receiving a plurality of data bits to be transmitted; and generating an output signal for transmission by a transmitter circuit. The generating includes generating a portion of the output signal comprising values of the output signal with magnitude less than a specified threshold, the specified threshold corresponding to a specified transmitter circuit maximum output power; and generating a portion of the output signal comprising a representation of values of the output signal with magnitude greater than the specified threshold.

In another example, a system for communication of digital data includes a transmitter circuit and a receiver. The transmitter circuit is configured to receive a plurality of data bits and generate an output signal for transmission. The transmitter circuit is further configured to generate a portion of the output signal comprising values of the output signal with magnitude less than a specified threshold, the specified threshold corresponding to a specified transmitter circuit maximum output power, and generate a portion of the output signal comprising a representation of values of the output signal with magnitude greater than the specified threshold. The receiver is configured to receive the output signal and generate the plurality of data bits from the output signal.

In another example, a transmitter configured to communicate digital data for a receiver includes a transmitting element, and a circuit configured to receive a plurality of data bits and generate an output signal for transmission. The circuit is further configured to generate a portion of the output signal comprising values of the output signal with magnitude less than a specified threshold, the specified threshold corresponding to a specified circuit maximum output power, and generate a portion of the output signal comprising a representation of values of the output signal with magnitude greater than the specified threshold.

Each of these non-limiting examples or aspects can stand on its own, or can be combined in various permutations or combinations with one or more other examples or aspects. This overview is intended to provide an overview of subject matter of the present patent application. It is not intended to provide an exclusive or exhaustive explanation of the invention. The detailed description is included to provide further information about the present patent application.

DETAILED DESCRIPTION

A data communication system is disclosed herein that decreases signal distortion by transmitting information clipped due to power output limitations of a data transmitter. In an example, a visible light communication (VLC) system transmits orthogonal frequency-division multiplexing (OFDM) data optically using intensity modulation and direct detection (IM/DD). In other examples, rather than OFDM, other modulation formats may be used, and other transmission technologies, such as radio frequency (RF) may be used.

Because light from light-emitting diodes is generally incoherent, the transmitted signals need to be real and positive. To accommodate this, Hermitian symmetry can be used to ensure the values are real, and each transmission can transmit inverted values of the negative portion of the signal in a separate time slot to the positive portion. For example, a first time slot can be used to transmit all of the positive values for an OFDM transmission, and the second time slot can be used to transmit inverted values of the negative values of the data transmission. A third time slot (or more) can be used to transmit any data from the first and second time slots that is greater than a specified threshold, which can correspond to output power limitation of the transmitting element, such as a maximum output power of a light-emitting diode (LED), for example. The time slots can be transmitted in any order and in some examples, can be transmitted simultaneously using separate communication channels, for example.

FIG.1is a chart illustrating a bipolar OFDM data transmission100. OFDM can be utilized to modulate data onto several orthogonal subcarriers within a larger frequency band. Each subcarrier can be modulated to include multiple bits using quadrature amplitude modulation (QAM) or any other modulating technique. Because the subcarriers are orthogonal, there is little to no inter-symbol interference (ISI), allowing high data rate transmissions that utilize the entire bandwidth.

The larger the modulation index used, the greater the potential amplitude of the final time-domain signal. Transmitting elements, such as RF amplifiers and LEDs, for example, can have power limitations that limit the amplitude of the transmitted signal. Thus, if the final time-domain signal includes values with magnitude greater than the power limits of the transmitting element, the signal gets clipped when transmitted, resulting in signal distortion. Many bits of data can be encoded into the data transmission100.

The data transmission100illustrates one such time-domain output signal for an OFDM system. The data transmission100includes discrete signals102,104,106,108,110,112,114,116, and118. To generate the signals102-118, for example, quadrature amplitude modulation can be used to modulate digital data in the frequency domain (i.e., the digital data is encoded onto several sub-carriers). An inverse fast Fourier transform (IFFT) can then be used to convert the frequency domain signals into the discrete time domain signals illustrated inFIG.1. If the QAM data is Hermitian symmetric, the time domain signal is real-valued. Data transmission100is bipolar in that signals102,106,108,114, and118are positive values of the data transmission and signals104,110,112, and116are negative values of the data transmission.

In an example, a VLC system can implement several LEDs and several photodetectors to transmit and receive data within a space. In VLC systems, LEDs and other light sources that work as transmitters are generally incoherent and thus, can only transmit signals that are real and positive. Because of this, intensity modulation and direct detection (IM/DD) is used to transmit the data. To modulate the intensity, the LEDs can be driven by forward current signals. Due to the structure of the LED, the output optical power and the driving input current may be nonlinearly related. To linearize the relation between the output optical power and the input current, predistortion can be applied, for example. However, outside the linearized range, current saturation can lead to a maximum output power (PMAX) from the LED. Thus, any value with magnitude that is greater than a threshold that corresponds to PMAXmust be clipped.

Clipped data can act like channel noise, causing signal distortion, which can be significant depending on the amplitude of the signals102-118of the data transmission. As seen inFIG.1, several of the signals102-118are greater than the threshold corresponding to PMAX, resulting in clipping of those signals when transmitted. To prevent signal distortion caused by clipping, the information for the signals with magnitude that lies outside the threshold can be transmitted as a separate transmission from the information for the signals with magnitude that lies within the threshold.

FIGS.2A and2Bare charts illustrating data transmissions for clipping-enhanced transmission schemes for the data transmission illustrated inFIG.1.FIG.2Aillustrates a clipping-enhanced scheme that utilizes three time slots for a VLC system. For data transmission200a, during time slot1, all of the positive values of the data transmission100(102,106,108,114, and118) are transmitted as signals202,206,208,214, and218. In the example illustrated inFIG.2A, the light source used to transmit the data can only handle positive and real signals and thus cannot directly transmit the negative signals104,110,112, and116of the data transmission1. In an example, for the negative values of data transmission100, nothing is transmitted during time slot1. For example, a value of zero is transmitted between signals202and206for the negative signal104of the data transmission100. Zero-values can be transmitted for each of the negative values during time slot1.

During time slot2, the inverted values of the negative values illustrated inFIG.1(104,110,112,116) of the data transmission100are transmitted as positive signals220,222,224, and226of equal magnitude. For the positive signal values of the data transmission100, nothing is transmitted during time slot2. For example, a value of zero is transmitted between signals224and226for the positive signal114of the data transmission100. Zero-values can be transmitted for each of the positive values during time slot2.

As seen inFIG.2A, signals202,208,218,222, and226are all greater than the threshold PMAX, which correspond to an output power limit of the transmitting element, such as an LED. This results in clipping of those signals, which can lead to signal distortion. To reduce signal distortion, a third time slot is used for the data transmission200during which the clipped portions (the signal portion above PMAX) of each signal of the first two time slots are transmitted. Thus, the signals228,230,232,234, and236are transmitted to convey the clipped information of respective signals202,208,222,226, and218. The receiver can use this information from time slot3to reconstruct the original time domain signal and obtain the original digital data.

Even with three time slots, some clipping may still occur, as can be seen with signal236, which is still greater than the PMAXthreshold. In systems with large modulation indexes, the amount of clipping in slot3can be significant. To accommodate clipping in slot3,FIG.2Billustrates a data transmission200bthat includes L time slots for transmitting clipped information. Time slots1and2of the data transmission200bcan be the same as the data transmission200ain that time slot1transmits the positive portion of the data transmission and time slot2transmits the negative portion of the data transmission. Time slots3through L+2 transmit clipped information of the data transmission. For example, each time slot N can transmit clipped information from the time slot N−1. For example, for the data transmission200a, the clipped portion of the signal236could be transmitted in a fourth time slot. The more times slots that are included, the greater the range of signals that can be supported without incurring signal distortion due to clipping.

In other examples, such as systems that transmit OFDM signals using RF, two time slots are not needed because there is no need to transmit the negative portion of the signal separately from the positive portion. Rather, a single timeslot can be used to transmit the entirety of the signal having magnitude less than the threshold value that corresponds to the peak power output of the amplifier driving the RF antenna. An additional time slot can then be used to transmit a representation of the portion of the signal having magnitude greater than the threshold value that corresponds to the peak power output of the amplifier driving the RF antenna. Any number of additional time slots may be used to transmit the clipped portion of the RF signal. The time slots used to transmit the clipped information can be transmitted prior to, subsequent to, or simultaneous to the time slot used to transmit the portion of the signal having magnitude less than the threshold.

FIG.3is a block diagram illustrating an example transmitter300for use in an optical clipping-enhanced OFDM system to transmit signals such as those illustrated inFIGS.2A and2B. Transmitter300includes modulation circuit302a, conjugate circuit302b, inverse Fast Fourier Transform (IFFT) circuit304, parallel-to-serial converter306, signal scaler308, diode circuits310and312, inverter314, delay circuit316, absolute value circuits318a-318n, bias circuits320a-320n, diode circuits322a-322n, delay circuits324a-324n, adders326, clipping circuit328, digital-to-analog converter330, and light-emitting diode (LED)332. While illustrated as an LED334, the transmitting element can be any electro-optical device configured to output optical signals.

Modulation circuit302acan be a quadrature amplitude modulation (QAM) circuit, for example, that receives digital data as input. Other examples can include other modulation schemes. The outputs of the modulation circuit302aare N/2 signals in the frequency domain. Because the transmitted signals are real and non-negative, a conjugate circuit302bis used to ensure the final output xCEO[m] is real. The conjugate circuit receives the outputs of the modulation circuit302aand generates N/2 signals in the frequency domain that are each complex conjugates of a respective one of the outputs of the modulation circuit302a. For the example illustrated inFIG.3, Xiis the complex conjugate of XN-i.

IFFT circuit304is configured to transform the vector (X0, . . . , XN-1) from the frequency domain to the time domain. The output x[0] . . . x[N−1] of the IFFT circuit304is the OFDM output signal for the data transmission in the time domain. The parallel-to-serial converter306converts the time domain signals x[0] . . . x[N−1] into a serial stream of signals. The signal scaler308uses the modulation index c/N to output a discrete signal xs[m] with the desired modulation index. The signals xs[m] are bipolar discrete signals similar to those illustrated for data transmission100ofFIG.1. The signals xs[m] include both positive and negative values, some of which may exceed the threshold PMAXthat corresponds to the maximum output power of LED334.

Several logical signals paths are used to generate the data transmission xCEO[m] from the signals xs[m]. These logical signal paths can be implemented using any desired digital and/or analog components. The data transmission xCEO[m] can be in the form of the data transmission200aor200bofFIGS.2A and2B, for example. The first signal path generates the signals for time slot1, an example of which is illustrated inFIGS.2A and2B. The first signal path includes the diode circuit310which can be any circuit configured to pass through signals of xs[m] that are greater than zero.

The second signal path is used to generate the signals for time slot2, an example of which is illustrated inFIGS.2A and2B. The second signal path includes the diode circuit314which can be any circuit configured to pass through signals of xs[m] that are negative. The negative signals are inverted by the inverter circuit312. The delay circuit316is configured to hold values until the second time slot arrives, essentially creating an N symbol delay. The logical transform component316can include any digital or analog storage elements configured to store the values for transmission during the second time slot. The adder326is configured to combine the outputs of the first and second signal paths to generate the serial output signal for the first two time slots of the data transmission.

The remaining signal paths are used to output the signals for time slots3through L+2 which are used to transmit the clipped information from original signals xs[m], as illustrated inFIGS.2A and2B. These signal paths include absolute value circuits318a-318n, adders320a-320n, diode circuits322a-322n, and delay circuits324a-324n, which are used to obtain any clipped information (values above the threshold PMAX) for transmission during the time slots3through L+2. To obtain clipped information for time slots beyond the third, the threshold PMAXis multiplied by L. For example, for a fourth time slot, the threshold is multiplied by two in order to obtain clipped information for time signals transmitted during time slot3.

The delay circuits324a-324nare configured to store and hold values until the respective time slot arrives. The delay circuits324a-324ncan include any digital or analog storage elements configured to store the values for transmission during the respective time slot. The adder328is configured to combine the outputs of all signal paths to generate the serial discrete time domain output signal XCEO[m] for all signal paths of the data transmission. Clipping circuit330is used to clip any signals that are greater than the threshold PMAX, which corresponds to the maximum output power of the LED334. The digital-to-analog converter332is configured to convert the digital signals into an analog forward current for driving the LED334at a desired intensity.

The circuits illustrated inFIG.3can be implemented by one or more microprocessors, controllers, application specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or any other digital or analog circuits.

FIG.4is a block diagram illustrating an example receiver400for use in a clipping-enhanced OFDM system to receive signals such as those illustrated inFIGS.2A and2Band transmitted by the transmitter300illustrated inFIG.3. The receiver400includes a photodetector402, an analog-to-digital converter404, signal path406, delay circuit408, inverter410, delay circuits412a-412n, signum function circuits414a-414n, adder416, windowing circuit418, serial-to-parallel convertor420, fast Fourier transform circuit (FFT) circuit422, one-tap equalizer circuit424, and demodulation circuit426. The signals from the LED332(FIG.3) are received by the photodetector402and converted to digital signals using the analog-to-digital converter404. Further analog and/or digital circuit components including filters, amplifiers, and/or other components can be included in the receiver400.

The time domain signal from the transmitter300is reconstructed using several logical signal paths. Any number of digital and/or analog components can be used to implement the logical components for the several signal paths illustrated inFIG.4. The first signal path406just passes the received signal through to the adder416and is representative of handling the positive portion of the original time domain signal transmitted during time slot1of the transmitter300.

The second signal path includes the delay circuit408and the inverter410. The delay circuit408represents that signals from the second time slot are passed to the inverter410to invert the signals to recover the original negative information. The remaining signal paths include delay circuits412a-412nand the signum function circuits414a-414n. The delay circuits412a-412nrepresent that signals from the respective third through L+2 time slots are passed to the signum function circuits414a-414n. The signum function circuits414a-414nare configured to output a signal representing the clipped information that was transmitted during the respective time slot. The windowing418then takes the signals from the adder416and reconstructs the signals into a serial discrete time-domain frame of length N denoted r[m], which corresponds to the original serial time domain signal xs[m] inFIG.3.

The serial-to-parallel circuit420converts r[m] into several parallel time domain signals. The FFT circuit422converts the time domain signals into frequency domain signals. The one-tap equalizer424can be applied to each frequency domain subcarrier from the FFT circuit422to compensate any phase distortion caused by a dispersive channel, for example. The demodulation circuit426is configured to convert the frequency domain signals into data bits to recover the originally encoded and transmitted digital data.

The circuits illustrated inFIG.4can be implemented by one or more microprocessors, controllers, application specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or any other digital or analog circuits.

The machine (e.g., computer system)500may include a hardware processor502(e.g., a central processing unit (CPU), a graphics processing unit (GPU), a hardware processor core, or any combination thereof), a main memory504, a static memory (e.g., memory or storage for firmware, microcode, a basic-input-output (BIOS), unified extensible firmware interface (UEFI), etc.)506, and mass storage508(e.g., hard drive, tape drive, flash storage, or other block devices) some or all of which may communicate with each other via an interlink (e.g., bus)530. The machine500may further include a display unit510, an alphanumeric input device512(e.g., a keyboard), and a user interface (UI) navigation device514(e.g., a mouse). The machine500may additionally include a storage device (e.g., drive unit)508, a signal generation device518(e.g., a speaker), a network interface device520, and one or more sensors516, such as a global positioning system (GPS) sensor, compass, accelerometer, or other sensor. The machine500may include an output controller528, such as a serial (e.g., universal serial bus (USB), parallel, or other wired or wireless (e.g., infrared (IR), near field communication (NFC), etc.) connection to communicate or control one or more peripheral devices (e.g., a printer, card reader, etc.).

Registers of the processor502, the main memory504, the static memory506, or the mass storage508may be, or include, a machine readable medium522on which is stored one or more sets of data structures or instructions524(e.g., software) embodying or utilized by any one or more of the techniques or functions described herein. The instructions524may also reside, completely or at least partially, within any of registers of the processor502, the main memory504, the static memory506, or the mass storage508during execution thereof by the machine500. In an example, one or any combination of the hardware processor502, the main memory504, the static memory506, or the mass storage508may constitute the machine readable media522. While the machine readable medium522is illustrated as a single medium, the term “machine readable medium” may include a single medium or multiple media (e.g., a centralized or distributed database, and/or associated caches and servers) configured to store the one or more instructions524.

The instructions524may be further transmitted or received over a communications network526using a transmission medium via the network interface device520utilizing any one of a number of transfer protocols (e.g., frame relay, internet protocol (IP), transmission control protocol (TCP), user datagram protocol (UDP), hypertext transfer protocol (HTTP), etc.). Example communication networks may include a visible light communication (VLC) network, local area network (LAN), a wide area network (WAN), a packet data network (e.g., the Internet), mobile telephone networks (e.g., cellular networks), Plain Old Telephone (POTS) networks, and wireless data networks (e.g., IEEE 802.11 family of standards known as Wi-Fi, IEEE 802.16 family of standards known as WiMax®, IEEE 802.15.4 family of standards, peer-to-peer (P2P) networks, among others). In an example, the network interface device520may include one or more light sources, photodetectors, physical jacks (e.g., Ethernet, coaxial, or phone jacks) or one or more antennas to connect to the communications network526. In an example, the network interface device520may include light sources and photodetectors to optically communicate. The term “transmission medium” shall be taken to include any intangible medium that is capable of storing, encoding or carrying instructions for execution by the machine500, and includes digital or analog communications signals or other intangible medium to facilitate communication of such software. A transmission medium is a machine readable medium.