Electro-optical device, manufacturing method of electro-optical device, and electronic apparatus

An electro-optical device includes a first substrate including a plurality of pixel electrodes, a second substrate including a common electrode, and an electro-optical layer disposed between the plurality of pixel electrodes and the common electrode, optical characteristics of the electro-optical layer changing according to an electric field. One of the first substrate and the second substrate includes a base material composed of an inorganic material and having insulating and transmission properties, and a light shielding portion having light shielding properties and including a first film containing tungsten silicide, a second film containing titanium nitride or tungsten nitride, and a third film containing tungsten. The first film, the second film, and the third film are disposed in this order from the base material.

The present application is based on, and claims priority from JP Application Serial Number 2019-196224, filed Oct. 29, 2019, the disclosure of which is hereby incorporated by reference herein in its entirety.

BACKGROUND

1. Technical Field

The present disclosure relates to an electro-optical device, a manufacturing method of an electro-optical device, and an electronic apparatus.

2. Related Art

An electro-optical device, such as a liquid crystal device capable of changing optical characteristics for each of pixels, is generally used in an electronic apparatus, such as a projector. For example, in JP-A-2008-225034, a liquid crystal device is disclosed that is provided with a thin film transistor (TFT) array substrate on which a plurality of pixel electrodes are disposed, a counter substrate on which a counter electrode is disposed, and a liquid crystal layer disposed between the TFT array substrate and the counter substrate. Each of the TFT array substrate and the counter substrate is configured by quartz or glass.

Further, in JP-A-2008-225034, a light shielding film, an insulating film, and a TFT including a channel region are provided in this order between the TFT array substrate and the plurality of pixel electrodes. The light shielding film is configured by tungsten and shields the channel region of the TFT. Further, the light shielding film is adhered to the TFT array substrate by an adhesive layer made of titanium nitride.

However, when the light shielding film configured by tungsten is adhered to the TFT array substrate configured by quartz using the adhesive layer configured by titanium nitride, there is a risk that the light shielding film may peel off from the TFT array substrate when the light shielding film is manufactured. There is therefore demand for a light shielding film having excellent adhesion properties.

SUMMARY

An aspect of an electro-optical device according to the present disclosure includes a first substrate including a plurality of pixel electrodes, a second substrate including a common electrode, and an electro-optical layer disposed between the plurality of pixel electrodes and the common electrode, optical characteristics of the electro-optical layer changing according to an electric field. One of the first substrate and the second substrate includes a base material composed of an inorganic material and having insulating and transmission properties, and a light shielding portion having light shielding properties and including a first film containing tungsten silicide, a second film containing titanium nitride or tungsten nitride, and a third film containing tungsten. The first film, the second film, and the third film are disposed in this order from the base material,

An aspect of a manufacturing method of an electro-optical device according to the present disclosure is a manufacturing method of an electro-optical device that includes a first substrate including a plurality of pixel electrodes, a second substrate including a common electrode, and an electro-optical layer disposed between the plurality of pixel electrodes and the common electrode, optical characteristics of the electro-optical layer changing according to an electric field. In manufacturing of the first substrate or the second substrate, the method includes preparing a base material composed of an inorganic material and having insulating and transmission properties, and forming a light shielding portion having light shielding properties and including a first film containing tungsten silicide, a second film containing one of titanium nitride and tungsten nitride, and a third film containing tungsten. The forming the light shielding portion includes forming the first film at the base material, forming the second film at the first film, and forming the third film at the second film.

DESCRIPTION OF EXEMPLARY EMBODIMENTS

Preferred embodiments of the present disclosure will be described below with reference to the accompanying drawings. Note that, in the drawings, a dimension and scale of each of portions may differ from an actual dimension and scale as appropriate, and some of the portions are schematically illustrated for ease of understanding. Further, the scope of the present disclosure is not limited to these embodiments unless otherwise stated to limit the present disclosure in the following description. Further, an expression “an element B is disposed on an element A” is not limited to a configuration in which the element A and the element B are in direct contact. Configurations in which the element A and the element B are not in direct contact are also encompassed by the concept “the element B is disposed on the element A”.

An active matrix liquid crystal device is described as an example of an electro-optical device of the present disclosure.

1A. First Embodiment

1A-1. Basic Configuration

FIG.1is a plan view of an electro-optical device100according to a first embodiment.FIG.2is a cross-sectional view taken along a line A-A inFIG.1. Note that, for convenience of explanation, the description will be made as appropriate, using an X-axis, a Y-axis, and a Z-axis that are orthogonal to each other. Further, a direction to one side along the X-axis is referred to as a direction X1, and a direction opposite to the direction X1is referred to as a direction X2. Similarly, a direction to one side along the Y-axis is referred to as a direction Y1, and the direction opposite to the direction Y1is referred to as a direction Y2. A direction to one side along the Z-axis is referred to as a direction Z1, and the direction opposite to the direction Z1is referred to as a direction Z2.

The liquid crystal display device100illustrated inFIG.1andFIG.2is a transmission-type liquid crystal device. As illustrated inFIG.2, the electro-optical device100includes a transmissive element substrate2, a transmissive counter substrate4, a frame-shaped sealing member8, and a liquid crystal layer9. The element substrate2is an example of a “first substrate”. The counter substrate4is an example of a “second substrate”. The liquid crystal layer9is an example of an “electro-optical layer”. The sealing member8is disposed between the element substrate2and the counter substrate4. The liquid crystal layer9is disposed in a region surrounded by the element substrate2, the counter substrate4, and the sealing member8. The element substrate2, the liquid crystal layer9, and the counter substrate4are aligned along the Z axis. The surface of a second base material41, to be described below, provided on the counter substrate4is parallel to an X-Y plane. In the following, viewing from the direction Z1or the direction Z2, which is the thickness direction of the element substrate2, is referred to as “plan view”.

In the electro-optical device100of the present embodiment, light is incident on the element substrate2, for example, is transmitted through the liquid crystal layer9and is emitted from the counter substrate4. Note that the light may be incident on the counter substrate4, be transmitted through the liquid crystal layer9, and be emitted from the element substrate2. The light is visible light. “Transmissive” refers to the transmittance of visible light, and preferably refers to a transmittance of visible light of 50% or more. Further, the liquid crystal display device100illustrated inFIG.1has a rectangular shape in plan view, but the shape of the liquid crystal display device100in plan view is not limited to the rectangular shape and may be a round shape, or the like.

As illustrated inFIG.2, the element substrate2includes a first base material21, a wiring layer20, a plurality of pixel electrodes28, and a first oriented film29. The first base material21is an example of a “base material”. The first base material21is configured by a transmissive and insulating plate. The wiring layer20is disposed between the first base material21and the plurality of pixel electrodes28. Further, although not illustrated inFIG.2, a light shielding portion3is disposed between the first base material21and the wiring layer20. The plurality of pixel electrodes28are transmissive and are configured by a transparent electrode material, such as indium tin oxide (ITO) or indium zinc oxide (IZO), for example. In the element substrate2, the first oriented film29is positioned closest to the liquid crystal layer9, and orients liquid crystal molecules of the liquid crystal layer9. Examples of a constituent material of the oriented film29include polyimide and silicon oxide, for example. Note that the element substrate2will be described later.

As illustrated inFIG.2, the counter substrate4includes a second base material41, an insulating film42, a common electrode45, and a second oriented film46. The second base material41, the insulating film42, the common electrode45, and the second oriented film46are arranged in this order. The second oriented film46is positioned closest to the liquid crystal layer9. The second base material41is configured by a transmissive and insulating plate. The second base material41is configured by glass, quartz, or the like, for example. The insulating film is formed of a transmissive and insulating silicon-based inorganic material, such as silicon oxide, for example. The common electrode45is configured by a transparent electrode material, such as ITO or IZO, for example. The second oriented film46orients the liquid crystal molecules of the liquid crystal layer9. Examples of a constituent material of the second oriented film46include polyimide and silicon oxide, for example.

The sealing member8is formed using an adhesive containing various types of curable resin, such as epoxy resin, for example. The sealing member8is affixed to each of the element substrate2and the counter substrate4. An injection port81for injecting a liquid crystal material containing liquid crystal molecules into the sealing member8is formed in a portion, in the circumferential direction, of the sealing member8. The injection port81is sealed by a sealing material80formed using various types of resin materials.

The liquid crystal layer9contains the liquid crystal molecules having positive or negative dielectric anisotropy. The liquid crystal layer9is interposed between the element substrate and the counter substrate4such that the liquid crystal molecules are in contact with both the first oriented film29and the second oriented film46. The liquid crystal layer9is disposed between the plurality of pixel electrodes28and the common electrode45, and optical characteristics thereof change due to an electric field. Specifically, the orientation of the liquid crystal molecules included in the liquid crystal layer9changes depending on a voltage applied to the liquid crystal layer9.

As illustrated inFIG.1, a plurality of scanning line drive circuits11, a data line drive circuit12, a plurality of external terminals14, and a plurality of routing wiring lines15are arranged on a surface of the element substrate2on the counter substrate4side. The routing wiring lines15routed from each of the scanning line drive circuits11and the data line drive circuit are respectively connected to the plurality of external terminals14.

Further, the electro-optical device100configured as described above includes a display region A10that displays an image, and a peripheral region A20surrounding the display region A10in plan view. The display region A10includes a plurality of pixels P arranged in a matrix pattern. The plurality of pixel electrodes28are disposed in a one-to-one manner in the plurality of pixels P. The scanning line drive circuits11, the data line drive circuit12, and the like are disposed in the peripheral region A20.

1A-2. Electrical Configuration

FIG.3is an equivalent circuit diagram illustrating an electrical configuration of the element substrate2. As illustrated inFIG.3, the element substrate2includes n scanning lines244, m data lines246, n first constant potential lines245, a plurality of transistors23, and a plurality of storage capacitors200. Note that m and n are each an integer of 2 or more. Further, the first constant potential line245is a capacitance line. Each of the transistors23is a TFT that functions as a switching element, for example. Each of the transistors23includes a gate, a source, and a drain.

Each of the n scanning lines244extends along the Y-axis, and the n scanning lines244are arranged at equal intervals along the X-axis. Each of the n scanning lines244is electrically coupled to the respective gate of some of the transistors23, among all the transistors23. Further, the n scanning lines244are electrically coupled to the scanning line drive circuits11illustrated inFIG.1. Scanning signals G1, G2, . . . , and Gn are line-sequentially supplied from the scanning line drive circuits11to the 1 to n scanning lines244.

Each of the m data lines246illustrated inFIG.3extends along the X-axis, and the m data lines246are arranged at equal intervals along the Y-axis. Each of the m data lines246is electrically coupled to the respective source of some of the transistors23, among all the transistors23. The m data lines246are electrically coupled to the data line driving circuit12illustrated inFIG.1. Image signals S1, S2, . . . , and Sm are line-sequentially supplied from the data line driving circuit12to the 1 to m data lines246.

The n scanning lines244and the m data lines246illustrated inFIG.3are insulated from each other and are formed in a lattice pattern in plan view. A region surrounded by two of the adjacent scanning lines244and two of the adjacent data lines246corresponds to the pixel P. The plurality of pixel electrodes are disposed in a one-to-one manner with respect to the plurality of transistors23. The drain of the corresponding transistor23is electrically coupled to each of the pixel electrodes28.

Each of the n first constant potential lines245extends along the Y-axis, and the n first constant potential lines245are arranged at equal intervals along the X-axis. Further, the n first constant potential lines245are insulated from the plurality of data lines246and the plurality of scanning lines244, and are formed so as to be separated from these lines. A fixed potential, such as a ground potential, is applied to each of the first constant potential lines245. Further, the storage capacitor200is provided in parallel to a liquid crystal capacitor, between the first constant potential line245and the pixel electrode28, to prevent leakage of a charge held in the liquid crystal capacitor. The storage capacitor200is a capacitive element for holding the potential of the pixel electrode28in accordance with the supplied image signal Sm.

When the scanning signals G1, G2, . . . , and Gn become sequentially active and the n scanning lines244are sequentially selected, the transistor23coupled to the selected scanning line244is turned to an on-state. Then, the image signals S1, S2, . . . , and Sm of a magnitude corresponding to the gray scale to be displayed are transmitted via the m data lines246, to the pixel P corresponding to the selected scanning line244, and then applied to the pixel electrode28. In this way, the voltage corresponding to the gray scale to be displayed is applied to the liquid crystal capacitor formed between the pixel electrode28and the common electrode45of the counter substrate4illustrated inFIG.2, and the orientation of the liquid crystal molecules changes in accordance with the applied voltage. Further, the applied voltage is held by the storage capacitor200. Such changes in the orientation of the liquid crystal molecules cause the light to be modulated, and gray scale display becomes possible.

1A-3. Configuration of Element Substrate2

FIG.4is a cross-sectional view illustrating a part of the element substrate2. In the following description, the direction Z1is described as being upward and the direction as Z2as downward. As illustrated inFIG.4, the element substrate2includes the first base material21, the light shielding portion3, the wiring layer20, the plurality of pixel electrodes28, and the oriented film29. The first base material21is configured by an inorganic material and having insulating and transmission properties. The first base material21is configured by glass or quartz, for example. In particular, the first base material21is preferably configured by silicate glass such as quartz glass, or the like. As a result of the first base material21being configured by quartz glass, the adhesion between the light shielding portion3and the first base material21, to be described later, can be particularly improved, compared to a case in which the first base material21is configured by another material.

The first base material21has a plurality of recessed portions219. Note that inFIG.4, of the plurality of recessed portions219, one of the recessed portions219is illustrated. Further, although not illustrated, the plurality of recessed portions219are arranged in a matrix shape. The recessed portion219is a recess formed in the first base material21. The surfaces of the recessed portion219include a bottom surface and side surfaces. The bottom surface is a surface along the X-Y plane. The side surfaces are surfaces that connect the bottom surface and an upper surface211of the first base material21. Additionally, the plurality of recessed portions219are disposed in a one-to-one manner with respect to the plurality of transistors23. Although not illustrated, each of the recessed portions219overlaps with the corresponding transistor23in plan view.

The light shielding portion3is disposed on the first base material21. The light shielding portion3has light shielding properties. The “light shielding properties” refer to light shielding properties with respect to visible light, specifically referring to the light shielding properties with respect to visible light, and preferably referring to a transmittance of visible light of less than 50%, and more preferably to a transmittance of visible light of less than 10%. Further, the light shielding portion3is electrically conductive. However, the light shielding portion3is insulated from the various wiring lines and the transistors23. The light shielding portion3will be described in more detail below.

The wiring layer20is disposed on the light shielding portion3. The wiring layer20includes the plurality of transistors23, the plurality of scanning lines244, the plurality of first constant potential lines245, the plurality of storage capacitors200, the plurality of data lines246, and a plurality of second constant potential lines248. Note that inFIG.4, one of the scanning lines244, one of the first constant potential lines245, one of the storage capacitors200, one of the data lines246, and one of the second constant potential lines248corresponding to one of the transistors23are illustrated. Further, the wiring layer20includes an insulating and transmissive insulator22. The insulator22includes insulating films221,222,223,224,225,226,227,228, and229. The insulating films221,222,223,224,225,226,227,228, and229are arranged in this order from the first base material21toward the plurality of pixel electrodes28. The insulating films221to229are configured by a silicon oxide film formed by, for example, thermal oxidation, chemical vapor deposition (CVD), or the like. The wiring lines and electrodes included in the wiring layer20are disposed between the films configuring the insulating layer22, so as to be in contact with the films.

The insulating film221is disposed on the first base material21, covering the light shielding portion3. The transistors23are disposed on the insulating film221. Each of the transistors23includes a semiconductor layer231, a gate electrode232, and a gate insulating film233. The semiconductor layer231is disposed between the insulating film222and the insulating film223. The semiconductor layer231includes a source region231a, a drain region231b, a channel region231c, a first lightly doped drain (LDD) region231d, and a second LDD region231e. The semiconductor layer231is formed, for example, by film formation of polysilicon, and the regions excluding the channel region231care doped with impurities that enhance conductivity. An impurity concentration in the first LDD region231dand the second LDD region231eis lower than an impurity concentration in the source region231aand the drain region231b. Note that at least one of the first LDD region231dand the second LDD region231emay be omitted.

The gate electrode232is disposed between the insulating film222and the insulating film223. The gate electrode232overlaps with the channel region231cof the semiconductor layer231when viewed from the direction Z1. The gate electrode232is formed, for example, by being doped with impurities that enhance the conductivity of the polysilicon. Note that the gate electrode232may be formed using a conductive material such as a metal, a metal silicide, and a metal compound. Further, the gate insulating film233is interposed between the gate electrode232and the channel region231c. The gate insulating film233is formed of silicon oxide formed by thermal oxidation or CVD, for example.

The scanning line244is disposed between the insulating film223and the insulating film224. The scanning line244is coupled to the gate electrode232via a contact portion271that penetrates the insulating film223. Note that in the present embodiment, the gate electrode232and the light shielding portion3are insulated from each other, but these may be electrically coupled. In this case, the light shielding portion3can be used as a back gate.

The first constant potential line245is disposed between the insulating film224and the insulating film225. A shielding portion270is coupled to the first constant potential line245. The shielding portion270is disposed so as to penetrate the insulating film224and reach an intermediate position in the thickness direction of the insulating film223. Further, the shielding portion270overlaps with the second LDD region231ewhen viewed from the direction Z1. The shielding portion270functions as a shield that suppresses an effect, on the transistor23, of a leakage electric field from the scanning line244. Further, the shielding portion270functions as a light shielding portion of the semiconductor layer231. A fixed potential is supplied to the shielding portion270from the first constant potential line245.

The storage capacitor200is disposed on the insulating film225. The storage capacitor200includes a first capacitor25and a second capacitor26. The first capacitor25is disposed between the insulating film225and the insulating film226. The first capacitor25includes a lower capacitor electrode251, an upper capacitor electrode252, and a dielectric layer253disposed therebetween. The lower capacitor electrode251is coupled to the first constant potential line245via a contact portion272that penetrates the insulating film225. Further, the second capacitor26is disposed between the insulating film226and the insulating film227. The second capacitor26includes a lower capacitor electrode261, an upper capacitor electrode262, and a dielectric layer263disposed therebetween. The lower capacitor electrode261is coupled to the upper capacitor electrode252of the first capacitor25via a contact portion273that penetrates the insulating film226. Further, the lower capacitor electrode261is electrically coupled to the drain region231bof the transistor23via a contact portion274that penetrates the insulating films222to226. The upper capacitor electrode252of the first capacitor25is electrically coupled to the pixel electrode28disposed on the wiring layer20, via a contact portion (not illustrated) or the like.

The data line246is disposed between the insulating film227and the insulating film228. The data line246is in contact with the insulating film227and the insulating film228. The data line246is electrically coupled to the source region231aof the transistor23via a contact portion275that penetrates the insulating films222to227. Further, the second constant potential line248is disposed between the insulating film228and the insulating film229. The second constant potential line248is electrically coupled to the upper capacitor electrode262of the second capacitor26via a contact portion (not illustrated) or the like. In a similar manner to the first constant potential line245, a fixed potential, such as a ground potential, for example, is applied to the second constant potential line248. The fixed potential supplied to the first constant potential line245and the fixed potential supplied to the second constant potential line248are the same potential.

The lower capacitor electrode251, the upper capacitor electrode252, the lower capacitor electrode261, and the upper capacitor electrode262are configured by a titanium nitride film, for example. The wiring lines of the scanning line244, the first constant potential line245, the data line246, the second constant potential line248, and the like are configured by a layered body of an aluminum film and a titanium nitride film, for example. By including the aluminum film, resistance can be reduced compared to a case in which the wiring lines are configured by the titanium nitride film only. Note that each of these electrodes or wiring lines may be configured by materials other than the aforementioned materials. For example, each of these electrodes or wiring lines may be configured by a metal, such as tungsten (W), titanium (Ti), chromium (Cr), iron, and aluminum (Al), and the like, by a metal nitride, metal silicide, or the like.

Note that the configuration and arrangement of the wiring lines and the like included in the wiring layer20is not limited to the example illustrated inFIG.4. For example, the various wiring lines may be disposed below the layer in which the transistors23are disposed. Further, either one of the first capacitor25and the second capacitor26may be omitted.

FIG.5is a plan view illustrating a part of the element substrate2. As illustrated inFIG.5, the element substrate2includes a plurality of light-transmitting regions A11through which light is transmitted and a wiring region A12that blocks light. The shape of each of the plurality of light-transmitting regions A11in plan view is substantially quadrangular, and the plurality of light-transmitting regions A11are disposed in a matrix shape in plan view. The plurality of pixel electrodes28are disposed in a one-to-one manner in the plurality of light-transmitting regions A11. The wiring region A12has a lattice shape as seen in plan view, and surrounds each of the light-transmitting regions A11. The plurality of transistors23, the plurality of storage capacitors200, the plurality of scanning lines244, the plurality of data lines246, the plurality of first constant potential lines245, and the plurality of second constant potential lines248are disposed in the wiring region A12. The plurality of scanning lines244and the plurality of data lines246are formed in a lattice shape when viewed in the direction Z1. The plurality of first constant potential lines245and the plurality of second constant potential lines248are formed in a lattice shape when viewed in the direction Z1. The transistor23is disposed at an intersection position at which the scanning line244and the data line246intersect in plan view. Although not illustrated, the storage capacitor200is disposed at the intersecting position in plan view.

FIG.6is a plan view illustrating a part of the light shielding portion3and some of the plurality of transistors23. As illustrated inFIG.6, the light shielding portion3includes a plurality of light shielding sections30. The plurality of light shielding sections30are arranged in a matrix pattern in plan view. The plurality of light shielding sections30are disposed in a one-to-one manner with respect to the plurality of transistors23. The shape of each of the light shielding sections30in plan view is a rectangular shape whose lengthwise direction is a direction along the X-axis, but the shape is not limited thereto. Each of the light shielding sections30overlaps with the corresponding transistor23in plan view. Specifically, the light shielding section30overlaps with the semiconductor layer231and the gate electrode232in plan view. Each of the light shielding sections30blocks light from being incident on the corresponding transistor23.

The area, in plan view, of the light shielding section illustrated inFIG.6is larger than the area of the semiconductor layer231of the transistor23in plan view, but may be smaller. The light shielding section30preferably overlaps with at least the channel region231cof the semiconductor layer231to reduce erroneous operation of the transistor23due to the incidence of light.

FIG.7is a cross-sectional view illustrating a part of the light shielding portion3. One of the light shielding sections30, of the plurality of light shielding sections30, is illustrated inFIG.7. The light shielding section30is disposed within the recessed portion219of the first base material21. By disposing the light shielding section30inside the recessed portion219, the thickness of the light shielding section30is more easily made thicker and the adhesion between the light shielding section30and the first base material21can be further improved compared to a case in which the light shielding section30is disposed on the upper surface211of the first base material21.

As illustrated inFIG.7, the light shielding section30includes a first film31, a second film32, and a third film33. The first film31, the second film32, and the third film33are arranged in this order from the first base material21. In other words, the light shielding section30has a layered structure of the first film31, the second film32, and the third film33. The first film31includes tungsten silicide. The second film32includes titanium nitride or tungsten nitride. The third film33includes tungsten.

By providing the first film31, the adhesion between the second film32and the first base material21can be improved compared to a case in which the first film31is not provided. Further, by providing the second film32, the adhesion between the first film31and the third film33can be improved. Additionally, by providing the third film33, the light shielding properties of the light shielding portion3can be sufficiently secured. Therefore, by providing the first film31, the second film32, and the third film33, the risk of the light shielding portion3from peeling off from the first base material21can be suppressed, compared to the related art. In other words, the adhesion of the light shielding portion3to the first base material21can be increased, and as a result, a deterioration in a light shielding performance by the light shielding portion3can be suppressed. Further, since the peeling off of the light shielding portion3at the time of manufacturing can be suppressed, a degree of freedom relating to the shape and thickness of the light shielding portion3can be increased, for example.

The second film32preferably includes tungsten nitride, rather than titanium nitride. When the second film32includes titanium nitride, the titanium contained in the titanium nitride may diffuse into the insulator22and affect the transistor23. Therefore, the second film32of the light shielding section30located below the transistor23particularly preferably includes tungsten nitride, and particularly preferably does not include titanium nitride. Further, the second film32functions as a barrier layer that suppresses diffusion of components of the first film31into the third film33. Therefore, by disposing the second film32between the first film31and the third film33, a deterioration in an optical density (OD) value of the third film33can be suppressed.

By configuring the third film33by tungsten, the entire thickness of the light shielding section30is easily formed to be thick, and the light shielding properties of the light shielding section30can be increased. Further, because the main component of the light shielding section30is tungsten, compared to a case in which the main component is another metal, it is particularly easy to form the entire thickness of the light shielding section30to be thick, and the light shielding properties of the light shielding section30can be particularly increased.

The third film33is a dense film in which no pin holes are present. As a result, a deterioration in the light shielding properties of the light shielding section30due to the presence of the pin holes is prevented.

Note that each of the first film31, the second film32, and the third film33may include, for example, approximately 5% of other metals, for example, other than the metals described above. Further, the second film32may include both titanium nitride and tungsten nitride. Further, the second film32may have a layered structure of a layer containing titanium nitride and a layer containing tungsten nitride, for example.

As illustrated inFIG.7, a thickness D1of the first film31is thinner than a thickness D3of the third film33and is thicker than a thickness D2of the second film32. In other words, the thicknesses D1, D2, and D3satisfy D2<D1<D3. When the thickness D1is thicker than the thickness D2, the adhesion between the first base material21and the first film31and the adhesion between the first film31and the second film32can be further improved, compared to a case in which the thickness D1is thinner than the thickness D2. Further, when the thickness D1is thinner than the thickness D3, compared to a case in which the thickness D1is thicker than the thickness D3, the overall thickness of the light shielding portion3is prevented from becoming excessively thick, while sufficiently securing the light shielding properties of the light shielding portion3. Note that each of the thicknesses D1, D2, and D3is an average thickness.

The thickness D1is not particularly limited, but is preferably from 1 nm to 200 nm, for example. The thickness D2is not particularly limited, but is preferably from 1 nm to 100 nm, for example. The thickness D3is not particularly limited, but is preferably from 10 nm to 500 nm, for examples. By satisfying the aforementioned ranges for each of the thicknesses D1, D2, and D3, while suppressing the overall thickness of the light shielding portions3, the effects of increasing the adhesion of the light shielding portion3and also increasing the light shielding properties of the light shielding portion3can be particularly noticeably exhibited. Note that the thicknesses D1, D2, and D3need not necessarily satisfy the relationship D2<D1<D3. For example, the thickness D2may be thicker than, or may be the same as the thickness D1. Moreover, a specific value of each of the thicknesses D1, D2, and D3is not limited to a value within the range described above, and may be a value outside of the range described above.

As illustrated inFIG.7, the first film31includes a first surface311in contact with the first base material21and a second surface312in contact with the second film32. The first surface311is in contact with the bottom surface and the side surfaces of the recessed portion219. In the present embodiment, the first surface311is a smooth surface. On the other hand, the second surface312has surface unevenness. The roughness of the second surface312is greater than the roughness of the first surface311. Specifically, the arithmetic mean roughness of the second surface312is greater than the arithmetic mean roughness of the first surface311. Because the second surface312has the surface unevenness, the adhesion between the first film31and the second film32can be improved due to an anchoring effect. As a result, peeling between the first film31and the second film32can be particularly effectively suppressed. Thus, the peeling off of the light shielding port3from the first base material21can be particularly effectively suppressed. Further, by providing the second surface312having the surface unevenness for all of the light shielding sections30, an improvement in yield can be particularly effectively achieved.

The second surface312has a bottom surface and side surfaces, similar to the shape of the recessed portion219. In the present embodiment, the bottom surface and the side surfaces have surface unevenness. That is, the surface unevenness is present over the entire second surface312. Due to the presence of the surface unevenness on the side surfaces of the second surface312and not only on the bottom surface of the second surface312, the adhesion between the first film31and the second film32can be improved, compared to a case in which the surface unevenness is not present on the side surfaces of the second surface312.

An arithmetic mean roughness Ra of the second surface312is not particularly limited, but is preferably from 1 nm to 10 nm, and more preferably from 2 nm to 5 nm, for example. Further, Ra/D1, which is the ratio of the arithmetic mean roughness Ra of the second surface312to the thickness D1of the first film31is not particularly limited, but is preferably from 0.005 to 0.5, and more preferably from 0.02 to 0.25, for example.

As a result of the arithmetic mean roughness Ra being within the range described above, the adhesion between the first film31and the second film32can be particularly increased. Thus, the risk of the peeling off of the light shielding portion3from the first base material21can be particularly effectively suppressed. Further, since the arithmetic mean roughness Ra is within the range described above, it is possible to suppress a risk of defects, such as cracks or the like, from occurring in the light shielding portion3due to the arithmetic mean roughness Ra being excessively large.

Note that the specific value of the arithmetic mean roughness Ra of the second surface312is not limited to a value within the range described above, and may be a value outside of the range described above.

As illustrated inFIG.7, the second film32includes a third surface321that is in contact with the first film31, and a fourth surface322that is in contact with the third film33. Due to the effect of the surface unevenness of the second surface312of the first film31, each of the third surface321and the fourth surface322has surface unevenness. Thus, the roughness of the third surface321and the roughness of the fourth surface322are respectively greater than the roughness of the first surface311. Specifically, the arithmetic mean roughness of each of the third surface321and the fourth surface322is greater than the arithmetic mean roughness of the first surface311.

Since the fourth surface322has the surface unevenness, the adhesion between the second film32and the third film33can be improved due to the anchoring effect. In particular, by causing the second surface312of the first film31to have the surface unevenness and the fourth surface322of the second film32to have the surface unevenness, the peeling off of the light shielding portion3from the first base material21can be most effectively suppressed.

As illustrated inFIG.7, the third film33includes a fifth surface331that is in contact with the second film32, and a sixth surface332that is in contact with the insulating film221. The sixth surface332and the upper surface211of the first base material21configure a continuous flat surface without any level differences. The fifth surface331is in contact with the fourth surface322, and thus has surface unevenness. On the other hand, the sixth surface332is a smooth surface. Thus, the roughness of the sixth surface332is less than the roughness of the fifth surface331. Specifically, the arithmetic mean roughness of the sixth surface332is less than the arithmetic mean roughness of the fifth surface331. Since the sixth surface332is the smooth surface, the risk is suppressed of the transistor23being adversely impacted due to the unevenness of the sixth surface332.

Further, since the flat surface is configured by the sixth surface332and the upper surface211of the first base material21, there are no level differences between the sixth surface332and the upper surface211of the first base material21. Therefore, there is no diffused reflection of light from the level difference, and the risk of light being incident on the transistor23can thus be more effectively suppressed. Note that a level difference may be present between the sixth surface332and the upper surface211of the first base material21.

Here, any one of the plurality of pixel electrodes28is a “first pixel electrode”, and another of the pixel electrodes28is a “second pixel electrode”. Further, one of the transistors23electrically coupled to the “first pixel electrode” is referred to as a “first transistor”, and one of the transistors23electrically coupled to the “second pixel electrode” is referred to as a “second transistor”. Further, the light shielding section30disposed between the “first pixel electrode” and the “first transistor” is referred to as a “first light shielding section”, and the light shielding section30disposed between the “second pixel electrode” and the “second transistor” is referred to as a “second light shielding section”. In this case, each of the “first light shielding section” and the “second light shielding section” includes the first film31, the second film32, and the third film. In other words, each of the plurality of light shielding sections30includes the first film31, the second film32, and the third film, and is disposed between the first base material21and the transistor23. Thus, in plan view, the light incident on each of the transistors23can be blocked by the light shielding portion3. As a result, the risk of erroneous operation caused by leakage current can be suppressed.

Further, the corresponding light shielding sections30are respectively disposed for each of all of the transistors23. Thus, the reliability of the electro-optical device100can be increased compared to a case in which the transistor23for which the light shielding section30is not disposed in a corresponding manner is present. Note that the transistor23for which the light shielding section30is not disposed in the corresponding manner may be present.

Further, the plurality of light shielding sections30are not coupled to each other. Therefore, stress acting on the element substrate2can be reduced compared to a case in which the plurality of light shielding sections30are coupled to each other. Thus, warping of the element substrate2can be suppressed.

FIG.8is a diagram illustrating a flow of a manufacturing method of the electro-optical device100according to the first embodiment. InFIG.8, in the manufacturing steps of the electro-optical device100, steps for manufacturing the light shielding portion3are illustrated as representative of the manufacturing method. Note that the structure of the electro-optical device100other than the light shielding portion3is manufactured using a known method, for example.

As illustrated inFIG.8, the method for manufacturing the electro-optical device100includes a first base material preparation step S10and a light shielding portion forming step S20. The light shielding portion forming step S20includes a first film forming step S21, a second film forming step S22, a third film forming step S23, and a polishing step S24. The first film forming step S21includes a silicide film forming step S211and an annealing step S212. Each of the steps will be described in order below.

FIG.9is a cross-sectional view of the first base material21in the first base material preparation step S10. In the first base material preparation step S10, the first base material21including the recessed portion219is prepared, as illustrated inFIG.9. For example, although not illustrated, a flat plate configured by quartz glass or the like is etched using a mask having a shape corresponding to the recessed portion219. In this way, the base material21including the recessed portion219is formed.

FIG.10is a cross-sectional view of the first base material21and a silicide film31xin the silicide film forming step S211. In the silicide film forming step S211, the silicide film31xis formed on the first base material21, as illustrated inFIG.10. The silicide film31xincludes tungsten silicide. For example, a material including tungsten silicide is deposited in the recessed portion219by a vapor deposition method such as a sputtering method or CVD, thereby forming the silicide film31xinside the recessed portion219. The silicide film31xbecomes a first film31aafter passing through the following step. The thickness of the silicide film31xis not particularly limited, but is from 1 nm to 200 nm, for example.

FIG.11is a cross-sectional view of the first base material21and the first film31ain the annealing step S212. In the annealing step S212, the first film31ais formed on the first base material21by annealing the silicide film31x, as illustrated inFIG.11. The first film31ais a film prior to polishing of the first film31that is obtained by the polishing step S24. The first film31ahas a lower surface313and an upper surface314opposite to the lower surface313. The lower surface313is in contact with the first base material21.

The tungsten silicide is crystallized by annealing the silicide film31x. By crystallizing the tungsten silicide, the roughness of the upper surface314of the first film31aincreases. In other words, the roughness of the upper surface314is greater than the roughness of the lower surface313, since the state of the upper surface314changes from a smooth state to a state in which unevenness is present. As described above, the silicide film31xis formed in the silicide film forming step S211, and the first film31ahaving the unevenness on the upper surface314can be easily formed by annealing the silicide film31xin the annealing step S212.

Nitrogen (N2) or oxygen (O2) is used as the gas for annealing. By using nitrogen or oxygen, the state of the upper surface314can be easily and reliably changed from the smooth state to the state in which the unevenness is present. In particular, by using nitrogen, the upper surface314having a target roughness can be particularly easily formed. Note that, when oxygen is used, there is a risk that an oxide film may be formed on the first film31a. When the oxide film is formed on the first film31a, there is a risk that the unevenness of the upper surface314may be flattened by the oxide film. Therefore, when oxygen is used, it is preferable to perform a process in which the oxide film is removed after the annealing is performed.

The temperature in the annealing is preferably from 600° C. to 1500° C., for example, and more preferably from 800° C. to 1000° C. When the temperature is within the range described above, stress on the light shielding portion can be particularly effectively alleviated, and at the same time, the upper surface314having the target roughness can be formed quickly and reliably.

In the annealing step S212, the roughness of the upper surface314of the first film31can be changed by changing an annealing temperature, or the gas, for example. Thus, for example, the annealing temperature or the gas is set in accordance with the target roughness of the top surface314. Note that the roughness of the upper surface314is the same as the roughness of the first surface311of the first film31described above.

FIG.12is a cross-sectional view of the first base material21, the first film31a, and a second film32ain the second film forming step S22. In the second film forming step S22, the second film32ais formed on the first film31a, as illustrated inFIG.12. The second film32aincludes titanium nitride or tungsten nitride. For example, a material including titanium nitride or tungsten silicide is deposited on the first film31aby a vapor deposition method such as a sputtering method, CVD, or the like. In this way, the second film32ais formed on the first film31a. The second film32ais a film prior to polishing of the second film32obtained by the polishing step S24. The second film32ahas a lower surface323and an upper surface324opposite to the lower surface323. The lower surface323is in contact with the first film31a. Note that the thickness and roughness of the second film32aare the same as the thickness and roughness of the second film32described above.

FIG.13is a cross-sectional view of the first base material21, the first film31a, the second film32a, and a third film33ain the third film forming step S23. In the third film forming step S23, the third film33ais formed on the second film32a, as illustrated inFIG.13. The third film33aincludes tungsten. For example, a material containing tungsten is deposited on the second film32aby a vapor deposition method, such as a sputtering method, CVD, or the like. In this way, the third film33ais formed on the second film32a. The third film33ais a film prior to polishing of the third film33obtained by the polishing step S24. The third film33ahas a lower surface333and an upper surface334opposite to the lower surface333. The lower surface333is in contact with the second film32a. Note that the thickness and roughness of the third film33aare the same as the thickness and roughness of the third film33described above.

In the second film forming step S22, the first film31aand the second film32aare not annealed. Further, in the third film forming step S23, the first film31a, the second film32a, and the third film33aare not annealed. Here, if annealing is performed in the third film forming step S23, the third film33apeels off as a result of the crystallization of the first film31, pinholes are generated in the third film33a, and the like. Therefore, the annealing is not performed in the second film forming step S22or the third film forming step S23, and the formation of pin holes in the third film33acan thus be suppressed. Therefore, a deterioration in the light shielding properties of the light shielding section30due to the presence of the pin holes in the third film33ais prevented.

FIG.14is a cross-sectional view of the first base material21and the light shielding portion3in the polishing step S24. In the polishing step S24, a flattening treatment by polishing, such as chemical mechanical polishing (CMP), is performed, for example. Specifically, by polishing the first film31a, the second film32a, and the third film33a, the light shielding portion3including the light shielding section30is formed, as illustrated inFIG.14. The first film31is formed by removing a portion of the first film31a. The second film32is formed by removing a portion of the second film32a. The third film33is formed by removing a portion of the third film33a. Thus, the light shielding section30including the first film31, the second film32, and the third film33is formed.

By polishing the first film31a, the remainder of the lower surface313becomes the first surface311, and the remainder of the upper surface314becomes the second surface312. By polishing the second film32a, the remainder of the lower surface323becomes the third surface321, and the remainder of the upper surface324becomes the fourth surface322. By polishing the third film33a, the remainder of the lower surface333becomes the fifth surface331. Further, by polishing the third film33afrom the upper surface334toward the lower surface333, the sixth surface332is formed, which is the smooth surface. When forming the sixth surface332, a portion of the first base material21may or may not be polished along with a portion of the third film33a. However, as described above, the sixth surface332and the upper surface211of the first base material21preferably configure the flat surface.

Note that the polishing step S24may be omitted as appropriate. In this case, the light shielding portion3is configured by the first film31a, the second film32a, and the third film33a.

As described above, the manufacturing method of the electro-optical device100includes the first base material preparation step S10and the light shielding portion forming step S20. Further, the light shielding portion forming step S20includes the first film forming step S21, the second film forming step S22, and the third film forming step S23. Furthermore, in the present embodiment, the polishing step S24is included. According to such a method, the light shielding portion3including the first film31, the second film32, and the third film33can be easily and reliably formed. Thus, according to such a method, the light shielding portion3that does not easily peel off from the first base material21can be easily and reliably formed. Thus, according to such a method, the light shielding portion3that can prevent a deterioration in the light shielding properties of the light shielding portion3can be easily and reliably formed.

As described above, in the first base material preparation step S10, the first base material21including the recessed portion219is prepared. Then, in the light shielding portion forming step S20, the first film31a, the second film32a, and the third film33aare formed in the recessed portion219. In other words, the light shielding portion3is formed by a damascene process. Therefore, the light shielding portion3having excellent light shielding properties can be easily and reliably formed, while suppressing the overall thickness of the light shielding portion3from becoming excessively thick.

1B. Second Embodiment

A second embodiment will be described. Note that, in each of examples described below, an element having the same function as that of the first embodiment is denoted by the same reference sign used in the description of the first embodiment, and a detailed description thereof will be omitted as appropriate.

FIG.15is a cross-sectional view illustrating a part of an element substrate2A according to the second embodiment. As illustrated inFIG.15, the element substrate2A includes a first base material21A and a light shielding portion3A. The light shielding portion3A includes a plurality of light shielding sections30A, but inFIG.15, only one of the plurality of light shielding sections30A is illustrated. The first base material21A has a configuration similar to that of the first base material21of the first embodiment, except for content described below. The light shielding portion3A has a configuration similar to that of the light shielding portion3of the first embodiment, except for content described below.

The surface of the recessed portion219of the first base material21A illustrated inFIG.15has surface unevenness. Specifically, the surface unevenness is present on the bottom surface, of the surfaces of the recessed portion219. On the other hand, the side surfaces of the recessed portion219are smooth surfaces. The roughness of the bottom surface of the recessed portion219is greater than the roughness of the side surfaces of the recessed portion219. Specifically, the arithmetic mean roughness of the bottom surface of the recessed portion219is greater than the arithmetic mean roughness of the side surfaces of the recessed portion219. Further, the roughness of the bottom surface of the recessed portion219is greater than the roughness of the upper surface211of the first base material21A. More specifically, the arithmetic mean roughness of the bottom surface of the recessed portion219is greater than the arithmetic mean roughness of the upper surface211.

The surface of the recessed portion219corresponds to a “first film contact surface”. Since the surface of the recessed portion219has the surface unevenness, the unevenness on the bottom surface of the recessed portion219is transferred to the first surface311and the second surface312, respectively, of the first film31. Therefore, the unevenness is present on portions of the first surface311and the second surface312corresponding to the bottom surface of the recessed portion219. Similarly, the unevenness is present on portions of the third surface321, the fourth surface322, and the fifth surface331corresponding to the bottom surface of the recessed portion219. On the other hand, portions of the first surface311, the second surface312, the third surface321, the fourth surface322, and the fifth surface331corresponding to the side surfaces of the recessed portion219are smooth.

The roughness of the portion of the second surface312corresponding to the bottom surface of the recessed portion219is greater than the roughness of the portions of the second surface312corresponding to the side surfaces of the recessed portion219. Specifically, the arithmetic mean roughness of the portion of the second surface312corresponding to the bottom surface of the recessed portion219is greater than the arithmetic mean roughness of the portions of the second surface312corresponding to the side surfaces of the recessed portion219.

As in the present embodiment, when the unevenness is formed on the second surface312of the first film31using the unevenness of the surface of the recessed portion219, the annealing step S212illustrated inFIG.8can be omitted. In other words, the unevenness can be formed on the second surface312by a method of transferring the unevenness of the recessed portion219to the second surface312. According to this method, the unevenness can be easily formed on the second surface312. Then, by causing the second surface312to have the unevenness, the adhesion between the first film31and the second film32can be improved due to the anchoring effect. Thus, the peeling off of the light shielding portion3A from the first base material21A can be suppressed.

The method of forming the unevenness on the surface of the recessed portion219of the first base material21A includes the following methods. For example, a polysilicon film having surface unevenness is formed on the recessed portion219of the first base material21A. The film is then etched back. In this way, the unevenness of the polysilicon film is transferred to the surface of the recessed portion219, and the unevenness is formed on the surface of the recessed portion219.

Note that both the method of transferring the unevenness of the recessed portion219to the second surface312and the method of increasing the roughness of the second surface312by annealing may be used in combination to form the unevenness on the second surface312.

Also with the light shielding portion3A according to the present embodiment described above, excellent adhesion can be achieved, in a similar manner to the above-described first embodiment.

A third embodiment will be described. Note that, in each of examples described below, an element having the same function as that of the first embodiment is denoted by the same reference sign used in the description of the first embodiment, and a detailed description thereof will be omitted as appropriate.

FIG.16is a cross-sectional view illustrating a part of an element substrate2B according to the third embodiment. As illustrated inFIG.16, the element substrate2B includes a first base material21B and a light shielding portion3B. The light shielding portion3B includes a plurality of light shielding sections30B, but inFIG.16, only one of the plurality of light shielding sections30B is illustrated. The first base material21B has a configuration similar to that of the first base material21of the first embodiment, except for content described below. The light shielding portion3B has a configuration similar to that of the light shielding portion3of the first embodiment, except for content described below.

As illustrated inFIG.16, the first base material21B does not include the recessed portion219of the first embodiment. The light shielding portion3B is disposed on the upper surface211of the first base material21B. The light shielding portion3B protrudes from the first base material21B toward the transistor23. The first surface311of the first film31included in the light shielding portion3B is in contact with the upper surface211of the first base material21B. The light shielding portion3B is covered by the insulating film221. Note that in the example illustrated inFIG.16, the side surfaces of the light shielding portion3B do not have unevenness, but the side surfaces of the light shielding portion3B may have the unevenness.

In a similar manner to the light shielding portion3of the first embodiment, the light shielding portion3B includes the first film31, the second film32, and the third film33. Thus, the second surface312of the first film31included in the light shielding portion3B has the unevenness, as in the first embodiment. Thus, the risk of the light shielding portion3B peeling off from the first base material21B can be suppressed. As a result, the deterioration in the light shielding properties of the light shielding portion3B can be suppressed. Further, the second surface312of the first film31included in the light shielding portion3B has the unevenness, in a similar manner to the first embodiment. As a result, peeling between the first film31and the second film32can be suppressed. Thus, the peeling off of the light shielding portion3B from the first base material21B can be particularly effectively suppressed.

Also with the light shielding portion3B according to the present embodiment described above, excellent adhesion can be achieved, in a similar manner to the above-described first embodiment.

1D. Modified Examples

Various modifications can be made to each of the embodiments exemplified above. Specific modes of modification applied to each of the embodiments described above will be exemplified below. Two or more modes freely selected from examples below can be appropriately used in combination as long as mutual contradiction does not arise.

In each of the embodiments described above, an example has been described in which the element substrate2includes the “light shielding portion”. However, the counter substrate4may include the “light shielding portion”.

In each of the embodiments described above, an example has been described in which the “light shielding portion” is disposed between the transistor23and the first base material21. Further, an example in which the “base material” is the first base material21is described. However, various contact portions, such as the contact portions271,272,273,274, and275may correspond to the “light shielding portion”. In other words, the various contact portions may have a configuration including the first film, the second film, and the third film. In this case, a layer that is lower than the “light shielding portion”, of the plurality of layers included in the insulating body22, corresponds to the “base material”. Further, the shielding portion270may correspond to the “light shielding portion”. In this case, the insulating film222corresponds to the “base material”. Note that, when the contact portion includes the “first film”, there is a risk that the resistance of the contact portion may be increased compared to a case in which the contact portion does not include the “first film”. Thus, the “light shielding portion” is most preferably disposed so as to inhibit the light incident on the transistor23.

In the first embodiment described above, the light shielding portion3is in contact with the first base material21, but other layers may be interposed between the light shielding portion3and the first base material21as long as the other layers do not inhibit the above-described effects of the light shielding portion3. Note that, in order to prevent the peeling off of the light shielding portion3from the first base material21, the light shielding portion3is particularly preferably in contact with the first base material21. Note that the same also applies to the light shielding portions3A and3B. Further, in the embodiments described above, the second film32is in contact with the first film31and the third film33. However, other layers may be interposed between the first film31and the second film32, as long as the other layers do not inhibit the above-described effects of the light shielding portion3. In a similar manner, other layers may be interposed between the second film32and the third film33, as long as the other layers do not inhibit the above-described effects of the light shielding portion3. Note that, in order to prevent the peeling off of the light shielding portion3from the first base material21, the second film32is particularly preferably in contact with the first film31and the third film33.

The plurality of light shielding sections30in the above-described embodiments are not coupled to each other, but the plurality of light shielding sections30may be coupled to each other.

In the above-described embodiments, a case in which the TFT is used as the transistor is described as an example, but the transistor is not limited to the TFT, and may be, for example, a metal-oxide-semiconductor field-effect transistor (MOSFET), or the like.

In the above-described embodiments, the active matrix type electro-optical device100is exemplified, but an electro-optical device is not limited thereto, and the driving method of the electro-optical device may be a passive matrix method or the like, for example.

2. Electronic Apparatus

The electro-optical device100can be used for various electronic apparatuses.

FIG.17is a perspective view illustrating a personal computer200as an example of an electronic apparatus. The personal computer2000includes the electro-optical device100that displays various images, a main body portion2010in which a power source switch2001and a keyboard2002are installed, and a control unit2003. The control unit2003includes a processor and a memory, for example, to control the operation of the electro-optical device100.

FIG.18is a perspective view illustrating a smartphone3000as an example of the electronic apparatus. The smartphone3000includes an operating button3001, the electro-optical device100that displays various images, and a control unit3002. Screen content displayed on the electro-optical device100is changed in accordance with the operation of the operation button3001. The control unit3002includes a processor and a memory, for example, to control the operation of the electro-optical device100.

FIG.19is a schematic diagram illustrating a projector as an example of the electronic apparatus. A projection-type display device4000is a three-plate type projector, for example. An electro-optical device1ris the electro-optical device100corresponding to a red display color, an electro-optical device1gis the electro-optical device100corresponding to a green display color, and an electro-optical device1bis the electro-optical device100corresponding to a blue display color. Specifically, the projection-type display device4000includes the three electro-optical devices1r,1g, and1bthat respectively correspond to the display colors of red, green, and blue. A control unit4005includes a processor and a memory, for example, to control the operation of the electro-optical device100.

An illumination optical system4001supplies a red component r of light emitted from an illumination device4002, which serves as a light source, to the electro-optical device1r, a green component g of the light to the electro-optical device1g, and a blue component b of the light to the electro-optical device1b. Each of the electro-optical devices1r,1g, and1bfunctions as an optical modulator, such as a light valve, that modulates respective rays of the colors of light supplied from the illumination optical system4001in accordance with a display image. A projection optical system4003synthesizes the rays of the light emitted from each of the electro-optical devices1r,1g, and1band projects the synthesized light onto a projection surface4004.

The electronic apparatus includes the above-described electro-optical device100and the control unit2003,3002, or4005. The electro-optical device100has the light shielding portion3that does not easily peel off, and therefore has excellent reliability. Thus, the display quality of the personal computer2000, the smartphone3000, or the projection-type display apparatus4000can be increased.

Note that the electronic apparatus to which the electro-optical device according to the present disclosure is applied is not limited to the exemplified apparatuses, and other examples include a personal digital assistant (PDA), a digital still camera, a television, a video camera, a car navigation device, a display device for in-vehicle use, an electronic organizer, electronic paper, an electronic calculator, a word processor, a workstation, a video telephone, a point of sale (POS) terminal, and the like. Other examples to which the present disclosure is applied further include apparatuses provided with a printer, a scanner, a copier, a video player, or a touch panel.

The present disclosure is described above based on the preferred embodiments, but the present disclosure is not limited to each of the embodiments described above. Further, the configuration of each component of the present disclosure may be replaced with any configuration that achieves the equivalent functions of the above-described embodiments, or any configuration may be added thereto.

Further, in the above description, a liquid crystal device is described as an example of the electro-optical device of the present disclosure, but the electro-optical device of the present disclosure is not limited thereto. For example, the electro-optical device of the present disclosure can also be applied to an image sensor or the like. Further, for example, the present disclosure can also be applied to a display panel using light-emitting elements such as organic electroluminescence (EL), inorganic EL, or light-emitting polymers, in a similar manner to the embodiments described above. Further, the present disclosure can also be applied to an electrophoretic display panel that uses micro capsules each including colored liquid and white particles distributed in the liquid, in a similar manner to the embodiments described above.