SEMICONDUCTOR STRUCTURE AND METHOD FOR TESTING THE SAME

A semiconductor structure comprising a substrate, a dielectric layer, a conductor post, a first conductive layer structure and a second conductive layer structure is provided. The substrate comprises an opening structure. The dielectric layer is disposed on a sidewall of the opening structure. The conductor structure is disposed in the opening structure and covers the dielectric layer. The first and second conductive layer structures are electrically connected to the conductor post. A voltage difference is existed between the first and second conductive layer structures, such that a current is passing through the first conductive layer structure, the opening structure and second conductive layer structure. A resistance values is related to the voltage difference and the current. A dimension of the opening structure is 10 times greater than a dimension of the first and second conductive layer structures.

DETAILED DESCRIPTION OF THE INVENTION

First Embodiment

FIG. 1illustrates a diagram showing a cross section view of a semiconductor structure10according to one embodiment of the invention. As shown inFIG. 1, a semiconductor structure10comprises a substrate100, a barrier layer102, an oxide layer104(dielectric layer), a conductor post106, a first conductive layer structure108aand a second conductive layer structure108b. The substrate has an opening structure P. The oxide layer104is disposed on a side surface S1 and a bottom surface S2 of the opening structure P, the barrier layer102is disposed on the oxide layer104. The conductor post106is disposed in the opening structure P, and covers the barrier layer102. The first conductive layer structure108aand the second conductive layer structure108bare respectively disposed at two opposite sides of a central axis C of the opening structure P, and are electrically connected to the conductor post106. In order to highlight the characteristics of the embodiments of the invention, parts of the elements are not illustrated according to and actual proportion.

In one embodiment, the substrate100has a first surface S10 and a second surface S12 opposite to the first surface S10. The opening structure P is passing through and exposed from the first surface S10. The first conductive layer structure108aand second conductive layer structure108bare disposed on the first surface S10 of the substrate100. The conductor post106can be formed by a metal depositing process and is filled inside the opening structure P. The material of the conductor post106can be conductive material, such as copper (Cu), tungsten (W) and polysilicon, etc.

The first conductive layer structure108aand the second conductive layer structure108bare disposed on the first surface S10 (upper surface) of the substrate100, and extends from the first surface S10 of the substrate100to the conductor post106, exceeds the oxide layer104and barrier layer102and contact a surface of the conductor post.

A dimension of the opening structure P (such as a height) is at least ten times greater than a dimension (such as height) of the first conductive layer structure108aand a dimension (such as height) of the second conductive layer structure108b. In one embodiment, the dimension of the opening structure P is 100 times greater than that of the first conductive layer structure108aand second conductive layer structure108b. For example, the height of the opening structure P is 40 μm, and the height of the first conductive layer structure108aand the height of the second conductive layer structure108bare 200 nm. The height of the structure is merely one example embodiment, and the invention is not limited thereto.

A voltage difference (not illustrated) exist between the first conductive layer structure108aand the second conductive layer structure108b, such that a current I passes through the first conductive layer structure108a, the opening structure P and the second conductive layer structure108b. InFIG. 1, the dash line for representing the path of the current I is merely a schematic path, and the path of the current I is not limited thereto. Based on Ohm's law, a resistance is related to the voltage difference and the current I. The resistance is related to the quality of the conductor post106disposed in the opening structure P. Therefore, a defect, such as current leakage or open circuit of the conductor post106in the opening structure P, can be detected and determined based on the resistance.

FIG. 2illustrates a top view diagram showing a semiconductor structure10inFIG. 1. InFIG. 2, parts of the elements are simplified for convenience of description. Besides, parts of the elements are not illustrated according to and actual proportion, to highlight the characteristics of the embodiments of the invention. As shown inFIG. 2, the first conductive layer structure108aand the second conductive layer structure108bfurther couples to a first pad110aand a second pad110b, respectively. The first pad110aand the second pad110bare for example but not limited to aluminum pads. In step of testing the quality of the conductor post106in the opening structure P, the first pad110aand the second pad110bare disposed for providing a contact space for probes.

Referring toFIG. 3, which illustrates a diagram showing a cross section view of semiconductor structure according to one embodiment of the invention. As shown inFIG. 3, opening structure P′ comprises a plurality of opening P1, opening P2 and opening P3, each opening P1, opening P2 and opening P3 can be similar to the opening structure P inFIG. 1, a barrier layer202a, a barrier layer202b, a barrier layer202c, an oxide layer204a, an oxide layer204band an oxide layer204care respectively disposed on the side surfaces and the bottom surfaces of the opening P1, opening P2 and opening P3. The similarities between the structures inFIG. 1andFIG. 3are not repeated herein. Besides, merely three openings (opening P1˜P3) are illustrated herein, and the invention is not limited thereto, the semiconductor structure can comprise more openings. The conductor post2060, the conductor post2062and the conductor post2064are respectively disposed in each opening P1, opening P2 and opening P3.

The first conductive layer structure208acomprises a first conductive layer212and a second conductive layer214, the second conductive layer structure208bcomprises a third conductive layer216and a forth conductive layer218. As shown inFIG. 3, the first conductive layer212, the second conductive layer214, the third conductive layer216and the forth conductive layer218are interlacedly arranged, and respectively electrically connected to the conductor post2060, the conductor post2062and the conductor post2064. The first conductive layer212and the third conductive layer216are disposed at two opposite sides with respect to a central axis of the opening P1. The second conductive layer214and the third conductive layer216are disposed at opposite sides of a central axis of the opening P2. The second conductive layer214and the forth conductive layer218are disposed at opposite sides of a central axis of the opening P3.

InFIG. 3, the semiconductor structure20can be used to detect an opening structure P′ comprising a plurality of opening (P1˜P3), the detecting method for opening structure P′ is similar to that of the opening structure P inFIGS. 1˜2. A voltage difference between two opposite sides of the opening structure P′ can be applied, and the first conductive layer structure208aand the second conductive layer structure208bcan be respectively coupled to pads (not illustrated) for probe contacting. The voltage difference is between the first conductive layer structure208aand an adjacent second conductive layer structure208b. That is, a voltage difference is between the first conductive layer212and an adjacent third conductive layer216, and a voltage difference is between the second conductive layer214and an adjacent forth conductive layer218.

In this case, a current I1 is passing through the first conductive layer212, the opening P1 and the third conductive layer216, a current I2 is passing through the third conductive layer216, the opening P2 and the second conductive layer214, and a current I3 is passing through the second conductive layer214, the opening P3 and the forth conductive layer218. A resistance can be obtained by the voltage difference and the current, and whether there is a defect exists in the conductor post2060, the conductor post2062and the conductor post2064can be determined.

In above embodiments, the first conductive layer structure108a, the second conductive layer structure108b, the first conductive layer structure208aand the second conductive layer structure208bare for example but not limited to a first metal layer (M1) procedure in a manufacturing process. In one embodiment, a voltage difference can be provided between the first conductive layer structure108aand the second conductive layer structure108b(the first conductive layer structure208aand the second conductive layer structure208b) after the first metal layer procedure, for determining a quality of the conductor post106(or the conductor post2060, the conductor post2062and the conductor post2064).

During the detection process, merely parameter and interfaces between the opening structure P, the first conductive layer structure108a, the second conductive layer structure108b, the first pad110aand the second pad110b(or the openings P1˜P3, the first conductive layer structure208a, the second conductive layer structure208band pads respectively coupling to the first conductive layer structure208aand the second conductive layer structure208b) the conductor post106(or the conductor post2060, the conductor post2062and the conductor post2064) are needed to be considered, the detecting process and complexity of result analysis can be simplified, thereby the detecting process for the opening structure P (or opening structure P′) can be performed in a fast speed and simplified process. In other embodiments, the process can be adjusted based on the manufacturing requirement. The testing method for the opening structure P (or opening structure P′) can be performed after a second metal layer process (M2) or a further process.

FIG. 4illustrates a diagram showing a substrate of the semiconductor structure inFIG. 1after an unilateral thinning process. Referring toFIGS. 1 and 4, when the quality of the conductor post106in the opening structure P is tested, a thinning process (such as CMP process) can be performed to polishing the second surface S12 of the substrate100, until the barrier layer102and the oxide layer104on the bottom surface S2 of the opening structure P are totally removed.

After the thinning process, a semiconductor structure10′ can be obtained, the semiconductor structure10′ comprises a polished substrate100′, a polished barrier layer102′ and a polished oxide layer104′. The opening structure P is exposed from the first surface S10 and the polished second surface S12′.

In one embodiment, the substrate100can be a silicon substrate, and the opening structure P can be a through-silicon via (TSV). In one embodiment, an active element (not illustrated) is further disposed to a peripheral area of the opening structure P in the substrate100, the active element can be NMOS and PMOS. In a via-middle process, an active element is formed before the TSV process. In another one embodiment, the opening structure P in the substrate100without an active element can be used as an interposer to connect two chips in 3D IC technology.

After the quality test of the conductor post106in the opening structure P, further process can be performed after the first conductive layer structure108aand the second conductive layer structure108b. For example, if the first conductive layer structure108aand the second conductive layer structure108bare the nthmetal layer, the process for forming via, the (n+1)th, (n+2)th, (n+3)thmetal layers . . . can be performed according to the requirement of the manufacturing process.

Second Embodiment

FIG. 5illustrates a diagram showing a part of a cross section view of a semiconductor structure according to one embodiment of the invention. InFIG. 5, the semiconductor structure3is shown in a cross section view from y-z plane view, the semiconductor structure3comprises a substrate300, a barrier layer302, an oxide layer304, a conductor post306, a first conductive layer structure308a, a second conductive layer structure308b, an insulating layer32, a conductive pad34and a conductive bump40.

The substrate300has an opening structure, the opening structure can comprise a plurality of TSV sets30, oxide layer304and barrier layer302are respectively disposed on a side surface and a bottom surface of the TSV sets30. The conductor post306is disposed in the TSV sets30, and covers the barrier layer302and the oxide layer304. The first conductive layer structure308aand the second conductive layer structure308bare respectively disposed at two opposite sides of a central axis the TSV sets30, to electrically connected to the conductor post306. In order to highlight the characteristics of the embodiments of the invention, parts of the elements are not illustrated according to and actual proportion.

As shown inFIG. 5, each TSV set30comprises two opening30aand opening30b. A terminal of the opening30ais connected to the first conductive layer structure308a, and a terminal of the opening30bis connected to the second conductive layer structure308b. Another terminal of the opening30aand another terminal of the opening30bare electrically connected to a first connecting point36aand a second connecting point36b(illustrated inFIG. 6) of the conductive bump40respectively. The opening30aand the opening30bare electrically connected with each other by the conductive bump40.

In one embodiment, the substrate300has a first surface S30 and a second surface S32 opposite to the first surface S30. The opening30aand the opening30bof the TSV set30penetrate through and exposed from first surface S30 and second surface S32. The first conductive layer structure308aand penetrate second conductive layer structure308bare disposed on the first surface S30 of the substrate300. The manufacturing method and material of the conductor post306can be the same as that of the conductor post106inFIG. 1.

The dimension (such as height) of the TSV set30is at least ten times greater than that of the first conductive layer structure308aand the second conductive layer structure308b. In one embodiment, the dimension (such as height) of the TSV set30is 100 times greater than that of the first conductive layer structure308aand the second conductive layer structure308b, and the invention is not limited thereto.

A voltage difference (not illustrated) is between the first conductive layer structure308aand second conductive layer structure308b, such that a current passes through the first conductive layer structure308a, the TSV set30and the second conductive layer structure308b. A resistance can be obtained from the voltage difference and the current, the resistance is related to a quality of an electrical connection between the TSV set30and conductive bump40. Therefore, a defect (such as an open circuit or current leakage) between the TSV set30and the conductive bump40can be detected based on the resistance.

Referring to an enlarge view inFIG. 5, in one embodiment, a bottom surface of the substrate300can be etched by a reactive ion etching (RIE) process, such that conductor post303protrudes from a second surface S32 of the substrate300. Then, an insulating layer32can be formed on the second surface S32 of the substrate300and the protrude conductor post303by a chemical vapor deposition (CVD) process. Then, a chemical mechanical polishing (CMP) process can be used to polish the insulating layer32, until the conductor post303is exposed from the insulating layer32. Then, a conductive pad34can be formed on the exposed conductor post303. Then, a conductive bump40can be formed on the conductive pad34for electrically connecting to the conductor post303. The above process can be adjusted according to the requirement of the manufacturing process, and the invention is not limited thereto.

FIG. 6illustrates a testing method with a diagram showing a top view of a semiconductor structure inFIG. 5in one direction of x-y plane. As shown inFIG. 6, the semiconductor structure3comprises a plurality of TSV sets30, each TSV set30comprises a plurality of opening30a, opening30b, opening30cand opening30darranged into an opening matrix. The first conductive layer structure308a(illustrated inFIG. 5) comprises a plurality of first conductive layers318a, first conductive layer318cand first conductive layer318e. The second conductive layer structure308b(illustrated inFIG. 5) comprises a plurality of second conductive layer318band second conductive layer318d. The first conductive layer318a, the first conductive layer318cand the first conductive layer318eand the second conductive layer318band the second conductive layer318dare interlacedly arranged.

Referring toFIG. 6, the semiconductor structure3further comprises a conductive bump matrix42, which comprises a plurality of conductive bumps40disposed at one side of the opening matrix (along the z axis, toward the paper), and first conductive layer structure308aand the second conductive layer structure308bare electrical connected to another side of the opening matrix42(along the z axis, out of the paper), such that each conductive bump40is electrically connected to one side of at least two adjacent opening30aand opening30bof the opening matrix42. The first conductive layer318aof the first conductive layer structure308aand the second conductive layer318bof the second conductive layer structure308bare respectively connected to the another side of the at least two adjacent opening30aand opening30b.

The testing method for the electrical connection between the opening and the conductive bump showing inFIG. 6is for the openings along a y axis direction, such as the opening30aand30brespectively coupling to the first connecting point36aand the second connecting point36bof the conductive bump40. By applying voltage difference between the first pad310aand the second pad310bto generate a current passing through, such that voltage differences exist between the first conductive layer318a, the first conductive layer318c, the first conductive layer318e, and adjacent second conductive layer318band second conductive layer318d. A resistance can be obtained according to the voltage difference and the current, and an electrical connection quality between the TSV sets30and the conductive bump can be determined.

FIG. 7illustrates a testing method with a diagram showing a top view of a semiconductor structure inFIG. 5in another one direction of x-y plane. InFIG. 7, the semiconductor structure3is similar to that inFIG. 6, the same element is represented by the same reference number, and the similarities are not repeated herein. The differences betweenFIGS. 6 and 7is that the testing method for semiconductor structure3inFIG. 7is for openings arranged along x axis, such as the opening30cand opening30drespectively couple to the third connecting point36cand the fourth connecting point36dof the conductive bump40.

The first conductive layer structure320acomprises a plurality of first conductive layer328a, first conductive layer328cand first conductive layer328e. The second conductive layer structure320bcomprises a plurality of second conductive layer328b, second conductive layer328dand second conductive layer328f. The first conductive layer328a, the first conductive layer328cand the first conductive layer328eand the second conductive layer328b, the second conductive layer328dand the second conductive layer328fare interlacedly arranged.

By applying a voltage difference between the first pad310cand the second pad310dto generate a current passing through, such that voltage differences between each first conductive layer328a, first conductive layer328cand first conductive layer328eand adjacent second conductive layer328b, second conductive layer328dand second conductive layer328f. An electrical connection quality between the TSV sets30and a conductive bump40can be determined according to a resistance that is related to the voltage difference and the current.

In one embodiment, the method in first embodiment (FIGS. 1˜3) can be used to confirm the quality of the conductor post in the opening structure. Then, the substrate can be polished such that the opening structure is exposed from a bottom surface of the substrate. Then, an electrical connection between the conductive bump40and the opening structure can be determined by applying voltage difference between two adjacent openings of the openings (that is, between the first conductive layer and the second conductive layer), such that a current passing the two adjacent openings. The quality of electrical connection between the opening and the conductive bump can be determined according to resistance obtained from the current and the voltage difference.

Based on the above, the testing method according to the embodiments of the invention can determine the quality (such as a reliability and a stability) of the opening structure. In one embodiment, the quality of the conductor post in the opening structure can be determined to check whether there is a defect of an open circuit or current leakage after the first metal layer procedure. In one embodiment, the quality of the electrical connection between the opening structure and the conductive bump can be determined. In one embodiment, the detecting process can be simplified and the complexity can be reduced, so that the testing process of the opening structure can speed up and simplified.