IMAGING DEVICE AND ELECTRONIC APPARATUS

[Problem] To reduce the number of signals transmitted and received between a plurality of stacked substrates and a plurality of layers. [Solution] An imaging device includes: a plurality of pixels each having a photoelectric converter; an analog-to-digital converter provided for each area pixel composed of two or more of the pixels in the plurality of pixels to convert a signal corresponding to a charge photoelectrically converted by the two or more pixels into a digital signal; a floating diffusion that outputs the charge photoelectrically converted by the photoelectric converter in the pixel; a plurality of stacked areas in which the plurality of photoelectric converters, the plurality of the analog-to-digital converters, and the plurality of the floating diffusions in the plurality of pixels are arranged; and a signal transmitter that transmits and receives signals between the plurality of areas. An area in which the plurality of photoelectric converters in the area pixel are arranged and an area in which the analog-to-digital converter is arranged transmit and receive a charge of the plurality of floating diffusions via the same signal transmitter.

TECHNICAL FIELD

The present disclosure relates to an imaging device and an electronic apparatus.

BACKGROUND ART

In conventional image sensors, the imaging signal photoelectrically converted by a photoelectric converter of each pixel is subjected to analog-to-digital conversion (hereinafter referred to as AD conversion) in units of columns. Therefore, there is a problem that it takes time to read out all the pixels in a pixel array unit. In view of this, a pixel AD-type imaging device in which an AD converter is provided for each of the pixels and AD conversion is performed for each pixel has been proposed (see PTL 1).

CITATION LIST

Patent Literature

SUMMARY

Technical Problem

However, in the pixel AD-type imaging device, since the AD converter is provided for each of the pixels, the number of wirings increases and the power consumption also increases, making it difficult to manufacture a high-resolution imaging device.

Therefore, an imaging device in which a substrate on which a photoelectric converter is arranged and a substrate on which an AD converter is arranged are separately provided and these substrates are stacked has been practically used. Various signals are transmitted and received between the two stacked substrates through bumps, vias, and the like. However, if the number of signals transmitted and received between the two substrates is large, the wiring area provided on each substrate becomes large, which may reduce the area ratio of the photoelectric converter and reduce the aperture ratio.

Accordingly, the present disclosure provides an imaging device and an electronic apparatus capable of reducing the number of signals transmitted and received between a plurality of stacked substrates and a plurality of layers.

Solution to Problem

In order to solve the problem, according to the present technology, there is provided an imaging device including: a plurality of pixels each having a photoelectric converter;

an analog-to-digital converter provided for each area pixel composed of two or more of the pixels in the plurality of pixels to convert a signal corresponding to a charge photoelectrically converted by the two or more pixels into a digital signal; a floating diffusion that outputs the charge photoelectrically converted by the photoelectric converter in the pixel:a plurality of stacked areas in which the plurality of photoelectric converters, the plurality of the analog-to-digital converters, and the plurality of the floating diffusions in the plurality of pixels are arranged; anda signal transmitter that transmits and receives signals between the plurality of areas, whereinamong the plurality of areas, an area in which the plurality of photoelectric converters are arranged is provided separately from an area in which the analog-to-digital converter is arranged, andthe area in which the plurality of photoelectric converters in the area pixel are arranged and the area in which the analog-to-digital converter is arranged transmit and receive a charge of the plurality of floating diffusions via the same signal transmitter.

The photoelectric converter may have a silicon semiconductor layer, or may have a non-silicon semiconductor layer.

The non-silicon semiconductor layer may be a semiconductor layer containing an organic semiconductor material.

The imaging device may further include: a storage unit provided for each of the pixels to store the charge photoelectrically converted by the photoelectric converter;a first transfer transistor provided for each of the pixels to perform switching control of whether or not to store the charge photoelectrically converted by the photoelectric converter in the storage unit; anda second transfer transistor provided for each of the pixels to perform switching control of whether or not to transfer the charge stored in the storage unit to the floating diffusion.

The storage unit may be arranged in the area in which the photoelectric converter is arranged among the plurality of areas.

The storage unit may be arranged in the same layer as the photoelectric converter, or arranged in a layer stacked on a layer in which the photoelectric converter is arranged.

The storage unit may be arranged in an area different from the area in which the analog-to-digital converter is arranged among the plurality of areas.

The different area may have a wiring layer electrically connected to the floating diffusion, and the storage unit may be arranged in the same layer as the wiring layer.

The analog-to-digital converter may include:a comparator that compares an analog signal corresponding to the charge with a reference signal;a comparison output processor that outputs a comparison result of the comparator;a waveform shaping unit that shapes a waveform of an output signal of the comparison output processor; andthe comparator, the comparison output processor, and the waveform shaping unit may be arranged in the same area among the plurality of areas.

The analog-to-digital converter may include:a comparator that compares an analog signal corresponding to the charge with a reference signal;a comparison output processor that outputs a comparison result of the comparator; anda waveform shaping unit that shapes a waveform of an output signal of the comparison output processor, andthe comparator, the comparison output processor, and the waveform shaping unit are arranged in mutually different areas among the plurality of areas.

The analog-to-digital converter may include:a comparator that compares an analog signal corresponding to the charge with a reference signal;a comparison output processor that outputs a comparison result of the comparator; anda waveform shaping unit that shapes a waveform of an output signal of the comparison output processor, andthe comparator, the comparison output processor, and the waveform shaping unit are arranged in mutually different areas among the plurality of areas.

The imaging device may further include:a first area in which the photoelectric converter is arranged; anda second area in which at least a portion of the analog-to-digital converter is arranged, andthe signal transmitter may transmit and receive the charge of the floating diffusion between the first area and the second area.

The photoelectric converter may include:a first photoelectric converter; anda second photoelectric converter,the floating diffusion may include:a first floating diffusion that stores a charge photoelectrically converted by the first photoelectric converter; anda second floating diffusion that stores a charge photoelectrically converted by the second photoelectric converter,the plurality of areas may include:a first area in which the first photoelectric converter is arranged;a second area in which the second photoelectric converter is arranged; anda third area in which at least a portion of the analog-to-digital converter is arranged, andthe signal transmitter may include:a first signal transmitter that transmits and receives the charge of the first floating diffusion between the first area and the third area; anda second signal transmitter that transmits and receives the charge of the second floating diffusion between the second area and the third area.

One of the first photoelectric converter and the second photoelectric converter may have a silicon semiconductor layer, and the other of the first photoelectric converter and the second photoelectric converter may have a non-silicon semiconductor layer.

The imaging device may further include: a first storage unit provided for each of the pixels to store the charge photoelectrically converted by the first photoelectric converter; anda second storage unit provided for each of the pixels to store the charge photoelectrically converted by the second photoelectric converter, whereinthe first storage unit may be arranged in the first area,the second storage unit may be arranged in the second area,the first floating diffusion may store a charge corresponding to the charge stored in the first storage unit, andthe second floating diffusion may store a charge corresponding to the charge stored in the second storage unit.

The imaging device may further include a storage unit provided for each of the pixels to store the charge photoelectrically converted by either the first photoelectric converter or the second photoelectric converter, whereinthe storage unit may be arranged in the second area, either one of the first floating diffusion and the second floating diffusion may store the charge corresponding to the charge stored in the storage unit, and the other of the first floating diffusion and the second floating diffusion may store the charge photoelectrically converted by the first photoelectric converter or the second photoelectric converter without storing the charge in the storage unit.

Both the first photoelectric converter and the second photoelectric converter may have a silicon semiconductor layer, or may have a non-silicon semiconductor layer.

The imaging device may further include: a first storage unit provided for each of the pixels to store the charge photoelectrically converted by the first photoelectric converter; anda second storage unit provided for each of the pixels to store the charge photoelectrically converted by the second photoelectric converter.

At least one of the first storage unit and the second storage unit may be provided across the first area and the second area.

According to the present disclosure, there is provided an electronic apparatus including: an imaging device that outputs a photoelectrically converted digital signal for each pixel; anda signal processor that performs signal processing on the digital signal, wherein the imaging device includes:a plurality of pixels each having a photoelectric converter;an analog-to-digital converter provided for each area pixel composed of two or more of the pixels in the plurality of pixels to convert a signal corresponding to a charge photoelectrically converted by the two or more pixels into a digital signal;a floating diffusion that outputs the charge photoelectrically converted by the photoelectric converter in the pixelsa plurality of stacked areas in which the plurality of pixels, the plurality of the analog-to-digital converters, and the plurality of the floating diffusions are arranged; anda signal transmitter that transmits and receives signals between the plurality of areas, whereinamong the plurality of areas, an area in which the plurality of photoelectric converters are arranged is provided separately from an area in which the analog-to-digital converter is arranged, andthe signal transmitter transmits and receives a charge of the floating diffusion between the area in which the photoelectric converter is arranged and the area in which the analog-to-digital converter is arranged.

DESCRIPTION OF EMBODIMENTS

Hereinafter, embodiments of an imaging device and electronic apparatus will be described with reference to the drawings. Although main components of the imaging device and the electronic apparatus will be mainly described below, the imaging device and the electronic apparatus may include components and functions that are not illustrated or explained. The following description does not exclude components or functions which are not illustrated or mentioned.

FIG.1is a diagram illustrating a configuration example of an imaging device1according to an embodiment of the present technology. This imaging device1includes a pixel array unit10, a time code generator20, a reference signal generator30, a vertical driver40and a horizontal control unit50.

The pixel array unit10includes a plurality of area pixels100, and pixel signals are analog-to-digital converted (hereinafter referred to as AD conversion) for each area pixel100. The area pixel100has a plurality of pixels. Each pixel has a photoelectric converter. As will be described later, the area pixel100has one analog-to-digital converter (hereinafter referred to as AD converter). The AD converter sequentially AD-converts analog pixel signals captured by each pixel in the area pixel100and outputs corresponding digital signals. Note that the area pixel100can be also referred to as a pixel, and each photoelectric converter in the pixel can be referred to as a sub-pixel or a color pixel.

The pixel array unit10includes area pixels100arranged in a two-dimensional matrix to generate pixel signals, and a plurality of time code transfer units200arranged between the plurality of area pixels100arranged in the column direction. The area pixel100outputs a time code that is the result of AD-converting the analog pixel signal of each pixel. The time code transfer unit200sequentially transfers the time code in the column direction. The transferred time code is input to the horizontal control unit50. A signal line101is a signal line that connects the area pixels100and the time code transfer unit200. Details of the configurations of the area pixels100and the time code transfer unit200will be described later.

The time code generator20generates a time code and outputs it to the time code transfer unit200. Here, the time code is a code indicating elapsed time from the start of AD conversion in the area pixel100. This time code has a size equal to the number of bits of the digital pixel signal after conversion, and a Gray code, for example, can be used. The time code is output to the time code transfer unit200via the signal line21.

The reference signal generator30generates a reference signal and outputs it to the area pixels100. This reference signal is a reference signal for AD conversion in the area pixel100, and for example, a signal (ramp signal) whose voltage linearly decreases with time can be used. This reference signal is output via the signal line31. The generation and output of the time code by the time code generator20are executed in synchronization with the generation and output of the reference signal by the reference signal generator30. As a result, the time code and the reference signal output from the time code generator20and the reference signal generator30correspond on a one-to-one basis, and the voltage of the reference signal can be obtained from the time code. A time code decoder52, which will be described later, performs decoding by acquiring the voltage of the reference signal from the time code.

The vertical driver40generates and outputs control signals and the like for the area pixels100. This control signal is output to the area pixels100via the signal line41. The details of the configuration of the vertical driver40will be described later.

The horizontal control unit50processes the time code transferred by the time code transfer unit200. The time code is input to the horizontal control unit50via the signal line11. Details of the configuration of the horizontal control unit50will be described later. Note that the horizontal control unit50is an example of the processing circuit described in the claims.

FIG.2is a diagram illustrating a configuration example of the vertical driver40according to an embodiment of the present technology. The vertical driver40includes a control signal generator42and a power supply unit43.

The control signal generator42generates and outputs control signals for the area pixels100. The power supply unit43supplies power necessary for the operation of the area pixels100. These control signals and power are transmitted by the signal line41. As illustrated in the figure, the signal line41is composed of a plurality of signal lines (OFG, OFD, TX, SEL1, SEL2, SEL3, SEL4, Vb, INI, WORD) and a plurality of power supply lines (VDDH, VBIAS). The signal lines (OFG, OFD, TX, SEL1, SEL2, SEL3, SEL4, Vb, INI, WORD) are connected to the control signal generator42and transmit control signals for the area pixels100. On the other hand, the power supply lines (VDDH, VBIAS) are connected to the power supply unit43and used for power supply. Details of these signal lines will be described later.

[Configuration of Horizontal Control Unit]

FIG.3is a diagram illustrating a configuration example of the horizontal control unit50in one embodiment of the present technology. The horizontal control unit50includes a time code decoder52, a column signal processor53and a clock signal generator54.

The time code decoder52decodes the time code. By this decoding, a digital pixel signal that is the result of AD conversion is generated. A plurality of time code decoders52are arranged in the horizontal control unit50and correspond to the time code transfer units200arranged in the pixel array unit10on a one-to-one basis. Time codes are simultaneously input to these time code decoders52from the corresponding time code transfer units200. Decoding of the input time codes is performed concurrently by these time code decoders52. After that, the plurality of decoded digital pixel signals are input to the column signal processor53.

The column signal processor53processes the digital pixel signals output from the time code decoder52. Correlated Double Sampling (CDS), which will be described later, can be performed as this processing. The column signal processor53horizontally transfers the processed digital pixel signals. The column signal processor53sequentially transfers and outputs processed pixel signals corresponding to a plurality of digital pixel signals simultaneously input by a plurality of time code decoders52. The pixel signal output from the column signal processor53is an output signal of the imaging device1and corresponds to a digital pixel signal.

FIG.4Ais a diagram illustrating a configuration example of the area pixel100according to an embodiment of the present technology. The area pixel100includes four photoelectric converters110(110a,110b,110c,110d) corresponding to four pixels and an AD converter190. Floating diffusions FD that are the output of the four photoelectric converters110are connected to a common input node of the AD converter190. As a result, the number of signal transmitters91for four photoelectric converters110and AD converters190can be reduced.

The photoelectric converter110performs photoelectric conversion for each pixel to generate and hold an analog pixel signal corresponding to incident light. Further, the photoelectric converter110is controlled by the vertical driver40and holds the held analog pixel signal in the floating diffusion FD in the state of charge. This charge is supplied to the comparator150of the AD converter190through the signal transmitter91. Details of the configuration of the photoelectric converter110and the like will be described later. The floating diffusions FD of the four photoelectric converters110are gathered in one place and the charge is transmitted and received to and from the AD converter190, so that the number of signal transmitters91can be reduced.

The AD converter190AD-converts the analog pixel signals generated by the photoelectric converter110and the like. The AD converter190includes a comparator150, a comparison output processor160and a conversion result holding unit170.

The comparator150compares the reference signal generated by the reference signal generator30and the analog pixel signal output by the photoelectric converter110or the like. The comparison result is output to the comparison output processor160via the signal line106. The comparator150compares one of a plurality of analog pixel signals output from the photoelectric converter110and the like with a reference signal. That is, the voltage of the analog pixel signal transmitted through one of the signal lines102to105is compared with the voltage of the reference signal. The comparison result is output as an electrical signal. For example, when the voltage of the analog pixel signal is lower than the voltage of the reference signal, a signal with a value of “1” can be output. When the voltage of the analog pixel signal is higher than the voltage of the reference signal, a signal with a value of “0” can be output. The details of the configuration of the comparator150will be described later.

The comparison output processor160processes the comparison result output by the comparator150and outputs the processed comparison result to the conversion result holding unit170. The processed comparison result is output to the conversion result holding unit170via the signal line107. As this processing, for example, level conversion and waveform shaping can be performed.

The conversion result holding unit170holds the time code output from the time code transfer unit200based on the processed comparison result output from the comparison output processor160as the AD conversion result. The conversion result holding unit170holds the time code output from the time code transfer unit200when the comparison result changes from “1” to “0”, for example. The time code at this time is the time code generated by the time code generator20and transferred to the area pixels100by the time code transfer unit200. After that, the conversion result holding unit170outputs the held time code to the time code transfer unit200under the control of the vertical driver40. The time code transfer unit200transfers the output time code to the time code decoder52of the horizontal control unit50.

As described above, a signal whose voltage changes from a high voltage to a low voltage in a ramp form is used as the reference signal, and the time code when the voltage of this reference signal transitions from a higher state to a lower state than the voltage of the analog pixel signal can be held in the conversion result holding unit170. That is, the conversion result holding unit170holds the time code when the analog pixel signal and the reference signal are approximately equal. The held time code is converted by the time code decoder52into a digital signal representing the voltage of the reference signal at the corresponding time. In this way, AD conversion of the analog pixel signal generated by the photoelectric converter110can be performed.

The area pixel100inFIG.4Acorresponds to the rolling shutter method, but a configuration of the area pixel100corresponding to the global shutter method may be adopted in which the pixel signals of all the pixels are stored in the storage unit113and then sequentially transferred to the AD converter190for AD conversion.FIG.4Bis a block diagram illustrating a schematic configuration of the area pixel100corresponding to the global shutter method. The area pixel100inFIG.4Bdiffers from the area pixel100inFIG.4Ain the internal configuration of the photoelectric converter110. The photoelectric converter110inFIG.4Bincludes charge generators111(111a,111b,111c,111d), storage units113(113a,113b,113c,113d), and transfer transistors504(504a,504b,504c,504d).

Pixel signals photoelectrically converted by the four photoelectric converters110in the area pixel100are stored in the storage unit113simultaneously for all pixels. After that, the transfer transistors504of the respective pixels are sequentially turned on, and the charge corresponding to the pixel signal stored in the storage unit113is input to the AD converter190via the floating diffusion FD and the signal transmitter91. The internal configuration of the AD converter190is the same as inFIG.4A.

FIG.5Ais a diagram illustrating a configuration example of the photoelectric converter110according to an embodiment of the present technology. This photoelectric converter110has a charge generator111. The charge generator111includes MOS transistors502and504and a photodiode501. Here, N-channel MOS transistors can be used as the MOS transistors502and504. A plurality of signal lines (OFD, OFG, TX) are connected to the photoelectric converter110. An overflow drain signal line OFD (Overflow Drain) is a signal line that supplies a reset voltage VOFG for the photodiode501. An overflow gate signal line OFG (Overflow Gate) is a signal line for transmitting a control signal to the MOS transistor502. A transfer signal line TX is a signal line for transmitting a control signal to the MOS transistor504. As illustrated in the figure, the overflow gate signal line OFG and the transfer signal line TX are connected to the gates of the MOS transistors502and504, respectively. When a voltage equal to or higher than a threshold voltage between the gate and source (hereinafter referred to as an ON signal) is input through these signal lines, the corresponding MOS transistor becomes conductive.

The drain and gate of the MOS transistor502are connected to the overflow drain signal line OFD and the overflow gate signal line OFG, respectively. The source of the MOS transistor502is connected to the cathode of the photodiode501and the source of the MOS transistor503. The anode of the photodiode501is grounded. The MOS transistor504has a gate connected to the transfer signal line TX and a drain connected to the cathode of the photodiode501and the floating diffusion FD.

The photodiode501generates a charge according to the amount of light irradiated and holds the generated charge. The MOS transistor502discharges the excessive charge generated in the photodiode501. The MOS transistor502further discharges the charge stored in the photodiode501by conducting between the photodiode501and the overflow drain signal line OFD. That is, the photodiode501is further reset. The MOS transistor504transfers the charge generated by the photodiode501to the floating diffusion FD.

The configurations of the photoelectric converters110b,110c, and110dare the same as the configuration of the photoelectric converter110a, so description thereof will be omitted. The charges corresponding to the analog pixel signals generated by the photoelectric converters110(110ato110d) are supplied to the floating diffusion FD common to four pixels.

FIG.5Bis a circuit diagram of the photoelectric converter110in the global shutter method. The photoelectric converter110inFIG.5Bhas a transistor (first transfer transistor)503and a storage unit113in addition to the circuit configuration inFIG.5A. The transistor503is provided inside the charge generator111. A transistor (second transfer transistor)504is connected between the floating diffusion FD and the transistor503. The pixel signals photoelectrically converted by the photodiodes501of the respective pixel are stored in the storage unit113through the transistor503simultaneously for all pixels. After that, the charges stored in the storage unit113are sequentially sent to the AD converter190via the transistor504and the floating diffusion FD for each pixel.

FIG.6is a diagram illustrating a configuration example of the comparator150according to an embodiment of the present technology. The comparator150includes a signal input transistor12, a reference input transistor157and the MOS transistors13,151and152. Here, P-channel MOS transistors can be used as the MOS transistors151and152. N-channel MOS transistors can be used as MOS transistors12and157.

In addition to the afore-mentioned signal line102and the like, a plurality of signal lines (Vb, REF) and a power supply line VDDH are connected to the comparator150. A bias signal line Vb (Bias) is a signal line that supplies a bias voltage to the MOS transistor158. A reference signal line REF (Reference) is a signal line that transmits a reference signal to the reference input transistor157. The power supply line VDDH is a power supply line that supplies power to the comparator150.

The sources of the MOS transistors151and152are commonly connected to the power supply line VDDH. The gate of the MOS transistor151is connected to the gate and drain of the MOS transistor152and the drain of the reference input transistor157. The drain of the MOS transistor151is connected to the drain of the signal input transistor12and the signal line106. The source of the signal input transistor12and the source of the reference input transistor157are commonly connected to the drain of the MOS transistor158. The MOS transistor158has a gate connected to the bias signal line Vb and a source grounded. The gate of the MOS transistor12is connected to the signal line102. The MOS transistor13short-circuits the gate and drain of the MOS transistor12when the reset signal RST is at a high level. A gate of the reference input transistor157is connected to the reference signal line REF.

The signal input transistor12is a MOS transistor in which an input signal is input to a gate, which is a control terminal. An analog pixel signal is input as an input signal to the signal input transistor12in the figure.

The reference input transistor157is a MOS transistor in which a reference signal is input to a gate, which is a control terminal. This reference input transistor157forms a differential pair with the signal input transistor12. This differential pair compares the input signal and the reference signal. Specifically, when the input signal is smaller than the reference signal, the current flowing through the reference input transistor157is larger than the current flowing through the signal input transistor12. Conversely, when the input signal is greater than the reference signal, the current flowing through the reference input transistor157is smaller than the current flowing through the signal input transistor12. Thus, a current corresponding to the difference between the input signal and the reference signal flows through the signal input transistor12and the reference input transistor157forming a differential pair.

When the current flowing through one of the signal input transistor12and the reference input transistor157changes according to the difference between the input signal and the reference signal, the MOS transistor151converts this current change into a voltage change. The MOS transistor152converts changes in current flowing through the reference input transistor157into changes in voltage. These MOS transistors151and152form a current mirror circuit. This current mirror circuit operates so that a current equal to the current flowing through the reference input transistor157flows through the signal input transistor12. In this way, the input signal and the reference signal can be compared at a high speed.

The MOS transistor158controls the current flowing through the signal input transistor12and the reference input transistor157forming a differential pair. A predetermined bias voltage is supplied to the gate of the MOS transistor158through the bias signal line Vb. In this way, the MOS transistor158operates as a constant current power supply.

In this manner, the comparator150in the figure can compare the pixel signal input to the gate of the signal input transistor12and the reference signal input to the gate of the reference input transistor157.

First, the voltage of the reference signal line REF is set to 0 V. In this way, the reference input transistor157becomes non-conductive. Then, the voltage at the drain of the signal input transistor12becomes near 0 V due to the action of a differential amplifier circuit composed of the signal input transistor12, the reference input transistor157and the MOS transistor158. Next, the reset signal RST is set to a high level to turn on the MOS transistor13. As a result, a feedback circuit is formed, and the drain of the signal input transistor12has a voltage of approximately 0 V. Then, the floating diffusion FD of the photoelectric converter connected to the signal line102is discharged, and the voltage of the signal line102becomes 0 V.

A current mirror circuit composed of the MOS transistors151and152can further enhance the effect of setting the drain of the signal input transistor12to 0 V. That is, when the voltage of the reference signal line REF is set to 0 V, the current flowing through the MOS transistor152becomes approximately 0 A. Since the MOS transistor151forms a current mirror circuit together with the MOS transistor152, the current flowing through the MOS transistor151is also approximately 0 A. Therefore, the drain voltage of the signal input transistor12can be more accurately set to 0 V.

The MOS transistor13further has a function of resetting the floating diffusion FD. This reset can be done as follows. First, a voltage corresponding to the reset voltage of the floating diffusion FD is applied to the reference signal line REF. In this way, the reference input transistor157becomes conductive. Due to the action of the differential amplifier circuit and the current mirror circuit described above, the drain voltage of the MOS transistor13also becomes a value substantially equal to the reset voltage. Next, the reset signal RST is set to a high level to make the MOS transistor13conductive. As a result, a reset voltage is applied to the floating diffusion FD of the photoelectric converter, and resetting can be performed.

Thus, in one embodiment of the present technology, the MOS transistor13resets the floating diffusion FD. In this way, the configuration of the AD converter190can be simplified. By using the current mirror circuit, the gain in the differential amplifier circuit can be improved, and the floating diffusion FD can be reset more accurately.

Note that the configuration of the comparator150is not limited to this example. For example, instead of the MOS transistors151and152forming the current mirror circuit, a resistive load or a constant current power supply can be used. In this case, a resistive load or the like can be connected to either one or both of the signal input transistor12and the reference input transistor157of the differential pair.

[Configuration of Comparison Output Processor]

FIG.7is a diagram illustrating a configuration example of the comparison output processor160according to an embodiment of the present technology. The comparison output processor160has MOS transistors511to517. Here, the MOS transistors511,513and515can be configured of P-channel MOS transistors. Further, the MOS transistors512,514,516and517can be configured of N-channel MOS transistors. Note that the MOS transistor511forms a pre-amplifier161. The MOS transistor512forms a level converter162. The MOS transistors513to517form a waveform shaping unit163. In addition to the signal lines106and107described above, an initialization signal line INI (Initialize) and power supply lines (VDDH and VBIAS) are connected to the comparison output processor160. The initialization signal line INI is a signal line for transmitting a control signal to the MOS transistors513and516. The power supply lines VDDH and VBIAS are power supply lines for supplying power to the comparison output processor160.

The source and gate of the MOS transistor511are connected to the power supply line VDDH and the signal line106, respectively. The drain of the MOS transistor511is connected to the drain of the MOS transistor512. The MOS transistor512has a gate connected to the power supply line VBIAS and a source connected to the drains of the MOS transistors514and516and the gates of the MOS transistors515and517. The gates of the MOS transistors513and516are commonly connected to the initialization signal line INI. The source and drain of the MOS transistor513are connected to the power supply line VBIAS and the source of the MOS transistor514, respectively. The source of the MOS transistor516is grounded. The gate of the MOS transistor514is connected to the drains of the MOS transistors515and517and the signal line107. The source of the MOS transistor515is connected to the power supply line VBIAS, and the source of the MOS transistor517is grounded.

The pre-amplifier161amplifies the signal corresponding to the comparison result output from the comparator150. The pre-amplifier161outputs the amplified signal to the level converter162. This amplification is performed by the MOS transistor511.

The level converter162converts the level of the signal output from the pre-amplifier161. The power supply line VDDH is connected to the comparator150and the pre-amplifier161described with reference toFIG.6. In order to obtain a high gain in the comparator150and the pre-amplifier161, the power supplied by the power supply line VDDH needs to have a relatively high voltage. On the other hand, since the conversion result holding unit170and the like in the subsequent stage handle digital signals, they can be supplied with relatively low-voltage power. This relatively low power is supplied by the power supply line VBIAS. In this way, it is possible to reduce power consumption in the conversion result holding unit170and the like and to use a low-withstand-voltage transistor for the conversion result holding unit170and the like. In this way, the level converter162is arranged in order to transmit signals between circuits to which power supplies of different voltages are supplied. As a result, the level-converted signal is output to the waveform shaping unit163. The level converter162in the figure can limit the signal level to a voltage obtained by subtracting the threshold voltage of the MOS transistor512from the power supply voltage supplied by the power supply line VBIAS.

The waveform shaping unit163shapes the signal output from the level converter162into a sharply changing signal. The operation of this waveform shaping unit163will be described. In the initial state, the output of the level converter162has a value “0”. In this state, a signal of value “1” is input from the initialization signal line INI, and the MOS transistor516becomes conductive. As a result, the MOS transistor517becomes non-conductive, the MOS transistor515becomes conductive, and a value “1” is output to the signal line107. At this time, the MOS transistors513and514become non-conductive. After that, a signal of value “O” is input to the initialization signal line INI. As a result, the MOS transistor513becomes conductive and the MOS transistor516becomes non-conductive. Since the MOS transistor514is non-conductive and the output signal of the level converter162is “0”, the states of the MOS transistors515and517do not change.

Next, when the output signal of the level converter162changes from “0” to “1”, the MOS transistor517transitions to the conductive state and the MOS transistor515transitions to the non-conductive state. As a result, the voltage of the signal line107drops. As a result, the MOS transistor514transitions to the conductive state, and the gate voltages of the MOS transistors515and517further rise. Due to such a positive feedback action, the voltage of the signal line107drops rapidly. In this way, waveform shaping can be performed.

[Configuration of Conversion Result Holding Unit]

FIG.8is a diagram illustrating a configuration example of the conversion result holding unit170according to an embodiment of the present technology. The conversion result holding unit170includes a storage control unit171and storage units172to179. Here, for the sake of convenience, 8-bit data is assumed as a digital pixel signal after AD conversion. Therefore, the size of the time code is also 8 bits. The size of the converted digital pixel signal and time code can be changed according to the requirements of the system. For example, the size can be 15 bits.

In addition to the signal line107, a plurality of signal lines (WORD, CODE1 to CODE8) are connected to the conversion result holding unit170. A word signal line WORD (Word) is a signal line for transmitting control signals for the storage units172to179. Code signal lines CODE (Code) 1 to CODE8 are signal lines for bi-directionally transmitting time codes. The plurality of code signal lines CODE1 to CODE8 form the signal line101.

The storage units172to179store the time codes input from the time code transfer unit200. The storage units172to179each store a 1-bit time code. The configuration of the storage units172to179will be described by taking the storage unit172as an example. This storage unit172includes a bit storage unit522and a bidirectional switch523.

The bidirectional switch523is connected between the signal line526and the code signal line CODE1 to bidirectionally transmit data. The bidirectional switch523also has a control input terminal. A signal line524is connected to this control input terminal. When a value of “1” is input to the control input terminal through the signal line524, the bidirectional switch523becomes conductive, and data is transmitted bidirectionally between the signal line526and the code signal line CODE1. On the other hand, when the value “0” is input to the control input terminal, the bidirectional switch523becomes non-conductive.

The bit storage unit522is a storage device that stores 1-bit data. The bit storage unit522has an input/output terminal and a control input terminal to which signal lines526and107are connected respectively. When a signal having a value of “1” is input to the control input terminal via the signal line107, the bit storage unit522stores the 1-bit time code which is the signal transmitted from the bidirectional switch523via the signal line526. At that time, when the 1-bit time code changes, the data stored in the bit storage unit522is rewritten. After that, when the signal input to the control input terminal changes from “1” to “0”, the data stored in the bit storage unit522is held as it is. That is, the rewriting of the above data is not performed until the next signal input to the control input terminal becomes “1”. The bit storage unit522outputs the held data to the signal line526when the signal input to the control input terminal is “0”.

The storage control unit171outputs control signals via the signal line524to control the storage units172to179. The storage control unit171can generate and output a signal obtained by ORing two signals input from the word signal line WORD and the signal line107as a control signal for the bidirectional switch523. This can be done by an OR gate521.

[Configuration of Time Code Transfer Unit]

FIG.9is a diagram illustrating a configuration example of the time code transfer unit200in one embodiment of the present technology. The time code transfer unit200includes code holding units210and230and clock buffers220and240. The time code transfer unit200has the same number of code holding units and clock buffers as the number of rows of the area pixels100arranged in the pixel array unit10described with reference toFIG.1. For convenience, the code holding units210and230and the clock buffers220and240will be described as an example.

The code holding unit210holds time codes. This code holding unit210is configured of flip-flops211to218. The flip-flop211and the like hold one bit of the time code based on the clock signal output from the clock buffer220. Specifically, when the clock signal is “0”, the time code output from the time code generator20and input to the D-input terminal in the figure is held in the internal node, and the Q-output terminal is put into a high impedance state. Next, when the clock signal becomes “1”, the time code held in the internal node is output from the Q-output terminal. This output time code is input to the code holding unit230via the signal line101. In this manner, the time code transfer unit200transfers the time code by causing the plurality of time code holding units to operate as shift registers.

The clock buffer220outputs the clock signal generated by the clock signal generator54described inFIG.3to the code holding unit210and outputs the same to the next-stage clock buffer. The clock buffer220is configured of a plurality of inverting gates221to224and operates as a repeater that shapes a degraded clock signal. The clock buffer220sequentially transfers the clock signal in the direction opposite to the time code in the time code transfer unit200. That is, the clock buffer240outputs a clock signal to the code holding unit230and also outputs a clock signal to the clock buffer220. As a result, the clock signal input to the code holding unit210has a time delay corresponding to the propagation delay time for two inverting gates and the delay due to the wiring up to the inverting gate224as compared to the clock signal input to the code holding unit230. Thus, the clock buffer220further has the function of delaying the clock signal.

As described above, the flip-flop211and the like hold the input time code in the internal node when the clock signal is “0”. At the time of this holding, it is necessary to secure a predetermined time, a so-called setup time. Due to the clock signal delay caused by the clock buffer220, when the clock signal transitions to the value “0” in the code holding unit230, the clock signal input to the code holding unit210remains at the value “1”. That is, it remains in a state in which the time code held in the internal node is output. As a result, the setup time can be secured in the code holding unit230, and the time code can be transferred.

The code signal lines CODE1 to CODE8 are connected to the output of the code holding unit210and the input of the code holding unit230, respectively. As a result, the time code generated by the time code generator20and held in the code holding unit210is output to the conversion result holding unit170via these code signal lines CODE1 to CODE8. The time code held in the conversion result holding unit170after AD conversion is output to the code holding unit230via these code signal lines CODE1 to CODE8. Thus, the time code transfer unit200transfers the time code.

Next, the internal configuration of the area pixel100will be described. Since there are various candidates for the internal configuration of the area pixel100, representative internal configurations will be described in order below.

(Imaging Timing of Imaging Device)

FIG.10is a timing chart of one frame period of the imaging device according to the present disclosure.FIG.10shows a timing chart of the imaging device1of the global shutter method (the imaging device1including the area pixels100inFIG.4Band the photoelectric converter110inFIG.5B). The upper half ofFIG.10shows the timing of one frame period (time T1 to T6) after the start of exposure at time T1. The lower half ofFIG.10is a timing chart illustrating in detail the operation from time T3 to T4.

Time T1 to T2 is an exposure period. Immediately before time T1, the OFG signal becomes high level, the transistor502is turned on, and the charge in the photodiode501is discharged through the overflow drain signal line OFD. During the exposure period T1 to T2, the photodiode501continuously performs photoelectric conversion and stores charge. At time T2, the transfer signal TXG becomes high level, the transistor503is turned on, and the charge photoelectrically converted by the photodiode501is held in the storage unit113. The charge holding operation to the storage unit113is performed simultaneously for all pixels.

After that, four pixels in the area pixel are read out sequentially. InFIG.10, pixel A in the area pixel is read out at time T2 to T3, pixel B in the area pixel is read out at time T3 to T4, pixel C in the area pixel is read out at time T4 to T5, and pixel D in the area pixel is read out at time T5 to T6. Signals TX_A, TX_B, TX_C, and TX_D are gate signals for the transistors504of pixels A, B, C, and D within the area pixel, respectively. When this gate signal becomes high level, the transistor504is turned on, and the charge corresponding to the pixel signal stored in the storage unit113is transferred to the floating diffusion FD.

The readout operation of the pixel B will be described in detail below. The signal RST in the timing chart in the lower half ofFIG.10is the reset signal RST input to the gate of the transistor13in pixel B.

When the reset signal RST becomes high level at time t1, the transistor13in the AD converter190becomes conductive and the voltage of the floating diffusion FD is reset. A period from time t1 to t6 is a period for comparing the P-phase signal with the reference signal and converting the P-phase signal into a digital signal.

A reference signal REF composed of a ramp wave whose signal level linearly changes is input to the gate of the transistor157between times t2 and t4. When the signal level of the P-phase signal exceeds the signal level of the reference signal REF, the drain voltage of the differential pair of transistors12decreases, the drain voltage of the transistor511increases, and the output signal VCO of the AD converter190becomes low level (time t3).

Time t7 to t11 is a period for comparing the D-phase signal with the reference signal and converting the D-phase signal into a digital signal. At time t7, when the transfer signal TX_B becomes high level, the transistor504is turned on, and the charges held in the storage unit113are transferred to the floating diffusion FD. The charge of the floating diffusion FD is supplied to the gate of the transistor12in the AD converter190as a D-phase signal through the signal transmitter91.

During this period, the reference signal REF, which is a ramp wave whose signal level changes linearly, is input to the gate of the transistor157. When the signal level of the D-phase signal exceeds the signal level of the reference signal REF, the drain voltage of the differential pair of transistors12decreases, the drain voltage of the transistor151increases, and the output signal VCO of the AD converter190becomes low level (time t8).

In this manner, the AD converter190compares the P-phase signal or the D-phase signal stored in the storage unit113with the reference signal, and outputs the signal VCO indicating the timing at which the P-phase or D-phase signal matches the reference signal. The signal VCO is input to the conversion result holding unit170illustrated inFIG.8to generate a time code.

(First Example of Area Pixel100)

FIG.11is a circuit diagram of the area pixel100according to the first example,FIG.12is a cross-sectional view of the area pixel100according to the first example,FIG.13Ais a plan view taken along line A-A inFIG.12, andFIG.13Bis a plan view taken along line B-B inFIG.12.FIGS.11,12,13A and13Bshow an example where the area pixel100has four pixels.

The area pixel100according to the first example has four pixels, and each pixel does not have a storage unit. Therefore, the imaging device1having the area pixels100according to the first example performs imaging according to the rolling shutter method. As illustrated inFIG.11, the photoelectric converter110has transistors502and504and a photodiode501.

The imaging device1having the area pixels100according to the first example includes a first area AR1 and a second area AR2, as illustrated inFIG.11. A photoelectric converter110made of silicon is arranged in the first area AR1. Four photoelectric converters110corresponding to four pixels are provided in the area pixel100, and all of them are arranged in the first area AR1. An AD converter190made of silicon is arranged in the second area AR2.

The imaging device1having the area pixels100according to the first example stacks the first area AR1 and the second area AR2 so that the number of signal lines through which signals are transmitted and received between the first area AR1 and the second area AR2 is reduced as much as possible.

In the area pixel100according to the first example, the charges of the floating diffusions FD of all the photoelectric converters110in the area pixel100are supplied to the AD converters190via the same signal transmitter91. Therefore, only one differential pair of transistors12is required to receive this charge. The gate of this transistor12is connected to a transistor13for setting the gate voltage to the reset voltage. The transistor13short-circuits the drain of the transistor12to the gate when the reset signal RST is at high level. The drain of the transistor12is connected to the power supply voltage VDDH through the transistor151, and the gate voltage of the transistor12is set to a predetermined reset voltage when the reset signal RST is at high level.

A wiring layer71, a photoelectric converter110, a color filter72, and an on-chip lens73are stacked on a first substrate SUB1. An element isolation layer74is arranged between the pixels. A wiring layer75, an AD converter190, and a protective layer76are stacked on a second substrate SUB2. The layer structure of the first substrate SUB1 and the second substrate SUB2 illustrated inFIG.12is an example, and various modifications are conceivable.

As illustrated inFIG.12, the first area AR1 is arranged on the first substrate SUB1. The second area AR2 is arranged on the second substrate SUB2. The first area AR1 and the second area AR2 transmit and receive the charge of the floating diffusion FD of the photoelectric converter110through the signal transmitter91composed of, for example, a Cu—Cu connection91a. The four photoelectric converters110in the area pixel100transmit and receive the charge of the floating diffusion FD of each photoelectric converter110via the same signal transmitter91. The first area AR1 has the area of the entire substrate surface of the first substrate SUB1, and the second area AR2 has the area of the entire substrate surface of the second substrate SUB2. The first area AR1 and the second area AR2 have the same area.

As illustrated inFIGS.13A and13B, the photoelectric converters110are arranged over the entire first area AR1, and the AD converters190are arranged over the entire second area AR2. As described above, the first area AR1 and the second area AR2 transmit and receive the charge of the floating diffusion FD of each photoelectric converter110in the area pixel100through the signal transmitter91extending in the stacking direction. Thus, the number of signal transmitters91can be reduced. As a result, the arrangement area of the photoelectric converter110and the AD converter190can be increased, the aperture ratio of the photoelectric converter110can be increased, the area pixel100can be made finer, and the number of pixels of the imaging device1can be increased.

(Second Example of Area Pixel100)

FIG.14is a circuit diagram of the area pixel100according to the second example,FIG.15is a cross-sectional view of the area pixel100according to the second example,FIG.16Ais a plan view taken along line A-A inFIG.15,FIG.16Bis a plan view taken along line B-B ofFIG.15, andFIG.16Cis a plan view taken along line C-C ofFIG.15. The following description focuses on the differences from the area pixel100according to the first example.

The imaging device1having the area pixels100according to the second example includes a first area AR1, a second area AR2 and a third area AR3. The area pixel100according to the second example differs from the first example in that the AD converter190is divided and arranged in the second area AR2 and the third area AR3.

A photoelectric converter110is arranged in the first area AR1. The AD converter190is divided and arranged in the second area AR2 and the third area AR3. Hereinafter, a part of the AD converter190arranged in the second area AR2 is referred to as a first divided AD converter190a, and a part of the AD converter190arranged in the third area AR3 is referred to as a second divided AD converter190b.

The first divided AD converter190ahas transistors12,13,157and158in the AD converter190. The second divided AD converter190bhas the rest of the AD converter190, specifically transistors151,152, and511to517. The first divided AD converter190aand the second divided AD converter190btransmit and receive both drain signals of the transistors12and157, which form a differential pair.

The first area AR1 and the second area AR2 sequentially transmit and receive the charges of the four floating diffusions FD in the four pixels using the same signal transmitter91composed of vias91b. The second area AR2 and the third area AR3 transmit and receive drain signals of the differential pair in the AD converter190using the signal transmitter91composed of Cu—Cu connections91a. The first area AR1 is arranged on the first substrate SUB1, the second area AR2 is arranged on the second substrate SUB2, and the third area AR3 is arranged on the third substrate SUB3.

As illustrated inFIGS.16B and16C, since the AD converter190is divided and arranged in the second area AR2 and the third area AR3, a sufficient area for arranging the AD converters190can be secured.

(Third Example of Area Pixel100)

FIG.17is a circuit diagram of the area pixel100according to the third example,FIG.18is a cross-sectional view of the area pixel100according to the third example,FIG.19Ais a plan view taken along line A-A inFIG.18,FIG.19Bis a plan view taken along line B-B ofFIG.18, andFIG.19Cis a plan view taken along line C-C ofFIG.18. The following description will focus on the differences from the area pixel100according to the second example.

The area pixel100according to the third example differs from the second example in the method of dividing the AD converter190, and the first divided AD converter190aincluding the transistor512that outputs the comparison result output signal in the AD converter190is arranged in the second area AR2, and the second divided AD converter190bon the downstream side of the transistor512is arranged in the third area AR3. Others are the same as in the second example, the first divided AD converter190ais arranged in the second area AR2, and the second divided AD converter190bis arranged in the third area AR3. Therefore, the cross-sectional view of the third example illustrated inFIG.18is the same as the cross-sectional view of the second example illustrated inFIG.15, and the plan view of the third example illustrated inFIG.19is the same as the plan view of the second example illustrated inFIG.16.

As will be described later, the method of dividing the AD converter190into two is not limited to that illustrated inFIGS.14and17. It is desirable to minimize the number of signals transmitted and received between the first divided AD converter190aand the second divided AD converter190b.

(Summary of First to Third Examples of Area Pixel100)

FIG.20is a diagram summarizing the features of the area pixels100according to the first to third examples described above. In each of the first to third examples, the back side is the light irradiation surface. In the first to third examples, the photoelectric converter110is made of silicon, and the photoelectric converter110is arranged in the first area AR1. In the first example, the AD converter190is arranged in the second area AR2. In the second and third examples, the AD converter190is divided and arranged in the second area AR2 and the third area AR3. In the first example, the first area AR1 and the second area AR2 transmit and receive the charge of the floating diffusion FD of the photoelectric converter110through the signal transmitter91composed of the Cu—Cu connection91a. In the first area AR1 and the second area AR2 in the second and third examples, the charge of the floating diffusion FD of the photoelectric converter110is transmitted and received through the signal transmitter91composed of the via91b. In the second area AR2 and the third area AR3 in the second example, the drain signals of the differential pair in the AD converter190are transmitted and received through the signal transmitter91composed of the Cu—Cu connections91a. In the second area AR2 and the third area AR3 in the third example, the comparison result signal in the AD converter190is transmitted and received through the signal transmitter91composed of the Cu—Cu connection91a.

(Fourth Example of Area Pixel100)

FIG.21is a circuit diagram of the area pixel100according to the fourth example,FIG.22is a cross-sectional view of the area pixel100according to the fourth example,FIG.23Ais a plan view taken along line A-A inFIG.22, andFIG.23Bis a plan view taken along line B-B inFIG.22.FIGS.21,22,23A and23Bshow an example where the area pixel100has four pixels.

The area pixel100according to the fourth example does not have a storage unit connected to the photoelectric converter110as in the first to third examples, and is used in the imaging device1of the rolling shutter method.

The area pixel100according to the fourth example has a photoelectric converter110made of a material other than silicon. Materials other than silicon are, for example, organic semiconductor materials. Thus, the photoelectric converter110of the fourth example has a semiconductor layer containing a material other than silicon (hereinafter also referred to as non-silicon). More specifically, the photoelectric converter110of the fourth example has a structure in which an upper electrode layer11a, a photoelectric conversion layer11b, an insulating layer11d, and a lower electrode layer11eare stacked.

The imaging device1having the area pixels100according to the fourth example includes a first area AR1 and a second area AR2 that are stacked as illustrated inFIGS.21and22. The first area AR1 and the second area AR2 are arranged in different layers on the same substrate. The photoelectric converter110is arranged in the first area AR1. A layer in which the photoelectric converter110is arranged is a semiconductor layer made of a material other than silicon. More specifically, the upper electrode layer11a, the photoelectric conversion layer11b, the insulating layer11d, and the lower electrode layer11emade of a material other than silicon are stacked in the first area AR1. Materials for the upper electrode layer11aand the lower electrode layer11eare, for example, ITO (Indium Tin Oxide) and IZO (Indium Zinc Oxide).

In the second area AR2, the wiring layer71and the AD converter190are arranged in different layers. The layer in which the AD converter190is arranged is a semiconductor layer made of silicon. The AD converter190and the wiring layer71are arranged in the second area AR2.

The first area AR1 and the second area AR2 transmit and receive the charge of the floating diffusion FD through the signal transmitter91composed of the via91b.

In the imaging device1having the area pixels100according to the fourth example, a semiconductor layer made of silicon is arranged on a support substrate in a pre-process to sequentially form the AD converter190and the wiring layer71. In a post-process, a non-silicon semiconductor layer is formed to form the photoelectric converter110.

As described above, the area pixel100according to the fourth example has a structure in which the AD converter190made of silicon and the photoelectric converter110made of a material other than silicon are stacked on the same substrate. Since the four photoelectric converters110and the AD converters190in the area pixel100sequentially transmit and receive the charge of the floating diffusion FD via the same signal transmitter91composed of vias91b, the number of vias91bcan be reduced, and the area of the photoelectric converter110and the AD converter190can be increased accordingly, and the area pixel100can be made finer.

(Fifth Example of Area Pixel100)

FIG.24is a circuit diagram of the area pixel100according to the fifth example,FIG.25is a cross-sectional view of the area pixel100according to the fifth example,FIG.26Ais a plan view taken along the line A-A inFIG.25,FIG.26Bis a plan view taken along line B-B ofFIG.25, andFIG.26Cis a plan view taken along line C-C ofFIG.25.FIGS.24,25,26A and26Bshow an example where the area pixel100has four pixels. The following description focuses on the differences from the area pixel100according to the fourth example.

As in the third example, the area pixel100according to the fifth example does not have a storage unit connected to the photoelectric converter110, and is used in the imaging device1of the rolling shutter method.

As illustrated inFIGS.24and25, the imaging device1having the area pixels100according to the fifth example includes a first area AR1, a second area AR2 and a third area AR3 which are stacked. A photoelectric converter110made of a material other than silicon is arranged in the first area AR1. The AD converter190is divided into a first divided AD converter190aand a second divided AD converter190b. The first divided AD converter190aand the photoelectric converter110transmit and receive the charge of the floating diffusion FD. The first divided AD converter190ahas differential pairs of transistors12,157and transistors13,158in the AD converter190. The second divided AD converter190bhas the rest of the AD converter190, specifically transistors151,152, and511to517. The first divided AD converter190ais arranged in the second area AR2, and the second divided AD converter190bis arranged in the third area AR3. The first area AR1 and the second area AR2 are stacked on the first substrate SUB1. The third area AR3 is arranged on the second substrate SUB2.

The first area AR1 and the second area AR2 transmit and receive the charge of the floating diffusion FD through the signal transmitter91composed of the via91b. The second area AR2 and the third area AR3 transmit and receive drain signals of the differential pair of transistors12and157through the signal transmitter91composed of a Cu—Cu connection91a.

As illustrated inFIGS.26B and26C, the first divided AD converter190aand the second divided AD converter190bare arranged over the entire areas of the respective areas, respectively, so that a sufficient area required for arranging the AD converter190can be secured, and microfabrication becomes possible.

(Sixth Example of Area Pixel100)

FIG.27is a circuit diagram of the area pixel100according to the sixth example,FIG.28is a cross-sectional view of the area pixel100according to the sixth example,FIG.29Ais a plan view in the direction of line A-A inFIG.28, andFIG.29Bis a plan view taken along line B-B ofFIG.28, andFIG.29Cis a plan view taken along line C-C ofFIG.28.FIGS.27,28,29A and29Bshow an example where the area pixel100has four pixels. The following description focuses on the differences from the area pixel100according to the fourth example.

As in the third example, the area pixel100according to the sixth example does not have a storage unit connected to the photoelectric converter110, and is used in the imaging device1of the rolling shutter method.

The first divided AD converter190ain the sixth example has transistors12,13,151,152,157,158,511,512in the AD converter190. The second divided AD converter190bhas transistors513to517in the AD converter190. That is, the AD converter190is divided at the source node of the transistor512that outputs the comparison result signal between the pixel signal and the reference signal. The first divided AD converter190aand the second divided AD converter190btransmit and receive the comparison result output signal through the signal transmitter91composed of the Cu—Cu connection91a. The transistor512that outputs the comparison result output signal forms a level converter.

(Summary of Fourth to Sixth Examples of Area Pixel100)

FIG.30is a diagram summarizing the features of the area pixels100according to the fourth to sixth examples described above. In the fourth to sixth examples, the photoelectric converter110is formed of a non-silicon semiconductor layer, and the AD converter190is formed of a silicon semiconductor layer. In the fourth to sixth examples, the photoelectric converter110is arranged in the first area AR1. The AD converter190in the fourth example is arranged in the second area AR2. The AD converters190in the fifth and sixth examples are divided and arranged in the second area AR2 and the third area AR3. In the fourth to sixth examples, the first area AR1 and the second area AR2 transmit and receive the charge of the floating diffusion FD through the signal transmitter91composed of the via91b. The second area AR2 and the third area AR3 in the fifth example transmit and receive drain signals of a differential pair in the AD converter190through the signal transmitter91composed of the Cu—Cu connection91a. The second area AR2 and the third area AR3 in the sixth example transmit and receive the comparison result signal in the AD converter190through the signal transmitter91composed of the Cu—Cu connection91a.

(Seventh Example of Area Pixel100)

FIG.31is a circuit diagram of the area pixel100according to the seventh example,FIG.32is a cross-sectional view of the area pixel100according to the seventh example,FIG.33Ais a plan view in the direction of line A-A inFIG.32,FIG.33Bis a plan view taken along line B-B ofFIG.32, andFIG.33Cis a plan view taken along line C-C ofFIG.32.FIGS.31,32,33A and33Bshow an example where the area pixel100has four pixels.

As in the fourth example, the area pixel100according to the seventh example does not have a storage unit connected to the photoelectric converter110, and is used in the imaging device1of the rolling shutter method.

The area pixel100according to the seventh example has a photoelectric converter110(first photoelectric converter110a) made of a material other than silicon and a photoelectric converter110(second photoelectric converter110b) made of silicon. Materials other than silicon include, for example, organic semiconductor materials. The first photoelectric converter110aperforms, for example, green photoelectric conversion, and the second photoelectric converter110bperforms, for example, red and blue photoelectric conversion.

As illustrated inFIG.31, the floating diffusion FD of the first photoelectric converter110aand the floating diffusion FD of the second photoelectric converter110bare connected to the gate of the transistor12and the source of the transistor13in the AD converter190.

The imaging device1having the area pixels100according to the seventh example includes a first area AR1, a second area AR2 and a third area AR3 which are stacked as illustrated inFIGS.31and32. The first area AR1 and the second area AR2 are stacked on the first substrate SUB1. The third area AR3 is arranged on the second substrate SUB2. The first photoelectric converter110ais arranged in the first area AR1 using a material other than silicon. The second photoelectric converter110bmade of silicon is arranged in the second area AR2. The AD converter190made of silicon is arranged in the third area AR3.

The first area AR1 and the third area AR3 transmit and receive the charge of the floating diffusion FD of the first photoelectric converter110athrough the signal transmitter91composed of the via91band the Cu—Cu connection91a. The second area AR2 and the third area AR3 transmit and receive the charge of the floating diffusion FD of the second photoelectric converter110bthrough the signal transmitter91composed of the Cu—Cu connection91a.

As illustrated inFIGS.33A and33B, the first photoelectric converter110aand the second photoelectric converter110bare arranged over the entire areas of the respective areas, so that the aperture ratio can be increased and the area pixels100can be made finer.

As described above, the area pixel100according to the seventh example has two types of photoelectric converters110(110a,110b), and the charge of the floating diffusion FD of each of the photoelectric converters110(110a,110b) is transferred to the AD converter190via the via91band the Cu—Cu connection91a. Since the photoelectric converters110(110a,110b) are arranged over the entire areas of separate layers, a sufficient arrangement area for each photoelectric converter110can be secured even if two types of photoelectric converters110(110a,110b) are provided.

(Eighth Example of Area Pixel100)

FIG.34is a circuit diagram of the area pixel100according to the eighth example,FIG.35is a cross-sectional view of the area pixel100according to the eighth example,FIG.36Ais a plan view in the direction of line A-A inFIG.35,FIG.36Bis a plan view taken along line B-B ofFIG.35, andFIG.36Cis a plan view taken along line C-C ofFIG.35.FIGS.34,35,36A and36Bshow an example where the area pixel100has four pixels.

The area pixel100according to the eighth example does not have a storage unit connected to the photoelectric converter110as in the seventh example, and is used in the imaging device1of the rolling shutter method.

Unlike the seventh example, the area pixel100according to the eighth example has a first AD converter190athat receives the charge of the floating diffusion FD of the first photoelectric converter110aand a second AD converter190bthat receives the charge of the floating diffusion FD of the second photoelectric converter110b. Thus, the area pixel100according to the eighth example has more AD converters190than the seventh example.

As illustrated inFIGS.34and35, the first photoelectric converter110amade of a material other than silicon is arranged in the first area AR1. The second photoelectric converter110bmade of silicon is arranged in the second area AR2. In the third area AR3, the first AD converter190aand the second AD converter190bmade of silicon are arranged in the same layer. The first area AR1 and the second area AR2 are stacked on the first substrate SUB1, and the third area AR3 is arranged on the second substrate SUB2. The first area AR1 and the third area AR3 transmit and receive the charge of the floating diffusion FD of the first photoelectric converter110athrough the signal transmitter91composed of the via91band the Cu—Cu connection91a. The second area AR2 and the third area AR3 transmit and receive the charge of the floating diffusion FD of the second photoelectric converter110bthrough the signal transmitter91composed of the Cu—Cu connection91a.

As illustrated inFIG.36A, the first photoelectric converters110aare arranged over the entire first area AR1. As illustrated inFIG.36B, the second photoelectric converters110bare arranged over the entire second area AR2. Further, as illustrated inFIG.36C, the first AD converter190aand the second AD converter190bare arranged in the third area AR3, and the first AD converter190ais arranged so as to surround the second AD converter190b.

Since the area pixel100according to the eighth example includes the first AD converter190afor the first photoelectric converter110aand the second AD converter190bfor the second photoelectric converter110b, the first AD converter190aand the second AD converter190bcan perform AD conversion in parallel, and the AD conversion processing time can be shortened.

(Summary of Seventh to Eighth Examples of Area Pixel100)

FIG.37is a diagram summarizing the features of the area pixels100according to the seventh and eighth examples described above. In the seventh and eighth examples, the back side is the light irradiation surface, the first photoelectric converter110ais formed of a non-silicon semiconductor layer, and the second photoelectric converter110bis formed of a silicon semiconductor layer. The first photoelectric converter110ais arranged in the first area AR1, and the second photoelectric converter110bis arranged in the second area AR2. The AD converter190of the seventh example is arranged in the third area AR3. The eighth example has two AD converters190(a first AD converter190aand a second AD converter190b). The first AD converter190aand the second AD converter190bare arranged in the third area AR3. In the seventh example and the eighth example, the first area AR1 and the third area AR3 transmit and receive the charge of the floating diffusion FD of the first photoelectric converter110athrough the signal transmitter91composed of the via91band the Cu—Cu connection91a. Further, the second area AR2 and the third area AR3 transmit and receive the charge of the floating diffusion FD of the second photoelectric converter110bthrough the signal transmitter91composed of the Cu—Cu connection91a.

(Ninth Example of Area Pixel100)

FIG.38is a circuit diagram of the area pixel100according to the ninth example,FIG.39is a cross-sectional view of the area pixel100according to the ninth example,FIG.40Ais a plan view in the direction of line A-A inFIG.39,FIG.40Bis a plan view taken along the line B-B ofFIG.39, andFIG.40Cis a plan view taken along the line C-C ofFIG.39.FIGS.38,39,40A and40Bshow an example where the area pixel100has four pixels.

Since the area pixel100according to the ninth example does not have a storage unit connected to the photoelectric converter110of each pixel, the imaging device1having the area pixel100according to the ninth example performs imaging using the rolling shutter method.

As illustrated inFIG.38, the area pixel100according to the ninth example has a first photoelectric converter110aand a second photoelectric converter110bfor each pixel. Both the first photoelectric converter110aand the second photoelectric converter110bhave a semiconductor layer made of silicon.

The imaging device1having the area pixels100according to the ninth example includes a first area AR1, a second area AR2 and a third area AR3. The first photoelectric converter110ais arranged in the first area AR1. The second photoelectric converter110bis arranged in the second area AR2. The AD converter190is arranged in the third area AR3.

The first area AR1 and the second area AR2 are stacked on the first substrate SUB1. The third area AR3 is arranged on the second substrate SUB2.

The first substrate SUB1 and the second substrate SUB2 transmit the charge of the floating diffusion FD of the first photoelectric converter110aand the charge of the floating diffusion FD of the second photoelectric converter110bthrough the signal transmitter91composed of the Cu—Cu connection91a.

(Tenth Example of Area Pixel100)

FIG.41is a circuit diagram of the area pixel100according to the 10th example,FIG.42is a cross-sectional view of the area pixel100according to the 10th example,FIG.43Ais a plan view in the direction of line A-A inFIG.42,FIG.43Bis a plan view taken along line B-B ofFIG.42, andFIG.43Cis a plan view taken along line C-C ofFIG.42. The following description will focus on the differences from the ninth example.

The area pixel100according to the 10th example is common to the ninth example in that each pixel has a first photoelectric converter110aand a second photoelectric converter110b, but the first photoelectric converter110aand the second photoelectric converter110baccording to the 10th example each have a semiconductor layer made of a material other than silicon, and are made of, for example, an organic semiconductor material. The first photoelectric converter110aand the second photoelectric converter110bperform photoelectric conversion of different color wavelengths, for example.

As illustrated inFIG.41, the first photoelectric converter110ais arranged in the first area AR1. The second photoelectric converter110bis arranged in the second area AR2. Both the first area AR1 and the second area AR2 have semiconductor layers made of a material other than silicon.

The AD converter190made of silicon is arranged in the third area AR3. The first area AR1, the second area AR2 and the third area AR3 are stacked on the same substrate. The first area AR1 and the third area AR3 transmit and receive the charge of the floating diffusion FD of the first photoelectric converter110athrough the signal transmitter91composed of the vias91b. Similarly, the second area AR2 and the third area AR3 transmit and receive the charge of the floating diffusion FD of the second photoelectric converter110bthrough the signal transmitter91composed of the via91b.

As illustrated inFIGS.43A,43B, and43C, the first photoelectric converter110ais arranged in the entire first area AR1, the second photoelectric converter110bis arranged in the entire second area AR2, and the AD converter190is arranged over the entire third area AR3. Thus, even if two types of photoelectric converters110aand110bare provided, a sufficient arrangement area for each photoelectric converter can be secured.

(Eleventh Example of Area Pixel100)

FIG.44is a circuit diagram of the area pixel100according to the 11th example,FIG.45is a cross-sectional view of the area pixel100according to the 11th example,FIG.46Ais a plan view taken along line A-A inFIG.45,FIG.46Bis a plan view taken along line B-B ofFIG.45,FIG.46Cis a plan view taken along line C-C ofFIG.45, andFIG.46Dis a plan view taken along line D-D ofFIG.45. The following description focuses on the differences from the area pixel100according to the 10th example.

Since each pixel of the area pixel100according to the 11th example does not have a storage unit, the imaging device1having the area pixel100according to the 11th example performs imaging according to the rolling shutter method.

A first photoelectric converter110amade of a material other than silicon is arranged in the first area AR1. A second photoelectric converter110bmade of a material other than silicon is arranged in the second area AR2.

The area pixel100according to the 11th example differs from the 10th example in that the AD converter190is divided into two. The AD converter190in the 11th example is divided into a first divided AD converter190aand a second divided AD converter190b. The first divided AD converter190aand the second divided AD converter190btransmit and receive drain signals of the differential pair of transistors12and157in the AD converter190. The first divided AD converter190ais arranged in the third area AR3, and the second divided AD converter190bis arranged in the fourth area AR4.

The first area AR1, the second area AR2 and the third area AR3 are stacked on the first substrate SUB1. The fourth area AR4 is arranged on the second substrate SUB2.

The first photoelectric converter110aand the first divided AD converter190ain the first area AR1 transmit and receive the charge of the floating diffusion FD of the first photoelectric converter110athrough the signal transmitter91composed of the via91b. In addition, the second photoelectric converter110band the first divided AD converter190ain the second area AR2 transmit and receive the charge of the floating diffusion FD of the second photoelectric converter110bthrough the signal transmitter91composed of the via91b. The third area AR3 and the fourth area AR4 transmit and receive the drain signals of the differential pair in the AD converter190through the signal transmitter91composed of the Cu—Cu connection91a.

(Summary of Ninth to 11th Examples of Area Pixel100)

FIG.47is a diagram summarizing the features of the area pixels100according to the ninth to 11th examples described above. In the ninth and 11th examples, the back side is the light irradiation surface, while in the 10th example, the front side is the light irradiation surface. In the ninth example, both the first photoelectric converter110and the second photoelectric converter110have semiconductor layers made of silicon, whereas in the 10th and 11th examples, the first photoelectric converter110and the second photoelectric converter110have semiconductor layers made of a material other than silicon. In the ninth to 11th examples, the first photoelectric converter110and the second photoelectric converter110are arranged on the first substrate SUB1. In the ninth and 10th examples, the AD converter190is arranged in the second area AR2. In the 11th example, the first divided AD converter190ais arranged in the first area AR1, and the second divided AD converter190bis arranged in the second area AR2.

In the ninth example, the first area AR1 and the second area AR2 transmit and receive the charge of the floating diffusion FD of the first photoelectric converter110and the second photoelectric converter110through the signal transmitter91composed of the Cu—Cu connection91a. In the 10th example, the first area AR1 and the second area AR2 transmit and receive the charge of the floating diffusion FD of the first photoelectric converter110and the second photoelectric converter110through the signal transmitter91composed of the vias91b. In the 11th example, the third area AR3 and the fourth area AR4 transmit and receive drain signals of a differential pair in the AD converter190through the signal transmitter91composed of the Cu—Cu connection91a.

As described above, the imaging device1having the area pixels100according to the ninth to 11th examples includes, for each area pixel100, the plurality of pixels having the plurality of photoelectric converters110, the floating diffusion FD, and the AD converter190. The AD converter190is provided for each area pixel100including two or more pixels among a plurality of pixels, and converts signals corresponding to the charge photoelectrically converted by the two or more pixels into digital signals. The floating diffusion FD outputs the charge photoelectrically converted by the photoelectric converter110in the pixel.

The plurality of photoelectric converters110, the plurality of AD converters190, and the plurality of floating diffusions FD in the plurality of pixels are arranged in a plurality of stacked areas. The signal transmitter91transmits and receives signals between a plurality of areas. Among the plurality of areas, the area in which the plurality of photoelectric converters110are arranged is provided separately from the area in which the AD converters190are arranged. An area in which the plurality of photoelectric converters110are arranged and an area in which the AD converters190are arranged in the area pixel100transmit and receive the charge of the plurality of floating diffusions FD via the same signal transmitter91.

(Twelfth Example of Area Pixel100)

FIG.48is a circuit diagram of the area pixel100according to the twelfth example,FIG.49is a cross-sectional view of the area pixel100according to the twelfth example,FIG.50Ais a plan view taken along line A-A inFIG.49, andFIG.50Bis a plan view taken along line B-B inFIG.49.FIGS.48,49,50A and50Bshow an example where the area pixel100has four pixels. The imaging device1having the area pixels100according to the twelfth example employs the global shutter method, and the storage unit113is connected to the photoelectric converter110in each pixel. In this specification and part of the drawings, the photoelectric converter110and the storage unit113are described as separate units, but the storage unit113can also be considered as a component forms a part of the photoelectric converter110as illustrated inFIG.48. The following description focuses on the differences from the area pixel100according to the first example.

As illustrated inFIG.48, the photoelectric converter110has a storage unit113and a transistor503in addition to the configuration of the photoelectric converter110illustrated inFIG.11. The pixel signals photoelectrically converted by the photodiodes501are stored in the corresponding storage units113at the same timing by turning on the transistors503of all the pixels at the same time. The charges corresponding to the pixel signals stored in the storage unit113are transferred to the AD converter190via the floating diffusion FD and are converted to time codes by sequentially turning on the corresponding transistors504according to the readout timing of each pixel.

The area pixel100according to the twelfth example includes a first area AR1 and a second area AR2. A plurality of photoelectric converters110and a plurality of storage units113made of silicon are arranged in the first area AR1. An AD converter190made of silicon is arranged in the second area AR2. The first area AR1 is arranged on the first substrate SUB1, and the second area AR2 is arranged on the second substrate SUB2. The first substrate SUB1 and the second substrate SUB2 transmit and receive the charge of the floating diffusion FD of the photoelectric converter110through the signal transmitter91composed of Cu—Cu connections91a, for example.

As illustrated inFIG.48, the floating diffusions FD of the plurality of photoelectric converters110within the area pixel100are connected to the same signal transmitter91. Therefore, the first area AR1 and the second area AR2 transmit and receive the charge of the floating diffusions FD of the plurality of photoelectric converters110in each area pixel100through one signal transmitter91for each area pixel100in the first area AR1. More specifically, the signal transmitter91sequentially transmits the charge of the four floating diffusions FD of the four pixels in the area pixel100to the AD converter190.

As illustrated inFIG.49, the imaging device1includes the first substrate SUB1 and the second substrate SUB2 which are stacked. The first substrate SUB1 and the second substrate SUB2 transmit and receive the charge of the floating diffusion FD through the signal transmitter91composed of the Cu—Cu connection91a. A wiring layer71, a photoelectric converter110, a storage unit113, a color filter72, and an on-chip lens73are stacked on the first substrate SUB1. An element isolation layer74is arranged between the pixels. A wiring layer75, an AD converter190, and a protective layer76are stacked on the second substrate SUB2.

In the example ofFIG.49, the photoelectric converter110and the storage unit113are arranged in the same layer on the first substrate SUB1, and the wiring layer71is arranged in the lower layer. The AD converter190is arranged below the wiring layer75in the second substrate SUB2. The wiring layer71of the first substrate SUB1 and the wiring layer75of the second substrate SUB2 are arranged to face each other, and various signals are transmitted and received by the signal transmitter91composed of the Cu—Cu connection91a.

FIGS.50A and50Bshow a planar layout of one area pixel100. As illustrated inFIG.50A, four photoelectric converters110and four storage units113in four pixels in the area pixel100are arranged on the first substrate SUB1. The four photoelectric converters110are arranged along the four corners in the area of the area pixel100, and the four storage units113are arranged in the portion sandwiched between the four photoelectric converters110.

As illustrated inFIG.50B, the AD converters190are arranged over the entire area of the area pixels100on the second substrate SUB2.

As described above, in the area pixel100according to the twelfth example, since the photoelectric converter110and the storage unit113are arranged on the first substrate SUB1, and the AD converter190is arranged on the second substrate SUB2, the area of the photoelectric converter110can be increased, and the aperture ratio and resolution can be increased. In addition, since the first substrate SUB1 transmits the charge of the floating diffusions FD of the plurality of photoelectric converters110to the second substrate SUB2 through the same signal transmitter91, the number of signal transmitters91on the first substrate SUB1 and the second substrate SUB2 can be reduced, and the number of wirings on the first substrate SUB1 and the second substrate SUB2 can be reduced accordingly. Further, since the Cu—Cu connection91ais used as the signal transmitter91, signal propagation loss can be suppressed.

(Thirteenth Example of Area Pixel100)

FIG.51is a circuit diagram of the area pixel100according to the 13th example,FIG.52is a cross-sectional view of the area pixel100according to the 13th example,FIG.53Ais a plan view taken along line A-A ofFIG.52,FIG.53Bis a plan view taken along line B-B ofFIG.52, andFIG.53Cis a plan view taken along line C-C ofFIG.52. The following description focuses on the differences from the area pixel100according to the twelfth example.

The imaging device1having the area pixels100according to the 13th example includes, as illustrated inFIG.52, a first area AR1, a second area AR2 and a third area AR3 which are stacked. A photoelectric converter110and a storage unit113are arranged in the first area AR1. In the second area AR2 and the third area AR3, the AD converter190is divided into two parts, a first divided AD converter190aand a second divided AD converter190b.

The first divided AD converter190ahas transistors12,13,157and158in the AD converter190. The second divided AD converter190bhas the rest of the AD converter190, specifically transistors151,152, and511to517. The first divided AD converter190aand the second divided AD converter190btransmit and receive both drain signals of the transistors12and157, which are a differential pair.

The first area AR1 and the second area AR2 sequentially transmit and receive the charge of the four floating diffusions FD in the four pixels through the signal transmitter91composed of the vias91b. The second area AR2 and the third area AR3 transmit and receive drain signals of a differential pair in the AD converter190through the signal transmitter91composed of Cu—Cu connections91a. The first area AR1 is arranged on the first substrate SUB1, the second area AR2 is arranged on the second substrate SUB2, and the third area AR3 is arranged on the third substrate SUB3.

The planar layout within the first area AR1 illustrated inFIG.53Ais the same as inFIG.50A. A first divided AD converter190ais arranged over the entire second area AR2 illustrated inFIG.53B. A via for transmitting and receiving the charge of the floating diffusion FD between the first area AR1 and the second area AR2 is arranged in a substantially central portion of the second area AR2. A second divided AD converter190bis arranged over the entire third area AR3 illustrated inFIG.53C.

As described above, in the area pixel100according to the 13th example, since the AD converter190is divided and arranged in the second area AR2 and the third area AR3, the arrangement area of the AD converter190can be increased.

Signals are transmitted and received between the second area AR2 and the third area AR3 through the Cu—Cu connection91a, so signals can be transmitted and received at a high speed. The first area AR1 is arranged on the first substrate SUB1 and the second area AR2 is arranged on the second substrate SUB2, and signals are transmitted and received through the signal transmitter91composed of the via91b. In this way, the arrangement area of the photoelectric converter110and the AD converter190(190a,190b) can be increased.

(Fourteenth Example of Area Pixel100)

FIG.54is a circuit diagram of the area pixel100according to the 14th example,FIG.55is a cross-sectional view of the area pixel100according to the 14th example,FIG.56Ais a plan view taken along line A-A inFIG.55, andFIG.56Bis a plan view taken along the line B-B ofFIG.55, andFIG.56Cis a plan view taken along the line C-C ofFIG.55. The following description focuses on the differences from the area pixel100according to the 14th example.

The imaging device1having the area pixels100according to the 14th example includes a first area AR1, a second area AR2 and a third area AR3 which are stacked, as illustrated inFIG.55. The area pixel100according to the 14th example differs from the 13th example in the method of dividing the AD converters190arranged in the second area AR2 and the third area AR3.

The first divided AD converter190ain the 14th example has transistors12,13,151,152,157,158,511, and512in the AD converter190. The second divided AD converter190bhas transistors513to517in the AD converter190. That is, the AD converter190is divided at the source node of the transistor512that outputs the comparison result signal between the pixel signal and the reference signal. The first divided AD converter190aand the second divided AD converter190btransmit and receive the comparison result output signal through the signal transmitter91composed of the Cu—Cu connection91a. The transistor512that outputs a comparison result output signal forms a level converter.

The sectional view illustrated inFIG.55and the plan views illustrated inFIGS.56A and56Bof the area pixel100according to the 14th example are the same as those of the area pixel100according to the 13th example.

(Summary of 12th to 14th Examples of Area Pixel100)

FIG.57is a diagram summarizing the features of the area pixels100according to the 12th to 14th examples described above. In the 12th to 14th examples, the back side is the light irradiation surface. The photoelectric converter110and the storage unit113in the area pixel100according to the 12th to 14th examples are arranged in the first area AR1 made of silicon. The AD converter190in the area pixel100according to the twelfth example is arranged in the second area AR2 made of silicon. The AD converters190in the area pixels100according to the 13th and 14th examples are divided and arranged in the second area AR2 and the third area AR3 made of silicon. The first area AR1 and the second area AR2 in the area pixel100according to the 12th to 14th examples transmit and receive the charge of the floating diffusion FD through the signal transmitter91. The signal transmitter91in the area pixel100according to the twelfth example is the Cu—Cu connection91a. The first area AR1 and the second area AR2 in the imaging device1according to the 13th example and the 14th example transmit and receive the charge of the four floating diffusions FD in the four pixels through the signal transmitter91composed of the vias91bfor each area pixel100. The second area AR2 and the third area AR3 in the imaging device1according to the 13th example transmit the drain signals of the differential pair in the AD converter190through the signal transmitter91composed of the Cu—Cu connection91afor each area pixel100. The second area AR2 and the third area AR3 in the imaging device1according to the 14th example transmit and receive the comparison result output signal in the AD converter190through the signal transmitter91composed of the Cu—Cu connection91afor each area pixel100.

(Fifteenth Example of Area Pixel100)

FIG.58is a circuit diagram of the area pixel100according to the 15th example,FIG.59is a cross-sectional view of the area pixel100according to the 15th example,FIG.60Ais a plan view taken along line A-A inFIG.59, andFIG.60Bis a plan view taken along line B-B ofFIG.59, andFIG.60Cis a plan view taken along line C-C ofFIG.59.FIGS.58,59,60A,60B and60Cshow examples where the area pixel100has four pixels.

The imaging device1having the area pixels100according to the 15th example includes a first area AR1 and a second area AR2 that are stacked as illustrated inFIGS.58and59. The first area AR1 is the first substrate SUB1 made of silicon, and the second area AR2 is the second substrate SUB2 made of silicon. A photoelectric converter110, a storage unit113, and a wiring layer are stacked in the first area AR1. A wiring layer and an AD converter190are stacked in the second area AR2.

As illustrated inFIGS.60A and60B, the photoelectric converter110and the storage unit113are arranged over the entire areas of different layers in the first area AR1. As a result, the arrangement area of the photoelectric converter110and the storage unit113can be increased as compared with the 12th to 14th examples. In addition, the AD converter190is arranged over the entire layer different from the wiring layer of the second area AR2.

The first area AR1 and the second area AR2 transmit and receive the charge of the floating diffusion FD through the signal transmitter91composed of the Cu—Cu connection91a.

As described above, in the area pixel100according to the 15th example, since the storage unit113is arranged in a layer different from that of the photoelectric converter110, the area of the storage unit113and the photoelectric converter110can be increased, the aperture ratio of the photoelectric converter110can be increased, and the storage capacity of the storage unit113can be increased. Further, miniaturization is also possible.

(Sixteenth Example of Area Pixel100)

FIG.61is a circuit diagram of the area pixel100according to the 16th example,FIG.62is a cross-sectional view of the area pixel100according to the 16th example,FIG.63Ais a plan view taken along the line A-A ofFIG.62,FIG.63Bis a plan view taken along the line B-B ofFIG.62,FIG.63Cis a plan view taken along the line C-C ofFIG.62, andFIG.63Dis a plan view taken along the line D-D ofFIG.62. The following description focuses on the differences from the area pixels100according to the 13th example and the 15th example.

The imaging device1having the area pixels100according to the 16th example includes a first area AR1, a second area AR2 and a third area AR3 which are stacked as illustrated inFIGS.61and62. A photoelectric converter110and a storage unit113are stacked in the first area AR1. The AD converter190is divided into a first divided AD converter190aand a second divided AD converter190bas inFIG.51. The first divided AD converter190ais arranged in the second area AR2, and the second divided AD converter190bis arranged in the third area AR3.

The area pixel100according to the 16th example is the same as the area pixel100according to the 13th example, except that the layer configuration of the first area AR1 is different.

(Seventeenth Example of Area Pixel100)

FIG.64is a circuit diagram of the area pixel100according to the 17th example,FIG.65is a cross-sectional view of the area pixel100according to the 17th example,FIG.66Ais a plan view taken along line A-A ofFIG.65,FIG.66Bis a plan view taken along line B-B ofFIG.65,FIG.66Cis a plan view taken along line C-C ofFIG.65, andFIG.66Dis a plan view taken along line D-D ofFIG.65. The following description focuses on the differences from the area pixels100according to the 14th example and the 16th example.

The imaging device1having the area pixels100according to the 17th example includes a first area AR1, a second area AR2 and a third area AR3 which are stacked as illustrated inFIGS.64and65. A photoelectric converter110and a storage unit113are stacked in the first area AR1. The AD converter190is divided into a first divided AD converter190aand a second divided AD converter190bas inFIG.56. The first divided AD converter190ais arranged in the second area AR2, and the second divided AD converter190bis arranged in the third area AR3.

The area pixel100according to the 17th example is the same as the area pixel100according to the 14th example, except that the layer configuration of the first area AR1 is different.

(Summary of 15th to 17th Examples of Area Pixel100)

FIG.67is a diagram summarizing the features of the area pixels100according to the 15th to 17th examples described above. In the 15th to 17th examples, the back side is the light irradiation surface. The photoelectric converter110and the storage unit113in the area pixel100according to the 15th to 17th examples are stacked and arranged in the first area AR1 made of silicon. The AD converter190in the area pixel100according to the 15th example is arranged in the second area AR2 made of silicon. The AD converters190in the area pixels100according to the 16th and 17th examples are divided and arranged in the second area AR2 and the third area AR3 made of silicon. The first area AR1 and the second area AR2 in the area pixel100according to the 15th to 17th examples transmit and receive the charge of the floating diffusion FD through the signal transmitter91. The signal transmitter91in the area pixel100according to the 15th example is the Cu—Cu connection91a. The first area AR1 and the second area AR2 in the area pixel100according to the 16th and 17th examples transmit and receive the charge of the floating diffusion FD through the signal transmitter91composed of the via91b. The second area AR2 and the third area AR3 in the area pixel100according to the 16th example transmit and receive the drain signals of the differential pair in the AD converter190through the signal transmitter91composed of the Cu—Cu connection91a. The second area AR2 and the third area AR3 in the area pixel100according to the 17th example transmit and receive the comparison result output signal in the AD converter190through the signal transmitter91composed of the Cu—Cu connection91a.

(Eighteenth Example of Area Pixel100)

FIG.68is a circuit diagram of the area pixel100according to the 18th example,FIG.69is a cross-sectional view of the area pixel100according to the 18th example,FIG.70Ais a plan view taken along line A-A inFIG.69, andFIG.70Bis a plan view taken along line B-B inFIG.69.FIGS.68,69,70A and70Bshow an example where the area pixel100has four pixels.

The area pixel100according to the 18th example has a photoelectric converter110made of a material other than silicon. Materials other than silicon are, for example, organic semiconductor materials. Thus, the photoelectric converter110of the 18th example has semiconductor layers containing materials other than silicon. More specifically, the photoelectric converter110of the 18th example has a structure in which an upper electrode layer11a, a photoelectric conversion layer11b, a charge storage layer11c, an insulating layer11d, and a lower electrode layer11eare stacked. The charge storage layer11cfunctions as the storage unit113.

The imaging device1having the area pixels100according to the 18th example includes a first area AR1 and a second area AR2 that are stacked as illustrated inFIGS.68and69. The first area AR1 and the second area AR2 are arranged in different layers on the same substrate. In the first area AR1, the photoelectric converter110and the storage unit113are arranged in different layers. Each layer in which the photoelectric converter110and the storage unit113are arranged is a semiconductor layer made of a material other than silicon. More specifically, in the first area AR1, a photoelectric conversion layer11band a charge storage layer11cmade of a material other than silicon, and an insulating layer11dare stacked.

In the second area AR2, the wiring layer75and the AD converter190are arranged in different layers. The layer in which the AD converter190is arranged is a semiconductor layer made of silicon.

FIG.70Ais a plan view near the boundary between the photoelectric converter110and the storage unit113. As described above, the photoelectric converter110and the storage unit113are arranged in different layers, but part of at least one of the photoelectric converter110and the storage unit113may be arranged across two layers.

The first area AR1 and the second area AR2 transmit and receive the charge of the floating diffusion FD through the signal transmitter91composed of the via91b.

In the imaging device1having the area pixels100according to the 18th example, a semiconductor layer made of silicon is arranged on a support substrate in a pre-process to sequentially form an AD converter190and a wiring layer. In a post-process, a non-silicon semiconductor layer is formed to sequentially form the storage unit113and the photoelectric converter110.

In this way, the area pixel100according to the 18th example has a structure in which the AD converter190made of silicon and the storage unit113and the photoelectric converter110made of a material other than silicon are stacked on the same substrate. Since the photoelectric converter110and the AD converter190transmit and receive the charge of the floating diffusion FD through the signal transmitter91including the vias91b, the number of vias can be reduced, and the area of the photoelectric converter110and the AD converter190can be increased accordingly.

(Nineteenth Example of Area Pixel100)

FIG.71is a circuit diagram of the area pixel100according to the 19th example,FIG.72is a cross-sectional view of the area pixel100according to the 19th example,FIG.73Ais a plan view taken along line A-A inFIG.72,FIG.73Bis a plan view taken along line B-B inFIG.72, andFIG.73Cis a plan view taken along the line C-C ofFIG.72. The following description focuses on the differences from the area pixels100according to the 13th example and the 15th example.

The imaging device1having the area pixels100according to the 19th example includes a first area AR1, a second area AR2 and a third area AR3 which are stacked as illustrated inFIGS.71and72. A photoelectric converter110and a storage unit113made of a material other than silicon are stacked in the first area AR1. The AD converter190is divided into a first divided AD converter190aand a second divided AD converter190b. The first divided AD converter190aand the photoelectric converter110transmit and receive the charge of the floating diffusion FD. The first divided AD converter190ahas differential pairs of transistors12,157and transistors13,158in the AD converter190. The second divided AD converter190bhas the rest of the AD converter190, specifically transistors151,152, and511to517. The first divided AD converter190ais arranged in the second area AR2, and the second divided AD converter190bis arranged in the third area AR3. The first area AR1 and the second area AR2 are stacked on the first substrate SUB1. The third area AR3 is arranged on the second substrate SUB2.

The first area AR1 and the second area AR2 transmit and receive the charge of the floating diffusion FD through the signal transmitter91composed of the via91b. The second area AR2 and the third area AR3 transmit and receive drain signals of the differential pair of transistors12and157via the signal transmitter91composed of a Cu—Cu connection91a.

As illustrated inFIGS.73B and73C, the first divided AD converter190aand the second divided AD converter190bare respectively arranged in the entire areas of the respective areas, so that the arrangement area of the AD converter190can be increased.

(20th Example of Area Pixel100)

FIG.74is a circuit diagram of the area pixel100according to the 20th example,FIG.75is a cross-sectional view of the area pixel100according to the 20th example,FIG.76Ais a plan view taken along line A-A inFIG.75,FIG.76Bis a plan view taken along line B-B inFIG.75, andFIG.76Cis a plan view taken along line C-C ofFIG.75. The following description focuses on the differences from the area pixel100according to the 19th example.

The area pixel100according to the 20th example differs from the 19th example in the division location in the AD converter190. The AD converter190of the 20th example is divided into a first divided AD converter190aand a second divided AD converter190bsimilar to those inFIG.64. Others are the same as the 19th example, and the cross-sectional view ofFIG.75and the plan views ofFIGS.76A to76Care the same as the cross-sectional view ofFIG.72and the plan views ofFIGS.73A to73C.

(Summary of 18th to 20th Examples of Area Pixel100)

FIG.77is a diagram summarizing the features of the area pixels100according to the 18th to 20th examples described above. In the 18th example, the front side is the light irradiation surface, while in the 19th and 20th examples, the back side is the light irradiation surface. The photoelectric converter110and the storage unit113in the area pixel100according to the 18th to 20th examples are stacked and arranged in the first area AR1 made of a material other than silicon. The AD converter190in the area pixel100according to the 18th example is arranged in the second area AR2 made of silicon. The AD converters190in the area pixels100according to the 19th and 20th examples are divided and arranged in the second area AR2 and the third area AR3 made of silicon. The first area AR1 and the second area AR2 in the area pixel100according to the 18th to 20th examples transmit and receive the charge of the floating diffusion FD through the signal transmitter91composed of the via91b. The second area AR2 and the third area AR3 in the area pixel100according to the 19th example transmit and receive the drain signals of the differential pair in the AD converter190through the signal transmitter91composed of the Cu—Cu connection91a. The second area AR2 and the third area AR3 in the area pixel100according to the 20th example transmit and receive the comparison result output signal in the AD converter190through the signal transmitter91composed of the Cu—Cu connection91a.

(21st Example of Area Pixel100)

FIG.78is a circuit diagram of the area pixel100according to the 21st example,FIG.79is a cross-sectional view of the area pixel100according to the 21st example,FIG.80Ais a plan view in the direction of line A-A inFIG.79,FIG.80Bis a plan view taken along line B-B ofFIG.79, andFIG.80Cis a plan view taken along line C-C ofFIG.79.FIGS.78,79,80A,80B and80Cshow examples where the area pixel100has four pixels.

The area pixel100according to the 21st example has a photoelectric converter110(first photoelectric converter110a) made of a material other than silicon and a photoelectric converter110(second photoelectric converter110b) made of silicon. Materials other than silicon include, for example, organic semiconductor materials. The first photoelectric converter110aperforms, for example, green photoelectric conversion, and the second photoelectric converter110bperforms, for example, red and blue photoelectric conversion.

As illustrated inFIG.78, the floating diffusion FD of the first photoelectric converter110aand the floating diffusion FD of the second photoelectric converter110bare connected to the gate of the transistor12and the source of the transistor13in the AD converter190.

The imaging device1having the area pixels100according to the 21st example includes a first area AR1, a second area AR2 and a third area AR3 which are stacked, as illustrated inFIGS.78and79. The first area AR1 and the second area AR2 are stacked on the first substrate SUB1. The third area AR3 is arranged on the second substrate SUB2. In the first area AR1, the first photoelectric converter110aand the storage unit113are stacked using a material other than silicon. The second photoelectric converter110bmade of silicon is arranged in the second area AR2. The AD converter190made of silicon is arranged in the third area AR3.

The first area AR1 and the third area AR3 transmit and receive the charge of the floating diffusion FD of the first photoelectric converter110athrough the signal transmitter91composed of the via91band the Cu—Cu connection91a. The second area AR2 and the third area AR3 transmit and receive the charge of the floating diffusion FD of the second photoelectric converter110bthrough the signal transmitter91composed of the Cu—Cu connection91a.

As illustrated inFIGS.80A and80B, the first photoelectric converter110aand the second photoelectric converter110bare arranged over the entire areas of the respective areas, so that the aperture ratio can be increased.

As described above, the area pixel100according to the 21st example has two types of photoelectric converters110(110aand110b), and the charge of the floating diffusion FD of each photoelectric converter110is transferred to the AD converter190through the via91band the Cu—Cu connection91a. Since the photoelectric converters110are arranged over the entire areas of separate layers, a sufficient area for arranging the photoelectric converters110can be secured.

(22nd Example of Area Pixel100)

FIG.81is a circuit diagram of the area pixel100according to the 22nd example,FIG.82is a cross-sectional view of the area pixel100according to the 22nd example,FIG.83Ais a plan view taken along the line A-A ofFIG.82,FIG.83Bis a plan view taken along the line B-B ofFIG.82, andFIG.83Cis a plan view taken along the line C-C ofFIG.82. The following description focuses on the differences from the area pixels100according to the 13th example and the 15th example.

The imaging device1having the area pixels100according to the 22nd example includes a first area AR1, a second area AR2 and a third area AR3 which are stacked as illustrated inFIGS.81and82. The area pixel100according to the 22nd example has a first photoelectric converter110amade of a material other than silicon and a second photoelectric converter110bmade of silicon, as in the 21st example. A storage unit is not connected to the second photoelectric converter110baccording to the 21st example, but a second storage unit113bis connected to the second photoelectric converter110baccording to the 22nd example. Here, the storage unit113connected to the first photoelectric converter110ais referred to as a first storage unit113a, and the storage unit113connected to the second photoelectric converter110bis referred to as a second storage unit113b.

The first photoelectric converter110aand the first storage unit113amade of a material other than silicon are stacked in the first area AR1. In the second area AR2, the second photoelectric converter110band the second storage unit113bmade of silicon are arranged in the same layer. An AD converter190made of silicon is arranged in the third area AR3. The first area AR1 and the second area AR2 are stacked on the first substrate SUB1, and the third area AR3 is arranged on the second substrate SUB2.

The first area AR1 and the third area AR3 transmit and receive the charge of the floating diffusion FD of the first photoelectric converter110athrough the signal transmitter91composed of the via91band the Cu—Cu connection91a. The second area AR2 and the third area AR3 transmit and receive the charge of the floating diffusion FD of the second photoelectric converter110bthrough the signal transmitter91composed of the Cu—Cu connection91a.

Thus, in the area pixel100according to the 22nd example, since the first storage unit113ais connected to the first photoelectric converter110a, and the second storage unit113bis connected to the second photoelectric converter110b, imaging can be performed according to the global shutter method.

(23rd Example of Area Pixel100)

FIG.84is a circuit diagram of the area pixel100according to the 23rd example,FIG.85is a cross-sectional view of the area pixel100according to the 23rd example,FIG.86Ais a plan view taken along line A-A ofFIG.85,FIG.86Bis a plan view taken along line B-B ofFIG.85, andFIG.86Cis a plan view taken along line C-C ofFIG.85. The following description focuses on the differences from the area pixel100according to the 23rd example.

The area pixel100according to the 23rd example differs from the 22nd example in that, as illustrated inFIG.85, the second photoelectric converter110band the second storage unit113bare stacked in the second area AR2. The plan view ofFIG.86Bis a plan view near the boundary between the second photoelectric converter110band the second storage unit113b, and the second photoelectric converter110band the second storage unit113bare arranged over the entire areas of the respective areas. The configuration of the 23rd example other than the second area AR2 is the same as that of the 22nd example.

(Summary of 21st to 23rd Examples of Area Pixel100)

FIG.87is a diagram summarizing the features of the area pixels100according to the 21st to 23rd examples described above. In the 21st to 23rd examples, the back side is the light irradiation surface. In the 21st to 23rd examples, the first photoelectric converter110aand the first storage unit113aare arranged in the first area AR1 made of a material other than silicon. The second photoelectric converter110band the second storage unit113bin the 22nd and 23rd examples are arranged in the second area AR2 made of silicon. The AD converter190in the 21st to 23rd examples is arranged in the third area AR3 made of silicon. In the 21st to 23rd examples, the first area AR1 and the third area AR3 transmit and receive the charge of the floating diffusion FD of the first photoelectric converter110athrough the signal transmitter91composed of the via91band the Cu—Cu connection91a. In the 21st to 23rd examples, the second area AR2 and the third area AR3 transmit and receive the charge of the floating diffusion FD of the second photoelectric converter110bthrough the signal transmitter91composed of the Cu—Cu connection91a.

(24th Example of Area Pixel100)

FIG.88is a circuit diagram of the area pixel100according to the 24th example,FIG.89is a cross-sectional view of the area pixel100according to the 24th example,FIG.90Ais a plan view taken along line A-A inFIG.89,FIG.90Bis a plan view taken along line B-B ofFIG.89, andFIG.90Cis a plan view taken along line C-C ofFIG.89.FIGS.88,89,90A,90B and90Cshow examples where the area pixel100has four pixels.

The area pixel100according to the 24th example, as in the 23rd example, includes the first photoelectric converter110amade of a material other than silicon, the second photoelectric converter110bmade of silicon, the first storage unit113amade of a material other than silicon and connected to the first photoelectric converter110a, and the second storage unit113bmade of silicon and connected to the second photoelectric converter110b.

Unlike the 23rd example, the area pixel100according to the 24th example has a first AD converter190athat receives the charge of the floating diffusion FD of the first photoelectric converter110aand a second AD converter190bthat receives the charge of the floating diffusion FD of the second photoelectric converter110b. Thus, the area pixel100according to the 24th example has more AD converters190than the 23rd example.

As illustrated inFIGS.88and89, the first photoelectric converter110aand the first storage unit113amade of a material other than silicon are stacked in the first area AR1. In the second area AR2, the second photoelectric converter110band the second storage unit113bmade of silicon are arranged in the same layer. In the third area AR3, the first AD converter190aand the second AD converter190bmade of silicon are arranged in the same layer. The first area AR1 and the second area AR2 are stacked on the first substrate SUB1, and the third area AR3 is arranged on the second substrate SUB2. The first area AR1 and the third area AR3 transmit and receive the charge of the floating diffusion FD of the first photoelectric converter110athrough the signal transmitter91composed of the via91band the Cu—Cu connection91a. The second area AR2 and the third area AR3 transmit and receive the charge of the floating diffusion FD of the second photoelectric converter110bthrough the signal transmitter91composed of the Cu—Cu connection91a.

As illustrated inFIG.90A, the first photoelectric converter110aand the first storage unit113aare arranged over the entire areas of the respective areas. As illustrated inFIG.90B, the second photoelectric converter110band the second storage unit113bare arranged in the same layer, so that the arrangement area of the second photoelectric converter110bis smaller than that of the first photoelectric converter110a, and the arrangement area of the second storage unit113bis smaller than that of the second storage unit113b. As illustrated inFIG.90C, the first AD converter190ais arranged to surround the second AD converter190b.

Since the area pixel100according to the 24th example includes the first AD converter190afor the first photoelectric converter110aand the second AD converter190bfor the second photoelectric converter110b, the first AD converter190aand the second AD converter190bcan simultaneously perform AD conversion, thereby shortening the AD conversion processing time.

(25th Example of Area Pixel100)

FIG.91is a circuit diagram of the area pixel100according to the 25th example,FIG.92is a cross-sectional view of the area pixel100according to the 25th example,FIG.93Ais a plan view taken along the line A-A inFIG.92, andFIG.93Bis a plan view taken along line B-B ofFIG.92, andFIG.93Cis a plan view taken along line C-C ofFIG.92. The following description focuses on the differences from the 24th example.

The area pixel100according to the 25th example differs from the 24th example in the configuration of the second area AR2. In the second area AR2 of the 25th example, as illustrated inFIG.92, a second photoelectric converter110band a second storage unit113bare stacked. Therefore, as illustrated inFIG.93B, the second photoelectric converter110band the second storage unit113bare arranged over the entire areas of the respective areas.

(Summary of 24th and 25th Examples of Area Pixel100)

FIG.94is a diagram summarizing the features of the area pixels100according to the 24th and 25th examples described above. In the 24th and 25th examples, the back side is the light irradiation surface. In the 24th and 25th examples, the first photoelectric converter110aand the first storage unit113aare made of a material other than silicon, and the second photoelectric converter110band the second storage unit113bare made of silicon. In the 24th and 25th examples, the first photoelectric converter110aand the first storage unit113aare arranged in the first area AR1, and the second photoelectric converter110band the second storage unit113bare arranged in the second area AR2. The first photoelectric converter110aand the first storage unit113aare arranged in the same layer in the first area AR1 in the 24th example, and stacked in the first area AR1 in the 25th example. In the 24th and 25th examples, the first area AR1 and the second area AR2 transmit and receive the charge of the floating diffusion FD of the first photoelectric converter110athrough the signal transmitter91composed of the via91band the Cu—Cu connection91a. The second area AR2 and the third area AR3 transmit and receive the charge of the floating diffusion FD of the second photoelectric converter110bthrough the signal transmitter91composed of the Cu—Cu connection91a.

(23rd Example of Area Pixel100)

FIG.95is a circuit diagram of the area pixel100according to the 23rd example,FIG.96is a cross-sectional view of the area pixel100according to the 23rd example,FIG.97Ais a plan view taken along line A-A inFIG.96, andFIG.97Bis a plan view taken along line B-B ofFIG.96, andFIG.97Cis a plan view taken along line C-C ofFIG.96.FIGS.95,96,97A and97Bshow examples where the area pixel100has four pixels.

As illustrated inFIG.95, the area pixel100according to the 23rd example has a first photoelectric converter110aand a second photoelectric converter110bfor each pixel. Both the first photoelectric converter110aand the second photoelectric converter110bhave a semiconductor layer made of silicon. A first storage unit113ais connected to the first photoelectric converter110a, and a second storage unit113bis connected to the second photoelectric converter110b. Therefore, the imaging device1having the area pixels100according to the 23rd example performs imaging according to the global shutter method.

The imaging device1having the area pixels100according to the 23rd example includes a first area AR1 and a second area AR2. In the first area AR1, the first photoelectric converter110aand the first storage unit113aare stacked, and the second photoelectric converter110band the second storage unit113bare stacked.FIG.96illustrates an example in which the second photoelectric converter110bis arranged in the layer below the first photoelectric converter110a, the second storage unit113bis arranged in the layer below the second photoelectric converter110b, and the first storage unit113ais arranged across the layer of the second photoelectric converter110band the layer of the second storage unit113b. The order and place of arrangement of the first photoelectric converter110a, the first storage unit113a, the second photoelectric converter110b, and the second storage unit113bare arbitrary. The first area AR1 is arranged on the first substrate SUB1.

An AD converter190is arranged in the second area AR2. The second area AR2 is arranged on the second substrate SUB2.

The first substrate SUB1 and the second substrate SUB2 transmit and receives the charge of the floating diffusion FD of the first photoelectric converter110aand the charge of the floating diffusion FD of the second photoelectric converter110bthrough the signal transmitter91composed of the Cu—Cu connection91a.

(27th Example of Area Pixel100)

FIG.98is a circuit diagram of the area pixel100according to the 27th example,FIG.99is a cross-sectional view of the area pixel100according to the 27th example,FIG.100Ais a plan view taken along line A-A ofFIG.99,FIG.100Bis a plan view taken along line B-B ofFIG.99, andFIG.100Cis a plan view taken along line C-C ofFIG.99. The following description focuses on the differences from the 23rd example.

The area pixel100according to the 27th example is common to the 23rd example in that each pixel has the first photoelectric converter110aand the second photoelectric converter110b. However, the first photoelectric converter110aand the second photoelectric converter110baccording to the 27th example each have a semiconductor layer made of a material other than silicon, and are made of, for example, an organic semiconductor material.

As illustrated inFIG.99, in the first area AR1, the first photoelectric converter110aand the first storage unit113aare stacked and the second photoelectric converter110band the second storage unit113bare stacked. InFIG.99, the first photoelectric converter110a, the first storage unit113a, the second photoelectric converter110b, and the second storage unit113bare stacked in this order from top to bottom, but the stacking order is arbitrary.

An AD converter190made of silicon is arranged in the second area AR2. The first area AR1 and the second area AR2 are stacked on the same substrate. The first area AR1 and the second area AR2 transmit and receive the charge of the floating diffusion FD of the first photoelectric converter110athrough the signal transmitter91composed of the via91b, and transmit and receive the charge of the floating diffusion FD of the second photoelectric converter110bthrough the signal transmitter91made of another via91b.

As illustrated inFIGS.100A,100B, and100C, the first photoelectric converter110a, the first storage unit113a, the second photoelectric converter110b, the second storage unit113b, and the AD converter190are arranged over the entire areas of the respective areas. Thus, even if each pixel has the first photoelectric converter110aand the second photoelectric converter110b, there is no possibility that the aperture ratio will decrease.

(28th Example of Area Pixel100)

FIG.101is a circuit diagram of the area pixel100according to the 28th example,FIG.102is a cross-sectional view of the area pixel100according to the 28th example,FIG.103Ais a plan view taken along line A-A ofFIG.102,FIG.103Bis a plan view taken along line B-B ofFIG.102,FIG.103Cis a plan view taken along line C-C ofFIG.102, andFIG.103Dis a plan view taken along line D-D ofFIG.102. The following description focuses on the differences from the 27th example.

The area pixel100according to the 28th example includes a first photoelectric converter110aand a second photoelectric converter110bhaving non-silicon semiconductor layers, as in the 27th example. The area pixel100according to the 28th example is different from the 27th example in that the AD converter190is divided into a first divided AD converter190aand a second divided AD converter190b, and arranged separately in the third area AR3 and the fourth area AR4.

The first photoelectric converter110aand the first storage unit113aare stacked in the first area AR1. The second photoelectric converter110band the second storage unit113bare stacked in the second area AR2. The first area AR1, the second area AR2 and the third area AR3 are stacked on the first substrate SUB1. The fourth area AR4 is arranged on the second substrate SUB2.

The first photoelectric converter110aand the first divided AD converter190ain the first area AR1 transmit and receive the charge of the floating diffusion FD of the first photoelectric converter110athrough the signal transmitter91composed of the via91b. In addition, the second photoelectric converter110band the first divided AD converter190ain the second area AR2 transmit and receive the charge of the floating diffusion FD of the second photoelectric converter110bthrough the signal transmitter91composed of the via91b. The third area AR3 and the fourth area AR4 transmit and receive the drain signals of the differential pair in the AD converter190through the signal transmitter91composed of the Cu—Cu connection91a.

In the area pixel100according to the 28th example, since the AD converter190is divided into two and arranged in different layers, the arrangement area of the AD converter190can be increased more than in the 27th example.

(Summary of 23rd to 28th Examples of Area Pixel100)

FIG.104is a diagram summarizing the features of the area pixels100according to the 26th to 28th examples described above. In the 26th and 28th examples, the back side is the light irradiation surface, while in the 27th example, the front side is the light irradiation surface. In the 26th example, both the first photoelectric converter110aand the second photoelectric converter110bhave semiconductor layers made of silicon. In the 27th and 28th examples, both the first photoelectric converter110aand the second photoelectric converter110bhave semiconductor layers made of a material other than silicon. In the 26th to 28th examples, the first photoelectric converter110a, the first storage unit113a, the second photoelectric converter110b, and the first storage unit113aare arranged on the first substrate SUB1. In the 26th and 27th examples, the AD converter190is arranged in the second area AR2. In the 28th example, the first divided AD converter190ais arranged in the first area AR1, and the second divided AD converter190bis arranged in the second area AR2.

In the 26th example, the first area AR1 and the second area AR2 transmit and receive the charge of the floating diffusions FD of the first photoelectric converter110aand the second photoelectric converter110bthrough the signal transmitter91composed of the Cu—Cu connection91a. In the 27th example, the first area AR1 and the second area AR2 transmit and receive the charge of the floating diffusion FD of the first photoelectric converter110aand the second photoelectric converter110bthrough the signal transmitter91composed of the vias91b. In the 28th example, the third area AR3 and the fourth area AR4 transmit and receive drain signals of a differential pair in the AD converter190through the signal transmitter91composed of the Cu—Cu connection91a.

(Other Modifications of Area Pixel100)

In the area pixel100according to the 26th to 28th examples described above, the first photoelectric converter110aand the second photoelectric converter110bshare one AD converter190. However, as illustrated in the 24th or 25th example, a first AD converter190acorresponding to the first photoelectric converter110aand a second AD converter190bcorresponding to the second photoelectric converter110bmay be provided.

In the 11th and 28th examples, the first area AR1 and the second area AR2 transmit and receive the drain signals of the differential pair in the AD converter190. However, the first area AR1 and the second area may transmit and receive the comparison result output signal in the AD converter190.

In the third, sixth, ninth, 14th, and 17th examples described above, as illustrated in the upper-half circuit diagram ofFIG.105, the AD converter190may be divided into two, a first divided AD converter190aprovided up to the transistor512that outputs the comparison result signal in the AD converter190and a second divided AD converter190bon the rear end side of the transistor512, and the two divided AD converters are arranged in different areas. The boundary between the first divided AD converter190aand the second divided AD converter190bneed not be the drain node of the transistor512. For example, as illustrated in the lower-half circuit diagram ofFIG.105, the boundary may be the drain node of the transistor152in the AD converter190.

<Application to Mobile Object>

The technology of the present disclosure (the present technology) can be applied to various products. For example, the technique according to the present disclosure may be realized as a device mounted on any type of moving body such as an automobile, an electric automobile, a hybrid electric automobile, a motorcycle, a bicycle, a personal mobility device, an airplane, a drone, a ship, a robot, or the like.

FIG.106is a block diagram illustrating a schematic configuration example of a vehicle control system, which is an example of a moving body control system to which the technique according to the present disclosure can be applied.

The vehicle control system12000includes a plurality of electronic control units connected to each other via a communication network12001. In the example illustrated inFIG.106, the vehicle control system12000includes a drive system control unit12010, a body system control unit12020, a vehicle exterior information detection unit12030, a vehicle interior information detection unit12040, and an integrated control unit12050. As a functional configuration of the integrated control unit12050, a microcomputer12051, an audio/image output unit12052, and an in-vehicle network I/F (interface)12053are illustrated.

The drive system control unit12010controls an operation of an apparatus related to a drive system of a vehicle according to various programs. For example, the drive system control unit12010functions as a driving force generator for generating a driving force of a vehicle such as an internal combustion engine or a driving motor, a driving force transmission mechanism for transmitting a driving force to wheels, a steering mechanism for adjusting a turning angle of a vehicle, and a control apparatus such as a braking apparatus that generates a braking force of a vehicle.

The body system control unit12020controls operations of various devices mounted in the vehicle body according to various programs. For example, the body system control unit12020functions as a control device of a keyless entry system, a smart key system, a power window device, or various lamps such as a headlamp, a back lamp, a brake lamp, a turn signal, and a fog lamp. In this case, radio waves transmitted from a portable device that substitutes for a key or signals of various switches may be input to the body system control unit12020. The body system control unit12020receives inputs of the radio waves or signals and controls a door lock device, a power window device, and a lamp of the vehicle.

The vehicle exterior information detection unit12030detects information on the outside of the vehicle having the vehicle control system12000mounted thereon. For example, an imaging unit12031is connected to the vehicle exterior information detection unit12030. The vehicle exterior information detection unit12030causes the imaging unit12031to capture an image of the outside of the vehicle and receives the captured image. The vehicle exterior information detection unit12030may perform object detection processing or distance detection processing for peoples, cars, obstacles, signs, and letters on the road on the basis of the received image.

The imaging unit12031is an optical sensor that receives light and outputs an electrical signal according to the amount of the received light. The imaging unit12031can also output the electrical signal as an image or distance measurement information. In addition, the light received by the imaging unit12031may be visible light or invisible light such as infrared light.

The vehicle interior information detection unit12040detects information on the inside of the vehicle. For example, a driver state detection unit12041that detects a driver's state is connected to the vehicle interior information detection unit12040. The driver state detection unit12041includes, for example, a camera that captures an image of a driver, and the vehicle interior information detection unit12040may calculate a degree of fatigue or concentration of the driver or may determine whether or not the driver is dozing on the basis of detection information input from the driver state detection unit12041.

The microcomputer12051can calculate control target values for the driving force generation device, the steering mechanism, or the braking device based on the information on the inside and outside of the vehicle acquired by the vehicle exterior information detection unit12030or the vehicle interior information detection unit12040, and output control commands to the drive system control unit12010. For example, the microcomputer12051can perform cooperative control for the purpose of implementing functions of an advanced driver assistance system (ADAS) including vehicle collision avoidance, impact mitigation, following traveling based on an inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, and vehicle lane deviation warning.

Further, the microcomputer12051can perform cooperative control for the purpose of automated driving or the like in which autonomous travel is performed without depending on operations of the driver, by controlling the driving force generator, the steering mechanism, or the braking device and the like on the basis of information about the surroundings of the vehicle, the information being acquired by the vehicle exterior information detection unit12030or the vehicle interior information detection unit12040.

In addition, the microcomputer12051can output a control command to the body system control unit12030based on the information outside the vehicle acquired by the vehicle exterior information detection unit12030. For example, the microcomputer12051can perform coordinated control for the purpose of antiglare such as switching a high beam to a low beam by controlling a headlamp according to a position of a preceding vehicle or an oncoming vehicle detected by the vehicle exterior information detection unit12030.

The audio/image output unit12052transmits an output signal of at least one of sound and an image to an output device capable of visually or audibly notifying a passenger or the outside of the vehicle of information. In the example ofFIG.106, an audio speaker12061, a display unit12062, and an instrument panel12063are illustrated as examples of the output device. The display unit12062may include at least one of an on-board display and a head-up display, for example.

FIG.107is a diagram illustrating an example of an installation position of the imaging unit12031.

The imaging units12101,12102,12103,12104, and12105are provided at, for example, positions of a front nose, side mirrors, a rear bumper, a back door, an upper portion of a vehicle internal front windshield, and the like of the vehicle12100. The imaging unit12101provided on a front nose and the imaging unit12105provided in an upper portion of the vehicle internal front windshield mainly acquire images in front of the vehicle12100. The imaging units12102and12103provided in the side mirrors mainly acquire images on the lateral sides of the vehicle12100. The imaging unit12104included in the rear bumper or the back door mainly acquires an image of an area behind the vehicle12100. The imaging unit12105included in the upper portion of the windshield inside the vehicle is mainly used for detection of a preceding vehicle, a pedestrian, an obstacle, a traffic signal, a traffic sign, a lane, or the like.

FIG.107illustrates an example of imaging ranges of the imaging units12101to12104. An imaging range12111indicates an imaging range of the imaging unit12101provided at the front nose, imaging ranges12112and12113respectively indicate the imaging ranges of the imaging units12102and12103provided at the side-view mirrors, and an imaging range12114indicates the imaging range of the imaging unit12104provided at the rear bumper or the back door. For example, by superimposing image data captured by the imaging units12101to12104, it is possible to obtain a bird's-eye view image viewed from the upper side of the vehicle12100.

For example, the microcomputer12051can extract, particularly, a closest three-dimensional object on a path through which the vehicle12100is traveling, which is a three-dimensional object traveling at a predetermined speed (for example, 0 km/h or higher) in the substantially same direction as the vehicle12100, as a preceding vehicle by acquiring a distance to each three-dimensional object in the imaging ranges12111to12114and temporal change in the distance (a relative speed with respect to the vehicle12100) on the basis of distance information obtained from the imaging units12101to12104. The microcomputer12051can also set an inter-vehicle distance to the preceding vehicle to be secured in advance and perform automatic brake control (including following stop control) and automatic acceleration control (including following start control). Thus, it is possible to perform cooperative control for the purpose of, for example, automated driving in which the vehicle travels in an automated manner without requiring the driver to perform operations.

For example, the microcomputer12051can classify and extract three-dimensional data regarding three-dimensional objects into two-wheeled vehicles, normal vehicles, large vehicles, pedestrians, and other three-dimensional objects such as electric poles based on distance information obtained from the imaging units12101to12104and can use the three-dimensional data to perform automated avoidance of obstacles. For example, the microcomputer12051differentiates surrounding obstacles of the vehicle12100into obstacles which can be viewed by the driver of the vehicle12100and obstacles which are difficult to view. Then, the microcomputer12051determines a collision risk indicating the degree of risk of collision with each obstacle, and when the collision risk is equal to or higher than a set value and there is a possibility of collision, an alarm is output to the driver through the audio speaker12061or the display unit12062, forced deceleration or avoidance steering is performed through the drive system control unit12010, and thus it is possible to perform driving support for collision avoidance.

At least one of the imaging units12101to12104may be an infrared camera that detects infrared rays. For example, the microcomputer12051can recognize a pedestrian by determining whether there is a pedestrian in the captured image of the imaging units12101to12104. Such pedestrian recognition is performed by, for example, a procedure in which feature points in the captured images of the imaging units12101to12104as infrared cameras are extracted and a procedure in which pattern matching processing is performed on a series of feature points indicating an outline of an object to determine whether or not the object is a pedestrian. When the microcomputer12051determines that there is a pedestrian in the captured images of the imaging units12101to12104and the pedestrian is recognized, the audio/image output unit12052controls the display unit12062so that a square contour line for emphasis is superimposed and displayed with the recognized pedestrian. In addition, the audio/image output unit12052may control the display unit12062so that an icon indicating a pedestrian or the like is displayed at a desired position.

An example of the vehicle control system to which the technology according to the present disclosure can be applied has been described above. The technique according to the present disclosure may be applied to the imaging unit12031and the like among the above-described configurations. Specifically, the imaging device1of the present disclosure can be applied to the imaging unit12031. By applying the technique according to the present disclosure to the imaging unit12031, a clearer captured image can be obtained, which makes it possible to reduce driver fatigue.

The present technique can also take on the following configurations.

(1) An imaging device comprising: a plurality of pixels each having a photoelectric converter;an analog-to-digital converter provided for each area pixel composed of two or more of the pixels in the plurality of pixels to convert a signal corresponding to a charge photoelectrically converted by the two or more pixels into a digital signal:a floating diffusion that outputs the charge photoelectrically converted by the photoelectric converter in the pixelsa plurality of stacked areas in which the plurality of photoelectric converters, the plurality of the analog-to-digital converters, and the plurality of the floating diffusions in the plurality of pixels are arranged; anda signal transmitter that transmits and receives signals between the plurality of areas, whereinamong the plurality of areas, an area in which the plurality of photoelectric converters are arranged is provided separately from an area in which the analog-to-digital converter is arranged, andthe area in which the plurality of photoelectric converters in the area pixel are arranged and the area in which the analog-to-digital converter is arranged transmit and receive a charge of the plurality of floating diffusions via the same signal transmitter.

(2) The imaging device according to (1), wherein the photoelectric converter has a silicon semiconductor layer or a non-silicon semiconductor layer.

(3) The imaging device according to (2), wherein the non-silicon semiconductor layer is a semiconductor layer containing an organic semiconductor material.

(4) The imaging device according to any one of (1) to (3), further comprising: a storage unit provided for each of the pixels to store the charge photoelectrically converted by the photoelectric converter;a first transfer transistor provided for each of the pixels to perform switching control of whether or not to store the charge photoelectrically converted by the photoelectric converter in the storage unit; anda second transfer transistor provided for each of the pixels to perform switching control of whether or not to transfer the charge stored in the storage unit to the floating diffusion.

(5) The imaging device according to (4), wherein the storage unit is arranged in the area in which the photoelectric converter is arranged among the plurality of areas.

(6) The imaging device according to (5), wherein the storage unit is arranged in the same layer as the photoelectric converter, or arranged in a layer stacked on a layer in which the photoelectric converter is arranged.

(7) The imaging device according to (4), wherein the storage unit is arranged in an area different from the area in which the analog-to-digital converter is arranged among the plurality of areas.

(8) The imaging device according to (7), wherein the different area has a wiring layer electrically connected to the floating diffusion, and the storage unit is arranged in the same layer as the wiring layer.

(9) The imaging device according to any one of (1) to (8), wherein the analog-to-digital converter includes:a comparator that compares an analog signal corresponding to the charge with a reference signal;a comparison output processor that outputs a comparison result of the comparator;a waveform shaping unit that shapes a waveform of an output signal of the comparison output processor; andthe comparator, the comparison output processor, and the waveform shaping unit are arranged in the same area among the plurality of areas.

(10) The imaging device according to any one of (1) to (8), wherein the analog-to-digital converter includes:a comparator that compares an analog signal corresponding to the charge with a reference signal;a comparison output processor that outputs a comparison result of the comparator; anda waveform shaping unit that shapes a waveform of an output signal of the comparison output processor, andthe comparator, the comparison output processor, and the waveform shaping unit are arranged in mutually different areas among the plurality of areas.

(11) The imaging device according to any one of (1) to (8), wherein the analog-to-digital converter includes:a comparator that compares an analog signal corresponding to the charge with a reference signal;a comparison output processor that outputs a comparison result of the comparator; anda waveform shaping unit that shapes a waveform of an output signal of the comparison output processor, andthe comparator, the comparison output processor, and the waveform shaping unit are arranged in mutually different areas among the plurality of areas.

(12) The imaging device according to any one of (1) to (11), further comprising: a first area in which the photoelectric converter is arranged; anda second area in which at least a portion of the analog-to-digital converter is arranged, whereinthe signal transmitter transmits and receives the charge of the floating diffusion between the first area and the second area.

(13) The imaging device according to any one of (1) to (11), wherein the photoelectric converter includes:a first photoelectric converter; anda second photoelectric converter,the floating diffusion includes:a first floating diffusion that stores a charge photoelectrically converted by the first photoelectric converter; anda second floating diffusion that stores a charge photoelectrically converted by the second photoelectric converter,the plurality of areas includes:a first area in which the first photoelectric converter is arranged;a second area in which the second photoelectric converter is arranged; anda third area in which at least a portion of the analog-to-digital converter is arranged, andthe signal transmitter includes:a first signal transmitter that transmits and receives the charge of the first floating diffusion between the first area and the third area; anda second signal transmitter that transmits and receives the charge of the second floating diffusion between the second area and the third area.

(14) The imaging device according to (13), wherein one of the first photoelectric converter and the second photoelectric converter has a silicon semiconductor layer, and the other of the first photoelectric converter and the second photoelectric converter has a non-silicon semiconductor layer.

(15) The imaging device according to (13) or (14), further comprising: a first storage unit provided for each of the pixels to store the charge photoelectrically converted by the first photoelectric converter; anda second storage unit provided for each of the pixels to store the charge photoelectrically converted by the second photoelectric converter, whereinthe first storage unit is arranged in the first area,the second storage unit is arranged in the second area,the first floating diffusion stores a charge corresponding to the charge stored in the first storage unit, andthe second floating diffusion stores a charge corresponding to the charge stored in the second storage unit.

(16) The imaging device according to (13) or (14), further comprising: a storage unit provided for each of the pixels to store the charge photoelectrically converted by either the first photoelectric converter or the second photoelectric converter, whereinthe storage unit is arranged in the second area,either one of the first floating diffusion and the second floating diffusion stores the charge corresponding to the charge stored in the storage unit, and the other of the first floating diffusion and the second floating diffusion stores the charge photoelectrically converted by the first photoelectric converter or the second photoelectric converter without storing the charge in the storage unit.

(17) The imaging device according to (13), wherein both the first photoelectric converter and the second photoelectric converter have a silicon semiconductor layer or have a non-silicon semiconductor layer.

(18) The imaging device according to (17), further comprising: a first storage unit provided for each of the pixels to store the charge photoelectrically converted by the first photoelectric converter; anda second storage unit provided for each of the pixels to store the charge photoelectrically converted by the second photoelectric converter.

(19) The imaging device according to (18), wherein at least one of the first storage unit and the second storage unit is provided across the first area and the second area.

(20) An electronic apparatus comprising: an imaging device that outputs a photoelectrically converted digital signal for each pixel: anda signal processor that performs signal processing on the digital signal, wherein the imaging device includes:a plurality of pixels each having a photoelectric converter;an analog-to-digital converter provided for each area pixel composed of two or more of the pixels in the plurality of pixels to convert a signal corresponding to a charge photoelectrically converted by the two or more pixels into a digital signal;a floating diffusion that outputs the charge photoelectrically converted by the photoelectric converter in the pixel;a plurality of stacked areas in which the plurality of pixels, the plurality of the analog-to-digital converters, and the plurality of the floating diffusions are arranged; anda signal transmitter that transmits and receives signals between the plurality of areas, whereinamong the plurality of areas, an area in which the plurality of photoelectric converters are arranged is provided separately from an area in which the analog-to-digital converter is arranged, andthe signal transmitter transmits and receives a charge of the floating diffusion between the area in which the photoelectric converter is arranged and the area in which the analog-to-digital converter is arranged.

Aspects of the present disclosure are not limited to the afore-mentioned individual embodiments and include various modifications that those skilled in the art can achieve, and effects of the present disclosure are also not limited to the details described above. In other words, various additions, modifications, and partial deletion can be made without departing from the conceptual idea and the gist of the present disclosure that can be derived from the details defined in the claims and the equivalents thereof.

REFERENCE SIGNS LIST