Method of forming a fine pattern of a semiconductor device using a double patterning technique

A method of forming a fine pattern of a semiconductor device uses a double patterning technique. A first mask pattern is formed on a first hard mask layer disposed on a substrate. A conformal buffer layer is formed over the first mask pattern. A second mask pattern is formed such that segments of the buffer layer are interposed between the first and second mask patterns, and each topographical feature of the second mask pattern is disposed between two adjacent ones of each respective pair of topographical features of the first mask pattern. A first hard mask pattern is formed by etching the first hard mask layer using the first mask pattern, the second mask pattern, and/or the buffer layer as an etch mask. A trench is formed by etching the substrate using the first hard mask pattern as an etch mask. An isolation layer, of a material that is different from that of first hard mask pattern, is formed in the trench.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to the manufacturing of semiconductor devices. More particularly, the present invention relates to a method of forming a fine pattern of a semiconductor device using a double patterning technique, e.g., using two generally coplanar hard mask patterns.

2. Description of the Related Art

A highly integrated semiconductor device referred to as a nanoscale device is formed of patterns whose features have widths and pitches (critical dimensions) below the resolution limits of photolithography. One such pattern of a highly integrated semiconductor device is an isolation layer which is used to define active regions of the device. The isolation layer is formed by producing a trench/recess in a substrate and filling the trench/recess with an insulating material. However, it is difficult to fill the trench/recess adequately with insulating material when sections of the trench/recess are narrow and the pitch of the sections of the trench/recess is fine, i.e., it is difficult to form an isolation layer whose critical dimensions are on the order of nanometers.

SUMMARY OF THE INVENTION

An object of the present invention it to provide a method of forming a pattern of a semiconductor device, whose topographic features are narrower and have a pitch smaller than that which can be formed using photolithography alone, i.e., an object of the present invention is to provide a method of forming a pattern not limited by the resolution of photolithography processes.

Another object of the present invention is to provide a method of forming a trench isolation layer for defining an active region, and by which the layer has excellent gap-filling characteristics.

Still another object of the present invention is to provide a relatively simple method of forming a fine pattern of a semiconductor device.

Still another object of the present invention is to provide a method of forming a trench isolation layer for defining an active region, which ensures that the isolation layer is not damaged when an etch mask used in the method is removed.

According to an aspect of the present invention, there is provided a method of forming a pattern of a semiconductor device in which a double patterning technique is used. A first hard mask layer is formed on a substrate, and a first mask pattern is formed on the first hard mask layer. Then, a buffer layer is formed over both sidewalls of each topographical feature of the first mask pattern. Next, a second mask pattern is formed adjacent to the first mask pattern with segments of the buffer layer interposed therebetween. In this respect, each topographical feature of the second mask pattern is interposed between adjacent ones of each respective pair of the topographical features of the first mask pattern. A first hard mask pattern which exposed portions of the substrate is then formed by etching the first hard mask layer using an etch mask selected from the group comprising the first mask pattern, the second mask pattern, and the buffer layer. A trench is formed in the substrate by etching the exposed portions of the substrate using the first hard mask pattern as an etch mask, and an isolation layer is formed in the trench. The isolation layer formed of an insulating material that is different in composition from that of the first hard mask pattern.

The first mask pattern and the second mask pattern may be formed of the same material as that of the first hard mask layer.

The first hard mask pattern may be formed by etching the first hard mask layer using the first mask pattern and the second mask patterns together as an etch mask. The first hard mask pattern may be formed by etching the first hard mask layer using the buffer layer as an etch mask.

The method may also include removing selected portions of the first mask pattern and the second mask pattern to form a trimmed first mask pattern and a trimmed second mask pattern, respectively, before the first hard mask pattern is formed. In this case, the first hard mask pattern is formed by etching the first hard mask layer using the trimmed first mask pattern and the trimmed second mask pattern together as an etch mask.

The method may include removing selected portions of the buffer layer to form a trimmed buffer layer, after the second mask pattern is formed but before the first hard mask pattern is formed. In this case, the first hard mask patterns is formed by etching the first hard mask layer using the trimmed buffer layer as an etch mask.

The method may also include forming a second hard mask layer before the first mask pattern is formed. In this case, the second hard mask layer is formed of a material different from that of the first hard mask layer. Also, recesses may be formed in a top surface of the second hard mask layer between the topographical features of the first mask patterns. In this case, the buffer layer may be formed in such a manner that a conformal segment of the buffer layer covers both opposite sidewalls of two adjacent topographical features of the first mask pattern and a lower surface of the second hard mask layer which delimits the bottom of the recess between the opposite sidewalls of the two adjacent topographical features of the first mask patterns.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

The present invention will now be described more fully with reference to the accompanying drawings. Like reference numerals are used to designate like elements throughout the drawings. Also, in the drawings, the thicknesses and widths of layers and regions are exaggerated for clarity. Furthermore, various features and regions in the drawings are illustrated schematically. Accordingly, the present invention is not limited by the relative sizes of or distances between features/regions shown in the attached drawings. Finally, it is to be noted that the term “features” as used throughout the specification refers to topographic features which are repeated periodically in a layer of the device, i.e., which together constitute a particular pattern.

Referring toFIG. 1, a plurality of active regions110of a semiconductor device are defined by an isolation layer120. Each of the active regions110is in the form of an island having a short axis X1and a long axis Y1which intersect each other at a right angle. The short axis X1and the long axis Y1may respectively extend in directions that are parallel or oblique to the x-axis and the y-axis ofFIG. 1. A process of forming the active regions110on a substrate200will be explained with reference toFIGS. 2A through 2Q.

Referring toFIG. 2A, a pad oxide layer202is formed on the substrate200. A first hard mask layer210is formed on the pad oxide layer202. The substrate200may be a general semiconductor substrate such as a silicon substrate.

The first hard mask layer210is used as an etch mask when the substrate200is etched in order to define the active regions110. If the substrate200is a silicon substrate, the first hard mask layer210may be a polysilicon layer. The first hard mask layer210may be formed to a thickness of about 300 Å to about 1000 Å.

Referring toFIG. 2B, a second hard mask layer220and a first mask layer230are sequentially formed on the first hard mask layer210. If the first hard mask layer210is a polysilicon layer, the second hard mask layer220may be a silicon oxide layer. For example, the second hard mask layer220may be a medium temperature oxide (MTO) layer having a thickness of about 300 Å to about 600 Å. The first mask layer230may be a polysilicon layer.

Referring toFIG. 2C, a third hard mask layer232, an anti-reflection layer234, and a photoresist pattern236, which are necessary to pattern the first mask layer230using photolithography, are sequentially formed on the first mask layer230. The third hard mask layer232may be an amorphous carbon layer (ACL). The anti-reflection layer234may be a layer of SiON. The photoresist pattern236and more particularly, the features which constitute the photoresist pattern236, may have a pitch greater than the pitch of the fine pattern that is to be formed on the substrate200.

Referring toFIG. 2D, an anti-reflection layer pattern234A and a third hard mask pattern232A are formed by sequentially etching the anti-reflection layer234and the third hard mask layer232using the photoresist pattern236as an etch mask. Next, a first mask pattern230A is formed by etching the first mask layer230using the third hard mask pattern232A as an etch mask. Also, at this time, recessed portions220R of the second hard mask layer220may be formed by etching parts of the second hard mask layer220, which are exposed between the features of the first mask pattern230A, to a depth “d”.

Each of the features of the first mask pattern230A may have a linear shape that extends in a direction parallel to the long axis Y1of each of the active regions110(FIG. 1). The features of the first mask pattern230A may be repeatedly formed on the substrate200at a first pitch P. The width PW1of each of the features of the first mask pattern230A in the x-axis direction may be equal to the width AW of each of the active regions110(FIG. 1) in the x-axis direction.

By the time the third hard mask pattern232A is formed, part of the photoresist pattern236may be consumed.

Referring toFIG. 2E, top surfaces of the features of the first mask pattern230A are exposed by removing the third hard mask pattern232A, the anti-reflection layer pattern234A, and the photoresist pattern236. In this respect, the third hard mask pattern232A, the anti-reflection layer pattern234A, and the photoresist pattern236may be removed by ashing and stripping.

Referring toFIG. 2F, a conformal buffer layer240is formed over the exposed surfaces of the first mask pattern230A and the recessed portions220R of the second hard mask layer220. The buffer layer240may be an oxide layer or a nitride layer formed by atomic layer deposition (ALD). In any case, as a result, recesses242are formed at the top surface of the buffer layer240in such a manner that each of the recesses242is disposed between each respective pair of adjacent features of the first mask pattern230A. Due to the buffer layer240, the features of a second mask pattern250A (seeFIG. 2H) that are to be formed in the recesses242can have the same widths and heights as the features of the first mask pattern230A that are to be used as an etch mask in a subsequent process.

In this respect, the buffer layer240can uniformly cover top surfaces and sidewalls of the first mask pattern230A and the recessed portions220R of the second hard mask layer220. For example, the thickness of the buffer layer240may be the same as the depth “d” (FIG. 2D). Also, the width RW of each of the recesses242in the x-axis direction may be equal to the width AW of each of the active regions110(FIG. 1) in the x-axis direction.

Furthermore, the buffer layer240is preferably formed of a material having etching characteristics similar to those of the material from which the second hard mask layer220is formed. That is, the buffer layer240may be formed of the same material as that used to form the second hard mask layer220or the buffer layer240may be formed of a material that is different from but has similar etching characteristics as the material from which the second hard mask layer220is formed. For example, each of the second hard mask layer220and the buffer layer240may be an oxide layer.

Referring toFIG. 2G, a second mask layer250is formed over the buffer layer240on the substrate200to such a thickness that the recesses242are filled by the second mask layer250. The second mask layer250may be formed of the same material as that of the first mask layer230. For example, the second mask layer250may be a polysilicon layer.

Referring toFIG. 2H, a second mask pattern250A is formed in the recesses242by removing an upper portion of the second mask layer250. More specifically, the second mask layer250is etched. For example, the second mask layer250is wet etched. As a result, those portions of the buffer layer140covering the first mask pattern230A are exposed between respective features of the second mask pattern250A formed by removing an upper portion of the second mask layer250. The etch rate of the second mask layer250may be adjusted so that the upper surface of the resulting second mask pattern250A is level with the upper surface of the first mask pattern230A.

Each of the features of second mask pattern250A may have a linear form that extends longitudinally in the same direction in which the features of the first mask pattern230A extend longitudinally, e.g., parallel to the long axis Y1of each of the active regions110(FIG. 1). The width PW2of each of the features of the second mask pattern250A in the x-axis direction may be equal to the width AW of each of the active regions110in the x-axis direction. Also, the features of the second mask pattern250A may be substantially horizontally aligned with the features of the first mask pattern230A. That is, the upper surfaces of the features of the second mask pattern250A may lie within the same horizontal plane as the upper surfaces of the features of the first mask pattern230A, and the lower surfaces of the features of the second mask pattern250A may lie within the same horizontal plane as the lower surfaces of the features of the first mask pattern230A.

Referring toFIG. 2I, those portions of the buffer layer240which cover the first mask pattern230A are removed to expose top surfaces of the features of the first mask pattern230A For example, the buffer layer240is dry etched. If the buffer layer240is an oxide layer, the etching gas employed in the dry etching process may be CxFy (wherein each of x and y is an integer of 1 to 10), or a mixture of CxFy, O2, and Ar. More specifically, the CxFy may be C4F6or C4F8. Alternatively, the buffer layer240is wet etched. For example, if the buffer layer240is an oxide layer, an etchant containing fluorine (F), such as diluted HF (DHF), NH4F, or a combination thereof, may be used in order to selectively wet etch the buffer layer240. Again, an appropriate selection of materials ensures that the buffer layer240has a significantly greater etch rate than the etch rates of the first mask pattern230A and the second mask pattern250A.

In any case, both the top surfaces of the features of the first mask pattern230A and the top surfaces of the features of the second mask pattern250A are exposed on the substrate200as a result.

Note, though, the process described with reference toFIG. 2Imay be omitted in certain circumstances.

Referring toFIG. 2J, a fourth hard mask layer262, an anti-reflection layer264, and a photoresist pattern266are sequentially formed to cover the first mask pattern230A, the second mask pattern250A, and the remnants of the buffer layer240. For example, the fourth hard mask layer262may be an ACL. The anti-reflection layer264may be formed of SiON.

The photoresist pattern266defines a plurality of openings266H. The width HW1of each of the openings266H in the x-axis direction may be equal to or greater than the width PW1of each of the features of the first mask pattern230A in the x-axis direction. Alternatively, the width HW1of each of the openings266H in the x-axis direction is equal to or greater than the width PW2of each of the features of the second mask pattern250A in the x-axis direction.

Referring toFIG. 2K, the anti-reflection layer264and the fourth hard mask layer262are sequentially etched, using the photoresist pattern266as an etch mask, to form an anti-reflection layer pattern264A and a fourth hard mask pattern262A. At this time, part of the photoresist pattern266may be consumed. In any case, and as a result, openings262H are formed between the features of the fourth hard mask pattern262A. The openings262H expose respective features of the first mask pattern230A and the second mask pattern250A. The second hard mask layer220may also be exposed through the plurality of openings262H. Furthermore, if the openings262H are each wide enough, the remnants of the buffer layer240disposed around the exposed features of the first mask pattern230A and the second mask pattern250A can be exposed through the openings262H.

Next, those features of the first mask pattern230A and the second mask pattern250A which are exposed through the openings262H are etched away using the fourth hard mask pattern262A and the remnants of the buffer layer240as an etch mask. As a result, a trimmed first mask pattern230B and a trimmed second mask pattern250B of features having shapes in the form of islands similar to those of the active regions110(FIG. 1) are obtained.

Referring toFIG. 2L, top surfaces of the trimmed first mask pattern230B and the trimmed second mask pattern250B are exposed by removing the fourth hard mask pattern262A, the anti-reflection layer pattern264A, and the photoresist pattern266. In this respect, the fourth hard mask pattern262A, the anti-reflection layer pattern264A, and the photoresist pattern266may be removed by ashing and stripping.

Referring toFIG. 2M, the remnants of the buffer layer240are anisotropically etched using the trimmed first mask pattern230B and the trimmed second mask pattern250B as an etch mask. As a result, the second hard mask layer220is exposed between the features of the trimmed first mask pattern230B and the features of the trimmed second mask pattern250B. The exposed portion of the second hard mask layer220is anisotropically dry etched to form a second hard mask pattern220A which exposes the first hard mask layer210.

If each of the second hard mask layer220and the buffer layer240is an oxide layer, the remnants of the buffer layer240and the second hard mask layer220can be dry etched at a rate higher than the trimmed first mask pattern230B and the trimmed second mask pattern250B which are formed of polysilicon, using a gas mixture of CxFy (wherein x is an integer of 1 to 6 and y is an integer of 3 to 8) and O2. For example, C3F8, C4F6, C4F8, or C5F8mixed with O2in a volumetric ratio of 1:1 may be used as an etching gas. If necessary, Ar may be added to the etching gas. Also, the dry etching may be performed in a plasma atmosphere that is obtained by exciting the etching gas.

If each of the second hard mask layer220and the buffer layer240is a nitride layer, the remnants of the buffer layer240and the second hard mask layer220can be dry etched at a higher rate than the trimmed first mask pattern230B and the trimmed second mask pattern250B which are formed of polysilicon, using CHxFy (wherein x and y are each an integer of 1 to 3 and x+y=4). For example, the etching gas can be CH2F2, CH3F, or a mixture thereof. If necessary, O2may be added to the etching gas. Also, the dry etching may be performed in a plasma atmosphere that is obtained by exciting the etching gas.

Referring toFIG. 2N, a first hard mask pattern210A is formed by anisotropically etching the first hard mask layer210using the second hard mask pattern220A and the remnants of the buffer layer240as an etch mask. If the trimmed first mask pattern230B and the trimmed second mask pattern250B are of the same material as the first hard mask layer210, the trimmed first mask pattern230B and the trimmed second mask pattern250B covering the second hard mask pattern220A and the remnants of the buffer layer240may be removed while the first hard mask layer210is etched.

A gas mixture of HBr and O2may be used as an etching gas to dry etch the first hard mask layer210. As an example, the HBr and O2may be supplied at flow rates having a ratio of about 10:1 to about 30:1. Also, He may be added to the etching gas. More specifically, HBr may be supplied at a flow rate of about 100 sccm to about 300 sccm, O2may be supplied at a flow rate of about 5 sccm to about 30 sccm, and He may be supplied at a flow rate of about 50 sccm to about 200 sccm. If necessary, Cl2or a gas mixture of HBr and Cl2may be used instead of HBr. Also, the first hard mask layer210may be etched in a plasma atmosphere that is obtained by exciting the etching gas.

Referring toFIG. 2O, a trench280is formed in the substrate200by etching the pad oxide layer202to expose those portions of a top surface of the substrate200spanning the features of the first hard mask pattern210A, and etching the exposed portions of the substrate200using the first hard mask pattern210A as an etch mask. When viewed from above, the trench280may have the same shape as that of the isolation layer120(FIG. 1). That is, the shape of the opening in the upper surface of the substrate200formed by the trench280may be the same as the shape of the isolation layer120in horizontal section.

Furthermore, the trench280may have first sections280A and second sections280B spaced laterally from the first sections, and in which the width of each first section280A is smaller than the width of each second section280B. Referring back toFIG. 1, there are two different distances AD1and AD2between adjacent active regions110ofFIG. 1in the x-axis direction, wherein the distance AD1is smaller than the distance AD2. The width TW1of a first section280A of the trench280(the dimension of the first section280A in the x-axis direction) corresponds to the distance AD1, and the width TW2of a second section280B of the trench (the dimension of the second section280B in the x-axis direction) corresponds to the distance AD2.

Also, as shown inFIG. 2O, the second hard mask pattern220A and remnants of the buffer layer240are not left on the first hard mask pattern210A of the resultant structure in which the trench280is formed. However, if necessary, the second hard mask pattern220A or both the second hard mask pattern220A and the remnants of the buffer layer240may be left on the first hard mask pattern210A after the trench280is formed.

Referring toFIG. 2P, an isolation layer282is formed in the trench280by depositing an insulating material in the trench280and on the first hard mask pattern210A and planarizing the resultant structure using chemical mechanical polishing (CMP) until the first hard mask pattern210A is exposed. The isolation layer282may correspond to the isolation layer120shown inFIG. 1.

The isolation layer282may be formed of an insulating material that is different from that from which the first hard mask pattern210A is formed. For example, the isolation layer282may include an oxide layer liner contacting the substrate200in the trench280, and gap-filling insulating material including a nitride filling the remainder of the trench280. Alternatively, the isolation layer282may include an oxide layer liner contacting the substrate200in the trench280, a nitride layer liner formed on the oxide layer liner, and gap-filling insulating material of hydropolysilizane-based inorganic SOG, such as TOSZ, formed on the nitride layer liner and filling the remainder of the trench280.

Referring toFIG. 2Q, the first hard mask pattern210A is removed from the resultant structure including the isolation layer282. The active regions110are defined by the isolation layer282.

According to the method shown in and described with respect toFIGS. 2A through 2Q, the isolation layer282and the first hard mask pattern210A that are used as an etch mask to form the trench280are formed of different materials. Accordingly, the isolation layer282can be prevented from being damaged while the first hard mask pattern210A is removed after the isolation layer282is formed. In particular, when the trench280needs to have very small dimensions suitable for a highly integrated semiconductor device, a nitride must be used as insulating material for filling the trench280because nitrides have good gap-filling properties. To this end, according to an embodiment of the present invention, the gap-filling insulating layer is a nitride layer and the first hard mask pattern210A is a polysilicon layer. Thus, the isolation layer282is not damaged when the hard mask pattern210A is removed.

Moreover, according to an embodiment of the present invention, the first hard mask pattern210A used as an etch stop layer during CMP (the process used to form the isolation layer282) is a polysilicon layer. Accordingly, only polysilicon and oxide layers having a high etch selectivity can be used as etch masks for forming the trench280. Therefore, the double patterning process of forming the isolation layer282for defining the active regions110is made relatively simple.

Another method of forming a pattern of a semiconductor device according to the present invention will now be described with reference toFIGS. 3A through 3H. In this regard, the layers/features, etc. shown in and described with respect to the embodiment ofFIGS. 3A through 3Hand which are similar to those shown in and described with respect to the embodimentFIGS. 2A through 2Qare denoted by the same reference numerals, and the steps/processes used to form such layers/features will not be described in detail. Basically, though, the method of the embodiment ofFIGS. 3A through 3His different from the method of the embodiment ofFIGS. 2A through 2Qin that the remnants of the buffer layer240, instead of the first mask pattern230A and the second mask pattern250A, are used as an etch mask to pattern the first hard mask layer210.

Referring toFIG. 3A, the first mask pattern230A and the second mask pattern250A are formed in such a manner that the remnants of the buffer layer240are disposed between the features of the first mask pattern230A and the features of the second mask pattern250A as described with reference toFIGS. 2A through 2I.

Next, a trimmed mask pattern is formed on the first mask pattern230A, the second mask pattern250A, and the remnants of the buffer layer240in a manner similar to that described with reference toFIG. 2J. However, the remnants of the buffer layer240are divided by the trimmed mask layer into a plurality of features whose surfaces have the same shapes as those of the active regions110(FIG. 1), unlike in the method ofFIG. 2J.

InFIG. 3A, a fourth hard mask layer362, an anti-reflection layer364, and a photoresist pattern366are sequentially formed as the trimmed mask layer to cover the first mask pattern230A, the second mask pattern250A, and the remnants of the buffer layer240. The fourth hard mask layer362, the anti-reflection layer364, and the photoresist pattern366may be similar to the fourth hard mask layer262, the anti-reflection layer264, and the photoresist pattern266described with reference toFIG. 2J, respectively. However, the relative positions of the openings366H defined by the photoresist pattern366are different from those of the openings266H in the photoresist pattern266described with reference toFIG. 2J.

Referring toFIG. 3B, an anti-reflection layer pattern364A and a fourth hard mask pattern362A are formed by sequentially etching the anti-reflection layer364and the fourth hard mask layer362using the photoresist pattern366as an etch mask in a manner similar to that described with reference toFIG. 2K. As a result, a plurality of openings362H are formed between the features of the fourth hard mask pattern362A. Portions of the remnants of the buffer layer240are exposed through the openings362H formed between the features of the fourth hard mask pattern362A. If each of the plurality of openings362H is wide enough, the features of the first mask pattern230A and the second mask pattern250A disposed around the exposed portions of the remnants of the buffer layer240may also be exposed through the openings362H.

Also, part of the photoresist pattern366may be consumed while the fourth hard mask pattern362A is formed.

Next, the exposed portions of the remnants of the buffer layer240are etched using the fourth hard mask pattern362A, the first mask pattern230A, and the second mask pattern250A as an etch mask. As a result, portions of the second hard mask layer220which are exposed. Then the exposed portions of the second hard mask layer220are etched. Accordingly, a trimmed buffer layer240C and a trimmed second hard mask layer220C are formed on the substrate200, and portions of the first hard mask layer210are exposed through the openings362H.

Referring toFIG. 3C, the fourth hard mask pattern362A, the anti-reflection layer pattern364A, and the photoresist pattern366are removed to expose the top surfaces of the trimmed buffer layer240C, the first mask pattern230A, and the second mask pattern250A.

Referring toFIG. 3D, the first mask pattern230A and the second mask pattern250A are etched using the trimmed buffer layer240C as an etch mask.

If the first mask patterns230A and the second mask pattern250A are formed of polysilicon, and the trimmed buffer layer240C and the trimmed second hard mask layer220C are oxide layers, the first mask pattern230A and the second mask pattern250A may be removed by wet etching or dry etching. An etchant containing NH4OH may be used to wet etch the first mask pattern230A and the second mask pattern250A. For example, NH4OH, H2O2, and H2O mixed in a volumetric ratio of 4:1:95 may be used as the wet etchant. Alternatively, an etching gas containing CF4may be used to dry etch the first mask pattern230A and the second mask pattern250A. For example, a gas mixture of CF4and O2, or a gas mixture of CF4, O2, N2, and HF may be used to isotropically chemically dry etch (CDE) the first mask pattern230A and the second mask pattern250A.

As a result, a plurality of vertically extending parts240V and a plurality of horizontally extending parts240H of the trimmed buffer layer240C are exposed as shown inFIG. 3D.

Referring toFIG. 3E, the trimmed second hard mask layer220C and the horizontally extending parts240H of the trimmed buffer layer240C are removed by an anisotropic dry etching process. As a result, the top surface of the first hard mask layer210is exposed between the vertically extending parts240V of the trimmed buffer layer240C. During this process, the vertically extending parts240V of the trimmed buffer layer240C are consumed from the top. Subsequently, a mask of remnants of the trimmed second hard mask layer220C and remnants of the vertically extending parts240V of the trimmed buffer layer240C are left on the first hard mask layer210.

Referring toFIG. 3F, the first hard mask layer210is anisotropically dry etched using the aforementioned mask as an etch mask. Thus, a first hard mask pattern210C is formed.

Referring toFIG. 3G, the pad oxide layer202is etched to expose the top surface of the substrate200between features of the first hard mask pattern210C, and the exposed portions of the substrate200are etched using the first hard mask pattern210C and the etched pad oxide layer202as an etch mask. Accordingly, a trench380is formed in the substrate200. The trench380may include a first section380A, and a second section380B which is wider than the first section380A.

Referring toFIG. 3H, insulating material is deposited in the trench380and over the first hard mask pattern210C. The resultant structure is planarized using CMP until the first hard mask pattern210C is exposed in the same manner as described with reference toFIG. 2PandFIG. 2Q. The first hard mask pattern210C is then removed.

As a result, an isolation layer382is formed in the trench380. The active regions110A are defined on the substrate200by the isolation layer382.

According to the method ofFIGS. 3A through 3H, the isolation layer382and the first hard mask pattern210C that are used as an etch mask to form the trench380are formed of different materials, and the first hard mask pattern210C is removed after the isolation layer382is formed. Therefore, the device isolation later382can be prevented from being damaged. In particular, the insulating layer filling the trench380is a nitride layer and the first hard mask pattern210C is a polysilicon layer. Thus, the isolation layer382will not be damaged when the hard mask pattern210C is removed.

Furthermore, the first hard mask pattern210C is used as an etch stop during CMP to form the isolation layer382is a polysilicon layer, and only polysilicon layers and oxide layers having a high etch selectivity are used as etch masks for forming the trench380. Therefore, the double patterning technique of forming the isolation layer382which defines the active regions110A is relatively simple.

Finally, although the present invention has been particularly shown and described with reference to the preferred embodiments thereof, it will be understood that various changes in form and details may be made therein without departing from the true spirit and scope of the invention as defined by the following claims.