Demodulation device for frequency modulated electrical signals

A frequency demodulation device having a circuit for limiting the amplitude of a frequency modulated signal, an integration circuit and a low pass filter. Two successive output signals from the amplitude limiting circuits are integrated in the integrating circuit in accordance with first and second predetermined time constants. The signal is then fed to the filter which extracts the mean value from the output signal of the integrating circuit. This mean value is proportional to the modulated wave frequency and thus determines that frequency.

BACKGROUND OF THE INVENTION 
The present invention relates to device making it possible to demodulate 
frequency-modulated waves and in particular simple devices operating up to 
carrier frequencies of a few dozen megahertz. 
In order to demodulate a frequency-modulated wave, it is known to generate 
from said wave pulses of a given length and which are independent of the 
modulated wave frequency. These pulses are then integrated in order to 
obtain a mean value for these pulses which is proportional to the 
repetition frequency thereof and therefore to the frequency of the 
modulated wave. 
There are numerous devices making it possible to perform this function and 
the most efficient of these uses a clipping circuit arranged in series 
with a monostable multivibrator and a low-pass filter. 
The clipping circuit clips the frequency-modulated signal thus supplying 
square wave frequency-modulated signals from which the monostable 
multivibrator supplies pulses of predetermined, constant duration, and the 
low-pass filter extracts the mean value. 
The disadvantages of this device are due to the necessity of having very 
short rise and fall times for these pulses if it is desired to obtain a 
correct operation (mean value of the signal obtained at the output from 
the device which is proportional to the frequency) at frequencies of a few 
dozen megahertz. 
BRIEF SUMMARY OF THE INVENTION 
The problem of the present invention is to obviate this disadvantage. 
According to the invention, this problem is solved by a demodulation device 
permitting the demodulation of frequency-modulated signals, wherein it 
comprises amplitude limiting means having an input for receiving the 
signals to be demodulated and a direct output for supplying an output 
signal, a low-pass filter having an input coupled to the output of the 
amplitude limiting means and an output constituting the output of the 
device and integration means for coupling the output of the amplitude 
limiting means to the input of the low-pass filter and for integrating the 
output signal fronts, two successive fronts of the output signal being 
respectively integrated with a first and a second time constant.

DESCRIPTION OF THE DRAWING AND PREFERRED EMBODIMENTS 
The invention is described in greater detail hereinafter relative to 
non-limitative embodiments and with reference to the attached drawing. 
In the drawing, a clipping circuit 6 receives at an input terminal 10, 
which is also the input of the demodulating device, signals which are to 
be demodulated. This circuit has a resistor R.sub.3 having a first 
terminal connected to a power source 1 across an electronic switch 3 
controlled by a signal V.sub.1 and a second terminal connected to earth. 
The first terminal of resistor R.sub.3 is also connected to the base of a 
bipolar N-P-N transistor Q.sub.1, whose collector is connected to earth 
and whose emitter constitutes a direct output from an amplitude clipping 
circuit 6. A resistor R.sub.4 has a first terminal connected to a power 
source 2 across an electronic switch 4 controlled by a signal V.sub.2 and 
a second terminal connected to earth. 
The first terminal of resistor R.sub.4 is also connected to the base of a 
bipolar N-P-N transistor Q.sub.2, whose collector is connected to earth 
and whose emitter constitutes an inverted output of the amplitude clipping 
circuit 6. Signals V.sub.1 and V.sub.2 are complimentary (V.sub.2 
=V.sub.1) and are respectively supplied by the output terminals 11 and 12 
of a pulse shaper 7 receiving at its input 10 the frequency-modulated 
signal. 
It should be noted that in the present construction, the amplitude clipping 
circuit 6 is a comparator AM 685 of Advanced MicroDevices whose input (+) 
is receiving the signal to be clipped and whose input (-) is connected to 
earth. 
The emitter of transistor Q.sub.1 is connected to earth across a capacitor 
C.sub.1, to a negative supply voltage V.sub.4 across a resistor R.sub.1 
and to the base of a bipolar P-N-P transistor Q.sub.3 whose emitter is 
connected to earth across a resistor R.sub.5 and whereof the collector is 
connected on the one hand to the output terminal 13 across a low-pass 
filter 5 and on the other to a negative supply voltage V.sub.3 across a 
resistor R.sub.6. 
The emitter of transistor Q.sub.2 is connected to earth across a capacitor 
C.sub.2, to voltage V.sub.4 across a resistor R.sub.2 and to the base of a 
transistor Q.sub.4 whose emitter is connected to earth across a resistor 
R.sub.5 and whereof the collector is connected on the one hand to the 
output terminal 13 across the low-pass filter 5 and on the other to the 
supply voltage V.sub.3 across resistor R.sub.6. 
It should be noted that transistors Q.sub.3 and Q.sub.4 are of the opposite 
type to transistors Q.sub.1 and Q.sub.2 in order to reduce temperature 
variations in the device (compensation of temperature variations of 
base-emitter voltages). 
The device functions in the following manner. The power sources 1 and 2 
each supply a direct current of value I.sub.o. When the value of the input 
voltage applied to terminal 10 is positive, the pulse shaper 7 supplies a 
voltage V.sub.1 at its output terminal 11 and permits the closing of 
switch 3 and a voltage V.sub.2 of value 0 which leaves switch 4 open. 
Conversely, when the value of the input voltage applied to terminal 10 is 
negative, switch 4 is closed and switch 3 open. 
When switch 3 is open, the base potential of transistor Q.sub.1 is equal to 
the potential of its collector, which has the effect of saturating this 
transistor. The charges which may be stored in capacitor C.sub.1 are 
shunted to earth with a low time constant .tau..sub.1 given by the 
following relationship: .tau..sub.1 =R'C.sub.1 if R' is the resistance of 
the double collector-emitter junction of saturated transistor Q.sub.1. 
When switch 3 is closed, the base potential of transistor Q.sub.1 is equal 
to -R.sub.3 .multidot.I.sub.o, taking account of the direction of current 
I.sub.o (current I.sub.o travelling from resistor R.sub.3 to power source 
1). Consequently, transistor Q.sub.1 is blocked and capacitor C.sub.1 is 
charged with a time constant .tau..sub.2 given by the following 
relationship: 
EQU .tau..sub.2 =R.sub.1 .about.C.sub.1 
Capacitor C.sub.1 will be charged until the voltage value at its terminals 
is equal to -V.sub.4, but for a value of said voltage equal to -R.sub.3 
.multidot.I.sub.o -V.sub.BE transistor Q.sub.1 starts to conduct (V.sub.BE 
being the voltage between the base and the emitter of said transistor) and 
the voltage at the terminals of capacitor C.sub.1 remains blocked at said 
latter value. 
It should be noted that for this construction, the value of voltage 
-V.sub.4 is very high in absolute terms compared with the voltage -R.sub.3 
.multidot.I.sub.o -V.sub.BE, permitting a quasilinear charge of capacitor 
C.sub.1. When switch 3 is open, the cycle starts again as indicated 
hereinbefore. 
Transistor Q.sub.3, is connected in a common emitter configuration and 
sends the voltage variations to output 13 across low-pass filter 5, 
reversing the phase of said voltage variations and amplifying them. 
The assembly comprising power source 2, switch 4, resistors R.sub.4 and 
R.sub.2, capacitor C.sub.2 and transistors Q.sub.2 and Q.sub.4 functions 
in the same way as their corresponding elements, having the same value 
(R.sub.3 =R.sub.4, C.sub.2 =C.sub.1, R.sub.2 =R.sub.1) as described 
hereinbefore, but the signals obtained are in phase opposition then due to 
the fact that control signals V.sub.1 and V.sub.2 are complimentary. 
The signals from these two assemblies are summated in the common collector 
charge of transistors Q.sub.3 and Q.sub.4, then filtered by low-pass 
filter 5 permitting the extraction of their mean value therefrom. 
It should be noted that the not indispensible summation of the two 
assemblies makes it possible to multiply by two the demodulated signal 
amplitude value, but also to multiply by two the value of the different 
frequencies which must be eliminated by the low-pass filter 5, which 
finally facilitates the filtering problem. 
Experience has shown and calculations have confirmed that this mean value 
is proportional to the frequency of the wave received on the input 
terminal 10. Thus, said device constitutes a frequency demodulator. 
It should be noted that for the device to operate correctly the charge time 
of capacitors C.sub.1 or C.sub.2 (time necessary for the voltage at their 
terminals to pass from a voltage close to OV to -R.sub.3 .multidot.I.sub.o 
-V.sub.BE) is less than half the cycle of the signals supplied at the 
terminals of resistors R.sub.3 or R.sub.4. 
The invention is not limited to the embodiments described and represented 
hereinbefore and the device can in particular have the following variants. 
In order to limit the peak discharge current value of capacitors C.sub.1 
and C.sub.2, a small resistor is inserted between the capacitors and 
earth. 
For collecting a demodulated signal of opposite polarity, the low-pass 
filter 5 can be connected to the coupled emitters of transistors Q.sub.3 
and Q.sub.4. 
Devices of this type can in particular be used in frequency modulation 
receivers.