Voltage compensation

A circuit may be configured to reduce voltage dip or overshoot that can occur on power supply lines when current loads are turned on or off more quickly than a power supply can respond. The circuit can be configured to generate a compensation voltage that can be coupled into the supply lines when the current load changes.

SUMMARY

In certain embodiments, an apparatus may comprise a controller including an output and configured to generate a power control signal configured to control generation of a power compensation signal. Further, the controller can provide the power control signal to the output to control the timing of the power compensation signal to offset a transient load response of a power supply.

In certain embodiments, an apparatus may comprise a controller configured to generate a power control signal configured to control generation of a power compensation signal. Further, the apparatus may comprise a power compensation signal generator circuit configured to offset a transient load response of a power supply in response to the power control signal.

In certain embodiments, a method may comprise determining when a transient current is about to occur at a supply node and providing, via a compensation circuit, a power compensation signal to the supply node based on a power control signal.

DETAILED DESCRIPTION

In the following detailed description of the embodiments, reference is made to the accompanying drawings which form a part hereof, and in which are shown by way of illustrations. It is to be understood that features of the various described embodiments may be combined, other embodiments may be utilized, and structural changes may be made without departing from the scope of the present disclosure. It is also to be understood that features of the various embodiments and examples herein can be combined, exchanged, or removed without departing from the scope of the present disclosure.

In electronic systems, power can be supplied to loads such as electronic circuits via voltage sources; some examples of voltage sources are low-dropout regulators, direct current (dc)-to-dc converters, and so forth. In conditions where the current demands of the load are within the recommended operating range of the voltage source (e.g. a power supply, power source, power supply, etc.), the output voltage of the source can remain at a set level. When the load current changes, the output of the voltage source, VOUT, can dip or overshoot. The amplitude and duration of the voltage dips and overshoots can depend on the rate of change of the load current, ILOAD, with respect to time, t, and can be represented by (dILOAD/dt). The momentary change in VOUTmay also depend on the transient load response of the source; a faster transient load response can reduce the voltage dips and overshoots.

From time to time, the load current may change more rapidly than the transient load response of the source can accommodate. When the rate of change in the current load is positive, such as when the current changes from a low to high value (e.g. one amp to two amps), a dip may appear on the output of the voltage source. A voltage overshoot can occur when the load current changes from a high value to low value. Overshoots and dips may be undesirable in electronic systems. For example, when the output voltage of a source dips below a minimum threshold, the load may latch up, enter into an unstable state, or power off. Conversely, the load can be damaged or destroyed when the overshoot exceed a maximum threshold.

Voltage compensation systems, which may be comprised of discrete components, integrated circuits, processors, system on chips (SOCs), or any combination thereof, can reduce the voltage dips and overshoots by generating a voltage with a second voltage source substantially equal to VOUTat the time ILOADchanges, provided the second voltage source has sufficient current handling capability to overcome the transient load response limitations of the first voltage supply.

FIG. 1is a diagram of a voltage compensation circuit, generally designated100. The voltage compensation circuit100can include a power supply102, a coupling network104, a compensation voltage generator, which can be referred to as a power compensation signal generator,106, and a compensation signal generator116. The power supply102may include a voltage source110configured to generate an output voltage (VOUT), a voltage supply (VREG)108, an output bus112, and a load114.

In the voltage compensation circuit100, the coupling network104can be a resistor-capacitor (RC) network. In other embodiments, the coupling network104can be structured differently and may include passive components (e.g. resistors, inductors, capacitors, etc.) and active components (e.g. operational amplifiers, transistors, processors, etc.) that may be configured and controlled by external circuits, such as a processor or an MPU. And in other examples, the coupling network104may not be used.

The compensation voltage generator106can generate a compensation voltage (power compensation signal), based on a compensation power supply (VCOMP—SUPPLY)118and a voltage compensation signal generated by the compensation signal generator116, which may be referred to as a power control signal. In some embodiments, the generator106may be an amplifier that can take a low voltage, low current output of the compensation signal generator116and convert it into a voltage signal with sufficient current capacity (e.g. sourcing, sinking, etc.) to drive the load114while minimizing dips and overshoots. When the compensation signal is direct current (dc) (e.g. constant rather than pulsed or sinusoidal), the compensation voltage can be a dc value equal to a magnitude of the compensation voltage generator supply (VCOMP—SUPPLY)118. For example, in the voltage compensation circuit100, the compensation generator106can be represented by a push-pull driver and may be powered by the compensation voltage source118; although in various embodiments, the compensation generator106can be an operational amplifier, class-A amplifier, class-B amplifier, or other type of amplifier. In some embodiments, when the compensation signal is dc, the compensation voltage can be a magnitude of compensation voltage generator supply (VCOMP—SUPPLY)118or can be a low voltage, depending on compensation signal value and the type of the compensation generator. In some embodiments, when the compensation signal is low, the compensation voltage can be 2.5 volts and when the compensation signal is high, the compensation voltage can be 0 volts. It should be noted, however, that the coupling network104may not be appropriate for a dc compensation voltage because the series capacitor can block the signal. When the compensation signal is alternating current (ac) (e.g. pulsed, sinusoidal, saw tooth, etc.), the magnitude of the compensation voltage can be a function of its amplitude, duty cycle, shape, and other factors. The resistor and capacitor values of the coupling network104can determine the frequency and time domain properties of the compensation voltage coupled onto the output bus112.

The voltage source110, which can be a dc-to-dc converter, boost converter, buck converter, low-dropout regulator (LDO), charge pump, or other type of voltage supply can generate output voltage, VOUT, on an output bus112. In some embodiments, the regulator110may be a step-down switching regulator configured to generate voltage, such as one volt, on the output bus112. The voltage source110can be powered by a supply voltage, VREG108. In some embodiments, the values of VOUTand VREGmay have values other than the one volt and five volts, respectively, that are shown inFIG. 1. For example, VOUTmay be four volts, and VREGmay be six volts. In other embodiments, such as with boost converter circuits, VOUTmay have a higher value than VREG. The output bus112can supply the output voltage, VOUT, and the load current, LOAD, to the load114.

During operation, the load current, ILOAD, may change due to different conditions in the load114. For example, when the load114is a processor and its usage jumps from 25% to 80% (or 80% to 25%), the changes on ILOADmay result in dips or overshoots on the output bus112. To reduce the effect ILOADhas on VOUT, a voltage compensation signal can be generated by a compensation signal generator116(which can be a processor, a controller, software, etc.) when the load current changes, and sent to a compensation voltage generator106for amplification. The compensation voltage can be provided to the output bus112via the coupling network104. In some examples, compensation signal generator116can generate a signal corresponding to the parameters of the load (e.g. a predicted current transition profile, period of time to provide the compensation voltage to the output bus112, period of time to delay generating the compensation voltage, type of load, etc.). The compensation signal generator116may continually poll the load114for an indicator (e.g. bit settings in a register, high or low voltage on a pin, etc.) that a transient current event is about to occur, while in other examples, the load114may initiate communication with the generator116, while in yet more examples, the generator116can detect electrical changes (e.g. load voltage or current, power supply output voltage levels, current or voltage sensing circuits, etc.) indicating that a transient current event is about to occur.

The circuit illustrated in100is but one example embodiment of a voltage compensation circuit. Other embodiments may use different circuit components and configurations.

The illustrative method of voltage compensation can be implemented in electronic systems such as data storage devices (DSD). Data storage devices have components, such as processors, preamps, transducer (which can include a reading element, a writing element, a reading element and a writing element), and motor drivers, whose current needs can exceed the transient load response of a voltage source. In some embodiments, the load can be a microprocessor unit (MPU) whose current requirements can change with a read/write state of the DSD.

An MPU can have a controller, a read/write channel, a host interface, controllers, read-only memory (ROM), volatile memory, a central processing unit (CPU), or any combination thereof. The MPU can be incorporated on one single integrated circuit (IC) which may be called a system on chip (SOC). Further, the MPU may initiate a read error recovery operation when a disc read operation fails. A read error recovery circuit, which can be located in the MPU, can activate and may increase a current demand at a rate faster than a transient load response of the MPU's voltage source can accommodate, which may result in a voltage dip. When the supply voltage dips below a threshold level, some of the components in the MPU, such as an R/W channel or a controller, may enter into an unstable state or power off altogether. When the read error recovery operation ends, the current consumption of the read error recover block may reduce rapidly, and can result in a voltage spike on the voltage supply. In some embodiments, the functions of a read error recovery block may be integrated into other components within the MPU or the SOC. Functions performed by components such as the controller and R/W channel may be performed in other components that may or may not be integrated into an SOC.

A voltage compensation circuit, which may be part of the MPU, can generate a compensation voltage that may be coupled into the voltage source signal at selected times, such as when an error recovery operation begins or ends. For example, the MPU can generate a voltage compensation control signal (e.g. sinusoidal, pulsed, etc.) that can be sent to the compensation voltage circuit for amplification.

Referring toFIG. 2, an illustrative method of voltage compensation is shown and generally designated200. Output signal202is a representation of the supply voltage, VOUT, from the circuit100ofFIG. 1with voltage compensation enabled. Output signal204, indicted with a hashed line, can represent VOUTwith voltage compensation disabled (or removed).

When the current demand increases, at206, the output signal204may have a voltage dip212many times larger than the output signal202, at210. When high current demands of the load end at216, an overshoot of the output signal204may be larger than the output signal202, at218.

In method200, the load current (ILOAD)208can increase at time t=200 microseconds from a starting value of zero milliamps (in an application where ILOADis an operating current of the MPU, the starting value would be greater than zero), at206, to a peak value of 400 milliamps for 100 microseconds (e.g. until t=300 microseconds) before returning to the starting value at216. In some embodiments, the starting value and the ending value may be different; the starting value may be higher than the ending value, and vice versa. Furthermore, neither the starting value, the peak value, or the ending value need to be positive. For example, a starting current could be −20 milliamps, a peak current could be −100 milliamps, and a final current could be 15 milliamps. In some embodiments, a change in load current may occur at different times. For example, the high current demand can begin206at t=80 microseconds and can end216at t=450 microseconds. In another example, the high current demand can start206at t=290 microseconds and may end216at t=305 microseconds.

In some embodiments, methods can be developed to implement voltage compensation in data storage devices (DSD), and in particular, for read error recovery events. When a controller issues a read command, a transducer can convert the magnetic flux over a disc into an electrical signal and send it to a preamplifier. The preamplifier can perform signal conditioning on the electrical signal (read signal) and send it to a read/write (R/W) channel for further processing. There may be times when there is an error with the read signal, which can result from bad sectors on the disc, a failed attempt to transfer data from the disc to the transducer, or from noise on the read signal.

When the microprocessor unit (which can include a controller, an error recovery block, an iterative error block, a host controller, a compensation control signal generator, and a read/write channel), or other processor or circuit, detects a read error, the error recovery block in the MPU can be activated. The compensation control signal generator can be configured to compensate for a voltage dip, and a compensation voltage can be generated and coupled into the supply of the MPU.

The read error may be recovered via several methods, including iterative decoding, which may be performed in an iterative decoding block of the MPU. After each iteration of a decoding operation, a controller (or iterative decoding block or other processor) can determine if the read error is recovered. When then the read error is not recovered, but no further iterations are performed, or when the read error has been recovered, the iterative error block in the MPU can be deactivated, which can cause a sharp drop in the current consumption of the MPU. The compensation control signal generator can be configured to compensate for a voltage overshoot and a compensation voltage can be generated and coupled to into the supply of the MPU. In some embodiments, more decoding operation iterations can be performed when the read error is not recovered.

FIG. 3depicts a system of voltage compensation, generally designated300. Specifically, the system300provides a functional block diagram of a data storage device (DSD) and in particular, a hard disc drive with voltage compensation, and can be an example implementation of the circuit100and the methods200and800. The DSD301can optionally connect to be removable from a host device302, which can be a desktop computer, a laptop computer, a server, a telephone, a music player, another electronic device, or any combination thereof. The data storage device301can communicate with the host device302via the hardware/firmware based host interface circuit304that may include a connector that allows the DSD301to be physically removed from the host302.

The DSD301can include a programmable controller308with associated memory312and processor310. The programmable controller308, the R/W channel306, and the host interface304may be part of an MPU314. A buffer318can temporarily store user data during read and write operations and can include a command queue (CQ)320where multiple access operations can be temporarily stored pending execution. The R/W channel306can encode data during write operations and reconstruct user data during read operations. A preamplifier/driver circuit (preamp)322can apply write currents to the transducer(s)328and can provide pre-amplification of readback signals. A servo control circuit332may use servo data to provide the appropriate current to the coil324to position the transducer(s)328over disc(s)330. The controller308can communicate with a processor334to move the transducer(s)328to the desired locations on the disc(s)330during execution of various pending commands in the command queue320or during other operations.

Some components included in the MPU314may have two or more voltage sources when multiple voltage levels are required (e.g. 3.3 volts and 5 volts). The component(s) supplied by the voltage source316may have threshold limits. For example, components operating on a one volt supply bus may have a +/−50 millivolt operating tolerance; the components can operate properly with a supply as high as 1.05 volts and as low as 0.95 volts.

In the system300, the host interface304, read/write (R/W) channel306, and controller308may all get power from voltage source316, although they can get power from other sources (not shown). When read error recovery is activated, the controller308can generate a compensation correction signal. A voltage compensation circuit317(see106) can amplify the signal and couple it on to the output bus of the voltage source316(refer to coupling network104and output bus112).

Referring toFIG. 4, a diagram of a voltage compensation system is shown and is generally designated400. The system400can be an example implementation of the circuit100and the methods200and800. The system400includes a micro processing unit (MPU)401with digital logic410, read error recovery circuitry412, input/output (I/O) circuitry414, and a R/W channel416.

A regulator (voltage source)408, can provide power to a compensation voltage generator406, the R/W channel416and the input/output (I/O) circuitry414, although in some embodiments, the R/W channel416and I/O414circuit can receive power from other sources, such as the regulator402, or a combination of two or more regulators. The regulator402, which may be configured to output one volt, can provide power to the digital logic410and read error recovery circuitry412of the MPU401.

The host418may send and receive data via a host interface (not shown) to the MPU401. The data from the host may be written to, or read from, the data storage medium (DSM)420, which may be a disc medium, via the preamp422and the R/W channel416. If, during the course of reading DSM data, a read error occurs, the read error recovery circuit412may be activated and the MPU401may generate a voltage compensation signal. In this particular embodiment, the signal can be generated by the digital logic circuit410and sent to the voltage compensation generator406. In some embodiments, the output of the voltage compensation generator406may be enabled during the read error recovery operation, and the compensation signal can determine the length of time the generator is enabled. For example, the output of the generator406can be a constant 2.5 volts during the read error recover operation, and may return to zero volts when the operation is over. In other embodiments, the generator406output may be pulsed, saw tooth, triangular, sinusoidal, or other shape. The output of the compensation generator406can be coupled onto the output of the regulator402via the coupling network404, and the voltage variation can be kept within threshold limits.

A compensation voltage generator, which may amplify the voltage compensation signal, can be integrated into the microprocessor unit (MPU), integrated into the voltage regulator (voltage source), or may be a separate component in the system.

Referring toFIG. 5, a diagram of a voltage compensation system is shown and is generally designated500. The system500can be an example implementation of the circuit100and the methods200and800. In the system500, the compensation voltage generator508can be separate from the MPU although it may be integrated into other systems in the DSD.

The system500can contain a voltage source502configured to supply a voltage (e.g. one volt) to an MPU504. The MPU504, which may contain a R/W channel, may read data from, and write data to, a DSM506, via a preamp (not shown). The MPU504may also generate a voltage compensation signal and send it to a compensation voltage generator508, which may be supplied by a voltage source507.

A coupling network510can couple the compensation voltage to the output of the voltage source502and into the MPU504. The host512can transmit and receive data and instructions to the MPU504.

Referring toFIG. 6, a diagram of a voltage compensation system is shown and is generally designated600. The system600can be an example implementation of the circuit100and the methods200and800. In system600, the compensation voltage generator can be integrated into the MPU604. The power supply for the generator can be external, a voltage source integrated into the MPU604, or a combination of integrated and external voltage supplies.

The system600can contain a voltage regulator602configured to supply a voltage (e.g. one volt) to an MPU604. In other embodiments, however, the regulator602can be configured to supply other voltage levels, such as 3.3 volts and 5 volts, and may be separate from other components or integrated into systems on the DSD. The MPU604can read data from, and store data to the DSM606, and may have an integrated compensation voltage generator. The generator (not shown) may receive power from a voltage regulator607and can output a compensation voltage to the coupling network608. In some embodiments, however, the generator may receive power from additional voltage sources. The network can couple the compensation voltage to the output of the voltage regulator602and into the MPU604. The host610can transmit and receive data and instructions to the MPU604.

The voltage regulator607may be set to a higher output voltage than the voltage regulator602. For example, in the example embodiment of600, the voltage regulator602can be configured to output one volt and the voltage regulator607can be configured to output 2.5 volts. In other embodiments, the voltage regulator607can be configured to output a plurality of voltage levels.

Referring toFIG. 7, a diagram of a voltage compensation system is shown and is generally designated700. The system700can be an example implementation of the circuit100and the methods200and800. In the voltage compensation system700, the compensation voltage generator can be integrated into a voltage source702. The host710may send and receive data via a host interface (not shown) to the microprocessor unit (MPU)704. The voltage source702can generate a supply voltage (which, in some embodiments, may be one volt) for the MPU704. The voltage source702can also have an integrated compensation voltage generator which can generate a compensation voltage whose amplitude and shape can be determined by the control signal of the MPU704. The compensation voltage can be coupled into the MPU supply via the coupling network708. The MPU704can send and receive data to and from the DSM706.

Referring toFIG. 8, a flowchart of a method of voltage compensation is shown and generally designated800. The method800can be an example implementation of the circuit100and the system300. The method800can read data from a DSM at802, and can determine if a read error has occurred, at804. A read error can occur as a result of bad sectors on a DSM, a failed attempt to transfer data from the DSM to a transducer, or from noise on the read signal. When no read error is detected, data may continue to be read from the DSM, at802. When a read error is detected, at804, error recovery circuits, which may be located in a microprocessing unit (MPU), can be activated at806. A compensation control signal configured for voltage dips can be generated by a circuit (e.g. an MPU, voltage source, signal generator, etc.) at810, at substantially the same time as the recovery circuits are activated at806.

The method can start read error recovery, at808, which can be performed in circuit (e.g. MPU, controller, R/W channel, etc.), and can rapidly draw substantially large amounts of current (load current) from a voltage supply; the change in load current can be faster than the transient load response of the voltage supply, and a dip can occur on a supply bus that could affect connected components, including an MPU. A circuit, such as an amplifier, can generate a compensation voltage at812, which may be based on a compensation control signal and can be coupled to power supply circuits. In some embodiments, the compensation voltage can be pulsed, sinusoidal, a constant value, and so forth.

The method can determine when the read error is recovered at816. When the read error is not recovered, at816, the method can determine whether to perform more iterations in the error recovery process at818. The decision to continue the process, at818, can be made by an MPU, but may also be made by a controller, a CPU, a host, and so forth. When there are more iterations, the method can continue error recovery, at808, and the compensation network output voltage may be remained at the same dc level.

When the read error is recovered at816, or when a decision is made to discontinue the read error recovery process (which can be due to an expired timer, a reprioritization of resources, power down, etc.) at818, error recovery circuits can be deactivated, at820; deactivating error recovery circuits can result in a sharp decrease in current consumption, and may cause an overshoot to appear on power supply circuits. A circuit, such as an MPU, can generate a compensation control signal for voltage overshoot at822. In embodiments where a load current transitions from a high value to a low value and back to a high value occurs (e.g. rapidly increasing a load resistance, turning a circuit with a normally high current draw off and then back on, etc.), the method800can change. For example, the method might generate compensation control signal for a voltage overshoot rather than a dip, at810, and for a voltage dip rather than an overshoot, at822. A circuit, such as an amplifier, can generate a compensation voltage at824which can be coupled to supply circuits. The method can read data from a DSM at802.

The method800can be altered to apply to other transient current events in the DSD, such as the control of electric motors. The method can also be adapted to apply to other systems, such as audio amplifier circuits where large amplitude, low frequency transients can cause supply variations.

Systems400through700, and the method800, are examples of voltage compensation implemented in data storage devices, which can include disc storage, solid state storage, or other storage, or any combination thereof. Additionally, voltage compensation may be used in other applications such as motor controls, lighting, automotive, power generation, home theater, and so forth.

In accordance with various embodiments, the methods described herein may be implemented as one or more software programs running on a computer processor or controller. In accordance with another embodiment, the methods described herein may be implemented as one or more software programs running on a computing device, such as a personal computer that is using a disc drive. Dedicated hardware implementations including, but not limited to, application specific integrated circuits, programmable logic arrays, and other hardware devices can likewise be constructed to implement the methods described herein. Further, the methods described herein may be implemented as a computer readable storage medium or device including instructions that when executed cause a processor to perform the methods.

The illustrations, examples, and embodiments described herein are intended to provide a general understanding of the structure of various embodiments. The illustrations are not intended to serve as a complete description of all of the elements and features of apparatus and systems that utilize the structures or methods described herein. Many other embodiments may be apparent to those of skill in the art upon reviewing the disclosure. Other embodiments may be utilized and derived from the disclosure, such that structural and logical substitutions and changes may be made without departing from the scope of the disclosure. For example, the figures and above description provide examples of architecture and voltages that may be varied, such as for design requirements of a system. Moreover, although specific embodiments have been illustrated and described herein, it should be appreciated that any subsequent arrangement designed to achieve the same or similar purpose may be substituted for the specific embodiments shown.