IC package and method for manufacturing the same

An IC package is provided. The IC package comprises a leadframe comprising a metal strip (222) partially etched on a first side. The leadframe may be configured for an IC chip to be mounted thereon and for a plurality of bonding areas (218) to be electrically coupled to the leadframe and the IC chip. The IC chip, the bonding areas, and a portion of the metal leadframe are covered with an encapsulation compound, with a plurality of contact pads (206) protruding from the bottom surface of the leadframe. The bottom surface of the leadframe may be etched one or more times during the manufacturing process to reduce the depth of the undercutting. A method for manufacturing an IC package is also provided.

BACKGROUND

1. Technical Field

This patent application relates generally to integrated circuit (IC) packaging technology and, in particular, but not by way of limitation, to systems and method for patterning IC package leadframes.

IC packaging is one of the final stages involved in the fabrication of IC devices. During IC packaging, one or more IC chips are mounted on a package substrate, connected to electrical contacts, and then coated with an encapsulation material comprising an electrical insulator such as epoxy or silicone molding compound. The resulting IC package may then be mounted onto a printed circuit board (PCB) and/or connected to other electrical components.

Oftentimes, leadless IC packages may include electrical contacts rather than external leads, where the electrical contacts are covered on top by an encapsulating material and are exposed on the bottom of the IC package so they can be connected to electrical components located beneath the IC package. Oftentimes, using a metal leadframe to form part of the IC package may be more cost effective than using a laminated board or tape material because, for example, more cost effective materials may be used, such as copper, nickel, or other metals or metal alloys, and use of such materials may allow more cost effective manufacturing processes to be employed, such as stamping or etching rather than multi-step laminate processes.

In the past, leadless IC packages have been limited in that the maximum number of terminals that can be utilized to pass electrical signals to and from the I/O ports of the IC chip is limited to the number of terminals that can be located around the perimeter of the Die-Attach Pad (DAP). Attempts have been made to increase the number of terminals available for electrical connection with the I/O ports of the IC chip, including decreasing the distance between the terminals in order to fit more terminals around the perimeter of the DAP and increasing the number of rows of terminals disposed around the perimeter of the DAP. However, increasing the number of rows of terminals requires either decreasing the size of the IC chip or increasing the size of the IC package. Additionally, the amount the distance between the terminals can be reduced is limited to the minimum distance between connection points on the PCB, which is relatively large.

SUMMARY

Various embodiments disclosed in this application contemplate

The above summary of the invention is not intended to represent each embodiment or every aspect of the present invention.

DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS

Various embodiments of the present invention will now be described more fully with reference to the accompanying drawings. The invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, the embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.

Referring now toFIG. 1, a metal strip100, for example, of the type that may be used in an IC package manufacturing process, is shown. The metal strip100includes a plurality of device areas101disposed thereon. In some embodiments, the metal strip100may be copper or other metal or metal alloy and may have a thickness of 5 mils, more than 5 mils, or less than 5 mils. In various embodiments, the device areas101may vary in size and the number of device areas101on a metal strip100may also be varied. For example, in some embodiments, the number of device areas101on a metal strip100may be any number from less than 100 to more than 1000. During an IC manufacturing process, one or more IC chips may be attached to each device area101and encapsulated within an encapsulation compound. In various embodiments, the IC chips may be electrically coupled to the device area101via wire bonds or directly thereto in a flip-chip configuration. The IC manufacturing process may also include singulating the device areas101from each other to form a plurality of IC packages that may be configured to be mounted to an external device, such as a PCB. When the IC packages are mounted onto a PCB, the IC chips may be electrically coupled to the PCB via contact areas disposed on a bottom surface of the IC packages.

Referring now toFIGS. 2A-2E, aspects of an embodiment of an IC package are shown at various stages of a manufacturing process. For descriptive purposes, the manufacturing process is described relative to a single IC package, but in various embodiments, the steps of the manufacturing process may be applied to some or all of a plurality of device areas of a leadframe strip, such as the metal strip100shown inFIG. 1. Referring now toFIG. 2A, the process begins with an unetched leadframe200, such as a device area of a metal strip. InFIG. 2B, the leadframe200has been partially etched to form a pattern of recesses226defining metal traces222on a top surface thereof. In the embodiment shown, a metal plating has been added to bonding areas218disposed on a top surface of the metal traces222. The metal plating of the bonding areas218may be formed by applying a bondable or solderable material to the metal traces222, such as, for example, a plated or clad metal such as silver (Ag), gold (Au), tin (Sn), copper (Cu), or other bondable materials. In some embodiments, portions of a bottom surface of the metal traces222may be coated with a solderable material, such as, for example, metal plating. As will be described in more detail below, areas of the bottom surface that will later become contact pads206have been plated in this embodiment. InFIG. 2C, an IC chip204has been secured to the top surface of the leadframe200using an adhesive material, for example, an epoxy, electrically coupled to the bonding areas218, for example via wire bonds214, and an encapsulation compound208(shown as shaded areas) has been applied to encapsulate the IC chip204and the wire bonds214. In addition, the encapsulation compound208has also filled in the recesses226, including the recesses226disposed under the IC chip204.

InFIG. 2D, a bottom surface of the leadframe200has been etched away. In the embodiment shown, the leadframe200has been etched across the entire bottom surface thereof to remove a portion200athereof. In various embodiments, a subset of the entire bottom surface may be etched away. As can be seen inFIG. 2Das compared toFIG. 2C, the thickness of the leadframe has been reduced. As will be described in more detail below, by reducing the thickness of the leadframe200across an entire bottom surface therefrom, less material will be need to be etched away during later partial or patterned etchings, if any, which may reduce undercutting thereby improving electrical connectivity and, in some embodiment, may allow thinner contact pads to be formed. For example, in some embodiments, the leadframe200may have a thickness of on the order of 4 mils and the thickness may be reduced by on the order of 1 mil or more.

Referring now toFIG. 2E, the bottom surface of the leadframe200has been partially etched to form a pattern therein. In various embodiments, contact pads206disposed on the bottom surface of the leadframe200may be plated with a metal plating. In various embodiments, the etching of the bottom surface may include etching portions226aof the leadframe200corresponding to the recesses226that were formed in a top surface of the leadframe200to completely etch through the leadframe200at those areas and, in some places, expose a bottom surface of the encapsulation compound208. In various embodiments, the etching may include removing areas222aof some of the metal traces222in addition to areas the portions226aof the leadframe200between the metal traces222below the recesses226. In some embodiments, a protective coating229may be added to a portion of bottom surfaces of the metal traces222.

Referring now toFIG. 3A, a top view of a leadframe300is shown before an IC chip has been mounted thereon. In the embodiment shown, the leadframe300has a plurality of recesses326(shown as unshaded portions) etched into a top surface thereof, where the recesses326form a plurality of metal traces322(shown as shaded portions) on the top surface of the leadframe300. The metal traces322may be formed having any width of any size, such as, for example, in some embodiments the width of the metal traces322may be on the order of 1.5 mils and they may be spaced apart on the order of 4 mils from each other. Although an embodiment is shown having a particular pattern, any number of patterns may be etched into the leadframe300. Bonding areas318for wire bonding to an IC chip may include portions of the metal traces322around the periphery of the leadframe300and may include metal plating thereon (not shown). For descriptive purposes, the location of the contact pads306disposed on a bottom surface of the leadframe300for electrically coupling an IC chip to corresponding contact points on a PCB have been shown as unshaded squares disposed at an opposite end of the metal traces322from the bonding areas318. Some of the un-etched portions of the leadframe300between the recesses326may be used to provide support for the IC chip that may be mounted thereon and/or provide electrical pathways to route signals between the bonding areas318on a top surface of the leadframe300and contact pads306on a bottom surface of the leadframe300. While all of the contact pads306are shown interiorly disposed relative to the bonding areas318, some or all of the contact pads306may be disposed directly below the bonding areas318or may be disposed outwardly from the bonding areas318towards a periphery of the leadframe300.

FIG. 3Bis a side view of a magnified cross section of the portion of leadframe300from Detail A ofFIG. 3A. From this view, recesses326formed into a top surface of the leadframe300can be seen with the metal traces322and bonding areas318being disposed therebetween. While the recesses326are shown having a certain depth and width, in various embodiments, the recesses326may be of any depth and any width depending on the design criteria. In various embodiments, when bonding areas318and metal traces322are formed by partially etching a pattern in the top surface of leadframe300, undercutting may occur where portions322aof the sides of the metal traces322are removed thereby making portions of the metal trace322below the upper surface narrower than the upper surface.

Referring now toFIG. 4A, a top view of an embodiment of a leadframe400having a pattern etched into a top surface thereof is shown. For descriptive purposes, an outline of an IC chip404mounted thereon is shown. In this embodiment, recesses426have been formed by etching away portions of a top surface of the leadframe400to define bonding areas416and418and metal traces422. In the embodiment shown, the die-attach area (DA area) is the portion of the leadframe underneath the area where the IC chip404will be mounted and may include both a die-attach pad and portions of the metal traces422.

Still referring toFIG. 4A, for descriptive purposes, an outline of the areas where contact areas may be disposed on a bottom surface of the leadframe400during an etching step are shown as circles having dashed-lines. As can be seen, the top surface of leadframe400has been partially etched such that two rows of bonding areas416and418have been formed. In the embodiment shown, the size and shape of the inner row of bonding areas418is different than the size and shape of the outer row of bonding areas416. In the embodiment shown, no metal traces are coupled to the outer row of bonding areas416because, as can be seen, the bonding areas416are disposed directly over the contact pads. In this orientation, the centerlines of the bonding areas416must be spaced apart the same distance as the distance between the centerlines of the contact pads. However, in the inner row, the bonding areas418have been spaced closer together because some of the contact pads are not disposed directly underneath corresponding bonding areas418.

Referring now toFIG. 4B, an alternative embodiment of the leadframe400ofFIG. 4Ais shown. In this embodiment, the outer row of bonding areas416have been formed to be substantially smaller than the contact pads406shown as being disposed directly therebelow.

Referring now toFIG. 5, cross-sectional side views corresponding to Detail A and Detail B ofFIG. 4Aare shown at various stages of a manufacturing process. At step s501, an etch-resist material is selectively applied to a top surface of the metal leadframe500and recesses526has been partially etched into the top surface of the leadframe500to form a pattern therein. In some embodiments, the etch-resist coating may be selectively applied to both top and bottom surfaces of the leadframe500, as shown relative to bonding areas516. In some embodiments, the etch-resist coating may be a metal plating or a metal plating may be applied after the recesses526have been formed. At step s503, the top surface of the leadframe500has been covered with an encapsulation compound508. In various embodiments, wire bonds (not shown) may be bonded to the bonding areas516and518before the encapsulation compound508is applied. At step s505, a bottom surface of the leadframe500has been partially etched to remove certain portions thereof to define contact pads506therein having sidewalls506a. As can be seen, etching the bottom surface of the leadframe500to define the contact areas506results in portions of the sidewalls506athereof being etched away or undercut.

Still referring toFIG. 5, the side views corresponding to Detail A show the contact pads506being disposed directly below the bonding areas516, both having substantially the same diameter. Oftentimes, PCB mounting requirements dictate the minimum diameter of the contact areas506and the distance they must be spaced apart (pitch). Disposing contact areas506directly below corresponding bonding areas516thus requires the bonding areas516to meet those same PCB limitations. By contrast, the side views corresponding to Detail B show the two outer contact pads506being disposed below bonding areas518awhile the contact pad (not shown) corresponding to the bonding area518bis remotely disposed therefrom and coupled thereto via metal trace522. By remotely disposing the contact pad corresponding to bonding area518b, the bonding areas518aand518bmay have a smaller width and be spaced closer together than the boding areas516shown in Detail A while still meeting the PCB spacing requirements for the corresponding contact pads506. For example, in some embodiments, the bonding areas518aand518bmay have a width on the order of 2.5 mils and may be spaced apart on the order of 4 mils while the contact pads506may have a diameter of on the order of 6 mils and spaced apart on the order of 4 mils or more.

Referring now toFIGS. 6A and 6B, side views of an IC package at various stages of two different IC package manufacturing processes are shown. Referring now toFIG. 6A, at step s601, a side view of leadframe600is shown having a plurality of recesses in a top surface thereof defining a plurality of bonding areas thereon and having an encapsulation layer added thereto. At step s603, a coating660has been selectively applied to the bottom surface of the leadframe600, such as, for example, a metal plating, an etch-resist coating, or other material. At step s605, the bottom surface of the leadframe600has been partially etched to form recesses therein corresponding to the portions not having the selective coating660thereon. In the embodiment shown, the recesses define a plurality of contact pads having sidewalls606a, where the partial etching causes an etched undercut into the side walls606a. In various embodiments, the thicker the leadframe600, the deeper the undercut will extend into the sidewalls606aof the contact pads.

Referring now toFIG. 6B, at step s601′, a side view of leadframe600is shown having a plurality of recesses in a top surface thereof defining a plurality of bonding areas thereon and having an encapsulation layer added thereto. In the embodiment shown, a bottom portion600aof the leadframe600has been removed, thereby reducing the thickness of the leadframe600from a first amount to a second amount. In various embodiments, the bottom portion600amay be removed via a mechanical or chemical etching or milling process. At step s603′, a coating660has been selectively applied to the bottom surface of the leadframe600, such as, for example, a metal plating, an etch-resist coating, or other material. At step s605′, the bottom surface of the leadframe600has been partially etched to remove the portions of the leadframe600not covered by the selective coating660thereby forming recesses into the leadframe600. In the embodiment shown, the recesses define a plurality of contact pads having sidewalls606a′, where the partial etching causes an etched undercut into the side walls606a′. As can be seen, because the portion600awas removed from the bottom surface of the leadframe600, the amount of undercutting of the sidewalls606a′ has been reduced relative to the undercutting shown inFIG. 6A.

Referring now toFIG. 7A, cross-sectional side views of a metal leadframe700at various stages of a manufacturing process are shown. At step s703, a metal coating760has been selectively applied to a bottom surface of the metal leadframe700. At step s705, the bottom surface of the metal leadframe700has been partially etched to define contact pads706each having a pattern formed in a bottom surface thereof. In the embodiment shown, the contact pads706each have an indentation763formed therein, the indentation763being a generally parabolic-shaped concavity.

Referring now toFIG. 7B, one of the contact pads706ofFIG. 7Ais described in more detail. At step s707, a perspective view and a side view of a contact area706is shown having a soldering agent765(shown as a solder ball for descriptive purposes) disposed relative thereto. In various embodiments, the soldering agent765may be applied using a solder silk-screen printing method, solder dip, solder paste, solder ball, or other solder finishing process. As can be seen, the indentation763in the bottom surface of the contact pad706may be adapted to provide an increased surface area for bonding with the soldering agent765. In various embodiments, the soldering agent765may be a solder ball, solder wire, solder paste, or other attachment materials. At step s709, the soldering agent765has been bonded to the surface of the indentation763of the contact pad706. In some embodiments, the soldering agent765may be applied to the contact pad706prior to mounting to a PCB or during the mounting process.

Referring now toFIG. 8A, cross-sectional side views of a metal leadframe800at various stages of a manufacturing process are shown. At step s803, a metal coating860has been selectively applied to a bottom surface of the metal leadframe800. At step s805, the bottom surface of the metal leadframe800has been selectively etched to define contact pads806each having a pattern formed in a bottom surface thereof. In the embodiment shown, the contact pads806each have a plurality of indentations863formed therein.

Referring now toFIG. 8B, one of the contact pads806ofFIG. 8Ais described in more detail. At step s807, a perspective view of the contact pad806is shown having a soldering agent865disposed relative thereto. As can be seen in this embodiment, the bottom of the contact pad806includes a ring-shaped channel indentation863bsurrounding a dimple-shaped indentation863a. At step s809, the soldering agent865has been melted to conform to the indentations863of the contact pad806. In various embodiments, having a plurality of indentations863provides an increased surface area of contact between the contact pad806and the soldering agent865.

Referring now toFIG. 9, a flow chart of an embodiment of an IC package manufacturing process900is shown. The process begins at step902with an unetched leadframe, such as, for example, a metal strip of copper. At step904, the leadframe is partially etched on a top surface to create recesses therein defining metal traces thereon. The partial etching may be carried out by any number of etching processes, such as, for example, coating or laminating a top surfaces of the leadframe with a layer of photo-imageable etch resist such as a photo-imageable epoxy. For example, the photo resist may be spin-coated onto the leadframe, then exposed to ultraviolet light using a photo-tool, wherein the exposed portions are then removed in a development process. The etch resist is thereby patterned to provide the recesses on the top surface of the leadframe. The leadframe is then etched, for example by immersion or pressurized spray, to partially pattern the metal traces. In some embodiments, the etch may be a half-etch, such that the recessed formed in the leadframe extend halfway therethrough. For example, in a 4 mil leadframe, the half-etch would be a 2 mil etch. In various embodiments, the leadframe may be etched more or less than halfway therethrough. For example, in some embodiments, the partial etching may be to a depth on the order of 3 mils +/−0.5 mils. After etching, the etch resist may be stripped away.

At step906, the partially etched leadframe may be selectively plated, such as, for example, by plating the bonding areas on a top surface thereof. The metal plating of the bonding areas may be formed by applying a bondable material to the metal traces. In various embodiments, a surface adhesion enhancement treatment (“AE treatment”), such as, for example, roughening and/or cleaning the surface to increase adhesion, may follow the metal plating.

At step908, an IC chip is mounted to the leadframe using an adhesive material, for example, an epoxy. After the IC chip is mounted to the leadframe, the IC chip may be electrically coupled to the bonding areas disposed outside of the die-attach area, for example, via wire bonds. In various embodiments, a flip-chip configuration may be utilized and wire bonding may not be required. Thereafter, a molding compound is applied to encapsulate the IC chip and the wire bonds at step910. At step912, a bottom surface of the leadframe is etched. In some embodiments, no etching is done at step912. In some embodiments, the leadframe is etched across the entire bottom surface thereof thereby reducing the thickness of the leadframe. By reducing the thickness of the leadframe across an entire bottom surface thereof, there is less material needing to be etched away during later partial or patterned etchings, if any, thereby reducing undercutting. In various embodiments, at step912only a subset rather than the entire bottom surface may be back etched, such as, for example, in a pre-determined pattern.

In various embodiments, the process900may end after step912. In some embodiments, the process900proceeds to step914. In some embodiments, a full metal plating is applied to the bottom surface of the leadframe before the process900proceeds to step914. At step914, the bottom surface of the leadframe is selectively coated with a material. In some embodiments, the coating material may be a solder mask printed on a bottom surface of the leadframe. After the solder mask is exposed and developed, the process900may end. In some embodiments, the coating material may be an etch-resist applied to the bottom surface of the leadframe, such as, for example, a blue-ink printing to transfer an image of a pattern to be etched with an etchant, such as, for example, FeCl3. In some embodiments, the coating material is a metal plating, such as, for example, a NiPdAu plating, applied to a bottom surface of the leadframe after step912. In some embodiments, the process900may end after the metal plating, may proceed to the solder mask printing step described above, or may proceed to the etch-resist step described above.

In some embodiments, after the bottom surface of the leadframe has been coated with a material, the process900proceeds to step916. At step916, the bottom surface of the leadframe is partially etched to form a pattern therein. In embodiments where a metal plating has been selectively applied to a bottom surface of the leadframe, an etch-resist may not be needed, may not need to be applied over the metal plating, or may be applied over the metal plating. After the partial etching, a “de bleed” step may be performed to remove blue-ink overhang, if any. In some embodiments, blue ink, if applied, may be left on the metal plating or may be added to the metal plating to protect the metal plating from later processing steps. In various embodiments, the back etching of the bottom surface may include etching portions of the leadframe corresponding to the recesses that were formed in a top surface of the leadframe to thereby completely etch through the leadframe at those areas and thereby exposing a bottom surface of the encapsulation compound. In various embodiments, the back etching may include removing areas of some of the metal traces in addition to areas of the leadframe between the metal traces. In various embodiments, the back etching may be repeated a plurality of times, as may be needed for certain design criteria.

In some embodiments, a protective coating may be added to a portion of bottom surfaces of the leadframe. For example, in some embodiments, at step918, a solder mask may be printed onto portions of a bottom surface of the metal traces to cover exposed portions thereof. Thereafter, the process900may include a chemical de flashing at step920to remove any solder resist on the contact areas while leaving the solder resist on exposed metal traces. The solder resist may then be cured, for example, via UV curing so the solder resist will resist solder and chemicals. At step922, remaining blue ink, if any, may then be stripped to expose the areas of the contact surfaces for further surface mounting treatments, if any.

Referring now toFIG. 10, a flow chart of an alternative embodiment of the IC package manufacturing process900ofFIG. 9is shown. Similar to the process ofFIG. 9, the IC manufacturing process1000of the embodiment shown begins at step1002with an unetched leadframe followed by a partial etching at step1004. At step1006, the partially etched leadframe may be selectively plated on both a top and bottom surface thereof. Next, at step1008, an IC chip is mounted to the leadframe and electrically coupled thereto. Thereafter, an molding compound is applied to encapsulate the IC chip and the wire bonds at step1010. At step1012, a bottom surface of the leadframe is partially etched. In various embodiments, at step1014, a water jet or other abrasive process may be applied to a bottom surface of the leadframe.

In various embodiments, the process1000may end after step1014. In some embodiments, the process1000proceeds to step1016and a solder mask is printed thereon, whereas in other embodiments, the process1000may proceed to step1016′ and an etch resist may be applied. From step1016, various embodiments of the process1000may include a chemical de flash (step1018), a UV curing (step1020), and/or a blue ink stripping (step1022) similar to the steps described above inFIG. 9. From step1016′, various embodiments of the process1000may include a solder mask printing (step1018′), exposure (step1020′), and/or development (step1022′) similar to the steps described above inFIG. 9.