Method for fabricating semiconductor chip

After a film layer 6 formed from a die attach film 4 and a UV tape 5 has been provided as a mask on a semiconductor wafer 1, boundary trenches 7 for partitioning semiconductor elements 2 formed on a circuit pattern formation surface 1a are formed in the film layer 6, thereby making a surface 1c of a semiconductor wafer 1 exposed. The exposed surface 1c of the semiconductor wafer 1 in the boundary trenches 7 is etched by means of plasma of a fluorine-based gas, and the semiconductor wafer 1 is sliced into semiconductor chips 1′ along the boundary trenches 7.

TECHNICAL FIELD

The present invention relates to a semiconductor chip fabrication method for fabricating semiconductor chips by slicing a semiconductor wafer through use of plasma dicing.

BACKGROUND ART

A related-art process for fabricating a semiconductor includes forming a plurality of semiconductor elements on a circuit pattern formation surface of a semiconductor wafer and subsequently slicing (cutting) the semiconductor wafer, in a mechanical manner, so as to separate the semiconductor elements from each other. A fabricated semiconductor chip is bonded to a leadframe, a substrate, and the like, by means of an epoxy-resin-based liquid adhesive. However, a film-shaped adhesive called a die attach film (DAF) which is easy to handle in connection with a thin semiconductor chip has recently been used.

The die attach film is affixed to a rear surface of a semiconductor wafer (i.e., a surface opposite to a circuit pattern formation surface) before mechanical dicing of the semiconductor wafer and mechanically sliced in conjunction with the semiconductor wafer. For the reason, each of sliced semiconductor chips has the die attach film which is essentially equal in size to the semiconductor chip, and the semiconductor chips can be bonded, just as they are, to a leadframe, a substrate, and the like.

Plasma dicing which is a dicing technique imposing no load on a semiconductor wafer has recently gained attention as a technique which enables performance of dicing operation without imposing a bend, warpage, and the like, on a semiconductor wafer has been slimmed down to a thickness of tens of micrometers or thereabouts. Plasma dicing includes forming boundary trenches—which partition semiconductor elements—in a resist film formed over the semiconductor wafer and etching (engraving) a surface of the semiconductor wafer exposed through the boundary trenches by means of a fluorine-based gas plasma, thereby separating the semiconductor wafer into semiconductor chips. In addition to a photolithography method for transferring a mask pattern—into which boundaries among semiconductor elements (areas among adjacent semiconductor elements) are to be etched—by means of exposure and developing the thus-exposed mask pattern, a method for cutting the resist film by means of emitting a laser beam to boundaries among semiconductor elements has been known in connection with formation of boundary trenches (Patent Document 1). Since the latter method does not need use of an expensive exposure transfer apparatus, plasma dicing can be carried out at low cost. Using a die attach film in lieu of a resist film has also been proposed (Patent Document 2).

DISCLOSURE OF THE INVENTION

Incidentally, when a die attach film is exposed to a high-temperature environment which is at a temperature of 100° C. or higher, curing reaction usually proceeds, whereupon the film does not exhibit sufficient function as a bonding agent. For this reason, affixing of a semiconductor wafer before performance of plasma dicing as described in Patent Document 2 is unrealistic. In the meantime, when an attempt is made to subject a plasma-diced semiconductor chip to bonding by means of a die attach film, a small piece of die attach film is affixed to each of the semiconductor chips after separation of the semiconductor wafer into the pieces of semiconductor chips by means of plasma dicing, and the thus-affixed small piece of the die attach film must be shaped to the size of the semiconductor chip. However, accurately shaping the small piece of the die attach film affixed to the minute semiconductor chip is extremely difficult, and difficulty has been encountered in essentially attaining both plasma dicing and bonding involving use of a die attach film.

Moreover, plasma dicing also entails a problem of contamination of a vacuum chamber for plasma processing with organic compounds which arise during a process for ashing (incineration removal) of a resist film, and measures against the problem has been the urgent necessity.

Accordingly, the present invention aims at providing a method for fabricating a semiconductor chip which enables achievement of both plasma dicing and bonding involving use of a die attach film and which enables prevention of contamination of the inside of a vacuum chamber for plasma processing.

According to the present invention, a method for fabricating a semiconductor chip, comprises: a masking step of providing as a mask, on a mask formation surface opposite a circuit pattern formation surface of a semiconductor wafer, a film layer formed from a die attach film to be fixed to the mask formation surface and a heat-resistant film to be affixed to an exterior surface of the die attach film; a boundary trench forming step of forming, in the film layer provided on the semiconductor wafer, boundary trenches for portioning semiconductor elements formed on the circuit formation pattern formation surface of the semiconductor wafer, to thus make a surface of the semiconductor wafer exposed through the boundary trenches; and a plasma etching step of etching the surface of the semiconductor wafer exposed through the boundary trenches by means of plasma of a fluorine-based gas, to thus separate the semiconductor wafer into semiconductor chips along the boundary trenches.

Additionally, a method for fabricating a semiconductor chip may includes affixing a protective film for protecting the semiconductor elements onto the circuit pattern formation surface of the semiconductor wafer before a masking step; affixing a die bonding tape to an exterior surface of the film layer after the plasma etching step; and removing the protective film from the circuit pattern formation surface of the semiconductor wafer.

Additionally, a method for fabricating a semiconductor chip may includes performance, after the plasma etching step, of processing pertaining to a adhesive strength decreasing step for decreasing adhesive strength acting between a die attach film and a heat-resistant film.

Additionally, a method for fabricating a semiconductor chip may includes performance of processing pertaining to the adhesive strength decreasing step after removal of the protective film from the circuit pattern formation surface of the semiconductor wafer.

Additionally, a method for fabricating a semiconductor chip may includes forming the heat-resistant film from a UV tape.

Additionally, a method for fabricating a semiconductor chip may includes performing formation of the boundary trenches in the film layer in the boundary trench formation step by cutting the film layer through use of a laser beam.

Additionally, a method for fabricating a semiconductor chip may includes performing, between the boundary trench formation step and the plasma etching step, processing pertaining to a boundary trench surface smoothing step for smoothing surfaces of the boundary trenches formed in the film layer by means of plasma of an oxygen gas or plasma of a gas mixture containing oxygen as a principal ingredient.

According to the present invention, a film layer formed from a die attach film to be fixed to a mask formation surface and a heat-resistant film to be affixed to an exterior surface of the die attach film is provided as a mask, on the mask formation surface opposite a circuit pattern formation surface of a semiconductor wafer, and the semiconductor wafer is subjected to plasma etching. At a point in time when plasma etching is completed, the die attach film which is essentially equal in size to the semiconductor chip remains affixed to each of the semiconductor chips. Therefore, according to the present invention, there is no necessity for affixing a small piece of a die attach film to a semiconductor chip after plasma dicing or further shaping the thus-affixed die attach film to the size of the semiconductor chip, as in the related art. After the plasma etching step, the semiconductor chip can be bonded, as it is, to a leadframe, a substrate, and the like, so long as the adhesive force acting between the die attach film and the heat-resistant film. Accordingly, both plasma dicing and bonding involving use of the die attach film4can be performed simultaneously.

The die attach film used as a mask in plasma etching is used, as it is, as an adhesive for a leadframe, a substrate, and the like, after removal of the heat-resistant film. Accordingly, a step of removal (ashing) of a resist film, which is indispensable for related-art plasma dicing, becomes unnecessary, and contamination of the inside of a vacuum chamber for plasma processing, which would otherwise be caused during the course of removal of a resist film, can be prevented.

BEST MODE FOR IMPLEMENTING THE INVENTION

An embodiment of the present invention will be described hereunder by reference to the drawings. The configuration of a laser beam machining apparatus10and a plasma processing apparatus30used in implementation of the method for fabricating a semiconductor chip of an embodiment of the present invention will first be described by reference toFIGS. 1 and 2.

InFIG. 1, the laser beam machining apparatus10includes a wafer holding section11for holding in a level position a semiconductor wafer1which is an object of processing; a moving plate12provided in a movable manner at an elevated position above the wafer holding section11; a laser emission section13and a camera14which are fixed to the moving plate12; a movement mechanism15for moving the moving plate12; a laser generation section16for causing the laser emission section13to generate a laser beam; a control section17for controlling driving of the movement mechanism15and generation of a laser beam performed by the laser generation section16; a recognition section18for recognizing the position of the semiconductor wafer1from an image captured by the camera14; and an operation-input section19for imparting an operation signal and an input signal to the control section17.

The wafer holding section11has a fixing-holding tool, such as a vacuum chuck, for fixedly holding the semiconductor wafer1on an upper surface of the wafer holding section, and the semiconductor wafer1is fixedly held with its upper surface—which is subjected to laser machining—oriented upwardly by means of the fixing-holding tool. Movement of the moving plate12is controlled by the control section17by way of the movement mechanism15, and the laser emission section13and the camera14which are fixed to the moving plate12are three-dimensionally moved above the semiconductor wafer1. The laser generation section16causes the laser emission section13to generate a laser beam13aunder control of the control section17, and the laser beam13agenerated by the laser emission section13is radiated downwardly. The camera14captures an image of the semiconductor wafer1situated at a position immediately below the camera, by means of infrared radiation. The recognition section18recognizes the position of the semiconductor wafer1from the image captured by the camera14, and transmits resultantly-obtained positional information about the semiconductor wafer1to the control section17. In accordance with the positional information about the semiconductor wafer1transmitted from the recognition section18, the control section17ascertains a positional relationship between the semiconductor wafer1and the laser emission section13, and computes a position to be irradiated with the laser beam13aemitted by the laser emission section13. The operation-input section19provides the control section17with an operation signal for the movement mechanism15, an input signal pertaining to operation of the laser emission section16, and the like.

InFIG. 2, a plasma processing apparatus30is built from a vacuum chamber31; a lower electrode32and an upper electrode33which are provided within the vacuum chamber31; a high-frequency power source section34for applying a high-frequency voltage to the lower electrode32; a cooling unit35for circulating a coolant within the lower electrode32; a gas feed channel36which extends from the inside of the upper electrode33to the outside of the vacuum chamber31and which is bifurcated outside the vacuum chamber31; an oxygen gas feed section37connected to one branch channel (hereinafter taken as a first branch channel36a) of the bifurcated gas feed channel36; a fluorine-based gas feed section38connected to the other branch channel (hereinafter taken as a second branch channel36b) of the bifurcated gas feed channel36; a first open-close valve39and a first flow rate control valve40placed at any points in the first branch channel36a; and a second open-close valve41and a second flow rate control valve42placed at any points in the second branch channel36b.

The inside of the vacuum chamber31is an enclosed space for subjecting the semiconductor wafer1to plasma processing. The lower electrode32is positioned within the vacuum chamber31in such a way that a surface of the lower electrode for holding the semiconductor wafer1is oriented upwardly, and the upper electrode33is positioned in such a way that a lower surface of the upper electrode faces the upper surface of the lower electrode32above the lower electrode32.

A wafer holding mechanism (not shown) built from a vacuum chuck, an electrostatic absorbing mechanism, and the like, and a ring-shaped frame32aformed from an electrically insulating material are provided on the upper surface of the lower electrode32. The semiconductor wafer1is supported in such a way that a surface of the wafer to be subjected to plasma processing is oriented upwardly and such that surroundings of the wafer are enclosed by the frame32a; and is fixed on the upper surface of the lower electrode32by means of the wafer holding mechanism.

An oxygen gas (a gas mixture containing oxygen as the principal ingredient may also be adopted) is sealed in the oxygen gas feed section37. When the first open-close valve39is opened (i.e., the second open-close valve41is closed), the oxygen gas is supplied to the upper electrode33by way of the first branch channel36aand the gas feed channel36. A flow rate of the oxygen gas supplied from the oxygen gas feed section37to the upper electrode38is regulated by means of adjusting the degree of opening of the first flow rate control valve40. Moreover, a fluorine-based gas; for example, sulfur hexafluoride (SF6), and the like, is sealed in the fluorine-based gas feed section38. When the second open-close value41is opened (the first open-close valve39is closed), the fluorine-based gas is supplied to the upper electrode33by way of the second branch channel36band the gas feed channel36. The flow rate of the fluorine-based gas supplied from the fluorine-based gas feed section38to the upper electrode38is regulated by means of adjusting the degree of opening of the second flow rate control valve42.

A flat-plate-like porous plate33ais provided on a lower surface of the upper electrode33. The oxygen gas and the fluorine-based gas supplied by way of the gas feed channel36are uniformly sprayed over an upper surface of the lower electrode32by way of the porous plate33a.

Next, a method for fabricating a semiconductor chip will be described by reference to descriptive flowcharts shown inFIGS. 3 to 6and a flowchart shown inFIG. 7. InFIG. 3A, a plurality of semiconductor elements2are formed on the circuit pattern formation surface1aof the semiconductor wafer1and can be separated into a plurality of semiconductor chips, so long as boundary sections among the adjacent semiconductor elements2(areas among the adjacent semiconductor elements2) are sliced.

In order to fabricate semiconductor chips from the semiconductor wafer1, a sheet-shaped protective film (e.g., an UV tape)3is affixed to the circuit pattern formation surface1aof the semiconductor wafer1(a protective film affixing step shown inFIG. 7), as shown inFIG. 3B.

As shown inFIG. 3C, after completion of processing pertaining to the protective film affixing step S1, a rear surface of the semiconductor wafer1; namely, a surface opposite to the circuit pattern formation surface1a, is abraded by use of an abrading apparatus50(a rear surface abrasion step S2shown inFIG. 7). The abrading apparatus50is built from a rotary table51on an upper surface of which the semiconductor wafer1is placed in such a way that the rear surface of the semiconductor wafer is oriented upwardly; and an abrasion head53which is disposed above the rotary table51and to a lower surface of which the abrasive cloth52is affixed. The abrasive cloth52is pushed against the rear surface of the semiconductor wafer1by means of the abrasion head53(as indicated by arrow A shown inFIG. 3C), and the abrasion head53is swayed within a horizontal plane (as indicated by arrow D shown inFIG. 3C) while the rotary table51and the abrasion head53are being rotated around the vertical axis (as indicated by arrows B and C shown inFIG. 3C). As a result, the semiconductor wafer1whose thickness is reduced to about 100 to 30 μm as a result of abrasion of the rear surface is acquired (FIG. 3D).

As shown inFIG. 4A, after completion of processing pertaining to the rear surface abrasion step S2, a film layer6formed from a die attach film4to be fixed to a mask formation surface1band the UV tape5serving as a heat-resistant film to be affixed to an exterior surface of the die attach film4is provided, on the mask formation surface1bopposite the circuit pattern formation surface1aof the semiconductor wafer1(i.e., the rear surface of the semiconductor wafer1), as a mask employed in a plasma etching step S7to be described later (a masking step S3shown inFIG. 7). In the masking step S3, the die attach film4having the UV tape5previously affixed to an exterior surface thereof may also be affixed to the semiconductor wafer1. First, only the die attach film4is affixed to the semiconductor wafer1, and subsequently the UV tape5may also be affixed to the exterior surface of the die attach film4.

The semiconductor wafer1is placed on the wafer holding section11of the laser beam machining apparatus10after completion of processing pertaining to the masking step S3. At the time, the surface of the semiconductor wafer1on which the film layer6is provided is oriented upwardly As shown inFIGS. 4B and 4C, the laser beam13ais radiated onto the boundary sections among the semiconductor elements2(i.e., the areas among the adjacent semiconductor elements2) of the film layer6, to thus cut the film layer6located in the boundary sections. Thus, the boundary trenches7partitioning the semiconductor elements2are formed in the film layer6(a boundary trench formation step S4shown inFIG. 7).

Laser machining is performed while the laser beam13ais being moved relatively to the semiconductor wafer1. Data pertaining to the positions of the boundary trenches7are stored in a work data storage section20of the laser machining apparatus10, and the control section17moves the laser emission section13in accordance with the data stored in the work data storage section20. Specifically, the control section17compares the position irradiated with the laser beam13athrough the camera14and the recognition section18with the data pertaining to the positions of the boundary trenches7stored in the work data storage section20, and the movement mechanism15is driven in such a way that the position irradiated with the laser beam13amoves along the boundary trenches7stored in the work data storage section20. Data pertaining to the width of the boundary trench7are also stored in the work data storage section20. When causing the laser beam emission section13to emit the laser beam13a, the control section17adjusts a beam size of the laser beam13aby means of changing an output of the laser emission section13, in such a way that the width of the actually-formed boundary trench7becomes slightly smaller than the width of the boundary trench7stored in the work data storage section20.

After completion of processing pertaining to the boundary trench formation step S4, the semiconductor wafer1is removed from the wafer holding section11of the laser machining apparatus10; the thus-removed semiconductor wafer is carried into the vacuum chamber31of the plasma processing apparatus30; and the semiconductor wafer1is fixed onto the upper surface of the lower electrode32(a wafer carrying-in step S5shown inFIG. 7). At the time, the surface of the semiconductor wafer1on which the film layer6is provided is oriented upwardly.

In the stage, the laser-processed surfaces of the boundary trenches7assume an acutely-serrated, irregular shape. The term “surfaces of the boundary trenches7” mean two mutually-opposing cut surfaces6aof the film layer6generated as a result of cutting of the film layer6by means of the laser beam13aand the surface1cof the semiconductor wafer1exposed through the boundary trenches7and between the two cut surfaces6a(see a partially-enlarged view inFIG. 4C). The reason why the surfaces of the boundary trenches7assume a serrated irregular shape is because irregular portions6barise in the cut surfaces6aas a result of the film layer6being cut by means of a pulsating laser beam13a; because residues6cof the film layer6splashed around during cutting of the film layer6adhere to the surfaces of the boundary trenches7; and the like (FIG. 8A).

When plasma etching is immediately performed in the state, cut side surfaces of the semiconductor chips also become serrated, and stress concentration is likely to arise. Therefore, when the semiconductor wafer1is carried into the vacuum chamber31, the surfaces of the boundary grooves7given an irregular shape in the boundary groove formation step S4are smoothed by means of a plasma of an oxygen gas generated in the vacuum chamber31before plasma etching is performed (a boundary groove surface smoothing step S6shown inFIG. 7).

In the boundary trench surface smoothing step S6, the first open-close valve39is first opened while the second open-close valve41of the plasma processing apparatus30is closed, and an oxygen gas is supplied from the oxygen gas feed section37to the upper electrode33. As a result, an oxygen gas is sprayed, from the upper electrode33, over the upper surface of the semiconductor wafer1by way of the porous plate33a. The high-frequency power source section34is driven in the state, to thus apply a high-frequency voltage to the lower electrode32, whereupon plasma Po of the oxygen gas develops between the lower electrode32and the upper electrode33(FIG. 5A). The plasma Po of the oxygen gas is an organic substance and, hence, incinerates the film layer6(the UV tape5and the die attach film4), and hence the surface of the boundary trenches7are smoothed (FIGS. 5B and 8B).

Specifically, the surfaces of the boundary trenches7are smoothed by means of: removing the irregular portions6b(the two mutually-opposing cut surfaces6aof the film layer6) from the surfaces of the boundary trenches7by means of the plasma Po of the oxygen gas (or a gas mixture containing an oxygen gas as the principal ingredient); removing the residues6cof the film layer6adhering to the surfaces of the boundary grooves7; and making the irregular portions6b(the tow mutually-opposing cut surfaces6a) of the surfaces of the boundary trenches7uniform, to thus increase a period between irregularities of the irregular portions6b(seeFIG. 8B). During a period in which the surfaces of the boundary trenches7are smoothed by means of the plasma of the oxygen gas, the cooling unit35is driven to circulate the coolant within the lower electrode32, thereby preventing an increase in the temperature of the semiconductor wafer1, which would otherwise be caused by the heat of the plasma.

The longer a period of time during which the film layer6is exposed to the plasma Po of the oxygen gas, the faster a progress in incineration of the film layer6. However, a period of time during which the film layer6is exposed to the plasma Po of the oxygen gas in the boundary trench surface smoothing step S6is set to a minimum period of time required to smooth the surfaces of the boundary trenches7of the film layer6. As an index of an exposure time, a period of time during which the exterior surface of the film layer6(i.e., the UV tape5) is removed by an amount of the order of 1 to 3 μm is preferable.

After completion of processing pertaining to the boundary trench surface smoothing step S6, there is performed plasma etching for separating the semiconductor wafer1into semiconductor chips along the boundary trenches7by means of the plasma of a fluorine-based gas (a plasma etching step S7shown inFIG. 7). At this time, the film layer6provided on the semiconductor wafer1acts as a mask.

In the plasma etching step S7, the second open-close valve41is opened while the first open-close valve39remains switched from the OPEN position to the CLOSE position, thereby supplying the fluorine-based gas from the fluorine-based bas feed section38to the upper electrode33. As a result, the fluorine-based gas is sprayed from the upper electrode33over the upper surface of the semiconductor wafer1by way of the porous plate33a. When the high-frequency power source section34is driven in the state, to thus apply a high-frequency voltage to the lower electrode32, plasma Pf of the fluorine-based gas develops between the lower electrode32and the upper electrode33(FIG. 5C).

Since the thus-developed plasma Pf of the fluorine-based gas etches the surface1cof the semiconductor wafer1that is exposed through the boundary trenches7and is made of silicon, the semiconductor wafer1is sliced along the boundary trenches7by one operation, whereupon a plurality of semiconductor chips1′ are generated (FIG. 5D). In the middle of the surface1cof the semiconductor wafer1being etched by the plasma Pf of the fluorine-based gas, the cooling unit35is driven to circulate the coolant within the lower electrode32, thereby preventing an increase in the temperature of the semiconductor wafer1, which would otherwise be caused by the heat of the plasma.

Since the surfaces of the boundary trenches7have already been smoothed in the preceding step (the boundary trench surface smoothing step S6), the cut surfaces of the semiconductor wafer1formed by means of plasma etching; namely, the side surfaces of the semiconductor chips1′, become flat. Further, since plasma etching proceeds from the boundary trenches7that are taken as the starting points, each of the sliced semiconductor chips1′ becomes essentially equal in size to the die attach film4affixed to each semiconductor chip1′.

After completion of processing pertaining to the plasma etching step S7, the semiconductor wafer1(i.e., the sliced semiconductor chips1′ remain connected together by means of the protective film3) is carried out of the vacuum chamber31(a wafer carrying-out step S8shown inFIG. 7). After carrying out of the semiconductor wafer1from the vacuum chamber31, the semiconductor wafer1is positioned in such a way that the side of the wafer to which the protective film3is affixed faces upward, as shown inFIG. 6A, and a die bonding tape8is affixed to the UV tape5on the lower surface of the wafer (a bonding tape affixing step S9shown inFIG. 7).

After completion of processing pertaining to the bonding tape affixing step S9, the protective film3affixed to the circuit pattern formation surface1aof the semiconductor wafer1is removed by pulling, as shown inFIG. 6B(a protective film removal step S10shown inFIG. 7). As a result, the die attach film4that is essentially equal in size to the semiconductor chip1′ is provided on a lower surface of each semiconductor chips1′ (i.e., the rear surface of the semiconductor wafer1). By virtue of the adhesive strength acting between the die attach film4and the UV tape5and the adhesive strength acting between the UV tape5and the die bonding tape8, the semiconductor chip1′ is held on the upper surface of the die bonding tape8by way of the die attach film4.

After completion of processing pertaining to the protective film removal step S10, the adhesive strength acting between the die attach film4and the heat-resistant film (the UV tape5) is decreased (an adhesive strength decreasing step S11). Processing for decreasing the adhesive strength acting between the die attach film4and the heat-resistant film in the adhesive strength decreasing step S11is performed by means of exposure of the UV tape5to UV radiation when the heat-resistant film is the UV tape5as described in connection with the present embodiment (FIG. 6C). The adhesive strength of the UV tape5acting on the die attach film4is weakened in the adhesive strength decreasing step S11, and the respective semiconductor chips1′ having the die attach films4provided on the lower surfaces thereof can be readily detached from the die bonding tape8. The semiconductor chips1′ —which have the die attach films4and which can have become detached from the die bonding tape8as mentioned above—are picked up by an unillustrated pickup mechanism and bonded to a leadframe, a substrate, and the like.

As mentioned above, under the method for fabricating a semiconductor chip of the present embodiment, the film layer6formed from the die attach film4to be fixed to the mask formation surface1band the UV tape5serving as a heat-resistant film to be affixed to the exterior surface of the die attach film4is provided as a mask, on the mask formation surface1bopposite the circuit pattern formation surface1aof the semiconductor wafer1; and the semiconductor wafer1is subjected to plasma etching. At a point in time when processing pertaining to the plasma etching step S7is completed, the die attach film4which is essentially equal in size to the semiconductor chip1′ remains affixed to each of the semiconductor chips1′. Therefore, according to the method for fabricating a semiconductor chip of the present embodiment, there is no necessity for affixing a small piece of a die attach film to a semiconductor chip after plasma dicing or further shaping the thus-affixed die attach film to the size of the semiconductor chip, as in the related art. After the plasma etching step S7, the semiconductor chip can be bonded, as it is, to a leadframe, a substrate, and the like, so long as the adhesive force acting between the die attach film4and the UV tape5. Accordingly, both plasma dicing and bonding involving use of the die attach film4can be performed simultaneously.

The die attach film4used as a mask in the plasma etching step S7is used, as it is, as an adhesive for a leadframe, a substrate, and the like, after removal of the heat-resistant film (the UV tape5). Accordingly, a step of removal (ashing) of a resist film, which is indispensable for related-art plasma dicing, becomes unnecessary, and contamination of the inside of the vacuum chamber31for plasma processing, which would otherwise be caused during the course of removal of a resist film, can be prevented.

The method for fabricating a semiconductor chip of the present embodiment is chiefly characterized in that the UV tape5is used while the die attach film4bonded to the exterior surface is taken as mask.

Since the die attach film4is generally vulnerable to heat and does not exhibit sufficient function as a bonding agent upon exposure to a temperature environment of 80° or higher, use of the die attach film as a mask for plasma etching practiced in a high-temperature environment is usually not conceived. However, the inventors of the present patent application found that the temperature of the die attach film4could be held at a temperature which is equal to or lower than 80° C. even during plasma etching which is performed in a high-temperature environment, so long as the exterior surface of the die attach film4affixed to the semiconductor wafer1is sheathed with a heat-resistant film (the UV tape5that is an example), and finally completed the present invention. The die attach film4can be prevented from coming to a high temperature of 80° C. or more, by means of sheathing the die attach film4with the UV tape5. However, so long as the semiconductor wafer1is cooled by means of the cooling unit35as described in connection with the present embodiment, an increase in the temperature of the die attach film4can be prevented more reliably.

As in the case of the method for fabricating a semiconductor chip of the present embodiment, so long as the protective film3for protecting the semiconductor elements2is affixed to the circuit pattern formation surface1aof the semiconductor wafer1before the masking step S3; the die bonding tape8is affixed to the exterior surface of the film layer6after the plasma etching step S7; and the protective film3is removed from the circuit pattern formation surface1aof the semiconductor wafer1, the semiconductor elements2fabricated on the circuit pattern formation surface1acan be protected more reliably by means of the protective film3. Further, even after removal of the protective film3, the semiconductor chips1′ can be collectively handled by means of the die bonding tape8. Accordingly, the semiconductor chips1′ can be readily handled after dicing.

Further, in the related art, when a semiconductor chip is die-bonded to a leadframe, a substrate, and the like, an adhesive for die-bonding purpose (corresponding to the die attach film4of the present embodiment) becomes fluidized and creeps up to an upper surface along side surfaces of the semiconductor chip, which in turn raises a problem of a nozzle of an electronic component mounting apparatus for picking up a semiconductor chip being stained (the problem has become noticeable in conjunction with slimming-down of a semiconductor chip). Under the method for fabricating a semiconductor chip of the present embodiment, a periphery of the die attach film4is exposed directly to a laser beam or plasma. Therefore, a curing reaction proceeds faster in the periphery than in the center, and the periphery becomes cured harder than in the center section. For these reasons, creeping-up of the adhesive resulting from excessive fluidization during die bonding is prevented, and the problems of the related art can be solved.

The preferred embodiment of the present invention has been described thus far, but the present invention is not limited to the previously-described embodiment. For instance, in the previous embodiment, the film layer6is cut by means of the laser beam13a, to thus create the boundary trenches7. There may also be adopted a method for cutting the film layer6by means of a disc-shaped blade which rotates at high speed. However, under the method, as the number of boundary trenches increase, productivity is deteriorated when compared with a case where the laser beam13ais utilized. Accordingly, utilization of the laser beam13aas described in connection with the embodiment is preferable.

So long as the film layer6(i.e., the die attach film4and the heat-resistant film) can be formed from a photosensitive material, the boundary trenches7can also be formed even by means of a photolithographic method under which a mask pattern—in which boundary areas among the semiconductor elements2(i.e., the areas among the adjacent semiconductor elements2) are etched—is transferred onto a resist film through exposure and developed. However, from the viewpoint of obviation of a necessity for an expensive exposure apparatus, the laser machining method described in connection with the previous embodiment can be said to be preferable. In the case of laser machining, the surfaces of the boundary trenches7assume an irregular shape which is serrated at acute angles, as mentioned previously. Accordingly, processing pertaining to the boundary trench surface smoothing step S6for smoothing the surfaces of the boundary trenches7formed in the film layer6by means of a plasma of an oxygen gas or a plasma of a gas mixture containing oxygen as the principal ingredient is preferably practiced between the boundary trench formation step S4and the plasma etching step S7.

In the previous embodiment, a UV tape is used as a heat-resistant film to be affixed to an exterior surface of the die attach film4. However, the reason for the is that the UV tape has a characteristic of ability to sufficiently endure plasma of a fluorine-based gas in a high-temperature environment during plasma etching and to readily reduce the adhesive strength acting between the die attach film4and the UV tape by means of a simple method, such as exposure to UV radiation. Consequently, a tape other than the UV tape can also be used as a heat-resistant film, so long as the tape has the same property as that of the UV tape5and is formed by combination of a base material formed from a material which can endure plasma of a fluorine-based gas in a high-temperature environment; for example, a polyolefin-based resin, a polyimide-based resin, and the like, and an adhesive whose adhesive strength is decreased by a simple method, such as exposure of an UV tape to UV radiation.

So long as the adhesive for bonding the die bonding tape8to the film layer6is formed from a UV curable material, the adhesive strength acting between the die bonding tape8and the film layer6can be increased by means of exposure to UV radiation. Hence, when the protective film3is removed in the protective film removal step S10, detachment of the semiconductor chips1′ from the die bonding tape8can be prevented.

In the foregoing embodiment, processing pertaining to the adhesive strength decreasing step S11is performed after the protective film removal step S10. However, processing pertaining to the adhesive strength decreasing step S11does not necessarily follow the protective film removal step S10, so long as the semiconductor wafer1has already been sliced into the respective semiconductor chips1′. When processing pertaining to the adhesive strength decreasing step S11is practiced before the protective film removal step S10, there is a potential of the semiconductor chips1′ becoming detached from the die bonding tape8at the time of removal of the protective film3from the circuit pattern formation surface1aof the semiconductor wafer1. Processing pertaining to the adhesive strength decreasing step S11is performed, to the extent possible, after the protective film removal step S10.

Both plasma dicing and bonding involving use of a die attach film can be performed, and contamination of the inside of the vacuum chamber can also be prevented.