Display system and method supporting variable input rate and resolution

A display system includes a pixel array, a data buffer and a display driver. In a particular embodiment the data buffer receives and stores frames of image data and provides the frames of image data to the pixel array. The display driver overwrites an entire frame of image data on the data buffer during some frame times and selectively overwrites a portion of a frame of image data, leaving another portion of the frame of image data in the data buffer, during other frame times.

BACKGROUND OF THE INVENTION

Field of the Invention

This invention relates generally to digital video displays, and more particularly to digital video displays with decreased processing requirements.

Description of the Background Art

Digital video displays are known. These displays generally include a pixel array, a data buffer, and a display driver. The display driver processes incoming image data and writes the image data into the data buffer, which then asserts the image data onto the pixel array in order to create digital images. Typically, each pixel of a single frame of video data is specified by a 24-bit data word. Therefore, high resolution displays, (i.e. 2560×1440) require that tens of millions of bits be written to the data buffer in a sixtieth of a second. While this rate is achievable, the processing power required to write large numbers of data bits into a data buffer every second is significant.

What is needed, therefore, is a digital display that reduces the required processing of video data. What is also needed is a digital display that requires less power. What is also needed is a digital display that can accept video data at a variable input rate.

SUMMARY

The inventors have observed that, often times, video data will include consecutive frames that have very similar content. For example, during a video, the background might not change, even though the foreground does. In these instances digital displays repeatedly write the same pixel data to the data buffer, wasting processing resources and data transfer bandwidth.

The present invention overcomes the problems associated with the prior art by providing a display system that selectively overwrites portions of previously stored frames of image data in a data buffer with new image data as needed. The display system facilitates updating groups of pixels associated with regions of an image that have changed compared to the previous frame, without updating the entire image. The display system determines the region(s) of changed pixels based on information encoded in the image data corresponding to the new frame. The invention facilitates displaying video data while substantially reducing the required processing power by, for example, only overwriting a portion of the image data (e.g., a window in the image) in the data buffer. Another aspect of the invention is a method of displaying image data, that includes selectively overwriting only a portion of a previously displayed frame of image data, based on differences between a new frame and the previously displayed frame.

An example embodiment includes a pixel array, a data buffer, and a display driver. The data buffer is electrically coupled to receive and store image data. The data buffer is also operative to provide the image data to the pixel array and includes a first portion configured to store a complete frame of data. The display driver is electrically coupled to provide the image data and control signals to the data buffer and includes a controller. The controller is operative to write a first frame of image data to the first portion of the data buffer and cause the first frame of image data to be asserted on pixels of the array during a first frame time. The controller is also operative to write new image data over a first portion of the first frame of image data in the first portion of the data buffer, leave a second portion of the first frame of image data in the first portion of the data buffer, and cause the new image data and the second portion of the first frame of image data to be asserted on the pixels of the array during a same subsequent frame time.

In another example embodiment, the display driver is configured to receive data indicative of a location of the first portion of image data in the first portion of the frame buffer and writes the new image data to the location. In a particular example embodiment, the first frame of image data corresponds to an image to be displayed on the pixel array, and the location corresponds to a rectangular portion of the image. In another particular example embodiment, the display driver is configured to write new image data over the entirety of the first frame of image data, if the data indicative of the location of the first portion of image data in the first portion of the data buffer is equal to one of a set of predefined values (e.g. zero).

In another example embodiment, the display driver provides synchronization signals to a source of the image data, each of the synchronization signals indicating the beginning of a time period when at least a portion of a next frame of image data can be sent. In a particular example embodiment, the display driver provides consecutive ones of the synchronization signals periodically, and the period of the synchronization signals corresponds to an amount of time required to assert a full frame of image data onto the pixel array.

In yet another example embodiment, the display driver is operative to write a row of the new image data to a first row register and copy a corresponding row of image data from the data buffer into a second row register. The display driver is also operative to selectively overwrite one or more portions of the corresponding row of image data in the second row register with one or more portions of the row of the new image data in the first row register to create a row of updated image data in the second row register. Additionally, the display driver is operative to overwrite the corresponding row of image data in the data buffer with the row of updated image data from the second row register.

In a more particular example embodiment, the display driver further includes a mask register operative to receive a row of mask values from the controller. Each mask value corresponds to an associated image data value in the first row register and an associated image data value in the second row register. Responsive to a first mask value, the associated image data value in the second row register is overwritten by the associated image data value in the first row register. Responsive to a second mask value, the associated image data value in the second row register is not overwritten by the associated image data value in the first row register.

In another example embodiment, the display driver receives new data in a first format and converts the new data to a second format, creating the new image data.

In yet another example embodiment, the data buffer includes a second portion configured to store an additional complete frame of image data. The controller is operative to write a second frame of image data to the second portion of the data buffer, and cause the second frame of image data to be asserted on the pixels of the display during an intermediate frame time between the first frame time and the subsequent frame time. Additionally, the controller is operative to write additional new image data over a first portion of the second frame of image data in the second portion of the data buffer, leave a second portion of the second frame of image data in the second portion of the data buffer, and cause the additional new image data and the second portion of the second frame of image data to be asserted on the pixels of the display during a same fourth frame time after the subsequent frame time.

An example method for writing image data to a display is also described. The method includes writing a first frame of image data to a frame buffer and causing the first frame of image data to be asserted on pixels of the display during a frame time. The method also includes writing new image data over a first portion of the first frame of image data in the frame buffer, leaving a second portion of the first frame of image data in the frame buffer, and causing the new image data and the second portion of the first frame of image data to be asserted on the pixels of the display during a same subsequent frame time. In a particular method, the step of writing new image data over a first portion of the first frame of image data includes receiving data indicative of a location of the first portion of data in the frame buffer and writing the new data to the location. In a more particular method, the first frame of image data corresponds to an image to be displayed on the display, and the location corresponds to a rectangular portion of the image. In another more particular method, the step of writing new image data over a first portion of the first frame of image data in the frame buffer includes writing new image data over the entirety of the first frame of image data, if the data indicative of the location of the first portion of image data in the frame buffer is equal to one of a set of predefined values (e.g. zero).

Another example method includes providing synchronization signals to a source of the image data, each of the synchronization signals indicating the beginning of a time period when at least a portion of a next frame of image data can be provided to the display driver circuit. In a more particular method, the step of providing synchronization signals to the source of the image data further includes providing consecutive ones of the synchronization signals periodically, the period of the synchronization signals corresponding to an amount of time required to assert a full frame of the image data onto the pixel array.

Yet another example method includes writing a row of the new image data to a first row register and copying a corresponding row of image data from the frame buffer into a second row register. The method also includes selectively overwriting one or more portions of the corresponding row of image data with one or more portions of the row of the new image data in the first row register to create a row of updated image data in the second row register and overwriting the corresponding row of image data in the frame buffer with the row of updated image data. In a particular example method, the step of selectively overwriting one or more portions of the corresponding row of image data with one or more portions of the row of the new image data includes generating a row of mask values and selectively overwriting the one or more portions of the corresponding row of image data based on the row of mask values.

In another example method, the step of writing new image data over a first portion of the first frame of data in the frame buffer includes receiving new data in a first format and converting the new data to a second format, to create the new image data.

In another example method, the step of writing a first frame of image data to a frame buffer includes writing the first frame of image data to a first portion of the frame buffer. The method also includes writing a second frame of image data to a second portion of the frame buffer and causing the second frame of image data to be asserted on pixels of the display during an intermediate frame time between the first frame time and the subsequent frame time.

Additionally, the method includes writing additional new image data over a first portion of the second frame of image data in the second portion of the frame buffer, leaving a second portion of the second frame of image data in the frame buffer, and causing the additional new image data and the second portion of the second frame of image data to be asserted on the pixels of the display during a fourth frame time after the subsequent frame time.

Another example display system includes a pixel array, a data buffer electrically coupled to receive and store frames of image data, and a display driver electrically coupled to provide the image data and control signals to the data buffer. The data buffer is operative to provide the image data to the pixel array and is configured to store at least one complete frame of data. The display driver is operative to write a complete frame of image data to the data buffer during some frame times. The system additionally includes a means for overwriting selected portions of prior frames of image data in the data buffer with new image data and leaving other portions of the prior frames of image data in the data buffer during other frame times.

DETAILED DESCRIPTION

The present invention overcomes the problems associated with the prior art, by providing a display system and method of implementation that reduces processing requirements by selectively overwriting frames of image data in the data buffer. In the following description, numerous specific details are set forth (e.g., buffer configuration, data format, etc.) in order to provide a thorough understanding of the invention. Those skilled in the art will recognize, however, that the invention may be practiced apart from these specific details. In other instances, details of well-known digital display practices (e.g., routine optimization, data planarization, etc.) and components have been omitted, so as not to unnecessarily obscure the present invention.

FIG. 1shows a display system100, including a host102, a display104, and peripheral sensors106(e.g., image sensors). Host102includes image data stored therein, which it can alter based at least in part on data received from peripheral sensors106, via a data bus108. Additionally, host102provides control signals to peripheral sensors106, via a control bus110, allowing host102to affect the functionality of peripheral sensors106. Host102also provides image data to display104, via a data bus112. The image data is organized into frames, which display104displays one at a time. Display104asserts a periodic sync signal on a sync bus114, defining a temporal window during which host102can send a next frame of image data display104.

In alternate embodiments, host102can be any type of device (e.g. a cell phone, an electronic tablet, a computer, etc.). Host102can also have display104and peripheral devices106embodied therein and can include any number of additional devices (e.g. microphones, image sensors, accelerometers, etc.). Because of the additional devices embodied therein, host102could serve any number of functions concurrently and or in concert with the display functions described in this disclosure.

Additionally, image data can be received from an external data source, via a wired connection (e.g. a universal serial bus (USB)) or a wireless connection (e.g. Bluetooth®). In such an embodiment, host102would alter the image data as needed based on data received from peripheral sensors106and/or meta data within the image data stream.

FIG. 2shows display104, including a mobile industry processor interface (MIPI)200, a video extractor202, a line buffer204, a frame register206, a frame buffer208, a pixel array210, a light source212, a sequencer214, and a controller216. MIPI200receives image data from host102(FIG. 1), via data bus112. Host102sends image data in a format (e.g. MIPI format) that is readily received by MIPI200, but must be converted before being displayed. MIPI200converts the image data from the received format into a format (e.g. RGB data) that can be displayed by display104, and sends the converted image data to video extractor202, via a data bus218. In alternate embodiments MIPI200could be replaced by any appropriate wired or wireless interface, including, but not limited to, a high-definition multimedia interface (HDMI), a serial digital interface (SDI), a mobile high-definition link (MHL) or a Wireless Display interface (WiDi).

Video extractor202receives the data and extracts information about the corresponding image from it. The information extracted is included in the data as a first line that is not intended to be displayed. This first line of data includes information that determines whether the image data includes an entire frame or only a portion of a frame f image data. It also indicates where in frame buffer208the corresponding image data should be written. After parsing this information from the image data, video extractor202sends the remaining image data (at least a portion of which will be displayed) to line buffer204, via a data bus220, and provides control signals, via a control bus222, to controller216. These control signals are generated based on the information in the first line of data and are used by controller216to coordinate the function of other components of display104, as will be described in greater detail below.

Line buffer204receives image data from video extractor202, and reorganizes the image data for transfer to frame register206, on a row-by-row basis. Frame register206receives the image data one row (or portion of a row) at a time, via a data bus224, and writes each row (or portion of a row) to frame buffer208, via a data bus226. If the image data being written to frame buffer208includes only a portion of a frame of image data, frame register206facilitates overwriting only selective portions of the previously written frame, as will be described in greater detail with reference toFIG. 8.

Frame buffer208is a typical dual frame buffer, which can hold two entire frames of image data at any one time. Every other frame is written to a first portion, denoted by “A” or a second portion, denoted by “B”. Based at least in part on the differences between the new image data and the old image data, the old frame of data will not be overwritten, be partially overwritten, or be completely overwritten by new image data. For example, if a scene changes completely, frame register206will overwrite the entirety of the next two frames of image data in frame buffer208. Alternatively, if only the foreground changes, frame register206will only overwrite the portion(s) of the upcoming frames that includes the changes. If the picture is static and there is no difference between the next frames and the previous frames, frame register206will not overwrite any of the data of the previous frame.

Frame buffer208writes each frame of image data to pixel array210, via a data bus228. When a frame of image data is being asserted on pixel array210, light source212illuminates pixel array210to generate an imaging beam infused with an image corresponding to the asserted image data. The imaging beam reflects off the pixel array, or is transmitted through it, and impinges on, for example, a screen (not shown), optics (not shown), or the eye(s) of a user.

In the example embodiment, pixel array210is a reflective liquid crystal on silicon (LCOS) display panel and light source212is an RGB light source. In alternate embodiments pixel array210could be replaced, for example, a transmissive liquid crystal display panel, a light emitting diode (LED) display panel, or any other type of spatial light modulator.

Sequencer214coordinates the sequencing of data transfer between frame buffer208and pixel array210, by providing control signals, via a control bus230, to controller216. The control signals (e.g., a series of row addresses) provide information to controller216, which are used to coordinate the writing of image data from frame buffer208to pixel array210and to control light source212in coordination with the image data being asserted on pixel array210.

Sequencer214also sends a periodic sync signal, via sync bus114, to host102. The sync signal defines a temporal window, during which host102can send a new frame (or portion of a frame) of video data to MIPI200via data bus112. Typically, sixty frames are displayed every second, so one-sixtieth of a second is a reasonable period for the sync signal. For display104to maintain the 60 fps refresh rate, host102must send a new frame or all of the secondary windows (portions of a frame) corresponding to a new frame between consecutive sync signals. If the amount of new data for a given frame is significantly smaller than an entire frame, host102can send all the new data with time to spare. During the extra time, host102can allocate processing resources to other operations and can resume transfer of video data after the next sync signal is received.

Controller216coordinates the function of display104, including the transfer of image data from frame register206to frame buffer208, the transfer of data from frame buffer208to pixel array210, and the illumination of pixel array210by light source212. Controller216receives control instructions from video extractor202, which are indicative of the size and location of new frames of image data and are used to direct the overwriting of previous frames (or portions of frames) of image data by frame register206.

Based on the control instructions from video extractor202, controller216provides control signals to frame register206, via control bus232, and to frame buffer208, via control bus234, to control the transfer of video data from frame register206to frame buffer208and also from frame buffer208to frame register206, as needed to facilitate a read-modified-write process. For example, to transfer a row of image data from frame buffer208to frame register206, controller216provides a row read signal to frame register206and a row address and an output enable signal to frame buffer208, causing frame buffer208to transfer a specified row of image data to frame register206. To transfer a row of image data from frame register206to frame buffer208, controller216provides a row output enable signal to frame register206and a row address and a read signal to frame buffer208, causing frame register206to overwrite the data in the row for frame buffer208corresponding to the provided row address.

Sequencer214provides a series of control signals to controller216, via control bus230, which determine the sequence of the data transfer and light source control operations described above. For example, the control signals from sequencer214can include a series of row addresses and a frame buffer identifier. The row addresses correspond to the rows of pixel array210and frame buffer208, and the frame buffer identifier indicates which portion (A or B) of frame buffer208is being written to or read from. Alternatively, the control signals from sequencer214can include a simple count value that progresses from an initial value to a final value, and then continually repeats to process each subsequent frame of video data. These non-limiting examples are provided for illustrative purposes and are not exclusive.

FIG. 3is a diagram illustrating the relationship between frames of data to be displayed and frames (or portions of frames) of data being written to the data buffer. A sequence300of displayed images is labeled to associate each image with the partition of frame buffer208in which the data corresponding to the image is stored. A second sequence302of windows is also labeled, to associate each image with a partition of frame buffer208, and illustrates the sequence of writing/updating the data to/in data buffer208. Time indices (t1, t2, . . . ) are added to show relative timing between writing data to data buffer208and displaying the data on pixel array210.

Initially, starting at time t1, an entire first frame of video data304, corresponding to the first displayed image306, is written into Buffer A of frame buffer208. Then, starting at time t2, a second entire frame of video data308, corresponding to a second displayed image310, is written into Buffer B of frame buffer208. Also starting at t2, the data in Buffer A is displayed on pixel array210as first image306. Next, starting at time t3, a portion of data in Buffer A is overwritten with a window of new data312. The rest of the first frame of data304remains in buffer A. Also starting at time t3, the data in Buffer B is displayed on pixel array210as second image310. Then, starting at time t4, a portion of data in Buffer B is overwritten with a window of new data316. The rest of the second frame of data308remains in buffer B. Also starting at time t4, the data in Buffer A, which includes updated window312and the remaining portion of first frame data304, is displayed on pixel array210as a third image314. Starting at time t5, the data in Buffer B, which includes updated window316and the remaining portion of second frame data310, is displayed on pixel array210as a fourth image318.

Also starting at time t5, new data (either a complete frame or a portion of a frame) can be written into Buffer A and subsequently displayed. If there is no new incoming data during subsequent frame times, then the data remaining in Buffer A and Buffer B will be repeatedly displayed on pixel array210, until new data is received.

In the foregoing example, it is assumed that Buffer A and Buffer B start out either empty or with data corresponding to an unrelated image. Therefore, the first two of frames of data304and308include an entire frame of image data corresponding to complete images306and310. For the subsequent frames, the image only changes slightly, and so most of the required image data is already in Frame Buffer A and Frame Buffer B. Therefore, only the small window portions312and316need to be updated. Portion312corresponds to the image of the car and its immediate background. Frame register206(FIG. 2) writes only the data portion312to Frame Buffer A, which places the car where it belongs in displayed image314. Data portion316corresponds to the image of the background where the car was located in the previous frame. Frame register206writes only data portion316to Frame Buffer B, which removes the car from displayed image318. By overwriting only the small portions of the frame that are necessary for displaying the proper images, display system100saves substantial processing power and data transfer bandwidth that would otherwise be wasted continually rewriting/transferring old image data.

FIG. 4shows pixel array210, including a plurality of pixels, each labeled with indices “i, j”, where “i” corresponds to the vertical location of a given pixel and “j” corresponds to the horizontal position of a given pixel. For example, a pixel in the 400throw and the 800thcolumn would be labeled “399, 799” (the pixel in the first row and the first column is denoted “0, 0”). Two secondary windows400and402are shown in separate locations on pixel array210. Each of secondary windows400and402are defined by size and location. The location is specified by vertical and horizontal offsets (e.g., the top-most row and left-most column of the window), and the size is specified by vertical and horizontal dimensions (e.g., the height and width of the window). The offset of window400is denoted by “k, m”, where k is the top-most row and m is the left-most column of window400. The dimensions of window400can then be defined by specifying pixel “1, n”, which is located in the bottom-most row and right-most column of window400. The height (in rows) of window400is (l−k+1), and width (in columns) of window400is (n−m+1). By including these values (k, m and l, n) in the image data, video extractor202is able to communicate to controller216exactly where old image data in data buffer208should be overwritten by new image data.

Multiple windows of various sizes and shapes can be written over the same frame of image data. As an example, two secondary windows can be written when a moving object to be displayed must be written in a new location and removed from an old location. Multiple moving objects (or other changes in the displayed image) might require multiple sets of secondary windows. The number of secondary windows that can be written over a given frame is only limited by whether or not it is more efficient to write the entire frame rather than all the corresponding secondary windows.

FIG. 5shows an example embodiment of controller216, including a video extractor interface500, a frame register control502, a frame buffer control504, a pixel array control506, a light source control508, a sequencer interface510, non-volatile data storage512, one or more processing unit(s)514, and a working memory516. The components of controller216communicate with one another via a system bus518, which is interconnected between the components of controller216.

Non-volatile data storage512stores data and code and retains the data and code even when controller216is powered down. Working memory516provides temporary storage for data and code. Processing unit(s)514impart(s) functionality to the components of controller216by executing code stored in non-volatile data storage512and/or working memory516. Some functionality of controller216is represented by data and code modules shown within working memory516. The data and code modules can be transferred (in whole or in part) into and out of working memory516from non-volatile data storage512, as determined by the execution of code by processing unit(s)514. Although the example embodiment of controller216has characteristics of a general purpose computer, the functionality of controller216can be implemented with any combination of hardware, software, firmware, and/or computer-readable media.

Video extractor interface500facilitates communication between video extractor202and controller216by, for example, receiving control data from video extractor202, which can include data indicative of the size and location of windows of data to be written to frame buffer208. Frame register control502asserts control signals onto control bus232, to facilitate the transfer of image data from line buffer204into frame register206. Frame buffer control504asserts control signals onto control bus234, to facilitate the transfer of image data from frame register206into frame buffer208. Pixel array control506asserts control signals onto control bus236, to facilitate the transfer of image data from frame buffer208into pixel array210. Light source control508asserts control signals onto control bus238to switch light source212between on and off states. Sequencer interface510receives the series of control signals generated by sequencer214(e.g., a timing sequence), and communicates the control signals to relevant components of controller216.

Working memory516includes a control module520, a data buffer522, a communication module524, a display driver module526, and a masking driver module528. Control module520is a higher level program that provides overall coordination and control of the other functional aspects of controller216. Data buffer522temporarily stores data to be utilized by the other components of controller216. Communication module524facilitates communication with external devices to receive code/control instructions. Display driver module526coordinates the operation of frame buffer control504, pixel array control506, and light source control508, based at least in part on the control signal received from sequencer214via sequencer interface510, to facilitate the display of images by display104. Masking driver module528coordinates the operation of frame register control502and frame buffer control504, based at least in part on control data received from video extractor202, via video extractor interface500, to facilitate the selective overwrite of previous image data in frame buffer208by frame register206.

FIG. 6illustrates the flow of data from MIPI200, through video extractor202, to line buffer204, and the provision of control data to controller216. Data received from MIPI200includes control data and image data. In this example embodiment, the control data is included in the data from MIPI200as a “row” of control data (e.g., “Row 0”). The image data is provided as a subsequent plurality of rows of image data: “Row 1, Row 2 . . . Row N”. The control data includes information that describes the image data it precedes. For example, the control data indicates whether the image data corresponds to an entire frame or a secondary window and, in the case of a secondary window, the size and location of the secondary window with respect to pixel array210. The image data includes new image data that will be written over at least a portion of a previous frame of image data in frame buffer208. Video extractor202parses the incoming data and provides the rows of image data to line buffer204and provides the row of control data to controller216.

FIG. 7shows two example rows (Row Os) of control data as they are received by video extractor202. The first example row702of control data indicates that an entire frame of image data will follow. Because there is no secondary window to define, the values of the first row of control data are all set to zero. The entire row of zeros indicates that the rows of image data to follow will constitute an entire frame of image data.

The second example row704of control data indicates that only a portion (e.g., one or more windows) of a frame of image data will follow. Second row704of control data includes a predetermined sequence of bits, which defines the windows to be updated by the data that follows and the color format of the data. In this example, the control data is divided into five groups of bits: group A, group B, group C, group D, and group E.

Group A indicates the color format of the new data to follow. For example, the new data might be for a single color field (e.g., 8-bit red, green, or blue), which would be represented by a particular bit sequence. Alternatively, the new data might include multi-color data (e.g., 24-bit RGB data), which would be represented by a different bit sequence. If the bits of group A are all set to zero, then a default color format is indicated

Although group A is shown to include more than 6 bits, in a particularly simple embodiment only 2 bits are required. For example, the value (00) would indicate a default format of 24-bit RGB, which would be the case when video extractor202A is receiving an entire new frame of RGB image data and the bits of the row of control data are all set to zero. The value (01) would be used to indicate incoming red data, the value (10) would be used to indicate incoming green data, and the value (11) would be used to represent incoming blue data. Of course, much more complicated control data can be used to expand the data/color formats that video extractor202A is capable of handling.

Group B includes data indicative of an x-offset, and group C includes data indicative of a y-offset, which together identify the upper left corner of the window to be updated. Similarly, group D includes data indicative of an x-offset, and group E includes data indicative of a y-offset, which together identify the lower right corner of the window to be updated.

Groups B-E each includes a sufficient number of data bits to identify any rectangular group of pixels in display210. For example, in the case of an 8K display, which has a resolution of 7680 rows×4320 columns, 13 bits is sufficient to identify any particular row or column. Therefore, for an 8K display, each of groups B-E can include as few as 13 bits. As a result, in an optional embodiment, a plurality of windows can be defined in a single row of control data.

FIG. 8shows frame register206, including a first row register800, a second row register802, and a mask register804. In this embodiment, first row register800is a shift register and receives image data from line buffer204in portions of single rows. As new data is received, previously received data is shifted to the left, and the new data takes its place. By shifting data into first row register800, controller216can control which columns the incoming data will eventually be written to. Controller216can “push” data into first row register800, using the next rows of data or with random data, which will not be written to second row register802, as explained below.

A portion of a row of data in frame buffer208is updated as follows. While controller216shifts a row (or partial row) of image data into the proper position within first row register800, second row register800reads a row of image data into second row register802from a corresponding row of frame buffer208. Controller216also shifts masking data into mask register804, based on the definition of the window to be updated, which is provided in the control data from video extractor202. Based on the configuration of mask register804, controller216selectively overwrites the data in second row register802with the data in first row register800, to create a row of updated data. The data bits labeled “X” in mask register804prevent the corresponding bits of image data in second row register802from being overwritten by the bits of image data in first row register800. The data bits labeled “E” in mask register804cause the corresponding bits of image data in second row register802to be overwritten by the bits of image data in first row register800. Controller216then causes the contents of second row register802to overwrite the entire corresponding row of frame buffer208with the updated image data.

Mask register804has the capacity of a single row with at least as many columns as pixel array210. Each column can be in one of a disable or an enable configuration. If a given column on mask register804is in a disable configuration, the data of the same column on second row register802will not be overwritten by data on first row register800. Alternatively, if a given column is in an enable configuration, the data of the same column on second row register802will be overwritten by data on first row register800. By sending control signals that alter the configuration of mask register804, controller216directs the selective overwrite of frame buffer208one row at a time and facilitates updating less than an entire row of frame buffer208with new image data. In this way, previous frames of image data can be overwritten by secondary windows (smaller than a whole frame) to reduce processing requirements and improve frame rate.

To provide a thorough understanding of the present invention, an example method of writing a secondary window to frame buffer208will be described with reference toFIGS. 2, 4, 6, 7, and 8. First, MIPI200receives data corresponding to secondary window400from host102, via data bus112. MIPI200converts the data to control data and image data and provides the control data and image data to video extractor202, via data bus218. Video extractor202parses the control data and image data and transfers the control data to controller216and the image data to line buffer204. Controller216interprets the control data by analyzing group A, group B, group C, group D, and group E of the control data to determine that secondary window400is positioned between an upper left corner at pixel (k,m) and a lower right corner at pixel (l,n). Video extractor202also transfers the rows of image data to line buffer204.

Row Ykis the first row to be transferred into frame buffer208. Responsive to signals from controller216, line buffer204transfers a row of image data destined for row Yk, via data bus224, into first row register800of frame register206. Responsive to the control data received from video extractor202, controller216also shifts configuration data into mask register804, which determines which columns of data in row Ykwill be overwritten in frame buffer208. Then, controller216causes the data of row Ykof frame buffer208to be copied into second row register802of frame register206. Next, responsive to control signals from controller216, frame register206selectively overwrites the data in second row register802with the new image data in first row register800, according to the mask data in mask register804. After the selective update, controller216causes the updated data in second row register802to be written over the data in row Ykof frame buffer208.

After row Ykis transferred to frame buffer208, row Yk+1of new data is shifted into first row register800until column Xmof row Yk+1is latched into column m of first row register800. Next, controller216copies row k+1 from frame buffer208into second row register802. Control instructions from controller216then cause the data in first row register800to be transferred into second row register802, with mask register804, based on its configuration, selectively preventing certain columns from being transferred. The data on second row register802, now overwritten by the appropriate columns of data in first row register800, now includes a combination of previous data (labeled “PD”) and new data (labeled “X”) and makes up a row of updated data. Control instructions from controller216then cause the row of updated data to overwrite row k+1 in frame buffer208.

The process of shifting rows of image data into frame register206and selectively overwriting the corresponding row on frame buffer208continues until row Y1is written to frame buffer208, thus overwriting the image data in frame buffer208with new image data corresponding to secondary window400. The same process is followed to facilitate overwriting image data in frame buffer208with the new image data corresponding to secondary window402.

Now, frame buffer208contains two frames of image data, one (in partition A) that was asserted onto pixel array210while the other (in partition B) was being overwritten by secondary windows400and402. Based on control signals from controller216, frame buffer208then asserts the updated image data in partition B onto pixel array210. While the updated data in partition B is being displayed, the next secondary window(s) or frame of image data is written into partition A of frame buffer208. After each new/updated frame is displayed (e.g., at the end of each modulation period), sequencer214sends a sync signal to host102, indicating that display104is ready to receive additional secondary windows or a new frame of image data.

FIG. 9shows an alternate display104A, which is additionally configured to receive and display image data in a field sequential format. In a field sequential data format, each full field (full frame for one color) or partial field (window of one color) of incoming image data is associated with a distinct color (e.g. red, green, or blue). Display104A is substantially similar to display104, but is illustrated separately to show the additional capability of receiving and displaying field sequential image data.

A video extractor202A receives incoming image data and control data. The control data is included as a first row of data for each color (i.e. a red control row, a green control row, and a blue control row), which will not be displayed. Video extractor202A parses the control data and the image data, communicates the rows of control data to controller216A, and communicates the rows of image data to line buffer204A.

Frame buffer208A stores frames of image data, which and can be selectively overwritten based, at least in part, on the control signals sent to controller216A from video extractor202A. Frame buffer208A is similar to frame buffer208, but is labeled to illustrate the field sequential functionality of this embodiment. In particular, portion A and portion B are each divided into three sub-portions (Red, Green, and Blue), where image data corresponding to each particular color is written. In order for data to be written to frame buffer208A properly, the control data in each control line indicates which color the incoming image data is associated with, the row and column where the data begins, and the row and column where the data ends. As in the previously described embodiment, this information is utilized by controller216A to direct the transfer of data into the designated portion of frame buffer208A. Once the image data is written into frame buffer208A it is displayed on pixel array210, one color field at a time, in coordination with light source212sequentially illuminating pixel array210one color at a time.

As explained above, sequencer214provides a timing sequence to controller216A and sends a periodic sync signal to host102. The sync signal defines a temporal window (frame time), during which host102can send image data for a particular frame. Because each frame of image data includes multiple color fields, each color field (or portions of a color field) should be sent in a fraction of the frame time. For example, for 3 color image data (e.g., RGB) and a 16.5 msec frame time, each color field (or portions of the color field) should be sent in a 5.5 ms field time. The times for each filed can vary, however, as long as all of the data for a given frame is provided during the frame time. Optionally, sequencer214can be configured to provide a series of sync signals based on a field time (e.g., every 5.5 msec).

FIG. 10shows the flow of image data and control data through video extractor202A. As explained above, each set of data received by video extractor202A includes a row of control data (Row 0) and one or more rows of image data (Row 1, Row 2 . . . Row L). The control data includes information that describes the image data it precedes. For example, the control data identifies a particular color associated with the image data, indicates whether the image data corresponds to an entire color field or a secondary window, and in the case of a secondary window, identifies the size and location of the secondary window. The image data includes new image data that will overwrite the previous frame in frame buffer208A. Video extractor202A parses the incoming data and sends the rows of image data to frame buffer208A and sends the rows of control data (or at least the useful portion of the control data) to controller216A.

It should be understood that the embodiment ofFIG. 9is a particular example of the embodiment ofFIG. 2. In particular, display104ofFIG. 2is capable of receiving and processing multi-color data (e.g., 24-bit RGB) and field-sequential data. Display104A ofFIG. 9is substantially similar, but labeled and described to clarify the field-sequential aspect of the present invention.

FIG. 11is a flow chart summarizing an example method1100of writing new data to a display. In a first step1102, a first frame of image data is written to a frame buffer. Next, in a second step1104, the first frame of image data is asserted on pixels of the display during a frame time. Then, in a third step1106, new image data is written over a first portion of the first frame of image data in the frame buffer, and a second portion of the first frame of image data is left in the frame buffer. Finally, in a fourth step1108, the new image data and the second portion of the first frame of image data are asserted on the pixels of the display during a subsequent frame time.

FIG. 12is a flowchart summarizing an example method of performing third step1106of the method1100ofFIG. 11. In a first step1202, a partial frame of image data is received. Next, in a second step1204, control data indicative of a display location and, optionally, a color associated with the partial frame of image data are received. Then, in a third step1206, the partial frame of image data is written into a location of the frame buffer indicated by the control data.

The description of particular embodiments of the present invention is now complete. Many of the described features may be substituted, altered or omitted without departing from the scope of the invention. For example, alternate interfaces (e.g., a serial digital interface) may be substituted for MIPI200. As another example, a single frame buffer may be substituted for dual frame buffer208. These and other deviations from the particular embodiments shown will be apparent to those skilled in the art, particularly in view of the foregoing disclosure.