Fusion of multiple modalities for determining a unique microelectronic device signature

An example of the invention includes a process and apparatus combining test modalities that collates data, processes it into a standard format, evaluates trends and interrogates via an expert system can increase efficiency and yield greater confidence in testing of parts in a variety of supply chain segments. An exemplary process and test system can collect a variety of test data as pre-processed raw data from a plurality of modalities as an evaluation database. The evaluation database post-processes said raw data via data analysis output to an expert system and decision engine as exemplary rule sets. The decision engine generating a probability that a microelectronic device is unauthorized, does not meet specification(s), is defective or counterfeit.

BACKGROUND AND SUMMARY OF THE INVENTION

The present invention relates sensing and detection of electrical or other characteristics associated with defective or unauthorized items in a supply chain using multiple detection and data system modalities. Detection and/or part/system attribute or data modalities can include multiple varieties of particular testing methods or procedures, data systems containing authorized/defect/unauthorized attribute data for individual or classes of items, as well as a variety of different sensory systems that can used for testing items, and/or related data collections containing electrical or other characteristics associated with items of interest. Defects or unauthorized status can include parts that do not conform to their specifications, are not authorized by an original equipment manufacturer, a case where a used part is being passed off as a new part, or a case where a part or component has been subjected to one or more damage or stress events exceeding acceptable limit such as electrostatic discharge (ESD) events. System defect or supply chain problem detection is increasingly more difficult given large volumes, difficulty in accessing parts in an assembly, and different sizes, shapes, and input/output structure, particularly for mass produced parts or defect detection for parts that have left a factory. Thus, there is a need to improve electronic system supply chain defect detection capabilities which can be used at any stage in a supply chain.

A common problem with existing methods of acquisition and comparison of parts in a supply chain is that they are generally not good at accounting for normal manufacturing process variations, which can vary with device lots and foundries. Testing systems also tend to focus on a single stress indicator, such as input/output (I/O) shift due to ESD. Thus such testing systems or approaches do not represent comprehensive evaluation methods nor do they address cases where a part or system is non-conforming to its specification or advertised status e.g., new/not-used/damaged to a small extent. Existing systems also do not provide a combination screening capability which includes ability to screen parts for both aging and environmental stress in addition to other factors such as physical characteristics. Existing systems also do not combine many different data sets to create a comprehensive set of data using simpler and less costly methods and thus provide a reliable and significantly accurate system which permits high capacity or high speed testing system. An embodiment of the invention can provide testing in different locations of a supply chain for parts in different part, end use, or packaging configurations.

One embodiment of the invention uses multiple test detection and data collection/input modes or modalities coupled with one or more decision engines such as neural networks, image recognition, statistical correlation tools, and decision trees, which can incorporate various learning processes. Another embodiment can also include a data collection system with one embodiment including electromagnetic (EM) sensors and data collection inputs adapted to sense test data and input the data to an embodiment of the multiple mode analysis using, e.g, a decision engine to evaluate a device under test (DUT) system. For example, an embodiment of the invention can incorporate integration of multiple EM sensors as well as data inputs and in synchronization with DUT stimulation for the purpose of producing device unique EM signatures accompanied by a decision engine, including a neural engine, to provide a variety of novel embodiments of the invention to meeting a variety of supply chain item defect or unauthorized item detection needs.

An exemplary embodiment can apply a decision engine to multiple electrical characteristic modalities data sets for the purpose of determining a probability that a microelectronic device is unauthorized, does not meet specification(s), or is defective. Inputs to an exemplary decision engine can include a variety of potential data sets that can be evaluated. The additional information obtained in applying multiple data sets in combination with a sensor system that can be used with a wide variety of DUTs, both in a factory and elsewhere, will allow a much more accurate probability assessment of DUTs. Testing systems can also use various methods for measuring different stressors that would indicate a part has, for example, been previously used or stressed (thus is unacceptable or does not meet specification(s)), such as experiencing an ESD damage event.

An exemplary stimulus including multiple electrical characteristic testing regimes could be applied in such a way as to produce one or multiple device dependent signatures, including signatures associated with known good devices and known bad devices, which correlate signature information with DUT testing results using same or similar tests employed in creating the device dependent signatures which are useful in determining a probability that a device has a defect, improper part installed, or has otherwise experienced environmental stress. An exemplary implementing system can include an artificial intelligence (AI) or expert system rule base which runs if/then statements against DUT test results to perform correlation tasks.

An exemplary system can include a neural network or other AI system which permits an initial identification or flagging of a suspect part or system based on a first application of the invention. A result of a manual inspection of the identified or flagged part can then be input into the invention to update a reliability data field associated with one signature or a pattern of signatures using, for example, a neural network type learning system.

An embodiment of a learning system can update a device signature database which is used to determine a probability of accuracy relative to flagged or identified suspect part. Device signatures can include data sets such as, for example, failure/defect/counterfeit indicators and non-failure/defect/counterfeit indicators along with relative weights (denoting relative strength of the indicator) assigned to each indicator which are used when factors are combined to create a composite acceptance/reject determination and probability indicator.

Known bad and known good data signatures for specific devices or parts as well as classes of devices or parts can be created. Counterfeit detection indicators can include factors associated with ESD, mischaracterization, ageing, factory setting data defaults in memory components, predicted built in test (BIT) results, material composition, structural features, infrared signatures associated with different operating modes, vibration/mechanical stress, quality factors, overclocking testing (with and without artificially induced ageing and overclocking testing (both to spec and to max performance failure) at different age equivalent points), and impedance testing. Tests which identify bad or unacceptable parts or systems based on a specific or group of indicators can generate new data signatures data sets which are then associated with a known bad data set with an increased relative weight or a known-bad indicator which are used in correlation with test results from a DUT using same or similar tests used to formulate data signatures and then factored into a composite acceptance/rejection determination and probability indicator formulation.

An exemplary EM apparatus may include a positioning system, switch matrix, power combiner, switch and EMI shielding to minimize stray EMI signals. An exemplary embodiment can also combine various probe types, such as E-field, and H-field probes of varying bandwidths, as well as visual, infra-red, etc in an integrated manner.

DETAILED DESCRIPTION OF THE DRAWINGS

One aspect of the invention includes fusion of multiple electrical characteristic modalities generating output data from a microelectronic device (DUT) residing in, e.g., an electrical loadboard or fixture during interrogation or testing to support screening. A DUT can then be screened, e.g., by electrical and/or optical tests, to determine if it is an unauthorized, counterfeit, damaged, non-conforming to specification(s), or a defective item. Application of multiple data sets can enable a high accuracy probability determination of a particular condition or status associated with said DUT e.g., a unique device signature.

Various methods may be integrated to measure different aspects of a DUT. For example, certain indicators associated with damage events, e.g., age or stress, that indicate a DUT or part has, for example, been previously used or stressed, such as experiencing an ESD event.

Referring toFIG. 1, a conceptual block diagram is shows an exemplary combination of testing modalities by an embodiment of the invention comprising a DUT7connected to an electrical loadboard11having a plurality of I/O pins10, and a plurality of EM probes4, and interconnected or tested with a plurality of output test modality data. A differential amplifier1can be used to measure a current across a series resistor12with the DUT7and power supply9. An exemplary method or testing modality can produce a power signature data (PSD) including data captured on an oscilloscope2which shows DUT7operational current vs time.

PSD can be collected or generated under various conditions or via various approaches including in synchronization with DUT7stimulation from automatic test equipment (ATE)6. ATE6provides DUT stimulation and a measures response. For example internal timing properties, voltage thresholds, and correct functional operation characteristics can be measured. Output PSD can include, e.g., a current signature.

Exemplary embodiments can also include a test modality system adapted to sample and produce output from E-field or H-field probes4that measure EM emissions from a DUT7. Electromagnetic Signature Data (EMSD) can be sensed and recorded under various conditions including in synchronization with DUT stimulation from an exemplary ATE6. Exemplary EMSD output can include a field emission map in a frequency or time domain.

Another test modality can include a plurality of EM probes4formed into an array configuration to detect particular EM emissions such as a particular EM emission pattern from a particular set of components on a DUT7forming an EM signature pattern.

An embodiment of the invention can include another testing modality such as multiple types of EM sensors. For example, a plurality of EM probes4can include combinations of E-field and H-field sensors of various bandwidths. An embodiment of the invention using an array allows for optimizing signal quality for a given technology and acquisition environment.

Another testing modality can include use of Thermal Signature Data (TSD) can be produced by an infrared (IR) imager3that captures an IR image of a DUT7. TSD can be taken under various conditions including in synchronization with DUT7stimulation from the automatic ATE6. TSD output data can include a thermal map of a DUT7surface for a known good device/item or portion of such a device/item as well as known bad/unauthorized/defective device or portion of a device/item.

Another set of modalities can include creation and use of Current vs Voltage (IV) curve data that can be measured by an embodiment including an IV curve voltmeter5. IV curve testing can include a system which forces or injects a voltage and measures a resulting current. IV curve data can be obtained with an embodiment that may incorporate ATE or another embodiment can include a dedicated automated tester for testing which can include ESD detection.

Another testing modality can include creation and use of Pulse Response Data (PRD) which can be obtained by an embodiment which can include an ESD tester6which can apply a pulse for measurement on one or more EM sensors or with an oscilloscope2providing per pin pulse response. PRD can include an exemplary output including a frequency or time domain waveform or frequency map.

Another testing modality can include an embodiment that may also include a Joint Test Action Group (JTAG) controller8electrical test. JTAG is a common name for the IEEE 1149.1 Standard Test Access Port and Boundary-Scan Architecture. A JTAG controller8can be used for testing printed circuit boards and internal DUT7testing such as logic built in self-test (LBIST). A JTAG controller8can be used to set or read data or signal levels on I/O pins10via boundary scan, initiate BIST or program internal memory. JTAG electrical test data output can include an embodiment with a test signature associated with, for example, a specific part or class of parts.

FIG. 2shows an exemplary schematic diagram of another modality that includes an ATE based tester as one example embodiment of the invention. An ATE based testing assembly is shown which comprises a loadboard11having articulated I/O pins10and EM probes4positioned over a DUT7, power supply9, oscilloscope2, differential amplifiers1and series resistor12, JTAG controller8, IR imager3, and ATE6. The articulated EM sensors can be actuated by a control system which has a system which can position the EM sensors to desired probe contact locations based on, for example, a pre-stored data set which is used to place the EM probes4in contact with test points on the DUT7. Hence, the control system can position the EM probes4to operate with different DUTs.

An ATE based testing modality can include a full specification based electrical test. An exemplary ATE can emulate a JTAG testing system allowing, among other things, a JTAG only mode for testing DUTs including a known good or known bad item which can then generate test data or signatures used in later supply chain detection system operation. ATE based testing also can be configured to perform IV curve testing since exemplary amplifiers1can be coupled with an oscilloscope2which provides a PSD test. An electromagnetic and IR signature may also be obtained via an IR imager3. All or a subset of the above can be implemented based on technology, budget, time, etc. For example, an ATE could initiate LBIST via a JTAG command sequence with the acquisition of a power signature and probes4capturing an EM signature. EM probes4can be adapted to be repositionable or movable to be placed over specific areas of interest of a particular DUT7.

FIG. 3shows an exemplary schematic diagram of an ESD based tester as one embodiment of the invention. An ESD based testing assembly including a loadboard11having articulated I/O pins10and EM probes4positioned over a DUT7, and ATE6. A system, such as described herein, can be adapted to induce low voltage signal level stimulus or high voltage ESD stress on a DUT7and record measure effects. Different types of stimulus can be induced, e.g., an ESD tester can apply a low voltage electrical transit pulse, creating a pulse on pin13, for acquiring a pin pulse response signature. Or an escalating series of voltage or electrical discharges can be applied or exposed to a known-good DUT7such as, e.g., a baseline or non-stress input then 250 volts, 500 volts, 750 volts, etc. which are measured as pin pulse response data or IV curves for DUT characterization.

FIG. 4shows an exemplary schematic diagram of a JTAG based tester as another embodiment of the invention. A JTAG based testing assembly including a loadboard11having articulated I/O pins10and EM probes4positioned over a DUT7, and JTAG controller8. A JTAG based test being used for detecting ageing of a DUT7relative to a known part aged via accelerated life burn-in processes, e.g., controlled heating to induce age related stresses. At predetermined times based on the technology and the burn-in environment, the part or DUT can be retested to provide data for an equivalent age which is then used in later testing of a test article DUT for detection of specific conditions such as defects, unauthorized, incorrect characterization of a part's statute (e.g., new when the item is used or damaged), or counterfeit items. For example, an escalating series of aging effect producing processes (e.g., new known-good (baseline), five years, 10 years, 15 years, etc.) can be applied or exposed to a known-good DUT which are measured by a JTAG testing system. Accelerated life test of sacrificed parts with unknown pedigrees could provide data pertaining to the remaining life for that particular device, e.g., using an oscilloscope2or IR imager3, where such tests are useful to determine remaining life for reliability purposes.

FIGS. 5A and 5Bshow an exemplary processing sequence in accordance with one embodiment of the invention. At Step1: position a test assembly comprising a plurality of multiple characteristics modality sensors such as discussed above; At Step2: position a known-good DUT relative to the test assembly; At Step3: position a plurality of test modality sensors such as electrical and optical sensors at a plurality of locations in relation to DUT in a first sensor configuration; At Step4: selectively energize the known-good DUT based on one or a plurality of first multiple test modality stimulus pattern inputs such as discussed above, e.g. an ATE or JTAG electrical test providing IV curves, power signature, thermal signature, EM signature, inductance, capacitance, impedance, pin pulse response, time and frequency domain acquisition, into a plurality of sections on the known-good DUT, wherein the selective energization can comprise inputs associated with the first multiple test modality stimulus patterns input that is adapted to enhance or create a detectable unique multiple test modality device signature; At Step5: acquire a plurality of first multiple test modality stimulus test result data from the one or a plurality of first multiple test modality stimulus patterns produced from Step4by using said plurality of multiple characteristics modality sensors; at Step6: store the plurality of first multiple test modality stimulus data; At Step7: remove the known-good DUT and replace with a second DUT; At Step8: position the second DUT relative to the test assembly; At Step9: position the plurality of multiple characteristics modality sensors at the plurality of locations in relation to the second DUT as the first sensor configuration; At Step10: selectively energize the second DUT to produce a second one or a plurality of first multiple test modality stimulus pattern inputs into a plurality of sections on the second DUT; At Step11: acquire a plurality of second plurality of multiple test modality stimulus test result data from one or a plurality of the first multiple test modality stimulus pattern produced from Step10by using said plurality of multiple characteristics modality sensors in said first sensor configuration; At Step12: store the plurality of second multiple test modality pattern data; At Step13: compare the first and second multiple test modality pattern data; At Step14: Determine if the first and second multiple test modality patterns are substantially identical or different based on, for example, matching, fuzzy logic, ranges associated with categories of modalities e.g., plus or minus ten percent, etc; At Step15: Identify the second DUT as acceptable if the first and second multiple test modality pattern data match or unacceptable if the first and second multiple test modality patterns do not match or are outside of predetermined ranges or specified correlation patterns/conditions.

FIG. 6shows a conceptual system diagram which distributes user software between pre-processed data, post-processed data, and an expert system. The system diagram including a plurality of raw data as inputs for an evaluation database20interconnected with an expert system21and user interface22to generate an overall probability. Software dedicated to pre-processing of raw data comprises a variety of DUT evaluation modalities, e.g. IV curves, power signature, thermal signature, EM signature, inductance, capacitance, impedance, and/or pulse response from ATE, JTAG or initial setting tests. Raw modality data can be pre-processed into a standard format and collected into a DUT evaluation database20. Pre-processed modality data can next be processed and compared with data in the DUT evaluation database using analysis techniques specific to a particular modality data. For example, comparison of evaluation data with a DUT by, e.g., focusing on isolating trends in the comparison data created from, e.g., multiple testing of known good/known bad items, outliers in data sets associated with, e.g., known-good/known-bad, clustering of e.g., known good/known-bad/observed items later determined to be known-bad, and pattern recognition/identification. The evaluation database20can characterize known good value(s) or known bad value(s) for a DUT as well as default unknown value(s) and non-correlation factor(s) for expert system/decision engine21inputs comprising raw data, composite confidence level data and/or flag/ID data.

An assembly of data enables an expert system21to produce an innovative ability to fuse data from multiple modalities that are not typically combined. For example Thermal and Power Signatures data can be correlated in time with JTAG DUT stimulus/evaluation data. Many such combinations are possible, which offers much more sensitive DUT characteristic isolation and identification for used by the expert system21which differentiates between slight defects/stresses/age/quality/etc through indirect indicators and inconsistencies, fuzzy logic, pattern matching, pattern reorganization, user interface, and/or rule sets to generate an overall probability that a microelectronic device is unauthorized, does not meet specification(s), is defective or counterfeit.

One embodiment of an expert system21can include a reorganization pattern data structure. For example, a structure which compares said pattern data structures to actual device control data in order to generate flags and/or unique device ID of said DUT through pattern matching or reorganization. An expert system21may also comprise an exemplary neural network based decision system which allows data updates to govern its decision engine, where said decision engine being part of an expert system21incorporates a rule based system which permits a plurality of logical stepwise true/false conclusions from a plurality of “if/then” statements to address situations where an exact match is absent from said DUT where said “if/then” statements match input data against said control data stored within said decision engine or said expert system in order to determine a series of said true/false conclusions whereby said “if” statement of said rule based system accesses source code written to perform retrieval of a specific data value or multiple data values in said pattern data structure of said DUT, e.g., known good and/or known bad values associated with a specific device or a class of specific devices that qualify as either a genuine device or a counterfeit.

One embodiment of an expert system21can include a pattern matching structure. For example, a structure where a weighted data value and/or threshold range value, i.e. voltage for X attribute falling with a set A to B voltage range where said DUT may be an exact match to a said data weight value consistent with a counterfeit device or have a value within a said data range value of said counterfeit device.

One embodiment of an expert system21can also include a fuzzy logic pattern data structure. For example, a structure that can store a series of multiple modality test data patterns, e.g., a list and data values for known-good and known-bad along with weights and probability of accuracy or reliability of said flags or said ID of a suspect part.

One embodiment of an expert system21can include a user interface22pattern data structure. For example, an exemplary probability can be updated after a manual check user interface determines a pass/fail for the part. Over time, the probability can be increased or decreased based on storing results of said pass/fail manual check which is then used to alter said probability e.g., averaged with weighting to give more weight to recent tests over past tests.

One embodiment of an expert system21can include a rule set pattern data structure. For example, if said data value of a DUT is an exact match of a control data value, said “then” statement as next part of the rule is initiated to perform a specific data operation, e.g., saves a result to a test results file associated with said DUT. Said test results file will store specific information e.g., list of matched rules and other info relative to probability of match/flag and continuously learn as an artificial intelligence.

FIG. 7shows exemplary analysis plots of actual data for the evaluation database20used to process raw modality data into more usable inputs for expert system21input including, e.g. box plots, score plots, histograms, IV curves, principle component analysis (PCA), discriminate analysis (DA), neural network analysis (NNA), traditional statistical analysis, pattern recognition, frequency analysis of impedance, capacitance and inductive components, etc.

One embodiment of the invention comprises a boxplot showing a shift in values of frequency from initial values to values taken after a specified number of hours for a DUT. A boxplot can provide a graphical summary of a distribution of a sample that shows its shape, central tendency, and variability. Boxplots can show shifts in values of frequency from initial values to values taken after a specific number of hours, e.g., 500 hours in this example, for a DUT e.g., an oscillator.

FIG. 8shows examples of possible DUT evaluation modality configurations including e.g., an electrical test rack (ETR)40or ETR/ATE41, ATE system with enhanced loadboard (ATESEL)42. Each test system further comprising individual tests grouped specifically for greater raw data acquisition efficiency, DUT evaluation and expert system interrogation of a particular microelectronic device(s) or part(s). Such evaluation configurations provide raw data formatting so that data can be reduced to points of interest for the artificial intelligence expert system/decision engine, e.g., an ATE including external IR and/or EM sensors absent the need for manual operation of additional tests. A user interface can be applied for a selection of test modalities appropriate for a particular microelectronic evaluation.

One embodiment of an ATESEL42evaluation configuration comprises an ATE43, e.g., JTAG, initial setting or spec electrical test interconnected via a high-speed interface46to the DUT loadboard11through which a DUT stimulus can be implemented for detecting a EM pulse response signature, thermal signature and/or power signature data response, the DUT loadboard11being simultaneously interconnected to a sensor interface45and data acquisition via a high speed interface46and synchronized with the ATE, and where the power signature, thermal signature and EM pulse response signatures are isolated responses detected from external modalities, e.g., IR imager3. An ATESEL42evaluation configuration is suitable for large-scale production tests, wherein not all modalities except for those most effective would be used. For example, electrical spec tests of a particular microelectronic device data sheet including factory electrical performance specifications can remedy challenges associated with known counterfeits that can pass the electrical data sheet range markers since the known counterfeit may further discriminated by synchronization with additional tests, e.g., initial settings tests where a part may hold residual data that evidences that the part was once used.

One embodiment of an ETR/ATE41evaluation configuration can comprise a source meter52for voltage and current acquisition interconnected in tandem with a DUT loadboard11for acquisition of IV curve data. Exemplary IV curves can be implemented to test for ESD by generating an output voltage/current stimulus/response events. For example, such events could be, e.g., events associated with human discharge model specifications for circuit protection where IC chips may make contact with I/O pins and consequently damage the I/O pin by an ESD spark, and wherein use of the ATE tester simulates the normal I/O signals with complete control of timing and voltage controls to push the device's specification limits for further discrimination, characterization, or determination/testing.

One embodiment of and ETR40evaluation configuration may comprises a high-speed oscilloscope2and impedance analyzer47interconnected with a DUT loadboard11. In this embodiment, time and frequency domains and inductance/capacitance/impedance at a specified frequency are detected respectively by the high-speed oscilloscope2and impedance analyzer47respectively for a plurality of electrical test signature data, e.g. pulse response.

One advantage of one embodiment of the invention includes providing an ability for users to implement an optimal design for a selected or target technology. Another advantage can include enabling rapid evaluation by creating a testing assembly, e.g., printed circuit board, with only sensor array elements, position of such elements and signal inputs for a control mechanism needing to be modified.