Input/output control device, input/output control method, and non-transitory computer-readable medium for selective activation of logical circuits

An input/output control device includes: a bus connected to an input interface; a plurality of circuit selectors which are connected to the bus and to which validity or invalidity of an operation is set, each circuit selector outputting a signal of the bus when the validity is set; a plurality of logical circuits which are respectively provided to each of the circuit selectors, each logical circuit performing a logical operation when a signal is inputted from the circuit selector; an output selector which is connected to the bus and to which validity or invalidity of an operation is set, the output selector outputting a signal of the bus to an output interface when the validity is set; and an operation part which validates or invalidates the plurality of circuit selectors or the output selector based on an operation order of the plurality of circuit selectors and the output selector.

TECHNICAL FIELD

The present invention relates to an input/output control device for performing input/output control of a programmable logic controller, an input/output control method, and a program for executing the input/output control.

BACKGROUND ART

A general programmable logic controller contains a microprocessor and is connected to electronic loads such as various kinds of actuators and display devices. The programmable logic controller drives and controls the electronic loads according to a sequence program stored in a memory and operation states of the electronic loads represented by input signals that are sent from operation switches, various kinds of sensors, etc.

A programmable logic controller of a related art is used together with a special unit which mounts an integrated circuit element and an input/output interface circuit each for performing high-speed input/output processing. The special unit operates as an input/output control device. The integrated circuit element mounted on the special unit includes a parameter memory and a logic circuit part. Operation specification of each of the parameter memory and the logic circuit part is determined according to content of a special instruction within a program memory. A reversible counter constituting the logic circuit part is used for both the high-speed input processing and the high-speed output processing (see Patent Document 1, for example).

PRIOR ART DOCUMENT

Patent Document

SUMMARY OF INVENTION

Problems to be Solved by Invention

In the programmable logic controller of the related art, the special unit (hereinafter referred to as an input/output control device) executes optional ones of various functions realized by the programmable logic controller. Thus a user can easily use and effectively execute a predetermined function. In contrast, there is a problem that a user cannot modify the function of the special unit or add any function not set in the special unit.

The present invention is performed in view of the aforesaid circumstances and an object of the present invention is to provide an input/output control device, an input/output control method and a program for a programmable logic controller, which can be handled easily and realize various functions.

Means for Solving Problems

An input/output control device of the present invention includes: a bus which is connected to an input interface to which a signal is inputted from outside: a plurality of circuit selectors which are connected to the bus and to which validity or invalidity of an operation is set, each circuit selector outputting a signal of the bus when the validity is set but not outputting the signal of the bus when the invalidity is set: a plurality of logical circuits which are respectively provided to each of the circuit selectors, each logical circuit performing a logical operation when a signal is inputted from the circuit selector and outputting a signal representing an operation result to the bus; an output selector which is connected to the bus and to which validity or invalidity of an operation is set, the output selector outputting a signal of the bus to an output interface when the validity is set but not outputting the signal of the bus to the output interface when the invalidity is set; and an operation part which validates or invalidates the plurality of circuit selectors or the output selector based on an operation order of the plurality of circuit selectors and the output selector.

An input/output control method of the present invention includes: an input step of receiving input of a signal to a bus that is connected to an input interface to which a signal is inputted from outside; a circuit selection step of validating an optional circuit selector among a plurality of circuit selectors connected to the bus, thereby causing the optional circuit selector to output a signal of the bus; an operation step of causing, among a plurality of logical circuits respectively provided to each of the circuit selectors, a logical circuit, to which a signal is inputted from the circuit selector, to perform a logical operation and output a signal to the bus; and an output step of validating an output selector connected to the bus, thereby causing the output selector to output a signal of the bus to an output interface.

A program of the present invention is a program installed in an input/output control device which executes a predetermined operation according to a signal inputted from an input interface and outputs a signal from an output interface, the program causing an operation part of the input/output control device to execute: a circuit selection step of, when a signal is inputted to a bus connected to the input interface, validating an optional circuit selector among a plurality of circuit selectors connected to the bus, thereby causing the optional circuit selector to output a signal of the bus; an operation step of causing, among a plurality of logical circuits respectively provided to each of the circuit selectors, a logical circuit, to which a signal is inputted from the circuit selector, to perform a logical operation and output a signal to the bus; and an output step of validating an output selector connected to the bus, thereby causing the output selector to output a signal of the bus to the output interface.

Advantageous Effects of Invention

The present invention can provide the input/output control device, the input/output control method and the program for the programmable logic controller, which can be handled easily and realize various functions.

EMBODIMENT OF INVENTION

First Embodiment

FIG. 1is a block diagram illustrating configuration of a programmable logic controller in the first embodiment. Explanation will be made with reference toFIG. 1as to the programmable logic controller which includes an input/output control device according to the first embodiment. The present invention is not limited by the first embodiment.

[Configuration of Programmable Logic Controller1]

In the first embodiment, the programmable logic controller1is connected to a peripheral device3via a connection cable2. The programmable logic controller1is also connected to an open/close sensor4and an electronic load5.

The open/close sensor4is, for example, an encoder such as a rotary encoder which is attached to a motor and detects a rotation angle of the motor. The electronic load5is, for example, a valve such as an electromagnetic valve or a motor.

The programmable logic controller1further includes an input/output control device10and a CPU device20.

The input/output control device10includes a general-purpose logic part11, an operation part12, a memory part13, a communication interface part14, an external input interface part15and an external output interface part16.

The general-purpose logic part11includes a plurality of circuit selectors and a plurality of circuit elements as described later, and thus provides various functions coping with original operation setting by a user.

The operation part12is a central processing unit (CPU) which controls an entire operation of the input/output control device10. As described later, the operation part12makes operation setting of each of individual selectors valid or invalid based on operation data representing an operation order of the individual selectors, and further makes each of the circuit elements perform a logical operation according to setting parameters representing individual operations of the circuit elements. Both the operation data of the selectors and the setting parameters of the circuit elements are set in advance, as described later.

The memory part13is a memory such as an RAM and stores data which is used by the operation part12to control an operation of the general-purpose logic part11. As described later, the memory part13stores the operation data representing the operation order of the individual selectors, the setting parameters representing operations of the individual circuit elements, an operation state flag and measurement data.

The communication interface part14is an interface for performing communication with the CPU device20.

The external input interface part15is connected to the general-purpose logic part11and the open/close sensor4. The external input interface part15receives a signal from the open/close sensor4and outputs a signal corresponding to the signal from the open/close sensor4to the general-purpose logic part11. The external output interface part16is connected to the general-purpose logic part11and the electronic load5. The external output interface part16receives a signal from the general-purpose logic part11and outputs a signal corresponding to the signal from the general-purpose logic part11to the electronic load5.

The general-purpose logic part11of the input/output control device10includes a circuit switching bus111, circuit selectors112a,112b,112c,112d,112e,112f, a filter113, a logic gate114, a counter115, a comparator116, an operation part117, a clock118, an output selector119and an operation setting bus120.

Hereinafter, the circuit selectors112a,112b,112c,112d,112eand112fare also collectively referred to as circuit selectors112. Further the filter113, the logic gate114, the counter115, the comparator116, the operation part117and the clock118are also collectively referred to as circuit elements. Logic circuits represent the circuit elements in the first embodiment.

The external input interface part15, the circuit selectors112, the circuit elements and the output selector119are connected to the circuit switching bus111.

Individual parameters are set to the circuit selectors112. Each of the circuit selectors controls approval/disapproval of outputting of a signal according to the parameter set thereto. That is, each of the circuit selectors112outputs a signal of the circuit switching bus111to the corresponding circuit element when the parameter representing that the operation setting is valid is set. In contrast, each of the circuit selectors112does not output a signal of the circuit switching bus111to the corresponding circuit element when the parameter representing that the operation setting is invalid is set.

The circuit elements are respectively provided to each of the circuit selectors112. When a signal is inputted from the corresponding circuit selector112, the circuit element performs a logical operation according to the parameter set in advance and outputs a signal to the circuit switching bus111.

A parameter is set to the output selector119. The output selector controls approval/disapproval of outputting of a signal according to the parameter set thereto. That is, the output selector119outputs a signal of the circuit switching bus111to the external output interface part16when the parameter representing that the operation setting is valid is set. In contrast, the output selector119does not output a signal of the circuit switching bus111to the external output interface part16when the parameter representing that the operation setting is invalid is set.

The circuit selectors112respectively provided to each of the circuit elements and the output selector119are also collectively referred to as individual selectors.

The operation part12, the memory part13, the communication interface part14, the circuit selectors112, the individual circuit elements and the output selector119are connected to the operation setting bus120. The operation part12transmits the operation data of the individual selectors stored in the memory part13to the circuit selectors112and the output selector119via the operation setting bus120, thereby setting or changing the parameters of the individual selectors. Further the operation part12transmits the setting parameters of the circuit elements stored in the memory part13to the circuit elements, thereby setting or changing the parameters of the circuit elements.

When a signal is inputted from the open/close sensor4via the external input interface part15, the general-purpose logic part11controls the circuit selectors112, the circuit elements and the output selector119to perform a logical operation as described above and outputs a signal to the electronic load5via the external output interface part16.

The CPU device20includes an operation part21, a memory part22, a peripheral device interface part23and a communication interface part24.

The operation part21is a central processing unit (CPU) which controls an entire operation of the CPU device20. Further the operation part21controls the electronic load5connected to the programmable logic controller1based on a user program and data used upon executing the user program. The user program is a program for controlling the electronic load5as a control object of the programmable logic controller1. For example, the user program is a ladder program or a C language program.

The memory part22is a memory such as an ROM and stores data which is used by the operation part21to control the electronic load5. As described later, the memory part22stores the user program, data used for executing the user program and data representing execution results of the user program.

The peripheral device interface part23is an interface for performing communication with the peripheral device3. The communication interface part24is an interface for performing communication with the input/output control device10.

An inter-device bus25is connected between the communication interface part14of the input/output control device10and the communication interface part24of the CPU device20. The input/output control device10and the CPU device20are connected via the communication interface part14, the inter-device bus25and the communication interface part24.

The operation part21reads and executes the user program stored in the memory part22. Further the operation part21stores content of the read user program into the memory part13of the input/output control device10via the communication interface part24and the communication interface part14. The operation part12of the input/output control device10sets or changes the setting parameters representing the operations of the individual circuit elements stored in the memory part13, in order to make the input/output control device10execute an operation instructed by the user program based on content of the extended user program.

The operation part21repeatedly performs, with a predetermined control period, execution of the user program stored in the memory part22, reading of the data used for executing the user program from the memory part22and writing of the execution results of the user program into the memory part22. Upon the reading of data used for executing the user program, the operation part21of the CPU device20obtains operation setting of the individual circuit elements and control result data of the general-purpose logic part11from the memory part13of the input/output control device10. The operation setting of the individual circuit elements is, for example, a count permission instruction and a reset instruction of a count value for the counter115. The control result data is, for example, the count value of the counter115, and so on.

The programmable logic controller1may further include additional devices for expanding the function in addition to the input/output control device10and the CPU device20. Examples of the additional device are a motion controller device which realizes multi-shaft position control by controlling servo amplifiers and a temperature controller device which outputs a temperature control signal based on an instruction from the input/output control device10. These additional devices are also connected mutually via the inter-device bus25.

The peripheral device3includes a parameter setting part31, an operation data setting part32and an external communication interface part33.

The parameter setting part31is a graphical user interface (GUI) which accepts a user's operation. The parameter setting part31prepares a user program with respect to the programmable logic controller1according to a user's operation. The parameter setting part31outputs the prepared user program to the programmable logic controller1via the external communication interface part33and the connection cable2, and thus the user program is stored in the memory part22of the CPU device20.

Further the parameter setting part31displays various data outputted from the programmable logic controller1on a display screen and monitors the data.

The operation data setting part32is a graphical user interface (GUI) which receives a user's operation. The operation data setting part32sets setting parameters representing parameters of the individual circuit elements of the general-purpose logic part11according to a user's operation. Further the operation data setting part32sets the operation data representing the operation order of the individual selectors of the general-purpose logic part11according to a user's operation.

The operation data setting part32outputs the setting parameters of the individual circuit elements and the operation data of the individual selectors of the general-purpose logic part11to the programmable logic controller1via the external communication interface part33and the connection cable2, and thus the setting parameters and the operation data are stored in the memory part13of the input/output control device10via the peripheral device interface part23, the communication interface part24, the inter-device bus25and the communication interface part14. The operation data setting part32includes a function for simulating the operation of the general-purpose logic part11.

The parameter setting part31and the operation data setting part32are provided within the peripheral device3by installing a program containing a programming tool and a general-purpose circuit block setting tool in the peripheral device3. Alternatively the parameter setting part31and the operation data setting part32may be realized as hardware by providing an operation part, a memory part, etc. within the peripheral device3.

FIG. 2is a block diagram illustrating a connection state of signal lines in the general-purpose logic part11of the input/output control device according to the first embodiment. Although, for convenience of explanation,FIG. 2illustrates configuration in which the general-purpose logic part11includes the filter113, the logic gate114and the counter115as the circuit elements, the general-purpose logic part11may further include the comparator116, the operation part117, the clock118shown inFIG. 1, and other circuit elements.

The external input interface part15includes two input ports151a,151b, and the external output interface part16includes two output ports161a,161b. InFIG. 2, for convenience of explanation, the number of inputs from the outside is two, that is, the input ports are151a,151b, and the number of outputs to the outside is two, that is, the output ports are161a,161b. However the number of each of the input ports and the output ports may be three or more.

The output selectors119a,119bofFIG. 2are collectively referred to as the output selector119inFIG. 1.

The external input interface part15supplies to the circuit switching bus111either one of a signal inputted into the input port151aand a signal inputted into the input port151bfrom the outside. Output destination of the signal thus inputted into the circuit switching bus111is determined by the circuit selectors112a.112b,112c. That is, the signal inputted into the circuit switching bus111is outputted to the filter113when the circuit selector112ais valid, to the logic gate114when the circuit selector112bis valid, or to the counter115when the circuit selector112cis valid.

Each of the circuit elements executes, in response to input of a signal from the corresponding circuit selector112, an operation according to the parameter set to the circuit element in advance and outputs a signal to the circuit switching bus111. The signal outputted to the circuit switching bus111is supplied again to the circuit selectors112a,112b,112cvia the circuit switching bus111. In this case, the signal can be supplied again to an optional one of the circuit elements by switching validity/invalidity of each of the circuit selectors112a,112b,112c.

By setting the output selector119aor119bto be valid after the optional circuit element executes a predetermined operation, the external output interface part16outputs a signal to the outside via the output port161aor161b.

In the general-purpose logic part11according to the first embodiment, the external input interface part15, the circuit selectors112, the individual circuit elements and the output selectors119are connected to the circuit switching bus111. It is possible to make the circuit elements perform respective logical operations in an optional order by optionally switching validity/invalidity of each of the circuit selectors112and the output selectors119. In this case, it is also possible to input the signal again into the same circuit element without switching the validity/invalidity of each of the circuit selectors112and the output selectors119, thereby executing the same logical operation again. Further, by optionally switching validity/invalidity of each of the circuit selectors112and the output selectors119, it is also possible, after making one of the circuit elements execute a logical operation and then making another of the circuit element execute a logical operation, to make the one circuit element execute the logical operation again.

[Configuration of Memory Part13]

FIG. 3is a conceptual diagram illustrating configuration of the memory part of the input/output control device according to the first embodiment. The configuration of the memory part13of the input/output control device10according to the first embodiment will be explained with reference toFIG. 3.

The operation state flag is a flag representing a state of the input/output control device10such as operation start or operation change. The memory part13stores a flag representing the operation start or the operation change as the operation state flag when an operation start instruction or an operation change instruction is inputted from the parameter setting part31or the CPU device20. Further the memory part13stores a flag representing completion of an operation or completion of setting change as the operation state flag when a completion notice or a setting change completion notice of an operation of the input/output control device10is inputted from the operation part12. The operation part12informs the CPU device20of the completion of operation or the completion of setting change based on the operation state flag stored in the memory part13. The CPU device20stores the state of the input/output control device10such as the completion of operation or the completion of setting change thus informed in the memory part22.

The measurement data is data acquired by the input/output control device10or data as an operation result of the input/output control device10when the programmable logic controller1executes the user program. For example, the measurement data is a frequency of a signal inputted from the electronic load5or a rotation speed of the motor connected as the electronic load5. The memory part13stores, as the measurement data, the data acquired by the input/output control device10or the data as an operation result of the input/output control device10. The operation part12informs the CPU device20of the data acquired by the input/output control device10or the data as an operation result of the input/output control device10based on the measurement data stored in the memory part13, and then the data thus informed is stored in the memory part22. The parameter setting part31of the peripheral device3can monitor the data acquired by the input/output control device10or the data as an operation result of the input/output control device10which is stored in the memory part22.

The operation data is data for making the general-purpose logic part11execute the predetermined logical operations. That is, the operation data is data representing a switching order of the validity/invalidity concerning the operating setting of the circuit selectors112and the output selectors119. When a user inputs the operation data of the individual selectors into the operation data setting part32, the operation data setting part32outputs the operation data of the individual selectors, and then the outputted operation data is stored in the memory part13. The operation part12transmits the operation data stored in the memory part13to the circuit selectors112and the output selectors119, thereby setting or changing the parameters representing contents of the operation setting of the selectors. Thus a user can easily cause the general-purpose logic part11to perform various functions necessary for the input/output control device10to execute high-speed input/output control.

[Setting Procedure of Operation of General-purpose Logic Part11]

FIG. 4is a flowchart illustrating a procedure for setting the operation of the general-purpose logic part by a user in advance. Explanation will be made with reference toFIG. 4as to a method of setting the operation of the general-purpose logic part11to realize the various functions required by a user.

In step S1, the operation data setting part32of the peripheral device3determines whether or not an instruction for setting the operation data of the circuit selector112or the output selector119is inputted. If the instruction for setting the operation data of the selector is inputted by a user, the operation data setting part32sets or changes the operation data of the selector according to the inputted content in step S2. Further the peripheral device3outputs the operation data of the selector thus set or changed from the external communication interface part33, and then the outputted operation data is stored in the memory part13of the input/output control device10via the connection cable2, the peripheral device interface part23, the communication interface part24, the inter-device bus25and the communication interface part14.

In step S1, if the instruction for setting the operation data of the selector is not inputted by a user, the processing proceeds to step S3.

In step S3, the operation data setting part32of the peripheral device3determines whether or not an instruction for setting the parameter of the circuit element is inputted. If the instruction for setting the parameter of the circuit element is inputted by a user, the operation data setting part32sets or changes the parameter of the circuit element according to the inputted content in step S4. Further the peripheral device3outputs the parameter of the circuit element thus set or changed from the external communication interface part33, and then the outputted parameter is stored in the memory part13of the input/output control device10via the connection cable2, the peripheral device interface part23, the communication interface part24, the inter-device bus25and the communication interface part14.

In step S3, if the instruction for setting the parameter of the circuit element is not inputted by a user, the processing proceeds to step S5.

In step S5, the operation data setting part32of the peripheral device3determines whether or not an instruction for completing the setting of operation of the general-purpose logic part11is inputted. If the instruction for completing the setting of operation of the general-purpose logic part11is not inputted, the processing returns to step S1. If the instruction for completing the setting of operation of the general-purpose logic part11is inputted, the setting processing is completed.

[Procedure for Executing User Program]

FIG. 5is a flowchart illustrating a procedure of an operation in a case where the programmable logic controller in the first embodiment executes the user program. Explanation will be made with reference toFIG. 5as to an operation in the case where the programmable logic controller1executes the user program.

In step S11, the peripheral device3outputs the user program prepared by the parameter setting part31from the external communication interface part33, and then the outputted user program is stored in the memory part22of the CPU device20via the connection cable2and the peripheral device interface part23. The operation part21of the CPU device20executes the user program stored in the memory part22, whereby the input/output control device10performs the predetermined operation to control the electronic load5connected to the input/output control device10. In this case, the operation part12of the input/output control device10causes the general-purpose logic part11to execute a predetermined logical operation in order to execute the predetermined operation instructed from the operation part21of the CPU device20.

Explanation will be made with reference toFIGS. 1 and 2as to an operation for causing the general-purpose logic part11to execute the predetermined logical operation. For example, explanation will be made as to a case where, inFIG. 2, a signal received from the input port151ais inputted into the filter113, the logic gate114and the counter115in this order and then outputted from the output port161b.

In step S12ofFIG. 5, the operation part12of the input/output control device10determines whether or not a signal is inputted from the external open/close sensor4or the like. If determination is made that the signal is inputted from the external open/close sensor4or the like, the operation part12makes the general-purpose logic part11execute the predetermined logical operation with respect to the inputted signal. In the case of aforesaid example, after the signal is inputted from the open/close sensor4, the input port151ashown inFIG. 2outputs the signal inputted from the open/close sensor4to the circuit switching bus111.

In step S13ofFIG. 5, the operation part12of the input/output control device10changes the parameter of the circuit selector112according to the operation data stored in the memory part13. In the case of aforesaid example, the operation part12changes the setting parameter of the circuit selector112aof the general-purpose logic part11via the operation setting bus120shown inFIG. 1based on the operation data stored in the memory part13. Consequently the circuit selector112ais set to be valid and thus outputs a signal.

In step S14ofFIG. 5, the operation part12of the input/output control device10changes the parameter of the circuit element according to the setting parameter stored in the memory part13. In the case of aforesaid example, the operation part12sets the parameter to the filter113of the general-purpose logic part11via the operation setting bus120shown inFIG. 1based on the setting parameter stored in the memory part13. The filter113executes the logical operation with respect to the inputted signal based on this parameter and outputs an operation result as a signal.

In step S15ofFIG. 5, the operation part12of the input/output control device10determines whether or not the next instruction of the operation data stored in the memory part13is an instruction for validating the operation setting of the output selector119. The instruction for validating the operation setting of the output selector119means an instruction for outputting the operation result of the circuit element of the general-purpose logic part11to the outside. In the case of aforesaid example, the counter115of the general-purpose logic part11has not executed the predetermined logical operation, and hence a signal is not output to the outside yet. Thus the determination is made to be NO and the processing returns to step S13.

In step S13ofFIG. 5, the operation part12changes the setting parameters of the circuit selectors112aand112bof the general-purpose logic part11via the operation setting bus120shown inFIG. 1based on the operation data stored in the memory part13. Consequently the circuit selector112ais set to be invalid and thus does not output a signal of the circuit switching bus111to the filter113, whilst the circuit selector112bis set to be valid and thus outputs the signal of the circuit switching bus111to the logic gate114.

In step S14ofFIG. 5, the operation part12sets the parameter to the logic gate114of the general-purpose logic part11via the operation setting bus120shown inFIG. 1based on the setting parameter stored in the memory part13. The logic gate114executes the logical operation with respect to the inputted signal based on this parameter and outputs an operation result as a signal.

Again in step S15, the counter115of the general-purpose logic part11has not executed the predetermined logical operation, and hence a signal is not output to the outside yet. Thus the determination is made to be NO again and the processing returns to step S13.

In step S13ofFIG. 5, the operation part12changes the setting parameters of the circuit selectors112band112cof the general-purpose logic part11via the operation setting bus120shown inFIG. 1based on the operation data stored in the memory part13. Consequently the circuit selector112bis set to be invalid and thus does not output the signal of the circuit switching bus111to the logic gate114, whilst the circuit selector112cis set to be valid and thus outputs the signal of the circuit switching bus111to the counter115.

In step S14ofFIG. 5, the operation part12sets the parameter to the counter115of the general-purpose logic part11via the operation setting bus120shown inFIG. 1based on the setting parameter stored in the memory part13. The counter115executes the logical operation with respect to the inputted signal based on this parameter and outputs an operation result to the circuit switching bus111as a signal.

In step S15ofFIG. 5, if the next instruction of the operation data stored in the memory part13is an instruction for validating the operation setting of the output selector119, the operation part12determines that this instruction is an instruction for outputting an operation result of the circuit element of the general-purpose logic part11to the outside and the processing proceeds to step S16.

In step S16ofFIG. 5, the operation part12of the input/output control device10changes the parameter of the circuit selector119according to the operation data stored in the memory part13. In the case of aforesaid example, the operation part12changes the setting parameters of the circuit selector112cof the general-purpose logic part11and the output selector119bvia the operation setting bus120shown inFIG. 1based on the operation data stored in the memory part13. Consequently the circuit selector112cis set to be invalid and thus does not output the signal of the circuit switching bus111to the counter115, whilst the output selector119bis set to be valid and thus outputs the signal of the circuit switching bus111to the output port161b. The output port161bshown inFIG. 2outputs the signal received from the output selector119bto the outside.

In step S17ofFIG. 5, the operation part21of the CPU device20determines whether or not the execution of the user program is completed. If the execution of the user program is not completed yet, the processing returns to step S12. If the execution of the user program is completed, the programmable logic controller1terminates the processing.

In this manner, the general-purpose logic part11can cause the filter113, the logic gate114and the counter115to execute the logical operations in this order with respect to the signal inputted from the input port151aand then output a signal from the output port161b.

In the general-purpose logic part11according to the first embodiment, althoughFIG. 2shows only the filter113, the logic gate114and the counter115as the circuit elements, optional one or all of the comparator116, the operation part117and the clock118shown inFIG. 1may be additionally contained as the circuit elements. In this case, logical operations of these additional circuit elements can be added by inputting signals via the circuit selectors112corresponding to these additional circuit elements and the circuit switching bus111associated therewith.

The general-purpose logic part11in the first embodiment may further include circuit selectors112corresponding to other circuit elements and a circuit switching bus111associated therewith. In this case, the general-purpose logic part can cope with various user-original unit operation modes by using these individual circuit elements in a free-combination thereof.

As explained above, the input/output control device10of the programmable logic controller1according to the first embodiment can cause the circuit elements to execute the respective logical operations in an optional order by optionally changing validity/invalidity of each of the circuit selectors112and the output selectors119. Thus a user can easily cause the general-purpose logic part11to perform various functions necessary for the input/output control device10to execute the high-speed input/output control. The general-purpose logic part11according to the first embodiment can realize various functions required for the high-speed input/output control such as pulse counting, frequency measurement, high-accuracy timer, PWM outputting, timing generation, and so on.

Further as the various control is realized by merely changing the operation data of the individual selectors and the parameters of the individual circuit elements of the general-purpose logic part11, it is not necessary to rewrite an internal circuit of the circuit element to change the function of the circuit element, and hence the number of design processes required for a user can be reduced. Further, since the general-purpose logic part11, in which the operation data of the individual selectors and the parameters of the individual circuit elements are changed and then verification is performed as to various functions, is used, quality of products of a manufacturing company can be ensured.

Furthermore the input/output control at a high speed of microsecond order and with stable control timing, which cannot be performed by software logic such as a ladder program, is made possible. Thus the high-speed input/output control, which could have been realized only by a microcomputer board or the like mounting a dedicated hardware logic, can be realized easily by a general-purpose programmable logic controller.

In the first embodiment, the operation data is defined as data representing the switching order of validity/invalidity with respect to the operation setting of the circuit selectors112and the output selectors119. Further, the operation part12of the input/output control device10according to the first embodiment determines in step S15ofFIG. 5whether or not the next instruction of the operation data stored in the memory part13is an instruction for validating the operation setting of the output selector119. Then, if the next instruction is an instruction for validating the operation setting of the output selector119, in step S16ofFIG. 5, the operation part12changes the parameter of the output selector119according to the operation data stored in the memory part13. However the operation data in this embodiment is not limited thereto.

For example, the operation data stored in the memory part13may include only the switching order of operation setting of the circuit selectors112, and the operation part12may change the parameters of the circuit selectors112based on the operation data stored in the memory part13. In this case, if the determination is made in step S15ofFIG. 5that the circuit element of the general-purpose logic part11has executed the predetermined logical operation based on the operation data stored in the memory part13, the operation part12changes the parameter of the output selector119to cause this output selector to output a signal to the electronic load5in step S16ofFIG. 5. In such case, the aforesaid effect of the first embodiment can also be attained.

Further in the first embodiment, the circuit selector112outputs the signal of the circuit switching bus111to the circuit element when the parameter representing that the operation setting is valid is set thereto, whilst does not output the signal of the circuit switching bus111to the circuit element when the parameter representing that the operation setting is invalid is set thereto. Similarly the output selector119outputs the signal of the circuit switching bus111to the external output interface part16when the parameter representing that the operation setting is valid is set thereto, whilst does not output the signal of the circuit switching bus111to the external output interface part16when the parameter representing that the operation setting is invalid is set thereto. However the operation of each of the circuit selectors112and the output selectors119in the first embodiment is not limited thereto.

For example, only the parameter representing that the operation setting is valid may be set to each of the circuit selectors112and the output selectors119. In this case, the circuit selector112outputs the signal of the circuit switching bus111to the circuit element when the parameter representing that the operation setting is valid is set thereto. Similarly the output selector119outputs the signal of the circuit switching bus111to the external output interface part16when the parameter representing that the operation setting is valid is set thereto.

In contrast, if the parameter representing that the operation setting is valid is not set to the circuit selector112, that is, nothing is set thereto, the operation setting thereto becomes invalid and hence the circuit selector does not output the signal of the circuit switching bus111to the circuit element. Similarly if the parameter representing that the operation setting is valid is not set to the output selector119, that is, nothing is set thereto, the operation setting thereto becomes invalid and hence the output selector does not output the signal of the circuit switching bus111to the external output interface part16. In such case, the aforesaid effect of the first embodiment can also be attained.

DESCRIPTION OF REFERENCE NUMERALS