Liquid crystal display device

A liquid crystal display device related to one embodiment includes a gate line arranged along a first direction, a first pixel including a first switching element connected to the gate line, and a first pixel electrode connected to the first switching element via a first contact hole arranged in an insulation layer, a second pixel including a second switching element connected to the gate line, and a second pixel electrode connected to the second switching element via a second contact hole arranged in the insulation layer, a first spacer arranged in the fixed pixel, and a second spacer arranged in the second pixel, wherein the first spacer and the second spacer are arranged substantially on the same straight line in the first direction, and the first contact hole and the second contact hole are alternately arranged sandwiching a straight line connecting the first spacer and the second spacer.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2015-228720, filed on Nov. 24, 2015, the entire contents of which are incorporated herein by reference.

FIELD

The present invention is related to a liquid crystal display device.

BACKGROUND

A display screen of various electronic devices such as personal computers, tablets and smartphones is formed using a display device called a flat panel display. Liquid crystal display devices which use the electro-optical effects of a liquid crystal material are becoming widespread as a display device used in such electronic devices. A liquid crystal display device is largely divided into a vertical field effect type and transverse field effect type depending on the structure of a pixel electrode. The practical use of a transverse field effect type has progressed in recent years.

A transverse field effect type liquid crystal display device includes a structure arranged with a liquid crystal layer. A liquid crystal layer is arranged between a first substrate arranged with a pixel electrode and common electrode, and a second substrate arranged with a color filter layer arranged opposing the first substrate. A spacer is arranged between the first substrate and second substrate. A light blocking layer is arranged so as to hide an outline of a pixel as the spacer (for example, Japanese Laid Open Patent Publication No. 2013-007955).

In a liquid crystal display device, since it is necessary to maintain a fixed interval (called a [cell gap]) between a first substrate arranged with a liquid crystal layer and a second substrate, a plurality of column shaped spacers is arranged in a pixel part arranged with pixels. Since a contact hole which connects a pixel electrode with lower layer wiring is arranged in the pixel part, it is ideal that the column shaped spacer is arranged as much as possible apart from the contact hole. However, the greater the development in high definition of a pixel, the closer the arrangement of a column shaped spacer and contact holes becomes. In this case, there is greater demand for bonding precision of a first substrate and second substrate. For example, when a column shaped spacer falls into a contact hole due to misalignment, a cell gap is no longer uniform, and color shit and color unevenness occurs which is cause of a decrease in image quality.

SUMMARY

According to one embodiment of the present invention, a liquid crystal display device is provided including a gate line arranged along a first direction, a first pixel including a first switching element connected to the gate line, and a first pixel electrode connected to the first switching element via a first contact hole arranged in an insulation layer, a second pixel including a second switching element connected to the gate line, and a second pixel electrode connected to the second switching element via a second contact hole arranged in the insulation layer, a first spacer arranged in the fixed pixel, and a second spacer arranged in the second pixel, wherein the first spacer and the second spacer are arranged substantially on the same straight line in the first direction, and the first contact hole and the second contact hole are alternately arranged sandwiching a straight line connecting the first spacer and the second spacer.

DESCRIPTION OF EMBODIMENTS

The embodiments of the present invention are explained below while referring to the diagrams. However, it is possible to perform the present invention using various different forms, and the present invention should not be limited to the content described in the embodiments exemplified herein. Although the width, thickness and shape of each component are shown schematically compared to their actual form in order to better clarify explanation, the drawings are merely an example and should not limit an interpretation of the present invention. In addition, in the specification and each drawing, the same reference symbols are attached to similar elements and elements that have been mentioned in previous drawings, and therefore a detailed explanation may be omitted where appropriate. Furthermore, the characters [first], [second] attached to each element are appropriate symbols used for distinguishing each element and as long as there is no specific explanation do not possess any further meaning.

In the present specification, in the case where certain parts or regions are given as [above (or below)] other parts or regions, as long as there is no particular limitation, these include parts which are not only directly above (or directly below) other parts or regions but also in an upper direction (or lower direction), that is, other structure elements may be included between other parts or regions in an upper direction (or lower direction).

FIG. 1shows a perspective view of a liquid crystal display device related to one embodiment of the present invention. The liquid crystal display device100is arranged with a first substrate102and a second substrate104. A first main surface of the first substrate102and a first main surface of the second substrate104are arranged opposing each other. A pixel part106is arranged in this region where the substrates are opposed. A plurality of pixels108are arranged in the pixel part106. In the first substrate102, a gate drive line circuit116and source line drive circuit118are arranged in a region on the exterior side of the pixel part106. The gate line drive circuit116outputs a gate signal (scanning signal) to a gate line112. The source line drive circuit118outputs a source signal (video signal) to a source line114. The gate line drive circuit116and source line drive circuit118are connected with a drive IC chip122. The drive IC chip122is mounted on the first substrate102for example. A spacer136is arranged between the first substrate102and second substrate104. The first substrate102and second substrate104are bonded together by a sealing member120. A liquid crystal layer is arranged in a gap part between the first substrate102and second substrate104interposed by the spacer136.

In the present embodiment, unless otherwise noted the spacer136is assumed to be a column shaped spacer. That is, the spacer136is formed on the second substrate104side and the second substrate104is bonded with the first substrate102. In addition, the spacer136which is arranged on a surface where the second substrate104faces the first substrate102includes a shape which projects in a column shape.

FIG. 2shows a structure of a pixel part and a drive circuit part in the liquid crystal display device100. For example, the pixel part106is arranged with m number of source lines114(114_1˜114_m) and n number of gate lines112(112_1˜112_n). m×n number of pixels108are arranged in a matrix shape in the pixel part106(however, m and n are positive integers). The pixel part108includes a switching element124, a liquid crystal element126and storage capacitor128. The switching element124is connected to the gate line112and source line114. One terminal of the liquid crystal element126and storage capacitor128is connected to the switching element124and the other terminal is connected to a common electrode131. The common electrode131is arranged in common across a plurality of pixels108. Each of the gate lines112(112_1˜112_n) is connected to the gate line drive circuit116. In addition, each of the source lines114(114_1˜114_m) is connected to the source line drive circuit118.

In the present embodiment, the pixel part106includes a structure which can be applied to a FFS (fringe field switching) mode or IPS (In Plane Switching) mode. The liquid crystal display device100having this structure mainly uses a transverse electric field (for example, an electric field almost parallel with a main surface of a substrate among a fringe electric field) formed between a pixel electrode and common electrode, and the orientation of a liquid crystal molecules which form a liquid crustal layer is controlled.

FIG. 3schematically shows a pixel arrangement and a spacer arrangement in the pixel part106. The gate line112and source line114are arranged in the pixel part106. The gate line112is arranged in a first direction (for example, X direction shown inFIG. 3). The source line114is arranged in a second direction (for example, Y direction shown inFIG. 3) intersecting the first direction. In addition, the spacer136is arranged in a number of pixels included in the pixel part106. In the example shown inFIG. 3, a first spacer136ais arranged in a first pixel108a, a second spacer136bis arranged in a second pixel108b, and a spacer is not arranged in a third pixel108cbetween the first pixel108aand second pixel108b.

The spacer136is arranged in straight line in the first direction along the gate line112. In the first pixel108a, the first spacer136ais arranged between the source line114aand source line114b. In the second pixel108b, the second spacer136bis arranged between a source line114dand source line114e.

The first pixel108aincludes a first pixel electrode132a. The second pixel108bincludes a second pixel electrode132b. The first pixel electrode132ais electrically connected with a switching element belonging to the first pixel108avia a first contact hole134a. The second pixel electrode132bsimilarly is electrically connected with a switching element belonging to the second pixel108bvia a second contact hole134b. A position of the first contact hole134ain the first pixel108aand a position of the second contact hole134bin the second pixel108bare different. That is, the first contact hole134aand second contact hole134bare alternately arranged with respect to a straight line SP in a first direction where the first spacer136aand second spacer136b. Specifically, as is shown inFIG. 3, the first contact hole134ais arranged in a Y1direction side and the second contact hole134bis arranged in a Y2direction side with the straight line SP where the first spacer136aand second spacer136bare arranged as a reference line. The first contact hole134aand second contact hole134binclude a shape which is substantially line symmetrical with respect to the straight line SP where the spacer136is arranged in a first direction. Furthermore, substantially means including a shape resembling a line symmetrical shape and including the same characteristics since it is difficult to be accurately formed line symmetrically during manufacture. As a positional relationship, when the first contact hole134ais arranged in one side (Y1direction side) with respect to the first spacer136a, the second contact hole134bis arranged in an opposite side (Y2direction side) with respect to the second spacer136b. In the liquid crystal display device related to the present embodiment, an alignment margin between the first substrate and second substrate is secured by alternately arranging contact holes of a pixel electrode with respect to the arrangement of a spacer aligned in a straight line in one direction.

Furthermore, the third pixel108cis arbitrary with respect to the arrangement of a contact hole. For example, a contact hole of the third pixel108cis similarly arranged as the first contact hole134aof the first pixel108a. In addition, a form is shown inFIG. 3in which the first spacer136ais arranged in the first pixel108aand the second spacer136bis arranged in the second pixel108bsandwiching two pixels. The arrangement interval of spacers in the pixel part is not limited to the case of being arranged for every three pixels but may be arranged as appropriate. For example, a spacer may be arranged for every twenty pixels and in this case, the relationship between the arrangement of the first spacer136awith respect to the first contact hole134aand the arrangement of the second spacer136bwith respect to the second contact hole134bmay be an arrangement which meets the relationship shown above.

In the pixel part106shown inFIG. 3, the first pixel108a, second pixel108band third pixel108cinclude a color filter layer. A color filer opposing the first pixel electrode132ain the first pixel108amay have the same color as a color filter which opposes the second pixel electrode132bin the second pixel electrode108b. For example, the first pixel108aand second pixel108bmay be pixels which oppose a red color filter layer or a blue color filter. In this case, even if a slight difference is produced in a pixel aperture ratio between two pixels, due to the difference in the layout of the first contact hole134aand the second contact hole134b, it is possible to reduce the effects on image quality since luminosity sensitivity of red and blue is low compared to green.

In addition, the color of a color filter layer opposing the first pixel electrode132ain the first pixel108aand a color of a color filter layer opposing the second pixel electrode132bin the second pixel108amay be different respectively. For example, one of either the first pixel108and second pixel108bmay be a pixel opposing a red color filter layer and the other may be a pixel opposing a blue color filter layer. In this case, even if a slight difference is produced in a pixel aperture ratio between two pixels, due to the difference in the layout of the first contact hole134aand the second contact hole134b, it is possible to reduce the effects on image quality since luminosity sensitivity of red and blue is low compared to green.

In the pixel part106shown inFIG. 3, a color filter layer opposing the first pixel electrode132aof the first pixel108amay be the same color as a color filter layer opposing a pixel electrode of another pixel arranged in a second direction with respect to the first pixel108a, and may also be a different color to a color filter layer opposing a pixel electrode of a third pixel adjacent in a first direction with respect to the first pixel108a. That is, it is possible to achieve high definition of a pixel by arranging color filter layers in a stripe arrangement.

In addition, a color filter layer opposing the first pixel electrode132aof the first pixel108amay also be a different color to both a color filter layer opposing a pixel electrode of another pixel arranged in a second direction with respect to the first pixel108aand a color filter layer opposing a pixel electrode of the third pixel adjacent in a first direction with respect to the first pixel108a. That is, color filter layers may have a diagonal arrangement or a delta arrangement.

Next, the first pixel108a, second pixel108band third pixel108care explained in detail while referring to the diagrams.FIG. 4shows a roughly plan view of a structure of the first pixel108aseen from the second substrate104side. Furthermore, only parts necessary for the explanation are exemplified here.

The gate line112is arranged along a first direction (for example, X direction shown inFIG. 4). The source line114is arranged along a second direction (for example, Y direction shown inFIG. 4) which intersects the first direction. The switching element124is arranged near where the gate line112and source line114intersect. The first switching element124ais realized, for example, by a thin film transistor formed with a channel in a semiconductor film. At least a part of a first semiconductor layer144aof the first switching element124aintersects the gate line112via an insulation layer. The gate line112functions substantially as a gate electrode at an intersection part with the first semiconductor layer144a. InFIG. 4, a strip shaped first semiconductor layer144abends twice and intersects the gate line112twice. That is, the first switching element124aincludes a multi-gate type structure in which two gate electrodes are interposed between a pair of source regions and drain regions as a thin film transistor. One region corresponding to a source region in the first semiconductor layer144ais electrically connected to the source line114avia a source contact hole146a, and another region corresponding to a drain region is electrically connected to a drain electrode140avia a first drain contact hole148a. In addition, the drain electrode140ais electrically connected to the first pixel electrode132avia the first contact hole134a.

Furthermore, althoughFIG. 4shows a form whereby the semiconductor layer144ahaving a U character shape intersects the gate line112, the present invention is not limited to this form. The semiconductor layer144aforming a thin film transistor may have various shapes such as an I character shape and the like. In addition, a thin film transistor which is used as a switching element124is not limited to a multi-gate structure and may also have a single-gate structure. In addition, in the case of a multi-gate structure, the thin film transistor is not limited to two or more channels arranged in series between a source and drain as described above but may also be arranged with a gate electrode arranged in parallel.

In addition, a light blocking layer142ais arranged in a region where the first semiconductor layer144aoverlaps the gate line112. The light blocking layer142ais arranged in a lower layer than the first semiconductor layer144a. The light blocking layer142ais arranged so that he light of a backlight is not irradiated to a channel region of the first semiconductor layer144a.

Furthermore, in the first switching element124a, the first semiconductor layer144ais formed using polysilicon, amorphous silicon or a semiconductor oxide. In addition, although the first switching element124amay be either a top gate type or bottom gate type, in the present example a top gate type is employed.

The first pixel electrode132ais formed in an island shape corresponding to the shape of the pixel108a. In the example shown inFIG. 4, the first pixel electrode132ais formed in a roughly rectangular shape having a short side along a first direction (X direction) and a long side in a second direction (Y direction). A plurality of slits138ais formed in this type of first pixel electrode132a. In the example shown inFIG. 4, each of the slits138aextends along the second direction (Y direction). A slit138ain the first pixel electrode132ais arranged between a source line114aand an adjacent source line114b. Furthermore, although not shown inFIG. 4, a common electrode is formed via an insulation layer on a lower layer of the pixel electrode132a. By providing the first pixel electrode132awith a slit138a, an electric field which is generated between the first pixel electrode132aand a common electrode operates in a liquid crystal layer arranged above the first pixel electrode132a.

FIG. 5shows a cross-sectional structure of a pixel108along the line A-B shown inFIG. 4. The main components which form a pixel108are arranged within a surface where the first substrate102and second substrate104oppose each other. The first switching element124a, first pixel electrode132aand common electrode130are arranged in the first substrate102, and the first spacer136a, light blocking layer160and color filter layer162and the like are formed in the second substrate104.

The first semiconductor layer144aof the first switching element124ais arranged above the first substrate102via the first insulation layer150. A second insulation layer152is arranged on an upper surface of the first semiconductor layer144a. A gate line112overlaps the first semiconductor layer144avia the second insulation layer152. This overlapping part functions as a gate electrode and a gate insulation film in a transistor which functions as the first switching element124a. Furthermore, a light blocking layer142ais arranged on a lower layer of the first insulation layer150corresponding to the overlapping part.

A gate line112is buried by a third insulation layer154. Source lines114a,114band drain electrode140are arranged above the third insulation layer154. The source line114ais connected with a source region of the first semiconductor layer144avia the first source contact hole146awhich passes through the second insulation layer152and third insulation layer154. The drain electrode140is connected with a drain region of the first semiconductor layer144avia the first drain contact hole148awhich passes through the second insulation layer152and third insulation layer154.

A fourth insulation layer156is arranged on an upper layer of the source lines114a,114band drain electrode140. The fourth insulation layer156is arranged as a planarized film. The fourth insulation layer156is formed, for example, from a resin material such as acrylic or polyimide. A common electrode130is arranged above the fourth insulation layer156. The common electrode130is not exposed in the first contact hole134aformed in the fourth insulation layer156. The common electrode130is formed from a transparent conductive material, for example, indium/tin/oxide ITO) or indium/zinc/oxide (IZO). A fifth insulation layer158is arranged above the common electrode130. The fifth insulation layer158covers a side wall surface of the first contact hole134aformed in the fourth insulation layer156and is arranged so that the common electrode130is not exposed. Furthermore, the fifth insulation layer158is formed, for example, from silicon nitride.

The first pixel electrode132ais arranged above the fifth insulation layer158and overlaps the common electrode130. The first pixel electrode132ais connected to the drain electrode140via the first contact hole134awhich passes through the fourth insulation layer156. Furthermore, the fifth insulation layer158which covers a side wall surface of the first contact hole134ais open at the bottom surface (or upper surface of the drain electrode140) of the first contact hole134a. The drain electrode140is exposed from this opening. In this way, the first pixel electrode124ais electrically connected with the first switching element124a. As mentioned previously, a slit138ais arranged in the first pixel electrode132a. The first pixel electrode132ais formed, for example, from a transparent conductive material such as ITO or IZO and the like.

The first pixel electrode132ais covered by a first orientation film166a. In addition, the first orientation film166acovers the fifth insulation layer158. The first orientation film166ais formed from a material which exhibits horizontal orientation properties and is arranged in a surface where the first substrate opposes the liquid crystal layer168.

The second substrate104is arranged with the light blocking layer160, color filter layer162, overcoat layer164and first spacer136ain a surface which opposes the first substrate102. The light blocking layer160is arranged to oppose a region of the switching element124, gate line112and source line114which arranged in the first substrate102, and encloses and partitions an outline of a pixel108. In addition, the light blocking layer160is also arranged to oppose a region of the spacer136and first contact hole134a.

The color filter layer162is arranged so as to overlap at least the first pixel electrode132aand one part is further overlapped by the light blocking layer160. The color filter layer162has a different color scheme arrangement corresponding to each pixel, for example, three primary colors of red, blue and green and is formed by a resin material colored with each color. The boundary of a color filter of an adjacent pixel is located in a region which overlaps the light blocking layer160.

The overcoat layer164covers the color filter layer162. The overcoat layer164planarizes non-uniformity of a surface formed by the light blocking layer160or color filter layer162. The overcoat layer164is formed from a transparent resin material. In addition, the overcoat layer164is covered by a second orientation film166b. The second orientation film166bis formed from a material that exhibits horizontal orientation properties and is arranged in a surface where the second substrate104opposes the liquid crystal layer168.

The first spacer136ais arranged in the second substrate104. A fixed interval (cell gap) between the first substrate102and the second substrate104is maintained using the first spacer136a. Furthermore, the first substrate102and second substrate104are bonded together by a sealing member as shown inFIG. 1with the spacer interposed between the substrates. The liquid crystal layer168is formed from a liquid crystal compound included liquid crystal molecules arranged between the first orientation film166aof the first substrate102and the second orientation film166bof the second substrate104.

Furthermore, as is shown inFIG. 5, the first contact hole134aformed in the first substrate102is arranged close to the first spacer136aformed in the second substrate104. It is desirable that a region arranged with the first contact hole134awhich does not directly contribute to the orientation of liquid crystals, and a region arranged with the first spacer136aare arranged as close together as possible in order to improve an aperture ratio of a pixel. In this case, when the first substrate102and the second substrate104are bonded together, the first spacer136asometimes falls into the first contact hole134adue to misalignment. In this case, a problem is produced whereby a constant cell gap between the first substrate102and second substrate104is no longer maintained. However, in the present embodiment, as is shown inFIG. 3, since contact holes of a pixel electrode are alternately arranged with respect to the arrangement of a spacer, a constant cell gap between the substrates is maintained even in the case where the positions of the first substrate102and second substrate104are misaligned in one direction (specifically, the Y direction shown inFIG. 3) when bonding.

A first optical element170aincluding a first polarization plate is arranged in an outer surface of the first substrate102. In addition, a second optical element170bincluding a second polarization plate is arranged in an outer surface of the second substrate104. A first polarizing axis (or first absorption axis) of the first polarization plate and a second polarizing axis (or second absorption axis) of the second polarization plate are in a crossed nicol positional relationship.

As is shown inFIG. 5, the first orientation film166aand second orientation film166bmutually undergo an orientation process (for example, rubbing process or photo orientation process) in a parallel direction within a surface parallel to a main surface of a substrate (or X-Y plane). The first orientation film166aundergoes an orientation process along a direction intersecting an acute angle of 45° or less with respect to the length axis of a slit138a(second direction Y in the example shown inFIG. 4). For example, the orientation process direction of the first orientation film166ais a direction which intersects at an angle of 5°˜15° with respect to a second direction (Y direction) in which the slit138aextends. In addition, the second orientation film166bundergoes an orientation process along a direction parallel to the orientation process direction of the first orientation film166a. The orientation process direction of the first orientation film166aand the orientation process direction of the second orientation film166bare mutually in opposite directions. At this time, the first polarizing axis of the first polarization plate is set, for example, in a direction parallel to the orientation process direction of the first orientation film166a, and the second polarizing axis of the second polarization plate is set in a direction orthogonal to the orientation process direction of the first orientation film166a.

In the liquid crystal display device100, a backlight is arranged on the first substrate102side. Various forms may be applied as the backlight such as a backlight which uses a light emitting diode (LED) as a light source or a cold cathode tube lamp (CFFL). An explanation with respect to the detailed structure of a backlight is omitted.

Referring again toFIG. 4, in the first pixel108a, the first spacer136a, first drain contact hole148aand first contact hole134aare arranged along a second direction (Y direction). By adopting a layout in which the first drain contact hole148ais arranged between the first contact hole134aand first spacer136ain this way, a layout margin can be provided by increasing the interval between the first contact hole134aand first spacer136aby effectively utilizing the area taken up by a contact hole.

FIG. 6shows a schematic planar view diagram of the structure of a second pixel108bseen from the second substrate104side. The second pixel108bincludes a second switching element124and second pixel electrode132bthe same as the first pixel108a, and is arranged with a second spacer136b. Here, parts which are different to the first pixel108aare explained.

In the second pixel108b, the shape of the second semiconductor layer144aof the second switching element124band the shape of the first semiconductor layer144aof the first switching element124ahave a substantially line symmetrical relationship with respect to the gate line112. That is, the shape of the second semiconductor layer144bof the second switching element124band the shape of the first semiconductor layer144aof the first switching element124aare the same. In the first pixel108a, the first source contact hole146aof the first switching element124ais arranged in the direction Y1in the second direction where the source line114extends with the gate line112as a reference. On the other hand, in the second pixel108b, the second source contact hole146bof the second switching element124bis arranged in the direction Y2in the second direction where the source line114dextends with the gate line112as a reference. In this way, the second semiconductor layer144bof the second switching element124bis arranged in a shape in which the first semiconductor layer144aof the first switching element124ais inverted with respect to the gate line112. Therefore, the arrangement of the second contact hole134ais also displaced in the Y2direction with the gate line112as a reference.

In this way, by making the relationship between the shape of the first semiconductor layer144aand the shape of the second semiconductor layer144ban inverted relationship with a gate line at the center, it is possible to achieve uniformity of transistor characteristics. For example, in the case where a semiconductor layer is polysilicon crystalized by a line shaped laser beam, since it is possible to align the growth direction of a crystal between the first switching element124aand second switching element124b, it is possible to achieve uniformity in characteristics.

Furthermore, although the pattern and layout of such a semiconductor layer is shown as a preferred form of the present embodiment, the present invention is not limited to this form. If the form of a semiconductor layer in the first switching element124aand second switching element124bsatisfies the positional relationship between the first contact hole134aand first spacer136ain the first pixel108a, and the positional relationship between the second contact hole124band second spacer136bin the second pixel108b, then other forms may also be employed. That is, the pattern and layout of the first semiconductor layer144aof the first switching element124aand the second semiconductor layer144bin the second switching element124bmay also be respectively different.

The second pixel108bis arranged with the second contact hole134b, second drain contact hole148b, and second spacer136bin sequence along a second direction (Y direction). A slit138bof the second pixel electrode132bis arranged between the source line114cand source line114dthe same as the first pixel108a. Therefore, because the positional relationship between the second contact hole134band second spacer136bis inverted with respect to the positional relationship between the first contact hole134aand first spacer136a, the length of the second pixel electrode132bin the second direction is larger than the length of the first pixel electrode132a. In this way, by making the length of a pixel electrode between the first pixel108aand second pixel108bdifferent, it is possible to make the position of a contact hole in a pixel electrode sandwiching a gate line112different.

As is shown inFIG. 4, the first pixel108aarranged with the first spacer136aand first contact hole134a, and the second pixel108barranged with the second contact hole134band second spacer136balong a second direction are alternately arranged in the pixel part106at certain intervals. In this way, when the first substrate102and second substrate104are bonded together, even in the case where there is misalignment in the second direction, it is possible to prevent all the spacers from falling into a contact hole of a pixel electrode. In this way, it is possible to maintain an interval, that is, maintain a cell gap at a fixed interval between the first substrate102and second substrate104. Since it is possible to maintain a cell gap at a fixed interval by securing a bonding margin while achieving high definition of a pixel in this way, it is possible to reduce variation in optical characteristics.

FIG. 7shows a roughly planar view diagram of a structure of the third pixel108carranged with a spacer seen from the second substrate104side. The third pixel108cis arranged with a third switching element124cand third pixel electrode132cthe same as the first pixel108a. Parts which are different to the first electrode108aare explained.

The position of the contact hole134cin the third pixel108cis different compared to the first pixel108a. That is, the position of the third contact hole134cin the third pixel electrode132cis arranged on the side of the gate line112with respect to the third drain contact hole148. As a result, the length of a slit138carranged in the third pixel electrode132cis longer compared to that in the first pixel electrode132a. In this way, the effective area of a pixel is substantially increased which contributes to an improvement in an aperture ratio.

Furthermore, althoughFIG. 7shows the case where the pattern and layout of the third semiconductor layer144cin the third pixel108cis the same as the pattern and layout of the first semiconductor layer144ain the first pixel108a, the present invention is not limited to this. For example, the pattern and layout of the third semiconductor layer144cmay be the same as that in the semiconductor layer144b. In addition, the pattern and layout of the third semiconductor layer144cmay also be different to the first semiconductor layer144ain the first pixel108aand second semiconductor layer144bin the second pixel108b.

FIG. 8shows a roughly planar view diagram of the layout of the light blocking layer160arranged in the second substrate104seen from the second substrate104side.FIG. 8shows an arrangement of the first pixel108aand the third pixel108cadjacent to the first pixel108a. The light blocking layer160extends in the first direction and second direction so as to cover the gate line112and source line114. Furthermore, the light blocking layer160includes a spacer light blocking part which blocks the first spacer136a. The spacer light blocking part blocks a part of each of six pixels (including the first pixel108a) which enclose the first spacer136a. The light blocking layer160includes a circular shaped light blocking pattern as the spacer light blocking part with the position of the first spacer136aat roughly the center.

Assuming that an orientation process defect region is formed with the first spacer136aas a starting point, it is possible to suppress light leakage from the periphery of the first spacer136ausing the circular shaped pattern of the light blocking layer160. In addition, even if the position of the first spacer136ais misaligned, since light from the periphery of the first spacer136ais blocked by the light blocking layer160throughout a wide range, it is possible to suppress light leakage. Therefore, it is possible to suppress a decrease in a contrast ratio and a decrease in display quality. The form of the light blocking layer160operates effectively when a pixel is a high definition pixel. Furthermore, the same is true for the second pixel108barranged with the second spacer136b.

In the scope of the concept of the present invention, a person ordinarily skilled in the art could conceive of various modification or improvement examples and such modification or improvement examples are understood to belong to the scope of the present invention. For example, with respect to each of the embodiments described above, a person ordinarily skilled in the art could appropriately perform an addition or removal of structural components or design modification or an addition of processes or an omission or change in conditions which are included in the scope of the present invention as long as they do not depart from the subject matter of the present invention.