Driving method of organic electroluminescence emission part

A driving method of a display device having a driving transistor and a display element, one source/drain region of the driving transistor connected to a power supply part, the other source/drain region connected to an anode electrode provided in the display element, the method includes the steps of: setting a potential of the anode electrode by applying a predetermined intermediate voltage to the anode electrode so that a potential difference between the anode electrode of the display element and a cathode electrode at the other end of the display element does not exceed a threshold voltage of the display element; and then holding the driving transistor in OFF-state while a drive voltage is applied from the power supply part to one source/drain region of the driving transistor.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a driving method of an organic electroluminescence emission part.

2. Description of Related Art

A display element having an emission part and a display device including the display element are known. For example, a display element having an organic electroluminescence emission part (hereinafter, may be abbreviated simply as “organic EL display element”) using electroluminescence (hereinafter, may be abbreviated as “EL”) of an organic material attracts attention as a display element that can perform high-luminance emission by low-voltage direct-current drive.

Like in a liquid crystal display device, for example, in an organic electroluminescence display device (hereinafter, may be abbreviated simply as “organic EL display device”) including an organic EL display element, a simple matrix system and an active matrix system are known as drive systems. The active matrix system has a disadvantage that the structure becomes complex, but has advantages that image luminescence can be made higher etc. In the organic EL display element driven by the active matrix system, an emission part including an organic layer containing an emission layer etc. and a drive circuit for driving the emission point are provided.

As a circuit for driving an organic electroluminescence emission part (hereinafter, may be abbreviated simply as “emission part”), a drive circuit including two transistors and one capacity part (referred to as “2Tr/1C” drive circuit) is known from JP-A-2007-310311, for example. The 2Tr/1C drive circuit includes two transistors of a writing transistor TRWand a driving transistor TRD, and further includes one capacity part C1as shown inFIG. 2. Here, the other source/drain region of the driving transistor TRDforms a second node ND2, and the gate electrode of the driving transistor TRDforms a first node ND1.

Further, as shown in a timing chart ofFIG. 4, in [period-TP(2)1′], preprocessing for threshold voltage cancel processing is executed. That is, via the writing transistor TRWin ON-state by a signal from a scan line SCN, a first node initializing voltage V0fs(e.g., zero volt) is applied from a data line DTL to the first node ND1. Thereby, the potential of the first node ND1becomes V0fs. Further, via the driving transistor TRD, a second node initializing voltage VCC-L(e.g. −10 volts) is applied from a power supply part100to the second node ND2. Thereby, the potential of the second node ND2becomes VCC-L. The threshold voltage of the driving transistor TRDis expressed by a voltage Vth(e.g., 3 volts). When the potential difference between the gate electrode and the other source/drain region of the driving transistor TRD(hereinafter, may be referred to as “source region” for convenience) becomes Vthor more, the driving transistor TRDturns into ON-state. Note that the cathode electrode of the emission part ELP is connected to a power supply line PS2to which a voltage VCat(e.g., zero volts) is applied.

Then, threshold voltage cancel processing is performed in [period-TP(2)2′] That is, while the ON-state of the writing transistor TRWis maintained, the voltage of the power supply part100is switched from the second node initializing voltage VCC-Lto a drive voltage VCC-H(e.g., 20 volts). As a result, the potential of the second node ND2changes toward the potential obtained by subtracting the threshold voltage Vthof the driving transistor TRDfrom the potential of the first node ND1. That is, the potential of the floating second node ND2rises. Then, when the potential difference between the gate electrode and the source region of the driving transistor TRDreaches Vth, the driving transistor TRDturns into OFF-state. In the state, the potential of the second node ND2is generally (V0fs-Vth).

Then, in [period-TP(2)3′], the writing transistor TRWis turned into OFF-state. Then, the voltage of the data line DTL is set to the voltage corresponding to a video signal [video signal (drive signal, luminance signal) VSig—mfor controlling the luminance in the emission part ELP].

Then, in [period-TP(2)4′], writing processing is performed. Specifically, the scan line SCN is turned into HIGH-level and the writing transistor TRWis turned into ON-state. As a result, the potential of the first node ND1rises to the video signal VSig—m.

Here, given that the value of the capacity part C1is c1, the value of the capacity CELof the emission part ELP is cEL, and further, the value of the parasitic capacity between the gate electrode and the other source/drain region of the driving transistor TRDis cgs, when the potential of the gate electrode of the driving transistor TRDchanges from V0fsto VSig—m(>V0fs) the potentials at ends of the capacity part C1(in other words, the potentials of the first node ND1and the second node ND2) basically change. That is, the charge based on the amount of change (VSig—m−V0fs) of the potential of the gate electrode of the driving transistor TRD(=potential of the first node ND2) is assigned to the capacity part C1, the capacity CELof the emission part ELP, and the parasitic capacity between the gate electrode and the other source/drain region of the driving transistor TRD. Hence, if the value cELis a sufficiently large value compared to the value c1and the value cgs, the change of the potential of the other source/drain region of the driving transistor TRD(second node ND2) according to the amount of change (VSig—m−V0fs) of the potential of the gate electrode of the driving transistor TRDis small. Further, typically, the value cELof the capacity CELof the emission part ELP is larger than the value c1of the capacity part C1and the value cgsof the parasitic capacity of the driving transistor TRD. Accordingly, for convenience of explanation, the explanation will be made without consideration of the potential change of the second node ND2generated by the potential change of the first node ND1. Note that the drive timing chart shown inFIG. 4is formed without consideration of the potential change of the second node ND2generated by the potential change of the first node ND1.

In the above described operation, while the voltage VCC-His applied from the power supply part100to one source/drain region of the driving transistor TRD, the video signal VSig—mis applied to the gate electrode of the driving transistor TRD. Accordingly, as shown inFIG. 4, in [period-TP(2)4′], the potential of the second node ND2rises. The amount of rise of the potential ΔV (potential correction value) will be described later. Given that the potential of the gate electrode of the driving transistor TRD(first node ND1) is Vg, and the potential of the other source/drain region of the driving transistor TRD(second node ND2) is Vs, if the amount of rise of the potential ΔV of the second node ND2is not considered, the value of Vgand the value of Vsare as follows. The potential difference between the first node ND1and the second node ND2, i.e., the potential difference Vgsbetween the gate electrode and the other source/drain region serving as a source region of the driving transistor TRDcan be expressed by the following expressions (A).
Vg=VSig—m
Vs≈V0fs−Vth
Vgs≈VSig—m−(V0fs−Vth)  (A)

That is, Vgsobtained in the writing processing in the driving transistor TRDdepends only on the video signal VSig—mfor controlling the luminance in the emission part ELP, the threshold voltage Vthof the driving transistor TRD, and the voltage V0fsfor initializing the potential of the gate electrode of the driving transistor TRD. Further, it is independent of the threshold voltage Vth-ELof the emission part ELP.

Subsequently, mobility correction processing will be briefly explained. In the above described operation, in the writing processing, mobility correction processing of changing the potential of the other source/drain region of the driving transistor TRD(i.e., the potential of the second node ND2) according to the characteristic of the driving transistor TRD(e.g., magnitude of mobility μ or the like) is also performed.

As described above, while the voltage VCC-His applied from the power supply part100to one source/drain region of the driving transistor TRD, the video signal VSig—mis applied to the gate electrode of the driving transistor TRD. Here, as shown inFIG. 4, in [period-TP(2)4′], the potential of the second node ND2rises. As a result, if the value of the mobility μ of the driving transistor TRDis large, the amount of rise of the potential ΔV (potential correction value) in the source region of the driving transistor TRDbecomes larger, and, if the value of the mobility μ of the driving transistor TRDis small, the amount of rise of the potential ΔV (potential correction value) in the source region of the driving transistor TRDbecomes smaller. The potential difference Vgsbetween the gate electrode and the source region of the driving transistor TRDis transformed from the expression (A) to the following expression (B). Note that, the whole time (t0) of the [period-TP(2)4′] may be determined in advance as a design value at designing of the organic EL display device.
Vgs≈VSig—m−(V0fs−Vth)−ΔV(B)

Through the above operation, the threshold voltage cancel processing, the writing processing, and the mobility correction processing are completed. Further, at the start of the subsequent [period-TP(2)5′], the writing transistor TRWis turned into OFF-state by the signal from the scan line SCL, and thereby, the first node ND1is floated. Concurrently, the voltage VCC-His applied from the power supply part100to one source/drain region of the driving transistor TRD(hereinafter, may be referred to as “drain region” for convenience). Therefore, as a result, the potential of the second node ND2rises, the same phenomenon as that in a so-called bootstrap circuit occurs in the gate electrode of the driving transistor TRD, and the potential of the first node ND1also rises. The potential difference Vgsbetween the gate electrode and the source region of the driving transistor TRDbasically holds the value of the expression (B). Further, the current flowing in the emission part ELP is a drain current Idsflowing from the drain region to the source region of the driving transistor TRD. If the driving transistor TRDideally operates in the saturation region, the drain current Idscan be expressed by the following expression (C). The emission part ELP emits light with luminescence according to the value of the drain current Ids. The coefficient k will be described later.

Further, [period-TP(2)5′] shown inFIG. 4is an emission period and a period from the start of [period-TP(2)6′] to the next emission period is a non-emission period (hereinafter, may be referred simply to as “non-emission period”). Specifically, at the start of [period-TP(2)6′], the voltage VCC-Hof the power supply part100is switched to the voltage VCC-Land maintained to the end of the next period [period-TP(2)1′] (shown by [period-TP(2)+1′] inFIG. 4). Thereby, the period from the start of [period-TP(2)6′] to the start of the next [period-TP(2)+5′] is the non-emission period.

The operation of the 2Tr/1C drive circuit, which has been briefly explained, will be specifically explained later.

SUMMARY OF THE INVENTION

In the above described driving method, the potential of the gate electrode of the driving transistor in the emission period is higher than the potential of the channel formation region between the source/drain regions. Further, in the large part of the non-emission period, the potential of the gate electrode of the driving transistor is also higher than the potential of the channel formation region between the source/drain regions. Therefore, for example, when the emission part forming the organic EL display device is driven according to the above described driving method, it is recognized that the characteristic of the driving transistor tends to shift to the enhancement side due to temporal change. In the above description, the case where the same phenomenon as that in the so-called bootstrap circuit ideally occurs in the gate electrode of the driving transistor has been explained. However, in practice, the characteristic of the driving transistor shifts to the enhancement side, and thereby, a phenomenon that the potential difference between the first node and the second node changes occurs in the bootstrap operation. The phenomenon contributes to occurrence of temporal change in luminescence of the organic electroluminescence display device.

Therefore, it is desirable to provide a driving method of an organic electroluminescence emission part that can reduce the degree that the characteristic of the driving transistor shifts to the enhancement side due to temporal change.

An embodiment of the invention is directed to a driving method of a display device of having a driving transistor and a display element,

one source/drain region of the driving transistor connected to a power supply part,

the other source/drain region connected to an anode electrode provided in the display element,

the method including the steps of:

setting a potential of the anode electrode by applying a predetermined intermediate voltage to the anode electrode so that a potential difference between the anode electrode of the display element and a cathode electrode at the other end of the display element does not exceed a threshold voltage of the display element; and then

holding the driving transistor in OFF-state while a drive voltage is applied from the power supply part to one source/drain region of the driving transistor.

Another embodiment of the invention is directed to a driving method of an organic electroluminescence emission part, using a drive circuit including a writing transistor, a driving transistor, and a capacity part,

in the driving transistor,

(A-1) one source/drain region connected to a power supply part,

(A-2) the other source/drain region connected to an anode electrode provided in an organic electroluminescence emission part and connected to one electrode of the capacity part, and forming a second node, and

(A-3) a gate electrode connected to the other source/drain region of the writing transistor and connected to the other electrode of the capacity part, and forming a first node,

in the writing transistor,

(B-1) one source/drain region connected to a data line, and

(B-2) a gate electrode connected to a scan line, the method including the step of

(a) setting a potential of the second node by applying a predetermined intermediate voltage to the second node so that a potential difference between the second node and a cathode electrode provided in the organic electroluminescence emission part may not exceed a threshold voltage of the organic electroluminescence emission part, and then, holding the driving transistor in OFF-state while a drive voltage is applied from the power supply part to one source/drain region of the driving transistor.

The driving method of an organic electroluminescence emission part of the embodiment of the invention includes the step (a). The step (a) corresponds to the non-emission period, the potential of the gate electrode of the driving transistor is lower than the potential of the channel formation region between the source/drain regions. Thereby, the potential relationship between the gate electrode of the driving transistor and the channel formation region is inverted between the emission period and the non-emission period, and the tendency of the characteristic of the driving transistor to shift to the enhancement side due to temporal change is reduced. Further, at step (a), the potential of the second node is set by applying the predetermined intermediate voltage to the second node, and thus, the emission part can be driven without trouble even in the display device having a short scanning period.

DESCRIPTION OF PREFERRED INVENTION

The invention will be described according to embodiments with reference to the drawings. The explanation will be made in the following order.

1. More detailed explanation of a driving method of organic electroluminescence emission part of embodiments of the invention

2. Explanation of outline of an organic electroluminescence display device used in the respective embodiments

<More Detailed Explanation of a Driving Method of Organic Electroluminescence Emission Part of Embodiments of the Invention>

The above described driving method of the organic electroluminescence emission part of embodiments of the invention may include the steps of:

(b) performing writing processing of applying a video signal from the data line to the first node via the writing transistor turned into ON-state by a signal from the scan line; then

(c) turning the writing transistor into OFF-state by the signal from the scan line to float the first node; and

(d) applying the drive voltage from the power supply part to one source/drain region of the driving transistor to flow a current in the organic electroluminescence emission part according to a value of the potential difference between the first node and the second node via the driving transistor, and

a series of steps from step (b) to step (d) may be repeatedly performed and the step (a) may be performed between the step (d) and the next step (b).

The above described driving method of organic electroluminescence emission part of the embodiments of the invention containing the above described preferred configuration may include, before the step (b), the steps of: (b-1) applying a first node initializing voltage to the first node and a second node initializing voltage to the second node, and thereby, performing preprocessing of initializing the potential of the first node and the potential of the second node so that the potential difference between the first node and the second node may exceed the threshold voltage of the driving transistor and the potential difference between the second node and the cathode electrode provided in the organic electroluminescence emission part may not exceed the threshold voltage of the organic electroluminescence emission part; and then (b-2) performing threshold voltage cancel processing of changing the potential of the second node toward a potential obtained by subtracting the threshold voltage of the driving transistor from the potential of the first node while the potential of the first node is held.

In the above described driving method of organic electroluminescence emission part of the embodiments of the invention containing the above described preferred configuration, the step (a) may be the step of setting the potential of the second node by applying the predetermined intermediate voltage to the second node, applying the first node initializing voltage to the first node, then, floating the first node to hold OFF-state of the driving transistor, and applying the drive voltage from the power supply part to one source/drain region of the driving transistor.

In this case, at the step (a), the potential of the second node may be set by applying the predetermined intermediate voltage from the power supply part to the second node via the driving transistor. Alternatively, the drive circuit may further include a first transistor, and, in the first transistor, (C-1) the other source/drain region may be connected to the second node, (C-2) a gate electrode may be connected to a first transistor control line, and at the step (a), the potential of the second node may be set by applying the predetermined intermediate voltage to the second node via the first transistor turned into ON-state by a signal from the first transistor control line. Furthermore, at the step (a), the first node initializing voltage may be applied from the data line to the first node via the writing transistor turned into ON-state by the signal from the scan line.

In the above described driving method of organic electroluminescence emission part of the embodiments of the invention containing the above described various preferred configurations, at the step (b-1), the first node initializing voltage may be applied from the data line to the first node via the writing transistor turned into ON-state by the signal from the scan line. Alternatively, at the step (b-1), the second node initializing voltage may be applied from the power supply part to the second node via the driving transistor. Furthermore, the drive circuit may further include a first transistor, and, in the first transistor, (C-1) the other source/drain region may be connected to the second node, (C-2) a gate electrode may be connected to a first transistor control line, and at the step (b-1), a second node initializing voltage may be applied to the second node via the first transistor turned in to ON-state by a signal from the first transistor control line.

In the above described driving method of organic electroluminescence emission part of the embodiments of the invention containing the above described various preferred configurations, at the step (b-2), a condition in which the first node initializing voltage is applied from the data line to the first node via the writing transistor turned into ON-state by the signal from the scan line may be maintained, and thereby, the potential of the first node may be held. Alternatively, at the step (b-2), the drive voltage may be applied from the power supply part to one source/drain region of the drive transistor, and thereby, the potential of the second node may be changed toward the potential obtained by subtracting the threshold voltage of the driving transistor from the potential of the first node.

In the above described driving methods of organic electroluminescence emission part of the embodiments of the invention containing the above described various preferred configurations (hereinafter, these may be simply referred to as “driving methods of the embodiments of the invention” or “the embodiments of the invention”), at step (b), while the drive voltage is applied to one source/drain region of the driving transistor, the video signal may be applied from the data line. Thereby, at the same time with the writing processing, mobility correction processing of raising the potential of the second node according to the characteristic of the driving transistor is performed. The details of the mobility correction processing will be described later.

The organic electroluminescence display device (hereinafter, may be simply referred to as “organic EL display device”) used in the embodiments of the invention, a so-called monochrome display configuration or color-display configuration may be employed. For example, a color display configuration in which one pixel includes plural sub-pixels, and specifically, one pixel includes three sub-pixels of a red light emitting sub-pixel, a green light emitting sub-pixel, and a blue light emitting sub-pixel may be employed. Further, one pixel may include one set of these three kinds of sub-pixels and additional one or plural kinds of sub-pixels (e.g., a set with an additional sub-pixel that emits white light for improvement in luminescence, a set with an additional sub-pixel that emits complementary color light for expansion of the range of color reproduction, a set with an additional sub-pixel that emits yellow light for expansion of the range of color reproduction, or a set with additional sub-pixels that emit yellow and cyan light for expansion of the range of color reproduction).

As values of pixels of the organic EL display device, some resolution for image display of VGA (640,840), S-VGA (800,600), XGA (1024,768), APRC (1152,900), S-XGA (1280,1024), U-XGA (1600,1200), HD-TV (1920,1080), Q-XGA (2048,1536), and (1920,1035), (720,480), (1280,960) etc. may be taken as examples, but the resolution is not limited to the values.

In the organic EL display device, configurations and structures of various circuits such as a scanning circuit and a signal output circuit, various kinds of wiring such as a scan line and a data line, the power supply part, the organic electroluminescence emission part (hereinafter, may be simply referred to as “emission part”) may be known configurations and structures. Specifically, the emission part may include an anode electrode, a hole transport layer, an emission layer, an electron transport layer, a cathode electrode, etc.

As a transistor forming the drive circuit, an n-channel thin-film transistor (TFT) may be cited. The transistor forming the drive circuit may be of enhancement type or depression type. In the n-channel transistor, an LDD structure (Lightly Doped Drain structure) may be formed. In some instances, the LDD structure may be asymmetrically formed. For example, since a large current flows in the driving transistor when the organic electroluminescence display element (hereinafter, may be simply referred to as “organic EL display element”) emits light, the LDD structure may be formed only at one source/drain region side that becomes the drain region side at emission. Note that a p-channel thin-film transistor may be used for the writing transistor or the like, for example.

A capacity part forming the drive circuit may be formed by one electrode, the other electrode, and a dielectric layer (insulating layer) between these electrodes. The above described transistor and capacity part forming the drive circuit are formed in a certain plane (e.g., formed on a support), and the emission part is formed above the transistor and the capacity part forming the drive circuit via an interlayer insulating layer, for example. Further, the other source/drain region of the driving transistor is connected to the anode electrode provided in the emission part via a contact hole, for example. Note that the transistor may be formed on a semiconductor substrate or the like.

As below, the embodiments of the invention will be explained with reference to the drawings, and prior to the explanation, the outline of an organic EL display device used in the respective embodiments will be explained.

<Explanation of Outline of an Organic Electroluminescence Display Device Used in the Respective Embodiments>

The organic EL display device suitable for use in the respective embodiments is an organic EL display device having plural pixels. One pixel includes plural sub-pixels (in the respective embodiments, three sub-pixels of a red light emitting sub-pixel, a green light emitting sub-pixel, and a blue light emitting sub-pixel). Each sub-pixel includes an organic EL display element10having a structure in which a drive circuit11and an emission part (emission part ELP) connected to the drive circuit11are stacked.

FIG. 1is a conceptual diagram of an organic EL display device according to embodiment 1 and embodiment 2.FIG. 13is a conceptual diagram of an organic EL display device according to embodiment 3 and embodiment 4, andFIG. 20is a conceptual diagram of an organic EL display device according to embodiment 5.

FIG. 2shows a drive circuit basically including a two-transistors/one-capacity part (may be referred to as “2Tr/1C drive circuit”).FIG. 14shows a drive circuit basically including three-transistors/one-capacity part (may be referred to as “3Tr/1C drive circuit”).FIG. 21shows a drive circuit basically including four-transistors/one-capacity part (may be referred to as “4Tr/1C drive circuit”).

Here, the organic EL display device in the respective embodiments includes:

(2) a signal output circuit102;

(3) a total of N×M of the organic EL display elements10arranged in a two-dimensional matrix of N in the first direction and M in the second direction different from the first direction, each having the emission part ELP and the drive circuit11for driving the emission part ELP;

(4) M scan lines SCL connected to the scanning circuit101and extending in the first direction;

(5) N data lines DTL connected to the signal output circuit102and extending in the second direction; and

(6) a power supply part100.

InFIGS. 1,13, and20, 3×3 organic EL display elements10are shown, however, this is only an example. For convenience, inFIGS. 1,13, and20, a power supply line PS2shown in FIG.2and the like is emitted.

The emission part ELP has known configuration and structure including an anode electrode, a hole transport layer, an emission layer, an electron transport layer, a cathode electrode, etc. The configurations and structures of the scanning circuit101, the signal output circuit102, the scan line SCL, the data line DTL, and the power supply part100may be known configurations and structures.

The minimum component elements of the drive circuit11will be explained. The drive circuit11includes at least a driving transistor TRD, a writing transistor TRW, and a capacity part C1having a pair of electrodes. The driving transistor TRDincludes an n-channel TFT having source/drain regions, a channel formation region, and a gate electrode. Further, the writing transistor TRWalso includes an n-channel TFT having source/drain regions, a channel formation region, and a gate electrode. The writing transistor TRWmay include a p-channel TFT.

Here, in the driving transistor TRD,

(A-1) one source/drain region is connected to the power supply part100,

(A-2) the other source/drain region is connected to the anode electrode provided in the emission part ELP and connected to one electrode of the capacity part C1, and forms a second node ND2, and

(A-3) the gate electrode is connected to the other source/drain region of the writing transistor TRWand connected to the other electrode of the capacity part C1, and forms a first node ND1.

Further, in the writing transistor TRW,

(B-1) one source/drain region is connected to the data line DTL, and

(B-2) the gate electrode is connected to a scan line SCL.

FIG. 3is a schematic partial sectional view of a part of the organic EL display device. The transistors TRD, TRWand the capacity part C1forming the derive circuit11are formed on a support20, and the emission part ELP is formed above the transistors TRD, TRWand the capacity part C1forming the drive circuit11via an interlayer insulating layer40, for example. Further, the other source/drain region of the driving transistor TRDis connected to the anode electrode provided in the emission part ELP via a contact hole. InFIG. 3, only the driving transistor TRDis shown. The other transistor is hidden.

More specifically, the driving transistor TRDincludes a gate electrode31, a gate insulating layer32, source/drain regions35,35provided in a semiconductor layer33, and a channel formation region34corresponding to a part of the semiconductor layer33between the source/drain regions35,35. On the other hand, the capacity part C1includes the other electrode36, a dielectric layer formed by an extending portion of the gate insulating layer32, and one electrode37(corresponding to the second node ND2). The gate electrode31, a part of the gate insulating layer32, and the other electrode36forming the capacity part C1are formed on the support20. The one source/drain region35of the driving transistor TRDis connected to a wire38, and the other source/drain region35is connected to the one electrode37. The driving transistor TRD, the capacity part C1, etc. are covered by the interlayer insulating layer40, and the emission part ELP including an anode electrode51, a hole transport layer, an emission layer, an electron transport layer, and a cathode electrode53is provided on the interlayer insulating layer40. In the drawing, the hole transport layer, the emission layer, and the electron transport layer are shown by one layer52. A second interlayer insulating layer54is provided on the part of the interlayer insulating layer40without the emission part ELP, a transparent substrate21is provided on the second interlayer insulating layer54and the cathode electrode53, and light emitted in the emission layer passes through the substrate21and is output to the outside. The one electrode37(second node ND2) and the anode electrode51are connected by a contact hole provided in the interlayer insulating layer40. Further, the cathode electrode53is connected to a wire39provided on the extending portion of the gate insulating layer32via contact holes56,55provided in the second interlayer insulating layer54and the interlayer insulating layer40.

A manufacturing method of the organic EL display device shown inFIG. 3and the like will be explained. First, on the support20, various wires such as the scan line SCL, the electrodes forming the capacity part C1, the transistors including semiconductor layers, the interlayer insulating layers, the contact holes, etc. are appropriately formed according to a known method. Then, deposition and patterning are performed according to a known method, and the emission parts ELP arranged in a matrix are formed. Then, the support20that has been through the above steps and the substrate21are opposed and sealed around and wiring connection to an external circuit is performed, for example, and thereby, an organic EL display device can be obtained.

The organic EL display device in the respective embodiments is a color display device including plural organic EL display elements10(e.g., N×M=1920×480). The respective organic EL display elements10form sub-pixels and a group including plural sub-pixels forms one pixel, and pixels are arranged in a two-dimensional matrix in a first direction and a second direction different from the first direction. One pixel includes three kinds of sub-pixels of a red light emitting sub-pixel that emits red light, a green light emitting sub-pixel that emits green light, and a blue light emitting sub-pixel that emits blue light arranged in the direction in which the scan line SCL extends.

The organic EL display device includes (N/3)×M pixels arranged in a two-dimensional matrix. The organic EL display elements10forming the respective pixels are line-sequentially scanned, and the display frame rate is FR (times/second). That is, the organic EL display elements10forming the respective (N/3) pixels (N sub-pixels) arranged in the mth row (here, m=1, 2, 3 . . . , M) are simultaneously driven. In other words, in the respective organic EL display elements10forming one row, their emission/non-emission times are controlled in units of rows to which they belong. Note that the processing of writing video signals with respect to each pixel forming one row may be processing of simultaneously writing the video signals to all pixels (hereinafter, may be simply referred to as “simultaneous writing processing”), or processing of sequentially writing the video signals with respect to each pixel (hereinafter, may be simply referred to as “sequential writing processing”). The writing processing may be appropriately selected according to the configuration of the organic EL display device.

As described above, the organic EL display elements10in the first row to Mth row are line-sequentially scanned. For convenience of explanation, the period assigned for scanning the respective rows of organic EL display elements10is expressed as “horizontal scan period”. In the respective embodiments described as below, in each horizontal scan period, there are a period in which a first node initializing voltage is applied from the signal output circuit102to the data line DTL (hereinafter, referred to as “initialization period”), and then, a period in which a video signal VSigis applied from the signal output circuit102to the data line DTL (hereinafter, referred to as “video signal period”).

Here, in principle, the drive and operation relating to the organic EL display element10located in the mth row, the nth column (here, n=1, 2, 3 . . . , N) will be explained, and they will be referred to as “(n,m)th organic EL display element10” or “(n,m)th sub-pixel”. Further, before the horizontal scan period (the mth horizontal scan period) of the respective organic EL display elements10arranged in the mth row ends, various kinds of processing (threshold voltage cancel processing, writing processing, and mobility correction processing, which will be described later) are performed. Note that the writing processing and the mobility correction processing are performed within the mth horizontal scan period, and, in some cases, may be performed from the (m−m″)th horizontal scan period to the mth horizontal scan period. On the other hand, depending on the drive circuit type, the threshold voltage cancel processing and the preprocessing therefor may be performed prior to the mth horizontal scan period.

Then, after all of the above described various kinds of processing are finished, the emission parts forming the respective organic EL display elements10arranged in the mth row are allowed to emit light. Note that, after all of the above described various kinds of processing are finished, the emission parts may promptly be allowed to emit light or emission parts may be allowed to emit light after a predetermined period (e.g., the horizontal scan period for a predetermined number of rows) has elapsed. The predetermined period may appropriately be set according to the specifications of the organic EL display device, the configuration of the drive circuit, or the like. Note that, in the following description, for convenience of explanation, after various kinds of processing ends, the emission parts are promptly allowed to emit light. Further, the emission state of the emission parts forming the respective organic EL display elements10arranged in the mth row is continued to the time immediately before the horizontal scan period of the respective organic EL display elements10arranged in the (m+m′)th row. Here, “m” is determined according to the design specifications of the organic EL display device. That is, light emission of the emission parts forming the respective organic EL display elements10arranged in the mth row in a certain display frame is continued to the (m+m′−1)th horizontal scan period. On the other hand, from the start of the (m+m′)th horizontal scan period to the completion of the writing processing and the mobility correction processing in the mth horizontal scan period in the next display frame, the emission parts forming the respective organic EL display elements10arranged in the mth row basically maintain the non-emission state. By providing the above described non-emission state period (hereinafter, may be simply referred to as “non-emission period”), after image blur due to active matrix drive is reduced and the more advanced moving image quality can be obtained. Note that the emission state/non-emission state of the respective sub-pixels (organic EL display elements10) are not limited to the above described states. Further, the time length of the horizontal scan period is a time length less than (1/FR)×(1/M) seconds. When the value of (m+m′) is larger than M, the excessive amount of horizontal scan period is processed in the next display frame.

In two source/drain regions of one transistor, the term “one source/drain region” may be used to mean the source/drain region at the side connected to the power supply part. Further, the ON-state of the transistor refers to the state that a channel is formed between the source/drain regions. It is not considered whether or not a current flows from one source/drain region to the other source/drain region of the transistor. On the other hand, the OFF-state of the transistor refers to the state that no channel is formed between the source/drain regions. Further, the mode that a source/drain region of a certain transistor is connected to a source/drain region of another transistor includes the mode that the source/drain region of the certain transistor and the source/drain region of the other transistor occupy the same region. Furthermore, the source/drain region may include not only a conducting material of polysilicon, amorphous silicon, or the like containing an impurity, but also include a layer formed by a metal, a metal alloy, conducting particles, a stacked structure of them, an organic material (conducting polymer). Further, in the timing charts used in the description as below, the length of the lateral axis indicating the respective periods (time length) is schematic, but does not show the proportions of time lengths of the respective periods. The same is applicable to the longitudinal axis. Furthermore, the waveform shapes in the timing charts are also schematic.

As below, the embodiments of the invention will be explained.

Embodiment 1 relates to a driving method of the organic electroluminescence emission part. In embodiment 1, the drive circuit11includes two-transistors/one-capacity part.FIG. 2is an equivalent circuit diagram of the organic electroluminescence display element10including the drive circuit11.

First, the details of the drive circuit and the emission part will be explained.

The drive circuit11includes two transistors of the writing transistor TRWand the driving transistor TRD, and further includes one capacity part C1(2Tr/1C drive circuit).

One source/drain region of the driving transistor TRDis connected to the power supply part100via a power supply line PS1. On the other hand, the other source/drain region of the driving transistor TRDis connected to

[1] the anode electrode of the emission part ELP, and

[2] one electrode of the capacity part C1,

and forms the second node ND2. Further, the gate electrode of the driving transistor TRDis connected to

[1] the other source/drain region of the writing transistor TRW, and

[2] the other electrode of the capacity part C1, and forms the first node ND1. The voltage supplied from the power supply part100will be described later.

Here, the driving transistor TRDis driven to flow a drain current Idsaccording to the following expression (1) in the emission state of the organic EL display element10. In the emission state of the organic EL display element10, the one source/drain region of the driving transistor TRDserves as a drain region and the other source/drain region serves as a source region. For convenience of explanation, in the description as below, the one source/drain region of the driving transistor TRDmay be simply referred to as “drain region”, and the other source/drain region may be simply referred to as “source region”. Here, each symbol denotes as follows.

μ: effective mobility

L: channel length

W: channel width

Vgs: potential difference between gate electrode and source region

The drain current Idsflows in the emission part ELP of the organic EL display element10, and the emission part ELP of the organic EL display element10emits light. Further, depending on the magnitude of the value of the drain current Ids, the emission state (luminance) in the emission part ELP of the organic EL display element10is controlled.

The other source/drain region of the writing transistor TRWis connected to the gate electrode of the driving transistor TRDas described above. On the other hand, the one source/drain region of the writing transistor TRWis connected to the data line DTL. Further, from the signal output circuit102via the data line DTL, the video signal (drive signal, luminance signal) VSigfor controlling the luminance in the emission part ELP and the first node initializing voltage, which will be described later, are supplied to the one source/drain region. Note that, via the data line DTL, other various signals and voltages (e.g., signals for pre-charge driving, various reference voltages, or the like) may be supplied to the one source/drain region. Further, the ON/OFF operation of the writing transistor TRWis controlled by the signal from the scan line SCL connected to the gate electrode of the writing transistor TRW, specifically, the signal from the scanning circuit101.

The anode electrode of the emission part ELP is connected to the source region of the driving transistor TRDas described above. On the other hand, the cathode electrode of the emission part ELP is connected to a power supply line PS2to which a voltage VCatis applied. The parasitic capacity of the emission part ELP is expressed by CEL. Further, the threshold voltage necessary for emission of the emission part ELP is Vth-EL. That is, if a voltage equal to or more than Vth-ELis applied between the anode electrode and the cathode electrode of the emission part ELP, the emission part ELP emits light.

In the description as below, the voltage or potential values are set as follows, however, they are values only for explanation and not limited to the values. The same is applicable to the other embodiments, which will be described later.

VSig: video signal for controlling luminance in emission part ELP, zero volts to 10 volts

VCC-H: drive voltage for flowing current in emission part ELP, 20 volts

V0fs: first node initializing voltage for initializing potential of gate electrode of driving transistor TRD(potential of first node ND1), zero volts

Vth: design value of threshold voltage of driving transistor TRD, 3 volts

Vcat: voltage applied to cathode electrode of emission part ELP, zero volts

Vth-EL: threshold voltage of emission part ELP, 3 volts

First, for a better understanding of the invention, an operation of a driving method of a reference example using the organic EL display device according to embodiment 1 and problems in this case will be explained.FIG. 4schematically shows a drive timing chart of the emission part ELP according to the reference example, andFIGS. 5A to 5FandFIGS. 6A and 6Bschematically show ON/OFF states etc. of the respective transistors.

The driving method of the emission part ELP in the reference example includes, using the above described drive circuit11, the steps of:

(a′) performing preprocessing of initializing the potential of the first node ND1and the potential of the second node ND2so that the potential difference between the first node ND1and the second node ND2may exceed the threshold voltage Vthof the driving transistor TRDand the potential difference between the second node ND2and the cathode electrode provided in the emission part ELP may not exceed the threshold voltage Vth-ELof the emission part ELP; then

(b′) performing threshold voltage cancel processing of changing the potential of the second node ND2toward a potential obtained by subtracting the threshold voltage Vthof the driving transistor TRDfrom the potential of the first node ND1while the potential of the first node ND1is held; then

(c′) performing writing processing of applying the video signal VSigfrom the data line DTL to the first node ND1via the writing transistor TRWturned into ON-state by the signal from the scan line SCL; then

(d′) floating the first node ND1by turning the writing transistor TRWinto OFF-state by the signal from the scan line SCL;

(e′) driving the emission part ELP by flowing a current according to a value of the potential difference between the first node ND1and the second node ND2in the emission part ELP from the power supply part100via the driving transistor TRD; and then

(f′) applying the second node initializing voltage VCC-Lto the second node ND2from the power supply part100via the driving transistor TRDto turn the emission part ELP into the non-emission state.

[period-TP(2)e] to [period-TP(2)3′] shown inFIG. 4are operation periods immediately before [period-TP(2)4′] in which writing processing is performed. Further, in [period-TP(2)0′] to [period-TP(2)3′], the (n,m)th organic EL display element10is basically in the non-emission state. As shown inFIG. 4, not only [period-TP(2)4′] but also [period-TP(2)1′] to [period-TP(2)3′] are contained in the mth horizontal scan period Hm.

For convenience of explanation, the start of the [period-TP(2)1′] coincides with the start of the initialization period in the mth horizontal scan period Hm(the period in which the potential of the data line DTL is V0fsinFIG. 4, and the same is applicable to the other horizontal scan periods). Similarly, the end of the [period-TP(2)2′] coincides with the end of the initialization period in the horizontal scan period Hm. Further, the start of the [period-TP(2)3′] coincides with the start of the video signal period in the horizontal scan period Hm(the period in which the potential of the data line DTL is VSig—minFIG. 4, which will be described later).

As below, the respective periods of [period-TP(2)0′] to [period-TP(2)+5′] will be explained. The lengths of the respective periods of [period-TP(2)1′] to [period-TP(2)3′] may be appropriately set according to the design of the organic EL display device.

The [period-TP(2)0′] is for an operation from the previous display frame to the current display frame, for example. That is, the period is a period from the start of the (m+m′)th horizontal scan period in the previous display frame to the (m−1)th horizontal scan period in the current display frame. Further, in the [period-TP(2)0′], the (n,m)th organic EL display element10is in the non-emission state. At the start of [period-TP(2)0′] (not shown), the voltage supplied from the power supply part100is switched from the drive voltage VCC-Hto the second node initializing voltage VCC-L. As a result, the potential of the second node ND2becomes lower to VCC-L, a reverse voltage is applied between the anode electrode and the cathode electrode of the emission part ELP, and the emission part ELP is turned into the non-emission state. Further, according to the potential drop of the second node ND2, the potential of the floating first node ND1(the gate electrode of the driving transistor TRD) also becomes lower.

As described above, in the respective horizontal scan periods, the first node initializing voltage V0fsis applied from the signal output circuit102to the data line DTL, and then, the video signal VSigis applied thereto in place of the first node initializing voltage V0fs. More specifically, according to the mth horizontal scan period Hmin the current display frame, the first node initializing voltage V0fsis applied to the data line DTL, and then, the video signal (for convenience, expressed as VSig—m, the same is applicable to other video signals) corresponding to the (n,m)th sub-pixel is applied thereto in place of the first node initializing voltage V0fs. Similarly, according to the (m+1)th horizontal scan period Hm+1, the first node initializing voltage V0fsis applied to the data line DTL, and then, the video signal VSig—m+1corresponding to the (n,m+1)th sub-pixel is applied thereto in place of the first node initializing voltage V0fs. InFIG. 4, though the description is omitted, in the respective horizontal scan periods other than the horizontal scan periods Hm, Hm+1, Hm+m′, the first node initializing voltage V0fsand the video signal VSigare applied to the data line DTL.

Then, the mth horizontal scan periods Hmin the current display frame starts. In the [period-TP(2)1′], the above mentioned step (a′) is performed.

Specifically, at the start of [period-TP(2)1′], the scan line SCL is turned into HIGH-level to turn the writing transistor TRWinto ON-state. The voltage applied from the signal output circuit102to the data line DTL is V0fs(initialization period). As a result, the potential of the first node ND1becomes V0fs(zero volts). Since the second node initializing voltage VCC-Lis applied from the power supply part100to the second node ND2, the potential of the second node ND2is held at VCC-L(−10 volts).

Since the potential difference between the first node ND1and the second node ND2is 10 volts and the threshold voltage Vthof the driving transistor TRDis 3 volts, the driving transistor TRDis in ON-state. The potential difference between the second node ND2and the cathode electrode provided in the emission part ELP is −10 volts and does not exceed the threshold voltage Vth-ELof the emission part ELP. Thereby, the preprocessing of initializing the potential of the first node ND1and the potential of the second node ND2is completed.

In the [period-TP(2)2′], the above mentioned step (b′) is performed.

That is, while the ON-state of the writing transistor TRWis maintained, the voltage supplied from the power supply part100is switched from VCC-Lto VCC-HAs a result, though the potential of the first node ND1is not changed (V0fs=zero volt is maintained), the potential of the second node ND2changes toward the potential obtained by subtracting the threshold voltage Vthof the driving transistor TRDfrom the potential of the first node ND1. That is, the potential of the floating second node ND2rises. For convenience of explanation, the length of [period-TP(2)2] is a length enough to sufficiently change the potential of the second node ND2.

If the length of [period-TP(2)2′] is sufficiently long, the potential difference between the gate electrode and the other source/drain region of the driving transistor TRDreaches Vth, and the driving transistor TRDturns into OFF-state. That is, the potential of the floating second node ND2becomes closer to (V0fs−Vth=−3 volts), and finally becomes (V0fs−Vth). Here, if the following expression (2) is ensured, in other words, if the potentials are selected and determined to satisfy the following expression (2), the emission part ELP emits no light.
(V0fs−Vth)<(Vth-EL−VCat)  (2)

In the [period-TP(2)2′], the potential of the second node ND2finally becomes (V0fs−Vth). That is, the potential of the second node ND2is determined depending only on the threshold voltage Vthof the driving transistor TRD, the voltage V0fsfor initializing the potential of the gate electrode of the driving transistor TRD. Further, the potential is independent of the threshold voltage Vth-ELof the emission part ELP.

At the start of the [period-TP(2)3′], the writing transistor TRWis turned into OFF-state by the signal from the scan line SCL. Further, the voltage applied to the data line DTL is switched from the first node initializing voltage V0fsto the video signal VSig—m(video signal period). If the driving transistor TRDhas reached OFF-state in the threshold voltage cancel processing, the potentials of the first node ND1and the second node ND2are substantially unchanged. Note that, if the driving transistor TRDhas not reached OFF-state in the threshold voltage cancel processing, a bootstrap operation occurs in the [period-TP(2)3′], and the potentials of the first node ND1and the second node ND2become slightly higher.

Within the period, the above mentioned step (c′) is performed. The writing transistor TRWis turned into ON-state by the signal from the scan line SCL. Further, via the writing transistor TRW, the video signal VSig—mis applied from the data line DTL to the first node ND1. As a result, the potential of the first node ND1rises to the video signal VSig—m. The driving transistor TRDis in ON-state. In some cases, ON-state of the writing transistor TRWmay be held in the [period-TP(2)3′]. In the configuration, writing processing is started immediately after the voltage of the data line DTL is switched from the first node initializing voltage V0fsto the video signal VSig—m.

Here, given that the capacity of the capacity part C1is a value c1, the capacity of the capacity CELof the emission part ELP is a value cEL, and further, the parasitic capacity between the gate electrode and the other source/drain region of the driving transistor TRDis a value cgs, when the potential of the gate electrode of the driving transistor TRDchanges from V0fsto VSig—m(>V0fs) the potentials at ends of the capacity part C1(the potentials of the first node ND1and the second node ND2) basically change. That is, the charge based on the amount of change (VSig—m−V0fs) of the potential of the gate electrode of the driving transistor TRD(=potential of the first node ND1) is assigned to the capacity part C1, the capacity CELof the emission part ELP, and the parasitic capacity between the gate electrode and the other source/drain region of the driving transistor TRD. Hence, if the value cELis a sufficiently large value compared to the value c1and the value cgs, the change of the potential of the other source/drain region of the driving transistor TRD(second node ND2) according to the amount of change (VSig—m−V0fs) of the potential of the gate electrode of the driving transistor TRDis small. Further, typically, the value cELof the capacity CELof the emission part ELP is larger than the value c1of the capacity part C1and the value cgsof the parasitic capacity of the driving transistor TRD. Accordingly, the above described explanation has been made without consideration of the potential change of the second node ND2generated by the potential change of the first node ND1. Further, except the case where there is a particular necessity, the explanation is made without consideration of the potential change of the second node ND2generated by the potential change of the first node ND1. The same is applicable to the other embodiments. Note that the drive timing chart is formed without consideration of the potential change of the second node ND2generated by the potential change of the first node ND1.

In the above described writing processing, while the drive voltage VCC-His applied from the power supply part100to one source/drain region of the driving transistor TRD, the video signal VSig—mis applied to the gate electrode of the driving transistor TRD. Accordingly, as shown inFIG. 4, in [period-TP(2)4′], the potential of the second node ND2rises. The amount of rise of the potential (ΔV shown inFIG. 4) will be described later. Given that the potential of the gate electrode of the driving transistor TRD(first node ND1) is Vg, and the potential of the other source/drain region of the driving transistor TRD(second node ND2) is Vs, if the rise of the potential of the second node ND2is not considered, the value of Vgand the value of Vsare as follows. The potential difference between the first node ND1and the second node ND2, i.e., the potential difference Vgsbetween the gate electrode and the other source/drain region serving as the source region of the driving transistor TRDcan be expressed by the following expressions (3).
Vg=VSig—m
Vs≈V0fs−Vth
Vgs≈VSig—m−(V0fs−Vth)  (3)

That is, Vgsobtained in the writing processing in the driving transistor TRDdepends only on the video signal VSig—mfor controlling the luminance in the emission part ELP, the threshold voltage Vthof the driving transistor TRD, and the voltage V0fsfor initializing the potential of the gate electrode of the driving transistor TRD. Further, it is independent of the threshold voltage Vth-ELof the emission part ELP.

Subsequently, the rise of the potential of the second node ND2in the [period-TP(2)4′] will be explained. In the above described driving method of the reference example, in the writing processing, mobility correction processing of changing the other source/drain region of the driving transistor TRD(i.e., the potential of the second node ND2) according to the characteristic of the driving transistor TRD(e.g., magnitude of mobility μ or the like) is also performed.

In the case where the driving transistor TRDis fabricated from a polysilicon thin-film transistor or the like, variations in mobility μ produced among transistors may be unavoidable. Accordingly, if the video signals VSighaving the same value are applied to the plural driving transistors TRDhaving difference in mobility μ, there may be a difference between the drain current Idsflowing in the driving transistor TRDhaving large mobility μ and the drain current Idsflowing in the driving transistor TRDhaving the small mobility μ. When there is such a difference, uniformity of the screen of the organic EL display device is deteriorated.

In the above described driving method of the reference example, while the drive voltage VCC-His applied from the power supply part100to one source/drain region of the driving transistor TRD, the video signal VSig—mis applied to the gate electrode of the driving transistor TRD. Accordingly, as shown inFIG. 4, in [period-TP(2)4′], the potential of the second node ND2rises. If the value of the mobility μ, of the driving transistor TRDis large, the amount of rise ΔV (potential correction value) of the potential (i.e., the potential of the second node ND2) in the other source/drain region of the driving transistor TRDbecomes larger. Contrary, if the value of the mobility μ of the driving transistor TRDis small, the amount of rise of the potential ΔV (potential correction value) in the other source/drain region of the driving transistor TRDbecomes smaller. Here, the potential difference Vgsbetween the gate electrode and the other source/drain region serving as the source region of the driving transistor TRDis transformed from the expression (3) to the following expression (4).
Vgs≈VSig—m−(V0fs−Vth)−ΔV(4)

Note that, a predetermined time for executing the writing processing (the whole time (t0) of the [period-TP(2)4′] inFIG. 4) may be determined in advance as a design value at designing of the organic EL display device. Further, the whole time t0of [period-TP(2)4′] is determined so that the potential (V0fs−Vth+ΔV) in the other source/drain region of the driving transistor TRDmay satisfy the following expression (2′). Thereby, in [period-TP(2)4′], the emission part ELP emits no light. Furthermore, correction of variations of the coefficient k (≡(½)·(W/L)·COX) is simultaneously performed by the mobility correction processing.
(V0fs−Vth+ΔV)<(Vth-EL+VCat)  (2′)
[period-TP(2)5′] (SeeFIG. 4andFIG. 5F)

Through the above operation, step (a′) to step (c′) are completed. Then, in the [period-TP(2)5′], the above mentioned step (d′) and step (e′) are performed. That is, while the condition in which the voltage VCC-His applied from the power supply part100to one source/drain region of the driving transistor TRDis maintained, the scan line SCL is turned into LOW-level according to the operation of the scanning circuit101, the writing transistor TRWis turned into OFF-state, and the first node ND1, i.e., the gate electrode of the driving transistor TRDis floated. Therefore, as a result, the potential of the second node ND2rises.

Here, as described above, the gate electrode of the driving transistor TRDis floated and the same phenomenon as that in a so-called bootstrap circuit occurs in the gate electrode of the driving transistor TRDdue to the existence of the capacity part C1, and the potential of the first node ND1also rises. As a result, the potential difference Vgsbetween the gate electrode and the other source/drain region serving as the source region of the driving transistor TRDbasically holds the value of the expression (4).

Further, the potential of the second node ND2rises and exceeds (Vth-EL+VCat), and thereby, the emission part ELP starts to emit light. The current flowing in the emission part ELP is the drain current Idsflowing from the drain region to the source region of the driving transistor TRD, and can be expressed by the expression (1). Here, from the expression (1) and the expression (4), the expression (1) can be transformed into the following expression (5).
Ids=k·μ·(VSig—m−V0fs−ΔV)2(5)

Therefore, the current Idsflowing in the emission part ELP is, when V0fsis set to zero volt, for example, proportional to the square of the value obtained by subtracting the potential correction value ΔV due to the mobility μ of the driving transistor TRDfrom the value of the video signal VSig—mfor controlling the luminescence in the emission part ELP. In other words, the current Idsflowing in the emission part ELP does not depend on the threshold voltage Vth-ELof the emission part ELP or the threshold voltage Vthof the driving transistor TRD. That is, the amount of light emission (luminescence) of the emission part ELP is not affected by the threshold voltage Vth-ELof the emission part ELP or the threshold voltage Vthof the driving transistor TRD. Further, the luminescence of the (n,m)th organic EL display element10corresponds to the value of the current Ids.

In addition, the larger the mobility μ of the driving transistor TRD, the larger the potential correction value ΔV, and thus, the value of Vg, at the left-hand side of expression (4) becomes smaller. Therefore, in expression (5), even when the mobility μ is large, the value of (VSig—m−V0fs−ΔV)2becomes smaller, and, as a result, the drain current Idscan be corrected. That is, in the driving transistors TRDhaving different mobility μ, when the values of the video signals VSigare the same, the drain currents Idsbecome substantially the same. As a result, the currents Idsflowing in the emission part ELP and controlling the luminescence of the emission part ELP are uniformized. Thereby, variations in the luminescence of the emission part ELP due to variations in the mobility μ (further, variations in k) can be corrected.

Then, the emission state of the emission part ELP continues to the (m+m′−1)th horizontal scan period. The end of the (m+m′−1)th horizontal scan period corresponds to the end of the [period-TP(2)5′]. Here, “m′” satisfies the relationship 1<m′<M and is a predetermined value in the organic EL display device. In other words, the emission part ELP is driven from the start of the (m+1)th horizontal scan period Hm+1to immediately before the (m+m′)th horizontal scan period Hm+m′, and the period is the emission period.

Then, the above mentioned step (f′) is performed, and the emission part ELP is turned into the non-emission state.

Specifically, while the OFF-state of the writing transistor TRWis maintained, the voltage supplied from the power supply part100is switched from VCC-Hto VCC-Lat the start of [period-TP(2)6′] (in other words, the start of the (m+m′)th horizontal scan period Hm+m′). As a result, the potential of the second node ND2becomes lower to VCC-Land a reverse voltage is applied between the anode electrode and the cathode electrode of the emission part ELP, and the emission part ELP turns into the non-emission state. Further, according to the potential drop of the second node ND2, the potential of the floating first node ND1(the gate electrode of the driving transistor TRD) also becomes lower.

Then, the above described non-emission state is continued to immediately before the mth horizontal scan period Hmin the next frame. The time corresponds to immediately before the start of [period-TP(2)+1′] shown inFIG. 4. In this manner, by providing the non-emission period, after image blur due to active matrix drive is reduced and the more advanced moving image quality can be obtained. For example, if m′=M/2, the time lengths of the emission period and the non-emission period are substantially the half of the time length of one display frame, respectively.

Then, in [period-TP(2)+1′] and the subsequent periods, the same steps as those described in [period-TP(2)1′] to [period-TP(2)6′] are repeatedly performed (seeFIG. 4andFIG. 6B). That is, the [period-TP(2)6′] shown inFIG. 4corresponds to the next [period-TP(2)0′].

In the above described driving method of the reference example, the potential of the gate electrode of the driving transistor TRDin the emission period is higher than the potential of the channel formation region between the source/drain regions. Further, the large part of the non-emission period is occupied by the [period-TP(2)6′] shown inFIG. 4, and the potential of the gate electrode of the driving transistor TRDis also higher than the potential of the channel formation region between the source/drain regions in the [period-TP(2)6′]. Therefore, when the emission part ELP is driven according to the above described driving method, it is recognized that the characteristic of the driving transistor TRDtends to shift to the enhancement side due to temporal change.

For example, it is assumed that the value of the threshold voltage Vthof the driving transistor TRDbecomes higher by 3 volts from the 3 volts as the design value to 6 volts. Here, the potential of the second node ND2at the end of [period-TP(2)2′] becomes lower by 3 volts to −6 volts. Consequently, the potential of the second node ND2at the end of [period-TP(2)4′] when the writing processing ends also becomes lower by 3 volts than the potential when the threshold voltage Vthof the driving transistor TRDis 3 volts.

If the bootstrap operation in [period-TP(2)5′] ofFIG. 4is ideally performed, the value of the potential difference between the first node ND1and the second node ND2in [period-TP(2)4′] is also maintained in [period-TP(2)5′]. Since the drain current is given by the expression (5), if the characteristic of the driving transistor TRDshifts to the enhancement side, the shift does not affect the luminescence of the display device.

However, in practice, when the potential of the first node ND1rises in the bootstrap operation, the amount of change in the potential of the first node ND1is divided by the capacity part C1, the capacity CEL, etc. and the potential of the second node ND2rises. That is, the amount of rise of the potential of the second node ND2is slightly smaller than the amount of rise of the potential of the first node ND1. In other words, through the bootstrap operation, the potential difference between the first node ND1and the second node ND2becomes smaller. The amount of change in the potential difference between the first node ND1and the second node ND2becomes larger as the potential change of the first node ND1in the bootstrap operation is larger.

As described above, when the value of the threshold voltage Vthof the driving transistor TRDis 6 volts, higher by 3 volts from the 3 volts as the design value, the potential of the second node ND2at the end of [period-TP(2)4′] also becomes lower by 3 volts than the potential when the threshold voltage Vthof the driving transistor TRDis 3 volts. Thereby, the amount of potential change of the second node ND2due to the bootstrap operation in [period-TP(2)5′] becomes larger by nearly 3 volts. Therefore, if the values of the video signals VSigare the same, the potential difference between the first node ND1and the second node ND2in [period-TP(2)5′] becomes slightly smaller than that in the case where the threshold voltage Vthis 3 volts, and the drain current decreases.

As described above, if the characteristic of the driving transistor TRDshifts to the enhancement side due to temporal change, the potential difference between the first node ND1and the second node ND2consequently becomes smaller in the bootstrap operation. Thereby, phenomena that the drain current decreases and the luminescence of the emission part ELP becomes lower occur.

Next, the driving method of embodiment 1 will be explained.FIG. 7schematically shows a drive timing chart of the emission part ELP according to embodiment 1, andFIGS. 8A to 8FandFIGS. 9A to 9Cschematically show ON/OFF states etc. of the respective transistors.

The driving method of the emission part ELP in embodiment 1 and the other embodiments, which will be described later, includes the step of, using the above described drive circuit11,

(a) setting the potential of the second node ND2by applying a predetermined intermediate voltage VCC-M, to the second node ND2so that the potential difference between the second node ND2and the cathode electrode provided in the emission part ELP may not exceed the threshold voltage Vth-ELof the emission part ELP, and then, holding the driving transistor TRDin OFF-state while the drive voltage VCC-His applied from the power supply part100to one source/drain region of the driving transistor TRD. Note that, in embodiment 3 and embodiment 4, the voltage VCC-His read into the voltage VCCand the voltage VCC-Mis read into a voltage VSS-M, which will be described later. The same is applicable to the following description.

The driving method of the emission part ELP in embodiment 1 and the other embodiments includes the steps of:

(b) performing writing processing of applying the video signal VSigfrom the data line DTL to the first node ND1via the writing transistor TRWturned into ON-state by the signal from the scan line STL; then

(c) turning the writing transistor TRWinto OFF-state by the signal from the scan line SCL to float the first node ND1; and

(d) applying the drive voltage VCC-Hfrom the power supply part100to one source/drain region of the driving transistor TRDto flow a current in the emission part ELP according to the value of the potential difference between the first node ND1and the second node ND2via the driving transistor TRD, and

a series of steps from step (b) to step (d) is repeatedly performed and the above mentioned step (a) may be performed between the step (d) and the next step (b).

Furthermore, the driving method of the emission part ELP in embodiment 1 and the other embodiments includes, before the step (b), the steps of:

(b-1) applying a first node initializing voltage to the first node ND1and a second node initializing voltage to the second node ND2, and thereby, performing preprocessing of initializing the potential of the first node ND1and the potential of the second node ND2so that the potential difference between the first node ND1and the second node ND2may exceed the threshold voltage Vthof the driving transistor TRDand the potential difference between the second node ND2and the cathode electrode provided in the emission part ELP may not exceed the threshold voltage Vth-ELof the emission part ELP; and then

(b-2) performing threshold voltage cancel processing of changing the potential of the second node ND2toward a potential obtained by subtracting the threshold voltage Vthof the driving transistor TRDfrom the potential of the first node ND1while the potential of the first node ND1is held.

In the driving method of the emission part ELP in embodiment 1 and the other embodiments, the step (a) is the step of setting the potential of the second node ND2by applying the predetermined intermediate voltage VCC-Mto the second node ND2, applying the first node initializing voltage to the first node ND1, then, floating the first node ND1to hold OFF-state of the driving transistor TRD, and applying the drive voltage VCC-Hfrom the power supply part100to one source/drain region of the driving transistor TRD.

[period-TP(2)0] to [period-TP(2)3] shown inFIG. 7are operation periods immediately before [period-TP(2)4] in which writing processing is performed. Further, in [period-TP(2)0] to [period-TP(2)4], the (n,m)th organic EL display element10is in the non-emission state. As shown inFIG. 7, not only [period-TP(2)4] but also [period-TP(2)1] to [period-TP(2)3] are contained in the mth horizontal scan period Hm.

For convenience of explanation, the start of the [period-TP(2)1] coincides with the start of the initialization period in the mth horizontal scan period Hm(the period in which the potential of the data line DTL is V0fsinFIG. 7, and the same is applicable to the other horizontal scan periods). Similarly, the end of the [period-TP(2)2] coincides with the end of the initialization period in the horizontal scan period Hm. Further, the start of the [period-TP(2)3] coincides with the start of the video signal period in the horizontal scan period Hm(the period in which the potential of the data line DTL is VSig—minFIG. 7).

Furthermore, the end of [period-TP(2)4] coincides with the end of the video signal period in the horizontal scan period Hm.

As below, first, the respective periods of [period-TP(2)0] to [period-TP(2)4] will be explained.

The [period-TP(2)0] is for an operation from the previous display frame to the current display frame, for example. That is, the [period-TP(2)0] is a period from the start of the (m+m′)th horizontal scan period in the previous display frame to the (m−1)th horizontal scan period in the current display frame. Further, in the [period-TP(2)0], the (n,m)th organic EL display element10is in the non-emission state. At the start of [period-TP(2)0] (not shown), an operation explained in the [period-TP(2)6A] and the like, which will be described later is performed.

The drive voltage VCC-H(20 volts) is applied from the power supply part100to one source/drain region of the driving transistor TRD. However, the potential of the first node ND1(the gate electrode of the driving transistor TRD) is V0fs(zero volt), and the potential of the second node ND2is VCC-M(2 volts). Accordingly, the potential difference between the second node ND2and the cathode electrode provided in the emission part ELP does not exceed the threshold voltage Vth-ELof the emission part ELP. Further, the potential difference Vgsbetween the gate electrode of the driving transistor TRDand the other source/drain region serving as the source region does not exceed the threshold voltage Vthof the driving transistor TRD. The (n,m)th organic EL display element10is in the non-emission state.

Then, the mth horizontal scan period Hmin the current display frame starts. In the [period-TP(2)1], the above mentioned step (b-1) is performed.

In embodiment 1, the second node initializing voltage VCC-Lis applied from the power supply part100to the second node ND2via the driving transistor TRD, and the first node initializing voltage V0fsis applied from the data line DTL to the first node ND1via the writing transistor TRWturned into ON-state by the signal from the scan line SCL.

Specifically, at the start of [period-TP(2)1], the scan line SCL is turned into HIGH-level to turn the writing transistor TRWinto ON-state. The voltage applied from the signal output circuit102to the data line DTL is V0fs(initialization period). As a result, the potential of the first node ND1becomes V0fs(zero volts). Further, the voltage from the power supply part100is switched from the drive voltage VCC-Hto the second node initializing voltage VCC-L(−10 volts). Since the potential difference Vgsbetween the gate electrode of the driving transistor TRDand one source/drain region serving as the source region exceeds the threshold voltage Vthof the driving transistor TRD, the second node initializing voltage VCC-Lis applied from the power supply part100to the second node ND2via the driving transistor TRD.

Since the potential difference between the first node ND1and the second node ND2is 10 volts and the threshold voltage Vthof the driving transistor TRDis 3 volts, the driving transistor TRDis in ON-state. The potential difference between the second node ND2and the cathode electrode provided in the emission part ELP is −10 volts and does not exceed the threshold voltage Vth-ELof the emission part ELP. Thereby, the preprocessing of initializing the potential of the first node ND1and the potential of the second node ND2is completed.

In the [period-TP(2)2], the above mentioned step (b-2) is performed.

In embodiment 1, via the writing transistor TRWturned into ON-state by the signal from the scan line SCL, the condition in which the first node initializing voltage V0fsis applied from the data line DTL to the first node ND1is maintained, and thereby, the potential of the first node ND1is held. Further, the drive voltage VCC-His applied from the power supply part100to one source/drain region of the driving transistor TRD, and thereby, the potential of the second node ND2is changed toward the potential obtained by subtracting the threshold voltage Vthof the driving transistor TRDfrom the potential of the first node ND1.

The operation in [period-TP(2)2] is the same as the operation in [period-TP(2)2′] described by referring toFIGS. 4 and 5C, and the explanation will be omitted. In [period-TP(2)2], the potential of the second node ND2also finally becomes (V0fs−Vth). That is, the potential of the second node ND2is determined depending only on the threshold voltage Vthof the driving transistor TRD, the voltage V0fsfor initializing the potential of the gate electrode of the driving transistor TRD, but independent of the threshold voltage Vth-EL of the emission part ELP.

At the start of the [period-TP(2)3], the writing transistor TRWis turned into OFF-state by the signal from the scan line SCL. Further, the voltage applied to the data line DTL is switched from the first node initializing voltage V0fsto the video signal VSig—m(video signal period).

The operation in [period-TP(2)3] is the same as the operation in [period-TP(2)3′] described by referring toFIGS. 4 and 5D. If the driving transistor TRDhas reached OFF-state at step (b-2), the potentials of the first node ND1and the second node ND2are substantially unchanged. Note that, if the driving transistor TRDhas not reached OFF-state at step (b-2) a bootstrap operation occurs in the [period-TP(2)3], and the potentials of the first node ND1and the second node ND2become slightly higher.

Within the period, the above mentioned step (b) is performed. The writing transistor TRWis turned into ON-state by the signal from the scan line SCL. Further, via the writing transistor TRW, the video signal VSig—mis applied from the data line DTL to the first node ND1.

The operation in [period-TP(2)4] is the same as the operation in [period-TP(2)4′] described by referring toFIGS. 4 and 5E, and the explanation will be omitted. The potential difference Vgsbetween the gate electrode and the other source/drain region serving as the source region of the driving transistor TRDis provided by the above described expression (4).

Through the above operation, step (b-1) to step (b) are completed. Then, in the [period-TP(2)5], the above mentioned step (c) and step (d) are performed.

The operation in [period-TP(2)5] is the same as the operation in [period-TP(2)5] described by referring toFIGS. 4 and 5F. While the condition in which the voltage VCC-His applied from the power supply part100to one source/drain region of the driving transistor TRDis maintained, the scan line SCL is turned into LOW-level according to the operation of the scanning circuit101, the writing transistor TRWis turned into OFF-state, and the first node ND1, i.e., the gate electrode of the driving transistor TRDis floated.

The potential of the second node ND2rises and the same phenomenon as that in the bootstrap circuit occurs in the gate electrode of the driving transistor TRD, and the potential of the first node ND1also rises. The potential of the second node ND2rises and exceeds (Vth-EL+VCat), and thereby, the emission part ELP starts to emit light. The current flowing in the emission part ELP is the drain current Idsflowing from the drain region to the source region of the driving transistor TRD, and is expressed by the expression (5). The organic EL display element10turns into the emission state and maintains the state immediately before the (m+m′)th horizontal scan period Hm+m′.

In [period-TP(2)+1] and the subsequent periods shown inFIG. 7, the above described step (b-1) to step (d) are repeatedly performed. For example, in [period-TP(2)+1], the next step (b-1) is performed. In the driving method of embodiment 1, the above step (a) is performed between the step (d) and the next step (b-1), specifically, in [period-TP(2)6A] to [period-TP(2)6C] shown inFIG. 7. The start of [period-TP(2)6A] and the end of [period-TP(2)6B] correspond to the start and the end of the initialization period in the (m+m′)th horizontal scan period Hm+m′, respectively. The start of [period-TP(2)6C] corresponds to the start of the video signal period in the (m+m′)th horizontal scan period Hm+m′.

In embodiment 1, the potential of the second node ND2is set by applying a predetermined intermediate voltage VCC-Mto the second node ND2so that the potential of the second node ND2may be higher than the potential of the second node ND2at step (b-1) (specifically, VCC-L) and the potential difference between the second node ND2and the cathode electrode provided in the emission part ELP may not exceed the threshold voltage Vth-ELof the emission part ELP. Then, the driving transistor TRDis held in OFF-state while the drive voltage VCC-His applied from the power supply part100to one source/drain region of the driving transistor TRD.

Specifically, via the driving transistor TRD, the intermediate voltage VCC-Mis applied from the power supply part100to the second node ND2, and then, the voltage of the power supply part100is switched from the intermediate voltage VCC-Mto the drive voltage VCC-H. Further, via the writing transistor TRWturned into ON-state by the signal from the scan line SCL, the first node initializing voltage V0fsis applied from the data line DTL to the first node ND1, and then, the writing transistor TRWis turned into OFF-state by the signal from the scan line SCL. As below, the operations from [period-TP(2)6A] to [period-TP(2)6C] will be explained.

At the start of [period-TP(2)6A] the voltage of the power supply part100is switched from the drive voltage VCC-Hto the intermediate voltage VCC-M(2 volts). The intermediate voltage VCC-Mis applied from the power supply part100to the second node ND2via the driving transistor TRD. The potential of the second node ND2becomes VCC-M. The organic EL display element10turns into the non-emission state. The potential of the first node ND1becomes lower according to the potential change of the second node ND2.

While the voltage of the power supply part100is maintained at the intermediate voltage VCC-M, at the start of the [period-TP(2)6B], the scan line SCL is turned into HIGH-level, and the writing transistor TRWis turned into ON-state. Via the writing transistor TRWturned into ON-state, the first node initializing voltage V0fsis applied from the data line DTL to the first node ND1. Thereby, the potential difference Vgsbetween the gate electrode and the source/drain region of the driving transistor TRDbecomes smaller than the threshold voltage Vthof the driving transistor TRD, and thus, the driving transistor TRDturns into OFF-state. Then, at the end of [period-TP(2)6B], the writing transistor TRWis turned into OFF-state by the signal from the scan line SCL. The driving transistor TRDmaintains OFF-state.

At the start of [period-TP(2)6C], the voltage of the power supply part100is switched from the intermediate voltage VCC-Mto the drive voltage VCC-H. The driving transistor TRDmaintains OFF-state. The state is maintained to immediately before [period-TP(2)+1]. The organic EL display element10also maintains the non-emission state.

Then, as shown inFIG. 7, in [period-TP(2)+1] and the subsequent periods, the same steps as those explained in the above [period-TP(2)1] to [period-TP(2)6C] are repeatedly performed. The start of [period-TP(2)+1] corresponds to the mth horizontal scan period Hmin the next frame.

In the driving method of embodiment 1 explained by referring toFIG. 7, the emission period is [period-TP(2)5], and the large part of the non-emission period is occupied by the [period-TP(2)6C]. Like the driving method of the above described reference example, in the driving method of embodiment 1, the potential of the gate electrode of the driving transistor TRDin the emission period is also higher than the potential of the channel formation region between the source/drain regions.

However, in the driving method of embodiment 1, in the [period-TP(2)6C] occupying the large part of the non-emission period, the potential of the gate electrode of the driving transistor TRDis V0fs(zero volt), the potential of one source/drain region is VCC-H(20 volts), and the potential of the other source/drain region is VCC-M(2 volts). That is, the potential of the gate electrode of the driving transistor TRDin the non-emission period is lower than the potential of the channel formation region between the source/drain regions.

As explained above, in the driving method of embodiment 1, the potential relationship between the gate electrode and the channel formation region of the driving transistor TRDis inverted between the emission period and the non-emission period, and the tendency to shift to the enhancement side due to temporal change is reduced. Further, at step (a), the potential of the second node ND2is set by applying the predetermined intermediate voltage VCC-Mto the second node ND2, and thus, the time shifting from step (d) to step (a) can be made shorter, and the emission part ELP can be driven without trouble even in the display device having a short scanning period.

Embodiment 2 also relates to a driving method of the organic electroluminescence emission part. Embodiment 2 is a modification of embodiment 1.

In the driving method of embodiment 2, the steps (b-1) to step (a) explained in embodiment 1 are also performed. Note that the driving method of embodiment 2 is different in that, in the initialization period, the signal output circuit102applies a first initializing voltage to the data line DTL as the first node initializing voltage, and then, in place of the first initializing voltage, applies a second initializing voltage lower than the first initializing voltage to the data line DTL as the first node initializing voltage.

In the following description, voltage values are as below, however, these are values only for explanation, but not limited to the values. The same is applicable to the other embodiments described later.

The driving method of embodiment 2 will be explained.FIG. 10schematically shows a drive timing chart of the emission part ELP according to embodiment 2, andFIGS. 11A to 11FandFIGS. 12A to 12Eschematically show ON/OFF states etc. of the respective transistors.

For convenience of explanation, the start of the [period-TP(2)1] shown inFIG. 10coincides with the start of the initialization period in the mth horizontal scan period Hm(the period in which the potential of the data line DTL is V0fs1or V0fs2inFIG. 10). Similarly, the end of the [period-TP(2)3A] coincides with the end of the initialization period in the horizontal scan period Hm. Further, the start of the [period-TP(2)3B] coincides with the start of the video signal period in the horizontal scan period Hm(the period in which the potential of the data line DTL is VSig—minFIG. 10).

Furthermore, in the initialization period in the horizontal scan period Hm, the period in which the signal output circuit102applies the first initializing voltage V0fs1to the data line DTL as the first node initializing voltage coincides with the period from the start of [period-TP(2)1] to the end of [period-TP(2)2]. Similarly, the period in which the signal output circuit102applies the second initializing voltage V0fs2to the data line DTL as the first node initializing voltage coincides with [period-TP(2)3A].

Moreover, the end of [period-TP(2)4] coincides with the end of the video signal period in the mth horizontal scan period Hm.

The operation in the period is the same as the operation in [period-TP(2)0] described by referring toFIGS. 7 and 8Ain embodiment 1, and the explanation will be omitted.

Then, the mth horizontal scan period Hmin the current display frame starts. In the [period-TP(2)1], the step (b-1), i.e., the above described preprocessing is performed. The operation in this period is substantially the same as the operation in [period-TP(2)1] described by referring toFIGS. 7 and 8Bin embodiment 1.

That is, at the start of [period-TP(2)1], the writing transistor TRWis turned into ON-state by the signal from the scan line SCL, and the first initializing voltage V0fs1as the first node initializing voltage is applied from the data line DTL to the first node ND1via the writing transistor TRWin ON-state to initialize the potential of the first node ND1. Further, the second node ND2voltage VCC-Lis applied from the power supply part100to one source/drain region of the driving transistor TRDand the potential of the second node ND2is initialized. Thereby, the preprocessing of initializing the potential of the first node ND1and the potential of the second node ND2is completed.

In the [period-TP(2)2], the above mentioned step (b-2) is performed.

In embodiment 2, as is the case of embodiment 1, via the writing transistor TRWturned into ON-state by the signal from the scan line SCL, the condition in which the first initializing voltage V0fs1is applied from the data line DTL to the first node ND1is maintained, and thereby, the potential of the first node ND1is held. Further, the drive voltage VCC-His applied from the power supply part100to one source/drain region of the driving transistor TRD, and thereby, the potential of the second node ND2is changed toward the potential obtained by subtracting the threshold voltage Vthof the driving transistor TRDfrom the potential of the first node ND1.

The operation in the period is substantially the same as the operation in [period-TP(2)2] described by referring toFIGS. 7 and 8Cin embodiment 1, and the explanation will be omitted. The potential of the second node ND2finally becomes (V0fs1−Vth).

At the start of the [period-TP(2)3A], the writing transistor TRWis turned into OFF-state by the signal from the scan line SCL. Further, the voltage applied to the data line DTL is switched from the first initializing voltage V0fs1to the second initializing voltage V0fs2. If the driving transistor TRDhas sufficiently reached OFF-state at step (b-2) and the influence by the parasitic capacity and the like can be neglected, the potentials of the first node ND1and the second node ND2are substantially unchanged.

At the start of the [period-TP(2)3B], the voltage applied to the data line DTL is switched from the second initializing voltage V0fs2to the video signal VSig—m(video signal period). Further, the OFF-state of the writing transistor TRWis maintained. The potentials of the first node ND1and the second node ND2are substantially unchanged.

Within the period, the above mentioned step (b) is performed. The writing transistor TRWis turned into ON-state by the signal from the scan line SCL. Further, via the writing transistor TRW, the video signal VSig—mis applied from the data line DTL to the first node ND1.

The operation in the period is the same as the operation in [period-TP(2)4] described by referring toFIGS. 7 and 8E, and the explanation will be omitted. The potential difference Vgsbetween the gate electrode and the other source/drain region serving as the source region of the driving transistor TRDis given by the above described expression (4).

Through the above operation, step (b-1) to step (b) are completed. Then, in the [period-TP(2)5], the above mentioned step (c) and step (d) are performed.

The operation in the period is the same as the operation in [period-TP(2)4] described by referring toFIGS. 7 and 8F, and the explanation will be omitted. The emission part ELP starts to emit light. The current flowing in the emission part ELP is the drain current Idsflowing from the drain region to the source region of the driving transistor TRD, and is given by the expression (5). The organic EL display element10turns into the emission state and maintains the state immediately before the (m+m′)th horizontal scan period Hm+m′.

As is the case described in embodiment 1, in [period-TP(2)+1] and the subsequent periods shown inFIG. 10, the above described step (b-1) to step (d) are repeatedly performed. For example, in [period-TP(2)+1], the next step (b-1) is performed. In the driving method of embodiment 2, the above step (a) is performed between the step (d) and the next step (b-1), specifically, in [period-TP(2)6A] to [period-TP(2)6C] shown inFIG. 10. The start of [period-TP(2)6A] and the end of [period-TP(2)6C] correspond to the start and the end of the initialization period in the (m+m′)th horizontal scan period Hm+m′, respectively. The start of [period-TP(2)6D] corresponds to the start of the video signal period in the (m+m′)th horizontal scan period Hm+m′.

In embodiment 2, the potential of the second node ND2is set by applying a predetermined intermediate voltage VCC-Mto the second node ND2so that the potential of the second node ND2may be higher than the potential of the second node ND2at step (b-1) (specifically, VCC-L) and the potential difference between the second node ND2and the cathode electrode provided in the emission part ELP may not exceed the threshold voltage Vth-ELof the emission part ELP. Then, the driving transistor TRDis held in the OFF-state while the drive voltage VCC-His applied from the power supply part100to one source/drain region of the driving transistor TRD.

Specifically, via the driving transistor TRD, the intermediate voltage VCC-Mis applied from the power supply part100to the second node ND2, and then, the voltage of the power supply part100is switched from the intermediate voltage VCC-Mto the drive voltage VCC-H. Further, via the writing transistor TRWturned into ON-state by the signal from the scan line, the first initializing voltage V0fs1and the second initializing voltage V0fs2as the first node initializing voltages are applied from the data line DTL to the first node ND1, and then, the writing transistor TRWis turned into OFF-state by the signal from the scan line SCL. As below, the operations in [period-TP(2)6A] to [period-TP(2)6D] will be explained.

At the start of [period-TP(2)6A] the voltage of the power supply part100is switched from the drive voltage VCC-Hto the intermediate voltage VCC-M(2 volts). The intermediate voltage VCC-Mis applied from the power supply part100to the second node ND2via the driving transistor TRD. The potential of the second node ND2becomes VCC-M. The organic EL display element10turns into the non-emission state. The potential of the first node ND1becomes lower according to the potential change of the second node ND2.

While the voltage of the power supply part100is maintained at the intermediate voltage VCC-M, at the start of the [period-TP(2)6B], the scan line SCL is turned into HIGH-level, and the writing transistor TRWis turned into ON-state. Via the writing transistor TRWturned into ON-state, the first initializing voltage V0fs1(zero volt) is applied from the data line DTL to the first node ND1. Thereby, the potential difference Vg, between the gate electrode and the source/drain region of the driving transistor TRDbecomes smaller than the threshold voltage Vthof the driving transistor TRD, and thus, the driving transistor TRDturns into OFF-state. Then, the ON-state of the writing transistor TRWis maintained to the end of the next [period-TP(2)6C].

At the start of [period-TP(2)6C], via the writing transistor TRWturned into ON-state, the second initializing voltage V0fs2(−2 volts) is applied from the data line DTL to the first node ND1. The potential of the first node ND1changes from V0fs1to V0fs2. The driving transistor TRDmaintains OFF-state.

At the start of [period-TP(2)6D], the voltage of the power supply part100is switched from the intermediate voltage VCC-Mto the drive voltage VCC-H. The driving transistor TRDmaintains OFF-state. The condition is maintained to immediately before [period-TP(2)+1]. The organic EL display element10also maintains the non-emission state.

Then, as shown inFIG. 10, in [period-TP(2)+1] and the subsequent periods, the same steps as those explained in the above [period-TP(2)1] to [period-TP(2)6D] are repeatedly performed. The start of [period-TP(2)+1] corresponds to the start of the mth horizontal scan period Hmin the next frame.

In the driving method of embodiment 2, the emission period is [period-TP(2)5], and the large part of the non-emission period is occupied by the [period-TP(2)6D]. The potential of the gate electrode of the driving transistor TRDin the emission period is higher than the potential of the channel formation region between the source/drain regions. However, in the [period-TP(2)6D] occupying the large part of the non-emission period, the potential of the gate electrode of the driving transistor TRDis V0fs2(−2 volts), the potential of one source/drain region is VCC-H(20 volts), and the potential of the other source/drain region is VCC-M(2 volts). That is, the potential of the gate electrode of the driving transistor TRDin the non-emission period is lower than the potential of the channel formation region between the source/drain regions.

In the driving method of embodiment 2, the potential relationship between the gate electrode of the driving transistor TRDand the channel formation region is also inverted between the emission period and the non-emission period, and the tendency to shift to the enhancement side due to temporal change is reduced.

In the driving method of embodiment 1, in [period-TP(2)6C] shown inFIG. 7, the potential of the gate electrode of the driving transistor TRDis V0fs(zero volt). On the other hand, in the driving method of embodiment 2, in [period-TP(2)6D] occupying the large part of the non-emission period, the potential of the gate electrode of the driving transistor TRDis V0fs2(−2 volts). That is, compared to the driving method of embodiment 1, the potential of the gate electrode of the driving transistor TRDin the non-emission period can be made lower than the potential of the channel formation region between the source/drain regions. Therefore, the tendency of the driving transistor TRDto shift to the enhancement side due to temporal change is further reduced.

Embodiment 3 also relates to a driving method of the organic electroluminescence emission part. In embodiment 3, the drive circuit11includes three-transistors/one-capacity part (3Tr/IC drive circuit).FIG. 13is a conceptual diagram of an organic EL display device according to embodiment 3, andFIG. 14is an equivalent circuit diagram of the organic electroluminescence display element10including the drive circuit11.

First, the details of the drive circuit and the emission part will be explained.

Like the above described 2Tr/IC drive circuit, the 3Tr/IC drive circuit includes two transistors of the writing transistor TRWand the driving transistor TRD, and further includes one capacity part C1. In addition, the 3Tr/1C drive circuit further includes a first transistor TR1.

The configuration of the driving transistor TRDis the same as the configuration of the driving transistor TRDdescribed in embodiment 1, and the detailed explanation will be omitted. Note that, in embodiment 1, the potential of the second node ND2is initialized by applying the voltage VCC-Lfrom the power supply unit100to one source/drain region of the driving transistor TRD. On the other hand, in embodiment 3, as will be described later, the potential of the second node ND2is initialized using the first transistor TR1. Therefore, in embodiment 3, for initialization of the potential of the second node ND2, it is unnecessary to apply the voltage VCC-Lfrom the power supply unit100. On this account, the power supply unit100applies a constant voltage VCCin embodiment 3.

The configuration of the writing transistor TRWis the same as the configuration of the writing transistor TRWdescribed in embodiment 1, and the detailed explanation will be omitted. Like the embodiment 1, from the signal output circuit102via the data line DTL, the video signal (drive signal, luminance signal) VSigfor controlling the luminance in the emission part ELP and further the first node initializing voltage V0fsare supplied to the one source/drain region.

In the first transistor TR1,

(C-1) the other source/drain region is connected to the second node ND2,

(C-2) a second node initializing voltage VSS-Lor an intermediate voltage VSS-Mis applied to one source/drain region, and

(C-3) the gate electrode is connected to a first transistor control line AZ1. The voltage VSS-Land the voltage VSS-Mwill be described later.

The conductivity type of the first transistor TR1is not particularly limited. In embodiment 3, the first transistor TR1includes an n-channel transistor, for example. The ON-state/OFF-state of the first transistor TR1is controlled by a signal from the first transistor control line AZ1. More specifically, the first transistor control line AZ1is connected to a first transistor control circuit103. Further, according to the operation of the first transistor control circuit103, the first transistor control line AZ1is turned into LOW-level or HIGH-level, and the first transistor TR1is turned into ON-state or OFF-state. One source/drain region of the first transistor TR1is connected to a power supply line PS3. One end of the power supply line PS3is connected to a second power supply part104. According to the operation of the second power supply part104, the voltage VSS-Lor the voltage VSS-Mis appropriately applied to the power supply line PS3.

The configuration of the emission part ELP is the same as the configuration of the emission part ELP described in embodiment 1, and the detailed explanation will be omitted.

Next, a driving method of embodiment 3 will be explained.

In the description as below, the value of the voltage VCC, the value of the voltage. VSS-L, and the value of the voltage VSS-Mare set as follows. However, they are values only for explanation and not limited to the values. The same is applicable to the other embodiments, which will be described later.

VCC: drive voltage for flowing current in emission part ELP, 20 volts

VSS-L: second node initializing voltage for initializing potential of second node ND2, −10 volts

FIG. 15schematically shows a drive timing chart of the emission part ELP according to embodiment 3, andFIGS. 16A to 16FandFIGS. 17A to 17Cschematically show ON/OFF states etc. of the respective transistors.

From the driving method of embodiment 1, the driving method of embodiment 3 is mainly different in that the power supply part100applies the constant voltage VCCand the potential of the second node ND2is initialized using the first transistor TR1. The respective periods of [period-TP(3)0] to [period-TP(3)+5] shown inFIG. 15correspond to the respective periods of [period-TP(2)0] to [period-TP(2)+5] shown inFIG. 7referred to in embodiment 1.

In the organic EL display device of embodiment 3, in the respective horizontal scan periods, the first node initializing voltage V0fsis applied from the signal output circuit102to the data line DTL, and then, the video signal VSigis applied thereto in place of the first node initializing voltage V0fs. The details are the same as those described in embodiment 1. The relationships between the initialization periods and the video signal periods in the respective horizontal scan periods and the respective periods of [period-TP(3)0] to [period-TP(3)+5] are the same as those described with respect to [period-TP(2)0] to [period-TP(2)+5] shown inFIG. 7in embodiment 1, and the explanation will be omitted.

As below, the respective periods of [period-TP(3)0] to [period-TP(3)+5] will be explained.

The [period-TP(3)0] is for an operation from the previous display frame to the current display frame, for example. That is, the period [period-TP(3)0] is a period from the start of the (m+m′)th horizontal scan period in the previous display frame to the (m−1)th horizontal scan period in the current display frame. Further, in the [period-TP(3)0], the (n,m)th organic EL display element10is in the non-emission state. At the start of [period-TP(3)0] (not shown), the operation described later in [period-TP(3)6A] and the like is performed. Except that the first transistor TR1is in OFF-state, the operation in the period is substantially the same as that in [period-TP(2)0] described in embodiment 1.

Then, the mth horizontal scan period Hmin the current display frame starts. In the [period-TP(3)1], the above mentioned step (b-1) is performed.

In embodiment 3, unlike embodiment 1, via the first transistor TR1turned into ON-state by the first transistor control line AZ1, the second node initializing voltage VSS-Lis applied to the second node ND2. Note that, like embodiment 1, via the writing transistor TRWturned into ON-state by the signal from the scan line SCL, the first node initializing voltage V0fsis applied from the data line DTL to the first node ND1.

Specifically, at the start of [period-TP(3)1], the scan line SCL is turned into HIGH-level to turn the writing transistor TRWinto ON-state. The voltage applied from the signal output circuit102to the data line DTL is V0fs(initialization period). As a result, the potential of the first node ND1becomes V0fs(zero volts). Further, the first transistor TR1is turned into ON-state by the signal from the first transistor control line AZ1. The second node initializing voltage VSS-Lis applied to the second node ND2via the first transistor TR1in ON-state.

Also the drive voltage VCCis applied to the second node ND2via the driving transistor TRD. Accordingly, the potential of the second node ND2is determined by the voltage VSS-Land the voltage VCC, and the value of the on-resistance of the first transistor TR1and the value of the on-resistance of the driving transistor TRD. Here, if the on-resistance of the first transistor TR1is sufficiently low, the potential of the second node ND2becomes lower to nearly VSS-L. As below, for convenience, the explanation will be made assuming that the potential of the second node ND2is VSS-L. Further,FIG. 15shows the case where, when the first transistor TR1is in ON-state, the potential of the second node ND2is VSS-L. The same is applicable toFIG. 18, which will be referred to in embodiment 4.

Since the potential difference between the first node ND1and the second node ND2is 10 volts and the threshold voltage Vthof the driving transistor TRDis 3 volts, the driving transistor TRDis in ON-state. The potential difference between the second node ND2and the cathode electrode provided in the emission part ELP is −10 volts and does not exceed the threshold voltage Vth-ELof the emission part ELP. Thereby, the preprocessing of initializing the potential of the first node ND1and the potential of the second node ND2is completed.

At the start of the [period-TP(3)2], the first transistor TR1is turned into OFF-state by the signal from the first transistor control line AZ1. To the start of [period-TP(3)5], which will be described later, OFF-state of the first transistor TR1is maintained.

In the [period-TP(3)2], the above mentioned step (b-2) is performed. The operation in this period is substantially the same as the operation described with respect to [period-TP(2)2] in embodiment 1, and the explanation will be omitted.FIG. 16Ccorresponds toFIG. 8C.

At the start of the [period-TP(3)3], the writing transistor TRWis turned into OFF-state by the signal from the scan line SCL. Further, the voltage applied to the data line DTL is switched from the first node initializing voltage V0fsto the video signal VSig—m(video signal period). The operation in this period is substantially the same as the operation described with respect to [period-TP(2)3] in embodiment 1, and the explanation will be omitted.FIG. 16Dcorresponds toFIG. 8D.

Within the period, the above mentioned step (b) is performed. The writing transistor TRWis turned into ON-state by the signal from the scan line SCL. Further, via the writing transistor TRW, the video signal VSig—m, is applied from the data line DTL to the first node ND1. The operation in this period is substantially the same as the operation described with respect to [period-TP(2)4] in embodiment 1, and the explanation will be omitted.FIG. 16Ecorresponds toFIG. 8E.

Through the above operation, step (b-1) to step (b) are completed. Then, in the [period-TP(3)5], the above mentioned step (c) and step (d) are performed. The operation in this period is substantially the same as the operation described with respect to [period-TP(2)5] in embodiment 1, and the explanation will be omitted.FIG. 16Fcorresponds toFIG. 8F.

In [period-TP(3)+1] and the subsequent periods shown inFIG. 15, the above described step (b-1) to step (d) are repeatedly performed. For example, in [period-TP(3)+1], the next step (b-1) is performed. In the driving method of embodiment 3, the above step (a) is performed between the step (d) and the next step (b-1), specifically, in [period-TP(3)6A] to [period-TP(3)6C] shown inFIG. 15.

In embodiment 3 as well, the potential of the second node ND2is set by applying the predetermined intermediate voltage VSS-Mto the second node ND2so that the potential of the second node ND2may be higher than the potential of the second node ND2at step (b-1) (specifically, VSS-L) and the potential difference between the second node ND2and the cathode electrode provided in the emission part ELP may not exceed the threshold voltage Vth-ELof the emission part ELP. Then, the driving transistor TRDis held in OFF-state while the drive voltage VCCis applied from the power supply part100to one source/drain region of the driving transistor TRD.

Specifically, via the first transistor TR1turned into ON-state by the signal from the first transistor control line AZ1, the intermediate voltage VSS-Mis applied to the second node ND2. Further, via the writing transistor TRWturned into ON-state by the signal from the scan line SCL, the first node initializing voltage V0fsis applied from the data line DTL to the first node ND1, and then, the writing transistor TRWis turned into OFF-state by the signal from the scan line SCL.

As below, the operations from [period-TP(3)6A] to [period-TP(3)6C] will be explained.

At the start of [period-TP(3)6A] via the first transistor TR1turned into ON-state by the signal from the first transistor control line AZ1, the intermediate voltage VSS-Mis applied to the second node ND2. To the end of [period-TP(3)6B] described later, ON-state of the first transistor TR1is maintained.

As is the case described in [period-TP(3)1], also the drive voltage VCCis applied to the second node ND2via the driving transistor TRD. Accordingly, the potential of the second node ND2is determined by the voltage VSS-Mand the voltage VCC, and the value of the on-resistance of the first transistor TR1and the value of the on-resistance of the driving transistor TRD. Here, if the value of the on-resistance of the first transistor TR1, is sufficiently low, the potential of the second node ND2becomes lower to nearly VSS-M. As below, for convenience, the explanation will be made assuming that the potential of the second node ND2is VSS-M. Further,FIG. 15shows the case where, when the first transistor TR1is in ON-state, the potential of the second node ND2is VSS-M. The same is applicable toFIG. 18, which will be referred to in embodiment 4.

The potential of the second node ND2becomes VSS-M. The organic EL display element10turns into the non-emission state. The potential of the first node ND1becomes lower according to the potential change of the second node ND2.

At the start of the [period-TP(3)6B], the scan line SCL is turned into HIGH-level, and the writing transistor TRWis turned into ON-state. Via the writing transistor TRWturned into ON-state, the first node initializing voltage V0fsis applied from the data line DTL to the first node ND1. Thereby, the potential difference Vgsbetween the gate electrode and the source/drain region of the driving transistor TRDbecomes smaller than the threshold voltage Vthof the driving transistor TRD, and thus, the driving transistor TRDturns into OFF-state.

At the start of [period-TP(3)sc], the writing transistor TRWis turned into OFF-state by the signal from the scan line SCL, and the first transistor TR1is turned into OFF-state by the signal from the first transistor control line AZ1. The driving transistor TRDmaintains OFF-state. The state is maintained to immediately before [period-TP(3)+1]. The organic EL display element10also maintains the non-emission state.

Then, as shown inFIG. 15, in [period-TP(3)+1] and the subsequent periods, the same steps as those explained in the above [period-TP(3)1] to [period-TP(3)6C] are repeatedly performed. The start of [period-TP(3)+1] corresponds to the start of the mth horizontal scan period Hmin the next frame.

In the driving method of embodiment 3, in the [period-TP(3)6C] occupying the large part of the non-emission period, the potential of the gate electrode of the driving transistor TRDis V0fs(zero volt), the potential of the one source/drain region is VCC(20 volts), and the potential of the other source/drain region is VSS-M(2 volts). That is, the potential of the gate electrode of the driving transistor TRDin the non-emission period is lower than the potential of the channel formation region between the source/drain regions.

Therefore, as is the case explained in the driving method of embodiment 1, the potential relationship between the gate electrode of the driving transistor TRDand the channel formation region is inverted between the emission period and the non-emission period, and the tendency to shift to the enhancement side due to temporal change is reduced. Further, at step (a), the potential of the second node ND2is set by applying the predetermined intermediate voltage VSS-Mto the second node ND2, and thus, the time shifting from step (d) to step (a) can be made shorter, and the emission part ELP can be driven without trouble even in the display device having a short scanning period.

Embodiment 4 also relates to a driving method of the organic electroluminescence emission part. Embodiment 4 is a modification of embodiment 3 and also a modification of embodiment 2. The relationship of embodiment 4 to embodiment 3 corresponds to the relationship of embodiment 2 to embodiment 1. That is, embodiment 4 is different in that, in the initialization period, the signal output circuit102applies the first initializing voltage V0fs1to the data line DTL as the first node initializing voltage, and then, in place of the first initializing voltage V0fs1, applies the second initializing voltage V0fs2lower than the first initializing voltage to the data line DTL as the first node initializing voltage.

The conceptual diagram of an organic EL display device according to embodiment 4 is the same asFIG. 13and the equivalent circuit diagram of the organic EL display element10including the drive circuit11is the same asFIG. 14. The respective component elements forming the display device of embodiment 4 are the same as those described in embodiment 3, and the explanation will be omitted.

FIG. 18schematically shows a drive timing chart of the emission part ELP according to embodiment 4, andFIGS. 19A to 19Eschematically show ON/OFF states etc. of the respective transistors.

From the driving method of embodiment 2, the driving method of embodiment 4 is mainly different in that the power supply part100applies the constant voltage VCCand the potential of the second node ND2is initialized using the first transistor TR1. The respective periods of [period-TP(3)0] to [period-TP(3)+5] shown inFIG. 18correspond to the respective periods of [period-TP(2)0] to [period-TP(2)+5] shown inFIG. 10referred to in embodiment 10. The relationships between the initialization periods and the video signal periods in the respective horizontal scan periods and the respective periods of [period-TP(3)0] to [period-TP(3)+5] are the same as those described with respect to [period-TP(2)0] to [period-TP(2)+5] shown inFIG. 10in embodiment 2, and the explanation will be omitted.

The operation in this period is the same as that described by referring toFIGS. 15 and 16Ain embodiment 3, and the explanation will be omitted.

The mth horizontal scan period Hmin the current display frame starts. In the [period-TP(3)1], the above mentioned step (b-1) is performed. The operation in this period is the same as the operation of [period-TP(3)1] described by referring toFIGS. 15 and 16Bin embodiment 3 in which the voltage V0fsis read into V0fs1, and the explanation will be omitted.

At the start of the [period-TP(3)2], the first transistor TR1is turned from ON-state into OFF-state by the signal from the first transistor control line AZ1. To the end of [period-TP(3)5], which will be described later, OFF-state of the first transistor TR1is maintained.

The operations in [period-TP(3)2] to [period-TP(3)4] as shown inFIG. 18are substantially the same as the operations in [period-TP(2)2] to [period-TP(2)4] described by referring toFIG. 10in embodiment 2 except that there is a difference in that the first transistor TR1is in OFF-state, and the explanation will be omitted.

Through the above operation, step (b-1) to step (b) are completed. Then, in the [period-TP(3)5], the above mentioned step (c) and step (d) are performed. The operation in this period is substantially the same as the operation in [period-TP(2)5] described by referring toFIG. 10in embodiment 2 except that there is a difference in that the first transistor TR1is in OFF-state, and the explanation will be omitted. The emission part ELP starts to emit light. The current flowing in the emission part ELP is the drain current Idsflowing from the drain region to the source region of the driving transistor TRD, and is given by the expression (5). The organic EL display element10turns into the emission state and maintains the state immediately before the (m+m′)th horizontal scan period Hm+m′.

As is the case described in embodiment 2, in [period-TP(3)+1] and the subsequent periods shown inFIG. 18, the above described step (b-1) to step (d) are repeatedly performed. For example, in [period-TP(3)+1], the next step (b-1) is performed. In the driving method of embodiment 4, the above step (a) is performed between the step (d) and the next step (b-1), specifically, in [period-TP(3)6A] to [period-TP(3)6D] shown inFIG. 18.

In embodiment 4 as well, the potential of the second node ND2is set by applying the predetermined intermediate voltage VSS-Mto the second node ND2so that the potential of the second node ND2may be higher than the potential of the second node ND2at step (b-1) (specifically, VSS-L) and the potential difference between the second node ND2and the cathode electrode provided in the emission part ELP may not exceed the threshold voltage Vth-ELof the emission part ELP. Then, the driving transistor TRDis held in OFF-state while the drive voltage VCCis applied from the power supply part100to one source/drain region of the driving transistor TRD.

Specifically, via the first transistor TR1turned into ON-state by the signal from the first transistor control line AZ1, the intermediate voltage VSS-Mis applied to the second node ND2. Further, via the writing transistor TRWturned into ON-state by the signal from the scan line SCL, the first initializing voltage V0fs1and the second initializing voltage V0fs1as the first node initializing voltages are applied from the data line DTL to the first node ND1, and then, the writing transistor TRWis turned into OFF-state by the signal from the scan line SCL. As below, the operations from [period-TP(3)6A] to [period-TP(3)6D] will be explained.

At the start of [period-TP(3)6A], the first transistor TR1is turned into ON-state by the signal from the first transistor control line AZ1. The intermediate voltage VSS-Mis applied to the second node ND2via the first transistor TR1. The potential of the second node ND2becomes VSS-M. The organic EL display element10turns into the non-emission state. The potential of the first node ND1becomes lower according to the potential change of the second node ND2.

While ON-state of the first transistor TR1is maintained, at the start of the [period-TP(3)6B] the scan line SCL is turned into HIGH-level, and the writing transistor TRWis turned into ON-state. Via the writing transistor TRWturned into ON-state, the first node initializing voltage V0fs1(zero volts) is applied from the data line DTL to the first node ND1. Thereby, the potential difference Vgsbetween the gate electrode and the source/drain region of the driving transistor TRDbecomes smaller than the threshold voltage Vthof the driving transistor TRD, and thus, the driving transistor TRDturns into OFF-state. To the end of the next [period-TP(3)6C], ON-state of the writing transistor TRWis maintained.

At the start of [period-TP(3)6C], Via the writing transistor TRWturned into ON-state, the second initializing voltage V0fs2(−2 volts) is applied from the data line DTL to the first node ND1. The potential of the first node ND1changes from V0fs1to V0fs2. The driving transistor TRDmaintains OFF-state.

At the start of [period-TP(3)6D], the writing transistor TRWis turned into OFF-state by the signal from the scan line SCL, and the first transistor TR1is turned into OFF-state by the signal from the first transistor control line AZ1. The driving transistor TRDmaintains OFF-state. The state is maintained to immediately before [period-TP(3)+1]. The organic EL display element10also maintains the non-emission state.

In the driving method of embodiment 4, in the [period-TP(3)6D] occupying the large part of the non-emission period, the potential of the gate electrode of the driving transistor TRDis V0fs2(−2 volts), the potential of the one source/drain region is VCC(20 volts), and the potential of the other source/drain region is VSS-M(2 volts). That is, the potential of the gate electrode of the driving transistor TRDin the non-emission period is lower than the potential of the channel formation region between the source/drain regions.

Therefore, as is the case explained in the driving method of embodiment 1, the potential relationship between the gate electrode of the driving transistor TRDand the channel formation region is inverted between the emission period and the non-emission period, and the tendency to shift to the enhancement side due to temporal change is reduced. Further, at step (a), the potential of the second node ND2is set by applying the predetermined intermediate voltage VSS-Mto the second node ND2, and thus, the time shifting from step (d) to step (a) can be made shorter, and the emission part ELP can be driven without trouble even in the display device having a short scanning period.

In the driving method of embodiment 3, in [period-TP(3)6C] shown inFIG. 10, the potential of the gate electrode of the driving transistor TRDis V0fs(zero volt). On the other hand, in the driving method of embodiment 4, in [period-TP(3)6D] occupying the large part of the non-emission period, the potential of the gate electrode of the driving transistor TRDis V0fs2(−2 volts). That is, compared to the driving method of embodiment 3, the potential of the gate electrode of the driving transistor TRDin the non-emission period can be made lower than the potential of the channel formation region between the source/drain regions. Therefore, the tendency of the driving transistor TRDto shift to the enhancement side due to temporal change is further reduced.

Embodiment 5 also relates to a driving method of the organic electroluminescence emission part. Embodiment 5 is modifications of embodiment 3 and embodiment 4. In embodiment 5, the drive circuit11includes four-transistors/one-capacity part (4Tr/1C drive circuit).FIG. 20is a conceptual diagram of an organic EL display device according to embodiment 5, andFIG. 21is an equivalent circuit diagram of the organic electroluminescence display element10including the drive circuit11.

First, the details of the drive circuit will be explained.

Like the above described 3Tr/1C drive circuit, the 4Tr/1C drive circuit includes three transistors of the writing transistor TRW, the driving transistor TRD, and a first transistor TR1, and one capacity part C1. In addition, the 4Tr/1C drive circuit further includes a second transistor TR2.

The configuration of the driving transistor TRDis the same as the configuration of the driving transistor TRDdescribed in embodiment 1, and the detailed explanation will be omitted. As is the case described in embodiment 3, the power supply unit100applies the constant voltage VCCto one source-drain region of the drive transistor.

The configuration of the writing transistor TRWis the same as the configuration of the writing transistor TRWdescribed in embodiment 1, and the detailed explanation will be omitted.

The configuration of the first transistor TR1is the same as the configuration of the writing transistor TRWdescribed in embodiment 3, and the detailed explanation will be omitted.

The drive circuit11of embodiment 5 further includes the second transistor TR2, and the power supply part100and one source/drain region of the driving transistor TRDare connected via the second transistor TR2. Further, embodiment 5 is different from embodiment 3 and embodiment 4 in that, when the first transistor TR1is in ON-state, the second transistor TR2is turned into OFF-state.

Specifically, in the second transistor TR2.

(D-1) one source/drain region is connected to the power supply part100,

(D-2) the other source/drain region is connected to the one source/drain region of the driving transistor TRD, and

(D-3) the gate electrode is connected to a second transistor control line CL. The end of the second transistor control line CL is connected to a second transistor control circuit105.

In embodiment 3, the explanation that, when the second node initializing voltage VSSis applied to the second node ND2via the first transistor TR1in ON-state, also the drive voltage VCCis applied to the second node ND2via the driving transistor TRDis made. In this case, there is a problem that a through current flows via the driving transistor TRDand the first transistor TR1.

Accordingly, in embodiment 5, when the first transistor TR1is turned into ON-state in the operations described in embodiment 3 and embodiment 4, the second transistor TR2is turned into OFF-state according to the signal from the second transistor control circuit105.

As an example,FIGS. 22A to 22Cschematically show ON/OFF states etc. of the respective transistors when the operations corresponding to the respective periods of [period-TP(3)0] to [period-TP(3)2] shown inFIG. 15referred to in embodiment 3 are performed.

As above, the operation of embodiment 5 has been explained compared to the operation in embodiment 3, however, the operation is not limited to that. Compared to the operation of embodiment 4 as well, when the first transistor TR1is in ON-state, a through current is prevented from flowing by turning the second transistor TR2into OFF-state.

As above, the preferred embodiments of the invention have been explained, however, the embodiments of the invention are not limited to those. The configurations and structures of the organic EL display device, the organic EL element, various component elements forming the drive circuit, and the steps in the driving method of the emission part are just examples, and may be appropriately changed.

In embodiment 1 to embodiment 5, the voltage V0fsand the like are applied to the first node ND1via the data line DTL. On the other hand, for example, as shown inFIG. 23, the voltage V0fsand the like may be applied to the first node ND1using a third transistor TR3connected to the first node ND1.

The present application contains subject matter related to that disclosed in Japanese Priority Patent Application JP 2009-000664 filed in the Japan Patent Office on Jan. 6, 2009, the entire contents of which is hereby incorporated by reference.