Tunable reactance circuits for wireless power systems

Disclosed herein are tunable reactance circuits configured to present a tunable or variable capacitive reactance when energized. The circuits can include a switch configured to be controlled by a gate driver, the gate driver configured to receive a control signal indicating an on-time of the switch; a diode coupled antiparallel to a switch; and one or more capacitors coupled in parallel to the diode. The tunable capacitive reactance can be based on the on-time of the switch and a total capacitance value of the one or more capacitors. The exemplary tunable reactance circuits may be used in wireless power transmitters and/or receivers for efficient power transmission and/or to deliver a particular level of power to a load.

TECHNICAL FIELD

The following disclosure is directed to tunable impedance circuits and, more specifically, tunable reactance circuits for wireless power systems.

BACKGROUND

Wireless power systems can include one or more wireless power transmitters configured to transmit power to one or more wireless power receivers via an oscillating electromagnetic field. Wireless power receivers can be coupled to one or more batteries such that the received power is used to charge the batteries. Wireless power systems can be configured to power various electronic devices (e.g., phones, laptops, medical devices, vehicles, robots, etc.).

SUMMARY

In one aspect, the disclosure features an exemplary tunable reactance circuit configured to present a tunable or variable capacitive reactance when energized. An exemplary tunable reactance circuit can include a switch configured to be controlled by a gate driver, in which the gate driver is configured to receive a control signal indicating an on-time of the switch (e.g., over the period of the driving current); a diode coupled antiparallel to the switch; and one or more capacitors coupled in parallel to the diode, wherein the tunable capacitive reactance can be based on the on-time of the switch and a total capacitance value of the one or more capacitors.

Various embodiments of the exemplary tunable reactance circuit can include one or more of the following features. The tunable reactance circuit is configured to present a tunable capacitive reactance when energized by an alternating current. A capacitance value Ceqof the tunable reactance circuit can be defined by:

Ceq=Ctotal·22-(2⁢⁢φ-sin⁢⁢2⁢⁢φ)/π
in which Ctotalis the total capacitance value and φ is a phase angle. In some embodiments, the phase angle is between 90° and 180°. In some embodiments, the phase angle is between 0° and 180°. The on-time of the switch can be based on the phase angle. The tunable reactance circuit can be configured to present a continuously tunable capacitive reactance between a first capacitive reactance and a second capacitive reactance. The tunable reactance circuit can be configured to present a discretely tunable capacitive reactance between a first capacitive reactance and a second capacitive reactance. The switch can be a metal-oxide semiconductor field-effect transistor (MOSFET).

In another aspect, the disclosure features a system including at least one tunable reactance circuit configured to present a tunable capacitive reactance when energized. The exemplary tunable reactance circuit can include a switch configured to be controlled by a gate driver, in which the gate driver is configured to receive a control signal indicating an on-time of the switch (e.g., over the period of the driving current); a diode coupled antiparallel to the switch; and one or more capacitors coupled in parallel to the diode. The tunable capacitive reactance can be based on the on-time of the switch and a total capacitance value of the one or more capacitors.

Various embodiments of the exemplary system can include one or more of the following features. A capacitance value Ceqof the tunable reactance circuit is defined by:

Ceq=Ctotal·22-(2⁢⁢φ-sin⁢⁢2⁢⁢φ)/π
wherein Ctotalis the total capacitance value and φ is a phase angle (i) between 90° and 180° or (ii) between 0° and 180°, and wherein the on-time of the switch is based on the phase angle. The tunable reactance circuit can be configured to present a continuously or discretely tunable capacitive reactance between a first capacitive reactance and a second capacitive reactance. The switch can be a MOSFET and the diode is a body diode of the MOSFET. The exemplary system can include a driving circuit configured to output a driving signal at an operating frequency, and a resonator configured to generate an electromagnetic field based on the driving signal. The tunable reactance circuit is configured to present a tunable capacitive reactance when energized by an alternating current.

The gate driver can be coupled to a bootstrap power supply, in which the bootstrap power supply can include a bootstrap capacitor configured to charge during conduction of at least a portion of the driving circuit (e.g., low-side switch conduction time). The driving circuit can be an inverter. The transmitter can further include an auxiliary power source configured to energize one or more gate drivers of the inverter and the gate driver of the tunable reactance circuit. The auxiliary power source can be an isolated DC-DC converter. The tunable reactance circuit can be configured to present a capacitive reactance based on a reflected impedance at the transmitter. The tunable reactance circuit can be configured to present a capacitive reactance based on a power characteristic of the transmitter. The transmitter can further include an inductor coupled between the tunable reactance circuit and the resonator.

The tunable reactance circuit can be configured to present a continuously tunable capacitive reactance between a first capacitive reactance and a second capacitive reactance. The tunable reactance circuit can be configured to present a discretely tunable capacitive reactance between a first capacitive reactance and a second capacitive reactance. The switch can be a metal-oxide semiconductor field-effect transistor (MOSFET). The output power from the transmitter can be based on the output reactance of the tunable reactance circuit. The at least one tunable reactance circuit includes a first tunable reactance circuit and a second tunable reactance circuit, and the driving circuit has a second output node coupled to an input of the second tunable reactance circuit and the resonator has a second input node coupled to an output of the second tunable reactance circuit. A capacitance value of the first tunable reactance circuit is equal to a capacitance value of the second tunable reactance circuit.

The system can include a resonator having a first output node coupled to an input of the tunable reactance circuit; and a rectifier coupled to an output of the tunable reactance circuit. The tunable reactance circuit is configured to present a tunable capacitive reactance when energized by an alternating current. The gate driver can be coupled to a bootstrap power supply, in which the bootstrap power supply can include a bootstrap capacitor configured to charge during conduction of at least a portion of the rectifier (e.g., during the low-side diode conduction time). The receiver can include an auxiliary power source configured to energize the gate driver of the tunable reactance circuit. The auxiliary power source can be an isolated DC-DC converter. The tunable reactance circuit can be configured to present a capacitive reactance to modify the reflected impedance of the receiver. The tunable reactance circuit can be configured to present a capacitive reactance based on a power characteristic of the receiver. The receiver can include an inductor coupled between the tunable reactance circuit and the resonator.

The tunable reactance circuit can be configured to present a continuously tunable capacitive reactance between a first capacitive reactance and a second capacitive reactance. The tunable reactance circuit can be configured to present a discretely tunable capacitive reactance between a first capacitive reactance and a second capacitive reactance. The switch can be a metal-oxide semiconductor field-effect transistor (MOSFET). The power delivered to the load can be based on the output reactance of the tunable reactance circuit. The at least one tunable reactance circuit can include a first tunable reactance circuit and a second tunable reactance circuit, and the resonator has a second output node coupled to an input of the second tunable reactance circuit and the rectifier has a second input node coupled to an output of the second tunable reactance circuit. A capacitance value of the first tunable reactance circuit is equal to a capacitance value of the second tunable reactance circuit.

DETAILED DESCRIPTION

Disclosed herein are electronic circuits, systems, and methods directed to providing tunable impedance and, more specifically, tunable reactance. Embodiments of the tunable reactance circuits may be utilized in wireless power systems, including wireless power transmitters and/or receivers for delivering a particular level of power and/or with a particular efficiency to a load, e.g., a battery.

Wireless Power Systems

FIG. 1is a block diagram of an exemplary wireless power system100including one or more exemplary tunable reactance circuits. The system100includes a wireless power transmitter102and a wireless power receiver104. In transmitter102, a power supply105(e.g., AC mains, battery, etc.) provides power to an inverter108. Additional components can include power factor correction (PFC) circuit106before the inverter stage108. The inverter108drives the transmitter resonator coil and capacitive components112(“resonator”), via an impedance matching network110(including fixed and/or tunable network components). The transmitter resonator produces an oscillating magnetic field which induces a current and/or voltage in receiver resonator. The received energy is provided to a rectifier118via impedance matching network116(including fixed and/or tunable network components). Ultimately, the rectified power is provided to a load120(e.g., one or more batteries of an electric or hybrid vehicle). In some embodiments, the battery voltage level can impact various parameters (e.g., impedance) of the wireless power system100. Therefore, the battery voltage level may be received, determined, or measured to be provided as input to other portions of the wireless power system100. For example, a typical battery voltage range for electric vehicles is 280-420 V.

In some embodiments, one or more components of the transmitter102can be coupled to a controller122, which may include a communication module (e.g., Wi-Fi, radio, Bluetooth, in-band signaling mechanism, etc.) configured to communicate with a communication module of receiver104. In some embodiments, one or more components of the transmitter102can be coupled to one or more sensors124(e.g., a current sensor, a voltage sensor, a power sensor, a temperature sensor, a fault sensor, etc.). The controller122and sensor(s)124can be operably coupled to control portions of the transmitter102based on feedback signals from the sensor(s)124and/or sensor(s)128.

In some embodiments, one or more components of the receiver104can be coupled to a controller126, which may include a communication module (e.g., Wi-Fi, radio, Bluetooth, in-band signaling mechanism, etc.) configured to communicate with the communication module of transmitter102. In some embodiments, one or more components of the transmitter104can be coupled to one or more sensors128(e.g., a current sensor, a voltage sensor, a power sensor, a temperature sensor, a fault sensor, etc.). The controller126and sensor(s)128can be operably coupled to control portions of the transmitter102based on feedback signals from the sensor(s)128and/or sensor(s)124.

Examples of wireless power systems can be found in U.S. Patent Application Publication No. 2010/0141042, published Jun. 10, 2010 and titled “Wireless energy transfer systems,” and U.S. Patent Application Publication No. 2012/0112535, published May 10, 2012 and titled “Wireless energy transfer for vehicles,” both of which are hereby incorporated by reference in their entireties.

High-power wireless power transmitters can be configured to transmit wireless power in applications such as powering of and/or charging a battery of vehicles, industrial machines, robots, or electronic devices relying on high power. For the purpose of illustration, the following disclosure focuses on wireless power transmission for vehicles. However, it is understood that any one or more of the embodiments described herein can be applied to other applications in which wireless power can be utilized.

Tunable Impedance Matching Networks

In some embodiments, the exemplary impedance matching networks (IMNs)110,116can include one or more variable impedance components. The one or more variable impedance components may be referred together herein as a “tunable matching network” (TMN). Note that impedance may be expressed in Cartesian form as follows:
Z=R+jX
where the real part of impedance is resistance R and the imaginary part is reactance X. TMNs can be used in adjusting the impedance (e.g., including the reactance X) of the wireless power transmitter102and/or receiver104.

In some embodiments, tunable matching network(s) may be referred to as “tunable reactance circuit(s)”. In some applications, e.g., wireless power transmission, impedances seen by the wireless power transmitter102and/or presented by the receiver104may vary dynamically. In such applications, impedance matching between a receiver resonator coil (of114) and a load120, and between a transmitter resonator coil (of112) and the power supply105, may be beneficial to prevent unnecessary energy losses and excess heat. The impedance reflected on or by a resonator coil may be dynamic, in which case, a dynamic impedance matching network can be adjusted to compensate for the varying impedance to improve the performance (e.g., efficiency, power delivery, etc.) of the system100. In the case of the inverter108in a wireless power system100, the impedances seen by the inverter108may be highly variable because of changes in the load120receiving power (e.g., battery or battery charging circuitry) and changes in the coupling between the transmitter102and receiver104(caused, for example, by changes in the relative position of the transmitter and receiver resonator coils). Similarly, the impedance loading the receiver resonator (of114) may also change dynamically because of changes in the load120receiving power. In addition, the desired impedance matching for the receiver resonator (of114) may be different for different coupling conditions and/or power supply conditions.

Accordingly, power transmission systems transmitting and/or receiving power via highly resonant wireless power transfer, for example, may utilize tunable or variable impedance matching networks110,116to maintain efficient power transmission and/or to deliver a particular level of power to a load120. For instance, one or more components of a TMN can be configured to present an impedance between a minimum impedance and a maximum impedance attainable by the particular components of the TMN. In various embodiments, the attainable impedance can be dependent on the operating frequency (e.g., 80 kHz to 90 kHz) of the wireless power system100. Tuning may be performed continuously, intermittently, or at certain points in power transmission (e.g., at the beginning of or during power transmission). Examples of tunable matching networks can be found in U.S. Patent Application Publication No. 2017/0217325, published Aug. 3, 2017 and titled “Controlling wireless power transfer systems”, and U.S. Patent Application Publication No. 2017/0229917, published Aug. 10, 2017 and titled “PWM capacitor control”, both of which are hereby incorporated by reference in their entireties.

As used herein, the term “capacitor”, or the symbol therefor, can refer to one or more electrical components having a capacitance (e.g., in Farads) and/or capacitive reactance (e.g., in Ohms). For example, capacitor can include one or more capacitors (e.g., in a “bank” of capacitors) that may be on the order of tens, hundreds, etc. of discrete capacitors. Two or more capacitors may be coupled in series or parallel to attain the desired capacitance and/or desired capacitive reactance. Note that capacitive reactance may be expressed as a negative value herein. However, one skilled in the art would recognize that, in some conventions, capacitive reactance may also be expressed as a positive value. While the disclosure, including the Figures, may provide exemplary values for the various electrical components, it is understood that the value of the components can be customized for the particular application. For example, the value of various electronic components can depend whether the wireless power transmitter is used to transmit power for charging a vehicle battery (on the order of thousands of Watts) or a cell phone battery (typically less than 5 Watts).

FIG. 2illustrates a single-switch tunable reactance circuit200including one or more capacitors C1coupled in parallel to a diode D1. The diode D1is coupled antiparallel to a switch S1. The switch S1may be a transistor (e.g., field-effect transistor (FET), metal-oxide semiconductor FET (MOSFET), insulated-gate bipolar transistor (IGBT), bipolar junction transistor (BJT), etc.). If the switch S1is configured to only carry positive current, a diode D1is coupled such that it provides a path for current to flow during negative current, as described further below forFIGS. 3A-3D. In some embodiments, the switch may be a MOSFET, which is able to conduct negative current. In the case of a MOSFET, the diode D1is the body diode of the MOSFET.

The switch S1can be controlled by a pulse width modulation (PWM) control signal (“GDR_PWM”). The PWM control signal may have a duty cycle of 50% of operating frequency period, where the switching period is defined as the inverse of the operating frequency (e.g., between 80 to 90 kHz) of the wireless power system100. The switch gating function for switch S1can be synchronized with the zero crossing of the current into node “Na”202.

In some embodiments, the switch S1on-time can be based on an equivalent capacitance desired at a given time in the operation of the wireless power transmitter102or receiver104. The equivalent capacitance Ceqcan be determined by:

Ceq=C⁢⁢1·22-(2⁢⁢φ-sin⁢⁢2⁢⁢φ)/π90⁢°≤φ≤180⁢°⁢⁢or⁢⁢0⁢°≤φ≤180⁢°
in which C1is the value of the one or more capacitors as discussed above and φ is the phase delay between the zero-crossing of the current I(Na) from node Na into the tunable reactance circuit and the turn-off of the switch S1. Accordingly, the switch S1on-time is be based on the phase delay φ.

FIG. 3Ais a plot of a voltage signal V(GDR_PWM) representing the PWM control signal.FIG. 3Bis a plot of a current signal I(Na) representing the current from the inverter108into the tunable reactance circuit200of the transmitter102.FIG. 3Cis a plot of (i) a current signal I(S1) representing the current in the switch S1; (ii) a current signal I(C1) representing the current at the capacitor(s) C1(e.g., current measured at a node on a side of the capacitor(s) C1, a calculated current (current I=C*dV/dt), etc.); and (iii) a current signal I(D1) representing the current in the diode D1.FIG. 3Dis a plot of a voltage signal V(Na, Nb) between node Na202and node Nb204. As illustrated, phase delay φ is the difference between the zero-crossing of current I(Na) and the turn-off of voltage signal V(GDR_PWM). Assuming nearly sinusoidal I(Na) current from node Na into the tunable reactance circuit200, the phase delay between the turn-on of switch S1and the zero-crossing of the current I(Na) for node Na into the tunable reactance circuit200can be anywhere from 0° to cp. If turn-on to zero-crossing phase delay is equal to φ, the on-time of the gate drive signal is center-aligned with the zero-crossing. In practice and as illustrated inFIGS. 3A-3D, a turn-on delay302is added such that the turn-on to zero crossing phase delay is slightly smaller than φ in order to ensure voltage V(Na, Nb) across the switch S1has reached zero before the switch is turned on and to minimize the diode conduction time. The notation ≈φ indicates the range of time the switch S1(e.g., FET) can turn on. In the example provided inFIGS. 3A-3D, switch S1(e.g., FET) turns on when current I(D1) coincides with rising and falling to zero of voltage V(GDR_PWM). Note the convention of current flow illustrated inFIG. 2is applicable in the waveforms ofFIGS. 3A-3D.

FIG. 4Ais a plot of the reactance of the single-switch tunable reactance circuit200as a function of phase delay φ (degrees), as described above. In particular, for an exemplary capacitance of capacitor(s) C1=187 nF and φ between 90° and 180°, the circuit200can produce a capacitive reactance of approximately −5 to 0 Ohms at 85 kHz. Referring toFIG. 4B, for an exemplary capacitance of capacitor(s) C1=187 nF and φ between 0° and 180°, the circuit200can produce a capacitive reactance of approximately −10 to 0 Ohms at 85 kHz. In this example, for a transmitter102, the capacitance of 187 nF may be attained with a base capacitance value of 10 nF by including two capacitor banks in series in which each bank has 38 parallel capacitors.

In some embodiments, the gate driver of the switch S1of the single-switch tunable reactance circuit200can be powered by a bootstrap circuit that is charged by a supply referenced to ground, as described further below, instead of requiring isolated DC-DC converters for the gate driver.

Single-Switch Tunable Reactance Circuit for Wireless Power Systems

FIGS. 5A-5Bare schematics of portions500a,500b(collectively referred to as500) of an exemplary wireless power transmitter including exemplary single-switch tunable reactance circuits502a,502b. In the exemplary transmitter portion500, single-switch tunable reactance circuits502a,502bare employed on the upper branch and the lower branch, respectively. In the upper branch, the tunable reactance circuit502ais coupled between a first output node NAA of the inverter108(refer toFIG. 5A) and a first input node NBA of the transmitter IMN503. In the lower branch, the tunable reactance circuit502bis coupled between a second output node NAB of the inverter108and a second input node NBB of the transmitter IMN503. The IMN503is coupled between the tunable reactance circuits502a,502band transmitter resonator501. Note that, if the tunable reactance circuits502a,502brely on the bootstrap power supplies504a,504b, there cannot be any impedance between the inverter108and the tunable reactance circuits502a,502b. In some embodiments, the transmitter portion500can further include an inductor coupled between the tunable reactance circuit502aor502band the resonator501.

By utilizing two separate circuits502a,502b, the desired reactance is “split” over the two branches, thereby providing a balanced reactance in the transmitter102. Referring to the above example with φ between 90° and 180°, for an individual circuit200utilizing a C1=187 nF, the corresponding “split” respective capacitors C1A, C1B in circuits502a,502bcan each have equal approximately 374 nF, so the total series equivalent capacitance is 187 nF. Note that the upper branch circuit502ais in series with the lower branch circuit502b. Referring to the above example with φ between 0° and 180°, for an individual circuit200utilizing a C1=187 nF, the corresponding “split” respective capacitors C1A, C1B in circuits502a,502bcan each have equal approximately 187 nF, so the total series equivalent capacitance is 93.5 nF.

The bootstrap power supplies504a,504bcan drive circuits502a,502b, respectively, in the transmitter102. The bootstrap power supply504acan include a bootstrap capacitor CBOOT_A1coupled between node NAAand the output of the bootstrap diode DBOOT_A1. Diode DBOOT_A1is driven by DC power supply VDD. The bootstrap power supply504bcan include a bootstrap capacitor CBOOT_B1coupled between node NABand the output of the bootstrap diode DBOOT_A1. Diode DBOOT_A1is driven by DC power supply VDD. Note that supply VDDcan refer to one or more DC power supplies. In this example, the bootstrap power supplies504a,504bare coupled to a single integrated circuit (IC)505for supply by504a,504b, and driving the respective gates of switches S1Aand S1B(e.g., providing the PWM signals for control). However, in other embodiments, the supplies504a,504bmay each have separate ICs for control purposes. In various embodiments, the control signal for circuit502aand the control signal for circuit502bare synched. This is beneficial for several reasons. The synched control signals enable the capacitance values C1A and C1B to be equal to ensure a balanced network (in the transmitter500) that minimizes potentials to chassis and/or ground. Further, the synched control signals enable the center of the resonator501to be at zero potential with respect to ground, which can be important to reduce or maintain electromagnetic interference (EMI) below a certain threshold. In some embodiments, circuits502a,502bcan be driven with different control signals that result in different capacitance values C1A and C1B. If the circuits502a,502bare controlled by two separate ICs, the two ICs can be connected such that ICs create the same control signal. For instance, this can be accomplished by connecting the two ICs to a master node (e.g., controller, IC, processor, etc.) to receive the synchronized PWM signals.

In various embodiments, the tunable reactance circuits502a,502bcan operate in one or more modes during the operation of the transmitter102. For instance, as the inverter108ramps up to its desired operation state (e.g., power, particular phase shift, etc.), the circuits502a,502bare shorted and therefore present an infinite capacitance with a reactance of zero Ohms. Once the inverter108is at its desired phase shift (e.g., maximum phase shift or 180 degrees), then the circuits502a,502bcan adjust from zero Ohms to some value in between its minimum capacitive reactance −Xtx_min ω (e.g., −5 Ohms for φ of 90° and −10 Ohms for φ of 0°) and its maximum capacitive reactance −Xtx_max Ω (e.g., zero Ohms).

FIGS. 6A-6Cillustrate various signals in the transmitter during ramp-up (or “start-up”) of transmitter102.FIG. 6Ais a plot of (i) voltage signal V(Slower1−RGS2) representing the voltage difference between the gate of first lower switch Slower1and ground PGND_GA; and (ii) voltage signal V(Slower2−RGS4) representing the voltage difference between the gate of second lower switch Slower2and ground PGND_GA. The duration 602 in voltage signal V(Slower1−RGS2) represents the on-time of switch Slower1and the duration 604 in voltage signal V(Slower2−RGS4) represents the on-time of switch Slower2.FIG. 6Bis a plot of (i) voltage signal V(CBOOT_A1) across capacitor CBOOT_A1and (ii) voltage signal V(CBOOT_B1) across capacitor CBOOT_B1. Note that the rise in voltage signal V(CBOOT_A1) occurs over the on-time of switch Slower2(duration 604) and the rise in voltage signal V(CBOOT_A1) occurs over the on-time of switch Slower1(duration 602).FIG. 6Cis a plot of (i) current signal I(DBOOT_A1) through bootstrap diode DBOOT_A1and (ii) current signal I(DBOOT_B1) across bootstrap diode DBOOT_A1. Note that the fall in current signal I(DBOOT_A1) occurs over the on-time of switch Slower2(duration 604) and the fall in current signal I(DBOOT_A1) occurs over the on-time of switch Slower1(duration 602).

At steady-state, the circuits502a,502bmay be continuously, intermittently, or periodically adjusted to attain or maintain a particular power level and/or attain or maintain the inverter phase within a desired range. For example, an increase in the reactance of circuit(s)502a,502bmay result in increased output power by transmitter500and/or reduced inverter VI phase (e.g., difference in phase between the current signal and voltage signal from the inverter108). Conversely, a decrease in the reactance of circuit(s)502a,502bmay result in decreased output power by transmitter500and/or increased inverter phase. Circuits502a,502bcan have a particular maximum reactance Xtx_max and minimum reactance Xtx_min based on the characteristics of electronic components used (e.g., C1capacitance).

FIGS. 7A-7Cillustrate various signals in the transmitter during steady-state operation of transmitter102.FIG. 7Ais a plot of (i) voltage signal V(Slower1−RGS2); and (ii) voltage signal V(Slower2−RGS4), as described above. The duration 702 between V(Slower2−RGS4) falling edge and V(Slower1−RGS2) rising edge represents the dead-time between switches Supper1and Slower1. The duration 704 between V(Slower1−RGS2) falling edge and V(Slower2−RGS4) rising edge represents the dead-time between switches Supper2and Slower2.FIG. 7Bis a plot of (i) voltage signal V(CBOOT_A1) and (ii) voltage signal V(CBOOT_B1), as described above. Note that voltage signal V(CBOOT_A1) begins to rise during dead-time704and voltage signal V(CBOOT_B1) begins to rise during dead-time702.FIG. 7Cis a plot of (i) current signal I(DBOOT_A1) and (ii) current signal I(DBOOT_B1), as described above. Note that the current signal I(DBOOT_A1) falls during dead-time704and the current signal I(DBOOT_B1) falls during dead-time702.

FIG. 5Bfurther illustrates the transmitter portion500during the charging of the bootstrap capacitors CBOOT_A1, CBOOT_B1of the bootstrap-based power supplies504a,504b. As indicated by solid lines506, the charging of the bootstrap capacitors CBOOT_A1, CBOOT_B1can occur during the low-side conduction (“on-time”) of the low-side switches Slower1and Slower2of the inverter108. The discharging of the bootstrap capacitors CBOOT_A1, CBOOT_B1are indicated by the dashed lines508. As illustrated, the tunable reactance circuits502a,502bcan rely on the conduction of inverter switches to charge the bootstrap capacitors CBOOT_A1, CBOOT_B1, thereby enabling the inverter gate drive supply to also supply the gate drive for the tunable reactance circuits502a,502b.

FIG. 8is a schematic of a portion800of an exemplary wireless power receiver104including single-switch tunable reactance circuits802a,802b. In the upper branch, the tunable reactance circuit802ais coupled between a first output node NBA of the receiver IMN803and a first input node NAAof the rectifier118. In the lower branch, the tunable reactance circuit802bis coupled between a second output node NBB of the receiver IMN803and a second input node NABof the rectifier118. The IMN803is coupled between the tunable reactance circuits802a,802band receiver resonator801. Note that, if the tunable reactance circuits802a,802brely on the bootstrap power supplies804a,804b, there cannot be any impedance between the rectifier803and the tunable reactance circuits802a,802b. If the tunable reactance gate driver is powered by a dedicated isolated DC-DC converter, the receiver800can include an inductor coupled between the rectifier118and the tunable reactance circuit(s)802a,802b.

The circuits802a,802bcan be powered by bootstrap power supplies804a,804bas described herein. The bootstrap power supply804acan include a bootstrap capacitor CBOOT_A1coupled between node NAAand the output of the bootstrap diode DBOOT_A1. Diode DBOOT_A1is driven by DC power supply VDD. The bootstrap power supply804bcan include a bootstrap capacitor CBOOT_B1coupled between node NABand the output of the bootstrap diode DBOOT_A1. Diode DBOOT_A1is driven by DC power supply VDD. Note that supply VDDcan refer to one or more DC power supplies. In this example, the bootstrap power supplies804a,804bare coupled to a single IC for controlling the supplies804a,804b, thereby controlling the respective gates of switches S1Aand S1B(e.g., providing the PWM signals for control). However, in other embodiments, the supplies804a,804bmay each have separate ICs for control purposes. For example, the bootstrap capacitors CBOOT_A1, CBOOT_B1charge during the low-side conduction of the diodes Dlower_1, Dlower_2of rectifier118.

In various embodiments, the tunable reactance circuits802a,802bcan operate in one or more modes during the operation of the receiver104. During initial “power-up” or “ramp-up” (e.g., when power to the load120is less than 2 kW), the circuits802a,802bare shorted and therefore present an infinite capacitance with reactance of zero Ohms. When the load power reaches 2 kW, then the switches S1A, S1Bof the circuits802a,802btransition from closed to open (e.g., from a reactance of zero (0) Ω to a minimum reactance of −Xrx_min Ω). Next, the controller (e.g., controller122) can increase the phase delay φ gradually from −Xrx_min Ω until desired power and/or efficiency is attained. Note that circuits802a,802bcan have a particular maximum reactance −Xrx_max and minimum reactance −Xrx_min based on the characteristics of electronic components used (e.g., C1capacitance).

Derivation of the Equivalent Capacitance for the Single-Switch Tunable Reactance Circuit

In various embodiments, the derivation of the equivalent capacitance Ceqfor the exemplary single-switch tunable reactance circuit is as follows:

Additional Embodiments of the Tunable Reactance Circuit

FIG. 9illustrates an embodiment of a tunable reactance circuit900that includes a first tunable reactance circuit902coupled in series with a second tunable reactance904. Each of circuits902,904can include the tunable reactance circuit200. In some cases, the example reactance circuit900may enable a greater impedance range (e.g., a greater reactance range) than a single tunable reactance circuit200. In this way, a system (e.g., a wireless power system with a given set of inverter and rectifier limitations) employing the reactance circuit900can adapt and/or respond to a wider range of reflected impedances observed by the system due to a wider range of coupling from a larger variation in receiver position (relative to the transmitter position). For example, a wireless power transmitter102having the tunable reactance circuit900may transmit higher levels of power over a given range of receiver position and/or operate with greater efficiency than a transmitter having no tunable reactance circuit. In another example, a wireless power transmitter102having the tunable reactance circuit900may transmit higher levels of power over a given range of receiver position and/or operate with greater efficiency than a transmitter having tunable reactance circuit200.

The above concept is further illustrated in the tables ofFIGS. 10A-10B. For instance, inFIG. 10A, example transmitter1002may not have a tunable reactance circuit (e.g.,200or900). Instead, in some cases, in its place, the transmitter1002may have a component with a fixed reactance X1(e.g., an inductor or a capacitor). In other cases, there may be no such component (in which case the reactance is zero). Example transmitter1004may have a tunable reactance circuit200over a reactance range of X2-X3. Example transmitter1006may have a tunable reactance circuit900over a reactance range of X4-X5, which is twice as large as X2-X3, assuming the same switching component as tunable reactance circuit200is used in circuit900. Note that, as tunable reactance circuits200are added in series (e.g., 3 circuits, 4 circuits, 5 circuits, and so on in series), the reactance range increases proportionally (e.g., 3 times, 4 times, 5 times, and so on the reactance of a single tunable reactance circuit200).

In the examples provided inFIG. 10A, the impedance ranges fall within one another, e.g., reactance range X1-X2falls within reactance range X3-X4. In some embodiments, the “nested” reactance ranges may have the same mean value. In some embodiments, the reactance ranges may have different means. Referring toFIG. 10B, in some cases, reactance ranges may partially overlap. For example, reactance range X1-X2of transmitter1008may partially overlap reactance range X3-X4and/or reactance range X3-X4may partially overlap reactance range X5-X6. Note that, though the examples inFIGS. 10A-10Bare provided for wireless power transmitters, the same or similar concepts are applicable to wireless power receivers.

In some embodiments, a wireless power transmitter102employing the tunable reactance circuit900may utilize a dedicated isolated DC-DC converter separate from the bootstrap supply described above (e.g., a bootstrap capacitor configured to charge during conduction of a portion of the inverter108) of the transmitter102. Note that, if the tunable reactance gate driver is powered by dedicated isolated DC-DC converter, the transmitter can further include an inductor coupled between the driving circuit and the tunable reactance circuit.

FIG. 11is a schematic of a portion1100of a wireless power transmitter that includes tunable reactance circuits1102a,1102b(collectively referred to as circuits1102). In the exemplary transmitter portion1100, single-switch tunable reactance circuit1102a,1102bare employed on the upper branch and the lower branch, respectively. The circuits1102a,1102bare coupled between the inverter108and the fixed matching network1103. By utilizing two separate circuits1102a,1102b, the desired reactance is “split” over the two branches, thereby providing a balanced reactance in the transmitter. Referring to the example of an individual circuit200utilizing a C1=187 nF and phase angle φ between 90° and 180°, the corresponding “split” respective capacitors (1) C1A1, C1A2(together1102a) has a total capacitance value of approximately 187 nF and (2) C1B1, C1B2(together1102b) has a total capacitance value of approximately 187 nF, so the total series equivalent capacitance is 93.5 nF. Referring to the example of an individual circuit200utilizing a C1=187 nF and phase angle φ between 0° and 180°, the corresponding “split” respective capacitors (1) C1A1, C1A2(together1102a) has a total capacitance value of approximately 93.5 nF and (2) C1B1, C1B2(together1102b) has a total capacitance value of approximately 93.5 nF, so the total series equivalent capacitance is 46.75 nF.

The circuits1102a,1102bcan be powered by a separate dedicated isolated DC-DC converter1104. In some embodiments, the circuits1102a,1102bcan be controlled by controller1106. The controller1106may be part of or the same as controller122. The inverter108can be powered by a separate power supply1108and controlled by a separate controller1110. Note that controllers1106and1110may be packaged together, may be connected to each other, and/or may be part of the same controller (e.g.,122).

In some embodiments, a wireless power receiver104employing the tunable reactance circuit900may utilize an isolated DC-DC converter separate from the bootstrap supply described above (e.g., a bootstrap capacitor configured to charge during conduction of a portion of the rectifier118).FIG. 12is a schematic of a portion1200of a wireless power receiver that includes tunable reactance circuits1202a,1202b(collectively referred to as circuits1202). In the exemplary receiver portion1200, single-switch tunable reactance circuits1202aand1202bare employed on the upper branch and the lower branch, respectively. The circuits1202a,1202bare coupled between the fixed matching network1203and rectifier118. By utilizing two separate circuits1202a,1202b, the desired reactance is “split” over the two branches, thereby providing a balanced reactance in the receiver. Referring to the example of an individual circuit200utilizing a C1=135 nF and phase angle φ between 90° and 180°, the corresponding “split” respective capacitors (1) C1A1, C1A2(together1202a) has a total capacitance value of approximately 135 nF and (2) C1B1, C1B2(together1202b) has a total capacitance value of approximately 135 nF, so the total series equivalent capacitance is 67.5 nF. Referring to the example of an individual circuit200utilizing a C1=135 nF and phase angle φ between 0° and 180°, the corresponding “split” respective capacitors (1) C1A1, C1A2(together1202a) has a total capacitance value of approximately 67.5 nF and (2) C1B1, C1B2(together1202b) has a total capacitance value of approximately 67.5 nF, so the total series equivalent capacitance 33.75 nF.

FIG. 13is a schematic of a wireless power receiver portion1300including the tunable reactance circuits900. In particular, on the upper branch, receiver portion1300includes a first tunable reactance subcircuit1302aand second tunable reactance subcircuit1304a. The switch of subcircuit1302ais coupled to a gate resistor1306a. The switch of subcircuit1304bis coupled to a gate circuit1308a, which includes a high-voltage decoupling diode Dga, a gate resistor Rg2a, and a pull-down resistor Rgsa. The inputs of resistor1306aand gate circuit1308aare connected to the output of level-shifting gate drivers1310a, which is powered by the bootstrap circuit1312a. The bootstrap circuit1312ais coupled to the input of the rectifier118.

In the lower branch, the receiver portion1300includes a first tunable reactance subcircuit1302band a second tunable reactance subcircuit1304b. The switch of subcircuit1302bis coupled to a gate resistor1306b. The switch of subcircuit1304bis coupled to a gate circuit1308b, which includes a high-voltage decoupling diode Dgb, a gate resistor Rg2b, and a pull-down resistor Rgsb. The inputs of resistor1306band gate circuit1308bare connected to the output of shifting gate drivers1310b, which is powered by the bootstrap circuit1312a. The bootstrap circuit1312ais coupled to the input of the rectifier118.

FIGS. 14A-14Dillustrate the various signals in receiver portion1300. Referring toFIG. 14A, in the gate circuits1308a,1308b, the high-voltage decoupling diode voltage1402blocks the voltage across the first tunable reactance subcircuits1302a,1302b, respectively. InFIG. 14B, the high-voltage decoupling diode current1404has an initial peak1406to charge the FET capacitance and then, during a time1408after the peak1406, is equal to the gate drive voltage divided by the gate resistor plus the pull-down resistor during the on-time. The respective bootstrap capacitor Cba of circuit1312aor bootstrap capacitor Cbb of circuit1312bis configured to be large enough such that this current does not cause the gate drive voltage to droop. InFIG. 14C, the resulting gate-to-source voltage1410of the FET of tunable reactance subcircuit1308aor1308bhas a fast rise time1412and a passive discharge based on the FET gate to source capacitance and the pull-down resistor. InFIG. 14D, the resulting drain-to-source voltage1414of the FET of the tunable reactance subcircuit1308aor1308bis nearly equal to the drain-to-source voltage of the FET of the tunable reactance subcircuit1306aor1306b, effectively doubling the reactance.

FIGS. 15A-15Dillustrate the various signals in receiver portion1300.FIG. 15Aillustrates the current I(Na) into the tunable reactance network (e.g.,200,900,1302a,1304a). InFIG. 15B, the drain-to-source voltage1502across the FET of tunable reactance subcircuit1302aor1302bis the same as the single switch tunable reactance circuit200. InFIG. 15C, the drain-to-source voltage1504of the FET of the tunable reactance subcircuit1304aor1304bis nearly equal to the drain-to-source voltage of the FET of the tunable reactance subcircuit1302aor1302b, respectively. Referring toFIG. 15D, the resulting total series voltage across each branch of the series tunable reactance subcircuits1302aand1304a(or1302band1304b) is nearly double the single switch tunable reactance implementation200, effectively doubling the reactance.

FIG. 16Ais a plot of five signals1602,1604,1606,1608,1610representing the total series voltage across each branch of the receiver portion1300, including the upper branch having the tunable reactance subcircuits1302a,1304aand the lower branch having the tunable reactance subcircuits1302b,1304b, for five example phase angles φ between 90° and 180°. The five different phase angles are provided in Table 1 below. As phase angle φ is increased from 90 to 180, the voltage also increases.FIG. 16Bis a plot of five signals representing the total series voltage across each branch of the receiver portion1300, including the upper branch having the tunable reactance subcircuits1302a,1304aand the lower branch having the tunable reactance subcircuits1302b,1304b, for five example phase angles φ between 0° and 180°. The five different phase angles are provided in Table 2 below. As phase angle φ is increased from 0 to 180, the voltage also increases.

Hardware and Software Implementations

FIG. 17is a block diagram of an example computer system1700that may be used in implementing the systems and methods described herein. General-purpose computers, network appliances, mobile devices, or other electronic systems may also include at least portions of the system1700. The system1700includes a processor1710, a memory1720, a storage device1730, and an input/output device1740. Each of the components1710,1720,1730, and1740may be interconnected, for example, using a system bus1750. The processor1710is capable of processing instructions for execution within the system1700. In some implementations, the processor1710is a single-threaded processor. In some implementations, the processor1710is a multi-threaded processor. The processor1710is capable of processing instructions stored in the memory1720or on the storage device1730.

The memory1720stores information within the system1700. In some implementations, the memory1720is a non-transitory computer-readable medium. In some implementations, the memory1720is a volatile memory unit. In some implementations, the memory1720is a nonvolatile memory unit. In some examples, some or all of the data described above can be stored on a personal computing device, in data storage hosted on one or more centralized computing devices, or via cloud-based storage. In some examples, some data are stored in one location and other data are stored in another location. In some examples, quantum computing can be used. In some examples, functional programming languages can be used. In some examples, electrical memory, such as flash-based memory, can be used.

The storage device1730is capable of providing mass storage for the system1700. In some implementations, the storage device1730is a non-transitory computer-readable medium. In various different implementations, the storage device1730may include, for example, a hard disk device, an optical disk device, a solid-date drive, a flash drive, or some other large capacity storage device. For example, the storage device may store long-term data (e.g., database data, file system data, etc.). The input/output device1740provides input/output operations for the system1700. In some implementations, the input/output device1740may include one or more of a network interface devices, e.g., an Ethernet card, a serial communication device, e.g., an RS-232 port, and/or a wireless interface device, e.g., an 802.11 card, a 3G wireless modem, or a 4G wireless modem. In some implementations, the input/output device may include driver devices configured to receive input data and send output data to other input/output devices, e.g., keyboard, printer and display devices1760. In some examples, mobile computing devices, mobile communication devices, and other devices may be used.

In some implementations, at least a portion of the approaches described above may be realized by instructions that upon execution cause one or more processing devices to carry out the processes and functions described above. Such instructions may include, for example, interpreted instructions such as script instructions, or executable code, or other instructions stored in a non-transitory computer readable medium. The storage device1730may be implemented in a distributed way over a network, such as a server farm or a set of widely distributed servers, or may be implemented in a single computing device.

The term “system” may encompass all kinds of apparatus, devices, and machines for processing data, including by way of example a programmable processor, a computer, or multiple processors or computers. A processing system may include special purpose logic circuitry, e.g., an FPGA (field programmable gate array) or an ASIC (application specific integrated circuit). A processing system may include, in addition to hardware, code that creates an execution environment for the computer program in question, e.g., code that constitutes processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them.

Terminology