Avalanche photodiode gain control comprising a bias circuit having a second avalanche photodiode

An avalanche photo-diode (APD) circuit includes a first APD and a bias circuit. The first APD is configured to detect light. The bias circuit is configured to control a gain of the first APD. The bias circuit includes a second APD, a reference voltage source, a bias voltage generation circuit, and a metal layer configured to shield the second APD from the light. The reference voltage source is configured to bias the second APD. The bias voltage generation circuit is configured to generate a bias voltage for biasing the first APD based on dark current output by the second APD.

BACKGROUND

Photodiodes are semiconductor devices that generate an electrical current when Photodiodes are used as light-detection elements in a variety of applications. A photodiode includes a p-n junction formed in a semiconductor material. A reverse bias is applied to the p-n junction to widen the depletion layer, and an electric field is applied. Electron-hole pairs are generated in the depletion layer by the absorbed light. Under the attraction of the electric field, electrons move to the n-type semiconductor region, while holes move to the p-type semiconductor region, thereby causing a current to flow. Types of photodiodes include PIN photodiodes and avalanche photodiodes.

SUMMARY

In one example, an avalanche photo-diode (APD) circuit includes a first APD, a reference voltage source, and a bias circuit. The first APD includes an anode. The bias circuit includes a bias output, a second APD, and a layer of metal that covers the second APD. The bias output is coupled to the anode of the first APD. The second APD includes a cathode and an anode. The cathode of the second APD is coupled to the bias output. The anode of the second APD is coupled to the reference voltage source.

In another example, an APD circuit includes a first APD and a bias circuit. The first APD is configured to detect light. The bias circuit is configured to control a gain of the first APD. The bias circuit includes a second APD, a reference voltage source, a bias voltage generation circuit, and a metal layer configured to shield the second APD from the light. The reference voltage source is configured to bias the second APD. The bias voltage generation circuit is configured to generate a bias voltage for biasing the first APD based on dark current output by the second APD.

In a further example, a light detection circuit includes an APD array and a bias circuit. The APD array is configured to detect light, and includes a first APD, and a transimpedance amplifier. The transimpedance amplifier is coupled to first APD. The bias circuit is coupled to the APD array, and is configured to control a gain of the first APD. The bias circuit includes a second APD, a reference voltage source, a current multiplier circuit, a bias voltage generation circuit, and a metal layer that is configured to shield the second APD from the light. The reference voltage source is configured to bias the second APD. The current multiplier circuit is coupled to the second APD, and is configured to provide an output current that is a predetermined multiple of the dark current output by the second APD. The bias voltage generation circuit is configured to generate a bias voltage for biasing the first APD based on the output current of the current multiplier circuit.

DETAILED DESCRIPTION

In a photodiode, photocurrent (Ip) is proportional to the incident optical power (Pin). Responsivity is the ratio of photocurrent generated from incident light, to the incident light, and may be expressed as current over power.

R=IpPin
where:
Ipis in units of amperes (A); and
Pinis in units of watts (W).

The quantum efficiency of the photodiode may be defined as:

Responsivity may be expressed based on quantum efficiency as:

Positive-intrinsic-negative (PIN) photodiodes and avalanche photodiodes (APD) are commonly used to detect light.FIG.1Ais a schematic diagram of a PIN photodiode.FIG.1Bis a graph of the electric field distribution in the reverse biased PIN photodiode. The PIN photodiode includes an intrinsic (or lightly doped) region sandwiched between a p-type region and an n-type region. The intrinsic region increases depletion region width, where photo-generated carriers (electrons and holes) travel by drift, rather than by diffusion as in the p-type and n-type regions. The depletion region creates capacitance that is inversely proportional to the width of the depletion region. Because response time of the photodiode is a function of the capacitance, increasing depletion region width decreases response time. PIN photodiodes are reverse biased well below the breakdown voltage. Table 1 lists various characteristics of typical PIN photodiodes.

FIG.2Ais a schematic diagram of an APD.FIG.2Bis a graph of the electric field distribution in the various layers of the reverse biased APD. The APD is similar to the PIN photodiode, and includes an additional p-type region that operates as a multiplication layer. Secondary carriers are generated in the multiplication layer via impact ionization. The responsivity of the APD is expressed as:
RAPD=MR
where:
M is the multiplication factor provided by addition of the multiplication layer; and
R is responsivity of the photodetector without the multiplication layer.

The multiplication factor M may be expressed as:

M=1-k⁢Aexp⁡[-(1-k⁢A)⁢αe⁢d]-k⁢A
where:
αhis a hole impact ionization constant;
αeis an electron impact ionization constant;
d is thickness of the multiplication layer, and

The APD is reverse biased at a higher voltage than the PIN photodiode to enable impact ionization (M>>1), With low reverse bias voltage; the APD behaves like a PIN photodiode (M=1). Table 2 lists characteristics of typical APDs.

APD gain is dependent on temperature and reverse bias voltage. Gain should be controlled to meet system performance metrics, such as sensitivity, signal-to-noise ratio, linearity, etc. in an array of APDs, the different APDs may receive different incident optical power, and control of the APD gain should be independent of incident light. The effects of ambient or stray light should be compensated.

FIGS.3A,3B, and3Care graphs of dark current, photocurrent, and avalanche gain in an APD respectively. Dark current is the small current flowing in an APD when no light is incident on the APD.FIG.3Ashows that for a dark APD avalanche breakdown is dependent on temperature, with higher temperature requiring a higher reverse bias voltage. The slope in the breakdown region is steep.FIG.3Bshows that photocurrent behavior of the APD is similar to the dark current behavior of the APD (e.g., higher temperature requiring higher reverse bias voltage).FIG.3Cshows that for different temperatures the reverse bias voltage must be adjusted to maintain a desired gain. The APD bias control circuits described herein take advantage of this similarity in dark current and photocurrent behavior, and apply dark current to bias the APD and control the gain thereof.

FIG.4is a block diagram of an APD circuit400that uses dark current to bias an APD. The APD circuit400may be a light detection circuit, a light detection and ranging (LIDAR) receiver circuit, or other optical transduction circuit. The APD circuit400includes an APD array402and a bias circuit404. The APD array402may include one or more APDs. Some implementations of the APD array402may include hundreds or thousands of APDs. The APD array402includes an APD406and a transimpedance amplifier (TIA)408. The APD406and the TIA408are coupled to form pixel circuitry of the APD array402. The APD406, and other APDs of the APD array402, may be fabricated in silicon, germanium, silicon-germanium, or other semiconductor materials. The APD406is exposed to and detects incident light, and produces a photocurrent that is proportional to the incident light. The TIA408converts the photocurrent to voltage. An input408A of the TIA408is coupled to the cathode406C of the APD406. The anode406A of the APD406is coupled to the bias circuit404for receipt of a bias voltage that controls the gain of the APD406. In practice, the anode of each APD of the APD array402is coupled to the bias circuit404for receipt of the bias voltage.

The bias circuit404generates the bias voltage based on dark current, and is therefore insensitive to ambient light and differences in optical power across the APD array402. The bias circuit404includes a bias output404A, an APD410, a current multiplier circuit412, an amplifier416, an APD418, a bias voltage generation circuit422, and a reference voltage source424. The bias output404A is coupled to the anode406A of the APD406. The APD410and the APD418may be instances of the APD406. The APD410and the APD418may be located near the APD array402(on an integrated circuit) for process and temperature tracking. A layer of metal414(or other opaque material) covers the APD410, and a layer of metal420(or other opaque material) covers the APD418. For example, the metal414and the metal420may be same metal layer of an integrated circuit that isolates the APD410and APD418from light. Thus, the APD410and the APD418generate dark current and do not generate photocurrent.

An anode410A of the APD410is coupled to the reference voltage source424. The reference voltage source424provides a bias voltage that biases the APD410for non-avalanche operation. The bias voltage applied to the APD410may relatively low (e.g.,0to −20 volts). The dark current (ID1) generated by the APD410is multiplied by a predetermined multiplier value in the current multiplier circuit412. The predetermined multiplier value is determined based on the desired gain of the APD406. For example, the predetermined multiplier value may be in a range of 10-500. A cathode410C of the APD410is coupled to an input412A of the current multiplier circuit412. The current multiplier circuit412may be implemented as a current mirror circuit to provide the desired multiplication of the dark current received from the current multiplier circuit412. The multiplied dark current (MIDI) produced by the current multiplier circuit412is provided to the amplifier416. An input416B of the amplifier416is coupled to the output412B of the current multiplier circuit412.

The anode418A of the APD418is coupled to the bias output404A. Thus, the same bias voltage is applied to the APD418and the APD406, to bias the APD418and the APD406for avalanche mode operation. The dark current (102) generated by the APD418is provided to the amplifier416. A cathode418C of the APD418is coupled to the input416A of the amplifier416.

The amplifier416compares the dark currents generated by the APD410and the APD418to produce a difference voltage (the difference of the two currents (MIDI and ID2). The difference voltage output by the amplifier416is provided to the bias voltage generation circuit422.

The bias voltage generation circuit422applies the difference voltage received from the amplifier416to generate the bias voltage applied to the APD406and the APD418. An input422A of the bias voltage generation circuit422is coupled to an output416C of the amplifier416. The bias voltage generated by the bias voltage generation circuit422biases the APD418to produce dark current102, where ID2=MID1. If ID2<MID1, the APD reverse bias is increased. If ID2>MID1, the APD reverse bias is decreased. If ID2=MID1, the APD reverse bias is not changed. Thus, the bias voltage applied to the APD406, and other APDs of the APD array402, is based on the dark current output by the APD410and the APD418as function of temperature and process.

FIG.5is a schematic diagram for an example bias voltage generation circuit422. The amplifier416is also shown inFIG.5for reference. The bias voltage generation circuit422includes a transistor502and a capacitor504. The transistor502may be a p-type field effect transistor (FET). A gate502G of the transistor502is coupled to the input422A of the bias voltage generation circuit422and the output416C of the amplifier416. A drain502D of the transistor502is coupled to a negative voltage source506. The negative voltage source506may provide voltage in a range of −20 to −250 volts for biasing the APD array402. A source502S of the transistor502is coupled to the output422B and to terminal504A of the capacitor504. A terminal504B of the capacitor504is coupled to ground. The difference voltage received at the gate502G of the transistor502controls the transistor502, and the bias voltage generated at the source502S of the transistor502.

FIG.6is a block diagram of a second APD circuit600that uses dark current to bias an APD. The APD circuit600may be a light detection circuit, a light detection and ranging (LIDAR) receiver circuit, or other optical transduction circuit. The APD circuit600includes the APD array402and a bias circuit604. The bias circuit604includes the bias output404A, the APD410, the current multiplier circuit412, the APD418, a transimpedance amplifier602, a unity gain buffer606(a buffer circuit), and a variable current source608. As explained with regard to the bias circuit404, the metal414and the metal420prevent light from reaching the APD410and the APD418.

The APD410is biased at a low reverse bias by the reference voltage source424. The dark current generated by the APD410is multiplied by M in the current multiplier circuit412. The multiplied dark current is provided to the variable current source608.

In the APD circuit600, the transimpedance amplifier602, the unity gain buffer606, the variable current source608, and the APD418are part of a bias voltage generation circuit. A control input608A of the variable current source608is coupled to the output412B of the current multiplier circuit412. The multiplied dark current received at the variable current source608controls the current output by the variable current source608. An input608C of the variable current source608is coupled to a negative voltage source610. Current MIDI output by the variable current source608is forced into the APD418to generate the bias voltage for the APD406. An output608B of the variable current source608is coupled to the anode418A of the APD418and the input606A of the unity gain buffer606. The cathode418C of the APD418is coupled to an input602A of the transimpedance amplifier602to provide the same cathode voltage as the APD406.

The unity gain buffer606buffers the voltage at the anode418A of the APD418. An output606B of the unity gain buffer606is coupled to the bias output404A to provide bias voltage to the APD406, and other APDs of the APD array402.

FIG.7is a block diagram of a third APD circuit700that uses dark current to bias an APD. The APD circuit700may be a light detection circuit, a light detection and ranging (LIDAR) receiver circuit, or other optical transduction circuit. The APD circuit700includes the APD array402and a bias circuit704. The bias circuit704includes the bias output404A, the APD410, the current multiplier circuit412, and a variable current source708. As explained with regard to the bias circuit404, the metal414prevent lights from reaching the APD410.

The APD410is biased at a low reverse bias by the reference voltage source424. The dark current generated by the APD410is multiplied by M in the current multiplier circuit412. The multiplied dark current is provided to the variable current source708.

In the APD circuit700, the variable current source702is part of a bias voltage generation circuit. A control input708A of the variable current source708is coupled to the output4126of the current multiplier circuit412. The multiplied dark current received at the variable current source708controls the current at output708B of the variable current source708. An input708C of the variable current source708is coupled to a negative voltage source710. Current MIDI output by the variable current source708is forced into the APD406to generate the desired bias voltage. An instance of the variable current source708is coupled to each APD of the APD array402with a control input coupled to the output412B of the current multiplier circuit412and an input coupled to the negative voltage source710.