Switching power supply circuit

A switching power supply circuit comprises: current detection means for detecting a current flowing through an inductor; current holding means for holding the current flowing through the inductor over a past predetermined period; and current superposition means for adding to an output of an error amplifier a current superposition signal which makes an adjustment, based on a present current information signal as an output signal of the current detection means, such that the ON-period of a switching signal of a PWM comparator is shortened, and also makes an adjustment, based on a past current information signal as an output signal of the current holding means, such that the ON-period of the switching signal of the PWM comparator is lengthened.

The entire disclosure of Japanese Patent Application No. 2006-156666 filed Jun. 5, 2006 is expressly incorporated by reference herein.

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates to a switching power supply circuit and, more specifically, to a switching power supply circuit useful when detecting a current flowing in the circuit, and providing feedback on current information to obtain a predetermined output voltage.

2. Description of the Related Art

In a switching power supply circuit, a current feedback mode is in wide use for maintaining the stability of the switching power supply circuit.

This type of switching power supply circuit according to an earlier technology is shown inFIG. 8. As shown in this drawing, the illustrated switching power supply circuit is a step-up switching power supply circuit for performing synchronous rectification. This switching power supply circuit has a switching means SW1formed from an N-channel MOS transistor, a switching means SW2formed from a P-channel MOS transistor, and an inductor L, designed to convert a direct current input voltage VIN into a predetermined direct current output voltage VOUT.

An error amplifier1outputs an error signal Verrrepresenting a differential voltage between a preset reference voltage VREF and a voltage obtained by dividing the direct current output voltage VOUT by resistances R1and R2. A PWM comparator2compares the error signal Verrwith an oscillation signal RAMP outputted by an oscillation circuit3, and exercises on/off control of the switching means SW1to SW2by a switching signal SWS of a predetermined duty determined based on the comparison. More concretely, a buffer circuit4forms switching signals SWS1and SWS2, based on the switching signal SWS, so as to turn off the switching means SW2during the ON-period of the switching means SW1, thereby turning the switching means SW1and the switching means SW2on and off alternately. That is, synchronous rectification is performed. In the drawing, C1signifies an output capacitor, and C2signifies a speed-up capacitor.

The above switching power supply circuit provides a current feedback system in order to stabilize control. That is, based on a current ISW flowing into the switching means SW1, a current information signal S11is formed by utilization of a voltage at the point of connection between the switching means SW1and a current detection resistance Rsen. The current information signal S11is supplied to a differential amplifier6to obtain a current superposition signal S12, which is added to the aforementioned error signal Verr(substantially, subtracted from the error signal Verr, because the sign of the current superposition signal S12is minus) at a subtracter5, whereby a new error signal Verr-ris obtained. This error signal Verr-ris compared with the oscillation signal RAMP by the PWM comparator2.

The current information signal S11is supplied to an inverting input terminal of the differential amplifier6having a non-inverting input terminal grounded.

FIGS. 9A to 9Dare waveform charts showing the waveforms of respective portions of the switching power supply circuit shown inFIG. 8.FIG. 9Ashows the waveform of the current ISW, andFIG. 9Bshows the waveform of the current information signal S11.FIG. 9Cshows the waveforms of the error signal Verr, the new error signal Verr-r(dotted line), which is the output signal of the subtracter5, and the oscillation signal RAMP, andFIG. 9Dshows the waveform of the switching signal SWS which is the output signal of the PWM comparator2.

As will become clear by reference toFIGS. 9Ato9D (especially,FIG. 9C), in the switching power supply circuit according to the above-mentioned earlier technology, the current superposition signal S12proportional to the current ISW flowing into the switching means SW1is subtracted from the error signal Verr. If the current ISW increases or decreases, therefore, it is necessary to adjust the output of the error amplifier1in conformity with the action of the PWM comparator2. As a result, the operating voltage of the error amplifier1increases, posing the problem of aggravating transient response characteristics.

Japanese Unexamined Patent Publication No. 2005-33936 can be named as a known patent document which discloses a switching power supply circuit having a current feedback system as mentioned above. The switching power supply circuit disclosed in this patent document samples current information at the turn-on of the switch each time switching takes place. However, this method involves the problem that the circuit is liable to instability, because feedback on a change in current occurring during a load change is impossible.

SUMMARY OF THE INVENTION

The present invention has been accomplished in the light of the above-described earlier technology. It is an object of the present invention to provide a switching power supply circuit capable of achieving the improvement of the operating voltage and the improvement of the transient response characteristics.

A first aspect of the present invention, for attaining the above object, is a switching power supply circuit having switching means and an inductor for converting a direct current input voltage into a direct current output voltage, comprising:

an error amplifier for outputting an error signal representing a differential voltage between a preset reference voltage and a voltage based on the direct current output voltage;

a PWM comparator for outputting a switching signal for on/off control of the switching means at a predetermined duty ratio determined by comparing the error signal with an oscillation signal outputted by an oscillation circuit;

current detection means for detecting a current flowing through the switching means or the inductor;

current holding means for holding the current flowing through the switching means or the inductor over a past predetermined period; and

current superposition means for adding a current superposition signal to an output of, or an interior of, the error amplifier, the current superposition signal making an adjustment, based on a present current information signal which is an output signal of the current detection means, such that an ON-period of the switching signal of the PWM comparator is shortened, and also making an adjustment, based on a past current information signal which is an output signal of the current holding means, such that the ON-period of the switching signal of the PWM comparator is lengthened.

A second aspect of the present invention is the switching power supply circuit according to the first aspect, characterized in that the current detection means has a first resistance connected in series with the switching means or the inductor, and obtains the present current information signal by utilization of a voltage at a point of connection between the switching means or the inductor and the first resistance.

A third aspect of the present invention is the switching power supply circuit according to the second aspect, characterized in that the current detection means has the first resistance connected in series with the switching means or the inductor, current detection switching means branched off from the point of connection between the switching means or the inductor and the first resistance and connected to the point of connection, and a first capacitor connected in series with the current detection switching means, and obtains the present current information signal by utilization of a voltage at a point of connection between the current detection switching means and the first capacitor.

A fourth aspect of the present invention is the switching power supply circuit according to the first aspect, characterized in that the current detection means has current detection switching means connected to the switching means via an ON-resistance of the switching means, and has a first capacitor connected in series with the current detection switching means, and obtains the present current information signal by utilization of a voltage at a point of connection between the current detection switching means and the first capacitor which is based on a voltage drop due to the ON-resistance.

A fifth aspect of the present invention is the switching power supply circuit according to the third or fourth aspect, further comprising control means in order to hold the present current information signal when the switching means becomes OFF, the control means controlling the switching signal of the PWM comparator such that after the switching means is turned on by the switching signal, the current detection switching means is turned on, and before the switching means is turned off, the current detection switching means is turned off.

A sixth aspect of the present invention is the switching power supply circuit according to any one of the first to fifth aspects, characterized in that the current holding means has a second resistance and a second capacitor connected in series, delays the current information signal, which has been detected by the current detection means, based on a time constant, and outputs the delayed current information signal as the past current information signal via a point of connection between the second resistance and the second capacitor.

A seventh aspect of the present invention is the switching power supply circuit according to any one of the first to sixth aspects, characterized in that the current superposition means has a differential amplifier which has the past current information signal inputted into one of input terminals thereof, and which has the present current information signal inputted into the other input terminal, and adds an output signal of the differential amplifier, as the current superposition signal, to the output or the interior of the error amplifier.

According to the present invention, a current superposition signal is added to the output or the interior of the error amplifier, the current superposition signal making an adjustment, based on the present current information signal as the output signal of the current detection means, such that the ON-period of the switching signal of the PWM comparator is shortened, and also making an adjustment, based on the past current information signal as the output signal of the current holding means, such that the ON-period of the switching signal of the PWM comparator is lengthened. Thus, the operating voltage of the error amplifier can be kept low, and high speed, high accuracy detection of current can result in a high response of the switching power supply circuit.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

The embodiments of the present invention will now be described in detail with reference to the accompanying drawings. The basic configuration of a switching power supply circuit in each embodiment is the same as that of the switching power supply circuit shown inFIG. 8. Thus, the same portions as those inFIG. 8are assigned the same numerals and symbols, and duplicate explanations are omitted.

First Embodiment

FIG. 1is a circuit diagram showing a switching power supply circuit according to a first embodiment of the present invention. As shown in this drawing, the switching power supply circuit according to the present embodiment has a current detection means11, a current holding means12, and a current superposition means13in a current feedback system.

The current detection means11detects a current IL, which flows through an inductor L, in real time via a current sensor14, and outputs a present current information signal S21representing this current IL. The current holding means12holds the current IL flowing over a past predetermined period, and outputs a past current information signal S22based on the current IL during the predetermined period in the past. The current superposition means13has an adder-subtracter15accepting the current information signals S21and S22as inputs, subtracts the present current information signal S21from an error signal Verr, which is the output signal of an error amplifier1, and also adds the past current information signal S22to the error signal Verr, to form a new error signal Verr-r, and then supplies this error signal Verr-rto a PWM comparator2. In this manner, the current information signal S21is subtracted from the error signal Verr, whereby the ON-period of a switching signal SWS of the PWM comparator2can be adjusted to become shorter. Also, the current information signal S22is added to the error signal Verr, whereby the ON-period of the switching signal SWS of the PWM comparator2can be adjusted to become longer.

According to the present embodiment described above, the current information signal S22, which is the output signal of the current holding means12, becomes a signal delayed by a predetermined period with respect to the current information signal S21which is the output signal of the current detection means11. Thus, if a load change occurs in the switching power supply circuit to cause a change to the current flowing through the inductor L, the switching means SW1and the switching means SW2, a great difference occurs between the current information signals S21and S22to suppress a change in the error signal Verrwhich is the output of the error amplifier1.

In this manner, the stabilization of the switching power supply circuit can be achieved. If a steady state is attained thereafter, the difference between the current information signals S21and S22is diminished. As a result; the error signal Verrbecomes equal to the same state as that before the transient response, thereby making it possible to decrease the operating range of the error amplifier1.

Second Embodiment

FIG. 2is a circuit diagram showing a switching power supply circuit according to a second embodiment of the present invention. As shown in this drawing, a current detection means21has a resistance Rsenconnected in series with an inductor L, and obtains a present current information signal S21by utilization of a voltage at the point of connection between the inductor L and the resistance Rsen.

A current holding means22has a resistance R3and a capacitor C4connected in series, and delays the current information signal S21, which has been detected by the current detection means21, based on a time constant determined by the resistance value of the resistance R3and the capacity of the capacitor C4. As a result, a past current information signal S22is obtained via the point of connection between the resistance R3and the capacitor C4.

A current superposition means23has a differential amplifier24and an adder25. The differential amplifier24has the present current information signal S21received into its inverting input terminal, and has the past current information signal S22received into its non-inverting input terminal. The adder25receives, as an input, a current superposition signal S23which is the output signal of the differential amplifier24. As a result, the current superposition signal S23is superposed on an error signal Verr, which is the output signal of an error amplifier1, to form a new error signal Verr-r, which is outputted to a PWM comparator2.

The current superposition signal S23is obtained, at the differential amplifier24, as a signal produced by subtracting the current information signal S21from the current information signal S22. Thus, the current superposition signal S23makes adjustments such that the ON-period of a switching signal SWS of the PWN comparator2is shortened based on the present current information signal S21, and the ON-period of the switching signal SWS is lengthened based on the past current information signal S22.

According to the present embodiment, the object of the present invention can be attained by a very simple circuit configuration having the resistances and the capacitor added to the earlier technology.

Third Embodiment

FIG. 3is a circuit diagram showing a switching power supply circuit according to a third embodiment of the present invention. As shown in this drawing, a current detection means31has a resistance Rsenconnected in series with a switching means SW1, a current detection switching means SW3branched off from the point of connection between the switching means SW1and the resistance Rsenand connected to this point of connection, and a first capacitor C3connected in series with the current detection switching means SW3. A present current information signal S21is obtained by utilization of a voltage at the point of connection between the current detection switching means SW3and the capacitor C3. The current detection switching means SW3is composed of an N-channel MOS transistor, and is turned on by a switching signal SWS1which is the output signal of a buffer circuit4and which is supplied to the gate of the current detection switching means SW3. The switching signal SWS1is simultaneously supplied to the gate of the switching means SW1which is an N-channel MOS transistor like the current detection switching means SW3.

The switching signal SWS1is supplied to the gate of the current detection switching means SW3via a control means26. The control means26controls the switching signal SWS1such that after the switching means SW1is turned on by the switching signal SWS1, the current detection switching means SW3is turned on, and before the switching means SW1is turned off, the current detection switching means SW3is turned off. Thus, when the switching means SW1is turned off, the present current information signal S21can be held.

A current holding means22has a resistance R3and a capacitor C4connected in series, and delays the current information signal S21, which has been detected by the current detection means31, based on a time constant determined by the resistance value of the resistance R3and the capacity of the capacitor C4. As a result, a past current information signal S22is obtained via the point of connection between the resistance R3and the capacitor C4.

A current superposition means23has a differential amplifier24and an adder25. The differential amplifier24has the present current information signal S21inputted into its inverting input terminal, and has the past current information signal S22inputted into its non-inverting input terminal. The adder25receives, as an input, a current superposition signal S23which is the output signal of the differential amplifier24. As a result, the current superposition signal S23is superposed on an error signal Verr, which is the output signal of an error amplifier1, to form a new error signal Verr-r, which is outputted to a PWM comparator2.

The current superposition signal S23is obtained, at the differential amplifier24, as a signal produced upon subtraction of the current information signal S21from the current information signal S22. Thus, the current superposition signal S23is adjusted such that the ON-period of a switching signal SWS of the PWN comparator2is shortened based on the present current information signal S21, and the ON-period of the switching signal SWS is lengthened based on the past current information signal S22.

FIGS. 4A to 4Dare waveform charts showing the waveforms of respective portions of the switching power supply circuit according to the present embodiment.FIG. 4Ashows the waveform of a current ISW, andFIG. 4Bshows the wave form of the present current information signal S21(solid line) and the waveform of the past current information signal S22(dashed line).FIG. 4Cshows the waveforms of the error signal Verr, the new error signal Verr-r(dotted line), which is the output signal of the adder25, and an oscillation signal RAMP.FIG. 4Dshows the waveform of the switching signal SWS which is the output signal of the PWM comparator2.

As will become clear by reference toFIGS. 4A to 4D(especially,FIGS. 4B and 4C), in the switching power supply circuit according to the present embodiment, the current information signal S22is a signal delayed by a predetermined period with respect to the current information signal S21. Furthermore, the current superposition signal S23, which represents a difference produced upon subtraction of the present current information signal S21from the past current information signal S22, is supplied to the adder25. Thus, a change in the error signal Verrcan be suppressed.

Fourth Embodiment

FIG. 5is a circuit diagram showing a switching power supply circuit according to a fourth embodiment of the present invention. As shown in this drawing, the present embodiment is a variation of the configuration of the current detection means31according to the third embodiment. The other features in the present embodiment are exactly the same as those in the third embodiment. Thus, the same portions as those inFIG. 3are assigned the same numerals and symbols, and duplicate explanations are omitted.

A current detection means41according to the present embodiment has a current detection switching means SW3connected to a switching means SW1, which is an N-channel MOS transistor, via the ON-resistance of the switching means SW1, and has a capacitor C3connected in series with the current detection switching means SW3. The current detection means41obtains a present current information signal S21by utilization of a voltage at the point of connection between the current detection switching means SW3and the capacitor C3which is based on a voltage drop due to the ON-resistance. That is, the drain of the current detection switching means SW3, which is an N-channel MOS transistor, is connected to the drain of the switching means SW1which is similarly the N-channel MOS transistor. According to the present embodiment, therefore, the current detection resistance RseninFIG. 3can be omitted, thus contributing to the downsizing of the switching power supply circuit.

A switching signal SWS1is supplied to the gate of the current detection switching means SW3via a control means26, as in the third embodiment shown inFIG. 3. The control means26controls the switching signal SWS1such that after the switching means SW1is turned on by the switching signal SWS1, the current detection switching means SW3is turned on, and before the switching means SW1is turned off, the current detection switching means SW3is turned off. Thus, when the switching means SW1is turned off, the present current information signal S21can be held.

Other Embodiments

The first to fourth embodiments described above are all step-up switching power supply circuits, but needless to say, step-down switching power supply circuits can be formed based on the same technical ideas as described there.FIGS. 6 and 7show step-down switching power supply circuits according to embodiments of the present invention. InFIGS. 6 and 7, portions functionally corresponding to the portions inFIGS. 1 to 5are assigned the same numerals and symbols as in these drawings, and duplicate explanations are omitted.

The present invention can be used, for example, in the industrial field of electronic equipment where a switching power supply circuit for forming a power supply circuit in a cellular phone or a personal computer is produced and marketed.

Although the present invention has been described by the above embodiments, it should be understood that the invention is not limited to these embodiments, but may be varied in many ways as indicated below.

The present current information signal S21in each of the above-described embodiments is formed by utilization of the current IL flowing through the inductor L, or the current ISW flowing through the switching means SW1, but can be formed by utilization of a current flowing through the switching means SW2. Furthermore, besides the current IL flowing into the inductor L, the current flowing through the drain side or source side of the switching means SW1, or the drain side or source side of the switching means SW2can be similarly utilized.

Moreover, the current superposition signal S23is superposed on the error signal Verrvia the adder-subtracter15or the adder25. However, the current superposition signal S23may be directly supplied into the error amplifier1, and superposed there.

Besides, an offset may be provided such that the influence on the switching signal SWS based on the present current information signal S21is greater than the influence on the switching signal SWS based on the past current information signal S22. Various methods of creating a concrete offset can be conceived by selecting, as appropriate, the specifications for the circuit elements, such as the sizes and resistance values of the respective transistors. For example, this can be done by applying an offset voltage to the differential amplifier24to render the present current information signal S21greater than the past current information signal S22.

If such an offset is provided, the degree of fall in the error signal Verrshown inFIG. 4Ccan be adjusted.

Each of the embodiments of the present invention comprises a combination of one of the current detection means11,21,31and41, one of the current holding means12and22, and one of the current superposition means13and23. However, such a combination is not restrictive, and any of these means can be combined freely.

Such changes, substitutions and alterations can be made in the present invention without departing from the spirit and scope of the invention as defined by the appended claims.