Method of and system for high-frequency-corresponding simulation, and computer product

The high-frequency-corresponding simulation apparatus includes a control section that calculates a sum of the DC resistance value and skin resistance value of each of a plurality of elements corresponding to wiring patterns in accordance with circuit deign information, sorts resistance values corresponding to the elements by using a high-frequency element delay as a key when the total resistance value is equal to or larger than a first threshold value, integrates resistance values starting with a resistance value having the smallest high-frequency element delay, and which determines whether the result of the integration reaches a value immediately before a second threshold value whenever the integration is executed and a RLC-model analysis section.

FIELD OF THE INVENTION

The present invention relates to a technology that makes it possible to decrease analysis time during used to analysis of high frequency.

BACKGROUND OF THE INVENTION

Frequencies used for information equipment including network units and a personal computers have been remarkably improved recently and are newly reaching a gigahertz band from a megahertz band. Thereby, a signal analysis considering influences of various noises is also requested for a high-frequency signal for transmitting the wiring pattern of a printed circuit board.

A circuit designer of an integrated circuit or the like selects a circuit device constituting a circuit or the value of a parameter for controlling the characteristic of the circuit device.

At present, a circuit simulator is used when designing circuits. The circuit simulator simulates a circuit operation on a computer without fabricating an actual circuit and shows the circuit operation for a designer. The simulator operated by the software referred to as SPICE2 developed by University of California at Berkley in 1972 is publicly known.

For example, the circuit simulator executes simulation in accordance with the connection data between circuit devices constituting a circuit to be analyzed and device parameters to estimate an amount of noise under a predetermined operational state of each circuit device and display or print the estimated number of noises.

As described above, the conventional circuit simulator is good for the waveform analysis up to approx. 100 MHz and is greatly supported by various designers. Because frequencies of information equipment have been remarkably raised recently and are reaching a gigahertz band from a megahertz band, a waveform analysis considering influences of various noises is requested for a high-frequency signal for transmitting a wiring pattern to a printed circuit board.

The skin effect is a typical one influencing a transmission waveform in a high-frequency band (approx. 300 MHz or higher). This is a phenomenon in which current is concentrated on the surface of a printed circuit board and resultantly a resistance component increases to cause a waveform distortion. That is, in the graph G shown inFIG. 15, the waveform L1denotes a result of performing an analysis by a circuit simulator without considering the skin effect. The waveform L2denotes a result of performing an analysis by a circuit simulator by considering the skin effect. As shown in the graph G, a large difference is produced in the rise of a waveform which is an analysis result between a case of considering the skin effect and a case of not considering the skin effect.

In the case of a conventional circuit simulator, however, an analysis is performed by using a loss transmission-line element referred to as a high-frequency element in order to perform the analysis by considering the skin effect. In this case, when modeling an actual wiring pattern, a portion (curved portion) in which specifications of a wiring pattern are changed is modeled into a micro high-frequency element having an unexpectedly small wiring length. In this case, it is a problem that waveform analysis time increases as the number of micro high-frequency elements increases.

Therefore, when considering the skin effect, that is, when performing an analysis correspondingly to a high frequency, a convention circuit simulator is not practical because a wave analysis requires approx. 3,000 hr due to influences of the micro high-frequency element.

SUMMARY OF THE INVENTION

It is object of this invention to provide a method of and apparatus for high-frequency-corresponding simulation. It is another object of this invention to provide a computer-readable recording medium that stores a computer program which when executed on a computer realizes the method according to the present invention on the computer.

The high-frequency-corresponding simulation apparatus according to one aspect of this invention comprises an element setting unit which sets a plurality of elements corresponding to wiring patterns in accordance with circuit design information; a resistance-value calculation unit which calculates the total of resistance values each of which is the sum of the DC resistance value and skin resistance value of each of the elements as the total resistance value; a first determination unit which determines whether the total resistance value is less than a first threshold value; a sorting unit which sorts resistance values corresponding to the elements when the total resistance value is equal to or larger than the first threshold value in accordance with a determination result by said first determination unit; a second determination unit which integrates the resistance values starting with a resistance value having the smallest high-frequency element delay and determines whether the integration result reaches a value immediately before a second threshold value whenever the integration is executed; and an analysis unit which executes an analysis by using an element corresponding to an integrated resistance value as a RLC model and elements other than the element as high-frequency element models when said second determination unit determines that the integration result reaches the value immediately before the second threshold value.

The high-frequency-corresponding simulation method according to another aspect of this invention comprises the steps of: setting a plurality of elements corresponding to wiring patterns in accordance with circuit design information; calculating the total of resistance values each of which is the sum of the DC resistance value and skin resistance value of each of the elements as the total resistance value; determining whether the total resistance value is less than a first threshold value; sorting resistance values corresponding to the elements by using a high-frequency element delay as a key when it is determined that the total resistance value is equal to or larger than the first threshold value; integrating the resistance values starting with a resistance value having the smallest high-frequency element delay; determining whether the result of integration reaches a value immediately before a second threshold value whenever the integration is executed; and executing an analysis by using an element corresponding to an integrated resistance value as a RLC model and elements other than the element as high-frequency element models when it is determined that the integration result reaches the value immediately before the second threshold value.

The computer-readable recording medium according to another aspect of this invention stores a computer program which when executed on a computer realizes the method according to the present invention on the computer.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Embodiments of the method of and apparatus for high-frequency-corresponding simulation, and the computer-readable recording medium according to the present invention will be described below in detail by referring to the accompanying drawings.

FIG. 1is a block diagram showing a configuration of an embodiment of the present invention. A configuration of a high-frequency-corresponding simulation apparatus to be applied to the design of a high-frequency circuit is shown inFIG. 1. As shown inFIG. 1, the input section1is for inputting wiring data, parameters, and various commands of a circuit to be designed. The control section2controls each section of the apparatus. Operations of the control section2will be described in detail later.

The storage section3stores wiring data and parameters. The wiring-model generation section4generates a wiring model for signal analysis in accordance with the wiring data. The high-frequency element-model analysis section5analyzes a high-frequency element model. The RLC-model analysis section6analyzes a RLC model. The display section7displays the analysis results and the like. The high-frequency element model and the RLC model shall be described in detail later.

FIG. 2is an illustration showing a model of a wiring pattern10to be analyzed by a high-frequency-corresponding simulation apparatus. InFIG. 2, a wiring pattern12and a wiring pattern15are illustrated in parallel. A driver11D and a receiver11R are set to both ends of the wiring pattern12. The driver11D transmits a signal through the wiring pattern12. The receiver11R receives the signal.

Moreover, a driver14D and a receiver14R are set to the both ends of the wiring pattern15. The driver14D transmits a signal through the wiring pattern15. The receiver14R receives the signal. Furthermore, a section K1and a section K2are present through a connector13in the wiring pattern10.

The wiring pattern10is modeled every divided wiring pattern by noting the portion in which specifications of a wiring pattern are changed or the mutual interference between wiring patterns as shown inFIG. 2. That is, inFIG. 2, the following are generated: simplex wiring models W0, W4, . . . , Wm, . . . , W70and W1, W5, . . . Wn, . . . , W71not considering the mutual inductance or mutual capacitance between wiring patterns and parallel wiring models W2and W4considering the mutual inductance and mutual capacitance between wiring patterns. In this case, the simplex wiring models and parallel wiring models include models corresponding to RLC (where R represents resistance, L represents inductance, and C represents capacitance) to be described later and models corresponding to high-frequency elements.

The RLC simplex wiring model20shown inFIG. 3Ais a model corresponding to a simplex wiring pattern21, which is shown by an equivalent circuit constituted of a resistance R1, an inductance L1, and a capacitance C1.FIG. 3Bis an illustration showing an image when RLC simplex wiring models201,202, and203are continuously present along the wiring pattern21. In the case of a high-frequency-corresponding simulation apparatus, node Nos.1,2,3,6, and7are provided for the both ends of each line segment of the wiring pattern21.

Moreover, the high-frequency-corresponding simulation apparatus realizes the RLC simplex wiring models are shown by the RLC simplex wiring-model format22shown inFIG. 3C. Xaaaa denotes a call statement. [Node1] corresponds to one node No. of a line segment of the wiring pattern21. [Node2] corresponds to another node No. of a line segment of the wiring pattern21.

LINE01corresponds to the wiring pattern21. R1=[R1] corresponds to the resistance value of a line segment of the wiring pattern21. L1=[L1] corresponds to the inductance of a line segment of the wiring pattern21. C1=[C1] corresponds to the capacitance of a line segment of the wiring pattern21.FIG. 3Dis an illustration showing a specific example23of the RLC simplex wiring model format22.

The RLC parallel wiring model30shown inFIG. 4Ais a model corresponding to wiring patterns31and32arranged in parallel, which is shown by an equivalent circuit constituted of the resistance R1, inductance L1, and capacitance CG1of the wiring pattern31, the resistance R2, inductance L2, and capacitance CG2of the wiring pattern32, and mutual inductance KM12and mutual capacitance CM12between the wiring patterns31and32.

FIG. 4Bis an illustration showing an image when RLC parallel wiring models301,302, and303are continuously present along the wiring patterns31and32arranged in parallel. In the case of a high-frequency-corresponding simulation apparatus, node Nos.1,2,3,6, and7are provided for the both ends of each line segment of the wiring pattern31and node Nos.8,9,10,13, and14are provided for the both ends of each line segment of the wiring pattern32.

Moreover, the high-frequency-corresponding simulation apparatus realizes the RLC parallel wiring models are shown by the RLC parallel wiring model format33shown inFIG. 4C. Xaaaa denotes a call statement. [D-ed Node1] corresponds to one node No. of a line segment of the wiring pattern31. [D-ed Node2] corresponds to the other node No. of the line segment of the wiring pattern31. [D-ing Node1] corresponds to one node No. of a line segment of the wiring pattern32. [D-ing Node2] corresponds to the other node No. of the line segment of the wiring pattern32.

The high-frequency-element simplex wiring models401and402shown inFIG. 5Aare models corresponding to a simplex wiring pattern41. These high-frequency-element simplex wiring models401and402are shown by the declarative statement Waaaa of a high-frequency-element simplex wiring model, [node1] and [node2] , a high-frequency-element factor name describing an electrical constant, and an element length L like the high-frequency-element simplex wiring model format42shown inFIG. 5B.

The high-frequency-element factor name corresponds to the name “P001_100” (POOL: pattern case,100: pattern width) of the simplex-wiring-model high-frequency-element file name70shown inFIG. 8.FIG. 5Cis an illustration showing a specific example43of a simplex wiring-model format42.

Variables of the simplex wiring-model high-frequency-element factor file70are listed below.N: Number of wiring patterns (1 for simplex)L: InductanceC: CapacitanceR: DC resistance valueG: ConductanceRS: Skin resistance coefficientGD: Inductive loss factor

The high-frequency-element parallel wiring models501and502shown inFIG. 6Aare models corresponding to wiring patterns51and52arranged in parallel. These high-frequency-element parallel wiring models501and502are shown by the declarative statement Waaaa of a high-frequency-element parallel wiring model, [d-ed-node1] corresponding to the wiring pattern51, [d-ing-node1] corresponding to the wiring pattern52, [d-ed-node2] corresponding to the wiring pattern51, [d-ing-node2] corresponding to the wiring pattern52, a high-frequency-element factor name describing an electrical constant, and an element length L like the high-frequency-element parallel wiring model format53shown inFIG. 6B.

The high-frequency-element factor name corresponds to the name “N001_254_1.414” (N001: noise case,254: pattern pitch,1.414: diagonal correction factor) of the parallel-wiring-model high-frequency-element factor file80shown inFIG. 9.FIG. 6Cis an illustration showing a specific example54of the high-frequency-element parallel wiring model format53.

Variables of the parallel-wiring-model high-frequency-element factor file80are listed below.N: Number of wiring patterns (2 for parallelism)L11: Inductance of wiring pattern51L22: Inductance of wiring pattern52L12: Mutual inductance between wiring patterns51and52C11: Capacitance of wiring pattern51C22: Capacitance of wiring pattern52C12: Mutual capacitance between wiring patterns51and52R11: DC resistance value of wiring pattern51R22: DC resistance value of wiring pattern52R12: 0 (Fixed)G11: Conductance of wiring pattern51G22: Conductance of wiring pattern52G12: Mutual conductance between wiring patterns51and52RS11: Skin-resistance coefficient of wiring pattern51RS22: Skin-resistance coefficient of wiring pattern52RS12: 0 (Fixed)GD11: Inductive loss factor of wiring pattern51GD22: Inductive loss factor of wiring pattern52GD12: Mutual inductive loss factor between wiring patterns51and52

FIGS. 7A and 7Bare illustrations for explaining the micro high-frequency element.FIG. 7Ashows wiring patterns60and61arranged in parallel. When modeling these wiring patterns60and61, wiring models BW1to BW15are generated. In this case, portions where specifications of a wiring pattern are changed (curved portion) unexpectedly have a small wiring length. That is, the portions are modeled into micro high-frequency elements BW2, BW4, BW6, BW8, BW10, BW12, and BW14respectively having a small high-frequency element delay (refer toFIG. 7B).

In this case, as shown inFIG. 7B, analysis time tends to increase like a quadratic function. Therefore, in the case of an analysis, the whole analysis time increases as the number of micro high-frequency elements increases. The embodiment is characterized by decreasing the number of micro high-frequency elements in calculation to decrease the whole analysis time.

FIG. 10is an illustration for explaining the operational theory of the embodiment. InFIG. 10, when performing an analysis by using a factor90of a RLC model, a problem occurs that an analysis accuracy lowers when applying the factor90to a high frequency because it does not correspond to the high frequency. Moreover, when performing an analysis by using factors91,92and93corresponding to a high-frequency element model, an advantage is obtained that the analysis accuracy rises because they correspond to a high frequency. However, a critical problem occurs that analysis time is greatly increased due to the influence of the micro high-frequency element and they are not practically used.

Therefore, in the case of the embodiment, a factor94of a RLC model is mixed with factors95and96of high-frequency elements to decrease analysis time while keeping an analysis accuracy.

Operations of this embodiment are described below by referring to the flowchart shown inFIG. 11. In step SA1shown inFIG. 11, wiring data, parameters, and various commands of a circuit to be designed are input from an input section1. In step SA2, a control section2determines whether to execute an analysis in which all wiring models are used as high-frequency element models. When the determination result is “Yes”, a wiring-model generation section4executes the high-frequency-element modeling of changing all wiring patterns to high-frequency element models in step SA3.

Therefore, in the case of the high-frequency-element modeling, many micro high-frequency element models shown inFIG. 7Aare generated. In step SA4, a high-frequency-element-model analysis section5performs an analysis (corresponding to the high-frequency element model shown inFIG. 10) by using the high-frequency element models. In this analysis, analysis time is increased due to the influence of an micro high-frequency element.

However, when the determination result in step SA2is “No”, the control section2determines in step SA5whether the total resistance value [LnetR] of high-frequency elements corresponding to the wiring patterns12and15shown inFIG. 2is less than a preset threshold value [LnetR-mg]. The total resistance value [LnetR] is the sum of the DC resistance value and skin resistance value of a high-frequency element.

The total resistance value [LnetR] is obtained from the following expression.
Total resistance value [LnetR]=Σ[LnetR-high-frequency element]

[LnetR-high-frequency element] is obtained for the wiring pattern12and the wiring pattern15respectively.
[LnetR-high-frequency element]=(([R+RS×√{square root over ( )}(fs)]×[L high-frequency element])×adj_LnetR),
whereR: DC resistance value of each high-frequency elementRS: Skin resistance coefficient of each high-frequency element[L high-frequency element]:Length of each high-frequency elementfs: Frequency used for skin-resistance calculation adj_LnetR: Resistance correction factorA high-frequency element delay [tpd] (refer toFIG. 7B) is obtained from the following expression.
[tpd]=(√{square root over ( )}(L×C))×[L high-frequency element]
<For high-frequency-element parallel wiring model (1)>[LnetR-high-frequency element] is obtained for the case of noting the wiring pattern12out of the wiring patterns12and15.
[LnetR-high-frequency element]=(([R11+RS11×√{square root over ( )}(fs)]×[L high-frequency element])×adj_LnetR),
whereR11: DC resistance value of each high-frequency element corresponding to wiring pattern12RS11: Skin resistance coefficient of each high-frequency element corresponding to wiring pattern12[L high-frequency element]: Length of each high-frequency elementfs: Frequency used for skin-resistance calculation adj_LnetR: Resistance correction factorA high-frequency-element delay [tpd] (refer toFIG. 7B) is obtained from the following expression.
[tpd]=(√{square root over ( )}(L11×L12)×(C11×C12))×[Lhigh-frequency element]
<For high-frequency-element parallel wiring model (2)>[LnetR-high-frequency element] is obtained for the case of noting the wiring pattern15out of the wiring patterns12and15.
[LnetR-high-frequency element]=(([R22+RS22×√{square root over ( )}(fs)]×[L high-frequency element])×adj_LnetR),
whereR22: DC resistance value of each high-frequency element corresponding to wiring pattern15RS22: Skin resistance coefficient of each high-frequency element corresponding to wiring pattern15[L high-frequency element]: Length of each high-frequency elementfs: Frequency used for skin resistance calculation adj_LnetR: Resistance correction factorA high-frequency element delay [tpd] (refer toFIG. 7B) is obtained from the following expression.
[tpd]=(√{square root over ( )}(L22×L12)×(C12×C12))×[L high-frequency element]

In this case, when the total resistance value [LnetR] is less than the threshold value [LnetR-mg], that is, when correspondence to a high frequency is unnecessary, the control section2sets the determination result in step SA5shown inFIG. 11to “Yes”. In step SA12, the wiring-model generation section4executes RLC modeling of changing all wiring patterns into RLC models. In this case, a skin resistance corresponding to fs (frequency used for skin resistance calculation) is superimposed on the DC resistance of a RLC model. In this case, the value of the skin resistance to be superimposed can be changed through setting using the input section1. In step SA13, the RLC model analysis section6performs an analysis (corresponding to RLC model shown inFIG. 10) by using the RLC models.

However, when the determination result in step SA5is “No”, that is, when correspondence to a high frequency is necessary and analysis time is decreased, the control section2executes sorting in step SA6. That is, in the high-frequency-element model list100shown inFIG. 12, the control section2sorts high-frequency element models starting with a high-frequency element model having the smallest high-frequency element delay tpd. In the high-frequency-element model list100, d-ed (resistance value) corresponds to the wiring pattern12(or wiring pattern15) and d-ing corresponds to the wiring pattern15(or wiring pattern12).

In step SA7, the control section2integrates resistance values. Specifically, the control section2successively integrates d-ed (resistance value: DC resistance value+skin resistance value) and d-ing (resistance value: DC resistance value+skin resistance value) shown inFIG. 12in order of sorting and compares each resistance-value integration result [LnetR] with the threshold value [LnetR-mg] whenever performing the integration. The threshold value [LnetR-mg] can be changed through setting using the input section1. In the comparison, the control section2executes resistance-value integration up to a value immediately before the resistance-value integration result [LnetR] reaches the threshold value [LnetR-mg].

The resistance-value integration result [LnetR] is obtained from the following expression.
Resistance-value integration result [LnetR]=[LnetR-high-frequency element]

[LnetR-high-frequency element] is obtained for the above-described high-frequency-element simplex wiring model (refer toFIG. 5A) and the high-frequency-element model (refer toFIG. 6A) respectively as described below.

[LnetR-high-frequency element] is obtained for the wiring pattern12and the wiring pattern15respectively.
[ΣLnetR-high-frequency element]=(([R+RS×√{square root over ( )}(fs)]×[L high-frequency element])×adj_LnetR),
whereR: DC resistance value of each high-frequency elementRS: Skin resistance coefficient of each high-frequency element [L high-frequency element]: Length of each high-frequency elementfs: Frequency used for skin resistance calculation adj_LnetR: Resistance correction factor
<For high-frequency-element parallel wiring model (1)>[LnetR-high-frequency element] is obtained for the case of noting the wiring pattern12out of the wiring patterns12and15.
[LnetR-high-frequency element]=(([R11+RS11×√{square root over ( )}(fs)]×[L high-frequency element])×adj_LnetR),
whereR11: DC resistance value of each high-frequency element corresponding to wiring pattern12RS11: Skin resistance coefficient of each high-frequency element corresponding to wiring pattern12[L high-frequency element]:Length of each high-frequency elementfs: Frequency used for skin resistance calculation adj_LnetR: Resistance correction factor
<For high-frequency-element parallel wiring model (2)>[LnetR-high-frequency element] is obtained for the case of noting the wiring pattern15out of the wiring patterns12and15.
[LnetR-high-frequency element]=(([R22+RS22×√{square root over ( )}(fs)]×[L high-frequency element])×adj_LnetR),
whereR22: DC resistance value of each high-frequency element corresponding to wiring pattern15RS22: Skin resistance coefficient of each high-frequency element corresponding to wiring pattern15[L high-frequency element]: Length of each high-frequency elementfs: Frequency used for skin resistance calculation adj_LnetR: Resistance correction factor

When the resistance integration in step SA7is completed, the control section2executes the processing in step SA8. In this case, as shown inFIG. 12, it is assumed that the portion101(portion102) of W2(1Ω) (W30(1.2Ω)) reaches a limit at the d-ed side (d-ing side).

In step SA8, the control section2selects a conversion object of a RLC model. Specifically, as shown inFIG. 12, the control section2uses a high-frequency element which does not reach a limit (inFIG. 12, a high-frequency element upper than the portions101and102) as a RLC-model conversion object. High-frequency elements other than the above are used as high-frequency-element-model conversion objects.

That is, step SA8is the processing for decreasing analysis time by using a high-frequency element having a small high-frequency element delay tpd which greatly influences increase of the analysis time as a RLC model. Moreover, a limit is set in order to prevent the accuracy of an analysis result from lowering.

In step SA9, the wiring-model generation section4executes the mixed modeling of changing a high-frequency element to be converted into a RLC model to a RLC model and a high-frequency element to be converted into a high-frequency element model into a high-frequency element (RLC model+high-frequency element mode: refer toFIG. 10). In this case, a skin resistance corresponding to fs (frequency used for skin resistance calculation) is superimposed on the DC resistance of a RLC model. Moreover, the value of a skin resistance to be superimposed can be changed in accordance with the setting using the input section1.

In step SA10, mixed-model analysis is executed. Specifically, the RLC-model analysis section6executes an analysis in accordance with a RLC model among mixed models. However, the high-frequency-element-model analysis section5executes an analysis in accordance with a high-frequency element model among the mixed models. In step SA11, the control section2makes the display section7display analysis results of the mixed models. In this case, the present inventor confirms the time of an analysis according to a mixed model is greatly decreased to approx. 11 h compared to approx. 3,000 h which is the time of an analysis according to only a high-frequency element model.

The embodiment can be applied to a substrate110constituted of three substrates1112to1113as a modification1as shown inFIG. 13. The substrate1112is provided with a driver112D and the substrate1113is provided with a receiver112R. A wiring pattern113is formed from the substrate1111to the substrate1113.

As described above, according to the embodiment, an analysis is executed in accordance with a mixed model in which a high-frequency element having a small high-frequency element delay causing analysis time to increase is used as a RLC model and a high-frequency element having high-frequency element delays other than the above delay is used as mixed models when the total resistance value [LnetR] serves as a first threshold value or more for a preset threshold value [LnetR-mg] or more. Therefore, it is possible to decrease a high-frequency-corresponding analysis time.

Moreover, according to the embodiment, when the total resistance value [LnetR] is less than the preset threshold value [LnetR-mg], all elements are analyzed as RLC models. Therefore, it is possible to correspond to a case unnecessary for corresponding to a high frequency and thus, improve flexibility.

Furthermore, a skin resistance value is superimposed on the DC resistance value of a RLC model. Therefore, it is possible to decrease the analysis error corresponding to an element not corresponding to a high frequency and improve the analysis accuracy.

An embodiment of the present invention is described above by referring to the accompanying drawings. However, a specific configuration is not restricted to the embodiment. Design modifications are included in the present invention as long as they are not deviated from the gist of the present invention. For example, it is also permitted to realize a function of a high-frequency-corresponding simulation apparatus by recording a computer program that realizes the function of the high-frequency-corresponding simulation apparatus shown inFIG. 1in the computer-readable recording medium300shown inFIG. 14, making the computer200shown inFIG. 14read the high-frequency-corresponding simulation program recorded in the recording medium300, and executing the program.

The computer200shown inFIG. 14is constituted of a CPU201for executing the high-frequency-corresponding simulation program, an input unit202including a keyboard and mouse, a ROM (Read Only Memory)203for storing various data values, a RAM (Random Access Memory)204for storing operation parameters and the like, a reader205for reading the high-frequency-corresponding simulation program from the recording medium300, an output unit206including a display and printer, and a bus BU for connecting sections of the apparatus.

The CPU201realizes the function of the high-frequency-corresponding simulation apparatus by reading the high-frequency-corresponding simulation program from the recording medium300via the reader205and then executing the high-frequency-corresponding simulation program. The recording medium300includes not only portable recording media such as an optical disk, floppy disk, and hard disk but also a transmission medium for temporarily holding data such as a network.

As described above, according to the present invention, when the total resistance value corresponding to a plurality of elements is equal to or larger than a first threshold value, an analysis is executed in accordance with a mixed model obtained by using a high-frequency element having a small high-frequency-element delay causing analysis time to increase as a RLC model and high-frequency elements other than the high-frequency element having a small high-frequency-element delay as high-frequency element models. Therefore, an advantage is obtained that it is possible to decrease the analysis time corresponding to a high frequency.

Moreover, according to the present invention, when the total resistance value is less than a first threshold value, analysis is executed by using all elements as RLC models. Therefore, an advantage is obtained that the flexibility can be improved because it is possible to correspond to a case unnecessary for corresponding to a high frequency.

Furthermore, according to the present invention, a skin resistance value is superimposed on the DC resistance value of a RLC model. Therefore, it is possible to reduce an analysis error corresponding to an element not corresponding to a high frequency and improve an analysis accuracy.