Method of forming semiconductor structure and semiconductor structure

The present disclosure provides a method of forming a semiconductor structure and a semiconductor structure. The method of forming a semiconductor structure includes: providing an initial structure, where the initial structure includes a substrate and bit line structures arranged at intervals on the substrate; forming an initial protective structure, where the initial protective structure at least covers a part of sidewalls of each of the bit line structures, and the initial protective structure has a first height in a direction parallel to the bit line structures; forming a shielding structure, where the shielding structure at least covers a part of sidewalls of the initial protective structure; and removing at least a part of the initial protective structure exposed by the shielding structure by using the shielding structure as an etching selection layer, to form protective structures each having a second height.

TECHNICAL FIELD

The present disclosure relates to, but is not limited to, a method of forming a semiconductor structure and a semiconductor structure.

BACKGROUND

As the integration of the dynamic random access memory (DRAM) increases, the DRAM manufacture process is required to have higher control accuracy.

At present, the height of the isolation structure covering sidewalls of the bit line structure cannot be precisely controlled in the DRAM manufacture process, and the etching of the isolation structure may damage the sidewalls of the bit line structure, which causes a great risk to the subsequent manufacture process and seriously affects the yield and reliability of the product.

SUMMARY

An overview of the subject matter detailed in the present disclosure is provided below, which is not intended to limit the protection scope of the claims.

The present disclosure provides a method of forming a semiconductor structure and a semiconductor structure.

According to a first aspect, the present disclosure provides a method of forming a semiconductor structure. The method of forming a semiconductor structure includes:providing an initial structure, where the initial structure includes a substrate and bit line structures arranged at intervals on the substrate;forming an initial protective structure, where the initial protective structure at least covers a part of sidewalls of each of the bit line structures, and the initial protective structure has a first height in a direction parallel to the bit line structures;forming a shielding structure, where the shielding structure at least covers a part of sidewalls of the initial protective structure; andremoving at least a part of the initial protective structure exposed by the shielding structure by using the shielding structure as an etching selection layer, to form protective structures each having a second height.

According to a second aspect, the present disclosure provides a semiconductor structure. The semiconductor structure includes: an initial structure, where the initial structure includes a substrate and bit line structures arranged at intervals on the substrate; andprotective structures, wherein each of the protective structures covers a part of sidewalls of each of the bit line structures, and the protective structures each have a second height in a direction parallel to the bit line structures.

Other aspects of the present disclosure are understandable upon reading and understanding of the drawings and detailed description.

DETAILED DESCRIPTION

The following clearly and completely describes the technical solutions in the embodiments of the present disclosure with reference to the accompanying drawings in the embodiments of the present disclosure. Apparently, the described embodiments are some but not all of the embodiments of the present disclosure. All other embodiments obtained by those skilled in the art based on the embodiments of the present disclosure without creative efforts should fall within the protection scope of the present disclosure. It should be noted that without conflict, the embodiments in the present disclosure and features in the embodiments may be combined with each other.

In the existing method of forming a semiconductor structure, a method for forming protective structures on sidewalls of the bit line structures is as follows:providing an initial structure, where the initial structure includes a substrate and bit line structures arranged at intervals on the substrate;forming an initial protective structure, where the initial protective structure covers the bit line structures and the exposed substrate; andetching to remove a part of the initial protective structure to expose the substrate.

However, in the related art, the accuracy of etching to remove a part of the initial protective structure is difficult to control, which may cause damage to the sidewalls of the bit line structures, resulting in a great risk to the subsequent manufacture process and seriously affecting the yield and reliability of the product.

An exemplary embodiment of the present disclosure provides a method of forming a semiconductor structure, as shown inFIG.1.FIG.1is a flowchart of a method of forming a semiconductor structure according to an exemplary embodiment of the present disclosure.FIG.7toFIG.18are schematic diagrams of various stages of the method of forming a semiconductor structure. The method of forming a semiconductor structure is described below with reference toFIG.7toFIG.18.

The semiconductor structure is not limited in this embodiment. The semiconductor structure is described below by taking a dynamic random access memory (DRAM) as an example, but this embodiment is not limited to this, and the semiconductor structure in this embodiment may also be other structures.

As shown inFIG.1, an exemplary embodiment of the present disclosure provides a method of forming a semiconductor structure. The method of forming a semiconductor structure includes the following steps:Step S110: Provide an initial structure, where the initial structure includes a substrate and bit line structures arranged at intervals on the substrate.

As shown inFIG.7, the initial structure100includes a substrate110and bit line structures120arranged on the substrate110. The bit line structures120are arranged at intervals and parallel to each other. A part of a top surface of the substrate110is exposed, and sidewalls of each of the bit line structures120and the exposed top surface of the substrate110form a trench.

The substrate110is a semiconductor substrate including a silicon-containing substance. For example, the semiconductor substrate may be a silicon substrate, a silicon-germanium substrate, or a silicon on insulator (SOI) substrate.Step S120: Form an initial protective structure, where the initial protective structure at least covers a part of sidewalls of each of the bit line structures, and the initial protective structure has a first height in a direction parallel to the bit line structures.

As shown inFIG.8andFIG.9, the initial protective structure210can be formed through atomic layer deposition (ALD). For example, a material of the initial protective structure210may include silicon oxide (SiO2), silicon nitride (SiN) or silicon oxynitride (SiON).

In the direction parallel to the bit line structures120, the initial protective structure210has the first height, where the first height may be equal to the height of the bit line structures120or less than the height of the bit line structures120.Step S130: Form a shielding structure, where the shielding structure at least covers a part of sidewalls of the initial protective structure.

As shown inFIG.10andFIG.14, the shielding structure300covers all or a part of the sidewalls of the initial protective structure210.Step S140: Remove at least a part of the initial protective structure exposed by the shielding structure by using the shielding structure as an etching selection layer, to form protective structures each having a second height.

As shown inFIG.12, the shielding structure300and the initial protective structure210may be etched by selecting an etching selectivity of the shielding structure300and an etching selectivity of the initial protective structure210, to remove a part of the initial protective structure210. The retained initial protective structure210forms the protective structures200, and the protective structures200each have a second height less than the first height. That is, each of the protective structures200covers the sidewalls of each of the bit line structures120up to the second height.

In this embodiment, by using the shielding structure as the etching selection layer, a part of the initial protective structure is removed by selecting the etching selectivity of the shielding structure and the etching selectivity of the initial protective structure, to form the protective structures that cover the sidewalls the bit line structures up to the second height, which realizes the precise control over the sidewall contour of each of the bit line structures and makes the sidewall contour of each of the bit line structures complete. This provides a basis for the development and mass production of semiconductor structures with higher precision, and ensures the yield and reliability of semiconductor structures with fine precision.

According to an exemplary embodiment, the method of forming a semiconductor structure provided by this embodiment includes the following steps:Step S210: Provide an initial structure, where the initial structure includes a substrate and bit line structures arranged at intervals on the substrate.Step S220: Form an initial protective structure, where the initial protective structure is formed on sidewalls of each of the bit line structures, a top surface of each of the bit line structures, and a surface of the substrate.Step S230: Remove the initial protective structure covering the surface of the substrate, and remove the initial protective structure on the top surface of each of the bit line structures, where the retained initial protective structure has a first height in a direction parallel to the bit line structures, and the initial protective structure covers the sidewalls of each of the bit line structures up to the first height.Step S240: Form a shielding structure, where the shielding structure at least covers a part of sidewalls of the initial protective structure.Step S250: Remove at least a part of the initial protective structure exposed by the shielding structure by using the shielding structure as an etching selection layer, to form protective structures each having a second height.Step S210in this embodiment is implemented in the same manner as step S110in the foregoing embodiment, and steps S240and S250in this embodiment are implemented in the same manner as steps S130and S140of the foregoing embodiment; details will not be described again herein.

In step S220of this embodiment, as shown inFIG.8with reference toFIG.7, the initial protective structure210is formed on the sidewalls of each of the bit line structures120, the top surface of each of the bit line structures120, and the surface of the substrate110. The initial protective structure210may be formed through atomic layer deposition (ALD). A material of the initial protective structure210may include silicon oxide (SiO2), silicon nitride (SiN) or silicon oxynitride (SiON). The initial protective structure210covers the bit line structures120and the exposed top surface of the substrate110.

In step S230of this embodiment, as shown inFIG.9with reference toFIG.8, the initial protective structure210covering the surface of the substrate110and the initial protective structure210covering the top surface of each of the bit line structures120are removed through dry etching. In the etching process, a part of the initial protective structure210covering the top of the sidewalls of each of the bit line structures120is removed together with the initial protective structure210covering the top surface of each of the bit line structures120. The retained initial protective structure210has the first height in the direction parallel to the bit line structures120, and the initial protective structure210covers the sidewalls of each of the bit line structures120up to the first height.

In this embodiment, the formed initial protective structure covers the bit line structures and the exposed top surface of the substrate. Then, the top surface of the substrate exposed by the initial protective structure is removed through etching, to facilitate the subsequent manufacture process of the semiconductor structure. While the initial protective structure covering the substrate is removed, the partial initial protective structure covering the top surface of each of the bit line structures and the partial initial protective structure covering the sidewalls of each of the bit line structures are removed at the same time. The retained initial protective structure has the first height in the direction parallel to the bit line structures. The initial protective structure covers the sidewalls of each of the bit line structures up to the first height, and exposes the substrate to facilitate the subsequent manufacture process of the semiconductor structure.

According to an exemplary embodiment, the method of forming a semiconductor structure provided by this embodiment includes the following steps:Step S310: Provide an initial structure, where the initial structure includes a substrate and bit line structures arranged at intervals on the substrate.Step S320: Form an initial protective structure, where the initial protective structure is formed on sidewalls of each of the bit line structures, a top surface of each of the bit line structures, and a surface of the substrate.Step S330: Remove the initial protective structure covering the surface of the substrate, and remove the initial protective structure on the top surface of each of the bit line structures, where the retained initial protective structure has a first height in a direction parallel to the bit line structures, and the initial protective structure covers the sidewalls of each of the bit line structures up to the first height.

As shown inFIG.9, in step S330, when the initial protective structure210covering the surface of the substrate110and the initial protective structure210covering the top surface of each of the bit line structures120are removed, the contour of a part of the sidewalls at the top of the retained initial protective structure210may be damaged during etching.Step S340: Deposit a third material to partially fill a trench between adjacent bit line structures, to form a shielding structure, where the shielding structure has a second height in the direction parallel to the bit line structures.

As shown inFIG.10, when the shielding structure300is formed in this embodiment, the height of the shielding structure300is adjusted, such that the initial protective structure210covered by the formed shielding structure300has a complete contour, and the exposed initial protective structure210has a damaged part.

For example, as shown inFIG.10with reference toFIG.9, the third material is filled in a part of the trench between every two adjacent bit line structures120through spin coating, to form the shielding structure300. The shielding structure300has the second height. The shielding structure300covers the top surface of the substrate110and the sidewalls of each of the bit line structures120up to the second height, where the second height is lower than the first height.

The third material may be a carbon-containing material. For example, the third material may be spin-on-carbon (SOC) or a photoresist (PR). In this embodiment, the third material is spin-on-carbon (SOC).Step S350: Remove the initial protective structure exposed by the shielding structure, to expose sidewalls of each of the bit line structures above the second height, thus forming protective structures each having the second height.

In step S350of this embodiment, as shown inFIG.11, an etching process having a high etching selectivity for the third material is selected to remove the initial protective structure210exposed by the shielding structure300, and the initial protective structure covered by the shielding structure300is used as the protective structures200. The protective structures200each have the second height, and the sidewall contour of each of the protective structures200is complete.

In this embodiment, the height of the shielding structure is adjusted to define the height of the initial protective structure to be retained, such that the contour of each of the protective structures is complete and the sidewall contour of each of the bit line structures is defined, thus improving the yield and reliability of the product.

In this exemplary embodiment, after step S350, the method further includes:Step S360: Remove the shielding structure, to expose the protective structures and a top surface of the substrate.

As shown inFIG.12with reference toFIG.11, the shielding structure300is removed from the trench between every two adjacent bit line structures120, to expose the top surface of the substrate110and the protective structures200, to facilitate the subsequent manufacture process of the semiconductor structure.

According to an exemplary embodiment, the method of forming a semiconductor structure provided by this embodiment includes the following steps:Step S410: Provide an initial structure, where the initial structure includes a substrate and bit line structures arranged at intervals on the substrate.Step S420: Deposit a first material to form an initial protective structure having a first thickness, where the initial protective structure covers each of the bit line structures and a top surface of the substrate, the initial protective structure has a first consistency, and the initial protective structure has a first height in a direction parallel to the bit line structures.

As shown inFIG.8, the first material may be deposited through atomic layer deposition (ALD). The first material covers the bit line structures120and the top surface of the substrate110to form the initial protective structure210having the first thickness t1(referring toFIG.15); the temperature and speed for depositing the first material are adjusted, such that the formed initial protective structure210has the first consistency. In this embodiment, the initial protective structure210covers the bit line structures120, and the initial protective structure210has the first height that is equal to the height of the bit line structures120.

For example, the first material may be one of or a mixture of two or more of silicon oxide (SiO2), silicon nitride (SiN) or silicon oxynitride (SiON).Step S430: Deposit a second material to form a shielding structure having a second thickness, where the shielding structure covers the initial protective structure, the shielding structure has a second consistency, the first thickness is greater than the second thickness, and the first consistency is greater than the second consistency.

As shown inFIG.14with reference toFIG.8, the second material may be deposited through atomic layer deposition (ALD). The second material covers the initial protective structure210to form the shielding structure300having the second thickness t2(referring toFIG.15); the temperature and speed for depositing the second material are adjusted, such that the formed shielding structure300has the second consistency. In addition, the first thickness t1is greater than the second thickness t2(referring toFIG.15), and the first consistency is greater than second consistency.

For example, the second material may be one of or a mixture of two or more of silicon oxide (SiO2), silicon nitride (SiN) or silicon oxynitride (SiON). The second material may be the same as or different from the first material.Step S440: Etch and remove the shielding structure and a part of the initial protective structure by using a first process, where the retained initial protective structure has a second height in the direction parallel to the bit line structures.

In step S440of this embodiment, the shielding structure300and a part of the initial protective structure210are etched and removed by using the first process. In the first process, the etching selectivity of the second material is greater than the etching selectivity of the first material. The first process is anisotropic etching, an extension direction of the bit line structures120is taken as a vertical direction, an arrangement direction of the substrate110is taken as a horizontal direction, and the etching speed of the first process in the vertical direction is greater than the etching speed of the first process in the horizontal direction.

In this embodiment, the process of etching and removing the shielding structure300and a part of the initial protective structure210by using the first process includes: first, as shown inFIG.16with reference toFIG.14, a part of the shielding structure300is etched and removed by using the first process, to expose the initial protective structure210covering the top surface of each of the bit line structures120and the initial protective structure210covering the top surface of the substrate110. Then, as shown inFIG.17with reference toFIG.18, the remaining shielding structure300and the exposed initial protective structure210are continuously etched using the first process. The etching speed of the first process in the vertical direction is greater than the etching speed of the first process in the horizontal direction. Therefore, during etching and removal of the shielding structure300by using the first process, in the vertical direction, as shown inFIG.18andFIG.12, the shielding structure300covering the sidewalls of the initial protective structure210is gradually removed through etching from top to bottom, and the sidewalls of the initial protective structure210are gradually exposed from top to bottom. The exposed initial protective structure210is continuously etched using the first process, to remove the initial protective structure210covering the top surface of each of the bit line structures120, the initial protective structure210covering the top surface of the substrate110, and a part of the initial protective structure210covering the sidewalls at the top of each of the bit line structures120.

In this embodiment, after the shielding structure and a part of the initial protective structure are removed by adjusting the etching time of the first process and the etching selectivity of the first material and the etching selectivity the second material to expose the top surface of the substrate, the retained initial protective structure covers the sidewalls of each of the bit line structures, and the initial protective structure has the second height, thus defining the sidewall contour of each of the bit line structures.

According to an exemplary embodiment, this embodiment describes step S110of providing the initial structure in the foregoing embodiment.

The step of providing the initial structure is as follows:S111: Provide a substrate, where the substrate includes active regions.

As shown inFIG.7, the substrate110may be made of a silicon-containing semiconductor material. The semiconductor material may be one or more the following: silicon, germanium, silicon-germanium, and silicon-carbon. A plurality of active regions111are distributed in the substrate110.S112: Form bit line structures on the substrate.

As shown inFIG.7, forming the bit line structure120on the substrate110includes: forming a contact portion121on the substrate110, where the bottom of the contact portion121is in contact with the active regions111, and a material of the contact portion121includes polysilicon; forming a conductive portion122, where the conductive portion122covers a top surface of the contact portion121, a material of the conductive portion122includes one or two or more of conductive metal, conductive metal nitride, and conductive alloy, for example, the conductive metal may be titanium, tantalum, or tungsten; forming an isolation portion123, where the isolation portion123covers the top surface of the conductive portion122, and a material of the isolation portion123may be silicon nitride, silicon oxynitride, or other materials with good insulation performance, and the isolation portion123covers the conductive portion122, to protect the conductive portion122.

According to some embodiments of the present disclosure, one of the formed protective structures at least covers sidewalls of the contact portion and sidewalls of the conductive portion.

As shown inFIG.12andFIG.13, the protective structures200each have a second height in the direction parallel to the bit line structures120, where the second height is greater than a total height of the contact portion121and the conductive portion122of each of the bit line structures120. One of the protective structures200covers the sidewalls of the contact portion121and the sidewalls of the conductive portion122, to avoid penetration of the conductive metal in the conductive portion122, thus protecting the bit line structures120.

According to an exemplary embodiment, the method of forming a semiconductor structure provided by this embodiment includes the following steps:Step S510: Provide an initial structure, where the initial structure includes a substrate and bit line structures arranged at intervals on the substrate.Step S520: Form an initial protective structure, where the initial protective structure at least covers a part of sidewalls of each of the bit line structures, and the initial protective structure has a first height in a direction parallel to the bit line structures.Step S530: Form a shielding structure, where the shielding structure at least covers a part of sidewalls of the initial protective structure.Step S540: Remove at least a part of the initial protective structure exposed by the shielding structure by using the shielding structure as an etching selection layer, to form protective structures each having a second height.Step S550: Form an insulation structure, where the insulation structure covers a top surface of each of the bit line structures, exposed sidewalls of each of the bit line structures, and the protective structures.

Steps S510to S540in this embodiment are implemented in the same manner as steps S110to S140of the foregoing embodiment, and will not be described in detail again herein.

In step S550of this embodiment, as shown inFIG.13with reference toFIG.12, the insulation structure400may be formed by depositing an insulation material through atomic layer deposition (ALD). The insulation structure400covers the op surface of each of the bit line structures120, the exposed sidewalls of each of the bit line structures120, and the protective structures200.

An exemplary embodiment of the present disclosure provides a semiconductor structure; as shown inFIG.12andFIG.13, the semiconductor structure includes: an initial structure100and protective structures200, where the initial structure100includes a substrate110and bit line structures120arranged at intervals on the substrate110, each of the protective structures200covers a part of sidewalls of each of the bit line structures120, and the protective structures200each have a second height in a direction parallel to the bit line structures120.

In the semiconductor structure of this embodiment, the contour of the sidewalls of each of the bit line structures is precise and complete, and the product yield and reliability are high.

According to an exemplary embodiment, the semiconductor structure of this embodiment is generally the same as that in the foregoing embodiment. The difference between this embodiment and the foregoing embodiment lies in that, as shown inFIG.12andFIG.13, the substrate110includes active regions111, each of the bit line structures120includes a contact portion121, a conductive portion122, and an isolation portion123that are sequentially stacked on the substrate110, the contact portion121is in contact with the active region111of the substrate110, and each of the protective structures200at least covers sidewalls of the contact portion121and sidewalls of the conductive portion122.

According to an exemplary embodiment, the semiconductor structure of this embodiment is generally the same as that in the foregoing embodiment. The difference between this embodiment and the foregoing embodiment lies in that, as shown inFIG.13, the semiconductor structure further includes an insulation structure400, where the insulation structure400covers a top surface of each of the bit line structures120, exposed sidewalls of each of the bit line structures120, and the protective structures200.

In the semiconductor structure of this embodiment, the protective structures cover the sidewalls of the bit line structures up to the second height. The sidewall contour of each of the bit line structures is precise and complete. This provides a basis for the development and mass production of semiconductor structures with higher precision, and ensures the yield and reliability of semiconductor structures with fine precision.

The embodiments or implementations of this specification are described in a progressive manner, and each embodiment focuses on differences from other embodiments. The same or similar parts between the embodiments may refer to each other.

In the description of the specification, the description with reference to terms such as “an embodiment”, “an illustrative embodiment”, “some implementations”, “an illustrative implementation” and “an example” means that the specific feature, structure, material or feature described in combination with the implementation(s) or example(s) is included in at least one implementation or example of the present disclosure.

In this specification, the schematic expression of the above terms does not necessarily refer to the same implementation or example. Moreover, the described specific feature, structure, material or characteristic may be combined in an appropriate manner in any one or more implementations or examples.

It should be noted that in the description of the present disclosure, the terms such as “center”, “top”, “bottom”, “left”, “right”, “vertical”, “horizontal”, “inner” and “outer” indicate the orientation or position relationships based on the drawings. These terms are merely intended to facilitate description of the present disclosure and simplify the description, rather than to indicate or imply that the mentioned device or element must have a specific orientation and must be constructed and operated in a specific orientation. Therefore, these terms should not be construed as a limitation to the present disclosure.

It can be understood that the terms such as “first” and “second” used in the present disclosure can be used to describe various structures, but these structures are not limited by these terms. Instead, these terms are merely intended to distinguish one element from another.

The same elements in one or more drawings are denoted by similar reference numerals. For the sake of clarity, various parts in the drawings are not drawn to scale. In addition, some well-known parts may not be shown. For the sake of brevity, the structure obtained by implementing multiple steps may be shown in one figure. In order to make the understanding of the present disclosure more clearly, many specific details of the present disclosure, such as the structure, material, size, processing process and technology of the device, are described below. However, as those skilled in the art can understand, the present disclosure may not be implemented according to these specific details.

Finally, it should be noted that the above embodiments are merely intended to explain the technical solutions of the present disclosure, rather than to limit the present disclosure. Although the present disclosure is described in detail with reference to the above embodiments, those skilled in the art should understand that they may still modify the technical solutions described in the above embodiments, or make equivalent substitutions of some or all of the technical features recorded therein, without deviating the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present disclosure.

INDUSTRIAL APPLICABILITY

According to the method of forming a semiconductor structure and a semiconductor structure provided by the embodiments of the present disclosure, during the manufacture process of the semiconductor structure, a shielding structure is added. With the shielding structure as an etching selection layer, the sidewall contour of each of the bit line structures is defined by adjusting the etching selectivity for etching the initial protective structure and the shielding structure.