Organic electroluminescent display device and method of fabricating the same

An organic electroluminescent display (OELD) device includes: first and second substrates facing each other; a plurality of gate lines, a plurality of data lines and a plurality of power lines on the first substrate, the gate and data lines crossing each other to define a plurality of pixel regions; a switching element and a driving element connected to each other in each pixel region; a first electrode connected to the driving element; an organic luminescent layer on the first electrode, the organic luminescent layer including a buffer layer as an uppermost layer; and a second electrode of a transparent conductive material on the organic luminescent layer.

The present application claims the benefit of Korean Patent Application No. 2006-0059348 filed in Korea on Jun. 29, 2006, which is hereby incorporated by reference for all purposes as if fully set forth herein.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to an organic electroluminescent display (OELD) device, and more particularly, to a top emission type OELD device with a high luminance and method for fabricating the same.

2. Discussion of the Related Art

In general, organic electroluminescent display (OELD) devices emit light by injecting electrons from a cathode and holes from an anode into an emission layer, combining the electrons with the holes, generating excitons, and transforming the excitons of an excited state to a ground state. Unlike liquid crystal display (LCD) devices, OELD devices do not require an additional light source and therefore have the advantages of slimness and lightweight.

Since OELD devices have excellent characteristics, such as low power consumption, high luminance, fast response time, lightweight and so on, OELD devices can be applied to various electronic products, such as mobile phones, PDAs, camcorders, plam PCs, and so on. Moreover, due to their simple fabricating process, the fabrication costs of OELD devices are low as compared with LCD devices.

The OELD devices are divided into a passive matrix type and an active matrix type according to the driving method thereof. The passive matrix type OELD devices have a simple structure and a simple fabricating process. However, the passive matrix type OELD devices have disadvantages of high power consumption and low quality images. On the other hand, the active matrix type OELD devices have advantages of high emission efficiency and high quality images.

FIG. 1is a cross-sectional view illustrating an active matrix type OELD device according to the related art.

Referring toFIG. 1, the OELD device10includes first and second substrates12and28facing each other. The first substrate12is transparent and flexible. The first substrate12has an array element14including a plurality of thin film transistors (TFTs) T and an organic electroluminescent diode E including a first electrode16, an organic luminescent layer18and a second electrode20. The organic luminescent layer18in each pixel region P includes one of red, green and blue color materials.

The second substrate28includes a moisture absorbent22of a powder type. The moisture absorbent22removes moisture inside the OELD device. The moisture absorbent22is in a concave portion of the second substrate28and is sealed by a taping25. The first and second substrates12and28are attached to each other with a seal pattern26.

In the OELD device, because the first electrode16is formed of a transparent material, the light emitted from the organic luminescent layer18travels toward the first substrate12. Accordingly, it is referred to as a bottom emission type OELD device.

FIG. 2is a circuit diagram of an OELD device according to the related art.

Referring toFIG. 2, gate and data lines42and44are formed on a substrate32. The gate and data lines42and44cross each other and a switching element Ts is formed near the crossing portion of the gate and data lines42and44. The switching element Ts includes a gate electrode46, a source electrode56and a drain electrode60. The gate electrode46is connected to the gate line42. The source electrode56separated from the drain electrode60is connected to the data line44.

A driving element Td is electrically connected to the switching element Ts. The driving element Td of a p-type TFT includes a gate electrode68, a source electrode66and a drain electrode63. The gate electrode68of the driving element Td is connected to the switching element Ts. A storage capacitor Cst is formed between the source and gate electrodes66and68of the driving element Td. The drain electrode63of the driving element Td is connected to the first electrode16(ofFIG. 1) of the organic electroluminescent diode E. The source electrode66of the driving element Td is connected to a power line55.

When a gate signal from the gate line42is supplied to the gate electrode46of the switching element Ts, a data signal from the data line44is supplied to the gate electrode68of the driving element Td through the switching element Ts. Then, the organic electroluminescent diode E is driven by the driving element Td such that the organic electroluminescent diode E emits light. Because the storage capacitor Cst maintains a voltage level of the gate electrode68of the driving element Td, even if the switching element Ts is turned off, the organic electroluminescent diode E can continuously emit light for a predetermined period of time.

The switching element Ts and the driving element Td include a semiconductor layer of one of amorphous silicon and polycrystalline silicon. When the semiconductor layer is formed of amorphous silicon, the switching element Ts and the driving element Td can be easily fabricated.

FIG. 3is a plan view illustrating an array element of an active matrix type OELD device according to the related art andFIG. 4is a cross-sectional view taken along the line IV-IV ofFIG. 3.

Referring toFIGS. 3 and 4, the active matrix type OELD device includes a switching element Ts, a driving element Td and a storage capacitor Cst on a substrate32. Each pixel of the OELD device may include more than one pair of the switching element Ts and the driving element Td.

A gate line42and a data line44are formed on the substrate32with a gate insulating layer interposed therebetween. A pixel region P is defined by the crossing between the gate and data lines42and44.

The switching element Ts includes a gate electrode46, an active layer50and source and drain electrodes56and60. The gate electrode46of the switching element Ts is connected to the gate line42, and the source electrode56of the switching element Ts is connected to the data line44. The drain electrode60of the switching element Ts is connected to a gate electrode68of the driving element Td through a gate contact hole64.

The driving element Td includes the gate electrode68, an active layer62and source and drain electrodes66and63. The source electrode66of the driving element Td is connected to a power line55through a power line contact hole58. The drain electrode63of the driving element Td is connected to a first electrode36through a drain contact hole65. The storage capacitor Cst includes the silicon pattern35as a first storage electrode, the power line55as a second storage electrode and a dielectric layer therebetween.

As illustrated inFIG. 4, an organic electroluminescent diode E includes the first electrode36, an organic luminescent layer38and a second electrode40. The first electrode36contacts the drain electrode63of the driving element Td through the drain contact hole65, and the organic luminescent layer38is interposed between the first and second electrodes36and40. The first and second electrodes36and40function as anode and cathode, respectively.

FIG. 5is a cross-sectional view illustrating an organic electroluminescent diode according to the related art.

Referring toFIG. 5, the organic electroluminescent diode E formed on a substrate32includes a first electrode36, an organic luminescent layer38and a second electrode40. Although not shown, the substrate32includes an array element including the driving element Td (ofFIG. 4). The first electrode36is connected to the driving element Td (ofFIG. 4). The first and second electrode36and40function as anode and cathode, respectively. The organic luminescent layer38includes a hole injection layer (HIL)38a, a hole transporting layer (HTL)38b, an emitting material layer (EML)38c, an electron transporting layer (ETL)38dand an electron injection layer (EIL)38e. The HTL38band the ETL38dserve to improve emitting efficiency, and the HIL38aand EIL38eserve to reduce energy barrier in injecting electrons and holes.

The second electrode40functioning as cathode is formed of a low work function material, such as calcium (Ca), aluminum (Al), magnesium (Mg), silver (Ag) and lithium (Li), and the first electrode36functioning as anode is formed of a transparent conductive material such as indium-tin-oxide (ITO).

A sputtering process is generally used to form an ITO layer. However, it is difficult to deposit an ITO layer on the organic luminescent layer38because of damage on the organic luminescent layer38caused by the sputtering process. Accordingly, the OELD device according to the related art is the bottom emission type in which the first electrode36of ITO functioning as an anode is formed under the organic luminescent layer38. However, the bottom emission type has disadvantages of low luminance and low aperture ratio. Moreover, because the first electrode36of ITO functioning as an anode is directly connected to the driving element Td, a p-type polycrystalline TFT should be used for the driving element Td, thereby complicating the fabrication process of the OELD device.

SUMMARY OF THE INVENTION

Accordingly, the present invention is directed to an organic electroluminescent display (OELD) device and method for fabricating the same that substantially obviate one or more of the problems due to limitations and disadvantages of the related art.

An advantage of the present invention is to provide an OELD device with a high luminance.

To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described herein, an organic electroluminescent display (OELD) device includes: first and second substrates facing each other; a plurality of gate lines, a plurality of data lines and a plurality of power lines on the first substrate, the gate and data lines crossing each other to define a plurality of pixel regions; a switching element and a driving element connected to each other in each pixel region; a first electrode connected to the driving element; an organic luminescent layer on the first electrode, the organic luminescent layer including a buffer layer as an uppermost layer; and a second electrode of a transparent conductive material on the organic luminescent layer.

In another aspect of the present invention, a method of fabricating an OELD device includes: forming a switching element and a driving element on a first substrate, the switching and driving elements connected to each other in a pixel region; forming a first electrode connected to the driving element; forming an organic luminescent layer on the first electrode, the organic luminescent layer including a buffer layer as an uppermost layer; forming a second electrode of a transparent conductive material on the buffer layer; and attaching the first substrate to a second substrate.

DETAILED DESCRIPTION OF THE ILLUSTRATED EMBODIMENTS

Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings. The same reference numbers may be used throughout the drawings to refer to the same or like parts.

FIG. 6is a cross-sectional view of an organic electroluminescent diode according to the first embodiment of the present invention.

Referring toFIG. 6, the organic electroluminescent diode E is formed on a substrate100. The organic electroluminescent diode E includes a first electrode132, an organic luminescent layer142and a second electrode148. The first electrode132and the second electrode148function as cathode and anode, respectively. Thus, the second electrode148has a work function greater than the first electrode132. The second electrode148may be formed of a transparent conductive material such as indium-tin-oxide (ITO), indium-zinc-oxide (IZO), or the like. The organic luminescent layer142includes EIL142a, ETL142b, EML142c, HTL142dand HIL142e. A buffer layer145is formed between the HIL142eand the second electrode148.

When the second electrode148is deposited by a sputtering process without the buffer layer145, the HIL142esuffers damage. In other words, the buffer layer145prevents the HIL142efrom being damaged during the deposition of the second electrode148. The buffer layer145beneficially has a similar property to the HIL142eand an impact resistance against deposition of the transparent conductive material. Accordingly, the buffer layer145may be formed of one of copper phthalocyanine (CuPC) and vanadium pentoxide (V2O5). From an OELD device perspective, CuPC has several advantages: a CuPC layer may be formed in a thin film and has a low threshold voltage, a high mobility and a high flexibility.

FIG. 7is a cross-sectional view of an organic electroluminescent diode according to the second embodiment of the present invention.

Referring toFIG. 7, a buffer-HIL layer142fformed of one of the CuPC and the V2O5is formed on the HTL142d. The buffer-HIL layer142fserves both functions of the HIL142elayer (ofFIG. 6) and the buffer layer145(ofFIG. 6). Unlike the first exemplary embodiment that requires two layers, a second electrode148can be formed on the organic electroluminescent diode E without an additional buffer layer.

As described above, the second electrode148is formed of a transparent conductive material, such as ITO, IZO, or the like, and the first electrode132is formed of a metallic material, such as Ca, Al, Mg, Ag, Li, or the like. Because the second electrode148formed on the organic electroluminescent diode E is transparent, the light emitted from the organic luminescent layer142travels upward. Accordingly, the OELD device is referred to as a top emission type. The top emission type OELD device has a high aperture ratio compared with the bottom emission type OELD device. Moreover, because the first electrode132is formed under the organic electroluminescent diode E and connected to the driving element (not shown) on the substrate100, an n-type amorphous silicon TFT may be used for the driving element, thereby simplifying the fabrication process and reducing production costs.

FIG. 8is a schematic plan view illustrating an array substrate for an OELD device according to present invention.

Referring toFIG. 8, the array substrate includes a gate line106, a data line126and a power line110formed on a substrate100. The gate line106and the data line126cross each other to define a plurality of pixel regions P on the substrate100. The power line110is parallel to and separated from the gate line106.

The switching element Ts and the driving element Td, which are connected to each other, are formed in each pixel region P. The switching and driving elements Ts and Td include n-type TFTs. The n-type TFT of the switching element Ts includes a gate electrode102, an active layer118a, an ohmic contact layer (not shown) and source and drain electrodes122aand122b. Similarly, the n-type TFT of the driving element Td includes a gate electrode104, an active layer120a, an ohmic contact layer (not shown) and source and drain electrodes124aand124b. The drain electrode122bof the switching element Ts is connected to the gate electrode104of the driving element Td. The gate electrode102of the switching element Ts is connected to the gate line106such that a gate signal is supplied to the gate electrode102of the switching element Ts though the gate line106. The source electrode122aof the switching element Ts is connected to the data line126such that a data signal is supplied to the source electrode122aof the switching element Ts through the data line126.

A gate pad108is formed at an end of the gate line106, and a gate pad electrode134contacts the gate pad108. Similarly, a data pad128is formed at an end of the data line126, and a data pad electrode138contacts the data pad128. A power pad114is formed at an end of the power line110, and a power pad electrode136contacts the power pad114.

A storage capacitor Cst includes a first storage electrode112, a second storage electrode122cand a dielectric layer (not shown) therebetween. The first storage electrode112extends from the power line110, and the second storage electrode122cextends from the drain electrode122bof the switching element Ts.

The first electrode132of the organic electroluminescent diode E (ofFIGS. 6 and 7) is formed on an entire surface of the pixel region P. The first electrode132is connected to the drain electrode124bof the driving element Td. Although not shown inFIG. 8, the organic luminescent layer142(ofFIGS. 6 and 7) and the second electrode148(ofFIGS. 6 and 7) are formed on the first electrode132. The first electrode132, the organic luminescent layer142(ofFIGS. 6 and 7) and the second electrode148(ofFIGS. 6 and 7) constitute the organic electroluminescent diode E (ofFIGS. 6 and 7).

The switching element Ts and the driving element Td include the n-type TFTs having the active layers118aand120aof amorphous silicon, respectively. The source electrodes122aand124aand the drain electrodes122band124bmay have a variety of shapes to improve driving properties of the switching and driving elements Ts and Td.

For example, as shown inFIG. 8, the source electrode122aof the switching element Ts has a U-shape, and the drain electrode122bof the switching element Ts have a bar shape. A part of the drain electrode122bis formed inside the U-shape source electrode122aand is separated from the U-shape source electrode122a. The source and drain electrodes124aand124bof the driving element Td have one of a ring shape and a disc shape. The source electrode124ahas a disc shape, and the drain electrode124bis in the source electrode124a. When the source electrodes122aand124aand the drain electrodes122band124bhave the above-mentioned structures, the channel regions of the n-type TFTs, which are formed between the source electrode122aand the drain electrode122band between the source electrode124aand the drain electrode124b, have a lesser length and a greater width than the channel region of the related art TFT. As a result, the characteristics of the switching and driving elements Ts and Td are improved.

Referring toFIG. 9A, a switching region S, a driving region D and a storage region C are defined in the pixel region P on the substrate100. Moreover, a gate region GR, a power region PR and a data region DR are formed at a periphery of the pixel region P. The switching and driving elements Ts and Td of an n-type TFT are formed in the switching and driving regions S and C, respectively. The storage capacitor Cst, which includes the first and second storage electrodes112and122cand a gate insulating layer116therebetween, is formed in the storage region S. The first and second storage electrodes112and122cextend from the power line110(ofFIG. 8) and the drain electrode122bof the switching element Ts, respectively. The gate insulating layer116functions as the dielectric layer of the storage capacitor Cst.

The first electrode132of an opaque metal material is formed over the driving element Td in each pixel region P. The first electrode132contacts the drain electrode124bof the driving element Td though a third contact hole CH3. The organic luminescent layer142and the second electrode148are sequentially formed on the first electrode132. Unlike the first electrode132, the second electrode148may be formed on an entire surface of the first substrate100. The first and second electrodes132and148function as cathode and anode, respectively. The first and second electrodes132and148and the organic luminescent layer142constitute the organic electroluminescent diode E (ofFIGS. 6 and 7). The organic luminescent layer142has a multiple-layer structure as illustrated inFIGS. 6 and 7. A passivation layer130is formed between the first electrode132and the switching element Ts and between the first electrode132and the driving element Td.

The switching element Ts in the switching region S includes the gate electrode102, the gate insulating layer116, the active layer118a, and the source and drain electrodes122aand122b. Similarly, the driving element Td in the driving region D includes the gate electrode104, the gate insulating layer116, the active layer120aand the source and drain electrodes124aand124b. The drain electrode122bof the switching element Ts is connected to the gate electrode104through a first contact hole CH1. The drain electrode124bis connected to the power line110(ofFIG. 8) through a second contact hole and the first storage electrode112.

After forming the first electrode132, a bank140surrounding the pixel region P is formed such that the organic luminescent layers142between adjacent pixel regions P do not contact each other.

Referring toFIG. 9B, the gate pad108and the gate insulating layer116, the passivation layer130and the gate pad electrode134are formed in the gate region GR. The gate pad108is formed at the end of the gate line106(ofFIG. 8). The gate pad108is formed at the same time as the gate electrodes102and104(ofFIG. 9A). The gate insulating layer116and the passivation layer130have a fourth contact hole CH4. The gate pad electrode134contacts the gate pad108through the fourth contact hole CH4.

Referring toFIG. 9C, the power pad114and the gate insulating layer116, the passivation layer130and the power pad electrode136are formed in the power region PR. The power pad114is formed at the end of the power line110(ofFIG. 8). The power pad114is formed at the same time as the power line110(ofFIG. 8). The gate insulating layer116and the passivation layer130have a fifth contact hole CH5. The power pad electrode114contacts the power pad136through the fifth contact hole CH5.

Referring toFIG. 9D, the data pad128and the gate insulating layer116, the passivation layer130and the data pad electrode138are formed in the data region DR. The data pad128is formed at the end of the data line126(ofFIG. 8). The data pad128is formed at the same time as the data line126(ofFIG. 8). The gate insulating layer116and the passivation layer130have a sixth contact hole CH6. The data pad electrode138contacts the data pad128through the sixth contact hole CH6.

FIGS. 10A to 10Eare cross-sectional views illustrating a fabricating process for the portion of the array substrate illustrated inFIG. 9A, andFIGS. 11A to 11Eare cross-sectional views illustrating fabricating process for the portion of the array substrate illustrated inFIG. 9B.FIGS. 12A to 12Eare cross-sectional views illustrating fabricating process for the portion of the array substrate illustrated inFIG. 9C, andFIGS. 13A to 13Eare cross-sectional views illustrating fabricating process for the portion of the array substrate illustrated inFIG. 9D.

Referring toFIGS. 10A,11A,12A and13A, the switching, driving and storage regions S, D and C in the pixel region P and the gate, power and data regions GR, PR and DR are defined on the substrate100. The gate electrodes102and104in the switching and driving regions S and D, the first storage electrode112in the storage region S, the gate pad108in the gate region GR and the power pad114in the power region PR are formed on the substrate100by depositing and patterning a first conductive metallic material using a patterning mask (not shown). At the same time, the gate line106(ofFIG. 8) and the power line110(ofFIG. 8) are formed on the substrate110. The gate pad108is located at the end of the gate line106(ofFIG. 8), and the power pad114is located at the end of the power line110(ofFIG. 8). The first storage electrode112extends from the power line110(ofFIG. 8). The conductive metallic material may include at least Al, aluminum alloy (AlNd), chromium (Cr), Molybdenum (Mo), copper (Cu), Titanium (Ti), or the like.

Next, the gate insulating layer116is formed on the substrate110by depositing a first inorganic insulating material. The first inorganic insulating material may include silicon oxide (SiO2), silicon nitride (SiNx), or the like.

Next, the semiconductor layer118including the active layer118aand the ohmic contact layer118bin the switching region S, and the semiconductor layer120including the active layer120aand the ohmic contact layer120bin the driving region D are formed on the gate insulating layer116by depositing and patterning an intrinsic amorphous silicon material and an impurity-doped amorphous silicon material. The semiconductor layers118and120correspond to the gate electrodes102and104, respectively.

Next, the first and second contact holes CH1and CH2are formed through the gate insulating layer116by patterning the gate insulating layer116. The first and second contact holes CH1and CH2expose the gate electrode104in the driving region D and the first storage electrode112.

Referring toFIGS. 10B,11B,12B and13B, after forming the first and second contact holes CH1and CH2, the source electrodes122aand124ain the switching and driving regions S and D, the drain electrodes122band124bin the switching and driving regions S and D, the data pad128in the data region D and the second storage electrode122cin the storage region C are formed on the substrate110by depositing and patterning a second conductive material. At the same time, the data line126(ofFIG. 8) is formed on the gate insulating layer116. The second conductive material includes at least Al, aluminum alloy (AlNd), chromium (Cr), Molybdenum (Mo), copper (Cu), Titanium (Ti), or the like. The source electrode122ain the switching region S extends from the data line126(ofFIG. 8). The source and drain electrodes122aand122bin the switching region S are separated from each other, and the source and drain electrodes124aand124bin the driving region D are separated from each other. The second storage electrode122cextends from the drain electrode122bin the switching region S. The drain electrode122bin the switching region S contacts the gate electrode104in the driving region D through the first contact hole CH1(ofFIG. 10A). The drain electrode124bin the driving region DR contacts the first storage electrode112through the second contact hole CH2(ofFIG. 10A).

Next, channel regions are defined by removing the ohmic contact layer118bbetween the source and drain electrodes122aand122bin the switching region S and the ohmic contact layer120bbetween the source and drain electrodes124aand124bin the driving region D. The channel regions expose the active layers118aand120a. In this case, to decrease the length of the channel regions or increase the width of the channel regions, the source electrodes122aand124amay have a U-shape or a ring shape, and the drain electrodes122band124bmay have a bar shape or a disc shape. The drain electrodes122band124bare separated from the source electrodes122aand122b.

Referring toFIGS. 10C,11C,12C and13C, the passivation layer130is then formed on the substrate110by depositing a second inorganic insulating material. The second inorganic insulating material includes at least silicon oxide (SiO2), silicon nitride (SiNx), or the like. Next, the third to sixth contact holes CH3, CH4, CH5and CH6are formed through the passivation layer130by patterning the passivation layer130. The third and fourth contact holes CH3and CH4expose the drain electrode124bin the driving region D and the gate pad108in the gate region GR, respectively, and the fifth and sixth contact holes CH5and CH5expose the power pad114in the power region PR and the data pad128in the data region DR, respectively.

Referring toFIGS. 10D,11D,12D and13D, the first electrode132, the gate pad electrode134, the power pad electrode136and the data pad electrode138are then formed on the passivation layer130by depositing and patterning a metallic material, such as Ca, Al, Mg, Ag, Li, or the like. The first electrode132and the gate pad electrode134contact the drain electrode124bin the driving region D and the gate pad108through the third and fourth contact holes CH3and CH4, respectively. The power pad electrode136and the data pad electrode138contact the power pad114and the data pad128through the fifth and sixth contact holes CH5and CH6, respectively.

Next, the bank140is formed on the substrate100to surround the pixel regions P by depositing and patterning a third organic insulating material. The third organic insulating material includes at least benzocyclobutene (BCB), acrylate resin, or the like. Because the bank140surrounds the pixel region P, the first electrode132in the pixel region P, the gate pad electrode134, the power pad electrode136and the data pad electrode138are exposed by the bank140. The bank140prevent the organic luminescent layers142(ofFIG. 9A) in adjacent pixel regions P from contacting each other.

Referring toFIGS. 10E,11E,12E and13E, the organic luminescent layer142is then formed on the first electrode132. The organic luminescent layer142has the EIL142a, the ETL142b, the EML142c, the HTL142d, the HIL142eand the buffer layer145. Alternatively, as illustrated inFIG. 7, the organic luminescent layer142may have the EIL142a, the ETL142b, the EML142c, the HTL142d, and the buffer-HIL142f(ofFIG. 7).

Next, the second electrode148is formed on the organic luminescent layer142by depositing and patterning a transparent conductive material. The transparent conductive material includes ITO, IZO, or the like. The first and second electrodes132and148, and the organic luminescent layer142therebetween constitute the organic electroluminescent diode E.

The lower substrate of the OELD device having the array element and the organic electroluminescent diode is fabricated by the processes described above. A top emission type OELD device according to the present invention is completed by attaching the lower substrate and a upper substrate including a moisture absorbent using a seal pattern.