The present invention provides a method of sub-micron decal transfer lithography. The method includes forming a first pattern in a surface of a first silicon-containing elastomer, bonding at least a portion of the first pattern to a substrate, and etching a portion of at least one of the first silicon-containing elastomer and the substrate.

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates generally to lithography, and, more particularly, to soft lithography.

2. Description of the Related Art

Soft lithography is a patterning technique used in micro-fabrication to produce microstructures by transferring a pattern from a master to a substrate using a patterned elastomer. For example, patterns may be transferred by printing, molding, or embossing with a polydimethylsiloxane (PDMS) elastomeric stamp. The elastomeric stamp can be prepared by casting prepolymers against masters patterned by conventional photolithographic techniques. Representative soft lithographic techniques include contact printing, replica molding, transfer molding, micro-molding in capillaries, solvent assisted micro-molding, and the like. These soft lithographic techniques may be useful for fabricating a variety of functional components and devices that may be used in areas including optics, microelectronics, microanalysis, micro-electro-mechanical systems, and the like.

Decal transfer lithography is a type of soft lithography based on the transfer of polydimethylsiloxane patterns to a substrate via the engineered adhesion and release properties of a compliant polydimethylsiloxane stamp.FIGS. 1A,1B,1C, and1D conceptually illustrate a conventional decal transfer lithography technique.FIG. 1Ashows a silicon-containing elastomer10that has been patterned using a master pattern20. The silicon-containing elastomer10is then removed from the master pattern20, as shown inFIG. 1B, and placed in contact with a substrate30such that the portions of the silicon-containing elastomer10that are in contact with the substrate30become irreversibly attached to the substrate30. A bulk portion40of the silicon-containing elastomer10is pulled away from the substrate30. The silicon-containing elastomer10undergoes cohesive failure, leaving behind a patterned portion50of the silicon-containing elastomer10.

Conventional decal transfer techniques, such as the technique shown inFIGS. 1A-D, are useful for delivering micron-size polydimethylsiloxane patterns to flat or curved large-area electronic materials such as silicon, silicon dioxide, and other metals in films. However, conventional decal transfer techniques may not be able to effectively transfer submicron-size patterns due to limitations arising from the mechanical properties of the polymers used to form the elastomeric stamps. For example, the locus of cohesive failure of the silicon-containing elastomer10shown inFIGS. 1A-Dprogressively approaches a surface of the patterned features50as the size of the patterned features50approach the 1 micron level.

The present invention is directed to addressing the effects of one or more of the problems set forth above.

SUMMARY OF THE INVENTION

In one embodiment of the present invention, a method is provided for sub-micron decal transfer lithography. The method includes forming a first pattern in a surface of a first silicon-containing elastomer, bonding at least a portion of the first pattern to a substrate, and etching a portion of at least one of the first silicon-containing elastomer and the substrate.

In another embodiment of the present invention, a method is provided for sub-micron decal transfer lithography. The method includes forming a pattern in a surface of a silicon-containing elastomer, bonding the pattern to a substrate such that the pattern and the substrate are irreversibly attached, and etching a portion of the silicon-containing elastomer.

In yet another embodiment of the present invention, a method is provided for sub-micron decal transfer lithography. The method includes forming a first pattern in a surface of a first silicon-containing elastomer, bonding at least a portion of the first pattern to a substrate, and etching a portion of the substrate.

DETAILED DESCRIPTION OF SPECIFIC EMBODIMENTS

FIGS. 2A,2B,2C,2D and2E conceptually illustrate a decal transfer lithography technique including etching. In the illustrated embodiment,FIG. 2Ashows a silicon-containing elastomer200that has been patterned using a master pattern205. As used herein, the term “elastomer” is defined as a polymer which can return to its initial dimensions when deformed by an external force. A polymer is considered an elastomer when the polymer meets the following standard. A sample of the polymer in its solid state and having an initial linear dimension of Dois subjected to a force such that the dimension is changed by about 10%. If the dimension of an elastomer assumes a value De, where De≅Do±0.01 Doonce the force is no longer applied, the polymer is considered an elastomer. As used herein, the term “silicon-containing elastomer,” is an elastomer which contains silicon atoms. Examples of silicon-containing elastomers include, but are not limited to, polysiloxane, block copolymers containing segments of a polysiloxane and a polymer, and silicon-modified elastomers. Additional examples of silicon-containing elastomers may be found in U.S. Pat. No. 6,805,809, which is incorporated herein by reference in its entirety. In the illustrated embodiment, the silicon-containing elastomer200is polydimethylsiloxane (PDMS).

In one embodiment, the silicon-containing elastomer200is formed by spin-casting a polydimethylsiloxane prepolymer onto the master205, curing, and then removing the silicon-containing elastomer200, as will be discussed in detail below. However, persons of ordinary skill in the art should appreciate that the present invention is not limited to this particular technique for forming a silicon-containing elastomer200. In alternative embodiments, any desirable technique for forming the silicon-containing elastomer200may be used. For example, the patterned silicon-containing elastomer200may be formed by polymerizing monomers and/or prepolymers, by cross-linking monomers, prepolymers, and/or polymers, or by solidifying the silicon-containing elastomer200from a liquid or molten state. Additional examples of techniques for forming the silicon-containing elastomer200may be found in U.S. Pat. No. 6,805,809. The silicon-containing elastomer200is then removed from the master205, as shown inFIG. 2B.

The silicon-containing elastomer200is irreversibly attached to a substrate210. As used herein, the term “irreversibly attached,” means that the bonding between two substances is sufficiently strong that the substances cannot be mechanically separated without damaging and/or destroying one or both of the substances. However, persons of ordinary skill in the art should appreciate that the term “irreversibly attached,” does not mean that it is impossible to separate the two bonded substances. For example, substances that are irreversibly attached may be separated by exposure to an appropriate chemical environment, which may include chemical reagents and/or irradiation. In one embodiment, the silicon-containing elastomer200may be irreversibly attached to the substrate210by bringing the patterned portion of the silicon-containing elastomer200into contact with the substrate210for a selected time period and curing at a selected temperature for a selected curing time, as will be discussed in detail below. Exemplary substrates210include, but are not limited to, silicon, ceramic materials, polymers, elastomers, metals, and the like.

The silicon-containing elastomer200is etched using an etching process, as indicated by the arrows220shown inFIG. 2D, which depicts the silicon-containing elastomer200at an intermediate stage of the etching process. In one embodiment, the etching process is a reactive ion etching process (RIE)220. For example, the silicon-containing elastomer200may be etched chemically by reactive species, physically by ion bombardment, or by a combination of chemical and physical mechanisms, as will be discussed in detail below. However, persons of ordinary skill in the art should appreciate that any desirable etching process220may be used to etch the silicon-containing elastomer200. Etching of the silicon-containing elastomer200removes a portion230of the silicon-containing elastomer200.

FIG. 2Eshows the silicon-containing elastomer200substantially after the etching process220is complete. In the illustrated embodiment, patterned portions240of the silicon-containing elastomer200remain irreversibly attached to the substrate210after completion of the etching process. The patterned portion240and/or the substrate210may then be cleaned, as will be discussed in detail of. In one embodiment, the patterned portion240may be used as a mask for subsequent isotropic and/or anisotropic etching processes. By using the etching process to remove portions of the silicon-containing elastomer200, characteristic length scales of the patterned portions240, such as critical dimension of the patterned portions240, may be reduced to the sub-micron scale. Accordingly, the techniques described herein may be particularly useful for fabricating submicron, high aspect ratio resist features240on the substrate210.

FIGS. 3A,3B,3C, and3D conceptually illustrate one exemplary embodiment of a procedure for fabricating sub-micron, high aspect ratio resist features on a substrate300. In the illustrated embodiment, a PDMS prepolymer was spin-cast onto a master305with submicron features310(i.e., a photoresist patterned silicon wafer) and cured at 70° C. for 20 minutes to form the silicon-containing elastomer315, also referred to as a PDMS decal315or a closed PDMS decal315. Although not necessary to the practice of the present invention, the master305may, in some embodiments, be coated with a release layer320. After curing, the PDMS coated master305,315,320may be exposed to UV/Ozone (UVO) and tridecafluoro-1,1,2,2-tetrahydrooctyl trichlorosilane (“No Stick”) to form a release layer325. In the illustrated embodiment, the PDMS coated master305,315,320was exposed to UVO for 3 min, and then immediately treated with tridecafluoro-1,1,2,2-tetrahydrooctyl trichlorosilane (“No Stick”) for 20 min by placing the sample in a dry container with an open vial of “No Stick”. A low pressure mercury lamp (BHK), (173 μW/cm2) was used for UV/Ozone (UVO) treatment of the PDMS coated master305,315,320.

The PDMS coated master305,315,320was covered with a PDMS prepolymer layer330, which was then cured in an oven at 70° C. to form the PDMS stamp335shown inFIG. 3B. In the illustrated embodiment, the PDMS stamp335was extracted from the master305, and the patterned PDMS film was exposed to UVO for 150 sec and placed in contact with the target substrate300. In various alternative embodiments, the target substrate300may be a glass slide, silicon, SiO2, or any other desirable material. The PDMS stamp335and the substrate300were cured at 70° C. For example, the patterned PDMS film may be exposed to UVO for 150 sec and placed in contact with the target substrate300and cured at 70° C. for 30 min. The closed PDMS decal315was transferred onto the substrate300by peeling away the supporting PDMS layer330.

A top layer340of the PDMS decal315was then removed by reactive ion etching (RIE), as indicated by the arrows345inFIG. 3C. In the RIE process, portions of the PDMS decal315are etched chemically by reactive species or physically by ion bombardment or by a combination of chemical and physical mechanisms. Oxygen plasma is commonly used to etch hydrocarbon containing polymers. However, in the case of oxygen plasma etching of PDMS, a thin SiO2layer may be formed during etching with an oxygen plasma. Thus, a fluorine-based plasma may be used to etch the PDMS decal315by breaking the siloxane bond. In the illustrated embodiment, an O2/CF4gas mixture was used to etch the PDMS decal315. Dry etching in the illustrated embodiment was performed with a Uniaxis 790 Reactive Ion Etching system. For example, the PDMS decal315may be transferred onto a glass substrate300and RIE may be performed in a condition with 300 mTorr of total gas pressure, 5 sccm O2and/or 35 sccm CF4of gas flow rates, and 200 W of RF power. Discrete resist structures350may be formed by the etching process, as shown inFIG. 3D.

FIGS. 4A and 4Bshow SEM images of 2 μm and 300 nm line-patterned PDMS after removing the top layer of a closed-type PDMS decal by RIE, as discussed above.FIG. 4Cshows a scanning electron microscope (SEM) image of 2 μm wide PDMS lines patterned on a glass substrate after removing a top layer of a closed PDMS decal by O2/CF4RIE. Scanning electron microscopy (SEM) may be performed with a Philips XL30 ESEM-FEG or a Hitachi S-4700 SEM. During etching, grass-like structures are formed on the top of the PDMS exposed to the RIE, as shown inFIG. 4C. Similar grass-like structures have been observed for the anisotropic etching of Si, GaAs, and polymers. Although the mechanism for the formation of grass-like structure is not completely understood, it has been proposed that defects or contaminations on the surface cause an evenness in the initial etching that forms the tips of the grass. The etching rate of the tip may be slower than the flat area in an anisotropic etching condition, thus the grass grows vertically as etching proceeds. In the case of PDMS etching, the grass-like structures were formed not only in an anisotropic condition, but also in an isotropic condition. Anisotropic etching of PDMS was observed to cause higher grass-like structure formation than the isotropic etching procedure. The fibril-like structures can be easily removed by rinsing the RIE exposed decal with acetone, isopropyl alcohol, and deionized water and then blow-drying with pure nitrogen gas.

FIG. 5Ashows an SEM image of 5 μm wide PDMS lines patterned on Si(100) after removing a top layer of a closed PDMS decal by O2/CF4RIE. The sample was rinsed with isopropyl alcohol, acetone, and deionized water, and then dried under a pure nitrogen gas stream.FIG. 5Bshows an SEM image of the same silicon surface after removing the PDMS by tetrabutylammonium fluoride. To evaluate the possibility of using PDMS decal as a resist material on silicon substrate, the closed PDMS decal was transferred onto the silicon substrate and O2/CF4RIE was performed to remove the top layer. The O2/CF4gas mixture not only removed the PDMS, but also etched the silicon substrate, as shown inFIG. 5A. To prevent etching of the silicon by O2/CF4RIE, additional layers may be formed over the silicon substrate.

FIGS. 6A and 6Bconceptually illustrate an exemplary process for depositing multiple layers over a silicon substrate600. In the illustrated embodiment, a 200 nm thick layer605of aluminum (Al) was deposited onto the silicon substrate600. The Al layer605acts as an etch mask. Next, a 10 nm thick layer of silicon oxide (SiO2) film610is deposited on top of the Al layer605. In some cases, the SiO2film610may promote the adhesive transfer of a PDMS decal615. A reactive ion etching with O2/CF4, indicated by arrows620, may be used to etch a portion of the PDMS decal615, which may result in the patterned portions625remaining irreversibly attached to the substrate600, as shown inFIG. 6B.

FIGS. 7A and 7Bpresent SEM images of 5 μm and 300 nm wide PDMS lines patterned on the SiO2/Al/Si substrate after removal of a top PDMS layer by RIE. The Al layer is almost intact and the silicon substrate is completely maintained after RIE. To verify that an Al layer is needed to protect the silicon substrate from the O2/CF4RIE, a control experiment was performed in which only the SiO2layer was used to protect silicon substrate from the O2/CF4RIE. Without the Al layer, the SiO2layer was breached, which lead to the silicon layer being damaged under the same conditions as used to produce the structure shown inFIGS. 7A and 7B.

FIGS. 8A,8B, and8C conceptually illustrate an exemplary process of multilayer lithography. The decal transfer lithography and reactive ion etching procedures described above may be compatible with commercially available planarization layers (PLs) commonly used for microelectronic fabrication. Multilayer lithography (e.g., bilayer and trilayer lithography) was developed to achieve higher resolution by smoothing underlying substrate topography and higher aspect ratio after etching. For example, in bilayer lithography, a resist structure is coated directly on top of the PL. For another example, in trilayer lithography, a resist is coated on top of an additional etch mask layer, which is coated on the PL. In various embodiments, photoresists and/or spin-on-glass materials may be used for the PL. Photoresists have typically been more popular than spin-on-glass, because photoresists may result in a more planar film.

In the embodiment shown inFIG. 8A-C, a 400 nm thick planarization layer805(e.g. a layer formed from Microposit 1805) was spin-cast onto a silicon substrate800at a spin rate of about 5500 rpm for about 30 seconds. Additional layers may also be formed, as discussed above. In the illustrated embodiment, a 25 nm Al layer810and a 5 nm SiO2layer815were evaporated onto the planarization layer805by electron beam evaporation. In one embodiment, a Temescal FC-1800 Electron Beam Evaporator may be used to deposit Al and SiO2onto the targeted substrates. A polydimethylsiloxane decal820is irreversibly attached to the SiO2layer815and a reactive ion etching process, indicated by the arrows825, is used to etch away a portion of the polydimethylsiloxane decal820, leaving behind polydimethylsiloxane lines830.

In one embodiment, the polydimethylsiloxane lines830may be used as an etch mask so that portions of the planarization layer805, the silicon dioxide layer815, and/or the aluminum layer810may be removed by one or more etching processes, as indicated by the arrows835. In the illustrated embodiment, exposed portions of portions of the planarization layer805, the silicon dioxide layer815, and the aluminum layer810were removed by wet etching and anisotropic O2RIE, resulting in high aspect ratio resist features840on the silicon substrate800, as shown inFIG. 8C. In the illustrated embodiment, anisotropic etching of the planarization layer800was carried out using 20 mTorr of total gas pressure, 10 sccm O2of gas flow rates, and 100 W of RF power.

FIG. 9Ashows a cross-sectional SEM image of 500 nm PDMS lines transferred onto a SiO2/Al/PL/Si substrate after removing the top layer of a closed PDMS decal, such as the polydimethylsiloxane decal820shown inFIG. 8A, by RIE. As shown inFIG. 9A, the 25 nm thick Al layer is still intact and successfully served as an etch mask for the O2/CF4RIE.FIG. 9Bshows high aspect ratio resist features formed by etching exposed portions of portions of a silicon dioxide layer, an aluminum layer, and a planarization layer, as discussed above.

To illustrate the applicability of this method to the fabrication of electronic devices, a silicon-based thin-film transistor was fabricated from a silicon-on-insulator (SOI) wafer using decal transfer lithography and RIE. A source-drain-patterned closed-type decal was transferred onto the SiO2/Al/Si substrate using the procedure described above. The top layer of the closed-type PDMS decal was removed by RIE using 300 m Torr of total gas pressure, 5 sccm O2and 35 sccm CF4of gas flow rates, and 200 W of RF power. After removing the top layer, the sample was immersed in a 49% HF aqueous solution for 5 sec to remove the SiO2not protected by the decal. After etching, the planarization layer may be rinsed using a mixture of phosphoric acid, acetic acid, nitric acid, and water. In this example, the sample was rinsed with deionized water and immersed in an aluminum etchant (AL-II) for 30 sec to remove the exposed Al. The sample was then rinsed with deionized water and immersed in 1 M TBAF solution in THF for 2 min to remove the PDMS decal. In the last step, the 49% HF aqueous solution was used to remove the SiO2layer on Al.

FIG. 10Ashows an optical micrograph of one transistor in a large area array. Optical micrographs were recorded using an Olympus BH-2 optical microscope interfaced with a Panasonic GP-KR222 digital color camera.FIG. 10Bdisplays current-voltage (I-V) characteristics of a transistor device fabricated by this methodology. In the illustrated embodiment, the vertical axis represents current in milli-Amperes and the horizontal axis indicates voltage in volts. These I-V curves demonstrate the utility of this process for the fabrication of functional electronic devices across large areas. The successful application of this methodology for the fabrication of electronic devices across large areas demonstrates its potential to extend the utility of soft lithography.

FIG. 11conceptually illustrates one exemplary embodiment of a method1100for forming high-aspect-ratio resist structures on a substrate1105. In the illustrated embodiment, the substrate1105is silicon, although any substrate may be used in alternative embodiments. A planarization layer1110has been formed above the substrate1105. In the illustrated embodiment, the planarization layer1110is formed by a conventional organic polymer used in the art for such purposes, e.g. Shipley1805, but other materials can be used as well. This layer is in turn capped with a thin adhesion layer of SiO2deposited by an evaporative method. However, persons of ordinary skill in the art should appreciate that, in alternative embodiments, the planarization layer1110may be formed of any desirable material and/or may include a plurality of layers. A patterned silicon-containing elastomer1115is then bonded to the SiO2layer1115. A detailed description of techniques for forming the patterned silicon-containing elastomer1120and bonding the patterned silicon-containing elastomer1120to the SiO2layer1115are presented above.

Briefly, in the illustrated embodiment, a PDMS prepolymer (Dow Corning) was cast onto a master with a relief pattern (i.e., a photoresist patterned silicon wafer) and cured at 65° C. The cured PDMS stamp was extracted from the master, and the patterned PDMS surface was exposed to UV/Ozone (UVO) for 150 sec, and immediately placed in conformal contact with an SiO2/Planarization layer(PL)/Si(100) substrate and cured at 65° C. A low pressure mercury lamp (BHK), (173 μW/cm2) was used for UV/Ozone (UVO) treatment of PDMS which helps to induce a strong adhesion between the PDMS and the SiO2layer1115.

A portion of the silicon-containing elastomer1115is then removed by cohesive mechanical failure (CMF). Cohesive mechanical failure (CMF) patterning is a known type of soft lithography based on the transfer of PDMS patterns to a substrate via the interfacial adhesion and mechanical failure of PDMS. After the portion of the silicon-containing elastomer1115has been removed, a patterned portion1120of the silicon-containing elastomer1115remains bonded to the planarization layer1110. In the illustrated embodiment, the PDMS patterns were transferred by mechanically peeling off the bulk PDMS. An etching process, such as reactive ion etching (RIE), is then used to form one or more structures1125by etching a portion of the planarization layer1110using the patterned portion1120as a mask. This combination of CMF and RIE techniques may enable patterning of submicron-sized and/or nano-sized, high aspect ratio resist structures1125on the substrate1105.

FIG. 12Ashows a cross-sectional SEM image of an interface between a PDMS replica and a substrate before peeling off the PDMS.FIGS. 12B and 12Cshow, respectively, an AFM image and a cross-section of the PDMS lines after peeling off the PDMS replica. The AFM cross-section shown inFIG. 12Breveals that the surface of the transferred PDMS lines is tapered and the average height at the center is about 18 nm. The width of PDMS lines and gap between the lines are 370 nm and 230 nm, respectively.FIG. 12Dshows the top view SEM image of the same sample after dry etching of the SiO2for 33 sec and anisotropic etching of the PL. The SiO2film was removed in a condition with 50 mTorr of total gas pressure, 40 sccm of CF4flow rate, and 30 W of RF power, and anisotropic etching of the PL was carried out using 20 mTorr of total gas pressure, 10 sccm of O2flow rate, and 100 W of RF power for 5 min. The average width and gap of the lines are 360 nm and 240 nm, respectively. Comparing these patterned lines before (FIG. 12B) and after (FIG. 12D) dry etching, the width of the line slightly decreased after etching. This result may be because the CF4plasma used for dry etching of SiO2removes not only the SiO2layer but also the PDMS resulting in the slightly narrower PDMS lines.

FIGS. 13A,13B,13C, and13D show cross-sectional scanning electron microscope (SEM) images of PDMS/SiO2/PL resist structures on Si(100) substrates resulting from SiO2etching for various times and anisotropic etching of PL for 5 min. As shown in the figures, the width of the patterned lines decreases as the period for dry etching of SiO2increases. The average widths of the lines inFIGS. 13A,13B,13C, and13D are 250, 180, 130, and 100 nm, respectively. These figures demonstrate that the PDMS/SiO2layers can successfully serve as an etch mask for anisotropic O2RIE of a PL and the width of the lines can be controlled down to 100 nm.

FIG. 14conceptually illustrates one exemplary embodiment of a method1400for forming high aspect ratio resist structures on a substrate1405. In the illustrated embodiment, the substrate1405is silicon, although any substrate may be used in alternative embodiments. A planarization layer1410has been formed above the substrate1405. In the illustrated embodiment, the planarization layer1410is formed by a conventional organic polymer used in the art for such purposes, such as Shiply 1805 or other materials. However, persons of ordinary skill in the art should appreciate that, in alternative embodiments, the planarization layer1410may be formed of any desirable material and/or may include a plurality of layers. This planarization layer is in turn capped with a thin adhesion layer of SiO2deposited by an evaporative method. A first patterned silicon-containing elastomer1420is then bonded to the adhesion layer1415, as discussed in detail above. A portion of the first silicon-containing elastomer1420may be removed and a first patterned portion1425of the first silicon-containing elastomer1420may remain bonded to the adhesion layer1415.

In the illustrated embodiment, a second patterned silicon-containing elastomer1430is then bonded to the first patterned portion1425using techniques such as discussed in detail above. A portion of the second silicon-containing elastomer1430may be removed and a second patterned portion1435of the second silicon-containing elastomer1430may remain bonded to the first patterned portion1425. In the illustrated embodiment, the pattern associated with the first patterned portion1425is aligned substantially perpendicular to the pattern associated with the second patterned portion1435. Accordingly, the combination of the first and second patterned portions1425,1435forms a checkerboard pattern. However, persons of ordinary skill in the art should appreciate that the present invention is not limited to the checkerboard pattern. In alternative embodiments, the first and/or second patterned portions1425,1435may have any desirable pattern and may be positioned in any desirable orientation. Furthermore, additional pattern portions may also be formed and bonded to the structure shown inFIG. 14.

The combination of the first and second patterned portions1425,1435may be used as an etch mask. Thus, an etching process, such as reactive ion etching, may be used to etch the planarization layer1410through the first and second patterned portions1425,1435to form a structure1435in the planarization layer1410. In one embodiment, the structure1440formed using the etching process may include submicron and/or nanometer scale structures. Conventional imprinting techniques, which are performed at high temperature (e.g., above the glass transition temperature of polymer), can not be used to imprint multiple patterns on the substrate because the previously imprinted patterns would be destroyed by heating.

FIGS. 15A and 15Bshow SEM images of multiply transferred PDMS lines after dry etching of SiO2and PL layers. In the illustrated embodiment, a first set of 300 nm wide PDMS lines were patterned on a SiO2/PL/Si(100) substrate as described above and then exposed to UVO for 10 min. A second line-patterned PDMS replica was extracted from the master and exposed to UVO for 150 sec. The features in the second line-patterned PDMS replica have a characteristic width of 300 nm (FIG. 15A) or 2 μm (FIG. 15B). The UVO treated PDMS was optically aligned perpendicular to the PDMS line patterned substrate, placed in contact and cured at 65° C. for 5 hrs. After inducing adhesion, the PDMS slab was physically peeled away to deposit the second set of PDMS lines on top of the first set of PDMS lines. Finally, RIE has been performed to transfer the patterns to underlying SiO2and PL layers.