SOGI-based PLL for grid connection and motor control

SOGI based apparatus and methods for providing balanced three phase output signals free of harmonics, DC components and imbalance present in the input signals, are disclosed. In addition, such apparatus and methods for providing corresponding output signals which are drift-free integrals of the input signals and which signals may enable the control of a power electronics inverter for improved and robust grid power injection and for motor control are disclosed.

BACKGROUND OF THE INVENTION

Field of the Invention

Embodiments of the disclosure generally relate to adaptive filters, integrators, phase locked loops (PLLs), and current controller structures based on the second-order generalized integrators (SOGIs), and their application to grid-connected inverters and motor drives.

Description of the Related Art

Adaptive Filters, Integrators and PLLs

There are Many Industrial Applications where Power is Generated into the Grid and supplied to a motor. In order to accomplish this, the power electronics equipment (and related instrumentation and protection relays) require dependable measurements of frequency and phase. For the grid, this is the frequency and phase angle of the polyphase supply voltages. The grid may be a national utility supply and/or one or more generators acting in concert. For motors, this is the electrical frequency associated with shaft rotation and the instantaneous shaft angle (position of the rotor poles) modulo one pole pair angle. In a synchronous motor, such as a permanent magnet motor, the poles are fixed in the rotor. In an asynchronous motor, such as the ubiquitous induction motor, the poles are induced on the rotor.

In some cases, it is possible to affix a shaft position sensor to a motor such as an opto-mechanical encoder or electro-mechanical resolver. However, in a large number of cost-sensitive applications, and in applications where the motor is physically inaccessible (as in a submersible pump motor deployed deep in an oil well) it is required to operate motors without a shaft sensor. In a grid application there is no physical equivalent to a shaft encoder. Thus, where no sensor is used, a sensorless technique must be used, in which frequency and phase is estimated from readily measured terminal voltages and currents. Motors pose a particular problem in that unlike a 50 Hz or 60 Hz grid, the frequency (speed) range of the motors can be very wide.

A further problem of imbalance arises in grid distribution and motor control. A typical grid distribution supply is comprised of three phases, plus a neutral. Consumers are connected to a single phase and neutral. Different consumers are supplied from different phases. When these consumers absorb different levels of power, the network impedances result in voltage differences appearing between phases. Moreover, network equipment such as transformers and industrial loads such as high power motor drives cause voltage harmonic distortion. These imbalances and distortions cause excess power losses in network infrastructure and this is an increasingly severe issue. In some cases, the power utility needs to over-size and upgrade the network infrastructure to cope with these issues. A specific goal of a grid-connected generation device, such as wind turbines, solar panels and other generation equipment, which can be distributed over a wide area, is to inject high quality balanced sinusoidal currents into the grid. Doing so improves the quality of power flowing in the network, reducing imbalance, distortion and power losses.

In the case of motors, it is well known that only a 5% voltage imbalance can cause excess power loss due to the resulting imbalanced currents, leading to inefficiency, over-heating and unwanted torque ripple and vibration. This results in the need to de-rate the output of the motor in some cases by 25%. In certain applications, such as submersible motors deployed deep in oil wells, long cables and sometimes intermediate transformers are used. These cables, especially flat steel-armored types, have very substantial imbalanced mutual inductances between the conductors, which manifests itself as unequal impedances on the phases. Even round cable, being in proximity to steel tubing for its entire length, exhibits imbalance. In these cases, a balanced supply voltage such as almost invariably supplied by power electronic variable drives will result in imbalanced currents. In turn, the sensorless estimation referred to hereinbefore becomes more difficult.

Most sensorless motor control schemes use an observer (also known as an estimator) to estimate the rotor angle and speed, which is required for motor control. Observers typically combine measured voltages and currents with some information for the motor (e.g. winding resistances, inductances) and a type of Phase-Locked Loop (PLL). Similarly, grid-connected inverters require PLLs to obtain the angle and frequency of the grid voltage.

Desirable PLL characteristics include the ability to obtain fast and accurate synchronization information (i.e. angle and speed) and insensitivity to disturbances, harmonics, DC components, unbalances, sags/swells, notches and other types of distortion in the input signal. PLLs are used in several applications, including telecommunications, grid-connected inverter synchronization, motor control, and others. For three-phase motor control in particular, the signals fed to the PLL are (approximately) three-phase sinusoidal signals, derived from measurements and equations that depend on the motor type (e.g. induction, synchronous) and model. The derivation of these signals typically requires integration of voltages, to produce respective fluxes.

This integration, presents its own challenges, mainly relating to the DC components that can be present in the input signals. Such DC components can appear either in the actual measured quantities, or due to offsets in the values provided by the relative sensors (due to inaccuracies in their calibration). The presence of DC (or very low-frequency) components in the input signals is known to cause problems to the integrators (e.g. drift, saturation). Integrators, either analog or digital, therefore need to be supplemented with DC blocking mechanisms, typically high-pass filters (HPFs), to avoid these effects. However, HPFs can limit the operational range and dynamics of the integrator, and can require compensation for the magnitude and phase error they introduce. In addition, integrator drift is a known problem in simple implementations of induction motor vector control. It should be noted that the use of conventional integrators in conjunction with an observer leads to instability. Induction motors have the great merit that they are self-controlling so long as the applied voltage V is in suitable proportion to the applied frequency f. The use of ratio V/f is commonly called scalar control. In fact, the drive is no more than a variable frequency voltage generator, maintaining the set ratio of V to f, whose approximate value can be calculated from the rated voltage and frequency on the motor nameplate. These drives produce a balanced voltage, however, on imbalanced systems such as those with long cables, the motor currents will not be balanced and the motor temperature will rise.

It is important to note, that with respect to the various figures present herein, that there are many equivalent conventions in the art for representing signal processing structures. For example, integration is commonly represented by a block labelled with an integration symbol. Equivalently, the label is sometimes the Laplace operator equivalent, 1/s. Gain blocks can be represented by a triangle or block labelled with the gain. The figures herein use a mixture of such styles but the meaning should be clear to one skilled in the art.

Referring toFIG. 1, the structure of a prior art second-order generalized integrator (SOGI)10is shown, together with its use for the generation of a set of direct11and quadrature signals, such as voltages, from the input v13, output v′11and qv′12, respectively [1]. The whole structure can be referred to as a SOGI-QSG (quadrature signal generator). In this figure, the output v′11is subtracted from the input v13to produce a negative feedback error signal14, which is amplified by proportional gain k15. A second error term is formed from this by subtracting output qv′12. This is amplified by gain ω′16, and integrated to form the output v′11. In turn, output v′11is used as the input to integrator17and further gain ω′16to form qv′12. It will be apparent to one practiced in the art that simple transformations such as transposing the order of gain and integration can be made without affecting the overall transfer function.

The direct and quadrature outputs of the SOGI-QSG described herein above have the following second order transfer functions:

Utilizing Equations 1 and 2 the Bode plots of D(j ω)21,22and Q(j ω)23,24are shown inFIG. 2illustrating the frequency response of a typical prior art SOGI based system. The Bode magnitude plot25, expresses the magnitude of the frequency response in decibels, and the Bode phase plot26, expresses the phase shift. In Equations 1 and 2 gain ω′ is the numerical representation of the motor or grid electrical angular frequency that is desired and, as hereinafter shown, can be found by various known methods. The x-axes of Bode plots25,26represent frequencies that might be found in the input signal v13, such as ω′ itself, and frequency fluctuations that can occur. It can be seen in the figure that direct output22does not introduce a phase shift relative to the component of interest of the input signal v13(components such as harmonics, for example), which is at frequency ω′ and the direct output21acts as a first-order band-pass filter around this frequency (a −20 dB/decade roll-off 1/ω). It should also be apparent that the quadrature output24introduces a 90-degree phase shift relative to direct output22and acts as a second-order low-pass filter above this frequency (−40 dB/decade roll-off 1/ω2). It should be known by those skilled in the art that quadrature output12is not the integral of the input; it is the input v13shifted in phase by 90 degrees and passed through an equivalent of a low-pass filter. Moreover, what should be apparent is that the SOGI of the prior art has inability to attenuate the quadrature output at low frequencies. The practical impact of this deficiency will be described in more detail hereinbelow.

The direct output11of a SOGI-QSG10can be used as a band-pass filter, for instance, to suppress the distorting components of a sinusoidal signal with angular frequency ω′. It is important to note that ω′ can vary, and can be supplied to SOGI-QSG10from an observer (not shown) such as a well known synchronous reference frame (SRF) or other phase lock loop (PLL), or a Frequency-Locked Loop (FLL). In this way, the SOGI-QSG(s)10and the observer can act cooperatively to clean the input signal v13from distorting low- and high-frequency components. The observer then works with the cleaned signals, thus providing more stable and accurate speed estimation (in the case of motor control) to the SOGI-QSG(s), and to the user.

Referring toFIGS. 3 and 4, a single-phase30SOGI-based PLL and a three-phase40SOGI-based PLL of the prior art are shown. With specific reference toFIG. 4, the three phases are denoted by subscripts a, b and c, ω′ is the estimated frequency and θ is the estimated rotor angle. In the various figures, and as commonly referred to in the art, the coupled SOGI-type PLL structure can sometimes be abbreviated to PLL, such as when discussing the use of frequency and angle outputs.

Referring toFIG. 5, as is very well known in the art, a three-phase system can be represented by an equivalent two-phase system50. In this particular embodiment, the three-phase SOGI-based PLL is replaced by two SOGI-QSGs51,52, by implementing the αβ (Clarke) transformation53[1]. In this embodiment, the three phase input signals va, vband vcare stored in a vector Vabc54and transformed to two phases using matrix abc-αβ53. The use of SOGIs51,52in an αβ configuration, is commonly known in the art as a double SOGI quadrature signal generator “DSOGI-QSG” or simply “DSOGI”, as shown with reference toFIG. 6below. It should be noted that the term “DSOGI” will be also used in this disclosure to denote DSOGI-type structures, which can be based on different building blocks, other than SOGI-QSGs, as will be more fully described herein after. This implementation makes use of the quadrature output of the SOGI-QSGs as well. The additional advantage of such an implementation is that it can identify and filter an imbalance present between the three phases, i.e. in case of imbalanced (asymmetrical) input signals. It should be appreciated by those skilled in the art that an imbalanced three-phase system can be considered as the sum of two balanced systems, in which the 120-degree separation between each of the three phases is sequenced first in a normal reference order, called the positive-sequence, and second in a reverse order called the negative-sequence. The imbalance filtering is known to be achieved by the calculation of the positive-sequence component of the three input signals55,56,57, performed within positive-sequence component (PSC) block58.

Referring toFIG. 6, the two-phase system50shown above inFIG. 5is shown with an observer61, wherein the observer is shown by example to comprise a SRF-PLL. It should be noted that other types of PLL can be used instead of the SRF PLL.

Current Control of Imbalanced Loads

It is known that PLL immunity to imbalances is essential for the control of imbalanced loads, since a current controller cannot operate properly on the basis of distorted angle-speed estimates. However, a PLL on its own is not a complete solution to the current control problem, as the current controller may not be able to handle imbalanced loads (i.e. produce balanced currents), even when operating with accurate angle-speed estimates. What is needed is a controller that can generate balanced output currents when its load is imbalanced.

It is well known in the art that imbalance in 3-phase waveforms is equivalent to the existence of a negative-sequence component as set forth in commonly known symmetrical components theory. With respect to current control, it is also known that the basic synchronous reference frame (dq) current controller, comprising two proportional integrated (referred to herein after as PI) controllers (for the d and q components of the current, respectively) can only control the positive-sequence component of the currents. The negative-sequence current component can only be controlled by extracting it from the three-phase currents and adding one more set of dq PI controllers to suppress it. The addition of one more set of dq PI controllers on the negative-sequence currents, is known in the art and comprises what is known as a double synchronous reference frame (referred to herein after as DSRF) current controller [6]. The most difficult portion of implementing a DSRF current controller is the extraction of the symmetrical components of the currents. This step is important in order to avoid the undesirable double-frequency oscillations that appear on all four dq quantities if the positive and negative-sequence controllers are fed with the actual, imbalanced 3-phase currents. The desired method is that the positive-sequence current controller is fed with the positive-sequence component of the currents only (which are balanced, by definition), and the negative-sequence current controller is fed with the negative-sequence component of the currents only (which are balanced, as well). This desired method achieves a decoupling of the positive and negative-sequence controllers, and enhances the overall performance of current control. The resulting current controllers are known and commonly referred to as double decoupled synchronous reference frame (referred to herein after as DDSRF) current controllers.

Different techniques have been proposed in the art to achieve this decoupling [7]. In principle, any method that implements some form of symmetrical components derivation could be used for this purpose (for example, see [8]). One such technique makes use of a DSOGI structure70shown inFIG. 7. The positive and negative-sequence components of the input signal, denoted by superscripts “+” and “−”, respectively, can be derived by a positive-negative-sequence calculator71(referred to herein after as PNSC) from the DSOGI [9].

For at least the reasons stated herein before, it is desirable to be able to provide a simplified control circuit that can provide filtering and current balance. There is clearly a need for an improved means of such control circuits for injecting suitable power into the grid as well as balancing three-phase power in the control of motors.

SUMMARY OF THE INVENTION

It disclosed that the SOGI based systems of the present disclosure provide balanced three phase output signals free of harmonics, DC components and imbalance present in the input signals. It is a further aspect to provide corresponding output signals which are drift-free integrals of the input signals. It is further disclosed that such systems provide signals that will enable the control of a power electronics inverter for improved and robust grid power injection and for motor control.

Such systems used in electrical applications comprise a second-order generalized integrator (SOGI) based adaptive filter adapted to receive input signals, to generate information about the input signals and to output filtered signals based on the information. In certain embodiments the second-order generalized integrator based adaptive filter comprises a modified second-order generalized integrator (mSOGI) adapted to suppress low frequency components of the input signals and can further comprise a dual quadrature signal generator (SOGI-2QSG) adapted to output a direct component signal, a quadrature component signal, an integrated direct component signal and an integrated quadrature component signal of the input signal and is further adapted to output filtered signals based thereon.

Systems of the present disclosure include input signals comprising a multiphase signal (abc) and a predetermined angular frequency (ω′) and a transformation processor adapted to transform the multiphase signal (abc) into an a signal and a β signal and include a first second-order generalized integrator adapted to receive the predetermined angular frequency and to receive and filter the α signal and to produce a direct filtered α signal and a quadrature filtered α signal and a second second-order generalized integrator adapted to receive the predetermined angular frequency and to receive and filter the β signal and to produce a direct filtered β signal and a quadrature filtered β signal and a first calculator adapted to receive the direct filtered α signal and the quadrature filtered β signal and to produce a positive-sequence α component signal and a second calculator adapted to receive the direct filtered β signal and the quadrature filtered α signal and to produce a positive-sequence β component signal and a second transformation processor adapted to transform the positive-sequence α component signal and the positive-sequence β component signal into a clean multiphase positive-sequence output signal.

Some systems of the present disclosure further include a second summing calculator adapted to receive the direct filtered α signal and the quadrature filtered β signal and to produce a negative-sequence α component signal and a second differencing calculator adapted to receive the direct filtered β signal and the quadrature filtered α signal and to produce a negative-sequence β component signal and a third transformation processor adapted to transform the negative-sequence α component signal and the negative-sequence β component signal into a negative-sequence current signal to output a negative-sequence current signal as part of the clean multiphase negative-sequence output to attenuate imbalances, ripples, harmonics and DC components present in the input signal.

Still other systems of the present disclosure include those where the input signals are a three component phase voltage signal and a three component reactive phase flux drop signal and include a first pair of second-order generalized integrators adapted to receive an estimated frequency signal and to receive, integrate and filter the three component phase voltage signal and to output a filtered flux signal and a second pair of second-order generalized integrators adapted to receive an estimated frequency signal and to receive and filter the three component reactive phase flux drop signal and to output a filtered reactive phase flux drop signal and a calculator to produce a difference between the filtered flux signal and the filtered reactive phase flux drop signal and to output an estimated rotor flux signal and an observer to receive the estimated rotor flux signal and to output an estimated rotor angle and the estimated frequency signal.

Still other systems of the present disclosure produce negative-sequence components of the signals used to remove imbalances between the phases of the multiphase input signals.

Methods for filtering input signals in accordance with the present disclosure include at least one of suppressing low frequency components of the input signals and producing a direct component signal, a quadrature component signal, an integrated direct component signal and an integrated quadrature component signal of the input signals and outputting filtered signals based thereon.

Other methods for filtering input signals in accordance with the present disclosure where the input signals comprise a multiphase signal and a predetermined angular frequency include transforming the multiphase signal into an α signal and a β signal and filtering the α signal and producing a direct filtered α signal and a quadrature filtered α signal filtering the β signal and producing a direct filtered β signal and a quadrature filtered β signal and producing a negative-sequence α component signal and producing a negative-sequence β component signal and transforming the negative-sequence α component signal and the negative-sequence β component signal into a clean multiphase negative-sequence output signal.

Still other methods include using a phase locked loop to receive a three component phase voltage signal and a three component current signal and outputting an estimated angle and the estimated frequency signal and differencing the respective negative-sequence current component from the three component current signal and outputting a differenced negative-sequence current component signal and using an i-iNeg controller to produce a positive-sequence voltage component signal and using an iNeg controller to produce a negative-sequence voltage component signal and producing a reference voltage from the positive-sequence voltage component signal and the negative-sequence voltage component signal.

Methods of the present disclosure further include reducing an imbalance between phases of a multiphase electrical signal by producing a negative-sequence current component signal iNeg from the multiphase electrical signal using an estimated angle and a predetermined frequency and subtracting the negative-sequence current component signal from a current signal of the multiphase electrical signal to produce an i-iNeg component signal and producing a positive-sequence voltage component signal using the i-iNeg component signal and the estimated angle and producing a negative-sequence voltage component signal using the negative-sequence current component signal iNeg and the estimated angle and adding the positive-sequence voltage component signal and the negative-sequence voltage component signal to produce a multiphase reference voltage signal which will be used to achieve current balancing.

The systems disclosed use input signals that can include imbalances, ripples, harmonics or dc components and attenuate at least one of the imbalances, ripples, harmonics or dc components to produce a clean multiphase output signal.

DETAILED DESCRIPTION

In the following detailed description of the embodiments, reference is made to the accompanying drawings, which form a part hereof, and within which are shown by way of illustration specific embodiments by which the examples described herein can be practiced. It is to be understood that other embodiments can be utilized and structural changes can be made without departing from the scope of the disclosure.

The problems in the prior art discussed hereinbefore are addressed by using systematic electrical method and apparatus of the present disclosure. For instance, quadrature output of the prior art SOGI-OSGs does not offer any filtering on low-frequency components. Thus, DC components of the input signals (which can particularly appear due to calibration errors in measured signals) will pass to the quadrature outputs without any attenuation. This is a known problem in the use of prior art SOGI-OSGs [2]-[4]. Low speed motor operation poses similar problems.

Referring toFIG. 8, there is shown an embodiment of a SOGI type structure of the prior art, referred to herein as the dcSOGI80, which adds a DC offset controller81[2], [3] to SOGI85. dcSOGI80includes gain blocks82,83,84set at the desired frequency ω′ as described herein above. The Bode plot for the dcSOGI80(FIG. 8) is shown inFIG. 10for ω′ equal to 10 rad/s, wherein the direct outputs101,102and quadrature outputs103,104can be compared with the direct outputs21,22and quadrature outputs23,24of the SOGI shown inFIG. 2. It can be seen that the dcSOGI80retains high-frequency attenuation for direct output102and quadrature output104, and adds low-frequency attenuation to the quadrature output104, which as noted above, is not provided by the SOGI10ofFIG. 1. Thus, dcSOGI80is an example of a SOGI structure that provides low frequency and DC suppression for both its direct and quadrature outputs.

Now referring toFIG. 9, there is shown an embodiment of a modified SOGI90, which will be referred to herein as mSOGI90, of the present disclosure. mSOGI90, like dcSOGI80ofFIG. 8, also provides low frequency and DC suppression for both its direct and quadrature outputs but has the characteristic of being simpler to implement, allowing the calculations to be performed at a faster rate than dcSOGI80or similar embodiments found in the prior art. As shown inFIG. 9, mSOGI is comprised of integrator91positioned on qv′ quadrature leg92and the subtraction of the result from the input94by calculator93. Now referring toFIG. 11, there is shown the Bode plot of mSOGI90where it is shown that the mSOGI of the present disclosure retains high-frequency attenuation for both direct output111v′ and quadrature output113qv′, and introduces low-frequency attenuation to qv′. For convenience, voltages are shown in the figure, but the mSOGI can be applied to other signals, such as currents. For purposes of direct comparison attention is drawn toFIG. 12wherein the Bode plots for the direct output for SOGI21,22, mSOGI111,112, and dcSOGI101,102are plotted on the same graphs. Similarly, and with reference toFIG. 13there is shown the Bode plots for direct output for SOGI23,24, mSOGI113,114, and dcSOGI103,104are plotted on the same graphs.

Now referring toFIG. 14, there is shown an embodiment of the present disclosure of a double SOGI control structure1401, or DSOGI control structure which can receive three component input signals1402, namely abc. It is within the scope of the present disclosure that such DSOGI control structure1401can be comprised of either two mSOGI-QSGs or two dcSOGI-QSGs, described herein before or other known DC (low frequency) suppressing SOGI. It should be appreciated by those skilled in the art that such an embodiment can successfully remove high-frequency components, low-frequency (including DC) components and imbalances from the input signals. DSOGI control structure1401is comprised, in this example, of a three-phase input signal1402, an abc-αβ transformation processor1403, an mSOGI1405, a second mSOGI1406, determined angular frequency input1407, a differencing calculator1408and a summing calculator1409, a first gain amplifier1410, a second gain amplifier1411, and a αβ-abc transformation processor1412to produce clean positive-sequence three-phase output signal1413. As used herein, gain amplifiers apply a factor equal to a constant C to the incoming signals, wherein C can range from approximately 0.5 to approximately 2.

Application of DSOGI to Control Grid-Connected Inverters

Still referring toFIG. 14, the present disclosure is particularly useful in applications related to grid connected inverters (not shown) wherein the application of the DSOGI control structure1401described directly hereinabove is applied to provide a cleaner signal for use by a PLL. As is known, such grid connected inverters convert DC electrical power into AC power suitable for injecting into the electric utility company grid. The inverters can convert the DC signals supplied by various known power generation sources such as wind turbines, solar panels, fuel cells, biomass, combined heat and power (CHP), organic Rankine cycle turbine alternators (ORC), and other powered generation systems into AC signals suitable for such grids. The grid can also be an islanded network in which the inverter supports all or most of the load due to grid disconnection or provision of stand-alone power. In such examples, there will exist a three-phase input signal1402which comprise the measured grid phase voltages (derived from line voltages). The three-phase output1413will be voltages filtered as described immediately herein above, which voltages can be coupled to an observer such as a conventional PLL. The observer estimated angular frequency ω′ can be fed back to the DSOGI and together with the angle can be supplied to the power electronic inverter control algorithm. The power electronic inverter control algorithm, can as an example, comprise a current control algorithm, wherein the output of the algorithm instructs the injection of sinusoidal currents to the grid, at a certain phase angle (power factor).

Application of a SOGI-Based Flux Integrator-QSG to Control a Motor

As is known by those skilled in the art, PLLs used for sensorless motor control normally use fluxes and do not rely on voltages, wherein flux is the integral of voltage. The reason is that the amplitude of the fluxes at the drive terminals for a given motor do not vary significantly for different predetermined speeds. The same is not true for voltages, which are proportional to speed, and thus are low at low motor speeds. This affects the dynamics of the PLL, and can cause the PLL to lose lock at low speeds.

An embodiment of the present disclosure could enable the control of a motor by use of a SOGI-based PLL working on fluxes by using an independent integrator, normally implemented in software/programmable logic, to produce the three motor fluxes, which are then passed through a DSOGI as described herein above before feeding them to an observer. However, as will be more fully described hereinafter, a separate integrator can advantageously be unnecessary, as the SOGI-QSG can be modified to also operate as a QSG for the integral of the input signal.

A known SOGI-QSG structure150of the prior art is shown inFIG. 15and includes multipliers151,152and integrators153,154. The relative arrangement of multipliers151,152and integrators153,154in SOGI-QSG structure150can be altered, for example integrator153can be moved before multiplier153as indicated by arrow155without any effect on its transfer function. However, this change enables the advantageous output of integrated signals as will be more fully described directly herein below.

Referring now toFIG. 16, there is shown a SOGI structure160wherein multipliers161,162are placed after integrators163,164. It has been discovered that the structure of SOGI160enables the production of the filtered integral of the input165v as output166INTv, as well as its quadrature output signal167qINTv, together with direct output signal168v′ and quadrature signal169qv′. This is a significant advantage over the prior art [5], [10] with respect to the implementation of systems using SOGI structure160, as the same code or logic block can be used to generate all four signals enabling the code to run more quickly. Because SOGI structure160implements two (2) QSGs, one for the input signal and one for its integral, it will be referred to herein as SOGI-2QSG.

Referring toFIG. 17, there is shown modified SOGI170, referred to herein as a modified second-order generalized integrator dual quadrature signal generator or mSOGI-2QSG, comprised of the same structure as SOGI structure160(FIG. 16) and further including mSOGI171which comprised of integrator172positioned on qv′ quadrature leg172and the subtraction of the result from the input173by calculator174. In this embodiment, mSOGI171works to eliminate DC components from the output signals, namely of the filtered integral of the input173v as filtered integral direct output signal175INTv, as well as its filtered integral quadrature output signal176qINTv, together with direct output signal177v′ and quadrature signal output178qv′. It should be noted that the method of the present disclosure for acquiring INTv′ and qINTv is independent of the DC suppression method of the mSOGI presented hereinabove. Thus, it is within the scope of the present disclosure that instead of employing an mSOGI, a dcSOGI or other known DC-suppression methods could be used in conjunction with the method described herein above for acquiring INTv and qINTv, to form other embodiments of SOGI-2QSG.

Referring toFIG. 18, there is shown a Bode plot for filtered integral direct output signal175INTv as lines1801,1802, as well as its filtered integral quadrature output signal176qINTv as lines1803,1804. It can be seen that 1802 INTv is the integral of the input, because its amplitude at ω′, represented by point1805, is −20 dB, which represents the division by ω′=10 rad/s in this example, and its phase is −90 degrees. Moreover, it should be appreciated by those skilled in the art that 1804 qINTv has the same amplitude as INTv at ω′, point1805, and has a further 90-degree phase shift as compared to INTv represented by1806.

In certain embodiments of the present disclosure, both INTv and qINTv are band-pass filtered around ω′ shown as point1805inFIG. 18. As discussed herein above, and now with reference toFIG. 19, this enables an embodiment of the present disclosure to use the integrated outputs, namely the direct filtered integral α signal, the quadrature filtered integral α signal, the direct filtered integral β signal, and the quadrature filtered integral β signal, of mSOGI_2QSG alpha1901and mSOGI_2QSG beta1902in a novel DSOGI_INT structure1900. The direct filtered integral α signal and the quadrature filtered integral β signal are subtracted using a difference calculator to produce a positive-sequence filtered integral α component signal, the quadrature filtered integral α signal and the direct filtered integral β signal are summed using a summing calculator to produce a positive-sequence filtered integral β component signal. When these signals are differenced they produce a negative-sequence filtered integral α component signal and a negative-sequence filtered integral β component signal. As mentioned hereinabove, the DSOGI-type structures are herein disclosed as using mSOGIs but the use of any SOGI-type structure which preferably eliminates DC components is within the scope of the present disclosure. The input1903to DSOGI_INT structure1900is a set of three-phase voltages, while the output1904is a set of three-phase fluxes, clean from DC, high/low frequency components and imbalances as described herein above with reference to integrated signals. Furthermore, it can be seen that a DSOGI_INT structure can be configured to operate as a DSOGI if the non-integrating outputs (v′, qv′) of the two mSOGI_2QSGs are used internally. This can lead to a unified structure for both DSOGI and DSOGI_INT, which is very advantageous with respect to hardware/software implementation. A single block of code or logic can therefore be implemented, which can operate both as DSOGI and as DSOGI_INT, depending on whether the non-integrating or the integrating outputs of the mSOGI_2QSGs are used, respectively.

As described herein above, the computations disclosed herein intensive and preferably implemented in logic components such as programmable gate arrays (not shown) which are commercially available from sources such as Intel® or Xilinx. The combination of the simplified control structures of the present disclosure and the speed of the logic components enables the necessary computations to be made while leaving the processor or digital signal processor free for auxiliary tasks.

For purposes of controlling a motor, it is known to first correct the terminal voltages at the drive for the resistive voltage drop in the cabling between motor and drive, and for the winding resistance of the motor itself. If the measured phase voltage is vp, the measured phase current is ipand the phase resistance is Rp, taking into account any transformation by an interposed transformer, the effective phase voltage vepis vep=vp−Rpip. Resistance R is the sum of all phase resistances Rp, including cable and motor stator winding. It is also preferable to compute the reactive flux terms Lp,ip, where Lpis the representative series phase inductance including cable and motor stator winding. These terms may need to be adjusted for salient pole machines to take into account the inductance variation with rotor angle. Phase inductance must also include the possibly imbalanced mutual inductances, the deleterious effects of which are addressed by the present invention. So long as the calculations are consistent, if an interposed transformer is used, the entire model can be expressed at the drive or the load side of the transformer, as is readily understood by one skilled in the art, paying attention to the transformer ratio. The transformer impedance is preferably to be taken into account.

In some applications of the present disclosure for controlling a motor, the vp−Rpipcomponents need to be integrated and band-pass filtered, whereas the Lpipcomponents only require band-pass filtering. In such embodiments of the present disclosure, a DSOGI_INT is used for the vp−Rpipcomponents and a DSOGI is used for the Lpipcomponents to form a suitable PLL structure for estimating the rotor angle and frequency of a synchronous motor. Such an embodiment of a PLL structure is shown with reference toFIG. 20wherein input2003v-Ri_abc is the three measured or drive-demanded phase voltages, or the three component phase voltage signal, each corrected for ohmic voltage drop and input2004Li_abc is the three component reactive phase flux drop signal each calculated from inductance and phase current. PLL structure2000comprises a second-order generalized integrator dual quadrature signal generator DSOGI_INT2001and DSOGI2002, low pass filter (LPF)2007, and observer2009. Within DSOGI_INT2001the integrating outputs (INTv, qINTv) of a pair of mSOGI-2QSGs are used, such as DSOGI_INT structure1900(FIG. 19) shown herein above. Similarly, DSOGI2002for processing input2004Li_abc can comprise a DSOGI structure1401(FIG. 14) or a DSOGI_INT structure1900(FIG. 19) having a pair of mSOGI-2QSGs of which the non-integrating outputs (v′, qv′) are used internally.

The respective (αβ or abc) filtered flux signal2006(which is the integral of voltage signal), and filtered reactive phase flux drop signal2005are directed to calculator2008to produce an estimated rotor flux signal2012and then passed on to observer processor2009. The estimated frequency signal2010is passed to low pass filter2007and fed as filtered estimated frequency signal2011ω′ to DSOGI_INT2001and DSOGI2002. Observer2009can comprise any suitable observer such as a classic SRF-PLL type disclosed herein above. The low-pass filter can comprise any type of finite impulse response (FIR) or infinite impulse response (IIR) filter with a low-pass characteristic. Moreover, as mentioned hereinabove, the DSOGI-type structures are herein implemented using mSOGIs but any SOGI-type structure which preferably eliminates DC components could be used without departing from the scope of the disclosure. The amplitude of signal2012can be changed by placing a gain device (similar to2107ofFIG. 21) since the angle and frequency of a balanced signal doesn't vary with amplitude without departing from the scope of the present disclosure.

Although the embodiment ofFIG. 20is directed at the control of synchronous motors, respective structures of the present disclosure, based on DSOGI-type structures (integrating and non-integrating), can be derived for the control of asynchronous motors as well. Referring toFIG. 21, an example PLL structure2100of the present disclosure, for the estimation of rotor flux angle and frequency of a typical squirrel cage induction motor (not shown) is shown. In this embodiment, input2101v−Ri_abc and input2102σLi_abc three component reactive phase flux drop signal are similar to those described inFIG. 20herein above, wherein the stator inductance is L, while rotor inductance2103Lr and magnetizing inductance2104Lm are used by gain device2107to output an estimated filtered rotor flux signal. However, any suitable gain, such as unity, can be used in place of Lr/Lm in device2107since the angle and frequency of a mutli-phase flux signal is independent of its amplitude. The leakage flux coefficient2105σ, expressed as σ=1−Lm2/(L*Lr) is applied to input2102to pass on to an observer processor. It should be noted that the shaft angle and the rotor flux angle have a fixed relation for synchronous motrs and that for asynchronous motor they do not have a fixed relationship.

Embodiments of the present disclosure have been tested using simulation techniques with artificially distorted inputs, under steady-state and dynamic conditions. An embodiment of the control system was also simulated for driving a permanent magnet motor. The testing included flat armored cables, which those skilled in the art can appreciate that include imbalanced mutual inductances, and wherein instability problems have been encountered. These instabilities were reproduced in simulations and when using the mSOGI-2QSG-based PLL in accordance with the present disclosure were eliminated from the PLL's output. Another advantage of embodiments of the present disclosure is that the mutual inductance of a flat armored cable does not need to be calculated a priori, such as from an electromagnetic finite element analysis, for each application.

The following include simulation results that illustrate the capabilities under extreme conditions of the above described mSOGI-2QSG-based PLL of the present disclosure inFIG. 19, used as2001inFIG. 20. For purposes of clarity, input2004and DSOGI2002inFIG. 20are not included in this example, to focus on the integrating function of DSOGI_INT in accordance with the present disclosure. Referring toFIG. 22, there is shown four plots from the same time span for an embodiment of the present disclosure wherein plot2201shows artificially heavily distorted three phase inputs v-Ri's2202,2203,2204. Plot2210shows the output fluxes2212,2213,2214. Plot2220shows the estimated angle output theta from the observer2221and actual angle output2222(coincident upon one another) and is plotted between 0 degrees and 360 degrees. Plot2230shows the angle error2231between the angle estimated by the observer and the angle used to build the artificial input waveforms. Examination of plot2201of the input v-Ri's2202,2203,2204to DSOGI_INT shows them having high frequency harmonics, DC offsets and imbalance. Namely, input2202has both a lower amplitude a DC offset from that of input voltages2203,2204. Examination of plot2210of fluxes2211,2212,2213of DSOGI_INT output shows all of the fluxes to be free of harmonics, balanced in amplitude and having zero, or practically zero, DC offset with respect to each other. Examination of plots2220and2230demonstrates the accuracy of the estimate angle, which can be seen to be within +1/−2.1 degrees from the actual angle.

Now referring toFIG. 23, which aims to demonstrate the transient response of the DSOGI_INT ofFIG. 19, there is shown a simulation of its response to a 50% fundamental frequency step increment, from 50 Hz to 75 Hz, of the input v-Ri's. Plot2301shows the three phase inputs2302,2303,2304having a superimposed ripple, DC offsets and imbalance. Plot2310shows the output fluxes2312,2313,2314. Plot2320shows the angle output2321theta from the observer and is plotted between 0 degrees and 360 degrees. Plot2330shows the angle error2331, measured as inFIG. 22. During the transient the period of the voltages2302,2303,2304is changing. One skilled in the art can understand that the amplitude of the output fluxes2311,2312,2313in plot2310is reduced due to this change. Examination of this plot reveals that, in accordance with the present disclosure, output fluxes, even during the transient, are well balanced and allow the observer to produce the correct angle2321. Examination of plot2330shows a transient, or settling, time for the angle of ˜50 ms.

Now referring toFIG. 24, there is shown a simulation of the response of the present disclosure as disclosed with reference toFIG. 20, for driving a permanent magnet motor over a 1.4 km flat armored cable with imbalanced mutual inductances. Plot2401shows the three phase drive output voltages2402,2403,2404. Plot2410shows the drive output currents2412,2413,2414to the motor. Plot2420shows the output fluxes2422,2423,2424. Plot2430shows the angle error2431as measured between a shaft angle encoder and the observer estimate. As can be seen from the plots, the drive produces balanced voltages2402,2403,2404, resulting in imbalanced load currents2412,2413,2414, due to the cable imbalance. Nevertheless, the estimated fluxes (2012inFIG. 20) are balanced, aiding the observer to produce a small angle error, as shown in plot2430. This condition has been extensively tested experimentally as well, yielding results that agree with those herein presented.

It is therefore shown and described herein above how the enhanced SOGI-based structures, namely the mSOGI, SOGI-2QSGs and DSOGI_INT of the present disclosure can be used to form a more robust PLL for motor control applications. The PLL of the present disclosure is immune to high/low-frequency harmonics, DC and load imbalance, such as that caused by flat armored cables shown inFIG. 24, thus providing an accurate motor angle and speed estimate.

The embodiments described herein above are of a PLL that can provide accurate estimates of frequency and angle which provide for an accurate motor angle and speed estimate in the face of distortions and imbalances. In addition, embodiments of the present disclosure are drawn to embodiments of a controller of a motor or grid connection to ensure balanced output currents. The combination of such embodiments of PLL and balanced current control ensures stable system behavior and higher power quality, offering several advantages over the prior art such as robustness and power loss reduction for motor control applications, and meeting of interconnection standards for grid-connected inverters.

With reference to the prior art described herein above relating to PNSC, a feature of the present disclosure is that the output of a PNSC is applied in a control structure for the derivation (and then the control) of the symmetrical components of currents. As described herein before with reference toFIG. 7, PNSCs of the prior art, employ voltages. Also as described hereinbefore, for efficient and stable operation of motors, and for injection of quality power to the grid, balanced currents are required, which does not necessarily imply balanced voltages at the drive.

Referring toFIG. 25, an embodiment of an overall system2500to suppress current imbalance of the present disclosure, including a PLL2501and a decoupled double synchronous reference frame (DDSRF) current controller, i-iNeg controller2510and iNeg controller2511, is shown. The three component current signal or current feedback2502i_abc is read from the inverter/drive output (not shown), and passed to PLL2501(wherein the PLL can be SOGI-based or other known PLL), together with output voltages2503v_abc, the three component phase voltage signal, along with necessary parameters to calculate estimated angle2504θ, depending on the application (grid or motor), and estimated frequency signal2505ω′ of the load. Although PLL2501is shown generally by example, the PLL structure and inputs can vary, depending on the type of load, e.g. grid or motor (injection or control). It has to be noted as well that for the case of a motor, the PLL can be substituted by an apparatus that can measure the rotor speed and angle, such as a shaft encoder. Current feedback2502i_abc is also passed to DSOGI structure2506, which preferably includes some type of DC suppression method, such as an mSOGI described herein above. DSOGI2506also receives the estimated angular frequency2505ω′ from PLL, and produces the positive-sequence2507iPos and negative-sequence2508iNeg components of current feedback2502i_abc, by means of a PNSC. The quantity of the difference between negative-sequence2508iNeg and components of current feedback2502i_abc (i_abc−iNeg) for each phase is passed to positive-sequence current calculator2509. In this particular embodiment, the positive-sequence currents2507iPos are not used because they are heavily filtered by the DSOGI. It has been discovered that using the difference between negative-sequence2508iNeg and components of current feedback2502i_abc to produce a respective differenced negative-sequence current component signal (i_abc−iNeg) and use it instead of iPos as input to the i-iNeg controller2510improves its response to fast transients. The i-iNeg controller2510also works using estimated angle2504θ from the PLL2501as input to produce positive-sequence voltage component signal2512vPos and a dq current reference which will be discussed in more detail with respect to a positive-sequence control block herein below with reference toFIG. 27. The dq current reference is set to control the drive output current amplitude and power factor as is known in the prior art. In addition, iNeg2508is passed to the negative-sequence current controller2511. As shown in the more detailed negative-sequence control block diagram ofFIG. 28herein below, the dq current references for this controller are normally zero, so that the imbalance is suppressed. The iNeg controller2511controller works using estimated angle2504θ from the PLL2501and negative-sequence2508iNeg from DSOGI2506to produce negative-sequence voltage component signal2513vNeg. The outputs of the two controllers, positive-sequence voltage component signal2512vPos and negative-sequence voltage component2513vNeg, are added using calculator2514to produce the voltage references2515vRef that are then passed to modulator2516. As is known in the prior art, modulators such as a sinusoidal pulse width modulators covert the voltage references to the actual voltages that the inverter applies to the connected load (e.g. grid or motor).

Referring now toFIG. 26, there is shown an example of an embodiment of an mSOGI structure2600for implantation in place of the generalized DSOGI2506ofFIG. 25. In other words, this particular DSOGI is implemented using an mSOGI embodiment merely as an example and as set forth herein above, any SOGI-type structure which preferably suppresses DC components could be used without departing from the scope of the present disclosure. mDSOGI structure2600is comprised, in this example, of an input current2601i that is fed into transformation processor2602abc-αβ, to produce the input current αβ components2603,2064respectively. An estimated angular frequency2605ω′ is fed to mSOGI_alpha2606along with α output current2603to produce direct output current2607i′ and quadrature output current2608qi′ for the alpha component of the input current2603. Similarly, estimated angular frequency2605ω′ is fed to mSOGI_beta2621along with β output current2604to produce direct output current2609i′ and quadrature output current2610qi′ for the beta component of the input current2604. Quadrature output current2610qi′ is subtracted from direct output current2607i′ using calculator2611. Quadrature output current2608qi′ is added to direct output current2609i′ using calculator2612. Calculator2613is used to add direct output current2607i′ with quadrature output current2610qi′. Similarly, calculator2614is used to difference quadrature output current2608qi′ from direct output current2609i′. The output from calculator2611and calculator2612are fed to gain2615ato output a positive-sequence α component signal and to gain2615bto produce a positive-sequence β component signal and on to αβ-abc inverse transformation processor2616to produce positive-sequence current signal2617iPos. Similarly, the output from calculator2614and calculator2613are fed to gain2618ato output a negative-sequence α component signal and to gain2618bto produce a negative-sequence β component signal and on to αβ-abc inverse transformation processor2619to produce negative-sequence current signal2620iNeg. It should be noted for completeness that positive-sequence currents2617iPos and negative-sequence currents2620iNeg are the specific outputs of mSOGI structure2500that are generally referred to inFIG. 25as positive-sequence currents2507iPos and negative-sequence currents2508iNeg. It can also be noted that system2600can be applied to voltages or other input signals, and can be derived from system1401inFIG. 14with the addition of the negative-sequence component calculator of the PNSC70ofFIG. 7.

Now referring toFIG. 27there is shown a positive-sequence current controller2700, which is a specific embodiment of i-iNeg controller2510ofFIG. 25, with direct current reference2701idrefand quadrature current reference2702iqrefset according to desired drive output current and power factor. Input current2703iabcis fed into a transformation processor in the form of transformation matrix2704to produce direct current component signal2705idand quadrature current component signal2706iq. Direct current reference signal2701idrefand direct current component signal2705idare fed to proportional integral (PI) controller2707to produce direct voltage component signal2708vd. Quadrature current reference signal2702iqrefand quadrature current component signal2706iqare fed to PI controller2709to produce quadrature voltage component signal2710vq. Transformation matrix2711is a transformation processor that converts direct voltage component2708vdand quadrature voltage component2710vqto three-phase (abc) positive-sequence voltage component signal2712vPos, using the estimated angle2713θ. It should be noted for completeness that positive-sequence voltage component signal2712vPos is the specific output of a positive-sequence current controller2700and that is generally referred to inFIG. 25as positive-sequence voltage component signal2512vPos.

Now referring toFIG. 28there is shown a negative-sequence current controller2800, which is a specific embodiment of an iNeg controller2511ofFIG. 25, with direct current reference2801set to zero, or a zero reference signal, and quadrature current reference2802also set zero reference signal. In this particular embodiment, negative-sequence current controller2800with zero dq reference works to eliminate drive output current imbalance. Input current2803iabcis fed into transformation processor2804to produce direct current component2805idand quadrature current component2806iq. Since direct current reference2801is zero it has no effect as direct current component2805idis fed to proportional integral (PI) controller2807to produce direct voltage component2808vd. Quadrature current reference2802is zero and quadrature current component2806iqis similarly fed to PI controller2809to produce quadrature voltage component2810vq. Transformation processor2811converts direct voltage component2808vdand quadrature voltage component2810vqinto three-phase (abc) negative-sequence voltage component2812vneg, using the negative of estimated angle2813−θ. It should be noted for completeness that negative-sequence voltage component2812vnegis the specific output of a negative-sequence current controller2800and that is generally referred to inFIG. 25as negative-sequence voltage component signal2512vNeg.

Certain embodiments of the present disclosure, such as those disclosed with reference toFIG. 25, are useful for generating balanced currents into an imbalanced grid. Such embodiments of PLLs as disclosed herein earlier were mainly directed at applications for grid-connected inverters.

Sensorless Motor Vector Control

Referring now toFIG. 29, the embodiment is similar to that described herein above inFIG. 25except that it has been discovered that overall control system2900eliminates the need for DSOGI2506on the current leg. Specifically, there is shown an overall control system2900that comprises an mSOGI-2QSG PLL2901using a three component phase voltage signal and a three component current signal as input. The mSOGI-2QSG PLL2901is similar to that described as2000, to derive θ and ω′ and in addition to provide the negative-sequence component of the three component input current signal, as will be described hereinbelow. Upon examination of output2005in control system2000, it can be seen that this is equal to L*iPos. Thus, a division by L, or rather, leaving the multiplication by L for after the DSOGI block2002, can provide iPos. Also, the PNSC calculations shown herein above can be added to derive negative-sequence currents2902iNeg from the same block, as well. This eliminates the need for the DSOGI block2506(ofFIG. 25). Using the above equations to derive negative-sequence currents2902iNeg, and using calculator2903, produces the positive-sequence current2904as i-iNeg used in i-iNeg controller2905. It should be noted that reference voltage signal2906vRef passed to modulator2907is the specific output of overall control system2900and that it is similar to that generally referred to inFIG. 25reference voltage2515vRef. Such an embodiment of overall control system2900is readily applied to classic synchronous motor control (such as permanent magnet motors).

However, this approach can be extended to also apply to more advanced synchronous or asynchronous motor control (such as induction motors). Referring now toFIG. 30, there is shown an embodiment of an overall control system3000which comprises FOC/DTC block3001which can include any prior art Field-Oriented Control (FOC) or Direct Torque Control (DTC) approach, wherein such approaches are normally designed under the assumption of balanced loads. FOC/DTC block3001regulates the rotor flux level and the predetermined torque level using the positive-sequence current3003i-iNeg from calculator3004. The mSOGI-2QSG PLL3005is similar to that described as2100, to derive rotor flux angle3007θ and estimated frequency signal3008ω′ and in addition to provide the negative-sequence component of the three component input current signal3006(as disclosed with reference to mSOGI-2QSG PLL2901ofFIG. 29) as well as the estimated rotor flux signal3002(as disclosed with reference to the output of2107ofFIG. 21). Signal iNeg3006is used by calculator3004to produce positive-sequence current3003as i-iNeg, which is suppressed by iNeg controller3009. The current balancing capability of control system3000of the present disclosure provides a major advantage over the prior art with respect to motor losses and overall performance.

It should be noted that in the various figures the notation th, Theta and θ all mean the estimated electrical phase angle of the synchronous rotor flux/poles. In an asynchronous motor this is not proportional to the physical shaft angle, as the shaft speed differs from the synchronous speed (due to slip).

Induction Motor Scalar (V/f) Control

Referring now toFIG. 31, there is shown a scalar (V/f) control system3100for use with an induction motor to scalar control in a manner that balances the motor currents. In contrast to embodiments described herein before, a PLL and a positive-sequence current controller are not required in this particular embodiment scalar control system3100, as the predetermined frequency and the angle of the voltages can be pre-programmed in the drive. In order to suppress any imbalances on the three component current, DSOGI3101and negative-sequence current controller3102are used. Scalar control system3100further comprises any known V/f controller3103that supplies normal demand voltage output3104v, the three component phase voltage signal. The three-phase output3105of negative-sequence current controller3102is added to the respective normal demand voltage outputs v3104by calculator3106. The summed voltages are passed as demand voltages3107vRef to the modulator3108. V/f controller3103generates a continually increasing or decreasing angle3109θ (between zero to 360 degrees) according to a set frequency f and time t wherein θ=2 πf t. The rate of change of angle is the electrical frequency. It will be appreciated by those skilled in the art that in a two-pole motor, the electrical frequency is equal to the synchronous (i.e. assuming slip is equal to zero) shaft rotation frequency, but in higher pole count motors the electrical frequency is the number of pole pairs times the shaft rotation frequency. This relationship is valid through the present disclosure wherever the PLLs are generating the electrical angle and the estimated frequency signal. Because, as inFIG. 28, both d and q current references are normally zero for negative-sequence controller3102iNeg controller, it only requires that the angle input θ increases as θ=2 πf t, and the controller does not require that the angle input θ has any fixed relationship to the rotor flux angle. In particular, there is no need to estimate or control the rotor position, which in any case is not possible for a scalar controller as it normally does not have the necessary motor model and observer found in vector controls. Importantly, it has been discovered that the angle input θ of the negative-sequence controller can simply be the programmed angle3109of V/f control block3103. In certain embodiments of scalar control system3100, it may be preferable that DSOGI3101comprises two mSOGIs and which control system, as should be appreciated by those skilled in the art, has no observer. The foregoing disclosure relative to d and q current references normally being zero and their effect on the relationship of θ with the rotor flux angle apply whenever the negative-sequence current controller is used because the references2801and2802are zero, essentially yielding an equivalent structure.

As set forth herein above, embodiments of the present disclosure are useful in a variety of industrial applications. For instance, there exists many tens of thousands of oilfield variable speed drives that are of the scalar type operating submersible pump induction motors over long cables. Embodiments of the present disclosure can be realized on existing controllers by introducing a modification to their logic or firmware wherein they can be upgraded to improve the performance and reliability of existing motors. Embodiments of the present disclosure can also be incorporated in new drive designs. Because of the ability of embodiments of the present disclosure to handle imbalances in the input current, in many cases a flat cable can be used instead of round cable, improving mechanical clearances in the borehole and so reducing the chance of damage during installation.

It will be apparent that the structures and methods disclosed herein can be implemented as integrated circuits, in programmable logic, or in high speed processors. Particular applications of certain embodiment of the present disclosure extend to modules that can be used to upgrade existing equipment. An example would be to provide an emulation of an optical shaft encoder by converting phase and frequency to quadrature pulse streams. Other applications include grid monitoring equipment for the accurate measurement of rate of change of frequency (ROCOF) which is an important protection mechanism and further for power quality analysis.

While the disclosures in the present disclosure have focused on mSOGI-2QSG structures, it will be appreciated that without departing from the scope of the present disclosure, any structure capable of extracting clean, DC free and balanced signals, their integrals and their time quadratures from input signals may be applied as shown herein to the generation of balanced currents for motor control and grid injection type applications using power electronics inverter on unbalanced loads.

REFERENCES