Power supply device and display apparatus including the same

A disclosed display apparatus may include a display panel having a plurality of sub-pixels and configured to display an image based on an image signal provided to the display panel; a controller configured to determine a required power for at least one frame of the image signal and to output a switch signal based on determining if the required power is equal to or higher than a predetermined reference power; and a power supply device configured to receive an external AC power and to generate a first high-level voltage and a second high-level voltage. The power supply device may be further configured, based on the switch signal, to output the first high-level voltage to drive the display panel, or to combine the second high-level voltage with the first high-level voltage to generate a third high-level voltage and to output the third high-level voltage to drive the display panel.

This application claims the benefit of Korean Patent Application No. 10-2020-0187861, filed on Dec. 30, 2020, which is hereby incorporated by reference as if fully set forth herein.

BACKGROUND

1. Technical Field

The present disclosure relates to a power supply device and a display apparatus including the same.

2. Description of the Related Art

With the development of information technology, the market for display devices serving as connecting media between users and information is growing. Accordingly, display devices such as a light emitting display (LED), a quantum dot display (QDD), and a liquid crystal display (LCD) are increasingly used.

Among display devices, an organic light-emitting display has been spotlighted due to a high response speed, a wide viewing angle, high color reproducibility, and a thin structure.

Recently, an organic light-emitting display having a high definition and a large screen has been developed. The organic light-emitting display emits light according to a driving current and thus requires a power supply capable of supplying high power. However, a power supply that supplies high power can be large and expensive.

SUMMARY

Accordingly, the present disclosure is directed to a power supply device and a display apparatus including the same that substantially obviate one or more problems due to limitations and disadvantages of the related art.

An object of the present disclosure is to provide a power supply device that can be designed in a compact structure and can supply power with large current and a display apparatus including the same.

To achieve these objects and other advantages and in accordance with the purpose of the disclosure, as embodied and broadly described herein, a display apparatus may include: a display panel having a plurality of sub-pixels and configured to display an image based on an image signal provided to the display panel; a controller configured to determine a required power for at least one frame of the image signal and to output a switch signal based on determining if the required power is equal to or higher than a predetermined reference power; and a power supply device configured to receive an external AC power and to generate a first high-level voltage and a second high-level voltage. The power supply device may be further configured, based on the switch signal, to output the first high-level voltage to drive the display panel, or to combine the second high-level voltage with the first high-level voltage to generate a third high-level voltage and to output the third high-level voltage to drive the display panel.

The controller may include at least one of: a timing controller configured to supply the image signal to the display panel and to control operation timing of the display panel; and a system on chip (SOC) configured to drive the display panel.

The power supply device may be configured: to output the first high-level voltage to drive the display panel if the required power for the at least one frame of the image signal is determined to be lower than the predetermined reference power; and to combine the second high-level voltage with the first high-level voltage to generate a third high-level voltage and to output the third high-level voltage to drive the display panel if the required power for the at least one frame of the image signal is determined to be equal to or higher than the predetermined reference power.

The power supply device may comprises: a first power supply configured to receive the AC power and to generate the first high-level voltage; a battery configured to generate the second high-level voltage; and a current sharing circuit configured to output the first high-level voltage or the third high-level voltage to drive the display panel based on the switch signal.

The controller may be configured to output a turn-on switch signal as the switch signal to the current sharing circuit such that the third high-level voltage is output if the required power for the at least one frame of the image signal is equal to or higher than the predetermined reference power.

The controller may be configured to limit a luminance of the image signal displayed on the display panel if a charge level of the battery is at or below a reference level.

The display apparatus may further include a battery management circuit configured to control the AC power to be charged in the battery and to detect a state of the battery, including at least one of a lifespan of the battery, a voltage level of the battery, a charge level of the battery, a temperature of the battery, and a battery failure state.

The controller may be configured to receive the state of the battery from the battery management circuit and to provide information on the state of the battery to the display panel to be displayed on the display panel.

The current sharing circuit may include at least one of: a first current limit circuit connected to an output line of the first power supply and configured to limit a current value of the first high-level voltage to a first predetermined value or less; and a second current limit circuit connected to an output line of the battery and configured to limit a current value of the second high-level voltage to a second predetermined value or less.

The current sharing circuit may be configured to connect an output line of the first power supply and an output line of the battery in parallel to output the third high-level voltage based on the switch signal.

The current sharing circuit may include a switch configured: to connect the output line of the first power supply for the first high-level voltage with the output line of the battery for the second high-level voltage if the switch signal is a turn-on switch signal; and to disconnect the output line of the first power supply for the first high-level voltage from the output line of the battery for the second high-level voltage if the switch signal is a turn-off switch signal.

The battery may be configured to be charged if the required power for the at least one frame of the image signal is determined to be less than the predetermined reference power.

In another aspect of the present disclosure, a power supply device, for use in a display apparatus including a display panel and a controller, may include: a first power supply configured to receive an AC power and to generate a first high-level voltage; a battery configured to generate a second high-level voltage; and a current sharing circuit configured, based on a switch signal from the controller, to output the first high-level voltage to drive the display panel, or to combine the first high-level voltage with the second high-level voltage to generate a third high-level voltage and to output the third high-level voltage to drive the display panel.

The power supply device may further include a battery management circuit configured to control the AC power to be charged in the battery and to detect a state of the battery, including at least one of a lifespan of the battery, a voltage level of the battery, a charge level of the battery, a temperature of the battery, and a battery failure state.

The current sharing circuit may include at least one of: a first current limit circuit connected to an output line of the first power supply and configured to limit a current value of the first high-level voltage to a first predetermined value or less; and a second current limit circuit connected to an output line of the battery and configured to limit a current value of the second high-level voltage to a second predetermined value or less.

The current sharing circuit may be configured to connect an output line of the first power supply and an output line of the battery in parallel to output the third high-level voltage based on the switch signal.

The current sharing circuit may include a switch configured: to connect the output line of the first power supply for the first high-level voltage with the output line of the battery for the second high-level voltage if the switch signal is a turn-on switch signal; and to disconnect the output line of the first power supply for the first high-level voltage from the output line of the battery for the second high-level voltage if the switch signal is a turn-off switch signal.

In yet another aspect of the present disclosure, a method of supplying power in a display apparatus, including a display panel having a plurality of sub-pixels and configured to display an image based on an image signal, may include: receiving an AC power and generating a first high-level voltage; generating a second high-level voltage; determining a required power for at least one frame of the image signal; outputting a switch signal based on determining if the required power is equal to or higher than a predetermined reference power; and based on the switch signal, outputting the first high-level voltage to drive the display panel, or combining the second high-level voltage with the first high-level voltage to generate a third high-level voltage and outputting the third high-level voltage to drive the display panel.

The outputting of the first high-level voltage or the third high-level voltage based on the switch signal may include: outputting the first high-level voltage to drive the display panel if the required power for the at least one frame of the image signal is determined to be lower than the predetermined reference power, or combining the second high-level voltage with the first high-level voltage to generate a third high-level voltage and outputting the third high-level voltage to drive the display panel if the required power for the at least one frame of the image signal is determined to be equal to or higher than the predetermined reference power.

The display apparatus may further include a battery, and the method may further include charging the battery if the required power for the at least one frame of the image signal is determined to be less than the predetermined reference power.

DETAILED DESCRIPTION

Reference will now be made in detail to embodiments of the present disclosure, examples of which are illustrated in the accompanying drawings.

Advantages and features of the present disclosure, and implementation methods thereof will be clarified through following example embodiments described with reference to the accompanying drawings. The present disclosure may, however, be embodied in different forms and should not be construed as limited to the example embodiments set forth herein. Rather, these example embodiments are provided so that this disclosure may be sufficiently thorough and complete to assist those skilled in the art to fully understand the scope of the present disclosure. Further, the protected scope of the present disclosure is defined by claims and their equivalents.

The shapes, sizes, ratios, angles, numbers, and the like, which are illustrated in the drawings in order to describe various example embodiments of the present disclosure, are merely given by way of example. Therefore, the present disclosure is not limited to the illustrations in the drawings. The same or similar elements are designated by the same reference numerals throughout the specification unless otherwise specified.

In the present specification, where the terms “comprise,” “have,” “include,” and the like are used, one or more other elements may be added unless the term, such as “only,” is used. An element described in the singular form is intended to include a plurality of elements, and vice versa, unless the context clearly indicates otherwise.

In the description of the various embodiments of the present disclosure, where positional relationships are described, for example, where the positional relationship between two parts is described using “on,” “over,” “under,” “above,” “below,” “beside,” “next,” or the like, one or more other parts may be located between the two parts unless a more limiting term, such as “immediate(ly),” “direct(ly),” or “close(ly)” is used. For example, where an element or layer is disposed “on” another element or layer, a third layer or element may be interposed therebetween.

Although the terms “first,” “second,” and the like may be used herein to describe various elements, these elements should not be limited by these terms as they are not used to define a particular order. These terms are used only to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present disclosure.

In construing an element, the element is construed as including an error or tolerance range even where no explicit description of such an error or tolerance range is provided.

Throughout the present specification, the same reference numerals generally designate the same or similar constituent elements unless otherwise specified.

In the following description of the present disclosure, a detailed description of known functions and configurations incorporated herein may be omitted when it may obscure the subject matter of the present disclosure.

FIG.1is a block diagram schematically illustrating a display apparatus according to an example embodiment of the present disclosure, andFIG.2is a block diagram schematically illustrating a sub-pixel SP included in the example display apparatus ofFIG.1.

As illustrated inFIG.1andFIG.2, a display apparatus according to an example embodiment of the present disclosure may include an image provider110, a timing controller120, a gate driver130, a data driver140, a display panel150, and a module power supply180.

The image provider110may output various driving signals along with a digital image signal supplied from the outside or a digital image signal stored in an internal memory. The image provider110may provide a digital image signal and various driving signals to the timing controller120.

The timing controller120may output a gate timing control signal GDC for controlling operation timing of the gate driver130, a data timing control signal DDC for controlling operation timing of the data driver140, a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, and the like on the basis of the driving signals input from the image provider110. The timing controller120may provide a digital image signal DATA supplied from the image provider110to the data driver140along with the data timing control signal DDC.

The gate driver130may output a gate signal in response to the gate timing control signal GDC supplied from the timing controller120. The gate driver130may provide a scan signal SCAN and an emission signal EM to sub-pixels SP included in the display panel150through gate lines GL1to GLm. The gate driver130may be configured as an integrated circuit (IC) and connected to a bonding pad of the display panel150through tape automated bonding (TAB) or chip on glass (COG). Alternatively, the gate driver130may be implemented in a gate in panel (GIP) structure and be directly formed on the display panel150. The gate driver130may be integrated into the display panel150as necessary, but the present disclosure is not limited thereto.

The data driver140may convert the digital image signal DATA into an analog data voltage in response to the data timing control signal DDC supplied from the timing controller120and output the analog data voltage. The data driver140may convert the digital image signal DATA into an analog data voltage on the basis of a gamma reference voltage having a positive/negative polarity and provide the analog data voltage to the sub-pixels SP through data lines DL1to DLn.

The data driver140may be configured as an IC and connected to a bonding pad of the display panel150through TAB or COG. Alternatively, the data driver140may be implemented in a GIP structure and be directly formed on the display panel150. The data driver140may be integrated into the display panel150as necessary, but the present disclosure is not limited thereto.

The data lines DL1to DLn and the gate lines GL1to GLm are arranged in the display panel150, and sub-pixels SP emitting light may be arranged at intersections of the data lines DL1to DLn and the gate lines GL1to GLm. A single sub-pixel SP may be connected to the first data line DL1, the first gate line GL1, a first power line EVDD and a second power line EVSS. A single sub-pixel SP may include a switching transistor, a driving transistor, a capacitor, and an organic light-emitting diode (OLED). The sub-pixel SP may include a circuit for compensating for deterioration of the light emitting OLED and for deterioration of the driving transistor that supplies a driving current to the OLED.

Sub-pixels SP may constitute a pixel unit including red, green, and blue sub-pixels or a pixel unit including red, green, blue, and white sub-pixels. Such a pixel unit may reproduce a desired color by causing at least one of the sub-pixels SP to emit light. For example, only a red sub-pixel SP may be caused to emit light with current supplied to sub-pixels of the other colors to reproduce red in the corresponding pixel unit. Further, two sub-pixels SP among red, green, and blue sub-pixels SP may be caused to emit light to reproduce a secondary color such as yellow, cyan or magenta. Such a secondary color is reproduced by a larger number of sub-pixels SP, and thus relatively high power may be necessary to reproduce the same. In addition, relatively high power may be required when an image mode is set to a more vivid mode.

The module power supply180may output power supplied from the outside or may convert either of a voltage or a current of the power supplied from the outside to generate voltages for driving the display apparatus. The module power supply180may generate and output a high-level voltage EVDD and a low-level voltage EVSS and may generate and output voltages used in operation of the gate driver130(e.g., a gate high voltage and a gate low voltage) or voltages used in operation of the data driver140(e.g., a drain voltage and a half drain voltage).

FIG.3is a diagram illustrating a television set implemented as the display apparatus according to an example embodiment of the present disclosure, andFIG.4is a diagram illustrating some components of the display apparatus according to an example embodiment of the present disclosure.

As illustrated inFIG.3andFIG.4, the display apparatus according to an example embodiment of the present disclosure may be implemented as a television set100. The television set100may receive digital image signals from a broadcasting station or a separate storage device and display images based on the digital image signals. The display apparatus implemented as the television set100may receive AC power through a power plug.

The display apparatus such as the television set100may include a control board C-PCB (Printed Circuit Board) having the timing controller120and the module power supply180, a set power supply210, a battery220, a current sharing unit230, a battery management unit250, and a system on chip (SOC)240.

The set power supply210may convert the AC power input through the power plug into DC power and output the DC power. The set power supply210may receive the AC power and generate a driving input voltage Vin, a first high-level voltage EVDD1, and a battery charging voltage. The set power supply210may apply the driving input voltage Vin to the control board C-PCB and apply the first high-level voltage EVDD1to the current sharing unit230. The set power supply210may apply the battery charging voltage to the battery220.

The battery220may include a rechargeable battery that can be charged with the battery charging voltage supplied from the set power supply210. The battery220may generate a second high-level voltage EVDD2and output the second high-level voltage EVDD2to the current sharing unit230. The battery220may include a charging circuit for charging power, as well as a battery management system (BMS) function of detecting and managing battery information, such as measurement of a charge level, measurement of the number of charges and discharges, temperature measurement, and voltage measurement.

The battery management unit250may control charging/discharging functions of the battery220and determine a battery state (e.g., lifespan, over-voltage, low voltage, over-charge, over-discharge, overheating, short-circuit, or swelling) on the basis of battery information obtained from the battery220. The battery management unit250may control the charging/discharging functions of the battery220according to a battery state determination result and report the battery state to the control board C-PCB and the SOC240. The battery management unit250may charge the battery220when the second high-level voltage EVDD2is not output from the battery220. The battery management unit240may report a corresponding state when predetermined conditions are satisfied, such as when the charge level of the battery is determined to be at or below a reference level, when a remaining lifespan of the battery is determined to be at or below a reference value, when the battery is determined to be failing, and the like.

The current sharing unit230may be controlled according to a switch signal SW to output the first high-level voltage EVDD1or a third high-level voltage EVDD3higher than the first high-level voltage EVDD1. For example, when the switching signal SW at an off level is input, the current sharing unit230may supply the first high-level voltage EVDD1output from the set power supply210to the control board C-PCB and block the second high-level voltage EVDD2output from the battery220. When the switch signal SW at an on level is input, the current sharing unit230may integrate the first high-level voltage EVDD1output from the set power supply210and the second high-level voltage EVDD2output from the battery220and supply the third high-level voltage EVDD3to the control board C-PCB. The third high-level voltage EVDD3may have the same level as the first high-level voltage EVDD1but have a current amount increased by the second high-level voltage EVDD2from the battery220. Thus, the third high-level voltage EVDD3may have a higher power than the first high-level voltage EVDD1. Accordingly, when a power higher than the first high-level voltage EVDD1output from the set power supply210is required in order to display an image on the display panel150, the switch signal SW at the on level may be applied to the current charging unit230. The switch signal SW may be output from a processor capable of determining a required high-level voltage EVDD, such as the timing controller120of the control board C-PCB.

The SOC240may include a graphics processing circuit, such as a scaler, may convert a digital image signal input from a broadcast receiving circuit or an external video source into a signal with a resolution suitable to be displayed on the display panel150, and may output the converted signal. The SOC240may supply a digital image signal and driving signals, such as the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, and a clock signal CLK, to the control board C-PCB. Here, if the SOC240applies the switch signal SW to the current sharing unit230, the SOC240may check for a power required for each frame of the digital image signal. The SOC240may compare the power required for each frame with a reference power and apply the switch signal SW at the on level to the current sharing unit230upon determining that the required power is higher than or equal to the reference power.

The control board C-PCB may include the timing controller120and the module power supply180. The control board C-PCB may receive a digital image signal and the driving input voltage Vin. In addition, the control board C-PCB may receive the first high-level voltage EVDD1or the third high-level voltage EVDD3.

The module power supply180may generate a logic power supply voltage VDD using the driving input voltage Vin and supply the logic power supply voltage VDD to the timing controller120. In addition, the module power supply180may supply the high-level voltage EVDD1or EVDD3to sub-pixels SP or display elements of the display panel150and to the timing controller120. The logic power supply voltage VDD may be applied to such circuits as the timing controller120, the gate driver130, and the data driver140to drive the circuits. The high-level voltage EVDD1or EVDD3may be supplied to the timing controller120and the sub-pixels SP of the display panel150to drive the sub-pixels SP. The logic power supply voltage VDD may be set to about 12 V and the third high-level voltage EVDD3applied to drive the sub-pixels SP may be set to about 24 V, but the present disclosure is not limited thereto.

The timing controller120may start to operate upon reception of the logic power supply voltage VDD from the module power supply180. The high-level voltage EVDD1or EVDD3may be supplied to the sub-pixels SP of the display panel150according to the timing controller120upon start of the operation of the timing controller120. The timing controller120may receive a digital image signal and driving signals, such as the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, and the clock signal CLK, from the SOC240. The timing controller120may control operation timings of the data driver140and the gate driver130based on the driving signals and provide the digital image signal to the data driver150. Here, the timing controller may check for the power required for each frame of the digital image signal by applying the switch signal SW to the current sharing unit230. The timing controller120may compare the power required for each frame with the reference power and apply the switch signal SW at the on level to the current sharing unit230upon determining that the required power is higher than or equal to the reference power.

In addition, the timing controller120may cause battery state information received from the battery management unit250to be displayed on the display panel150. For example, the timing controller120may cause a message representing the remaining lifespan of the battery, battery failure, or the like to be displayed on the display panel150. Such a battery state information display function may be implemented by the SOC240. The SOC240may generate a message image representing the remaining lifespan of the battery, battery failure, or the like depending on battery state information received from the battery management unit250and transmit the message image to the timing controller120.

The timing controller120may control the luminance of each frame displayed on the display panel150to be maintained at a reference luminance or less in order to reduce the required power upon determining that a charge level of the battery, received from the battery management unit250, is at a predetermined value or less. When the luminance of each frame is maintained at the reference luminance or less, the switch signal SW at the off level may be input to the current sharing unit230so that the first high-level voltage EVDD1output from the set power supply210may be applied to the control board C-PCB. Accordingly, the second high-level voltage EVDD2output from the battery220may be blocked, and the charging voltage output from the set power supply210may be charged in the battery220. Such a luminance limitation function may be implemented by the SOC240. The SOC240may control the luminance of each frame of the digital image signal supplied to the timing controller120to be maintained at the reference luminance or less upon determining that the charge level of the battery, received from the battery management unit250, is at or below the reference level.

FIG.5is a diagram illustrating a configuration of the current sharing unit230.

As shown inFIG.5, the current sharing unit230may include a first current limit circuit310for limiting the current of the first high-level voltage EVDD1output from the set power supply210, a second current limit circuit320for limiting the current of the second high-level voltage EVDD2output from the battery220, and a switch300that turns on/off according to the switch signal SW to determine whether to connect an output line for the first high-level voltage EVDD1to an output line for the second high-level voltage EVDD2.

The first current limit circuit310may detect the current of the first high-level voltage EVDD1output from the set power supply210and block the output line for the first high-level voltage EVDD1if the current increases. The first current limit circuit310may include a switch Switch connected to a power line through which the first high-level voltage EVDD1is supplied, a current sensor CS for sensing a current, and a comparator Comp that compares a current at the input terminal of the current sensor CS with a current at the output terminal of the current sensor CS and outputs a control signal to the switch Switch according to a comparison result. The comparator Comp may output a control signal for controlling the switch Switch to turn off when the current of the first high-level voltage EVDD1output through the power line increases.

The second current limit circuit320may detect the current of the second high-level voltage EVDD2output from the battery220and block the output line for the second high-level voltage EVDD2if the current increases. The second current limit circuit320has the same configuration as the first current limit circuit310, and thus detailed description thereof is omitted. The second current limit circuit320may be connected to a power line through which the second high-level voltage EVDD2is supplied and may output a control signal for controlling the switch Switch to be turned off when the current of the second high-level voltage EVDD2increases.

The first high-level voltage EVDD1output from the set power supply210and the second high-level voltage EVDD2output from the battery220can be stably applied, respectively, according to the first current limit circuit310and the second current limit circuit320having the aforementioned configuration.

The switch300may turn on/off according to the switch signal SW supplied from the SOC240or the timing controller120to connect the output line for the first high-level voltage EVDD1to the output line for the second high-level voltage EVDD2or disconnect the output lines from each other.

When the switch300is turned off, the output line for the first high-level voltage EVDD1is disconnected from the output line for the second high-level voltage EVDD2. Accordingly, the current sharing unit230can output the first high-level voltage EVDD1output from the set power supply210.

When the switch300is turned on, the output line for the first high-level voltage EVDD1is connected to the output line for the second high-level voltage EVDD2and thus the set power supply210is connected in parallel to the battery220. Accordingly, the first high-level voltage EVDD1output from the set power supply210and the second high-level voltage EVDD2output from the battery220can be combined in parallel and be output as the third high-level voltage EVDD3by the current sharing unit230. Since the set power supply210is connected in parallel to the battery220, the current of the finally output third high-level voltage EVDD3equals the sum of the current of the first high-level voltage EVDD1and the current of the second high-level voltage EVDD2. Here, both the first high-level voltage EVDD1and the second high-level voltage EVDD2may be the same voltage, for example, 24 V. Accordingly, the third high-level voltage EVDD3may be 24 V, and the current thereof may equal the sum of the current of the first high-level voltage EVDD1and the current of the second high-level voltage EVDD2. Thus, thus the third high-level voltage EVDD3can be output as a high power.

According to this configuration, the current sharing unit230may output the first high-level voltage EVDD1output from the set power supply210or the third high-level voltage EVDD3corresponding to the combination of the voltages EVDD1and EVDD2output respectively from the set power supply210and the battery220according to the switch signal SW supplied from the SOC240or the timing controller120. When required power is higher than or equal to a reference level, that is, when power equal to or higher than the first high-level voltage EVDD1output from the set power supply210is required, the current sharing unit230may add the power from the battery220to the high-level voltage EVDD1to output the third high-level voltage EVDD3. Accordingly, the rated power required to be provided by the set power supply210can be reduced and thus the size of the set power supply210can be decreased.

In the circuit configuration for accomplishing the current sharing unit230, the switch types and connection method may be modified in various manners and applied to obtain further improved effects. Thus, the circuit configuration is not limited to the above-described example embodiment.

FIG.6is a flowchart of a method for controlling the display apparatus according to an example embodiment of the present disclosure.

The display apparatus implemented as the television set100may receive AC power through the plug PLUG. Then, the display apparatus may generate the first high-level voltage EVDD1and supply the first high-level voltage EVDD1to the control board C-PCB including the timing controller120and the module power supply180(S110).

The display apparatus may calculate power required for each frame of a digital image signal (S112) and determine whether the required power is equal to or higher than a reference power (S114). The power required for each frame may increase for various reasons, for example, when the corresponding frame includes multiple secondary colors, such as cyan and magenta, when an image mode is set to a vivid mode, and the like. The timing controller120, the SOC240, or an additional image processor may check the power required for each frame of the digital image signal and determine whether the required power is equal to or higher than the reference power. Here, the reference power may be a power that can be supplied using the first high-level voltage EVDD1.

If the required power is less than the reference power, the state in which the first high-level voltage EVDD1is supplied is maintained. When the battery is not used in this manner, the battery can be charged at any time (S116).

If the required power is determined to be equal to or higher than the reference power, the first high-level voltage EVDD1and the second high-level voltage EVDD2from the battery220may be combined to generate the third high-level voltage EVDD3(S118).

The generated third high-level voltage EVDD3may be supplied to the control board C-PCB to cause an image of the corresponding frame to be displayed (S120).

As described above, the display apparatus according to an example embodiment of the present disclosure may supply the first high-level voltage EVDD1for displaying an image. Also, when it receives an image input data to display a frame that requires power higher than the first high-level voltage EVDD1, the example display apparatus may combine the second high-level voltage EVDD2of the battery220with the first high-level voltage EVDD1to generate the third high-level voltage EVDD3and supply the third high-level voltage EVDD3to display the image.

As described above, the display apparatus according to an example embodiment of the present disclosure may include both (1) the power supply that receives AC power from a power plug and outputs the first high-level voltage EVDD1and (2) the rechargeable battery to add the power from the battery to the first high-level voltage EVDD1to output the third high-level voltage EVDD3when power equal to or higher than the first high-level voltage EVDD1is required. Accordingly, the rated power to be provided by the power supply210included in the display apparatus may be reduced and thus the size of the set power supply210can be decreased. Consequently, the thickness and the volume of the display apparatus can be reduced.

The power supply device and the display apparatus including the same according to the present disclosure may include a rechargeable battery for supplying a high-power voltage and thus can decrease the rated power to be provided by the power supply included in the display apparatus to reduce the manufacturing cost and the size of the power supply. Consequently, a compact display apparatus can be achieved.

Furthermore, it is possible to reduce the manufacturing cost of the display apparatus by decreasing the thickness and the volume of the display apparatus by applying the power supply device of the present disclosure.

Effects which may be obtained by the present disclosure are not limited to the above-described effects, and various other effects may be evidently understood by those skilled in the art to which the present disclosure pertains.

It will be apparent to those skilled in the art that various modifications and variations can be made in the power supply device and the display apparatus including the same according the present disclosure without departing from the spirit or scope of the disclosure. Thus, it is intended that the present disclosure cover the modifications and variations of this disclosure provided they come within the scope of the appended claims and their equivalents.