Voltage regulator for integrated injection logic electronic system with liquid crystal display

An electronic system, such as an electronic timepiece, utilizes multi-level, integrated injection logic circuitry and a liquid crystal display. A low-power voltage regulator is provided for driving the liquid crystal display which has a negative temperature coefficient. The voltage regulator provides a negative temperature coefficient which tracks the negative temperature coefficient of the liquid crystal display by utilizing the multi-levels of the integrated injection logic circuit to provide the electrical equivalent of a plurality of series-connected diodes without additional current drain.

BACKGROUND OF THE INVENTION 
This invention relates to voltage regulators and, more particularly, to a 
low-power voltage regulator with negative temperature coefficient. 
Features of the system disclosed in the present application are also 
disclosed and claimed in copending application Ser. No. 908,336 filed May 
22, 1978, by Steven E. Marum for Integrated Injection Logic Electronic 
System with Voltage Regulator for Multiplexed Liquid Crystal Display, 
which application is assigned to the assignee of the present application. 
Present-day electronic systems having liquid crystal display, such as 
calculators, timepieces and the like, use a liquid crystal material which 
is sensitive to ultraviolet light, thereby necessitating the use of a 
yellow-colored ultraviolet filler over the display. These displays are 
used because the temperature coefficients of the threshold and saturation 
voltages are nearly zero which is very compatible over the operating 
temperature ranges with the battery voltage utilized in the system. 
Multiplexed liquid crystal displays, which do not require ultraviolet 
filtering, have considerable temperature coefficients at the threshold and 
saturation voltages and cannot be used unless the battery voltage is 
regulated to match them. Ordinary voltage regulators utilize a zener diode 
with positive temperature coefficient to provide for a resultant 
temperature coefficient of nearly zero. In order to provide a voltage 
regulator circuit with negative temperature coefficient, the circuit would 
be required to include a plurality of diodes having a negative temperature 
coefficient connected in series. However, the resulting circuit would draw 
a considerable amount of wasted current through the added diodes. 
It is therefore an object of the present invention to provide a low-power 
voltage regulator for driving a negative temperature coefficient liquid 
crystal display. 
It is another object of the present invention to provide a low-power 
voltage regulator which operates most efficiently in combination with 
integrated injection logic circuitry. 
A further object of the invention is to provide an improved electronic 
integrated injection logic system with liquid crystal display. 
It is yet another object of the invention to provide a low-power voltage 
regulator having a negative temperature coefficient. 
Still a further object of the invention is to provide an electronic system, 
such as an electronic timepiece, with a liquid crystal display which does 
not require ultraviolet filtering. 
BRIEF DESCRIPTION OF THE INVENTION 
These and other objects are accomplished in accordance with the present 
invention by providing an electronic system with series connected 
multi-levels of integrated injection logic circuitry and a liquid crystal 
display which does not require the use of ultraviolet filtering. Such 
display has a negative temperature coefficient, and a low-power voltage 
regulator is provided for driving the liquid crystal display which has a 
correspondingly negative temperature coefficient. The voltage regulator is 
coupled to multi-levels of the integrated injection logic circuit to 
provide the electrical equivalent of a plurality of series-connected 
diodes. The circuit does not require any additional diodes for regulation 
of the voltage and, hence, does not require any more current drain than is 
already present in the multi-level integrated injection logic circuitry 
which also provides all of the logic functions of the system for display 
by the liquid crystal display. The result is an extremely low power 
consumption by the novel negative temperature coefficient voltage 
regulator circuit.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS OF THE INVENTION 
Referring now to the drawings, an electronic system, such as an electronic 
timepiece, utilizes series-connected, multi-level integrated injection 
logic circuitry for generating logic signals which are displayed by a 
liquid crystal display. The display is comprised of a liquid material 
which does not require ultraviolet filtering, but which, consequently, has 
a negative temperature coefficient. One such material is comprised of 0.4 
cholesteric and is commercially manufactured and sold by Roch Incorporated 
and identified as ROTN 132 material. The use of a stacked multi-level 
logic design for integrated injection logic systems, such as electronic 
watches, is described and claimed in U.S. Pat. No. 4,013,901, issued March 
22, 1977, to Clark R. Williams which patent is assigned to the assignee of 
the present invention and incorporated herein by reference. As described 
in said patent, a plurality of logic levels of integrated injection logic 
circuitry and a current regulator are connected in series between a 
battery power supply. The current regulator is also connected in series 
with an oscillator to regulate the oscillator current supply and thereby 
stabilize the oscillator frequency. This additional feature is described 
and claimed in U.S. Pat. No. 3,965,666, issued June 29, 1976, to Clark R. 
Williams, also assigned to the assignee of the present invention and 
incorporated herein by reference. 
With reference to FIG. 1, two unique features are embodied in the present 
system when compared with the above-referenced circuit described in the 
earlier patents. Namely, current regulator 11 is herein positioned 
selectively between the logic levels thereby providing a regulated 
fractional voltage, namely V.sub.CC /2, without requiring additional 
current-consuming circuitry, and a voltage regulator 10 has been added to 
the system in series with a plurality of the integrated injection logic 
levels to provide a regulated drive voltage for the multiplexed liquid 
crystal display with negative temperature coefficient, the logic levels 
acting as the electrical equivalent of regular diodes without additional 
power consumption. 
Thus, in the present embodiment, four integrated injection logic levels 
(LEV 1-LEV 4) comprise an electronic logic system such as an electronic 
timepiece. Voltage regulator 10 is coupled to the battery voltage supply 
V.sub.BATT and provides the operating voltage V.sub.CC which is supplied 
to the first level LEV 1 of the logic circuit and the drive voltage to the 
LCD display as will later be described in detail. In addition, levels 1 
and 2 appear to voltage regulator 10 as two series-connected diodes, and 
oscillator 12 appears to voltage regulator 10 as another two 
series-connected diodes to provide voltage regulation of the battery power 
supply with a negative temperature coefficient which matches the 
temperature coefficient of the display. More particularly, the 
above-referenced liquid crystal display has a negative temperature 
coefficient of -10 mv/.degree.C. The regulated output voltage of regulator 
10 is about 2.5 V with a temperature coefficient of about -10 
mv/.degree.C. which controls the display driver to approximately track the 
temperature coefficient of the liquid crystal display. The voltage may be 
raised to 3 volts and the temperature coefficient changed to -12 
mv/.degree.C. by adding an additional diode in series with I.sup.2 L LEVEL 
2 or (see FIG. 2) oscillator 12 and the emitter of Q104. 
Voltage regulator 10 and the voltage splitting arrangement provided by 
current regulator 11 embodied in the present electronic system, will now 
be described in further detail with respect to FIG. 2. 
Referring then to FIG. 2, voltage regulator 10 is comprised of a current 
sink provided by transistor I16, transistors Q100-Q104, start-up diodes 
D10 and D11, start-up resistor R33 and capacitors C6 and C7. Current 
regulator 11 is comprised of transistors Q121-Q132, diode D14, capacitor 
C8 and resistors R39-R42. It should be noted that the notations next to 
the transistor collectors of both regulators 10 and 11 (ie, 2x, 3x, 4x, 
etc) indicate the relative collector size. The emitters of transistors 
Q125-Q128 are the input and the collectors thereof are the outputs of 
current regulator 11; the emitter collector voltage (V.sub.EC) of 
transistors Q125 and Q128, which is the same as the base emitter voltage 
(V.sub.BE) of transistor Q104, is equal to the regulated voltage V.sub.CC 
applied to the anode of I.sup.2 L LEVEL 1 minus the voltage drops across 
I.sup.2 L LEVEL 1, I.sup.2 L LEVEL 2 and oscillator 12. Transistor Q104 
monitors this voltage (V.sub.BE) and when its V.sub.BE exceeds about 0.5 
volts, causes pass transistor Q102 to turn off. Transistor Q103 is the 
pre-driver transistor for transistor Q102. The emitter of transistor Q103 
is coupled to the injector of I.sup.2 L LEVEL 2 so that the pre-drive 
current is not wasted. Resistor R33 and diodes D10 and D11 provide 
start-up current into I.sup.2 L LEVEL 1. Once LEVEL 1 starts up, current 
sink I16 causes transistors Q101 and Q100, as previously discussed, to 
turn on, and voltage regulator 10 begins running. Since, as previously 
discussed, I.sup.2 L LEVEL 1 and I.sup.2 L LEVEL 2 of the system are each 
the electrical equivalent of a diode with negative temperature 
coefficient, oscillator 12 of the system is the electrical equivalent of a 
plurality of two series-connected diodes with negative temperature 
coefficient and the base emitter junction of transistor Q104 is the 
equivalent of a diode with negative temperature coefficient, the voltage 
output V.sub.CC from the collector of pass transistor Q102 is regulated by 
transistor Q103 according to the resultant negative temperature 
coefficient of the five equivalent diodes. 
As previously discussed, in order to drive the multiplexed LCD display, 
utilized in conjunction with the system of the present invention, two 
voltages are required: V.sub.CC and V.sub.CC /2. V.sub.CC is provided 
directly from the collector of transistor Q102 of voltage regulator 10 as 
previously described. A regulated voltage equal to V.sub.CC /2 is 
generated in accordance with a novel feature of the present system without 
increased power consumption. This is accomplished by stacking two of the 
I.sup.2 L logic levels (LEVEL 1 and LEVEL 2) above current regulator 11 
and two levels (LEVEL 3 and LEVEL 4) below it. A startup pinch resistor 
comprised of resistors R40 and R41 is required to get current regulator 11 
started when power is initially applied. Once regulator 11 starts, the 
startup resistor (R40 and R41) is shorted to a collector of regulator 
output transistor Q125 by transistor Q132 when saturated. Thus, by adding 
a center-tap to the startup resistor (ie, by providing two resistors R40 
and R41, a voltage equal to V.sub.CC /2 is obtained at the center-tap, 
without adding additional circuit elements which would increase power 
consumption. The V.sub.CC /2 output voltage is buffered by means of buffer 
13. 
Referring to FIG. 3, multiplexed LCD display 18, utilized in accordance 
with an embodiment of the system of the present invention, is illustrated. 
Display 18 includes a plurality of digits, each representing one or more 
alpha-numeric characters. Segment logic signals, A, B, etc, (eg, each 
character may have seven segments with each digit comprised of two 
characters) are simultaneously applied to a respective segment, SEGMENT A, 
SEGMENT B, etc, of each digit of the display by means of a respective 
segment driver, 14, 15, etc. A separate backplane (ie, BACKPLANE 1, 
BACKPLANE 2, etc) is provided for each respective digit (DIGIT 1, DIGIT 2, 
etc). The backplanes of the illustrated two-digit embodiment are driven by 
digit drivers 16 and 17, respectively. The backplanes are driven by means 
of a 32-HZ clock and a 64-HZ enable signal which alternately enables digit 
drivers 16 and 17 by means of NOT gate 19. The resulting backplane drive 
signals which are applied to BACKPLANE 1 and BACKPLANE 2, are graphically 
illustrated as a function of time in FIG. 3. The backplane drive signals 
alternate between V.sub.CC and ground, alternately driving BACKPLANE 1 and 
BACKPLANE 2, thereby generating a visual display according to the selected 
segments forming the characters of DIGIT 1 and DIGIT 2. 
Various embodiments of the present invention have now been described in 
detail. Since it is obvious that many additional changes and modifications 
can be made in the above-described details without departing from the 
nature and spirit of the invention, it is understood that the invention is 
not to be limited to said details except as set forth in the appended 
claims.