Radiofrequency amplifier

An integrated radiofrequency amplifier with an operational frequency includes first and second Doherty amplifiers each having a main device, and a peak device connected at respective inputs and outputs by respective phase shift elements configured to provide a 90 degree phase shift at the operational frequency. An input of the amplifier is connected to the input of the main device of the first Doherty amplifier, an output of the amplifier is connected to the outputs of the peak devices of the first and second Doherty amplifiers and the input of the peak device of the first Doherty amplifier is connected to the input of the main device of the second Doherty amplifier by a phase shift element providing a 90 degree phase shift at the operational frequency.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the priority under 35 U.S.C. §119 of European patent application no. 10252022.8, filed on Nov. 29, 2010, the contents of which are incorporated by reference herein.

The invention relates to high power radiofrequency amplifiers and in particular, although not exclusively, to Doherty amplifier circuits.

Doherty type amplifiers are widely used for power amplifiers in wireless communications due to their higher efficiency when handling variable power levels, which are common in multi-carrier wireless communications systems. Doherty amplifiers comprise a main amplifier and a peak amplifier, the main amplifier handling power levels up to a certain transition point and the peak amplifier adding its power to load at power levels above the transition point until the Doherty amplifier saturation point. Together, the main and peak amplifiers, which typically operate in different classes, can deliver an improved back-off power level efficiency compared with a similarly rated single stage AB- or A-class amplifier.

WO 2008/062371 describes the principles of Doherty amplifiers in further detail, and discloses embodiments in which multiple amplifiers are configured in parallel in order to allow a wider radiofrequency band at high power and to reduce tuning problems.

High power radiofrequency amplifiers, such as Doherty amplifiers as well as single-ended class AB amplifiers, tend to exhibit electrical memory effects which are particularly problematic in high RF power amplifiers at frequencies of 1 GHz and above. These memory effects result from parasitic inductances existing between the power supply and the amplifier's power device and from the speed of variation and magnitude of current consumption by the amplifier, which follows the envelope of the input signal modulation. Such parasitic inductances may exist as part of a power supply network. At higher modulation frequencies larger distortions tend to appear due to such memory effects. Doherty amplifiers tend to exhibit higher memory effects due to operation of the peak amplifier in C-class mode.

A. Khanifar et al., in “Bias Circuit Topologies for Minimization of RF Amplifier Memory Effects”, 33 European Microwave Conference, Munich 2003, pp 1349-1352, discloses a circuit technique for addressing memory effects in RF amplifiers, in which transmission zeros are placed in the bias network transfer function, transmission zeros at the output of the device being formed by utilizing the series resonance properties of decoupling capacitors.

The operational frequency band of single-end class AB amplifiers and Doherty amplifiers is limited by, among other things, the matching networks which may require impedance transformation ratios of between 50 and 100. O. Pitzalis & R. Gilson, in “Broad-Band Microwave Class-C Transistor Amplifiers”, IEEE Transactions on Microwave Theory and Techniques, Vol. MTT-21, No. 11, November 1973, disclose techniques for large-signal transistor characterization and design of broad-band input- and output-matching structures. A high impedance transformation ratio typically required for high power (100 to 300 W) discrete power devices in conventional Doherty amplifiers operating in the GHz region tends to restrict the bandwidth of the amplifier. Also according to Bode-Fano theory:

where ω1, ω2are the lower and upper frequency limits. F is the reflection coefficient and RL, Cdsvalues for an optimal load resistance and parasitic output capacitor (e.g. the drain to source capacitance) of the power device. If the impedance of Cdsat the operational frequency is comparable to RLit can be used as part of lumped element Doherty combiner, as for example proposed in U.S. Pat. No. 7,078,976, resulting in the negative effect of Cdsbeing minimized

A given impedance transformation ratio of two impedances ZLand ZOenabled by a quarter wave length impedance transformer will limit the available bandwidth Δf at a required frequency of operation fcand a reflection coefficient Γm, according to the following relationship:

As an example, if the impedance transformation ratio at an output of a 150 W device is 50, transforming from 1Ω to 50Ω, the output of the device allows for less than 7% of bandwidth at an efficiency loss of 3%.

According to impedance transformation theory, the bandwidth could be improved by introducing an infinite number of transformation steps. However, using more than 3 transformation steps do not bring significant improvements to bandwidth, but make the phase frequency response of the matching network more frequency dependent, further limiting the frequency band within which the load line of the Main device can be effectively modulated by the Peak device.

Conventional Doherty amplifiers having distributed transmission lines for impedance matching require approximately twice as much area when designed for operating at a frequency of 1 GHz than for 2 GHz. This is due to the required physical size of the transmission line becoming larger at lower frequencies. This poses a problem for miniaturisation of radio frequency amplifiers, particularly for mobile telecommunications equipment, which may use the lower part of the RF band from 0.4 to 2.7 GHz. As discussed in U.S. Pat. No. 7,443,264, a quarter wavelength 50Ω microstrip line for 1 GHz on a relatively high permittivity circuit board may occupy an area of around 5 mm×37 mm, which can more than double in size if a lower impedance is required. U.S. Pat. No. 7,443,264 further discloses compact impedance transformation circuits comprising combinations of parallel wire bonds and MOS capacitors.

Conventional Doherty amplifiers made of discrete power devices having a power level above 50 W also tend to have a narrow relative RF bandwidth, typically around 7% for a conventional Doherty amplifier made of two devices each rated at 100 W. The bandwidth may however be even smaller, for example due to the higher required transformation ratio in impedance matching connecting outputs of the Main and Peak devices to a Doherty combiner. High power conventional Doherty amplifiers made of discrete power devices are not therefore able to deliver operational bandwidths of more than 10% for output power levels around 250 W or more. For higher power output levels, the bandwidth available becomes even more limited.

U.S. Pat. No. 7,119,623 discloses output circuits for high power semiconductor amplifier elements, in which inductances and capacitances are configured to compensate for the output capacitance of the semiconductor amplifier element in order to suppress undesired harmonics within the output signal of the amplifier. U.S. Pat. No. 7,078,976 discloses high power Doherty devices having an integrated output Doherty combiner comprising capacitances and inductances configured as artificial transmission lines, the combiner being connected directly to the outputs of the Main and Peak devices and, as a result, allowing a wide frequency band of operation of up to 40% with a compensation LC network. This compensation network at certain LC values can be used also for connecting power supply to devices drain allowing wideband video-decoupling with low electrical memory effects.

An integrated Doherty amplifier in LDMOS technology has been demonstrated at 2 GHz, disclosed for example in WO 2008/062371, showing up to a 20% relative bandwidth. The bandwidth is limited by the input power splitting network. while the output network allows for 30% of bandwidth, further details of which are disclosed for example in U.S. Pat. No. 7,078,976 and by J. Qureshi et al., in “A Wide-Band 20 W LMOS Doherty Power Amplifier”, International Microwave Symposium, May 23-28 2010, Anaheim, Calif.

At 1 GHz, a similar approach would require values of inductances in the range of 7 to 16 nH. Such values are difficult to implement in integrated form, due to the large areas required. An input also tends to result in a limited bandwidth of around 15%,

A high Q-factor of the input impedance of a FET—based RF power amplifier (for example based on LDMOS technology) tends to limit the amplifier's operational bandwidth, according to the Bode-Fano relationship given above. Where a series RC represents the input network equivalent of FET (e.g. LDMOS, MOS, GaAs FET or PHEMT) device:

A typical LDMOS device exhibits a Q-factor of around 6 at 2 GHz and 12 at 1 GHz. As a result, the bandwidth of the input network at 1 GHz is very narrow, as indicated in the table below, while a required bandwidth may be 200 MHz or more.

Operation of the input network of an integrated Doherty amplifier comprising a pair of such devices is also limited to around the same bandwidth, due to the impedance transformation properties of the input power distribution network. The bandwidth may be partially improved by introducing resistive losses at the input of the devices, although this leads to a loss of power gain. Adding a resistive termination to improve the bandwidth may result in a loss of about 5 dB in power for a typical application as outlined above.

The listing or discussion of a prior-published document in this specification should not necessarily be taken as an acknowledgement that the document is part of the state of the art or is common general knowledge.

It is an object of the invention to address one of more of the above mentioned problems.

In accordance with a first aspect of the invention there is provided an integrated radiofrequency amplifier having an operational frequency, the amplifier comprising first and second Doherty amplifiers each comprising a main device and a peak device connected at respective inputs and outputs by respective phase shift elements configured to provide a 90 degree phase shift at the operational frequency,wherein an input of the amplifier is connected to the input of the main device of the first Doherty amplifier, an output of the amplifier is connected to the outputs of the peak devices of the first and second Doherty amplifiers and the input of the peak device of the first Doherty amplifier is connected to the input of the main device of the second Doherty amplifier by a phase shift element configured to provide a 90 degree phase shift at the operational frequency.

The phase shift elements connected to the inputs and outputs of the main and peak devices of the first and second Doherty amplifiers are preferably configured to provide a negative phase shift. The phase shift element connecting the input of the peak device of the first Doherty amplifier with the input of the main device of the second Doherty amplifier is preferably configured to provide a positive phase shift.

This arrangement of the amplifier solves the above mentioned problem of loss of power gain through reusing the power that would otherwise be lost in a resistive termination by redirecting this power to another Doherty amplifier input. The overall gain of the amplifier can thereby be improved.

Each main and peak device of the amplifier may comprise a field effect transistor (FET), a bipolar junction transistor (BJT), a heterojunction bipolar transistor (HBT) or a high electron mobility/heterostructure field effect transistor (HEMT/HFET).

The amplifier can be extended to include one or more further Doherty amplifiers, where each further amplifier circuit has its peak device output connected to the amplifier output and has its main device input connected to the peak device input of a preceding Doherty amplifier via a phase shift element configured to provide the same 90 degree phase shift at the operational frequency, but opposite by sign to that used at input of Doherty between the Main and Peak devices. Adding such further Doherty amplifiers further reuses power that would otherwise be lost, although each additional amplifier will have a diminishing effect on this power loss. As a result, a preferred number of Doherty amplifiers is 2 or 3, and preferably 4 or fewer.

The phase shift elements connecting the main and peak device outputs of each Doherty amplifier may comprise a pair of inductances connected in series to the outputs of the main and peak devices and a capacitance connected between a middle node connecting the pair of inductances and a ground plane connection of the amplifier.

The phase shift elements connecting the main and peak device inputs of each Doherty amplifier may comprise a low-pass filter comprising an inductance. In combination with the gate resistance and capacitance of the main and peak devices, the inductance provides the required 90 degree phase shift at the operational frequency of the amplifier.

The phase shift element connecting the input of the peak device of the first Doherty amplifier with the input of the main device of the second Doherty amplifier may comprise a high-pass filter comprising a pair of inductances connected between a ground plane connection of the amplifier and opposing terminals of a capacitance.

It should be noted that the low-pass filter could be replaced by a high-pass filter and vice versa.

The combination of high-pass and low-pass filter elements, which together act as a chain to direct power among the Doherty amplifiers, allows for a wideband group delay and a reduced loss of input power compared to existing solutions.

A circuit comprising the integrated radiofrequency amplifier may comprise a power supply network, wherein output terminals of the main and peak devices of each Doherty amplifier are connected to the power supply network via a supply line circuit configured to provide a phase shift at an operating frequency of the Doherty amplifier, the supply line circuit preferably comprising a pair of coupled conductors. The conductors may be in the form of magnetically and electrically mutually coupled inductors. Mutual coupling between the conductors is substantially stronger than for example coupling between each conductor and a ground plane. The supply line circuit may alternatively comprise a distributed transmission line having a characteristic impedance or a lumped element equivalent of a distributed transmission line. The supply line circuit preferably provides for a high “even” mode propagation characteristic impedance and a low “odd” mode propagation characteristic impedance.

An advantage of the use of a supply line circuit according to the invention is that of providing a reduced overall supply line inductance and, as a result, a reduced memory effect.

The supply line circuit may comprise a pair of mutually coupled inductances and a capacitance connected between a node connecting the pair of inductances and a ground connection, where the supply line circuit is in the form of a lumped element equivalent of a distributed transmission line. The pair of inductances may be provided as parallel bond wires, or alternatively as a pair of conductors formed on a substrate and separated by a dielectric layer. The pair of conductors and the dielectric layer may in some embodiments be formed as a ring shape on the substrate.

The supply line circuit may alternatively comprise a plurality of mutually coupled pairs of inductances and a capacitance connected between respective pairs of inductances. The pairs of inductances may be provided as a stack of conductors formed on a substrate and separated by dielectric layers.

The supply line circuit may comprise a lumped element equivalent of a quarter wavelength transmission line. Accordingly, the supply line circuit may comprise:

a first parallel pair of magnetically coupled inductors;

a second parallel pair of magnetically coupled inductors in series with the first parallel pair of inductors; and

a capacitance between nodes of each parallel pair of inductors.

The supply line circuit may comprise a pair of wire bonds arranged in parallel and electrically connected in series via a bond pad providing a capacitive connection to ground. The supply line circuit may be connected directly to a drain connection of the main amplifier or the peak amplifier.

Illustrated inFIG. 1is a schematic circuit diagram of an exemplary single end amplifier100. The amplifier100comprises an amplifier device die101having an input connection102and an output impedance matching circuit103connected between the device die101and an output connection104. A power supply105is connected to the output impedance matching circuit103via a supply line106comprising a low pass LC circuit108and a quarter wavelength transmission line109.

Illustrated inFIG. 2is a schematic circuit diagram of an amplifier200comprising a power supply source205connected to an active device die201via a power supply line circuit206. The drain or collector terminal of the active device201is connected to the power supply source205through an integrated supply line206. The supply line206is preferably provided on the same semiconductor die as an integrated Doherty device comprising a pair of such active devices, provided that the supply source205is connected to the reference, or ground, plane at the same point as the common terminal (the source or emitter) of the active device201. The amplifier200comprises an amplifier device die201having an input connection202and an output connection204. The supply line circuit206may be represented by one or more magnetically coupled parallel pairs of inductances L connected in series and with capacitances C between nodes of the inductances. The supply line circuit206is configured to provide a certain electrical length to provide a quarter wavelength phase shift between the amplifier device die201and the output terminal of the power supply source205, at an operational frequency of the amplifier200. The use of the supply line circuit206as compared with the supply line circuit106ofFIG. 1has the advantage of minimal inductive properties and a lower memory effect for the amplifier device die. The supply line circuit206is connected directly to a drain terminal211and a source terminal212of the amplifier device die201.

Illustrated inFIG. 3is a schematic circuit diagram of an exemplary integrated Doherty amplifier device300. The amplifier device300comprises a main amplifier301and a peak amplifier302provided on a single die as part of an integrated circuit package. The outputs303,304of the main and peak devices301,302are connected via a Doherty combiner network305comprising a pair of inductors either side of a capacitive connection to ground. An equivalent circuit of the combiner network305is illustrated in the schematic circuit diagram ofFIG. 4, showing that each LC circuit making up the network305provides a 45 degree phase shift, and therefore together provides a 90 degree (quarter wavelength) shift between the main and peak amplifier outputs303,304.

A power supply307is connected to the output (or drain connection)304and the source connection308of the peak device302via a supply line circuit306. The supply line circuit is similar to the supply line circuit206ofFIG. 2.

As with conventional Doherty amplifiers, the Doherty amplifier300inFIG. 3has a first input311connected to the main amplifier301and a second input312connected to the peak amplifier302. Signals applied to the first and second inputs311,312are phase shifted by 90 degrees relative to each other.

Illustrated inFIG. 5ais a schematic diagram of an exemplary supply line circuit comprising a pair of wire bond connections501,502on a substrate500. A first wire bond connection501is made between a first bond pad503and a second bond pad504. A second wire bond connection502is made between the second bond pad504and a third bond pad505. A capacitive connection506is made between the second bond pad504and a ground connection508. The first and second wire bond connections501,502are electrically connected in series and are physically arranged in parallel by being connected at opposing ends of the second bond pad504. This parallel configuration allows for magnetic coupling507between the wire bond connections501,502.

FIG. 5billustrates in schematic circuit diagram form the supply line circuit ofFIG. 5a, in which the wire bond connections501,502are shown as a pair of coupled inductors and the capacitive connection506is shown as a capacitance to ground connected between the two inductances.

FIG. 5cillustrates an alternative embodiment of a supply line circuit comprising shielded broadside coupled conductor strips510a,510bin place of the coupled bond wires501,502inFIG. 5a. The conductor strips510a,510bare provided on a substrate511and are separated by a dielectric layer512. In the illustrated embodiment, the conductor strips510a,510bare provided in the form of a stack of rings on the substrate511. As with the bond wire embodiment ofFIG. 5a, the conductor strips510a,510bare connected in series, with a capacitive connection512to ground at a point where the strips510a,510bconnect to each other. An advantage of this arrangement is that the conductor strips take up less vertical space on the substrate511than with the bond wire embodiment. Further conductor strips could be added to the embodiment ofFIG. 5cwith a minimal change in the overall space taken up by the supply line circuit by adding more conductor strips to the stack, each additional strip being separated from an underlying strip by a further dielectric layer.

FIG. 6aillustrates in schematic form an exemplary transmission line601for use as a supply line circuit of the integrated Doherty amplifier ofFIG. 3. The transmission line601is connected to a power supply602and provides output connections605,606for being connected to the drain and supply connections of a main or peak amplifier device die of the Doherty amplifier. The transmission line601is in the form of a pair of parallel conductive plates603,604, which are represented in the schematic circuit diagram ofFIG. 6bby pairs of parallel inductors connected in series, with capacitance connections therebetween. The parallel inductances are also shown inFIG. 6bas being magnetically coupled, as with the wire bond connections501,502of the supply line circuit ofFIGS. 5aand5band the conductor strip embodiment ofFIG. 5c.

FIG. 6cillustrates a further exemplary embodiment of a supply transmission line, in which multiple pairs613,614of conductors are arranged in a stack. This arrangement provides for a low equivalent inductance due to a stronger negative magnetic coupling between adjacent conductors of the stack. This reduces the inductive impedance of the transmission line and allows for a faster variation of current to flow through the line between the power supply602and the amplifier device615.

A schematic perspective view of the main components of an exemplary Doherty amplifier700is illustrated inFIG. 7. The Doherty amplifier700comprises a main amplifier device die701and a peak amplifier device die702, implemented as LDMOS integrated circuits. A first input703is connected to the main amplifier701and a second input704is connected to the peak amplifier702. A power supply705, supply line706and output impedance matching circuit elements707are provided on a separate die708. The supply line705is in the form described above in relation toFIGS. 5aand5b.

Wire bond connections709connect the supply line706to the drain connection710of the main amplifier701. Further wire bond connections712connect the drain connection710of the main amplifier701to the drain connection713of the peak amplifier702via a bond pad711on die708providing a capacitive connection to ground. Further multiple wire bond connections714a,714bconnect the drain connection713to an output lead connection716via a further bond pad715providing a capacitive connection to ground.

All components of the Doherty amplifier700are arranged on a common substrate or flange717, which may provide a common ground plane for connections to the various grounded capacitances and the source connections of the main and peak amplifiers701,702.

An integrated Doherty amplifier according to embodiments of the invention comprises multiple Doherty amplifier stages of the kind illustrated inFIG. 7. The input connections of such an integrated Doherty amplifier may be distributed between the various main and peak amplifiers as described in further detail below.

The main and peak devices of the Doherty amplifier circuits may comprise FET, BJT, HBT or HEMT devices.

The power supply source is preferably connected to a reference ground plane, for example provided by the common substrate717, through a transmission line providing that forward and return supply currents are tightly coupled to each other by magnetic coupling.

FIG. 8illustrates an alternative embodiment of a single Doherty amplifier cell configured with wideband input and output networks, for example for use with wide band video applications. The amplifier800is of a similar construction to the embodiment shown inFIG. 7, but with a broad side coupled transmission line806connecting a power supply807to a drain terminal713of the peak device802, instead of the wire bond connections of the embodiment ofFIG. 7. Input bias voltage connections to the main and peak devices are also shown.

Where multiple main and peak device of the types described above are arranged in parallel in a single package, outputs of the peak devices are preferably connected to an output terminal of the package either directly or through a lumped element equivalent of appropriate characteristic impedance, series and shunt components of which may be made up of capacitances and inductances made of bond wire connections.

In embodiments comprising multiple parallel main and peak devices, all the main device and peak device inputs are preferably combined together by two separate cluster combine structures with each pair of main and peak devices connected at two separate input terminals, thereby allowing all of the devices to be provided with a uniform driving signal. The cluster power combiners may be arranged on the same die as the main and peak devices of an integrated Doherty amplifier or may be provided on separate substrates to allow for wideband input impedance transformation.

The power supply line preferably comprises one or more blocks having substantially identical characteristic impedance Zo and configured to provide a phase shift, the blocks being connected in series such that an overall phase shift is equal to 90 degrees at the centre of an operational frequency band of the amplifier. The phase shift provided by the supply line may alternatively be 90(2n+1) degrees, where n is a positive integer. The characteristic impedance of a single block making up the supply line is preferably equal to the optimal load impedance of the main device.

The ground terminal of the power supply source for the integrated Doherty amplifier is preferably connected to a common ground plane through the power supply transmission lines at the same point where the main and peak devices are connected to the common ground plane with their common terminal.

Two alternative input networks for FET/LDMOS Doherty amplifier circuits are illustrated schematically inFIGS. 9aand9b. In each case, the input network provides a 90 degree phase shift between the inputs of the main and peak devices of the amplifier by means of a low-pass phase shift element connected between the main and peak devices. The values of the components Lt, Ct and Rt can be selected according to the required signal amplitude and phase for the operating frequency of the amplifier.

Shown inFIGS. 10aand10bare simulated plots of phase shift between the main and peak devices (FIG. 10a) and peak gate voltage for the main and peak devices (FIG. 10b) for the amplifier circuit ofFIG. 9b. As can be seen inFIG. 10a, the low-pass phase shift element allows for a band width of over 40% (between 1.6 and 2.4 GHz) for a phase shift of 90 degrees+/−20 degrees. The peak gate RF voltages of the main and peak devices each vary by less than 1V over this frequency range.

Illustrated inFIG. 11is a chain of Doherty amplifier circuits having low-pass phase shift elements1101a-cconnected between main and peak devices, with the inputs of the Doherty amplifier circuits being serially connected to each other by high-pass phase shift elements1102a,b. The low-pass phase shift elements1101a-cprovide a −90 degree phase shift, while the high-pass phase shift elements1102a,bprovide a +90 degree phase shift. This combination allows for a wideband group delay with a minimal loss of input power.

FIG. 12illustrates a schematic circuit diagram of an exemplary embodiment of an integrated Doherty amplifier1200comprising two Doherty amplifiers1201a,1201bhaving a common input1202. The common input1202is connected to the input of the main device of the first Doherty amplifier1201a, and is connected to the input of the main device of the second Doherty amplifier1201bvia a low-pass phase shift element1203aof the first amplifier1201aand a high-pass phase shift element1204connecting the inputs of the first and second Doherty amplifiers1201a,b. Outputs of the Doherty amplifiers1201a,bare connected to a common output1205and to a load impedance1206.

FIGS. 13 and 14illustrate plots of simulated power gain (FIG. 13) and power added efficiency (FIG. 14) as a function of output power for an exemplary integrated Doherty amplifier over a 20% bandwidth range. In the results shown, the bandwidth ranges between 1.8 and 2.2 GHz. The power gain remains substantially constant at around 15 dB up to an output power of 40 dBm, while the power added efficiency increases to around 60%

FIG. 15is a schematic circuit diagram of an alternative integrated Doherty amplifier circuit to that shown inFIG. 12, the circuit also comprising first and second Doherty amplifiers having inputs connected by an input phase shift element. In this embodiment, voltage bias input circuits are indicated connected to the peak device inputs of the first and second Doherty amplifiers. Additional capacitors Ct are provided at the peak device inputs of each Doherty amplifier. Additional LC circuits comprising components Ls. Cs are connected between the outputs of the first and second Doherty amplifiers and ground, a mid-point node of each LC circuit connected to a power supply circuit. Gate bias and power supply voltages are connected to active devices of each Doherty amplifier through inductances Lt and Ls respectively.

FIG. 16is a schematic circuit diagram of a further alternative integrated Doherty amplifier circuit comprising first and second Doherty amplifiers having inputs connected by an input phase shift element, where the phase shift elements at the inputs to each of the Doherty amplifiers are provided by wideband couplers in place of the inductances of the circuits ofFIGS. 12 and 15.

FIG. 17is a schematic perspective diagram of a further alternative exemplary Doherty amplifier arranged for wide band operation, in which further post-matching components are provided between the drain terminal of the peak device and the output lead of the amplifier.

Other embodiments are also within the scope of the invention, which is defined by the appended claims.

REFERENCES