Method and apparatus to generate cache data

Briefly, in accordance with an embodiment of the invention, a method to generate cache data is provided, wherein the method includes identifying access data transmitted from a storage device during execution of a predetermined software program and generating cache data using the identified access data.

BACKGROUND

Computing systems may include various types of memory devices having various access times. For example, a computing system may include a nonvolatile hard disk memory and a relatively faster volatile cache memory.

Several methods exist for determining which information to store in the cache memory. A cache memory may store frequently used data so that the operating system or a particular software application may access the frequently used data from the relatively faster cache memory as opposed to accessing the information from the relatively slower hard disk. Storing frequently used data in a relatively faster cache memory may improve system performance.

Determining the appropriate methods for generating cache data for a particular system may be problematic. The appropriate caching method may depend on many factors to improve performance of a particular system.

Thus, there is a continuing need for alternate ways to generate cache data.

It will be appreciated that for simplicity and clarity of illustration, elements illustrated in the figures have not necessarily been drawn to scale. For example, the dimensions of some of the elements are exaggerated relative to other elements for clarity. Further, where considered appropriate, reference numerals have been repeated among the figures to indicate corresponding or analogous elements.

DETAILED DESCRIPTION

In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the claimed subject matter. However, it will be understood by those skilled in the art that the claimed subject matter may be practiced without these specific details. In other instances, well-known methods, procedures, components and circuits have not been described in detail so as not to obscure the claimed subject matter.

Embodiments of the claimed subject matter may include an apparatus for performing the operations herein. This apparatus may be specially constructed for the desired purposes, or it may comprise a general purpose computing device selectively activated or reconfigured by a program stored in the device. Such a program may be stored on a storage medium, such as, but is not limited to, any type of disk including floppy disks, optical disks, CD-ROMs, magnetic-optical disks, read-only memories (ROMs), random access memories (RAMs), electrically programmable read-only memories (EPROMs), electrically erasable and programmable read only memories (EEPROMs), flash memory, magnetic or optical cards, or any other type of media suitable for storing electronic instructions and data.

Embodiments of the claimed subject matter are not described with reference to any particular programming language. It will be appreciated that a variety of programming languages may be used to implement the teachings of the claimed subject matter as described herein. For example, high-level procedural, object-oriented, assembly, or machine programming languages may be used to implement the claimed subject matter.

Turning toFIG. 1, an embodiment of a computing system100is illustrated. Computing system100may be used in a variety of applications such as, for example, a personal digital assistant (PDA), a two-way pager, a cellular phone, a portable computer, a desktop computer, a workstation, or a server. Although it should be pointed out that the scope and application of the claimed subject matter is in no way limited to these examples.

In this embodiment, computing system100may comprise a processor120, an input/output (I/O) device130, and a memory controller140connected to a bus150. In addition, computing system100may include a cache memory160and a storage device170connected to memory controller140.

Although the scope of the claimed subject matter is not limited in this respect, processor120may comprise, for example, one or more microprocessors, digital signal processors, microcontrollers, or the like. I/O device130may be used for receiving data from a user or may be used for transmitting data to a user. I/O device130may comprise, for example, a keyboard, a display, a computer mouse, or a printer, although the scope of the claimed subject matter is not limited in this respect. Bus150may be a data path comprising, for example, a collection of data lines to transmit data from one part of computing system100to another.

In some embodiments, memory controller140together with processor120may control cache memory160and storage device170. For example, memory controller140may control the transfer of data between cache memory160and storage device170. Memory controller140may be integrated (“on-chip”) with processor120. In alternate embodiments, memory controller140may be a discrete memory controller, wherein memory controller140is external (“off-chip”) to processor120. In other embodiments, portions of the functionality of memory controller140may be implemented in processor120as, for example, a software application, module, or routine.

In some embodiments, cache memory160and storage device170may be adapted to store instructions, such as, for example, instructions for an operating system or a software program that may be executed by processor120. In addition, cache memory160and storage device170may also store data that is accessed by these instructions.

Cache memory160may be integrated with storage device170and a reserved portion of a storage device170may be used to implement cache memory160. In alternate embodiments, cache memory160may be a discrete memory device, wherein cache memory160is external to storage device170.

Cache memory160may be a relatively faster memory device compared to storage device170, i.e., the access time of cache memory160may be less than the access time of storage device170. For example, cache memory160may have an access time of less than one millisecond, e.g., approximately one microsecond. Storage device170may have a relatively slower access time, compared to cache memory160, of at least one millisecond, e.g., approximately 10 milliseconds, although the scope of the claimed subject matter is not limited in this respect. As another example, in alternate embodiments, cache memory160may have an access time of less than one microsecond, e.g., approximately 100 nanoseconds. Storage device170may have a relatively slower access time, compared to cache memory160, of at least one microsecond, e.g., approximately 100 microseconds. In yet another example, the access time of cache memory160may be at least two times faster than the access time of storage device170. For example, in some embodiments, cache memory160may have an access time of about one microsecond and storage device170may have an access time of about two microseconds.

Cache memory160may be a relatively smaller memory device compared to storage device170, i.e., the storage capability of cache memory160may be less than the storage capability of storage device170. For example, cache memory160may have a storage capacity of less than 100 megabytes, e.g., approximately 30 megabytes. Storage device170may have a relatively larger storage capacity, compared to cache memory160, of at least 100 megabytes, e.g., approximately one gigabyte, although the scope of the claimed subject matter is not limited in this respect. As another example, in alternate embodiments, cache memory160may have a storage capacity of less than one gigabyte, e.g., approximately 500 megabytes. Storage device170may have a relatively larger storage capacity, compared to cache memory160, of at least one gigabyte, e.g., approximately 100 gigabytes or one terabyte, although the scope of the claimed subject matter is not limited in this respect.

In some embodiments, cache memory160may be a volatile memory such as, for example, a static random access memory (SRAM) or a dynamic random access memory (DRAM), although the scope of the claimed subject matter is not limited in this respect. In alternate embodiments, cache memory160may be a nonvolatile memory such as, for example, an electrically programmable read-only memory (EPROM), an electrically erasable and programmable read only memory (EEPROM), a flash memory (NAND and NOR types, including multiple bits per cell), a ferroelectric random access memory (FRAM), a polymer ferroelectric random access memory (PFRAM), a magnetic random access memory (MRAM), an Ovonics Unified Memory (OUM), a disk memory, or any other device capable of storing software instructions and/or data. Other types of nonvolatile memory are also within the scope of the claimed subject matter, including volatile memory with a battery backup, as the battery may prevent the memory from losing its contents when the main power source is off.

Storage device170may be a volatile memory or a nonvolatile disk memory such as, for example, a floppy disk, an electromechanical hard disk, an optical disk, or a magnetic disk. In alternate embodiments, storage device170may be an EPROM, an EEPROM, a magnetic or optical card, a flash memory, a FRAM, a PFRAM, a MRAM, an OUM, or any other device capable of storing software instructions and data.

In the embodiment illustrated inFIG. 1, cache memory160may operate as a cache or disk cache for storage device170. As illustrated above, cache memory160may be a relatively smaller and faster type of memory device compared to storage device170. As an example, cache memory160may cache frequently accessed data from storage device170during operation of computing system100, although the scope of the claimed subject matter is not limited in this respect. As frequently accessed data is requested from storage device170, it may be available in cache memory160, thereby avoiding a relatively longer search and fetch in storage device170. Therefore, overall system performance may be improved by caching data in cache memory160.

Many types of data and/or instructions may be loaded into cache memory160to increase the performance of computing system100. One method to populate cache memory160may include operating computing system100with random or arbitrary instructions for a given period of time, e.g., one day or one week. During this period of time, cache memory160may be loaded or populated with frequently accessed or most recently accessed data. Accordingly, the processing efficiency of computing system100may be increased since data with a high probability of access by the operating system or a particular software application is located in cache memory160rather than in storage device170.

Processor120and/or memory controller140may include circuitry, software, or a combination of circuitry and software to populate cache memory160with data and/or instructions with a high probability of access by the operating system or a particular software application. As discussed above, cache memory160may be a nonvolatile memory, thereby allowing retention of the cache data during a loss of power.

A manufacturer of computing system100may populate cache memory160during manufacturing and/or initialization of computing system100prior to a user session. The manufacturer may populate a cache memory in a demonstration or test system. The manufacturer may then use the information generated on the test system to populate the cache memory of another system. Accordingly, new systems with populated cache memories may be produced, wherein the performance of the new system may be increased prior to a user session.

Turning toFIG. 2, a method200to generate cache data in accordance with an embodiment of the claimed subject matter is described. This method may be illustrated with reference to computing system100(FIG. 1). In some embodiments, processor120and/or memory controller140may include circuitry, software, or a combination of circuitry and software to implement the method described inFIG. 2. The method illustrated inFIG. 2may be used to preload (e.g., prior to a user session) a memory (e.g., cache memory160) by determining or identifying which information to store or place in the memory. The information placed in the memory may be used for caching.

This embodiment may begin with system initialization (block210). System initialization of computing system100may occur both when the power is first turned on and/or any initialization of the components of computing system100prior to a user session.

Computing system100may be adapted to support many different types of software processes or programs, e.g., a graphic image viewer, a graphic image editor, a word processor, a spreadsheet program, email, an internet browser, publishing software, etc. During the system initialization, a predetermined software process (e.g., a word processor) may be selected and executed by processor120(block220). By selecting a particular, known software application, cache memory160may be systematically loaded with cache data that likely may be accessed during subsequent execution of the software application.

Access to storage device170may be monitored to identify the storage data transmitted from storage device170during execution of the predetermined software process (block230). The storage data accessed during execution of a software process may also be referred to as access data. The identified storage data, i.e., the data identified in block230, may be data that is accessed by the predetermined software process and/or an operating system during execution of the predetermined software process. In some embodiments, the identified storage data may be data files or executable files that may include instructions.

The storage data identified by the monitoring may be used to generate cache data (block240) that may be used to populate cache memory160. The identified storage data may be transmitted from storage device170to cache memory160(block250). In this embodiment, by transferring the identified storage data to cache memory160, the identified storage data serves as cache data for a predetermined software process and may be accessed from cache memory160rather than from storage device170during subsequent execution of the predetermined software process. In alternate embodiments, a portion of the identified storage data may be transmitted to cache memory160to serve as the cache data. In some embodiments, the identified storage data may be generated prior to initialization of cache memory160.

In some embodiments, the identified storage data may be analyzed to determine how much, if any, of the identified storage data may be placed in cache memory160. For example, a targeted level of performance for computing system100may be desired, and a portion of the identified storage data may be placed in cache memory160to achieve this targeted level of performance. In another example, it may be determined that none of the identified storage data is to be placed in cache memory160to achieve a targeted level of performance.

In this embodiment, after the storage data is identified and is transferred to cache memory160, cache memory160is populated with cache data generated using the identified storage data. The system initialization may then be completed (block260) and may be followed by execution of a user session (block270). During operation of computing system100by a user, if the user executes the predetermined software application, the user may observe an increased level of performance compared to operating computing system100without a populated cache memory.

Although the term data is used throughout the description of the various embodiments, it should be noted that the scope of the claimed subject matter is not limited to noninstruction data. The term data may refer to various type of computing information such as, for example, instructions, noninstruction data, files, or software code.

Performance improvements may be realized in other systems by transferring the identified storage data and/or any associated access information to other systems. For example,FIG. 3illustrates an embodiment of another computing system300that has a similar configuration as computing system100ofFIG. 1. Computing system300may be manufactured to include a copy of the identified storage data in storage device370. The copy of the identified storage data may be located at a different physical location in storage device370than the physical location of the identified storage data in storage device170.

Referring again to block230ofFIG. 2, in alternate embodiments, access information that includes the names of the files accessed and the physical location of the files accessed during execution of the predetermined process may be generated after performing the monitoring of access to storage device170. A logical representation of the physical location of the files accessed may be generated so that the access information may be interpreted by another system (e.g., computing system300) having a copy of the identified storage data.

As an example, the physical location of the identified storage data in storage device170may be converted to a logical address. The logical address may also be referred to as a virtual address. After the physical-to-logical conversion, the access information may be transmitted from computing system100to computing system300. Computing system300may process the access information to populate cache360with cache data that may be relevant to the execution of the predetermined process by processor320. For example, computing system300may convert the logical address included in the access information to a physical address of the copy of the identified storage data located in storage device370. After determining the location of the copy of the identified storage data, this copy may be transmitted from storage device370to cache memory360to serve as cache data. Therefore, the performance of computing system300may be increased since data accessed by a predetermined software process may be accessed from cache memory360rather than from storage device370during subsequent execution of the predetermined software process by computing system300.