Storage and control method of the same

There is provided a storage having plural clusters. Each of the clusters includes a cache memory and a save memory. The processor of each of the clusters controls to write plural data pieces into the cache memory, controls to store all the data stored in the cache memory into the save memory upon an occurrence of a failure, and controls to restore some of the data stored in the save memory into the cache memory upon recovery from the failure.

TECHNICAL FIELD

The present invention relates to a storage and a control method of the storage.

BACKGROUND ART

The loss of data stored in a storage will be a major obstacle. For this reason, the storage is designed to copy data that is stored in a volatile cache memory but is not stored in a disk drive or other storage media, to a nonvolatile memory during a power outage or other electrical emergency, and to return the data from the nonvolatile memory to the cache memory after the power is recovered. Such a technique is disclosed, for example, in Patent Literature 1.

CITATION LIST

Patent Literature

Patent Literature 1: Japanese Unexamined Patent Application Publication No. 2008-108026

SUMMARY OF INVENTION

Technical Problem

When the technique disclosed in Patent Literature 1 is used, the data will not be lost even in the case of a power outage or other electrical emergency. However, when the amount of data stored in the cache memory is large, the time for returning the data after power recovery is increased. As a result, it will take time to resume operations using the storage.

Accordingly, an object of the present invention is to reduce the time until the storage is made available in order to implement early resumption of operations using the storage.

Solution to Problem

A typical storage according to the present invention is a storage having plural clusters. Each of the clusters includes a processor, a cache memory, and a save memory. The processor of each of the clusters is designed to control to write plural data pieces into the cache memory, control to store all the data stored in the cache memory into the save memory upon an occurrence of a failure, and control to restore some of the data stored in the save memory upon recovery from the failure.

Further, the present invention can also be viewed as a method for controlling the storage.

Advantageous Effects of Invention

According to the present invention, it is possible to reduce the time until the storage is made available in order to implement early resumption of operations using the storage.

DESCRIPTION OF EMBODIMENTS

Hereinafter a preferred embodiment will be described with reference to the accompanying drawings. Note that in the following description, various types of information is sometimes described using the expression of “xxx table”, but may also be expressed by the data structure except for the table. In order to show that the information is not dependent on the data structure, “xxx table” can be referred to as “xxx information”.

Further, in the following description, the process is sometimes described with a processor (CPU: Central Processing Unit) as the subject. However, the processor may be a controller including a processor. The processor executes a program to perform a predetermined process by using an appropriate memory resource (for example, a memory chip) and/or a communication interface device (for example, a communication port). The process described with the processor as the subject may be a process that a system (for example, a common computer or server) with the particular processor performs. Further, the processor may include a hardware circuit to perform a part or whole of the process that the processor performs, in addition to the execution of the program.

When the system with the processor is referred to as a computer, the program may be installed into the computer by a storage medium that can be read by a program distribution server and the computer. In this case, the program distribution server includes a processor and a memory resource. The memory resource further stores a distribution program and a program to be distributed. Then, the processor of the program distribution server executes the distribution program to distribute the program to be distributed to other computers.

Note that the computer includes an input/output device to perform various settings and the like. Examples of the input/output device include, but not limited to, a display, a keyboard, a pointer device and the like. Further, a serial interface or a network interface may be used as a substitute for the input/output device. More specifically, input and display operations in the input device may be substituted by connecting a display computer provided with a display or a keyboard or a pointer device, and the like, to the particular interface, and by transmitting display information to the display computer and receiving input information from the display computer.

FIG. 1is a view showing the outline of the present embodiment, which shows an example of the process involved in cache memory. A storage100includes a cluster1101and a cluster2102. Each cluster has a volatile cache memory to speed up reading and writing of data. The storage100includes plural storage devices, such as a hard disk drive (HDD) and a solid state drive (SSD), in which plural logical devices (LDEVs) are configured in the plural storage devices. For example, the configuration of LDEV may be such that portions of the areas of the plural storage devices are put together into one area to form a single LDEV, or plural partial areas of one storage device are respectively assigned to different LDEVs.

AAA111and so on are data, in which AAA111, AAA131, and AAA171are data of the same content or same value that correspond to each other, to which different reference signs are assigned due to the difference in the stored memory or device, or due to the difference in the stored time. Further, AAA111and BBA112, and so on, are data that do not correspond to each other. In this case, the content or value of the data may be different or the same. When seen from the host not shown, AAA111, AAA131, and AAA171appear to have the same address, while AAA111and BBA112and so on appear to have different addresses.

The cache memory stores clean data and dirty data. The dirty data is further classified into dirty data under other control and owner-controlled dirty data. The clean data like AAA111is stored in LDEV AA170as AAA171. Thus, if AAA111of the cache memory is lost, the clean data remains as AAA171. On the other hand, the dirty data like BBA112and BBA122and so on is not stored in LDEV AA170and LDEV BB180. Thus, if BBA112or BBA112in the cache memory is lost, the dirty data disappears.

The difference between data under other control and owner-controlled data is the difference between the clusters. The issue of which is data under other control and which is owner-controlled data will be described below. The dirty data BBA112, under other control, of the cluster1101and the owner-controlled dirty data BBA122of the cluster2102have the same content and value, and the data is duplicated. The owner-controlled dirty data AAB113of the cluster1101and the dirty data AAB123, under other control, of the cluster2102have the same content and value, and the data is duplicated.

Cache memories110and120show the state of cache memory upon an occurrence of a failure such as a power outage. Here, in order to prevent the data stored in the volatile cache memories110and120from being lost, the storage100stores AAA111, BBA112, and AAB113, which are stored in the cache memory110, into a nonvolatile save memory130as AAA131, BBA132, and AAB133, by using a power source such as a battery. Then, the storage100stores BBB121, BBA122, and AAB123, which are stored in the cache memory120, into a nonvolatile save memory140as AAA141, BBA142, and AAB143.

Upon recovery from the failure such as the power outage, the storage100restores the data from the save memories130and140into the cache memories to make the storage100available. Cache memories150and160show the state of cache memory at this time. In other words, the storage100restores the owner-controlled dirty data AAB133, which is stored in the save memory130, as AAB153of the cache memory150. Further, the storage100restores the owner-controlled dirty data BBA142, which is stored in the save memory140, as BBA162of the cache memory160. Then, AAA171of the LDEV AA170, BBA162of the cache memory160, AAB153of the cache memory150, and BBB181of the LDEV BB180after recovery, are capable of substituting for AAA111, BBAs112and122, AABs113and123, and BBB121of the cache memories110and120during the failure.

Note that the cache memory110and the cache memory150may physically be the same memory elements or may physically be different memory elements. Further, the cache memory120and the cache memory160may physically be the same memory elements or may physically be different memory elements. In any case, it is enough that they can be used as cache memory. Further, the other data of the save memories130and140, for example, AAA131and so on are not restored. In this way, it is possible to reduce the time until the storage100is made available after recovery from the failure.

Further details of the present embodiment will be described below.FIG. 2is a view of an example of the hardware configuration of the storage100. The cluster1101and cluster2102of the storage100have the same configuration and thus are described as a whole. Further, the number of components may be one or plural. Front end adapters (FEAs)211and221are adapters for connecting the storage100and the host. The FEA211or221receives read request and write data from the host, and transmits the read data to the host. The FEA211or221may be an adopter such as a fiber channel. The FEA211or221communicates with other components in the storage100through a switch (SW)213or223.

A microprocessor (MP)212or222is a processor that operates according to a program stored in the memory, not shown, and is operable to determine information obtained through the SW213or223according to the program and to instruct other components to perform operations through the SW213or223. The MP212or222may interpret the request received from the host by FEA211or221and give instructions to other components. Further, the MP212or222may detect a failure occurring in the storage100and execute the program based on the content of the detected failure. Further, the MP212or222may indicate which data is written into which of the two cache memories, either214or224, by the FEA211or222. The SW213or223is a circuit for relaying communication between the components, which may be a bus of the computer or a substitute for the bus.

The cache memory214or224is the memory for temporarily storing data to speed up wiring data through the FEA211or221. The cache memories214and224are fast access volatile memories. The cache memory214corresponds to the cache memory110or150shown inFIG. 1, and the cache memory224corresponds to the cache memory120or160shown inFIG. 1. The save memory215or225is used in such a way that, according to the instruction of the MP212or222, the data stored in the cache memory214or224is copied and stored in the save memory215or225, and then the data stored in the save memory215or225is copied and restored to the cache memory214or224. The save memories215and225are nonvolatile memories. Thus, the save memories215and225may include a circuit to transfer data between the cache memories214,224and the save memories215,225. The save memory215corresponds to the save memory130shown inFIG. 1, and the save memory225corresponds to the save memory140shown inFIG. 1. The save memories215and225may be, for example, SSD or flash memory, or a memory with a dedicated battery that can be driven for a long time.

Back end adapters (BEAs)216and226are adapters for connecting to the storage device that actually stores data in the storage100. The BEA216or226writes data into the storage device based on the instruction and data that are received through the SW213or223. Further, the BEA216or226reads data from the storage device and transmits the data to the SW213or223based on the instruction received through the SW213or223. The BEAs216and226may be, for example, adopters such as serial attached SCAI (SAS).

Physical devices (PDEVs)231and232are physical storage devices such as HDD or SDD. The PDEV231or232has plural ports, which is connected to the BEA216or BEA226and can be accessed from both the cluster1101and the cluster2102. It is possible to configure LDEV to the PDEVs231and232so that the plural PDEVs are arranged into redundant arrays of inexpensive disks (RAID).

The storage100has a power source not shown. There are two types of power source: commercial power source and battery. The battery automatically supplies power when the supply of the commercial power source is stopped. The battery allows the storage100to be able to operate for a predetermined time according to the capacity and operation content of the battery.

FIG. 3is a view of an example of operation without a failure, showing the types of the data of the cache memories110and120, in which the same reference numerals are used to designate the same components as those described above. The FEA221has two ports301and302. The ports301and302are, for example, fiber channel ports. The FEA221transfers the write data received by the port301to the cache memories110and120, respectively, as the dirty data BBA112under other control and the owner-controlled dirty data BBA122as shown by arrows303. On the other hand, the FEA221transfers the write data received by the port302to the cache memories110and120, respectively, as the owner-controlled dirty data AAB113and the dirty data AAB123under other control as shown by arrows304.

In this example, the data transmitted and received by the port301is the owner-controlled data of the cluster2102, and the data transmitted and received by the port302is the owner-controlled data of the cluster101. For example, when the correspondence between each port and each LDEV of the storage100is configured in advance, it is possible to determine the cluster to be set as the owner-controlled data transmitted and received by each port is stored with respect to each port. Further, althoughFIG. 3shows an example of the ports301and302of the FEA221, the ports of the FEA211may also be used. In this case, it is possible to determine the cluster to be set as the owner-controlled data with respect to each port of the EFA211.

If plural MPs control the reading and writing of one LDEV, there is a possibility that reading and wiring may collide with one another. Thus, one MP is set to one LDEV as the owner to control the writing and reading of the particular LDEV. With respect to the setting of the owner, the data to be read and written under the control of the MP212including the MP305of the cluster1101may be set as the owner-controlled data of the cluster1101, and the data to be read and written under the control of the MP222including the MP306of the cluster2102may be set as the owner-controlled data of the cluster2102. The cache memories110and120shown inFIG. 3are in the state before the failure, but immediately before the failure shown inFIG. 1and thus store the same data at the time of the failure. For this reason, the owner-controlled dirty data AAB113is not written into the LDEV AA170yet. Thus, AAB309is not present and is shown by the dashed line inFIG. 3.

However, if the failure does not occur, AAB113is written into the LDEV AA170as AAB309as shown by an arrow307at any timing. Thus, a particular MP305that controls this wiring is determined in the plural MPs212. In other words, the MP305is set as the owner of the LDEV AA170to control the writing of the whole LDEV AA170. When the MP305is set as described above, AAB113is in the same cluster1101as of the MP305and can be set as the owner-controlled data of the cluster1101. On the other hand, the MP306writes BBA122into the LDEV BB180as BBA310in the cluster2102as shown by an arrow308. Thus, BBA122is in the same cluster2102of the MP306and can be set as the owner-controlled data of the cluster2102. Note that the process of writing the data from the cache memories to the LDEVs as shown by the arrows307and308is called destage.

Further, the cluster in which the data is stored as the owner-controlled data with respect to the each port of the EFA, as well as the cluster in which the data is stored as the owner-controlled data according to the owner of the MP may be selected from the two clusters. Note that all the data of the cache memories110and120is received by one of the ports of the FEA211and221and are temporarily stored in the cache memories110and120, so that data stored in the cache memory110or120is written into the LDEV AA170or the LDEV BB180by the MP305or306. Thus, all the data of the cache memories110and120is to be converted to the owner-controlled dirty data of the cluster1101or the owner-controlled dirty data of the cluster2102at the time of writing the cache memory110or120. Then, although dirty data is converted to clean data when the data is written into LDEV, all the dirty data is owner-controlled dirty data of the cluster1101or the cluster2102.

FIG. 4is a view of an example of a failure process flow chart. This example is a flow chart of the program of MP, which is executed by the plural MPs212and222by using power of the battery upon detection of a failure such as a power outage. The failure may be detected by the MP212or222, or may be detected in other circuit and notified to the MP212or222from the detected circuit. Here, there is no need for the plural MPs212and222to perform the same steps at the same time. Thus, in the following description, the MPs212and222will be referred to as MP representing any one of the MPs212and222.FIG. 6is a view of an example of the data for the failure process and the recovery process. It is shown the data of the cluster1101as a typical example, but the data of the other cluster has the same structure. Each of the steps shown inFIG. 4will be described in association with the data shown inFIG. 5.

In Step401, the MP generates a management table. The management table is the information for managing the data to be stored in the save memory130. In this example, it is assumed that the owner-controlled dirty data AAB113is stored in the cache memory110at the address 0x06AAA (0x represents a hexadecimal number) and will be stored in the save memory130at the address 0x03AAA as AAB133. Further, it is assumed that the dirty data BBA112under other control is stored in the cache memory110at the address 0x05BBA and will be stored in the save memory130at the address 0x02BBA as BBA132. Then, it is assumed that the clean data AAA111is stored in the cache memory110at the address 0x04AAB and will be stored in the save memory130at the address 0x01AAB as AAA131.

As described above, the MP generates a management table in which an address632within the save memory is associated with an address633within the cache memory with respect to each data piece, added with information on owner-controlled data or data under other control or clean data as a flag634. Note that when the save memory130is SSD and the like, the address632of the save memory may be the logical block address (LBA) of the SSD. Further, the information of the data size of AAA111and so on may also bP included in the management table, or the information may not be included in the management table under the assumption that the data size is constant.

In Step402, the MP stores shared information611within the cache memory110into the save memory130as shared information631. The shared information611is the configuration information of the storage100and the like, which includes, for example, the relationship between port and LDEV, the information on which MP is the owner of the LDEV, and the like. In addition, when the content of the failure detected in the failure detection can be recorded in the shared information611, the failure information may be included in the shared information611. In Step403, the MP stores the management table into the save memory130. In Step404, the MP stores the owner-controlled dirty data into the save memory130based on the management table generated in Step401. Further, in Step405, the MP stores the dirty data under other control into the save memory130based on the management table. In Step406, the MP stores the clean data into the save memory130based on the management table, and then ends the process.

FIG. 5is a view of an example of a recovery process flow chart. Also this example is a flow chart of the program of the MP, which is executed by each of the plural MPs212and222upon restart from a failure such as a power outage. Here, it is assumed that at least the power outage recovered and that the power supply from the commercial power source is resumed. In Step501, the MP restores the shared information631of the save memory130into the cache memory150as shared information651.

In Step502, the MP restores the owner-controlled dirty data based on the management table. In other words, the MP reads AAB113from the address 0x03AAA of the address632of the save memory in which the owner-controlled dirty data is entered in the flag634. Then, the MP writes the read data into the address 0x06AAA of the address633of the cache memory as AAB153. In Step503, the MP checks if there is closure in the other cluster (the other cluster is blocked), for example, in the cluster2102. The MP may communicate with the other MP to check the presence or absence of closure, or may refer to the failure information when the failure information is included in the shared information631.

In Step504, if it is determined that there is no closure in the other cluster, namely, if it is determined that all the clusters are normal, the MP proceeds to Step507. Then, the MP destages the restored owner-controlled dirty data AAB153to the LDEV AA170. Because of this process, AAB309can actually be present, and thus AAB113and AAB153are converted to clean data. As a result, the fault tolerance can be ensured. Then, the operation can be resumed at this time. As for the resumption of the operation, the operation process may be resumed in the host, not shown, which is provided separately from the storage100, or the storage100may reject communication with the host through FEA until Step507and enable communication with the host through the FEA in Step507.

Note that each MP performs the same procedure also in the other cluster. For example, in the cluster2102, the owner-controlled dirty data BBA122is restored to the cache memory and is destaged to the LDEV BB180. Thus, it is also possible to resume the operation at the time of completion of Step507in all the clusters.

In Step504, if it is determined that there is closure in the other cluster, the MP proceeds to Step505. Then, the MP restores the dirty data under other control based on the management table. In other words, as shown inFIG. 7, the MP reads BBA132from the address 0x02BBA of the address633of the save memory in which the dirty data under other control is entered in the flag634. Then, the MP writes the read data into the address 0x05BBA of the address633of the cache memory as BBA152. Then, in Step506, the MP changes the dirty data BBA152under other control to the owner-controlled dirty data. At this time, the MP may be the owner of both LDEV AA170and LDEV BB180by changing the content of the shared information651.

In Step507, the MP destages the restored owner-controlled dirty data to LDEV AA170and LDEV BB180. As shown inFIG. 2, the PDEVs231and232are connected to the cluster1101and the cluster2102in such a way that they can physically be accessed from both of the clusters. Thus, the MPs212and305can physically be accessed to the LDEV BB180. In this way, both AAB309and BBA310can actually be present. Then, AABs113and153as well as BBAs112and152are changed to clean data. Then, the operation can be resumed at this time.

Note that when the storage100has three or more clusters of which two or more clusters are not closed, one of the clusters not closed restores the owner-controlled dirty data of the closed cluster. There is no need to restore the owner-controlled dirty data of the other cluster that is not closed. Further, the data to be restored may be distributed in plural clusters not closed. In order to achieve this, the management table may include the information of the cluster to which the owner-controlled dirty data belongs.

In Step502, the MP may restore the clean data.FIG. 8is a view of an example of the data when the MP restores the clean data in Step502and when the MP determines that there is no closure in the other cluster in Step504. In Step502, the MP reads AAA131from the address 0x01AAB of the address632of the save memory in which clean data is entered in the flag634, and writes into the address 0x04AAB of the address633of the cache memory as AAA151. The clean data AAA151has been stored in the LDEV AA170, so that there is no need to destage the data in Step507.

FIG. 9is a view showing an example when the MP restores the clean data in Step502and the MP determines that there is closure in the other cluster in Step504. The restored data within the cache memory150is the same as the data within the cache memory110upon an occurrence of the failure. In this way, by also listing the clean data in the cache memory, it is possible to reduce the time for reading data, for example, AAA151from the host.

As described above, by limiting the data to be restored from the cache memory upon recovery from a failure in each of the plural clusters, it is possible to reduce the time for restoring data from the cache memory and to implement early resumption of the operation. Further, when there is a fault in the cluster, other cluster is also operable to restore the data of the faulty cluster in order to ensure the fault tolerance.

LIST OF REFERENCE SIGNS