Power module package and method for manufacturing the same

Disclosed relates to a power module package and a method for manufacturing the same. The power module package includes a lower substrate on which a pattern is formed, a power semiconductor element and a ribbon which are separated apart from each other at a predetermined distance to be mounted on an upper surface of the lower substrate, a first spacer attached to an upper portion of the power semiconductor element via a first adhesive layer, a second spacer attached to an upper portion of the ribbon via a second adhesive layer, and an upper substrate attached to an upper portion of each of the first and second spacers via a third adhesive layer.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority to and the benefit of Korean Patent Application No. 10-2015-0173010, filed on Dec. 7, 2015, the disclosure of which is incorporated herein by reference in its entirety.

BACKGROUND

The present disclosure relates to a power module package and a method for manufacturing the same.

2. Discussion of Related Technology

A power module package means a power semiconductor product in which one or more switching elements including an insulated-gate bipolar transistor (IGBT), a diode, a metal oxide semiconductor field effect transistor (MOSFET), a thyristor, and the like are integrated on one base plate.

Generally, since power switching elements generate much heat upon operating, it is important for the power module package to select a material having a superior heat dissipation property, and also the power module package is designed in a packaging structure having superior thermal conductivity and thermal diffusion.

SUMMARY

An aspect of the present invention provides a power module package capable of maintaining a constant thickness of a package, preventing degradation of quality and a product lifespan, and promoting process stabilization and productivity improvement, and a method for manufacturing the same.

In accordance of one aspect of the present invention, a power module package includes a lower substrate on which a pattern is formed, a power semiconductor element and a ribbon which are separated apart from each other at a predetermined distance to be mounted on an upper surface of the lower substrate, a first spacer attached to an upper portion of the power semiconductor element via a first adhesive layer, a second spacer attached to an upper portion of the ribbon via a second adhesive layer, and an upper substrate attached to an upper portion of each of the first and second spacers via a third adhesive layer.

A lower surface of the second spacer may be in contact with an upper surface of the ribbon such that the second spacer may be supported by the ribbon.

The first adhesive layer may be formed at the upper portion of the power semiconductor element, and the second adhesive layer may be formed to cover the ribbon.

The power semiconductor element may be mounted on the lower substrate through soldering, and the ribbon may be mounted on the lower substrate through bonding.

In accordance with another aspect of the present invention, a method for manufacturing a power module package includes mounting a power semiconductor element and a ribbon on a lower substrate, applying a first adhesive layer on an upper surface of the power semiconductor element and a second adhesive layer to surround the ribbon, mounting a first spacer on the first adhesive layer and a second spacer on the second adhesive layer, and attaching an upper substrate to the lower substrate using a third adhesive layer.

The method may further include mounting first and second lead frames on the lower substrate, and connecting electrically the first lead frame to the power semiconductor element using a wire, wherein the mounting and the connecting may be performed between the mounting of the power semiconductor element and the ribbon on the lower substrate and the applying of the first adhesive layer on the upper surface of the power semiconductor element and the second adhesive layer to surround the ribbon.

The mounting of the power semiconductor element and the ribbon may mount the ribbon after mounting the power semiconductor element.

The mounting of the power semiconductor element and the ribbon may mount the power semiconductor element after mounting the ribbon.

The mounting of the power semiconductor element and the ribbon may mount the power semiconductor element on the lower substrate using soldering, and the ribbon on the lower substrate using bonding.

The mounting of the ribbon in the mounting of the power semiconductor element and the ribbon may be performed by bonding the ribbon to the lower substrate and compressing the bonded ribbon.

The mounting of the second spacer on the second adhesive layer may contact a lower surface of the second spacer to an upper surface of the ribbon to support the second spacer by the ribbon.

In the related art, a problem of thickness non-uniformity occurs in a power module package according to a process condition, but thickness non-uniformity of a power module package according to embodiments of the present invention may be addressed by varying a degree of compressing a ribbon depending on a process condition, for example, a thickness of the power module package.

Therefore, the thickness of the power module package may be constantly maintained, such that degradation of quality and a product lifespan caused by a non-uniform thickness may be prevented, and process stabilization and productivity improvement may be promoted.

DETAILED DESCRIPTION OF EMBODIMENTS

Advantages, features, and implementations thereof will be apparent from the following detailed description and the accompanying drawings. The present invention, however, is not limited to embodiments to be disclosed herein and numerous other modifications can be implemented. Although the embodiments will be described with reference to a number of illustrative embodiments thereof, it should be understood that numerous other modifications and embodiments can be devised by those skilled in the art that will fall within the spirit and scope of the principles of this disclosure. The scope of the present invention should be construed by the appended claims, along with the full range of equivalents to which such claims are entitled. In giving reference numerals to components throughout the disclosure, the same reference numerals are given to the same components.

Also, in the following description, if a detailed description of known functions and configurations is determined to obscure the interpretation of embodiments of the present invention, the detailed description thereof will be omitted. And, all terms used hereinafter are selected by considering functions in embodiments, and meanings thereof may be different according to a user, the intent of an operator, or custom. Therefore, the meanings of the terms used herein should follow contexts disclosed herein.

A power module package for a vehicle, for example, an electric vehicle or hybrid vehicle, includes one or more power switching elements. Since the power switching elements generate much heat upon operating, it is important for a power module package to select a material having a superior heat dissipation property, and also the power module package is designed in a packaging structure having superior thermal conductivity and thermal diffusion because the power switching elements may be arranged in parallel with each other in a vertical direction.

Therefore, a copper plate or a direct bonded copper (DBC) type substrate, which has a superior thermal property, is employed in the power module package, and a heat pipe or a heat spreader for reducing heat of a high temperature generated in the power module package is mounted on a rear surface of the copper plater or the direct bonded copper substrate.

Although such a substrate having a superior thermal property is employed in the power module package, because securing thermal reliability of the power module package is a most prominent difficulty as a need for electricity power characteristics is increased, techniques for dissipating heat more efficiently are needed.

In order to address the above, a power module package may include a structure in which two DBC substrates are attached to each other in a symmetrical structure centering on a semiconductor chip.

FIG. 1is a cross-sectional view illustrating a configuration of a typical power module package.

According to a configuration of a power module package100shown inFIG. 1, a lower substrate110and an upper substrate120are disposed in a symmetrical structure centering on a power semiconductor element130.

At this point, the lower substrate110may be made of a structure in which copper layers112and113are formed on upper and lower portions of a ceramic base material111, and the upper substrate120may be made of a structure in which copper layers122and123are formed on upper and lower portions of a ceramic base material121.

Meanwhile, the power semiconductor element130is attached to the lower substrate110through a solder170, a pattern115is formed on the lower substrate110, and the power semiconductor element130is connected to the pattern115through a wire W.

And, lead frames140and145for an electrical connection with the external side are provided, and the first lead frame140is attached to the pattern115through a solder161and the second lead frame145is attached to the lower substrate110through a solder162.

In addition, spacers150and155for maintaining a space between the lower substrate110and the upper substrate120are provided therebetween.

At this point, the first spacer150is attached between the power semiconductor element130and the upper substrate120through solders163and164, and the second spacer155is attached between the lower substrate110and the upper substrate120through solders165and166.

Finally, the power module package100configured as described above is completed by using the molding material170to expose some portions of the first and second lead frames140and145and to surround and cover the remaining portions thereof.

In the power module package100configured as shown inFIG. 1, if an attachment thickness T1of the power semiconductor element130and the first spacer150, and an attachment thickness T2of the lower substrate110and the upper substrate120are not identical to each other, degradation of quality and a product lifespan may occur due to generation of voids.

Hereinafter, a power module package and a method for manufacturing the same according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 2is a cross-sectional view illustrating a configuration of the power module package according to the embodiment of the present invention.

By taking a close look at a structure of a power module package200according to the embodiment of the present invention with reference toFIG. 2, a power semiconductor element230is disposed between first and second substrates210and220which are separated apart from each other at a predetermined distance. In embodiments, the first and second substrates210and220are disposed in a symmetrical structure centering on the power semiconductor element230.

Here, the first and second substrates210and220may be a DBC substrate, but they are not limited thereto, and may be a metal substrate having an anode oxide layer, a printed circuit board, and a ceramic substrate.

Hereinafter, the first substrate210is denoted as a lower substrate and the second substrate220is denoted as an upper substrate, and the first and second substrates210and220are assumed to be a DBC substrate.

The lower substrate210may be made of a structure in which copper layers212and213are formed on upper and lower portions of a ceramic base material211which is formed of a material including an alumina (Al2O3), an aluminum nitride (AlN), a beryllium oxide (BeO), and the like which are an insulation base.

Similarly, the upper substrate220may be made of a structure in which copper layers222and223are formed on upper and lower portions of a ceramic base material221which is formed of a material including an alumina (Al2O3), an aluminum nitride (AlN), a beryllium oxide (BeO), and the like which are an insulation base.

However, in the lower substrate210, the upper copper layer212is patterned so as to form an electrical circuit through a printed circuit board technology, thereby including a circuit pattern, whereas the lower copper layer213does not include a circuit pattern. And in the upper substrate220, the upper and lower copper layers222and223have a structure with no circuit pattern.

Meanwhile, the power semiconductor element230may include a silicon controlled rectifier (SCR), a power transistor, an IGBT, a MOS transistor, a power rectifier, a power regulator, an inverter, a converter, a diode, or a combination thereof including a high power semiconductor chip, but it is not limited thereto. The power semiconductor element230may be one known in the related art.

At this point, the power semiconductor element230is attached to the upper copper layer212of the lower substrate210through an adhesive layer260, and is connected to a pattern215through a wire W.

Meanwhile, lead frames240and245for an electrical connection with the external side are disposed at an upper portion of the lower substrate210, and the first lead frame240is attached to the pattern215of the lower substrate210through an adhesive layer261and the second lead frame245is attached to the upper copper layer212of the lower substrate210through an adhesive layer262.

And, spacers250and255for a space between the lower substrate210and the upper substrate220are disposed therebetween.

At this point, the first spacer250is attached between the upper substrate220and the power semiconductor element230through adhesive layers263and264, and the second spacer255is attached between the lower substrate210and the upper substrate220through adhesive layers265and266.

In embodiments, the first spacer250is attached to a lower surface of the lower copper layer223of the upper substrate220through the adhesive layer263disposed at an upper surface of the first spacer250, and to an upper surface of the power semiconductor element230through the adhesive layer264disposed at a lower surface of the first spacer250.

In addition, the second spacer255is attached to the lower surface of the lower copper layer223of the upper substrate220through the adhesive layer265disposed at an upper surface of the second spacer255, and to an upper surface of the upper copper layer212of the lower substrate210through the adhesive layer266disposed at a lower surface of the second spacer255.

Therefore, the upper substrate220is attached to the first and second spacers250and255via the adhesive layers263and265.

The adhesive layers260,261,262,263,264,265, and266may be made of a solder type adhesive material, but they are not limited thereto, and all adhesive materials, for example, conductive/non-conductive epoxy and the like, known in the related art may be used.

Finally, the power module package200configured as described above is completed by using a molding material270to expose some portions of the first and second lead frames240and245and to surround and cover the remaining portions thereof.

In addition, according to the embodiment of the present invention, the power module package200further includes a ribbon280, and the ribbon280is disposed on an upper surface of the lower substrate210, particularly, on the upper copper layer212of the lower substrate210, and spaced apart from the power semiconductor element230at a predetermined distance, so as to correspond to the second spacer255.

Therefore, since the adhesive layer266, which is disposed on the lower surface of the second spacer255in order for attachment of the second spacer255, is disposed to correspond to the ribbon280, the adhesive layer266is provided in the form of a shape surrounding the ribbon280.

In particular, an upper surface of the ribbon280is in contact with the lower surface of the second spacer255to form a shape in which the second spacer255is supported by the ribbon280. At this point, after being bonded to the lower substrate210, the ribbon280may be compressed to be mounted thereon.

As a result, a total thickness of the ribbon280and the second spacer255may be constantly maintained with no variation regardless of outside conditions, and may be merely varied according to a degree of compression with respect to the ribbon280.

Meanwhile, a difference generation between the thicknesses T1and T2is caused by a non-uniform thickness of the power semiconductor element130shown inFIG. 1due to a process error, but a thickness non-uniformity generated between thicknesses T3and T4may be addressed by varying a degree of compression with respect to the ribbon280according to a thickness variation of the power semiconductor element230in embodiments of the present invention shown inFIG. 2.

Further, as shown inFIG. 1, a total thickness of the solder166and the second spacer155is non-uniform due to a thickness variation of the solder166, but the second spacer255is supported by the ribbon280in embodiments of the present invention as shown inFIG. 2such that the total thickness of the ribbon280and the second spacer255is uniformly maintained without influence of the adhesive layer266.

Heretofore, the configuration of the power module package according to the embodiment of the present invention has been described. Hereinafter, a method for manufacturing the power module package according to the embodiment of the present invention will be described with reference to the accompanying drawings.

FIGS. 3A to 3Eare views illustrating a manufacturing process of the power module package according to the embodiment of the present invention.

With reference toFIGS. 3A to 3E, the power semiconductor element230and the ribbon280are firstly mounted on the lower substrate210(FIG. 3A). At this point, the ribbon280may be mounted after the power semiconductor element230has been mounted, whereas, selectively, the power semiconductor element230may be mounted after the ribbon280has been mounted.

At this point, the power semiconductor element230may be mounted on the upper surface of the lower substrate210through soldering using the adhesive layer260, and the ribbon280may be mounted on the upper surface of the lower substrate210through bonding.

In particular, the mounting of the ribbon280may be performed by bonding the ribbon280to a position at which the second spacer255is to be mounted and compressing the bonded ribbon280.

At this point, a degree of compression with respect to the ribbon280may be varied, and may be determined according to a process condition, for example, a thickness of the power semiconductor element230.

Thereafter, mounting of the lead frames240and245and bonding of the wire W are performed (FIG. 3B). At this point, the lead frames240and245are mounted on the upper surface of the lower substrate210through the adhesive layers261and262, and in particular, the first lead frame140is mounted at the pattern215of the lower substrate210.

And, the wire W is bonded to connect the power semiconductor element230to the pattern215. In embodiments, one end of the wire W is bonded to the power semiconductor element230, whereas the other end thereof is bonded to the pattern215.

And then, mounting of the spacers250and255is performed (FIG. 3C). At this point, the first spacer250is mounted on the upper surface of the power semiconductor element230through the adhesive layer264, and the second spacer255is mounted at an upper portion of the ribbon280through the adhesive layer266.

Particularly, in the mounting of the second spacer255, the lower surface of the second spacer255is mounted so as to be in contact with the upper surface of the ribbon280such that the second spacer255is supported by the ribbon280.

Therefore, the mounting of the spacers250and255is performed by applying the adhesive layer264on the upper surface of the power semiconductor element230, applying the adhesive layer266on the lower substrate210so as to surround the ribbon280, and then disposing the spacers250and255on the adhesive layers264and266.

And then, the upper substrate220is attached to the lower substrate210(FIG. 3D), some portions of the first and second lead frames240and245are exposed using the molding material270, and the remaining portions thereof are molded to be surrounded, such that the power module package200is manufactured.

Meanwhile, in order to attach the upper substrate220to the lower substrate210, the adhesive layers263and265are applied at positions of the upper substrate220corresponding to the spacers250and255, and the upper substrate220and the lower substrate210are attached to each other in a state in which the adhesive layers263and265have been attached to the spacers250and255.

Although the power module package and the method for manufacturing the same according to embodiments of the present invention have been shown and described with reference to embodiments, the scope of the present invention is not limited to particular embodiments, and it would be appreciated by those skilled in the art that alternatives, changes, and modifications may be made in these embodiments without departing from the spirit and scope of the principles of this disclosure.

The embodiments and the accompanying drawings disclosed herein, therefore, are not to be taken in a sense for limiting the technical concept of the present invention but for explanation thereof, and the range of the technical concept is not limited to these embodiments and the accompanying drawings. The scope of the present invention should be construed by the appended claims, along with the full range of equivalents to which such claims are entitled.