Downconverter, downconverter IC, and method for controlling the downconverter

A downconverter capable of being normally operated even in the case where a universal dual downconverter is made up by use of multiple downconverter circuits. The downconverter includes first and second downconverter circuits, and an amplification unit having at least a first amplifier LNA for receiving a horizontally polarized wave signal, and a second amplifier LNA for receiving a vertically polarized wave signal. If a Tone/Pola signal is a signal indicating a power-saving mode, a control circuit of the first downconverter circuit causes both a local oscillator and a frequency converter to be in a non-operating state, controlling a bias circuit such that power is supplied to the first amplifier LNA.

CROSS-REFERENCE TO RELATED APPLICATIONS

The disclosure of Japanese Patent Application No. 2011-109529 filed on May 16, 2011 including the specification, drawings, and abstract is incorporated herein by reference in its entirety.

BACKGROUND

The present invention relates to a downconverter, a downconverter IC, and a method for controlling the downconverter, and in particular, to a downconverter for down-converting a polarized wave signal as received, a downconverter IC, and a method for controlling the downconverter.

For converting the frequency of a satellite wave as received into an intermediate frequency (hereinafter referred to also as an IF frequency) that is transmittable via a cable, use is being made of a low noise block downconverter (LNB downconverter: Low Noise Block downconverter).

FIG. 14is a block diagram for describing a satellite reception converter (downconverter) disclosed in Patent Document 1. With the satellite reception converter shown inFIG. 14, a BS signal of a horizontally polarized wave or a vertically polarized wave, received via a parabola antenna (not shown), is inputted thereto from BS signal terminals221,222, respectively, and amplifier circuits223,224, in an initial stage, together with an amplifier circuit225, in a second stage, are disposed in a back stage of the BS signal terminals221,222, respectively. The respective amplifier circuits223,224, in the initial stage, amplify the BS signal of the horizontally polarized wave or the vertically polarized plane wave, inputted from the BS signal terminals221,222, respectively. Then, the amplifier circuit225, in the second stage, further amplifies an output of either the amplifier circuit223or the amplifier circuit224, in the initial stage.

The amplifier circuits223to225each are a low-noise high-frequency amplifier for operating at a high frequency by use of a high electron mobility transistor (HEMT: High Electron Mobility Transistor), and so forth. In order to enable the amplifier circuit223or the amplifier circuit224to receive either the horizontally polarized wave or the vertically polarized plane wave, it is necessary to selectively switch between respective voltages supplied to these amplifier circuits. For this reason, selective switching between the voltages to be supplied to the amplifier circuit223and the amplifier circuit224, respectively, is made in a switching circuit310incorporated in a satellite reception converter IC201. More specifically, a voltage necessary for the amplifier circuit223or the amplifier circuit224is supplied from terminals211,212, or terminals213,214, respectively, according to whether a received BS signal is the horizontally polarized wave or the vertically polarized wave. Further, in order for the amplifier circuit225, in the second stage, to amplify the BS signal of either the horizontally polarized wave or the vertically polarized wave, a necessary voltage is supplied thereto from terminals215,216, respectively, at all tines while the BS signal is being received.

An output of the amplifier circuit225is further amplified by an amplifier circuit311incorporated in the satellite reception converter IC201to be converted into a BS-IF signal at an intermediate frequency by a frequency converter312. The BS-IF signal is further amplified by a back-stage amplifier circuit313, and subsequently, a DC component is removed from the BS-IF signal by a capacitor204to be sent out to a BS tuner (not shown) via a cable (not shown).

Further, a PLL circuit314including a local oscillation circuit outputs a local oscillation signal for converting low band frequencies in a range of 10.7 to 11.7 GHz and high band frequencies in a range of 11.7 to 12.75 GHz in received frequencies in a range of 10.7 to 12.75 GHz into the frequency of the BS-IF signal.

A DC voltage signal for controlling switching of a polarized wave received from the BS tuner is inputted to the switching circuit310. More specifically, the DC voltage signal at either 13V or, doubling as a power supply voltage, is inputted to the switching circuit310, and the switching circuit310detects magnitude of the DC voltage signal that is inputted, thereby making a decision as to which of the amplifier circuits223,224in the initial stage is put to use.

A voltage generation source315for generating plus and minus voltages according to the magnitude of the DC voltage signal detected by the switching circuit310provides either the amplifier circuit223or the amplifier circuit224, and the amplifier circuit225, with the plus and minus voltages via the terminals211to216, respectively.

The high electron mobility transistor (HEMT) for use in the amplifier circuits223to225, respectively, is normally activated by supplying a gate terminal with the minus voltage, and supplying a drain terminal with the plus voltage. For example, in the case of using the amplifier circuit223, the satellite reception converter IC201generates the minus voltage from the terminal213, supplying the gate terminal of the HEMT with the minus voltage. The satellite reception converter IC201concurrently generates the plus voltage from the terminal214, supplying the drain terminal of the HEMT with the pus voltage. As to voltage supply to the amplifier circuit224that is out of use at this time, a voltage for inactivating the HEMT for use in the amplifier circuit224is supplied from the terminals211,212, respectively.

With such a configuration as described above, an output signal of the amplifier circuit223is supplied to the amplifier circuit225. The amplifier circuit225is also activated as is the case with the amplifier circuit223, and the minus voltage outputted from the terminal215of the satellite reception converter IC201is supplied to the gate terminal of the HEMT. The plus voltage outputted from the terminal216is concurrently supplied to the drain terminal of the HEMT. By so doing, the BS signal amplified by the amplifier circuit225is supplied to the amplifier circuit311of the satellite reception converter IC201.

In the case of using the amplifier circuit224, the satellite reception converter IC201generates the minus voltage from the terminal211, supplying the gate terminal of the HEMT with the minus voltage. The satellite reception converter IC201concurrently generates the plus voltage from the terminal212, supplying the drain terminal of the HEMT with the plus voltage. At this time, a voltage for inactivating the HEMT for use in the amplifier circuit223is supplied to the amplifier circuit223that is out of use.

With the satellite reception converter shown inFIG. 14, the switching circuit310for switching between the amplifier circuit223, and the amplifier circuit224is incorporated in the satellite reception converter IC201. That is, the satellite reception converter IC201is provided with the circuits for generating the minus voltage for activating the amplifier circuit223, or the amplifier circuit224in order to receive either the horizontally polarized wave, or the vertically polarized plane wave.

Further, in Patent Document 2, there has been disclosed a technology relating to a downconverter capable of enhancing isolation of LNBs in whole. In Patent Document 3, there has been disclosed a technology relating to a tuner device capable of single-handedly receiving respective signals from a plurality of channels. In Non-patent Document 1, there has been disclosed a technology relating to a universal single type LNB.

SUMMARY

In the case where a universal dual downconverter is made up by use of the downconverter IC disclosed in Patent Document 1, there is conceivable, for example, a configuration shown inFIG. 9(the configuration shown inFIG. 9is a configuration derived by the inventors of the present application). In this connection, “universal dual” refers to a configuration capable of outputting two intermediate frequency signals, in the specification of, for example, DisEqc (Digital Satellite Equipment Control). With the downconverter shown inFIG. 9, a horizontally polarized wave signal (H)105, and a vertically polarized wave signal (V)106are received by one parabola antenna, and intermediate frequency signals OUT101, OUT102, after down-conversion, are outputted from downconverter circuits101,102, respectively.

The downconverter shown inFIG. 9is provided with an amplification unit103, and the downconverter circuits101,102. The amplification unit103is provided with a plurality of amplifiers {low noise amplifiers (LNA: Low Noise Amplifier)} for amplifying the horizontally polarized wave signal105and the vertically polarized wave signal106, received by a parabola antenna104, respectively.

The horizontally polarized wave signal105received by the parabola antenna104is amplified by an LNA111to be outputted to an LNA113and an LNA114. The LNA113amplifies the horizontally polarized wave signal that has been amplified by the LNA111to be subsequently outputted to an input terminal131of the downconverter circuit101. The LNA114amplifies the horizontally polarized wave signal that has been amplified by the LNA111to be subsequently outputted to an input terminal141of the downconverter circuit102.

The vertically polarized wave signal106received by the parabola antenna104is amplified by an LNA112to be outputted to an LNA115and an LNA116. The LNA115amplifies the vertically polarized wave signal that has been amplified by the LNA112to be subsequently outputted to the input terminal131of the downconverter circuit101. The LNA116amplifies the vertically polarized wave signal that has been amplified by the LNA112to be subsequently outputted to the input terminal141of the downconverter circuit102.

More specifically, the horizontally polarized wave signal105is supplied to the input terminal131of the downconverter circuit101via the LNA111and the LNA113while the vertically polarized wave signal106is supplied to the input terminal131of the downconverter circuit101via the LNA112and the LNA115. Further, the horizontally polarized wave signal105is supplied to the input terminal141of the downconverter circuit102via the LNA111and the LNA114while the vertically polarized wave signal106is supplied to the input terminal141of the downconverter circuit102via the LNA112and the LNA116.

The downconverter circuit101includes a reference signal generator115, a local oscillator116, a frequency converter117, an LNA bias circuit118, and a control circuit119. The reference signal generator115includes a crystal oscillation circuit REF111and a buffer B111. The crystal oscillation circuit REF111generates a reference signal154having a predetermined reference frequency, outputting the reference signal154to the local oscillator116. In this connection, the crystal oscillation circuit REF111generates the reference signal154by making use of a quartz resonator X′tal (111) coupled to a terminal133. The local oscillator116generates a local oscillation frequency signal153by use of the reference signal154.

The frequency converter117is provided with a preamp AMP111, a mixer MIXER111, a lowpass filter F111, and an IF amp AMP112. The preamp AMP111amplifies the horizontally polarized wave signal or the vertically polarized wave signal inputted to the input terminal131to be outputted to the mixer MIXER111. The mixer MIXER111down-converts an amplified horizontally polarized wave signal, or an amplified vertically polarized wave signal, outputted from the preamp AMP111, by making use of the local oscillation frequency signal153outputted from the local oscillator116. A down-converted horizontally polarized wave signal or a down-converted vertically polarized wave signal, an unnecessary component thereof being removed by the filter F111, is further amplified by the IF amp AMP112to be outputted as the intermediate frequency signal OUT101from an output terminal132.

The LNA bias circuit118supplies the LNA111with power via a terminal137, supplying the LNA113with power via a terminal136while supplying the LNA115with power via a terminal138. The control circuit119controls the LNA bias circuit118and the local oscillator116in accordance with a Tone/Pola signal inputted from a control signal input terminal135.

FIG. 10is a view showing one example of a Tone/Pola signal. As shown inFIG. 10, the Pola (Polarization) signal is a DC voltage signal at, for example, 13V, or 18V. Further, the Tone signal is a signal of an AC component (22 kHz), and is superimposed on the Pola signal representing a DC component.

If the DC component of the Tone/Pola signal is at 18V as shown inFIG. 10, the control circuit119controls the LNA bias circuit118such that the horizontally polarized wave signal is supplied to the input terminal131of the downconverter circuit101. On the other hand, if the DC component of the Tone/Pola signal is 13V, the control circuit119controls the LNA bias circuit118such that the vertically polarized wave signal is supplied to the input terminal131of the downconverter circuit101.

Further, if a signal at 22 kHz, as the AC component of the Tone/Pola signal, is being supplied, the control circuit119controls the local oscillator116such that the local oscillation frequency signal153(10.6 GHz) in a high band is outputted. On the other hand, if the AC component of the Tone/Pola signal is in the OFF state, the control circuit119controls the local oscillator116such that the local oscillation frequency signal153(9.75 GHz) in a low band is outputted.

The downconverter circuit102includes a reference signal generator125, a local oscillator126, a frequency converter127, an LNA bias circuit128, and a control circuit129. Herein, the downconverter circuit102is identical in configuration to the downconverter circuit101, omitting therefore duplicated description thereof. The LNA bias circuit128supplies the LNA112with power via a terminal148, supplies the LNA114with power via a terminal146and supplies the LNA116with power via a terminal147.

FIG. 11is a view for describing the case of supplying the downconverter shown inFIG. 9with power, and a Tone/Pola signal. The intermediate frequency signal OUT101subjected to down-conversion in the downconverter circuit101, the DC component thereof being removed by a capacitor C112, is supplied to a tuner (Tuner101) via a cable. Meanwhile, the tuner (Tuner101) supplies the downconverter circuit101with the power, and the Tone/Pola signal via the same cable as used in the transmission of the intermediate frequency signal OUT101. Herein, the DC component (13V or 18V) of the Tone/Pola signal is used as the power supplied to the downconverter circuit101.

The DC component (13V or 18V) of the Tone/Pola signal is supplied to a regulator REG111via a strip line SL112. The regulator REG111adjusts the voltage at 13V or 18V to a voltage matching the maximum rating of the downconverter circuit101to be subsequently supplied to a power supply terminal VDD of the downconverter circuit101.

Further, the Tone/Pola signal is supplied to a resistor R112and a capacitor C111via a strip line SL111. Herein, the DC component of the Tone/Pola signal is divided by the agency of the resistor R112and the resistor R111, respectively. More specifically, the Pola signal is reduced to the voltage matching the maximum rating of the downconverter circuit101by use of the resistor R112and the resistor R111to be delivered to the control signal input terminal135. On the other hand, the Tone signal passes through the capacitor C111, and the presence or absence of a pulse is checked inside the downconverter circuit101.

Further, the power is supplied to the LNA111, LNA113and LNA115in the amplification unit103via the LNA bias circuit118. Further, the case of supplying the downconverter circuit102with the power, and the Tone/Pola signal is the same as the case of supplying the downconverter circuit101with the power and the Tone/Pola signal.

FIG. 12is a table for describing an operation of the downconverter shown inFIG. 9. In the case where the intermediate frequency signals OUT101, OUT102are not outputted, the power from the tuners (Tuner101, Tuner102) is not supplied to the downconverter circuits101,102, respectively, and therefore, the downconverter circuits101,102are turned OFF. As a result, the LNAs111to116are also turned OFF.

On the other hand, in the case where the intermediate frequency signals OUT101, OUT102are outputted, the horizontally polarized wave signal105is supplied to the downconverter circuit101via the LNA111and the LNA113, or the vertically polarized wave signal106is supplied to the downconverter circuit102via the LNA112and the LNA116. Further, the horizontally polarized wave signal105is supplied to the downconverter circuit102via the LNA111and the LNA114, or the vertically polarized wave signal106is supplied to the downconverter circuit102via the LNA112and the LNA116. In this case, both the LNA111and the LNA112are in the ON state at all times.

If the Pola signal is High (18 V), the LNA113is turned ON and the LNA115is turned OFF, whereupon the horizontally polarized wave signal105is supplied to the downconverter circuit101. On the other hand, if the Pola signal is Low (13 V), the LNA113is turned OFF and the LNA115is turned ON, whereupon the vertically polarized wave signal106is supplied to the downconverter circuit101.

Similarly, if the Pola signal is High (18V), the LNA114is turned ON, and the LNA116is turned OFF, whereupon the horizontally polarized wave signal105is supplied to the downconverter circuit102. On the other hand, if the Pola signal is Low (13 V), the LNA114is turned OFF and the LNA116is turned ON, whereupon the vertically polarized wave signal106is supplied to the downconverter circuit102.

Further, as shown inFIG. 12, if the Tone signal is in the OFF state, a signal in the low band (9.75 GHz) is outputted as the local oscillation frequency signals153,163, respectively. On the other hand, if the Tone signal at 22 kHz is superimposed, a signal in the high band (10.6 GHz) is outputted as the local oscillation frequency signals153,163, respectively. Further, in the case where the intermediate frequency signals OUT101, OUT102are outputted, the power from the tuners (Tuner101, Tuner102) is supplied to the downconverter circuits101,102, respectively.

Next, referring toFIG. 13, there is described hereinafter the case where only the intermediate frequency signal OUT101or the intermediate frequency signal OUT102is outputted. If only one of the intermediate frequency signals is outputted, the downconverter circuit where the other of the intermediate frequency signals is not outputted is turned OFF. By so doing, power consumption of the downconverter can be reduced.

First, there is described hereinafter the case where the intermediate frequency signal OUT101is outputted while the intermediate frequency signal OUT102is not outputted (OUT101is ON and OUT102is OFF). In this case, the horizontally polarized wave signal105is supplied to the downconverter circuit101when both the LNA111and the LNA113are in the ON state. On the one hand, if the intermediate frequency signal OUT102is not outputted, the power from the tuner (Tuner102) shown inFIG. 11is not supplied to the downconverter circuits102. For this reason, the power is not supplied to the LNA112for use in amplifying the vertically polarized wave signal106, so that the vertically polarized wave signal106is not supplied to the downconverter circuit101.

There is described hereinafter the case where the intermediate frequency signal OUT102is outputted while the intermediate frequency signal OUT101is not outputted (OUT101is OFF and OUT102is ON). In this case, the vertically polarized wave signal106is supplied to the downconverter circuit102when both the LNA112and the LNA116are in the ON state. On the one hand, if the intermediate frequency signal OUT101is not outputted, the power from the tuner (Tuner101) shown inFIG. 11is not supplied to the downconverter circuit101. For this reason, the power is not supplied to the LNA111for use in amplifying the horizontally polarized wave signal105, so that the horizontally polarized wave signal105is not supplied to the downconverter circuit102.

In other words, with the downconverter shown inFIG. 9, the power is supplied to the LNA112by use of the LNA bias circuit128of the downconverter circuit102. For this reason, if the downconverter circuit102is turned OFF, this will cause the LNA bias circuit128to be also turned OFF, thereby interrupting power supply to the LNA112as well, so that the vertically polarized wave signal106cannot be outputted to the downconverter circuit101.

Similarly, with the downconverter shown inFIG. 9, the power is supplied to the LNA111by use of the LNA bias circuit118of the downconverter circuit101. For this reason, if the downconverter circuit101is turned OFF, this will cause the LNA bias circuit118to be also turned OFF, thereby interrupting power supply to the LNA111as well, so that the horizontally polarized wave signal105cannot be outputted to the downconverter circuit102. This is attributable to the downconverter circuits101,102sharing the LNA111, and the LNA112.

Thus, in the case where the universal dual downconverter is made up by use of the downconverter IC as disclosed in Patent Document 1, a problem has been encountered in that if either one of the downconverter circuits (101or102) is turned OFF, the downconverter is not normally operated.

In accordance with a first aspect of the invention, a downconverter is provided with an amplification unit, a first downconverter circuit, and a second downconverter circuit, the amplification unit including at least a first amplifier for receiving a first polarized wave signal, and a second amplifier for receiving a second polarized wave signal, the first downconverter circuit including a first reference signal generator for generating a first reference signal having a first reference frequency, a first local oscillator for generating a first local oscillation frequency signal by use of the first reference signal, a first frequency converter for converting a signal amplified by the amplification unit into an intermediate frequency by use of the first local oscillation frequency signal, a first bias circuit for supplying the first amplifier with power; and a first control circuit for controlling the first reference signal generator, the first local oscillator, the first frequency converter, and the first bias circuit in accordance with a first control signal, the second downconverter circuit including a second reference signal generator for generating a second reference signal having a second reference frequency, a second local oscillator for generating a second local oscillation frequency signal by use of the second reference signal, a second frequency converter for converting a signal amplified by the amplification unit into an intermediate frequency by use of the second local oscillation frequency signal, a second bias circuit for supplying the second amplifier with power, and a second control circuit for controlling the second reference signal generator, the second local oscillator, the second frequency converter, and the second bias circuit in accordance with a second control signal. If the first control signal is a signal indicating a power-saving mode, the first control circuit causes both the first local oscillator and the first frequency converter to be in a non-operating state, and controls the first bias circuit such that power is supplied to the first amplifier, and if the second control signal is the signal indicating the power-saving mode, the second control circuit causes both the second local oscillator and the second frequency converter to be in the non-operating state, and controls the second bias circuit such that power is supplied to the second amplifier.

With the downconverter according to the invention, if the first control signal is the signal indicating the power-saving mode, both the first local oscillator and the first frequency converter are caused to be in the non-operating state, and the first bias circuit is controlled such that power is supplied to the first amplifier while if the second control signal is the signal indicating the power-saving mode, both the second local oscillator and the second frequency converter are caused to be in the non-operating state, and the second bias circuit is controlled such that power is supplied to the second amplifier. Accordingly, even if the first downconverter circuit is in the power-saving mode, the first amplifier can be turned ON, so that a polarized wave signal can be supplied to the second downconverter circuit. Further, even if the second downconverter circuit is in the power-saving mode, the second amplifier can be turned ON, so that a polarized wave signal can be supplied to the first downconverter circuit. Thus, even in the case where a universal dual downconverter is made up by use of a plurality of downconverter circuits, it is possible to provide a downconverter that can be normally operated.

In accordance with a second aspect of the invention, a downconverter IC is provided with a reference signal generator for generating a reference signal having a predetermined reference frequency, a local oscillator for generating a local oscillation frequency signal by use of the reference signal, a frequency converter for converting a polarized signal amplified by an amplifier into an intermediate frequency by use of the local oscillation frequency signal, a bias circuit for supplying the amplifier with power, and a control circuit for controlling the reference signal generator, the local oscillator, the frequency converter, and the bias circuit in accordance with a first signal. If the control signal is a signal indicating a power-saving mode, the control circuit causes both the local oscillator and the frequency converter to be in a non-operating state, and controls the bias circuit such that power is supplied to the amplifier.

A method for controlling a downconverter that is provided with an amplification unit, a first downconverter circuit, and a second downconverter circuit, the amplification unit including at least a first amplifier for receiving a first polarized wave signal, and a second amplifier for receiving a second polarized wave signal, the first downconverter circuit including a first reference signal generator for generating a first reference signal having a first reference frequency, a first local oscillator for generating a first local oscillation frequency signal by use of the first reference signal, a first frequency converter for converting a signal amplified by the amplification unit into an intermediate frequency by use of the first local oscillation frequency signal, a first bias circuit for supplying the first amplifier with power, and a first control circuit for controlling the first reference signal generator, the first local oscillator, the first frequency converter, and the first bias circuit in accordance with a first control signal, the second downconverter circuit including a second reference signal generator for generating a second reference signal having a second reference frequency, a second local oscillator for generating a second local oscillation frequency signal by use of the second reference signal, a second frequency converter for converting a signal amplified by the amplification unit into an intermediate frequency by use of the second local oscillation frequency signal, a second bias circuit for supplying the second amplifier with power, and a second control circuit for controlling the second reference signal generator, the second local oscillator, the second frequency converter, and the second bias circuit in accordance with a second control signal, the method includes causing both the first local oscillator and the first frequency converter to be in a non-operating state if the first control signal is a signal indicating a power-saving mode, controlling the first bias circuit such that power is supplied to the first amplifier, and causing both the second local oscillator and the second frequency converter to be in the non-operating state if the second control signal is a signal indicating the power-saving mode, controlling the second bias circuit such that power is supplied to the second amplifier.

With the method for controlling a downconverter, according to the invention, if the first control signal is the signal indicating the power-saving mode, both the first local oscillator and the first frequency converter are caused to be in the non-operating state, and the first bias circuit is controlled such that power is supplied to the first amplifier while if the second control signal is the signal indicating the power-saving mode, both the second local oscillator and the second frequency converter are caused to be in the non-operating state, and the second bias circuit is controlled such that power is supplied to the second amplifier. Accordingly, even if the first downconverter circuit is in the power-saving mode, the first amplifier can be turned ON, so that a polarized wave signal can be supplied to the second downconverter circuit. Further, even if the second downconverter circuit is in the power-saving mode, the second amplifier can be turned ON, so that a polarized wave signal can be supplied to the first downconverter circuit. Thus, even in the case where a universal dual downconverter is made up by use of a plurality of downconverter circuits, it is possible to provide a downconverter that can be normally operated.

The invention can provide a downconverter, and a downconverter IC that are normally operable even in the case where the universal dual downconverter is made up by use of a plurality of downconverter circuits, and a method for controlling the downconverter.

DETAILED DESCRIPTION

Embodiments of the invention are described hereinafter with reference to the accompanying drawings.

First Embodiment

FIG. 1is a block diagram showing a downconverter according to a first embodiment of the invention. The downconverter shown inFIG. 1is a downconverter of the universal dual configuration capable of outputting two intermediate frequency signals, in the specification of, for example, DisEqc (Digital Satellite Equipment Control). More specifically, with the downconverter shown inFIG. 1, a horizontally polarized wave signal (H)5and a vertically polarized wave signal (V)6are received by one parabola antenna4, and intermediate frequency signals OUT1, OUT2, after down-conversion are outputted from downconverter circuits1,2, respectively.

The downconverter shown inFIG. 1is provided with an amplification unit3, the downconverter circuit1, and the downconverter circuit2. In this case, the downconverter circuits1,2each are formed in, for example, one IC chip. That is, the downconverter of the universal dual configuration capable of outputting the two intermediate frequency signals can be made up of two IC chips (the downconverter circuits).

The amplification unit3includes a plurality of amplifiers {low noise amplifiers (LNA: Low Noise Amplifier)} for amplifying a horizontally polarized wave signal5, and a vertically polarized wave signal6, received by a parabola antenna4, respectively. Herein, for each of the LNAs, use can be made of, for example, a high electron mobility transistor (HEMT).

The horizontally polarized wave signal5received by the parabola antenna4is amplified by the LNA1(a first amplifier) to be outputted to the LNA3(a third amplifier), and the LNA4(a fourth amplifier). The LNA3amplifies the horizontally polarized wave signal amplified by the LNA1to be outputted to an input terminal31of the downconverter circuit1. The LNA4amplifies the horizontally polarized wave signal amplified by the LNA1to be outputted to an input terminal41of the downconverter circuit2.

The vertically polarized wave signal6received by the parabola antenna4is amplified by the LNA2(a second amplifier) to be outputted to the LNA5(a fifth amplifier), and the LNA6(a sixth amplifier). The LNA5amplifies the vertically polarized wave signal amplified by the LNA2to be outputted to the input terminal31of the downconverter circuit1. The LNA6amplifies the vertically polarized wave signal amplified by the LNA2to be outputted to the input terminal41of the downconverter circuit2.

More specifically, the horizontally polarized wave signal5is supplied to the input terminal31of the downconverter circuit1via the LNA1and the LNA3while the vertically polarized wave signal6is supplied to the input terminal31of the downconverter circuit1via the LNA2and the LNA5. Further, the horizontally polarized wave signal5is supplied to the input terminal41of the downconverter circuit2via the LNA1and the LNA4while the vertically polarized wave signal6is supplied to the input terminal41of the downconverter circuit2via the LNA2and the LNA6.

The downconverter circuit1(a first downconverter circuit) includes a reference signal generator15(a first reference signal generator), a local oscillator16(a first local oscillator), a frequency converter17(a first frequency converter), an LNA bias circuit18(a first bias circuit), and a control circuit19(a first control circuit).

The reference signal generator15includes a crystal oscillation circuit REF11, and a buffer B11. The crystal oscillation circuit REF11generates a reference signal54(a first reference signal) having a predetermined reference frequency, outputting the reference signal54to the local oscillator16. In this connection, the crystal oscillation circuit REF11generates the reference signal54by making use of a quartz resonator X′tal (11) coupled to a terminal33. The local oscillator16generates a local oscillation frequency signal53by use of the reference signal54.

The frequency converter17is provided with a preamp AMP11, a mixer MIXER11, a lowpass filter F11, and an IF amp AMP12. The preamp AMP11amplifies the horizontally polarized wave signal or the vertically polarized wave signal, inputted to the input terminal31, to be outputted to the mixer MIXER11. The mixer MIXER11down-converts an amplified horizontally polarized wave signal or an amplified vertically polarized wave signal, outputted from the preamp AMP11, by use of the local oscillation frequency signal53outputted from the local oscillator16. The down-converted horizontally polarized wave signal or a down-converted vertically polarized wave signal, an unnecessary component thereof being removed by the filter F11, is further amplified by the IF amp AMP12to be outputted as the intermediate frequency signal OUT1from an output terminal32.

The LNA bias circuit18supplies the LNA1with power via a terminal37, supplies the LNA3with power via a terminal36, and supplies the LNA5with power via a terminal38. The control circuit19controls the reference signal generator15, the local oscillator16, the frequency converter17, and the LNA bias circuit18in accordance with a Tone/Pola signal59inputted from a control signal input terminal35.

The downconverter circuit2(a second downconverter circuit) includes a reference signal generator25(a second reference signal generator), a local oscillator26(a second local oscillator), a frequency converter27, an LNA bias circuit28(a second LNA bias circuit), and a control circuit29(a second control circuit). The reference signal generator25includes a crystal oscillation circuit REF21and a buffer B21.

The crystal oscillation circuit REF21generates a reference signal64(a second reference signal) having a predetermined reference frequency, outputting the reference signal64to the local oscillator26. In this connection, the crystal oscillation circuit REF21generates a reference signal64by making use of a quartz resonator X′tal (21) coupled to a terminal43. The reference signal64is typically identical in frequency to the reference signal54. The local oscillator26generates a local oscillation frequency signal63by use of the reference signal64.

The frequency converter27is provided with a preamp AMP21, a mixer MIXER21, a lowpass filter F21, and an IF amp AMP22. The preamp AMP21amplifies the horizontally polarized wave signal or the vertically polarized wave signal, inputted to input terminal41, to be outputted to the mixer MIXER21. The mixer MIXER21down-converts an amplified horizontally polarized wave signal or an amplified vertically polarized wave signal, outputted from the preamp AMP21, by making use of the local oscillation frequency signal63outputted from the local oscillator26. The down-converted horizontally polarized wave signal or a down-converted vertically polarized wave signal, an unnecessary component thereof being removed by the filter F21, is further amplified by the IF amp AMP22to be outputted as the intermediate frequency signal OUT2from an output terminal42.

The LNA bias circuit28supplies an LNA2with power via a terminal48, supplies an LNA4with power via a terminal46, and supplies an LNA6with power via a terminal47. The control circuit29controls the reference signal generator25, the local oscillator26, the frequency converter27, and the LNA bias circuit28in accordance with a Tone/Pola signal69inputted from a control signal input terminal45.

FIG. 2is a view showing one example of a Tone/Pola signal for use in the downconverter according to the present embodiment. As shown inFIG. 2, the Pola (Polarization) signal is, for example, a DC voltage signal at 18V, a DC voltage signal at 13V, or a DC voltage signal below 10V. Herein, the case where the DC voltage signal below 10V is supplied typically refers to the case where the Pola signal is not supplied, that is, the case where the DC voltage of the Pola signal is not energized. In other words, the case where the DC voltage signal below 10V is supplied is the case where a DC component is not supplied from a tuner shown inFIG. 3to the downconverter circuit. In the case where the DC component is not supplied from the tuner shown inFIG. 3to the downconverter circuit, a voltage detected at the control signal input terminal35via resistors R11, R12is ideally 0V. There is described hereinafter the case where the Pola signal is not supplied, as a representative example of the case where the DC voltage signal below 10V is supplied.

If the Pola signal (a first mode select signal) is the DC voltage signal at 18V, the control circuit19controls the LNA bias circuit18such that the horizontally polarized wave signal is supplied to the input terminal31of the downconverter circuit1. If the Pola signal is the DC voltage signal at 13V, the control circuit19controls the LNA bias circuit18such that the vertically polarized wave signal is supplied to the input terminal31of the downconverter circuit1. At this time, an operation mode of the downconverter circuit1is a normal operation mode. On the other hand, if the Pola signal is not supplied, the downconverter circuit1is turned into a power-saving mode. If the downconverter circuit1is in the power-saving mode, the control circuit19causes both the local oscillator16and the frequency converter17to be in a non-operating state, keeping the LNA bias circuit18and the crystal oscillation circuit REF11inside the reference signal generator15in an operating state. Since the buffer B11in the reference signal generator15is a circuit that outputs signals generated by the crystal oscillation circuit REF11to outside, the buffer B11is always kept in a non-operating state for the configuration shown inFIG. 2.

Further, if the Pola signal (a second mode select signal) is the DC voltage signal at 18V, the control circuit29controls the LNA bias circuit28such that the horizontally polarized wave signal is supplied to the input terminal41of the downconverter circuit2. If the Pola signal is the DC voltage signal at 13V, the control circuit29controls the LNA bias circuit28such that the vertically polarized wave signal is supplied to the input terminal41of the downconverter circuit2. At this time, an operation mode of the downconverter circuit2is the normal operation mode. On the other hand, if the Pola signal is not supplied, the downconverter circuit2is turned into the power-saving mode. If the downconverter circuit2is in the power-saving mode, the control circuit29causes both the local oscillator26and the frequency converter27to be in the non-operating state, keeping the LNA bias circuit28and the crystal oscillation circuit REF21inside the reference signal generator25in the operating state. The buffer B21is also always kept in a non-operating state for the configuration shown inFIG. 2

As shown inFIG. 2, a Tone signal is a signal of an AC component (22 kHz), and is superimposed on the Pola signal representing the DC component. In the case where the Tone signal (a first band-select signal) at 22 kHz is supplied as the AC component of the Tone/Pola signal, the control circuit19controls the local oscillator16such that the local oscillation frequency signal53in a high band (for example, 10.6 GHz in the case of Ku band) can be outputted. On the other hand, if the AC component of the Tone/Pola signal is in the OFF state, the control circuit19controls the local oscillator16such that the local oscillation frequency signal53in a low band (for example, 9.75 GHz in the case of Ku band) can be outputted.

Similarly, in the case where the Tone signal (a second band-select signal) at 22 kHz is supplied as the AC component of the Tone/Pola signal, the control circuit29controls the local oscillator26such that the local oscillation frequency signal63in a high band (for example, 10.6 GHz) can be outputted. On the other hand, if the AC component of the Tone/Pola signal is in the OFF state, the control circuit29controls the local oscillator26such that the local oscillation frequency signal63in a low band (for example, 9.75 GHz) can be outputted.

With the downconverter shown inFIG. 9, only the DC voltage signal at 18V and the DC voltage signal at 13V are used. In contrast, with the downconverter according to the present embodiment, the power-saving mode is newly set in the case of the DC voltage signal below 10V (typically if the Pola signal is not supplied) while the DC voltage signal at 18V and the DC voltage signal at 13V are being used. More specifically, with the downconverter according to the present embodiment, if the Pola signal is represented in two bits, the control circuits119,129each can detect three states of operation including (1) the case where the horizontally polarized wave signal is supplied (the normal operation mode), (2) the case where the vertically polarized wave signal is supplied (the normal operation mode), and (3) the power-saving mode.

FIG. 6is a block diagram showing an example of the local oscillator16of the downconverter according to the present embodiment (the same applies to the local oscillator26). As shown inFIG. 6, the local oscillator16is provided with a phase comparator PFD, a lowpass filter LPF, a voltage control oscillator VCO11, and a plurality of frequency dividers FDs.

The phase comparator PFD receives the reference signal54generated by the crystal oscillation circuit REF11and a signal subjected to frequency division by the frequency dividers FDs, outputting a signal obtained by converting a phase difference between those signals into a voltage. The lowpass filter LPF removes an unnecessary component of the signal outputted from the phase comparator PFD. The voltage control oscillator VCO11controls the frequency of an output signal according to a voltage of a signal outputted from the lowpass filter LPF. An output signal generated by the voltage control oscillator VCO11is outputted as the local oscillation frequency signal53.

Further, the local oscillation frequency signal53outputted from the voltage control oscillator VCO11undergoes frequency division by a first path passing through the frequency divider FD (1/4), the frequency divider FD (1/2), and the frequency divider FD (1/39), or a second path passing through the frequency divider FD (1/4), the frequency divider FD (1/1.6), and the frequency divider FD (1/53). Switching between the first path and the second path can be executed by turning both switches SW11and SW12ON or OFF with the use of the control signal outputted from the control circuit19.

In the case of the frequency of the reference signal54being 31.25 MHz, the local oscillation frequency signal (low band) 53 at 10.6 GHz (=31.25 MHz×4×2×39) can be generated by the control circuit19selecting the first path. On the other hand, if the control circuit19selects the second path, the local oscillation frequency signal (high band)53at 9.75 GHz (=31.25 MHz×4×1.6×53) can be generated.

Herein, the frequency divider FD (1/1.6) can be made up by use of the frequency divider FD (1/2), the frequency divider FD (1/4), and an image rejection mixer IRM, as shown in, for example,FIG. 7.

FIG. 3is a view for describing the case of supplying the downconverter shown inFIG. 1with power, and a Tone/Pola signal. The intermediate frequency signal OUT1subjected to down-conversion in the downconverter circuit1, the DC component thereof being removed by a capacitor C12, is supplied to a tuner (Tuner1: a first tuner) via a cable. Meanwhile, the tuner (Tuner1) supplies the downconverter circuit1with power and a Tone/Pola signal via the same cable as used in the transmission of the intermediate frequency signal OUT1. Herein, the downconverter circuit1is supplied with a DC component of the Tone/Pola signal {a DC voltage signal at 18V, a DC voltage signal at 13V, or a DC voltage signal below 10V (typically at 0V, in which case, the DC component is not energized)}, the DC component serving as the power.

The DC component (13V or 18V) of the Tone/Pola signal is supplied to a regulator REG11(a first regulator) via a strip line SL12. The regulator REG11adjusts a voltage at 13V or 18V to a voltage matching the maximum rating of the downconverter circuit1to be subsequently supplied to a power supply terminal VDD of the downconverter circuit1.

Further, the Tone/Pola signal is supplied to a resistor R12and a capacitor C11via a strip line SL11. Herein, the DC component of the Pola signal is divided by the agency of the resistor R11and the resistor R12. More specifically, the Pola signal is reduced to a voltage matching the maximum rating of the downconverter circuit1by use of the resistor R11and the resistor R12to be delivered to the control signal input terminal35. On the other hand, the Tone signal passes through the capacitor C11, and the presence or absence of a pulse is checked inside the downconverter circuit1. Further, the power is supplied to the LNA1, LNA3and LNA5, provided in the amplification unit3, via the LNA bias circuit18.

Similarly, the intermediate frequency signal OUT2subjected to down-conversion in the downconverter circuit2, the DC component thereof being removed by a capacitor C22, is supplied to a tuner (Tuner2: a second tuner) via a cable. Meanwhile, the tuner (Tuner2) supplies the downconverter circuit2with power and a Tone/Pola signal via the same cable as used in the transmission of the intermediate frequency signal OUT2. Herein, the downconverter circuit2is supplied with the DC component of the Tone/Pola signal {the DC voltage signal at 18V, the DC voltage signal at 13 V, or the DC voltage signal below 10V (typically at 0 V, in which case, the DC component is not energized)}, the DC component serving as the power.

The DC component (13V or 18V) of the Tone/Pola signal is supplied to a regulator REG21(a second regulator) via a strip line SL22. The regulator REG21adjusts the voltage at 13V or 18V to a voltage matching the maximum rating of the downconverter circuit2to be subsequently supplied to a power supply terminal VDD of the downconverter circuit2.

Further, the Tone/Pola signal is supplied to a resistor R22and a capacitor C21via a strip line SL21. Herein, the DC component of the Pola signal is divided by the agency of the resistor R21and the resistor R22. More specifically, the Pola signal is reduced to a voltage matching the maximum rating of the downconverter circuit2by use of the resistor R21and the resistor R22to be delivered to the control signal input terminal45. On the other hand, the Tone signal passes through the capacitor C21, and the presence or absence of a pulse is checked inside the downconverter circuit2. Further, the power is supplied to the LNA2, LNA4and LNA6provided in the amplification unit3via the LNA bias circuit28.

Now, in the downconverter according to the present embodiment, the power can be supplied from the regulator REG11to the power supply terminal VDD of the downconverter circuit2as well. Further, the power can be supplied from the regulator REG21to the power supply terminal VDD of the downconverter circuit1as well. That is, in the downconverter according to the present embodiment, if the power is not supplied to the downconverter circuit1, in other words, if the Tone/Pola signal is not supplied to the downconverter circuit1, the power cannot be supplied from the regulator REG11to the power supply terminal VDD of the downconverter circuit1. In this case, however, since the power is supplied to the downconverter circuit2(that is, the DC component (13V or 18V) of the Tone/Pola signal, serving as the power, is supplied to the downconverter circuit2), the power can be supplied from the regulator REG21to the power supply terminal VDD of the downconverter circuit1.

Similarly, if the power is not supplied to the downconverter circuit2, that is, if the Tone/Pola signal is not supplied to the downconverter circuit2, the power cannot be supplied from the regulator REG21to the power supply terminal VDD of the downconverter circuit2. In this case, however, since the power is supplied to the downconverter circuit1(that is, the DC component (13 V or 18 V) of the Tone/Pola signal, serving as the power, is supplied to the downconverter circuit1), the power can be supplied from the regulator REG11to the power supply terminal VDD of the downconverter circuit2.

FIG. 4is a table for describing an operation of the downconverter shown inFIG. 1. If the intermediate frequency signals OUT1, OUT2are not outputted, the power is not supplied from the tuner (Tuner1, Tuner2) to the downconverter circuits1,2, respectively, so that the downconverter circuits1,2are turned OFF. As a result, the LNAs1to6are also turned OFF.

On the other hand, if the intermediate frequency signals OUT1, OUT2are outputted, the horizontally polarized wave signal5is supplied to the downconverter circuit1via the LNA1and the LNA3, or the vertically polarized wave signal6is supplied to the downconverter circuit1via the LNA2and the LNA5. Further, the horizontally polarized wave signal5is supplied to the downconverter circuit2via the LNA1and the LNA4, or the vertically polarized wave signal6is supplied to the downconverter circuit2via the LNA2and the LNA6. In this case, the LNA1and the LNA2are in the ON state at all times.

Further, if the Pola signal is High (18V), the LNA3is turned ON and the LNA5is turned OFF, whereupon the horizontally polarized wave signal5is supplied to the downconverter circuit1. On the other hand, if the Pola signal is Low (13V), the LNA3is turned OFF and the LNA5is turned ON, whereupon the vertically polarized wave signal6is supplied to the downconverter circuit1. As for the LNA1, the LNA3, and the LNA5, respectively, switching between the ON state and the OFF state thereof can be executed by switching between the presence and the absence of power supply from the LNA bias circuit18. Further, the presence and the absence of the power supply from the LNA bias circuit18is controlled by a control signal inputted from the control circuit19.

Similarly, if the Pola signal is High (18V), the LNA4is turned ON and the LNA6is turned OFF, whereupon the horizontally polarized wave signal5is supplied to the downconverter circuit2. On the other hand, if the Pola signal is Low (13V), the LNA4is turned OFF and the LNA6is turned ON, whereupon the vertically polarized wave signal6is supplied to the downconverter circuit2. As for the LNA2, the LNA4, and the LNA6, respectively, switching between the ON state and the OFF state thereof can be executed by switching between the presence and the absence of power supply from the LNA bias circuit28. Further, the presence and the absence of the power supply from the LNA bias circuit28is controlled by a control signal inputted from the control circuit29.

Further, as shown inFIG. 4, if the Tone signal is in the OFF state, a signal in the low band (9.75 GHz) is outputted as the local oscillation frequency signals53,63, respectively. On the other hand, if Tone signal at 22 kHz is superimposed, a signal in the high band (10.6 GHz) is outputted as the local oscillation frequency signals53,63, respectively. Further, if the intermediate frequency signals OUT1, OUT2are outputted, the power is supplied from the tuners (Tuner1, Tuner2) to the downconverter circuits1,2, respectively.

Next, referring toFIG. 5, there is described hereinafter the case where only the intermediate frequency signal OUT1, or the intermediate frequency signal OUT2is outputted. If only one of the intermediate frequency signals is outputted, the downconverter circuit where the other of the intermediate frequency signals is not outputted is turned OFF. By so doing, power consumption of the downconverter can be reduced.

First, there is described hereinafter the case where the intermediate frequency signal OUT1is outputted while the intermediate frequency signal OUT2is not outputted (OUT1is ON and OUT2is OFF). In this case, the downconverter circuit2is in the power-saving mode, so that the control circuit29causes the reference signal generator25, the local oscillator26, and the frequency converter27to be in a non-operating state, controlling the LNA bias circuit28such that the power is supplied to the LNA2. In this case, the power is supplied from the regulator REG11to the downconverter circuit2.

When the LNA1and the LNA3each are in the ON state, the horizontally polarized wave signal5is supplied to the downconverter circuit1. On the one hand, when the LNA2and the LNA5each are in the ON state, the vertically polarized wave signal6is supplied to the downconverter circuit1. Further, if the Tone signal is in the OFF state, the signal in the low band (9.75 GHz) is outputted as the local oscillation frequency signal53. On the other hand, if Tone signal at 22 kHz is superimposed, the signal in the high band (10.6 GHz) is outputted as the local oscillation frequency signals53.

Next, there is described hereinafter the case where the intermediate frequency signal OUT2is outputted while the intermediate frequency signal OUT1is not outputted (OUT1is OFF and OUT2is ON). In this case, the downconverter circuit1is in the power-saving mode, so that the control circuit19causes the reference signal generator15, the local oscillator16, and the frequency converter17to be in the non-operating state, controlling the LNA bias circuit18such that the power is supplied to the LNA1. In this case, the power is supplied from the regulator REG21to the downconverter circuit1.

When the LNA1and the LNA4each are in the ON state, the horizontally polarized wave signal5is supplied to the downconverter circuit2. On the other hand, when the LNA2and the LNA6each are in the ON state, the vertically polarized wave signal6is supplied to the downconverter circuit1. Further, if the Tone signal is in the OFF state, the signal in the low band (9.75 GHz) is outputted as the local oscillation frequency signal63. On the other hand, if Tone signal at 22 kHz is superimposed, the signal in the high band (10.6 GHz) is outputted as the local oscillation frequency signals63.

With the downconverter shown inFIG. 9, the power has been supplied to the LNA112by use of the LNA bias circuit128of the downconverter circuit102. For this reason, if the downconverter circuit102is turned OFF, the LNA bias circuit128is also turned OFF, thereby interrupting power supply to the LNA112as well, so that it has been impossible to output the vertically polarized wave signal106to the downconverter circuit101. Further, with the downconverter shown inFIG. 9, the power has been supplied to the LNA111by use of the LNA bias circuit118of the downconverter circuit101. For this reason, if the downconverter circuit101is turned OFF, the LNA bias circuit118is also turned OFF, thereby interrupting power supply to the LNA111as well, so that it has been impossible to output the horizontally polarized wave signal105to the downconverter circuit102.

Thus, in the case where the universal dual downconverter is made up by use of the downconverter IC disclosed in Patent Document 1, a problem has been encountered in that if either one of the downconverter circuits (101or102) is turned OFF, the downconverter is not normally operated. Accordingly, the downconverter IC disclosed in Patent Document 1 has been applicable only to the case of a universal single configuration. Furthermore, if the downconverter IC disclosed in Patent Document 1 is applied to a universal dual downconverter, it has been necessary to supply the LNA with power by use of another power supply source. In this case, there has arisen a problem in that an increase in both power consumption and cost has resulted and the specification of a downconverter becomes complicated.

In contrast, with the downconverter according to the present embodiment shown inFIG. 1, the power-saving mode is newly set in the case of the DC voltage signal below 10 V (typically, if the Pola signal is not supplied) while the DC voltage signal at 18 V and the DC voltage signal at 13 V are being used. More specifically, with the downconverter according to the present embodiment, if the Pola signal is represented in two bits, the control circuits19,29each can detect the three states of operation including (1) the case where the horizontally polarized wave signal is supplied (the normal operation mode), (2) the case where the vertically polarized wave signal is supplied (the normal operation mode), and (3) the power-saving mode.

Then, if the control signal (the Pola signal) is the signal indicating the power-saving mode, the control circuit19causes both the local oscillator16and the frequency converter17to be in the non-operating state, controlling the LNA bias circuit18such that the power is supplied to the LNA1. Further, if the control signal (the Pola signal) is the signal indicating the power-saving mode, the control circuit29causes both the local oscillator26and the frequency converter27to be in the non-operating state, controlling the LNA bias circuit28such that the power is supplied to the LNA2. Accordingly, even if the downconverter circuit1is in the power-saving mode, the LNA1can be turned ON, so that the horizontally polarized wave signal5can be supplied to the downconverter circuit2. Further, even if the downconverter circuit2is in the power-saving mode, the LNA2can be turned ON, so that the vertically polarized wave signal6can be supplied to the downconverter circuit1.

Furthermore, with the downconverter according to the present embodiment, the power can be supplied from the regulator REG11to the power supply terminal VDD of the downconverter circuit2. Similarly, the power can be supplied from the regulator REG21to the power supply terminal VDD of the downconverter circuit1.

More specifically, with the downconverter according to the present embodiment, if the power is not supplied to the downconverter circuit1, the power cannot be supplied from the regulator REG11to the power supply terminal VDD of the downconverter circuit1. In this case, however, the power can be supplied from the regulator REG21to the power supply terminal VDD of the downconverter circuit1. Similarly, if the power is not supplied to the downconverter circuit2, the power cannot be supplied from the regulator REG21to the power supply terminal VDD of the downconverter circuit2. In this case, however, the power can be supplied from the regulator REG11to the power supply terminal VDD of the downconverter circuit2. Accordingly, even if one of the downconverter circuits is in the power-saving mode, it is possible to supply the power from the other downconverter circuit to the one of the downconverter circuits.

As described in the foregoing, with the use of the downconverter according to the present embodiment, it is possible to provide both a downconverter and a downconverter IC that can be normally operated even in the case of making up a universal dual converter using a plurality of downconverter circuits, and a method for controlling the downconverter.

Second Embodiment

There is described hereinafter a second embodiment of the invention.FIG. 8is a block diagram showing a downconverter according to the second embodiment of the invention. The downconverter shown inFIG. 8differs from the downconverter according to the first embodiment of the invention in that only a downconverter circuit1is provided with a quartz resonator X′tal (11). Otherwise, the downconverter according to the present embodiment is the same as the downconverter according to the first embodiment, so that identical constituent elements are denoted by like reference numerals, respectively, omitting therefore duplication in description.

As shown inFIG. 8, with the downconverter according to the present embodiment, the quartz resonator X′tal (11) is coupled to a terminal33of the downconverter circuit1. And a crystal oscillation circuit REF11generates a reference signal54having a predetermined reference frequency by use of the quartz resonator X′tal (11), outputting the reference signal54to a local oscillator16. Further, the reference signal54is amplified by a buffer11to be outputted from a terminal34of the downconverter circuit1to a terminal43of a downconverter circuit2. The buffer B11is set to always be kept in an operating state irrespective of its control state.

A reference signal generator25of the downconverter circuit2generates a reference signal64by making use of a reference signal60(a signal obtained by amplifying the reference signal54by use of the buffer11) outputted from the downconverter circuit1. Herein, the reference signal54is typically identical in frequency to the reference signal64. Accordingly, in this case, a crystal oscillation circuit REF21of the downconverter circuit2functions as a buffer for amplifying the reference signal60outputted from the downconverter circuit1. The buffer B21is set to always be in a non-operating state irrespective of its control state.

With the downconverter according to the present embodiment, in the case where the intermediate frequency signal OUT1is outputted while the intermediate frequency signal OUT2is not outputted (OUT1is in the ON state and OUT2is in the OFF state), the downconverter circuit2is in the power-saving mode. In this case, a control circuit29causes a local oscillator26and a frequency converter27to be in the non-operating state, causes a reference signal generator25to be in the operating state, and controls a LNA bias circuit28such that the power is supplied to the LNA2.

On the other hand, in the case where the intermediate frequency signal OUT2is outputted while the intermediate frequency signal OUT1is not outputted (OUT1is OFF and OUT2is ON), the downconverter circuit1is in the power-saving mode. In this case, a control circuit19causes the local oscillator16, and a frequency converter17to be in the non-operating state while a reference signal generator15(a crystal oscillation circuit REF11and a buffer B11) is caused to be in the operating state, and controlling an LNA bias circuit18such that the power is supplied to an LNA1.

That is to say, with the downconverter according to the present embodiment, in the case where the downconverter circuit1is in the power-saving mode (OUT1is OFF, and OUT2is ON), the reference signal generator15is caused to be in the operating state, thereby enabling the reference signal60to be outputted to the downconverter circuit2. By so doing, it is possible to omit the quartz resonator X′tal (21) (refer to the first embodiment) otherwise coupled to a terminal43of the downconverter circuit2. Since the quartz resonator is a component high in cost, the omission of the quartz resonator X′tal (21) can effectively contribute to reduction in the manufacturing cost of the downconverter and space thereof.

Still further, the case where the quartz resonator is coupled to the downconverter circuit1has been described in the foregoing. However, the quartz resonator may be coupled to the terminal43of the downconverter circuit2instead of coupling the quartz resonator to the downconverter circuit1, thereby delivering the reference signal outputted from a terminal44of the downconverter circuit2to a terminal33of the downconverter circuit1.

The buffers in the respective reference signal generators in the first and second embodiments may be controlled with a buffer control terminal provided outside the package, independently from the control circuit19and the control circuit29.

Furthermore, with the first and second embodiments, there has been described the case of receiving the horizontally polarized wave signal and the vertically polarized wave signal. However, the polarized wave signals may be substituted for a left-handed circularly polarized wave signal and a right-handed circularly polarized wave signal.

While the invention has been described with reference to the embodiments as above, it is to be understood that the invention be not limited to any of the details of description unless otherwise specified; and various variations, modifications, and combinations will obviously occur to those skilled in the art without departing from the spirit or scope of the following claims.