Semiconductor module

A semiconductor module includes a substrate, two bare chips (semiconductor elements) mounted on the substrate, and a case fixed to the substrate. A conductor pattern and five signal patterns are provided for each bare chip on an upper surface of an insulating substrate. Signal electrodes and the signal patterns of the bare chips are connected to by conductive plates. An insulating member is provided on connecting portions of the conductive plates.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a National Stage of International Application No. PCT/JP2017/018052 filed May 12, 2017, claiming priority based on Japanese Patent Application No. 2016-153084 filed Aug. 3, 2016, the contents of all of which are incorporated herein by reference in their entirety.

TECHNICAL FIELD

The present invention relates to a semiconductor module.

BACKGROUND ART

A semiconductor module in which a control signal electrode (a gate electrode) of a bare chip and a control signal pattern are connected to each other by a conductor is disclosed in Patent Literature 1. A control device is connected to the control signal pattern via a signal terminal. The conductor, which is formed by, for example, bending a metallic plate, is joined to the control signal electrode and the control signal pattern by soldering. As a result, the control signal electrode and the control signal pattern are connected to each other via the conductor.

CITATION LIST

Patent Document

SUMMARY OF INVENTION

Incidentally, the conductor needs to stand on its own before the conductor is joined to the control signal electrode and the control signal pattern by soldering. However, the conductor is a member for transmitting control signals, and small and light. Therefore, there is a risk that the conductor may fall down before the conductor is joined to the control signal electrode and the control signal pattern.

It is an object of the present invention to provide a semiconductor module capable of preventing a falling down of a conductor.

Solution to Problem

A semiconductor module that solves the above problem includes a substrate, a bare chip including a plurality of electrodes disposed on an upper surface of the bare chip and an electrode disposed on a lower surface of the bare chip, the electrode on the lower surface being mounted on the substrate, and a conductor including a first joining portion that is joined to a control signal electrode of the electrodes disposed on the upper surface of the bare chip, a second joining portion that is joined to a control signal pattern on the substrate, and a connecting portion that electrically connects the first joining portion and the second joining portion, and the connecting portion is provided with an insulating member.

According to the above structure, the weight of the insulating member is applied to the conductor, so that the conductor is easily stabilized, as compared with a case where the insulating member is not provided. Therefore, the conductor easily stands on its own even before the conductor is joined to the control signal pattern and the control signal electrode, and the falling down of the conductor is prevented.

The semiconductor module described above may include a plurality of signal electrodes that includes the control signal electrode and is provided for the one bare chip, a plurality of the conductors may be disposed respectively on the plurality of the signal electrodes, and the connecting portions of the plurality of conductors may be fixed by the single insulating member.

As a result, the plurality of conductors is fixed to the one insulating member to form an assembly. Therefore, it is not necessary to position the conductors individually when joining the conductors, so that the plurality of conductors is easily positioned.

According to the semiconductor module described above, the insulating member and the substrate may be in surface contact with each other.

With the configuration in which the insulating member and the substrate are in contact with each other, the falling down of the conductor is further prevented.

According to the semiconductor module described above, the insulating member and the substrate may be bonded to each other.

With the configuration in which the insulating member is bonded to the substrate, the falling down of the conductor is further prevented.

The semiconductor module described above includes a plurality of bare chips, and a plurality of leads is formed integrally with a case, the leads being joined to a separate electrode from a signal electrode of a plurality of electrodes disposed on an upper surface of each of the bare chips. The leads and the separate electrode are joined to each other without contacting with each other.

As a result, the plurality of leads integrated with the case is positioned by the positioning of the case before the leads are joined by a solder to the electrode that is separate from the signal electrode. Therefore, the plurality of leads is disposed collectively.

According to the semiconductor module described above, a joining portion of each of the leads has a round shape.

As a result, a solder that joins each lead and the electrode that is separate from the control signal electrode can form a fillet easily.

Advantageous Effects of Invention

According to the present invention, a falling down of a conductor is prevented.

DESCRIPTION OF EMBODIMENT

An exemplary embodiment of a semiconductor module will be described hereinafter.

As illustrated inFIGS. 1 and 2, a semiconductor module10includes a substrate21disposed horizontally, two bare chips (semiconductor elements)31mounted on the substrate21, and a case61fixed to the substrate21. The semiconductor module10also includes a sealing resin that is not illustrated. InFIGS. 1 to 6, a horizontal plane is defined by X, Y directions that are orthogonal to each other, and a vertical direction is defined by Z direction.

The substrate21includes an insulating substrate22. At two places of the insulating substrate22, through holes23extending through the insulating substrate22in a vertical direction (the Z direction) are provided. One conductor pattern24and five signal patterns25are provided for each of the bare chips31on an upper surface of the insulating substrate22. That is, a total of two conductor patterns24and a total of ten signal patterns25are provided on the insulating substrate22. Each of the signal patterns25extends in the X direction, and the ten signal patterns25are disposed parallel to each other in the Y direction. A pad24ais provided on each conductor pattern24. Further, a pad25aand a pad25bare provided at two places, respectively, of each of the signal patterns25.

The bare chip31is joined to each conductor pattern24. The bare chip31of the present exemplary embodiment is a vertical-type power MOSFET.

As illustrated inFIG. 3, each of the bare chips31includes a source electrode33and signal electrodes34a,34b,34c,34d, and34eas electrodes that are disposed on an upper surface32. The signal electrodes34a,34b,34c,34d, and34eof the plurality of electrodes33,34a,34b,34c,34d, and34eare disposed in the Y direction. That is, the plurality of signal electrodes34a,34b,34c,34d, and34eare provided for each of the bare chips31.

The signal electrode34ais a control signal electrode (a gate electrode). The signal electrodes34band34care positive and negative electrodes for sensing temperatures. The signal electrodes34dand34eare positive and negative electrodes for sensing current.

Areas of the signal electrodes34a,34b,34c,34d, and34eare the same. The area of the signal electrode34ais smaller than an area of the source electrode33, which is a separate electrode from the signal electrode34aof the plurality of electrodes33,34a,34b,34c,34d, and34ethat are disposed on the upper surface32of the bare chip31.

As illustrated inFIG. 2, each of the bare chips31includes a drain electrode36as an electrode disposed on a lower surface35thereof. The drain electrode36is provided over the entire lower surface35. The drain electrode36of each bare chip31is joined to the conductor pattern24by a conductive bonding material (not illustrated), such as a solder.

As illustrated inFIGS. 2 and 3, two conductive plate assemblies41, each of which is formed by integrating five conductive plates (bus bars)42as conductors with one insulating member48, are provided on an upper surface side of the substrate21. The conductive plate42is disposed on each of the plurality of signal electrodes34a,34b,34c,34d, and34e.

The signal electrodes34a,34b,34c,34d, and34eof each bare chip31are connected to the signal patterns25via the conductive plates42. Among the signal patterns25, the signal pattern25that is connected to the signal electrode34avia the conductive plate42is a control signal pattern.

As illustrated inFIG. 2, each conductive plate42is formed by bending a metal plate, and has a rectangular connecting portion43, a first extension portion44, a second extension portion45, a first joining portion46, and a second joining portion47. The connecting portion43extends in the X direction. The extension portions44and45extend downward from opposite end portions of the connecting portion43. The first joining portion46extends in the X direction from a lower end portion of the first extension portion44. The second joining portion47extends in the X direction from a lower end portion of the second extension portion45. The connecting portion43is provided between the first joining portion46and the second joining portion47. The connecting portion43electrically connects the first joining portion46and the second joining portion47via the first extension portion44and the second extension portion45. A dimension of the first extension portion44in the vertical direction (the Z direction) is shorter than a dimension of the second extension portion45in the vertical direction (the Z direction).

Further, as illustrated inFIG. 4, an area of the first joining portion46represented by L1×L2is smaller than an area of the second joining portion47represented by L3×L4. Furthermore, the area of each of the signal electrodes34a,34b,34c,34d, and34erepresented by L11×L12is smaller than an area of the pad25arepresented by L13×L14.

As illustrated inFIGS. 2 and 3, the insulating member48is provided on the connecting portion43of the conductive plates42. One insulating member48is provided for each set of the five conductive plates42, and the connecting portion43of each of the conductive plates42extends through the insulating member48. A part of the insulating member48is located between the first extension portion44and the second extension portion45. The insulating member48is formed of a synthetic resin.

The five conductive plates42are fixed to and integrated with the insulating member48(integrated into an assembly), with the intervals between the conductive plates42in the Y direction maintained. The intervals between the first joining portions46of the conductive plates42are the same as the intervals between the signal electrodes34a,34b,34c,34d, and34eof each bare chip31. The intervals between the second joining portions47of the conductive plates42are the same as the intervals between the pads25aof the signal patterns25.

The conductive plates42are disposed so that the first joining portions46face the signal electrodes34a,34b,34c,34d, and34e, and the second joining portions47face the pads25aof the signal patterns25. Then, the first joining portions46are joined to the signal electrodes34a,34b,34c,34d, and34eby solders51, and the second joining portions47are joined to the pads25aof the signal patterns25by solders52. The solders51form fillets between the signal electrodes34a,34b,34c,34d, and34eand the first joining portions46. Further, a surface of the insulating member48that faces the substrate21is bonded to the insulating substrate22with an adhesive49.

As illustrated inFIGS. 1 and 2, the case61is disposed on the upper surface of the substrate21. The case61includes a main body62that has a square frame shape and two protrusions63that are provided at two corners of the main body62so as to extend from an outer surface of the main body62. A projection64extends downwardly from each of the protrusions63. A spaced distance between the two projections64is the same as a spaced distance between the through holes23provided in the insulating substrate22. In addition, each of the two projections64has such a size as to be insertable into the corresponding through hole23.

The main body62includes a pair of wall portions65and66extending in the X direction and a pair of wall portions70and71extending in the Y direction, and two support walls67and68are provided to extend between the first wall portion65and the second wall portion66that are opposite from each other. Two leads69are fixed to each of the support walls67and68in a state where each lead69extends in the vertical direction (the Z direction).

As illustrated inFIG. 5, each lead69has a column shape with a rounded lower end69a. Specifically speaking, part of each lead69excluding the lower end69ais formed in a square column shape, and the lower end69ais formed in an arc shape. Each lead69extends through the support wall67or68. In addition, each lead69is integrally formed with the case61.

As illustrated inFIGS. 2 and 3, signal terminals72are provided in the third wall portion70of the main body62. Five signal terminals72are provided for each of the bare chips31, that is, a total of ten signal terminals72is disposed in the Y direction.

Each signal terminal72has a bar shape. A lower end of each signal terminal72is bent at a right angle to have an L-shape. The lower end of each of the signal terminals72protrudes toward the inside of the main body62from the third wall portion70. Each of the signal terminals72is integrated with the case61. The leads69and the signal terminals72are provided so as to extend in the vertical direction (the Z direction) from the substrate21. Therefore, the leads69and the signal terminals72do not protrude in the horizontal direction of the substrate21in a plan view of the substrate21.

The two projections64of the case61are inserted into the two through holes23of the insulating substrate22. The wall portions65,66,70, and71of the case61are bonded to the insulating substrate22with an adhesive not illustrated.

Each lead69integrated with the support wall67is located above and approximate to the source electrode33. The lower end69aof each lead69is joined to the source electrode33by a solder53such that the lower end69aand the source electrode33do not contact with each other. In this case, the lower ends69athat are joined to the source electrodes33are joining portions. Each solder53forms a fillet.

Each lead69integrated with the support wall68is located above and approximate to the pad24aof the conductor pattern24. Each lead69is joined to the pad24aby a solder54such that the lead69and the pad24ado not contact with each other. Each solder54forms a fillet.

The lower end of each signal terminal72integrated with the case61is positioned so as to face the pad25bof the signal pattern25. The lower end of each signal terminal72is joined to the pad25bof the signal pattern25by a solder55.

A function of the semiconductor module10of the present exemplary embodiment will be described hereinafter.

When the semiconductor module10is manufactured, the first joining portions46of the conductive plates42are joined to the signal electrodes34a,34b,34c,34d, and34eby soldering, and the second joining portions47of the conductive plates42are joined to the pads25aof the signal patterns25by soldering. A detailed description will be given hereinafter.

As illustrated inFIG. 6, when soldering is performed, solder pastes51aand52aare disposed on the signal electrodes34a,34b,34c,34d, and34eand the pads25a, and the first joining portions46and the second joining portions47of the conductive plates42are disposed on the solder pastes51aand52a, respectively. In this case, the insulating members48are bonded to the insulating substrate22with the adhesive49.

Further, in the present exemplary embodiment, since the leads69and the signal terminals72are also soldered collectively, solder pastes53a,54a, and55aare disposed respectively also on the source electrodes33and the pads24aand25b. Then, the case61is disposed so that the projections64of the case61are inserted into the through holes23of the insulating substrate22, so that the leads69and the signal terminals72are positioned. The lower ends69aof the leads69and the lower ends of the signal terminals72are brought into contact with the solder pastes53a,54a, and55a, respectively.

The solder pastes51a,52a,53a,54a, and55aare melted in a reflow furnace or the like and then hardened, so that the conductive plates42, the leads69, and the signal terminals72are joined by the solders51,52,53,54, and55.

The conductive plates42need to stand on their own on the solder pastes51aand52abefore the conductive plates42are joined by the solders51and52. In the present exemplary embodiment, the weight of the insulating members48is applied to the conductive plates42by disposing the insulating members48on the connecting portions43. Therefore, the weight applied to the substrate21from the conductive plates42increases, as compared with a case where the insulating members48are not provided, so that a center of gravity is stabilized. As a result, the conductive plates42are further prevented from falling down. Further, in the present exemplary embodiment, since the insulating members48are bonded to the insulating substrate22, the falling down of the conductive plates42is further prevented.

Furthermore, there is a risk that a Manhattan phenomenon may occur due to surface tensions of the melted solder pastes51aand52a. However, the occurrence of the Manhattan phenomenon is also prevented by the weight of the insulating member48applied to the conductive plates42.

In particular, when there is a difference in area between the first joining portion46and the second joining portion47in each conductive plate42, the falling down of the conductive plate42and the Manhattan phenomenon are more likely to occur due to the area difference. However, according to the present exemplary embodiment, although there is the difference in area between the first joining portion46and the second joining portion47in each conductive plate42, the falling down of the conductive plate42and the Manhattan phenomenon are prevented by the provision of the insulating member48.

Thus, according to the exemplary embodiment described above, the following effects are obtained.

(1) The insulating members48are provided on the connecting portions43of the conductive plates42. Therefore, the weight of the insulating members48are applied to the conductive plates42, so that the falling down of the conductive plates42before the conductive plates42are joined by the solders51and52is prevented.

(2) The insulating members48are bonded to the insulating substrate22with the adhesive49. As a result, the falling down of the conductive plates42is further prevented.

(3) The plurality of conductive plates42is integrated by the insulating members48. Therefore, it is not necessary to position the conductive plates42individually when joining the conductive plates42and therefore the positioning of the plurality of conductive plates42becomes easier.

(4) The lower ends69aof the leads69are spaced apart from the source electrodes33. As a result, the source electrodes33are prevented from being damaged by contacting with the leads69.

(5) The lower ends69aof the leads69each have the round shape. Therefore, the solders53that join the leads69and the source electrodes33form fillets easily, and the solders54joining the leads69and the pads24aform fillets easily.

(6) Since the conductive plates42are joined to the signal electrodes34a,34b,34c,34d, and34eand the pads25aof the signal patterns25by the solders51and52, the joining of the conductive plates42and joining of the leads69are performed collectively. If the signal electrodes34a,34b,34c,34d, and34eand the pads25aof the signal patterns25are connected to each other by bonding wires, joining of the bonding wires and joining of the leads69need to be performed separately. In a case where the bonding wires are joined after the case61is attached to the substrate21, a case61of an increased size is required for securing the joining region. According to the present exemplary embodiment, the size of the case61does not need to be increased because soldering is performed collectively using the conductive plates42, so that an increase in the size of the semiconductor module10is prevented.

It is to be noted that the exemplary embodiment may be modified as described below.

The insulating members48may not be bonded to the insulating substrate22. In this case, the insulating members48may be or may not be in surface contact with the insulating substrate22. In either case, the weight of the insulating members48is applied to the conductive plates42, so that the falling down of each of the conductive plates42before being joined by the solders51and52is prevented. Further, in a case where the insulating members48are in surface contact with the insulating substrate22, a contact area between the insulating members48and the insulating substrate22is increased, so that the conductive plates42hardly fall down.

Insulating members may be provided individually on the respective conductive plates42. That is, the plurality of conductive plates42may not be integrated.

The number of the conductive plates42may appropriately be changed in accordance with the number of the signal electrodes34a,34b,34c,34d, and34e.

The adhesive for bonding the insulating members48and the insulating substrate22may volatilize in a soldering process or the like.

The insulating members48may be made of a material other than resin, as long as the insulating members48have an insulating property.

The insulating members48may be bonded to the case61.

The lower ends69aof the leads69may be in contact with the source electrodes33.

The leads69and the signal terminals72may not be integrated with the case61.

The lower end69aof each lead69may have a flat shape or the like, that is, each lower end69amay not have the round shape.

Each of the bare chips31may be an insulated gate bipolar transistor (IGBT).

The number of the bare chips31, the number of the conductor patterns24, the number of the leads69, and the like may be changed appropriately.

The insulating member may be provided on a body portion of a chip capacitor having a first joining portion, a second joining portion, and the body portion provided between the first joining portion and the second joining portion.

The areas of the signal electrodes34a,34b,34c,34d, and34emay not be the same.

The intervals between the first joining portions46of the conductive plates42may not be the same as the intervals between the signal electrodes34a,34b,34c,34d, and34eof each bare chip31.

The intervals between the second joining portions47of the conductive plates42may not be the same as the intervals between the pads25aof the signal patterns25.

The area of the first joining portion46may be larger than the area of the second joining portion47.

DESCRIPTION OF REFERENCE NUMERALS