Microcomputer control system in which programs can be modified and newer versions of the modified programs being detected and executed

Programs or data in a mask ROM incorporated in a one-chip microcomputer can be modified from the outside. With version information appended to each of a mask ROM 2 incorporated in a one-chip microcomputer 6 and an external EPROM 5, by comparing the version numbers, programs (tasks and subroutines) of a new version can always be executed and update data of a new version can be used. The programs can be customized for each user.

BACKGROUND OF THE INVENTION

The present invention relates to a microcomputer control system which is controlled on the basis of programs or data stored in memory. A control system in which an incorporated ROM can be modified in a pseudo manner is described in e.g., Japanese Published Unexamined Patent Application No. Hei 7-182153.

The control device comprises a ROM storing a control program for effecting a control procedure and a processing unit that executes the control program to control the device, and further includes a loadable and unloadable nonvolatile memory storing a replacement program to replace part of the control program and replacement specification information indicating whether to carry out the replacement, whereby the control program executes the replacement program in accordance with the replacement specification information. As a result, the program can be modified without replacing the original program ROM.

Although the above-described control device enables program modifications to be made without replacing an original program ROM, since the modifications are determined by replacement specification information stored in a nonvolatile memory, for example, when part of a control program in the original program ROM is modified to newly create an upgraded control unit and a nonvolatile memory is used therein, if the modified portion is replacement specification information, in the nonvolatile memory, for directing replacement with the replacement program, the modified portion would not be used. To prevent this requires an additional nonvolatile memory for the replacement program, provided for modifications to the control program of the program ROM.

As described above, the above-described control device has given no consideration to independent modifications between a control program in an incorporated RON and an external replacement program.

SUMMARY OF THE INVENTION

An object of the present invention is to provide a microcomputer control system which enables independent modifications between a control program or data in an incorporated memory and a replacement program or data in an external memory.

To achieve the above object, the present invention appends version information to a control program or data in an incorporated memory and to a replacement program or data in an external memory, and determines from the version information whether to use the control program or data in the incorporated memory, or the replacement program or data in the external memory.

Without being limited to the version information, the above object of the present invention is achieved by comparing a plurality of programs or pieces of data to determine required programs or data, and based on the results, using internal or external programs or data.

DETAIL DESCRIPTION OF THE INVENTION

Hereinafter, various embodiments of the present invention will be described with reference to the accompanying drawings.

FIG. 1is a block diagram showing an embodiment of a microcomputer control system according to the present invention. InFIG. 1, a one-chip microcomputer6includes a CPU (central processing unit)1, ROM (read only memory)2, RAM (random access memory)3, I/O (input/output) unit4, and is connected to an EPROM (erasable programmable ROM)5by way of address bus7, data bus8, and control bus9.

InFIG. 1, this embodiment comprises a one-chip microcomputer6in which CPU1, ROM2, RAM3, and I/O unit4are formed in one identical chip, and an external EPROM5connected to them by address bus7, data bus8, and control bus9. The CPU1controls the entire system, and a procedure (program) for running the CPU1and data are stored in the ROM2. The ROM2is a memory which is not erasable from the outside and the RAM3is an erasable memory used to save data and the like. The I/O unit4is used to input and output data to and from the outside. In the EPROM5there are stored a program and data which are used to equivalently replace a program and data stored in the ROM2, which is not erasable from the outside.

The CPU1is, within the above chip, linked with the ROM2, RAM3, I/O part4, and EPROM5via the address bus7, which denotes an address signal group, the data bus8, which denotes an input/output data signal group of the CPU1, and the control bus9, which denotes a control signal group, such as read and write signals.

FIG. 2(a) shows the contents of information stored in the ROM2, andFIG. 2(b) shows the contents of information stored in the EPRON5.

InFIG. 2(a), in the ROM2, a reset vector and version information of a version number a are stored in storage areas200and201in an address space, respectively, TASK1a and TASK2a addresses are stored in storage areas202and203, respectively, and TASK1a and TASK2a routines are stored in storage areas204and205, respectively, corresponding to the TASK1a and TASK2a addresses.

InFIG. 2(b), in the EPROM5, identification information (identification code) and version information of a version number b are stored in storage areas210and211, respectively, TASK1b and TASK2b addresses are stored in storage areas212and213, respectively, and TASK1b and TASK2b routines are stored in storage areas214and215, respectively, corresponding to the TASK1b and TASK2b addresses.

FIG. 3is a flowchart showing the operation of this embodiment at power on or reset. Hereinafter, the processing procedure will be described with reference toFIGS. 2 and 3.

At power on or reset, the CPU1issues an address to specify the storage area200in which a reset vector of ROM2is stored; reads the information (namely, a reset vector) from the storage area200, and transfers control to the reset vector (a starting address at which the first program to be operated is stored).

The first program to be executed at power on or reset initializes the internal registers of the CPU1, sets initial conditions of the I/O unit4, internally initializes the RAM3, and performs other initializations (step30).

Next, it is judged whether the EPROM5is connected to the outside (step31). To be more specific, the storage area of the EPROM5is read to check for the existence of data. If the EPROM5is not connected to the outside, control is transferred to step36; if the EPROM5is connected to the outside, it is judged whether the EPROM is the proper EPROM conforming to a microcomputer control system of the embodiment (step32). This is judged by accessing identification information (identification code) (e.g., a hash value or the like generated from, e.g., character code “ΔΔΔΔ” and data and program code within the EPROM5) stored in advance in a predetermined storage area (storage area210in this example) of the EPROM5and checking to see whether the identification information (identification code) is appropriate. If the EPROM5is an EPROM conforming to the microcomputer control system, control is transferred to step36.

When the EPROM5is an EPROM conforming to the microcomputer control system, version information (version number a) stored in the storage area201of the ROM2is compared with version information (version number b) stored in the storage area211of the EPROM5(step33), and if the comparison shows that the version number b of the EPROM5is more recent, control is transferred to step35; if the version number a of the ROM2is more recent, control is transferred to step36(step34).

In step35, the task addresses (in this example, TASK1b in storage area212and TASK2b address in storage area213) stored in the EPROM5are registered in RAM3.FIG. 4shows the contents registered in the RAM3. In this example, since the addresses of tasks stored in the EPROM5are registered in the RAM3, TASK1b and TASK2b addresses are registered in e.g., storage areas40and41, respectively.

In step36, the task addresses (in this example, TASK1a in storage area202and TASK2a address in storage area203) stored in the ROM2are registered in RAM3. In this case, the task addresses registered in the RAM3are different from those shown inFIG. 4; for example, TASK1a and TASK2a addresses are registered in storage areas40and41, respectively.

Tasks registered in the EPROM5or the ROM2are read using the task addresses registered in the RAM3. If the task addresses registered in the RAM3are the TASK1b and TASK2b addresses in the EPROM5as shown inFIG. 4, TASK1 executes a TASK1b routine stored in storage area214of the EPROM5and TASK2 executes a TASK2b routine stored in storage area215of the EPROM5. In this case, the programs and data stored in the EPROM5are executed in place of the programs and data stored in the ROM2.

Conversely, if task addresses registered in the RAM3are the TASK1a and TASK2a addresses in the ROM2, TASK1 executes a TASK1a routine stored in storage area204of the ROM2and TASK2 executes a TASK2a routine stored in storage area205of the ROM2. In this case, the programs and data stored in the ROM2are preferentially used.

Each time the programs and data stored in the ROM2are modified to develop an upgraded microcomputer control system, the version number a of the programs and data is updated. Therefore, even if an external EPROM5is used in a microcomputer control system incorporating the ROM2storing unmodified programs and data, if the version number a is newer than the version number b of the EPROM5, the modified programs and data will be used. Of course, if the programs and data of external EPROM5are modified and the version number b thereof is newer than the version number a of programs and data in the ROM2, the programs and data of the EPROM5are used. In this way, any combination of the version number a of the ROM2and the version number b of the EPROM5becomes possible and the programs and data of the ROM2can be modified independent of those of the EPROM5, and regardless of such a modification, the programs and data of the ROM2and those of the EPROM5are organically linked and used.

The version number a of programs and data in the RON2increases to indicate a newer version in the unit of a certain block, such as100,200,300, and so forth, and the version number b increases with more detailed values, such as101,213,365, and so forth. This always yields a difference between the version numbers a and b, so that which of the versions is newer or older can be determined from the values of the version numbers. Should the version numbers match, the programs and data of the RON2could be used without trouble.

In the embodiment ofFIGS. 2(a) and2(b), it would be more effective in terms of system configuration if each of the storage areas200,201,202,203,210,211,212, and213has a fixed address, which is a fixed absolute value of address in an absolute address space. However, the embodiment of the present invention is not limited to only fixed addresses.

FIG. 5(a) shows the contents of information stored in ROM2in a one-chip microcomputer6respectively another embodiment of a microcomputer control system according to the present invention, andFIG. 5(b) shows the contents of information stored in external EPROM5in the one-chip microcomputer6. The hardware configuration of this embodiment is also the same as that shown inFIG. 1.

InFIG. 5(a), in ROM2, a reset vector and a version number a are stored in storage areas500and501, respectively; in storage area502and the following areas, task addresses are stored together with a version number; and task routines corresponding to the task addresses are stored in storage area506and the following areas. In this embodiment, TASK1a and TASK2a addresses are used as task addresses, and TASK1a and TASK2a routines corresponding thereto are also stored. Further, a TASK1a address is stored in storage area503, a TASK1a version number corresponding thereto is stored in storage area502, a TASK2a address is stored in storage area505, and a TASK2a version number corresponding to thereto is stored in storage area504.

InFIG. 5(b), in EPROM5, an identification code and a version number bare stored in storage areas510and511, respectively; in storage area512and the following areas, task addresses are stored together with a version number; and task routines corresponding to the task addresses are stored in storage area516and the following areas. In this embodiment, TASK1b and TASK2b addresses are used as task addresses, and TASK1b and TASK2b routines corresponding thereto are also Stored. Further, a TASK1b address is stored in storage area513, a TASK1b version number corresponding thereto is stored in storage area512, a TASK2b address is stored in storage area515, and a TASK2b version number corresponding to thereto is stored in storage area514.

Also, in this embodiment, all programs and data are stored in the above format in each of the ROM2and EPROM5. In the embodiment shown inFIGS. 2(a) and2(b), programs and data of either of the ROM2and EPROM5are used by comparing the version numbers a and b and the whole programs and data are replaced, while in the embodiment shown inFIGS. 5(a) and5(b), programs and data stored in the RON2are provided with a version number for each task address as described above, whereby they can be replaced by programs and data stored in the EPROM5partially (that is, on a routine basis). Accordingly, TASK1b and TASK2b routines in the EPROM5can replace TASK1a and TASK2a routines in the ROM2, respectively, and to determine such a correspondence, task versions, task addresses, and task routines are stored in the ROM2and the EPROM5.

Although reset vectors, identification codes, and version numbers a and b are the same as those in the embodiment described previously, in this embodiment, when a version number b of EPROM5assumes a maximum value (e.g., a hexadecimal number FFFF), like the previous embodiment, all tasks execute task routines within the EPROM5, and in other cases, an algorithm dictates that version numbers are compared for each task. Accordingly, like the previous embodiment, when the version numbers a and b are compared, a version number a of the ROM2can be the above maximum value minus e.g., one (e.g., a hexadecimal number FFFE), or without making such a comparison, the version number b can be read to judge whether it is equal to the above maximum value.

When a version number b of the EPRON is not a maximum value, inFIG. 5(a) andFIG. 5(b), a TASK1a version number stored in storage area502of the ROM2is compared with a TASK1b version number stored in storage area512of the EPROM5, and a TASK1 address of the newer version number is registered in the RAM3. If the TASK1a version number is newer, the TASK1a address corresponding thereto is registered in the RAM3. In this example, assuming that the TASK1b version number of the EPROM5is newer, the TASK1b address corresponding thereto is registered in the RAM3.

Similarly, a TASK2a version number stored in storage area504of the ROM2is compared with a TASK2b version number stored in storage area514of the EPROM5, and a TASK1 address of the newer version number is registered in the RAM3. If the TASK2b version number is newer, the TASK2b address corresponding thereto is registered in the RAM3. In this example, assuming that the TASK2a version number of the ROM2is newer, the TASK2a address corresponding thereto is registered in the RAM3.

As a result, as shown inFIG. 6, in the RAM3, the TASK1b address of the EPROM5and the TASK2a address of the ROM2are stored in storage area60as a TASK1 address and in storage area61as a TASK2 address, respectively. Accordingly, TASK1 and TASK 2 execute the TASK1b routine of the EPROM5and the TASK2a routine of the ROM2, respectively.

Of course, if the TASK1a address of the ROM2and the TASK2b address of the EPROM5are registered, the TASK1a routine of the ROM2and the TASK2b routine of the EPROM5will be executed.

This embodiment is also the same as the previous embodiment, in that the programs and data of the ROM2can be modified independent of those of the EPROM5and regardless of such a modification, the programs and data of the ROM2and those of the EPROM5are organically linked and used.

In the embodiment ofFIGS. 5(a) and5(b), it would be more effective in terms of system configuration if each of the storage areas500,501,502,503,504,505,510,511,512,513,514, and515has a fixed address, which is a fixed absolute value of address in an absolute address space. However, the embodiment of the present invention is not limited to only fixed addresses.

By the way, since the access speed of the ROM2of the one-chip microcomputer6is generally higher than that of the external EPROM5, the use of the ROM2in the one-chip microcomputer6is advantageous to the system.FIGS. 7(a) and7(b) show, when the ROM2in the one-chip microcomputer6is used, the contents of information stored in a memory in still another embodiment of a microcomputer control system according to the present invention.FIG. 7(a) shows the contents of information stored in the ROM2within the one-chip microcomputer6andFIG. 7(b) shows the contents of information stored in the external EPROM5. Also, in this embodiment, the hardware configuration is the same as that inFIG. 1.

This embodiment, as in the embodiment described with reference toFIGS. 2(a) and2(b), executes programs and data stored in the ROM2or the EPROM5in accordance with the result of comparison between version numbers a and b. In this embodiment, if some of the subroutines stored in the EPROM5are not subjected to modifications to corresponding subroutines of the ROM2, when programs and data stored in the EPROM5are executed, the subroutines stored in the ROM2can also be used.

Accordingly, on the assumption that, inFIGS. 7(a) and7(b), a processing procedure in the external EPROM5dictates execution of subroutines1,2, and3in that order, the subroutine2is unchanged, and a subroutine2aof the ROM2can be used, subroutines1band3bare stored in e.g., storage areas713and714of EPROM5, and a subroutine2astored in the ROM2is used as a subroutine2b. In storage areas710to712of the EPROM5, subroutine call instructions are stored to call these subroutines. Thus, in storage areas710and712, subroutine1band subroutine3bcall instructions are stored to call subroutines1band3bstored in the EPROM5; and in storage area711, a subroutine2acall instruction is stored to call a subroutine2astored in storage area704of the ROM2.

In this way, by storing subroutine call instructions in the EPROM5, if the EPROM5is newer and programs and data stored therein are used, the subroutines1b,2b, and3bstored in the EPROM5are used by the subroutine1b,2b, and3bcall instructions stored in the EPROM5. In the embodiment ofFIGS. 7(a) and7(b), the subroutine2aof the ROM2is executed as a subroutine by the subroutine2acall instruction.

If the external EPROM5is newer, no special arrangement is necessary because the subroutine addresses of the ROM2are already known. However, it goes without saying that it is more desirable to store the addresses of subroutines1a,2a, and3ain the ROM2as subroutine1a,2a, and3aaddresses, as in this embodiment.

As described above, in this embodiment, like the previous embodiments, the programs and data of the ROM2can be modified independent of those of the EPROM5, and these can be organically liked and used. Moreover, since only modified portions of programs and data of the ROM2have to be stored, the storage capacity can be reduced.

In the embodiment ofFIGS. 7(a) and7(b), it would be more effective in terms of system configuration if each of the storage areas700,701,702has a fixed address, which is a fixed absolute value of address in an absolute address space. However, the embodiment of the present invention is not limited to only fixed addresses. (The storage areas710,711, and712need not be fixedly addressed because they are used for programs optionally placed as required.)

FIGS. 8(a) and8(b) show an embodiment to which storage areas251,252,261, and262are added to the embodiment ofFIGS. 2(a) and2(b).

FIG. 8(a) shows the contents of information stored in the ROM2within the one-chip microcomputer6representing still another embodiment of a microcomputer control system according to the present invention, andFIG. 8(b) shows the contents of information stored in the external EPROM5in the same microcomputer control system. The hardware configuration of this embodiment is also the same as that shown inFIG. 1.

InFIG. 8(a), in the RON2, a TASK?a address is stored in storage area251and a TASK?a routine corresponding to the TASK?a address is stored in storage area252.

InFIG. 8(b), in the EPROM5, a TASK?b address is stored in storage area261and a TASK?b routine corresponding to the TASK?b address is stored in storage area262.

The TASK?a routine is a task not having processing substance and the TASK?b routine is a task having processing substance. When the ROM2is fabricated, the system is configured so as not to run into trouble depending on the existence or absence of the TASK?a routine, but if the TASK?b routine of the EPROM5is added to the system, the TASK?b routine will be newly executed.

As described above, if the TASK?b routine is added, an address is registered in the RAM3as shown inFIG. 9. That is, storage area42is added to the embodiment ofFIG. 4and the TASK?b address is registered in the storage area42.

Of course, if it is unnecessary to newly add processing, the TASK?b routine might be registered as a task not having processing substance. Alternatively, an address (e.g., address 0) which is impossible in the system configuration might be set as a TASK?b address. The setting of an address which is impossible in the system configuration, such as the TASK?b address, although the legality of a task address must be judged each time the task is used, poses no problem in terms of system configuration because, if a set address is e.g., address 0, it can be easily determined whether a set address is 0 or not.

In the embodiment ofFIGS. 8(a) and8(b), it would be more effective in terms of system configuration if each of the storage areas251and261added to the embodiment ofFIG. 2has a fixed address, which is a fixed absolute value of address in an absolute address space. However, the embodiment of the present invention is not limited to only fixed addresses.

FIGS. 10(a) and10(b) illustrated an embodiment to which storage areas551,552,553,561,562, and563are added to the embodiment ofFIGS. 5(a) and5(b).

FIG. 10(a) shows the contents of information stored in the ROM2within the one-chip microcomputer6in yet another embodiment of a microcomputer control system according to the present invention, andFIG. 10(b) shows the contents of information stored in the external EPROM5in the same microcomputer control system. The hardware configuration of this embodiment is also the same as that shown inFIG. 1.

InFIG. 10(a), in the ROM2, a TASK?a address is stored in storage area552and a TASK?a routine corresponding to the TASK?a address is stored in storage area553. A version number corresponding to the TASK?a routine is stored in storage area551, which is allocated immediately before storage area552in which the TASK?a address is stored.

InFIG. 10(b), in the EPROM5, a TASK?b address is stored in storage area562and a TASK?b routine corresponding to the TASK?b address is stored in storage area563. A version number corresponding to the TASK?b routine is stored in storage area561, which is allocated immediately before storage area562in which the TASK?b address is stored.

The TASK?a routine is a task not having processing substance and the TASK?b routine is a task having processing substance. When the ROM2is fabricated, the system is configured so as not to run into trouble depending on the existence or absence of the TASK?a routine, but if the TASK?b routine of the ROM2is added to the system, the TASK?b routine will be newly executed.

As described above, if the TASK?b routine is added, an address is registered in the RAM3as shown inFIG. 11. That is, storage area62is added to the embodiment of 6 and the TASK?b address is registered in the storage area62.

Of course, if it is unnecessary to newly add processing, the TASK?b routine might be registered as a task not having processing substance, or the TASK?b version number might be set to an old version number (e.g., 0) to register the TASK?a routine. Alternatively, an address (e.g., address 0) which is impossible in the system configuration might be set as a TASK?b address. The setting of an address which is impossible in the system configuration as the TASK?b address, although the legality of a task address must be judged each time the task is used, poses no problem in terms of system configuration because, if a set address is e.g., address 0, it can be easily determined whether a set address is 0 or not.

In the embodiment ofFIGS. 10(a) and10(b), it would be more effective in terms of system configuration if each of the storage areas551and561added to the embodiment ofFIG. 5has a fixed address, which is a fixed absolute value of address in an absolute address space. However, the embodiment of the present invention is not limited to only fixed addresses.

The techniques inFIGS. 8(a) to11enable processing to be added by the EPROM5even after fabrication of the ROM2, contributing to addressing situations unexpected during fabrication of the ROM2.

FIGS. 12(a) and12(b) show a method of registering to the RAM3which is different from that shown inFIGS. 4,6,9, and11. A task registration table (8 bits in 'the case of this embodiment) is provided to provide a correspondence between tasks and bits. Numeral0denotes tasks stored in the internal ROM2and1denotes tasks stored in the external EPROM5. The most significant bit (bit7) is a bit to indicate the existence of the external EPROM5; numeral0denotes that no external EPROM5exists, and1denotes that the external EPROM5exists.

FIG. 12(a) gives information equivalent to that inFIG. 6. That is, since a bit (the least significant bit0) corresponding to TASK1is 1, TASK1b stored in the external EPROM5is used, and since a bit (bit1) corresponding to TASK2is 0, TASK2a stored in the internal ROM2is used.

Similarly,FIG. 12(b) gives information equivalent to that inFIG. 11. ToFIG. 12(a) is added a bit (bit2) corresponding to TASK? added toFIG. 6. That is, since a bit (bit2) corresponding to TASK? Added toFIG. 6is 1, TASK?b stored in the external EPROM5is used.

It goes without saying that if all' the bits of corresponding tasks are1inFIGS. 12(a) and12(b), the information therein will be equivalent to that inFIGS. 4 and 9.

The embodiment ofFIGS. 12(a) and12(b) is more advantageous than those ofFIGS. 4,6,9, and11, in that smaller storage areas occupy the internal RAM3.

FIG. 13is a block diagram showing another embodiment of the present invention, in which an external device10is connected to the embodiment ofFIG. 1. The same components as those ofFIG. 1are assigned the same numbers. Address buses and control buses are omitted. InFIG. 1, an EPROM is used, while inFIG. 13, an electrically erasable flash memory11is used.

Information from the external device10is transferred to the data bus8of the one-chip microcomputer6via an interface12and stored in the flash memory11.

FIG. 14shows the process of storing information to the flash memory11. The same processing contents as those of the flowchart ofFIG. 3are assigned the same reference numerals.

A description will be made of the processing which is different from the processing contents inFIG. 3.

(Step141) Confirm the connection of an external device10. With an external device which operates to read an information recording medium, such as a CD-ROM, when an information recording medium is not mounted in the device, it is judged that no. external device is connected, because information cannot be read.

(Step142) Read information (identification information and version information) from the external device10and store it in the internal RAM3. If information (identification information and version information) is not stored in the flash memory11, store it directly in the flash memory11and go to step146.

(Step143) Judge whether the information stored in the internal RAM3is proper information (identification information). As proper information, for example, a copyright indication recorded in a volume descriptor of CD-ROM can be used. For other than proper information, go to step147, and for proper information, compare version information (version number) stored in the internal RAM3and version information (version number) stored in the flash memory11(step144).

As a result of the comparison performed in step142, if the version information stored in the internal RAM3is newer, go to step146, and if the version information stored in the flash memory11is newer, go to step147(step146).

(Step146) Read information (identification information and version information) from the internal RAM3and store it in the flash memory11, then additionally read a processing program (task) having a changed version from the external device10and additionally store it in the flash memory11.

If the information (identification information and version information) was, in step142, stored directly in the flash memory11because it had not been stored in the flash memory11, additionally read a processing program (task) having a changed version from the external device10and additionally store it in the flash memory11.

(Step147) Terminate the processing. After this, according to the same processing procedure (replace the EPROM inFIG. 3by the flash memory) as that ofFIG. 3, register a task address of the external flash memory11or a task address of the internal ROM2in the internal RAM3.

In this embodiment, as an information recording medium, there can be used pressed CD-ROM disks, DVD-ROM disks, write-once CD-R disks, DVD-R disks, erasable CD-RW disks, and DVD-RAM disks, and the use of these media would make additional operations on version changes simpler than the use of an EPROM. Although this embodiment assumes, as an external device, the use of an information reproducing device that reads information from an information recording medium such as a CD-ROM, it is apparent that the use of devices for receiving and reproducing information transferred by broadcasting or communications would not depart from the scope of the present invention.

In the embodiment ofFIG. 13, the system can be built in a manner that stores the control program or data only in the flash memory11without storing version information and the control program or data in the internal ROM2.

In this case, the relationship between the internal ROM2and EPROM5inFIG. 3can be considered the same as that between the flash memory11and external device10. Accordingly, the system would effectively use the control program or data stored in the flash memory11.

FIG. 15is a block diagram showing an embodiment in which DRAM13is appended to the embodiment ofFIG. 13.

In the embodiment ofFIG. 15, the control program or data stored in a DRAM13, moved from a flash memory11, is used. In this embodiment, the control program or data stored in the flash memory11is an encrypted control program or data, while a decrypted control program or data is stored in the DRAM13.

When version information is also encrypted, it is decrypted only when it must be used for comparison, to judge whether to store it in the flash memory11.

In the embodiment ofFIG. 15, after comparison of version information, the control program or data with the most recent version is stored in the flash memory11in an encrypted form.

A flow of actual processing will be described with reference to the flowchart ofFIG. 16.

(Step161) Read encrypted information (identification information, version information, control program, data, etc.) stored in the external flash memory11into the internal RAM3.

(Step162) Decrypt the read encrypted information and store it in the external DRAM13.

(Step163) Terminate the processing. After this, according to the same processing procedure (replace the EPROM inFIG. 3by the DRAM) as that ofFIG. 3, register a task address of the external DRAM13or a task address of the internal ROM2in the internal RAM3.

Although the amount of data read in a single read from the flash memory11in step161is limited by the buffer capacity of the internal RAM3, if an encryption operation can be completed within the buffer capacity, the above processing can be successfully performed by repeating steps161and162a certain number of times.

The use of encrypted information prevents the contents of the flash memory11from leaking to the outside, and furthermore, the decrypted information stored in the DRAM13is lost at power off because of a refresh operation specific to the DRAM. A processing program for decryption is stored in the internal ROM2so that it cannot be easily read from the outside, providing security for the system. Each, time the power is turned on, the processing ofFIG. 16is necessary.

In the embodiment ofFIG. 15, the system can be built in a manner such that the control program or data is stored only in the DRAM13without storing version information and the control program or data in the internal ROM2.

In this case, the relationship between the internal ROM2and EPROM5inFIG. 3can be considered the same as that between the DRAM13and external device10. Accordingly, the system would effectively use the control program or data stored in the DRAM13.

For identical version information (where the control program or data is by nature unchanged), its contents can be made different depending on revision information (revision number). Table 1 is an embodiment showing a concrete example of this.

Table 1 shows an embodiment in which the languages used differ depending on the revision numbers.

All data corresponding to the revision numbers is provided in the EPROM5, flash memory11, or DRAM13; and, when the version number is the same and only the revision number is different, only the revision number of the control program or data stored in the EPROM5, flash memory11, or DRAM13has to be changed.

However, an algorithm for changing the language to be used, depending on the revision number, must be incorporated in the control program.

Although Table 1 uses revision numbers to identify languages, the revision numbers can also be used to identify countries (Japan, the United States, Chinese, etc.) to use the system, functions (function A, function A+B, etc.) and users (for company A use, for company B use, etc.).

When the above embodiments are used by users for their individual uses, with the microcomputer6standardized (programs and data stored in the ROM2are standardized), the embodiments can be customized for each user by the external EPROM5, flash memory11, or DRAM13. In this case, as shown inFIGS. 5(a) and5(b) andFIGS. 10(a) and10(b), only tasks to be customized might be installed in the EPROM5, flash memory11, or DRAM13. Alternatively, as shown inFIGS. 7(a) and7(b), only subroutines to be customized might be installed, in the EPROM5, flash memory11, or DRAM13.

In the above embodiments, although a description has been made of the updating of processing, programs (tasks and subroutines) in the ROM2and external EPROM5within the one-chip microcomputer6, it is apparent that the updating of data stored in the ROM2can be supported by the EPRON5, flash memory1, or DRAM13.

Furthermore, in the above embodiments, although a non-erasable mask ROM has been used as a, ROM2, a memory such as an erasable EPROM and a flash memory might also be used, and although an erasable EPROM memory, flash memory11, or DRAM13has been used as an external memory, a non-erasable mask ROM might also be used.

In the above embodiments, although the addresses of programs (tasks and subroutines) to be executed have been registered in the RAM2of the one-chip microcomputer6, the programs (tasks and subroutines) themselves to be executed, as well as the addresses, could alternatively be registered as items of information to be registered. Also, in a RAM, flash memory, DRAM, etc., the addresses of programs (tasks and subroutines) and the programs (tasks and subroutines) themselves to be executed can be registered. Such a RAM, flash memory, DRAM, etc., is connected external of the one-chip microcomputer6.

Although version information is used in the foregoing description of the embodiments according to the present invention, programs, data information, and the like can be used for comparison without being confined to version information. For example, there can be used comment statements, copyright indication, program size, data size, program starting address, data starting address, and other information within programs or data.

As has been described below, according to the present invention, since a version number in a ROM within a one-chip microcomputer is compared with a version number in an external EPROM, flash memory, or DRAM, programs (tasks and subroutines) of a new version can always be executed and update data of a new version can be used. Also, the programs can be customized for each user.

Also, since only programs or data to be updated or modified is added to the outside, the programs or data to be added can be brought into a minimum size.

Since information in programs or data as well as version information can be used for comparison, version information can be made useless.