An apparatus has multiple sets of independently addressable interdigitated nanowires. Nanowires of a set are in electrical communication with other nanowires of the same set and are electrically isolated from nanowires of other sets.

FIELD

The embodiments disclosed herein generally relate to nanowires, and more particularly to independently addressable interdigitated nanowires.

BACKGROUND

Nanoscale dipole antennas have been fabricated to be resonant at optical frequencies. Because optical antennas link propagating radiation and confined/enhanced optical fields they have found applications in optical characterization, manipulation of nanostructures, optical information processing, and other electrical applications.

However, the precision required for nanometer-scale manufacturing has limited the ability of nanoscale dipole antennas. This is because individual dipole antennas lack the efficiency and sensitivity needed to render them useful in real-world applications, and current fabrication techniques do not allow a large number of dipole nanowire antennas to be disposed in a small region. Thus, the creation of a high density dipole antenna array is not possible with current techniques.

SUMMARY

An apparatus including multiple sets of nanowires is disclosed herein. The apparatus may include a first set of nanowires and a second set of nanowires interdigitated with the first set of nanowires. The first set of nanowires may be independently addressable from the second set of nanowires. In addition, the first set of nanowires may be electrically isolated from the second set of nanowires.

DETAILED DESCRIPTION

An apparatus having multiple sets of interdigitated nanowires, where each set of nanowires is independently addressable from each other set of nanowires is disclosed. A set of nanowires refers to at least two nanowires, which are in electrical communication with each other. Electrical communication may be defined to include that the same electric current may flow to both a first nanowire and a second nanowire in the same set of nanowires.

The apparatuses described herein contain at least two sets of nanowires, where each set may allow a separate and independent electrical current to flow through the set. Therefore, the sets of nanowires are independently addressable, which generally indicates that one set of nanowires may be addressed without addressing another set of nanowires. The term “address” generally refers to any contact or communication with a set of nanowires. For example, one set of nanowires may be induced to conduct an electric current, while another set of nanowires may be induced to conduct another electric current. The two sets of nanowires may be insulated from each other, or otherwise electrically isolated from each other, such that the electric current is substantially prevented from flowing from one set of nanowires to another set of nanowires, to thereby substantially prevent electric shunting between the two sets of nanowires.

In another example, independently addressing sets of nanowires may include monitoring one set of nanowires without monitoring another set of nanowires on the same apparatus. Alternatively, both sets of nanowires may be monitored simultaneously to receive independent readings from each set of nanowires.

The term “interdigitated” may be defined to include that the two sets of nanowires are commingled with each other. The sets of nanowires may be interdigitated with each other in any geometrical pattern, configuration, or spatial relationship, as will be described in greater detail below. For example, one set of nanowires may be interwoven with another set of nanowires in an alternating “one-for-one” pattern.

The term “nanowire”, as used herein, generally refers to a nanostructure characterized by at least one, and preferably at least two physical dimensions that are less than about 500 nm, preferably less than about 200 nm, more preferably less than about 150 nm or 100 nm, and most preferably less than about 50 nm or 25 nm or even less than about 10 nm or 5 nm. Nanowires typically have one principle axis that is longer than the other two principle axes and consequently have an aspect ratio greater than one, more preferably an aspect ratio greater than about 10, still more preferably an aspect ratio greater than about 20, and most preferably an aspect ratio greater than about 100, 200, or 500 nm.

The nanowires may have any reasonably suitable length and, in certain embodiments, the nanowires may range in length from about 10 nm to about 100 μm, from about 20 nm to about 20 μm, from about 100 nm to about 10 μm, or from about 20 nm or 50 nm to about 500 nm. In addition, the nanowires may have a length less than about 1 μm, less than about 500 nm, less than about 250 nm, or less than about 100 nm.

The nanowires may have any reasonably suitable diameter and may typically have diameters ranging from about 5 to 200 nm. Although precise uniformity of the diameters of the nanowires is not required, in certain embodiments, nanowires may have a substantially uniform diameter, such that essentially no substantial tapering or modulation of the diameter occurs along the length of the nanowire. In particular embodiments, the diameter may have a variance less than about 20%, more preferably less than about 10%, still more preferably less than about 5%, and most preferably less than about 1% over the region of greatest variability and over a linear dimension of at least 5 nm, preferably at least 10 nm, most preferably at least 20 nm, and most preferably at least 50 nm. The diameter of the nanowire may be adjusted to provide any desired surface to volume ratio for optimum detection by controlling the diameter of the metal nanoparticles used to form the nanowires. In addition, the lengths and diameters of the nanowires may be varied to alter the radiative power and/or the overall power and impedance of the nanowire antenna driven at a certain frequency. The dimensions of the nanowires may also be influenced by a masking pattern when forming nanowires by a top-down or deposition method.

The nanowires may comprise pure materials, substantially pure materials, be single crystalline, substantially crystalline, non-crystalline, amorphous, crystalline combined with an amorphous or semiamorphous domain, doped materials and the like, and may include insulators, conductors, and semiconductors. Where the nanowires are doped, any particular doped region may act/function as though it is homogeneously doped with respect to its electrical, and/or optical, and/or magnetic, and/or thermal properties.

Nanowires may be created by any reasonably suitable top-down or bottom up method of fabrication, including chemical vapor deposition (CVD), modified chemical vapor deposition (MOCVD), vapor-liquid-solid (VLS), electrodeposition, electroless deposition, etc., techniques. By way of a bottom up example, metal nanoparticles may be formed and grown on a substrate. The formation and growth of metal nanoparticles on semiconductor substrates is known, and is disclosed, for example, in U.S. patent application Ser. No. 10/281,678, filed Oct. 28, 2002, to Kamins et al., and U.S. patent application Ser. No. 10/690,688, filed Oct. 21, 2003, to Kamins et al., the contents of both of which are incorporated herein by reference in their entireties.

Nanowires may also be formed horizontally such that they bridge two terminals, such as two electrodes. Suitable methods of forming bridging nanowires are disclosed, for example, in U.S. patent application Ser. No. 11/022,123 filed Dec. 23, 2004, to Kamins et al., Islam, Saif M., “Ultrahigh-Density Silicon Nanobridges Formed Between Two Vertical Silicon Surfaces,” Nanotechnology 15, L5-L8 (Jan. 23, 2004), and Islam, Saif M., “A Novel Interconnection Technique For Manufacturing Nanowire Devices,” Appl. Phys. A80, 1133-1140, Mar. 11, 2005, all of which are incorporated herein by reference in their entireties.

FIG. 1illustrates a partial cross-sectional side view of an apparatus100having two sets of interdigitated nanowires,102,104, where the sets of nanowires102,104are independently addressable and electrically isolated from each other, according to an embodiment. Some of the elements inFIG. 1are depicted with different types of shading to better distinguish the different elements from each other. In addition, the apparatus100may include additional components and some of the components described herein may be removed and/or modified without departing from a scope of the apparatus100.

As shown inFIG. 1, the first set of nanowires102and the second set of nanowires104are interdigitated with each other in a regular “one for one” alternating pattern across the horizontal axis of the apparatus100. That is, each nanowire103of the first set of nanowires102is depicted as being adjacent to a nanowire107of the second set of nanowires104. This spatial configuration is depicted as repeating in a regular pattern. However, it should be understood that the first and second sets of nanowires102and104may be interdigitated in any regular or irregular manner or pattern.

In other embodiments, therefore, two nanowires103of the first set of nanowires102may be adjacent to each other in one section of the apparatus100, while three or more nanowires103of the first set of nanowires102may be adjacent to each other in another section of the apparatus100. Similarly, the nanowires103,107of both the first and second sets of nanowires102and104may be any distance from each other and the distances between nanowires103,107may be substantially consistent or varied.

According to the embodiment depicted inFIG. 1, the first set of nanowires102extends from an electrically conductive substrate106. The electrically conductive substrate106may be any reasonably suitable material, which conducts an electric current and may be a substantially homogenous material or a heterogeneous material comprising any reasonably suitable combination of materials. The electrically conductive substrate106may be similar to the material that makes up the first set of nanowires102. For example, the electrically conductive substrate106may be silicon or doped silicon, germanium or doped germanium, or the electrically conductive substrate106may comprise a metal.

In addition, the electrically conductive substrate106may be provided in any reasonably suitable dimensions, including any reasonably suitable length, width, and thickness. While the electrically conductive substrate106has been depicted inFIG. 1as a single layer, the electrically conductive substrate106may include multiple layers without departing from a scope of the apparatus100.

The electrically conductive substrate106generally allows the nanowires103of the first set of nanowires102to be in electrical communication with each other. That is, an electric current may flow from one nanowire103of the first set of nanowires102to all the other nanowires103of the first set of nanowires102by virtue of the fact that all of the nanowires103of the first set of nanowires102are in physical connection with the electrically conductive substrate106.

As also shown inFIG. 1, an insulator layer108is provided on the electrically conductive substrate106. The insulator layer108may be any reasonably suitable material, which inhibits the flow of an electric current. The insulator layer108may be a substantially homogenous material or a heterogeneous material comprising any reasonably suitable combination of materials. For example, the insulator layer108may be silicon dioxide, aluminum oxide, or the like.

The insulator layer108of the apparatus100coats portions of the nanowires103of the first set of nanowires102and may deposited through, for instance, CVD, PVD, ALD, electrodeposition, etc. Portions of the nanowires103of the first set of nanowires102refers to any portion of the nanowires103of the first set of nanowires102, including, for example, the entire outer circumference of the nanowires103of the first set of nanowires102or any lesser portion thereof. BecauseFIG. 1is a cut-away, partially cross-sectional view of the apparatus100, the insulator layer108coating the entire circumference of the nanowires of the first set of nanowires102is not illustrated. However, portions of the terminal ends105of the nanowires103of the first set of nanowires102, opposite the electrically conductive substrate106, are not coated by the insulator layer108.

As mentioned above, the apparatus100includes a second set of nanowires104, which are disposed on the insulator layer108. The second set of nanowires104may be substantially similar to the nanowires103of the first set of nanowires102in that they may be formed from the same materials or combination of materials. Alternatively, however, the nanowires107of the second set of nanowires104may be dissimilar from the nanowires103of the first set of nanowires102.

In any regard, the nanowires107of the second set of nanowires104may extend beyond the height of the nanowires103of the first set of nanowires102, because the second set of nanowires104may have substantially similar physical dimensions as the nanowires of the first set of nanowires102; however, the second set of nanowires104extends from a different vertical level than the first set of nanowires102. Alternatively, however, the physical dimensions of the second set of nanowires104may be different from the first set of nanowires104. For example, the second set of nanowires104may be reduced in height to render both sets of nanowires102and104to be substantially equivalent in height.

The apparatus100includes an electrically conductive layer110disposed on the insulator layer108. The electrically conductive layer110may be any reasonably suitable material or combination of materials capable of facilitating the flow of an electric current. The electrically conductive layer110may be the same material as the electrically conductive substrate106or may be different from the electrically conductive substrate106. In this regard, the electrically conductive layer110may be silicon or doped silicon, germanium or doped germanium, or the electrically conductive substrate110may comprise a metal.

The electrically conductive layer110allows the nanowires107of the second set of nanowires104to be in electrical communication with each other. That is, an electric current may flow from one nanowire107of the second set of nanowires104to all the other nanowires107of the second set of nanowires104by virtue of the fact that all the nanowires107of the second set of nanowires104are in physical contact with the electrically conductive layer110.

However, the second set of nanowires104is independently addressable from the first set of nanowires102, because the nanowires103of the first set of nanowires102are coated with the insulation layer108and, therefore, are not in physical contact or electrical communication with the second set of nanowires104. In addition, therefore, the nanowires103of the first set of nanowires102are electrically isolated from the nanowires107of the second set of nanowires104.

The first and second sets of nanowires102and104may be brought into electrical communication by an external device109. The external device109includes any material or instrument capable of facilitating an electrical connection between the first and second sets of nanowires102and104, thereby allowing an electric current to pass between the first and second sets of nanowires102and104. The external device109may also include any device capable of measuring an electrical property of the first and second set of nanowires102and104. Other devices, such as driving power sources, amplifiers, analyzers, etc. may also be used in conjunction with the apparatus100. The apparatus100may, for instance, include a computer or any device used in probe stations.

Although the electrically conductive layer110has been illustrated inFIG. 1as being deposited after deposition or growth of the nanowires107, according to another embodiment, the electrically conductive layer110may be deposited on the insulator layer108prior to deposition or growth of the nanowires107without departing from a scope of the apparatus100. This embodiment is disclosed in greater detail herein below.

FIGS. 2A-Ecollectively illustrate a method of forming the apparatus100depicted inFIG. 1, according to an embodiment.FIGS. 2A-Ealso depict some of the elements with different types of shading to better distinguish the different elements from each other. InFIG. 2A, the first set of nanowires102is provided on the electrically conductive substrate106. In one embodiment, the first set of nanowires102may be grown on the electrically conductive substrate106as discussed above. Similarly, as previously set forth, the first set of nanowires102may be formed from any reasonably suitable materials or combination of materials, and may be selectively doped or coated with any reasonably suitable material or combination of materials. For instance, the nanowires103of the first set of nanowires102may have functionalized regions, such as those described in U.S. patent application Ser. No. TBD, filed on TBD, which is hereby incorporated by reference in its entirety.

InFIG. 2B, the insulator layer108may be deposited on the electrically conductive substrate106and at least portions of the first set of nanowires102through, for instance, CVD, PVD, ALD, electrodeposition, electroless deposition, etc. According to an embodiment, the insulator layer108may be grown from a material, such as silicon, provided on the electrically conductive substrate106and portions of the first set of nanowires102, and the material may be oxidized to form an oxide, such as silicon dioxide. According to another embodiment, the insulator layer108may be deposited using any of the deposition techniques discussed above.

In any regard, the insulator layer108may be selectively applied to portions of the first set of nanowires102or the insulator layer108may be deposited over all surfaces of the electrically conductive substrate106and the first set of nanowires102. If the insulator layer108is coated over the entire surface of the electrically conductive substrate106and the first set of nanowires102, the insulator layer108may be removed from portions of the electrically conductive substrate106or the first set of nanowires102, such as from portions of the terminal ends of the nanowires of the first set of nanowires102, opposite the electrically conductive substrate106through etching, polishing, or the like.

InFIG. 2C, the second set of nanowires104is provided on the insulator layer108. The second set of nanowires104may be grown or deposited on the insulator layer108, through, for instance, the same methods discussed above with respect to the first set of nanowires102. In addition, the material used to create the second set of nanowires104may be the same as, or may differ from, the first set of nanowires102, and may include any of the materials discussed above. The second set of nanowires104may not have the ordered configuration depicted inFIG. 1because the insulator layer108may comprise an amorphous substrate.

InFIG. 2D, the electrically conductive layer110is deposited on the insulator layer108. The electrically conductive layer110may coat all of surfaces of the insulator layer108, and may also coat the second set of nanowires104. However, the terminal ends111of the nanowires107of the second set of nanowires104, opposite the insulator layer108, may remain uncoated by the electrically conductive layer110. Alternatively, the terminal ends111of the nanowires of the second set of nanowires104may be etched or polished to remove any electrically conductive layer110deposited thereon.

According to another embodiment, the steps depicted inFIGS. 2C and 2Dmay be reversed. In this embodiment, the electrically conductive layer110may be deposited onto the insulator layer108and the second set of nanowires104may be grown on the electrically conductive layer110or otherwise deposited onto the electrically conductive layer110. By growing the second set of nanowires104on the electrically conductive layer110, the ordered configuration of the nanowires depicted inFIG. 1may more readily be achieved.

FIG. 2Eillustrates an optional step of covering the apparatus100in an insulator material112. The insulator material112may be any reasonably suitable material or combination of materials, such as silicon dioxide, nitride, aluminum oxide, etc. The insulator material112may be used to provide a protective coating over the apparatus100. In addition, the insulator material112may be removed from portions of the apparatus100, such as the terminal ends of the first and second sets of nanowires102and104by any reasonably suitable method, such as through polishing and/or etching.

Turning now toFIG. 3, there is illustrated a cross-sectional side view of an apparatus300having two sets of interdigitated nanowires, where one set of nanowires is independently addressable from the other set of nanowires, according to another embodiment. Some of the elements inFIG. 3are depicted with different types of shading to better distinguish the different elements from each other. The apparatus300may include additional components and some of the components described herein may be removed and/or modified without departing from a scope of the apparatus300.

As shown, the apparatus300includes a first set of nanowires302and a second set of nanowires304. The first set of nanowires302and the second set of nanowires304are interdigitated with each other in a regular “one for one” alternating pattern along the horizontal axis of the apparatus300. However, a person having ordinary skill in the art will appreciate that the first and second sets of nanowires302and304may be interdigitated in any regular or irregular manner, as set forth above.

According to the embodiment depicted inFIG. 3, the first set of nanowires302extends from an electrically conductive substrate306. The electrically conductive substrate306may be any material, which conducts an electric current similar to the electrically conductive substrate106discussed above.

The electrically conductive substrate306generally enables electrical communication between the nanowires303of the first set of nanowires302. That is, an electric current may flow from one nanowire303of the first set of nanowires302to all the other nanowires303of the first set of nanowires302.

An insulator layer308is provided on the electrically conductive substrate306. The insulator layer308may be any material, which inhibits the flow of an electric current and may be similar to the insulator layer108discussed above. In addition, the insulator layer308may be formed of a first insulator layer310and a second insulator layer312, as described herein below.

The apparatus300also includes a second set of nanowires304, which is substantially encapsulated in the insulator layer308, but extends beyond the insulator layer308. According to an embodiment, the nanowires305of the second set of nanowires304may be formed from different materials or different combinations of materials than the materials used to form the nanowires303of the first set of nanowires302. For example, the first set of nanowires302may be substantially metallic, while the second set of nanowires304may be formed from a semiconductor material, such as silicon, doped silicon, germanium or doped germanium. According to another embodiment, the nanowires305of the second set of nanowires304may comprise the same or similar materials as the nanowires303of the first set of nanowires302.

The apparatus300also includes an electrically conductive layer314disposed along the uppermost portion of the apparatus300. The electrically conductive layer314generally allows the nanowires305of the second set of nanowires304to be in electrical communication with each other. That is, an electric current may flow from one nanowire305of the second set of nanowires304to all the other nanowires305of the second set of nanowires304.

The first and second sets of nanowires302and304may be brought into electrical communication with each other by an external device324. The external device324includes any material or instrument capable of facilitating an electrical connection between the first and second sets of nanowires302and304, thereby allowing an electric current to pass between the first and second sets of nanowires302and304. The external device324may also include any device capable of measuring an electrical property of the first and second set of nanowires302and304. Other devices, such as driving power sources, amplifiers, analyzers, etc. may also be used in conjunction with the apparatus300. The apparatus300may, for instance, include a computer or any device used in probe stations.

FIGS. 4A-Gcollectively illustrate a method of forming the apparatus300depicted inFIG. 3, according to an embodiment. Some of the elements inFIG. 4are depicted with different types of shading to better distinguish the different elements from each other.

InFIG. 4A, a first layer of insulator layer310is provided on the electrically conductive substrate306. The first insulator layer310and the electrically conductive substrate306may be formed from any reasonably suitable materials and may be provided in the layered relationship illustrated inFIG. 4Aby any reasonably suitable manner. For example, the first insulator layer310and the electrically conductive substrate306may be fused or bonded together. As another example, the first insulator layer310may be grown on top of the electrically conductive substrate306. As a further example, the first insulator layer310may be deposited onto the electrically conductive substrate306.

InFIG. 4B, the nanowires305of the second set of nanowires304are grown or deposited on the first insulator layer310. The nanowires305may be grown or deposited by any reasonably suitable method and with any reasonably suitable materials, including those methods and materials referenced above. Similarly, as previously set forth, the nanowires305may be formed from any materials or combinations of materials, and may be selectively doped or coated with any material or combination of materials. Because the insulator layer310may comprise an amorphous substrate, the second set of nanowires304may not have the ordered configuration depicted inFIG. 3. In addition, if the nanowires305are deposited onto the first insulator layer310, the nanowires305may be deposited as a layer and may be patterned and etched to form the nanowires305.

InFIG. 4C, a second insulator layer312is provided on top of the first insulator layer310and encapsulates the second set of nanowires304. In one embodiment, the second insulator layer312includes the same material used to form the first insulator layer310. In another embodiment, the second insulator layer312includes a material that is different from the first insulator layer310. In any regard, the second insulator layer312may be deposited or grown on the first insulator layer310in manners as discussed above with respect to the first insulator layer310.

InFIG. 4D, at least one nanowire305of the second set of nanowires304is masked with a masking material316, which may be any reasonably suitable masking material that is capable of shielding another material from an etching process. In addition, any reasonably suitable number of nanowires305may be masked in any reasonably suitable configuration, such as 50% of the nanowires305in the second set of nanowires304in an alternating manner, as shown inFIG. 4D. Moreover, although it is not shown inFIG. 4D, portions of the second insulator layer312may also be masked with the masking material316.

InFIG. 4E, the unmasked nanowires305of the second set of nanowires304are subjected to an etching process to remove the unmasked nanowires305of the second set of nanowires304and the portions of the first insulator layer310below the unmasked nanowires305. Thus, vias318are created in the unmasked portions and the electrically conductive substrate306is exposed at the bottom of the vias318.

In addition or alternatively, and according to another embodiment, instead of positioning the masking material316over select nanowires305of the second set of nanowires304, the masking material316may be positioned over areas of the insulator layer308that are to remain following an etching process of the insulator layer308. In this embodiment, therefore, parts of the second insulator layer312and the first insulator layer310are etched away to form the vias318. In a yet further embodiment, the masking material316may be positioned over both selected nanowires305and various sections of the insulator layer308.

InFIG. 4F, a material is deposited or grown in the vias318to create the first set of nanowires302. Any reasonably suitable material or combination of materials may be deposited or grown in the vias318to create the first set of nanowires302, by any reasonably suitable method, including atomic layer deposition, wet chemistry procedures, electrodeposition, electroless deposition, CVD, PVD, etc. Because the nanowires303are connected to the electrically conductive substrate306, the first set of nanowires302may be in electrical communication with each other, as described above.

InFIG. 4G, the masking material316is removed and a portion of the second insulator layer312may also be removed. The portions of the second insulator layer312may be removed to expose the terminal ends of the second set of nanowires304. The steps of removing the masking material316and removing portions of the second insulator layer312may occur in any order, or may be performed substantially simultaneously.

InFIG. 4Ga third insulator layer320may be provided, through deposition or growth, in the vias318over the first set of nanowires302. This step, however, may be unnecessary if it is determined that there is sufficient space between the terminal ends of the first set of nanowires303and the electrically conductive layer314(FIG. 3) to keep them from being electrically connected to each other. In either regard, the electrically conductive layer314may be added over the insulator layer308to contact the uppermost terminal ends307of the second set of nanowires304as shown inFIG. 3. The electrically conductive layer314may include any reasonably suitable material, including silicon, doped silicon, germanium, or metal and may be disposed on the insulator layer308by any reasonably suitable method. The first and second sets of nanowires302and304are independently addressable, because the two sets of nanowires302and304are electrically isolated from each other due to the placement of the insulator layer308between the electrically conductive layer310and the first set of nanowires302.

FIGS. 5A and 5Billustrate respective geometrical spacings of the nanowires103and107in the apparatus100ofFIG. 1, according to two embodiments. More particularly,FIGS. 5A and 5Bmay represent alternate top views of the apparatus100.

FIG. 5Ashows a simplified version of the apparatus100having a single row of interdigitated nanowires103,107, whileFIG. 5Bshows a more complex version of the apparatus100having multiple rows of interdigitated nanowires103,107. InFIGS. 5A and 5B, the first and second sets of nanowires102,104are configured in an alternating “one-for-one” regularly repeating pattern. In addition, the first and second sets of nanowires102,104are aligned in a substantially linear relationship.

FIG. 5Cshows a simplified cross-sectional view taken along a horizontal center axis of the apparatus300depicted inFIG. 3having a single row of interdigitated nanowires303,305, whileFIG. 5Dshows a more complex version of the cross-sectional view of the apparatus300having multiple rows of interdigitated nanowires303,305. InFIGS. 5C and 5D, the first and second sets of nanowires302,304are configured in an alternating “one-for-one” regularly repeating pattern. In addition, the first and second sets of nanowires302,304are aligned in a substantially linear relationship.

According to another embodiment, and with respect toFIGS. 5A-5D, the first and second sets of nanowires102,104and302,304may be interdigitated in any configuration or pattern, including substantially linear, offset, or random. For example, a series of nucleation sites may be formed in a substantially random pattern using electron beam lithography, and the nanowires may be grown from the randomly laid nucleation sites. Alternatively, the first and second sets of nanowires102,104and302,304may be provided in a precise, complex geometric configuration to provide the apparatuses100and300with selective functionality and/or flexibility. For example, the first and second sets of nanowires102,104and302,304may be provided in a zebra pattern, checkerboard pattern, and the like.

The interdigitated sets of independently addressable nanowires described herein, such as the apparatuses100and300, may be used in a dipole antenna array for sending or receiving signals. For example, the interdigitated sets of independently addressable nanowires may be used in a phase array antenna device where phase shift between the two interdigitated sets of nanowires create the phase array. The apparatuses100and300are particularly useful for creating devices used as dipole antenna arrays because the methods of making the apparatuses100and300allow for a large number of independently addressable sets of interdigitated nanowires to be created on a small substrate, thus obtaining a high surface density of nanowires and an efficient antenna.

The interdigitated sets of independently addressable nanowires described herein may also be used in sensor arrays and devices. For example, the apparatuses100and300may be used as biological, chemical, mechanical, electrical, etc., sensors.

FIG. 6illustrates a flow chart of a method600of forming an apparatus100having multiple sets of interdigitated nanowires, where each set of nanowires is independently addressable from each other set of nanowires, according to an embodiment. For example, the method600may be used to form the apparatus100, illustrated inFIG. 1. Therefore, the method600is described with respect toFIG. 1,FIGS. 2A-E, andFIGS. 5A and 5Bby way of example and not of limitation. A person having ordinary skill in the art will appreciate that additional steps may be added to the method600and, similarly, that some of the steps outlined inFIG. 6may be omitted, changed, or rearranged without departing from a scope of the method600.

At step602, a first set of nanowires102is formed on an electrically conductive substrate106. At step604, an insulator layer108is provided over the electrically conductive substrate106and portions of the first set of nanowires102. At step606, a second set of nanowires104is formed over the insulator layer108. In addition, at step608, an electrically conductive layer110is provided to electrically connect the second set of nanowires104. As discussed above, however, steps606and608may be reversed, such that the electrically conductive layer110is deposited or grown on the insulator layer108prior to growth or deposition of the second set of nanowires104.

FIG. 7illustrates a flow chart of a method700of forming an apparatus300having multiple sets of interdigitated nanowires, where each set of nanowires is independently addressable from each other set of nanowires, according to an embodiment. For example, the method700may be used to form the apparatus300, illustrated inFIG. 3. Therefore, the method700is described with respect toFIG. 3,FIGS. 4A-F, andFIGS. 5C and 5Dby way of example and not of limitation. A person having ordinary skill in the art will appreciate that additional steps may be added to the method700and, similarly, that some of the steps outlined inFIG. 7may be omitted, changed, or rearranged without departing from a scope of the method700.

At step702, an electrically conductive substrate306is provided. At step704, a layer of insulator layer310is provided over the electrically conductive substrate306. At step706, a second set of nanowires304is formed over the layer of insulator layer310. At step708, vias318are created in portions of at least the layer of insulator layer310to expose portions of the electrically conductive substrate306. At step710, a first set of nanowires302are formed in the vias318. In addition, at step712, an electrically conductive layer314may be provided to electrically connect the second set of nanowires304.

While the embodiments have been described with reference to examples, those skilled in the art will be able to make various modifications to the described embodiments. The terms and descriptions used herein are set forth by way of illustration only and are not meant as limitations. In particular, although the methods have been described by examples, steps of the methods may be performed in different orders than illustrated or simultaneously. Those skilled in the art will recognize that these and other variations are possible within the spirit and scope as defined in the following claims and their equivalents.