Semiconductor device and method for manufacturing same

According to one embodiment, a semiconductor device includes an interconnect layer, an electrical element, an optical element, and a resin portion. The resin portion includes a first partial region between the electrical element and the optical element. At least a portion of the optical element does not overlap the resin portion in a first direction. The first partial region has first and second resin portion surfaces. The second resin portion surface is opposite to the first resin portion surface and opposes the interconnect layer. The optical element has first and second optical element surfaces. The second optical element surface is opposite to the first optical element surface and opposes the interconnect layer. A distance along the first direction between the interconnect layer and the first resin portion surface is longer than a distance along the first direction between the interconnect layer and the first optical element surface.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is based upon and claims the benefit of priority from Japanese Patent Application No. 2017-221820, filed on Nov. 17, 2017; the entire contents of which are incorporated herein by reference.

FIELD

Embodiments described herein relate generally to a semiconductor device and a method for manufacturing the same.

BACKGROUND

For example, there is a semiconductor device in which a semiconductor chip or the like is covered with a mold resin. It is desirable to downsize the semiconductor device.

DETAILED DESCRIPTION

According to one embodiment, a semiconductor device includes an interconnect layer, an electrical element, an optical element, and a resin portion. A direction from the interconnect layer toward the electrical element is a first direction. A direction from the interconnect layer toward the optical element is aligned with the first direction. A second direction from the electrical element toward the optical element crosses the first direction. The resin portion includes a first partial region. The first partial region is between the electrical element and the optical element. At least a portion of the optical element does not overlap the resin portion in the first direction. The first partial region has a first resin portion surface and a second resin portion surface. The second resin portion surface is opposite to the first resin portion surface and opposes the interconnect layer. The optical element has a first optical element surface and a second optical element surface. The second optical element surface is opposite to the first optical element surface and opposes the interconnect layer. A distance along the first direction between the interconnect layer and the first resin portion surface is longer than a distance along the first direction between the interconnect layer and the first optical element surface.

According to another embodiment, a method for manufacturing a semiconductor device is disclosed. The method can include covering a first structure body and an electrical element with a resin material layer. The first structure body includes an optical element and a first layer. The first layer is provided on the optical element. The method can include exposing the first layer by removing a portion of the resin material layer. The method can include removing the first layer.

The drawings are schematic and conceptual; and the relationships between the thickness and width of portions, the proportions of sizes among portions, etc., are not necessarily the same as the actual values thereof. Further, the dimensions and proportions may be illustrated differently among drawings, even for identical portions.

In the specification and drawings, components similar to those described or illustrated in a drawing thereinabove are marked with like reference numerals, and a detailed description is omitted as appropriate.

First Embodiment

FIG. 1AtoFIG. 1Care schematic views illustrating a semiconductor device according to a first embodiment.FIG. 1Ais a line A1-A2cross-sectional view ofFIG. 1C.FIG. 1Bis a plan view as viewed along arrow AA ofFIG. 1C.FIG. 1Cis a perspective view.

As shown inFIG. 1A, the semiconductor device110according to the first embodiment includes an interconnect layer50, an electrical element10such as a semiconductor chip, an electronic component, etc., an optical element20such as an optical semiconductor chip (a light-emitting element, an optical modulator (an optical modulation element), a light receiving element), etc., and a resin portion40.

The direction from the interconnect layer50toward the electrical element10is aligned with a first direction.

The first direction is taken as a Z-axis direction. One direction perpendicular to the Z-axis direction is taken as an X-axis direction. A direction perpendicular to the Z-axis direction and the X-axis direction is taken as a Y-axis direction.

For example, the interconnect layer50is aligned with the X-Y plane.

The direction from the interconnect layer50toward the optical element20is aligned with the first direction (the Z-axis direction). A second direction from the electrical element10toward the optical element20crosses the first direction. In the example, the second direction is aligned with the X-axis direction.

The resin portion40includes a first partial region r1. The first partial region r1is positioned between the electrical element10and the optical element20.

In the example as shown inFIG. 1B, the resin portion40further includes second to seventh regions r2to r7.

The optical element20is positioned between the second partial region r2and the first partial region r1in the second direction (the X-axis direction). The electrical element10is positioned between the first partial region r1and the third partial region r3in the second direction.

The optical element20is positioned between the fourth partial region r4and the fifth partial region r5in the third direction. The third direction crosses a plane (e.g., the Z-X plane) including the first direction and the second direction. In the example, the third direction is the Y-axis direction. The electrical element10is positioned between the sixth partial region r6and the seventh partial region r7in the third direction.

The first to seventh partial regions r1to r7are continuous with each other. In the example, the direction from the fourth partial region r4toward the sixth partial region r6is aligned with the X-axis direction. The direction from the fifth partial region r5toward the seventh partial region r7is aligned with the X-axis direction.

The optical element20has a first optical element surface20aand a second optical element surface20b. The second optical element surface20bopposes the interconnect layer50along the first direction (the Z-axis direction). The second optical element surface20bis a surface that is opposite to the first optical element surface20a. In one example, the first optical element surface20ais a light-emitting surface (a light-emitting surface) of the optical element. In one other example, the first optical element surface20ais a light incident surface (a light receiving surface) of the optical element.

For example, at least a portion of the first optical element surface20ais not covered with the resin portion40.

In the example, the upper surface of the optical element20is positioned lower than the upper surface of the resin portion40.

The first partial region r1of the resin portion40has a first resin portion surface40aand a second resin portion surface40b. The second resin portion surface40bopposes the interconnect layer50along the first direction (the Z-axis direction). The second resin portion surface40bis a surface that is opposite to the first resin portion surface40a.

As shown inFIG. 1A, the distance along the first direction (the Z-axis direction) between the interconnect layer50and the first resin portion surface40ais taken as a distance d1. The distance along the first direction between the interconnect layer50and the first optical element surface20ais taken as a distance d2. The distance d1is longer than the distance d2. The first optical element surface20ais recessed further than the first resin portion surface40adue to such a distance relationship. For example, at the first optical element surface20a, dirt or the like is suppressed; and a good optical function is obtained.

For example, as shown inFIG. 12, in the case where optical coupling is performed by disposing an optical fiber80held by an optical connector ferrule70at the light input/output surface (light output or light input) of the optical element20, etc., a configuration is possible in which the optical fiber does not contact the light input/output surface even when the optical fiber is set to be proximal to the optical element20. In the example, the optical fiber80includes a UV resin81, cladding82, and a core83. A bonding agent71is provided between the ferrule70and the optical fiber80. The optical element20includes a crystal lens26A. The refractive index of the crystal lens26A is, for example, 3.2 to 3.5. A light emitter/light receiver90is provided between the interconnect layer50and the optical element20.

In the description recited above, in the case where the optical fiber and the optical element20are fixed to be proximal to each other, even if the optical fiber tip juts out due to thermal expansion and/or stress due to a change of the environment of use (e.g., a stress change due to a temperature change or an external force), a configuration is possible in which the jutting is absorbed by the clearance preset between the first resin portion surface40aand the first optical element surface20a; and damage of the optical fiber and the optical element20is preventable.

Also, instead of an anti-reflection coating on the light input/output surface of the optical element20, in the case where an uneven portion having a SWS (Sub-Wavelength Structure) is formed by etching, in the case where an uneven portion of a SWC (Sub-Wavelength Structure Coating) is formed using a material other than that of the optical element, etc., the loss of the effect of the anti-reflection coating due to foreign matter entering the uneven portion of the optical element20surface due to contact with the optical fiber, etc., can be prevented.

As shown inFIG. 12, in the case where the optical coupling is performed by forming an optical element such as a lens, etc., on the light input/output surface of the optical element20, it is possible to set the distance between the optical element20and the optical fiber to a spacing that matches the lens focal point.

Also, the utilization as a distance adjustment mechanism to similarly match the lens focal point is possible even in the case where a diffractive lens, a Fresnel lens, or the like is formed in the surface of the optical element20; and the loss of the lens function due to foreign matter entering the uneven portion of the diffractive lens or the Fresnel lens due to contact with the optical fiber, etc., can be prevented.

As shown inFIG. 8, for example, in the case where the optical fiber strand in which the cladding is exposed is inserted into the optical element20and a recess that holds the optical fiber strand is provided in the optical element20, similarly to the description recited above, foreign matter can be prevented from entering the recess due to the contact of an unintended object before the insertion of the optical fiber strand. In such a case, the optical coupling with the optical fiber is ensured by, for example, setting the optical fiber to be a GI (Graded Index) fiber (multimode fiber) having a core diameter of 50 μm and a cladding diameter of 125 μm, and by setting the distance from the recess bottom surface of an optical element substrate21of the optical element20to the active portion (the light emitter, the light receiver, or the light modulator) formed in the interconnect layer side surface to be, for example, 50 μm or less.

For example, the electrical element10has a side surface. The side surface crosses the X-Y plane. The resin portion40is provided around the side surface of the electrical element10. For example, the optical element20has a side surface. The side surface crosses the X-Y plane. The resin portion40is provided around the side surface of the optical element20.

The electrical element10includes, for example, a semiconductor chip. For example, the electrical element10is made from an amplifier circuit, a logic circuit, a memory circuit, or a switching circuit and may include at least one of an arithmetic circuit, a control circuit, or a signal processing circuit. The electrical element10may include, for example, at least one of a resistor, a capacitor, or an inductor. Multiple electrical elements10may be provided in the embodiment. One of the multiple electrical elements10will now be described. The description recited below is applicable also to another one of the multiple electrical elements10.

The electrical element10includes, for example, at least one of silicon, Ge, diamond, or a compound semiconductor (SIC, GaN, GaAs, InP, etc.).

The optical element20includes, for example, at least one of a light-emitting element or a light receiving element. The light-emitting element includes, for example, a light-emitting diode or a laser diode. The light receiving element includes, for example, a photodiode, an avalanche photodiode, or a MSM (Metal Semiconductor Metal) photodiode. The optical element20includes, for example, at least one of silicon, Ge, diamond, or a compound semiconductor (SiC, GaN, GaAs, InP, etc.). For example, the optical element20has the function of transmitting and receiving (communicating) a signal using light.

The interconnect layer50includes, for example, a conductive layer51. The conductive layer51is, for example, a redistribution layer (Re-Distribution Layer (RDL)). For example, the conductive layer51is electrically connected to at least one of the optical element20or the electrical element10. For example, the conductive layer51may be electrically connected to the optical element20and the electrical element10.

For example, the optical element20includes electrodes (a first electrode20e, a second electrode20f, etc.). For example, the conductive layer51is electrically connected to at least one of the first electrode20eor the second electrode20f.

The interconnect layer50further includes a resin layer52. The resin layer52includes, for example, a resin such as polyimide, etc.

For example, the first to seventh partial regions r1to r7of the resin portion40contact the interconnect layer50.

In the embodiment, at least a portion of the optical element20does not overlap the resin portion40in the first direction (the Z-axis direction). Thereby, in the case where the optical element20includes a light-emitting element, the light that is emitted from the light-emitting element can be emitted to the outside without passing through the resin portion40. On the other hand, in the case where the optical element20is a light receiving element, the light can be incident on the optical element20without passing through the resin portion40. Thereby, good characteristics are obtained for at least one of the emission or the incidence of the light for the optical element20.

In the semiconductor device110, the electrical element and the optical element20are combined; and the interconnect layer50is provided. Such an electrical element10and such an optical element20are held by the resin portion40. The number of parts is low. The size of the semiconductor device can be small; and connections having a small pitch (spacing) are possible. A good function of the optical element is obtained because at least a portion of the optical element20is not covered with the resin portion40. A semiconductor device can be provided in which downsizing is possible while obtaining a good function.

In the example as shown inFIG. 1A, the electrical element10is positioned between the interconnect layer50and the portion40pof the resin portion40in the first direction (the Z-axis direction). For example, the electrical element10is covered with the resin portion40. Good reliability is obtained. As described below, at least a portion of the electrical element10may not be covered with the resin portion40.

In the example, the optical element20includes the optical element substrate21(a transparent layer or an optical element semiconductor layer) and an antireflective layer25(an optical layer). The optical element substrate21is positioned between the antireflective layer25and the interconnect layer50. For example, the optical element20that is provided on the optical element substrate21has the function of at least one of light emission or light reception. The refractive index of the antireflective layer25is lower than the refractive index of the optical element substrate21. The refractive index of the antireflective layer25is, for example, greater than 1. Thereby, good reception/emission characteristics are obtained between the outside and the optical element substrate21. The antireflective layer25has a reflection suppression function and may be made of a single layer or multilayer film. In the case where the antireflective layer25is a single-layer film, for example, the refractive index of the antireflective layer25is set to be about the square root of the product of the refractive index of the optical element substrate21and the refractive index of the medium on the outer side of the antireflective layer (e.g., a gap having a refractive index of 1, a transparent resin having a refractive index of 1.5, etc.); and the thickness of the antireflective layer25is set to a thickness corresponding to an optical length (the wavelength/refractive index) of ¼ of the operating wavelength (the light emission wavelength or the light reception wavelength) of the optical element.

The refractive index recited above is the refractive index of the operation (light emission or light reception) wavelength of the optical element20.

For example, the optical element20is configured to emit light. The refractive index of the antireflective layer25for the peak wavelength of the light is lower than the refractive index of the optical element substrate21for the peak wavelength. In such a case, the refractive index of the antireflective layer25is, for example, greater than 1.

For example, in the case where the optical element20is a light receiving element, the refractive index of the antireflective layer25for the peak wavelength of the light incident on the optical element20is lower than the refractive index of the optical element substrate21for the peak wavelength. In such a case, the refractive index of the antireflective layer25is, for example, greater than 1.

As described below, the antireflective layer25may be omitted.

In the embodiment, the resin portion40includes multiple particles41and a resin material portion42. The resin material portion42is provided around at least a portion of the multiple particles41. The multiple particles41include, for example, at least one of silicon oxide, aluminum oxide, silicon nitride, or aluminum nitride. For example, good heat dissipation is obtained. For example, a high mechanical strength is obtained. The resin material portion42includes, for example, at least one of an epoxy resin or a silicone resin.

Second Embodiment

An example of a method for manufacturing the semiconductor device110recited above will now be described as a second embodiment.

FIG. 2AtoFIG. 2Gare schematic cross-sectional views illustrating the method for manufacturing the semiconductor device according to the second embodiment.

A first structure body SB1is prepared as shown inFIG. 2A. For example, a first layer27is fixed to a wafer20W used to form the optical element20. In the example, the first layer27is fixed to the wafer20W by a bonding layer28. The wafer20W is, for example, a substrate (e.g., a silicon substrate) used to form the optical element20. Multiple optical elements20are obtained from the wafer20W. The first layer27is, for example, a thin silicon layer (substrate). The multiple first structure bodies SB1are obtained by subdividing such a stacked body into multiple regions. One of the multiple first structure bodies SB1will now be described.

As shown inFIG. 2B, the first structure body SB1and the electrical element10recited above are fixed to a support body60. The support body60is, for example, silicon, glass, or a resin substrate. The first structure body SB1includes the optical element20, and the first layer27provided on the optical element20.

In the optical element20, the second optical element surface20bopposes the support body60. The first optical element surface20aopposes the first layer27(in the example, the bonding layer28).

As shown inFIG. 2C, the first structure body SB1and the electrical element10are covered with a resin material layer40F. The resin material layer40F is used to form the resin portion40.

The support body60is removed as shown inFIG. 2D.

As shown inFIG. 2E, the interconnect layer50is formed on the first structure body SB1and the electrical element10exposed by the removal of the support body60.

As shown inFIG. 2F, the first layer27is exposed by removing a portion of the resin material layer40F. The removal includes, for example, performing CMP (chemical mechanical polishing), etc.

The first layer27is removed as shown inFIG. 2G. At this time, the bonding layer28also is removed. In the removal of the first layer27, for example, the resin material layer40F (at least a portion of the resin material layer40F) remains. Thereby, the semiconductor device110is obtained.

Thus, in the example, the covering with the resin material layer40F is performed in the state in which the first structure body SB1and the electrical element10are fixed to the support body60. Then, after the covering with the resin material layer40F, the support body60is removed. The interconnect layer50is formed on the first structure body SB1and the electrical element10exposed by the removal of the support body60. The exposing of the first layer27is performed after the formation of the interconnect layer50.

Another example of the method for manufacturing the semiconductor device will now be described.

FIG. 3AtoFIG. 3Dare schematic cross-sectional views illustrating another method for manufacturing the semiconductor device according to the second embodiment.

As shown inFIG. 3A, the interconnect layer50is provided on the first structure body SB1and the electrical element10. The first structure body SB1and the electrical element10are fixed to the interconnect layer50.

As shown inFIG. 3B, the first structure body SB1and the electrical element10are covered with the resin material layer40F.

As shown inFIG. 3C, the first layer27is exposed by removing a portion of the resin material layer40F.

The first layer27is removed as shown inFIG. 3D.

Other examples of the semiconductor device according to the first embodiment will now be described.

FIG. 4toFIG. 8are schematic cross-sectional views illustrating other semiconductor devices according to the first embodiment.

In a semiconductor device111as shown inFIG. 4, at least a portion of the electrical element10does not overlap the resin portion40in the first direction (the Z-axis direction). Otherwise, the configuration of the semiconductor device111is similar to that of the semiconductor device110.

In a semiconductor device112as shown inFIG. 5, the antireflective layer25is not provided on the optical element20. Otherwise, the configuration of the semiconductor device112is similar to that of the semiconductor device110.

In a semiconductor device113as shown inFIG. 6, the antireflective layer25of the optical element20is omitted. In the semiconductor device113, the first optical element surface20aincludes multiple unevennesses20dp. The multiple unevennesses20dpmay be arranged at a period that is shorter than the light emission peak wavelength or the light reception peak wavelength of the optical element20. The multiple unevennesses20dpmay be a diffractive lens or a Fresnel lens for the light emission peak wavelength or the light reception peak wavelength of the optical element20. Otherwise, the configuration of the semiconductor device113is similar to that of the semiconductor device110.

In a semiconductor device114as shown inFIG. 7, another electrical element10A is provided in addition to the electrical element10. The semiconductor device114further includes a lens26. The optical element20is positioned between the lens26and the interconnect layer50in the first direction (the Z-axis direction). The input/output efficiency of a light L1is increased by the lens.

In the example, the semiconductor device114further includes a first connector55. For example, the first connector55is used to electrically connect to another device. For example, the interconnect layer50includes the conductive layer51that is electrically connected to the first connector55. For example, the interconnect layer50is positioned in at least one of a position between the first connector55and the optical element20in the first direction (the Z-axis direction) and a position between the first connector55and the electrical element10in the first direction.

In a semiconductor device115as shown inFIG. 8, the optical element20has a recess20h(e.g., a hole) provided in the first optical element surface20a. For example, the end portion of an optical fiber or the like is inserted into the recess20h. A low-loss optical connection is obtained.

The bottom surface of the recess20his 50 μm or less in the first direction (the Z-axis direction) from the second optical element surface20bof the optical element20. A stable optical connection is obtained.

The method for manufacturing the semiconductor device115further performs the formation of the recess20hin the optical element20.

In the semiconductor layers110to115as well, a semiconductor device can be provided in which downsizing is possible.

Another example of the method for manufacturing the semiconductor device will now be described.

FIGS. 9A to 9F,FIGS. 10A to 10E, andFIGS. 11A to 11Eare schematic cross-sectional views illustrating another method for manufacturing the semiconductor device according to the second embodiment.

As shown inFIG. 9A, the wafer20W that is used to form the optical element20is prepared. The wafer20W includes, for example, the first optical element surface20a, the second optical element surface20b, and the recess20h.

As shown inFIG. 9B, the bonding layer28is formed on the wafer20W.

As shown inFIG. 9C, the first layer27is fixed to the wafer20W by the bonding layer28.

As shown inFIG. 9D, a portion of the first layer27may be removed. The removal of the portion of the first layer27is performed by, for example, polishing.

As shown inFIG. 9E, a second connector56is formed on the wafer20W. A stacked body that includes the wafer20W, the bonding layer28, the first layer27, and the second connector56is formed. At least a portion of the second connector56is electrically connected to the conductive layer included in the optical element20.

As shown inFIG. 9F, the multiple first structure bodies SB1are obtained by subdividing the stacked body recited above into multiple regions. In the example, the first structure body SB1includes the optical element20, the bonding layer28, the first layer27, and the second connector56.

The support body60is prepared as shown inFIG. 10A.

The interconnect layer50is formed on the support body60as shown inFIG. 10B.

As shown inFIG. 10C, the first structure body SB1, the electrical element10, and the other electrical element10A recited above are fixed to the support body60on which the interconnect layer50is formed. For example, the second connector56may be electrically connected to at least a portion of the conductive layer included in the interconnect layer50. For example, at least one of the electrodes (not illustrated) included in the electrical element10may be electrically connected by a third connector57to at least a portion of the conductive layer included in the interconnect layer50.

As shown inFIG. 10D, the first structure body SB1, the electrical element10, and the other electrical element10A are covered with the resin material layer40F. The resin material layer40F is used to form the resin portion40.

The support body60is removed as shown inFIG. 10E. The interconnect layer50is exposed.

As shown inFIG. 11A, the first layer27is exposed by removing a portion of the resin material layer40F. In one example, the removal of the portion of the resin material layer40F may be ended when the first layer27is exposed as shown inFIG. 11A. In one other example, the removal of the portion of the resin material layer40F progresses further as shown inFIG. 11B; the first layer27also is removed; and the bonding layer28may be exposed.

As shown inFIG. 11A, in the case where the removal of the portion of the resin material layer40F is ended when the first layer27is exposed, the first layer27is removed as shown inFIG. 11C.

The bonding layer28is removed as shown inFIG. 11D.

The first connector55is formed on the interconnect layer50as shown inFIG. 11E. Thereby, the semiconductor device is obtained.

Thus, in the example, the covering with the resin material layer40F is performed in the state in which the first structure body SB1, the electrical element10, and the other electrical element10A are fixed to the support body60on which the interconnect layer50is formed. Then, after the covering with the resin material layer40F, the interconnect layer50is exposed by removing the support body60. The first layer27is exposed after the removal of the support body60.

In yet another example of the method for manufacturing the semiconductor device according to the embodiment, the covering with the resin material layer40F is performed in a state in which the first structure body SB1and the electrical element10are fixed to the support body60on which the interconnect layer50is formed. Then, the first layer27is exposed after the covering with the resin material layer40F. Then, after exposing the first layer27, the interconnect layer50is exposed by removing the support body60.

According to the embodiments, a semiconductor device and a method for manufacturing the semiconductor device can be provided in which downsizing is possible.

Hereinabove, exemplary embodiments of the invention are described with reference to specific examples. However, the embodiments of the invention are not limited to these specific examples. For example, one skilled in the art may similarly practice the invention by appropriately selecting specific configurations of components included in semiconductor devices such as interconnect layers, electrical elements, optical elements, resin portions, etc., from known art. Such practice is included in the scope of the invention to the extent that similar effects thereto are obtained.

Moreover, all semiconductor devices, and methods for manufacturing the same practicable by an appropriate design modification by one skilled in the art based on the semiconductor devices, and the methods for manufacturing the same described above as embodiments of the invention also are within the scope of the invention to the extent that the purport of the invention is included.