Speed detecting apparatus

A speed detecting apparatus having a detector (101) for generating two sine-wave signals (PA, PB) which are .pi./2 out of phase with each other and have a frequency proportional to the speed of rotation of a motor so that actual-speed voltages (V.sub.L, V.sub.H) can be produced which are proportional to the speed of rotation of the motor. The speed detecting apparatus includes a quadrupling circuit and a frequency-to-voltage converter 107. Also included is a first speed generator for generating the actual-speed voltage (V.sub.H) in a high-speed range and a second speed generator which includes a four-phase rectangular signal generating circuit (106), a differentiating circuit (109), and a synchronous rectifier circuit (110) for producing the actual-speed voltage (V.sub.L) in a low-speed range. The voltages generated by the first and second speed generators are selectively issued as an output depending on whether the motor rotates at a high speed or a low speed.

BACKGROUND OF THE INVENTION 
The present invention relates to a speed detecting apparatus, and more 
particularly to a speed detecting apparatus capable of detecting speeds 
ranging from low to high speeds with high accuracy. 
DC and AC motors are controlled using data on the actual speeds of the 
motors fed back in a feedback loop. For example, in an AC motor control 
system in which the AC motor is driven by primary three-phase current 
commands generated by digital processing, the speed difference .DELTA.v 
between a commanded speed and an actual speed, and the actual speed n are 
supplied as inputs, and digital processing is carried out on the basis of 
.DELTA.v and n to determine the frequency and amplitude of the primary 
three-phase current commands. For example driving the spindle in a machine 
tool with an AC motor requires that the spindle be rotatable in a wide 
range of from low to high speeds. For accurate control, the speeds of 
rotation, both low and high, should be detected with precision. 
According to a conventional speed detecting system, two-phase signals PA 
and PB which are .pi./2 out of phase with each other and have a frequency 
f proportional to the speed of rotation of the motor are generated, then 
the two-phase signals PA, PB are converter by a quadrupling circuit into 
signals having a frequency of 4f. Finally, a voltage (actual-speed voltage 
TSA) proportional to the speed of rotation is produced as an output of a 
frequency-to-voltage converter which serves to generate a voltage in 
proportion to the frequency 4f. With the prior system, however, as the 
pulse frequency becomes lower, the output voltage value from the 
frequency-to-voltage converter goes out of proportion to the frequency and 
is rapidly reduced. For this reason, the known system has not been 
suitable for the detection of speeds of AC motors which rotate at 
extremely low speeds. 
SUMMARY OF THE INVENTION 
With the foregoing in view, it is an object of the present invention to 
provide a speed detecting apparatus capable of precisely detecting the 
speed of rotation of a motor in a range of from low to high speed. 
According to the present invention, there is disclosed a speed detecting 
apparatus having a detector for generating two sine-wave signals which are 
.pi./2 out of phase with each other and have a frequency proportional to 
the speed of rotation of a motor so that output voltages can be produced 
which depend on the speed of rotation of the motor through the use of the 
two sine-wave signals, thus detecting the speed. The speed detecting 
apparatus of the invention includes a frequency-to-voltage converter for 
converting the frequency of the sine-wave signals into a voltage and an 
inverter circuit for inverting the phases of the two-phase sine-wave 
signals to produce output signals. A synchronous rectifier circuit is 
supplied with the sine-wave signals directly or via a differentiating 
circuit to rectify the supplied signals in synchronism and combine them. A 
detector circuit detects whether the speed of rotation of the motor is 
greater or smaller than a predetermined value and generates switching 
signals. Analog switches deliver the output voltage produced by the 
frequency-to-voltage converter at high speeds and the output voltage 
produced by the synchronous rectifier circuit at low speeds in response to 
the switching signals from the detector circuit. With the present 
invention, the output voltage V.sub.H from the frequency-to-voltage 
converter and the output voltage V.sub.L from the synchronous rectifier 
circuit are selectively issued as an actual-speed voltage TSA depending on 
the speed of motor. This allows the actual-speed voltage TSA to be 
proportional to the number n of RPM in a range of low to high speeds so 
that the speed of motor can be detected precisely.

DESCRIPTION OF THE PREFERRED EMBODIMENT 
The present invention will hereinafter be described in greater detail with 
reference to the accompanying drawings. Designated in FIG. 1 as 101 is a 
pulse generator such as a resolver, a magnetic sensor or the like for 
generating two sine-wave signals PA and PB (see FIG. 2) having a frequency 
which is proportional to the speed of rotation of a motor (not shown) and 
90.degree. out of phase with each other. Inverter amplifiers 102 and 103 
serve to produce signals *PA, *PB that are 180.degree. out of phase with 
the sine-wave signals PA and PB. Pulsing circuits 104 and 105 are supplied 
with the signals *PA and *PB as inputs and convert them into rectangular 
signals PAP and PBP. The pulsing circuits may be slicer circuits, for 
instance, having a slice level of zero volts. Designated as 106 is a 
four-phase signal generating circuit for producing as outputs four-phase 
rectangular signals SWA, SWB, *SWA and *SWB using the rectangular signals 
PAP and PBP. A quadrupling circuit 107 produces a signal PQ having a 
fourfold increase in frequency over DA and DB by utilizing positive-going 
edges of the four-phase signals SWA - *SWB. Block 108 is a 
frequency-to-voltage converter for producing an output voltage V.sub.H 
which becomes proportional to the frequency of a train of input pulses 
when the frequency is greater than or equal to a threshold value. 
As shown in FIG. 3, the frequency-to-voltage converter 108 includes a 
transistor TR which can be turned on and off by the quadrupled frequency 
signal PQ, resistors R.sub.1 -R.sub.3, and a capacitor C. The resistors 
R.sub.1, R.sub.2 and R.sub.3 and the capacitor C comprise an integrating 
circuit. A differentiating circuit 109 serves to differentiate the 
sine-wave signals PA, PB, *PA and *PB thereby generating differentiated 
output signals PA', PB', *PA' and *PB'. As illustrated in FIG. 5, the 
differentiating circuit 109 comprises capacitors Ca-Cd and resistors Ra-Rd 
and Ra'-Rd' differentiating circuit is disclosed in U.S. Pat. No. 
3,811,091. The differentiated signals PA', PB', *PA' and *PB' having 
amplitudes proportional to the speed of rotation of the motor are produced 
by differentiating the sine-wave signals PA, PB, *PA and *PB. 
A synchronous rectifier circuit 110 (FIG. 1) is supplied with the 
differentiated signals PA', PB', *PA'and *PB' from the differentiating 
circuit 109 and the rectangular signals SWA, SWB, *SWA and *SWB (FIG. 2) 
from the four-phase signal generator circuit 106 to rectify the 
differentiated signals PA'-*PB' in synchronism with the rectangular 
signals SWA, SWB, *SWA and *SWB, thereby producing an actual-speed signal 
V.sub.L as a output. FIG. 4 shows the synchronous rectifier circuit 110. 
As is apparent from FIG. 4, the synchronous rectifier circuit 110 
comprises electronic switches S.sub.1, S.sub.2, S.sub.3 and S.sub.4 which 
can be opened and closed by the rectangular signals SWA, SWB, *SWA and 
*SWB. The switches have input terminals fed with the differentiated 
signals PA', PB', *PA' and *PB' and output terminals connected in common. 
A capacitor Cr is connected between the interconnected output terminals 
and ground. The interconnected output terminals may be coupled to an input 
of an analog adder with its output joined to the capacitor Cr. 
A speed detecting circuit 111 is supplied with the output voltage V.sub.H 
from the frequency-to-voltage converter (F/V converter) 108 and the output 
voltage V.sub.L from the synchronous rectifier circuit 110, or one of the 
output voltages, for determining whether the actual speed of the motor is 
in a high-speed or low-speed range. When the actual speed is in the 
high-speed range, an analog switch (for example, FET 112) is rendered 
conductive to issue the voltage V.sub.H as the actual-speed voltage TSA. 
When the actual speed is in the low-speed range, an analog switch (for 
example, an FET 113) is rendered conductive to issue the voltage V.sub.L 
as the actual-speed voltage TSA. 
The voltages V.sub.H and V.sub.L are selectively delivered for the reasons 
that, as shown in FIG. 6, the output voltage V.sub.H from the F/V 
converter 108 is proportional to the number n of RPM of the motor in the 
high-speed range as indicated by the solid line, and the output voltage 
V.sub.L from the synchronous rectifier circuit 110 is proportional to the 
number n of RPM of the motor in the low-speed range as indicated by the 
dotted line. Accordingly, by setting up a speed range .+-.Vb in which the 
voltages V.sub.H and V.sub.L are smoothly joined as an intermediate range 
between the high-speed and low-speed ranges, the actual-speed voltage TSA 
can be kept substantially in proportion to the rotational speed n 
throughout the entire range. 
According to the present invention, as described above, the actual-speed 
voltage TSA is obtained by selecting the output voltage V.sub.H from the 
frequency-to-voltage converter and the output voltage V.sub.L from the 
synchronous rectifier circuit depending on the speed of the motor. The 
actual-speed voltage TSA can be kept proportional to the number n of RPM 
through a wide speed range of from low to high speeds. The present 
invention is therefore suitable for use in motor speed control.