Isolated flyback converter with efficient light load operation

A flyback converter uses primary side sensing to sense the output voltage for regulation feedback. Such sensing requires a predetermined minimum duty cycle even with very light load currents. Therefore, such a minimum duty cycle may create an over-voltage condition. In the flyback phase, after a minimum duty cycle of the power switch at light load currents, a synchronous rectifier turns off approximately when the current through the secondary winding falls to zero to create a discontinuous mode. If it is detected that there is an over-voltage, the synchronous rectifier is turned on for a brief interval to draw a reverse current through the secondary winding. When the synchronous rectifier shuts off, a current flows through the primary winding via a drain-body diode while the power switch is off. Therefore, excess power is transferred from the secondary side to the power source to reduce the over-voltage so is not wasted.

FIELD OF THE INVENTION

This invention relates to DC-DC flyback converters using a synchronous rectifier and, in particular, to such a flyback converter that uses primary side sensing to detect an output voltage.

BACKGROUND

DC-DC flyback converters using synchronous rectifiers are well known. When isolation between the input and output stage is required, the output voltage can be sensed by various methods for regulation feedback. Some ways to convey the output voltage while maintaining isolation include using an optocoupler or using a third winding on the primary side of the transformer. However, those ways require additional circuitry, space, power, and cost. A more elegant way of detecting the output voltage is to sense a voltage at a terminal of the power switch when the power switch is turned off during the discharge (or flyback) cycle of the converter. Such a sensed voltage is substantially proportional to the output voltage. However, such a scheme requires a minimum duty cycle in order for the sensing to be accurate, since current must flow in the secondary winding in order to create the primary side sense voltage. Such a scheme also generally requires a minimum load in the form of a load resistor so as to draw a minimum current during the discharge cycle in the event the actual load is in a standby mode drawing little or no current.

If there were no minimum load resistor and the actual load went into a very light current standby mode, the minimum duty cycle may be greater than that needed to achieve a regulated output voltage, and the output voltage would exceed the desired regulated level. Thus, the minimum load current must be above a threshold current to prevent this. The minimum load reduces the efficiency of the converter.

FIG. 1illustrates one type of flyback converter10using a minimum load and which detects the output voltage VOUT by detecting the voltage at the primary winding when the power switch MOSFET M1is turned off during the discharge (or flyback) cycle. No optocoupler or third winding is used to detect VOUT.

A transformer12has a primary winding L1and a secondary winding L2. The MOSFET M1is controlled by an output regulation and control circuit14to connect the winding L1between the input voltage VIN (e.g., a battery voltage) and ground during a charging cycle.

To achieve a regulated VOUT, the MOSFET M1is turned off after a controlled time, and the synchronous rectifier MOSFET M2is turned on. The current through winding L2is transferred to the load and the smoothing capacitor C1at the required voltage.

For regulation feedback, the circuit14detects the voltage at the drain of MOSFET M1during the discharge cycle (MOSFET M1is off). Sensing an output voltage by a signal at the primary side of the transformer is sometimes referred to as primary side sensing. The drain voltage is related to a winding ratio of L1and L2, and the voltage across winding L2is the output voltage Vout plus the voltage drop across MOSFET M2(assuming MOSFET M2is on). The user selects the value of a feedback resistor RFB and the value of a reference resistor RREF such that (RFB/RREF)*Vref equals the desired regulated voltage, where Vref is an internal bandgap reference voltage applied to an internal error amplifier. Such primary side sensing circuits for detecting VOUT are well known and need not be described in detail. The full data sheet for the Linear Technology LT3573 flyback converter, incorporated herein by reference and available on-line, describes the operation of the feedback circuit. This operation is also described in U.S. Pat. Nos. 7,471,522 and 7,463,497, assigned to the present assignee and incorporated herein by reference. Other known primary side voltage sensing techniques may be used.

The circuit14continues to control the duty cycle of MOSFET M1, at a variable frequency or a fixed frequency, to regulate VOUT based on the sensed voltage.

The circuit14may also directly control the synchronous rectifier MOSFET M2to turn on when MOSFET M1turns off, or an automatic synchronous switch control circuit16may control MOSFET M2to turn on at the proper times. MOSFETs M1and M2are typically never on at the same time. The diode D2represents the drain-body diode of the MOSFET M2.

The output regulation and control circuit14may use any type of conventional technique to regulate, including current mode, voltage mode, or other modes.

When the load is above a certain threshold current, conventional operation of the converter10is used to accurately regulate VOUT. However, when the actual load falls below the threshold current, the required minimum duty cycle of the converter10generates too much current and causes VOUT to rise above the regulated voltage. Such light load operation still requires a minimum duty cycle to sample the output voltage on the primary winding L1. In the event that the actual load is a type that has a standby mode that draws very little power, the converter10is provided with a minimum load current resistor R1to help dissipate the winding L2current so regulation can be maintained during the periodic cycling of MOSFETs M1and M2. Alternatively, or in conjunction, a zener diode D3is used to ensure VOUT does not rise above a threshold level. Resistor R1and zener diode D3are optional, since the minimum current drawn by the actual load may be sufficient to substantially maintain regulation at the lightest load current.

FIG. 2illustrates the current through the primary winding L1, the current through the secondary winding L2, and the voltage VM1across the MOSFET M1for a relatively low duty cycle operation. It may be assumed that the actual load current is below the minimum current set by the minimum current load resistor R1.

At time T1, the MOSFET M1turns on to charge the primary winding L1, causing a ramping current to flow in winding L1. MOSFET M2is off at this time.

After a variable or fixed time, at time T2, MOSFET M1shuts off and MOSFET M2turns on. This may be at the minimum duty cycle. This ceases current in the primary winding L1and causes the current through the secondary winding L2to ramp down while charging the output capacitor C1and providing current to the load. The voltage across the MOSFET M1is related to the output voltage VOUT and is sampled during this time by the circuit14. The current supplied to the capacitor C1during this light load condition may increase VOUT beyond the avalanche voltage of the zener diode D3, clamping VOUT to that value.

At time T3, the secondary winding L2current ramps down to zero and the MOSFET M2turns off to cause a discontinuous mode. MOSFET M2may be turned off by a circuit that detects a slight reversal of current through the winding L2by detecting the voltage across MOSFET M2.

After time T3, the parasitic capacitance of MOSFET M1and the inductance of winding L1creates an oscillating tank circuit.

At time T4, MOSFET M1turns on again, and the cycle repeats, which may be the minimum duty cycle.

Additional detail of various converter circuits are described in U.S. Pat. Nos. 5,481,178; 6,127,815; 6,304,066; and 6,307,356, assigned to the present assignee and incorporated herein by reference.

During a medium to high current mode of the converter10, there may be no discontinuous operation, and the converter10may operate at a fixed frequency with a variable duty cycle to regulate the output voltage. Such an operation may be conventional.

During the light load condition of the load, such as a standby mode, it is important that the converter10draw as little current as possible to extend battery life. Such standby modes typically occur for relatively long periods. It would be desirable to not require a minimum current load circuit (e.g., resistor R1) to enable the converter10to regulate VOUT when the actual load is in its standby mode. By doing away with the minimum current circuit, while still achieving substantial regulation when the actual load is drawing zero or very little current, efficiency is improved and battery life is increased.

SUMMARY

A flyback converter is disclosed that uses primary side sensing to sense the output voltage VOUT but does not need a minimum load current resistor or zener diode to prevent the output voltage from increasing substantially beyond regulation during light load conditions. The converter may use any technique for regulating the output voltage during high to medium load currents, such as current mode or voltage mode.

During light load currents, when the converter operates in a discontinuous mode (synchronous rectifier is off) while operating at a minimum duty cycle, the output voltage is detected on the secondary side of the transformer and compared to a threshold voltage to determine whether the output voltage has exceeded the regulated voltage. The output voltage may be directly detected at the output terminal of the converter or a resistor divider may be used. Once it is determined that the output voltage has exceeded the threshold, the synchronous rectifier is then briefly turned on to draw a reverse current through the secondary winding to slightly discharge the output capacitor to lower the output voltage to approximately the regulated voltage. When the synchronous rectifier is then turned off, the stored energy in transformer causes a ramping current in the primary winding through the drain-body diode of the power MOSFET (the power MOSFET is off). The excess energy is thus recycled in the power supply (e.g., a battery) rather than being wasted. In other words, excess power is transferred from the output side of the converter to the input side. Accordingly, no minimum load current resistor or zener diode is needed, and the converter is much more efficient than the prior art converter ofFIG. 1at light load currents.

To ensure that there has been enough time for the primary side sensing to occur for controlling the regulation, a timer may be employed to detect that the synchronous rectifier has been off a sufficient time before being cycled on again.

In one embodiment, the synchronous rectifier is turned on long enough to drop the output voltage below the threshold. In another embodiment, the synchronous rectifier may be cycled on and off multiple times to reduce ripple if the output voltage remains over the threshold.

At the beginning of the next converter switching cycle, the power switch is then turned on, at the minimum duty cycle, to charge the primary winding, and the cycles repeat until the load comes out of its standby mode. Thereafter, the converter operates normally.

The invention may be used in conjunction with all types of primary side sensing circuits and using any suitable operation mode, such as current mode, voltage mode, burst mode, etc.

Although a disclosed embodiment employs primary side sensing by detecting the voltage at the drain of a MOSFET switch, the primary side sensing may also be by detecting the voltage across an auxiliary winding on the input side, where the voltage is related to the voltage across the secondary winding.

Elements that are the same or equivalent are labeled with the same numeral.

DETAILED DESCRIPTION

FIG. 3represents any of the many types of flyback converters using primary side sensing of the output voltage VOUT. Since the invention only relates to operation of the converter during a light load current condition, when the converter operates in the discontinuous mode and an over-voltage occurs, any conventional aspects of flyback converters may be used for medium to high load currents. Since such conventional circuitry is well known, and there are a variety of types, such a current mode, voltage mode, variable frequency, fixed frequency, etc., there is no need to describe such conventional circuitry in detail. The description of the conventional aspects of the converter10ofFIG. 1apply to the converter20ofFIG. 3.

For medium to high load current operation, the converter20periodically turns MOSFET M1on to charge the primary winding L1. The on-time of MOSFET M1is dependent on a feedback voltage at the drain of MOSFET M1related to VOUT, which was sampled at a time when the synchronous rectifier MOSFET M2was on and current was flowing through the secondary winding L2. The feedback voltage is used to create a value, using resistors RFB and RREF, that is compared to a reference voltage by an error amplifier. The error signal generated by the error amplifier sets the time that the MOSFET M1is on during the cycle (i.e., sets the duty cycle). This may be conventional.

In one embodiment, the converter20is a voltage mode type where the output regulation and control circuit14compares the error signal to a sawtooth waveform. When they cross, for medium and high current loads, the MOSFET M1is turned off to establish the duty cycle needed to precisely regulate the voltage.

If the converter20were a current mode type, the MOSFET M1remains on until a ramping current signal through the MOSFET M1crosses the error signal.

The regulation may use any other type of primary side sensing, including using an auxilliary winding on the input side to detect the output voltage.

When the MOSFET M1turns off, the MOSFET M2turns on. Many conventional techniques may be used to sense when to turn the MOSFET M2on. In one embodiment, the synchronous switch control24detects a voltage across the MOSFET M2. When the MOSFET M1switches off, the voltage across MOSFET M2will become negative (drain voltage lower than ground), and this sensed voltage reversal causes the synchronous switch control circuit24to turn on MOSFET M2. When the secondary winding L2current ramps down to zero, the drain voltage will rise, causing the synchronous switch control circuit24to turn off MOSFET M2. With each cycle of MOSFETs M1and M2turning on and off, a current pulse is provided to the output, which is smoothed by the capacitor C1to generate a DC regulated output voltage VOUT.

Various other conventional schemes may also be used to control the turning on and off of the MOSFET M2to emulate a diode.

The regulation scheme may be a variable frequency type or a fixed frequency type.

FIG. 5is a flowchart describing various steps performed by the converter20in a light load, minimum duty cycle mode, and such steps will be referenced in the below description.

For primary side sensing, the MOSFETs must trigger to generate a voltage across the primary winding L1in order to detect VOUT. At light loads, very little or no current may be drawn, yet the converter20must still perform a periodic minimum duty cycle to detect VOUT (step30inFIG. 5). The light load may be due to the load going into a standby mode (step32inFIG. 5). In the event, the minimum duty cycle is too high for the required load current, VOUT will rise above the desired regulated value (steps34and36inFIG. 5).

FIG. 4illustrates the currents in the primary winding L1and secondary winding L2as well as the voltage across the MOSFET M1during a light load condition in accordance with the invention.

At time T1, the MOSFET M1turns on, which may be under the control of a clock for a fixed frequency type of operation. This causes a ramping current to flow through the primary winding L1.

After a minimum time (for a minimum duty cycle), at time T2, the MOSFET M1is turned off. Such a minimum time may be set by a timer in the output regulation and control circuit14that prevents the MOSFET M1from being turned off prior to a predetermined minimum time. Such circuitry is conventional.

At time T2, the synchronous switch control circuit24detects the reversal of voltage across the secondary winding L2and turns on the MOSFET M2. This generates a ramp down current through the secondary winding L2, which charges the capacitor C1above the desired regulated VOUT level, due to the light load requirements.

At time T3, the secondary winding L2current has ramped down to zero. The synchronous switch control circuit24detects the slight rise in drain voltage and turns off the MOSFET M2, creating a discontinuous mode (step40inFIG. 5). If MOSFET M2had not been turned off, a reverse current would flow through the secondary winding L2. Conventional circuitry may be used to detect the onset of the reversal of current in the secondary winding L2and switch off the MOSFET M2, where this may occur slightly before or after the actual current reversal in the secondary winding L2.

Between the times T2and T3, VOUT may be sampled by the output regulation and control circuit14to determine the duty cycle of the MOSFET M1during the next cycle. It is conventional, although not required, for the sampling to occur at approximately the time that the current through the secondary winding L2is zero. During light load currents, the duty cycle will be a predetermined minimum duty cycle.

A comparator42receives VOUT or a voltage proportional to VOUT, such as a resistor-divided voltage, and compares it to a reference voltage Vref slightly above the desired regulated voltage. Vref may be equivalent to VOUT×1.05.

At the same time, a timer44detects that the MOSFET M2has been off a minimum amount of time to ensure that VOUT has been sampled on the primary side. The timer44is optional since it may not be needed in some cases, such as if the sampling occurs before the current though the secondary winding L2is zero. If an over-voltage is detected and if the timer44indicates that the MOSFET M2has been off a sufficient amount of time (step46inFIG. 5), a logic circuit48triggers the synchronous switch control circuit24to turn on MOSFET M2to conduct a reverse current through the secondary winding L2at time T4(step50inFIG. 5). This turn-on time may be a fixed time or may occur for a time to sufficiently lower VOUT to trigger the comparator42. If the turn on time is a fixed time, multiple cycles of turning on and off the MOSFET M2may be used to lower VOUT to minimize ripple.

During the time that the MOSFET M2is on, between times T4-T5, a voltage is across the MOSFET M1related to the voltage across the secondary winding L2.

At time T5, the MOSFET M2is turned off, which causes a reversal of the voltage across the primary winding L1. This causes the drain-body diode D1of the MOSFET M1to conduct, as shown between the times T5-T6, which draws a current through the primary winding L1between times T5-T6(step52inFIG. 5). Such current flows into the battery supplying VIN, so the power is not wasted. Thus, excess power has been transferred from the secondary side to the primary side to improve the efficiency of the converter20at light loads, and no minimum load current resistor or zener diode is needed to mitigate over-voltages (step54inFIG. 5). In some cases, MOSFET M1may turn on during the time that the diode D1is conducting, such as when a new charging cycle starts pursuant to a clock pulse.

At the times when both MOSFETs are off, a tank circuit is created, causing oscillations across the MOSFET M1.

In another embodiment, instead of the drain-body diode D1conducting the current through the primary winding L1during times T5-T6, after the reverse current interval, a sense circuit could be added that senses the change in voltage at the primary winding L1and turns MOSFET M1on to conduct the excess power into the power supply. Such control of the MOSFET M1may be independent of the output regulation and control circuit14, since the circuit14will usually only turn MOSFET M1on at the beginning of a clock cycle. Such a technique may be useful if the power switch did not include an inherent diode between the primary winding L1and ground.

In yet another embodiment, the comparator42detects that the output voltage is greater than the desired regulated voltage and keeps the MOSFET M2on as long as required to reduce the output voltage below Vref. For example, with respect toFIG. 4, at time T3, the synchronous switch control24, comparator42, and logic48operate to keep the MOSFET M2on to conduct a reverse current through the secondary winding L2, to lower the output voltage below Vref, without first entering a discontinuous mode. Once the comparator42detects that the output voltage has fallen below Vref, the comparator42triggers to cause the MOSFET M2to turn off and causing a discontinuous mode. In another embodiment, the discontinuous mode may be any duration (including zero) after the current through the secondary winding L2drops to zero. The comparator42may have hysteresis.

The invention may be employed during a fixed frequency operation of the converter20or during a special light load mode of operation where the MOSFET M1is not turned on at a fixed frequency.

The MOSFETs may instead be bipolar transistors.

Those skilled in the art may design the various functional blocks in many ways without undue experimentation and using conventional circuit techniques.