RF power amplifier

An RF power amplifier includes a plurality of amplifier cells. Each amplifier cell includes a bipolar transistor and a base circuit that comprises an RF coupling capacitor, a bias resistor, a base capacitor, and a base resistor. The base circuit transmits DC bias current and an RF signal to the base of the bipolar transistor to provide a selectable frequency response. The base circuit may be implemented using a structure of stacked capacitors.

TECHNICAL FIELD

The present invention generally relates to a power amplifier, and more particularly to power amplifiers operating at radio frequency and microwave.

BACKGROUND

Some high power radio frequency (RF) amplifiers formed of bipolar transistors have problems with current collapse and sub-harmonics generation. The current collapse is caused by an asymmetrical circuit configuration and a non-uniform temperature distribution in the bipolar transistors. Current collapse is typically solved by a technique of dividing a large bipolar transistor into a plurality of amplifier cells with smaller bipolar transistors, and adding a plurality of resistors as ballasts to the bases and emitters of the smaller bipolar transistors in the amplifier cells. Although deep driving amplifiers at high power provides added efficiency, sub-harmonics are generated when bipolar transistors of the amplifiers are driven by a large RF signal. The sub-harmonic problem can not be disregarded because communication systems, such as global systems for mobile communication (GSM), typically have a sub-harmonic level lower than −35 dBm.

SUMMARY

An RF power amplifier comprises a plurality of amplifier cells. Each amplifier cell comprises a bipolar transistor and a base circuit. Each bipolar transistor includes an emitter coupled to a ground node. Each base circuit includes an RF input node for receiving an RF signal, includes a bias voltage node for receiving a bias voltage, and includes a base node coupled to the base of the bipolar transistor.

In one aspect, each base circuit comprises first and second capacitors and first and second resistors. The first capacitor is coupled between the RF input node and the first resistor. The first resistor is coupled between the bias voltage node and the first capacitor. The second capacitor and the second resistor are coupled together in parallel and coupled between the base of the bipolar transistor and a node formed by the first resistor and the first capacitor.

In one aspect, the collector of the bipolar transistor is coupled to a collector node.

In another aspect, the base circuit includes a first circuit to control sub-harmonics of the bipolar transistor and includes a second circuit to provide ballast to control current collapse of the bipolar transistor.

DETAILED DESCRIPTION

FIG. 1is a schematic diagram of the conventional power amplifier cell100, which may be one of a plurality of power amplifier cells in a power amplifier circuit. The power amplifier cell100comprises a bipolar transistor101, a capacitor102, a bias resistor104and an emitter resistor106. The capacitor102couples an RF1 input node112to a base of the bipolar transistor101. The bias resistor104couples a DC bias input node111to the base of the bipolar transistor101. The emitter resistor106couples an emitter of the bipolar transistor101to a ground node114. A collector of the bipolar transistor101is coupled to a collector node113, which may be coupled to an output node (not shown). An RF signal is applied to the base of the bipolar transistor101through the RF input node112and the capacitor102. The capacitor102couples the RF signal to the base of the bipolar transistor101by blocking the DC bias current flowing from the RF signal source. DC bias current is applied from the DC bias input node111to the base of the bipolar transistor101through the bias resistor104. The resistors104and106are ballasts for reducing current collapse of the power amplifier cell100from high temperature operation.

The emitter resistor106is a ballast and equivalently appears in an output circuit of the bipolar transistor101. A large emitter current flowing through the resistors104and106loses the RF power and DC current in the resistors104and106. Also, the loss of DC current reduces the voltage applied from a DC power supply on the bipolar transistor101, and limits the swing of output RF power. Therefore, the ballast of the emitter resistor106decreases the RF output power and power added efficiency (PAE) of the power amplifier cell100. Moreover, the RF signal is directly coupled to the base of the bipolar transistor101via the coupling capacitor102to cause the bipolar transistor101to be deeply driven by the RF signal, although the emitter resistor106sometimes increases the RF stability of the power amplifier cell100. The overdriving profile occasionally causes the bipolar transistor101of the power amplifiers to be unstable. The unstable power amplifiers output undesired spurious and sub-harmonics as noted above.

FIG. 2is a schematic diagram of a conventional power amplifier200. The power amplifier200comprises a bipolar transistor201, a capacitor202, and a resistor204. The capacitor202and the resistor204are coupled to each other in parallel and coupled between an RF input node212and a base of the bipolar transistor201. The resistor204acts as a ballast, and also improves RF stability of the bipolar transistor201, although the capacitor202functions as a bypass to the RF signal. However, the capacitor202does not block the DC bias current flowing from an RF signal source or from one bipolar transistor to another bipolar transistor in an power amplifier cell configuration. The resistor204acts as the ballast, and also has a function of improving RF stability. In addition, the ballast of current collapse uses a larger resistor value than that of RF stability.

FIG. 3is a schematic diagram illustrating a power amplifier cell300in accordance with the present invention. The power amplifier cell300comprises a plurality of amplifier group circuits301-1and301-2. Although the power amplifier cell300comprises two amplifier group circuits301in an illustrative embodiment shown inFIG. 3, the power amplifier cell300may comprise other numbers of amplifier group circuits301. In one embodiment, the amplifier group circuits301are identical. Each of the amplifier group circuits301comprises a base circuit302and a bipolar transistor304. In one embodiment, the bipolar transistor304is a heterojunction bipolar transistor. The base circuit302comprises a base capacitor305, an RF coupling capacitor306, a bias resistor307, and a base resistor308. A first node of the bias resistor307is coupled to a DC bias input node311. A second node of the bias resistor307is coupled to a node formed of nodes of the base resistor308, the base capacitor305, and the RF coupling capacitor306. Another node of the base resistor308and another node of the base capacitor305are coupled together and to the base of the bipolar transistor304. The base resistor308and the base capacitor305are coupled in parallel. A second node of the RF coupling capacitor306is coupled to an RF input node312. A collector of the bipolar transistor304is coupled to a collector node313, which may be coupled to an output node (not shown). An emitter of the bipolar transistor304is coupled to a ground node314.

FIG. 4is a block diagram illustrating a power amplifier system400in accordance with the present invention. The power amplifier system400comprises a plurality of power amplifier cells401-1through401-n, and an output network405. A DC bias input node411is coupled to each of the power amplifier cells401-1through401-n. An RF input node412is coupled to each of the power amplifier cells401-1through401-n. The outputs of the power amplifier cells401-1through401-nare coupled to a collector node413, which is coupled to an output network405. An RF output network node406is coupled to the output network405. A ground node414is coupled to the power amplifier cells401-1through401-n. The power amplifier cells401-1through401-nmay be identical. The overall number n of the power amplifier cells401may be either odd or even. The output network405may include an RF choke, output impedance converting components and a node for coupling to a DC power supply. An illustrative embodiment of the output network405is described below in conjunction withFIG. 7. The output network405is coupled between the collector node413and the output node406. In an embodiment of the power amplifier cell401that includes a power amplifier cell300, the RF input node412is coupled to the RF input node312, and the DC bias input node411is coupled to the DC bias input node311. Further, the ground node414is coupled to the ground node304, and the collector node413is coupled to the collector node313.

The power amplifier system400may be included in wireless communication systems, e.g., telephones of global system for mobile communication (GSM), wireless local area network (WLAN), worldwide interoperability for microwave access (WiMAX), or in optical communication systems.

Referring again toFIG. 3, the operation of the power amplifier cell300is described. A DC bias current applied to the DC bias input node311is provided to the base of the bipolar transistor304through the bias resistor307and the base resistor308. The RF coupling capacitor306prevents DC current flowing into the bipolar transistor304from an RF signal source coupled to the RF input node312. An RF signal applied to the RF input node312is applied to the base of the bipolar transistor304through the RF coupling capacitor306, and the parallel circuit formed of the base resistor308and the base capacitor305. In one embodiment, the capacitance of the RF coupling capacitor306is sufficiently large to reduce the loss of RF transmission, and the resistance of the bias resistor307is sufficiently large to reduce RF leakage. In an illustrative example of a power cell300operating in a GSM frequency band, the RF coupling capacitor306has a capacitance of 0.20 Pico Farads, and the bias resistor307has a resistance of 390 ohms. The RF coupling capacitor306and the bias resistor307affect the balance of the DC and RF driving, while the power amplifier300operates in a deep nonlinear state. Also, the bias resistor307offers a ballast for preventing current collapse of the integrated power amplifier cell300.

The resistors307and308operate as base ballasts for controlling current for thermal issues. The RF coupling capacitor306operates for RF coupling. The parallel impedance of the base capacitor305and the base resistor308controls the magnitude of the inputted RF signal applied to the bipolar transistor304. The base resistor308reduces sub-harmonics, because it prevents the power amplifier cell300from being overdriven. The base capacitor305provides selectable frequency response based on its higher impedance at lower frequency. Therefore, the base circuit302is used in the power amplifier cell300to embody the present invention transmitting RF signal without thermal collapse and eliminating sub-harmonics.

One feature of the power amplifier cell300may include high power efficiency. The base side of the bipolar transistor304has smaller current (or power) compared with the emitter side. The base capacitor305and the base resistor308are coupled to the base side of the bipolar transistor304, and not the emitter side, so that the base capacitor305and the base resistor308cause smaller loss of RF signal and DC current. Another feature of the power amplifier cell300may be from the symmetry configuration of the power amplifier cell300. The power amplifier cell300includes two bipolar transistors304arranged as two emitter fingers. The temperature distribution of the emitter fingers is rather uniform in comparison with that of unsymmetrical configuration such as three fingers. Further, the power cell of the finger pair allows either odd or even numbers of power cells to integrate a power amplifier. Another feature of the power amplifier cell may improve the linearity of the power amplifier in terms of limiting the magnitude of RF input. The base-emitter junction of the bipolar transistor304dominates the nonlinear feature to the power amplifier. The contributions of harmonics and distortions can be typically reduced several dBs.

FIG. 5is a top plan view illustrating a layout of the power amplifier cell300. For the sake of clarity, insulating layers, such as nitrides and polyimide, and contact holes of metals are not shown inFIG. 5.FIG. 6is a partial cross-section view of the power amplifier cell ofFIG. 5. For the sake of clarity, the cross-sectional structure of the bipolar transistor304is not shown inFIG. 6. Instead the bipolar transistor304is shown by a schematic symbol.

The capacitors305and306are formed as a stacked structure, e.g., the RF input capacitor306is formed onto the base capacitor305. Top and bottom planes of the RF input capacitor306are fabricated by a second metal508and a first metal506, respectively. Top and bottom planes of the base capacitor305are formed of the first metal506and a collector metal505, respectively. (The collector metal505is referred to as “collector metal” because this metal layer may be used to form the collector contact of the transistor. However, the collector metal306may be formed by a separate process from the capacitors and the collector.) The resistors307and308may be thin film resistors512-1and512-2, respectively. A strip of the first metal506may be formed on the thin film resistor512-1dividing it to form the resistors307and308. The first metal506is connected to a center plane of the stacked capacitor. The top plane of the stacked capacitors is fabricated by the second metal508, which is connected to the RF input node312. The bottom plane of the capacitors fabricated by the collector metal505is coupled to the base502of the bipolar transistor304, and another node of the resistor308. A strip formed by the second metal508is coupled to the DC bias input313of overall amplifier groups. An emitter node501, a base node502, and a collector node503of the bipolar transistor304may be formed with a rectangular shape and parallel to each other.

A substrate610may be formed of GaAs material. An isolation implant607is defined by ion implantation on the substrate610. The collector metal505is formed on the isolation implant607. A first nitride layer605is formed on the collector metal505, after regions in the collector metal505are removed to form the plate of the base capacitor305and the collector contact. An insulating layer (not shown and, for example, formed of polyimide) is deposited to reduce cross-over capacitance between a second nitride603and the second metal508. In the stacked area, the insulating layer is specially removed for defining the area of stacked capacitors due to its thickness and low dielectric constant. The layer of collector metal406is utilized as a bottom plane, and coupled by the first metal506to a thin film resistor512. A second nitride layer603is formed on the first metal layer506. A final nitride layer601is formed of silicon nitride as a preservation layer on the second metal508.

The stacked structure may be formed using conventional foundry techniques. In one embodiment, the nitride layers603and605of the capacitors305and306are insulated and may be formed of silicon nitride. In an illustrative example, the layers603and605are the same thickness of 0.16 um, and the stacked capacitance density is 0.72 fF/um2, which is double of the conventional capacitance of 0.36 fF/um2.

The power amplifier cell300may be implemented in an integrated circuit. Further, the power amplifier cell300may be implemented compactly because the capacitors305and306are formed in a stacked structure.

FIG. 7is a schematic diagram illustrating the output network405(FIG. 4). The output network405comprises an impedance converter701coupled between the collector node413and the output node406, and further comprises an inductor702coupled between the impedance converter701and the DC power supply. The impedance converter701comprises a plurality of inductors703and704and a plurality of capacitors707,708and709.

In the foregoing description, various methods and apparatus, and specific embodiments are described. However, it should be obvious to one conversant in the art, various alternatives, modifications, and changes may be possible without departing from the spirit and the scope of the invention which is defined by the metes and bounds of the appended claims.