Reference voltage generating circuit of generating a plurality of reference voltages

A reference voltage generating circuit comprises a differential amplifier having a first input connected to receive a constant voltage and a second input connected through a voltage feedback path to an output of the differential amplifier so as to receive a voltage in proportion to an a first reference voltage outputted from the differential amplifier. A voltage divider composed of series-connected resistors is connected to the output of the differential amplifier so as to form a current path independent of the voltage feedback path, so that the voltage divider generates a second reference voltage different from the first reference voltage. Thus, a single reference voltage generating circuit generates a plurality of reference voltages.

BACKGROUND OF THE INVENTION 
1. Field of the Invention 
The present invention relates to a reference voltage generating circuit, 
and more specifically to a reference voltage generating circuit of 
efficiently generating a plurality for reference voltages. 
2. Description of Related Art 
A reference voltage generator stably generates a voltage to be used as a 
reference, and supplies the reference voltage to a circuit which is 
internally provided in a semiconductor device and which needs the 
reference voltage. The reference voltage generator is required to generate 
a voltage which is always constant even if a variation occurs in an 
operating condition such as a voltage supply voltage and temperature. 
Ordinarily, in other words, the reference voltage generator cannot 
generate a varying voltage. 
Since a reference voltage generator can generate only the constant voltage, 
it is the prior art practice that a differential amplifier and resistors 
are used in order to generate a desired voltage from the generated 
constant voltage, disclosed in for example Japanese Patent Application 
Pre-examination Publication No. JP-A-62-274909, (an English abstract of 
JP-A-62-274909 is available from the Japanese Patent Office and the 
content of the English abstract of JP-A-62-274909 is incorporated by 
reference in its entirety into this application). 
Referring to FIG. 1, there is shown a circuit diagram disclosed in 
JP-A-62-274909. In the shown prior art reference voltage generating 
circuit, a reference voltage generator 1 generates a reference voltage 
V.sub.ref which is at a constant even if a variation occurs in an 
operating condition including a voltage supply voltage and a temperature. 
The reference voltage V.sub.ref is supplied to a non-inverted input of a 
differential amplifier 2, which has an output fed back to an inverted 
input of the differential amplifier 2 through a selected one or ones of 
series-connected resistors R.sub.1 to R.sub.64 in a selection circuit 3. 
The selection circuit 3 includes a number of selection transistors 
Q.sub.101 to Q.sub.364 connected as shown between the inverted input of 
the differential amplifier 2 and 64 connections nodes N.sub.1 to N.sub.64 
of the series-connected resistors R.sub.1 to R.sub.64, in order to connect 
a selected one of the connections nodes N.sub.1 to N.sub.64 of the 
series-connected resistors R.sub.1 to R.sub.64, to the inverted input of 
the differential amplifier 2. For this purpose, the selection circuit 3 
also includes a decoder circuit DEC and inverters IV.sub.3 and IV.sub.4, 
which receives control signals T1 to T6 to selectively turn on the 
selection transistors Q.sub.101 to Q.sub.364. Thus, it is possible to 
arbitrarily select an voltage dividing ratio of the output voltage 
V.sub.ref2 of the differential amplifier 2, by the control signals T1 to 
T6, and therefore, to arbitrarily set the output voltage V.sub.ref2. 
Referring to FIG. 2, there is shown a simplified circuit diagram of a 
portion of the prior art reference voltage generating circuit excluding 
the reference voltage generator 1. In a simplified circuit 60 shown in 
FIG. 2, V.sub.O corresponds to V.sub.ref in FIG. 1, and V.sub.ref 
corresponds to V.sub.ref2 in FIG. 1. A differential amplifier 10 
corresponds to the differential amplifier 2 in FIG. 1. Series-connected 
resistors R.sub.1 and R.sub.2 connected between an output 50 of the 
differential amplifier 10 and the ground represent the series-connected 
resistors R.sub.1 to R.sub.64 in FIG. 1. A connection node between the 
series-connected resistors R.sub.1 and R.sub.2 is connected to an inverted 
input of the differential amplifier 10. 
Now, an operation will be described with reference to the simplified 
circuit diagram shown in FIG. 2. The reference voltage V.sub.O is supplied 
to a non-inverted input 20 of the differential amplifier 10, and the 
inverted input of the differential amplifier 10 is connected to receive a 
voltage V.sub.1 obtained by dividing the output voltage V.sub.REF of the 
differential amplifier 10 by a voltage divider formed of the resistors 
R.sub.1 and R.sub.2. At this time, the following relation holds: 
EQU V.sub.1 =V.sub.REF .multidot.R.sub.2 /(R.sub.1 +R.sub.2) (1) 
Since the differential amplifier 10 operates to make the two inputs equal 
to each other, the following relation ultimately holds: 
EQU V.sub.O =V.sub.1 (2) 
Therefore, the desired reference voltage V.sub.REF is expressed as follows: 
EQU V.sub.REF =V.sub.O .multidot.(R.sub.1 +R.sub.2)/R.sub.2 (3) 
Accordingly, a desired voltage can be obtained by adjusting the values of 
the resistors R.sub.1 and R.sub.2. 
Here, a capacitor 40 having a capacitance C is connected between the output 
50 of the differential amplifier 10 and the ground, as a compensating 
capacitance for stabilizing the output voltage V.sub.REF. 
In the prior art, when a plurality of different reference voltages are 
required, it was necessary to provide in a semiconductor device a 
plurality of circuits 61 to 63 each corresponding to the circuit 60 shown 
in FIG. 2, as shown in FIG. 3, and to make the resistance ratio between 
R.sub.1 and R.sub.2 in the circuits 61 to 63 different from one another, 
so that the circuits 61 to 63 generate different voltages. Therefore, when 
a plurality of different reference voltages are required, it is necessary 
to provide reference voltage generating circuits of the number equal to 
the number of the required reference voltages. This means that it is 
necessary to provide a plurality of circuits which are the same excluding 
the resistors, with the result that the chip size closely influencing the 
cost becomes large. 
The size of the differential amplifier is not so large, but the resistor 
requires a large area, because it is necessary to make the resistance 
value large in order to minimize the electric power consumption. For 
example, when the resistance of R.sub.1 +R.sub.2 is 1000 K.OMEGA., the 
current flowing through these resistors R.sub.1 and R.sub.2 becomes 1 
.mu.A. For a low consumed current, it is the ordinary practice that the 
resistance value of R.sub.1 +R.sub.2 is set in the range of 100 K.OMEGA. 
to 10 M.OMEGA.. For example, if the resistor of 1000 K.OMEGA. is formed of 
silicide, assuming that a sheet resistance of the silicide is about 
10.OMEGA./.quadrature., the length of 200 mm is required with the width of 
2 .mu.m. It would be understood that the resistor requires a large area. 
Here, it may be supposed that it is sufficient if the resistor R.sub.1 
shown in FIG. 2 is divided into a plurality of resistors R.sub.11 and 
R.sub.12 as shown in FIG. 4, so that a plurality of reference voltages 
V.sub.REF1 and V.sub.REF2 are generated. However, because of a 
compensating capacitance C.sub.2 added to stabilize V.sub.REF2, the 
voltage V.sub.1 fed back to the differential amplifier is delayed by the 
time constant of R.sub.11 .multidot.C.sub.12, so that a delay occurs in 
the control for the differential amplifier, and oscillation occurs in an 
extreme case. In this case, the reference voltage can be no longer 
utilized. Therefore, reference voltage generating circuits of the number 
equal to the number of required different reference voltages were required 
in the prior art. 
SUMMARY OF THE INVENTION 
Accordingly, it is an object of the present invention to provide a 
reference voltage generating circuit which has overcome the above 
mentioned defect of the conventional one. 
Another object of the present invention is to provide a reference voltage 
generating circuit capable of stably generating a plurality of different 
reference voltages with a simple circuit construction. 
The above and other objects of the present invention are achieved in 
accordance with the present invention by a reference voltage generating 
circuit comprising a first reference voltage generating means including a 
differential amplifier having a first input connected to receive a 
constant voltage and a second input connected through a voltage feedback 
means to an output of the differential amplifier so as to receive a 
voltage in proportion to a first reference voltage generated by the 
differential amplifier, and a second reference voltage generating means 
connected to the output of the differential amplifier and having a current 
path independent of the voltage feedback means, for generating at least a 
second reference voltage different from the first reference voltage.

DESCRIPTION OF THE PREFERRED EMBODIMENTS 
Referring to FIG. 5, there is shown a circuit diagram of a first embodiment 
of the reference voltage generating circuit in accordance with the present 
invention for generating a plurality of different reference voltages. In 
FIG. 5. elements similar to those shown in FIGS. 1 to 4 are given the same 
reference numerals. The shown embodiment is configured to generate three 
different reference voltages. 
The shown embodiment includes a differential amplifier 10 having a 
non-inverted input 20 connected to receive the constant voltage V.sub.O 
which corresponds to the reference voltage V.sub.ref generated in the 
reference voltage generator 1 in FIG. 1 and which is at a constant even if 
a variation occurs in an operating condition including a voltage supply 
voltage and a temperature. An output of the differential amplifier 10 is 
connected through series-connected resistors R.sub.1 and R.sub.2 to the 
ground, and a connection node between the series-connected resistors 
R.sub.1 and R.sub.2 is connected to an inverted input of the differential 
amplifier 10, so that a divided-voltage V.sub.1 is fed back to the 
inverted input of the differential amplifier 10. Thus, the output of the 
differential amplifier 10 outputs a first reference voltage V.sub.REF1. 
The output of the differential amplifier 10 is also connected through 
series-connected resistors R.sub.3, R.sub.4 and R.sub.5 to the ground. 
With this arrangement, the series-connected resistors R.sub.1 and R.sub.2 
generate a first reference, voltage V.sub.REF1. From the first reference 
voltage V.sub.REF1, the series-connected resistors R.sub.3, R.sub.4 and 
R.sub.5 generate a second reference voltage V.sub.REF2 and a third 
reference voltage V.sub.REF3 at a connection node between the resistors 
R.sub.3 and R.sub.4 and at a connection node between the resistors R.sub.4 
and R.sub.5, respectively. Namely, the series-connected resistors R.sub.3, 
R.sub.4 and R.sub.5 constitute a voltage divider. 
For stabilizing the output reference voltages, capacitors C.sub.1, C.sub.2 
and C.sub.3 are connected to the output of the differential amplifier 10, 
the connection node between the resistors R.sub.3 and R.sub.4 and the 
connection node between the resistors R.sub.4 and R.sub.5, respectively. 
As seen from comparison between FIG. 5 and FIGS. 2 and 3, the shown 
embodiment is characterized in that desired reference voltages are 
obtained from the first reference voltage V.sub.REF1 generated by the 
differential amplifier 10, by action of the voltage divider composed of 
the series-connected resistors R.sub.3, R.sub.4 and R.sub.5. Therefore, in 
addition to a first reference voltage generating part constituted of the 
differential amplifier 10 and the resistors R.sub.1 and R.sub.2, the 
voltage divider composed of the series-connected resistors R.sub.3, 
R.sub.4 and R.sub.5 constitutes a second reference voltage generating 
part. This second reference voltage generating part is composed of only a 
passive circuit and is very simple in construction. 
V.sub.REF1, V.sub.REF2 and V.sub.REF3 come under the relation expressed as 
follows: 
EQU V.sub.REF1 &gt;V.sub.REF2 &gt;V.sub.REF3 (4) 
Therefore, desired reference voltages are re-arranged to meet this 
relation, and the resistance values of R.sub.1 and R.sub.2 are adjusted or 
set to cause V.sub.REF1 to fulfill a maximum voltage of the desired 
reference voltages. 
As explained in connection with the prior art, V.sub.REF1 is expressed as 
follows: 
EQU V.sub.REF1 =V.sub.O .multidot.(R.sub.1 +R.sub.2)/R.sub.2 (5) 
In addition, V.sub.REF2 and V.sub.REF3 are expressed as follows: 
EQU V.sub.REF2 =V.sub.REF1 .multidot.(R.sub.4 +R.sub.5)/(R.sub.3 +R.sub.4 
+R.sub.5) (6) 
EQU V.sub.REF3 =V.sub.REF1 R.sub.5 /(R.sub.3 +R.sub.4 +R.sub.5)(7) 
Therefore, the resistance values of R.sub.3, R.sub.4 and R.sub.5 are 
adjusted or set to cause V.sub.REF2 and V.sub.REF3 to fulfill the 
remaining voltages of the desired reference voltages. In other words, 
V.sub.REF1, V.sub.REF2 and V.sub.REF3 can be freely set to arbitrary 
values, by setting the resistance values of R.sub.1, R.sub.2, R.sub.3, 
R.sub.4 and R.sub.5. 
In the shown embodiment, since only the capacitor C.sub.1 connected to 
V.sub.REF1 exists in a feedback loop of the differential amplifier, 
namely, in a path going from the output V.sub.REF1 of the differential 
amplifier through the resistor R.sub.1 to the inverted input V.sub.1 of 
the differential amplifier, and since the capacitor C.sub.1 is positioned 
upstream of the resistor in the feedback loop, no delay occurs in the 
feedback control of the differential amplifier. In addition, since the 
capacitor C.sub.2 connected to V.sub.REF2 and the capacitor C.sub.3 
connected to V.sub.REF3 are not positioned in the feedback loop, the 
feedback control of the differential amplifier is in no way influenced by 
the capacitor C.sub.2 connected to V.sub.REF2 and the capacitor C.sub.3 
connected to V.sub.REF3. 
Referring to FIG. 6, there is shown a circuit diagram of a second 
embodiment of the reference voltage generating circuit in accordance with 
the present invention for generating a plurality of different reference 
voltages. In FIG. 6, elements corresponding to those shown in FIG. 5 are 
given the same reference numerals, and explanation thereof will be omitted 
for simplification of explanation. 
The first embodiment is sufficient if it is necessary only to supply a 
plurality of different constant reference voltages. However, it is not 
satisfactory in the case that in order to perform a screening to remove an 
initial or early defect in the semiconductor device, an acceleration test 
is carried out in which a high voltage is ordinarily applied. 
In the semiconductor device, for example, when V.sub.REF1 is used as a 
reference voltage of a power supply for a peripheral circuit and 
V.sub.REF2 is used as a reference voltage of a power supply for memory 
cells, the acceleration coefficient is different between the peripheral 
circuit and the memory cell section, because an insulating oxide film in a 
memory cell capacitor is ordinarily thinner than a gate oxide film of a 
transistor in the peripheral circuit. Therefore, the ratio of V.sub.REF1 
to V.sub.REF2 must be made different from an normal operation to the 
acceleration test. However, the first embodiment cannot meet this request, 
since it is apparent that V.sub.REF2 is determined by the above mentioned 
equation (6), and therefore, is always in a constant proportion to 
V.sub.REF1. 
Therefore, the second embodiment includes a P-channel transistor P.sub.1 
operating as a switch, inserted between the V.sub.REF2 side terminal of 
the resistor R.sub.3 and the V.sub.REF2 side terminal of the resistor 
R.sub.4. A gate of this P-channel transistor P.sub.1 is connected to 
receive a test signal TEST which is brought to a high level in the 
acceleration test. Therefore, in the acceleration test, V.sub.REF1 is 
electrically isolated from V.sub.REF2 by the P-channel transistor P.sub.1 
which is put in an OFF condition by the high level of the test signal 
TEST. Furthermore, the second embodiment includes a test power supply 
voltage generating circuit 8, which has an output voltage terminal 8A 
connected to the V.sub.REF2 terminal of the resistor R.sub.4, and which is 
activated by the high level of the signal TEST to supply a test voltage in 
place of V.sub.REF2. Thus, the ratio of V.sub.REF1 to V.sub.REF2 can take 
a value different from that in the normal operation. 
In this embodiment, V.sub.REF3 assumes a value expressed by the following 
equation: 
EQU V.sub.REF3 =V.sub.REF2 .multidot.R.sub.5 /(R.sub.4 +R.sub.5)(8) 
In this connection, although not shown, it is possible to supply a voltage 
different from V.sub.O, in place of V.sub.O, in the acceleration test, so 
that V.sub.REF1 is made different from that in the normal operation. In 
addition, it is also possible to generate V.sub.REF3 independent of 
V.sub.REF2 by adding a circuit similarly to the circuit associated to 
V.sub.REF2 in this second embodiment. 
When the test signal TEST is at a low level, the P-channel transistor 
P.sub.1 is put in an ON condition, and the test power supply voltage 
generating circuit 8 is deactivated so that the output voltage terminal 8A 
is put in a high impedance condition. In this situation, therefore, the 
second embodiment operates completely similarly to the first embodiment. 
As seen from the above, the reference voltage generating circuit in 
accordance with the present invention is characterized by comprising a 
first reference voltage generating means including a differential 
amplifier having a first input connected to receive a constant voltage and 
a second input connected through a voltage feedback means to an output of 
the differential amplifier so as to receive a voltage in proportion to a 
first reference voltage generated by the differential amplifier, and a 
second reference voltage generating means connected to the output of the 
differential amplifier and having a current path independent of the 
voltage feedback means, for generating at least one second reference 
voltage different from the first reference voltage. 
Therefore, a plurality of different reference voltages can efficiently be 
generated in a single reference voltage generating circuit having a simple 
construction obtained by adding the second reference voltage generating 
means to the prior art reference voltage generating circuit. This is very 
advantageous over the prior art requiring a plurality of reference voltage 
generating circuits in order to generate a corresponding number of 
different reference voltages. 
The invention has thus been shown and described with reference to the 
specific embodiments. However, it should be noted that the present 
invention is in no way limited to the details of the illustrated 
structures but changes and modifications may be made within the scope of 
the appended claims.