SYSTEMS AND TECHNIQUES FOR MAGNETIC FIELD CANCELLATION FOR A RADIO ARCHITECTURE

Certain aspects of the present disclosure provide techniques and apparatus for generating oscillating signals and for wireless communication, such as a frequency synthesizer architecture using a step-symmetric inductor. An example frequency synthesizer generally includes an oscillator and a frequency adjustment circuit, an output of the oscillator being coupled to an input of the frequency adjustment circuit, the frequency adjustment circuit comprising a step-symmetric inductive element. An example transceiver generally includes the frequency synthesizer described herein, as well as a mixer having a local-oscillator (LO) input coupled to an output of the frequency adjustment circuit; and an amplifier coupled to the mixer.

BACKGROUND

Field of the Disclosure

Certain aspects of the present disclosure generally relate to electronic components and, more particularly, to radio frequency front-end (RFFE) circuitry.

Description of Related Art

Electronic devices include computing devices such as desktop computers, notebook computers, tablet computers, smartphones, wearable devices like a smartwatch, internet servers, and so forth. These various electronic devices provide information, entertainment, social interaction, security, safety, productivity, transportation, manufacturing, and other services to human users. These various electronic devices depend on wireless communications for many of their functions. Wireless communication systems and devices are widely deployed to provide various types of communication content such as voice, video, packet data, messaging, broadcast, and so on. These systems may be capable of supporting communication with multiple users by sharing the available system resources (e.g., time, frequency, and power). Examples of such systems include code division multiple access (CDMA) systems, time division multiple access (TDMA) systems, frequency division multiple access (FDMA) systems, and orthogonal frequency division multiple access (OFDMA) systems (e.g., a Long Term Evolution (LTE) system or a New Radio (NR) system). Wireless devices may include a transceiver for processing signals for reception and/or transmission. A transceiver may include one or more transmit chains and one or more receive chains, which may include one or more amplifiers, one or more filters, and one or more mixers. The transceiver may also include one or more frequency synthesizers, which may include one or more tunable oscillators.

SUMMARY

Certain aspects of the present disclosure are directed towards a transceiver. The transceiver generally includes an oscillator and a frequency adjustment circuit, an output of the oscillator being coupled to an input of the frequency adjustment circuit, the frequency adjustment circuit comprising a step-symmetric inductive element.

Certain aspects of the present disclosure are directed towards a frequency synthesizer. The frequency synthesizer generally includes an oscillator and a frequency adjustment circuit, an output of the oscillator being coupled to an input of the frequency adjustment circuit, the frequency adjustment circuit comprising a step-symmetric inductive element.

Certain aspects of the present disclosure are directed towards a transceiver. The transceiver generally includes an oscillator and a frequency adjustment circuit, an output of the oscillator being coupled to an input of the frequency adjustment circuit, the frequency adjustment circuit comprising a first inductive element having a first inductive portion and a second inductive portion, wherein current is configured to flow in the first inductive portion in a first angular direction and in the second inductive portion in a second angular direction opposite to the first angular direction.

Certain aspects of the present disclosure are directed towards a frequency synthesizer. The frequency synthesizer generally includes an oscillator and a frequency adjustment circuit, an output of the oscillator being coupled to an input of the frequency adjustment circuit, the frequency adjustment circuit comprising a first inductive element having a first inductive portion and a second inductive portion, wherein current is configured to flow in the first inductive portion in a first angular direction and in the second inductive portion in a second angular direction opposite to the first angular direction.

Certain aspects of the present disclosure are directed towards a method for wireless communication. The method generally includes: generating a first oscillating signal having a first frequency; and generating, via a frequency adjustment circuit, a second oscillating signal having a second frequency greater than the first frequency, the frequency adjustment circuit comprising a step-symmetric inductive element.

DETAILED DESCRIPTION

Certain aspects of the present disclosure are directed towards a transceiver implemented using step-symmetric and dual-core structure inductive elements. The transceiver described herein addresses various challenges present in conventional transceivers, such as power consumption, generation of spurs (e.g., harmonic signal components), and voltage-controlled oscillator (VCO) and/or local oscillator (LO) pulling. Using step-symmetric and dual-core structure inductive elements facilitates a reduction of magnetic emissions (e.g., cancellation of magnetic fields), allowing for reduced noise associated with the transceiver. Moreover, the transceiver may be implemented using a zero-intermediate frequency (IF) and half-LO architecture, reducing power consumption.

Example Wireless Communications

FIG.1illustrates a wireless communications system100with access points110and user terminals120, in which aspects of the present disclosure may be practiced. For simplicity, only one access point110is shown inFIG.1. An access point (AP) is generally a fixed station that communicates with the user terminals and may also be referred to as a base station (BS), an evolved Node B (eNB), a next generation Node B (gNB), or some other terminology. A user terminal (UT) may be fixed or mobile and may also be referred to as a mobile station (MS), an access terminal, user equipment (UE), a station (STA), a client, a wireless device, or some other terminology. A user terminal may be a wireless device, such as a cellular phone, a personal digital assistant (PDA), a handheld device, a wireless modem, a laptop computer, a tablet, a personal computer, etc.

Access point110may communicate with one or more user terminals120at any given moment on the downlink and uplink. The downlink (i.e., forward link) is the communication link from the access point to the user terminals, and the uplink (i.e., reverse link) is the communication link from the user terminals to the access point. A user terminal may also communicate peer-to-peer with another user terminal. A system controller130couples to and provides coordination and control for the access points.

Wireless communications system100employs multiple transmit and multiple receive antennas for data transmission on the downlink and uplink. Access point110may be equipped with a number Napof antennas to achieve transmit diversity for downlink transmissions and/or receive diversity for uplink transmissions. A set Nu of selected user terminals120may receive downlink transmissions and transmit uplink transmissions. Each selected user terminal transmits user-specific data to and/or receives user-specific data from the access point. In general, each selected user terminal may be equipped with one or multiple antennas (i.e., Nut≥1). The Nu selected user terminals can have the same or different number of antennas.

Wireless communications system100may be a time division duplex (TDD) system or a frequency division duplex (FDD) system. For a TDD system, the downlink and uplink share the same frequency band. For an FDD system, the downlink and uplink use different frequency bands. Wireless communications system100may also utilize a single carrier or multiple carriers for transmission. Each user terminal120may be equipped with a single antenna (e.g., to keep costs down) or multiple antennas (e.g., where the additional cost can be supported).

In some aspects, the user terminal120or access point110may include a frequency synthesizer implemented with an oscillator and a frequency doubler for generating a local-oscillator (LO) signal. The frequency doubler may be implemented with a step-symmetric inductive element, as described in more detail herein.

On the uplink, at each user terminal120selected for uplink transmission, a TX data processor288receives traffic data from a data source286and control data from a controller280. TX data processor288processes (e.g., encodes, interleaves, and modulates) the traffic data {dup} for the user terminal based on the coding and modulation schemes associated with the rate selected for the user terminal and provides a data symbol stream {Sup} for one of the Nut,mantennas. A transceiver front end (TX/RX)254(also known as a radio frequency front end (RFFE)) receives and processes (e.g., converts to analog, amplifies, filters, and frequency upconverts) a respective symbol stream to generate an uplink signal. The transceiver front end254may also route the uplink signal to one of the Nut,mantennas for transmit diversity via an RF switch, for example. The controller280may control the routing within the transceiver front end254. Memory282may store data and program codes for the user terminal120and may interface with the controller280.

A number Nupof user terminals120may be scheduled for simultaneous transmission on the uplink. Each of these user terminals transmits its set of processed symbol streams on the uplink to the access point.

At access point110, Napantennas224athrough224apreceive the uplink signals from all Nupuser terminals transmitting on the uplink. For receive diversity, a transceiver front end222may select signals received from one of the antennas224for processing. The signals received from multiple antennas224may be combined for enhanced receive diversity. The access point's transceiver front end222also performs processing complementary to that performed by the user terminal's transceiver front end254and provides a recovered uplink data symbol stream. The recovered uplink data symbol stream is an estimate of a data symbol stream {sup} transmitted by a user terminal. An RX data processor242processes (e.g., demodulates, deinterleaves, and decodes) the recovered uplink data symbol stream in accordance with the rate used for that stream to obtain decoded data. Decoded data for each user terminal or access terminal may be provided to a data sink (e.g., data sink244, data sink272m, or data sink272x) for storage and/or a controller for further processing.

On the downlink, at access point110, a TX data processor210receives traffic data from a data source208for Ndnuser terminals scheduled for downlink transmission, control data from a controller230and possibly other data from a scheduler234. The various types of data may be sent on different transport channels. TX data processor210processes (e.g., encodes, interleaves, and modulates) the traffic data for each user terminal based on the rate selected for that user terminal. TX data processor210may provide a downlink data symbol streams for one of more of the Ndnuser terminals to be transmitted from one of the Napantennas. The transceiver front end222receives and processes (e.g., converts to analog, amplifies, filters, and frequency upconverts) the symbol stream to generate a downlink signal. The transceiver front end222may also route the downlink signal to one or more of the Napantennas224for transmit diversity via an RF switch, for example. The controller230may control the routing within the transceiver front end222. Memory232may store data and program codes for the access point110and may interface with the controller230.

At each user terminal120, Nut,mantennas252receive the downlink signals from access point110. For receive diversity at the user terminal120, the transceiver front end254may select signals received from one or more of the antennas252for processing. The signals received from multiple antennas252may be combined for enhanced receive diversity. The user terminal's transceiver front end254also performs processing complementary to that performed by the access point's transceiver front end222and provides a recovered downlink data symbol stream. An RX data processor270processes (e.g., demodulates, deinterleaves, and decodes) the recovered downlink data symbol stream to obtain decoded data for the user terminal.

In some aspects, the transceiver front end254or222may include a frequency synthesizer implemented with an oscillator and a frequency doubler for generating an LO signal. The frequency doubler may be implemented with a step-symmetric inductive element, as described in more detail herein.

FIG.3is a block diagram of an example transceiver front end300, such as transceiver front ends222,254inFIG.2, in which aspects of the present disclosure may be practiced. The transceiver front end300includes a transmit (TX) path302(also known as a “transmit chain”) for transmitting signals via one or more antennas and a receive (RX) path304(also known as a “receive chain”) for receiving signals via the antennas. When the TX path302and the RX path304share an antenna303, the paths may be connected with the antenna via an interface306, which may include any of various suitable radio frequency (RF) devices, such as a switch, a duplexer, a diplexer, a multiplexer, and the like.

Receiving in-phase (I) or quadrature (Q) baseband analog signals from a digital-to-analog converter (DAC)308, the TX path302may include a baseband filter (BBF)310, a mixer312, a driver amplifier (DA)314, and a power amplifier (PA)316. The BBF310, the mixer312, and the DA314may be included in a radio frequency integrated circuit (RFIC). In some cases, the PA316may be external to the RFIC.

The BBF310filters the baseband signals received from the DAC308, and the mixer312mixes the filtered baseband signals with a transmit local oscillator (LO) signal to convert the baseband signal of interest to a different frequency (e.g., upconvert from baseband to RF). This frequency-conversion process produces the sum and difference frequencies of the LO frequency and the frequency of the signal of interest. The sum and difference frequencies are referred to as the “beat frequencies.” The beat frequencies are typically in the RF range, such that the signals output by the mixer312are typically RF signals, which may be amplified by the DA314and/or by the PA316before transmission by the antenna303. While one mixer312is illustrated, several mixers may be used to upconvert the filtered baseband signals to one or more intermediate frequencies and to thereafter upconvert the intermediate frequency (IF) signals to a frequency for transmission.

The RX path304includes a low noise amplifier (LNA)322, a mixer324, and a baseband filter (BBF)326. The LNA322, the mixer324, and the BBF326may be included in a radio frequency integrated circuit (RFIC), which may or may not be the same RFIC that includes the TX path components. RF signals received via the antenna303may be amplified by the LNA322, and the mixer324mixes the amplified RF signals with a receive local oscillator (LO) signal to convert the RF signal of interest to a different baseband frequency (i.e., downconvert). The baseband signals output by the mixer324may be filtered by the BBF326before being converted by an analog-to-digital converter (ADC)328to digital I or Q signals for digital signal processing.

While it is desirable for the output of an LO to remain stable in frequency, tuning the LO to different frequencies typically entails using a variable-frequency oscillator, which may involve compromises between stability and tunability. Contemporary systems may employ frequency synthesizers with a voltage-controlled oscillator (VCO) to generate a stable, tunable LO with a particular tuning range. Thus, the transmit LO frequency may be produced by a TX frequency synthesizer318, which may be buffered or amplified by amplifier320before being mixed with the baseband signals in the mixer312. Similarly, the receive LO frequency may be produced by an RX frequency synthesizer330, which may be buffered or amplified by amplifier332before being mixed with the RF signals in the mixer324. In some aspects, the RX frequency synthesizer330and/or the TX frequency synthesizer318may include an oscillator and a frequency doubler for generating an LO signal. The frequency doubler may be implemented with a step-symmetric inductive element, as described in more detail herein.

Example Techniques for Magnetic Field Cancellation for a Radio Architecture

In Internet of things (IoT) applications, it is typically desirable to lower the power consumption of the radio-frequency (RF) transceiver. It may be even more preferable to reduce the receiver (RX) power consumption because the receiver is active longer than the transmitter in the majority of IoT applications. When in active mode, a majority of the RX power may be consumed by the synthesizer and local-oscillator (LO) signal distribution. Therefore, it may be especially desirable to reduce the synthesizer and LO power consumption.

In some implementations, a zero-intermediate frequency (IF) transceiver may be used. A zero-IF transceiver refers to a transceiver that directly converts signals between a baseband (BB) frequency and RF frequency (e.g., without first converting to IF). Moreover, some zero-IF transceivers are implemented using a half-LO architecture. For example, a frequency synthesizer may be configured to generate a signal (e.g., referred to herein as a half-LO signal) at half the LO frequency, with a frequency doubler circuit being used to generate the LO signal (e.g., to be provided to a mixer for upconversion or downconversion) based on the half-LO signal. With the half-LO architecture, the voltage-controlled oscillator (VCO) of the frequency synthesizer may operate at half the LO frequency. Reducing the VCO frequency allows for a reduction in VCO and synthesizer power consumption. In this scheme, LO signal distribution may occur at half the LO frequency, saving power when driving the half-LO signal along relatively long LO transmission lines, compared to driving a distributed full-LO signal. The VCO operating at a half-LO frequency also reduces the transmission power consumption.

There are various LO architectures that may be used to design a zero-IF transceiver. Some of the challenges with the zero-IF transceiver and the half-LO architectures include power consumption, generation of spurs (e.g., harmonic signal components), and VCO or LO pulling (e.g., a change in VCO output frequency due to a change in the load on the VCO output). Certain aspects of the present disclosure are directed towards a transceiver architecture that addresses these challenges.

FIG.4illustrates a portion of an example transceiver400illustrating an example frequency synthesizer architecture, in accordance with certain aspects of the present disclosure. The transceiver400may include a synthesizer402(e.g., a phase-locked loop with a VCO), which may correspond to a portion of frequency synthesizer318or synthesizer330ofFIG.3. Synthesizer402may generate a half-LO signal (e.g., a 1.2 GHz signal for a 2.4 GHz operating mode or a 2.5 GHz signal for a 5 GHz operating mode). The half-LO signal may be provided to a frequency doubler circuit404(e.g., after being routed along a transmission line) to generate the LO signal (e.g., a 2.4 GHz signal or a 5 GHz signal). In some aspects, the synthesizer402and the frequency doubler circuit404implement a frequency synthesizer420such as the frequency synthesizer318or the frequency synthesizer330described with respect toFIG.3. For reception, the generated LO signal may be provided to a poly-phase filter (PPF)406to generate phase-shifted LO signals (e.g., in-phase (I) and quadrature (Q) components). The phase-shifted LO signals may be provided to LO buffers408(e.g., corresponding to amplifier332) before being provided to RX mixers410(e.g., corresponding to mixer324) for down-conversion of received signaling in a receive chain (e.g., RX path304). Similarly for transmission, the generated LO signal may be provided to a PPF412to generate phase-shifted LO signals (e.g., I and Q components), which may be provided to LO buffers414(e.g., corresponding to amplifier320) and TX mixers416(e.g., corresponding to mixer312) for upconversion of signaling for transmission in a transmit chain (e.g., TX path302), as shown.

FIG.5illustrates an example layout of coils in a transceiver500, in accordance with certain aspects of the present disclosure. The transceiver500includes a VCO502for a 2.4 GHz band and a VCO504for a 5 GHz band. For example, the VCO502may generate a half-LO signal at 1.2 GHZ, which may be upconverted to generate a 2.4 GHZ LO signal using a frequency doubler506. Similarly, the VCO504may generate a half-LO signal at 2.5 GHZ, which may be upconverted to a 5 GHZ LO signal using a frequency doubler508. The output of the doubler506may be coupled to a TX mixer (e.g., TX mixers416) for upconversion of BB signaling to be used for transmission via a 2.4 GHZ PA510. Additionally or alternatively, the output of the doubler506may be provided to an RX mixer (e.g., RX mixers410) for downconversion of received signaling amplified using a 2.4 GHz low-noise amplifier (LNA)512. Similarly, the output of the doubler508may be coupled to a TX mixer for upconversion of BB signaling to be used for transmission via a 5 GHz PA516, and/or provided to an RX mixer for downconversion of received signaling amplified using a 5 GHZ LNA514.

For reception, one of the challenges with using a half-LO architecture is the generation of a direct-current (DC)-offset at the output of the downconverter (e.g., RX mixers) due to the magnetic fields from the LO signal coupling to the output of the LNA. In some cases, a DC offset cancellation (DCOC) circuit may be used to reduce the DC voltage offset. In some aspects of the present disclosure, the DC offset may be reduced by using a step-symmetric inductive element to implement the frequency doubler (e.g., frequency doubler506or frequency doubler508). A step-symmetric inductive element refers to an inductive element including inductive portions (e.g., two coils) that are oriented in a same spiral (e.g., spirals that are in the same angular direction). For example, the inductive element may have a structure such that, at a point in time, current flows in a first portion of the inductive element in a first angular direction (e.g., clockwise direction) and flows in a second portion of the inductive element in a second opposite angular direction (e.g., counter-clockwise direction).

FIG.6illustrates an example inductive element600implemented using step symmetry, in accordance with certain aspects of the present disclosure. As shown, the inductive element600includes a first inductive portion602and a second inductive portion604. The arrows606indicate the direction of current flow. As shown, the current flow in the first inductive portion602of the inductive element600is in the opposite angular direction than the current flow in the second inductive portion604of the inductive element600. Therefore, the magnetic fields generated by the first inductive portion602are 180 degrees out of phase from the magnetic fields generated by the second inductive portion. Thus, the magnetic fields generated by the first inductive portion602at least partially cancel the magnetic fields generated by the second inductive portion604.

Referring back toFIG.5, the doubler506(or doubler508) may be implemented using a step-symmetric inductive element. The magnetic fields from the frequency doubler are effectively canceled at the location of the LNA (e.g., at an inductive element of LNA512), eliminating, or at least reducing, the DC offset described herein.

For transmission, the first harmonic of the output signal of the PA (e.g., PA510or PA516) may couple to the inductor-capacitor (LC) tank circuit used to implement the doubler (e.g., doubler506or doubler508). The LC tank circuit has a resonant frequency at the LO frequency (fLO), creating a frequency offset at the PA output of twice the BB frequency (fBB). As described herein, the doubler may be implemented with a step-symmetric inductive element that also reduces (e.g., rejects) the PA magnetic field, reducing the PA pulling of the LO.

The first harmonic of the output signal of the PA may still pull the VCO output signal (e.g., that is at half the LO frequency) through the second harmonic of the VCO. Thus, in some aspects of the present disclosure, the inductive element of the VCO may be configured to reject magnetic fields from the PA using a dual-core structure. For example, as shown, a first inductive portion530of the inductive element of VCO504may be wound around a first core590, and a second inductive portion532of the inductive element of the VCO504may be wound around a second core592. With the dual-core structure, the VCO inductive element is implemented with common-mode magnetic rejection, and the magnetic field from the PA (e.g., PA516) at the output of the VCO504is rejected. In some aspects, the VCO504may also include circuitry for at least partially tuning out (e.g., canceling) the second harmonic at the output of the VCO504. The second harmonic tuning reduces flicker noise at the output of the VCO and reduces VCO pulling.

In some aspects, an inductive element of the PA510may have an axis of symmetry aligned on axis518with the inductive element of the VCO502, as shown. The inductive element of the PA510may have two inductive portions540,542. In some aspects, the two inductive portions540,542may be coupled in series. Thus, given that the inductive element of the PA510has an inductance L, each inductive portion may have an inductance of L/2. The current flow in each of the inductive portions may be in opposite angular directions. Therefore, the magnetic field from one inductive portion (e.g., inductive portion540) may be 180 degrees out of phase with the magnetic field from the other inductive portion (e.g., inductive portion542), resulting in the magnetic fields at least partially canceling at the axis518. With the inductive element of VCO502being aligned on axis518, the magnetic interference from the PA510to the VCO502is reduced.

In some aspects, the PA516may include a dual-core transformer. The PA516may have an inductive element (e.g., a transformer winding) implemented with two inductive portions550,552. The inductive portion550may be wound around a first core, and the inductive portion552may be wound around a second core. In some aspects, the two inductive portions550,552may be coupled in parallel. Thus, given that the inductive element has an inductance L, each inductive portion may have an inductance of 2×L. The current flow in each of the inductive portions may be in opposite angular directions. Therefore, the magnetic field from one inductive portion (e.g., inductive portion550) may be 180 degrees out of phase with the magnetic field from the other inductive portion (e.g., inductive portion552), further reducing magnetic emissions.

FIG.7is a flow diagram depicting example operations700for wireless communication, in accordance with certain aspects of the present disclosure. For example, the operations700may be performed by a frequency synthesizer such as the frequency synthesizer420, and in some aspects, a transceiver, such as the transceiver400or500.

The operations700begin, at block702, with the frequency synthesizer generating (e.g., via VCO502or VCO504) a first oscillating signal having a first frequency. At block704, the frequency synthesizer generates, via a frequency adjustment circuit (e.g., frequency doubler506or frequency doubler508), a second oscillating signal having a second frequency greater than the first frequency. In some aspects, the frequency adjustment circuit includes a step-symmetric inductive element. In some aspects, the frequency adjustment circuit includes a first inductive element having a first inductive portion and a second inductive portion. The first inductive portion and the second inductive portion may have a same spiral. Current may flow in the first inductive portion in a first angular direction and in the second inductive portion in a second angular direction opposite to the first angular direction.

In some aspects, the oscillator (e.g., VCO504) includes an inductive element having a first inductive portion (e.g., inductive portion530) and a second inductive portion (e.g., inductive portion532). The first inductive portion may be wound around a first core (e.g., core590), and the second inductive portion may be wound around a second core (e.g., core592).

In some aspects, the frequency synthesizer may be part of a transceiver. The transceiver may generate, via a mixer (e.g., RX mixers410or TX mixers416), a mixed signal based on the second oscillating signal to be processed for signal reception or to be amplified for signal transmission. For example, the mixed signal may be a baseband signal to be provided to a baseband processor, or may be an RF signal to be amplified via an amplifier (e.g., PA510or PA516) for transmission via an antenna.

In some aspects, the amplifier (e.g., PA516) includes a transformer having a winding. A first portion (e.g., inductive portion550) of the winding may be wound around a first core, and a second portion (e.g., inductive portion552) of the winding may be wound around a second core. In some aspects, the amplifier (e.g., PA510) includes a first inductive element having a first inductive portion (e.g., inductive portion540) and a second inductive portion (e.g., inductive portion542). The first inductive portion may be disposed adjacent to a first side of an axis (e.g., axis518) bisecting the first inductive element, and the second inductive portion may be disposed adjacent to a second side of the axis. The axis may be an axis of symmetry associated with the first inductive element (e.g., inductive element of PA510) and a second inductive element of the VCO (e.g., VCO502). The first inductive portion and the second inductive portion may have a same spiral. Current may flow in the first inductive portion in a first angular direction and in the second inductive portion in a second angular direction opposite to the first angular direction.

Example Aspects

In addition to the various aspects described above, specific combinations of aspects are within the scope of the disclosure, some of which are detailed below:

Aspect 1. A transceiver, comprising: an oscillator; and a frequency adjustment circuit, an output of the oscillator being coupled to an input of the frequency adjustment circuit, the frequency adjustment circuit comprising a step-symmetric inductive element.

Aspect 2. The transceiver of aspect 1, wherein the transceiver further comprises: a mixer having a local-oscillator (LO) input coupled to an output of the frequency adjustment circuit; and an amplifier coupled to the mixer.

Aspect 3. The transceiver of any one of aspects 1-2, wherein the oscillator is a voltage-controlled oscillator (VCO).

Aspect 4. The transceiver of any one of aspects 1-3, wherein the oscillator is configured to generate a half local-oscillator (LO) signal having a frequency that is half a LO frequency of the transceiver and wherein the frequency adjustment circuit comprises a frequency doubler configured to generate an LO signal based on the half LO signal.

Aspect 5. The transceiver of any one of aspects 1-4, wherein the step-symmetric inductive element has a first inductive portion and a second inductive portion and wherein current is configured to flow in the first inductive portion in a first angular direction and in the second inductive portion in a second angular direction opposite to the first angular direction.

Aspect 6. The transceiver of any one of aspects 1-5, wherein the step-symmetric inductive element includes a first inductive portion and a second inductive portion and wherein the first inductive portion and the second inductive portion are oriented with a same spiral.

Aspect 7. The transceiver of any one of aspects 1-6, wherein the oscillator comprises an inductive element having a first inductive portion and a second inductive portion, wherein the first inductive portion is wound around a first core, and wherein the second inductive portion is wound around a second core.

Aspect 8. The transceiver of any one of aspects 1-7, wherein the oscillator comprises a dual-core structure.

Aspect 9. The transceiver of any one of aspects 1-8, further comprising an amplifier coupled to an output of the frequency adjustment circuit, wherein the amplifier comprises a transformer having a winding, wherein a first portion of the winding is wound around a first core, and wherein a second portion of the winding is wound around a second core.

Aspect 10. The transceiver of any one of aspects 1-9, further comprising an amplifier coupled to an output of the frequency adjustment circuit, wherein the amplifier comprises a dual-core transformer.

Aspect 11. The transceiver of any one of aspects 1-10, further comprising an amplifier coupled to an output of the frequency adjustment circuit, wherein the amplifier comprises a first inductive element having a first inductive portion and a second inductive portion, wherein the first inductive portion is disposed adjacent to a first side of an axis bisecting the first inductive element, and wherein the second inductive portion is disposed adjacent to a second side of the axis.

Aspect 12. The transceiver of aspect 11, wherein current is configured to flow in the first inductive portion in a first angular direction and in the second inductive portion in a second angular direction opposite to the first angular direction.

Aspect 13. The transceiver of any one of aspects 11-12, wherein the oscillator comprises a second inductive element disposed on the axis.

Aspect 14. The transceiver of any one of aspects 11-13, wherein the axis comprises an axis of symmetry associated with the first inductive element and a second inductive element of the oscillator.

Aspect 15. The transceiver of any one of aspects 1-14, further comprising an amplifier coupled to an output of the frequency adjustment circuit, wherein the amplifier comprises a power amplifier (PA).

Aspect 16. The transceiver of any one of aspects 1-15, further comprising an amplifier coupled to an output of the frequency adjustment circuit, wherein the amplifier comprises a low-noise amplifier (LNA).

Aspect 17. A frequency synthesizer, comprising: an oscillator; and a frequency adjustment circuit, an output of the oscillator being coupled to an input of the frequency adjustment circuit, the frequency adjustment circuit comprising a step-symmetric inductive element.

Aspect 18. The frequency synthesizer of aspect 17, wherein the step-symmetric inductive element has a first inductive portion and a second inductive portion and wherein current is configured to flow in the first inductive portion in a first angular direction and in the second inductive portion in a second angular direction opposite to the first angular direction.

Aspect 19. The frequency synthesizer of any one of aspects 17-18, wherein the step-symmetric inductive element includes a first inductive portion and a second inductive portion, wherein the first inductive portion and the second inductive portion are oriented with a same spiral.

Aspect 20. The frequency synthesizer of any one of aspects 17-19, further comprising an amplifier coupled to an output of the frequency adjustment circuit, wherein the amplifier comprises a first inductive element having a first inductive portion and a second inductive portion, wherein the first inductive portion is disposed adjacent to a first side of an axis bisecting the first inductive element, and wherein the second inductive portion is disposed adjacent to a second side of the axis.

Aspect 21. The frequency synthesizer of any one of aspects 17-20, wherein the oscillator is a voltage-controlled oscillator (VCO).

Aspect 22. A transceiver, comprising: an oscillator; and a frequency adjustment circuit, an output of the oscillator being coupled to an input of the frequency adjustment circuit, the frequency adjustment circuit comprising a first inductive element having a first inductive portion and a second inductive portion, wherein current is configured to flow in the first inductive portion in a first angular direction and in the second inductive portion in a second angular direction opposite to the first angular direction.

Aspect 23. The transceiver of aspect 22, further comprising: a mixer having a local-oscillator (LO) input coupled to an output of the frequency adjustment circuit; and an amplifier coupled to the mixer.

Aspect 24. The transceiver of any one of aspects 22-23, wherein the oscillator comprises a second inductive element having a first inductive portion and a second inductive portion, wherein the first inductive portion is wound around a first core, and wherein the second inductive portion is would around a second core.

Aspect 25. The transceiver of any one of aspects 22-24, further comprising an amplifier coupled to an output of the frequency adjustment circuit, wherein the amplifier comprises a transformer having a winding, wherein a first portion of the winding is wound around a first core, and wherein a second portion of the winding is wound around a second core.

Aspect 26. The transceiver of any one of aspects 22-25, further comprising an amplifier coupled to an output of the frequency adjustment circuit, wherein the amplifier comprises a second inductive element having a first inductive portion and a second inductive portion, wherein the first inductive portion is disposed adjacent to a first side of an axis bisecting the second inductive element, and wherein the second inductive portion is disposed adjacent to a second side of the axis.

Aspect 27. The transceiver of aspect 26, wherein the axis comprises an axis of symmetry associated with the second inductive element.

Aspect 28. The transceiver of any one of aspects 26-27, wherein current is configured to flow in the first inductive portion in a first angular direction and in the second inductive portion in a second angular direction opposite to the first angular direction.

Aspect 29. A method for wireless communication, comprising: generating a first oscillating signal having a first frequency; and generating, via a frequency adjustment circuit, a second oscillating signal having a second frequency greater than the first frequency, the frequency adjustment circuit comprising a step-symmetric inductive element.

Aspect 30. The method of aspect 29, further comprising: generating, via a mixer, a mixed signal based on the second oscillating signal to be processed for signal reception or to be amplified for signal transmission.

ADDITIONAL CONSIDERATIONS

The apparatus and methods described in the detailed description are illustrated in the accompanying drawings by various blocks, modules, components, circuits, steps, processes, algorithms, etc. (collectively referred to as “elements”). The various operations or methods described above may be performed by any suitable means capable of performing the corresponding functions. The means may include various hardware and/or software component(s) and/or module(s), including, but not limited to a circuit, an application specific integrated circuit (ASIC), or processor. Generally, where there are operations illustrated in figures, those operations may have corresponding counterpart means-plus-function components with similar numbering.

One or more of the components, steps, features, and/or functions illustrated herein may be rearranged and/or combined into a single component, step, feature, or function or embodied in several components, steps, or functions. Additional elements, components, steps, and/or functions may also be added without departing from features disclosed herein. The apparatus, devices, and/or components illustrated herein may be configured to perform one or more of the methods, features, or steps described herein.