Multilayer complementary-conducting-strip transmission line structure with plural interlaced signal lines and mesh ground planes

A multilayer complementary-conducting-strip transmission line (CCS TL) structure is disclosed herein. The multilayer CCS TL structure includes a substrate, and n signal transmission lines being parallel and interlacing with n-1 mesh ground plane(s), therein a plurality of inter-media-dielectric (IMD) layers are correspondingly stacked with among the n signal transmission lines and the n-1 mesh ground plane(s) to form a stack structure on the substrate, therein n≧2 and n is a natural number. Whereby, a multilayer CCS TL with independent of each layer and complete effect on signal shield is formed to provide more flexible for circuit design, reduce the circuit area and also diminish the transmission loss.

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention generally relates to the field of signal transmission line structure, and more particularly, to a multilayer complementary-conducting-strip transmission line (thereinafter called CCS TL) structure.

2. Description of the Prior Art

The successfully transmission-line-based (TL-based) hybrid designs for system-on-chip (SOC) integration are relied on for high-efficiency miniaturization. Numerous design techniques and circuit implementations had been reported and demonstrated for the desired circuit requirements. By either using capacitive loading (M. C. Scardelletti, G. E. Ponchak, and T. M. Weller, “Miniaturized Wilkinson power dividers utilizing capacitive loading,”IEEE Microwave Wireless Compon. Lett., vol. 12, no. 1, pp. 6-8, January 2002.) or inductive loading (K. Hettak, G. A. Morin, and M. G. Stubbs, “Compact MMIC CPW and asymmetric CPS branch-line coupler and Wilkinson dividers using shunt and series stub loading,”IEEE Trans. Microwave Theory and Tech., vol. 53, no. 5, pp. 1624-1635, May 2005.), the physical transmission line length in hybrid, coupler, and power divider designs can be reduced by at least 60%.

Recently, the multilayer design technique has been applied to microwave/millimeter-wave CMOS distributed passive components (M. Chirala, and C. Nguyen, “Multilayer Design Techniques for Extremely Miniaturized CMOS Microwave and Millimeter-Wave Distributed Passive Circuit,”IEEE Trans. Microwave Theory Tech., vol. 54, no. 12, pp. 4218-4224, December. 2006.). The microwave/millimeter-wave rat-race hybrid is designed by incorporating the multilayer microstrip lines. The reference ground plane is realized by the uniform bottom metal in CMOS processes. The signal traces can be arranged in the meandered-form and no extra shielding metal is inserted between upper and lower microstrip lines. Hence, between upper and lower microstrip lines, there has no any effective signal shield.

In view of the drawbacks mentioned with the prior art of signal transmission line, there is a continuous need to develop a new and improved multilayer CCS TL structure that overcomes the disadvantages associated with the prior art. The advantages of the present invention are that it solves the problems mentioned above.

SUMMARY OF THE INVENTION

In accordance with the present invention, a CCS TL structure substantially obviates one or more of the problems resulted from the limitations and disadvantages of the prior art mentioned in the background.

One of the purposes of the present invention is to change the characteristic impedance of a CCS TL by varying the slot size of the mesh ground plane in order to increase the flexibility and variety for circuit designs.

One of the purposes of the present invention is to isolate the CCS TL by mesh ground plane(s) in order to provide a complete signal shield and grounding.

One of the purposes of the present invention is to form a multilayer CCS TL with the character of independent and complete shielding for each layer by integrating the structures of multilayer CMOS and mesh ground planes in order to provide much flexibility for circuit designs, miniaturization, and less loss in signal transmission.

The present invention provides a multilayer CCS TL structure. The multilayer CCS TL structure includes a substrate, and n signal transmission lines being parallel and interlacing with n-1 mesh ground plane(s), herein a plurality of inter-media-dielectric (thereinafter called IMD) layers are correspondingly stacked with among the n signal transmission lines and the n-1 mesh ground plane(s) to form a stack structure on the substrate, herein n is a natural number and n≧2.

The present invention offers a multilayer CCS TL structure. The multilayer CCS TL structure includes a first signal transmission line, a second signal transmission line being parallel with the first signal transmission line, a mesh ground plane being between the first and the second signal transmission lines, herein two IMD layers are sandwiched correspondingly among the mesh ground plane, the first and the second signal transmission lines to form a stack structure, and a substrate being beneath the stack structure.

The present invention provides a multilayer CCS TL structure. The multilayer CCS TL structure includes a substrate, a signal transmission line being above the substrate, and a mesh ground plane being between the substrate and the signal transmission line, herein two IMD layers are sandwiched respectively among the substrate, the mesh ground plane, and the transmission line.

The present invention offers a multilayer CCS TL structure. The multilayer CCS TL structure includes a substrate, a signal transmission line being on the substrate, and a mesh ground plane being above the signal transmission line, herein two IMD layers are sandwiched respectively between the mesh ground plane and the signal transmission line and on the mesh ground plane.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Some embodiments of the present invention will now be described in greater detail. Nevertheless, it should be noted that the present invention can be practiced in a wide range of other embodiments besides those explicitly described, and the scope of the present invention is expressly not limited except as specified in the accompanying claims.

Moreover, some irrelevant details are not drawn in order to make the illustrations concise and to provide a clear description for easily understanding the present invention.

Referring toFIG. 1, the three-dimensional perspective structure of one preferred embodiment100in accordance with the present invention is illustrated. A substrate110has a size P (also called a periodicity P). n signal transmission lines TL1, TL2, . . . , and TLnare parallel and interlace with n−1 mesh ground planes MG1, MG2, . . . , and MGn−1(not shown), that is, the mesh ground planes MG1is between the signal transmission lines TL1and TL2, the mesh ground planes MG2is between the signal transmission lines TL2and TL3, . . . , and the mesh ground plane MGn−1is between the signal transmission lines TLn−1and TLn. Herein, a plurality of inter-media-dielectric (thereinafter called IMD) layers IMD are correspondingly stacked with among the n signal transmission lines TL1, TL2, . . . , and TLnand the n−1 mesh ground planes MG1, MG2, . . . , and MGn−1(for example, an IMD layer IMD is between the signal transmission line TL1and the mesh ground plane MG1, another IMD layer IMD is between the mesh ground plane MG1and the signal transmission line TL2, . . . , and still another IMD layer IMD is between the mesh ground plane MGn−1and the signal transmission line TLn) to form a stack structure on the substrate110, wherein n is a natural number and n≧2. The n signal transmission lines TL1, TL2, . . . , and TLninclude straight-line form and the widths thereof refer to S1, S2, . . . , and Sn, respectively.

In the present embodiment, each mesh ground plane, such as MG1, MG2, . . . , and MGn−1, is a metal layer with an inner slot, and the size of the inner slot is defined by mesh slot Wh. In the present embodiment, the n signal transmission lines TL1, TL2, . . . , and TLnare independent and have complete effect on signal shield in order to provide much flexibility for circuit designs, miniaturization, and less loss in signal transmission. Besides, the word “parallel” in the present embodiment is the concept of planes being parallel in space, and hence the n signal transmission lines TL1, TL2, . . . , and TLnare not limited to the same direction. That is, they also could be parallel but have any degree in direction, such as 90 degree. The inventor would like to emphasize that the geometric shape for the substrate110, the mesh ground planes MG1, MG2, . . . , and MGn-1, and the IMD layer IMD can be varied in shapes, and should not be limited to the square shape shown in the present embodiment.

Referring toFIG. 2, the cross-sectional structure of one preferred signal transmission line embodiment in accordance with the present invention is illustrated. A signal transmission line TL includes two sub-signal-transmission-lines210,220and a plurality of first vias Viaxy. Herein, x, y represent natural numbers and y=x+1. The two sub-signal-transmission-lines210,220are two different layers of metal transmission lines in a CMOS structure. They are connected by the plurality of first vias Viaxyto form the signal transmission line TL in order to increase the thickness of the signal transmission line in the CMOS structure. MG and IMD denote the mesh ground planes and the IMD layers, respectively. The present embodiment can be applied to the signal transmission lines TL2, . . . , and TLnshown inFIG. 1to change the character of the transmission lines.

Referring toFIG. 3A, the layout for one preferred application circuit300integrated by several preferred embodiments in accordance with the present invention is illustrated. The application circuit300is a Ka-band power divider designed by multilayer CCS TL structures350,360,370,380, and390. Herein, a plurality of ends A, B, and C refer to the ports of the application circuit300, and a connecting resistor (not shown) connects two ends D and E. Or, the ends A, D, and E are the ports of the application circuit300, and the connecting resistor connects the ends B and C. The structure of the embodiment350will be described as below firstly. The embodiment350, referring toFIG. 3B, shows the structure of the embodiment100depicted inFIG. 1in case of n=2. A first signal transmission line TL1(M6) with the size S1in width. A second signal transmission line TL2having the size S2in width and is parallel with the first signal transmission line TL1(M6). A mesh ground plane MG (M4) is between the first and the second signal transmission lines TL1(M6) and TL2. Herein, two IMD layers IMD are respectively among the mesh ground plane MG (M4) and the first and the second signal transmission lines TL1(M6) and TL2to form a stack structure. A substrate310has the periodicity P and is beneath the stack structure.

Herein, the second signal transmission line TL2includes two sub-signal-transmission-lines M1, M2and a plurality of first vias Viaxy, such as Via12(similar to the transmission line structure described inFIG. 2). In a CMOS structure, the two sub-signal-transmission-lines M1, M2in the present embodiment are the metal transmission lines on the first layer and on the second layer, respectively. They are connected by the plurality of first vias Via12to form the signal transmission line TL2in order to increase the thickness of the signal transmission line in the CMOS structure. In the present embodiment, the mesh ground plane MG (M4) is the fourth metal layer and the size of the inner slot thereof is defined by mesh slot Wh. The first signal transmission line TL1(M6) in the present embodiment locates on the sixth metal layer. Accordingly, the embodiment350is implemented in the 1P6M (one-poly-six-metal) CMOS structure.

Referring toFIG. 3Aagain, the embodiments360and370are similar to the embodiment350. The differences among them are that the first and the second transmission lines TL1and TL2are straight lines in the embodiment350, the first and the second transmission lines TL1and TL2show L-line form in the embodiment360, and the first and the second transmission lines TL1and TL2show straight and L-shape, respectively, in the embodiment370. Likewise, the signal transmission lines TL1and TL2could respectively be L-shape and straight. Moreover, referring to the ends B, C, D, and E, the signal transmission lines TL1and TL2also could be T-shape.

Referring toFIG. 3Aagain, the embodiments380and390are similar to the embodiment350. The differences between the embodiments350and380are that the embodiment350has the first and the second transmission lines TL1and TL2being straight, but the embodiment380only has the first transmission line TL1being L-shape (also could be straight or T-shape). The structure of the embodiment380will be described as below (taking the embodiment350for explanation). A substrate310has the periodicity P. A signal transmission line TL1is above the substrate310. A mesh ground plane MG is between the substrate310and the signal transmission lines TL1. Herein, two IMD layers IMD are among the mesh ground plane MG and the substrate310and the signal transmission lines TL1, respectively. Also, the present invention can be implemented by the structure described as below (still taking the embodiment350for explanation). A substrate310has the periodicity P. A signal transmission line TL2is on the substrate310. A mesh ground plane MG is above the signal transmission lines TL2. Herein, two IMD layers IMD are respectively between the mesh ground plane MG (FIG. 3b) and the signal transmission lines TL2and on the mesh ground plane MG. That is, the present embodiment only has the second signal transmission line TL2(i.e. could be straight, L-shape, or T-shape) of the embodiment350and its structure is the same as the second signal transmission line TL2shown in the embodiment350, and hence this part will not be repeated here. The big difference between the embodiments350and390(referring toFIG. 3C) is that the embodiment390further includes a second via connecting the first and the second transmission lines TL1(M6) and TL2(M1, M2and Via12). Herein, the second via includes a plurality of sub-vias and at least one metal layer structure. In the present embodiment, the second via at least has metal layers CP3(M3), CP4(M4), CP5(M5), and a plurality of sub-vias Via23, Via34, Via45, and Via56to connect the first and the second transmission lines TL1and TL2as shown in the enlarge view ofFIG. 3C. Besides, the features of the first signal transmission line TL1being L-shape (also could be straight or T-shape) and the second signal transmission line TL2connecting the first signal transmission line TL1through the second via in the embodiment390are also distinguished from the embodiment350. As for the substrate310, the periodicity P, the IMD layers IMD, the mesh ground plane MG (M4), the mesh slot Wh, and the sizes S1, S2respectively for the first and the second signal transmission lines TL1and TL2, they are the same as those described inFIG. 3Bfor the embodiment350, and thus they will not be repeated here. The features of the embodiments described above can be applied to all embodiments in accordance with the present invention and should not be used to limit the implementing thereof.

The inventor would like to emphasize that the n signal transmission lines (or as n=2, the first and the second transmission lines) can be designed for multilayer (or two-layer) independent circuits. Since the mesh ground planes provides complete grounding effect, the interference resulting from the signals on different layers can be decreased to lower the loss in signal transmission and provide much flexibility and miniaturization for circuit designs.

Referring toFIGS. 4A and 4B, the relation curves among the complex characteristic impedance (Zcin ohm) of the first and the second transmission lines and frequency in GHz which are extracted from the embodiment350in case of n=2, and the relation curves among the slow-wave factor (SWF) in β/ko and quality-factor (Q) of the first and the second transmission lines and frequency in GHz are shown, respectively inFIGS. 4A and 4B. The inventor would like to stress here that the related data set for simulations and the results obtained from simulations are only used to explain the simulation processes and the results of preferred embodiments in accordance with the present invention, but not limit the implementing of the present invention.

The data set for simulations is defined as below. The widths S1and S2of the transmission lines TL1and TL2are respectively 3.0 μm and 2.0 μm, and the thicknesses of the TL1(M6) and TL2(MlM2) are 2.0 μm and 1.95 μm, respectively. The thicknesses of IMD layers IMDs from the metal layers M2to M4and M4to M6are 2.25 μm, respectively. The relative dielectric constant of the IMD is 4.0. The periodicity P is defined as 30.0 μm. The mesh slot size Whis 26.0 μm. Moreover, the simulations are performed by the commercial software package Ansoft HFSS, and the results obtained from the simulations are shown inFIGS. 4A and 4B, respectively.

InFIG. 4A, the real parts of Zc{i.e. Re(Zc)} of the first and the second transmission lines TL1and TL2at Ka-band are 70.8Ω and 64.2Ω, respectively. The imaginary parts of Zc{i.e. Im(Zc)} are nearly identical. InFIG. 4B, the SWFs of the first and the second transmission lines TL1and TL2at Ka-band are 2.10 and 2.51, respectively, and the quality-factors of the first and the second transmission lines TL1and TL2at Ka-band are respectively 7.8 and 3.6. Wherein, √{square root over (∈r)}=2 since ∈r=4. This value is the theoretical limit of the quasi-TEM transmission line. The value represents the relative dielectric constant of the IMD.