Positional difference correcting apparatus between two-route videos

Received videos through A and B routes are inputted in first and second variable devices and then delayed by a first and a second frame memory by one frame to be inputted in a comparator. Alternatively, these signals A and B are further delayed by one frame by third and forth frame memories and also inputted in the comparator. The comparator compares the signals obtained by delaying the signals A, B, AF and BF by one line and one pixel, respectively, between the A and B routes with respect to all combinations so as to detect the difference between them. Then, a signal having the minimum difference is detected and a first and a second memory control signal to make the difference smaller are outputted to the first and second variable delay devices. By repeating the processing, a horizontal difference, a vertical difference and a time axial difference are gradually, and then completely, corrected including when the original amount of the difference is larger than a frame delay.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a positional difference correcting apparatus between two-route videos, which is preferable to be used for a system intending to have high reliability of the transmission by transmitting the same video to two channels.

2. Description of the Related Art

Conventionally, in a double transmission of a video designed to have high reliability, a system such that the same video is transmitted with two routes or two channels and a person monitors these two-route videos at the receiving side has been performed. In the system, in this case that a failure arises in any one of the two routes, an observer of the two-route videos detects the failure and changes over a switch to a normal channel manually.

However, according to the above described conventional art, finding an image failure and changing to a normal channel depend on manpower, so that it takes a time not less than two or three seconds from the image failure arises until a switch is changed over to the normal channel. Therefore, this involves a problem such that the video having a failure has been outputted during two or three seconds.

Accordingly, the present applicant invented an apparatus to automatically find an image failure and automatically change over a switch to a normal channel and filed the invention as a patent (namely, “an image failure detecting apparatus in a redundant double transmission” of Japanese Patent Application No. 11-156432). According to the invention, in the two-route videos to be inputted in the image failure detecting apparatus, it is assumed that the positions of the videos are identical and there is no processing delay difference.

However, in the double transmission, there are many cases such that the two-route videos pass through geographically different places, so that it is common that there is a transmission delay difference. Alternatively, in this case that a sort of a transmission apparatus to be included in respective channels, for example, a sort of an image compressing coding apparatus and a decoding apparatus or the like are different, there is a possibility that a position of an available screen in each piece of video is slightly displaced in an upper or lower direction and a right or left direction (a vertical direction and a horizontal direction) depending on an apparatus. Alternatively, in this case that one of the two channels is a satellite line, there may be a difference of about one second in the transmission time of the both channels (i.e., the difference in a time axis) and there may be a video difference of about thirty pieces between the two-route videos.

SUMMARY OF THE INVENTION

An object of the present invention is to provide a positional difference correcting apparatus between two-route videos in order to remove a horizontal difference, a vertical difference and a time axial difference between the two-route videos from arising.

In order to achieve the object, the invention is characterized in that a positional difference correcting apparatus between two-route videos comprises: first variable delay means in which a received video of a first route is inputted and second variable delay means in which a received video of a second route is inputted; frame memories, line memories and pixel memories, which are connected each of the first and second variable delay means, comparing means to compare a frame delay video, a line delay video and a pixel delay video, which are delayed by the frame memories, the line memories and the pixel memories, between the first and second routes; and correcting control signal generating means to generate a control signal for correcting a minimum delay difference, which are obtained by the comparing means; wherein a signal obtained by the correcting control signal generating means is provided to the first or the second variable delay means so as to correct the delay difference.

According to the invention, a positional difference or a delay difference of the received videos between the first and second routes is corrected completely.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

The present invention will be specifically explained below with reference to the drawings. At first, a principle of the present invention will be explained.

According to the present invention, a pixel value and a characteristic value of the two-route videos are compared in the inputted videos, which are slightly displaced generally. Then, by gradually correcting a difference between the positions, finally, the positions of the two-route videos are precisely aligned. There is a case that a sort of a compressing coding apparatus is different from a sort of a decoding apparatus between the channels in the two-route videos. In this case, the coded noises are different in the two channels. However, even in this case, a main original video signal is predominant, so that it can be said that there is autocorrelation in the comparison between the two-route videos.

As described above, according to a principle of the present invention, the positions of the two-route videos are gradually aligned by the use of a property such that, as the difference in the two-route videos is decreased, the correlation is gradually increased.

An embodiment according to the present invention will be explained with reference to FIG.1. As shown inFIG. 1, the video signals of two routes (hereinafter, they are referred to a A route and a B route, respectively) are inputted in a first FIFO-type frame memory1and a second FIFO-type frame memory2as one of variable delay means, which are capable of changing a reading position, respectively. As one example, these memories1and2preferably have a storage capacity for two frames. However, they are not limited to this and a memory having larger storage capacity than this may be used. These memories1and2are connected to a third frame memory3and a fourth frame memory4. Then, the signals read from these memories1and2are inputted in the third frame memory3and the fourth frame memory4, respectively. The third frame memory3is connected to a comparator10and a fifth frame memory5. On one hand, the fourth frame memory4is connected to the comparator10and a sixth frame memory6. Therefore, a signal outputted from the third frame memory3is inputted in the comparator10and the fifth frame memory5and a signal outputted from the fourth frame memory4is inputted in the comparator10and the sixth frame memory6. From this, it is obvious that the third to sixth frame memories3to6generate the delay for one frame, respectively.

A specific embodiment of the comparator10will be described with reference toFIG. 2as a reference symbol A denotes an output signal of the third frame memory3, a reference symbol B denotes an output signal of the fourth frame memory4, a reference symbol AF denotes an output signal of the fifth frame memory5and a reference symbol BF denotes an output signal of the sixth frame memory6in FIG.1.

The comparator10is configured by 1-pixel delay portions11,13,15and17for delaying the output signals A, AF B and BF by one pixel, one line delay portions12,14,16and18for delaying the output signals A, AF B and BF by one line and a correlation calculator19.

In the correlation calculator19, six sorts of the signals with respect to the A route including the output signals A, one pixel delay signal AD of the signal A, one line delay signal AL of the signal A, one frame delay signal AF of the output signal A, one pixel delay signal AFD of the signal AF and one line delay signal AF of the signal AF are inputted. Further, in the correlation calculator19, six sorts of the signals with respect to the B route including the output signal B, one pixel delay signal BD of the signal B, one line delay signal BL of the signal B, one frame delay signal BF of the output signal B, one pixel delay signal BFD of the signal BF and one line delay signal BFL of the signal BF are inputted.

A specific embodiment of the correlation calculator19will be explained with reference to FIG.3. The correlation calculator19is configured by pixel value difference absolute value sum calculators (SAD)21to35, a minimum value comparator40, in which respective outputs of these pixel value difference absolute value sum calculators21to35are inputted, and a decoder41to output memory control signals42and43by decoding the output R of the minimum value comparator40.

For example, in the pixel value difference absolute value sum calculator21, the signals A and B shown inFIG. 2(namely, pixel values Ai and Bi) are inputted. Therefore, the pixel value difference absolute value sum calculator21obtains a pixel value difference absolute value sum SO by the following calculation.S0=∑i=1N⁢Ai-Bi

Where, N represents the number of pixels in one screen.

And so forth, the pixel value difference absolute value sum calculators21to35obtain pixel value difference absolute value sums S1to S14from the combinations of the signals (A, AD, AL, AF, AFD, AFL) and the signals (B, BD, BL, BF, BFD, BFL). Then, the fifteen output signals SO to S14of these pixel value difference absolute value sum calculators21to35are inputted in the minimum value comparator40. The minimum value comparator40obtains the minimum value from these output signals S0to S14and notifies the decoder41of one of a terminal numbers (indexes)0to14having the minimum value as its output R. For example, the decoder41has a table as shown inFIG. 4to show by which directed correction a difference between the two-route videos becomes smaller. By referring to the table, the terminal numbers0to14such that the SAD becomes the minimum value are converted into A and B memory control signals. For example, if the terminal number “1” is the minimum value, a control signal43to delay the B memory by “D (=one pixel)” is outputted from the decoder41. Alternatively, when this terminal number “1” is the minimum value, the B route is advanced compared to the A route by one pixel.

If a A memory control signal42or a B memory control signal43is outputted from the decoder41, the delay amount of the first or second FIFO-type frame memory1or2(refer toFIG. 1) is controlled by these control signals42and43. For example, if the control signal43to delay the B memory by “D (=one pixel)” is outputted from the decoder41, the second FIFO-type frame memory2increases the delay amount by one pixel. Therefore, the difference of the A and B route is corrected so that the correlation becomes higher.

In response to repetition of the above described processing, the delay amount of the first FIFO-type frame memory1or the second FIFO-type frame memory2is controlled. Therefore, the positional difference or the delay difference of the videos between the A route and the B route is gradually corrected so that the correlation becomes higher. Finally, the present positional difference or the delay difference (i.e., the horizontal difference, the vertical difference and the time axis difference) is completely corrected. In other words, the correcting processing is repeated until the both of the A memory control signal42and the B memory control signal43become 0, namely, R=0. Then, if the both of the A memory control signal42and the B memory control signal43become 0, the present correcting processing is terminated. Additionally, the horizontal difference means the pixel difference, the vertical difference means the line difference and the time axis difference means the frame difference, respectively.

As a result, there is no positional difference in the output44of the first FIFO-type frame memory1or the output45of the second FIFO-type frame memory2(refer to FIG.1). For example, these outputs44and45may be used as an input image signal of an image failure detecting apparatus described in Japanese Patent Application NO. 11-156432 filled by the present applicant.

An alternative specific embodiment of the correlation calculator19will be explained with reference toFIGS. 5A and 5B. The specific embodiment is characterized in that difference absolute value sum calculators (SAD)51to65are provided and further, image quality characteristic value calculators51a,51bto65aand65bare provided at a previous stage of the difference absolute value sum calculators (SAD)51to65. The same reference numerals as those inFIG. 3denote the same or the equivalent components as those inFIG. 3, so that the operational explanation thereof is herein omitted.

Each of the image quality characteristic value calculators51a,51bto65aand65bcalculates the image quality characteristic value in each block (for example, 16 pixels×16 lines), which is formed by dividing the screens of the A route and the B route into blocks. As an example of the image quality characteristic value, an average value of a pixel value in a block and a dispersion value of the pixel value in a block may be cited. The difference absolute value sum calculators (SAD)51to65calculate a sum of the difference absolute values of the image quality characteristic values in the A and B routes. In other words, one difference absolute value is obtained for each block, so that each of the difference absolute value sum calculators (SAD)51to65sums up the difference absolute values in a whole screen. As the difference absolute value is smaller, the correlation of the videos of the A and B routes is larger.

A second embodiment according to the present invention will be explained with reference to FIG.6. Compared to the first embodiment (FIG.1), the embodiment is characterized in that a seventh frame memory7and an eighth frame memory8are further connected to the rear stages of the fifth frame memory5and the sixth frame memory6, respectively, makes signals which are further delayed by one frame than the first embodiment to provide these signals to the comparator10. According to the embodiment, the number of parts of a circuit is increased, however, it becomes possible to correct the positional difference of the videos of the A route and the B route at a higher speed.

A third embodiment according to the present invention will be explained with reference to FIG.7. The embodiment is characterized in that a third FIFO-type frame memory70and a fourth FIFO-type frame memory71are provided in a circuit in parallel with the first FIFO-type frame memory1and the second FIFO-type frame memory2and the positional difference of videos is corrected by these third and fourth FIFO-type frame memories70and71after the correcting amount of the positional difference of the videos by the first and second FIFO-type frame memories1and2is finally decided. The same reference numerals as those inFIG. 1denote the same or the equivalent components as those in FIG.1.

A control signal storing portion72stores the A memory control signal42and the B memory control signal43while the positional difference of the videos has been corrected by using the first and second FIFO-type frame memories1and2. When a correction completion signal73(namely, a signal such that both of the A memory control signals42and43are 0) is outputted from a comparator69, a switch74is closed and a A memory control signal42aand a B memory control signal42b, which have been stored in the control signal storing portion72, are transmitted in gross to the third and the fourth FIFO-type frame memories70and71.

A specific embodiment of the comparator69will be explained with reference to FIG.8. The comparator69is configured by a comparator10and a switch controlling unit69a. Additionally, the comparator unit10has the same constitution of that shown in FIG.2. The output R from the comparator10(the output R from the minimum value comparator40) is inputted in the control signal storing portion72and the switch controlling unit69a. The control signal storing portion72detects the final correcting amount of the positional difference of the videos by updating the data whenever the output R is inputted. If the switch controlling unit69areceives the final correcting amount of the positional difference of the videos (for example, R=0), the correction completion signal73is outputted and the switch74is closed to send the A and B memory control signals42aand42bto the third and fourth FIFO-type frame memories.

According to the present embodiment, it is possible to output the video of which positional difference is completely corrected as outputs44and45from a time when the positional difference of the videos in the A route and the B route have been completely corrected.

As being obvious from the above described explanation, according to the present invention, even when there is a positional difference of the videos or a delay difference of the videos by the transmission processing delay (a horizontal difference, a vertical difference and a time axial difference) between the received videos in two routes, by repeating the correcting processing of the positional difference or the delay difference, finally, it becomes possible to completely correct these differences. Alternatively, according to the present invention, it is possible to perform the correcting processing by using a memory having a small amount.