Low-noise reference voltage generator

A reference voltage generator is disclosed. The reference voltage generator may include an operational transconductance amplifier (OTA), a bias generator, a first flipped voltage follower, a bias filter, a control signal filter, and a second flipped voltage follower. The OTA and the first flipped voltage follower may generate a control signal based on a reference voltage and a bias voltage from the bias generator. The bias filter may filter the bias voltage and the control signal filter may filter the control signal. The second flipped voltage follower may generate the output voltage based on the filtered bias voltage and the filtered control signal.

TECHNICAL FIELD

Aspects of the present disclosure relate generally to reference voltage generators, and more specifically to low-noise reference voltage generators.

BACKGROUND

Reference voltages are used by many different electronic circuits and devices. For example, an analog-to-digital converter (ADC) may use a reference voltage to perform analog to digital conversion of an input signal. In another example, a power supply may use a reference voltage to generate a particular output voltage. In still another example, a phase-locked loop (PLL) may use a reference voltage to generate a stable clock frequency. Stable and accurate reference voltages enable peak performance from circuits or devices that use the reference voltage.

Generating a reference voltage may require more than a simple reference voltage source. In some cases, the reference voltage may need voltage and/or current buffering before it can be used as a reference for an ADC or PLL. However, the buffering may introduce unwanted noise in the reference voltage which can negatively affect the performance of circuits and devices relying on the reference voltage.

Therefore, there is a need for a low-noise reference voltage signal generator.

SUMMARY

Aspects of the present disclosure are directed to reference voltage generator circuits configured to provide low-noise reference voltage signals. In one aspect, a reference voltage generator circuit is disclosed. The reference voltage generator may include a first flipped voltage follower configured to generate a control signal based at least in part on a reference voltage, a control signal filter configured to filter one or more frequencies of a control signal; and a second flipped voltage follower configured to generate a regulated output voltage based at least in part on the filtered control signal and the reference voltage.

In another example, a reference voltage generator may include a bias generator configured to generate a bias voltage, a first flipped voltage follower configured to generate a first output voltage based at least in part on a control signal and the bias voltage, a bias filter configured to filter the bias voltage, and a second flipped voltage follower configured to generate a second output voltage based at least in part on the control signal and the filtered bias voltage.

DETAILED DESCRIPTION

Aspects of the present disclosure may reduce noise associated with a reference voltage. More particularly, a reference voltage generator is disclosed that utilizes a first flipped voltage follower, a bias filter, control signal filter, and a second flipped voltage follower. The first flipped voltage follower in combination with an operational transconductance amplifier may generate a control signal. The control signal filter may filter the control signal for the second flipped voltage follower. A bias filter may filter a bias voltage for the second flipped voltage follower. The second flipped voltage follower may use the filtered control signal and the filtered bias voltage to generate the reference voltage.

In the following description, numerous specific details are set forth such as examples of specific components, circuits, and processes to provide a thorough understanding of the present disclosure. The term “coupled” as used herein means coupled directly to or coupled through one or more intervening components or circuits. Also, in the following description and for purposes of explanation, specific nomenclature and/or details are set forth to provide a thorough understanding of the example embodiments. However, it will be apparent to one skilled in the art that these specific details may not be required to practice the example embodiments. In other instances, well-known circuits and devices are shown in block diagram form to avoid obscuring the present disclosure. Any of the signals provided over various buses described herein may be time-multiplexed with other signals and provided over one or more common buses. Additionally, the interconnection between circuit elements or software blocks may be shown as buses or as single signal lines. Each of the buses may alternatively be a single signal line, and each of the single signal lines may alternatively be buses, and a single line or bus might represent any one or more of a myriad of physical or logical mechanisms for communication between components. The example embodiments are not to be construed as limited to specific examples described herein but rather to include within their scope all embodiments defined by the appended claims.

FIG. 1is a simplified diagram of a reference voltage generator100. The reference voltage generator100may generate a reference signal VOUTbased on an input signal, such as a reference signal VREFand include an operational transconductance amplifier (OTA)110, a voltage divider111, a first flipped voltage follower (FVF)120, a bias filter130, a control signal filter140, a second FVF150, and a bias generator160.

The OTA110and the first FVF120may collectively form a feedback loop to generate and regulate a signal VOUT_REP. The feedback loop may include a control signal VSETprovided by the OTA110and VOUT_REPprovided by the first FVF120. The second FVF150may receive a filtered VSETand may generate a VOUTreference signal based on the filtered VSET. Since VSETis common to both the first FVF120and the second FVF150, VOUTwill track (e.g., match) VOUT_REP. VOUTmay be used by other circuits or devices. For example, VOUTmay be used as a reference voltage for one or more analog-to-digital converters to convert an analog signal to a digital signal or for a phase-locked loop to generate a reference clock signal.

The OTA110may receive VREFat a first input. VREFmay be provided by any stable reference source such as, for example, a bandgap voltage device. The OTA110may generate VSETbased on VREFand VOUT_REP. VSETmay be used to set a voltage of the first FVF120(e.g., VOUT_REP) and the second FVF150(e.g., VOUT). The first FVF120may receive VSET. The first FVF120may include transistors121-124, current source125, and resistor126. In some implementations, transistor121and resistor126may determine a loop gain of the first FVF120. As shown, the transistors121-124may be PMOS transistors, but in some implementations one or more of the transistors121-124may be NMOS transistors or any other feasible type of transistor.

The gate of transistor121may receive VSET. Transistor121may operate as a source follower transistor and provide unity gain for VSET. For example, the source voltage of transistor121(VOUT_REP) may follow (track) the gate voltage of transistor121(VSET). VOUT_REPmay be offset by a fixed voltage (e.g., a threshold voltage (VTH) of transistor121) from VSET. The current source125may provide a bias current that enables transistor121to operate as a source follower.

The drain voltage of transistor121may track the source voltage of transistor121. For example, the drain voltage of transistor121may be offset from the source voltage of transistor121by a saturation voltage (VDS SAT). Thus, increases or decreases of VSETmay cause the drain voltage of transistor121to similarly increase and decrease by changing current through the resistor126and thereby changing the source voltage of transistor121.

In some implementations, transistor123may provide a bias current for transistor124. The bias current may cause the source voltage of transistor124to be offset from the gate voltage of transistor124by VTH. The drain of transistor121may be coupled to the gate of transistor124. Thus, the source voltage of transistor124may be controlled by the drain voltage of transistor121.

The source of transistor124may be coupled to the gate of transistor122. Transistor122may control current delivered through transistor121. Therefore, the drain voltage of transistor121may control current through transistor122and regulate VOUT_REP. VOUT_REPmay be coupled to a second input of the OTA110through the voltage divider111. In some implementations, the voltage divider111may be replaced with other circuits or devices that may scale and couple VOUT_REPto the second input of the OTA110.

The bias generator160may include transistor161and current source162. The bias generator160may provide a bias voltage VBPto the first FVF120. More particularly, VBPmay be provided to the gate of transistor123, which in turn provides bias current for transistor124. In some implementations, transistor123and transistor161may form a current mirror. Thus, a drain current of transistor123(and therefore bias current for transistor124) may be provided at least in part by the current source162.

The second FVF150may include transistors151-154, a current source155, and resistor156. In some implementations, transistor151and resistor156may determine a loop gain of the second FVF150. The control signal filter140may provide a filtered VSETsignal to the gate of transistor151. The bias filter130may provide a filtered VBPto the gate of transistor153. The components (transistors, current source, etc.) of the second FVF150may be configured similarly and perform similarly to the equivalent components of the first FVF120. For example, transistor151may operate as a source follower and generate VOUTbased on the gate voltage of transistor151(e.g., the filtered VSETsignal). Further, the transistors152-154may operate similar to transistors122-124, respectively. Thus, the gate voltage of transistor152may be controlled by the drain voltage of transistor151through transistor154. The gate of transistor153may receive the filtered VBPto enable transistor153to control transistor152and regulate VOUT.

In some implementations, VSETmay include device and/or power supply noise that may originate from the OTA110and/or the first FVF120. This noise may be passed by the second FVF150to VOUTthrough transistor151. The control signal filter140may be configured to reduce or eliminate device and/or power supply noise in VSETand thereby reduce noise in VOUT. The control signal filter140is described in more detail with respect toFIG. 2.

In some implementations, noise in the bias signal VBPmay cause noise in the bias current provided to transistor154. A noisy VBPmay affect the gate voltage of transistor152and impair regulation of the VOUT. As described above, transistors152-154may regulate VOUTbased at least in part on VBP. The bias filter130may reduce or eliminate noise in the bias signal VBPand thereby reduce noise in VOUT. The bias filter130is described in more detail with respect toFIG. 3.

FIG. 2is a simplified schematic diagram of a control signal filter200. The control signal filter200may be an implementation the control signal filter140ofFIG. 1and include a resistor210and a capacitor220.

The control signal filter200may reduce or eliminate noise in VSET. In some implementations, the resistor210and the capacitor220may form a low-pass filter. Noise characteristics of VSETmay be determined by measuring one or more signals associated with the reference voltage generator100or through simulation. Values of the resistor210and the capacitor220may be selected to provide a frequency response of the control signal filter200based on the noise characteristics of VSET. The resistance of the resistor210may be adjusted to compensate for process, voltage, or temperature variations. In some implementations, the resistor210may be a variable resistor that may be trimmed during manufacturing or may be adjusted during operation. In some other implementations, the resistor210may be a fixed resistor or implemented through active devices such as one or more transistors.

Although shown as a resistor-capacitor network, in some implementations, the control signal filter200may be realized using any other feasible low-pass filter design. For example, more or fewer components, active devices, and/or a mixture of active and passive devices may be used to implement the control signal filter200.

FIG. 3is a simplified schematic diagram of a bias filter300. The bias filter300may be an implementation of the bias filter130ofFIG. 1and may include a resistor310and a capacitor320.

The bias filter300may reduce and/or eliminate noise in VBP. In some implementations, the resistor310and the capacitor320may form a low-pass filter. In addition, the bias filter300may provide a supply dependent voltage (VBP) for the transistor153. Due to the supply dependent voltage VBP, transistor153may generate a supply noise modulated bias current for the transistor154. The supply noise modulated bias current may actively compensate and/or reject supply noise from the transistor152by maintaining a constant (e.g., noise independent) gate-to-source voltage for transistor152. Noise characteristics of VBPmay be determined by measuring one or more signals associated with the reference voltage generator100or through simulation. Values of the resistor310and the capacitor320may be selected to provide a frequency response of the bias filter300based on the noise characteristics of VBP. In some implementations, the resistor310may be a variable resistor that may be trimmed during manufacturing or may be adjusted during operation. In other implementations, the resistor310may be a fixed resistor or implemented using active devices such as one or more transistors. Although shown as a resistor-capacitor network, in some implementations, the bias filter300may be realized using any other feasible low-pass filter design. For example, more or fewer components, active devices, and/or a mixture of active and passive devices may be used to implement the bias signal filter300.

FIG. 4is an illustrative flowchart of an operation400for operating a reference voltage generator, according to some implementations. The operation400is described with respect to the reference voltage generator100ofFIG. 1. However, in other implementations, the operation400may be performed by any suitable reference voltage generator. Some implementations may perform the operations described herein with additional operations, fewer operations, operations in a different order, operations in parallel, and/or some operations differently.

The operation begins as the reference voltage generator100receives a reference voltage (402). For example, the OTA110of the reference voltage generator100may receive VREFfrom a suitable source such as a bandgap device. The reference voltage generator100may generate a bias voltage (404). For example, the bias generator160of the reference voltage generator100may generate the bias voltage VBP.

The reference generator100generates a control signal based on VREFand the bias voltage (406). For example, the first FVF120of the reference generator100may receive the bias voltage VBP. The OTA110may generate VSETbased on a feedback loop based on VOUT_REPfrom the first FVF120and VREF.

The reference generator100filters the bias voltage (408). For example, the bias filter130may filter the bias voltage VBPprovided by the bias generator160. In some implementations, the bias filter130may include one or more components or devices including, for example, a resistor-capacitor network to filter the bias voltage. In some implementations, the bias filter130may include a low-pass filter. The reference generator100filters the control signal (410). For example, the control signal filter140may filter VSETfrom the OTA110. In some implementations, the control signal filter140may include one or more components or devices including, but not limited to, a resistor-capacitor network to filter VSET. The control signal filter140may include a low-pass filter.

The reference generator100may generate VOUTbased on the filtered bias voltage and the filtered control signal (412). For example, the reference generator100may include a second FVF150that generates VOUTbased on the filtered bias voltage from the bias filter130and the filtered control signal from the control signal filter140.