METALLIZATION METHOD FOR A SEMICONDUCTOR WAFER

A metallization method for a semiconductor wafer having at least the steps: providing a semiconductor wafer having a top side and a bottom side and comprising a plurality of solar cell stacks, wherein each solar cell stack has a Ge substrate forming the bottom side of the semiconductor wafer, a Ge subcell, and at least two III-V subcells in the order mentioned, as well as at least one through-hole, extending from the top side to the bottom side of the semiconductor wafer, with a continuous side wall and a circumference that is oval in cross section, applying a photoresist layer in certain areas as a resist pattern by means of a printing method to the top side and/or to bottom side of the semiconductor wafer, applying a metal layer in a planar manner to exposed regions of the surface of the semiconductor wafer.

This nonprovisional application claims priority under 35 U.S.C. § 119(a) to German Patent Application No. 10 2019 006 098.9, which was filed in Germany on Aug. 29, 2019, and German Patent Application No. 10 2020 001 342.2, which was filed in Germany on Mar. 2, 2020 and which is herein incorporated by reference.

BACKGROUND OF THE INVENTION

Field of the Invention

The present invention relates to a metallization method for a semiconductor wafer.

Description of the Background Art

Different methods for metallizing semiconductor wafers are known. The desired metal structure is produced, for example, with the aid of a resist mask from positive resist or from negative resist, wherein the metal is applied in a planar manner, e.g., by means of physical vapor deposition. Alternatively, printing methods are used, e.g., screen printing or dispensing heads, which apply only the desired metal structure directly.

In order to reduce the shadowing of the front side of a solar cell, it is possible to contact the front side from the back side by means of a through-contact hole. Such solar cells are also known as metal wrap through (MWT) solar cells.

In addition to different production methods for the through-contact holes, different metallization methods are also known in order to achieve, in particular, reliable metallization in the area of the through-contact hole.

A production process for a MWT single solar cell made of multicrystalline silicon is known from “The Metal Wrap Through Solar Cell—Development and Characterization,” F. Clement, dissertation, February 2009, wherein the through-contact holes are produced using a UV laser or an IR laser in an mc-Si substrate layer.

Only then is an emitter layer produced by means of phosphorus diffusion along the top side, the side surfaces of the through-contact hole, and the bottom side of the solar cell. The through-contact hole is filled with a conductive via paste, e.g., a silver paste, by means of screen printing.

An inverted grown GaInP/AlGaAs solar cell structure with through-contact holes is known from “III-V multi-junction metal-wrap-through (MWT) concentrator solar cells,” E. Oliva et al., Proceedings, 32ndEuropean PV Solar Energy Conference and Exhibition, Munich, 2016, pp. 1367-1371, wherein the solar cell structure with the p-n junctions is grown epitaxially and the through-contact holes are only then produced by means of dry etching. A side surface of the through-hole is then coated with an insulation layer and the through-hole is then filled with copper by electroplating.

A solar cell stack made up of multiple III-V subcells on a GaAs substrate with a back-contacted front side is known from U.S. Pat. No. 9,680,035 B1, wherein a hole extending from the top side of the solar cell through the subcells into a substrate layer that has not yet been thinned is produced by means of a wet chemical etching process.

The etching process is based on the fact that the etch rates do not differ significantly, at least for the different III-V materials used in the solar cell stack. The hole is only opened downwards by thinning the substrate layer. Passivation and metallization of the front side and the hole are carried out before the substrate layer is thinned.

SUMMARY OF THE INVENTION

It is therefore an object of the present invention to provide a device that refines the state of the art.

According to an exemplary embodiment of the invention, a metallization method for a semiconductor wafer is provided, comprising at least the steps: providing a semiconductor wafer having a top side and a bottom side and comprising a plurality of solar cell stacks, wherein each solar cell stack has a Ge substrate forming the bottom side of the semiconductor wafer, a Ge subcell, and at least two III-V subcells in the order mentioned, as well as at least one through-hole, extending from the top side to the bottom side of the semiconductor wafer, with a continuous side wall and a circumference that is oval in cross section; applying a resist layer in certain areas as a resist pattern by means of a printing method to the top side or to the bottom side of the semiconductor wafer or both to the top side and the bottom side of the semiconductor wafer; applying a metal layer in a planar manner to exposed regions of the surface of the semiconductor wafer, said regions which are coated with the photoresist layer, and to the resist layer; and removing the resist pattern with the metal layer part located thereon from the semiconductor wafer.

The individual subcells of the solar cell stacks can each have a p-n junction and the layers following the substrate are epitaxially produced on top of one another and/or interconnected by means of a wafer bonding method.

A Ge subcell contains germanium or consists of germanium, wherein a layer consisting of germanium optionally also contains other substances, in particular dopants, but also impurities in addition to the germanium.

The same also applies to the III-V subcells, which have one or more materials from main groups III and V or consist of such materials.

The resist layer is applied particularly easily, quickly, reliably, and/or precisely and reproducibly by means of the printing method. In particular, the method makes it possible, for example, to reliably recess the through-contact holes.

An advantage of the method therefore is that a reliable metallization of the through-holes, therefore in particular of the side surfaces of the through-hole, and of a surface of the semiconductor wafer, therefore the top side and/or the bottom side, is made possible simultaneously in one step by means of a planar application of the metallization.

The metallization method is therefore particularly economical and reliable.

The more continuous the resist pattern is formed (i.e., the fewer individual, non-interconnected sections make up the resist pattern), the simpler and faster the removal process will be.

After the application of the photoresist layer and before the application of the metal layer, the photoresist layer can be finely patterned by means of a photolithographic method.

In other words, after a coarse patterning, therefore the application of the photoresist layer in certain areas by means of the printing method, a second patterning, i.e., a fine patterning, is carried out before the application of the metal layer by means of a photolithographic method. Fine structures in a range of a few micrometers can be reliably and reproducibly produced hereby. It is understood that the resist is a photopatternable resist.

The photoresist layer can be formed as a negative resist layer or as a positive resist layer, wherein the resist pattern is formed in each case as an inverse of a trace diagram.

The resist layer recesses the through-holes. This ensures a reliable coating of the side surfaces of the through-holes during the subsequent metallization.

The semiconductor wafer provided can have separation trenches, wherein the resist layer is applied to a surface of the separation trenches.

The printing method can be an inkjet method. It has been shown that a resist pattern can be produced particularly reliably and precisely by means of an inkjet method.

The through-holes of the semiconductor wafer provided can have a first diameter of at most 1 mm and at least 300 μm or at least 400 μm or at least 450 μm at an edge adjacent to the top side of the semiconductor wafer.

The through-holes can have a second diameter of at most 500 μm and of at least 50 μm or at least 100 μm at an edge adjacent to the bottom side of the semiconductor wafer.

The semiconductor wafer provided can have a total thickness of at most 300 μm and of at least 90 μm or of at least 150 μm or of at least 200 μm.

According to a further embodiment, the resist pattern has at least one auxiliary section extending to an edge of the semiconductor wafer, wherein the removal of the resist layer is started with the auxiliary section.

The resist pattern can be formed continuous on the bottom side of the semiconductor wafer and/or on the top side of the semiconductor wafer in each case at least in the area of each individual solar cell stack or over multiple solar cell stacks or over the entire bottom side of the semiconductor wafer.

The semiconductor wafer provided can have a dielectric insulation layer covering the side wall of the through-hole and a region, adjacent to the through-hole, on the top side of the semiconductor wafer and a region, adjacent to the through-hole, on the bottom side of the semiconductor wafer.

The method can be carried out first for the bottom side and then for the top side of the semiconductor wafer. The bottom side of the semiconductor wafer is thus metallized first according to the method.

The method is used for the top side of the same semiconductor wafer only after the method, i.e., the processes of coating, applying metal, and removing the resist layer, has been carried out completely for the bottom side.

Alternatively, the metallization of the top side is metallized using method steps that differ from the method.

Again, as an alternative, the method is always carried out alternately for the top side and the bottom side of the semiconductor wafer; i.e., each method step is carried out first for the top side and then for the bottom side or vice versa, before the subsequent method step follows accordingly.

Likewise, alternatively, the method is first used completely for the top side of the semiconductor wafer and then for the bottom side of the semiconductor wafer.

DETAILED DESCRIPTION

The diagrams inFIGS. 1 and 2show a plan view and a back side detail of a semiconductor wafer10with a photoresist layer30applied according to the method.

Semiconductor wafer10has a top side10.1, a bottom side10.2, and multiple solar cell stacks12, wherein each solar cell stack12has a Ge substrate14forming bottom side10.2, a Ge subcell16, a first III-V subcell18, and a second III-V subcell20forming top side10.1.

Each solar cell stack12also has two through-holes22extending from top side10.1to bottom side10.2.

A photoresist layer30is applied as a resist pattern to top side10.1of semiconductor wafer10, in this case therefore to the second III-V subcell20, wherein the resist pattern in each case recesses an area around through-holes22and a plurality of linear areas for contact fingers and a busbar, connecting through-holes openings22and the contact fingers, per solar cell stack12.

In this case, photoresist layer30extends in a planar manner to the edges of each solar cell stack and is connected across all solar cell stacks12of semiconductor wafer10.

Photoresist layer30, therefore, the resist pattern, also extends in a planar manner up to an edge of semiconductor wafer10, so that the entire photoresist layer30can be removed in a continuous manner from top side10.1of semiconductor wafer10over the individual solar cell stacks.

On bottom side10.2of the semiconductor wafer, therefore Ge substrate14, the resist pattern of photoresist layer30has an area surrounding the through-holes per solar cell stack as well as connecting webs extending to the edge of the individual solar cell stack. In other words, the through-holes are recessed.

The connecting webs of adjacent solar cell stacks are interconnected, so that the resist pattern has a continuous structure at least along each row of solar cell stacks and can thereby be removed again in a continuous manner.

In a further refinement, which is not shown, the connecting webs at the end of a row of solar cell stacks are connected to an auxiliary section that extends up to the edge of the semiconductor wafer, so that they can be removed more easily from the edge.

The diagram inFIG. 3shows a sequence of a metallization method for a semiconductor wafer10according to a first embodiment of the invention. The individual method steps are applied both to the top side and to the bottom side of the semiconductor wafer.

Semiconductor wafer10with a total layer thickness H1is provided.

A photoresist layer30is applied as a resist pattern by means of a printing method to top side10.1and to bottom side10.2of semiconductor wafer10. Photoresist layer30is therefore only applied in certain areas.

A metal layer32is then applied in a planar manner to top side10.1and to bottom side10.2of semiconductor wafer10.

Metal layer32thus covers both photoresist layer30and the areas that are not covered by the photoresist layer30but are exposed on top side10.1and bottom side10.2of semiconductor wafer10.

In a subsequent method step, photoresist layer30is removed together with the metal layer32part located on photoresist layer30. A residual structure of metal layer32remains on top side10.1and bottom side10.2of semiconductor wafer10, wherein the residual structure is a negative of the resist pattern.

Alternatively, and not expressly shown here, the method steps are applied only to the top side or only to the bottom side, and the respective other surface of the semiconductor wafer remains unchanged accordingly. According to another alternative embodiment, also not shown here, the method is first carried out completely for one of the surfaces of the semiconductor wafer, therefore for the bottom side or for the top side, whereas the other surface remains unchanged. The method is then applied to the still unchanged surface.

The diagram inFIG. 4shows a cross section of a through-hole22of a semiconductor wafer10after photoresist layer30has been applied. Only the differences from the diagram inFIG. 3will be explained below.

Through-hole22has a continuous side wall22.1and a circumference that is oval in cross section, a first diameter D1on top side10.1of semiconductor wafer10, and a second diameter D2on bottom side10.2of semiconductor wafer10.

Side wall22.1of through-hole22as well as a region, adjacent to through-hole22, on top side10.1and a region, adjacent to through-hole22, on bottom side10.2of semiconductor wafer10are coated with a dielectric insulation layer24.

Photoresist layer30on top side10.1has a distance A1from an edge of through-hole22and on bottom side10.2it has a distance A2from an edge of through-hole22.

Here, the distance A1is so great that photoresist layer30on top side10.1of semiconductor wafer10is spaced apart from dielectric insulation layer24. In other words, the through-holes are recessed during the application of photoresist layer30.

The distance A2is smaller than the distance A1and is selected such that photoresist layer30on bottom side10.2of semiconductor wafer10also extends over an edge region of dielectric insulation layer24.

The diagram inFIG. 5shows a cross section of a through-hole22of a semiconductor wafer10after metal layer32has been applied and after photoresist layer30, therefore the resist pattern, has been removed. Only the differences from the diagram inFIG. 4will be explained below.

Metal layer32remaining after the resist pattern has been removed extends over side wall22.1of through-hole22and over part of dielectric insulation layer24on bottom side10.2of semiconductor wafer10. Metal layer32is therefore spaced apart from the exposed, non-insulated surface of bottom side10.2of the semiconductor wafer.

On top side10.1, metal layer32extends over dielectric insulation layer24to an exposed region, adjacent to dielectric insulation layer24, on top side10.1of the semiconductor wafer. Metal layer32is thus integrally connected both to dielectric insulation layer24and to an exposed surface region of semiconductor wafer, here the second III-V subcell20.

A further embodiment of the method of the invention is shown in the diagrams inFIGS. 6 and 7, wherein only the differences fromFIGS. 3 to 6are explained below.

The method is applied to bottom side10.2of the semiconductor wafer.FIG. 6shows a cross section of one of through-holes22of semiconductor wafer10after photoresist layer30has been applied to the bottom side, whereas top side10.1remains unchanged, therefore in particular without photoresist layer30.

The diagram inFIG. 7shows a cross section of a through-hole22of a semiconductor wafer10after metal layer32has been applied to bottom side10.2and after photoresist layer30, therefore the resist pattern, has been removed from bottom side10.2. The remaining metal layer32covers part of bottom side10.2, in particular a region formed by insulation layer24around through-hole22and a region of side wall22.1of the through-hole, said region being adjacent to bottom side10.2. Top side10.1of the semiconductor wafer and a region of side wall22.1of through-hole22, said region adjoining top side10.1, are not covered by metal layer32.