Liquid crystal display device and method of fabricating the same

A liquid crystal display device is provided. The liquid crystal display device includes a gate line and a data line formed on a substrate; a thin film transistor formed at an intersection of the gate line and the data line; a pixel electrode connected to the thin film transistor; a common electrode substantially parallel to the pixel electrode; and a conductive pattern in contact with the common electrode at a lateral side surface of the common electrode.

This Nonprovisional Application claims priority under 35 U.S.C. §119(a) on Patent Application No. 10-2005-0051651 filed in Korea on Jun. 15, 2005, the entire contents of which are hereby incorporated by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a liquid crystal display panel, and more particularly, to a liquid crystal display panel of a horizontal electric field type and a method of fabricating the same that is capable of simplifying the manufacturing process and reducing the cost.

2. Description of the Related Art

A liquid crystal displays (LCD) control light transmittance of liquid crystal using an electric field to thereby display a picture. The liquid crystal displays are largely classified into a vertical electric field type and a horizontal electric field type depending upon the direction of the electric field driving the liquid crystal material.

The liquid crystal display of a vertical electric field type drives a liquid crystal material in a twisted nematic (TN) mode with a vertical electric field formed between a pixel electrode and a common electrode arranged opposite to each other on the upper and lower substrates. The liquid crystal display of a vertical electric field type has an advantage of a large aperture ratio while having a drawback of a narrow viewing angle about 90°.

The liquid crystal display of a horizontal electric field type drives a liquid crystal in an in plane switch (IPS) mode with a horizontal electric field between the pixel electrode and the common electrode arranged in parallel to each other on the lower substrate. The liquid crystal display of a horizontal electric field type has an advantage of a wide viewing angle about 160°. Hereinafter, the liquid crystal display of a horizontal electric field type will be described in detail.

The liquid crystal display of a horizontal electric field type includes a thin film transistor substrate (i.e., a lower substrate) and a color filter substrate (i.e., an upper substrate) joined opposite to each other, a spacer for uniformly maintaining a cell gap between two substrates, and a liquid crystal material filled into the space provided by the spacer.

The thin film transistor substrate includes a plurality of signal lines and a plurality of thin film transistors for forming a horizontal electric field for each pixel, and an alignment film coated thereon to align the liquid crystal material. The color filter substrate includes a color filter for implementing a color, a black matrix for preventing a light leakage and an alignment film coated thereon to align the liquid crystal material.

FIG. 1is a plan view illustrating a thin film transistor array substrate of a related art liquid crystal display panel of a horizontal electric type, andFIG. 2is a cross-sectional view illustrating the thin film transistor array substrate taken along a line I-I′ inFIG. 1.

Referring toFIG. 1andFIG. 2, the thin film transistor array substrate includes a gate line2and a data line4provided on a lower substrate45in such a manner to intersect each other, a thin film transistor6provided at each intersection, a pixel electrode14and a common electrode18provided at a pixel area defined by the intersection structure for the purpose of forming a horizontal field, and a common line16connected to the common electrode18.

The gate line2supplies a gate signal to a gate electrode8of the thin film transistor6. The data line4supplies a pixel signal via a drain electrode12of the thin film transistor6to the pixel electrode14. The gate line2and the data line4are formed in the intersection structure to define a pixel area5.

The common line16is formed in parallel to the gate line with the pixel area5therebetween to supply a common voltage for driving the liquid crystal material to the common electrode18.

The thin film transistor6allows the pixel signal of the data line4to be charged and maintained in the pixel electrode14in response to the gate signal of the gate line2. To this end, the thin film transistor6includes the gate electrode8connected to the gate line2, a source electrode10connected to the data line4, and the drain electrode12connected to the pixel electrode14. Further, the thin film transistor6further includes a semiconductor pattern49having an active layer48, overlapping with the gate electrode8with having a gate insulating film46therebetween to define a channel between the source electrode10and the drain electrode12. In the semiconductor pattern49, an ohmic contact layer50, located on the active layer48to make an ohmic contact with the data line4, the source electrode10, and the drain electrode12, is further included.

The pixel electrode14is connected, via a contact hole17, to the drain electrode12of the thin film transistor6and is provided at the pixel area5. Particularly, the pixel electrode14includes a first horizontal part14aconnected to the drain electrode12and provided in parallel with adjacent gate lines2, a second horizontal part14boverlapping with the common line16, and a finger part14cprovided in parallel between the first and second horizontal parts14aand14b.

The common electrode18is connected to the common line16and is formed of the same metal as the gate line2and the gate electrode8at the pixel area5. Specifically, the common electrode18is in parallel with the finger part14cof the pixel electrode14at the pixel area5.

Accordingly, a horizontal electric field is formed between the pixel electrode14to which a pixel signal is supplied via the thin film transistor6and the common electrode18to which the common voltage is supplied via the common line16. Specifically, the horizontal electric field is formed between the finger part14C of the pixel electrode14and the common electrode18. Liquid crystal molecules arranged in the horizontal direction between the thin film transistor array substrate and the color filter array substrate by such a horizontal electric field are rotated due to a dielectric anisotropy. Transmittance of a light transmitting the pixel area5is differentiated depending upon the extent of the rotation of the liquid crystal molecules, thereby implementing a gray level scale.

To form the thin film transistor array substrate of the related art liquid crystal display panel of a horizontal electric field type, a photolithography using at least four masks is used.

More particularly, a gate pattern including the gate electrode8, the common electrode18and the common line16is formed by using a first mask process, the semiconductor pattern49and a source/drain pattern are formed by using a second mask process, a passivation film52having the contact hole17is formed by using a third mask process, and the pixel electrode14is formed by using a fourth mask process. Each mask process includes a lot of processes such as applying photo-resist, exposing, developing, cleaning, and inspection processes, etc. Accordingly, it is a complicate process for manufacturing the liquid crystal display panel and leads to a major factor of the manufacturing cost of the liquid crystal display panel.

SUMMARY OF THE INVENTION

Accordingly, it is an object of the present invention to provide a liquid crystal display device and a method of fabricating the same that is capable of simplifying the process and reducing the cost.

In order to achieve these and other objects of the invention, a liquid crystal display device according to an embodiment of the present invention comprises a gate line and a data line formed on a substrate; a thin film transistor formed at an intersection of the gate line and the data line; a pixel electrode connected to the thin film transistor; a common electrode substantially parallel to the pixel electrode; and a conductive pattern in contact with the common electrode at a lateral side surface of the common electrode.

In another aspect of the present invention, a method of fabricating a liquid crystal display device according to an embodiment of the present invention comprises forming a thin film transistor including a gate electrode, a source electrode and a drain electrode; forming a common electrode and a common line connected to the common electrode; and forming a transparent electrode pattern including a pixel electrode connected to the drain electrode and substantially parallel to the common electrode, and a conductive pattern in contact with the common electrode at a lateral side surface of the common electrode, by using a single mask.

In another aspect of the present invention, a method for forming a liquid crystal display device according to an embodiment of the present invention comprises forming a gate line and a data line on a substrate; forming a thin film transistor at an intersection of the gate line and the data line; forming a pixel electrode connected to the thin film transistor; forming a common electrode substantially parallel to the pixel electrode; and forming a conductive pattern in contact with the common electrode at a lateral side surface of the common electrode.

DETAILED DESCRIPTION OF THE ILLUSTRATED EMBODIMENTS

Hereinafter, the preferred embodiments of the present invention will be described in detail with reference toFIGS. 3 to 10.

FIG. 3is a plan view illustrating a thin film transistor array substrate of a liquid crystal display panel of a horizontal electric field type according to a first embodiment of the present invention, andFIG. 4is a cross-sectional view illustrating the thin film transistor array substrate taken along lines II-II′ and III-III′ inFIG. 3.

Referring toFIG. 3andFIG. 4, the thin film transistor array substrate includes a gate line102and a data line104provided on a lower substrate145in such a manner to intersect each other, a thin film transistor106provided at each intersection, a pixel electrode114and a common electrode118provided at a pixel area defined by the intersection structure for the purpose of forming a horizontal field, and a common line116connected to the common electrode118.

The gate line102supplies a gate signal to a gate electrode108of the thin film transistor106. The data line104supplies a pixel signal via a drain electrode112of the thin film transistor106to the pixel electrode114. The gate line102and the data line104are formed in the intersection structure to define a pixel area105.

The common line116is formed in parallel to the gate line with the pixel area105therebetween to supply the common voltage for driving the liquid crystal material to the common electrode118. Further, the common line116is formed of the same material as the gate line102.

The thin film transistor106allows the pixel signal of the data line104to be charged and maintained in the pixel electrode114in response to the gate signal of the gate line102. The thin film transistor106includes the gate electrode108connected to the gate line102, a source electrode110connected to the data line104, and the drain electrode112connected to the pixel electrode114. Further, the thin film transistor106further includes a semiconductor pattern149having an active layer148, overlapping with the gate electrode108with having a gate insulating film146therebetween to define a channel between the source electrode110and the drain electrode112. In the semiconductor pattern149, an ohmic contact layer150, located on the active layer148to make an ohmic contact with the data line104, the source electrode110, and the drain electrode112, is further included. Meanwhile, the reference numeral ‘152’ represents a passivation film.

The pixel electrode114is connected to the drain electrode112of the thin film transistor106and is provided at the pixel area105. Particularly, the pixel electrode114includes a horizontal part114aconnected to the drain electrode112and provided in parallel with adjacent gate lines102, and a finger part114cprovided in parallel to the common electrode118.

The common electrode118is connected to the common line116and is formed of the same metal as the gate line102and the gate electrode108at the pixel area105.

Specifically, a conductive pattern115is partially overlapped with the common electrode118located at an outermost of the pixel area105. As shown inFIG. 4, the conductive pattern115is in contact with the common electrode118at the outermost of the pixel area105at the top surface and the lateral side surface of the common electrode118. There is a second common electrode119located within the pixel area105separated from the common electrode118. The second common electrode119includes a transparent electrode material (not a gate metal) and is partially overlapped with the common line116, which is formed of the gate metal. As shown in the illustrated embodiment ofFIG. 3 and 4, the second common electrode119is located between two common electrodes118at the outermost of the pixel area105. In addition, the second common electrode119is in contact with the common line116at the top surface and the lateral side surface of the common line116.

In the illustrated embodiment ofFIGS. 3 and 4, there is a conductive line (not labeled) substantially parallel to the common line116. Two ends of the common electrode118at the outermost of the pixel area105are respectively in contact with the common line116and the conductive line. In addition, two ends of the second common electrode119are also respectively in contact with the common line116and the conductive line. Specifically, the second common electrode119is in contact with the common line116at the top surface and the lateral side surface of the common line116.

The thin film transistor array substrate of the illustrated embodiment having the above-mentioned structure is formed by three mask processes. Therefore, it is a simplified manufacturing process as compared to the related art and can reduce the manufacturing cost.

Hereinafter, a method of fabricating the thin film transistor array substrate formed by three mask processes will be described with reference toFIGS. 5A to 6F, as follows.

First, a gate pattern is formed by a photolithography process using a first mask and an etching process. In other words, after a gate metal layer is deposited on a lower substrate by a deposition method such as sputtering, the gate metal layer is patterned by the photolithography process and the etching process, to thereby form a gate pattern including a gate line102, a gate electrode108connected to the gate line102, a gate line102, a common line116, and a common electrode118. Herein, the gate metal layer is formed of aluminum neodium (AlNd), aluminum, etc.

An inorganic insulating material is entirely deposited on the lower substrate145provided with the gate pattern, etc. by a deposition technique such as the PECVD, etc., thereby providing a gate insulating film146. Herein, the gate insulating film146is formed of an inorganic insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx), etc.

Thereafter, as shown inFIG. 5B, a semiconductor pattern and a source/drain pattern are formed by a photolithography using a second mask and an etching process. To describe this second mask process more specifically, an amorphous silicon layer, a n+amorphous silicon layer and a source/drain metal layer are sequentially formed on the lower substrate145having the gate insulating film146. The amorphous silicon layer, the n+amorphous silicon layer and the source/drain metal layer are patterned by a photolithography process using a diffractive exposing mask and an etching process, to thereby form a source/drain pattern including a data line104, a source electrode110, and a drain electrode112, and a semiconductor pattern149including an ohmic contact layer150and an active layer148. Then, the ohmic contact layer150is etched by using the source and drain electrodes110and112as a mask to thereby expose the active layer148. Herein, the data metal material is selected from chrome (Cr), molybdenum (Mo) or titanium (Ti), etc.

Finally, as shown inFIG. 5C, a transparent electrode pattern is formed by a photolithography process using a third mask and an etching process. Herein, the transparent electrode pattern includes a pixel electrode114, a conductive pattern115connected to a common electrode118at an outermost of the pixel area105, and a second common electrode119located within the pixel area105and connected to the common line116.

Hereinafter, the process using the third mask will be specifically described with reference toFIGS. 6A to 6F. First, the passivation film152, made of an inorganic insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx), etc., and a first photo-resist are sequentially formed on the lower substrate145having the source/drain pattern. Then a photo-resist pattern132is formed by a photolithography process as shown inFIG. 6A.

Thereafter, the passivation film152and the gate insulating film146are patterned by using the photo-resist pattern132as a mask, to thereby form a groove134of a line shape to partially expose the lower substrate145and to expose the drain electrode112of the thin film transistor106, as shown inFIG. 6B.

The transparent electrode material120is deposited on the lower substrate145provided with the passivation film152and the gate insulating film146. Herein, the transparent electrode material.120is formed of indium-tin-oxide (ITO), tin-oxide (TO), indium-zinc-oxide (IZO) or indium-tin-zinc-oxide (ITZO), etc.

As shown inFIG. 6C, a second photo-resist136is entirely deposited on the lower substrate145on which the transparent electrode material120is deposited. In this case, the second photo-resist136is filled in the grooves134of a line shape.

Thereafter, an ashing process is performed to expose the transparent electrode material120as shown inFIG. 6D. An etching process is performed in a state that the transparent electrode material120is exposed, so that the transparent electrode material120exists in only grooves134of a line shape as shown inFIG. 6E.

Subsequently, a stripping process is performed to thereby form the pixel electrode114, which is parallel to the common electrode118located at the outermost of the pixel area, the conductive pattern115connected to the common electrode118of the outermost of the pixel area105, and the second common electrode119located within the pixel area105. Herein, the second common electrode119within the pixel area105and the common line116are in contact with each other in the same way as the contact between the common electrode118of the outermost of the pixel area105and the conductive pattern115.

As described above the thin film transistor array substrate of a horizontal electric field type liquid crystal display panel according to the first embodiment of the present invention can be formed by the patterning process using three masks, so that the manufacturing process becomes simplified and the manufacturing cost becomes reduced.

Meanwhile, in the thin film transistor array substrate of a horizontal electric field type liquid crystal display panel according to the first embodiment of the present invention, it may have a problem as follows.

InFIG. 6C, in a case that the transparent electrode material120is deposited and then the transparent electrode material120is baked, the transparent electrode material120connected to the gate metal having high heat conductivity becomes crystallized (poly). Accordingly, the etching of the transparent electrode material120may not be performed well so that the transparent electrode material120partially remains on the photo-resist pattern132as shown inFIG. 7. Such a remaining transparent electrode material120functions as a particle in the pixel area105and will deteriorate a picture quality or be a factor generating short circuiting between electrodes.

Accordingly, a structure for preventing the above-mentioned problem is provided in a second embodiment of the present invention.

FIG. 8is a plan view illustrating a thin film transistor array substrate of a liquid crystal display panel of a horizontal electric field type according to a second embodiment of the present invention, andFIG. 9is a cross-sectional view illustrating the thin film transistor array substrate taken along lines II-II′ and III-III′ inFIG. 8.

The thin film transistor array substrate shown inFIGS. 8 and 9has components identical to those of the thin film transistor array substrate shown inFIG. 4except that the common electrode118, located at the outermost of the pixel area105is contacted with the conductive pattern115at a lateral side surface. Therefore, the same components as inFIGS. 4 and 5are given the same reference numeral and the detail description thereof is to be omitted.

In the thin film transistor array substrate of a liquid crystal display panel of a horizontal electric field type shown inFIGS. 8 and 9, the common electrode118located at the outermost of the pixel area105is connected with the conductive pattern115at a lateral side surface of the common electrode118. Furthermore, the second common electrode119located within the pixel area105is in contact with the common line116at a lateral side surface of the common line116. Accordingly, the contact between the gate metal pattern and the transparent electrode material is minimized, to thereby minimize a crystallization of the transparent electrode material. As a result, after the photo-resist pattern is stripped, the transparent electrode material will not remain.

Meanwhile, the thin film transistor array substrate of the liquid crystal display panel of a horizontal electric field type according to the second embodiment of the present invention is formed by the same method as inFIGS. 5A to 6Fexcept that the gate insulating film146remains so as to cover the common electrode118located at the outermost of the pixel area105. Therefore, the transparent electrode material is in contact with the common electrode118at a lateral side surface of the common electrode118in the third mask process. Therefore, a detailed description on the fabricating method will not be discussed here.

FIG. 10is a plan view illustrating a thin film transistor array substrate of a liquid crystal display panel of a horizontal electric field type according to a third embodiment of the present invention.

In the thin film transistor array substrate shown inFIG. 10, a common electrode118located at an outermost of a pixel area105is in contact with a conductive pattern in a side surface like the thin film transistor array substrate shown inFIGS. 8 and 9. In addition, an extremely partial conductive pattern115is formed to be overlapped with the common electrode118similar to the first embodiment shown inFIGS. 3 and 4. The thin film transistor array substrate shown inFIG. 10has the same components as inFIGS. 3 to 8except for the characteristic on the above-mentioned structure. Therefore, the same components as inFIGS. 3 to 8are given the same reference numerals and the detail description thereof will not be discussed here.

In the second embodiment of the present invention, the conductive pattern115and the common electrode118are connected at a lateral side surface. Therefore, the reliability of the connection may be deteriorated. Accordingly, the third embodiment of the present invention further includes an extending portion137in at least any one of both ends and a center of the conductive pattern115so as to minimize crystallization and to improve the reliability of the connection between the conductive pattern115and the common electrode118.

In other words, the extending portion137, capable of minimizing the connection between the common electrode118formed of the gate metal pattern and the conductive pattern115formed of the transparent electrode material and capable of having better reliability of the connection, is further formed. Therefore, it is possible to minimize crystallization of the transparent electrode material (conductive pattern) and to maintain a better contact between the conductive pattern115and the common electrode118. Herein, a line width d1of the conductive pattern115is about 2.5 μm˜3.5 μm. A length d2of the extending portion137, extending from the conductive pattern115to overlap with the common electrode118, is about 1.5 μm˜2.5 μm.

Meanwhile, a method of fabricating the thin film transistor array substrate of the liquid crystal display panel of a horizontal electric field type according to the third embodiment of the present invention keeps the gate insulating film146and the passivation film152to be overlapped with the common electrode118located at the outermost of the pixel area105. Therefore, the transparent electrode material is connected to the common electrode118at a lateral side of the common electrode118, in the third mask process. Further, the thin film transistor array substrate of the liquid crystal display panel of a horizontal electric field type according to the third embodiment of the present invention is formed by the same method as inFIGS. 5A to 6Fexcept that the extending portion137, extending from both ends and the central portion of the conductive pattern115, or any portion between the two ends of the conductive pattern115, is further formed.

As described above, in the liquid crystal display panel of a horizontal electric field type and the method of fabricating the same according to the illustrated embodiments, the thin film transistor array substrate can be formed by the patterning process using three masks. Therefore, the manufacturing process becomes simplified and the manufacturing cost becomes reduced. Further, crystallization of the transparent electrode material (the conductive pattern in the embodiment) connected to the gate metal (the common electrode in the embodiment) is minimized, to thereby prevent that the transparent electrode material from remaining after stripping process.