ELECTRO-OPTICAL DEVICE AND ELECTRONIC APPARATUS

In an electro-optical device, a first substrate used in an electro-optical panel is provided with a temperature-detecting element, and a wiring substrate connected to the first substrate is provided with third wiring electrically connected to first wiring of the first substrate, and fourth wiring electrically connected to second wiring of the first substrate. The wiring substrate is provided with an electrostatic protection circuit. The electrostatic protection circuit includes a first electrostatic protection circuit provided inside a driving integrated circuit, and a second electrostatic protection circuit including a capacitance element mounted on the wiring substrate. Accordingly, even when static electricity invades the third wiring and the fourth wiring from a connector side, the surge can be released via the electrostatic protection circuit.

The present application is based on, and claims priority from JP Application Serial Number 2021-140761, filed Aug. 31, 2021, the disclosure of which is hereby incorporated by reference herein in its entirety.

BACKGROUND

1. Technical Field

The present disclosure relates to an electro-optical device provided with a temperature-detecting element, and an electronic apparatus.

2. Related Art

There has been proposed a technology of providing a temperature-detecting element outside the display region of an electro-optical panel in electro-optical devices such as liquid crystal devices, and correcting or otherwise modifying driving conditions based on detection results of the temperature-detecting element (see JP-A-2002-6333). In the electro-optical device described in JP-A-2002-6333, a wiring substrate on which a driving integrated circuit (IC) is mounted is connected to the electro-optical panel, and the temperature-detecting element is electrically connected to the driving IC.

However, in a configuration in which the temperature-detecting element is electrically connected to the driving IC mounted on the wiring substrate, the temperature-detecting element is susceptible to surge or noise via the wiring substrate connected to the electro-optical panel. For example, when static electricity invades the driving IC, the surge caused by static electricity invades the temperature-detecting element.

SUMMARY

In order to solve the problems described above, an aspect of an electro-optical device to which the present disclosure is applied includes: an electro-optical panel provided with a temperature-detecting element, first wiring electrically connected to the temperature-detecting element, and second wiring electrically connected to the temperature-detecting element, and a wiring substrate provided with third wiring electrically connected to the first wiring, fourth wiring electrically connected to the second wiring, and an electrostatic protection circuit.

Another aspect of the electro-optical device to which the present disclosure is applied includes: an electro-optical panel provided with a temperature-detecting element, first wiring electrically connected to the temperature-detecting element, and second wiring electrically connected to the temperature-detecting element, and a wiring substrate provided with third wiring electrically connected to the first wiring, fourth wiring electrically connected to the second wiring, and a driving integrated circuit, wherein the third wiring and the fourth wiring do not overlap the driving integrated circuit in plan view.

The electro-optical device according to the present disclosure is used in electronic apparatuses.

DESCRIPTION OF EXEMPLARY EMBODIMENTS

Embodiments of the present disclosure will now be described with reference to the accompanying drawings. Note that in each of the figures referred to in the following description, to illustrate each layer, each member, and the like in a recognizable size in the drawings, each layer, each member, and the like are illustrated at a different scale. Furthermore, a plan view means a state viewed from a normal direction relative to a first substrate10or a second substrate20. Furthermore, in the description, of the two directions intersecting each other in an in-plane direction of the first substrate10, one is referred to as the first direction Y, and the other is referred to as the second direction X.

FIG.1is a plan view illustrating a configuration example of an electro-optical device100according to Embodiment 1 of the present disclosure.FIG.2is an explanatory view schematically illustrating a cross section of the electro-optical device100illustrated inFIG.1. The electro-optical device100illustrated inFIGS.1and2is a liquid crystal device, and includes an electro-optical panel100p. In the electro-optical device100, the first substrate10and the second substrate20are bonded together by a seal material107via a predetermined gap between the first substrate10and the second substrate20. The seal material107is provided at a frame shape along the outer edge of the second substrate20. The seal material107is an adhesive containing a photocurable resin, a thermosetting resin, or the like. A gap material107asuch as glass fiber or glass beads is blended in the seal material107to bring the distance between the first substrate10and the second substrate20to a predetermined value. In the electro-optical device100, an electro-optical layer50including a liquid crystal layer is provided inside a region surrounded by the seal material107in the space between the first substrate10and the second substrate20. In the seal material107, a cut portion107cused as a liquid crystal injection port is formed. After a liquid crystal material is injected, such a cut portion107cis plugged by an encapsulant108. Note that when the liquid crystal material is filled by a dripping method, the cut portion107cis not formed. The first substrate10and the second substrate20are both a quadrangle. In a substantially central portion of the electro-optical device100, a display region10ais provided as a quadrangular region. To match such a shape, the seal material107is also provided at a substantially quadrangular shape. An outer peripheral region10chaving a quadrangular frame shape is provided outside the display region10a.

In the following description, in the first substrate10, a side extending in the first direction Y is referred to as the first side10w1, and a side adjacent to the first side10w1and extending in the second direction X is referred to as the second side10w2. Furthermore, in the first substrate10, a side extending in the first direction Y so as to face the first side10w1in the second direction X is referred to as the third side10w3, and a side extending in the second direction X so as to face the second side10w2in the first direction Y is referred to as the fourth side10w4.

In the outer peripheral region10cof the first substrate10, a scanning line driving circuit104is provided between the first side10w1of the first substrate10and the display region10a, and between the third side10w3of the first substrate10and the display region10a, respectively. Furthermore, a data line driving circuit101is provided between the second side10w2of the first substrate10and the display region10a, and an inspection circuit105is provided between the fourth side10w4of the first substrate10and a second side10a2of the display region10a. In the first substrate10, between the second side10w2and the data line driving circuit101, a plurality of mounting terminals102are arranged along the second side10w2.

The first substrate10includes a light-transmitting substrate main body10wsuch as a quartz substrate or a glass substrate. On the side of a first surface10sfacing the second substrate20of the first substrate10, a plurality of pixel transistors and pixel electrodes9aare formed in a matrix pattern in the display region10a. The pixel electrodes9aare each electrically connected to a corresponding pixel transistor among the plurality of pixel transistors. A first oriented film16is formed on the upper layer side of the pixel electrodes9a. On the first surface10sside of the first substrate10, in a quadrangle frame-shaped region10bextending between the outer edge of the display region10aand the seal material107, dummy pixel electrodes9bformed simultaneously with the pixel electrodes9aare formed in a portion extending along the sides of the display region10a.

The second substrate20includes a light-transmitting substrate main body20wsuch as a quartz substrate or a glass substrate. On the side of a first surface20sfacing the first substrate10of the second substrate20, a common electrode21is formed. A second oriented film26is stacked on the surface of the common electrode21. The common electrode21is formed substantially across the entire surface on the first surface20sside of the second substrate20. In the frame-shaped region10bon the first surface20sside of the second substrate20, a display end light-blocking region29including a light-blocking layer is formed on the lower layer side of the common electrode21. The inner edge of the display end light-blocking region29defines the display region10a. A light-transmitting flattening film22is formed between the display end light-blocking region29and the common electrode21. The light-blocking layer constituting the display end light-blocking region29may be formed as a black matrix portion overlapping, in plan view, inter-pixel regions10fsandwiched between adjacent pixel electrodes9a. The display end light-blocking region29overlaps the dummy pixel electrodes9bin plan view. The display end light-blocking region29is constituted by a light-blocking metal film or black resin.

The first oriented film16and the second oriented film26are each an inorganic oriented film including a diagonally vapor-deposited film of SiOx(x≤2), TiO2, MgO, Al2O3, or the like, and each includes a columnar structure layer in which columnar bodies, referred to as columns, are formed oblique to the first substrate10and the second substrate20. Accordingly, the first oriented film16and the second oriented film26cause nematic liquid crystal molecules that are used in the electro-optical layer50and that have negative dielectric anisotropy to be oriented in an inclined manner oblique to the first substrate10and the second substrate20, thereby causing the liquid crystal molecules to be pre-tilted. In this way, the electro-optical device100is constituted as a liquid crystal device of a normally black vertical alignment (VA) mode.

Outside the seal material107in the first substrate10, inter-substrate conduction electrodes14tare formed in positions overlapping four corner portions24tof the second substrate20. The inter-substrate conduction electrodes14tare conductively connected to common potential wiring6g. The common potential wiring6gis conductively connected, of the terminals102, to a common potential application terminal102g. An inter-substrate conduction material109including conductive particles is disposed between the inter-substrate conduction electrodes14tand the common electrode21. The common electrode21of the second substrate20is electrically connected to the first substrate10side via the inter-substrate conduction electrodes14tand the inter-substrate conduction material109. Consequently, a common potential LCCOM is applied to the common electrode21from the first substrate10side.

The electro-optical device100of the present embodiment is a transmission-type liquid crystal device. Accordingly, the pixel electrodes9aand the common electrode21are each formed of a light-transmitting conductive film such as an indium tin oxide (ITO) film and an indium zinc oxide (IZO) film. In such a transmission-type liquid crystal device, a light source light incident from the second substrate20side is modulated, before being emitted from the first substrate10, to display an image.

FIG.3is a circuit block diagram illustrating the electrical configuration of the first substrate10and the like illustrated inFIG.1. As illustrated inFIG.3, in the electro-optical device100, the first substrate10used in the electro-optical panel100includes, in a central region thereof, the display region10ain which a plurality of pixel circuits100aare arranged in a matrix pattern. Inside the display region10a, a plurality of scanning lines3aextending in the second direction X from the scanning line driving circuit104, and a plurality of data lines6aextending in the first direction Y from the data line driving circuit101are provided. The pixel circuits100aare formed corresponding to the intersections between the scanning lines3aand the data lines6a. The plurality of data lines6aare electrically connected to the inspection circuit105. The inspection circuit105is a transistor array, in which one of the sources/drains of the transistors are electrically connected to the data lines6a, the other of the sources/drains are electrically connected to an inspection line (not illustrated), and the gates are electrically connected to control signal wiring.

In each of the plurality of pixel circuits100a, a pixel transistor30including a field effect transistor or the like, and a pixel electrode9aelectrically connected to the pixel transistor30are provided. A data line6ais electrically connected to the source of the pixel transistor30. A scanning line3ais electrically connected to the gate of the pixel transistor30. The pixel electrode9ais electrically connected to the drain of the pixel transistor30. Image signals are supplied to the data line6a. Scanning signals are supplied to the scanning line3a.

In each of the pixel circuits100a, the pixel electrode9afaces the common electrode21of the second substrate20described above with reference toFIG.2via the electro-optical layer50to constitute a liquid crystal capacitor50a. A retention capacitor55disposed in parallel with the liquid crystal capacitor50ais added to each of the pixel circuits100ato prevent fluctuation of the image signal retained by the liquid crystal capacitor50a. In the present embodiment, capacitance lines8aextending across the plurality of pixel circuits100aare formed in the first substrate10to constitute retention capacitors55. The common potential LCCOM is supplied to the capacitance lines8a. The capacitance lines8aare provided so as to overlap at least one of the scanning lines3aand the data lines6a.FIG.3illustrates an aspect in which the capacitance lines8aoverlap both the scanning lines3aand the data lines6a. Although not illustrated, the capacitance lines8aare electrically connected to the common potential wiring6gillustrated inFIG.1.

1-3. Configuration of Wiring Substrate70and the Like

FIG.4is an explanatory view of a first electrostatic protection circuit81of a driving IC75illustrated inFIG.3. As illustrated inFIG.3, a wiring substrate70is connected to the terminals102of the first substrate10. In the plurality of terminals102, for example, terminals102g,102t,102s, a first terminal102a, a second terminal102c, and terminals102e,102f, and102hare arranged in this order from the first side10w1side toward the third side10w3side of the first substrate10. The terminal102gis a terminal102for supplying the common potential LCCOM. The terminal102tis a terminal for supplying a high level constant potential VDDY to the scanning line driving circuit104. The terminal102sis a terminal for supplying a low level constant potential VSSY to the scanning line driving circuit104. The terminals102eand102fare inspection terminals. The terminal102his a terminal for applying a constant potential to the dummy pixel electrodes9b.

The driving IC75that outputs an image signal VID or the like to the electro-optical panel100pis mounted on the wiring substrate70. The wiring substrate70is electrically connected to an upper circuit60via a connector61. The upper circuit60is provided with an image control circuit65that outputs image data DV or the like to the driving IC75. The upper circuit60is provided at an upper device of the electro-optical device100in an electronic apparatus to be described later. The wiring substrate70may be constituted by connecting a plurality of substrates.

In the first substrate10, a temperature-detecting circuit1including a temperature-detecting element11is formed outside the display region10a. Accordingly, the plurality of terminals102include the first terminal102aelectrically connected to first wiring La extending from the temperature-detecting circuit1, and the second terminal102celectrically connected to second wiring Lc extending from the temperature-detecting circuit1.

The upper circuit60is provided with a temperature detection driving circuit66that drives the temperature-detecting circuit1. Accordingly, the wiring substrate70is provided with third wiring71electrically connected to the first wiring La via the first terminal102a, and fourth wiring72electrically connected to the second wiring Lc via the second terminal102c.

An electrostatic protection circuit80is provided at the wiring substrate70. For the electrostatic protection circuit80, first electrostatic protection circuits81provided inside the driving IC75is used and, as will be described in Embodiment 2, a second electrostatic protection circuit82provided outside the driving IC75in the wiring substrate70is used.

In the present embodiment, the electrostatic protection circuit80is the first electrostatic protection circuits81provided inside the driving IC75, which are electrically connected to at least one of the third wiring71and the fourth wiring72. In the present embodiment, both the third wiring71and the fourth wiring72are electrically connected to the first electrostatic protection circuits81.

More specifically, the driving IC75overlaps the third wiring71in plan view, and the third wiring71is electrically connected to a terminal of the driving IC75. Furthermore, while the driving IC75does not overlap the fourth wiring72in plan view, the driving IC75overlaps wiring721branching off from the fourth wiring72in plan view. Accordingly, the fourth wiring72is electrically connected to a terminal of the driving IC75via the wiring721.

As schematically illustrated inFIG.4, the first electrostatic protection circuits81are connected to a plurality of terminals751of the driving IC75, respectively. In the present embodiment, a first electrostatic protection circuit81includes wiring752to which the ground potential GND is applied, wiring753to which a constant potential Vcc is applied, a diode Da connected in the reverse direction between the wiring752and the wiring753, and a diode Db connected in the reverse direction between the wiring752and the diode Da. The first electrostatic protection circuit81is electrically connected to a terminal751at a connecting site Dc between the diode Da and the diode Db.

The driving IC75is provided with a power clamper circuit755. The first electrostatic protection circuits81are electrically connected to the power clamper circuit755. Basically similar to the first electrostatic protection circuits81, the power clamper circuit755also limits the range of the output voltage to a range from the ground potential GND to the constant potential Vcc by diodes.

As illustrated inFIG.3, in the electro-optical panel100p, a first resistor unit R1is provided at the first wiring La, and a second resistor unit R2is provided as protective resistance in the second wiring Lc. Here, the resistance value of the first resistor unit R1is greater than the resistance value of the third wiring71, and the resistance value of the second resistor unit R2is greater than the resistance value of the fourth wiring72.

According to the electro-optical device100configured in this way, in a casein which the electro-optical device100is handled with the wiring substrate70connected to the electro-optical panel100p, even when static electricity invades the third wiring71and the fourth wiring72from the connector61side, the surge caused by static electricity can be released through the electrostatic protection circuit80provided at the wiring substrate70. More specifically, the surge caused by static electricity invading the third wiring71and the fourth wiring72can be released via the first electrostatic protection circuits81provided as the electrostatic protection circuit80in the driving IC75. Therefore, the temperature-detecting element11provided at the electro-optical panel100pcan be protected.

1-4. Configuration of Temperature-Detecting Circuit1and the Like

FIG.5is an explanatory view of the temperature-detecting circuit1illustrated inFIG.3. As illustrated inFIG.5, the temperature-detecting circuit1includes the temperature-detecting element11. The temperature-detecting element11includes, for example, a plurality of diodes D connected in series to each other.FIG.5illustrates an embodiment in which five diodes D are electrically connected in series to each other. Hereinafter, the five diodes D will be each referred to as the first diode D1, the second diode D2, the third diode D3, the fourth diode D4, and the fifth diode D5. The first wiring La extending from the first terminal102ais electrically connected to the anode11aof the fifth diode D5of the temperature-detecting element11. The second wiring Lc extending from the second terminal102cis electrically connected to the cathode11cof the first diode D1of the temperature-detecting element11.

Accordingly, when a temperature is detected with the electro-optical device100installed in the electronic apparatus, a minute forward driving current IF of approximately 10 nA to a few μA is supplied from the temperature detection driving circuit66via the wiring substrate70connected to the first substrate10, and to the five temperature-detecting elements11of the temperature-detecting circuit1via the first terminal102aand the second terminal102c. Here, the forward voltage of the temperature-detecting element11varies with an almost linear characteristic relative to the temperature. Consequently, when the voltage between the first terminal102aand the second terminal102cis detected, the temperature of the electro-optical panel100pcan be detected. At this time, the temperature-detecting element11is disposed in the vicinity of the display region10a, and thus the temperature-detecting element11can appropriately detect the temperature of the display region10a. Therefore, if the image signal is corrected or otherwise modified based on the temperature detected by the temperature-detecting circuit1, the electro-optical device100can be driven under appropriate conditions corresponding to the temperature of the display region10a, and thus a high quality image can be displayed.

Note that the temperature detection driving circuit66includes a constant current circuit661, and a stabilizing capacitor662between the constant current circuit661and the ground. The stabilizing capacitor662is electrically connected to wiring electrically connected to the first terminal102a, and wiring electrically connected to the second terminal102c. The stabilizing capacitor662stabilizes measured values of the output voltage VF. The capacitance of the stabilizing capacitor662is, for example, 0.1 μF.

In the temperature-detecting circuit1, the first resistor unit R1and the second resistor unit R2are provided as protective resistance in the first wiring La and the second wiring Lc, respectively. The temperature-detecting circuit1includes a third electrostatic protection circuit12for protecting the temperature-detecting element11. The third electrostatic protection circuit12includes a transistor Tr connected between the first wiring La and the second wiring Lc. The transistor Tr is electrically connected in parallel to the temperature-detecting element11. One of the source/drain of the transistor Tr is electrically connected to the first wiring La between the first terminal102aand the temperature detection element11. The other of the source/drain of the transistor Tr is electrically connected to the second wiring Lc between the second terminal102cand the temperature-detecting element11. In the present embodiment, similar to the pixel transistors30, the transistor Tr is formed of an N-channel type thin film transistor.

The third electrostatic protection circuit12includes a first capacitance element C1and a second capacitance element C2electrically connected in series to each other between the first wiring La and the second wiring Lc. More specifically, one end of the first capacitance element C1is electrically connected to the first wiring La, one end of the second capacitance element C2is electrically connected to the second wiring Lc, and the other end of the first capacitance element C1and the other end of the second capacitance element C2are electrically connected to each other.

In the third electrostatic protection circuit12, the connecting node Cn between the first capacitance element C1and the second capacitance element C2is electrically connected to the gate of the transistor Tr. The third electrostatic protection circuit12includes a third resistor unit R3electrically connected in parallel to the first capacitance element C1. More specifically, gate wiring Lg extending from the gate of the transistor Tr is electrically connected to the connecting node Cn between the first capacitance element C1and the second capacitance element C2, and is electrically connected to the second wiring Lc via the third resistor unit R3.

In the temperature-detecting circuit1, the first resistor unit R1is inserted into the first wiring La between the first terminal102aand the connecting position between the first wiring La and the first capacitance element C1, and the second resistor unit R2is inserted into the second wiring Lc between the second terminal102cand the connecting position between the second wiring Lc and the second capacitance element C2.

In the present embodiment, the size or the like of the circuit elements used in the temperature-detecting circuit1is as follows, for example. However, these are not limited to the following conditions.

Transistor Tr has a channel width W of 800 μm, and a channel length L of 5 μm.

The first capacitance element C1has a capacitance of 5 pF.

The second capacitance element C2has a capacitance of 5 pF.

The first resistor unit R1has a resistance value of 10 kΩ.

The second resistor unit R2has a resistance value of 10 kΩ.

The third resistor unit R3has a resistance value of 500 kΩ.

In the electro-optical device100configured in this way, when a surge current caused by static electricity invades from the first terminal102a, the third electrostatic protection circuit12protects the temperature-detecting element11from static electricity. More specifically, in the third electrostatic protection circuit12, the gate-source voltage of the transistor Tr is 0 V and the transistor Tr is off in a static state. In contrast, when a surge current caused by static electricity invades from the first terminal102a, the potential of the gate of the transistor Tr, which is the potential of the connecting node Cn between the first capacitance element C1and the second capacitance element C2, rises while voltage fluctuation is suppressed by the first resistor unit R1. This brings the transistor Tr into the ON state, and thus the surge current flows to the second terminal102cvia the transistor Tr and the second wiring Lc. At this time, the first resistor unit R1mitigates the surge current invading from the first terminal102a, and the second resistor unit R2mitigates the surge current invading from the second terminal102c. Furthermore, the period in which the transistor Tr is turned on is determined by the first capacitance element C1, the second capacitance element C2, the third resistor unit R3, the gate capacitance of and the transistor Tr, and the like. After discharging, the potential of the gate of the transistor Tr is returned to the OFF potential by the third resistor unit R3. Thus, the surge current flowing through the temperature-detecting element11is suppressed by the third electrostatic protection circuit12, and thus the temperature-detecting element11can be protected. Note that the first resistor unit R1and the second resistor unit R2cause a voltage drop of the temperature-detecting element11due to the driving current IF. However, the driving current IF is extremely small, and thus the impact of the voltage drop due to the first resistor unit R1and the second resistor unit R2is almost negligible.

1-5. Layout and the Like of Temperature-Detecting Circuit1and the Like

FIG.6is an explanatory view illustrating a planar configuration of the temperature-detecting circuit1and the like illustrated inFIG.5. Note thatFIG.6illustrates a case in which five diodes D are electrically connected in series to each other in the temperature-detecting element11. As illustrated inFIG.6, the first substrate10includes the scanning line driving circuit104disposed along the first direction Y between the display region10aand the first side10w1. The inter-substrate conduction electrode14tfor establishing conduction between the first substrate10and the second substrate20is provided between the scanning line driving circuit104and the second side10w2.

Furthermore, the first substrate10includes the data line driving circuit101disposed along the second direction X between the display region10aand the second side10w2. The plurality of data lines6aextend in the first direction Y from the data line driving circuit101, and are electrically connected to the pixel circuits100aof the display region10adescribed above with reference toFIG.3. Accordingly, the space between the data line driving circuit101and the display region10arepresents a wiring region103in which the plurality of data lines6aextend from the data line driving circuit101to the display region10a.

In the present embodiment, a selection circuit101athat constitutes a demultiplexer is provided at an end portion closest to the display region10aof the data line driving circuit101. The data lines6aextend along the first direction Y from the selection circuit101atoward the display region10a. The selection circuit101aincludes transistors30ethat control electrical connecting between the data lines6aand image signal wiring6j. In the present embodiment, the demultiplexer includes, for example, eight selection circuits101a. In such a data line driving circuit101, the image signal VID is supplied from the driving IC75illustrated inFIG.3via a terminal102and the image signal wiring6j. At this time, the transistors30eof the selection circuit101asupply the image signal VID to each of the data lines6ain a time division manner based on selection signals SEL1, SEL2, . . . , and SEL8supplied from the driving IC75via control signal wiring6i.

The temperature-detecting element11is provided at the first direction Y relative to the scanning line driving circuit104. More specifically, the temperature-detecting element11is disposed so as to be adjacent to the scanning line driving circuit104in the first direction Y between the scanning line driving circuit104and the second side10w2. Furthermore, the temperature-detecting element11is arranged so as to be adjacent to the data line driving circuit101or the wiring region103in the second direction X. In the present embodiment, the temperature-detecting element11is disposed so as to be adjacent to the wiring region103in the direction along the second direction X on the first side10w1side. Here, the plurality of diodes D constituting the temperature-detecting element11are arranged in a constant direction. In the present embodiment, the plurality of diodes D constituting the temperature-detecting element11are arranged in the second direction X. Accordingly, the dimension L11in the first direction Y of the temperature-detecting element11is smaller than the dimension L103in the first direction Y of the wiring region103.

According to such a configuration, the temperature-detecting element11can be disposed near the display region10a. Accordingly, the temperature of the electro-optical layer50of the display region10acan be appropriately detected. Furthermore, the temperature-detecting element11and wiring L0(the first wiring La and the second wiring Lc) electrically connected to the temperature-detecting element11can be separated from the scanning lines3a, and thus the impact of noise from the scanning lines3aon the wiring L0can be reduced. Therefore, the temperature-detecting element11has high detection accuracy.

In the present embodiment, as will be described below, the first wiring La and the second wiring Lc are collectively drawn around as the wiring line L0electrically connected to the third electrostatic protection circuit12. The first resistor unit R1and the second resistor unit R2are collectively disposed as a resistor unit R0electrically connected to the wiring L0. Note that in electrically connecting the first wiring La to the first terminal102aand electrically connecting the second wiring Lc to the second terminal102c, a multilayer wiring structure is utilized to cause the first wiring La and the second wiring Lc to intersect each other while ensuring insulation.

The entire third electrostatic protection circuit12is collectively disposed. Accordingly, the first capacitance element C1and the second capacitance element C2are collectively disposed as a capacitance element C0of the third electrostatic protection circuit12. The capacitance element C0, the transistor Tr, and the third resistor unit R3are collectively disposed.

More specifically, the third electrostatic protection circuit12is collectively disposed between an inter-substrate conduction electrode14tand the second side10w2. In the present embodiment, when viewed from a direction along the first direction Y, the third electrostatic protection circuit12is disposed at a position displaced from the inter-substrate conduction electrode14tto a side opposite to the first side10w1in the direction along the second direction X. When viewed from the direction along the second direction X, the third electrostatic protection circuit12is provided between the inter-substrate conduction electrode14tand the second side10w2. In the present embodiment, the capacitance element C0(the first capacitance element C1and the second capacitance element C2), the transistor Tr, and the third resistor unit R3that constitute the third electrostatic protection circuit12are disposed so as to be aligned in this order from the inter-substrate conduction electrode14tside toward the second side10w2side. Furthermore, in the capacitance element C0, the first capacitance element C1and the second capacitance element C2are disposed so as to be aligned in the direction along the second direction X.

In the present embodiment, the first capacitance element C1is disposed on the first side10w1side relative to the second capacitance element C2. Accordingly, the third electrostatic protection circuit12can be disposed within a narrow range in the second direction X, and thus the presence of the third electrostatic protection circuit12does not affect the layout of the wiring much.

In the transistor Tr, an integrally formed semiconductor layer is utilized to form a plurality of unit transistor elements Tr0. The plurality of unit transistor elements Tr0are electrically connected in parallel to each other to form the transistor Tr. Note thatFIG.6illustrates an aspect in which the plurality of unit transistor elements Tr0, which are four in total, are electrically connected in parallel to each other. However, the number of unit transistor elements Tr0electrically connected in parallel to each other is not limited to four.

In the wiring L0electrically connected to the third electrostatic protection circuit12, the resistor unit R0is also provided between the inter-substrate conduction electrode14tand the second side10w2. More specifically, the resistor unit R0is disposed between the third electrostatic protection circuit12and the first side10w1. In the present embodiment, the wiring L0includes the first wiring La and the second wiring Lc electrically connected to the temperature-detecting element11. The resistor unit R0includes the first resistor unit R1electrically connected to the first wiring La, and the second resistor unit R2electrically connected to the second wiring Lc. The first resistor unit R1and the second resistor unit R2are disposed so as to be aligned in the first direction Y between the third electrostatic protection circuit12and the first side10w1.

In this way, the third electrostatic protection circuit12is disposed between the inter-substrate conduction electrode14tand the second side. In the wiring line L0, the resistor unit R0is disposed between the third electrostatic protection circuit12and the first side10w1. Accordingly, the resistor unit R0can be disposed in a narrow range in the second direction X, and thus the presence of the resistor unit R0does not affect the layout of the wiring much. Furthermore, the resistor unit R0can be disposed, of the space that separates the resistor unit R0from the terminals102, in a free space near the first side10w1, and thus the presence of the resistor unit R0does not affect the layout of the wiring much. Therefore, it is possible to prevent increase in size of the electro-optical device100.

In the electro-optical device100configured in this way, the first substrate10includes first constant potential wiring6hextending in the first direction Y at a position adjacent to the temperature-detecting element11on the side opposite to the first side10w1. The first constant potential wiring6his, for example, constant potential wiring for supplying the common potential LCCOM to the dummy pixel electrodes9billustrated inFIG.2. The first substrate10includes inspection wiring6eand6fthat extend in the first direction Y between the first constant potential wiring6hand the temperature-detecting element11and that reach the inspection circuit105. In the present embodiment, the first constant potential wiring6hextends in the second direction X between the data line driving circuit101and the third electrostatic protection circuit12, and between the wiring region103and the temperature-detecting element11.

The first substrate10includes second constant potential wiring6sextending in the second direction X between the temperature-detecting element11and the scanning line driving circuit104. The second constant potential wiring6sis constant potential wiring for supplying the low level constant potential VSSY to the scanning line driving circuit104. After passing between the first resistor unit R1and the first side10w1from the terminal102s, the second constant potential wiring6sextends in the second direction X between the temperature-detecting element11and the scanning line driving circuit104, and further extends in the first direction Y toward the scanning line driving circuit104. Accordingly, the first constant potential wiring6hand the second constant potential wiring6scan be utilized as shields, and thus the temperature-detecting element11is less susceptible to noise from signal lines such as data lines6aand the like.

Note that constant potential wiring6tthat supplies the high level constant potential VDDY to the scanning line driving circuit104and common potential wiring6gthat supplies the constant potential LCCOM to the inter-substrate conduction electrode14tare provided at the first side10w1side of the second constant potential wiring6s. The common potential wiring6gis electrically connected to the capacitance lines8aby the multilayer wiring structure. Capacitance lines8aare also used outside the display region10aas wiring having a relatively wide width to block light or as a shield.

FIG.7is a plan view schematically illustrating a planar configuration of the temperature-detecting elements illustrated inFIG.5.FIG.8is a cross-sectional view schematically illustrating a cross section of the temperature-detecting elements illustrated inFIG.7.FIG.8corresponds to a cross section taken along the line A1-A1′ inFIG.7.FIGS.7and8illustrate a case in which six diodes D are electrically connected in series to each other in the temperature-detecting element11. Note that inFIGS.7and8, of the N-type regions and the P-type regions provided at a semiconductor layer31hthat constitute the temperature-detecting element11, one corresponds to first impurity regions of a first conductivity type, and the other corresponds to second impurity regions of a second conductivity type. In the present embodiment, of the N-type regions and the P-type regions provided at the semiconductor layer31h, the N-type regions correspond to the first impurity regions, and the P-type regions correspond to the second impurity regions. Furthermore, inFIG.8, illustration of a layer or the like on the upper layer side of the temperature-detecting element11formed in the first substrate10is omitted to the extent that such omission does not affect the description.

In the present embodiment, in forming the temperature-detecting element11illustrated inFIG.5, a plurality of semiconductor layers31hseparated from each other in an island shape are arranged in a constant direction as illustrated inFIGS.7and8. The plurality of semiconductor layers31hare used to form diodes D. In the present embodiment, six semiconductor layers31h1to31h6are arranged in the second direction X as a constant direction, and the six semiconductor layers31hare used to form six diodes D.

More specifically, in each of the six semiconductor layers31h, N-type regions and P-type regions are disposed aligned in the second direction X. In the present embodiment, the N-type regions include high concentration N-type regions31n1and low concentration N-type regions31n2, and the P-type regions include high concentration P-type regions31p1and low concentration P-type regions31p2. The connecting portion between a low concentration N-type region31n2and a low concentration P-type region31p2constitutes a PN junction surface. Note that the configuration of the junction surface is not limited to this configuration.

In this way, the plurality of semiconductor layers31hare arranged so as to be aligned in the second direction X, and thus even when the number of diodes D electrically connected in series to each other is to be increased, space constraints are not likely to be an issue. Furthermore, the plurality of semiconductor layers31hare arranged so as to be aligned in the second direction X, and thus the dimension L11in the first direction Y of the temperature-detecting element11can be smaller than the dimension L103in the first direction Y of the wiring region103. Therefore, the entire temperature-detecting element11can be disposed near the display region10a.

Relay electrodes6bthat electrically connect the diodes D are formed in an upper layer of an insulating film45. In the present embodiment, the five relay electrodes6b1to6b5are each electrically connected to a high concentration P-type region31p1of a semiconductor layer31hand a high concentration N-type region31n1of an adjacent semiconductor layer31hvia contact holes45pand45nthat penetrate a gate insulating film32and insulating films42,43,44, and45. Furthermore, of the semiconductor layers31h, the two semiconductor layers31hlocated at both ends are electrically connected to the first wiring La and the second wiring Lc, respectively, via the contact holes45pand45nthat penetrate the gate insulating film32and the insulating films42,43,44, and45.

In the present embodiment, the first wiring La includes a first connecting portion La1extending in the first direction Y, and a first extending portion La2extending in the second direction X from an end portion of the first connecting portion La1. The first connecting portion La1is electrically connected to one electrode of the temperature-detecting element11. The second wiring Lc includes a second connecting portion Lc1extending in the first direction Y, and a second extending portion Lc2extending in the second direction X from the second connecting portion Lc1. The second connecting portion Lc1is electrically connected to the other electrode of the temperature-detecting element11. In the present embodiment, one electrode of the temperature-detecting element11is the anode11a, and the other electrode of the temperature-detecting element11is the cathode11c.

The first wiring La, the second wiring Lc, and the relay electrodes6bare wiring formed in the same layer as the data lines6a, as are the first constant potential wiring6h, the second constant potential wiring6s, the constant potential wiring6i, the common potential wiring6g, the control signal wiring6i, and the image signal wiring6jillustrated inFIG.6. The first wiring La, the second wiring Lc, and the relay electrodes6bare low resistance wiring mainly composed of aluminum.

In the temperature-detecting element11, the plurality of semiconductor layers31hinclude N-type regions and P-type regions between, of the plurality of relay electrodes6b, a relay electrode6badjacent to the first connecting portion La1and the first connecting portion La1, and include N-type regions and P-type regions between, of the plurality of relay electrodes6b, a relay electrode6badjacent to the second connecting portion Lc1and the second connecting portion Lc1. Furthermore, the plurality of semiconductor layers31hinclude N-type regions and P-type regions between, of the plurality of relay electrodes6b, two relay electrodes6badjacent to each other. That is, the relay electrodes6bhave a narrow width in the second direction X. Accordingly, the parasitic capacitance between the relay electrodes6band a noise source is small.

FIG.9is an explanatory view of the electro-optical device100according to Embodiment 2 of the present disclosure. The basic configuration of the present embodiment is similar to that of Embodiment 1. Thus, the common components are denoted by the same reference signs, with description thereof being omitted. As illustrated inFIG.9, in the present embodiment as well, the wiring substrate70is provided with the electrostatic protection circuit80as in Embodiment 1. In the present embodiment, the first electrostatic protection circuits81provided inside the driving IC75, and the second electrostatic protection circuit82provided outside the driving IC75in the wiring substrate70are used as the electrostatic protection circuit80.

As in Embodiment 1, the first electrostatic protection circuits81have the configuration described above with reference toFIG.4. In the present embodiment, the second electrostatic protection circuit82is a capacitance element provided at the wiring substrate70. Both the third wiring71and the fourth wiring72are electrically connected to the second electrostatic protection circuit82. More specifically, the capacitance element used in the second electrostatic protection circuit82is disposed between the third wiring71and the fourth wiring72on the connector61side of the driving IC75. Furthermore, one end of the capacitance element used in the second electrostatic protection circuit82is electrically connected to the third wiring71, and the other end of the capacitance element is electrically connected to the fourth wiring72.

Furthermore, in the electro-optical panel100p, the resistance value of the first resistor unit R1connected to the first wiring La is greater than the resistance value of the third wiring71, and the resistance value of the second resistor unit R2connected to the second wiring Lc is greater than the resistance value of the fourth wiring72.

According to the electro-optical device100configured in this way, in a casein which the electro-optical device100is handled with the wiring substrate70connected to the electro-optical panel100p, when static electricity invades the third wiring71and the fourth wiring72from the connector61side, the surge caused by static electricity can be mitigated by the first electrostatic protection circuits81and the second electrostatic protection circuit82provided at the wiring substrate70. Therefore, the temperature-detecting element11provided at the electro-optical panel100pcan be protected.

FIG.10is an explanatory view of the electro-optical device100according to Embodiment 3 of the present disclosure. The basic configuration of the present embodiment is similar to that of Embodiment 1. Thus, the common components are denoted by the same reference signs, with description thereof being omitted. As illustrated inFIG.10, in the present embodiment as well, the wiring substrate70is provided with the electrostatic protection circuit80as in Embodiment 1. In the present embodiment, the driving IC75overlaps neither the third wiring71nor the fourth wiring72in plan view. Accordingly, the electrostatic protection circuit80is the second electrostatic protection circuit82provided outside the driving IC75in the wiring substrate70. The second electrostatic protection circuit82is a capacitance element provided at the wiring substrate70as in Embodiment 2. One end of the capacitance element is electrically connected to the third wiring71, and the other end of the capacitance element is electrically connected to the fourth wiring72.

Furthermore, in the electro-optical panel100p, the resistance value of the first resistor unit R1connected to the first wiring La is greater than the resistance value of the third wiring71, and the resistance value of the second resistor unit R2connected to the second wiring Lc is greater than the resistance value of the fourth wiring72.

According to the electro-optical device100configured in this way, in a casein which the electro-optical device100is handled with the wiring substrate70connected to the electro-optical panel100p, when static electricity invades the third wiring71and the fourth wiring72from the connector61side, the surge caused by static electricity can be mitigated by the second electrostatic protection circuit82provided at the wiring substrate70. Therefore, the temperature-detecting element11provided at the electro-optical panel100pcan be protected.

Furthermore, the driving IC75overlaps neither the third wiring71nor the fourth wiring72in plan view, and thus the driving IC75that is a high-speed signal source is less likely to become a noise source for the third wiring71and the fourth wiring72.

FIG.11is an explanatory view of the electro-optical device100according to Embodiment 4 of the present disclosure. The basic configuration of the present embodiment is similar to that of Embodiment 1. Thus, the common components are denoted by the same reference signs, with description thereof being omitted. InFIG.14, in the present embodiment, the wiring substrate70is provided with no electrostatic protection circuit80. However, the driving IC75overlaps neither the third wiring71nor the fourth wiring72in plan view, and thus the driving IC75that is a high-speed signal source is less likely to become a noise source for the third wiring71and the fourth wiring72.

FIG.12is an explanatory view of the electro-optical device100according to Embodiment 5 of the present disclosure. Note that the basic configuration of the present embodiment is similar to that of Embodiment 1. Thus, the common components are denoted by the same reference signs, with description thereof being omitted. In Embodiment 1, in the data line driving circuit101, the control signal wiring6iextending in the second direction X is disposed in parallel with each other in the first direction Y. However, as illustrated inFIG.12, the present disclosure may be applied to an electro-optical device100in which the image signal wiring6jextending in the second direction X is disposed in parallel with each other in the first direction Y.

6. OTHER EMBODIMENTS OF ELECTRO-OPTICAL DEVICE

In the present disclosure, the electro-optical device100is not limited to liquid crystal devices. The present disclosure may be applied to electro-optical devices100other than liquid crystal devices, such as organic electroluminescence devices.

7. CONFIGURATION EXAMPLE OF ELECTRONIC APPARATUS

FIG.13is a block diagram illustrating a configuration example of a projection-type display device1000to which the present disclosure is applied.FIG.14is an explanatory view of an optical path-shifting element110illustrated inFIG.13. Note that inFIG.13, illustration of polarizing plates and the like is omitted. The projection-type display device1000illustrated inFIG.13is an example of an electronic apparatus to which the present disclosure is applied. The projection-type display device1000includes an illumination device190, a separation optical system170, three electro-optical devices100R,100G, and100B, and a projection optical system160. The electro-optical devices100R,100G, and100B each includes an electro-optical device100described above with reference toFIGS.1to12.

The illumination device190is a white light source, and a laser light source or a halogen lamp is used therefor, for example. The separation optical system170includes three mirrors171,172, and175, as well as dichroic mirrors173and174. The separation optical system170separates white light emitted from the illumination device190into three primary colors of red (R), green (G), and blue (B). Specifically, the dichroic mirror174transmits light of the wavelength region of red (R), and reflects light of the wavelength regions of green (G) and blue (B). The dichroic mirror173transmits light of the wavelength region of blue (B), and reflects light of the wavelength region of green (G). Light corresponding to red (R), green (G), and blue (B) is guided to the electro-optical devices100R,100G, and100B, respectively.

Light modulated by the electro-optical devices100R,100G, and100B is incident on a dichroic prism161from three directions. The dichroic prism161constitutes a synthesis optical system in which images of red (R), green (G), and blue (B) are synthesized. Accordingly, a projection lens system162can magnify and project a synthesized image emitted from the optical path-shifting element110to a projection member such as a screen180to display a color image on the projection member such as the screen180.

At this time, a control unit150can correct image signals supplied to the electro-optical devices100R,100G, and100B based on temperature detection results of the temperature-detecting circuit1. Therefore, even when the environmental temperature or the like fluctuates, a high quality projection image can be displayed. Furthermore, when a configuration is employed in which a technology of providing the optical path-shifting element110indicated by a dot-dash line in the projection optical system160on the light emission side of the dichroic prism161and shifting the position at which a projected pixel is visually recognized every predetermined period is used to enhance resolution, it becomes necessary to drive the liquid crystal layer at high speed. Even in this case, employing a configuration in which image signals supplied to the electro-optical devices100R,100G, and100B are corrected based on temperature detection results of the temperature-detecting circuit1or a configuration in which the temperature of the electro-optical panels100pof the electro-optical devices100R,100G, and100B is adjusted based on temperature detection results of the temperature-detecting circuit1can drive the electro-optical layer50including a liquid crystal layer at high speed.

As illustrated inFIG.14, the optical path-shifting element110is an optical element that shifts the light emitted from the dichroic prism161in a preset direction.FIG.14illustrates a state in which the position of a projected pixel Pi, at which the light emitted from each of the pixel circuits100aof the electro-optical panel100pis visually recognized, is shifted to one side X1in the X direction by a distance corresponding to 0.5 pixel pitch (which is equal to P/2), and to one side Y1in the Y direction by a distance corresponding to 0.5 pixel pitch (which is equal to P/2) by the optical path-shifting element110. The optical path-shifting element110includes a light-transmitting plate. Under the command of the control unit150, an actuator causes the light-transmitting plate to swing about one or both of an axial line extending in the Y direction or an axial line extending in the X direction, thereby shifting the optical path of the light emitted from each of the pixel circuits100aof the electro-optical panel100pto an optical path LA and an optical path LB.

8. OTHER EMBODIMENTS OF ELECTRONIC APPARATUS

A projection-type display apparatus may be configured to use an LED light source or the like that emits light of various colors as a light source unit, and supply each colored light emitted from such an LED light source to another liquid crystal device.

Electronic apparatuses including the electro-optical device100to which the present disclosure is applied are not limited to the projection-type display device1000of the above-described embodiment. For example, the electro-optical device100to which the present disclosure is applied may be used in electronic apparatuses such as a headup display (HUD), a head-mounted display (HMD), a personal computer, a digital still camera, and a liquid crystal television.