In a full-wave rectifier circuit, a sinusoidal signal is applied to a differential amplifier, first and second current mirror circuits obtain outputs from the differential amplifier which are opposite in phase to each other. Outputs of the first and second current mirror circuits are applied respectively to the input and output sides of a third mirror circuit and other outputs of the first and second current mirror circuits are applied respectively to the input and output sides of a fourth mirror circuit. The connecting point of the first and fourth current mirror circuits is connected to the base of a first emitter-follower-connected transistor, while the connecting point of the second and third current mirror circuits is connected to the base of a second emitter-follower-connected transistor. The connecting points are connected to a current source circuit. The first and second emitter-follower-connected transistors have their emitters connected together, to provide a full-wave-rectified output.

BACKGROUND OF THE INVENTION 
This invention relates to a full-wave rectifying circuit which can be 
readily provided in the form of a semiconductor integrated circuit, and 
more particularly to an improvement of a conventional full-wave rectifier 
circuit. 
A conventional full-wave rectifier circuit is as shown in FIG. 1. A sine 
wave signal is applied through a terminal 1 to an amplifier 2, the output 
of which is applied through a capacitor 8 to a diode 10, so that positive 
half-cycles of the signal are outputted. On the other hand, the sine wave 
signal is applied through an inverter 3 and a capacitor 9 to another diode 
11, where it is rectified, so that negative half-cycles of the signal are 
outputted. These two outputs are combined together, thus providing a 
full-wave rectification output which is smoothed by a smoothing capacitor 
13 connected to an output terminal 12. 
In the full-wave rectifier circuit, the capacitors 8 and 9 are used to 
remove DC components. However, it should be noted that it is difficult to 
integrate the capacitors 8 and 9 in a semiconductor integrated circuit, 
and accordingly it is necessary to externally connect the capacitors 8 and 
9 to the semiconductor integrated circuit. In order to connect the 
capacitors 8 and 9 to a package including the semiconductor integrated 
circuit, it is necessary to provide four terminal pins 4 through 7 as 
shown in FIG. 1. This is not desirable for forming a semiconductor 
integrated circuit and increases the number of components. 
SUMMARY OF THE INVENTION 
Accordingly, an object of this invention is to provide a full-wave 
rectifier circuit which can be readily provided in the form of a 
semiconductor integrated circuit. 
Another object of the invention is to provide a full-wave rectifier circuit 
in which the capacitors employed in a conventional full-wave rectifier 
circuit are eliminated, i.e., the number of components is reduced. 
A further object of the invention is to provide a full-wave rectifier 
circuit in which the number of terminal pins of a package including a 
semiconductor integrated circuit is decreased. 
A still further object of the invention is to provide a full-wave rectifier 
circuit which has less voltage loss and performs rectification efficiently 
with low supply voltage. 
The foregoing objects and other objects as well as the characteristic 
features of the invention will become more apparent from the following 
detailed description and the appended claims when read in conjunction with 
the accompanying drawings.

DETAILED DESCRIPTION OF THE INVENTION 
A first example of a full-wave rectifier circuit according to the 
invention, as shown in FIG. 2, comprises: a differential amplifier circuit 
17 having a differential pair of transistors Q.sub.1 and Q.sub.2, a 
current source circuit 16 and diode-connected transistors Q.sub.3 and 
Q.sub.7. The transistor Q.sub.3 together with transistors Q.sub.4, Q.sub.5 
and Q.sub.6 forms a current mirror circuit 19, while the transistor 
Q.sub.7 together with transistors Q.sub.8, Q.sub.9 and Q.sub.10 forms a 
current mirror circuit 20. The collector of the transistor Q.sub.4 in the 
current mirror circuit 19 is connected to the anode of a diode-connected 
transistor Q.sub.11, while the collector of the transistor Q.sub.8 in the 
current mirror circuit 20 is connected to the collector of a transistor 
Q.sub.12, the transistors Q.sub.11 and Q.sub.12 forming a current mirror 
circuit. The base of the transistor Q.sub.1 is connected to the connecting 
point of resistors R.sub.1 and R.sub.2. The other terminal of the resistor 
R.sub.1 is connected to the common connecting point of the collectors of 
the transistors Q.sub.8 and Q.sub.12, while the other terminal of the 
resistor R.sub.2 is grounded through a capacitor C.sub.1. These resistors 
R.sub.1 and R.sub.2 are feedback resistors for gain control. 
Further in FIG. 2, transistors Q.sub.13 and Q.sub.14 form a current mirror 
circuit 21. The transistor Q.sub.13 is diode-connected. The anode of the 
transistor Q.sub.13 is connected to the collector of the transistor 
Q.sub.5 in the current mirror circuit 19, while the collector of the 
transistor Q.sub.14 is connected to the collector of the transistor 
Q.sub.9 in the current mirror circuit 20. The collector of transistor 
Q.sub.5 is connected to a biased side of circuit 21, while the collector 
of transistor Q.sub.9 is connected to an output side of circuit 22. 
Similarly, transistors Q.sub.15 and Q.sub.16 form a current mirror circuit 
22. The transistor Q.sub.15 is diode-connected. The anode of the 
transistor Q.sub.15 is connected to the collector of the transistor 
Q.sub.10 in the current mirror circuit 20, while the collector of the 
transistor Q.sub.16 is connected to the collector of the transistor 
Q.sub.6 in the current mirror circuit 19. The collector of Q.sub.10 is 
connected to a biased side of circuit 22, while the collector of 
transistor Q.sub.6 is connected to an output side of circuit 22. 
The common connecting point P.sub.1 of the transistors Q.sub.9 and Q.sub.14 
is connected to the base of an emitter-follower-connected transistor 
Q.sub.17, while the common connecting point P.sub.2 of the transistors 
Q.sub.6 and Q.sub.16 is connected to the base of an 
emitter-follower-connected transistor Q.sub.18. The collectors of the 
transistors Q.sub.17 and Q.sub.18 are connected together and further 
connected to a terminal 15, while the emitters thereof are connected 
together and are grounded through a resistor R.sub.5 and a capacitor 
C.sub.2. The points P.sub.1 and P.sub.2 are connected respectively through 
resistors R.sub.3 and R.sub.4 to a reference voltage source 18, thus 
forming a current source circuit. The terminal 15 is connected to a 
voltage source Vcc. One terminal of the capacitor C.sub.2 is grounded 
through a terminal 14, and the other terminal 12 which is connected to the 
resistor R.sub.5 provides an output which has been subjected to full-wave 
rectification and has been smoothed. 
The operation of the full-wave rectifying circuit thus organized will be 
described. 
A sine wave signal .DELTA.I superposed on a DC voltage is applied to the 
input terminal 1, and output currents opposite in phase flow in the 
current mirror circuits 19 and 20. When a positive half-cycle of the 
signal is inputted, a current (I.sub.0 -.DELTA.I) flows in the transistors 
Q.sub.4, Q.sub.5 and Q.sub.6 in the current mirror circuit 19 (where 
I.sub.0 is the DC component), while a current (I.sub.0 +.DELTA.I) flows in 
the transistors Q.sub.8, Q.sub.9 and Q.sub.10 of the current mirror 
circuit 20. The differential outputs of the current mirror circuits 19 and 
20 are applied to the current mirror circuits 21 and 22 respectively, with 
the differential outputs being single-ended. 
In the current mirror circuit 21, the current (I.sub.0 -.DELTA.I) flows in 
the diode-connected transistor Q.sub.13, and the current through the 
collector of the transistor Q.sub.9 is (I.sub.0 +.DELTA.I). Accordingly, a 
current (I.sub.0 -.DELTA.I) tends to flow as the collector current of the 
transistor Q.sub.14, and therefore a current (2.DELTA.I) flows as the base 
current of the transistor Q.sub.17. As a result, the transistor Q.sub.17 
is rendered conductive, and a current flows in the resistor R.sub.5 and is 
smoothed by the capacitor C.sub.2. 
On the other hand, in the current mirror circuit 22, the current (I.sub.0 
+.DELTA.I) flows in the transistor Q.sub.15. Therefore, a current (I.sub.0 
+.DELTA.I) tends to flow as the collector current of the transistor 
Q.sub.16 ; however, since only the current (I.sub.0 -.DELTA.I) is supplied 
from the current mirror circuit 19 thereto, a current (2.DELTA.I) is 
supplied through the resistor R.sub.4. In operation, the transistor 
Q.sub.18 remains non-conductive. When the next half-cycle (or the negative 
half-cycle) is applied to the input terminal 1, the transistor Q.sub.17 is 
rendered non-conductive, and the gain of the transistor Q.sub.18 is 
increased. Thus, the sine wave signal .DELTA.I is subjected to full-wave 
rectification by the alternate operation of the transistors Q.sub.17 and 
Q.sub.18 in the output stage. Alternatively, with small currents supplied 
through the resistors R.sub.3 and R.sub.4 to the transistors Q.sub.17 and 
Q.sub.18, the gain of the transistor Q.sub.17 increases while the gain of 
transistor Q.sub.18 decreases in positive half-cycles, and the gain of the 
transistor Q.sub.17 decreases while the gain of the transistor Q.sub.18 
increases in negative half-cycles. In other words, the operating points of 
the transistors Q.sub.17 and Q.sub.18 may be so selected that, under the 
condition that small base currents are applied to the transistors Q.sub.17 
and Q.sub.18, the gains are maintained higher than predetermined levels. 
A second example of the full-wave rectifier circuit according to the 
invention is as shown in FIG. 3. The second example is similar to the 
first example except that the current mirror circuits 19' and 20' which 
are the active load circuits of the differential amplifier 17 in FIG. 2 
are made up of multi-collector transistors Q.sub.20 and Q.sub.21. 
A third example of the circuit of the invention is as shown in FIG. 4. In 
the third example, the current mirror circuits 21' and 22' additionally 
include transistors Q.sub.25 and Q.sub.24, thus being higher in accuracy, 
and a current source circuit 23 is provided. Furthermore, another current 
source circuit 24 is connected to a clipping circuit 25 made up of 
transistors Q.sub.26, Q.sub.27 and Q.sub.28, so as to protect the 
transistors Q.sub.17 and Q.sub.18. The other arrangement is similar to 
that in FIG. 3. 
As is apparent from the above description, the full-wave rectifier circuit 
of the invention eliminates the coupling capacitors of the conventional 
circuit. Therefore, the circuit of the invention can be readily provided 
in the form of an integrated circuit and the number of components is 
decreased, which contributes to reduction of the manufacturing cost. 
Furthermore, in the full-wave rectifier circuit of the invention, it is 
unnecessary to provide four terminal pins which are essential for 
provision of the coupling capacitors in the conventional circuit. In 
addition, in the full-wave rectifier circuit of the invention, unlike the 
conventional one, it is unnecessary to rectify an input signal with 
diodes, and therefore the input signal is less in the loss of voltage. 
Accordingly, the rectification output can be provided efficiently even 
with a low voltage of several volts. Furthermore, in the full-wave 
rectifier circuit of the invention, the detection efficiency can be 
readily controlled by varying the resistances of the resistors R.sub.3 and 
R.sub.5.