Variable on-time control method for high light-load efficiency, small output voltage ripple, and audible-noise-free operation

An apparatus and method of controlling power converters is achieved that produces high light-load efficiency and reduced output voltage ripple while maintaining quiet operation that is free from audible noise. The inventive method includes a variable on-time control circuit that is applicable to a wide variety of switching mode converters, including, but not limited to, boost converters, buck converters, buck-boost converters, single-ended primary inductor (SEPIC) converters, and other converter topologies, both isolated and non-isolated.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The invention relates generally to the field of switching power converters, and more particularly, to control methods that enable power converters to achieve reduced output voltage ripple and high light-load efficiency while maintaining quiet operation, free from audible noise.

2. Description of Related Art

A switching power converter control system, typical of the prior art, can be characterized as constant on-time control.FIG. 1is a simplified schematic of a boost converter employing constant on-time control. Vinis the input voltage102, and Vois the output voltage112. The input inductor104has an equivalent series resistance (ESR) of RL, represented by resistor106. Under the constant on-time control method, the MOSFET108is turned on for a duration Ton, and then turned off for a duration Toffthat is determined by a feedback voltage that is developed by the resistive divider formed by resistor116and resistor118. This feedback voltage126is routed to comparator122, where it is compared with reference voltage120. When the feedback voltage126is less than the reference voltage120, flip flop124turns MOSFET108on for a time duration Ton. When the feedback voltage126rises above reference voltage120, the MOSFET108is switched off. For a given load and given values of Vinand Vo, the circuit operates in a steady state mode with frequency fsand period Ts, where fs=1/Tsand Ton=D*Ts, where D is a duty cycle ratio less than one. For an input inductor104having a value of L and a change in inductor current at MOSFET108turn on of diL, the governing equation of the boost converter can be written as:
Vin*Ton=L*diL=(Vo−Vin)*Toff.

In steady state operation, when the boost converter operates in continuous conduction mode (CCM), Ton+Toff=T. However, in discontinuous conduction mode (DCM), Ton+Toff<Ts. From the equation above, it can be seen that for a given Vinand L, if Tonis fixed, diLwill take on a fixed value. If the load current is reduced and the circuit enters DCM operation, the Tofftime will increase in order to maintain the regulation of the output voltage Vo112. When the load current is further reduced, the operating frequency of the circuit will decrease, reducing switching losses and improving efficiency under light load. When the load current approaches zero, the boost circuit under constant on-time control may maintain switching at a low frequency such as 5 kHz, or it may enter a hiccup mode, also known as a burst mode. When a regulator enters burst mode, it may produce audible noise and exhibit increased output voltage ripple.

As an alternative to constant on-time control, some systems of the prior art use a constant off-time control mode in conjunction with burst mode operation. In such systems, a fixed delay circuit maintains a constant Tofftime, while the on time changes as a function of the input and output voltages and the load. In either the constant-on-time or constant-off-time control systems, the typical inductor-current and output-voltage waveforms are pulsed, which improves efficiency, but has the drawback of increased output ripple and audible output noise.FIG. 2illustrates the typical operation of a system using constant-off-time control that has entered burst mode due to a large drop in output load current. Time is plotted along horizontal axis210. In this exemplary plot, the timescale is ten microseconds per division. The lower waveform202illustrates the output voltage, with the vertical axis212corresponding to one hundred millivolts per division. The upper trace204is the inductor current, plotted at 0.2 Amperes per division. Burst mode operation can be seen in both the current and voltage traces, for example at206. This voltage ripple at the output and audible noise that may be produced may both be disadvantageous in many applications. Accordingly, it would be useful to produce a system that would remain free from such noise even under very low output-load current conditions.

SUMMARY OF THE INVENTION

An apparatus and method of controlling power converters is achieved that produces high light-load efficiency and reduced output voltage ripple while maintaining quiet operation that is free from audible noise. The inventive method is applicable to a wide variety of switching mode converters, including, but not limited to, boost converters, buck converters, buck-boost converters, single-ended primary inductor (SEPIC) converters, and other converter topologies, both isolated and non-isolated.

An embodiment of a variable on-time control system in accordance with the present invention is coupled with a switching power converter. A switching power converter receives an input voltage and outputs a load current at an output voltage. A primary switching element, such as a MOSFET, is responsible for synthesizing the output voltage, which is controlled by a feedback loop that adjusts the duty cycle of a pulse width modulator that drives the primary switching element.

An embodiment of the present invention provides a primary feedback circuit that includes a charge storage device, such as a capacitor, connected to a current source, which may be a resistor in series with the input voltage of the power converter. A bypass switch is provided in parallel with the charge storage device such that when the bypass switch is opened, the capacitor is charged by the current source. The voltage developed on the charge storage device is compared to a reference voltage using a differential amplifier or comparator. The output of the differential amplifier or comparator is used to turn off the primary switching element of the switching power converter once the voltage of the charge storage device exceeds the reference voltage.

However, the primary switching element can be turned off later or earlier than would be expected by the addition of one or more variable control circuits connected to the current source. A first variable control circuit adjusts the on time of the primary switching element in accordance with the load current and the output voltage of the switching power converter. A current sense voltage proportional to the bad current is scaled and compared in a differential amplifier with a scaled version of the power converter output voltage. The output of the differential amplifier is used to drive a transconductance amplifier, which may be a MOSFET, that is connected to the current source. Thus, as the load current increases, the transconductance amplifier shunts an increasing amount of current from the current source, slowing the charging rate of the charge storage device, and prolonging the time that the primary switching element stays on.

A second variable control element includes a second transconductance amplifier that is similarly connected to the current source but that has an input connected to the output voltage of the switching power converter. Thus, as the output voltage increases, the amount of current from the current source that is shunted through the second transconductance amplifier increases, and the charge rate of the charge storage device decreases, increasing the on time of the primary switching element.

It is preferable to include both the first and the second variable control elements in a switching power converter system in accordance with the present invention. However, systems that include only one of the above-described variable control elements would also fall within the scope and spirit of the present invention.

A minimum off-time circuit may further be added to the system in accordance with another embodiment of the present invention. The minimum off-time circuit includes a second charge storage device that is charged by a second current source, which may similarly be a resistor in series with the input voltage of the switching power converter. A bypass switch is disposed in parallel with the second charge storage device such that the second charge storage device charges through the current source when the bypass switch is opened. The voltage of the charge storage device is compared to a reference voltage. The output of the comparison circuit is used to hold the primary switching element of the power converter in the off state until the comparison circuit changes state, indicating that the voltage of the second charge storage device exceeds the reference voltage. This circuit thus ensures that the main switching element remains off for a minimum time period.

The variable on-time control system thus described maintains a relatively high switching frequency above the audible limit of about 25 kHz, although the precise value of this frequency limit could be adjusted or redefined. It also operates to reduce output voltage ripple and maintain high efficiency. Those skilled in the art will realize other applications and benefits of the invention described herein by a study of the detailed description below and the attached drawings, which will first be described briefly. Reference designators that appear in more than one drawing refer to common elements that appear in more than one drawing.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

The present invention relates to an apparatus and method for controlling a switching converter to achieve high light-load efficiency while maintaining quiet operation free from audible noise. Output voltage ripple is also greatly reduced. The inventive method is applicable to a wide variety of power converter architectures, including boost, buck, buck-boost, SEPIC, and other topologies, both isolated and non-isolated.

FIG. 3is a conceptual circuit diagram illustrating a method of variable on-time control of a boost converter in accordance with an embodiment of the present invention. A boost converter similar to that ofFIG. 1is shown with an additional control block302that provides the ability to control the on-time of MOSFET108in a variable manner. In such a boost converter, the governing equation provides two possible ways in which the on-time-control block302may be used to provide variable on-time control. Manipulating the boost converter equation presented earlier, we can express the following relationship:
Ton=(L/Vin)*diL

This relationship shows that the on-time is linearly related to diL.FIG. 4is a circuit diagram of a boost converter in accordance with an embodiment of the present invention that measures inductor current in order to control the switching FET on time. Input voltage402is applied through input inductor404having an ESR represented by resistor406. MOSFET408is switched between an on and an off state by gate control input412in order to produce an output voltage410. Sense resistor Rs416is placed in the current path of the MOSFET408. Sense voltage414thus provides an indication of inductor current, which can be used to control on time. In particular, sense voltage414is equal to the inductor current multiplied by Rs, and this can be used as a voltage threshold in the circuit controlling the switching state of the MOSFET408. For example, inFIG. 3, the comparator122driving the flip flop124could be driven with sense voltage414as one input to create a variable on-time that is dependent on the inductor current.

FIG. 5depicts an exemplary switching converter control system that achieves variable on-time control in accordance with an embodiment of the present invention. Referring back toFIG. 4, the output current Iosourced to the load via tap410is sensed by voltage VAindicated at tap point418. The on-time can be controlled by monitoring input voltage VIN402, output voltage VOUT410, sense voltage VA418, and the feedback voltage FB420.FIG. 5illustrates how these signals are used to produce variable on-time control according to an embodiment of the present invention. In the system shown inFIG. 5, the on time of the power converter switching element is controlled by a circuit having two primary functional blocks: (1) a minimum off-time generator portion502, and (2) a variable on-time generator portion504. The operation of the circuit shown inFIG. 5will now be described.

The circuit ofFIG. 5operates in conjunction with the one shown inFIG. 4, and matching signal labels between the two figures refer to the same signal. The gate output412of the D-Q flip flop506drives the switching MOSFET408in the power converter depicted inFIG. 4. InFIG. 5, it can be seen that the minimum off-time circuit502is wired to the preset pin of the D-Q flip flop506such that it can drive the gate output412high to turn on the switching MOSFET408. On the other hand, the variable on-time generator circuit504is wired to the clear pin of the D-Q flip flop506and thus can drive the gate output412low, turning off the switching MOSFET408.

In the initial state, assume that the switching FET has just turned off such that the gate output of flip flop506is low, and the Q-bar output508is high. This produces a low output from inverter510, which opens switch512. This causes capacitor514to begin to charge from current source516. As long as the voltage on the capacitor514remains below a reference voltage Vref, the output of comparator518remains high. Since the Q-bar output508is high and forms the other input to AND gate520, the output of the AND gate520is high. Thus, OR gate522is controlled by the minimum off-time generator circuit and continue to drive a high output, regardless of the output of error amplifier524. In other words, the minimum off-time generator overrides the error amplifier524and maintains the switching MOSFET408in an off state for a minimum time duration equal to the time it takes to charge capacitor514up to the level of Vref.

Once the capacitor514charges to the level of Vref, the comparator518switches low, causing AND gate520to switch low. The output of the OR gate522is then controlled by the error amplifier524. The error amplifier compares the feedback voltage FB, measured at node420inFIG. 4, to the reference voltage Vref, in order to decide whether to switch on or off the MOSFET408. Thus, without considering the variable on-time portion of the circuit504, the switching FET is controlled by a standard error feedback loop with the modification, in accordance with an embodiment of the present invention, that whenever it switches off, it stays off for a minimum time equal to the time it takes to charge up capacitor514from current source516. Current source516may be implemented as a resistor in series with the input voltage VIN.

The variable on-time portion of the circuit504adds an additional control mechanism that depends on VA, shown inFIG. 4as element418. FromFIG. 4, it can be seen that VAis a voltage proportional to the load current being delivered by the switching converter. In a conventional device, as the load current drops, the switching frequency may drop into the audible range (below about 25 kHz) which is undesirable in many applications. Accordingly, the variable on-time circuit operates to prevent the switching frequency from dropping excessively under light loads.

Assume the switching MOSFET408(seeFIG. 4) has just turned on. This means that inFIG. 5, the Q output of D-Q flip flop506is high and the Q-bar output508is low. The Q output drives inverter526, so its output is low, opening switch528. This causes capacitor530to charge from the input voltage VINthrough resistor544. Ignoring the circuitry connected at node534for the moment, when capacitor530has charged up to a voltage that is greater than the reference voltage Vref, comparator532changes state and drives high. Both inputs to AND gate536are thus high, and its output drives the clear input of D-Q flip flop506, clearing the Q output and thus turning off the switching MOSFET. The operation described thus far with respect to the variable on-time circuit504reflects the traditional operation of an on-time control circuit in a switching power converter.

The additional control paths represented by the circuitry connected to node534enable variable on-time control and represent an embodiment in accordance with an aspect of the present invention. First, amplifier538is configured to provide on-time control that depends on the load current of the power converter. VAis proportional to the load current of the power converter, as can be seen fromFIG. 4. InFIG. 5, amplifier538is configured as a differential amplifier that compares scaled versions of VA, proportional to the load current, and VOUT, the output voltage of the switching converter. As the output load current of the device increases, the output of amplifier538acts to enable current flow through a transconductance amplifier540, also called a gm amplifier, which draws off current that would otherwise be charging capacitor530. This slows the charge slew rate of capacitor530, thus prolonging the on-time of the main switching MOSFET408. The transconductance amplifier540sinks a current that is proportional to its input voltage from amplifier538. As shown inFIG. 5, it may be a MOSFET, although other implementations would also fall within the scope of the present invention. By properly selecting the charging current and/or the value of the capacitor530, the on-time of the main switching MOSFET408can be adjusted around a nominal value.

A second transconductance amplifier542supplies an additional variable on-time control function. As the output voltage, VOUT, of the power converter rises, transconductance amplifier542begins to conduct, providing an additional current path, sinking current that would otherwise be charging capacitor530. Thus, the path represented by the second transconductance amplifier542also serves to slow the charging slew rate and thus prolong the on time of the main switching MOSFET408as the output voltage of the switching converter rises. Again, by properly selecting the charging current and/or the value of the capacitor530, the on-time of the main switching MOSFET408can be adjusted around a nominal value.

AlthoughFIG. 5depicts both a first and second variable on-time control circuit, as described above, it is also possible to use only the first or only the second transconductance amplifier, depending on the particular application.

These variable on-time control mechanisms thus automatically provide low power consumption and low ripple noise under light-load and low-load conditions and also maintain a relatively high switching frequency that remains above the audible range, i.e., above about 25 kHz.

FIG. 6presents simulation results of the circuits shown inFIGS. 4 and 5, operating with a VINof 3.3 V, a VOUTof 16.8 V, and a minimum off time of 350 ns. The topmost trace602shows the load current of the switching converter, switching from 0 mA to 65 mA at about the 4.5 ms mark and remaining there until about the 4.85 ms mark, and then returning to 0 mA.

The second trace from the top, labeled604, is the voltage measured at the phase node (element422inFIG. 4), and the bottom trace606is the output voltage, VOUT. It can be seen that when the load current is at zero, the switching period in this example is 0.0344 ms, which corresponds to a frequency of 29 kHz, which is above 25 kHz and thus beyond the audible range.

The basic equations that ensure this type of operating condition is maintained with low output current or no output current are the energy balance equations. In a boost converter, such as that shown inFIG. 4, Ep(D1) represents the total energy stored in the inductor that is transferred during the on time of the switching MOSFET408. The on time is given by TON=D1*TS, where D1is the fractional duty cycle of the MOSFET, and TSis the switching period. En(D1) represents the total energy stored in the output capacitor and dissipated in the circuit during the off time. The off time is given by TOFF=(1−D1)*TS, where 1−D1represents the off duty cycle. The condition ensuring that the converter will operate at a constant switching frequency (1/TS) that is greater than 25 kHz is given by:
Ep(D1)≦En(D1).

FIGS. 7 and 8show how this condition can be met for the boost converter example discussed above with reference toFIG. 6.FIG. 7is a plot of the total on-time inductor energy Ep(D1)702and the total off-time capacitor energy En(D1)704as a function of the total on time. From the plot, it can be seen that the condition above is satisfied in the left-hand portion of the plot, where D1is below a critical value D1—crit, shown graphically at706.

FIG. 8shows an alternative method of representing this condition by plotting the total on-time inductor energy Ep(D1)802and the total off-time capacitor energy En(D1)804as a function of the peak current iL(D1)_pk through the inductor. In this case, it is evident that the condition above, required for keeping the switching frequency greater than about 25 kHz, is satisfied as long as the peak inductor current is kept below a critical value iL—crit, shown graphically at806.

In other words, for the boost converter discussed in relation toFIG. 6, there is a region of operation in which the boost circuit will operate at a frequency greater than 25 kHz. This region is that having TONbetween zero and D1—crit*TS. Alternatively, it is the region having peak inductor current between 0 and iL—crit. Indeed these two conditions are related as follows:
iL(D1)—pk=(VIN/L)*TON=(VIN/L)*D1*TS.

Here, L represents the inductance value of the inductor. Importantly, this equation makes it clear that in order to achieve the minimum switching frequency conditions, the peak current through the inductor must be limited to a value between zero and iL—crit.

While the above discussion has focused on an exemplary architecture for a boost-type converter, the inventive features are similarly applicable to other switching converter topologies such as buck-type converters, buck-boost converters, single-ended primary inductor (SEPIC) converters, or other switching power converter designs. In light of the preceding discussion, one skilled in the art will readily appreciate other applications and advantages of the invention, and such applications would also fall within the scope and spirit of the present invention. The invention is solely defined by the following claims.