Storage system

A storage controller has a processor, a volatile first cache memory that is coupled to the processor and that temporarily stores data, a nonvolatile second cache memory that is coupled to a microprocessor and that temporarily stores data, and a battery that is configured to supply electrical power to at least the processor and the first cache memory when a power stoppage has occurred. The second cache memory includes a dirty data area for storing dirty data, which is data that is not stored in the storage device, and a remaining area other than the dirty data area. When a power stoppage has occurred, the processor stores as target data in the remaining area of the second cache memory either all or a part of the data stored in the first cache memory.

TECHNICAL FIELD

The present invention relates in general to cache control for a storage system.

BACKGROUND ART

In order to prevent the loss of data on a main storage device when there is a power shutdown, a nonvolatile memory for saving data on a main memory may be installed in a storage controller. Patent Literature 1 discloses a technique for selecting only the main memory data that should be saved and saving the data to the nonvolatile memory. For example, it is supposed that the temporary storage destination for data pursuant to an access command from a higher-level apparatus is a volatile cache memory. When the supply of power from a primary power source to the volatile cache memory temporarily stops, the data being stored in the volatile cache memory is copied to a nonvolatile memory using power supplied from a battery.

CITATION LIST

Patent Literature

SUMMARY OF INVENTION

Technical Problem

However, the technique disclosed in Patent Literature 1 does not take into account the capacities of the nonvolatile memory and the volatile cache memory, and as such, in the case of a large-capacity volatile cache memory, it may not be possible to backup all of the volatile cache memory data. Also, the battery capacity and the backup medium capacity required at the time of a power shutdown increases in accordance with an increase in the capacity of the main storage cache memory.

Accordingly, the problem for a storage system is to reduce battery capacity and cut costs by shortening data transfer time when there is a power stoppage.

Solution to Problem

To solve for the above problems, a storage system includes a storage device, and a storage controller for receiving data from a host computer and storing the received data in the storage device. The storage controller includes a processor, a volatile first cache memory that is coupled to the processor and is for temporarily storing data, a nonvolatile second cache memory that is coupled to a microprocessor and is for temporarily storing data, and a battery that is configured to supply electrical power to at least the processor and the first cache memory when a power stoppage occurs. The second cache memory includes a dirty data area for storing dirty data, which is data that is not stored in the storage device, and a remaining area other than the dirty data area. When a power stoppage occurs, the processor is configured to store in the remaining area of the second cache memory as target data either all or a portion of the data stored in the first cache memory.

Advantageous Effects of the Invention

According to the present invention, it is possible to reduce battery capacity and cut costs by shortening the data transfer time when a power stoppage occurs.

DESCRIPTION OF EMBODIMENTS

The embodiment of the present invention will be explained below while referring to the drawings.FIG. 1shows the configuration of a storage system according to a first embodiment of the present invention.

The storage system includes a host computer2and a storage apparatus1coupled to the host computer2. The storage apparatus1is coupled to the host computer2for processing data and performing operations. The storage apparatus1is coupled to the host computer2via a fibre channel (FC) and a data transfer path using iSCSI or the like. There may be one or a plurality of host computers2.

The storage apparatus1includes a storage controller3, a drive enclosure4, and a power source5. The drive enclosure5houses a plurality of storage drives6(three drives in this embodiment). The power source5supplies electrical power to the storage controller3and the drive enclosure4. The storage apparatus1is coupled to a commercial power source7.

The respective number of storage controllers3, drive enclosures4, and power sources5included in the storage apparatus1will depend on the design. The type of storage drive is irrelevant. For example, the storage drives may be hard disk drives (HDDs), or may be solid state drives (SSDs) mounted with flash memory or another such nonvolatile memory.

The storage drive6, for example, is a nonvolatile storage medium, and stores user data transferred from the host computer2. For example, a plurality of storage drives6may be configured as redundant arrays of inexpensive disks (RAID) to achieve data redundancy. In accordance with this, even when a failure occurs in the storage drive6and data is lost, it is possible to restore the lost data on the basis of the data and parity of the storage drives6. A storage drive6is one example of a storage device.

The storage controller3includes a plurality of clusters10, and in this embodiment, includes two clusters10. The storage controller3places a high value on availability, and is provided with two clusters2in order to provide continuous service. Since the two clusters10have the same configuration, the same reference signs will be appended, and only one of the clusters10will be explained.

The cluster10includes a host interface (I/F) LSI11, a drive I/F LSI12, a microprocessor (simply MP hereinafter)13, a main memory14, an NVRAM15, and a battery16.

The host I/F LSI11is a device used in communications with the host computer2, and includes functions for converting FC, Fibre Channel Over Ethernet (registered trademark) (FCoE), iSCSI and other such communication protocols to the PCIe protocol used inside the storage apparatus1. Data is transferred from the host computer2to the storage apparatus1in 512-byte units, but the host I/F LSI11is configured so as to add an 8-byte CRC to the data.

The drive I/F LSI12is a device for coupling the drive enclosure4that houses a plurality of drives6to the storage controller3. For example, the drive I/F LSI12includes functions for converting a communication protocol that is used for communications between the storage drive6and the storage controller3, such as FC, serial attached SCSI (SAS), serial advanced technology attachment (SATA), or non-volatile memory express (NVMe) to a protocol used inside the storage controller3, for example, the PCIe protocol.

The MP13executes internal processing in the cluster10. The MP13includes a core13A for executing an operation and a data read/write, and controlling the storage controller, a memory I/F13B for performing a data transfer with the main memory14, a PCIe interface13C for coupling the host I/F LSI11to the MP13, a PCIe I/F13D for coupling the drive I/F LSI12to the MP13, a PCIe I/F13E for coupling the NVRAM15to the MP13, a DMA13F for performing a data transfer between the main memory14and the other cluster2(also called the remote cluster), and a non-transparent bridge (NTB)13G that constitutes a communication I/F with the remote cluster2. The internal components of the MP13are coupled to one another via an internal network. The memory I/F13B, for example, is a DDR interface. The MP13core13A creates parity for each below-described segment32when copying user data from the main memory14to the storage drive6, and stores (destages) the parity in the storage drive6.

The main memory14is coupled to the MP13, and is a volatile storage device including a semiconductor memory such as double data rate (DDR) synchronous DRAM. The capacity of the main memory14, for example, is from 100 to 500 GB. The main memory14is coupled to the MP13via the memory I/F13B, which is a DDR interface. The main memory14temporarily stores data that is read/written from/to the host computer2(the caching of user data), and also stores data handled by the MP13and a program for controlling the storage controller10. The data stored in the main memory14will be described in detail below. The main memory14is one example of a first cache memory.

The NVRAM15is typically a nonvolatile storage device that is coupled to the microprocessor13via the PCIe I/F13E, and includes semiconductor memory, such as a NAND-type flash memory, a phase change RAM (PCM), or a resistance RAM (ReRAM). The capacity of the NVRAM15, for example, is between 500 GB and 1 TB. The NVRAM15is mounted with a direct memory access (DMA)15A for transferring data stored in the main memory14to the NVRAM15. The NVRAM15temporarily stores data that is read/written from/to the host computer2. Generally speaking, the NVRAM15has a higher data recording density per area than a DRAM, but has low data-read and data-write rates, and data can only be rewritten a small number of times. The data stored in the NVRAM15will be explained in detail below. The NVRAM15is one example of a second cache memory.

The battery16, for example, is a rechargeable secondary battery, and supplies electrical power in place of a power source when electrical power can no longer be supplied to the storage controller3due to a malfunction in the power source5. The type of battery including the battery16is irrelevant. For example, the battery16can be a lead-acid storage battery, a lithium ion battery, and so forth. The battery16maintains an electric charge for operating at least the MP13, the main memory14, and the NVRAM15in the cluster10for a fixed period of time. The battery16is configured so as to start supplying electrical power to the cluster10when there is a voltage drop (also called a power stoppage) on the circuit supplying electrical power to the cluster10.

FIG. 2shows an example of the configuration of data stored in the main memory14and the NVRAM15.

The main memory14stores control program data20, which is a program for controlling the storage controller3, user data30read/written from/to the host computer2, a main memory management table40for storing information for managing the user data30, an NVRAM management table50for storing information for managing user data stored in the NVRAM15, a backup data table60for managing data constituting a backup target on the main memory14, and a save-destination data table70for managing areas on the NVRAM15in which user data30is able to be saved. The NVRAM15stores user data80.

The configurations of the user data30and80, the management tables40and50, the backup data table60, and the save-destination data table70will be described in detail below. Only the user data80is stored in the NVRAM15. The NVRAM15is basically used as a cache memory, and has write performance that is lower than the main memory14, which is a DRAM, and as such, the frequently accessed management tables40and50, and the control program data20are not stored in the NVRAM15.

Of the user data transferred from the host computer2to the storage apparatus1, the user data that is stored in the cache memory and has already been copied to the storage drive6is called clean data. That is, the user data destaged to the storage drive6is clean data. Alternatively, of the user data transferred from the host computer2to the storage apparatus1, the user data that is stored in the cache memory but has yet to be copied to the storage drive6is called dirty data. That is, user data that has not yet been destaged to the storage drive6is dirty data.

FIG. 3shows the configuration of the user data30.

The user data30represents an aggregate of data transferred from the host computer2. As shown inFIG. 3, one slot31includes a plurality of segments32, and each segment32respectively includes a plurality of blocks33. Although not shown in the drawing, the user data80stored in the NVRAM15has the same configuration as the user data30.

One slot31, for example, is 256 KB, and the number of slots31depends on the design. Each segment32represents a continuous area on the main memory14. The size of the segment32depends on the design, and the number of segments32in a slot31depends on the design. Each block33is the smallest unit for managing the user data30, and, for example, is 512 B and represents a continuous area on the main memory14.

Then, clean data33A and dirty data33B are stored in each block33. Also, the MP13initializes and frees either a block33or a segment32in which clean data is stored in order to store new dirty data, thereby temporarily creating a free-area block33C.

In the storage apparatus1, the maximum capacity for the dirty data capable of being held in the main memory14is settably configured by the user.

FIG. 4shows the configuration of the main memory management table40.

The main memory management table40is for managing the user data30stored in the main memory14. The main memory management table40includes a slot management pointer table41, a slot management table42, and a segment management table43.

The slot management pointer table41is for managing I/O destination information. That is, the slot management pointer table41is information included in an I/O request received from the host computer2, and stores information representing the I/O destination. Typically, I/O destination information is a logical unit number (LUN) and a logical block addressing (LBA). The LUN is the number of a logical unit (logical volume), and is a number recognized by the host computer2. The LBA is an address representing an area (logical block) in a logical unit of the storage drive6.

The slot management pointer table41includes a prescribed number of blank entries (records). When an I/O request is received, a slot management pointer, which is the I/O destination information, is written into a blank entry. Then, a record corresponding to a free slot is identified from the slot management table42, and a slot management pointer is associated with the record. In accordance with this, it is identified where data that has been written to a certain I/O destination (or read from a certain I/O destination) is stored in the main memory14, which is the cache memory.

One row of the slot management pointer table41does not correspond one-to-one basis with one row of the slot management table42from the start. This is because to do so would require that pointers equivalent to the capacity of the logical volume be prepared in advance, making it necessary to enlarge the size of the table and the size of the cache.

The slot management table42stores a slot ID42A, which is information for identifying a slot, most recent used (MRU) information42B, least recent used (LRU) information42C, a slot status42D, and a segment management pointer42E.

The MRU information42B indicates whether or not the corresponding slot is accessed frequently. The LRU information42C indicates whether or not the corresponding slot is accessed infrequently.

The slot status42D stores either clean or dirty cache control information, and information indicating that parity has been created for each segment32of a slot31. In this embodiment, when the percentage of dirty data stored in the main memory14and the NVRAM15exceeds a prescribed percentage, parity related to the dirty data is created in each segment32and a dirty data destage process is executed.

The segment management pointer42E stores a segment management table pointer corresponding to a segment included in a slot.

A plurality of segment management tables43is provided corresponding to each slot. The segment management table43stores a segment ID43A, which is information for identifying a segment, a data storage address43B, a clean data bitmap43C, and a dirty data bitmap43D. The data storage address43B indicates a location where a segment is arranged. The clean data bitmap43C indicates a storage location for data that is in the clean state inside the corresponding segment. That is, the clean data bitmap43C indicates the location where clean data is stored inside the corresponding segment. The dirty data bitmap43D indicates the storage location for data that is in the dirty state inside the corresponding segment. That is, the dirty data bitmap43D indicates the location where dirty data is stored inside the corresponding segment.

FIG. 5shows the configuration of the backup data table60.

The backup data table60is created by the core13A of the MP13on the basis of the main memory management table40at the time of a power stoppage. The backup data table60is a bitmap table related to backup-target data within the user data30. That is, the backup data table60is for indicating where data targeted for backup is stored. The backup data table60stores a slot management pointer61, a slot ID62, a segment ID63, a data size64, and a data head address65. Furthermore, data to be saved from the main memory14to the NVRAM15may include all user data, or dirty data alone, but the backup data table60shown inFIG. 5will be explained as a backup data table for when either data is targeted for backup. The backup data table60is equivalent to a target data table, and the backup data is equivalent to target data. Also, the data is being presented as backup data targeted to be backed up from the main memory14to the NVRAM15at the time of a power stoppage, but is also data that is targeted for restoration from the NVRAM15to the main memory14when the power has been restored.

The slot management pointer61, the slot ID62, and the segment ID63respectively correspond to the slot management pointer table41, the slot ID42A, and the segment ID43A inFIG. 4. The data size64is the size of the backup data being stored in the corresponding segment. The data head address65is the address at the head of the backup data being stored in the corresponding segment.

As mentioned above, an 8-byte CRC is appended to data transferred from the host computer2in 512-byte units. In so doing, the addresses deviate by 8 bytes each. Thus, dirty data and clean data become intermixed in the same block. Therefore, managing a backup target by data size and address makes it possible to extract and save only the backup data from the user data30, enabling the amount of backup data to be reduced.

FIG. 6shows the configuration of the NVRAM management table50.

The NVRAM management table50is for managing the user data80stored in the NVRAM15. The NVRAM management table50stores a slot management pointer table51, a slot management table52, and a segment management table53. The slot management pointer table51, the slot management table52, and the segment management table53, respectively, are the same tables as the slot management pointer table41, the slot management table42, and the segment management table43of the main memory table40, and as such, a detailed explanation will be omitted.

A slot management pointer of the slot management pointer table51indicates I/O destination information the same as the slot management pointer of the slot management pointer table41, but indicates the I/O destination information of data in the NVRAM15that differs from the I/O destination information of the data in the main memory14. The slot management table52includes a slot ID52A, MRU information52B, LRU information52C, a slot status52D, and a segment management pointer52E. A plurality of segment management tables53is provided corresponding to each slot, and the segment management table53includes a segment ID53A, a data storage address53B, a clean data bitmap53C, and a dirty data bitmap53D.

FIG. 7shows the configuration of the save-destination data table70.

The save-destination data table70is created by the core13A of the MP13at the time of a power stoppage. The save-destination data table70is a bitmap table indicating the save destination (backup destination) for saving dirty data within the user data30from the main memory14to the NVRAM15when there is a power stoppage. The save-destination data table70includes a slot management pointer71, a slot ID72, a segment ID73, a data size74, and a data head address75. There are some cases that all the user data is saved from the main memory14to the NVRAM15or only dirty data are saved. However, the save-destination data table70shown inFIG. 7will be explained as a save-destination data table for when either data is targeted for backup.

The slot management pointer71corresponds to the slot management pointer61ofFIG. 5. That is, the I/O destination information (slot management pointer) of the backup data managed inFIG. 5is also managed in the save-destination data table ofFIG. 7. In accordance with this, the backup-target data on the main memory14is associated with the data to be saved on the NVRAM15. Then, when the backup data is restored to the main memory14, it is enabled to write the backup data to the I/O destination indicated by the slot management pointer (I/O destination information) of the table inFIG. 7.

The slot ID72and the segment ID73respectively correspond to the slot ID62and the segment ID63inFIG. 5. The save-destination data size74is the size of the dirty data stored in the corresponding segment. The save-destination data head address75indicates the head address of the dirty data stored in the corresponding segment.

FIG. 8shows a backup processing operation by the storage controller3when there is a power stoppage in the storage apparatus1in the first embodiment.FIG. 8only shows the backup processing operation for the one cluster10.

The cluster10starts the backup process when there is a drop in voltage due to a power source5malfunction or the like, and the circuit8that supplies the electrical power from the power source5to the storage controller3has transitioned to an open state. The backup process represents processing for executing a data transfer F1of the user data30, the main memory management table40, the NVRAM management table50, the backup data table60, and the save-destination data table70, which are being stored in the main memory14, to a clean data area15B and a free area15C of the NVRAM15. That is, in the backup process, the backup data is stored in the remaining areas (the clean data area15B and the free area15C) other than the dirty data area. The specific processing operation of the backup process will be explained below. During the backup process, the cluster10runs on the battery16.

FIG. 9shows a flowchart of a maximum dirty capacity determination process. This process is executed either when the storage apparatus1boots up, or when the user changes the maximum capacity of the dirty data capable of being held in the main memory14.

The MP13acquires capacity information of the main memory14and capacity information of the NVRAM15, and determines whether or not the NVRAM capacity is larger than the main memory capacity (S10). When it has been determined that the NVRAM capacity is larger than the main memory capacity (S10: YES), the MP13configures the difference between the NVRAM capacity and the main memory capacity as the maximum capacity of the dirty data capable of being held in the NVRAM15(S11). Since the main memory14has higher write performance, holding the dirty data in the main memory14makes it possible to maintain the performance of the storage apparatus1.

When it has been determined that the NVRAM capacity is equal to or less than the main memory capacity (S10: NO), the MP13determines whether or not the NVRAM15is smaller than the maximum capacity of the dirty data capable of being held in the main memory14(S12). When it has been determined that the NVRAM capacity is smaller than the maximum capacity of the dirty data capable of being held in the main memory14(S12: YES), the MP13changes the settings of the storage apparatus1such that the maximum capacity of the dirty data capable of being held in the main memory14is identical to the capacity of the NVRAM (S13). In addition, the MP13also sets the capacity of the dirty data capable of being held in the NVRAM15to 0 (S13). In this case, only clean data is stored in the NVRAM15. In accordance with this, since the main memory14exhibits a higher write performance, holding the dirty data in the main memory14makes it possible to maintain the performance of the storage apparatus1.

In the processing of Step S13, when dirty data is being stored in the NVRAM15, all of the dirty data may be written (destaged) to the storage drive6to convert the NVRAM15to an all clean state. Also, in the processing of Step S13, when the amount of dirty data stored in the main memory14exceeds the maximum capacity of the dirty data capable of being held in the main memory14, the excess dirty data may be written to the storage drive6.

When it has been determined that the capacity of the NVRAM15is equal to or larger than the maximum capacity of the dirty data capable of being held in the main memory14(S12: NO), the MP13configures the difference between the NVRAM capacity and the maximum capacity of the dirty data that can be held in the main memory14as the maximum capacity of the dirty data capable of being held in the NVRAM15(S14). In accordance with this, the NVRAM15holds clean data in proportion to the maximum capacity of the dirty data capable of being held in the main memory14.

FIG. 10shows a flowchart of the backup processing of the storage apparatus1at the time of a power stoppage.

First, the MP13determines whether or not there has been a drop in voltage due to a power source5malfunction or the like, and the circuit8that supplies the electrical power from the power source5to the storage controller3has transitioned to an open state (S20). That is, the MP13determines whether or not a power stoppage has occurred. When a power stoppage has not occurred (S20: NO), the backup process ends. Alternatively, when a power stoppage has occurred (S20: YES), the MP13executes a backup data selection process for selecting the backup-target data on the main memory14(S21). The backup data selection process will be explained in detail below. When the backup data selection process ends, the MP13executes a save destination selection process for selecting a backup data save destination from the NVRAM15(S22). The save destination selection process will be explained in detail below. After the save destination selection process has ended, the MP13executes a data transfer process for transferring the backup data selected in Step S21to the save destination selected in Step S22(S23). The data transfer process will be explained in detail below. Once the data transfer process is complete, the storage apparatus1ends the backup process.

FIG. 11shows a flowchart of the backup data selection process for selecting backup data on the main memory14.

The MP13creates a backup data table60(S30). At this time point, the backup data table60is empty. Next, the MP13determines whether or not the capacity of the main memory14is equal to or less than the total of the clean data capacity and the free capacity on the NVRAM15(S31). When it has been determined that the capacity of the main memory14is equal to or less than the total (S31: YES), the MP13selects all the data on the main memory14as the backup target (S32). In accordance with this, since all of the data is selected uniformly, the processing time for determining the backup-target data one by one is reduced. Accordingly, it becomes possible to reduce the backup process time as a whole.

The MP13reflects information on all the user data selected in Step S32in the backup data table (S33). Specifically, on the basis of the main memory management table40, the MP13reflects slot pointers, slot IDs, segment IDs, data sizes, and data head addresses in the backup data table60. In accordance with this, a backup data table60related to all the user data shown inFIG. 5is created.

Alternatively, when is has been determined that the main memory capacity is larger than the total (S31: NO), it is not possible to select all of the data on the main memory. Thus, the MP13, on the basis of the main memory management table40, identifies slots and segments storing dirty data and selects the dirty data as the backup target (S34). At this time, the size of the identified dirty data is calculated from the dirty data bitmap43D. Next, the MP13, on the basis of the identified dirty data information, reflects the slot pointers, slot IDs, segment IDs, data sizes of the dirty data, and data head addresses of the dirty data in the backup data table60(S35). In accordance with this, the backup data table60shown inFIG. 5is created as the backup data.

Next, the MP13determines whether or not the dirty data determination process has been completed for all the user data (S36). When the determination process has not been completed, the MP13returns Step S34(S36: NO), and repeats the dirty data selection process. When it has been determined that the dirty data determination process is complete for all the user data (S36: YES), the MP13, on the basis of the backup data table60created in Step S33and Step S35, calculates the total size of the backup data being targeted for backup (S37). After computing the total size of the backup data in Step S37, the MP13ends the backup data selection process.

FIG. 12is a flowchart of the save destination selection process for selecting a backup data save destination from the NVRAM15.

The MP13creates a save-destination data table on the basis of the NVRAM management table50(S40). At this time point, there is no data at all reflected in the save-destination data table. The MP13reads the NVRAM management table50and the backup data table60created in the backup data selection process ofFIG. 11(S41).

In order to enhance the capacity efficiency of the NVRAM15at this time, the MP13selects a user data area in which clean data is stored as the backup data storage destination without configuring a data save area for backup use on the NVRAM15. Thus, the MP13must read the user data management table in the NVRAM15, and identify the location of the clean data that will become the backup data storage destination. The order of preference for selecting the backup storage destinations at this time is as follows: (1) a free area in which user data is not stored; (2) a clean-state slot from among the slots, the largest data management units; (3) a clean-state segment from among the segments, the next largest data management units; and (4) a clean-state block from among the blocks, the smallest data management units. Selecting the backup storage destinations in order from the largest area like this makes it possible to shorten the write time from the main memory14to the NVRAM15. Accordingly, the time required to supply electrical power to the cluster10from the battery16can be shortened, enabling capacity of the battery16to be reduced.

As used here, clean state indicates a state in which all of the data stored in the corresponding area is clean data, and dirty data is not being stored.

The MP13determines whether or not there is a free area in the NVRAM15on the basis of the NVRAM management table50(S42). When there is a free area in the NVRAM15(S42: Yes), the MP13selects the free area (S43). Alternatively, when there are no free areas in the NVRAM15(S42: NO), the MP13determines whether or not there is a clean-state slot in the NVRAM15(S44). When a clean-state slot exists in the NVRAM15(S44: YES), the MP13selects the clean-state slot (S45). When there are no clean-state slots in the NVRAM15(S44: NO), the MP13determines whether or not there is a clean-state segment in the NVRAM15(S46). When a clean-state segment exists in the NVRAM15(S46: YES), the MP13selects the clean-state segment (S47). When there are no clean-state segments in the NVRAM15(S46: NO), the MP13selects a clean-state block (S48). The MP13selects the save area in this manner, thereby making it possible to leave behind as much clean data as possible in the NVRAM15.

After the save destination selection processes, the MP13determines whether or not the number of times obtained by adding 1 to the number of writes for the selected area exceeds a maximum number of writes possible (S49). When the number of times obtained by adding 1 to the number of writes for the selected area is equal to or larger than the maximum number of writes possible (S49: YES), the MP13returns to S42and repeats the save destination selection process. Alternatively, when the number of times obtained by adding 1 to the number of writes for the selected area is less than the maximum number of writes possible (S49: NO), the MP13transitions the cache state of the selected save area to dirty in the NVRAM management table50(S50). Transitioning to dirty makes it possible to prevent the backup data from being discarded accidently at recovery time. The MP13allocates the user data to be saved to the selected area, and reflects the slot pointer, the slot ID, the segment ID, the data size, and the data head address related to the allocated user data in the save-destination data table70(S51).

Next, the MP13determines whether or not a save area having a size equal to the total size of the backup data calculated in S37ofFIG. 11was selected (S52). When it has been determined that a save area having a size equal to the total size of the backup data has been selected (S52: YES), the MP13ends the save destination selection process. Alternatively, when it has been determined that a save area having a size equal to the total size of the backup data has not been selected (S52: NO), the MP13returns to Step S42.

FIG. 13shows a flowchart of a data transfer process for transferring backup data from the main memory14to the NVRAM15.

The MP13reads the backup data table60and the save-destination data table70(S60). Next, the MP13, on the basis of the two tables that were read, creates a data transfer instruction in the main memory14for transferring data via the DMA15A of the NVRAM15(S61). The main memory management table40, the NVRAM management table50, the backup data table60, and the save-destination data table70are included as transfer targets at this time. Next, the MP13reads the created data transfer instruction to the DMA15A, and executes a data transfer to the DMA15A (S62).

After executing the data transfer to the DMA15A, the MP13waits for a fixed period of time (S63), and then determines whether or not the data transfer has been completed by the DMA15A (S64). When the data transfer has not been completed (S64: NO), the MP13returns to Step S63and waits. When the data transfer has been completed (S64: YES), the MP13determines whether or not the transfer of all the backup data has been completed (S65). When the transfer of all of the backup data has not been completed (S65: NO), the MP13returns to Step S62and repeats the transfer process. When the transfer of all of the backup data has been completed (S65: YES), the MP13ends the data transfer process.

FIG. 14shows a flowchart of a backup data restoration process by the MP13when power has been restored.

Next, the MP13, in order to reallocate the identified backup data to the main memory14in Step S72, transfers the identified backup data from the NVRAM15to the main memory14in Step S72(S72). The MP13also transfers the main memory management table40and the NVRAM management table50. The MP13refers to the backup data table60, reconfigures the main memory management table40(S73), and ends the restoration process. The MP13may also reconfigure the NVRAM management table50by referring to the save-destination data table70.

At backup data transfer time, the MP13checks the CRC code appended to the backup data, and when a CRC error is detected, discards the data.

As described hereinabove, at the time of a power stoppage, data stored in the main memory14is saved to a free area and/or a clean data area of the NVRAM15, thereby making it possible to enhance the capacity efficiency of the NVRAM15. Also, since there is no need to provide a nonvolatile memory for saving backup data, cost increases can be prevented. Also, since backup data is saved to the NVRAM15, which is used as a cache memory, data transfer time can be shortened, battery16capacity can be reduced, and costs can be lessened.

A storage apparatus101in a second embodiment of the present invention will be explained next.

FIG. 15shows the storage apparatus101that makes up the storage system in the second embodiment. The same numbers will be assigned and explanations omitted for configurations that are the same as the first embodiment; only the different parts of the configuration will be explained.

As shown inFIG. 15, each cluster10in this embodiment includes an SSD17, which is a nonvolatile medium dedicated to backup, and an SSD I/F LSI18. The SSD17is a storage device including a semiconductor memory, such as a NAND-type flash memory, a phase change RAM (PCM), a resistance RAM (ReRAM), or the like, and the capacity thereof is between 1 TB and 2 TB. The SSD17is normally connected to the MP13via a SATA interface. Also, the SSD17has a higher data recording density per area than a DRAM, but has low data-read and data-write rates, and data can only be rewritten a small number of times. In this embodiment, the SSD17is only used for saving data stored in the main memory14at the time of a power stoppage, and does not store data read/written from/to the host computer2other than at backup processing time. The SSD I/F LSI18is a controller for the SSD17to communicate with the MP13.

FIG. 16shows a backup processing operation by the storage controller3when there is a power stoppage in the storage apparatus101of this embodiment.FIG. 16only shows the backup processing operation in the one cluster10.

The cluster10starts the backup process when there is a drop in voltage due to a power source5malfunction or the like, and the circuit8that supplies the electrical power from the power source5to the storage controller3has transitioned to an open state. The backup process in this embodiment executes a data transfer F1to a clean data area and a free area of the NVRAM15and a data transfer F2to the SSD17, of the user data30, the main memory management table40, the NVRAM management table50, the backup data table60, and the save-destination data table70, which are being stored in the main memory14. Thus, in the backup process of this embodiment, unlike the backup process of the first embodiment, a backup data transfer from the main memory14to the SSD17is executed in parallel to the a backup data transfer from the main memory14to the NVRAM15. The specific processing operation of the backup process will be explained below.

In this embodiment, the same backup process as that ofFIG. 10of the first embodiment is executed. However, in this embodiment, the backup data save destination determination process ofFIG. 17is executed in place of Step S22.

FIG. 17shows a flowchart of a backup data save destination determination process in this embodiment.

The MP13determines whether or not an SSD17exists in the cluster10(S80). When it has been determined that the SSD17does not exist (S80: NO), the MP13executes the same processing as that of Step S22inFIG. 10. That is, since the NVRAM15is the only backup data save destination, only the processing ofFIG. 12is executed.

Alternatively, when it has been determined that the SSD17exists (S80: YES), because there are two nonvolatile media that are backup data storage destinations, the MP13executes a process for configuring the amount of data to be stored in each medium. First, the MP13measures the data transfer throughputs of the NVRAM15and the SSD17(S81). For example, the MP13creates dummy data, executes dummy transfers from the main memory14to the NVRAM15and the SSD17, and calculates the data transfer amounts per second based on the data transfer amounts and the data transfer times. In accordance with this, the data transfer throughput of the NVRAM15(VNVRAM[GB/S]) and the data transfer throughput of the SSD17(VSSD[GB/S]) are measured.

Next, the MP13uses the following formulas (1) and (2) to calculate the amounts of data to be backed up on the NVRAM15and the SSD17(S82).

The variables here are:

VSSD: Data transfer throughput [GB/S] of SSD measured in Step S81;

VNVRAM: Data transfer throughput [GB/S] of NVRAM measured in Step S81;

CMaxDirty: Amount of dirty data [GB] stored in the main memory;

BSSD: Amount of data [GB] to be backed up on SSD; and

BNVRAM: Amount of data [GB] to be backed up on NVRAM.

Next, the MP13determines the data to be backed up on each of the NVRAM15and the SSD17on the basis of the BNVRAM[GB] and the BSSD[GB] calculated in Step S82. The MP13executes the same processing as that of Step S22inFIG. 10for Step S83—determined backup data to be saved to the NVRAM15.

Next, the MP13creates a save table not shown in the drawing for the Step83—determined backup data to be saved to the SSD17(S84). In the save table, at least the I/O destination information and the backup data are associated. This makes it possible to write the backup data to the I/O destination indicated by the I/O destination information when restoring the backup data to the main memory14. After the save table creation process, the MP13ends the save destination determination process. Since the amount of data to be backed up is determined on the basis of the data transfer throughputs of the NVRAM15and the SSD17like this, the data transfers to each of the NVRAM15and the SSD17can be ended at the same time. Accordingly, the time required for saving the backup data can be minimized, and the battery16capacity can be reduced.

FIG. 18shows a flowchart of a backup data restoration process by the MP13when power has been restored in this embodiment. The same numbers will be assigned and explanations omitted for processing that is the same as the restoration process shown inFIG. 14; only the different processes will be explained.

In the restoration process of this embodiment, Step S90and Step S91have been added between Step S72and Step S73. In Step S90, the MP13determines whether or not backup data is stored in the SSD17. When backup data is not stored in the SSD17, the MP13advances to Step S73. Alternatively, when backup data is stored in the SSD17, the MP13transfers the backup data saved in the SSD17to the main memory14.

Next, a storage apparatus in a third embodiment of the present invention will be explained. In this embodiment, the only thing that differs compared to the storage apparatus in the first embodiment is the backup data restoration process. Accordingly, only an explanation of the backup data restoration process will be given. In this restoration process, data that is to be transferred to the main memory14and data that is not to be transferred to the main memory14are respectively selected from among the backup data on the NVRAM15, and only the data that is to be transferred to the main memory14is transferred to the main memory14. In accordance therewith, the time it takes for backup data restoration processing is reduced. Also, the same numbers will be assigned and explanations omitted for configurations that are the same as the first embodiment; only the different parts of the configuration will be explained.

FIG. 19shows a backup data restoration processing operation by the MP13when power has been restored in this embodiment.

As shown inFIG. 19, in this embodiment, a determination is made as to whether to return the backup data19saved to the NVRAM15segment-by-segment to the main memory14, or to destage the backup data19to the storage drive6. For example, the segments are classified into parity-not-created segments19A for which parity has not been created, and parity-created segments19B for which parity has been created. The parity-not-created segments19A are further classified into first parity-not-created segments19A1for which the percentage of dirty data in the parity-not-created segment19A is less than a prescribed threshold, and second parity-not-created segments19A2for which the percentage thereof is equal to or larger than the prescribed threshold.

Then, in the backup data restoration process, there is executed a data transfer F3for transferring the dirty data in a first parity-not-created segment19A1to the main memory14, and a data transfer F4for transferring the dirty data in a parity-created segment19B and a second parity-not-created segment19A2to the storage drive6. This makes it possible to strive to reduce the amount of transfer data transferred to the main memory14, and to end restoration processing in a short period of time.

FIG. 20shows a flowchart of the backup data restoration processing by the MP13when the power has been restored in this embodiment. The same numbers will be assigned and explanations omitted for processing that is the same as the restoration process shown inFIG. 14; only the different processes will be explained.

After executing the processing of S70and S71, the MP13reads the main memory management table40and the NVRAM management table50from the NVRAM15, and writs the tables on the main memory14(S100). After configuring the tables, the MP13executes a restoration-target data selection process (S101). The restoration-target data selection process will be explained in detail below. When the restoration-target data selection process has ended, the MP13transfers the backup data (dirty data) selected in the restoration-target data selection process as data to be restored to the main memory14(S102). At backup data transfer time, the MP13checks the CRC code appended to the backup data, and when a CRC error is detected, discards the data. Thereafter, the MP13executes a destage process (S103), and ends the backup data restoration process. The destage process will be explained in detail below.

FIG. 21shows a flowchart of the restoration-target data selection process in this embodiment.

First, the MP13creates the destage data table80shown inFIG. 22on the main memory13(S110). InFIG. 22, data has been inputted to the destage data table80, but the destage data table80is empty at the creation time point.

Next, the MP13reads the main memory management table40(S111). This process makes it possible to confirm the state of cache management in the main memory14prior to the power stoppage. The MP13selects one segment that includes dirty data from the segment management table43(S112). The MP13determines whether or not parity has been created for the selected segment (S113). Whether or not parity has been created is determined by referring to the slot status42D in the slot management table42. When the selected segment is parity-created (S113: YES), the MP13selects the dirty data in the selected segment as the data that is not to be transferred to the main memory14(S114). That is, from among the backup data stored in the NVRAM15, the MP13selects dirty data corresponding to the dirty data in the selected segment as data that is not to be transferred to the main memory14. Next, the MP13adds the dirty data selected in S114to the destage data table ofFIG. 22(S115).

Alternatively, when the selected segment is parity-not-created (S113: NO), the MP13determines whether or not the percentage of dirty data relative to the data in the selected segment is equal to or larger than a prescribed threshold (S116). The percentage of dirty data relative to the data in the selected segment is calculated by referring to the segment management table43(FIG. 4). Also, the prescribed threshold can be freely set by the user. In the backup process, when only dirty data has been saved, the MP13determines whether or not the percentage of dirty data relative to the overall size, including the free area in the selected segment, is equal to or larger than the prescribed threshold. When the percentage of dirty data is equal to or larger than the prescribed threshold (S116: YES), the MP13advances to S114.

Alternatively, when the percentage of dirty data is less than the prescribed threshold (S116: NO), the MP13selects the dirty data in the selected segment as the data to be transferred to the main memory14, and creates a data transfer instruction (S117). The amount of dirty data in a segment in which the percentage of dirty data is smaller than the prescribed threshold can be considered to be relatively small, enabling the amount of data transferred to the main memory13at data restoration time to be minimized. Accordingly, the restoration process can be ended in a short period of time. Furthermore, only dirty data was selected in S117, but clean data may also be selected and restored.

Next, the MP13determines whether or not processing has been completed for all the segments that includes dirty data, and when the processing has been completed, advances to S119(S118: YES), and when the processing has not been completed, returns to S112(S118: NO). The MP13updates the main memory management table40and the NVRAM management table50on the basis of the data selected in S114and S117. That is, the MP13deletes information related to the dirty data destaged to the storage drive6from the main memory management table40and the NVRAM management table50, enabling new dirty data to be stored. This makes it possible to enhance the efficiency of cache use in the main memory14. Also, updating the main memory management table40and the NVRAM management table50makes it possible to establish the integrity between the management tables40and50and the status of the user data in the main memory14and the NVRAM15following the backup data restoration process.

FIG. 22shows the configuration of the destage data table80for managing dirty data, which is the target of destage processing.

The destage data table80stores a slot management pointer81, a slot ID82, a segment ID83, a dirty data size84, and a dirty data head address85. The slot ID82, the segment ID83, the dirty data size84, and the dirty data head address85are information that is in the NVRAM15.

FIG. 23shows a flowchart of the destage process in this embodiment.

First, the MP13reads the destage data table80from the main memory13(S120). Next, the MP13creates parity for parity-not-created dirty data from among the dirty data targeted for destaging (S121), and creates a instruction for destaging the destage-target dirty data and the parity to the storage drive6(S122). The DMA15A of the NVRAM15may create the parity.

The MP13reads the created instruction to the drive I/F LSI12, and transfers the destage-target dirty data and the parity to the storage drive6(S123). After the transfer, the MP13determines whether or not the destage process has been completed for all of the destage-target data in the destage data table80(S124), returns to S120when destaging for all the data has not been completed, and ends the destage process when destaging for all the data has been completed.

Next, a storage apparatus of a fourth embodiment of the present invention will be explained. In this embodiment, when selecting a save destination on the NVRAM15, an infrequently used clean slot is selected on a priority basis, and backup data is saved to the selected clean slot. This makes it possible to leave behind a frequently used clean slot and to enhance cache hit rate of the apparatus after the post-power restoration. The same numbers will be assigned and explanations omitted for configurations that are the same as the first embodiment; only the different parts of the configuration will be explained.

FIG. 24shows the configuration of a NVRAM management table150in this embodiment. The NVRAM management table150stores an MRU information table54and an LRU information table55. Although not shown in the drawing, the NVRAM management table150also stores the slot management pointer table51, the slot management table52, and the segment management table53shown inFIG. 6.

The MRU information table54indicates which slot has been accessed most recently. That is, in the MRU information table54, the configuration is such that the most recently accessed slot is arranged higher. In other words, a slot that has not been accessed most recently is arranged lower. The MRU information table54includes access history information54A and a slot location pointer54B. The access history information54A indicates the slot that has been accessed most recently, a smaller number indicating a more recent access. The slot location pointer54B indicates the location of a slot that has been accessed. Therefore, when a certain slot has been accessed, the MP13arranges the slot the highest in the MRU information table54.

The LRU information table55indicates which slot has not been accessed most recently. That is, in the LRU information table55, the configuration is such that the slot that has not been accessed most recently is arranged higher. In other words, a slot that has been accessed most recently is arranged lower. The LRU information table55includes access history information55A and a slot location pointer55B. The access history information55A indicates the slot that has not been accessed most recently, a smaller number indicating a less recent access. The slot location pointer55B indicates the location of a slot that has not been accessed. All the slots in the NVRAM15are stored in either the MRU information table54or the LRU information table55.

The MRU information table54is configured so that the most recently accessed slot is arranged higher, but may be configured so that the number of accesses to a slot within a prescribed period of time is recorded and the slot that has been accessed the most number of times is arranged higher. Similarly, the LRU information table55is configured so that the slot that has not been accessed most recently is arranged higher, but may be configured so that the number of accesses to a slot within a prescribed period of time is recorded and the slot that has been accessed the least number of times is arranged higher.

FIG. 25shows a flowchart of a backup data selection process for selecting backup data of the main memory14in this embodiment. The same numbers will be assigned and explanations omitted for processing that is the same as the backup data selection process shown inFIG. 11; only the different processes will be explained.

After creating a backup data table60, the MP13reads the main memory management table40and the NVRAM management table150(S130). This makes it possible for the MP13to ascertain the amount of clean data and the amount of dirty data in the storage apparatus1.

When it has been determined that the main memory capacity is larger than the total amount of data (S31: NO), the MP13determines whether or not the number of segments including dirty data in the main memory14is equal to or less than the number of segments in the clean state in the NVRAM15(S131). When the number of segments including dirty data in the main memory14is equal to or less than the number of segments in the clean state in the NVRAM15(S131: YES), the MP13selects the segments including the dirty data as the backup data (S132). This makes it possible for the MP13to select and extract only the dirty data from among the segments, and to save all the dirty data using only a process for copying the segments without having to perform a transfer to the NVRAM15. The MP13is able to backup the dirty data by performing a process for releasing the clean-state segments in the NVRAM15and copying segments of the main memory14that includes dirty data. The MP13discards the backup data table60created in S30(S133). That is, the MP13backs up the data in segment units, thereby doing away with the need for information such as the head address of the backup data, and therefore discards the backup data table60.

FIG. 26shows a flowchart of a save destination selection process for selecting a backup data save destination from the NVRAM15in this embodiment. The same numbers will be assigned and explanations omitted for processing that is the same as the save destination selection process shown inFIG. 12; only the different processes will be explained.

First, the MP13determines whether or not a backup data table60exists on the main memory14(S140). When a backup data table60does not exist (S140: NO), that is, when the backup data table60was discarded in S133ofFIG. 26, the MP13creates a save destination list (S141). Thereafter, the MP13reads the NVRAM management table150(S142), and performs the process for selecting the save destination (S143). The clean area selection process of S143will be explained in detail below.

Alternatively, when the backup data table60exists (S140: YES), the MP13executes the processing of S40through S42that was explained usingFIG. 12, and performs the processes for selecting the save destination (S43, S141).

The MP13, in a case where the number of times obtained by adding 1 to the number of writes for the selected area is equal to or larger than the maximum number of writes possible (S49: YES), returns to the processing of S42when the route up to the processing of S49is the route for executing the processing of S40through S42, and returns to the processing of S143when the route is for executing the processing of S140and S141.

Also, in the processing of S51, the MP13reflects information related to the allocated user data in the save-destination data table70when the route up to the processing of S51is the route for executing the processing of S40through S42, and reflects information related to the slot and segment selected in S143in the save destination list when the route is for executing the processing of S140and S141.

FIG. 27shows a flowchart for a clean area selection process.

First, the MP13determines whether or not there is an unselected clean slot to serve as a save destination in the LRU information table55of the NVRAM management table150read via either the processing of S41or the processing of S141(S150). When an unselected clean slot exists in the LRU information table55(S150: YES), the MP13selects the highest clean slot (S151) and ends the clean area selection process.

Alternatively, when an unselected clean slot does not exist in the LRU information table55(S150: NO), the MP13determines whether or not there is an unselected clean slot to serve as a save destination in the MRU information table54(S152). When an unselected clean slot exists in the MRU information table54(S150: YES), the MP13selects the lowest clean slot (S151) and ends the clean area selection process. Selecting a clean slot in this way makes it possible to leave behind the frequently used clean slots, thereby enabling the cache hit rate to be improved after power is restored.

When an unselected clean slot does not exist in the MRU information table54(S152: NO), the MP13advances to the processing of S154. The processing of S154through S156is the same as that of S46through S48inFIG. 12, and as such, explanations will be omitted.

FIG. 28shows a flowchart of a data transfer process for transferring backup data from the main memory14to the NVRAM15in this embodiment. The same numbers will be assigned and explanations omitted for processing that is the same as the save destination selection process shown inFIG. 13; only the different processes will be explained.

First, the MP13determines whether or not a backup data table60exists in the main memory14(S160). When a backup data table60does not exist in the main memory14(S160: NO), that is, when the backup data table60was discarded in the processing of S133ofFIG. 25, the MP13reads the main memory management table40and the save destination list. Then, in the processing of S61, the MP13creates an instruction for copying a segment including dirty data in the main memory management table40to a segment in the save destination list. The main memory management table40, the NVRAM management table50, and the save destination list are included in the transfer target.

Alternatively, when a backup data table60exists in the main memory14(S160: YES), the MP13performs the processing of S60.

FIG. 29shows a flowchart of a backup data restoration process related by the MP13when power has been restored to this embodiment. The same numbers will be assigned and explanations omitted for processing that is the same as the save destination selection process shown inFIG. 13; only the different processes will be explained.

The MP13, in S70, determines whether or not a backup data table60, a save-destination data table70, or a save destination list are stored in the NVRAM15. When it has been determined that restoration data exists in the NVRAM15(S70: YES), the MP13determines whether or not a save destination table exists in the NVRAM15(S170). When a save destination table exists in the NVRAM15, the MP13executes the processing of S71through S73. That is, when a save destination table exists in the NVRAM15, all the user data or dirty data was saved.

Alternatively, when a save destination table does not exist in the NVRAM15, the MP13transfers the main memory management table40and the NVRAM management table50to the main memory14, and reconfigures the management tables49and50on the main memory14(S171). That is, the data saved to the NVRAM15in the data transfer process is not returned to the main memory14in the restoration process. This makes it possible to shorten the time it takes for the restoration process, and enables the host computer2to access the user data in the NVRAM15immediately after power has been restored.

The above embodiments have been explained in detail to illustrate the present invention in an easy-to-understand manner, and are not necessarily limited to embodiments including all the configurations that were explained. One part of the configuration of a certain embodiment can be replaced with the configuration of another embodiment. It is also possible to add the configuration of a certain embodiment to the configuration of another embodiment. Another configuration can be added, deleted, or substituted for one part of the configuration of each embodiment. For example, the configurations, functions, processing parts, and processing means and so forth described above may be realized using hardware by designing either all or a part thereof, for example, using an integrated circuit. Or, the above-described configuration, functions, and so forth may be realized using software in accordance with a processor interpreting and executing programs for realizing the respective functions.

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