System for switching between power supply units

A system for switching between first and second voltage supply units, the system may include a first interface unit that is connected between a first voltage supply unit and an output unit, a second interface unit that is connected between a second voltage supply unit and the output unit; a controller that is arranged to select a selected voltage supply unit and to instruct the first and second interface units and the output unit to facilitate a provision of a selected supply voltage provided from the selected voltage supply unit to a load coupled to the output unit. Each interface unit may include a positive input port, a negative input port, a positive output port and a negative output port. The negative and positive output ports of the first interface unit are isolated from the negative and positive output ports of the second interface unit, respectively.

BACKGROUND

Communication systems are expected to withstand various failures such as but not limited to voltage supply unit failures.

There is a need to provide a system that will allow a load (such as a load of a communication system) to be coupled to multiple voltage supply units in an efficient manner.

SUMMARY

According to an embodiment of the invention there may be provided a system for switching between first and second voltage supply units, the system may include: an output unit, a first interface unit, a second interface unit; and a controller. The first interface unit may be connected between the first voltage supply unit and the output unit. The second interface unit may be connected between the second voltage supply unit and the output unit. The controller may be arranged to select a selected voltage supply unit and to instruct the first and second interface units and the output unit to facilitate a provision of a selected supply voltage provided from the selected voltage supply unit to a load connected to the output unit. Each one of the first and second interface units may include a positive input port, a negative input port, a positive output port and a negative output port. A negative output port of the first interface unit may be isolated from a negative output port of the second interface unit. A positive output port of the first interface unit may be isolated from a positive output port of the second interface unit.

The first interface unit may include: (a) a first pair of electrical components that may include a first field-effect (FET) transistor and a first diode that are connected in parallel to each other; (b) a second pair of electrical components that may include a second FET transistor and a second diode. The first pair and the second pair are connected to each other in a sequential manner between the positive input port and the positive output port of the first interface unit; (c) a third pair of electrical components that may include a third FET transistor and a third diode that are connected in parallel to each other; and (d) a fourth pair of electrical components that may include a fourth FET transistor and a fourth diode; the third pair and the fourth pair are connected to each other in a sequential manner between the negative output and input ports of the first interface unit.

The forward direction of the first and third diodes may be opposite to a forward direction of the second and fourth diodes.

The second interface unit may include: (a) a fifth pair of electrical components that may include a fifth FET transistor and a fifth diode that are connected in parallel to each other; (b) a sixth pair of electrical components that may include a sixth FET transistor and a sixth diode. The fifth pair and the sixth pair are connected to each other in a sequential manner between the positive input port and the positive output port of the second interface unit; (c) a seventh pair of electrical components that may include a seventh FET transistor and a seventh diode that are connected in parallel to each other; and (d) an eighth pair of electrical components that may include an eighth FET transistor and an eighth diode. The seventh pair and the eighth pair are connected to each other in a sequential manner between the negative output and input ports of the second interface unit.

The forward direction of the fifth and seventh diodes may be opposite to a forward direction of the sixth and eighth diodes.

The controller may be arranged to prevent the supply the selected supply voltage until the selected supply voltage exceeds a predetermined minimal threshold.

The controller may be arranged to stop a provision of supply voltage from a non-selected voltage supply unit until the selected supply voltage exceeds a predetermined minimal threshold.

The system may include a boost generator that may be arranged to provide a boost signal of a value that exceeds values of first and second supply voltage supplied by the first and second voltage supply units; the boost signal may be used for controlling the first and second interface units.

The boost generator may be arranged to provide a boost signal that may be higher by a predetermined amount that a maximal voltage out of the first and second supply voltages.

The boost generator may be arranged to track the maximal voltage.

The output unit may be a hot swap unit that may be arranged to receive first and second supply voltages via the first and second interface units and to switch between the first and second supply voltages.

The hot swap unit may be arranged to gradually increase an output voltage and to check for a load short before providing an output voltage of a full value to the load.

According to an embodiment of the invention there may be provided a system for switching between first and second voltage supply units. The system may include an output unit, a first interface unit, a second interface unit; and a controller. The first interface unit may be connected between the first voltage supply unit and the output unit. The second interface unit may be connected between the second voltage supply unit and the output unit. The controller may be arranged to select a selected voltage supply unit and to instruct the first and second interface units and the output unit to facilitate a provision of a selected supply voltage provided from the selected voltage supply unit to a load connected to the output unit. Each one of the first and second interface units may include a positive input port, a negative input port, a positive output port and a negative output port. The first interface unit may include a (a) first pair of electrical components that may include a first field-effect (FET) transistor and a first diode that are connected in parallel to each other; (b) a second pair of electrical components that may include a second FET transistor and a second diode. The first pair and the second pair are connected to each other in a sequential manner between the positive input port and the positive output port of the first interface unit; (c) a third pair of electrical components that may include a third FET transistor and a third diode that are connected in parallel to each other; and (d) a fourth pair of electrical components that may include a fourth FET transistor and a fourth diode. The third pair and the fourth pair are connected to each other in a sequential manner between the negative output and input ports of the first interface unit.

The forward direction of the first and third diodes may be opposite to a forward direction of the second and fourth diodes.

The second interface unit may include: (a) a fifth pair of electrical components that may include a fifth FET transistor and a fifth diode that are connected in parallel to each other; (b) a sixth pair of electrical components that may include a sixth FET transistor and a sixth diode. The fifth pair and the sixth pair are connected to each other in a sequential manner between the positive input port and the positive output port of the second interface unit; (c) a seventh pair of electrical components that may include a seventh FET transistor and a seventh diode that are connected in parallel to each other; and (d) an eighth pair of electrical components that may include an eighth FET transistor and an eighth diode. The seventh pair and the eighth pair are connected to each other in a sequential manner between the negative output and input ports of the second interface unit.

The forward direction of the fifth and seventh diodes may be opposite to a forward direction of the sixth and eighth diodes.

DETAILED DESCRIPTION OF THE DRAWINGS

Any reference in the specification to a method should be applied mutatis mutandis to a system capable of executing the method.

Any reference in the specification to a system should be applied mutatis mutandis to a method that may be executed by the system.

FIG. 1illustrates first and second voltage supply units, a system and a load according to an embodiment of the invention.

System10may be used for switching between first and second voltage supply units10and20and may include:a. An output unit230.b. A first interface unit210.c. A second interface unit220.d. Controller200.e. Maximal voltage detector130.f. Voltage comparator140.g. Boost signal generator170.h. First voltage sensor150.i. Second voltage sensor160.j. First control signal driver180.k. Second control signal driver190.l. Output voltage sensor120.

The first interface unit210is coupled between the first voltage supply unit10and the output unit230. The second interface unit220is coupled between the second voltage supply unit20and the output unit230.

A positive output port11of the first power supply unit10is connected to a positive input port211of the first interface unit210.

A negative output port12of the first power supply unit10is connected to a negative input port212of the first interface unit210.

A positive output port21of the second power supply unit20is connected to a positive input port221of the second interface unit220.

A negative output port22of the second power supply unit20is connected to a negative input port222of the second interface unit220.

Positive output ports213and223of first and second interface units210and220respectively are connected to a positive input port231of output unit230.

Negative output ports214and224of first and second interface units210and220respectively are connected to a negative input port232of output unit230.

A positive output port233of the output unit230is connected to a positive input port31of the load30.

A negative output port234of the output unit230is connected to a negative input port32of the load30.

The first interface unit210disconnects both positive and negative ports (213and214) when it is not selected. The second interface unit220disconnects both positive and negative ports (223and224) when it is not selected. This prevents current to flow from one power supply unit to the other via the ports of the first and second interfaces. This may prevent a buildup of voltage on conductors that are connected to one or more of the power supply units.

According to an embodiment of the invention the negative output port214of the first interface unit210is isolated from a negative output port224of the second interface unit220. This isolation may allow the first and second interfacing units210and220to be positioned in a relatively large distance from the first and second voltage supply units10and20. Without such isolation the first and second interfacing units210and220should be located in proximity to the first and second voltage supply units10and20—in order to prevent the formation of large voltage differences between their shared negative input ports.

A first voltage sensor150is connected between the positive and negative output ports11and12of the first supply unit10. It outputs a first sensed voltage Vs1151that represents the first supply voltage V115supplied by the first voltage supply unit10.

A second voltage sensor150is connected between the positive and negative output ports11and12of the second supply unit20. It outputs a second sensed voltage Vs2161that represents the second supply voltage V225supplied by the second voltage supply unit20.

An output voltage sensor120is connected between the positive and negative output ports233and234of the output unit230. It outputs an output sensed voltage that represents the output voltage supplied by the output unit230.

The maximal voltage detector130finds a maximal voltage out of the first and second supply voltages V1and V2(given Vs1and Vs2) and then outputs a maximal voltage Vmax131that has a value that equals MAX(Vs1, Vs2).

Voltage comparator140compares between Vs1and Vs2and can provide an indicator to the controller200about the highest supply voltage out of V1and V2(given Vs1and Vs2). The voltage comparators140may include (or may be preceded by) filters that smooth Vs1and Vs2in order to allow the voltage comparator140to ignore noises and/or temporal spikes. The voltage comparator140may include (or may be followed by) a circuit for preventing fast changes in its indicator—especially to prevent the indicator from quickly alternating between different values. The circuit can be a hysteresis circuit.

Vmax131and DeltaV172are supplied to the boost signal generator170that outputs a boost signal Vboost171of a value that exceeds the maximal values of V1and V2by Vmax131. The boost signal Vboost171is used for controlling the first and second interface units210and220. It is used for switching switches that are fed by the first and/or second supply voltages.

Vboost171may be higher by a predetermined amount than Vmax131.

The controller200is arranged to select a selected voltage supply unit and to instruct the first and second interface units210and220and the output unit230to facilitate a provision of a selected supply voltage provided from the selected voltage supply unit to load30.

The controller can apply one or more protection schemes. This may include, for example, preventing the supply the selected supply voltage until the selected supply voltage exceeds a predetermined minimal threshold. Yet for another example, the controller may stop a provision of supply voltage from a non-selected voltage supply unit until the selected supply voltage exceeds a predetermined minimal threshold. Yet for a further example—the controller may include a circuit that prevent opening (selecting) both first and second supply voltages at the same time. A XOR gate may be connected to the control signals sent to first and second interface units210and210and may alert when the value of both control signals indicates that both interface units are selected.

The output unit30may be a hot swap unit that is arranged to receive first and second supply voltages V114and V225the first and second interface units210and220and to switch between the first and second supply voltages V1and V2.

According to an embodiment of the invention the hot swap unit is arranged to gradually increase an output voltage VO235and to check for a load short before providing an output voltage of a full value to the load. The hot swap unit can include a FET transistor231that is gradually opened in order to increase the value of VO235.

After a certain increment of VO235the hot swap unit can sense whether the voltage on the load30increase (by at least a predetermined amount)—and thus there is no short—and VO235may be further increased.

FIG. 2illustrates first and second interface units210and220according to an embodiment of the invention.

First interface unit210may include:a. A first pair of electrical components that comprise a first field-effect (FET) transistor210(1) and a first diode210(5) that are coupled in parallel to each other.b. A second pair of electrical components that may include a second FET transistor210(2) and a second diode210(6). The first pair and the second pair are coupled to each other in a sequential manner between the positive input port211and the positive output port213of the first interface unit210.c. A third pair of electrical components that comprise a third FET transistor210(3) and a third diode that are coupled in parallel to each other.d. A fourth pair of electrical components that may include a fourth FET transistor210(4) and a fourth diode210(8).e. A resistor210(10) and capacitor210(11) that are connected in parallel between the positive and negative output ports213and214of the first interface unit210. The third pair and the fourth pair are coupled to each other in a sequential manner between the negative output port214and the negative input port212of the first interface unit210.

The forward direction of the first and third diodes210(5) and210(7) is opposite to a forward direction of the second and fourth diodes210(6) and210(8).

Second interface unit220may include:a. A fifth pair of electrical components that comprise a fifth field-effect (FET) transistor220(1) and a fifth diode220(5) that are coupled in parallel to each other.b. A sixth pair of electrical components that may include a sixth FET transistor220(2) and a sixth diode220(6). The fifth pair and the sixth pair are coupled to each other in a sequential manner between the positive input port221and the positive output port223of the second interface unit220.c. A seventh pair of electrical components that comprise a seventh FET transistor220(3) and a seventh diode that are coupled in parallel to each other.d. A eighth pair of electrical components that may include an eighth FET transistor220(4) and an eighth diode220(8).e. A capacitor220(11) that are connected in parallel between the positive and negative output ports223and224of the second interface unit220. The seventh pair and the eighth pair are coupled to each other in a sequential manner between the negative output port234and the negative input port232of the second interface unit220.

The forward direction of the fifth and seventh diodes220(5) and220(7) is opposite to a forward direction of the sixth and eighth diodes220(6) and220(8).

The opposite forward directions of diodes210(5),210(6),210(7) and210(8) prevents the leakage of current through the diodes between the positive and negative input ports (211and212) and positive and negative output ports (213and214) of the first interface unit210and increases the isolation between these ports.

The opposite forward directions of diodes220(5),220(6),220(7) and220(8) prevents the leakage of current through the diodes between the positive and negative input ports (221and222) and positive and negative output ports (223and224) of the second interface unit220and increases the isolation between these ports. This also prevents a short from occurring regardless of the polarity of the load.

The inclusion of four pairs of FET and diodes per each interface unit decreases the possibility of shorts that will virtually couple the positive and negative ports of an interfacing unit.

FIG. 3illustrates a first pair of FET transistor210(1) and diode210(5) and a portion180′ of first control signal driver180that drives control signals to the first pair, according to an embodiment of the invention.

Portion180′ includes: (a) an input stage that include bipolar transistor180(1) and resistor180(2); (b) an intermediate stage that includes resistor180′(5), FET transistor180(3), diode180(4), resistors180(5),180(6), capacitor180(7) and a buffer stage that includes a first and second bipolar transistors181(4) and181(1) and resistors181(2) and181(3); and final stage that include resistors182(1) and182(4) and diodes182(2) and182(3).

The emitter of transistor181(1) receives Vboost171and this allows the transistor181(1) to switch a control signals that may equal to Vmax.

The base of bipolar transistor180(1) receives control signal CNTR1201from controller200, the collector is grounded and its emitter is connected to second end of resistor180(1) and to a first end of resistor180′(5). The second end of resistor180′(5) is connected to a base of FET transistor180(3).

The FET transistor180(3) is connected in parallel to diode180(4) and is further connected between the ground and first ends of resistors180(5) and180(6).

The second end of resistor180(6), the emitter of bipolar transistor181(1) and the first end of capacitor180(7) receive Vboost171.

The bases of bipolar transistors181(1) and181(4) are connected to a second end of resistor180(5). The collector of bipolar transistor181(1) is grounded and resistors181(2) and181(3) are connected in sequence between the collector of bipolar transistor181(4) and the emitter of bipolar transistor181(1). The node that connects resistors181(2) and181(3) is connected to first ends of resistors181(1) and181(4).

The second end of resistor182(1) is connected to a cathode of diode182(2) and to the base of first FET transistor210(1). The second end of resistor184(1) is connected to a cathode of diode182(3) and to the base of second FET transistor210(2). The anodes of diodes182(2) and182(3) are connected to a node that connects the first and second pairs of components.

Portion180′ of first control signal driver180has to steady states—open and closed. When closed—CNTR1201is reset (zero), bipolar transistor180(1) is closed, the base of FET transistor180(3) receives a high signal (of about 10 volts) and conducts so as to cause the bases of bipolar transistors181(1) and181(4) to receive a low voltage. This causes bipolar transistor181(4) not to conduct and bipolar transistor181(1) to conduct—so that FET transistors210(1) and210(2) are discharged via bipolar transistor181(1).

When opened—CNTR1201is set (one), bipolar transistor180(1) is open, the base of FET transistor180(3) receives a low signal and does not conduct so as to cause the bases of bipolar transistors181(1) and181(4) to receive a voltage of about Vboost171. This causes bipolar transistor181(1) not to conduct and bipolar transistor181(4) to conduct—so that FET transistors210(1) and210(2) receive at their bases a voltage that may be substantially equal to Vboost and thus conduct.