Low-loss rectifier with optically coupled gate shunting

A rectifier circuit (400) is provided. The rectifier circuit is comprised of a plurality of field effect transistors (102, 104, 106, 108) coupled together to define a rectifier circuit. The rectifier circuit is also comprised of a control circuit (600) and a switching device (420, 430, 440, 450). The switching device is configured to selectively disable a conduction channel extending between a source and a drain of at least one of the field effect transistors in response to the control circuit to prevent a shoot-through current in the rectifier circuit.

BACKGROUND OF THE INVENTION

1. Statement of the Technical Field

The inventive arrangements relate to MOSFET circuits, and more particularly to a circuit for AC voltage rectification and shoot-through current protection.

2. Description of the Related Art

Bridge rectifier type devices are typically used to convert an AC waveform into a DC waveform. Such bridge rectifier type devices often utilize diode components to perform the rectification function. After an AC signal is rectified, the output signal is often filtered to remove unwanted spectral content and to produce a DC voltage, A filtering device utilizing capacitor components, resistor components, and/or inductor components are typically used for this purpose.

Despite the various technologies known in the art, there remains a need for a MOSFET bridge rectifier type device that can rectify a domestic AC input (for example, 120V, 60 Hz) and/or a foreign AC input (for example, 230V, 50 Hz) with low power loss. However, rectification of an AC signal with a MOSFET type bridge rectifier can create potentially damaging current spikes in an input current. For example, a shoot-through current may result at a zero crossing of an input voltage. The shoot-through current can occur when MOSFETs conduct simultaneously during transitions. The shoot-through current can produce a current spike through the drain of each MOSFET component. This current spike causes a relatively large amount of stress on the MOSFET devices. As a result, at least one of the simultaneously conducting MOSFETs can be damaged. In this regard, a MOSFET bridge rectifier type device is also needed with a shoot-through protection circuit to eliminate the amount of stress on the MOSFET devices during transitions.

SUMMARY OF THE INVENTION

The invention concerns a rectifier circuit. The rectifier circuit is comprised of a plurality of field effect transistors. The field effect transistors are coupled together to define the rectifier circuit. For example, the rectifier circuit can be a full wave bridge rectifier. The rectifier circuit is also comprised of a control circuit and at least one switching device. The switching device is configured to selectively disable a conduction channel extending between a source and a drain of at least one of the field effect transistors in response to the control circuit to prevent a shoot-through current in the rectifier circuit.

According to an aspect of the invention, the switching device is coupled between a gate and source of the field effect transistor. The switching device disables the conduction channel by forming a low resistance path between the gate and source of the field effect transistor. The switching device is advantageously comprised of a phototransistor and a light emitting diode coupled to the control circuit. The light emitting diode and phototransistor comprise a photocoupler.

According to another aspect of the invention, the control circuit is comprised of at least a zero-crossing detector circuit. The zero-crossing detector circuit is configured to detect when an input voltage of the rectifier circuit is within a predetermined range approximating a value around zero (0) volts. The zero-crossing detector circuit comprises at least one voltage reference device for establishing a voltage reference for determining a zero crossing. A comparator is coupled to the voltage reference.

The invention also concerns a method for controlling a shoot-through current in a rectifier circuit constructed from a plurality of field effect transistors. The method includes a determining step. The determining step involves determining a time period associated with a zero crossing of an instantaneous voltage defining an AG input of the rectifier circuit. This time period is determined in a voltage domain by measuring when an input voltage crosses a threshold voltage level associated with a zero crossing. The method also includes a disabling step. The disabling step involves selectively disabling a conduction channel extending between a source and a drain of at least two of the field effect transistors. This disabling of the conduction channel is responsive to the determination of the time period associated with the zero crossing of an instantaneous voltage.

According to an aspect of the invention, the method includes disabling the conduction channel during at least a portion of the time period. The method also includes selecting the time period to include a moment in time when the zero crossing actually occurs. The method further includes selecting a beginning of the time period to occur a predetermined duration before the zero crossing actually occurs. The predetermined duration is determined in a voltage domain by measuring when an input voltage crosses a threshold voltage associated with the zero crossing.

According to another aspect of the invention, the method includes selecting the predetermined duration to correspond to a response time necessary to perform the disabling step. The determining step further comprises determining when the instantaneous voltage is within a predetermined range approximating a value around zero (0) volts. The disabling step further includes forming a low resistance path between a gate and source of the field effect transistor. The method also includes generating a control signal responsive to the determination of a zero crossing of an instantaneous voltage. The method further includes forward biasing a light emitting diode with the control signal to generate a photonic emission from the light emitting diode.

According to yet another aspect of the invention, the method includes exciting a phototransistor with the photonic emission to form a low resistance path between a gate and source. The method also includes selecting the rectifier circuit to include four field effect transistors. The method further includes arranging the field effect transistors to form a full wave bridge rectifier.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

A transistor active bridge circuit100is shown inFIG. 1. The circuit100shown is useful for a variety of purposes, including rectification of a domestic AC input (for example, 120V, 60 Hz) and/or foreign AC input (for example, 230V, 50 Hz) with low power loss. As may be observed inFIG. 1, circuit100is connectable between a pair of input lines103,105and a pair of output lines134,136.

Circuit100includes first and second field effect transistors102,104of a first channel type. The transistor active bridge circuit also includes third and fourth field effect transistors106,108of a second channel type that is different from the first channel type. For example, the first and second field effect transistors102,104can be P-channel type whereas the third and fourth field effect transistors106,108can be N-channel type. Each of the field effect transistors can be enhancement mode devices. For example, the P-channel type transistor can be model number Si7431DP, which is available from Vishay Intertechnology, Inc. of Malvern, Pa. The N-channel device can be Si4490DY, which is also available from Vishay Intertechnology, Inc. Still, it should be understood that other types of field effect transistors can also be selected depending upon the anticipated voltage and current handling requirements of circuit100.

As will be understood by those skilled in the art, each of field effect transistor102,104,106,108will have three terminals respectively defined as a source, gate and drain. With regard to field effect transistor102, the source, gate and drain terminals are respectively identified with reference numbers138,139, and140. With regard to field effect transistor104, the source, gate and drain terminals are respectively identified with reference numbers142,143, and144. The source gate and drain terminals of transistor106and108are respectively identified as146,147,148and150,151,152. An electrical path can be provided from the source to the drain of each field effect transistor102,104,106, and108. This path is generally referred to herein as the source-drain path. Although not always shown in schematic illustrations, field effect transistor devices, such as MOSFETs typically have an intrinsic body diode that results from the manner in which the devices are manufactured. This intrinsic body diode206,208is illustrated inFIGS. 2A and 2Bfor a P-channel202and N-channel device204. The importance of this body diode will become clear in the discussion below regarding the detailed operation of the circuit.

Referring again toFIG. 1, it can be observed that a source-drain path of first field effect transistor102can be connected in series with a source-drain path of the second field effect transistor104. The series connected transistor pair102,104form a first series transistor combination that can be connected across the input lines103,105. A source-drain path of the third field effect transistor106can be connected in series with a source-drain path of the fourth field effect transistor108to form a second series transistor combination connected across the input lines103,105.

The circuit100can have an output defined by output lines134,136. A first one of the output lines134can be connected to the first series combination102,104at an interconnection point154between the first and the second field effect transistors102,104. A second one of the output lines136can be connected to the second series combination106,108at an interconnection point156between the third and fourth field effect transistors106,108.

A voltage divider circuit can be provided for each of the field effect transistors102,104,106,108. The voltage divider circuit can be comprised of a first resistor and a second resistor connected in series. However, those skilled in the art will appreciate that numerous different types of voltage dividers circuits are possible and can be used for the purposes as hereinafter described. The voltage divider circuit for the first field effect transistor102can include first resistor110and second resistor112. The voltage divider circuit for the second field effect transistor104can include first resistor114and a second resistor116. Similarly, the voltage divider circuit for the third and fourth field effect transistors106,108can include first resistors118,122and second resistors120,124.

InFIG. 1, the first and second resistors are connected in series from a source of each field effect transistor to one of the input lines. For example, the resistor combination110,112is connected to source138of field effect transistor102to input line105. The resistor combination114,116is connected to source142of field effect transistor of104to input line103. Each voltage divider advantageously provides a bias voltage tap158,160,162, and164. For example, if a resistive voltage divider is used as shown inFIG. 1, then, the bias voltage tap can be provided at a connection point between the first and second resistors. The bias voltage tap158,160,162,164of each voltage divider is connected to a gate139,143,147,151of each respective one of the field effect transistors. Consequently, the bias voltage tap158,160,162,164advantageously provides a substantially reduced voltage output relative to the input voltage applied to the voltage divider circuit100by power source101. For example, the bias voltage tap of the voltage divider can provide an output that is reduced by 10% to 90% relative to the input voltage.

Notably, the transistor active bridge circuit100is not limited to any particular range of voltage reduction by the voltage divider. The purpose of the voltage divider is to permit a relatively larger range of input voltages to be applied across input lines103,105without producing excessively high voltage levels between the gate and source of each held effect transistor. However, the voltage divider should still produce a bias voltage between each transistor gate139,143,147,151and a respective source138,142,146,150that is of sufficient magnitude to self bias each transistor for a predetermined range of input voltage applied across the input lines103,105. For example, the first resistor110,114,118,122can be selected to be about 100 kΩ and the second resistor112,116,120,124can be selected to be about 30 kΩ. This combination will provide a voltage reduction of about 23%. Still, those skilled in the art will appreciate that a variety of other voltage divider values can and should be used depending upon the design criteria for input voltage range and transistor specifications.

Circuit100can also include a voltage clamping circuit to ensure that the voltage applied, gate to source, across each of the field effect transistors does not become excessively large as the input voltage is increased. Any suitable voltage clamping circuit can be used for this purpose. For example, the voltage clamp could be simply implemented as a zener diode126,128,130,132that is connected in parallel with first resistor110,114,118,122between the gate and the source of each respective one of the field effect transistors102,104,106,108.

The zener diodes126,128,130,132can ensure that the voltage between the gate and source terminals is limited. For example, the zener diode can prevent the voltage between the gate and source of each field effect transistor102,104,106,108from exceeding a predetermined threshold voltage defined by the reverse breakdown voltage of the zener diode. A further advantage of using a voltage clamp as described herein is it allows adequate bias voltage levels to be developed between the gate139,143,147,151and the source138,142,146,150, of each field effect transistor102,104,106,108, even with relatively low input voltages across lines103,105. For example, the voltage divider can be designed to allow a relatively large proportion of the input voltage (e.g. 70%) to appear at bias voltage tap158,160,162,164. The larger proportion of voltage ensures that the field effect transistors will be biased to their on state, even with relatively low input voltages from power source101. In order to ensure that this larger proportion of voltage does not damage the field effect transistors when considerably higher input voltages are applied to the circuit100, the clamping circuit (zener diode126,128,130,132inFIG. 1) can clamp the output of the voltage divider at a predetermined level.

The operation of the circuit100will now be described in greater detail. When input line103is positive relative to input line105, an intrinsic body diode associated with each of the field effect transistors102and108will be forward biased and current will begin to flow between the drain and source of these devices. This will produce a voltage at bias voltage tap158,164as current begins to flow through the voltage divider circuits associated with the respective field effect transistors102,103. The voltage produced at the voltage tap158,164can be used to self bias the field effect transistors102,108, thereby switching these transistors to their “on” state. When switched to their on state, a relatively low resistance path is created between drain140,152and source138,150of field effect transistors102,108. The exact amount of this resistance will depend upon several factors, including the specified drain-source on state resistance of the field effect transistors. For example “on” state resistance values of between 0.5 mΩ and 10Ω are typical for such devices. Generally P channel devices have a slightly higher resistance as compared to N channel devices. Once turned on, however, current will continue to flow between the drain and source of transistors102,108through the low resistance path, thereby eliminating the voltage drop associated with the body diode. Consequently, if a load is connected across output lines134,136the voltage drop caused by the bridge circuit can be considerably less than the typical diode drop associated with a conventional diode bridge. In this regard, if may be noted that in a conventional diode bridge circuit, the output voltage drop will include two diode drops. Accordingly, the voltage drop in a conventional diode bridge can be in the range from 1.2V to 1.6V or more.

If the input voltage applied across input lines103,105is sufficiently high, it will exceed a reverse breakdown voltage of zener diodes126,132. This will cause the zener diodes to clamp the voltage applied across the gate to source terminals of each field effect transistor102,108. When the input voltage polarity is reversed, field effect transistors102,108will be switched off, and field effect transistors104,106will turn on in a manner similar to that described above.

Referring now toFIG. 3, a time graph is provided that shows a shoot-through current resulting at a zero crossing of an input voltage (Vin) and an input current (Iin) applied by an external power source. The shoot-through current can occur when the field effect transistors102,104or106,108conduct simultaneously. For example, a large transient shoot-through current can flow directly from the external power source connected to input lines103,105when the field effect transistor104is biased to its “on” state (i.e., conducting state) before the field effect transistor102has fully transitioned info a state of cutoff (i.e., non-conducting state), it should be appreciated that this can occur as a result of a field effect transistors parasitic capacitance discharging through the bias network. In such a scenario, a short circuit is created across the input lines103,105between the source-drain paths of the field effect transistors102,104. As a result, at least one of the simultaneously conducting field effect transistors102,104may be damaged, a fuse can be blown, a breaker can be tripped, and/or an external power source can experience an overload. Therefore, a shoot-through protection circuit is needed to prevent the field effect transistors102,104and106,108from conducting simultaneously during transitions. Such a circuit is shown inFIG. 4.

A transistor active bridge circuit400with shoot-through current protection is shown inFIG. 4. The transistor active bridge circuit400is arranged as a full wave bridge rectifier. The components of transistor active bridge circuit400are generally similar to those of transistor active bridge circuit100, and thus, the description above will suffice with respect to the similar components which are identified with like reference numbers. In addition, the transistor active bridge circuit400includes a shoot-through protection circuit for each field effect transistor102,104,106,108.

According to an embodiment of the invention, the shoot-through protection circuit can be comprised of one or more switching devices420,430,440,450coupled to each field effect transistor102,104,106,108. The switching devices420,430,440,450are advantageously connected between the gate and source of each respective one of the field effect transistors102,104,106,108. The switching devices420,430,440,450are configured to selectively disable a conduction channel extending between a source and drain of each respective one of the field effect transistors102,104,106,108in response to a control signal to prevent a shoot-through current in the transistor active bridge circuit400. As used herein, the phrase “conduction channel” means a low resistance conduction path in which electrons flow from a source and drain of a field effect transistor. The switching devices420,430,440,450disable the conduction channel by forming a low resistance path between the gate and source of each respective one of the field effect transistors102,104,106,108. As used herein, low resistance can refer to any resistance value which is sufficiently low to disable a conduction channel.

According to an embodiment of the invention, each switching device can be an optically controlled device. For example, the switching devices can be comprised of high isolation voltage transistor type photocoupler, such as a PS2501 photocoupler available from NEC Corporation, of Tokyo, Japan. The PS2501 photocoupler is comprised of a NPN silicon phototransistor and a GaAs light emitting diode. Still, the invention is not limited in this regard. The shoot-through protection circuit is also comprised of a control circuit (not shown inFIG. 4) coupled to the switching devices420,430,440,450. The control circuit is arranged to selectively activate the switching devices in response to the AC input voltage across input lines103,105transitioning through a zero crossing point.

The shoot-through protection circuit shall now be described in further detail with reference toFIG. 4. As shown inFIG. 4, each switching device420,430,440,450can be comprised of an NPN phototransistor460,470,480,490and a light emitting diode462,472,482,492. Each switching device420,430,440,450has four ports. A first port418,434,436,448of each switching device420,430,440,450is coupled to an emitter of a respective NPN phototransistor460,470,480,490. A second port416,432,438,446of each switching device420,430,440,450is coupled to a collector of a respective NPN phototransistor460,470,480,490. In effect, an electrical path is provided between the first ports418,434,436,448and the second ports416,432,433,446, herein after referred to as a collector-emitter path. A third port424,426,444,452of each switching device420,430,440,450is coupled to an anode of a respective light emitting diode462,472,482,492. A fourth port422,428,442,454is coupled to a cathode of a respective light emitting diode462,472,482,492. In effect, an electrical path is provided between the third ports424,426,444,452and the fourth ports422,428,442,454, hereinafter referred to as an anode-cathode path.

Referring again toFIG. 4, if can be observed that a collector-emitter path of each switching device420,430,440,450is connected in parallel with each respective one of the resistors110,114,118,122and zener diodes126,128,130,132. The collector-emitter path of switching devices420,430,440,450is also connected between the gate and source of each respective one of the field effect transistors102,104,106,108. The switching device420ensures that the field effect transistor102has fully transitioned into a cutoff state (i.e., a non-conducting state) before the field effect transistor104is biased to its “on” state (i.e., a conducting state). For example, the switching device420shorts field effect transistor's102gate139to source138when the NPN phototransistor460is in an “on” mode. The NPN phototransistor460is transitioned into the “on” mode when it detects light. The light is provided by the light emitting diode462when the light emitting diode is electrically biased in a forward direction. Notably, the light emitting diode462is electrically biased in the forward direction by means of the control circuit (not shown inFIG. 4) whenever the control circuit detects that the instantaneous AC input voltage across input lines103,105gets close to a zero value.

When NPN phototransistor460is in an “on” mode, current will begin to flow between the collector416and emitter418. In effect, the NPN phototransistor460will act like a closed switch. When this occurs, the field effect transistor102turns “off.” Consequently, the conduction path (conduction channel) between the source138and drain140is eliminated (or disabled), but the field effect transistor's102body diode path remains. This process eliminates the shoot-through current by ensuring that there is never a time when the source drain paths of field effect transistors102and104are both conducting at the same time. Similarly, the switching device450can ensure that the field effect transistor108has fully transitioned into a cutoff state before the transistor106is biased to its “on” state. This eliminates shoot-through current by ensuring that them is never a time when the source dram paths of the field effect transistors106and108are both conducting at the same time.

The operation of the switching devices430,440is similar to the operation described above with regard to switching devices420,450. In particular, the switching device430can ensure that field effect transistor104has fully transitioned into a non-conducting state before field effect transistor102is biased to its “on” state. Likewise, the switching device440can ensure that the field effect transistor106has fully transitioned into it's “off” state before the field effect transistor108is biased to its “on” state. Accordingly, the possibility of shoot-through current is eliminated.

According to the embodiment shown inFIG. 4, the NPN phototransistors460,470,480,490are all transitioned into their “on” and their “off” state concurrently. It will be appreciated that in such an embodiment, a single control circuit can advantageously be used for controlling all of the switching devices420,430,440,450. For example, a control circuit600is shown inFIG. 6which can be used for this purpose. However, it should be appreciated that the invention is not limited in this regard. For example, transistor pair102,108can each be controlled using a separate control signal as compared to transistors104,106. In such a scenario, the switching devices420,450can be respectively controlled by different control circuits. The use of two separate control circuits (or at least separate control signals) can allow the NPN phototransistors460,490to be transitioned into their “on” mode while the NPN phototransistors470,480remain in their “off” mode, and vise versa.

The operation of the circuit400will now be described in greater detail. When input line103is positive relative to input line105, an intrinsic body diode associated with each of the field effect transistors102and108will be forward biased and current will begin to flow between the drain and source of these devices. This will produce a voltage at bias voltage tap158,164as current begins to flow through the voltage divider circuits associated with the respective held effect transistors102,108. The voltage produced at the voltage tap158,164can be used to self bias the field effect transistors102,108, thereby switching these transistors to their “on” state. When switched to their “on” state, a relatively low resistance path is created between drain140,152and source138,150of field effect transistors102,108. The exact amount of this resistance will depend upon several factors, including the specified drain-source “on” state resistance of the field effect transistors. For example, “on” state resistance values of between 0.5 mΩ and 10Ω are typical for such devices. Generally, P channel devices have a slightly higher resistance as compared to N channel devices. Once turned on, however, current will continue to flow between the drain and source of transistors102,108through the low resistance path, thereby eliminating the voltage drop associated with the body diode. Consequently, if a load is connected across output lines134,136the voltage drop caused by the bridge circuit can be considerably less than the typical diode drop associated with a conventional diode bridge. In this regard, it may be noted that in a conventional diode bridge circuit, the output voltage drop will include two diode drops. Accordingly, the voltage drop in a conventional diode bridge can be in the range from 1.2V to 1.6V.

If the input voltage applied across input lines103,105is sufficiently high, it will exceed a reverse breakdown voltage of zener diodes126,132. This will cause the zener diodes to clamp the voltage applied across the gate to source terminals of each field effect transistor102,108.

A control circuit (not shown inFIG. 4) can provide a control current which will flow through a current path including the control lines496and498. When the control circuit detects that the instantaneous input voltage across AC input lines103,105is approaching a zero crossing, the control circuit will provide a control voltage at control line496which is positive relative to control line498. Consequently, current will begin to flow between the anode424,426,444,452and cathode422,428,442,454of each light emitting diode462,472,482, and492. Consequently, each light emitting diode462,472,482,492will generate a photonic emission (emit light) for exciting a respective one of the phototransistors460,470,480,490. When light is detected by each phototransistor460,470,480,490, each of the phototransistors460,470,480,490will be biased to it's “on” state and current will begin to flow between the collector and emitter of each device. In effect, each of the phototransistors460,470,480,490will act like a closed switch. Consequently, the phototransistors460,490will short the gate and source terminals of the respective field effect transistors102,108such that the conduction path is eliminated (or disabled) between the field effect transistors102,108source138,150and drain140,152, respectively. However, the body path diodes of the field effect transistors102,108remain. In this regard, it should be appreciated that the circuit400behaves in a manner similar to a standard diode bridge when the phototransistors460,470,480,490are biased to their “on” states.

When input line103is negative relative to input line105, field effect transistors102,108will be switched off, and field effect transistors104,106will turn on in a manner similar to that described above with regard to field effect transistors102,108. Current will flow from the field effect transistor104to a load connected across output lines134,136and return through field effect transistor106. After a zero crossing of AC voltage source101has occurred and there is no immediate risk of current shoot-through, the control circuit can change the control current applied to the light emitting diodes462,472,482,492. In particular, the control circuit (not shown inFIG. 4) can form an open circuit so that the light emitting diodes462,472,482,492will stop emitting light. When the phototransistors460,470,480,490stop detecting light, they will be biased to their “off” states. In this “off” state, the phototransistors460,470,480,490will act like an open switch. In effect, current will stop flowing between the collector and emitter of the phototransistors460,470,480,490. This will allow the field effect transistors104,106to be biased into an on state in which a relatively low resistance path is created between the respective drains148,144and sources142,146of field effect transistors104,106.

FIG. 5is a time graph plotting an input voltage and an input current to the transistor active bridge circuit400. As shown inFIG. 5, the shoot-through current ofFIG. 3has been eliminated through the implementation of shoot-through protection devices420,430,440,450and a control circuit (described below in relation toFIG. 6).

As noted above, the shoot through protection circuit advantageously includes at least one control circuit. The control circuit is advantageously configured to activate the switching devices420,430,440,450when the instantaneous AC input voltage across input lines103,105gets close to a zero (0) value. Ideally, the value at which the switching devices are activated (switch closed) should be as close to zero (0) as possible, while still allowing for a sufficient response time to activate the switches and prevent shoot through current. According to one (1) embodiment, the control circuit can be configured to activate the switching devices420,430,440,450when the instantaneous value of the AC input voltage is about one (1) or two (2) volts. However, the optimum value in each instance will depend on a variety of design factors. Accordingly, the invention is not limited in this regard and other values can also be used.FIG. 6shows one example of a suitable control circuit. However, it should be understood that any suitable control circuit can be used, provided that it is capable of controlling the switching devices420,430,440,450as described herein.

Referring now toFIG. 6, there is provided is a schematic representation of a control circuit600for each of the switching devices420,430,440,450. The control circuit600has input lines602,604which are respectively coupled to output lines134,136of the transistor active bridge circuit400. Thus, the voltage appearing across input lines602,604will have the form of a rectified sine wave as shown.

The control circuit600also includes a pair of output lines606,608which are respectively connected to control lines496,498of the transistor active bridge circuit400. The control circuit600is configured to generate a control signal for controlling the switching devices420,430,440,450. In this regard, if should be appreciated that the control circuit600provides a control current which positively biases the light emitting diodes462,472,482,492each time the rectified sine wave input signal at input lines602,604approaches a zero (0) value. The control circuit forms an open circuit to effectively eliminate the control current applied to the light emitting diodes462,472,482,492when the rectified sine wave input signal at input lines602,604is not close to a zero (0) value. Those skilled in the art will appreciate that control circuit600can be any suitable control circuit provided that it is capable of providing control currents as described herein.

Referring now toFIG. 7, there is provided a schematic representation of one example of a suitable control circuit600which can be used in connection with the present invention. However, it should be understood that the invention is not limited in this regard. As shown inFIG. 7, the control circuit600is comprised of a voltage reference708and a comparator722. It should be understood that the voltage reference708and comparator722collectively provide a zero-crossing detector circuit. The zero-crossing detector circuit is configured to detect when an input voltage of the transistor active bridge circuit400is approaching within a predetermined range approximating a value around zero (0) volts. The control circuit600is also comprised of a shunt regulator704, resistors,702,720, a capacitor706, a zener diode734, and a voltage divider circuit740.

The components702,704,706are provided for regulating the rectified sine wave input voltage. As shown inFIG. 7, a resistor702is connected in series with input line602. The resistor702ensures that a current through the shunt regulator704will not exceed a maximum amount of current that is within a safe operating capability of the shunt regulator704. According to one embodiment, the shunt regulator can be a zener diode.

As shown inFIG. 7, the shunt regulator704is connected in parallel with the capacitor706. The capacitor706is provided for creating a substantially smooth DC voltage Vauxby filtering the rectified sine wave input voltage appearing on input lines602,604. The capacitor706is connected in series with the resistor702. The resistor702and capacitor706collectively provide an RC circuit. RC circuits are well known to persons skilled in the art, and therefore will not be described in great detail herein. The shunt regulator704serves as a control device to regulate the voltage across the voltage reference708and the comparator722. As should be understood, the shunt regulator704begins conducting at a specified voltage. The shunt regulator704will hold its terminal voltage at the specified voltage. It should be understood that the voltage regulation can be shunt or series. Accordingly, the shunt regulator704can include a zener diode or any other suitable voltage regulator device. Still, the invention is not limited in this regard.

Referring again toFIG. 7, the capacitor706is electrically coupled to the voltage reference708. The voltage reference708is comprised of a V+terminal710, a V−terminal712, and an output terminal714. The V+terminal710and the V−terminal712are connected in parallel with the shunt regulator704and capacitor706. As such, the substantially smooth direct voltage Vauxis provided at output terminal606. When the voltage at the V+terminal710is positive relative to the V−terminal712, the voltage reference708produces a highly regulated output voltage at its output terminal714. The output voltage is of a constant value irrespective of a fluctuation in value of the voltage Vaux. According to an embodiment of the invention, the voltage reference708is a series reference. The series reference is selected as an AD582 high precision voltage reference available from Analog Devices of Norwood, Mass. Still, the invention is not limited in this regard. For example, the voltage reference708can alternatively be selected as a shunt reference.

As shown inFIG. 7, the output terminal714of the voltage reference708is electrically coupled to the comparator722through the voltage divider circuit740. The comparator722is preferably a low power, low offset voltage comparator. For example, the comparator722can be an LM339 comparator available from National Semiconductor Corporation, of Santa Clara, Calif. Still, the invention is not limited in this regard. The comparator722can be comprised of any circuit known in the art, provided that it has suitable specifications for a particular control circuit600application.

Referring again toFIG. 7, the comparator722is comprised of a non-inverting input terminal724, an inverting input terminal726, a V+terminal728, a V−terminal730, and an output terminal732. The non-inverting input terminal724is electrically coupled to the rectified sine wave input voltage through the resistor720. The inverting input terminal726is electrically coupled to the voltage reference708through the voltage divider circuit740. As shown inFIG. 7, the V+terminal728of the comparator is coupled to the regulated voltage provided by the shunt regulator704. The V−terminal730is coupled to the input line604.

According to an aspect of the invention, the comparator722is an open collector type device. In this regard it should be appreciated that if a voltage at the non-inverting input terminal724is more positive than a voltage of the inverting input terminal726, then the output of the comparator722is an open circuit. Alternatively, if a voltage at terminal724is less positive than a voltage at terminal726, then VOUTis forced to the comparator's negative saturation level.

As shown inFIG. 7, the circuit600can include a voltage clamping circuit to ensure that the voltage at the non-inverting input terminal724of the comparator722does not become excessively large as the pulsating voltage generated by the voltage source101is increased. Any suitable voltage clamping circuit can be used for this purpose. For example, the voltage clamp could be simply implemented as a resistor720connected in series with a zener diode734. The resistor720and zener diode734can ensure that the voltage between the input line604and the non-inverting input terminal724is limited so that the comparator722is not damaged.

As shown inFIG. 7, a voltage divider circuit740is provided between the voltage reference708and the inverting input terminal726of the comparator722. The voltage divider circuit is comprised of a first resistor716and a second resistor718connected in series. However, those skilled in the art will appreciate that numerous different types of voltage dividers circuits are possible and can be used without limitation.

The first resistor716is connected to the output terminal714of the voltage reference708and to the inverting input terminal726of the comparator722. The second resistor718is connected to the inverting input terminal726of the comparator722and to the input line604. The voltage divider circuit advantageously provides a voltage tap760. For example, if a resistive voltage divider circuit is used as shown inFIG. 7, then the voltage tap can be provided at a connection point between the first and second resistors716,718. The voltage tap760advantageously provides a reduced voltage output relative to the input voltage applied to the voltage divider circuit by the voltage reference708. For example, the voltage tap760of the voltage divider circuit740can provide an output that is reduced by ten percent (10%) to ninety percent (90%) relative to the output voltage of the voltage reference708.

If a resistive voltage divider is used as shown inFIG. 7, then the voltage at the inverting input terminal726(V726) can be expressed by a mathematical Equation (1):
V726=V708×[R716/(R716+R716)]  (1)
where V708is the output voltage of the voltage reference708. R716is the resistance value of the resistor716. R718is the resistance value of the resistor718.

As shown inFIG. 7, the output terminal732of the comparator722is electrically coupled to a current limiting resistor736. The current limiting resistor is coupled to output line608. The output line608is connected to control line498inFIG. 4.

The operation of the circuit600will now be described in greater detail. The voltage divider circuit740provides a highly regulated output voltage at a voltage tap760which is coupled to the V−terminal726of the comparator722. This highly regulated voltage is used as a threshold voltage to determine when an instantaneous voltage of the rectified sine wave at input lines602,604is approaching zero (0) volts, for example, the voltage appearing at voltage tap760can be selected to be around one (1) or two (2) volts.

The rectified sine wave input voltage is applied to V+terminal724. When the instantaneous value of the rectified sine wave input voltage at terminal724is more positive as compared to the voltage at the V+terminal726, then the output of the comparator722is an open circuit and the light emitting diodes462,472,482,492will not be forward biased. However, when the instantaneous voltage of the rectified sine wave applied to V+terminal724is less positive compared to the voltage at the V−terminal726, then output voltage VOUTof the comparator722is forced to the comparator's negative saturation level. Consequently the light emitting diodes462,472,482,492will be forward biased.

Referring now toFIG. 8, there is provided a time graph showing a moment in time802when an input voltage zero crossing of an instantaneous voltage defining an AC input of the transistor active bridge circuit400occurs. The time graph also shows a time period804associated with the voltage zero crossing. This time period804is determined in a voltage domain by measuring when an input voltage crosses a threshold voltage which is offset by a small amount relative to zero (0) volts. The time period804includes the moment in time802when an input voltage zero crossing actually occurs. The beginning of the time period804occurs a predetermined duration806before the moment in time802when an input voltage zero crossing actually occurs. The predetermined duration is determined in a voltage domain by measuring when an input voltage crosses the threshold voltage.

It should be noted that the conduction path (or conduction channel) between the source and drain of each field effect transistor102,104,106,108is selectively eliminated (or disabled) by the switching device420,430,440,450during at least a portion of the time period804. The predetermined duration806can be selected to correspond to a response time necessary to selectively eliminate (or disable) the conduction path (conduction channel) between the source and drain of each field effect transistor102,104,106,108.