DEVICE FOR DETERMINING EXISTENCE OF DAMAGE IN SEMICONDUCTOR DEVICE AND METHOD RELATED THERETO

A semiconductor device may include a semiconductor substrate, a wire placed along at least a portion of a perimeter of the semiconductor substrate, and processing circuitry connected to the wire, the processing circuitry to, based on a signal from the wire, determine whether or not the semiconductor device is damaged.

FIELD OF THE INVENTION

The present invention relates to the field of semiconductor devices, and more particularly, to device and method for determining existence of damage in semiconductor substrates.

BACKGROUND OF THE INVENTION

Bare semiconductor devices such as bare chips may be damaged during, e.g., an assembly process or at another time. Failure analysis of damaged devices is typically long process that includes software- and firmware- based solutions as well as physical analysis of damaged devices.

SUMMARY OF THE INVENTION

Some embodiments of the present invention may provide a semiconductor device including: a semiconductor substrate; a wire placed along at least a portion of a perimeter of the semiconductor substrate; and processing circuitry connected to the wire, the processing circuitry to, based on a signal from the wire, determine whether or not the semiconductor device is damaged.

In some embodiments, the semiconductor device may include a seal ring placed along the perimeter of the semiconductor substrate, wherein wire is placed near the seal ring such that the seal ring surrounds the wire.

In some embodiments, the semiconductor device may include a plurality of wires each placed along a portion of the perimeter of the semiconductor substrate.

In some embodiments, the processing circuitry to, based on signals from the plurality of wires, determine a location at which the semiconductor substrate is damaged.

In some embodiments, the semiconductor substrate may include a plurality of layers and the semiconductor device may include a plurality of wires each placed in one or more of the plurality of layers of the semiconductor substrate.

In some embodiments, the processing circuitry to, based on signals from the plurality of wires, determine a location at which the semiconductor substrate is damaged.

In some embodiments, the signal is digital.

In some embodiments, the signal is analog.

In some embodiments, the wire is placed on a top flat surface of the semiconductor substrate.

In some embodiments, the wire is placed within the semiconductor substrate.

Some embodiments of the present invention may provide a device including: a support structure including an integrated circuit; a wire placed around the support structure; and a controller receiving a signal from the wire and based on the signal, to determine if the support structure is damaged.

In some embodiments, the device may include a seal ring placed along the perimeter of the support structure, wherein wire is placed near the seal ring such that the seal ring surrounds the wire.

In some embodiments, the device may include a plurality of wires each placed along a portion of the perimeter of the support structure.

In some embodiments, the controller to, based on signals from the plurality of wires, determine a location at which the support structure is damaged.

In some embodiments, the support structure may include a plurality of layers and wherein the device may include a plurality of wires each placed in one or more of the plurality of layers of the support structure.

In some embodiments, the controller to, based on signals from the plurality of wires, determine a location at which the support structure is damaged.

In some embodiments, the signal is digital.

In some embodiments, the signal is analog.

In some embodiments, the wire is placed on a top flat surface of the support structure.

In some embodiments, the wire is placed within the support structure.

Some embodiments of the present invention may determine existence of damage in a semiconductor substrate by: receiving a signal from a wire placed along at least a portion of a perimeter of the semiconductor substrate; and based on the signal, determining whether or not the semiconductor substrate is damaged.

In some embodiments, the semiconductor substrate may include a plurality of wires each placed along a portion of the perimeter of the semiconductor substrate, and based on signals from the plurality of wires, a location at which the semiconductor substrate is damaged may be determined.

In some embodiments, the semiconductor substrate may include a plurality of layers and a plurality of wires each placed in one or more of the plurality of layers of the semiconductor substrate, and based on signals from the plurality of wires, a location at which the semiconductor substrate is damaged may be determined.

DETAILED DESCRIPTION OF THE INVENTION

Reference is now made toFIG.1A, which is a schematic illustration of a device100for determining existence of damage in a substrate or support structure of device100, according to some embodiments of the invention.FIG.1Ashows a schematic top view of device100.

Reference is also made toFIGS.1B and1C, which are schematic illustrations of device100including a wire130placed within a support structure110of device100, according to some embodiments of the invention.FIG.1Bshows a schematic top view of device100.FIG.1Cshows a schematic section view of device100along line AA ofFIG.1B.

Reference is also made toFIGS.1D and1E, which are schematic illustrations of device100including wire130placed within an integrated circuit120of device100, according to some embodiments of the invention.FIG.1Dshows a schematic top view of device100.FIG.1Eshows a schematic section view of device100along line BB ofFIG.1D.

Reference is also made toFIG.1F, which is a schematic illustration of device100including processing circuitry140positioned external to integrated circuit120of device100, according to some embodiments of the invention.

Device100, such as semiconductor device, may include a substrate or support structure110. Support structure110may be made of or may include a semiconductor material such as, e.g., silicon. Support structure110may be a substrate including an integrated circuit120.

Device100may include a wire (e.g., a metal wire)130. Wire130may be connected to, e.g. input/output122of integrated circuit120. In some embodiments, wire130may be placed on a top flat surface of support structure110(e.g., as shown inFIG.1A). Wire130may be placed along at least a portion of an outer edge or a perimeter111of support structure110. Wire130may surround integrated circuit120and may be placed in a region between integrated circuit120and outer edge or perimeter111of support structure110. For example, device100may include a seal ring114placed along outer edge or perimeter111of support structure110and surrounding integrated circuit120(e.g., as shown inFIG.1A). In this example, wire130may be placed in a region between integrated circuit120and seal ring114(e.g., adjacent to seal ring114) such that seal ring114surrounds wire130(e.g., as shown inFIG.1A). Wire130may be placed adjacent to seal ring114, for example at a distance of 1-100 micrometer from seal ring114. The distance of wire130from seal ring114may be dictated by, for example, design constraints or considerations of device100and/or by respective manufacturing process constraints or considerations of device100. In some embodiments, the distance of wire130from seal ring114may be set to be close to a minimal distance allowed according to the design constraints of device100, e.g. the wire130is placed as near as possible to the seal ring114.

In some embodiments, wire130may be placed within support structure110. For example, wire130may be placed within support structure110, e.g., in a region between integrated circuit120and outer surfaces112of support structure110, e.g., as schematically shown inFIGS.1B-1C.

In some embodiments, wire130may be placed within integrated circuit120. For example, wire130may be placed within integrated circuit120, e.g., along outer surfaces112of support structure110, e.g., as schematically shown inFIGS.1B-1C.

Device100may include one or more wires (e.g., such as wire130) placed in different portions of support structure110than shown or described.

Device100may include processing circuitry (e.g., a controller)140. In some embodiments, processing circuitry140may be part of integrated circuit120(e.g., as schematically shown inFIGS.1A-1E). In some embodiments, processing circuitry140may be positioned external to integrated circuit120. For example, processing circuitry140may be positioned on a support structure150, wherein support structure150is external to and is not part of support structure (e.g. semiconductor substrate)110, e.g., as schematically shown inFIG.1F. In some embodiments, processing circuitry140may be included or may be connected to an input/output (IO) pad or circuitry positioned between integrated circuit120and seal ring114. Processing circuitry140may be connected to wire130. Processing circuitry140may determine, based on a signal from wire130, whether or not support structure110is damaged. Processing circuitry140may be analog, digital or a combination thereof.

For example, during an assembly process, or at another time, support structure110of device100may be damaged, e.g., broken. Such damage typically occurs along outer edge or perimeter111of support structure110. Damage of support structure110may cause damage of wire130placed along outer edge or perimeter111of support structure110. Based on the signal from wire130, processing circuitry140may determine whether or not wire130and thus support structure110are damaged. For example, if no signal is received from wire130or if the signal from wire130is different from the input signal provided to wire130, it may be determined that wire130and thus supporting structure110are damaged. The signal may be digital or analog.

Reference is now made toFIG.2, which is a schematic illustration of device100including wires131,132placed at different positions along perimeter111of support structure110of device100, according to some embodiments of the invention.FIG.2shows a schematic top view of device100.

Device100may include two or more wires, for example a wire131and a wire132. Each of wires131,132may be placed on the top flat surface of support structure110in the region between integrated circuit120and outer edge or perimeter111or seal ring114along a different portion of outer edge or perimeter111of support structure110of device100. Each of wires131,132may be connected to processing circuitry140. Processing circuitry140may determine, based on signals from wires131,132, a location at which support structure110is damaged (e.g., as described above with respect toFIGS.1A-1F). For example, if no signal from wire131is received, it may be determined that wire131and a portion of support structure110along wire131are damaged.

While two wires131,132are shown, device100may include a plurality of wires each placed along a different portion of outer edge or perimeter111of support structure110.

Reference is now made toFIGS.3A and3B, which are schematic illustrations of device100including wires133,134,135placed in different layers110a,110b,110cof support structure110of device100, according to some embodiments of the invention.FIG.3Ashows a schematic top view of device100.FIG.3Bshows a schematic section view of device100along line CC ofFIG.3A.

Support structure110of device100may include two or more layers, for example layers110a,110b,100cschematically shown inFIG.3B. Device100may include two or more wires, for example a wire133, a wire134and a wire135, each placed in one or more of the layers of support structure110, e.g., in regions between integrated circuit120and outer surfaces112of support structure110, as schematically shown inFIG.3B. Each of wires133,134,135may be connected to processing circuitry140. Processing circuitry140may determine, based on signals from wires133,134,135, a location at which support structure110is damaged (e.g., as described above with respect toFIGS.1A-1F). For example, if no signal from wire133is received, it may be determined that wire133and layer110aof support structure110accommodating wire133are damaged.

While three layers110a,110b,110cand three wires133,134,135are shown, support structure110may include a plurality of layers and device100may include a plurality of wires, wherein each of the wires may be placed in one or more of the plurality of layers. For example, a single wire may be placed in two layers of supporting structure110. In another example, a single layer may include two or more wires each placed, for example, along a different portion of the perimeter of support structure110(e.g., as described above with respect toFIG.2).

Reference is now made toFIG.4, which is a flowchart of a method of determining damage in a semiconductor substrate, according to some embodiments of the invention.

In operation202, a signal from a wire placed along at least a portion of a perimeter of a semiconductor substrate may be received. For example, the semiconductor substrate and the wire may be similar to support structure110and wire130, respectively, described above with respect toFIGS.1A-1F. The signal may be generated by a circuit (e.g., processing circuitry140) within the semiconductor placing a voltage on the wire at a first end of the wire; damage to the wire alters the voltage detected at a second end of the wire.

In operation204, based on the signal, it may be determined whether or not the semiconductor substrate is damaged. For example, existence or absence of damage may be determined by processing circuitry140as described above with respect toFIGS.1A-1F.

In some embodiments, the semiconductor substrate may include a plurality of wires each placed along a different portion of the perimeter of semiconductor substrate (e.g., as described above with respect toFIG.2). In operation, based on the signals from the plurality of wires, a location at which the semiconductor substrate is damaged may be determined (e.g., as described above with respect toFIG.2).

In some embodiments, the semiconductor substrate may include a plurality of layers and a plurality of wires, wherein each of the wires may be placed in one or more of the plurality of layers (e.g., as described above with respect toFIGS.3A and3B). In operation, based on the signals from the plurality of wires, a location at which the semiconductor substrate is damaged may be determined (e.g., as described above with respect toFIGS.3A and3B).

Embodiments of the invention may provide simple solution for determining existence or absence of damage in semiconductor substrates of semiconductor devices (e.g., bare semiconductor devices). Embodiments of the invention may reduce time and engineering efforts involved in failure analysis of damaged semiconductor devices.