OPTICAL DEVICE AND METHOD OF MANUFACTURE

In an embodiment, a method includes: forming an optical package, forming the optical package comprising: forming optical devices over a substrate; forming a first interconnect structure over the optical devices; and attaching a first semiconductor device to the optical devices; attaching a second semiconductor device to an interposer substrate; attaching the optical package to the interposer substrate; and attaching an optical port adjacent to the optical package, the optical port comprising: an optical fiber; and an optical redirection structure configured to redirect an optical signal between a first pathway and a second pathway, the first pathway being parallel with a major surface of the interposer substrate, the second pathway being non-parallel with the major surface of the interposer substrate.

BACKGROUND

Electrical signaling and processing are one technique for signal transmission and processing. Optical signaling and processing have been used in increasingly more applications in recent years, particularly due to the use of optical fiber-related applications for signal transmission.

Optical signaling and processing are typically combined with electrical signaling and processing to provide full-fledged applications. For example, optical fibers may be used for long-range signal transmission, and electrical signals may be used for short-range signal transmission as well as processing and controlling. Accordingly, devices integrating long-range optical components and short-range electrical components are formed for the conversion between optical signals and electrical signals, as well as the processing of optical signals and electrical signals. Packages thus may include both optical (photonic) dies including optical devices and electronic dies including electronic devices.

DETAILED DESCRIPTION

Embodiments provided herein are discussed with respect to forming a photonic integrated circuit (PIC) device (e.g., an optical interposer) and attaching an electronic integrated circuit (EIC) device (e.g., a semiconductor device) to the PIC device to form an optical package such as a compact universal photonic engine (COUPE). For example, the PIC device may include optical devices (e.g., edge couplers) to receive or transmit optical signals. The COUPE is incorporated into a semiconductor package, and an optical port (e.g., comprising a fiber array unit) is attached to provide optical input/output to the edge couplers, which can facilitate high-bandwidth signals. The optical port further includes a component (e.g., a prism or a reflector) to redirect an optical signal between a first pathway in relation to the edge couplers and a second pathway in relation to the fiber array unit, wherein the first pathway and the second pathway may be, e.g., substantially perpendicular to one another. It should be appreciated that the embodiments presented herein are intended to be illustrative and are not intended to limit the embodiments to the precise descriptions as discussed. Rather, the embodiments discussed may be incorporated into a wide variety of implementations, and all such implementations are fully intended to be included within the scope of the embodiments.

With reference now toFIG.1, there is illustrated an initial structure of an optical interposer100(seeFIG.5), in accordance with some embodiments. In the particular embodiment illustrated inFIG.1, the optical interposer100is a photonic integrated circuit (PIC) device and comprises at this stage a first substrate101, a first insulator layer103, and a layer of material105for a first active layer111of first optical components109(not separately illustrated inFIG.1but illustrated and discussed further below with respect toFIG.2). In an embodiment, at a beginning of the manufacturing process of the optical interposer100, the first substrate101, the first insulator layer103, and the layer of material105for the first active layer111of first optical components109may collectively be part of a silicon-on-insulator (SOI) substrate. Looking first at the first substrate101, the first substrate101may be a semiconductor material such as silicon or germanium, a dielectric material such as glass, or any other suitable material that allows for structural support of overlying devices.

The first insulator layer103may be a dielectric layer that separates the first substrate101from the overlying first active layer111and can additionally, in some embodiments, serve as a portion of cladding material that surrounds the subsequently manufactured first optical components109(discussed further below). In an embodiment the first insulator layer103may be silicon oxide, silicon nitride, germanium oxide, germanium nitride, combinations of these, or the like, formed using a method such as implantation (e.g., to form a buried oxide (BOX) layer) or else may be deposited onto the first substrate101using a deposition method such as chemical vapor deposition, atomic layer deposition, physical vapor deposition, combinations of these, or the like. However, any suitable material and method of manufacture may be used.

The material105for the first active layer111is initially (prior to patterning) a conformal layer of material that will be used to begin manufacturing the first active layer111of the first optical components109. In an embodiment the material105for the first active layer111may be a translucent material that can be used as a core material for the desired first optical components109, such as a semiconductor material such as silicon, germanium, silicon germanium, combinations of these, or the like, while in other embodiments the material105for the first active layer111may be a dielectric material such as silicon nitride or the like, although in other embodiments the material105for the first active layer111may be III-V materials, lithium niobate materials, or polymers. In embodiments in which the material105of the first active layer111is deposited, the material105for the first active layer111may be deposited using a method such as epitaxial growth, chemical vapor deposition, atomic layer deposition, physical vapor deposition, combinations of these, or the like. In other embodiments in which the first insulator layer103is formed using an implantation method, the material105of the first active layer111may initially be part of the first substrate101prior to the implantation process to form the first insulation layer103. However, any suitable materials and methods of manufacture may be utilized to form the material105of the first active layer111.

FIG.2illustrates that, once the material105for the first active layer111is ready, the first optical components109for the first active layer111are manufactured using the material105for the first active layer111. In embodiments the first optical components109of the first active layer111may include such components as optical waveguides (e.g., ridge waveguides, rib waveguides, buried channel waveguides, diffused waveguides, etc.), couplers (e.g., grating couplers, edge couplers that are a narrowed waveguide with a width of between about 1 nm and about 200 nm, etc.), directional couplers, optical modulators (e.g., Mach-Zehnder silicon-photonic switches, microelectromechanical switches, micro-ring resonators, etc.), amplifiers, multiplexors, demultiplexors, optical-to-electrical converters (e.g., P-N junctions), electrical-to-optical converters, lasers, combinations of these, or the like. However, any suitable first optical components109may be used.

In accordance with various embodiments, the optical components109include edge couplers109E, which are configured to receive optical signals into the optical interposer100and/or transmit optical signals from the optical interposer100. The edge couplers109E may be able to facilitate a higher bandwidth of optical signals as compared to analogous components such as grating couplers. The edge couplers109E transmit/receive in a lateral (e.g., horizontal) direction in relation to the optical interposer100. As such, embodiments of a semiconductor package discussed in greater detail below are intended to facilitate horizontal pathways of the optical signal.

To begin forming the first active layer111of first optical components109from the initial material, the material105for the first active layer111may be patterned into the desired shapes for the first active layer111of first optical components109. In an embodiment the material105for the first active layer111may be patterned using, e.g., one or more photolithographic masking and etching processes. However, any suitable method of patterning the material105for the first active layer111may be utilized. For some of the first optical components109, such as waveguides or edge couplers, the patterning process may be all or at least most of the manufacturing that is used to form these first optical components109.

FIG.3illustrates that, for those components that utilize further manufacturing processes, such as Mach-Zehnder silicon-photonic switches that utilize resistive heating elements, additional processing may be performed either before or after the patterning of the material for the first active layer111. For example, implantation processes, additional deposition and patterning processes for different materials (e.g., resistive heating elements, III-V materials for converters), combinations of all of these processes, or the like, can be utilized to help further the manufacturing of the various desired first optical components109. In a particular embodiment, and as specifically illustrated inFIG.3, in some embodiments an epitaxial deposition of a semiconductor material113such as germanium (used, e.g., for electricity/optics signal modulation and transversion) may be performed on a patterned portion of the material105of the first active layer111. In such an embodiment the semiconductor material113may be epitaxially grown in order to help manufacture, e.g., a photodiode for an optical-to-electrical converter. All such manufacturing processes and all suitable first optical components109may be manufactured, and all such combinations are fully intended to be included within the scope of the embodiments.

FIG.4illustrates that, once the individual first optical components109of the first active layer111have been formed, a second insulating layer115may be deposited to cover the first optical components109and provide additional cladding material. In an embodiment the second insulator layer115may be a dielectric layer that separates the individual components of the first active layer111from each other and from the overlying structures and can additionally serve as another portion of cladding material that surrounds the first optical components109. In an embodiment the second insulator layer115may be silicon oxide, silicon nitride, germanium oxide, germanium nitride, combinations of these, or the like, formed using a deposition method such as chemical vapor deposition, atomic layer deposition, physical vapor deposition, combinations of these, or the like. Once the material of the second insulating layer115has been deposited, the material may be planarized using, e.g., a chemical mechanical polishing process in order to either planarize a top surface of the second insulating layer115(in embodiments in which the second insulating layer115is intended to fully cover the first optical components109) or else planarize the second insulating layer115with top surfaces of the first optical components109. However, any suitable material and method of manufacture may be used.

FIG.5illustrates that, once the first optical components109of the first active layer111have been manufactured and the second insulating layer115has been formed, first metallization layers121are formed in order to electrically connect the first active layer111of first optical components109to control circuitry, to each other, and to subsequently attached devices (not illustrated inFIG.5but illustrated and described further below with respect toFIG.7). In an embodiment the first metallization layers121are formed of alternating layers of dielectric and conductive material and may be formed through any suitable processes (such as deposition, damascene, dual damascene, etc.). In particular embodiments there may be multiple layers of metallization used to interconnect the various first optical components109, but the precise number of first metallization layers121is dependent upon the design of the optical interposer100.

Additionally, during the manufacture of the first metallization layers121, one or more second optical components123may be formed as part of the first metallization layers121. In some embodiments the second optical components123of the first metallization layers121may include such components as couplers (e.g., edge couplers, grating couplers, etc.) for connection to outside signals, optical waveguides (e.g., ridge waveguides, rib waveguides, buried channel waveguides, diffused waveguides, etc.), optical modulators (e.g., Mach-Zehnder silicon-photonic switches, microelectromechanical switches, micro-ring resonators, etc.), amplifiers, multiplexors, demultiplexors, optical-to-electrical converters (e.g., P-N junctions), electrical-to-optical converters, lasers, combinations of these, or the like. However, any suitable optical components may be used for the one or more second optical components123.

In an embodiment the one or more second optical components123may be formed by initially depositing a material for the one or more second optical components123. In an embodiment the material for the one or more second optical components123may be a dielectric material such as silicon nitride, silicon oxide, combinations of these, or the like, or a semiconductor material such as silicon, deposited using a deposition method such as chemical vapor deposition, atomic layer deposition, physical vapor deposition, combinations of these, or the like. However, any suitable material and any suitable method of deposition may be utilized.

Once the material for the one or more second optical components123has been deposited or otherwise formed, the material may be patterned into the desired shapes for the one or more second optical components123. In an embodiment the material of the one or more second optical components123may be patterned using, e.g., one or more photolithographic masking and etching processes. However, any suitable method of patterning the material for the one or more second optical components123may be utilized.

For some of the one or more second optical components123, such as waveguides or edge couplers, the patterning process may be all or at least most manufacturing that is used to form these components. Additionally, for those components that utilize further manufacturing processes, such as Mach-Zehnder silicon-photonic switches that utilize resistive heating elements, additional processing may be performed either before or after the patterning of the material for the one or more second optical components123. For example, implantation processes, additional deposition and patterning processes for different materials, combinations of all of these processes, or the like, and can be utilized to help further the manufacturing of the various desired one or more second optical components123. All such manufacturing processes and all suitable one or more second optical components123may be manufactured, and all such combinations are fully intended to be included within the scope of the embodiments.

Once the one or more second optical components123of the first metallization layers121have been manufactured, a first bonding layer131is formed over the first metallization layers121. In an embodiment, the first bonding layer131may be used for a dielectric-to-dielectric and metal-to-metal bond. In accordance with some embodiments, the first bonding layer131is formed of a first dielectric material135such as silicon oxide, silicon nitride, or the like. The first dielectric material135may be deposited using any suitable method, such as CVD, high-density plasma chemical vapor deposition (HDPCVD), PVD, atomic layer deposition (ALD), or the like. However, any suitable materials and deposition processes may be utilized.

Once the first dielectric material135has been formed, first openings in the first dielectric material135are formed to expose conductive portions of the underlying layers in preparation to form first bond pads133within the first bonding layer131. Once the first openings have been formed within the first dielectric material135, the first openings may be filled with a seed layer and a plate metal to form the first bond pads133within the first dielectric material135. The seed layer may be blanket deposited over top surfaces of the first dielectric material135and the exposed conductive portions of the underlying layers and sidewalls of the openings and the second openings. The seed layer may comprise a copper layer. The seed layer may be deposited using processes such as sputtering, evaporation, or plasma-enhanced chemical vapor deposition (PECVD), or the like, depending upon the desired materials. The plate metal may be deposited over the seed layer through a plating process such as electrical or electro-less plating. The plate metal may comprise copper, a copper alloy, or the like. The plate metal may be a fill material. A barrier layer (not separately illustrated) may be blanket deposited over top surfaces of the first dielectric material135and sidewalls of the openings and the second openings before the seed layer. The barrier layer may comprise titanium, titanium nitride, tantalum, tantalum nitride, or the like.

Following the filling of the first openings, a planarization process, such as a chemical mechanical polishing (CMP), is performed to remove excess portions of the seed layer and the plate metal, forming the first bond pads133within the first bonding layer131. In some embodiments a bond pad via (not separately illustrated) may also be utilized to connect the first bond pads133with underlying conductive portions and, through the underlying conductive portions, connect the first bond pads133with the first metallization layers121.

Additionally, the first bonding layer131may also include one or more third optical components137incorporated within the first bonding layer131. In such an embodiment, prior to the deposition of the first dielectric material135, the one or more third optical components137may be manufactured using similar methods and similar materials as the one or more second optical components123(described above), such as by being waveguides and other structures formed at least in part through a deposition and patterning process. However, any suitable structures, materials and any suitable methods of manufacture may be utilized.

FIG.6illustrates a bonding of a first semiconductor device200to the optical interposer100. In some embodiments, the first semiconductor device200is an electronic integrated circuit (EIC) device (e.g., a device without optical devices) and may have a semiconductor substrate201, a layer of active devices205, an overlying interconnect structure207, a second bond layer231, and associated third bond pads233. In an embodiment, the semiconductor substrate201may be similar to the first substrate101(e.g., a semiconductor material such as silicon or silicon germanium), the active devices205may be transistors, capacitors, resistors, and the like formed over the semiconductor substrate201, the interconnect structure207may be similar to the first metallization layers121(without optical components), the second bond layer231may be similar to the first bond layer131, and the third bond pads233may be similar to the first bond pads133. However, any suitable devices may be utilized.

In an embodiment the first semiconductor device200may be configured to work with the optical interposer100for a desired functionality. In some embodiments the first semiconductor device200may be a high bandwidth memory (HBM) module, an xPU, a logic die, a 3DIC die, a CPU, a GPU, a SoC die, a MEMS die, combinations of these, or the like. Any suitable device with any suitable functionality, may be used, and all such devices are fully intended to be included within the scope of the embodiments.

Once the first semiconductor device200has been prepared, the first semiconductor device200may be bonded to the optical interposer100to form an optical package300. In an embodiment, the first semiconductor device200may be bonded to the optical interposer100using, e.g., a dielectric-to-dielectric and metal-to-metal bonding process. In such an embodiment, the first semiconductor device200is bonded to the first bonding layer131of the optical interposer100by bonding both the first bond pads133to the third bond pads233and by bonding the dielectrics within the first bonding layer131to the dielectrics within the second bond layer231. In this embodiment, the top surfaces of the first semiconductor device200and the optical interposer100may first be activated utilizing, e.g., a dry treatment, a wet treatment, a plasma treatment, exposure to an inert gas, exposure to H2, exposure to N2, exposure to O2, or combinations thereof, as examples. However, any suitable activation process may be utilized.

After the activation process, the first semiconductor device200and the optical interposer100may be cleaned using, e.g., a chemical rinse, and then the first semiconductor device200is aligned and placed into physical contact with the optical interposer100. The first semiconductor device200and the optical interposer100are then subjected to thermal treatment and contact pressure to bond the first semiconductor device200and the optical interposer100. For example, the first semiconductor device200and the optical interposer100may be subjected to a pressure of about 200 kPa or less, and a temperature between about 25° C. and about 250° C. to fuse the first semiconductor device200and the optical interposer100. The first semiconductor device200and the optical interposer100may then be subjected to a temperature at or above the eutectic point for material of the first bond pads133, e.g., between about 150° C. and about 650° C., to fuse the metal bond pads. In this manner, the first semiconductor device200and the optical interposer100form a bonded device (e.g., the optical package300, which may be referred to as a COUPE device). In some embodiments, the bonded dies are subsequently baked, annealed, pressed, or otherwise treated to strengthen or finalize the bond.

Additionally, while the above description describes a dielectric-to-dielectric and metal-to-metal bonding process, this is intended to be illustrative and is not intended to be limiting. In yet other embodiments, the optical interposer100may be bonded to the first semiconductor device200by metal-to-metal bonding, or another bonding process. For example, the first semiconductor device200and the optical interposer100may be bonded by metal-to-metal bonding that is achieved by fusing conductive elements. Any suitable bonding process may be utilized, and all such methods are fully intended to be included within the scope of the embodiments.

FIG.6additionally illustrates that, once the first semiconductor device200has been bonded, a gap-fill material213is deposited in order to fill the spaces between adjacent ones of the first semiconductor devices200and provide additional support. In an embodiment, the gap-fill material213may be a material such as silicon oxide, silicon nitride, silicon oxynitride, combinations of these, or the like, deposited to fill and overfill the spaces between the first semiconductor devices200. However, any suitable material and method of deposition may be utilized.

Once the gap-fill material213has been deposited, the gap-fill material213may be planarized in order to expose the first semiconductor device200. In an embodiment the planarization process may be a chemical mechanical planarization process, a grinding process, or the like. However, any suitable planarization process may be utilized.

FIG.7illustrates an attachment of a support substrate301to the first semiconductor device200and the gap-fill material213. In an embodiment, the support substrate301may be a support material that is transparent to the wavelength(s) of light that is desired to be used, such as silicon. However, an advantage of the embodiments described herein is that the support substrate301may not be transparent to the wavelengths of light and may be any suitable support material, whether transparent, translucent, or opaque to the light. In addition, the support substrate301may be attached using, e.g., an adhesive (not separately illustrated). However, in other embodiments, the support substrate301may be bonded to the first semiconductor device200and the gap-fill material213using, e.g., a bonding process. Any suitable method of attaching the support substrate301may be used.

FIG.8illustrates a removal of the first substrate101and, optionally, the first insulating layer103, thereby exposing the first active layer111of first optical components109of the optical interposer100. In an embodiment, the first substrate101and the first insulating layer103may be removed using a planarization process, such as a chemical mechanical polishing process, a grinding process, one or more etching processes, combinations of these, or the like. However, any suitable method may be used in order to remove the first substrate101and/or the first insulating layer103.

Once the first substrate101and the first insulating layer103have been removed, a second active layer311of fourth optical components313may optionally be formed on a back side of the first active layer111. In an embodiment the second active layer311of fourth optical components313may be formed using similar materials and similar processes as the second optical components123of the first metallization layers121(seeFIG.5). For example, the second active layer311of fourth optical components313may be formed of alternating layers of a cladding material such as silicon oxide and core material such as silicon nitride formed using deposition and patterning processes in order to form optical components such as waveguides and the like.

FIG.8further illustrates formation of first through device vias (TDVs)315and formation of first external connectors317to form the optical package300. In an embodiment, the first through device vias315extend through the second active layer311and the first active layer111so as to provide a quick passage of power, data, and ground through the optical interposer100. In an embodiment, the first through device vias315may be formed by initially forming through device via openings into the optical interposer100. The through device via openings may be formed by applying and developing a suitable photoresist (not shown), and removing portions of the second active layer311and the optical interposer100that are exposed.

Once the through device via openings have been formed within the optical interposer100, the through device via openings may be lined with a liner. The liner may be, e.g., an oxide formed from tetraethylorthosilicate (TEOS) or silicon nitride, although any suitable dielectric material may alternatively be used. The liner may be formed using a plasma enhanced chemical vapor deposition (PECVD) process, although other suitable processes, such as physical vapor deposition or a thermal process, may alternatively be used.

Once the liner has been formed along the sidewalls and bottom of the through device via openings, a barrier layer (also not independently illustrated) may be formed and the remainder of the through device via openings may be filled with first conductive material. The first conductive material may comprise copper, although other suitable materials such as aluminum, alloys, doped polysilicon, combinations thereof, and the like, may be utilized. The first conductive material may be formed by electroplating copper onto a seed layer (not shown), filling and overfilling the through device via openings. Once the through device via openings have been filled, excess liner, barrier layer, seed layer, and first conductive material outside of the through device via openings may be removed through a planarization process such as a CMP, although any suitable removal process may be used.

Optionally, in some embodiments, once the first through device vias315have been formed, second metallization layers (not separately illustrated) may be formed in electrical connection with the first through device vias315. In an embodiment, the second metallization layers may be formed similarly as described above with respect to the first metallization layers121, such as being alternating layers of dielectric and conductive materials using damascene processes, dual damascene process, or the like. In other embodiments, the second metallization layers may be formed using a plating process to form and shape conductive material, and then cover the conductive material with a dielectric material. However, any suitable structures and methods of manufacture may be utilized.

The first external connectors317may be formed to provide conductive regions for contact between either the first through device vias315or the second metallization layers to other external devices. The first external connectors317may be conductive bumps (e.g., C4 bumps, ball grid arrays, microbumps, etc.) or conductive pillars utilizing materials such as solder and copper. In an embodiment, in which the first external connectors317are contact bumps, the first external connectors317may comprise a material such as tin, or other suitable materials, such as silver, lead-free tin, or copper. In an embodiment, in which the first external connectors317are tin solder bumps, the first external connectors317may be formed by initially forming a layer of tin through such commonly used methods such as evaporation, electroplating, printing, solder transfer, ball placement, etc. Once a layer of tin has been formed on the structure, a reflow may be performed in order to shape the material into the desired bump shape.

As discussed in greater detail below, after forming the external connectors317, the optical package300may be incorporated into a semiconductor package. For example, an optical port is incorporated into the semiconductor package to provide a mechanism for optical signals to be input to or output from the optical package300(e.g., the optical interposer100). For example, the optical port serves as an optical input/output port to the optical interposer100. In accordance with various embodiments discussed below, the optical port may have a variety of configurations and be incorporated into the semiconductor package in a variety of layouts.

FIG.9illustrates a bonding of a second semiconductor device400and a third semiconductor device500to an interposer substrate601. The interposer substrate601will be used to couple the optical package300(which will be subsequently attached), the second semiconductor device400, and the third semiconductor device500with other devices to form, for example, a chip-on-wafer-on-substrate (CoWoS®). In an embodiment, the interposer substrate601comprises a semiconductor substrate603, third metallization layers611, second through device vias (TDVs)607, and second external connectors609. The semiconductor substrate603may comprise bulk silicon, doped or undoped, or an active layer of a silicon-on-insulator (SOI) substrate. Generally, an SOI substrate comprises a layer of a semiconductor material such as silicon, germanium, silicon germanium, SOI, silicon germanium on insulator (SGOI), or combinations thereof. Other substrates that may be used include multi-layered substrates, gradient substrates, or hybrid orientation substrates.

Optionally, first active devices (not separately illustrated) may be added to the semiconductor substrate603. The first active devices comprise a wide variety of active devices and passive devices such as capacitors, resistors, inductors and the like that may be used to generate the desired structural and functional requirements of the design for the semiconductor substrate603. The first active devices may be formed using any suitable methods either within or else on the semiconductor substrate603.

The third metallization layers611are formed over the semiconductor substrate603and the first active devices and are designed to connect the various active devices to form functional circuitry. In an embodiment, the third metallization layers611are formed of alternating layers of dielectric (e.g., low-k dielectric materials, extremely low-k dielectric material, ultra low-k dielectric materials, combinations of these, or the like) and conductive material and may be formed through any suitable process (such as deposition, damascene, dual damascene, etc.). However, any suitable materials and processes may be utilized.

Additionally, at any desired point in the manufacturing process, the second TDVs607may be formed within the semiconductor substrate603and, if desired, one or more layers of the third metallization layers611, in order to provide electrical connectivity from a front side of the semiconductor substrate603to a back side of the semiconductor substrate603. In an embodiment, the second TDVs607may be formed by initially forming through device via (TDV) openings into the semiconductor substrate603and, if desired, any of the overlying third metallization layers611(e.g., after the desired third metallization layer611has been formed but prior to formation of the next overlying third metallization layer611). The TDV openings may be formed by applying and developing a suitable photoresist, and removing portions of the underlying materials that are exposed to a desired depth. The TDV openings may be formed so as to extend into the semiconductor substrate603to a depth greater than the eventual desired height of the semiconductor substrate603.

Once the TDV openings have been formed within the semiconductor substrate603and/or any third metallization layers611, the TDV openings may be lined with a liner. The liner may be, e.g., an oxide formed from tetraethylorthosilicate (TEOS) or silicon nitride, although any suitable dielectric material may be used. The liner may be formed using a plasma enhanced chemical vapor deposition (PECVD) process, although other suitable processes, such as physical vapor deposition or a thermal process, may be used.

Once the liner has been formed along the sidewalls and bottom of the TDV openings, a barrier layer may be formed and the remainder of the TDV openings may be filled with first conductive material. The first conductive material may comprise copper, although other suitable materials such as aluminum, alloys, doped polysilicon, combinations thereof, and the like, may be utilized. The first conductive material may be formed by electroplating copper onto a seed layer, filling and overfilling the TDV openings. Once the TDV openings have been filled, excess liner, barrier layer, seed layer, and first conductive material outside of the TDV openings may be removed through a planarization process such as a CMP, although any suitable removal process may be used.

Once the TDV openings have been filled, the semiconductor substrate603may be thinned until the second TDVs607have been exposed. In an embodiment, the semiconductor substrate603may be thinned using, e.g., a chemical mechanical polishing process, a grinding process, or the like. Further, once exposed, the second TDVs607may be recessed using, e.g., one or more etching processes, such as a wet etch process in order to recess the semiconductor substrate603so that the second TDVs607extend out of the semiconductor substrate603.

In an embodiment, the second external connectors609may be placed on the semiconductor substrate603in electrical connection with the second TDVs607and may be, e.g., a ball grid array (BGA) which comprises a eutectic material such as solder, although any suitable materials may be used. Optionally, an underbump metallization or additional metallization layers (not separately illustrated) may be utilized between the semiconductor substrate603and the second external connectors609. In an embodiment in which the second external connectors609are solder bumps, the second external connectors609may be formed using a ball drop method, such as a direct ball drop process. In another embodiment, the solder bumps may be formed by initially forming a layer of tin through any suitable method such as evaporation, electroplating, printing, solder transfer, and then performing a reflow in order to shape the material into the desired bump shape. Once the second external connectors609have been formed, a test may be performed to ensure that the structure is suitable for further processing.

Optionally, the interposer substrate601further includes conductive pillars613formed over the third metallization layers611. The conductive pillars613may be used to connect the optical package300to the interposer substrate601. In some embodiments, the conductive pillars613are tall pillars in order for a height of the conductive pillars613plus a height of the optical package300to be substantially the same or comparable with heights of the second semiconductor device400and the third semiconductor device500.

In some embodiments, the second semiconductor device400is an electronic integrated circuit (EIC) device such as a stacked device that includes multiple, interconnected semiconductor substrates. For example, the second semiconductor device400may be a memory device such as a high bandwidth memory (HBM) module, a hybrid memory cube (HMC) module, or the like that includes multiple stacked memory dies. In such embodiments, the second semiconductor device400includes multiple semiconductor substrates interconnected by through device vias (TDVs). Each of the semiconductor substrates may (or may not) have a layer of active devices and an overlying interconnect structure, a bond layer, and associated bond pads in order to interconnect the multiple devices within the second semiconductor device400.

Of course, while the second semiconductor device400is a HBM module in one embodiment, the embodiments are not restricted to the second semiconductor device400being an HBM module. Rather, the second semiconductor device400may be any suitable semiconductor device, such as a processor die or other type of functional die. In particular embodiments the second semiconductor device400may be an xPU, a logic die, a 3DIC die, a CPU, a GPU, a SoC die, a MEMS die, combinations of these, or the like. Any suitable device with any suitable functionality, may be used, and all such devices are fully intended to be included within the scope of the embodiments.

The third semiconductor device500may be another EIC device that is intended to work with both the optical package300and the second semiconductor device400. In some embodiments, the third semiconductor device500may have a different functionality from the second semiconductor device400, such as by being an ASIC device, or may have a same functionality as the second semiconductor device400, such as by being another high bandwidth memory device.

In an embodiment, both the second semiconductor device400and the third semiconductor device500may be bonded to the interposer substrate601using, e.g., third external connections615along each of the semiconductor devices400,500. The third external connections615may be conductive bumps (e.g., ball grid arrays, microbumps, etc.) or conductive pillars utilizing materials such as solder and copper. In an embodiment in which the third external connections615are contact bumps, the third external connections615may comprise a material such as tin, or other suitable materials, such as silver, lead-free tin, or copper. In an embodiment in which the third external connections615are tin solder bumps, the third external connections615may be formed by initially forming a layer of tin through such commonly used methods such as evaporation, electroplating, printing, solder transfer, ball placement, etc. Once a layer of tin has been formed on the structure, a reflow may be performed in order to shape the material into the desired bump shape.

Additionally, once the third external connections615have been placed, the second semiconductor device400and the third semiconductor device500are aligned with the interposer substrate601. Once aligned and in physical contact, the third external connections615are reflowed by raising the temperature of the third external connections615past a eutectic point of the third external connections615, thereby shifting the material of the third external connections615to a liquid phase. Once reflowed, the temperature is reduced in order to shift the material of the third external connections615back to a solid phase, thereby bonding the second semiconductor device400and the third semiconductor device500to the interposer substrate601.

Once the second semiconductor device400and the third semiconductor device500have been bonded, an underfill material617may be placed. The underfill material617may reduce stress and protect the joints resulting from the reflowing of the third external connections615. The underfill material617may be formed by a capillary flow process after the second semiconductor device400and the third semiconductor device500are attached.

FIG.10illustrates that, after the underfill material617has been placed, the second semiconductor device400, the third semiconductor device500, and the conductive pillars613(if present) may be encapsulated with an encapsulant621. In an embodiment, the encapsulant621may be a molding compound, epoxy, or the like. The encapsulant621may be applied by compression molding, transfer molding, or the like. The encapsulant621is further placed in gap regions between the second semiconductor device400, the third semiconductor device500, and the conductive pillars613. The encapsulant621may be applied in liquid or semi-liquid form and then subsequently cured.

A planarization process is performed on the encapsulant621once the encapsulant621has been placed. Once planarized, top surfaces of the encapsulant621, the second semiconductor device400, and the third semiconductor device500are substantially coplanar within process variations. The planarization process may be, for example, a CMP, a grinding process, or the like. In some embodiments, the planarization may be omitted.

Following the planarization process, a removal process may be performed to remove a portion of the encapsulant621above the conductive pillars613, thereby exposing the conductive pillars613. The removal process may include one or more processes including laser cutting, plasma cutting, or any suitable method. The etched encapsulant621and the conductive pillars613form a platform623for attaching the optical package300. In some embodiments, the encapsulant621is partially or fully removed from a region of the interposer substrate601adjacent to the platform623.

FIG.11illustrates that the optical package300may be attached to the interposer substrate601, which is used to couple the optical package300with the other devices of the semiconductor package. For example, the optical package300may be attached to the platform623on the interposer substrate601. In an embodiment, the optical package300may be attached to the platform623by aligning the first external connectors317with the conductive pillars613along the interposer substrate601. Once aligned and in physical contact, the first external connectors317are reflowed by raising the temperature of the first external connectors317past a eutectic point of the first external connectors317, thereby shifting the material of the first external connectors317to a liquid phase. Once reflowed, the temperature is reduced in order to shift the material of the first external connectors317back to a solid phase, thereby bonding the optical package300to the interposer substrate601. In some embodiments (seeFIGS.13-17), the interposer substrate601does not include the conductive pillars613, and the optical package300is attached to conductive features along the exposed surface of the third metallization layers611, similarly as described above in connection with the second and third semiconductor devices400,500.

Once the optical package300has been bonded, an underfill material619may be placed. The underfill material619may reduce stress and protect the joints resulting from the reflowing of the first external connections317. The underfill material619may be formed similarly as described above in connection with the underfill material617such as by a capillary flow process after the optical package300is attached.

FIGS.12A-12Eillustrate various embodiments of an optical port641being attached and integrated with the optical package300, the second semiconductor device400, the third semiconductor device500, and the interposer substrate601to form the semiconductor package. The optical port641is utilized as an optical input/output port to the optical interposer100. As discussed in greater detail below, various embodiments of the optical port641may correspond with various embodiment semiconductor packages. Other features of these semiconductor packages may be substantially the same as one another, unless otherwise specified or illustrated.

After attaching the optical package300and the optical port641to the interposer substrate601, the interposer substrate601may be bonded to a second substrate631with, e.g., the second external connectors609. In an embodiment, the second substrate631may be a package substrate, which may be a printed circuit board (PCB) or the like. The second substrate631may include one or more dielectric layers and electrically conductive features, such as conductive lines and vias. In some embodiments, the second substrate631may include through-vias, active devices, passive devices, and the like. The second substrate631may further include conductive pads (not specifically illustrated) formed at the upper and lower surfaces of the second substrate631.

The second external connectors609may be aligned with corresponding conductive connections on the second substrate631. Once aligned, the second external connectors609may then be reflowed in order to bond the second substrate631to the interposer substrate601. However, any suitable bonding process may be used to connect the interposer substrate601to the second substrate631.

Additionally, the second substrate631may be prepared for further processing by forming fourth external connections633on an opposite side of the second substrate631from the optical package300. In an embodiment, the fourth external connections633may be formed using similar processes and materials as the second external connectors609. However, any suitable materials and processes may be utilized.

Still referring toFIGS.12A-12E, the optical port641includes a fiber array unit643and a redirection structure647(e.g., a light redirection structure). The fiber array unit643is a feature that organizes and directs optical fibers645in a particular direction for the semiconductor package to receive or transmit optical signals. The redirection structure647redirects the optical signal, e.g., from the optical fibers645into the optical interposer100. Optionally, the optical port641further includes a transparent medium649through which the optical signal passes. For example, the transparent medium649the optical signal to pass from the optical fibers645to the redirection structure647to the optical interposer100—or in reverse. In an embodiment, the fiber array unit643is placed so as to optically couple the optical fibers645with certain optical components of the optical interposer100. In accordance with various embodiments, these optical components include the first optical components109, the second optical components123, or the third optical components137. In particular, these optical components may be edge couplers109E of the first active layer111discussed above in connection withFIG.2. Similarly, the fiber array unit643is positioned so that optical signals leaving the first optical components109(e.g., an edge coupler109E) of the first active layer111are directed to the redirection structure647and redirected into the optic fibers645for transmission. However, any suitable location may be utilized.

In the illustrated embodiments, the fiber array unit643may be secured above the transparent medium647and/or over the optical package300. As shown, the optical signal follows a substantially vertical path from the fiber array unit643, and the optical signal follows a substantially horizontal path to the edge couplers109E. The redirection structure647redirects the optical signal to align the substantially vertical path with the substantially horizontal path. An advantage of the redirection structure647is that the fiber array unit643may be secured in various accessible locations of the completed semiconductor package. In some embodiments, the fiber array unit643may be secured to the semiconductor package using a suitable adhesive such as an optical glue (not specifically illustrated). In some embodiments, the optical glue comprises a polymer material such as epoxy-acrylate oligomers, and may have a refractive index between about 1 and about 3. However, any suitable material may be utilized. Moreover, while the fiber array unit643is illustrated as being attached to the semiconductor package at this point in the manufacturing process, in some embodiments, the fiber array unit643may be attached during any suitable subsequent step in the process.

During operation of the semiconductor package, the optical components (e.g., the edge couplers109E) of the optical interposer100are powered by light from both the optical fibers645. After reaching the optical interposer100, waveguides within the first optical components109, the second optical components123, or the third optical components137route the received optical signals as desired, and converters within the first optical components109, the second optical components123, or the third optical components137may convert the received optical signals into electrical signals before sending those electrical signals to other devices, such as the first semiconductor device200. By the same token, the optical fibers645can also serve as an output for optical signals generated by the first optical components109, the second optical components123, or the third optical components137, such that the optical port641serves as an I/O port for the optical signals.

In accordance with various embodiments, the optical fibers645are attached to the fiber array unit643to serve as entry or exit points for the optical signals. In an embodiment (not separately illustrated), the fiber array unit643comprises a fiber array substrate and lids to align the optic fibers645. For example, the fiber array substrate comprises a substrate material into which a plurality of grooves are formed for alignment of the individual optical fibers645. The optical fibers645may be placed into the individual grooves, and the lids are placed around the optical fibers645in order to constrain and control the optical fibers645. However, any suitable structure for the fiber array unit643may be utilized.

Referring toFIG.12A, the semiconductor package may utilize an optical port641A that includes a redirection structure647A and a transparent medium649A to redirect optical signals between, e.g., optical components of the optical interposer100and the optical fibers645. For example, the redirection structure647A may be a prism mounted on the interposer substrate601and secured with an adhesive or by any suitable means. In addition, the transparent medium649A may be a glass such as a silicate or a plastic material disposed above the redirection structure647A and secured with an adhesive (e.g., an optical glue, which is not specifically illustrated) or by any suitable means. In some embodiments (not specifically illustrated), the transparent medium649A may further include a piece disposed between the optical interposer100and the redirection structure647A.

The fiber array unit643may be secured to top surfaces of the optical package300and/or the transparent medium649A with an adhesive (e.g., an optical glue, which is not specifically illustrated) or by any suitable means. As illustrated, the optical signal from the optical fibers645(e.g., attached within the fiber array unit643) passes through the transparent medium649A and is redirected by the redirection structure647A to optical components (e.g., the edge couplers109E) of the optical interposer100.

Referring toFIG.12B, the semiconductor package may utilize an optical port641B that includes a redirection structure647B to redirect optical signals between, e.g., optical components of the optical interposer100and the optical fibers645. For example, the redirection structure647B may be a prism (e.g., similarly as the redirection structure647A) mounted on the interposer substrate601and secured with an adhesive or by any suitable means. As illustrated, the optical port641B may exclude a transparent medium such that the optical signal passes through air or a vacuum rather than a glass or a plastic material.

The fiber array unit643may be secured to the top surface of the optical package300similarly as described above, and the optical fiber643may hover above the redirection structure647B. In some embodiments (not separately illustrated), the fiber array unit643is secured directly over the optical package300such that the optical signal from the optical fibers645reaches the redirection structure647B at an angle from the vertical. As such, the redirection structure647B is chosen with a desired shape and positioned in such a way as to redirect the angled optical signal to a substantially horizontal path to the optical components (e.g., the edge couplers109E) of the optical interposer100.

Referring toFIG.12C, the semiconductor package may utilize an optical port641C that includes a redirection structure647C and a transparent medium649C to redirect optical signals between, e.g., optical components of the optical interposer100and the optical fibers645. For example, the redirection structure647C may be a prism mounted on a portion of the platform623laterally adjacent to the optical package300(e.g., on the encapsulant621laterally displaced from the conductive pillars613). The redirection structure647C may be secured to the platform623with an adhesive or by any suitable means. In addition, the transparent medium649C may be a similar material and similarly secured as described above in connection with the transparent medium649A. In some embodiments (not specifically illustrated), the transparent medium649C may further include a piece disposed between the optical interposer100and the redirection structure647C.

The fiber array unit643may be secured to top surfaces of the optical package300and/or the transparent medium649C similarly as described above. As illustrated, the optical signal from the optical fibers645passes through the transparent medium649C and is redirected by the redirection structure647C to optical components (e.g., the edge couplers109E) of the optical interposer100. In some embodiments (not specifically illustrated), the transparent medium649C may be omitted, similarly as described above in connection with the optical port641B. In such embodiments, the redirection structure647C may be chosen with a desired shape and positioned in such a way as to redirect angled light from the optical fibers645(e.g., secured directly over the optical package300) to a substantially horizontal path to the edge couplers109E of the optical interposer100.

Referring toFIG.12D, the semiconductor package may utilize an optical port641D that includes a redirection structure647D and a transparent medium649D to redirect optical signals between, e.g., optical components of the optical interposer100and the optical fibers645. For example, the redirection structure647D may be a prism mounted on a redistribution interposer701(e.g., instead of the interposer substrate601). The redirection structure647D may be secured to the redistribution interposer701with an adhesive or by any suitable means. In addition, the transparent medium649D may be a similar material and similarly secured as described above in connection with the other transparent mediums649.

The fiber array unit643may be secured to top surfaces of the optical package300and/or the transparent medium649D similarly as described above. As illustrated, optical signal from the optical fibers645passes through the transparent medium649D to optical components (e.g., the edge couplers109E) of the optical interposer100. In some embodiments (not specifically illustrated), the transparent medium649D may be omitted, similarly as described above in connection with the optical port641B. In such embodiments, the redirection structure647D may be chosen with a desired shape and positioned in such a way as to redirect angled light from the optical fibers645(e.g., secured directly over the optical package300) to a substantially horizontal path to the edge couplers109E of the optical interposer100.

As noted above, the embodiment illustrated inFIG.12Dprovides an embodiment of the semiconductor package in which the optical package300, the second semiconductor device400, and the third semiconductor device500are bonded to the redistribution interposer701, which may be, e.g., an integrated fan-out (InFO) substrate. In this embodiment, before those bonding steps, InFO TDVs715may be initially formed (using, e.g., a photolithographic masking and plating process) on a substrate (not separately illustrated) adjacent to a fourth semiconductor device703and a fifth semiconductor device705, which may be similar as described above in connection with the second semiconductor device400and/or the third semiconductor device500. Once in place, the InFO TDVs715, the fourth semiconductor device703, and the fifth semiconductor device705are encapsulated with a second encapsulant707(similar to the encapsulant621), and fourth metallization layers711(similar to the first metallization layers121) may be formed. The substrate may then be removed, and fifth metallization layers721may be formed on an opposite side of the InFO TDVs715.

Once the redistribution interposer701has been formed, the second semiconductor device400and the third semiconductor device500may be bonded to it using the third external connections615, and the optical package300may be attached using the first external connectors317. Additionally, the interposer substrate701may be bonded to the second substrate631using, e.g., fifth external connectors709, and the fourth external connections633are formed on the second substrate631. However, any suitable processes and structures may be utilized.

Referring toFIG.12E, the semiconductor package may have an optical port641E that includes a redirection structure647E and a transparent medium649E to redirect light between, e.g., optical components of the optical interposer100and the optical fibers645. As illustrated, the redirection structure647E may be a prism mounted on the second substrate631(e.g., instead of on the interposer substrate601or the redistribution interposer701). The redirection structure647E may be secured to the second substrate631with an adhesive or by any suitable means. In addition, the transparent medium649E may be a similar material and similarly secured as described above in connection with the other transparent mediums649. The fiber array unit643may be secured to top surfaces of the optical package300and/or the medium component649E similarly as described above. As illustrated, the optical signal from the optical fibers645passes through the transparent medium649E to the edge couplers109E of the optical interposer100. In some embodiments (not specifically illustrated), the transparent medium649E may be omitted, similarly as described above in connection with the optical port641B. In such embodiments, the redirection structure647E may be chosen with a desired shape and positioned in such a way as to redirect angled light from the optical fibers645(e.g., secured directly over the optical package300) to a substantially horizontal path to the edge couplers109E of the optical interposer100.

FIGS.13-17illustrate various additional embodiments of the semiconductor package. For example,FIGS.13-15depict mount-last embodiments for attaching an optical port641F, wherein the optical port641F is attached after the optical package300is attached to the interposer substrate601. In addition,FIGS.16-17depict mount-first embodiments for attaching an optical port641G, wherein the optical port641G is attached to the optical package300before the optical package300is attached to the interposer substrate601. The features illustrated and described in the following embodiments may be formed and attached similarly as the analogous features described above, unless otherwise stated.

FIGS.13-15illustrate the mount-last embodiments of forming a semiconductor package, in accordance with various embodiments.FIG.13illustrates the optical package300, the second semiconductor device400, and the third semiconductor device500being attached to the interposer substrate601, similarly as described above. As shown, the optical package300may be attached directly to the third metallization layers611without conductive pillars (e.g., the conductive pillars613) being formed along the interposer substrate601. However, in some embodiments (not specifically illustrated), the optical package300may be attached to conductive pillars, similarly as described above in connection withFIGS.9-11. In such embodiments, the second semiconductor device400and the third semiconductor device are attached first, and the encapsulant621may be formed and etched before attaching the first optical interposer300.

FIG.14illustrates that, after attaching the optical package300the semiconductor package, an optical port641F is attached to the semiconductor package. In some embodiments, one or more recesses may be etched into a top surface of the interposer substrate601, and an adhesive651such as a glue or epoxy may be deposited in the recesses. As discussed below, the optical port641F may then be attached to the adhesive651in a location laterally adjacent to the optical package300.

In accordance with some embodiments, the optical port641F includes a redirection structure647F that is housed within a transparent medium649F before attachment to the interposer substrate601. For example, the redirection structure647F may be a reflector which is angled to redirect an optical signal between the subsequently attached optical fibers645and optical components (e.g., edge couplers109E) of the optical interposer100. In addition, the transparent medium649F may be a glass or plastic material that is transparent to the optical signal. As such, the redirection structure647F may be encapsulated during formation or shaping of the transparent medium649F. However, the redirection structure647F and the transparent medium649F may be formed by any suitable means. The optical port641F further includes a fiber array unit643to secure the optical fibers645. The optical port641F is secured in place against the interposer substrate601by the adhesive651, and the transparent medium649F may be further secured in place against the optical package300with another adhesive or optical glue (not specifically illustrated).

In some embodiments, the transparent medium649F may include a plurality of “legs” for improved stability against the interposer substrate601. In other embodiments, the transparent medium649F may have a wide base (e.g., a single leg) for improved stability against the interposer substrate601. In addition, the transparent medium649F may include an “arm” for stability against the optical package300. Further, the transparent medium649F may include a “cap” upon which the fiber array unit643is attached (seeFIG.16). Although not specifically illustrated, the cap of the transparent medium649F may extend similarly as the arm against the optical package300for improved stability, and the cap may be secured with any suitable adhesive or glue, whether transparent or opaque.

FIG.15illustrates that, after the optical port641F has been placed, the optical package300, the second semiconductor device400, the third semiconductor device500, and the optical port641F are encapsulated with an encapsulant653, similarly as described above in connection with the encapsulant621. In an embodiment, the encapsulant653may be a molding compound, epoxy, or the like. The encapsulant653may be applied by compression molding, transfer molding, or the like. The encapsulant653is further placed in gap regions between the optical package300, the second semiconductor device400, the third semiconductor device500, and the optical port641F. The encapsulant653may be applied in liquid or semi-liquid form and then subsequently cured.

A planarization process is performed on the encapsulant653once the encapsulant653has been placed. Once planarized, top surfaces of the encapsulant653, the optical package300, the second semiconductor device400, and the third semiconductor device500are substantially coplanar within process variations. The planarization process may be, for example, a CMP, a grinding process, or the like. In some embodiments, the planarization may be omitted.

FIG.15further illustrates that, after forming the encapsulant653, the optical fiber643may be attached over the medium component649F. In some embodiments, a cleaning or removal process (e.g., a chemical cleaning) may be performed to expose a top surface of the transparent medium649F through the encapsulant653(if remaining above). The fiber array unit643may be placed so as to optically couple the optical fibers645and optical components (e.g., the edge couplers109E) of the optical interposer100. For example, the fiber array unit643may be secured to the semiconductor package using a suitable adhesive such as, e.g., an optical glue (not specifically illustrated). In some embodiments, the optical glue comprises a polymer material such as epoxy-acrylate oligomers, and may have a refractive index between about 1 and about 3. However, any suitable material may be utilized.

In addition, the interposer substrate601may be bonded to a second substrate631with, e.g., the second external connectors609. In an embodiment, the second substrate631may be a package substrate, which may be a PCB or the like. The second substrate631may include one or more dielectric layers and electrically conductive features, such as conductive lines and vias. In some embodiments, the second substrate631may include through-vias, active devices, passive devices, and the like. The second substrate631may further include conductive pads formed at the upper and lower surfaces of the second substrate631.

The second external connectors609may be aligned with corresponding conductive connections on the second substrate631. Once aligned the second external connectors609may then be reflowed in order to bond the second substrate631to the interposer substrate601. However, any suitable bonding process may be used to connect the interposer substrate601to the second substrate631.

Additionally, the second substrate631may be prepared for further processing by forming fourth external connections633on an opposite side of the second substrate631from the optical package300. In an embodiment, the fourth external connections633may be formed using similar processes and materials as the second external connectors609. However, any suitable materials and processes may be utilized. It should be appreciated that features described in connection withFIGS.12A-12Emay be substituted for features illustrated or described in connection withFIGS.13-15, where applicable.

FIGS.16-17illustrate the mount-first embodiments of forming a semiconductor package, in accordance with various embodiments.FIG.16illustrates the second semiconductor device400and the third semiconductor device500being attached to the interposer substrate601, similarly as described above. In addition, an optical port641G is attached to the optical package300before attaching the optical package300(and the optical port641G) to the semiconductor package. Similarly as previous embodiments (seeFIGS.13-15), the optical package300may be attached directly to the third metallization layers611without conductive pillars (e.g., the conductive pillars613) being formed along the interposer substrate601. However, in some embodiments (not specifically illustrated), the optical package300may be attached to conductive pillars, similarly as described above in connection withFIGS.9-11. In such embodiments, the second semiconductor device400and the third semiconductor device are attached first, and the encapsulant621may be formed and etched before attaching the first optical interposer300.

In accordance with some embodiments, the optical port641G includes a redirection structure647G that is housed within a transparent medium649G before attachment to the interposer substrate601, similarly as described above in connection with the redirection structure647F. For example, the redirection structure647G may be a reflector which is angled to redirect an optical signal between the subsequently attached optical fibers645and optical components (e.g., edge couplers109E) of the optical interposer100. In addition, the transparent medium649G may be a glass or plastic material that is transparent to the optical signal. As such, the redirection structure647G may be encapsulated during formation or shaping of the transparent medium649G. However, the redirection structure647G and the transparent medium649G may be formed by any suitable means. The transparent medium649G may be secured in place against the optical package300with an adhesive or optical glue (not specifically illustrated).

In some embodiments, the transparent medium649G may include a plurality of “legs” for improved stability against the optical package300(e.g., as opposed to being secured against the interposer substrate601). In some embodiments (not specifically illustrated), the transparent medium649G may include an “arm” for stability against the interposer substrate601. However, in the illustrated embodiment, the transparent medium649G is displaced from the interposer substrate601. Further, the transparent medium649F includes a “cap” upon which the fiber array unit643is attached (seeFIG.17). Although not specifically illustrated, the legs of the transparent medium649F may be secured with a suitable adhesive, wherein at least the leg adjacent to the optical components of the optical interposer100is secured with a transparent adhesive such as an optical glue659.

FIG.17illustrates that, after the optical package300and the optical port641G have been placed, the optical package300, the second semiconductor device400, the third semiconductor device500, and the optical port641G are encapsulated with an encapsulant655, similarly as described above in connection with the encapsulants621,655. In an embodiment, the encapsulant655may be a molding compound, epoxy, or the like. The encapsulant655may be applied by compression molding, transfer molding, or the like. The encapsulant655is further placed in gap regions between the optical package300, the second semiconductor device400, the third semiconductor device500, and the optical port641G. The encapsulant655may be applied in liquid or semi-liquid form and then subsequently cured.

A planarization process is performed on the encapsulant655once the encapsulant655has been placed. Once planarized, top surfaces of the encapsulant655, the optical package300, the second semiconductor device400, and the third semiconductor device500are substantially coplanar within process variations. The planarization process may be, for example, a CMP, a grinding process, or the like. In some embodiments, the planarization may be omitted.

FIG.17further illustrates that, after forming the encapsulant655, the fiber array unit643may be attached over the transparent medium649G. In some embodiments, a cleaning or removal process (e.g., a chemical cleaning) may be performed to expose a top surface of the transparent medium649G through the encapsulant653(if remaining above). The fiber array unit643may be placed so as to optically couple the optical fibers645and optical components (e.g., the edge couplers109E) of the optical interposer100. For example, the fiber array unit643may be secured to the semiconductor package using a suitable adhesive such as, e.g., an optical glue (not specifically illustrated). In some embodiments, the optical glue comprises a polymer material such as epoxy-acrylate oligomers, and may have a refractive index between about 1 and about 3. However, any suitable material may be utilized.

In addition, the interposer substrate601may be bonded to a second substrate631with, e.g., the second external connectors609. In an embodiment, the second substrate631may be a package substrate, which may be a PCB or the like. The second substrate631may include one or more dielectric layers and electrically conductive features, such as conductive lines and vias. In some embodiments, the second substrate631may include through-vias, active devices, passive devices, and the like. The second substrate631may further include conductive pads formed at the upper and lower surfaces of the second substrate631.

The second external connectors609may be aligned with corresponding conductive connections on the second substrate631. Once aligned the second external connectors609may then be reflowed in order to bond the second substrate631to the interposer substrate601. However, any suitable bonding process may be used to connect the interposer substrate601to the second substrate631.

Additionally, the second substrate631may be prepared for further processing by forming fourth external connections633on an opposite side of the second substrate631from the optical package300. In an embodiment, the fourth external connections633may be formed using similar processes and materials as the second external connectors609. However, any suitable materials and processes may be utilized. It should be appreciated that features described in connection withFIGS.12A-12Emay be substituted for features illustrated or described in connection withFIGS.16-17, where applicable.

Various advantages are achieved. In particular, embodiments of the optical port641allow for optical inputs to be received (or optical outputs to be transmitted) by edge couplers109E in the optical interposer100of the optical package300of a semiconductor package. Edge couplers109E tend to have a greater bandwidth for optical signals than other optical components such as grating couplers. In addition, the edge couplers109E may receive or transmit the optical signal through less material by following a substantially horizontal pathway through a side of the optical interposer100as opposed to passing through more material through a top or bottom of the optical interposer, thereby reducing signal loss or distortion. For example, the optical port641redirects the substantially horizontal pathway of the optical signal to have a substantially vertical pathway in relation to optical fibers645above the optical package300and the optical port641. Similarly, the optical port641redirects optical signals from the optical fibers645to be aligned with the edge couplers109E of the optical interposer100.

In an embodiment, a method includes: forming an optical package, forming the optical package comprising: forming optical devices over a substrate; forming a first interconnect structure over the optical devices; and attaching a first semiconductor device to the optical devices; attaching a second semiconductor device to an interposer substrate; attaching the optical package to the interposer substrate; and attaching an optical port adjacent to the optical package, the optical port comprising: an optical fiber; and an optical redirection structure configured to redirect an optical signal between a first pathway and a second pathway, the first pathway being parallel with a major surface of the interposer substrate, the second pathway being non-parallel with the major surface of the interposer substrate. In another embodiment, the optical redirection structure comprises a prism. In another embodiment, the optical port further comprises a glass medium between the optical fiber and the optical redirection structure. In another embodiment, the optical devices comprise an edge coupler, the edge coupler being configured to receive or transmit the optical signal along the first pathway. In another embodiment, the optical fiber comprises a fiber array unit, the fiber array unit being configured to receive or transmit the optical signal along the second pathway. In another embodiment, the method further includes: forming an encapsulant over the second semiconductor device and conductive pillars of the interposer substrate; and cutting the encapsulant to form a platform and to expose the conductive pillar. In another embodiment, attaching the optical package to the interposer substrate comprises attaching the optical package to the platform. In another embodiment, attaching the optical port adjacent to the optical package comprises attaching the optical port to the platform. In another embodiment, the method further includes attaching an interposer substrate to a package substrate, wherein attaching the optical port adjacent to the optical package comprises attaching the optical port to the package substrate.

In an embodiment, a semiconductor device includes: an interposer substrate; an optical package over the interposer substrate, the optical package comprising: an optical interposer comprising optical devices; a first semiconductor device over the optical interposer; and a substrate over the first semiconductor device; and an optical port over the interposer substrate, the optical port comprising: a glass medium being adhered to the optical interposer; a redirection structure embedded in the glass medium; and an optical fiber attached to the glass medium. In another embodiment, the optical package and the optical port are embedded in an encapsulant. In another embodiment, the optical port is adhered to the interposer substrate by a first adhesive layer. In another embodiment, the optical port is adhered to the substrate of the optical package by a second adhesive layer, and wherein the optical port is adhered to the optical interposer by an optical glue. In another embodiment, the optical port is displaced from the interposer substrate. In another embodiment, the redirection structure comprises a reflector.

In an embodiment, a semiconductor device includes: an optical package over and electrically connected to an interposer substrate, the optical package comprising: an optical interposer comprising an edge coupler; a first semiconductor device over and electrically connected to the optical interposer; and a support substrate over the first semiconductor device; an optical port adjacent to the optical package, the optical port configured to direct an optical signal to and from the edge coupler, the optical port comprising an optical redirection structure; a second semiconductor device over and electrically connected to the interposer substrate; and an encapsulant encapsulating lateral edges of the second semiconductor device, a portion of the encapsulant being directly below the optical package. In another embodiment, the optical port further comprises a fiber array unit disposed above the optical redirection structure. In another embodiment, the optical redirection structure comprises a prism. In another embodiment, the prism is mounted on the encapsulant. In another embodiment, the optical redirection structure comprises a reflector, and wherein the reflector is embedded in a transparent medium.