Amplifying circuit with bypass circuit, and electronic device using the same

An amplifying circuit with a bypassing function includes an input terminal to which a signal is input from an antenna, an amplifier connected to the input terminal, a first inductor connected between the input port and a ground, and a bypass circuit connected between the input terminal and the output port of the amplifier. The bypass circuit includes a first port connected to the input terminal, a second port connected to the output port of the amplifier, a switch, a capacitor, and a second inductor. The switch is connected in series between the first and second ports. The capacitor is connected in series to the switch between the first and second ports. The second inductor is connected in series to the switch and the capacitor between the first and second ports. Signal power is not reduced drastically even when the signal passes through the bypass circuit.

This application is a U.S. national stage application of the PCT International Application No. PCT/JP2008/003452, filed Nov. 25, 2008.

TECHNICAL FIELD

The present invention relates to an amplifying circuit with a bypassing function for receiving a signal, and to an electronic apparatus including the amplifying circuit.

BACKGROUND ART

FIG. 12is a circuit diagram of a conventional amplifying circuit100with a bypassing function disclosed in JP2004-328400A. The amplifying circuit100includes an input port101A connected with an antenna101, a band-pass filter (BPF)102to which a signal is applied through the input port100A from the antenna101, an amplifier103to which an output signal of the BPF102is input, a switch104to which an output signal of the amplifier103is input, a bypass circuit105connected to the BPF102and the switch104, and an output selector106for supplying a control signal to the switch104according to power of an output signal of the amplifier103. The amplifier103includes an inverting amplifier107and a feedback circuit108. The output signal of the switch104is supplied to an output port100B of the amplifying circuit100.

When power of the signal input to the amplifier103increases, the amplifier103output a signal with distortion, hence producing undesired noise and deteriorating a receiving quality. The output selector106detects the intensity of the output signal of the amplifier103. According to the result of the detection, the output selector106determines whether or not the intensity of the signal input to the amplifier103is large enough to distort the output signal of the amplifier103. Upon determining that the intensity of the signal input to the amplifier103is too large, the output selector106feeds supplies a control signal to the switch104to drive the switch140to connect between the output port100B and the bypass circuit105. The output selector106may control a feedback rate of the feedback circuit108to optimize the gain of the amplifier103. These operations prevent the output signal of the amplifier103from having distortion.

In the conventional amplifying circuit100, the switch104switches the signal to pass either the amplifier103or the bypass circuit105. However, since the amplifier103and the bypass circuit105are different from each other in impedance characteristics, the profiles of propagation characteristics of the two routes of signal pass are different from each other.FIG. 13illustrates a propagation profile of the signal passing from the antenna101to the switch104of the conventional amplifying circuit100. The profile of the signal shown inFIG. 13is a profile of S21measured with a network analyzer having first and second ports. The first port is connected with a transmitting antenna. The second port is connected to amplifying circuit100with a bypassing function shown inFIG. 12. As shown inFIG. 13, the profile110of S21represents the signal passing through the amplifier103while the profile111of S21represents the signal passing through the bypass circuit105. The amplifying circuit100with bypassing function is designed for receiving digital signals at frequencies ranging from 470 MHz to 750 MHz for a digital video broadcasting for a handheld (DVB-H) system. As shown inFIG. 13, the difference between the profiles110and111at 470 MHz is explicitly different from the difference between profiles110and111at 750 MHz. The profiles110and111are significantly different from each other at frequencies ranging from 470 MHz to 750 MHz. This difference of the profiles changes the amplitude of the signal at the output port according to the frequency of the signal before and after the switching of the switch104. As shown inFIG. 13, the difference at about 750 MHz between the profiles110and111is about 15 dB while the difference at about 470 MHz between the profiles110and111is about 30 dB. A receiver for the DVB-H system often operates under an environment that creates frequency selective fading which causes a significant change in the intensity of the received signal by time. If the intensity of the received signal is significantly reduced by the frequency selective fading while the signal is initially received through the bypass circuit105, the large difference between the profiles110and111deteriorates the output signal of the amplifying circuit100and changes a frequency characteristic of the amplifying circuit100. The quality of the signal received by the receiver becomes low, and accordingly reduces communication quality.

SUMMARY OF THE INVENTION

An amplifying circuit with a bypassing function includes an input terminal to which a signal is input from an antenna, an amplifier connected to the input terminal, a first inductor connected between the input port and a ground, and a bypass circuit connected between the input terminal and the output port of the amplifier. The bypass circuit includes a first port connected to the input terminal, a second port connected to the output port of the amplifier, a switch, a capacitor, and a second inductor. The switch is connected in series between the first and second ports. The capacitor is connected in series to the switch between the first and second ports. The second inductor is connected in series with the switch and the capacitor between the first and second ports.

The amplifying circuit does not reduce power of a signal drastically even when the signal passes through the bypass circuit, as compared to passing through the amplifier, thus maintaining a profile of a propagation property unchanged and providing preferable transmission quality.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

FIG. 1is a circuit diagram of an antenna module17including an amplifying circuit1with a bypassing function according to Exemplary Embodiment 1 of the present invention. An antenna2and the amplifying circuit1connected with the antenna2are installed in the antenna module17. The amplifying circuit1includes an input terminal1A to which a signal is input from the antenna2, an amplifier4having an input port3connected to the input terminal1A, a bypass circuit6having a port6A connected to the input terminal1A and a port6B connected to an output port5of the amplifier4, an inductor7connected between a node3A and a ground, and an output terminal1B. The output terminal1B is connected to the output port5of the amplifier4, thus being coupled to the output port5of the amplifier4. The bypass circuit6includes an inductor8, a capacitor9, and a switch10which are connected in series between the ports6A and6B. Since the node3A is connected directly to the input port3of the amplifier4, the inductor7is actually connected between the input port3and the ground. A signal from the antenna2is input to the input port3of the amplifier4and the port6A of the bypass circuit6. The amplifier4includes a field effect transistor (FET)54which acts as an amplifying element for amplifying the signal input to the input port3and outputting the amplified signal to the output port5. The FET54has a gate54G, a source54S, and a drain54D. The amplifier4further includes a power supply port4C and a load56, such as a resistor or an inductor, connected in series between the power supply port4C and the drain54D of the FET54. Power for driving the FET54to operate the amplifier4is input to the power supply port4C. Power to operate the amplifier4of the amplifying circuit1is input to the power supply port4C. The input port3and the output port5of the amplifier4are connected to the gate54G and the drain54D, respectively. In other words, the load56is connected in series between the power supply port4C and the output port5. A bias circuit11is connected between the source54S and the ground. The bias circuit11includes a resistor11A and a capacitor11B which are connected in parallel to each other between the source54S and the ground. A direct-current (DC) block capacitor12is connected between the output port5and the output terminal1B. The output terminal1B is also connected to a signal processor14. The power supply terminal55is connected in series with a choke coil. A capacitor for eliminating noise is connected between the power supply terminal55and the ground. An electronic apparatus1001according to Embodiment 1 includes the antenna module17, the signal processor14connected to the output terminal1B of the antenna module17(the amplifying circuit1), and a display31connected to the output terminal of the signal processor14. The signal processor14processes a signal output from the output terminal1B of the antenna module17. The display31displays an image and outputs sounds based on the processed signal.

When the switch10is turned off to be open, the power is supplied via the power supply terminal55to the power supply port4C to activate the amplifier4. The signal received by the antenna2is transferred via the amplifier4to the output port5.

When the intensity of the signal input to the amplifier4increases to distort the signal output from the amplifier4, the switch10is turned on and closed to stop supply the power to the amplifier4. This operation allows the signal received by the antenna2to be transferred via the bypass circuit6to the output port5. Accordingly, even when the intensity of the signal received by the antenna2is large, the signal output from the output terminal1B of the amplifying circuit1is not distorted.

FIG. 2is an equivalent circuit of the amplifying circuit1while the amplifier4is not energized and the switch10is turned on. When the amplifier4is not energized, the power supply terminal55is open. InFIG. 2, the antenna2is an open-end type which has end2A opening (FIG. 1). The inductor7and the capacitor13are connected in parallel between the input port3and the ground. The capacitor13is an input capacitance of the gate54G of the FET54when the amplifier4is not energized. The inductor8and the capacitor9of the bypass circuit6are connected in series between the input port3and the signal processor14. The DC block capacitor12shown inFIG. 1is substantially conducted for signals at a frequency received by the antenna2, thus not being shown inFIG. 2. The inductor7, the capacitor13, the inductor8, and the capacitor9constitute a band-pass filter to appropriately control a propagation property from the antenna2to the output port5with respect to the frequency of the received signal.

The capacitance of the capacitor13mainly includes the capacitance of the gate54G of the FET54but actually, further includes the capacitance of the capacitor11B in the bias circuit11. When the propagation property of the bypass circuit6can hardly be set to its optimum level with the capacitor11B and the input capacitance for the gate54G, at least one of a capacitor and an inductor is connected between the input terminal1A and the input port3to optimize the property.

FIG. 3illustrates the propagation property from the input terminal1A to the output terminal1B in the amplifying circuit1. Profile15represents a signal from the antenna2when the amplifier4is activated with the switch10turned off. Profile16represents the signal when the amplifier4is not energized and deactivated with the switch10turned on, i.e., the signal passing from the antenna2via the bypass circuit6. As shown inFIG. 3, the difference between the two profiles of the propagation property is substantially constant within a range between 470 MHz and 750 MHz. The profiles15and16of the propagation property of the amplifying circuit1according to Embodiment 1 are more closely approximated to each other than the profiles110and111of the amplifying circuit100with a bypassing function shown inFIG. 13. Therefore, upon being input from the antenna2to the input terminal1A, the signal passes through the bypass circuit6and does not attenuate significantly. Further, the amount of the attenuation is constant throughout frequencies, providing high signal-transmission quality.

The amplifying circuit1operates in three different modes A1to A3depending on the status of the switch10and the operation of the amplifier4. In the mode A1, while the switch10is turned off to be open, the amplifier4is energized to operate with power supplied to power supply port4C from the power supply terminal55. In the mode A2, while the switch10is turned on to be closed, the amplifier4is energized to operate with power supplied to power supply port4C from the power supply terminal55. In the mode A3, while the switch10is turned on to be closed, the amplifier4does not operate with no power supplied to power supply port4C.

When the intensity of the signal input to the amplifier4is relatively small to prevent a signal output from the amplifier4from being distorted, the amplifying circuit1operates in the mode A1. In the mode A1, most of the signal input from the antenna2reaches output port4via the amplifier4.

When the intensity of the signal input to the amplifier4is large to distort the signal output from the amplifier4, the amplifying circuit1operates in the mode A3. In the mode A3, most of the signal input from the antenna2reaches output port5via the bypass circuit6.

When the intensity of the signal input to the amplifier4is medium between the intensities in the modes A1and A3, the amplifying circuit1operates in the mode A2. In the mode A2, the amplifier4operates while the bypass circuit6is connected. The bypass circuit6in the mode A2functions as a feedback circuit to attenuate the gain of the amplifier4to an appropriate level. This eliminates a feedback circuit108of the conventional amplifying circuit100with a bypassing function shown inFIG. 12, hence reducing the size of the amplifying circuit1. The amplifying circuit1operating in the mode A2provides profile18between the two profiles15and16shown inFIG. 3, thus preventing the power of the input signal from drastically decreasing.

More particularly, the amplifying circuit1operates in the modes A1to A3in response to the intensity of the signal input to the input port3of the amplifier4, as described below. When the intensity of the input signal is smaller than a first predetermined threshold level, the amplifying circuit1operates in the mode A3. When the intensity of the input signal is larger than the first threshold level and smaller than a second predetermined threshold level which is greater than the first threshold level, the amplifying circuit1operates in the mode A2. When the intensity of the input signal is greater than the second threshold level, the amplifying circuit1operates in the mode A1.

Alternatively, the amplifying circuit1according to Embodiment 1 can operates only in the two modes A1and A3but not in the mode A2. This operation reduces the time for supplying power to the amplifier4, accordingly reducing the power consumption of the amplifying circuit1. More specifically, the amplifying circuit1operates in the modes A1and A3in response to the intensity of the signal input to the input port3of the amplifier4, as described below. When the intensity of the input signal is smaller than a predetermined threshold level, the amplifying circuit1operates in the mode A3. When the intensity of the input signal is larger than the threshold level, the amplifying circuit1operates in the mode A1.

A method of designing the antenna module17including the amplifying circuit1with a bypassing function according to Embodiment 1 as a wide-band antenna module will be described below.FIGS. 4 to 6illustrate profiles of the frequency characteristic of impedance at various portions of the antenna module17including the amplifying circuit1. The antenna module17is designed for use with Digital Video Broadcasting for Handheld (DVB-H) to receive signals at frequencies ranging from 470 MHz to 750 MHz.

FIG. 4is a Smith chart illustrating the input impedance19of the amplifier4in view from the input port3. As represented by the capacitor13shown inFIG. 2, the input impedance19is capacitive in a range from 470 MHz to 750 MHz due to mainly the capacitance at the gate54G of the FET54. When the antenna2has an impedance20complex conjugate to the input impedance19of the amplifier4, the antenna2matches the amplifier4in impedance, inputting the signal input by the antenna2to the amplifier4efficiently. However, the impedance of the antenna2generally shifts clockwise on the Smith chart as the frequency changes from low to high, and hence, hardly matching the impedance20shown inFIG. 4.FIG. 5is a Smith chart illustrating the impedance51of an open-end type meander antenna which can be used as the antenna2. As shown inFIG. 5, the impedance51widely shifts clockwise from 470 MHz to 750 MHz. Thus, the impedance51of the antenna2can hardly match the impedance20shown inFIG. 4. In other words, the antenna2hardly matches the amplifier4in impedance.

FIG. 6is a Smith chart illustrating the input impedance52of the amplifier4in view from the node3A. In order to allow the antenna2to match the amplifier4in impedance, the input impedance52is adjusted by the inductor7. The input impedance52shown inFIG. 6has a profile crossing the horizontal axis of the Smith chart at substantially an intermediate frequency in the range between 470 MHz and 750 MHz. This profile allows the impedance52to be complex conjugate to the impedance51of the antenna2shown inFIG. 5at a frequency of about 470 MHz and at a frequency at about 750 MHz, hence allowing the antenna2to match the amplifying circuit1in impedance. At the intermediate frequency in the range between 470 MHz and 750 MHz, the antenna2resonates to increase the power of the received signal. Therefore, even when the antenna2does not match the amplifying circuit1in impedance, the signal input to the amplifier4has a comparatively large intensity. As described, the inductor7functions as a component matching the antenna2to the amplifying circuit1in impedance in the modes A2and A3when the amplifier4operates. The inductor7functions as a component for forming a band-pass filter in the mode A1when the amplifier4does not operate. The inductor7, a single component, functioning as the two difference functional components, reduces the size of the amplifying circuit1with a bypassing function.FIG. 3illustrates the propagation property from the antenna2to the output terminal1B of amplifying circuit1designed by the above method.

The antenna2, upon being implemented by a very small antenna, may have impedance different from the impedance51shown inFIG. 5. In this case, the impedance of the antenna2in view from the input terminal1A can matched the impedance51shown inFIG. 5with at least one of an inductor and a capacitor connected in series between the antenna2and the input terminal1A. More particularly, the inductor connected in series between the antenna2and the input terminal1A causes the impedance to shift clockwise at higher frequencies in the frequency range. The capacitor connected in series between the antenna2and the input terminal1A causes the impedance to shift counter-clockwise at lower frequencies in the frequency range. By properly adjusting the inductor and the capacitor, the impedances near the lowest and highest frequencies in the frequency range can shift to predetermined positions to allow the impedance to intersect the horizontal axis of the Smith chart at substantially an intermediate frequency in the range. Therefore, the impedance of the antenna2in view from the input terminal1A is complex conjugate to the input impedance52shown inFIG. 6even near the highest and lowest frequencies in the frequency range. Thus, the antenna2matches the amplifying circuit1in impedance throughout a wide range of frequencies, inputting the signal received by the antenna2to the amplifying circuit1efficiently.

The antenna2of the antenna module17according to Embodiment 1 is the open-end type antenna, but may be an antenna element, such as a loop antenna or an inverted-F antenna, including an antenna element connected to a ground. The open-end type antenna easily provides the impedance51shown inFIG. 5and can eliminate the adjusting with the inductor or the capacitor connected between the antenna2and the input terminal1A, hence providing the antenna module17with a small size and a high efficiency.

The inductor8is shown inFIG. 1as a lumped-parameter element, but may be implemented by a distributed constant element distributed along the transmission path of the bypass circuit6. This arrangement reduces the number of inductors to be installed, hence further reducing the size of the amplifying circuit1.

The FET54is included in the amplifier4shown inFIG. 1, but may be replaced by a bipolar transistor. The input impedance of the base of the bipolar transistor is closer to 50 ohms on a Smith chart than the input impedance of the gate54G of the FET54is, hence providing the antenna module17and the amplifying circuit1which can receive radio signals in a wider frequency range.

FIG. 7Ais a circuit diagram of an amplifying circuit201with a bypassing circuit according to Exemplary Embodiment 2 of the present invention. InFIG. 7A, components identical to those of the amplifying circuit1according to Embodiment 1 shown inFIG. 1are denoted by the same reference numerals, and their description will be omitted. The amplifying circuit201includes an output terminal201B and a bypass circuit206instead of the output terminal1B and the bypass circuit6of the amplifying circuit1shown inFIG. 1. An antenna module217according to Embodiment 2 includes the amplifying circuit201and an antenna2connected to an output terminal1A of the amplifying circuit201. An electronic apparatus2001according to Embodiment 2 includes the antenna module217, a signal processor14connected to the output terminal201B of the antenna module217(the amplifying circuit201), and a display31connected to the output terminal of the signal processor14. A direct-current (DC) block capacitor12is connected between the output terminal210B and the output port5of the amplifier4. More specifically, the output terminal201B is coupled to the output port5of the amplifier4via the DC block capacitor12

In the bypass circuit206shown inFIG. 7A, inductors8A are provided as a distributed constant element distributed along the transmission path in the bypass circuit206instead of the inductor8, a lumped constant element, of the bypass circuit6according to Embodiment 1 shown inFIG. 1. Since the transmission path itself has an inductance at higher frequencies, the inductance is positively used as the inductors8A can eliminate a chip element corresponding to the inductor8shown inFIG. 1. This arrangement allows the amplifying circuit201to be manufactured efficiently and have a small size.

The bypass circuit206includes a port206A connected to the input terminal1A and a port206B connected to the output terminal201B. The bypass circuit206further includes a variable resistor21, a switch10, a capacitor9, and the inductors8A which all are connected in series between the ports206A and206B.

In the mode A2where the switch10is turned on and the amplifier4operates, the bypass circuit206functions as a feedback circuit of the amplifier4similar to the bypass circuit6according to Embodiment 1. The gain of the amplifying circuit201can be adjusted in response to the intensity of the signal input to the amplifier4by controlling the variable resistor21. In the electronic apparatus2001according to Embodiment 2, the signal processor14measures a characteristic, such as power of the signal or a carrier/noise (C/N) ratio of the received signal, to control the variable resistor21in accordance with the measured characteristic. This operation adjusts the gain of the amplifier4accurately in response to the signal received by the antenna2. In the mode A3where the switch10is turned on and the amplifier4does not operate, the resistance of the variable resistor21is zero. This operation reduces the loss of the signal passing through the bypass circuit206in the mode A3.

In the bypass circuit206shown inFIG. 7A, the switch10is connected directly to the port206A connected to the input terminal1A. The inductors8A and the capacitor9are connected between the switch10and the port206B connected to the output terminal201B. Accordingly, when the switch10is turned off, the impedance of the bypass circuit206in view from the input terminal1A is that of opening. This operation prevents the signal from being disturbed by the bypass circuit206in the mode A1where the switch10is turned off to be open.

The port206B of the bypass circuit206shown inFIG. 7Ais connected to the output terminal201B, and can be connected to the output port5of the amplifier4similar to the port6B of the bypass circuit6according to Embodiment 1.

FIG. 7Bis a circuit diagram of another amplifying circuit1201with a bypassing function according to Embodiment 2. InFIG. 7B, components identical to those of the amplifying circuit201shown inFIG. 7Aare denoted by the same reference numerals, and their description will be omitted. The amplifying circuit1201includes a variable capacitance element209instead of the capacitor9of the amplifying circuit201shown inFIG. 7A. By adjusting the capacitance of the variable capacitance element209and the resistance of the variable resistor21, characteristics, such as gain and phase of the amplifying circuit1201can favorably be adjusted precisely in accordance with the intensity of the signal input to the amplifier4in the mode A2where the bypass circuit functions as a feedback circuit.

FIG. 7Cis a circuit diagram of still another amplifying circuit2201with a bypassing function according to Embodiment 2. InFIG. 7C, components identical to those of the amplifying circuit201shown inFIG. 7Aare denoted by the same reference numerals, and their description will be omitted. The amplifying circuit2201does not include the variable resistor21of the amplifying circuit1201shown inFIG. 7Bbut includes the switch10, the variable capacitance element209, and the inductors8A connected in series between the ports206A and206B. By adjusting the capacitance of the variable capacitance element209, characteristics, such as gain and phase of the amplifying circuit2201can favorably be adjusted precisely in accordance with the intensity of the signal input to the amplifier4in the mode A2where the bypass circuit functions as a feedback circuit.

FIG. 8is a circuit diagram of an amplifying circuit301with a bypassing function according to Exemplary Embodiment 3 of the present invention. InFIG. 8, components identical to those of the amplifying circuit1according to Embodiment 1 shown inFIG. 1are denoted by the same reference numerals, and their description will be omitted. Antenna module317according to Embodiment 3 includes the amplifying circuit301and an antenna2connected to an output terminal1A of the amplifying circuit301. An electronic apparatus3001according to Embodiment 3 includes the antenna module317, a signal processor14connected to the output terminal301B of the amplifying circuit301of the antenna module317, and a display31connected to an output terminal of the signal processor14.

The amplifying circuit301shown inFIG. 8further includes a switch23, an inductor24, and a capacitor25in the amplifying circuit1according to Embodiment 1 shown inFIG. 1. The switch23is connected between the output terminal1B and the output port5of the amplifier4. The inductor24and the capacitor25are connected in series between the input terminal1A and the node3A. The output terminal1B is coupled to the output port5of the amplifier4via the switch23.

The amplifying circuit301operates in three modes B1to B3depending on the status of the switches10,23and the operation of the amplifier4. In the mode B1, the switch10is turned off to be open, the switch23is turned on, and the amplifier4operates to have power supplied to supply port4C from the power supply terminal55. In the mode B2, the switches10and23are turned on, and the amplifier4operates with power supplied to power supply port4C from the power supply terminal55. In the mode B3, the switch10is turned on, the switch23is turned off to be open, and the amplifier4does not operate so that no power is supplied to power supply port4C.

When the intensity of signal input to the amplifier4is relatively small so as not to distort the signal output from the amplifier, the amplifying circuit301operates in the mode B1. In the mode B1, most of the signal input from the antenna2reaches the output terminal1B via the amplifier4.

When the intensity of the signal input to the amplifier4is large so as to distort the signal output from the amplifier4, the amplifying circuit301operates in the mode B3. In the mode B3, most of the signal input from the antenna2reaches the output port5via the bypass circuit6.

When the intensity of the signal input to the amplifier4is intermediate between respective intensities in the modes B1and B3, the amplifying circuit301operates in the mode B2. In the mode B2, the bypass circuit6functions as a feedback circuit to attenuate the gain of the amplifier4to an appropriate level. This arrangement eliminates a feedback circuit108of the conventional amplifying circuit100shown inFIG. 12, hence reducing the size of the amplifying circuit301. The amplifying circuit301operating in the mode B2has a propagation property of profile18between the profiles15and16shown inFIG. 3, preventing the intensity of the input signal from decreasing drastically.

More particularly, the amplifying circuit301operates in the modes B1to B3in response to the intensity of the signal input to the input port3of the amplifier4, as described below. When the intensity of the signal is smaller than a first predetermined threshold level, the amplifying circuit301operates in the mode B3. When the intensity of the signal is larger than the first threshold level and smaller than a second predetermined threshold level which is larger than the first threshold level, the amplifying circuit301operates in the mode B2. When the intensity of the signal is larger than the second threshold level, the amplifying circuit301operates in the mode B1.

Alternatively, the amplifying circuit301can be configured to operate only in the two modes B1and B3but not in the mode B2. This operation reduces the time to supply power to the amplifier4, and accordingly, reduces the power consumption of the amplifying circuit301. More specifically, the amplifying circuit301operates in the modes B1and B3in response to the intensity of the signal input to the input port3of the amplifier4, as described below. When the intensity of the input signal is smaller than a predetermined threshold level, the amplifying circuit301operates in the mode B3. When the intensity of the input signal is larger than the threshold level, the amplifying circuit301operates in the mode B1.

When the amplifying circuit301according to Embodiment 3 operates in the mode B3, the switch23is turned off to be open to disconnect the port6B of the bypass circuit6from the output port5of the amplifier4, thus eliminating influence of the impedance at the output port5of the amplifier4. This improves the quality of the signal passing from the antenna2via the bypass circuit6to the output terminal1B in the mode B3.

The inductor24and the capacitor25connected in series between the input terminal1A and the node3A allow the impedance of the antenna2to be closely approximated to the impedance51shown inFIG. 5, thus allowing the antenna2to be used in a wide frequency range.

The switch10shown inFIG. 8is connected directly to the port6B of the bypass circuit6while the inductor8and the capacitor9are connected between the switch10and the port6A. The two switches10,23are single pole single throw (SPST) switches. If the amplifying circuit301operates only in the modes B1and B3but not in the mode B2, two SPST switches10and23may be replaced by one single pole double throw (SPDT) switch, which reduces the size of the amplifying circuit301.

FIG. 9is a circuit diagram of an amplifying circuit401with a bypassing function according to Exemplary Embodiment 4 of the present invention. InFIG. 9, components identical to those of the amplifying circuit201according to Embodiment 2 shown inFIG. 7Aare denoted by the same reference numerals, and their description will be omitted. The amplifying circuit401further includes a switch423additionally to the amplifying circuit201shown inFIG. 7A. The DC block capacitor12and the switch423are connected in series between the output terminal201B and the output port5of the amplifier4. An antenna module417according to Embodiment 4 includes the amplifying circuit401and an antenna2connected to an output terminal1A of the amplifying circuit401. An electronic apparatus4001according to Embodiment 4 includes the antenna module417, a signal processor14connected to the output terminal201B of the amplifying circuit401of the antenna module417, and a display31connected to the output terminal of the signal processor14. The switch423is connected directly to the output terminal201B. The DC block capacitor12is connected between the switch423and the output port5. The output terminal201B is coupled to the output port5of the amplifier4via the switch423and the DC block capacitor12.

The amplifying circuit401operates in three different modes C1to C3depending on the status of the switches10and423and the operation of the amplifier4. In the mode C1, the switch10is turned off to be open, the switch423is turned on, and the amplifier4operates to have power supplied to power supply port4C from the power supply terminal55. In the mode C2, the switches10and423are turned on, and the amplifier4operates to have power supplied to power supply port4C from the power supply terminal55. In the mode C3, the switch10is turned on, the switch423is turned off to be open, and the amplifier4does not operate, and thus, no power is supplied to power supply port4C. The operations of the amplifying circuit401in the modes C1to C3are identical to those of the amplifying circuit301shown inFIG. 8in the modes B1to B3, providing the same effects.

In the bypass circuit206shown inFIG. 9, the switch10is directly connected to the port206A connected to the input terminal1A. The inductors8A and the capacitor9are connected between the switch10and the port206B connected to the output terminal201B. Accordingly, when the switch10is turned off, the impedance of the bypass circuit206as viewed from the input terminal1A is an impedance of opening. In the mode C1where the switch10is turned off to be open, the signal can not be disturbed by the bypass circuit206.

When the amplifying circuit401according to Embodiment 4 operates in the mode C3, the switch423is turned off to be open to disconnect the port206B of the bypass circuit206from the output port5of the amplifier4, hence eliminating an influence of the impedance of the output port5of the amplifier4. This arrangement improves the quality of the signal passing from the antenna2across the bypass circuit206to the output terminal201B in the mode C3.

Alternatively, when the operation of the amplifying circuit401shifts from the mode C1or C2to the mode C3, the switch423can be turned off to be open, and then the amplifier4stops having power supplied thereto. The amplifier4may create a noise upon stopping having power supplied thereto. The switch23is turned off to block the noise, hence improving a noise/frequency (N/F) characteristic of the amplifying circuit401with a bypassing function.

FIG. 10is a circuit diagram of an amplifying circuit501with a bypassing function according to Exemplary Embodiment 5 of the present invention. InFIG. 10, components identical to those of the amplifying circuit201according to Embodiment 2 shown inFIG. 7Aare denoted by the same reference numerals, and their description will be omitted. The amplifying circuit501includes an amplifier504instead of amplifier4of the amplifying circuit201shown inFIG. 7A. The amplifier504further includes a switch523. An antenna module517according to Embodiment 5 includes the amplifying circuit501and an antenna2connected to an output terminal1A of the amplifying circuit501. An electronic apparatus5001according to Embodiment 5 includes the antenna module517, a signal processor14connected to the output terminal501B of the amplifying circuit501of the antenna module517, and a display31connected to the output port of the signal processor14.

The port206B of the bypass circuit206is connected to the output port5of the amplifier504. A direct-current (DC) block capacitor12is connected in series between the output port5and the output terminal501B. The switch523is connected in series between the output port5of the amplifier504and the drain54D of the FET54which is an amplifying element, and connects and disconnects between the output port5and the FET54. The switch523is connected to the output port5and can be closed and opened. The power supply port4C supply power to the FET54for activating the FET54. The switch523is connected in series between the drain54D of the FET54and the output port5, and is connected in series between the power supply port4C and the drain54D of the FET54. The output terminal501B is coupled and connected to the output port5of the amplifier504.

The amplifying circuit501operates in three modes D1to D3depending on the status of the switches10and523. In the mode D1, the switch10is turned off to be open while the switch523is turned on. In the mode D2, both the switches10and523are turned on. In the mode D3, the switch10is turned on while the switch523is turned off to be open.

When the intensity of the signal input to the amplifier504is relatively small so as not to distort the signal output from the amplifier504, the amplifying circuit501operates in the mode D1. In the mode D1, the power is supplied via the power supply terminal55, the load56, and the power supply port4C to the FET54which is an amplifying element to thus activate the amplifier504. This mode allows most of the signal received by the antenna2to reaches the output port5via amplifier504.

When the intensity of the signal input to by the amplifier504is large so as to distort the signal output from the amplifier504, the amplifying circuit501operates in the mode D3. In the mode D3, the FET54is supplied no power from the power supply port55, thus not activating the amplifier504. This mode allows most of the signal input from the antenna2to reach the output port5via the bypass circuit206.

When the intensity of the signal input to the amplifier504is intermediate between the intensities in modes D1and D3, the amplifying circuit501operates in the mode D2. In the mode D2, the power is supplied via the power supply terminal55, the load56, and the power supply port4C to the FET54which is an amplifying element, to thus activate the amplifier504. This arrangement activates the amplifier504while the bypass circuit206is connected. The bypass circuit206in the mode D2functions as a feedback circuit to reduce the gain of the amplifier504to an appropriate level. This operation eliminates a feedback circuit108of the conventional amplifying circuit100with a bypassing function as shown inFIG. 12, hence reducing the size of the amplifying circuit501. The amplifying circuit501operating in the mode D2has a propagation property of profile18between the profiles15and16shown inFIG. 3, hence preventing the intensity of the signal from decreasing drastically.

More particularly, the amplifying circuit501operates in the modes D1to D3in response to the intensity of the signal input to the input port3of the amplifier504, as described below. When the intensity of the input signal is smaller than a first predetermined threshold level, the amplifying circuit501operates in the mode D3. When the intensity of the input signal is larger than the first threshold level and smaller than a second predetermined level which is larger than the first threshold level, the amplifying circuit501operates in the mode D2. When the intensity of the input signal is larger than the second threshold level, the amplifying circuit501operates in the mode D1.

Alternatively, the amplifying circuit501according to Embodiment 5 may operate only in the modes D1, D3but not in the mode D2. This operation reduces the time for supplying power to the amplifier504, accordingly reducing the power consumption of the amplifying circuit501. More specifically, the amplifying circuit501operates in the modes D1and D3in response to the intensity of the signal input to the input port3of the amplifier504, as described below. When the intensity of the input signal is smaller than a predetermined threshold level, the amplifying circuit501operates in the mode D3. When the intensity of the input signal is larger than the threshold level, the amplifying circuit501operates in the mode D1.

In the amplifying circuit501, the switch523is turned on when the amplifier504operates. The switch523is turned off when the amplifier504does not operate. As described above, the status of the switch523allows the FET54, an amplifying element, of the amplifier504to be supplied power or no power. The power supply terminal55is connected with a regulator which generates the power to activate the amplifier504. In each of the amplifying circuits1,201,302, and401according to Embodiments 1 to 4, the regulator itself is switched for supplying power or no power to the amplifier. In the case that the signal varies in intensity fast, the regulator is switched to supply power or no power to the amplifier accordingly fast. The amplifying circuit501according to Embodiment 5 allows the switch523to switch the signal path and to switch fast between the supplying of power and the supplying of no power to the FET54, an amplifying element, while the regulator continues supplying power to the power supply terminal55. The power consumption of the amplifying circuit501in the mode D3is small, equal to that of the amplifying circuits1,201,301, and401in the modes A1to C1.

The operation of each of the amplifying circuits1,201,301,401,501,1201, and2201of the electronic apparatus1001to5001according to Embodiments 1 to 5 can be switched from one mode to another in response to the intensity of the signal input to the amplifier. Alternatively, the operation of the amplifying circuits1,201,301,401,501,1201, and2201can be switched from one mode to another depending on the type of the input signal. More particularly, upon judging that the signal received by the antenna2is a predetermined type, the signal processor14allows the amplifier4,504to have power supplied thereto. Upon judging that the signal received by the antenna2is not the predetermined type, the signal processor14stops supplying power to the amplifier4,504. This operation reduces power consumption of the amplifying circuits1,201,301,401,501,1201, and2201.

An operation of the electronic apparatuses1001to5001according to Embodiments 1 to 5 will be described. Electronic apparatuses1001to5001are adapted to receive television programs of digital video broadcasting for handheld (DVB-H) for use with handheld electronic appliances including mobile telephones.FIG. 11Aillustrates the television programs P1to P5of the DVB-H and a program P6of a digital video broadcasting for terrestrial (DVB-T) or terrestrial-waves television broadcasting system. As shown inFIG. 11A, the programs P1to P6are broadcasted simultaneously, but are packetized to be transmitted.FIG. 11Bis a schematic diagram of a time slicing of the DVB-H system where the signals S1to S6carrying the programs P1to P6, respectively, are transmitted as packets. The signal S1to S5carrying the programs P1to P5of the DVB-H system are transmitted one by one sequentially over one frequency band FB1. This figure shows an operation T1of electronic apparatuses1001to5001. For example, in the operation T1, the electronic apparatuses1001to5001receive the program P1. In this case, each of the antenna modules17,217,317,517is tuned at the frequency band FB1, and the signal processor14processes the signal S1out of the signals S1to S5shown inFIG. 11Bwhich carries the program P1, and allows the display31to display an image and output sounds of the program P1carried by the signal S1. Not needing the other signals S2to S5carrying the programs P2to P5, the signal processor14supplies power to the amplifier4,504while receiving the signal S1, and supplies no power to deactivate the amplifier4,504while receiving the signals S2to S5. This operation reduces power consumption of the amplifying circuits1,201,301,401,501,1201, and2201of the electronic apparatuses1001to5001. That is, in the electronic apparatuses1001to5001, the signal processor14supplies power to the amplifier4,504to operate when receiving a target signal out of the signals received by the antenna2. The signal processor14supplies no power to deactivate the amplifier4,504when not receiving the target signal, i.e., when receiving a signal out of the received signal other than the target signal. In this case, when the target signal is not received, the amplifying circuit1,201,301,401, or501may operates in the modes A3to D3with the amplifier4,504deactivated and the switch10turned on. This operation allows the signal processor14to monitor the intensity of the received signals via the bypass circuit6while receiving the signal other than the target signal. Even when the target signal is not received, the signal processor14can select an optimum mode out of modes A1to A3, B1to B3, C1to C3, or D1to D3to activate amplifying circuit1,201,301,401,501,1201, or2201to receive the target signal in the optimum mode. Thus, the electronic apparatuses1001to5001can receive the target signal S1with small power consumption with the amplifier4,504producing no signal distortion, and allows the display to display the image and output sounds of the program P1at high quality.

Then, an operation of the electronic apparatuses1001to5001according to Embodiments 1 to 5 will be described. The electronic apparatuses1001to5001are adapted to receive television signals of the DVB-T system. As shown inFIG. 11B, a signal S6carrying a program P6of the DVB-H system is transmitted continuously over a frequency band FB2which is different from the frequency band FB1over which the signal S1to S5carrying programs P1to P5of the DVB-H system are transmitted. The electronic apparatuses1001to5001execute an operation T2. This figure shows the operation T2of electronic apparatuses1001to5001. In the operation T2, the program P6is received by the electronic apparatuses1001to5001. More particularly, each of the antenna modules17,217,317, and517is tuned at the frequency band FB2. The signal processor14supplies power to the amplifier4,504to operate and continuously processes the signal S6shown inFIG. 11B, and allows the display31to display an image and output sounds of the program P6carried by the signal S6. While receiving the signal S6, the signal processor14selects an optimum mode out of modes A1to A3, B1to B3, C1to C3, or D1to D3in accordance with the intensity of the signal S6, and allows amplifying circuit1,201,301,401,501,1201, or2201to receive the signal S6in the selected mode. Thus, the electronic apparatuses1001to5001can receive the signal S6with small power consumption with the amplifier4,504producing no signal distortion, hence allowing display31to display the image and output sounds of the program P6at high quality.

Each of the bypass equipped amplifying circuits1,201,301,401,501,1201,2201can be assembled together with the signal processor14on a single semiconductor chip, reducing the size and power consumption of the electronic apparatuses1001to5001.

An amplifying circuit with a bypassing function according to the present invention does not reduce power of a signal drastically even when the signal passes through a bypass circuit, as compared to passing through an amplifier, thus maintaining a profile of a propagation property unchanged and providing a preferable transmission quality. The amplifying circuit is useful for an electronic apparatus having excellent receiving quality.