Random number generation device having a ring oscillator

It is made possible to provide a random number generation device which generates a physical random number with as little power dissipation as possible. A random number generation device includes: a ring oscillator having at least one set, each set comprising a current noise source and a Schmitt inverter configured to receive an output of the current noise source; and a conversion circuit configured to convert output frequency fluctuation of the ring oscillator to a random number and output the random number.

CROSS-REFERENCE TO RELATED APPLICATION

This application is based upon and claims the benefit of priority from prior Japanese Patent Application No. 2008-1141 filed on Jan. 8, 2008 in Japan, the entire contents of which are incorporated herein by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a random number generation device which generates a random number on the basis of a physical phenomenon.

2. Related Art

As the information communication technique advances and spreads, demands for high quality random numbers are becoming strong. Strength of information security depends upon the random number which becomes the source of prediction difficulty. In the field of scientific technical calculation as well, high quality random numbers are needed for more accurate calculation.

A typically used random number is an arithmetic pseudo random number which is generated through a certain algorithm. A circuit for generating this random number can be fabricated simply. Though, if the initial value (seed) is constant, an output random number always becomes constant. In addition, there is a problem that the output random number has a constant repetition period determined by the circuit configuration.

On the other hand, there is a physical random number generated by utilizing a physical fluctuation phenomenon unlike the arithmetic random number. In the physical random number, the output random number does not depend upon the initial value and a random number series having no repetition period can be obtained, by utilizing the physical fluctuation. An example of a random number generation device which generates such a physical random number is disclosed in, for example, JP-A 2006-189946 (KOKAI).

In the random number generation device disclosed in JP-A 2006-189946 (KOKAI), a high quality random number can be generated by utilizing a noise source which generates noise intentionally made large. In the random number generation device, however, a comparator is used to make random numbers from the noise generated by noise source. There is a problem that the comparator consumes a large amount of power.

SUMMARY OF THE INVENTION

The present invention has been made in view of these circumstances, and an object thereof is to provide a random number generation device which generates a physical random number with as little power dissipation as possible.

A random number generation device according to an aspect of the present invention includes: a ring oscillator having at least one set, each set comprising a current noise source and a Schmitt inverter configured to receive an output of the current noise source; and a conversion circuit configured to convert frequency fluctuation of the ring oscillator to a random number and output the random number.

DETAILED DESCRIPTION OF THE INVENTION

Before the embodiments of the present invention are described, how we developed present invention will be described below.

First, a current noise source used in a random number generation device according to an embodiment of the present invention will now be described. The current noise source means an element whose current value fluctuates large when constant voltages are applied to terminals of the element. For example, an element40includes a fine electron channel42of a nano-scale, and an electron trap44disposed near the electron channel42to generate a noise signal as shown inFIG. 2. As a specific example of the element40, a field effect transistor (FET) having a fine channel length and a fine channel width can be mentioned.

In the FET, the electron channel42is a channel between a source region and a drain region of the FET, and the electron trap44is an electron trap in a gate insulation film of the FET. If an electron e is captured by the electron trap44, then the electron e passing through the electron channel42is influenced by the Coulomb field formed by the electron e and the conductivity of the electron channel42changes. The capture or emission of the electron e in the electron trap44is conducted between the electron channel42and the electron trap44via an energy barrier which is present between the electron channel42and the electron trap44. Since the capture or emission of the electron e occurs at random, the conductivity of the electron channel42fluctuates at random. Consequently, even if a constant voltage is supplied to the electron channel42, a noise signal which fluctuates in current value at random can be generated in the electron channel. Such an element is disclosed in, for example, JP-A 2007-304730 (KOKAI). In the current noise source disclosed in JP-A 2007-304730 (KOKAI), noise is made large by contriving the structure of the MOSFET. A current noise source in which current noise is made large by contriving the structure or layout of the MOSFET is called MOSFET type current noise source.

As another example of the current noise source40, a configuration having an insulation film48which is interposed between a pair of electrodes46aand46bas shown inFIG. 3and which is softly breakdowned can also be used. This current noise source is, for example, a capacitor. If electrical stress is applied to the insulation film48, the conductivity of the insulation film48slightly increases in the capacitor. If a constant voltage is applied to the insulation film48at this time, the electron e moves between electron traps in the insulation film48at random because of the tunnel phenomenon, and a largely fluctuating current value is obtained. A noise signal can be generated owing to the fluctuation in current value. The electrodes46aand46bare formed of a conductive material such as single crystal silicon, polycrystal silicon, amorphous silicon, or metal. The insulation film48is formed of an insulative material such as a single layer film like a silicon oxide film or a silicon nitride film, a high dielectric constant oxide (so-called high-k insulation film) containing hafnium or aluminum, or a composite film obtained by stacking them. The average conductivity of the softly breakdowned insulation film48between the electrodes46aand46bdoes not change by a voltage applied between the electrodes46aand46b. The current noise source in which the average conductivity does not depend upon the voltage between terminals is called resistance type current noise source.

The present inventors examined an oscillator obtained by incorporating a MOSFET type current noise source40into a route in a ring oscillator formed of three-stage inverters501,502and503shown inFIG. 4.FIG. 5shows oscillation waveforms acquired at a point A and a point B in the oscillator by using an oscilloscope. The point A is a node between an output terminal of the current noise source40and an input terminal of the first stage inverter501. The point B is a node between an output terminal of the first stage inverter501and an input terminal of the second stage inverter502. The oscillation waveforms at the point A and the point B are superposed and drawn by aligning timing at points where levels of ordinate axes of a plurality of waveforms measured at the point B pass through a point Z, i.e., aligning timing at a point represented as “trigger” on the abscissa axis. InFIG. 5, GNDArepresents a ground level for the point A, whereas GNDBrepresents a ground level for the point B. If the oscillation period of the oscillator is constant, waveforms overlap well and consequently oscillation waveforms having no disorder are displayed on the screen of the oscilloscope. On the other hand, if there is fluctuation in the oscillation period of the oscillator, then the waveforms do not overlap and varied waveforms are displayed. The degree of variation in display on the oscilloscope screen becomes the indication of seeing the degree of fluctuation of the oscillation frequency.

As appreciated fromFIG. 5, the oscillation waveforms overlap well and there is little fluctuation in the frequency. Comparing oscillation amplitudes at the points A and B with each other, the oscillation waveform at the point B has an amplitude of approximately 2.2 V whereas the oscillation waveform at the point A has an amplitude of approximately 0.6 V which is smaller than that at the point B. A small potential change at the point A means that charge movement at the point A is small. The reason why fluctuation is not found in the oscillation frequency of the oscillator is considered to be that the charge amount which flows through the current noise source40is small and consequently the effect of noise appearing in the oscillation waveform is small.

The reason why the potential change at the point A located immediately after the output terminal of the current noise source40will now be described. Relations between an input voltage Vin and an output voltage Vout of an inverter are shown inFIG. 6. As represented by dashed lines inFIG. 6, a change of the input voltage required for the output of the inverter to be inverted is small. Paths for charging gates of the inverters501,502and503which constitute the ring oscillator shown inFIG. 4are shown inFIG. 7. As represented by a dashed line60, an input of the inverter501is charged via a pMOSFET of the inverter503and the current noise source40. On the other hand, as represented by dashed lines62, other inverters502and503are charged via only a pMOSFET of the inverter in the previous stage. In general, the conductivity of the current noise source40is lower than that of the MOSFET which forms the inverter501,502or503. In other words, the gate capacitance of the inverter501located immediately after the current noise source40is slower in charging speed than the gate capacitance of each of other inverters502and503. A similar discussion holds true for the discharging speed of the inverters501,502and503as well. InFIG. 7, therefore, the potential change speed at the point A is slower than that at each of the point B, a point C and a point D. By the way, the point C is a node between an output terminal of the second stage inverter502and an input terminal of the third stage inverter503, and the point D is a node between an output terminal of the third stage inverter503and an input terminal of the current noise source40.

Operation of the ring oscillator shown inFIG. 4will now be described by taking the potential change at the point A as a start point. When the potential at the point A exceeds a threshold of the inverter501, the output of the inverter501is inverted. And the inverted signal is conveyed successively as represented by κ→C→D. Concurrently with arrival of the inverted signal at the point D, the potential change direction at the point A is reversed. Since the potential change speed at the point A is slow, the potential at the point A does not change much from the threshold of the inverter501when the inverted signal arrives at the point D. Since this operation is repeated, the oscillation amplitude at the point A becomes nearly equal to the input width required for the inverter output to make a transition (becomes nearly equal to the width Vstbetween dashed lines shown inFIG. 6).

As appreciated from the foregoing description, the reason why the fluctuation of the oscillation frequency of the ring oscillator shown inFIG. 4is small is that the potential change speed at the point A is slow and the input voltage change required for the inverter501to invert is small and consequently charges do not flow through the current noise source40so much.

Therefore, the present inventors have considered that the inverter to which the output of the current noise source is input needs only to be an inverter which is not inverted until charges are let flow to some degree. In other words, the present inventors have considered it is desirable to use an inverter which utilize Schmitt trigger technique since it has hysteresis in its input-output relations. Hereafter, such an inverter is referred to as Schmitt inverter.

Embodiment

A random number generation device according to an embodiment of the present invention will now be described. The random number generation device according to the present embodiment is shown inFIG. 1. The random number generation device according to the present embodiment includes a current noise source2, a Schmitt inverter4, inverters121and122, and a conversion circuit20. The current noise source2may be either of a MOSFET type current noise source and a resistance type current noise source. The Schmitt inverter4receives an output of the current noise source2. The inverter121receives an output of the Schmitt inverter4, and the inverter122receives an output of the inverter121. And an output of the inverter122is input to the current noise source2. In other words, the current noise source2, the Schmitt inverter4, and the inverters121and122constitute a ring oscillator. In this ring oscillator, the Schmitt inverter4lets charges flow through the current noise source2efficiently, and consequently the influence of noise is effectively exerted to the oscillation signal of the ring oscillator. Accordingly, the frequency of the ring oscillator fluctuates largely. The conversion circuit20generates a random number by utilizing fluctuation in the oscillation frequency of the ring oscillator.

The action and effect of the random number generation device according to the present embodiment having the above-described configuration will now be described.

A ring oscillator used in the random number generation device according to the present embodiment is shown inFIG. 9. An oscillation waveform at a point A and an oscillation waveform at a point B in the ring oscillator acquired by using an oscilloscope are shown inFIG. 10. The point A is a node between an output terminal of the current noise source2and an input terminal of the Schmitt inverter4. The point B is a node between an output terminal of the Schmitt inverter4and an input terminal of the inverter121. InFIG. 10, a plurality of waveforms are superposed and drawn by aligning timing at a point represented as “trigger” in the same way as the case shown inFIG. 5. Furthermore, the time scale is aligned with that inFIG. 5. It is appreciated fromFIG. 10that the waveform is disturbed on the left and right of the trigger. This is because the oscillation waveforms superposed and drawn do not overlap each other. In other words, it is indicated that oscillation period is fluctuating. The potential amplitude at the point A is approximately 1.3 V and it is appreciated that the potential amplitude value has become large as compared with the case shown inFIG. 5. The fact that the potential amplitude has become large means that charges flowing through the current noise source2have increased by that amount. It is considered that the fluctuation of the oscillation frequency has increased because a larger amount of charge can be let flow through the current noise source2.

Operation of the ring oscillator will now be described by taking the point A shown inFIG. 9as a start point. If the potential at the point A exceeds a potential VHshown inFIG. 8, the Schmitt inverter4is inverted and its signal is conveyed as represented by κ→C→D. The point C is a node between an output terminal of the inverter121and an input terminal of the inverter122. The point D is a node between an output terminal of the inverter122and an input terminal of the current noise source2. If the inversion signal is conveyed to the point D, the potential at the point A begins to decrease. Although the potential change speed at the point A is slow, the Schmitt inverter4is not inverted until the potential at the point A becomes lower than VLshown inFIG. 8. Since current flows through the current noise source2during that time period, the oscillation waveform is subjected to influence of noise. If the potential at the point A becomes lower than VL, the Schmitt inverter4is inverted and its signal is conveyed as represented by B→C→D. If the inversion signal is conveyed to the point D, the potential at the point A begins to increase. Although the potential change speed at the point A is slow, the Schmitt inverter4is not inverted until the potential at the point A reaches VH. A current flows through the current noise source2during that time period. The ring oscillator shown inFIG. 9oscillates by repeating this operation.

If the output of the current noise source is input to an ordinary inverter as already described with reference toFIG. 4, then the potential at the point A changes by only approximately the transition width of the inverter.

On the other hand, if the output of the current noise source2is input to the Schmitt inverter4, then it becomes possible for the potential at the point A to change by approximately a threshold voltage difference (=VH−VL) of the Schmitt inverter. Since the potential change at the point A increases, it becomes possible to let more charges flow and the fluctuation of the oscillation frequency of the ring oscillator can be made large. Since the operation heretofore described is implemented, the oscillation frequency of the ring oscillator shown inFIG. 9has large fluctuation shown inFIG. 10.

A specific example of the Schmitt inverter4will now be described with reference toFIG. 11. The Schmitt inverter4in this specific example includes p-channel MOSFETs4aand4bconnected in series, n-channel MOSFETs4cand4dconnected in series, a p-channel MOSFET4e, and an n-channel MOSFET4f. Gates of the p-channel MOSFETs4aand4band the n-channel MOSFETs4cand4dare connected in common and supplied with an input voltage Vin. A power supply voltage VDD is applied to the p-channel MOSFET4aat its source. The p-channel MOSFET4ais connected at its drain to the p-channel MOSFET4bat its source via a connection node N1. Drains of the p-channel MOSFET4band the n-channel MOSFET4care connected in common at a connection node N2. The n-channel MOSFET4cis connected at its source to the n-channel MOSFET4dat its drain via a connection node N3.

The n-channel MOSFET4dis connected at its source to the ground. The p-channel MOSFET4eis connected at its source to the connection node N1, connected at its drain to the ground, and connected at its gate to the connection node N2. The n-channel MOSFET4fis connected at its source to the connection node N3, and the power supply voltage VDD is applied to the n-channel MOSFET4fat its drain, and connected at its gate to the connection node N2. An output Vout is output from the connection node N2.

Operation of the Schmitt inverter4in the present specific example having the above-described configuration will now be described with reference toFIG. 8andFIG. 11. When potential at an input Vin is “0”, the p-channel MOSFETs4aand4bare the ON state and the n-channel MOSFETs4cand4dare the OFF state. As a result, the potential at the node N2becomes VDD. In other words, the output Vout becomes VDD. Since the p-channel MOSFET4eis in the OFF state at this time, the potential at the node N1is VDD. Since the n-channel MOSFET4fdriven to the saturation region is present between the node N3and VDD, the potential at the node N3becomes “VDD−Vth4f.” Here, Vth4fis a threshold voltage of the n-channel MOSFET4f.

If in this state the potential at the input Vin increases gradually from “0” and approaches a potential (usually, VDD/2) at which the output of an ordinary inverter formed of one p-channel MOSFET and one n-channel MOSFET connected in series is inverted, then the n-channel MOSFET4dbegins to turn on gradually. Since the n-channel MOSFET4fis in the ON state, however, the potential at the node N3does not become “0” although it decreases from “VDD−Vth4f.” Therefore, the potential difference between the gate and source of the n-channel MOSFET4cis smaller than the threshold voltage of the n-channel MOSFET4c. As a result, the n-channel MOSFET4cis in the OFF state, and Vout remains VDD (seeFIG. 8).

Further, the potential at the input Vin increases. Immediately before the potential at the input Vin reaches a predetermined potential, i.e., a first threshold VH(seeFIG. 8), the n-channel MOSFET4cbegins to turn on and the output Vout begins to decrease.

If the potential at the input Vin further increases and exceeds the first threshold VH, then the p-channel MOSFET4bbecomes the OFF state and the n-channel MOSFET4cbecomes the ON state, and the output Vout becomes “0” (seeFIG. 8). Even if Vin is further raised, the output Vout remains “0.”

When the potential at the input Vin is “VDD,” the p-channel MOSFETs4aand4bare the OFF state and the n-channel MOSFETs4cand4dare the ON state. Therefore, the potential at the node N2becomes “0.” In other words, the output Vout becomes “0.” Since the n-channel MOSFET4fis in the OFF state at this time, the potential at the node N3is “0.” Since the p-channel MOSFET4edriven to the saturation region is present between the node N1and VDD, the potential at the node N1becomes “Vth4e.” Here, Vth4eis an absolute value of the threshold voltage of the p-channel MOSFET4e.

If in this state the potential at the input Vin decreases gradually from VDD and approaches a potential (usually, VDD/2) at which the output of an ordinary inverter formed of one p-channel MOSFET and one n-channel MOSFET connected in series is inverted, then the p-channel MOSFET4abegins to turn on gradually. Since the p-channel MOSFET4eis in the ON state, however, the potential at the node N1does not become “VDD” although it increases from “Vth4e.” Therefore, the potential difference between the gate and source of the p-channel MOSFET4bis smaller than the threshold voltage. As a result, the p-channel MOSFET4bis in the OFF state, and Vout remains “0” (seeFIG. 8).

Further, the potential at the input Vin decreases. Immediately before the potential at the input Vin reaches a predetermined potential, i.e., a second threshold VL(seeFIG. 8), the p-channel MOSFET4bbegins to turn on and the output Vout begins to increase.

If the potential at the input Vin further decreases and becomes lower than the first threshold VL, then the n-channel MOSFET4cbecomes the OFF state and the p-channel MOSFET4bbecomes the ON state, and the output Vout becomes “VDD” (seeFIG. 8). Even if Vin is further raised, the output Vout remains “VDD.”

Conditions concerning the first and second threshold voltages of the Schmitt inverter4will now be described.

Desirable relations of the first and second thresholds VHand VLof the Schmitt inverter4will now be described. It is now supposed that the input potential of the Schmitt inverter4is V, the conductivity of the current noise source is σ, the input gate capacitance of the Schmitt inverter4is C and the power supply voltage is VDD. For brevity, the conductivity of MOSFETs which constitute the inverter122is so large as compared with that of the current noise source2that it is neglected. It is supposed that the input potential of the Schmitt inverter4begins to increase at time t=0. At this time, relations between a current i which flows into the gate and V satisfy the following equation (1).
i=σ(VDD−V)  (1)

Denoting charge stored in the input gate of the Schmitt inverter4by Q, it follows that Q=C×V and consequently the following equation is obtained.

From the equations (1) and (2), the following equation is obtained.

It is supposed that the conductivity of the current noise source2does not depend upon voltages applied to terminals. Solving the differential equation (3) under the initial condition V=VLat t=0, the voltage V is represented by the following equation (4).

Supposing that V=VHat t=t1, the following equation is obtained.

This is a delay time required for the output of the Schmitt inverter4to be inverted since the inverter (inFIG. 1, which is the inverter122) disposed in a stage preceding the Schmitt inverter4is inverted. In the case where the conductivity σ fluctuates by Δσ, fluctuation Δt1of the delay time is represented as follows:

Denoting the accumulation of gate delays of parts obtained by excluding the Schmitt inverter4from the ring oscillator by T, the average oscillation period is T+t1. When generating a high quality random number, it is desirable that the fluctuation Δt1of the oscillation period is at least 1% of the oscillation period T+t1. In other words, it is desirable that the following equation (8) is satisfied.

This is a desirable relation concerning the first and second thresholds VHand VLof the Schmitt inverter4. In the case where the conductivity depends upon voltages applied to terminals, the equation (8) is applied by using the average conductivity.

In the case where an nMOSFET type current noise source is used as the current noise source2in the present embodiment, it is necessary that a voltage VG applied to the gate of the n-channel MOSFET type current noise source satisfies the following relation.
VG>VH+Vth

Here, VHis a larger threshold (first threshold) of the Schmitt inverter4, and Vth is a threshold voltage of the n-channel MOSFET type current noise source. If the relation is not satisfied and the potential at the point A shown inFIG. 9gradually increases, then the relation VGS=Vth is satisfied at a certain time point. If so, then the n-channel MOSFET type current noise source turns off and consequently it becomes impossible for charges to flow to the point A and oscillation stops.

In the case where a p-channel MOSFET type current noise source is used as the current noise source in the present embodiment, a voltage VG applied to the gate of the p-channel MOSFET type current noise source needs to satisfy the following relation.
VG<VL−VTH

Here, VLis a smaller threshold (second threshold) of the Schmitt inverter4, and VTH is an absolute value of the threshold voltage of the p-channel MOSFET type current noise source. If the relation is not satisfied and the potential at the point A shown inFIG. 9gradually decreases, then the relation VGS=VTH is satisfied at a certain time point. If so, then the p-channel MOSFET type current noise source turns off and consequently it becomes impossible for charges to flow to the point A and oscillation stops.

In the present embodiment, one set including a current noise source and a Schmitt inverter is included in the ring oscillator. However, the ring oscillator may include a plurality of sets. For example, the ring oscillator may include a plurality of sets (inFIG. 12, two sets) each including a current noise source and a Schmitt inverter, and at least one ordinary inverter as shown inFIG. 12. In other words, the ring oscillator shown inFIG. 12may have a configuration obtained by serially connecting a set including a MOSFET type current noise source21and a Schmitt inverter41connected in series, a set including a MOSFET type current noise source22and a Schmitt inverter42connected in series, and an ordinary inverter12. In this case, it is necessary that the total number of Schmitt inverters and ordinary inverters is odd. Otherwise, oscillation is not caused.

As shown inFIG. 13, the ring oscillator may have a configuration of a series circuit obtained by serially connecting an odd number of at least three sets (inFIG. 13, three sets) each including a current noise source and a Schmitt inverter. In other words, the ring oscillator shown inFIG. 13may have a configuration obtained by serially connecting a set including a MOSFET type current noise source21and a Schmitt inverter41connected in series, a set including a MOSFET type current noise source22and a Schmitt inverter42connected in series, and a set including a MOSFET type current noise source23and a Schmitt inverter43connected in series. In this case, an ordinary inverter is not needed.

As shown inFIG. 14, the ring oscillator may include a plurality of sets each including a current noise source and a Schmitt inverter, and current noise sources of different kinds may be used as current noise sources of the sets. In other words, a ring oscillator shown inFIG. 14includes a serial connection of a set including a current noise source21and a Schmitt inverter41, a set including a current noise source22and a Schmitt inverter42, and an ordinary inverter12. For example, a MOSFET type current source may be used as the current noise source21and, for example, a resistance type current source may be used as the current noise source22.

As shown inFIG. 15, the ring oscillator may be formed by serially connecting a series circuit obtained by serially connecting (n−1) sets (where n is an integer of at least 3) each including a current noise source, a Schmitt inverter and an ordinary inverter connected in series, and one set of a series circuit including a current noise source and a Schmitt inverter. In other words, the ring oscillator may have a configuration obtained by serially connecting a current noise source21, a Schmitt inverter41, an inverter121, a current noise source22, a Schmitt inverter42, an inverter122, . . . , a current noise source2n, and a Schmitt inverter4n. As shown inFIG. 27, the ring oscillator may have a configuration obtained by serially connecting n (where n≧1) series circuits each including a current noise source2i(i=1, . . . , n) and a Schmitt inverter4iand providing a plurality of (inFIG. 27, four) inverters121to124between them. The inverters can be provided in arbitrary locations. As for the number of the inverters provided in the ring oscillator, there is no limit as long as the sum of the number of the inverters and the number of Schmitt inverters included in the ring oscillator is an odd number. It is not necessary to take out the output of the ring oscillator from an output of a Schmitt inverter. For example, although the output of the ring oscillator is taken out from an output terminal of the Schmitt inverter41inFIG. 27, the output of the ring oscillator may be taken out from an output terminal of the inverter123as shown inFIG. 28. By the way, the ring oscillator shown inFIG. 28has the same configuration as that of the ring oscillator shown inFIG. 27.

Thus providing the ring oscillator with a plurality of sets each including a current noise source and a Schmitt inverter brings about an effect of making the fluctuation of the oscillation frequency large as compared with a ring oscillator having one set.

In the foregoing description, an inverter using the Schmitt trigger technique has been used as a Schmitt inverter. A buffer using the Schmitt trigger technique which operates in the same way as the Schmitt inverter may be used instead of the Schmitt inverter. As a matter of course, it is necessary to conduct design as to the number of coupled inverters and buffers so as to cause operation as the ring oscillator.

Duty ratio of the ring oscillator will now be described.

It is appreciated from the oscillation waveform shown inFIG. 10that the duty ratio is not 50%. Especially when a MOSFET type current noise source is used, the duty ratio does not become 50% in some cases according to the circuit configuration. The reason will now be described.

It is supposed that the current noise source is an n-channel MOSFET type. The conductivity of the MOSFET is controlled mainly by a difference between a potential applied to its gate and its source potential. Here, the source potential is a lower potential in potentials at electrodes located at both ends of a channel of the n-channel MOSFET.FIG. 16shows a relation between a gate-source voltage VGSand a current direction when the potential at the point A changes from “high” to “low.” When the potential at the point A changes from “high” to “low,” charges stored at the point A are discharged because a current flows through a path indicated by an arrow inFIG. 16. At this time, the source electrode of the current noise source2becomes the left side terminal inFIG. 16, and VGSis constant during the discharging. In other words, the conductivity of the current noise source2changes little.

On the other hand,FIG. 17shows the case where the potential at the point A changes from “low” to “high.”

In this case, a current flows in a direction indicated by an arrow inFIG. 17and the point A is charged. At this time, the source electrode becomes the right side terminal inFIG. 17. As the current flows, the potential at the point A increases and VGSdecreases. In other words, as the potential at the point A increases, the conductivity of the current noise source2becomes small gradually. It is appreciated from the foregoing description that the increase speed of the potential at the point A is slower than the decrease speed of the potential at the point A when the n-channel MOSFET type current noise source2is used.

If the current noise source2is the p-channel MOSFET type, the source potential which determines the conductivity is a higher potential at electrodes located at both ends of the channel. If the current noise sources of n-channel MOSFET type inFIGS. 16 and 17are changed to p-channel MOSFET type, then the potential change speed at the point A is fast in potential increase and slow in potential decrease. If MOSFET type current noise sources are used as heretofore described, the potential increase speed and the potential decrease speed are asymmetrical to each other. In some cases, therefore, the duty ratio of the oscillator does not become 50%.

On the other hand, in the case of the resistance type current noise source, it is easy to set the duty ratio equal to 50% because the conductivity does not depend upon potentials applied to terminals. In some cases, however, the duty ratio does not become 50% depending upon matching of gate length and gate width between the n-channel MOSFET and p-channel MOSFET included in the inverter.

A specific example of the conversion circuit according to the present embodiment will now be described. The connection place between the conversion circuit and the ring oscillator differs according to the specific example.

In some cases, it is desirable to consider the duty ratio in determining where in the ring oscillator the conversion circuit should receive the input from.

A first specific example of the conversion circuit according to the present embodiment is shown inFIG. 18. A conversion circuit20A in the first specific example includes a D-type flip-flop20a, inverters20band20c, and a D-type flip-flop20d.

In general, the D-type flip-flop20ahas a feature that it has a CE terminal for controlling its operation. If a “high” level is input to the CE terminal, the flip-flop conducts its ordinary operation. If a “low” level is input to the CE terminal, the operation of the flip-flop is stopped. The operation of the flip-flop is based upon a signal input to a CK terminal (which is usually a clock signal), and data input to a D terminal is output from a Q terminal serving as an output terminal when a signal input to CK rises from “low” to “high”.

In the present embodiment, an inverter20binverts the output Q of the D-type flip-flop20aand feeds it back to the D terminal. A signal obtained by inverting an input signal IN by means of an inverter20cis input to a CK terminal of the D-type flip-flop20d. The D-type flip-flop20dreceives the output Q of the D-type flip-flop20aat its D terminal. Data output from a Q terminal of the D-type flip-flop20dbecomes a random number.

Operation of the conversion circuit20A in the first specific example will now be described with reference toFIG. 19. Here, it is supposed that at first the input signal IN is in its “low” level state, a connection node M between the output terminal Q of the D-type flip-flop20aand the D terminal of the D-type flip-flop20dis at its “low” level and an output OUT is also its “low” level. This state continues until the input signal IN becomes its “high” level at time t1. At this time, the D terminal of the flip-flop20ais at its “high” level. If an oscillation signal CS becomes its “high” level at time t2(where t2>t1), the node M connected to the output of the flip-flop20abecomes its “high” level. At this time, the D terminal of the flip-flop20ais made to be its “low” level by the inverter20b.

Subsequently, if the oscillation signal CS is changed to its “high” level at time t3(where t3>t2), the node M connected to the output of the flip-flop20abecomes its “low” level. At this time, the D terminal of the flip-flop20ais made to be its “high” level by the inverter20b. This operation is repeated while the input signal IN is at its “high” level. In other words, while the input signal IN is at its “high” level, the potential level at the node M alternates between the “high” level and the “low” level repeatedly according to the oscillation of the oscillation signal CS.

If the potential at the node M is at its “high” level immediately before time t4(where t4>t3) and the input signal IN changes from the “high” level to the “low” level at the time t4, then the signal input to the CK terminal of the flip-flop20dchanges from the “low” level to the “high” level and consequently the potential level at the Q terminal of the flip-flop20d, i.e., the output OUT changes from the “low” level to the “high” level. After the time t4, however, the level of the input signal IN becomes “low” and consequently the potential level at the node M remains “high.”

At time t5(where t5>t4), the input signal IN is changed from the “low” level to the “high” level. In synchronism with a first rising edge of the oscillation signal CS after the input signal IN has changed to the “high” level, the potential level at the node M becomes “low” (at time t5′). While the input signal IN is at its “high” level thereafter, the potential level at the node M alternates between the “high” level and the “low” level repeatedly according to the oscillation signal CS. During this time period, however, the potential level at the output OUT remains the “high” level.

If the potential at the node M is at its “low” level immediately before time t6(where t6>t5) and the input signal IN changes from the “high” level to the “low” level at the time t6, then the signal input to the CK terminal of the flip-flop20dchanges from the “low” level to the “high” level and consequently the potential level at the Q terminal of the flip-flop20d, i.e., the output OUT changes from the “high” level to the “low” level. After the time t6, however, the level of the input signal IN becomes “low” and consequently the potential level at the node M remains “low.”

When the input signal IN is at the “high” level, the “high” level and the “low” level are output to the node M alternately according to the oscillation signal CS as appreciated from the foregoing description of the operation.

If the input signal IN decreases to the “low” level, the value at the node M is output to OUT. If the “high” level time period of the input signal IN varies at random, therefore, the potential level at the node M obtained immediately before the input signal IN changes from the “high” level to the “low” level becomes random. As a result, the output OUT becomes a random number. If the oscillation frequency of the oscillation signal CS varies at random, the potential level at the node M obtained immediately before the input signal IN changes from the “high” level to the “low” level becomes random. As a result, the output OUT becomes a random number.

When generating the random number by using the ring oscillator according to the present embodiment and the conversion number circuit20A shown inFIG. 18, there are two methods according to which of the CE terminal and the CK terminal of the flip-flop20ain the conversion circuit20A receives the output of the ring oscillator. In one method, the output of the ring oscillator is input to the CE terminal of the flip-flop20aand the external oscillation signal is input to the CK terminal. In the other method, the external oscillation signal is input to the CE terminal and the output of the ring oscillator is input to the CK terminal. As regards the two methods, features and matters to be attended to in circuit configuration will now be described.

FIG. 20shows a circuit in which the output of the ring oscillator shown inFIG. 15is input to the CE terminal and the external oscillation signal is input to the CK terminal. This circuit configuration has a feature that the random number generation speed is fast because the random number can be generated at the oscillation frequency of the ring oscillator. This circuit configuration is effective when an external oscillation signal which is sufficiently fast as compared with the oscillation frequency of the ring oscillator can be prepared. If the duty ratio of the ring oscillator is not 50%, it is desirable to input a signal having a “high” level time period longer than a “low” level time period to the CE terminal. This is because fluctuation at a level having a longer output time is larger than fluctuation at a level having a shorter output time.

If a signal having a “high” level time period longer than a “low” level time period cannot be obtained due to the layout or the like, an inverter30is placed immediately before the CE terminal of the flip-flop20aas shown inFIG. 21. By doing so, a signal having a “high” level time period longer than a “low” level time period can be input to the conversion circuit20A.

FIG. 22shows a random number generation device in which the external oscillation signal is input to the CE terminal of the flip-flop20aand the output of the ring oscillator shown inFIG. 15is input to the CK terminal. In this case, it is necessary that the external oscillation signal is smaller in oscillation frequency than the output of the oscillator. This circuit configuration is effective in the case where the oscillation frequency of the oscillator is sufficiently faster than the needed random number generation rate. This circuit configuration is also effective in the case where there is a concern that a fast external oscillation signal becomes a noise source of another circuit. In the circuit configuration shown inFIG. 22, any of the outputs of the ring oscillator may be input unlike the configuration shown inFIG. 21. This is because the conversion circuit20A shown inFIG. 18counts the number of times of oscillation in the signal input to the CK terminal and its duty ratio does not affect the operation. As for the external oscillation signal, it is also effective to produce an oscillation signal in which the duty ratio is not 50% and the high level time period is longer than the low level time period. This is because the randomness can be enhanced by causing the ring oscillator to oscillate for a longer time.

Power dissipation in the case where the ring oscillator shown inFIG. 9is used as the ring oscillator in the random number generation device shown inFIG. 20is compared with power dissipation in the random number generation device described in JP-A 2006-189946 (KOKAI) by conducting simulation. As for the transistor model for simulation, the predictive technology model is used (see URL: http://www.eas.asu.edu/˜ptm/, and Y. Cao, T. Sato, D. Sylvester, M. Orshansky, C. Hu, “New paradigm of predictive MOSFET and interconnect modeling for early circuit design,” pp. 201-204, CICC, 2000).

As a result of power dissipation calculation, the power dissipation is 0.87 mW for the random number generation device described in JP-A 2006-189946 (KOKAI) and 0.74 mW for the random number generation device according to the present embodiment. Thus, improvement in power dissipation is indicated.

A second specific example of a conversion circuit according to the present embodiment is shown inFIG. 23. A conversion circuit20B in the second specific example includes a D-type flip-flop20e. An oscillation signal input to a D terminal of the flip-flop20eis output from a Q terminal as output OUT in response to a rising edge of a clock signal CLK input to a CK terminal. It is necessary that the signal IN input to a D terminal is larger in frequency than the signal CLK input to the CK terminal. There are two ways in the method for generating a random number by using the conversion circuit20B shown inFIG. 23and the ring oscillator according to the present embodiment. In one method, the external oscillation signal is input to the D terminal and the output of the ring oscillator is input to the CK terminal. In the other method, the output of the ring oscillator is input to the D terminal and the external oscillation signal is input to the CK terminal.

FIG. 24shows a random number generation device in which the external oscillation signal is input to the D terminal of the conversion circuit20B shown inFIG. 23and the output of the ring oscillator shown inFIG. 15is input to the CK terminal. In this circuit configuration, it is desirable that the duty ratio of the external oscillation signal is 50%. Furthermore, the input to the CK terminal may be taken out from any place in the ring oscillator.

This circuit configuration has a feature that the random number generation speed is fast because the random number can be generated at the oscillation frequency of the oscillator.

FIG. 25shows a random number generation device in which the output of the ring oscillator shown inFIG. 15is input to the D terminal of the conversion circuit20B shown inFIG. 23Band the external oscillation signal is input to the CK terminal. In this circuit configuration, it is desirable that the oscillator has a duty ratio of 50%. If the duty ratio is not 50%, then a frequency divider35should be provided between the output of the ring oscillator and the conversion circuit20B as shown inFIG. 26. This frequency divider35includes a D-type flip-flop35awhich receives the output of the ring oscillator at its CK terminal, and an inverter35bwhich feeds back an inverted signal for an output of a Q terminal of the flip-flop35ato its D terminal. Therefore, the frequency divider35becomes a ½ frequency divider.

Although the ½ frequency divider is used inFIG. 26, the frequency division ratio may have any value such as ¼, ⅛ or 1/16. In this circuit configuration, it is necessary that the external oscillation signal is slower than the oscillation frequency of the ring oscillator. This circuit configuration is effective when the oscillation frequency of the oscillator is sufficiently faster than the needed random number generation speed or when a fast external oscillation signal cannot be used.

As for the random number generation device according to the present embodiment, all of the current noise source, the ring oscillator and the conversion circuit can be generated by using the standard semiconductor integrated circuit manufacturing process. Therefore, it is easy to integrate them on a semiconductor substrate.

A difference of the random number generation device according to the present embodiment from other known random number generation devices will now be described.

A random number generation device with a circuit for changing the oscillation period added to the oscillator is disclosed in JP-A 2001-166920 (KOKAI). In the random number generation device described in JP-A 2001-166920 (KOKAI), a circuit for changing the oscillation frequency is added to a ring oscillator formed of inverters.

As already described in description as to the course of events for achieving the present invention, the width of the input required to invert the output of the inverter is narrow. In the random number generation device described in JP-A 2001-166920 (KOKAI) as well, therefore, discussion similar to that as to how the present invention is made holds true and the change of the oscillation frequency is small. Therefore, it is difficult to output a random number of good quality.

On the other hand, owing to the configuration of the present embodiment in which Schmitt inverters each receiving an output of a current noise source are incorporated into the ring oscillator, it becomes possible to make the fluctuation of the oscillation frequency and a random number of good quality can be generated.

A random number generation device using a ring oscillator and a Schmitt trigger is disclosed in JP-A 2003-108365 (KOKAI). In the random number generation device described in JP-A 2003-108365 (KOKAI), an output of an oscillator is input to a CR integrator serving as a noise source and jitter is applied to the oscillation signal by the effect of thermal noise of the CR integrator. And a random number is generated by utilizing the jitter. In the configuration, the Schmitt trigger and the CR integrator are disposed outside the oscillator. The Schmitt trigger has an effect serving as a buffer which prevents the circuit from conducting false operation due to voltage noise. This effect is generally known as the use object of the Schmitt trigger. Since the noise source is disposed outside the oscillator, the effect of noise is thrown away in each period and the effect of the noise is not preserved in the oscillation signal. In other words, entropy generated by noise is not accumulated.

On the other hand, in the present embodiment, Schmitt inverters each receiving an output of a current noise source are incorporated into the ring oscillator. This configuration has an effect of increasing charges which flow to the current noise source and effectively exerting influence upon the oscillation waveform. In addition, entropy generated by the current noise source can be accumulated each time oscillation is caused. The random number generation device according to the present embodiment differs from the random number generation device disclosed in JP-A 2003-108365 (KOKAI) in configuration, object and effect. In the most general use of the Schmitt trigger, the Schmitt trigger is used to prevent a circuit from conducting false operation due to voltage noise.

On the other hand, in the present embodiment, logic gates which are generally used to remove noise are used for the new object of effectively exerting influence of noise upon the oscillation signal.

According to an embodiment of the present invention, it is possible to provide a random number generation device which generates a physical random number with as little power dissipation as possible as heretofore described.