Wafer edge exposure apparatus, and wafer edge exposure method

A wafer edge exposure apparatus is provided with an optical section for radiating exposure light onto the edge of a semiconductor wafer. The optical section is provided with a focus sensor for sensing a distance from the lower end of the optical section to the edge of the semiconductor wafer. There is provided a position control mechanism for moving the optical section vertically on the basis of a value detected by the focus sensor such that the distance matches a focal distance of the optical section.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a wafer edge exposure apparatus and a water edge exposure method. More particularly, the present invention relates to a wafer edge exposure apparatus and wafer edge optical exposing method for accurately exposing the edge of resist coated over a semiconductor wafer.

2. Description of the Background Art

FIG. 3shows a flowchart representing a popular processing flow to be effected for a certain layer (called here an “ithlayer”) in connection with a related-art semiconductor device manufacturing method. During the processing shown inFIG. 3, resist is applied over a semiconductor wafer by means of a spin coater (step100).

The resist applied to the edge of the semiconductor water produces foreign substances when interfering with a mechanism of retaining a semiconductor wafer in subsequent processes. In order to prevent production of such foreign substances, the resist applied to the edge of the wafer is removed as much as 1 mm width in the spin coater by means of a thinner (step102).

Next, the semiconductor wafer is subjected to pattern exposure performed by a stepper (step104). Through exposure processing, a desired pattern is transferred onto the resist on the semiconductor wafer upon exposed to radiation.

The semiconductor wafer is further subjected to edge exposure processing performed by an edge exposure apparatus (step106). The edge exposure apparatus is for exposing the edge of a wafer over a desired width (e.g., 2 mm or 3 mm).

When having finished undergoing the pattern exposure processing and edge exposure processing, the semiconductor wafer is subjected to process of developing a resist (step108). As a result of the processing being performed, the resist located along the edge of the wafer is removed over a desired width (2 mm or 3 mm), and the resist on the semiconductor wafer is patterned into a desired pattern.

There is then performed processing for etching the semiconductor wafer while the thus-patterned resist is taken as a mask or implanting impurities into the semiconductor wafer (step110).

FIG. 4Ais a plan view showing a semiconductor wafer to be processed through a round of processing operations set forth.FIG. 4Bis a cross-sectional view of the semiconductor wafer. More specifically,FIG. 4Ais a plan view showing a semiconductor wafer10having finished undergoing processing pertaining to step102; that is, when resist12has been removed from the edge of the wafer by means of a thinner.FIG. 4Bis a cross-sectional view of the semiconductor wafer10taken along line A—A shown in FIG.4A. As shown inFIG. 4B, when the resist12is removed from the edge of the wafer by means of the thinner, the end surface of the resist12is tapered. Here, the following description is based on the assumption that the resist12is applied over a first layer film14, as shown in FIG.41.

FIG. 5shows the first layer film14when the film has been etched while the resist12shown inFIG. 4Bis taken as a mask. When the end face of the resist12is tapered as shown inFIG. 4B, the outer most edge of the resist12does not sufficiently act as a mask during the course of etching operation. Hence, when such a resist12is used as a mask, the vicinity of the end face of the first layer film14is etched insufficiently, as shown in FIG.5. As a result, foreign obstacles become apt to arise.

FIG. 6Ais a plan view of the semiconductor wafer10after having finished undergoing processing pertaining to step108; that is, after the resist12has been removed from the edge of the wafer through edge exposure processing and development processing.FIG. 6Bis a cross-sectional view of the semiconductor wafer10when taken along line A—A shown in FIG.6A.

As shown inFIG. 6B, the edge of the resist12can be removed such that the end face of the resist12becomes substantially perpendicular, through edge exposure processing and development processing. When such a resist12is used as a mask, the first layer film14can be etched to an appropriate state; namely, a state in which foreign substances are less likely to be generated. Hence, the related-art manufacturing method enables appropriate processing of the ith layer of a semiconductor device.

However, during the course of manufacture of a semiconductor device, a plurality of layers must be formed on the semiconductor wafer10. For example,FIG. 8shows a state in which a first layer film16, a second layer film18, a third layer film20, a fourth layer film22, and a fifth layer film24are formed on the semiconductor wafer10and the resist12is coated on the first through fifth layer films. In this case, there arises a necessity for exposing the edge of the resist12at a position situated above the fifth layer film24, thereby removing the edge.

The related-art edge exposure apparatus to be used for exposing the edge of the resist12is configured such that a focal point of the exposure apparatus is substantially accords with the surface position of the semiconductor wafer10. Therefore, when the resist12is formed on the fifth layer film24, the focal point of exposure light originating from the edge exposure apparatus comes out of accordance with the location of the resist12.

FIG. 9shows a state of the semiconductor wafer when the wafer has finished undergoing development processing while the focal point of the exposure light remains out of accordance with the surface position of the resist12. In this case, the edge of the resist12is not activated properly, and hence the end face of the resist12is slightly tapered. If the end face of the resist12is tapered, the fifth layer24becomes apt to generate foreign substance after etching processing, as in the case shown in FIG.5. In this respect, the related art manufacturing method has failed to completely solve a problem of foreign substances arising from an edge of a film to be etched.

SUMMARY OF THE INVENTION

The present invention has been conceived to solve the problem and is primarily aimed at providing a wafer edge exposure apparatus capable of appropriately causing an edge of a resist film to become exposed appropriately at all times even when the resist film is formed on any layer.

The present invention is also aimed at providing a wafer edge exposure method for causing an edge of a resist film to become exposed appropriately at all times even when the resist film is formed on any layer.

The above objects of the present invention are achieved by a wafer edge exposure apparatus for exposing an edge of a semiconductor wafer. The apparatus includes an optical section for radiating exposure light toward an edge of a semiconductor wafer. The apparatus also includes a sensor for detecting the height of the edge. The apparatus further includes a focus position control mechanism for controlling the focal position of exposure light originating from the optical section, on the basis of a value detected by the sensor.

The above objects of the present invention are also achieved by a wafer edge exposure method for exposing an edge of a semiconductor wafer. The method includes a detection step for detecting the height of an edge of a semiconductor wafer. The method also includes a control step for controlling the focusing position of exposure light radiated toward the edge, on the basis of a height of the edge. The method further includes an exposure step of radiating exposure light towards the edge after the control step.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Embodiments of the present invention will be described hereinbelow by reference to the accompanying drawings. Throughout the drawings, like elements are assigned like reference numerals, and repeated explanations thereof are omitted.

First Embodiment

FIG. 1is an illustration showing the principal section of a wafer edge exposure apparatus according to a first embodiment of the present invention. As shown inFIG. 1, the wafer edge exposure apparatus according to the embodiment has a chuck drive motor30. A chuck32is provided on top of the chuck drive motor30. The chuck32is an element for retaining a semiconductor wafer34to be placed thereon. The chuck drive motor30can rotate the semiconductor wafer34held on the chuck32within a plane perpendicular to the plane of the paper of the drawing.

An optical section36is provided in an elevated position relative to the chuck32. An exposure light radiation section (not shown) for radiating exposure light of predetermined width to the edge of the semiconductor wafer34is provided at a lower end of the optical section36. In the wafer edge exposure apparatus according to the present embodiment, exposure light50can be radiated onto the edge of the semiconductor wafer34; more specifically, an annular portion of predetermined width located at the outermost edge of the semiconductor wafer34, by means of rotating the chuck drive motor30under circumstances where the optical section36produces exposure light50.

A focus sensor37is provided at the lower end of the optical section36. The focus sensor37can detect a distance from the lower end of the optical section36to the surface of the semiconductor wafer34; namely, a surface to be exposed. For instance, in a case where resist is applied over the surface of the semiconductor water34, the focus sensor37can detect a distance from the lower end of the optical section36to the surface of the resist. The distance detected by the focus sensor37is supplied to an unillustrated control unit.

The optical section36is retained by a position control mechanism38. The position control mechanism38is provided with a position control motor40for changing the vertical position of the optical section36. The position control motor40is controlled by the control unit (not shown).

The wafer edge exposure apparatus according to the present embodiment is for performing processing pertaining to step106shown inFIG. 3(i.e., edge exposure processing). More specifically, the wafer edge exposure apparatus according to the present embodiment is used for exposing the edge of the semiconductor wafer that has undergone processing pertaining to steps100to104shown in FIG.3. The semiconductor wafer that has been processed by the wafer edge exposure apparatus according to the present embodiment is subjected to processing pertaining to steps108and110shown in FIG.3. Processing pertaining to steps100through104and processing pertaining to steps108and110are identical with processing performed in the related art, and hence repeated explanations thereof are omitted.

FIG. 2describes around of processing operations performed for implementing edge exposure processing by the wafer edge exposure apparatus according to the embodiment. The processing operations shown inFIG. 2are sequentially performed by means of the control unit operating in accordance with a previously-stored program.

As shown inFIG. 2, in the wafer edge exposure apparatus according to the embodiment, a distance from the lower end of the optical section36to the surface of the semiconductor wafer34(surface to be exposed) is detected on the basis of a result of detection performed by the focus sensor37(step120).

The position of optical section36is adjusted on the basis of the thus-detected distance (step122). More specifically, the position control motor40is driven such that the thus-detected distance matches the focal distance of the optical section36stored beforehand. As a result, a relative position between the surface to be exposed and the optical section36is controlled at all times to maintain a predetermined optical relationship, regardless of variations in the height of a surface to be exposed.

Next, the optical section36produces exposure light50, and the chuck drive motor30is rotated, whereby there is performed processing for exposing the edge of the semiconductor wafer34(step124). As a result of exposure processing being performed, the resist on the semiconductor wafer34is exposed under optimum focusing conditions. Accordingly, when development processing (step108shown inFIG. 3) is performed, the resist on the semiconductor wafer34is patterned such that the end face of the resist becomes substantially perpendicular.

As mentioned above, the wafer edge exposure apparatus according to the present embodiment enables appropriate patterning of the resist on the semiconductor wafer34at all times regardless of variations in the height of a surface to be exposed. Accordingly, use of the wafer edge exposure apparatus according to the present embodiment enables effective prevention of generation of foreign obstacles during the course of manufacture of a semiconductor device.

In the present embodiment, the position of the optical section36is controlled on the basis of the distance between the optical section36as detected by the focus sensor37and a surface to be exposed. However, basic data pertaining to control of position of the optical section36are not limited to the distance to be detected by the focus sensor37. The position of the optical section36may be controlled on the basis of the height of a surface to be exposed as detected by a sensor provided outside the optical section36.

In the present embodiment, the optimum focusing conditions are realized by control or position of the optical, section36. However, a method for realizing optimum focusing conditions is not limited to that mentioned above. For example, the optical section36may be made stationary, and optimum focusing conditions may be realized by vertical movement at the semiconductor wafer34. A zooming mechanism may be provided to the optical section36, whereby optimum focusing conditions are realized by changing the focal distance of the optical section36through use of the zooming mechanism.

As has been described, according to the present invention, the edge of a semiconductor wafer can be exposed under optimum focusing conditions at all times regardless of variations in the height of resist applied over the surface of the semiconductor wafer; that is, variations in the height of a surface to be exposed. The present invention enables stabilization of quality of a semiconductor device, thereby increasing a manufacturing yield thereof.

The entire disclosure of Japanese Patent Application No. 2001-006107 filed on Jan. 15, 2001 including specification, claims, drawings and summary are incorporated herein by reference in its entirety.