Barrier formation and structure to use in semiconductor devices

Embodiments of barriers to use in semiconductor devices are presented herein.

BACKGROUND

Semiconductor devices, which may comprise microprocessors, flip chips, integrated circuits, central processing units, or the like, can be used to interconnect one or more devices or perform one or more operations. The technology of semiconductor devices is constantly improving. Decreasing the size of semiconductor devices may be one such way to improve their functionality. This may allow for more devices to fit in a given area and may increase a speed of the device. Tungsten has traditionally been used in contact regions of semiconductor devices, although Tungsten has a relatively high resistivity.

DETAILED DESCRIPTION

In the discussion that follows, specific implementation examples and methods are provided under the headings “Implementation Examples” and “Exemplary Methods”. It is to be appreciated and understood that such implementation examples and exemplary methods are not to be used to limit application of the claimed subject matter to only these examples. Rather, changes and modifications can be made without departing from the spirit and scope of the claimed subject matter.

Implementation Examples

FIG. 1depicts a semiconductor device100comprising a substrate102and a barrier layer104. Semiconductor device100may comprise, without limitation, any number of devices, including a microprocessor, flip chip, transistor, central processing unit (CPU), or all or a portion of any electronic circuit, for example. Substrate102may comprise any suitable type of material in which a feature may be formed, as described below. Substrate102may also comprise a semiconductor layer106, which may comprise any number of semiconductor materials. For example, silicon may comprise, either in whole or in part, semiconductor layer106. Substrate102may further comprise an insulating layer108, which may be comprised of any suitable insulating material(s). Examples of such suitable insulating materials may include many oxide or nitride materials. Silicon oxide may, in one example, comprise insulating layer108.

Semiconductor device100may further include an area110with which an electrical connection is desired. Area110may comprise all or a portion of a transistor device in some implementations. In one example, area110may comprise one or more terminals of a transistor, such as a source, drain, and/or gate terminal(s). Area110may be located within semiconductor layer106, either in whole or in part.

As depicted inFIG. 1, substrate102may further define a feature which is depicted as a trench112which may provide a contact to area110, although a variety of other features are also contemplated. Area110may situate underneath all or only a portion of trench112. Although trench112may be formed in any portion of semiconductor device100, here it is shown to be formed in insulating layer108. Trench112may define a side114and a bottom116. As depicted in later figures, side114and bottom116may have varying geometries and/or topographies. Trench112may be formed in any suitable way. For example, masked etching may be used.

As discussed above, semiconductor device may include barrier layer104. Barrier layer104may function in some embodiments to line, coat, or cover all or a portion of trench112. If any material is located within trench112, as discussed below, then barrier layer104may also function to contain this material within the trench. In some embodiments, barrier layer104may serve to separate the material located in trench112from substrate102. In some instances, it may more specifically serve to separate the material from semiconductor layer106, insulating layer108, and/or area110. While not illustrated, it will be appreciated that semiconductor device100may comprise other layers or regions. For example, trench112may include one or more salicide and/or oxide layer(s).

In some implementations, barrier layer104may comprise a plurality of layers.FIG. 1depicts a barrier laser that comprises at least two discrete layers. As shown, barrier layer104includes a layer118that substantially conforms to the substrate and/or trench and a layer120that does not so conform. Conforming layer118may substantially cover side114and bottom of trench112. Furthermore, conforming layer118may, in some instances, consist of a substantially uniform thickness throughout the layer. Non-conforming layer120, meanwhile, might not cover the entire trench112as defined by substrate102. Instead, non-conforming layer120might only cover a portion of the trench112. In the illustrated and non-limiting example, non-conforming layer120substantially covers bottom116of trench112but not side114. Additionally, non-conforming layer120may substantially or even entirely cover the bottom of the trench, or it may only cover a portion of the bottom116. Furthermore, it should be noted that non-conforming layer120may reside directly adjacent to bottom116, or it may reside near bottom116with other layers separating it from bottom116. As shown, conforming layer118may be placed in between non-conforming layer120and bottom116, although in another implementation the orders may be reversed, e.g., non-conforming layer120may reside nearer bottom116of trench112than conforming layer118, further discussion of which may be found in relation toFIG. 3.

If multiple layers are used, as depicted inFIG. 1and discussed above, the resulting barrier layer104may comprise a portion on side114that is thinner than a portion located on bottom116. In other words, the portion of barrier layer104near bottom116of trench112may be thicker than the portion of barrier layer104on side114, which may result in a more robust barrier near bottom116of trench112. Furthermore, the resulting barrier layer104may not only be robust near bottom116, but it may also result in a thin sidewall thickness, thus enlarging the volume of trench112. As such, non-conforming layer120may be thicker than conforming layer118. In some instances, it may be substantially thicker.

Conforming layer118may comprise any material that is suitable for creating a barrier between trench112and substrate102. Furthermore, any such material may be formed by any suitable method(s), with chemical vapor deposition (CVD), atomic layer deposition (ALD), plasma vapor deposition (PVD), and sputtering sufficing as but four non-limiting examples. In some implementations, conforming layer118may comprise multiple materials, such as a metal and/or a metal nitride. In one example, conforming layer118may comprise titanium and/or titanium nitride. In another example, conforming layer118may comprise tantalum and/or tantalum nitride.

In some implementations, conforming layer118may be formed in trench112before non-conforming layer120. As discussed above, conforming layer118may be formed by CVD, PVD and/or ALD methods, among others. It should also be noted that conforming layer118itself may be formed in a single layer or in a plurality of layers. For example, a metal such as titanium may first be deposited via PVD. This may function to “getter” a top surface of semiconductor layer106. If semiconductor layer106comprises silicon, then deposition of the metal such as titanium may serve to remove any silicon dioxide, which may in turn provide a low resistance and good contact between barrier layer104and substrate102. In this example, a metal nitride may then be deposited by any method, with CVD serving as but one example. If CVD is used, it may serve to cover geometries and/or topographies that other methods, such as PVD, may otherwise be unable to cover. This resulting layer of metal nitride, which may comprise titanium nitride for example, may serve to complete con-forming layer118. It is noted, however, that it may also be but one of many layers, or it may serve to create conforming layer118completely on its own. Conforming layer118may comprise an amorphous barrier which substantially covers the surfaces (e.g., bottom116and side114) of trench112.

Non-conforming layer120may also comprise any material that is suitable for creating a barrier between trench112and substrate102. Furthermore, any such material may be formed by any suitable method, with CVD, ALD, PVD and/or sputtering sufficing as but four non-limiting examples. In some implementations, non-conforming layer120may comprise multiple materials, such as a metal and/or a metal nitride. In one example, non-conforming layer120may comprise tantalum and/or tantalum nitride.

In some implementations, non-conforming layer120may be formed in trench112after conforming layer118has been formed. It should also be noted that non-conforming layer120itself may be formed in a single layer or in a plurality of layers. For example, non-conforming layer120may be formed by sputtering or by a PVD method in order to deposit tantalum and/or tantalum nitride into trench112. Tantalum and/or tantalum nitride may suffice in some instances to provide for a good wetting surface for a material, such as copper, which may be placed in trench112. Having a good wetting surface may be important when forming such material in trench112, as it may serve to avoid creating voids in such material during deposition. This is described in more detail with reference toFIG. 4.

The resulting non-conforming layer120may result in a robust barrier at bottom116of trench112, while not serving to thicken side114. If side114is not thickened with barrier layer104, then the resulting volume in trench112may be maximized while still providing a robust barrier. It is noted, however, that in some implementations the thicknesses of the conforming and non-conforming layers could be roughly equal, or conforming layer118could be thicker than non-conforming layer120. Note finally that in some implementations, the above-described deposition of non-conforming layer120may be deemed non-isotropic.

Reference is now made toFIG. 2, which depicts a semiconductor device200. Semiconductor device200may comprise a substrate202and a barrier layer204. Substrate202may comprise a semiconductor layer206, an insulating layer208, and an area210with which electrical connection is desired. Substrate202may further define a feature, which is depicted as trench212. Trench212may comprise a side214and a bottom216. It is noted, however that other embodiments of features are also envisioned.

Barrier layer204may or may not serve similar functions as described above in regards to barrier layer104. In this example, however, barrier layer204may comprise a single layer222. Layer222may or may not comprise many of the characteristics described above in regards to conforming layer118and non-conforming layer120. For example, layer222may comprise a multitude of different materials, such as a metal and/or a metal nitride. Although layer222may comprise a single layer, it may be thicker near bottom216of trench212than on side214. In some embodiments, it may be substantially thicker.

Reference is now made toFIG. 3, which depicts a semiconductor device300. Semiconductor device300may comprise a substrate302and a barrier layer304. Substrate302may comprise a semiconductor layer306, an insulating layer308, and an area310with which electrical connection is desired. Substrate302may further define a feature, which here is depicted as trench312. Trench312may comprise a side314and a bottom316. It is noted, however that other embodiments of features are also envisioned.

Barrier layer304may or may not serve similar functions as described above in regards to barrier layer104. In this example, barrier layer304may comprise a first layer320and a second layer318. First layer320and second layer318may or may not comprise many of the characteristics described above in regards to conforming layer118and non-conforming layer120. For example, both first layer320and second layer318may comprise a multitude of different materials, such as a metal and/or a metal nitride.

In this example, however, first layer320may be non-conforming with regards to trench312. In other words, first layer320may be formed before second layer318, with first layer320covering a portion of trench312. In this example, first layer320may cover all or a portion of bottom316. Next, second layer318may be formed, possibly on top of first layer320, although other layer(s) could exist there between. Second layer318may conform to trench312. In other words, second layer318may cover all or substantially all of trench312. If second layer318is formed after first layer320, then second layer318may cover all or substantially all of a portion of first layer320located near bottom316of trench312. As depicted inFIG. 3, first layer320may be thicker—possibly substantially thicker—than second layer318. It is noted, however, that is some implementations the thicknesses could be roughly equal, or second layer318could be thicker than first layer320.

Referring toFIG. 4, a semiconductor device400may comprise a substrate402and a barrier layer404. Substrate402may comprise a semiconductor layer406, an insulating layer408, and an area410with which electrical connection is desired. Substrate402may further define a feature, which is here depicted as trench412. Trench412may comprise a side414and a bottom416. It is noted, however, that other embodiments of features are also envisioned.

Semiconductor device400, however, may further comprise a contact layer424. Contact layer424may be located partially or completely within trench412. Contact layer424may, for example, serve to connect backend metallurgy to area410and/or semiconductor layer406. In some implementations, contact layer424may comprise a plug and/or one or more contact line(s).

Contact layer424may comprise numerous forms of material, such as different types of metal. Specific metals that may be used include copper and tungsten. If copper is used in contact layer424, a robust barrier may be used to contain the copper in trench412, as the copper may react with substrate402and/or semiconductor layer406. In some embodiments, copper may be used for contact layer424, silicon may be used for semiconductor layer406, and silicon oxide or the like may be used for insulating layer408. In these examples, copper may be more prone to reaction with the silicon than with the silicon oxide. If a reaction between the copper and silicon is allowed to occur, for instance, copper silicide may be formed. This may compromise qualities of semiconductor device400and/or semiconductor layer406. In fact, such a reaction may cause all or a portion of semiconductor layer406to become conductive, which may short electrical connections that are contacted by the conductive material. Thus, in these examples, a robust barrier may be used at bottom416of trench412to contain the copper within trench412.

Barrier layer404may thus comprise many of the same qualities described above in regards to barrier layer104. For instance, barrier layer404may comprise a conforming layer418and a non-conforming layer420. These layers may or may not have many of the same qualities described above in regards to conforming layer118and non-conforming layer120. For example, conforming layer418may be thinner than non-conforming layer420. Furthermore, in the non-limiting illustrated example, conforming layer418may cover all or substantially all of trench412, while non-conforming layer420may be located substantially near a bottom416of trench412. This may result in a robust barrier at the bottom416of trench412; where the copper may otherwise react with the silicon in semiconductor layer406. This may also maintain a thin barrier on side414, where the copper may not react with the silicon oxide in insulating layer408. In this example, the volume of trench412may be maximized to allow for maximum amounts of copper, while the thin barrier on side414may also provide for a low line resistance in trench412. Thus, this example may provide for a robust barrier while sacrificing only a relatively small amount of trench volume.

In the example where copper comprises contact layer424, the copper may be formed in any suitable manner. In one non-limiting example, a seed layer of copper may first be placed near bottom416of trench412. This seed layer may be formed in any suitable manner, with sputtering being but one non-limiting example. Non-conforming layer420may comprise tantalum and/or tantalum nitride, as described above in regards to non-conforming layer120. Either or both may provide a good wetting surface for the seed layer of copper. It may be important that non-conforming layer420provide such a wetting surface, so that the copper does not agglomerate during the formation of the seed layer and/or during the formation of the remainder of the copper. In this example, the remaining copper may then be formed by an electroplating method. If the seed layer does not completely or substantially cover the portion of barrier layer404near bottom416(e.g. the copper agglomerates), then such electroplating may result in undesired voids in the copper contact layer.

In this example, once copper is placed trench412, the described barrier layer404may provide a robust barrier so as to contain the copper within the trench while still realizing a desired volume for the copper contact layer.

FIGS. 5 and 6depict trenches having varying geometries and/or topographies, both as to sides and bottoms. The embodiments described above may serve to allow for a robust barrier and to maximize trench volume in these trenches of varying geometry.FIG. 5, for example, depicts a semiconductor device500. Semiconductor device500may comprise a substrate502and a barrier layer504. Substrate502may comprise a semiconductor layer506, an insulating layer508, and an area510with which electrical connection is desired. Substrate502may further define a feature, which is here depicted as trench512. Trench512may comprise a side514and a bottom516. It is noted, however, that other embodiments of features are also envisioned.

Barrier layer504may or may not serve similar functions as described above in regards to barrier layer104. In this example, barrier layer504may comprise a conforming layer518and a non-conforming layer520. Conforming layer518and non-conforming layer520may or may not comprise many of the characteristics described above in regards to conforming layer118and non-conforming layer120. For example, both conforming layer518and non-conforming layer520may comprise a multitude of different materials, such as a metal and/or a metal nitride.

In this example, however, side514of trench512may be non-uniform. This may result in a larger portion of non-conforming layer520covering a portion of side514than previously shown inFIG. 1. Nevertheless, asFIG. 5depicts, conforming layer518may substantially cover the entire trench512, while non-conforming layer520may substantially cover bottom516and possibly some amount of side514.

FIG. 6depicts a semiconductor device600. Semiconductor device600may comprise a substrate602and a barrier layer604. Substrate602may comprise a semiconductor layer606, an insulating layer608, and an area610with which electrical connection is desired. Substrate602may further define a feature, which is here depicted as trench612. Trench612may comprise a side614and a bottom616. It is noted, however, that other embodiments of features are also envisioned.

Barrier layer604may or may not serve similar functions as described above in regards to barrier layer104. In this example, barrier layer604may comprise a conforming layer618and a non-conforming layer620. Conforming layer618and non-conforming layer620may or may not comprise many of the characteristics described above in regards to conforming layer118and non-conforming layer120. For example, both conforming layer618and non-conforming layer620may comprise a multitude of different materials, such as a metal and/or a metal nitride.

In this example, however, side614of trench612may be non-uniform at both side614and bottom616. This may result in a larger portion of non-conforming layer620covering a portion of side614. This non-uniformity may also result in a portion of bottom616that is not covered by non-conforming layer620. Nevertheless, asFIG. 6depicts, conforming layer618may substantially cover the entire trench612, while non-conforming layer620may substantially cover bottom616and a lesser amount of side614.

In the specific examples illustrated above, barrier layers have been shown to comprise multiple different layers that are formed at different times. Each of the layers may be formed to overlie portions of the trench side and bottom. It is possible, however, to have a barrier layer architecture that is different from that specifically described above without departing from the spirit and scope of the claimed subject matter. For example, some barrier layer architectures might be designed to provide only a negligible amount of a barrier layer material, if any, over the side of the trench.

Exemplary Methods

FIG. 7is a flow diagram that illustrates one non-limiting exemplary method700in accordance with one embodiment described herein. Act702may comprise forming a substrate having at least one trench. Any suitable techniques can be utilized to form the substrate and trench. Act704may comprise forming a barrier layer to be disposed between the substrate and a copper contact layer. Any suitable techniques can be utilized to form the barrier layer, non-limiting examples of which are given above. For example, forming the barrier layer may comprise forming a conformal layer and a non-conformal layer. Act706may comprise forming a contact layer, which may utilize copper. Any suitable techniques can be utilized to form the contact layer, non-limiting examples of which are given above. For example, a seed layer of copper may first be formed before the remaining copper is formed using electroplating techniques.

Exemplary System

FIG. 8depicts a block diagram of an exemplary electronic system800that may include semiconductor devices, such as those described above. Such electronic system800may comprise a computer system that includes a motherboard810which is electrically coupled to various components in electronic system800via a system bus820. System bus820may be a single bus or any combination of busses.

Motherboard810can include, among other components, one or more processors830, a microcontroller840, memory850, a graphics processor860or a digital signal processor870, and/or a custom circuit or an application-specific integrated circuit880, such as a communications circuit for use in wireless devices such as cellular telephones, pagers, portable computers, two-way radios, and similar electronic systems and a flash memory device890.

Electronic system800may also include an external memory900that in turn may include one or more memory elements suitable to the particular application. This may include a main memory920in the form of random access memory (RAM), one or more hard drives940, and/or one or more drives that handle removable media960, such as floppy diskettes, compact disks (CDs) and digital video disks (DVDs). In addition, such external memory may also include a flash memory device970.

Electronic system800may also include a display device980, a speaker and a controller1000, such as a keyboard, mouse, trackball, game controller, hone, voice-recognition device, or any other device that inputs information electronic system800.

CONCLUSION

In the embodiments described above, a semiconductor device with a robust barrier is provided. The barrier may include different materials and geometries that are selected to be employed in connection with a contact layer, which may be formed of copper. Some of the barrier material may be formed over substantially the entire trench, while some of the barrier material is formed only over a trench bottom. The material over substantially the entire trench and the material over only the trench bottom may comprise the same or different materials. These materials may be formed using techniques as described above, and the techniques for different barrier layers may be the same or different.

By selecting the appropriate barrier layer geometries, materials and forming techniques, diffusion between the contact layer and the substrate can be avoided while still maintaining a relatively large trench volume for the contact layer.