Methods of manufacturing semiconductor devices

In a semiconductor device and a method of manufacturing a semiconductor device, a lower electrode is formed on a semiconductor substrate. A first zirconium oxide layer is formed on the lower electrode by performing a first deposition process using a first zirconium source and a first oxidizing gas. A zirconium carbo-oxynitride layer is formed on the first zirconium oxide layer by performing a second deposition process using a second zirconium source, a second oxidizing gas and a nitriding gas, and an upper electrode is formed on the zirconium carbo-oxynitride layer. A zirconium oxide-based composite layer having a high dielectric constant and a thin equivalent oxide thickness can be obtained.

RELATED APPLICATION

This application claims priority under 35 USC §119 to Korean Patent Application No. 2008-28510, filed on Mar. 27, 2008 in the Korean Intellectual Property Office (KIPO), the contents of which are herein incorporated by reference in their entirety.

BACKGROUND

Example embodiments relate to semiconductor devices having a dielectric layer of a high dielectric constant and to methods of manufacturing semiconductor devices.

2. Description of the Related Art

As a result of semiconductor devices becoming more highly integrated, the area of a unit cell has been significantly reduced, and the operational voltage has been lowered, as well. Accordingly, a dielectric layer having a high dielectric constant (high-k) has been applied to semiconductor devices to enhance electrical storage performance and/or to suppress leakage current through the dielectric layer.

Generally, a high-k dielectric layer has a thin equivalent oxide thickness (i.e., a low thickness of SiO2gate oxide would exhibit the same gate capacitance) and a high dielectric constant, so the high-k dielectric layer may improve the capacitance of a capacitor or a coupling ratio of a flash memory device, or the high-k dielectric layer may provide a proper threshold voltage of a metal gate structure.

For example, a hafnium oxide (HfO2) layer, a tantalum oxide (Ta2O5) layer, an aluminum oxide (Al2O3) layer and a zirconium oxide (ZrO2) layer have been used as the high-k dielectric layer of a capacitor (e.g., a metal-insulator-metal capacitor). These dielectric layers have a high dielectric constant, so these dielectric layers may improve dielectric characteristics of a device. As a design rule decreases, a dielectric layer having a very thin equivalent oxide thickness has also been utilized for a further scaling down. Further, these dielectric layers may be crystallized during a subsequent annealing process. When crystallization of a dielectric layer occurs, a threshold voltage of a gate may not be uniform along a channel length, and a leakage current that deteriorates the reliability of the semiconductor device may be generated.

SUMMARY

Example embodiments include methods of manufacturing a semiconductor device including a high dielectric layer, which can have a high dielectric constant and/or a thin equivalent oxide thickness and can reduce generation of a leakage current.

Example embodiments also include semiconductor devices that include a high dielectric layer, which can have a high dielectric constant and/or a thin equivalent oxide thickness and can reduce generation of a leakage current.

In some example embodiments of a method for manufacturing a semiconductor device, a lower electrode can be formed on a semiconductor substrate. A first zirconium oxide layer can be formed on the lower electrode by performing a first deposition process using a first zirconium source and a first oxidizing gas. A zirconium carbo-oxynitride layer having zirconium, oxygen, carbon and nitrogen can be formed on the first zirconium oxide layer by performing a second deposition process using a second zirconium source, a second oxidizing gas and a nitriding gas. An upper electrode can be formed on the zirconium carbo-oxynitride layer.

In example embodiments, the first zirconium oxide layer can be formed on the lower electrode by (a) providing the first zirconium source onto the lower electrode to form an adsorption layer of the first zirconium source on the lower electrode; (b) providing a purging gas to remove a non-adsorbed portion of the first zirconium source; (c) providing the first oxidizing gas to oxidize the adsorption layer of the first zirconium source; and (d) providing a purging gas to remove a non-reacted portion of the first oxidizing gas.

In example embodiments, the zirconium carbo-oxynitride layer can be formed on the first zirconium oxide layer by (e) supplying the second zirconium source to the first zirconium oxide layer to form an adsorption layer of the second zirconium source on the first zirconium oxide layer; (f) providing a purging gas to remove a non-adsorbed portion of the second zirconium source; (g) supplying the second oxidizing gas to the first zirconium oxide layer to form an oxidized adsorption layer of the second zirconium source on the first zirconium oxide layer; (h) providing a purging gas to remove a non-reacted portion of the second oxidizing gas; (i) supplying the nitriding gas to the oxidized adsorption layer of the second zirconium source to form a zirconium carbo-oxynitride layer on the first zirconium oxide layer; and (j) providing a purging gas to remove a non-reacted portion of the nitriding gas.

In example embodiments, the steps from (e) through (j) can be repeated in a cycle to form a plurality of atomic layers of zirconium carbo-oxynitride on the first zirconium oxide layer. The plurality of atomic layers of zirconium carbo-oxynitride can have a chemical formula of ZrO2-x-yCxNy, in which x and y satisfy 0<x<2, 0<y<2 and 0<x+y<2, and at least two of the atomic layers have different values for at least one of x and y from each other. The plurality of atomic layers of zirconium carbo-oxynitride can have a chemical formula of ZrO2-x-yCxNy, in which x and y satisfy 0<x<2, 0<y<2 and 0<x+y<2, and the plurality of atomic layers has a repeating unit of at least two atomic layers that have different values for at least one of x and y from each other.

In example embodiments, a reaction of the nitriding gas and the oxidized adsorption layer of the second zirconium source can be activated by plasma.

In example embodiments, each of the first and second zirconium sources can include tetrakis(dialkylamino)zirconium.

In example embodiments, each of the first and the second oxidizing gases can independently include at least one gas selected from oxygen (O2), ozone (O3) and water vapor (H2O). In example embodiments, the nitriding gas can include at least one gas selected from ammonia (NH3), nitrous oxide (N2O) and nitric oxide (NO).

In example embodiments, prior to forming the upper electrode, a second zirconium oxide layer can be formed on the zirconium carbo-oxynitride layer by performing a third deposition process using a third zirconium source and a third oxidizing gas under an oxidation atmosphere to reduce oxidization of the zirconium carbo-oxynitride layer.

In example embodiments, a reaction of the third zirconium source and the third oxidizing gas may not be activated by plasma, or may be activated by plasma with a sufficiently low energy to reduce oxidization of the zirconium carbo-oxynitride layer.

In example embodiments, the third deposition process can be performed using the third oxidizing gas including at least one of ozone (O3) and water vapor (H2O) without plasma activation.

In example embodiments, a tunnel oxide layer can be formed on a semiconductor substrate before forming the lower electrode. The lower electrode can be provided as a floating gate electrode; the first zirconium oxide layer and the zirconium carbo-oxynitride layer can be provided as a dielectric layer; and the upper electrode can be provided as a control gate electrode.

According to example embodiments, a semiconductor device can include a lower electrode formed on a semiconductor substrate; a first zirconium oxide layer formed on the lower electrode; a zirconium carbo-oxynitride layer having zirconium, oxygen, carbon and nitrogen formed on the first zirconium oxide layer; and an upper electrode formed on the zirconium carbo-oxynitride layer.

In example embodiments, the semiconductor device can further include a second zirconium oxide layer between the zirconium carbo-oxynitride layer and the upper electrode.

In example embodiments, the semiconductor device can further include a tunnel oxide layer formed between the semiconductor substrate and a lower electrode. The lower electrode can be provided as a floating gate electrode, the first zirconium oxide layer and the zirconium carbo-oxynitride layer can be provided as a dielectric layer, and the upper electrode can be provided as a control gate electrode.

In example embodiments, the zirconium carbo-oxynitride layer can include a plurality of atomic layers having a chemical formula of ZrO2-x-yCxNy, in which x and y satisfy 0<x<2, 0<y<2 and 0<x+y<2, and at least two of the atomic layers have different values for at least one of x and y from each other.

In example embodiments, the zirconium carbo-oxynitride layer can include a plurality of atomic layers having a chemical formula of ZrO2-x-yCxNy, in which x and y satisfy 0<x<2, 0<y<2 and 0<x+y<2, and the plurality of atomic layers has a repeating unit of at least two atomic layers that have different values for at least one of x and y.

According to example embodiments, the zirconium-oxide-based composite layer can be obtained by sequentially forming a first zirconium oxide layer and a zirconium carbo-oxynitride layer or by further forming a second zirconium oxide layer on the zirconium carbo-oxynitride layer. The zirconium-oxide-based composite layer can have a high dielectric constant and a thin equivalent oxide thickness. Therefore, a dimension of a dielectric layer in a device can be reduced, and a highly integrated device having an increased number of cells can be manufactured.

Further, the zirconium oxide/zirconium carbo-oxynitride/zirconium oxide layer obtained by example embodiments can have improved leakage current characteristics because the second zirconium oxide layer is formed under a relatively weak oxidation atmosphere to reduce the oxidation of the zirconium carbo-oxynitride layer.

Additionally, the zirconium-oxide-based composite layer can have a high temperature of crystallization compared with a uniform zirconium-oxide layer. Thus, generation of a leakage current through a crystallized portion can be reduced or suppressed, and a device having a uniform threshold voltage along a channel length can be obtained. Further, a temperature margin of a thermal process performed after forming the zirconium carbo-oxynitride layer can be raised.

DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS

The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting of example embodiments. As used herein, the singular forms, “a,” “an” and “the,” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms, “comprises” and/or “comprising,” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. Where a plurality of compositions are cited, any one or more of the cited compositions, as well as others, can be selected for use in an embodiment.

Methods of Forming a Dielectric Layer

Example embodiments include methods of forming a dielectric layer of zirconium-oxide-based multi-layer composites on a substrate. The dielectric layer of zirconium-oxide-based multi-layer composites can have a high dielectric constant and can reduce generation of a leakage current. In some example embodiments, a double layer of zirconium oxide and zirconium carbo-oxynitride (ZrO2/ZrOCN) can be formed on a substrate. In other example embodiments, a triple layer of zirconium oxide, zirconium carbo-oxynitride and zirconium oxide (ZrO2/ZrOCN/ZrO2) can be formed on a substrate. The dielectric layer can be formed by an atomic-layer-deposition (ALD) process or by a plasma-enhanced ALD (PEALD) process.

The flow chart ofFIG. 1illustrates a method of forming a dielectric layer according to example embodiments. Referring toFIG. 1, a first zirconium oxide layer can be formed on a semiconductor substrate (S10), and then a zirconium carbo-oxynitride layer can be formed on the first zirconium oxide layer (S20). Additionally, a second zirconium oxide layer can be formed on the zirconium carbo-oxynitride layer using a weak oxidizing agent (S30). The formation of the second zirconium oxide layer on the zirconium carbo-oxynitride layer can optionally be performed to improve the dielectric constant per unit thickness.

The semiconductor substrate can be a bare wafer or a wafer on which other structures (e.g., impurity regions, gate electrodes, insulation layers, conductive layers, contacts, plugs and/or wirings) are formed. For example, the following components can be formed on the semiconductor substrate: a gate electrode, an insulating interlayer covering the gate electrode, a contact plug connecting a capacitor to an impurity region of the semiconductor substrate, and a lower electrode on the contact plug.

The flow chart ofFIG. 2illustrates a method of forming the first zirconium oxide layer on the semiconductor substrate according to example embodiments. Referring toFIG. 2, a first zirconium source can be supplied to a semiconductor substrate, and the semiconductor substrate can be loaded into a chamber (S11). The first zirconium source can be adsorbed onto the semiconductor substrate to form an adsorption layer of the first zirconium source, and the adsorption layer can include one or more atomic or molecular layers of the first zirconium source.

The first zirconium source can include zirconium and alkylamino ligands. For example, the first zirconium source can be tetrakis(dialkylamino)zirconium. Non-limiting examples of tetrakis(dialkylamino)zirconium can include tetrakis(ethylmethylamino)zirconium (Zr[N(CH3)(CH2CH3)]4, TEMAZ) represented by Formula 1 (below), tetrakis(diethylamino)zirconium (Zr[N(CH2CH3)2]4), tetrakis (dimethylamino)zirconium (Zr[N(CH3)2]4) and the like.

A purging process can be performed on the chamber having the semiconductor substrate (S12). By performing the purging process, a non-adsorbed portion of the zirconium source can be removed from the semiconductor substrate and the chamber, and the adsorption of the zirconium source can remain on the semiconductor substrate. The purging process can be performed using an inactive gas or an inert gas [e.g., argon (Ar), helium (He) or nitrogen (N2)].

A first oxidizing gas can be supplied onto the semiconductor substrate (S13). The first oxidizing gas can be a reactive gas to oxidize the first zirconium source of the adsorption layer. Accordingly, a first zirconium oxide layer can be formed on the semiconductor substrate. Various oxidizing gases having different oxidizing abilities can be used. Non-limiting examples of the oxidizing gas can include oxygen (O2), ozone (O3), water vapor (H2O) and the like. The reaction of the first zirconium source and the first oxidizing gas can be activated by plasma.

A purging process can be performed to remove a non-reacted portion of the first oxidizing gas from the semiconductor substrate and from the chamber (S14). The second purging process can also be performed using an inactive gas or an inert gas.

The above steps from S11to S14can be repeatedly performed to obtain a predetermined thickness of the first zirconium oxide layer. The steps from S11to S14can be repeated in a cycle. A layer obtained by performing a single cycle can have a very thin thickness, such as an atomic layer, so the first zirconium oxide layer can be obtained by repeating the cycle several tens of times or several hundred times, as a function of a desired thickness and desired properties of the dielectric layer or a need of a device. For example, the first zirconium oxide layer can be formed by repeating the cycle about 40 to about 50 times to produce a thickness of about 30-50 Å.

The diagram ofFIG. 5illustrates exemplary sequences of providing reactive gases in a method of forming the first zirconium oxide layer through an atomic-layer-deposition process. As illustrated inFIG. 5, the first zirconium oxide layer can be formed by sequentially and repeatedly providing a first zirconium source (e.g., TEMAZ), a purging gas (e.g., Ar), a first oxidizing gas (e.g., O2) and a purging gas (e.g., Ar). After or while the oxidizing gas is provided, plasma can also be provided.

After forming a first zirconium oxide layer on a semiconductor substrate, a zirconium carbo-oxynitride layer can be formed on the first zirconium oxide layer (S20). The flow chart ofFIG. 3illustrates a method of forming the zirconium carbo-oxynitride layer on the first zirconium oxide layer according to example embodiments. Referring toFIG. 3, a second zirconium source can be supplied onto the first zirconium oxide layer in a chamber to form an adsorption layer of the second zirconium source (S21). The second zirconium source can be the same as or different from the first zirconium source. For example, the second zirconium source can be tetrakis(dialkylamino)zirconium (TEMAZ). A purging process can be performed to remove a non-adsorbed portion of the second zirconium source from the semiconductor substrate (S22) using an inactive gas or an inert gas [e.g., argon (Ar), helium (He) or nitrogen (N2)].

A second oxidizing gas can be supplied to the first zirconium oxide layer (S23). The second oxidizing gas can be a reactive gas to partially or fully oxidize the second zirconium source of the adsorption layer. Non-limiting examples of the second oxidizing gas can include oxygen (O2), ozone (O3), water vapor (H2O) and the like. An oxidizing gas having a relatively low oxidizing ability (e.g., oxygen gas) can be employed to partially oxidize the adsorption layer of the second zirconium source. A purging process can be performed to remove a non-reacted portion of the second oxidizing gas from the semiconductor substrate and the chamber (S24).

After performing the purging process, a nitriding gas can be supplied onto the semiconductor substrate (S25). The nitriding gas can be a reactive gas to nitride the oxidized adsorption layer of the second zirconium source. Non-limiting examples of the nitriding gas can include ammonia (NH3), nitrous oxide (N2O), nitric oxide (NO) and the like. By nitriding the oxidized adsorption layer of the second zirconium source, a zirconium carbo-oxynitride layer having zirconium, carbon, oxygen and nitrogen can be formed on the semiconductor substrate. The zirconium carbo-oxynitride layer can include carbon, which can be mainly originated from organic ligands of the second zirconium source.

In some embodiments, the provided nitriding gas can be activated by plasma. That is, plasma nitriding can be performed, and plasma can be provided after or while the nitriding gas is provided. Plasma can activate reaction of the nitriding gas with the partially or fully oxidized zirconium source so the oxidized second zirconium source and the nitriding gas can be well combined, and a zirconium carbo-oxynitride layer having improved structural stability can be obtained.

A purging process can be performed to remove a non-reacted portion of the nitriding gas from the semiconductor substrate and from the chamber (S26). The above steps from S21to S26can be repeatedly performed, in a repeating cycle, to obtain a predetermined thickness of the zirconium carbo-oxynitride layer. For example, the zirconium carbo-oxynitride layer can be formed by repeating the cycle about 20 to about 50 times to produce a thickness of about 10-50 Å.

By providing the second oxidizing gas prior to the nitriding gas, a zirconium carbo-oxynitride layer having a limited amount of carbon and/or nitrogen can be obtained; consequently, the zirconium carbo-oxynitride layer can have a high dielectric constant, similar to that of a zirconium oxide layer. Further, carbon and nitrogen contained in the zirconium carbo-oxynitride layer can inhibit crystalline growth of zirconium oxide to reduce leakage current characteristics.

The zirconium carbo-oxynitride layer can have a chemical formula of ZrO2-x-yCxNy, in which x and y satisfy 0<x<2, 0<y<2 and 0<x+y<2. In example embodiments, the zirconium carbo-oxynitride layer can include a plurality of atomic layers or sub-layers of zirconium carbo-oxynitride having a chemical formula of ZrO2-x-yCxNy, in which x and y satisfy 0<x<2, 0<y<2 and 0<x+y<2. At least two of the atomic layers can have different values of x and/or y from each other. In other example embodiments, the plurality of atomic layers can have a repeating unit of at least two atomic layers that have different values of x and/or y from each other.

The zirconium carbo-oxynitride layer can be formed by changing feed times (or feed amounts) of the oxidizing gas and/or the nitriding gas while a plurality of cycles are performed. A zirconium carbo-oxynitride layer having different amounts of oxygen, carbon and/or nitrogen in a plurality of atomic layers may not be readily crystallized in all atomic layers, although crystallization can occur in a single atomic layer of the zirconium carbo-oxynitride layer. Thus, growth of crystal with a large size can be suppressed, and generation of a leakage current through a crystallized portion can be reduced.

The diagram ofFIG. 6illustrates exemplary sequences of providing reactive gases in a method of forming the zirconium carbo-oxynitride layer through an atomic-layer-deposition process. As illustrated inFIG. 6, the zirconium carbo-oxynitride layer can be formed by sequentially and repeatedly providing a second zirconium source (e.g., TEMAZ), a purging gas (e.g., Ar), a second oxidizing gas (e.g., O2), a purging gas (e.g., Ar), a nitriding gas (e.g., NH3) and a purging gas (e.g., Ar). After or while the nitriding gas is provided, plasma can also be provided.

After forming the zirconium carbo-oxynitride layer on the first zirconium carbo-oxynitride layer, a second zirconium oxide layer can be formed on the zirconium carbo-oxynitride layer under a weak oxidation atmosphere (S30). The formation of the second zirconium oxide layer can optionally be performed to improve the dielectric constant per unit thickness.

The flow chart ofFIG. 4illustrates a method of forming the second zirconium oxide layer on the zirconium carbo-oxynitride layer according to example embodiments. Referring toFIG. 4, a third zirconium source can be supplied to the zirconium carbo-oxynitride layer in a chamber (S31), and the third zirconium source can be adsorbed onto the zirconium carbo-oxynitride layer to form an adsorption layer of the third zirconium source. The third zirconium source can be the same as or different from the first and the second zirconium sources; for example, the third zirconium source can be tetrakis(dialkylamino)zirconium (TEMAZ). A purging process can be performed to remove a non-adsorbed portion of the third zirconium source from the semiconductor substrate (S32).

A third oxidizing gas can be supplied to the zirconium carbo-oxynitride layer (S33). The third oxidizing gas can be a reactive gas to oxidize the third zirconium source of the adsorption layer, and the third oxidizing gas can have a relatively weak oxidizing ability to reduce or suppress an additional oxidation of the underlying zirconium carbo-oxynitride layer. Non-limiting examples of the third oxidizing gas can include oxygen (O2), ozone (O3), water vapor (H2O) and the like.

In example embodiments, the reaction of the third zirconium source and the third oxidizing gas may not be activated by plasma. For example, a weak oxidizing gas (e.g., water vapor) can be used without plasma activation to oxidize the third zirconium source and to suppress the oxidation of the zirconium carbo-oxynitride layer. In other example embodiments, the reaction of the third zirconium source and the third oxidizing gas can be activated by plasma with a sufficiently low energy to reduce or suppress oxidization of the zirconium carbo-oxynitride layer; the plasma can be provided at a relatively low power and/or for a relatively short time.

A purging process can be performed to remove a non-reacted portion of the second oxidizing gas from the semiconductor substrate and from the chamber (S34). The above steps from S31to S34can be repeatedly performed, in a repeating cycle, to obtain a predetermined thickness of the second zirconium oxide layer. For example, the second zirconium oxide layer can be formed by repeating the cycle about 10 to about 50 times to produce a thickness of about 10-50 Å.

As mentioned above, a dielectric layer of zirconium-oxide-based multi-layer composites can be formed on a substrate. The dielectric layer can suppress or reduce generation of a leakage current and can have a high dielectric constant. Therefore, the dielectric layer can be properly employed in manufacturing a highly integrated device.

The graph ofFIG. 7illustrates a relation of an equivalent oxide thickness (EOT) and a breakdown voltage (BV) to induce 1 fA/cell in a dielectric layer of zirconium oxide/aluminum oxide/zirconium oxide (ZrO2/Al2O3/ZrO2, ZAZ). Referring toFIG. 7, a dielectric layer of zirconium oxide/aluminum oxide/zirconium oxide (ZAZ), which can be employed in a metal-insulator-metal (MIM) capacitor of a dynamic random access memory (DRAM) device, can have an equivalent-oxide-thickness (EOT) limit of about 7.5 Å at 1 fA/cell-BV of about ±1V. However, such an EOT value of the ZAZ dielectric layer can restrict further scaling down of a device in accordance with a decrease in a design rule or a critical dimension of a device.

A dielectric layer having an intervening zirconium carbo-oxynitride film instead of an aluminum oxide film can present a higher dielectric constant and/or a thinner EOT in comparison with the ZAZ layer. The intervening zirconium carbo-oxynitride film can, however, be readily deteriorated while a zirconium oxide film is formed on the zirconium carbo-oxynitride film.

As an example, the graph ofFIG. 8illustrates a leakage current density (A/cell) vs. applied voltage (V) measured from a capacitor having a dielectric layer of zirconium oxide/zirconium carbo-oxynitride/zirconium oxide (ZrO2/ZrOCN/ZrO2, ZNZ). After forming a zirconium carbo-oxynitride film on a first zirconium oxide film, a second zirconium oxide film was formed using O2activated by plasma. Leakage current characteristics were measured after thermally treating the dielectric layer at a temperature of about 450° C. under N2for about 15 minutes. The dielectric layer was measured to have an equivalent oxide thickness (EOT) of about 7.8 Å.

As illustrated inFIG. 8, a leakage current was largely generated in a zirconium oxide/zirconium carbo-oxynitride/zirconium oxide layer at several position points of a wafer. According to microscopic observation, generation of a leakage current through a dielectric layer of zirconium oxide/zirconium carbo-oxynitride/zirconium oxide increased as the amount of plasma-activated O2supplied to the zirconium carbo-oxynitride film increased and as the thickness of the second zirconium oxide film increased.

A zirconium oxide layer having a relatively large thickness can be readily crystallized during a subsequent thermal process; and, thus, a leakage current through a crystallized portion may occur. As the zirconium carbo-oxynitride film may be excessively oxidized by the oxidizing agent used in forming a zirconium oxide film thereon, the zirconium carbo-oxynitride film may not effectively suppress crystallization of the zirconium oxide film.

The graphs ofFIGS. 9A through 9Cillustrate a leakage current density (A/cell) vs. applied voltage (V) measured from capacitors having a dielectric layer. The solid line ofFIG. 9Aand the graphs ofFIG. 9Billustrate a leakage current density of a dielectric layer of zirconium oxide/zirconium carbo-oxynitride/zirconium oxide (ZrO2/ZrOCN/ZrO2, ZNZ) formed by example embodiments. The dashed line ofFIG. 9Aand the graphs ofFIG. 9Cillustrate a leakage current density of the dielectric layer of zirconium oxide/zirconium carbo-oxynitride (ZrO2/ZrOCN, ZNO) formed by example embodiments. A first zirconium oxide film of the ZNZ dielectric layer was formed by an atomic-layer-deposition process using oxygen gas with plasma activation (plasma O2); and a second zirconium oxide film of the ZNZ dielectric layer was formed under a decreased oxidizing atmosphere, e.g., using water (H2O) vapor without plasma activation. Leakage current characteristics were measured after thermally treating the dielectric layer at a temperature of about 450° C. under N2for about 15 minutes. InFIGS. 9A through 9C, the numbers in the parentheses indicate the numbers of cycles (Cy) in the atomic-layer-deposition process.

Referring toFIG. 9A, the ZNZ dielectric layer formed using a weak oxidant. The ZNZ dielectric layer was measured to have an equivalent oxide thickness (EOT) of about 7.8 Å, and it showed a leakage current density of about 1 fA/cell (femto ampere/cell) when a voltage of about −1.9V/1.7V was applied. Therefore, it can be noted that leakage current characteristics of the ZNZ dielectric layer can be improved by forming the second zirconium oxide film on the zirconium carbo-oxynitride under a weak oxidizing atmosphere. The ZNO dielectric layer was measured to have an EOT of about 7.3 Å and showed a leakage current density of about 1 fA/cell (femto ampere/cell) when a voltage of about −1.9V/1.8V was applied. Accordingly, it can be noted that the ZNO dielectric layer can also improve leakage current characteristics of a device, such as the ZNZ dielectric layer.

Referring toFIG. 9B, the EOT of the ZNZ dielectric layer varied from about 7.8 Å to 7.2 Å by changing the number of cycles in the atomic-layer-deposition process and the thickness of each sub-layer. It can be noted that the EOT of the ZNZ dielectric layer may decrease as the number of cycles for forming the zirconium carbo-oxynitride layer and/or as the number of cycles for forming the second zirconium oxide layer becomes smaller. Further, even though the ZNZ dielectric layer has an EOT of about 7.2 Å, which is thinner than the EOT of about 7.5 Å for the ZAZ layer, deterioration of leakage current characteristics was not observed.

Referring toFIG. 9C, the EOT of the ZNO dielectric layer varied from about 7.3 Å to 6.9 Å by changing the number of cycles in the atomic-layer-deposition process and the thickness of each sub-layer. Further, even though the ZNO dielectric layer has an EOT of about 6.9 to about 7.3 Å, which is thinner than the EOT of about 7.5 Å for the ZAZ layer, the deterioration of leakage current characteristics was not observed.

Methods of Manufacturing a Semiconductor Device

The cross-sectional views ofFIGS. 10 through 17Billustrate a method of manufacturing a dynamic random access memory (DRAM) device according to example embodiments.

Referring toFIG. 10, an isolation layer105can be formed on a semiconductor substrate100. A gate electrode structure including a gate dielectric layer (not illustrated), a gate conductive layer110, a gate mask115and a gate spacer120can be formed on the semiconductor substrate100. The gate dielectric layer can be formed by using the methods of forming a dielectric layer according to the example embodiments. Impurity regions125can be formed at the semiconductor substrate100adjacent to the gate electrode structure, and a first insulating interlayer130can be formed on the semiconductor substrate to cover the gate electrode structure. After forming a first contact hole (not illustrated) through the first insulating interlayer130to expose the impurity regions125, a first contact plug135can be formed in the first contact hole using a conductive material.

A second insulating interlayer140can be formed on the first contact plug135and on the first insulating interlayer130, and then a bit line145can be formed on the second insulating interlayer140. A bit line contact (not illustrated) can be formed through the second insulating interlayer140to connect the bit line145to the first contact plug135. A third insulating interlayer150can be formed on the second insulating interlayer140to cover the bit line145. After forming a second contact hole (not illustrated) through the second and the third insulating interlayers140and150to expose the first contact plug135, a second contact plug155can be formed in the second contact hole using a conductive material.

Referring toFIG. 11, an etch stop layer160can be formed on the third insulating interlayer150and on the second contact plug155by performing a chemical vapor deposition (CVD) process using silicon nitride. A mold layer170can be formed on the etch stop layer160. The mold layer170can have a predetermined thickness that is a function of the surface area of the capacitor; for example, the mold layer170can be formed to a thickness of about 10,000 Å to about 20,000 Å. Additionally, the mold layer170can be formed to have a single layer or a plurality of sub-layers that can have different etch rates. A plurality of holes175for a capacitor electrode can be formed in the mold layer170by performing a photo-lithography process. Forming the plurality of holes175exposes the second contact plug155by removing a portion of the etch stop layer160.

Referring toFIG. 12, a lower electrode layer180can be formed on the mold layer170having the plurality of holes175; the lower electrode layer180can be formed of a conductive material (e.g., TiN, Ti, TaN, Pt, etc.). The lower electrode layer180can be contacted with the second contact plug155, and the lower electrode layer180can be supported by the etch stop layer160having a sufficient thickness after the mold layer170is removed in a subsequent process.

Referring toFIG. 13, a buffer layer185can be formed on the lower electrode170to fill the holes175. The buffer layer185can be formed of an insulation material that is substantially the same as or different from the material of which the mold layer170is formed. When the buffer layer185and the mold layer170are formed of the same material, the buffer layer185and the mold layer170can be simply removed by the same removal process after forming a lower electrode; but, in such a case, the lower electrode can readily fall down. Forming the buffer layer185and the mold layer170using different materials can reduce generation of a defect. For example, the buffer layer185can be formed of a photosensitive material that can be different from an insulation material of the mold layer170.

Referring toFIG. 14, upper portions of the buffer layer185, the mold layer170and the lower electrode layer180can be removed by an etch-back process to form a lower electrode182that is isolated by the mold layer170. A top portion of the lower electrode182can be formed to have a round shape by performing a wet-etching process on the mold layer170and on the top portion of the lower electrode180. When the top portion of the lower electrode182is sharp, a dielectric layer of a capacitor can be broken, or a leakage current from the top portion of the lower electrode182can be generated.

Referring toFIG. 15, the buffer layer185and the mold layer170can be removed from the semiconductor substrate100. For example, the buffer layer185and the mold layer170can be removed by a lift-off process using a limulus amoebocyte lysate (LAL) solution that can include deionized water, ammonium hydrofluoride and hydrofluoric acid. Removing the buffer layer185and the mold layer170can be carefully performed such that adjacent lower electrodes182do not contact each other or fall down. Although not illustrated in the drawings, an additional structure for supporting the lower electrode182can be formed to prevent adjacent lower electrodes182from contacting each other or falling down; the supporting structure can have, e.g., a ladder shape or a ring shape and can be formed around the lower electrode182.

Referring toFIGS. 16A and 16B, a dielectric layer186can be formed on the lower electrode182. The dielectric layer186can be formed by the above-mentioned methods of forming a dielectric layer of zirconium-oxide-based multi-layer composites according to example embodiments. In some example embodiments, the dielectric layer186can be formed to have a first zirconium oxide film187and a zirconium carbo-oxynitride film188, as illustrated inFIG. 16A. In other example embodiments, the dielectric layer186can be formed to have a first zirconium oxide film187, a zirconium carbo-oxynitride film188and a second zirconium oxide film190, as illustrated inFIG. 16B.

For example, the semiconductor substrate on which the lower electrode182and other structure are formed is loaded in a reaction chamber for an atomic-layer-deposition process. A first zirconium source (e.g., TEMAZ) can be provided in the chamber to form a chemical adsorption layer of the first zirconium source on the lower electrode182. After purging the chamber using an inactive gas (e.g., Ar, He or N2) to remove a non-adsorbed portion of the first zirconium source, a first oxidizing gas (e.g., O2, O3or H2O) can be injected into the chamber to oxidize the chemical adsorption layer of the first zirconium source. As a result, an atomic layer of a first zirconium oxide layer187can be formed on the lower electrode182. The reaction of the first zirconium source and the first oxidizing gas can be activated by plasma. Plasma can be provided in the reaction chamber while or after the first oxidizing gas is provided. A purging gas (e.g., Ar, He or N2) can be injected into the chamber to remove any remaining first oxidizing gas from the chamber. By repeating this sequence, a first zirconium oxide layer187having a predetermined thickness can be obtained.

After forming the first zirconium oxide layer187on the lower electrode182, the zirconium carbo-oxynitride layer188can be formed on the first zirconium oxide layer187. The zirconium carbo-oxynitride layer188can be formed by an in-situ process with the formation of the first zirconium oxide layer187using the same atomic-layer-deposition apparatus. That is, a second zirconium source used for forming the zirconium carbo-oxynitride layer188can be provided directly after purging the chamber to remove a non-reacted first oxidizing gas.

For example, a second zirconium source (e.g., TEMAZ) can be provided in the chamber to form a chemical adsorption layer of the second zirconium source on the first zirconium oxide layer187. After purging the chamber using an inactive gas (e.g., Ar, He or N2) to remove a non-adsorbed portion of the second zirconium source, an oxidizing gas (e.g., O2, O3or H2O) can be injected into the chamber to oxidize the chemical adsorption layer of the second zirconium source. The oxidized adsorption layer of the zirconium source can have a reduced amount of carbon and nitrogen relative to the zirconium source. The oxidizing gas can partially take part in the reaction with the adsorption layer of the second zirconium source. The rate of the chemical reaction between the second zirconium source and the second oxidizing gas can depend on the pressure and/or the temperature, and the reaction degree can also vary depending on the oxidizing ability of the oxidizing gas. Thus, the pressure, the temperature and/or the type of the oxidizing gas can be properly adjusted such that the zirconium carbo-oxynitride layer188can be formed to have predetermined amounts of carbon and nitrogen.

A purging gas (e.g., Ar, He or N2) can be injected into the chamber to remove any remaining oxidizing gas from the chamber. After purging the chamber, a nitriding gas can be injected into the chamber. Examples of the nitriding gas can include NO, NO2, NH3, etc. While the nitriding gas is provided, plasma can also be provided in the chamber. The oxidized adsorption layer of the zirconium source can be nitrided by the nitriding gas and plasma, and binding forces between zirconium, oxygen, carbon and nitrogen can increase to form a zirconium carbo-oxynitride layer188having improved stability. When the amount of nitrogen included in the zirconium carbo-oxynitride layer188is excessive, electrical characteristics (e.g., dielectric constant, equivalent oxide thickness or leakage current) can be deteriorated. Thus, the amount of the nitriding gas that is provided can be limited. After providing the nitriding gas, a purging gas can be injected into the chamber to remove a non-reacted portion of the nitriding gas. The zirconium carbo-oxynitride layer188thus formed can have a formula of ZrO2-x-yCxNy. A basic atomic layer can be formed on the lower electrode layer182by performing one cycle of atomic layer deposition. The zirconium carbo-oxynitride layer188can be formed to a predetermined thickness by repeating a plurality of the cycles.

As illustrated inFIG. 16B, the dielectric layer186can be formed to further include a second zirconium oxide layer190on the zirconium carbo-oxynitride layer188. Formation of the second zirconium oxide layer190can be performed by an in-situ process using the same atomic-layer-deposition apparatus with the formations of the first zirconium oxide layer187and/or the zirconium carbo-oxynitride layer188. That is, a third zirconium source used for forming the second zirconium oxide layer190can be supplied directly after purging the chamber to remove a non-reacted nitriding gas used in forming the zirconium carbo-oxynitride layer188. For example, the second zirconium oxide layer190can be formed by sequentially and repeatedly supplying the third zirconium source (e.g., TEMAZ), a purging gas (e.g., Ar, He or N2), a third oxidizing gas (e.g., O2, O3or H2O) and a purging gas. The third oxidizing gas can have a relatively weak oxidizing ability to thereby suppress oxidation of the zirconium carbo-oxynitride layer188. One or more of the following factors can be adjusted to reduce loss of carbon and/or nitrogen in the zirconium carbo-oxynitride layer188: the type of the third oxidizing gas, feeding time and/or plasma activation.

Referring toFIGS. 17A and 17B, an upper electrode195can be formed on the dielectric layer186. The upper electrode195can be formed of a conductive material (e.g., TiN, Ti, TaN, Pt, etc.). Although not illustrated in the drawings, an insulating interlayer and a metal wiring can be formed on or over the upper electrode. As a result, a high-performance dynamic random access memory (DRAM) device having a reduced defect or leakage current can be obtained.

The cross-sectional views ofFIGS. 18 through 21Billustrate a method of manufacturing a capacitor of a logic device according to example embodiments.

Referring toFIG. 18, a lower wiring210can be formed on a semiconductor substrate200. The lower wiring210can be adapted to apply power to a device and can be formed of a conductive material (e.g., a metal or polysilicon doped with impurities). A first insulating interlayer220can be formed on the semiconductor substrate200to cover the wiring210. A lower contact hole (not illustrated) can be formed in the first insulating interlayer220to expose the lower wiring210, and then a lower contact plug230can be formed in the lower contact hole. The lower contact plug230can be formed of, for example, copper or tungsten.

Referring toFIGS. 19A and 19B, a lower electrode layer240of a capacitor can be formed on the lower contact plug230. A material of the lower electrode layer240can be, for example, TiN, Ti, TaN, Pt, etc. A dielectric layer245of a capacitor can be formed on the lower electrode240. The dielectric layer245can be formed by the above-mentioned methods of forming a dielectric layer of zirconium oxide-based multi-layer composites according to example embodiments. In some example embodiments, the dielectric layer245can be formed to have a first zirconium oxide film250and a zirconium carbo-oxynitride film255, as illustrated inFIG. 19A. In other example embodiments, the dielectric layer245can be formed to have a first zirconium oxide film250, a zirconium carbo-oxynitride film255and a second zirconium oxide film258, as illustrated inFIG. 19B. For example, the dielectric layer245can be formed by the process for forming the dielectric layer186as illustrated with reference toFIGS. 16A and 16B. An upper electrode layer260can be formed on the dielectric layer245; the upper electrode layer260can be formed of a conductive material (e.g., TiN, Ti, TaN, Pt, etc.).

Referring toFIGS. 20A and 20B, a dummy upper electrode270can be formed on the upper electrode layer260. The dummy upper electrode270can protect an upper electrode during a subsequent etching process and can provide a structure for readily connecting the upper electrode to an upper wiring. The upper electrode layer260, the dielectric layer245and the lower electrode layer240can be sequentially patterned using the dummy upper electrode270to form a lower electrode240, a dielectric layer pattern245and an upper electrode260on the lower contact plug230.

Referring toFIGS. 21A and 21B, a second insulating interlayer225can be formed on the first insulating interlayer220to cover the dummy upper electrode270. A material of the second insulating interlayer225can be the same as or different from that of the first insulating interlayer220. An upper contact hole (not illustrated) can be formed in the second insulating interlayer225to expose the dummy upper electrode270, and then an upper contact plug280can be formed in the upper contact hole. The upper contact plug280can make contact with the dummy upper electrode270, and an upper wiring290can be formed on the upper contact plug280.

As mentioned above, a capacitor having a dielectric layer of zirconium-oxide-based multi-layer composites can be suitably employed in a logic device to reduce a leakage current through the dielectric layer.

The cross-sectional views ofFIGS. 22 through 25Billustrate a method of manufacturing a decoupling capacitor of a logic device according to example embodiments.

Referring toFIG. 22, a ground line305can be formed in or through a semiconductor substrate300. First contact pads310,315can be formed on the semiconductor substrate300and can be connected with the ground line305or a power supply line (not illustrated); the first contact pads310,315can be formed of a metal. A first insulating interlayer320can be formed on the semiconductor substrate300to cover the first contact pads310,315; the first insulating interlayer320can be formed of an insulation material [e.g., boron-doped phosphosilicate glass (BPSG), high-density-plasma chemical vapor deposition (HDP-CVD) oxide, etc.]. First contact holes (not illustrated) can be formed in the first insulating interlayer320to expose the first contact pads310,315; and then first contact plugs330,335can be formed in the first contact holes. The first contact plugs330,335can be formed of a metal (e.g., Cu, W, etc.).

Referring toFIG. 23, second contact pads340,345, a second insulating interlayer350and second contact plugs360,365can be formed on the first insulating interlayer320. Formation of the second contact pads340,345, the second insulating interlayer350and the second contact plugs360,365can be the same as or similar to formation of the first contact pads310,315, the first insulating interlayer320and the first contact plugs330,335.

Referring toFIGS. 24A and 24B, a lower electrode370of a capacitor can be formed on the second contact plug360and can be electrically connected with the ground line305. The lower electrode370can be formed of a conductive material (e.g., TiN, Ti, TaN, Pt, etc.).

A dielectric layer375of a capacitor can be formed on the lower electrode370by the above-mentioned methods of forming a dielectric layer of zirconium-oxide-based multi-layer composites according to example embodiments. In some example embodiments, the dielectric layer375can be formed to have a first zirconium oxide film380and a zirconium carbo-oxynitride film385, as illustrated inFIG. 24A. In other example embodiments, the dielectric layer375can be formed to have a first zirconium oxide film380, a zirconium carbo-oxynitride film385and a second zirconium oxide film388, as illustrated inFIG. 24B. For example, the dielectric layer375can be formed by the process for forming the dielectric layer186as illustrated with reference toFIGS. 16A and 16B.

An upper electrode390can be formed on the dielectric layer375; the upper electrode390can be formed of a conductive material (e.g., TiN, Ti, TaN, Pt, etc.). One portion of the upper electrode390can be formed on the dielectric layer, and another portion of the upper electrode390can be connected to the second contact plug365, which can be electrically connected to the power supply line.

Referring toFIGS. 25A and 25B, a passivation layer395can be formed on the upper electrode390. As a result, a decoupling capacitor having high capacitance to improve the operational speed of a logic device can be manufactured.

The cross-sectional views ofFIGS. 26 through 30Billustrate a method of manufacturing a flash memory device according to example embodiments.

Referring toFIG. 26, a tunnel oxide layer410, a floating gate electrode layer420and a hard mask layer430can be sequentially formed on a substrate400. The substrate400can be a semiconductor substrate (e.g., a silicon wafer or an SOI substrate).

The tunnel oxide layer410can be formed by a thermal-oxidation process to a thickness of about 50 Å to about 100 Å. The tunnel oxide layer410, having high durability and uniformity, can improve the operational stability of reading or writing in a device. A tunnel oxide layer410having such properties can be formed using a radical oxidation method.

The floating gate electrode layer420can be formed by a CVD process using a conductive material (e.g., polysilicon or a metal). The floating gate electrode layer420can be formed to a thickness of about 500 Å to about 1,500 Å. Additionally, the floating gate electrode layer420can be a single layer formed by a single deposition, or the floating gate electrode layer420can be multi-layer—having at least two layers formed by a stepwise deposition in which a first layer can be formed with a relatively thin thickness (e.g., about 300 Å) and a second layer or an additional layer can be formed on the first layer. The multi-layer floating gate electrode layer420can improve characteristics of a device.

The hard mask layer430can be a single layer or multi-layer. For example, the hard mask layer430can be obtained by forming a lower layer of oxide or nitride on the floating gate electrode layer420, forming an organic layer on the lower layer, and then forming an anti-reflective layer of nitride on the organic layer.

Referring toFIG. 27, the hard mask layer430, the floating gate electrode layer420and the tunnel oxide layer410can be sequentially patterned by a photolithography process. For example, the hard mask layer430can be etched using a photoresist pattern (not illustrated) as a mask; and then the floating gate electrode layer420and the tunnel oxide layer410can be etched using a hard mask layer pattern432as an etching mask to form a floating gate electrode422and a tunnel oxide layer pattern412on the substrate400. By patterning the hard mask layer430, the floating gate electrode layer420and the tunnel oxide layer410, portions of the substrate400can be exposed; and an isolation layer can be formed at the exposed portions of the substrate400. The distance between floating gate electrodes422formed in a memory cell region of the substrate400can be relatively narrow, and the distance between floating gate electrodes422formed in a high-voltage transistor region of the substrate400can be relatively wide.

Referring toFIG. 28, a trench hole (not illustrated) can be formed at the exposed portions of the substrate400using a floating gate electrode structure as a mask. The trench hole can be filled with an insulation material, and thus the trench hole can have a slope relative to the substrate400to reduce a concentration of stress to a channel of the device. The stress can be generated from a difference in composition of the insulation material and a material of the substrate400. An isolation layer440can be formed from a spin-on glass (SOG) material having polysilazane or an undoped silicate glass (USG) to reduce generation of a void.

Referring toFIGS. 29A and 29B, an upper portion of the isolation layer440and the hard mask layer pattern432can be removed. A dielectric layer445can be formed on the floating gate electrode422and on the isolation layer440. The dielectric layer445can be formed of a high dielectric material to raise a coupling ratio; and the dielectric layer445can be formed to a thickness of, e.g., about 100 Å to about 200 Å.

The dielectric layer445can be formed by the above-mentioned methods of forming a dielectric layer of zirconium oxide-based multi-layer composites according to example embodiments. In some example embodiments, the dielectric layer455can be formed to have a first zirconium oxide film450and a zirconium carbo-oxynitride film455, as illustrated inFIG. 29A. In other example embodiments, the dielectric layer445can be formed to have a first zirconium oxide film450, a zirconium carbo-oxynitride film455and a second zirconium oxide film458, as illustrated inFIG. 29B. For example, the dielectric layer445can be formed by the process for forming the dielectric layer186as illustrated with reference toFIGS. 16A and 16B.

A control gate electrode460can be formed on the dielectric layer445in the memory cell region. In the high-voltage transistor region, the dielectric layer445can be removed from the floating gate electrode422, and a control gate electrode465can be formed on the floating gate electrode422; thus, a metal-oxide semiconductor (MOS) transistor having two gate layers can be obtained.

Referring toFIGS. 30A and 30B, an insulating interlayer470can be formed on the control gate electrode460,465. The insulating interlayer470can be formed to have a single layer or to be multi-layer (i.e., having at least two layers); and the insulating interlayer470can be formed of an insulation material (e.g., an HDP-CVD oxide). As an integration degree of a device increases, a general CVD process can generate large voids while filling a hole, whereas an HDP-CVD process can reduce generation of a void because a fine chemical etching and a deposition can occur simultaneously. For example, the insulating interlayer470can be formed by first depositing an HDP-CVD oxide (e.g., to a thickness of about 2,000 Å), then slightly wet-etching the deposited layer, and then depositing additional HDP-CVD oxide (e.g., to a thickness of about 6,000 Å or more).

Although not illustrated in the drawings, a contact hole can be formed in the insulating interlayer470. A metal contact plug filling the contact hole and a metal line can be formed in or on the insulating interlayer470. The metal line can be formed of a highly conductive material (e.g., aluminum, tungsten or copper).

Accordingly, a flash memory device having a dielectric layer of zirconium-oxide-based multi-layer composites can have a reduced leakage current and a high coupling ratio.

The cross-sectional views ofFIGS. 31A through 32Billustrate a method of manufacturing a gate structure according to example embodiments.

Referring toFIGS. 31A and 31B, a gate dielectric layer505can be formed on the substrate500. For example, the gate dielectric layer505can be formed by the above-mentioned methods of forming a dielectric layer of zirconium-oxide-based multi-layer composites according to example embodiments. In some example embodiments, the gate dielectric layer505can be formed to have a first zirconium oxide film510and a zirconium carbo-oxynitride film515, as illustrated inFIG. 31A. In other example embodiments, the gate dielectric layer505can be formed to have a first zirconium oxide film510, a zirconium carbo-oxynitride film515and a second zirconium oxide film518, as illustrated inFIG. 31B. For example, the gate dielectric layer505can be formed by the process for forming the dielectric layer186as illustrated with reference toFIGS. 16A and 16B. The gate dielectric layer505formed by the method can have a high dielectric constant and a reduced leakage current, so the gate dielectric layer505can be usefully employed in a gate dielectric of a transistor.

A gate electrode layer520can be formed on the gate dielectric layer505. The gate electrode layer520can be formed of a conductive material (e.g., W, TiN, Ti, TaN, Pt, polysilicon, etc.)

Referring toFIGS. 32A and 32B, a gate mask layer (not illustrated) can be formed on the gate electrode layer520, and then the gate mask layer can be patterned by a photolithography process to form a gate mask pattern530. The gate electrode layer520and the gate dielectric layer505can be patterned using the gate mask pattern530as an etching mask to form a gate electrode520and a gate dielectric layer pattern505on the substrate500. A gate spacer540can be formed on sidewalls of the gate electrode520. Accordingly, a gate structure having enhanced characteristics can be obtained.

The block diagrams ofFIGS. 33 through 35illustrate systems including a memory device in accordance with example embodiments.

Referring toFIG. 33, a memory controller620can be connected to memory610. The memory610can be a dynamic random access memory (DRAM) device having a dielectric layer of zirconium oxide-based multi-layer composites in a capacitor, or the memory610can be a flash memory device having a dielectric layer of zirconium oxide-based multi-layer composites on a floating gate electrode, both which are described above. The flash memory device can be an NAND flash memory or an NOR flash memory. The memory controller620can provide the memory610with input signals to control operations of the memory610. For example, in a memory card that includes the memory controller620and the memory610, the memory controller620can transfer commands of a host to the memory610to control input/output data and/or the memory controller620can control various data from the memory610based on an applied control signal. Such a structure or a relation can be employed in various digital devices using memory as well as the simple memory card. Further, the memory controller620can include the zirconium-oxide-based multi-layer composites as a dielectric layer of a capacitor or as a gate of a transistor in a logic circuit.

Referring toFIG. 34, a portable device700can be provided according to example embodiments. The portable device700can include memory610in the form of a DRAM device having a dielectric layer of zirconium-oxide-based multi-layer composites in a capacitor or in the form of a flash memory device having a dielectric layer of zirconium-oxide-based multi-layer composites on a floating gate electrode. Examples of the portable device700can include an MP3 player, a video player, a portable multi-media player (PMP), etc.

The portable device700can include the memory610, the memory controller620, an encoder/decoder (EDC)710, a display element720and an interface730. Data can be input to or output from the memory610by way of the memory controller620. As illustrated with the dashed lines ofFIG. 34, data can be directly input from the EDC710to the memory610, or data can be directly output from the memory610to the EDC710.

The EDC710can encode data to be stored in the memory610. For example, the EDC710can execute encoding for storing audio data and/or video data in the memory610of an MP3 player or a PMP player. Further, the EDC710can execute MPEG encoding for storing video data in the memory610. Moreover, the EDC710can include multiple encoders to encode different types of data depending on their formats. For example, the EDC710can include an MP3 encoder for encoding audio data and an MPEG encoder for encoding video data.

The EDC710can also decode data that is output from the memory610. For example, the EDC710can execute MP3 decoding to decode audio data from the memory610. Further, the EDC710can execute MPEG decoding to decode video data from the memory610. Moreover, the EDC710can include multiple decoders to decode different types of data depending on their formats. For example, the EDC710can include an MP3 decoder for audio data and an MPEG decoder for video data.

In other embodiments, the EDC710may include only a decoder. For example, encoded data can be input to the EDC710, and then the EDC710can decode the input data for transfer into the memory controller620or the memory610.

The EDC710can receive data to be encoded or data being encoded by way of the interface730. The interface730can comply with established standards (e.g., FireWire, USB, etc.); accordingly, the interface730can include a FireWire interface, a USB interface, etc., and data can be output from the memory610by way of the interface730.

The display element720can display a representation of user data that is output from the memory610and decoded by the EDC710. Examples of the display element720can include a speaker outputting an audio representation of the data, a display screen outputting a video representation of the data, etc.

Referring toFIG. 35, a computing system900can be provided according to example embodiments. The computing system800can include the memory610and a central processing unit (CPU)810connected to the memory610. The memory610can be a DRAM device having a dielectric layer of zirconium-oxide-based multi-layer composites in a capacitor or a flash memory device having a dielectric layer of zirconium-oxide-based multi-layer composites on a floating gate electrode. An example of the computing system800can be a laptop computer including flash memory as a main memory module. Additional examples of the computing system800can include digital devices in which the memory610for storing data and controlling functions can be built. The memory610can be directly connected to the CPU810, or the memory610can be indirectly connected to the CPU810by buses. Although not illustrated inFIG. 35, other elements or devices can be included in the computing system800.

According to example embodiments, the zirconium-oxide-based composite layer can be obtained by sequentially forming a first zirconium oxide layer and a zirconium carbo-oxynitride layer, or by further forming a second zirconium oxide layer on the zirconium carbo-oxynitride layer. The zirconium oxide-based composite layer can have a high dielectric constant and a thin equivalent oxide thickness. Therefore, a dimension of a dielectric layer in a device can be reduced, and a highly integrated device having an increased number of cells can be manufactured.

Further, the zirconium oxide/zirconium carbo-oxynitride/zirconium oxide layer obtained by example embodiments can have improved leakage current characteristics, because the second zirconium oxide layer is formed under a relatively weak oxidation atmosphere to reduce the oxidation of the zirconium carbo-oxynitride layer.

Additionally, the zirconium-oxide-based composite layer can have a high temperature of crystallization in comparison with a uniform zirconium oxide layer. Thus, generation of a leakage current through a crystallized portion can be reduced or suppressed, and a device having a uniform threshold voltage along a channel length can be obtained. Further, a temperature margin of a thermal process performed after forming the zirconium carbo-oxynitride layer can be raised.