Communication system including a digital roll-off filter

A transversal type digital roll-off filter receiving a signal n-time sampled from analog signal carrying a pulse train of symbol rate T, includes a transversal type delay line including a plurality of delay elements each having a delay time T/n. Nodes are positioned between adjacent two delay elements. The filter further includes a memory for providing first tap rating ratios to control signals of the nodes and a calculation circuit for monitoring pulse forms of the output signal of the filter, and calculating second ratios to additionally control a central node and every n-th node counted from the central node, where the second ratios are calculated to make the output pulse good in shape. The filter acts as a roll-off filter and as an automatic equalizer. In a method of diagnosing the circuits in the above system, a memory in a transmitter further has second tap rating ratios used to diagnose the system, where the first and second ratios are switchably output to a digital filter in the transmitter. The second tap rating ratios allow the first filter itself alone to output good-shape pulses. The method includes the steps of switching the first memory to output the second ratios and comparing an eye diagram with a reference level, at a point after the first filter, to determine a cause of deteriorating the pulse forms.

TECHNICAL FIELD 
This invention relates to a communication system employing a digital 
roll-off filter. 
BACKGROUND ART 
A quadrature amplitude modulation, referred to hereinafter as QAM, has been 
increasingly employed in a multi-channel digital communication system due 
to its high efficiency capability. Concept of a system configuration of a 
typical QAM communication system is schematically illustrated in FIG. 1. 
Explanation will be given hereinafter representatively with the I channel 
because the circuit configurations of I and Q channels are symmetrical 
with each other. In a transmitting station, an internal frequency band 
(referred to hereinafter as IF) or a base band (both referred hereinafter 
to representatively as IF) of an I channel and a Q channel are input to 
input terminals of first digital roll-off filters 102ai and 102aq, 
respectively. Circuit configuration of roll-off filters will be described 
later in detail. Frequency characteristics of the first roll-off filters 
are determined by the tap rating ratios stored in a first read-only 
memory, referred to hereinafter as a ROM, 113. 
Output of first roll-off filter 102ai is input to a digital-to-analog 
(referred to hereinafter as D/A) converter 131i. Unnecessary higher 
frequency spectrum generated in the output of D/A converter 131i is 
eliminated by a low-pass filter 132i. Outputs from low-pass filters 132i 
and 132q respectively of the I channel and Q channel are input to a QAM 
modulator 134, to which an carrier frequency signal is also input from an 
carrier generator 133. A QAM modulated radio frequency signal transmitted 
via a radio frequency amplifier (not shown in the figure) to a receiving 
station. 
In the receiving station, a preamplifier (not shown in the figure) 
amplifies and converts the received radio frequency signal to an IF 
signal, which is then input to a QAM demodulator 154, to which a local 
frequency signal is input from a local frequency oscillator 156. I channel 
and Q channel signals output from QAM demodulator 154 is input via a 
low-pass filter 152i to an analog-to-digital (referred to hereinafter as 
A/D) converter 151i. Each bit line of a parallel digital signal output 
from A/D converter 151i is input to a second roll-off filter 102bi. 
Frequency transmission characteristic of second roll-off filter 102bi is 
determined by tap rating ratios stored in, and output from, a ROM 6-1. 
Frequency characteristics of the first and second roll-off filters are 
chosen such that overall transmission characteristics, i.e. a total of the 
frequency characteristics of the two filters in each channel, allow the 
second roll-off filter to output signal pulses in an adequately good shape 
which causes no intermodulation in the QAM-modulated signals, as well as 
to eliminate unnecessary upper frequency spectrum generated from the 
circuits, such as D/A converter, etc. 
Even though the overall frequency characteristics that are the sum of both 
the first and second roll-off filters are set so that the pulse form at 
the output at second roll-off filter is in a good shape, fading or some 
other factors in the transmission system always varies the transmission 
characteristics, such as frequency vs amplitude, or frequency vs 
phase-delay, which accordingly deteriorate the pulse forms output from the 
second roll-off filter. 
In order to remedy this deterioration an automatic equalizer 160i is 
provided at the output of the second roll-off filter 102bi. Output of 
second roll-off filter 102bi is input via a pulse divider 146i, which 
returns the signal to have the symbol rate, to a first input terminal of 
automatic equalizer 160i. Moreover, an output of roll-off filter 102bq of 
Q channel is input to a second input terminal of automatic equalizer 160i 
of the I channel. Symmetrically the same cross-connection is done in the Q 
channel. 
Automatic equalizers are formed of roll-off filter, the frequency 
characteristics of which are variably determined by tap rating ratios 
given from a calculating circuit 7. Calculating circuit 7 is formed of a 
micro computer system which monitors the pulse formed of the signal output 
from the automatic equalizer 160i and calculates optimum values of the 
factors so that pulse form of the signal output therefrom is 
satisfactorily in a good shape. 
The output signal is also input to an carrier regeneration circuit 155, the 
output of which is fed back to control local oscillator 156. 
A problem of this circuit configuration is that the provision of the 
automatic equalizer causes a cost increase in manufacturing the receiving 
station. 
A more important problem is that, when the frequency characteristics are 
deteriorated by some elements located after the first roll-off filter and 
the element which caused deterioration must be urgently removed, it is 
impossible to locate that element by checking eye patterns of the 
waveforms at check points A1, A2, A3, B3, B2, B1 and B0, each located 
after the first roll-off filter, without time-consuming manual operations. 
This is because, even in a normal state where the second roll-off filter 
is outputting satisfactory waveforms the waveforms in the stages between 
the two roll-off filters are not in a good shape viewed in the eye 
diagram. 
DISCLOSURE OF THE INVENTION 
It is a general abject of the invention to provide a digital roll-off 
filter additionally having a function of an automatic equalizer, and a 
method of locating a cause of deterioration of a frequency characteristic 
of the transmission line employing the digital roll-off filter. 
A transversal type digital roll-off filter receiving a single bit line of a 
parallel digital signal sampled n times from an analog signal carrying a 
pulse train having a pulse spacing T, comprises a transversal type delay 
line having an even number of delay elements each having a delay time T/n; 
nodes positioned between adjacent two delay elements; a memory device for 
providing first tap rating ratios of control signals of the nodes, 
respectively; and a calculation circuit for monitoring pulse forms of an 
output signal of the roll-off filter, and calculating second tap rating 
ratios to additionally control a central one of the nodes and every n-th 
nodes counted from the central node, where the second tap rating ratios 
are calculated so as to be optimum to make the output pulse forms good in 
shape. Thus, the delay line acts as a roll-off filter whose frequency 
characteristic is determined by the first tap rating ratios and acts as an 
automatic equalizer whose frequency characteristic is variably controlled 
by the second tap rating ratios. 
In a method of diagnosing electronic circuits used in the above 
communication System, the first memory device further comprises a second 
kind of tap rating ratios to be used to diagnose the system, where the 
first and second tap rating ratios are switchably output to the first 
roll-off filter. A second memory device is provided, comprises a third 
kind of tap rating ratio is to be used for diagnosing the system. The 
second kind; tap rating ratios allow the first roll-off filter itself 
alone to output satisfactorily good pulse shape at its output terminal, 
and the third kind of tap rating ratios allow the second roll-off filter 
to have a flat frequency characteristic. The method of diagnosing the 
system comprises the steps of switching a first memory device so as to 
output second kind tap rating ratios; and comparing a width or a height of 
an eye in an eye diagram with a predetermined reference level, at a check 
point provided at a circuit located after the first roll-off filter, so as 
to detect a location of a cause of deterioration of the pulse forms. 
The above-mentioned features and advantages of the present invention, 
together with other objects and advantages, which will become apparent, 
will be more fully described hereinafter, with references being made to 
the accompanying drawings which form a part of the application, wherein 
like numerals refer to like parts throughout.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS OF THE INVENTION 
A first preferred embodiment of the present invention is hereinafter 
described referring to FIG. 2 showing a principal part of a transmitter 
and FIG. 3 showing a principal part of a receiver. Same or like parts are 
denoted by corresponding reference numerals throughout the figures. 
The input to the transmitting station is formed by digital signals, for 
example a base band, of an I channel and a Q channel, orthogonal with each 
other, which are parallel digital signals, for example of eight bits, 
having a symbol rate T. Detailed description of the circuit configuration 
will be hereinafter given representatively for I channel only. 
Each bit line of the input signal is connected to an input terminal of each 
of delay lines 42i of eight, in this case, first digital roll-off filters 
102ai. Only one of the delay lines is representatively drawn for each 
channel in FIG. 3. Circuit configuration of the roll-off filters will be 
described later in detail. 
Output of first roll-off filter 102ai is input to a D/A converter 131i. 
Unnecessary higher frequency spectrum included in the output of D/A 
converter 131i is eliminated by a low-pass filter 132i. Outputs from 
low-pass filters 132i and 132q respectively of the I channel and Q channel 
are input to a QAM modulator 134, to which an carrier frequency signal is 
also input from an carrier frequency oscillator 133. A QAM modulated radio 
frequency signal is transmitted via a radio frequency amplifier (not shown 
in the figure) to a receiving station. 
Each roll-off filter 102ai comprises a finite impulse response (referred to 
hereinafter as FIR) type transversal delay line 42i. FIR delay circuit 42i 
is formed of a series of as many as 2m, an even number for example 
fourteen, delay elements 42-D. Each delay element 42-D is formed of, for 
example, a flip-flop having a delay time T/n, where T also shows pulse 
spacing of the pulse train input thereto and "n" is the sampling number, 
in this example, two. A branch line branches out from each of 2m+1 nodes 
connecting adjacent two delay elements. Each branch line is serially 
provided with a multiplier 43i. Signals output to the branch lines are 
multiplied at respective multipliers 43i by first tap rating ratios 
.alpha..sub.m n- - - .alpha..sub.0 - - - .alpha..sub.-m output from a 
first memory device 113i, typically formed of a ROM (read-only memory). 
All of thus multiplied signals are summed by a first adder 145i. An output 
of first adder 145i, i.e. the sum, is the output of the first roll-off 
filter 102ai. Thus, FIR-type T/n delay line 42i, multipliers 43i, first 
memory device 113i and adder circuit 45i constitute the first digital 
roll-off filter 102ai. Frequency characteristic of first roll-off filter 
is determined by tap rating ratios .alpha..sub.m - - - .alpha..sub.0 - - - 
.alpha..sub.-m. 
The frequency characteristic of the first roll-off filter is such that the 
unnecessary upper frequency spectrum input thereto shown in FIG. 17(a) is 
eliminated, and moreover provides, together with the output of the second 
roll-off filter in the receiver station, a good output pulse shape, as 
will be explained later in detail. 
In the receiving station, a QAM modulated radio frequency signal received 
from the transmitter is pre-amplified as well as converted by a 
pre-amplifer and a frequency converter, each of which is not shown in the 
figure, to an IF signal. The IF signal is input to a demodulator 154 (FIG. 
3), to which a local frequency signal is also input from local frequency 
oscillator 156. An I channel signal output from demodulator 154 is input 
to an A/D converter 152i, where the analog input signal is sampled n 
times, in the figures n=2, so as to output a parallel digital signal of 
8-bit in this example. Unnecessary high frequency spectrum is eliminated 
by a low-pass-filter 151i (FIG. 3). Each bit line signal output frown 
low-pass-filter 151i is input to a second FIR type transversal delay line 
1 of second digital roll-off filter 110i. In the first preferred 
embodiment of the present invention, the second roll-off filter 110i acts 
as a roll-off filter plus an automatic equalizer. 
A delay line 1i shown in FIG. 3 is formed of a series of as many as 2m, an 
even number for example fourteen, delay elements 1-D. Each delay element 
1-D is formed of, for example, a flip-flop having a delay T/n, where T is 
the pulse spacing of the original pulse train and "n" is sampling number 
of A/D converter 151i. There are as many as 2m+1 nodes each between 
adjacent two delay elements 1-D and at both of the input and output 
terminals of the delay line. A branch line, which may be called a tap, 
branches out of each node. A second group 2-3 of branch lines and a third 
group 2-1 of branch lines branch out of the center node of delay line 1i 
and every n-th nodes counted from the center nod, totally as many as 2a+1, 
an odd number symmetric about the center node. Thus, the signals on the 
second and third branch lines are delayed by the period T from the 
adjacent branch lines. A fourth group 2-2 of branch lines branch out from 
all other nodes than those the second group and third group tap lines 2-3 
and 2-1 In the figures of the present and the subsequent preferred 
embodiments n is 2; accordingly, every two nodes are connected with the 
third group branch lines in the figure. If n=4, it is needless to say that 
every four nodes are connected with the second and third group branch 
lines. 
Each of second group branch lines 2-3 is serially provided with a 
multiplier of second group 3i. Each of third and fourth group branch lines 
2-1 and 2-2 is serially provided with a multiplier circuit of a third and 
fourth group 4i or 5i. Each of second group branch lines 2-3 is serially 
provided with a multiplier of second group 3i. Signals output to second 
group branch lines 2-3 are multiplied at a respective second multiplier 3i 
by respective second group tap rating ratio C', that are C.sub.q4' - - - 
C.sub.q0' - - - C.sub.q4', output from calculation circuit 7. Calculation 
circuit 7 will be explained later in detail. Signals output to third and 
fourth branch lines 2-1 and 2-2 are multiplied at respective multiplier 
circuits 4i and 5i by respective third and fourth group tap rating ratios 
.alpha.' and .alpha..sub.2 (.alpha.i.sub.5 - - - .alpha.i.sub.0 - - - 
.alpha..sub.-i5). Third tap rating ratios .alpha.' are of the 
below-described modifications of the outputs .alpha.1 from a second memory 
device 6 typically formed of a ROM. Between each of the third group 
multipliers 4i and a second memory device 6i is provided a second adder 
8i, where a sixth group tap rating ratio .alpha.1 output from second 
memory device 6i is added with a fifth group tap rating ratio C' output 
from a calculation circuit 7 so as to output a modified second group tap 
rating ratio .alpha.'. Thus multiplied signals output from third and 
fourth group multipliers 4i and 5i are input to, and summed by, a third 
adder 9i. 
Thus multiplied signals output from second group multipliers 3i are input 
to a corresponding third adder circuit 9q of the Q channel. Symmetrically 
in the same way, third adder 9i of the I channel is input with the outputs 
of corresponding second group multipliers 3q of Q channel. Accordingly, 
the sum of the multiplied signals from the third and fourth group 
multipliers 4i and 5i of the I channel and the multiplied signals from the 
corresponding second group multipliers 3q of the Q channel are output from 
the third adder 9i of the I channel. A digital output of third adder 9i is 
divided by n by a divider 10i so as to have the symbol rate. An output of 
the pulse divider 10i is the output on a single bit line of the roll-off 
filter of the invention. The output is input to calculation circuit 7i. 
The output is also input to an carrier regeneration (CR) circuit 155, an 
output of which is fed back to control local oscillator 156. 
When the automatic equalizer is not operated, the second and fifth group 
tap rating ratio C' and C, each being output from the respective 
calculation circuit 7, are kept zero. Then, frequency characteristics of 
the second roll-off filter are determined by fourth and sixth group tap 
rating ratios .alpha.1 and .alpha.2, which are all of fixed values. 
Frequency characteristics of the first roll-off filter in the transmitter 
station and the second roll-off filter in the receiving station are chosen 
such that the overall frequency characteristics of the two roll-off 
filters allow the signal pulse output from the second roll-off filter 
without the use of an automatic equalizer function, to be in a 
satisfactorily good shape so that no intermodulation would take place 
between the QAM-modulated signals. With this condition the tap rating 
ratios are fixed and stored in both of first and second memory devices 113 
and 6, respectively in the transmitter and in the receiver 
When the automatic equalizer is in operation calculation circuit 7 monitors 
the pulse form output from divider 10 and calculates most optimum value of 
each of the second and fifth tap rating ratios C' and C. 
The internal circuit configuration of calculation circuit 7 is illustrated 
in FIG. 4. Calculation circuit 7 comprises a microprocessor (CPU) 210, a 
program ROM 220, a first interface circuit 230, a second interface circuit 
240, a RAM (random access memory) 250, and an accumulator 260. Processing 
program for the CPU 210 is stored in ROM 220. The procedure and an 
algorithm, i.e. the process programs, stored in ROM 220 are transferred to 
RAM 250; the data of pulse form input via first interface circuit 230 is 
compared with a predetermined reference level data; the optimum tap rating 
ratios to shape the pulse form are calculated according to the comparison 
result; and the optimum tap rating ratios C and C' are output via second 
interface circuit 240 to second adders 8 and second group multipliers 3. 
The algorithm is similar to those have been generally employed in the 
transversal filter type automatic equalizer. 
The tap rating ratio to be input to an i-th branch multiplier is given as 
follows: 
EQU Ci=.intg.D(t).sym.E(t) dt 
where m is the node number counted from the center node; 
D(t) is a polarity value of the I and Q channel, respectively; 
E(t) is an error bit (at one bit lower than data bit); 
t is time in each symbol time; and 
.sym. is an exclusive OR. 
The tap rating ratios Ci output from calculation circuit 7, shown in FIG. 4 
are typically obtained with an accumulator circuit 260 shown in FIG. 6. 
The first bit indicating its polarity is input from the output of the 
second roll-off filter 110i to a delay line 20a formed of as many as 2a 
delay elements each having a delay T. The bit indicating an error 
(typically a second bit for 4PSK or a third bit for 16QAM) is input to 
another delay line 21 formed of as many as "a" delay elements each having 
a delay T. An output of delay line 2i and an output from each node of 
delay line 20a are input to each exclusive-OR 22a, whose correlation 
values Si.sub.a, Si.sub.a-1, . . . Si.sub.0, . . . Si.sub.-a, are input to 
each of adders 23a. Each of outputs of adders 23a input to a delay circuit 
24a having a delay T, referred to hereinafter as a T-delay circuit) whose 
outputs Ci.sub.a, Ci.sub.a-1, . . . Ci.sub.0, . . . , Ci.sub.-a are 
returned to adder 23a, respectively. Thus, adder 23a and the T-delay 
circuit 24a locally form an accumulator 260. 
The calculation operation of the calculation circuit 7 is continuously 
repeated so as to meet the always changing transmission condition. 
Though calculation circuit 7 is drawn with a single block in FIG. 5 the 
content thereof includes four subsidiary calculation circuits, where a 
first subsidiary calculation circuit is input with the I channel output so 
as to output fifth group tap rating ratios C, i.e. Ci.sub.i - - - 
Ci.sub.-4, a second subsidiary calculation circuit is input with both the 
I and Q channel outputs so as to output second group tap rating ratios C', 
i.e. Ci'.sub.4 - - - Ci'.sub.-4, a third subsidiary calculation circuit is 
input with the Q channel output so as to output fifth group tap rating 
ratios Cq of the Q channel, i.e. Cq.sub.4 - - - Cq.sub.-4, and a fourth 
sub calculation circuit is input with the I and Q channel outputs so as to 
output second group tap rating ratios C'q of the Q channel, i.e. C'q.sub.4 
- - - C'q.sub.-4. In FIG. 3, the first and second subsidiary calculation 
circuits are drawn as a single block 7i, and the third and fourth sub 
calculation circuits are drawn as a single block 7Q. This is similarly 
done in other figures. 
A second preferred embodiment of the present invention is schematically 
illustrated in FIG. 7, where second adder 8 is combined with the 
accumulator shown in FIG. 6, accordingly calculation circuit 7 is modified 
to be denoted with numeral 7'. Fifth group tap rating ratios, i.e. outputs 
Si.sub.a, Si.sub.a-1 . . . Si.sub.0, . . . Si.sub.-a from calculation 
circuit 7' are respectively input to adders 25i. Outputs of adders 25i are 
respectively input to a first input terminal of a selection circuit 26a. A 
second input terminal of selection circuit 26a is input with each of the 
sixth group tap rating ratios .alpha.1 (.alpha.i.sub.4, . . . 
.alpha.i.sub.0, . . . .alpha.i.sub.-4) output from memory device 6'. 
Output of each selection circuit 26a is input to a T-delay circuit 27a, 
whose output is returned to respective adder 25i. When selection circuit 
26a is reset with its reset terminal, the output of memory 6' is 
selectively output. When the reset is released, the accumulation operation 
starts. Then, the outputs .alpha.'(.alpha.i'.sub.4, . . . .alpha.i.sub.0, 
. . . .alpha.i'.sub.-4) of T-delay circuits 27a are the third group tap 
rating ratios .alpha.' described in the first preferred embodiment. Thus, 
in the second preferred embodiment the circuit configuration can be simple 
while the reset function is additionally provided. 
A third preferred embodiment of the present invention is schematically 
illustrated in FIG. 8, where only the portion of the second roll-off 
filter is drawn. As seen in the above preferred embodiments the tap rating 
ratios are generally symmetric about the center nodes. Moreover, the 
channel and the Q channel are symmetric with each other in principle. 
Accordingly, the fixed values, i.e. the fourth group tap rating ratios 
.alpha.2 (.alpha.i.sub.5, .alpha.i.sub.3, .alpha.i.sub.1) are employed 
commonly for the first half and the second half of the delay line about 
the center tap, as well as commonly for the I channel and Q channel. 
Consequently, the capacity of memory 6" can be reduced. Thus reduced state 
is shown in FIG. 9, where the marks * indicate the deletion of the memory 
outputs which existed in FIG. 5. 
A fourth preferred embodiment of the present invention is schematically 
illustrated in FIG. 10, where only the portion of the second roll-off 
filter is drawn. The fourth preferred embodiment is to further simplify 
the circuit configuration for the case where the distortions are equally 
generated in both I and Q channels, for example, the case where the input 
to the second roll-off filter is an IF signal. The sixth group tap rating 
ratios .alpha.1 (.alpha.i.sub.4, . . . .alpha.i.sub.0 . . . 
.alpha.i.sub.-4) and second group tap rating ratios C' (C'.sub.4, 
C'.sub.2, C'.sub.0) in the first preferred embodiment are used commonly 
for the I and Q channels. The fourth group tap rating ratios .alpha.2 
(.alpha.i.sub.5, . . . .alpha.i.sub.1 . . . .alpha.i.sub.-5) in the first 
preferred embodiment are used commonly for both the halves about the 
center node as well as both the I and Q channels. Consequently, the 
outputs of memory 6'" and calculation circuit 7' can be remarkably 
reduced. Thus reduced state is shown in FIG. 11, where the marks * 
indicate the deletion of the memory outputs which existed in FIG. 5. 
The quantity of the delay element 1-d in the delay line 1 is determined 
depending on the required characteristics as a roll-off filter. The 
quantity of the n-th branches 3 from the nodes of delay line 1 is 
determined depending on the required characteristics as the automatic 
equalizer. Accordingly, the quantity of the delay elements and the 
quantity of the n-th branches can be arbitrarily chosen as a design 
choice. The delay elements and the branches must be always symmetric about 
the center node. 
A fifth preferred embodiment of the present invention is hereinafter 
described referring to FIG. 12 where the cross connection, i.e. the input 
from the opposite channel, employed in the previous preferred embodiments 
is deleted. Accordingly, there is none of the second group multipliers 3, 
and the second group tap rating ratios C' output from calculation circuit. 
This circuit configuration is widely applicable to a system performing no 
orthogonal modulation therein. 
A sixth preferred embodiment of the present invention is hereinafter 
described referring to FIG. 13, where the third adder circuit 9" has been 
modified. A fourth adder 21i and 21q are additionally provided at each of 
the outputs of the roll-off filters of I Channel and Q channel of the 
previous preferred embodiments, respectively. Moreover, the signals output 
from the second group multipliers 3i of the I channel are input to the 
fourth adder 21q newly added to the Q channel, instead to third adder 9q. 
In the symmetrical way, the signals output from the second group 
multipliers 3q of the Q channel are input to the fourth adder 21i newly 
added to the I channel, instead to third adder 9q. Accordingly, third 
adder 9i sums only the outputs from third and fourth group adders 4i and 
5i of the I channel, i.e. own channel. Advantageous effect of this circuit 
configuration is in that the load of third adder 9 summing so many of the 
signals input thereto can be eased so as to accomplish a high speed 
operation. 
Hereinafter described are modifications of the structure of the second 
roll-off filter so as to further accomplish a higher speed operation. A 
seventh preferred embodiment of the present invention hereinafter 
described referring to FIG. 14. A third transversal type delay line 11 is 
formed of as many as 2 m (an even number, 2 m=10 in FIG. 14) delay 
elements 11-D, each having a delay time T/n, typically formed of a 
flip-flop having the delay time T/n. In FIG. 14 n is chosen two. Between 
the delay elements 11-D is provided an adder 12D of a fourth group. 
Between the input terminal of this roll-off filter and each of the fourth 
group adders 12D are provided multipliers 4-1 and 5-1 of a fifth and sixth 
group, which are the same as the third and fourth group multipliers 4 and 
5 of the previous preferred embodiments. Allocation of the fourth group 
adders and the fourth and fifth group multipliers are denoted with the 
suffixes of the previous preferred embodiments. The inputs to the third 
and fourth group multipliers 4 and 5 from the nodes of the previous 
preferred embodiments are replaced with the input to the roll-off filter; 
and outputs of the fifth and sixth multiplier circuits 4-1 and 5-1 are 
respectively input to the adders 12D of the fourth group. Input to the 
first delay element is from multiplier .alpha.i.sub.-5. At the output of 
the last delay element is provided an adders, 16D to which an output from 
the last multiplier circuit whose multiplication factor is .alpha.i.sub.5 
is input. Multiplication factors of the fifth and sixth multipliers are 
input from second memory device 6 and calculation circuit 7 in the same 
way as the previous preferred embodiments. Another input to each of the 
fifth group adder is an output of the adjacent delay element 11-D. Output 
of each of the fifth group adders is input to the next delay element. 
A fourth transversal type delay line 13 is formed of an odd numbers of 
delay elements 13-D each having a delay time T, typically formed of a 
flip-flop having the delay time T. 
Between the T delay elements 13-D is provided an adder 14 of a fifth group. 
Between the input terminal of the opposite Q channel roll-off filter and 
each of the fifth group adders 14i is provided each of multiplier 3-1 of a 
seventh group, which are the same as the second group multiplier 3 of the 
previous preferred embodiments. Allocation of the seventh group 
multipliers 3-1 are denoted with the suffixes of the second group 
multipliers of the previous preferred embodiments. The inputs to the 
seventh group multipliers 3-1 from the nodes of the previous preferred 
embodiments are replaced by the input to the roll-off filter of the 
opposite channel, i.e. of the Q channel and the outputs of the seventh 
group multipliers 3-1 are respectively input to the adders 14 of the fifth 
group. 
Multiplication factors to be input to the seventh group multipliers are of 
the same values (Ci'.sub.-4, . . . Ci'.sub.0, . . . Ci'.sub.-4) as the 
second group multipliers 3 output from the calculation circuit 7 of the 
previous preferred embodiments. Another input to each of the fifth group 
adders is an output of the adjacent delay element 13-D. Output of each of 
the fifth group adders is input to the opposite adjacent delay element. 
Input to the first delay element of the fourth delay line 13 is from a 
multiplier to which a multiplication factor C'i.sub.-5 is input. At the 
output of the last delay element of the fourth delay line is provided an 
adder 16 to which a tap rating ratio C'i.sub.5 is input from calculation 
circuit 7. Output of the last adder of the fifth group 14 is input to a 
delay circuit 15 having a delay time T/2, because n=2 in this preferred 
embodiment, so that the delay times of the third and the fourth delay 
lines can be co-phased. 
An output from the third delay line 11, i.e. the output from the last adder 
16, and an output from the fourth delay line 13, i.e. an output from the 
T/2 delay element 15, are summed by a sixth adder 17. A pulse train output 
from sixth adder 17 is divided by n in divider 18 so as to output a pulse 
train having the symbol rate. An output from the divider 18i is the output 
of the I channel roll-off filter also acting as an automatic equalizer, of 
the present invention. A symmetrical circuit configuration is provided for 
the Q channel, as well. 
A variation of the seventh preferred embodiment is shown in FIG. 15, as an 
eighth preferred embodiment. The output of the third transversal delay 
line 13, i.e. the output of the last one 16 of the fourth group adders is 
input to divider 18'. Output of the last adder of the fifth group 14 is 
input to a delay element 15' having a delay time T, so that the delay 
times of the third and the fourth delay lines are co-phased. An output of 
divider 18' and the output of the T delay element 15' are summed by an 
eighth adder 17'. An output from the eighth adder 17' is the output of the 
I channel roll-off filter also acting as an automatic equalizer of the 
present invention. 
Adder circuit 9 in the first to fifth preferred embodiments has to sum so 
many of the signals input thereto that a considerably large time must be 
consumed in this summing operation. Advantageous effect of the seventh and 
eighth preferred embodiments is in that the summing operation by adder 9 
is sequentially carried out by the distributed fourth and fifth adders. 
Accordingly, high speed operation can be accomplished. 
If the delay line of the seventh or eighth preferred embodiment is not 
employed, the transversal type automatic equalizer circuit 110i has to be 
placed serially after the second roll-off filter 102bi as was shown in 
FIG. 1. 
In the above preferred embodiment circuit configurations, the delay time 
spent in passing through the roll-off filter/automatic equalizer of the 
present invention is much less than the delay time spent in passing 
through the serial connection of the second roll-off filter and the 
automatic equalizer. This is because the delay time to be spent is 
proportional to the quantity of the serially arranged delay elements 
through which the signal passes. Thus shortened delay time contributes to 
solve the problem in that the long delay time in the filter and equalizer 
deteriorates the effect of the feedback of the carrier regeneration 
circuit 56 via local frequency oscillator 156 to orthogonal demodulator 
154. 
Moreover, it is apparent that the circuit configuration in the first to 
fourth preferred embodiments, having less number of delay element, is much 
simpler, consequently its production cost is less expensive, than the 
prior art configuration shown in FIG. 1. 
An ninth preferred embodiment of the present invention is hereinafter 
described referring to FIG. 16 which is also an abstract summary of the 
above seven preferred embodiments except below-describe additional feature 
of two ROMs 113-1 and 6-6, each for determining the frequency 
characteristics of the first and second roll-off filters 102a and 110. The 
same numerals denote the same as FIG. 1 and FIG. 3. 
As described earlier the frequency characteristics of the roll-off filters 
are set in advance so that overall frequency characteristics excluding the 
automatic equalizer function provides at the output of the second roll-off 
filter such satisfactory pulse forms that no intermodulation takes place 
between the signals cart led on the QAM modulated wave. 
In the ninth preferred embodiment according to the present invention first 
ROM 113-1 stores at its different addresses two kinds of the tap rating 
ratios, first kind of which is used for the usual operation as described 
in connection with the previous preferred embodiments, and the second kind 
of which is to make the first roll-off filter itself have the above 
mentioned overall frequency characteristics as illustrated in FIG. 17(b), 
where the overall frequency preferred characteristics have been shared by 
50/50 by the first roll-off filter and the second roll-off 
filter/equalizer in the previous preferred embodiments. It is seen in FIG. 
17(c) the high frequency spectrum within the pass-band of the output 
signal from the first roll-off filter is enhanced. The second ROM 6-1 in 
the receiving station has the usual tap rating ratios to be used for the 
usual operation described in the previous preferred embodiment, and 
additionally the second kind ones to make the second roll-off 
filter/equalizer 110i have a flat frequency characteristic, referred to 
hereinafter as transparent. The tap rating ratios to make the transparent 
frequency characteristics in the second roll-off filter/equalizer 110i are 
typically such that only the tap rating ratios input to the central 
multiplier .alpha.0 and C0 are 1 while all other tap rating ratios are set 
zero. The frequency characteristics taken by each of the roll-off filters 
will be explained later in detail referring to FIGS. 17. 
The first and second kinds of the tap rating ratios are switchable to 
output from the first ROM 113-1 and second ROM 6-1, respectively, by an 
address switch signal ADR. With the second kind tap rating ratio input to 
the first roll-off filter, the pulse forms after the output of the first 
roll-off filter 102ai, i.e. at the check points A1 at the output of the 
first roll-off filter 102ai, A2 at the output of D/A converter 131i, A3 at 
the output of first low-pass filter 132i, B3 at the output of demodulator 
154i, B2 at the output of second low-pass filter, B1 at the output of A/D 
converter 151i, and B0 at the output of second roll-off filter 110i, 
should be of a good shape, unless some cause deteriorates the transmission 
characteristics. 
Pulse forms at the check points of the digital signals can be checked by 
viewing an eye diagram on an oscilloscope. An ideal eye diagram of 
sequential pulses observed on the oscilloscope is shown with solid lines 
in FIG. 18(a). If the frequency characteristics is such as to cut high 
frequency spectrum, the pulse transition exhibits a slope as shown with 
the dotted line on the left hand side of FIG. 18(a). If jitter takes 
place, the transitions are dispersed as shown with dotted line on the 
right hand side of FIG. 18(a). Accordingly, each of the two causes 
decreases the area of the blank portion, i.e. the eye, in the eye diagram 
as seen in FIG. 18(b) showing a practical eye diagram. By checking the eye 
patterns at the check points the cause which has deteriorated the 
frequency characteristics can be located. 
The eye diagram can be observed not only with human eyes via oscilloscope, 
but also with an electronic means, such as a micro processor. As shown in 
FIG. 19(a) the micro processor 67 may have in its ROM 62 a reference level 
with which the value measured on the eye diagram in the oscilloscope 61 is 
compared so as to detect the cause, i.e. the defect of the circuit. When 
the comparison result indicates that the eye diagram does not meet the 
reference level the micro processor outputs an alarm signal. FIGS. 19(b) 
and (c) show wired logic for detecting the deterioration. In FIG. 19(b) an 
analog signal input from the check points A2, A3, B3 or B2 is converted to 
a digital signal by an A/D converter 63. In this digital signal two error 
bits, for example D3 and D4, which are located just below data bits D0 - - 
- D2, in the case of 64QAM, are input to an exclusive-OR gate 64. The two 
error bits are averaged by exclusive-OR gate 64 and a low-pass filter 65. 
Thus averaged output for low-pass filter 65 is compared with a reference 
level by a comparator 66. When the averaged level exceeds the reference 
level the comparator outputs an alarm signal In FIG. 19(c) a digital 
signal input from the check points A1 or B1 is averaged and processed in 
the same way by the exclusive-OR 64 and low-pass filter 65 of FIG. 15(b). 
Thus, the cause, such as a defect in the electronic circuit, can be easily 
and quickly located. Without this method of the present invention it is 
normal for the eye patterns to be deformed, i.e. not adequately open or 
wide, at those check points even if no defect is in the electronic 
circuit, because the first roll-off filter itself alone does not provide 
in the usual operation the full frequency characteristics which provides 
the good shape of the pulse forms. 
A tenth preferred embodiment of the present invention is hereinafter 
described, which is a variation of the eighth preferred embodiment. The 
first and second ROMs 113-1 and 6-1 are additionally provided with a third 
kind of the tap rating ratios. The third kind of the tap rating ratios are 
such that provide the first roll-off filter with less roll-off ratio, for 
example 30%, compared with 50% of the ninth preferred embodiment. At this 
time, the second roll-off filter/equalizer 110i is kept transparent in the 
same way as the ninth preferred embodiment. 
With thus reduced roll-off factor, the eye diagram at the check points 
completely open in the vertical direction, however, the width in the 
horizontal direction becomes narrower. Thus narrowed eye diagram 
emphasizes the phenomena caused from the characteristics deterioration, 
accordingly allows easier and more accurate detection of the defect. 
Though the checking method of the present invention explained above with 
reference to the eighth and ninth preferred embodiments recites the 
circuit configuration of the first to eighth and ninth preferred 
embodiments having the second roll-off filter/automatic equalizer 110i, it 
is apparent that this checking method may be applied to the circuit 
configuration where the automatic equalizer is provided independently 
from, and serially to, the second roll-off filter as shown in FIG. 1. 
The many features and advantages of the invention are apparent from the 
detailed specification and thus, it is intended by the appended claims to 
cover all such features and advantages of the methods which fall within 
the true spirit and scope of the invention. Further, since numerous 
modifications and changes will readily occur to those skilled in the art, 
it is not detailed to limit the invention and accordingly, all suitable 
modifications are equivalents may be resorted to, falling within the scope 
of the invention.