Stepwise drivers for DC/DC converters

Stepwise drivers for DC/DC converters are described herein. In one embodiment, a stepwise driver is provided to charge or discharge a gate capacitance of a power switch of a DC/DC converter. In a particular embodiment, a stepwise driver example includes multiple switching elements to sequentially switch to charge a gate capacitance of a power switch of a DC/DC converter from a first voltage to a second voltage in multiple steps. Other methods and apparatuses are also described.

FIELD

Embodiments of the invention relate to DC/DC converters; and more specifically, to stepwise drivers for DC/DC converters.

BACKGROUND

Direct current to direct current (DC/DC) converters provide the capability to convert energy supplied by a power supply from one voltage and current level to another voltage and current level. Such circuits are widely employed in conjunction with computing platforms, such as personal computers, server nodes, laptop computers, and a variety of other computing systems. Such circuits are desirable because specifications for a processor typically employ lower voltages, such as 0.5 to 5 volts, and higher currents; such as, reaching 50 to over 100 amps, that may change over a relatively wide range with a relatively high slew rate.

DC/DC converters are desirable for providing voltage regulation under these conditions for a variety of reasons. One reason is because such circuitry may be placed relatively close to the board components, resulting in the capability to provide low local voltage tolerances due to higher switching frequencies, single output topology, and a reduction in resistance from shorter electrical connections.

Currently, power switches are driven by simple drivers which correspond to 1-step drivers. To save power in off-chip DC/DC converters, L-C resonant techniques have been used to charge capacitance via an inductor instead of a resistor. However, such techniques require an inductor that may occupy extra space and increase manufacturing cost. In addition, there is a need for high-frequency off-chip DC/DC converters in order to improve transient response when powering a microprocessor. There is also a need for a fully integrated high-frequency DC/DC converter in order to further improve transient response and reduce size.

DETAILED DESCRIPTION

Stepwise drivers for DC/DC converters are described herein. In one embodiment, a stepwise driver is used to charge gate capacitance of the power MOSFETs (metal oxide semiconductor field effect transistors) in a switching DC/DC converter, thereby reducing the switching loss; for example, ranging by approximately 30-50%, dependent upon the operating conditions and topology. In theory, the switching loss can be reduced to almost zero by using stepwise drivers with very large number of steps. Reduction of switching loss is important for increasing switching frequency of an off-chip or on-chip DC/DC converter, reduction of size of passive components and improvement of transient response.

In the following description, numerous specific details are set forth (e.g., such as logic resource partitioning/sharing/duplication implementations, types and interrelationships of system components, and logic partitioning/integration choices). However, it is understood that embodiments of the invention may be practiced without these specific details. In other instances, well-known circuits, software instruction sequences, structures and techniques have not been shown in detail in order not to obscure the understanding of this description.

In the following description and claims, the terms “coupled” and “connected,” along with their derivatives may be used. It should be understood that these terms are not intended as synonyms for each other. Rather, in particular embodiments, “connected” may be used to indicate that two or more elements are in direct contact with each other (e.g., physically, electrically, optically, etc.). “Coupled” may mean that two or more elements are in direct contact (physically, electrically, optically, etc.). However, “coupled” may also mean that two or more elements are not in direct contact with each other, but yet still co-operate or interact with each other.

FIG. 1is a block diagram illustrating a DC/DC converter having a stepwise driver according to one embodiment. The DC/DC converter example100may be, for example, a buck converter, a CUK converter, a flyback converter, a forward converter, or other types of DC/DC converters. In one embodiment, the DC/DC converter example100includes a controller circuit101, a stepwise pulse generator102, one or more stepwise drivers103, one or more power switches104, an output circuit105, a feedback circuit106, and an optional external feedback circuit107.

In one embodiment, the controller circuit101receives input DC voltage and generates a clock signal having an appropriate duty cycle to enable output circuit105to provide a predetermined output voltage. In response to the clock signal received from the controller circuit, the stepwise pulse generator102may generate multiple signals having stepwise pulses. In one embodiment, each of the multiple signals includes a pulse that is not overlapped with the rest of the signals.

In one embodiment, at least one of the one or more stepwise drivers103may include multiple switching elements. Each of the switching elements may be coupled to one of the stepwise pulse signal received from the stepwise pulse generator102. In response to the multiple pulse signals, according to one embodiment, the multiple switching elements of a stepwise driver103may sequentially switch to charge a gate capacitance of a power switch104from a first voltage to a second voltage in multiple steps. That is, contrary to a conventional DC/DC converter, the gate capacitance of the power switch104may be charged to at least one intermediate voltage between the first and second voltages, before being charged to the second voltage within a charging cycle of a switching cycle of the DC/DC converter. Similarly, in response to the stepwise pulse signals, the multiple switching elements of the stepwise driver103sequentially switch in a reversed order to discharge the gate capacitance of the power switch104during a discharge phase of the switching cycle of the DC/DC converter.

Output circuit105may include a rectifier and/or a filtering circuit. Feedback circuit106may be used to provide output information to the controller circuit101to allow the controller circuit101to adjust; for example, the duty cycle of a next switching cycle of the converter. Optionally, the external feedback circuit107may be used to provide further feedback information from a device external to the converter; for example, a microprocessor of a computer system. Other components may also be included.

FIG. 2is a block diagram illustrating a stepwise driver for a DC/DC converter according to one embodiment. The stepwise driver200may be implemented as an example of stepwise driver103of the DC/DC converter100shown inFIG. 1. In one embodiment, the stepwise driver example200includes, but is not limited to, multiple switching elements to sequentially switch to charge a gate capacitance of a power switch of a DC/DC converter from a first voltage to a second voltage in multiple steps.

The switching energy consumed for resistive charging and discharging of capacitance CLequals E=CLΔV2, where ΔV is the voltage swing. If a single transition of ΔV can be divided into N transitions, each of ΔV/N, then the total energy would be reduced N times as given by EN=N×CL(ΔV/N)2=E/N. A purpose of an N-step stepwise driver is to charge and discharge capacitance CLin N steps rather than a single step. The driver makes use of N+1 voltage rails V0< . . . <VNand N+1 control signals A0. . . AN. The step sizes are given by the voltage differences among the rails V0. . . VN.

FIG. 3is a block diagram illustrating a stepwise driver for a DC/DC converter according to one embodiment. The stepwise driver300may be implemented as an example of stepwise driver200ofFIG. 2or stepwise driver103ofFIG. 1. Referring toFIG. 3, in this embodiment, generic switches301-304may be used to successively charge a gate capacitance CLof a power switch from V0to V1, . . . to VNby successively turning on switches301-304connected to A0. . . AN. Discharging is performed by activating the switches301-304in a reverse order. In one embodiment, at most one switch is turned on at any time.

For example, referring toFIG. 3, initially, switch301is on in response to control signal A0, which charges the gate capacitance CLto V0. Subsequently, after CLhas been charged to V0, switch302is on while turning off switch301. As a result, CLhas been charged from V0to V1. Similarly, the CLis charged eventually to VNwithin a single switching cycle of a DC/DC converter, by sequentially turning on switches from switch301to switch304, where only one of the switches301-304is turned on at a given time.

During a discharge phase of the switching cycle, the gate capacitance CLwill be discharged in multiple steps from VNto V0. Specifically, the switches301-304are turned on sequentially in a reversed order (e.g., from switch304to switch301) to allow the gate capacitance CLto be discharged in multiple steps.

FIG. 4Ais a block diagram illustrating a stepwise driver of a DC/DC converter according to another embodiment. For example, stepwise driver400may be implemented as an example of stepwise driver200ofFIG. 2. In this embodiment, for the purposes of illustration, the stepwise driver example400is a 3-step driver, where an n-channel field effect transistor (nFET) may be used as a switching element. More or less steps may be implemented within a stepwise driver. In one embodiment, since this is a 3-step driver, the stepwise driver400includes four nFETs401-404coupled to and controlled by control signals A0to A3. In one embodiment, the nFETs401-404may sequentially switch in response to control signals A0to A3respectively to charge or discharge a gate capacitance CLfrom a first voltage V0to a second voltage V3in multiple steps via intermediate voltages V1and V2, where voltages V0to V3are supplied by multiple supply rails.FIG. 4Bis a timing diagram illustrating timing of the sequential switching by the switching elements ofFIG. 4Aaccording to one embodiment.

Specifically, referring toFIG. 4A, the sources of the nFETs401-404are coupled to each other to form a node405. Node405may be coupled to a gate of a power switch of a DC/DC converter, where the gate of the power switch may include capacitance CL. The gates of the nFETs401-404may be coupled to an input circuit to receive the control signals A0to A3respectively. The drains of the nFETs401-404are coupled to multiple supply rails to receive voltages V0to V3, respectively.

Referring toFIGS. 4A and 4B, initially, during a charge phase of a switching cycle of a DC/DC converter, control signal A0is asserted while other control signals A1to A3are de-asserted. In this embodiment, a control signal is asserted when it is at a logical high level and is de-asserted when it is at a logical low level. As a result, nFET401is turned on while nFETs402-404are turned off. Node405is charged to a voltage substantially equivalent to V0, which is fed to node405via the turned-on nFET401.

Subsequently and sequentially, control signal A1is asserted while control signals A0and A2-A3are de-asserted. As a result, nFET402is turned on while the rest of nFETs401and403-404are turned off by the control signals A0and A2-A3respectively. Thus, node405is charged from V0to a voltage substantially equivalent to V1, which is fed to node405via the turned-on nFET402during the respective charge step. Similarly, the node405may be charged from V1to V2and from V2to V3, etc. by sequentially turning on nFETs403and404.

During a discharge phase of a switching cycle of a DC/DC converter, according to one embodiment, control signals. A0to A3are sequentially asserted in a reversed order with respect to those during the charge phase. As a result, nFETs401to404are sequentially turned on in a reversed order with respect to those during the charge phase. Thus, node405is discharged from V3to V2, from V2to V1, and from V1to V0in multiple discharge steps.

Referring toFIG. 4B, according to one embodiment, during the charge and discharge phases of a switching cycle, for equal step sizes, the total charge to the intermediate voltages (e.g., V1and V2) are substantially zero. As a result, the intermediate rails supplying V1and V2may not require to couple to a power supply. Rather, an AC (alternating current) coupling device, for example, a capacitor, may be used to couple the intermediate rails to one of the rails supplying V0and V3, similar to configuration example700ofFIG. 7. The size and characteristics of the AC coupling device may be selected to suppress the excessive fluctuations of the intermediate rails.

Specifically, when CLis discharged during a discharge phase of the switching cycle, the AC coupling devices coupled to the intermediate rails may be charged using the energy discharged from the CL. The energy stored in the AC coupling devices may be used to charge CLin a next charge phase of a next switching cycle of a DC/DC converter. As a result, a power supply for the intermediate rails may not be needed and the power consumed may be further reduced.

FIG. 5Ais a block diagram illustrating a stepwise driver of a DC/DC converter according to another embodiment. For example, stepwise driver500may be implemented as an example of stepwise driver200ofFIG. 2. In this embodiment, similar to stepwise driver example400ofFIG. 4, the stepwise driver example500is a 3-step driver. More or less steps may be implemented within a stepwise driver. In one embodiment, in addition to an nFET being a switching element, a p-channel FET (pFET) may also be used as a switching element. In one embodiment, the stepwise driver500includes two nFETs501-502and two pFETs503-504coupled to and controlled by control signals A0to A3. In one embodiment, the FETs501-504may sequentially switch in response to control signals A0to A3; respectively, to charge or discharge a gate capacitance CLfrom a first voltage V0to a second voltage V3in multiple steps via intermediate voltages V1and V2, where voltages V0to V3are supplied by multiple supply rails.FIG. 5Bis a timing diagram illustrating timing of the sequential switching by the switching elements ofFIG. 5Aaccording to one embodiment.

Specifically, referring toFIG. 5A, the sources of the FETs501-504are coupled to each other to form a node505. Node505may be coupled to a gate of a power switch of a DC/DC converter, where the gate of the power switch may include capacitance CL. The gates of the FETs501-504may be coupled to an input circuit to receive the control signals A0to A3respectively. The drains of the FETs501-504are coupled to multiple supply rails to receive voltages V0to V3respectively.

Referring toFIGS. 5A and 5B, initially, during a charge phase of a switching cycle of a DC/DC converter, control signal A0is asserted while other control signals A1to A3are de-asserted. In this embodiment, control signals A0, A1are asserted when at a logical high level and de-asserted when at a logical low level. In this embodiment, control signals A2, A3are asserted when at a logical low level and de-asserted when at a logical high level. As a result, nFET501is turned on while FETs502-504are turned off. Node505is charged to a voltage substantially equivalent to V0, which is fed to node505via the turned-on nFET501.

Subsequently and sequentially, control signal A1is asserted while control signals A0and A2-A3are de-asserted. As a result, nFET502is turned on while the rest of nFET501and pFETs503-504are turned off by the control signals A0and A2-A3respectively. Thus, node505is charged from V0to a voltage substantially equivalent to V1, which is fed to node505via the turned-on nFET502during the respective charge step. Similarly, the node505may be charged from V1to V2and from V2to V3, etc. by sequentially turning on pFETs503and504. However, since FETs503and504are pFETs, the corresponding control signals A2and A3are asserted by pulling the signals to a logical low level in order to turn pFETs503and504on, as shown inFIG. 5B. Note that the types of the FETs may be selected dependent upon a particular application in order to minimize power consumption, area of the switches, and/or transition time, etc.

During a discharge phase of a switching cycle of a DC/DC converter, according to one embodiment, control signals A0to A3are sequentially asserted in a reversed order with respect to those during the charge phase. As a result, nFETs501-502and pFETs503-504are sequentially turned on in a reversed order with respect to those during the charge phase. Thus, node505is discharged from V3to V2, from V2to V1, and from V1to V0in multiple discharge steps.

Referring toFIG. 5B, according to one embodiment, during the charge and discharge phases of a switching cycle, for equal step sizes, the total charge to the intermediate voltages (e.g., V1and V2) are substantially zero. As a result, the intermediate rails supplying V1and V2may not require to couple to a power supply. Rather, an AC (alternate current) coupling device, for example, a capacitor, may be used to couple the intermediate rails to one of the rails supplying V0and V3, similar to configuration example700ofFIG. 7. The size and characteristics of the AC coupling device may be selected to suppress the excessive fluctuations of the intermediate rails.

Specifically, when CLis discharged during a discharge phase of the switching cycle, the AC coupling devices coupled to the intermediate rails may be charged using the energy discharged from the CL. The energy stored in the AC coupling devices may be used to charge CLin a next charge phase of a next switching cycle of a DC/DC converter. As a result, a power supply for the intermediate rails may not needed and the power consumed may be further reduced. Note that the switching elements are not limited to an FET or a pFET. Other types of components or devices may be used as a switching element in a stepwise driver for a DC/DC converter.

FIG. 6is a block diagram of a DC/DC converter according to one embodiment. For example, the DC/DC converter example600may be implemented as an example of the DC/DC converter100ofFIG. 1. In one embodiment, the DC/DC converter example600includes, but is not limited to, a power switch, and a driver circuit coupled to the power switch, the driver circuit including a plurality of switching elements to sequentially switch to charge a gate capacitance of the power switch from a first voltage to a second voltage in a plurality of steps.

Referring toFIG. 6, the DC/DC converter example600include one or more stepwise drivers601-602to drive one or more power switches603. In this embodiment, for the purposes of illustration, two stepwise drivers are used to drive two power switches. However, they are not so limited. More or less stepwise drivers may be implemented to drive more or less power switches of a DC/DC converter. In addition, any one of the stepwise drivers601and602may be implemented as an example of any stepwise driver shown inFIGS. 2,3,4A, and5A as described above. Furthermore, for the purposes of illustration, stepwise drivers601and602are illustrated as N-step drivers. It is important to know that N may represent any number that is greater than one. In one embodiment, each or some of the stepwise drivers are controlled by independent control signals (e.g., A0-ANand A′0-A′N) and power from separate voltage rails (e.g., V0-VNand V′0-V′N). Alternatively, some or all of the voltage rails may be shared among the stepwise drivers. Other configurations may exist.

FIG. 7is a block diagram of a DC/DC converter according to another embodiment. For example, the DC/DC converter example700may be implemented as an example of the DC/DC converter100ofFIG. 1and/or the DC/DC converter600ofFIG. 6. Similar to DC/DC converter example600ofFIG. 6, the DC/DC converter example700includes one or more stepwise drivers701-702to drive one or more power switches703of the DC/DC converter. In this embodiment, for the purposes of illustration, the stepwise drivers701-702are illustrated as a 3-step driver similar to the one shown inFIG. 5A. However, they are not so limited. More or less drivers and/or more or less steps in each driver may be implemented.

In addition, as shown inFIG. 7, multiple stepwise drivers may share some or all of the corresponding supply rails. As a result, when an AC coupling device is used in an intermediate supply rail, this configuration reduces the amount of the decoupling capacitance (e.g., AC coupling devices) required for the intermediate supply rails because the supply rails are shared by multiple drivers. Other configurations may exist.

FIG. 8is a block diagram of a DC/DC converter according to another embodiment. For example, the DC/DC converter example800may be implemented as an example of the DC/DC converter100ofFIG. 1and/or the DC/DC converter600ofFIG. 6. Similar to those shown inFIGS. 6 and 7, the DC/DC converter example800includes one or more stepwise drivers801-802to drive one or more power switches803of the DC/DC converter. In this embodiment, for the purposes of illustration, the stepwise drivers801-802are illustrated as a 3-step driver similar to the one shown inFIG. 5A. However, they are not so limited. More or less drivers and/or more or less steps in each driver may be implemented.

In addition, according to one embodiment as shown inFIG. 8, the power switch803may operate from VCCof approximately twice the maximum voltage rating of the transistors. The driver801generates voltage swing between VCC/2 and VCC, and driver802generates voltage swing between VSSand VCC/2. In one embodiment, the VCC/2 rail is shared and facilitates recycling of charge from driver801into driver802. As a result, power is saved. Further, the intermediate voltage rails can be decoupled by using one or more AC coupling devices, for example, capacitors, connected to other intermediate rails or to any of VSS, VCC/2, VCC. Alternatively, flexible sharing scheme shown inFIG. 9may be utilized.

FIG. 9is a block diagram of a DC/DC converter according to another embodiment. For example, the DC/DC converter example900may be implemented as an example of the DC/DC converter100ofFIG. 1and/or the DC/DC converter600ofFIG. 6. Similar to those shown inFIGS. 6-8, the DC/DC converter example900includes one or more stepwise drivers901-902to drive one or more power switches903of the DC/DC converter. However, more or less drivers and/or more or less steps in each driver may be implemented.

In addition, additional switches904-907are used to cross couple the outputs of one driver to a supply rail of another driver. The additional switches904-907create the opportunity for charge recycling among the drivers901and902when operating conditions are favorable. For example, if VN=VCC, V0=VCC/2=V′N, then switch connected to A′N+1can turn on instead of A′Nand emulate the scheme shown inFIG. 8. Depending on the power consumption of each of the drivers and the anticipated voltages, some of the switches may be added or omitted.

FIG. 10is a block diagram of a computer example which may be used with an embodiment. For example, some or all components of system1000shown inFIG. 10may be powered using one or more DC/DC converters similar to those shown in FIGS.1and6-9. Any one of the DC/DC converters may include a stepwise driver, similar to those shown inFIGS. 2-3,4A, and5A, to drive a power switch of the converter. Note that whileFIG. 10illustrates various components of a computer system, it is not intended to represent any particular architecture or manner of interconnecting the components, as such details are not germane to the present invention. It will also be appreciated that network computers, handheld computers, cell phones, and other data processing systems which have fewer components or perhaps more components may also be used with the present invention.

As shown inFIG. 10, the computer system1000, which is a form of a data processing system, includes a bus1002which is coupled to a microprocessor1003and a ROM1007, a volatile RAM1005, and a non-volatile memory1006. The microprocessor1003, which may be, for example, a Pentium processor from Intel Corporation or a PowerPC processor from Motorola, Inc., is coupled to cache memory1004as shown in the example ofFIG. 10. The bus1002interconnects these various components together and also interconnects these components1003,1007,1005, and1006to a display controller and display device1008, as well as to input/output (I/O) devices1010, which may be mice, keyboards, modems, network interfaces, printers, and other devices which are well-known in the art. These components may be coupled to each other via one or more interconnects having a receiver circuit similar to those shown inFIGS. 5 and 6.

Typically, the input/output devices1010are coupled to the system through input/output controllers1009. The volatile RAM1005is typically implemented as static RAM (SRAM) or dynamic RAM (DRAM) which requires power continuously in order to refresh or maintain the data in the memory. The non-volatile memory1006is typically a magnetic hard drive, a magnetic optical drive, an optical drive, or a DVD ROM or other type of memory system which maintains data even after power is removed from the system. Typically, the non-volatile memory will also be a random access memory, although this is not required. WhileFIG. 10shows that the non-volatile memory is a local device coupled directly to the rest of the components in the data processing system, it will be appreciated that the present invention may utilize a non-volatile memory which is remote from the system; such as, a network storage device which is coupled to the data processing system through a network interface such as a modem or Ethernet interface.

The bus1002may include one or more buses connected to each other through various bridges, controllers, and/or adapters, as is well-known in the art. In one embodiment, the I/O controller1009includes a USB (Universal Serial Bus) adapter for controlling USB peripherals or a PCI controller for controlling PCI devices, which may be included in IO devices1010. In a further embodiment, I/O controller1009includes an IEEE-1394 controller for controlling IEEE-1394 devices, also known as FireWire devices. Other components may also be implemented.