Negative audio signal voltage protection circuit and method for audio ground circuits

Self-grounded circuitry (10) includes a signal channel conducting an output voltage (VOUT1). A charge pump (2) powered by a reference voltage (VDD) produces a control voltage (VCP). The control signal is at a low level if the reference voltage is low and is boosted to a high level if the reference voltage is high. A ground switch circuit (15) includes a depletion mode transistor (MP1) having a source coupled to the output voltage, a gate coupled to the control voltage, and a drain coupled to ground. The transistor includes a well region (4-1) and a parasitic substrate diode (D3-1). A negative voltage protection circuit (17-1) includes a depletion mode first protection transistor (MP3-1) having a drain coupled to the well region, a source coupled to a source of a depletion mode second protection transistor (MP4-1) having a drain coupled to the output voltage, the first and second protection transistors each having a gate coupled to the control voltage, and also includes a diode (MN1) coupled to charge the well region from the control voltage conductor to prevent distortion of the output voltage.

BACKGROUND OF THE INVENTION

The present invention relates generally to “audio ground switches” that include depletion mode MOS transistors which function as audio ground switches connected to prevent build-up of charge that may result in discharging and associated popping sounds when a headset is plugged into an audio signal jack of a device generating the audio signal.

The discharge of the above-mentioned charge build-up occurs because an audio ground switch, along with circuitry connected to it, have parasitic capacitances, inductances, and resistances that are subject to build up of static charge which can be discharged similarly to common electrostatic discharge (ESD). The above-mentioned built-up charge in audio ground switch circuitry may be electrostatically discharged to ground at the instant a headset is connected to circuitry connected to the audio ground switch. The resulting current through the headset speaker resistance may cause the above-mentioned clicking/popping sounds.

Referring toFIG. 1, a conventional audio ground switch circuit1is implemented in an integrated circuit chip that includes a conventional charge pump2coupled between a positive supply voltage VDDand a system ground. Charge pump2produces an output voltage VCPon conductor3. Charge pump2includes conventional internal circuitry that discharges VCPto zero volts if VDDfalls below an under-voltage “lockout threshold” voltage. The charge pump output voltage VCPis connected by conductor3to the gate electrodes of P-channel MOS (metal oxide semiconductor) depletion mode field effect transistors MP1and MP2which normally are in their conductive ON states when VCPis at zero volts. When VDDis at a normal level, for example 3.3 volts, then charge pump output voltage VCPis at a boosted level, for example 7 volts. The source of depletion mode ground switch transistor MP1is connected to a conductor6-1having an audio information signal voltage VOUT1thereon, and the source of depletion mode ground switch transistor MP2is connected to a conductor6-2having an audio information signal voltage VOUT2thereon. The source electrodes of depletion mode transistors MP1and MP2are limited to a sufficiently low voltage that, combined with the boosted charge pump voltage VCP, they produce a sufficiently large gate-to-source reverse bias voltage VGS to change the state of depletion mode transistors MP1and MP2from their conductive regions of operation to their cutoff regions.

FIG. 2shows the connections and signals associated with depletion mode transistor MP1in more detail for the case in which VDDis equal to zero. Depletion mode transistor MP1has P-type source and drain regions formed in an N-type well region4of depletion mode transistor MP1. The P-type source and the N-type well region form an associated parasitic diode D1which has a substantial parasitic capacitance, and the P-type drain and the N-type well region4of depletion mode transistor MP1form an associated parasitic diode D2which also has a substantial parasitic capacitance. The N-type well region4is formed on a P-type substrate and together they form an associated parasitic substrate diode D3. (See the integrated circuit section view of depletion mode transistor MP1in subsequently describedFIG. 5.) If MP1is “open” in its high impedance OFF state, a large negative voltage on conductor6-1will certainly forward bias substrate diode D3-1, but that is not the case if MP1is conductive and therefore acting like a ground switch. If MP1is in its conductive ON state, it is unlikely that any audio signal would be present because it would not be able to be developed across the parallel combination of the ground resistor R1-1and the low channel resistance of MP1, which might be somewhere between 0.1 and 1.0 ohms.

A relatively large-amplitude audio signal having a range of, for example, ±2.63 volts may be produced on conductor7by an audio amplifier8in a conventional CODEC (coder-decoder)11. That audio signal is coupled across a resistive voltage divider including a 16 ohm headset resistance R2(of a headset13) coupled between the output7of audio amplifier8and VOUT1conductor6-1and a 7 ohm “ground resistor” R1coupled between VOUT1conductor6-1and ground. Audio amplifier8also is referenced to ground. (Audio engineers sometimes connect a “ground resistor” such as resistor R1in series with the system ground to reduce or eliminate so-called “ground noise”.) The divided-down output signal produced by audio amplifier8appears as VOUT1on conductor6-1and would have a range of ±0.8 volts if depletion mode transistor MP1inFIG. 2were OFF instead of ON. However, since depletion mode transistor MP1inFIG. 2is in its ON condition, its very low channel resistance is in parallel with ground resistor R1and causes VOUT1to be essentially equal to zero. Note however, that audio signals usually are not present while the depletion mode field effect transistor MP1is in its conductive or ON state. The signal on conductor6-1is typically used to provide internal compensation in audio CODEC11.

FIG. 3shows the same structure shown inFIG. 2, but in this case VDDis not equal to zero. Instead, VDDhas a sufficiently large value to cause charge pump output voltage VCPto be equal to approximately +7 volts, which results in a magnitude of the gate-to-source voltage (VGS) of depletion mode transistor MP1sufficiently high to switch depletion mode transistor MP1completely OFF into its high-impedance state. In this case the audio signal on amplifier output conductor7typically is present, so the full ±0.8 volt output value of VOUT1is produced on conductor6-1by the voltage division of the audio amplifier output voltage on conductor7by the headphone resistance R2and the ground resistance R1. The same circuitry shown for depletion mode transistor MP1inFIGS. 2 and 3can, of course, also be utilized for depletion mode transistor MP2inFIG. 1.

The prior art ground switch integrated circuit of Prior ArtFIGS. 1-3provide a very low resistance in parallel with ground resistor R1when no power is being applied to the charge pump2(i.e., when VDD=0), and ground switch integrated circuit ofFIGS. 1-3also turns the depletion mode transistor MP1off whenever adequate VDDpower is being applied to charge pump2such that audio information VOUT1can be produced on conductor6-1and applied to the ground sensing input of audio CODEC11for processing.

The direct connection of N-type well4to VOUT1conductor6-1prevents forward biasing of parasitic diode D1including the PN junction between the P-type source and the N-type well region4of depletion mode transistor MP1when VOUT1is positive. Unfortunately, if depletion mode transistor MP1is switched into its high impedance OFF state, then the −0.8 volt portion of the AC signal VOUT1on conductor6-1may cause parasitic diodes D2and D3to become forward biased, and that introduces a large amount of distortion into the system audio signal VOUT1.

If speaker or headset13is plugged into the headset jack of a personal computer or the like when depletion mode transistor MP1is OFF, and if the audio volume is turned up to its maximum level during a “no audio event” (i.e., when no desired audio signal such as a music signal is being provided), an annoying audio frequency ground noise signal or “audio frequency hum” may be heard from the headset speaker resistance represented by resistor R2. The 7 ohm noise reduction resistor R1in the ground path and the headset resistance R2function together as a voltage divider that reduces the magnitude of the maximum negative voltage swing of VOUT1(−0.8 volts in this example) in order to prevent forward biasing of the substrate diode D3formed by the P-type source and the diode D2formed by N-type well region4of depletion mode transistor MP1. The 7 ohm ground resistor R1reduces the audio hum amplitude during such a “no audio” event. The R1ground sense resistor is needed to provide a ground sense input signal to the CODEC11. This ground sense input signal is then used to cancel the noise of the ground signal. The need for this function causes the relatively large-magnitude signal of +/−0.8 volts to appear on VOUT1conductor6-1.

Typically, there will be some charge buildup on the parasitic capacitances associated with the ground conductor and/or the audio signal conductor6-1when no VDDpower is being applied to charge pump2. The main reason for requiring audio ground switches is to provide resistive paths for discharge of such charge buildup is resulting from plugging a headset into a headset jack to receive the audio signal VOUT1to thereby prevent a sudden electrical discharge through the headset resistance R2and thereby preventing the annoying clicking/popping sounds.

When the audio signal voltage VOUT1is present on conductor6-1and is applied to the drain of depletion mode ground switch transistor MP1inFIGS. 1-3, then a −0.8 volt value of VOUT1on conductor6-1appears on the cathode of substrate diode D3, forward biasing it and causing a large amount of distortion in VOUT1. The main functions of the depletion mode transistor MP1in its ON state are to prevent static charge buildup and to dampen or slow down any discharge of built-up static charge when the headset13is plugged in.

Thus, there is an unmet need for improved audio ground switch circuitry that prevents buildup of charge and thereby prevent subsequent discharge thereof in depletion mode ground switch transistors under all operating conditions without compromising the quality of desired audio signals that are present.

There also is an unmet need for improved audio ground switch circuitry that prevents negative portions of an audio signal from causing ground switch circuitry receiving the audio signal to produce distortion in the audio signal.

There also is an unmet need for improved audio ground switch circuitry that prevents popping sounds caused by discharging of charge built up in the audio ground switch circuitry at the instant at which a headset is plugged into a jack receiving an audio signal.

There also is an unmet need for improved audio ground switch circuitry that enables use of higher resistance ground resistors without causing distortion of an audio signal received by the audio ground switch circuitry.

SUMMARY OF THE INVENTION

Is an object of the invention to provide improved audio ground switch circuitry that prevents buildup of charge and thereby prevents subsequent discharge thereof in depletion mode ground switch transistors under all operating conditions without compromising the quality of desired audio signals that are present.

It is another object of the invention to provide improved audio ground switch circuitry that prevents negative portions of an audio signal from causing ground switch circuitry receiving the audio signal to distort the audio signal.

Is another object of the invention to provide improved audio ground switch circuitry that prevents popping sounds caused by discharging of charge built up in the audio ground switch circuitry at the instant at which a headset is plugged into a jack receiving an audio signal.

It is another object of the invention to provide improved audio ground switch circuitry that enables use of higher resistance ground resistors without causing distortion of an audio signal received by the audio ground switch circuitry.

Briefly described, and in accordance with one embodiment, the present invention provides self grounded circuitry (10) including a signal channel conducting an output voltage (VOUT1). A charge pump (2) powered by a reference voltage (VDD) produces a control voltage (VCP). The control signal is at a low level if the reference voltage is low and is boosted to a high level if the reference voltage is high. A ground switch circuit (15) includes a depletion mode transistor (MP1) having a source coupled to the output voltage, a gate coupled to the control voltage, and a drain coupled to ground. The transistor includes a well region (4-1) and a parasitic substrate diode (D3-1). A negative voltage protection circuit (17-1) includes a depletion mode first protection transistor (MP3-1) having a drain coupled to the well region, a source coupled to a source of a depletion mode second protection transistor (MP4-1) having a drain coupled to the output voltage, the first and second protection transistors each having a gate coupled to the control voltage, and also includes a diode (MN1) coupled to charge the well region from the control voltage to prevent distortion of the output voltage by always keeping the substrate diode reverse biased.

In one embodiment, the invention provides self-grounded circuitry (10) including a first signal channel conducting a first output signal (VOUT1) on a first output conductor (6-1); a charge pump (2) powered by a first reference voltage (VDD) and producing a control voltage signal (VCP) on a control conductor (3,VCP), the control voltage signal (VCP) having a relatively low value if the first reference voltage (VDD) is at a relatively low level and having a relatively high value if the first reference voltage (VDD) is at a relatively high level; a ground switch circuit (15) including a first depletion mode transistor (MP1) having a source coupled to the first output conductor (6-1), a gate coupled to receive the control voltage signal (VCP), and a drain coupled to a second reference voltage (GND), the first depletion mode transistor (MP1) having a first well region (4-1), a first parasitic diode (D1-1) including a PN junction between the source (14inFIG. 5) and the first well region (4-1inFIG. 5), a second parasitic diode (D2-1) including a PN junction between the drain (16inFIG. 5) and the first well region (4-1), and a third parasitic diode (D3-1) including a PN junction between the first well region (4-1) and a substrate (19inFIG. 5) ajoining the first well region (4-1); and a first negative voltage protection circuit (17-1) including a first depletion mode protection transistor (MP3-1) having a drain coupled to the first well region (4-1), a source coupled to a source of a second depletion mode protection transistor (MP4-1) having a drain coupled to the first output conductor (6-1), the first (MP31) and second (MP4-1) depletion mode protection transistors each having a gate coupled to the control conductor (3,VCP), and a level-shifting circuit (MN1) coupled between the first well region (4-1) and the control conductor (3,VCP). In a described embodiment, the diode (MN1) is a diode-connected enhancement mode transistor having a source coupled to the first well region (4-1) and a gate and drain coupled to the control conductor (3,VCP). Well regions of the first (MP3-1) and second (MP4-1) depletion mode protection transistors are connected to their sources, respectively. In a described embodiment, the first output signal (VOUT1) is an audio frequency signal.

In one embodiment, the first signal channel (8-1,R1-1,R2-1,6-1) includes a first amplifier (8-1), a resistive voltage divider including a first ground noise resistor (R1-1) coupled between the first output conductor (6-1,VOUT1) and the second reference voltage (GND), and a first resistance (R2-1) of a speaker of an external headset (13-1) coupled between an output (7-1) of the first amplifier (8-1) and the first output conductor (6-1,VOUT1). In one embodiment the first ground noise resistor (R1-1) has a resistance of approximately 7 ohms and wherein the first resistance (R2-1) has a value of approximately 16 ohms.

In one embodiment, the first depletion mode transistor (MP1) is a P-channel MOS depletion mode transistor and the diode-connected enhancement mode transistor (MN1) is a N-channel enhancement mode MOS transistor. A channel-width-to-channel-length ratio of the enhancement mode transistor (MN1) is substantially less than a channel-width-to-channel-length ratio of the first depletion mode transistor (MP1).

In one embodiment, the first well region (4-1) is an N-type well region adjoining a P-type substrate (19). In one embodiment, the diode-connected enhancement mode transistor (MN1) charges the first well region (4-1) to a voltage equal to the control voltage signal (VCP) minus a forward threshold voltage (VT) of the diode-connected enhancement mode transistor (MN1) when the first reference voltage (VDD) substantially exceeds the relatively low level. The first depletion mode protection transistor (MP3-1) and the second depletion mode protection transistor (MP4-1) cooperate to perform the functions of allowing the well region (4-1) to be charged to the voltage level of the first output conductor (3,VOUT1) while the first depletion mode transistor (MP1) is in its ON condition, and wherein a parasitic diode (D7-1) associated with the second depletion mode protection transistor (MP4-1) prevents escape of charge from the well region (4-1) while the first depletion mode transistor (MP1) is in its OFF condition. In one embodiment, a body electrode of the diode-connected enhancement mode transistor (MN1) is connected to the second reference voltage (GND). In one embodiment, the first well region (4-1) is an N-type semiconductor layer disposed on a P-type semiconductor substrate, the source (14) and the drain (16) of the first depletion mode transistor (MP1) are P-type regions in the first well region (4-1) and are separated by a P-type channel region (20) in the first well region (4-1).

In one embodiment, the first negative voltage protection circuit (17-1) operates so as to both prevent clicking/popping sounds when the headset (13-1) is plugged into a jack connected to the first output conductor (6-1) and eliminate audio hum signals from the first output conductor (6-1) if the first output signal (VOUT1) is not present and the first depletion mode transistor (MP1) is in an OFF condition.

In one embodiment, the charge pump (2) operates to cause the control voltage signal (VCP) to be equal to approximately zero if the first reference voltage (VDD) is at a relatively low level.

In one embodiment, a second signal channel conducts a second output signal (VOUT2) on a second output conductor (6-2), and a second depletion mode transistor (MP2) has a source coupled to the second output conductor (6-2) and a structure essentially the same as the first depletion mode transistor (MP1), and a second well region protection circuit (17-2) is essentially the same as the first well region protection circuit (17-1).

In one embodiment, the invention provides a method for preventing distortion of an output signal (VOUT1) caused by ground switch circuitry (15) in a self-grounding switch circuit (10), the method including providing the output signal (VOUT1) on a second output conductor (6-1); operating a charge pump (2) powered by a second reference voltage (VDD) to produce a control voltage signal (VCP) on a control conductor (3,VCP), the control voltage signal (VCP) having a relatively low value if the first reference voltage (VDD) is at a relatively low level and having a relatively high value if the first reference voltage (VDD) is at a relatively high level; applying the control voltage signal (VCP) and applying it to a gate of a depletion mode ground switch transistor (MP1) having a source coupled to the output conductor (6-1) and a drain coupled to a second reference voltage (GND), the second depletion mode ground switch transistor (MP1) having a well region (4-1), a first parasitic diode (D1-1) including a PN junction between the source (14inFIG. 5) and the well region (4-1inFIG. 5), a second parasitic diode (D2-1) including a PN junction between the drain (16inFIG. 5) and the well region (4-1), and a third parasitic diode (D3-1) including a PN junction between the well region (4-1) and a substrate (19inFIG. 5) ajoining the well region (4-1); and coupling the well region (4-1) to a drain of a first depletion mode protection transistor (MP3-1) having a drain coupled to the well region (4-1), a source coupled to a source of a second depletion mode protection transistor (MP4-1) having a drain coupled to the output conductor (6-1), coupling a gate of each of the first (MP3-1) and second (MP4-1) depletion mode protection transistors to the control conductor (3,VCP), coupling a source of a diode-connected enhancement mode transistor (MN1) to the well region (4-1) and coupling a gate and a drain of the diode-connected enhancement mode transistor (MN1) to the control conductor (3,VCP), and coupling well regions of the first (MP3-1) and second (MP4-1) depletion mode protection transistors to their sources, respectively.

In one embodiment the method includes operating the first depletion mode protection transistor (MP3-1) and the second depletion mode protection transistor (MP4-1) to charge the well region (4-1) to the voltage level of the first output conductor (3,VOUT1) while the depletion mode transistor (MP1) is in its ON condition, and preventing escape of charge from the well region (4-1) while the first depletion mode transistor (MP1) is in its OFF condition by means of a parasitic diode (D7-1) associated with the second depletion mode protection transistor (MP4-1).

In one embodiment the level-shifting circuits (MN1) is a diode-connected enhancement mode transistor, and the method includes operating the diode-connected enhancement mode transistor (MN1) to charge the well region (4-1) to a voltage equal to the control voltage signal (VCP) minus a forward threshold voltage (VT) of the diode-connected enhancement mode transistor (MN1) when the first reference voltage (VDD) substantially exceeds the relatively low level.

In one embodiment the method includes using P-channel depletion mode transistors as the depletion mode ground switch transistor (MP1) and as the first and second depletion mode protection transistors (MP3-1) and (MP4-1) and using a N-channel enhancement mode transistor as the diode-connected enhancement mode transistor (MN1).

In one embodiment, the invention provides circuitry (17-1) for preventing distortion of an output signal (VOUT1) caused by ground switch circuitry (15) in an AC signal circuit (10), including means (8-1,R1-1,R1-2) for providing the AC output signal (VOUT1) on a first output conductor (6-1); a charge pump (2) powered by a first reference voltage (VDD) to produce a control voltage signal (VCP) on a control conductor (3,VCP), the control voltage signal (VCP) having a relatively low value if the first reference voltage (VDD) is at a relatively low level and having a relatively high value if the second reference voltage (VDD) is at a relatively high level; means (3) for applying the control voltage signal (VCP) to a gate of a depletion mode ground switch transistor (MP1) having a source coupled to the output conductor (6-1) and a drain coupled to a second reference voltage (GND), the depletion mode ground switch transistor (MP1) having a well region (4-1), a first parasitic diode (D1-1) including a PN junction between the source (14inFIG. 5) and the well region (4-1inFIG. 5), a second parasitic diode (D2-1) including a PN junction between the drain (16inFIG. 5) and the well region (4-1), and a third parasitic diode (D3-1) including a PN junction between the well region (4-1) and a substrate (19inFIG. 5) ajoining the well region (4-1); means (MP3-1,MP4-1) for charging the well region (4-1) to the voltage level of the first output conductor (3,VOUT1) while the first depletion mode ground switch transistor (MP1) is in its ON condition, and preventing escape of charge from the well region (4-1) while the first depletion mode ground switch transistor (MP1) is in its OFF condition by means of a parasitic diode (D7-1) associated with the second depletion mode protection transistor (MP4-1); and means (MN-1) for charging the well region (4-1) to a voltage equal to the control voltage signal (VCP) minus a forward threshold voltage (VT) of the diode-connected enhancement mode transistor (MN1) when the first reference voltage (VDD) substantially exceeds the relatively low level thereof so the depletion mode ground switch transistor (MP1) is in its OFF condition.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

FIG. 4shows an embodiment of a circuit10which includes ground switch circuitry15that in turn includes first and second audio signal channels and also includes negative voltage protection circuits17-1and17-2. Negative voltage protection circuits17-1and17-2prevent negative portions of audio signals in the two channels from forward biasing internal parasitic PN junctions (i.e., PN diodes) in depletion mode “ground switch” transistors MP1and MP2of ground switch circuitry15and thereby prevent distortion of audio signals in the first and second audio signal channels caused by the negative portions of the audio signals.

The first audio signal channel includes an audio amplifier8-1producing an audio output signal on conductor7-1, and also includes a resistive voltage divider including speaker resistance R2-1coupled between output7-1of amplifier8-1and an output conductor6-1on which VOUT1is produced. Audio amplifier8-1is included in a conventional CODEC11-1. CODEC11-1has a ground sense input connected to output conductor6-1. (The signal on conductor6-1is typically used to provide internal compensation in audio CODEC11. A ground noise resistor R1-1is connected between VOUT1conductor6-1and ground.) “Ground resistor” R1-1may be 7 ohms and produces a signal on VOUT1that allows CODEC11-2to reduce ground noise or “hum” when depletion mode transistor MP1is in its high impedance OFF condition if no audio signal is present in the first audio channel. The low impedance path of depletion mode transistor MP1when it is in its ON condition reduces popping/clicking noise. The audio “hum” is reduced by both ground resistance R1-1and circuitry in audio CODEC11-1. Headset speaker resistance R2of external headset13-1may be 16 ohms and ground resistor R1-1may be 7 ohms.

Similarly, the second audio signal channel includes an audio amplifier8-2producing an audio output signal on conductor7-2, and also includes a resistive voltage divider including another headset speaker resistance R2-2of another external headset13-2coupled between output7-2of amplifier8-2and an output conductor6-2on which an audio output signal VOUT2of the second audio signal channel is generated. A ground resistor R1-2is connected between output conductor6-2and ground.

Ground switch circuitry15also includes a conventional charge pump2coupled between a positive supply voltage VDDand the system ground. Charge pump2produces an output voltage VCPon a control conductor3. Charge pump2discharges VCPto zero volts if VDDfalls below its “undervoltage lockout threshold”. The charge pump output voltage VCPis coupled by control conductor3to the gate electrodes of P-channel MOS (metal oxide semiconductor) depletion mode field effect ground switch transistors MP1and MP2which are normally in their conductive or ON state when VCPis equal to zero volts. When VDDis at a normal level, for example 3.3 volts, then charge pump output voltage VCPis boosted from 0 volts to a substantially higher level, approximately +7 volts in the example ofFIG. 4. (Note that there could be two or more parallel charge pumps that are selectable so as to support two or more different voltage levels of VDD, and the charge pumps could have various architectures, such as a closed loop charge pump architecture. Furthermore, it would be possible to omit the charge pump if the high-voltage level of VCPcould be externally supplied by the user as a relatively high supply voltage; that relatively high supply voltage could be switched so as to provide a control signal that is substantially equivalent to VCPon control conductor3. However, in most cases this approach would be highly impractical and costly.)

The source electrode of depletion mode transistor MP1is connected to VOUT1conductor6-1, and the source of depletion mode transistor MP2is connected to VOUT2conductor6-2. The drain electrodes of depletion mode transistors MP1and MP2are connected to ground. Depletion mode transistor MP1has a P-type source region14and a P-type drain region16formed in an N-type well region4-1of depletion mode transistor MP1as shown in subsequently described Prior ArtFIG. 5, and depletion mode transistor MP2has a similar structure in its own well region. N-type well region4-1of depletion mode transistor MP1is disposed on a P-type substrate19, as shown inFIG. 5. The P-type source14and the N-type well region4-1of depletion mode transistor MP1form an associated parasitic diode D1-1which has a substantial parasitic capacitance, and the P-type drain region16and the N-type well region4-1of depletion mode transistor MP1form an associated parasitic diode D2-1which also has a substantial parasitic capacitance. The N-type well region4-1and above mentioned P-type substrate together form an associated parasitic “substrate diode” D3-1having a substantial parasitic capacitance.

In the integrated circuit section view ofFIG. 5, it can be seen that P-channel depletion mode transistor MP1includes P-type source region14and a P-type drain region16formed in N-type well region4-1, which is formed on P-type substrate19. A gate oxide18is formed over the P-type channel region20extending immediately under gate oxide18from the edge of the P-channel source region14to the edge of the P-channel drain region16. A gate electrode21is formed on the upper surface of gate oxide18. An N+ contact region23allows low-resistance electrical contact to N-type well region4-1, and P+ regions24allow low-resistance context to P+ substrate19. Above-mentioned parasitic diode D1-1includes the PN junction between source region14and well region4-1. Parasitic diode D2-1includes the PN junction between drain region16and well region4-1, and substrate diode D3-1includes the PN junction between substrate region19and well region4-1.

InFIG. 4, the output of audio amplifier8-1on conductor7-1is a relatively large-amplitude audio signal having a range of, for example, ±2.63 volts. The divided-down output voltage on conductor7-1of audio amplifier8-1appears as VOUT1on conductor6-1and would have a range of ±0.8 volts if depletion mode transistor MP1were OFF instead of ON. However, if depletion mode transistor MP1is in its ON condition, its very low channel resistance is in parallel with ground resistor R1and causes the magnitude of VOUT1to be insufficient to cause forward biasing of any of the parasitic diodes.

If VDDhas a sufficiently large value to cause charge pump output voltage VCPto be equal to approximately +7 volts, that results in a sufficiently high magnitude of the gate-to-source voltage of depletion mode ground switch transistor MP1to turn depletion mode transistor MP1completely OFF (i.e., to switch MP1into its high-impedance state). The full ±0.8 volt divided-down output value of VOUT1on conductor6-1therefore can be applied to a headset resistance R2-1that is connected between amplifier output conductor7-1and VOUT1conductor6-1.

Ground switch circuitry15also includes negative voltage protection circuit17-1which ensures that well region4-1of depletion mode transistor MP1is always biased such that none of its associated parasitic diodes ever become forward biased. It should be understood that the parasitic diodes associated with depletion mode ground switch transistor MP1are always reversed biased as long as N-type well region4-1is connected to the highest voltage associated with MP1. Unfortunately, that highest voltage is not always available to be coupled to well region4-1if the highest voltage is connected directly to VOUT1as in Prior ArtFIGS. 1-3. Consequently, in that case the substrate diode D3-1will become forward biased if depletion mode transistor MP1is in its OFF condition and VOUT1is at its minimum −0.8 volt level. This would introduce unacceptable distortion into VOUT1. In contrast to the prior art ofFIGS. 1-3, well region bias circuit17-1ofFIG. 4avoids this problem.

Negative voltage protection circuit17-1includes a P-channel depletion mode “protection” transistor MP3-1which has its drain connected to well region4-1, its gate connected to charge pump output voltage VCPconductor3, and its source connected to the source of another P-channel depletion mode protection transistor MP4-1. Conductor5-1is connected to the N-type well regions and to the sources of both of depletion mode protection transistors MP3-1and MP4-1. Note that all of depletion mode transistors MP1and MP2have their own respective well regions, and depletion mode protection transistors MP3-1and MP4-1may share a common well region or alternatively they may be formed in separate well regions that are connected together by conductor5-1. The gate of depletion mode protection transistor MP4-1is connected to VCPand its drain is connected to VOUT1conductor6-1. Depletion mode protection transistor MP3-1includes an associated parasitic diode D6-1having its anode connected to N-type well region4-1and having its cathode connected by conductor5-1to a well region of depletion mode protection transistor MP3-1. A parasitic diode D4-1has its anode connected to the source of depletion mode protection transistor MP3-1and also has its cathode connected to conductor5-1. Parasitic diodes D4-1and D5-1are short-circuited by conductor5-1. A parasitic diode D5-1has its anode connected to the source of depletion mode protection transistor MP4-1and has its cathode connected to conductor5-1. A parasitic diode D7-1has its anode connected by VOUT1conductor6-1to the drain of depletion mode protection transistor MP4-1and its cathode connected to conductor5-1. The channel-width-to-channel-length ratios of depletion mode protection transistors MP3-1and MP4-1are much less than the corresponding ratios of depletion mode protection transistors MP1and MP2, because they only need to bias the well region4-1but do not need to sink any signal current.

InFIG. 4, the gate and drain of an N-channel enhancement mode transistor MN1are connected to VCPconductor3, and the source of diode-connected transistor MN1is connected to well region4-1. The body electrode of diode-connected N-channel enhancement mode MOS transistor MN1is connected to ground.

If VDD=0 volts is applied to charge pump2, then VCPis also 0 volts, and therefore VOUT1is coupled to the system ground by the ON channel resistance of MP1. More specifically, if there is no VGS turn-off voltage applied between the gate and source of depletion mode ground switch transistor MP1, then MP1and depletion mode protection transistors MP3-1and MP4-1all are in their ON states and N-type well region4-1is connected to VOUT1(which is the highest voltage in the circuit) through the ON resistances of depletion mode protection resistors MP3-1and MP4-1. Consequently, there is no chance of forward biasing of any of the parasitic diodes.

However, if a substantial value of VDD(e.g., 3.3 volts) is applied to “power up” charge pump2, then (in this example) VCPmay be boosted up approximately +7 volts, and then depletion mode transistor MP1and depletion mode protection transistors MP3-1and MP4-1are in their high impedance OFF states. Therefore the highest voltage in the circuit (i.e., VOUT1) is not available to bias N-type well region4-1. Consequently, enhancement mode transistor MN-1is used as shown because VCPis equal to approximately 7 volts and the voltage of well region4-1is less than the quantity7-VTvolts. Well-region-charging enhancement mode transistor NM-1will conduct current and charge N-type well region4-1up to VCP-VTand then turn off, ensuring that all of parasitic diodes D1-1, D2-1, and D2-3are reverse biased.

When charge pump2not powered, i.e., if VDD=0, VOUT1is effectively short-circuited to ground because charge pump2automatically discharges VCPto ground whenever VDD=0, and this causes depletion mode transistor MP1to be in its conductive ON condition. Therefore, diode-connected enhancement mode N-channel transistor MN-1cannot be in its ON state because it is reverse biased, or in a worst case the voltages of the source, gate, and drain of enhancement mode well region charging transistor MN1all are equal to zero volts. In that case, depletion mode protection transistors MP3-1and MP4-1can allow current to flow through depletion mode transistors MP3-1and MP4-1because both are in their conductive ON states since their gates are at ground voltage. Consequently, N-type well region4-1will be biased to the voltage level of VOUT1and this will prevent any forward biasing of substrate diode D3-1or any of the other parasitic diodes when VOUT1is at or near its minimum −0.8 volt level.

When charge pump2is powered by VDD=3.3 volts, N-type well region4-1of depletion mode transistor MP1will be charged to VCP-VTvolts during a short time interval by diode-connected enhancement mode transistor MN1, where VTis the forward threshold voltage of diode-connected enhancement mode transistor MN1. The above-mentioned short time interval is the transition time for VCPto increase from 0 volts up to approximately +7 volts. (The short time interval also is the time constant of the resistance of diode-connected enhancement mode transistor MN-1and the capacitance of the parasitic diodes D1-1, D2-1, and D2-3associated with depletion mode transistor MP1.) Enhancement mode transistor MN1will turn on for a short amount of time as VCPis rising, allowing current to flow from charge pump2through conductor3and into N-type well region4-1, thereby charging well region4-1and its parasitic capacitance to VCP-VT.

Note that if diode-connected transistor MN1is omitted, N-type well region4-1would be charged to exactly VCP, and therefore depletion mode protection transistors MP3-1and MP4-1would not turn off because the drain voltage of depletion mode protection transistor MP3-1would be the same as its gate voltage. Depletion mode protection transistors MP3-1and MP4-1therefore would never turn off, so there always would be a current path from the output VOUT1through the protection depletion mode transistors MP3-1and MP4-1, and that would cause substantial distortion of VOUT1. The purpose of diode-connected transistor MN1is to lower the voltage on the drain of depletion mode protection transistor MP3-1so the two depletion mode protection transistors MP3-1and MP4-1can turn off. The parasitic capacitance associated with well region4-1is charged up through diode-connected enhancement mode transistor MN1until it turns itself off, and thereafter diode-connected enhancement mode transistor MN1supplies only the negligible amount of current needed to keep well region4-1charged to the VCP-VTlevel.

It should be appreciated that the reason both back-to-back depletion mode transistors MP3-1and MP4-1(rather than just one) are needed is because with only one of them (e.g., MP3-1) there would be no suitable way of biasing well region5-1. For example, if well region5-1were directly connected to VOUT1, the problem would be that the voltage of VOUT1on conductor6-1would be lower than the voltage of well region4-1because (in this example) VOUT1is 3.3 volts and well region4-1is charged to VCP(which is +7 V in this example) minus the turn-on voltage VTof diode-connected transistor MN1. Therefore, parasitic diode D6-1would become forward biased and allow current to flow from charge pump2into VOUT1conductor6-1. To prevent this, back-to-back depletion mode protection transistors MP3-1and MP4-1allow well region4-1to be charged to the to the level of VCP-VT. Reverse biased parasitic diode D7-1then blocks any of that charge from escaping from well region5-1, since diode D7-1is reverse biased.

Ground switch circuitry15also includes a second negative voltage protection circuit17-2which ensures that well region4-2of depletion mode ground switch transistor MP2is always biased such that none of the parasitic diodes associated with depletion mode transistor MP2becomes forward biased. Negative voltage protection circuit17-2inFIG. 4avoids this problem because the structure and operation of well bias circuit17-2are essentially the same as the structure and operation of well region bias circuit17-1.

The described embodiment of the invention avoids distortion of audio signals in one or more audio signal channels while allowing a positive level of VOUT1to be applied when no VDDpower is being applied charge pump2, and also while allowing positive and negative levels of VOUT1to be applied when VDDpower is being applied to charge pump2. This enables system engineers to use a higher external ground resistance for noise immunity by tolerating the resulting larger negative voltage swings.

While the invention has been described with reference to several particular embodiments thereof, those skilled in the art will be able to make various modifications to the described embodiments of the invention without departing from its true spirit and scope. It is intended that all elements or steps which are insubstantially different from those recited in the claims but perform substantially the same functions, respectively, in substantially the same way to achieve the same result as what is claimed are within the scope of the invention. For example, the described embodiment of the invention is just one example how a self grounding switch transistor inherently short-circuits the output until the grounding switch transistor “wakes up” in response to “waking up” of the “switch control”, i.e., to the charge pump. A grounding switch transistor protection circuit generally as described in this invention can be used any application wherein bipolar signals (i.e., signals having both positive and negative values with respect to a ground reference) need to be driven accurately all the time, including during turning the grounding switch transistor on and off. For example, it may be very important to protect a negative voltage to be applied to a precision motor drive circuit to prevent causing a small erroneous angle shift in the position of the rotor. (This would be analogous to the clicking/popping sound in a described audio application.) The invention also may be utilized in various other applications that require a very well controlled drive signal during the powering-up of a device. Also, It may be possible to accomplish the charging function of enhancement mode will region charging transistor MN1with a different kind of diode, such as an ordinary PN diode, if a PN diode or other diode available in a particular integrated circuit manufacturing process provides the needed voltage drop if a suitable level shifting circuit could be utilized to adjust the charge pump output voltage to make use of a PN diode more practical. Furthermore, it would be possible to omit the charge pump if the high-voltage level of VCPcould be externally supplied by the user as a relatively high supply voltage; that relatively high supply voltage could be switched so as to provide a control signal that is substantially equivalent to VCPon control conductor3. However, in most cases this approach would be highly impractical and costly.