Method for identification of SPI compatible serial memory devices

A method for identifying Serial Peripheral Interface (SPI) compatible serial interface memory devices. A microprocessor sends a single command requesting identification information to an SPI device installed on the SPI bus. A byte string, including the JEDEC manufacturer ID, device ID, and any extended device information, is sent back to the microprocessor. The byte string may include one or more continuation codes when the manufacturer ID exceeds 1 byte. The byte string also includes one byte indicating how many bytes of extended device information should be read by the microprocessor. The identification process, issuing the command and receiving the reply, is completed in one operation.

FIELD OF THE INVENTION

This invention relates to the identification of memory devices, particularly serial interface memory devices.

BACKGROUND OF THE INVENTION

Non-volatile memory devices are arranged in either a parallel interface arrangement or a serial interface arrangement. In past years, the parallel interface was more prevalent because of its fast, random access capability, making it ideal for direct code execution. In recent years, the serial interface has become more prevalent for storing personal preference and configuration data, offering a low pin count, low power consumption, and smaller packages. The parallel interface uses independent outputs and address pins with a rectangular array of memory devices. The serial interface typically uses a two wire configuration and sometimes a third wire for clock signals. Other wire arrangements can be found but a clock signal is always present.

An example of a parallel interface is shown in U.S. Pat. No. 4,451,903 entitled “Method for Encoding Product and Programming Information in Semiconductors,” assigned to the assignee of the present invention. FIG. 4 of the '903 patent shows how many parameters that characterize non-volatile memory devices may be specified for encoding in the memory. In this example, 15 different parameters, including device manufacturer are encoded.

The increasing popularity of the serial interface has led to the development of the Serial Peripheral Interface (SPI) protocol. The SPI standardizes the pins for serial interface devices and defines a group of such pins as an SPI bus.

Despite the growing number of serial interface memory manufacturers (each of whom has been assigned a manufacturer identification by JEDEC publication 106, which standardized manufacturer identification codes encoded on devices), there is no common electronic method for identifying these serial interface memories, or SPI devices, on an SPI bus once these devices are installed. This is problematic since different devices possess different characteristics, such as voltage range, erase times, etc. and may possess different architectures and command sets. If multiple, different SPI devices are installed on an SPI bus, it is necessary to identify these different devices in order for them to operate within the system.

While there are common methods for identifying parallel non-volatile memory devices, such as those contained in the Common Flash Memory Interface (CFI) specification which uses a single, common command to identify different suppliers' devices, these methods cannot be employed in serial devices because serial devices lack the address and data lines which allow the random access of information in parallel devices. (See “Common Flash Memory Interface (CFI) Specification,” Sharp AP-003-CFI-E.) In contrast to parallel devices which may have 16 or more address lines and between 8 and 32 data lines and, as noted above, access data randomly, serial devices have three lines and access information sequentially. Clearly, it would be desirable for there to be a method which not only identified any and all SPI devices installed on a system's SPI bus by the device's manufacturer and vendor-specific information, such as device density, device family, and device version, but also identified extended device information such as process technology, die revision, voltage levels, etc.

SUMMARY OF THE INVENTION

The present invention provides a command and reply serial communication method for obtaining information about an installed SPI memory device. A single command requesting information is sent to an SPI device which replies with a byte string of variable length including the manufacturer of the device, the device identification, and any extended device information, such as process technology, die revision, voltage levels, sector sizes, page sizes, erase times, etc. The reply indicates the JEDEC Manufacturer ID (based on JEDEC publication 106) and may include one or more continuation codes (in compliance with JEDEC publication 106) where the JEDEC Manufacturer ID cannot be indicated by one byte. The device is identified in two bytes in a vendor specific format indicating information such as device density, device family, and device version. In addition, the reply includes one byte which indicates the length of an extended device information string; this defines the relevant number of bytes which must be read to obtain additional information about the SPI device and prevents an associated microprocessor from reading unnecessary data.

DETAILED DESCRIPTION

All devices discussed in the various embodiments of the invention are serial non-volatile (“NV”) memory devices compatible with the Serial Peripheral Interface (SPI) protocol and connected to an associated microprocessor. As shown inFIG. 1, a serial NV memory device has at least three lines: the chip select signal (CS)10; serial in (SI)12; and serial out (SO)14. A clock signal (SCK)38is also shown. Each transition shown inFIGS. 1 and 2represents 8 bits and 8 clock cycles.

Referring toFIG. 1, in order to identify a serial NV memory device, a microprocessor sends a command16in the form of encoded pulses in a data packet to the device requesting information to identify the device, its manufacturer, and provide any extended device information such as process technology, die revision, voltage levels, sector size, page size, erase times, etc. This command16, in one embodiment an 8-bit opcode 1001 1111 (9FH), is clocked into the device. The opcode16must be dedicated, i.e., it cannot share functionality with other opcodes.

In response to the opcode16, a reply18, a data packet comprising a byte string of variable length, is clocked out. In one embodiment, the first byte, byte n,20of the reply18gives the JEDEC Manufacturer ID36specified in JEDEC publication 106. The next two bytes22,24of the reply represent device ID data34. These two bytes22,24are vendor specific data used to specify information such as device density, device family, and device version. The fourth byte26indicates the length of the extended device information string32; in other words, it tells the microprocessor how many additional bytes it has to read to obtain all available information about the device. For instance, using hexadecimal notation, 00H indicates 0 additional bytes of extended information, 01H indicates 1 additional byte, 0FH indicates 15 additional bytes, 10H indicates 16 additional bytes, etc. Up to 254 (FFH is reserved for future expansion) information bytes may be specified. In this embodiment, 2 extended device information bytes, byte x28and byte x+130, are presented. As noted above, the extended device information bytes32are vendor-specific bytes used to define detailed device information such as process, die revision, voltage range, sector size, page size, erase times, etc.

JEDEC Publication 106 also provides for continuation codes (7FH) where a JEDEC-assigned manufacturer cannot be identified in 1 byte. (JEDEC Publication 106 requires that the manufacturer ID byte contain seven data bits and one parity bit. Since identification codes have been assigned to more than 128 manufacturers (whose identification codes could be represented by seven data bits), continuation codes are used to indicate a manufacturer registered in subsequent “banks” of manufacturers (i.e., bank two lists manufacturers129–256, bank three lists manufacturers257–384, etc.) Multiple continuation codes may be used to indicate which bank contains a manufacturer's ID. For instance, no continuation code indicates a manufacturer's ID in the first bank, one continuation code indicates a manufacturer's ID in the second bank, two continuation codes indicates a manufacturer's ID in the third bank, etc.) When it encounters the continuation code, 7FH, the microprocessor should continue to read bytes indicating the manufacturer ID. The first non-7FH byte signifies the last byte of manufacturer ID data.

As shown inFIG. 2, the reply18from the device from the identification command16may include a continuation code38along with the manufacturer ID data36. Here, the continuation code 7FH38represents byte n while the JEDEC manufacturer ID40represents byte n+1. The reply18still contains device ID data34and the extended device information string32as described above inFIG. 1. (In other embodiments, more than one continuation code may be present.)

As shown above inFIGS. 1 and 2, all available information about a device may be obtained in one operation. This identification method does not require any memory address data to be sent to a device and therefore can be used to identify any device without alteration for any device density (1-Mbit, 64-Mbit, 256-Mbit, etc.). In other words, no dummy bytes need to be sent to the device in order to identify the device.