CLICK AND POP NOISE REDUCTION IN HEADPHONES

A method and an apparatus are provided. The apparatus reduces noise in headphones due to a change in a current or a voltage in headphones while determining an impedance of the headphones. The apparatus generates a digital waveform that reduces noise in the headphones when applied for an impedance determination. The apparatus converts the digital waveform to an analog waveform. The apparatus applies the analog waveform to an input of the headphones while reducing the noise in the headphones due to the application of the analog waveform for the impedance determination. The apparatus determines the impedance of the headphones based on the applied analog waveform. A first derivative of the analog waveform may be continuous. In particular, the analog waveform may be “s” shaped. The digital waveform may be generated based on a ramp digital waveform. The ramp digital waveform may be generated based on a step digital waveform.

DETAILED DESCRIPTION

The detailed description set forth below in connection with the appended drawings is intended as a description of various configurations and is not intended to represent the only configurations in which the concepts described herein may be practiced. The detailed description includes specific details for the purpose of providing a thorough understanding of various concepts. However, it will be apparent to those skilled in the art that these concepts may be practiced without these specific details. In some instances, well known structures and components are shown in block diagram form in order to avoid obscuring such concepts. The term “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any design described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other designs.

Headphones are available with impedances that range from around 16 ohms to about 600 ohms. In order to provide adequate power to drive the headphones for producing an adequate volume range, the headphone source may need to determine the impedance of the headphones. When determining the impedance of headphones, a drive current or a drive voltage must be applied. When changing the drive current or the drive voltage, the headphones may produce a click and/or a pop noise that is undesirable for a user. Methods and apparatuses that reduce the click and/or pop noise when determining (or detecting) an impedance of the headphones is provided infra.

FIG. 1is a first diagram100illustrating an exemplary impedance determination apparatus130. As shown inFIG. 1, a pair of headphones102has an impedance Z104. The impedance determination apparatus130applies a drive voltage106or a drive current108in order to determine the impedance Z104. The change in the drive voltage106and/or the drive current108causes a click and/or a pop noise in the pair of headphones102. The impedance determination apparatus130applies the drive voltage106or the drive current108with a particular waveform/shape116in order to reduce the click and pop noise from the pair of headphones102while determining the impedance Z104of the pair of headphones102.

FIG. 3is a diagram illustrating an exemplary digital waveform generator module300. The digital waveform generator module300corresponds to the digital waveform generator module210ofFIG. 2. The digital waveform generator module300may include a tri-state input block302for providing one of three states A, 0, and −A to an accumulator304(e.g., a resettable integrator), where A is an integer and |A|≧1 (e.g., A=1 or A=−1). The accumulator304integrates the input from the tri-state input block302. The accumulator304outputs the integrated input from the tri-state input block302to an accumulator306(e.g., a resettable integrator). The accumulator306integrates the output from the accumulator304. The accumulator306provides the integrated output to a DAC or to a bit-shift module314. The digital waveform generator module300may further include the bit-shift module314, which is configured to shift the output from the accumulator306by S bits in order to increase or to decrease a magnitude of the digital signal received from the accumulator306. The bit-shift module314shifts the bits of the digital signal received from the accumulator306to the left to multiply the magnitude of the digital signal provided to the DAC by 2Sand to the right to divide the magnitude of the digital signal provided to the DAC by 2S. The tri-state input block302and the accumulator304may be replaced by an increment/decrement block (i.e., a plus/minus counter)316. The tri-state input block302, the accumulator304, the increment/decrement block316, and the accumulator306are controlled by control logic312. The tri-state input block302, the accumulator304, the increment/decrement block316, and the accumulator306are coupled to a clock308. The clock frequency fclockof the clock308may be divided down by M by the divider310. As such, the effective clock frequency may be fclock/M. The effective clock period is Tc, where Tc=M/fclock.

In a first configuration, to create the digital waveform provided to the DAC, the accumulators304,306are reset to zero. The tri-state input block302then outputs state A TR1times, state 0 TZ1times, and state −A TR2times. The tri-state input block302then outputs state 0 THtimes. Subsequently, the tri-state input block302outputs state −A TR3times, state 0 TZ2times, and state A TR4times. The values TR1, TR2, TR3, TR4, TZ1, TZ2, and THare integers; and TR1≧1, TR2≧1, TR3≧1, TR4>1, TZ1≧0, TZ2≧0, and TS≧0. In one configuration, TR1+TR2=TR3+TR4. In another configuration, TR1, TR2, TR3, and TR4are equal to TR, and TZ1and TZ2are equal to TS. The accumulator304integrates the input received from the tri-state input block302to produce a ramp digital waveform. The accumulator306integrates the ramp digital waveform received from the accumulator304to produce a second order polynomial waveform. The second order polynomial waveform may then be provided to the bit-shift module314and then to the DAC, or may be provided directly to the DAC.

In a second configuration, to create the digital waveform provided to the DAC, the increment/decrement block316and the accumulator306are reset to zero. The increment/decrement block316then increments/decrements to produce the ramp digital waveform for the accumulator306. In a first sub-configuration, where A is an integer and A≧1, the increment/decrement block316increments TR1times by A, holds the state TZ1times, decrements TR2times by A, holds the state THtimes, decrements TR3times by A, holds the state TZ2times, and increments TR4times by A. In a second sub-configuration, where A is an integer and A≧1, the increment/decrement block316decrements TR1times by A, holds the state TZ1times, increments TR2times by A, holds the state THtimes, increments TR3times by A, holds the state TZ2times, and decrements TR4times by A. The values TR1, TR2, TR3, TR4, TZ1, TZ2, and THare integers; and TR1≧1, TR2≧1, TR3≧1, TR4≧1, TZ1≧0, TZ2≧0, and TS≧0. In one configuration, TR1+TR2=TR3+TR4. In another configuration, TR1, TR2, TR3, and TR4are equal to TR, and TZ1and TZ2are equal to TZ. The accumulator306integrates the ramp digital waveform received from the increment/decrement block316to produce a second order polynomial waveform. The second order polynomial waveform may then be provided to the bit-shift module314and then to the DAC, or may be provided directly to the DAC. In the second configuration, if A is an integer and A≦1, incrementing by A is effectively decrementing by −A and decrementing by A is effectively incrementing by −A.

FIG. 4is a diagram illustrating an exemplary step digital waveform fS(N)400for generating a ramp digital waveform. As discussed supra, the tri-state input block302may output state A TR1times, state 0 TZ1times, state −A TR2times, state 0 THtimes, state −A TR3times, state 0 TZ2times, and state A TR4times. For simplicity, TR1, TR2, TR3, and TR4are assumed to equal TR, and TZ1and TZ2are assumed to equal TZ. As shown inFIG. 4, to obtain the drive voltage or drive current for determining the impedance of the headphones, the tri-state input block302may output state A TRtimes, state 0 TZtimes, and state −A TRtimes. The drive voltage or drive current is obtained after 2TR+TZclock cycles, plus some added delay as the signal propagates through the processing blocks to the DAC and to the impedance determination module. Assuming a clock cycle has a period of Tc, the drive voltage or drive current is obtained in a time period approximately equal to (2TR+TZ)Tcplus the added processing delay. The step digital waveform fS(N) is equal to A for 0≦N≦TR, 0 for TR<N<TR+TZ, and −A for TR+TZ≦N≦2TR+TZ, where the N (clock cycle), TR, and TZare integers, TR>0, and TZ≧0. After obtaining the drive voltage or the drive current for determining the impedance of the headphones, the tri-state input block302may hold the state THtimes. The tri-state input block302may then change the drive voltage or drive current back to an initial state by reversing the process and outputting the state −A TRtimes, the state 0 TZtimes, and the state A TRtimes.

FIG. 5is a diagram illustrating an exemplary ramp digital waveform fr(N)500for generating a digital waveform for impedance determination. As discussed supra, the accumulator304may integrate the step digital waveform400input from the tri-state input block302to obtain the ramp digital waveform500. Alternatively, an increment/decrement block316may generate the ramp digital waveform500by incrementing TRtimes by A, holding the state TZtimes, and decrementing TRtimes by A. InFIG. 5, only the portion of the digital waveform for obtaining the drive voltage or drive current is illustrated. The ramp digital waveform fr(N) is equal to AN for 0≦N≦TR, ATRfor TR<N<TR+TZ, and −AN+A(2TR+TZ) for TR+TZ≦N≦2TR+TZ, where N (clock cycle), TR, and TZare integers, TR>0, and TZ≧0.

FIG. 6is a diagram illustrating an exemplary digital waveform f(N)600for impedance determination. As discussed supra, the accumulator306integrates the ramp digital waveform fr(N)500output from the accumulator304or the increment/decrement block316. The accumulator306outputs the digital waveform f(N). The digital waveform f(N) is a second order polynomial and has an “s” shape. The first derivative of the digital waveform f(N) is continuous. Having an “s” shaped digital waveform f(N)600, where f′(N) is continuous, reduces the click and/or pop noise that occurs when a voltage or a current is applied based on the digital waveform f(N)600. The digital waveform f(N) may be equal to AN2/2 for 0≦N≦TR, ATRN−ATR2/2 for TR<N<TR+TZ, and −AN2/2+AN(2TR+TZ)−A(TR2+TRTZ+TZ2/2) for TR+TZ≦N≦2TR+TZ, where N, TR, and TZare integers, TR>0, and TZ≧0. The maximum voltage/current outputted from the accumulator306is ATR(TR+TZ).

FIG. 7is another diagram illustrating an exemplary step digital waveform700for generating a ramp digital waveform. The tri-state input block302may output state A TR1times, state 0 TZ1times, state −A TR2times, state 0 THtimes, state −A TR3times, state 0 TZ2times, and state A TR4times. For simplicity inFIG. 7, TR1, TR2, TR3, and TR4are assumed to equal TR, and TZ1and TZ2are assumed to equal TZ. Accordingly, to obtain a drive voltage or current for determining an impedance of headphones, the tri-state input block302may output state A TRtimes, state 0 TZtimes, and state −A TRtimes. The tri-state input block302may then output a hold state of 0 THtimes. The portion of the analog signal that corresponds to the hold state of 0 THmay be when the impedance determination module214determines the impedance of headphones. The tri-state input block302may then reverse the process and output state −A TRtimes, state 0 TZtimes, and state A TRtimes in order to change the drive voltage or the drive current back to an initial state.

FIG. 8is another diagram illustrating an exemplary ramp digital waveform800for generating a digital waveform for impedance determination. The accumulator304may integrate the step digital waveform700output from the tri-state input block302to produce the ramp digital waveform800. Alternatively, the increment/decrement block316may increment TR1times by A, hold the state TZ1times, decrement TR2times by A, hold the state THtimes, decrement TR3times by A, hold the state TZ2times, and increment TR4times by A. For simplicity inFIG. 8, TR1, TR2, TR3, and TR4are assumed to equal TR, and TZ1and TZ2are assumed to equal TZ. Accordingly, to obtain a drive voltage or current for determining an impedance of headphones, the increment/decrement block306may increment TRtimes by A, hold the state TZtimes, and decrement TRtimes by A. The increment/decrement block306may then hold the state THtimes. The portion of the analog signal that corresponds to the hold state THtimes may be when the impedance determination module214determines the impedance of the headphones. The increment/decrement block306may then reverse the process and decrement TRtimes by A, hold the state TZtimes, and increment TRtimes by A in order to change the drive voltage or the drive current back to an initial state.

FIG. 9is another diagram illustrating an exemplary digital waveform900for impedance determination. The accumulator306may integrate the ramp digital waveform800output from the accumulator304or the increment/decrement block316to produce the digital waveform900. The digital waveform900peaks at a voltage or a current of ATR(TR+TZ) after 2TR+TZclock cycles. The impedance determination module214may determine the impedance during a portion of the analog waveform that corresponds to the portion of the digital waveform900between 2TR+TZclock cycles and 2TR+TZ+THclock cycles.

FIGS. 10A,10B, and10C are diagrams illustrating yet another exemplary step digital waveform1050for generating a ramp digital waveform1060, an exemplary ramp digital waveform1070for generating a digital waveform1090for impedance determination, and an exemplary digital waveform1090for impedance determination. The waveforms illustrated inFIGS. 7,8,9may be inverted as shown inFIGS. 10A,10B,10C.

FIG. 11is a flow chart1100of a method of reducing noise in headphones due to a change in a current or a voltage in the headphones while determining an impedance of the headphones. The method may be performed by an impedance determination apparatus, such as the impedance determination apparatus130,230. The apparatus reduces noise in headphones due to a change in a current or a voltage in the headphones while determining an impedance of the headphones. In step1102, the apparatus generates a digital waveform that reduces noise in the headphones when applied for an impedance determination. For example, the apparatus may generate the digital waveform illustrated inFIG. 6,9, or10C. In step1104, the apparatus converts the digital waveform to an analog waveform. For example, the apparatus may convert the digital waveform illustrated inFIG. 6,9, or10C to an analog waveform with a DAC212. In step1106, the apparatus may apply the analog waveform to an input of the headphones while reducing the noise in the headphones due to the application of the analog waveform for the impedance determination. In step1108, the apparatus may determine the impedance of the headphones based on the applied analog waveform. The apparatus determines the impedance of the headphones at a peak of the analog waveform. The apparatus generates the digital waveform and applies the converted analog waveform such that as the current or the voltage approaches a peak, noise in the headphones due to the change in the current or the voltage is reduced or minimized. To reduce or to minimize the noise in the headphones due to the change in the current or the voltage while determining an impedance of the headphones, a first derivative of the analog waveform may be continuous. In particular, the analog waveform may be “s” shaped. For example, the digital waveform illustrated inFIGS. 6,9, and10C is “s” shaped. As such, the analog waveform output from the DAC212will also be “s” shaped.

In step1102, the apparatus may generate the digital waveform by generating a ramp digital waveform fr(N). For example, the apparatus may generate the ramp digital waveform fr(N) illustrated inFIG. 5,8, or10B. The apparatus may generate the ramp digital waveform fr(N) by integrating, with an accumulator, input from a tri-state input block. For example, the apparatus may generate the ramp digital waveform fr(N) ofFIG. 5,8, or10B by integrating, with the accumulator304, input from the tri-state input block302. The apparatus may generate the ramp digital waveform fr(N) with an increment/decrement block. For example, the apparatus may generate the ramp digital waveform fr(N) ofFIG. 5,8, or10B with an increment/decrement block316. An initial portion of the ramp digital waveform fr(N) (for obtaining the drive current or drive voltage) may be equal to AN for 0≦N≦TR, ATRfor TR<N<TR+TZ, and −AN+A(2TR+TZ) for TR+TZ≦N≦2TR+TZ, where N, TR, and TZare integers, TR>0, and TZ≧0. In the aforementioned equation for the ramp digital waveform fr(N), TR1, TR2, TR3, and TR4are assumed to equal TR, and TZ1and TZ2are assumed to equal TZ. However, TR1, TR2, TR3, and TR4may be unequal and TZ1and TZ2may be unequal.

In step1102, the apparatus may generate the digital waveform by integrating the ramp digital waveform fr(N) to generate the digital waveform. For example, the apparatus may generate the digital waveform ofFIG. 6,9, or10C by integrating the ramp digital waveform fr(N) ofFIG. 5,8, or10B. The digital waveform may be generated by integrating, with an accumulator, the ramp digital waveform fr(N). For example, the digital waveform ofFIG. 6,9, or10C may be generated by integrating, with the accumulator306, the ramp digital waveform fr(N) ofFIG. 5,8, or10B.

In step1102, the apparatus may generate the ramp digital waveform fr(N) by generating a step digital waveform fS(N), and integrating the step digital waveform fS(N) to generate the ramp digital waveform fr(N). For example, the apparatus may generate the ramp digital waveform fr(N) ofFIG. 5,8, or10B by generating a step digital waveform fS(N) ofFIG. 4,7, or10A, and integrating the step digital waveform fS(N) ofFIG. 4,7, or10A to generate the ramp digital waveform fr(N) ofFIG. 5,8, or10B. The ramp digital waveform fr(N) may be generated by integrating, with an accumulator, the step digital waveform fS(N). For example, the apparatus may generate the ramp digital waveform fr(N) ofFIG. 5,8, or10B by integrating, with the accumulator304, the step digital waveform L(N) ofFIG. 4,7, or10A. An initial portion of the step digital waveform fS(N) (for obtaining the drive current or drive voltage) may be equal to A for 0≦N≦TR, 0 for TR<N<TR+TZ, and −A for TR+TZ≦N≦2TR+TZ, where N, TR, and TZare integers, TR>0, and TZ>0. In the aforementioned equation for the step digital waveform fS(N), TR1, TR2, TR3, and TR4are assumed to equal TR, and TZ1and TZ2are assumed to equal TZ. However, TR1, TR2, TR3, and TR4may be unequal and TZ1and TZ2may be unequal.

An initial portion of the digital waveform f(N) (for obtaining the drive current or drive voltage) may be equal to AN2/2 for 0≦N≦TR, ATRN−ATR2/2 for TR<N<TR+TZ, and −AN2/2+AN(2TR+TZ)−A(TR2+TRTZ+TZ2/2) for TR+TZ≦N≦2TR+TZ, where N, TR, and TZare integers, TR>0, and TZ>0. In the aforementioned equation for the digital waveform f(N), TR1, TR2, TR3, and TR4are assumed to equal TR, and TZ1and TZ2are assumed to equal TZ. However, TR1, TR2, TR3, and TR4may be unequal and TZ1and TZ2may be unequal.

FIG. 12is a conceptual data flow diagram1200illustrating the data flow between different modules/means/components in an exemplary apparatus1202. The apparatus1202may reduce noise in headphones due to a change in a current or a voltage in the headphones while determining an impedance of the headphones. The apparatus1202includes a digital waveform generator module1204that is configured to generate a digital waveform that reduces noise in the headphones when applied for an impedance determination. The apparatus1202further includes a digital to analog converter module1206that is configured to convert the digital waveform to an analog waveform. The apparatus1202further includes an impedance determination module1208that is configured to apply the analog waveform to an input of the headphones while reducing the noise in the headphones due to the application of the analog waveform for the impedance determination, and to determine the impedance of the headphones based on the applied analog waveform. The first derivative of the analog waveform may be continuous. The analog waveform may be “s” shaped. The digital waveform generator module1204may generate the digital waveform by generating a ramp digital waveform fr(N). The digital waveform generator module1204may generate the ramp digital waveform fr(N) by integrating, with an accumulator, input from a tri-state input block. The digital waveform generator module1204may generate the ramp digital waveform fr(N) with an increment/decrement block. The ramp digital waveform fr(N) may be equal to AN for 0≦N≦TR, ATRfor TR<N<TR+TZ, and −AN+A(2TR+TZ) for TR+TZ≦N≦2TR+TZ, where N, TR, and TZare integers, TR>0, and TZ≧0.

The digital waveform generator module1204may generate the digital waveform by integrating the ramp digital waveform fr(N) to generate the digital waveform. The digital waveform generator module1204may generate the digital waveform by integrating, with an accumulator, the ramp digital waveform fr(N). The digital waveform generator module1204may generate the ramp digital waveform fr(N) by generating a step digital waveform fS(N), and integrating the step digital waveform fS(N) to generate the ramp digital waveform fr(N). The digital waveform generator module1204may generate the ramp digital waveform fr(N) by integrating, with an accumulator, the step digital waveform fS(N). The step digital waveform fS(N) may be equal to A for 0≦N≦TR, 0 for TR<N<TR+TZ, and −A for TR+TZ≦N≦2TR+TZ, where N, TR, and TZare integers, TR>0, and TZ≧0. The digital waveform f(N) may be equal to AN2/2 for 0≦N≦TR, ATRN−ATR2/2 for TR<N<TR+TZ, and −AN2/2+AN(2TR+TZ)−A(TR2+TRTZ+TZ2/2) for TR+TZ≦N≦2TR+TZ, where N, TR, and TZare integers, TR>0, and TZ≧0.

FIG. 13is a diagram illustrating an example of a hardware implementation for an apparatus employing a processing system/controller. The processing system/controller1314may be implemented with a bus architecture, represented generally by the bus1324. The bus1324may include any number of interconnecting buses and bridges depending on the specific application of the processing system/controller1314and the overall design constraints. The bus1324links together various circuits including one or more processors and/or hardware modules, represented by the processor1304, the modules1204,1206,1208, and the computer-readable medium1306. The bus1324may also link various other circuits such as timing sources, peripherals, voltage regulators, and power management circuits, which are well known in the art, and therefore, will not be described any further.

The processing system/controller1314includes a processor1304coupled to a computer-readable medium1306. The processor1304is responsible for general processing, including the execution of software stored on the computer-readable medium1306. The software, when executed by the processor1304, causes the processing system/controller1314to perform the various functions described supra for any particular apparatus. The computer-readable medium1306may also be used for storing data that is manipulated by the processor1304when executing software. The processing system/controller further includes at least one of the modules1204,1206,1208. The modules may be software modules running in the processor1304, resident/stored in the computer readable medium1306, one or more hardware modules coupled to the processor1304, or some combination thereof. For example, the module1204may be a software module running in the processor1304or resident/stored in the computer readable medium1306, the module1206may be a hardware module such as a DAC, and the module1208may be a hardware module and/or a software module running in the processor1304or resident/stored in the computer readable medium1306.

In one configuration, the apparatus1302reduces noise in headphones due to a change in a current or a voltage in the headphones while determining an impedance of the headphones. The apparatus includes means for generating a digital waveform that reduces noise in the headphones when applied for an impedance determination, means for converting the digital waveform to an analog waveform, means for applying the analog waveform to an input of the headphones while reducing the noise in the headphones due to the application of the analog waveform for the impedance determination, and means for determining the impedance of the headphones based on the applied analog waveform. The first derivative of the analog waveform may be continuous. The analog waveform may be “s” shaped. The means for generating the digital waveform may be configured to generate a ramp digital waveform fr(N). The ramp digital waveform fr(N) may be generated by integrating, with an accumulator, input from a tri-state input block. The ramp digital waveform fr(N) may be generated with an increment/decrement block. The means for generating the digital waveform may be configured to integrate the ramp digital waveform fr(N) to generate the digital waveform. The digital waveform may be generated by integrating, with an accumulator, the ramp digital waveform fr(N). The means for generating the ramp digital waveform fr(N) may be configured to generate a step digital waveform fS(N), and to integrate the step digital waveform fS(N) to generate the ramp digital waveform fr(N). The ramp digital waveform fr(N) may be generated by integrating, with an accumulator, the step digital waveform fS(N). The aforementioned means may be one or more of the aforementioned modules of the apparatus1202, the processing system/controller1314of the apparatus1202, the modules within the impedance determination apparatus230, and/or the blocks/modules of the digital waveform generator module300configured to perform the functions recited by the aforementioned means.