Method for driving an electronic switch in a power converter circuit and control circuit

A method and a control circuit for driving an electronic switch coupled to an inductor in a power converter in successive drive cycles each including an on-time and an off-time are disclosed. Driving the electronic switch includes: measuring an inductor voltage during the on-time in a drive cycle in order to obtain a first measurement value; measuring the inductor voltage during the off-time in a drive cycle in order to obtain a second measurement value; obtaining a first voltage measurement signal that is dependent on a sum of the first measurement value and the second measurement value; and adjusting the on-time in a successive drive cycle dependent on a feedback signal and the first voltage measurement signal.

RELATED APPLICATION

This application claims priority to earlier filed European Patent Application Serial Number EP19183979 entitled “METHOD FOR DRIVING AN ELECTRONIC SWITCH IN A POWER CON-VERTER CIRCUIT AND CONTROL CIRCUIT,” filed on Jul. 2, 2019, the entire teachings of which are incorporated herein by this reference.

BACKGROUND

Switched-mode power converter circuits are widely used to convert power in various kinds of electronic applications such as automotive, industrial, telecommunication, household or consumer electronic applications. A switched-mode power converter may include an electronic switch, an inductor coupled to the electronic switch, and a rectifier circuit coupled to the inductor. Converting power with a switched-mode power converter of this type usually includes receiving an input voltage and an input current at an input by the power converter and driving the electronic switch in a plurality of successive drive cycles each including an on-time and an off-time, wherein the inductor receives energy from the input during the on-time and transfers energy to the rectifier circuit during the off-time. An output parameter of the power converter, such as an output voltage or an output current, may be regulated by suitably adjusting durations of the on-times and the off-times.

BRIEF DESCRIPTION OF EMBODIMENTS

Some types of power converter circuits are configured to receive, as the input voltage, an alternating voltage or a rectified alternating voltage and, in addition to regulating the output parameter, are configured to regulate an input current such that an average input current in the individual drive cycles is essentially proportional to the input voltage. A power converter circuit of this type is usually referred to as PFC (Power Factor Correction) power converter, PFC converter, or PFC stage. A drive circuit configured to drive the electronic switch in a PFC converter is usually referred to as PFC controller.

There is a need for a simple and efficient method for driving an electronic switch in a PFC power converter, in particular a PFC converter in which input and output are galvanically isolated, and a drive circuit configured to implement this method.

One example relates to a method. The method includes driving an electronic switch coupled to an inductor in a power converter in successive drive cycles each including an on-time and an off-time, wherein the inductor is coupled to an auxiliary winding. Driving the electronic switch includes measuring an auxiliary voltage across the auxiliary winding during the on-time in a drive cycle in order to obtain a first measurement value, measuring the auxiliary voltage during the off-time in a drive cycle in order to obtain a second measurement value, obtaining a first voltage measurement signal that is dependent on a sum of the first measurement value and the second measurement value, and adjusting the on-time in a successive drive cycle dependent on a feedback signal and the first voltage measurement signal.

Another example relates to a control circuit configured to drive an electronic switch coupled to an inductor in a power converter in successive drive cycles, each including an on-time and an off-time. The control circuit is configured to measure an auxiliary voltage across an auxiliary winding coupled to the inductor during the on-time of a drive cycle in order to obtain a first measurement value, to measure the auxiliary voltage during the off-time of a drive cycle in order to obtain a second measurement value, to obtain a first voltage measurement signal that is dependent on a sum of the first measurement value and the second measurement value, and to adjust the on-time in a second drive cycle dependent on a feedback signal and the first voltage measurement signal.

Examples are explained below with reference to the drawings. The drawings serve to illustrate certain principles, so that only aspects necessary for understanding these principles are illustrated. The drawings are not to scale. In the drawings the same reference characters denote like features.

In the following detailed description, reference is made to the accompanying drawings. The drawings form a part of the description and for the purpose of illustration show examples of how the invention may be used and implemented. It is to be understood that the features of the various embodiments described herein may be combined with each other, unless specifically noted otherwise.

BRIEF DESCRIPTION AND DETAILED DESCRIPTION OF EMBODIMENTS

FIG. 1illustrates one example of a power converter. This power converter includes an input11,12configured to receive an input voltage VINand an output13,14configured to provide an output voltage VOUTand an output current IOUT. The power converter may be configured to regulate an output parameter such as the output voltage VOUT, the output current IOUT, or an output power (which is given by the output voltage VOUTmultiplied by the output current IOUT) such that the output parameter has a predefined value.

Referring toFIG. 1, the power converter further includes a switching circuit2connected to the input11,12and a rectifier circuit3connected between the switching circuit2and the output13,14. The switching circuit2includes an electronic switch22and an inductor21coupled to the electronic switch22. The electronic switch22is controlled by a drive signal SDRVreceived at a drive input of the electronic switch22such that the electronic switch22switches on or off dependent on the drive signal SDRV. Any type of electronic switch such as a MOSFET (Metal Oxide Semiconductor Field-Effect Transistor), an IGBT (Insulated Gate Bipolar Transistor), a HEMT (High Electron-Mobility Transistor), or the like may be used to implement the electronic switch22.

Just for the purpose of illustration, the power converter shown inFIG. 1is a flyback converter. In this case, the inductor21is a transformer with a primary winding211and a secondary winding212, wherein the primary winding211is connected in series with the electronic switch22and the series circuit including the primary winding211and the electronic switch22is connected to the input11,12. That is, the series circuit including the primary winding211and the electronic switch22is connected between a first input node11and a second input node12of the input11,12. The secondary winding212is inductively coupled to the primary winding211and is connected to the rectifier circuit3. According to one example, a winding sense of the secondary winding212is opposite to a winding sense of the primary winding211. In the power converter shown inFIG. 1, a current I2through the primary winding211of the transformer is controlled by a switched-mode operation of the electronic switch22. This is explained in further detail herein below.

Optionally, the power converter further includes an auxiliary winding23of the transformer. This auxiliary winding23is inductively coupled to the primary winding211and the secondary winding212. A voltage VAUXacross the auxiliary winding23is referred to as auxiliary voltage in the following. The auxiliary voltage VAUXis essentially proportional to a voltage V211across the primary winding211, wherein a proportionality factor between the auxiliary voltage VAUXand the voltage V211across the primary winding211is dependent on a ratio between a number of turns of the auxiliary winding23and a number of turns of the primary winding211. The voltage V211across the primary winding is also referred to as inductor voltage or primary voltage in the following. According to one example, the auxiliary voltage VAUXis a voltage referenced to the second input node12. This second input node12is also referred to as ground node GND in the following.

Referring toFIG. 1, the power converter further includes a feedback circuit15. The feedback circuit15receives an output signal SOUTthat represents the output parameter that is to be regulated. That is, the output signal SOUTmay represent the output voltage VOUT, the output current IOUT, or the output power POUT. According to one example, the output signal SOUTrepresents the output voltage VOUTand is essentially proportional to the output voltage VOUT. According to another example, the output signal SOUTrepresents the output current IOUTand is essentially proportional to the output current IOUT. The output signal SOUTmay be obtained by measuring the respective output parameter in a conventional way using any kind of voltage, current or power measurement circuit. Such circuits are commonly known so that no further explanations are required in this regard.

The feedback circuit15is configured to generate a feedback signal SFBbased on the output signal SOUT. The power converter further includes a drive circuit4that receives the feedback signal SFBat a first input41and is configured to generate the drive signal SDRVat an output40based on the feedback signal SFB. Referring toFIG. 1, a load Z (illustrated in dashed lines) connected to the output13,14may receive the output power provided by the power converter. Dependent on a power consumption of the load Z, the regulated output parameter, such as the output voltage VOUTor the output current IOUT, may vary. The feedback circuit15is configured to generate the feedback signal SFBin such a way that the feedback signal SFB—based on which the electronic switch22is driven—counteracts such variations of the regulated output parameter. More specifically, the feedback signal SFBis generated in such a way that, in a steady state of the power converter, an input power of the power converter, which is controlled by the switched-mode operation of the electronic switch22, essentially equals the output power received by the load Z. The feedback circuit15and the drive circuit4form a control loop that is configured to regulate the output parameter.

Generating the feedback signal SFBby the feedback circuit15may include comparing the output signal SOUTwith a reference signal SREF, calculating an error signal based on comparing the output signal Sour with the reference signal SREF, and generating the feedback signal SFBbased on the error signal. The reference signal SREFrepresents a desired value of the output parameter. Generating the feedback signal SFBbased on the error signal may include filtering the error signal using a filter with any one of a P (proportional) characteristic, an I (integrating) characteristic, a PI (proportional-integrating) characteristic or a PID (proportional-integrating-deriving) characteristic. Generating a feedback signal in a power converter based on an error signal is commonly known, so that no further explanation is required in this regard.

Referring toFIG. 1, a coupler16may be connected between the feedback circuit15and the drive circuit4. Due to the transformer21there is a galvanic isolation between the input11,12and the output13,14. The coupler16is configured to transmit the feedback signal SFBfrom the feedback circuit51via the galvanic isolation to the drive circuit4. The coupler16may include an optocoupler, an inductive coupler, a capacitive coupler, or the like. In the example shown inFIG. 1, the coupler16is connected between the feedback circuit15and the drive circuit4. In this case, the feedback circuit15is arranged on a secondary side of the power converter. This, however, is only an example. According to another example (not shown), the feedback circuit is arranged on the primary side and receives the auxiliary voltage VAUX. The auxiliary voltage VAUXis essentially proportional to the output voltage VOUTwhen the switch is in the off-state. The latter is explained with reference toFIG. 3herein below.

The rectifier circuit3is configured to rectify a voltage V212across the secondary winding212. The rectifier circuit3may be implemented in various ways. One example of the rectifier circuit3is illustrated inFIG. 2. In this example, the rectifier circuit3includes a series circuit with a rectifier element31and a capacitor32connected to the secondary winding212. The output voltage VOUTis a voltage across the capacitor32according to one example. The load Z that may be connected to the load may be any kind of load or load circuit. The load Z may include a further power converter that is configured to provide a voltage with a voltage level different from the voltage level of the output voltage VOUT.

Operating the electronic switch22in a switched-mode fashion includes operating the electronic switch22in a plurality of successive drive cycles, wherein in each of these drive cycles the electronic switch22switches on for an on-time and switches off for an off-time. This is explained in further detail with reference toFIG. 3below.

FIG. 3illustrates signal diagrams of the current I2through the primary winding211and the switch22, a current I3through the secondary winding212, a voltage V211across the primary winding211, the auxiliary voltage VAUX, a voltage V22across the switch22, and the drive signal SDRV. In the following, the current I2through the primary winding211and the switch22is also referred to as primary current, the current I3through the secondary winding212is also referred to as secondary current, the voltage V211across the primary winding211is also referred to as primary voltage, and the voltage V22across the switch22is also referred to as switch voltage.FIG. 3illustrates operating the power converter in one drive cycle. A duration T of this drive cycle is given by a duration TONof an on-time plus a duration TOFFof an off-time. The “on-time” is the time period in which the electronic switch22is switched on, and the “off-time is the time period in which the electronic switch22is switched off. The electronic switch22switches on when the drive signal SDRVhas an on-level and switches off when the drive signal SDRVhas an off-level. Just for the purpose of illustration, the on-level is a high signal level and the off-level is a low signal level in the example illustrated inFIG. 3.

Referring toFIG. 3, the primary current I2increases during the on-time (wherein an increase of the primary current I2is essentially proportional to the input voltage VINand inversely proportional to an inductance of the transformer21). Further, during the on-time, the secondary current I3is zero, the primary voltage V211essentially equals the input voltage VIN, and the switch voltage V22is essentially zero. In the example illustrated inFIG. 1, the winding sense of the auxiliary voltage VAUXis such that the auxiliary voltage VAUXis negative during the on-time. Referring to the above, a magnitude of the auxiliary voltage VAUXis proportional to a magnitude of the primary voltage V211. Thus, during the on-time, a magnitude V1of the auxiliary voltage VAUXis proportional to the input voltage VIN.

Referring toFIG. 3, when the switch22switches off, the primary current I2becomes zero and the secondary current I3jumps to an initial value from which it gradually decreases. The primary voltage V211and, equivalently, the auxiliary voltage VAUXchange their polarity. The magnitude of the primary voltage V211is essentially given by n·VOUT, wherein n is given by a ratio between a number N1of turns of the primary winding211and a number of turns N2of the secondary winding212(n=N1/N2). During the off-time, a magnitude V2of the auxiliary voltage VAUXis again proportional to the primary voltage V211, so that during the off-time the magnitude V2of the auxiliary voltage VAUXis proportional to the output voltage VOUT. The proportionality factor between the auxiliary voltage VAUXand the primary voltage V211is the same during the on-time and during the off-time. Further, during the off-time, the switch voltage V22essentially equals the input voltage VINplus the magnitude of the primary voltage V211. It should be noted that the primary voltage V211is not exactly proportional to the output voltage VOUT, but is proportional to the output voltage VOUTplus a voltage across the rectifier circuit3, wherein the voltage across the rectifier circuit3decreases as the transformer is demagnetized. This voltage across the rectifier circuit3, however, is negligible as compared to the output voltage VOUT, so that the primary voltage V211can be considered to be proportional to the output voltage VOUTduring the off-time.

During the on-time, energy is magnetically stored in the transformer21and, during the off-time, this energy is transferred from the transformer21via the rectifier circuit3to the output13,14. Storing energy in the transformer21is associated with magnetizing the transformer and transferring the energy from the transformer21to the output13,14is associated with demagnetizing the transformer. In the example illustrated inFIG. 3, the off-time is long enough for the transformer21to be completely demagnetized. When the transformer is completely demagnetized, the (negative) primary voltage V211increases and the (positive) auxiliary voltage VAUXdecreases. In the example shown inFIG. 3, the electronic switch22again switches on when the auxiliary voltage VAUXcrosses zero or shortly after the auxiliary voltage VAUXcrosses zero. This kind of operating mode of the power converter is referred to as first operating mode or quasi-resonant mode in the following. In this type of operating mode the duration T of one drive cycle is dependent on the duration TONof the on-time and the duration TOFFof the off-time, wherein the duration of the off-time increases as the duration of the on-time increases and wherein, for a given duration of the on-time, the duration of the off-time increases as the input voltage VINincreases.

InFIG. 3, tDEMAGdenotes a demagnetization time instance, which is a time instance when the transformer21has been completely demagnetized. The proportionality explained above between the primary voltage V211and the output voltage VOUTis given in a time period TDEMbetween the beginning of the off-time and the demagnetization time instance tDEMAG. This time period TDEMis also referred to as demagnetization time period in the following.

According to one example, the input voltage VINis a rectified alternating voltage such as a rectified sinusoidal voltage illustrated inFIG. 4. A rectified sinusoidal voltage may be generated by a bridge rectifier (not illustrated in the drawings) from a sinusoidal grid voltage, for example.

In many different applications of a power converter of the type shown inFIG. 1it is desired not only to control the output parameter such that it essentially equals a desired value, but it is also to control the input current IIN, which is the current I2through the primary winding212and the switch22in the example shown inFIG. 1, such that an average of the input current IINfollows the signal waveform of the input voltage VIN. That is, it is desirable to control the input current IINsuch that in each drive cycle the average of the input current IINis essentially proportional to an instantaneous value of the input voltage VIN, wherein a proportionality factor between the average of the input current IINand the input voltage VINmay vary dependent on the power consumption of the load Z. A power converter having this functionality is often referred to as PFC (Power Factor Correction) converter. The average of the input current IINis also referred to as average input current IIN_AVGin the following.

It should be noted that the power received by the power converter from the input is proportional to a square of the input voltage. When the input voltage VINis a sinusoidal voltage, for example, the input power received by the power converter has a sine square waveform, wherein an amplitude of this sine square waveform is dependent on a power consumption of the load. At least one capacitor of the rectifier circuit3, such as capacitor32inFIG. 2, ensures that an essentially constant output voltage VOUTand an essentially constant output current IOUTcan be provided. Nevertheless, the output voltage VOUTmight not be exactly constant but may include a periodic voltage ripple with a frequency that is given by twice the frequency of the input voltage VIN. This voltage ripple is due to the variation of the input power that occurs when the average input current IIN_AVGis proportional to the input voltage VIN. The feedback circuit15may be configured to filter out these ripples so that they do not negatively affect the control loop. Filtering out these ripples may include using a notch filter or using an integrating filter with a relatively long an integrating window.

FIG. 5shows a flowchart of a method that is configured to control operation of the power converter such that both regulating the output parameter and regulating the waveform of the average input current IIN_AVGis achieved in a rather simple way. Referring toFIG. 5, the method includes measuring the inductor voltage during the on-time in one drive cycle in order to obtain a first measurement value (101), measuring the inductor voltage during the off-time in one drive cycle in order to obtain a second measurement value (102), and adjusting a duration of the on-time in at least one subsequent drive cycle based on a sum of the first measurement value and the second measurement value and based on the feedback signal (103). The inductor voltage is the voltage V211across the primary winding, that is the primary voltage according to one example. According to one example, obtaining the first measurement value and the second measurement value includes obtaining the first measurement value such that it is proportional to the inductor voltage during the on-time and obtaining the second measurement value such that it is proportional to the magnitude of the inductor voltage during the off-time.

According to one example, the inductor voltage is either the primary voltage V211or the secondary voltage V212and measuring the inductor voltage V211includes measuring that auxiliary voltage VAUXwhich, as explained above, is proportional to the primary voltage V211(and the secondary voltage V212). In this case, obtaining the first measurement value and the second measurement value includes obtaining the first measurement value such that it is proportional to the magnitude V1of the auxiliary voltage VAUXduring the on-time and obtaining the second measurement value such that it is proportional to the magnitude V2of the auxiliary voltage VAUXduring the off-time. The magnitudes V1, V2of auxiliary voltage VAUXduring the on-time and the off-time are also illustrated inFIG. 3. Obtaining the second measurement value during the off-time may include obtaining the second measurement value between the beginning of the off-time and the demagnetization time instance tDEMAG, that is, during a time period in which the inductor voltage is essentially proportional to the output voltage VOUT.

In the examples explained below, measuring the inductor voltage includes measuring the auxiliary voltage VAUX. This, however, is only an example. The inductor voltage may be measured in any other way as well, such as by measuring the input voltage VINand the switch voltage V22and calculating a difference.

Referring to the above, the auxiliary voltage VAUXis proportional to the input voltage VINduring the on-time and proportional to the output voltage VOUTduring the off-time. It can be assumed that the input voltage VINand the output voltage VOUTchange slowly and can be considered to be essentially constant over several drive cycles of the drive signal. Thus, the first measurement value and the second measurement value may be obtained in the same drive cycle. However, it is also possible to obtain the first measurement value and the second measurement value in different drive cycles. Further, “adjusting a duration of the on-time in at least one subsequent drive cycle” (a) may include using the sum of a first measurement value and a second measurement value to adjust the on-time in only one drive cycle before obtaining new first and second measurement values, (b) or may include using the sum of a first measurement value and a second measurement value to adjust the on-time in several successive drive cycles before obtaining new first and second measurement values. It is even possible to obtain one first measurement value based on measurements in several drive cycles and to obtain one second measurement value based on measurements in several drive cycles. Obtaining one first or second measurement value based on measurements in several drive cycles may include forming an average of measurement values obtained by the measurements.

One example of a control circuit4configured to operate the power converter in a method according toFIG. 5is illustrated inFIG. 6. This control circuit4includes a drive circuit5that is configured to generate the drive signal SDRV, a voltage measurement circuit6that is configured to measure the auxiliary voltage VAUX, and a crossing detection circuit7that is configured to detect time instances when the auxiliary voltage VAUXcrosses a predefined voltage level.

Referring toFIG. 6, the crossing detection circuit7includes a comparator71that is configured to compare the auxiliary voltage VAUXwith a reference voltage VREF1provided by a reference voltage source72. An output signal SZCDof the comparator71is dependent on whether the auxiliary voltage VAUXis higher or lower than the reference voltage VREF1. According to one example, the reference voltage is zero. In this example, the reference voltage source72may be omitted and the comparator output signal SZCDindicates whether the auxiliary voltage VAUXis higher or lower than zero. Independent of whether the reference voltage VREF1is zero or different from zero, the comparator output signal SZCDwill be referred to as zero crossing detection (ZCD) signal in this case. Referring toFIG. 3, in which the zero crossing detection signal SZCDis also illustrated, the zero crossing detection signal SZCDindicates the time instances when the auxiliary voltage VAUXcrosses the reference voltage VREF1.

After the demagnetization time instance tDEMAG, the primary voltage V211increases and the auxiliary voltage VAUXdecreases, so that the auxiliary voltage VAUXcrosses the reference voltage VREF1for the first time, Thus, the zero crossing detection signal SZCD, which is generated based on comparing the auxiliary voltage VAUXwith the reference voltage VREF1, indicates when the transformer21has been completely demagnetized during the off-time.

The voltage measurement circuit6is configured to measure the auxiliary voltage VAUXin the on-time in order to obtain the first measurement value representing the magnitude V1and during the off-time in order to obtain the second measurement value representing the magnitude V2. Further, the voltage measurement circuit6is configured to output a voltage measurement signal S12that represents the sum of the two magnitudes V1, V2, that is, the output signal S12is proportional to V1+V2. The drive circuit5receives the ZCD signal SZCD, the voltage measurement signal S12and the feedback signal SFBand generates the drive signal SDRVbased on these signals SZCD, S12, SFB. One example of the drive circuit5is illustrated inFIG. 7.

The drive circuit5shown inFIG. 7includes a latch51, wherein the latch51provides the drive signal SDRV. Optionally, a driver (not illustrated) is connected between the latch51and the switch22and is configured to generate the drive signal SDRVsuitable for driving the switch22based on an output signal of the latch51. The latch51receives an on-time start signal SSTARTand an on-time end signal S8and is configured to generate the on-level of the drive signal SDRVdependent on the on-time start signal and the on-time end signal S8. The on-time start signal SSTARTis briefly referred to as start signal and the on-time end signal is briefly referred to as end signal in the following.

Just for the purpose of illustration, the latch51is an SR-flip-flop in the example shown inFIG. 7and receives the start signal SSTARTat a set input S and the end signal S8at a reset input R. According to one example, the start signal SSTARTis the zero crossing detection signal SZCDand the latch51is configured to generate the on-level of the drive signal SDRVwhen the zero crossing detection signal SZCDindicates that the transformer has been completely demagnetized. In the example explained before, a falling edge of the zero crossing detection signal SZCDduring the off-time indicates that the transformer21has been completely demagnetized, so that latch51may start generating the on-level of the drive signal SDRVwhen a falling edge of the start signal SSTARToccurs.

Optionally, the start signal SSTARTis not the zero crossing detection signal SZCD, but a delayed version of the zero crossing detection signal SZCDprovided by a delay element52. In some cases it may be desirable not to switch on when the auxiliary voltage VAUXcrosses zero, but shortly after the auxiliary voltage VAUXhas crossed zero. This is illustrated inFIG. 3. As can be seen fromFIG. 3, the switch voltage V22further decreases after the auxiliary voltage VAUXhas crossed zero. By switching on the electronic switch22after the auxiliary voltage VAUXhas crossed zero, switching losses that may occur in the switch22can be reduced. After the transformer21has been completely demagnetized, parasitic oscillations may occur. This is explained in further detail herein below.

Basically, switching losses in the electronic switch22can be reduced when detecting the time instance at which the transformer has been completely demagnetized and when switching on after a delay time that essentially equals one half (50%) of the duration of one period of the parasitic oscillations. After this delay time, the voltage V22across the switch22has reached a local minimum, which is often referred to as valley. In the quasi-resonant mode illustrated inFIG. 3, the switch22switches when the switch voltage V22has reached the first valley after the demagnetization time instance tDEMAG. The duration of one period of the parasitic oscillations, which results from an inductance of the transformer21and parasitic capacitors, such as an output capacitance of the switch22, can be obtained by measurements or simulations. Referring toFIG. 3, the transformer21is completely demagnetized when the primary voltage V211starts to increase and the auxiliary voltage VAUXstarts to decrease. A first zero crossing of the auxiliary voltage VAUXoccurs one quarter (25%) of one period of the parasitic oscillations after the transformer21has been completely demagnetized, so that switching on the switch22one half period of the oscillations after the transformer21has been completely demagnetized is equivalent to switching on the electronic switch22one quarter of one period of the oscillations after the auxiliary voltage VAUXhas crossed zero. According to one example, a delay time of the delay element52shown inFIG. 7essentially equals one quarter of a period of the parasitic oscillations in order to achieve switching on when the voltage V22across the switch22has reached a local minimum (valley).

Referring toFIG. 7, the end signal S8is provided by an on-time control circuit8, wherein the on-time control circuit8receives the start signal SSTART, the feedback signal SFB, and the voltage measurement signal S12. The on-time control circuit8controls the duration of the on-time and causes the latch51to generate the off-level of the drive signal SDRVafter a time period defined by the on-time control circuit8, wherein this time period is dependent on the voltage measurement signal S12and the feedback signal SFB. One example of the on-time control circuit8is illustrated inFIG. 8.

The on-time control circuit8illustrated inFIG. 8includes a ramp signal generator83that receives the start signal SSTARTand is configured to output a ramp signal SRAMP, a multiplier82that receives the feedback signal SFBand the voltage measurement signal S12, and a comparator81that receives the ramp signal SRAMPand a multiplier output signal S82, which is also referred to as reference signal in the following. The end signal S8is available at an output of the comparator81.

FIG. 9shows signal diagrams that illustrate the functionality of the on-time control circuit8shown inFIG. 8. Referring toFIG. 9, the ramp signal generator83is configured to start a new ramp each time the start signal SSTARThas a certain edge that causes the latch (51inFIG. 7) to start the on-time. Just for the purpose of illustration, this edge of the start signal SSTARTis a falling edge in the example shown inFIG. 9. A predefined edge of the end signal S8is generated when a signal level of the ramp signal SRAMPreaches a signal level of an output signal S82of the multiplier. The predefined edge of the end signal S8causes the latch (51inFIG. 7) to end the on-time, that is, to change the signal level of the drive signal from the on-level to the off-level. Just for the purpose of illustration, the predefined edge of the end signal S8that causes the end of the on-time is a rising edge in the example illustrated inFIG. 9.

Referring toFIG. 8, the ramp signal generator83may receive the end signal S8in order to reset the ramp signal SRAMPto a start level, wherein the start level is the signal level from which the ramp signal SRAMPagain starts to increase when the start signal SSTARTindicates the beginning of a new on-time.

In the on-time control circuit8illustrated inFIG. 8, a time period between a time instance at which the predefined edge of the start signal SSTARTis received and the time instance at which the predefined edge of the end signal S8is generated is proportional to the multiplier output signal S82. The multiplier output signal S82, however, is proportional to the voltage measurement signal S12. Thus, for a given feedback signal SFBthis time duration increases or decreases proportionally to the voltage measurement signal S12. This time duration equals the duration TONof the on-time.

FIG. 10illustrates a modification of the on-time control circuit8shown inFIG. 8. The on-time control circuit8shown inFIG. 10additionally includes a function generator84that receives the feedback signal SFBand outputs a signal that is exponentially dependent on the feedback signal SFB. The multiplier82receives a function generator output signal S84in this example. Using a signal that is exponentially dependent on the feedback signal SFBinstead of the feedback signal SFBis basically known and, for example, disclosed in DE 197 25 842 A1. Thus, no further explanation is required in this regard. The on-time controlled by the variable on-time control circuit8shown inFIG. 10is proportional to the voltage measurement signal S12and proportional to eSFB, wherein e is Euler's number.

Instead of using the signal generator84shown inFIG. 10, which calculates eSFB, two signal generators (function generators)85,86may be implemented, as illustrated inFIG. 11. A first one85of these signal generators85,86generates a first output signal SNthat is dependent on the feedback signal SFBsuch that the first output signal SNincreases as the feedback signal SFBincreases. This first function generator output signal SNis received by the multiplier82. A second one86of the function generators is configured to generate a second output signal SDsuch that the second output signal SDdecreases as the feedback signal SFBincreases. This second output signal SDis received by the ramp signal generator83and is configured to adjust a slope of the ramp signal SRAMP. One example of this ramp signal generator83is illustrated inFIG. 12.

The ramp signal generator83according toFIG. 12includes a current source831and a capacitor832connected in series with the current source831. The current source831is controlled by the second function generator signal SDsuch that a current I831of the current source831increases as the function generator signal SDincreases and decreases as the function generator signal SDdecreases. According to one example, the current I831is essentially proportional to the function generator signal SD. A voltage V832across the capacitor832forms the ramp signal SRAMPin this ramp signal generator83. A switch833connected in parallel with the capacitor832is controlled by a logic834dependent on the start signal SSTARTand the end signal S8. According to one example, the logic834is configured to reset the ramp signal SRAMPby closing the switch833each time the end signal S8indicates that the end of the on-time has been reached. Further, the logic is configured to start a new ramp of the ramp signal SRAMPby opening the switch933when the start signal SSTARTindicates that the on-time of a new drive cycle has started.

The function generators85,86can be digital function generators, wherein the ramp signal generator83and the comparator may be implemented using analog circuits. In this case, digital-to-analog converters (DACs) may be connected downstream the signal generators85,86. According to one example, the multiplier82may be implemented as multiplying DAC, so that DAC and multiplier is implemented by the same circuit.

FIG. 13illustrates one example of the first signal generator output signal SNand the second signal generator output signal SD. Referring toFIG. 13, each of these signals may be a piecewise linear signal, wherein the first signal SNincreases as the feedback signal SFBincreases, wherein slopes of the piecewise linear sections (a.k.a., portions) increase as the feedback signal SFBincreases. The second signal SDdecreases as the feedback signal SFBdecreases, wherein a slope of this second signal SDat first increases and then decreases. By implementing the on-time control circuit8in accordance with the examples illustrated inFIGS. 11, 12 and 13, the duration of the on-time is proportional to the voltage measurement signal S12and approximately proportional to eSFB.

Referring to the above, the voltage measurement circuit6measures the auxiliary voltage VAUXduring the on-time and the off-time in one or more drive cycles and is configured to output the voltage measurement signal S12such that it is proportional to the sum of the magnitudes V1, V2of the auxiliary voltage VAUXduring the on-time and the off-time.

One example of the voltage measurement circuit6is illustrated inFIG. 14. This voltage measurement circuit6includes a first capacitor601connected in series with a first switch603and a second switch604, and a second capacitor602connected in series with a third switch605and a fourth switch606, a fifth switch607connected between the first and second capacitors601,602, a sixth switch608connected to the first capacitor602, a sample-and-hold (S/H) circuit609coupled to the second capacitor602, and a logic610configured to control operation of the switches603-608and the S/H-circuit609. A first series circuit including the first capacitor601and the first and second switches603,604and a second series circuit including the second capacitor602and the third and fourth switches605,606are each connected between an auxiliary voltage input42and a ground input43of the control circuit4. At the auxiliary voltage input42, the control circuit4is connected to the auxiliary winding23, and the ground input43is connected to the ground node GND, so that the auxiliary voltage VAUXis available between the auxiliary voltage input42and the ground input43.

The logic610is configured to receive the drive signal SDRVand is configured to control the first and second switch603,604such that the first capacitor601is connected between auxiliary voltage input42and the ground input43for a first time period during the on-time so that at the end of this time period a voltage across the first capacitor601equals the magnitude V1of the auxiliary voltage VAUXduring the on-time. Referring to the above, the auxiliary voltage VAUXis negative during the on-time, so that, after the first time period, a potential at a first capacitor node, which is the capacitor node connected to the auxiliary voltage input42by the first switch603during the first time period, is negative relative to a potential at a second capacitor node, which is the capacitor node connected to the second electronic switch604.

Further, the logic609is configured to control the third and fourth switch605,606such that the second capacitor602is connected between auxiliary voltage input42and the ground input43for a second time period during the off-time so that at the end of this second time period a voltage across the second capacitor602equals the magnitude V2of the auxiliary voltage VAUXduring the off-time. Referring to the above, the auxiliary voltage VAUXis positive during the off-time, so that, after the second time period, a potential at a first capacitor node, which is the capacitor node connected to the auxiliary voltage input42by the third switch605during the second time period, is positive relative to a potential at a second capacitor node, which is the capacitor node connected to the fourth electronic switch604.

Referring toFIG. 14, the fifth switch607is connected between the second capacitor node of the first capacitor601and the second capacitor node of the second capacitor602and the sixth switch is connected between the first capacitor node of the first capacitor602and the ground input43. Further, the S/H circuit609is connected to the first capacitor node of the second capacitor602. The logic610is further configured, after the second time period and before the off-time ends, to close the fifth and sixth switch607,608(while the remainder of the switches are open) and to activate the S/H circuit to sample the voltage at the first capacitor node of the second capacitor602. A voltage at the first capacitor node of the second capacitor602equals the magnitude V1of the auxiliary voltage VAUXsampled by the first capacitor601during the first time period plus the magnitude V2of the auxiliary voltage VAUXsampled by the second capacitor602during the second time period.

Another example of a voltage measurement circuit6is illustrated inFIG. 15. In this example, the voltage measurement circuit6includes a voltage limiter61and a resistor62connected in series between the auxiliary voltage input42and the ground input43of the control circuit4. The control circuit4may be implemented as an integrated circuit (IC). In this case, the resistor62may be an external resistor connected between the auxiliary winding23and a respective input of the IC.

Referring toFIG. 15, the voltage measurement circuit6further includes a current sensor63configured to measure a current IAUXfrom the auxiliary winding23via the resistor62and the voltage limiter61to the ground input43. This current IAUXis also referred to as auxiliary current in the following. An evaluation circuit64receives a current measurement signal S63that represents the auxiliary current IAUXfrom the current sensor and outputs the voltage measurement signal S12.

When the voltage measurement circuit6is implemented as illustrated inFIG. 15, the crossing detection circuit7may monitor a voltage VZCDacross the voltage limiter61instead of the auxiliary voltage. The voltage limiter is configured to clamp the voltage VZCDto a first (positive) level when the auxiliary voltage VAUXis positive and a second (negative) level when the auxiliary voltage VAUXis negative. According to one example, these voltage levels are higher than the reference voltage VREF1. The voltage VZCDacross the voltage limiter61, which may be referred to as clamped auxiliary voltage or crossing detection voltage, is not proportional to the auxiliary voltage VAUX. This voltage VZCD, however, is below the reference voltage VREF1each time the auxiliary voltage VAUXis below the reference voltage VREF1. Thus, the voltage VZCDacross the voltage limiter can be used to detect time instances when the auxiliary voltage VAUXcrosses the reference voltage VREF1. In each case, the crossing detection signal SZCDoutput by the crossing detection circuit7represents those time instances at which the auxiliary voltage VAUXcrosses the first reference voltage VREF1, such as zero.

When the auxiliary voltage VAUXis higher than the voltage limit defined by the voltage limiter61, an auxiliary current IAUXflows through the voltage limiter61. In the example shown inFIG. 15, a magnitude of the auxiliary current IAUXis essentially given by

IA⁢U⁢X=V⁢6⁢2R⁢6⁢2=VA⁢U⁢X-VZ⁢C⁢DR⁢6⁢2,(1)
where R62is a resistance of the resistor62and VZCDis the voltage across the voltage limiter61. According to one example, the voltage limiter61is implemented such that the voltage VZCDacross the voltage limiter61is significantly lower than the auxiliary voltage VAUXso that voltage across the voltage limiter is negligible compared to the auxiliary voltage. In this case, the auxiliary current IAUXmeasured by the current sensor63is essentially proportional to the auxiliary voltage VAUX, so that by measuring the auxiliary current IAUXthe auxiliary voltage VAUXand, therefore, the voltage measurement signal S12can be obtained.FIG. 16Aillustrates one example of the voltage limiter61and the current sensor63andFIG. 16Billustrates one example of the evaluation circuit64.

Referring toFIG. 16A, the voltage limiter61includes a first transistor N1connected between the auxiliary voltage input42and the ground input43of the drive circuit4. The first transistor N1clamps the crossing detection voltage VZCD. Driving the first transistor N1in an on-state so that it clamps the crossing detection voltage VZCDis explained in detail herein further below.

The voltage limiter61further includes a second transistor N2connected between a first circuit node M1and the ground node12, and a third transistor N3connected between the first circuit node M1and the auxiliary voltage input42. Further, a current regulator is configured to control a current IM1into the first circuit node M1in two different ways dependent on a polarity of the auxiliary voltage VAUX. The current IM1into the first circuit node is provided from a supply node M3where a supply voltage VDD is available. The supply voltage may be provided by power supply circuit (not shown in the drawings) in the control circuit4. This power supply may generate the supply voltage VDD based on the auxiliary voltage VAUXor based on any other input voltage received by the control circuit4.

When the auxiliary voltage VAUXis positive, the regulator controls the current IM1into the first circuit node M1such that the first transistor N1and the second transistor N2are operated in the same operating point and a current IN3through the third transistor N3is zero. In this case, a current level of a current IN2through the second transistor N2is proportional to a current IN1through the first transistor N1, wherein the current IN1through the first transistor N1equals the auxiliary current IAUX. According to one example, the first transistor N1and the second transistor N2have the same length and the same width. In this case, the current IN2through the second transistor N2and the auxiliary current IAUXhave the same current level.

According to one example, the regulator includes an operational amplifier OP1that has a first input connected to the first circuit node M1and second input connected to a second circuit node M2. A switch S2that is controlled by a comparator K1connects the second circuit node M2to the second input42when the auxiliary voltage VAUXhas the first polarity. In this case, the operational amplifier OP1controls the current IM1into the first circuit node M1such that the potential at the first circuit node M1equals the potential at the second input42, so that a voltage across the third transistor N3is zero. Thus, as mentioned above, the current IN3through the third transistor N3is zero.

The regulator further includes a variable resistor N7driven by the operational amplifier OP1and connected between the supply node M3and the ground node12, and a current mirror P1, P2. According to one example, the variable resistor N7includes a transistor driven by the operational amplifier. Optionally, a filter is connected between an output of the operational amplifier OP1and the transistor of the variable resistor N7. This filter may include a series circuit with a resistor R and a capacitor C.

The current mirror P1, P2is configured to mirror a current IN7through the variable resistor N7such that the current IM1into the first circuit node M1is proportional to the current IN7through the variable resistor N7, wherein a proportionality factor between the current through the variable resistor N7and the current IM1into the first circuit node M1is given by a current mirror ratio of the current mirror. According to one example, the current mirror ratio is 1:1, so that the current IM1into the first circuit M1equals the current IN7through the variable resistor N7. The regulator, via the variable resistor N7and the current mirror P1, P2, adjusts the current IM1into the first circuit node M1such that the current IN3through the third transistor N3is zero, so that—in a steady state of the regulator—the current IM1into the first circuit node M1equals the current IN2through the second transistor N2, wherein the latter is proportional to the auxiliary current IAUX. Thus, given the proportionality between the current IM1into the first circuit node M1and the current IN7through the variable resistor N7, the current through the variable resistor N7is proportional to the auxiliary current IAUX.

Referring toFIG. 16A, the voltage limiter61further includes a further transistor N5connected between an output transistor P2of the current mirror P1, P2and the first circuit node M1. This further transistor N5is connected as a diode. That is, a drain node of the further transistor N5is connected to its gate node. Further, gate nodes of the first, second and third transistors N1, N2, N3are connected to the drain/gate node of the further transistor, so that these transistors N1, N2, N3have the same electrical potential at their respective gate node. The first transistor N1and the second transistor N2are activated, so that they may conduct a current, as soon as the potential at their respective gate node reaches a level at which gate-source voltage of these transistors N1, N2becomes higher than the respective threshold voltages. According to one example, the first, second and third transistor N1-N3have the same threshold voltage. The threshold voltage of the fifth transistor N5may be lower than the threshold voltages of the first, second and third transistor N1, N2, N3.

When the auxiliary voltage VAUXis negative the switch S2controlled by the comparator K1connects the second circuit node M2to the ground input43and the third transistor N3is regulated such that the potential at the first circuit node M1equals ground potential GND. The auxiliary current IAUXis negative, that is, the auxiliary current IAUXflows in a direction opposite the direction illustrated inFIG. 16A. Further, in this operating state, the auxiliary current IAUXis given by the current IN3through the third transistor N3minus the current IN1through the first transistor N1. The current IN2through the second transistor N2is zero, and the current IM1into the first circuit node M1equals the current IN3through the third transistor N3. The current IN7through the variable resistor N7is again proportional to the current IM1into the first circuit node. As the first transistor N1and third transistor N3are operated in the same operating point, the current IN3through the third transistor N3is proportional to the auxiliary current IAUXwherein a proportionality factor is dependent on a size of the first transistor N1and a size of the third transistor N3.

Referring to the above, when the auxiliary voltage VAUXis positive, the current IN2through the second transistor N2is proportional to the auxiliary current IAUX, wherein a proportionality factor is dependent on a size of the first transistor N1and a size of the second transistor N3. Further, when the auxiliary voltage VAUXis negative, the current IN3through the third transistor N3is proportional to the auxiliary current IAUX, wherein a proportionality factor is dependent on a size of the first transistor N1and a size of the third transistor N3. The sizes of the first, second and third transistors can be adapted to one another such that a proportionality factor between a magnitude of the auxiliary current IAUXand the current IM1into the first circuit node M1is the same when the auxiliary voltage VAUX(and the auxiliary current IAUX) is positive and when the auxiliary voltage VAUX(and the auxiliary current IAUX) is negative. In this case, these transistors N1, N2, N3are implemented with different sizes.

According to another example, the first, second and third transistors N1, N2, N3have the same size and the current sensor additionally includes a further transistor N6. This further transistor N6is connected in parallel with the first transistor N1only when the auxiliary voltage VAUXis positive. This is achieved by a further switch S3connected in series with the further transistor N6and controlled by the comparator K1. The further transistor N6is controlled in the same way as the first transistor N1by the potential at the third circuit node M3. In this circuit, when the auxiliary voltage VAUXis positive, the current IN1through the first transistor N1and a current IN6through the further transistor N6each equals 50% of the auxiliary current IAUX. Further, the current IN2through the second transistor N2and the current IM1into the first circuit node M1equal 50% of the auxiliary current IAUX. When the auxiliary voltage VAUXis negative, the current IN3through the third transistor and, therefore, the current into the first circuit node M1also equals 50% of the auxiliary current, so that the proportionality factor between the magnitude of the auxiliary current IAUXand the current IM1into the first circuit node M1and, therefore, the proportionality factor between the magnitude of the auxiliary current IAUXand the current IN7through the variable resistor N7is the same when the auxiliary voltage VAUXis positive and when the auxiliary voltage VAUXis negative.

The clamping voltage, which is the voltage level at which the crossing detection voltage VZCDis clamped by the voltage limiter61, is predefined, but not fixed. This clamping voltage is defined by the characteristic curve of the first transistor N1and is dependent on a current level of the auxiliary current IAUX. Thus, at each voltage level of the auxiliary voltage VAUXthe clamping voltage is predefined by the first transistor N1, but not fixed. Basically, the higher the auxiliary current IAUXthe higher the clamping voltage. However, there is a square relationship between the clamping voltage and the auxiliary current IAUXso that variations of the clamping voltage dependent on the auxiliary current IAUXare essentially negligible.

According to one example, the first transistor N1is implemented such that a voltage drop across the first transistor N1is less than 5% or even less than 2% of the auxiliary voltage VAUXduring the demagnetization phase. In this case, despite variations, a magnitude of the crossing detection voltage VZCDis almost negligible compared to the magnitude of the auxiliary voltage VAUX, so that in each case the auxiliary current IAUXis essentially proportional to the auxiliary voltage VAUX.

In the current sensor63illustrated inFIG. 16A, the current IN7through the transistor forming the variable resistor N7and the electrical potential at a gate node G of this transistor N7represent the auxiliary current IAUXand, therefore, the auxiliary voltage VAUX. More specifically, the current IN7is proportional to a magnitude of the auxiliary current IAUX. That is, current IN7, independent of a current flow direction of the auxiliary current IAUX, always flows in the same direction and has a signal level that is proportional to the magnitude of the auxiliary current IAUX. The potential at the gate node forms the current measurement signal S63in this example. An evaluation circuit64configured to generate the measurement signal S12based on this current measurement signal S63is illustrated inFIG. 16B. The gate node G of the transistor N7is also referred to as output of the current sensor in the following, and the transistor N7is also referred to as output transistor of the current sensor.

The evaluation circuit shown inFIG. 16Bincludes a first capacitor C1coupled to the output G of the current sensor63through a first switch SHP and a second capacitor C2coupled to the output G of the current sensor63through a second switch SHS. The first switch SHP and the second switch SHS are controlled by a logic641dependent on the drive signal SDRV. The logic641is configured to control the first switch SHP such that the first capacitor C1is connected to the output G of the current sensor63for a first time period during the on-time so that at the end of this first time period a voltage VC1across the first capacitor C1equals the voltage at the output G of the current sensor63. The logic641is further configured to control the second switch SHS such that the second capacitor C2is connected to the output G of the current sensor63for a second time period during the off-time so that at the end of this second time period a voltage VC2across the second capacitor C2equals the voltage at the output G of the current sensor63.

Referring toFIG. 16B, the evaluation circuit64further includes a first transistor N8driven by the voltage VC1across the first capacitor C1and a second transistor N9driven by the voltage VC2across the second capacitor C2. According to one example, the first transistor N8and the second transistor N9have the same size as the output transistor N7of the current sensor63. In this case, a first current IN8through the first transistor N8equals the current IN7through the output transistor N7of the current sensor63during the first time period, wherein this current is proportional to the auxiliary voltage VAUXduring the on-time and, therefore, proportional to the first magnitude V1explained above. Further, a second current IN9through the second transistor N9equals the current IN7through the output transistor N7of the current sensor63during the second time period, wherein this current is proportional to the auxiliary voltage VAUXduring the off-time and, therefore, proportional to the second voltage V2explained above.

Referring toFIG. 16B, the evaluation circuit64further includes a first current mirror642having an input connected to the first transistor N8and a second current mirror643having an input connected to the second transistor N9. Outputs of the current mirrors642,643are connected. Further, the current mirrors642,643may have the same current mirror ratio so that an output current I64of the current mirrors642,643is proportional to a sum of the first and second currents IN8, IN9and, therefore, proportional to the sum of the first magnitude V1and the second magnitude V2. This output current I64may form the voltage measurement signal S12. Alternatively, as illustrated in dashed lines inFIG. 16B, a resistor65is connected in series with the output of the current mirrors642,643. In this case, the voltage measurement signal S12is a voltage across the resistor65.

FIG. 3illustrates operating the power converter in the quasi-resonant mode. In this operating mode, a delay time TDELbetween the demagnetization time instance tDEMAGand the end of the off-time is about one half of one oscillation period TOSC. Further, in this method, the on-time is adjusted dependent on the first measurement signal S12. In this method, the shorter the delay time TDELrelative to overall duration T of the drive cycle, the more accurate the waveform of the input current IINcan be controlled.

Another type of operating mode, which is referred to as second operating mode in the following, is explained in the following. In this operating mode, the delay time TDELis considered when adjusting the duration TONof the on-time. In this way, the waveform of the input current IINcan be regulated in an accurate way, even when the delay time TDELis not negligible as compared to the overall time duration T of the drive cycle. The second operating mode may include operating the power converter in the quasi-resonant (QR) mode or in a valley skipping QR mode. In the valley skipping QR mode, one or more valleys of the switch voltage V22are skipped before the switch22again switches on. In this operating mode, a delay time TDELbetween the demagnetization time instance tDEMAGand the time instance when the electronic switch22again switches on is longer than one half of a period of the parasitic oscillations. Signal diagrams that are based on the signal diagrams shown inFIG. 3and that illustrate operating the power converter in the valley skipping quasi-resonant mode are illustrated inFIG. 17.

As can be seen fromFIG. 17, in the valley skipping quasi-resonant mode, the delay time TDELmay include a significant portion of the overall time duration T of the drive cycle. In the QR mode and the valley skipping QR mode, the delay time TDELbetween the demagnetization time instance tDEMAGand the start of a new drive cycle is given by TDEL=(i−0,5)·TOSC, wherein TOSCis the duration of one period of the parasitic oscillations and i is the order number of the valley in which the electronic switch22switches on, wherein i is an integer and wherein i≥1. Equivalently, i−1 is the number of valleys that are skipped. The power converter operates in the QR mode when the electronic switch22switches on in the first (i=1) valley and operates in the valley skipping QR mode when i>1, that is, when one or more valleys are skipped.

FIG. 18shows a flowchart of one example of a method for operating the power converter in the quasi-resonant mode such that the output parameter has a predefined value and such the waveform of the average input current IIN_AVGessentially equals the waveform of the input voltage VIN. This method is based on the method illustrated inFIG. 5and is different from the method illustrated inFIG. 5in that the on-time in each drive cycle includes two on-time sections, a first on-time section and a second on-time section. The first on-time section, similar to the on-time in the first operating mode, is dependent on the sum of the first measurement value and the second measurement value and the feedback signal (104), wherein the first and second measurement values are obtained in one or more previous drive cycles. The second on-time section is dependent on the second measurement value obtained in the previous drive cycle, the duration of the first on-time section in the instantaneous drive cycle, and the delay time between the demagnetization of the transformer and the begin of a new drive cycle in the previous drive cycle (105).

FIG. 19illustrates one example of a control circuit4configured to operate the power converter in accordance with the method illustrated inFIG. 18. This control circuit4is based on the control circuit shown inFIG. 6and is different from the control circuit shown inFIG. 6in that the drive circuit5additionally receives a further voltage measurement signal S2, wherein this further voltage measurement signal S2represents the second measurement value V2, that is, the magnitude of the auxiliary voltage VAUXduring the off-time. The voltage measurement signal S12is also referred to as first voltage measurement signal in the following, and the further voltage measurement signal S2is also referred to as second voltage measurement signal in the following.

One example of the voltage measurement circuit6configured to output the first voltage measurement signal S12and the second voltage measurement signal S2is illustrated inFIG. 20. This voltage measurement circuit6is based on the voltage measurement circuit illustrated inFIG. 14and additionally includes a further S/H circuit611. This further S/H circuit611is controlled by the logic610and configured to sample the voltage V2across the first capacitor601at the end of the second time period.

According to another example, the voltage measurement circuit6is based on the voltage measurement circuit illustrated inFIGS. 16A and 16B, wherein just one modification in the evaluation circuit64is required in order to output both the first voltage measurement signal S12and the second voltage measurement signal S2. One example of a corresponding evaluation circuit64is illustrated inFIG. 21. In this evaluation circuit64, the second current mirror643includes two outputs, a first output connected to the output of the first current mirror642, and a second output providing an output current proportional to the second current IN9explained above. This output current is proportional to the second magnitude V2of the auxiliary voltage VAUXand forms the second voltage measurement signal S2. Alternatively, a resistor66is connected in series to the second current mirror output, so that the second voltage measurement signal S2is a voltage.

FIG. 22illustrates one example of the drive circuit5shown inFIG. 19. This drive circuit5is based on the drive circuit shown inFIG. 7and additionally includes a zero crossing controller53that receives the feedback signal SFBand outputs a zero crossing reference signal SZC_REF, a counter54that receives the zero crossing reference signal SZC_REFand the zero crossing detection signal SZCD, and a further on-time control circuit9connected between the on-time control circuit8and the latch51. The on-time control circuit8is also referred to as first on-time control circuit and the further on-time control circuit9is also referred to as second on-time control circuit in the following. The second on-time control circuit9receives the end signal S8from the first on-time control circuit8and outputs an end signal S9to the latch51. The end signal S8from the first on-time control circuit8, which is also referred to as first end signal in the following, indicates an end of the first on-time section, and the end signal S9from the second on-time control circuit9, which is also referred to as second end signal in the following, indicates an end of the second on-time section explained above.

The second on-time control circuit9further receives the feedback signal SFBand the further voltage measurement signal S2, the start signal SSTARTand the zero crossing reference signal SZC_REF. The zero crossing reference signal SZC_REFrepresents the delay time TDELbetween the demagnetization time instance tDEMAGand the start of a new drive cycle, that is, the zero crossing reference signal SZC_REFrepresents the number of zero crossings of the auxiliary voltage VAUXthat are allowed to occur before a new drive cycle starts. This zero crossing reference signal SZC_REFis dependent on the feedback signal SFB.

According to one example, the feedback signal SFBis generated such that the feedback signal SFBdecreases as the power consumption of the load decreases. Further, the zero crossing reference signal SZC_REFmay be is generated such that the number of zero crossings that are allowed to occur before a new drive cycle start decrease as the feedback signal SFBincreases. One example of such dependency of the zero crossing reference signal SZC_REFon the feedback signal SFBis illustrated inFIG. 23.

Referring toFIG. 22, the counter54receives the zero crossing detection signal SZCDand the zero crossing reference signal SZC_REFand is configured to generate the start signal SSTARTwhen, during the off-time, the number of zero crossings defined by the zero crossing reference signal SZC_REFhas occurred. The delay element52may delay generating the start signal SSTARTfor one quarter of one period TOSCof the parasitic oscillations, as already explained with reference toFIG. 7.

The first on-time control circuit8may be configured in accordance with any of the examples explained herein before. In particular, the first on-time control circuit8may be configured in accordance with the example illustrated inFIG. 10. One example of the second on-time control circuit9is illustrated inFIG. 24.

The second on-time control circuit9shown inFIG. 24is similar to the first on-time control circuit8shown inFIG. 10and includes a comparator91that receives a second ramp signal SRAMP2from a ramp signal generator93and a reference signal S98, wherein this reference signal S98is proportional to the delay time TDEL, the second measurement signal S2, and inversely proportional to the time duration since the beginning of the instantaneous on-time. This reference signal S98is provided by a function generator98that receives the start signal SSTART, which includes the information on the beginning of the instantaneous on-time. Further, the function generator98receives a signal that is proportional to the second measurement signal S2, and the delay time TDEL. The information on the delay time TDELis included in a signal S94that is obtained from the zero crossing reference signal SZC_REFby subtracting 0.5 by a subtractor94. This signal S94is multiplied with the second measurement signal S2and either the feedback signal SFBor a signal dependent on the feedback signal.

As explained above, instead of the feedback signal SFBan exponential feedback signal eSFBor, as explained with reference toFIGS. 11 and 13instead of a function generator calculating eSFBtwo function generators, each implementing a piecewise linear function may be used. In the example illustrated inFIG. 24, two such function generators are used. A first function generator95and a second function generator96. These function generators95,96can be the same function generators as the function generators85,86in the first on-time control circuit8. That is, one first function generator may be used as the first function generator85in the first on-time control circuit8and the first function generator95in the second on-time control circuit9. Equivalently, one and the same function generator may be used as the second function generator86in the first on-time control circuit8and the second function generator96in the second on-time control circuit9. These function generators can be digital function generators wherein the ramp signal generators83,93may be implemented using analog circuit elements. Further, the function generator98illustrated inFIG. 24may be implemented using analog circuit elements. In this case, digital-to-analog converters (DACs) may be connected between the function generators96and95and the ramp signal generator93and the multiplier97. When the function generators85,95in the first and second on-time control circuits8,9are implemented using only one function generator only one DAC is required. Equivalently, when the function generators86,96in the first and second on-time control circuits8,9are implemented using only one function generator only one DAC is required.

Referring toFIG. 24, the multiplier97multiplies the first function generator output signal SNwith the delay time signal S94. A further multiplier92multiplies the result of the first multiplier97with the further measurement value S2, wherein an output signal S92of the second multiplier92is received by the function generator98. AlthoughFIG. 24shows two multipliers92,97, this is only an example. According to another example, the multiplier92is a multiplying digital-to-analog converter and the multiplier97is a digital multiplier.

One example of the ramp signal generator93shown inFIG. 24is illustrated inFIG. 25. This function generator93is implemented in the same way as the ramp signal generator83illustrated inFIG. 12and includes a series circuit with a current source931and a capacitor932. The second ramp signal SRAMP2is the voltage V932across the capacitor932. A switch933is connected in parallel with the capacitor932and is controlled by a logic934dependent on the first end signal S8and the second end signal S9. According to one example, the logic934is configured to close the switch933before the first end signal S8indicates that the end of the first on-time section has been reached. When the first end signal S8indicates that the end of the first on-time section has been reached, the logic934opens the switch933in order to generate a ramp of the ramp signal. The ramp signal generator is reset by the second end signal S9, that is, the switch933is closed, when the second end signal S9indicates that the second ramp signal SRAMP2has reached the second reference signal S98, that is, when the second end signal S9indicates that the end of the second on-time section has been reached.

The function of the drive circuit5with the first and second on-time control circuits8,9is illustrated inFIG. 26.FIG. 26illustrates signals diagrams of the auxiliary voltage VAUX, the reference signals S82, S98(which are referred to as first and second reference signals in the following) and the first and second ramp signals SRAMP1, SRAMP2. In particular,FIG. 26illustrates generating the first and second on-time sections TON1, TON2of the on-time. As illustrated inFIG. 26, the first reference signal S82in one drive cycle is dependent on the first measurement signal S12obtained in a previous drive cycle. The “previous drive cycle” can be the drive cycle directly preceding the instantaneous drive cycle. This, however, is only an example. It is also possible, to obtain the first measurement signal S12in one drive cycle and to use this first measurement value S12in two or more subsequent drive cycles. Further, the first measurement signal S12the first measurement signal S12may be generated based on a first measurement value V1and a second measurement value V2obtained in different preceding drive cycles.

As can be seen fromFIG. 26and as explained before, the first on-time section TON1ends when the first ramp signal SRAMP1, which starts at the beginning of the instantaneous drive cycle, reaches the first reference signal S82, wherein the first reference signal S82is proportional to the first measurement signal S12and dependent on the feedback signal SFB. The second on-time section TON2starts when the first on-time section TON1ends, wherein at the beginning of the second on-time section TON2the second ramp signal SRAMP2starts. The second reference signal S98starts at the beginning of the instantaneous drive cycle, wherein, as explained above, a start level is given by the multiplier output signal S92, which is proportional to the second measurement signal S2and the delay time signal S92and is dependent on the feedback signal SFB. Further, the second reference signal S98decreases inversely proportional to the time since the beginning of the instantaneous drive cycle. The second on-time section TON2ends when the second ramp signal S98, which may increase linearly, reaches the second reference signal S98. In this case, a duration of the second on-time section TON2is proportional to the second measurement signal S2and the delay time signal S94. Further, the duration of the second on-time section is inversely proportional to the time period since the beginning of the on-time. In this way, the duration of the second on-time section TON2is dependent on the duration of the first on-time section Tom. Thus, for a given second measurement signal S2and a given delay time signal S94, the longer the first on-time section TON1the shorter the second on time section TON2.

Referring to the above, the zero crossing reference signal SZC_REFchanges in steps of one (1) dependent on the feedback signal SFB. Consequently, the delay time signal S94changes in steps of one dependent on the feedback signal. Such change in the zero crossing reference signal SZC_REF, however, does not result in an abrupt change of the output power, because such change is considered in the second on-time section TON2. Thus, when the zero crossing reference signal SZC_REFincreases/decreases the duration of the second on-time section TON2increases/decreases.

According to one example, generating the zero crossing reference signal SZC_REFis synchronized such that the zero crossing reference signal does not change during the delay time TDEL. For this synchronization, the zero crossing controller53illustrated inFIG. 22may receive the drive signal SDRV. According to one example, the zero crossing reference signal SZC_REFis updated based on the feedback signal SFBonce in each drive cycle. The zero crossing reference signal SZC_REFmay be updated, for example, at the beginning of the off-time. Basically, it can be assumed that the zero crossing reference signal SZC_REFis constant over several drive cycles. Thus, it is possible to adjust the second on-time section in the instantaneous drive cycle based on the zero crossing reference signal SZC_REFused in the previous drive cycle to adjust the delay time or based on the zero crossing reference signal SZC_REFthat will be used in the instantaneous drive cycle to adjust the delay time.

On example of the function generator98and its functionality are illustrated inFIGS. 27 and 28. This function generator98does not exactly output a signal that is inversely proportional to the time since the beginning of the instantaneous drive cycle, but approximates a 1/t function using exponential functions. Referring toFIG. 27, the function generator includes a capacitor981. This capacitor981is charged via an input switch982by the signal S92which is proportional to the delay time and the second measurement signal S2and which is dependent on the feedback signal SFB. This input switch982is opened by a first delay element983at a first time instance t1. After the first time instance t1, the capacitor981is discharged through a resistor network. The capacitor981and the resistor network form an RC element, wherein an RC constant of the RC element is increased stepwise over the time so that a discharge rate of the capacitor decreases over the time and the voltage V981across the capacitor981approximates the 1/t function. More specifically, the voltage across the capacitor981is approximately proportional to 1/(t−t0), wherein t0denotes the time instance when the on-time starts. The voltage V981across the capacitor981forms the second reference signal S98in this example.

In the example illustrated inFIG. 27, the resistor network includes three resistors, a first resistor986, a second resistor987, and a third resistor988that are connected in series, wherein the series circuit is connected in parallel with the capacitor981. A first switch989is connected in parallel with a series circuit formed by the second and third resistors987,988, and second switch990is connected in parallel with the third resistor988.

Before the first time instance t1, the capacitor voltage V981is maintained at the voltage level defined by the multiplier output signal S92. Each of the input switch982and the first and second switches989,990is switched on before the first time instance t1. After the first time instance t1, the capacitor981is discharged via the first resistor986and the first switch989, wherein the first switch989shorts the second and third resistors987,988. At a second time instance t2the first switch989is opened by a second delay element984, and the capacitor981is discharged via the first resistor986and the second resistor987, wherein the second switch990shorts the third resistor988. Finally, at a third time instance t3the second switch990is opened by a third delay element985, and the capacitor981is discharged via the first resistor986, the second resistor987, and the third resistor.

In the function generator illustrated inFIG. 28, an 1/t function is approximated using three exponential capacitor discharge functions with different RC time constants such that at least between the first time instance t1and a fourth time instance the capacitor voltage V981is approximately proportional to 1/(t−t0). Between the beginning of the on-time at time instance t0and the first time instance, the capacitor voltage V981is constant. According to one example, a time period between the beginning of the on-time and the first time instance t1is shorter than an expected minimum of the duration of the first on-time section.

Referring to the above, the power converter, in the first and second operating mode regulates the output parameter such that it has a predefined level and regulates the input current IINsuch that an average waveform of the input current IINis proportional to the input voltage VIN. This is explained with reference to the second operating mode in the following.

In the steady state, the integral of the voltage V211across the primary winding211over one drive cycle is zero,
f0TV211dt=0  (2a).
Based on equation (2a), given that the auxiliary voltage VAUXis proportional to the inductor voltage V211, and considering the waveforms illustrated inFIG. 17the following relationship applies for the first and second measurement values V1, V2, the on-time duration TONand the demagnetization duration TDEM:

V⁢⁢1·TO⁢N=V⁢⁢2·TD⁢E⁢M=>TD⁢E⁢M=TO⁢N·V⁢1V⁢2.(3⁢a)
Further, a peak I2PKof the inductor current I2is given by

I⁢⁢2P⁢K=VINL·TO⁢N,(4⁢a)
wherein VINis the input voltage and L is the inductance of the inductor. More specifically, L is the inductance of the primary winding211of the transformer21. Referring to the above, the inductor current I2equals the input current IIN. Further, referring toFIG. 17, the inductor current I2has a triangular waveform during the on-time. An average IIN_AVGof the input current IINis then given by

IINA⁢V⁢G=I⁢⁢2P⁢K2·TO⁢NT=VIN2·L·TO⁢N·TO⁢NT.(5⁢a)
Further, in order to achieve a proportionality between the input voltage VINand the average input current IIN_AVG, an input impedance of the power converter should be essentially constant at a given power consumption of the load, that is,

ZIN=VINIINA⁢V⁢G=c,(6⁢a)
wherein ZINdenotes the input impedance of the power converter and c is a constant that is dependent on power consumption of the load. Basically, the higher the power consumption of the load, the lower the input impedance ZIN. Based on equations (3a), (5a) and (6a), the input impedance can be expressed as

ZIN=⁢VINVIN2·L·TON·TONT=⁢2·LTON·TTON=⁢2·LTON·TON+TDEM+TDELTON=⁢2·LTON·TON+TON·V1V2+TDELTON=⁢2·LTON·(1+V1V2+TDELTON)=⁢2·LTON·1V⁢⁢2⁢(V⁢⁢2+V⁢⁢1+V⁢⁢2·TDELTON).(7⁢a)
Based on equation (7a), the desired duration TONof the on-time can be expressed as

In the second operating mode explained above, adjusting the duration TONof the on-time in accordance with equation (8a) is achieved by having the first on-time section and the second on-time section. Referring to the above, the duration TON1of the first on-time section is proportional to the sum V1+V2of the first and second measurement values V1, V2. In the first on-time controllers8illustrated inFIGS. 8, 10 and 11the first measurement signal S12that is used to adjust the duration TON1of the first on-time section represents the sum V1+V2of the first and second measurement values V1, V2. In equation (8a), the term V1+V2represents the first on-time section.

Referring to the above, the duration TON2of the second on-time section is proportional to the second measurement value V2and the delay time TDELand inversely proportional to the duration since the beginning of the on-time, that is inversely proportional to the duration TONof the on-time. In the second on-time controller9illustrated inFIG. 24, the second measurement signal S2represents the second measurement value V2and the delay time signal S94represents the delay time TDEL. Further, the signal value of the function generator signal S98is proportional to the second measurement signal S2and the delay time signal S94, so that duration TON2of the second on-time section is proportional to the delay time TDELand the second measurement value V2. Further, the function generator output signal S98is inversely proportional to the time that has elapsed since the beginning of the on-time, so that the duration of the second on-time section is proportional to the duration of the (instantaneous) on-time. In equation (8a), the term

Referring to the above, each of the first on-time section and the second on-time section is dependent on the feedback signal SFBin the same way. This feedback signal SFBis represented by the term

Referring to equation (8a), when TDELis short relative to the duration of the on-time, the on-time is approximately given by

TO⁢N=2·LZIN·V⁢⁢2·(V⁢⁢2+V⁢⁢1),(9⁢a)
which represents operating the power converter in the first operating mode.

Although operating a power converter in a first operating mode and a second operating mode has been explained with reference to a flyback converter, this is only an example. These operating methods are not restricted to be used in a flyback converter, but may be used in other types of power converters, such as a boost converter as well. An example of a boost converter is illustrated inFIG. 29.

While the inductor21in the flyback converter is a transformer, the inductor21in the boost converter is a choke, for example, and is connected in series with the switch22, wherein the series circuit including the inductor21and the electronic switch22is connected to the input11,12. The rectifier circuit3is connected between a circuit node at which the inductor21and the switch22are connected and the output13,14. In this type of power converter, the input voltage VINand the output voltage VOUTmay be referenced to the same potential. Thus, the coupler16may be omitted.

The auxiliary winding23is inductively coupled to the inductor21, and the auxiliary voltage VAUXis proportional to a voltage V21across the inductor21.

Like operating the electronic switch in the flyback converter, operating the electronic switch22in a switched-mode fashion includes operating the electronic switch22in a plurality of successive drive cycles, wherein in each of these drive cycles the electronic switch22switches on for an on-time and switches off for an off-time. Signal diagrams that correspond to the signal diagrams shown inFIG. 17, but apply to a boost converter are illustrated inFIG. 30.

As can be seen fromFIG. 30, operating the boost converter in successive drive cycles is very similar to operating the flyback converter in successive drive cycles. During the on-time, the inductor current I2decreases and the inductor21is magnetized. During the off-time, the inductor21is demagnetized, and parasitic oscillations occur during the delay time between the end of the demagnetization period and the start of a new drive cycle. Differences between operating the boost converter and operating the flyback converter are: (a) in the boost converter, the inductor current decreases over the demagnetization period TDEM; (b) the inductor voltage V21, during the demagnetization period TDEM, is essentially given by the input voltage VINminus the output voltage VOUT; and the switch voltage V22during the demagnetization period TDEMessentially equals the output voltage VOUT. Nevertheless, the boost converter can be operated in the first and second operating mode in the same way as the flyback converter explained above. This can be seen from equations (2b)-(8b) below. These equations correspond to equations (2a)-(8a), but apply to the boost converter.

In the steady state, the integral of the voltage V21across the inductor over one drive cycle is zero,
f0TV21dt=0  (2b).
Based on equation (2b), given that the auxiliary voltage VAUXis proportional to the inductor voltage V21, and considering the waveforms illustrated inFIG. 30the following relationship applies for the first and second measurement values V1, V2, the on-time duration TONand the demagnetization duration TDEM:

V⁢⁢1·TO⁢N=V⁢⁢2·TD⁢E⁢M=>TD⁢E⁢M=TO⁢N·V⁢1V⁢2.(3⁢b)
Further, a peak I2PKof the inductor current I2is given by

I⁢⁢2P⁢K=VINL·TO⁢N,(4⁢b)
wherein VINis the input voltage and L is the inductance of the inductor21. The inductor current I2equals the input current IIN. Further, referring toFIG. 30, the inductor current I2has a triangular waveform during the on-time TONand the demagnetization time TDEM. An average IIN_AVGof the input current IINis then given by

IINA⁢V⁢G=I⁢⁢2P⁢K2·TO⁢N+TD⁢E⁢MT=VIN2·L·TO⁢N·TO⁢N+TD⁢E⁢MT.(5⁢b)
Further, in order to achieve a proportionality between the input voltage VINand the average input current IIN_AVG, an input impedance of the power converter should be essentially constant at a given power consumption of the load, that is,

ZIN=VINIINA⁢V⁢G=c,(6⁢b)
wherein ZINdenotes the input impedance of the power converter and c is constant that is dependent on power consumption of the load. Basically, the higher the power consumption of the load, the lower the input impedance ZIN. Based on equations (3b), (5b) and (6b), the input impedance can be expressed as

ZIN=⁢VINVIN2·L·TON·TON+TDEMT=⁢2·LTON·TTON+TDEM=⁢2·LTON·TON+TDEM+TDELTON+TDEM=⁢2·LTON·TON·(1+V1V2)+TDELTON·(1+V1V2)=⁢2·LTON·TON·(V2+V1)+TDEL·V⁢⁢2TON·(V2+V⁢⁢1).(7⁢b)
Based on equation (7b), the desired duration TONof the on-time can be expressed as

The term in brackets is the same as in equation (8a) so that the first and second on-time sections in the boost converter can be adjusted in the same way as in the flyback converter. Just the term

2·LZIN·1V⁢1+V⁢2
in equation (8b), that affects both the first and the second on-time section is different from the corresponding term

2⁢⁢LZIN·1V⁢2
in equation (8a) in that there is an inverse proportionality to V1+V2instead of only V2. This is due to the different topologies of the flyback converter and the boost converter. The term

2·LZIN·1V⁢1+v⁢2
in equation (6b) represents the feedback signal SFB.