Apparatus and method for controlling circulating current in an inverter system

A power conversion system is disclosed that provides multiphase power, including phase voltages for each phase of the multiphase power. The system comprises a plurality of inverters that generate PWM output voltages based on PWM control signals. A plurality of inductive components is configured to receive the PWM output voltages to generate the phase voltages. The PWM output voltages cause circulating current flows through the inductive components. A voltage controller is employed that is responsive to the phase voltages to generate voltage modulation signals corresponding to the phase voltages. A plurality of current sharing channels are respectively associated with each of the plurality of inductive components and are configured generate current sharing modulation signals in response to the circulating current flows. The PWM control signals are generated based on modulation signals obtained by combining the current sharing modulation signals and voltage modulation signals.

BACKGROUND

Power converters are used in aircraft electrical power systems as well as in power systems for other apparatus. The electrical power systems on current commercial aircraft are primarily provided by 400 Hz, three-phase 115V or 230V AC power sources. The power system may include one or more alternative low voltage DC power sources, such as a fuel cell stack or a battery, which provides input power to a pulse width modulated (PWM) power conversion system. Multiphase voltage outputs, such as three-phase voltages, maybe provided to an aircraft electric power distribution system, which provides the electrical power to a downstream distribution system. The downstream distribution system may have loads of various types, including, but not limited to, three-phase, single-phase, or another conversion system with DC loads, etc.

Many power converters, however, are not fully optimized for aircraft applications. Such power converters may be large and heavy, increasing the weight of the aircraft and limiting the volume available to other aircraft components. To address this issue, power converters may include paralleled or interleaved inverters. By using paralleled or interleaved inverters, the conversion systems may achieve higher power while concurrently using lower rating devices, thus also achieving higher efficiency, higher power density (measured in kW/kg), and weight and volume savings. Additionally, interleaved converters improve the harmonic reduction compared with non-interleaved converters. However, such converter systems may generate circulating current, which may degrade the performance or cause malfunctions, even to the point of damaging the user equipment connected to the power bus.

In power converters employing paralleled or interleaved inverters, the inverter outputs may be connected to inductive components to limit the circulating current. However, the inductive components often do not work well in low frequency circulating current. The low frequency circulating currents may cause saturation of the cores of the inductive components. Saturation of the cores may reduce the performance of the power converter as well as disable the conversion system.

Also in designing the power converter, large magnetizing inductances may be desired to reduce core loss and better limit high frequency circulating currents. However, this may require advanced and accurate knowledge of system parameters, which makes the design process complicated and time-consuming. For example, the complexity of control system design may be caused by a reduced margin on the flux of a given magnetic core when a large magnetizing inductance is desired.

Therefore, there are at least two problems associated with power conversion systems. They may experience reduced performance when used with high transient loads. Also, the design process may complicated and time-consuming.

SUMMARY

A power conversion system is disclosed that provides multiphase power, including phase voltages for each phase of the multiphase power. The system comprises a plurality of inverters that generate PWM output voltages based on PWM control signals. A plurality of inductive components are configured to receive the PWM output voltages to generate the phase voltages. The PWM output voltages cause circulating current flows through the inductive components. A voltage controller is employed that is responsive to the phase voltages to generate voltage modulation signals corresponding to the phase voltages. A plurality of current sharing channels are respectively associated with each of the plurality of inductive components and are configured generate current sharing modulation signals in response to the circulating current flows. The PWM control signals are generated based on modulation signals obtained by combining the current sharing modulation signals and voltage modulation signals. The features, functions, and advantages that have been discussed can be achieved independently in various embodiments or may be combined in yet other embodiments further details of which can be seen referring to the following description and drawings.

DESCRIPTION

FIG. 1is a block diagram of a power conversion system100. The power conversion system100includes a power drive section105and a control system110. The power conversion system100provides multiphase power to load115. Although the following embodiments are described in the context of a three-phase inverter system that supplies three voltages phased approximately 120° from one another, the embodiments may be extended to inverter systems having more or less than three-phases.

Example Power Drive Section

The power drive section105includes a plurality of inverters, each having a plurality of PWM output voltages. The number of PWM output voltages provided by each inverter is at least as large as the number of phases used to drive the load115.

In the exemplary power conversion system100ofFIG. 1, the power drive section105includes a first inverter120and a second inverter125, which receive DC power from a DC source127. The first inverter120and second inverter125share a common DC bus of the DC source127.

The first inverter120provides a first PWM output voltage Vinva1, a second PWM output voltage Vinvb1, and a third PWM output voltage Vinvc1. Similarly, the second inverter125provides a first PWM output Vinva2, a second PWM output voltage Vinvb2, and a third PWM output voltage Vinvc2. The PWM output voltages are interleaved.

The power conversion system100of the example is configured as a four-leg system. As such, the first inverter120and second inverter125each include neutral PWM output voltages. More particularly, first inverter120provides a first neutral PWM output voltage Vinvn1, and second inverter125provides a second neutral PWM output voltage Vinvn2. Such three-phase, 4-leg inverters may be used to maintain a desired sinusoidal output voltage waveform on each phase output over a desired range of loading conditions and transients. The power conversion system100need not be configured as such a four-leg system but will be discussed in the context of such an architecture.

The power drive section105also includes a plurality of inductive components. The inductive components may be in the form of inductors or inter-cell transformers. For purposes of describing the exemplary power conversion system100, inter-cell transformers are used as the inductive components. However, the inter-cell transformers ofFIG. 1may be replaced by inductors depending on system design parameters.

InFIG. 1, a first inter-cell transformer175is coupled to receive the first PWM output voltage Vinva1from first inverter120and the first PWM output voltage Vinva2from second inverter125. A second inter-cell transformer180is coupled to receive the second PWM output voltage Vinvb1and the second PWM output voltage Vinvb2. A third inter-cell transformer185is coupled to receive the third PWM output voltage Vinvc1and third PWM output voltage Vinvc2. A fourth inter-cell transformer190is coupled to receive neutral PWM output voltage Vinvn1and neutral PWM output voltage Vinvn2.

FIG. 2shows one manner in which the inter-cell transformers may be coupled with a power drive section105. As shown, the output terminals of first inverter120and second inverter125are connected to respective terminals of the first inter-cell transformer175, second inter-cell transformer180, third inter-cell transformer185, and the fourth inter-cell transformer190. The dots of the inter-cell transformers show the coupling configuration of the transformer windings. The inter-cell transformers of this example are configured as differential mode inductors. While the magnetizing inductance is used to limit the circulating current, the leakage inductance is used as inductance for an output LC filter respectively associated with each voltage phase. When the inter-cell transformers use a high permeability core, a high magnetizing inductance is obtained. Thus, a small circulating current and high efficiency may be achieved.

Returning toFIG. 1, the parallel operation of inverters120and125results in circulating currents in each inter-cell transformer. In the example, the circulating current through first inter-cell transformer175is the current difference (Ia1−Ia2) between the terminal carrying the first PWM output voltage Vinva1and the terminal carrying the first PWM output voltage Vinva2. The circulating current through second inter-cell transformer180is the current difference (Ib1−Ib2) between the terminal carrying the second PWM output voltage Vinvb1and the terminal carrying the second PWM output voltage Vinvb2. The circulating current through third inter-cell transformer185is the current difference (Ic1−Ic2) between the terminal carrying the third PWM output voltage Vinvc1and the terminal carrying the third PWM output voltage Vinvc2. The circulating current through the fourth inter-cell transformer190is the difference (In1−In2) between the terminal carrying neutral PWM output voltage Vinvn1and the terminal carrying neutral PWM output voltage Vinvn2.

The outputs of the inter-cell transformers are provided to a current sensing circuit195. Although the current sensing circuit195is shown at the outputs of the inter-cell transformers, it may alternatively be placed to monitor the current at the inputs of the inter-cell transformers.

The current sensing circuit195may include a plurality of current sensors, each respectively associated with a voltage phase. Here, each inter-cell transformer includes two output terminals. The two output terminal of each inter-cell transformer are coupled to a respective Hall effect current sensor before merging through the Hall effect current sensor in reverse directions at nodes coupled to provide the multiphase power to the load. In this way, the current difference, or the circulating current, between the two output currents from each inter-cell transformer is acquired.

InFIG. 1andFIG. 2, a first current sensor200is coupled to the output terminals of first inter-cell transformer175, where a first phase supply voltage VA is provided to the load115at node205. A second current sensor210is coupled to the output terminals of second inter-cell transformer180, where a second phase supply voltage VB is provided to the load115at node215. A third current sensor220is coupled to the output terminals of third inter-cell transformer185, where a third phase supply voltage VC is provided to the load115at node225. A fourth current sensor230is coupled to the output terminal of fourth inter-cell transformer190, where a neutral phase voltage Vn is provided to the load115at node235. As such, three-phase supply voltages (VA, VB, VC) are provided to the load115.

The inter-cell transformers suppress high-frequency circulating current. Low frequency circulating current passes through each inter-cell transformer and is sensed by the current sensing circuit195for low-frequency circulating current control.

A capacitor is coupled to each node carrying a voltage to the load115. The respective capacitor for each voltage supply phase and the inductance of the corresponding inter-cell transformer may be used as a filter for the voltage supply phase. InFIG. 2, a first capacitor240is coupled to node205and forms a filter with the leakage inductance of the first inter-cell transformer175and the fourth inter-cell transformer190to filter output phase voltage VA. A second capacitor245is coupled to node215and forms a filter with the leakage inductance of the second inter-cell transformer180and the fourth inter-cell transformer190to filter output phase voltage VB. A third capacitor250is coupled to node225and forms a filter with the leakage inductance of the third inter-cell transformer185and the fourth inter-cell transformer190to filter output phase voltage VC.

The power drive section105may also include a voltage sensing circuit263. As shown inFIG. 2, the voltage sensing circuit263includes a plurality of voltage dividers placed across capacitors240,245, and250to monitor the magnitudes of supply voltages VA, VB, and VC with respect to Vn. The divided voltage signals are provided to power control system110. In this example, the voltage divider includes resistors connected across each capacitor.

The power drive section105may include low-pass filters respectively associated with the current sensing circuit195and the voltage sensing circuit263. In the example ofFIG. 1, low-pass filters300are coupled to receive signals from the current sensing circuit195along current sensing bus305. Low-pass filters310receive voltages from the voltage sensing circuit263and provide output voltages Van, Vbn, and Vcn along voltage sensing bus315.

The Control System

Referring again toFIG. 1, the control system110is coupled to receive voltage signals Van, Vbn, Vcn on voltage sensing bus315for provision to a voltage control system325. The control system110is also coupled to receive signals from the current sensing circuit195for provision to a plurality of current sharing channels330. The outputs of the current sharing channels330and the outputs of the voltage control system325are provided to a plurality of combiners340. The outputs of the combiners340are modulation signals that are obtained by combining current sharing modulation signals generated by the current sharing channel330with voltage modulation signals generated by the voltage control system325. These modulation signals are supplied for comparison to carrier reference signals at carrier reference345and carrier reference350. Carrier reference345generates PWM control signals355to gate drivers360, which provide gate drive signals365to first inverter120. In a similar manner, carrier reference350generates PWM control signals370to gate drivers360, which provide gate drive signals375to second inverter125.

Exemplary Voltage Control System

An exemplary voltage control system325is shown inFIG. 3. In this example, voltage signals Van, Vbn, Vcn are supplied to analog-to-digital converter398, which converts the received voltage signals to digital signals va, vb, and vc on digital signal bus327. The digital signals on digital signal bus327are provided to a sequence decomposer400. The signals generated by the sequence decomposer400are provided to the input of an abc-to-dq transformer405. The abc-to-dq transformer405transforms the digital signals at its inputs into digital signals that may be manipulated in a dq coordinate system. Such manipulations in this example are executed by a voltage controller410, which receives the dq signals from the abc-to-dq transformer405. The voltage controller410executes operations on the dq signals from the abc-to-dq transformer405to generate corresponding dq output signals to a dq-to-abc transformer415. A voltage modulation signal determiner420operates on the abc signals from the dq-to-abc transformer415to generate respective voltage modulation signals Vam, Vbm, Vcm, Vnm, on digital signal bus425.

Exemplary Sequence Decomposition

As noted, the digital voltage signals on digital signal bus327are decomposed into positive, negative, and zero sequences by the sequence decomposer400. If load115is unbalanced, the three-phase voltage and current may oscillate in the dq coordinate system. Accordingly, it may be desirable to decompose the unbalanced voltage and/or current into three symmetric three-phase systems. A general example of how this may be done in any generic three-phase system is illustrated by the following equations:

[x_Ax_Bx_C]=[x_A,p+x_A,n+x_A,hx_B,p+x_B,n+x_B,hx_C,p+x_C,n+x_C,h]
where (xA,p,xB,p,xC,p) is the positive sequence vector for the three-phase voltage and/or current output, (xA,n,xB,n,xC,n) is the negative sequence vector, and (xA,h,xB,h,xC,h) is the zero sequence vector. The vector (xA,xB,xC) corresponds to the three-phase voltage and/or current vector.

The positive, negative, and zero sequences may be obtained using the following equations:

Assuming xABC=xABCmaxcos(ωt+φABC), thenxABC=xABCmax[cos(ωt+φABC)+j×sin(ωt+φABC)]. This sequence decomposition is illustrated in graphical form inFIG. 4and is applicable to the power conversion system100.

To obtain the vector form of the voltage and/or current, the imaginary part of the vector is obtained by executing a quarter of a fundamental cycle delay on the three-phase voltage and/or current time-domain signals. A block diagram showing one implementation of such a sequence decomposition algorithm configured to execute the mathematical operations above is illustrated inFIG. 5.

Example of Abc/Dq Transformations

A direct-quadrature-zero (dq) transformation is a mathematical transformation used to simplify the analysis of three-phase circuits. With balanced three-phase circuits, application of the dq transform reduces the three AC quantities to two DC quantities. Simplified calculations can then be carried out on these imaginary DC quantities before performing the inverse transform to recover the modified three-phase AC results. As such, dq transformation operations may simplify calculations executed by the voltage control system325.

One example of a dq transform as applied to a three-phase voltage is shown here in matrix form:

This transform is executed by the abc-to-dq transformer405on the received voltages. An inverse of this transform is executed by the dq-to-abc transformer415. The inverse transform is:

The voltage controller410may execute proportional-integral (PI) operations on the dq signals received from the abc-to-dq transformer405. To this end, voltage controller410may include a PI controller having the following frequency response:

In certain applications, the PI controller may be modified to meet both system stability and dynamic response requirements. Hence, a “two-pole controller” having two poles may be used. More particularly, the two-pole controller may have the following frequency response:

C⁡(s)=Kv⁡(s+ωv⁢⁢1)s×(s+ωv⁢⁢2)
Such a two-pole controller may provide higher bandwidth and higher magnitude/phase margin for the voltage controller410than the PI controller in the first example.

In this two-pole controller, ωv2is selected below the overshoot frequency of system voltage-to-control magnitude bode diagram, to provide high damping, hence ensure high magnitude margin for the system. The value for ωv1is selected to obtain the desired phase margin of the voltage-to-control system (60 degrees in the three-phase system described here), and Kvis selected as a trade-off between system robustness and bandwidth (response speed). The values for Kpand Kidetermined the gain and zero of the transfer function. The gain is selected as a trade-off between system robustness and bandwidth (response speed). The zero is selected to obtain desired phase margin.

Example of Current Sharing Channel

An example of the current sharing channel330is illustrated inFIG. 6. As shown, four differential digital circulating current signals are received on separate lines of bus413. Each differential circulating current is respectively associated with each inter-cell transformer and provided to a respective current sharing channel330. For simplicity, only the current sharing channel330associated with circulating current (Ia1−Ia2) of the first inter-cell transformer175is described. The remaining current sharing channels330associated with the second inter-cell transformer180, the third inter-cell transformer185, and the fourth inter-cell transformer190have the same structure. Two or more of the current sharing channels330for different voltage phases may operate in parallel in a generally concurrent manner.

The digital signals on bus413corresponding to circulating current signals (Ia1−Ia2) are provided to the input of a first amplifier430and to the input of a second amplifier435. The first amplifier430multiplies the circulating current signals by a factor of −0.5, while the second amplifier435multiplies the circulating current signals by a factor of +0.05. The output of the first amplifier430is provided to the input of a first current sharing controller440, and the output of the second amplifier435is provided to an input of a second current sharing controller445. The output450of the first current sharing controller440is provided to an input of a first combiner455, and the output460of the second current sharing controller445is provided to an input of a second combiner465. The signal on output450corresponds to a current modulation signal as generated by current sharing controller440. The signal on output460corresponds to a current modulation signal as generated by the second current sharing controller445. The amplifiers430and435place the current modulation signals out of phase with one another.

Besides the current modulation signals, each current sharing channel330receives a respective voltage modulation signal for a given phase of the three-phase voltage from bus425. Regarding the circulating current (Ia1−Ia2) of the first inter-cell transformer175, the corresponding voltage modulation signal Vam is provided to and input of first combiner455and to an input of the second combiner465. The first combiner455provides a first modulation signal at output470corresponding to a sum of the current modulation signal generated by current sharing controller440and the voltage modulation signal Vam generated by voltage control system325. The second combiner465generates a second modulation signal at output475corresponding to a sum of the current modulation signal generated by the second current sharing controller445and the voltage modulation signal Vam generated by voltage control system325. The modulation signal at output470may be provided to carrier reference circuit345for comparison with a corresponding carrier signal to generate the PWM control signals355used in controlling the first PWM output voltage Vinva1of the first inverter120. The modulation signal at output475may be provided to carrier reference circuit350for comparison with a corresponding carrier signal to generate PWM control signals370used in controlling the first PWM output voltage Vinva2of the second inverter125. In each instance, the PWM control signals are provided to the gate drivers360to the respective inverters.

Example of Current Sharing Controller

One example of a structure for a current sharing controller440(C(s)) is exemplified in the following equation:

Here, ωldefines a center frequency of a low-frequency resonant filter, ωfdefines a center frequency of a resonant fundamental frequency filter, Δωldefines a bandwidth of the resonant low-frequency filter, Δωfdefines a bandwidth of the resonant fundamental frequency filter, Kl0and Kf0define magnitudes of pass bands of the resonant low-frequency filter and resonant fundamental frequency filter, respectively. Kland Kfdefine peak gains of the resonant low-frequency filter and resonant fundamental frequency filter, respectively, and Cph(s) is a phase delay compensator providing phase compensation around the fundamental frequency. The resonant fundamental frequency controller has a center frequency proximate a fundamental frequency of the supply voltage of each phase of the multiphase (three-phase) voltage. It may also be viewed that each current sharing channel330has the same frequency response vis-à-vis the respective current sharing controllers.

The values for kpand kidetermine the gain and zero of the transfer function. The values are selected based on desired system robustness. The values of kpand kiare selected to ensure low cut off frequency of the “DC” part of C(s) to achieve the desired system robustness.

In a three-phase power system operating at 400 Hz, the value 400 Hz is assigned as the value of ωf, which corresponds to the fundamental frequency. The value for ωlis selected so that it is at a low frequency, such as in a range from about 1 to 20 Hz. The value for Δωlshould be a relatively large number compared to Δωf, which should be a small number. The values for Kl0and Kf0are selected to obtain a unity gain in the non-pass frequency band for the “low-frequency” and the “fundamental frequency” parts of C(s). The values for Kland Kfare selected to obtain high peak values at the center frequency of the low-frequency and fundamental frequency resonant controller, while the effect of Δωl and Δωf, Kl0 and Kf0on these values may also be considered. To this end, increasing Kland Kfwill have a similar effect as increasing Δωland Δωf(increasing the pass bandwidth of the low-frequency and fundamental frequency resonant controllers), or increasing Kl0and Kf0(increasing the gain in the non-pass bandwidth of the low-frequency and fundamental frequency resonant controllers).

The parameters of the phase-delay compensator Cph(s) are selected based on the phase delay caused by the current sensing circuit. For example, a 10-100 micro-second time delay could be caused by the current sensing circuit, which is equals to 1.44°-14.4° at fundamental frequency of 400 Hz. The phase delay compensator Cph(s) thus compensates for a 20-30 degree phase delay at the fundamental frequency ωf assistsin ensuring system stability.

The low cut-off frequency of the “DC” part of C(s) assists in providing system stability. The ωldefining the center frequency of the low-frequency resonant filter of C(s) can be selected so that it is in a range between the cut-off frequency of the “DC” part and the 400 Hz value of ωf. For example, ωlmay be in a range of 1 to 20 Hz, with as pass bandwidth in a range between about 10 Hz and 30 Hz. The center frequency of “fundamental frequency” part of C(s), as noted above, is at 400 Hz, and may have a very small pass bandwidth. The phase angle of the phase delay compensator Cph(s) at 400 Hz should be selected to compensate for the time delay caused by the current sensing circuit, and the magnitude before the cut-off frequency should be as close to unity as possible.

Using the foregoing guidelines, the values of C(s) for one embodiment of a three-phase system are:

FIGS. 7A-7Care Bode plots for the current sharing controller440(C(s)).FIG. 7Cshows the frequency and phase response associated with each current sharing controller, where the upper diagram485is in the s-plane coordinate system and shows the magnitude frequency response of a current sharing controller, and diagram490is the phase response of the current sharing controller440. In this example, the frequency and phase response of the DC filter is shown at495. The frequency and phase response of the low-frequency resonant filter is shown at500. The frequency and phase response of the resonant fundamental frequency filter is shown at505.

FIG. 7Bshows the frequency and phase response associated with the phase delay compensator Cph. More particularly, the upper diagram510shows the magnitude of the frequency response at515, while diagram520shows the phase response at525.

FIG. 7Care diagrams showing the overall composite frequency and phase responses of the current sharing controller, including that of the phase delay compensator. More particularly, the upper diagram525shows the composite magnitude frequency response, while lower diagram530shows the composite phase response. As illustrated, there is a peak535in the response shown in diagram525at the fundamental frequency of the voltage signals used to drive the load. Here, the current sharing controllers are designed for an aircraft, so the overall response the peak535occurs at a frequency of approximately 400 Hz. The composite phase also shows a peak phase shift proximate537at the fundamental frequency.

Digital Signal Processor (DSP) Implementation

FIG. 8illustrates a power conversion system100in which various signal processing operations take place in a DSP600. In the power conversion system100, the three-phase output voltage is provided to the load at operation605, and these output voltages are sensed at voltage sensing operation610and optional low pass filtering may take place at filtering operation615before the signals are provided to an analog-to-digital converter (not shown) of the DSP600for manipulation in the digital domain.

Once the sensed voltages are converted to digital signals, they are subject to a sequence decomposition operation620. The sequence decomposition operation620includes dividing the digital signals into positive, negative, and zero sequences. Such operations are described above in connection with the sequence decomposer400ofFIG. 3.

Each positive, negative, and zero sequence is subject to individual abc-dq transformations. In this example, the positive sequences are subject to transformation operations executed at abc-dq transformer625. The negative sequences are subject to transformation operations executed at abc-dq transformed630. The zero sequences are subject to transformation operations executed by abc-dq transformer635.

The d-axis and q-axis output of each abc-dq transformer625,630, and635are provided to two a voltage controller operating in the dq domain. In the illustrated example, the dq signals are provided to respective ones of a plurality of two-pole controllers640. The operations executed by the two-pole controllers640may be those described above in connection with the PI controllers used in the voltage controller410ofFIG. 3.

The outputs of the two-pole controllers640are subject to a dq-abc transform operation at645. The resulting abc signals are used in connection with generating modulation signals for each voltage phase of the three output supply voltages. The abc signals are provided directly to over modulation module650for execution of an over modulation technique. The over modulation technique may be any of several such techniques.

The abc transform of the neutral leg voltage is provided to a neutral leg modulation signal generator655before being processed by the over modulation module650. The signals provided at the outputs of the over modulation module650correspond to the voltage modulation signals of the voltage control system325described above in connection withFIGS. 1,3, and6.

A plurality of inter-cell transformers660are used to provide the three-phase output supply voltages to the load in response to PWM power signals received from the first inverter120and second inverter125. Signals corresponding to the circulating currents flowing through each inter-cell transformer of a plurality of inter-cell transformers660are on current sensing bus305for analog-to-digital conversion within the DSP600. The circulating current sensing may be accomplished in the manner shown inFIG. 1andFIG. 2. The signals on current sensing bus305are optionally provided to low-pass filters300before undergoing the analog-to-digital conversion within the DSP600. Because the circulating current contains double of the switching frequency signal and since the sampling frequency of digital controllers may be limited, close control of the sampling event timing of the digital controller may be needed. For example, sampling timing may be triggered at the peaks of PWM carrier signals to avoid introduction of a fake fundamental frequency component into the sampled circulating current.

InFIG. 8, only a single current sharing channel330is shown. However, DSP600executes operations for a plurality of current sharing channels330, each respectively associated with at least one corresponding inter-cell transformer of the plurality of inter-cell transformers660.

The current modulation signals are provided along a path670to inputs of digitally implemented combiner circuits340, where they are combined with corresponding voltage modulation signals to generate a pair of modulation signals for each phase of the three-phase voltage. As shown inFIG. 8, a first plurality of modulation signals675are provided from combiner circuits340to carrier reference circuit345, and a second plurality of modulation signals680are provided from combiner circuits340to the carrier reference circuit350. The outputs of carrier reference circuit345are used as PWM control signals355to control operation of the first inverter120(gate drivers360not shown). The outputs of carrier reference circuit350are used as PWM control signals370to control operation of the second inverter125(gate drivers360not shown).

Exemplary Control Method

FIG. 9shows a method700for controlling a power conversion system. As shown, 3-phase voltages are measured at705and provided to an optional low-pass filter at707. The analog output of the low pass filter is converted to digital signals at710, which are then subject to sequence decomposition at713. A voltage control algorithm is executed, in the dq coordinate system, on the decomposed signals at715. The outputs of the voltage control algorithm are transformed to abc coordinates at717. The resulting abc signals are used to generate voltage modulation signals at720.

In parallel with the operations shown at705through720, the method700conducts operations relating to the circulating currents flowing through the inter-cell transformers. At723, the circulating currents are measured and are subject to an optional low-pass filter operation at725. The filtered analog signals are converted to digital signals at727. The digital values of the circulating currents are passed to current sharing controllers at730. The current sharing controllers execute a number of operations at735. Among these, the current sharing controllers apply a DC cut-off filter, a low-pass resonant filter, and a fundamental frequency resonant filter to generate current sharing modulation signals. At740, the voltage modulation signals from 720 and the current sharing modulation signals from 735 are used to generate PWM control signals. The PWM control signals are provided to gate driver circuits, which provide switching voltages to inverters used in the power conversion system.

Exemplary Simulations

FIGS. 10A-10Bare exemplary signal graphs associated with voltages (Vinva1, VInvb1, Vinvc1and Vinva2, Vinvb2, Vinvc2) of a power conversion system that does not implement the control scheme set forth above. InFIG. 10A, phase current750corresponds to the current generated because of voltage outputs Vinva1, Vinvb1, Vinvc1from the inverter120. Phase current755corresponds to the current generated because of voltage outputs Vinva2, Vinvb2, Vinvc2from the second inverter125. The resulting circulating currents760through the corresponding inter-cell transformers175,180, and185have a low-frequency component that varies slowly over time in comparison to the fundamental frequency. This results in a corresponding large variation in the flux765(FIG. 10C) of the cores of the inter-cell transformers175,180, and185, which subjects the cores of the inter-cell transformers to potential saturation and limits the ability to design the inter-cell transformers using high permeability core materials.

A similar analysis applies to the currents associated with neutral voltage Vn signals, which are shown inFIG. 10B. More particularly, phase current770corresponds to the current generated because of voltage output Vinvn1from the first inverter120, while phase current775corresponds to the current generated because of the voltage Vinvn2from the second inverter125. The resulting circulating current780through the fourth inter-cell transformer190has a low-frequency component that varies slowly over time. This results in a corresponding large variation in the flux785(FIG. 10C) of the fourth inter-cell transformer190, which subjects the core of the fourth inter-cell transformer190to potential saturation, limiting the use of high permeability of the core materials in the fourth inter-cell transformer190.

FIGS. 11A-11Bare exemplary signal graphs associated with voltages (Vinva1, Vinvb1, Vinvc1and Vinva2, Vinvb2, Vinvc2) of the power conversion system100having the control scheme set forth above. InFIG. 11a, phase current800corresponds to the current generated because of voltages Vinva1, Vinvb1, Vinvc1from the first inverter120, while phase current805corresponds to the current generated because of the voltages Vinva2, Vinvb2, Vinvc2from the second inverter125. As shown, the low-frequency component inFIGS. 10A-10Bis missing from the resultant circulating current810through the corresponding inter-cell transformers175,180, and185. As a result, there are relatively no low-frequency variations in the flux815(FIG. 11C) of the inter-cell transformers and they may be designed using high permeability core materials.

A similar analysis applies regarding the neutral voltage Vn of the power conversion system100. InFIG. 11B, phase current820corresponds to the current generated because of voltage Vinvn1from the first inverter120, while phase current825corresponds to the current generated because of the voltage Vinvn2from the second inverter125. As shown, the low-frequency component inFIGS. 10B-10Cis missing from the resultant circulating current830through the fourth inter-cell transformer190. As a result, there are relatively no low-frequency variations in the flux835(FIG. 11C) of the fourth inter-cell transformer190and it may be designed using high permeability core materials.

Exemplary Application

Embodiments of the power conversion system100may be used in a wide variety of applications.FIG. 12describes how the power conversion system100is incorporated in the context of the exemplary method1000.FIG. 13describes how the power conversion system100may be incorporated into an aircraft1005. During pre-production, exemplary method1000may include specification and design1010of the aircraft1005and material procurement1015. During production, component and subassembly manufacturing1020and system integration1025of the aircraft1005takes place. Thereafter, the aircraft1005may go through certification and delivery1030to be placed in service1035. While in service by a customer, the aircraft1005is scheduled for routine maintenance and service1040(which may also include modification, reconfiguration, refurbishment, and so on of the power conversion system100).

As shown inFIG. 13, the aircraft1005produced by the exemplary method1000may include an airframe1043with a plurality of high-level systems1045and an interior1050. Examples of high-level systems1045include one or more of a propulsion system1055, an electrical system1060, a hydraulic system1065, and an environmental system1070. The electrical system1060may include one or more power conversion systems100of the type disclosed. The power conversion system100may provide power to many the high-level systems or other systems of the aircraft1005. Further, the power conversion system100may be included as part of the subject matter of the method ofFIG. 11. Although an aerospace example is shown, the principles described may apply to other industries, such as the automotive industry, computer industry, and the like.

Apparatus and methods embodied herein may be employed during any one or more of the stages of the exemplary method1000. For example, components or subassemblies corresponding to production process1010may be fabricated or manufactured in a manner similar to components or subassemblies produced while the aircraft1005is in service. Also, one or more apparatus embodiments, method embodiments, or a combination thereof may be utilized during the production stages, for example, by substantially expediting assembly of or reducing the cost of an aircraft1005. Similarly, one or more of apparatus embodiments, method embodiments, or a combination thereof may be utilized while the aircraft1005is in service, for example and without limitation, to maintenance and service1040.