Source driver not including any P-type digital-to-analog converter

A source driver includes at least a channel, and the channel includes an N-type digital-to-analog converter (NDAC) and an operational amplifier. The NDAC is utilized for receiving input data and selecting one of a plurality of gamma voltages to generate output data according to the input data. The operational amplifier is coupled to the NDAC, and is utilized for amplifying at least the output data to generate an amplified output data. In addition, the channel does not include any P-type digital-to-analog converter.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a source driver, and more particularly, to a source driver which does not include any P-type digital-to-analog converter.

2. Description of the Prior Art

Please refer toFIG. 1.FIG. 1is a diagram illustrating a prior art source driver100. As shown inFIG. 1, the source driver100includes two adjacent channels110and120, where the channel110includes a P-type digital-to-analog converter (PDAC)112, an N-type digital-to-analog converter (NDAC)114and a buffer amplifier116, and the channel120includes a PDAC122, an NDAC124and a buffer amplifier126. The PDAC is a digital-to-analog converter whose switches are all implemented by P-type Metal-Oxide-Semiconductors (PMOS), and the NDAC is a digital-to-analog converter whose switches are all implemented by N-type Metal-Oxide-Semiconductors (NMOS). In addition, multiplexers102,104and106are respectively coupled between the elements in the two channels110and120, and are used for switching the received signals.

In the operations of the source driver100, taking the channel100as an example and assuming that a supply voltage of the source driver is 18V, the PDAC112receives gamma voltages ranging from 9V to 18 V to prevent break-down between the source/drain region and the substrate of the PMOS. The NDAC114receives gamma voltages ranging from 0V to 9V to prevent break-down between the source/drain region and the substrate of the NMOS. Then, the PDAC112or the NDAC114selects one of the gamma voltages according to the input signal A0-AN−1or B0-BN−1, and outputs the selected gamma voltage. One of the buffer amplifiers116and126receives the output signal generated from the PDAC112or the NDAC114and outputs the buffered output signal Vout_1or Vout_2.

In addition, because each channel included in the prior art source driver100has a PDAC and an NDAC, the source driver100requires a large chip area due to the design rule of the PDAC and NDAC, causing higher cost of the source driver100. Furthermore, each buffer amplifier included in the prior art source driver100needs to be implemented by a rail-to-rail operational amplifier whose deviation of a head/tail voltage is great, causing poor quality of the amplified signal.

SUMMARY OF THE INVENTION

It is therefore an objective of the present invention to provide a source driver having a smaller chip area to reduce the cost of the source driver.

According to one embodiment of the present invention, a source driver comprises at least a channel, and the channel comprises an N-type digital-to-analog converter (NDAC) and an operational amplifier. The NDAC is utilized for receiving input data and selecting one of a plurality of gamma voltages to generate output data according to the input data. The operational amplifier is coupled to the NDAC, and is utilized for amplifying at least the output data to generate an amplified output data. In addition, the channel does not include any P-type digital-to-analog converter.

According to another embodiment of the present invention, a source driver comprises at least a channel, and the channel comprises a digital-to-analog converter and an operational amplifier. The digital-to-analog converter is utilized for receiving input data and selecting one of a plurality of gamma voltages to generate output data according to the input data. The operational amplifier is coupled to the digital-to-analog converter, and is utilized for amplifying at least the output data to generate an amplified output data. In addition, each of the plurality of gamma voltages is lower than half of a supply voltage of the source driver.

DETAILED DESCRIPTION

Please refer toFIG. 2.FIG. 2is a diagram illustrating a source driver200according to a first embodiment of the present invention. As shown inFIG. 2, the source driver200comprises two channels210and220, where the channel210includes an N-type digital-to-analog converter (NDAC)214and an operational amplifier216, and the channel220includes an NDAC224and an operational amplifier226, and the NDAC is a digital-to-analog converter whose switches are all implemented by N-type Metal-Oxide-Semiconductors (NMOS). In addition, multiplexers202,204and206are respectively coupled between the elements in the two channels210and220, and are used for switching the received signals. In addition, the NDAC214and the NDAC224are 2N+1-to-1 NDACs, where N is a bit number of the input data A0-AN−1and B0-BN−1. Furthermore, gains of the operational amplifiers216and226are equal to M which is a positive integer greater than 1.

In addition, in other embodiment, the source driver200can comprise level shifters connected to the multiplexer202to shift the voltage level of the input data A0-AN−1and B0-BN−1, and the NDAC214and the NDAC224receive the level shifted A0-AN−1and B0-BN−1, respectively.

The source driver200is applied to a display apparatus using a row-inversion driving method.

Please refer toFIG. 3.FIG. 3is a diagram illustrating gamma voltages inputted into each NDAC330(i.e., the NDACs214and224shown inFIG. 2) included in the source driver200. As shown inFIG. 3, the gamma voltage generation block310in the system side generates several reference gamma voltages (such as 18 gamma voltages), and the resistor string (R-string)320receives the reference gamma voltages to generate gamma voltages H(0)-H(2N−1) and L(0)-L(2N−1), where the reference gamma voltages and the gamma voltages H(0)-H(2N−1) and L(0)-L(2N−1) are lower than (1/M) of the supply voltage of the source driver200. The NDAC330receives the gamma voltages H(0)-H(2N−1) and L(0)-L(2N−1), and outputs one of the gamma voltages H(0)-H(2N−1) and L(0)-L(2N−1) as an output Vout of the NDAC330according to input data Din, where the input data Din here can be A0-AN−1, B0-BN−1, level shifted A0-AN−1or level shifted B0-BN−1outputted from the multiplexer202shown inFIG. 2. In addition, the gamma voltages H(0)-H(2N−1) are for driving the pixel with positive polarization, and the gamma voltages L(0)-L(2N−1) are for driving the pixel with negative polarization.

Compared with the prior art source driver100, because all the gamma voltages H(0)-H(2N−1) and L(0)-L(2N−1) inputted into the NDACs214and224are reduced to be about (1/M) of their desired values, the channels210and220do not need to have any P-type digital-to-analog converter (PDAC). Therefore, the cost of the source driver200can be reduced because a chip area of the source driver200is less than that of the prior art source driver100. In addition, because the gamma voltages outputted from the NDACs214and224are lower than half of the supply voltage, the operational amplifiers216and226do not need to be implemented by rail-to-rail operational amplifiers, and deviation of a head/tail voltage outputted from the operational amplifiers216and226will not be greater than the middle voltage, causing better quality of the amplified signal than in the conventional art.

In the operations of the source driver200, because the gamma voltages outputted from the NDACs214and224are about (1/M) of their desired values, the operational amplifiers216and226further amplify the gamma voltages outputted from the NDACs214and224to the scale of M to generate output data Vout_1and Vout_2, respectively.

Take N=10, M=2 and a supply voltage of 18V as an example to describe the operations of the source driver200in more detail. The NDACs214and224receive the gamma voltages H(0)-H(1023) and L(0)-L(1023) whose voltage values are lower than 9V (a range of these gamma voltages is about 02V-8.8V), and the NDACs214and224generate one of the gamma voltages H(0)-H(1023) and L(0)-L(1023) according to the input data A0-A9and B0-B9, respectively. Then, the operational amplifiers216and226double the gamma voltages outputted from the NDACs214and224to generate output data Vout_1and Vout_2, respectively.

Please refer toFIG. 4.FIG. 4is a diagram illustrating a source driver400according to a second embodiment of the present invention. As shown inFIG. 4, the source driver400comprises two channels410and420, where the channel410includes an NDAC414and an operational amplifier416, and the channel420includes an NDAC424and an operational amplifier426, and the NDAC is a digital-to-analog converter whose switches are all implemented by NMOS. In addition, multiplexer402,404and406are respectively coupled between the elements in the two channels410and420, and are used for switching the received signals. In addition, the NDAC414and the NDAC424are 2N-to-1 NDACs, where N is a bit number of the input data A0-AN−1and B0-BN−1. Furthermore, gains of the operational amplifiers416and426are equal to M which is a positive integer greater than 1.

In addition, in other embodiment, the source driver400can comprise level shifters connected to the multiplexer402to shift the voltage level of the input data A0-AN−1and B0-BN−1, and the NDAC414and the NDAC424receive the level shifted A0-AN−1and B0-BN−1, respectively.

The source driver400is applied to a display apparatus using a row-inversion driving method.

Please refer toFIG. 5A.FIG. 5Ais a diagram illustrating gamma voltages inputted into each NDAC530(i.e., the NDACs414and424shown inFIG. 4) included in the source driver400. As shown inFIG. 5A, when the channel is under a first mode, the gamma voltage generation block510in the system side generates several first reference gamma voltages (such as 9 reference gamma voltages), and the resistor string (R-string)520receives the reference gamma voltages to generate gamma voltages H(0)-H(2N−1), where the first reference gamma voltages and the gamma voltages H(0)-H(2N−1) are lower than (1/M) of the supply voltage of the source driver400. The NDAC530receives the gamma voltages H(0)-H(2N−1), and outputs one of the gamma voltages H(0)-H(2N−1) as an output Vout of the NDAC530according to input data Din, where the input data Din here can be A0-AN−1, B0-BN−1, level shifted A0-AN−1or level shifted B0-BN−1outputted from the multiplexer402shown inFIG. 4. In addition, when the channel is under a second mode, the gamma voltage generation block510in the system side generates several second reference gamma voltages (such as 9 reference gamma voltages) different from the first reference gamma voltages, and the R-string520receives the reference gamma voltages to generate gamma voltages L(0)-L(2N−1) different from the gamma voltages H(0)-H(2N−1), where the second reference gamma voltages and the gamma voltages L(0)-L(2N−1) are lower than (1/M) of the supply voltage of the source driver400. The NDAC530receives the gamma voltages L(0)-L(2N−1), and outputs one of the gamma voltages L(0)-L(2N−1) as an output Vout of the NDAC530according to the input data Din. In addition, in this embodiment, each of the gamma voltages H(0)-H(2N−1) is greater than each of the gamma voltages L(0)-L(2N−1), and the gamma voltages H(0)-H(2N−1) are for driving the pixel with positive polarization, and the gamma voltages L(0)-L(2N−1) are for driving the pixel with negative polarization as shown inFIG. 5B. Please note that the frame shown inFIG. 5Bis for illustrative purposes only, and is not a limitation of the present invention.

Compared with the prior art source driver100, because all the gamma voltages H(0)-H(2N−1)/L(0)-L(2N−1) inputted into the NDACs414and424are reduced to be about (1/M) of their desired values, the channels410and420do not need to have any P-type digital-to-analog converter (PDAC). Therefore, the cost of the source driver400can be reduced because a chip area of the source driver400is less than that of the prior art source driver100. In addition, because the gamma voltages outputted from the NDACs414and424are lower than half of the supply voltage, the operational amplifiers416and426do not need to be implemented by rail-to-rail operational amplifiers, and the deviation of the head/tail voltage outputted from the operational amplifiers416and426will not be greater than the middle voltage, causing better quality of the amplified signal than in the conventional art.

In the operations of the source driver400, because the gamma voltages outputted from the NDACs414and424are about (1/M) of their desired values, the operational amplifiers416and426further amplify the gamma voltages outputted from the NDACs414and424to the scale of M to generate output data Vout_1and Vout_2, respectively.

Please refer toFIG. 6.FIG. 6is a diagram illustrating a source driver600according to a third embodiment of the present invention. As shown inFIG. 6, the source driver600comprises two channels610and620, where the channel610includes an NDAC614and an operational amplifier616, and the channel620includes an NDAC624and an operational amplifier626, and the NDAC is a digital-to-analog converter whose switches are all implemented by NMOS. In addition, multiplexers602,604and606are respectively coupled between the elements in the two channels610and620, and are used for switching the received signals. In addition, the NDAC614and the NDAC624are 2N-to-1 NDACs, where N is a bit number of the input data A0-AN−1and B0-BN−1. Furthermore, gains of the operational amplifiers616and626are equal to M which is a positive integer greater than 1.

In addition, in other embodiment, the source driver600can comprise level shifters connected to the multiplexer602to shift the voltage level of the input data A0-AN−1and B0-BN−1, and the NDAC614and the NDAC624receive the level shifted A0-AN−1and B0-BN−1, respectively.

The source driver600is applied to a display apparatus using a row-inversion driving method.

Please refer toFIG. 7.FIG. 7is a diagram illustrating gamma voltages inputted into each NDAC730(i.e., the NDACs614and624shown inFIG. 6) included in the source driver600. As shown inFIG. 7, the gamma voltage generation block710in the system side generates several reference gamma voltages (such as 9 reference gamma voltages), and the resistor string (R-string)720receives the reference gamma voltages to generate gamma voltages L(0)-L(2N−1), where each of the gamma voltages L(0)-L(2N−1) is for driving the pixel with negative polarization, and the reference gamma voltages and the gamma voltages L(0)-L(2N−1) are lower than (1/M) of the supply voltage of the source driver600. The NDAC730receives the gamma voltages L(0)-L(2N−1), and outputs one of the gamma voltages L(0)-L(2N−1) as an output Vout of the NDAC730according to input data Din, where the input data Din here can be A0-AN−1, B0-BN−1, level shifted A0-AN−1or level shifted B0-BN−1outputted from the multiplexer602shown inFIG. 6.

In the operations of the source driver600, taking the channel610as an example, when the channel610is under a first mode and the channel610needs to output the output data Vout_1to drive the pixel with positive polarization, the operational amplifier616amplifies one of the gamma voltages L(0)-L(2N−1) outputted from the NDAC614or624with an offset by a scale M to generate an output signal Vout_1; that is the output of the operational amplifier616is M*(offset−L(i)), where L(i) is one of the gamma voltages L(0)-L(2N−1). It is noted that the calculation (offset−L(i)) is for generating a gamma voltage H(i) similar to one of the gamma voltages H(0)-H(2N−1) shown inFIG. 3andFIG. 5A. In addition, when the channel610is under a second mode and the channel610needs to output the output data Vout_1to drive the pixel with negative polarization, the operational amplifier616amplifies one of the gamma voltages L(0)-L(2N−1) to the scale of M to generate the output signal Vout_1.

Compared with the prior art source driver100, the cost of the source driver600can be reduced because a chip area of the source driver600is less than that of the prior art source driver100, and the operational amplifiers616and626do not need to be implemented by rail-to-rail operational amplifiers. Furthermore, the system side only needs to provide half of the reference gamma voltages.

Briefly summarized, the source driver of the present invention uses the NDAC to output the gamma voltages, and does not include any PDAC. Therefore, the chip area of the source driver is smaller, and the cost of the source driver can be reduced.