COMPLEXITY ORDERED STATISTIC DECODING USING IMPROVED BIT FLIPPING PATTERN ORDERING

A decoding method implemented at a decoder. The method includes determining a current channel realized reliability metric for each symbol in a received sequence of symbols. The current channel realized reliability metrics of the symbols are then sorted to identify a predetermined number of most reliable independent bits in the sequence. A set of one or more bit-flip patterns are then enumerated based on the current channel realized reliability metrics of the predetermined number of the most reliable independent bits in the sequence. The set of bit-flip patterns or a subset thereof are then applied to a received vector corresponding to the sequence of symbols to decode a codeword.

BACKGROUND

In a digital communication system, error control coding is used for controlling errors over unreliable or noisy communication channels. The sender encodes each message with redundant information to form a codeword. This encoding adds redundant parity bits. For example, data that is originally 30 bits long may be encoded with an additional 98 redundant parity bits to create a 128-bit codeword. The redundancy allows the receiver to detect a limited amount of corruption, added entropy, degradation, or uncertainty (referred to herein as errors) that may occur anywhere in the message, and often to correct these errors without retransmission. The maximum scope of errors that can be corrected is affected by the design of the error control coding/decoding methods, such that different error control coding/decoding methods are suitable for different conditions.

The various decoding methods can be computationally intensive requiring significant computer resources to accomplish. Thus, improvements to various decoding methods and systems that can economize system resource usage are desirable.

BRIEF SUMMARY

The embodiments described herein are related to a decoding method. The method includes determining a current channel realized reliability metric for each symbol in a received sequence of symbols. The current channel realized reliability metrics of the symbols are then sorted to identify a predetermined number of most reliable independent bits in the sequence. A set of one or more bit-flip patterns are then enumerated based on the current channel realized reliability metrics of the predetermined number of the most reliable independent bits in the sequence. The set of bit-flip patterns or a subset thereof are then applied to a received vector corresponding to the sequence of symbols to decode a codeword.

DETAILED DESCRIPTION

The embodiments described herein are related to a method, or a channel realization dependent ordered decoder configured to perform a novel decoding on a received codeword. In some embodiments, the novel decoding method accomplishes improved decoding, such as improvements in time required to perform decoding and/or improvements in processing power needed to perform decoding.

Note that previous decoding typically identifies the k most reliable bits of an n-bit codeword. For example, when 30 data bits have been encoded into a 128-bit codeword, a system may identify the 30 most reliable bits of the 128-bit codeword. The k most reliable bits may be input into a decoder (typically including a decoder matrix and a hamming weight generator) to attempt to recover (or at least identify similarity to) the data bits. Additionally, certain bits in the k most reliable bits may be flipped such that k bits, including one or more that are flipped in addition to remaining unflipped bits from the k most reliable bits are input into the decoder to attempt to recover the data bits. A simple decoding process simply iteratively flips one bit of the k most reliable bits at a time and inputs the k bits (including a single flipped bit) to the decoder. This is repeated until all k bits of the k most reliable bits have been flipped. This may be followed by flipping two bits of the k most reliable bits at a time and applying k bits, including two flipped bits to the decoder. This is repeated until a desired order (i.e., number) of bit flips per k bits is achieved. In some examples, Maximum Likelihood (ML) decoding can be performed. In ML decoding, every possible combination of bit flips in a space is tried and the lowest cost codeword is determined as the ML solution. Understandably, this brute force process can require significant time and computing resources to perform. Indeed, there are typically too many codewords to try all of them under time and processor constraints.

In contrast, embodiments herein can perform a more efficient decoding operation, in terms of time and/or computing resources required to perform the decoding. For example, when there is only sufficient time or processing power for a subset of bit-flip patterns to be tried, embodiments illustrated herein can be used to perform the decoding operation within the limited time or only using the limited processing power by optimizing which bit flip patterns (and corresponding codewords) are tried. Some embodiments of the novel decoding method may further improve average throughput by finding a desired codeword earlier. In particular, embodiments illustrated herein are a very close approximation of ML decoding. Thus, channel realization dependent ordered decoding is able to find the ML solution codeword while only trying a small fraction of the possible codewords.

This is accomplished by creating a channel realization dependent schedule that is used to select the order of bit flips in a received vector. In particular, individual current bit reliability, for a currently implemented system, is measured. For example, a matched filter used in a QPSK or BPSK receiver of a Gaussian channel is able to produce current realized reliability metrics. That bit reliability is used to create a schedule for selecting bits to flip from a received vector in an optimized fashion to reduce the number of bit flips that are required to decode the received vector to a codeword. Note that previous systems that have provided schedules have done so based generically using long term reliability (including reliable determined using data received over time, and thus not current realized reliability) or estimated channel reliability and the order of the bits sorted according to an estimated or long term reliability metric, without respect to the actual values of the current reliability metrics. In contrast, embodiments herein take into account current realized bit reliabilities, as affected by factors such as noise, channel losses, and other factors of the actual current channel where the system is implemented.

Further, embodiments accomplish the functionality by trying as many codes as time and/or processor power allows. Usually, this is expressed as a limit of bit flip pattern weights. The example below uses a maximum weight of 3. That is, bit flip patterns will be tried up to and including the maximum weight. However, this portion of the process may be terminated early if a codeword is found with a cost that is smaller than a predetermined threshold. The threshold is calculated with a bound that guarantees the ML codeword. In some embodiments, if the hard decision of the received vector is already a valid codeword, then additional searching can be terminated.

For example, one embodiment receives a vector and uses certain criteria explained in more detail below to select a certain number (k) of most reliable bits from the received vector having a certain number (n) of bits. For example, if a 128 bit vector is received, the most reliable 30 bits may be selected. The number k of selected bits is often dependent on the original number of data bits before parity bits are added. Thus, in the present example, 30 data bits may be encoded resulting in 98 parity bits being added to create the 128-bit codeword. These most reliable bits may then be ranked in order of least reliable to most reliable according to an obtained bit reliability metric. The reliability metric is based on the actual, current realization of the effects applied to a transmitted bit by the channel. The reliability metrics for the bits are then used to select a schedule of bit flipping patterns for the received vector. Note that the reliability metrics are used in a fashion where least reliability flipping is performed no matter the number of bit flips that occur. Thus for example, the schedule may include a single bit being flipped, followed by two bits being flipped, followed by a different single bit being flipped. In this example, the two bits in combination are less reliable than the different single bit. A more detailed example will be illustrated below.

Embodiments may have a maximum number of bit flip patterns that can be tried for a particular received vector. Assume for example, that an embodiment allows trying all bit flip patterns up to weight three. Embodiments may first check to see if valid data can be recovered without flipping any bits, which is equivalent to a weight-zero bit flip pattern. If not, embodiments may flip the least reliable bit (of the most reliable bits) to see if valid data can be recovered. If not, embodiments may flip some combination of bits, selected based on an order of bit combinations that is based on the reliability metrics for individual bits, to see if valid data can be recovered. Thus, this process continues until valid data is recovered, or until some other predetermined condition is met indicating that the process should be halted. With this introduction, additional details are now illustrated.

Embodiments of the invention described herein improve the order of bit flip patterns from previous decoders by utilizing the current channel realized reliability of the k most reliable independent bits, not just their relative order. Embodiments use current channel realized reliability metrics for the most reliable k bits to select an ordering for bit flipping. The bit flip patterns are tried in order of decreasing likelihood (of error) and decoding is successful as soon as a valid codeword of sufficient reliability is found. Enumerating the sums of the current channel realized reliability metrics for all combinations of bit flip patterns up to a particular weight can be computationally simple (e.g., for high-rate codes where there are likely a relatively small number of errors) compared to re-encoding every combination. Accordingly, the expected number of tries before a suitable codeword is found is lower than the existing order statistics based ordering.

In some embodiments, a threshold may be applied where if a particular error pattern likelihood (i.e., reliability metric cost) falls below a certain threshold value, decoding ceases because the probability that any of the following error patterns has occurred is sufficiently small. In particular, embodiments may be implemented by design such that the ML codeword is guaranteed if a codeword is found with an error pattern likelihood is below the certain threshold value. That is, the certain threshold value is calculated as a bound to make the guarantee.

In some embodiments, after the set of all patterns have been applied and candidate codewords have been found, a distance between the codeword and received vector is calculated. This distance can be, for example, a Euclidean Distance or a Hamming distance. The codeword that is ‘closest’ to the received vector is declared as the decoded codeword. The probability of error under this scheme is a function of the code and the channel statistics (as well as how many patterns are tried).

In some embodiments, calculating the weight and/or cost of each bit flip pattern can be done while various other re-encode and compare operations are taking place. In some embodiments, properties of probabilities may enable enumeration of likelihoods of error patterns through an appropriately chosen decision tree.

FIG.1illustrates an example of an environment of a wireless communication system100. The wireless communication system100includes one or more source devices110, and one or more destination devices130. As illustrated, the source device110includes a transmitter112configured to send out a wireless signal having the destination device130as a destination. The destination device130includes a receiver132configured to receive the signal transmitted by the source device110. In some embodiments, each of the source devices110and destination devices130may be a mobile phone, a tablet, a laptop computer, a radio, or any object that is coupled to a communication circuitry and/or device, such as (but not limited to) a ground vehicle, an airplane, a watercraft, and/or a satellite.

FIG.2illustrates a functional block diagram of an example of a communications link200, including a transmitter210and a receiver220. The transmitter210includes a source coder214, a FEC encoder216, a modulator218, and transmitter hardware (such as various amplifiers, antennas, filters, etc.) configured to transmit a signal on the propagation channel260. The FEC encoder216is configured to add redundancy, for example, in a form for a forward error correction code, in order to make it more resistant to transmission errors introduced by the channel260. For example, the FEC encoder216, in the examples above, would use the 30 data bits to create the 128-bit codeword as illustrated in more detail below. The receiver220includes receive hardware (such as various antennas, filters, amplifiers, etc.) configured to receive a signal from the propagation channel260, a demodulator228, a FEC decoder226, and a source decoder224. The FEC decoder226is configured to eliminate most or all of the errors that have been introduced by the channel260. Note, the functional blocks shown inFIG.2are oversimplified, and the separation of the functional blocks in embodiments are not necessarily the same as shown inFIG.2. One or more of these functional blocks inFIG.2may be combined into a single electronic device, including complex circuitry, one or more generic processors and/or storages that are configured to execute custom or generic firmware and/or software to achieve the desired results.

Additionally, since the principles described herein are related to FEC coding and decoding, a brief introduction to FEC coding and decoding is provided with respect toFIG.3.FIG.3illustrates an example of a message310and a codeword320. Each message310has a predetermined number k bits, and a codeword320has a predetermined number n bits, wherein n>k. In an error control coding process, each message310of k bits is encoded to a codeword320of n bits. Since each message only includes k bits, the total number of possibly different messages is 2{circumflex over ( )}k, which can only be correctly encoded into 2{circumflex over ( )}k valid codewords. However, since the codeword has n bits, technically, the total number of possibly received binary vectors is 2{circumflex over ( )}n. When the received vector is not one of the valid 2{circumflex over ( )}k codewords, the system would know that an error had occurred during the transmission. Notably, each specific system may detect and correct errors differently depending on the coding method and/or the decoding method.

The decoding of the received vector may be performed via a hard decision decoding method and/or a soft decision decoding method. Hard decision decoding takes a sequence of bits or a received vector from a threshold stage of a receiver and decodes each bit by hard classifying it as a 1 or 0. Soft decision decoding is a class of algorithms that uses additional information from the receiver to aid in the decoding of received vectors. Soft decoding considers one or more current channel realized reliability metrics of each received symbol or pulse to form a better estimate of sent data. Such current channel realized reliability metrics include (but are not limited to) log-likelihood ratio (LLR), Euclidean distance, correlation, and/or correlation discrepancy.

For example, let v=(v0, v1, . . . , vn-1) be a codeword having n bits. In some embodiments, for transmission, this codeword is mapped into a sequence of symbols. The sequence of symbols are transmitted via a propagation channel and received by a receiver. The symbols of the received sequence r=(r0, r1, . . . , rn-1) are reordered in decreasing order based on their respective reliabilities. The reordered sequence r is denoted as r′=(r′0, r′1, . . . , r′n-1).

FIG.4illustrates an example of a process of reordering a received sequence r to a reordered sequence r′. As illustrated, the received sequence r includes n symbols, each of which has a reliability metric, which corresponds to the absolute value of the corresponding symbol. For example, the first symbol r0 has a reliability metric 0.8, the second symbol r1 has a reliability metric 8.5, and the rest of the symbols (r2 through rn−1) have their respective current channel realized reliability metrics, 0.1, 0.5, 2, 7, 8, 0.2, 4, and 1.1. The first k bits of the sequence r correspond to k message bits, and the last n-k bits of the sequence correspond to n-k parity bits.

Note that the reliability metric used here is based on the channel realization for each bit as opposed to long term channel reliability parameters or statistics used in previous systems. The current channel realization for each transmitted bit takes into account effects of the propagation channel260, noise262, etc. As noted previously, current channel realized reliability metrics can be determined using native functionality of matched filters of certain receivers.

The n bits in the sequence r are then reordered based on their current channel realized reliability metrics in an order of decreasing reliability. The reordered sequence r′ is shown at the lower section ofFIG.4. As illustrated, the most reliable symbol r′0 (having a reliability metric 8.5) is placed at far left, the second most reliable symbol r′1 (having a reliability metric 8) is placed next to r′0; and the rest of the symbols (r′2 through r′n−1) having their respective current channel realized reliability metrics in the order of decreasing reliability, 8, 7, 4, 2, 1.1, 0.8, 0.5, 0.2, 0.1 are positioned accordingly.

Further, the sorted n bits in the sequence r′ are divided into two groups, namely k most reliable bits and n-k least reliable bits. Note, k is the number of message bits. Although the first k bits of r′ are the k most reliable bits, they are not necessarily independent, and therefore they do not always represent an information set. Thus, an additional process is performed to identify the k most reliable independent bits. Different conventional and known processes may be implemented to identify the k most reliable independent bits. For example, in some embodiments, transformations of the generator matrix G and elementary row operations or Gaussian eliminations may be performed to identify the k most reliable independent bits.

In some embodiments, the k most reliable independent bits are processed in an order of increasing reliability. In some embodiments, only several least reliable bits in the k most reliable independent bits are further processed.

FIG.5illustrates an example of a process for processing the k most reliable independent bits. Note thatFIG.5illustrates a different example, and should not be compared to the numerical values illustrated inFIG.4. Rather,FIG.5illustrates an abbreviated example. As illustrated inFIG.5, the k most reliable independent bits are now organized in an order of increasing reliability, i.e., k0 (having the lowest reliability metric 1.1) is placed at the far left, k1 (having the second lowest reliability metric 2) is placed next to k0, and so on and so forth.

The FEC decoder uses an enumerated set of one or more bit-flip patterns, starting from the least reliable bit k0 among the most reliable k bits. Each bit-flip pattern includes one or more bits among the k most reliable bit bits that are to be flipped. Each time a bit-flip pattern is applied to z, the bits of the received vector z at the one or more bit locations are flipped to generate a new received information vector of k bits. The new received information vector of k bits is reencoded to a valid codeword vector z′. A reliability metric is then computed for the valid codeword vector z′. This is repeated over the one or more bit-flip patterns, until a suitable reliability metric is obtained or until all of the bit-flip patterns have been tried. In some embodiments, the most reliable reliability metric is used to select a valid codeword vector.

In other embodiments, if all the patterns in the enumerated set have been applied and no suitable reliability is found, the FEC decoder could declare a decoding failure. Alternatively, a second set of one or more bit-flip patterns may be enumerated, and the second set of bit-flip patterns or a subset thereof are applied to the hard decision decoded received vector z. Again, this process may repeat until a suitable reliability is found, or some predetermined conditions are satisfied, such as for example a predetermined period of time has expired, a buffer has recached a certain level, a certain number of patterns have been tested, etc.

In some embodiments, the first set of bit flip patterns includes a first maximum weight, and the second set of bit flip patterns has a second maximum weight that is greater than the first maximum weight. A weight of a bit flip patterns is a total number of bits in different bits that are to be flipped. For example, if a weight in a bit flip pattern is 3, three different bits are to be flipped. In some embodiments, each subsequent set of bit flip patterns increases the weight by one. For example, the first set of bit flip patterns has a maximum weight 3. If no codeword is found after applying each of the first set of bit flip patterns, a second set of bit flip patterns is generated, and the second set of bit flip patterns has a weight 4. If still no codeword is found after applying each of the second set of bit flip patterns, a third set of bit flip patterns is generated, the third set of bit flip patterns has a weight 5, and so on. In some embodiments, the next set of bit flip patterns is being generated and ordered simultaneously while the previous set of bit flip patterns is being applied the hard decision decoded received vector z.

Alternatively or additionally, embodiments may implement successive sets of bit flipping, but where after each set, the distance is measured for all candidate codewords to the received vector. A stopping criterion in such embodiments may be that the distance is less than some predetermined value.

In some embodiments, the enumerated bit-flip patterns may further be filtered based on one or more predetermined rules. Only the filtered bit-flip patterns among the enumerate bit-flip patterns are applied to the hard decision decoded received vector z. In some embodiments, only a predetermined number of the least reliable independent bits in the k most reliable independent bits are to be applied to the hard decision decoded received vector z. For example, when the predetermined number is set as3, in the sequence500ofFIG.5, the filtered set of bit-flip patterns would include patterns that has bits of k0(1.1), k1(2), and/or k2(4). Such a subset of bit-flip patterns would be k0(1.1), k1(2), k2(4), k0(1.1) k1(2), k0(2) k2(4), k1(2) k2(4), and k0(1.1) k1(2) k2(4).

In some embodiments, only the bit-flip patterns that include bits that have a predetermined maximum reliability metric are to be applied to the hard decision decoded received vector z. For example, when a maximum reliability metric is set to 4, only the bit bits that have a reliability metric that is no more than 4 will be flipped. In such a case, in the sequence500ofFIG.5, only k0 (having a reliability metric 1.1), k1 (having a reliability metric 2), and k2 (having a reliability metric 4) may be included in the set of bit-flip patterns. The filtered set of bit-flip patterns would include k0(1.1), k1(2), k2(4), k0(1.1) k1(2), k0(1.1) k2(4), k1(2) k2(4), and k0(1.1) k1(2) k2(4).

In some embodiments, only the bit-flip patterns that have a predetermined maximum weight are to be applied to the hard decision decoded received vector z. A weight indicates a number of bits in a bit-flip pattern that are to be flipped. The maximum weight indicates a maximum number of bits in each bit-flip patterns that are to be flipped. For example, if the maximum weight is 3, the maximum number of bits that are to be flipped is 3, and the set of bit-flip patterns would only include patterns having weights 1 through 3. In such a case, in the sequence500ofFIG.5, the filtered set of bit-flip patterns would include (i) weight 1 patterns, such as k0(1.1), k1(2), k2(4), . . . , kk( ), (ii) weight 2 patterns, such as k0(1.1) k1(2), k0(1.1) k2(4), . . . , k0(1.1) kk( ), and (iii) weight 3 patterns, such as k0(1.1) k1(2) k2(4), k0(1.1) k1(2) k3(7), . . . , k0(1.1) k1(2) kk( ), k1(2) k2(4) k3(7), . . . , k1(2) k2(4) kk( ), . . . , kk−2( ) kk−1( ) kk( ).

Further, the enumerated set of bit-flip patterns are sorted based on the current channel realized reliability metrics of the bit bits that are to be flipped. The bit-flip pattern that includes bit bits with the combined lowest current channel realized reliability metrics is applied first. As used herein, a combined reliability includes a reliability metric for when reliability of multiple bits is determined, but can also refer to a reliability metric for a single bit. The combined current channel realized reliability metrics may be defined based on different algorithms. In some embodiments, a combined reliability metric is defined as a sum of the current channel realized reliability metrics of the multiple bit bits. For example, when a bit-flip pattern includes k0 (having a reliability metric 1.1) and k1 (having a reliability metric 2), the combined reliability metric for k0 and k1 is 3.1=1.1+2, which is denoted as k0 k1(3.1). The bit-flip patterns sorted in increasing order based on the current channel realized reliability metrics or the combined current channel realized reliability metrics would be for the illustrated example: k0(1.1), k1(2), k0 k1(3.1), k2(4), k0 k2(5.1), k3(7), k0 k1 k2 (7.1) . . . .

In some embodiments, a maximum reliability metric threshold is set, and only the bit-flip patterns that have a reliability metric or a combined reliability metric that is no greater than a threshold are to be applied to the hard decision decoded received vector z. For example, when the maximum reliability metric threshold is set as 7, the set of bit-flip patterns would only include the bit-flip patterns that have a reliability metric or a combined reliability metric that is no more than 7. In such a case, in the sequence500ofFIG.5, the filtered set of bit-flip patterns would only include k0(1.1), k1(2), k0 k1(3.1), k2(4), k0 k2(5.1), k3(7).

In some embodiments, a maximum number of bit-flip patterns is set, and only up to the maximum number of bit-flip patterns that have the lowest current channel realized reliability metrics are to be applied to the hard decision decoded received vector z. For example, when the predetermined number is set as 3, in the sequence500ofFIG.5, the filtered set of bit-flip patterns would only include k0(1.1), k1(2), k0 k1(3.1).

FIG.6illustrates a flowchart of an example of the current channel realization decoding method600, which may be implemented at the FEC decoder226ofFIG.2or600ofFIG.6. The method600includes hard decision decoding a sequence of symbols into a received vector (act610) and determining whether the received vector is a suitable codeword (act620). When the received vector is a suitable codeword (act620, “Yes” side), decoding is successful (act690). In response to determining that the received vector is not a suitable codeword (act620, “No” side), a reliability metric of each symbol in the sequence is obtained (act630). The symbols in the sequence are then sorted in decreasing order based on the current channel realized reliability metrics (act640). Next, a predetermined number of most reliable independent bits in the sequence is identified (act650), which may be achieved by a series of transformations of a generator matrix G, where the generator matrix G is a matrix used to encode a k bit message into an n bit codeword.

Based on the current channel realized reliability metrics of the predetermined number of the most reliable independent bits, a set of one or more bit-flip pattern(s) is enumerated (act660). The set of one or more bit-flip pattern(s) or a subset thereof are applied to the received vector (act670). When a bit-flip pattern is applied to the received vector, a new codeword is generated. It is then determined whether the new codeword matches the received vector (or is within some distance of the received vector) (act680). In response to finding a codeword within a predetermined distance of the received vector, decoding is successful (act690). On the other hand, if no codeword within the predetermined distance of the received vector is found after applying each bit-flip pattern in the set or the subset, decoding has failed (act692). Alternatively, or in addition, when no suitable codeword, i.e., a codeword with a suitably small distance to the received vector, is found after applying each bit-flip pattern in the set, a new set of one or more bit-flip pattern(s) are enumerated (act660), and the new set of bit-flip pattern(s) or a subset thereof are applied to the received vector (act670). This process may repeat until a suitably close codeword is found or a predetermined condition is met.

FIG.7illustrates a flowchart of an example of a method for enumerating a set of one or more flip patterns. The method700includes sorting the predetermined number of most reliable independent bits in increasing order based on the current channel realized reliability metrics (act710) and enumerating a set of bit-flip patterns (act720). In some embodiments, enumerated set of bit-flip patterns may have a predetermined maximum weight. The method700further includes computing a combined reliability metric for each bit-flip pattern having a weight more than 1 (act730) and sorting the bit-flip patterns in increasing order based on the current channel realized reliability metrics and/or the combined current channel realized reliability metrics (act740). In some embodiments, the method700further includes filtering the set of bit-flip patterns based on one or more predetermined conditions (act750), and causing the filtered set of bit-flip patterns (i.e., a subset of the enumerated bit-flip patterns) to be applied to the received vector based on the increasing order (act760).

FIG.8illustrates a flowchart of an example of a method800for performing current channel realization decoding. The method800includes, at a receiver, receiving a signal from a propagation channel, the signal comprising a received vector, the received vector having n bits (act810).

The method800further includes selecting k bits from the n bits, the k bits being the most reliable k bits of the n bits according to a reliability metric (act820).

The method800further includes ordering the k bits according to current channel realized reliability metrics for the k bits (act830).

The method800further includes creating a bit flip schedule to order bit flip patterns, each bit flip pattern comprising one or more of the selected k bits, using the current channel realized reliability metrics for the k bits (act840).

The method800further includes attempting to decode the received vector by performing bit flip attempts according to the schedule of bit flip patterns (act850).

The method800further may be practiced where the realized reliability metric is a log-likelihood ratio (LLR).

The method800further may be practiced where the bit flip schedule is generated through a decision tree based on the realized current channel realized reliability metrics.

The method800further may be practiced where the n bits include k message bits and n-k parity bits.

The method800further may be practiced where creating the bit flip schedule comprises:for each bit-flip pattern in the bit-flip schedule, computing a combined realized reliability metric based on individual realized current channel realized reliability metrics of constituent bits;ordering the bit flip patterns in the bit flip schedule based on the combined realized current channel realized reliability metrics thereof; andwherein attempting to decode the received vector by performing bit flip attempts according to the schedule of bit flip patterns comprises applying the bit flip patterns in increasing order based on the realized channel combined current channel realized reliability metrics, starting from a bit-flip pattern corresponding to a lowest combined realized reliability metric toward a bit-flip pattern corresponding to a highest combined realized reliability metric.

Some such embodiments of the method800may be practiced where each combined realized reliability metric is a sum of current channel realized reliability metrics of the constituent bits.

Alternatively or additionally, some such embodiments of the method800may be practiced where the method further includes:filtering the bit-flip patterns based one or more predetermined conditions to generate a subset of bit-flip patterns, andapplying bit flip patterns in the subset of the bit-flip patterns to the received vector while excluding filtered bit flip patterns.

Some such embodiments of the method800may be practiced where the one or more predetermined conditions include a maximum number of least reliable bits from the k bits, such that only a subset of bit-flip patterns that include up to the maximum number of least reliable bits can be applied to the received vector.

Alternatively, or additionally, some such embodiments of the method800may be practiced where the one or more conditions include a maximum realized channel combined reliability metric, such that only a subset of bit-flip patterns that have a realized channel combined reliability metric that is no more than the maximum realized reliability metric can be applied to the received vector.

Alternatively, or additionally, some such embodiments of the method800may be practiced where the one or more conditions include a maximum weight, indicating a maximum number of bits are to be flipped, such that only a subset of bit-flip patterns that have a weight that is no more than the maximum weight can be applied to the received vector.

Alternatively, or additionally, some such embodiments of the method800may be practiced where the one or more conditions include a maximum number of bit-flip patterns that are to be applied, such that only a subset of the maximum number of bit-flip patterns can be applied to the received vector.

The method800may further include: generating a second set of bit-flip patterns based on the current channel realized reliability metrics of the predetermined most reliable independent bits; and in response to finding no suitable codeword after applying the set of bit-flip patterns, applying the second set of bit-flip patterns to the received vector.

Some such embodiments of the method800may be practiced where generating a second set of bit-flip patterns and the applying the set of bit-flip patterns are performed simultaneously.

Alternatively, or additionally, some such embodiments of the method800may be practiced where each bit-flip pattern in the set of bit-flip patterns has a first weight, indicating a first number of one or more bits that are to be flipped; each bit-flip pattern in the second set of bit-flip patterns has a second weight, indicating a second number of one or more bits that are to be flipped; and the second weight is greater than the first weight. In some such embodiments, the second weight is greater than the first weight by one.

The outlined operations are only provided as examples, and some of the operations may be optional, combined into fewer steps and operations, supplemented with further operations, or expanded into additional operations without detracting from the essence of the disclosed embodiments.