Method and computer for remote communication while operating in a power-saving mode

A computer and a method for enabling remote communication to a computer operating in a power-saving mode in which one or more one power sources to internal devices are disabled. The computer is equipped with a power management control circuit which is responsive to a first signal indicating that a device used to receive remote communication is to receive power while operating in a power-saving mode. In the event that a remote communications is detected which is targeted for the computer, a second signal is asserted by the remote communications device. The power management control circuit responds by exiting the power-saving mode and restoring power to the disabled power source to enable the computer to process the incoming communication. The remote communication may be through a wireless source such as a radio frequency channel or through a fixed wire such as a telephone network or LAN. Other aspects of the invention enable communication through an option card installed in a option slot or a notebooks docking station such as a radio device, modem, or LAN adapter.

BACKGROUND OF THE INVENTION

1. Technical Field

The present invention relates in general to methods for remote communication and, in particular, to methods of remote communication while operating in a power-saving mode, and still more particularly, the present invention relates to methods of wireless communication to notebook computers operating in a power-saving mode.

2. Description of the Related Art

Notebook computers typically provide batteries to allow for portability and such computers typically have automated methods for reducing power consumption, to allow for increased operation on a single battery charge. It is common for notebook computers to allow the user to select from a plurality of power saving options for a range of degrees of power-savings. A common method for reducing power is for the notebook computer to enter one or more power down or power saving modes, where the power is disabled to devices which are not being used. Power down modes commonly include a power-saving mode where the main microprocessor enters a power down state where the processor ceases executing program code but can be revived by a triggering events such as an interrupt caused by a pressing a keyboard key.

Recent advancements and diversification in communications include wireless communication between computers. Wireless communication to notebooks can be accomplished using radio frequency channels to transmit and receive information. Other remote communication methods include modems for connection to telephone lines, and devices for connecting to a LAN (local Area Networks) using electromagnetic waves or cable.

Communication to a computer typically requires a computer's operating system and an application software to be active. However, when a computer is in a power-saving mode, a device necessary for communication may be in an inactive power down mode or the microprocessor may be in a state where the program for handling the communications is not active. Accordingly, power down modes may inhibit or make both wire and wireless communication more difficult.

It is desirable to have a methods that allow remote communication to notebook computers which are operating in a power down or a power-saving mode.

SUMMARY OF THE INVENTION

The present invention enables communication to a computer, while the computer is in a power down or power-saving mode. The present method is applicable to wireless communications using a radio frequency channel. A method of the present comprises the steps of: (a) entering a power-saving mode; (b) detecting a wireless signal representing a sequence of bits which are targeted to be received by this computer; and (c) if certain optional conditions are satisfied, exiting the power-saving mode automatically in response to the detection of the wireless signal.

The method may optionally include determining that the wireless signal is targeted for the computer by detecting a particular identification tag which is embedded within the bit sequence. Optionally the power-saving mode may be exited only where status indicators, such as signals, registers, or stored data show that the device that receives wireless communications is installed and enabled. At least one power supply source may be disabled while in the power-saving mode, that is enabled automatically by a power management circuit when a wireless signal is detected that is targeted for the computer. A switch, such as a field effect transistor (FET), may be used to maintain power to the device that receives the wireless message while the computer is in a power-saving mode.

The methods of the present invention include a computer which has a device for receiving a wireless signal representing a bit sequence. While the computer is in a power-saving mode, a power-saving mode control is responsive to a signal indicating the detection of a wireless signal which is targeted for the computer. When this event occurs and certain conditions are satisfied, the power-saving control causes the computer to exit the power-saving mode. The power-saving control may be implemented using a combination of hardware and software and may include a microprocessor and memory for storing program code and data. The computer may include a means for regenerating some or all of the bit sequence represented by the wireless signal and store some or all of the bit sequence in the computer main memory. Optionally, the information conveyed by the bit sequence may require additional processing or action by the computer. When the information is processed the computer may then return to the power-saving mode.

The wireless signal may be transmitted through a radio frequency (RF) channel. For example, a radio device may be an RF module equipped with an RF antenna and used within a RF system. The device that receives wireless communications may be an integrated radio device or it may be an optional attachment. It may be embedded within the cover of a device bay. By providing alternate device bay covers or other mechanism, the device that receives wireless communications may be an optional attachment for the computer that may be added by the user or a technician.

The methods of the present invention are applicable to remote communications through a fixed wire, such as a telephone line or local area network cable. The receiving means may include an option card located in a option card slot or in a docking station. While a computer is operating in a power-saving state, a power-on request may be initiated by a LAN adapter, or PC card such as a modem to enable remote communication.

The remote communication may transfer information such as an EMAIL message or a command for the computer to exit a power-saving mode and continue execution of any program that was suspended when the computer entered.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

With reference now to the figures and in particular with reference toFIG. 1, there is an embodiment of the present invention for enabling wireless communications to a notebook computer10. A central microprocessor11executes programs under the control of an operating system. The central microprocessor11is coupled to a bridge circuit (a host-PCI bridge), which is called a memory/PCI control chip15, through system bus13. The memory/PCI control chip15includes a memory controller function for controlling memory17accesses, a data buffer decoupling the system bus13and PCI bus19, which have different data transfer speeds.

A main memory17is readable and writeable for storing program code or data used by programs. Programs include an operating system, various device drivers for controlling peripherals, application programs, and BIOS stored in a FLASH ROM49. A video subsystem21includes a video controller which handles request from the central microprocessor11and displaying image information on a liquid crystal screen (not shown) stored in video memory (VRAM).

A bus controller23provides an interface between the PCI bus19and a PCI option card slot25. A multifunction PCI device27communicatively couples the PCI bus19to an I/O bus39. The multifunction PCI device27includes PCI bus19to I/O bus39bridge, a DMA controller, a programable interrupt controller (PIC), a programable interval timer (PIT), an integrated drive electronics (IDE) interface, a universal serial bus (USB) interface, and a system management bus (SMB) interface. A multifunction PCI device27may be implemented using a PIIX4 chip supplied by Intel Inc.

Notebook computer10includes an IDE hard disk drive (HDD)31and a CD-ROM drive32which are both connected to the IDE interface. A digital video disk or digital versatile disk (DVD) may be connected to the IDE interface in place of the CD-ROM drive32. The hard drive31and CD-ROM32may be housed in an external housing called a device bay, which is considered a portion of the overall computer system10. These storage devices are standard and are interchangeable with other devices such as floppy disk drives (FDD) and batter packs.

A RF module33, is connected to the multifunction PCI deice27, in this embodiment. The RF module33which is electronically coupled to an antenna37provides transmission and reception of information transferred using radio frequency (RF) channels and is responsive to received information having a particular identification tag. The RF module receives a signal representing a sequence of bits conveying information transmitted by remote transmitter and provides data received to the computer system which is typically stored in main memory17. The RF module33can instruct the computer to exit a power-saving mode and begin active operation.

In this embodiment the RF module33and the RF antenna37are embedded in a cover209of a device bay which contains a hard drive21. RF Module33and antenna37can be options for the particular computer. A user that does not require the radio communication function can select a cover209for the device bay that does not have RF module33and RF antenna37. The cover can be optionally attached by the user or by a technician at the sales outlet. RF module33receives power through an FET switch35which is connected to a voltage source.

The I/O bus39may be an IBM AT compatible ISA bus which is connected to a super I/O controller41, a power source controller45, a flash ROM49, and CMOS memory50. A super I/O controller is a peripheral controller for controlling a floppy disk, parallel port, a serial port, and I/O port43. Power source controller45includes a microprocessor (MPU), RAM, ROM, and a timer. The ROM contains programs and reference tables necessary for performing a the power management and thermal management for the computer. Power supply controller47is connected to the power source controller45. Power supply controller47includes a DC/DC converter for generating a constant voltage such as 5 V and 3.3 V for use by the computer. Power supply controller47also includes a battery charger for charging a battery. Power supply controller47directs power under the control of the power source controller45.

Power source controller45has an writeable register with a VCC5P_On output signal which controls FET switch35. When VCC5p_On bit is set to logic level 1, power is supplied to the RF module33and when this bit is set to logic level 0, power to RF module33is disabled. The VCC5p_ON register output is routed to and driven by serial-parallel port converter77in the power switch controller48.

A register in RF controller46includes an RF_Enable bit which is set by a setup utility. The RF_Enable bit is set to logic level 1 to indicate that RF module33is attached and active, and is set to logic level 0 when the RF module33is not attached or not active.

RF controller46has a register with an output signal Battery5M_On which is used to maintaining power to the RF module33when the system is in a power-saving mode. When Battery5M_ON bit is set to logic level 1, voltage source VCC5M and VCC3M are enabled. The Battery5M_On register output is received by an OR gate79which generates a signal received by power-on logic75. Power-on logic75generates control signal V5ON which is received by a regulator circuit69which generates source voltages VCC5M and VCC3M.

A setup utility keeps a status bit WakeON_RF indicating whether the power-saving mode may be exited by a request from the RF module33. This bit is set to logic level 1 when these request are enabled and to logic level 0 when they are not.

A FLASH ROM49is a rewritable non-volatile memory for permanent storage for BIOS program code, which provides interface to many standard I/O functions such as keyboard and floppy drive as well as a power on systems test (POST).

Other circuits necessary for implementing the notebook computer, which are not disclosed herein, are well known by those skilled in the art.

Referring now toFIG. 2which is a schematic block diagram showing an embodiment of a power-on function that utilizes the methods of the present invention. A power supply controller47includes a regulator67, a switch71, and a AC/DC detection logic73. Regulator67receives an AC power source61, a main battery63power source, and a sub-battery65power source, and when any of these power sources are connected supplies output voltage source VccSW. Regulator69is responsive to an input signal V5ON. When V5ON is logic level 1 the regulator enables output power sources Vcc5B, Vcc3A, and VCC3B. AC/DC detection logic73monitors the AC Power source61, and generates a signal AC-DC—5M_ON indicating when AC power Source61is connected.

The voltage sources VCCSW, VCC5M, Vcc3M, VCC3a, Vcc5B, and Vcc3B are voltages sources used by the computer to power particular circuits. VccSW is enabled when one of the power sources61,63,65are connected. Vcc5M and Vcc3M are normally supplied when the AC adapter used for battery charge is F connected. When the computer is in a power-saving mode normally VccSW is the only voltage source that is enabled.

Power switch control48receives VccSW which is always active when any power source61,63,65is connected and active. This circuit includes power-on logic75, serial-parallel converter77, OR device79, an AND device81, detection circuits83,85and an inverter87. Power-On logic75receives the output from OR device79and the output from AND device81. Regulator circuit69and switch circuit71each receive an output signal generated by power-on logic75. OR device79receives signal AC-DC—5M_ON from AC/DC detection logic73. The other input to the OR device79is generated by RF controller46, which is a part of RF module33.

AND device81receives a signal from detection circuit85, which is also received by power source controller45for requesting that a power-saving mode be exited. This signal is also independently driven by a docking station91, MiniPCI bus system93, and a card bus system95. This signal may be driven by a card installed in a card bus slot25or a device attached to a USB connector29.

AND device81also receives a signal from RF module33. This signal is driven by detection circuit83and indicates when signal Wake_Up is active. Signal Wake_Up is also received by source controller45. Serial-parallel converter77receives a signal coupled through the power source controller45to a signal from the RF module33. The serial-parallel convertor77drives a signal that is received by a control input to the FET switch35and a signal that is received by RF module33.

RF module33transmits and receives information using radio frequency channels. For example RF module33may receive an instruction to turn the computer's power on that is in power-saving mode. It may enable a program that is suspended because of the computer entering power-saving mode to continue execution. The identification tag which is be embedded in data received by the RF module33indicating that the signal is targeted for the computer, can also be used for security purposes.

The RF module33is coupled to an RF antenna37. RF module33is comprised of regulator51, a module body55and a toggle switch57. Regulator51generates voltage source BT3V and receives power through FET switch35, which controls power source Vcc5M to RF module33.

The state of toggle switch57determines whether power is received by RF Module33. One terminal of toggle switch57is connected to ground, the other terminal of toggle switch57is connected to VCC5M through a resister. When toggle switch57is set to ON (conductive) then power source controller45responds by disabling power to RF module33.

RF module33facilitates handling of USB interface signals (Vcc5P, +D/−D, and GND) as well as various control signals such as Wake_Up, Detach, Flash UPD, and BTN. RF module33receives a signal Detach from serial-parallel convertor77, indicating whether a USB signal may be received. RF module32is connected to signal +D/−D of the USB interface. RF Module33drives Wake_Up signal which is received by power source controller45and OR device79, for facilitating the function of having the computer exit power-saving mode and start active operation.

Data received from RF antenna37may be transferred to the computer to either start execution of a specified computer program or the data may be used by a computer program. While the computer is in a power-saving mode, it may be difficult for the computer to receive the data incoming from RF antenna37.

In one embodiment of the present invention the reception of an incoming RF signal is always monitored allowing for the computer to exit a power-saving mode and start active operation when an RF signal which is directed to the computer is detected.

Referring now toFIG. 3which is a flow chart illustrating a methods of the present invention for having a computer which in a power-saving mode start active operation when a RF signal is sent to the computer. This method allows the circuit and software for managing power-saving mode to interact with the power control circuitry to maintain power to RF module33during power-saving mode, and to receive a command (Wake_Up) from RF Module33to exit power-saving mode to read data received by RF module33. This method is effective in any power-saving mode where power consumption is suppressed, such as standby, suspend, and sleep modes. This method allows electronic documents to be transferred to a computer, such as EMAIL, and database updates without requiring actions by the user.

In step101, the computer is powered on. BIOS is read from FLASH ROM49and copied into main memory. Central microprocessor11reads an RF data reception program for executing the following procedure.

In step103, a request is made to shift the computer into a power-saving mode where at least some of the computer systems are powered down. This request may come directly from a user request or indirectly from the operating system as specified by the user. When a request is detected step105is executed where the RF_Enable bit is checked to indicate whether RF module33is installed and active. If this bit is not asserted (logic level 0) then normal power-saving mode is entered in step111, otherwise step107is executed, in which status bit WakeOnRF is checked to determine whether power-on with RF communication is enabled. If this function is not enabled, then normal power-saving mode is entered in step111. Otherwise, in the next step109, Battery5M_ON bit and VCC5P ON bit are set to logic level 1 so that power is maintained to the RF module when power-saving mode is entered. When Battery5m_On and Vcc5p_On are set a logic level 1, power-on logic75drives control signal V5ON to the regulator circuit, for keeping the source voltages VCC5M and VCC3M active. Also when signal Vcc5p On is asserted, FET switch35is made conductive to maintain an active power source VCC5M to drive the RF module33.

In step113, the system request that power-saving mode be entered and step115is entered. Thus, in power-saving mode, voltage source Vcc3A is maintained as well as Vcc5M, and VccSW although other voltage sources and circuits they feed may be disabled. Source voltage VccSW is maintained to power switch controller48during power-saving mode allowing this switch to drive the drive the power On logic for causing switch circuit71to enable the computer voltage sources. In step115, the Wake_Up signal from RF module33is monitored. When Wake_Up signal is asserted, step117is executed where functions are requested which are necessary for returning to active operation.

Step119is executed for handling any other processing necessary for exiting power-saving mode. In step121, the reason for exiting power-saving mode is determined. If it is determined that the reason for exiting power-saving mode is a request from RF module33, then data received by RF module33is read in to the computer's main memory. Step125is entered where the system reenters power-saving mode in a manner indicated by previously stored information in memory or on the hard drive.

Now referring toFIG. 4the method of the present invention may be applied to remote communication through a device installed in a docking station91, MiniPCI bus system93, or a card bus system95for enabling the computer to exit power-saving mode to communicate with peripherals such as a radio receiver/transmitter, a modem, or LAN adapter.

Docking station91is comprised of a radio device91which is electronically coupled to both an antenna91C and a docking controller91A. Docking controller91A is electronically coupled to both a detection circuit85and a power source controller45.

Embodiments of the present invention enable a docking station91, MiniPCI bus93, or card bus system95to communicate to the system, which is in power-saving mode when data is received either through wireless communication methods or a fixed wire communication methods such as a telephone line or cable connection to a local area network(LAN). MiniPCI bus system93is comprised of a radio device93B which is electronically coupled to both an antenna93C, and a modem93A. Card bus system95is comprised of a radio device95B which is electronically coupled to both an antenna95C and a card bus controller23. Modem93A and card bus controller23are electronically coupled to both detection circuit85and power source controller45.

Docking controller91A is powered from voltage source VccDOCK. Modem93A is powered from voltage source VccMPC1 and card bus controller23is powered from voltage source VccCBC.

These source voltages VccDOCK, VccMPC1, and VccCBC are provided while in power-saving mode in a manner similar to the above described methods for proving Vcc5p to the RF module33while in power-saving mode. Signals (PME) provide the equivalent function of the WakeUp signal in the above described methods. When the PME signal is active, power on logic75generates a signal to switch circuit71to turn power on to the system and exit power-saving mode.

Now referring toFIG. 5which shows an outline of a computer10embodying the present invention. The computer10comprises a body201containing the components shown inFIG. 1, a crystal display203, a keyboard207, a CD-ROM drive32, and a cover of a device bay containing a hard drive31. Cover209of the device bay may be used to contain RF module33and antenna37.

While the invention has been particularly shown and described with reference to preferred embodiments, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention.