Data storage device and method for enabling metadata-based seek points for media access

A data storage device and method for enabling metadata-based seek points for media access are provided. In one embodiment, a data storage device is provided comprising a memory and a controller. The controller is configured to identify a plurality of frames in video data that differ from surrounding frames by more than a threshold amount; store identifiers of the plurality of frames in the memory; and send the identifiers to the host to enable quick playback of the video data by the host. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.

BACKGROUND

A data storage device can store a data stream sent to it by a host of a surveillance system. The data can be stored in the Moving Picture Experts Group Transport Stream (MPEG-TS) format. Frames of interest (e.g., where certain action happens) can be scattered across the entire video recording, where periods of inactivity are interspersed with periods of activity. Identification of these frames of interest is not straightforward, as it involves a user retrieving the entire stored video from the data storage device and going through the footage manually at a normal or faster playback speed. This requires a lot of manual work as frames cannot be skipped and must be browsed through to identify any activity.

DETAILED DESCRIPTION

Overview

By way of introduction, the below embodiments relate to a data storage device and method for enabling metadata-based seek points for media access. In one embodiment, a data storage device is provided comprising a memory and a controller. The controller is configured to identify a plurality of frames in video data that differ from surrounding frames by more than a threshold amount; store identifiers of the plurality of frames in the memory; and send the identifiers to the host to enable quick playback of the video data by the host.

In some embodiments, the identifiers comprise metadata.

In some embodiments, the identifiers comprise frame numbers.

In some embodiments, the identifiers are sent to the host using a vendor-specific command.

In some embodiments, the identifiers are sent to the host in response to receiving a quick-playback request from the host.

In some embodiments, the identifiers are sent to the host in response to receiving a request from the host for the identifiers.

In some embodiments, the controller is further configured to identify the plurality of frames based on entropy changes in the video data.

In some embodiments, the controller is further configured to determine a best set of frames based on image clarity.

In some embodiments, the identifiers are sent to the host as a suggestion that the host is free to accept or disregard.

In some embodiments, the controller is further configured to identify the plurality of frames using an algorithm that is based on a host configuration.

In some embodiments, identifying the plurality of frames, the controller is further configured to identify frames that contain an object of interest provided by the host.

In some embodiments, the memory comprises a three-dimensional memory.

In another embodiment, a method is provided comprising identifying a plurality of frames in video data that contain a threshold amount of entropy change; storing seek points for the plurality of frames as metadata in the memory, wherein the seek points are set at non-sequential logical addresses in the memory; and sending the seek points to the host.

In some embodiments, the seek points comprise frame numbers.

In some embodiments, the seek points are sent to the host using a vendor-specific command.

In some embodiments, the seek points are sent to the host in response to receiving a quick-playback request from the host.

In some embodiments, the seek points are sent to the host in response to receiving a request from the host for the seek points.

In some embodiments, the method further comprises determining a best set of frames based on image clarity.

In some embodiments, the seek points are sent to the host as a suggestion that the host is free to accept or disregard.

In another embodiment, a storage system is provided comprising a memory; means for identifying a plurality of frames in video data for quick playback; and means for sending metadata-based markers identifying the plurality of frames to the host for quick playback.

Embodiments

The following embodiments relate to a data storage device (DSD). As used herein, a “data storage device” refers to a device that stores data. Examples of DSDs include, but are not limited to, hard disk drives (HDDs), solid state drives (SSDs), tape drives, hybrid drives, etc. Details of example DSDs are provided below.

Data storage devices suitable for use in implementing aspects of these embodiments are shown inFIGS.1A-1C.FIG.1Ais a block diagram illustrating a data storage device100according to an embodiment of the subject matter described herein. Referring toFIG.1A, data storage device100includes a controller102and non-volatile memory that may be made up of one or more non-volatile memory die104. As used herein, the term die refers to the collection of non-volatile memory cells, and associated circuitry for managing the physical operation of those non-volatile memory cells, that are formed on a single semiconductor substrate. Controller102interfaces with a host system and transmits command sequences for read, program, and erase operations to non-volatile memory die104.

As used herein, a non-volatile memory controller is a device that manages data stored on non-volatile memory and communicates with a host, such as a computer or electronic device. A non-volatile memory controller can have various functionality in addition to the specific functionality described herein. For example, the non-volatile memory controller can format the non-volatile memory to ensure the memory is operating properly, map out bad non-volatile memory cells, and allocate spare cells to be substituted for future failed cells. Some part of the spare cells can be used to hold firmware to operate the non-volatile memory controller and implement other features. In operation, when a host needs to read data from or write data to the non-volatile memory, it can communicate with the non-volatile memory controller. If the host provides a logical address to which data is to be read/written, the non-volatile memory controller can convert the logical address received from the host to a physical address in the non-volatile memory. (Alternatively, the host can provide the physical address.) The non-volatile memory controller can also perform various memory management functions, such as, but not limited to, wear leveling (distributing writes to avoid wearing out specific blocks of memory that would otherwise be repeatedly written to) and garbage collection (after a block is full, moving only the valid pages of data to a new block, so the full block can be erased and reused).

Non-volatile memory die104may include any suitable non-volatile storage medium, including resistive random-access memory (ReRAM), magnetoresistive random-access memory (MRAM), phase-change memory (PCM), NAND flash memory cells and/or NOR flash memory cells. The memory cells can take the form of solid-state (e.g., flash) memory cells and can be one-time programmable, few-time programmable, or many-time programmable. The memory cells can also be single-level cells (SLC), multiple-level cells (MLC) (e.g., dual-level cells, triple-level cells (TLC), quad-level cells (QLC), etc.) or use other memory cell level technologies, now known or later developed. Also, the memory cells can be fabricated in a two-dimensional or three-dimensional fashion.

The interface between controller102and non-volatile memory die104may be any suitable flash interface, such as Toggle Mode200,400, or800. In one embodiment, the data storage device100may be a card based system, such as a secure digital (SD) or a micro secure digital (micro-SD) card. In an alternate embodiment, the data storage device100may be part of an embedded data storage device.

Although, in the example illustrated inFIG.1A, the data storage device100(sometimes referred to herein as a storage module) includes a single channel between controller102and non-volatile memory die104, the subject matter described herein is not limited to having a single memory channel. For example, in some architectures (such as the ones shown inFIGS.1B and1C), two, four, eight or more memory channels may exist between the controller and the memory device, depending on controller capabilities. In any of the embodiments described herein, more than a single channel may exist between the controller and the memory die, even if a single channel is shown in the drawings.

FIG.1Billustrates a storage module200that includes plural non-volatile data storage devices100. As such, storage module200may include a storage controller202that interfaces with a host and with data storage device204, which includes a plurality of data storage devices100. The interface between storage controller202and data storage devices100may be a bus interface, such as a serial advanced technology attachment (SATA), peripheral component interconnect express (PCIe) interface, or double-data-rate (DDR) interface. Storage module200, in one embodiment, may be a solid state drive (SSD), or non-volatile dual in-line memory module (NVDIMM), such as found in server PC or portable computing devices, such as laptop computers, and tablet computers.

FIG.1Cis a block diagram illustrating a hierarchical storage system. A hierarchical storage system250includes a plurality of storage controllers202, each of which controls a respective data storage device204. Host systems252may access memories within the storage system250via a bus interface. In one embodiment, the bus interface may be a Non-Volatile Memory Express (NVMe) or Fibre Channel over Ethernet (FCoE) interface. In one embodiment, the system illustrated inFIG.1Cmay be a rack mountable mass storage system that is accessible by multiple host computers, such as would be found in a data center or other location where mass storage is needed.

FIG.2Ais a block diagram illustrating components of controller102in more detail. Controller102includes a front-end module108that interfaces with a host, a back-end module110that interfaces with the one or more non-volatile memory die104, and various other modules that perform functions which will now be described in detail. A module may take the form of a packaged functional hardware unit designed for use with other components, a portion of a program code (e.g., software or firmware) executable by a (micro)processor or processing circuitry that usually performs a particular function of related functions, or a self-contained hardware or software component that interfaces with a larger system, for example. Also, “means” for performing a function can be implemented with at least any of the structure noted herein for the controller and can be pure hardware or a combination of hardware and computer-readable program code.

Referring again to modules of the controller102, a buffer manager/bus controller114manages buffers in random access memory (RAM)116and controls the internal bus arbitration of controller102. A read only memory (ROM)118stores system boot code. Although illustrated inFIG.2Aas located separately from the controller102, in other embodiments one or both of the RAM116and ROM118may be located within the controller. In yet other embodiments, portions of RAM and ROM may be located both within the controller102and outside the controller.

Front-end module108includes a host interface120and a physical layer interface (PHY)122that provide the electrical interface with the host or next level storage controller. The choice of the type of host interface120can depend on the type of memory being used. Examples of host interfaces120include, but are not limited to, SATA, SATA Express, serially attached small computer system interface (SAS), Fibre Channel, universal serial bus (USB), PCIe, and NVMe. The host interface120typically facilitates transfer for data, control signals, and timing signals.

The data storage device100also includes other discrete components140, such as external electrical interfaces, external RAM, resistors, capacitors, or other components that may interface with controller102. In alternative embodiments, one or more of the physical layer interface122, RAID module128, media management layer138and buffer management/bus controller114are optional components that are not necessary in the controller102.

FIG.2Bis a block diagram illustrating components of non-volatile memory die104in more detail. Non-volatile memory die104includes peripheral circuitry141and non-volatile memory array142. Non-volatile memory array142includes the non-volatile memory cells used to store data. The non-volatile memory cells may be any suitable non-volatile memory cells, including ReRAM, MRAM, PCM, NAND flash memory cells and/or NOR flash memory cells in a two-dimensional and/or three-dimensional configuration. Non-volatile memory die104further includes a data cache156that caches data. Peripheral circuitry141includes a state machine152that provides status information to the controller102.

Returning again toFIG.2A, the flash control layer132(which will be referred to herein as the flash translation layer (FTL) or, more generally, the “media management layer,” as the memory may not be flash) handles flash errors and interfaces with the host. In particular, the FTL, which may be an algorithm in firmware, is responsible for the internals of memory management and translates writes from the host into writes to the memory104. The FTL may be needed because the memory104may have limited endurance, may be written in only multiples of pages, and/or may not be written unless it is erased as a block. The FTL understands these potential limitations of the memory104, which may not be visible to the host. Accordingly, the FTL attempts to translate the writes from host into writes into the memory104.

The FTL may include a logical-to-physical address (L2P) map (sometimes referred to herein as a table or data structure) and allotted cache memory. In this way, the FTL translates logical block addresses (“LBAs”) from the host to physical addresses in the memory104. The FTL can include other features, such as, but not limited to, power-off recovery (so that the data structures of the FTL can be recovered in the event of a sudden power loss) and wear leveling (so that the wear across memory blocks is even to prevent certain blocks from excessive wear, which would result in a greater chance of failure).

Turning again to the drawings,FIG.3is a block diagram of a host300and data storage device100of an embodiment. The host300can take any suitable form, including, but not limited to, a computer, a mobile phone, a tablet, a wearable device, a digital video recorder, a surveillance system, etc. The host300in this embodiment (here, a computing device) comprises a processor330and a memory340. In one embodiment, computer-readable program code stored in the host memory340configures the host processor330to perform the acts described herein. So, actions performed by the host300are sometimes referred to herein as being performed by an application (computer-readable program code) run on the host300. For example, the host300can be configured to send data (e.g., initially stored in the host's memory340) to the data storage device100for storage in the data storage device's memory104.

The data storage device100can be used to store a data stream sent to it by the host300. In one embodiment, the video data is stored in the memory104in the Moving Picture Experts Group Transport Stream (MPEG-TS) format, although other formats can be used. In general, with video compression, different video frames are compressed using different compression algorithms. Different video frames can be classified into different picture or frame types. Three of the major picture types are intra-coded picture frames (I-frames), predicted picture frames (P-frames), and bidirectional predicted picture frames (B-frames). I-frames are the least compressible but are independent in that they can be decoded without reference to other video frames. An I-frame can be a complete image, such as a Joint Photographic Experts Group (JPEG) image file. In contrast, a predicted picture frame (P-frame) (or delta frame) contains the changes in the image from the previous frame and requires reference to other video frames to be decompressed. However, P-frames are more compressible that I-frames. A bidirectional predicted picture frame (B-frame) contains differences between the current frame and both the preceding and following frames. Accordingly, B-frames provide the highest amount of data compression.

Further, an Instantaneous Decoder Refresh (IDR) frame is a group of I-frame slices. With an IDR frame, all pictures in a reference buffer are marked as use for reference, and all subsequently-transmitted slices are decoded without reference to any frame decoded prior to the IDR frame. No frame after the IDR frame can reference any frame before it. IDR frames are used to avoid any distortions in the video when fast-forwarding. IDR frames are particularly useful for comparison to the reference image from the host because IDR frames are independently-decodable frames on par with an image.

As mentioned above, the data storage device100can store a data stream sent to it by the host300(the host300can be a surveillance system containing one or more cameras or be in communication with a surveillance system that contains one or more cameras). The data can be stored in memory in the Moving Picture Experts Group Transport Stream (MPEG-TS) format. Frames of interest (e.g., where certain action happens) can be scattered across the entire video recording, where periods of inactivity are interspersed with periods of activity, as shown inFIG.4. Identification of these frames of interest is not straightforward, as it involves a user retrieving the entire stored video from the data storage device and going through the footage manually at a normal or faster playback speed. This requires a lot of manual work as frames cannot be skipped and must be browsed through to identify any activity.

To reduce bandwidth and latency, the controller102in the data storage device100can determines entropy of the data, segregate high-entropy data as another file, and uses the data as a way for quick playback either in real time or non-real time. More specifically, the controller102can identify a plurality of frames in the video data (sometimes referred to herein as “media data”) stored in the memory104that differ from surrounding frames by more than a threshold amount by defining “instances” based on entropy change in the video data. As used herein, an “instance” refers to a set of closely-bound video frames with a sufficient delta above a threshold, which can be defined by the host300or by the data storage device100, for example. In one embodiment, the instances are identified based on an entropy change (e.g., a threshold delta change) in the video data over a time period. The entropy change defines the movement or specifically the delta difference or localized movement between closely-bound video frames in time. The entropy can be determined by the controller102through decoding. The controller102can detect multiple instances over time, accumulate them, and tag them with the corresponding time in the video stream. Such a collection of instances is referred to herein as an album, which is a downsized and event-only version of the stored video data with time tags. When the data storage device100receives a request from the host300for quick playback of the video data, the data storage device100can send the plurality of frames (the album) to the host300instead of the entire video file stored in the memory104, which minimizes data transfers between the data storage device100and the host300. The host300can later request more frames for a more-detailed playback. More details can be found in U.S. Pat. No. 11,328,511, which is hereby incorporated by reference.

In one embodiment, the controller102of the data storage device100can calculate entropy (as described above or using a different method) but store and maintain only the metadata of eventful frame numbers instead of creating a snapshot of frames itself in the memory102. This further helps preserve endurance of the memory104, conserves power, and increases performance. More specifically, the controller102can understand the underlying video encoding scheme. As the host300is recording the continuous video in the data storage device100, the controller102can decode and calculate the entropy of various key frames in the background. The entropy can be calculated, for example, to identify the frames where a change in scene is detected. These can be the frames of interest for surveillance applications where the user is interested in identifying any movement in the field of vision of the camera. Frames whose entropy differs from previous frames by more than a threshold (e.g., a pre-defined threshold) are identified and remembered as markers in the data storage device100. The metadata of the markers can be backed up in memory104during writes, and this can be passed on to the host300, for example, through vendor-specific commands or during quick playback requests on the given logical range.

Due to this flexibility, in addition, the controller102may perform analytics on the images to determine the best set of frames among high-entropy data based on one or more parameters (e.g., image clarity, a clear image of a face, a clear number plate, etc.) and store the metadata of that set of frames. This act can be independent of other acts in the data storage device100. The concept of metadata tagging and storage can be tweaked towards higher quality of service (QoS) of the algorithm. For example, the controller102can store markers based on the clarity of the stored data. Among multiple adjacent video frames, if the controller102determines certain frames (e.g., a person's face or a license play) are crisp and clear, the frames can be a part of the quick playback even though they do not form extended information.

When the time comes for playback (e.g., quick playback mode), the controller102can use the metadata and provide a suggestion to the host300on the relevant “seek points” in a closed loop based on the metadata of high-entropy frames (seeFIG.5). The host300may or may not leverage the data-storage-device-generated seek points, thereby enabling backward compatibility. The host300can have the option of making use of the markers (or metadata) to seek to the next frame of interest. The host300can skip multiple frames and “seek” directly to the frame of interest. In other words, the data storage device100generates “automatic skips.” The host300can also have the option of ignoring the data storage device's suggested “seek” points and continue with the manual playback for legacy compatibility. As can be seen from the above example, the controller102can identify the start of activity and can suggest “seek” points to the host300where the playback can directly jump to.

The host300can query for the metadata (e.g., logical block address (LBA) or frame table) and use it to seek to frames of interest directly, thereby minimizing the need for manual analysis of footage. In this case, the host300may store the metadata back to the memory104, and the files may be part of the file system. In addition, the controller102can tweak the analytics algorithm based on a host configuration to create “seek” metadata concentrating on specific objects of interests rather than the entropy of the data. Likewise, multiple seek tables may be created based on host configuration, enabling multiple efficient playback types for the host300. For example, the controller102can generate a metadata table for all the frames involving a red car. Other frames showing movement, even if the frames are important, may not be considered in the table since those frames do not contain what the host300identified as being of interest.

FIGS.6and7provide flow charts600,700of methods that illustrate the above operations. As shown inFIG.6, when the data storage device100receives a video stream from the host300(act610), the controller102in the data storage device100interprets the incoming video (act620). The controller102then determines if there is new activity in sequential frames or groups of frames in the video (e.g., if there is high entropy above a threshold) (act630). If new activity is not detected, the controller102skips to the next frame (act650) and the method loops back to act620. However, if new activity is detected, the controller102creates a marker for the new activity and stores a reference to a seek point in metadata in the memory104(act640) and repeats the above process for the next frame (act650).

As shown inFIG.7, when the host300initiates video playback from the data storage device100(act710), the controller102of the data storage device100provides the host300with the seek points that were stored in the memory104(act720). The processor330of the host300then determines whether optimized playback is desired (act730). If optimized playback is desired, the processor330of the host300skips to the device-provided seek frames and continues playback (act740). If optimized playback is not desired, the processor330of the host300ignores the device-provided seek frames and playbacks back all the frames (act750). In either case, the processor330of the host300determines if it is the end of the video playback (act760) and ends playback (act770) or loops back to act720, accordingly.

There are several advantages associated with these embodiments. For example, these embodiments provide efficient analysis of playback video by allowing direct seeking to the frames of activity, thus allowing easier playback automation. Also, these embodiments can preserve memory endurance, reduce power consumption, and increase performance. Further, these embodiments can provide time-efficient playback and can consolidate important data for multiple purposes.

One of skill in the art will recognize that this invention is not limited to the two dimensional and three-dimensional structures described but cover all relevant memory structures within the spirit and scope of the invention as described herein and as understood by one of skill in the art.