Systems and methods for optimizations and field configurations of power converters for a power supply unit

A power supply unit may include a first power converter configured to generate an output voltage to an output of the power supply unit, wherein the first power converter has a first power capacity, a second power converter configured to generate the output voltage to the output of the power supply unit, wherein the second power converter has a second power capacity substantially greater than the first power capacity, and a controller configured to selectively enable and disable each of the first power converter and the second power converter based on one or more parameters associated with the power supply unit.

TECHNICAL FIELD

The present disclosure relates in general to information handling systems, and more particularly to systems and methods for optimizing power converters for a power supply unit.

BACKGROUND

An information handling system may include one or more power supply units for providing electrical energy to components of the information handling system. Typically, a power supply unit is configured to convert an alternating-current waveform received at an input to a bulk direct-current waveform, which is in turn converted at the output of the power supply unit to an output direct-current waveform used to power components of the information handling system. Thus, a power supply unit may include a rectifier and/or power factor correction stage configured to receive the input alternating current source and rectify the input alternating waveform to charge a bulk capacitor to a desired voltage. A direct-current-to-direct-current stage may convert the voltage on the bulk capacitor to a direct-current output voltage provided to components of the information handling system in order to power such components.

Using traditional approaches, existing power supply units often have low efficiencies at light loads. Typically, a main power stage of a power supply unit is optimized for higher loads in order to meet thermal requirements of a system. Thus, for lower loads of the power supply unit, power supply efficiency may be much lower.

In addition, information handling systems are seeing increasing demand for standby power. Existing PSUs used in information handling systems often include a standby power converter as a low power cost optimized design which may be less efficient and limited in power capacity. Future generation information handling systems are expected to have a higher demand for standby power (e.g., three times the requirement of existing systems).

Furthermore, traditional power supply units often lack scalability. For example, if a need arises to increase power capacity in an information handling system, a user of the information handling system may need to swap out a lower-capacity power supply unit in favor of a higher-capacity power supply unit. The range of capacities required for information handling system servers (e.g., 500 W to 2400 W) requires multiple parts to be designed and stocked, leading to complexity.

SUMMARY

In accordance with the teachings of the present disclosure, the disadvantages and problems associated with existing power supply units may be reduced or eliminated.

In accordance with embodiments of the present disclosure, a power supply unit may include a first power converter configured to generate an output voltage to an output of the power supply unit, wherein the first power converter has a first power capacity, a second power converter configured to generate the output voltage to the output of the power supply unit, wherein the second power converter has a second power capacity substantially greater than the first power capacity, and a controller configured to selectively enable and disable each of the first power converter and the second power converter based on one or more parameters associated with the power supply unit.

In accordance with these and other embodiments of the present disclosure, a method may be provided for use in a power supply unit comprising a first power converter configured to generate an output voltage to an output of the power supply unit, wherein the first power converter has a first power capacity and a second power converter configured to generate the output voltage to the output of the power supply unit, wherein the second power converter has a second power capacity substantially greater than the first power capacity. The method may include selectively enabling and disabling each of the first power converter and the second power converter based on one or more parameters associated with the power supply unit.

DETAILED DESCRIPTION

Preferred embodiments and their advantages are best understood by reference toFIGS. 1-4, wherein like numbers are used to indicate like and corresponding parts.

For the purposes of this disclosure, information handling resources may broadly refer to any component system, device or apparatus of an information handling system, including without limitation processors, service processors, basic input/output systems (BIOSs), buses, memories, I/O devices and/or interfaces, storage resources, network interfaces, motherboards, power supplies, air movers (e.g., fans and blowers) and/or any other components and/or elements of an information handling system.

FIG. 1illustrates a block diagram of selected components of an example information handling system102, in accordance with embodiments of the present disclosure. As depicted, information handling system102may include a power supply unit (PSU)110, a motherboard101, and one or more other information handling resources.

Motherboard101may include a circuit board configured to provide structural support for one or more information handling resources of information handling system102and/or electrically couple one or more of such information handling resources to each other and/or to other electric or electronic components external to information handling system102. As shown inFIG. 1, motherboard101may include a processor103, memory104, a management controller106, and one or more other information handling resources.

Memory104may be communicatively coupled to processor103and may comprise any system, device, or apparatus operable to retain program instructions or data for a period of time. Memory104may comprise random access memory (RAM), electrically erasable programmable read-only memory (EEPROM), a PCMCIA card, flash memory, magnetic storage, opto-magnetic storage, or any suitable selection and/or array of volatile or non-volatile memory that retains data after power to information handling system102is turned off.

Management controller106may be configured to provide out-of-band management facilities for management of information handling system102. Such management may be made by management controller106even if information handling system102is powered off or powered to a standby state. Management controller106may include a processor, memory, an out-of-band network interface separate from and physically isolated from an in-band network interface of information handling system102, and/or other embedded information handling resources. In certain embodiments, management controller106may include or may be an integral part of a baseboard management controller (BMC) or a remote access controller (e.g., a Dell Remote Access Controller or Integrated Dell Remote Access Controller). In other embodiments, management controller106may include or may be an integral part of a chassis management controller (CMC). In some embodiments, management controller106may be configured to communicate with a PSU110to communicate control and/or telemetry data between management controller106and PSU110(e.g., via a Power Management Bus). For example, PSU110may communicate information regarding status and/or health of PSU110and/or measurements of electrical parameters (e.g., electrical currents or voltages) present within PSU110.

Generally speaking, PSU110may include any system, device, or apparatus configured to supply electrical current to one or more information handling resources of information handling system102. Example implementations of PSU110may be represented below byFIGS. 2 and 4and the descriptions thereof.

In addition to motherboard101, processor103, memory104, management controller106, and PSU110, information handling system102may include one or more other information handling resources. For example, in some embodiments, information handling system102may include more than one PSU110.

FIG. 2illustrates a block diagram of selected components of an example PSU110A, in accordance with embodiments of the present disclosure. Example PSU110A ofFIG. 2may be used in some embodiments to implement PSU110depicted inFIG. 1. As shown inFIG. 2, PSU110A may include a microcontroller unit (MCU)212and a power train with multiple converter stages: a rectifier/power factor correcting (PFC) stage202, a plurality of DC/DC converter stages204(e.g., DC/DC converter stage204A and DC/DC converter stage204B), and a bulk capacitor206coupled between an output of rectifier/PFC stage202and the respective inputs of DC/DC converter stages204.

MCU212may comprise a microprocessor, DSP, ASIC, FPGA, EEPROM, or any combination thereof, or any other device, system, or apparatus for controlling operation of PSU110A. As such, MCU212may comprise firmware, logic, and/or data for controlling functionality of PSU110A. In some embodiments, an MCU212may be communicatively coupled to management controller106allowing for communication of data and/or control signals between management controller106and MCU212.

As shown inFIG. 2, MCU212may have stored thereon firmware214(or, in some embodiments, firmware214may be stored on computer-readable media accessible by MCU212). Firmware214may comprise any program of executable instructions, or aggregation of programs of executable instructions, configured to perform the functionality of MCU212, including managing and/or controlling the operation of PSU110A. In some embodiments, firmware116may be implemented with an operating system, such as Linux, for example.

The power train of PSU110A may be coupled at its outputs to a power bus configured to deliver electrical energy to motherboard101and other components of information handling system102. Such power train may be configured to convert electrical energy received by PSU110A (e.g., a 120-volt alternating current voltage waveform) into electrical energy usable to information handling resources of information handling system102(e.g., 12-volt direct current voltage source). In some embodiments, the power train may comprise a rectifier. In these and other embodiments, the power train may comprise a voltage regulator (e.g., a multi-phase voltage regulator). As mentioned above, the power train of PSU110A may comprise rectifier/power factor correcting (PFC) stage202, a plurality of DC/DC converter stages204, and a bulk capacitor206.

Rectifier/PFC stage202may be configured to, based on an input current Iin, a sinusoidal voltage source vIN, and a bulk capacitor voltage VBULK, shape the input current Iinto have a sinusoidal waveform in-phase with the source voltage via and to generate regulated DC bus voltage VBULKon bulk capacitor206. In some embodiments, rectifier/PFC stage202may be implemented as an AC/DC converter using a boost converter topology.

Each DC/DC converter stage204may be configured to convert bulk capacitor voltage VBULKto a DC output voltage VOUTwhich may be provided to a load (e.g., to motherboard101and/or other information handling resources of information handling system102in order to power such information handling resources). In some embodiments, DC/DC converter stage204may be implemented as a resonant converter which converts a higher DC voltage (e.g., 400 V) into a lower DC voltage (e.g., 12 V).

As shown inFIG. 2, PSU unit110A may also include current sensors208A and208B, configured to sense output currents delivered by DC/DC converter stage204A and DC/DC converter stage204B, respectively. Signals indicative of the current delivered by each DC/DC converter stage204may be fed back to their respective DC/DC converter stage204in order for the respective DC/DC converter stage204to properly regulate its operation and output voltage.

As shown inFIG. 2, PSU unit110A may also include current sensor210, configured to sense cumulative output currents delivered by DC/DC converter stages204. Signals indicative of the cumulative current delivered by DC/DC converter stages204may be fed back MCU212such that MCU212may control operation of PSU110A in accordance with such measured current (which may be indicative of a power delivered by PSU110A).

In some embodiments, DC/DC converter stage204A may have a first power capacity and DC/DC converter stage204B may have a significantly different second power capacity (e.g., the second power capacity may be twice that of the first power capacity). In operation, at powering on of information handling system102, MCU212may activate (e.g., turn on) DC/DC converter stage204A in order to deliver standby power to components of information handling system102. During this time, MCU212may cause DC/DC converter stage204B to run in a low power (e.g., sleep) mode in order to minimize idling power loss. Once information handling system102has booted, if the power demand of information handling system102exceeds the first power capacity (e.g., as indicated by current sensor210), MCU212may activate DC/DC converter stage204B and then deactivate DC/DC converter stage204A and cause DC/DC converter stage204B to enter a low power (e.g., sleep mode). Further, if the power demand of information handling system102exceeds the second power capacity, MCU212may activate DC/DC converter stage204A and leave DC/DC converter stage204B activated. MCU212may also deactivate converter stage204A if the power demand of information handling system102is less than the second power capacity. Additionally, in case of overload, both DC/DC converter stages204may respond by applying overcurrent protection based on a total current demand and duration thereof. Operation of PSU110A is described in greater detail with respect toFIG. 3below.

FIG. 3illustrates a flow chart of an example method300for operation of example PSU110A depicted inFIG. 2, in accordance with embodiments of the present disclosure. According to some embodiments, method300may begin at step302. As noted above, teachings of the present disclosure may be implemented in a variety of configurations of information handling system102. As such, the preferred initialization point for method300and the order of the steps comprising method300may depend on the implementation chosen.

Method300may begin at step302, following an initial powering on of information handling system102. At step302, MCU212may activate rectifier/PFC stage202. Subsequently, at step304, MCU212may activate DC/DC converter stage204A and cause DC/DC converter stage204B to remain in a low-power/sleep mode, such that power demands of information handling system102are supplied by DC/DC converter stage204A. At step306, a standby mode of information handling system102may become active. Later, at step308, information handling system102may become fully active.

At step310, MCU212may determine whether the power demand of information handling system102is less than the first power capacity of DC/DC converter stage204A. As long as the power demand of information handling system102is less than the first power capacity of DC/DC converter stage204A, method300may remain at step310. Otherwise, once the power demand of information handling system102exceeds the first power capacity of DC/DC converter stage204A, method300may proceed to step312.

At step312, MCU212may activate DC/DC converter stage204B and cause DC/DC converter stage204A to enter into a low-power/sleep mode, such that power demands of information handling system102are supplied by DC/DC converter stage204B. At step314, MCU212may determine whether the power demand of information handling system102is less than the second power capacity of DC/DC converter stage204B. If the power demand of information handling system102is less than the second power capacity of DC/DC converter stage204B, method300may proceed to step316. Otherwise, if the power demand of information handling system102exceeds the second power capacity of DC/DC converter stage204B, method300may proceed to step320.

At step316, MCU212may determine whether the power demand of information handling system102is less than the first power capacity of DC/DC converter stage204A. If the power demand of information handling system102exceeds the first power capacity of DC/DC converter stage204A, method300may proceed again to step314. Otherwise, if the power demand of information handling system102is less than the first power capacity of DC/DC converter stage204A, method300may proceed to step318.

At step318, MCU212may activate DC/DC converter stage204A and cause DC/DC converter stage204B to remain in a low-power/sleep mode, such that power demands of information handling system102are supplied by DC/DC converter stage204A. After completion of step318, method300may proceed again to step310.

At step320, MCU212may activate both DC/DC converter stages204, such that power demands of information handling system102are supplied by both DC/DC converter stages204operating in tandem. At step322, MCU212may determine whether the power demand of information handling system102is less than the sum of the first power capacity of DC/DC converter stage204A and the second power capacity of DC/DC converter stage204B. If the power demand of information handling system102is less than the sum of the first power capacity of DC/DC converter stage204A and the second power capacity of DC/DC converter stage204B, method300may proceed to step324. Otherwise, if the power demand of information handling system102exceeds the sum of the first power capacity of DC/DC converter stage204A and the second power capacity of DC/DC converter stage204B, method300may proceed to step328.

At step324, MCU212may determine whether the power demand of information handling system102is between the first power capacity of DC/DC converter stage204A and the second power capacity of DC/DC converter stage204B. If the power demand of information handling system102is between the first power capacity of DC/DC converter stage204A and the second power capacity of DC/DC converter stage204B, method300may proceed again to step312. Otherwise, if the power demand of information handling system102is not between the first power capacity of DC/DC converter stage204A and the second power capacity of DC/DC converter stage204B, method300may proceed to step326.

At step326, MCU212may determine whether the power demand of information handling system102is less than the first power capacity of DC/DC converter stage204A. If the power demand of information handling system102exceeds the first power capacity of DC/DC converter stage204A, method300may proceed again to step322. Otherwise, if the power demand of information handling system102is less than the first power capacity of DC/DC converter stage204A, method300may proceed again to step318.

At step328, because the power demand of information handling system102exceeds the combined power capacities of both DC/DC converter stages204, an overcurrent condition exists, and both DC/DC converter stages204may be placed in an overcurrent protection mode and an overcurrent protection current timer may be started. At step330, if the overcurrent protection timer expires while DC/DC converter stages204are in their overcurrent protection modes, method300may end. Otherwise, if the overcurrent protection timer does expire before DC/DC converter stages204exit their overcurrent protection modes, method300may proceed again to step320in which both DC/DC converter stages204will operate in their regular active operational modes.

AlthoughFIG. 3discloses a particular number of steps to be taken with respect to method300, method300may be executed with greater or fewer steps than those depicted inFIG. 3. In addition, althoughFIG. 3discloses a certain order of steps to be taken with respect to method300, the steps comprising method300may be completed in any suitable order.

Method300may be implemented using information handling system102or any other system operable to implement method300. In certain embodiments, method300may be implemented partially or fully in software and/or firmware embodied in computer-readable media.

FIG. 4illustrates a block diagram of selected components of an example PSU110B, in accordance with embodiments of the present disclosure. Example PSU110B ofFIG. 4may be used in some embodiments to implement PSU110depicted inFIG. 1. PSU110B ofFIG. 4may be similar in many respects to PSU110A ofFIG. 2, and thus, only the main differences between PSU110A and PSU110B may be described below. In particular, the main difference between PSU110A and PSU110B is that rectifier/PSU stage202is split into two rectifier/PSU stages202A and202B, each rectifier/PSU stage202A and202B associated with a respective DC/DC converter stage204A and204B. In addition, instead of a single bulk capacitor206as in PSU110A ofFIG. 2, PSU110B may include a bulk capacitor206A coupled between rectifier/PSU stage202A and DC/DC converter stage204A, a bulk capacitor206B coupled between rectifier/PSU stage202B and DC/DC converter stage204B, and a diode402coupled at its anode to a positive output terminal of rectifier/PSU stage202A and coupled at its cathode to a positive output terminal of rectifier/PSU stage202B. PSU110B may operate in a similar manner to that described with respect to method300above, except that when a particular DC/DC converter stage204is in a low-power/sleep state, its respective rectifier/PSU stage202may also be maintained in a low-power/sleep state. Another difference is the presence of diode402in PSU110B, which may keep bulk capacitor206B charged when rectifier/PSU stage202B is in the low-power/sleep state. By pre-charging bulk capacitor206B in this manner, DC/DC converter stage204B may wake up/activate quickly to support increase load until such time as rectifier/PSU stage202B is woken up/activated. Another advantage of pre-charging bulk capacitor206B is that it may reduce an inrush current when rectifier/PSU stage202B wakes/activates.

In addition to or in lieu of the functionality described above, in some embodiments, firmware214may include logic to selectively program DC/DC converter stages204to provide a defined power capacity for a PSU110. Accordingly, firmware214may be field programmable to allow a plurality of power capacities—(i) the first power capacity of DC/DC converter stage204A, (ii) the second power capacity of DC/DC converter stage204B, and (iii) a third power capacity equal to the sum of the first power capacity and the second power capacity—to be provided from a single PSU110. For example, a user may acquire an information handling system102with PSU110programmed for the first power capacity, and firmware214may only allow DC/DC converter stage204A but not DC/DC converter stage204B to be enabled for use. If at a later time, the user finds more power is required, the user can opt in for a power capacity upgrade to PSU110which may be enabled simply by the vendor of information handling system102and/or PSU110authorizing a suitable upgrade to firmware214such that firmware214either: (a) allows DC/DC converter stage204B but not DC/DC converter stage204A to be enabled for use such that PSU110has the second power capacity; or (b) allows both DC/DC converter stages204to be enabled for use such that PSU110has the third power capacity. Thus, MCU212may selectively enable and disable DC/DC converter stages204based on an authorized power capacity available to PSU110.

Such approach may reduce the number of different types of PSUs required, particularly in higher power ranges, as a single PSU110may be field-programmable through an appropriate firmware update to modify power capacity.