Wafer lithography equipment

According to one embodiment, wafer lithography equipment includes an exposure unit transferring a circuit pattern onto a wafer, a measurement unit measuring a dimension of the circuit pattern and a calculator. The calculator includes calculating a first difference. The first difference is the difference between a first dimension and a second dimension. The first dimension is obtained by substituting a first exposure amount and a first focus distance into an approximate response surface function. The second dimension is measured by the measurement unit. The calculator also includes calculating a second difference. The second difference is the sum total of the first difference for all of the circuit patterns. The calculator also includes calculating a second exposure amount and a second focus distance causing the difference between the approximate response surface function and the second difference to be a minimum. The calculator also includes calculating a correction exposure amount.

FIELD

Embodiments described herein relate generally to a wafer lithography equipment.

BACKGROUND

Conventionally, downscaling of a circuit pattern is performed for higher integration of a semiconductor device. In the manufacture of the semiconductor device including such a downscaled circuit pattern, it is desirable to manufacture the product and increase the yield by setting an exposure amount, a focus distance, etc., in the exposure unit of the lithography equipment that are optimal for the circuit pattern.

DETAILED DESCRIPTION

According to one embodiment, wafer lithography equipment includes an exposure unit transferring a circuit pattern onto a wafer, a measurement unit measuring a dimension of the circuit pattern and a calculator. The calculator includes calculating a first difference. The first difference is the difference between a first dimension and a second dimension. The first dimension is obtained by substituting a first exposure amount and a first focus distance into an approximate response surface function. The second dimension is measured by the measurement unit. The calculator also includes calculating a second difference. The second difference is the sum total of the first difference for all of the circuit patterns. The calculator also includes calculating a second exposure amount and a second focus distance causing the difference between the approximate response surface function and the second difference to be a minimum. The calculator also includes calculating a correction exposure amount. The correction exposure amount is the difference between the first exposure amount and the second exposure amount. The calculator also includes calculating a correction focus distance. The correction focus distance is the difference between the first focus distance and the second focus distance. The calculator also includes calculating a third exposure amount by adding the correction exposure amount to the first exposure amount. The calculator also includes calculating a third focus distance by adding the correction focus distance to the first focus distance.

According to one embodiment, a method for manufacturing a semiconductor device includes transferring a circuit pattern onto a wafer, measuring a dimension of the circuit pattern. The method for manufacturing a semiconductor device also includes calculating a first dimension by substituting a first exposure amount and a first focus distance into an approximate response surface function. The method for manufacturing a semiconductor device also includes calculating a first difference. The first difference is the difference between the first dimension and a second dimension. The second dimension is the measured dimension. The method for manufacturing a semiconductor device also includes calculating a second difference. The second difference is the sum total of the first difference for all of the circuit patterns. The method for manufacturing a semiconductor device also includes calculating a second exposure amount and a second focus distance causing the difference between the approximate response surface function and the second difference to be a minimum. The method for manufacturing a semiconductor device also includes calculating a correction exposure amount. The correction exposure amount is the difference between the first exposure amount and the second exposure amount. The method for manufacturing a semiconductor device also includes calculating a correction focus distance. The correction focus distance is the difference between the first focus distance and the second focus distance. The method for manufacturing a semiconductor device also includes calculating a third exposure amount by adding the correction exposure amount to the first exposure amount. The method for manufacturing a semiconductor device also includes calculating a third focus distance by adding the correction focus distance to the first focus distance.

An embodiment of the invention will now be described with reference to the drawings.

The configuration of the lithography equipment according to the embodiment will now be described.

FIG. 1is a block diagram showing the lithography equipment according to the embodiment.

As shown inFIG. 1, the lithography equipment100according to the embodiment includes an exposure unit110that transfers a circuit pattern onto a wafer, a dimension measurement unit120for measuring a dimension of the circuit pattern, and a calculator130. The calculator130performs calculation processing of calculating, from the dimension measured by the dimension measurement unit120, an exposure amount U(N) and a focus distance V(N) to be set in the exposure unit110. An optimal exposure amount and focus distance are set each time a wafer is made. The exposure amount and the focus distance are variables of the number N of wafers made.

The exposure unit110will now be described.

FIG. 2is a schematic view of the exposure unit shown inFIG. 1.

As shown inFIG. 2, the exposure unit110includes illumination42, a mask31, and a lens unit20that includes multiple lenses. The relationship of these is no different from that of normal lithography equipment. A circuit pattern P for transferring onto a wafer116is included in the mask31.

Hereinbelow, an XYZ orthogonal coordinate system is employed in the specification for convenience of description. Namely, two directions parallel to the upper surface of the wafer116and orthogonal to each other are taken as an “X-direction” and a “Y-direction.” A direction in which the lens unit20is mounted that is perpendicular to the upper surface of the wafer116is taken as a “Z-direction.”

When transferring the circuit pattern P onto the wafer116, the wafer116is moved so that the transfer destination of the circuit pattern P is at a prescribed region of the wafer116; a focus distance V and an exposure amount U are set; and the exposure is performed. Thereby, the circuit pattern P that is included in the mask31is transferred onto the wafer116. The focus distance V is the distance between the lens unit20and the wafer116.

After one circuit pattern P is transferred onto the wafer116, in the case where the circuit pattern P is to be transferred further, the wafer116is moved once more so that the transfer destination of the circuit pattern P is at a prescribed region of the wafer116; and the exposure is performed. By repeatedly performing these operations, the circuit pattern P is transferred onto substantially the entire surface of the wafer116.

FIG. 3Ais a cross-sectional view showing portion A of the circuit pattern P shown inFIG. 2prior to transferring.

As shown inFIG. 3A, an anti-reflection film117is provided on the wafer116; and a resist film118that is photosensitive is provided on the anti-reflection film117.

FIG. 3Bis a cross-sectional view showing portion A of the circuit pattern P shown inFIG. 2after transferring.

As shown inFIG. 3B, by developing after the exposure, the portions of the resist film118where the light is irradiated are removed; and the portions of the resist film118where the light is not irradiated remain without being removed. Thus, the circuit pattern P is transferred onto the resist film118. The resist film118after the circuit pattern P is transferred is called a resist pattern118a. The width of the resist pattern118ais called a dimension D.

The dimension D changes due to mainly six components, i.e., the configuration of the illumination42, the configuration of the circuit pattern P, the aberration unique to the lens, the focus distance V, the exposure amount U, and the configuration of a resist stacked body13. The aberration of the lens refers to the coloring, blurring, and distortion that occur when converting the subject to the image; but ideally, the aberration is not converted geometrically. The configuration of the resist stacked body13refers to the refractive indexes, light extinction coefficients, and film thicknesses of the films of the wafer116, the anti-reflection film117, and the resist film118; and the dimension D changes due to the change of the configuration.

Among the six major components determining the dimension D, there are many cases where the configuration of the illumination42and the aberration unique to the lens have values unique to each lithography equipment. There are many cases where the configuration of the circuit pattern P and the configuration of the resist film have values unique to each product and each process. Accordingly, the focus distance V and the exposure amount U are major components that change each lot.

The operations of the lithography equipment according to the embodiment will now be described.

FIG. 4is a flowchart showing the operations of the lithography equipment according to the embodiment.

FIG. 5Ais a plan view showing a circuit pattern A.

FIG. 5Bis a plan view showing a circuit pattern B.

FIG. 5Cis a plan view showing a circuit pattern C.

First, as shown in step S201ofFIG. 4, a circuit pattern is selected. Specifically, three or more different circuit patterns are selected from inside the circuit layout. For example, the selection of the circuit pattern is performed by selecting from the circuit patterns that are more numerous inside the circuit layout.

Hereinbelow, the case where the number of circuit patterns is three will be described up to step S207shown inFIG. 4to simplify the description. The three patterns are, for example, the circuit pattern A shown inFIG. 5A, the circuit pattern B shown inFIG. 5B, and the circuit pattern C shown inFIG. 5C. The circuit pattern A includes multiple ellipses; and the minor diameter of the ellipses is used as a dimension DA. The circuit pattern B is a line; and the line width is used as a dimension DB. The circuit pattern C includes two circles; and the diameter of the circles is used as a dimension DC.

Then, as shown in step S202ofFIG. 4, a test wafer114is made. The method for making the test wafer114is shown in (i-1) to (i-4) recited below.

FIG. 6is a plan view showing wafers.

(i-1) A first transfer is performed by the exposure unit110being operated so that the circuit pattern A is transferred from the mask31onto a region E1of the test wafer114shown inFIG. 6. The exposure amount U at this time is taken as U1; and the focus distance V at this time is taken as V1.

(i-2) A second transfer is performed by the exposure unit110operating so that the circuit pattern A is transferred from the mask31onto a region E2of the test wafer114. The exposure amount U at this time is taken as U2; and the focus distance V at this time is taken as V2. At least one of the exposure amount U1or the focus distance V1of (i-1) recited above is modified when used as the exposure amount U2and the focus distance V2.

(i-3) At least one of the (n−1)th exposure amount Un-1or focus distance Vn-1is modified when used as the nth exposure amount Unand focus distance Vn. The nth transfer is performed by the exposure unit110operating so that the circuit pattern A is transferred from the mask31onto a region Enof the test wafer114. n is a natural number not less than 3.

(i-4) The transfer shown in (i-3) recited above is repeated until the xth transfer which is the end repetition number is performed. x is a natural number greater than n.

Similarly to (i-1) to (i-4) recited above, the test wafers114are made for the circuit pattern B and for the circuit pattern C.

Then, as shown in step S203ofFIG. 4, the measurement of the dimension of the circuit pattern of the test wafer114is performed. For example, the measurements of the dimension DA, the dimension DB, and the dimension DC are performed using a SEM (Scanning Electron Microscope).

FIG. 7is a figure showing the measurement results of the dimension DA.

The first column shows the region E1to a region Exof the test wafer114shown inFIG. 6. The second column shows the exposure amounts U1to Uxset in the exposure unit110for the region E1to the region Ex. The exposure amount that is set in the exposure unit110for a region Ejis taken as U1. j is a natural number. The third column is the focus distances V1to Vxset in the exposure unit110in the region E1to the region Ex. The focus distance that is set in the exposure unit110in the region Ejis taken as Vj. The fourth column shows dimensions DA1to DAxmeasured by the dimension measurement unit120shown inFIG. 1. The dimension measured in the region Ejis taken as DAj. Similarly, the dimension DB of the circuit pattern B and the dimension DC of the circuit pattern C are measured.

Then, as shown in step S204ofFIG. 4, the approximate response surface function is determined. The exposure amount Uj, the focus distance Vj, and the dimension DAjshown inFIG. 7are discrete values. For example, a continuous approximate response surface function that has the exposure amount U and the focus distance V as variables is determined from these discrete values by utilizing the least-squares method. The dimensions DB and DC are determined similarly.

FIG. 8Ais a graph showing the approximate response surface function of the dimension DA, where the horizontal axis is the exposure amount, and the vertical axis is the focus distance.

FIG. 8Bis a graph showing the approximate response surface function of the dimension DB, where the horizontal axis is the exposure amount, and the vertical axis is the focus distance.

FIG. 8Cis a graph showing the approximate response surface function of the dimension DC, where the horizontal axis is the exposure amount, and the vertical axis is the focus distance.

The approximate response surface function of the dimension DA is a function having the exposure amount U and the focus distance V as variables. Accordingly, for example, the approximate response surface function of the dimension DA is expressed by Formula 1 recited below.
fA(U,V)  [Formula 1]

Similarly, the approximate response surface function of the dimension DB is expressed by Formula 2 recited below.
fB(U,V)  [Formula 2]

Similarly, the approximate response surface function of the dimension DC is expressed by Formula 3 recited below.
fC(U,V)  [Formula 3]

For example, a region151shown inFIG. 8Aillustrates the dimension DA in the range from DAk1to DAk2; and, for example, a region152illustrates the dimension DA in the range from DAk2to DAk3.

As shown inFIG. 8A,FIG. 8B, andFIG. 8C, the approximate response surface function of the dimension D having the exposure amount U and the focus distance V as variables is different between the circuit patterns. For example, the dimension DA of the circuit pattern A (referring toFIG. 8A) does not fluctuate much even when the focus distance V changes. The change amount with respect to the focus distance V of the dimension DC of the circuit pattern C (referring toFIG. 8C) is larger than the change amount of the dimension DA.

Then, as shown in step S205ofFIG. 4, the initial exposure amount U(0) and the initial focus distance V(0) of a product wafer115are determined.

The determination of the initial exposure amount U(0) will now be described.

FIG. 9Ais a graph showing the effects of the exposure amount U on the dimension DA, where the horizontal axis is the exposure amount U, and the vertical axis is the dimension DA.

FIG. 9Ashows the relationship of the exposure amount U and the dimension DA for the approximate response surface function shown inFIG. 8Ain the case where the focus distance V is a constant value q.

FIG. 9Bis a graph showing the effects of the focus distance V on the dimension DA, where the horizontal axis is the focus distance, and the vertical axis is the dimension DA.

FIG. 9Bshows the relationship of the focus distance V and the dimension DA for the approximate response surface function shown inFIG. 8Ain the case where the exposure amount U is a constant value p.

As shown inFIG. 9A, for the circuit pattern A, the dimension DA increases as the exposure amount U increases. The exposure amount U and the dimension DA have a substantially proportional relationship.

As shown inFIG. 9B, for the circuit pattern A, the dimension DA substantially does not change, even when the focus distance V changes. There are cases where a desired dimension DAdesis not obtained, even when the focus distance V is modified. Accordingly, the desired dimension DAdesis obtained by modifying the exposure amount. The exposure amount is determined from the desired dimension DAdesand the graph ofFIG. 9A. For example, in the graph ofFIG. 9A, Udesis obtained as the exposure amount corresponding to the dimension DAdes. Then, the exposure amount Udesis determined to be the initial exposure amount U(0).

The determination of the initial focus distance V(0) will now be described.

FIG. 10is a graph showing the effects of the focus distance V on the dimension DB and the dimension DC, where the horizontal axis is the focus distance V, and the vertical axis is the dimensions DB and DC.

The dimension DB shown inFIG. 10is the relationship of the focus distance V and the dimension DB for the approximate response surface function of the dimension DB shown inFIG. 8Bin the case where the exposure amount U is used as the initial exposure amount U(0).

The dimension DC shown inFIG. 10is the relationship of the focus distance V and the dimension DC for the approximate response surface function of the dimension DC shown inFIG. 8Cin the case where the exposure amount U is used as the initial exposure amount U(0).

The negative side of the vertical axis ofFIG. 10shows the frequencies of the dimension DB and the dimension DC measured in step S203. DBD illustrates the frequency of the dimension DB; and DCD illustrates the frequency of the dimension DC. DBAVEis the average value of the dimension DB; and DCAVEis the average value of the dimension DC.

The negative side of the horizontal axis ofFIG. 10shows the frequency of the focus distance V for the frequencies of the dimension DB and the dimension DC. VBD1 is the frequency determined from DBD and region B1of the approximate response surface function of the dimension DB. VBD2 is the frequency determined from DBD and region B2of the approximate response surface function of the dimension DB. VB1 and VB2 are the values of the focus distance V when the dimension DB is DBAVE. VCD1 is the frequency determined from DCD and region C1of the approximate response surface function of the dimension DC. VCD2 is the frequency determined from DCD and region C2of the approximate response surface function of the dimension DC. VC1 is the value of the focus distance V when the dimension DC is DCAVE.

As shown inFIG. 10, the frequency of the focus distance V for the frequency DBD includes the frequencies VBD1 and VBD2. The frequency of the focus distance V for the frequency DCD includes the frequencies VCD1 and VCD. An overlapping region G is included in the frequency VBD2 and the frequency VCD2.

If the focus distance V is set to VB2 inside the overlapping region G, not only the dimension DB but also the dimension DC can be accommodated. Accordingly, the focus distance V is set to VB2 shown inFIG. 10; and this is used as the initial focus distance V(0).

Then, as shown in step S206ofFIG. 4, the product wafer115is made.

The method for making the product wafer115is shown in (ii-1) to (ii-4) recited below.

(ii-1) The exposure amount U of the exposure unit110is used as the initial exposure amount U(0); and the focus distance V is used as the initial focus distance V(0).

(ii-2) The circuit pattern P is transferred from the mask31onto the region E1of the product wafer115shown inFIG. 6. The circuit pattern P includes the circuit pattern A, B, or C.

(ii-3) The circuit pattern P is transferred from the mask31onto the region E2of the product wafer115.

(ii-4) (ii-3) recited above is repeated until the circuit pattern P is transferred onto the region Exwhich is the final transfer destination of the product wafer115.

Then, as shown in step S207ofFIG. 4, the measurements of the dimension DA of the circuit pattern A, the dimension DB of the circuit pattern B, and the dimension DC of the circuit pattern C for the product wafer115are performed.

When manufacturing the product wafer115of step S206, for example, there are cases where dirt adheres to the bottom of the product wafer115, and the focus distance V shifts. Also, there are cases where the exposure amount U changes due to heat, etc. There are cases where the dimension DA, the dimension DB, and the dimension DC that are measured change each time the product wafer115is made.

To accommodate such changes of the exposure amount U and the focus distance V, the exposure amount U and the focus distance V are optimized and set based on the approximate response surface function each time the product wafer115is made in the processing of step S208and subsequent steps shown inFIG. 4.

Then, as shown in step S208ofFIG. 4, the difference between the approximate response surface function and the dimension measured in step S207is calculated for each circuit pattern. The sum total is calculated for the calculated difference for each circuit pattern.

Namely, the calculation of the exposure amount U(1) and the focus distance V(1) set when making the second product wafer115is performed from the initial exposure amount U(0) and the initial focus distance V(0) set in the exposure unit110when making the first product wafer115.

To simplify the description, the circuit pattern B will now be described.

FIG. 11is a graph showing the effects of the focus distance V on the dimension DB, where the horizontal axis is the focus distance V, and the vertical axis is the dimension DB.

The dimension DB ofFIG. 11corresponds to the dimension DB shown inFIG. 10. The point M(0) shown inFIG. 11is the point illustrating a dimension DBme(1) when the initial exposure amount U(0) and the initial focus distance V(0) are set in the exposure unit110in step S206, the product wafer115is manufactured, and the dimension DBme(1) is measured in step S207.

The point S(0) shown inFIG. 11is the point illustrating the dimension determined from the approximate response surface function f(U, V) when the exposure amount U is U(0) and the focus distance V is V(0).

As shown inFIG. 11, the point M(0) and the point S(0) do not match; and there is a difference between the point M(0) and the point S(0). The difference is expressed by Formula 4 recited below as the difference ΔDB(1) between the dimension fB(U(0), V(0)) determined from the approximate response surface function and the dimension DBme(1) that is measured. The difference ΔDB(1) is shown inFIG. 11as well. For the initial focus distance V(0), the measured dimension DBme(1) is less than the dimension fB(U(0), V(0)) determined from the approximate response surface function by the amount of the difference ΔDB(1).
ΔDB(1)=fB(U(0),V(0))−DBme(1)  [Formula 4]

Then, in step S208, a sum total ΔDtotalof the differences for all of the circuit patterns is calculated. Because the circuit pattern B is being described, the sum total ΔDtotalof the differences is the difference ΔDB(1) and is expressed by Formula 5 recited below.
ΔDtotal=ΔDB(1)  [Formula 5]

Then, as shown in step S209ofFIG. 4, the exposure amount U and the focus distance V are calculated so that the difference between the approximate response surface function fB(U, V) and a sum total ΔDBtotalof the differences is a minimum. Namely, the exposure amount U and the focus distance V that satisfy Formula 6 recited below are calculated; and the exposure amount U that is calculated is used as the effective exposure amount Ueff(0). Also, the focus distance V that is calculated is used as the effective focus distance Veff(0).

As shown inFIG. 11, the dimension DBme(1) illustrated by the point M(0) is less than the dimension fB(U(0), V(0)) illustrated by the point S(0) by the amount of the difference ΔDB(1). Accordingly, to satisfy Formula 6 recited below, it is sufficient to set f(U, V) to the point P(0) which is a value that is greater than fB(U(0), V(0)) by the amount of the difference ΔDB(1). Then, it is sufficient for the exposure amount U at this time to be used as the effective exposure amount Ueff(0) and for the focus distance V at this time to be used as the effective focus distance Veff(0).
min{fB(U,V)−{fB(U(0),V(0))−DBme(1)}}  [Formula 6]

Then, as shown in step S210ofFIG. 4, an exposure amount correction value ΔU which is the difference between the effective exposure amount Ueff(0) and the exposure amount U(0) set in step S206is calculated. The exposure amount correction value ΔU is expressed by Formula 7 recited below. Also, a focus correction value ΔV which is the difference between the effective focus distance Veff(0) and the focus distance V(0) set in step S206is calculated. The focus correction value ΔV is expressed by Formula 8 recited below. ΔV is shown inFIG. 11.
U(0)−Ueff(0)=ΔU[Formula 7]
V(0)−Veff(0)=ΔV[Formula 8]

Then, as shown in step S211ofFIG. 4, the exposure amount U(1) and the focus distance V(1) of the next product wafer115are calculated. The exposure amount U(1) of the next product wafer115is determined by adding the exposure amount correction value ΔU to the previous exposure amount U(0) and is expressed by Formula 9 recited below. In other words, the exposure amount U(1) of the next product wafer115is the effective exposure amount Ueff(0) calculated in the step210. Also, the focus distance V(1) of the next product wafer115is expressed by Formula 9 recited below. The focus distance V(1) is the effective focus distance Veff(0).FIG. 11shows the focus distance V(1).
U(1)=U(0)+ΔU=Ueff[Formula 9]
V(1)=V(0)+ΔV=Veff[Formula 10]

Then, as shown in step S212ofFIG. 4, the exposure amount U(1) and the focus distance V(1) of the second product wafer115are set in the exposure unit110by modifying the exposure amount U(0) and the focus distance V(0) set in the exposure unit110when manufacturing the first product wafer115.

Thereafter, in step S212ofFIG. 4, the exposure amount U(N−1) and the focus distance V(N−1) when making the Nth product wafer115are set in the exposure unit110. Subsequently, in step S206, the Nth product wafer115is made. Subsequently, step S207to step S210are executed. Subsequently, in step S211, the exposure amount U(N) and the focus distance V(N) that are set when making the (N+1)th product wafer115are calculated. Subsequently, again in step S212, the exposure amount U(N) and the focus distance V(N) when making the (N+1)th product wafer115are set in the exposure unit110. The operation of executing step S212and the operation of again executing the step212are repeated. N is a natural number not less than 2.

In the embodiment, the difference between the effective focus distance Veff(0) and the focus distance V(0) set in step S206is used as the focus correction value ΔV. This is not limited thereto. When making the multiple product wafers115, the multiple focus correction values ΔV are calculated by multiply repeating step S208, step S209, and step S210. The average of the multiple focus correction values may be used as the focus correction value ΔV. Also, a weighted average of the multiple focus correction values may be used as the focus correction value ΔV.

The effects of the wafer lithography equipment according to the embodiment will now be described.

For example, when manufacturing the product wafer115of step S206shown inFIG. 4, there are cases where dirt adheres to the bottom of the product wafer115, and the focus distance V shifts. Also, there are cases where the exposure amount U changes due to heat, etc., dissipated from the illumination42of the exposure unit110. Thereby, the dimension DA, the dimension DB, and the dimension DC that are measured change each time the product wafer115is made; and the product yield decreases.

Therefore, in the wafer lithography equipment100according to the embodiment, the desired dimension is obtained by utilizing the approximate response surface function to express the effects of the exposure amount U and the focus distance V on the dimension. In other words, the exposure amount U and the focus distance V are determined from the approximate response surface function so that the difference between the dimension that is measured and the dimension of the approximate response surface function is a minimum. The exposure amount U and the focus distance V that are determined are set in the exposure unit110as the next exposure amount U and focus distance V.

Thereby, for example, in the case where dirt adheres to the bottom of the product wafer115and the dimension changes, the exposure amount U and the focus distance V can be set in the exposure unit110when making the next product wafer to obtain the desired dimension.

As a result, wafer lithography equipment having increased product yield can be provided.

For the selection of the circuit pattern of step S201of the embodiment, an example of the selection of different circuit patterns is described. This is not limited thereto. Patterns that have different periods of the same circuit pattern may be selected. The selection of three patterns of the same circuit pattern having different periods will now be described.

FIG. 12is a plan view showing the circuit pattern P.

As shown inFIG. 12, multiple circuit patterns Pshaving the same configuration are included inside one circuit pattern P. A period T of the circuit pattern P is the distance between any point Q on the circuit pattern Psand a point Q′ corresponding to the point Q on the most proximal adjacent circuit pattern Ps. For example, the circuit pattern Psmay be a rectangle, a straight line, a circle, or another configuration.

To simplify the description, the case of the circuit pattern B will now be described.

FIG. 13Ais a plan view showing a circuit pattern B1.

FIG. 13Bis a plan view showing a circuit pattern B2.

FIG. 13Cis a plan view showing a circuit pattern B3.

The circuit pattern B1, the circuit pattern B2, and the circuit pattern B3are circuit patterns selected from inside the circuit pattern B inside the circuit layout. As shown inFIG. 13A,FIG. 13B, andFIG. 13C, the circuit pattern B1, the circuit pattern B2, and the circuit pattern B3are patterns in which multiple rectangular lines301are arranged periodically. For the circuit patterns B1, B2, and B3, the period T is the distance between a left side P0of the line301and a left side P1of the most proximal adjacent line301.

For example, the selection of the circuit pattern of step S201may be performed by selecting from inside the circuit pattern B as shown in (iii-1) to (iii-3) recited below.

(iii-1) The circuit pattern B1(referring toFIG. 12A) which has the minimum period T is selected from inside the circuit pattern B.

(iii-2) The circuit pattern B2(referring toFIG. 12B) which has the maximum period T is selected from inside the circuit pattern B.

(iii-3) The circuit pattern B3(referring toFIG. 12C) for which the period T is a period near the average of the maximum period and the minimum period is selected from inside the circuit pattern B.

According to the embodiment described above, wafer lithography equipment having increased product yield can be provided.