Liquid crystal display and thin film transistor array panel usable with the liquid crystal display

A liquid crystal display with improved viewing angle and uncompromised transmittance is provided, along with a thin film transistor (TFT) array panel usable for such liquid crystal display. The TFT array panel includes a substrate, a plurality of gate lines formed on the substrate, a plurality of data lines formed on the substrate and intersecting the gate lines, and a plurality of thin film transistors. Each of the thin film transistors includes a gate electrode connected to one of the gate lines, a source electrode connected to one of the data lines, and a drain electrode. The TFT array panel also includes a plurality of pixel electrodes, each of the pixel electrodes connected to one of the drain electrodes and having a pair of oblique edges parallel to each other, and covering at least a portion of the drain electrodes.

CROSS-REFERENCE TO RELATED APPLICATION

This patent application claims priority from Korean Patent Application No. 10-2004-0079408 filed on Oct. 6, 2004, the content of which is incorporated by reference herein in its entirety.

BACKGROUND OF THE INVENTION

(a) Field of the Invention

The present invention relates to a liquid crystal display and a thin film transistor array panel usable therefore the liquid crystal display.

(b) Description of the Related Art

A liquid crystal display (LCD) is a widely used type of flat panel display. An LCD includes a liquid crystal (LC) layer interposed between a pair of panels provided with field-generating electrodes. The LC layer is subject to an electric field generated by the electrodes, and variations in the field strength change the molecular orientation of the LC layer. A change in the molecular orientation of the LC layer, in turn, changes the polarization of light passing through the LC layer. Light transmittance through the LC layer is changeable not only by controlling the strength of the electric field in the LC layer but also by using polarizer(s). Appropriately disposed polarizer(s) change light transmittance through the LC layer by affecting the polarization of light.

One measure of LCD quality is a viewing angle, which is defined by the angle from the perspective of a viewer where the LCD exhibits a predetermined contrast ratio. Various techniques for enlarging the viewing angle have been suggested, including utilizing a vertically aligned LC layer and providing cutouts or protrusions at the field-generating electrodes such as pixel electrodes and a common electrode.

Although using cutouts or protrusions with a vertically aligned LC layer does achieve the desired enlargement of the viewing angle, it also has a negative effect on the display quality in that cutouts and the protrusions reduce the transmittance. To compensate for the decrease in transmittance, it has been suggested that the size of the pixel electrodes be increased. However, an increase in the size of the pixel electrodes results in a closer distance between the pixel electrodes, which causes strong lateral electric fields between the pixel electrodes. Strong electric fields between pixel electrodes can be problematic as they cause unwanted altering of the orientation of the LC molecules, creating textures and light leakage and deteriorating display characteristics. Although the textures and the light leakage may be screened by a wide black matrix, using a wide black matrix also reduces the aperture ratio.

In addition to creating undesirable lateral inter-pixel electric fields, an increase in the size of the pixel electrodes may raise the parasitic capacitance between the pixel electrodes and the data lines. When an active area on a backplane for an LCD is too large to use an exposure mask, the entire exposure is accomplished by repeating a divisional exposure called step-and-repeat process. One divisional exposure unit or area is called a shot. Since transition, rotation, distortion, and etc. are generated during light exposure, the shots are not aligned accurately. Accordingly, the parasitic capacitances generated between signal lines and pixel electrodes differ depending on the shots, and this causes a luminance difference between the shots. This difference in luminance is recognized at the pixels located at a boundary between the shots, generating a stitch defect on the LCD screen.

In addition to the above problems associated with enlarged pixel electrodes, there is also the issue of a parasitic capacitance between the data lines and the common electrode that may cause disorder of liquid crystal molecules.

A method of enlarging the viewing angle without the aforementioned problems is desired.

SUMMARY OF THE INVENTION

In one aspect, the invention is a thin film transistor (TFT) array panel. The TFT array panel includes: a substrate, a plurality of gate lines formed on the substrate, a plurality of data lines formed on the substrate and intersecting the gate lines, and a plurality of thin film transistors. Each of the thin film transistors includes a gate electrode connected to one of the gate lines, a source electrode connected to one of the data lines, and a drain electrode. The TFT array panel also includes a plurality of pixel electrodes. Each of the pixel electrodes is connected to one of the drain electrodes, and the pixel electrodes have a pair of oblique edges parallel to each other and covering at least a portion of the drain electrodes.

Each of the data lines may overlap two adjacent pixel electrodes.

Each of the pixel electrodes may overlap two data lines.

An overlapping area between each of the pixel electrodes and one of the two data lines may be equal to about a half of to about twice an overlapping area between each of the pixel electrodes and the other of the two data lines.

Each of the data lines may include a pair of bent portions disposed between two adjacent gate lines and overlapping the pixel electrodes.

Each of the data lines may further include a linear oblique portion connected to the corner portions of the pixel electrodes and overlapping the pixel electrodes.

Each of the data lines may include a bent portion disposed between two adjacent gate lines and bending at least twice.

The bent portions of the data lines may be equidistant from the oblique edges of the pixel electrodes.

Each of the data lines may include a linear oblique portion that is parallel to the oblique edges of the pixel electrodes and overlapping the pixel electrodes.

Each of the data lines may include a bent portion extending substantially parallel to the bent edges of the pixel electrodes and a linear portion intersecting the gate lines.

The bent portion of each of the data lines may include a pair of linear oblique portions making an angle of about 45 degrees with the gate lines.

The bent portions of the data lines may overlap the pixel electrodes.

The bent portions of the data lines may be disposed near centers of the pixel electrodes and covered with the pixel electrodes.

The thin film transistor array panel may further include a plurality of storage electrode lines including storage electrodes that overlap the drain electrodes.

The storage electrode lines may further include branches disposed between the pixel electrodes and partially overlapping the pixel electrodes.

The thin film transistor array panel may further include a plurality of color filters partially overlapping the branches of the storage electrode lines and overlapping the pixel electrodes.

The data lines may have a width of about four microns to about eight microns.

DETAILED DESCRIPTION OF EMBODIMENTS

In the drawings, the thickness of layers, films and regions are exaggerated for clarity. Like numerals refer to like elements throughout. It will be understood that when an element such as a layer, film, region or substrate is referred to as being “on” another element, it can be directly on the other element or intervening elements may also be present.

An LCD according to an embodiment of the present invention is described in detail with reference toFIGS. 1-5.FIG. 1is a layout view of a TFT array panel for an LCD according to an embodiment of the present invention,FIG. 2is a layout view of a common electrode panel for an LCD according to an embodiment of the present invention,FIG. 3Ais a layout view of an LCD including the TFT array panel shown inFIG. 1and the common electrode panel shown inFIG. 2,FIG. 3Bis a layout view of a pixel electrode shown inFIG. 3A,FIG. 4is a sectional view of the LCD shown inFIG. 3Ataken along the line IV-IV′, andFIG. 5is a sectional view of the LCD shown inFIG. 3Ataken along the lines V-V′.

An LCD according to an embodiment of the present invention includes a TFT array panel100, a common electrode panel200facing the TFT array panel100, and a LC layer3interposed between the TFT array panel100and the common electrode panel200.

The TFT array panel100will be described in detail with reference to FIGS.1and3-5.

A plurality of gate lines121and a plurality of storage electrode lines131are formed on an insulating substrate110, which may be transparent glass or plastic.

The gate lines121transmit gate signals and extend substantially in a first direction, which is the horizontal/transverse direction with respect to the Figures. Each of the gate lines121includes a plurality of gate electrodes124projecting upward and an end portion129having a large area of contact for connecting with another layer or an external driving circuit. A gate driving circuit (not shown) for generating the gate signals may be mounted on a flexible printed circuit (FPC) film (not shown), which may be attached to the substrate110, directly mounted on the substrate110, or integrated onto the substrate110. The gate lines121may extend to be connected to a driving circuit that may be integrated on the substrate110.

The storage electrodes131are supplied with a predetermined voltage and extend substantially parallel to the gate lines121. Each of the storage electrode lines131is disposed between two adjacent gate lines121and is close to the lower one of the two adjacent gate lines121(“lower” being with respect to the view ofFIG. 1). Each of the storage electrode lines131includes a plurality of storage electrodes137having a shape of a rhombus (or a rectangle rotated by about 45 degrees). In other embodiments, the storage electrode lines131may have different shapes and arrangements.

The gate lines121and the storage electrode lines131include two layers of conductive films that have different physical characteristics: a lower film and an upper film disposed on the lower film. The upper film is preferably made of a low-resistivity metal such as an Al-containing metal (e.g., Al and Al alloy), an Ag-containing metal (e.g., Ag and Ag alloy), and a Cu-containing metal (e.g., Cu and Cu alloy), for reducing signal delay or voltage drop. The lower film is preferably made of a material such as Mo-containing metal (e.g., Mo and Mo alloy), Cr, Ta, or Ti, which has good physical, chemical, and electrical contact characteristics with other materials such as indium tin oxide (ITO) or indium zinc oxide (IZO). A good example of the combination of the two films is a lower Cr film and an upper Al (alloy) film. The upper film129qof the end portions129of the gate lines121is removed to expose the lower film129p.

In some embodiments, the upper film may be made of good contact material, and the lower film may be made of low resistivity material. In addition, the gate lines121and the storage electrode lines131may include a single layer preferably made of the above-described materials. Also, the gate lines121and the storage electrode lines131may be made of other metals or conductors.

InFIGS. 4 and 5, for the gate electrodes124and the storage electrodes137, the lower and upper films thereof are denoted by additional characters p and q, respectively.

The lateral sides of the gate lines121and the storage electrode lines131are inclined relative to a surface of the substrate110, and the inclination angle ranges between about 30 and about 80 degrees.

A gate insulating layer140preferably made of silicon nitride (SiNx) or silicon oxide (SiOx) is formed on the gate lines121and the storage electrode lines131.

A plurality of semiconductor stripes151preferably made of hydrogenated amorphous silicon (abbreviated to “a-Si”) or polysilicon are formed on the gate insulating layer140. Each of the semiconductor stripes151is made up of linear portions and corners, and extends generally in a second direction that is perpendicular to the first direction. Each of the semiconductor stripes151has a plurality of projections154branching out toward the gate electrodes124.

A plurality of ohmic contact stripes and islands161and165are formed on the semiconductor stripes151. The ohmic contact stripes and islands161and165are preferably made of n+ hydrogenated a-Si heavily doped with an n-type impurity such as phosphorus, or they may be made of silicide. Each ohmic contact stripe161includes a plurality of projections163, and the projections163and the ohmic contact islands165are located in pairs on the projections154of the semiconductor stripes151.

The lateral sides of the semiconductor stripes151and the ohmic contacts161and165are inclined relative to the surface of the substrate110, and the inclination angles are preferably in a range of about 30 to about 80 degrees.

A plurality of data lines171and a plurality of drain electrodes175are formed on the ohmic contacts161and165and the gate insulating layer140.

The data lines171transmit data signals and extend generally in the second direction to intersect the gate lines121and the storage electrode lines131. Each of the data lines171includes one or more bent portions that include a plurality of linear oblique portions that are connected by a corner portion (seeFIG. 1B). Each of the corner portions includes angles connected to each other through a linear portion. The linear oblique portions of the data lines171that extend from the corner portion make an angle of about 45 degrees with the gate lines121. Each of the linear portions extending in the second direction intersects the gate lines121and includes a plurality of source electrodes173projecting toward the gate electrodes124. Each of the corner portions may have two or more angles.

Each data line171further includes an end portion179having a large area for contact with another layer or an external device. A data driving circuit (not shown) for generating the data signals may be mounted on an FPC film (not shown), which may be attached to the substrate110, directly mounted on the substrate110, or integrated onto the substrate110. The data lines171may extend to be connected to a driving circuit that may be integrated on the substrate110.

The length of a pair of linear oblique portions is about one to nine times the length of the linear portion extending in the second direction. That is, the combined length of two linear oblique portions occupies about 50-90 percents of the total length of the pair of linear oblique portions and the linear portion extending in the second direction. The pair of linear oblique portions may be substituted with three or more linear oblique portions such that a part of a data line171between adjacent linear portions extending in the second direction has two or more corner portions.

The drain electrodes175are separated from the data lines171and disposed opposite the source electrodes173with respect to the gate electrodes124. Each of the drain electrodes175includes a rectangular or rhombic end portion and a narrow end portion. The rhombic end portion overlaps a storage electrode and the narrow end portion is partly enclosed by a source electrode173that is curved like a character J (seeFIG. 1).

A gate electrode124, a source electrode173, and a drain electrode175along with a projection154of a semiconductor stripe151form a TFT having a channel formed in the projection154disposed between the source electrode173and the drain electrode175.

The data lines171and the drain electrodes175include two conductive films that have different physical characteristics: lower film171pand175pand upper films171qand175qdisposed thereon, respectively. The upper films171qand175qare preferably made of a low-resistivity metal such as an Al-containing metal (e.g., Al and Al alloy), an Ag-containing metal (e.g., Ag and Ag alloy), and a Cu-containing metal (e.g., Cu and Cu alloy), for reducing signal delay or voltage drop. The lower film171pand175pis preferably made of refractory metal such as Cr, Mo, Ta, Ti, or alloys thereof. A good example of the combination of the two films is a lower Cr/Mo (alloy) film and an upper Al (alloy) film. The upper film179qof the end portions179of the gate lines171is removed to expose the lower film179p. However, the data lines171and the drain electrodes175may include a single layer preferably made of the above-described materials. Otherwise, the data lines171and the drain electrodes175may be made of various metals or conductors.

InFIGS. 4 and 5, for the source electrodes173, the lower and upper films thereof are denoted by additional characters p and q, respectively.

The data lines171and the drain electrodes175have inclined edge profiles, and the inclination angles range between about 30 and about 80 degrees with respect to the substrate110.

The ohmic contacts161and165are interposed only between the underlying semiconductor stripes151and the overlying conductors171and175, and reduce the contact resistance between the semiconductor stripes151and the overlying conductors171,175. The semiconductor stripes151include some exposed portions that are not covered with the data lines171and the drain electrodes175, such as portions located between the source electrodes173and the drain electrodes175(the semiconductor stripe151includes the projection154).

A passivation layer180is formed on the data lines171, the drain electrodes175, and the exposed portions of the semiconductor stripes151. The passivation layer180is preferably made of inorganic or organic insulator and it may have a flat top surface. Examples of the inorganic insulator include silicon nitride and silicon oxide. The organic insulator may have photosensitivity and dielectric constant less than about 4.0. The passivation layer180may include a lower film of inorganic insulator and an upper film of organic insulator such that it demonstrates the excellent insulating characteristics of the organic insulator while preventing the exposed portions of the semiconductor stripes151from being damaged by the organic insulator.

The passivation layer180has a plurality of contact holes182and185exposing the lower film179pof the end portions179of the data lines171and the lower film175pof the rhombic end portions of the drain electrodes175, respectively. The passivation layer180and the gate insulating layer140have a plurality of contact holes181exposing the lower film129pof the end portions129of the gate lines121.

A plurality of pixel electrodes190and a plurality of contact assistants81and82are formed on the passivation layer180. They are preferably made of transparent conductor such as ITO or IZO or reflective conductor such as Ag, Al, Cr, or alloys thereof.

The pixel electrodes190are electrically connected to the drain electrodes175of the TFTs through the contact holes185such that the pixel electrodes190receive data voltages from the drain electrodes175. The pixel electrodes190supplied with the data voltages generate electric fields in cooperation with a common electrode270of the common electrode panel200supplied with a common voltage, which determine the orientations of liquid crystal molecules31of the liquid crystal layer3disposed between the two electrodes190and270. A pixel electrode190and the common electrode form a capacitor referred to as a “liquid crystal capacitor,” which stores applied voltages after the TFT turns off.

Each of the pixel electrodes190includes a plurality of edges substantially parallel to the linear oblique portions of the data lines171and a plurality of linear portions substantially parallel to the gate lines121and the data lines171. Thus, the pixel electrode190forms a chevron with a flattened corner. The pixel electrodes190cover the storage electrode lines131including the storage electrodes137and the rhombic end portions of the drain electrodes175.

In addition, each of the pixel electrodes190substantially fully covers a data line171such that the data line171nearly bisects the pixel electrodes190into two halves. Each of the pixel electrodes190partially overlaps a portion of an adjacent data line171near a TFT that transmits the data voltages to an adjacent pixel electrode190.

Such a substantially full coverage of the data lines171by the pixel electrodes190results in uniformity of parasitic capacitances regardless of misalignment and prevents parasitic electric fields generated between the data lines171and the common electrode270. Furthermore, the overlap of a pixel electrode190with two adjacent data lines171compensates for the voltage variation due to the parasitic capacitances between the pixel electrode190and the data lines171when the adjacent data lines171transmit data voltages having opposite polarities with respect to the common voltage. In detail, the voltage variation of the pixel electrode190depends on the voltage variation of the data lines171, and the two data lines171varies their voltages in opposites directions, that is, one of the two data lines171changes the polarity of the data voltages carried by the one of the two data lines171from positive to negative, while the other of the two data lines171changes the polarity of the data voltages carried by the other of the two data lines171from negative to positive. Accordingly, the voltage variation of the pixel electrode190is reduced as compared with a case that the pixel electrode190overlaps only one data line171.

A pixel electrode190and a rhombic end portion of a drain electrode175connected thereto overlap a storage electrode line131including a storage electrode137. The pixel electrode190and the drain electrode175connected thereto and the storage electrode line131form an additional capacitor referred to as a “storage capacitor,” which enhances the voltage storing capacity of the liquid crystal capacitor.

The pixel electrodes190overlap the data lines171as well as the gate lines121to increase the aperture ratio.

The contact assistants81and82are connected to the end portions129of the gate lines121and the end portions179of the data lines171through the contact holes181and182, respectively. The contact assistants81and82protect the end portions129and179and enhance the adhesion between the end portions129and179and external devices.

The description of the common electrode panel200follows with reference toFIGS. 2-5.

A light blocking member220called a black matrix220is formed on an insulating substrate210, which may be transparent glass or plastic. The light blocking member220includes a plurality of curved portions facing gaps between the pixel electrodes190and a plurality of planar portions facing the TFTs such that the light blocking member220blocks light leakage between the pixel electrodes190and defines open areas facing the pixel electrodes190. In other embodiments, the light blocking member220may have a plurality of openings (not shown) that face the pixel electrodes190and have almost the same shape as the pixel electrodes190.

A plurality of color filters230are formed on the substrate210and the light blocking member220. The color filters230are disposed substantially in the open areas defined by the light blocking member220and the color filters230may extend along columns of the pixel electrodes190. Each of the color filters230may represent one of the primary colors (red, green and blue).

An overcoat250preferably made of (organic) insulator is formed on the color filters230and the light blocking member220. The overcoat250prevents the color filters230from being exposed and provides a flat surface. The overcoat250may be omitted in some embodiments.

A common electrode270is formed on the overcoat250. The common electrode270is preferably made of a transparent conductive material such as ITO and IZO and it has a plurality of chevron-like cutouts71(seeFIG. 2).

As shown inFIG. 2, each cutout71has a corner portion that includes a substantially right angle, a first linear oblique portion connected to one end of the corner portion, and a second linear oblique portion connected to the other end of the corner portion. A linear portion extending substantially in the first direction is connected to the first linear oblique portion, and another linear portion extending substantially in the second direction is connected to the second linear oblique portion. The corner portion of the cutout71extends along the corner portions of the data lines171and faces a pixel electrode190so that the corner portion may bisect the pixel electrode190into two halves. The linear portions of the cutout71that extend in the first and second directions form two obtuse angles with the bent portion of the cutout71, and they may be aligned with the edges of the pixel electrode190(e.g., the edges that extend in the first and second directions). The width of the cutout71may be equal to about 9 microns to about 12 microns.

Alignment layers (not shown) that may be homeotropic are coated on inner surfaces of the panels100and200, and polarizers12and22are provided on outer surfaces of the panels100and200so that their polarization axes may be crossed and one of the polarization axes may be parallel to the gate lines121. One of the polarizers12and22may be omitted when the LCD is a reflective LCD.

The LCD may further include at least one retardation film (not shown) for compensating the retardation of the LC layer3.

The LCD may further include a backlight unit (not shown) supplying light to the LC layer3through the polarizers12and22, the retardation film, and the panels100and200.

It is preferable that the LC layer3has negative dielectric anisotropy and it is subjected to a vertical alignment that the LC molecules31in the LC layer3are aligned such that their long axes are substantially vertical to the surfaces of the panels100and200in the absence of an electric field. Accordingly, incident light cannot pass the crossed polarization system12and22.

Upon application of the common voltage to the common electrode270and a data voltage to the pixel electrodes190, a primary electric field substantially perpendicular to the surfaces of the panels100and200is generated. The pixel electrodes190and the common electrode270are commonly referred to as field generating electrodes. The LC molecules31tend to change their orientations in response to the electric field so that their long axes may be perpendicular to the field direction.

The cutouts71of the common electrode270and the edges of the pixel electrodes190distort the primary electric field to have a horizontal component that determines the tilt directions of the LC molecules31. The horizontal component of the primary electric field is perpendicular to the edges of the cutouts71and the edges of the pixel electrodes190.

Referring toFIG. 3B, a cutout71bisects the pixel electrode190into two approximately V-shaped sections, and an imaginary line X extends through the corner portions of the pixel electrode190. The cutout71and the imaginary line X together divide the pixel electrode190into four quadrants (labeled A, B, C, and D), and each quadrant has two major edges192,193. The first major edge192is defined by the oblique linear portions of the cutout71, and the second major edge193is defined by the oblique edges of the pixel electrode290. The major edges192,193of the quadrants may make an angle of about 45 degrees with the polarization axes of the polarizers11and21to maximize the light efficiency. The distance between the first major edge192and the second major edge193in each quadrant may be equal to about 10 microns to about 30 microns.

Since most of the LC molecules31on each quadrant tilt perpendicular to the major edges192,193, the azimuthal distribution of the tilt directions are localized to about four directions. The various molecular tilt angles increase the reference viewing angle of the LCD.

The pixel electrode190is not limited to being divided into quadrants, and may be divided into eight or six sub-areas instead of four. This can be achieved by changing the number of the cutouts71at the common electrode270(e.g., so that two cutouts71divide a pixel electrode190into three V-shaped regions), by providing cutouts at the pixel electrodes190, or by changing the number of bent portions in the pixel electrodes190(and thus changing the number of imaginary line X).

The direction of a secondary electric field due to the voltage difference between the pixel electrodes190is perpendicular to the major edges of the quadrants. Accordingly, the field direction of the secondary electric field coincides with that of the horizontal component of the primary electric field. Consequently, the secondary electric field between the pixel electrodes190enhances the determination of the tilt directions of the LC molecules31.

The cutouts71can be substituted with protrusions (not shown) or depressions (not shown). The protrusions are preferably made of organic or inorganic material and disposed on or under the field-generating electrodes190or270. The width of the protrusions may be equal to about 5 microns to about 10 microns.

Various modifications may be made to the LCD shown inFIGS. 1-5.

For example, the pixel electrodes190as well as the common electrode270may have cutouts (not shown) for generating a fringe field. Furthermore, the cutouts may be substituted with protrusions disposed on the common electrode270or the pixel electrodes190.

The shapes and the arrangements of the cutouts or the protrusions may be varied depending on design factors such as the pixel size, the ratio of the lengths of the linear edges of the pixel electrodes, the type and characteristics of the liquid crystal layer3, and so on.

In another embodiment, the pixel electrodes190and the common electrode270may have no cutout or protrusion for controlling the molecular tilt directions of the LC layer.

In yet another embodiment, the LC layer3has positive dielectric anisotropy and is aligned in a twisted nematic mode, such that the LC molecules are aligned parallel to surfaces of the panels100and200and twisted by an approximately right angle from the TFT array panel100to the common electrode panel200in the absence of electric field.

In yet another embodiment, the pixel electrodes190, the data lines171, the semiconductor stripes151, the ohmic contact stripes161, the light blocking members220, the color filters230, etc., may be straight or rectangular rather than curved, oblique, rhombic, or parallelogrammic.

A method of manufacturing the TFT array panel shown inFIGS. 1-5according to an embodiment of the present invention will be now described in detail.

First, a lower conductive film preferably made of Cr, Mo, or Mo alloy and an upper conductive film preferably made of an Al-containing metal or an Ag-containing metal are sputtered sequentially on an insulating substrate110and they are wet or dry etched sequentially to form a plurality of gate lines121including gate electrodes124and end portions129and a plurality of storage electrode lines131including storage electrodes137.

After sequential chemical vapor deposition of a gate insulating layer140with thickness of about 1,500-5,000 Å, an intrinsic a-Si layer with a thickness of about 500-2,000 Å, and an extrinsic a-Si layer with a thickness of about 300-600 Å, the extrinsic a-Si layer and the intrinsic a-Si layer are photo-etched to form a plurality of extrinsic semiconductor stripes and a plurality of intrinsic semiconductor stripes151including projections154on the gate insulating layer140.

Subsequently, two conductive films including a lower conductive film and an upper conductive film and having a thickness of 1,500-3,000 Å are sputtered in sequence and patterned to form a plurality of data lines171including source electrodes173and end portions179and a plurality of drain electrodes175. The lower conductive film is preferably made of Cr, Mo, or Mo alloy, and the upper conductive film is preferably made of an Al-containing metal or an Ag-containing metal.

Thereafter, portions of the extrinsic semiconductor stripes, which are not covered with the data lines171and the drain electrodes175, are removed to complete a plurality of ohmic contact stripes161including projections163and a plurality of ohmic contact islands165and to expose portions of the intrinsic semiconductor stripes151. Oxygen plasma treatment preferably follows in order to stabilize the exposed surfaces of the semiconductor stripes151.

Next, a passivation layer180made of a photosensitive organic insulator is coated and exposed through a photo-mask having a plurality of transmissive areas and a plurality of slit areas disposed around the transmissive areas. Accordingly, portions of the passivation layer180in the transmissive areas absorb the full energy of the light, while portions of the passivation layer180in the slit areas partially absorb the light energy. The passivation layer180is then developed to form a plurality of contact holes182and185exposing the end portions179of the data lines171and the drain electrodes175, respectively, and to form upper portions of a plurality of contact holes181exposing portions of the gate insulating layer140disposed on the end portions129of the gate lines121. Since the portions of the passivation layer180facing the transmissive areas are removed to its full thickness, while the portions facing the slit areas remain to have reduced thickness, sidewalls of the contact holes181,182and185have stepped profiles.

After removing the exposed portions of the gate insulating layer140to expose the underlying portions of the end portions129of the gate lines121, the exposed portions of the upper conductive films129q,175qand179qof the end portions129of the gate lines121, the drain electrodes175, and the end portions179of the data lines171are removed to expose underlying portions of the lower conductive films129p,175pand179pof the end portions129of the gate lines121, the drain electrodes175, the end portions179of the data lines171.

Finally, a plurality of pixel electrodes190and a plurality of contact assistants81and82are formed on the passivation layer180and on the exposed portions of the lower conductive films129p,175pand179pof the end portions129of the gate lines121, the drain electrodes175, the end portions179of the data lines171by sputtering and photo-etching an IZO or ITO layer with thickness of about 400-500 Å.

An LCD according to another embodiment of the present invention will be described in detail with reference toFIGS. 6,7,8and9.

FIG. 6is a layout view of a TFT array panel for an LCD according to another embodiment of the present invention,FIG. 7is a layout view of a common electrode panel for an LCD according to another embodiment of the present invention,FIG. 8is a layout view of an LCD including the TFT array panel shown inFIG. 6and the common electrode panel shown inFIG. 7, andFIG. 9is a sectional view of the LCD shown inFIG. 8taken along line IX-IX′.

Referring toFIGS. 6-9, an LCD according to this embodiment also includes a TFT array panel100, a common electrode panel200, an LC layer300interposed between the panels100and200, and a pair of polarizers12and22attached on the panels100and200.

Layered structures of the panels100and200according to this embodiment are almost the same as those shown inFIGS. 1-5.

Regarding the TFT array panel100, a plurality of gate lines121including gate electrodes124and end portions129and a plurality of storage electrode lines131including a plurality of storage electrodes137are formed on a substrate110. A gate insulating layer140, a plurality of semiconductor stripes151including projections154, and a plurality of ohmic contact stripes161including projections163and a plurality of ohmic contact islands165are sequentially formed on the substrate110provided with the gate lines121and the storage electrode lines131. A plurality of data lines171including source electrodes173and end portions179and a plurality of drain electrodes175are formed on the ohmic contacts161and165, and a passivation layer180is formed thereon. A plurality of contact holes181,182and185are provided at the passivation layer180and the gate insulating layer140, and a plurality of pixel electrodes190and a plurality of contact assistants81and82are formed on the passivation layer180. An alignment layer11is formed on the pixel electrodes190and the passivation layer180.

Regarding the common electrode panel200, a light blocking member220, a plurality of color filters230, an overcoat250, a common electrode270having a plurality of cutouts71, and an alignment layer21are formed on an insulating substrate210.

Different from the LCD shown inFIGS. 1-5, the data lines171in the LCD according to this embodiment have relatively long linear portions that extend in the second direction and relatively short bent portions. The bent portions of the data lines171are disposed near centers of the pixel electrodes190.

Each of the pixel electrodes190overlaps two data lines171adjacent to the pixel electrode190and the overlapping area between the pixel electrode190and one of the two data lines171is nearly equal to the overlapping area between the pixel electrode190and the other of the two data lines171such that the parasitic capacitances made by the pixel electrode190and the two data lines171are nearly the same. As described above with reference toFIGS. 1-5, when the two data lines171transmit data voltages having opposite polarities, the voltage variations of the pixel electrode190due to the parasitic capacitances compensate for each other to reduce the net voltage change of the pixel electrode190.

The ratio of the overlapping areas may be varied from about 1:1 to about 1:2.

The width of the data lines171may be equal to about four microns to about eight microns, and preferably equal to about five microns to about six microns in consideration of the reduction of the parasitic capacitance and the resistance of the data lines171.

The storage electrodes137of the storage electrode lines131and the expanded end portions of the drain electrodes175are rectangular or square. The storage electrode lines131further include curved portions133extending from the storage electrodes137along the gaps between the pixel electrodes190.

The TFT array panel100further includes a plurality of color filter stripes230disposed under the passivation layer180, and the common electrode panel200has no color filter. The color filter stripes230extend along the pixel electrodes190and there is no color filter stripe near the contact holes185. Two adjacent color filter stripes230are spaced apart from each other on the data lines171. However, the color filter stripes230may overlap with each other to block the light leakage between the pixel electrodes190. When the color filter stripes230overlap each other, a light blocking member220disposed on a common electrode panel200may be omitted.

The light blocking member220in the common electrode panel200includes a plurality of blocking islands facing TFTs in the TFT array panel100.

Each of the cutouts71of the common electrode270has a corner extension portion connected with the corner portion to convert the V-shaped corner to a Y-shape. The corner extension portion extends in a first direction by a predetermined distance.

Each of the pixel electrodes190has a cutout91extending in the first direction along a straight line that extends in the first direction from a central transverse portion of a cutout71of the common electrode270.

The semiconductor stripes151of the TFT array panel100according to this embodiment have almost the same planar shapes as the data lines171and the drain electrodes175as well as the underlying ohmic contacts161and165. However, the projections154of the semiconductor stripes151include some exposed portions, which are not covered with the data lines171and the drain electrodes175, such as portions located between the source electrodes173and the drain electrodes175.

A manufacturing method of the TFT array panel according to an embodiment simultaneously forms the data lines171, the drain electrodes175, the semiconductors151, and the ohmic contacts161and165using one photolithography step.

A photoresist pattern for the photolithography process has position-dependent thickness, and in particular, it has first and second portions with decreased thickness. The first portions are located on wire areas that will be occupied by the data lines171, and the drain electrodes175, and the second portions are located on channel areas of TFTs.

The position-dependent thickness of the photoresist is obtained by several techniques, for example, by providing translucent areas on the exposure mask as well as transparent areas and light blocking opaque areas. The translucent areas may have a slit pattern, a lattice pattern, a thin film(s) with intermediate transmittance or intermediate thickness. When using a slit pattern, it is preferable that the width of the slits or the distance between the slits is smaller than the resolution of the light exposer used for the photolithography. Another example is to use reflowable photoresist. In detail, once a photoresist pattern made of a reflowable material is formed by using a normal exposure mask only with transparent areas and opaque areas, it is subject to a reflow process to flow onto areas without the photoresist, thereby forming thin portions.

As a result, fewer photolithography steps are needed and the manufacturing process is simplified.

Many of the above-described features of the LCD shown inFIGS. 1-5may be appropriate to the TFT array panel shown inFIGS. 6-9.

An LCD according to other embodiments of the present invention will be described in detail with reference toFIGS. 10 and 11.

FIGS. 10 and 11are layout views of LCDs according to other embodiment of the present invention.

Referring toFIGS. 10 and 11, an LCD according to this embodiment also includes a TFT array panel100, a common electrode panel200, a LC layer300interposed between the panels100and200, and a pair of polarizers12and22(seeFIG. 9) attached on the panels100and200.

Layered structures of the panels100and200according to this embodiment are almost the same as those shown inFIGS. 1-5.

Regarding the TFT array panel100, a plurality of gate lines121including gate electrodes124and end portions129and a plurality of storage electrode lines131including a plurality of storage electrodes137are formed on a substrate110. A gate insulating layer140, a plurality of semiconductor stripes151including projections154, and a plurality of ohmic contact stripes161including projections163and a plurality of ohmic contact islands165are sequentially formed on the substrate110provided with the gate lines121and the storage electrode lines131. A plurality of data lines171including source electrodes173and end portions179and a plurality of drain electrodes175are formed on the ohmic contacts161and165, and a passivation layer180is formed thereon. A plurality of contact holes181,182and185are provided at the passivation layer180and the gate insulating layer140, and a plurality of pixel electrodes190and a plurality of contact assistants81and82are formed on the passivation layer180. An alignment layer11is formed on the pixel electrodes190and the passivation layer180.

Regarding the common electrode panel200, a light blocking member220, a plurality of color filters230, an overcoat250, a common electrode270having a plurality of cutouts71, and an alignment layer21are formed on an insulating substrate210.

Different from the LCD shown inFIGS. 1-5, each of the data lines171in the LCD shown inFIG. 10is bent twice by about a right angle such that there are three linear oblique portions connected by two corner portions. In addition, the corner portion overlaps two pixel electrodes190along the cutouts71. In other words, each of the pixel electrodes190overlaps two data lines171.

A portion of each of the data lines171, which is disposed between two adjacent TFTs in the data line171, in the LCD shown inFIG. 11includes four corner portions spaced apart from each other and connected by linear portions. Two of the corner portions include substantially right angles, while the other two corner portions include obtuse angles. The obtuse corner portions arranged symmetrically around a line extending in the first direction and bisecting the pixel electrodes190includes a pair of oblique linear portions making about a right angle with each other. Two of the oblique linear portions disposed near TFTs overlap the cutouts71. “Oblique,” as used herein, indicates that a structure extends in a direction that is parallel to neither the first direction nor the second direction.

The light blocking member220in the common electrode panel200shown inFIGS. 10 and 11includes a plurality of blocking islands facing TFTs in the TFT array panel100.

Many of the above-described features of the LCD shown inFIGS. 1-5may be appropriate for the TFT array panel shown inFIGS. 10 and 11.