Monolithically integrated semiconductor assembly having a power component and method for producing a monolithically integrated semiconductor assembly

A monolithically integrated semiconductor assembly having a power component, and a method for manufacturing a semiconductor assembly, are proposed, a monolithically integrated resistor element being provided between a first terminal and the second region, and a comparatively low-impedance electrical connection through the first region being provided between the resistor element and the second region.

FIELD OF THE INVENTION

The present invention proceeds from a monolithically integrated semiconductor assembly and a method.

BACKGROUND INFORMATION

German Unexamined Application DE 43 34 856 A1 discusses an assembly for testing a gate oxide of a power component in which, despite the presence of a circuit that is monolithically integrated together with the power component, it is possible to check the gate oxide quality with a superelevated gate test voltage. Provision is made, for this purpose, for a series circuit made up of a first measurement pad, a resistor, and a second measurement pad to be disposed between the gate oxide of the power component and the integrated circuit.

In semiconductor assemblies having monolithically integrated power components, it is possible for terminals, for example a gate terminal of a MOS power transistor, to be interrupted, or for control to be lost (floating-gate state). It can happen in such a case that the power component goes into its maximum-output state, in particular when the source-drain voltage is above a threshold value. This results in failures of the power component and of the entire semiconductor assembly, which can lead to serious problems and consequential damage, in particular when the power component and the semiconductor assembly containing it are disposed in a safety-critical component of a vehicle, in particular a motor vehicle. At the same time, however, it must be guaranteed that the possibly interrupted terminal is checkable in terms of its operating reliability, especially as to whether, in the case of a gate terminal or a gate oxide connected to the gate terminal, sufficient quality (i.e. sufficient voltage resistance) exists for the entire service life of the power component.

SUMMARY OF THE INVENTION

The monolithically integrated semiconductor assembly according to the present invention and the method for manufacturing a monolithically integrated semiconductor assembly having the features of the coordinated claims have, in contrast, the advantage that with arrangement, testability of a first region of the semiconductor assembly is enabled, and it is also nevertheless possible to ensure that the first terminal of the power component exhibits, in guaranteed fashion, a potential that does not result in destruction of the component or in destruction of further components of the vehicle. Upon an interruption of a gate terminal that can be brought about e.g. by a bond break, or also in the event control is lost over a gate terminal of a power component (in particular of a MOSFET transistor), such a power component can transition into the maximum-output state. One approach to preventing this would be to provide a resistor between the gate terminal and source terminal of the MOSFET transistor.

If such a resistor were already introduced upon manufacture of the semiconductor assembly, it would not be possible to test the gate oxide (or the dielectric disposed at the gate terminal) of the MOSFET transistor in reliable fashion, since a disruption of the gate oxide can no longer be reliably detected because too great a current would flow through the resistor, so that the small currents flowing through the dielectric layer and requiring detection in the context of a gate oxide test would be concealed. It was entirely surprising to one skilled in the art that it is possible to achieve both goals with a simple arrangement by the fact that although a resistor structure in the form of a resistor element is provided between the first terminal and the second region of a power component, such a resistor element nonetheless initially performs no function, but instead is subsequently connected, through the first region, to the second region. This is possible, in a manner preferred according to the exemplary embodiments and/or the exemplary methods of the present invention, by way of a first and a second subregion of the first region, the first region being degenerated in its second subregion. This is accomplished, in a manner preferred according to the exemplary embodiments and/or the exemplary methods of the present invention, by applying a voltage pulse. A low-impedance subregion that puts the resistor element into operation is thereby produced in a second subregion of the first region, i.e. inside the dielectric layer.

This behavior can be achieved with a monolithically integrated resistor element that is provided between the first terminal and the second region, a comparatively low-impedance electrical connection through the first region being provided between the resistor element and the second region in the second subregion of the first region. It is advantageous that a comparatively low-impedance electrical connection of this kind can be brought about with a simple arrangement even after the actual manufacture of the semiconductor assembly or the power component, in particular with an overvoltage pulse. It is further preferred that in the first subregion, the first terminal be provided on one side of the first region, and a channel zone be provided on the other side of the first region, so that advantageously and with a simple arrangement, a MOSFET power transistor can be used as a power component. It is furthermore preferred that adjacently to the second subregion, a contact surface, for example a measurement pad, be provided for a further terminal.

The overvoltage pulse or spike can thereby be introduced with a simple arrangement, so that on the one hand comparatively little effort needs to be exerted in order to introduce the overvoltage pulse, and on the other hand effective protection of the remaining regions of the semiconductor assembly is guaranteed. It is further preferred that the power component be a MOS power transistor, in particular a vertical MOS power transistor. This makes it possible, in particularly economical fashion, to build on existing fabrication technology in order to manufacture the semiconductor assembly according to the present invention. It is further preferred that the first terminal correspond to the gate terminal of the power component, and that the second terminal correspond to the source terminal. It is furthermore additionally preferred that the first region be a semiconductor oxide layer, in particular a silicon oxide layer. This allows a layer of a dielectric to be manufactured in particularly reliable and economical fashion using established process technology, so that the semiconductor assembly according to the present invention meets service-life requirements for the intended application, in particular in the automotive sector.

A further subject of the exemplary embodiments and/or the exemplary methods of the present invention is a method for manufacturing a monolithically integrated semiconductor assembly according to the present invention, the semiconductor assembly firstly being substantially completely manufactured, in particular the power component being substantially completely manufactured; in a second step, the second subregion of the first region being generated in such a way that the second subregion is low-impedance. It is optionally possible to provide, between the first step and the second step, a test of the first region in such a way that semiconductor assemblies whose first region does not achieve the required specifications are discarded.

An exemplary embodiment of the invention is depicted in the drawings and is further explained in the description below.

DETAILED DESCRIPTION

FIG. 1depicts a schematic circuit assembly of a semiconductor assembly. The semiconductor assembly encompasses a power component10that is designed in particular as a power transistor10, in particular as a MOSFET transistor or power MOS transistor. Power component10has a first terminal11, a second terminal12, and a third terminal13. The exemplary embodiments and/or the exemplary methods of the present invention is presented on the basis of a MOSFET power transistor as an example of a power component10. This is to be understood, however, only as exemplary. According to the exemplary embodiments and/or the exemplary methods of the present invention, other types of power components, for example thyristors or the like, which if applicable can also have more than three terminals, can be utilized according to the exemplary embodiments and/or the exemplary methods of the present invention. A resistor element19is disposed according to the present invention between first terminal11and a second region (not depicted inFIG. 1) of power component10. The second region is electrically connected to second terminal12, thereby resulting, in the circuit depiction inFIG. 1, in an electrically insulating region between resistor element19and second terminal12, i.e. disposed between resistor element19and second terminal12is a first region15of power component10that initially separates resistor element19electrically from second terminal12and is provided substantially in the form of a capacitor. A further terminal14is also depicted inFIG. 1between resistor element19and second terminal12.

FIG. 2depicts the schematic disposition of the semiconductor assembly according to the present invention, power component10once again having first terminal11, second terminal12, and third terminal13. Power component10once again also has resistor element19. It is apparent fromFIG. 2that with the aid of an overvoltage pulse20applied between second terminal12and a further terminal14, first region15(cf.FIG. 1) can be degenerated in a subregion in such a way that an electrically low-impedance connection is created between resistor element19and second terminal12. This is depicted inFIG. 2by a lightning-bolt symbol on capacitor structure22. The reference character22designates, in this case, a second subregion of first region15that has become low-impedance as a result of overvoltage pulse20.

FIG. 3is a schematic circuit depiction of the semiconductor assembly in an alternative embodiment(s). Power component10once again has first terminal11, second terminal12, third terminal13, and further terminal14. InFIG. 3, resistor element19and second subregion22of first region15are disposed between first terminal11and second terminal12, voltage pulse20causing second subregion22to be degenerated to low resistance. In order to protect power component10, a short circuit can furthermore be created between first terminal11and second terminal12during overvoltage pulse20, as depicted inFIG. 3with an indicated switch35.

FIG. 4schematically depicts monolithically integrated semiconductor assembly1according to the present invention having power component10, in a sectioned depiction. According to the exemplary embodiments and/or the exemplary methods of the present invention, a vertical MOSFET transistor10, in particular, is provided as power component10. Such a transistor has, in a substrate material2, in particular semiconductor material, particularly preferably silicon material, multiple wells or multiple region of different doping. For example, a second (preferably negatively doped) region16is disposed inside a third (preferably positively doped) region17. Above third region17, first region15is embodied in particular in the form of a layer of comparatively high-impedance material, by preference a dielectric material such as, for example, silicon oxide, silicon nitride, semiconductor oxide or nitride in general, or the like. Above first region15(which is also referred to as gate oxide15) in the region of the connection between first region15and third region17, a first terminal surface31or first terminal electrode31is provided in order to implement first terminal11.

First terminal electrode31is embodied in particular, according to the exemplary embodiments and/or the exemplary methods of the present invention, as a terminal metallization (contact pad). Provided above second region16is a second terminal surface32that implements second terminal12. Third terminal13of power component10is implemented on the back side of substrate material2, a terminal metallization likewise preferably being provided, according to the exemplary embodiments and/or the exemplary methods of the present invention, in order to implement a terminal electrode.

In known fashion, power component10in the form of a MOSFET transistor functions in such a way that a channel18forms between second region16and substrate material2in third region17of power component10, at the point located opposite first terminal11(separated by gate oxide15or by first region15). According to the exemplary embodiments and/or the exemplary methods of the present invention, provision is made that in the region of first region15, preferably above first region15, resistor element19is provided between first terminal11and further terminal14, initially separated electrically from second region16by first region15. According to the present invention, further terminal14be implemented by way of a further terminal surface34on first region15. Resistor element19is preferably implemented, according to the exemplary embodiments and/or the exemplary methods of the present invention, by way of a polysilicon structure, preferably by way of a meander-shaped polysilicon structure. Other structures for implementing resistor element19are, however, likewise possible.

Provision is made that first region15, i.e. gate oxide15, initially be continuously intact, i.e. have an insulating effect, both below first terminal11and below further terminal14. Power component10or semiconductor assembly10can, in this context, exist or be processed in entirely completed form. Alternatively, it is also possible for the monolithically integrated semiconductor assembly not to be entirely completed yet, but for the regions depicted inFIG. 4already to exist and also to be at least partially covered by way of passivation layers (not depicted). This is followed, according to the exemplary embodiments and/or the exemplary methods of the present invention, by a step of testing the dielectric in first region15. This is because dielectric15or first region15between third region17and first terminal11is a critical point in terms of the operation of power component10over the entire service life of the assembly, which is intended to correspond to the service life of a vehicle, i.e. approximately 10 to 15 years or even more.

The consequence of imperfections or other defects within first region15is that the dielectric strength in this region is not sufficiently high, which results—in particular over the course of the service life of the component or the semiconductor assembly—in failures that not only may damage the entire component or the entire semiconductor assembly, but moreover may also cause damage to components connected thereto. According to the exemplary embodiments and/or the exemplary methods of the present invention, resistor element19is sufficiently low-impedance that, for example, a bond break at first terminal11does not cause a so-called floating gate state to occur, i.e. a state in which first terminal11is not at any defined potential. In the case of a resistor element19of sufficiently low resistance to perform this function, however, it is the case that a capability for testing first region15in order to check the dielectric strength no longer exists to the necessary degree, since the relatively low resistance of resistor element19means that too large a current would flow through said resistor element19during testing. It must be noted in this context that the testing of first region15, i.e. the testing of gate oxide15, is associated with a measurement of picoampere-scale currents flowing through the gate oxide, whereas in the context of the test voltages of up to 60 V that occur, currents several orders of magnitude greater would flow through resistor element19alone.

It is therefore proposed according to the exemplary embodiments and/or the exemplary methods of the present invention that resistor element19firstly be provided in a manner insulated from second region16, first region15being provided as insulating material. Overvoltage pulse20between the two terminals and further terminal14makes it possible, according to the exemplary embodiments and/or the exemplary methods of the present invention, to divide first region15into first subregion21and second subregion22, the first subregion still having a sufficiently high impedance to guarantee functionality of the component over its entire service life, and second subregion22having a sufficiently low impedance to electrically connect resistor element19to second terminal12. The following testing scenario may be presented by way of example: At a test voltage of +/−15 V, the gate oxide currents for an intact gate oxide are, for physical reasons, in the pA range. In a wafer test program, the gate oxide is tested, for example, with a positive and negative maximum gate voltage, in which context the currents that flow must remain below 100 nA in order for the gate oxide to be considered functional and reliable. If the resistance value of resistor element19is, for example 15 kilohm, this yields (for an applied voltage of 15 V) a fault current of 1 mA, so that the fault current is in any case four orders of magnitude greater than the maximum permissible current flowing through the gate oxide.