Values are received for one-time programmable (OTP) bits of an application-specific integrated circuit (ASIC) that are unprogrammed. The ASIC has one or multiple processors that are disabled. The OTP bits of the ASIC are programmed with the received values. The OTP bits after having been programmed govern which and whether instructions are executable by the ASIC. Future reprogramming of the OTP bits of the ASIC is disabled. In response to successful programming of the OTP bits and successful disabling of future reprogramming of the OTP bits, the processors of the ASIC are enabled.

BACKGROUND

Electronic and electromechanical devices, including printing devices such as standalone printers and all-in-one (AIO) devices that in addition to printing functionality have scanning, copying, and/or faxing functionality, include a variety of specialized components. The devices are usually assembled in a different facility from that in which at least some of the specialized components are fabricated. For example, application-specific integrated circuits (ASICs) may be fabricated at a separate semiconductor fabrication facility before being transported to an assembly facility in which devices including the ASICs are manufactured.

DETAILED DESCRIPTION OF THE DRAWINGS

An application-specific integrated circuit (ASIC) is an IC that is customized for a particular use, rather than intended for general-purpose use as is the case with a general-purpose processor such as a central processing unit (CPU). ASICs are fabricated within specialized semiconductor fabrication facilities. Once the ASICs have been fabricated within such a fabrication facility, they can be transported to a different manufacturing facility at which devices including the ASICs, such as printing devices, are assembled.

An ASIC can have security features to ensure that the ASIC runs only approved instructions after assembly within a device. For example, the ASIC may have a public cryptographic key programmed therein, which is one example of an authorization or authentication signature. A processor, such as the boot processor that executes instructions before any other processor of the ASIC can do so, first verifies that instructions have been signed with a corresponding private cryptographic key before executing the instructions. The private key is securely maintained by an authorized party, such as the device manufacturer, and ensures that the ASIC can only execute instructions approved by that party.

However, because ASICs are fabricated within a different facility than the facility within which end devices of which the ASICs are a part are manufactured, malfeasance or negligence can result in security vulnerabilities. ASICs may accidentally exit the fabrication facility before they have been programmed with an approved authentication or authorization signature, or a nefarious party within the fabrication facility may divert ASICs from the facility before they have been so programmed. Such ASICs are otherwise operable, and if assembled into devices may be able run instructions unapproved by the device manufacturer. The ASICs may be programmed with a different signature, such as that of a nefarious party, to permit the nefarious party to have ASICs within devices run instructions of the party's choosing.

Furthermore, public-private key cryptography in particular has been shown to be vulnerable to quantum computing techniques. A nefarious party who has access to quantum computing resources can therefore overcome the security afforded by public-private key cryptography to cause an ASIC within a device to execute instructions of its own choosing. This means that even an ASIC that has left the fabrication facility properly programmed with the approved authentication or authorization signature of the device manufacturer is nevertheless vulnerable in its ability to execute only manufacturer-approved instructions after assembly within a device.

Techniques described herein ameliorate these and other issues. An ASIC includes one-time programmable (OTP) bits that can be also referred to as cryptographic value OTP bits. The OTP bits can be programmed with values that are robust against quantum computing attacks. For instance, these OTP bits may be a SHA-256 cryptographic digest generated using the SHA-256 cryptographic hashing algorithm, and which is generally considered to be resistant to quantum computing attacks. The boot processor of the ASIC only executes instructions that have values (e.g., a cryptographic digest) matching those programmed into these digest OTP bits. That is, the OTP bits after having been programmed govern which and whether instructions are executable by the ASIC

Furthermore, until the OTP bits of the ASIC have been programmed with values, the processors of the ASIC are disabled. That is, the ASIC is fabricated so that the processors are initially disabled and thus inoperable. Only after the OTP bits have been programmed are the processors subsequently enabled.

This means that, in general, an ASIC leaving the semiconductor fabrication facility is in one of two states. First, the ASIC may have had its digest OTP bits programmed and its processors enabled. In this case, upon assembly into a device, the ASIC will execute just device manufacturer-approved code, since the OTP bits are programmed with manufacturer-specific values within the fabrication facility.

Second, the ASIC may leave the fabrication facility without having had its OTP bits programmed, either purposefully (e.g., nefariously) or accidentally. However, because the ASIC did not have its OTP bits programmed, the processors of the ASIC remain disabled. As a result, the ASIC is inoperable, and will not be able to execute any instructions if assembled into a device. Therefore, the usefulness of such an ASIC to a nefarious party is limited.

However, a sophisticated nefarious party may have access to the same tool used in the fabrication facility to program the OTP bits (and thus to enable the processors of the ASIC). This means that such a party, if able to divert OTP bit-unprogrammed and processor-disabled ASICs from the fabrication facility, would nevertheless be able to program the OTP bits within its own values. Therefore, if assembled into a device, the ASIC would execute instructions as dictated by the nefarious party, instead of manufacturer-approved instructions.

The techniques described herein provide for a specialized process by which to program the OTP bits to defend against such an ASIC attack vector. In particular, an ASIC may have an ASIC-specific value that is readable even when the processors of the ASIC are disabled. For successful programming of the OTP bits, the ASIC-specific value is first read, and an authentication value calculated based on this value, which is then provided to the ASIC. The ASIC's OTP bits are programmable only if the provided authentication value matches a value that the ASIC expects.

This process reduces the likelihood that a sophisticated nefarious party that has access to the same tool used in the fabrication facility to program the OTP bits of an ASIC from successfully programming the OTP bits. Even if the party is able to divert an OTP bit-unprogrammed and processor-disabled ASIC from the fabrication facility, the party would have to know both how to read the ASIC-specific value and how to calculate an authentication value from this value in order to successfully program the OTP bits. Even if the party knows just how to read the ASIC-specific value or just how to calculate the authentication value from this value, the party would still be unsuccessful in programming the OTP bits of the ASIC.

FIG.1shows an example overall process100in which ASICs102are manufactured vis-à-vis the electronic or electromechanical devices110(which in the example are specifically printing devices) within which the ASICs102are assembled. Specifically, the ASICs102are manufactured at an ASIC fabrication facility104, which may be a specialized semiconductor fabrication facility. Upon being manufactured and released from the fabrication facility104, the ASICs102are shipped, such as via truck106, to a separate device assembly facility108at which the devices110are assembled or otherwise manufactured. The device assembly facility108may be at a physically distant location than the ASIC fabrication facility104. The fabricated ASICs102are thus assembled into the devices110at the assembly facility108.

FIG.2shows an example ASIC102. The ASIC102can include one or multiple processors202. The processors202include at least a boot processor204, and can include one or multiple other processors206as well. The boot processor204is the processor that executes instructions before any other processor206of the ASIC102is able to execute (other) instructions.

The ASIC102can include or be connected to volatile memory208, such as volatile semiconductor memory such as dynamic-random access memory (DRAM). The ASIC102can include a storage device interface210to permit communicative connection of a storage device to the ASIC102that stores instructions executable by the processors202. The storage device interface210may be a slot or socket permitting physical coupling of a nonvolatile memory card or chip (or other storage device) to the ASIC102for loading of instructions stored on the storage device into the memory208for execution by the processors202. In another implementation, the nonvolatile memory card or chip may be soldered to the same logic board as the ASIC102, in which case the storage device interface210may be considered the internal wiring of the logic board that are connected to this storage device.

The ASIC102can include a non-volatile read-only memory (ROM)211that stores boot instructions (e.g., in the form of program code) for execution by the boot processor204in particular. An example of such a ROM211is described later in the detailed description, as a non-transitory computer-readable data storage medium more generally. The boot instructions stored on the ROM211direct the boot processor204to load and verify instructions stored on the storage device coupled to the storage device interface210, and execute the instructions if verified. Execution of the instructions by the boot processor204may then result in the other processors206loading and executing other instructions from the storage device, for instance.

The ASIC102includes a number of OTP bits212. The OTP bits212are stored in a secure non-volatile memory region of the ASIC102. The OTP bits212can be programmed with values just once. That is, the non-volatile memory region of the ASIC102is not erasable or rewritable after having been rewritten. That is, this non-volatile memory region of the ASIC102may be in the form of links, that can be fused or burned together in an irreversible manner. The OTP bits212can be programmed with cryptographic values that are specific to the manufacturer of the device110in which the ASIC102may be assembled.

For example, the cryptographic values may constitute a cryptographic signature corresponding to the content of the storage device and to a private cryptographic key that is known only to the manufacturer and its approved parties. As another example, the cryptographic values may constitute a cryptographic digest that is more resistant if not impervious against quantum computing attacks. For example, the values may represent a SHA-256 cryptographic digest generated using the SHA-256 cryptographic hashing algorithm.

The ASIC102can include a processor enable bit214. The processor enable bit214can be stored in a non-volatile memory region of the ASIC102, and is also an OTP bit in that it is able to be programmed once and is not erasable or rewritable. The processor enable bit214is set to true to enable the processors202, once the OTP bits212have been programmed. The processor enable bit214may not be able to be set to true if the OTP bits212have not been programmed with values. The processor enable bit214may automatically be set to true when the OTP bits212are programmed. Until the processor enable bit214is set to true, the processors202remain disabled and inoperative and the ASIC102non-functional. Therefore, at initial fabrication of the ASIC102, the OTP bits212are unprogrammed and the processor enable bit214indicates or is otherwise false by default.

The ASIC102may include an OTP-programming enable bit216. The enable bit216can be stored in a non-volatile memory region of the ASIC102, and is also an OTP bit in that it is able to be programmed once and is not erasable or rewritable. The enable bit216can be used to control whether the OTP bits212are programmable. For instance, at initial fabrication of the ASIC102, the enable bit216is set to true, permitting the OTP bits212to be programmed with values. Once the OTP bits212have been programmed, the enable bit216is set to false to prevent the OTP bits212from being erased or reprogramed. The enable bit216may automatically be set to false when the OTP bits are programmed. Until the enable bit216is set to false, the OTP bits212can be programmed.

The ASIC102may include an ASIC-specific value218and/or a corresponding authorization value220. The ASIC-specific value218and the corresponding authorization value220may be stored in a secure non-volatile memory region of the ASIC102. The ASIC-specific value218is accessible and readable outside of the ASIC102, whereas the authorization value220is not accessible nor readable outside of the ASIC102. The ASIC-specific value218is a value that is specific to the ASIC102itself, and may be at least substantially unique to each ASIC102. The ASIC-specific value218may be a serial number, for instance.

The authorization value220is a value that is generated based on or from the ASIC-specific value218. The authorization value220may be generated by applying a cryptographic or other hashing algorithm or technique to the ASIC-specific value218. The hashing algorithm may be a one-way hashing algorithm, in that the ASIC-specific value218is not determinable from the authorization value220. The hashing algorithm may be a one-to-one, or substantially one-to-one, algorithm, in that different ASIC-specific values218may not result in generation of the same authorization value220.

The authorization value220can control whether the OTP bits212, the processor enable bit214, and/or the OTP-programmable enable bit216can be programmed. Unless an authorization value matching the authorization value220stored in the ASIC102is provided, for instance, the bits212,214, and/or216are not able be programmed. As one example, the OTP bits212may be able to be programmed with values, but the processor enable bit214may not be able to be set to true unless an authorization value matching the authorization value220is provided. In this case, the OTP bits212could be programmed, but the processors202nevertheless still remain disabled.

In another implementation, the authorization value220may not be stored in the ASIC102, but generated by the ASIC102when an authorization value is provided to the ASIC102. In this case, the processor enable bit214may not be able to be set to true unless the provided authorization value matches the generated authorization value220. As before, the OTP bits212could still be programmed, but the processors202remain disabled. In both implementations, then, the processor enable bit214may not be able to be set to true unless the provided authorization value matches the expected (e.g., previously stored or generated) authorization value220.

FIG.3shows an example method300for programming the OTP bits212of an ASIC102, and not enabling the processors202of the ASIC102until the OTP bits212have been programmed. The method300is performed at the ASIC fabrication facility104after fabrication of the ASIC102and prior to release of the ASIC102from the facility104for transport to the device assembly facility108. The method300can be performed using a specialized ASIC-programming equipment, such as a tool. Such a tool may be able to perform the method300on multiple ASICs102in parallel, or sequentially.

Upon the ASIC102having been fabricated (302), the processors202are initially in a disabled state and the OTP bits212have not been programmed. Therefore, if the ASIC102includes a processor enable bit214and/or the OTP-programming enable bit216, the enable bit214is initially set to false (to disable the processors202) and the enable bit216is initially set to true (to permit programming of the OTP bits212) at fabrication. By comparison, the ASIC-specific value218and the authentication value220, if present, are stored or programmed into the ASIC102at time of fabrication.

The method300includes receiving values for the OTP bits212(304). As has been noted, the values are specific to the manufacturer of the device110, and can represent a cryptographic value such as a cryptographic signature or a cryptographic digest of or for the device manufacturer. The method300includes programming the OTP bits212with the received values (306). Once programmed with values, the OTP bits212govern whether the boot processor204executes instructions loaded from a storage device coupled to the storage device interface210, and thus whether any other processor206can execute other instructions loaded from the storage device, as described later in the detailed description.

The method300includes disabling future reprogramming of the OTP bits212(308). In one implementation, such disabling is automatic or inherent to programming of the OTP bits212. That is, the physical nature of the non-volatile region of the ASIC102in which the OTP bits212are stored may preclude the OTP bits212from being reprogrammed. In another implementation, such disabling occurs by permanently setting an OTP-programming enable bit216to false, which governs whether the OTP bits212can be programmed (and thus reprogrammed). The OTP-programming enable bit212may be set to false automatically with the programming of the OTP bits212.

The method300includes, in response to successfully programming the OTP bits212and successfully disabling future reprogramming of the OTP bits212, enabling the processors202of the ASIC102(310). In one implementation, such enabling occurs by permanently setting the processor enable bit214to true, which governs whether the processors202are enabled and thus operative. That is, the architectural design of the ASIC102is such that the processors204are disabled and inoperative (and the ASIC102non-functional) unless the enable bit214is set to true. The processor enable bit214may be set to true automatically with the programming of the OTP bits212.

Once the method300has been performed, the ASIC102can then be released from the fabrication facility104(312), and thus transported to the assembly facility108for inclusion within a device110. Upon being released from the fabrication facility104, if the method300has been performed, the ASIC102has its OTP bits212programmed with values in such a way that the bits212cannot be reprogrammed or erased, and the processors202are enabled. If the ASIC102is purposefully (e.g., nefariously) or accidentally released without the method300having been performed after fabrication, the ASIC102is generally unusable, because the processors202are disabled.

However, a sophisticated nefarious party may nevertheless still be able to use the ASIC102even if released from the fabrication facility104without the method300having been performed, and thus even though the processors202are disabled. Specifically, a nefarious party having access to the same ASIC-programming equipment as that which is used within the facility104to perform the method300may in be theory able to program the OTP bits212with its own values to enable the processors202and permit the party to control which instructions the boot processor204executes. Therefore, what follows is description of a technique to lessen the likelihood of such a nefarious party from being successful in this regard.

FIG.4shows an example method400that can be used in conjunction with the method300for controlling whether the OTP bits212and/or the processor enable bit214(which is another type of OTP bit) can be programmed (e.g., set). The method400is performed in an implementation in which the ASIC102at fabrication includes the ASIC-specific value218and the authentication value220. As noted, the authentication value220is generated by applying a specific cryptographic hashing or other technique to the ASIC-specific value218. The identity of the specific hashing technique (i.e., which technique is used) may be known only to the device manufacturer and its approved parties.

The method400can be performed prior to part306and/or part310of the method300, or within part306and/or part310. That is, the OTP bits212may be successfully programmed with provided values only after the method400has resulted in generating the authentication value220internal to the ASIC102. Similarly—i.e., additionally or instead—the processor enable bit214may be successfully set to true only after the method400has resulted in generation of the authentication value220.

The method400includes reading the ASIC-specific value218from the ASIC102while the processors202remain disabled (402). For example, the ASIC-specific values218may be stored in the ASIC102in such a way that they can be read without involving the processor202, which means that the values218can be read without the processors202having to be enabled. If a nefarious party does not know the process by which the ASIC-specific value218is readable, therefore, the party will not be able to program the OTP bits212and/or enable the processors202.

The method400includes calculating an authentication value from the ASIC-specific value218that has been read (404). The authentication value is calculated in the same way in which the authentication value220stored in and irretrievable from the ASIC102was generated. If a nefarious party does not know the particular hashing algorithm technique used to generate the authentication value220the party will not be able to program the OTP bits212and/or enable the processors202, even if the party is able to read the ASIC-specific value218from the ASIC102.

Furthermore, in one type of hashing algorithm, the authentication value220is generated using an ASIC-specific value218and another value, which is known as “salt.” The salt is known just to the device manufacturer and its approved parties, and the same salt may be used for generating the authentication value220for every ASIC102. Therefore, even if a nefarious party knows the particular hashing algorithm that is used, if the party does not know the salt, the party will not be able to program the OTP bits212and/or enable the processors202, even if the party is able to read the ASIC-specific value218.

The method400includes providing the calculated authentication value to the ASIC102(400). The ASIC102in turn permits the OTP bits212to be programmed and/or the processors202to be enabled just if the provided authentication value matches (e.g., is identical to) the authentication value220stored within the ASIC102. If the provided authentication value does not match the stored authentication value220, the ASIC102does not program the OTP bits212and/or does not enable the processors202. Therefore, a nefarious party that is unable to generate the authentication value220will be unable to successfully program the OTP bits212and/or enable the processors202.

FIG.5shows an example non-transitory computer-readable data storage medium500storing program code502executable by the processors202of the ASIC102to perform processing. The computer-readable data storage medium500is a more general example of the described ROM211of the ASIC102. The program code502thus can be stored within the ASIC102at time of fabrication. The program code502is executable after the processors202have been enabled, and thus after the OTP bits212have been programmed. For instance, the program code502may be executed as boot instructions after the ASIC102has been assembled into a device110.

The processing includes the boot processor204loading and/or processing but not executing instructions from a storage device coupled to the storage device interface210(504). The processing includes the boot processor204then calculating values from or based on the loaded instructions (506). As one example, the instructions may have been digitally signed with a private cryptographic key such that the signature matches the value stored within the OTP bits212. As another example, the boot processor204may perform a cryptographic hashing algorithm on the instructions or a portion thereof to generate a cryptographic digest. For instance, the boot processor204may apply the SHA-256 algorithm to the instructions to generate an SHA-256 digest.

The processing includes the boot processor204comparing the calculated values with the values previously programmed into the OTP bits212to determine if the calculated values match the values programmed into the OTP bits212(508). In the case of public-private key authentication, the boot processor204may as part of this comparison use the public key encoded within the OTP bits212to verify that the instructions have been digitally signed with the corresponding private key. In the case of a cryptographic digest, the boot processor204may as part of this comparison verify that the cryptographic digest calculated based on the instructions is identical to the digest encoded within the OTP bits212.

The processing includes, if the calculated values match the programmed values, the boot processor204executing the instructions that have been loaded from the storage device coupled to the storage device interface210(510). Such execution can result in the boot processor204passing control to other processors206, and thus permitting other processors206to load and execute other instructions from the storage device. As another example, such execution can result in further instruction authentication being performed in a cascading chain of trust, where the initially loaded set of instructions once authenticated convey trust to a subsequently loaded set of instructions, which once authenticated convey trust to another subsequently loaded set of instructions, and so on.

The processing includes, if the calculated values do not match the programmed values, the boot processor204not executing the instructions that have been loaded from the storage device (510). In this case, the boot processor204does not permit any other processor204to execute other instructions, such that no other processor206can execute other instructions. Therefore, the OTP bits212(specifically the values programmed therein) govern whether the boot processor204executes loaded instructions, and whether any other processor206can execute other instructions.

Techniques have been described for rendering ASICs102less susceptible to security vulnerabilities. When an ASIC102leaves the ASIC fabrication facility104, the ASIC102may be in one of two states. First, the processors202may have been enabled and the OTP bits212programmed with device manufacturer-specific values that ensure that the processors202can execute just manufacturer-approved instructions. Therefore, such an ASIC102is less likely to be maliciously used by a nefarious party. Second, the processors202may be disabled. In this case, such an ASIC102is also less likely to be maliciously used by all but more sophisticated nefarious parties that have access to the same equipment for programming the OTP bits212as that which is used within the fabrication facility104.

Furthermore, techniques have been described herein for rendering ASICs102less susceptible to even these security vulnerabilities. Specifically, the techniques can limit programming of the OTP bits212and the processor enable bit216only if an ASIC-specific value218is known how to be read and a corresponding authentication value220is known how to be calculated from the value218. Finally, because the OTP bits212are not limited to any particular type of cryptographic authentication values, the described ASIC102is futureproof insofar as when an existing way by which the values programmed into the OTP bits212are generated has been compromised, the OTP bits212of future ASICs102can be programmed with values generated in a different manner.