Magnetoresistive element and memory circuit including a free layer

A magnetoresistive element includes: a free layer that includes a magnetostrictive layer containing a magnetostrictive material; a pin layer that includes a first ferromagnetic layer; a thin film that is located between the pin layer and the free layer; a piezoelectric substance that is located so as to surround at least a part of the magnetostrictive layer from a direction intersecting with a stacking direction of the free layer and the pin layer and applies a pressure to the magnetostrictive layer; and an electrode that is capable of applying a voltage different from a voltage applied to the free layer and a voltage applied to the pin layer and applies a voltage to the piezoelectric substance so that the piezoelectric substance applies a pressure to the magnetostrictive layer.

TECHNICAL FIELD

The present invention relates to a magnetoresistive element and a memory circuit, and relates to, for example, a magnetoresistive element and a memory circuit including a free layer.

BACKGROUND ART

Magnetic tunnel junctions (MTJs), which are a type of magnetoresistive elements, have been researched and developed as a memory element for the magnetoresistive random access memory (MRAM), which is a nonvolatile memory. It is also expected to be applied to a low power logic architecture such as power gating utilizing a nonvolatile memory (nonvolatile power gating: NVPG) (Patent Document 1). The MTJ includes a free layer of which the magnetization direction is able to be changed and a pin layer of which the magnetization direction is fixed.

FIG. 4 of Patent Document 2 describes that a piezoelectric substance is located on the circumference surface of a cylindrical memory element laminated body and a metal film is located on the circumference surface of the piezoelectric substance.

PRIOR ART DOCUMENT

Patent Document

Patent Document 2: Japanese Patent Application Publication No. 2012-9786

SUMMARY OF THE INVENTION

Problem to be Solved by the Invention

Spin-transfer-torque current-induced magnetization switching (STT-CIMS) is widely used to reverse the magnetization of the free layer of the MTJ. In STT-CIMS, the current of spin-polarized electrons flowing through the MTJ causes the magnetization to be subject to a torque, and thereby reversing the magnetization. The threshold current density necessary for magnetization reversal is Jc. Generally, Jc is large, 106A/cm2or so. To reduce Jc, the energy burrier relating to the magnetization reversal is reduced. However, in this case, problems such as deterioration of the thermal disturbance resistance during retention of information and increase in probability of erroneous writing occur. Thus, it may be considered to conduct STT-CIMS by applying an external stimulus such as heat or high frequency voltage to change the shape/height of the effective energy burlier only when reversing the magnetization. The use of this method enables to reduce Jc without deteriorating the thermal disturbance resistance and the like. However, the energy consumption for the external stimulus is not small, and even if Jc is reduced, the reduction of total energy consumption is not easy because of the energy consumption for the external stimulus. As described above, the reduction of the energy consumption for changing the magnetization direction of the free layer is desired.

Patent Document 2 describes that when a voltage is applied to the metal film, a compressing pressure is applied to the memory layer (the free layer) in the memory element laminated body, the coercivity of the memory layer decreases due to the inverse magnetostrictive effect, and thereby the spin injection current is reduced.

However, the metal film is electrically connected to a lower electrode for causing current to flow through the memory element laminated body. In such a structure, when a current in the reverse direction is caused to flow through the memory element laminated body, the piezoelectric substance does not apply a compression pressure to the memory layer. Therefore, the spin injection current is not reduced.

The present invention has been made in view of the above problems, and aims to reduce the energy consumption for changing the magnetization direction of a free layer.

Means for Solving the Problem

The present invention is a magnetoresistive element characterized by including: a free layer that includes a magnetostrictive layer containing a magnetostrictive material; a pin layer that includes a first ferromagnetic layer; a thin film that is located between the pin layer and the free layer; a piezoelectric substance that is located so as to surround at least a part of the magnetostrictive layer from a direction intersecting with a stacking direction of the free layer and the pin layer and applies a pressure to the magnetostrictive layer; and an electrode that is capable of applying a voltage different from a voltage applied to the free layer and a voltage applied to the pin layer and applies a voltage to the piezoelectric substance so that the piezoelectric substance applies a pressure to the magnetostrictive layer.

In the above structure, the electrode may be located so as to surround at least a part of the piezoelectric substance, and the piezoelectric substance may be dielectrically polarized in a direction from the magnetostrictive layer to the electrode or a direction from the electrode to the magnetostrictive layer.

In the above structure, the electrode may include a first electrode and a second electrode located at both sides in the stacking direction with respect to the piezoelectric substance, and the piezoelectric substance may be dielectrically polarized in the stacking direction.

In the above structure, when a polarity of a voltage applied to the pin layer with respect to the free layer reverses, a polarity of a voltage applied to the electrode with respect to the free layer may not change.

In the above structure, when a polarity of a voltage applied to the pin layer with respect to the free layer reverses, a polarity of a voltage applied to the second electrode with respect to the first electrode may not change.

In the above structure, the free layer may include a second ferromagnetic layer magnetically coupled to the magnetostrictive layer.

In the above structure, the magnetostrictive layer may change a direction of a magnetization easy axis thereof by application of pressure and reverse a magnetization direction of the free layer.

In the above structure, the magnetization direction of the free layer may be reversed by spin-transfer-torque current-induced magnetization switchin when the direction of the magnetization easy axis of the magnetostrictive layer changes.

In the above structure, the thin film may include a tunnel barrier insulating layer or a non-magnetic metal layer.

In the above structure, the thin film may include a piezoresistor, and the piezoelectric substance may apply a pressure to the piezoresistor.

The present invention is a memory circuit characterized by including: the above magnetoresistive element a bit line to which one of the free layer and the pin layer is coupled; a switch coupled to another of the free layer and the pin layer; a source line coupled to the another of the free layer and the pin layer through the switch; a word line to which a control terminal controlling the switch is coupled; and a control line to which the electrode is coupled.

The present invention is a memory circuit characterized by including: the above magnetoresistive element; a bit line to which one of the free layer and the pin layer is coupled; a source line coupled to another of the free layer and the pin layer; and a word line coupled to the electrode.

The present invention is a memory circuit characterized by including: a magnetoresistive element including: a free layer that includes a magnetostrictive layer containing a magnetostrictive material; a pin layer that includes a first ferromagnetic layer; a thin film that is located between the pin layer and the free layer; a piezoelectric substance that is located so as to surround at least a part of the magnetostrictive layer from a direction intersecting with a stacking direction of the free layer and the pin layer, and applies a pressure to the magnetostrictive layer; and an electrode that is capable of applying a voltage different from a voltage applied to the free layer and a voltage applied to the pin layer, and applies a voltage to the piezoelectric substance so that the piezoelectric substance applies a pressure to the magnetostrictive layer; and a transistor including: a source and a drain, one of the source and the drain being coupled to one of the free layer and the pin layer; a channel that is located between the source and the drain and through which a carrier conducts from the source to the drain; and a gate that surrounds at least a part of the channel from the intersecting direction, wherein the source, the channel, and the drain are stacked in the stacking direction.

In the above structure, the channel may be a piezoresistor, and the gate may include a piezoelectric substance that applies a pressure to the channel from a direction intersecting with a direction in which the carrier conducts.

EFFECTS OF THE INVENTION

The present invention enables to reduce the energy consumption for changing the magnetization direction of a free layer.

MODES FOR CARRYING OUT THE EMBODIMENTS

Hereinafter, a description will be given of embodiments with respect to the accompanying drawings.

First Embodiment

A first embodiment s an exemplary magnetoresistive element utilizing a magnetic tunnel junction MTJ.FIG. 1is a cross-sectional view of a nonvolatile memory element in accordance with the first embodiment. As illustrated inFIG. 1, in a nonvolatile memory element110, a piezoelectric electrode24, a piezoelectric substance22, a free layer electrode26, a magnetoresistive layer20, and a pin layer electrode28are stacked in a stacking direction z. The laminated body from the piezoelectric electrode24to the pin layer electrode28is supported by a support structure48made of a high yield strength material. The support structure48is formed of a material having Young's modulus greater than and a yield strength higher than those of the piezoelectric electrode24, the piezoelectric substance22, the free layer electrode26, the magnetoresistive layer20, and the pin layer electrode28. A low Young's modulus region29is located around the piezoelectric electrode24, the piezoelectric substance22, the free layer electrode26, the free layer10, a tunnel barrier layer14, a pin layer18, and the pin layer electrode28. The low Young's modulus region29is a region haying Young's modulus less than those of the piezoelectric electrode24, the piezoelectric substance22, the free layer electrode26, the magnetoresistive layer20, and the pin layer electrode28, and is made of, for example, an air gap or an organic material such as resin or the like. The magnetoresistive layer20includes a free layer10, the tunnel barrier layer14, and the pin layer18.

The free layer10includes a ferromangetic layer12and a magnetostrictive layer11. The pin layer18includes a ferromagnetic layer16and a magnetization fixed layer17. The tunnel barrier layer14is sandwiched between the ferromagnetic layers12and16. The ferromagnetic lavers12and16are layers containing a ferromagnetic substance and having a high spin polarization. The magnetostrictive layer11contains a magnetostrictive material. The magnetostrictive material has the inverse magnetostrictive effect that the magnetic anisotropy inside the material changes when a pressure is applied. The magnetostrictive layer11is magnetically coupled to the ferromagnetic layer12. Thus, the magnetization directions of the magnetostrictive layer11and the ferromagnetic layer12are reversed all at once. The magnetization fixed layer17contains a hard magnetic material or antiferromagnetic substance having a volume greater than those of the ferromagnetic layers12and16. Thus, the magnetization direction of the magnetization fixed layer17is not easily reversed. The ferromagnetic layer16is magnetically coupled (for example, exchange coupling) to the magnetization fixed layer17. Thus, the magnetization direction of the ferromagnetic layer16is also difficult to reverse.

The free layer electrode26is electrically connected to the free layer10. The pin layer electrode28is electrically connected to the pin layer18. The piezoelectric substance22is dielectrically polarized in the +z direction as in a direction80of the dielectric polarization. When the piezoelectric electrode24applies a voltage to the piezoelectric substance22with respect to the free layer electrode26, the piezoelectric substance22applies a pressure to the magnetostrictive layer11. The direction of the pressure is in the +z direction. The resistance between the free layer electrode26and the pin layer electrode28of the magnetoresistive layer20varies depending on the magnetization direction of the ferromagnetic layer12. The magnetization direction of the ferromagnetic layer12is reversed by, for example, STT-CIMS.

In the first embodiment, the piezoelectric substance22applies a pressure to the magnetostrictive layer11by a voltage applied to the piezoelectric electrode24with respect to the free layer electrode26. The magnetization of the ferromagnetic layer12is reversed while the pressure is being applied. This reduces the threshold current density Jc for the magnetization reversal.

FIG. 2AandFIG. 2Bare diagrams for describing an operation in the first embodiment. A voltage applied from a terminal T1to the free layer10is represented by Vfree, a voltage applied from a terminal T2to the pin layer18is represented by Vpin, and a voltage applied from a terminal T3to the piezoelectric electrode24is represented by Vferr. The power source voltage is represented by VDD and a voltage for writing is represented by Vw (which is assumed to be a positive voltage, hereinafter). The state where the magnetization direction of the free layer10is parallel to that of the pin layer18is referred to as a parallel state, and the state where the magnetization direction of the free layer10is opposite to that of the pin layer18is referred to as err antiparallel state.

As illustrated inFIG. 2A, when the parallel state is rewritten to the antiparallel state, each voltage is configured as Vfree=0 V and Vpin=Vw. When Vferr=0 V. the magnetization direction of the free layer10is biased toward the antiparallel state by typical STT. In the first embodiment, Vferr is configured to be equal to VDD. The voltage VDD with respect to the terminal T1is applied to the piezoelectric electrode24. The piezoelectric substance22applies a pressure in the +z direction to the magnetostrictive layer11. When the magnetization direction is in the z direction and the magnetostrictive coefficient of the magnetostrictive layer11is positive, the magnetization easy plane of the magnetostrictive layer11is in an xy plane. Thus, the magnetization direction of the free layer10is reversed by small current, and becomes in the antiparallel state.

As illustrated inFIG. 2Bwhen the antiparallel state is rewritten to the parallel state, each voltage is configured as Vfree=Vw and Vpin=0 V. When Vferr=0 V, the magnetization direction of the free layer10is biased toward the parallel state by typical STT. In the first embodiment, Vferr is configured to be equal to VDD. The voltage VDD−Vw with respect to the terminal T1is applied to the piezoelectric electrode24. Here, Vw is set so that VDD−Vw>0 V. The piezoelectric substance22applies a pressure in the −z direction to the magnetostrictive layer11. Since the magnetization easy plane becomes in the xy plane, the magnetization direction of the free layer10is reversed by small current, and becomes in the parallel state.

InFIG. 2AandFIG. 2B, since the direction80of the dielectric polarization is in the +z direction, each voltage is set that Vferr is positive with respect to Vfree when the magnetization direction is reversed. When the direction80of the dielectric polarization is in the −z direction, each voltage is set so that Vferr is negative with respect to Vfree when the magnetization direction is reversed. As described above, it is only required that the piezoelectric substance is dielectrically polarized in the +z direction or the −z direction.

In the first embodiment, the magnetostrictive layer11is magnetically coupled to the ferromagnetic layer12. When the piezoelectric electrode24applies a voltage to the piezoelectric substance22, the piezoelectric substance22applies a pressure to the magnetostrictive layer11. Thus, the magnetostrictive layer11changes the direction of the magnetization easy axis thereof by the application of the pressure, and reverses the magnetization direction of the free layer10. Therefore, the current flowing through the magnetoresistive layer20when the magnetization direction of the free layer10is changed is reduced. Accordingly, the consumption energy is reduced.

As described in the first embodiment, when the piezoelectric substance22applies a pressure to the magnetostrictive layer11in the stacking direction, the support structure48(a support) supports the piezoelectric substance22and the magnetostrictive layer11from both sides in the stacking direction. This structure allows a pressure from the piezoelectric substance22to be applied efficiently to the magnetostrictive layer11. All sides in vertical and horizontal directions of the laminated body from the piezoelectric electrode24to the pin layer electrode28are preferably surrounded by the support structure48.

Second Embodiment

The first embodiment uses the support structure48because the piezoelectric substance22applies a pressure to the magnetostrictive layer11. In a second embodiment described hereinafter, the free layer10includes the magnetostrictive layer11made of a super magnetostrictive material. The magnetostrictive layer11is surrounded by the piezoelectric substance22. In this structure, a pressure is able to be applied to the magnetostrictive layer11from the piezoelectric substance22without using the support structure48made of a high yield strength material or the like. The pressure strains the magnetostrictive layer11. The inverse magnetostrictive effect changes the magnetic anisotropy inside the magnetostrictive layer11. The magnetization reversal operation at low voltage drive/low current density is achieved by combining the change of the magnetic anisotropy in the magnetostrictive layer11caused by the pressure and the spin-transfer-torque given to the magnetization by the spin polarized current flowing through the magnetoresistive element.

FIG. 3Ais a perspective view of a nonvolatile memory element in accordance with the second embodiment, andFIG. 3Bis a cross-sectional view. As illustrated inFIG. 3AandFIG. 3B, in a nonvolatile memory element100, the magnetoresistive layer20is a magnetic tunnel junction element and has a cylindrical shape. The central axis of the magnetoresistive layer20is defined as a z-axis, the radial direction is defined as r direction, the plane including the radial direction is defined as an xy plane, and the angle between the magnetization direction M of the free layer10and the z-axis is defined as θ.

The magnetoresistive layer20includes the free layer10, the tunnel barrier layer14, and the pin layer18. The free layer10includes the ferromagnetic layer12(a second ferromagnetic layer) and the magnetostrictive layer11. The pin layer18includes the ferromagnetic layer16(a first ferromagnetic layer) and the magnetization fixed layer17. The tunnel barrier layer14is sandwiched between the ferromagnetic layers12and16. The ferromagnetic layers12and16are layers containing a ferromagnetic substance and having a high spin polarization. The magnetostrictive layer11contains a niagnetostrictive material. The magnetostrictive material has the inverse magnetostrictive effect that the magnetic anisotropy inside the material changes when a pressure is applied. The magnetostrictive layer11is magnetically coupled to the ferromagnetic layer12. Accordingly, the magnetization directions of the magnetostrictive layer11and the ferromagnetic layer12are reversed all at once. The magnetization fixed layer17contains a hard magnetic material or antiferromagnetic substance having a volume greater than those of the ferromagnetic layers12and16. Accordingly, the magnetization direction of the magnetization fixed layer17is not easily reversed. The ferromagnetic layer16is magnetically coupled to the magnetization fixed layer17. Thus, the magnetization direction of the ferromagnetic layer16is also difficult to reverse.

The free layer electrode26is electrically connected to the free layer10. The pin layer electrode28is electrically connected to the pin layer18. The piezoelectric substance22surrounds the magnetoresistive layer20, and is dielectrically polarized in the −r direction as in the direction80of the dielectric polarization. The piezoelectric electrode24is located so as to surround the piezoelectric substance22. When the piezoelectric electrode24applies a voltage to the piezoelectric substance22, the piezoelectric substance22applies, a pressure to the magnetostrictive layer11. The direction of the pressure is in the −r direction. InFIG. 3AandFIG. 3B, the piezoelectric substance22applies a pressure to the magnetoresistive layer20. However, it is only required that the piezoelectric substance22applies a pressure to at least the magnetostrictive layer11.

FIG. 4AandFIG. 4Bare diagrams for describing an operation in the second embodiment. A voltage applied from the terminal T1to the free layer10is represented by Vfree, a voltage applied from the terminal T2to the pin layer18is represented by Vpin, and a voltage applied from the terminal T3to the piezoelectric electrode24is represented by Vferr. The power source voltage is represented by VDD, and a voltage for writing is represented by Vw (which is assumed to be a positive voltage, hereinafter). The state where the magnetization direction of the free layer10is parallel to that of the pin layer18is referred to as a parallel state, and the state where the magnetization direction of the free layer10is opposite to that of the pin layer18is referred to as an antiparallel state.

As illustrated inFIG. 4A, when the parallel state is rewritten to the antiparallel state, each voltage is configured as Vfree=0 V and Vpin=Vw. When Vferr=0 V, the magnetization direction of the free layer10is biased toward the antiparallel state by typical STT. The second embodiment configures Vferr to be equal to VDD. The voltage VDD with respect to the terminal T1is applied to the piezoelectric electrode24. The piezoelectric substance22applies a pressure in the −r direction to the magnetosnictive layer11. When the magnetization direction is in the z direction and the magnetostrictive coefficient of the magnetostrictive layer11is negative, the magnetization easy plane of the magnetostrictive layer11becomes in the xy plane. Thus, the magnetization direction of the free layer10is reversed by small current, and becomes in the antiparallel state.

As illustrated inFIG. 4B, when the antiparallel state is rewritten to the parallel state, each voltage is configured as Vfree=VW and Vpin=0 V. When Vferr=0 V, the magnetization direction of the free layer10is biased toward the parallel state by typical STT. The second embodiment configures Vferr to be equal to VDD. The voltage VDD−Vw with respect to the terminal T1is applied to the piezoelectric electrode24. Here, Vw is set so that VDD−Vw>0 V. The piezoelectric substance22applies a pressure in the −r direction to the magnetostrictive layer11. Since the magnetization easy plane becomes in the xy plane, the magnetization direction of the free layer10is reversed by small current, and becomes in the parallel state.

FIG. 5AandFIG. 5Bare diagrams for describing another operation in the second embodiment. As illustated inFIG. 5A, the operation for rewriting the parallel state to the antiparallel state is the same as that of theFIG. 4A. As illustrated inFIG. 5B, each voltage is configured as Vfree=0 V, Vpin=−VW, and Vferr=VDD. The voltage of the free layer10becomes positive with respect to the pin layer18, and Vferr becomes VDD with respect to Vfree. Thus, the antiparallel state is rewritten to the parallel state. InFIG. 5B, VDD may be less than Vw unlikeFIG 4B.

InFIG. 4AthroughFIG. 5Bwhen the magnetization direction of the free layer10is not reversed, for example, each voltage is configured as Vfree=Vpin=Vferr (for example, 0 V). This configuration allows the magnetization direction of the free layer10to be maintained.

InFIG. 4AthroughFIG. 5B, since the direction80of the dielectric polarization is in the −r direction, each voltage is set so that Vferr is positive with respect to Vfree when the magnetization direction is reversed. When the direction80of the dielectric polarization is in the +r direction, each voltage is set so that Vferr is negative with respect to Vfree when the magnetization direction is reversed. As described above, when the piezoelectric electrode24is located so as to surround the piezoelectric substance22, it is only required that the piezoelectric substance22is dielectrically polarized in the −r direction (i.e., the direction from the piezoelectric electrode24to the magnetostrictive layer11) or the +r direction (i.e., the direction from the magnetostrictive layer11to the piezoelectric electrode24).

FIG. 6Ais a perspective view of a nonvolatile memory element in accordance with a first variation of the second embodiment, andFIG. 6Bis a cross-sectional view. As illustrated inFIG. 6AandFIG. 6B, in a nonvolatile memory element101, the direction80of the dielectric polarization of the piezoelectric substance22is in the +z direction. Piezoelectric electrodes24aand24bare located so as to face the piezoelectric substance22in the z direction. The application of a positive voltage with respect to the piezoelectric electrode24ato the piezoelectric electrode24ballows the piezoelectric substance22to apply a pressure in the −r direction to the magnetostrictive layer11. Other configurations are the same as those of the second embodiment illustrated inFIG. 4AandFIG. 4B, and the description thereof is thus omitted.

FIG. 7AandFIG. 7Bare diagrams for describing an operation in the first variation of the second embodiment. A voltage applied from a terminal T3ato the piezoelectric electrode24ais represented by Vferr2, and a voltage applied from a terminal T3bto the piezoelectric electrode24bis represented by Vferr1. As illustrated inFIG. 7A, when the parallel state is rewritten to the antiparallel state, each voltage is configured as Vfree=0 V, Vpin=Vw, Vferr1=VDD, and Vferr2=0 V. This configuration causes the piezoelectric substance22to apply a pressure in the −r direction to the magnetostrictive layer11. Thus, as inFIG. 4A, the parallel state transitions to the antiparallel state.

As illustrated inFIG. 7B, when the antiparallel state is rewritten to the parallel state, each voltage is configured as Vfree=Vw, Vpin=0 V, Vferr1=VDD, and Vferr2=0 V. This configuration causes the antiparallel state to transition to the parallel state as inFIG. 4B.

FIG. 8AandFIG. 8Bare diagrams for describing another operation in the first variation of the second embodiment. As illustrated inFIG. 8A, the operation for rewriting the parallel state to the antiparallel state is the same as that ofFIG. 7A. As illustrated inFIG. 8B, when the antiparallel state is rewritten to the parallel state, each voltage is configured as Vfree=Vw, Vpin=0 V, Vferr1=VDD, and Vferr2=Vw. When the voltage VW is set so that VDD−Vw>0 V, the piezoelectric substance22applies a pressure in the −r direction to the magnetostrictive layer11. Thus, the antiparallel state is rewritten to the parallel state.

As illustrated inFIG. 7AthroughFIG. 8B, when the magnetization direction of the free layer10is not reversed, each voltage is configured as, for example, Vfree=Vpin=Vferr1=Vferr2(for example, 0 V). This configuration allows the magnetization direction of the free layer10to be maintained.

InFIG. 7AthroughFIG. 8B, since the direction80of the dielectric polarization is in the +z direction, when the magnetization direction is reversed, each voltage is set so that Vferr1is positive with respect to Vferr2. When the direction of the dielectric polarization is in the −z direction and the magnetization direction is reversed, each voltage is set so that Vferr1is negative with respect to Vferr2. As described above, when a plurality of the piezoelectric electrodes24aand24bare provided in the z direction (in the direction in which the magnetostrictive layer11and the ferromagnetic layer12are stacked), it is only required that the piezoelectric substance22is dielectrically polarized in the +z direction or the z direction.

FIG. 4AthroughFIG. 5BandFIG. 7AthroughFIG. 8Bdescribe a peipendicular magnetization type in which the magnetization directions of the free layer10and the pin layer18are in the z direction, but in the in-plane magnetization type in which the magnetization directions of the free layer10and the pin layer18are in the xy plane, the magnetostrictive coefficient of the niagnetostrictive layer11is set negative. This setting achieves the same operation as those ofFIG. 4AthroughFIG. 5BandFIG. 7AthroughFIG. 8B.

The second embodiment was simulated. The value of the bulk was used for the physical property of each material used in the simulation. The pressure applied to the magnetoresistive layer20by the piezoelectric substance22with respect to the voltage Vferr was simulated.

FIG. 9Ais a diagram illustrating dimensions used in the simulation of the second embodiment, and FIG.9B is a graph of pressure versus Vferr in the second embodiment. As illustrated inFIG. 9AandFIG. 9B, for the piezoelectric substance22, the width t0in the r direction was assumed to be 10 nm, the width w0in the z direction was assumed to be 10 nm, Young's modulus EPEwas assumed to be 60 GPa, and the Poisson ratio νPEwas assumed to be 0.3. For the magnetoresistive layer20, the width w in the z direction was assumed to be 10 nm, the radius R was assumed to be 10 mn, and Young's modulus EMTJwas assumed to be 40 GPa.

As illustrated inFIG. 9B, when Vfree=Vpin=0 V and Vferr is applied, the pressure P in the −r direction increases. When Vferr is 0.1V, the pressure P is approximately 0.2 GPa or greater. When Vferr is 0.5V, the pressure P is 1 GPa or greater.

The angle θ dependence of the magnetization direction of the magnetization energy was then simulated under the assumption that the magnetostrictive layer11is formed of a SmFe2thin film that is a super magnetostrictive material.FIG. 10Ais a diagram illustrating dimensions of the magnetostrictive layer used in the simulation of the second embodiment, andFIG. 10Bis a graph of magnetization energy per unit volume versus the inclination angle θ of the magnetization direction in the second embodiment.

As illustrated inFIG. 10AandFIG. 10B, the diameter 2R of the magnetostrictive layer11was assumed to be 20 nm, the filum thickness w1in the z direction was assumed to be 2 mn, and the inclination angle θ from the z-axis of the magnetization direction M was varied from 0° to 180°. The pressure P in the −r direction applied to the magnetostrictive layer11was varied from 0 GPa to 0.5 GPa by 0.05 GPa increments. The perpendicular magnetic anisotropy constant of SmFe2was set so that the magnetization retaining characteristic for ten years is achieved at the pressure P=0. The values of the bulk are used for the saturation magnetization and the magnetostrictive coefficient of SmFe2. The magnetostrictive layer11was assumed to be an isotropic magnetostrictive film in which the magnetostrictive coefficient is the same in all directions.

As illustrated inFIG. 10B, when the pressure P is 0 GPa, the easy axis of the magnetic anisotropy is in the z direction. That is, when the angle θ is 0° and 180°, the magnetization energy has the local minimum, while when the angle is 90°, the magnetization energy has the local maximum. The magnetization energy difference between the local minimum and the local maximum corresponds to an energy barrier height Eb. When the pressure P is 0 GPa, the barrier height Eb is 80 kBT. In the barrier height Eb, when the magnetization direction M is in the +z direction or the −z direction, the magietization direction is retained for about 10 years.

As the pressure P increases, the magnetic anisotropy energy in the xy plane increases. That is, the magnetization energy when the angle θ is 0° and 180° increases, and the magnetization energy when the angle is 90° decreases. Thus, the harrier height Eb decreases. When the pressure P is 0.2 GPa or greater, the easy plane of the magnetic anisotropy is in the xy plane. That is, when the angle θ is 0° and 180°, the magnetization energy has the local maximum, while when the angle is 90°, the magnetization energy has the local minimum. When the magnetization easy plane is in the xy plane, the reversal of the magnetization direction becomes easy. FromFIG. 9B, the pressure P may be set to 0.2 GPa at Vferr=0.1 V.

Then, the magnetization reversal operation and the STT current density of the free layer in accordance with the second embodiment were simulated with use of the Landau-Lifshitz-Gilbert (LLG) equation. The simulation was conducted under the assumption that the magnetostrictive layer11is made of SmFe2and is a single layer.

FIG. 11is a graph of pulse waveforms of the current density J and the pressure P and the magnetization direction Mz versus time in the second embodiment. The application of voltages Vpin and Vfree causes the current density J to flow through the magnetoresistive layer20so that the magnetization direction Mz is reversed. The pressure P is a pressure applied to the magnetostrictive layer11in the −r direction by the piezoelectric substance22. For the magnetization direction Mz the +z direction is represented by 1, the −z direction is represented by −1, and the r direction is represented by 0.

At time t=0, the current density J=0.125 MA/cm2and the pressure P=0.31 GPa are simultaneously applied. At time t=8 ns, the pressure P is set to 0, and at time t=10 ns, the current density J is set to 0.

When the pressure P is applied, the magnetization easy plane becomes in the xy plane, and the damping effect that biases the magnetization direction Mz toward the xy plane occurs. When the current density J is applied, the STT current causes the STT effect that the magnetization direction Mz is biased toward reversal. Because of these effects, the magnetization direction Mz becomes approximately 0 between t=0 and 8 ns. The magnetization is subject to a torque in the −z direction because of the STT effect. Thus, the magnetization direction Mz becomes stable at a side slightly negative from 0.

At time t=8 ns, when the pressure P is set to 0, the magnetization easy axis becomes in the z-axis. The damping direction is in a direction in which the magnetization direction Mz is directed in the −z direction, and the magnetization direction Mz becomes −1. As described above, the magnetization of the free layer10is reversed.

The threshold current density Jc with respect to the pressure P was simulated. Here, the threshold current density Jc was defined as follows. The pressure P and the current density J are applied to the magnetoresistive layer20of which the magnetization direction is in the +z direction to reverse the magnetization. The angle θ of the magnetization direction immediately before the pressure P and the current density J are set to 0 is represented by θ1. The angle θ1is an angle that does not exceed the energy burner necessary for the magnetization direction to return to the +z direction even when the fluctuation due to the thermal energy kBT is applied after the pressure P is set to 0. The minimum current density J capable of achieving the angle θ1within a pulse applying time is defined as the threshold current density Jc. The magnetization is reversed by applying a current density equal to or greater than the threshold current density Tc to the magnetoresistive layer20even when the magnetization direction fluctuates due to heat.

FIG. 12is a graph of threshold current density Jc versus pressure in the second embodiment. The pulse width of the current density J applied to the magnetoresistive layer20was set to 10 ns, and the pulse width of the pressure P applied to the magnetostrictive layer11by the piezoelectric substance22was set to 8 ns. The physical property and dimensions of each material are the same as those in the simulations described above.

As the pressure P increases from 0, the threshold current density Jc decreases. When the pressure P is 0.31 GPa, the threshold current density Jc has the minimum value. The minimum threshold current density Jc is 0.125 MA/cm2. This value is approximately 1/20 of the value at the pressure P of 0. When the margin for the fluctuation due to heat is assumed to be small (i.e., when the angle θ1is made to be small), the minimum value of the threshold current density Jc is further reduced. In addition, the pulse shapes and the control methods of the applied current density J and the applied pressure P are improved, the minimum threshold current density Jc is yet further reduced.

FIG. 13Ais a graph of consumption energies of the MTJ and the PE versus pressure P in the second embodiment, andFIG. 13Bis a graph of the consumption energy of MTJ+PE versus pressure P. The MTJ is the energy consumed in the magnetoresistive layer20, and is mainly due to the applied current density J. The PE is the energy consumed in the piezoelectric substance22, and is mainly due to the applied pressure P.

As illustrated inFIG. 13A, as the pressure increases, the consumption energy of the MTJ decreases and the consumption energy of the PE increases. The consumption energy of the PE is less than the consumption energy of the MTJ by more than ten orders, and negligible. As illustrated inFIG. 13B, the consumption energy of the whole of the nonvolatile memory element100(the consumption energy of MTJ+PE) is approximately equal to the consumption energy of the MTJ. The application of pressure reduces the whole consumption energy by more than two orders.

Vferr for causing the pressure to be 0.31 GPa at which the consumption energy has the minimum value is approximately 0.13 V. As described above, the application of a slight voltage to the piezoelectric electrode24reduces the consumption energy of the nonvolatile memory element100. The description is given by using the second embodiment as an example, but the consumption energy is also reduced in the same manner in the first variation of the second embodiment.

In the second embodiment and the first variation thereof, the magnetostrictive layer11is magnetically coupled to the ferromagnetic layer12. When the piezoelectric electrode24applies a voltage to the piezoelectric substance22, the piezoelectric substance22applies a pressure to the magnetostrictive layer11. Accordingly, the magnetostrictive layer11changes the direction of the magnetization easy axis thereof by the application of the pressure, thereby reversing the magnetization direction of the free layer10. For example, the magnetization direction of the free layer10is reversed by spin-transfer-torque current-induced magnetization switching when the magnetization easy direction of the magnetostrictive layer11changes. Thus, the current flowing through the magnetoresistive layer20when the magnetization direction of the free layer10is changed is reduced. Therefore, the consumption energy is reduced. The magnetization direction of the free layer10may be changed by a method other than spin-transfer-torque current-induced magnetization switching.

In addition, the piezoelectric substance22is located so as to surround the magnetostrictive layer11from a direction intersecting with the z direction. This structure makes the piezoelectric substance22surround the magnetostrictive layer11and apply a pressure to the magnetostrictive layer11from the periphery. The piezoelectric substance22is preferably located so as to surround the magnetostrictive layer11from all the directions perpendicular to the z direction. The piezoelectric substance22may be located so as to surround the magnetostrictive layer11from part of the directions perpendicular to the z direction.

A case where the magnetoresistive layer20has a cylindrical shape and the piezoelectric substance22has a ring shape are described, but the shapes of the magnetoresistive layer20and the piezoelectric substance22are not limited to these shapes. For example, the magnetoresistive layer20may be a polygonal column such as a square pillar. Additionally, the corner of the polygonal column may be rounded. To uniformly apply a pressure to the magnetoresistive layer20, the magnetoresistive layer20and the piezoelectric substance22are preferably rotationally symmetric with respect to the z-axis.

An air gap or an insulator may be located between each layer other than the magnetostrictive layer11of the magnetoresistive layer20and the piezoelectric substance22. When Young's modulus of the insulator is less than that of the magnetostrictive layer11, a pressure applied to each layer other than the magnetostrictive layer11from the piezoelectric substance22is reduced. The width in the z direction of the piezoelectric substance22is preferably greater than the width in the z direction of a layer to which the piezoelectric substance22applies a pressure. For example, when the piezoelectric substance22applies a pressure to all the layers of the magnetoresistive layer20, the width w in the z direction of the piezoelectric substance22is greater than the width w0in the z direction of the magnetoresistive layer20. This structure allows a pressure to be uniformly applied to the magnetoresistive layer20.

In the second embodiment and the first variation thereof, gaps are formed between the free layer electrode26and the piezoelectric substance22and between the pin layer electrode28and the piezoelectric substance22. When the free layer electrode26and the pin layer electrode28have small Young's modulus (for example, Young's modulus less than that of the magnetoresistive layer20), the free layer electrode26and the pin layer electrode28may be in contact with the piezoelectric substance22.

FIG. 14AandFIG. 14Bare cress-sectional views of a nonvolatile memory element in accordance with a second variation of the second embodiment.FIG. 15is a cross-sectional view of the nonvolatile memory element in accordance with a first variation of the first embodiment. As illustrated inFIG. 14AthroughFIG. 15, in nonvolatile memory elements100a,101a, and110a, a non-magnetic metal layer14aas a thin film is located between the free layer10and the pin layer18. The magnetoresistive layer20is a giant magneto resistance (GMR) element. Other structures are the same as those illustrated inFIG. 3B,FIG. 6B, andFIG. 1, and the description thereof is thus omitted. As described above, the magnetoresistive layer20may be a magnetic tunnel junction element or a giant magneto resistance element. In the magnetic tunnel junction element, the thin film located between the free layer10and the pin layer18is a tunnel barrier insulating layer. In the giant magneto resistance element, the thin film is a non-magnetic metal layer.

In the first and second embodiments and the variations thereof, the magnetostrictive material constituting the magnetostrictive layer11has the inverse magnetostrictive effect that the magnetic anisotronic energy inside the material changes when a pressure is applied. The magnetostrictive layer11is preferably made of a super magnetostrictive material having a magnetostrictive coefficient of which the absolute value is large. The magnetostrictive layer11may be made of SmFe2, SmFeN, SinFeB, or CoFe2O4as a material having a negative magnetostrictive coefficient. Terfenol-D or Gerfenol-G may be used as a material having a positive magnetostrictive coefficient. In the first embodiment, the piezoelectric substance22applies a pressure to the magnetostrictive layer11in the z direction. Thus, for the perpendicular magnetization type in which the magnetization direction of the ferromagnetic layer12is in the z-axis direction, the magnetostrictive coefficient is preferably positive, while for the in-plane magnetization in which the magnetization direction of the ferromagnetic layer12is in the xy plane, the magnetostrictive coefficient is preferably positive. In the second embodiment and the variations thereof, the piezoelectric substance22applies a pressure to the magnetostrictive layer11in the −r direction. Thus, for the perpendicular magnetization type in which the magnetization directions of the ferromagnetic layers12and16are in the z direction, the magnetostrictive coefficient is preferably negative, while for the in-plane magnetization type in which the magnetization directions of the ferromagnetic layers12and16are in the xy plane, the magnetostrictive coefficient is preferably positive.

A full Heusler alloy such as Co2Fe(Si, Al), Co2MnSi, or Co2(Fe, Mn), a ferromagnetic transition metal such as Fe, Co, or CoFeB or a ferromagnetic transition metal compound are used as the ferromagnetic material constituting the ferromagnetic layers12and16.

Used for the tunnel harrier layer14is a non-magnetic insulating film made of, for example, MgO, AlOx, TiOx, or the like. Used as the non-magnetic metal layer14ais Ag, Cu, Cr or Au. The free layer electrode26, the pin layer electrode28, and the piezoelectric electrode24are made of a non-magnetic metal such as, for example, Ag, Cu, Cr or Au. The magnetostrictive layer11may serve for the free layer electrode26, and the magnetization fixed layer17may serve for the pin layer electrode28.

The piezoelectric substance22is made of a material having the inverse piezoelectric effect that the material is mechanically deformed depending on an applied voltage. An ABC3type perovskite structured material presented as follows may be used as the material for the piezoelectric substance22.(Ph, M1)(Ti, M2)O3,(Bi, M1)(Zn, Ti, M2)O3,(Bi, M1)(Na, Ti, M2)O3,(K, M1)(Nb, M2)O3,(Li, M1)(Nb, M2)O3,(Li, M1)(Ta, M2)O3.
or(Na, M1)(Nb, M2)O3
Here, M1 is Li, Ca, Ba, Sr, Bi, Pb or lanthanoid of which the valence is univalent to tervalent. M2 is Zr, Hf, Mg/Nb, Mg/Ta, In/Sc, or the like of which the valence is bivalent to sexivalent. The following material is used as a material other than the perovskite structured material.(Hf, M3)O2
Here, M3 is Sr, Si, Ba, Ca, Mg, Zr, Ce, Ti, Ge, Sn, Ta, or lanthanoid. As the material for the piezoelectic substance22, typically used is lead zirconate titanate (PZT), strontium doping lead zirconate titanate (PSZT), magnesium niobate-lead titanate (PMT-PT), or zinc niobate-lead titanate (PZN-PT).

As the support structure48of the first embodiment, used is, for example, silicon nitride.

The magnetostrictive layer11, the ferromagnetic layers12and16, the tunnel barrier layer14, the magnetization fixed layer17, the piezoelectric substance22, the piezoelectric electrode24, the free layer electrode26, and the pin layer electrode28are formed by, for example, sputtering or chemical vapor deposition (CVD).

The MTJ element and the GMR element, which are two-terminal elements, are described as an example of the magnetoresistive element, but it is only required that the magnetoresistive element has a free layer. For example, the free layer and the piezoelectric substance of the first and second embodiments and the variations thereof may be used for the spin transistor.

Third Embodiment

A third embodiment is an exemplary MRAM using the nonvolatile memory element in accordance with the first and second embodiments and the variations thereof as the memory circuit.FIG. 16is a block diagam of an MRAM in accordance with the third embodiment. As illustrated inFIG. 16, an MRAM102includes a memory region42, a controller45, and drivers44and46. In the memory region42, a plurality of memory cells40are arranged in matrix. The memory cells40arranged in the line direction are coupled to a bit line BL and a source line SL extending in the line direction. The memory cells40arranged in the column direction are coupled to a word line WL extending in the column direction. Although it is not illustrated, an SE line described later extends in the column direction or the line direction. The drivers44and46select a column and a line under the instruction of the controller45, and applies a signal such as a voltage to the word line WL, the bit line BL, the source line SL, and the SE line. This operation causes one memory cell40to be selected. Data is read from/written in the memory cell40by a read circuit and a write circuit, which are not illustrated, under the instruction of the controller45.

FIG. 17AthroughFIG. 17Care circuit diagrams illustrating examples of the memory cell in the third embodiment. F represents a free layer, while P represents a pin layer. As illustrated inFIG. 17Athe memory cell40includes a nonvolatile memory element30and a field effect transistor (FET)34. The FET34is an N-channel metal oxide semiconductor (MOS) FET. The nonvolatile memory element30is the nonvolatile memory element of the first and second embodiments. A free layer side terminal31coupled to the free layer corresponds to the terminal T1in the first and second embodiments, and a pin layer side terminal32coupled to the pin layer corresponds to the terminal T2in the first and second embodiments. An electrode33illustrated at the sides of the free layer F and the pin layer P corresponds to the piezoelectric electrode24. The terminals T1and T2may be reversely coupled.

The terminal31of the nonvolatile memory element30is coupled to the drain of the FET34. The terminal32is coupled to the bit line BL. The electrode33is coupled to the SE line. The SE line extends in parallel to the word lisle WL in the inside of the memory region42. Write to the memory cell40corresponds to the magnetization reversal of the nonvolatile memory element30. At the time of writing to the memory cell40, the controller45causes the driver46to apply the voltage Vw to one of the bit line BL and the source line SL and 0 V to the other. The controller45causes the driver44to apply the voltage VDD to the word line WL and the SE line. This control reverses the magnetization direction of the free layer10in the nonvolatile memory element30as described inFIG. 4AandFIG. 4B, thereby causing the write to the memory cell40. Write is possible when the controller45causes the drivers44and46to apply a voltage to each line as described inFIG. 5AandFIG. 5B.

As illustrated inFIG. 17B, the SE line may be parallel to the bit line BL. In this example, the driver46applies a voltage to the SE line. Other structures are the same as those ofFIG. 17A, and the description thereof is thus omitted.

InFIG. 17AandFIG. 17B, a voltage is applied to the piezoelectric substances22of the memory cells40coupled to the SE line identical to the selected SE line. Accordingly, a pressure is applied to the magnetostrictive layers11of these memory cells40. This phenomenon is referred to as a pressure disturb. The magnetic anisotropy of the free layer10of the memory cell40subject to the pressure disturb becomes in the xy plane direction. Although the current density J is not applied in this memory cell40, the magnetization direction of the free layer10may become in the xy plane. Then, after the pressure P becomes 0, the magnetization direction of the free layer10may reverse. If it happens, erroneous write occurs.

FIG. 17Cillustrates an exemplary memory cell that inhibits the pressure disturb. As illustrated inFIG. 17C, the memory cell40includes an FET38. The FET38is au N-channel MOSFET. The source of the FET38is coupled to the electrode33, the drain is coupled to an SE2line, and the gate is coupled to an SE1line. The SE1line extends in parallel to the word line WL, and the SF2line extends in parallel to the bit line BL. The drivers44and46select the SE1line and the SE2line of the memory cell40subject to write, and applies the voltage VDD thereto. Accordingly, a voltage is applied to the piezoelectric substance22of only the selected memory cell40. Therefore, the pressure disturb is inhibited. Other structures are the same as those ofFIG. 17A, and the description thereof is thus omitted.

FIG. 18AthroughFIG. 18Care circuit diagrams illustrating other examples of the memory cell in the third embodiment. The nonvolatile memory element30is the nonvolatile memory element of the first variation of the second embodiment. As illustrated inFIG. 18A, the nonvolatile memory element30includes electrodes35and36. The electrodes35and36respectively correspond to the piezoelectric electrodes24aand24bof the variation of the second embodiment. The electrodes35and36are respectively coupled to the SE2line and the SE1line. The SE1line and the SE2line extend in parallel to the word line WL. At the time of writing to the memory cell40, the controller45causes the driver46to apply the voltage Vw to one of the bit line BL and the source line SL and 0 V to the other. The controller45causes the driver44to apply the voltage VDD to the word line WL and the SE1line and 0 V to the SE2line. This control reverses the magnetization direction of the free layer10in the nonvolatile memory element30as described inFIG. 7AandFIG. 7B, thereby causing the write to the memory cell40. The write is also possible when the controller45causes the drivers44and46to apply a voltage to each line as described inFIG. 8AandFIG. 8B.

As illustrated inFIG. 18B, the SE1line and the SE2line may be parallel to the bit line BL. In this example, the driver46applies voltages to the SE1line and the SE2line. Other structures are the same as those ofFIG. 18A, and the description thereof is thus omitted. The SE1line and the SE2line may be arranged so as to intersect with each other.

As illustrated inFIG. 18C, the source of the FET38is coupled to the electrode36, the drain is coupled to the SE1line, and the gate is coupled to an SE3line. The SE1line and the SE2line extend in parallel to the bit line BL, and the SE3line extend in parallel to the word line WL. The controller45causes the drivers44and46to select the SE1line and the SE3line of the memory cell40subject to write, apply the voltage VDD to the selected SE1line and the selected SE3line, and apply 0 V to the SE2line. Accordingly, a voltage is applied to the piezoelectric substance22of only the selected memory cell40. Therefore, the pressure disturb is inhibited. Other structures are the same as those ofFIG. 18B, and the description thereof is thus omitted.

In the third embodiment, one of the free layer10and the pin layer18is coupled to the bit line BL. The FET34is coupled to the other of the free layer10and the pin layer18. The other of the free layer10and the pin layer18is coupled to the source line SL through the FET34. The gate of the FET34is coupled to the word line WL. The SE line, the SE1line and the SE2line, or the SE1line through the SE3line (control lines) are coupled to the piezoelectric electrode24or24aand24b. This structure enables to apply the nonvolatile memory element of the second embodiment and the variations thereof to the MRAM. Therefore, the consumption energy of the MRAM is reduced. It is only required that the FET34is a switch of which the word line WL is coupled to a control terminal.

FIG. 19andFIG. 20are cross-sectional views illustrating the case where the nonvolatile memory element (magnetoresistive element) of the first embodiment is used for the memory cell illustrated inFIG. 17Aof the third embodiment.FIG. 19is a cross-sectional view taken along line B-B inFIG. 20, andFIG. 20is a cross-sectional view taken along line A-A inFIG. 19. InFIG. 19, wiring lines corresponding to the bit line BL and the SE line and vias and a via connecting the free layer electrode26to the FET38are not present in the cross section taken along line B-B, but indicated by dashed lines.

As illustrated inFIG. 19andFIG. 20, the nonvolatile memory element30is formed between interlayer insulating films85, and the FET34is formed on a semiconductor substrate94that is a silicon substrate. The interlayer insulating films85are stacked on the semiconductor substrate94. The support structure48is formed in the interlayer insulating film85. The low Young modulus region29is formed in the support structure48. The piezoelectric electrode24, the piezoelectric substance22, the free layer electrode26, the magnetoresistive layer20, and the pin layer electrode28are formed in the low Young's modulus region29.

A shallow trench isolation (STI) oxide film81is formed on the semiconductor substrate94. A source region86aand a drain region86bare formed in a region surrounded by the oxide film81in the semiconductor substrate94. A gate electrode87is formed on a channel region, which is located between the source region86aand the drain region86b,through a gate oxide film88. Side walls98of insulation are formed at both sides of the gate electrode87. The source region86a, the drain region86b,and the gate electrode87are respectively coupled to via83,83aand83bthrough a metal silicide film89.

A wiring line84corresponding to the bit line BL is coupled to the pin layer electrode28through a via83c.The wiring line84corresponding to the SE line is coupled to the piezoelectric electrode24through a via83d.The wiring line84corresponding to the source line SL is coupled to the source region86athrough the via83. The free layer electrode26is coupled to the drain region86bthrough the via83a.

As described above, the support structure48is formed in the interlayer insulating film85, and the nonvolatile memory element30is located in the support structure48. This structure integrates the FET38and the nonvolatile memory element30. To efficiently apply the pressure of the piezoelectric substance22to the magnetostrictive layer11, the piezoelectric electrode24through the pin layer electrode28are sandwiched between the support structures48and supported by the support structures48. To efficiently apply the pressure of the piezoelectric substance22to the magnetostrictive layer11, Young's modulus of the free layer electrode26is preferably large (for example, is greater than that of the magnetostrictive layer11), and Young's modulus of the via83ais preferably less than that of the free layer electrode26. The side surface of the via83ais preferably covered with an insulating film27made of a material having Young's modulus that is less than that of the via83a. The support structure48may be formed only around the nonvolatile memory element30, or may be formed across the entire face as illustrated inFIG. 19andFIG. 20.

FIG. 21is a cross-sectional view in the case where the nonvolatile memory element of the first variation of the second embodiment is used for the memory cell illustrated inFIG. 18Aof the third embodiment. As illustrated inFIG. 21, the layer of the piezoelectric substance22is formed in the interlayer insulating film85. The magnetoresistive layer20is embedded in the piezoelectric substance22. The piezoelectric electrodes24band24aare formed on the upper and lower surfaces of the piezoelectric substance22so as to surround the magnetoresistive layer20. The wiring line84corresponding to the SE1line is coupled to the piezoelectric electrode24bthrough the via83d. The wiring line84corresponding to the SE2line is coupled to the piezoelectric electrode24a. The magnetoresistive layer20is coupled to the drain region86bthrough the via83and the metal silicide film89. Other structures are the same as those ofFIG. 19andFIG. 20, and the description thereof is thus omitted.

FIG. 22is a perspective view in which the magnetoresistive layers are arranged in the piezoelectric substance. The piezoelectric substance22, the magnetoresistive layer20, the piezoelectric electrodes24aand24b,and the via83are illustrated. As illustrated inFIG. 22, the magnetoresistive layers20may be arranged in the sheet-like piezoelectric substance22. This structure enables to efficiently integrate the memory cells40.

As described above, when the piezoelectric substance22is formed in a sheet-like shape in the interlayer insulating film85, the FET38and the nonvolatile memory element30are integrated. The low Young's modulus region29for reducing the pressure is preferably located above or below the piezoelectric substance22. The piezoelectric substance22may be formed only around the nonvolatile memory element30, or may be formed across the entire face as illustrated inFIG. 21.

The memory cell40of the third embodiment is able to be formed by using the nonvolatile memory element of other than the first embodiment and the first variation of the second embodiment.

Fourth Embodiment

A forth embodiment is an exemplary electronic device using the nonvolatile memory element of the first and second embodiments and the variations thereof and a wire FET.FIG. 23is a perspective view of an electronic device in accordance with the fourth embodiment. As illustrated mFIG. 23, in an electronic device105, a wire FET50is coupled to the nonvolatile memory element100in accordance with the second embodiment. The wire FET50includes a channel51, a gate insulating film52, a gate55, a source56, and a drain58. The channel51is made of a semiconductor such as silicon. The gate insulating film52is an insulating film made of silicon oxide or the like. The gate55includes a polysilicon layer53and a metal layer54. The source55and the drain58are metal layers.

The channel51, the source56, and the drain58have cylindrical shapes. The drain58is coupled to the free layer10. The channel51is located between the source56and the drain58. The gate insulating film52is located so as to surround the channel51. The gate55is located so as to surround the gate insulating film52. The structure of a transistor such as the FET using a nanowire as the channel51is similar to that of the nonvolatile memory element100. For example, the source56, the channel51, and the drain58are stacked in the direction in which the free layer10, the tunnel barrier layer14, and the pin layer18are stacked (the z direction). The gate55surrounds a part of the channel51from the direction intersecting with the z direction (for example, the −r direction). Thus, the occupancy area is reduced by stacking the nonvolatile memory element100and the wire FET50. It is only required that one of the source56and the drain58is coupled to one of the free layer10and the pin layer18. The nonvolatile memory element100may be the nonvolatile memory element101of the first and second variations of the second embodiment.

A first variation of the fourth embodiment uses a piezoelectronic transistor (PET) instead of the wire FET. The PET is a transistor including a piezoelectric substance having a large piezoelectric effect and a piezoresistor having a piezo resistance effect that causes metal-insulator transition by pressure.FIG. 24is a perspective view of an electronic device in accordance with the first variation of the fourth embodiment. As illustrated inFIG. 24, in an electronic device106, a PET60includes a piezoresistor61, a piezoelectric substance62, a gate electrode64, a source66, and a drain68. The piezoresistor61, the source66, and the drain68have cylindrical shapes. The gate includes the piezoelectric substance62and the gate electrode64. The piezoelectric substance62surrounds the piezoresistor61. A direction82of the dielectric polarization of the piezoelectric substance62is in the −r direction. The gate electrode64surrounds the, piezoelectric substance62. The source66and the drain68are located at both sides of the piezoresistor61in the z direction. The gate includes the piezoelectric substance62that applies a pressure to the piezoresistor61from the −r direction.

In the PET60, when a positive voltage with respect to the source66is applied to the gate electrode64, the piezoelectric substance62applies a pressure in the −r direction to the piezoresistor61. This causes the piezoresistor61to transition to a metallic phase. Thus, carriers conduct from the source66to the drain68. When no voltage is applied between the gate electrode64and the source66, no pressure is applied to the piezoresistor61, and the piezoresistor61becomes in an insulator phase. Accordingly the conduction of carriers from the source66to the drain68is blocked. Since the piezoelectric substance52surrounds the piezoresistor61from the −r direction, the piezoelectric substance62efficiently applies a pressure to the piezoresistor61. In the piezoresistor61, since the metallic phase and the insulator phase are switched, a large on/off current ratio is obtained.

The PET60has a structure similar to that of the nonvolatile memory element100. Thus, the occupancy area is reduced by stacking the nonvolatile memory element100and the PET60. It is only required that one of the source66and the drain68is coupled to one of the free layer10and the pin layer18. The nonvolatile memory element100may be the nonvolatile memory element of the first and second variations of the second embodiment. The direction82of the dielectric polarization of the piezoelectric substance62of the PET60may be in the +r direction. The direction of the dielectric polarization of the piezoelectric substance62may be in the +z direction or the −z direction. In this case, the gates are located at the both sides of the piezoelectric substance62in the z direction. As the material for the piezoresistor61, used is, for example, SmSe, TmSe, SmS, Ca2RuO4, (Ca, Ba, SrRu)O3, Ni(SxSe1-x)2C, or (V1-xCrx)2O3. The material that is the same as the material for the piezoelectric substance22is used as the material for the piezoelectric substance62.

Fifth Embodiment

A fifth embodiment uses the nonvolatile memory element of the first and second embodiments and the variations thereof for a nonvolatile bistable circuit.FIG. 25is a circuit diagram of a memory cell using a nonvolatile static RAM (nonvolatile SRAM) in accordance with the fifth embodiment. As illustrated inFIG. 25, a memory cell70of the nonvolatile SRAM includes a bistable circuit72and the nonvolatile memory element30. The nonvolatile memory element30is the nonvolatile memory element of the first and second embodiments and the variations thereof. The bistable circuit72stores data in a volatile manner. The nonvolatile memory element30stores data stored in the bistable circuit72in a non-volatile manner (i.e., stores data in the nonvolatile memory element30and retains data in the nonvolatile memory element30in a non-volatile manner), and restores the data stored in a non-volatile manner in the bistable circuit72.

The bistable circuit72includes inverters71aand71bconnected in a loop shape and memory nodes Q and QB that are located on the loop and complementary to each other. Although the illustration is omitted, the bistable circuit72is connected between the power source and a ground. A power switch made of a transistor may be located between the bistable circuit72and the power source, between the bistable circuit72and a ground, or both between the bistable circuit and the power source and between the bistable circuit72and a ground. The memory nodes Q and QB are respectively coupled to the input-output lines D and DB through FETs73and74. The gates of the FETs73and74are coupled to the word line WL. Write and read of data to and from the bistable circuit72is performed by turning off the FET75in the same way as in a typical SRAM.

The FET75and the nonvolatile memory element30are connected in series in a pathway76between the memory nodes Q and QB and a control line CTRL. One of the source and the drain of the FET75is coupled to the memory nodes Q and QB, and the other of the source and the drain is coupled to the nonvolatile memory element30. The gate of the FET75is coupled to a switch line SR.

The operation for storing data from the bistable circuit72to the nonvolatile memory element30is performed by setting the store enable (SE) level at a high level and setting the control line CTRL at a high level and a low level while the FET75is being turned on. After data is stored in the nonvolatile memory element30, the power source supplied to the memory cell70is shut off. Since the first and second embodiments and the variations thereof are used as the nonvolatile memory element30the consumption energy necessary for a restoring operation is reduced compared to the consumption energy when a typical magnetoresistive element is used.

The operation for restoring data from the nonvolatile memory element30to the bistable circuit72is performed by turning on the FET75and supplying an electric power to the bistable circuit72while the control line CTRL is at a low level.

A first variation of the fifth embodiment uses the first and second embodiments and the variations thereof for a nonvolatile master-slave flip-flop circuit.FIG. 26is a circuit diagram of a nonvolatile flip-flop circuit in accordance with the first variation of the fifth embodiment. As illustrated inFIG. 26, a nonvolatile flip-flop circuit70aincludes a D-latch circuit99aand a D-latch circuit99b. The D-latch circuit99aincludes the bistable circuit72, pass gates77aand77b, the nonvolatile memory element30, and FETs75and78. The pass gate77band the FET78are connected in parallel in the loop of the bistable circuit72. The FET75and the nonvolatile memory element30are connected in series between the memory nodes Q and QB in the bistable circuit72and the control line CTRL. The voltage of the memory node Q becomes a QB signal through an inverter79a. The voltage of the memory node QB becomes a Q signal through an inverter79b. The memory node Q is coupled to the D-latch circuit99bthrough the pass gate77a.

The D-latch circuit99bincludes a bistable circuit92, and pass gates93aand93h. In the bistable circuit92, inverters91aand91bare connected in a loop shape. The pass gate93bis connected in the loop of the bistable circuit92. Data D is input to the bistable circuit92through an inverter95and the pass gate93a. A clock signal CLK becomes a clock CB through an inverter96, and further becomes a clock C through an inverter97. The clocks CB and C are input to each of the pass gates77a,77b,93a,and93b.

The nonvolatile SRAM cell of the fifth embodiment and the nonvolatile flip-flop circuit of the first variation of the fifth embodiment are able to be used for, for example, a register or a cash memory. As described above, the nonvolatile memory elements of the first and second embodiments and the variations thereof are able to be used for a nonvolatile power gating system including a nonvolatile bistable circuit. This configuration reduces the consumption energy at the time of nonvolatile writing. Thus, break-even time (see Patent Document 1) is reduced, and the nonvolatile power gating with high energy efficiency becomes possible.

In the pathway76of the fifth embodiment and the variation thereof, the connection relation between the nonvolatile memory element30and the FET75may be opposite. The FET75may be omitted, and only the nonvolatile memory element30may be coupled. Furthermore, the number of the nonvolatile memory element30may be one, and the nonvolatile memory element30may be connected between the one memory node Q or QB of the bistable circuit72and the control line CTRL. The nonvolatile memory element30and the FET75are respectively the nonvolatile memory element30and the wire FET50of the fourth embodiment, or the nonvolatile memory element30and the PET60of the variation of the fourth embodiment.

Sixth Embodiment

A sixth embodiment uses a piezoresistor for a thin film between the free layer and the pin layer.FIG. 27Ais a perspective view of an electronic device in accordance with the sixth embodiment, andFIG. 27Bis a cross-sectional view. As illustrated inFIG. 27AandFIG. 27B, in a nonvolatile memory element107, the thin film between the free layer10and the pin layer18is a piezoresistor15. The piezoelectric substance22is dielectrically polarized in the −r direction. When the piezoelectric electrode24is at 0 V, the piezoelectric substance22does not apply a pressure to the piezoresistor15, and the piezoresistor15is in an insulator phase. When the piezoelectric electrode24is at a positive voltage, the piezoelectric substance22applies a pressure in the −r direction to the piezoresistor15, and the piezoresistor15becomes in a metallic phase. The inverse magnetostrictive effect of the magnetostrictive layer11is also expected. When no voltage is applied to the piezoelectric electrode24, the magnetoresistive layer20becomes of a GMR type. When a positive voltage is applied to the piezoelectric electrode24, the magnetoresistive layer20becomes of a MTJ type.

In the sixth embodiment, the thin film between the free layer10and the pin layer18includes the piezoresistor15. The piezoelectric substance22applies a pressure to the piezoresistor15. Thus, when a positive voltage is applied to the piezoelectric electrode24, the resistance of the magnetoresistive layer20becomes low, and the current density is secured even when the voltage between the free layer electrode26and the pin layer electrode28is very low voltage. Furthermore, the current density is reduced by the inverse magnetostrictive effect. When no voltage is applied to the piezoelectric electrode24, larger resistance change is expected because of the tunnel magnetoresistance effect.

When the nonvolatile memory element107is applied to, for example, the MRAM of the third embodiment, the consumption energy is reduced because rewrite is possible with low current density when a positive voltage is applied. When no voltage is applied, the resistance change is large. Thus, read becomes easy. Alternatively, the nonvolatile memory element107may be used for the memory circuits of the fifth embodiment and the variation thereof.

A first variation of the sixth embodiment applies the nonvolatile memory element107to the MRAM. The film thickness of the piezoresistor15is configured to be large to the extent that a tunneling conduction does not occur. The nonvolatile memory element107is considered as a transistor using the piezoresistor15for the channel. In this case, the nonvolatile memory element107serves the functions of both a transistor and a two-terminal magnetoresistive element.

FIG. 28is a circuit diagram of a memory cell in accordance with the first variation of the sixth embodiment. As illustrated inFIG. 28, the memory cell40includes a nonvolatile memory element30a.The terminal31is coupled to the source line SL, the terminal32is coupled to the bit line BL, and the electrode33is coupled to the word line WL. The nonvolatile memory element30ais the nonvolatile memory element107of the sixth embodiment. Since the nonvolatile memory element107has the functions of a transistor and a magnetoresistive element, an FET for a switch becomes unnecessary in the memory cell40. Therefore, the occupancy area is reduced.

The first variation of the sixth embodiment uses the nonvolatile memory element30aof the sixth embodiment, and connects one of the free layer10and the pin layer18to the bit line BL. The other of the free layer10and the pin layer18is coupled to the source line SL. The piezoelectric electrode24is coupled to the word line WL. Such a structure achieves the memory cell40without a switch.

In the sixth embodiment and the variation thereof, as in the second embodiment, the piezoelectric electrode24is located so as to surround the piezoelectric substance22, and the direction of the dielectric polarization is in the −r direction or the +r direction. As in the first variation of the second embodiment, the piezoelectric electrodes24aand24bmay be located at the both sides of the piezoelectric substance22in the z direction, and the direction of the dielectric polarization of the piezoelectric substance22may be in the +z direction or the −z direction.

The sixth embodiment and the variation thereof ma be applied to the structure of the first embodiment.

To describe advantages of the second through sixth embodiments and the variations thereof, a description will be given of a first comparative example and a second comparative example.FIG. 29AandFIG. 29Bare cross-sectional views of magnetoresistive elements in accordance with the first and second comparative examples, respectively. As illustrated inFIG. 29Ain the magnetoresistive element110of the first comparative example, the pin layer electrode28is electrically connected to the piezoelectric electrode24. Other structures are the same as those of the second, embodiment, and the description thereof is thus omitted.

In the magnetoresistive element110, when the parallel state is rewritten to the antiparallel state, a voltage is applied to the terminal T1and the terminal T2so that Vpin−Vfiee>0. The voltage Vpin is applied to die piezoelectric electrode24electrically connected to the pin layer electrode28. A positive voltage with respect to the free layer electrode26is applied to the piezoelectric electrode24. An electric field in the same direction as the direction80of the dielectric polarization is applied in the piezoelectric substance22. Accordingly, a pressure in the −r direction is applied to the free layer10as inFIG. 4A. When the magnetization direction of the magnetostrictive layer in the free layer10is in the z direction and the magnetostrictive coefficient is negative, the magnetization easy plane of the magnetostrictive layer is in the xy plane. Accordingly, as described inFIG. 4B, the magnetization direction of the free layer10is reversed by small current.

On the other hand, when the antiparallel state is rewritten to the parallel state, a voltage is applied to the terminal T1and the terminal T2so that Vpin−Vfree<0. UnlikeFIG. 4B, a negative voltage with respect to the free layer electrode26is applied to the piezoelectric electrode24. An electric field in the direction opposite to the direction80of the dielectric polarization is applied in the piezoelectric substance22, and a pressure in the +r direction is applied to the free layer10. The magnetization easy plane of the magnetostrictive layer is not in the xy plane. Thus, the current for the magnetization reversal is not reduced.

As illustrated inFIG. 29B, in a magnetoresistive element112of the second comparative example, the free layer electrode26is electrically connected to the piezoelectric electrode24a, and the pin layer electrode28is electrically connected to the piezoelectric electrode24b. Other structures are the same as those of the second embodiment, and the description thereof is thus omitted.

In the magnetoresistive element112, when the parallel state is rewritten to the antiparallel state, a voltage is applied to the terminal T1and the terminal T2so that Vpin−Vfree>0. A positive voltage with respect to the piezoelectric electrode24a is applied to the piezoelectric electrode24b. An electric field in the same direction as the direction80of the dielectric polarization is applied in the piezoelectric substance22. Accordingly, as inFIG. 7A, a pressure in the −r direction is applied to the free layer10, and the magnetization direction of the free layer10is reversed by small current.

On the other hand, when the antiparallel state is rewritten to the parallel state, a voltage is applied to the terminal T1and the terminal T2so that Vpin−Vfree<0. UnlikeFIG. 7B, a negative voltage with respect to the piezoelectric electrode24ais applied to the piezoelectric electrode24b. An electric field in the direction opposite to the direction80of the dielectric polarization is applied in the piezoelectric substance22. Thus, the current for the magnetization reversal is not reduced.

As described above, in the first and second comparative examples, the current consumed for one of the magnetization reversals is reduced, but the current consumed for the other of the magnetization reversals is not reduced.

In contrast to the first and second comparative examples described above, in the second embodiment and the variations thereof as illustrated inFIG. 3AthroughFIG. 8B, a voltage different from the voltage applied to the free layer10and the voltage applied to the pin layer18is applied to the piezoelectric electrodes24,24a, and24b. Thus, in both cases where the parallel state is rewritten to the antiparallel state and where the antiparallel state is rewritten to the parallel state, the current for the magnetization reversal is reduced.

Additionally, in the second embodiment, as illustrated inFIG. 4AandFIG. 5A, when Vpin−Vfree>0, Vferr−Vfree>0. As illustrated inFIG. 4BandFIG. 5B, even when Vpin−Vfree<0, Vferr−Vfree>0. As described above, when the polarity of the voltage applied to the pin layer18with respect to the free layer10reverses, the polarity of the voltage applied to the piezoelectric electrode24with respect to the free layer10does not change. Accordingly, the direction of the electric field in the piezoelectric substance22is the same between the case where the parallel state is rewritten to the antiparallel state and the case where the antiparallel state is rewritten to the parallel state. Therefore, the current for the magnetization reversal is reduced in both cases.

Furthermore, in the first variation of the second embodiment, as illustrated inFIG. 7AandFIG. 8A, when Vpin−Vfree>0. Vferr1−Vferr2>0. As illustrated inFIG. 7BandFIG. 8B, even when Vpin−Vfree<0, Vferr−Vferr2>0. When the polarity of the voltage applied to the pin layer18with respect to the free layer10reverses, the polarity of the voltage applied to the electrode24b(a second electrode) with respect to the electrode24a(a first electrode) does not change. The current for the magnetization reversal is reduced in both cases.

In the first through sixth embodiments and the variations thereof, the free layer10includes the magnetostrictive layer11and the ferromagnetic layer12, but the ferromagnetic layer12may not be necessarily included.

Although preferred embodiments of the present invention have been described so far, the present invention is not limited to those particular embodiments, and various changes and modifications may be made to them within the scope of the invention claimed herein.

DESCRIPTION OF REFERENCE NUMERALS

14anon-magnetic metal layer

17magnetization fixed layer

80,82direction of dielectric polarization