Display device

A display device includes a substrate, a plurality of pixel columns, and a lighting test circuit unit. The lighting test circuit unit is disposed in a non-display area on the substrate, includes a plurality of lighting test transistors, and provides a lighting test voltage to the pixel columns. Each of the lighting test transistors includes an active pattern including a source area, a drain area, and a channel area, a gate electrode disposed in the channel area, an interlayer insulating layer including a first contact hole spaced apart from a first side of the gate electrode by about 7 um or more, and a source electrode contacting the source area of the active pattern through the first contact hole.

CROSS-REFERENCE TO RELATED APPLICATION(S)

This application claims priority from and the benefit of Korean Patent Application No. 10-2020-0031869, filed on Mar. 16, 2020 and Korean Patent Application No. 10-2021-0029102, filed on Mar. 4, 2021 which are hereby incorporated by reference for all purposes as if fully set forth herein.

BACKGROUND

Example embodiments of the present disclosure relate generally to a display device. More particularly, example embodiments of the present disclosure relate to the display device with improved display quality.

2. Description of the Related Art

A display device includes pixels and may display an image based on signals and voltages provided to the pixels.

Meanwhile, whether the display device is damaged (e.g., whether a wiring, a pixel, etc. is damaged) may be detected through a lighting test. In this case, a lighting test transistor for the lighting test may be formed in the display device, and an insulation breakdown phenomenon may occur in the lighting test transistor by a static electricity generated in a manufacturing process of the display device. When the insulation breakdown phenomenon occurs, an insulating layer loses insulating nature and becomes conductive, and a short may occur in the lighting test transistor. When the display device is driven, since a data voltage is provided to the pixel through the lighting test transistor, a display quality of the display device may be deteriorated due to the short.

SUMMARY

Display devices constructed according to the principles and example implementations of the present disclosure may provide a display device with improved display quality.

A display device according to an example embodiment may include a substrate, a plurality of pixel columns, and a lighting test circuit unit. The substrate may include a display area and a non-display area adjacent to the display area. The plurality of pixel columns may be disposed in the display area on the substrate. The lighting test circuit unit may be disposed in the non-display area on the substrate, may include a plurality of lighting test transistors, and may provide a lighting test voltage to the pixel columns. Each of the lighting test transistors may include an active pattern disposed in the non-display area on the substrate and including a source area, a drain area, and a channel area, a gate electrode disposed in the channel area on the active pattern, an interlayer insulating layer covering the gate electrode, and including a first contact hole exposing a part of the source area of the active pattern and being spaced apart from a first side of the gate electrode by about 7 um or more, and a source electrode contacting the source area of the active pattern through the first contact hole.

According to an example embodiment, the interlayer insulating layer may further include a second contact hole exposing a part of the drain area of the active pattern and being spaced apart by about 7 um or more from a second side of the gate electrode and each of the lighting test transistors may further include a drain electrode contacting the drain area of the active pattern through the second contact hole.

According to an example embodiment, a distance from a center of the first contact hole to the first side of the gate electrode may be equal to a distance from a center of the second contact hole to the second side of the gate electrode.

According to an example embodiment, a length from the first side of the gate electrode to the second side of the gate electrode may be about 3 um to about 4 um.

According to an example embodiment, a distance between a center of the first contact hole and a center of the second contact hole may be about 17 um or more.

According to an example embodiment, each of the lighting test transistors may further include a gate insulating layer being interposed between the substrate and the interlayer insulating layer and covering the active pattern, and each of the first and second contact holes may penetrate the gate insulating layer to expose the source and the drain areas, respectively.

According to an example embodiment, the display device may further include a data driver disposed in the non-display area on the substrate and generating a data voltage, and the lighting test circuit unit may be disposed between the pixel columns and the data driver.

According to an example embodiment, the display device may further include a demultiplexer disposed between the lighting test circuit unit and the pixel columns in the non-display area on the substrate, and the demultiplexer may receive the data voltage from the data driver and may provide the data voltage to the pixel columns.

According to an example embodiment, the source electrode may be adjacent to the data driver, and the drain electrode may be adjacent to the demultiplexer.

According to an example embodiment, the display device may further include an antistatic circuit unit disposed in the non-display area on the substrate, electrically connected to the lighting test circuit unit, and measuring a voltage level of the lighting test voltage, and when the antistatic circuit unit measures the voltage level of the lighting test voltage to be higher than a preset voltage level, the lighting test voltage may not be provided to the lighting test transistors.

According to an example embodiment, a maximum distance between the first side of the gate electrode and the first contact hole may be determined by the preset voltage level.

According to an example embodiment, the pixel columns may include a first pixel column in which a first pixel displaying a first color and a second pixel displaying a second color are repeatedly arranged, a second pixel column in which a third pixel displaying a third color is arranged, and a third pixel column in which the second pixel and the first pixel are repeatedly arranged.

According to an example embodiment, the lighting test circuit unit may alternately provide the lighting test voltage to the first pixel included in the first pixel column and the third pixel column, and the second pixel included in the first pixel column and the third pixel column.

According to an example embodiment, the lighting test transistors may include a first lighting test transistor, a second lighting test transistor, and a third lighting test transistor, the first and second lighting test transistors may be electrically connected to the first pixel column and the third pixel column, and the third lighting test transistor may be electrically connected to the second pixel column.

According to an example embodiment, the lighting test voltage may include a first lighting test voltage, a second lighting test voltage, and a third lighting test voltage, the first lighting test transistor may provide a first lighting test voltage to the first pixel in response to a first test control signal, the second lighting test transistor may provide a second lighting test voltage to the second pixel in response to a second test control signal, and the third lighting test transistor may provide a third lighting test voltage to the third pixel in response to a third test control signal.

According to an example embodiment, the display device may further include a data driver generating a data voltage which is provided to the pixel columns, a gate driver generating a scan signal which is provided to the pixel columns, and a timing controller generating a control signal which controls the data driver and the gate driver.

Therefore, the display device according to example embodiments may include lighting test transistor having a first distance of about 7 um or more. Accordingly, a charge mobility of the lighting test transistor may be lowered, and an insulation breakdown phenomenon due to a static electricity generated in a manufacturing process of the display device may not occur. Accordingly, the display device may perform a lighting test, and whether the display device is damaged may be detected through the lighting test. In addition, the lighting test transistor may not be short. Therefore, when the display device is driven, a display quality may be improved.

It is to be understood that both the foregoing general description and the following detailed description are example and explanatory and are intended to provide further explanation of the present disclosure as claimed.

DETAILED DESCRIPTION

Illustrative, non-limiting example embodiments will be more clearly understood from the following detailed description in conjunction with the accompanying drawings.

FIGS. 1 and 2are diagrams illustrating a manufacturing process of a display device according to example embodiments.

Referring toFIGS. 1 and 2, on a mother substrate10, a plurality of cell areas40may be arranged in a grid shape. A display device1000ofFIG. 3may be formed in the cell areas40, respectively. After the mother substrate10is aligned with a mask20in which a plurality of openings are formed, a depositing material31may be deposited on the cell areas40of the mother substrate10by passing through the openings from the evaporation source30. Here, the cell area40may include a display area DA ofFIG. 3and a non-display area NDA ofFIG. 3. For example, the depositing material31may be an organic material included in a pixel (e.g., a pixel PX ofFIG. 3) disposed in the display area DA.

In an example embodiment, pixel transistors may be disposed under the organic material in the display area DA, and the lighting test transistors (e.g., first to third lighting test transistors TR1, TR2, and TR3ofFIG. 4) for a lighting test of the pixel may be disposed in the non-display area NDA. In a process of aligning the mother substrate10and the mask20in a line, a central portion A of the mother substrate10may sag as shown inFIG. 1. As the central portion A of the mother substrate10sags, the central portion A of the mother substrate10may be close to the mask20or may directly contact the mask20. In this case, a static electricity may be generated in the central portion A of the mother substrate10, and thus, the lighting test transistors disposed in the central portion A may be damaged due to the static electricity.

For example, in order to align the mother substrate10with the mask20in a line, an alignment speed of the mother substrate10may be set to about 300 mm/s, and a distance between the mother substrate10and the mask20may be set to about 5 mm. In this case, the static electricity having a voltage level of about 500V may be generated in the central portion A of the mother substrate10. As a result, an insulation breakdown phenomenon may occur in the lighting test transistors of the display device1000which is manufactured in the cell area40located in the central portion A of the mother substrate10. When an insulation breakdown phenomenon occurs, an insulating layer (e.g. a gate insulating layer250ofFIG. 6or a interlayer insulating layer270ofFIG. 6) included in the lighting test transistor may lose insulating effect and may become conductive, and a short may occur in the lighting test transistor. When the display device1000is driven, since a data voltage is provided to the pixel through the lighting test transistor, a display quality of the display device1000may be deteriorated due to the short.

FIG. 3is a diagram illustrating a display device according to example embodiments.

Referring toFIG. 3, for example, the display device1000may be formed in each of cell areas40and may be separated from the mother substrate10by performing cell cutting. The display device1000may include a substrate100, data lines DL, a plurality of pixel columns110,120, and130, a lighting test circuit unit200, a demultiplexer300, a data driver400, and an antistatic circuit unit500.

The substrate100may include a display area DA and a non-display area NDA adjacent to the display area DA.

The data lines DL may be disposed in the display area DA on the substrate100. For example, the data lines DL may extend in a column direction and may be arranged side by side in a row direction perpendicular to the column direction. The data lines DL may be electrically connected to the pixel columns110,120, and130, respectively.

The pixel columns110,120, and130may be disposed parallel to the data lines DL. Each of the pixel columns110,120, and130may include pixels PX. During the lighting test of the display device1000, the pixels PX may emit lights in response to a lighting test voltage provided through the data lines DL.

In an example embodiment, the pixel columns110,120, and130may include a first pixel column110, a second pixel column120, and a third pixel column130. The first pixel column110may include a first pixel R displaying a first color and a second pixel B displaying a second color, and the first pixel R and the second pixel B may be repeatedly arranged in the first pixel column110. The second pixel column120may include a third pixel G displaying a third color, and the third pixel G may be repeatedly arranged in the second pixel column120. The third pixel column130may include a first pixel R and a second pixel B, and the first pixel R and the second pixel B may be repeatedly arranged in the third pixel column130. In this case, the first pixel R and the second pixel B included in the third pixel column130may be arranged in a reverse order with the first pixel R and the second pixel B included in the first pixel column110. For example, the first color may be red, the second color may be blue, and the third color may be green.

In an example embodiment, as shown inFIG. 3, a first pixel column110, a second pixel column120, a third pixel column130, and a second pixel column120may be repeatedly arranged in the display area DA on the substrate100. Meanwhile, the order in which the pixel columns110,120, and130are arranged is not limited thereto. Also, although the eight pixel columns110,120and130are illustrated inFIG. 3, the number of pixel columns110,120, and130is not limited thereto.

The lighting test circuit unit200may be disposed in the non-display area NDA on the substrate100. The lighting test circuit unit200may provide the lighting test voltage to the pixel columns110,120, and130through the data lines DL during the lighting test of the display device1000.

In an example embodiment, the lighting test circuit unit200may alternately provide the lighting test voltage to the first pixel R and the second pixel B included in the first pixel column110and the third pixel column130. For example, the lighting test circuit unit200may detect a lighting failure of the first pixel R by providing a first lighting test voltage to emit the first pixel R. Thereafter, the lighting test circuit unit200may detect the lighting failure of the second pixel B by providing a second lighting test voltage to emit the second pixel B.

In an example embodiment, the lighting test circuit unit200may provide the lighting test voltage to the third pixel G included in the second pixel column120. For example, the lighting test circuit unit200may detect the lighting failure of the third pixel G by providing a third lighting test voltage to emit the third pixel G.

In addition, the lighting test circuit unit200may not operate when the display device1000is driven. For example, when the display device1000is driven, the lighting test transistor included in the lighting test circuit unit200may be turned off.

The demultiplexer300may be disposed between the lighting test circuit unit200and the pixel columns110,120, and130in the non-display area NDA on the substrate100. When the display device1000is driven, the demultiplexer300may receive a data voltage from the data driver400and may provide the data voltage to the pixel columns110,120, and130through the data lines DL.

The data driver400may generate the data voltage, and when the display device1000is driven, the data voltage may be provided to the pixel columns110,120, and130through the demultiplexer300and the data lines DL. In an example embodiment, the data driver400may be disposed in the non-display area NDA on the substrate100. In another example embodiment, the data driver400may be disposed on a flexible printed circuit board (“FPCB”) in a chip-on-film (“COF”) form.

The antistatic circuit unit500may be disposed in the non-display area NDA on the substrate100. The antistatic circuit unit500will be described in detail with reference toFIG. 4.

FIG. 4is a circuit diagram illustrating the display device ofFIG. 3.

Referring toFIGS. 3 and 4, the lighting test circuit unit200may include first to third lighting test transistors TR1, TR2, and TR3. During the lighting test of the display device1000, the first to third lighting test transistors TR1, TR2, and TR3may provide the lighting test voltage to the first to third pixels R, G, and B. For example, the first and second lighting test transistors TR1and TR2may be electrically connected to the first pixel column110and the third pixel column130, and the third lighting test transistor TR3may be electrically connected to the pixel column120.

The first lighting test transistor TR1may provide a first lighting test voltage LS_R to the first pixel R in response to a first test control signal LCS_R. The first test control signal LCS_R may have voltage levels for turning on or off the first lighting test transistor TR1, and the first lighting test voltage LS_R may have a voltage level for emitting the first pixel R. For example, a gate terminal of the first lighting test transistor TR1may be provided with the first test control signal LCS_R, a source terminal may be provided with the first lighting test voltage LS_R, and a drain terminal may provide the first lighting test voltage LS_R to the first pixel column110or the third pixel column130.

The second lighting test transistor TR2may provide a second lighting test voltage LS_R to the second pixel Bin response to a second test control signal LCS_B. The second test control signal LCS_B may have voltage levels for turning on or off the second lighting test transistor TR2, and the second lighting test voltage LS_B may have a voltage level for emitting the second pixel B. For example, a gate terminal of the second lighting test transistor TR2may be provided with the second test control signal LCS_B, a source terminal may be provided with the second lighting test voltage LS_B, and a drain terminal may provide the second lighting test voltage LS_B to the first pixel column110or the third pixel column130.

The first pixel R may emit a light by receiving the first lighting test voltage LS_R, and the second pixel B may emit a light by receiving the second lighting test voltage LS_B. For example, the voltage level of the first lighting test voltage LS_R may be higher than the voltage level of the second lighting test voltage LS_B. In addition, as described above, the lighting test circuit unit200may alternately provide the lighting test voltages LS_R and LS_B to the first pixel R and the second pixel B. For example, the first and second test control signals LCS_R and LCS_B may be alternately provided to the first and second lighting test transistors TR1and TR2, respectively.

The third lighting test transistor TR3may provide a third lighting test voltage LS_G to the third pixel G in response to a third test control signal LCS_G. The third test control signal LCS_G may have voltage levels for turning on or off the third lighting test transistor TR3, and the third lighting test voltage LS_G may have a voltage level for emitting the third pixel G. For example, a gate terminal of the third lighting test transistor TR3may be provided with the third test control signal LCS_G, a source terminal may be provided with the third lighting test voltage LS_G, and a drain terminal may provide the third lighting test voltage LS_G to the second pixel column120.

The demultiplexer300may include a plurality of control transistors. When the display device1000is driven, the control transistors may provide the data voltage to the first to third pixels R, G, and B in response to the control signals CS_1and CS_2.

As described above, when the display device1000is driven, the data driver400may generate the data voltage, and may provide the data voltage to the first to third pixels R, G, and B through the demultiplexer300and the data lines DL.

The antistatic circuit unit500may be electrically connected to the lighting test circuit unit200and may measure voltage levels of the first to third lighting test voltages LS_R, LS_G, and LS_B provided to the lighting test circuit unit200. When the antistatic circuit unit500measures the voltage level of at least one of the first to third lighting test voltages LS_R, LS_G, and LS_B to be higher than a preset voltage level, a voltage having the voltage level may not be provided to the first to third lighting test transistors TR1, TR2, and TR3. In other words, the static electricity may be generated in at least one of the lines that transmit the first to third lighting test voltages LS_R, LS_B, and LS_G, and the antistatic circuit unit500may prevent the static electricity generated in the line from being provided to the first to third lighting test transistors TR1, TR2, and TR3. For example, when the preset voltage level set in the antistatic circuit unit500is about 6.5V and the voltage level of the voltage transmitted through the line is about 7V, the antistatic circuit unit500may prevent the voltage of about 7V from being provided to the first to third lighting test transistors TR1, TR2, and TR3.

FIG. 5is a plan view illustrating a lighting test transistor included in the display device ofFIG. 3.FIG. 6is a cross-sectional view taken along line I-I′ ofFIG. 5.

Referring toFIGS. 3, 4, 5, and 6, each of the first to third lighting test transistors TR1, TR2, and TR3may include an active pattern240, a gate insulating layer250, a gate electrode260, an interlayer insulating layer270, a source electrode280, and a drain electrode290.

In an example embodiment, a buffer layer230, the active pattern240, the gate insulating layer250, the gate electrode260, the interlayer insulating layer270, the source electrode280, and the drain electrode290may be sequentially formed on the substrate100.

The buffer layer230may be disposed on the substrate100. The buffer layer230may prevent diffusion of metal atoms or impurities from the substrate100to the active pattern240. In addition, the buffer layer230may control a heat transfer rate during a crystallization process for forming the active pattern240. Meanwhile, the display device1000may not include the buffer layer230.

The active pattern240may be disposed on the buffer layer230. In an example embodiment, the active pattern240may include a silicon semiconductor (e.g., amorphous silicon or polycrystalline silicon) or a metal oxide semiconductor.

The active pattern240may include a source area243, a drain area245, and a channel area241between the source area243and the drain area245. Impurities may be doped in the source and drain areas243and245of the active pattern240. Accordingly, the channel area241of the active pattern240may have lower conductivity and higher resistance than the source and drain areas243and245.

The gate insulating layer250may be interposed between the substrate100and the interlayer insulating layer270and may cover the active pattern240. A first contact hole281and a second contact hole291may penetrate the gate insulating layer250and may expose parts of each of the source and drain areas243and245of the active pattern240. The gate insulating layer250may include an insulating material. For example, the gate insulating layer250may include silicon oxide, silicon nitride, titanium oxide, tantalum oxide, or the like.

The gate electrode260may be disposed in the channel area241on the gate insulating layer250. The gate electrode260may include a metal, an alloy, or a conductive metal oxide. For example, the gate electrode260is gold (“Au”), silver (“Ag”), copper (“Cu”), nickel (“Ni”), chromium (“Cr”), aluminum (“Al”), tungsten (“W”), molybdenum (“Mo”), titanium (“Ti”), tantalum (“Ta”), or an alloy thereof, and may have a single layer or a multilayer structure including different metal layers. Meanwhile, the gate electrode260may correspond to the gate terminal described with reference toFIG. 4.

Meanwhile, the gate electrode260may include a first side and a second side opposite to the first side. For example, as shown inFIG. 5, the gate electrode260may include the first side facing the source electrode280and the second side facing the drain electrode290. In other words, a distance from the first side to the second side of the gate electrode260shown inFIG. 5may be substantially equal to a length LEN of the gate electrode260shown inFIG. 6.

The interlayer insulating layer270may cover the gate electrode260, and the first and second contact holes281and291may penetrate the interlayer insulating layer270and the gate insulating layer250. In other words, the first contact hole281may be formed by removing a first part of the gate insulating layer250and the interlayer insulating layer270, and the second contact hole291may be formed by removing a second part of the gate insulating layer250and the interlayer insulating layer270. That is, the first and second contact holes281and291may penetrate the gate insulating layer250and the interlayer insulating layer270to contact the source area243and the drain area245respectively. The interlayer insulating layer270may include an insulating material. For example, the interlayer insulating layer270may include silicon oxide, silicon nitride, titanium oxide, tantalum oxide, or the like.

The first contact hole281may expose a part of the source area243of the active pattern240and may be spaced apart from the first side of the gate electrode260by about 7 um or more. In other words, a first distance DIS_1between the gate electrode260and the center of the first contact hole281may be about 7 um or more.

The second contact hole291may expose a part of the drain area245of the active pattern240and may be spaced apart from the second side of the gate electrode260by about 7 um or more. In other words, a second distance DIS_2between the gate electrode260and the center of the second contact hole291may be about 7 um or more.

In an example embodiment, a distance from the center of the first contact hole281to the center of the second contact hole291may be about 17 um or more.

The source electrode280may be disposed on the interlayer insulating layer270and may contact the source area243of the active pattern240through the first contact hole281. The source electrode280may include a metal, an alloy, or a conductive metal oxide. For example, the source electrode280may include Au, Ag, Cu, Ni, Cr, Al, W, Mo, Ti, Ta or an alloy thereof, and may have a single layer or a multilayer structure including different metal layers. In addition, the source electrode280may correspond to the source terminal described with reference toFIG. 4. Accordingly, the source electrode280may be adjacent to the data driver400and may be electrically connected to the data driver400to receive the data voltage from the data driver400.

The drain electrode290may be disposed on the interlayer insulating layer270and may contact the drain area245of the active pattern240through the second contact hole291. The drain electrode290may include a metal, an alloy, or a conductive metal oxide. In an example embodiment, the drain electrode290may be formed together with the source electrode280, and thus may include a same material as the source electrode280. In addition, the drain electrode290may correspond to the drain terminal described with reference toFIG. 4. Accordingly, the drain electrode290may be adjacent to the demultiplexer300and may be electrically connected to the demultiplexer300to provide the data voltage to the demultiplexer300.

A charge mobility of the first lighting test transistor TR1may be determined according to a length of the components constituting the first lighting test transistor TR1and a distance between the components. For example, as the first distance DIS_1which is from the center of the first contact hole281filled with the source electrode280to the first side of the gate electrode260, and the second distance DIS_2which is from the center of the second contact hole291filled with the drain electrode290to the second side of the gate electrode260increases, a moving distance of charge moving from the source area243to the drain area245may increase. Accordingly, as the first and second distances DIS_1and DIS_2increase, the charge mobility of the first lighting test transistor TR1may decrease. In addition, as the length LEN of the channel area241having a high resistance compared to the source and drain areas243and245increases, the charge mobility of the first lighting test transistor TR1may decrease.

As described above, in the manufacturing process of the display device1000, as the central portion (e.g., the central portion A inFIGS. 1 and 2) of the mother substrate (e.g., the mother substrate10inFIGS. 1 and 2) sags, the central portion may be close to the mask (e.g., mask20inFIGS. 1 and 2) or may contact the mask, thereby the static electricity having a voltage level of about 500V may be generated in the central portion. In order to prevent the dielectric breakdown phenomenon of the first lighting test transistor TR1due to the static electricity, each of the first and second distances DIS_1and DIS_2of the first lighting test transistor TR1may be set to about 7 um or more. In other words, since the first lighting test transistor TR1is designed to have first or second distances DIS_1and DIS_2of about 7 um or more, the charge mobility of the first lighting test transistor TR1may be lowered. Accordingly, the dielectric breakdown phenomenon of the first lighting test transistor TR1may be prevented.

In addition, in an example embodiment, the length LEN of the gate electrode260may be about 3 um to about 4 um. Since the first lighting test transistor TR1includes the gate electrode260having the length LEN of about 3 um to about 4 um, the charge mobility of the first lighting test transistor TR1may be lowered. Accordingly, the dielectric breakdown phenomenon of the first lighting test transistor TR1may be prevented.

Table 1 is illustrating whether an insulation breakdown phenomenon occurs in the first lighting test transistor TR1according to changes in the first and second distances DIS_1and DIS_2, when the length LEN of the gate electrode260is about 3.5 um. As shown in the table 1, when each of the first and second distances DIS_1and DIS_2is about 3.2 um, about 3.3 um, about 3.5 um, and about 6 um (i.e., in case of CASE1, CASE2, CASE3, and CASE4), the insulation breakdown phenomenon occurred in the first lighting test transistor TR1. On the other hand, when each of the first and second distances DIS_1and DIS_2is set to about 7 um, about 8.7 um, and about 11 um (i.e., in case of CASE5, CASE6, and CASE7), the insulation breakdown phenomenon does not occur in the first lighting test transistor TR1.

In an example embodiment, wherein a maximum distance of each of the first and second distances DIS_1and DIS_2of the first lighting test transistor TR1may be determined corresponding to the preset voltage level set in the antistatic circuit unit500. For example, the maximum distance of each of the first and second distances DIS_1and DIS_2of the first lighting test transistor TR1may be about 11 um. As described above, when the antistatic circuit unit500measures the voltage level of the lighting test voltage to be higher than the preset voltage level, the lighting test voltage may not be provided to the first to third lighting test transistors TR1, TR2, and TR3. For example, the preset voltage level of the antistatic circuit unit500may be about 6.5V. When the first distance DIS_1or the second distance DIS_2of the first lighting test transistor TR1is greater than about 11 um, the charge mobility of the first lighting test transistor TR1may be lowered. Accordingly, the first lighting test transistor TR1may not transmit the lighting test voltage having a voltage level of about 6.5V or less, and accordingly, the display device1000may not perform the lighting test.

In an example embodiment, the first distance DIS_1may be substantially equal to the second distance DIS_2. For example, when the first distance DIS_1is shorter than the second distance DIS_2, the moving distance of charges moving from the source area243to the channel area241may be shorter than the moving distance of charges moving from the channel area241to the drain area245. In this case, the static electricity generated in the manufacturing process of the display device1000may be concentrated to the source area243, and accordingly, the insulation breakdown phenomenon may occur in the first lighting test transistor TR1. In order to prevent the static electricity from being concentrated in the source or drain areas243and245, the first and second distances DIS_1and DIS_2may be equal.

A structure of each of the second and third lighting test transistors TR2and TR3may be substantially equal to the structure of the first lighting test transistor TR1described above. In addition, a display layer may be further disposed on the source and drain electrodes280and290. In an example embodiment, when the display device1000is a liquid crystal display device, the display layer may include a first electrode, a second electrode, and a liquid crystal layer disposed between the first electrode and the second electrode. In another example embodiment, when the display device1000is an organic light emitting display device, the display layer may include a first electrode, a second electrode, and an organic emission layer disposed between the first electrode and the second electrode.

FIG. 7is a block diagram of the display device ofFIG. 3.

Referring toFIGS. 3 and 7, the display device1000may include a display panel600, the data driver (DDV)400, a gate driver700, and a timing controller (T-CON)800.

The display panel600may include the data lines DL, gate lines, pixels PX connected to the data lines DL and the gate lines, the lighting test circuit unit200, the demultiplexer300, and the antistatic circuit unit500. The display panel600may receive the data voltage DS through the data lines DL and may receive a gate signal GS through the gate lines.

The gate lines may be disposed in the display area DA on the substrate100. For example, the gate lines may extend in the row direction and may be arranged side by side in the column direction. Pixels PX may be formed in a region where the gate lines and data lines DL cross each other.

The data driver400may generate the data voltage DS based on an image data RGB′ and a data control signal DCTRL provided from the timing driver800, and may provide the data voltage DS to the pixels PX through the data lines DL. For example, the data control signal DCTRL may include an output data enable signal, a horizontal start signal, and a load signal.

The gate driver700may generate the gate signal GS based on a gate control signal GCTRL provided from the timing controller800, and may provide the gate signal GS to the pixels PX through the gate lines. For example, the gate control signal GCTRL may include a vertical start signal, a clock signal, and the like. In an example embodiment, the gate driver700may be directly mounted in the non-display area NDA on the substrate100. In another example embodiment, the gate driver700may be disposed on the FPCB in a COF form.

The timing controller800may receive an input image data RGB and a control signal CTRL from an external device. For example, the input image data RGB may be RGB data including red image data, green image data, and blue image data. The control signal CTRL may include a vertical synchronization signal, a horizontal synchronization signal, an input data enable signal, a master clock signal, and the like. The timing controller800may generate the gate control signal GCTRL, the data control signal DCTRL, and the image data RGB′ based on the input image data RGB and the control signal CTRL. In addition, the timing controller800may provide the gate control signal GCTRL to the gate driver700and provide the data control signal DCTRL and the image data RGB′ to the data driver400.

The display device1000according to example embodiments may include the first to third lighting test transistors TR1, TR2, and TR3having the first distance DIS_1of about 7 um or more. Accordingly, the charge mobility of the first to third lighting test transistors TR1, TR2, and TR3may be lowered, and the insulation breakdown phenomenon due to the static electricity generated in the manufacturing process of the display device1000may not occur. Accordingly, the display device1000may perform the lighting test, and whether the display device1000is damaged may be detected through the lighting test. In addition, the first to third lighting test transistors TR1, TR2, and TR3may not be short. Therefore, the display quality may be improved, when the display device1000is driven.