Output current sensing for DC/DC converter with external power stage

A method for sensing an output current of a Direct Current-to-Direct Current (DC/DC) converter having an external power stage configured to supply a converted current to an external inductor. During a calibration phase at a first start-up of the DC/DC converter: the method includes injecting a calibration current through a switching node of the power stage and through the inductor; and determining a calibration gain of the DC/DC converter to compensate for DC Resistance (DCR) variation by comparing a gain-adjusted voltage across the inductor with a reference voltage. During a measurement phase, the method includes reducing ripple voltage of a switching voltage at the switching node to generate a ripple-reduced switching voltage; and sensing the output current based on a DCR-compensated voltage across the inductor, which is a difference between the ripple-reduced switching voltage and an output voltage of the DC/DC converter with compensation for the DCR variation based on the calibration gain.

BACKGROUND

A Direct Current-to-Direct Current (DC/DC) converter converts a DC voltage from one voltage level to another.

Current sensing in a DC/DC converter with external power switches is used for optimizing power flow in high computation power microcontrollers and current sharing applications. While most power efficiency optimization focuses on circuit optimization, power savings may be realized by a microcontroller implementing more power-efficient software algorithms. Also, the sensed output current may be used by a feedback controller, an Current-Limitation circuit, feed into an Analog-to-Digital converter (A/D), helps to build a power-save mode, and/or in current sharing in interleaving converters.

DETAILED DESCRIPTION

The present disclosure is directed a Direct Current-to-Direct Current (DC/DC) converter with a current sensing circuit configured to measure the DC/DC converter's output current. The current sensing circuit performs a calibration to reduce variations in inductor DC Resistance (DCR) and in package and Printed Circuit Board (PCB) resistances. The calibration is based on a reference voltage and a reference resistance. Eventually, it can be based also on a reference current which is often unavailable or inaccurate. The current sensing circuit may additionally perform active ripple cancellation to enable faster sensing, and/or thermal monitoring to compensate for thermal variations of the inductor resistance.

FIG. 1illustrates a schematic diagram of a DC/DC converter with a current sensing circuit100in accordance with aspects of the disclosure.

The DC/DC converter comprises an external power stage10and an output filter20. The external power stage10comprises a dead-time non-overlapping generator12, driver circuit14, and external switches16. The dead-time non-overlapping generator12is configured to receive a Pulse Width Modulation (PWM) signal and generate gate driving signals CMD_P, CMD_N with dead time. The amplifying driver circuit14is configured to provide strong gate driving signals CMD_P, CMD_N before input to the gates of the external switches PMOS, NMOS. The dead time avoids short-circuit conditions occurring when both of the external switches PMOS, NMOS are on at the same time.

The output filter20comprises an external inductor L, a coil parasitic resistor Rcoil, and an output capacitor Cout. The output filter20is configured to provide an average value of the switching voltage VLXat the switching node NLXbetween the external switches PMOS, NMOS of the power stage10.

The current-sensing circuit100is configured around the inductor L of the DC/DC converter's output filter20. The current sensing circuit100comprises a temperature sensor110, a current injection circuit120, a calibration gain determination circuit130, and a ripple cancellation circuit140. The calibration gain determination circuit130comprises a differential amplifier132and a calibration controller134. The calibration controller134is configured to receive a reference voltage VREF, a clock signal CLK, and an enable signal EN.

The DC/DC converter has an initial calibration phase, followed by measurement phases. The calibration phase occurs, for example, only during a first turn-on of the DC/DC converter. During the calibration phase, the external switches16(PMOS and NMOS) are off, and the current injection circuit120(120-1and120-2) is configured to inject a calibration current ICALthrough the switching node NLXof the power stage10and through the inductor L of the output filter20. The calibration phase begins when the calibration switch120clamps the DC/DC converter output voltage Voutto ground, and by triggering the switching node NLXto high impedance. During the subsequent measurement phases, the calibration switch110is opened, thereby enabling the output of the filter20.

FIGS. 2A and 2Billustrate the DC/DC converter with details of the current sensing circuit100during the calibration and measurement phases. More specifically,FIG. 2Aillustrates the current sensing circuit100during the calibration phase, andFIG. 2Billustrates the current sensing circuit100during the subsequent measurement phases.

FIG. 2Aillustrates a schematic diagram of a calibration circuit200A, which is the current sensing circuit100ofFIG. 1during the calibration phase, in accordance with aspects of the disclosure.

The calibration circuit200A comprises a temperature sensor210, a current injection circuit220, and a calibration gain determination circuit230.

The temperature sensor210is configured to measure, during the calibration phase, a calibration temperature T of the inductor L. The temperature sensor210may comprise an on-chip temperature sensor of, for example, the microprocessor, or alternatively, an external temperature sensor placed near the inductor L.

The current injection circuit220comprises a calibration switch (SWcal)220-1and a current mirror220-2. The current injection circuit220is configured to inject a calibration current ICALthrough the switching node NLXof the power stage10and through the inductor L of the output filter20to the output node Nout. The current mirror220-2is configured to mirror a reference current IREFto generate the calibration current ICAL. The reference current IREFis based on the reference voltage VREFand a reference resistance RREF. The reference resistance RREFis formed by a resistive divider comprising resistors RAand RB, and is equal to RB/RA+RB. Eventually, reference current can be supplied from external source, if available.

The calibration gain determination circuit230comprises an operational amplifier232, a differential amplifier234, a comparator236, a calibration controller238, and various resistors. The calibration gain determination circuit230is configured to determine a calibration gain G of the current sensing circuit to compensate for DC Resistance (DCR) variation by comparing a gain-adjusted voltage VSNSacross the inductor L with a reference voltage β·VREF. The calibration determination circuit230adjusts a gain of the differential amplifier234until a calibration condition is reached, and then the calibration gain G is stored, as discussed in more detail below.

The calibration controller238is configured to adjust the gain of the differential amplifier234by increasing a value of a feedback resistance RSNSand comparing the gain-adjusted voltage VSNSacross the inductor L with the reference voltage β·VREF. More specifically, the calibration controller238is configured to increment a first resistance value of a first calibration resistor RCAL1coupled between the switching node NLXand a first input (+) of the differential amplifier234to generate a gain-adjusted switching voltage VCAL1, and to increment a second resistance value of a second calibration resistor RCAL2coupled between the output node Noutand a second input (−) of the differential amplifier234to generate a gain-adjusted output voltage VCAL2. The differential amplifier234is configured to determine a difference between the gain-adjusted switching voltage VCAL1and the gain-adjusted output voltage VCAL2, and output the gain-adjusted voltage VSNSacross the inductor L.

The comparator236is configured to compare the gain-adjusted voltage VSNSacross the inductor L with the reference voltage β·VREF, and to signal the calibration controller238to stop incrementing the resistance values of the first and second calibration resistors RCAL1, RCAL2when the gain-adjusted voltage VSNSacross the inductor L equals the reference voltage β·VREF, that is, VSNS=β·VREF. At this time, the calibration gain G is reached, and the current mirror220-2is disconnected and the calibration switch220-1opened so that the DC/DC converter may operate normally. The feedback resistance RSNSis then a scaled image of the coil resistance RDCR.

The calibration controller238is further configured to store in a memory260(shown inFIG. 2B) the calibration gain G, which is based on the first resistance value of the first calibration resistor RCAL1and/or the second resistance value of the second calibration resistor RCAL2when the gain-adjusted voltage VSNSacross the inductor L equals the reference voltage β·VREF. This memory260may be, for example, a One-Time-Programmable (OTP) memory or EEPROM memory.

Further, the temperature sensor210is configured to measure, during the calibration phase, a calibration temperature T of the inductor L. The memory260(shown inFIG. 2B) is further configured to store the measured calibration temperature T. Alternatively, the calibration may be performed at known temperature, for example, during a first startup of the DC/DC converter.

The calibration gain G and a calibration temperature T are stored in a memory260during the calibration phase at a first startup of the DC/DC converter. This calibration gain G and temperature T are recalled from the memory260during subsequent measurement phases. The calibration relies on the value of the reference resistor RREF. A reference current, which is often unavailable or inaccurate, is not required for the calibration. In some cases, when a supply voltage VDDis accurate enough, the reference voltage VREFis not required because the reference voltage VREFcan be derived from the supply voltage VDD.

To assist in a more detailed understanding of the operation of the calibration phase, the following few paragraphs include equations representing how the calibration gain G is determined.

The parasitic inductor resistance RDCRis derived from the reference voltage VREFand the resistors RAand RBas follows:

VDCR=α⁢⁢VREFRA+RB·RDCR(Equation⁢⁢1)
whereas the calibration current ICALis an α-scaled image of the reference current IREF. The reference voltage VREFis provided by the differential amplifier232. The differential amplifier gain RSNS/(RLP+RCAL) provides the output voltage VSNSon the output of the differential amplifier234as follows:

The value of the calibration resistance RCALis incremented in order to adjust the gain of the differential amplifier234. The calibration condition is defined as:
VSNS=β·VREF,  (Equation 3)
where β=RB/(RA+RB) is attenuation of resistive divider considered constant. As the outcome of the calibration, the feedback resistance Rλ=RCAL+RLPis the scaled image of RDCR:

In other words, the calibration current ICALis derived based on trimmed on-chip resistances RAand RB, whereas RSNSand Rλare process dependent on-chip resistances. The process dependency is then removed during current measurement, as the gain of the differential amplifier234depends on an accurate ratio RSNS/Rλ.

Since the calibration is performed only once during the lifetime of the DC/DC converter, the power components, such as the calibration switch220-1and the current mirror220-2, can be sized reasonably small and do not need to sustain reliability. The requirement on the calibration switch resistance is also relaxed, as it is preferred to provide clamping around several hundred mV referred to ground.

During the calibration phase, the low offset of the differential amplifier234(<1 mV) is required. Additionally, a temperature T of the DC/DC converter is stored for subsequent temperature correction, as described further below. In order to reduce the voltage drop on the on-chip parasitic layout resistance, double bonding may be used, with separated current and voltage paths for the switching node NLX.

FIG. 2Billustrates a schematic diagram of a measurement circuit200B, which is the current sensing circuit100ofFIG. 1during a measurement phase, in accordance with aspects of the disclosure.

The measurement circuit200B comprises a ripple cancellation circuit240, a passive first-order low-pass filter250, a memory260, an active second-order low-pass filter270, an output current sensing amplifier280, and temperature compensation controller. The temperature compensation controller may be part of a same controller as the calibration controller238or a separate controller.

During the measurement phase, the calibration switch110is open, thereby enabling the output filter20.

The ripple cancellation circuit240is configured to reduce ripple voltage of the switching voltage VLXat the switching node NLXto generate a ripple-reduced switching voltage VLX-R. During the measurement phase, the switching node voltage VLXfeeds high ripple voltage to the sensitive input of the differential amplifier, which is an output current sensing circuit280. While the output of the DC/DC converter is supposed to provide an output voltage VOUThaving low ripple, the switching node NLXoperates in the ground-to-VDD range. Accordingly the ripple current IACinside a passive filter in the differential amplifier280is mainly due to the current in the filtering capacitor and RLP(RLP>>RCAL) and is approximately:

IA⁢⁢C≈VDDZ⁡(C⁡(ω)+2·RLP)(Equation⁢⁢5)
In other words, the differential amplifier280receives in one terminal a stable “DC” voltage VOUT, while in the other terminal a square voltage VLXwith high amplitude. Filtering this high voltage provides a long time constant of, for example, several tens of switching cycles.

The ripple cancellation circuit240comprises an inverter Inv, a resistor R and a capacitor C. The ripple cancellation circuit240is configured to provide an opposing-phase switching voltage having a 180° phase difference from that of the switching voltage VLX. This is realized by the inverter Inv and matched resistor-capacitor (R-C) coupled in series creating a ripple current having a 180° phase difference from that of the switching voltage VLX. The opposing-phase switching voltage is combined at node N with the switching voltage VLX, thereby eliminating the AC components of the switching voltage VLXto result in a rippled-reduced switching voltage VLX-R. Also as a result, the number of switching cycles during which the sensed current is determined is reduced.

The passive first-order low-pass filter250comprises low pass filter resistors RLP1and RLP2. Resistor RLP1is coupled between the switching node NLXand the first calibration resistor RCAL1. Resistor RLP2is coupled between the output node Noutand the second calibration resistor RCAL2. The passive first-order low-pass filter250is configured to first-order low-pass filter the switching voltage VLXand the output voltage VOUTof the DC/DC converter.

The active low-pass filter270comprises an RC circuit comprising resistor RSNS3and capacitor CSNS3coupled in parallel between a positive input and an output of the differential amplifier280. The filter270also comprises an RC circuit having resistor RSNS4and capacitor CSNS4coupled in parallel and between the negative input of the differential amplifier280and ground. The active second-order low-pass filter270and250is configured to second-order low-pass filter the DCR-compensated voltage VSNSacross the inductor L.

The calibration gain G stored in the memory260, during the calibration phase as discussed above, is used to adjust the calibration resistors RCAL1and RCAL2to calibrate the DC/DC converter during the subsequent measurement phases.

The output current sensing circuit280, that is, the differential amplifier, is configured to receive at the positive input the output voltage VOUTof the DC/DC converter with compensation for DCR variation based on the calibration gain G, to receive at the negative input the ripple-reduced switching voltage VLX-Rwith compensation for DCR variation based on the calibration gain G, and to output the DCR-compensated voltage VSNSacross the inductor L. The output current sensing circuit280senses the output current Ioutbased on a DCR-compensated voltage VSNSacross the inductor L, which is a difference between the ripple-reduced switching voltage VLX-Rand an output voltage Voutof the DC/DC converter with compensation for the DCR variation based on the calibration gain G.

The sensed output current Ioutmay then be transmitted to a microprocessor, a feedback controller, an Over-Current Protection (OCP) or current limitation circuit, an Analog-to-Digital converter (A/D), or other device.

During the measurement phase, the current through the inductor L is much higher than during the calibration phase. This results in relaxed requirements on the offset of the differential amplifier280.

The parasitic drop on RDCRtogether with the amplification chain provides the output voltage of:

VSNS=ICOIL⁢RDCR·RSNSRλ.(Equation⁢⁢6)
However, as Rλhas the same process variation as RSNS, the process dependences of the resistor absolute value are eliminated.

The temperature compensation controller, which may be part of a same controller as the calibration controller238or a separate controller, is configured to correct the DCR-compensated voltage VSNSacross the inductor L based on a measurement-phase temperature Ts (sensing temperature) and the calibration-phase temperature Tc of the inductor L.

The thermal coefficient Rϑºof copper is about 0.3%/° C., and should be taken into account in a final current sensing or measurement result. Additionally, the copper thermal coefficient Rϑºhas decent linearity. The sensing of the temperature can be performed during a condition of good thermal equilibrium, for example, less than 15° of difference between thermal sensor and actual inductor temperature, by an on-chip temperature sensor210, where the temperature of the inductor L is substituted with the temperature of the chip. Alternatively, the sensing of the temperature can be performed by an external temperature sensor placed near the inductor L; this alternative option is more accurate, but requires an additional component and extra pin.

The final image of the sensed current VSNS′is then obtained by a linear correction of the sensed voltage VSNSat the sensed temperature Ts, accounting for the temperature of the calibration TCALas follows:
VSNS′=VSNS(1+α(Ts−TCAL))  (Equation 7)

To assist in a more detailed understanding of the operation of the measurement phase, the following few paragraphs include equations representing how the measurements are determined.

While analyzing the current-to-voltage transfer function, the focus is on

L⁢⁢didt
compound of the output filter impedance. As result, the V/I transfer function of the inductor L can be written as impedance as follows:

This signifies that the voltage across the inductor L during a transient event is highly influenced by the sL component. The desired output voltage of the current sensor may be written as follows:
VSNS=k·Icoil=FSNS(s)·(RL+sL)·Icoil(Equation 9)
where k is the constant related to the sensing gain. Then desired transfer function FSNS(s) should then compensate the term sL:

The small-signal transfer function of the sensing circuit can be assumed as 3rd-order transfer function of the form:

It can be shown, that the dominant transfer pole

1RSNS⁢C
can sufficiently compensate the zero coming from the inductor impedance term sL. This term can be therefore used to compensate the term sL mentioned previously. In order to obtain this compensation, the following equation is to be fulfilled:

RLL=1RSNS⁢C,(Equation⁢⁢12)
leading to a condition:

FIG. 3illustrates a flowchart of a method300of operating the current sensing circuit100(200A,200B) ofFIGS. 1, 2A, and 2B, in accordance with aspects of the disclosure.

During a calibration phase310at a first start-up of the DC/DC converter, a calibration current ICALis injected through a switching node NLXof the power stage10and through the inductor L (Step312). A calibration gain G of the DC/DC converter is then determined to compensate for DC Resistance (DCR) variation by comparing a gain-adjusted voltage VSNSacross the inductor L with a reference voltage β·VREF(Step314).

During a measurement phase, a ripple voltage of a switching voltage VLXis reduced at the switching node NLXto generate a ripple-reduced switching voltage VLX-R(Step322). The output current IOUTis then sensed based on a DCR-compensated voltage VSNSacross the inductor L, which is a difference between the ripple-reduced switching voltage VLX-Rand an output voltage VOUTof the DC/DC converter with compensation for the DCR variation based on the calibration gain G (Step324).

The DC/DC converter as described herein has many advantages over prior devices. The aspects of this disclosure are based on a calibration by a current generated by trimmed integrated resistance. The reference current has then an accurate value. There is no need for an accurate external current source for the calibration process. The current sensing required is fast in that it requires few switching cycles.

The value of the output current of the DC/DC converter is important for power efficiency optimization, the feedback controller, over-current protection, built-in power-save mode, improved current sharing of an interleaved DC/DC converter, etc.

Current sharing/balancing in multiphase DC/DC converters is one application of the disclosed current sensor. Temperature sensing of the coil to remove copper temperature dependence is not needed, nor are trimmed reference resistors. Of course the disclosure is not limited to copper, but is applicable to other materials used to form circuit components.

While the foregoing has been described in conjunction with exemplary embodiment, it is understood that the term “exemplary” is merely meant as an example, rather than the best or optimal. Accordingly, the disclosure is intended to cover alternatives, modifications and equivalents, which may be included within the scope of the disclosure.