Fabrication method for producing semiconductor chips with enhanced die strength

A fabrication method for producing semiconductor chips with enhanced die strength comprises following steps: forming a semiconductor wafer with enhanced die strength by comprising the substrate, the active layer on the front side of the substrate and the backside metal layer on the backside of the substrate, wherein at least one integrated circuit forms in the active layer; forming a protection layer on a front side of the semiconductor wafer; dicing the semiconductor wafer by at least one laser dicing process and removing the laser dicing residues and removing said protection layer by at least one etching process, whereby plural semiconductor chips with enhanced die strength are produced, and wherein the backside metal layer of said semiconductor chip fully covers the backside of said semiconductor chip after dicing.

FIELD OF THE INVENTION

The present invention relates to a fabrication method for producing semiconductor chips with enhanced die strength, in particular to a fabrication method for producing semiconductor chips with enhanced die strength thereof without beforehand back-etching of masking streets of the substrate, the substrate thereof is first thinned to have a thickness less than 100 μm, and then a backside metal layer is deposited to the backside of the substrate. By using the laser dicing process of the present invention, the semiconductor chips can be diced tidily. The fabrication tool capacity can be increased; the process cycle time can be reduced to nearly half; the usage of material can be reduced; the efficiency of heat dissipation of the diced single chip can be increased; and the die strength can be significantly enhanced.

BACKGROUND OF THE INVENTION

FIG. 1Ais a schematic view showing the front view side of the substrate of integrated circuit chips, which comprises a substrate101, and above the substrate101an active layer103is disposed and includes at least one integrated circuit. Each black block corresponds to an independent integrated circuit.

After the fabrication of integrated circuits, the substrate101has to be diced into independent single chips, so that each single chip contains an independent integrated circuit. A backside metal layer has to be deposited to the backside of the substrate101beforehand to provide improved adhesion strength and die strength for chip packaging thereafter.

However, when a backside metal layer is directly deposited to the backside of the substrate101, the fragments from the backside metal layer on the backside of the substrate104will be sprayed all around or adhered to the sidewall of scribe lines through the sawing wheel in the dicing process according to the conventional substrate dicing technique. Moreover, the metal fragments may adhere to the integrated circuits in the active layer103, which will damage the function of integrated circuits in the active layer103.

FIG. 1Bis a cross-sectional view showing the structure of an adhesive seed layer, a backside metal layer, and a photoresist layer formed on the backside of a substrate in a previous technology. After the fabrication of integrated circuits, the backside of the substrate101will be thinned first till the thickness of the substrate101is about 100 μm. Then, on the backside of the substrate101, an adhesive seed layer105, a backside metal layer107, and a photoresist layer109are formed sequentially.

FIG. 1Cis a cross-sectional view showing the structure of streets formed by etching the photoresist layer on the backside of the substrate in a previous technology. The streets111on the photoresist layer are formed by etching the photoresist layer109.

FIG. 1Dis a, cross-sectional view showing the structure of streets formed by etching the backside metal layer on the backside of the substrate in a previous technology. The streets113on the backside metal layer are formed by etching the backside metal layer107and the adhesive seed layer105.

FIG. 1Eis a cross-sectional view showing the structure after removing the photoresist layer at the backside of the substrate in a previous technology.

FIG. 1Fis a cross-sectional view showing the structure of a substrate diced by the dicing process of a previous technology. The substrate101is diced along the center of the backside metal layer streets113to form scribe lines115. The width of scribe lines115is narrower than the width of the backside metal layer streets113and thus it can prevent damages on the backside metal layer107and the adhesive seed layer105.

Independent single chips are produced after dicing, as shown by the schematic of a cross-sectional view of the structure of a single chip after substrate dicing in a previous technology inFIG. 1G. However, because the width of scribe lines115is narrower than the width of streets113on the backside metal layer, part of the backside metal layer streets113will not be cut off and will be remained there as the edge recess117. There are borders between the substrate101and the adhesive seed layer105and between the adhesive seed layer105and the backside metal layer107at the edge recess117. By etching the backside metal layer streets113, the borders between the substrate101and the adhesive seed layer105and between the adhesive seed layer105and the backside metal layer107is not able to form tidy interface, and therefore cracks and chipping may occur at the die edge. Thereby, the die strength is often insufficient, which leads to high probability of the occurrence of die-crack.

FIG. 1His a schematic view showing a process of laser scribing in a previous technology, which comprises a semiconductor wafer133, a laser device121and an optical lens135. The semiconductor wafer133comprises a device layer147, a substrate149and a metal layer151. The metal layer151contains a metal mirror sub-layer153and a gold sub-layer155. A contact143is configured on device layer147. And a contact wire145is deposited on contact143. The substrate149is made of silicon carbide (SiC) or sapphire (Al2O3). When the laser beam123is generated by laser device121, the laser beam123is focused and redirected by the optical lens135. The laser beam137is transparent to the material of substrate149, hence the laser beam137may be capable of passing through the transparent materials of substrate149with minimum loss of photons. The laser beam1.37passes through areas161next to street127and reaches the focal point157of the laser beam137. The focal point157of the laser beam137is at location125, which is located inside the substrate149closer to the backside131of the semiconductor wafer133. When the laser beam137reaches the focal point157, the high intensity laser beam137can scribe and weaken the crystal lattice at point157. After laser scribe, a scribing line159is used to induce a breakage along a crystal line parallel to a street for dicing dies from a wafer. After laser scribing, the semiconductor wafer133can easily be bended or broken into chips along the scribing line159. However, during bending or breaking process, the metal layer151may be cracked. Hence, the metal layer151may not fully cover the backside of the substrate149. And this may result poor die strength. The previous technology didn't disclose a process how to cut the metal layer.

In view of these facts and for overcoming the drawback stated above, the present invention provides a structure of semiconductor chips with enhanced die strength and a fabrication method thereof. The improved structure and the fabrication method according to the present invention not only have enhanced die strength, but also have improved heat conductance. The usage of material can be reduced, and the fabrication tool capacity can be increased, so that the fabrication cost can be significantly reduced.

SUMMARY OF THE INVENTION

The main object of the present invention is to provide a fabrication method for producing semiconductor chips with enhanced die strength, in which a backside metal layer is deposited directly to fully cover the backside of a substrate. By applying the laser dicing process of the present invention, the backside metal layer and the substrate can be diced tidily. Die cracking on the border between the substrate and the backside metal layer of the semiconductor chips after dicing can be prevented and thereby the die strength can be significantly enhanced. By applying the laser dicing process of the present invention, the fragments from the backside metal layer will not be sprayed all around, and there will be no metal fragment adhesion to the integrated circuits on the chips, and therefore the performance of the integrated circuits in the active layer will not be affected, and the product yield rate can be increased. And by applying the laser dicing process of the present invention, the wasted width in the dicing process is about 30 μm, which is much less than the wasted width 60 μm of the masking streets in the previous technology. Therefore, the density of integrated circuits implemented in the active layer can be increased; the substrate utilization and the density of chips can be increased; the usage of material can be decreased, and the material cost can be reduced.

Another object of the present invention is to provide a fabrication method for producing semiconductor chips with enhanced die strength, in which a backside metal layer is deposited directly to fully cover the backside of a substrate. The street masking step in the previous technology can be eliminated. Thereby the fabrication tool capacity can be increased, and the process cycle time can be reduced to nearly half. The fabrication cost can therefore be significantly reduced.

Another object of the present invention is to provide a fabrication method for producing semiconductor chips with enhanced die strength, in which, before depositing a backside metal layer to the backside of a substrate, the backside of the substrate can be thinned first. The substrate can be thinned to have a thickness less than 50 μm. Consequently, when drilling, dry etching, or any further processing is applied to the substrate, the process cycle time can be significantly reduced. The processing tool capacity can be increased and the depletion of the processing tools can be decreased. The fabrication cost can therefore be significantly reduced. Because the thickness of the substrate is thinned very thin, the efficiency of heat dissipation of a diced semiconductor chip in an application can be increased, which can prevent damages to the integrated circuits on the chip and maintain the performance of the integrated circuits on the chip. And the material thinned from the substrate can be recycled and then purified to make the substrate again, which can further reduce the fabrication cost.

Another object of the present invention is to provide a fabrication method for producing semiconductor chips with enhanced die strength, in which a backside metal layer is deposited directly to fully cover the backside of a substrate. By applying the laser dicing process of the present invention, the die strength of the semiconductor chips can be significantly enhanced. Because of the enhancement of the die strength, the thickness of the deposited backside metal layer can be thinner. A thickness of 3 μm of the backside metal layer is enough to provide the requested die strength. Thereby the amount of metal needed can be decreased, and the fabrication cost can therefore be significantly reduced.

To reach the objects stated above, the present invention provides a fabrication method for producing semiconductor chips with enhanced die strength, comprising following steps:

Step A1: forming an active layer on a front side of a substrate, in which the active layer comprises at least one integrated circuit;

Step A2: forming a backside metal layer on a backside of the substrate, in which the backside metal layer at least fully covers the area corresponding to the area covered by the at least one integrated circuit in the active layer, so as to form at least one semiconductor wafer with enhanced die strength by comprising the substrate, the active layer and the backside metal layer;

Step A3: forming a protection layer on a front side of the semiconductor wafer, in which the protection layer fully covers the at least one integrated circuit in the active layer;

Step A4: dicing the semiconductor wafer with enhanced die strength from the front side of the semiconductor wafer to a backside of the semiconductor wafer by at least one laser dicing process, whereby plural semiconductor chips with enhanced die strength are produced, and wherein the backside metal layer of the semiconductor chip fully covers the backside of the semiconductor chip after dicing; and

Step A5: removing the laser dicing residues and removing said protection layer by at least one etching process, wherein said laser dicing residues are generated during said at least one laser dicing process

In an embodiment, in Step A4 the power of the laser used in the at least one laser dicing process is larger than 2.7 W and smaller than 4.8 W.

In an embodiment, in Step A4 the area of the backside metal layer of the semiconductor chip is larger than or equal to the backside area of the substrate of the semiconductor chip.

In an embodiment, the fabrication method for producing semiconductor chips with enhanced die strength according to the present invention further comprises an A15 step between the Step A1 and the Step A2:

Step A15: grinding the backside of the substrate, so as to thin the substrate.

In an embodiment, in Step A1 the thickness of the substrate is larger than 10 μm and smaller than 200 μm.

In an embodiment, in Step A1 the material used for the substrate is GaAs, InP or Si.

In an embodiment, in Step A3 the protection layer is a photoresist.

In an embodiment, in Step A3 the thickness of the protection layer is larger than 0.5 μm and smaller than 20 μm.

In an embodiment, in Step in A5 the at least one etching process includes following two etching processes:

The first etching process: removing the laser dicing residues; and

The second etching process: removing the protection layer.

In an embodiment, in the first etching process uses a water solution of sulfuric acid (H2SO4) and hydrogen peroxide (H2O2).

In an embodiment, in the second etching process uses a water solution containing potassium borate and potassium hydroxide.

In an embodiment, in Step A2 the material used for the backside metal layer is metal or alloy.

In an embodiment, the metal is gold or copper.

In an embodiment in Step A2 the backside metal layer is deposited to the backside of the substrate by evaporation, electroplating, sputtering or molecular beam epitaxy (MBE).

In an embodiment, in Step A2 the backside metal layer fully covers the backside of the substrate.

In an embodiment, in Step A4 the at least one laser dicing process includes following two laser dicing processes:

The First laser dicing process: dicing the semiconductor wafer with enhanced die strength by using a laser from the front side of the semiconductor wafer to the sufficient depth of the substrate close to the backside metal layer, so as to accelerate the dicing of the substrate; and

The Second laser dicing process: dicing the semiconductor wafer with enhanced die strength by using a laser from the sufficient depth of the substrate close to the backside metal layer to the backside of the semiconductor wafer, so as to reduce melting fragment of the backside metal layer.

In an embodiment, the power of the laser used in the first laser dicing process is larger than 2.7 W and smaller than 4.8 W; the power of the laser used in the second laser dicing process is larger than 3.5 W and smaller than 4.3 W.

In an embodiment, the sufficient depth of the substrate close to the backside metal layer is thicker than 50% of the substrate thickness and thinner than 95% of the substrate thickness.

For further understanding the characteristics and effects of the present invention, some preferred embodiments referred to drawings are in detail described as follows.

DETAILED DESCRIPTIONS OF PREFERRED EMBODIMENTS

FIG. 2Ais a cross-sectional view showing the structure of the substrate of integrated circuit chips of the present invention before back thinning, which comprises a substrate201; an active layer203disposed above the substrate201. The substrate201is formed preferably of GaAs, InP or Si. The active layer203includes at least one integrated circuit. In an embodiment, the active layer203usually includes plural independent integrated circuits, which will be cut into plural independent semiconductor chips and then packaged to make product.

A backside metal layer has to be deposited to the backside of the substrate201before dicing, which can enhance the die strength on one hand, and facilitate the adhesion in packaging on the other hand. In an embodiment, before depositing a backside metal layer to the backside of the substrate201, the backside of the substrate201will be thinned first. The thickness of the substrate201is preferably larger than 10 μm and smaller than 200 μm after thinning.

In an embodiment, the substrate201is thinned to have the thickness of about 50 μm to 100 μm.FIG. 2Bshows the cross-sectional view of the substrate of integrated circuit chips of the present invention after back thinning. It is shown inFIG. 2Bthat the substrate201becomes thinner after back thinning. The thinned backside of the substrate201provides a region207for the backside metal layer deposition.

Next, as shown inFIG. 2C, which is a cross-sectional view of the substrate with the deposited backside metal layer of the present invention, a backside metal layer209is deposited to the region207for the backside metal layer deposition. An adhesive seed layer (not shown in the figures) may grown on the region207for the adhesion of the backside metal layer209before depositing the backside metal layer209to the region207. The semiconductor wafer231with enhanced die strength comprises the substrate201, the active layer203and the backside metal layer209.

The backside metal layer209is formed preferably of metal or alloy, and the metal is preferably gold or copper. The backside metal layer209is deposited to the region207on the backside of the substrate201preferably by evaporation, electroplating, sputtering or MBE.

The thickness of the backside metal layer209is larger than 0.1 μm and smaller than 50 μm. In an embodiment, the thickness of the backside metal layer209is preferably around 3 μm. The backside metal layer209should be able to cover at least the backside area of the substrate201corresponding to the area covered by the integrated circuits in the active layer203. Moreover, the backside metal layer209can be larger than or equal to the area covered by the integrated circuits in the active layer203. In an embodiment, the region207on the backside of the substrate201can be completely covered by the deposited backside metal layer209, which makes the fabrication process more simplified.

As shown inFIG. 2D, which is a cross-sectional view of the semiconductor wafer with the deposited protection layer of the present invention, a protection layer221is formed on a front side of the semiconductor wafer231, in which the protection layer221fully covers every integrated circuit in the active layer203. The protection layer221can be a thin film of photoresist or other suitable materials. The photoresist is covered on the active layer203by spin coating and then dried by heating. In an embodiment, the baking temperature is usually about 60 degree in C. and the baking time is about 60 minutes. The thickness of the protection layer221is larger than 0.5 μm and smaller than 20 μm. In an embodiment, the typical thickness of protection layer221is about 1.5 μm.

As shown inFIG. 2E, which is a cross-sectional view of the laser dicing the semiconductor wafer of the present invention, cutting the semiconductor wafer231with enhanced die strength is performed by using the laser dicing method disclosed by the present invention. The laser dicing method includes two laser dicing processes, the first one laser dicing process and the second laser dicing process.

As shown inFIG. 2F, which is a cross-sectional view of the first laser dicing process of the present invention, in the first laser dicing process, a laser device223is deposited above the semiconductor wafer231with enhanced die strength. After aligning, the laser dicing the protection layer221and the semiconductor wafer231from the front side of the semiconductor wafer231to the sufficient depth233of the substrate201close to the backside metal layer209, so as to accelerate the dicing of the substrate201.

The needed laser power for dicing the protection layer221and the semiconductor wafer231is related to the material of the substrate201and the thickness of the substrate201. And the sufficient depth233of the substrate201close to the backside metal layer209is also dependent on the thickness of the substrate201and the material of the substrate201. If the substrate201is thicker, the laser needs higher power for dicing. And if the material of the substrate201is harder, the laser needs higher power for dicing. If the substrate201is thicker, the sufficient depth233of the substrate201close to the backside metal layer209is deeper.

To choose the suitable power of laser for dicing the semiconductor wafer231to the sufficient depth233of the substrate201close to the backside metal layer209needs to do experimental testing. The experience of the experimental testing will conclude an optimal solution. In most of the cases, the power of the laser used in the first laser dicing process is larger than 4.2 W and smaller than 4.8 W. And the sufficient depth233of the substrate201close to the backside metal layer209is thicker than 80% of the substrate201thickness and thinner than 90% of the substrate201thickness. In some special cases, the minimum laser power needed for dicing is 2.7 W. Hence, in an embodiment, for the GaAs substrate201, the power of the laser used in the first laser dicing process is larger than 2.7 W and smaller than 4.8 W. And in an embodiment, the sufficient depth233of the substrate201close to the backside metal layer209is thicker than 50% of the substrate201thickness and thinner than 95% of the substrate201thickness.

As shown inFIG. 2G, which is a cross-sectional view of the second laser dicing process of the present invention, following the first laser dicing process is the second laser dicing process. The laser dicing the semiconductor wafer231with enhanced die strength from the sufficient depth233of the substrate201close to the backside metal layer209to the backside of the semiconductor wafer231, so as to reduce melting fragment of the backside metal layer209. The needed laser power for dicing the semiconductor wafer231is mostly dependent of the material of the backside metal layer209and the thickness of the backside metal layer209. In an embodiment, the power of the laser used in the second laser dicing process is larger than 3.5 W and smaller than 4.3 W.

For some special cases, especially when the substrate201is thinner than 50 μm, it is more efficient to dice the semiconductor wafer231by only one laser dicing process. As shown inFIG. 2H, a schematic showing the cross-sectional view of one laser dicing process of the present invention, the laser directly dices the protection layer221and the semiconductor wafer231from the front side of the semiconductor wafer231to the backside of the semiconductor wafer231. It is an example of cutting the semiconductor wafer231with the thickness of the substrate201is larger than 10 μm and smaller than 50 μm. In an embodiment, the power of the laser used in the laser dicing process is larger than 3.5 W and smaller than 4.3 W.

The width of each scribe lines211is 30 μm. After dicing, each of the scribe lines211will waste about the width of 30 μm of the substrate201and the backside metal layer209. By using the laser dicing process of the present invention, the fragments from the backside metal layer209will not be sprayed all around, and there will be no metal fragment adhered to the integrated circuits in the active layer203, and therefore the performance of the integrated circuits in the active layer203will not be affected, and the product yield rate can be improved.

As shown inFIG. 2I, it is a cross-sectional view showing the semiconductor chips after laser dicing process of the present invention. During the laser dicing process, there will generate some laser dicing residues. The laser dicing residues needs to be removed. And also the protection layer221needs to be removed too. It is possible to remove the laser dicing residues and the protection layer221by an etching process. The etching process usually is a wet etching process. However it is more perfect to remove the laser dicing residues and remove the protection layer221separately by two separate etching processes. In the first etching process, a first water solution is used to remove the laser dicing residues. In the second etching process, a second water solution is used to remove the protection layer221. In an embodiment, the first water solution is a water solution of sulfuric acid (H2SO4) and hydrogen peroxide (H2O2). In another embodiment, the second water solution is a water solution containing potassium borate and potassium hydroxide.

As shown inFIG. 2J, is a cross-sectional view showing the structure of a semiconductor chip with enhanced die strength of the present dicing technique. After etching process, plural semiconductor chips235with enhanced die strength are produced, and wherein the backside metal layer209of the semiconductor chip235fully covers the backside of the semiconductor chip235. The semiconductor chip235comprises: a substrate201; an active layer203formed above the substrate201, which includes at least one integrated circuit; a backside metal layer209is deposited to the backside of the substrate201, which fully covers the backside of the substrate201, and the area of the backside metal layer209is larger than or equal to the area of the substrate201. After dicing, the border between the substrate201and the backside metal layer209near the edge of the semiconductor chip235is the border215. By applying the laser dicing process of the present invention, the backside metal layer209and the substrate201can be cut tidily, and the composition at the border215remains intact, and therefore die cracking on the border215between the substrate201and the backside metal layer209can be prevented. Thereby, the die strength of the semiconductor chips235can be largely enhanced.

To sum up, by applying the laser dicing process of the present invention, the semiconductor chips can be diced tidily without back etching of masking street beforehand, and the substrate can be thinned to have the thickness thinner than 100 μm. It can increase the fabrication tool capacity. The process cycle time can be reduced to nearly half, and the usage of materials can be reduced. The heat dissipation efficiency of the diced single chip can be improved, and the die strength will be largely enhanced. The present invention indeed can get its anticipatory object, and provide improved fabrication process stability and device reliability.

The description referred to the drawings stated above is only for the Preferred embodiments of the present invention. Many equivalent local variations and modifications can still be made by those skilled at the field related with the present invention and do not depart from the spirits of the present invention, so they should be regarded to fall into the scope defined by the appended claims.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1Ais a schematic view showing the front and the back views of the substrate of integrated circuit chips.

FIG. 1Bis a cross-sectional view of the structure of an adhesive seed layer, a backside metal layer, and a photoresist layer formed on the backside of a substrate according to a previous technology.

FIG. 1Cis a cross-sectional view of the structure of streets formed by etching the photoresist layer on the backside of a substrate according to a previous technology

FIG. 1Dis a cross-sectional view of the structure of streets formed by etching the backside metal layer on the backside of the substrate according to a previous technology.

FIG. 1Eis a cross-sectional view of the structure after removing the photoresist layer at the backside of the substrate according to a previous technology.

FIG. 1Fis a cross-sectional view of the structure of a diced substrate according to a previous technology.

FIG. 1Gis a cross-sectional view of the structure of a single chip after substrate dicing according to a previous technology.

FIG. 1His a schematic view showing a process of laser scribing in a previous technology.

FIG. 2Ais a cross-sectional view of the structure of the substrate of integrated circuit chips of the present invention before back thinning.

FIG. 2Bis a cross-sectional view of the structure of the substrate of integrated circuit chips of the present invention after back thinning.

FIG. 2Cis a cross-sectional view of the structure of a substrate with the deposited backside metal layer of the present invention.

FIG. 2Dis a cross-sectional view of the semiconductor wafer with the deposited protection layer of the present invention,

FIG. 2Eis a cross-sectional view of the laser dicing the semiconductor wafer of the present invention.

FIG. 2Fis a cross-sectional view of the first laser dicing process of the present invention.

FIG. 2Gis a cross-sectional view the second laser dicing process of the present invention.

FIG. 2His a cross-sectional view of one laser dicing process of the present invention.

FIG. 2Iis a cross-sectional view of semiconductor chips after laser dicing process of the present invention.

FIG. 2Jis a cross-sectional view of the structure of a semiconductor chip with enhanced die strength of the present dicing technique.