A class-D amplifier with low pop-click noise is shown. A loop filter, a control signal generator, a first power driver, and a first feedback circuit are provided within the class-D amplifier to establish a first loop for signal amplification. The class-D amplifier further has a settling circuit and a pre-charging circuit. The settling circuit is configured to be combined with the loop filer and the control signal generator to establish a second loop to settle the loop filter and the control signal generator before the first loop is enabled. The pre-charging circuit is configured to pre-charge a positive output terminal and a negative output terminal of the first power driver.

BACKGROUND OF THE INVENTION

Field of the Invention

The present invention relates to class-D amplifier.

Description of the Related Art

A class-D audio amplifier is basically a switching amplifier or a pulse width modulation (PWM) amplifier. In this type of amplifier, the metal-oxide-silicon transistors (MOSs) of the power driver are either fully on or fully off, significantly reducing the power losses in the output stage. A high-efficiency amplifier is achieved.

Use of class-D amplifiers is common in audio applications. However, due to the PWM control of the MOSs of the power driver, a huge current may be suddenly poured into the load (e.g., a speaker). A conventional class-D amplifier may result in a severe pop-click noise. Pop-click noise is a critical problem in audio systems, especially for earphones and EarPods. How to eliminate pop-click noise is an important issue in the field of class-D amplifiers.

BRIEF SUMMARY OF THE INVENTION

In the present invention, a solution to eliminate the pop-click noise is proposed.

A class-D amplifier in accordance with an exemplary embodiment of the present invention includes a loop filter, a control signal generator, a first power driver, and a first feedback circuit, which are configured to establish a first loop for signal amplification. The class-D amplifier further has a settling circuit and a pre-charging circuit. The settling circuit is configured to be combined with the loop filer and the control signal generator to establish a second loop to settle the loop filter and the control signal generator before the first loop is enabled. The pre-charging circuit is configured to pre-charge a positive output terminal and a negative output terminal of the first power driver which are a first positive feedback terminal and a second negative feedback terminal, respectively.

The pre-charging circuit may pre-charge the positive output terminal and the negative output terminal of the first power driver to a common voltage. The second loop may be disabled when the first loop is enabled. The settling circuit may include a second power driver and a second feedback circuit. When the second loop is enabled, the second power driver is controlled by the control signal generator to output a second feedback signal and, via the second feedback circuit, the second feedback signal is coupled to the loop filter.

In an exemplary embodiment, a common-mode terminal of the second power driver is coupled to the positive output terminal and the negative output terminal of the first power driver via the pre-charging circuit to pre-charge the positive output terminal and the negative output terminal of the first power driver to the common voltage. The second power driver may have a second positive feedback terminal and a second negative feedback terminal operative to output the second feedback signal to be transferred by the second feedback circuit. The second power driver may further have a first resistor and a second resistor coupled in series between the second positive feedback terminal and the second negative feedback terminal. A connection terminal between the first resistor and the second resistor is the common-mode terminal of the second power driver.

In an exemplary embodiment, the second power driver comprises a second positive feedback terminal and a second negative feedback terminal, operative to output the second feedback signal to be transferred by the second feedback circuit. After the positive output terminal and the negative output terminal of the first power driver are pre-charged to the common voltage, if the control signal generator operates the second power driver to set the second positive feedback terminal and the second negative feedback terminal both to the common voltage, the first loop is enabled and the second loop is disabled.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 1depicts a class-D amplifier in accordance with an exemplary embodiment of the present invention. The class-D amplifier driving a speaker102includes a loop filter104, a control signal generator106, a first power driver108, a first feedback circuit110, a second power driver112, a second feedback circuit114, and a pre-charging circuit116.

In one embodiment of the present invention, the control signal generator106can be a pulse width modulation (PWM) signal generator to generate the control signals, and the control signals can be a pulse width modulation (PWM) signals. The loop filter104, control signal generator106, first power driver108, and first feedback circuit110are configured to establish a first loop for signal amplification. An analog input signal between a positive input terminal Vip and a negative input terminal Vin of the class-D amplifier is amplified by the first loop and output from the first power driver108to drive the speaker102. The speaker102is coupled to a positive output terminal Vop (a first positive feedback terminal) and a negative output terminal Von (a second positive feedback terminal) of the first power driver108.

The second power driver112and the second feedback circuit114form a settling circuit. The settling circuit (including the second power driver112and the second feedback circuit114) is configured to be combined with the loop filter104and the control signal generator106to establish a second loop to settle the loop filter104and the control signal generator106before the first loop for signal amplification is enabled.

The pre-charging circuit116is configured to pre-charge the positive output terminal Vop and the negative output terminal Von. By the pre-charging, a sudden voltage drop between the positive output terminal Vop and the negative output terminal Von is suppressed, and thereby the pop-click noise is eliminated. The speaker102does not output high-pitched noise when being turned on.

In an exemplary embodiment, the pre-charging circuit116pre-charges the positive output terminal Vop and the negative output terminal Von to a common voltage. The voltage drop between the positive output terminal Vop and the negative output terminal Von is suppressed to zero before the first loop for signal amplification is enabled. The pop-click noise is perfectly eliminated.

In an exemplary embodiment, the second loop for circuit settling is disabled (e.g., an enable signal AuxEn is deasserted) when the first loop for signal amplification is enabled (e.g., an enable signal mainEn is asserted).

When the second loop is enabled, the second power driver112is controlled by the control signal generator106to output a second feedback signal via a second positive feedback terminal Vap and a second negative feedback terminal Van, and the second feedback circuit114couples the second feedback signal to the loop filter104to establish a negative feedback for circuit settling. A resistor Rap couples the second positive feedback terminal Vap to the input port of the class-D amplifier to be combined with the negative input signal Vin and then fed to the negative input terminal of the loop filter104. A resistor Ran couples the second negative feedback terminal Van to the input port of the class-D amplifier to be combined with the positive input signal Vip and then fed to the positive input terminal of the loop filter104.

There are various designs for the pre-charging circuit116.

In an exemplary embodiment, a common-mode terminal ‘cm’ of the second power driver112is coupled to the positive output terminal Vop and the negative output terminal Von via the pre-charging circuit116, to pre-charge the positive output terminal Vop and the negative output terminal Von to the common voltage.

FIG. 2illustrates circuits of the first power driver108, the second power driver112, and the pre-charging circuit116in accordance with an exemplary embodiment of the present invention. The second power driver112has resistors R1and R2coupled in series between the second positive feedback terminal Vap and the second negative feedback terminal Van. A connection terminal between the resistors R1and R2is the common-mode terminal ‘cm’ of the second power driver112. The resistance of the resistor R1may equal the resistance of the resistor R2. The pre-charging circuit116has resistors Rpc1and Rpc2and switches Spc1and Spc2. When the pre-charging circuit116is enabled (e.g., an enable signal PreC_En is asserted), the switches Spc1and Spc2are closed to couple the common-mode voltage at the common-mode terminal ‘cm’ of the second power driver112to both of the positive output terminal Vop and the negative output terminal Von. The positive output terminal Vop and the negative output terminal Von, therefore, are pre-charged to the common voltage and thereby the pop-click noise of the speaker102is eliminated.

As shown, the architecture of the second power driver112may be similar to the architecture of the first power driver108.

The first power driver108comprises four metal-oxide-silicon transistors (MOSs) Mm1, Mm2, Mm3and Mm4. When the first loop is enabled, the enable signal mainEn is asserted and the disable signal mainEnB is deasserted. Control signals PWMA_p, PWMA_n, PWMB_p, and PWMB_n generated by the control signal generator106are coupled to the gates of the MOSs Mm1, Mm2, Mm3and Mm4, respectively. The MOS Mm1is configured to couple the positive output terminal Vop to a power supply terminal according to the control signal PWMA_p. The MOS Mm2is configured to couple the positive output terminal Vop to a ground terminal according to the control signal PWMA_n. The MOS Mm3is configured to couple the negative output terminal Von to the power supply terminal according to the control signal PWMB_p. The MOS Mm4is configured to couple the negative output terminal Von to the ground terminal according to the control signal PWMB_n. The control signal PWMA_p may equal the control signal PWMA_n. The control signal PWMB_p may equal the control signal PWMB_n.

The second power driver112comprises four MOSs Ma1, Ma2, Ma3and Ma4. When the second loop is enabled, the enable signal AuxEn is asserted and the disable signal AuxEnB is deasserted. The control signals PWMA_p, PWMA_n, PWMB_p, and PWMB_n are coupled to the gates of the MOSs Ma1, Ma2, Ma3and Ma4, respectively. The MOS Ma1is configured to couple the second positive feedback terminal Vap to the power supply terminal according to the control signal PWMA_p. The MOS Ma2is configured to couple the second positive feedback terminal Vap to the ground terminal according to the control signal PWMA_n. The MOS Ma3is configured to couple the second negative feedback terminal Van to the power supply terminal according to the control signal PWMB_p. The MOS Ma4is configured to couple the second negative feedback terminal Van to the ground terminal according to the control signal PWMB_n.

FIG. 3is a flowchart depicting an enable/disable scheme of the different circuit blocks. In step S302, the loop filter104and the control signal generator106are enabled. In step S304, the second loop is enabled (e.g., the enable signal AuxEn is asserted and the disable signal AuxEnB is deasserted). In step S306, the pre-charging circuit116is enabled (e.g., the enable signal PreC_En is asserted) to couple the common-mode terminal cm of the second power driver112to both of the positive output terminal Vop and the negative output terminal Von. In step S308, the first loop is enabled (e.g., the enable signal mainEn is asserted and the disable signal mainEnB is deasserted) and the second loop is disabled (e.g., the enable signal AuxEn is deasserted and the disable signal AuxEnB is asserted). In step S310, the pre-charging circuit116is disabled (e.g., the enable signal PreC_En is deasserted).

In another exemplary embodiment, the timing to enable the first loop depends on the status of the control signals generated by the control signal generator106. After the positive output terminal Vop and the negative output terminal Von are pre-charged to the common voltage, if the control signal generator106operates the second power driver112to set the second positive feedback terminal Vap and the second negative feedback terminal Van both to the common voltage, the first loop is enabled (e.g., the enable signal mainEn is asserted and the disable signal mainEnB is deasserted) and the second loop is disabled (e.g., the enable signal AuxEn is deasserted and the disable signal AuxEnB is asserted).

FIG. 4illustrates circuits of the first power driver108, the second power driver112, and the pre-charging circuit116in accordance with an exemplary embodiment of the present invention. As shown, in this exemplary embodiment, the common voltage is not provided by the second power driver112. Instead, a high-level voltage (at the power supply terminal) or a low-level voltage (at the ground terminal) is coupled to both of the positive output terminal Vop and the negative output terminal Von by operating the pre-charging circuit116. The resistors R1and R2of the second power driver112may be replaced by any impedance device.

The pre-charging circuit116includes switches Sh1and Sh2. The switch Sh1is coupled between a gate of the MOS Mm1and the ground terminal. The switch Sh2is coupled between a gate of the MOS Mm3and the ground terminal. The switches Sh1and Sh2both are controlled by a pre-charging control signal Set_H. In the pre-charging phase, the pre-charging control signal Set_H is asserted, and the gates of the MOSs Mm1and Mm3are coupled to the ground terminal. Thus, the p-type MOSs Mm1and Mm3are turned on and the positive output terminal Vop and the negative output terminal Von are coupled to the power supply terminal. In this case, the positive output terminal Vop and the negative output terminal Von are pre-charged to a high-voltage level. After the pre-charging, the timing to enable the first loop depends on the status of the control signals PWMA_p, PWMA_n, PWMB_p, and PWMB_n. The first loop is enabled (e.g., the enable signal mainEn is asserted and the disable signal mainEnB is deasserted) when the control signals PWMA_p, PWMA_n, PWMB_p, and PWMB_n all are low. When the control signals PWMA_p, PWMA_n, PWMB_p, and PWMB_n all are low, the second positive feedback terminal Vap and the second negative feedback terminal Van both are coupled to the power supply terminal (i.e., set to the common voltage). The common voltage is fed to the class-D amplifier as the initial input. Because the first loop is enabled in such a situation, the positive output terminal Vop and the negative output terminal Von are kept at the high-voltage level (due to the turned-on MOSs Mm1and Mm3). There is no voltage drop between the pre-charging state and the initial state. Pop-click noise is perfectly eliminated from the speaker102.

FIG. 4further shows another design for pre-charging. The pre-charging circuit116includes switches Sl1and Sl2. The switch Sl1is coupled between a gate of the MOS Mm2and the power supply terminal. The switch Sl2is coupled between a gate of the MOS Mm4and the power supply terminal. The switches Sl1and Sl2both are controlled by a pre-charging control signal Set_L. In the pre-charging phase, the pre-charging control signal Set_L is asserted, and the gates of the MOSs Mm2and Mm4are coupled to the power supply terminal. Thus, the n-type MOSs Mm2and Mm4are turned on and the positive output terminal Vop and the negative output terminal Von are coupled to the ground terminal. In this case, the positive output terminal Vop and the negative output terminal Von are pre-charged to a low-voltage level. After the pre-charging, the timing to enable the first loop depends on the status of the control signals PWMA_p, PWMA_n, PWMB_p, and PWMB_n. The first loop is enabled (e.g., the enable signal mainEn is asserted and the disable signal mainEnB is deasserted) when the control signals PWMA_p, PWMA_n, PWMB_p, and PWMB_n all are high. When the control signals PWMA_p, PWMA_n, PWMB_p, and PWMB_n all are high, the second positive feedback terminal Vap and the second negative feedback terminal Van both are coupled to the ground terminal (i.e., set to the common voltage). The common voltage is fed to the class-D amplifier as the initial input. Because the first loop is enabled in such a situation, the positive output terminal Vop and the negative output terminal Von are kept at the low-voltage level (due to the turned-on MOSs Mm2and Mm4). There is no voltage drop between the pre-charging state and the initial state. Pop-click noise is perfectly eliminated from the speaker102.

FIG. 5is a flowchart depicting an enable/disable scheme of the different circuit blocks. In step S502, the loop filter104and the control signal generator106are enabled. In step S504, the second loop is enabled (e.g., the enable signal AuxEn is asserted and the disable signal AuxEnB is deasserted). In step S506, the pre-charging circuit116is enabled (e.g., pre-charging control signal Set_H/Set_L is asserted) to pre-charge both of the positive output terminal Vop and the negative output terminal Von to the power-supply level/ground level. In step S508, the status of the control signals PWMA_p, PWMA_n, PWMB_p, and PWMB_n are checked to determine the timing to enable the first loop. In the case wherein the positive output terminal Vop and the negative output terminal Von are pre-charged to the power-supply level, step S508checks whether all control signals PWMA_p, PWMA_n, PWMB_p, and PWMB_n are low. If yes, step S510is performed to enable the first loop (e.g., the enable signal mainEn is asserted and the disable signal mainEnB is deasserted), disable the second loop (e.g., the enable signal AuxEn is deasserted and the disable signal AuxEnB is asserted), and deassert the pre-charging control signal Set_H. In the case wherein the positive output terminal Vop and the negative output terminal Von are pre-charged to the ground level, step S508checks whether all control signals PWMA_p, PWMA_n, PWMB_p, and PWMB_n are high. If yes, step S510is performed to enable the first loop (e.g., the enable signal mainEn is asserted and the disable signal mainEnB is deasserted), disable the second loop (e.g., the enable signal AuxEn is deasserted and the disable signal AuxEnB is asserted), and deassert the pre-charging control signal Set_L.

Slight modification of the circuits of the first/second power driver108/112and the pre-charging circuit116is allowed.