Multi-die molded substrate integrated circuit device

One embodiment includes a substrate having a plurality of dies and a support frame made of molding material which is molded between adjacent dies so as to join together and support adjacent dies. The embodiment further has a plurality of interconnects formed on selected die terminals and the molding material of the support frame joining adjacent dies. The interconnects may be formed utilizing a variety of techniques including those of the type used in conventional wafer fabrication techniques. Other embodiments are described and claimed.

BACKGROUND

Description of Related Art

Integrated circuits typically include various active and passive circuit elements which have been integrated into a piece of semiconductor material, often referred to as a die. The die may, in turn, be encapsulated into a package, which often includes a ceramic or plastic substrate although other materials may be used. These packages are usually attached to a printed circuit board, often by connecting pins arranged along the periphery of the package. In this manner, an electronic system can be assembled by connecting various integrated circuit packages to a printed circuit board.

In addition to mechanically connecting the integrated circuit package to the printed circuit board, the connecting pins also typically provide separate electrical connection terminals between the printed circuit board and the various inputs and outputs of the integrated circuit within the package. To increase the number of connection terminals, other package designs have been utilized. For example, in the pin grid array (PGA) and ball grid array (BGA) packages, a large number of input/output (I/O) connection terminals are disposed in a two dimensional array over a substantial portion of a major surface of the package.

To increase space utilization, two or more integrated circuit dies may be attached to a printed circuit board in a stacked arrangement. The dies may be interconnected in a die-to-die stacked arrangement. Alternatively, each die may be placed in a package and the two packages may be stacked in a package-to-package arrangement.FIG. 1ashows an exploded view of one such known package-to-package stack indicated generally at10. The stack10includes a first integrated circuit package12, and a second integrated circuit package14which are physically and electrically connected together as shown inFIG. 1busing an interposer16.

The integrated circuit package12includes a package substrate20on which an integrated circuit die22is mechanically and electrically connected by a plurality of solder bumps24. Similarly, the integrated circuit package14includes a package substrate26to which an integrated circuit die28is mechanically and electrically connected by a plurality of solder bumps30. Other electrical connectors including wires may be used in place of or in addition to the solder bumps24,30. The package substrates20,26may have both internal and exterior conductors which are electrically connected to the solder bumps24,30or to contact pads on the dies22,28.

The dies22,28may be encapsulated in a polymer such as an epoxy layer32depicted for the die28. The inputs and outputs of the stack10may be electrically connected to a printed circuit board using connection pins, solder bumps or other connection terminals.

As best seen inFIG. 1c, the interposer16includes a generally rectangular ring-shaped frame34which may be constructed of a dielectric material such as plastic or ceramic, for example. The frame34has a plurality of apertures distributed about its periphery into which plugs36may be punched into the frame apertures and secured therein in an interference fit. The plugs36are typically formed of an electrically conductive material such as copper and may each be bonded to aligned contact pads40and42of the package substrates20and26, respectively, as shown inFIG. 1b. The copper plugs36may be bonded to the contact pads40,42of the package substrates20,26using stencil printed solder or other materials including electroplated solder, ink jet solder or adhesives or using other bonding techniques including thermocompression and thermosonic joining.

Each plug36can provide a separate electrical interconnection between the packages12and14. The center to center spacing or “pitch” between adjacent force fit plugs36may be as low as 300 microns, in some applications. Interposers may be used to provide die-to-die or die-to-package substrate interconnections.

DETAILED DESCRIPTION OF THE ILLUSTRATED EMBODIMENTS

FIG. 2illustrates a computing environment in which aspects of described embodiments may be embodied. A computer50includes one or more central processing units (CPU)52(only one is shown), a memory60(e.g., a volatile memory device), and a plurality of controllers62a,62b. . .62n. Each of the CPU52, and controllers62a,62b. . .62ninclude one or more electronic devices. Once such electronic device is represented by an electronic device100(FIGS. 3a,3b) which is electrically and mechanically coupled to a printed circuit board102. In accordance with one aspect of the present description, the device100of this embodiment includes a substrate103having a plurality of dies104a,104b,104cand a support frame106made of molding material107which is molded between adjacent dies104a,104b,104cso as to join together and support adjacent dies104a,104b,104c. Each die104a,104b,104chas one or more integrated circuits and a plurality of terminals108electrically coupled to the integrated circuit of the particular die.

In accordance with another aspect of the present description, the device100further has a plurality of interconnects110formed on selected die terminals and the molding material107of the support frame106joining adjacent dies of the dies104a,104b,104c. As explained in greater detail below, the interconnects110may be formed utilizing a variety of techniques including those of the type used in conventional wafer fabrication techniques. In the illustrated embodiment, the resulting pitch or spacings of the interconnects110may, depending upon the particular application, be relative fine by comparison to other multi-die packaging techniques. It is appreciated that in other applications, features other than fine pitch spacings between interconnects may be realized in addition thereto or instead of, in utilizing a multi-die molded substrate integrated circuit device in accordance with the present description.

The printed circuit board102(FIG. 2) may be a single layer or multi-layered motherboard which has a plurality of conductive lines that provide communication between the circuits in the device100and other components mounted to the board102. Alternatively, one or more of the CPU52, memory60and controllers62a,62b. . .62nmay be disposed on other cards such as daughter cards or expansion cards.

An operating system and various applications execute on the CPU52and reside in the memory60. The content residing in memory60may be cached in accordance with appropriate caching techniques. Programs and data in memory60may be swapped into storage64(e.g., a non-volatile storage, such as magnetic disk drives, optical disk drives, a tape drive, etc.) as part of memory management operations. The computer50may comprise any computing device, such as a mainframe, server, personal computer, workstation, laptop, handheld computer, telephony device, network appliance, virtualization device, storage controller, network controller, etc. Any suitable CPU52and operating system may be used. The computer50may also employ dedicated processors in addition to or instead of a CPU.

The controllers62a,62b. . .62nmay include a system controller, peripheral controller, memory controller, hub controller, I/O bus controller, video controller, network controller, storage controller, etc. For example, a storage controller can control the reading of data from and the writing of data to the storage64in accordance with a storage protocol layer. The storage protocol of the layer may be any of a number of suitable storage protocols. Data being written to or read from the storage64may be cached in accordance with appropriate caching techniques.

A network controller can include one or more protocol layers to send and receive network packets to and from remote devices over a network70. The network70may comprise a Local Area Network (LAN), the Internet, a Wide Area Network (WAN), Storage Area Network (SAN), etc. Embodiments may be configured to transmit data over a wireless network or connection. In certain embodiments, the network controller and various protocol layers may employ the Ethernet protocol over unshielded twisted pair cable, token ring protocol, Fibre Channel protocol, etc., or any other suitable network communication protocol. In some embodiments, the computer50may not be connected to a network70or may lack storage64.

A video controller can render information on a display monitor, and may be embodied on a video card or integrated on integrated circuit components mounted on the motherboard. Certain of the devices may have multiple cards or controllers. An input device72is used to provide user input to the computer50, and may include a keyboard, mouse, pen-stylus, microphone, touch sensitive display screen, or any other suitable activation or input mechanism. An output device74is capable of rendering information transmitted from the processor CPU52, or other component, such as a display monitor, printer, storage, etc.

In certain embodiments, the multi-die molded substrate embodiments may be embodied in a computer system including a video controller to render information to display on a monitor coupled to a computer system comprising a desktop, workstation, server, mainframe, laptop, handheld computer, etc. Alternatively, the multi-die molded substrate embodiments may be embodied in a computing device that does not include a video controller, such as a switch, router, etc.

A network controller or other devices described herein may be mounted on an expansion card, such as a Peripheral Component Interconnect (PCI) card, PCI-express or some other I/O expansion card coupled to a motherboard, or on integrated circuit components mounted on the motherboard. Integrated circuit dies may be packaged individually, stacked in packages or may utilize a multi-die molded substrate in accordance with the description provided herein. Thus, multi-die molded substrate embodiments may be embodied in computer systems or other systems in which a multi-die molded substrate in accordance with the present description is mounted on one or both of a motherboard and an expansion card. Accordingly, in some system embodiments, the system may lack an expansion card, and a multi-die molded substrate in accordance with the present description may be mounted on a motherboard. In another system embodiment, a multi-die molded substrate in accordance with the present description may be mounted on an expansion card but not on a motherboard.

Details on the PCI architecture are described in “PCI Local Bus, Rev. 2.3”, published by the PCI-SIG. Details on the Fibre Channel architecture are described in the technology specification “Fibre Channel Framing and Signaling Interface”, document no. ISO/IEC AWI 14165-25. Details on the Ethernet protocol are described in publications including “IEEE std. 802.3,” published Mar. 8, 2002, and “IEEE std. 802.11,” published 1999-2003.

FIG. 4shows an example of operations to fabricate a multi-die molded substrate integrated circuit device in accordance with one embodiment of the present description. In one operation, a plurality of separate dies are joined (block120) using a molding material to form a substrate having the plurality of dies joined together with molding material between adjacent dies. Each die has an integrated circuit formed thereon. In one embodiment, the substrate may be molded in the shape of a semiconductor wafer. For example,FIG. 5shows a substrate130in which molding material has been molded around the separate dies104a,104b,104cin the shape and size resembling a conventional semiconductor wafer, wherein the molding material107fills spaces between the dies104a,104b,104c.

As used herein, the term “molding” refers to shaping a malleable or fluid like material having a suitable viscosity susceptible to shaping, and may utilize molds in some shaping processes but may not utilize molds in other shaping processes. The term “molding material” refers to any material which has an initial malleable or fluid like state which is susceptible to being shaped, and may be subsequently cured to a hardened or stiff, solid state in which the cured material is capable of binding dies together and providing structural support to the dies. Examples of suitable molding materials include polymers such as polymeric molding compounds used in wire bonding. Polymeric molding compounds are electrically insulating and are often used to protect conductive wire bonds in a wire bonded package. It is appreciated that a wide variety of materials are suitable molding materials.

As used herein, “curing” refers to any process which causes a molding material to transition from its initial malleable or fluid like state, and to the subsequent hardened or stiff, solid state. Curing may involve subjecting the molding material to a raised temperature, or adding additional materials such as epoxy part a or epoxy part b, for example. Other curing processes may involve simply allowing the molding material to set for a particular length of time and may not involve raised temperatures or added components. It is appreciated that the particular curing processing may depend upon the particular molding material utilized.

A molded wafer may be relatively flat and thin and may be circular in shape as shown inFIG. 5to resemble a conventional semiconductor wafer. However, it is appreciated that a molded wafer as described herein may be molded into any suitable shape, thickness and contour, depending upon the particular application.

In another operation, interconnects may be formed (block140,FIG. 4) on the die terminals and substrate to connect selected terminals of the integrated circuits of the dies together. In the example ofFIG. 5, the dies104a,104b,104chave been joined by the molding material107into a first assembly142aof dies104a,104b,104c, and also into a second assembly142bof dies104a,104b,104c. Two such assemblies are depicted for purposes of illustration. It is appreciated that a substrate130having the size and shape of a conventional semiconductor wafer may have tens, hundreds or more of such assemblies of dies, depending upon the sizes of the dies and the number of dies in each assembly. In the illustrated embodiment, the interconnects110of all the assemblies of the wafer shaped substrate130may be formed in a single process or series of processes utilizing conventional interconnect fabrication processes developed for semiconductor type wafers, for example.

FIGS. 6a-6eand7show a more detailed example of operations to fabricate a multi-die molded substrate integrated circuit device in accordance with one embodiment of the present description. In one operation, various dies may be selected such as a CPU die, a dynamic random access memory (DRAM) die, a controller die, etc and attached (block200) to a releasable support substrate prior to molding the multi-die substrate.FIG. 6ashows one example of a plurality of dies104a,104b,104cbeing attached to a releasable support substrate202having a support member203and an adhesive layer204temporarily binding the dies104a,104b,104cto the support substrate202. The adhesive layer204may be double-sided tape, for example. It is appreciated that other techniques may be utilized to releasably secure the dies104a,104b,104cto the support substrate202.

The releasable support substrate202may be sized and shaped to match that of a conventional semiconductor wafer. As a result, the fabricated multi-die molded substrate can likewise be shaped to match the size and shape of a semiconductor wafer. Such a size and shape can facilitate using existing tools and processes developed for forming interconnects on semiconductor wafers. It is appreciated that other sizes and shapes may be utilized for a releasable support substrate, depending upon the particular application.

In the illustrated embodiment, the front faces206of each die of the dies104a,104b,104care temporarily attached to the generally planar face208of the support substrate202. As used herein, the term “front face” refers to that face of an integrated circuit die on which the integrated circuit is primarily fabricated and that face on which the integrated circuit terminals are primarily integrated. Conversely, the term “back face” refers to that face of an integrated circuit die opposite the front face.

Attaching the dies front face down to the planar face208of the releasable support substrate facilitates securing the front faces206of the dies104a,104b,104cwith their associated terminals108in a generally coplanar relationship with respect to the front faces206and terminals108of the other dies of the assembly being fabricated. As will be explained in greater detail below, such a coplanar relationship facilitates forming the interconnects on the terminals of the dies and also facilitates connecting the resultant multi-die molded substrate to the terminals of a package or printed circuit board.

In another operation, soft molding material107is shaped (block220) around the dies104a,104b,104cand then cured to a hardened state to form a molded wafer as shown inFIG. 6band as described above in connection withFIGS. 4,5. The substrate130with the hardened molding material is, in the illustrated embodiment, self supporting such that the temporary support substrate202may be removed as shown inFIG. 6c. In other embodiments, a support substrate may be left in place.

Hardened molding material107may also be removed (block230) from the back face232of the multi die substrate130. In addition, a portion of the back face234of one or more of the dies104a,104b,104cmay be removed as well as shown inFIG. 6c, until the thicknesses of the dies104a,104b,104care substantially uniform.

A variety of processes may be utilized to remove hardened molding material or die material from the multi-die substrate130. For example, polishing or backgrinding may be utilized. It is appreciated that in some applications, removal of molding material or die material from the substrate130may not be appropriate, depending upon the particular application. However, in those applications in which material is removed from the molded substrate130, the resulting thickness of the substrate130may be uniform or nonuniform, depending upon the particular application.

In the illustrated embodiment ofFIG. 6c, the back face234of each die104a,104b,104cof the assemblies142a,142b(FIG. 5) is exposed on the back face of the multi-die substrate130. Such an arrangement may facilitate connecting terminals to one or more of the die back faces234or may facilitate handling of the substrate130in conventional wafer processing tools and processes, or may facilitate other features, depending upon the particular application. It is appreciated that in other applications, the back face234of some dies of the assembly may not be exposed in the substrate130.

In another operation, interconnects may be formed (block240,FIG. 7) on the die terminals and molding material on the front face206of the substrate130as shown inFIG. 6d, to connect selected terminals of the integrated circuits of the dies104a,104b,104cas described above in connection withFIGS. 4 and 5. In addition to the interconnects110interconnecting terminals108of the various integrated circuits of the dies of each assembly,142a,142b, external connection terminals242such as solder balls may be deposited or otherwise formed on terminals108of the integrated circuits of the assemblies142a,142b, to interconnect a particular assembly142a,142bwith a package terminal, interposer, stacked die terminal or terminals of other devices as described below. In the illustrated embodiment, the die-to-die interconnects110and external connection terminals242of all the assemblies of the wafer shaped substrate130may be formed utilizing conventional terminal and interconnect fabrication processes developed for semiconductor type wafers, for example. Other processes may be used, depending upon the particular application.

One example by which interconnects and connection terminals may be formed on a multi-die molded substrate includes depositing a seed layer of a suitable conductive seed material such as titanium, for example. Suitable deposition processes include electroplating, physical vapor deposition, chemical vapor deposition. Another conductive material such as copper or aluminum, for example, may be deposited on the seed layer by a suitable deposition process including electroplating, physical vapor deposition, or chemical vapor deposition. The individual interconnects and terminals may be shaped by applying a photoresist layer which is patterned in accordance with the layout of the terminals and interconnects, and the conductive layers may be etched to form the terminals and interconnects. It is appreciated that a variety of processes may be used and the number of conductive layers may vary.

In the illustrated embodiment, the various interconnects110or terminals242may be spaced relatively closely together using appropriate conductor formation techniques as set forth above. For example, it is believed that the interconnects110may be spaced at a pitch of 50-200 microns. Other pitches, larger or smaller, may be appropriate, depending upon the particular application.

The various interconnects110or terminals242shown inFIG. 5are representative and simplified for clarity. An actual multi-die substrate in accordance with the present description may have tens, hundreds or more such die to die interconnects110and external connection terminals242. For example, each die of the dies104a,104b,104cmay have a two dimensional array of external connection terminals242such as ball grid arrays (BGA), land grid arrays (LGA), etc.

In yet another operation, a multi-die substrate may be diced (block250,FIG.7) or otherwise cut to separate the assemblies142a,142binto individual assemblies, wherein each separated assembly142a,142bmay be attached to a package substrate or otherwise packaged for use.FIG. 5shows one example of cut lines252by which individual assemblies142a,142bmay be separated into portions103a,103bof the wafer shaped substrate130. The amount of hardened molding material which may be removed from around each die104a,104b,104c, may vary, depending upon the particular application. The remaining hardened molding material around the dies104a,104b,104cforms the support frame106which physically supports the dies and physically joins them together as a relatively stiff, unitary member which may be handled independently of a support substrate such as the substrate202.

FIG. 6eshows an example of a multi-die substrate portion103awhich includes the die assembly142abeing physically coupled to and electrically connected to a package substrate260which may be mounted on a printed circuit board or other structure. The die assembly142amay be electrically connected to terminals262of the package substrate260by soldering or otherwise connecting the connection terminals242of the assembly142ato the package substrate terminals262. The package substrate260may have an encapsulation or other layer264to physically bind the assembly142ato the substrate260. The layer264may enhance thermal conductivity from the assembly142ato the package substrate260for heat dissipation purposes. The layer264may be made of a suitable polymer or other material. The multi-die molded substrate103amay also be fully encapsulated in a package which includes a substrate such as the substrate260.

In the illustrated embodiment, a multi-die molded substrate103ais shown mounted on and connected to a package substrate. It is appreciated that a variety of electrical devices may be fabricated using a multi-die molded substrate in accordance with the present description. Such a multi-die molded substrate may be mounted on other connection devices including interposers, flexible substrates, printed circuit boards, or other integrated circuit devices including individual dies, or other multi-die molded substrates. The inputs and outputs of the package substrate260may be electrically connected to a printed circuit board or other structure using connection terminals which may include connection pins, solder bumps or other connection devices.

Additional Embodiment Details

The illustrated operations ofFIGS. 4,6a-6e, and7show certain events occurring in a certain order. In alternative embodiments, certain operations may be performed in a different order, modified or removed. Moreover, operations may be added to the above described operations and still conform to the described embodiments. Further, operations described herein may occur sequentially or certain operations may be processed in parallel.

The foregoing description of various embodiments has been presented for the purposes of illustration and explanation. It is not intended to be exhaustive or to limit to the precise form disclosed. Many modifications and variations are possible in light of the above teaching.