Pressure-contact semiconductor device

An object of the present invention is to suppress electrical contact between an outer peripheral portion of an intermediate electrode and a front surface electrode of a semiconductor chip without increasing the area of the semiconductor chip. A facing surface of the first intermediate electrode facing a first main electrode is smaller than a facing surface of the first main electrode facing the first intermediate electrode, and has an outer peripheral protective region and a connection region surrounded by the protective region. A pressure-contact semiconductor device includes a plurality of first conductor films partially formed in the connection region, and a first insulating film formed in regions in the connection region where no first conductor films are formed and in the protective region.

CROSS-REFERENCE TO RELATED APPLICATIONS

The present application is based on PCT filing PCT/JP2019/009939, filed Mar. 12, 2019, the entire contents of which are incorporated herein by reference.

TECHNICAL FIELD

The present invention relates to a pressure-contact semiconductor device.

BACKGROUND ART

Power modules for electric power convert or control a high voltage of several kilovolts and a large current of several kiloamperes, and further increase in capacity is required. A plurality of semiconductor elements are mounted in parallel in a large-capacity power module. In recent years, the demand for power modules has been increasing under harsh environments such as offshore wind power generation, and power modules with high reliability and redundancy are demanded. In such a situation, a pressure-contact semiconductor device is attracting attention instead of the conventional bonding type. A plurality of semiconductor chips are mounted on the pressure-contact semiconductor device, and metal blocks are provided above and below the semiconductor chips as intermediate electrodes. Further, the electrical contact inside the device is maintained by being pressed from above and below the intermediate electrode via common electrode plates.

PRIOR ART DOCUMENTS

Patent Documents

SUMMARY

Problem to be Solved by the Invention

In the pressure-contact semiconductor device, an intensive pressure is applied to the outer periphery of the intermediate electrode when the intermediate electrode pressurizes the front surface electrode of the semiconductor chip. This local application of pressure cracks and breaks the semiconductor chip in many cases. Further, there has been a problem that the contact resistance between the intermediate electrode and the semiconductor chip changes due to the variance of pressure applied in the modular surface.

As a method for solving the problem, Patent Document 1 discloses a method in which a buffer region is provided between the active region and the terminal region of the IGBT chip, and a pedestal portion higher than the active region is provided in the buffer region so that the outer peripheral portion of the front surface intermediate electrode is pressurized with the pedestal portion being pressed to make a contact between the central portion of the block and the active region. The method ensures to suppress the outer peripheral portion of the front surface intermediate electrode and the front surface electrode of the semiconductor chip from coming into contact with each other. However, the method requires to increase the chip size in order to newly provide the buffer area, leading to an increase in size of the module which lowers the productivity. In addition, a step of forming a pedestal on the buffer region is required, which makes the manufacturing process intricate.

The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to suppress electrical contact between an outer peripheral portion of an intermediate electrode and a front surface electrode of a semiconductor chip without increasing the area of the semiconductor chip.

Means to Solve the Problem

According to the present invention a pressure-contact semiconductor device includes a plurality of semiconductor chips each having a first main electrode and a second main electrode on a front surface and a rear surface thereof, a first intermediate electrode facing the first main electrode of the semiconductor chip, a first common electrode plate provided on a side opposite to a facing surface of the front surface intermediate electrode facing the first main electrode, and a second common electrode plate provided facing the second main electrode, in which the facing surface of the first intermediate electrode facing the first main electrode is smaller than a facing surface of the first main electrode facing the first intermediate electrode, has an outer peripheral protective region and a connection region surrounded by the protective region. According to the present invention, the pressure-contact semiconductor device includes a plurality of first conductor films partially formed in the connection region, and a first insulating film formed in regions in the connection region where no first conductor films are formed and in the protective region.

Effects of the Invention

According to the pressure-contact semiconductor device of the present invention, the first intermediate electrode conducts with the first main electrode in the connection region by the first conductor film; therefore, this ensures to suppress the outer peripheral portion of the first intermediate electrode from electrically contacting the outer peripheral portion of the semiconductor chip without an increase in the area of the semiconductor chip. The objects, features, aspects, and advantages of the present invention will become more apparent from the following detailed description and the accompanying drawings.

DESCRIPTION OF EMBODIMENTS

FIG.1is a cross-sectional view of a pressure-contact semiconductor device100of an underlying technique. The pressure-contact semiconductor device100includes a plurality of Insulated Gate Bipolar Transistor (IGBT) chips200and a plurality of diode chips300. Here, IGBT chips and diode chips are given as examples of semiconductor chips.

A terminal region201, an emitter electrode202being a surface electrode, and a gate pad203are provided on the front surface of the IGBT chip200, and a collector electrode204is provided on the rear surface. The emitter electrode202is also referred to as a first main electrode, and the collector electrode204is also referred to as a second main electrode. An emitter intermediate electrode401is provided directly above the emitter electrode202. In other words, the emitter intermediate electrode401faces the emitter electrode202of the IGBT chip200. A collector intermediate electrode501is provided directly below the collector electrode204.

An anode electrode301being surface electrodes and a terminal region303, are provided on the front surface of the diode chip300, and a cathode electrode302is provided on the rear surface thereof. An anode intermediate electrode402is provided directly above the anode electrode301. A cathode intermediate electrode502is provided directly below the cathode electrode302. In the present specification, the emitter intermediate electrode401and the anode intermediate electrode402are collectively referred to as a front surface intermediate electrode400, and the collector intermediate electrode501and the cathode intermediate electrode502are collectively referred to as a rear surface intermediate electrode500. The front surface intermediate electrode400is also referred to as a first intermediate electrode. The front surface intermediate electrode400and the rear surface intermediate electrode500are also referred to simply as an intermediate electrode.

An emitter common electrode plate403being a first common electrode plate, is provided above the front surface intermediate electrode400, and a collector common electrode plate503being a second common electrode plate, is provided below the rear surface intermediate electrode500. In the present specification, the emitter common electrode plate403and the collector common electrode plate503are collectively referred to simply as a common electrode plate. By pressurizing the common electrode plates from above and below, the IGBT chips200are connected in parallel and the diode chips300are connected in parallel via the intermediate electrodes, and the IGBT chip200and the diode chip300are connected in antiparallel to each other. That is, the diode chip300functions as a free wheeling diode (FWD). The semiconductor chip may come into direct contact with the collector common electrode plate503, and in this case, the rear surface intermediate electrode500is unrequired.

A control terminal601provided with a spring pin or the like is connected to the gate pad203of the IGBT chip200. The control terminal601is led out to the outside of a housing and is connected to a gate drive circuit (not illustrated). The common electrode plate is made of a metal plate such as copper. The intermediate electrode is made of a metal such as copper, tungsten or molybdenum. The rear surface intermediate electrode500is fixed to the collector electrode204and the cathode electrode302with, for example, solder. A plating film such as nickel may be formed on the contact surface between the intermediate electrode and the semiconductor chip in order to reduce the contact resistance.

Although the front surface intermediate electrode400is illustrated as a mere metal block inFIG.1, a structure may be adoptable in which the metal block and the spring thereabove are integrated. With such a structure, the variation in pressure applied between the semiconductor chips is absorbed by the spring.

When the pressure-contact semiconductor device100is pressurized from above and below, the pressure applied to the front surface intermediate electrode400is intense on the outermost periphery of the metal block. In order to reduce the resistance between the semiconductor chip and the front surface intermediate electrode400or suppress the occurrence of arc discharge at the time of short-circuit fracture, application of a sufficiently high pressure to the common electrode plates is required. Accordingly, application of a high pressure locally to the outer peripheral portion of the semiconductor chip via the front surface intermediate electrode400is a cause of cracks in the semiconductor chip.

The contact area between the front surface electrode of the semiconductor chip and the front surface intermediate electrode400gradually increases from the outer circumference toward the inside as the pressure increases. If the pressure applied to each semiconductor chip varies, the contact resistance between the front surface electrode of each semiconductor chip and the front surface intermediate electrode400varies, causing non-uniform current, which reduces the reliability of the pressure-contact semiconductor device100.

Therefore, in following Embodiments, a pressure-contact semiconductor device will be described which suppresses a change in contact resistance between the outer peripheral portion of the front surface intermediate electrode400and the front surface electrode of the semiconductor chip without increasing the area of the semiconductor chip.

The pressure-contact semiconductor device of Embodiment 1 is a pressure-contact semiconductor device in which a device for the contact portion between the front surface intermediate electrode400and the semiconductor chip is applied to the pressure-contact semiconductor device100of the underlying technology illustrated inFIG.1, and other than that, the configuration thereof is the same as that of the pressure-contact semiconductor device100. Hereinafter, the configuration of the contact portion between the front surface intermediate electrode400and the semiconductor chip in the pressure-contact semiconductor device of Embodiment 1 will be described with reference toFIGS.2and3.

FIG.2illustrates the configuration on the diode chip300side. InFIG.2, the contact surface of the anode intermediate electrode402with the diode chip300is illustrated in the upper part, a cross-sectional view of the anode intermediate electrode402is illustrated in the middle part, and a cross-sectional view of the diode chip300is illustrated in the lower part.

The dotted lines inFIG.2indicate the positional relationship between the anode intermediate electrode402and the diode chip300. As illustrated by the dotted lines, the contact surface of the anode intermediate electrode402with respect to the diode chip300is smaller than that of the anode electrode301of the diode chip300. In other words, the anode intermediate electrode402is arranged inside the anode electrode301. As long as this condition is satisfied, an arbitrary size and shape can be adopted for the contact surface of the anode intermediate electrode402with respect to the diode chip300.

The contact surface of the front surface intermediate electrode400with respect to the semiconductor chip is divided into a protective region405on the outer peripheral portion and a connection region404inside the protective region405. A plurality of conductor films407are formed in the connection region404, and the connection region404establishes electrical contact between the front surface intermediate electrode400and the semiconductor chip. The width405bof the protective region405is preferably about 5 to 15% of the length of a side of the metal block constituting the anode intermediate electrode402. The protective region405and the region of the connection region404where the conductor films407are not formed are covered with the insulating film406. The conductor films407are preferably arranged point-symmetrically with respect to the center of gravity of the contact surface of the anode intermediate electrode402with respect to the diode chip300.

FIG.3illustrates the configuration on the IGBT chip200side. InFIG.3, the contact surface of the emitter intermediate electrode401with the IGBT chip200is illustrated in the upper part, a cross-sectional view of the emitter intermediate electrode401is illustrated in the middle part, and a cross-sectional view of the IGBT chip200is illustrated in the lower part.

The dotted lines inFIG.3indicate the positional relationship between the emitter intermediate electrode401and the IGBT chip200. As illustrated by the dotted lines, the contact surface of the emitter intermediate electrode401with respect to the IGBT chip200is smaller than that of the emitter electrode202of the IGBT chip200. In other words, the emitter intermediate electrode401is arranged inside the emitter electrode202. As long as this condition is satisfied, an arbitrary size and shape can be adopted for the contact surface of the emitter intermediate electrode401with respect to the IGBT chip200.

As is the same with the anode intermediate electrode402, the contact surface of the emitter intermediate electrode401with respect to the IGBT chip200is divided into a protective region405and a connection region404. The arrangement of the conductor films407in the protective region405is the same for the anode intermediate electrode402and the emitter intermediate electrode401.

During the time where the pressure applied to the front surface intermediate electrode400is small, the pressure is applied only to the outer peripheral portion of the front surface intermediate electrode400. However, as the pressure increases, pressure is gradually applied to the inside of the front surface intermediate electrode400. According to the pressure-contact semiconductor device of Embodiment 1, the contact surface of the front surface intermediate electrode400with respect to the semiconductor chip is configured as illustrated inFIGS.2and3; therefore, each conductor film407and the semiconductor chip are pressurized in a well-balanced manner, variations in contact resistance are suppressed.

The insulating film406is formed by depositing an oxide or a nitride by, for example, sputtering or vapor deposition. Alternatively, the insulating film406is formed by a method such as spraying an insulating paint or resin with a spray or spin coating with a spin coater. At this point, the regions where the conductor films407are formed are protected by a metal mask, tape, or the like so that the insulating film is not formed in the regions. Alternatively, after forming the insulating film overall, the insulating film in the regions where the conductor films407are formed is removed.

As in the same with the insulating film406, the conductor films407are formed by forming a metal film by sputtering, vapor deposition, or the like. Alternatively, a thick film metal may be formed by electrolytic plating to adopt as the conductor films407.

The pressure-contact power semiconductor device according to Embodiment 1 includes a plurality of semiconductor chips each having a first main electrode and a second main electrode on a front surface and a rear surface thereof, respectively, the front surface intermediate electrode400being a first intermediate electrode facing the first main electrode of the semiconductor chip, an emitter common electrode plate403being a first common electrode plate provided on the side opposite to the facing surface of the front surface intermediate electrode400facing the first main electrode, and a collector common electrode plate503being a second common electrode plate provided facing the second main electrode. The facing surface of the front surface intermediate electrode400facing the first main electrode is smaller than the facing surface of the first main electrode facing the front surface intermediate electrode400and has the outer peripheral protective region405and the connection region404surrounded by the protective region405. The pressure-contact semiconductor device of Embodiment 1 includes the conductor films407being a plurality of first conductor films partially formed in the connection region404, and the insulating film406being a first insulating film formed in the regions in the connection region404where no conductor films407are formed and in the protective region405.

With such a configuration above, the pressure-contact power semiconductor device according to Embodiment 1, the front surface intermediate electrode400conducts with the first main electrode of the semiconductor chip in the connection region404not with the protective region405of the outer peripheral portion; therefore, this ensures to suppress the outer peripheral portion of the front surface intermediate electrode400from electrically contacting the outer peripheral portion of the semiconductor chip without an increase in the area of the semiconductor chip.

Further, when the conductor films407are arranged point-symmetrically with respect to the center of gravity of the contact surface in the contact surface of the front surface intermediate electrode400with respect to the semiconductor chip, that is, in the facing surface therebetween, the contact resistance between each of the front surface intermediate electrode400and the semiconductor chip is uniformed. Accordingly, the variation in current applied between the semiconductor chips in the pressure-contact semiconductor device is suppressed, and the reliability of the pressure-contact semiconductor device is improved.

Further, by using a soft resin such as polyimide as the material of the insulating film406, the insulating film406can also function as a buffer member on the outer peripheral portion of the front surface intermediate electrode400to which a high pressure is applied. Accordingly, cracks are suppressed from happening in the semiconductor chip even when a high pressure is applied thereto, and the productivity and reliability of the pressure-contact semiconductor device are improved.

Further, by covering the outer peripheral portion of the front surface intermediate electrode400with the insulating film406, even if a positional displacement occurs between the semiconductor chip and the front surface intermediate electrode400and the front surface intermediate electrode400presses the gate pad203or the terminal regions201and303, an electrical short circuit does not occur; therefore, defects during assembly are reduced.

In one of the working examples of Patent Document 2, a buffer plate is provided so as to face the emitter electrode of the IGBT chip. The buffer plate of Patent Document 2 includes a plurality of electrode members and an insulating member that separates the electrode members. This buffer plate is considered to correspond to the front surface intermediate electrode in Embodiment 1. The pressure-contact semiconductor devices of Embodiment 1 and Patent Document 2 have a common feature in that the energizable region of the front surface intermediate electrode is limited. However, no description is made in Patent Document 2 on the arrangement and area of the conductor region in the front surface intermediate electrode.

For example, when a plurality of conductor regions are designed to be in contact with each other at the outer peripheral portion and the central portion of the IGBT chip, the outer peripheral portion of the IGBT chip and the conductor portions of the front surface intermediate electrode are preferentially in contact, because the pressure to the front surface intermediate electrode is generally applied intensively to the outer peripheral portion. In this case, the energization region is limited to the outer peripheral portion; therefore, the electric resistance between the collector electrode and the emitter electrode increases and increasing the loss of the power module. Or, the energization area is excessively limited and the current is concentrated to generate the heat, which may possibly damage the IGBT chip. Further, when the pressure is increased, the central part of the IGBT chip also comes into contact with the emitter electrode of the front surface intermediate electrode; therefore, as the pressure increases, the contact area between the IGBT chip and the front surface intermediate electrode increases, decreasing the resistance between the collector electrode and emitter electrode. The resistance of the IGBT chip changes depending on the pressure, the amount of current applied between the IGBT chips in the pressure-contact semiconductor device becomes non-uniform, and the reliability of the device deteriorates.

Meanwhile, according to Embodiment 1, the conduction region is limited to the region where a uniform pressure is applied; therefore, a stable collector-emitter electrode resistance can be obtained regardless of the pressure variation. Accordingly, a highly reliable pressure-contact semiconductor device can be obtained with no increase in loss.

In addition, according to the manufacturing method of the prior art document, the conductor member and the insulating member are made of different materials, and one front surface intermediate electrode is formed by combining the two. Meanwhile, in the manufacturing method of Embodiment 1, the insulating region and the conductor region are formed by patterning the surface of the front surface intermediate electrode400. Therefore, there is no increase in the number of parts, and this provides an advantage in a high degree of freedom in designing in the conductor region along with manufacturing being facilitated.

Modification of the contact surface of the front surface intermediate electrode400with respect to the semiconductor chip is illustrated inFIGS.4to8. InFIGS.2and3, the conductor films407are not formed on the center of gravity of the front surface intermediate electrode400. However, as illustrated inFIG.4, a conductor film407may be formed on the center of gravity of the front surface intermediate electrode400. The number of divisions of the conductor film407is arbitrary, and may be, for example, 4 as illustrated inFIG.5,16as illustrated inFIGS.6, and3as illustrated inFIG.7. Although it is preferable that the conductor films407have the same size, the above-mentioned effects can be obtained even if they do not necessarily have the same size. Also, the shape of the conductor films407does not have to be circular, and may be rectangular as illustrated inFIG.8, for example. Further, the conductor films407having a plurality of shapes may be used in combination.

Although inFIG.1, IGBTs and free wheeling diodes are employed for the semiconductor chips mounted on the pressure-contact semiconductor device100, the types of semiconductor chips are not limited thereto. For example, a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) may be employed instead of an IGBT. The number of IGBT chips200and diode chips300can be arbitrarily changed in accordance with the rated current of the module. The number of IGBT chips200and the number of diode chips300do not have to be the same. For example, the number of IGBT chips200may be twice the number of diode chips300. Any material such as silicon, gallium nitride, silicon carbide, aluminum nitride, gallium oxide or diamond is used for the substrate of the semiconductor chip depending on the application.

Also, instead of the IGBT chip200and the diode chip300, a reverse-conducting IGBT (RC-IGBT) may be employed. In this case, the structure illustrated inFIG.3is applicable to the structure of the contact surface of the front surface intermediate electrode400with respect to the reverse-conducting IGBT chip.

This is a pressure-contact semiconductor device obtained by changing the configuration of the contact portion between the emitter intermediate electrode401and the IGBT chip200in the pressure-contact semiconductor device of Embodiment 1. Hereinafter, the configuration of the contact portion between the emitter intermediate electrode401and the IGBT chip200in the pressure-contact semiconductor device of Embodiment 2 will be described with reference toFIGS.9to11.

InFIG.9, the contact surface of the emitter intermediate electrode401with the IGBT chip200is illustrated in the upper part, and the top view of the IGBT chip200is illustrated in the lower part. The IGBT chip200is provided with gate wiring205which is control wiring electrically separated from the emitter electrode202for supplying a gate current from the gate pad203to each cell. The gate wiring205is a low-resistance wiring layer formed on the front surface of the chip via SiO2or the like on the semiconductor substrate. The gate wiring205may be, for example, a metal film such as aluminum, a polysilicon film in which impurities are highly concentrated, or a laminated film thereof. Although two portions of gate wiring205are illustrated in the lower part ofFIG.9, the number of portions of gate wiring205can be arbitrarily changed in accordance with the size of the chip. Also, the gate pad203is arranged at an arbitrary position in the IGBT chip200.

The dashed-line circles illustrated in the emitter electrode202in the lower part ofFIG.9indicate positions where the conductor films407illustrated in the upper part ofFIG.9come into contact. The pressure-contact semiconductor device of Embodiment 2 is different from the pressure-contact semiconductor device of Embodiment 1 in that the conductor films407are formed so as not to come into contact with the gate wiring205of the IGBT chip200. In order to realize this structure, the alignment accuracy of the emitter intermediate electrode401and the IGBT chip200must be sufficiently high.

FIG.10illustrates an example of mounting a pressure-contact semiconductor device that achieves high alignment accuracy. InFIG.10, the IGBT chip200is fixed to the collector intermediate electrode501with solder. A collector intermediate electrode guide104is provided on the collector common electrode plate503, and the collector intermediate electrode501is arranged on the collector common electrode plate503along the collector intermediate electrode guide104. That is, the position of the collector intermediate electrode501in the module is defined by the collector intermediate electrode guide104.

A protective film212of the terminal region201is formed on the outer periphery of the IGBT chip200with polyimide or the like. A chip guide102is placed on the protective film212and fixed with an adhesive103. The chip guide102is formed of, for example, a silicone resin. Next, by mounting the emitter intermediate electrode401on the IGBT chip200using the chip guide102, the positional displacement between the emitter intermediate electrode401and the IGBT chip200is prevented.

FIG.11is a schematic cross-sectional view of the IGBT chip200passing through the gate wiring205. The IGBT chip200has a configuration in which a semiconductor layer208, an insulating film210, a polysilicon layer209, a gate metal layer211, and an insulating film206are laminated in this order. Of these, the polysilicon layer209and the gate metal layer211correspond to the gate wiring205. The insulating films206and210are a second insulating film that covers the gate wiring205. The insulating film210is made of SiO2or the like, and the insulating film206is made of SiN or the like. The gate wiring205is a low-resistance wiring layer above a trench in a trench gate type MOSFET or IGBT, and in a planar type MOSFET or IGBT, the gate wiring205is a low-resistance wiring layer electrically connected to the gate electrode of each transistor.

In the conventional pressure-contact semiconductor device, when the gate wiring205is pressurized by the emitter intermediate electrode401, cracks may develop in the insulating film206in the vertical direction, and the gate metal layer211below thereof may be exposed on the front surface. When the emitter intermediate electrode401comes into contact with the gate metal layer211, the gate electrode-emitter electrode of the IGBT is short-circuited, disabling the switching operation. Meanwhile, in the pressure-contact semiconductor device of Embodiment 2, as illustrated inFIG.11, an insulating film406is formed in the region of the emitter intermediate electrode401located directly above the gate wiring205. In other words, the conductor film407is formed at a position that does not overlap with the gate wiring205in plan view. Therefore, even if cracks are developed into the insulating film206, the gate metal layer211is electrically separated from the emitter intermediate electrode401by the insulating film406. Therefore, high pressure can be applied to the pressure-contact semiconductor device, the contact resistance between the semiconductor chip and the intermediate electrode is reduced, realizing a low-loss pressure-contact semiconductor device. Further, high pressure can be applied between the common electrode plates, voids between the IGBT chip200and the intermediate electrode are reduced. Therefore, such an incidence is suppressed from happening in which an arc discharge occurs in the void between the IGBT chip200and the intermediate electrode, leading to breakage thereof when the IGBT chip200is at the time of short-circuit fracture; therefore, the reliability of the module is improved.

A pressure-contact semiconductor device of Embodiment 3 is the pressure-contact semiconductor device in which the configuration of the contact portion between the front surface intermediate electrode400and the semiconductor chip is changed in the pressure-contact semiconductor device of Embodiment 1. Hereinafter, the configuration of the contact portion between the front surface intermediate electrode400and the semiconductor chip in the pressure-contact semiconductor device of Embodiment 3 will be described with reference toFIGS.12and15.

FIGS.12and13illustrate the configuration of the pressure-contact semiconductor device of Embodiment 3 on the IGBT side.FIG.12illustrates a top view of the contact surface of the emitter intermediate electrode401with respect to the IGBT chip200, a cross-sectional view of the emitter intermediate electrode401, and a top view of the IGBT chip200.FIG.13is a cross-sectional view of the IGBT chip200along the line A-A′ ofFIG.12.

As illustrated inFIG.12, the gate wiring205is provided radially from the center of the cell region of the IGBT chip200. The emitter electrode202is radially divided by the gate wiring205, specifically by the insulating films206and210covering the gate wiring205, and is a plurality of island-shaped electrodes as illustrated inFIG.13. That is, the insulating films206and210are a third insulating film that divides the emitter electrode202into a plurality of islands. A large portion of the upper surface of each of the divided emitter electrodes202is covered with the insulating film206made of silicon dioxide or silicon nitride, and a conductor film207being a second conductor film, is formed on the remaining portion. The conductor film207is connected to the emitter electrode202below. The conductor film207is preferably arranged point-symmetrically with respect to the center of gravity of the contact surface on the contact surface of the IGBT chip200with respect to the emitter intermediate electrode401. Also, as illustrated inFIG.12, the conductor film207is preferably evenly arranged on each emitter electrode202divided by the gate wiring205. Even arrangement means that the surface area of each divided conductor film207formed on each emitter electrode202are equal.

The conductor film407is formed at a position corresponding to the conductor film207in the connection region404on the contact surface of the emitter intermediate electrode401with respect to the IGBT chip200, and comes into contact with the conductor film207. The insulating film406is formed at the other position on the contact surface.

FIGS.14and15illustrate the configuration of the pressure-contact semiconductor device of Embodiment 3 on the diode side.FIG.14illustrates a top view of the contact surface of an anode intermediate electrode402with respect to the diode chip300, a cross-sectional view of the anode intermediate electrode402, and a top view of the diode chip300.FIG.15is a cross-sectional view of the diode chip300along the line B-B′ ofFIG.14.

As illustrated inFIGS.14and15, the anode electrode301is radially divided from the center by an insulating film306made of silicon dioxide or the like to form a plurality of island-shaped electrodes. A large portion of the upper surface of the anode electrode301is covered with the insulating film304made of silicon dioxide or silicon nitride, and a conductor film305is formed on the remaining portion. That is, the insulating films304and306function as a third insulating film that divides the anode electrode301into a plurality of islands. The conductor film305is connected to the anode electrode301below. The conductor films305are preferably arranged point-symmetrically with respect to the center of gravity of the contact surface of the diode chip300with respect to the anode intermediate electrode402. Also, as illustrated inFIG.14, the conductor film305is preferably evenly arranged on each anode electrode301divided by the insulating film306. Even arrangement means that the surface area of each divided conductor film305formed on each anode electrode301are equal.

The conductor films407are formed at positions in contact with the conductor films207in the connection region404on the contact surface of the anode intermediate electrode402with respect to the diode chip300, and the insulating film406is formed at the other position.

In the pressure-contact semiconductor device of Embodiment 3, the front surface electrode of the semiconductor chip is divided into a plurality of island-shaped electrodes, and a conductor film is evenly formed on each of the divided front surface electrodes. Accordingly, the contact resistance between each of the divided front surface electrodes and the front surface intermediate electrode400becomes uniform. Further, when a large current is applied and the amount of current applied to each front surface electrode becomes non-uniform for some reason, the current is applied to the front surface electrode having a small resistance and the temperature rises as compared with the other front surface electrodes. As the temperature rises, the resistance of the front surface electrode increases, so that the current non-uniformity in the semiconductor chip is spontaneously reduced. Accordingly, a local temperature rise in the semiconductor chip is suppressed and the reliability of the pressure-contact semiconductor device is improved.

A pressure-contact semiconductor device of Embodiment 4 is the pressure-contact semiconductor device in which the configuration of the contact portion between the emitter intermediate electrode401and the IGBT chip200is changed in the pressure-contact semiconductor device of Embodiment 2. Hereinafter, the configuration of the contact portion between the emitter intermediate electrode401and the IGBT chip200in the pressure-contact semiconductor device of Embodiment 4 will be described with reference toFIGS.16to20. It should be noted that Embodiment 4 can also be combined with Embodiment 3.

FIG.16is a top view of the IGBT chip200.FIG.17is a cross-sectional view of the IGBT chip200along the line C-C′ ofFIG.16.FIG.18is a schematic cross-sectional view of the IGBT chip200passing through the gate wiring205.FIG.19illustrates a top view of the contact surface of the emitter intermediate electrode401with respect to the IGBT chip200.

The pressure-contact semiconductor device of Embodiment 4 is the pressure-contact semiconductor device in which, the IGBT chip200is provided with a conductor film207bbeing the third conductor film, and the emitter intermediate electrode401is provided with a conductor film407b, in the pressure-contact semiconductor device of Embodiment 2. Other than these, the configuration of the pressure-contact semiconductor device of Embodiment 4 is the same as that of the pressure-contact semiconductor device of Embodiment 2. The conductor film207bis provided on the outermost surface of the region where the gate wiring205of the IGBT chip200is formed. The conductor film407bis provided in a region of the connection region404of the emitter intermediate electrode401that comes into contact with the conductor film207b. That is, the conductor film207band the conductor film407bcome into contact with each other.

As illustrated inFIG.18, the IGBT chip200has a configuration in which a semiconductor layer208, an insulating film210, a polysilicon layer209, a gate metal layer211, an insulating film206, and the conductor film207bare laminated in this order. The insulating film206is made of silicon dioxide or silicon nitride. The conductor film207bis formed of, for example, a single film or a laminated film formed of such as nickel, gold, or the like.

High positional accuracy is required for the emitter intermediate electrode401and the IGBT chip200, since the conductor film207band the conductor film407bare brought into contact with each other and the conductor film207and the conductor film407are brought into contact with each other. Therefore, positioning of the emitter intermediate electrode401is preferably implemented by the same method as inFIG.10.

In the above, the pressure-contact semiconductor device of Embodiment 4 has been described as Modification to the pressure-contact semiconductor device of Embodiment 2. However, Embodiment 4 is also applicable to Embodiment 3.

As illustrated inFIG.18, by forming the conductor film207b, which is a relatively soft metal film, on the gate wiring205, the unevenness existing in the emitter intermediate electrode401is absorbed by the conductor film207band the application of local high pressure on the gate wiring205is prevented. This prevents the insulating film206on the gate wiring205from being damaged by the pressure and the gate metal layer211from coming into contact with the emitter intermediate electrode401. As a result, the reliability of the pressure-contact semiconductor device is improved, suppressing damage during manufacturing and improving productivity.

When the emitter intermediate electrode401and the IGBT chip200are pressed each other and the conductor film407band the conductor film207bcome into contact with each other, the conductor film207bbecomes an emitter potential. Meanwhile, the gate metal layer211becomes a gate potential due to the supply of the gate current from the gate pad203. The equivalent circuit diagram of the IGBT chip200at this time is illustrated inFIG.20. A power supply voltage Vcc and a gate-emitter voltage Vge are applied to an IGBT element701. The internal gate resistor Rg1and/or the external gate resistor Rg2are connected to the gate electrode. Also, as illustrated by the broken line, the gate-collector capacitance Cgc as parasitic capacitances and the gate-emitter capacitance Cge are connected. Further, according to the structure ofFIG.18, the gate metal layer211and the conductor film207bform a parallel plate capacitor via the insulating film206. Further, the gate wiring205has a parasitic resistance; therefore, as illustrated by the broken line inFIG.20, a parasitic snubber circuit702is formed between the gate and the emitter in parallel with the main gate wiring205. Consequently, the oscillation of the gate voltage can be suppressed. The capacitance of the parasitic snubber circuit702can be controlled by the film thickness of the insulating film206.

Let us consider a structure in which two IGBT elements are connected in series to form upper and lower arms. The lower arm IGBT is off and the upper arm IGBT turns on. At this point, a displacement current may flow in the feedback capacitance of the lower arm IGBT, causing the lower arm IGBT to erroneously ignite. This displacement current is proportional to the collector voltage change rate (dV/dt) of the upper arm IGBT and is one of the factors hindering the increase in the switching speed. Meanwhile, in the structure of Embodiment 4, the parasitic capacitance is charged with the displacement current between the gate and the emitter; therefore, the displacement current flowing between the gate and the emitter is suppressed, and the erroneous ignition is suppressed. Consequently, the upper arm IGBT and the lower arm IGBT are turned on at the same time to prevent the IGBT chip from being short-circuited and fractured, and the switching speed can be increased.

It should be noted that Embodiments of the present invention can be arbitrarily combined and can be appropriately modified or omitted without departing from the scope of the invention. While the invention has been described in detail, the forgoing description is in all aspects illustrative and not restrictive. It is understood that numerous other modifications can be devised without departing from the scope of the invention.

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