Method for operating display device with potentials higher and lower than maximum and minimum potentials generated by source driver circuit

A display device in which high voltage can be applied to a display element is provided. A display element includes a pixel provided with a display element including a pixel electrode and a common electrode, and the pixel is electrically connected to a first data line and a second data line. Supply of a first potential to the pixel through the first data line and supply of a second potential to the pixel through the second data line are performed concurrently, and then a third potential is supplied to the pixel through the second data line, whereby the first potential held in the pixel is changed to a fourth potential, and the fourth potential is applied to the pixel electrode. Here, the second potential is a potential calculated based on the first potential. When the value of the second potential is less than or equal to a potential applied to the common electrode, the third potential is higher than the potential applied to the common electrode. In contrast, when the value of the second potential is greater than or equal to the potential applied to the common electrode, the third potential is lower than the potential applied to the common electrode.

CROSS REFERENCE TO RELATED APPLICATIONS

This application is a U.S. National Phase Application under 35 U.S.C. § 371 of International Application PCT/IB2019/052292, filed on Mar. 21, 2019, which is incorporated by reference and claims the benefit of a foreign priority application filed in Japan on Mar. 29, 2018, as Application No. 2018-065067.

TECHNICAL FIELD

One embodiment of the present invention relates to a display device and an operating method therefor.

In this specification and the like, a semiconductor device generally means a device that can function by utilizing semiconductor characteristics. A display device (a liquid crystal display device, a light-emitting display device, and the like), a projection device, a lighting device, an electro-optical device, a power storage device, a memory device, a semiconductor circuit, an imaging device, an electronic device, and the like can sometimes be regarded as a semiconductor device in some cases. Alternatively, they can sometimes be regarded as including a semiconductor device.

BACKGROUND ART

Patent Document 1 discloses a display device that has high withstand voltage so that a display element can be driven with high voltage.

REFERENCE

Patent Document

SUMMARY OF THE INVENTION

Problems to be Solved by the Invention

In order to drive a display element such as a liquid crystal element with high voltage, a source driver circuit capable of generating a high potential is needed. However, such a source driver circuit occupies a large area and entails high costs.

An object of one embodiment of the present invention is to provide a display device in which a potential higher than the maximum potential that can be generated by a source driver circuit and a potential lower than the minimum potential that can be generated by the source driver circuit can be applied to one electrode of a display element. Another object is to provide a display device in which high voltage can be applied to a display element. Another object is to provide a small display device. Another object is to provide an inexpensive display device. Another object is to provide a display device that can display a high-luminance image. Another object is to provide a display device with low power consumption. Another object is to provide a highly reliable display device. Another object is to provide a display device that operates at high speed. Another object is to provide a display device that can display a high-quality image. Another object is to provide a novel display device.

Another object is to provide a method for operating a display device in which a potential higher than the maximum potential that can be generated by a source driver circuit and a potential lower than the minimum potential that can be generated by the source driver circuit can be applied to one electrode of a display element. Another object is to provide a method for operating a display device in which high voltage can be applied to a display element. Another object is to provide a method for operating a small display device. Another object is to provide a method for operating an inexpensive display device. Another object is to provide a method for operating a display device that can display a high-luminance image. Another object is to provide a method for operating a display device having low power consumption. Another object is to provide a method for operating a highly reliable display device. Another object is to provide a method for operating a display device that operates at high speed. Another object is to provide a method for operating a display device that can display a high-quality image. Another object is to provide a method for operating a novel display device.

Note that the description of these objects does not preclude the existence of other objects. One embodiment of the present invention does not have to achieve all the objects. Other objects will be apparent from and can be derived from the description of the specification, the drawings, the claims, and the like.

Means for Solving the Problems

One embodiment of the present invention is a method for operating a display device including a pixel provided with a display element including a pixel electrode and a common electrode, wherein the pixel is electrically connected to a first data line and a second data line. Supply of a first potential to the pixel through the first data line and supply of a second potential to the pixel through the second data line are performed concurrently, and then a third potential is supplied to the pixel through the second data line, whereby the first potential held in the pixel is changed to a fourth potential, and the fourth potential is applied to the pixel electrode. The second potential is a potential calculated based on the first potential. When a value of the second potential is less than or equal to a potential applied to the common electrode, the third potential is higher than the potential applied to the common electrode. When the value of the second potential is greater than or equal to the potential applied to the common electrode, the third potential is lower than the potential applied to the common electrode.

In the above embodiment, the third potential may be a potential greater than or equal to a maximum value possible for the first potential, or a potential less than or equal to a minimum value possible for the first potential.

In the above embodiment, the display device may include a source driver circuit, the source driver circuit may be electrically connected to the first data line, the source driver circuit may be electrically connected to the second data line, and the source driver circuit may have a function of generating the first potential and the second potential.

One embodiment of the present invention is a method for operating a display device including a pixel provided with a display element including a pixel electrode and a common electrode, wherein the pixel is electrically connected to a first data line and a second data line. The display device operates according to a first operation and a second operation. In the first operation, supply of a first potential to the pixel through the first data line and supply of a second potential to the pixel through the second data line are performed concurrently, and then a third potential is supplied to the pixel through the second data line, whereby the first potential held in the pixel is changed to a fourth potential, and the fourth potential is applied to the pixel electrode. The second potential is a potential that is calculated based on the first potential and has a value less than or equal to a potential applied to the common electrode. The third potential is a potential having a value greater than the potential applied to the common electrode. The fourth potential is a potential having a value greater than or equal to the potential applied to the common electrode. In the second operation, supply of a fifth potential to the pixel through the first data line and supply of a sixth potential to the pixel through the second data line are performed concurrently, and then a seventh potential is supplied to the pixel through the second data line, whereby the fifth potential held in the pixel is changed to an eighth potential, and the eighth potential is applied to the pixel electrode. The sixth potential is a potential that is calculated based on the fifth potential and has a value greater than or equal to the potential applied to the common electrode. The seventh potential is a potential having a value less than the potential applied to the common electrode. The eighth potential is a potential having a value less than or equal to the potential applied to the common electrode.

In the above embodiment, the third potential may be a potential greater than or equal to a maximum value possible for the first potential, and the seventh potential may be a potential greater than or equal to a minimum value possible for the fifth potential.

In the above embodiment, a range of values possible for the first potential and a range of values possible for the fifth potential may be equal to each other.

In the above embodiment, an operation according to the first operation and an operation according to the second operation may be alternately performed every frame period.

Alternatively, in the above embodiment, the display device may include a source driver circuit; the source driver circuit may be electrically connected to the first data line; the source driver circuit may be electrically connected to the second data line; and the source driver circuit may have a function of generating the first potential, the second potential, the fifth potential, and the sixth potential.

In the above embodiment, the pixel may include a first transistor, a second transistor, and a capacitor; one of a source and a drain of the first transistor may be electrically connected to one electrode of the capacitor; the other of the source and the drain of the first transistor may be electrically connected to the first data line; one of a source and a drain of the second transistor may be electrically connected to the other electrode of the capacitor; and the other of the source and the drain of the second transistor may be electrically connected to the second data line.

In the above embodiment, each of the first transistor and the second transistor may include a metal oxide in its channel formation region, and the metal oxide may contain In, Zn, and M (M is Al, Ti, Ga, Sn, Y, Zr, La, Ce, Nd, or Hf).

In the above embodiment, the display element may be a liquid crystal element.

Effect of the Invention

According to one embodiment of the present invention, it is possible to provide a display device in which a potential higher than the maximum potential that can be generated by a source driver circuit and a potential lower than the minimum potential that can be generated by the source driver circuit can be applied to one electrode of a display element. Alternatively, a display device in which high voltage can be applied to a display element can be provided. Alternatively, a small display device can be provided. Alternatively, an inexpensive display device can be provided. Alternatively, a display device capable of displaying a high-luminance image can be provided. Alternatively, a display device with low power consumption can be provided. Alternatively, a highly reliable display device can be provided. Alternatively, a display device that operates at high speed can be provided. Alternatively, a display device capable of displaying a high-quality image can be provided. Alternatively, a novel display device can be provided.

Alternatively, it is possible to provide a method for operating a display device in which a potential higher than the maximum potential that can be generated by a source driver circuit and a potential lower than the minimum potential that can be generated by the source driver circuit can be applied to one electrode of a display element. Alternatively, a method for operating a display device in which high voltage can be applied to a display element can be provided. Alternatively, a method for operating a small display device can be provided. Alternatively, a method for operating an inexpensive display device can be provided. Alternatively, a method for operating a display device capable of displaying a high-luminance image can be provided. Alternatively, a method for operating a low-power-consumption display device can be provided. Alternatively, a method for operating a highly reliable display device can be provided. Alternatively, a method for operating a display device that operates at high speed can be provided. Alternatively, a method for operating a display device capable of displaying a high-quality image can be provided. Alternatively, a method for operating a novel display device can be provided.

Note that the description of these effects does not preclude the existence of other effects. One embodiment of the present invention does not need to have all the effects. Other effects can be derived from the description of the specification, the drawings, and the claims.

MODE FOR CARRYING OUT THE INVENTION

The position, size, range, or the like of each component illustrated in drawings does not represent the actual position, size, range, or the like in some cases for easy understanding. Therefore, the disclosed invention is not necessarily limited to the position, size, range, or the like disclosed in the drawings.

In this specification and the like, a metal oxide is an oxide of metal in a broad sense. Metal oxides are classified into an oxide insulator, an oxide conductor (including a transparent oxide conductor), an oxide semiconductor (also simply referred to as an OS), and the like. For example, in the case where a metal oxide is used in a semiconductor layer of a transistor, the metal oxide is referred to as an oxide semiconductor in some cases. That is, an OS FET can also be called a transistor including a metal oxide or an oxide semiconductor.

In this specification and the like, a metal oxide containing nitrogen is also collectively referred to as a metal oxide in some cases. A metal oxide containing nitrogen may be referred to as a metal oxynitride.

In this embodiment, a display device that is one embodiment of the present invention and an operating method therefor will be described with reference to drawings.

One embodiment of the present invention relates to a method for operating a display device including a pixel provided with a display element including a pixel electrode and a common electrode. Here, a liquid crystal element can be used as the display element. A display device of one embodiment of the present invention includes a source driver circuit. The pixel is electrically connected to the source driver circuit through a first data line and is electrically connected to the source driver circuit through a second data line.

A constant potential, for example, can be applied to the common electrode. For example, a potential that is the average of the maximum potential that can be generated by the source driver circuit and the minimum potential that can be generated by the source driver circuit can be applied to the common electrode.

In the display device of one embodiment of the present invention, first, a first potential that is a potential corresponding to image data is supplied to the pixel through the first data line. Specifically, the first potential is supplied to the pixel electrode, for example. In parallel with this, a second potential that is a potential calculated based on the first potential is supplied to the pixel through the second data line. The supplied first potential and second potential are held inside the pixel.

Next, a third potential is supplied to the pixel through the second data line in a manner similar to that of the second potential. Thus, the second potential held in the pixel is overwritten by the third potential. By overwriting the second potential by the third potential, the first potential held in the pixel is changed to a fourth potential. Accordingly, the fourth potential can be applied to the pixel electrode.

The first to third potentials are potentials generated by the source driver circuit, for example. Therefore, the first to third potentials cannot be higher than the maximum potential that can be generated by the source driver circuit, and cannot be lower than the minimum potential that can be generated by the source driver circuit. Meanwhile, the fourth potential is a potential generated inside the pixel on the basis of the first to third potentials.

Here, the amount of difference between the fourth potential and the first potential corresponds to the amount of difference between the third potential and the second potential. That is, the fourth potential becomes higher as the first potential is higher, for example, and as the difference between the third potential and the second potential is larger. In one embodiment of the present invention, the fourth potential can be a potential higher than the maximum potential that can be generated by the source driver circuit, and can be a potential lower than the minimum potential that can be generated by the source driver circuit. For example, a voltage applied to the display element can be greater than twice the output voltage amplitude of the source driver circuit. For example, in the case where the source driver circuit is capable of generating a potential higher than or equal to −5 V and lower than or equal to 5 V and a potential applied to the common electrode is a ground potential (0 V), the fourth potential can be a potential higher than or equal to 10 V and can be a potential lower than or equal to −10 V.

In this specification and the like, a voltage applied to a display element refers to the absolute value of a difference between a potential applied to one electrode of the display element and a potential applied to the other electrode of the display element, and for example, refers to the absolute value of a difference between a potential applied to a pixel electrode and a potential applied to a common electrode.

Here, in order to increase the difference between the third potential and the second potential, the third potential can be a potential whose polarity is different from that of the second potential, for example. Moreover, the third potential can be the maximum potential or the minimum potential that can be generated by the source driver circuit, for example. For instance, in the case where the source driver circuit is capable of generating a potential higher than or equal to −5 V and lower than or equal to 5 V, the third potential can be −5 V when the second potential is a positive potential and the third potential can be 5 V when the second potential is a negative potential. Note that in the case where the source driver circuit is capable of generating a potential higher than or equal to −5 V and lower than or equal to 5 V, for example, a potential applied to the common electrode can be a ground potential, which is the average of −5 V and 5 V.

In this specification and the like, the polarity of a potential can be determined using a potential applied to a common electrode as a reference, for example. It can be said, for example, that a potential higher than the potential applied to the common electrode and a potential lower than the potential applied to the common electrode have different polarities from each other.

Note that the third potential is not necessarily generated by the source driver circuit. For example, a power supply circuit provided outside the source driver circuit may generate the third potential. When a circuit other than the source driver circuit generates the third potential, the third potential can be a potential higher than or equal to the maximum potential that can be generated by the source driver circuit or a potential lower than or equal to the minimum potential that can be generated by the source driver circuit. Thus, the difference between the third potential and the second potential can be further increased.

In the display device of one embodiment of the present invention, as described above, a potential higher than the maximum potential that can be generated by the source driver circuit and a potential lower than the minimum potential that can be generated by the source driver circuit can be applied to the pixel electrode as the fourth potential. Thus, high voltage can be applied to the display element; hence, it is possible to use a display element to which high voltage is preferably applied at the time of the operation. For example, liquid crystal exhibiting a blue phase or polymer-dispersed liquid crystal (PDLC) can be used for the display element. Moreover, high voltage can be applied to the display element even when the output voltage amplitude of the source driver circuit is small, so that the power consumption of the display device of one embodiment of the present invention can be reduced. Furthermore, high voltage can be applied to the display element even when the source driver circuit does not have high withstand voltage; thus, the display device of one embodiment of the present invention can be small in size and inexpensive.

FIG.1(A)is a diagram illustrating a structure example of a display device10that is the display device of one embodiment of the present invention. The display device10includes a display portion12in which pixels11are arranged in a matrix of m rows and n columns, an image data generator circuit13, a gate driver circuit14, and a source driver circuit15.

In this specification and the like, the pixel11in an i-th row and a j-th column (i is an integer greater than or equal to 1 and less than or equal to m, and j is an integer greater than or equal to 1 and less than or equal to n) is denoted as a pixel11[i,j].

The image data generator circuit13is electrically connected to the source driver circuit15. The pixels11in the same row are electrically connected to the gate driver circuit14through one wiring21and are electrically connected to the gate driver circuit14through one wiring22. The pixels11in the same column are electrically connected to the source driver circuit15through one wiring41and are electrically connected to the source driver circuit15through one wiring42.

The image data generator circuit13has a function of generating image data corresponding to an image to be displayed on the display portion12. The gate driver circuit14has a function of generating a potential for controlling the operation of the pixel11. The source driver circuit15has a function of generating a potential corresponding to image data, for example.

In this specification and the like, the wiring21and the wiring22that are electrically connected to the pixel11[i,1] to the pixel11[i,n] are denoted as a wiring21[i] and a wiring22[i]. Furthermore, the wiring41and the wiring42that are electrically connected to the pixel11[1,j] to the pixel11[m,j] are denoted as a wiring41[j] and a wiring42[j].

FIG.1(B)is a diagram illustrating a configuration example of the pixel11. The pixel11includes a transistor101, a transistor102, a capacitor104, a capacitor105, and a display element106. A liquid crystal element can be used as the display element106, for example.

One of a source and a drain of the transistor101is electrically connected to one electrode of the capacitor104. One of a source and a drain of the transistor102is electrically connected to the other electrode of the capacitor104. The one electrode of the capacitor104is electrically connected to one electrode of the capacitor105. The one electrode of the capacitor105is electrically connected to one electrode of the display element106.

Here, the one electrode of the display element106can serve as a pixel electrode, for example. The other electrode of the display element106can serve as a common electrode, for example.

A node where the one of the source and the drain of the transistor101, the one electrode of the capacitor104, the one electrode of the capacitor105, and the one electrode of the display element106are electrically connected to each other is referred to as a node NM. A node where the one of the source and the drain of the transistor102and the other electrode of the capacitor104are electrically connected to each other is referred to as a node NA.

A gate of the transistor101is electrically connected to the wiring21. A gate of the transistor102is electrically connected to the wiring22. The other of the source and the drain of the transistor101is electrically connected to the wiring41. The other of the source and the drain of the transistor102is electrically connected to the wiring42.

The other electrode of the capacitor105is electrically connected to a common wiring32. The other electrode of the display element106is electrically connected to a common wiring33. A potential VCOMcan be supplied to the common wiring33. The potential VCOMcan be, for example, a constant potential. The potential VCOMcan be, for example, a potential that is the average of the maximum potential that can be generated by the source driver circuit15and the minimum potential that can be generated by the source driver circuit15. The potential VCOMcan be, for example, a ground potential. Note that a potential supplied to the common wiring32can have the same value as the potential VCOM.

The potential for controlling the conduction and non-conduction of the transistor101is supplied to the gate of the transistor101through the wiring21. The potential for controlling the conduction and non-conduction of the transistor102is supplied to the gate of the transistor102through the wiring22.

A potential is supplied to the node NM through the wiring41. A potential is supplied to the node NA through the wiring42.

Here, the use of a transistor with an extremely low off-state current as the transistor101enables long-term retention of a potential supplied to the node NM. Moreover, the use of a transistor with an extremely low off-state current as the transistor102enables long-term retention of a potential supplied to the node NA. Examples of the transistor with an extremely low off-state current include a transistor containing a metal oxide in its channel formation region (hereinafter referred to as an OS transistor).

As a semiconductor material used in an OS transistor, a metal oxide whose energy gap is greater than or equal to 2 eV, preferably greater than or equal to 2.5 eV, further preferably greater than or equal to 3 eV can be used. A typical example is an oxide semiconductor containing indium, and a CAAC-OS or a CAC-OS described later can be used, for example. The CAAC-OS is a crystalline oxide semiconductor. A transistor using the crystalline oxide semiconductor can have improved reliability and thus is favorably used in the display device of one embodiment of the present invention. The CAC-OS exhibits excellent mobility characteristics and thus is suitable for a transistor that operates at high speed, for example.

An OS transistor has a large energy gap and thus has an extremely low off-state current. An OS transistor has features that impact ionization, an avalanche breakdown, a short-channel effect, and the like do not occur, for example, which are different from those of a transistor containing Si in its channel formation region (hereinafter referred to as a Si transistor), leading to formation of a highly reliable circuit.

Note that as the transistor101and the transistor102, a transistor other than the OS transistor may be used. Examples of Si transistors include a transistor including amorphous silicon, a transistor including crystalline silicon (typically, low-temperature polysilicon), and a transistor including single crystal silicon.

Next, an example of a method for operating the pixel11is described. Specifically, an example of a method for operating the pixel11[i,j] included in the display device10is described. Note that the transistor101and the transistor102are described as n-channel transistors; when the magnitude relation between the potentials is inverted as appropriate, for example, the following description can also apply to the case where one or both of the transistor101and the transistor102are p-channel transistors.

FIG.2is a timing chart illustrating an example of a method for operating the pixel11[i,j]. Here, the display device10including the pixel11[i,j] displays an image for one frame by operation from Time T01to Time T04, and displays an image for the next one frame by operation from Time T11to Time T14.

In this specification and the like, for example, the operation between Time T01and Time T04is referred to as first operation, and the operation between Time T11and Time T14is referred to as second operation. Although the details will be described later, the pixel11can perform frame inversion driving by performing the first operation and the second operation alternately.

InFIG.2and the like, a potential VSDMAXrepresents the maximum potential that can be generated by the source driver circuit15. A potential VSDMINrepresents the minimum potential that can be generated by the source driver circuit15.

In this embodiment, an example of a method for operating the pixel11is described, assuming that the potential applied to the other electrode of the display element106, i.e., the potential VCOM=(VSDMAX+VSDMIN)/2. The capacitive coupling coefficient of the node NM is set to 1. Furthermore, changes in potentials due to the threshold voltage of the transistors, a feedthrough, and the like are not considered.

In this specification and the like, the node NM and the node NA provided in the pixel11[i,j] are denoted as a node NM[i,j] and a node NA[i,j].

Between Time T01and Time T02, the potential of the wiring21[i] and the potential of the wiring22[i] are set to a high potential. Moreover, the potential of the wiring41[j] is set to a potential VS1[i,j] that is a potential corresponding to image data, and the potential of the wiring42[j] is set to a potential VS2[i,j]. Accordingly, the transistor101and the transistor102included in the pixel11[i,j] are turned on, the potential of the node NM[i,j] becomes the potential VS1[i,j], and the potential of the node NA[i,j] becomes the potential VS2[i,j]. Here, the potential VS1[i,j] can be generated by the source driver circuit15, so that the value of the potential VS1[i,j] can be greater than or equal to the potential VSDMINand less than or equal to the potential VSDMAX. The potential VS2[i,j] can be calculated by the following formula, for example.

Thus, the value of the potential VS2[i,j] can be greater than or equal to the potential VSDMINand less than or equal to the potential VCOM. The potential VS2[i,j] can be generated by the source driver circuit15.

Between Time T02and Time T03, the potential of the wiring21[i] and the potential of the wiring22[i] are set to a low potential. Thus, the transistor101and the transistor102included in the pixel11[i,j] are turned off, the potential VS1[i,j] is held in the node NM[i,j], and the potential VS2[i,j] is held in the node NA[i,j].

In this specification and the like, a low potential can be a ground potential or a negative potential, for example. A high potential can be a potential higher than the low potential.

Between Time T03and Time T04, the potential of the wiring21[i] is set to a low potential and the potential of the wiring22[i] is set to a high potential. The potential of the wiring42[j] is set to a potential VRP. Accordingly, the transistor102included in the pixel11[i,j] is turned on, and the potential of the node NA[i,j] becomes the potential VRP. On the other hand, the transistor101remains off, so that the node NM[i,j] is in a floating state. Thus, the potential of the node NM[i,j] becomes a potential VDE[i,j] expressed by the following formula.
[Formula 2]
VDE[i,j]=VS1[i,j]+(VRP−VS2[i,j])  (2)

As shown in the above formula, the potential VDE[i,j] can be calculated from the potential VS1[i,j], the potential VS2[i,j], and the potential VP. Thus, the potential VDE[i,j] can be said to be a potential generated inside the pixel11[i,j] on the basis of the potential VS1[i,j], the potential VS2[i,j], and the potential VRP.

When the potential VRPis higher than the potential VCOM, the potential VDE[i,j] can be higher than a potential “VS1[i,j]−VS2[i,j]”. As described above, the potential VS2[i,j] can be lower than the potential VCOM; hence, when the potential VRPis higher than the potential VCOM, it can be said that the polarity of the potential VRPis different from that of the potential VS2[i,j].

As the potential VRPis higher, the potential VDE[i,j] becomes higher. Although the details will be described later, the value of the potential VDE[i,j] becomes greater than or equal to the potential VCOM; hence, as the potential VDE[i,j] is higher, a potential “VDE[i,j]−VCOM” becomes higher. Consequently, as the potential VDE[i,j] is higher, a voltage applied to the display element106becomes higher. Note that the potential VRPcan be generated by the source driver circuit15; thus, the value of the potential VRPcan be greater than or equal to the potential VSDMINand less than or equal to the potential VSDMAX. InFIG.2, the value of the potential VRPis the potential VSDMAX.

When the potential VS1[i,j] and the potential VRPare made high and the potential VS2[i,j] is made low, the value of the potential VDE[i,j] can be made higher than the potential VSDMAX. Moreover, the value of the voltage “VDE[i,j]−VCOM” applied to the display element106can be twice or more a voltage “VSDMAX−VCOM”. That is, the value of the potential VDE[i,j] can be greater than or equal to a potential “2VSDMAX−VCOM”.FIG.2shows the case where the value of the potential VDE[i,j] is higher than the potential “2VSDMAX−VCOM”.

In this specification and the like, the output voltage amplitude of the source driver circuit15represents the voltage “VSDMAX−VCOM” or a voltage “VCOM−VSDMIN”.

Furthermore, between Time T03and Time T04, an image is displayed. For example, in the case where the display element106is a transmissive liquid crystal element and a backlight is provided in the display device including the pixels11, an image corresponding to the potential VDE[i,j] can be displayed using the pixel11[i,j] by turning on the backlight.

Between Time T04and Time T11, the potential of the wiring21and the potential of the wiring22are set to a low potential. Thus, the transistor101and the transistor102are turned off.

Between Time T11and Time T12, the potential of the wiring21[i] and the potential of the wiring22[i] are set to a high potential. Moreover, the potential of the wiring41[j] is set to a potential V′S1[i,j] that is a potential corresponding to image data, and the potential of the wiring42[j] is set to a potential V′S2[i,j]. Accordingly, the transistor101and the transistor102included in the pixel11[i,j] are turned on, the potential of the node NM[i,j] becomes the potential V′S1[i,j], and the potential of the node NA[i,j] becomes the potential V′S2[i,j]. Here, the potential V′S1[i,j] can be generated by the source driver circuit15, so that the value of the potential V′S1[i,j] can be greater than or equal to the potential VSDMINand less than or equal to the potential VSDMAX. The potential V′S2[i,j] can be calculated by the following formula, for example.

Thus, the value of the potential V′S2[i,j] can be greater than or equal to the potential VCOMand less than or equal to the potential VSDMAX. The potential V′S2[i,j] can be generated by the source driver circuit15.

Between Time T12and Time T13, the potential of the wiring21[i] and the potential of the wiring22[i] are set to a low potential. Thus, the transistor101and the transistor102included in the pixel11[i,j] are turned off, the potential V′S1[i,j] is held in the node NM[i,j], and the potential V′S2[i,j] is held in the node NA[i,j].

Between Time T13and Time T14, the potential of the wiring21[i] is set to a low potential and the potential of the wiring22[i] is set to a high potential. The potential of the wiring42[j] is set to a potential V′RP. Accordingly, the transistor102included in the pixel11[i,j] is turned on, and the potential of the node NA[i,j] becomes the potential V′RP. On the other hand, the transistor101remains off, so that the node NM[i,j] is in a floating state. Thus, the potential of the node NM[i,j] becomes a potential V′DE[i,j] expressed by the following formula.
[Formula 4]
V′DE[i,j]V′S1[i,j]+(V′RP−V′S2[i,j])  (4)

As shown in the above formula, the potential V′DE[i,j] can be calculated from the potential V′S1[i,j], the potential V′S2[i,j], and the potential V′RP. Thus, the potential V′DE[i,j] can be said to be a potential generated inside the pixel11[i,j] on the basis of the potential V′S1[i,j], the potential V′S2[i,j], and the potential V′RP.

When the potential V′RPis higher than the potential VCOM, the potential V′DE[i,j] can be lower than a potential “V′S1[i,j]−V′S2[i,j]”. As described above, the potential V′S2[i,j] can be higher than the potential VCOM; hence, when the potential V′RPis lower than the potential VCOM, it can be said that the polarity of the potential V′RPis different from that of the potential V′S2[i,j].

As the potential V′RPis lower, the potential V′DE[i,j] becomes lower. Although the details will be described later, the value of the potential V′DE[i,j] becomes less than or equal to the potential VCOM; hence, as the potential V′DE[i,j] is lower, a potential “VCOM-V′DE[i,j]” becomes higher. Consequently, as the potential V′DE[i,j] is lower, a voltage applied to the display element106becomes higher. Note that the potential V′RPcan be generated by the source driver circuit15; thus, the value of the potential V′RPcan be greater than or equal to the potential VSDMINand less than or equal to the potential VSDMAX. InFIG.2, the value of the potential V′RPis the potential VSDMIN.

When the potential V′S1[i,j] and the potential V′RPare made low and the potential V′S2[i,j] is made high, the value of the potential V′DE[i,j] can be made lower than the potential VSDMIN. Moreover, the value of the voltage “VCOM-V′DE[i,j]” applied to the display element106can be twice or more the voltage “VCOM−VSDMIN”. That is, the value of the potential V′DE[i,j] can be less than or equal to “2VSDMIN−VCOM”.FIG.2shows the case where the value of the potential V′DE[i,j] is lower than the potential “2VSDMIN−VCOM”.

Furthermore, between Time T13and Time T14, an image is displayed. For example, in the case where the display element106is a transmissive liquid crystal element and a backlight is provided in the display device including the pixels11, an image corresponding to the potential V′DE[i,j] can be displayed using the pixel11[i,j] by turning on the backlight.

As described above, the value of the potential VDE[i,j] becomes greater than or equal to the potential VCOMand the value of the potential V′DE[i,j] becomes less than or equal to the potential VCOM. Thus, frame inversion driving is performed by the operation after Time T1. Accordingly, the pixel11can perform frame inversion driving by performing the first operation and the second operation alternately every frame period, for example.

In the case where frame inversion driving is performed, the use of a liquid crystal element as the display element106can reduce deterioration of the display element106, compared to the case where frame inversion driving is not performed. Thus, the reliability of the display device including the pixels11can be increased.

After Time T14, the potential of the wiring21[i] and the potential of the wiring22[i] are set to a low potential. Consequently, the transistor101and the transistor102included in the pixel11[i,j] are turned off. The above is an example of the method for operating the pixel11[i,j]. Note that although the potential of the wiring41before Time T01, between Time T02and Time T11, and after Time T12is the potential VCOMinFIG.2, the potential of the wiring41[j] in these periods is not limited to the potential VCOMand can be set to a given potential. Moreover, although the potential of the wiring42before Time T01, between Time T04and Time T11, and after Time T14is the potential VCOM, the potential of the wiring42[j] in these periods is not limited to the potential VCOMand can be set to a given potential.

Note that the values of the potential VS1, the potential VS2, and the potential VDEand the values of the potential V′S1, the potential V′S2, and the potential V′DEare different between the pixels11. Therefore, these potentials supplied to the pixel11[i,j] are shown with the addition of a reference symbol [i,j]. On the other hand, the value of the potential VRPand the value of the potential V′RPcan be equal in all the pixels11, for example. Therefore, the potential VRPand the potential V′RPsupplied to the pixels11are not added with the reference symbol [i,j].

In the display device10, supply of the potential VS1and the potential VS2to the pixels11and supply of the potential V′S1and the potential V′S2to the pixels11can be performed on the pixels11row by row, that is, in a line sequential manner. Meanwhile, the potential VRPand the potential V′RPcan be concurrently supplied to all the pixels11, for example. That is, in the display device10, the potential VRPand the potential V′RPcan be supplied to the pixels11in an area sequential manner.

As described above, in the display device10, the operation between Time T01and Time T03shown inFIG.2can be performed on all the pixels11in a line sequential manner, and then the operation between Time T03and Time T11can be performed in an area sequential manner. After that, the operation between Time T11and Time T13can be performed on all the pixels11in a line sequential manner, and then the operation after Time T13can be performed in an area sequential manner.

Supplying the potential VRPand the potential V′RPto the pixels11in an area sequential manner allows the display device10to operate at higher speed than the case where these potentials are supplied in a line sequential manner or the like.

FIG.3(A)is a graph showing a relation between the values of the potential VS1, the potential VS2, the potential VRP, and the potential VDEand the gray level that image data expresses. Here, when the pixel11displays an image, the luminance of light emitted from the pixel11can be increased as the gray level is higher, for example. For instance, in the case where the gray level is expressed using 8-bit image data per pixel11, there can be 256 levels of luminance of light emitted from the pixel11.

InFIG.3(A), a dotted line within the graph frame represents the potential VS1, a dashed-two dotted line represents the potential VS2, a dashed line represents the potential VRP, and a solid line represents the potential VDE. Within the graph frame, a portion indicating potentials higher than the potential VSDMAXand a portion indicating potentials lower than the potential VSDMINare hatched. Note that also inFIG.2and the like, a portion indicating potentials higher than the potential VSDMAXand a portion indicating potentials lower than the potential VSDMINare hatched as inFIG.3(A).

As shown inFIG.3(A), the value of the potential VS1can be the potential VSDMINfor the lowest gray level, and can be the potential VSDMAXfor the highest gray level. The value of the potential VS2can be the potential VCOMfor the lowest gray level, and can be the potential VSDMINfor the highest gray level. Here, by setting the value of the potential VRPto the potential VSDMAXregardless of the gray level, the value of the potential VDEcan be the potential VCOMfor the lowest gray level, and can be a potential “3VSDMAX−2VCOM” for the highest gray level. That is, for the highest gray level, a voltage “VDE−VCOM” applied to the display element106can be three times the output voltage amplitude “VSDMAX−VCOM” of the source driver circuit15.

FIG.3(B)is a graph showing a relation between the values of the potential V′S1, the potential V′S2, the potential V′RP, and the potential V′DEand the gray level that image data expresses.

As shown inFIG.3(B), the value of the potential V′S1can be the potential VSDMAXfor the lowest gray level, and can be the potential VSDMINfor the highest gray level. The value of the potential V′S2can be the potential VCOMfor the lowest gray level, and can be the potential VSDMAXfor the highest gray level. Here, by setting the value of the potential V′RPto the potential VSDMINregardless of the gray level, the value of the potential V′DEcan be the potential VCOMfor the lowest gray level, and can be a potential “3VSDMIN−2VCOM” for the highest gray level. That is, for the highest gray level, the voltage “VCOM-V′DE” applied to the display element106can be three times the output voltage amplitude “VCOM−VSDMIN” of the source driver circuit15.

As illustrated inFIG.2andFIGS.3(A) and3(B), in the display device10, a potential higher than the maximum potential that can be generated by the source driver circuit15and a potential lower than the minimum potential that can be generated by the source driver circuit15can be applied to the one electrode of the display element106. For example, when the gray level is high, the voltage applied to the display element106can be more than twice the output voltage amplitude of the source driver circuit15. Accordingly, in the display device10, high voltage can be applied to the display element106; hence, a display element to which high voltage is preferably applied at the time of the operation can be used as the display element106. For example, a liquid crystal element including liquid crystal exhibiting a blue phase or a liquid crystal element including polymer-dispersed liquid crystal can be used as the display element106. Moreover, high voltage can be applied to the display element106even when the output voltage amplitude of the source driver circuit15is small, so that the power consumption of the display device10can be reduced. Furthermore, high voltage can be applied to the display element106even when the source driver circuit15does not have high withstand voltage; thus, the display device10can be small in size and inexpensive.

InFIG.2, the potential of the wiring42[j] was set to the potential VS2[i,j] between Time T01and Time T02, and the potential of the wiring42[j] was set to the potential VRPbetween Time T03and Time T04. Moreover, the potential of the wiring42[j] was set to the potential V′S2[i,j] between Time T11and Time T12, and the potential of the wiring42[j] was set to the potential V′RPbetween Time T13and Time T14. However, one embodiment of the present invention is not limited thereto. For example, the potential of the wiring42[j] may be set to the potential VRPbetween Time T01and Time T02, and the potential of the wiring42[j] may be set to the potential VS2[i,j] between Time T03and Time T04. Moreover, the potential of the wiring42[j] may beset to the potential V′RPbetween Time T11and Time T12, and the potential of the wiring42[j] may beset to the potential V′S2[i,j] between Time T13and Time T14.FIG.4illustrates an example of a method for operating the pixel11[i,j] included in the display device10in the above case.

FIG.5(A)is a graph showing a relation between the values of the potential VS1, the potential VS2, the potential VRP, and the potential VDEand the gray level that image data expresses, in the case where the pixel11operates according to the method illustrated inFIG.4.

As in the case shown inFIG.3(A), the value of the potential VS1can be the potential VSDMINfor the lowest gray level, and can be the potential VSDMAXfor the highest gray level. Meanwhile, the value of the potential VS2can be the potential VCOMfor the lowest gray level, which is the same as the case shown inFIG.3(A), and can be the potential VSDMAXfor the highest gray level, which is different from the case shown inFIG.3(A). In other words, the potential VS2[i,j] can be calculated by the following formula, for example.

The value of the potential VRPcan be the potential VSDMIN, which is different from the case shown inFIG.3(A). Furthermore, the value of the potential VDE[i,j] can be calculated by the following formula, for example, and can be the potential VCOMfor the lowest gray level and can be the potential “3VSDMAX−2VCOM” for the highest gray level, as in the case shown inFIG.3(A). That is, for the highest gray level, the voltage “VDE−VCOM” applied to the display element106can be three times the output voltage amplitude “VSDMAX−VCOM” of the source driver circuit15.
[Formula 6]
VDE[i,j]=VS1[i,j]+(VS2[i,j]−VRP)  (6)

FIG.5(B)is a graph showing a relation between the values of the potential V′S1, the potential V′S2, the potential V′RP, and the potential V′DEand the gray level that image data expresses, in the case where the pixel11operates according to the method illustrated inFIG.4.

As in the case shown inFIG.3(A), the value of the potential V′S1can be the potential VSDMAXfor the lowest gray level, and can be the potential VSDMINfor the highest gray level. Meanwhile, the value of the potential V′S2can be the potential VCOMfor the lowest gray level, which is the same as the case shown inFIG.3(B), and can be the potential VSDMINfor the highest gray level, which is different from the case shown inFIG.3(B). In other words, the potential V′S2[i,j] can be calculated by the following formula, for example.

The value of the potential V′RPcan be the potential VSDMAX, which is different from the case shown inFIG.3(B). Furthermore, the value of the potential V′DE[i,j] can be calculated by the following formula, for example, and can be the potential VCOMfor the lowest gray level and can be the potential “3VSDMIN−2VCOM” for the highest gray level, as in the case shown inFIG.3(B). That is, for the highest gray level, the voltage “VCOM-V′DE” applied to the display element106can be three times the output voltage amplitude “VCOM−VSDMIN” of the source driver circuit15.
[Formula 8]
V′DE[i,j]=V′S1[i,j]+(V′S2[i,j]−V′RP)  (8)

FIG.6is a block diagram illustrating a structure example of a display device50that is a variation example of the display device10. Like the display device10, the display device50includes the display portion12in which the pixels11are arranged in a matrix of m rows and n columns, the image data generator circuit13, the gate driver circuit14, and the source driver circuit15. Note thatFIG.6illustrates the pixel11[1,j], the pixel11[1,j+1], the pixel11[1,j+2], the pixel11[1,j+3], the pixel11[m,j], the pixel11[m,j+1], the pixel11[m,j+2], and the pixel11[m,j+3] among the pixels11. The gate driver circuit14is not illustrated inFIG.6.

The display device50is different from the display device10in that a transistor16is provided. The transistor16can be provided for each column of the pixels11, for example. In the case where the transistor16is provided for each column of the pixels11, n transistors16can be provided in the display device50.

One of a source and a drain of the transistor16is electrically connected to the wiring42. In this specification and the like, for example, the transistor16electrically connected to the wiring42[j] is denoted as a transistor16[j].

The other of the source and the drain of each of the transistor16[1] to the transistor16[n] is electrically connected to one wiring26, for example. Gates of the transistor16[1] to the transistor16[n] are electrically connected to one wiring23, for example.

The wiring26has a function of a power supply line. The potential of the wiring26can be the potential VRPor the potential V′RP. Note that the wiring26is electrically connected to a power supply circuit that is not illustrated in the diagram, and the power supply circuit generates the potential VRPand the potential V′RP.

By turning on the transistor16, the potential of the wiring26can be supplied to the wiring42. That is, the transistor16has a function of a switch that controls conduction and non-conduction between the wiring26and the wiring42. Note that the transistor16is not necessarily a transistor as long as it has a function of a switch.

In the display device50, the potential VRPor the potential V′RPcan be supplied to the wiring42through the wiring26; hence, the source driver circuit15does not necessarily have a function of generating the potential VRPand the potential V′RP.

FIG.7is a timing chart showing an example of a method for operating the pixel11[i,j] included in the display device50and illustrates a variation example ofFIG.2. Note that the transistor16is described as an n-channel transistor; when the magnitude relation between the potentials is inverted as appropriate, for example, the following description can also apply to the case where the transistor16is a p-channel transistor or the like.

In the operation method shown inFIG.7, the potential of the wiring23is set to a low potential between Time T01and Time T03. After that, between Time T03and Time T04, the potential of the wiring23is set to a high potential and the potential of the wiring26is set to the potential VRP. Thus, the transistor16[1] to the transistor16[n] are turned on, and the potentials of the wiring42[1] to the wiring42[n] become the potential VRP. Between Time T04and Time T11, the potential of the wiring23is set to a low potential. Thus, the transistor16[1] to the transistor16[n] are turned off.

Between Time T13and Time T14, the potential of the wiring23is set to a high potential and the potential of the wiring26is set to the potential V′P. Thus, the transistor16[1] to the transistor16[n] are turned on, and the potentials of the wiring42[1] to the wiring42[n] become the potential V′RP. After Time T14, the potential of the wiring23is set to a low potential. Thus, the transistor16[1] to the transistor16[n] are turned off.

The above are the differences from the operation method shown inFIG.2. Note that inFIG.7, the potential of the wiring26is set to the potential VRPbefore Time T03and between Time T04and Time T13and the potential of the wiring26is set to the potential V′RPafter Time T14; however, the potential of the wiring26in these periods can be set to a given potential.

In the case where the display device50operates according to the method shown inFIG.7,FIG.3(A)can be referred to for the values of the potential VS1[i,j], the potential VS2[i,j], the potential VRP, and the potential VDE[i,j] when the value of the potential VRPis replaced with a value higher than the potential VSDMAX, for example. Moreover,FIG.3(B)can be referred to for the values of the potential V′S1[i,j], the potential V′S2[i,j], the potential V′RP, and the potential V′DE[i,j] when the value of the potential V′RPis replaced with a value lower than the potential VSDMIN, for example.

InFIG.7, as in the case shown inFIG.2, the potential of the wiring42[j] was set to the potential VS2[i,j] between Time T01and Time T02, and the potential of the wiring42[j] was set to the potential VRPbetween Time T03and Time T04. Moreover, the potential of the wiring42[j] was set to the potential V′S2[i,j] between Time T11and Time T12, and the potential of the wiring42[j] was set to the potential V′RPbetween Time T13and Time T14. However, one embodiment of the present invention is not limited thereto. For example, as in the case shown inFIG.4, the potential of the wiring42[j] may be set to the potential VRPbetween Time T01and Time T02, and the potential of the wiring42[j] may be set to the potential VS2[i,j] between Time T03and Time T04. Moreover, the potential of the wiring42[j] may be set to the potential V′RPbetween Time T11and Time T12, and the potential of the wiring42[j] may be set to the potential V′S2[i,j] between Time T13and Time T14.FIG.8illustrates an example of a method for operating the pixel11[i,j] included in the display device50in the above case.

In the operation method shown inFIG.8, between Time T01and Time T02, the potential of the wiring23is set to a high potential and the potential of the wiring26is set to the potential VRP. Then, between Time T02and Time T03, the potential of the wiring23is set to a low potential. Between Time T11and Time T12, the potential of the wiring23is set to a high potential and the potential of the wiring26is set to the potential V′RP. Then, between Time T12and Time T13, the potential of the wiring23is set to a low potential.

The above are the differences from the operation method shown inFIG.7. Note that inFIG.8, the potential of the wiring26is set to the potential VRPbefore Time T01and between Time T02and Time T11and the potential of the wiring26is set to the potential V′RPafter Time T12; however, the potential of the wiring26in these periods can be set to a given potential.

In the case where the display device50operates according to the method shown inFIG.8,FIG.5(A)can be referred to for the values of the potential VS1[i,j], the potential VS2[i,j], the potential VRP, and the potential VDE[i,j] when the value of the potential VRPis replaced with a value lower than the potential VSDMIN, for example. Moreover,FIG.5(B)can be referred to for the values of the potential V′S1[i,j], the potential V′S2[i,j], the potential V′RP, and the potential V′DE[i,j] when the value of the potential V′RPis replaced with a value higher than the potential VSDMAX, for example.

In the display device50, the potential VRPand the potential V′RPcan be a potential higher than the potential VSDMAX, which is the maximum potential that can be generated by the source driver circuit15, or a potential lower than the potential VSDMIN, which is the minimum potential that can be generated by the source driver circuit15. Thus, a voltage higher than the voltage that can applied to the display element106included in the display device10can be applied to the display element106included in the display device50. Note that the value of the potential VRPand the value of the potential V′RPare preferably set so that, in the case where an image displayed using the pixel11is an image with the lowest gray level, the voltage applied to the display element106included in this pixel11is lower than or equal to the threshold voltage of the display element106. Here, the threshold voltage of the display element106refers to a voltage applied to the display element106when the visible light transmittance of the display element106becomes a specific value, for example.

In the display device50, the potential VRPand the potential V′RPcan be supplied to the pixels11in an area sequential manner, as in the display device10.

FIG.9is a block diagram illustrating a structure example of a display device60that is a variation example of the display device50. LikeFIG.6,FIG.9illustrates the pixel11[1,j], the pixel11[1,j+1], the pixel11[1,j+2], the pixel11[1,j+3], the pixel11[m,j], the pixel11[m,j+1], the pixel11[m,j+2], and the pixel11[m,j+3] among the pixels11. As inFIG.6, the gate driver circuit14is not illustrated inFIG.9.

The display device60is different from the display device50in that the transistors16are replaced with transistors16aand transistors16band the wirings42are replaced with wirings42aand wirings42b. In addition, the display device60is different from the display device50in that the display device60does not include the wiring26and includes a wiring26aand a wiring26b. The number of transistors16aprovided in the display device60and the number of transistors16bprovided in the display device60can be equal to each other. That is, the display device60can be configured to include n/2 transistors16aand n/2 transistors16b, for example. The number of wirings42acan be equal to the number of transistors16a, and the number of wirings42bcan be equal to the number of transistors16b. That is, the display device60can be configured to include n/2 wirings42aand n/2 wirings42b, for example.

Note that the transistor16aand the transistor16bcan be transistors similar to the transistor16, for example, and are not necessarily transistors as long as they have a function of a switch. The wiring42aand the wiring42bhave a function of a data line like the wiring42, and the wiring26aand the wiring26bhave a function of a power supply line like the wiring26.

FIG.9illustrates the case where the pixel11[1,j] to the pixel11[m,j] are electrically connected to one wiring42a, the pixel11[1,j+1] to the pixel11[m,j+1] are electrically connected to one wiring42b, the pixel11[1,j+2] to the pixel11[m,j+2] are electrically connected to one wiring42a, and the pixel11[1,j+3] to the pixel11[m,j+3] are electrically connected to one wiring42b. That is, the wiring42ais electrically connected to one of the pixel11in the odd-numbered column and the pixel11in the even-numbered column, for example, and the wiring42bis electrically connected to the other of the pixel11in the odd-numbered column and the pixel11in the even-numbered column.

One of a source and a drain of the transistor16ais electrically connected to the wiring42a. One of a source and a drain of the transistor16bis electrically connected to the wiring42b. The other of the source and the drain of the transistor16ais electrically connected to the wiring26a. The other of the source and the drain of the transistor16bis electrically connected to the wiring26b. Agate of the transistor16aand agate of the transistor16bare electrically connected to the wiring23.

In this specification and the like, for example, the wiring42aelectrically connected to the pixel11[1,j] to the pixel11[m,j] is denoted as a wiring42a[j]. As another example, the wiring42belectrically connected to the pixel11[1,j+1] to the pixel11[m,j+1] is denoted as a wiring42b[j+1]. As another example, the transistor electrically connected to the wiring42a[j] is denoted as a transistor16a[j], and the transistor electrically connected to the wiring42b[j+1] is denoted as a transistor16b[j+1].

The potential of the wiring26aand the potential of the wiring26bcan be the potential VRPor the potential V′RP. Here, for example, when the potential of the wiring26ais the potential VRP, the potential of the wiring26bcan be the potential V′RP; when the potential of the wiring26ais the potential V′RP, the potential of the wiring26bcan be the potential VRP. Note that as described above, the potential VRPand the potential V′RPcan be generated by a power supply circuit.

FIG.10is a timing chart showing an example of a method for operating the pixel11[i,j] and the pixel11[i,j+1] included in the display device60. Note that the transistor16aand the transistor16bare described as n-channel transistors; when the magnitude relation between the potentials is inverted as appropriate, for example, the following description can also apply to the case where the transistor16aand the transistor16bare p-channel transistors or the like.

In the operation method shown inFIG.10, the potentials of the wiring21[i], the wiring22[i], the wiring23, the wiring41[j], the node NM[i,j], and the node NA[i,j] are the same as those in the operation method shown inFIG.7. Moreover, in the operation method shown inFIG.10, the potential of the wiring26ais the same as the potential of the wiring26shown inFIG.7, and the potential of the wiring42a[j] is the same as the potential of the wiring42[j] shown inFIG.7.

In the operation method shown inFIG.10, the potential of the wiring26bis different from the potential of the wiring26ain that the potential VRPis replaced with the potential V′RPand the potential V′RPis replaced with the potential VRP. The potential of the wiring41[j+1] is different from the potential of the wiring41[j] in that the potential VS1[i,j] is replaced with a potential V′S1[i,j+1] and the potential V′S1[i,j] is replaced with a potential VS1[i,j+]. The potential of the wiring42b[j+1] is different from the potential of the wiring42a[j] in that the potential VS2[i,j], the potential VRP, the potential V′S2[i,j], and the potential V′RPare replaced with a potential V′S2[i,j+1], the potential V′RP, a potential VS2[i,j+1], and the potential VRP, respectively.

The potential of the node NM[i,j+1] is different from the potential of the node NM[i,j] in that the potential VS1[i,j], the potential VDE[i,j], the potential V′S1[i,j], and the potential V′DE[i,j] are replaced with the potential V′S1[i,j+1], a potential V′DE[i,j+1], the potential VS1[i,j+1], and a potential VDE[i,j+1], respectively. The potential of the node NA[i,j+1] is different from the potential of the node NM[i,j] in that the potential VS2[i,j], the potential VP, the potential V′S2[i,j], and the potential V′RPare replaced with the potential V′S2[i,j+1], the potential V′RP, the potential VS2[i,j+1], and the potential VRP, respectively.

In the operation method shown inFIG.10, the value of the potential VDE[i,j], which is the potential of the node NM[i,j] between Time T03and Time T04, can be greater than or equal to the potential VCOM, and the value of the potential V′DE[i,j+1], which is the potential of the node NM[i,j+1], can be less than or equal to the potential VCOM. Meanwhile, the value of the potential V′DE[i,j], which is the potential of the node NM[i,j] between Time T13and Time T14, can be less than or equal to the potential VCOM, and the value of the potential VDE[i,j+1], which is the potential of the node NM[i,j+1], can be greater than or equal to the potential VCOM. Accordingly, in the display device60, frame inversion driving can be performed by a column line inversion driving method; thus, occurrence of flickers can be suppressed and a high-quality image can be displayed. Note that even in the case where the source driver circuit15generates the potential VR and the potential V′RPas in the display device10, driving can be performed by a column line inversion driving method as in the display device60.

The above is an example of a method for operating the pixel11[i,j] and the pixel11[i,j+1] provided in the display device60. Note that in the display device60, the potential VRPand the potential V′RPcan be supplied to the pixels11in an area sequential manner, as in the display device50and the like.

Note thatFIG.3(A)can be referred to for the values of the potential VS1[i,j], the potential VS1[i,j+1], the potential VS2[i,j], the potential VS2[i,j+1], the potential VRP, the potential VDE[i,j], and the potential VDE[i,j+l] when the potential VRPis replaced with a value higher than the potential VSDMAX. Moreover,FIG.3(B)can be referred to for the values of the potential V′S1[i,j], the potential V′S1[i,j+1], the potential V′S2[i,j], the potential V′S2[i,j+1], the potential V′RP, the potential V′DE[i,j], and the potential V′DE[i,j+1] when the potential V′RPis replaced with a value higher than the potential VSDMIN.

In the operation method shown inFIG.10, the potentials of the wiring21[i], the wiring22[i], the wiring23, the wiring41[j], the node NM[i,j], and the node NA[i,j] may be the same as those in the operation method shown inFIG.8. Moreover, in the operation method shown inFIG.10, the potential of the wiring26amay be the same as the potential of the wiring26shown inFIG.8, and the potential of the wiring42a[j] may be the same as the potential of the wiring42[j] shown inFIG.8. In that case,FIGS.5(A) and5(B)can be referred to for the potentials supplied to the pixel11.

In one embodiment of the present invention, the configuration of the pixel11is not limited to the configuration illustrated inFIG.1(B).FIG.11(A)is a diagram illustrating a configuration example of the pixel11different from that inFIG.1(B).

In the pixel11having the configuration illustrated inFIG.11(A), the display element106can be a light-emitting element. As the light-emitting element, an organic EL element, an inorganic EL element, an LED (Light Emitting Diode) element, or the like can be used.

In addition, a transistor103is provided in the pixel11having the configuration illustrated inFIG.11(A). Furthermore, the capacitor105is not provided and a capacitor107is provided.

One of the source and the drain of the transistor101is electrically connected to one electrode of the capacitor104. The one electrode of the capacitor104is electrically connected to a gate of the transistor103. The gate of the transistor103is electrically connected to one electrode of the capacitor107.

The other electrode of the capacitor107is electrically connected to one electrode of the display element106. The one electrode of the display element106is electrically connected to one of a source and a drain of the transistor103. The other of the source and the drain of the transistor103is electrically connected to a common wiring34. To the common wiring34, a constant potential, for example, can be supplied. For instance, a potential higher than or equal to the potential VCOMcan be supplied.

Here, a node where the one of the source and the drain of the transistor101, the gate of the transistor103, the one electrode of the capacitor104, and the one electrode of the capacitor107are electrically connected to each other is referred to as the node NM.

The above are the differences between the pixel11having the configuration illustrated inFIG.11(A)and the pixel11having the configuration illustrated inFIG.1(B). The operation at Time T01to Time T04shown inFIG.2,FIG.4,FIG.7, orFIG.8can be referred to for the operation of the pixel11having the configuration illustrated inFIG.11(A).

As described above, in the display device of one embodiment of the present invention, high voltage can be applied to the display element106. Accordingly, when the pixel11has the configuration illustrated inFIG.11(A), a large amount of current can be made to flow to the display element106, which is a light-emitting element. Consequently, a high-luminance image can be displayed on the display device of one embodiment of the present invention.

FIGS.11(B) and11(C)are diagrams illustrating configuration examples of the pixel11. InFIG.11(B), the transistor101and the transistor102included in the pixel11having the configuration illustrated inFIG.1(B)are provided with a back gate; inFIG.11(C), the transistor101, the transistor102, and the transistor103included in the pixel11having the configuration illustrated inFIG.11(A)are provided with a back gate. Each of the back gates is electrically connected to a corresponding front gate and has an effect of increasing the on-state current. Different constant potentials may be supplied to the back gate and the front gate. With such a configuration, the threshold voltage of the transistor can be controlled. Note that although all of the transistors have a back gate inFIGS.11(B) and11(C), a transistor without a back gate may be included.

<Structure Example of Display Device>

In this embodiment, a structure example of the display device of one embodiment of the present invention will be described with reference to drawings.

FIG.12(A)is a cross-sectional view of a transmissive liquid crystal display device that is an example of the display device of one embodiment of the present invention. The liquid crystal display device illustrated inFIG.12(A)includes a substrate131, the transistor101, the transistor102, an insulating layer215, a conductive layer46, an insulating layer44, a pixel electrode121, an insulating layer45, a common electrode123, a liquid crystal layer122, and a substrate132.

The transistor101and the transistor102are positioned over the substrate131. The insulating layer215is positioned over the transistor101and over the transistor102. The conductive layer46is positioned over the insulating layer215. The insulating layer44is positioned over the transistor101, over the transistor102, over the insulating layer215, and over the conductive layer46. The pixel electrode121is positioned over the insulating layer44. The insulating layer45is positioned over the pixel electrode121. The common electrode123is positioned over the insulating layer45. The liquid crystal layer122is positioned over the common electrode123. The common electrode123includes a region overlapping with the conductive layer46with the pixel electrode121positioned therebetween. The pixel electrode121is electrically connected to the source or the drain of the transistor101. The conductive layer46is electrically connected to the source or the drain of the transistor102. The conductive layer46, the pixel electrode121, and the common electrode123each have a function of transmitting visible light.

In the liquid crystal display device of this embodiment, the pixel electrode121and the common electrode123are stacked with the insulating layer45positioned therebetween, and operates in an FFS (Fringe Field Switching) mode. The pixel electrode121, the liquid crystal layer122, and the common electrode123can function as the display element106.

The pixel electrode121, the insulating layer45, and the common electrode123can function as one capacitor105. The conductive layer46, the insulating layer44, and the pixel electrode121can function as one capacitor104. The liquid crystal display device of this embodiment thus includes two capacitors in a pixel.

The two capacitors are formed using a material transmitting visible light and include a region where they overlap with each other. Accordingly, the pixel has a high aperture ratio and can include a plurality of storage capacitors.

When the aperture ratio of the transmissive liquid crystal display device (also referred to as the aperture ratio of a pixel) is increased, the liquid crystal display device can have higher resolution. Furthermore, a higher aperture ratio can increase the light extraction efficiency. Thus, the power consumption of the liquid crystal display device can be reduced.

The capacitance of the capacitor104is preferably larger than the capacitance of the capacitor105. For example, the area of a region where the pixel electrode121and the conductive layer46overlap with each other is preferably larger than the area of a region where the pixel electrode121and the common electrode123overlap with each other. The thickness T1of the insulating layer44positioned between the conductive layer46and the pixel electrode121is preferably thinner than the thickness T2of the insulating layer45positioned between the pixel electrode121and the common electrode123.

The structure of the display device of this embodiment can be used also for a touch panel.FIG.12(B)illustrates an example in which a touch sensor TC is mounted on the display device inFIG.12(A). The sensitivity of the touch sensor TC can be increased by providing the touch sensor TC on a position close to the display surface of the display device.

There is no particular limitation on a detection element (also referred to as a sensor element) included in the touch panel of one embodiment of the present invention. A variety of sensors that can sense proximity or touch of a sensing target such as a finger or a stylus can be used as the sensor element.

For example, a variety of types such as a capacitive type, a resistive type, a surface acoustic wave type, an infrared type, an optical type, and a pressure-sensitive type can be used as the sensor type.

Examples of the capacitive type include a surface-capacitive type and a projected-capacitive type. Examples of the projected-capacitive type include a self-capacitive type and a mutual-capacitive type. The use of the mutual-capacitive type is preferable because multiple points can be sensed simultaneously.

The touch panel of one embodiment of the present invention can have any of a variety of structures, including a structure in which a display device and a sensor element that are separately formed are attached to each other and a structure in which an electrode and the like included in a sensor element are provided on one or both of a substrate supporting a display element and a counter substrate.

<<Top Surface Layout of Pixel>>

FIGS.13(A) to13(C)are top views of a pixel.FIG.13(A)is a top view of a stacked-layer structure from a gate221aand a gate221bto a common electrode123a, which is seen from the common electrode123aside.FIG.13(B)is a top view of the stacked-layer structure ofFIG.13(A)except the common electrode123a, andFIG.13(C)is a top view of the stacked-layer structure ofFIG.13(A)except the common electrode123aand the pixel electrode121.

The pixel includes a connection portion73and a connection portion74. In the connection portion73, the pixel electrode121is electrically connected to the transistor101. Specifically, a conductive layer222afunctioning as the source or the drain of the transistor101is in contact with a conductive layer46b, and the conductive layer46bis in contact with the pixel electrode121. In the connection portion74, a conductive layer46ais electrically connected to the transistor102. Specifically, the conductive layer46ais in contact with a conductive layer222cfunctioning as the source or the drain of the transistor102.

<<Cross-Sectional Structure of Display Device>>

FIG.14is a cross-sectional view of a display device. Note that the cross-sectional structure of the pixel corresponds to the cross-sectional view taken along the dashed-dotted line B1-B2inFIG.13(A).

The display device illustrated inFIG.14includes the substrate131, the substrate132, the transistor101, the conductive layer46a, the conductive layer46b, the insulating layer44, the insulating layer45, the pixel electrode121, the liquid crystal layer122, the common electrode123a, a conductive layer123b, a conductive layer222e, an alignment film133a, an alignment film133b, an adhesive layer141, an overcoat135, a light-blocking layer38, a polarizing plate161, a polarizing plate163, a backlight unit30, an FPC172, and the like.

Here, the backlight unit30is provided with light sources39and can be configured to include light sources39emitting red light, light sources39emitting green light, and light sources39emitting blue light, for example. In this case, for example, when the light source39emitting red light, the light source39emitting green light, and the light source39emitting blue light are made to emit light sequentially, the display device of one embodiment of the present invention can be operated by a field sequential method. In the case where the display device of one embodiment of the present invention is operated by a field sequential method, it is not necessary to provide a coloring layer (a color filter), as illustrated inFIG.14. In other words, light loss caused by light absorption in a coloring layer does not occur. Thus, the light transmittance in the display device of one embodiment of the present invention can be increased. Moreover, even when the illuminance of light emitted from the light source39is lowered, a high-luminance image can be displayed on the display device of one embodiment of the present invention; hence, the power consumption of the display device of one embodiment of the present invention can be reduced. Note that when the red light source39, the green light source39, and the blue light source39are made to emit light at the same time, the display device of one embodiment of the present invention can perform white display.

The transistor101and the transistor102are positioned over the substrate131. The transistor101includes the gate221a, a gate insulating layer211, a semiconductor layer231a, the conductive layer222a, a conductive layer222b, an insulating layer212, an insulating layer213, a gate insulating layer225a, and a gate223a. The transistor102includes the gate221b, the gate insulating layer211, a semiconductor layer231b, the conductive layer222c, a conductive layer222d, the insulating layer212, the insulating layer213, a gate insulating layer225b, and a gate223b.

The transistor101and the transistor102illustrated inFIG.14include the gates above and below the channel. It is preferable that the two gates be electrically connected to each other. A transistor with two gates that are electrically connected to each other can have higher field-effect mobility and thus have a higher on-state current than other transistors. Consequently, a circuit capable of high-speed operation can be fabricated. Furthermore, the area occupied by a circuit portion can be reduced. The use of the transistor having a high on-state current can reduce signal delay in each wiring and can suppress display unevenness even in a display device in which the number of wirings is increased because of an increase in size or an increase in resolution. In addition, the area occupied by a circuit portion can be reduced, whereby the bezel of the display device can be narrowed. Moreover, with such a structure, a highly reliable transistor can be fabricated.

A semiconductor layer231includes a pair of low-resistance regions231nand a channel formation region231ibetween the pair of low-resistance regions231n.

The channel formation region231ioverlaps with a gate221with the gate insulating layer211therebetween and overlaps with the gate223with a gate insulating layer225therebetween.

In this specification and the like, the semiconductor layer231refers to one or both of the semiconductor layer231aand the semiconductor layer231b. The gate221refers to one or both of the gate221aand the gate221b, and the gate223refers to one or both of the gate223aand the gate223b. The gate insulating layer225refers to one or both of the gate insulating layer225aand the gate insulating layer225b.

Here, an example in which a metal oxide is used for the semiconductor layer231is described.

The gate insulating layer211and the gate insulating layer225that are in contact with the channel formation region231iare preferably oxide insulating layers. In the case where the gate insulating layer211or the gate insulating layer225has a stacked-layer structure, it is preferable that at least a layer in contact with the channel formation region231ibe an oxide insulating layer. Accordingly, generation of oxygen vacancies in the channel formation region231ican be suppressed, and the reliability of the transistor can be improved.

Either one or both of the insulating layer213and the insulating layer214are preferably a nitride insulating layer. Thus, entry of impurities into the semiconductor layer231can be suppressed, and the reliability of the transistor can be improved.

The insulating layer215preferably has a planarization function, and is preferably an organic insulating layer, for example. Note that one or both of the insulating layer214and the insulating layer215are not necessarily formed.

The resistivity of the low-resistance regions231nis lower than that of the channel formation region231i. The low-resistance regions231nare regions of the semiconductor layer231that are in contact with the insulating layer212. Here, the insulating layer212preferably contains nitrogen or hydrogen. Accordingly, nitrogen or hydrogen in the insulating layer212enters the low-resistance regions231n, whereby the carrier concentration of the low-resistance regions231ncan be increased. Alternatively, the low-resistance regions231nmay be formed by the addition of an impurity with the gate223used as a mask. Examples of the impurity include hydrogen, helium, neon, argon, fluorine, nitrogen, phosphorus, arsenic, antimony, boron, and aluminum, and the impurity can be added by an ion implantation method or an ion doping method. Other than the above impurities, for example, indium, which is a constituent element of the semiconductor layer231, may be added to form the low-resistance regions231n. When indium is added, the concentration of indium in the low-resistance regions231nis sometimes higher than that in the channel formation region231i.

Alternatively, the low-resistance regions231ncan be formed in such a manner that, after the gate insulating layer225and the gate223are formed, a first layer is formed to be in contact with regions of the semiconductor layer231and heat treatment is performed to lower the resistance of the regions.

As the first layer, a film containing at least one of metal elements such as aluminum, titanium, tantalum, tungsten, chromium, and ruthenium can be used. The first layer preferably contains at least one of aluminum, titanium, tantalum, and tungsten. Alternatively, it is preferable to use a nitride containing at least one of these metal elements or an oxide containing at least one of these metal elements. In particular, it is preferable to use a metal film such as a tungsten film or a titanium film, a nitride film such as an aluminum titanium nitride film, a titanium nitride film, or an aluminum nitride film, or an oxide film such as an aluminum titanium oxide film, for example.

The thickness of the first layer can range, for example, from 0.5 nm to 20 nm, preferably from 0.5 nm to 15 nm, further preferably from 0.5 nm to 10 nm, still further preferably 1 nm to 6 nm. Typically, the thickness can be approximately 5 nm or approximately 2 nm. With such a thin first layer, the resistance of the semiconductor layer231can be sufficiently lowered.

It is important that the low-resistance regions231nare made to have a higher carrier density than the channel formation region231i. For example, the low-resistance regions231ncan be a region having a higher hydrogen content than the channel formation region231i, or a region containing more oxygen vacancies than the channel formation region231i. When bonded to a hydrogen atom, an oxygen vacancy in the oxide semiconductor functions as a carrier generation source.

The heat treatment is performed while the first layer is provided in contact with regions of the semiconductor layer231, whereby oxygen in the regions is absorbed into the first layer, and thus, a large amount of oxygen vacancy can be generated in the regions. Thus, the low-resistance regions231ncan have an extremely low resistance.

The low-resistance regions231nformed in the above manner have a feature in that its resistance is not likely to be increased by subsequent process. There is no possibility that the conductivity of low-resistance regions231nis impaired by heat treatment in an atmosphere containing oxygen or by deposition process in an atmosphere containing oxygen, for example; thus, a transistor with favorable electrical characteristics and high reliability can be fabricated.

When the first layer that has undergone the heat treatment has conductivity, the first layer is preferably removed after the heat treatment. In contrast, when the first layer has insulating properties, the first layer can function as a protective insulating film when remaining.

The conductive layer46bis positioned over the insulating layer215, the insulating layer44is positioned over the conductive layer46b, and the pixel electrode121is positioned over the insulating layer44. The pixel electrode121is electrically connected to the conductive layer222a. Specifically, the conductive layer222ais connected to the conductive layer46b, and the conductive layer46bis connected to the pixel electrode121.

The conductive layer46ais positioned over the insulating layer215. The conductive layer46ais electrically connected to the conductive layer222c. Specifically, the conductive layer46ais in contact with the conductive layer222cthrough an opening provided in the insulating layer214and the insulating layer215.

The substrate131and the substrate132are attached to each other with the adhesive layer141.

The FPC172is electrically connected to the conductive layer222e. Specifically, the FPC172is in contact with a connector242, the connector242is in contact with the conductive layer123b, and the conductive layer123bis in contact with the conductive layer222e. The conductive layer123bis formed over the insulating layer45, and the conductive layer222eis formed over the insulating layer214. The conductive layer123bcan be formed using the same step and the same material as those for the common electrode123a. The conductive layer222ecan be formed using the same step and the same material as those for the conductive layer222ato the conductive layer222d.

The pixel electrode121, the insulating layer45, and the common electrode123acan function as one capacitor105. The conductive layer46a, the insulating layer44, and the pixel electrode121can function as one capacitor104. The display device of one embodiment of the present invention thus includes two capacitors, for example, in one pixel. As a result, the storage capacity of the pixel can be increased.

The two capacitors are formed using a material transmitting visible light and include a region where they overlap with each other. Accordingly, the pixel can achieve a high aperture ratio and high storage capacity.

The capacitance of the capacitor104is preferably larger than the capacitance of the capacitor105. Therefore, the area of a region where the pixel electrode121and the conductive layer46aoverlap with each other is preferably larger than the area of a region where the pixel electrode121and the common electrode123aoverlap with each other. The insulating layer44positioned between the conductive layer46aand the pixel electrode121is preferably thinner than the insulating layer45positioned between the pixel electrode121and the common electrode123a.

AlthoughFIG.14illustrates an example in which both the transistor101and the transistor102have the back gate (the gate223), one or both of the transistor101and the transistor102do not necessarily have a back gate.

AlthoughFIG.14illustrates an example in which the gate insulating layer225is formed only over the channel formation region231iand does not overlap with the low-resistance region231n, the gate insulating layer225may overlap with at least part of the low-resistance region231n.FIG.15illustrates an example in which the gate insulating layer225is formed in contact with the low-resistance regions231nand the gate insulating layer211. The gate insulating layer225illustrated inFIG.15has an advantage in that the step of processing the gate insulating layer225with the gate223used as a mask is not necessary, the step height of a surface on which the insulating layer214is formed can be lowered, and the like.

In a display device illustrated inFIG.16, the structures of the transistor101and the transistor102are different from those inFIG.14andFIG.15.

The transistor101illustrated inFIG.16includes the gate221a, the gate insulating layer211, the semiconductor layer231a, the conductive layer222a, the conductive layer222b, an insulating layer217, an insulating layer218, the insulating layer215, and the gate223a. The transistor102includes the gate221b, the gate insulating layer211, the semiconductor layer231b, the conductive layer222c, the conductive layer222d, the insulating layer217, the insulating layer218, the insulating layer215, and the gate223b. One of the conductive layer222aand the conductive layer222bfunctions as a source, and the other functions as a drain. The insulating layer217, the insulating layer218, and the insulating layer215function as gate insulating layers.

Here, an example in which a metal oxide is used for the semiconductor layer231is described.

The gate insulating layer211and the insulating layer217that are in contact with the semiconductor layer231are preferably oxide insulating layers. In the case where the gate insulating layer211or the insulating layer217has a stacked-layer structure, at least a layer in contact with the semiconductor layer231is preferably an oxide insulating layer. Accordingly, generation of oxygen vacancies in the semiconductor layer231can be suppressed, and the reliability of the transistor can be improved.

The insulating layer218is preferably a nitride insulating layer. Thus, entry of impurities into the semiconductor layer231can be suppressed, and the reliability of the transistor can be improved.

The insulating layer215preferably has a planarization function, and is preferably an organic insulating layer, for example. Note that the insulating layer215is not necessarily formed, and the conductive layer46amay be formed on and in contact with the insulating layer218.

The conductive layer46bis positioned over the insulating layer215, the insulating layer44is positioned over the conductive layer46b, and the pixel electrode121is positioned over the insulating layer44. The pixel electrode121is electrically connected to the conductive layer222a. Specifically, the conductive layer222ais connected to the conductive layer46b, and the conductive layer46bis connected to the pixel electrode121.

The conductive layer46ais positioned over the insulating layer215. The insulating layer44and the insulating layer45are positioned over the conductive layer46a. The common electrode123ais positioned over the insulating layer45.

A display device illustrated inFIG.17is different from those inFIG.14toFIG.16in that a coloring layer331is provided. The coloring layer331is a colored layer that transmits light in a specific wavelength range, such as red light, green light, or blue light, for example. Examples of a material that can be used for the coloring layer331include a metal material, a resin material, and a resin material containing pigment or dye. In the display device illustrated inFIG.17, the light source39can be a light source that emits white light.

The display device inFIG.17can display a color image without displaying a red image, a green image, and a blue image in a time-division manner, for example. Accordingly, a color breakup or the like does not occur even when the operating frequency of the display device of one embodiment of the present invention is low; hence, a high-quality image can be displayed. Moreover, it is not necessary to switch the light sources39to emit light, so that the operation of the display device of one embodiment of the present invention can be simple.

Next, the details of materials and the like that can be used for the components of the display device of this embodiment will be described.

There is no strict limitation on the material and the like for the substrate included in the display device; a variety of substrates can be used. For example, a glass substrate, a quartz substrate, a sapphire substrate, a semiconductor substrate, a ceramic substrate, a metal substrate, a plastic substrate, or the like can be used.

The use of a thin substrate can reduce the weight and thickness of the display device. Furthermore, the use of a substrate that is thin enough to have flexibility allows a flexible display device to be obtained.

Liquid crystal materials include a positive liquid crystal material with a positive dielectric anisotropy (Δε) and a negative liquid crystal material with a negative dielectric anisotropy. Either of the materials can be used in one embodiment of the present invention, and an optimal liquid crystal material can be used according to the employed mode and design.

The display device of this embodiment can employ a liquid crystal element using a variety of modes. It is possible to employ a liquid crystal element using, other than the above-described FFS mode, an IPS mode, a TN mode, an ASM (Axially Symmetric aligned Micro-cell) mode, an OCB (Optically Compensated Birefringence) mode, an FLC (Ferroelectric Liquid Crystal) mode, an AFLC (AntiFerroelectric Liquid Crystal) mode, an ECB (Electrically Controlled Birefringence) mode, a VA-IPS mode, or a guest-host mode, for example.

Note that a liquid crystal element is an element that controls the transmission or non-transmission of light utilizing an optical modulation action of a liquid crystal. The optical modulation action of the liquid crystal is controlled by an electric field applied to the liquid crystal (including a horizontal electric field, a vertical electric field, and an oblique electric field). As the liquid crystal used for the liquid crystal element, thermotropic liquid crystal, low-molecular liquid crystal, high-molecular liquid crystal, polymer-dispersed liquid crystal, ferroelectric liquid crystal, anti-ferroelectric liquid crystal, or the like can be used. Such a liquid crystal material exhibits a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, or the like depending on conditions.

As described above, in the display device of this embodiment, a liquid crystal element can be driven with application of high voltage; therefore, a liquid crystal exhibiting a blue phase may be used. The blue phase is one of liquid crystal phases, which is generated just before a cholesteric phase changes into an isotropic phase while the temperature of a cholesteric liquid crystal is increased. Since the blue phase appears only in a narrow temperature range, a liquid crystal composition in which a chiral material is mixed to account for 5 weight % or more is used for the liquid crystal layer in order to improve the temperature range. The liquid crystal composition that contains a liquid crystal exhibiting a blue phase and a chiral material has a short response speed and exhibits optical isotropy. In addition, the liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral material does not need alignment treatment and has small viewing angle dependence. Since an alignment film does not need to be provided and rubbing treatment is unnecessary, electrostatic discharge damage caused by the rubbing treatment can be prevented and defects or damage of the display panel in the manufacturing process can be reduced.

Since the display device of this embodiment is a transmissive liquid crystal display device, a conductive material that transmits visible light is used for both of the pair of electrodes (the pixel electrode121and the common electrode123a). When the conductive layer46bis also formed using a conductive material that transmits visible light, a decrease in aperture ratio of the pixel can be suppressed even though the capacitor104is provided. Note that a silicon nitride film is preferable as the insulating layer44and the insulating layer45that function as a dielectric of the capacitor.

For example, a material containing one or more kinds selected from indium (In), zinc (Zn), and tin (Sn) is preferably used as the conductive material transmitting visible light. Specific examples include indium oxide, indium tin oxide (ITO), indium zinc oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium tin oxide containing silicon oxide (ITSO), zinc oxide, and zinc oxide containing gallium. Note that a film containing graphene can be used as well. The film containing graphene can be formed, for example, by reducing a film containing graphene oxide.

A conductive film that transmits visible light can be formed using an oxide semiconductor (hereinafter also referred to as an oxide conductive layer). The oxide conductive layer preferably contains indium, for example, and further preferably contains an In-M-Zn oxide (M is Al, Ti, Ga, Y, Zr, La, Ce, Nd, Sn, or Hf).

An oxide semiconductor is a semiconductor material whose resistance can be controlled by oxygen vacancies in the film and/or the concentration of impurities such as hydrogen and water in the film. Thus, the resistivity of the oxide conductive layer can be controlled by selecting treatment for increasing oxygen vacancies and/or impurity concentration or treatment for reducing oxygen vacancies and/or impurity concentration, for the oxide semiconductor layer.

Note that such an oxide conductive layer formed using an oxide semiconductor can also be referred to as an oxide semiconductor layer having a high carrier density and a low resistance, an oxide semiconductor layer having conductivity, or an oxide semiconductor layer having high conductivity.

A transistor included in the display device of this embodiment may have either a top-gate structure or a bottom-gate structure. Gate electrodes may be provided above and below a channel. A semiconductor material used in the transistor is not particularly limited, and examples of the semiconductor material include an oxide semiconductor, silicon, and germanium.

For example, a Group 14 element, a compound semiconductor, or an oxide semiconductor can be used for the semiconductor layer. Typically, a semiconductor containing silicon, a semiconductor containing gallium arsenide, an oxide semiconductor containing indium, or the like can be used for the semiconductor layer.

An oxide semiconductor is preferably used as a semiconductor in which a channel of the transistor is formed. In particular, an oxide semiconductor having a wider band gap than silicon is preferably used. Using a semiconductor material having a wider band gap and a lower carrier density than silicon is preferable because the off-state current of the transistor can be reduced.

The use of an oxide semiconductor makes it possible to provide a highly reliable transistor in which a change in electrical characteristics is reduced.

Charge accumulated in the capacitor through the transistor can be retained for a long time because of the low off-state current. The use of such a transistor in a pixel allows a driver circuit to stop with the gray level of a displayed image maintained. As a result, a display device with significantly reduced power consumption can be obtained.

The transistor preferably includes an oxide semiconductor layer that is highly purified to inhibit the formation of oxygen vacancies. This can reduce the current in an off state (off-state current) of the transistor. Accordingly, the retention time of an electrical signal such as an image signal can be made longer, and a writing interval can also be set longer in a power-on state. Thus, the frequency of refresh operation can be reduced, which leads to an effect of reducing power consumption.

The transistor using an oxide semiconductor can have relatively high field-effect mobility and thus can operate at high speed. With the use of such transistors that are capable of high-speed operation in the display device, transistors in the display portion and transistors in the driver circuit portion can be formed over the same substrate. That is, a semiconductor device separately formed with a silicon wafer or the like does not need to be used as the driver circuit, which enables a reduction in the number of components of the display device. In addition, with the use of transistors capable of high-speed operation also in the display portion, a high-quality image can be provided.

An organic insulating material or an inorganic insulating material can be used as an insulating material that can be used for the insulating layers, the overcoat, and the like included in the display device. Examples of the organic insulating material include an acrylic resin, an epoxy resin, a polyimide resin, a polyamide resin, a polyimide-amide resin, a siloxane resin, a benzocyclobutene-based resin, and a phenol resin. As inorganic insulating layers, a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, a silicon nitride film, an aluminum oxide film, a hafnium oxide film, an yttrium oxide film, a zirconium oxide film, a gallium oxide film, a tantalum oxide film, a magnesium oxide film, a lanthanum oxide film, a cerium oxide film, a neodymium oxide film, and the like can be given.

For the conductive layer for the gate, the source, and the drain of the transistor, various wirings and electrodes of the display device, and the like, a single-layer structure or a stacked-layer structure using any of metals such as aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, and tungsten, or an alloy containing any of these metals as its main component can be used. For example, it is possible to employ a two-layer structure in which a titanium film is stacked over an aluminum film; a two-layer structure in which a titanium film is stacked over a tungsten film; a two-layer structure in which a copper film is stacked over a molybdenum film; a two-layer structure in which a copper film is stacked over an alloy film containing molybdenum and tungsten; a two-layer structure in which a copper film is stacked over a copper-magnesium-aluminum alloy film; a three-layer structure in which a titanium film or a titanium nitride film, an aluminum film or a copper film, and a titanium film or a titanium nitride film are stacked in this order; or a three-layer structure in which a molybdenum film or a molybdenum nitride film, an aluminum film or a copper film, and a molybdenum film or a molybdenum nitride film are stacked in this order. For example, in the case where the conductive layer has a three-layer structure, it is preferable that each of the first layer and the third layer be a film formed of titanium, titanium nitride, molybdenum, tungsten, an alloy containing molybdenum and tungsten, an alloy containing molybdenum and zirconium, or molybdenum nitride, and that the second layer be a film formed of a low-resistance material such as copper, aluminum, gold, silver, or an alloy containing copper and manganese. Note that light-transmitting conductive materials such as ITO, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or ITSO may be used. Note that an oxide conductive layer may be formed by controlling the resistivity of an oxide semiconductor.

A curable resin such as a heat-curable resin, a photocurable resin, or a two-component-mixture-type curable resin can be used as the adhesive layer141. For example, an acrylic resin, a urethane resin, an epoxy resin, or a siloxane resin can be used.

As the connector242, for example, an anisotropic conductive film (ACF) or an anisotropic conductive paste (ACP) can be used.

As the backlight unit30, a direct-type backlight, an edge-lit backlight, or the like can be used. As a light source, an LED (Light Emitting Diode), an organic EL (Electroluminescence) element, or the like can be used.

The thin films included in the display device (the insulating film, the semiconductor film, the conductive film, and the like) can each be formed by a sputtering method, a chemical vapor deposition (CVD) method, a vacuum evaporation method, a pulsed laser deposition (PLD) method, an atomic layer deposition (ALD) method, or the like. As examples of the CVD method, a plasma-enhanced chemical vapor deposition (PECVD) method, a thermal CVD method, and the like can be given. As an example of the thermal CVD method, a metal organic chemical vapor deposition (MOCVD: Metal Organic CVD) method can be given.

The thin films included in the display device (the insulating film, the semiconductor film, the conductive film, and the like) can each be formed by a method such as spin coating, dipping, spray coating, inkjet printing, dispensing, screen printing, offset printing, a doctor knife, slit coating, roll coating, curtain coating, or knife coating.

The thin films included in the display device can be processed using a photolithography method or the like. Alternatively, island-shaped thin films may be formed by a film formation method using a blocking mask. Alternatively, the thin films may be processed by a nano-imprinting method, a sandblasting method, a lift-off method, or the like. Examples of the photolithography method include a method in which a resist mask is formed over a thin film to be processed, the thin film is processed by etching or the like, and the resist mask is removed; and a method in which a photosensitive thin film is formed and then exposed to light and developed to be processed into a desired shape.

As light used for light exposure in a photolithography method, for example, an i-line (a wavelength of 365 nm), a g-line (a wavelength of 436 nm), an h-line (a wavelength of 405 nm), and light in which the i-line, the g-line, and the h-line are mixed can be given. Besides, ultraviolet light, KrF laser light, ArF laser light, or the like can be used. Light exposure may be performed by immersion lithography technique. Examples of light used for light exposure include extreme ultraviolet light (EUV) and X-rays. Furthermore, instead of the light used for the exposure, an electron beam can also be used. It is preferable to use extreme ultraviolet light, X-rays, or an electron beam because extremely minute processing can be performed. Note that when light exposure is performed by scanning of a beam such as an electron beam, a photomask is unnecessary.

For etching of the thin films, a dry etching method, a wet etching method, a sandblast method, or the like can be used.

For a semiconductor layer of the transistor included in the display device of this embodiment, a metal oxide functioning as an oxide semiconductor is preferably used. A metal oxide that can be used for the semiconductor layer will be described below.

The metal oxide preferably contains at least indium or zinc. It is particularly preferable that the metal oxide contain indium and zinc. Moreover, aluminum, gallium, yttrium, tin, or the like is preferably contained in addition to them. Furthermore, one kind or a plurality of kinds selected from boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and the like may be contained.

Note that in this specification and the like, a metal oxide containing nitrogen is also collectively referred to as a metal oxide in some cases. A metal oxide containing nitrogen may be referred to as a metal oxynitride. For example, a metal oxide containing nitrogen, such as zinc oxynitride (ZnON), may be used for the semiconductor layer.

Oxide semiconductors (metal oxides) can be classified into a single crystal oxide semiconductor and a non-single-crystal oxide semiconductor. Examples of a non-single-crystal oxide semiconductor include a c-axis aligned crystalline oxide semiconductor (CAAC-OS), a polycrystalline oxide semiconductor, a nanocrystalline oxide semiconductor (nc-OS), an amorphous-like oxide semiconductor (a-like OS), and an amorphous oxide semiconductor.

The CAAC-OS has c-axis alignment, a plurality of nanocrystals are connected in the a-b plane direction, and its crystal structure has distortion. Note that the distortion refers to a portion where the direction of a lattice arrangement changes between a region with a regular lattice arrangement and another region with a regular lattice arrangement in a region where the plurality of nanocrystals are connected.

The nanocrystal is basically a hexagon but is not always a regular hexagon and is a non-regular hexagon in some cases. Furthermore, a pentagonal or heptagonal lattice arrangement, for example, is included in the distortion in some cases. Note that it is difficult to observe a clear crystal grain boundary (also referred to as grain boundary) even in the vicinity of distortion in the CAAC-OS. That is, formation of a crystal grain boundary is inhibited by the distortion of a lattice arrangement his is because the CAAC-OS can tolerate distortion owing to a low density of arrangement of oxygen atoms in the a-b plane direction, an interatomic bond length changed by substitution of a metal element, and the like.

The CAAC-OS is a metal oxide with high crystallinity. By contrast, in the CAAC-OS, a reduction in electron mobility due to the crystal grain boundary is less likely to occur because it is difficult to observe a clear crystal grain boundary. Entry of impurities, formation of defects, or the like might decrease the crystallinity of a metal oxide; thus, it can be said that the CAAC-OS is a metal oxide that has small amounts of impurities and defects (e.g., oxygen vacancies (also referred to as Vo)). Thus, a metal oxide including a CAAC-OS is physically stable. Therefore, the metal oxide including a CAAC-OS is resistant to heat and has high reliability.

In the nc-OS, a microscopic region (e.g., a region with a size greater than or equal to 1 nm and less than or equal to 10 nm, in particular, a region with a size greater than or equal to 1 nm and less than or equal to 3 nm) has a periodic atomic arrangement. Furthermore, there is no regularity of crystal orientation between different nanocrystals in the nc-OS. Thus, the orientation in the whole film is not observed. Accordingly, the nc-OS cannot be distinguished from an a-like OS or an amorphous oxide semiconductor depending on the analysis method.

Note that indium-gallium-zinc oxide (hereinafter referred to as IGZO) that is a kind of metal oxide containing indium, gallium, and zinc has a stable structure in some cases by being formed of the above-described nanocrystals. In particular, crystals of IGZO tend not to grow in the air and thus, a stable structure is obtained when IGZO is formed of smaller crystals (e.g., the above-described nanocrystals) rather than larger crystals (here, crystals with a size of several millimeters or several centimeters).

An a-like OS is a metal oxide having a structure between those of the nc-OS and an amorphous oxide semiconductor. The a-like OS includes a void or a low-density region. That is, the a-like OS has low crystallinity as compared with the nc-OS and the CAAC-OS.

An oxide semiconductor (a metal oxide) can have various structures that show different properties. Two or more of the amorphous oxide semiconductor, the polycrystalline oxide semiconductor, the a-like OS, the nc-OS, and the CAAC-OS may be included in an oxide semiconductor of one embodiment of the present invention.

A metal oxide film that functions as a semiconductor layer can be formed using either or both of an inert gas and an oxygen gas. Note that there is no particular limitation on the flow rate ratio of oxygen (the partial pressure of oxygen) at the time of forming the metal oxide film. However, to obtain a transistor having high field-effect mobility, the flow rate ratio of oxygen (the partial pressure of oxygen) at the time of forming the metal oxide film is preferably higher than or equal to 0% and lower than or equal to 30%, further preferably higher than or equal to 5% and lower than or equal to 30%, still further preferably higher than or equal to 7% and lower than or equal to 15%.

The energy gap of the metal oxide is preferably 2 eV or more, further preferably 2.5 eV or more, still further preferably 3 eV or more. With the use of a metal oxide having such a wide energy gap, the off-state current of the transistor can be reduced.

The metal oxide film can be formed by a sputtering method. Alternatively, a PLD method, a PECVD method, a thermal CVD method, an ALD method, a vacuum evaporation method, or the like may be used.

As described above, the display device of one embodiment of the present invention includes, in the pixel, two capacitors that transmit visible light and overlap with each other; therefore, the pixel can achieve both a high aperture ratio and high storage capacity.

In this embodiment, the composition of a CAC (Cloud-Aligned Composite)-OS that can be used for a transistor disclosed in one embodiment of the present invention will be described.

The CAC-OS is, for example, a composition of a material in which elements that constitute an oxide semiconductor are unevenly distributed to have a size of greater than or equal to 0.5 nm and less than or equal to 10 nm, preferably greater than or equal to 1 nm and less than or equal to 2 nm, or a similar size. Note that in the following description, a state in which one or more metal elements are unevenly distributed and regions including the metal element(s) are mixed to have a size of greater than or equal to 0.5 nm and less than or equal to 10 nm, preferably greater than or equal to 1 nm and less than or equal to 2 nm, or a similar size in an oxide semiconductor is referred to as a mosaic pattern or a patch-like pattern.

Note that an oxide semiconductor preferably contains at least indium. It is particularly preferable that the metal oxide contain indium and zinc. Moreover, in addition to these, one kind or a plurality of kinds selected from aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and the like may be contained.

For example, a CAC-OS in an In—Ga—Zn oxide (an In—Ga—Zn oxide in the CAC-OS may be particularly referred to as CAC-IGZO) has a composition in which materials are separated into indium oxide (hereinafter referred to as InOX1(X1 is a real number greater than 0)), indium zinc oxide (hereinafter referred to as InX2ZnY2OZ2(each of X2, Y2, and Z2 is a real number greater than 0)), or the like and gallium oxide (hereinafter referred to as GaOX3(X3 is a real number greater than 0)), gallium zinc oxide (hereinafter referred to as GaX4ZnY4OZ4(each of X4, Y4, and Z4 is a real number greater than 0)), or the like so that a mosaic pattern is formed, and mosaic-like InOX1or InX2ZnY2OZ2is evenly distributed in the film (this composition is hereinafter also referred to as a cloud-like composition).

That is, the CAC-OS is a composite oxide semiconductor having a composition in which a region where GaOX3is a main component and a region where InX2ZnY2OZ2or InOX1is a main component are mixed. Note that in this specification, for example, when the atomic ratio of In to the element M in a first region is greater than the atomic ratio of In to the element Min a second region, the first region is regarded as having a higher In concentration than the second region.

Note that IGZO is a commonly known name and sometimes refers to one compound formed of In, Ga, Zn, and O. A typical example is a crystalline compound represented by InGaO3(ZnO)m1(m1 is a natural number) or In(1+x0)Ga(1−x0)O3(ZnO)m0(−1≤x0≤1; m0 is a given number).

The crystalline compound has a single crystal structure, a polycrystalline structure, or a CAAC structure. Note that the CAAC structure is a crystal structure in which a plurality of IGZO nanocrystals have c-axis alignment and are connected in the a-b plane direction without alignment.

The CAC-OS relates to the material composition of an oxide semiconductor. The CAC-OS refers to a composition in which, in the material composition containing In, Ga, Zn, and O, some regions that contain Ga as a main component and are observed as nanoparticles and some regions that contain In as a main component and are observed as nanoparticles are randomly dispersed in a mosaic pattern. Therefore, the crystal structure is a secondary element for the CAC-OS.

Note that in the CAC-OS, a layered structure including two or more films with different compositions is not included. For example, a two-layer structure of a film containing In as a main component and a film containing Ga as a main component is not included.

Note that a clear boundary between the region where GaOX3is a main component and the region where InX2ZnY2OZ2or InOX1is a main component cannot be observed in some cases.

Note that in the case where one kind or a plurality of kinds selected from aluminum, yttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and the like are contained instead of gallium, the CAC-OS refers to a composition in which some regions that contain the metal element(s) as a main component and are observed as nanoparticles and some regions that contain In as a main component and are observed as nanoparticles are each randomly dispersed in a mosaic pattern.

The CAC-OS can be formed by a sputtering method under a condition where a substrate is intentionally not heated, for example. In addition, in the case of forming the CAC-OS by a sputtering method, one or more selected from an inert gas (typically, argon), an oxygen gas, and a nitrogen gas can be used as a deposition gas. The flow rate of the oxygen gas to the total flow rate of the deposition gas in deposition is preferably as low as possible; for example, the flow rate of the oxygen gas is higher than or equal to 0% and lower than 30%, preferably higher than or equal to 0% and lower than or equal to 10%.

The CAC-OS is characterized in that a clear peak is not observed when measurement is conducted using a θ/2θ scan by an Out-of-plane method, which is an X-ray diffraction (XRD) measurement method. That is, it is found from X-ray diffraction measurement that no alignment in the a-b plane direction and the c-axis direction is observed in a measured region.

In an electron diffraction pattern of the CAC-OS which is obtained by irradiation with an electron beam with a probe diameter of 1 nm (also referred to as a nanobeam electron beam), a ring-like high-luminance region (ring region) and a plurality of bright spots in the ring region are observed. It is therefore found from the electron diffraction pattern that the crystal structure of the CAC-OS includes an nc (nano-crystal) structure with no alignment in the plan-view direction and the cross-sectional direction.

Moreover, for example, it can be confirmed by EDX mapping obtained using energy dispersive X-ray spectroscopy (EDX) that the CAC-OS in the In—Ga—Zn oxide has a composition in which regions including GaOX3as a main component and regions including InX2ZnY2OZ2or InOX1as a main component are unevenly distributed and mixed.

The CAC-OS has a structure different from that of an IGZO compound in which metal elements are evenly distributed, and has properties different from those of the IGZO compound. That is, the CAC-OS has a composition in which regions where GaOX3or the like is a main component and regions where InX2ZnY2OZ2or InOX1is a main component are phase-separated from each other, and the regions including the respective elements as the main components form a mosaic pattern.

Here, a region where InX2ZnY2OZ2or InOX1is a main component is a region whose conductivity is higher than that of a region where GaOX3or the like is a main component. In other words, when carriers flow through regions where InX2ZnY2OZ2or InOX1is a main component, the conductivity of an oxide semiconductor is exhibited. Accordingly, when the regions including InX2ZnY2OZ2or InOX1as a main component are distributed in an oxide semiconductor like a cloud, high field-effect mobility (μ) can be achieved.

By contrast, a region where GaOX3or the like is a main component is a region whose insulating property is higher than that of a region where InX2ZnY2OZ2or InOX1is a main component In other words, when regions where GaOX3or the like is a main component are distributed in an oxide semiconductor, leakage current can be suppressed and favorable switching operation can be achieved.

Accordingly, when the CAC-OS is used in a semiconductor element, the insulating property derived from GaOX3or the like and the conductivity derived from InX2ZnY2OZ2or InOX1complement each other, whereby high on-state current (Ion) and high field-effect mobility (μ) can be achieved.

A semiconductor element using the CAC-OS has high reliability. Thus, the CAC-OS is suitably used in a variety of semiconductor devices typified by displays.

In this embodiment, electronic devices of one embodiment of the present invention will be described with reference to drawings.

In an electronic device of this embodiment, a display portion includes the display device of one embodiment of the present invention. Thus, the electronic device can be inexpensive, and the power consumption of the electronic device can be reduced.

The display portion of the electronic device in this embodiment can display video with a resolution of, for example, full high definition, 2K, 4K, 8K, 16K, or higher. As the screen size of the display portion, the diagonal size can be greater than or equal to 20 inches, greater than or equal to 30 inches, greater than or equal to 50 inches, greater than or equal to 60 inches, or greater than or equal to 70 inches.

Examples of electronic devices in which the display device of one embodiment of the present invention can be used include a digital camera, a digital video camera, a digital photo frame, a mobile phone, a portable game console, a portable information terminal, and an audio reproducing device, in addition to electronic devices with a relatively large screen, such as a television device, a desktop or notebook personal computer, a monitor for a computer or the like, digital signage, and a large game machine such as a pachinko machine. Furthermore, the display device of one embodiment of the present invention can be suitably used in portable electronic devices, wearable electronic devices (wearable devices), VR (Virtual Reality) devices, AR (Augmented Reality) devices, and the like.

The electronic device of one embodiment of the present invention may include a secondary battery, and it is preferable that the secondary battery be capable of being charged by contactless power transmission.

Examples of the secondary battery include a lithium ion secondary battery such as a lithium polymer battery using a gel electrolyte (lithium ion polymer battery), a nickel-hydride battery, a nickel-cadmium battery, an organic radical battery, a lead-acid battery, an air secondary battery, a nickel-zinc battery, and a silver-zinc battery.

The electronic device of one embodiment of the present invention may include an antenna. When a signal is received by the antenna, the electronic device can display video, data, and the like on the display portion. When the electronic device includes an antenna and a secondary battery, the antenna may be used for contactless power transmission.

Furthermore, an electronic device including a plurality of display portions can have a function of displaying image data mainly on one display portion while displaying text data mainly on another display portion, a function of displaying a three-dimensional image by displaying images on a plurality of display portions with a parallax taken into account, or the like. An electronic device including an image receiving portion can have a function of taking a still image or a moving image, a function of automatically or manually correcting a taken image, a function of storing a taken image in a recording medium (an external recording medium or a recording medium incorporated in the electronic device), a function of displaying a taken image on a display portion, or the like. Note that functions of the electronic device of one embodiment of the present invention are not limited thereto, and the electronic devices can have a variety of functions.

FIG.18(A)illustrates a television device1810. The television device1810includes a display portion1811, a housing1812, a speaker1813, and the like. Furthermore, the television device1810can include an LED lamp, operation keys (including a power switch or an operation switch), a connection terminal, a variety of sensors, a microphone, and the like.

The television device1810can be controlled with a remote controller1814.

Examples of airwaves the television device1810can receive include ground waves and waves transmitted from a satellite. Other examples of the airwaves include analog broadcasting, digital broadcasting, image-sound-only broadcasting, and sound-only broadcasting. For example, the television device1810can receive airwaves transmitted in a certain frequency band in the UHF band (about 300 MHz to 3 GHz) or the VHF band (30 MHz to 300 MHz). When a plurality of pieces of data received in a plurality of frequency bands are used, the transfer rate can be increased and more information can be obtained. Accordingly, the display portion1811can display an image with a resolution higher than the full high definition. For example, an image with a resolution of 4K, 8K, 16K, or higher can be displayed.

A structure may be employed in which an image to be displayed on the display portion1811is generated using broadcasting data transmitted with a technology for transmitting data via a computer network such as the Internet, a LAN (Local Area Network), or Wi-Fi (registered trademark). In that case, the television device1810does not necessarily include a tuner.

FIG.18(B)illustrates digital signage1820mounted on a cylindrical pillar1822. The digital signage1820includes a display portion1821.

The larger the display portion1821is, the more information the display portion1821can provide at a time. In addition, the larger the display portion1821is, the more the display portion1821attracts attention; hence, the effectiveness of the advertisement can be increased, for example.

It is preferable to use a touch panel in the display portion1821because not only a still image or a moving image is displayed on the display portion1821but also users can operate intuitively. Moreover, for an application for providing information such as route information or traffic information, usability can be enhanced by intuitive operation.

FIG.18(C)illustrates a notebook personal computer1830. The personal computer1830includes a display portion1831, a housing1832, a touch pad1833, a connection port1834, and the like.

The touch pad1833functions as an input means such as a pointing device or a pen tablet and can be controlled with a finger, a stylus, or the like.

A display element is incorporated in the touch pad1833. As illustrated inFIG.18(C), when input keys1835are displayed on a surface of the touch pad1833, the touch pad1833can be used as a keyboard. In that case, a vibration module may be incorporated in the touch pad1833so that sense of touch is achieved by vibration when the input keys1835are touched.

FIGS.19(A) and19(B)illustrate an example of a portable information terminal800. The portable information terminal800includes a housing801, a housing802, a display portion803, a display portion804, a hinge portion805, and the like.

The housing801and the housing802are joined together with the hinge portion805. As for the portable information terminal800, the housing801and the housing802can be opened as illustrated inFIG.19(B)from a folded state illustrated inFIG.19(A).

The portable information terminal800can be folded when being carried, and thus is highly versatile.

Note that the housing801and the housing802may have a power button, an operation button, an external connection port, a speaker, a microphone, and the like.

FIG.19(C)illustrates an example of a portable information terminal. A portable information terminal810illustrated inFIG.19(C)includes a housing811, a display portion812, an operation button813, an external connection port814, a speaker815, a microphone816, a camera817, and the like.

The portable information terminal810includes a touch sensor in the display portion812. All operations including making a call and inputting text can be performed by touching the display portion812with a finger, a stylus, or the like.

By an operation with the operation button813, power on/off operations and types of images displayed on the display portion812can be switched. For example, switching from a mail creation screen to a main menu screen can be performed.

When a detection device such as a gyroscope sensor or an acceleration sensor is provided inside the portable information terminal810, the direction of display on the screen of the display portion812can be automatically changed by determining the orientation of the portable information terminal810(whether it is placed vertically or horizontally). Furthermore, the direction of display on the screen can be changed by touch on the display portion812, operation with the operation button813, sound input using the microphone816, or the like.

The portable information terminal810has one or more functions selected from a telephone set, a notebook, an information browsing device, and the like, for example. Specifically, the portable information terminal can be used as a smartphone. The portable information terminal810is capable of executing a variety of applications such as mobile phone calls, e-mailing, text viewing and writing, music replay, video replay, Internet communication, and games, for example.

FIG.19(D)illustrates an example of a camera. A camera820includes a housing821, a display portion822, operation buttons823, a shutter button824, and the like. A detachable lens826is attached to the camera820.

Although the lens826of the camera820here is detachable from the housing821for replacement, the lens826may be integrated with the housing.

A still image or a moving image can be taken with the camera820at the press of the shutter button824. In addition, the display portion822has a function of a touch panel, and images can also be taken by the touch on the display portion822.

Note that a stroboscope, a viewfinder, or the like can be additionally attached to the camera820. Alternatively, these may be incorporated into the housing821.

FIG.19(E)illustrates an example in which the display device of one embodiment of the present invention is used as an in-vehicle display. A display portion832and a display portion833can provide various kinds of information by displaying navigation information, a speedometer, a tachometer, a mileage, a fuel meter, a gearshift indicator, air-conditioning settings, and the like. The content and layout of the display can be changed freely in accordance with the preference of a user.

As described above, electronic devices can be obtained by application of the display device of one embodiment of the present invention. The display device has a remarkably wide application range and can be used in electronic devices in a variety of fields.

EXAMPLE

In this example, potentials applied to a display element provided in a pixel included in the display device of one embodiment of the present invention were measured.

In this example, the display device50was operated under Condition 1 and Condition 2 described below. In Condition 1, the pixel11was operated by the method shown at Time T01to Time T04inFIG.8. In Condition 2, the pixel11was operated by the method shown at Time T01to Time T04inFIG.7.

FIG.20(A)shows the potential VS1, the potential VS2, and the potential VRPsupplied to the pixel11in Condition 1, andFIG.20(B)shows the potential VS1, the potential VS2, and the potential VRPsupplied to the pixel11in Condition 2. In both Conditions 1 and 2, the pixel11was operated with a lowest gray level of 0 and a highest gray level of 255.

Note that in the pixel11, the display element106was a transmissive liquid crystal element, and the rubbing angle was 20°. The potential VCOMof the common wiring32and the common wiring33was 4.5 V; a capacitance C1of the capacitor104was 30 pF; a capacitance C2of the capacitor105was 3 pF, and a capacitance CLCof the display element106was 3 pF.

The potential VSDMIN, which is the minimum potential that can be generated by the source driver circuit15, was 1 V, and the potential VSDMAX, which is the maximum potential that can be generated by the source driver circuit15, was 8 V. Since the potential VCOMis 4.5 V as described above, when the potential VSDMAXis applied to one electrode of the display element106, the voltage applied to the display element106becomes 3.5 V.

In Condition 1, the value of the potential VS1was 1 V, which is the potential VSDMIN, for the gray level 0 and was 8 V, which is the potential VSDMAX, for the gray level 255. The potential VS2was the value calculated by Formula 5 shown in Embodiment 1, and was 4.5 V, which is the potential VCOM, for the gray level 0 and was 8 V, which is the potential VSDMAX, for the gray level 255. The potential VRPwas 0 V regardless of the gray level, i.e., a potential lower than the potential VCOMby 4.5 V.

In Condition 2, the value of the potential VS1was 4.5 V, which is the potential VCOM, for the gray level 0 and was 8 V, which is the potential VSDMAX, for the gray level 255. The potential VS2was the value calculated by the following formula, and was 4.5 V, which is the potential VCOM, for the gray level 0 and was 1 V, which is the potential VSDMIN, for the gray level 255. The potential VRPwas 4.5 V regardless of the gray level, i.e., a potential equal to the potential VCOM.
[Formula 9]
VS2=VCOM−(VS1−VCOM)=2VCOM−VS1(9)

In this example, the voltage “VDE−VCOM” applied to the display element106was measured in each of Conditions 1 and 2. Specifically, the backlight was turned on, the luminance of light transmitted through the display element106was measured, and the voltage “VDE−VCOM” was calculated based on the measurement results.

FIG.21shows the measurement results of the voltage “VDE−VCOM” in Condition 1 and Condition 2, and also shows the voltage “VSDMAX−VCOM”.

It was confirmed that a higher voltage can be applied to the display element106in Condition 1 than in Condition 2. It was also confirmed that the voltage “VDE−VCOM” in Condition 1 becomes 8.90 V for the gray level 255, and a voltage more than twice the voltage “VSDMAX−VCOM” can be applied to the display element106in Condition 1.

REFERENCE NUMERALS