Technique for matching performance of ion implantation devices using an in-situ mask

A technique for matching performance of ion implantation devices using an in-situ mask. In one particular exemplary embodiment, ion implantation is performed on a portion of a substrate while the remainder is masked off. The substrate is then moved to a second implanter tool. Implantation is then performed on another portion of the same substrate using the second tool while a mask covers the remainder of the substrate, including the first portion. After the second implantation process, parametric testing may be performed on semiconductor devices manufactured on the first and second portions to determine if there is variation in one or more performance characteristics of these semiconductor devices. If variations are found, changes may be suggested to one or more operating parameters of one of the implantation tools to reduce performance variation of implanters within the fabrication facility.

FIELD OF THE DISCLOSURE

The present disclosure relates generally to substrate processing techniques and more particularly, to a technique for matching performance of ion implantation devices using an in-situ mask.

BACKGROUND OF THE DISCLOSURE

In semiconductor manufacturing, ion implantation is used to change the material properties of portions of a substrate. Indeed, ion implantation has become a standard technique for altering properties of semiconductor wafers during the production of various semiconductor-based products. Implantation may be used to introduce conductivity-altering impurities, modifying crystal surfaces (pre-amorphization), to created buried layers (halo implants) to create gettering sites for contaminants, to create diffusion barriers (F and C implant. Also, implantation may be used in semiconductors for non-transistor applications such as for alloying metal contact area, in flat panel display manufacturing and surface treatment. All of these ion implantation applications may be classified generally as forming a region of material property modification.

In an ion implantation process, a desired impurity material is ionized in an ion source, the resulting ions are accelerated to form an ion beam of a prescribed energy, and the ion beam is directed at a surface of a target substrate, such as a semiconductor-based wafer. Energetic ions in the ion beam penetrate into bulk semiconductor material of the wafer and are embedded into a crystalline lattice of the semiconductor material to form a region of desired conductivity.

Ion implantation systems usually include an ion source for converting a gas or a solid material into a well-defined ion beam. The ion beam may be mass analyzed to eliminate undesired species, is accelerated to a desired energy, and is directed to a target area, typically a wafer of semiconductor material. The ion beam may be distributed over the target area by beam scanning, by target area movement, or by a combination of beam scanning and target area movement. The target may be set to a prescribed angle and orientation relative to the ion beam. Examples of prior art ion implanters are disclosed in U.S. Pat. No. 4,276,477 issued Jun. 30, 1981 to Enge; U.S. Pat. No. 4,283,631 issued Aug. 11, 1981 to Turner; U.S. Pat. No. 4,899,059 issued Feb. 6, 1990 to Freytsis et al.; U.S. Pat. No. 4,922,106 issued May 1, 1990 to Berrian et al.; and U.S. Pat. No. 5,350,926 issued Sep. 27, 1994 to White et al.

A semiconductor manufacturer's profitability may be directly affected by its ability to maintain high yields. A manufacturer's yield refers to a percentage of silicon wafer area that may be successfully processed into usable microelectronic devices (processors, memory cells, or other transistor-based, semiconductor components). Due to a high cost of silicon wafers and a high expense of processing equipment, it is desirable for manufacturers to maintain high yield rates. As an example, if a single wafer may support 300 devices, and each device has a wholesale value of $150, the value of a single processed wafer may be up to $45,000 if the entire usable surface area could be processed into usable devices—i.e., a yield of 100%. Typically, yields must remain above 70% in order for a manufacturer to achieve profitability or even viability, and even slight improvements in yields may translate into significant increases in profitability. In the semiconductor device manufacturing industry, due to a relatively low incremental cost of making more good, i.e., usable, products on each wafer, a primary goal is to maximize yields.

One factor that greatly affects yield is a manufacturer's process control. Therefore, it is critical to ensure that manufacturing equipment is operating consistently and at correct operating parameters. Eliminating process variations generally improves and ideally maximizes yields.

In the case of ion implantation equipment, there are typically four device parameters that a semiconductor manufacturer typically adjusts for its application: ion beam angle, ion dose, ion species, and ion energy. there are in addition to these adjustable parameters, implant equipment setting that can be adjusted, all of which impact semiconductor device performance and which may vary from implant tool to implant tool. Current techniques involve calibrating individual settings of individual implanters, making measurements of system settings, or using non-device blanket wafers. Using these techniques which focus on calibrating implanters one at a time, it is impossible to calibrate accurately. Moreover, calibrating implanters one at a time is time consuming, requires costly wafers, and is difficult to correlate to device yields.

In view of the foregoing, it would be desirable to provide a technique for reducing tool-to-tool performance variation which overcomes some or all of the above-described inadequacies and shortcomings of known systems.

SUMMARY OF THE DISCLOSURE

A technique for matching performance of ion implantation devices using an in-situ mask. In one particular exemplary embodiment, the technique may be realized as a method for reducing tool-to-tool process variation of ion implantation equipment by processing only a portion of a single wafer with a single ion implanter by masking the remaining wafer, then processing another portion of the wafer using another ion implanter, repeating using multiple ion implanters, each processing only a unique portion of the wafer and then performing parametric testing on the portions of the wafer processed with each implanter to determine if there are any performance variation in devices produced by different implanters.

According to a first aspect of this particular exemplary embodiment, a of matching performance between semiconductor manufacturing devices is provided. The method according to this aspect comprises processing a first portion of a substrate with a first device, moving the substrate from the first device to a second device, processing a second portion of the substrate with the second device, associating the first and second portions with the respective first and second devices, and comparing one or more properties of the first portion to one or more corresponding properties of the second portion.

In accordance with further aspects of this particular exemplary embodiment, an in-situ method of matching ion implantation tool performance is provided. The method according to this aspect comprises performing ion implantation on a first portion of a substrate using a first ion implanter, wherein a first mask is applied to the substrate having a first aperture exposing the first portion, performing ion implantation on a second portion of the substrate using a second ion implanter, wherein a second mask is applied to the substrate having a second aperture exposing the second portion, measuring at least one characteristic value of each of the first and second portions, performing a comparison of the respective characteristic values of the first and second portions, and determining at least one adjustment to an adjustable parameter of either the first or second implanter based on the comparison.

In accordance with additional aspects of this disclosure, in a semiconductor fabrication facility environment consisting of a plurality of ion implanters, a method of reducing tool-to-tool performance variation is provided. The method of reducing tool according to these additional aspects comprises applying a first mask to a semiconductor substrate, the first mask having a first aperture exposing a first portion of the substrate, performing an ion implantation process on the substrate with the first implanter, moving the substrate to a second implanter, applying a second mask to the substrate, the second mask having an second aperture exposing a second portion of the substrate, performing an ion implantation process on the substrate with the second implanter, measuring at least one characteristic value of each of the first and second portions, comparing the measured value of each of the first and second portions, and adjusting at least one adjustable operating parameter of either the first or second implanter based on the comparison.

In various embodiments this will comprise performing masking according to one or more of the methods disclosed in commonly assigned U.S. patent application Ser. No. 11/329,761 entitled “Methods and Apparatus for Enabling Multiple Process Steps on a Single Substrate,” (hereinafter the '761 application) which is hereby incorporated by reference in its entirety.

In one exemplary embodiment, a masking process as described in the aforementioned '761 application may be used to run a design of experiments (DOE) on a single tool to establish the optimum parameters of the implant tool. Then, these established “master” settings can be used to match each tool to, and re-calibrate in the future to. In various embodiments, this masking process described in the '761 application is MOST effective, when trying to match MULTIPLE tools, because the cost savings is greater and complexity of alternative methods worse.

In various embodiments, this masking process may be used to select the optimum performing tool based on parametric results of devices, either to match those tools to (empirically make it the “master”) or by cherry-picking the “best” tool for particular applications.

In various embodiments, this masking process can be used to check that all tools are operating within control, without optimizing as discussed in the context ofFIG. 3. Rather than making assumptions, a single wafer may be run through multiple tools to assure no variation is occurring tool to tool, for “statistical process control” purposes. This method enables you to establish “normal” variation and to take action when tools begin to drift. Alternatively, this can be done without a mask, by scanning the beam electrostatically, magnetically, or moving the wafer, across only a portion of the wafer. However, this method is less effective because it is difficult if not impossible to precisely block out the regions of the wafer.

Various embodiments of the invention permit optimization of other, non-doping, non-transistor implants used in the implant process, that aren't yet in use, such as any surface modification application, any dopant application like Si implants in Ni to improve Nickel Silicidation (NiSi) process, etc.

Various embodiments of the invention permit optimization of non-semiconductor implant applications such as metal surface treatments, flat panel display applications, magneto-resistive heads used in disk drives, etc.

Various embodiments of the invention may also be applicable to applications outside of ion implantation that could similarly use a mask in front of a wafer to prevent processing of portions of the wafer, and then using the mask, exposing the different portions with different implanters, thereby enabling tool-to-tool matching. For example, it may be possible to duplicate this using photo-resist or a solid mask attached to the wafer either manually or some other method, before entering the tool and similarly exposing only a small portion of the wafer at a time.

DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS

Referring now toFIG. 1, there is shown a schematic block diagram of an first ion implantation system100usable with various embodiments of the present disclosure. The ion implantation system100includes a beam generator101that generates and directs a beam102toward a semiconductor wafer103. The beam generator101may include various different types of components and systems to generate the beam102such that it has desired characteristics. The beam102may be any type of charged particle beam, such as an energetic ion beam used to implant the semiconductor wafer103. The semiconductor wafer103may take various physical shapes, such as the common circular disk shape with a flat surface geometry. The semiconductor wafer103may include any type of semiconductor material or any other material that is to be implanted using the beam102. Also, though not depicted inFIG. 1, as will be discussed in greater detail in the context ofFIG. 3, the system100may also include one or more masking devices designed to limit ion implantation to specific surface areas of the semiconductor wafer103.

A beam current, i.e., an amount of charge carried by particles in the beam102to the wafer103, may be measured by a detector104so as to maintain dose control. The detector104may be any type of device that detects a level of beam current. For example, the detector104may be a Faraday cup or another device that is known in the art. The detector104may be fixed in place or movable, and may be positioned in a variety of different ways, such as along a path of beam102to the wafer103, adjacent the wafer103as shown inFIG. 1, behind the wafer103, etc. Other types of devices to measure beam current, such as devices that use calorimetery or beam-induced magnetic field measurement may be used, if desired, as the detector104.

In various embodiments, the detector104outputs a signal representing detected beam current to a controller105. The controller105may be, or may include, a general purpose computer or network of general purpose computers programmed to perform desired input/output and other functions. In various embodiments, the controller105may be a data processor programmed with instruction codes for performing a semiconductor manufacturing process. In various embodiments, the controller105may include a power and/or data connection to various system components including the beam generator101, detector104, wafer drive106, vacuum system107and gas source108. The controller105may also include other electronic circuitry or components, such as application specific integrated circuits (e.g., ASICs), other hardwired or programmable electronic devices, discrete element circuits, field programmable gate arrays (FPGAs), etc. The controller105may also include devices, such as user input/output devices (keyboards, touch screens, user pointing devices, displays, printers, etc.), communication devices, data storage devices, mechanical drive systems, etc., to perform desired functions.

The controller105also communicates with the wafer drive106, which is capable of moving the wafer103relative to the beam102. For example, the wafer drive106may scan the wafer103across the beam102such that ions may be implanted on to a surface of the wafer103. The wafer drive106may include various different devices or systems to physically move the wafer103in a desired way. For example, the wafer drive106may include servo drive motors, solenoids, screw drive mechanisms, one or more air bearings, position encoding devices, mechanical linkages, robotic arms, or any other components to move the wafer103which may be well-known in the art.

The beam102is transported from the beam generator101to the wafer103in a relatively high vacuum environment created in a process chamber housing109by the vacuum system107. By high vacuum, it is meant that low pressure exists in the process chamber housing109. Conversely, low vacuum refers to a relatively higher pressure in the housing109. The vacuum in the housing109may be maintained using well-known systems, such as vacuum pumps, vacuum isolation valves, pressure sensors, etc. The vacuum system107may communicate with the controller105, e.g., to provide information to the controller105regarding the current vacuum level in one or more portions of the housing109. The vacuum system107may also include one or more pressure sensors that monitor pressure in the housing109and that communicate pressure readings to the controller105. Alternatively, these sensors may be separate from the vacuum system107and in communication directly with the controller105.

The beam102is shown inFIG. 1to follow a straight path from the beam generator101to the wafer103. However, as illustrated in the implantation system200ofFIG. 2, the beam102may follow a curved path with one or more deflections within the generator101and/or between the beam generator101and the wafer103. The beam102may be deflected, for example, by one or more magnets, lenses or other beam shaping devices.

In various embodiments of the disclosure, prior to implantation, the wafer drive106moves the wafer103away from the beam102so that the beam102is not incident on the wafer103. The beam generator101may then generate a beam102and the detector104may then detect a reference level for beam current while a vacuum level within the housing108is maintained at a desired level and/or is stable. As one example, the vacuum level at which the reference level for the beam current is determined may be a highest vacuum level generated by the vacuum system107within the housing109. Of course, the reference level for the beam current may be determined for other vacuum levels within the housing109as well.

In various embodiments, the detector104outputs a signal to the controller105that may be used by the controller105as the reference level for the beam current, or the controller105may process the signal to generate a reference level for the beam current. For example, the detector104may output an analog signal that represents a number of detected ions, and the controller105may convert the analog signal to a digital number that is stored within the controller105. The stored digital number may be used as a reference level for calculating the beam current.

During implantation, the beam102is incident on at least a portion of the wafer103. The beam102may be scanned across the wafer103and/or the wafer103may be moved across the beam102by the wafer drive106, or combinations of these two may occur. For example, the beam102may be scanned by the beam generator101in one direction while the wafer103is moved in another direction. Movement of the beam102and wafer103may be in the same plane or in different planes.

Materials in or on the wafer103, such as photoresist on the surface of the wafer103, may outgas or otherwise produce materials when impacted by particles in the beam102. This causes a vacuum fluctuation within the housing108that may cause the vacuum level to decrease near the wafer103and along the beamline. This decrease in vacuum level may cause an increase in the number of charge exchanging collisions that occur for particles in the beam102traveling to the wafer103. As discussed above, the charge exchanging collisions, i.e., collisions between energetic particles in the beam102and materials released by out gassing or volatilization at the wafer103, cause the charge of individual particles in the beam102to be changed. For example, singly positively charged ions in the beam102may be neutralized by collisions along the beamline, or the positively charged ions may be doubly positively charged. Although the charge of the ions may be altered, the energy of the particles is not substantially changed. Therefore, although the charge of some particles may be altered so that the detector104does not detect the presence of the particles, the particles may still impact the wafer103and contribute to the overall impurity dosing of the wafer. Thus, the detector104may output a signal during implantation that indicates a decrease in beam current even though the total dosing of the wafer103is not affected.

The controller105may recognize, i.e., operate based on an assumption, that the detected decrease in beam current, or a portion of a detected decrease in beam current, has been caused by vacuum fluctuations during implantation, but that the total dose implanted in the wafer103is not being affected. Thus, the controller105may detect a vacuum fluctuation based on a detected decrease in beam current. It should be understood that the beam current may vary during implantation due to other factors, such as ion source variations, and that in such cases, the controller105may determine that some portion of a detected beam current decrease has been caused by vacuum fluctuations, while another portion of the decrease has been caused by other factors, e.g., variations at the ion source. The controller105may adjust certain implantation parameters to correct for variations in beam current that are deemed to be not due to vacuum fluctuations, as is known in the. In addition, out gassing may vary with time, and the controller105may determine that the contribution of vacuum fluctuation to detected beam current decrease as compared to other factors may vary over time during implantation. In such cases the controller105may use an adjusted measured beam current that reflects only the contribution of vacuum fluctuation, and not the contribution of other factors, for purposes of controlling implantation.

The controller105may sense a decrease in beam current, but not necessarily adjust specific implantation parameters, such as a beam102scan rate, wafer103scan rate, etc. Instead, the controller105may output a signal to the vacuum system107indicating that a rise in vacuum pressure has been detected and that the vacuum level within the housing108should be adjusted accordingly. This signal to the vacuum system107may be provided in addition to measured vacuum level signals provided by pressure sensors to the vacuum system107. Thus, based on the signal from the controller105, the vacuum system107may begin adjusting the vacuum level within the housing108before a decrease in vacuum level is detected by pressure sensors associated with the vacuum system107thereby maintaining a stable vacuum pressure.

Alternately, the controller105may compare a detected beam current level provided by the detector104during implantation with the stored reference level for the beam current and use the difference between the two values to control either the beam102, the wafer drive106, or both. For example, the controller105may determine (based on stored information) that the decrease in beam current detected by the detector104during implantation is largely due to vacuum fluctuations along the beam line. Further, the controller105may determine that a portion of the detected decrease in beam current due to charge exchanging collisions does not affect the total dose delivered to the wafer103, while another portion of the detected decrease in beam current does contribute to a decrease in the total dose delivered to the wafer103. For example, some charge exchanging collisions may neutralize beam particles without affecting the particles' kinetic energy. The neutralized particles will not be detected by the detector104, but still contribute to the total dose implanted in the wafer103. Other collisions caused by the vacuum fluctuation may cause the charge and kinetic energy of a particle to be altered, or cause the particle to follow a trajectory that prevents the particle from being implanted in the wafer103. These latter collisions cause a decrease in detected beam current, and also a decrease in the total dose implanted in the wafer103. The controller105may scale the difference value between the detected beam current and the reference value for the beam current, so that a total dose delivered to the wafer103is adjusted to a desired level. The difference value may also be normalized, e.g., by dividing the difference value by the reference value. For example, the controller105may control the wafer drive106to move the wafer103more slowly across the beam path based on the scaled and normalized scaled reference value. The scaling factors used by the controller105may be determined empirically and stored in the controller105. Thus, when a particular difference value is determined by the controller105, a corresponding scaling factor may be retrieved and used to adjust the difference value to appropriately control the beam102, movement of the wafer103or both.

Referring now toFIG. 2, there is shown a block diagram of another ion implantation system usable with various embodiments of the present disclosure. The implanter system200of Figure, utilizing a curved ion beam, is of a different topology than that illustrated inFIG. 1. In the system ofFIG. 2, an ion beam generator210generates an ion beam of a desired species, that is, type of gas source, accelerates ions in the ion beam to desired energies, performs mass/energy analysis of the ion beam to remove energy and mass contaminants and supplies an energetic ion beam212having a low level of energy and mass contaminants. A scanning system216, which includes a scanner220, an angle corrector224, and a scan generator (not shown), deflects the ion beam212to produce a scanned ion beam230having parallel or nearly parallel ion trajectories.

An end station232includes a platen236that supports a semiconductor wafer234or other work piece in the path of scanned ion beam230such that ions of the desired species are implanted into the semiconductor wafer234thereby changing material properties of any unmasked portions. End station232may also include a Faraday cup238or other dose detector for monitoring ion beam dose and dose uniformity.

The ion beam generator210ofFIG. 2includes an ion beam source260, a source filter262, an acceleration/deceleration column264and a mass analyzer270. The source filter262is preferably positioned in close proximity to ion beam source260. The acceleration/deceleration column264is positioned between source filter262and mass analyzer270. The mass analyzer270includes a dipole analyzing magnet272and a mask274having a resolving aperture276.

The scanner220, which may be an electrostatic scanner, deflects ion beam212to produce a scanned ion beam having ion trajectories which diverge from a scan origin280. The scanner220may comprise spaced-apart scan plates connected to the scan generator. The scan generator applies a scan voltage waveform, such as a triangular waveform, for scanning the ion beam in accordance with the electric field between the scan plates. The ion beam is typically scanned in a horizontal plane.

The angle corrector224is designed to deflect ions in the scanned ion beam to produce scanned ion beam having parallel ion trajectories, thus focusing the scanned ion beam. In particular, the angle corrector224may comprise magnetic pole pieces which are spaced-apart to define a gap and a magnet coil which is coupled to a power supply (not shown). The scanned ion beam passes through the gap between the pole pieces and is deflected in accordance with the magnetic field in the gap. The magnetic field may be adjusted by varying the current through the magnet coil.

During operation, the scanning system216scans the ion beam212across the target wafer234in a horizontal direction, and mechanical translation system240translates the platen236and the wafer234vertically with respect to scanned ion beam230. A combination of electronic scanning of the ion beam212and mechanical translation of the wafer234causes the ion beam to be distributed over the surface of the wafer234. As noted above, the ion beam current is measured by the Faraday cup238when the platen236is in a lowered position, and a signal representative of the ion beam current is supplied to a system controller (not shown). The electronic scan speed may be varied as a function of horizontal beam position to achieve dose uniformity.

ThoughFIGS. 1 and 2depict two known implantation devices, it should be appreciated that the various systems and methods according to this disclosure may be usable with the implanters ofFIGS. 1 and 2or with any other suitable substrate processing device. Thus, the implanters ofFIGS. 1and2are exemplary only and should not be construed as limiting on the various embodiments of this disclosure.

As discussed above, ion implantation devices typically have at least4adjustable parameters: ion beam angle of incidence, ion dose, ion species and ion energy level. A fabrication “recipe” for a particular semiconductor device will consist of values for each of these parameters along with timing information for each ion implantation step in the device's “recipe.” It has been observed by the inventors of this disclosure that two seemingly identical ion implanting devices may exhibit different performance characteristics in actual application. That is, although two or more implanters in a fabrication facility are running the same “recipe,” and may have their adjustable parameters (angle, dose, species, energy) set to the same values, the actual values of one or more of these parameters may be different. For example, implanter may deliver a higher dose than the recipe calls for and the detection system may not read this higher dose. This type of variation is likely to results in different performance parameters of semiconductor devices processed by the inaccurate implanter as opposed to other implanters in the same fabrication facility.

The truest measurement of implanter performance is measuring the performance of the actual devices formed on the wafer. If the same “recipe” is being followed by two implanters for a making a particular semiconductor device, such as, for example, a flash memory chip, chips produced on substrate processed by the inaccurate implanter may show different parametric performance than those produced on the other implanter. A given chip should start switching at a certain threshold voltage and should switch at a particular speed. Chips produced by the aforementioned implanters may have different values for these, some of which are below acceptable variance thresholds, thereby causing dies to be wasted and yields to decrease.

Referring now toFIG. 3, in this Figure, is a flow chart detailing the steps of a method for reducing tool-to-tool performance variation of substrate implantation tools according to various embodiments of the present disclosure is depicted. The method begins in step300and proceeds to step305where the target substrate is masked. In various embodiments, this will comprise applying inserting a silicone wafer into a first implanter device and masking with wafer with a masking apparatus such as that illustrated inFIG. 4having an aperture that exposes only a portion of the wafer. In various embodiments, the wafer is clamped on a holding mechanism such as a platen, either mechanically or through electrostatic force. The mask is then positioned between the clamped wafer and the ion beam. The mask will have an opening or aperture which allows the ion beam to reach the exposed portion of the substrate surface while protecting the remainder. In various embodiments, the mask is movable between a masking position over the wafer and a non-masking position. The non-masking position may be a storage location inside or outside the process chamber of the implanter. In various embodiments, the implanter utilizes an automated mask loading and unloading mechanism. In other embodiments, the mask may be mounted in the masking position manually by an operator of the implanter. In various embodiments this will comprise performing masking according to one or more of the methods disclosed in the '761 application which has been incorporated by reference in its entirety. In various embodiments the substrate is a silicon wafer.

With continued reference to the flow chart ofFIG. 4, after step305, operation proceeds to step310where the implantation process is performed on the masked substrate using the first implanter tool. In various embodiments, the implantation process comprises an ion implantation process such as using an ion implanter. In various embodiments, the ion implantation process is performed using a plasma implanter such as that disclosed in U.S. Patent Application No. 2005/0260354, hereby incorporated by reference in its entirety. In various embodiments, the implanter may perform a normal implantation process on the substrate, that is, a sub-process of a larger device manufacturing process typically performed by the implanter. In various other embodiments, the implanter will perform a test-only process designed to demonstrate the implanter's performance under typical process conditions, but not as part of a device manufacturing process. After ion implantation is complete, the substrate is moved to a second implanter tool in step315. In various embodiments, this may be performed using machine control, such as through a wafer drive apparatus capable of taking a substrate from one implanter tool and moving it to another implanter tool. In various other embodiments, this step requires an operator to physically remove the substrate from the first implanter to a wafer drive system of the second implanter tool. Then, in step320, the substrate is masked with a masking apparatus. As in step305, masking the substrate may comprise masking with one or more methods and/or apparatus' disclosed in the commonly assigned U.S. application Ser. No. 11/329,761. Next, in step325, the substrate is implanted using the second tool. In various embodiments, this may comprise performing the same process as in step310with the second implanter tool on different portion of the substrate. In various embodiments, this may comprise performing a different process such as a successive or additional sub-process step in a device manufacturing process.

It should be appreciated that in various embodiments, the process described thus far may be performed without masking the substrate. For example, in ion implanters that utilize a scanning beam, that is, the beam is moved across the wafer surface, the beam's motion could be programmed to process only a portion of the wafer, thereby creating first and second processed portions. Alternatively, in implanter that move the wafer while the beam remains fixed, the wafer drive system may be programmed to move the wafer in front of the ion beam so that only a portion of the wafer is exposed to the ion beam in both the first and second implanters. It may also be possible to use a combination-type implanter that is programmed to use both beam movement and wafer movement to affect two separate processed portions on the same wafer with two implanters. Any of these methods are compatible with the various embodiments of this disclosure directed to tool-to-tool performance matching by processing different portions of the same wafer.

With continued reference to the method ofFIG. 3, in step330, after the implantation process is complete, the substrate analyzed to measure the one or more performance characteristics of the two substrate portions processed by the two implanter. In various embodiments, this comprises performing parametric testing of devices formed in the respective first and second portions by the ion implanter. Parametric testing may comprise testing for threshold voltage, required current, switching speed, etc. In various embodiments, this may comprise using a wafer probe, performing chip-level testing or material property measurements of the devices produced thereon. Alternatively, a destructive, cross-section analysis of the device can be performed to see the impact of the parameter variation, e.g., the actual location and geometry of the dopants, does levels, etc., using techniques such as scanning electron microscopy (SEM), transmission electron microscopy (TEM) and secondary ion mass spectrometry (SIMS). Various process control and testing methods and equipment are known in the field of semiconductor manufacturing. For example, in device manufacturing, one or more of the following characteristics may be measured: Ion (or Idsat)—this is the “drive current” when device is “on” (measured at the drain node); the “skew” in Ion—this is the difference in Ion in the forward and the reverse directions of the device structure; Ioff (or Isubthreshold, or Ileak)—this is the leakage current when the device is “off” (measured at the drain node); the ratio of Ion to Ioff; Vt—this is the “threshold voltage”, the gate voltage at which the device is conducting significant (e.g., 1 uA) of “on” current; the “reverse bias diode leakage” measured at the drain when it is reverse biased relative to the well (substrate); Cov—this is the “overlap” capacitance between the drain & the gate—this is very sensitive to the physical overlap of the gate edge over the drain and the lateral junction abruptness of the drain structure; Cd—this is drain capacitance relative to the well—it is sensitive to the abruptness of the vertical doping profile in the drain structure; St—this is the “reverse subthreshold slope”—which is a measure of the sharpness of the turn-on characteristics of the device; and ring oscillator delay (typically in picoseconds)—this is the time delay in a ring of devices that continuously turns every device on and off in a repeating sequence—it integrates the effect of the Ion, Cov, Cd parameters into a parameter that is meaningful at the circuit level. In a preferred embodiment, parametric testing is performed, because as noted above, actual device performance is the most significant kind of validation that may be provided to a manufacturer because it shows what is produced by the tool rather that what theoretically should be.

Next, in step335, after the performance testing is complete, a determination is made as to whether or not the two processed portions of the substrate vary in one or more identifiable parameters, thus indicating a variation in performance between the first and second implanter tools. If, in step335it is determined that a variation beyond an acceptable threshold exists, operation proceeds to block340, where one or more adjustable parameters of one or both of the implanter tools is adjusted. In various embodiments, this is performed automatically. For example, in various embodiments, the testing equipment may be in communication with a controller of the first or second implanter device, thereby enabling automatic adjustment. In various other embodiments, the testing equipment will provide a message, list, print out, or other cue identifying recommended adjustment to one or more adjustable parameters of the implanter tool. In such embodiments, the adjustment will be made by a tool operator. In various embodiments, after step340, operation will return to step305and continue recursively until in step335, it is determined that no variation exists. After this condition is determined, operation proceeds to step345where the method stops.

It should be appreciated that the method steps outlined in the flow chart ofFIG. 3, though disclosed in the context of an ion implanter, may also be applicable to reducing tool-to-tool variation in other semiconductor processing equipment including that used in deposition sub-processes, removal sub-processes, patterning sub-processes and sub-processes for performing modification of the electrical properties of substrate material.

Also, it should be appreciated that although only two implanter tools were used to process respective portions of the substrate in the example ofFIG. 3, that more than two implanters may be calibrated using the various techniques disclosed herein. The number of different implanter tools that may simultaneously calibrated is limited only the number if distinct portions that can be defined on the target substrate surface while masking off the remainder so that each tool processes a different portion of the target substrate.

Referring now toFIG. 4, a perspective view of a substrate masking apparatus according to various embodiments of the present disclosure is depicted. As noted above, various embodiments of the disclosure are based on exposing only a portion of the substrate while masking off the remainder so that the same substrate may be processed with two different implanter tools. This reduces the number of wafer required from one for each implanter to only one, depending upon the number of separate areas that may be processed on a single substrate using masking.

The exemplary substrate masking apparatus400shown inFIG. 4includes a platen assembly410to support a substrate, such as a semiconductor wafer412for processing, such as by an ion implanter as shown inFIGS. 1 and 2. The platen assembly410is supported by a scan system414. The substrate masking apparatus400further includes a mask420having an aperture422, a mask loading mechanism430and a positioning mechanism432to change the relative positions of the mask420and the wafer412. In at least one embodiment, the positioning mechanism432maybe a wafer orienter that is part of a wafer drive system such as is illustrated in the embodiment shown inFIG. 1.

The platen assembly410ofFIG. 4includes a platen440having a surface for supporting the substrate wafer412to the platen440. The platen assembly410may further include a cooling system for cooling the wafer412during processing and a mechanism to rotate or twist the wafer412about its center. In the exemplary embodiment of theFIG. 4, the platen assembly410also includes mask retaining elements442. As shown, the mask420may be provided with fingers444for engaging the mask retaining elements442.

The platen assembly system410is supported by the scan system414. The scan system414may tilt the platen assembly410relative to the ion beam for angle implants and may rotate the platen assembly410to a substrate wafer loadunload position. In addition, the scan system414may translate the platen assembly410vertically during ion implantation.

In the embodiment depicted inFIG. 4, the mask loading mechanism430includes a transfer arm450having elements452for engaging the mask420and a drive system454for moving the transfer arm450between a load position and a storage position.

During operation of the system400, the mask loading mechanism430moves the mask420to and from the masking position in front of the substrate wafer412by operation of the drive system454. In the masking position, the mask420engages the mask retaining elements442. The mask loading mechanism430then retracts and the scan system414moves the platen assembly410to the wafer load/unload position. The substrate wafer412is then loaded under the mask420by the wafer handling system. The wafer412is then ready for implantation or other processing. The wafer412is implanted in a first area defined by aperture422in mask420. After the wafer has been implanted, it is removed by the wafer handling system. At this point, an operator may remove the wafer and insert it into a wafer handling system of another implanter tool. Alternatively, the wafer handling system may be connected to a conveyor, robot or other device capable of transporting the wafer412to the second implanter tool for processing similar to that described above. In the second implanter the masking position will be oriented with respect to the wafer to expose a different, unprocessed portion than that implanted by the first device.

Thus, through the various embodiments of this disclosure, tool-to-tool process variation may be efficiently identified and reduced through a less costly process than possible with conventionally methods. Also, parametric performance of device processed by different implanter on the same wafer is possible, thereby allowing manufactures to quickly identify process variation before many dies must be discarded and/or before a complete wafer scrap event occurs. By measuring actual parametric performance more precise process variation may be detected due to the sensitivity of micron and sub-micron width transistors to process variations. Thus, it is anticipated that reducing performance variation between implanter tools will reduce a fabrication facility's wastage by increasing product yield and thereby increasing profitability.