Insulating structure, a method of forming an insulating structure, and a chip scale isolator including such an insulating structure

A method of forming an insulating structure, comprising forming an insulating region comprising at least one electrical or electronic component or part thereof embedded within the insulating region, and forming a surface structure in a surface of the insulating region.

FIELD OF THE INVENTION

The present disclosure relates to the formation of insulating structures on integrated circuit or on chip scale dimensions, and the inclusion of such structures within typical integrated circuit packages.

BACKGROUND

Most electronic circuits are implemented within microelectronic circuits, commonly referred to as “chips”. Such a chip comprises a semiconductor die carrying the microelectronic circuit encapsulated within a plastics case. This enables the chip to be bonded or soldered to circuit boards and the like for the formation into more complex products. Many applications of microelectronic circuitry may require interfacing from a relatively low voltage side, where for example the supply rails may differ from each other by only a few volts, to higher voltage components as might be found in the energy, signaling, automation, communications or motor control arenas. There are also safety critical applications such as medical applications, where high voltages must not be allowed to propagate from the circuit towards a patient being monitored. Although these high voltages may not be generated deliberately, they might occur in certain fault modes, for example if a power supply were to develop a fault. It is known to isolate low voltage and high voltage sides of a circuit from one another using “isolators”. These have typically involved discrete components, such a signal transformers, being mounted on a circuit board between a low voltage side of the board and the high voltage side of the board. More recently “chip scale” isolators have become available. Within a “chip scale” isolator the low voltage and high voltage sides of the circuit are provided within a plastics package of the type known in the provision of integrated circuits, such as a dual in line package. The reduced dimensions in chip scale isolators start to give rise to breakdown mechanisms not seen in non-chip scale, i.e. discrete component isolators.

SUMMARY

According to a first aspect of the present invention there is provided a method of forming an insulating structure, comprising forming an insulating region comprising at least one electrical or electronic component, or part thereof, embedded within the insulating region, and forming a surface structure in a surface of the insulating region.

The surface structure may comprise features that extend from, or are recessed into, what would otherwise be a planar surface of the insulating region. The use of a non-planar surface increases the length of a discharge path between two points on the surface compared to the use of a planar surface. This increased discharge path length acts to inhibit breakdown mechanisms operating at the surface of the insulator, or at the boundary between two insulators. Provision of a non-planar surface also gives the possibility of greater mechanical or chemical adhesion between the surfaces.

In an embodiment, the surface structure comprises a plurality of trenches or a plurality of walls, or a combination thereof. Trenches can be regarded as being bounded by walls. Such a structure gives rise to a reasonably abrupt change in the direction of the surface and, without being bound by any particular theory such abrupt changes seem to be effective at inhibiting current flow along the surface of the insulator. Such structures also provide enhanced mechanical keying between the insulating region, and insulating mould compounds that are routinely provided in the field of semiconductor packaging when placing semiconductor dies within plastic “chip” packages.

The insulating region may be formed by depositing a plurality of insulating layers over a substrate. The insulating layers may be formed of polyimide or any other suitable material. Other suitable insulators may include benzocyclobutane (BCB), epoxy and/or polymers such as SU8 (which is used in semiconductor fabrication as a photoresist) or insulating oxides such as silicon dioxide. The substrate might be an insulating substrate, such as glass or polymer or plastics, or may be a semiconductor substrate such as silicon. Part of the coupling component may be provided on the silicon substrate. Thus, using conventional integrated circuit processing techniques a coil such as an aluminum coil may be fabricated over a silicon substrate. Other metals may also be used. The coil may itself be covered by a passivation layer, such as silicon dioxide. One or more layers of a suitable insulating material, such as polyimide, may then be deposited above the coil. This allows the thickness of the polyimide, and hence the breakdown voltage of the insulator, to be controlled. Then a second coil, for example of aluminum, gold or another suitable metal may be deposited over an upper surface of the polyimide in order that the two coils cooperate to form a transformer. One or more further layers of insulation, such as polyimide, BCB, SU8 etc, may then be placed over the additional coil. Each layer of insulation may lie above, and extend around the sides of, each preceding layer. If desired, further components embedded in further layers of insulator may be fabricated. Finally the outermost layer of insulator may be masked and selectively etched so as to form a pattern of trenches therein which, in use, can inter-engage with a mould compound, or indeed a further insulating compound, in order to form a secure bond over the uppermost layer of polyimide. Such a structure prevents the breakdown mechanisms resulting from “tracking” across the surface of the polyimide.

According to a further aspect there is provided an insulating structure within an integrated circuit package, the insulating structure comprising an electrical or electronic component, or at least part thereof, embedded within an insulating structure, wherein the insulating structure has a textured or ribbed surface.

Advantageously the insulating structure may be used to form a signal conveying component, such as a transformer. The insulating structure may be used to form an isolator wherein a first circuit that performs at least an input function is formed on a first die and a second circuit which performs at least an output function is formed on a second die, and where the first and second circuits are interconnected via the insulating structure. The first and second dies may be formed on respective lead frames within the integrated circuit package, i.e. within the chip. The insulating structure may be provided on either of the first or second dies, or in a further arrangement may be provided on a third die or substrate. Where a third substrate is used it does not have to be a semiconducting substrate, and may be formed of any suitable insulating material such as glass, plastics, or polymers. The third die may be carried on its own lead frame, or may be secured to one of the other lead frames by way of an insulating layer between the third substrate and the lead frame. The two, or three, substrates may then be embedded within a known mould compound during insertion into a plastics integrated circuit package.

According to a further embodiment there is provided a method of manufacturing an electrical device comprising at least one electrical or electronic component provided within a package that carries connectors for establishing electrical connection to the circuit, and wherein the circuit comprises at least one component encapsulated in an insulator, the method comprising forming a plurality of structures extending substantially perpendicularly to the surface of the insulator, and embedding the circuit encapsulated within the insulator in a mould compound within the package, wherein the mould compound engages with the plurality of structures at the surface of the insulator.

As used herein, the term “embedded” allows for the deliberate formation of connection regions to or from the at least one component such that electrical connection can be made to the component.

DESCRIPTION OF EXAMPLE EMBODIMENTS

FIG. 1schematically represents the components within a signal isolator which acts to receive an input signal at the first voltage or a first voltage range, which may be a relatively high voltage, and to convey it at a lower voltage for processing by further components, not shown, such as a microprocessor. Such an isolator10typically comprises a receive circuit12that has input terminals14and16for receiving an input signal, and processing electronics18which acts to convert the signal into a form suitable for transmission across an isolation circuit20. The processing electronics18may, for example, encode a voltage by converting it to the frequency domain, or may encode a logic signal by providing a high frequency sinusoid to the isolation circuit when the logic signal is asserted, and inhibiting provision of the sinusoid to the isolation circuit when the logic signal is not asserted. The isolation circuit20in this example comprises a first transformer coil22magnetically coupled to a second transformer coil24. The magnetic coupling may simply be a result of the relative proximity of the coils to one another. The coils are separated by an insulating material23. Advantageously one or both of the coils are also embedded in an insulating material. An output of the coil22is provided to an output circuit30where a further electronic circuit32processes the signals received from the second coil24in order to reconstitute a representation of the input signal provided to the drive circuit12. The arrangement shown inFIG. 1is highly simplified, and, for example, a single channel may include two transformers such that the signal can be conveyed in a differential manner, or in a phase or frequency modulated manner. Additionally, it may be desirable to send signals back from the low voltage side of the circuit30to the higher voltage side12, and therefore each element may be provided in a bi-directional manner, and the isolator may be used to convey signals in a bi-directional manner, or additional isolators may be provided such that some of the isolators may be dedicated for transmission of data in one direction and other of the isolators may be dedicated for the transmission of data in a second direction. Furthermore, if the input receiver circuitry12is unable to derive power from the equipment that it is connected to, then it is also possible to use the transformers to provide power to run the receiver circuit.

As shown inFIG. 1, the receiver circuit12, the isolator20, and the output circuit30have been provided on respective substrates. It is desirable that the receiver at the high voltage side and the low voltage output side circuit30are provided on respective substrates, but either of those substrates may optionally incorporate the isolator20.

FIG. 2is a cross section through an embodiment of an isolator20. The diagram is not to scale, and in particular the thickness of the substrate50is, much greater than shown inFIG. 2. In the arrangement shown inFIG. 2a substrate50, such as a semiconductor wafer, acts as a carrier for the insulating structure used to form a transformer based signal isolator. A first coil52formed as a spiraling metal track is provided at the surface of the substrate50. A layer of insulator53such as silicon dioxide insulates the metal track from the substrate. The metal track may be formed of Aluminum, Gold or any other suitable metal. Other conducting materials may also be used. The nature of a spiral track is that a connection is made to a radially outermost most part54of the spiral52and that a connection must also be made to radially innermost part56of the spiral52. The connection to the outermost part54can be easily accomplished by extending the metal layer used to form the spiral such that it forms a track60extending towards a bond pad region62. A connection to the innermost portion56of the spiral has to be made in a plane above or below the plane of the spiral. In the arrangement shown inFIG. 2a decision has been made to make the interconnection70below the plane of the spiral conductor52, for example by forming a highly doped region or a further metal layer70which connects to the region56by way of a first via72and which connects to a further section of metal track74by way of a further via76. Thus a further insulation oxide layer (not shown) may lie beneath the metal layer70so as to insulate it from the substrate. A further section of metal track74extends towards a bond pad region80. After the first coil52is formed, the metal tracks may be covered by a thin layer of passivation82, such as silicon dioxide, or some other insulator, except in the regions of the bond pads62and80where the passivation is etched away. The fabrication of such structures is known to the person skilled in the art and need not be described further here.

It is known to the person skilled in the art that insulators can typically withstand the maximum electric field across them before dielectric breakdown occurs and a conductive path opens through the insulator. The electric field is expressed in volts per unit distance, and hence the key to obtaining high breakdown voltages is to be able to control the thickness of the insulator. Polyimide is a compound which is suitable for use as an insulator as it has a breakdown voltage of around 800 to 900 volts per μm, and is also relatively easy to work with within the context of semiconductor fabrication processes and is largely self planarising. Other insulating materials that are commonly used in integrated circuit fabrication include BCB and SU8. Other insulating polymers and oxides may also be used. As shown inFIG. 2, a first layer of insulator90, for example of polyimide is deposited over the region of the substrate50and the passivation82in which the first coil52is formed. Then a second overlapping layer92of insulator, such as polyimide is formed over the first region90so as to build up an additional thickness of the insulator. The ends of the region92are allowed to wrap around the ends of the region90, such that the insulating structure increases in both depth and lateral extent. Each deposition step generally increases the thickness of the insulator by, in the case of polyimide between 10 to 16 microns. Thus after two deposition steps the insulator is typically between 20 and 32 microns thick. If necessary or desirable further layers can be deposited to form thicker structures. These thicknesses being relatively well controlled and selectable at the choice of the fabricator. Next a second metallic layer100is deposited over the layer92and patterned, for example to form a second spiral track which co-operates with the first spiral track to form a transformer. The second metal layer100may be of aluminum or another suitable metal such as gold. As with the first conductive spiral track, connections need to be made to both a centermost portion of the spiral and an edge portion. For diagrammic simplicity the connection to the outer edge portion has been omitted and can be assumed to lie either above or below the plane of theFIG. 2, whereas the central portion has been shown and represented as a bond pad110.

Following formation of the second spiral conductive track100, a third layer112of insulator, such as polyimide is deposited over the second layer92and over the spiral track100. The layer112extends beyond and overlaps the layer92. After formation of the layer112it is masked and then selectively etched so as to open up a connection aperture113to the bond pad110. This step may be omitted where the spatial extent of the bond pad is such that the fabricator can reliably form deeper etches so as to form the aperture to113reach the bond pad in subsequent etching steps, which will be described later.

Following formation of the third layer of insulator112a fourth insulating layer, such as a polyimide layer114may be deposited over it. The fourth layer114may also advantageously reach around the edges of the preceding layer, i.e. the third layer112. Following deposition and curing of the fourth layer114, it is selectively masked in order that a surface structure can be formed within the layer114, and then it is etched, for example, by plasma etching or other suitable etching process, to form a series of trenches120extending partially or wholly through the depth of the layer114. This etching may also be sufficient to reach through to reveal the bond pad110by virtue of acting on a wider aperture within the mask.

FIG. 3is a plan view of the etching, and hence trench pattern, that may be formed in the fourth insulating layer114. As viewed from above the layer is etched to form a pattern of concentric squares or rectangles. The rectangles may have rounded corners as shown inFIG. 3, or may be formed by trenches intersecting at substantially 90°. A pattern of trenches120encircles the bond pads110such that any breakdown path trying to form along the surface of the insulating layer114has to travel a much further distance and, as will be explained later, this structure also provides features to facilitate keying with a bond or a mould compound.

FIG. 4illustrates a variation to the arrangement shown inFIG. 3where either the walls are discontinuous, or where the trenches are discontinuous. Either of these choices is freely available to the designer. In this example the walls are discontinuous such that one trench can extend into a radially adjacent trench by virtue of linking sections132.

The wall or trench pattern need not be formed by basically rectangular features, andFIGS. 5 and 6show alternative patterns formed of substantially circular or elliptical walls or trenches which may include bridges extending across a trench or apertures through a wall, similar to that described with respect toFIGS. 3 and 4. As shown, substantially planar regions140exist around the outermost trench or wall, and these can either be left unpatterned or further patterns can be formed in them, for example arcuate trenches or walls.

Further patterning structures are available, for example a honeycomb structure as shown inFIG. 7or a block paving configuration as shown inFIG. 8. These structures are only given as examples and other structures, whether they be geometric or substantially irregular can also be provided.

FIG. 9schematically illustrates the transformer based isolator discussed with respect toFIG. 2when packaged within an integrated circuit package160. The components are not shown to scale, for diagrammatic clarity, and also when compared toFIG. 1only the isolator20has been illustrated, and the receiver circuit12and output circuit30have not been illustrated although it is to be understood that corresponding components are included within the integrated circuit package160. In this example the package160is of a dual inline type having legs162provided on opposing sides of the package160.

For diagrammatic simplicity, some of the bonds with the bond pads have been shown at a first lateral position (point P1) and a second lateral position (point P2), and it is to be understood that these extend from the bond pads to lead frames, as will be described later on with respect toFIG. 10.

The various dies within the package160are held within a mould compound170which serves to hold them in place, acts as an insulator, and provides environmental protection. As shown in greater detail in the expanded section174, the mould compound170extends into the trenches120formed within the fourth layer of insulator114, including trenches T1and T2, thereby enhancing the mechanical and chemical bonds between the mould compound170and the insulating structure. This is advantageous since any gap between the surface of the insulating structure, i.e. the fourth layer114and the mould compound170can give rise to a breakdown path. Additionally, in use, as the semiconductor component ages it is possible for delamination to occur between the mould compound and the semiconductor dies formed therein. The delamination gives rise to the formation of a gap which could give rise to a surface breakdown mechanism. The enhanced mechanical bounding resulting from the surface structure mitigates the risk of such delamination occurring between the insulating component and the mould compound170, thereby enhancing the longevity of the component, and allowing the manufacturer to provide a component that can be guaranteed to withstand a higher voltage between its high voltage and low voltage sides before breakdown might occur.

As noted with respect toFIG. 9, the various dies within the integrated circuit package need to connect with one another and need to connect with the legs162.FIG. 10shows a configuration of a three die isolator in which the receiver circuit12is carried on a first die200mounted on a first lead frame202. Wire interconnections for example204, are made between bond pads on the die200and respective bond regions of the lead frame202. In the arrangement shown inFIG. 10the output circuit30is formed on a die210which is carried on a second lead frame212together with the isolator20. Wire connections extend between the first die200and the corresponding high voltage connections to the first transformer coil of the isolator20. An example of one such connection is designated220. Similarly connections, for example230extend between the second transformer coil and the die210. The entire arrangement is embedded within the mould compound170described hereinbefore with respect toFIG. 9. In the arrangement shown inFIG. 10, a common return connection is provided for the transformer coils on the high voltage side, and a separate common return connection is provided for the transformer coils on the low voltage side so as to reduce the number of interconnections made to the isolator20.

FIG. 11shows a further variation on the arrangement shown inFIG. 2such that a lowermost transformer coil230is formed over an insulating layer such as the passivation82above a substrate50. The first coil230may be embedded within a first layer of insulator240, such as polyimide, BCB, SU8 or other suitable insulator. As shown, an outermost connection to the first coil230may be formed by extending the metallization to a first bond pad242, and a connection to the innermost part of the coil230may be made by a further metallic strip250formed over the substrate (and on top of an insulating layer53placed over substrate if the substrate is silicon50), extending between a further bond pad252and a via254that extends through the passivation82(or other insulating layer) to reach an innermost portion of the coil230. A second layer of insulator260is formed over the first layer240and wraps around the edges of the layer240so as to enclose it. The layer260defines the minimum inter-coil distance, and hence the breakdown voltage between the coils of the transformers. Next a second coil270is formed over the second insulating layer260by metal deposition and patterning. A connection to the radially innermost part of the coil is represented by bond pad272whereas the outermost part of the coil has not been shown and is assumed to be above or below the plane of the diagram. Next, a third layer of insulator280is deposited over the second coil270. Thus, comparing this arrangement with that shown inFIG. 2it can be seen that a surface pattern in the form of walls290surrounded by corresponding trenches292are formed in the third layer280rather than in a further (fourth) layer of polyimide. For diagrammatic simplicity only one wall290has been shown surrounded by corresponding trenches, but it is to be assumed that multiple walls can be fabricated. For simplicity the, first, second and third (or indeed further) insulating layers may be made of the same material, but this is not a requirement.

The arrangement described herein is not limited to the fabrication of transformers, and as shown inFIG. 12only a single metallic spiral300might be formed so as to fabricate an inductor. Thus, the arrangement shown inFIG. 12is similar to that shown inFIG. 11except that the first spiral inductor230and metal layers to connect it to have been omitted. Furthermore, just to show the further variations which are possible, a fourth layer310of insulator has been deposited so as to overlie and surround the other layers, and then masked and etched so as to open up a connection to a bond pad320and also to form a surface structure330to facilitate engagement with the mould compound once the insulating structure has been placed within an integrated circuit package. The layers240and260beneath the component280may be regarded as forming M layers over the substrate, and the or each layer over the component280may be regarded as forming a further N layers.

FIG. 13shows a further variation which is similar toFIG. 2, and like parts have been identified with the like reference numbers. ComparingFIG. 13withFIG. 2, the third and fourth layers92and114have been replaced by a single layer of insulator350, for example of polyimide, having trenches120formed therein. Connections to the bond pads80and110are shown inFIG. 13.

FIG. 14is similar toFIG. 13to the extent that the uppermost layer of insulator350covers an uppermost metal layer360, and similar toFIG. 11in that lower metal layer370has been formed over the passivation82. However here the metal layers360and370have not been patterned to form inductors, but instead form plates of a capacitor. A lowermost metal layer74beneath the passivation82and over the oxide layer53can be used to provide a connection to the lowermost plate of the capacitor.

Each of these variations may, in use, be embedded in mould compound.

It is thus possible to improve the breakdown voltage of an insulating structure by at least one of: a) lengthening the surface breakdown path across an uppermost surface of the insulating structure; and b) improving the adhesion between the insulating structure and a further insulating material such as mould compound.

A further advantage of the arrangement described herein is that the surface structure can be fabricated at the same time as masking and etching the polyimide so as to open up apertures to make electrical contact to the bond pads. Thus, the enhanced breakdown voltage described by the provision of such a structure can effectively be fabricated for no additional cost.