Laminated electronic component

A laminated electronic component includes a laminate having first and second major surfaces. Four predetermined indication locations are provided on the first major surface. One or more via-hole conductors are arranged at corresponding one or more of the indication locations. The locations and the number of indicating via-hole conductors allows for identification of information regarding the laminated electronic component. Each indicating via-hole conductor is exposed at the first major surface, does not reach the second major surface, and is electrically isolated from wiring conductors built into the laminate.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to laminated electronic components, and more particularly, to a laminated electronic component on which information, such as the time of manufacture, a specification, or a manufacturing condition, is indicated.

2. Description of the Related Art

Product information, such as time of manufacture, product lot numbers, and specifications, is often indicated on various electronic components.

For example, Japanese Unexamined Patent Application Publication Nos. 61-158190 (Patent document 1) and 61-232694 (Patent Document 2) disclose related technologies that are applied to printed circuit boards. In Patent Document 1, a plurality of through holes are provided at respective locations of a printed circuit board, and only desired through holes are sealed to provide a predetermined code, such that specific information is indicated. In Patent Document 2, a plurality of locations at which through-holes for indicating specific information are to be provided are predetermined, and through holes are provided at some of the locations in accordance with information to be indicated.

The technologies disclosed in Patent Documents 1 and 2 described above are both directed to printed circuit boards that have no built-in wiring conductors and that, therefore, have no built-in devices.

On the other hand, for example, for laminated electronic components including laminates, such as multilayer ceramic substrates, the laminates have built-in wiring conductors for providing built-in devices. When the technology described in Patent Document 1 or 2 is applied to such laminated electronic components, the following problems arise.

First, in the technologies described in Patent Documents 1 and 2 through-holes are provided. However, the provision of such through-holes in a laminate included in a laminated electronic component makes it impossible to arrange wiring conductors at locations where the through-holes are provided. Thus, regions where wiring conductors can be arranged in the laminate are limited, which prevents miniaturization of the laminated electronic component.

When a laminate is defined by a multilayer ceramic substrate, the through-holes provided therein cause a problem in that a mechanical failure, such as a crack, is more likely to occur.

SUMMARY OF THE INVENTION

In order to overcome the problems described above, preferred embodiments of the present invention provide a laminated electronic component that overcomes the above-described problems.

The present invention is directed to a laminated electronic component having a laminate. The laminate includes a plurality of laminated insulating layers, first and second major surfaces that oppose each other, and built-in wiring conductors.

In this laminated electronic component, information regarding the laminated electronic component is indicated in an identifiable manner according to whether or not a specific indication is present at each of a plurality of pre-defined locations on the first major surface of the laminate.

In order to overcome the technical problems described above, in the present invention, each specific indication is provided by an indicating via-hole conductor provided in the laminate. Each indicating via-hole conductor does not extend to the second major surface, is electrically isolated from the wiring conductors, and is seen from a first major surface side. With this arrangement, regions where wiring conductors can be arranged in the laminate are not substantially limited by the formation of the indicating via-hole conductors. This prevents the size of the laminated electronic component from increasing as a result of indication of information regarding the laminated electronic component.

Further, the indicating via-hole conductors can be formed by a method similar to that for via-hole conductors that function as wiring conductors provided in the laminate. Thus, providing the indicating via-hole conductors does not decrease the productivity of laminated electronic components.

Additionally, there is no need to provide a through hole in the laminate to indicate information regarding the laminated electronic component. Thus, even when the laminate is defined by a multilayer ceramic substrate, the present invention eliminates mechanical failures, such as a crack, from occurring as a result of the formation of the through hole.

Preferably, each indicating via-hole conductor is exposed at the first major surface.

In the present invention, the laminated electronic component may further include a component that is mounted above the first major surface of the laminate. In this case, each indicating via-hole conductor may be provided at the location of the mounted component or may be provided at a location other than the location of the mounted component.

In the present invention, in a case in which the mounted component is located above the first major surface of the laminate, when the indicating via-hole conductors are provided at the location of the mounted component, the indicating via-hole conductors are hidden by the mounted component in a completed laminated electronic component. Thus, it is possible to prevent the indicating via-hole conductors from degrading the appearance. In addition, it is possible to provide a relatively large area for indication locations for the indicating via-hole conductors, since the indication locations for the indicating via-hole conductors are not limited by the location of the mounted component. Further, since the first major surface is not substantially occupied for the indication locations for the indicating via-hole conductors, the first major surface can be effectively used.

On the other hand, in the case in which the indicating via-hole conductors are provided at a location other than the location of the mounted component, even when the laminated electronic component is completed, it is possible to facilitate identification of the indicating via-hole conductors through visual observation or image processing, thereby allowing for immediate identification of information regarding the laminated electronic component.

Additionally, in the present invention, a mark for identification of a direction of the laminate may be provided on the first major surface of the laminate, as required. This arrangement reduces incorrect identification of information indicated by the indicating via-hole conductors, regardless of the arrangement of conducting lands and other elements on the first major surface. In addition, the kinds of information that can be indicated are increased by a combination of the mark and the indicating via-hole conductors.

These and various other features, elements, characteristics and advantages of the present invention will become more apparent from the following detailed description of preferred embodiments thereof with reference to the attached drawings.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

FIG. 1is a plan view of a laminate2included in a laminated electronic component1according to a first preferred embodiment of the present invention, andFIG. 2is a partial sectional front view of the laminated electronic component1including the laminate2shown inFIG. 1.

The laminate2defines a multilayer ceramic substrate. As clearly shown inFIG. 2, the laminate2includes a plurality of laminated insulating layers3and has first and second major surfaces4and5that oppose each other. The second major surface5of the laminate2includes a cavity6, in which a chip component7, such as an IC chip, is accommodated. The chip component7and wiring conductors of the laminate2are connected via, for example, wires8by wire bonding.

The first major surface4of the laminate2includes conducting lands9. A chip component10, such as a crystal oscillator, is mounted above the first major surface4of the laminate2and is electrically isolated from the conducting lands9. InFIG. 1, the chip component10is shown by an imaginary line.

The laminate2includes built-in wiring conductors for providing predetermined functions. Of the wiring conductors, only typical ones are illustrated inFIG. 2. As shown inFIG. 2, the wiring conductors include a plurality of conductive films11and a plurality of via-hole conductors12. Some of the conductive films11define passive devices, such as a capacitor. Edges of the second major surface5of the laminate2include terminal conductors13.

In the laminated electronic component1having the above-described structure, information regarding this laminated electronic component1is indicated on the first major surface4of the laminate2. In this preferred embodiment, the month of manufacture is indicated as the time of manufacture of the laminated electronic component1.

More specifically, for example, four indication locations14to17are pre-defined on the first major surface4of the laminate2. Information regarding the month of manufacture is indicated in an identifiable manner according to whether or not a specific indication is shown on each of the four indication locations14to17. Specifically, each specific indication is provided by an indicating via-hole conductor18. In the case ofFIG. 1, at the indication locations16and17, indications are provided by the indicating via-hole conductors18. The indication locations14and15have neither indicating via-hole conductors nor holes.

The indicating via-hole conductors18are formed by a similar method to that for the via-hole conductors12, which function as wiring conductors. As is clearly shown inFIG. 2, each indicating via-hole conductor18is exposed at the first major surface4but does not reach the second major surface5, and is electrically isolated from any of the wiring conductors, such as the conductive films11and the via-hole conductors12.

The indicating via-hole conductors18are obtained by firing conductive paste containing metal powder, such as silver or copper. When the laminate2is defined by a multilayer ceramic substrate, the insulating layers3are made of ceramic. Thus, this arrangement provides a distinctive difference in color tone or gloss between the first major surface4of the laminate2and the indicating via-hole conductors18. This ensures that the indicating via-hole conductors18can be identified by an optical method, such as visual observation or image processing.

In this preferred embodiment, when four indication locations14to17are provided, the indicating via-hole conductors18as shown at “Location of Indicating Via-hole Conductor” shown inFIG. 3allow the month of manufacture from January to December to be indicated. InFIG. 3, each indicating via-hole conductor18is shown by a black dot. Four individual regions corresponding to the four indication locations14to17are provided in order to facilitate the understanding of the location of each indicating via-hole conductor18.

Referring toFIG. 3, for example, when the month of manufacture is January, the indicating via-hole conductor18is provided at the indication location14, as can be understood from the location of the black dot. When the indicating via-hole conductors18are provided at the indication locations16and17as shown inFIG. 1, this indicates that the month of manufacture is June, as can be seen fromFIG. 3.

As described above, when four indication locations14to17are used, four other kinds (not shown) of indication are available in addition to the 12 kinds of indication shown inFIG. 3, so that a total of 16 kinds of indication are possible.

The locations and the numbers of the indicating via-hole conductors18shown inFIG. 3are merely an example, and many other variations may be employed.

As shown inFIG. 1, the first major surface4of the laminate2is longitudinally and laterally symmetrical with respect to the conducting lands9and the indication locations14to17. As a result, for example, in some cases, it is impossible to clearly distinguish between a case in which the indicating via-hole conductors18are provided at the indication locations16and17as shown inFIG. 1and a case (not shown) in which the indicating via-hole conductors18are provided at the indication locations14and15.

Typically, many laminated electronic components are provided with marks for identification of the directions thereof. In this preferred embodiment, a mark19for identification of the laminate2is provided on the first major surface4of the laminate2. The mark19can be provided by a similar method to that for the conducting lands9.

Thus, the provision of the mark19as described above allows identification of the longitudinal and lateral directions of the laminate2. This makes it possible to clearly distinguish between the case in which the indicating via-hole conductors18are provided at the indication locations16and17as shown inFIG. 1and the case in which the indicating via-hole conductors18are provided at the indication locations14and15.

In the preferred embodiment described with reference toFIGS. 1 and 2, the indicating via-hole conductors18are provided at locations that are hidden under the chip component10mounted above the first major surface4. Each indicating via-hole conductor18, however, may be provided at a location other than the location of the mounted component, as is described below with reference toFIG. 4.

FIG. 4is a plan view of a laminated electronic component21according to another preferred embodiment of the present invention.

The laminated electronic component21includes a laminate22. As in the laminate2shown inFIG. 2, the laminate22includes a plurality of laminated insulating layers (not shown) and has first and second major surfaces23and24that oppose each other. The laminate22further has built-in wiring conductors (not shown).

A plurality of chip components25are mounted on the first major surface23of the laminate22. On the first major surface23of the laminate22, for example, four indication locations26to29are arranged in a row at locations where the chip components25are not provided. In the case ofFIG. 4, indicating via-hole conductors30are provided at the indication locations27and28. The indication locations26and29have neither indicating via-hole conductors nor holes.

In this preferred embodiment as well, the month of manufacture from January to December can be indicated in an identifiable manner according to whether or not the indicating via-hole conductor30is present at each of the four indication locations26to29. For example, for January to April, the indicating via-hole conductor30is provided at one of the indication locations26to29; for May to October, the indicating via-hole conductors30are provided at two of the indication locations26to29; and for November and December, the indicating via-hole conductors30are provided at three of the indication locations26to29. This arrangement allows the month of manufacture to be indicated in an identifiable manner.

While the present invention has been described above in connection with the illustrated preferred embodiments, various other modifications are possible within the spirit and scope of the present invention.

For example, the number and the geometry of indication locations can be arbitrarily changed. Increasing the number of indication locations also allows for identification of not only the month of manufacture but also the year of manufacture.

The size or shape of each of the indicating via-hole conductors provided at the respective indication locations may be changed depending on information to be indicated. When a plurality of indicating via-hole conductors are provided, different colors may be used among the indicating via-hole conductors. For example, conductive paste containing silver and conductive paste containing copper may be used to form the indicating via-hole conductors. Such modifications can further increase the kinds of information that can be indicated.

Holes for the indicating via-hole conductors may be pre-provided at all the indication locations in such a manner that the holes do not extend through the laminate and do not reach the wiring conductors. In such a case, only the necessary holes may be filled with the indicating via-hole conductor(s). Such an arrangement enables for clear identification of predetermined indication location(s) in accordance with the presence of hole(s).

Information indicated by the indicating via-hole conductors is not limited to the above-mentioned month of manufacture, and may be information representing other time of manufacture, such as the year/month/day of manufacture or the year of manufacture. In such a manner, with the time of manufacture being indicated on laminated electronic components, when shipped products have a problem, it is possible to identify the cause of a change in a manufacturing condition and so on and to distinguish between problematic lots and regular lots.

Information indicated by the indicating via-hole conductors may be a specification of laminated electronic components or a manufacturing condition, such as a firing profile for providing laminates or a soldering profile of components to be mounted.

In the illustrated preferred embodiments, the indicating via-hole conductors18and30are provided so as to be exposed at the respective first major surfaces4and23. However, when the laminate is defined by a multilayer ceramic substrate, the indicating via-hole conductors may be provided in a layer (e.g., the second or third layer) adjacent to the first major surface, since the internal wiring conductors are seen through a layer or layers adjacent to the first major surface. The above-described arrangement can prevent incorrect identification resulting from undesired breakage of, for example, the indicating via-hole conductors. When the indicating via-hole conductors are provided at locations disposed under a component, solder may attach to the indicating via-hole conductors during the soldering of the component, thereby preventing the component from being displaced.