Protocol and interface between a LAN on motherboard (LOM) and a powered device (PD) for a personal computing device (PCD)

A Power-over-Ethernet (PoE) communication system dynamically provides power and data communications over a communications link. In a computing environment made up of one or more personal computing devices (PCD) and/or one or more powered devices (PD), power source equipment (PSE) determines an allocated amount of power to be supplied to each device. The personal computing devices include a unified LAN-On-Motherboard (LOM) that combines the functionality of a powered device (PD) controller of a conventional PD and a LOM of a conventional personal computing device into a single unified subsystem. The unified LOM includes a standard or universal interface between the LOM and PD controller so that different types of PD devices with differing functionality can be easily married to the LOM, without requiring significant hardware or software redesign. The universal or standard interface includes a physical interface between the LOM and the PD controller and a compatible communication protocol to govern the communications between the LOM and the PD controller. This allows the LOM to be mixed and matched with any PD controller, enabling OEMs to economically provide multiple product models with varying degrees of PD and LOM functionality.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention generally relates to personal computing devices (e.g., personal or laptop computers) in a Power over Ethernet (PoE) system, and more specifically to an interface and a protocol to govern communications between a powered device (PD) controller and a LAN on Motherboard (LOM) in a personal computing device.

2. Related Art

Ethernet communications provide high speed data communications over a communications link between two communication nodes that operate according the IEEE 802 Ethernet Standard. The communications medium between the two nodes can be twisted pair wires for Ethernet, or other types of communications medium that are appropriate. Power over Ethernet (PoE) communication systems provide power and data communications over a common communications link. More specifically, a power source device (e.g., power source equipment (PSE)) connected to the physical layer of the first node of the communications link provides DC power (for example, 48 volts DC) to a powered device (PD) at the second node of the communications link. The DC power is transmitted simultaneously over the same communications medium with the high speed data from one node to the other node.

The PSE device is often a data switch. Typically, a PSE on a switch is called an endspan device. The switch is typically a networking bridge device with data ports that can additionally have routing capability. The switch could have as little as two data ports or as many as 400 or more data ports. It may have two or more rows of data ports, where a data port in an input row of data ports can be switched to any one of the data ports in an output row of data ports. Each data port can include a serial-to-parallel (i.e. SERDES) transceiver, and/or a PHY device, to support high speed serial data transport. Herein, data ports and their corresponding links can be interchangeably referred to as data channels, communication links, data links, etc, for ease of discussion.

Typical PD devices that utilize PoE include Internet Protocol (IP) phones (Voice over IP (VoIP) phones), wireless access points, etc. Personal computing devices, such as personal or laptop computers, are another example of PD devices. The integration of PoE into a conventional personal computing device raises several issues that must be overcome. For example, the hardware (H/W) architecture of the conventional personal computing device requires extensive modification of the physical interface between the conventional personal computing device and the PD device to access the PoE subsystem. Likewise, implementation of PoE requires widespread modification of the software (S/W) architecture of the conventional personal computing device, such as the communication protocol for governing a communication between the conventional personal device and the PD device to provide an example. Therefore, what is needed is a personal computing device that solves the addresses the issues of integrating PoE into a conventional personal computing device.

Further, it is also desirable to provide flexibility for Original Equipment Manufactures (OEM) to combine and market personal computing devices (PCDs) with various levels and types of PoE functionality. More specifically, it is desirable to enable OEMs to easily mix and match conventional personal computer (PC) components with PoE components of varying functionality. In order to do so, what is a needed is a universal standard interface between the PD device and the corresponding PC components so that different types of PD devices with differing functionality can be easily married to PC components, without requiring significant hardware or software redesign. This will enable an OEM to economically offer various PCD models having differing levels of PoE functionality.

The present invention will now be described with reference to the accompanying drawings. In the drawings, like reference numbers generally indicate identical, functionally similar, and/or structurally similar elements. The drawing in which an element first appears is indicated by the leftmost digit(s) in the reference number.

DETAILED DESCRIPTION OF THE INVENTION

The following detailed description of the present invention refers to the accompanying drawings that illustrate exemplary embodiments consistent with this invention. Other embodiments are possible, and modifications may be made to the embodiments within the spirit and scope of the invention. Therefore, the detailed description is not meant to limit the invention. Rather, the scope of the invention is defined by the appended claims.

FIG. 1is a block diagram of a conventional Power over Ethernet (PoE) system. More specifically,FIG. 1illustrates a high level diagram of a conventional Power over Ethernet (PoE) system100that provides both DC power and data communications over a common data communications medium. Referring toFIG. 1, the power source equipment102provides DC power over conductors104,110to a powered device (PD)106having a representative electrical load108. The power source equipment102provides PoE according to a known PoE standard, such as the IEEE 802.3af™ standard, the IEEE 802.3at™ standard, the IEEE 802.3™ standard, a legacy PoE transmission, and/or any suitable type of PoE transmission standard to provide some examples. The power source equipment102and PD106also include data transceivers that operate according to a known communications standard, such as a 10BASE-T, a 100BASE-TX, a 1000BASE-T, a 10GBASE-T, and/or any other suitable communication standard to provide some examples. More specifically, the power source equipment102includes a physical layer device on the PSE side that transmits and receives high speed data with a corresponding physical layer device in the PD106, as will be discussed further below. Accordingly, the power transfer between the power source equipment102and the PD106occurs simultaneously with the exchange of high speed data over the conductors104,110. In one example, the power source equipment102is a data switch having multiple ports that is communication with one or more PD devices, such as Internet phones, or a wireless access point.

The conductor pairs104and110can carry high speed differential data communications. In one example, the conductor pairs104and110each include one or more twisted wire pairs, or any other type of cable or communications media capable of carrying the data transmissions and DC power transmissions between the PSE and PD. In Ethernet communications, the conductor pairs104and110can include multiple twisted pairs, for example four twisted pairs for 10 Gigabit Ethernet. In 10/100 Ethernet, only two of the four pairs carry data communications, and the other two pairs of conductors are unused. Herein, conductor pairs may be referred to as Ethernet cables or communication links for ease of discussion.

FIG. 2illustrates a more detailed figure of the conventional power transfer from Power source equipment (PSE) to a Powered Device (PD) in a conventional PoE communications system. More specifically,FIG. 2provides a more detailed circuit diagram of the PoE system100, where the power source equipment102provides power for PoE to PD106over conductor pairs104and110. The power source equipment102includes a transceiver physical layer device (or PHY)202having full duplex transmit and receive capability through differential transmit port204and differential receive port206. (Herein, transceivers may be referred to as PHYs) A first transformer208couples high speed data between the transmit port204and the first conductor pair104. Likewise, a second transformer212couples high speed data between the receive port206and the second conductor pair110. The respective transformers208and212pass the high speed data to and from the transceiver202, but isolate any low frequency or DC voltage from the transceiver ports, which may be sensitive large voltage values.

The first transformer208includes primary and secondary windings, where the secondary winding (on the conductor side) includes a center tap210. Likewise, the second transformer212includes primary and secondary windings, where the secondary winding (on the conductor side) includes a center tap214. The DC voltage supply216generates an output voltage that is applied across the respective center taps of the transformers208and210on the conductor side of the transformers. The center tap210is connected to a first output of a DC voltage supply216, and the center tap214is connected to a second output of the DC voltage supply216. As such, the transformers208and212isolate the DC voltage from the DC supply216from the sensitive data ports204,206of the transceiver202. An example DC output voltage is48volts, but other voltages could be used depending on the voltage/power requirements of the PD106.

The power source equipment102further includes a PSE controller218that controls the DC voltage supply216based on the dynamic needs of the PD106. More specifically, the PSE controller218measures the voltage, current, and temperature of the outgoing and incoming DC supply lines so as to characterize the power requirements of the PD106.

Further, the PSE controller218detects and validates a compatible PD, determines a power classification signature for the validated PD, supplies power to the PD, monitors the power, and reduces or removes the power from the PD when the power is no longer requested or required. During detection, if the PSE finds the PD to be non-compatible, the PSE can prevent the application of power to that PD device, protecting the PD from possible damage. IEEE has imposed standards on the detection, power classification, and monitoring of a PD by a PSE in the IEEE 802.3af™ standard and the IEEE 802.3™ standard, both of which are incorporated herein by reference.

Still referring toFIG. 2, the contents and functionality of the PD106will now be discussed. The PD106includes a transceiver physical layer device219having full duplex transmit and receive capability through differential transmit port236and differential receive port234. A third transformer220couples high speed data between the first conductor pair104and the receive port234. Likewise, a fourth transformer224couples high speed data between the transmit port236and the second conductor pair110. The respective transformers220and224pass the high speed data to and from the transceiver219, but isolate any low frequency or DC voltage from the sensitive transceiver data ports.

The third transformer220includes primary and secondary windings, where the secondary winding (on the conductor side) includes a center tap222. Likewise, the fourth transformer224includes primary and secondary windings, where the secondary winding (on the conductor side) includes a center tap226. The center taps222and226supply the DC power carried over conductors104and110to the representative load108of the PD106, where the load108represents the dynamic power draw needed to operate PD106. A DC-DC converter230may be optionally inserted before the load108to step down the voltage as necessary to meet the voltage requirements of the PD106. Further, multiple DC-DC converters230may be arrayed in parallel to output multiple different voltages (3 volts, 5 volts, 12 volts) to supply different loads108of the PD106.

The PD106further includes a PD controller228that monitors the voltage and current on the PD side of the PoE configuration. The PD controller228further provides the necessary impedance signatures on the return conductor110during initialization, so that the PSE controller218will recognize the PD as a valid PoE device, and be able to classify its power requirements.

During ideal operation, a direct current (IDC)238flows from the DC power supply216through the first center tap210, and divides into a first current (I1)240and a second current (I2)242that is carried over conductor pair104. The first current (I1)240and the second current (I2)242then recombine at the third center tap222to reform the direct current (IDC)238so as to power PD106. On return, the direct current (IDC)238flows from PD106through the fourth center tap226, and divides for transport over conductor pair110. The return DC current recombines at the second center tap214, and returns to the DC power supply216. As discussed above, data transmission between the power source equipment102and the PD106occurs simultaneously with the DC power supply described above. Accordingly, a first communication signal244and/or a second communication signal246are simultaneously differentially carried via the conductor pairs104and110between the power source equipment102and the PD106. It is important to note that the communication signals244and246are differential signals that ideally are not effected by the DC power transfer.

FIG. 3illustrates a block diagram of a motherboard of a conventional personal computing device. As shown inFIG. 3, a conventional personal computing device300includes a motherboard302. The motherboard302includes, among other chips/modules, a Local Area Network (LAN)-On-Motherboard (LOM) module304, a processor314, a Memory Controller Hub (MCH)316, an Input/Output Controller Hub (ICH)318, a super input/output (I/O) module320, a memory322, and a Advanced Graphics Port (AGP)324.

The motherboard302includes the LOM module304to handle network connections. The LOM module304includes communication circuits, such as Ethernet circuits to provide an example, within a motherboard rather than a separate network adapter. The LOM module304includes full duplex transmit and receive capability through differential transmit port312and differential receive port310. A transformer306couples high speed data between a first conductor pair104and the receive port310. Likewise, a second transformer308couples high speed data between the transmit port312and a second conductor pair110.

High speed data is passed between the LOM module304and the Input/Output Controller Hub318. The Input/Output Controller Hub318may be referred to as a south bridge. The Input/Output Controller Hub318is normally given responsibility for slower devices that may include a Peripheral Component Interconnect (PCI) bus, an Industry Standard Architecture (ISA) bus, a System Management Bus (SMBus), a Direct Memory Access (DMA) controller, an Interrupt controller, an Integrated Drive Electronics (IDE) controller, a Real Time Clock, Power management, and/or a Nonvolatile BIOS memory to provide some examples. The Input/Output Controller Hub318may also include support for a keyboard, a mouse, and serial ports, but normally these devices are attached through the super I/O module320. The super I/O module320provides connections to peripheral devices that may include a CD-ROM drive a printer, the mouse, the keyboard, a monitor, an external Zip drive, a scanner, an internal modem, a video controller, or any other suitable peripheral device to provide some examples.

The Memory Controller Hub316, which may be referred to as a north bridge, is responsible for controlling communication between the processor314, the Input/Output Controller Hub318, the memory322, and the Advanced Graphics Port (AGP)324. The Memory Controller Hub316may also contain an integrated video controller (not shown). The Memory Controller Hub316may determine the number, speed, and type of processor for the processor314and the amount, speed, and type of memory for the memory322. The Input/Output Controller Hub318and the Memory Controller Hub316may be combined into a single chip to form a single-chip design. The memory322contains storage for instructions and data and may include, but is not limited to, static RAM (SRAM), dynamic RAM (DRAM), Synchronous DRAM (SDRAM), non-volatile RAM (NVRAM), or Rambus DRAM (RDRAM) to provide some examples.

The processor314interprets computer program instructions and processes data. The processor314may include, but is not limited to, control circuits for executing instructions, an arithmetic logic unit (ALU) for manipulating data, and registers for storing processor status and a small amount of data to provide some examples. The processor314also executes or runs an operating system (O/S) of the personal computing device.

FIG. 4illustrates a Power over Ethernet (PoE) configuration in a computing environment, using a conventional personal computing device. A computing environment400includes conventional personal computing devices300.1through300.n, hereinafter referred to as the conventional personal computing devices300and powered devices402.1through402.m, hereinafter referred to as the powered devices402. Computing environment400can be a conference room, for example, or any other environment in which the conventional personal computing devices300are networked. The conventional personal computing devices300include any suitable device, such as a desktop computer, that receives power from a source other than a communications link but is capable of data communications over the communications link.

As shown inFIG. 4, a network switch404and/or a power supply406provides data communications to the conventional personal computing devices300and PoE and data communications to the powered devices402via a network switch404. The network switch404may be any networking switch that is capable of providing PoE and data communications to the powered devices402. The network switch404includes one or more data ports to provide PoE and data communications to the powered devices402. The network switch404may have as little as two data ports or as many as400or more data ports.

The network switch provides data communications to the conventional personal computing devices300through a corresponding interface450.1through450.n, hereinafter referred to as the interface450, whereas the network switch provides PoE and data communications to the powered devices402through a corresponding interface452.1through452.n, hereinafter referred to as the interface452. The powered devices402may include, but are not limited to Internet Protocol (IP) phones (Voice over IP (VoIP) phones), wireless access points, powered devices, such as personal or laptop computers. Those skilled in the art(s) will recognize that the powered devices402may include any suitable device that is capable of receiving power and data communications over a communications link without departing from the spirit and scope of the invention. Those skilled in the art(s) will recognize that the interface450and/or the interface452may include any communication link that can handle PoE, such as various types of Ethernet cabling, for example.

FIG. 5is a block diagram of a Power over Ethernet (PoE) system, where the PD device is a personal computing device (PCD), such as a laptop computer, a handheld device, or any other portable or hand-held device with an embedded operating system. As shown inFIG. 5, the power source equipment102provides PoE and data communications over conductors104,110to a personal computing device (PCD)502having a representative electrical load504. The power source equipment102provides PoE according to a known PoE standard, such as the IEEE 802.3af™ standard, the IEEE 802.3at™ standard, the IEEE 802.3™ standard, a legacy PoE transmission, and/or any suitable type of PoE transmission standard to provide some examples. Those skilled in the art(s) will recognize that the personal computing device502as described herein can include a personal computer, a laptop, a handheld computing device, or any other computing device with an embedded operating system, or any other powered device that is capable of receiving PoE and data communications over a communications link without departing from the spirit and scope of the invention.

The personal computing device502also includes data transceivers that operate according to a known communications standard, such as a 10BASE-T, a 100BASE-TX, a 1000BASE-T, a 10GBASE-T, and/or any other suitable communication standard to provide some examples. More specifically, the power source equipment102includes a physical layer device (PHY) on the power source equipment side that transmits and receives high speed data with a corresponding physical layer device in the personal computing device502, as will be discussed further below. Accordingly, the power transfer between the power source equipment102and the personal computing device502occurs simultaneously with the exchange of high speed data over the conductors104,110.

FIG. 6Aillustrates a more detailed figure of the power transfer from a power source equipment (PSE) to a personal computing device (PCD) according to an exemplary embodiment of the present invention. More specifically,FIG. 6Aprovides a more detailed circuit diagram of the PoE system500, where the power source equipment102provides PoE and data communications to the personal computing device (PCD)502over conductor pairs104and110. In this exemplary embodiment, the power source equipment102provides power for PoE and for data communications over conductor pairs104and110in a substantially similar manner as previously described inFIG. 1andFIG. 2.

As shown inFIG. 6A, the personal computing device500includes a unified LOM602. The unified LOM602combines the functionality of the PD controller228, as discussed inFIG. 2, and the functionality of the LOM module304, as discussed inFIG. 3, into a single unified subsystem. As such, the unified LOM602may be implemented using a single chip or die or multiple chips or dies.

A data communication is passed between the unified LOM602and the ICH module318. More specifically, the LOM module616has full duplex transmit and receive capability through differential transmit port614and differential receive port612. A transformer604couples high speed data between the first conductor pair104and the receive port612. Likewise, a second transformer606couples high speed data between the transmit port614and the second conductor pair110. The respective transformers604and606pass the high speed data to and from the unified LOM602, but isolate any low frequency or DC voltage from the sensitive transceiver data ports.

The transformer604includes primary and secondary windings, where the secondary winding (on the conductor side) includes a center tap608. Likewise, the second transformer606includes primary and secondary windings, where the secondary winding (on the conductor side) includes a center tap610. The center taps608and610supply the power for PoE carried over conductors104and110to the representative load504of the personal computing devices502, where the load504represents the dynamic power draw needed to operate personal computing devices502. A DC-DC converter230may be optionally inserted before the load504to step down the voltage as necessary to meet the voltage requirements of the personal computing devices502. Further, multiple DC-DC converters230may be arrayed in parallel to output multiple different voltages (3 volts, 5 volts, 12 volts) to supply different loads404of the personal computing devices502.

During ideal operation, a direct current (IDC)238flows from the DC power supply216through the first center tap210, and divides into a first current (I1)240and a second current (I2)242that is carried over conductor pair104. The first current (I1)240and the second current (I2)242then recombine at the center tap608to reform the direct current (IDC)238so as to power the personal computing devices502. On return, the direct current (IDC)238flows from the personal computing devices502through the second center tap610, and divides for transport over conductor pair110. The return DC current recombines at the second center tap214, and returns to the DC power supply216. As discussed above, data transmission between the power source equipment102and the personal computing devices502occurs simultaneously with the DC power supply described above. Accordingly, a first communication signal244and/or a second communication signal246are simultaneously differentially carried via the conductor pairs104and110between the power source equipment102and the personal computing devices502. It is important to note that the communication signals244and246are differential signals that ideally are not effected by the DC power transfer

FIG. 6Billustrates a more detailed figure of a unified Local Area Network(LAN)-On-Motherboard (LOM) according to an exemplary embodiment of the present invention. As shown inFIG. 6B, the unified LOM602includes a LOM616and a PD controller618. In this exemplary embodiment, the LOM616and the PD controller618are implemented on a single die or on a single chip.

It is often desirable to implement the unified LOM602using multiple dies or multiple chips by fabricating the LOM616and the PD controller618on multiple dies or within multiple chips. For example, the PD controller618may be implemented using a 100V process, whereas the LOM616may be implemented using a 10V process.

Referring back toFIG. 6B, the LOM616communicates with the PD controller618via interface650. Likewise, the PD controller618communicates with the LOM616via interface652. Those skilled in the art(s) will recognize that LOM616and the PD controller618may communicate with one another using a single or bi-directional interface without departing from the spirit and scope of the invention.

FIG. 6Cillustrates a more detailed figure of a unified Local Area Network(LAN)-On-Motherboard (LOM) according to another exemplary embodiment of the present invention. In this exemplary embodiment, the LOM616and the PD controller618are implemented on multiple dies or as multiple chips.

The LOM616communicates with the PD controller618via interface658. Likewise, the PD controller618communicates with the LOM616via interface660. Those skilled in the art(s) will recognize that LOM616and the PD controller618may communicate with one another using a single or bi-directional interface without departing from the spirit and scope of the invention.

FIG. 6Dillustrates a more detailed figure of a unified Local Area Network(LAN)-On-Motherboard (LOM) according to a further exemplary embodiment of the present invention. In this exemplary embodiment, the LOM616and the PD controller618are implemented on multiple dies or as multiple chips. In this exemplary embodiment, an optional opto-isolator620may be used to bypass an isolation boundary between the LOM616and the PD controller618. In particular, the opto-isolator620bypasses the isolation boundary by converting an input from an electrical signal to an optical signal. Then optical signal is then converted back to an electrical signal to bypass the isolation boundary.

The interface650, the interface652, the interface658, the interface660, the interface662, the interface664, the interface668, and/or the interface670, may include, but is not limited to, a physical interface and a communication protocol to govern communications between the LOM616and the PD controller618. The physical interface may be implemented as a serial interface and may be governed by, but is not limited to, 1-Wire, HyperTransport, Inter-Integrated Circuit (I2C) Bus, PCI Express (PCIe), Serial Peripheral Interface (SPI) Bus, Universal Serial Bus (USB), FireWire i.Link or IEEE 1394, or any other suitable serial communication protocol to provide some examples. Alternatively, the physical interface may be implemented as a parallel interface and may be governed by, but is not limited to, Extended ISA or EISA, Industry Standard Architecture (ISA), Low Pin Count (LPC), MicroChannel (MCA), MBus, Multibus, NuBus or IEEE 1196, Peripheral Component Interconnect (PCI), S-100 bus or IEEE 696, SBus or IEEE 1496 VESA Local Bus (VLB), VMEbus, the VERSA module Eurocard bus or any other suitable parallel communication protocol to provide some examples.

In addition to the various serial and parallel architectures, the physical interface (for interfaces650,652,658,660,662,664,668,670) is voltage and frequency agnostic. In other words, any suitable voltage level or signal frequency can be used for the physical interface, based on the specific application at hand. For example, low voltages can be used on the physical interface for low power applications. Additionally, the signal frequency of the physical interface can be increased or decreased to accommodate higher or lower bandwidth and data rate requirements for the interface. Additionally, various and differing messaging protocols can be used for the communications protocol.

Providing a compatible physical interface between the LOM616and the PD controller618and a compatible communication protocol to govern the communication between the LOM616and the PD controller618allows for the seamless integration of the LOM616and the PD controller618into a single unified subsystem. For example, a LOM616having an I2C serial interface may communicate with any suitable PD controller618capable of receiving communications over the I2C serial interface. This allows for the LOM616to be integrated with any PD controller618so long as the physical interface and the communication protocol are also compatible. In other words, so long as the physical interface between the LOM616and the PD controller618and the communication protocol to govern the communication between the LOM616and the PD controller618are compatible, the LOM616can be mixed and matched with any PD controller618. Similarly, a PD controller618having an I2C serial interface may communicate with any suitable LOM616capable of receiving communications over the I2C serial interface. This allows for the PD controller618to be integrated with any LOM616so long as the physical interface and the communication protocol are also compatible. In other words, so long as the physical interface between the PD controller618and the LOM616and the communication protocol to govern the communication between the PD controller618and the LOM616are compatible, the PD controller618can be mixed and matched with any LOM616.

Stated another way, the LOM/PD interface described herein is capable of providing a universal or standard interface that enables a single platform for various combinations of LOM and PD devices that can be married around the universal LOM/PD interface. Accordingly, Original Equipment Manufactures (OEMs) can offer multiple product lines having several variations of PoE capabilities around a common LOM, or several variations of LOM/PC capabilities around a common PD, with minimal impact on the software or hardware designs because the interface would be standard. For example, products with multi-power level PoE support could be offered for a common LOM/PC, or multiple LOM/PC variations (WLAN, 10 G Ethernet, etc.) could be offered for a common PD. Accordingly, the standard interface enables OEMs to economically leverage their existing system architectures and offer several product variations for different market segments, all built around the standard LOM/PD interface.

Referring back toFIG. 6A, the unified LOM602may be viewed as a single unified subsystem including the LOM module616and the PD controller618. As such, the unified LOM602seamlessly integrates PoE into a personal computing device by managing PoE through existing structure of the personal computing device, such as software drivers and Access Protocol Interfaces (API), to provide some examples. In other words, the LOM602includes programmable registers and messages that may be read using existing software drivers and Access Protocol Interfaces of the personal computing device, thereby eliminating a need to develop new drivers and APIs.

As discussed inFIG. 2, the PD controller228monitors the voltage and current on the PD side of the PoE configuration and provides the necessary impedance signatures during initialization. Similarly, the unified LOM602monitors operational parameters, such as the voltage and the current of the personal computing device and provides the necessary impedance signatures during initialization, so that the PSE controller218will recognize the personal computing device as a valid PoE device, and be able to classify its power requirements.

FIG. 7illustrates a more detailed figure of the power transfer from a power source equipment (PSE) to a laptop computing device (LCD) according to an exemplary embodiment of the present invention. More specifically,FIG. 7provides a more detailed circuit diagram of the PoE system500, where the power source equipment102provides PoE and data communications to a laptop computing device (LCD)702over conductor pairs104and110. In this exemplary embodiment, the power source equipment102provides PoE and data over conductor pairs104and110in a substantially similar manner as previously described inFIG. 1andFIG. 2.

As shown inFIG. 7, the laptop computing device702includes a unified LOM712. Unified LOM712operates in a substantially similar manner as the unified LOM602. The operation and implementation of the unified LOM712is previously described above inFIG. 6AthroughFIG. 6C. The LCD702also includes a PoE power module704. The PoE power module704can include, for example, a power regulator706, a power source selector708, and a battery charger710. The power regulator706may be optionally inserted before the load504to step down the voltage as necessary to meet the voltage requirements of the LCD702. Further, multiple power regulators706may be arrayed in parallel to output multiple different voltages (3 volts, 5 volts, 12 volts) to supply different loads504to the LCD702. Power, such as the direct current (IDC)238, can be delivered to the battery charger710within the PoE power module704, in order to charge a battery, for example.

FIG. 8illustrates a Power over Ethernet (PoE) configuration in a computing environment, according to an exemplary embodiment of the present invention. A computing environment800includes personal computing devices802.1through802.n, hereinafter referred to as the personal computing devices802, and the powered devices402. Computing environment800can be a conference room, for example, or any other environment in which the personal computing devices802are networked. The personal computing devices802include any suitable device, such as a the personal computing device (PCD)502, the laptop computing device (LCD)702, or any other suitable device that receives power for PoE and for data communications over a communications link.

As shown inFIG. 8, a power supply806provides power for PoE and for data communications to the personal computing devices802and to the powered devices402via a network switch804. The network switch804may be any networking switch that is capable of providing PoE and data communications to the personal computing devices and/or the powered devices. The network switch804includes one or more data ports to provide PoE and data communications to the personal computing devices and/or the powered devices. The network switch804may have as little as two data ports or as many as 400 or more data ports.

The network switch provides power for PoE and for data communications to the personal computing devices802through a corresponding interface850.1through850.n, hereinafter referred to as the interface850. Those skilled in the art(s) will recognize that the interface850may include any communication link that can handle PoE, such as various types of Ethernet cabling, for example. Similarly, the network switch804provides PoE and data communications to the powered devices402through the interface452.

CONCLUSION