Current sensing circuitry for DC-DC converters

An inductor based DC-DC converter of the present invention employs two power switches such that only a fraction of inductor current flows through sensing circuitry. The sensing circuitry itself is comprised of sense transistors instead of resistors in order to further reduce power dissipation and temperature variations. The sensing circuitry includes a differential power supply that modifies a sense current employed as feedback to one of its inputs. The sense transistors are selected and configured such that the sense current is a relatively constant fraction of the inductor current of the converter.

FIELD OF THE INVENTION

The present invention relates generally to power conversion, and more particularly, to systems and methods for sensing inductor current in current mode DC-DC converters.

BACKGROUND OF THE INVENTION

DC-DC converters are widely employed in devices of today to perform power conversion. Generally, DC-DC converters receive a nominal voltage from a power source, such as a battery, and provide a regulated output voltage at one or more voltage levels. Some important operational characteristics of DC-DC converters include efficiency, response, load regulation, voltage regulation, and the like. A variety of converters and topologies can be employed to perform this power conversion. For example, buck converters, boost converters, and buck boost converters are three basic types of power supply converter technologies.

Another type of converter that is widely used in electronic devices, particularly portable electronic devices, is a current mode DC-DC converter, which has relatively high efficiency and increases battery charging cycles. The current mode DC-DC converter employs an LC output filter that operates as a loose tolerance, voltage controlled current source. For this type of converter, inductor current is utilized as feedback to generate a voltage ramp that is fed to a pulse width modulation (PWM) controller. From this feedback, the PWM controller more precisely regulates the output voltage.

One problem of current mode DC-DC converters is that they are not as efficient as desired. Portable devices of today demand and require a highly efficient converter in order to reduce power consumption and improve battery life. Improvements in output voltage control are also desirable. Accordingly, a current mode DC-DC converter that has improved power efficiency and/or output voltage control is desired.

SUMMARY OF THE INVENTION

The present invention facilitates DC-DC power conversion by providing systems and methods for power converters that controllably provide selected output voltages while mitigating power loss and being relatively less sensitive to temperature changes than conventional DC-DC power converters. The power loss is mitigated by employing sense transistor devices, also referred to as sense switches, in place of sense resistors and by reducing the amount of current flowing through the transistor devices. Furthermore, the sense transistor devices are more resistant to current and/or resistance fluctuations as a result of temperature changes than conventional sense resistors.

An inductor based DC-DC converter of the present invention employs two power switches such that only a fraction of inductor current flows through sensing circuitry. The sensing circuitry itself is comprised of sense transistors instead of resistors in order to further reduce power dissipation and temperature variations. The sensing circuitry includes a differential power supply that modifies a sense current employed as feedback to one of its inputs. The sense transistors are selected and configured such that the sense current is a relatively constant fraction of the converter inductor current.

DETAILED DESCRIPTION OF THE INVENTION

The present invention will now be described with respect to the accompanying drawings in which like numbered elements represent like parts. The figures provided herewith and the accompanying description of the figures are merely provided for illustrative purposes. One of ordinary skill in the art should realize, based on the instant description, other implementations and methods for fabricating the devices and structures illustrated in the figures and in the following description.

The present invention facilitates DC-DC power conversion by providing systems and methods for power converters that controllably provide selected output voltages while mitigating power loss and being relatively less sensitive to temperature changes than conventional DC-DC power converters. The power loss is mitigated by employing sense transistor devices, also referred to as sense switches, in place of sense resistors and by reducing the amount of current flowing through the sense transistor devices. Furthermore, the sense transistor devices are more resistant to current and/or resistance fluctuations as a result of temperature changes than conventional sense resistors, which permits greater control of output power and voltage.

An inductor based DC-DC converter of the present invention employs power switches such that only a fraction of inductor current flows through sensing circuitry. The sensing circuitry is comprised of sense transistors instead of resistors in order to further reduce power dissipation and temperature variations. The sensing circuitry includes a differential power supply that modifies a sense current employed as feedback to one of its inputs. The sense transistors are selected and configured such that the sense current is a relatively constant fraction of the converter inductor current.

FIG. 1is a block diagram illustrating a current mode DC-DC converter in accordance with an aspect of the present invention. The converter includes a pulse width modulation (PWM) controller102, an inductor based power stage104, a current scaler106, and a voltage ramp generator108.

The PWM controller102generates a control signal having a selected duty cycle and, therefore, a desired output voltage range for the converter, in response to a received voltage ramp signal (VRAMP). The control signal is received by the power stage104, which controllably generates and provides an output voltage and current to a load (not shown).

As stated above, the power stage104is inductor based and has an inductor current (I_BOOST) associated therewith that varies according to the load's power consumption, desired output voltage, and operation of the power stage104. The inductor current is received by a current scaler106that reduces power loss by sensing a portion of the inductor current and generating a sense current (I_SENSE) that is proportional to the inductor current. The current scaler106employs a number of sense switches/transistors and feedback in order to generate the sense current instead of the conventional approach of utilizing sense resistor(s). The voltage ramp generator108receives the sense current and generates the voltage ramp signal (VRAMP) according to the received sense current.

Generally, the PWM controller102compares the VRAMP signal to a threshold value in order to modify a duty cycle for the power stage104. In one example of the present invention, if the VRAMP signal rises above a threshold voltage, indicating that output voltage has reached a peak level, the PWM controller turns ON one or more power switches within the power stage104thereby reducing the output voltage.

FIG. 2is a schematic diagram illustrating a conventional current mode boost DC-DC converter. This type of converter employs an LC output filter that operates as a loose tolerance, voltage controlled current source. For this type of converter, inductor current (I_BOOST) generates a voltage drop across a sense resistor. The voltage drop is then employed to generate a voltage ramp that is fed to a pulse width modulation (PWM) controller, which operates at a fixed frequency and varied duty cycle to permit the converter to provide a controlled output voltage by regulating the inductor current.

The converter includes a PWM controller202, a driver204, a power switch206, a first resistor208, a second resistor210, a third resistor212, an amplifier214, an inductor216, a diode218, and a filter capacitor220. The first resistor208, the second resistor210, and the third resistor212are also referred to as sense resistors. A control output of the PWM controller202is connected to an input terminal of the driver204. An output terminal of the driver204is connected to a gate of the power switch206. A drain of the power switch206is connected to a switching boost (SW_BOOST) node. A source of the power switch is connected to a first terminal of the first resistor208that is also connected to a first terminal of the second resistor210. A second terminal of the first resistor208is connected to a switching VSS (SW_VSS) node, which is also connected to a first terminal of the third resistor212. A second terminal of the second resistor210is connected to a positive input of the amplifier214and a second terminal of the third resistor212is connected to a negative input of the amplifier214. An output of the amplifier214is connected to a voltage ramp input of the PWM controller202.

A first terminal of the inductor216is connected to a VDD voltage source and a second terminal of the inductor216is connected to the switching boost (SW_BOOST) node. A drain of the power switch206and a first terminal of the diode218are also connected to the SW_BOOST node. A second terminal of the diode218is connected to an output node (VBOOST) that provides an output voltage and current to the load. The second terminal of the diode218is also connected to a positive terminal of the filter capacitor220and a negative terminal of the filter capacitor220is connected to ground.

During normal operation, the PWM controller202controls the driver204, which in turn regulates operation of the power switch206. Inductor current flows through the inductor216and a portion of that (I_BOOST) controllably flows through the power switch206according to the voltage applied at the gate of the power switch. Another portion of the inductor current can flow through the diode218during portions of the power cycle. The filter capacitor220can remove AC components from the VBOOST voltage.

The first resistor208, also referred to as a sense resistor, is selected to have a relatively small resistance value (e.g., 0.1 ohm). The first resistor208is in series with the power switch206and, as a result, also has the I_BOOST current flowing through it. A voltage drop (DELT_V) then occurs across the first resistor that is equal to the resistance value times I_BOOST. The DELT_V voltage is then applied to the positive and negative inputs of the amplifier214, which in turn generates the VRAMP signal as a consequence. The PWM controller202then receives the VRAMP signal and adjusts its control of the driver204accordingly.

The inventor of the present invention appreciates that there are problems with the converter ofFIG. 2. One problem is that there is efficiency loss due to the first resistor or sense resistor208, which effectively increases the on resistance of the power switch. Another problem is that variation of the resistance of the first resistor can introduce error to the sensed voltage DELT_V for a given inductor current. This error can substantially shift a current limit threshold if the current limit is based on monitoring the DELT_V voltage. Generally, in integrated circuits, the first resistor208is fabricated with metal materials, which typically have about a 10% process variation and a temperature coefficient greater than about 4000 ppm. The combined effect can cause the resistance of the first resistor208to change more than 100% from its lowest value to its highest value. Furthermore, fabrication of the metal resistor on an integrated circuit consumes a relatively large area of space compared to transistor devices.

FIG. 3is a schematic diagram illustrating another conventional current mode boost DC-DC converter. This type of converter employs an LC output filter that operates as a loose tolerance, voltage controlled current source. For this type of converter, inductor current is again employed to generate a voltage ramp that is fed to a pulse width modulation (PWM) controller, which operates at a fixed frequency and varied duty cycle to permit the converter to provide a controlled output voltage. The converter ofFIG. 3is different from the converter ofFIG. 2in that it employs an extra power switch.

The converter includes a PWM controller302, a driver304, a first power switch306, a second power switch307, a first resistor308, a second resistor310, a third resistor312, an amplifier314, an inductor316, a diode318, and a filter capacitor320. A control output of the PWM controller302is connected to an input terminal of the driver304. An output terminal of the driver304is connected to a gate of the first power switch306and a gate of the second power switch307. A drain of the first power switch306and a drain of the second power switch307are connected to a switching boost (SW_BOOST) node. A source of the first power switch306is connected to a first terminal of the first resistor308that is also connected to a first terminal of the second resistor310. A second terminal of the first resistor308and a source of the second power switch307are connected to a switching VSS node (SW_VSS), which is also connected to a first terminal of the third resistor312. A second terminal of the second resistor310is connected to a positive input of the amplifier314and a second terminal of the third resistor312is connected to a negative input of the amplifier314. An output of the amplifier314is connected to a voltage ramp input of the PWM controller.

A first terminal of the inductor316is connected to a VDD voltage source and a second terminal of the inductor316is connected to a switching boost (SW_BOOST) node. A drain of the power switch306and a first terminal of the diode318are also connected to the SW_BOOST node. A second terminal of the diode318is connected to an output node (VBOOST) that provides an output voltage and current to the load. The second terminal of the diode318is also connected to a positive terminal of the filter capacitor320and a negative terminal of the filter capacitor320is connected to ground.

During normal operation, the PWM controller302controls the driver304, which in turn regulates operation of the first power switch306and the second power switch307. Inductor current flows through the inductor and a portion of that (I_BOOST) controllably flows through the first power switch306according to the voltage applied at the gate of the first power switch306and the sizes of the first power switch306, the second power switch307, and the first resistor308, respectively. The I_BOOST current is relatively small, compared to that inFIG. 2, because a substantial portion of the inductor current flows through the second power switch307. Another portion of the inductor current can flow through the diode318during portions of the power cycle. The filter capacitor320can remove AC components from the VBOOST voltage.

The first resistor308, also referred to as a sense resistor, is selected to have a relatively small resistance value (e.g., 0.1 ohm). The first resistor308is in series with the first power switch306and, as a result, also has the I_BOOST current flowing through it. A voltage drop (DELT_V) then occurs across the first resistor that is equal to the resistance value times I_BOOST. The DELT_V voltage is then applied to the positive and negative inputs of the amplifier314, which in turn generates the VRAMP signal as a consequence. The PWM controller302then receives the VRAMP signal and adjusts its control of the driver304accordingly.

The voltage drop across the second power switch307is equal to the voltage drop across the first power switch306and the DELT_V voltage. However, the first power switch306is sized to be significantly smaller than the second power switch307. As a result, during normal operation and with an appropriately sized first power switch306, the voltage drop across the second switch307is approximately equal to the DELT_V voltage across the first resistor308. The first power switch306applies the voltage drop to the first resistor308.

The approach of prior artFIG. 3does mitigate some of the power loss associated with the converter of prior artFIG. 2. However, the inventor of the present invention appreciates that there are problems with this converter. One problem encountered, as with the converter ofFIG. 2, is that variation of the resistance of the first resistor can introduce error to the sensed voltage DELT_V for a given inductor current. This error can substantially shift a current limit threshold if the current limit is based on monitoring the DELT_V voltage. Furthermore, for integrated circuits, the first resistor is typically fabricated with metal materials, which generally have about a 10% process variation and a temperature coefficient greater than about 4000 ppm. The combined effect can cause resistance of the first resistor308to change more than 100% from its lowest value to its highest value. Fabrication of the metal resistor on an integrated circuit consumes a relatively large area of space compared to transistor devices. Additionally, the DELT_V voltage is also dependent on the voltage drop across the second power switch307, which is a function of the resistance of the second power switch307. However, the resistance across the second power switch307is typically even greater than that of the first resistor308. For example, the resistance across the second power switch307can vary by as much as 500% from its lowest to highest value.

FIGS. 4A and 4Billustrate examples of the VRAMP voltage and I_BOOST current for the conventional converters ofFIGS. 2 and 3.FIG. 4Adepicts I_BOOST over time andFIG. 4Bdepicts VRAMP over time. It can be seen that VRAMP is functionally related to I_BOOST. When the power switch(es) are off, I_BOOST drops to about zero as does the DELT_V voltage. Accordingly, the VRAMP drops to about zero. When the power switch(es) are ON, I_BOOST gradually increases, which results in the DELT_V voltage increasing and, correspondingly, increases VRAMP.

FIG. 5is a diagram illustrating a current mode boost DC-DC converter in accordance with an aspect of the present invention. The converter mitigates power consumption and facilitates power output control and employs an LC output filter that operates as a loose tolerance, voltage controlled current source. A sense current is obtained from the inductor current and is then employed to generate a voltage ramp that is fed to a pulse width modulation (PWM) controller. The PWM controller operates at a fixed frequency and varied duty cycle to permit the converter to provide a controlled output voltage.

The converter includes a PWM controller502, a driver504, a first power switch506, a second power switch507, a first sense switch508, a second sense switch510, a third sense switch512, a fourth sense switch524, an amplifier514, an inductor516, a diode518, a filter capacitor520, and a voltage ramp generator component522. A control output of the PWM controller502is connected to an input terminal of the driver504. An output terminal of the driver504is connected to a gate of the first power switch506and a gate of the second power switch507. A drain of the first power switch506and a drain of the second power switch507are connected to a switching boost (SW_BOOST) node. A source of the first power switch506is connected to a first terminal of the first sense switch508, which is also connected to a first terminal of the second sense switch510. A second terminal of the first sense switch508and a source of the second power switch507are connected to a switching VSS (SW_VSS) node, which is also connected to a first terminal of the third sense switch512. The SW_VSS node is at a lower potential than VDD and can be at ground in some aspects of the invention. A second terminal of the second switch510is connected to a positive input of the amplifier514and a second terminal of the third resistor512is connected to a negative input of the amplifier514. An output of the amplifier514is connected to a gate of the fourth sense switch524. A source of the fourth sense switch524is connected to the voltage ramp generator522, which generates a voltage ramp (VRAMP) signal. The fourth sense switch524generates an I_SENSE current according to a differential signal from the amplifier. The second terminal of the third switch512receives this I_SENSE current from the fourth sense switch524. The PWM controller502receives the VRAMP voltage from the voltage ramp generator522.

A first terminal of the inductor516is connected to a VDD voltage source and a second terminal of the inductor516is connected to a switching boost (SW_BOOST) node. A drain of the power switch506and a first terminal of the diode518are also connected to the SW_BOOST node. A second terminal of the diode518is connected to an output node (VBOOST) that provides an output voltage and current to the load. The second terminal of the diode518is also connected to a positive terminal of the filter capacitor520and a negative terminal of the filter capacitor520is connected to ground.

During normal operation, the PWM controller502controls the driver504, which in turn regulates operation of the first power switch506and the second power switch507. The PWM controller502causes the power switches506and507to be turned ON for a percentage of a cycle, also referred to as the duty cycle. The duty cycle can vary as a result of the VRAMP voltage or signal that is fed back to the PWM controller. The PWM controller502determines whether or not the inductor current should be turned ON or OFF, for example, by comparing the VRAMP signal to a threshold value. The controller502accomplishes this by controlling the power switched506and507.

Inductor current flows through the inductor and a substantial portion of that (I_BOOST) controllably flows through the second power switch507according to the voltage applied at the gate of the first power switch506and the sizes of the first power switch506, the second power switch507, and the first sense switch508. Current flowing through the first power switch506is relatively small because a substantial portion of the inductor current flows through the second power switch507. Another portion of the inductor current can flow through the diode518during portions of the power cycle. The filter capacitor520can remove AC components from the VBOOST voltage.

The first, second, and third sense switches508,510, and512are permanently turned on by connecting their gates to VDD as illustrated, which also supplies power to the inductor516. When the first and second power switches506and507are ON, a portion of the inductor current generates a voltage drop Vds across the second power switch507. By sizing the first power switch506to be sufficiently larger than the first sense switch508, the voltage drop Vds is substantially across the first sense switch508. Because of its size, there will be a relatively small voltage drop across the first power switch506. As a result, the voltage drop across the first sense switch508, referred to as DELT_V, is approximately equal to the voltage drop Vds across the second power switch507.

The differential amplifier514causes the fourth sense switch524to generate and/or vary the I_SENSE current to return as feedback to the third sense switch512. The I_SENSE current fluctuates so as to provide a voltage drop across the third sense switch512about equal to the DELT_V voltage because the differential amplifier514tends towards having the same voltage at both its positive and negative inputs. It is noted that current flowing through the first power switch506would be substantially equal to I_SENSE if the first sense switch508is the same size as the third sense switch512. Otherwise, I_SENSE is proportional to the current flowing through the first switch. The I_SENSE current is, essentially, a scaled version of the current flowing through the second power switch507, referred to as I_BOOST. This scaling of I_BOOST and I_SENSE is a function of the size of the first power switch506, the second power switch507, the first sense switch508, and the third sense switch512.

As an example of this functional relationship, assume that the third sense switch512is of unit size and the first sense switch508is K times unit size. The first power switch is M times the unit size and the second power switch is N times unit size. If the resistance across the third sense switch512is R, then the resistance across the third first switch508is R/K, the first power switch506is R/M, and the second power switch507is R/N. The voltage across the third sense switch512, DELT_V, is equal to current through the third sense switch508(I_SENSE) times the resistance R. From above, the voltage across the first sense switch508is also approximately DELT_V, which is equal to I_SENSE times R times K. The voltage drop across the second power switch507, Vds, is I_BOOST times R/N, which equals the voltage drop across the first power switch506and the voltage drop across the first sense switch508. The voltage drop across the first power switch506is equal to I_SENSE times K (the current flowing through the first power switch506and the first sense switch508) times R/M. As a result, we obtain the following equation for Vds.
Vds=I_BOOST*R/N(1)
Vds=(I_SENSE*K*R/M)+(I_SENSE*R*K)  (2)
And;
DELT—V=R/K/(R/K+R/M)=M/(K+M)*Vds(3)

Which results in a current scaling ratio of:
I_SENSE/I_BOOST=M/(N*(M+K))=1/N*(M/(M+K))  (6)

If the first power switch506is sized sufficiently larger than the first sense switch508, M/(M+K) is approximately 1 resulting in:
I_SENSE=I_BOOST/N(7)
and
I_SENSE/I_BOOST=1/N(8)

As a result, the I_SENSE current is a relatively constant fraction of the inductor current, I_BOOST, independent of process and/or temperature variations. It is appreciated that some error can be introduced by mismatch between the third sense switch512and the second power switch507, particularly when the ration N is in the order of several hundreds or thousands. The converter ofFIG. 5is thusly able to generate a scaled down version of the inductor current substantially independent of process and/or temperature, unlike conventional DC-DC converters, such as shown inFIGS. 2 and 3, that employ a voltage that varies with process and temperature.

The voltage ramp generator522operates as a current source for the fourth sense switch524and generates a voltage based voltage ramp signal (VRAMP) as a function of the I_SENSE current. The operation of the voltage ramp generator522according to one example is further described with respect toFIG. 6. The PWM controller502then receives the VRAMP signal and adjusts its control of the driver504accordingly.

Turning now toFIG. 6, a schematic diagram illustrating a detailed portion of the converter ofFIG. 5in accordance with an aspect of the present invention is provided.FIG. 6and the following description provide additional details of a suitable voltage ramp generator that can be employed with the converter ofFIG. 5.

The voltage ramp generator522includes a first resistor526and a second resistor528. A first terminal of the second resistor528is connected to a reference voltage (VREF) and a second terminal of the second resistor528is connected to the source of the fourth sense switch524. During operation, I_SENSE flows through the second resistor528resulting in a voltage at its second terminal of VREF−(I_SENSE*R2), where R2is the resistance of the second resistor528. This voltage is provided as the VRAMP signal to the PWM controller502. It is noted that the VRAMP signal is inverted from conventional VRAMP signals. The voltage ramp generator522can include an inverter that inverts the VRAMP signal or the PWM controller502can be configured to accept this inverted signal. It is noted that other variations of the voltage ramp generator522can comprise only the second resistor528and operate without other components.

Typically, the second resistor528is comprised of polysilicon and formed via a conventional CMOS process. As a result, the second resistor528typically has a smaller or much smaller temperature coefficient than metal resistors employed in conventional DC-DC converters (see,FIGS. 2 and 3).

The first resistor526facilitates limiting inductor current during operation of the converter. A first terminal of the first resistor526is also connected to the reference voltage (VREF) and a second terminal is connected to a threshold voltage (VTH). The threshold voltage (VTH) is at a value less than the reference voltage (VREF) due to a constant reference current (IREF) that is pulled through the first resistor526, wherein the reference current (IREF) is equal to (VREF−VTH)/R1, where R1is the resistance of the first resistor526. As a consequence, if R1=R2, then the peak I_BOOST current is equal to IREF*N. Thus, selection of IREF can be employed to set a peak current limit for the inductor current.

FIGS. 7A,7B,8A, and8B, discussed below, illustrate operational simulations of a conventional current mode DC-DC converter and a current mode DC-DC converter of the present invention. For each converter, three simulations were performed at varied temperatures.FIGS. 7A and 7Billustrate VRAMP voltage and I_BOOST current values, respectively, for a conventional current mode DC-DC converter, such as the converter ofFIG. 3. Values employed in the simulations forFIGS. 7A and 7Binclude setting the power switches (306and307) to always ON and the first resistor308to a 0.1 ohm metal resistor with a metal width of 120 um for electro-migration issues.FIG. 7Ashows 3 simulations in which the temperature was varied. Line701is a simulation at low temperature where the resistance of the first resistor308is low, line702is a simulation at a normal temperature with a normal resistance, and line703is a simulation at a relatively high temperature with an increased resistance. Ideally, the change in temperature would have no effect. However, the conventional converter ofFIG. 7Aresults in about 250 mili-volts in change for this simulation.FIG. 7Billustrates the inductor current (I_BOOST) which is about the same for each of the three simulations.

FIGS. 8A and 8Billustrate VRAMP voltage and I_BOOST current values, respectively, for a current mode DC-DC converter in accordance with an aspect of the present invention, such as the converter ofFIG. 5. Values employed in the simulations forFIGS. 8A and 8Binclude setting the power switches (506and507) to always ON. Current (I_BOOST) to the second power switch507is scaled by transistor values for the first sense switch508and the third sense switch512to obtain I_SENSE, which is converted to a voltage by the first resistor526.FIG. 8Ashows 3 simulations in which the temperature was varied. Line801is a simulation at low temperature where the resistance of the first resistor308is low, line802is a simulation at a normal temperature with a normal resistance, and line803is a simulation at a relatively high temperature with an increased resistance. However, this converter results in about 120 milli-volts in change for this simulation, as opposed to the 250 milli-volts of the conventional converter.FIG. 8Billustrates the inductor current (I_BOOST), which is about the same for each of the three simulations.

In view of the foregoing structural and functional features described supra inFIGS. 1–8B, methodologies in accordance with various aspects of the present invention will be better appreciated with reference to the above figures. While, for purposes of simplicity of explanation, the methodology and variations thereof described below are depicted and described as executing serially, it is to be understood and appreciated that the present invention is not limited by the illustrated order, as some aspects could, in accordance with the present invention, occur in different orders and/or concurrently with other aspects from that depicted and described herein. Moreover, not all illustrated features may be required to implement a methodology in accordance with an aspect the present invention.

FIG. 9is a flow diagram illustrating a method of operating a DC-DC converter in accordance with an aspect of the present invention. The converter is a current mode DC-DC converter that employs an LC filter. The method mitigates power consumption and facilitates current and voltage output control of the converter by sensing inductor current without employing a resistor to obtain the sensed current.

The method begins at block902, where a power source (e.g., a battery) is supplied to an inductor. Typically, a first terminal of the inductor is connected to VDD and a second terminal is connected to a power switch and a load via a diode. As a result of power being supplied to the inductor, inductor current is generated at block904. Variations in the inductor current affect an output voltage supplied to the load. A down scaled version of the inductor current, referred to as sense current, is obtained at block906. The sense current is obtained by using a number of power switches and sense switches that operate similar to a current mirror as is described supra with respect toFIG. 5. The sense current is substantially a constant fraction of the inductor current. A sense transistor/switch whose gate is connected to an output of a differential amplifier generates or supplies the sense current, which is fed back to an input of the differential amplifier. The amplifier causes the sense current to increase or decrease in order to equalize the voltage across its inputs.

The sense current is converted into a voltage ramp signal at block908. Typically, a resistor connected to a reference voltage is connected to a source of the sense transistor above. The voltage drop across the resistor permits a voltage ramp signal to be obtained from the source of the sense transistor. The voltage ramp signal may, in some aspects of the invention, then be inverted. Additionally, in another alternate aspect of the invention, the inductor current is limited to a selected peak value.

A power controller operates power switches according to the voltage ramp signal to control the inductor current and provide an output voltage at block910. There are typically two power switches, as described with respect toFIG. 5. The controller generally creates a control signal that drives the power switches to controllably supply power from the inductor. Typically, the power controller signals a driver component that drives gates of the power switches. The switches modify the inductor current and, therefore, the output voltage provided.

Although the invention has been shown and described with respect to a certain aspect or various aspects, it is obvious that equivalent alterations and modifications will occur to others skilled in the art upon the reading and understanding of this specification and the annexed drawings. In particular regard to the various functions performed by the above described components (assemblies, devices, circuits, etc.), the terms (including a reference to a “means”) used to describe such components are intended to correspond, unless otherwise indicated, to any component which performs the specified function of the described component (i.e., that is functionally equivalent), even though not structurally equivalent to the disclosed structure which performs the function in the herein illustrated exemplary embodiments of the invention. In addition, while a particular feature of the invention may have been disclosed with respect to only one of several aspects of the invention, such feature may be combined with one or more other features of the other aspects as may be desired and advantageous for any given or particular application. Furthermore, to the extent that the term “includes” is used in either the detailed description or the claims, such term is intended to be inclusive in a manner similar to the term “comprising.”