Apparatus and method for testing computer

An apparatus for testing a computer includes a control module having a power cycling test program and a display driving program therein, a switch module connected to the control module for receiving trigger signals generated from the power cycling test program and powering on or off the computer consequently, a driving module connected to the control module for receiving display driving signals from the display driving program, and a display module connected to the driving module for displaying test parameters. A method utilizing above described apparatus for testing the computer is also disclosed.

BACKGROUND

1. Technical Field

The present invention generally relates to an apparatus and method for testing a computer.

2. Description of Related Art

After a computer is produced, a power cycling test is required. The power cycling test is performed for a predetermined number of test cycles. In one test cycle, the computer is powered on and then powered off. A typical test procedure includes manually operating the power button of the computer repeatedly. However, manually testing the computer in a computer production line is inefficient and a waste of manpower.

An attempt to test the computers efficiently uses a mechanical arm to automatically activate a power switch of the computer. The mechanical arm periodically and repeatedly turns the computer on or off to test if the computer passes the power cycling test. However, since the atmospheric pressure acting on a piston of the mechanical arm is not constant, the mechanical arm is not a reliable apparatus to test the computer.

What is needed, therefore, is an apparatus and method for testing a computer to overcome the above-described shortcoming.

DETAILED DESCRIPTION OF THE EMBODIMENTS

Referring toFIG. 1, an apparatus for testing a computer includes a control module10, a driving module20, a display module30, a power module40for the control module10, and a switch module50. The control module10is configured to send trigger signals to the switch module50to periodically switch the switch module50on or off. The switch module50is configured to power the computer on or off according to the trigger signals during power cycling. Test parameters, such as cycle time and cycle number, may be displayed by the display module30. The driving module20is configured to drive the display module30to show the test parameters.

Referring toFIG. 2, the control module includes a microcontroller102. In one embodiment, the microcontroller102is an ATMEGA16 chip which has a16kilobyte in-system programmable flash. The microcontroller102has a power cycling test program, a display driving program, and a key-scan program. A crystal oscillator circuit104has a port X1and a port X2connected to an X1pin and an X2pin of the microcontroller102to provide clock signals to the microcontroller102. An in-system programmable connector106is connected to the microcontroller102to facilitate burn procedures to the microcontroller102. A diode D1is connected to a PD7pin of the microcontroller102to indicate if the microcontroller102is operating.

A first key switch K1is connected to a PB0pin of the microcontroller102to start or stop the microcontroller102after it is triggered. A second key switch K2connects to a PB1pin of the microcontroller102for setting one of the test parameters after it is triggered. For example, if the key switch K2is actuated to set the cycle time, the cycle time can be shown on the display module30. If the second key switch K2is actuated again to set the cycle number, the cycle number can be shown on the display module30instead of the cycle time. A third key switch K3connects to a PB2pin of the microcontroller102to increase a value of one of the test parameters. A fourth key switch K4is connected to a PB3pin of the microcontroller102to decrease a value of one of the test parameters. For example, if the cycle time is set and shown on the display module30as an initialization value of 500 seconds, the cycle time may be changed to 501 seconds after the third key switch K3is triggered once or may be changed to 409 seconds after the fourth key switch K4is triggered once. The third key switch K3or the fourth key switch K4can be triggered repeatedly to increase or decrease the cycle time to execute different power cycling tests.

The driving module20includes transistors Q1, Q2, Q3, Q4. A base terminal of the transistor Q1is connected to pin PA4of the microcontroller102. A base terminal of the transistor Q2is connected to pin PA5of the microcontroller102. A base terminal of the transistor Q3is connected to pin PA6of the microcontroller102. A base terminal of the transistor Q4is connected to pin PA7of the microcontroller102. Emitting terminals of the transistors Q1, Q2, Q3, Q4are connected to ground. Collector terminals of the transistors Q1, Q2, Q3, Q4are connected to the display module30.

The display module30includes four seven-segment display LEDs1-4each having a pin a connected to the pin PC0of the microcontroller102, a pin b connected to the pin PC1of the microcontroller102, a pin c connected to the pin PC2of the microcontroller102, a pin d connected to the pin PC3of the microcontroller102, a pin e connected to the pin PC4of the microcontroller102, a pin f connected to the pin PC5of the microcontroller102, and a pin g connected to the pin PC6of the microcontroller102. A pin1of the display module30connects to the collecting terminal of the transistor Q1. A pin2of the display module30connects to the collecting terminal of the transistor Q2. A pin3of the display module30connects to the collecting terminal of the transistor Q3. A pin4of the display module30connects to the collecting terminal of the transistor Q4.

Referring toFIG. 3, the power module40includes capacitors C3, C4to regulate power output to the microcontroller102. The switch module50includes a diode D2, a transistor Q5, and an optoelectron coupled devices B. An anode of the diode D2connects to a pin PA3of the microcontroller102, and a cathode of the diode D2connects to a base terminal of the transistor Q5. An emitting terminal of the transistor Q5connects to ground. A collector terminal of the transistor Q5connects to the optoelectron coupled device B. The optoelectron coupled device B includes a diode and a transistor connecting to a power connector of the computer to power the computer on or off according to the power cycling test program.

Referring toFIG. 4is a method utilizing the above described apparatus for testing the computer. Depending on the embodiment, certain of the steps described below may be removed, others may be added, and the sequence of steps may be altered.

S01: triggering the key switch K1;

S02: executing the power cycling test program, display driving program, and the key-scan program in the microcontroller102;

S03: transmitting trigger signals generated by the power cycling test program to the switch module50from the pin PA3of the microcontroller102; the optoelectron coupled device B of the switch module50powering the computer on or off;

S04: transmitting display driving signals to the driving module20and the display module30to show one of the test parameters which is currently enabled;

S05: detecting if the key switch K1is triggered;

S06: if the key switch K1is not triggered, detecting if the key switch K2is triggered;

S07: if the key switch K2is triggered, resetting one of the test parameters as a current test parameter which may be shown on the display module30; for example, if the cycle time is enabled previously and shown on the display module30, after the key switch K2is triggered once, the cycle number is enabled and shown on the display module30instead of the cycle time;

S08; if the key switch K2is not triggered, detecting if the key switch K3is triggered;

S10: if the key switch K3is not triggered, detecting if the key switch K4is triggered;

S12: if the key switch K4is not triggered, determining if a count of the test cycles is equal to a predetermined cycle number; if the count of the test cycles is less than the predetermined cycle number, continuing to transmit trigger signals to test the computer; and

S13: if the count of the test cycles is equal to the predetermined cycle number, ending the test and recording a test result.

While the present invention has been illustrated by the description of preferred embodiments and while the preferred embodiments have been described in considerable detail, it is not intended to restrict or in any way limit the scope of the appended claims to such details. Additional advantages and modifications within the spirit and scope of the present invention will readily appear to those skilled in the art. Therefore, the present invention is not limited to the specific details and illustrative examples shown and described.