Digital to analog converter

A digital-to-analog converter is provided. The DAC includes a R-string section, a first DAC section, a second DAC section, a multiplexer, and an operational amplifier. The R-string section provides a first group of voltage levels and a second group of voltage levels. The first DAC section provides the output voltage according to the input word when the input word corresponds to a voltage level within a range of the first group of voltages levels. The second DAC section provides a second and a third voltage levels according to the remaining bits. The multiplexer is coupled to the second DAC section to provide an intermediate voltage from the first and the second voltage levels according to the LSB bit. The operational amplifier averages the intermediate voltage and one of the first and the second voltage levels to generate the output voltage.

BACKGROUND

1. Field of Invention

The present invention relates to digital-to-analog converters. More particularly, the present invention relates to a digital-to-analog converter having multiple DAC sections to process different voltage levels according to an input word.

2. Description of Related Art

Conventional resistor string (R-string) digital-to-analog converters (DAC) use a string of resistors to provide various voltages levels and a selector including select lines corresponding to each voltage level. The conventional R-string DAC requires a total of 2Nselect lines to convert N bits of data. In an age where chip size continues to shrink, using a large number of select lines such as 2Nselect lines is not area efficient and may waste much chip space.

In U.S. Ser. No. 11/563,321, a dual output DAC was disclosed to reduce the number of select line from 2Nto 2N-1, which saves a significant amount of area. Please refer toFIG. 1, a block diagram of the dual output DAC. The dual output DAC includes an R-string section102, a DAC section104, a multiplexer section106, and an operational amplifier108. An input word may be divided into a least significant bit (LSB) and the remaining bits. The DAC section104selects two voltage levels from the R-string section102according to the remaining bits of the input word. The multiplexer106then selects one of the voltage levels according to the LSB, so that the operational amplifier108may average the first voltage of the two voltage levels with the selected voltage level as the final output of the DAC. Therefore the dual output DAC requires only 2N-1select lines to accomplish converting an N-bit input word.

However, the operational amplifier108is limited in its voltage input range. Thus, the gamma curve produced by the DAC may be distorted when the operational amplifier108attempts to process very large voltage differences. For example, when the input word selects voltage levels near the rail voltages, distortion may occur to produce a non-linear output gamma curve.

For the forgoing reasons, there is a need for a new type of DAC, where distortion caused by the operational amplifier is accounted for in the design to provide a linear gamma curve.

SUMMARY

The present invention is directed to a digital-to-analog converter, that it satisfies this need of compensating the distortion caused by the operational amplifier. The digital-to-analog converter (DAC) for converting an input word into an output voltage is provided, where the input word includes a least significant bit (LSB) and remaining bits. The DAC includes an R-string section, a first DAC section, a second DAC section, a multiplexer, and an operational amplifier. The R-string section provides a first group of voltage levels and a second group of voltage levels. The first DAC section provides the output voltage according to the input word when the input word corresponds to a voltage level within a range of the first group of voltages levels. The second DAC section provides a second and a third voltage levels according to the remaining bits when the input word corresponds to a voltage level within a range of the second group of voltage levels. The multiplexer is coupled to the second DAC section to provide an intermediate voltage from the first and the second voltage levels according to the LSB bit. The operational amplifier averages the intermediate voltage and one of the first and the second voltage levels to generate the output voltage.

The use of single output DAC to select the voltage levels one-to-one from the R-string section allows the voltage levels at the high and low ends of the R-string section to be averaged by the operational amplifiers linearly.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Please refer toFIG. 2, which illustrates one embodiment of the present invention. A digital-to-analog converter (DAC)200converts an input word into an output voltage, where the input word includes a least significant bit (LSB) and remaining bits, and the DAC includes an R-string section202, a first DAC section204, a second DAC section206, a multiplexer208, and an operational amplifier210. The R-string section may provide a first group of voltage levels and a second group of voltage levels. For example, a source drive with an 8-bit (N=8) input word would require the R-string section202to have a total of at least 256 voltage levels (2N=256). The first group of voltage levels may include voltage levels that generate output voltages significantly distorted to the corresponding gray scale. The voltage levels in the first group may be grouped near the two extremes of the R-string section (ie. V0˜V15and V240˜255). These voltages levels may be out of the input range for the operational amplifier210to process them linearly. The distortion causes the gamma curve of the first group of voltage levels to be steeper. The second group of voltage levels may be capable of being processed linearly by the operational amplifier210(ie. V16˜V239). Therefore, the slope of the gamma curve of the first group of voltage levels is steeper than the slope of the gamma curve of the second group of voltage levels.

The first DAC section204provides the output voltage according to the input word when the input word corresponds to a voltage level within a range of the first group of voltage levels. For example, the 8-bit input word may be 00000000, which may correspond to V0. The value of V0may be very near the upper rail voltage (ie. 5V), thus V0belongs to the first group of voltage levels. The first DAC section204may be a signal output DAC, where one voltage level corresponds to one input word. When the source drivers requires a 8-bit input word, the first DAC section204may only require 4-bit DAC sections to accommodate the top 4-bits of voltage levels (V0˜V15) and the bottom 4-bits of voltage levels (V240˜V255). The output voltage provided by the first DAC section may be sent to the multiplexer208as Vin1, and also sent to the operational amplifier210as Vo1. Therefore, if the input word corresponds to a voltage level (ie. V0) within the range of the first group of voltage levels, then Vo1will carry V0and Vin1will carry V0.

A switching module212may be implemented so that when the input word corresponds to a voltage level from the first group of voltage levels, the switching module212couples a voltage level selected from the first DAC section to input into the multiplexer when the input word corresponds to a voltage level within a range of the first group of voltages levels. The switching module212may include a case sensor214determining the corresponding voltage level to provide a control signal, and a switching device216switched by the control signal to couple the voltage level selected from the first DAC section204to input into the multiplexer208. For example, Vin1and Vin2may be electrically connected and inputted into the multiplexer208when the case sensor214detects an input word, which corresponds to a voltage level within the range of the first group of voltage levels. In this case, Vo1may be equal to Vo2regardless of the selection of the multiplexer208, which then the operational amplifier210averages to generate an output voltage (Vo).

The second DAC section206provides a first voltage level and a second voltage level according to the remaining bits when the input word corresponds to a voltage level within a range of the second group of voltage levels. For example, the 8-bit input word may be 00010000, which may correspond to V16. The operational amplifier210may be capable of linearly interpolating the value of V16without significant distortion. Therefore, V16may belong to the second group of voltage levels. The second DAC section206may be a dual-output DAC as disclosed in U.S. Ser. No. 11/563,321, where the remaining bits of the input word select the first and second voltages levels from the R-string section202. The first voltage level may deviate from the second voltage level by two voltage levels. The second DAC section206outputs the selected first and second voltage levels to the inputs of the multiplexer208as Vin1, and Vin2. When the source drivers requires an 8-bit input word, the second DAC section206may only require a 7-bit DAC section to accommodate the voltage levels within the second group of voltage levels (V16˜V239). Although the embodiment of the present invention requires an additional DAC section for processing voltages levels towards the extreme ends of the gamma curve, the area of the DAC is still smaller than a convention 8-bit DAC, which requires a total of 256 select lines.

The multiplexer208may be coupled to the second DAC section to provide an intermediate voltage from the first and the second voltage levels according to the LSB bit. The intermediate voltage is indicated as Vo2inFIG. 2. The multiplexer208may select the second voltage level to be the intermediate voltage when the LSB bit of the input word is 1, the multiplexer may select the first voltage level to be the intermediate voltage when the LSB bit of the input word is 0. In this case, the switching module212does not connect Vin1and Vin2together, thus Vo1will be the first voltage level. Vo2, in this case, may be the second voltage level or the first voltage level depending on the LSB. For example, the first voltage level may be V100, and the second voltage level may be V102. If the output voltage level is desired to be V100, then V100will be selected as Vo2, which by averaging V100and V100through the operational amplifier210yields V100. On the other hand, if V101is the desired output, V102will be selected as Vo2, which by averaging V100and V102through the operational amplifier yields V101.

More specifically, please refer toFIG. 3, an illustration of the connection between the R-string section202and the first and second DAC sections204,206according the embodiment of the present invention. The R-string section202includes a plurality of resistors302electrically connected in series to provide the voltage levels. The first DAC section204includes a 1-of-N selector310having a plurality of first selecting lines312coupled to the R-string section to provide the corresponding voltage level from the first group of voltage levels, and each of the first selecting lines312includes series-connected first switching elements316. The switching elements316may be CMOS transistor switches. For example, a 4-bit first DAC section may have four switching elements on each first selecting line312. Each first selecting line312corresponds to a unique voltage level, which couples through to Vin1. The second DAC section includes a 2-of-N selector304having a plurality of second selecting lines306coupled to the R-string section to provide the corresponding first and second voltage levels from the second group of voltage levels, and each of the second selecting lines306may include series-connected second switching elements308. The second selecting lines306sensing the first voltage levels may be connected to Vin1, while the second selecting line306sensing the second voltage levels may be connected to Vin2.

From the above description of the embedment of the present invention, a DAC is provided which is smaller in area than a conventional DAC. Also the DAC according the embodiment of the present invention eliminates the problem of non-linearity of the gamma curved caused by a pure dual output DAC.