Pellicle for preventing thermal accumulation and extreme ultra-violet lithography apparatus having the same

A pellicle for lithography processes, including extreme ultraviolet (EUV) lithography may mitigate thermal accumulation in a membrane of the pellicle. The pellicle includes a membrane and at least one thermal buffer layer on at least one surface of the membrane. An emissivity of the thermal buffer layer may be greater than an emissivity of the membrane. A carbon content of the thermal buffer layer may be greater than a carbon content of the membrane. Multiple thermal buffer layers may be on separate surfaces of the membrane, and the thermal buffer layers may have different properties. A capping layer may be on at least one thermal buffer layer, and the capping layer may include a hydrogen resistant material. A thermal buffer layer may extend over some or all of a surface of the membrane. A thermal buffer layer may be between at least two membranes.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority under 35 U.S.C. § 119 to Korean Patent Application No. 10-2015-0066684 filed on May 13, 2015, the disclosure of which is hereby incorporated by reference in its entirety.

BACKGROUND

Field

Embodiments of the inventive concepts relate in general to lithography apparatuses used in a lithography process, and in particular to a pellicle capable of preventing internal thermal accumulation generated by the high energy of light used in a lithography process, including an extreme ultra-violet (EUV) lithography process.

Description of Related Art

Devices, including semiconductor chip devices, may be at least partially manufactured via a process which includes lithography. For example, a pattern of material may be formed on a semiconductor chip wafer, as part of manufacturing a semiconductor chip device, via a lithography process. The lithography process may include applying a pattern of light on to a layer of photoresist material (“photoresist layer” on a wafer. The photoresist material upon which the applied light is incident may be modified by the light. The light is applied to the photoresist layer in a pattern, and a portion of the photoresist layer may be modified according to the pattern. As a result, upon application of the lithography process to a wafer that includes a photoresist layer, the wafer may include a layer of photoresist material that includes a pattern of modified photoresist material in the photoresist layer. The pattern of modified photoresist material may correspond to the pattern of the light applied to the photoresist layer in the lithography process. Subsequent to the lithography process, the modified photoresist material may be removed in a process which does not remove the unmodified photoresist material. In some cases, the unmodified photoresist material may be removed in a process which does not remove the modified photoresist material. As a result of removal of at least some of the photoresist material, the wafer may include a layer of photoresist material which extends in a pattern according to the pattern of light used in the lithography process.

In some cases, a lithography process includes an extreme ultraviolet (EUV) lithography process. An apparatus configured to implement an EUV lithography process to a device, also referred to herein as an Extreme ultra-violet (EUV) lithography apparatus, may include an EUV optical system applying EUV light to a wafer and a reticle in which an optical pattern is formed. As a result, EUV light applied to a surface of the water may include aerial image information corresponding to the optical pattern, and an aerial image corresponding to the optical pattern may thus be formed on the wafer.

In some cases, to protect the optical pattern of the reticle from external factors, the EUV lithography apparatus may include a pellicle. The pellicle may include a membrane covering the optical pattern of the reticle and a frame supporting the membrane. Light having high energy applied by the EUV optical system may pass through the membrane of the pellicle.

In some cases, the pellicle may incur damage. Such damage may result in a degrading of the EUV lithography apparatus in which the pellicle is included, thereby adversely affecting the EUV lithography process implemented by the apparatus.

SUMMARY

Some example embodiments provide a pellicle in which overall durability is improved, and an extreme ultra-violet (EUV) lithography apparatus including the same.

Some example embodiments provide a pellicle capable of preventing deformation of a membrane caused by light having high energy used in a lithography process, and an EUV lithography apparatus including the same.

Some example embodiments provide a pellicle capable of preventing thermal accumulation, and an EUV lithography apparatus including the same.

Some example embodiments provide a pellicle having high emissivity, and an EUV lithography apparatus including the same.

The technical objectives are not limited to the above disclosure. Other objectives may become apparent to those of ordinary skill in the art based on the following descriptions.

In accordance with some example embodiments, a pellicle includes a membrane, and a first thermal buffer layer on a first surface of the membrane, wherein the first thermal buffer layer is associated with a first emissivity, and the first emissivity is greater than an emissivity of the membrane.

In some example embodiments, the first thermal buffer layer may include carbon.

In some example embodiments, the first thermal buffer layer may include at least one of amorphous carbon, graphene, nanographite, a carbon nanosheet, a carbon nanotube, silicon carbide (SiC), or boron carbide (BC).

In some example embodiments, a vertical thickness of the first al buffer layer may be lower than a vertical thickness of the membrane.

In some example embodiments, the pellicle may further include a second thermal buffer layer on a second surface opposite to the first surface of the membrane, wherein the second thermal buffer layer is associated with a second emissivity, and the second emissivity is greater than the emissivity of the membrane.

In some example embodiments, the second thermal buffer layer may include carbon.

In some example embodiments, the second emissivity of the second thermal buffer layer may equal the first emissivity of the first thermal buffer layer.

In some example embodiments, the pellicle may include a frame on the second surface of the membrane, wherein the second thermal buffer layer extends between the membrane and the frame.

In accordance some example embodiments, a pellicle includes a membrane, a first thermal buffer layer disposed on a first surface of the membrane, and a first capping layer disposed on the first thermal buffer layer, wherein the first thermal buffer layer includes a first carbon content, and the first carbon content is greater than each of a carbon content of the membrane and a carbon content of the first capping layer.

In some example embodiments, a vertical thickness of the first capping layer may be lower than a vertical thickness of the first thermal buffer layer.

In some example embodiments, the pellicle may further include a second capping layer on a second surface opposite to the first surface of the membrane, wherein a carbon content of the second capping layer may be lower than the first carbon content of the first thermal buffer layer.

In some example embodiments, the pellicle may further include a frame on the second surface of the membrane, wherein the frame includes an inner side and an outer side, the inner side at least partially bounding an inner portion of the second surface of the membrane, the outer side facing an external environment, and the second capping layer may be on the inner portion of the second surface.

In some example embodiments, the pellicle may further include a second thermal buffer layer between the membrane and the second capping layer, wherein the second thermal buffer layer includes a second carbon content, and the second carbon content is greater than the carbon content of each of the membrane and the second capping layer.

In some example embodiments, the second carbon content of the second thermal buffer layer may equal the first carbon content of the first thermal buffer layer.

In some example embodiments, the first capping layer may include a hydrogen resistant material.

In accordance with some example embodiments, a pellicle includes a membrane, and a thermal buffer layer on a surface of the membrane, wherein the thermal buffer layer is configured to emit thermal radiation, and the thermal radiation emitted by the thermal buffer layer is associated with an intensity exceeding an intensity of thermal radiation emitted by the membrane.

In some example embodiments, the pellicle may further include a capping layer disposed on a surface of the thermal buffer layer, wherein the capping layer includes a lower amount of carbon than an amount of carbon included in the thermal buffer layer.

In some example embodiments, the pellicle may further include a frame disposed on the surface of the membrane, the frame including an inner side and an outer side, the inner side at least partially bounding an inner portion of the surface of the membrane, the outer side facing an external environment, wherein the thermal buffer layer is disposed on the inner portion of the second surface.

In some example embodiments, the thermal buffer layer may include a first thermal buffer layer on a first surface of the membrane and a second thermal buffer layer disposed on a second surface opposite to the first surface of the membrane, and the first and second thermal buffer layers are configured to emit different intensities of thermal radiation.

In some example embodiments, a vertical thickness of the second thermal buffer layer may be different than a vertical thickness of the first thermal buffer layer.

In some example embodiments, a pellicle includes a membrane and a thermal buffer on a surface of the membrane, where the thermal buffer layer includes a first carbon content, and the first carbon content is greater than a carbon content of the membrane.

In some example embodiments, a vertical thickness of the thermal buffer layer is different than a vertical thickness of the membrane.

In some example embodiments, the pellicle includes a capping layer, wherein the thermal buffer layer is between the membrane and the capping layer, and the first carbon content is greater than a carbon content of the capping layer.

In some example embodiments, the first thermal buffer layer is associated with a first emissivity, and the first emissivity is greater than an emissivity of the membrane.

In some example embodiments, the membrane includes a first membrane and a second membrane, the second membrane on the first membrane, the first thermal buffer layer is between the first membrane and the second membrane; and the first emissivity is greater than each of an emissivity of the first membrane and an emissivity of the second membrane.

DETAILED DESCRIPTION OF THE EMBODIMENTS

FIG. 1Ais a schematic view illustrating an extreme ultra-violet (EUV) lithography apparatus including a pellicle according to some example embodiments of the inventive concepts.FIG. 1Bis a view illustrating the pellicle according to some example embodiments of the inventive concepts. The lithography apparatus1, as shown inFIG. 1A, may implement a lithography process to form one or more patterns in a photoresist layer of a semiconductor wafer “W”. The one or more patterns may include aerial images corresponding to optical patterns. The optical patterns may be provided in the reticle300, as discussed further below.

Referring toFIGS. 1A and 1B, an EUV lithography apparatus1according to some example embodiments of the inventive concepts may include an EUV optical system100, an illumination mirror system200, a reticle300, a reticle stage400, a pellicle500, a blinder600, a projection mirror system700, and a wafer stage800.

The EUV optical system100may apply EUV light to the illumination mirror system200. The EUV optical system100may include an EUV light source110. The EUV light source110may generate EUV light. For example, the EUV light source110may generate light having a wavelength of approximately 13.5 nm.

The EUV optical system100may further include a light collector120interposed between the EUV light source110and the illumination mirror system200. The light collector120may be configured to apply the EUV light generated by the EUV light source110toward the illumination mirror system200. The light collector120may be configured to apply the EUV via one or more of reflection or refraction of at least a portion of the EUV light. For example, the EUV light generated by the light source110may be applied to the illumination mirror system200through the light collector120. The light collector120may be located near the EUV light source110.

The illumination mirror system200may apply the EUV light generated by the EUV optical system100to the reticle300. In some example embodiments, the illumination mirror system200may generally and uniformly adjust the distribution of the intensity of the EUV light.

The illumination mirror system200may include a plurality of illumination mirrors210to240. For example, the illumination mirror system200may include a first illumination mirror210, a second illumination mirror220, a third illumination mirror230, and a fourth illumination mirror240. Each of the illumination mirrors210to240may be a concave mirror or convex mirror.

The illumination mirror system200may prevent the loss of EUV light, reflected by the illumination mirrors210to240, to the outside of an incident path. For example, the EUV light generated by the EUV optical system100may be condensed by the illumination mirror system200.

The reticle300may reflect the EUV light applied to the reticle300by the illumination mirror system200. For example, the EUV lithography apparatus1according to some example embodiments of the inventive concepts may be configured to perform a reflective lithography process.

The reticle300may include an optical pattern. For example, the optical pattern may be disposed on a surface of the reticle300. The surface of the reticle300on which the optical pattern is disposed may face toward the illumination mirror system200. The EUV light reflected by the reticle300may include aerial image information of the optical pattern, such that an aerial image of the optical pattern is formed on a photoresist layer of the wafer W.

The reticle300may be fixed on the reticle stage400. For example, the reticle300may be fixed under the reticle stage400. The reticle stage400may include an electrostatic chuck (ESC).

The reticle stage400may be configured to move in a lateral direction. The reticle300may be moved in a lateral direction by the reticle stage400.

The pellicle500may be configured to prevent the optical pattern of the reticle300from being damaged by external factors. The pellicle500may be disposed on the surface of the reticle300. The surface of the reticle300on which the pellicle500is disposed may face toward the illumination mirror system200. For example, the optical pattern of the reticle300may be covered by the pellicle500.

The pellicle500may include a membrane510, a frame520, a thermal buffer layer530, a first capping layer541, and a second capping layer542. As shown, a thermal buffer layer530may include multiple thermal buffer layers, including a first thermal buffer layer531and a second thermal buffer layer532.

The membrane510may be disposed on the optical pattern of the reticle300. For example, the membrane510may be disposed on a surface of the reticle300to which EUV light is applied by the illumination mirror system200. The EUV light applied from the illumination mirror system200may be applied to the reticle300through the membrane510.

The membrane510may include a first surface510S1and a second surface510S2. The first surface510S1of the membrane510may be disposed to face toward the illumination mirror system200. The EUV light applied from the illumination mirror system200may be applied to the first surface510S1of the membrane510, such that the EUV light applied from the illumination mirror system200is incident on the first surface510S1. The second surface510S2of the membrane510may be opposite to the first surface510S1of the membrane510. The second surface510S2of the membrane510may face the reticle300.

The membrane510may include a material having high transmittance with respect to EUV light. For example, the membrane510may include a ceramic, such as silicon (Si), etc., or a metal such as zirconium (Zr), molybdenum (Mo), etc. The membrane510may have equal to or more than a desired (or, alternatively predetermined) physical strength to prevent the damage caused by an external impact and damage in a transferring/mounting process. For example, the membrane510may include a thickness of approximately 50 nm.

The frame520may support the membrane510. The frame520may be disposed between the membrane510and the reticle300. The membrane510may be spaced apart from the reticle300by the frame520. The frame520may be disposed on an edge of the membrane510.

The thermal buffer layer530may discharge heat generated at the membrane510to an external environment, relative to the pellicle500. As referred to herein, the external environment may include an environment external to the pellicle500, an environment external to the reticle300, an environment external to some or all of the lithography apparatus1, some combination thereof, etc. In the EUV lithography apparatus1according to some example embodiments of the inventive concepts, a lithography process may be performed in a vacuum state, such that the pellicle is located in a vacuum. Where the pellicle500is located in a vacuum, the thermal buffer layer530may be at least partially restricted to discharging heat generated at the membrane510via emitting radiation. The emissivity of the thermal buffer layer530may be greater than that of the membrane510. The thermal buffer layer530may be referred to herein as being associated with the emissivity. The intensity of the thermal radiation emitted by the thermal buffer layer530may be greater than that the intensity of thermal radiation emitted by the membrane510.

The thermal buffer layer530may include carbon. For example, the thermal buffer layer530may include at least one of amorphous carbon, graphene, nanographite, a carbon nanosheet, a carbon nanotube, silicon carbide (SiC), and boron carbide (BC). The amount of carbon included in the thermal buffer layer530may be greater than that included in the membrane510. A carbon content of the thermal buffer layer530may be greater than a carbon content of the membrane510. The thermal buffer layer530may be referred to as including the carbon content.

The thermal buffer layer530may include a first thermal buffer layer531and a second thermal buffer layer532.

The first thermal buffer layer531may be disposed on the first surface510S1of the membrane510. The first thermal buffer layer531may be in direct contact with the first surface510S1of the membrane510. Sides of the first thermal buffer layer531may be vertically arranged with sides of the membrane510. The first surface510S1of the membrane510may be fully covered by the first thermal buffer layer531.

The second thermal buffer layer532may be disposed on the second surface510S2of the membrane510. The second thermal buffer layer532may be in direct contact with the second surface510S2of the membrane510. The second thermal buffer layer532may extend between the membrane510and the frame520. Sides of the second thermal buffer layer532may be vertically arranged with the sides of the membrane510. The second surface510S2of the membrane510may be fully covered by the second thermal buffer layer532.

The emissivity of the second thermal buffer layer532, also referred to herein as a second emissivity, may be the same as the emissivity of the first thermal buffer layer531, also referred to herein as a first emissivity. As referred to herein, a layer property, including emissivity, which is the same as another layer property may be referred to as being “equal” to the other layer property. A property of a layer may include, without limitation, an emissivity of the layer, a carbon content of the layer, an amount of carbon included in the layer, and an intensity of radiation emitted by the layer. For example, the second emissivity of the second thermal buffer layer may be “equal” to the first emissivity of the first thermal buffer layer. The intensity of the thermal radiation emitted by the second thermal buffer layer532may be the same as the intensity of the thermal radiation emitted by the first thermal buffer layer531. The second thermal buffer layer532may include a material which is common with a material included in the first thermal buffer layer531.

Vertical thicknesses of the first thermal buffer layer531and the second thermal buffer layer532may be lower than a vertical thickness of the membrane510. For example, the vertical thickness of the first thermal buffer layer531may be 2 nm or less. The vertical thickness of the second thermal buffer layer5532may be the same as the vertical thickness of the first thermal buffer layer531. Vertical thickness may refer to a thickness which extends orthogonally relative to one or more of the surfaces510S1and510S2.

In the EUV lithography apparatus1according to some example embodiments of the inventive concepts, a thermal buffer layer530may be disposed on a surface of the membrane510. An emissivity of the thermal buffer layer530may be greater than the emissivity of the membrane510. Accordingly, the EUV lithography apparatus1according to sonic example embodiments of the inventive concepts may prevent heat generated at the membrane510by the high energy of EUV light passing through the membrane510from accumulating in the membrane510. The heat may be generated at the membrane510by the EUV light passing through the membrane510. That is, in the EUV lithography apparatus1according to some example embodiments of the inventive concepts, deformation of the membrane510by thermal accumulation may be prevented based on prevention of heat accumulation in the membrane510. Thus, in the EUV lithography apparatus1according to some example embodiments of the inventive concepts, the durability and lifetime of the pellicle500may be improved. Furthermore, in some example embodiments, preventing deformation of the membrane may prevent degradation of the lithography process implemented by the lithography apparatus1. As a result, a consistent accuracy and precision of patterns formed on the wafers W may be maintained. Thus, a consistent quality of the devices at least partially manufactured via the lithography process implemented by lithography apparatus1may be maintained.

The first capping layer541may prevent the first thermal buffer layer531from being damaged by a lithography process or cleaning process. The first capping layer541may be disposed on the first thermal buffer layer531. The first thermal buffer layer531may be interposed between the membrane510and the first capping layer541. Sides of the first capping layer541may be vertically arranged with sides of the first thermal buffer layer531.

The first capping layer541may include a hydrogen resistant material. For example, the first capping layer541may include at least one of silicon oxide (SiO), silicon nitride (SiN), silicon carbide (SiC), molybdenum (Mo), ruthenium (Ru), and zirconium (Zr). The first capping layer541may prevent the first thermal buffer layer531from being damaged by a lithography process or cleaning process, based on the first capping layer541including a hydrogen resistant material.

The emissivity of the first capping layer541may be lower than the first emissivity of the first thermal buffer layer531. For example an amount of carbon included in the first capping layer541may be lower than the amount of carbon included in the first thermal buffer layer531. As referred to herein, the amount of carbon included in the first thermal buffer layer531may be referred to as a first amount of carbon. A carbon content of the first thermal buffer layer531may be greater than a carbon content of one or more of the membrane510and the first capping layer541. As referred to herein, the carbon content of the first thermal buffer layer531may be referred to as a first carbon content. A vertical thickness of the first capping layer541may be lower than that of the first thermal buffer layer531.

The second capping layer542may prevent the second thermal buffer layer532from being damaged by a lithography process or cleaning process. The second capping layer542may be disposed on the second thermal buffer layer532. The second thermal buffer layer532may be interposed between the membrane510and the second capping layer542. The second capping layer542may extend between the frame520and the second thermal buffer layer532. Sides of the second capping layer542may be vertically arranged with sides of the second thermal buffer layer532.

The second capping layer542may include a hydrogen resistant material. For example, the second capping layer542may include at least one of silicon oxide SiO), silicon nitride (SiN), silicon carbide (SiC), molybdenum (Mo), ruthenium (Ru), and zirconium (Zr). The second capping layer542may include the same material as the first capping layer541. The second capping layer542may prevent the second thermal buffer layer532from being damaged by a lithography process or cleaning process, based on the second capping layer542including a hydrogen resistant material.

The emissivity of the second capping layer542may be lower than an emissivity of the second thermal buffer layer532. For example, an amount of carbon included in the second capping layer542may be lower than the amount of carbon included in the second thermal buffer layer532. As referred to herein, the amount of carbon included in the second thermal buffer layer532may be referred to as a second amount of carbon. A carbon content of the second thermal buffer layer532may be greater than a carbon content of one or more of the membrane510and the second capping layer542. As referred to herein, the carbon content of the second thermal buffer layer532may be referred to as a second carbon content.

The amount of carbon included in the second capping layer542may be the same as the amount of carbon included in the first capping layer541. For example, the carbon content of the second capping layer542may be lower than the carbon content of the first thermal buffer layer531.

A vertical thickness of the second capping layer542may the lower than the vertical thickness of the second thermal buffer layer532. For example, the vertical thickness of the second capping layer542may be the same as the vertical thickness of the first capping layer541. The vertical thickness of the second capping layer542may be lower than the vertical thickness of the first thermal buffer layer531.

The blinder600may be disposed on the pellicle500. For example, the blinder600may be disposed under the pellicle500. The blinder600may include an aperture600a. EUV light applied by the illumination mirror system200may pass through the aperture600aof the blinder600and be applied to the reticle300.

The aperture600aof the blinder600may have various shapes. For example, EUV light applied to the reticle300by the contrast mirror system200may be formed in various shapes by the aperture600aof the blinder600.

The projection mirror system700may apply the EUV light reflected by the reticle300onto a wafer W seated on the wafer stage800. The EUV light reflected by the reticle300may pass through the aperture600aof the blinder600and be applied to the projection mirror system700.

The projection mirror system700may correct the EUV light reflected by the reticle300. For example, the projection mirror system700may correct the aberration of the EUV light reflected by the reticle300.

The projection mirror system700may include a plurality of projection mirrors710to760. For example, the projection mirror system700may include a first projection mirror710, a second projection mirror720, a third projection mirror730, a fourth projection mirror740, a fifth projection mirror750, and a sixth projection mirror760. The projection mirrors710to760may each be a concave mirror or convex mirror.

The wafer W may be fixed on the wafer stage800. The wafer stage800may move in a lateral direction. The wafer W may be moved in a lateral direction by the wafer stage800.

The movement of the wafer stage800may be related to the movement of the reticle stage400. For example, the wafer stage800may move in a common direction as the movement of the reticle stage400. A movement distance of the wafer stage800may be proportional to a movement distance of the reticle stage400.

EUV light applied by the projection mirror system700may be focused on the wafer W. For example, the EUV light applied by projection mirror system700may be focused on a photoresist pattern formed on a surface of the wafer W. The wafer W may include a semiconductor chip wafer. The lithography process implemented with regard to wafer W may be included in a process of manufacturing a semiconductor chip device using the wafer W. The light applied to the wafer W may include aerial image information from the optical pattern included in the reticle300. Applying the light to a surface of the wafer W may form a photoresist pattern on the wafer W, where the photoresist pattern is based on the optical pattern included in the reticle300. The photoresist pattern may include portions of the wafer W surface being modified by the applied light. The forming of the photoresist pattern on the wafer W may be included in a process of manufacturing a semiconductor chip device. For example, the portion of the wafer W on which the photoresist pattern is formed may be removed via another process. A remaining portion of the photoresist on the wafer W may include a portion of wafer W material that is patterned according to the optical pattern.

FIG. 2is a graph showing the emissivity of a first pellicle L1having a thermal buffer layer and the emissivity of a second pellicle L2not having a thermal buffer layer based on a temperature. Here, the first pellicle L1and the second pellicle L2may include a membrane including silicon having a thickness of approximately 50 nm. The first pellicle L1may include one or more thermal buffer layers. Each thermal buffer layer may include graphene having a thickness of approximately 2 nm. The thermal buffer layers may be disposed on both surfaces of the membrane.

Referring toFIG. 2, in a temperature of 400K to 1200K, the emissivity of the first pellicle L1is greater than the emissivity of the second pellicle L2, The greater emissivity of the first pellicle L1indicates that the first pellicle L1may prevent thermal accumulation generated by EUV light having high energy used in a lithography process based on the thermal buffer layers included in the first pellicle. Thus, the thermal buffer layers of the first pellicle L1may prevent deformation of the membrane of the first pellicle L1, where such deformation may be caused by the thermal accumulation. Accordingly, the durability of the first pellicle L1may be higher than the durability of the second pellicle L2. Further, the lifetime of the first pellicle L1can be greater than the lifetime of the second pellicle L2.

As a result, the pellicle and the EUV lithography apparatus including the same according to some example embodiments of the inventive concepts may prevent deformation of the membrane of the pellicle, where such deformation is caused by the thermal accumulation. Thus, the durability and lifetime of a pellicle according to some example embodiments of the inventive concepts may be improved. In addition, the process reliability of the EUV lithography apparatus including the pellicle according to some example embodiments of the inventive concepts may be improved.

In the pellicle500according to some example embodiments of the inventive concepts, the thermal buffer layers530are disposed on both surfaces of the membrane510. However, in the pellicle500according to some example embodiments of the inventive concepts, the thermal buffer layer530may include a thermal buffer layer530which is restricted to being disposed on the first surface510S1of the membrane510as shown inFIG. 3, or the thermal buffer layer530may include a thermal buffer layer530which is restricted to being disposed on the second surface510S2of the membrane510as shown inFIG. 4.

In the pellicle500according to some example embodiments of the inventive concepts, the second thermal buffer layer532and the second capping layer542extend between the membrane510and the frame520. However, in the pellicle500according to some example embodiments of the inventive concepts, the second thermal buffer layer532and the second capping layer542may be disposed on an inner side of the frame520as shown inFIG. 5, such that the frame520is in direct contact with the second surface510S2of membrane510and one or more sides of the second thermal buffer layer532and the second capping layer542are bounded by the frame520. As shown inFIG. 5, the frame520at least partially bounds an inner portion550of the second surface510S2of the membrane. The frame520includes an outer side520S1which faces towards an external environment. The frame520also includes an inner side520S1which faces towards the inner portion550of the second surface510S2of the membrane510. The external environment is an environment external to the pellicle. As shown inFIG. 5, the second thermal buffer layer532and the second capping layer542may be disposed on the inner portion550of the second surface510S2of the membrane510.

Further, in the pellicle500according to some example embodiments of the inventive concepts, the second capping layer542may be in direct contact with the second surface510S2of the membrane510and the thermal buffer layer530may be disposed on one of the surfaces510S1,510S2of the membrane510. For example, as shown inFIG. 6, the thermal buffer layer530may be disposed between the first capping layer541and the membrane510. As shown inFIG. 6, the second capping layer542may be disposed on the inner portion550of the second surface510S2of the membrane510. In another example, as shown inFIG. 7, the thermal buffer layer530may be restricted to being disposed between the second capping layer542disposed on the inner side of the frame520and the membrane510. As shown inFIG. 7, the second thermal buffer layer532and the second capping layer542may be disposed on the inner portion550of the second surface510S2of the membrane510.

In the pellicle500according to some example embodiments of the inventive concepts, the sides of the second thermal buffer layer532are vertically arranged with the sides of the second capping layer542. However, in the pellicle500according to some example embodiments of the inventive concepts, the second thermal buffer layer532may extend between the membrane510and the frame520, and the second capping layer542may be disposed on the inner side of the frame520as shown inFIG. 8. As shown inFIG. 8, the second thermal buffer layer532may be disposed on an entirety of the second surface510S2of the membrane510, and the second capping layer542may be disposed on the inner portion550of the second surface510S2of the membrane510.

In the pellicle500according to some example embodiments of the inventive concepts, the first capping layer541is disposed on the first thermal buffer layer531, and the second capping layer542is disposed on the second thermal buffer layer532. However, in the pellicle500according to some example embodiments of the inventive concepts, surfaces of the first thermal buffer layer531and the second thermal buffer layer532may be exposed to an external environment as shown inFIGS. 9 and 10. In some example embodiments, the first thermal buffer layer531and the second thermal buffer layer532may include a material which prevents damage caused by a lithography process or cleaning process. For example, the first thermal buffer layer531and the second thermal buffer layer532may include a hydrogen resistant material.

In the pellicle500according to some example embodiments of the inventive concepts, the first surface510S1and the second surface510S2of the membrane510may be covered by the thermal buffer layer530, the first capping layer541, and the second capping layer542. However, in the pellicle500according to some example embodiments of the inventive concepts, the first surface510S1or the second surface510S2of the membrane510may be exposed to an external environment as shown inFIGS. 11 to 14. In some example embodiments, the membrane510may include a material which prevents the damage caused by a lithography process or cleaning process. For example, the membrane510may include a hydrogen resistant material.

Further, in the pellicle500according to some example embodiments of the inventive concepts, a surface of the thermal buffer layer530disposed on the first surface510S1of the membrane510may be exposed to an external environment, and the second surface510S2of the membrane510may be covered by the second capping layer542as shown inFIGS. 15 and 16.

FIG. 17is a view illustrating a pellicle according to some example embodiments of the inventive concepts.

Referring toFIG. 17, a pellicle500according to some example embodiments of the inventive concepts may include a membrane510, a frame520, a thermal buffer layer530, a first capping layer541, and a second capping layer542.

The thermal buffer layer530may include a first thermal buffer layer531and a second thermal buffer layer533. The first thermal buffer layer may be interposed between a first surface510S1of the membrane510and the first capping layer541. The second thermal buffer layer may be interposed between a second surface510S2of the membrane510and the second capping laver542.

The emissivity of the second thermal buffer layer533may be different than the emissivity of the first thermal buffer layer531. A difference between the emissivity of the first thermal buffer layer531and the emissivity of the second thermal buffer layer533may be based on direction of light incident on each of the layers, where the light includes light used in a lithography process. For example, the emissivity of the first thermal buffer layer531may be higher than that of the second thermal buffer layer533, based on a direction of light incident on the first thermal buffer layer531.

The second thermal buffer layer533may include a different material from one or more materials included in first thermal buffer layer531. A vertical thickness of the second thermal buffer layer533may be different than a vertical thickness of the first thermal buffer layer531. For example, the vertical thickness of the second thermal buffer layer533may be greater than the vertical thickness of the first thermal buffer layer531.

FIG. 18is a view illustrating a pellicle according to some example embodiments of the inventive concepts.

Referring toFIG. 18, a pellicle500according to some example embodiments of the inventive concepts may include a membrane510having a first membrane511and a second membrane512, a frame520disposed on a surface510S2of the second membrane512, a thermal buffer layer530having a first outer thermal buffer layer534, an inner thermal buffer layer535, and a second outer thermal buffer layer536, a first capping layer541disposed on the first outer thermal buffer layer534, and a second capping layer542disposed on the second outer thermal buffer layer536.

The first outer thermal buffer layer534may be disposed on a surface510S1of the first membrane511. The second outer thermal buffer layer536may be disposed on the surface510S2of the second membrane512. The emissivity of the second outer thermal buffer layer536may be the same as the emissivity of the first outer thermal buffer layer534. The second outer thermal buffer layer536may include a material that is common with a material included in the first outer thermal buffer layer534. A vertical thickness of the second outer thermal buffer layer536may be the same as the vertical thickness of the first outer thermal buffer layer534.

The inner thermal buffer layer535may be interposed between the first membrane511and the second membrane512. Sides of the inner thermal buffer layer535may be vertically arranged with sides of the first membrane511and the second membrane512. A space between the first membrane511and the second membrane512may be fully filled with the inner thermal buffer layer535.

A vertical thickness of the inner thermal buffer layer535may be different than a vertical thickness of one or more of the first outer thermal buffer layer534and the second outer thermal buffer layer536. For example, the vertical thickness of the inner thermal buffer layer535may be lower than a vertical thickness of one or more of the first outer thermal butler layer534and the second outer thermal buffer layer536. For example, the inner thermal buffer layer535may include a different material from the first outer thermal buffer layer534and the second outer thermal buffer layer536. The emissivity of the inner thermal buffer layer535may be different than an emissivity of one or more of the first outer thermal buffer layer534and the second outer thermal butler layer536.

FIGS. 19A to 19Care views sequentially illustrating a method of forming the pellicle according to some example embodiments of the inventive concepts.

Referring toFIGS. 1B and 19A to 19C, the method of forming the pellicle according to some example embodiments of the inventive concepts will be described. First, referring toFIG. 19A, the method of forming the pellicle according to some example embodiments of the inventive concepts may include a process of forming a second capping layer542and a second thermal butler layer532on a frame substrate520p.

The process of forming the second capping layer542and the second thermal buffer layer532on the frame substrate520pmay include a process of preparing the frame substrate520p, a process of forming the second capping layer542on the frame substrate520p, and a process of forming the second thermal buffer layer532on the second capping layer542.

The process of forming the second thermal buffer layer532may include one or more of a chemical vapor deposition (CVD) process, a physical vapor deposition (PVD) process, an atomic layer deposition (ALD) process, a plasma deposition process, a wet/dry transfer process, an electro-spinning process, a filtration process, a vapor filtration process, or a screening process.

The process of forming the second capping layer542may be the same as the process of forming the second thermal buffer layer532.

Referring toFIG. 19B, the method of forming the pellicle according to some example embodiments of the inventive concepts may include a process of forming a membrane510, a first thermal buffer layer531, and a first capping layer541on the second thermal buffer layer532.

The process of forming the membrane510, the first thermal buffer layer531, and the first capping layer541may include a process of forming the membrane510on the second thermal buffer layer532, a process of forming the first thermal buffer layer531on the membrane510, and a process of forming the first capping layer541on the first thermal buffer layer531.

The process of forming the first thermal buffer layer531may be the same as the process of forming the second thermal buffer layer532. The process of forming the first capping layer541may be the same as the process of forming the second capping layer542.

Referring toFIG. 19C, the process of forming the pellicle according to some example embodiments of the inventive concepts may include a process of forming a mask pattern900on the frame substrate520p.

The mask pattern900may vertically overlap an edge area of the membrane510. The frame substrate520pvertically overlapping the center area of the membrane510may be exposed b the mask pattern900. For example, the mask pattern900may include a photoresist pattern. The process of forming the mask pattern900may be the same as the process of forming the second thermal buffer layer532.

Referring toFIG. 1B, the method of forming the pellicle according to some example embodiments of the inventive concepts may include a process of forming the frame520on the second capping layer542.

The process of forming the frame520may include a process of etching the frame substrate520pusing the mask pattern900as an etching mask and a process of removing the mask pattern900. The process of etching the frame substrate520pmay include a dry or wet etching process.

FIGS. 20A to 20Care views sequentially illustrating a method of forming the pellicle according to some example embodiments of the inventive concepts.

Referring toFIGS. 5 and 20A to 20C, the method of forming the pellicle according to some example embodiments of the inventive concepts will be described. First, referring toFIG. 20A, the method of forming the pellicle according to some example embodiments of the inventive concepts may include a process of forming a membrane510on a surface of a frame substrate520p.

Referring toFIG. 20B, the method of forming the pellicle according to some example embodiments of the inventive concepts may include a process of forming a frame520on the membrane510.

The process of forming the frame520may include a process of etching the frame substrate520p.

Referring to FIGS,5and20C, the method of forming the pellicle according to some example embodiments of the inventive concepts may include a process of forming a first thermal buffer layer531, a second thermal buffer layer532, a first capping layer541, and a second capping layer542on surfaces510S1and510S2of the membrane510. As shown inFIGS. 5 and 20C, the second thermal buffer layer532and the second capping layer542may be formed on the inner portion550of the second surface510S2of the membrane510.

The process of forming the first thermal buffer layer531, the second thermal buffer layer532, the first capping layer541, and the second capping layer542may include a process of forming the first thermal buffer layer531and the first capping layer541on the first surface510S1of the membrane510, and a process of forming the second thermal buffer layer532and second capping layer542on the second surface510S2of the membrane510.

The process of forming the first thermal buffer layer531and the first capping layer541may include a process of forming the first capping layer541on the first thermal buffer layer531and a process of physically attaching the first thermal buffer layer531, on which the first capping layer541is formed, onto the first surface510S1of the membrane510.

The process of forming the second thermal buffer layer532and the second capping layer542may include a process of forming the second capping layer542on the second thermal buffer layer532and a process of physically attaching the second thermal buffer layer532, on which the second capping layer542is formed, onto the second surface510S2of the membrane510exposed b the frame520.

FIG. 21is a view illustrating a semiconductor module including a semiconductor device according to some example embodiments of the inventive concepts.

Referring toFIG. 21, the semiconductor module1000may include a module substrate1100, a microprocessor1200, memories1300, and input/output terminals1400. The microprocessor1200, the memories1300, and the input/output terminals1400may be mounted on the module substrate1100. The semiconductor module1000may include a memory card or card package.

The microprocessor1200and the memories1300may include a semiconductor device formed by an lithography apparatus including the pellicle according to the various embodiments of the inventive concept. Accordingly, in the semiconductor module1000according to some example embodiments of the inventive concepts, the reliability and electrical characteristics of the microprocessor1200and the memories1300may be improved.

FIG. 22is a view illustrating a mobile system including the semiconductor device according to some example embodiments of the inventive concepts.

Referring toFIG. 22, a mobile system2000may include a body unit2100, a display unit2200, and an external apparatus2300. The body unit2100may include a microprocessor unit2110, a power supply2120, a function unit2130, and a display controller unit2140.

The body unit2100may be a system board or motherboard including a printed circuit board (PCB). The microprocessor unit2110, the power supply2120, the function unit2130, and the display controller unit2140may be installed or mounted on the body unit2100.

The microprocessor unit2110may receive a voltage from the power supply2120to control the function unit2130and the display controller unit2140. The power supply2120may receive a constant voltage from an external power source or the like, and divide the constant voltage into various voltage levels to supply to the microprocessor unit2110, the function nit130, the display controller unit2140, etc.

The power supply2120may include a power management IC (PMIC). The PMIC may efficiently supply a voltage to the microprocessor unit2110, the function unit2130, the display controller unit2140, etc.

The function unit2130may perform various functions of the mobile system2000. For example, the function unit2130may include various components capable of performing wireless communication functions, such as outputting an image to the display unit2200, outputting a voice to a speaker, using dialing or communication with the external apparatus2300. For example, the function unit2130may serve as a camera image processor.

When the mobile system2000is connected to a memory card or the like to expand capacity hereof the function unit2130may serve as a memory card controller. When the mobile system2000further includes a Universal Serial Bus (USB) to expand functions thereof, the function unit2130may serve as an interface controller.

The display unit2200may be electrically connected to the body unit2100. For example, the display unit2200may be electrically connected to the display controller unit2140of the body unit2100. The display unit00may display an image processed by the display controller unit2140of the body unit2100.

The microprocessor unit2110and the function unit2130of the body unit2100may include a semiconductor device formed by an EUV lithography apparatus including the pellicle according to the various embodiments of the present invention, Accordingly, the reliability and electrical characteristics of the mobile system2000according to some example embodiments of the inventive concepts can be improved.

FIG. 23is a view illustrating an electronic system including the semiconductor device according to some example embodiments of the inventive concepts.

Referring toFIG. 23, an electronic system3000may include a memory3100, a microprocessor3200, a random access memory (RAM)3300, and a user interface3400. The electronic system3000may be a system such as an LED lighting device, a refrigerator, an air conditioner, an industrial cutting machine, a welding machine, a vehicle, a vessel, an airplane, a satellite, etc.

The memory3100may store booting codes of the microprocessor3200, data processed by the microprocessor3200, or external input data. The memory3100may include a controller.

The microprocessor3200may program and control the electronic system3000. The RAM3300may be used for an operational memory of the microprocessor3200.

The user interface3400may perform data communication using a bus3500. The user interface3400may be used for data input to the elect system3000or data output from the electronic system3000.

The memory3100, the microprocessor3200, and the RAM3300may include a semiconductor device formed by an EUV lithography apparatus including the pellicle according to the various embodiments of the inventive concept. Accordingly, the reliability and electrical characteristics of the electronic system3000according to some example embodiment of the inventive concepts can be improved.

The pellicle and the EUV lithography apparatus including the pellicle according to some example embodiments of the inventive concepts can prevent heat generated by light having high energy used in a lithography process from accumulating in a membrane. The light used in a lithography process may include extreme ultraviolet light. Accordingly, the pellicle and the EUV lithography apparatus including the pellicle according to some example embodiments of the inventive concepts can prevent deformation of the membrane caused by the thermal accumulation. Thus, in the pellicle and the EUV lithography apparatus including the pellicle according to some example embodiments of the inventive concepts, the durability and lifetime of the pellicle can be improved. In addition, in the pellicle and the EUV lithography apparatus including the pellicle according to some example embodiments of the inventive concepts, the reliability of a process can be improved.