Lead frame including an insulating resin layer entirely covering lead surface, and semiconductor device including the same

A lead frame includes a plurality of leads defined by an opening extending in a thickness direction. An insulating resin layer fills the opening to entirely cover side surfaces of each lead and to support the leads. A first surface of each lead is exposed from a first surface of the insulating resin layer.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is based upon and claims the benefit of priority from prior Japanese Patent Application Nos. 2012-072110, filed on Mar. 27, 2012, and 2012-150495, filed on Jul. 4, 2012, the entire contents of which are incorporated herein by reference.

BACKGROUND ART

The present disclosure relates to a lead frame, a semiconductor device, and a method for manufacturing a lead frame.

FIGS. 27A and 27Billustrate an example of a conventional lead frame used to manufacture a quad flat no-leads (QFN) semiconductor device.FIG. 27Ais a plan view illustrating a portion of a lead frame including an array of multiple unit lead frames.FIG. 27Billustrates a cross-section taken along line G-G inFIG. 27A.

As illustrated inFIG. 27A, a unit lead frame70includes a section bar71having the form of a grid, four support bars72extending from the section bar71, a die pad73supported by the four support bars72, and a plurality of leads74extending, like comb teeth, from the section bar71toward the die pad73. The unit lead frame70includes openings75that form the section bar71, the support bars72, the die pad73, and the leads74. As illustrated inFIG. 27B, each opening75is filled with an insulating resin layer76.

FIG. 27Cillustrates a cross-section of a QFN semiconductor device80fabricated with the unit lead frame70. The semiconductor device80includes the unit lead frame70, a semiconductor element81mounted on the die pad73, bonding wires82that electrically connect the semiconductor element81and the leads74, and an encapsulating resin portion83that encapsulates the semiconductor element81, the bonding wires82, and other components.

A method for manufacturing the semiconductor device80includes mounting the semiconductor element81onto the die pad73of the unit lead frame70(die bonding), electrically connecting the electrode terminals of the semiconductor element81to the corresponding leads74with the bonding wires82(wire bonding), encapsulating the semiconductor element81, the bonding wires82, and other components with the resin portion83, and dividing the lead frame illustrated inFIG. 27Binto individual semiconductor devices by cutting the lead frame at the cutting lines (indicated by broken lines in the drawing) with, for example, a dicing saw (dicing). The use of the lead frame including the array of the multiple unit lead frames70is preferable because it enables mass production of semiconductor devices80.

The above conventional technique is described in, for example, Japanese Laid-Open Patent Publication No. 2003-309241.

SUMMARY

Referring toFIG. 27C, the dicing removes the entire section bar71. After the dicing, the cut side surfaces of the leads74, previously supported by the section bar71, are exposed. The leads74are typically formed from copper, which easily oxidizes and corrodes. The leads74having the exposed side surfaces can oxidize to form copper oxide on the surfaces. Such copper oxide increases the wiring resistance of the leads.

One aspect of the embodiments is a lead frame including a plurality of leads defined by an opening extending in a thickness direction, an insulating resin layer that fills the opening to entirely cover all side surfaces of each lead and to support the leads. A first surface of each lead is exposed from a first surface of the insulating resin layer.

DETAILED DESCRIPTION OF EMBODIMENTS

Embodiments will now be described with reference to the attached drawings. To facilitate understanding, the drawings illustrate the features of the embodiments in an enlarged state, and the illustrated components may not be depicted in actual state. Further, the cross-sectional views illustrate some components without hatching lines to facilitate understanding.

First Embodiment

A first embodiment will now be described with reference toFIGS. 1A to 3D.

Structure of Lead Frame of First Embodiment

As illustrated inFIG. 1A, a lead frame1includes a substrate frame2, which is substantially tetragonal as viewed from above. The substrate frame2may be formed from, for example, copper, a copper-base alloy, a Fe—Ni alloy, or a Fe—Ni-base alloy. The substrate frame2has a thickness of, for example, about 0.05 to 0.25 mm.

The substrate frame2includes a plurality of (e.g., three) resin encapsulating areas3, which are isolated from one another. Each resin encapsulating area3contains a matrix of (e.g., 5 by 5) unit lead frames4. A semiconductor element such as a light-emitting element is mounted on each unit lead frame4. Each unit lead frame4is then cut out as a semiconductor device (package). A pair of rails5, which extend in a longitudinal direction (horizontal direction inFIG. 1A), and a pair of rails6, which extend in a lateral direction (vertical direction inFIG. 1A), are arranged along the periphery of each resin encapsulating area3. When assembling such semiconductor devices, molded array packaging is performed for each resin encapsulating area3. This encapsulates the unit lead frames4, on each of which a semiconductor element has been mounted, with resin.

As indicated by the broken lines inFIG. 1B, each unit lead frame4includes a plurality of (e.g., two) leads10and an insulating resin layer20formed between the leads10.

Each lead10may be substantially tetragonal as viewed from above. The leads10arranged in each unit lead frame4extend parallel and proximal to one another in the middle portion of the unit lead frame4. The leads10are physically separated from each other by an opening11formed in the substrate frame2. The opening11also physically separates leads10of adjacent unit lead frames4. In one example, each lead10may have a thickness of, for example, about 0.05 to 0.25 mm, in the same manner as the substrate frame2.

As illustrated inFIG. 1C, the opening11is a through hole extending in the thickness direction of the substrate frame2. In a preferred example, the opening11has a diameter that increases from its end corresponding to a first surface (e.g., upper surface)10A of the lead10toward its end corresponding to a second surface (e.g., lower surface)10B of the lead10. The inner wall surfaces of the opening11are the surfaces of the substrate frame2in the thickness direction, as well as the side surfaces of each lead10.

The insulating resin layer20covers the entire side surfaces10C of each lead10. More specifically, the insulating resin layer20fills the opening11. The insulating resin layer20also covers the lower surface10B of each lead10. The insulating resin layer20has an upper surface20A substantially flush with the upper surface10A of each lead10on which a semiconductor element is to be mounted. The insulating resin layer20supports the leads10. More specifically, the insulating resin layer20supports the leads10arranged in each unit lead frame4on the rails5and6(refer toFIG. 1A).

The insulating resin layer20may be formed from molded resin obtained by, for example, transfer molding, compression molding, or injection molding. The molded resin may be, for example, heat-curable epoxy resin. The thickness of the insulating resin layer20, or the distance from the lower surface10B of the lead10to the lower surface of the insulating resin layer20, may be, for example, about 50 to 150 μm.

Operation

The insulating resin layer20, which covers the entire side surfaces10C of each lead10, supports the leads10. This structure eliminates components used in conventional structures such as support bars and section bars. When the unit lead frames4are singulated by cutting the insulating resin layer20at the positions indicated by the broken lines illustrated inFIG. 1C, the cut surfaces include no exposed side surfaces of the substrate frame2(leads10).

Method for Manufacturing Lead Frame of First Embodiment

As illustrated inFIG. 2A, a conductive substrate50, which serves as a base material for the substrate frame2, is prepared. The conductive substrate50may be a metal plate formed from Cu, a Cu-base alloy, a Fe—Ni alloy, or a Fe—Ni-base alloy. The conductive substrate50may have a thickness of, for example, about 0.05 to 0.25 mm.

In the process (first process) illustrated inFIG. 2B, a tape51is adhered to a first surface (e.g., upper surface)50A of the conductive substrate50. In detail, the tape51, which is formed by a sheet of a tape base51A including an adhesive51B applied to one of its sides, is adhered to the conductive substrate50with the surface51C of the adhesive51B adhered to the upper surface50A. In one example, the sheet of tape51is laminated on the upper surface50A of the conductive substrate50through thermocompression. The tape51may be formed from a material highly resistant to chemicals and to heat. In detail, the tape base51A may be formed from a material with high processability, such as polyimide resin and polyester resin. The adhesive51B may be formed from a material that can easily peel off from an insulating resin layer20(refer toFIG. 1C), which is formed by molding in a subsequent process. The adhesive51B may be formed from a silicone adhesive material, an acrylic adhesive material, and/or an olefin adhesive material. The tape base51A has a thickness of, for example, about 30 to 50 μm. The adhesive51B has a thickness of, for example, about 20 to 30 μm.

In the subsequent process illustrated inFIG. 2C, a resist layer52, which includes openings52X formed in conformance with the openings11, is formed on a second surface (e.g., lower surface)50B of the conductive substrate50. The resist layer52may be formed from a material resistant to etching. In detail, the resist layer52may be formed from a photosensitive dry film resist or a liquid photoresist (dry film resist or liquid resist such as novolac resin or acrylic resin). When a photosensitive dry film resist is used, a dry film of the resist is laminated on the lower surface50B of the conductive substrate50through thermocompression. The dry film is then patterned by exposure and development to form the resist layer52. The resist layer52can also be formed from a liquid photoresist through the same process as described for the dry film resist.

The conductive substrate50undergoes etching performed on its lower surface50B using the resist layer52as an etching mask to form the substrate frame2illustrated inFIG. 2D(second process). More specifically, part of the conductive substrate50exposed through the opening52X of the resist layer52is etched through the lower surface50B to form an opening11in the conductive substrate50. This completes the substrate frame2. The opening11defines the plurality of leads10in each unit lead frame4. When the conductive substrate50is patterned by performing wet etching (isotropic etching), an etchant used in the wet etching process should be selected in accordance with the material of the conductive substrate50. For example, when the conductive substrate50is formed from copper, a ferric chloride solution may be used as the etchant. This allows for spray etching from the lower surface50B of the conductive substrate50to pattern the conductive substrate50. During such patterning performed by wet etching, side etching occurs in the conductive substrate50and the etching proceeds in the in-plane direction of the substrate. This shapes the leads10to have trapezoidal cross-sections. In this process, the tape51functions as an etching stopper layer.

In this process, as described above, when the tape51is adhered, the conductive substrate50is patterned to form the substrate frame2(leads10). Even though the etching leaves only the leads10, the tape51supports the leads10. This differs from the conventional process in which the section bars and the support bars also remain after etching. In other words, the tape51in this process functions as a temporary base for supporting the substrate frame2(leads10) at predetermined positions.

In the process illustrated inFIG. 3A, the resist layer52illustrated inFIG. 2Dis removed with, for example, an alkaline delamination solution.

In the subsequent process (third process) illustrated inFIG. 3B, an insulating resin layer20is formed on the surface51C of the tape51to encapsulate the substrate frame2(specifically, leads10). More specifically, the insulating resin layer20is formed on the surface51C of the tape51to cover the lower surfaces10B and the side surfaces10C of the leads10. The insulating resin layer20can be formed by, for example, resin molding. When a heat-curable resin is used as the material of the insulating resin layer20, the structure illustrated inFIG. 3Ais first placed in a mold. The resin, provided from a gate (not illustrated), is then filled into the corresponding resin encapsulating area3(refer toFIG. 1A), while heating and pressurizing the structure. This forms the insulating resin layer20, which fills the opening11and covers the lower surfaces10B of the leads10as illustrated inFIG. 3B. In this manner, molded array packaging is performed for each resin encapsulating area3to form the insulating resin layer20embedding the leads10on the tape51. The upper surface10A of each lead10and the upper surface20A of the insulating resin layer20, which come in contact with the surface51C of the tape51, are formed to correspond with the surface51C (flat surface) of the tape51. The upper surface10A of each lead10and the upper surface20A of the insulating resin layer20are flat and flush with each other. The resin is filled by, for example, transfer molding or injection molding. During the encapsulation process, the tape51prevents leakage (also referred to as mold flash) of the insulating resin layer20onto the upper surface10A of each lead10.

After the encapsulation, the structure covered by the insulating resin layer20(refer toFIG. 3B) is removed from the mold. The insulating resin layer20formed in this process supports the leads10in each resin encapsulating area3on the rails5and6(refer toFIG. 1A).

In the process (fourth process) illustrated inFIG. 3C, the tape51illustrated inFIG. 3Bis delaminated and removed. However, after removal of the tape51, the adhesive51B on the tape51(refer toFIG. 3B) may partially remain on the upper surface10A of the lead10. The remaining adhesive51B may be eliminated by, for example, performing asking (dry etching using an oxygen plasma). The removal of the tape51exposes the upper surfaces10A of the leads10and the upper surface20A of the insulating resin layer20, which are flush with each other as described above.

The manufacturing processes described above yield the lead frame1having the structure illustrated inFIGS. 1A to 1C, which includes the matrix of unit lead frames4each including the leads10and the insulating resin layer20. In one example, one or more semiconductor elements are mounted onto each unit lead frame4of the lead frame1. The lead frame1then undergoes molded array packaging, which encapsulates the semiconductor devices mounted on the plurality of unit lead frames4. Alternatively, the lead frame1may be first singulated into individual unit lead frames (lead frames)4by cutting the insulating resin layer20at positions indicated by the arrows in the figure with a dicing saw as illustrated inFIG. 3D. One or more semiconductor elements may then be mounted onto each individual unit lead frame4. In this case, the semiconductor elements are encapsulated by molding one individual unit lead frame4at a time.

Advantages

The above embodiment has the advantages described below.

(1) The insulating resin layer20, which covers the entire side surfaces10C of each lead10, supports the leads10. This structure does not include components used in the conventional structures such as support bars and section bars. When these unit lead frames4are singulated by cutting the insulating resin layer20at the positions indicated by the broken lines illustrated inFIG. 1C, the cut surfaces include no exposed side surfaces10C of the leads10(substrate frame2). This prevents the leads10from oxidizing.

(2) Although the conventional semiconductor device80has poor insulation due to metal (leads74) exposed partially on its side surfaces, the lead frame1of the present embodiment covers the entire side surfaces10C of the leads10with the insulating resin layer20after the lead frame1is singulated into individual unit lead frames4. This structure increases the insulation reliability of the unit lead frame4as well as by the semiconductor device including the unit lead frame4.

(3) The conductive substrate50, while adhered to the tape51, is patterned to form the substrate frame2(leads10). Even though only the leads10remain after etching, the tape51supports the leads10. This differs from the conventional process that leaves the section bars and the support bars after etching. Further, the insulating resin layer20encapsulates the leads10, which are supported by the tape51. The tape51is then removed. In this process, the tape51is removed after the insulating resin layer20supporting the leads10is formed. The insulating resin layer20continues to hold (support) the leads10at predetermined positions after the tape51is removes. This structure eliminates the components for supporting the leads10, such as section bars and support bars, which are included in the conventional structures.

Modification of First Embodiment

The first embodiment may be modified in the following forms.

In the first embodiment, the insulating resin layer20may be formed to expose the lower surfaces10B of the leads10. For example, the insulating resin layer20in the structure illustrated inFIG. 3Bmay be thinned until the lower surfaces10B of the leads10are exposed. Alternatively, the structure illustrated inFIG. 3Aand a semi-cured resin sheet on the lower surface of the structure may be arranged between two plates, an upper plate and a lower plate, to pressurize and heat the structure from two sides with a press machine. This melts the resin sheet. The molten resin fills the opening11, forming the insulating resin layer20. At the same time, the lower surfaces10B of the leads10are exposed.

Second Embodiment

A second embodiment will now be described with reference toFIGS. 4A to 5D. A lead frame1A of the present embodiment differs from the lead frame of the first embodiment in that each unit lead frame4A includes a heat radiating plate30. The second embodiment will now be described focusing on differences from the first embodiment.

Structure of Lead Frame of Second Embodiment

As illustrated inFIG. 4B, each unit lead frame4A includes a plurality of leads10, an adhesive layer31, a heat radiating plate30, and a resin layer21.

The adhesive layer31is formed on the lower surfaces10B of the leads10arranged in each unit lead frame4A. More specifically, the adhesive layer31bridges the lower surfaces10B of the opposed leads10arranged in the unit lead frame4A. The adhesive layer31is used to adhere the leads10to the heat radiating plate30and also to insulate the leads10from the heat radiating plate30. The adhesive layer31may be, for example, a heat-curable adhesive, such as an epoxy, polyimide, or silicone adhesive, or a thermosetting adhesive, such as a liquid crystal polymer. The adhesive layer31may be a heat conductive member formed from an organic resin binder containing a filler of highly-conductive inorganic material, such as silica, alumina, and boron nitride. The adhesive layer31may have a thickness of, for example, about 50 to 150 μm.

The heat radiating plate30is adhered to and thermally connected to the leads10by the adhesive layer31. The heat radiating plate30is, for example, flat, and tetragonal as viewed from above. The heat radiating plate30may be formed from, for example, a metal with high heat conductivity or an alloy containing at least one such metal. The heat radiating plate30may be formed from, for example, a ceramic material having high heat conductivity, such as aluminum nitride or alumina. The heat radiating plate30may have a thickness of, for example, about 200 to 500 μm.

The resin layer21covers the entire side surfaces10C of each lead10. More specifically, the resin layer21fills the opening11. The resin layer21also covers the entire side surfaces of the adhesive layer31as well as the entire side surfaces of the heat radiating plate30. More specifically, the resin layer21fills a space S1between adhesive layers31and heat radiating plates30of adjacent unit lead frames4A. The resin layer21has an upper surface21A substantially flush with the upper surfaces10A of the leads10. The resin layer21has a lower surface21B substantially flush with a lower surface30B of the heat radiating plate30. The resin layer21supports the leads10arranged in the corresponding unit lead frame4A on the rails5and6(refer toFIG. 1A).

The resin layer21may be formed from molded resin obtained by, for example, transfer molding, compression molding, or injection molding. The molded resin may be, for example, heat-curable epoxy resin. Preferably, the molded resin forming the resin layer21has a high heat conductivity. The thickness of the resin layer21, from the upper surface21A to the lower surface21B, may be, for example, about 400 to 800 μm.

Method for Manufacturing Lead Frame of Second Embodiment

In the process illustrated inFIG. 5A, the substrate frame2(leads10) on which the tape51is adhered is prepared through the same processes as illustrated inFIGS. 2A to 3A. Subsequently, an adhesive layer31and a heat radiating plate30are placed on the lower surface of this structure. More specifically, the adhesive layer31and the heat radiating plate30are stacked on the lower surface of the structure so that the upper surface of the adhesive layer31faces the lower surfaces10B of the leads10and the upper surface30A of the heat radiating plate30faces the lower surface of the adhesive layer31. In other words, the structure, the adhesive layer31, and the heat radiating plate30are stacked so that the adhesive layer31is sandwiched between the leads10and the heat radiating plate30. The adhesive layer31is in the B-stage (semi-cured).

The structure, the adhesive layer31, and the heat radiating plate30in the above arrangement are heated and pressurized. This causes the upper surface of the adhesive layer31to come in contact with the lower surfaces10B of the leads10and the upper surface30A of the heat radiating plate30to come in contact with the lower surface of the adhesive layer31. The adhesive layer31is cured to adhere the heat radiating plate30to the leads10. In one example, the structure illustrated inFIG. 3A, the adhesive layer31, and the heat radiating plate30stacked together as described above may be arranged between two paired heating plates, and the structure may be heated and pressurized from its upper and lower sides using, for example, a vacuum press. This forms the integrated structure illustrated inFIG. 5A.

In the process (third process) illustrated inFIG. 5B, molded array packaging is performed to form the resin layer21, which fills the opening11and the space S1between adhesive layers31and heat radiating plates30of adjacent unit lead frames4A. When a heat-curable resin is used as the material of the resin layer21, the structure illustrated inFIG. 5Ais first placed in a mold. The resin, provided from the gate (not illustrated), is then filled into the corresponding resin encapsulating area3(refer toFIG. 1A), while the structure is being heated and pressurized. This forms the resin layer21, which fills the opening11and the space S1. The resin may be filled by, for example, transfer molding or injection molding.

In the process (fourth process) illustrated inFIG. 5C, the tape51illustrated inFIG. 5Bis removed. This exposes the upper surfaces10A of the leads10and the upper surface21A of the resin layer21.

The manufacturing processes described above yield the lead frame1A having the structure illustrated inFIGS. 4A and 4B, which includes the matrix of unit lead frames4A each including the leads10, the adhesive layer31, the heat radiating plate30, and the resin layer21. In one example, one or more semiconductor devices are mounted on each unit lead frame4A of the lead frame1A. The lead frame1A then undergoes molded array packaging, which encapsulates the semiconductor elements mounted on each unit lead frame4A. Alternatively, the lead frame1A may be first singulated into individual unit lead frames (lead frames)4A by cutting the resin layer21at positions indicated by the arrows in the figure with a dicing saw as illustrated inFIG. 5D. One or more semiconductor elements may then be mounted on each individual unit lead frame4A.

Advantages

The above embodiment has the advantage described below in addition to advantages (1) to (3) of the first embodiment.

(4) The heat radiating plate30is arranged on the lower surface10B of each lead10by means of the adhesive layer31. When, for example, one or more semiconductor elements are mounted on each unit lead frame4A of the lead frame1A, the heat radiating plate30efficiently radiates heat generated during operation of the semiconductor elements.

Modification of Second Embodiment

The second embodiment may be modified in the following forms.

In the second embodiment, each individual unit lead frame4A includes a single heat radiating plate30. However, there is no limitation to such a structure. For example, a single heat radiating plate may be commonly shared by a plurality of unit lead frames4A. One example of a method for manufacturing a lead frame of this modification will now be described with reference toFIGS. 6A to 6D.

In the process illustrated inFIG. 6A, an adhesive layer32and a heat radiating plate33are arranged on the lower surface of the structure illustrated inFIG. 3A. More specifically, the structure, the adhesive layer32, and the heat radiating plate33are stacked so that the adhesive layer32is sandwiched between a plurality of leads10arranged in a plurality of unit lead frames4A and the heat radiating plate33. The adhesive layer32and the heat radiating plate33may have substantially the same size and the same shape as viewed from above as the resin encapsulating area3(refer toFIG. 1A), for example. More specifically, the adhesive layer32and the heat radiating plate33are commonly shared by the plurality of unit lead frames4A arranged in each resin encapsulating area. The adhesive layer32is in the B-stage (semi-cured).

The structure, the adhesive layer32, and the heat radiating plate33in the above arrangement are heated and pressurized. This causes the upper surface of the adhesive layer32to come in contact with the lower surfaces10B of the leads10, and the upper surface of the heat radiating plate33to come in contact with the lower surface of the adhesive layer32. The adhesive layer32is cured to adhere the heat radiating plate33to the leads10. This forms the integrated structure illustrated inFIG. 6A.

In the process illustrated inFIG. 6B, molded array packaging is performed to form a resin layer22in the opening11. In the subsequent process illustrated inFIG. 6C, the tape51illustrated inFIG. 6Bis removed. These processes yield the lead frame including the matrix of unit lead frames4A each including the leads10, the resin layer22, the adhesive layer32, and the heat radiating plate33.

The unit lead frames4A may be singulated by, for example, cutting the resin layer22, the adhesive layer32, and the heat radiating plate33at positions indicated by the arrows in the drawing with a dicing saw. This yields individual unit lead frames (lead frames)4A, one of which is illustrated inFIG. 6D.

The manufacturing processes described above form the single adhesive layer32and the single heat radiating plate33for the plurality of unit lead frames4A. This enables easy positioning of the adhesive layer32and the heat radiating plate33with the leads10.

In this modification, the adhesive layer32may be formed from a thick material so that the adhesive layer32can be filled into the opening11in the process illustrated inFIG. 6A. This method eliminates the process for forming the resin layer22.

Alternatively, a lead frame including a single heat radiating plate for a plurality of unit lead frames4A may be formed through the manufacturing processes illustrated inFIGS. 7A to 7D.

In detail, in the process illustrated inFIG. 7A, the adhesive layer31and the heat radiating plate33are arranged on the lower surface of the structure illustrated inFIG. 3A. More specifically, the structure, the adhesive layer31, and the heat radiating plate33are stacked so that the adhesive layer31is sandwiched between a plurality of leads10arranged in a plurality of unit lead frames4A and the heat radiating plate33. The adhesive layer31bridges the lower surfaces10B of facing leads10arranged in each unit lead frame4A. In other words, the adhesive layer31is arranged for each unit lead frame4A. The heat radiating plate33is commonly shared by a plurality of unit lead frames4A arranged in one resin encapsulating area3(refer toFIG. 1A). The adhesive layer31is in the B-stage (semi-cured).

The structure, the adhesive layer31, and the heat radiating plate33in the above arrangement are heated and pressurized. As illustrated inFIG. 7A, this causes the upper surface of the adhesive layer31to come in contact with the lower surfaces10B of the leads10and the upper surface of the heat radiating plate33to come in contact with the lower surface of the adhesive layer31. The adhesive layer31is cured to adhere the heat radiating plate33to the leads10. This forms the integrated structure illustrated inFIG. 7A.

In the process illustrated inFIG. 7B, molded array packaging is performed to form a resin layer23, which fills the opening11and a space S2between adhesive layers31of adjacent unit lead frames4A. In the subsequent process illustrated inFIG. 7C, the tape51illustrated inFIG. 7Bis removed. These processes yield the lead frame including the matrix of unit lead frames4A each including the leads10, the resin layer22, the adhesive layer31, and the heat radiating plate33.

The unit lead frames4A may be singulated by, for example, cutting the resin layer23and the heat radiating plate33at positions indicated by the arrows in the figure with a dicing saw. This yields individual unit lead frames (lead frames)4A, one of which is illustrated inFIG. 7D.

The manufacturing processes described above form the single heat radiating plate33for the plurality of unit lead frames4A. This enables easy positioning of the heat radiating plate33with the leads10.

Third Embodiment

A third embodiment will now be described with reference toFIGS. 8A to 10D. A lead frame1B of the present embodiment differs from the lead frame of the second embodiment in that each unit lead frame4B includes plating layers40formed on the leads10. The third embodiment will now be described focusing on differences from the second embodiment.

Structure of Lead Frame of Third Embodiment

As illustrated inFIG. 8B, each unit lead frame4B includes leads10, a resin layer21, an adhesive layer31, a heat radiating plate30, and plating layers40(first plating layers).

Each plating layer40is formed to cover a portion of the upper surface10A of the lead10. The plating layer40also covers part of the upper surface21A of the resin layer21formed between the facing leads10arranged in each unit lead frame4B. An opening40X, which has a narrower opening width than the opening11, is formed between the facing plating layers40arranged in each unit lead frame4A. As illustrated inFIG. 8A, each plating layer40is substantially tetragonal as viewed from above. The plating layer40may be a metal layer including a laminate of a Ni layer and an Au layer formed on the upper surface10A of the corresponding lead10in the stated order. The plating layer40may alternatively be a laminate of Ni, Pd, and Au layers arranged in the stated order, a laminate of Ni, Pd, and Ag layers arranged in the stated order, or a laminate of Ni, Pd, Ag, and Au layers arranged in the stated order. The Ni layer is a metal layer formed from Ni or a Ni alloy. The Au layer is a metal layer formed from Au or an Au alloy. The Pd layer is a metal layer formed from Pd or a Pd alloy. The Ag layer is a metal layer formed from Ag or an Ag alloy. It is preferable that the lowest metal layer contained in the plating layer40is formed from a metal having high hardness, such as Ni. When, for example, the plating layer40is a Ni—Au laminate layer, the Ni layer may have a thickness of about 1 to 10 μm, and the Au layer may have a thickness of about 0.1 to 1 μm. The opening40X may have a width of, for example, about 20 to 100 μm.

Method for Manufacturing Lead Frame of Third Embodiment

A conductive substrate50, which is a base material for the substrate frame2, is prepared as illustrated inFIG. 9A.

In the subsequent process (fifth process) illustrated inFIG. 9B, a resist layer53(first resist layer) having an opening pattern53X (first opening pattern) is formed at a predetermined position on the upper surface50A of the conductive substrate50. The opening pattern53X is formed to expose part of the conductive substrate50corresponding to where the plating layers40are to be formed. The resist layer53may be formed from a material resistant to plating. More specifically, the resist layer53may be formed from a photosensitive dry film or a liquid photoresist (dry film resist or liquid resist such as novolac resin or acrylic resin). When a photosensitive dry film resist is used, a dry film of the resist is laminated on the upper surface50A of the conductive substrate50through thermocompression. The dry film is then patterned by photolithography to form the resist layer53. The resist layer53can also be formed from a liquid photoresist through the same process as described for the dry film resist.

In the subsequent process (sixth process) illustrated inFIG. 9C, the upper surface50A of the conductive substrate50is electrolytically plated by using the resist layer53as a plating mask. More specifically, parts of the upper surface50A of the conductive substrate50exposed through the opening pattern53X of the resist layer53are electrolytically plated to form the plating layers40on the conductive substrate50. When, for example, the plating layer40is a Ni—Au layer, a Ni layer and an Au layer are formed in the stated order by electrolytic plating on the parts of the upper surface50A of the conductive substrate50exposed through the opening pattern53X of the resist layer53. The resist layer53is removed by using, for example, an alkaline delamination solution.

In the subsequent process (first process) illustrated inFIG. 9D, the tape51is adhered to the upper surface50A of the conductive substrate50. In detail, the tape51, which is formed by a sheet of a tape base51A having an adhesive51B applied to one side, is adhered to the conductive substrate50. The surface51C of the adhesive51B is adhered to the upper surface50A. It is preferable that the adhesive51B is thicker than the plating layer40. More specifically, the plating layer40has a thickness of, for example, about 1 to 11 μm. The adhesive51B has a thickness of, for example, about 20 to 30 μm. By setting the thickness in such a manner, the plating layers40are pressed into the adhesive51B when, for example, the sheet of tape51is laminated onto the upper surface50A of the conductive substrate50through thermocompression. The adhesive51B covers the entire side surfaces and the entire upper surfaces of the plating layers40. With the plating layers40being pressed in the adhesive51B, the adhesive51B covers irregularities on the upper surface50A of the conductive substrate50, which occur due to the formation of the plating layers40. This structure prevents the adhesiveness and the contact between the tape51and the conductive substrate50from decreasing due to such irregularities.

In the subsequent process (second process) illustrated inFIG. 9E, the resist layer52is formed on the lower surface50B of the conductive substrate50by the same processes as illustrated inFIGS. 2C and 2D. The conductive substrate50undergoes etching performed on its lower surface50B using the resist layer52as an etching mask to form the opening11. The opening11defines a plurality of leads10in each unit lead frame4B, and exposes a portion of the lower surface of each plating layer40. The lowest layer included in the plating layer40is formed from a metal having a high hardness, and is supported by the adhesive51B of the tape51. This structure prevents the plating layers40from deforming (e.g., sagging) when the plating layers40exposed through the opening11become separated from the leads10. An etchant used in this process should be selected in accordance with the material of the conductive substrate50. For example, when the conductive substrate50is formed from copper, a ferric chloride solution may be used as the etchant. This allows for spray etching, or spraying the etchant onto the lower surface50B of the conductive substrate50to achieve the above patterning. In this etching process, the tape51and the plating layers40function as etching stopper layers.

In the subsequent process illustrated inFIG. 10A, the adhesive layer31and the heat radiating plate30are arranged on the lower surface of the structure illustrated inFIG. 9E. More specifically, the adhesive layer31and the heat radiating plate30are stacked on the lower surface of the structure so that the upper surface of the adhesive layer31faces the lower surfaces10B of the leads10and the lower surface of the adhesive layer31faces the upper surface of the heat radiating plate30. In other words, the structure, the adhesive layer31, and the heat radiating plate30are stacked so that the adhesive layer31is sandwiched between the leads10and the heat radiating plate30. The adhesive layer31is in the B-stage (semi-cured).

The structure, the adhesive layer31, and the heat radiating plate30in the above arrangement are heated and pressurized. As illustrated inFIG. 10A, this causes the upper surface of the adhesive layer31to come in contact with the lower surfaces10B of the leads10, and the upper surface of the heat radiating plate30to come in contact with the lower surface of the adhesive layer31. The adhesive layer31is cured to adhere the heat radiating plate30to the leads10. This forms the integrated structure illustrated inFIG. 10A.

In the subsequent process (third process) illustrated inFIG. 10B, molded array packaging is performed to form the resin layer21, which fills the opening11and the space S1between adhesive layers31and heat radiating plates30of adjacent unit lead frames4B. This causes a portion of the lower surface of each plating layer40exposed through the opening11to be covered by the resin layer21. In the process (fourth process) illustrated inFIG. 10C, the tape51illustrated inFIG. 10Bis removed.

The manufacturing processes described above yield the lead frame1B having the structure illustrated inFIGS. 8A and 8B, which includes the matrix of unit lead frames4B each including the leads10, the plating layers40, the adhesive layer31, the heat radiating plate30, and the resin layer21. In one example, one or more semiconductor devices are mounted on each unit lead frame4B of the lead frame1B. The lead frame1B then undergoes molded array packaging, which encapsulates the semiconductor elements mounted on each unit lead frame4B. Alternatively, the lead frame1B may be first singulated into individual unit lead frames (lead frames)4B as illustrated inFIG. 10Dby cutting the resin layer21at positions indicated by the arrows with a dicing saw. One or more semiconductor elements may then be mounted on each individual unit lead frame4B.

Advantages

The above embodiment has the advantage described below in addition to advantages (1) to (3) of the first embodiment and advantage (4) of the second embodiment.

The plating layers40are arranged on the upper surfaces10A of the leads10. This improves the contact between the unit lead frame4B of the lead frame1B and the semiconductor elements mounted on the unit lead frame4B (reliability of wire bonding or solder joints).

(6) The resist layer53having the opening pattern53X, which is formed by photolithography, is formed on the lower surface50B of the conductive substrate50, and the plating layers40are formed on parts of the conductive substrate50exposed through the opening pattern53X by electrolytic plating performed using the conductive substrate50as a power supply layer. The opening pattern53X, which determines the shape of the plating layers40, is formed in the resist layer53by photolithography. This enables the opening pattern53X and the plating layer40to be accurately shaped with the desired shape (designed shape) as viewed from above. Even when the designed pitch of the plating layers40is so narrow that the plating layers40cannot be formed by etching, the plating layers40allowing for such narrower pitches can be formed with high accuracy through photolithography and patterning.

(7) The adhesive51B of the tape51is thicker than the plating layer40. This causes the plating layers40to be pressed into the adhesive51B when the sheet of tape51is laminated onto the upper surface50A of the conductive substrate50through thermocompression. With the plating layers40being pressed into the adhesive51B, the adhesive51B covers irregularities on the upper surface50A of the conductive substrate50, which occur due to the formation of the plating layers40. This structure prevents the adhesiveness and the contact between the tape51and the conductive substrate50from decreasing due to such irregularities.

Modification of Third Embodiment

The third embodiment may be modified in the following forms.

In the third embodiment, the heat radiating plate30and the adhesive layer31may be omitted. An example of a method for manufacturing a lead frame of this modification will now be described with reference toFIGS. 11A to 11D.

In the process illustrated inFIG. 11A, the resist layer52of the structure illustrated inFIG. 9Eis removed by using an alkaline delamination solution. In the subsequent process illustrated inFIG. 11B, the resin layer20is formed on the surface51C of the tape51to encapsulate the substrate frame2(more specifically, leads10). Molded array packaging is performed for each resin encapsulating area3(refer toFIG. 1A) to form the resin layer20embedding the leads10on the tape51. This forms the resin layer20, which fills the opening11and covers the lower surfaces10B of the leads10as illustrated inFIG. 11B. The resin layer20covers parts of the lower surfaces of the plating layers40exposed through the opening11.

In the subsequent process illustrated inFIG. 11C, the tape51illustrated inFIG. 11Bis removed. These processes yield the lead frame including the matrix of unit lead frames4B each including the leads10, the plating layers40, and the resin layer22.

The unit lead frames4B may be singulated by, for example, cutting the resin layer20at positions indicated by the arrows with a dicing saw. This yields individual unit lead frames (lead frames)4B, one of which is illustrated inFIG. 11D.

In the modification illustrated inFIGS. 11A to 11D, the resin layer20may be formed to expose the lower surfaces10B of the leads10. For example, the resin layer20may be thinned until the lower surfaces10B of the leads10are exposed after the structure illustrated inFIG. 11Bis formed.

Fourth Embodiment

A fourth embodiment will now be described with reference toFIGS. 12A to 14D. A lead frame1C of the present embodiment differs from the lead frame of the third embodiment in that each unit lead frame4C includes plating layers41formed on the lower surfaces10B of the leads10. The fourth embodiment will be described focusing on differences from the third embodiment.

Structure of Lead Frame of Fourth Embodiment

As illustrated inFIG. 12B, each unit lead frame4C includes leads10, plating layers40, plating layers41(second plating layers), a resin layer24, an adhesive layer31, and a heat radiating plate30.

The plating layers41cover the lower surfaces10B of the leads10. Although not illustrated in the drawings, the plating layers41are substantially tetragonal as viewed from above in the same manner as the leads10. The plating layer41is slightly larger than the lower surface10B of the lead10as viewed from above. Thus, as illustrated inFIG. 12B, the plating layer41has a peripheral portion projecting from the periphery of the lower surface10B of the corresponding lead10. The peripheral portion of the plating layer41protrudes like a flange from the lower surface10B of the lead10. An opening41X is formed between the opposing facing plating layers41in each unit lead frame4C. The opening41X has a smaller width than an end portion of the opening11opposed to the plating layers41.

The plating layer41may be a metal layer including a laminate of a Ni layer and an Au layer formed on the lower surface10B of the corresponding lead10in the stated order. The plating layer41may alternatively be a laminate of Ni, Pd, and Au layers arranged in the stated order, a laminate of Ni, Pd, and Ag layers arranged in the stated order, or a laminate of Ni, Pd, Ag, and Au layers arranged in the stated order. When, for example, the plating layer41is a Ni—Au laminate layer, the Ni layer may have a thickness of about 1 to 10 μm, and the Au layer may have a thickness of about 0.1 to 1 μm. The opening41X may have a width of, for example, about 20 to 100 μm.

The adhesive layer31is formed on the lower surfaces41B of the plating layers41arranged in the unit lead frame4C. More specifically, the adhesive layer31bridges the lower surfaces41B of the facing plating layers41arranged in the unit lead frame4C. The adhesive layer31is used to adhere the plating layers41to the heat radiating plate30and also to insulate the plating layers41from the heat radiating plate30.

The resin layer24fills the opening11to cover the entire side surfaces10C of the leads10. Also, the resin layer24covers the entire side surfaces of the plating layers41. More specifically, the resin layer24fills the opening41X. Thus, the resin layer24is engaged with the peripheral edge of each plating layer41. In detail, the space including the opening11and the opening41X, which are filled with the resin layer24, is defined by steps each formed by the periphery of the plating layer41and by the side surfaces10C of the lead10. When the resin layer24fills the space defined by the steps, the resin layer24is engaged with the upper surface of the peripheral edge of each plating layer41. This increases the contact between the resin layer24and the substrate frame2, and prevents the resin layer24from being separated from the opening11.

The resin layer24further covers the side surfaces of the adhesive layer31and the side surfaces of the heat radiating plate30. More specifically, the resin layer24fills a space S1formed between adhesive layers31and heat radiating plates30of adjacent unit lead frames4C. The resin layer24has an upper surface24A substantially flush with the upper surfaces10A of the leads10. The resin layer24has a lower surface24B substantially flush with the lower surface of the heat radiating plate30. The resin layer24supports the plurality of leads10arranged in each unit lead frame4C on the rails5and6(refer toFIG. 1A).

Method for Manufacturing Lead Frame of Fourth Embodiment

In the process (fifth process) illustrated inFIG. 13A, a resist layer53, which has an opening pattern53X at a predetermined position, is formed on the upper surface50A of the conductive substrate50. A resist layer54(second resist layer), which has an opening pattern54X (second opening pattern) at a predetermined position, is formed on the lower surface50B of the conductive substrate50. These opening patterns53X and54X are formed to expose parts of the conductive substrate50corresponding to where the plating layers40and41are to be formed. The resist layers53and54may be formed from a material resistant to plating. In detail, the resist layers53and54may be formed from a photosensitive dry film resist or a liquid photoresist (dry film resist or liquid resist such as novolac resin or acrylic resin).

In the subsequent process (sixth process) illustrated inFIG. 13B, the upper surface50A and the lower surface50B of the conductive substrate50are electrolytically plated by using the resist layers53and54as plating masks and using the conductive substrate50as a plating power supply layer. More specifically, parts of the upper surface50A of the conductive substrate50exposed through the opening pattern53X of the resist layer53are electrolytically plated to form the plating layers40on the conductive substrate50. Also, parts of the lower surface50B of the conductive substrate50exposed through the opening pattern54X of the resist layer54are electrolytically plated to form the plating layers41on the lower surface50B of the conductive substrate50. When, for example, the plating layers40and41are Ni—Au layers, a Ni layer and an Au layer are formed in the stated order by electrolytic plating portions of the upper surface50A and the lower surface50B of the conductive substrate50exposed through the opening patterns53X and54X of the resist layers53and54. The resist layers53and54are removed by using, for example, an alkaline delamination solution.

In the subsequent process (first process) illustrated inFIG. 13C, the tape51is adhered to the upper surface50A of the conductive substrate50.

The conductive substrate50undergoes etching performed on its lower surface50B using the plating layers41as an etching mask to form the opening11as illustrated inFIG. 13D(second process). The opening11defines a plurality of leads10in each unit lead frame4C, and also exposes part of the lower surface of each plating layer40through the opening11. When the conductive substrate50is patterned by wet etching (isotropic etching), an etchant used in the wet etching process should be selected in accordance with the material of the conductive substrate50. For example, when the conductive substrate50is formed from copper, a ferric chloride solution may be used as the etchant. This allows for spray etching, or spraying the etchant onto the lower surface50B of the conductive substrate50to achieve the above patterning. During such patterning performed by wet etching, side etching occurs in the conductive substrate50, and the etching proceeds in the in-plane direction of the conductive substrate50. This shapes the leads10to have trapezoidal cross-sections. More specifically, the wet etching (isotropic etching) proceeds not only in the direction perpendicular to the mask (plating layers41) but also in the direction parallel to the mask. The part of the lead10immediately above the peripheral portion of each plating layer41is also etched as illustrated inFIG. 13D. This partially removes the side surfaces of the leads10so that the leads10recede from the ends of the plating layers41. In other words, this forms an overhang structure, in which the peripheral portion of the plating layer41under the lead10protrudes from the lower surface10B of the lead10.

In the process illustrated inFIG. 14A, an adhesive layer31and a heat radiating plate30are arranged on the lower surface of the structure illustrated inFIG. 13B. More specifically, the adhesive layer31and the heat radiating plate30are stacked on the lower surface of the structure so that the upper surface of the adhesive layer31faces the lower surfaces41B of the plating layers41, and the upper surface30A of the heat radiating plate30faces the lower surface of the adhesive layer31. In other words, the structure, the adhesive layer31, and the heat radiating plate30are stacked so that the adhesive layer31is sandwiched between the plating layers41and the heat radiating plate30. The adhesive layer31is in the B-stage (semi-cured).

The structure, the adhesive layer31, and the heat radiating plate30in the above arrangement are heated and pressurized. This causes the upper surface of the adhesive layer31to come in contact with the lower surfaces41B of the plating layers41, and the upper surface30A of the heat radiating plate30to come in contact with the lower surface of the adhesive layer31. The adhesive layer31is cured to adhere the heat radiating plate30to the plating layers41. This forms the integrated structure illustrated inFIG. 14A.

In the process (third process) illustrated inFIG. 14B, molded array packaging is performed to form the resin layer24, which fills the space S1between adhesive layers31and heat radiating plates30of adjacent unit lead frames4C, the opening11, and an opening41X between the plating layers41. This forms the resin layer24in the space including the opening11and the opening41X having a smaller opening width than the opening11, that is, the space defined by the steps each formed by the peripheral portion of the plating layer41and by the side surfaces of the corresponding lead10. In the subsequent process (fourth process) illustrated inFIG. 14C, the tape51illustrated inFIG. 14Bis removed.

The manufacturing processes described above yield the lead frame1C having the structure illustrated inFIGS. 12A and 12B, which includes the matrix of unit lead frames4C each including the leads10, the plating layers40and41, the adhesive layer31, the heat radiating plate30, and the resin layer24. In one example, one or more semiconductor devices are mounted on each unit lead frame4C of the lead frame1C. The lead frame1C then undergoes molded array packaging, which encapsulates the semiconductor elements mounted on the unit lead frames4C. Alternatively, the lead frame1C may be first singulated into individual unit lead frames (lead frames)4C by cutting the resin layer24at positions indicated by the arrows with a dicing saw as illustrated inFIG. 14D. One or more semiconductor elements may then be mounted on each individual unit lead frame4C.

Advantages

The above embodiment has the advantage described below in addition to advantages (1) to (3) of the first embodiment, advantage (4) of the second embodiment, and advantages (5) to (7) of the third embodiment.

(8) The plating layer41, which is slightly larger than the lower surface10B of the lead10, covers the lower surface10B of the lead10. The resin layer24is formed in the space including the opening11and the opening41X having a smaller opening width than the opening11, or in the space defined by the steps each formed by the peripheral portion of the plating layer41and by the side surfaces of the lead10. When the resin layer24is formed in the space defined by the steps, the resin layer24is engaged with the upper surface of the peripheral edge of each plating layer41. This increases the contact between the resin layer24and the substrate frame2, and prevents the resin layer24from being separating through the opening11.

(9) The plating layers41are formed on the lower surface50B of the conductive substrate50before the tape51is adhered to the conductive substrate50. The conductive substrate50undergoes etching using the plating layers41as an etching mask. This eliminates the need to form a resist layer by photolithography after the tape51is adhered to the conductive substrate50, and thus reduces damage to the tape51.

Modification of Fourth Embodiment

The fourth embodiment may be modified in the following forms.

In the fourth embodiment, the heat radiating plate30and the adhesive layer31may be omitted. An example of a method for manufacturing a lead frame of this modification will now be described with reference toFIGS. 15A to 15D.

In the process illustrated inFIG. 15A, the same structure as illustrated inFIG. 13Dis formed by the same processes as illustrated inFIGS. 13A to 13D. In the subsequent process illustrated inFIG. 15B, a resin layer25is formed on the surface51C of the tape51to encapsulate the substrate frame2(more specifically, leads10) and the plating layers41. More specifically, molded array packaging is performed for each resin encapsulating area3(refer toFIG. 1A) to form the resin layer25embedding the leads10on the tape51and the plating layers41. This forms the resin layer25, which fills the openings11and41X and covers the lower surfaces41B of the plating layers41as illustrated inFIG. 15B. The resin layer25fills the space including the opening11and the opening41X having a smaller opening width than the opening11, or the space defined by the steps each formed by the peripheral portion of the plating layer41and by the side surfaces of the lead10.

In the subsequent process illustrated inFIG. 15C, the tape51illustrated inFIG. 15Bis removed. These processes yield the lead frame including the matrix of unit lead frames4C each including the leads10, the plating layers40and41, and the resin layer25.

The unit lead frames4C may be singulated by, for example, cutting the resin layer25at positions indicated by the arrows with a dicing saw. This yields individual unit lead frames (lead frames)4C, one of which is illustrated inFIG. 15D.

In the modification illustrated inFIGS. 15A to 15D, the resin layer25may be formed to expose the lower surfaces41B of the plating layers41. For example, the resin layer25may be thinned until the lower surfaces41B of the plating layers41are exposed after the structure illustrated inFIG. 15Bis formed.

Fifth Embodiment

A fifth embodiment will now be described with reference toFIGS. 16A to 18D. A lead frame1D of the present embodiment differs from the lead frame of the second embodiment in that each unit lead frame4D includes plating layers42(first plating layers42) embedded in the leads10, and the lower surfaces10B of the leads10have projections and recesses. The fifth embodiment will now be described focusing on differences from the second embodiment.

Structure of Lead Frame of Fifth Embodiment

As illustrated inFIG. 16B, each unit lead frame4D includes leads10, plating layers42, a resin layer26, an adhesive layer31, and a heat radiating plate30.

Each lead10includes a recess10X formed at a predetermined position in its upper surface10A (single recess inFIG. 16B). The recess10X extends from the upper surface10A to a predetermined level in the thickness direction of the lead10. That is, the recess10X has a bottom surface at an intermediate position in the thickness direction of the lead10. As illustrated inFIG. 16A, the recess10X is, for example, tetragonal as viewed from above. The recess10X extends at a middle position in the lateral direction of the lead10. Thus, as illustrated inFIG. 16B, the recess10X has its side surfaces formed by the lead10.

Each lead10also includes recesses10Y having a small diameter at predetermined positions (five recesses inFIG. 16B). Each recess10Y extends from the lower surface10B of the lead10to a predetermined level in the thickness direction of the lead10. The recess10Y has a bottom surface at an intermediate position in the thickness direction of the lead10. The recess10Y has, for example, a substantially trapezoidal cross-section. In this manner, multiple recesses10Y, each having a small diameter, are formed in the lower surface10B of the lead10to form ridges and valleys in the lower surface10B of the lead10. The bumpy surface having ridges and valleys differs from a roughened surface, which can be formed by roughening the lower surface10B of the lead10. Although not illustrated, the recess10Y may be, for example, circular as viewed from above. The recess10Y may have, at its opening, a diameter of, for example, about 10 μm. The recesses10Y may be in a zigzag or matrix arrangement as viewed from above.

The plating layer42is formed in each recess10X of the lead10. The plating layer42has an upper surface42A substantially flush with the upper surface10A of the lead10. The side surfaces of the plating layer42are covered by the lead10forming the side walls of the recess10X. In this manner, the plating layer42is embedded in the lead10. As illustrated inFIG. 16A, the plating layer41is substantially tetragonal as viewed from above in the same manner as the lead10.

The plating layer42may be a metal layer including a laminate of a Ni layer and an Au layer formed on the bottom surface of the recess10X in the stated order. The plating layer42may alternatively be a laminate of Ni, Pd, and Au layers arranged in the stated order, a laminate of Ni, Pd, and Ag layers arranged in the stated order, or a laminate of Ni, Pd, Ag, and Au layers arranged in the stated order. When, for example, the plating layer42is a Ni—Au laminate layer, the Ni layer may have a thickness of about 1 to 10 μm, and the Au layer may have a thickness of about 0.1 to 1 μm.

The adhesive layer31is formed on the lower surfaces10B of the leads10arranged in the unit lead frame4D. More specifically, the adhesive layer31bridges the lower surfaces10B of the opposed leads10arranged in the unit lead frame4D. The adhesive layer31fills the recesses10Y, which are formed in the lower surface of the lead10. The adhesive layer31is mechanically engaged with each lead10. This increases the contact between the adhesive layer31and the lead10, and prevents the adhesive layer31and the heat radiating plate30from separating off the lead10.

Method for Manufacturing Lead Frame of Fifth Embodiment

As illustrated inFIG. 17A, a conductive substrate50, which serves as a base material for the substrate frame2, is prepared.

In the process illustrated inFIG. 17B, a resist layer55, which has an opening pattern55X at a predetermined position, is formed on the upper surface50A of the conductive substrate50. The opening pattern55X is formed to expose parts of the conductive substrate50corresponding to where the recesses10X are to be formed. The resist layer55may be formed from a material resistant to etching and plating. The resist layer55may be formed from a photosensitive dry film resist or a liquid photoresist (dry film resist or liquid resist such as novolac resin or acrylic resin). When a photosensitive dry film resist is used, a dry film of the resist is laminated on the upper surface50A of the conductive substrate50through thermocompression. The dry film is then patterned by photolithography to form the resist layer55. The resist layer55can also be formed from a liquid photoresist by the same process as described for the dry film resist.

Subsequently, the conductive substrate50undergoes half etching using the resist layer52as an etching mask, in which parts of the conductive substrate50exposed through the opening pattern55X are etched. This removes portions to a predetermined depth from the conductive substrate50, and forms portions of the conductive substrate50exposed through the opening pattern55X in the recesses10X. An etchant used in this process should be selected in accordance with the material of the conductive substrate50. In one example, when the conductive substrate50is formed from copper and the recess10X has a depth of less than 5 μm, persulfate may be preferably used as the etchant. In another example, when the conductive substrate50is formed from copper and the recess10X has a depth of 5 μm or greater, a ferric chloride solution or a copper chloride solution may be preferably used as the etchant. The recesses10X may be formed by methods other than etching (half etching). For example, the recesses10X may be formed through pressing.

In the subsequent process illustrated inFIG. 17C, the upper surface50A of the conductive substrate50is electrolytically plated by using the resist layer55as a plating mask. More specifically, parts of the conductive substrate50exposed through the opening pattern55X of the resist layer55, or the recesses10X, are electrolytically plated to form the plating layers42in the recesses10X. When, for example, the plating layer42is a Ni—Au layer, a Ni layer and an Au layer are formed in the stated order by electrolytic plating the bottom surfaces of the recesses10X exposed through the opening pattern55X of the resist layer55. In the present example, the plating layer42is formed to have the highest layer (e.g., Au layer) substantially flush with the upper surface50A of the conductive substrate50. The plating layer42formed in the recess10X may have its upper surface42A lower than, or recessed from, the upper surface50A of the conductive substrate50. Alternatively, the plating layer42formed in the recess10X may have its upper surface42A higher than, or protruded from, the upper surface50A of the conductive substrate50. When the upper surface42A of the plating layer42protrudes from the upper surface50A of the conductive substrate50, it is preferable that the degree by which the plating layer42protrudes is less than the thickness of the adhesive51B, which is used in a subsequent process.

The resist layer55is removed by using, for example, an alkaline delamination solution.

In the subsequent process (first process) illustrated inFIG. 17D, the tape51is adhered to the upper surface50A of the conductive substrate50. In detail, the tape51, which is formed by a film of a tape base51A having an adhesive51B applied to one side, is adhered to the conductive substrate50with the surface51C of the adhesive51B adhered to the upper surface50A. The upper surface50A of the conductive substrate50is substantially flush with the upper surface42A of the plating layer42. Thus, the adhesive51B on the tape51can be thin. For example, the adhesive51B may have a thickness of, for example, 1 to 5 μm. The surfaces on which the adhesive51B is placed (the upper surface50A of the conductive substrate50and the upper surface42A of the plating layer42) are flat surfaces with small irregularities. Even when the adhesive51B is thin, this structure prevents the adhesiveness and the contact between the tape51and the conductive substrate50, which are adhered to each other by the adhesive51B, from decreasing due to such irregularities.

In the subsequent process illustrated inFIG. 17E, the resist layer56having openings56X and56Y at predetermined positions is formed on the lower surface50B of the conductive substrate50. The opening56X is formed to expose a portion of the lower surface50B of the conductive substrate50corresponding to where the opening11is to be formed. The opening56Y is formed to expose portions of the lower surface50B of the conductive substrate50corresponding to where the recesses10Y are to be formed. The opening56Y defines small openings each having a diameter of, for example, about 10 μm. The resist layer56may be formed from a material resistant to etching. The resist layer56may be formed from a photosensitive dry film resist or a liquid photoresist (dry film resist or liquid resist such as novolac resin or acrylic resin). When a photosensitive dry film resist is used, a dry film of the resist is laminated on the lower surface50B of the conductive substrate50through thermocompression. The dry film is then patterned through photolithography to form the resist layer56. The resist layer56can also be formed from a liquid photoresist through the same process as described for the dry film resist.

Subsequently, the conductive substrate50undergoes etching performed on its lower surface50B using the resist layer56as an etching mask to form the substrate frame2illustrated inFIG. 17E(second process). More specifically, parts of the conductive substrate50exposed through the openings56X and56Y of the resist layer56are etched through the lower surface50B to form the opening11in the conductive substrate50. This completes the substrate frame2. The opening11defines a plurality of leads10in each unit lead frame4D. The above etching process also forms portions of the lower surface10B of each lead10exposed from the opening56Y of the resist layer56into the recesses10Y. In detail, when the opening56Y has a small opening diameter (e.g., about 10 μm), the etching rate decreases. Parts of the leads10exposed from the opening56Y having such a small diameter are etched to form the recesses10Y in the leads10so that the recesses10Y do not extend through the leads10in the thickness direction. More specifically, forming the resist layer56having the opening56X that corresponds with the opening11and the small-diameter opening56Y enables the opening11, which extends through the leads10in the thickness direction, and the recesses10Y, which do not extend through the leads10in the thickness direction, to be formed at the same time. The small-diameter recesses10Y are formed by a method that differs from a roughening process. When the opening11and the recesses10Y are formed by wet etching, an etchant used in the wet etching process should be selected in accordance with the material of the conductive substrate50. When the conductive substrate50is formed from copper, a ferric chloride solution may be used as the etchant. This allows for spray etching, or spraying the etchant onto the lower surface50B of the conductive substrate50to form the opening11and the recesses10Y. During such patterning performed by wet etching, side etching can occur in the conductive substrate50and the etching proceeds in the in-plane direction of the conductive substrate50. This shapes the opening11and the recesses10Y to have trapezoidal cross-sections. In this process, the tape51functions as an etching stopper layer.

The resist layer56is removed by using, for example, an alkaline delamination solution.

In the subsequent process illustrated inFIG. 18A, the adhesive layer31and the heat radiating plate30are placed on the lower surface of this structure illustrated inFIG. 17Efrom which the resist layer56has been removed. More specifically, the adhesive layer31and the heat radiating plate30are stacked on the lower surface of the structure so that the upper surface of the adhesive layer31faces the lower surfaces10B of the leads10and the upper surface of the heat radiating plate30faces the lower surface of the adhesive layer31. In other words, the structure, the adhesive layer31, and the heat radiating plate30are stacked so that the adhesive layer31is sandwiched between the leads10and the heat radiating plate30. The adhesive layer31is in the B-stage (semi-cured).

The structure, the adhesive layer31, and the heat radiating plate30in the above arrangement are heated and pressurized. This causes the adhesive layer31to be pressed into the recesses10Y. The adhesive layer31fills the recesses10Y. Also, this causes the upper surface of the adhesive layer31to come in contact with the lower surfaces10B of the leads10, and the upper surface of the heat radiating plate30to come in contact with the lower surface of the adhesive layer31. The adhesive layer31is cured to adhere the heat radiating plate30to the leads10. This forms the integrated structure illustrated inFIG. 18A.

In the subsequent process (third process) illustrated inFIG. 18B, molded array packaging is performed to form the resin layer26, which fills the opening11and the space S1between adhesive layers31and heat radiating plates30of adjacent unit lead frames4D. In the subsequent process (fourth process) illustrated inFIG. 18C, the tape51illustrated inFIG. 18Bis removed.

The manufacturing processes described above yield the lead frame1D having the structure illustrated inFIGS. 16A and 16B, which includes the matrix of unit lead frames4D each including the leads10having the recesses10X and10Y, the plating layers42formed in the recesses10X, the adhesive layer31, the heat radiating plate30, and the resin layer21. In one example, one or more semiconductor devices are mounted on each unit lead frame4D of the lead frame1D. The lead frame1D then undergoes molded array packaging, which encapsulates the semiconductor elements mounted on each unit lead frame4D. Alternatively, the lead frame1D may be first singulated into individual unit lead frames4D (lead frames) by cutting the resin layer26at positions indicated by the arrows with a dicing saw as illustrated inFIG. 18D. One or more semiconductor elements may then be mounted on each individual unit lead frame4D.

Advantages

The above embodiment has the advantage described below in addition to advantages (1) to (3) of the first embodiment, advantage (4) of the second embodiment, and advantage (5) of the third embodiment.

(10) The plating layer42is formed in the recess10X formed in the lower surface10A of the lead10. In this case, the upper surface10A of the lead10and the upper surface42A of the plating layer42are flat surfaces including small irregularities. Even when the adhesive51B on the upper surface10A of the lead10and the upper surface42A of the plating layer42is thin, this structure prevents the adhesiveness and the contact between the tape51and the conductive substrate50, which are adhered to each other by the adhesive51B, from decreasing due to such irregularities. This allows the adhesive51B to be thin and reduces manufacturing costs.

(11) The multiple small-diameter recesses10Y are formed on the lower surface10B of each lead10to provide the lower surface10B of the lead10with a bumpy surface having ridges and valleys. The adhesive layer31is then adhered to the lower surface10B of the lead10to fill the recesses10Y. The adhesive layer31is mechanically engaged with each lead10. This increases the contact between the adhesive layer31and the lead10, and prevents the adhesive layer31and the heat radiating plate30from being separated from the lead10.

(12) When the conductive substrate50is patterned to form the substrate frame2, the resist layer56having the opening56X that corresponds with the opening11and the opening56Y having a small diameter is formed on the lower surface50B of the conductive substrate50. The conductive substrate50then undergoes etching performed on its lower surface50B using the resist layer56as an etching mask. This causes the parts corresponding to the small-diameter opening56Y to be etched at a lower etching rate. Thus, the opening11, which extends through the lead10in the thickness direction, and the recesses10Y, which do not extend through the lead10in the thickness direction, to be formed at the same time.

Modification of Fifth Embodiment

The fifth embodiment may be modified in the following forms.

In the fifth embodiment, the adhesive layer31may be omitted. An example of a method for manufacturing a lead frame of this modification will now be described with reference toFIGS. 19A to 19D.

In the process illustrated inFIG. 19A, the same structure as illustrated inFIG. 17Eis formed by the same processes as illustrated inFIGS. 17A to 17E, and the resist layer56is removed by using an alkaline delamination solution. In the subsequent process illustrated inFIG. 19B, a resin layer27covering the leads10and a heat radiating plate33are stacked on the surface51C of the tape51in the stated order. The formation of the resin layer27as well as the stacking of the resin layer27and the heat radiating plate33may be performed by, for example, resin molding. When, for example, the resin layer27is formed from heat-curable molded resin, the structure illustrated inFIG. 19Aand the heat radiating plate33are first placed in a mold with a predetermined distance between the structure and the heat radiating plate33. The resin is then filled from a gate (not illustrated) into the corresponding resin encapsulating area3(refer toFIG. 1A), while the structure is being heated and pressurized. This forms the resin layer27between the leads10and the heat radiating plate33. The resin layer27fills the opening11and the recesses10Y. The resin layer27and the heat radiating plate33are stacked on the surface51C of the tape51. The upper surface10A of each lead10and the upper surface27A of the resin layer27, which come in contact with the surface51C of the tape51, are formed to correspond with the surface51C (flat surface) of the tape51. The upper surface10A of each lead10and the upper surface20A of the resin layer27are flat and flush with each other. The resin is filled by, for example, transfer molding or injection molding.

The stacking of the resin layer27and the heat radiating plate33may alternatively be achieved through the following method. A structure in which a sheet of the resin layer27is adhered to the heat radiating plate33is prepared. The structure is arranged on the surface51C of the tape51in the structure illustrated inFIG. 19Aso that the resin layer27is opposed to the leads10. The resin layer27is in the B-stage. The two structures are heated and pressurized from opposite sides in a vacuum atmosphere at temperatures of about 190 to 250° C. This forms the resin layer27, which fills the opening11and the recesses10Y. The resin layer27covers the leads10. The resin27is cured to adhere to the leads10.

As described above, the resin layer27fills the recesses10Y of the leads10. The resin layer27is mechanically engaged with each lead10. This increases the contact between the resin layer27and the lead10, and prevents the resin layer27and the heat radiating plate33from being separated from the lead10. The resin layer27and the heat radiating plate33may have substantially the same size and the same shape as viewed from above as, for example, the resin encapsulating area3(refer toFIG. 1A).

In the process illustrated inFIG. 19C, the tape51illustrated inFIG. 19Bis removed. The processes described above yield the lead frame having the structure including the matrix of unit lead frames4D each including the leads10having the recesses10X and10Y, the plating layers42formed in the recesses10X, the resin layer27, and the heat radiating plate33.

The unit lead frames4D are singulated by cutting the resin layer27at positions indicated by the arrows with a dicing saw. This yields individual unit lead frames4D, (lead frames) one of which is illustrated inFIG. 19D.

FIG. 28Aillustrates a modification of the lead frame4D ofFIG. 19D. The lead frame4D ofFIG. 28Aincludes a solder resist layer63partially covering the upper surfaces10A of the leads10. The solder resist layer63may be a white resist layer. Each lead10includes one or more recesses10X in its upper surface10A. The lower surface10B of each lead10does not include recesses. Each lead10may include a roughened lower surface10B which includes recesses10Y. In the illustrated example, the solder resist layer63is formed over the upper surface of the resin layer27, parts of the upper surface of the plating layers42, and parts of the upper surfaces of the leads10.

FIG. 28Billustrates a modification of the lead frame ofFIG. 28A. The lead frame ofFIG. 28Bincludes first leads42, each of which includes at least one plating layer42, and a second lead42, which includes no plating layer42. In the illustrated example, the second lead42is arranged between the first leads42. The upper surface of the second lead42is entirely covered by the solder resist layer63.

In the above modification illustrated inFIGS. 19A-19D, a resin layer34having a different viscosity from the resin layer27may be formed between the resin layer27and the heat radiating plate33. An example of a method for manufacturing a lead frame of this modification will now be described with reference toFIGS. 20A to 20D.

In the process illustrated inFIG. 20A, the same structure as illustrated inFIG. 17Eis formed, and the resist layer56is removed. Subsequently, a resin layer27having a lower viscosity is formed on the surface51C of the tape51to cover the leads10. In one example, a sheet of the resin layer27in the B-stage may be laminated on the surface51C of the tape51through thermocompression. This forms the leads10to be pressed into the resin layer27. The resin layer27fills the opening11and the recesses10Y. The resin layer27having a low viscosity can be filled into the opening11and the recesses10Y in a reliable manner. The resin layer27is mechanically engaged with each lead10. This increases the contact between the resin layer27and the lead10, and prevents the resin layer27from being separating from the lead10. The resin layer27may have a viscosity of, for example, about 500 Pa·s.

Subsequently, the resin layer27is cured at a temperature of about 150° C. (thermal curing process).

In the process illustrated inFIG. 20B, a resin layer34and a heat radiating plate33are stacked on the lower surface27B of the resin layer27in the stated order. In one example, the structure in which the resin layer34is adhered to the heat radiating plate33is prepared. The structure is arranged on the lower surface of the structure illustrated inFIG. 20Aso that the resin layer34is opposed to the resin layer27. The resin layer34is in the B-stage. The two structures are heated and pressurized from opposite sides in a vacuum atmosphere at temperatures of about 100 to 200° C. This causes the upper surface of the resin layer34to come in contact with the lower surface27B of the resin layer27, and the upper surface of the heat radiating plate33to come in contact with the lower surface of the resin layer34. The resin34is cured to adhere to the resin layer27. The resin layer34, which has a higher viscosity than the resin layer27, may have a desired thickness after undergoing the pressurizing process described above. This improves the insulation between the heat radiating plate33and the leads10, as compared with when only the resin layer27having a low viscosity is formed between the heat radiating plate33and the leads10. The resin layer34may have a viscosity of, for example, about 2000 Pa·s. The resin layer34and the heat radiating plate33may have substantially the same size and the same shape as viewed from above as, for example, the resin encapsulating area3(refer toFIG. 1A). The resin layer34may be referred to as an adhesive resin layer.

In the process illustrated inFIG. 20C, the tape51illustrated inFIG. 20Bis removed. The processes described above yield the lead frame having the structure including the matrix of unit lead frames4D each including the leads10having the recesses10X and10Y, the plating layers42formed in the recesses10X, the resin layer27, the resin layer34, and the heat radiating plate33.

The structure illustrated inFIG. 20Cmay be, for example, formed through the following method. More specifically, the resin layer34having a high viscosity, the resin layer27having a low viscosity, the substrate frame2on which the tape51is adhered, and the substrate frame2are stacked on the heat radiating plate33in the stated order. The tape51is removed from the substrate frame2. The resin layers27and34are cured. This completes the substrate illustrated inFIG. 20C.

The unit lead frames4D are singulated by cutting the resin layer27, the resin layer34, and the heat radiating plate33at positions indicated by the arrows with a dicing saw. This yields individual unit lead frames4D (lead frames), one of which is illustrated inFIG. 20D.

FIG. 28Cillustrates a modification of the lead frame4D ofFIG. 20D. The lead frame4D ofFIG. 28Cincludes a solder resist layer63partially covering the upper surfaces10A of the leads10. The solder resist layer63may be a white resist layer. Each lead10includes one or more recesses10X in its upper surface10A. The lower surface10B of each lead10does not include recesses. Each lead10may include a roughened lower surface10B which includes recesses10Y. In the illustrated example, the solder resist layer63are formed over the upper surface of the resin layer27, parts of the upper surface of the plating layers42, and parts of the upper surfaces of the leads10.

FIG. 28Dillustrates a modification of the lead frame ofFIG. 28C. The lead frame ofFIG. 28Dincludes first leads42, each of which includes at least one plating layer42, and a second lead42, which includes no plating layer42. In the illustrated example, the second lead42is arranged between the first leads42. The upper surface of the second lead42is entirely covered by the solder resist layer63.

Other Embodiments

The above embodiments and modifications may be modified in the following forms.

The unit lead frames4and4A to4D in the above embodiments each include two leads10. The embodiments and modifications should not be limited to this structure. For example, each unit lead frame may include three or more leads10. An example of a lead frame including such unit lead frames will now be described with reference toFIGS. 21A and 21B.

As illustrated inFIG. 21B, each unit lead frame4E includes three leads10, plating layers40and43formed on the upper surfaces10A of the leads10, plating layers41formed on the lower surfaces10B of the leads10, an adhesive layer31, a heat radiating plate30, and a resin layer28.

As illustrated inFIGS. 21A and 21B, the plating layer43covers the entire upper surface10A of the lead10arranged in the middle of the unit lead frame4E. The plating layer43also covers part of the upper surface28A of the resin layer28, which is formed between facing leads10arranged in each unit lead frame4E. An opening43X, which has a smaller opening width than the opening11defining the leads10, is formed between the facing plating layers43arranged in each unit lead frame4E. As illustrated inFIG. 21A, the plating layer43is substantially tetragonal as viewed from above. The plating layer43may be formed from the same metal layer as the plating layer40. The plating layer43may be used as a lead, which is electrically connected to a semiconductor element, or as a die pad, onto which a semiconductor element is mounted. Although the plating layer43covers the entire upper surface10A of the lead10inFIGS. 21A and 21B, the plating layer43may cover part of the upper surface10A of the lead10.

The adhesive layer31is formed on the lower surfaces41B of the three plating layers41arranged in the unit lead frame4E. More specifically, the adhesive layer31bridges the lower surfaces41B of the three plating layers41arranged in the unit lead frame4D. The adhesive layer31is used to adhere the plating layers41to the heat radiating plate30and also to insulate the plating layers41from the heat radiating plate30.

The resin layer28fills the openings11and41X and the space S1. The resin layer28has an upper surface28A, which is substantially flush with the upper surface10A of each lead10, and a lower surface28B, which is substantially flush with the lower surface30B of the heat radiating plate30. The resin layer28supports the leads10arranged in each unit lead frame4E on the rails5and6(refer toFIG. 1A).

AlthoughFIGS. 21A and 21Billustrate the modification of the unit lead frame4C of the fourth embodiment, the unit lead frames4,4A,4B, and4D of the first to third and fifth embodiments may be modified in the same manner.

The leads10may be eliminated from the unit lead frames4B and4C in the lead frames1B and1C of the third and fourth embodiments, namely, the unit lead frames4B and4C including the plating layers40. An example of a method for manufacturing a lead frame of this modification will now be described with reference toFIGS. 22A to 22D.

In the process illustrated inFIG. 22A, the same structure as that illustrated inFIG. 9Dis formed through processes that are the same as those illustrated inFIGS. 9A to 9D.

In the subsequent process illustrated inFIG. 22B, the conductive substrate50illustrated inFIG. 22Ais removed. When, for example, the conductive substrate50is formed from copper, the conductive substrate50can be removed through wet etching using a ferric chloride solution, a copper chloride solution, or an ammonium persulfate solution. The tape base51A is exposed on the upper surface of the structure illustrated inFIG. 22A, and the adhesive51B of the tape51and the plating layers40(e.g., Ni layers) are exposed on the lower surface of the structure. This allows only the conductive substrate50, which is a copper plate, to be selectively etched.

In the subsequent process illustrated inFIG. 22C, a resin layer29is formed on the surface51C of the tape51to encapsulate the plating layers40. This forms the resin layer29, which covers the lower surface40B of the plating layers40.

In the subsequent process illustrated inFIG. 22D, the tape51illustrated inFIG. 22Cis removed. These processes yield the lead frame including the matrix of unit lead frames4F, each including the plating layers40and the resin layer29.

The unit lead frames4F may be singulated by, for example, cutting the resin layer29at positions indicated by the arrows inFIG. 22Dwith a dicing saw. This yields individual unit lead frames (lead frames)4E, one of which is illustrated inFIG. 22E.

In the first to fourth embodiments and their modifications, the lower surface10B of each lead10may be a roughened surface. The side surfaces10C of each lead10may also be roughened surfaces. The roughened lower surface10B (and side surfaces10C) may increase the contact between the leads10and the resin layers20to26and28.

The upper surface10A of each lead10in the above embodiments and modifications may be roughened.

The lower surface41B of each plating layer41in the above embodiments and modifications may be roughened. The roughened surface can increase the contact between the plating layers41and the resin layers24and25.

The unit lead frames4A to4E in the second to fifth embodiments and their modifications include the resin layers21,24,26, and28having the lower surfaces21B,24B,26B, and28B, which are flush with the lower surface30B of the heat radiating plate30. The embodiments and modifications should not be limited to this structure. For example, the resin layers21,24,26, and28may cover the lower surface30B of the heat radiating plate30.

The resin layers20to29in the above embodiments and modifications are formed by resin molding. Alternatively, the resin layers20to29may be formed through, for example, potting.

The unit lead frames4and4A to4E in the above embodiments and modifications should not be limited to particular shapes. The unit lead frames4and4A to4E may be in any shapes. The resin layer arranged in each of these lead frames only needs to fill the opening11, which defines the leads10, and support the leads10.

The above embodiments and modifications provide the lead frame including the matrix of the unit lead frames4and4A to4F. Alternatively, the embodiments and modifications may provide a lead frame including the unit lead frames4and4A to4F arranged to form a belt-like structure. The lead frame only needs to include an array of unit lead frames, which may be in any arrangement.

The lead frames1and1A to1D of the above embodiments and modifications may be used, for example, for light emitting devices. Alternatively, the lead frames may be used for surface-mount packages that expose from one surface a plurality of terminals for connection to external devices. Such surface-mount packages include QFN, BGA (Ball Grid Array), LGA (Land Grid Array), CSP (Chip Size Package), and SON (Small Outline Non-lead Package).

Mounting Examples of Semiconductor Elements

FIGS. 23A to 26Dand29A to29D are cross-sectional views of semiconductor devices formed by mounting semiconductor elements60or66onto the unit lead frame of one of the above embodiments and modifications.

Semiconductor Element Mounting Example 1

A semiconductor device7A illustrated inFIG. 23Aincludes the unit lead frame4illustrated inFIG. 3D. One or more semiconductor elements60are mounted on the upper surface20A of the resin layer20, which is formed between the leads10arranged in the unit lead frame4. The electrodes (not illustrated) of the semiconductor element60are electrically connected to the leads10with bonding leads61. The semiconductor element60and the bonding leads61are encapsulated by an encapsulating resin portion62. The leads10are electrically connected to a mount substrate (not illustrated) by using wires W1, which are for connection to external devices, extending from parts of the leads10exposed from the encapsulating resin portion62. Alternatively, the encapsulating resin portion62may have an opening at the position where each external-device connection wire W1is connected. In this case, the leads10are electrically connected to the mount substrate by using the wires W extending from parts of the leads10exposed through the openings of the encapsulating resin portion62.

The semiconductor element60may be, for example, a light emitting device such as a light emitting diode, an IC chip, or a LSI chip. The bonding wires61may be gold or aluminum thin wires. The encapsulating resin portion62may be formed from, for example, an insulating resin, such as epoxy resin, polyimide resin, or silicone resin.

An example of method for manufacturing the semiconductor device7A will now be briefly described.

The lead frame1is manufactured with the method illustrated inFIGS. 2A to 3C. One or more semiconductor elements60are mounted on the resin layer20, which is formed between the leads10of each unit lead frame4. Subsequently, the electrodes of the semiconductor element60are electrically connected to the leads10with the bonding wires61. This completes the mounting of the semiconductor element60onto each unit lead frame4. Then, each unit lead frame4undergoes molded array packaging, which encapsulates the semiconductor element60and the bonding wires61with the encapsulating resin portion62. The lead frame4is then singulated into individual semiconductor devices7A by cutting the resin layer20at predetermined positions (refer to, for example, the arrows inFIG. 3C). This yields individual semiconductor devices7A, one of which is illustrated inFIG. 23A. Subsequently, the semiconductor device7A is mounted onto a mount substrate. The leads10and the mount substrate are electrically connected to each other by using the external-device connecting wires W1.

Semiconductor Element Mounting Example 2

A semiconductor device7B illustrated inFIG. 23Bincludes the unit lead frame4illustrated inFIG. 3D, a solder resist layer63, one or more semiconductor elements60, bonding wires61, and an encapsulating resin portion62.

The solder resist layer63partially covers the upper surfaces10A of the leads10and the upper surface20A of the resin layer20. More specifically, the solder resist layer63has an opening63X, through which the leads10and the resin layer20serving as a mount area for the semiconductor element60are exposed, and an opening63Y, through which part of the lead10serving as an electrode terminal electrically connected to the mount substrate (not illustrated) is exposed. The solder resist layer63may be formed from an insulating resin, such as epoxy resin. When the semiconductor element60is a light emitting element, the solder resist layer63is preferably a reflective film having a high reflectivity. More specifically, the solder resist layer63has a reflectivity of 50% or greater (preferably, 80% or greater) at wavelengths of 450 to 700 nm. This solder resist layer63may be called a white resist layer. The solder resist layer63may be formed from, for example, a white insulating resin. The white insulating resin may be, for example, epoxy resin or organopolysiloxane resin containing a filler or a pigment formed from white titanium oxide or barium sulfate. The solder resist layer63may alternatively be formed from a black insulating resin. The black insulating resin may be a lightproof black resist, which may be formed from a lightproof black resin containing a photosensitive material. The black pigment may be a mixture of a plurality of pigments. One such example is a carbon black pigment or a titanium dioxide pigment.

The electrodes (not illustrated) of the semiconductor element60, which is mounted on the surface20A of the resin layer20formed between the leads10, are electrically connected to portions of the leads10exposed through the opening63X of the solder resist layer63by using the bonding wires61. To encapsulate the semiconductor element60and the bonding wires61, the encapsulating resin portion62is formed on portions of the leads10exposed through the opening63X of the solder resist layer63and the resin layer20. The leads10are electrically connected to the mount substrate (not illustrated) by using the external-device connecting wires W1, which extend from parts of the leads10exposed through the opening63Y of the solder resist layer63.

Semiconductor Element Mounting Example 3

A semiconductor device7C illustrated inFIG. 23Cincludes a unit lead frame4G, which has the same structure as the unit lead frame4A illustrated inFIG. 5Dexcept that it includes a die pad12. The unit lead frame4G includes an adhesive layer31that bridges two leads10and the die pad12. The adhesive layer31is used to adhere the leads10, the die pad12, and the heat radiating plate30to one another, and is used to insulate the leads10, the die pad12, and the heat radiating plate30from one another. One or more semiconductor elements60are mounted on the die pad12of the unit lead frame4G. The electrodes (not illustrated) of the semiconductor element60are electrically connected to the leads10with the bonding wires61. The die pad12is formed at the same time as the leads10when the substrate frame2is formed from the conductive substrate50by performing etching.

In the unit lead frame4G, the adhesive layer31may be formed on only the lower surface of the die pad12and not on the lower surfaces of the leads10. In this case, the adhesive layer31is used to adhere the heat radiating plate30to the die pad12. In other words, this structure eliminates thermal coupling between the leads10and the heat radiating plate30. Thus, there is no need to electrically insulate the die pad12from the heat radiating plate30. This allows the adhesive layer31to be formed from a conductive material, such as a silver paste.

Semiconductor Element Mounting Example 4

A semiconductor device7D illustrated inFIG. 23Dincludes the unit lead frame4E illustrated inFIG. 21B. One or more semiconductor elements60are mounted over the lead10arranged in the middle of the unit lead frame E, or more specifically, on the plating layer43formed on the lead10in the middle. The electrodes (not illustrated) of the semiconductor element60are electrically connected by the bonding wires61to two leads10sandwiching the lead10on which the semiconductor element60is mounted. This allows the lead10on which the plating layer43is formed to function as a die pad.

Semiconductor Element Mounting Example 5

A semiconductor device7E illustrated inFIG. 24Aincludes the unit lead frame4D illustrated inFIG. 18D, a solder resist layer63, one or more semiconductor elements60, bonding wires61, and an encapsulating resin portion62.

The solder resist layer63partially covers the upper surfaces10A of the leads10, the upper surfaces of the plating layers42, and the upper surface26A of the resin layer26. More specifically, the solder resist layer63includes an opening63X and an opening63Y. The opening63X exposes the mount area for the semiconductor element60, namely, each lead10, the plating layer42, and the resin layer26. The opening63Y exposes a portion of each lead10serving as an electrode terminal, which is electrically connected to the mount substrate (not illustrated).

The electrodes (not illustrated) of the semiconductor element60, which is mounted on the upper surface26A of the resin layer26formed between the leads10, are electrically connected to the plating layers42embedded in the leads10by using the bonding wires61. To encapsulate the semiconductor element60and the bonding wires61, the encapsulating resin portion62is formed on parts of the leads10exposed through the opening63X of the solder resist layer63, the plating layers42, and the resin layer26. The leads10are electrically connected to the mount substrate (not illustrated) by using the external-device connecting wires W1, which extend from portions of the leads10exposed through the opening63Y of the solder resist layer63.

Semiconductor Element Mounting Example 6

A semiconductor device7F illustrated inFIG. 24Bincludes the unit lead frame4D illustrated inFIG. 18D, a solder resist layer63, a reflective layer64, one or more semiconductor elements60, bonding wires61, and an encapsulating resin portion62. The semiconductor device7F differs from the semiconductor device7E in that it includes the reflective layer64.

The reflective layer64covers the upper surface26A of the resin layer26, which is formed between the leads10. The reflective layer64has a high reflectivity. More specifically, the reflective layer64has a reflectivity of 50% or greater (preferably, 80% or greater) at wavelengths of 450 to 700 nm. The reflective layer64may be referred to as a white resist layer. This allows the reflective layer64to be formed from, for example, a white insulating resin. The white insulating resin may be, for example, epoxy resin or organopolysiloxane resin containing a filler or a pigment formed from white titanium oxide or barium sulfate. The solder resist layer63of the present example may be formed from the same white resist layer as used for the reflective layer64. This allows the reflective layer64and the solder resist layer63to be formed at the same time.

The semiconductor element60is mounted on the reflective layer64. The electrodes (not illustrated) of the semiconductor element60are electrically connected to the plating layers42embedded in the leads10by using the bonding wires61. The reflective layer64formed on the lower surface of the semiconductor element60can improve, for example, the luminous efficiency of a light emitting device used as the semiconductor element60.

Semiconductor Element Mounting Example 7

A semiconductor device7G illustrated inFIG. 24Cincludes the unit lead frame4D illustrated inFIG. 18D, a solder resist layer63, a reflective layer65, one or more semiconductor elements60, bonding wires61, and an encapsulating resin portion62. The semiconductor device7G differs from the semiconductor device7E in that it includes the reflective layer65.

The reflective layer65surrounds the semiconductor element60, which is mounted on the resin layer26formed between the leads10. More specifically, the reflective layer65has an opening65X, through which the upper surface26A of the resin layer26serving as a mount area for the semiconductor element60is exposed. The reflective layer65has a high reflectivity. The reflective layer65may be formed from the same material as the reflective layer64. The solder resist layer63of the present example may be formed from the same white resist layer as used for the reflective layer65. This allows the reflective layer65and the solder resist layer63to be formed at the same time.

The reflective layer65surrounding the semiconductor element60can improve, for example, the luminous efficiency of a light emitting device used as the semiconductor element60.

Semiconductor Element Mounting Example 8

A semiconductor device7H illustrated inFIG. 25Aincludes the unit lead frame4H, which is obtained by adding a die pad13to the unit lead frame4D illustrated inFIG. 18D. The semiconductor device7H also includes a solder resist layer63, a plurality of semiconductor elements60, and an encapsulating resin portion62. The semiconductor device7H includes an adhesive layer31that bridges two leads10and the die pad13. The adhesive layer31is used to adhere the leads10, the die pad13, and the heat radiating plate30to one another and to insulate the lead10, the die pad13, and the heat radiating plate30from one another.

The plurality of (e.g., four) semiconductor elements60are mounted on the upper surface13A of the die pad12. The electrodes (not illustrated) of the outermost semiconductor element60mounted on the die pad13are electrically connected to the plating layers42embedded in the leads10with the bonding wires61. The electrodes of adjacent semiconductor elements60are connected to each other with the bonding wires61. The lower surface of the die pad13has recesses13Y having a small diameter in the same manner as the leads10having the recesses10Y. The die pad13and the recesses13Y are formed at the same time as the leads10and the recesses10Y when the substrate frame2is formed from the conductive substrate50by performing etching.

As described above, the semiconductor elements60are mounted on the die pad13(copper layer). The die pad13efficiently radiates heat generated during operation of the semiconductor elements60.

Semiconductor Element Mounting Example 9

A semiconductor device7I illustrated inFIG. 25Bincludes the unit lead frame4H described above, a solder resist layer63, a reflective layer64, a plurality of semiconductor elements60, and an encapsulating resin portion62. The semiconductor device7I differs from the semiconductor device7H described above in that it includes the reflective layer64.

The reflective layer64covers the upper surface13A of the die pad13and also covers a portion of the upper surface26A of the resin layer26, which is formed between the leads10and the die pad13.

The plurality of semiconductor elements60are mounted on the reflective layer64. The electrodes (not illustrated) of the outermost semiconductor element60mounted on the reflective layer64are electrically connected to the plating layers42embedded in the leads10with the bonding wires61. The electrodes of adjacent semiconductor elements60are connected to each other with the bonding wires61. The reflective layer64formed on the lower surface of the semiconductor element60improves, for example, the luminous efficiency of a light emitting device used as each semiconductor element60.

Semiconductor Element Mounting Example 10

A semiconductor device7J illustrated inFIG. 25Cincludes the unit lead frame4H described above, a plating layer44embedded in a die pad13, a plurality of semiconductor elements60, and an encapsulating resin portion62. The semiconductor device7J differs from the semiconductor device7H in that it includes the plating layer44.

The upper surface13A of the die pad13has a recess13X at a predetermined position (single recess inFIG. 25C). The recess13X extends from the upper surface13A of the die pad13to a predetermined level in the thickness direction of the die pad13. The recess13X has a bottom surface at an intermediate position in the thickness direction of the die pad13. The recess13X is, for example, tetragonal as viewed from above.

The plating layer44is formed in the recess13X of the die pad13. The plating layer44has an upper surface44A substantially flush with the upper surface13A of the die pad13. The side surfaces of the plating layer44are covered by the die pad13, which forms the side walls of the recess13X. In this manner, the plating layer44is embedded in the die pad13. The plating layer44may be a metal layer having an Ag layer as its outermost layer exposed from the die pad13.

The plurality of semiconductor elements60are mounted on the plating layer44(Ag layer). The electrodes (not illustrated) of the outermost semiconductor element60mounted on the plating layer44are electrically connected to the plating layers42embedded in the leads10with the bonding wires61. The electrodes of adjacent semiconductor elements60are connected to each other with the bonding wires61. The Ag layer (plating layer44) having a high reflectivity formed on the lower surface of the semiconductor element60improves, for example, the luminous efficiency of a light emitting device used as each semiconductor element60.

Semiconductor Element Mounting Example 11

A semiconductor device7K illustrated inFIG. 26Aincludes the unit lead frame4B illustrated inFIG. 10D. One or more semiconductor elements66are mounted on a pair of plating layers40arranged in the unit lead frame4B. More specifically, the semiconductor element66is flip-chip mounted on the two plating layers40between which an opening40X is formed. The semiconductor element66bridges the opening40X. A bump67, which is formed on one surface (e.g., lower surface) of the semiconductor element66, is flip-chip bonded to one of the two plating layers40. Another bump67, which is formed on the surface of the semiconductor element66, is flip-chip bonded to the other plating layer40. This electrically connects the bumps67on the semiconductor element66to the leads10with the plating layers40. The semiconductor element66and the bumps67are encapsulated by the encapsulating resin portion62. The leads10are electrically connected to the mount substrate (not illustrated) by using the external-device connecting wires W1, which extend from parts of the lead10exposed from the encapsulating resin portion62.

Each semiconductor element66may be, for example, a light emitting device such as a light emitting diode, an IC chip, or a LSI chip. The bumps67may be, for example, gold bumps or solder bumps. The solder bumps may be formed from an alloy containing Pb, a Sn—Au alloy, a Sn—Cu alloy, a Sn—Ag alloy, or a Sn—Ag—Cu alloy.

Semiconductor Element Mounting Example 12

A semiconductor device7L illustrated inFIG. 26Bincludes the unit lead frame4B illustrated inFIG. 10D, a solder resist layer68, one or more semiconductor elements66, and an encapsulating resin portion62.

The solder resist layer68covers portions of the upper surfaces10A of the leads10exposed from the plating layer40and the upper surface21A of the resin layer21. The solder resist layer68has an opening68X, through which a portion of the lead10is exposed to function as an electrode terminal, which is electrically connected to the mounting substrate (not illustrated). The solder resist layer68is formed from, for example, an insulating resin, such as epoxy resin. When the semiconductor element66is a light emitting element, the solder resist layer68is preferably a reflective film having a high reflectivity. More specifically, the solder resist layer68has a reflectivity of 50% or greater (preferably, 80% or greater) at wavelengths of 450 to 700 nm. This solder resist layer68may be called a white resist layer. The solder resist layer68may be formed from, for example, a white insulating resin. The white insulating resin may be, for example, epoxy resin or organopolysiloxane resin containing a filler or a pigment formed from white titanium oxide or barium sulfate. The solder resist layer68may alternatively be formed from a black insulating resin. The black insulating resin may be a lightproof black resist, which may be formed from a lightproof black resin containing a photosensitive material. The black pigment may be a mixture of a plurality of pigments. One such example is a carbon black pigment or a titanium dioxide pigment.

The semiconductor element66is flip-chip mounted on the plating layers40between which the solder resist layer68is formed. The semiconductor element66bridges the solder resist layer68, which is formed between the two plating layers40. This electrically connects the bumps67of the semiconductor element66to the leads10via the plating layers40. To encapsulate the semiconductor element66and the bumps67, the encapsulating resin portion62is formed on the plating layer40. The leads10are electrically connected to the mount substrate (not illustrated) by using the external-device connecting wires W1, which extend from parts of the leads10exposed from the openings68X of the solder resist layer68.

Semiconductor Element Mounting Example 13

A semiconductor device7M illustrated inFIG. 26Cincludes the unit lead frame4E illustrated inFIG. 21B. A semiconductor element66is mounted on the plating layer43and one of the plating layers40arranged in the unit lead frame4E. Another semiconductor element66is mounted on the plating layer43and the other plating layer40. More specifically, each semiconductor element66is flip-chip mounted on the two plating layers40and43between which an opening43X is formed. Each semiconductor element66bridges the opening43X formed between the plating layers40and43. More specifically, one bump67formed on the lower surface of each semiconductor element66is flip-chip mounted on the plating layer40. Another bump67is flip-chip bonded to the plating layer43. This electrically connects the bumps67arranged in each semiconductor element66to the lead10with the plating layers40and43. The semiconductor elements66and the bumps67are encapsulated by the encapsulating resin portion62.

This allows the lead10on which the plating layer43is formed to function as a lead.

Semiconductor Element Mounting Example 14

A semiconductor device7N illustrated inFIG. 26Dincludes the unit lead frame4D illustrated inFIG. 18D, a solder resist layer63, one or more semiconductor elements60, and an encapsulating resin portion62.

The solder resist layer63covers portions of the upper surfaces10A of the leads10, portions of the upper surfaces of the plating layers42, and a portion of the upper surface26A of the resin layer26. More specifically, the solder resist layer63has an opening63X and an opening63Y. The opening63X exposes the leads10, the plating layers42, and the resin layer26serving as a mount area for the semiconductor element60. The opening63Y exposes a portion of the lead10serving as an electrode terminal electrically connected to the mount substrate (not illustrated).

The semiconductor element66is flip-chip mounted on the two plating layers42, between which the leads10and the resin layer26are formed. The semiconductor element66bridges the leads10and the resin layer26formed between the two plating layers42. This electrically connects the bumps67of the semiconductor element66to the leads10via the plating layers42. The semiconductor element66and the bumps67are encapsulated by the encapsulating resin portion62. The leads10are electrically connected to the mount substrate (not illustrated) by using the external-device connecting wires W1, which extend from parts of the leads10exposed from the encapsulating resin portion62.

Semiconductor Element Mounting Example 15

A semiconductor device illustrated inFIG. 29Aincludes a semiconductor element60mounted on the lead frame4D illustrated inFIG. 28A. The bottom of the semiconductor element60is in direct contact with the upper surface of the solder resist layer63. The semiconductor element60may be arranged on the solder resist layer63above the resin layer27between the leads10. The electrodes (not illustrated) of the semiconductor element60are electrically connected to the plating layers42embedded in the leads10by using the bonding wires61. The encapsulating resin portion62is formed to encapsulate the semiconductor element60and the bonding wires61. The encapsulating resin portion62may entirely cover the plating layers42connected to the bonding wires61. The encapsulating resin portion62may not encapsulate the plating layers42that are not connected to the bonding wires61.

Semiconductor Element Mounting Example 16

A semiconductor device illustrated inFIG. 29Bincludes semiconductor elements60mounted on the lead frame4D illustrated inFIG. 28B. The bottom of each semiconductor element60is in direct contact with the upper surface of the solder resist layer63. The semiconductor elements60may be arranged on a part of the solder resist layer63extending over a part of the resin layer27and the second lead10between the first leads10. The electrodes (not illustrated) of one of the semiconductor elements60are electrically connected to the plating layer42embedded in the first lead10and to an electrode of the other one of the semiconductor elements60by using the bonding wires61.

The encapsulating resin portion62is formed to encapsulate the semiconductor elements60and the bonding wires61. The encapsulating resin portion62may entirely cover the plating layers42connected to the bonding wires61. The encapsulating resin portion62may not encapsulate the plating layers42that are not connected to the bonding wires61.

Semiconductor Element Mounting Example 17

A semiconductor device illustrated inFIG. 29Cincludes a semiconductor element60mounted on the lead frame illustrated inFIG. 28C. The bottom of the semiconductor element60is in direct contact with the upper surface of the solder resist layer63. The semiconductor element60may be arranged on a part of the solder resist layer63extending over a part of the resin layer27between the leads10. The electrodes (not illustrated) of the semiconductor element60are electrically connected to the plating layers42embedded in the leads10by using the bonding wires61. The encapsulating resin portion62is formed to encapsulate the semiconductor element60and the bonding wires61. The encapsulating resin portion62may entirely cover the plating layers42connected to the bonding wires61. The encapsulating resin portion62may not encapsulate the plating layers42that are not connected to the bonding wires61.

Semiconductor Element Mounting Example 18

A semiconductor device illustrated inFIG. 29Dincludes semiconductor elements60mounted on the lead frame4D illustrated inFIG. 28D. The bottom of each semiconductor element60is in direct contact with the upper surface of the solder resist layer63. The semiconductor elements60may be arranged on a part of the solder resist layer63extending over a part of the resin layer27and the second lead10between the first leads10. The electrodes (not illustrated) of one of the semiconductor elements60are electrically connected to the plating layer42embedded in the first lead10and to an electrode of the other one of the semiconductor elements60by using the bonding wires61. The encapsulating resin portion62is formed to encapsulate the semiconductor elements60and the bonding wires61. The encapsulating resin portion62may entirely cover the plating layers42connected to the bonding wires61. The encapsulating resin portion62may not encapsulate the plating layers42that are not connected to the bonding wires61.

The above modifications and the embodiments may be combined with each other.