Power control circuit for accurate control of power amplifier output power

According to an exemplary embodiment, an amplification module includes a power control circuit. The amplification module further includes a power amplifier coupled to the power control circuit and configured to draw a supply current and receive a supply voltage from the power control circuit. The power control circuit is configured to control a DC power provided to the power amplifier by controlling a product of a sense current, which is a mirror current of the supply current, and the supply voltage. The power control circuit includes a feedback voltage that corresponds to the product of the sense current and the supply voltage. The power control circuit further includes an analog multiplier circuit configured to receive the sense current and the supply voltage and generate the feedback voltage. The power control circuit further includes a differential error amplifier configured to compare the feedback voltage to a control voltage.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention is generally in the field of electrical circuits. More specifically, the invention is in the field of power amplifiers.

2. Related Art

Power amplifiers used in the transmitter section of communications devices, such a wireless handsets, are required to operate under a wide variety of operating conditions, such as variations in temperature and supply voltage, and variations in load impedance. Under these varying operating conditions and load impedance, it is highly desirable for power amplifiers to maintain a constant output power. As a result, various techniques have been employed in an attempt to control the output power of a power amplifier.

However, current techniques for controlling the output power of a power amplifier suffer various disadvantages. For example, techniques that indirectly control the output power by controlling the voltage or current, such as collector voltage or collector current, supplied to the power amplifier provide adequate compensation for variations in operating conditions, but undesirably allow significant variations in power delivered to the load. For example, in the voltage or current control techniques discussed above, the power delivered to the load by the power amplifier can vary by as much as 10.0 decibels (dB) as the impedance of the load changes.

In another conventional approach, a coupler having directivity greater than approximately 10.0 dB is implemented to couple to and sense the output power delivered to the load. However, this approach requires radio frequency (RF) circuitry for detecting and controlling the output power of the power amplifier, which increases cost and circuit design complexity. Additionally, this approach can also cause undesirable frequency variations in the RF output signal generated by the power amplifier, which require system level calibration for correction.

Thus, there is a need in the art for a cost-effective power control circuit that accurately controls the output power of a power amplifier.

SUMMARY OF THE INVENTION

The present invention is directed to power control circuit for accurate control of power amplifier output power. The present invention addresses and resolves the need in the art for a cost-effective power control circuit that accurately controls the output power of a power amplifier.

According to an exemplary embodiment, an amplification module includes a power control circuit. The amplification module further includes a power amplifier coupled to the power control circuit, where the power amplifier is configured to draw a supply current and receive a supply voltage from the power control circuit. For example, the supply voltage may be a collector voltage of the power amplifier. For example, the supply current may be a collector current of the power amplifier. The power control circuit is configured to control a DC power provided to the power amplifier by controlling a product of a sense current and the supply voltage. The sense current is a mirror current of the supply current.

According to this exemplary embodiment, the power control circuit includes a feedback voltage, where the feedback voltage corresponds to the product of the sense current and the supply voltage. The power control circuit further includes an analog multiplier circuit, where the analog multiplier circuit is configured to receive the sense current and the supply voltage and to generate the feedback voltage. The power control circuit further includes a differential error amplifier, where the differential error amplifier is configured to compare the feedback voltage to a control voltage and to generate an error voltage corresponding to a difference between the feedback voltage and the control voltage. The power amplifier includes a final output stage, where the power control circuit provides the DC power only to the final output stage of the power amplifier. For example, the final output stage can be a gallium arsenide bipolar transistor.

The amplification module further includes a load coupled to the power amplifier, where the power amplifier provides an RF output power to the load, and where the power control circuit controls the RF output power by controlling the DC power provided to the power amplifier. Other features and advantages of the present invention will become more readily apparent to those of ordinary skill in the art after reviewing the following detailed description and accompanying drawings.

DETAILED DESCRIPTION OF THE INVENTION

The present invention is directed to power control circuit for accurate control of power amplifier output power. The following description contains specific information pertaining to the implementation of the present invention. One skilled in the art will recognize that the present invention may be implemented in a manner different from that specifically discussed in the present application. Moreover, some of the specific details of the invention are not discussed in order not to obscure the invention.

FIG. 1shows a circuit diagram of an exemplary amplification module including an exemplary power control circuit and an exemplary power amplifier in accordance with one embodiment of the present invention. Certain details and features have been left out ofFIG. 1, which are apparent to a person of ordinary skill in the art. Amplification module100includes power control circuit102, inductor104, power amplifier106, and load108. Amplification module100can be used in wireless communication devices, such as cellular handsets. Power control circuit102of amplification module100can be fabricated, for example, on a single semiconductor die. Power control circuit102includes differential error amplifier110, analog multiplier circuit112, and transistors114and116. Power amplifier106includes power amplifier driver stage (“driver stage”)118, power amplifier output stage (“output stage”)120, and impedance matching network122. Power amplifier106also includes other circuits not shown inFIG. 1to preserve brevity. Although power amplifier106is shown as having only one driver stage (i.e. driver stage118), power amplifier106can have any number of driver stages.

As shown inFIG. 1, control voltage124is coupled to the negative terminal of differential error amplifier110, which also serves as an input of power control circuit102. Control voltage124is a DC reference voltage that is utilized to determine a level of DC power that power control circuit102provides to power amplifier106. By way of example, control voltage124can have a range of between approximately 0.0 volts and approximately 3.0 volts. Also shown inFIG. 1, feedback voltage133, which is generated by analog multiplier circuit112, is coupled to the positive terminal of differential error amplifier110, and the output of differential error amplifier110is coupled to the gate terminals of transistors114and116at node117. Differential error amplifier110can be configured to compare feedback voltage133, which is inputted at the positive terminal of differential error amplifier110, to control voltage124, which is inputted at the negative terminal of differential error amplifier110, and output an error voltage, which corresponds to the difference between feedback voltage133and control voltage124. The error voltage outputted by differential error amplifier110is coupled to the gate terminals of transistors114and116to appropriately drive transistors114and116.

Further shown inFIG. 1, the source terminals of transistors114and116and a voltage input terminal of differential error amplifier110are coupled to reference voltage126(i.e. VCC) at node128. In one embodiment, reference voltage126may be provided by a battery. Also shown inFIG. 1, the drain terminal of transistor114is coupled to one input of analog multiplier circuit112and the drain terminal of transistor116is coupled to another input of analog multiplier circuit and a first terminal of inductor104at node130. Node130, which is also the output of power control circuit102, provides a DC supply voltage to output stage120of power amplifier106. In the present embodiment, the DC supply voltage provided at node130is a collector voltage. In another embodiment, the DC supply voltage provided at node130may be a voltage other than a collector voltage. In the present embodiment, transistors114and116can each be p-channel field-effect transistors (“PFETs”). In other embodiments, transistors114and116may each be an NPN transistor or other appropriate type of transistor.

As shown inFIG. 1, the gate terminal of transistor114is coupled to the gate terminal of transistor116in a current mirror configuration; that is, during operation, ISENSE132, which is the current controlled by transistor114and drawn by analog multiplier circuit112, is directly proportional to IC134, which is the DC supply current controlled by transistor116and drawn by output stage120of power amplifier106. The current mirror formed by transistors114and116has a mirror ratio equal to K, where K is determined by the size of transistor116with respect to the size of transistor114. By way of example, K can be approximately 300.0. In the present embodiment, IC134is the collector current drawn by output stage120of power amplifier106. In another embodiment, IC134may be a DC supply current other than a collector current. By way of example, IC134might be approximately 1.6 amperes. By way of example, ISENSE132might be approximately 5.0 milliamperes (“mA”).

Analog multiplier circuit112can be configured to receive ISENSE132, which is proportional to IC134(i.e. the collector current drawn by output stage120of power amplifier106) at one input and a DC supply voltage (i.e. the collector voltage provided to output stage120of power amplifier106at node130) at another input, and to generate feedback voltage133, which corresponds to the product of ISENSE132multiplied by the DC supply voltage. The product of ISENSE132and the DC supply voltage at node130is also proportional to the DC power provided to output stage120of power amplifier106by power control circuit102.

Also shown inFIG. 1, RF input signal (“RF IN”)136is coupled to the input of driver stage118of power amplifier106. Driver stage118can be configured to receive and amplify RF IN136and generate a driver output RF signal, which is coupled to the base terminal of transistor138of output stage120. The base terminal of transistor138also serves as an input to output stage120of power amplifier106. Further shown inFIG. 1, a second terminal of inductor104is coupled to the collector terminal of transistor138and a first terminal of impedance matching network122at node140and the emitter terminal of transistor138is coupled to ground142. Transistor138can be an NPN power output transistor and can comprise, for example, gallium arsenide. In other embodiments, transistor138may comprise a material other than gallium arsenide and may be a power transistor other than an NPN power output transistor, such as a FET. Output stage120, which is the final output stage of power amplifier106, can be configured to receive and amplifier an RF signal outputted by driver stage118, and generate RF output signal (“RF OUT”)144. Output stage120can also be configured to draw a collector current (i.e. IC134) and receive a collector voltage (i.e. DC supply voltage at node130) from power control circuit102.

Also shown inFIG. 1, a second terminal of impedance matching network122is coupled to a first terminal of load108, which may be, for example, an antenna. The second terminal of impedance network122also serves as the output of power amplifier106. Power amplifier106can be configured to receive and amplify RF IN136, draw a collector current (i.e. IC134) and receive a collector voltage (i.e. DC supply voltage at node130) from power control circuit102for output stage120, and generate RF OUT144. Impedance network122can be configured to match the impedance of output stage120at node140to the impedance of load108. As further shown inFIG. 1, a second terminal of load108is coupled to ground142.

The function and operation of power control circuit102will now be discussed. In power control circuit102, analog multiplier circuit112, differential error amplifier110, and the current mirror configuration comprising transistors114and116form a feedback loop for controlling the DC power provided to output stage120, which is equal to the product of IC134(i.e. the collector current drawn by output stage120of power amplifier106) and the DC supply voltage (i.e. the collector voltage) coupled to output stage120of power amplifier106at node130. As discussed above, analog multiplier circuit112is configured to receive the DC supply voltage at node130and to receive ISENSE132, which is directly proportional to IC134(i.e. the collector current drawn by output stage120), and to generate feedback voltage133, which corresponds to the product of ISENSE132and the DC supply voltage at node130. Differential error amplifier110compares feedback voltage133to control voltage124, which determines a desired level of DC power delivered to output stage120of power amplifier106by power control circuit102.

When IC134(i.e. the collector current drawn by output stage120) increases, the increase in IC134causes a proportional increase in ISENSE132, since transistor114, which controls ISENSE132, and transistor116, which controls IC134, are coupled in a current mirror configuration. Since an increase in IC134also causes an increase in the DC supply voltage at node130, feedback voltage133, which corresponds to the product of I ISENSE132and the DC supply voltage at node130, will also increase. If IC134increases sufficiently to cause feedback voltage133to be greater than control voltage124, differential error amplifier110generates a positive error voltage, which is proportional to the difference between feedback voltage133and control voltage124. The positive error voltage is applied to the gate of transistor116, which is configured to cause an appropriate reduction in IC134(i.e. the collector current drawn by output stage120). The reduction in IC134also causes a reduction in the DC supply voltage at node130. Since ISENSE132is a mirror current of IC134, a reduction in IC134also causes a corresponding reduction in ISENSE132. As a result, feedback voltage133, which corresponds to the product of ISENSE132and the DC supply voltage at node130, will also be reduced.

Conversely, if IC134decreases sufficiently to cause feedback voltage133to be less than control voltage124, differential error amplifier110generates a negative error voltage. The negative error voltage is applied to the gate of transistor116, which is configured to cause an appropriate increase in IC134. The increase in IC134causes a corresponding increase in the DC supply voltage at node130and also causes a proportional increase in ISENSE132. As a result, feedback voltage133, which corresponds to the product of ISENSE132and the DC supply voltage at node130, also increases. Thus, by appropriately responding to either a decrease or increase in IC134, the feedback loop discussed above regulates the DC supply voltage at node130(i.e. the collector voltage supplied to output stage120) and controls the DC power (i.e. the product of collector current and collector voltage) provided to output stage120of power amplifier106.

By way of background, the RF output power delivered to a load by a power amplifier is approximately equal to the DC power supplied to the final output stage of the power amplifier times the efficiency of the final output stage, which remains substantially constant over a wide variation of RF output power. Thus, by utilizing a feedback loop to accurately control the DC power supplied to output stage120, which is the final output stage of power amplifier106, the present invention's power control circuit (i.e. power control circuit102) accurately controls the RF output power provided to load108by power amplifier106. In the present invention, only the DC power supplied to the final output stage (i.e. output stage120) of power amplifier106is controlled, because only the DC power supplied to the final output stage of power amplifier106determines the RF output power supplied to the load (i.e. load108).

FIG. 2shows exemplary graph200including RF output power curves in accordance with one embodiment of the present invention. Graph200includes RF output power axis202, load phase angle axis204, and RF output power curves206,208, and210. In graph200, RF output power axis202corresponds to an exemplary range of RF output power supplied to load108by power amplifier106inFIG. 1, while load phase angle axis204corresponds to an exemplary phase angle range of the load impedance of load108.

In graph200, RF output power curve206corresponds to the RF output power delivered to load108by power amplifier106over a voltage standing wave ratio (“VSWR”) of 3:1 under different load impedance phase angles, where load108has a constant load impedance of 50.0 ohms. RF output power curve208corresponds to the RF output power delivered to load108by power amplifier106over a VSWR of 3:1 under different load impedance phase angles, where the DC power delivered to output stage120of power amplifier106is controlled by power control circuit102. RF output power curve210corresponds to the RF output power of power amplifier106delivered to load108over a VSWR of 3:1 under different load impedance phase angles, where only the collector voltage of output stage120of power amplifier106is controlled.

In the example shown in graph200, RF output power curve206, which corresponds to an ideal RF output power curve, provides a constant RF output power of 24.5 dBm under different load impedance phase angles. Also shown in the example in graph200, RF output power curve210, which corresponds to a conventional power output control technique of controlling only the collector voltage of output stage120of power amplifier106, provides an RF output power variation of approximately 5.0 dBm between upper peak212and lower peak214of RF output power curve210. Further shown in the example in graph200, RF output power curve208, which corresponds to an RF output power curve achieved by the present invention's power control circuit, provides an RF output power variation of approximately 2.0 dBm between upper peak216and lower peak218of RF output power curve208.

Thus, as shown in the example in graph200, by controlling the DC power provided to output stage120of power amplifier106, the present invention's power control circuit102limits the RF output power variation over a 3:1 VSWR to approximately 2.0 dBm. In contrast, by conventionally controlling only the collector current provided to output stage120, the RF output power over a 3:1 VSWR varies by approximately 5.0 dBm, which is significantly greater than the variation achieved by the present invention's power control circuit.

FIG. 3shows exemplary graph300including DC power control response curves in accordance with one embodiment of the present invention. Graph300includes peak RF voltage axis302, DC power axis304, and DC power control response curves306and308. In graph300, peak RF voltage axis302corresponds to an exemplary range of the peak RF voltage of RF OUT144generated by output stage120of power amplifier106inFIG. 1, while DC power axis304corresponds to an exemplary range of DC power provided to output stage120.

In graph300, DC power control response curve306corresponds to an ideal DC power control response curve, which shows a linear relationship between peak RF voltage of RF OUT144(i.e. the RF output signal generated by output stage120of power amplifier106) and the DC power provided to output stage120. DC power control response curve308corresponds to the embodiment of the present invention inFIG. 1, where the output of analog multiplier circuit112(i.e. feedback voltage133) is applied directly to the positive terminal of differential error amplifier110. As shown in graph300, DC power control response curve308shows a non-linear relationship between the peak RF voltage of RF OUT144and the DC power provided to output stage120of power amplifier106. In the embodiment of the present invention inFIG. 1, the DC power provided to output stage120of power amplifier106is directly proportional to control voltage124. As a result, the peak RF voltage of RF OUT144has a non-linear relationship to control voltage124.

In one embodiment, in order to achieve a substantially linear relationship between peak RF voltage of RF OUT144and the DC power provided to output state120by power control circuit102, which is desirable in some applications, a square law distortion circuit can be added between analog multiplier circuit112and the positive terminal of differential error amplifier110. In such embodiment, the square-law distortion circuit can be configured to receive feedback voltage133and generate an output voltage that is a square-law function of feedback voltage133, which would be applied to the positive terminal of differential error amplifier110.

Thus, as discussed above, by using a feedback loop including a feedback voltage that corresponds to the product of a mirror current of a DC supply current drawn by a final output stage of a power amplifier and a DC supply voltage provided to the final output stage, the present invention's power control circuit advantageously controls the DC power provided to the final output stage of the power amplifier. By accurately controlling the DC power provided to the final output stage of the power amplifier, the present invention's power control circuit advantageously achieves accurate control of the RF output power supplied by the power amplifier to a load.

Additionally, the present invention's power control circuit achieves a significantly reduced variation in RF output power supplied by the power amplifier to a load compared to a conventional power control circuit that controls only the collector voltage supplied to the power amplifier. Furthermore, the present invention's power control circuit is cost-effectively and does not require complex RF coupling and detection circuits.

Thus, power control circuit for accurate control of power amplifier output power has been described.