Noise reduction in amplifier circuitry using single-sideband chopper stabilization

A multi-path amplifier can include a high frequency path, a low frequency path, and a summing node to sum an output from the high frequency path with an output from the low frequency path. The low frequency path can include a flicker noise reduction mechanism including an image band rejection mechanism. The low frequency path can include an in-phase path and a quadrature path.

BACKGROUND

The subject matter of this patent application is generally related to electrical circuits.

Amplifiers can amplify input signals such as signals present in wireless devices. Some input signals can include both high frequency and low frequency components. Other input signals can include only a low frequency component. The offset and flicker noise of an amplifier can corrupt signal content located at low frequencies especially in amplifiers constructed using Complementary Metal-Oxide-Semiconductor (CMOS) technologies.

SUMMARY

This specification describes technologies that, among other things, describe using single-sideband chopper stabilization techniques to reduce noise in amplifier circuitry.

The subject matter described can be implemented in circuitry that includes a high frequency path, a low frequency path, and a summing node. The low frequency path can include a flicker noise reduction mechanism that includes an image band rejection mechanism. The summing node can sum an output from the high frequency path with an output from the low frequency path.

This, and other aspects, can include one or more of the following features. The low frequency path can include an in-phase path and a quadrature path. The in-phase path can include a first amplifier, a first chopper, and a second chopper. The first amplifier can be coupled between the first chopper and the second chopper, and the first and second choppers can use a first chopping signal. The quadrature path can include a second amplifier, a third chopper, and a fourth chopper. The second amplifier can be coupled between the third chopper and the fourth chopper, and the third and fourth choppers can use a second chopping signal that differs from the first chopping signal by a quadrature phase shift. The low frequency path can include a low-pass filter. The high frequency path can include a third amplifier.

The subject matter described also can be implemented in circuitry that includes a signal generator that produces a first chopping signal at a chopping frequency and produces a second chopping signal at the chopping frequency with a quadrature phase-shift; a first chopper unit that modulates an input signal using the first chopping signal to produce an output; a first amplifier unit that amplifies the output of the first chopper unit to produce an output; a second chopper unit that modulates the input signal using the second chopping signal to produce an output; a second amplifier unit that amplifies the output of the second chopper unit to produce an output; a third chopper unit that modulates the output of the first amplifier unit using the first chopping signal to produce an output; a third amplifier unit that amplifies the output of the third chopper unit to produce an output; a fourth chopper unit that modulates the output of the second amplifier unit using the second chopping signal to produce an output; a fourth amplifier unit that amplifies the output of the fourth chopper unit to produce an output; and a first summing node that sums the output of the third amplifier with an inverted form of the output of the fourth amplifier unit.

This, and other aspects, can include one or more of the following features. The circuitry can also include a fifth amplifier unit that amplifies the input signal to produce an output; and a second summing node responsive to the output of the fifth amplifier unit and an output coupled with the first summing node. The circuitry can also include a low pass filter that attenuates frequencies that are at or above an attenuation frequency, wherein the low pass filter is coupled between the first and second summing nodes; and a sixth amplifier unit coupled between the first and second summing nodes. The low pass filter can be coupled between the first summing node and the sixth amplifier unit. The low pass filter can be integrated into the third amplifier and the fourth amplifier.

A wireless system can include a signal interface, a wireless module in communication with the signal interface, and an amplifier circuit in communication with the wireless module. The amplifier circuit can include a high frequency path and a low frequency path, wherein the low frequency path includes a flicker noise reduction mechanism including an image band rejection mechanism, and a summing node to sum an output from the high frequency path with an output from the low frequency path.

This, and other aspects, can include one or more of the following features. The low frequency path can include an in-phase path and a quadrature path. The in-phase path can include a first amplifier, a first chopper, and a second chopper. The first amplifier can be coupled between the first chopper and the second chopper, and the first and second choppers can use a first chopping signal. The quadrature path can include a second amplifier, a third chopper, and a fourth chopper. The second amplifier can be coupled between the third chopper and the fourth chopper, and the third and fourth choppers can use a second chopping signal that differs from the first chopping signal by a quadrature phase shift. The low frequency path can include a low-pass filter. The high frequency path can include a third amplifier. The amplifier circuit can be coupled between the signal interface and the wireless module, wherein the amplifier circuit amplifies a signal received over the signal interface. The amplifier circuit can be integrated with the wireless module. An output of the amplifier circuit can be used by the wireless module to transmit a signal over the signal interface. The amplifier circuit can be integrated with the wireless module.

The subject matter described also can be implemented in methods that include obtaining a signal; generating a first chopping signal at a chopping frequency; generating a second chopping signal at the chopping frequency with a quadrature phase-shift; modulating the signal using the first chopping signal to produce a first modulated signal; modulating the signal using the second chopping signal to produce a second modulated signal; amplifying the first modulated signal to produce a first amplified signal; amplifying the second modulated signal to produce a second amplified signal; modulating the first amplified signal using the first chopping signal to produce a third modulated signal; modulating the second amplified signal using the second chopping signal to produce a fourth modulated signal; and summing the third modulated signal and an inverted form of the fourth modulated signal to produce a first summed signal.

This, and other aspects, can include one or more of the following features. The method can include attenuating frequencies in the first summed signal that are at or above an attenuation frequency to produce a filtered signal. The method also can include amplifying the obtained signal to produce a high frequency signal; and summing the filtered signal with the high frequency signal. The method can include attenuating frequencies, before the summing, in the third modulated signal and the fourth modulated signal that are at or above an attenuation frequency. The method also can include amplifying the obtained signal to produce an amplified high frequency signal; and summing the first summed signal with the amplified high frequency signal. The method also can include summing the first summed signal with the obtained signal to produce an intermediate signal; and amplifying the intermediate signal.

Particular implementations of the subject matter described in this specification can be implemented to realize one or more of the following potential advantages. The described subject matter can be used to amplify an input signal while reducing the effect of amplifier offset and flicker noise. The described subject matter can be used to remove or attenuate image band components at plus or minus multiples of the chopping frequency while amplifying the input signal.

DETAILED DESCRIPTION

Amplifier offset and flicker noise can corrupt signal content located at low frequencies. In continuous-time applications, a chopper stabilization technique can be used to reduce the impact of offset and flicker noise. The chopper stabilization technique can include chopping a signal at a chopping frequency (fchop) using a first chopper to up-convert the signal and a second chopper to down-convert the up-converted signal. The chopper stabilization technique can be characterized by a frequency modulation where signal content is up-converted to a chopping frequency, flicker noise and offset are added through amplifiers, and signal content is down-converted back to the signal content's original frequency which can be zero, e.g., DC. While the down-conversion process can convert the up-converted signal band back to DC, the down-conversion process can up-covert the offset and flicker noise up to fchop.

The up-converted offset and flicker noise can be removed by a low-pass filter (LPF). An ideal LPF would impose a chopping frequency higher than the signal bandwidth so that all of the desired signal bandwidth can pass through the filter. However, using a higher chopping frequency may not be feasible because of increased power consumption and other non-ideal affects that grow with increasing chopping frequency. Thus, in cases where the signal includes desired content that a LPF would filter, a by-pass for such higher frequency components can be added. An amplifier including such a by-pass can include a low-frequency (LF) path that provides high gain and reduced flicker noise and a high-frequency (HF) path that provides increased bandwidth while bypassing the LPF on the LF path. The flicker noise of the HF path can be suppressed by the higher gain on the LF path. The LF path can include a first chopper to up-convert the signal and a second chopper to down-convert the signal.

If the signal content includes an image band component centered around two times the chopping frequency, then aliasing can occur in a LF path that only uses two choppers that are both driven by a single chopping frequency. In such a LF path, the image band can become superimposed on the desired input signal after passing through the first chopper. The frequency of the superimposed signal is located at +/−fchop. After passing through the second chopper, the frequency of the superimposed signal shifts to +/−2fchopand zero.

To analyze the aliasing problem occurring in an implementation consisting of two choppers, consider a desired input signal at DC and an undesired input signal whose frequency band is around twice the chopping frequency. Due to the first chopper in the low-frequency path, the undesired signal will be aliased to +/−fchopin the output of the first chopper. The desired input signal will be centered around +/−fchopas well after the up-conversion—thereby corrupting the desired input signal. The output from the first chopper, containing the desired input signal plus undesired signal, will be down-converted to DC by the second chopper. The output of the second chopper will also include a signal at 2* fchop, but this signal can be filtered by using a LPF. The aliasing of the undesired component at +/−2fchopis not seen by the HF path. However, as the aliased undesired component at DC is amplified by a high gain factor through the low-frequency path, the aliased undesired component cannot be suppressed at a summing node, where the low-frequency path output is summed with the high-frequency path output.

This disclosure presents multi-path amplifier technologies that can include two low-frequency paths. Each of the low-frequency paths can include two choppers. Each pair of choppers can be driven by chopping signals centered around fchop. However, the chopping signal driving one of the chopper pairs can be phase shifted by 90 degrees from the chopping signal driving the other chopper pair. By driving the choppers of each path differently, the output of the chopper pairs can produce different signals that, when subtracted, can attenuate or remove the aliased undesired component at DC.

FIG. 1shows an example of a multi-path operational amplifier circuit. A multi-path operational amplifier circuit105can receive an input signal through an input110and produce an output signal through output140. A signal splitter115can be used to split the input110into multiple paths. The paths can include a high frequency path120and a low frequency path125. In some implementations, the input110can be directly applied to each path without the need of splitter115. The high frequency path120can include an amplifier to amplify a signal from the splitter115. The low frequency path125can include a flicker noise reduction mechanism130. The flicker noise reduction mechanism130can include an image band rejection mechanism. The low frequency path125can include signal choppers interleaved with one or more amplifiers. The output signals from the low frequency path125and high frequency path120can be combined in a summing node135to produce an output signal through output140. The architecture of amplifier circuit105can be applied to continuous-time amplifiers including, but not limited to, wideband amplifiers.

FIG. 2shows an example of a multi-path operational amplifier circuit in a wireless device. The multi-path operational amplifier circuit105can be used in a wireless device205that includes a wireless module210. The wireless module210can include circuitry to generate a wireless signal and process a received signal. In some implementations, the amplifier circuit105can be integrated with the wireless module210. In some other implementations, the amplifier circuit105can be a standalone component with respect to the wireless module210. The wireless device205can use one or more amplifier circuits105. In some implementation, the amplifier circuit105can be used to detect a signal received over a signal interface such as antenna215or a connector that connects with a cable. In some implementations, the amplifier circuit105can be used to produce a signal for transmission on a signal interface such as antenna215or a connector that connects with a cable. The wireless device205can be any type of wireless device, e.g., a cellular phone, a personal digital assistant (PDA), a gaming device or controller, a remote control, a laptop computer, a digital camera, or the like. Techniques of the present disclosure may also be applicable to wired devices including a wireless module.

FIG. 3shows an example of an amplifier circuit with low frequency paths. The input310can be the input signal into splitter115. The input310can be split via splitter315into a signal for the low frequency I (in-phase) path320and the low frequency Q (quadrature) path330. In some implementations, the input310can be directly applied to each path320,330without the need of splitter315. Each path320,330can include choppers interleaved with one or more amplifiers. The choppers of the I path320can be driven by a first, in-phase, chopping signal at a chopping frequency. The choppers of the Q path330can be driven by a second, quadrature phase, chopping signal at the chopping frequency. Thus, the first and second chopping signals can differ in their phase. The output from the Q path330is inverted by an inverter335before being summed with the output from the I path320in a summing node340to produce an output signal through output345.

FIG. 4shows an example of two high-gain low-frequency paths chopped by quadrature chopping signals within an amplifier circuit. An input401can provide an input waveform to both an in-phase I-path402and a quadrature Q-path403. The I-path402can include choppers415,425interleaved with amplifiers420,430. The Q-path403can include choppers435,445interleaved with amplifiers440,450. A signal generator410, such as a clock signal generator, can supply a signal at a chopping frequency fchopto choppers415,425and a phase-shifting unit411. The phase-shifting unit411can deliver a quadrature (π/2) phase-shifted version of the signal from signal generator410to choppers435,445. In some implementations, the functionality of the phase-shifting unit411can be incorporated into the signal generator410to produce separate in-phase and quadrature phase signals.

Summing node455can continuously sum the output from the I-path402and Q-path403to produce an output signal through output460. The output from the amplifier450is inverted when arriving at the summing node455because a positive output of the amplifier450is summed with a negative output of the amplifier430and a negative output of the amplifier450is summed with a positive output of the amplifier430. The sum computed at the output of the I-path402and Q-path403rejects the image frequency components of the chopped paths402,403. Image rejection can be characterized by the I-path402to the Q-path403phase and gain matching. Gain matching can be characterized by the gain matching between amplifiers420,440and amplifiers430,450. A low-pass filter (LPF) can be inserted before, after, or embedded within amplifiers430,450.

Because of a phase shift between the I-path402and Q-path403chopper signals, the chopper signals within the I-path402can be characterized by a multiple of a cosine function while the chopper signals within the Q-path403can be characterized by a multiple of a sine function. At summing node455, when summing the output of I-path402and an inverted output of Q-path403, the desired frequency bands can add with the same sign, while the image band components have opposite signs and therefore cancel. This can result in a chopper stabilization technique where only one sideband of the chopping signal is effective.

FIG. 5shows waveform examples in frequency space that correspond to points within the amplifier circuit ofFIG. 4. The graph labels ofFIG. 5correspond to the appropriate labels inFIG. 4. The graphs ofFIG. 5have the x-axis as frequency and the y-axis as amplitude. The amplitudes of the graphs are not drawn to scale. Graph “Point A” shows an example of an input waveform in frequency space that corresponds to label A inFIG. 4. The input waveform can include an input component such as a desired input signal and image band components located at +/−2fchop. Graph “Point B-I” shows an example of an output of chopper415after chopping the input waveform of graph “Point A” in which the image band components have shifted to +/−fchopin combination with a similarly shifted version of the input component. Graph “Point C-I” shows an example of an output of chopper425after chopping a version of the waveform shown in graph “Point B-I” in which the combination of the image band components and the input component are shifted to the zeroth frequency, i.e., D.C., and +/−2fchop.

Graph “Point B-Q” shows an example of an output of chopper435after chopping the input waveform of graph “Point A” in which the image band components have shifted to +/−fchop in addition with a shifted version of the input component. However, as graph “Point B-Q” shows, amplitudes of the shifted components differ when compared to graph “Point B-I.” Graph “Point C-Q” shows an example of an output of chopper445after chopping a version of the waveform shown in graph “Point B-Q” in which the combination of the image band components and the input component are shifted to the zeroth frequency and +/−2fchop. However, as graph “Point C-Q” shows, amplitudes of the shifted components differ when compared to graph “Point C-I.”.

Graph “C-I-C-Q” shows an example of the output of summing node455where a version of the waveform shown in graph “Point C-I” has been added with an inverted version of the waveform shown in graph “Point C-Q.” This summation cancels the shifted image band components at the zeroth frequency and amplifies the desired input signal component. Further, the desired input signal shifted to +/−2fchopcancels in the summation leaving the images bands at +/−2fchop.

FIG. 6shows an example of a multi-path operational amplifier circuit. An input601can provide an input waveform to a low frequency in-phase path and a low frequency quadrature path within the multi-path operational amplifier. A signal generator such as a clock signal generator605can supply a signal at a chopping frequency fchopto a phase-shifting unit610and choppers of the in-phase path such as choppers615,625. The phase-shifting unit610can deliver a quadrature phase-shifted version of the signal from signal generator605to choppers of the quadrature path such as choppers635,645. The in-phase path can include amplifiers620,630interleaved with choppers615,625. The quadrature path can include amplifiers640,650interleaved with choppers635,645.

Summing node655can continuously sum the output from amplifiers630,650. The output from the amplifier650is inverted when arriving at the summing node655because a positive output of the amplifier650is summed with a negative output of the amplifier630and a negative output of the amplifier650is summed with a positive output of the amplifier630. A low-pass filter (LPF)660can filter high frequency components while allowing low frequency components to pass through LPF660. The output from LPF660can be amplified by amplifier665. In general, the LPF660can be inserted before, after, or embedded within amplifiers630,650. In some implementations, amplifiers630,650can be replaced with a single amplifier placed after or before the LPF660.

The input601can provide an input waveform to a high frequency path. The high frequency path can provide a route around the low frequency paths to circumvent the bandwidth-chopping frequency trade-off described earlier. The high frequency path can include amplifier670. The output from amplifier670and amplifier665can be summed at summing node675to produce an output signal through output680. In some alternate implementations, the output from amplifier670can be summed with the output from LPF660before being amplified by amplifier665. In additional alternate implementations, the output from amplifier670can be summed with the output from LPF660and amplifier665can be omitted.

FIG. 7shows example signal processing operations. An amplifier circuit can obtain705a signal. In some implementations, the signal can be received over the air. In some other implementations, the signal can be generated within a wireless module. The amplifier circuit can generate710a first chopping signal at a chopping frequency and generate715a second chopping signal at the chopping frequency with a quadrature phase-shift. In some implementations, the generation of the chopping signals can occur in circuitry that is separate from the amplifier. The signal can be modulated720using the first chopping signal to produce a first modulated signal and modulated725using the second chopping signal to produce a second modulated signal. In some implementations, a chopper can be used for modulation such as modulations720,725. The first modulated signal can be amplified730to produce a first amplified signal. The second modulated signal can be amplified735to produce a second amplified signal. The amplifier circuit can modulate740the first amplified signal using the first chopping signal to produce a third modulated signal and modulate745the second amplified signal using the second chopping signal to produce a fourth modulated signal. The amplifier circuit can sum750the third modulated signal and an inverted form of the fourth modulated signal to produce a first summed signal.

The amplifier circuit can perform low-pass filtering by using a LPF to filter high frequencies after the summation750or immediately prior to the summation750. In some implementations, the amplifier circuit can amplify both the third modulated signal and the fourth modulated signal before the summation750or, instead, amplify the output of summation750. In some implementations, the amplifier circuit can amplify the obtained705signal and add the resulting signal to the output of the summation750where the LPF filtering has been performed during or before summation750.

Standard CMOS technologies can be used to implement and manufacture the amplifiers described in this disclosure. Other technologies, such as GaAs or BiCMOS using silicon or SiGe, can also be used to implement and manufacture the amplifiers described in this disclosure. The amplifiers described herein can be integrated with additional components or can be in a standalone package.

In environments where the overall input band is large, but the desired signal band is sufficiently lower than fchop, the desired input signal should not be attenuated by the LPF. Thus, a multi-path amplifier for such environment can be implemented using an architecture such as the one shown inFIG. 4without the need for a high frequency path.

In environments where the overall input band is large and the desired signal band includes both low and high frequency components, the desired high frequency component(s) can be attenuated by a LPF. The starting attenuation frequency of a LPF can be selected to provide sufficient attenuation to remove up-converted offset and flicker noise components at fchop. In some implementations, it can be desirable to use a low-order LPF, which can have a cut-off or attenuation frequency sufficiently lower than fchop, e.g., fchop/10. In these environments, the desired high frequency component(s) can extend beyond the attenuation or cut-off frequency. A multi-path amplifier for these environments can be implemented using an architecture such as the one shown inFIG. 6that includes a high-frequency path that bypasses the LPF.

A few embodiments have been described in detail above, and various modifications are possible. The disclosed subject matter, including the functional operations described in this specification, can be implemented in electronic circuitry, computer hardware, firmware, software, or in combinations of them, such as the structural means disclosed in this specification and structural equivalents thereof.