Light emitting diode (LED) chip and manufacturing method and light emitting method thereof

A LED chip includes a substrate, an N-type semiconductor layer, an active region, a P-type semiconductor layer, a transparent electric conductive layer, and a passivation protective layer stacked with each other in sequence. The passivation protective layer has a plurality holes corresponding to different positions of the transparent electric conductive layer respectively. A P-type electrode is electrically linked with the transparent electric conductive layer through said plurality of holes, while an N-type electrode is electrically linked with said N-type semiconductor layer.

CROSS REFERENCE OF RELATED APPLICATION

This is a U.S. National Stage under 35 U.S.C. 371 of the International Application Number PCT/CN2018/097727, filed Jul. 30, 2018, which claims priority to Chinese application number CN201810478979.1, filed May 18, 2018 and Chinese application number CN201820743497.X, filed May 18, 2018, which are incorporated herewith by references in their entities.

BACKGROUND OF THE PRESENT INVENTION

Field of Invention

The present invention relates to a LED chip, and more particularly to a light emitting diode (LED) and its LED chip, and the manufacturing method and light-emitting method of the LED chip.

Description of Related Arts

LED, Light-Emitting Diode, is regarded as a new generation of lighting tools due to its advantages of high lightness, longer life span, small size, low power-consumption, and so on. However, the conventional LED still has low luminous efficiency, so that how to improve the luminous efficiency of the LED chip while solving a series of problems generated for improving the luminous efficiency of the LED chip has become one of the most important research topics.

Referring to theFIG. 1toFIG. 7of the drawings, the conventional LED chip is illustrated, wherein the LED chip comprises a substrate10P, an epitaxial stacked layer20P, a current blocking layer30P, a transparent electrical conductive layer40P, a metallic electrode assembly50P, and a passivation protective layer60P. The conventional LED chip also has an N-type exposed portion70P. Accordingly, the epitaxial stacked layer20P further comprises an N-type semiconductor layer21P, an active region22P and a P-type semiconductor layer23P, wherein the N-type semiconductor layer21P, the active region22P and the P-type semiconductor layer23P are formed sequentially from the substrate10P, such that the substrate10P and the N-type semiconductor layer21P, the active region22P and the P-type semiconductor layer23P of the epitaxial stacked layer20P are stacked in sequence.

A manufacturing process for the conventional LED chip is described as follows:

(a) Referring to theFIGS. 3A and 3Bof the drawings, a first photoresist layer is formed on the P-type semiconductor layer23P of the epitaxial stacked layer20P, and then the N-type exposed portion70P is formed by dry-etching the epitaxial stacked layer20P, wherein the N-type exposed portion70P is extended from the P-type semiconductor layer23P to the N-type semiconductor layer21P through the active region22P, such that a portion of the N-type semiconductor layer21P is exposed to the epitaxial. Then, the first photoresist layer is removed from the epitaxial stacked layer20P.

(b) Referring toFIG. 4AandFIG. 4Bof the drawings, a second photoresist layer is formed on the P-type semiconductor layer23P of the epitaxial stacked layer20P, and then the current blocking layer30P is formed on the epitaxial stacked layer20P by wet-etching the epitaxial stacked layer20P, wherein the current blocking layer30P is stacked on the P-type semiconductor layer23P of the epitaxial stacked layer20P, and then the second photoresist layer is removed from the P-type semiconductor layer23P of the epitaxial stacked layer20P.

(c) Referring toFIGS. 5A and 5Bof the drawings, the transparent electric conductive layer40P, which is stacked on the P-type semiconductor layer23P of the epitaxial stacked layer20P and encapsulates the current blocking layer30P, is formed, wherein a third photoresist layer is formed on the transparent electric conductive layer40P sequentially. A portion of the transparent electric conductive layer40P is removed by etching, so as to expose a respective portion of the current blocking layer30P, and then the third photoresist layer is removed from the transparent electric conductive layer40P.

(d) Referring toFIG. 6AandFIG. 6Bof the drawings, a fourth photoresist layer is formed on the transparent electric conductive layer40P, and an N-type electrode52P and a P-type electrode51P of the metallic electrode assembly50P are formed on the transparent electric conductive layer40P, wherein the P-type electrode51P is electrically linked with the transparent electric conductive layer40P, while the N-type electrode52P is electrically linked with the N-type semiconductor layer21P. Then, the forth photoresist layer is removed from the transparent electric conductive layer40P.

(e) Referring toFIG. 7AandFIG. 7Bof the drawings, the passivation protective layer60P is formed on the N-type electrode51P and P-type electrode52P, wherein a fifth photoresist layer is formed on the passivation protective layer60P sequentially, and then the passivation protective layer60P is etched for allowing a portion of the P-type electrode51P and a portion of the N-type electrode52P being exposed. Then, the fifth photoresist layer is removed from the passivation protective layer60P to form the LED chip eventually.

However, there are still many drawbacks existing in the conventional LED chip. Firstly, since the current blocking layer30P is stackingly formed on the P-type semiconductor layer23P of the epitaxial stacked layer20, the amount of the material for manufacturing the chip is increased as well as the size thereof and the productivity of the chip is affected due to a prolonged manufacturing process, so that the manufacturing costs of the LED chip is increased.

Furthermore, the adhesion between the P-type electrode51P and the transparent electric conductive layer40P is relatively week, and that the P-type electrode51P is not completely contacted with the transparent electric conductive layer40P, so that a hole design is required for the P-type electrode51P and the transparent electric conductive layer40P, resulting in further increase of the manufacturing cost of the chip.

In addition, the P-type electrode51P is isolated with the transparent electric conductive layer40P via the current blocking layer30P, so that less current is able to flow into the peripheral edge of the chip, resulting in a week illumination at the peripheral edge of the chip. Therefore, the luminous efficiency of the chip is adversely influenced.

SUMMARY OF THE PRESENT INVENTION

The invention is advantageous in that it provides a LED and its LED chip, and the manufacturing method and light emitting method of the LED chip, wherein the luminous efficiency of the LED chip is able to be improved significantly.

Another advantage of the invention is to provide a LED and a LED chip thereof, and the manufacturing method and light emitting method of the LED chip, wherein the current in the LED chip is able to be distributed evenly so as to improve the reliability of the LED chip.

Another advantage of the invention is to provide a LED and a LED chip thereof, and the manufacturing method and light emitting method of the LED chip, wherein the manufacture procedure of the photoetching is able to be reduced, which helps to improve the productivity of the LED chip and reduce the manufacturing cost of the LED chip.

Another advantage of the invention is to provide a LED and a LED chip thereof, and the manufacturing method and light emitting method of the LED chip, wherein a first photoetching is taken after stacking a transparent electric conductive base layer on an epitaxial stacked layer, so as to form and stack the transparent electric conductive base layer on a transparent electric conductive layer of the epitaxial stacked layer, which enables the transparent electric conductive layer to be formed and to expose a N-type semiconductor layer of the epitaxial stacked layer in the same manufacture procedure of the first photoetching, such that the LED chip of the present invention has a lower manufacturing cost than the manufacture procedure of the photoetching of the conventional LED chip.

Another advantage of the invention is to provide a LED and a LED chip thereof, and the manufacturing method and light-emitting method of the LED chip, wherein the LED chip provides a passivation protective layer stacked on the transparent electric conductive layer, wherein the passivation protective layer can not only block the current but also improve the effect of the current expanding transversely so as to distribute the current more evenly and to help on improving the luminous efficiency of the LED chip.

Another advantage of the invention is to provide a LED and a LED chip thereof, and the manufacturing method and light-emitting method of the LED chip, wherein the electrode assembly is fabricated after forming the passivation protective layer, such that the passivation protective layer has the effect of blocking the current since the passivation protective layer is directly stacked on the transparent electric conductive layer, and the chip of the present invention needs no special current blocking layer compared to the conventional LED chip, wherein the method described above can not only help to reduce the manufacturing cost of the chip but also help to reduce at least one step of the manufacture procedure of the photoetching of the LED chip and shorten the production line thereof, so as to reduce the manufacturing cost of the LED chip and reduce the size and the thickness of the LED chip.

Another advantage of the invention is to provide a LED and a LED chip thereof, and the manufacturing method and light-emitting method of the LED chip, wherein the passivation protective layer provides an array of passive-layer holes so as to allow the electrode assembly to electrically link with the transparent electric conductive layer, and then the LED chips are able to achieve the dot glowing in the passive-layer holes of the passivation protective layer, such that the brightness of the LED chips is enhanced.

Another advantage of the invention is to provide a LED and a LED chip thereof, and the manufacturing method and light-emitting method of the LED chip, wherein the P-type electrode of the chip comprises an array of finger members formed in the passive-layer holes of the passivation protective layer when the passivation protective layer is formed, so that when the working voltage is applied to the P-type electrode, the current flowing through the finger members of the P-type electrode is able to be provided to the transparent electric conductive layer at different positions of the transparent electric conductive layer to facilitate the current distribution more evenly.

According to the present invention, the foregoing and other objects and advantages are attained by a LED chip, comprising:

a substrate;

an epitaxial stacked layer which comprises an N-type semiconductor layer, an active region and a P-type semiconductor layer, wherein the N-type semiconductor layer, the active region and the P-type semiconductor layer are stacked with each other in sequence;

a transparent electric conductive layer stacked on the P-type semiconductor layer of the epitaxial stacked layer;

a passivation protective layer having a plurality of passive-layer holes formed therein, wherein the passivation protective layer is stacked on the transparent electric conductive layer in such a manner that the passive-layer holes are positioned with respect to different positions of the transparent electric conductive layer respectively; and

an electrode assembly comprising an N-type electrode and a P-type electrode, wherein the N-type electrode is electrically linked with the N-type semiconductor layer of the epitaxial stacked layer, and a portion of the P-type electrode, passing through the plurality of passive-layer holes of the passivation protective layer, is electrically linked with the transparent electric conductive layer.

In one embodiment of the present invention, the LED chip has an N-type exposed portion extending from the passivation protective layer to the N-type semiconductor layer of the epitaxial stacked layer through the transparent electric conductive layer and the P-type semiconductor layer of the epitaxial stacked layer and the active region, such that a portion of the N-type semiconductor layer is exposed at the N-type exposed portion.

In one embodiment of the present invention, the N-type electrode is formed on the N-type semiconductor layer of the epitaxial stacked layer in such a manner that the N-type electrode of the electrode assembly is electrically connected with the N-type semiconductor layer.

In one embodiment of the present invention, the N-type electrode is formed on the P-type semiconductor layer of the epitaxial stacked layer in such a manner that the P-type electrode of the electrode assembly is electrically connected with the P-type semiconductor layer.

In one embodiment of the present invention, the P-type electrode has a plurality of finger members formed in the plurality of passive-layer holes of the passivation protective layer respectively, such that the plurality of finger members of the P-type electrode are electrically connected with the transparent electric conductive layer respectively at different positions of the transparent electric conductive layer.

In one embodiment of the present invention, the plurality of finger members of the P-type electrode comprises a first group of finger members and a second group of finger members, wherein the first and second group of the finger members are extended across the LED chip along a peripheral edge of the LED chip from a first end portion to a second end portion.

In one embodiment of the present invention, the plurality of finger members of the P-type electrode comprises a first group of finger members, a second group of finger members and a third group of finger members, wherein the first group and second group of finger members are extended across the LED chip along a peripheral edge of the LED chip from a first end portion to a second end portion thereof, while the third group of finger members is retained at the second end portion of the LED chip.

In one embodiment of the present invention, the passivation protective layer is stacked on the N-type semiconductor layer that the plurality of passive-layer holes are arranged corresponding to different positions of the N-type semiconductor layer respectively, wherein a portion of the N-type electrode is electrically linked to the N-type semiconductor layer after passing through the passive-layer holes of the passivation protective layer.

In one embodiments of the present invention, the substrate is selected from the group consisting of a sapphire substrate, a silicon substrate and silicon-carbide substrate.

In one embodiment of the present invention, the substrate is selected from the group consisting of a sapphire substrate, a silicon substrate and a silicon-carbide substrate.

According to another aspect of the present invention, the present invention further provides a LED, which comprises:

an encapsulated body,

an electrode pin assembly, wherein the electrode pin assembly comprises an N-type electrode pin and a P-type electrode pin; and

a LED chip, which comprises:

a substrate;

an epitaxial stacked layer which comprises an N-type semiconductor layer, an active region and a P-type semiconductor layer, wherein the N-type semiconductor layer, the active region and the P-type semiconductor layer are stacked with each other in sequence;

a transparent electric conductive layer stacked on the P-type semiconductor layer of the epitaxial stacked layer;

a passivation protective layer having a plurality of passive-layer holes, wherein the passivation protective layer is stacked on the transparent electric conductive layer in such a manner that the passive-layer holes are positioned with respect to different positions of the transparent electric conductive layer respectively; and

an electrode assembly, which comprises an N-type electrode and a P-type electrode, wherein the N-type electrode is electrically linked with the N-type semiconductor layer of the epitaxial stacked layer, and a portion of the P-type electrode, passing through the plurality of passive-layer holes of the passivation protective layer, is electrically linked with the transparent electric conductive layer;

wherein the LED chip is encapsulated in a package body, wherein the N-type electrode pin and the P-type electrode pin are electrically connected with the N-type electrode and the P-type electrode respectively, wherein the N-type electrode pin and the P-type electrode pin are extended from the interior of the package body to the exterior thereof.

In one embodiment of the present invention, the P-type electrode pin gradually reduces its size from a connecting end to a free end thereof.

According to another aspect of the present invention, it further provides a manufacturing method of a LED chip, which comprises the following step.

(a) Form an N-type semiconductor layer, an active region and a P-type semiconductor layer sequentially on a substrate.

(b) Form a transparent electric conductive layer stacked on the P-type semiconductor layer and forming an N-type hole extended from the transparent electric conductive layer to the N-type semiconductor layer through the P-type semiconductor layer and the active region at the same time.

(c) Stack a passivation protective layer having a plurality of passive-layer holes in the transparent electric conductive layer, such that the passive-layer holes of the passivation protective layer are corresponding to different positions of the transparent electric conductive layer respectively.

(d) Electrically connect an N-type electrode to the N-type semiconductor layer, and electrically connect a P-type electrode to the P-type semiconductor layer through the plurality of passive-layer holes of the passivation protective layer.

In one embodiment of the present invention, wherein the step (b) further comprises the steps of:

stacking a transparent electric conductive base layer on the P-type semiconductor layer;

stacking a first photoresist layer on the transparent electric conductive base layer; and

etching the first photoresist layer, the transparent electric conductive base layer, and the active region from pre-determined positions so as to form the N-type hole and the transparent electric conductive layer simultaneously.

In one embodiment of the present invention, wherein the step (b) further comprises the steps of:

stacking a transparent electric conductive base layer on the P-type semiconductor layer;

stacking a first photoresist layer on the transparent electric conductive base layer; and

etching the first photoresist layer, the transparent electric conductive base layer, the active region and a pre-determined position of the N-type semiconductor layer so as to form the N-type hole and the transparent electric conductive layer simultaneously.

In one embodiment of the present invention, the transparent electric conductive layer is stacked on the P-type semiconductor layer by means of evaporation.

In one embodiment of the present invention, in the step (c), a N-type exposed portion, which is extended from the passivation protective layer to the N-type semiconductor layer through the transparent electric conductive layer, P-type semiconductor layer and the active region, is formed at the position of N-type hole, while stacking the passivation protective layer on the transparent electric conductive layer.

In one embodiment of the present invention, the step (c) further comprises the steps of:

stacking a passive base layer on the transparent electric conductive layer;

stacking a second photoresist layer on the passive base layer; and

removing the second photoresist layer and the passive base layer of the positions corresponding to the N-type holes, such that the passivation protective layer and the N-type exposed portion are formed simultaneously.

In one embodiment of the present invention, in the step (d), a plurality of finger members, extending from one side of the passivation protective layer to the opposing side thereof through the plurality passive-layer holes of the passivation protective layer respectively, are formed when the P-type electrode is formed on the passivation protective layer, wherein the finger members are electrically connected with the transparent electric conductive layer respectively at different position of the transparent electric conductive layer respectively.

According to another aspect of the present invention, the present invention further comprises a light emitting method of a LED chip, which comprises the following steps:

(A) Apply an electric current to a transparent electric conductive layer at different positions, such that the electrical current is evenly distributed at the transparent electric conductive layer.

(B) Apply a voltage at two sides of the active region from a N-type semiconductor layer and a P-type semiconductor layer, such that the active region is enabled to produce lighting, wherein the transparent electric conductive layer is stacked on the P-type semiconductor layer.

In one embodiment of the present invention, the electric current is applied to the transparent electric conductive layer from two sides of the LED chip, such that the electrical current is evenly distributed at the transparent electric conductive layer.

In one embodiment of the present invention, the electric current is applied to the transparent electric conductive layer from two sides and one end portion of the LED chip, such that the electrical current is evenly distributed at the transparent electric conductive layer.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

Referring to theFIGS. 8 to 17Bof the drawings, a chip100of a LED according to a preferred embodiment of the present invention is illustrated, wherein the LED chip100comprises a substrate10, an epitaxial stacked layer20, a transparent electric conductive layer30, a passivation protective layer40, and an electrode assembly50.

In particular, the epitaxial stacked layer20comprises an N-type semiconductor layer21, an active region22and a P-type semiconductor layer23, wherein the substrate10, the N-type semiconductor layer21, the active region22, the P-type semiconductor layer23, the transparent electric conductive layer30, and the passivation protective layer40are stacked in sequence. The transparent electric conductive layer30is electrically linked with the P-type semiconductor layer23of the epitaxial stacked layer20. The electrode assembly50comprises an N-type electrode51and a P-type electrode52, wherein the N-type electrode51is electrically linked with the N-type semiconductor layer21of the epitaxial stacked layer20, while the P-type electrode52is electrically linked with the transparent electric conductive layer30. Accordingly, an external voltage is able to be applied to the N-type semiconductor layer21and the P-type semiconductor layer23from the P-type electrode52and the N-type electrode51respectively, so that an electric current passing through the active region22of the epitaxial stacked layer20is able to be compounded at the active region22to produce lighting. Preferably, the active region22is embodied as a MQW (Multiple Quantum Well) layer and at least one of the N-type semiconductor layer21and the P-type semiconductor layer23is embodied as a gallium carbide layer.

According to the preferred embodiment of the present invention, the N-type electrode51and the P-type electrode52of the electrode assembly50are located at the same side of the LED chip100. In other words, the external voltage can be applied to the N-type semiconductor layer21and the P-type semiconductor layer23by the N-type electrode51and the P-type electrode52at the same side of the LED chip100, such that the electric current is compounded at the active region22to produce the light. In particular, the LED chip100has an N-type exposed portion60extending from the passivation protective layer40to the N-type semiconductor layer21through the transparent electric conductive layer30, the P-type semiconductor layer23and the active region22, in such a manner that a portion of the N-type semiconductor layer21is exposed at the N-type exposed portion60. The N-type electrode51is retained on the N-type exposed portion60and is electrically linked with the N-type semiconductor layer21.

Referring to theFIG. 16AandFIG. 16Bof the drawings, the passivation protective layer40has a plurality of passive-layer holes41distributed in an array shape, wherein the passive-layer holes41of the passivation protective layer40are arranged corresponding to different positions of the transparent electric conductive layer30respectively. Correspondingly, when the P-type electrode52is formed at the passivation protective layer40, the P-type electrode52of the electrode assembly50has a plurality of finger members521formed in the plurality of passive-layer holes41of the passivation protective layer40respectively. In other words, the plurality of finger members521of the P-type electrode52is extended across the passivation protective layer40from one side to the opposing side thereof through the plurality of the passive-layer holes41of the passivation protective layer40respectively, and that the plurality of finger members521of the P-type electrode52is electrically linked with the transparent electric conductive layer30, such that the LED chip100is able to produce light spots in the plurality of passive-layer holes41of the passivation protective layer40, so that the brightness of the LED chip100is enhanced.

It is worth mentioning that the P-type electrode52is electrically linked with the transparent electric conductive layer30by the plurality of finger members521, such that the current is guided to the transparent electric conductive layer30from the different positions thereof by the plurality of finger members521of the P-type electrode52, when the voltage is applied to the N-type electrode51and the P-type electrode52. Accordingly, the electric current distribution of the LED chip100is more even, which is benefit to improve a uniform illumination at different positions of the active region22and the luminous efficiency of the chip100.

Referring to theFIGS. 8 to 16Bof the drawings, a manufacturing process of the LED chip is illustrated. In particular, in the stage as shown inFIG. 8, the substrate10is provided, wherein the type of the substrate is not intended to be limiting in the present invention. For example, the substrate10of the LED chip100can include, but not limited to, a sapphire substrate, a silicon substrate, a silicon-carbide substrate, and etc.

In the stage as shown in theFIG. 9of the drawings, the N-type semiconductor layer21, the active region22, and the P-type semiconductor layer23of the epitaxial stacked layer20are formed on the substrate10in sequence, such that the substrate10, the N-type semiconductor layer21, the active region22, the P-type semiconductor layer23of the epitaxial stacked layer20are stacked one after one sequentially.

It is worth mentioning that the way of generating the N-type semiconductor layer21, the active region22, and the P-type semiconductor layer23of the epitaxial stacked layer20on the substrate10sequentially is not intended to be limiting in the present invention. For example, the N-type semiconductor layer21, the active region22, and the P-type semiconductor layer23can be produced by the MOCVD (Metal-organic Chemical Vapor Deposition) technique, such that the substrate10, the N-type semiconductor layer21, the active region22, the P-type semiconductor layer23of the epitaxial stacked layer20are stacked overlappedly and sequentially.

In the stage as shown in theFIGS. 10 to 12Bof the drawings, the transparent electric conductive layer30is stacked on the P-type semiconductor layer23of the epitaxial stacked layer20, and then predetermined positions of the transparent electric conductive layer30, the P-type semiconductor layer23of the epitaxial stacked layer20the active region22are etched so as to form the N-type hole101, such that the N-type semiconductor layer21of the epitaxial stacked layer20is exposed to the N-type hole101.

It is worth mentioning that, according to the embodiment as shown in theFIGS. 10 to 12Bof the drawings, only the transparent electric conductive layer30and the P-type semiconductor layer23of the epitaxial stacked layer20and the pre-determined position of the active region22are etched in order to form the N-type hole101for exposing the N-type semiconductor layer21of the epitaxial stacked layer20. According to another preferred embodiment of the LED chip100of the present invention, the transparent electric conductive layer30, the P-type semiconductor layer23and the active region22of the epitaxial stacked layer20, and the pre-determined position of the N-type semiconductor layer21are completely etched, while the N-type semiconductor layer21are only partially etched in order to form the N-type hole101for exposing the N-type semiconductor layer21of the epitaxial stacked layer20.

More specifically, in the stage as shown inFIG. 10, a transparent electric conductive base layer102is stacked on the P-type semiconductor layer23of the epitaxial stacked layer20. Then, in the stage as shown inFIG. 11, a first photoresist layer103is stacked on the transparent electric conductive base layer102. Then, in the stage as shown inFIGS. 12A and 12B, the first photoresist layer103, the transparent electric conductive base layer102, the P-type semiconductor layer23, the active region22, and the N-type hole101are etched sequentially to expose a portion of the outer surface of the N-type semiconductor layer21via the N-type hole101, while the transparent electric conductive base layer102is stackedly formed on the transparent electric conductive layer30of the P-type semiconductor layer23. It is appreciated that that the N-type hole101is extended from the transparent electric conductive layer30to the N-type semiconductor layer21through the P-type semiconductor layer23and the active region22to expose a portion of the surface of the N-type semiconductor layer21via the N-type hole101. The first photoresist layer103is removed after the N-type hole101is formed.

According to a preferred embodiment of the LED chip100of the present invention, in the stage as shown inFIG. 10, the transparent electric conductive base layer102is stacked on the P-type semiconductor layer23of the epitaxial stacked layer20through evaporation techniques. Certainly, person skilled in the art would understand that the way of stacking the transparent electric conductive base layer102on the P-type semiconductor layer23of the epitaxial stacked layer20is not limited to the evaporation technique. For example, the transparent electric conductive base layer102may also be stacked on the P-type semiconductor layer23of the epitaxial stacked layer20by precipitation technique.

The different between the manufacturing method of the present invention with the conventional manufacturing process is that the transparent electric conductive layer30is stacked on the P-type semiconductor layer23of the epitaxial stacked layer20after the epitaxial stacked layer20is etched to expose the N-type semiconductor layer21, so that the photoetching process of the chip in the conventional manufacturing process can be eliminated that the transparent electric conductive base layer102is stacked on the P-type semiconductor layer23of the epitaxial stacked layer20, and then the transparent electric conductive base layer102, the P-type semiconductor layer23of the epitaxial stacked layer20, the active region22, and the N-type semiconductor layer21are etched to form the N-type hole101for exposing the portion of the surface of the N-type semiconductor layer21simultaneously. Accordingly, the production line of the LED chip100can be shortened so as to improve the productivity of the chip and reduce the manufacturing cost thereof.

It is worth mentioning that, as shown in theFIG. 12A, the N-type hole101has a boning-pad hole1011formed at a second end portion1002of the chip100and an extension hole1012is extended from the boning-pad hole1011to the first end portion of the LED chip100along a longitudinal direction of the chip100from a mid-portion thereof. It is appreciated that the N-type hole101having the extension hole1012as shown in theFIG. 12Ais only exemplary, which is not intended to limit the scope of the chip100of the present invention. In other words, in other examples of the present invention, the N-type hole101of the chip100may have two or more extension holes1012.

In the stage as shown in theFIG. 13toFIG. 15Bof the drawings, the transparent electric conductive layer30and the N-type semiconductor layer21are stacked on the passivation protective layer40. Then, the predetermined position(s) of the passivation protective layer40are removed so as to form the N-type exposed portion60and the plurality of passive-layer holes41of the passivation protective layer40. In other words, the N-type exposed portion60is extended from the passivation protective layer40to the N-type semiconductor layer21through the transparent electric conductive layer30, the P-type semiconductor layer23and the active region22, so as to expose a portion of the N-type semiconductor layer21.

In particular, firstly, in the stage as shown inFIG. 13, a passive base layer104is stacked on the transparent electric conductive layer30and the N-type semiconductor layer21. Then, in the stage as shown inFIG. 14, a second photoresist layer105is stacked on the passive base layer104. Then, in the stage as shown inFIGS. 15A and 15B, the predetermined position of the passive base layer104is removed so as to form the passivation protective layer40stacked on the transparent electric conductive layer30, the N-type exposed portion60for exposing the N-type semiconductor layer21and the plurality of passive-layer holes41of the passivation protective layer40. The second photoresist layer105is removed after the passivation protective layer40, the passive-layer holes41of the passivation protective layer40and the N-type exposed portion60are formed.

The different between the manufacturing method of the present invention with the conventional manufacturing process is that the passivation protective layer40is stacked on the P-type electrode52so as to isolate and separate the passivation protective layer40and the transparent electric conductive layer30by the passivation protective layer40, and that the passivation protective layer40is stacked on the transparent electric conductive layer30directly. Accordingly, the passivation protective layer40can not only be able to block the current, but also is able to improve the transverse expanding effect of the, such that the current distribution of the LED chip100is more even, which is particularly critical to improve the luminous efficiency and luminous uniformity of the LED chip100.

In addition, the passivation protective layer40of the chip100of the present invention is stacked on the transparent electric conductive layer30directly so as to block the current, so that there is no need to arrange another specific current blocking layer as in the prior art. Therefore, manufacturing material for the LED chip100can be reduced, a photoresist process for producing the current blocking is eliminated, and thus the production line of the chip can be shortened, so as to improve the productivity of the LED chip100and reduce the manufacture cost thereof, while the thickness and the size of the LED chip can be reduced.

More specifically, according to the preferred embodiment as shown in the15A and15B, there are three columns of the passive-layer holes41of the passivation protective layer40are formed. For ease of description, the three columns of the passive-layer holes41are defines as a first passive-layer hole column41a, a second passive-layer hole column41band a third passive-layer hole column41c, wherein each passive-layer hole41of first passive-layer hole column41aand the third passive-layer hole column41cis extended across the LED chip100along a peripheral edge thereof in a symmetrical manner from the first end portion1001and the second end portion1002thereof, while each passive-layer hole41of the second passive-layer hole column41bis extended along the extension hole1012of the N-type hole101.

In the stage as shown in theFIG. 16AandFIG. 16B, the N-type electrode51is formed at the N-type exposed portion60of the100so as to electrically link the N-type electrode51to the N-type semiconductor layer21of the epitaxial stacked layer20. The P-type electrode52is formed at the transparent electric conductive layer30and the passivation protective layer40so as to electrically link the P-type electrode52to the transparent electric conductive layer30, thereby the LED chip100is produced.

Referring to theFIG. 16AandFIG. 16B, the N-type electrode51comprises an N-type electrode pad511and an N-type electrode extension512extended from the N-type electrode pad511, wherein the N-type electrode pad511is formed in the boning-pad hole1011of the N-type hole101, and the N-type electrode extension512is formed in the extension hole1012of the N-type hole101. Accordingly, the P-type electrode52comprises a P-type electrode pad522and two P-type electrode extensions523extended from the P-type electrode pad522, wherein the P-type electrode pad522is formed at the first end portion1001of the chip100, while two P-type electrode extensions523are extended across the LED chip100in a symmetrical manner from the P-type electrode pad522to the second end portion1002thereof along a peripheral edge of the LED chip100, wherein the N-type electrode extension512is supported between the two P-type electrode extensions523.

It is worth mentioning that the plurality of finger members521is formed in the plurality of the passive-layer holes41of the passivation protective layer40respectively, when the P-type electrode52is formed at the transparent electric conductive layer30and the passivation protective layer40, so that the plurality of finger members521is extended from one side to the opposing side of the passivation protective layer40through the plurality of passive-layer holes41of the passivation protective layer40respectively, so as to electrically link with the different positions of the transparent electric conductive layer30. In other words, the plurality of finger members521of the P-type electrode52is extended from the P-type electrode extension523to each passive-layer holes41of the first passive-layer hole column of the passivation protective layer40. The plurality of finger members521of the P-type electrode52is arranged in array shape, since the plurality of passive-layer holes41of the passivation protective layer40is in array shape. Therefore, when the external voltage is applied to the N-type electrode51and the P-type electrode52, the electric current passing through the plurality of finger members521is distributed to different positions of the transparent electric conductive layer30. Accordingly, the current distribution of the LED chip100is more even, and the illumination uniformity at different positions of the active region22of the chip100and the luminous efficiency thereof can be improved. Correspondingly, the finger members521are also be formed in the passive-layer holes41respectively and extended from the passive-layer holes412to the passive-layer holes41of the second passive-layer hole column41bof the passivation protective layer40.

Referring to theFIG. 17AandFIG. 17B, the current flow after the voltage being applied to the P-type electrode52and the N-type electrode51is illustrated, wherein when flowing along the P-type electrode52from a left side to a right side as illustrated in theFIGS. 17A and 17B, the current also flows along the plurality of finger members521of the P-type electrode52from a top side to a bottom side as illustrated in theFIG. 17Aand to the transparent electric conductive layer30. Since the plurality of finger members521of the P-type electrode52is arranged in array shape, the current flows to the transparent electric conductive layer30from different positions thereof. Therefore, the LED chip100is able to generate multiple lighting spots at the plurality of passive-layer holes41of the passivation protective layer40respectively so as to improve the brightness of the LED chip100.

Referring to theFIG. 18AandFIG. 18B, an alternative mode of LED chip according to the preferred embodiment of the present invention is illustrated, wherein the plurality of passive-layer holes41of the passivation protective layer40is formed at a peripheral edge of the chip100, which is different from the chip100as shown inFIG. 16AandFIG. 16B. For example, the plurality of passive-layer holes41of the passivation protective layer40is formed at a left peripheral edge as illustrated inFIG. 18Aand FIG.18B, wherein the plurality of finger members521is also formed at the left peripheral edge of the LED chip100, such that the current is also guided from the top side to the bottom side as illustrated inFIG. 17A, and then is guided to the transparent electric conductive layer30along the plurality of finger members521of the P-type electrode52when the current flows from the left side to the right side as illustrated inFIG. 19Aand theFIG. 19Balong the P-type electrode52while the voltage is applied to the P-type electrode52and the N-type electrode51.

More specifically, according to the preferred embodiment as illustrated inFIG. 16AandFIG. 16B, the N-type electrode51is extended from the first end portion1001of the LED chip100to the second end portion1002thereof at a center of the LED chip100, wherein the plurality of finger members521of the P-type electrode52comprises a first group of finger members5211and a second group of finger members5212, wherein the first group and second group of finger members5212are extended across the LED chip100along the peripheral edge from the first end portion1001to the second end portion1002thereof respectively. According to the preferred embodiment as shown inFIG. 18AandFIG. 18Bof the drawings, the N-type electrode51is extended from the first end portion1001to the second end portion1002of the LED chip100at the center thereof, and the finger members521of the P-type electrode52form the first group of finger members5211, the second group of finger members5212and a third group of finger members5213, wherein the first group of finger member5211and the second group of finger members5212are extended from the second end portion1002to the first end portion1001of the LED chip100at the edge thereof respectively, wherein the third group of finger members5213is supported at the second end portion1002of the LED chip100.

In accordance with another aspect of the invention, the present invention provides a manufacturing method of a LED chip of a LED, which comprises the steps of:

(a) forming the N-type semiconductor layer21, the active region22and the P-type semiconductor layer23sequentially on the substrate10;

(b) forming the transparent electric conductive layer30stacked on the P-type semiconductor layer23and forming the N-type hole101extended from the transparent electric conductive layer30to the N-type semiconductor layer21through the P-type semiconductor layer23and the active region22at the same time;

(c) stacking the passivation protective layer40having the plurality of passive-layer holes41on the transparent electric conductive layer30, such that the plurality of passive-layer holes41of the passivation protective layer40are arranged corresponding to different positions of the transparent electric conductive layer30respectively; and

(d) electrically linking the N-type electrode51to the N-type semiconductor layer21, and electrically linking the P-type electrode52to the P-type semiconductor layer23through the plurality of passive-layer holes41of the passivation protective layer40.

According to one embodiment of the present invention, the step (b) further comprises the steps of:

stacking the transparent electric conductive base layer102on the P-type semiconductor layer23;

stacking the first photoresist layer103on the transparent electric conductive base layer102; and

etching predetermined positions of the first photoresist layer103, the transparent electric conductive base layer102, the P-type semiconductor layer23, and the active region22so as to form the N-type hole101and the transparent electric conductive layer30simultaneously.

According to one embodiment of the present invention, the step (b) further comprises the steps of:

stacking the transparent electric conductive base layer102on the P-type semiconductor layer23;

stacking the first photoresist layer103on the transparent electric conductive base layer102; and

etching predetermined positions of the first photoresist layer103, the transparent electric conductive base layer102, the P-type semiconductor layer23, the active region22, and the N-type semiconductor layer21so as to form the N-type hole101and the transparent electric conductive layer30simultaneously.

According to one embodiment of the present invention, the transparent electric conductive layer is stacked on the P-type semiconductor layer by evaporation.

Further, according to one embodiment of the present invention, in the step (c), while stacking the passivation protective layer40on the transparent electric conductive layer30, the N-type exposed portion60, which is extended from the passivation protective layer40to the N-type semiconductor layer21through the transparent electric conductive layer30, the P-type semiconductor layer23and the active region22, is formed at the position of N-type hole101.

According to one embodiment of the present invention, the step (c) further comprises the steps of:

stacking the passive base layer104on the transparent electric conductive layer30;

stacking the second photoresist layer105on the passive base layer104; and

removing the second photoresist layer105and the passive base layer104at the positions corresponding to the N-type holes101, such that the passivation protective layer50and the N-type exposed portion60are formed simultaneously.

Further, according to one embodiment of the present invention, in the step (d), the plurality of finger members521, extending from one side to the opposing side of the passivation protective layer40through the plurality passive-layer holes41of the passivation protective layer40respectively, are formed when the P-type electrode52is formed on the passivation protective layer50, wherein the finger members521are electrically linked with the transparent electric conductive layer30at different positions of the transparent electric conductive layer30respectively.

In accordance with another aspect of the invention, the present invention provides a light-emitting method of a LED chip of a LED, which comprises the steps of:

(A) applying an electric current to different positions of the transparent electric conductive layer30, such that the electrical current is evenly distributed at the transparent electric conductive layer30; and

(B) applying a voltage at two sides of the active region22from the N-type semiconductor layer21and the P-type semiconductor layer23, such that the active region22is enabled to produce lighting, wherein the transparent electric conductive layer30is stacked on the P-type semiconductor layer23.

According to one embodiment of the present invention, the electric current is applied to the transparent electric conductive layer30from two sides of the LED chip100, such that the electrical current is evenly distributed at the transparent electric conductive layer30.

According to one embodiment of the present invention, the electric current is applied to the transparent electric conductive layer30at two sides and one end portion of the LED chip100, such that the electrical current is evenly distributed at the transparent electric conductive layer30.

Referring to theFIG. 20, a LED according to a preferred embodiment of the present invention is illustrated, wherein the LED comprises at least one chip100, an encapsulated body200and an electrode pin assembly300, wherein the electrode pin assembly300comprises an N-type electrode pin301and a P-type electrode pin302, and the at least one chip100is encapsulated in the package body200. The N-type electrode pin301and the P-type electrode pin302are electrically linked with the N-type electrode51and the P-type electrode52of the chip100respectively, while the N-type electrode pin301and the P-type electrode pin302are extended from an interior of the package body200to an exterior thereof. The at least one chip100is able to generate light when the current flows to the active region22through the N-type electrode pin301and the P-type electrode pin302.

Preferably, the P-type electrode pin302gradually reduces its size from an electrically connecting end to a free end of the P-type electrode pin302, such that the problem of the welding portion between the P-type electrode52and the P-type electrode pin302may be burned when the pulse is aging can be avoided.

It is worth mentioning that the thickness of the substrate10, the N-type semiconductor layer21, the active region22, the P-type semiconductor layer23, the transparent electric conductive layer30, the passivation protective layer40, the N-type electrode51, and the P-type electrode52of the LED chip100as shown inFIG. 8toFIG. 20is only exemplary, which is not intended to be limiting in the present invention. Furthermore, the real thickness of the N-type semiconductor layer21, the active region22, the P-type semiconductor layer23, the transparent electric conductive layer30, the passivation protective layer40, the N-type electrode51, and the P-type electrode52of the LED chip100is not the size as shown inFIGS. 8 to 20, which is also not intended to be limiting in the present invention.