Light emitter devices having improved light output and related methods

Light emitter devices having improved light output and related methods are disclosed. In one embodiment, light emitter devices can include a light emission area including one or more light emitting chips. The emitter device can further include a filling material at least partially disposed over the one or more light emitting chips. The filling material can include a first discrete layer of phosphor containing material and a second discrete layer of optically clear material. The device can optionally include more than one discrete layer of optically clear material. Each of the discrete layers of material can be separately dispensed within the light emission area such that the filling material is dispensed to a level that is substantially flush with an upper surface of the emitter device.

TECHNICAL FIELD

The subject matter herein relates generally to light emitter devices and related methods. More particularly, the subject matter herein relates to light emitter devices having improved light output and related methods.

BACKGROUND

Light emitting diodes (LEDs) can be utilized in light emitter devices or packages for providing white light (e.g., perceived as being white or near-white) and are developing as replacements for incandescent, fluorescent, and metal halide high-intensity discharge (HID) light products. Conventional light emitter devices or packages employ conventional wisdom which aims at minimizing distances between the LED chips and air interface for increasing light extraction efficiency. Conventional light emitter devices also typically employ a single layer of encapsulant which may or may not contain one or more phosphors disposed therein. A need exists to provide light emitter devices with improved light output and related methods by employing improved emitter device packages, dimensions, and/or properties.

Despite the availability of various light emitter devices, a need remains for devices and components having improved brightness and light output. Light emitter devices and methods described herein can advantageously increase distances between the LED chips and air interface in part by changing the depth of packages and/or by dispensing one or more clear layers of encapsulant within the device in addition to a layer of encapsulant having phosphor disposed therein. Notably, described methods can be used and applied to create brighter surface mount device (SMD) type of light emitter devices of any style, shape, and/or dimension.

SUMMARY

In accordance with this disclosure, novel light emitter devices having improved light output are provided. It is, therefore, an object of the present disclosure herein to provide devices and methods which exhibit improved light output provided in part by provision of an additional clear layer of material deposited within a cavity of the device alone and/or in combination with increasing a depth of the cavity of the device for maximizing a distance between an LED chip and air interface. Such improvements in depth and the addition of one or more clear layers can be adapted to maximize light extraction efficiency.

This and other objects of the present disclosure as can become apparent from the disclosure herein are achieved, at least in whole or in part, by the subject matter disclosed herein.

DETAILED DESCRIPTION

Reference will now be made in detail to possible aspects or embodiments of the subject matter herein, one or more examples of which are shown in the figures. Each example is provided to explain the subject matter and not as a limitation. In fact, features illustrated or described as part of one embodiment can be used in another embodiment to yield still a further embodiment. It is intended that the subject matter disclosed and envisioned herein covers such modifications and variations.

As illustrated in the various figures, some sizes of structures or portions are exaggerated relative to other structures or portions for illustrative purposes and, thus, are provided to illustrate the general structures of the present subject matter. Furthermore, various aspects of the present subject matter are described with reference to a structure or a portion being formed on other structures, portions, or both. As will be appreciated by those of skill in the art, references to a structure being formed “on” or “above” another structure or portion contemplates that additional structure, portion, or both may intervene. References to a structure or a portion being formed “on” another structure or portion without an intervening structure or portion are described herein as being formed “directly on” the structure or portion. Similarly, it will be understood that when an element is referred to as being “connected”, “attached”, or “coupled” to another element, it can be directly connected, attached, or coupled to the other element, or intervening elements may be present. In contrast, when an element is referred to as being “directly connected”, “directly attached”, or “directly coupled” to another element, no intervening elements are present.

Furthermore, relative terms such as “on”, “above”, “upper”, “top”, “lower”, or “bottom” are used herein to describe one structure's or portion's relationship to another structure or portion as illustrated in the figures. It will be understood that relative terms such as “on”, “above”, “upper”, “top”, “lower” or “bottom” are intended to encompass different orientations of the device in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, structure or portion described as “above” other structures or portions would now be oriented “below” the other structures or portions. Likewise, if devices in the figures are rotated along an axis, structure or portion described as “above”, other structures or portions would now be oriented “next to” or “left of the other structures or portions. Like numbers refer to like elements throughout.

Unless the absence of one or more elements is specifically recited, the terms “comprising,” including,” and “having” as used herein should be interpreted as open-ended terms that do not preclude the presence of one or more elements.

Light emitter devices according to embodiments described herein can comprise group III-V nitride (e.g., gallium nitride (GaN)) based light emitting chips such as light emitting diode (LED) chips or lasers that can be fabricated on a growth substrate, for example, a silicon carbide (SiC) substrate, such as those devices manufactured and sold by Cree, Inc. of Durham, N.C. Other growth substrates are also contemplated herein, for example and not limited to sapphire, silicon (Si) and GaN. In one aspect, SiC substrates/layers can be 4H polytype silicon carbide substrates/layers. Other SiC candidate polytypes, such as 3C, 6H, and 15R polytypes, however, can be used. Appropriate SiC substrates are available from Cree, Inc., of Durham, N.C., the assignee of the present subject matter, and the methods for producing such substrates are set forth in the scientific literature as well as in a number of commonly assigned U.S. patents, including but not limited to U.S. Pat. No. Re. 34,861; U.S. Pat. No. 4,946,547; and U.S. Pat. No. 5,200,022, the disclosures of which are incorporated by reference herein in their entireties. Any other suitable growth substrates are contemplated herein.

As used herein, the term “Group III nitride” refers to those semiconducting compounds formed between nitrogen and one or more elements in Group III of the periodic table, usually aluminum (Al), gallium (Ga), and indium (In). The term also refers to binary, ternary, and quaternary compounds such as GaN, AlGaN and AlInGaN. The Group III elements can combine with nitrogen to form binary (e.g., GaN), ternary (e.g., AlGaN), and quaternary (e.g., AlInGaN) compounds. These compounds may have empirical formulas in which one mole of nitrogen is combined with a total of one mole of the Group III elements. Accordingly, formulas such as AlxGa1-xN where 1>x>0 are often used to describe these compounds. Techniques for epitaxial growth of Group III nitrides have become reasonably well developed and reported in the appropriate scientific literature.

Although various embodiments of light emitting chips (e.g., LEDs or LED chips) disclosed herein comprise a growth substrate, it will be understood by those skilled in the art that the crystalline epitaxial growth substrate on which the epitaxial layers comprising an LED chip are grown can be removed, and the freestanding epitaxial layers can be mounted on a substitute carrier substrate or substrate which can have different thermal, electrical, structural and/or optical characteristics than the original substrate. The subject matter described herein is not limited to structures having crystalline epitaxial growth substrates and can be used in connection with structures in which the epitaxial layers have been removed from their original growth substrates and bonded to substitute carrier substrates.

Group III nitride based chips or LEDs according to some embodiments of the present subject matter, for example, can be fabricated on growth substrates (e.g., Si, SiC, or sapphire substrates) to provide horizontal devices (with at least two electrical contacts on a same side of the LED chip) or vertical devices (with electrical contacts on opposing sides of the LED chip). Moreover, the growth substrate can be maintained on the LED chip after fabrication or removed (e.g., by etching, grinding, polishing, etc.). The growth substrate can be removed, for example, to reduce a thickness of the resulting LED chip and/or to reduce a forward voltage through a vertical LED chip. A horizontal device (with or without the growth substrate), for example, can be flip chip bonded (e.g., using solder) to a carrier substrate or printed circuit board (PCB), or wire bonded. A vertical device (with or without the growth substrate) can have a first terminal solder bonded to a carrier substrate, mounting pad, or PCB and a second terminal wire bonded to the carrier substrate, electrical element, or PCB. Examples of vertical and horizontal LED chip structures are discussed by way of example in U.S. Publication No. 2008/0258130 to Bergmann et al. and in U.S. Publication No. 2006/0186418 to Edmond et al., the disclosures of which are hereby incorporated by reference herein in their entireties.

One or more LED chips can be at least partially coated with one or more phosphors. The phosphors can absorb a portion of light emitted from the LED chip and emit a different wavelength of light such that the light emitter device or package emits a combination of light from each of the LED chip and the phosphor. In one embodiment, the light emitter device or package emits what is perceived as white light resulting from a combination of light emission from the LED chip and the phosphor. One or more LED chips can be coated and fabricated using many different methods, with one suitable method being described in U.S. patent application Ser. Nos. 11/656,759 and 11/899,790, both entitled “Wafer Level Phosphor Coating Method and Devices Fabricated Utilizing Method”, and both of which are incorporated herein by reference in their entireties. Other suitable methods for coating one or more LED chips are described in U.S. patent application Ser. No. 12/014,404 entitled “Phosphor Coating Systems and Methods for light emitter Structures and Packaged light emitter Diodes Including Phosphor Coating” and the continuation-in-part application U.S. patent application Ser. No. 12/717,048 entitled “Systems and Methods for Application of Optical Materials to Optical Elements”, the disclosures of which are hereby incorporated by reference herein in their entireties. LED chips can also be coated using other methods such electrophoretic deposition (EPD), with a suitable EPD method described in U.S. patent application Ser. No. 11/473,089 entitled “Close Loop Electrophoretic Deposition of Semiconductor Devices”, which is also incorporated herein by reference in its entirety. It is understood that light emitter devices, systems, and methods according to the present subject matter can also have multiple LED chips of different colors.

Referring now toFIGS. 1 to 8,FIGS. 1 and 2illustrate top and cross-sectional views of one example of a light emitter package or device, generally designated10. In one aspect, light emitter device10can comprise a surface mount device (SMD) type of emitter device comprising a body12which can be molded or otherwise formed about components such as electrical leads. SMD type light emitter devices can be suitable for general LED illumination applications, such as indoor and outdoor lighting, automotive lighting, and preferably suitable for high power and/or high brightness lighting applications. The subject matter disclosed herein can be suitably adapted for application within a wide range of SMD type light emitter device designs, not limited to dimensional and/or material variations. Notably, devices and methods disclosed herein can exhibit improved light output provided in part by provision of an additional clear layer of material deposited within a cavity of the SMD type device alone and/or in combination with increasing a depth of the cavity of the device for maximizing a distance between an LED chip and air interface. Such improvements in depth and the addition of one or more clear layers can increase and maximize light extraction efficiency. Such improvements are currently not employed in the art and actually conflict with conventional wisdom employed in conventional light emitter devices which focused on minimizing (e.g., decreasing) the distance between an LED chip and air interface and providing a single layer of encapsulant with or without phosphors or phosphoric material(s). Accordingly, light emitter devices and methods disclosed herein provide unexpected results such as improved light output when employed in device design and manufacture.

In one aspect, body12can be disposed about electrical leads or lead components comprising a thermal element14and one or more electrical elements, for example, first and second electrical elements16and18, respectively. That is, thermal element14and electrical elements16and18can be collectively referred to as a “leads” which can be singulated from a sheet of leadframes (not shown). A corner notch, generally designated N can be used for indicating electrical polarity of first and second electrical elements16and18. Thermal element14and first and second electrical elements16and18can comprise a material that is electrically and/or thermally conductive such as a metal or metal alloy. In one aspect, thermal element14can be electrically and/or thermally isolated from one and/or both of first and second electrical elements16and18by one or more isolating portions20of the body. Thermal element14can also be physically separated from electrical elements16and18by isolating portions20of the body. One or more LED chips22can be mounted over thermal element14using any suitable die attach technique(s) and/or material(s), for example only and not limited to die attach adhesive (e.g., silicone, epoxy, or conductive silver (Ag) epoxy) or a metal-to-metal die attach technique such as flux or no-flux eutectic, non-eutectic, or thermal compression die attach.

LED chips22can electrically communicate with one and/or both first and second electrical elements16and18by one or more electrical connectors such as electrically conductive wire bonds24. For illustration purposes, LED chips22comprise a horizontal device having two electrical contacts (e.g., anode and cathode) on the same side (e.g., upper surface) are shown as electrically connected to two electrical elements (e.g.,16and18) via wire bonds24. However, LED chips22having one electrical contact on the upper surface that is electrically connected with a single electrical element16or18is also contemplated. In further embodiments, LED chips22can comprise a horizontal device having both electrical contacts on the bottom surface, where one contact could be directly attached to first electrical element16and the second contact could be directly attached to second electrical element18. Any type, style, structure, build, size, and/or shape of LED chip22can be used in devices described herein. For example, LED chip22can comprise a horizontally structured chip (e.g., having at least two electrical contacts on a same side of the LED) or a vertically structured chip (e.g., with electrical contacts on opposing sides of the LED) with or without a growth substrate. LED chip22can comprise one or more substantially straight cut and/or beveled (i.e., angled) cut sides or surfaces.

LED chip22can comprise a direct attach build (e.g., bonded to a carrier substrate) or a build incorporating a grown substrate such as sapphire, SiC, or GaN. LED chips22can be substantially square or rectangular in shape. LED chips22having any build, structure, type, style, shape, and/or dimension are contemplated herein. Wire bonds24or other electrical attachment connectors and related methods can be adapted to communicate, transmit, or convey an electrical current or signal from electrical elements16and18to one or more LED chips22thereby causing illumination of the one or more LED chips22. Thermal element14and/or first and second electrical elements16and18, respectively, can be coated, plated, deposited, or otherwise layered with a reflective material (FIG. 2), such as, for example and without limitation, Ag or a Ag-containing alloy for reflecting light from the one or more LED chips22.

In general, LED chips22as described herein can embody a solid state emitter used alone and/or in combination with one or more phosphors or lumiphors to emit light of various colors, color points, or wavelength ranges. In one aspect LED chips22can comprise chips selected from the following targeted wavelength bins: (1) primarily blue wavelengths (preferably approximately 430 nm to 480 nm; optionally 430-475 nm, 440-475 nm, 450-475 nm, or any suitable sub-range of 430-480 nm); (2) primarily cyan wavelengths (preferably approximately 481 nm to 499 nm); (3) primarily green wavelengths (preferably approximately 500 nm to 570 nm, optionally 505-515 nm, 515-527 nm, or 527-535 nm, or 535-570 nm, or any suitable sub-range of 500-570 nm a or any suitable sub-range of 500-570 nm); (4) primarily yellow wavelengths (preferably approximately 571 to 590 nm); and (5) primarily red wavelengths (preferably approximately 591 to 750 nm, including an optional orange sub-range (preferably approximately 591 to 620 nm), or 621-750 nm, or 621-700 nm, or 600-700 nm, or 610-700 nm, or 610-680 nm, or 620-680 nm, or 620-670 nm, and/or any suitable sub-range of 591 to 750 nm).

Still referring toFIGS. 1 and 2, body12can comprise any suitable material molded or otherwise disposed about thermal element14and/or first and second elements16and18, respectively. In one aspect, body12can comprise a ceramic material such as a low temperature co-fired ceramic (LTCC) material, a high temperature co-fired ceramic (HTCC) material, alumina, aluminum nitride (AlN), aluminum oxide (Al2O3), glass, and/or an Al panel material. In other aspects, body12can comprise a molded plastic material such as polyamide (PA), polyphthalamide (PPA), liquid crystal polymer (LCP), or silicone. One or more electrostatic discharge (ESD) protection devices25can optionally be disposed within device10and can be electrically connected to electrical elements16and18and reverse biased with respect to LED chips22. Where used, ESD device25can protect against damage from ESD within device10. For example, the arrangement of LED chips22and ESD protection device25allows excessive voltage and/or current passing through light emitter device10from an ESD event to pass through protection device25instead of LED chips22thereby protecting LED chips22from damage. In one aspect, different elements can be used as ESD protection devices25such as various vertical silicon (Si) Zener diodes, different LEDs arranged reverse biased to LED chips22, surface mount varistors and lateral Si diodes. As illustrated, ESD device25can comprise a vertically structured device having one electrical contact on the bottom and another electrical contact on the top; however, horizontally structured devices are also contemplated.

Body12of device10can comprise a cavity, generally designated26, for example, a reflector cavity optionally coated with a reflective material for reflecting light from the one or more LED chips22. AsFIG. 2illustrates, device10can comprise a light emission area comprising a space or cavity26in which one or more LED chips22can be disposed. A filling material can be at least partially disposed within the cavity26or space and over the one or more LED chips22. In one aspect, filling material can be dispensed to a level that is substantially flush with an upper surface of emitter device, or to any level below and/or above an upper surface of emitter device. Filling material can comprise a first discrete layer of filling material, such as an encapsulant layer28comprising one or more phosphors, lumiphors, and/or phosphoric or lumiphoric materials as denoted by the shaded or speckled appearance. In one aspect, the one or more phosphors can be adapted to emit light of a desired wavelength when activated by light emitted from the one or more LED chips22. Thus, in one aspect, device10can emit light having a desired wavelength or color point that can be a combination of light emitted from phosphors disposed in encapsulant layer28and from the light emitted from one or more LED chips22.

At least some LED chips22can be coated with or otherwise disposed to impinge light onto one or more phosphors disposed within encapsulant layer28. Encapsulant layer28can be adapted to absorb at least some of the LED chip emissions and responsively emit light of a different wavelength. LED chip emissions can be fully absorbed or only partially absorbed such that emissions from the resulting device include a combination of light from the LED chip22and light from one or more phosphors. In certain embodiments, at least one of the LED chips22can comprise an LED that emits light in the blue wavelength spectrum, with a phosphor absorbing some of the blue light and re-emitting yellow light. The resulting LED chip22and phosphor combination may emit a combination of blue and yellow light appearing white or non-white. Any commercially available yellow phosphor can be used for white emitting LED chips22in devices described herein. In other embodiments, at least one of the LED chips22can comprise an LED that emits light in the blue wavelength spectrum and arranged to interact with other phosphors that absorb blue light and emit green light. Any commercially available green phosphor can be used in devices described herein.

LED chips22emitting red light can also be provided and used alone and/or in combination with other LED chips22for producing warm white light and can comprise LED structures and materials that permit emission of red light directly from the active region of the LED chip22(e.g., a phosphide-based active region). Alternatively, red emitting LED chips22can comprise LEDs covered by a phosphor that absorbs the LED light and emits a red light which can combine with other emissions for achieving warm white light. Any combination of LED chip(s)22and phosphor(s) wavelength emissions can be used to achieve the desired aggregated spectral output. It is understood that light emitter packages10and50(FIGS. 3-7) as described herein can include multiple LED chips22of the same and/or different colors, of which one or more may emit white light or near-white light.

Notably, filling material disposed in light emitter device10can further comprise a second discrete layer of filling material at least partially disposed above and/or below the phosphor containing encapsulant layer28. The second layer of filling material can comprise an optically clear layer30of material adapted to improve light output by increasing light extraction efficiency. In one aspect, addition of clear layer30within device10improves the luminous flux by approximately 3% or more (e.g., seeFIG. 8). In other aspects, addition of clear layer30within device10improves the luminous flux by approximately 3% or more (e.g., seeFIG. 8). In one aspect, a single clear layer30can be disposed above a single encapsulant layer28as shown; however, more than one clear layer30and/or more than one encapsulant layer28are contemplated herein. Clear layer30can comprise any suitable material that is optically clear and capable of molding and/or dispensing within the light emission area or cavity26. Clear layer30can comprise a layer that does not contain phosphoric or lumiphoric materials.

For example only and without limitation, clear layer30can comprise a layer of any suitable epoxy, silicone, or glass material. In one aspect, clear layer30comprises a material having a refractive index (RI) between that of the air and the chip. For example, in one aspect, clear layer30can comprise a low RI silicone material having a RI of approximately 1.4 or less. The RI of the silicone material can comprise any sub-range between approximately 1.0 and 1.4 such as 1.1 to 1.2; 1.2 to 1.3; and 1.3 to 1.4. In alternative embodiments, clear layer30can comprise a high RI silicone material having a RI of approximately 1.5 or more. That is, the RI of clear layer30comprising a high RI silicone material can be any sub-range between approximately 1.5 and 2.0, for example such as: 1.5 to 1.6; 1.6 to 1.7; 1.7 to 1.8; 1.8 to 1.9; and 1.9 to 2.0. Silicone materials having a medium RI of approximately 1.4 to 1.5 are also contemplated herein. In some aspects, clear layer30and encapsulant layer28can comprise the same material (e.g., both can comprise a high RI silicone, a low RI silicone, or a medium RI silicone), however, one difference being the addition of phosphor(s) to encapsulant layer28. In other aspects, clear layer30and encapsulant layer28can comprise different materials, for example, clear layer30can comprise a high RI silicone and encapsulant layer28can comprise a low RI silicone or vice versa. Encapsulant layer28and clear layer30can comprise any suitable material capable of being dispensed and/or molded. In one embodiment, encapsulant layer28can be directly disposed over a portion of the LED chips22, in other aspects, clear layer can be directly disposed over a portion of the LED chips22(e.g., seeFIG. 6). Encapsulant layer28, clear layer30, and/or multiple discrete clear layers30can be separately and sequentially dispensed directly over each other within cavity26of device10.

In one aspect, addition of clear layer30alone can contribute to improved light output of light emitter device10by reducing the amount of reabsorbed internal reflections, thereby increasing the overall luminous output of the device. In other aspects, clear layer30can be used in combination with an increase in the depth of cavity26to improve light output of light emitter device10. For example, the depth of cavity26can be increased to accommodate the additional clear layer30such that a distance d can be increased or maximized to increase light output. Distance d can comprise a distance between the LED chip22and air interface. Distance d can be, but does not have to be, approximately the same for each of the plurality of LED chips22as the distances may vary due to process variability. Thus, in one aspect, distance d can comprise an average distance (calculated by averaging distance d for each LED chip22) between the plurality of LED chips22and the air interface. In one aspect, distance d can be increased by increasing the design depth of cavity26, for example, by increasing a wall length of cavity26by approximately 0.2 mm to 1.5 mm. In other aspects, distance d can be increased by downsetting the one or more LED chips22, for example, by attaching LED chips22to a surface on a plane disposed below a cavity floor36, such as over a downset thermal element14. In one aspect, addition of clear layer30within device10can increase the distance d by approximately 0.2 mm (e.g., from 0.6 to 0.8 mm) thereby increasing brightness by approximately 1 to 3.5% (e.g., by approximately 1.5 to 4 lumens at 300 mA).

In contrast to conventional wisdom which tried to minimize distance d, maximizing the LED chip22to air interface, or distance d, can increase light extraction efficiency and improve light output of device10. In some aspects, distance d can be increased to accommodate more than one clear layer30provided in device10(e.g., seeFIGS. 5 to 7). Each additional clear layer30can increase distance d between LED chip22and air interface by approximately 0.2 to 0.5 mm. In one aspect, distance d can comprise approximately 0.5 to 2 mm. Notably, clear layer30, or multiple clear layers30can comprise a substantially flat, non-domed layer that is not primarily useful in curving about chips to focus light. That is, clear layer30may not be useful for focusing light as conventional domed lenses, but can still improve light output by increasing light extraction efficiency, such as by reducing the amount or reabsorbed internal reflections and/or increasing distance d.

Still referring toFIG. 2, thermal element14and first and second electrical elements16and18can comprise an inner portion32and an outer portion34. In one aspect, inner portion32and outer portion34can comprise electrically and/or thermally conductive materials. Outer portion34may be applied such that it entirely surrounds inner portion32as shown, or in other aspects outer portion34can optionally plate, coat, or comprise a layer over a single surface or two or more surfaces of portion32. In one aspect, outer portion34can for example comprise a highly reflective Ag substrate, substrate containing Ag, or layer of material such as Ag for maximizing light output from device10and for assisting in heat dissipation by conducting heat away from the one or more LED chips22. Outer portion34can also comprise a substrate of Ag-containing alloy instead of pure Ag, and such alloy can contain other metals such as titanium (Ti) or nickel (Ni). Inner portion32can for example comprise a metal or metal alloy such as copper (Cu) substrate or Cu-alloy substrate. In one aspect, an optional layer of material (not shown) can be disposed between inner portion32and outer portion34, such as a layer of Ni for providing a barrier between the Ag and Cu, thereby preventing defects caused by migratory Cu atoms, such as a defect commonly known as “red plague”. In other aspects, outer portion34can be directly attached to and/or directly coat inner portion32. Outer portion34can advantageously reflect light emitted from the one or more LED chips22thereby improving optical performance of device10.

Upper surfaces of thermal element14and electrical elements16and18can be disposed along a floor36of cavity26such that respective upper surfaces of thermal and electrical elements can be disposed along the same plane and/or different planes. For example, as shown, upper surfaces of thermal element14and electrical elements16and18are disposed along the same plane which is also the plane of floor36. In other aspects, thermal element14can be downset such that an upper surface of thermal element14can be disposed below floor36such that it is below the plane of respective upper surfaces of each electrical element16and18. That is, thermal element14can be downset such that it is disposed on a lower plane than electrical elements16and18such that thermal element14appears sunken in respect to electrical elements16and18. First and second electrical elements16and18can extend internally through body12and externally from one or more lateral sides of body12and form one or more external tab portions, generally designated38and40. Tab portions38and40can bend to form one or more lower mounting surfaces such that device10can be mounted to an underlying substrate. Tab portions38and40can outwardly bend away from each other or inwardly bend towards each other thereby adapting either a J-bend or gull-wing orientation as known in the art. However, any configuration of external tabs38and40is contemplated.

Still referring toFIG. 2, clear layer30(and/or encapsulant layer28depending upon which layer is on top) can be partially disposed below and/or above an upper surface42of device10. In one aspect, filling material can comprise clear layer30disposed above encapsulant layer28where clear layer is filled to a level that is substantially flush with upper surface42of device as shown. In alternative aspects, filling material can comprise encapsulant layer28disposed above clear layer30where encapsulant layer is filled to a level that is substantially flush with upper surface42of device. In further aspects, the top layer (e.g., either clear or encapsulant layer30or28) can be filled such that it forms a concave or convex surface with respect to upper surface42of device10as indicated by the dotted lines. One or more clear layers30can be at least partially disposed below upper surface42of device. In further aspects, one or more clear layers30can be entirely disposed below upper surface42of device. In one aspect, encapsulant layer28and clear layer30can be adapted for dispensing within cavity26. Such layers28and30can be dispensed such that they are substantially flat and adjacent each other. That is, encapsulant layer28can be disposed adjacent one or more other phosphor containing layers and/or adjacent one or more clear layers. In one aspect, encapsulant layer28can be disposed between multiple substantially flat and non-domed clear layers30. A single clear layer30can also be disposed adjacent and/or between one or more additional, substantially flat clear layers30. As noted earlier, encapsulant layer28can comprise a selective amount of one or more phosphors adapted to emit light or combinations of light providing device10having a desired color point or color temperature.

Different thicknesses and/or volumetric percentages of encapsulant layer28and clear layer30can be deposited within cavity26of emitter device10. For example and in one aspect, a volume of cavity26can be at least approximately 25% filled with encapsulant layer28and at least approximately 25% filled with clear layer30. For example, at least approximately 25% of a total cavity volume can be filled with encapsulant layer28and at least approximately 75% of the total cavity volume can be filled with clear layer30such that approximately 100% of the total cavity volume is filled (i.e., dispensed) to a level that is approximately flush with upper surface42of device10. In other aspects, the volume of cavity26can be approximately 50% filled with encapsulant layer28and approximately 50% filled with clear layer30, such that approximately 100% of the cavity is filled approximately flush with upper surface42of device10. In still further aspects, the volume of cavity26can be approximately 75% filled with encapsulant layer28and approximately 25% filled with clear layer30, such that approximately 100% of the total cavity volume is filled approximately flush with upper surface42of device10.

The volume of cavity26can be filled to any desired percentage (e.g., over-filled above upper surface42beyond 100% or under-filled below upper surface42and below 100%) and any combination or variation of volumetric percentages between encapsulant layer28and clear layer30within cavity26is contemplated herein. In one aspect, encapsulant layer28and clear layer30can comprise approximately the same thickness, in other aspects, one of encapsulant layer28or clear layer30can be thicker than the other layer. For example, in one aspect encapsulant layer28and clear layer30can each comprise approximately 0.4 mm, and each subsequent layer (where used, see e.g.,FIGS. 5-7) can comprise approximately 0.2 to 0.3 mm in thickness. In one aspect, a device having just encapsulant layer28can comprise a distance d of approximately 0.4 mm while a device as described herein having three clear layers (e.g.,FIG. 7) can comprise a distance d of approximately 0.5 to 2 mm including any sub range thereof such as 0.5 to 1 mm; 1 to 1.2 mm; 1.2 to 01.4 mm; 1.4 to 1.5 mm; 1.5 to 2 mm, and in some instances, greater than 2 mm.

In some aspects, encapsulant layer28can completely cover wirebonds24, while in other aspects, wire bonds24can be completely covered by clear layer30. In yet further aspects, wire bonds24are completely covered by a combination of encapsulant layer28and clear layer30. During manufacture of device10, a first layer (e.g., either encapsulant layer28or clear layer30) can be deposited in cavity26first and then subsequently cured prior to dispensing the second layer (e.g., the remaining encapsulant layer28or clear layer30) such that the second deposited layer can undergo a separate curing step at a different time and/or temperature. In other aspects, encapsulant layer28and clear layer30can be sequentially dispensed within cavity26such that they are directly adjacent each other and can be cured at the same time. That is, multiple dispense and multiple curing steps (i.e., separately dispensing and curing of encapsulant layer28and clear layer30) are contemplated herein, or multiple dispense and one curing step (i.e., separately dispensing and simultaneous curing of encapsulant layer28and clear layer30) are contemplated herein. Notably, the various devices shown and described herein can comprise an additional, discrete clear layer30that is physically separate from a phosphor containing encapsulant layer28for improving light output by increasing efficiency of light extraction. Devices can also advantageously provide an improved and increased distance d between the LED chip22and air interface for improving light output, as maximizing this distance can further increase light extraction efficiency.

FIGS. 3 and 4illustrate top perspective and cross-sectional views of another embodiment of a light emitter package or device, generally designated50. Light emitter device50can also incorporate an optically clear layer30(FIG. 4) that is physically separate or discrete from a phosphor containing encapsulant layer28. Clear layer30can increase light extraction efficiency in part by reducing the amount or reabsorbed internal reflections, thereby improving light output of device50. Light emitter device50can comprise an SMD type device, similar to device10. Light emitter device50can comprise a submount52over which an emission area, generally designated54, can be disposed. A light emission area54can comprise a cavity or space in which one or more LED chips22can be disposed under a first layer of filling material, such as an encapsulant layer28(seeFIG. 4). As previously described, LED chips22can comprise a plurality of chips adapted to emit the same color or targeted wavelength of lights, or at least one of the plurality of LED chips22can be adapted to emit light that is a different color (e.g., from a different targeted wavelength bin) than a second LED of the plurality of LED chips22. In one aspect, a single LED chip22is contemplated for use in emitter devices described herein. LED chips22can be configured to emit light having wavelengths in the visible spectrum portion of the electromagnetic spectrum in any of the previously described colors and/or wavelength ranges. Also as described above, encapsulant layer28can comprise phosphors adapted to emit light in any color, for example, yellow, green, and/or red when activated by emissions from the one or more LED chips22. Any combination of LED chip22and phosphor colors or targeted wavelength ranges are contemplated herein for producing white light, cool white light, and/or warm white light.

In one aspect, emission area54can be substantially centrally disposed with respect to submount52of light emitter device50. In the alternative, emission area54can be disposed at any location over light emitter device50, for example, in a corner or adjacent an edge. Any location is contemplated, and more than one emission area54is also contemplated. For illustration purposes, a single, circular emission area54is shown; however, the number, size, shape, and/or location of emission area54can change subject to the discretion of light emitter device consumers, manufacturers, and/or designers. Emission area54can comprise any suitable shape such as a substantially circular, square, oval, rectangular, diamond, irregular, regular, or asymmetrical shape. Light emitter device50can further comprise a retention material56at least partially disposed about emission area54where retention material56can be referred to as a dam. Retention material56can comprise any material such as a silicone, ceramic, thermoplastic, and/or thermosetting polymer material. In one aspect, retention material56is adapted for dispensing about emission area54, which can be advantageous as it is easy to apply and easy to obtain any desired size and/or shape.

Submount52can comprise any suitable mounting substrate, for example, a printed circuit board (PCB), a metal core printed circuit board (MCPCB), an external circuit, a dielectric laminate panel, a ceramic panel, an Al panel, AlN, Al2O3, or any other suitable substrate over which lighting devices such as LED chips may mount and/or attach. LED chips22disposed in emission area54can electrically and/or thermally communicate with electrical elements disposed with submount52, for example, electrically conductive traces (e.g.,64,66ofFIG. 4). Emission area54can comprise a single and/or a plurality of LED chips22disposed within and/or below encapsulant layer28such as illustrated inFIG. 4. Notably, emission area54of light emitter device50can further comprise a second layer of filling material at least partially disposed above and/or below the phosphor containing encapsulant layer28. The second layer of filling material can comprise an optically clear layer30(FIG. 4) of material adapted to improve light output by increasing light extraction efficiency. LED chips22can comprise any suitable size and/or shape of chip and can be vertically structured (e.g., electrical contacts on opposing sides) and/or horizontally structured (e.g., contacts on the same side or surface).

LED chips22can be any style of chip for example, straight cut and/or bevel cut chips, a sapphire, SiC, or GaN growth substrate or no substrate. One or more LED chips22can form a multi-chip array of LED chips22electrically connected to each other and/or electrically conductive traces in combinations of series and parallel configurations. In one aspect, LED chips22can be arranged in one or more strings of LEDs, where each string can comprise more than one LED electrically connected in series. Strings of LED chips22can be electrically connected in parallel to other strings of LED chips22. Strings of LED chips22can be arranged in one or more pattern (not shown). LED chips22can be electrically connected to other LEDs in series, parallel, and/or combinations of series and parallel arrangements depending upon the application.

Referring toFIG. 3, light emitter device50can further comprise at least one opening or hole, generally designated58, that can be disposed through or at least partially through submount52for facilitating attachment of light emitter device50to an external substrate, circuit, or surface. For example, one or more screws can be inserted through the at least one hole58for securing device50to another member, structure, or substrate. Light emitter device50can also comprise one or more electrical attachment surfaces60. In one aspect, attachment surfaces60comprise electrical contacts such as solder contacts or connectors. Attachment surfaces60can be any suitable configuration, size, shape and/or location and can comprise positive and negative electrode terminals, denoted by the “+” and/or “−” signs on respective sides of device50, through which an electrical current or signal can pass when connected to an external power source.

One or more external electrically conductive wires (not shown) can be physically and electrically attached to attachment surfaces60by welding, soldering, clamping, crimping, inserting, or using any other suitable gas-tight solder free attachment method known in the art. That is, in some aspects, attachment surfaces60can comprise devices configured to clamp, crimp, or otherwise attach to external wires (not shown). Electrical current or signal can pass into light emitter device50from the external wires electrically connected to device50at the attachment surfaces60. Electrical current can flow into the emission area54to facilitate light output from the LED chips22disposed therein (FIG. 4). Attachment surfaces60can electrically communicate with LED chips22of emission area54via conductive traces64and66(FIG. 4). That is, in one aspect attachment surfaces60can comprise a same layer of material as first and second conductive traces64and66(FIG. 4) and therefore can electrically communicate to LED chips22attached to traces64and66via electrical connectors such as wire bonds24. Electrical connectors can comprise wire bonds24or other suitable members for electrically connecting LED chips22to first and second conductive traces64and66(FIG. 4). That is, in one aspect LED chips22(FIG. 4) can comprise horizontally structured devices having both electrical contacts (e.g., anode and cathode) on the same top surface of respective LED chip22such that the contacts (e.g., bond pads) can electrically connect with traces (e.g.,64and66,FIG. 4) via wire bonds24. In other aspects, LED chips22can comprise horizontal devices having both electrical contacts (e.g., anode and cathode) on a bottom surface such that wire bonds24are unnecessary. In further aspects, LED chips22can comprise vertical devices having electrical contacts on opposing sides such that one wire bond24is needed. Any type or structure of LED chip22is contemplated herein.

As shown inFIG. 4, a first layer of filling material can comprise a phosphor containing encapsulant layer28that can be disposed between inner walls of retention material56. Encapsulant layer28can comprise a predetermined, or selective, amount of one or more phosphors and/or lumiphors in an amount suitable for any desired light emission, for example, suitable for white light conversion or any given color temperature or color point. Encapsulant layer28can comprise a silicone encapsulant material, such as a low RI, high RI, or medium RI silicone material having the one or more phosphors disposed therein. Encapsulant layer28can interact with light emitted from the plurality of LED chips22such that a perceived white light, or any suitable and/or desirable wavelength of light, can be observed. Any suitable combination of encapsulant and/or phosphors can be used, and combinations of differently colored phosphors and/or LED chips22can be used for producing any desired color points(s) of light. Retention material56can be adapted for dispensing, positioning, damming, or placing, about at least a portion of emission area54.

Notably, light emitter device50can further comprise a second layer of filling material at least partially disposed above and/or below the phosphor containing encapsulant layer28. The second layer of filling material can comprise a discrete layer of the previously described optically clear layer30of material adapted to improve light output by increasing light extraction efficiency. In one aspect, the addition of clear layer30within device50can improve the luminous flux by approximately 3% and in some cases by more than 5% (e.g., seeFIG. 8). In one aspect, a single clear layer30can be disposed above a single encapsulant layer28as shown, however, more than one clear layer30(e.g.FIGS. 5-7) and/or more than one encapsulant layer28are contemplated herein. Clear layer30can comprise any suitable material that is optically clear and capable of molding and/or dispensing within cavity26. Clear layer30can comprise a layer that does not contain phosphoric or lumiphoric materials and can, but does not have to, comprise the same material as encapsulant layer28without the phosphoric or lumiphoric materials. For example only and without limitation, clear layer30can comprise a layer of any suitable epoxy, silicone, or glass material. In one aspect, clear layer30comprises a material having a refractive index (RI) between that of the air and the chip. For example, in one aspect, clear layer30can comprise a low RI silicone material having a RI of approximately 1.4 or less. The RI of the silicone material can comprise any sub-range between approximately 1.0 and 1.4 such as 1.1 to 1.2; 1.2 to 1.3; and 1.3 to 1.4. In alternative embodiments, clear layer30can comprise a high RI silicone material having a RI of approximately 1.5 or more. That is, the RI of clear layer30comprising a high RI silicone material can comprise any sub-range between approximately 1.5 and 2.0, for example such as: 1.5 to 1.6; 1.6 to 1.7; 1.7 to 1.8; 1.8 to 1.9; and 1.9 to 2.0. Silicone materials having a medium RI of approximately 1.4 to 1.5 are also contemplated herein.

In one aspect, addition of clear layer30alone can contribute to improved light output of light emitter device10by reducing the amount of reabsorbed internal reflections, thereby increasing the overall luminous output of the device. In other aspects, clear layer30can be used in combination with an increase in the depth of emission area54to improve light output of light emitter device50. For example, the depth of emission area54can be increased to accommodate the additional clear layer30such that a distance d can be increased or maximized to increase light output. Distance d can be a distance between the LED chip22and air interface. In one aspect, distance d can be increased by increasing the height of retention material56. In other aspects, distance d can be increased by incorporating a secondary dam structure (e.g.,82,FIG. 7) which can increase the depth of emission area54. In contrast to conventional wisdom, maximizing the distance between LED chip22to the air interface, or distance d, can increase light extraction efficiency and improve light output of device50. In some aspects, distance d can be increased to accommodate more than one clear layer30provided in device50(e.g., seeFIGS. 5 to 7). Each additional clear layer30can increase distance d between LED chip22and air interface for example by approximately 0.2 to 0.5 mm. In one aspect, distance d can comprise a total distance between approximately 0.5 and 2 mm.

After placement of retention material56, encapsulant layer28and clear layer30can be selectively filled to any suitable level within the space disposed between one or more inner walls of retention material56. Different percentages and/or volumes of encapsulant layer28and clear layer30can be deposited within emission area54of emitter device50. In one aspect, the volume of emission area54can be at least approximately 25% filled with encapsulant layer28and at least approximately 25% filled with clear layer30. For example, at least approximately 25% of a cavity volume can be filled with encapsulant layer28and at least approximately 75% of the cavity volume can be filled with clear layer30such that approximately 100% of the emission area54can be filled (i.e., dispensed) to a level that is approximately flush with upper surface of device50(e.g., approximately flush with an upper surface of retention material56). In other aspects, the volume of emission area54can be approximately 50% filled with encapsulant layer28and approximately 50% filled with clear layer30, such that approximately 100% of the emission area54is filled approximately flush with the upper surface of retention material56. In still further aspects, the volume of emission area54can be approximately 75% filled with encapsulant layer28and approximately 25% filled with clear layer30, such that approximately 100% of the emission area54is filled approximately flush with upper surface of retention material56. Any volume of emission area54can be filled to any percentage level (e.g., over-filled above upper surface of retention material56beyond 100% or under-filled below upper surface of retention material56and below 100%) and any combination or variation of volumetric percentages of encapsulant layer28and clear layer30is contemplated herein. As denoted by the doffed lines, filling material can be over-filled and/or under-filled resulting in concave and/or convex surfaces between walls of retention material56. Any combination of thicknesses and/or volumes of filling materials can be used, for example, encapsulant layer28can comprise a thickness within the cavity of between approximately 0 and 2 mm alone and/or in combination with clear layer30which can also comprise a thickness within the cavity of between approximately 0 and 2 mm.

As described earlier and in some aspects, encapsulant layer28can completely cover wirebonds24, while in other aspects wire bonds24can be completely covered by clear layer30. In yet further aspects, wire bonds24can be covered by a combination of encapsulant layer28and clear layer30. During manufacture of device50, a first layer (e.g., either encapsulant layer28or clear layer30) can be deposited in emission area54first and then subsequently cured prior to dispensing the second layer (e.g., the remaining encapsulant layer28or clear layer30) such that the second deposited layer can undergo a separate curing step. In other aspects, encapsulant layer28and clear layer30can be sequentially dispensed in emission area54and cured at the same time. That is, multiple dispense and multiple curing steps (i.e., separately dispensing and curing of encapsulant layer28and clear layer30) can be used, or multiple dispense and one curing step (i.e., separately dispensing and simultaneous curing of encapsulant layer28and clear layer30) can be used. Notably, the various devices, for example, SMD type devices shown and described herein, can comprise an additional, clear layer30that is physically separate from a phosphor containing encapsulant layer28for improving light output by increasing efficiency of light extraction. The devices can also advantageously provide an improved and increased distance d between the LED chip22and air interface for improving light output, as maximizing this distance can further increase light extraction efficiency.

FIG. 4further illustrates retention material56dispensed or otherwise placed over submount52after wire bonding the one or more LED chips22such that retention material56is disposed over and at least partially covers at least a portion of the wire bonds24. For example, wire bonds24of the outermost edge LEDs in a given set or string of LED chips22can be disposed within retention material14. For illustration purposes, only four LED chips22are illustrated and are shown as electrically connected in series via wire bonds24, however, many strings of LED chips22of any number can be used, for example, less than four or more than four LED chips22can be electrically connected in series, parallel, and/or combinations of series and parallel arrangements. Strings of LED chips22can comprise diodes of the same and/or different colors, or wavelength bins, and different colors of phosphors can be used in the encapsulant layer28disposed over LED chips22that are the same or different colors in order to achieve emitted light of a desired color temperature or color point. LED chips22can attach to a conductive pad70or intervening layers (e.g., layer68described below) disposed between LED chip22and conductive pad70using any die attach technique or materials as known in art and mentioned above, for example adhesive attach, metal or silicone epoxy attach, solder attach, flux-attach, or direct metal-to-metal die attach techniques and materials as known in the art.

LED chips22can be arranged, disposed, or mounted over an electrically and/or thermally conductive pad70. Conductive pad70can be electrically and/or thermally conductive and can comprise any suitable electrically and/or thermally conducting material. In one aspect, conductive pad70can comprise a layer of Cu or a Cu substrate. LED chips22can be electrically connected to first and second conductive traces64and66via optional wire bonds24. One of first and second conductive traces64and66can comprise an anode and the other a cathode. Conductive traces64and66can also comprise a layer of electrically conductive Cu or Cu substrate. In one aspect, conductive pad70and traces64and66can comprise the same Cu substrate from which traces64and66have been singulated or separated from pad70via etching or other removal method. After etching, an electrically insulating solder mask72can be applied such that it is at least partially disposed between conductive pad70and respective conductive traces64and66. Solder mask72can comprise a white material for reflecting light from light emitter device50. One or more layers of material can be disposed between LED chips22and conductive pad70. Similarly, one or more layers of material can be disposed over conductive traces64and66. For example and in one aspect, a first intervening layer or substrate of material68can be disposed between LED chips22and conductive pad70and disposed over traces64and66. First layer of material68can comprise a layer of reflective Ag or Ag-alloy material for maximizing brightness of light emitted from light emitter device50. That is, first layer of material68can comprise a Ag or Ag-containing substrate adapted to increase brightness of device50. One or more additional layers of material (not shown) can be disposed between first layer68and conductive pad70and/or first layer68and traces64and66, for example, a layer of Ni, can be disposed therebetween for providing a barrier between the Cu of pad and traces70,64, and66and the Ag of layer68.

FIG. 4further illustrates a cross-section of submount52over which LED chips22can be mounted or otherwise arranged. Submount52can comprise, for example, conductive pad70, first and second conductive traces64and66, and solder mask72at least partially disposed between conductive pad70and each of conductive traces64and/or66. Conductive traces64,66and conductive pad70can be coated with a first layer68, for example a Ag or Ag-containing layer. Submount52can further comprise a dielectric layer74, and a core layer76. In one aspect, solder mask72can directly adhere to portions of dielectric layer74. For illustration purposes, submount52can comprise a MCPCB, for example, those available and manufactured by The Bergquist Company of Chanhassan, Minn. Any suitable submount52can be used, however. Core layer76can comprise a conductive metal layer, for example copper or aluminum. Dielectric layer74can comprise an electrically insulating but thermally conductive material to assist with heat dissipation through submount52.

FIGS. 5 to 7are cross-sections of light emitter device50which illustrate various locations, configurations, or arrangements of encapsulant layer28and clear layer30within emission area54. The arrangements of encapsulant layer28and clear layer30shown and described inFIGS. 5 to 7are equally applicable to device10(FIGS. 1 and 2) as well as any other emitter devices or embodiments, such as SMD type devices, however, for illustration purposes only device50has been illustrated in such numerous embodiments. Notably, devices described herein can incorporate one or more discrete optically clear layers of silicone, epoxy, or glass material for improving light output from such devices.

AsFIG. 5illustrates, more than one optically clear layer can be provided and applied to devices described herein. For example, device50can comprise a filling material disposed within emission area54, where the filling material can comprise a phosphor containing encapsulant layer28and a first layer of optically clear material such as previously described clear layer30. Filling material can also comprise a second layer of optically clear filling material or second clear layer80such that filling material comprises three or more physically discrete or separate layers disposed within the walls of retention material56. Second clear layer80can, but does not have to, comprise the same material as first layer30. That is, second clear layer80can comprise a layer of any suitable epoxy, silicone, or glass material. In one aspect, second clear layer80can comprise a low RI silicone material having a RI of approximately 1.4 or less, a medium RI material having a RI of approximately 1.4 to 1.5, or a high RI silicone material having a RI of approximately 1.5 or more. Encapsulant layer28can also comprise the same materials as first and second clear layers30and80, respectively, but can also include one or more phosphors as denoted by the shaded or speckled appearance. In other aspects, each of the layers can comprise different materials, for example, a first layer can comprise a low RI encapsulant, a second layer can comprise a high RI silicone, and a third layer can comprise a medium RI silicone or an epoxy or glass material. In further aspects, tow of the layers can comprise the same material and one of the layers can comprise a different material. Any arrangement of layers and/or materials is contemplated herein. Emission area54can be filled to a level that is substantially flush with an upper surface of retention material56or over-filled or under-filled such that layers form a concave or convex surface. Notably, the height of retention material56can be increased such that distance d between the LED chip22and air interface can be increased to accommodate more than one optically clear layer of material within emission area54. In one aspect, retention material56can be increased between approximately 0.2 and 0.5 mm to accommodate each additional clear layer. That is, retention material56can be increased approximately 0.6 to 1.0 mm where two or more clear layers are provided in device50and retention material56can be increased approximately 0.9 to 1.5 mm where three or more clear layers are provided.

Any percentage of encapsulant layer28, clear layer30, and second layer80can be deposited within a volume of emission area54. For example and in one aspect, the volume of emission area54can be approximately 33% filled with each layer. In other aspects, the volume of emission area54can be approximately 20% filled with encapsulant layer28and approximately 40% filled with each of clear layer30and second clear layer80such that approximately 100% of the emission area is filled. In other aspects, the volume of emission area54can be approximately 50% filled with encapsulant layer28and approximately 25% filled with each of clear layer30and second clear layer80such that approximately 100% of the emission area54is filled. In further aspects, the volume of emission area54can be approximately 40% filled with encapsulant layer28and approximately 30% filled with each of clear layer30and second clear layer80such that approximately 100% of the emission area is filled. The clear layers do not have to be equal in thickness and/or of the same volumetric percentage, for example, the volume of emission area54can be approximately 25% filled with encapsulant layer28, approximately 25% filled with clear layer30, and approximately 50% filled with second clear layer80. Layers28,30, and80can occupy any percentage and/or volume of emission area54and can be deposited in any order within emission area. Layers28,30, and80can be optionally cured during the same curing step, or each layer can be separately and optionally cured at different curing steps.

FIG. 6illustrates an embodiment where phosphor containing encapsulant layer28is disposed between more than one optically clear layer of filling material. For example, a first optically clear layer30can be dispensed within emission area54first. In one aspect, clear layer30can be dispensed such that it covers wire bonds24. Phosphor containing encapsulant layer28can be arranged and subsequently dispensed such that it covers clear layer30. Second clear layer80can be arranged and subsequently dispensed over encapsulant layer28such that encapsulant layer28is disposed between more than one clear layer. Any percentage of encapsulant layer28, clear layer30, and second layer80can be deposited within emission area54, such as percentages previously noted. Distance d can be increased to accommodate more than one clear layer of filling material, for example, by increasing the height of retention material56.

FIG. 7illustrates an embodiment where a secondary dam member or material82can be used to increase the distance between the LED chip22and air interface. For example, secondary dam82can be dispensed or otherwise deposited or positioned along outer edges of retention material56such that the distance d between an LED chip22and air interface increases by a distance d2, which is the difference in height between secondary dam82and retention material56. In one aspect for example, distance d2can comprise an increase in height of between approximately 0.2 and 0.5 mm for each additional clear layer to be used in device50. That is, secondary dam82can be adapted to increase distance d by a distance d2of approximately 0.6 to 1.0 mm where two or more clear layers are provided in device50and by a distance d2of approximately 0.9 to 1.5 mm where three or more clear layers are provided. That is, secondary dam82can be approximately 0.2 to 1.5 mm taller than retention material56. Encapsulant layer28can be dispensed within retention are 54 first and optionally cured prior to deposition of one or more subsequent optically clear layers of material, or can be optionally cured at the same time as other discrete and subsequently applied layers in one curing step. At least one additional layer of optically clear filling material or clear layer30can be disposed above encapsulant layer28. As the broken lines indicate, more than one discrete layer of optically clear material can be applied to emission area54, for example, two or more clear layers can be applied.

FIG. 8is a graphical illustration of improved light output for devices disclosed herein which can incorporate one or more discrete clear layers of optical material in addition to a layer of phosphor containing encapsulant material. In one aspect, devices incorporating the one or more clear layers of material can comprise a larger distance d (FIGS. 2 and 4-7) between an LED chip22and an air interface. InFIG. 8, six different variability charts representing six different groups of devices tested illustrate the improvement in light output when moving from zero clear layers (e.g., conventional packages identified as “0” in each of the six groups/charts) to three clear layers (e.g., identified as “3” in each of the six groups/charts). In one aspect for example, each additional clear layer can add between approximately 0.2 and 0.5 mm to the overall, total distance d between the LED chips22and air interface. The first two groups include data obtained from using a low RI silicone in an initial layer (e.g., encapsulant layer28,FIGS. 2 and 4-7) and a low RI for subsequent dispenses of each of the one or more additional clear layers of material (e.g., clear layer30and/or80FIGS. 2 and 4-7). Groups numbered 3 through 6 and respective charts include data obtained from using a high RI silicone in the initial layer (e.g., encapsulant layer28,FIGS. 2 and 4-7) and a low RI for subsequent dispenses of each of the one or more additional clear layers of material (e.g., clear layer30and/or80FIGS. 2 and 4-7).

AsFIG. 8illustrates, luminous flux, or brightness increases linearly as the number of clear layers used in the device increases, which also can correspond to an increased distance d (FIGS. 2 and 4-7) between the LED chip22and air interface. In one aspect, light output of devices described herein can increase by more than 3% when one or more clear layers are separately dispensed and/or discretely applied within the device. For example, light output can increase by at least approximately 3.6% as illustrated by the groups 1 and 2, where three discrete clear layers improved the luminous flux from approximately 1100 lumens (lm) to approximately 1140 lm. In one aspect, each additional clear layer increased light output by approximately 0.85 to 1.25%. Charts for groups 3 through 6 indicate that packages using a high RI silicone in the initial encapsulant layer (e.g., layer28FIGS. 2, 4-7) can emit more light than packages using low RI silicone in the initial layer. Charts for groups 3 through 6 illustrate light increases per package that are greater than approximately 4%, for example, greater than approximately 4.5% and greater than approximately 5% as light output increases from approximately 1120 lm to approximately 1180 lm. In one aspect, each additional clear layer increased light output by approximately 0.75 to 1.75%.

AsFIG. 8further illustrates, packages comprising one or more layers of optically clear material can for example comprise a light output of approximately 1150 to 1190 lm. For example, packages comprising one layer of optically clear material can for example comprise a light output of between approximately 1150 and 1160 lm. Packages comprising two layers of optically clear material can for example comprise a light output of between approximately 1160 and 1170 lm. Packages comprising three layers of optically clear material can for example comprise a light output of between approximately 1170 to 1190 lm. AsFIG. 8illustrates, luminous flux can increase linearly, for example by approximately 1% or more, with an increasing distance between LED chips and an air interface (e.g., by increasing the number of clear layers), with gains in excess of 5% being demonstrated. The luminous flux values obtained for each variability chart can be measured at 270 mA.

Embodiments of the present disclosure shown in the drawings and described above are exemplary of numerous embodiments that can be made within the scope of the appended claims. It is contemplated that the configurations of light emitter devices having improved light output and related methods can comprise numerous configurations other than those specifically disclosed, including combinations of those specifically disclosed.