Compact, high efficiency, high isolation power amplifier

A power feedforward amplifier uses integral cavities to provide RF isolation between subcircuits of the power amplifier. The chassis includes a main chassis body and a lid structure adapted to couple with the chassis body and define the subcircuit cavities. The inner lid includes an amplifier dividing wall and interstage walls adapted to isolate the main and error amplifier subcircuits of the feedforward power amplifier and further to isolate individual components of the subcircuits. In one embodiment, the amplifier subcircuits are mounted on a single circuit board and isolated from each other by the dividing wall. A delay line subcircuit portion is integral with the main chassis body and is coupled beneath the error amplifier subcircuit to contain and electromagnetically shield a delay line filter subcircuit while providing direct connection with the error amplifier.

FIELD OF THE INVENTION

The present invention relates generally to power amplifiers and specifically to a compact, high efficiency, and high isolation power amplifier.

BACKGROUND OF THE INVENTION

Ideally, a radio frequency (RF) power amplifier would be perfectly linear, and thereby faithfully reproduce amplified RF signals. In practice, RF power amplifiers are generally non-linear and add a certain amount of unwanted distortion to the amplified signal. This distortion of the amplified signal is realized as one or more intermodulation distortion (IMD) products which are undesirable in the amplified output signal. Therefore, it is desirable to reduce or generally eliminate such IMD products and other error from the amplified signal.

Several techniques have been developed to reduce IMD products in amplified RF signals, such as, for example, feedforward amplification. One type of single-loop, feedforward power amplifier uses a main amplifier subcircuit, a delay line filter subcircuit, and an error amplifier subcircuit. In the operation of the feedforward amplifier, the main amplifier subcircuit amplifies an input carrier, thereby introducing non-linearity error in the form of IMD products. The delay line filter subcircuit receives the input carrier and the output carrier of the main amplifier subcircuit, including the introduced error. A carrier cancellation loop incorporated within the delay line subcircuit subtracts the input carrier from the main amplifier output carrier and error, so that only the error signal remains. The remaining error signal is then fed into the error amplifier subcircuit, where the error is amplified and inverted by an error amplifier subcircuit. The inverted error is then subsequently combined with the delayed output carrier and error from the main amplifier subcircuit. In that way, the inverted error signal cancels the error signal from the main amplifier subcircuit, generally leaving only the amplified output carrier remaining. Such feedforward power amplifiers are useful with a variety of RF transmission systems, including cellular telephone base stations and other communication systems requiring amplification with high linearity.

Existing designs for feedforward power amplifiers have various drawbacks. First, feedforward amplifiers are generally very inefficient from a power standpoint. For example, 5%-10% efficiency is typical. Such inefficiency is partially the result of the delay that must be introduced into various of the signals in the delay line subcircuit of the system. Such delays generally translate into heat and power losses. This is particularly true for the delay introduced in the high power output of the main amplifier. For example, to achieve proper error cancellation, delay of the output from the main amplifier subcircuit must coincide with the output and delay of the error amplifier subcircuit. The greater the delay introduced by the error amplifier subcircuit, the greater the delay (and resultant power loss/efficiency reduction) required for the output signal of the main amplifier subcircuit. Therefore, it is always desirable in such feedforward amplifiers to try to maximize efficiency by reducing introduced delays.

Existing amplifier designs are also complex in design, which increases their overall cost, not only from a material standpoint, but also from the manufacturing and assembly side, as well. For example, the various subcircuits comprising a feedforward RF amplifier must be electromagnetically isolated from each other for proper operation. That is, leakage paths which allow electromagnetic signals to propagate from one subcircuit to another must be minimized. Leakage paths may be typically minimized by surrounding each subcircuit in a Faraday shield type enclosure.

Several methods of maintaining the necessary isolation have been used in the past; however, such methods have resulted in expensive complexities. In some designs, subcircuits such as the main amplifier and error amplifier are provided in separate enclosed conductive chassis. Interconnects between the subcircuits are then provided with connectors, shielded cables, and filtered signal lines. This solution adds material and manufacturing complexities and costs, as well as unwanted size to the feedforward power amplifier. Because existing feedforward amplifier designs use several circuit boards and amplifier subcircuits, several chassis must be constructed and connected together.

Alternatively, cavities for the various circuit boards might be machined into a chassis, with the boards being dropped into the cavities. However, such a design further complicates the interconnections between the components of the system and between the boards.

Another isolation technique employed is the use of separate bolt-on or soldered internal shielding walls. However, such methods for achieving isolation involve additional components, more assembly steps, and therefore higher production costs. Still further, separate metal boxes or cans may be used to separate the subcircuits, which are then bolted into other, larger boxes. As may be appreciated, such a design further adds to the complexity of the design with resulting increased material and production costs. Further, these methods still do not always provide the level of isolation desired for feedforward amplifiers.

Furthermore, while it is desirable to also shield the delay line subcircuit from the other components of a feedforward power amplifier, it is an additional goal to position the delay line subcircuit so as to minimize the length of connections between the delay line subcircuit and the other circuit components, thereby reducing output losses within the amplifier, and increasing overall efficiency.

Therefore, there is a need in the art to reduce the complexity, size, and overall cost of a feedforward amplifier design while still achieving desired efficiency and isolation characteristics in its operation. More specifically, there exists a need for a feedforward power amplifier design that provides the necessary isolation between subcircuits of the power amplifier, maintains subcircuits of the power amplifier in desirable position with respect to one another, and provides desired efficiency. Such goals are preferably accomplished in a design having a low material cost, a simple, low cost assembly process, and a small size.

DETAILED DESCRIPTION OF EMBODIMENTS OF THE INVENTION

For better understanding of the context of the disclosed embodiments of the present invention, a description of one suitable feedforward amplifier design is useful, and is set forth herein for illustrative purposes. A person of ordinary skill in the art will recognize other designs as also being suitable for practicing the invention.

FIG. 1shows a circuit block diagram of one type of feedforward power amplifier10suitable for use in one embodiment of the present invention. Dotted lines, “A” inFIG. 1, are used to show separation between various subcircuits which are to be electromagnetically isolated via a design and chassis according to an embodiment of the present invention. Subcircuits shown inFIG. 1generally include a delay line subcircuit12, a main amplifier subcircuit14, an error amplifier subcircuit16, a forward power detector subcircuit18, a scanning receiver subcircuit20, and a reverse power detector subcircuit22. The circuitry and operation of the power amplifier10and various of the subcircuits is described herein, though it is understood by a person of ordinary skill in the art that the present invention may be Used with linear power amplifiers having more, or fewer, or different subcircuits than those shown in FIG.1. For example, separate subcircuits as described may be combined into larger subcircuits, or new subcircuits offering different functionality may be used. Additionally, the present invention may be used with feedforward amplifiers employing secondary error cancellation loops, or any other type of amplifier using one or more delay lines to improve linearity.

The feedforward power amplifier10(which may be a multi-carrier amplifier) includes an input100, a main signal path102, a feedforward path104, and an output112. The power amplifier10further includes a carrier cancellation loop (CCL)106, an error correction loop (ECL)108, and a scanning receiver144. On the feedforward path104, which progresses through several subcircuits, there is provided a feedforward delay filter118, a feedforward variable attenuator120, a feedforward phase shifter122, and an error amplifier124. On the main signal path102, also progressing through the subcircuits, there is provided a main variable attenuator134, a main phase shifter136, a main amplifier138, and a main delay filter140.

The input100receives radio frequency (RF) carrier signals, and an input carrier coupler114couples the RF carrier signals onto both the main signal path102and the feedforward path104. Alternatively, a splitter (not shown) may be used to provide the RF carrier signals onto the main signal path102and the feedforward path104.

Referring still toFIG. 1, the RF carrier signals on the main signal path102may be attenuated by the main variable attenuator134and phase shifted by the main phase shifter136, although not necessarily in that order. A CCL (106) power detector150, shown located in the error amplifier subcircuit16, may be provided on the feedforward path104to monitor the power level of the signals after the carrier signals have been subtracted in the CCL106. Control of the main variable attenuator134and the main phase shifter136may be under microprocessor control or any other suitable interface capable of monitoring the CCL power detector150and adjusting the main variable attenuator134and the main phase shifter136in accordance with the output of the CCL power detector150. As with other power detectors in the feedforward power amplifier circuit, the output of an input power detector116is directed to a microprocessor (not shown), which may be contained in the monitor and control board208, shown in FIG.9. The voltage from the CCL power detector150is used to adjust the main variable attenuator134and the main phase shifter136to obtain maximum carrier cancellation out of the CCL106. The microprocessor may or may not utilize the signal from the input power detector116when determining adjustments for maximal carrier cancellation.

The input power detector116may be provided on the main signal path102to monitor the input power levels. For example, if the power level of a carrier signal is above or below a desired threshold, the voltage output of the input power detector116may be used to trigger an error condition, such as a reset or power down.

After the RF carrier signals have been attenuated and phase shifted on path102, they are amplified by the main amplifier138. The main amplifier138produces or outputs, in addition to the desired amplified RF carrier signals, unwanted IMD products. The IMD products or error are caused by inherent non-linearities within the main amplifier138. If the RF carriers, for example, lie in several frequency bands, or designated channels, the IMD products from one frequency band may spill over into other adjacent or nearby frequency bands or channels. This effect becomes more pronounced the closer the main amplifier138is driven to saturation.

Next, the amplified RF carrier signals and IMD products from the output of amplifier138are time delayed by the main delay filter140to produce delayed amplified RF carrier signals and delayed amplified IMD products on the main signal path102. The time delay is chosen such that the amplified RF carrier signals and associated IMD products appear on the main signal path102at substantially the same time that the adjusted carrier signals and IMD products from an error amplifier124are coupled onto the main signal path102. Since any delay introduced in the signals input and output from the error amplifier circuit and associated with the error signals requires corresponding delays and power loss from the delay filter140, the present invention, as discussed further below, minimizes delays in the input and output between the error amplifier subcircuit and the delay line.

Meanwhile, on the feedforward path104, a feedforward delay filter118delays the RF carrier signals such that the RF carrier signals appear on the feedforward path104at substantially the same time the attenuated sample of the amplified RF carrier signals (and associated IMD products) are coupled onto the feedforward path104by a feedforward CCL coupler130. The carrier cancellation loop (CCL)106couples the amplified RF carrier signals and associated IMD products on the main signal path102onto the feedforward path104at the output of the feedforward delay filter118.

The CCL106includes (1) a main CCL coupler126which couples the amplified RF carrier signals and associated IMD products from the main signal path102onto the CCL106, (2) a CCL attenuator128for attenuating the amplitude of the coupled signals, and (3) a feedforward CCL coupler130which couples the amplified (and subsequently attenuated) RF carrier signals and associated IMD products onto the feedforward path104at the output of the feedforward delay filter118. The phase of the amplified RF carrier signals in the CCL106should be inverted (out of phase) with respect to the phase of the delayed RF carrier signals on the feedforward path104after the feedforward delay filter118.

The CCL attenuator128attenuates the coupled signals such that the amplitude of the amplified RF carrier signals is substantially equal to the amplitude of the delayed RF carrier signals on the feedforward path104, in order to obtain maximum carrier cancellation. Attenuation resulting from the main CCL coupler126and the feedforward CCL coupler130, as well as the gain of the main amplifier138, in addition to the coupling factor of the input carrier coupler114, and the insertion loss of the feedforward delay filter118are taken into consideration when selecting the attenuation factor for the CCL attenuator128. The CCL attenuator128produces attenuated RF carrier signals and attenuated IMD products.

After coupling by the feedforward CCL coupler130, the two out-of-phase carrier signals cancel each other so that primarily the isolated IMD products are fed into the error amplifier subcircuit16, though insignificant levels of carrier products may also be present. In the error amplifier subcircuit16, these isolated IMD products are amplified and phase inverted (with respect to the amplified IMD products at the output of the main amplifier138), so that the two signals will cancel each other when combined at the main ECL coupler132.

The isolated IMD products are presented to the feedforward attenuator120, the feedforward phase shifter122, and the error amplifier124. The amplitude of the isolated IMD products may be attenuated by the feedforward attenuator120, and the phase of the isolated IMD products may be shifted by the feedforward phase shifter122, though not necessarily in that order. The feedforward attenuator120and feedforward phase shifter122are under the control of a suitable monitor and control board208as shown in FIG.9. Signal and power lines are passed through EMI filters to the monitor and control board208. Examples of the signal lines include detector output, variable attenuator and phase shifter control lines, and bias monitor and control lines. The monitor and control board208is one type of printed circuit board which can be used with one embodiment of the present invention in the position shown in FIG.9.

The attenuated and phase-shifted IMD products are amplified by error amplifier124. The gain of the error amplifier124is selected such that the IMD products cancel at the main ECL coupler132, resulting in substantial reduction of IMD products at the output112. The error amplifier124is operated well below saturation to avoid creating non-linear distortion products of its own in the error correction loop108.

The error amplifier124produces amplified IMD products whose phase is inverted with respect to the phase of the delayed amplified IMD products on the main signal path102. The amplitudes of the amplified IMD products and the delayed amplified IMD products are substantially identical. Because they are also phase inverted, when the amplified products are coupled by a main ECL coupler132onto the main signal path102, the amplified IMD products and the delayed amplified IMD products substantially cancel each other so that IMD products are essentially eliminated from the main signal supplied to the output112.

The resultant amplified RF carrier signals are coupled onto a scanning receiver144by a scanning receiver coupler142. Optionally, a splitter146may provide the amplified RF carrier signals to both the scanning receiver144and to an output power detector148. The scanning receiver144produces an output voltage corresponding to the signal level in the channel of interest. This signal is routed to an A/D converter for use by the microprocessor on the monitor and control board208(shown in FIG.9). The output power detector148converts the amplified RF carrier signals to a voltage representative of their power. In one aspect of the present invention, the output power detector148monitors the output power of the main amplifier138for abnormalities, such as triggering a fault alarm when, for example, too much power is detected. One suitable scanning receiver is discussed in copending U.S. Patent Application entitled “A Scanning Receiver for Use in a Feed-Forward Multi-Carrier Power Amplifier,” and filed on Mar. 6, 2001, which is incorporated herein by reference in its entirety.

The feedforward power amplifier circuit10may include a circulator152with an associated circulator attenuator154. The circulator152serves to prevent the flow of reflected RF power from the output112. An output line from the circulator152is connected to a reverse output power detector156, and signal from the reverse output power detector156is fed, for example, into a monitor and control board208for detection. RF power entering the circulator152subsequently leaves the circulator along the next pathway crossed by the clockwise arrow. Thus, reflected RF power from the output112exits toward the reverse output power detector156rather than toward the other circuit components, which might be damaged by reflected power.

As discussed above, the feedforward power amplifier circuit10is divided into several subcircuits to be electrically isolated from one another. In accordance with one aspect of the invention, the amplifier chassis design provides a unique isolation scheme in a compact, non-complex, and low cost (manufacturing and material) package. Subcircuits may be grouped into component groups, or smaller subcircuits within the larger subcircuits of the present invention. In accordance with an aspect of the invention, the main amplifier subcircuit and the error amplifier subcircuit are positioned on a single circuit board. In one embodiment of the present invention, the delay line filter subcircuit12includes the following components: the input carrier coupler114, the feedforward delay filter118, the feedforward CCL coupler130, associated terminations115, the CCL attenuator128, the main CCL coupler126, the main delay filter140, the main ECL coupler132, the scanning receiver coupler142, the circulator152, and the circulator attenuator154.

As discussed further hereinbelow, various different delay line subcircuits and associated component layouts and filter designs might be utilized in practicing the invention. For example, suitable delay line subcircuits and filter designs are available from companies such as Andrew Corporation of Orland Park, Ill., Filtronic Comtek Ltd. of West Yorkshire, U.K. or Remec, Inc. of San Diego, Calif. The present invention, in accordance with various of its aspects, also utilizes a uniquely positioned and interfaced error amplifier and delay line subcircuit wherein the delay line subcircuit, regardless of its specific design, is machined or cast into a chassis of the amplifier. The error amplifier is positioned generally directly thereabove and is coupled generally directly to the delay line subcircuit with minimal delay introduced at the interface between the two circuits. Further details are set forth below.

In the design disclosed herein, the main amplifier subcircuit14includes the following components or subcircuits: the input power detector116, the main variable attenuator134, the main phase shifter136, and the main amplifier138.

The error amplifier subcircuit16includes the optional CCL power detector150, the feedforward attenuator120, the feedforward phase shifter122, and the error amplifier124.

The forward power detector subcircuit18includes the output power detector148.

The scanning receiver subcircuit20includes the optional splitter146, the scanning receiver144, and a scanning receiver power detector145.

Finally, the reverse power detector subcircuit22includes the reverse output power detector156.

The subcircuits are connected via appropriate connectors as shown inFIG. 1by connector arrows, “-->>--”. In accordance with one aspect of the invention, connections between the error amplifier subcircuit16and the delay line subcircuit12is accomplished by a direct coax connector which is soldered or otherwise coupled at one end to the circuit board with the error amplifier thereon, and is press-fit through a hole in the chassis to make a direct connection to the delay line subcircuit. The various subcircuits may be connected via direct connections utilizing blind-mate coaxial connectors, or the connections may be made using connectorized coaxial cables. The dotted lines, “A” ofFIG. 1, are used to demarcate subcircuit boundaries where RF-isolating walls, according to another aspect of the present invention, are preferably located. It is to be understood that the features of the present invention may be customized to fit a variety of alternative amplifier designs and constructions. For example, though a single loop feedforward power amplifier is discussed in connection with the present invention, the principles of the present invention may also be applied to double loop feedforward power amplifiers or any other type of amplifier utilizing one or more delay lines to improve linearity.

Turning now toFIGS. 2-11, perspective and cutaway views of portions of a feedforward power amplifier embodiment according to the principles of the present invention are shown. The present invention uses a unique combination of a chassis body and lid structure design for achieving various aspects of the invention, such as reduced complexity, simpler and more cost effective construction, and desirable isolation and efficiency.

The chassis202of the present invention may be manufactured of a variety of materials and in a variety of sizes. In one embodiment, aluminum is used for the complete chassis and aluminum is particularly preferred for its ability to conduct heat in the main chassis body206. Aluminum alloys may also be used. In one embodiment, zinc is used for shielding in the inner lid204. Though the chassis, according to one embodiment of the present invention, is cast out of aluminum or aluminum alloys, it is to be understood that the chassis and components, according to the present invention, may be formed by other methods, including machining of metals, casting of metallized plastic, and casting plastic with surface metallization applied later.

Referring toFIG. 9, chassis202comprises a lid structure or lid designated as an inner lid204and a main chassis body206covered by an outer lid314to close the chassis. The term “lid” is used herein to designate a structure which covers a portion of the subcircuits for isolation, and such term is not meant to be limiting with respect to how the structure interfaces with chassis body206. The main chassis body206includes a delay line subcircuit portion290formed therein (seeFIGS. 10 and 11) for housing the delay line subcircuit12. The bottom side220of the inner lid204is configured to include, among other cavities, a main amplifier cavity214which houses and isolates the main amplifier subcircuit14and an error amplifier cavity216which houses and isolates the error amplifier subcircuit16. These cavities and subcircuits are visible inFIG. 9, which shows a cross-sectional side view of the chassis202.

In accordance with one aspect of the present invention, the unique inner lid204is configured to isolate various subcircuits, both above and below the main plane of the inner lid. In one embodiment of the invention, those various subcircuits might be on individual boards which are thereby individually isolated. For example, one embodiment described herein utilizes separate main amplifier and error amplifier boards. However, in one particularly desirable embodiment, and in accordance with one aspect of the present invention, both the main amplifier subcircuit and error amplifier subcircuit and related components are configured on a single circuit board. Such a configuration is desirable for reducing the complexity of the overall amplifier design and thereby reducing material and production costs. Utilization of the main amplifier subcircuit and error amplifier subcircuit on a single circuit board is possible due to the unique configuration of the chassis202of the present invention, and particularly the unique configuration of the inner lid204, which affords high levels of isolation between the main amplifier and the error amplifier.

Accordingly, herein, both individual board embodiments and a single board embodiment are disclosed. For example,FIG. 3illustrates a bottom view of the inner lid204utilized with individual main amplifier and error amplifier boards. However, the embodiment as illustrated inFIGS. 3A and 3B, illustrate, respectively, a bottom view of an inner lid embodiment204a, and an embodiment of a single circuit board incorporating both a main amplifier subcircuit and an error amplifier subcircuit, to be used with lid204a.

The different embodiments204,204aof the inner lid are generally similar at a top side226, and also have some similarities along the bottom side220. Therefore, in describing the different embodiments of the invention herein similar reference numerals will generally be utilized to set forth any similar features between the embodiments204,204aof the inner lid.

A printed circuit board, such as a monitor and control board208, which functions to monitor and control the operation of the feedforward power amplifier circuit10, is mounted above a top side226of the inner lid204,204a. The top side226of the inner lid204,204aincludes upper interstage cavities which, in accordance with one aspect of the invention, provide electromagnetic isolation for RF subcircuits mounted on the bottom side of the monitor and control board208. The upper interstage cavities are formed by upper interstage walls227(as seen inFIGS. 2 and 9) which are configured in the inner lid to extend upwardly from the top side or surface226of the inner lid204,204a.

The inner lid204,204ahas a generally horizontally disposed floor structure205which defines the top side226and the bottom side220of the inner lid. That floor structure generally defines a plane from which the upper interstage walls227extend upwardly and lower interstage walls280extend downwardly for defining the various interstage cavities in accordance with the principles of the present invention. That is, interstage walls extend generally in opposite directions from the plane defined by floor structure205to produce the isolation between subcircuits, which are positioned both above the inner lid204,204a, and below the inner lid. The designation of certain sides or walls as upper/lower or top/bottom is not limiting with respect to how the amplifier might ultimately be oriented.

In one embodiment of the invention, such walls are machined or cast directly into the inner lid for reducing the complexity of the shielding and reducing the overall manufacturing costs. Alternatively, the interstage walls might be otherwise coupled or fastened to the inner lid.

As illustrated inFIGS. 2,3, and3A, the inner lid also includes side walls224which extend around the periphery of the inner lid and extend upwardly and downwardly with respect to the floor structure205.

The interstage cavities on side226, as shown inFIG. 2, include a forward power detector cavity228and a reverse power detector cavity230adapted, respectively, to isolate the forward output power detector subcircuit18and the reverse power detector subcircuit22. Other interstage cavities on the top side226of the inner lid204,204aare adapted to hold components of the scanning receiver subcircuit20. These include a power divider cavity232, a downconverter cavity234, a local oscillator cavity236, a first intermediate frequency (IF) stage cavity238, a second IF stage cavity240, a third IF stage cavity242, and a detector stage cavity244. The purposes of the IF stages are twofold. The first purpose is to amplify a downconverted signal such that a detector is provided with appropriate signals for proper detector operation. The second purpose of the IF stages is to provide filtering so that the detector reacts solely to the desired signal.

Also shown inFIG. 2are several through holes246,248, and250, which allow signal connections, including filtered signal connections, between circuits positioned above and below the through holes on either side of the lid204,204a. In one embodiment, a first through hole246is a main amplifier/monitor and control board connection through hole adapted to allow a filtered signal connection between the monitor and control board208positioned above the inner lid204,204aand the main amplifier subcircuit14, and a second through hole248is an error amplifier/monitor and control board connection through hole adapted to allow a filtered signal connection between the monitor and control board208positioned above the inner lid204,204aand the error amplifier subcircuit16positioned below the inner lid204.

Turning now to the bottom sides of lid204,204a,FIGS. 3,3A illustrate different embodiments of the invention for use with multiple amplifier circuit boards and a single amplifier circuit board, respectively. Referring first toFIG. 3A, that figure illustrates a lid204afor use with a single amplifier board that contains both the main amplifier and the error amplifier. The bottom side220of inner lid204,204a, according to one embodiment of the present invention, has two defined large cavities, a main amplifier cavity214and an error amplifier cavity216, which are isolated using a dividing wall218a. The dividing wall218aprovides electromagnetic isolation between the main amplifier subcircuit14and the error amplifier subcircuit16. The wall218aprotrudes from the bottom side220of the inner lid204. While providing the desired isolation between the error amplifier and the main amplifier, wall218aallows for the positioning of the main amplifier subcircuit and the error amplifier subcircuit on the same circuit board. The board spans across wall218a, and because of the unique configuration of the wall218a, the desired electromagnetic isolation is maintained.

Specifically, referring toFIG. 3B, a circuit board219is shown which includes generally a main amplifier section221, and an error amplifier section223. When the board is positioned below the inner lid, as illustrated inFIG. 9, various of the cavities defined by the walls280of the inner lid204aseparate various of the subcircuits of both the main amplifier and the error amplifier. Furthermore, the dividing wall218aprovides the desired isolation between the main and error amplifiers.

Referring toFIG. 3A, wall218aincludes a series of end-to-end island portions or islands225with open areas227therebetween positioned along at least a portion of the wall's length. On the other hand, the single circuit board219has a series of cut-outs229which are milled into the circuit board219. The various cut-outs229define spanning portions231which span between the main amplifier section221and the error amplifier section223of the board219to define a single circuit board in accordance with one aspect of the present invention. Referring toFIGS. 3A and 3B, the cut-outs229are positioned to correspond to the various islands225in the bottom side of lid204a, such that when the lid204aand board219are coupled together, a portion of the dividing wall218a, in the form of the islands225, extends through the board and contacts the chassis periodically along the length of the wall218a, through the cut-outs. In that way, isolation can be maintained even though a single circuit board is utilized. This significantly reduces the complexity of production by having both the main and error amplifiers on a single board. The dividing wall218ais thereby in contact with the chassis body floor222where the inner lid204aand chassis body206are joined. Likewise, side walls224of lid204aare in conductive contact with the chassis body floor.

As noted, the main amplifier and error amplifier cavities are separated by dividing wall218awhich electrically contacts the main chassis body floor222as shown inFIG. 9, at least along sections of its length. In this embodiment, the main amplifier cavity214and the error amplifier cavity216both contain various subcavities designed to enclose and isolate subcircuits of the main amplifier subcircuit14and the error amplifier subcircuit16through the walls280. In the main amplifier cavity214, the subcavities include a main amplifier input subcavity252, a main amplifier input detector subcavity254, a main amplifier phase shifter and variable attenuator subcavity256, a main amplifier driver stage subcavity258, a main amplifier final driver stage subcavity260, and a DC power input subcavity262, and a main amplifier final stage subcavity264. In the error amplifier cavity216, the subcavities include an error amplifier input subcavity268, an error amplifier phase shifter and variable attenuator subcavity270, an error amplifier carrier correction loop detector subcavity272, an error amplifier driver stage subcavity274, an error amplifier final driver stage subcavity276, and an error amplifier final amplifier stage subcavity278. The subcavities are separated by various lower interstage walls280, which depend downwardly from floor205and which serve to isolate components within the subcavities from radio frequency interference from adjacent subcavities and also to add structural rigidity to the inner lid204. Lower interstage wall gaps282are included in lower interstage walls280so that components may be connected to other components in different subcavities. The inner amplifier dividing wall218,218ais provided with fastener holes284which allow fasteners such as screws to pass through so that the inner lid204is securely fastened to the main chassis body206. Other fastener holes284are located throughout the inner lid204, to allow the monitor and control board208to be securely fastened to the inner lid204and to further provide for a more secure assembly when the inner lid204is secured to the main chassis body206. Other embodiments may not use screw fasteners, but might use other means to fasten, such as rivets or solder along the perimeters.

FIG. 3illustrates an inner lid204for an alternative embodiment of the invention which utilizes separate main amplifier and error amplifier boards. That is, each of the main amplifier and error amplifier and their respective components are located on individual circuit boards. As may be seen inFIG. 3, amplifier dividing wall218extends generally continuously across the inner lid to provide generally complete separation between the main amplifier subcircuit and the error amplifier subcircuit and their respective circuit boards. Therefore,FIG. 3discloses a multiple board embodiment, rather than a single board embodiment as discussed with respect to FIGS.3A and3B. Other similar components, features and subcavities are set forth inFIG. 3with reference numerals similar to those utilized in FIG.3A.

When the inner lid204is positioned and coupled to the chassis body206, the inner lid contacts the chassis body generally along the length of the dividing wall218for isolation between the main amplifier and error amplifier, as opposed to the discrete contact points provided by the islands225of wall218a.

Referring toFIGS. 3B and 9, gaskets280a, such as EMI gaskets, are coupled to the circuit board219wherever the walls280, or218a, contact the board219.FIG. 3Billustrates the embodiment of the invention utilizing a single board for both the main amplifier and error amplifier. However, similar gaskets are utilized for the multiple board embodiment as well. The EMI gasket material is soldered or otherwise secured to the board at the various boundaries defined by the subcircuit components and the subcavities formed by the bottom of the inner lid204,204a. Referring toFIG. 3B, gasket material280a, or rather, pieces of material, extend end-to-end along where the dividing wall218awould engage the chassis. Such gasketing is to address those areas between the islands225where the board makes contact with the wall open areas227between the islands225. However, in a version utilizing separate boards, generally gasketing material along the dividing wall218would not be necessary, as the wall would contact the chassis generally along its length. The gasketing material280is a compressible Electro Magnetic Interference (EMI) material used to fill gaps remaining between the lower interstage walls280and the respective circuit boards or board. In one embodiment, the gasketing may be that manufactured by the W. L. Gore Company, (Goreshield SMT-EMI Gasketing, Gore Part No. 3645-10).

In this embodiment, a strip of gasketing is attached to a strip of metal, and the metal is soldered onto a circuit board along with the circuit components. This type of gasketing is preferred for its ability to complete an RF and EMI isolating Faraday cage when circuit board and chassis tolerances are such that full intimate metal-to-metal and metal-to-board contact cannot be guaranteed over the entire desired mating area. Another embodiment involves application of a dispensed bead of gasketing along inner lid side walls224and/or along lower interstage walls280. One type of dispensed gasketing that may be used in this embodiment is Chomerics, Cho-Form Form-In-Place EMI gasketing.

Turning now toFIG. 4, a perspective view of the main chassis body206shows the main chassis body floor222having several through holes allowing for connections through the main chassis body floor222and through the side walls286of the main chassis body206. The main chassis body206also has depressions288provided in the main chassis body floor222to accommodate through-hole components, board bottom-side traces, and chassis mounted components. In one embodiment, through holes through the main chassis body floor222are provided to allow connections between a delay line subcircuit portion290and the main amplifier subcircuit14and error amplifier subcircuit16. Through holes visible inFIG. 4include a main connector through hole292to accept a main connector including connectors for the input100and output112, a main amplifier output through hole294adapted to allow connection between the main amplifier subcircuit14and the delay line subcircuit portion290, and an error amplifier input through hole296adapted to allow connection between the error amplifier subcircuit16and the delay line subcircuit portion290.

FIG. 5shows a top view of the main chassis body206and floor222, including through holes and fastener holes. Through holes visible inFIG. 5include a main amplifier input through hole298adapted to allow connection between the delay line subcircuit portion290and the main amplifier subcircuit14, an input through hole300adapted to allow connection between the input100and the delay line subcircuit portion290, and an output through hole302adapted to allow connection between the output112and the delay line subcircuit portion290. Also shown inFIG. 5are a forward power detector through hole304adapted to allow connection between a forward power detector subcircuit18and the delay line subcircuit portion290, a reverse power detector through hole306adapted to allow connection between a reverse power detector subcircuit22and the delay line subcircuit portion290, and an error amplifier output through hole308adapted to allow connection between the error amplifier subcircuit16and the delay line subcircuit portion290. Fastener holes shown inFIG. 5include main chassis body floor fastener holes310adapted to allow fastening of main amplifier subcircuit14and error amplifier subcircuit16components to the main chassis body floor222and outer lid fastener holes312adapted to allow fastening of an outer lid314(visible inFIG. 9) to the main chassis body206and inner lid fastener holes313for fastening the inner lid to the chassis206.

FIG. 6shows the components and subcircuits of the main amplifier subcircuit14which are isolated by the dividing wall218,218aand lower interstage walls280of the inner lid204. The subcircuits and components are numbered in agreement with the numbering of their corresponding cavities shown inFIGS. 3 and 3A. These subcircuits and components include a main amplifier input subcircuit252a, a main amplifier input detector subcircuit254a, a main amplifier phase shifter and variable attenuator subcircuit256a, a main amplifier driver stage258a, a main amplifier final driver stage260a, a main amplifier DC power input262a, and a main amplifier final amplifier stage264a. A portion of the main amplifier final amplifier stage264aextends above the delay line subcircuit portion290, to provide for a short connection between the main amplifier subcircuit14and the delay line subcircuit portion290.

FIG. 6further shows the components and subcircuits of the error amplifier subcircuit16which are isolated by the dividing wall218,218aand the lower interstage walls280of the inner lid204. These subcircuits and components include an error amplifier input subcircuit268a, an error amplifier phase shifter and variable attenuator subcircuit270a, an error amplifier carrier correction loop detector272a, an error amplifier driver stage274a, an error amplifier final driver stage276a, and an error amplifier final amplifier stage278a. As noted above, the error amplifier subcircuit16is positioned generally directly above the delay line subcircuit portion290in accordance with one feature of the invention to provide for direct coaxial connector connections between the error amplifier subcircuit16and the delay line subcircuit portion290in accordance with another feature of the invention. The various combination of features, including the error amp positioned above the delay line circuit which is machined and/or formed in the chassis, and particularly including the direct interconnect, using no coaxial cables, provides several key benefits for the present design. For example, a shorter overall delay is required of the main delay filter140. This provides a desirable smaller physical size and a lower insertion loss for the main delay filter140. Furthermore, the invention features result in less loss and a higher amplifier power efficiency which is a significant benefit of this inventive amplifier design and packaging technique.

FIGS. 10 and 11show side and bottom views, respectively, of the chassis including the delay line cavity and the direct coaxial interconnection between the error amplifier and the delay line subcircuit.

The main chassis body206houses the delay line subcircuit12within the delay line subcircuit portion290, which, as shown inFIGS. 9 and 10, is located below the main chassis body floor222, next to the fins320. In the embodiment of the circuit shown inFIG. 1, eight connectors, demarcated inFIG. 1by the connection arrows (“-->>--”) and circles, are provided between the delay line filter subcircuit12and other subcircuits of the feedforward power amplifier circuit10. The circles are assigned reference numerals corresponding to the connection holes shown in FIG.5. In one embodiment, these connections may be provided by eight press-fit blind-mate RF coaxial connectors which protrude through the main chassis body floor222to allow RF interconnections between the delay line filter subcircuit12and other subcircuits.

Referring toFIG. 10, a side view of the chassis main body206and outer lid314is shown similar to that shown inFIG. 9, except without the inner lid and main amplifier board illustrated. A delay line lid291is shown covering a delay line cavity325formed in the chassis for containing and supporting the delay line subcircuit components. One suitable delay line subcircuit portion290of the chassis is illustrated in FIG.11and is discussed further hereinbelow. Turning again toFIG. 10, one suitable direct-connection coaxial connector330is illustrated. Connector330includes a coaxial plug332positioned at an end of the connector proximate to the error amplifier subcircuit16, and particularly proximate to the circuit board which contains the error amplifier subcircuit. As noted above, that circuit board may either be an individual board, or may be a portion of a larger, single board which holds both the main amplifier subcircuit and the error amplifier subcircuit. In any case, the coaxial plug332is appropriately electrically connected to a suitable connection point of the error amplifier board, such as by being soldered to the error amplifier board. The coaxial jack portion334of the connector is then press fit into an appropriate chassis through hole, such as through hole308or296, as illustrated inFIG. 5. Anipple portion336at the end of the coaxial jack portion334provides for connection to a suitable point within the delay line subcircuit portion290, according to procedures known to a person of ordinary skill in the art. The unique positioning of the error amplifier board and error amplifier subcircuit16and components above the delay line subcircuit portion290and circuit12provided by the invention, in combination with the delay line subcircuit portion being integrally formed and positioned within the chassis body206, allows the direct press-fit coaxial connection between the error amplifier16and the delay line subcircuit12, thus eliminating cable interconnects which introduce delays and which must then be addressed by the delay line filter140and the subcircuit. Such additional delays cause additional power losses within the delay line subcircuit, and thereby reduce the efficiency of the overall amplifier. The present invention enhances efficiency by providing direct interconnection between the error amplifier and the delay line subcircuit to reduce such delays and power losses. In a preferred embodiment, both the input and output interconnects330and332for the error amplifier utilize direct interconnects, as illustrated inFIG. 10. Asingle interconnect330is illustrated inFIG. 10, but it will be readily understood that multiple such interconnects can be utilized.

The delay line subcircuit portion290is formed in the chassis body206and includes delay line subcircuit metalwork adapted to guide and delay RF signals, in accordance with principles known to those skilled in the art. In accordance with one aspect of the invention, the metal work portions, which generally represent the delay filters118,140of the delay line subcircuit12, are fabricated into chassis body206, and generally into cavity325(see FIG.10). The delay line subcircuit portion may be provided with a removable lower lid291to allow for assembly. The delay line subcircuit portion290and cavity325also will generally contain circuit boards, including drop-in coupling and transition circuitry provided within the delay line subcircuit12. For example, as illustrated in one embodiment, the delay line subcircuit utilizes two delay lines or filters118,140, five couplers (114,130,126,132,142), and a circulator152. These circuits may comprise further subcircuits within the delay line subcircuit portion290. Coupling paths for the circuits may be provided in the delay line subcircuit portion. The delay line subcircuit portion metalwork, in one embodiment, includes cylindrical cavities which act as resonating filters to accomplish signal delays. Such resonating cavity delay structures are known to persons of ordinary skill in the art and designs for such structures, along with supporting circuitry, are commercially provided by companies such as Andrew, Filtronic Comtek and Remec, as mentioned above. The provision of a delay line subcircuit portion290integral with the feedforward power amplifier chassis202and positioned below the error amplifier, imparts a number of benefits to the design, construction, and use of the feedforward power amplifier10, as discussed

The positioning of the error amplifier subcircuit in an error amplifier subcircuit cavity216directly above the delay line filter subcircuit12in cavity325and the use of direct connect coax connectors minimizes the required length of an output delay line and the size of filter140to a significant extent, since no significant extra delay is added to the error amplifier subcircuit from lossy interconnect cables. The resulting direct delay line connection results in a lower delay line loss, which proportionally increases overall efficiency of the feedforward power amplifier10of the invention.

More specifically, the use of an integrated delay line filter subcircuit12, according to the present invention, and the direct interconnect, results in shorter delay in the main delay filter140, less signal loss, smaller size, and higher efficiency of the feedforward power amplifier10. In one embodiment, the delay line subcircuit portion290includes two delay filters and lines, but other embodiments may house one or more than two delay lines for providing required signal delays. A first delay filter or line included in the delay line subcircuit portion290of the disclosed embodiment is the main delay filter140and a second delay filter or line included in the delay line subcircuit portion is the feedforward delay filter118. In some embodiments, delays provided by the delay line subcircuit portion290may range from about 7 ns to about 15 ns, though longer or shorter delays may be provided based on amplifier design considerations. In one embodiment, the delay provided by the main delay filter140is around 7.25 ns and the delay provided by the feedforward delay filter118is around 11 ns.

Referring toFIG. 11, a bottom view of the chassis body206is shown in partial cross-section, illustrating schematically the delay line subcircuit290which includes delay lines or filters140,118along with various of the other components, such as couplers and circulators associated with the delay line subcircuit. The various circuits and components other than the resonator cavities of the delay lines118and140, are positioned on appropriate circuit boards with appropriate connectors as dictated by the specific design of the delay line subcircuit. It will be understood that other, different components might be utilized in a different arrangement from that shown in the embodiment illustrated in FIG.11. Reference numerals are set forth onFIG. 11to correspond to the various connection points and components of the design illustrated in FIG.1. An input signal100is directed to both the main amplifier at through hole298, and through a coupler114to the feedforward path. In the feedforward path, the signal is directed through the delay filter118in the form of the resonating cavities machined and constructed into the chassis body206in accordance with one aspect of the invention. Various other components of the delay line subcircuit290are illustrated along the signal paths through the amplifier. Delay filter140is also in the form of resonating cavities. The various through holes and connection points into and out of the delay line subcircuit are illustrated with reference numerals corresponding to those in FIG.1and FIG.5.

Turning now toFIG. 8, a top cutaway view of the feedforward power amplifier10shows connections between components of the feedforward power amplifier10. Connections between components of the feedforward power amplifier may be provided by the direct interconnects noted above, or cabled interconnects. Direct interconnects are preferably used for key connections where delay or insertion loss from a cabled interconnect would adversely affect the performance of the feedforward power amplifier circuit10, and they consist of blind-mate RF coaxial connectors integrally connected to each other. As shown in FIG.8and as discussed above, direct interconnects with the delay line filter subcircuit12in the delay line subcircuit portion290include an error amplifier input interconnect330and an error amplifier output interconnect332. Other interconnects may be cabled between the delay line filter subcircuit12and circuit boards containing other subcircuits. Cabled interconnects have two coaxial terminations connected by a coaxial cable. In one embodiment, as shown inFIG. 8, these interconnects include a main amplifier output interconnect328, a forward power interconnect334, a reverse power interconnect336, an output interconnect338, an input interconnect340, and a main amplifier input interconnect342.

Turning now toFIG. 7, the inner lid204is shown positioned within the main chassis body206to cover, contain, and isolate the subcircuits on the board or boards. A main connector322is shown extending through the main connector through hole292. The main connector322includes connectors for all input and output signals delivered to and from the feedforward power amplifier10. A main amplifier/monitor and control board EMI filter-type connector324is shown extending through the main amplifier monitor and control board connection through hole246and an error amplifier/monitor and control board EMI filter-type connector326is shown extending through the error amplifier/monitor and control board connection through hole248. As shown inFIG. 9, the monitor and control board rests atop and is fastened to the inner lid204when the feedforward power amplifier10is fully constructed.

In a completely constructed amplifier, the relationship between the subcircuits of the feedforward power amplifier10, and the chassis202consisting of the main chassis body206, and the inner lid204is further illustrated inFIG. 9, which shows a cross-sectional view of the feedforward power amplifier10on one embodiment of the invention. The inner lid side walls224and the inner lid amplifier dividing wall218,218aare in electrical contact with the main chassis body floor and form the main amplifier cavity214and the error amplifier cavity216. In a single board version of the invention, with both the main amplifier and error amplifier on a single board, the wall218ais constructed with islands225which protrude through the board cutouts229, thus allowing the board to span across the wall. In the multiple board embodiment, the wall218generally contacts the chassis floor along its length. Lower interstage walls280are shown extending downward from the bottom side220of the inner lid204. The compressible electromagnetic interference (EMI) shield gasketing material280ais used to fill gaps remaining between the lower interstage walls280and their respective circuit boards.

The interstage cavities along the top of the inner lid204are bounded by the inner lid204, including the inner lid side walls224and the upper interstage walls227, and the monitor and control board208. The present invention has an integral lid providing shielding both on an upper surface and a lower surface for different components of the amplifier. This forms a very compact, low-cost and simple design which provides the desired isolation and shielding between the various subcircuits. In addition to their shielding function, the upper interstage walls227provide a surface for mounting the monitor and control board208. The subcavities along the bottom of the inner lid204are bounded by the inner lid204, including the inner lid side walls224, the lower interstage walls280, and the inner amplifier dividing wall218, the main amplifier subcircuit14and the error amplifier subcircuit16. Due to the compressible EMI shield gasketing227aand280a, the side walls224of the inner lid204, the lower interstage walls280, the inner lid amplifier dividing wall218and the lower surface of the inner lid204, all subcircuits and components of the feedforward power amplifier10which might otherwise interfere with each other's operation are shielded. In one embodiment, the lower interstage walls280extend downwardly from the bottom side220of the inner lid204to within approximately 20 mils of their respective circuit board surfaces to electromagnetically isolate components and subcircuits of the main amplifier subcircuit14and the error amplifier subcircuit16. Though a particular conformation for the inner lid204and the main chassis body206has been described, it is to be understood that alternative arrangements of interstage cavities and subcavity walls may be utilized for different circuit designs.

The chassis202of the present invention may be manufactured of a variety of materials and in a variety of sizes. In one embodiment, aluminum is used for the complete chassis and aluminum is particularly preferred for its ability to conduct heat in the main chassis body206. Aluminum alloys may also be used. In one embodiment, zinc is used for shielding in the inner lid204. Though chassis, according to the present invention, are preferably cast out of aluminum or aluminum alloys, it is to be understood that chassis according to the present invention may be formed by other methods, including machining of metals, casting of metalized plastic, and casting plastic with surface metallization applied later.

The design of the present invention preferably achieves isolation between subcircuits greater than approximately 100 dB (decibels). The isolation achieved according to the present invention is comparable to that achieved through the use of a multiple separate chassis for each subcircuit which is a larger, more complex and more expensive design. In one embodiment, the inner lid204is connected to the main chassis body206via connection screws located along the inner amplifier dividing wall218. Chassis wall, floor, lid, and side thicknesses of at least approximately 70 mils are used in the disclosed embodiment of the present invention, though thicknesses greater than or less than 70 mils may be used, based on casting ability and weight and size considerations.

Electromagnetic isolation is achieved because a Faraday cage is constructed around all cavities having components producing electromagnetic interference. Further, the combination of normally separate chassis into a single chassis design reduces the cost of chassis casting or machining. The cost of casting or machining a separate delay line subcircuit portion is reduced to the cost of machining of the delay line subcircuit portion290into the main chassis body206. Further, the elimination of interconnect cables between separate chassis, the elimination of individual shield assemblies, and the reduction of fastening hardware result in lower cost because less material is used than in conventional amplifier construction.