Method of reducing current collapse of power device

According to example embodiments, a method of operating a power device includes applying a control voltage to a control electrode of the power device, where the control electrode is electrically separated from a source electrode, a drain electrode, and a gate electrode of the power device. The control voltage is separately applied to the control electrode. The method may include applying a negative control voltage to the control electrode prior to applying a gate voltage to the gate electrode.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims priority under 35 U.S.C. §119 to Korean Patent Application No. 10-2013-0027493, filed on Mar. 14, 2013, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.

BACKGROUND

The present disclosure relates to methods of operating a power device to reduce current collapse that occurs by trapping electrons of a channel in a semiconductor layer when the power device is transformed from an off-state to an on-state.

2. Description of Related Art

A high electron mobility transistor (HEMT) is one type of power device. The HEMT includes compound semiconductors having polarizabilities different from each other, and a 2-dimensional electron gas (2DEG) that is used as a carrier is formed in a channel layer. In an HEMT, when turning off the HEMT, a high voltage may be applied to a drain electrode, and thus, electrons from a gate electrode may be trapped in a channel supply layer near the drain electrode or a surface of the channel supply layer near the drain electrode. Also, hot electrons of a channel may be trapped in the channel supply layer.

When a HEMT is turned from an off-state to an on-state, the trapped electrons may be unable to escape from where they are trapped, and thus, a portion of regions of the channel may be depleted. As a result, on-resistance may increase, and accordingly, current collapse may occur. Due to current collapse, resistance in the HEMT may increase, heat generation may increase, and degradation of the HEMT may be accelerated.

In order to reduce the current collapse, using a field plate or forming of a protective layer on the gate electrode has been attempted.

SUMMARY

Example embodiments relate to methods of operating a power device to reduce current collapse when the power device is turned over from an off-state to an on-state.

According to example embodiments, a method of operating a power device to reduce a current collapse that due to electrons trapped in a channel supply layer when the power device is changed to a turned-on state from a turned-off state, includes: applying a control voltage to a control electrode of the power device, the control electrode being electrically separated from a source electrode, a drain electrode, and a gate electrode of the power device, the control voltage being separately applied to the control electrode.

In example embodiments, the method may include applying a gate voltage to the gate electrode, and the applying the control voltage to the control electrode may include detrapping the electrons trapped in the channel supply layer by applying a negative control voltage to the control electrode.

In example embodiments, the applying the negative control voltage may be performed prior to the applying the gate voltage.

In example embodiments, a range negative control voltage may be from about −5V to about −20V.

In example embodiments, the method may further include: applying a bias voltage in a range from about 0V to about −20V to the control electrode when the power device is in the turned-off state. An absolute value of the bias voltage may be smaller than an absolute value of the negative control voltage.

In example embodiments, the control electrode may be between the gate electrode and the drain electrode.

In example embodiments, the power device may include a channel layer, the channel supply layer may be on the channel layer, and the control electrode may be at a lower side of the channel layer and face the gate electrode.

In example embodiments, the method may further include: applying a gate voltage to the gate electrode, wherein applying the control voltage may include forming electrons on a lower side of the control electrode by applying a positive control voltage to the control electrode when the gate voltage is applied to the gate electrode.

In example embodiments, the applying the gate voltage and the applying the positive control voltage may be performed at a same time.

In example embodiments, the applying the control voltage may include: applying a negative control voltage to the control electrode prior to the applying of the gate voltage to the gate electrode; and applying a positive control voltage to the control electrode when the gate voltage is applied to the gate electrode.

In example embodiments, the applying the negative control voltage and the applying the positive control voltage may be consecutively performed.

DETAILED DESCRIPTION

FIG. 1is a schematic cross-sectional view showing a structure of a power device100according to example embodiments.

Referring toFIG. 1, a buffer layer112is formed on a substrate110. The substrate110may include sapphire, Si, SiC, or GaN. However, these materials are examples, and the substrate110may be formed of various materials.

The buffer layer112may be a compound semiconductor. For example, the buffer layer112may be formed of a GaN layer, an AlGaN layer, or an AlGaInN layer. A seed layer (not shown) may be further included between the substrate110and the buffer layer112. The seed layer may be, for example, an AlN layer or an AlGaN layer.

A channel layer120that includes a 2-dimensional electron gas (2DEG) may be formed on the buffer layer112. The 2DEG122may be located below an upper surface of the channel layer120. The 2DEG122may be used as an electron path.

The channel layer120may be formed of a first nitride semiconductor material. The first nitride semiconductor material may be a Group III-V compound semiconductor. For example, the channel layer120may be a GaN group material layer, and more specifically, may be a GaN layer. In this case, the channel layer120may be an undoped GaN layer, and in some cases, may be a GaN layer doped with a desired (and/or alternatively predetermined) impurity.

A channel supply layer130is formed on the channel layer120. The channel supply layer130may cause the 2DEG122in the channel layer120. The 2DEG122may be formed in the channel layer120below an interface between the channel layer120and the channel supply layer130. The channel supply layer130may be formed of a second nitride semiconductor material that is different from the first nitride semiconductor material. The second nitride semiconductor material may be different from the first nitride semiconductor material with respect to at least one of a polarization characteristic, an energy band gap, and a lattice constant. More specifically, at least one of the polarizability and the energy band gap of the second nitride semiconductor material may be greater than that of the first nitride semiconductor material.

The channel supply layer130may be formed of a nitride material that includes at least one of Al, Ga, In, and B, and may have a single layer or multilayer structure. As more specific examples, the channel supply layer130may be formed of AlGaN, AlInN, InGaN, AlN, or AlInGaN. The channel supply layer130may be an undoped layer, but may be a layer doped with an n-type dopant. Silicon may be used as an n-type dopant, but example embodiments are not limited thereto.

The channel supply layer130may have a thickness of, for example, less than a few tens of nm. For example, the thickness of the channel supply layer130may be approximately less than 50 nm, but example embodiments are not limited thereto.

A source electrode141and a drain electrode142may be formed on both sides of the channel supply layer130on the channel layer120. The source electrode141and the drain electrode142may contact the channel supply layer130.

A gate electrode150is formed on the channel supply layer130. The gate electrode150may be formed closer to the source electrode141than the drain electrode142.

A protective layer160covering the gate electrode150may be formed on the channel supply layer130. The protective layer160may be formed of silicon nitride or aluminum nitride. The protective layer160may provide an effect of reducing a current collapse.

A control electrode170may be formed between the gate electrode150and the drain electrode142on the protective layer160. The control electrode170may be formed of a general electrode material. The control electrode170is electrically separated from the source electrode141, the drain electrode142, and the gate electrode150. A control voltage may be separately applied to the control electrode170than voltages applied to the source electrode141, the drain electrode142, and the gate electrode150.

The source electrode141, the drain electrode142, the gate electrode150, and the control electrode170may include at least one metal or a metal nitride. For example, the source electrode141, the drain electrode142, the gate electrode150, and the control electrode170may include at least one of Au, Ni, Pt, Ti, Al, Pd, Ir, W, Mo, Ta, Cu, TiN, TaN, and WN.

FIG. 2is a timing diagram showing a method of operating the power device100ofFIG. 1to reduce current collapse thereof, according to example embodiments.

Referring toFIG. 2, in a power system that includes the power device100, in a state when the power device100is turned off, a high voltage, for example, a few hundred to a few thousand volts may be hanged on the drain electrode142. Accordingly, electrons from the gate electrode150may be trapped in the channel supply layer130near the drain electrode142or at an interface between the protective layer160and the channel supply layer130. Also, hot electrons from the channel may be trapped in the channel supply layer130. Due to the trapped electrons, current collapse may occur when the power device100is turned on.

A negative control voltage −Vc is applied to the control electrode170at a point of time t1before turning on the power device100by applying a gate turn-on voltage Vg1to the gate electrode150of the power device100. The negative control voltage −Vc that is applied to the control electrode170moves electrons trapped in the channel supply layer130to a region of the channel layer120, in particular to the 2DEG122where the electrons are depleted. This process may be referred to as a detrap process.

The gate turn-on voltage Vg1may be referred to as a gate voltage Vg1below. The gate voltage Vg1may be in a range from about 10 V to about 12 V, and the negative control voltage −Vc may be in a range from about −5 V to about −20 V.

Next, when the gate voltage Vg1is applied to the gate electrode150, the power device100is turned-on without current collapse (and/or with reduced current collapse).

In example embodiments, the point of time t1of applying the negative control voltage −Vc may be earlier than a point of time t2of applying the gate voltage Vg1. However, example embodiments are not limited thereto, for example, the point of time t2of applying the gate voltage Vg1and the point of time t1of applying the negative control voltage −Vc may be coincident, or the point of time t2of applying the gate voltage Vg1may be later than the point of time t1of applying the negative control voltage −Vc.

FIG. 3is a timing diagram showing a method of operating the power device100ofFIG. 1to reduce current collapse thereof, according to example embodiments.

Referring toFIG. 3, a bias voltage Vb in a range from about 0 V to about −20 V is applied to the control electrode170when the power device100is in a turned-off state. The application of the bias voltage may limit (and/or repress) the trapping of electrons of the gate electrode150in the channel supply layer130near the drain electrode142or in an interface between the protective layer160and the channel supply layer130, and also, limit (and/or repress) the trapping of hot electrons of the channel in the channel supply layer130.

Next, a negative control voltage −Vc is applied to the control electrode170at a point of time t1before turning on the power device100by applying a gate voltage Vg1to the gate electrode150. The negative control voltage −Vc that is applied to the control electrode170moves electrons trapped in the channel supply layer130to a region of the channel layer120, in particular, to the 2DEG122where the electrons are depleted. This process may be referred to as a detrap process. The gate voltage Vg1may be in a range from about 10 V to about 12V, and the negative control voltage −Vc may be in a range from about −5 V to about −20V. An absolute value of the negative control voltage −Vc may be larger than an absolute value of the bias voltage Vb.

Next, when a gate voltage Vg1is applied to the gate electrode150, the power device100is turned on without current collapse (and/or with reduced current collapse).

In example embodiments, the point of time t1of applying the negative control voltage −Vc may be earlier than a point of time t2of applying the gate voltage Vg1. However, example embodiments are not limited thereto. For example, the point of time t2of applying the gate voltage Vg1and the point of time t1of applying the negative control voltage −Vc may be coincident, or the point of time t2of applying the gate voltage Vg1may be later than the point of time t1of applying the negative control voltage −Vc.

FIG. 4is a timing diagram showing a method of operating the power device100ofFIG. 1to reduce current collapse thereof according to example embodiments.

Referring toFIG. 4, when the power device100is turned-on by applying a gate voltage Vg1to the gate electrode150, a positive control voltage +Vc is applied to the control electrode170. The positive control voltage +Vc that is applied to the control electrode170moves electrons of the channel layer120to an electron depletion region of the 2DEG122. This process may be referred to as channel enhancement. In this method, the control electrode170performs the same function as that of the gate electrode150. The gate voltage Vg1may be in a range from about 10 V to about 12 V, and the positive control voltage +Vc may be in a range from about 5 V to about 20 V. When the gate voltage Vg1is applied to the gate electrode150, the power device100may be turned on without current collapse.

In example embodiments, the point of time t1of applying the positive control voltage +Vc and the point of time t2of applying the gate voltage Vg1may be coincident, but example embodiments are not limited thereto. For example, the point of time t1of applying the positive control voltage +Vc may be earlier than the point of time t2of applying the gate voltage Vg1, and also, the point of time t2of applying the gate voltage Vg1may be earlier than the point of time t1of applying the positive control voltage +Vc.

In the method according to examples embodiments inFIG. 4, the trapping of electrons may be further repressed (and/or limited) by applying a ground voltage or a negative voltage, for example, a bias voltage in a range from about 0 V to about −20 V (refer to Vb ofFIG. 3) to the control electrode170when the power device100is in a turned-off state, and a detailed description thereof will be repeated here.

FIG. 5is a timing diagram showing a method of operating the power device100ofFIG. 1to reduce current collapse thereof, according to example embodiments.

Referring toFIG. 5, a negative control voltage −Vc is applied to the control electrode170at the point of time T1before the point of time T2when the power device100is turned on by applying a gate voltage Vg1to the gate electrode150of the power device100. The negative control voltage −Vc that is applied to the control electrode170moves electrons trapped in the channel supply layer130to the channel layer120, in particular, an electron depletion region of the 2DEG122. This process may be referred to as a detrap process. The gate voltage Vg1may be in a range from about 10 V to about 12 V, and the negative control voltage −Vc may be in a range from about −5 V to about −20V.

Next, a positive control voltage +Vc is applied to the control electrode170(refer to point of time T3) when the power device100is turned on by applying the gate voltage Vg1to the gate electrode150. The positive control voltage +Vc that is applied to the control electrode170moves electrons of the channel layer120to an electron depletion region of the 2DEG122. This process may be referred to as a channel enhancement process. The application of the positive control voltage +Vc may be terminated simultaneously with a termination of the application of the gate voltage Vg1. The gate voltage Vg1may be in a range from about 10 V to about 12 V, and the positive control voltage +Vc may be in a range from about 5 V to about 20 V. When the gate voltage Vg1is applied to the gate electrode150, the power device100is turned on without current collapse.

In example embodiments, the point of time T1of applying the negative control voltage −Vc may be before the point of time T2of applying the gate voltage Vg1, and the point of time T3of applying the positive control voltage +Vc may be after the point of time T2of applying the gate voltage Vg1, but example embodiments are not limited thereto. For example, the point of time T1of applying the negative control voltage −Vc may be later than the point of time T2of applying the gate voltage Vg1, or the point of time T2of applying the gate voltage Vg1and the point of time T3of applying the positive control voltage +Vc may be coincident.

In the method according to example embodiments ofFIG. 5, the electron trapping may be further repressed by applying a bias voltage (Vb ofFIG. 3) in a range from about 0 V to about −20 V to the control electrode170in a state when the power device100is turned off, and descriptions thereof will be repeated here.

In the example embodiments described above, the power device100in which a control electrode is formed on a protective layer is described, but example embodiments are not limited thereto. For example, the control electrode may be formed on the channel supply layer130without the protective layer. Also, if the substrate110is a conductive substrate, the conductive substrate may be used as the control electrode. Also, the control electrode may be formed on a lower side of the channel layer120after removing the substrate110and the buffer layer112.

Also, a channel depletion layer may further be formed on a lower side of the gate. Also, portions of the channel supply layer130and the channel layer120may have a recessed structure.

According to example embodiments, a control voltage that is separately applied to a control electrode from voltages applied to other electrodes is to generate a detrapping mode and/or a channel enhancement mode in which electrons are moved to an electron depletion region of the channel, thereby reducing current collapse. As a result, the resistance of a power device is reduced and the degradation of the power device due to heat may be reduced.

It should be understood that example embodiments described herein should be considered in a descriptive sense only and not for purposes of limitation. Descriptions of features or aspects within each method according to example embodiments should typically be considered as available for other similar features or aspects in other methods according to example embodiments. While some example embodiments have been particularly shown and described, it will be understood by one of ordinary skill in the art that variations in form and detail may be made therein without departing from the spirit and scope of the claims.