(Al, Ga, In)N-based compound semiconductor and method of fabricating the same

Disclosed are a (Al, Ga, In)N-based compound semiconductor device and a method of fabricating the same. The (Al, Ga, In)N-based compound semiconductor device of the present invention comprises a substrate; a (Al, Ga, In)N-based compound semiconductor layer grown on the substrate; and an electrode formed of at least one material or an alloy thereof selected from the group consisting of Pt, Pd and Au on the (Al, Ga, In)N-based compound semiconductor layer. Further, the method of fabricating the (Al, Ga, In)N-based compound semiconductor device comprises the steps of growing a P layer including P type impurities in a growth chamber; discharging hydrogen and a hydrogen source gas in the growth chamber; lowering the temperature of the (Al, Ga, In)N-based compound semiconductor with the P layer formed thereon to such an extent that it can be withdrawn to the outside from the growth chamber; withdrawing the (Al, Ga, In)N-based compound semiconductor from the growth chamber; and forming an electrode of at least one material or an alloy thereof selected from the group consisting of Pt, Pd and Au on the p layer. According to the present invention, it is possible to sufficiently secure P type conductivity and obtain good ohmic contact characteristics without performing an annealing process. And, no further annealing is necessary when Pt, Pd, Au electrode are used.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to Aluminum (Al), Gallium (GA), Indium (In) N-based compound semiconductor device and a method of fabricating the same, and more particularly to a (Al, Ga, In)N-based compound semiconductor device comprising a (Al, Ga, In)N-based compound semiconductor layer (P layer) including P type impurities and a transparent electrode provided on the P layer, and a method of fabricating the (Al, Ga, In) N-based compound semiconductor device.

2. Discussion of the Background

A (Al, Ga, In)N-based compound semiconductor is applied, for example, to a compound semiconductor device such as a light emitting diode (LED) or a laser diode (LD).FIG. 1is a cross-sectional view schematically showing a conventional (Al, Ga, In)N-based compound semiconductor device.

Referring toFIG. 1, a (Al, Ga, In)N-based compound semiconductor layer (N layer)13including N type impurities, an active layer15and a (Al, Ga, In)N-based compound semiconductor layer (P layer)17including P type impurities are sequentially formed on a substrate11. The P layer17, the active layer15and the N layer13are partially etched such that the N layer13is partially exposed to the outside. Electrodes19and21including Ni and Au are formed on the P layer17, and an electrode25is also formed on the N layer13.

Generally, impurities are doped in the P layer17to secure the conductivity in the conventional (Al, Ga, In)N-based compound semiconductor device101. However, the P type impurities, e.g., magnesium (Mg), do not fulfill the function as an electron acceptor that provides free holes, since they are easily bonded with hydrogen (H) existing in a growth chamber. Therefore, an additional annealing process of disconnecting bonds between the P type impurities and hydrogen is performed in a process of fabricating a P layer of a (Al, Ga, In)N-based compound semiconductor.

FIG. 2is a flowchart illustrating a method of fabricating a P layer of a conventional (Al, Ga, In)N-based compound semiconductor.

Referring toFIG. 2, P type impurities and source gases for the compound semiconductor are supplied to a growth chamber such that a P layer of the compound semiconductor is grown on a substrate (P1). After the full growth of the P layer, the growth chamber is cooled to lower the temperature of the substrate (P2). Thereafter, the P layer-grown substrate is withdrawn from the growth chamber (P3). Then, annealing is performed for the P layer (P4). Referring to U.S. Pat. No. 5,306,662, a P layer of a compound semiconductor is grown using P type impurities and source gases for the compound semiconductor and the P layer is subsequently annealed at a temperature of 400° C. or more. As a result, hydrogen bonded to the P type impurities is removed to form a P type (Al, Ga, In)N-based compound semiconductor with low and uniform resistance.

Meanwhile, an annealing process is also performed to obtain ohmic contact characteristics between the P layer and a metallic electrode. With the annealing process, there are advantages in that good ohmic contact characteristics between the electrode and the P layer is obtained, and bonds between the P type impurities and hydrogen remaining in the P layer are disconnected.

In such a conventional (Al, Ga, In)N-based compound semiconductor device, at least one annealing process should be performed to lower the resistance of the P layer or improve ohmic contact characteristics between the P layer and a transparent electrode. However, the annealing process has a problem in that it makes a fabrication process of a compound semiconductor device complicated and troublesome. The annealing process prolongs fabrication time of a product and particularly increases the unit cost of a product since expensive equipment for performing the annealing process should be purchased, and a space for installing the equipment is required, resulting in increases of investment costs for fabrication facilities.

SUMMARY OF THE INVENTION

The present invention is conceived to solve the aforementioned problems in the prior art. An object of the present invention is to provide a (Al, Ga, In)N-based compound semiconductor device that exhibits superior performance without performing a conventional annealing process, and a method of fabricating the (Al, Ga, In)N-based compound semiconductor device.

Another object of the present invention is to provide a (Al, Ga, In)N-based compound semiconductor device capable of securing P type conductivity without a conventional P layer annealing process, and a method of fabricating the (Al, Ga, In)N-based compound semiconductor device.

A further object of the present invention is to provide a method of fabricating a P layer of a (Al, Ga, In)N-based compound semiconductor, wherein P type conductivity can be secured without a conventional annealing process.

A still further object of the present invention is to provide a (Al, Ga, In) N-based compound semiconductor device capable of securing ohmic characteristics between a P layer and an electrode without an annealing process after forming the electrode.

A still further object of the present invention is to provide a (Al, Ga, In)N-based compound semiconductor device that can be fabricated simply and conveniently without performing an annealing process, thereby reducing facility investment, and a method of fabricating the (Al, Ga, In)N-based compound semiconductor device.

According to an aspect of the present invention for achieving the objects, there is provided a (Al, Ga, In)N-based compound semiconductor device, comprising a substrate; a (Al, Ga, In)N-based compound semiconductor layer grown on the substrate; and an electrode formed of at least one material selected from the group consisting of Pt, Pd and Au or an alloy thereof on the (Al, Ga, In)N-based compound semiconductor layer.

In this instance, the electrode may be formed by stacking Pt and Au, or Pd and Au; or formed of an alloy of at least two selected from Pt, Pd and Au.

According to another aspect of the present invention for achieving the objects, there is provided a method of fabricating a (Al, Ga, In)N-based compound semiconductor device, comprising the steps of growing a (Al, Ga, In) N-based compound semiconductor layer (P layer) including P type impurities on a substrate in a growth chamber; discharging hydrogen, ammonia and gas including hydrogen in the growth chamber; lowering the temperature of the substrate with the P layer formed thereon to such an extent that the substrate can be withdrawn to the outside from the growth chamber; withdrawing the substrate with the P layer formed thereon from the growth chamber; and forming an electrode of at least one material selected from the group consisting of Pt, Pd and Au on the P layer or an alloy thereof.

Here, the step of lowering the temperature may be performed by means of water cooling or air cooling of the growth chamber.

Meanwhile, the step of lowering the temperature may comprise the steps of maintaining the growth chamber under vacuum conditions; and supplying a cooling gas into the growth chamber under vacuum conditions.

A method of fabricating a P layer of a (Al, Ga, In)N-based compound semiconductor according to a further aspect of the present invention comprises the steps of growing the P layer by supplying gases into a growth chamber while maintaining temperature of the growth chamber at a temperature for growth of the P layer of the (Al, Ga, In)N-based compound semiconductor; stopping the supply of the gases after the growth of the P layer is completed; discharging the gases existing in the growth chamber at a temperature higher than a temperature at which impurities in the P layer and hydrogen contained in the gases are bonded to each other; and lowering the temperature of the P layer of the (Al, Ga, In)N-based compound semiconductor.

The temperature for the growth of the P layer may be in a range of 600 to 1,300° C., and the temperature at which the gases existing in the growth chamber are discharged may be in a range of 400 to 1,300° C.

According to the present invention, there are provided a (Al, Ga, In)N-based compound semiconductor device and a method of fabricating the same, wherein P type conductivity can be sufficiently secured and good ohmic contact characteristics can be obtained without performing a conventional annealing process. And, according to the present invention, there are provided a P layer of a (Al, Ga, In)N-based compound semiconductor and a method of fabricating the same, wherein P type conductivity can be sufficiently secured without performing a conventional annealing process. Furthermore, no further annealing is necessary when Pt, Pd or Au or alloy electrode thereof is used. As such, the present invention enables simple and convenient fabrication of the (Al, Ga, In)N-based compound semiconductor device, and reduction in facility investment by eliminating such a conventional annealing process.

DETAILED DESCRIPTION OF THE ILLUSTRATED EMBODIMENTS

Hereinafter, a (Al, Ga, In)N-based compound semiconductor and a method of fabricating the same will be described in detail according to the present invention with reference to the accompanying drawings.

FIG. 3is a perspective view of a (Al, Ga, In)N-based compound semiconductor device comprising a P layer and an electrode according to an embodiment of the present invention, andFIG. 4is a cross-sectional view ofFIG. 3. The (Al, Ga, In)N-based compound semiconductor device1comprises a substrate11, (Al, Ga, In)N-based compound semiconductor layers25grown on the substrate11, and electrodes31and35formed on the (Al, Ga, In)N-based compound semiconductor layers25. Meanwhile, an electrode pad33for electrical connection with the outside may be formed on the electrode31.

Insulative sapphire or others may be used as the substrate11, and a conductive or semi-conductive substrate of Si, SiC, GaN or the like may also be used as the substrate11. Recently, the conductive or semi-conductive substrate is frequently used in a (Al, Ga, In)N-based compound semiconductor device for high power since it is relatively superior to a sapphire substrate in view of thermal conductivity.

The (Al, Ga, In)N-based compound semiconductor layers25comprise a buffer layer12, a (Al, Ga, In)N-based compound semiconductor layer doped with N type impurities (N layer)13, a (Al, Ga, In)N-based compound semiconductor layer doped with P type impurities (P layer)17, and an active layer15interposed between the N layer and the P layer. The buffer layer12is formed to have a certain thickness on the substrate11to relieve lattice mismatch between the substrate11and the N layer13. The buffer layer12maybe formed of AlN, InGaN, GaN, AlGaN, or the like.

Although the N layer13may be formed without doping of impurities, it is desirable to form the N layer by doping impurities of Si, Ge, Se, S, Te or the like. For example, the N layer13that may be fabricated to have a thickness of 0.5 to 10 μm is preferably formed of GaN. The N layer13may be formed to have a structure in which GaN layers with impurities and GaN layers without impurities are alternately stacked one above the other. The number of stacked layers can be properly selected.

The active layer15can be constructed to have a quantum well (QW) structure, for example, a single quantum well (SQW) structure or a multi quantum well (MQW) structure. The quantum well structure may contain stacks of (Al, Ga, In)N-based semiconductor layers, for example, InGaN layers and GaN layers. Power output is expected to vary depending on the number of stacked layers or the thicknesses of the InGaN and GaN layers. Therefore, it is important to properly set the number of stacked layers and thicknesses thereof.

The P layer17is formed by means of doping of P type impurities. Be, Sr, Ba, Zn or Mg may be used as the P type impurities, but Mg is often used. Although a detailed description will be made later with reference toFIGS. 5 and 6illustrating fabrication methods in the present invention, a phenomenon in which bonding of the impurities with hydrogen is generated in the P layer17is prevented in advance, so that the impurities themselves can contribute to generation of free holes.

Meanwhile, the P layer17, the active layer15and the N layer13are partially etched in the (Al, Ga, In) N-based compound semiconductor layers25grown on the substrate11, so that a portion of the N layer13is exposed to the outside. A thin electrode31formed on the P layer17, and an electrode35is also formed on the N layer13. It is desirable to form the electrode31on the P layer17as a transparent electrode capable of transmitting light generated from the active layer15therethrough.

The electrode31on the P layer17is formed of at least one material selected from the group consisting of Pt, Pd and Au or an alloy thereof. For example, the electrode may be formed of N and Au, or Pd and Au by sequentially stacking Pt and Au on the P layer17or Pd and Au on the P layer17. Here, the stacking sequence of Pt and Au, or Pd and Au may be selective. The electrode31may be formed of an alloy of at least two selected from the group consisting of Pt, Pd and Au. In case where the electrode31is formed of such a metallic material, good ohmic contact characteristics can be obtained without performing an additional annealing process.

An electrode pad33is formed on a portion of the electrode31, which is to be electrically connected to the outside. The electrode pad33may also be formed of a metallic material with the same components as the electrode of the present invention.

Meanwhile, the electrode35formed on the N layer13may also be formed of the same metallic material as the electrodes31and33formed on the P layer17. However, a material with different components may be used for the electrode in consideration of properties of the N layer13. Since a variety of techniques regarding the N layer electrode35and components thereof is known, detailed descriptions thereof will be omitted.

Hereinafter, a method of fabricating the (Al, Ga, In)N-based compound semiconductor described as a preferred embodiment of the present invention will be explained.

FIG. 5is a flowchart illustrating a method of fabricating the P layer of the (Al, Ga, In)N-based compound semiconductor according to the present invention.

Referring toFIG. 5, although not illustrated in the flowchart, the P layer17of the (Al, Ga, In)N-based compound semiconductor device1is formed after supplying the substrate11into a growth chamber, heating the substrate therein and sequentially growing the buffer layer12, the N layer13and the active layer15on the heated substrate (S1).

The P layer17is grown by supplying source gases into the growth chamber at a high temperature of 600° C. or more after forming the active layer15(S1). As for the source gases, for example, tri-methyl gallium (TMG) may be used as a source of Ga, and ammonia (NH3) may be used as a source of nitrogen (N), and the source gases are supplied together with a carrier gas of H2or N2. Meanwhile, in a case where Mg is doped as P type impurities, Cp2Mg may be used as a source. If the growth of the P layer17is completed (S2), the supply of the gases (including the source gases and the carrier gas) into the growth chamber is stopped (S3), and all the gases existing in the growth chamber are discharged (S4).

An important technical feature of the present invention is to provide a state and a condition under which the P type impurities and hydrogen cannot be bonded to each other in the growth chamber. Epitaxial growth is made in the growth chamber at a high temperature at which the P type impurities and hydrogen cannot be bonded to each other, for example, at 600˜700° C. or more. In the present invention, the P layer17is formed at a very high temperature, for example, at 600 to 1,300° C., wherein the P type impurities and hydrogen are not bonded to each other at the P layer-forming temperature of the present invention. As described above, after the growth of the P layer is completed at a very high temperature, the external supply of the gases into the growth chamber is stopped, and residual gases in the growth chamber are discharged to the outside. Since hydrogen does not exist in the growth chamber, bonding of the P type impurities with hydrogen does not occur, and the impurities in the P Layer are in a state where they can perform the function of an electron acceptor to provide free holes. Since bonding of the P type impurities with hydrogen does not occur, it is not necessary to perform an annealing process in the present invention.

After the gases in the growth chamber have been completely discharged (S4), the heating is stopped (S5) so that the temperature of the substrate11and the temperature of the (Al, Ga, In)N-based compound semiconductor layers25formed thereon are lowered in the growth chamber (S6). Here, the temperatures of the substrate11and the (Al, Ga, In)N-based compound semiconductor layers25may be lowered by means of air cooling or water cooling of the growth chamber. The temperatures of the substrate11and the (Al, Ga, In)N-based compound semiconductor layers25may also be lowered by injecting a cooling gas into the growth chamber in the state where hydrogen and hydrogen source gases have been discharged from the growth chamber. A gas that is difficult to be bonded to the P type impurities, e.g., nitrogen (N2) gas is preferably used as the cooling gas since the nitrogen gas is also used as the carrier gas. The temperatures of the substrate11and the (Al, Ga, In)N-based compound semiconductor layers25can be lowered more rapidly by injecting the cooling gas into the growth chamber after maintaining the growth chamber under vacuum conditions.

If the temperatures of the substrate11and the (Al, Ga, In)N-based compound semiconductor layers25are sufficiently lowered (S7), the substrate11is withdrawn from the growth chamber (S8). Since bonding of the impurities with hydrogen does not occur in the P layer, it is not necessary to perform an additional annealing process. In this case, since the impurities themselves of the P layer can contribute to generation of free holes, a superior P layer with low resistance is provided and enables fabrication of a product with excellent properties.

FIG. 6is a flowchart illustrating a method of fabricating the (Al, Ga, In)N-based compound semiconductor device according to an embodiment of the present invention, andFIG. 7is a graph schematically illustrating a method of fabricating the P layer according to an embodiment of the present invention.

Referring toFIGS. 6 and 7, the substrate11is first supplied into the growth chamber in order to grow the (Al, Ga, In)N-based compound semiconductor layers25(S101). After heating the substrate11to a predetermined temperature, the (Al, Ga, In)N-based compound semiconductor layers25, e.g., the buffer layer12, the N layer13, the active layer15and the P layer17, are sequentially grown on the substrate (S102). Hereinafter, for the sake of convenience of explanation and understanding of the fabrication method of the present invention, “the substrate11and the (Al, Ga, In)N-based compound semiconductor layers25grown thereon” will be simply referred to as “Epi27.”

Most of techniques regarding the growth of the Epi27can be easily understood by those skilled in the art and are well known to the public. However, the thicknesses of the buffer layer12, the N layer13, the active layer15and the P layer17, growth conditions thereof, i.e., temperature and pressure, and techniques applied to or in-between the respective layers12,13,15are particularly important. A specific description of an epitaxial growth technology that is not greatly related to the present invention will be omitted. The (Al, Ga, In)N-based compound semiconductor layers25, except the P layer17, mentioned in the embodiment of the present invention can be grown through an ordinary technique that is easily understood by those skilled in the art.

When the growth of the (Al, Ga, In)N-based compound semiconductor layers25on the substrate11is completed (S103), i.e., after the P layer17has been formed, the supply of gases containing hydrogen is stopped (S104). At the same time, the supply of other gases into the growth chamber may also be stopped. Here, the gases supplied into the growth chamber include source gases such as NH3and TMG and a carrier gas such as H2or N2. After the supply of the gases into the growth chamber is stopped, heating of the growth chamber may also be stopped (S105). Stopping the heating of the growth chamber (S105) may be performed preferentially to or simultaneously with stopping the supply of the gases into the growth chamber (S104). After stopping the heating of the growth chamber and the supply of the gases into the growth chamber (S104, S105), residual gases in the growth chamber, particularly, hydrogen and hydrogen source gases are discharged to the outside of the growth chamber (S106). Meanwhile, stopping the heating of the growth chamber (S105) may be performed after the hydrogen and hydrogen source gases in the growth chamber are discharged to the outside of the growth chamber.

As described with reference toFIG. 5, an important technical feature of the present invention is to provide a state and a condition under which the P type impurities and hydrogen cannot be bonded to each other in the growth chamber. After the growth of the P layer is completed at a high temperature at which the P type impurities and hydrogen cannot be bonded to each other, the external supply of the gases into the growth chamber is stopped (S104), and residual gases in the growth chamber are discharged to the outside of the growth chamber (S106). In this case, since hydrogen does not exist in the growth chamber, bonding of the P type impurities with hydrogen cannot occur. Therefore, it is not necessary to perform a conventional annealing process for removing hydrogen from the P layer.

After all the residual gases in the growth chamber have been discharged to the outside (S107), the temperature of the Epi27is lowered to such an extent that the Epi27can be withdrawn to the outside from the growth chamber (S108). After stopping the heating in the growth chamber, the temperature of the Epi27may be lowered by leaving the Epi27such that it is cooled through natural convection. The temperature of the Epi27may be lowered by means of air cooling or water cooling of the growth chamber. Alternatively, the temperature of the Epi27may be lowered by injecting a cooling gas such as nitrogen (N2) gas, which is not bonded to impurities, into the growth chamber after completely discharging the gases remaining in the growth chamber or maintaining the growth chamber under vacuum conditions. The temperature of the Epi27may be lowered more rapidly by injecting the cooling gas into the growth chamber after maintaining the growth chamber under vacuum conditions.

If the temperature of the Epi27is sufficiently lowered, the Epi27is withdrawn from the growth chamber (S109). After the Epi27is withdrawn, a portion of the N layer13is exposed by partially etching the P layer17, the active layer15and the N layer13. Then, the electrode31is formed on a top surface of the partially etched Epi27, i.e., a top surface of the P layer17(S110). As described above with reference toFIGS. 3 and 4, the electrode31is formed as a metallic transparent electrode out of at least one material selected from the group consisting of Pt, Pd and Au. In this case, good ohmic contact characteristics can be obtained without an additional annealing process.

The electrode35is formed on the N layer13simultaneously or sequentially with the formation of the electrode31on the P layer17. The P layer electrode31and the N layer electrode35are spaced apart at a certain distance. After the formation of the electrode31on the P layer17, the electrode pad33electrically connected to the outside is formed on the electrode31. Then, the Epi27is separated to obtain an individual device including the pair of electrodes33and35(S111).

When a (Al, Ga, In)N-based compound semiconductor device is fabricated according to the method, a P layer17with low resistance can be formed and good ohmic contact characteristics can be secured without performing an additional annealing process. Therefore, annealing equipment is not required, a fabrication process is simplified, and a product can be fabricated very easily.

FIG. 8is a cross-sectional view illustrating a (Al, Ga, In)N-based compound semiconductor device with a P layer according to another embodiment of the present invention. In the (Al, Ga, In)N-based compound semiconductor device41of this embodiment of the present invention, an N layer13, and active layer15and a P layer17are formed on a substrate11, and a P type electrode31is formed on a top surface of the P layer17. The substrate11is formed of a conductive or semi-conductive material such as metal, Si, SiC or GaN, and the substrate itself functions as an N type electrode. The substrate11may also be formed of Sapphire or Spinel. Electrode pads electrically connected to the outside may be formed on a top surface of the P type electrode31and/or a bottom surface of the substrate11. A buffer layer (12inFIGS. 3 and 4) may be formed between the N layer13and the substrate11in the same manner as the aforementioned embodiment.

In this embodiment of the present invention, the P layer17is formed without an annealing process as described above with reference toFIG. 5or6. After the formation of the P layer17, an electrode is formed thereon out of at least one metallic material selected from the group consisting of Pt, Pd and Au.

Meanwhile, although the embodiment in which the substrate11is disposed adjacent to the N layer13is illustrated inFIG. 8, the present invention is not limited thereto but may be applied to a structure in which the substrate is disposed adjacent to the P layer. This structure also provides the same functions and effects as the embodiments described and illustrated above.

It is apparent that a (Al, Ga, In)N-based compound semiconductor explained herein in connection with the present invention comprises AlxInyGazN (0≦x, y, z≦1) and can be applied to, for example, a variety of fields in addition to a light emitting diode (LED), a laser diode (LD), heterojunction bipolar transistor, field effect transistor, or photodectector.