Method of manufacturing semiconductor devices

In semiconductor devices and methods of manufacturing semiconductor devices, a zirconium source having zirconium, carbon and nitrogen is provided onto a substrate to form an adsorption layer of the zirconium source on the substrate. A first purging process is performed to remove a non-adsorbed portion of the zirconium source. An oxidizing gas is provided onto the adsorption layer to form an oxidized adsorption layer of the zirconium source on the substrate. A second purging process is performed to remove a non-reacted portion of the oxidizing gas. A nitriding gas is provided on the oxidized adsorption layer to form a zirconium carbo-oxynitride layer on the substrate, and a third purging process is provided to remove a non-reacted portion of the nitriding gas.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims priority under 35 USC §119 to Korean Patent Application No. 2008-23059, filed on Mar. 12, 2008, the contents of which are hereby incorporated by reference in their entirety.

BACKGROUND

1. Technical Field

Example embodiments relate to semiconductor devices having a dielectric layer of a high dielectric constant and to a method of manufacturing semiconductor devices.

2. Description of the Related Art

As a result of semiconductor devices becoming more highly integrated, the area of a unit cell has been significantly reduced, and also the operational voltage has been lowered as well. Accordingly, a dielectric layer having a high dielectric constant (high-k) has been applied to the semiconductor devices to enhance electrical storage performance and/or to suppress leakage current through the dielectric layer.

Generally, a high-k dielectric layer has a thin equivalent oxide thickness and a high dielectric constant, so the high-k dielectric layer may improve the capacitance of a capacitor or a coupling ratio of a flash memory device, or the high-k dielectric layer may provide a proper threshold voltage of a metal gate structure.

For example, a hafnium oxide (HfO2) layer, a tantalum oxide (Ta2O5) layer or an aluminum oxide (Al2O3) layer have been used as the high-k dielectric layer. These dielectric layers have a high dielectric constant of about 20, so these dielectric layers may have an electrically effective thickness. However, these dielectric layers may be crystallized during a subsequent annealing process. When crystallization of a dielectric layer occurs, a threshold voltage of a gate may not be uniform along a channel length, and a leakage current deteriorating reliability of a semiconductor device may be generated.

Zirconium oxide (ZrO2) has a high dielectric constant of at least about 40, so recently zirconium oxide has been widely used as a dielectric layer. However, a zirconium oxide layer may have some difficulties with regard to deteriorating characteristics of a semiconductor device. For instance, the zirconium oxide layer may be readily thickened while other processes are performed. In addition, the zirconium oxide layer may be readily crystallized during a subsequent thermal process, so leakage current of a semiconductor device may be generated through a crystallized portion of the zirconium oxide layer.

FIG. 1is a graph illustrating a failed bit count (FBC) according to variation of applied voltage (Vp) in a memory device having a zirconium oxide (ZrO2) dielectric layer. Referring toFIG. 1, the number of failed bit per unit cell rapidly increased at about 0.6V, and increased at about 1V largely over about 10 bit, which may be a maximum allowable number of failed bits. These results may indicate that leakage current paths may be generated in the zirconium oxide layer while amorphous zirconium oxide of the dielectric layer may be partially or fully crystallized by heat. Therefore, when a zirconium oxide dielectric layer is used, an increase in temperature in a thermal process may be limited. Therefore, the formation of a dielectric layer having enhanced thermal stability and electrical characteristics, e.g. a uniform threshold voltage in a channel region and a constant operational voltage, is still required in the art.

SUMMARY

Example embodiments may provide methods of manufacturing the semiconductor device including a high dielectric layer, which may have a high dielectric constant and reduce generation of a leakage current through a crystallization portion of the dielectric layer.

Example embodiments may also provide semiconductor devices including a high dielectric layer, which may have a high dielectric constant and reduce generation of a leakage current through a crystallization portion of the dielectric layer.

In accordance with an exemplary embodiment of the present invention, a method of manufacturing a semiconductor device is provided. The method includes providing a zirconium source having zirconium, carbon and nitrogen onto a semiconductor substrate to form an adsorption layer of the zirconium source on the semiconductor substrate, performing a first purging process to remove a non-adsorbed portion of the zirconium source from the semiconductor substrate, providing an oxidizing gas onto the adsorption layer of the zirconium source to form an oxidized adsorption layer of the zirconium source on the semiconductor substrate and performing a second purging process to remove a non-reacted portion of the oxidizing gas. The method further includes providing a nitriding gas on the oxidized adsorption layer of the zirconium source to form a zirconium carbo-oxynitride layer on the semiconductor substrate, and then performing a third purging process to remove a non-reacted portion of the nitriding gas.

An example of the zirconium source may include but is not limited to tetrakis(dialkylamino)zirconium. Examples of the oxidizing gas may include but are not limited to oxygen (O2), ozone (O3), water vapor (H2O), etc. Examples of the nitriding gas may include ammonia (NH3), nitrous oxide (N2O), nitric oxide (NO), etc. The nitriding gas may be activated by plasma.

In example embodiments, the steps from providing the zirconium source through performing the third purging process may be repeated in a cycle.

In example embodiments, at least two cycles may be performed, and at least two layers of zirconium carbo-oxynitride having different amounts of oxygen, carbon and/or nitrogen from each other may be formed on the semiconductor substrate. In some embodiments, the at least two cycles may use different types, feed amounts and/or pressure levels of the oxidizing gas and/or the nitriding gas. In other embodiments, the at least two cycles may have a repeat unit including at least two cycles each of which uses different types, feed amounts and/or pressure levels of the oxidizing gas and/or the nitriding gas.

In example embodiments, a lower electrode may be formed on the semiconductor substrate before providing the zirconium source onto the semiconductor substrate, and an upper electrode may be formed on the zirconium carbo-oxynitride layer after performing the third purging process.

In example embodiments, an electrode may be formed on the zirconium carbo-oxynitride layer after performing the third purging process.

In example embodiments, a tunnel oxide layer and a floating gate electrode may be sequentially formed on the semiconductor substrate before providing the zirconium source onto the semiconductor substrate. A control gate electrode may be formed on the zirconium carbo-oxynitride layer after performing the third purging process. The zirconium carbo-oxynitride layer may be provided as a dielectric layer between the floating gate electrode and the control gate electrode.

In accordance with another example embodiment, a semiconductor device is provided. The semiconductor device includes a semiconductor substrate, a dielectric layer formed on the semiconductor substrate and an electrode formed on the dielectric layer. The dielectric layer includes at least two atomic layers of zirconium carbo-oxynitride. The at least two atomic layers of zirconium carbo-oxynitride having different amounts of at least one of carbon, oxygen and nitrogen.

In example embodiments, the dielectric layer may include a plurality of atomic layers of zirconium carbo-oxynitride having a chemical formula of ZrO2-x-yCxNyin which x and y satisfy 0<x<2, 0<y<2 and 0<x+y<2 and at least two of the atomic layers may have different values for at least one of x and y.

In example embodiments, the dielectric layer may include a plurality of atomic layers of zirconium carbo-oxynitride having a chemical formula of ZrO2-x-yCxNyin which x and y satisfy 0<x<2, 0<y<2 and 0<x+y<2, and the plurality of atomic layers may have a repeating unit of at least two atomic layers which have different values for at least one of x and y.

In example embodiments, the semiconductor device may further include a lower electrode between the semiconductor substrate and the dielectric layer.

In example embodiments, the semiconductor device may further include a tunnel oxide layer formed on the semiconductor substrate, and a floating gate electrode on the tunnel oxide layer. The dielectric layer may be formed on the floating gate electrode, and the electrode may be provided as a control gate electrode.

According to example embodiments, the zirconium carbo-oxynitride layer formed by sequentially providing the oxidizing gas and the nitriding gas to the adsorption layer of the zirconium source may have a stable structure in which zirconium, oxygen, carbon and nitrogen may be stably combined. The zirconium carbo-oxynitride layer may have a high temperature of crystallization relative to that of a zirconium oxide layer. Thus, a generation of a leakage current through a crystallized portion may be reduced or suppressed, and a device having a uniform threshold voltage along a channel length may be obtained. Further, a temperature margin of a thermal process performed after forming the zirconium carbo-oxynitride layer may be raised.

Furthermore, the zirconium carbo-oxynitride layer may have a reduced equivalent oxide thickness (EOT) and a high dielectric constant. Therefore, a dimension of a dielectric layer in a device may be reduced, and a highly-integrated device having an increased number of cells may be manufactured.

Additionally, the zirconium carbo-oxynitride layer may be formed to have sub-layers of various compositions by an ALD process using different process conditions. Such a zirconium carbo-oxynitride layer may not be readily crystallized during a thermal process due to non-uniformity of the compositions of the sub-layers, and thus a generation of a leakage current from the dielectric layer may also be reduced. Further, the dielectric constant of the dielectric layer may be simply adjusted by changing process conditions of each cycle in an ALD process. Therefore, the zirconium carbo-oxynitride layer may be properly employed in various devices or logics. The zirconium carbo-oxynitride layer may also be applied to a dielectric layer between a floating gate and a control gate in a flash memory device to improve the coupling ratio of the flash memory device.

DETAILED DESCRIPTION OF THE EXAMPLE EMBODIMENTS

Method of Forming a Zirconium Carbo-Oxynitride Layer

Example embodiments provide methods of forming a zirconium carbo-oxynitride layer. The zirconium carbo-oxynitride layer may have a high dielectric constant of, for example, at least about 40 which may be similar to that of zirconium oxide. The zirconium carbo-oxynitride layer may also have a high temperature of crystallization relative to zirconium oxide, so a dielectric layer having zirconium carbo-oxynitride may reduce or suppress generation of leakage current through a crystallized portion.

According to example embodiments, the zirconium carbo-oxynitride layer may be formed by, for example, performing a sequence of several steps through an atomic layer deposition (ALD) process or a plasma enhanced ALD (PEALD) process. The zirconium carbo-oxynitride layer, which is prepared using a sequence of using reactive gases as described in the follow example embodiments, may have significantly improved electrical characteristics, e.g. a high dielectric constant and a thin equivalent oxide thickness (EOT), as compared with using other sequence of reactive gases.

FIG. 2is a flow chart illustrating a method of forming a zirconium carbo-oxynitride layer. Referring toFIG. 2, a zirconium source may be provided onto a semiconductor substrate which may be loaded in a chamber (S10). The zirconium source may be adsorbed onto the semiconductor substrate to form an adsorption layer of the zirconium source. The adsorption layer may be one or more atomic or molecular layers of the zirconium source.

The semiconductor substrate may be a bare wafer or a wafer on which other structures, e.g. impurity regions, gate electrodes, insulation layers, conductive layers, contacts, plugs and/or wirings, are formed. For example, the semiconductor substrate, on which a gate electrode, an insulating interlayer covering the gate electrode, a contact plug connecting a capacitor to an impurity region of the semiconductor substrate, and a lower electrode on the contact plug are formed, may be used.

The zirconium source may include, for example, zirconium, carbon and nitrogen. The zirconium source may include, for example, zirconium and alkylamino ligands. For example, the zirconium source may be tetrakis(dialkylamino)zirconium. Non-limiting examples of tetrakis(dialkylamino)zirconium may include tetrakis(ethylmethylamino)zirconium (Zr[N(CH3)(CH2CH3)]4, TEMAZ) represented by Formula 1, tetrakis(diethylamino)zirconium (Zr[N(CH2CH3)2]4), tetrakis(dimethylamino)zirconium (Zr[N(CH3)2]4) and the like.

A first purging process may be performed on the chamber having the semiconductor substrate (S20). By performing the first purging process, a non-adsorbed portion of the zirconium source may be removed from the semiconductor substrate and the chamber, and the adsorption of the zirconium source may remain on the semiconductor substrate. The first purging process may be performed using, for example, an inactive gas or an inert gas, e.g. argon (Ar), helium (He) or nitrogen (N2).

An oxidizing gas may be provided onto the semiconductor substrate (S30). The oxidizing gas may be a reactive gas to partially or fully oxidize the zirconium source of the adsorption layer. Accordingly, an oxidized adsorption layer of the zirconium source may be formed on the semiconductor substrate. The oxidized adsorption layer of the zirconium source may include, for example, an organic zirconium oxide material. Various oxidizing gas having different oxidizing abilities may be used. Non-limiting examples of the oxidizing gas may include oxygen (O2), ozone (O3), water vapor (H2O) and the like. An oxidizing gas having a relatively low oxidizing ability (e.g. oxygen gas) may partially oxidize the adsorption layer of the zirconium source.

A second purging process may be performed on the chamber having the semiconductor substrate (S40). During the second purging process, a non-reacted portion of the oxidizing gas may be removed from the semiconductor substrate and the chamber. The second purging process may also be performed using an inactive gas or an inert gas.

After performing the second purging process, a nitriding gas may be provided onto the semiconductor substrate (S50). The nitriding gas may be a reactive gas to nitride the zirconium source and/or the oxidized adsorption layer of the zirconium source. Non-limiting examples of the nitriding gas may include ammonia (NH3), nitrous oxide (N2O), nitric oxide (NO) and the like. By nitriding the oxidized adsorption layer of the zirconium source, a zirconium carbo-oxynitride layer having zirconium, carbon, oxygen and nitrogen may be formed on the semiconductor substrate. The zirconium carbo-oxynitride layer may include, for example, carbon which may be mainly originated from organic ligands of the zirconium source.

In some embodiments, the providing of the nitriding gas may be performed using, for example, a nitriding gas activated by plasma. As a result, plasma nitriding may be performed. Plasma may be provided after or while the nitriding gas is provided. Plasma may activate reaction of the nitriding gas and the partially or fully oxidized zirconium source, so the oxidized zirconium source and the nitriding gas may be well combined and a zirconium carbo-oxynitride layer having an improved structural stability may be obtained.

A third purging process may be performed on the chamber having the semiconductor substrate (S60). During the third purging process, a non-reacted portion of the nitriding gas may be removed from the semiconductor substrate and the chamber. The third purging process may also be performed using an inactive gas or an inert gas.

The above steps from S10to S60may be repeatedly performed to obtain a predetermined thickness of the zirconium carbo-oxynitride layer. The steps from S10to S60may be repeated in a cycle. A layer obtained by performing a single cycle may have a very thin thickness like an atomic layer, so a dielectric layer may be obtained by repeating the cycle, for example, several ten times or several hundred times, based upon the thickness and properties of the dielectric layer or a need of a device. Further, characteristics (e.g. a dielectric constant, a temperature of crystallization or a leakage current) of the dielectric layer may be changed in accordance with, for example, contents of carbon, oxygen and/or nitrogen, and thus types, amounts or feeding time of an oxidizing gas and/or a nitriding gas, a pressure level and the like may be properly adjusted.

In some example embodiments, all cycles may be performed using the same conditions of process, e.g. a type or a feed amount of the oxidizing gas, a type or a feed amount of the nitriding gas, pressure levels, temperature, etc. In other embodiments, the conditions of process may be changed as the cycles are repeated. By changing the conditions of process of the cycles, the zirconium carbo-oxynitride layer including a plurality of sub-layers of different components may be obtained. Such zirconium carbo-oxynitride layer having different sub-layers may have a higher temperature of crystallization as compared with that of a zirconium carbo-oxynitride layer having uniform sub-layers. Therefore, the zirconium carbo-oxynitride layer having different sub-layers may reduce the generation of leakage current.

For example, a first layer of zirconium carbo-oxynitride may be formed on the semiconductor substrate by performing a first cycle, and then a second layer of zirconium carbo-oxynitride may be formed on the first layer by performing a second cycle. In some embodiments, the second layer may be formed by using, for example, types or amounts of an oxidizing gas and/or a nitriding gas, and/or a pressure level the same as or different from those used in the first cycle. The second layer may have contents of oxygen, carbon and/or nitrogen the same as or different from those of the first layer. Further, a third layer of zirconium carbo-oxynitride may be formed on the second layer by performing a third cycle. The third layer may be formed by using, for example, types or amounts of reactive gases, and/or a pressure level the same as or different from those used in the first cycle or the second cycle. The third layer may have, for example, contents of oxygen, carbon and/or nitrogen the same as or different from those of the first layer or the second layer. The first cycle, the second cycle and the third cycle may be a single cycle of steps from S10to S60, or at least two or more cycles of steps from S10to S60.

The zirconium carbo-oxynitride layer may have a high temperature of crystallization relative to a zirconium oxide layer.FIGS. 3A and 3Bare graphs illustrating variations of crystalline structures in zirconium oxide and zirconium oxynitride, each being annealed at several different temperatures for about one minute, which are disclosed in the related art “IEEE Transactions on electron devices, Vol. 50, No. 2, p. 333, 2003, the disclosure of which is hereby incorporated by reference herein in it's entirety.” Referring toFIGS. 3A and 3B, zirconium oxide is crystallized as being annealed at about 400° C., whereas zirconium oxynitride is not crystallized at about 600° C. When the content of nitrogen in zirconium oxynitride is about 5%, zirconium oxynitride may not be crystallized up to about 700° C. Like zirconium oxynitride, zirconium carbo-oxynitride may also have a temperature of crystallization higher than that of zirconium oxide. Thus, a dielectric layer having zirconium carbo-oxynitride may not be readily crystallized through a subsequent thermal process or an annealing process to reduce or suppress generation of leakage current through a crystallized portion.

FIGS. 4 through 6are diagrams illustrating exemplary sequences of providing reactive gases in a method of forming a zirconium carbo-oxynitride layer through an ALD process.

FIGS. 4 and 5illustrate different sequences of providing the oxidizing gas and the nitriding gas. Referring toFIG. 4, a first zirconium carbo-oxynitride layer may be formed by, for example, sequentially and repeatedly providing a zirconium source (e.g. TEMAZ), a first purging gas (e.g. Ar), an oxidizing gas (e.g. O2), a second purging gas (e.g. Ar), a nitriding gas (e.g. NH3) and a third purging gas (e.g. Ar). After or while the nitriding gas is provided, plasma may also be provided. Referring toFIG. 5, a second zirconium carbo-oxynitride layer may be formed by, for example, sequentially and repeatedly providing a zirconium source (e.g. TEMAZ), a first purging gas (e.g. Ar), a nitriding gas (e.g. NH3), a second purging gas (e.g. Ar), an oxidizing gas (e.g. O2), a third purging gas (e.g. Ar). After or while the nitriding gas is provided, plasma may also be provided.

Referring toFIGS. 4 and 5, process conditions are the same as each other except for a sequence providing the oxidizing gas and the nitriding gas. When the providing of the nitriding gas is done prior to providing an oxidizing gas as illustrated inFIG. 5, the zirconium source may be primarily reacted with the nitriding gas before being oxidized. When a nitride layer of the zirconium source is firstly formed, the nitride layer may not be readily oxidized by the oxidizing agent. Thus, the second zirconium carbo-oxynitride layer may have a content of nitrogen greater than that of the first zirconium carbo-oxynitride layer. Additionally, the first zirconium carbo-oxynitride layer may have a content of carbon smaller than that of the second zirconium carbo-oxynitride layer, because a carbon component or an organic ligand may be more readily exhausted or removed by the oxidizing agent.

FIG. 7is a graph illustrating a leakage current density (A/cell) vs. applied voltage (V) measured from capacitors having zirconium carbo-oxynitride layers formed by the methods ofFIGS. 4 and 5. InFIG. 7, the solid line is a result measured from the first zirconium carbo-oxynitride layer formed using the sequence illustrated inFIG. 4, and the dotted line is a result measured from the second zirconium carbo-oxynitride layer formed using the sequence illustrated inFIG. 5. Further, the first zirconium carbo-oxynitride layer was measured to have an equivalent oxide thickness (EOT) of about 7.1 Å and a dielectric constant of about 30.76, and the second zirconium carbo-oxynitride layer was measured to have an EOT of about 9.3 Å a dielectric constant of about 21.56.

Referring toFIG. 7, it may be noted that the first zirconium carbo-oxynitride layer having a smaller EOT shows better leakage current characteristics than those of the second zirconium carbo-oxynitride layer having a larger EOT. For the first zirconium carbo-oxynitride layer, a leakage current density of about 1 fA/cell (femto ampere/cell) was measured when a voltage of about −1.2V/1.3V was applied. For the second zirconium carbo-oxynitride layer, a leakage current density of about 1 fA/cell (femto ampere/cell) was measured when a voltage of about −0.6V/0.4V was applied. Therefore, it may be noted that providing the oxidizing gas prior to the nitriding gas may significantly improve the electrical characteristics of the zirconium carbo-oxynitride layer, e.g. a small leakage current and a high dielectric constant per thickness, as compared with those of providing the nitriding gas prior to the oxidizing gas.

A difference between the process ofFIG. 4and the process ofFIG. 5is an order of providing the oxidizing gas and the nitriding gas. Due to such difference, the contents of nitrogen, carbon and oxygen contained in the first and the second zirconium carbo-oxynitride layers may be different from each other. The first zirconium carbo-oxynitride layer formed by the process ofFIG. 4may have relatively a larger content of zirconium oxide and smaller contents of carbon and nitrogen than those of the second zirconium carbo-oxynitride layer. Thus, it may be noted that a zirconium carbo-oxynitride layer having smaller contents of carbon and nitrogen may exhibit improved electrical characteristics.

Owing to addition of carbon and nitrogen, the zirconium carbo-oxynitride layer as a dielectric layer may have a high temperature of crystallization. However, the amounts of carbon and nitrogen contained in the zirconium carbo-oxynitride layer may be limited to improve a dielectric constant, an EOT, and/or a leakage current characteristic. By following the sequence illustrated inFIG. 4, a zirconium carbo-oxynitride layer having proper amounts of carbon and nitrogen may be obtained. Providing the oxidizing gas prior to providing the nitriding gas may reduce amounts of carbon and nitrogen included in the zirconium carbo-oxynitride layer (ZrO2-x-yCxNy). Further, using plasma after providing the nitriding gas may stably combine zirconium, carbon, oxygen and nitrogen to enhance the stability of the zirconium carbo-oxynitride layer.

FIG. 6is a diagram illustrating an exemplary sequence of providing reactive gases in a method of forming a zirconium carbo-oxynitride layer through an ALD process. Referring toFIG. 6, feed times (or feed amounts) of the oxidizing gas and/or the nitriding gas may be changed while a plurality of cycles are performed. A zirconium carbo-oxynitride layer obtained after performing such a plurality of cycles may have different compositions and crystalline properties of a plurality of atomic layers. Each atomic layer of the zirconium carbo-oxynitride layer (ZrO2-x-yCxNy) may have a different ratio of oxygen (2-x-y), carbon (x) and nitrogen (y). Thus, the zirconium carbo-oxynitride layer having such a plurality of the atomic layers may not be readily crystallized through an entire layer, so a zirconium carbo-oxynitride layer having very few or no paths of leakage current may be obtained.

The zirconium carbo-oxynitride layer may have a chemical formula of, for example, ZrO2-x-yCxNyin which x and y satisfy 0<x<2, 0<y<2 and 0<x+y<2. In example embodiments, the zirconium carbo-oxynitride layer may include a plurality of atomic layers or sub-layers of zirconium carbo-oxynitride having a chemical formula of ZrO2-x-yCxNyin which x and y satisfy 0<x<2, 0<y<2 and 0<x+y<2. At least two of the atomic layers may have different values of x and/or y from each other. In other example embodiments, the plurality of atomic layers may have a repeating unit of at least two atomic layers which have different values of x and/or y.

For example, as illustrated inFIG. 6, a plurality of cycles may be basically performed by providing a zirconium source (e.g. TEMAZ) into a chamber, purging the chamber (e.g. using Ar), providing an oxidizing gas (e.g. O2) into the chamber, purging the chamber (e.g. using Ar), providing a nitriding gas (e.g. NH3) and purging the chamber (e.g. using Ar). A second cycle may be carried out using, for example, different types, amounts or feed times of an oxidizing gas and/or a nitriding gas, and/or a different pressure level from those of a first cycle. A third cycle may also be performed using, for example, types, amounts or feed times of an oxidizing gas and/or a nitriding gas, and/or a pressure level different from those of the first cycle and/or the second cycle. Each atomic layer of the zirconium carbo-oxynitride layer (ZrO2-x-yCxNy) thus obtained may have a different ratio of oxygen (2-x-y), carbon (x) and nitrogen (y). The ratio of oxygen, carbon and nitrogen may vary with respect to all atomic layers, or may vary in groups of cycles.

In some example embodiments, at least two or more cycles may use, for example, different types, feed amounts and/or pressure levels of the oxidizing gas and/or the nitriding gas. In other example embodiments, the cycles are divided into at least two groups, and the at least two groups of cycles may use, for example, different types, feed amounts and/or pressure levels of the oxidizing gas and/or the nitriding gas.

The zirconium carbo-oxynitride layer having different amounts of oxygen, carbon and/or nitrogen in a plurality of atomic layers may not be readily crystallized in all atomic layers, although crystallization may occur in a single atomic layer of the zirconium carbo-oxynitride layer. Thus, growth of crystal with a large size may be suppressed, and generation of a leakage current through a crystallized portion may be reduced.

In example embodiments, the sequence ofFIG. 4and the sequence ofFIG. 5may be employed together in forming a zirconium carbo-oxynitride layer having a plurality of atomic layers. According to the type of a device, various dielectric layers having a higher dielectric constant or a lower dielectric constant may be provided. For example, a dielectric layer of a capacitor may have a dielectric constant different from that of a transistor in a circuit of a device. At least one or any combinations of the sequences ofFIGS. 4 through 6may be properly adapted, or other metals (e.g. hafnium, titanium, tantalum, etc.) instead of zirconium may be employed to form various dielectric layers.

Methods of Manufacturing a Semiconductor Device

FIGS. 8 through 15are cross-sectional views illustrating a method of manufacturing a DRAM device according to example embodiments.

Referring toFIG. 8, an isolation layer105may be formed on a semiconductor substrate100. A gate electrode structure including a gate dielectric layer, a gate conductive layer110, a gate mask115and a gate spacer120may formed on the semiconductor substrate100. The gate dielectric layer may be formed by using the methods of forming a zirconium carbo-oxynitride layer according to example embodiments. Impurity regions125may be formed at the semiconductor substrate100adjacent to the gate electrode structure. A first insulating interlayer130may be formed on the semiconductor substrate to cover the gate electrode structure. After forming a first contact hole through the first insulating interlayer130to expose the impurity regions125, a first contact plug135may be formed in the first contact hole.

A second insulating interlayer140may be formed on the first contact plug135and the first insulating interlayer130, and then a bit line145may be formed on the second insulating interlayer140. A bit line contact may be formed through the second insulating interlayer140to connect the bit line145to the first contact plug135. A third insulating interlayer150may be formed on the second insulating interlayer140to cover the bit line145. After forming a second contact hole through the second and the third insulating interlayers140and150to expose the first contact plug135, a second contact plug155may be formed in the second contact hole.

Referring toFIG. 9, an etch stop layer160may be formed on the third insulating interlayer150and the second contact plug155. The etch stop layer160may be formed by, for example, performing a CVD process using silicon nitride. A mold layer170may be formed on the etch stop layer160. The mold layer170may be formed to have a predetermined thickness based upon, for example, the surface area of a capacitor. The mold layer170may be formed to have a thickness of, for example, about 10,000 Å to about 20,000 Å. The mold layer170may be formed to have a single layer or a plurality of sub-layers which may have different etch rates. A plurality of holes175for a capacitor electrode may be formed in the mold layer170by performing, for example, a photo-lithography process. The plurality of holes175for the capacitor electrode may be formed to expose the second contact plug155by removing a portion of the etch stop layer160.

Referring toFIG. 10, a lower electrode layer180may be formed on the mold layer170having the plurality of holes175. The lower electrode layer180may be formed using a conductive material, e.g. titanium nitride (TiN), titanium (Ti), tantalum nitride (TaN), platinum (Pt), etc. The lower electrode layer180may be contacted with the second contact plug155. The lower electrode layer180may be supported by the etch stop layer160having a sufficient thickness after the mold layer170is removed in a subsequent process.

Referring toFIG. 11, a buffer layer185may be formed on the lower electrode170to fill the holes175. The buffer layer185may be formed using an insulation material substantially the same as or different from that of the mold layer170. When the buffer layer185and the mold layer170are formed using the same material, the buffer layer185and the mold layer170may be simply removed by the same removal process after forming a lower electrode, but in such a case the lower electrode may be readily fallen down. Forming the buffer layer185and the mold layer170using different materials may reduce generation of a defect. For example, the buffer layer185may be formed using a photosensitive material which may be different from an insulation material of the mold layer170.

Referring toFIG. 12, upper portions of the buffer layer185, the mold layer170and the lower electrode layer180may be removed by, for example, an etch back process to form a lower electrode182which is isolated by the mold layer170. A top portion of the lower electrode182may be formed to have a round shape by performing, for example, a wet etching process on the mold layer170and the top portion of the lower electrode180. When the top portion of the lower electrode182is sharp, a dielectric layer of a capacitor may be broken or a leakage current from the top portion of the lower electrode182may be generated.

Referring toFIG. 13, the buffer layer185and the mold layer170may be removed from the semiconductor substrate100. For example, the buffer layer185and the mold layer170may be removed by a lift-off process using a limulus amebocyte lysate (LAL) solution which may include deionized water, ammonium hydrofluoride and hydrofluoric acid. Removing the buffer layer185and the mold layer170may be carefully performed such that adjacent lower electrodes182may not be contacted with each other or fallen down. Moreover, an additional structure for supporting the lower electrode182may be formed such that adjacent lower electrodes182may not be contacted with each other or fallen down. A supporting structure, e.g. having a ladder shape or a ring shape, may be formed around the lower electrode182.

Referring toFIG. 14, a dielectric layer190may be formed on the lower electrode180. The dielectric layer190may be formed by the above-mentioned methods of forming a zirconium carbo-oxynitride layer according to example embodiments. For example, the semiconductor substrate on which the lower electrode182and other structure are formed, are loaded in a reaction chamber for an ALD process. A zirconium source (e.g. TEMAZ) may be provided into the chamber to form a chemical adsorption layer of the zirconium source on the lower electrode182.

After purging the chamber using an inactive gas (e.g. Ar, He or N2) to remove a non-adsorbed portion of the zirconium source, an oxidizing gas (e.g. O2, O3or H2O) may be provided into the chamber to oxidize the chemical adsorption layer of the zirconium source. As a result, an oxidized organic zirconium layer may be formed on the lower electrode182. While the zirconium source is reacted with the oxidizing gas, an organic component (e.g. an alkylamino ligand) may be partially removed from the zirconium source. Thus, the oxidized adsorption layer of the zirconium source may have a reduced amount of carbon and nitrogen relative to the zirconium source. The oxidizing gas may partially take part in the reaction with the zirconium source adsorbed onto the lower electrode182, and a portion of the oxidizing gas may remain with a non-reacted state. The rate of a chemical reaction between the zirconium source and the oxidizing gas may depend on, for example, the pressure and/or the temperature, and the reaction degree may also vary depending on an oxidizing ability of the oxidizing gas. Thus, for example, the pressure, the temperature and/or a type of the oxidizing gas may be properly adjusted such that the dielectric layer190may be formed to have predetermined amounts of carbon and nitrogen.

A purging gas (e.g. Ar, He or N2) may be provided into the chamber to remove any remaining oxidizing gas from the chamber. After purging the chamber, a nitriding gas may be provided into the chamber. Examples of the nitriding gas may include but are not limited to NO, NO2, NH3, etc. While the nitriding gas is provided, plasma may also be provided into the chamber. The oxidized adsorption layer of the zirconium source may be nitrided by, for example, the nitriding gas and plasma, and binding forces between zirconium, oxygen, carbon and nitrogen may increase to form a zirconium carbo-oxynitride layer having an improved stability. When the amount of nitrogen included in the zirconium carbo-oxynitride layer is excessive, electrical characteristics, e.g. a dielectric constant, an EOT or a leakage current, may be deteriorated. Thus, the providing amount of the nitriding gas may be limited. After providing the nitriding gas, a purging gas may be provided into the chamber to remove a non-reacted portion of the nitriding gas. The zirconium carbo-oxynitride layer thus formed may have a formula of, for example, ZrO2-x-yCxNy. A basic atomic layer may be formed on the lower electrode layer182by performing one cycle of ALD. The dielectric layer190may be formed to have a predetermined thickness by repeating a plurality of the cycles.

In some example embodiments, all cycles may be performed using the same conditions of process. In other example embodiments, the conditions of process may be changed as the cycles are repeated. By changing the conditions of process, e.g. a type or a feed amount of the oxidizing gas, a type or a feed amount of the nitriding gas, pressure levels, temperature, etc, the zirconium carbo-oxynitride layer which includes a plurality of sub-layers of different amounts of carbon, oxygen and nitrogen may be obtained. In still other example embodiments, the zirconium carbo-oxynitride layer may be prepared by repeatedly forming the plurality of sub-layers of different components.

For example, a first layer may be formed in a first cycle to include a relatively large amount of carbon by reducing a feed amount of the oxidizing gas and/or a pressure level, and then a second layer may be formed in a second cycle to include a relatively small amount of carbon and a relatively large amount of oxygen by raising a feed amount of the oxidizing gas and/or a pressure level or using a relatively strong oxidizing gas. By repeatedly performing a cycle group including the first cycle and the second cycle, a zirconium carbo-oxynitride layer, in which the first layer and the second layer are alternately repeated, may be obtained. In this manner, a zirconium carbo-oxynitride layer having different compositions and crystalline structures in a plurality of sub-layers may be obtained.

When a zirconium carbo-oxynitride layer has a homogenous composition and uniform crystalline properties in all sub-layers, all the sub-layers of the zirconium carbo-oxynitride layer may be crystallized at almost 100% under a specific condition. When a zirconium carbo-oxynitride layer includes sub-layers having different compositions and crystalline properties, all the sub-layers of the zirconium carbo-oxynitride layer may not be uniformly crystallized up to about 100%, and some of the sub-layers may act as an inhibition layer of crystallization to suppress generation of a leakage current through a crystallized portion.

The dielectric layer190may include a plurality of atomic layers of zirconium carbo-oxynitride having a chemical formula of, for example, ZrO2-x-yCxNy. In some embodiments, at least two of the atomic layers may have different values of x and/or y from each other. In other embodiments, the plurality of atomic layers may have a repeating unit of at least two atomic layers which have different values of x and/or y.

Referring toFIG. 15, an upper electrode195may be formed on the dielectric layer190. The upper electrode195may be formed using a conductive material, e.g. TiN, Ti, TaN, Pt, etc. In addition, an insulating interlayer and a metal wiring may be formed on or over the upper electrode. As a result, a high performance dynamic random access memory (DRAM) device having reduced defect or leakage current may be obtained.

FIGS. 16 through 19are cross-sectional views illustrating a method of manufacturing a capacitor of a logic device according to example embodiments.

Referring toFIG. 16, a lower wiring210may be formed on a semiconductor substrate200. The lower wiring210may be adapted to apply power to a device. The lower wiring210may be formed using a conductive material, e.g. a metal or polysilicon doped with impurities. A first insulating interlayer220may be formed on the semiconductor substrate200to cover the wiring210. A lower contact hole may be formed in the first insulating interlayer220to expose the wiring210, and then a lower contact plug230may be formed in the lower contact hole. The lower contact plug230may be formed, for example, using copper or tungsten.

Referring toFIG. 17, a lower electrode layer240of a capacitor may be formed on the lower contact plug230. A material of the lower electrode layer240may be, for example, TiN, Ti, TaN, Pt, etc. A dielectric layer250of a capacitor may be formed on the lower electrode240. The dielectric layer250may be formed by the above-mentioned methods of forming a zirconium carbo-oxynitride layer according to example embodiments. For example, the dielectric layer250may be formed by the process for forming the dielectric layer190as illustrated with reference toFIG. 14.

An upper electrode layer260may be formed on the dielectric layer250. The upper electrode layer260may be formed using a conductive material, e.g. TiN, Ti, TaN, Pt, etc. A dummy upper electrode270may be formed on the upper electrode layer260. The dummy upper electrode270may protect an upper electrode during a subsequent etching process, and may provide a structure of readily connecting the upper electrode to an upper wiring.

Referring toFIG. 18, the upper electrode layer260, the dielectric layer and the lower electrode layer240may be sequentially patterned using the dummy upper electrode270to form a lower electrode242, a dielectric layer pattern252and an upper electrode262on the lower contact plug230.

Referring toFIG. 19, a second insulating interlayer225may be formed on the first insulating interlayer220to cover the dummy upper electrode270. A material of the second insulating interlayer225may be the same as or different from that of the first insulating interlayer220. An upper contact hole may be formed in the second insulating interlayer225to expose the dummy upper electrode270, and then an upper contact plug280may be formed in the upper contact hole. The upper contact plug280may make contact with the dummy upper electrode270. An upper wiring290may be formed on the upper contact plug280.

As mentioned above, a capacitor having a dielectric layer of zirconium carbo-oxynitride may be suitably employed in a logic device to reduce a leakage current through the dielectric layer.

FIGS. 20 through 23are cross-sectional views illustrating a method of manufacturing a decoupling capacitor of a logic device according to example embodiments.

Referring toFIG. 20, a ground line305may be formed in or through a semiconductor substrate300. First contact pads310,315may be formed on the semiconductor substrate300. The first contact pads310,315may be connected with the ground line305or a power supply line. The first contact pads310,315may be formed using a metal. A first insulating interlayer320may be formed on the semiconductor substrate300to cover the first contact pads310,315. The first insulating interlayer320may be formed using an insulation material, e.g. borophosphosilicate glass (BPSG), high density plasma chemical vapor deposition (HDP-CVD) oxide, etc. First contact holes may be formed in the first insulating interlayer320to expose the first contact pads310,315, and then first contact plugs330,335may be formed in the first contact holes. The first contact plugs330,335may be formed using a metal, e.g. copper (Cu), tungsten (W), etc.

Referring toFIG. 21, second contact pads340,345, a second insulating interlayer350and second contact plugs360,365may be formed on the first insulating interlayer320. Formation of the second contact pads340,345, the second insulating interlayer350and the second contact plugs360,365may be the same as or similar to the formation of the first contact pads310,315, the first insulating interlayer320and the first contact plugs330,335.

Referring toFIG. 22, a lower electrode370of a capacitor may be formed on the second contact plug360being electrically connected with the ground line305. The lower electrode370may be formed using a conductive material, e.g. TiN, Ti, TaN, Pt, etc.

A dielectric layer380of a capacitor may be formed on the lower electrode370. The dielectric layer380may be formed by the above-mentioned methods of forming a zirconium carbo-oxynitride layer according to example embodiments. For example, the dielectric layer380may be formed by the process for forming the dielectric layer190as illustrated with reference toFIG. 14.

An upper electrode390may be formed on the dielectric layer380. The upper electrode390may be formed using a conductive material, e.g. TiN, Ti, TaN, Pt, etc. One portion of the upper electrode390may be formed on the dielectric layer, and another portion of the upper electrode390may be connected to the second contact plug365which may be electrically connected to the power supply line.

Referring toFIG. 23, a passivation layer395may be formed on the upper electrode390. As a result, a decoupling capacitor which may have high capacitance to improve operational speed of a logic device may be manufactured.

FIGS. 24 through 28are cross-sectional views illustrating a method of manufacturing a flash memory device according to example embodiments.

Referring toFIG. 24, a tunnel oxide layer410, a floating gate electrode layer420and a hard mask layer430may be sequentially formed on a substrate400. The substrate400may be a semiconductor substrate, e.g. a silicon wafer or a silicon on insulator (SOI) substrate.

The tunnel oxide layer410may be formed by, for example, a thermal oxidation process to have a thickness of about 50 Å to about 100 Å. The tunnel oxide layer410having high durability and uniformity may improve operational stability of reading or writing in a device. The tunnel oxide layer410having such properties may be formed using, for example, a radical oxidation method.

The floating gate electrode layer420may be formed by, for example, a CVD process using a conductive material, e.g. polysilicon or a metal. The floating gate electrode layer420may be formed to have a thickness of, for example, about 500 Å to about 1,500 Å. The floating gate electrode layer420may be a single layer formed by a single deposition, or the floating gate electrode layer420may be a multi-layer having at least two layers formed by a stepwise deposition in which a first layer may be formed with a relatively thin thickness (e.g. about 300 Å) and a second layer or an additional layer may be formed on the first layer. The floating gate electrode layer420having a multi-layer may improve characteristics of a device.

The hard mask layer430may be a single layer or a multi-layer. For example, the hard mask layer430may be obtained by forming a lower layer of oxide or nitride on the floating gate electrode layer420, forming an organic layer on the lower layer, and then forming an anti-reflective layer of nitride on the organic layer.

Referring toFIG. 25, the hard mask layer430, the floating gate electrode layer420and the tunnel oxide layer410may be sequentially patterned by a photolithography process. For example, the hard mask layer430may be etched using, for example, a photoresist pattern as a mask, and then the floating gate electrode layer420and the tunnel oxide layer410may be etched using a hard mask layer pattern432as an etching mask to form a floating gate electrode422and a tunnel oxide layer pattern412on the substrate400. By patterning the hard mask layer430, the floating gate electrode layer420and the tunnel oxide layer410, portions of the substrate400may be exposed. An isolation layer may be formed at the exposed portions of the substrate400. The distance between the floating gate electrodes422formed in a memory cell region of the substrate400may be relatively narrow, and the distance between the floating gate electrodes422formed in a high voltage transistor region of the substrate400may be relatively wide.

Referring toFIG. 26, a trench hole may be formed at the exposed portions of the substrate400using, for example, a floating gate electrode structure as a mask. The trench hole may be filled with an insulation material, and thus the trench hole may have a slope relative to the substrate400to reduce a concentration of stress to a channel of the device. The stress may be generated from the difference of the insulation material and the material of the substrate400. An isolation layer440may be formed using, for example, a spin-on glass (SOG) material having polysilazane or an undoped silicate glass (USG) to reduce generation of a void.

Referring toFIG. 27, an upper portion of the isolation layer440and the hard mask layer pattern432may be removed. A dielectric layer450may be formed on the floating gate electrode422and the isolation layer440. The dielectric layer450may be formed using, for example, a high dielectric material to raise a coupling ratio. The dielectric layer450may be formed to have a thickness of e.g. about 100 Å to about 200 Å. For example, the dielectric layer450may be formed by the above-mentioned methods of forming a zirconium carbo-oxynitride layer according to example embodiments. For example, the dielectric layer450may be formed by the process for forming the dielectric layer190as illustrated with reference toFIG. 14.

A control gate electrode460may be formed on the dielectric layer450in the memory cell region. In the high voltage transistor region, the dielectric layer450may be removed from the floating gate electrode422and a control gate electrode465may be formed on the floating gate electrode422, and thus a metal oxide semiconductor (MOS) transistor having two gate layers may be obtained.

Referring toFIG. 28, an insulating interlayer470may be formed on the control gate electrode460,465. The insulating interlayer470may be formed to have a single layer or a multi-layer having at least two layers. The insulating interlayer470may be formed using an insulation material, e.g. an HDP-CVD oxide. As the integration degree of a device increases, a general CVD process may generate large voids while filling a hole, whereas an HDP-CVD process may reduce generation of a void because a fine chemical etching and a deposition may occur simultaneously. For example, the insulating interlayer470may be formed by firstly depositing an HDP-CVD oxide (e.g. to a thickness of about 2,000 Å), slightly wet-etching the deposited layer, and then secondly depositing an HDP-CVD oxide (e.g. to a thickness of about 6,000 Å or more).

Also, a contact hole may be formed in the insulating interlayer470. A metal contact plug filling the contact hole and a metal line may be formed in or on the insulating interlayer470. The metal line may be formed using a high conducive material, e.g. aluminum, tungsten or copper, as considering characteristics of a device.

Accordingly, a flash memory device having a dielectric layer of zirconium carbo-oxynitride layer may have a reduced leakage current and a high coupling ratio.

FIGS. 29 through 31are cross-sectional views illustrating a method of manufacturing a gate structure according to example embodiments.

Referring toFIG. 29, a gate dielectric layer510may be formed on the substrate500using, for example, zirconium carbo-oxynitride. For example, the gate dielectric layer510may be formed by the above-mentioned methods of forming a zirconium carbo-oxynitride layer according to example embodiments. For example, the gate dielectric layer510may be formed by the process for forming the dielectric layer190as illustrated with reference toFIG. 14. The dielectric layer510formed by the method may have a high dielectric constant and a reduced leakage current, so the dielectric layer510may be usefully employed in a gate dielectric of a transistor.

Referring toFIG. 30, a gate electrode layer520may be formed on the gate dielectric layer510. The gate electrode layer520may be formed using a conductive material, e.g. W, TiN, Ti, TaN, Pt, polysilicon, etc.

Referring toFIG. 31, a gate mask layer may be formed on the gate electrode layer520, and then the gate mask layer may be patterned by, for example, a photolithography process to form a gate mask pattern530. For example, gate electrode layer520and the gate dielectric layer510may be patterned using the gate mask pattern530as an etching mask to form a gate electrode522and a gate dielectric layer pattern512on the substrate500. A gate spacer540may be formed on sidewalls of the gate electrode522. Accordingly, a gate structure having enhanced characteristics may be obtained.

FIGS. 32 through 34are block diagrams illustrating systems including a memory device in accordance with example embodiments.

Referring toFIG. 32, a memory controller620may be connected to a memory610. The memory610may be a DRAM device having a dielectric layer of zirconium carbo-oxynitride in a capacitor or a flash memory device having a dielectric layer of zirconium carbo-oxynitride on a floating gate electrode, both which are illustrated above. The flash memory device may be, for example, an NAND flash memory or an NOR flash memory. The memory controller620may provide the memory610with input signals to control operations of the memory610. In a memory card having the memory controller620and the memory610, for example, the memory controller620may transfer commands of a host to the memory610to control input/output data and/or may control various data of a memory based on an applied control signal. Such a structure or a relation may be employed in various digital devices using a memory as well as the simple memory card. Further, the memory controller620may include, for example, the zirconium carbo-oxynitride layer as a dielectric layer of a capacitor or a gate of a transistor in a logic circuit.

Referring toFIG. 33, a portable device700may be provided according to example embodiments. The portable device700may include the memory610as being a DRAM device having a dielectric layer of zirconium carbo-oxynitride in a capacitor or a flash memory device having a dielectric layer of zirconium carbo-oxynitride on a floating gate electrode. Examples of the portable device700may include but are not limited to an MP3 player, a video player, a portable multi-media player (PMP), etc.

The portable device700may include the memory610, the memory controller620, an encoder/decoder (EDC)710, a display element720and an interface730. Data may be input to or output from the memory610by way of the memory controller620. As illustrated in dot lines ofFIG. 33, data may be directly input from the EDC710to the memory610, or directly output from the memory610to the EDC710.

The EDC710may encode data to be stored in the memory610. For example, the EDC710may execute encoding for storing audio data and/or video data in the memory610of an MP3 player or a PMP player. Further, the EDC710may execute MPEG encoding for storing video data in the memory610. The EDC710may include multiple encoders to encoding different types of data depending on their formats. For example, the EDC710may include an MP3 encoder for encoding audio data and an MPEG encoder for encoding video data.

The EDC710may decode data being output from in the memory610. For example, the EDC710may execute MP3 decoding audio data from the memory610. Further, the EDC710may execute MPEG decoding video data from the memory610. The EDC710may include multiple decoders to encoding different types of data depending on their formats. For example, the EDC710may include an MP3 decoder for audio data and an MPEG decoder for video data.

The EDC710may include only a decoder. For example, encoded data may be input to the EDC710, and then the EDC710may decode the input data to transfer into the memory controller620or the memory610.

The EDC710may receive data to be encoded or data being encoded by way of the interface730. The interface730may comply with established standards, e.g. FireWire, USB, etc. The interface730may include a FireWire interface, an USB interface, etc. Data may be output from the memory610by way of the interface730.

The display element720may display to user data output from the memory610and decoded by the EDC710. Examples of the display element720may include but are not limited to a speaker outputting audio data, a display screen outputting video data, etc.

Referring toFIG. 34, a computing system900may be provided according to example embodiments. The computing system800may include the memory610and a central processing unit (CPU)810connected to the memory610. The memory610may be, for example, a DRAM device having a dielectric layer of zirconium carbo-oxynitride in a capacitor or a flash memory device having a dielectric layer of zirconium carbo-oxynitride on a floating gate electrode. An example of the computing system800may be a laptop computer including a flash memory as a main memory. Examples of the computing system800may include but are not limited to digital devices in which the memory610for storing data and controlling functions may be built. The memory610may be directly connected to the CPU810, or indirectly connected to the CPU810by buses. Additionally, other elements or devices may be included in the computing system800.

According to example embodiments, the zirconium carbo-oxynitride layer formed by sequentially providing the oxidizing gas and the nitriding gas to the adsorption layer of the zirconium source may have, for example, a stable structure in which zirconium, oxygen, carbon and nitrogen may be stably combined. The zirconium carbo-oxynitride layer may have a high temperature of crystallization relative to that of a zirconium oxide layer. Thus, the generation of a leakage current through a crystallized portion may be reduced or suppressed, and a device having a uniform threshold voltage along a channel length may be obtained. Further, the temperature margin of a thermal process performed after forming the zirconium carbo-oxynitride layer may be raised.

Furthermore, the zirconium carbo-oxynitride layer may have a reduced equivalent oxide thickness (EOT) and a high dielectric constant. Therefore, the dimension of a dielectric layer in a device may be reduced, and a highly-integrated device having an increased number of cells may be manufactured.

Additionally, the zirconium carbo-oxynitride layer may be formed to have sub-layers of various compositions by an ALD process using different process conditions. Such a zirconium carbo-oxynitride layer may not be readily crystallized during a thermal process due to non-uniformity of the compositions of the sub-layers, and thus the generation of a leakage current from the dielectric layer may also be reduced. Further, the dielectric constant of the dielectric layer may be simply adjusted by, for example, changing process conditions of each cycle in an ALD process. Therefore, the zirconium carbo-oxynitride layer may be properly employed in various devices or logics. The zirconium carbo-oxynitride layer may also be applied to a dielectric layer between a floating gate and a control gate in a flash memory device to improve a coupling ratio of the flash memory device.