Image sensors with embedded wells for accommodating light emitters

An image sensor with embedded wells for accommodating light emitters includes a semiconductor substrate including an array of doped sensing regions respectively corresponding to an array of photosensitive pixels of the image sensor. The semiconductor substrate forms an array of wells. Each well is aligned with a respective doped sensing region to facilitate detection, by the photosensitive pixel that includes said respective doped sensing region, of light emitted to the photosensitive pixel by a light emitter disposed in the well. The image sensor further includes, between adjacent doped sensing regions, a light-blocking barrier to reduce propagation of light to the doped sensing-region of each photosensitive pixel from wells not aligned therewith.

BACKGROUND

Deoxyribonucleic acid (DNA) is a molecule composed of two chains that coil around each other to form a double helix carrying genetic instructions for the development, functioning, growth and reproduction of all known organisms and many viruses. The two DNA strands are composed of nucleotides. Each nucleotide includes one of four nitrogen-containing nucleobases: cytosine (C), guanine (G), adenine (A) or thymine (T)). The two DNA strands are bound to each other via hydrogen bonds between the nucleobases, according to base pairing rules pairing A with T and C with G.

DNA sequencing is the process of determining the sequence (i.e., physical order) of nucleobases in DNA. DNA sequencing may be used to determine the sequence of individual genes, larger genetic regions (i.e., clusters of genes or operons), full chromosomes, or entire genomes of any organism. While DNA sequencing has historically been an extraordinarily time-consuming endeavor, the recent advent of “rapid” and less expensive DNA sequencing techniques has made DNA sequencing a key technology in many areas of biology and other sciences such as medicine, forensics, and anthropology.

Many rapid DNA sequencing techniques are based on parallel sequencing of small fragments of the full DNA to be sequenced. In DNA nanoball sequencing, the DNA to be sequenced is sheared it into small fragments, and each fragment then undergoes a replication to produce a concatenated strand of many copies of the fragment coiled into a nanoball having a diameter of about 300 nanometers. Many nanoballs may be attached to different respective locations of a flow cell, and the nanoballs may then be sequenced in parallel by flowing a series of nucleobases through the flow cell while detecting binding of the nucleobases to each nanoball.

Shotgun sequencing is a scheme that may be applied to a variety of rapid DNA sequencing techniques based on parallel sequencing of small fragments. In shotgun sequencing, the fragmentation is random. After sequencing the individual random fragments, the sequenced patterns are stitched together based on an analysis of overlaps between the patterns.

SUMMARY

In an embodiment, an image sensor with embedded wells for accommodating light emitters includes a semiconductor substrate including an array of doped sensing regions respectively corresponding to an array of photosensitive pixels of the image sensor. The semiconductor substrate forms an array of wells. Each well is aligned with a respective doped sensing region to facilitate detection, by the photosensitive pixel that includes said respective doped sensing region, of light emitted to the photosensitive pixel by a light emitter disposed in the well. The image sensor further includes, between adjacent doped sensing regions, a light-blocking barrier to reduce propagation of light to the doped sensing-region of each photosensitive pixel from wells not aligned therewith.

In an embodiment, a method for manufacturing an image sensor with embedded wells for accommodating light emitters includes (a) etching an array of wells in a first surface of a semiconductor substrate, (b) etching trenches in the first surface such that the trenches, after the step of etching the array of wells, are between adjacent wells, and (c) depositing, in the trenches, deep-trench isolation including a light-blocking material that, when the semiconductor substrate includes an array of doped sensing regions respectively aligned with the array of wells, reduces propagation of light from each well to doped sensing region not aligned with the well.

DESCRIPTION OF EXAMPLE EMBODIMENTS

FIGS.1and2illustrate one image sensor100with embedded wells for containing light emitters to be evaluated by the image sensor.FIG.1is a cross-sectional view of image sensor100in an example use scenario.FIG.2is a top view of image sensor100.FIGS.1and2further show a right-handed cartesian coordinate system190. The cross section ofFIG.1is in the xz-plane of coordinate system190, while theFIG.2view is in the xy-plane of coordinate system190.FIGS.1and2are best viewed together in the following description. Image sensor100includes an array of photosensitive pixels120, each configured to detect light emitted by a respective light emitter160disposed in a well124embedded in photosensitive pixel120. Image sensor100is thus well-suited for parallel processing of a large number of light emitters160by near-field imaging.

Each light emitter160is, for example, (a) a biological or chemical sample that may emit light (such as fluorescence in response to, e.g., ultraviolet excitation, or luminescence caused by a reaction), (b) one or more quantum dots that may fluoresce in response to, e.g., ultraviolet excitation, or (c) a light-emitting device such as a light-emitting diode. Each light emitter160may emit light in the ultraviolet, visible, and/or infrared wavelength range. In one use scenario, each light emitter160is a DNA sample or DNA fragment.

It is understood that image sensor100may include more or fewer pixels120than depicted inFIGS.1and2. Image sensor100may, for example, include thousands or millions of pixels120.

As compared to devices where samples, or other forms of light emitters, are placed on top of or above the image sensor for near-field imaging, image sensor100benefits from improved light detection efficiency. Image sensor100is further configured to reduce or eliminate crosstalk between pixels. The combination of improved light collection efficiency and suppression of crosstalk results in image sensor100having improved sensitivity for detection of light emitted by light emitters160disposed in wells124.

Image sensor100includes a semiconductor substrate110that includes an array of doped sensing regions122. Image sensor100may be a complementary metal oxide semiconductor (CMOS) image sensor, and semiconductor substrate110may be a silicon substrate. Each doped sensing region122belongs to a respective photosensitive pixel120of the pixel array of image sensor100. In one embodiment, semiconductor substrate110is generally p-doped, except for in doped sensing regions122where semiconductor substrate110is n-doped. In other embodiments, polarity may be reversed, for example with p-doped sensing regions formed in an n-type doped semiconductor substrate. Each pixel120detects light incident thereon by measuring photoinduced electric charge(s) generated in the respective doped sensing region122. Semiconductor substrate110forms an array of wells124in a light-receiving surface112thereof. Each well124is embedded in a respective pixel120and aligned with the doped sensing region122of this pixel120, i.e., the pair of co-aligned well124and doped sensing region122are at the same x- and y-locations. Each well124is configured to accommodate a light emitter160, such that the pixel120, in which well124is embedded, can detect light emitted by light emitter160. Although shown inFIG.1as being exclusively below wells124, each doped sensing region122may extend closer to light-receiving surface112and surround at least a portion of the corresponding well124.

To reduce or eliminate crosstalk between different pixels120, image sensor100further includes a grid of light-blocking barriers132. Each barrier132is embedded in semiconductor substrate110along boundaries130between adjacent pixels120, and optionally also around the perimeter of the array of pixels120as shown inFIG.2. Barriers132may serve as deep-trench isolation between adjacent pixels120. In a typical scenario, when light emitter160emits light, this light is emitted in all directions from light emitter160. Thus, for a light emitter160disposed in one well124, some of the emitted light propagates from light emitter160along a path that stays within the corresponding pixel120, and the resulting photoinduced charge are collected by doped sensing region122(see, for example, light170inFIG.1propagating from well124of pixel120(2) along the negative z-direction). However, other light may propagate from light emitter160in the direction toward an adjacent pixel120(see, for example, light170inFIG.1propagating from well124of pixel120(2) in the direction toward adjacent pixels120(1) and120(3)). Barrier132around each pixel120helps prevent at least some of this light from reaching the adjacent pixels120, where the light otherwise might result in generation of photoinduced electrical charge in doped sensing regions122of the adjacent pixels120.

In certain embodiments, barriers132are at least partly reflective. In such embodiments, barriers132redirect light incident thereon back into the pixel120from which the light originated. Depending on the incidence angle of the light onto barrier132and the exact location of doped sensing regions122(e.g., with respect to the corresponding well124), such back-reflected light may be redirected to doped sensing region122of the pixel120from which the light originated. Thus, in these embodiments, barriers132not only suppress crosstalk but also increase the light collection efficiency of pixel120. Barriers132may include a metal, for example tungsten. Alternatively, barriers132may include a dielectric material. In one example, barriers132include a dielectric material having a lower index of refraction than semiconductor substrate110, to promote total internal reflection of light incident on barriers132at a relatively shallow angle.

FIG.1shows image sensor100in an example use scenario where image sensor100is implemented in a device102for luminescence-based interrogation of a plurality of samples, each representing an example of light emitter160. In addition to image sensor100, device102includes a cover150that forms a fluidic chamber158on light-receiving surface112of image sensor100. Cover150further forms at least two ports156. Cover150may include (a) a dam152that forms an aperture over at least some of the array of pixels120and (b) a lid154that covers this aperture, such that dam152and lid154cooperate to form fluidic chamber158. In embodiments, there exist a space or gap158H between the light-receiving surface112and lid154. Dam152and lid154may be two separate pieces or one integrally formed (e.g., molded) part.FIG.2shows the footprint252of dam152of light-receiving surface112.

In the depicted example, cover150is configured such that fluidic chamber158is over the entirety of the array of pixels120. Without departing from the scope hereof, cover150may instead be configured to form a fluidic chamber158over only a subset of the array of pixels120, or cover150may be configured to form several fluidic chambers158over respective subsets of the array of pixels120. Also, although ports156are depicted inFIG.1as being formed in lid154, one or more ports156may instead be formed in dam152, without departing from the scope hereof.

In operation of device102, each sample (light emitter160) is disposed in a different well124, whereafter image sensor100monitors the response of samples to a fluid added to fluidic chamber158via at least one port156. More specifically, if exposure of a sample to the fluid in fluidic chamber158results in luminescence, e.g., chemiluminescence, this luminescence may be detected by the pixel120in which sample is located.

FIG.3shows, in a cross-sectional view similar to that ofFIG.1, a device302having sample wells on top of a light-receiving surface312of a semiconductor substrate310of an image sensor300. In addition to image sensor300, device302includes a structure340disposed on light-receiving surface312of semiconductor substrate310. Structure340forms wells344configured to accommodate respective samples360. Image sensor300includes (a) an array of photosensitive pixels320and (b) light-blocking deep-trench isolation332in semiconductor substrate310along boundaries330between adjacent pixels320. Each pixel320includes a doped sensing region322of semiconductor substrate310. Each well344is aligned with a respective doped sensing region322, i.e., each well344is at the same x- and y-locations as a respective doped sensing region322. For each well344, the pixel320aligned therewith is configured to detect light emitted from a sample360disposed in the well344located above pixel320.

Since wells344are on or above light-receiving surface312, the light-collection efficiency by a pixel320of light emitted from a sample360in a corresponding well344is limited. Even in a best-case scenario, wherein the bottom of each well344coincides with light-receiving surface312, at most half the solid angle of light emitted by a sample360in a well344reaches the corresponding pixel320. In practice, less than half the solid angle of such emitted light is detectable by pixel320. Furthermore, the light-blocking provided by deep-trench isolation332is exclusively below wells344(in the negative z-direction). As a result, some light emitted by a sample360disposed in one well344may pass above deep-trench isolation332to an adjacent pixel320, thereby producing crosstalk. Such crosstalk is particularly prominent for instances of image sensor300characterized by a small pitch328of the array of pixels320. Thus, especially instances of device302implementing a high-resolution image sensor300are affected by crosstalk.

Alternatively, device302may be provided without structure340and instead rely on samples360being attached to binding sites on light-receiving surface312. However, this alternative version of device302suffers from the same issues with low light collection efficiency and high crosstalk as discussed above for device302with structure340.

In comparison to image sensor300, embedded wells124of image sensor100enables detection of a larger solid angle of light emitted by a light emitter160(e.g., a sample) disposed in a well124. In addition, barriers132of image sensor100cooperate with embedded wells124to improve crosstalk suppression as compared to device302where samples360necessarily are above deep-trench isolation332in the z-direction.

Referring now againFIGS.1and2, image sensor100is, by virtue of its improved sensitivity, particularly advantageous in scenarios where light emitters160emit only relatively little luminescence. Image sensor100may be able to detect luminescence that is below the detection threshold for device302.

Device102may be used to perform deoxyribonucleic acid (DNA) sequencing. In one such example, DNA fragment samples are added to fluidic chamber158via a port156. Each DNA fragment sample may be a DNA nanoball having many copies of the same DNA fragments. At least some of the DNA fragment samples attach to image sensor100in wells124in such a manner that, at least ideally, each well124contains at most one DNA fragment sample (which may include many copies of the same DNA fragment). Next, a series of solutions, each containing a respective nucleobase, are added to fluidic chamber158via a port156. In this example scenario, binding of the nucleobase to a DNA fragment sample produces chemiluminescence. For each solution, image sensor100captures an image. In these images, an above-threshold level of light detected by a given pixel120indicates that the nucleobase was bound to the DNA fragment sample disposed in well124of that pixel120. Thus, the series of images captured in this scheme provides the nucleobase sequence of each DNA fragment sample. Since the chemiluminescence generated in the binding process may be weak, the DNA sequencing accuracy may significantly benefit from the improved sensitivity of image sensor100.

FIG.4depicts, in cross-sectional view, three adjacent pixels120(1),120(2), and120(3) of image sensor100to show the pixel configuration of image sensor100in further detail. Each well124has a span454in the z-dimension from the top of light-receiving surface112to a bottom426of well124. Bottom426may be flat. Bottom426of well124has width464, and the top of each well124has width465. In one embodiment, each well124has a square cross section (as depicted inFIG.2), and widths464and465are side lengths of the square cross section. In an alternative embodiment, each well124has a circular cross section, and widths464and465are diameters of the circular cross section. In another alternative embodiment, each well124has an oblong rectangular cross section, and widths464and465are diameters of the oblong rectangular cross section. Widths464and465may be identical, or width465may be greater than width464such that wells124are tapered. In one example, width464is in the range between 50 and 300 nanometers, width465is in the range between 100 and 1000 nanometers, and span454is in the range between 50 and 500 nanometers. In one scenario, light emitters160are disposed directly on bottom426or within 100 nanometers thereof. Without departing from the scope hereof, light-receiving surface112(including wells124, and the trenches accommodating barriers132) may be covered by one or more passivation layers/linings. In such embodiments, the dimensions listed here for width464, width465, and span454may applied to the wells as covered by such passivation layers/linings.

The width of each pixel120equals pitch128. Each barrier132has width468. Width468may be in the range between 100 and 500 nanometers. Pitch128is at least as large as the sum of widths465and468. Pitch128may be in the range between 0.5 and 3.0 microns. Each doped sensing region122has width462. Width462is less than pitch128. Width462may exceed width464, and width462may also exceed width465.

Each doped sensing region122has a span452in the z-dimension. Span452may be non-overlapping with span454of wells124as shown inFIG.4. Alternatively, in pixel120, doped sensing region122extends above bottom426, such that span452overlaps with span454. In one example, doped sensing region122extends into a space between well124and adjacent barriers132. Barriers132have a span456in the z-dimension, extending from the top of light-receiving surface112in the negative z-direction. Span456may be the same as span454. However, more effective cross talk suppression may be achieved when span456exceeds span454(as shown inFIG.4).

FIG.5illustrates one image sensor500with wells that are embedded in the doped sensing regions.FIG.5depicts image sensor500in a view similar to that used for image sensor100inFIG.4. Image sensor500is an embodiment of image sensor300. Image sensor500includes an array of pixels520which are embodiments of pixels120. Each pixel520includes a doped sensing region522formed in semiconductor substrate110, for example by ion implantation. Doped sensing region522is an embodiment of doped sensing region122. Each doped sensing region522is formed to extend close enough to light-receiving surface112to surround a portion of the corresponding well124. In other words, the span552of each doped sensing region522, in the z-dimension, overlaps with span454of well124.

The configuration of doped sensing region522helps further improve the efficiency of detection of light170emitted by a light emitter160disposed in a well124. In particular, light170emitted by light emitter160in a somewhat upwards direction (that is, in a direction that has a component in both the x-y dimensions and the positive z-direction) may lead to generate of photoinduced electric charge in the portion of doped sensing region522that is above bottom426of well124. Consequently, pixel520is capable of detecting more than half the solid angle of light170emitted from light emitter160.

FIG.6illustrates one image sensor600with embedded wells and a high-k passivation lining. Image sensor600is an embodiment of image sensor100.FIG.6shows image sensor600in a cross-sectional view similar to that used for image sensor100inFIG.4. In image sensor600, light-receiving surface112of semiconductor substrate110is lined with a high-k passivation lining642. High-k passivation lining642is disposed on top of light-receiving surface112, including surfaces of wells624and surfaces of the trenches in semiconductor substrate110accommodating barriers132. A passivation layer640may be disposed between semiconductor substrate110and high-k passivation lining642. In an example, each of passivation layer640and high-k passivation lining642is deposited conformal to inner surfaces of wells624.

High-k passivation lining642is a dielectric material with a dielectric constant κ, for example greater than that of passivation layer640. Passivation layer640serves to passivate the surface of semiconductor substrate110. High-k passivation642has negative charges that push photoinduced electrons, located near the surface of semiconductor substrate110, into doped sensing region122, so as to prevent recombination of such electrons at the surface of semiconductor substrate110(such as at interfaces between well624and semiconductor substrate110material). In one embodiment, passivation layer640is silicon dioxide, and the dielectric constant κ of high-k passivation lining642is greater than 3.9 (the dielectric constant of silicon dioxide). In another embodiment, passivation layer640includes silicon nitride. High-k passivation lining642is or includes, for example, aluminum oxide (Al2O3), hafnium dioxide (HfO2), zirconium dioxide (ZrO2), titanium dioxide (TiO2), or a combination thereof. In one embodiment, after depositing high-k passivation lining642, trenches are filled with a filling material to form barriers132. The filling material is, for example, a dielectric material such as silicon dioxide, or a reflective material such as metal.

Image sensor100may further include a passivation layer644covering high-k passivation lining642. Passivation layer644may be formed by deposition and be conformal to high-k passivation lining642. Passivation layer644may serve to provide a surface612for image sensor600(facing fluidic chamber158when image sensor600is implemented in device102) that is suitable for placing light emitters160thereon. Passivation layer644may include silicon dioxide and/or silicon nitride.

Image sensor600forms lined wells624. Each lined well624is a well124lined with high-k passivation lining642, and optionally also one or both of passivation layers640and644. Well624may have dimensions similar to those indicated for well124inFIG.4.

FIG.7is a more detailed view of a portion690of image sensor600near well624. High-k passivation lining642has thickness772at the top of light-receiving surface112, and thickness782at the bottom626of well624. Thicknesses772and782may be in the range between 3 and 100 nanometers. Passivation layer640has thickness770at the top of light-receiving surface112, and thickness780at the bottom626of well624. Thicknesses770and780may be in the range between 5 and 100 nanometers. Passivation layer644has thickness774at the top of light-receiving surface112, and thickness784at the bottom626of well624. Thickness784may be in the range between 1 and 200 nanometers. Thickness774may be similar to thickness784or greater.

Without departing from the scope hereof, image sensor600may implement doped sensing regions522.

FIG.8illustrates one method800for manufacturing an image sensor with embedded wells for accommodating light emitters. Method800may be used to manufacture image sensor100. Method800includes steps810and840. Step810includes steps812and814. Step812etches an array of wells in a first surface of a semiconductor substrate. Step814etches trenches in the first surface such that the trenches, after completion of step812, are between adjacent wells. Step840deposits, in the trenches formed in step814, deep-trench isolation including a light-blocking material that, when the semiconductor substrate includes an array of doped sensing regions respectively aligned with the array of wells, the light-blocking material reduces propagation of light from each well to doped sensing region not aligned with the well.

Method800may include one or both of steps820and830, performed between steps810and840. Step820deposit a passivation layer on the first surface. Step830deposits a lining of high-k dielectric material on the first surface to prevent recombination of photo-generated charge at the first surface inducing dark current and white pixels. In embodiments of method800that include both step820and step830, step830deposits the lining of high-k dielectric material on the passivation layer deposited in step820. Each of steps820and830may utilize chemical vapor deposition, plasma vapor deposition, or atomic layer deposition.

FIG.9Ashows one example of step810. In this example, step812etches wells124in light-receiving surface112of semiconductor substrate110, and step814etches trenches934in light-receiving surface112of semiconductor substrate110between adjacent wells124. Step812and/or step814may be performed before or after forming doping semiconductor substrate110to form doped sensing regions122in pixels120. Trenches934and wells124may have the same depth, or be deeper than each of wells124with respect to light-receiving surface112. In some embodiments, trenches934are less deep than wells124.

FIG.9Cshows one example of step840. In this example, trenches934are filled with light-blocking deep-trench isolation932. Deep-trench isolation932may be similar or identical to barriers132. In embodiments where the deep trench isolation is filled with metal material, e.g., tungsten or aluminum, well124may be covered by photoresist material or sacrificial oxide material before metal deposition. After metal deposition, the photoresist material or sacrificial oxide material is removed, for example by an etching process, to form an opening in each of wells124. Thereafter, oxide may be deposited into wells124to form an oxide lining layer that lines sidewalls of wells124.

Referring again toFIG.8, one embodiment of method800includes a step802of doping the semiconductor substrate to form the doped sensing regions. Step802may be performed before step810, as shown inFIG.8, or step802may be performed at a later stage in method800. In one example of step802, semiconductor substrate110is doped to form doped sensing regions122(optionally in the form of doped sensing regions522).

In one embodiment, the deep-trench isolation deposited in step840is an oxide, method800includes step830, and step840includes steps842and844. In this embodiment, the oxide may be a dielectric material having a lower index of refraction than the semiconductor substrate, such as silicon oxide to promote total internal reflection of light incident on the barrier in the trenches at a relatively shallow angle. In this embodiment, one deposition process both (a) fills the trenches with oxide to form light-blocking barriers (in step842) and (b) covers the lining of high-k dielectric material with oxide to form a second passivation layer on top of the lining of high-k dielectric material. This embodiment of step840may utilize chemical vapor deposition, plasma vapor deposition, or atomic layer deposition. In this embodiment, the trenches are narrower than the wells such that, when the deposition process has filled the trenches with the oxide, a lining of oxide has accumulated on the entire surface of the lining of high-k dielectric material. In one embodiment, the second passivation layer formed through oxide deposition may further extend across the entire surface.FIG.9Dshows one example of step844. In this example, step844covers high-k dielectric passivation lining642with an oxide material and etches the oxide to (a) reopen wells924to form wells624while (b) the remaining oxide material forms a passivation layer644. Step844may further include thinning the portion of passivation layer644located above the top of light-receiving surface912and covering deep-trench isolation932. As depicted inFIG.9D, deep-trench isolation932may extend deeper into semiconductor substrate110than bottom626of lined wells624.

In another embodiment, the deep-trench isolation deposited in step840includes a metal, such as tungsten and/or aluminum, and method800includes steps820and830. The metal may block light by reflection and/or absorption. In this embodiment, step840may include the following steps in the order listed: (1) depositing a mask material, e.g., sacrificial oxide, on the surface of the semiconductor substrate (e.g., on the high-k dielectric material deposited in step830) to fill the trenches and the wells and cover the entire light-receiving surface of the semiconductor substrate such that no metal would be deposited in the wells; (2) chemical-mechanical polishing the mask material (e.g., sacrificial oxide) for subsequent processes (e.g., lithography and etching process); (3) reopening the trenches of deposition of deep-trench isolation; (4) depositing metal in the trenches; (5) reopening the wells; and (6) depositing an oxide across the entire surface and lining inner surfaces of wells to form a second passivation layer.

Method800may, without departing from the scope hereof, further include forming control and readout circuitry on the side of the semiconductor substrate that is opposite the side of the semiconductor substrate forming wells. In one example, control and readout circuitry is formed on the side of semiconductor substrate that is opposite light-receiving surface112.

FIG.10illustrates one method1000for manufacturing a device for luminescence-based interrogation of a plurality of light emitters. Method1000may be used to manufacture device102. Method1000includes steps1010and1020. Step1010performs method800to form an image sensor having embedded wells, such as image sensor100. Step1020forms a fluidic chamber over at least some of the wells. In one example of step1020, method1000places cover150on light-receiving surface112of image sensor100such that cover150forms fluidic chamber158over at least a portion of the array of wells124.

FIG.11schematically illustrates one device1100for luminescence-based interrogation of a plurality of light emitters. Device1100is an embodiment of device102and includes image sensor100, a dam1110, and a lid1120. Dam1110is disposed on light-receiving surface112and surrounds at least a portion of the array of wells124. Dam1110forms an aperture over a portion of light-receiving surface112. Lid1120covers the aperture formed by dam1110to form a fluidic chamber similar to fluidic chamber158. In one embodiment, dam1110is positioned outside the array of wells124. In this embodiment, dam1110may have a footprint similar to footprint252indicated inFIG.2. In another embodiment, dam1110covers some of the array of wells124, and the covered wells124are not accessible from the fluidic chamber formed by dam1110and lid1120. Lid1120forms at least two ports1122. In one scenario, ports1122are connected to external equipment that supplies samples (for example DNA polymer chains) and known polymer-based chain to flow into and out of the fluidic chamber (e.g., fluidic chamber158). Without departing from the scope hereof, dam1110and lid1120may be integrally formed.

In an extension of device1100, dam1110is modified to form two or more separate apertures over light-receiving surface112. In this extension, dam1110and lid1120cooperate to form two or more separate fluidic chambers on light-receiving surface112, and lid1120may include two ports1122for each of these fluidic chambers.

FIG.12schematically illustrates another device1200for luminescence-based interrogation of a plurality of samples. Device1200is an embodiment of device102and includes image sensor100, two dams1210, and a lid1220. Dams1210are disposed on two different parts of light-receiving surface112a distance apart from each other such that a portion of the array of wells124is uncovered by dams1210. Lid1220covers the space between dams1210to form a fluidic chamber similar to fluidic chamber158. This fluidic chamber has two ports1222where the perimeter of lid1220spans over a gap between the two dams1210. In one embodiment, dams1210are positioned outside the array of wells124. In another embodiment, at least one of dams1210covers some of the array of wells124, and the covered wells124are not accessible from the fluidic chamber formed by dams1210and lid1220. Without departing from the scope hereof, dams1210and lid1220may be integrally formed.

In an extension, device1200includes three of more dams1210that cooperate with lid1220to form two or more separate fluidic chambers on light-receiving surface112.

Combinations of Features

Features described above as well as those claimed below may be combined in various ways without departing from the scope hereof. For example, it will be appreciated that aspects of one image sensor or associated method, described herein, may incorporate features or swap features of another image sensor or associated method described herein. The following examples illustrate some possible, non-limiting combinations of embodiments described above. It should be clear that many other changes and modifications may be made to the methods, products, and systems herein without departing from the spirit and scope of this invention:

(A1) One image sensor, with embedded wells for accommodating light emitters, includes a semiconductor substrate including an array of doped sensing regions respectively corresponding to an array of photosensitive pixels of the image sensor. The semiconductor substrate forms an array of wells. Each well is aligned with a respective doped sensing region to facilitate detection, by the photosensitive pixel that includes said respective doped sensing region, of light emitted to the photosensitive pixel by a light emitter disposed in the well. The image sensor further includes, between adjacent doped sensing regions, a light-blocking barrier to reduce propagation of light to the doped sensing-region of each photosensitive pixel from wells not aligned therewith.

(A2) In the image sensor denoted as (A1), the light barriers may be at least partly reflective.

(A3) In either of the image sensors denoted as (A1) and (A2), the wells may be in a light-receiving surface of the semiconductor substrate, and the light-blocking barrier may span, in the dimension orthogonal to plane of the array of doped sensing regions, at least from a top of the light-receiving surface of the semiconductor substrate to below a bottom of the wells.

(A4) In any of the image sensors denoted as (A1) through (A3), each doped sensing region may span, in dimension orthogonal to plane of the array of photosensitive pixels, at least from above to below a bottom of the wells.

(A5) In any of the image sensors denoted as (A1) through (A4), the wells may be in a light-receiving surface of the semiconductor substrate, and the image sensor may further include one or more top layers disposed on the light-receiving surface and lining the array of wells to form an array of lined wells. The one or more top layers include at least one passivation layer.

(A6) In the image sensor denoted as (A5), the light-blocking barrier may have a first span in a first dimension orthogonal to plane of the array of photosensitive pixels, and the first span may be at least from a top of the light-receiving surface to below a bottom of the lined wells.

(A7) In the image sensor denoted as (A6), each doped sensing region may have a second span in the first dimension, the second span overlapping with the first span.

(A8) In the image sensor denoted as (A7), the second span may be at least from above a bottom of the lined wells to below a bottom of the wells.

(A9) In the image sensor denoted as (A7), the second span may be exclusively below a bottom of the wells.

(A10) In any of the image sensors denoted as (A5) through (A9), the one or more top layers may include (a) a first passivation layer disposed on the light-receiving surface, (b) a high-k dielectric layer disposed on the first passivation layer, and (c) a second passivation layer disposed on the high-k dielectric layer.

(A11) In the image sensor denoted as (A10), the semiconductor substrate may form trenches between adjacent photosensitive pixels, with the first passivation layer and the high-k dielectric layer lining the trenches and with the light-blocking barrier being light-blocking deep-trench isolation disposed in the trenches on the high-k dielectric layer.

(A12) In any of the image sensors denoted as (A5) through (A11), a bottom of each lined well may be between 50 and 300 nanometers below a top of the semiconductor substrate, each lined well may have width in the range being between 50 and 1000 nanometers, and the array of photosensitive pixels may be characterized by a pitch in the range between 0.5 and 3.0 microns.

(A13) In any of the image sensors denoted as (A5) through (A12), each lined well may have a planar bottom surface.

(A14) In any of the image sensors denoted as (A1) through (A4), a bottom of each well may be between 50 and 300 nanometers below a top of the semiconductor substrate, each well may have width in the range being between 50 and 1000 nanometers, and the array of photosensitive pixels may be characterized by a pitch in the range between 0.5 and 3.0 microns.

(A15) In any of the image sensors denoted as (A14) and (A1) through (A4), each well may have a planar bottom surface.

(A16) One device for luminescence-based interrogation of a plurality of samples includes any one of the image sensors denoted as (A1) through (A16) (wherein each light emitter is a sample), and a cover disposed on side of the image sensor having the wells. The cover forms (a) a fluidic chamber over at least some of the wells, (b) an inlet port for receiving a fluid into the fluidic chamber to interact with the plurality of samples when each of the samples is disposed in a respective one of the wells accessible from the fluidic chamber, and (c) an outlet port for cooperating with the inlet port to allow flow of the fluid through the sample chamber.

(B1) One method for manufacturing an image sensor, with embedded wells for accommodating light emitters, includes (a) etching an array of wells in a first surface of a semiconductor substrate, (b) etching trenches in the first surface such that the trenches, after the step of etching the array of wells, are between adjacent wells, and (c) depositing, in the trenches, deep-trench isolation including a light-blocking material that, when the semiconductor substrate includes an array of doped sensing regions respectively aligned with the array of wells, reduces propagation of light from each well to doped sensing region not aligned with the well.

(B2) The method denoted as (B1) may further include, after the steps of etching the array of wells and the trenches and before the step of depositing the deep-trench isolation, depositing a lining of high-k dielectric material on the first surface to prevent recombination of photo-generated charge at the first surface, such that the deep-trench isolation is deposited on the lining of high-k dielectric material in the step of depositing the deep-trench isolation.

(B3) The method denoted as (B2) may further include (i) before the step of depositing the high-k dielectric material, depositing a first passivation layer on the first surface, and (ii) in the step of depositing the deep-trench isolation, (1) filling the trenches with an oxide to form light-blocking barriers and (2) covering the lining of high-k dielectric material with the oxide to form a second passivation layer, such that the lining of high-k dielectric material is deposited on the first passivation layer in the step of depositing the high-k dielectric material.

(B4) Any of the methods denoted as (B1) through (B3) may further include doping the semiconductor substrate to form the array of doped sensing regions such that each doped sensing region, after the steps of etching the array of wells and etching the trenches, extends from a maximum depth to a minimum depth below the first surface, wherein the minimum depth is less than each of the depth of the trenches below the first surface and the depth of the wells below the first surface.

(B5) Any of the methods denoted as (B1) through (B3) may further include doping the semiconductor substrate to form the array of doped sensing regions such that (I) each doped sensing region, after the steps of etching the array of wells and etching the trenches, has a first span in a first dimension orthogonal to the array of doped sensing regions, the first span being exclusively below the array of wells, and (II) the light blocking material has a second span in the first dimension, the second span extending to a top of the first surface and overlapping with the first span.

(B6) One method for manufacturing a device for luminescence-based interrogation of a plurality of light emitters includes performing any one of the methods denoted as (B1) through (B5), and forming a fluidic chamber over at least some of the wells.