Isolation circuit for use in RF amplifier bias circuit

In an RF amplifier circuit having a plurality of transistor stages with each transistor having an input terminal for receiving an RF signal, a bias circuit is provided for applying a DC bias to the input terminal of a transistor. An isolation circuit connects a DC power supply to a bias circuit whereby DC voltage from the power terminal is applied to the bias circuit and RF signal from the transistor input terminal is attenuated. The isolation circuit includes a reactive serial path which allows the flow of DC current and presents an impedance to RF current flow and a reactive shunt path to ground which can comprise a capacitor or a serial inductor/capacitor circuit. The reactive serial path can comprise an inductor or an inductor/capacitor parallel circuit.

BACKGROUND OF THE INVENTION
 This invention relates generally to RF and microwave signal amplifiers, and
 more particularly the invention relates to isolation and bias circuits for
 use in such amplifiers.
 FIG. 1 illustrates a conventional multi-stage RF amplifier including
 bipolar transistors 10, 12 which arc driven respectively by an input
 matching network 14 and an interstage matching network 16 with an output
 impedance matching network 18 at output transistor 12. FETs can be used in
 the circuit, and additional transistor stages can be provided between
 transistor 10, 12, but a two-stage amplifier is shown for simplicity. A DC
 bias voltage is coupled to the base inputs of transistors 10, 12 by bias
 circuits 20, 22 which are coupled to transistor 10, 12, respectively
 through choke coils 24, 26. DC power is connected to the bias circuits
 along with a power down signal applied to pins 28, 30 of the bias
 circuits.
 FIG. 2 is a schematic of bias circuit 20 which includes transistors 32, 34
 with power down pin 28 connected through a resistor 36 to the base of
 transistor 34 and collector transistor 32, and with the DC power pin 30
 connected to the collector of transistor 34. The emitter of transistor 32
 is grounded, while the base of transistor 32 and emitter of transistor 34
 are coupled through choke coil 24 to the base of transistor 10. The RF
 signal is connected to the base of transistor through pin 38. A capacitor
 40 connects coil 24 to ground.
 A large RF choke has a high inductance and often a high resistance value.
 Further, a large capacitance value is often not feasible, especially in
 MMIC/RFIC circuits where chip area must be minimized. Consequently, the
 choke may not provide enough insulation of the RF signal from entering the
 bias circuit and the power supply. Thus, the DC power supply path to the
 bias circuit can become an RF leakage path and an undesirable RF feedback
 loop.
 The present invention is directed to reducing the undesired RF leakage in a
 feedback loop through the DC power supply.
 SUMMARY OF THE INVENTION
 In accordance with the invention, an isolation circuit is included in the
 bias circuitry for an RF transistor stage to reduce RF signal leakage from
 the transistor in a feedback loop through the bias circuit and power
 supply. The isolation circuit allows DC current to flow into the bias
 circuit but presents an impedance to RF signals. Thus, the serial path of
 the isolation circuit can comprise an inductor or a parallel
 inductive-capacitive circuit resonating at the operating RF frequency. A
 shunt capacitor or a shunt inductive-capacitive series circuit provides a
 low impedance path to ground for RF signals. A multi-section isolation
 circuit can be used.
 The isolation circuit reduces the RF leakage and feedback, thereby
 resulting in a more stable amplifier operation against temperature and
 frequency. Further, more stable gain and linearity along with improved
 frequency response are realized over temperature with the isolation
 circuit.
 The invention and objects and features thereof will be more readily
 apparent from the following detailed description and appended claims when
 taken with the drawings.

Like elements in the several figures have the same reference numerals.
 DESCRIPTION OF ILLUSTRATED EMBODIMENT
 FIG. 3 is a modification of the circuitry of FIG. 1 in accordance with one
 embodiment of the invention. Like elements have the same reference
 numerals. In accordance with the invention, the DC power supply is applied
 to bias circuit 20 and bias circuit 22 through isolation circuits 44 and
 46 which provide impedances to RF signal flowing from transistors 10, 12
 through the bias circuitry back to the power supply. Each isolation
 circuit needs to allow DC current to flow into the bias circuit from the
 power supply. Thus, a serial path through the isolation circuit can be an
 inductor or an inductive-capacitive parallel circuit resonating at the
 operating frequency. A shunt capacitor or a shunt inductive-capacitive
 serial circuit provides a low impedance node to ground along the DC path.
 FIGS. 4A-4D are schematics illustrating several embodiments of a suitable
 isolation circuit. In FIG. 4A, inductor 50 serially connects the power
 supply (PS) to the bias circuit (BIAS) with capacitor 52 providing a shunt
 circuit for RF signals to ground.
 In FIG. 4B, two capacitors 52, 54 are provided as RF shunt paths at either
 end of inductor 50. In FIG. 4C, inductor 50 is connected in parallel with
 capacitor 56 to form a high impedance resonant circuit at the operating RF
 signal frequency and with shunt capacitor 52 again connected to circuit
 ground. A multi-section isolation circuit can be used such as the three
 section isolation circuit shown in FIG. 4D. In this circuit, series
 inductive-capacitive circuits 60, 62 provide low impedance shunt circuits
 for RF signals while parallel inductive-capacitive circuit 64 presents a
 high impedance at the resonant frequency of the RF signal.
 Use of isolation circuits in RF and microwave amplifiers in accordance with
 the invention reduces the RF signal leakage through a power supply
 feedback loop thus resulting in a more stable operation and more stable
 gain and linearity versus temperature and frequency.
 While the invention has been described with reference to specific
 embodiments, the description is illustrative of the invention and is not
 to be construed as limiting the invention. Various modifications and
 applications may occur to those skilled in the art without departing from
 the true spirit and scope of the invention as defined by the appended
 claims.