Low temperature poly-silicon TFT substrate structure and manufacture method thereof

A method for manufacturing a LTPS TFT substrate is provided. Buffer layers are respectively provided in a drive TFT area and a display TFT area and have different thicknesses, such that the thickness of the buffer layer in the drive TFT area is larger than the thickness of the buffer layer in the display TFT area so that different temperature grades are formed in a crystallization process of poly-silicon to achieve control of the grain diameters of crystals. A poly-silicon layer that is formed in the drive TFT area in the crystallization process has a large lattice dimension to increase electron mobility thereof. Fractured crystals can be formed in a poly-silicon layer of the display TFT area in the crystallization process for ensuring the uniformity of the grain boundary and increasing the uniformity of electrical current. Accordingly, the electrical property demands for different TFTs can be satisfied.

FIELD OF THE INVENTION

The present invention relates to a display technology field, and more particularly to a low temperature poly-silicon thin film transistor (TFT) substrate structure and a manufacture method thereof.

BACKGROUND OF THE INVENTION

The low temperature poly-silicon (LTPS) technology is the manufacture technology of the new generation TFT substrate. The most significant difference from the traditional amorphous silicon (a-Si) is that the response speed of the LTPS display is faster and possesses advantages of high brightness, high resolution and low electrical power consumption. The poly-silicon (poly-Si) possesses excellent electrical property, and better drive ability to the active matrix organic light emitting diode (AMOLED). Thus, the AMOLED display back plate based on the low temperature poly-silicon technology has been widely utilized at present.

The present manufacture method of the LTPS TFT substrate mainly comprises the following steps:

Step 1, as shown inFIG. 1, providing a substrate100, wherein the substrate100comprises a drive TFT area and a display TFT area, and depositing a buffer layer110on the substrate100;

Step 2, as shown inFIG. 2, depositing an amorphous silicon layer on the buffer layer110and implementing an excimer laser annealing process to the amorphous silicon layer to make the amorphous silicon layer crystallized and converted to be a poly-silicon layer130after excimer laser annealing pretreatment;

Step 3, as shown inFIG. 3, patterning the poly-silicon layer130to obtain a first poly-silicon section140in the drive TFT area and a second poly-silicon section150in the display TFT area which are alternately spaced;

Step 4, depositing a gate isolation layer160on the first poly-silicon section140, the second poly-silicon section150and the buffer layer110;

Step 5, depositing and patterning a first metal layer on the gate isolation layer160, and forming a first gate170and a second gate180respectively above the first poly-silicon section140and the second poly-silicon section150and corresponding thereto;

Step 6, depositing an interlayer insulation layer190on the gate isolation layer160, the first gate170and the second gate180, and forming a first via200and a second via200′ in the interlayer insulation layer190and the gate isolation layer160respectively above the first poly-silicon section140and the second poly-silicon section150and corresponding thereto; and

Step 7, as shown inFIG. 4, depositing and patterning a second metal layer on the interlayer insulation layer190, and respectively forming a first source/drain210in the drive TFT area and a second source/drain220in the display TFT area, and the first source/drain210contacts with the first poly-silicon section140through the first via200, and the second source/drain220contacts with the second poly-silicon section150through the second via200′.

In the above process, the excimer laser annealing (ELA) technology utilizes transient pulses of laser to irradiate on the surface of the amorphous silicon layer to be melted and recrystallized. The AMOLED driving requires a drive TFT and a display TFT. The drive TFT demands larger lattice and thus higher electron mobility is required. The display TFT needs efficient electron mobility and uniformity of the electrical current. Accordingly, the OLED element can uniformly illuminate.

However, the ELA crystallization technology according to prior art cannot achieve effective control to the uniformity of the lattices and the crystallization direction of the lattices. The distribution of crystallization condition in the entire substrate is extremely non-uniform and results in that the long distance of the display effect is not uniform.

SUMMARY OF THE INVENTION

An objective of the present invention is to provide a manufacture method of a low temperature poly-silicon TFT substrate structure, capable of controlling the crystallization process of the poly-silicon to make that the larger lattice dimension of the poly-silicon layer is formed in the drive TFT area in the crystallization process and raise the electron mobility. The fractured crystals of poly-silicon layer in the display TFT area can be obtained in the crystallization process for ensuring the uniformity of the grain boundary and raising the uniformity of the current. Accordingly, the electrical property demands for different TFTs can be satisfied to raise the light uniformity of the OLED.

Another objective of the present invention is to provide a low temperature poly-silicon TFT substrate structure, of which the lattice dimension of the poly-silicon layer in the drive TFT area is larger and higher electron mobility is provided. The uniformity of the grain boundary is well and the uniformity of the current is higher.

For realizing the aforesaid objectives, the present invention provides a manufacture method of a low temperature poly-silicon TFT substrate structure, which comprises the following steps:

Step 1, providing a substrate, wherein the substrate comprises a drive TFT area and a display TFT area, and depositing a buffer layer on the substrate, and patterning the buffer layer to make a thickness of the buffer layer in the drive TFT area be larger than a thickness of the buffer layer in the display TFT area;

Step 2, depositing an amorphous silicon layer on the buffer layer, implementing an excimer laser annealing process to the amorphous silicon layer to make the amorphous silicon layer crystallized and converted to a poly-silicon layer after an excimer laser annealing pretreatment, and patterning the poly-silicon layer to obtain a first poly-silicon section in the drive TFT area and a second poly-silicon section in the display TFT area;

Step 3, depositing a gate isolation layer on the first poly-silicon section, the second poly-silicon section and the buffer layer;

Step 4, depositing and patterning a first metal layer on the gate isolation layer to form a first gate and a second gate respectively above the first poly-silicon section and the second poly-silicon section and corresponding thereto;

Step 5, depositing an interlayer insulation layer on the gate isolation layer, the first gate and the second gate and forming a first via and a second via in the interlayer insulation layer and the gate isolation layer to be respectively above the first poly-silicon section and the second poly-silicon section and corresponding thereto; and

Step 6, depositing and patterning a second metal layer on the interlayer insulation layer to respectively form a first source/drain in the drive TFT area and a second source/drain in the display TFT area, wherein the first source/drain contacts with the first poly-silicon section through the first via, and the second source/drain contacts with the second poly-silicon section through the second via.

A lattice dimension of the first poly-silicon section is larger than a lattice dimension of the second poly-silicon section. Fractured crystals in the second poly-silicon section outnumber fractured crystals in the first poly-silicon section.

The substrate comprises a glass substrate, and a material of the buffer layer comprises one of silicon oxide, silicon nitride, and a combination thereof.

The interlayer insulation layer is formed of a material comprising one of silicon oxide, silicon nitride, and a combination thereof.

A thickness difference between the buffer layers of the drive TFT area and the display TFT area is larger than 500 Å.

The present invention further provides a low temperature poly-silicon TFT substrate structure, which comprises a drive TFT area and a display TFT area, wherein the drive TFT area comprises a substrate, a buffer layer on the substrate, a first poly-silicon section on the buffer layer, a gate isolation layer on the buffer layer and the first poly-silicon section, a first gate on the gate isolation layer and above the first poly-silicon section and corresponding thereto, an interlayer insulation layer on the gate isolation layer and the first gate and a first source/drain on the interlayer insulation layer;

wherein the display TFT area comprises a substrate, a buffer layer on the substrate, a second poly-silicon section on the buffer layer, a gate isolation layer on the buffer layer and the second poly-silicon section, a second gate on the gate isolation layer and above the second poly-silicon section and corresponding thereto, an interlayer insulation layer on the gate isolation layer and the second gate and a second source/drain on the interlayer insulation layer; and

wherein a thickness of the buffer layer in the drive TFT area is larger than a thickness of the buffer layer in the display TFT area.

A lattice dimension of the first poly-silicon section is larger than a lattice dimension of the second poly-silicon section. Fractured crystals in the second poly-silicon section outnumber fractured crystals in the first poly-silicon section.

The substrate comprises a glass substrate, and a material of the buffer layer comprises one of silicon nitride, silicon oxide, and a combination thereof. A material of the interlayer insulation layer comprises one of silicon oxide, silicon nitride, and a combination thereof.

A first via is formed in the interlayer insulation layer and the gate isolation layer in the drive TFT area and above the first poly-silicon section and corresponding thereto, and the first source/drain contacts with the first poly-silicon section through the first via; and

a second via is formed in the interlayer insulation layer and the gate isolation layer in the display TFT area and above the second poly-silicon section and corresponding thereto, and the second source/drain contacts with the second poly-silicon section through the second via.

A thickness difference between the buffer layers of the drive TFT area and the display TFT area is larger than 500 Å.

The present invention further provides a low temperature poly-silicon TFT substrate structure, which comprises a drive TFT area and a display TFT area, wherein the drive TFT area comprises a substrate, a buffer layer on the substrate, a first poly-silicon section on the buffer layer, a gate isolation layer on the buffer layer and the first poly-silicon section, a first gate on the gate isolation layer and above the first poly-silicon section and corresponding thereto, an interlayer insulation layer on the gate isolation layer and the first gate and a first source/drain on the interlayer insulation layer;

wherein the display TFT area comprises a substrate, a buffer layer on the substrate, a second poly-silicon section on the buffer layer, a gate isolation layer on the buffer layer and the second poly-silicon section, a second gate on the gate isolation layer and above the second poly-silicon section and corresponding thereto, an interlayer insulation layer on the gate isolation layer and the second gate and a second source/drain on the interlayer insulation layer;

wherein a thickness of the buffer layer in the drive TFT area is larger than a thickness of the buffer layer in the display TFT area;

wherein a lattice dimension of the first poly-silicon section is larger than a lattice dimension of the second poly-silicon section; and fractured crystals in the second poly-silicon section outnumber fractured crystals in the first poly-silicon section;

wherein the substrate comprises a glass substrate; a material of the buffer layer comprises one of silicon nitride, silicon oxide, and a combination thereof; and a material of the interlayer insulation layer comprises one of silicon oxide, silicon nitride, and a combination thereof.

The benefits of the present invention are that the present invention provides a low temperature poly-silicon TFT substrate structure and a manufacture method thereof. By providing the buffer layers in the drive TFT area and the display TFT area with different thicknesses, wherein the thickness of the buffer layer in the drive TFT area is larger and the thickness of the buffer layer in the display TFT area is smaller, different temperature grades are formed in a crystallization process of poly-silicon to achieve control of the grain diameters of crystals. The poly-silicon layer with larger lattice dimension is formed in the drive TFT area in the crystallization process to raise the electron mobility. The fractured crystals of poly-silicon layer in the display TFT area can be obtained in the crystallization process for ensuring the uniformity of the grain boundary and raising the uniformity of the current. Accordingly, the electrical property demands for different TFTs can be satisfied to raise the light uniformity of the OLED.

In order to better understand the characteristics and technical aspect of the invention, please refer to the following detailed description of the present invention is concerned with the diagrams, however, provide reference to the accompanying drawings and description only and is not intended to be limiting of the invention.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

Referring toFIG. 5, the present invention first provides a manufacture method of a low temperature poly-silicon TFT substrate structure, which comprises the following steps:

Step 1, as shown inFIGS. 6-7, providing a substrate1, wherein the substrate1comprises a drive TFT area and a display TFT area, depositing a buffer layer11on the substrate1, and patterning the buffer layer11to make a thickness of the buffer layer11in the drive TFT area larger than a thickness of the buffer layer11in the display TFT area.

Specifically, the substrate1is a glass substrate, and a material of the buffer layer11is silicon oxide (SiOx), silicon nitride (SiNx), or a combination thereof.

By providing the buffer layers11in the drive TFT area and the display TFT area with different thicknesses, different temperature grades are formed in a crystallization process of the poly-silicon so as to achieve control of the grain diameters of crystals.

Preferably, a thickness difference between the buffer layer11of the drive TFT area and the buffer layer11of the display TFT area is larger than 500 Å.

Step 2, as shown inFIGS. 8-9, depositing an amorphous silicon layer on the buffer layer11p; implementing an excimer laser annealing process to the amorphous silicon layer to make the amorphous silicon layer crystallized and converted to a poly-silicon layer12after excimer laser annealing pretreatment, and patterning the poly-silicon layer12to obtain a first poly-silicon section14in the drive TFT area and a second poly-silicon section15in the display TFT area.

In the excimer laser annealing process, the thicker buffer layer11in the drive TFT area can form a better insulating course. The temperature of the poly-silicon is higher, and the fusion is complete. The insulating effect of the thinner buffer layer11in the display area is next. The temperature of the poly-silicon is lower, and the fusion is incomplete. Thus, different temperature grades are formed in the crystallization process of the poly-silicon to achieve the control to the grain diameters of the crystals. The poly-silicon layer with larger lattice dimension is formed in the drive TFT area in the crystallization process to raise the electron mobility. The fractured crystals of poly-silicon layer in the display TFT area can be obtained in the crystallization process for ensuring the uniformity of the grain boundary and raising the uniformity of the current. Accordingly, the electrical property demands for different TFTs can be satisfied to raise the light uniformity of the OLED.

Therefore, in this embodiment, a lattice dimension of the first poly-silicon section14is larger than a lattice dimension of the second poly-silicon section15; fractured crystals in the second poly-silicon section15are more than fractured crystals in the first poly-silicon section14.

Step 3, as shown inFIG. 10, depositing a gate isolation layer16on the first poly-silicon section14, the second poly-silicon section15and the buffer layer11.

Step 4, as shown inFIG. 11, depositing and patterning a first metal layer on the gate isolation layer16, and forming a first gate17and a second gate18respectively above the first poly-silicon section14and the second poly-silicon section15and corresponding thereto.

Step 5, as shown inFIG. 12, depositing an interlayer insulation layer19on the gate isolation layer16, the first gate17and the second gate18, and forming a first via20and a second via20′ in the interlayer insulation layer19and the gate isolation layer16respectively above the first poly-silicon section14and the second poly-silicon section15and corresponding thereto.

Specifically, a material of the interlayer insulation layer19is silicon oxide, silicon nitride, or a combination thereof.

Step 6, as shown inFIG. 13, depositing and patterning a second metal layer on the interlayer insulation layer19to respectively form a first source/drain21in the drive TFT area and a second source/drain22in the display TFT area, wherein the first source/drain21contacts with the first poly-silicon section14through the first via20and the second source/drain22contacts with the second poly-silicon section15through the second via20′.

The aforesaid manufacture method of the low temperature poly-silicon TFT substrate structure provides the buffer layers in the drive TFT area and the display TFT area with different thicknesses, wherein the thickness of the buffer layer in the drive TFT area is larger and the thickness of the buffer layer in the display TFT area is smaller. Thus, different temperature grades are formed in the crystallization process of the poly-silicon to achieve control of the grain diameters of crystals. The poly-silicon layer with larger lattice dimension is formed in the drive TFT area in the crystallization process to raise the electron mobility. The fractured crystals of poly-silicon layer in the display TFT area can be obtained in the crystallization process for ensuring the uniformity of the grain boundary and raising the uniformity of the current. Accordingly, the electrical property demands for different TFTs can be satisfied to raise the light uniformity of the OLED.

Referring toFIG. 13, the present invention further provides a low temperature poly-silicon TFT substrate structure, which comprises a drive TFT area and a display TFT area. The drive TFT area comprises a substrate1, a buffer layer11on the substrate1, a first poly-silicon section14on the buffer layer11, a gate isolation layer16on the buffer layer11and the first poly-silicon section14, a first gate17on the gate isolation layer16and above the first poly-silicon section14and corresponding thereto, an interlayer insulation layer19on the gate isolation layer16and the first gate17and a first source/drain21on the interlayer insulation layer19.

The display TFT area comprises a substrate1, a buffer layer11on the substrate1, a second poly-silicon section15on the buffer layer11, a gate isolation layer16on the buffer layer11and the second poly-silicon section15, a second gate18on the gate isolation layer16and above the second poly-silicon section15and corresponding thereto, an interlayer insulation layer19on the gate isolation layer16and the second gate18and a second source/drain22on the interlayer insulation layer19.

A thickness of the buffer layer11in the drive TFT area is larger than a thickness of the buffer layer11in the display TFT area.

A lattice dimension of the first poly-silicon section14is larger than a lattice dimension of the second poly-silicon section15; fractured crystals in the second poly-silicon section15are more than fractured crystals in the first poly-silicon section14.

Specifically, a first via20is formed in the interlayer insulation layer19and the gate isolation layer16in the drive TFT area and above the first poly-silicon section14and corresponding thereto, and the first source/drain21contacts with the first poly-silicon section14through the first via20.

A second via20′ is formed in the interlayer insulation layer19and the gate isolation layer16in the display TFT area and above the second poly-silicon section15and corresponding thereto, and the second source/drain22contacts with the second poly-silicon section15through the second via20′.

Specifically, the substrate1is a glass substrate.

Specifically, a material of the buffer layer11is silicon nitride, silicon oxide, or a combination thereof; and a material of the interlayer insulation layer19is silicon oxide, silicon nitride or a combination thereof.

Preferably, a thickness difference between the buffer layer11of the drive TFT area and the buffer layer11of the display TFT area is larger than 500 Å.

In the aforesaid low temperature poly-silicon TFT substrate structure, the buffer layers in the drive TFT area and the display TFT area have different thicknesses, wherein the thickness of the buffer layer in the drive TFT area is larger and the thickness of the buffer layer in the display TFT area is smaller. Different temperature grades are formed in the crystallization process of the poly-silicon. The poly-silicon layer with larger lattice dimension is formed in the drive TFT area in the crystallization process to raise the electron mobility. The uniformity of the grain boundary of the poly-silicon layer in the display TFT area is better in the crystallization process. The uniformity of the current is better. The electrical property demands for different TFTs can be satisfied to raise the light uniformity of the OLED.

In summary, the low temperature poly-silicon TFT substrate structure and the manufacture method thereof according to the present invention provides the buffer layers in the drive TFT area and the display TFT area with different thicknesses, wherein the thickness of the buffer layer in the drive TFT area is larger and the thickness of the buffer layer in the display TFT area is smaller. Different temperature grades are formed in the crystallization process of the poly-silicon to achieve control of the grain diameters of crystals. The poly-silicon layer with larger lattice dimension is formed in the drive TFT area in the crystallization process to raise the electron mobility. The fractured crystals of poly-silicon layer in the display TFT area can be obtained in the crystallization process for ensuring the uniformity of the grain boundary and raising the uniformity of the current. Accordingly, the electrical property demands for different TFTs can be satisfied to raise the light uniformity of the OLED.

The above provide only specific embodiments of the present invention. The scope of the present invention is not limited to these embodiments. For those skilled in the art, change or replacement which is easily derived should be covered by the protected scope of the invention. Thus, the protected scope of the invention should go by the subject claims.