Vertical mount package and wafer level packaging therefor

Vertical mount packages and methods for making the same are disclosed. A method for manufacturing a vertical mount package includes providing a device substrate with a plurality of device regions on a front surface, and a plurality of through-wafer vias. MEMS devices or integrated circuits are formed or mounted onto the device regions. A capping substrate having recesses is mounted over the device substrate, enclosing the device regions within cavities defined by the recesses. A plurality of aligned through-wafer contacts extend through the capping substrate and the device substrate. The device substrate and capping substrate can be singulated by cutting through the aligned through-wafer contacts, with the severed through-wafer contacts forming vertical mount leads. A vertical mount package includes a device sealed between a device substrate and a capping substrate. At least of the side edges of the package includes exposed conductive elements for vertical mount leads.

BACKGROUND OF THE INVENTION

1. Field of the Invention

Embodiments of the invention relate to vertical mount packages for integrated circuits or microelectromechanical systems (MEMS) devices.

2. Description of the Related Art

Microelectromechanical systems (MEMS) devices refer to very small mechanical devices driven by electricity. MEMS devices can include one or more of mechanical elements, sensors, and actuators formed on a substrate, such as a silicon substrate, through micro fabrication technology. Such MEMS devices in a state before packaging can also be referred to as a “MEMS die” in the context of this document. In this document, “dies” is used as a plural form of “die,” but “dice” can also be used as a plural form.

MEMS dies are typically placed in a package (hereinafter, referred to as “MEMS package”) to protect the MEMS dies and facilitate electrical connection to larger electronic devices. Such MEMS packages are often designed to be attached to a printed circuit board (PCB) or similar interface for larger devices. A MEMS package can typically include a casing defining a cavity to contain a MEMS die, bond pads for electrical connection to the MEMS die, leads for electrical connection to a larger device, and interconnects for electrical connection between the bond pads and the leads. A MEMS die is attached to a mounting surface of the MEMS package, and can be electrically connected to the bond pads, e.g., via bond wires. The cavity can be defined in various ways, such as a substrate and metal “can” or three-dimensional lid, a molded package with integrated substrate and walls with a planar lid, etc.

Other devices, such as application-specific integrated circuits (ASICs) and memory chips, can be similarly packaged for protection and to facilitate electrical connection of devices to larger electrical circuits. Such IC dies can be independently packaged or packaged together with MEMS devices.

Most packages are designed to mount onto larger boards with the die parallel to the mounting board. Dies that are to be mounted vertically with respect to the mounting surface, such as gyroscopes and other motion sensors, present additional challenges for efficient component manufacturing and assembly of packages.

SUMMARY OF THE INVENTION

In one embodiment, a method of manufacturing a vertical mount package is provided. The method includes providing a device substrate having a front surface with a plurality of device regions, and a rear surface opposite the front surface. The method further includes sealing devices on the device regions on the device substrate, and dicing the device substrate to form a plurality of packages. Each of the packages includes a plurality of side edges between the front and rear surfaces, and at least one of the side edges includes exposed conductive elements for vertical mount leads. Each of the resulting plurality of packages includes at least one device region.

In another embodiment, a method of manufacturing a vertical mount package is provided. The method includes providing a device substrate comprising a plurality of through-substrate contacts extending between front and rear surfaces of the device substrate. A plurality of devices are sealed on the front surface of the device substrate. The method further includes dicing the device substrate through at least some of the plurality of through-substrate contacts, each of the severed through-substrate contacts forming a vertical mount lead.

In another embodiment, a vertical mount package is provided. The package includes a device substrate having a front surface with at least one device disposed thereon, and a rear surface opposite the front surface. The package further includes a capping substrate having a front surface and a rear surface opposite the front surface. The capping substrate is disposed over the device substrate such that the rear surface of the capping substrate faces the front surface of the device substrate. The at least one device is sealed within a cavity defined by the device substrate and the capping substrate. The package further includes a plurality of side edges extending between the front surface of the capping substrate and the rear surface of the device substrate, at least one of the side edges including exposed conductive elements for vertical mount leads.

In another embodiment, a vertical mount package is provided. A device substrate comprises a front surface and a rear surface opposite the front surface. The substrate can be made of glass or silicon. At least one device is sealed on the front surface of the device substrate, and a rear surface opposite the front surface. A plurality of side edges extend between the front and rear surfaces of the device substrate surface. At least one of the side edges includes exposed conductive elements for vertical mount leads.

DETAILED DESCRIPTION OF EMBODIMENTS

Vertical Mount Package

A MEMS package is designed to protect a MEMS device and facilitate electrical connection to larger electronic devices. In some applications, a MEMS package can be mounted on a printed circuit board (PCB) such that a MEMS device therein is oriented substantially parallel to a mounting surface of the PCB. In other applications, a MEMS package desirably has a MEMS device therein oriented substantially perpendicular to a mounting surface of a PCB because of the operation of the MEMS device.

For example, in some automotive applications, such as vehicle stability control devices, rotation or angular sensors (alternatively, referred to as “gyroscopes”) and/or motion sensors (alternatively, referred to as “accelerometers”) are oriented vertically on a horizontally mounted part inside a vehicle. In the context of this document, the term “vertical” can refer to the orientation approximately perpendicular to the package mounting plane (e.g., on a motherboard), which can be but is not necessarily parallel to ground. Rotation sensors and motion sensors can be collectively referred to as “inertial sensors.”

Such inertial sensors can be oriented vertically using a vertical mount package, which is configured to mount vertically and make electrical connections to a horizontal mounting surface. However, known schemes for vertical mount packages can be expensive and have several limitations. For example, as vertical mount packages can be more susceptible to vibration and package tilt than horizontal mount packages. Accordingly, there is a need for providing a vertical mount package that can tolerate such conditions such that the operations of MEMS devices (and/or other types of dies) therein are not adversely affected. Among other attributes, vertical mount packages should have low height and low manufacturing costs while maintaining or improving overall performance.

In one embodiment, a vertical mount package can include a substrate having a plurality of device regions on a front surface, and a rear surface opposite the front surface. The package further includes a lid or capping substrate covering the device regions while providing a cavity for containing MEMS or IC devices and the electrical connections therefor. The term “lid,” “cap,” or “capping substrate” can be used interchangeably within the context of this document. In addition, the package includes a plurality of exposed conductive elements on a bottom edge of the substrate. Advantageously, the packaging structures and methods taught herein can be applied to either to independently mounted MEMS and/or IC dies, or to integrally formed MEMS and/or IC devices in the same substrate that is used for packaging. The substrate on which the devices can be either integrally formed using semiconductor processing techniques, or on which devices can be mounted, can be referred to as a “device substrate.” The ability to employ the same substrate both for fabrication of the devices and packaging can effectively eliminate the use of separate packaging substrates and provide for very low profile and small area packages where the fabricated die doubles as a packaging substrate.

Referring toFIG. 1, a vertical mount package according to one embodiment is shown. The illustrated package100includes a device substrate110, a capping substrate120, and a plurality of leads130. The leads130comprise exposed conductive elements, and can provide for electrical connection to another device. The package100can be attached to a larger electronic device, such as by way of a printed circuit board (PCB) (not shown), by attaching the leads130to the PCB, using, for example, solder joints. The leads130each comprise a first segment130aintegrated with the device substrate110. The first segment130ais aligned with a second segment130b, which is integrated with the capping substrate120. When the capping substrate120is mounted over the device substrate110, the first and second segments130a,130bare aligned and join to form a single lead130.

The device substrate110serves to support one or more devices. The devices can include one integrated circuits (ICs) and/or MEMS devices that are fabricated directly onto the device substrate110. In some embodiments, the devices can include one or more dies, such as IC and/or MEMS dies, that are formed separately and then mounted onto the device substrate110. The device substrate110has a front surface115aand a rear surface115bopposite the front surface115a. A plurality of edges115cextend between the front and rear surfaces115aand115b. In one embodiment, the device substrate110can be formed of, for example, glass. In other embodiments, the device substrate110can be formed of silicon. Similarly, in various embodiments the capping substrate120can be formed of glass or silicon. A plurality of lesser vias111a(illustrated as cylindrical but can have other shapes) extend through the device substrate110, as do four aligned greater vias111b(illustrated as hemi-cylindrical but can have other shapes). The greater vias111bare filled with conductive material which form the leads130.

The device substrate110can also include electrical contacts in the form of traces112on the rear surface115bof the device substrate110. The traces112can extend to one or more of the plurality of the lesser vias111a. Like the greater vias111b, the lesser vias111aare filled with conductive material and connect at the front surface115aof the device substrate110to the plurality of device regions114.

One or more devices140can be arranged on the device regions114on the front surface115aof the device substrate110. In the illustrated embodiment, the MEMS package100includes four devices140. In other embodiments, the number of devices in a package can vary widely, depending on the design of the package. For example, a package can include a single device, or three or more devices. As noted above, the devices140can include MEMS structures or ICs that are fabricated directly onto the device regions114using semiconductor processing techniques, in which case the substrate110itself can be considered a die (after dicing). Alternatively, the devices140can be independently fabricated MEMS structures and/or ICs that are fabricated on separate substrates, diced, and then the dies are mounted onto the device regions114. In some embodiments, a package can include one or more MEMS devices, and one or more Application-Specific Integrated Circuits (ASIC).

Each of the devices can include one or more MEMS structures, such as a gyroscope, an accelerometer, a MEMS microphone, thermal sensor, and the like. Advantageously, one or more of the devices can be integrally formed on the device substrate110using semiconductor processing techniques, such as gas phase deposition, photolithography, etching, etc. In some embodiments, two or more devices can be stacked over one another (if separately mounted), or connected to one another side-by-side. In some embodiments, the MEMS devices can include a movable membrane, for example for motion or acoustic sensors. Upon mounting of the package, the membrane can be configured to lie substantially parallel to the vertical, and to move in a direction substantially perpendicular to the vertical.

The devices140are electrically coupled by way of traces on the front surface115aof the device substrate110to the lesser vias111a. In embodiments in which the devices140are formed on separate dies and then mounted onto the device regions114, the dies can be flip-chip mounted, using BGA, ACF, or NCP technology, or can be wire bonded, as is known in the art, to connect by surface traces to the lesser vias111a. The capping substrate120has a cavity formed therein such that the capping substrate120does not contact the devices140(whether integrally formed or mounted) when the capping substrate120is attached to the device substrate110. By having the capping substrate120spaced apart from the devices140without an encapsulant, the devices140can minimize stress and allow free motion for MEMS membranes. The capping substrate120can be attached to the device substrate110, using adhesive material, such as epoxy, formed along the periphery of the front surface115aof the device substrate110. Conversely, the devices can be arranged in a cavity in the device substrate110and the capping substrate120can be planar or also have a cavity. In some embodiments, the capping substrate120can be attached to the device substrate110using wafer bonding, for example glass frit (non-conductive) or metal-to-metal (conductive) bonding.

The leads130serve to provide electrical connection between the devices140and the larger electronic system, e.g., through pads of a PCB (not shown) on which the MEMS package100is mounted. As will be described in more detail below, the lead130can be manufactured by cutting a wafer through the center-line of a plurality of greater vias111b. In some embodiments, the wafer can be cut through the plurality of greater vias111b, but along a line offset from the center-line. The leads130, by being attached to pads on a PCB via solder joints, can also provide mechanical support for the package100. In the illustrated embodiment, the leads130are elongated parallel to one another in a direction perpendicular to the front surface115aof the device substrate110.

The leads130, as illustrated, are half-cylinders of conductive material formed in grooves in the device substrate110. Depending upon the original shape of the greater vias111b, the leads130can assume various other shapes. The bottom surface131of the leads130is formed along the lower of side edges115c. As will be described in more detail below, the exposed bottom surface131of leads130is formed as along a side edge of the device substrate and lid during manufacturing. The package100can be rotated for mounting, such that the side edge with exposed leads130faces downward. In this orientation, bottom surface131can provide surface area for bonding with solder when the package100is attached to a PCB. Moreover, the leads130provide solder-wettable surfaces visible from both the front and rear sides of the package100after being mounted on a PCB. In general, the larger the area of contact between leads of a package and a PCB, the better is the solder joint reliability (SJR) of the package, and having visible side, front, and rear surfaces allows for visual inspection. In the illustrated embodiment, the exposed conductive portions130form leads having a relatively long length, extending the entire width of the device substrate110and the capping substrate120. As illustrated, the majority of the surface of each lead130is on the bottom of the package100(along side edge115c), while a minority surface of each lead130is also exposed on front and rear surfaces of the package100, which surfaces are visible after mounting.

In the illustrated package100, the vertical direction is parallel to the major surfaces of the devices140and to the major surfaces of the device substrate110and the capping substrate120. In embodiments in which the devices140are MEMS structures, the vertical direction is perpendicular to the direction in which the MEMS membrane vibrates.

Method of Making a Vertical Mount Package

Referring toFIGS. 2A-2H, a method of making a vertical mount package according to one embodiment will be described. In the illustrated embodiment, a device substrate210having a plurality of pre-formed through-vias211aand211bis provided. The substrate210can be a substantially circular wafer. Such wafers can vary in size depending upon manufacturing needs and available processing equipment. Round wafers can have diameters of 200 mm, 300 mm, or 450 mm. Such wafers can be processed using standard wafer processing equipment, as will be apparent to the skilled artisan. In some embodiments, the substrate may be made of glass. In other embodiments, the substrate may be made of silicon. Glass substrates are often employed for integral fabrication of MEMS devices thereon using semiconductor processing techniques; silicon has the advantage of additionally being useful for fabrication of more complex devices such as integrated circuit processors or ASICs. The skilled artisan will appreciate that other materials may be used, depending on the requirements of a particular application. Greater vias211bhave a substantially larger cross-sectional area than lesser vias211a, as shown in the enlarged view of a portion of the device substrate210inFIG. 2B. The device substrate210can have a plurality of device regions214on which a plurality of devices240(FIG. 2C) can be arranged. The skilled artisan will appreciate that many more packages can be formed from a single substrate during manufacturing, and that only the portions of the device substrate220representing two packages are shown inFIGS. 2B-2Hfor purposes of illustration.

As illustrated, the device substrate210includes a plurality of pre-formed vias211aand211b. Utilizing pre-formed vias can reduce manufacturing complexity, as it eliminates the need for the package manufacturer to undertake the expensive via etching process. In other embodiments, the device substrate210can begin with a standard wafer, and vias can be formed during the proceeding wafer fabrication process. In embodiments utilizing a glass substrate, various benefits can be realized. For example, the high resistivity of a glass substrate can increase the electrical performance of the devices. In the case of optical devices, the transparent glass lid can provide an optical path for the packaged devices to communicate with external signals transmitted through the lid. Additionally, by adjusting the doping of the glass, the coefficient of thermal expansion (CTE) of the glass substrate can be altered to match the CTE of the packaged devices, whether integrally formed or mounted. This can advantageously reduce stress on the substrate and the devices, thereby increasing robustness and performance.

With reference toFIG. 2B, greater vias211bare illustrated as aligned along an axis. As will be discussed in more detail below, this alignment can allow for singulation to create exposed conductive elements for vertical mount leads. AlthoughFIG. 2Billustrates four aligned greater vias211b, the number of greater vias211bcan vary depending on the number of leads desired for each package formed by the method. Greater vias211bare filled with conductive material230a, which forms a first segment of vertical mount leads, as described below. The lesser vias211aare likewise filled with conductive material, allowing for electrical connection between the front surface215aand the rear surface215b. The conductive material can be deposited in the greater and lesser vias211aand211busing standard processes, for example electroplating. In some embodiments, the greater and lesser vias211aand211bcan be coated with a conductive material without being completely filled, leaving a hole through the vias. In other embodiments, the greater and lesser vias211aand211bcan be coated with a conductive material, then filled with a different conductive material to increase the conductivity.

With reference toFIG. 2C, the front surface215aof the device substrate210includes a plurality of device regions214. Devices240are arranged on the device regions214. In some embodiments, the devices240can include MEMS and/or IC devices that are integrally fabricated onto the device regions214using compatible glass (or silicon) wafer fabrication processes. These processes for fabricating MEMS or ICs are well known in the art. In other embodiments, the devices240can be fabricated separately, and then mounted onto the device regions214. The devices240can be electrically connected to the conductive material in lesser vias211aby known methods. For example, electrical connection can be established by flip-chip connection or bond wires and by depositing traces from the bond pads for the chips to the lesser vias211a. As will be described below, electrical connection between the devices240and lesser vias211aallows for electrical connection to the leads230. Alternatively, the lesser vias can be omitted and surface traces on the front side can lead directly to the greater vias211b. The devices240can be coated with a protective material, such as a silicone gel to prevent moisture incursion. In some embodiments, the capping substrate220can form a hermetic seal with the device substrate210, thereby obviating any need for a coating under the lid. Integrated circuit fabrication techniques can be used to deposit, pattern and passivate interconnections among the devices240and lesser vias211a, such that the interconnections are integrally formed with the device substrate210and are not shown for simplicity.

A portion of another substrate220representing two lids is illustrated inFIG. 2D. The capping substrate220includes pre-formed vias211cthat are configured to align with greater vias211bon the device substrate210. The pre-formed vias211con the capping substrate220can be filled with conductive material, using the processes described above with respect to the greater and lesser vias211aand211bof the device substrate210. Filled with conductive material, the pre-formed vias211cof the capping substrate220form second lead segments230b. The capping substrate220also includes cavities221, two shown inFIG. 2D, as illustrated, with one on either side of the pre-formed vias211c.

With reference toFIG. 2E, the capping substrate220is mounted over the front surface of the device substrate210, together forming a package assembly200. As illustrated, the pre-formed vias211care substantially aligned with the greater vias211bof the device substrate210. With both vias filled with conductive material, the first lead segment230aof the substrate contacts the second lead segment230bof the lid200, together forming a single lead230. Conductive adhesive can ensure good electrical contact. In the illustrated embodiment, showing the portion of the substrates210,220, representing two packages, four leads230are aligned down the center of the package assembly200. As noted elsewhere, the package assembly can be diced down the center of these aligned leads230, thereby forming separate packages. The capping substrate220can be bonded to the device substrate210by various methods. For example an adhesive such as epoxy can be used to secure the capping substrate220and device substrate210to one another, with conductive adhesive used between the lead segments230a,230b.

With reference toFIG. 2F, a plurality of traces212can be formed on the rear surface215bof the device substrate210. These traces can connect the conductive material within the lesser vias211awith the leads230within greater vias211b. The traces212can be formed using standard fabrication techniques. For example, formation of the traces212can be accomplished by depositing a layer of a conductive material, such as copper, over the rear surface215bof the device substrate210. Next, photolithography can be used to define an etch area, followed by wet or dry etching used to strip copper away from everywhere except for those portions which become traces212. The photoresist can then be stripped from the rear surface. In other embodiments, the traces212can be deposited by sputtering copper through a mask defining the traces212, rather than by depositing a blanket layer of copper, followed by an etching process. Alternatively, interconnections between the devices and the greater leads can be made on the front surface of the device substrate using semiconductor fabrication techniques.

With reference toFIG. 2G, the rear surface215bcan be coated with a passivation layer213, such as polyimide, thereby ensuring that the traces212, and the bottom portions of the leads230and the lesser vias211aare insulated from contamination and environmental stress.

Referring now toFIG. 2H, following polyimide passivation, the package assembly200can be singulated using, e.g., a wafer saw to cut down the center axis250of the leads230. It will be understood that in practice multiple cuts will be employed to singulate multiple packages from larger device substrates210and capping substrates220of the type shown inFIG. 2A. As noted above, the leads230are not exposed to the cavities221. Accordingly, this singulation along axis250leaves the cavities221intact. The devices240are therefore encapsulated within the cavities221. Depending upon the devices arranged in the packages, an opening to the cavity (e.g., a sound port for a MEMS microphone) can be provided. Once the package assembly has been singulated, each half includes exposed conductive elements that are half-cylinders of leads230, including semi-circular exposed ends. As noted above, the leads can have other shapes depending on the shapes of the vias that they fill. The half-cylinders of leads230form vertical mount leads, allowing each half of the package assembly200to be rotated such that the half-cylinders of leads230face downward.

The exposed conductive portions of the half-cylinders of leads230can then be plated, for example to protect against oxidation or corrosion and improve solder-wettability. Examples of suitable plating include nickel palladium gold alloy (NiPdAu) or tin (Sn). As noted above with respect toFIG. 1, these vertical mount leads can then be used to physically mount and electrically connect the singulated package to a PCB or other substrate.

Turning now toFIG. 3, a flow diagram illustrates a method for manufacturing a package in one embodiment. Process300begins with block301. A device substrate is provided that includes a plurality of device regions. As noted above, this can be a glass or silicon substrate with a plurality of pre-formed vias. In other embodiments, the vias may be etched by the packager, rather than being pre-formed.

Process300continues with block302, in which devices are sealed on the device regions. In some embodiments, the devices can include integrated circuits, ASICs, and/or MEMS structures. The devices can be fabricated directly onto the device regions using standard wafer processing techniques. In other embodiments, the devices can be separately manufactured and then mounted onto the device regions. The devices, particularly IC's, can be sealed onto the device regions by covering them with epoxy or standard deposited passivation layers used in semiconductor fabrication, such as SiON layers. MEMS devices, particularly motion sensors, are preferably not encapsulated to avoid stress. Rather, in other embodiments, a separate lid can be mounted over the device substrate, thereby sealing the devices on the device regions within sealed cavities allowing free MEMS membrane movement, either by individual planar or shaped lids, or by a capping substrate providing multiple lid regions over the multiple device regions. In embodiments including a separate capping substrate, the capping substrate can have through-substrate contacts aligned with through-substrate contacts of the device substrate. In some embodiments, the lid can comprise a plurality of recesses configured such that upon sealing the devices, each of the plurality of devices is encapsulated within one of the recesses. In other embodiments, recesses are provided in the device substrate in the device regions, or recesses are provided in both the device substrate and the capping substrate.

Process300continues with block303, with dicing the device substrate to form a plurality of packages. Each of the packages resulting from the dicing includes at least one side edge with exposed conductive elements for vertical mount leads. In some embodiments, the dicing can be performed by cutting through a through-substrate contact, for example with a wafer saw. In some embodiments, the dicing can be followed by plating the exposed conductive elements.

The configurations described in the above embodiments can provide vertical mount packages having a low profile and improved performance. The packages can be made of insulating glass or silicon. Additionally, the transparent lid can provide an optical path for optical sensors or emitters, and the substrate glass can be doped so as to match the CTE of the substrate with that of the devices, such as integrated devices or mounted dies. Further, the packages can be made at a relatively low cost.

Applications

The embodiments described above can be adapted for various types of MEMS devices, including, but not limited to: optical sensors, RF MEMS, inertial sensors (for example, gyroscopes and accelerometers), MEMS thermal sensors, microphone, and pressure sensors. The packages have particular utility for packaging vertically mounted sensors, such as gyroscopic angular motion sensors, to achieve the detection at a certain orientation. For such applications, the devices can be hermetically sealed within package cavities, and the simple construction is particularly robust for environments (e.g., automobiles) subject to high vibrations.

More generally, packages employing the above described configurations can be used for various electronic devices. Examples of the electronic devices can include, but are not limited to, automotive applications, such as automotive sensors, consumer electronic products, parts of the consumer electronic products, electronic test equipments, etc. The consumer electronic products can include, but are not limited to, vehicles (for example, stability control devices), a mobile phone, cellular base stations, a telephone, a television, a computer monitor, a computer, a hand-held computer, a netbook, a tablet computer, a digital book, a personal digital assistant (PDA), a game controller, a GPS, a stereo system, a cassette recorder or player, a DVD player, a CD player, a VCR, a DVR, an MP3 player, a radio, a camcorder, a camera, a digital camera, a portable memory chip, a copier, a facsimile machine, a scanner, a multi functional peripheral device, a wrist watch, a clock, etc. Further, the electronic device can include unfinished products.

The foregoing description and claims may refer to elements or features as being “mounted” or “attached” together. As used herein, unless expressly stated otherwise, “mounted” means that one element/feature is directly or indirectly connected to another element/feature. Likewise, unless expressly stated otherwise, “attached” means that one element/feature is directly or indirectly coupled to another element/feature, such as adhesive layers. Thus, although the various schematics shown in the figures depict example arrangements of elements and components, additional intervening elements, devices, features, or components may be present in an actual embodiment.