Emulating a skip read command

In an embodiment, a skip read command is received that requests transfer of a requested block from a storage device and that requests non-transfer of a skipped block from the storage device. The skip read command specifies a skip mask that comprises an identification of a location of the requested block relative to a location of the skipped block at the storage device. In response to the skip read command, the requested block and the skipped block are transferred from the storage device by creating a read command that requests transfer of the requested block and the skipped block and sending the read command to the storage device. In various embodiments, the skipped block is transferred to a temporary buffer and not transferred to a destination buffer, or the skipped block is transferred to the destination buffer, but overwritten by a transfer of the requested block to the destination buffer.

FIELD

An embodiment of the invention generally relates to computer systems and more particularly to emulating a skip read command.

BACKGROUND

Computer systems typically comprise a combination of computer programs and hardware, such as semiconductors, transistors, chips, circuit boards, storage devices, and processors. The computer programs are stored in the storage devices and are executed by the processors. The storage devices also store data.

Some storage devices support a type of command known as a skip read. The skip read command specifies a logical block address (LBA), a transfer length, and a skip mask. The skip mask specifies which data in a range of logical blocks of data is requested to be transferred (read or copied) from the storage device to the host computer system that issues the skip read command. A bit set to one in the skip mask typically means that the data corresponding to the bit is transferred from the storage device to the issuing host computer system. A bit set to zero in the skip mask typically means that the corresponding block is skipped and is not transferred from the storage device to the host computer system. A block is the smallest unit of data that the storage device transfers. The transfer length specifies the number of blocks to be transferred from the storage device to the host system and matches the number of bits set to one in the skip mask.

For example, if the transfer length is three, then exactly three bits are set to one in the skip mask. The logical block address specified in the command is the address of a block on the storage device, which corresponds to, or is identified by, the first bit (typically the left-most or most significant bit) in the skip mask. The block at the logical block address specified by the command may or may not be transferred from the storage device, depending on whether or not the first bit in the skip mask is set. For example, for a skip command that specifies a logical block address of 64, a transfer length of 3, and a binary skip mask of 10011b, a data block at logical block address 64 is transferred, data blocks at logical block addresses 65 and 66 are skipped, and data blocks from logical block addresses 67 and 68 are transferred.

SUMMARY

A method, computer-readable storage medium, and computer system are provided. In an embodiment, a skip read command is received that requests transfer of a requested block from a storage device and that requests non-transfer of a skipped block from the storage device. In an embodiment, the skip read command specifies a skip mask that comprises an identification of a location of the requested block relative to a location of the skipped block at the storage device. In response to the skip read command, the requested block and the skipped block are transferred from the storage device by creating a read command that requests transfer of the requested block and the skipped block and sending the read command to the storage device. In various embodiments, the skipped block is transferred to a temporary buffer and not transferred to a destination buffer, or the skipped block is transferred to the destination buffer, but overwritten by a transfer of the requested block to the destination buffer.

It is to be noted, however, that the appended drawings illustrate only example embodiments of the invention, and are therefore not considered a limitation of the scope of other embodiments of the invention.

DETAILED DESCRIPTION

Referring to the Drawings, wherein like numbers denote like parts throughout the several views,FIG. 1depicts a high-level block diagram representation of a server computer system100connected to a client computer system132via a network130, according to an embodiment of the present invention. The term “server” is used herein for convenience only, and in various embodiments a computer system that operates as a client computer in one environment may operate as a server computer in another environment, and vice versa. The mechanisms and apparatus of embodiments of the present invention apply equally to any appropriate computing system.

The major components of the computer system100comprise one or more processors101, a memory102, a terminal interface111, a storage interface112, an I/O (Input/Output) device interface113, and a network adapter114, all of which are communicatively coupled, directly or indirectly, for inter-component communication via a memory bus103, an I/O bus104, and an I/O bus interface unit105.

The computer system100contains one or more general-purpose programmable central processing units (CPUs)101A,101B,101C, and101D, herein generically referred to as the processor101. In an embodiment, the computer system100contains multiple processors typical of a relatively large system; however, in another embodiment the computer system100may alternatively be a single CPU system. Each processor101executes instructions stored in the memory102and may comprise one or more levels of on-board cache.

In an embodiment, the memory102may comprise a random-access semiconductor memory, storage device, or storage medium for storing or encoding data and programs. In another embodiment, the memory102represents the entire virtual memory of the computer system100, and may also include the virtual memory of other computer systems coupled to the computer system100or connected via the network130. The memory102is conceptually a single monolithic entity, but in other embodiments the memory102is a more complex arrangement, such as a hierarchy of caches and other memory devices. For example, memory may exist in multiple levels of caches, and these caches may be further divided by function, so that one cache holds instructions while another holds non-instruction data, which is used by the processor or processors. Memory may be further distributed and associated with different CPUs or sets of CPUs, as is known in any of various so-called non-uniform memory access (NUMA) computer architectures.

The memory102is encoded with or stores an operating system150, applications152, a skip read command154, a destination buffer156, a read command162, and a temporary buffer164. Although the operating system150, the applications152, the skip read command154, the destination buffer156, the read command162, and the temporary buffer164are illustrated as being contained within the memory102, in other embodiments some or all of them may be on different computer systems and may be accessed remotely, e.g., via the network130. The computer system100may use virtual addressing mechanisms that allow the programs of the computer system100to behave as if they only have access to a large, single storage entity instead of access to multiple, smaller storage entities. Thus, the operating system150, the applications152, the skip read command154, the destination buffer156, the read command162, and the temporary buffer164are not necessarily all completely contained in the same storage device at the same time. Further, although the operating system150, the applications152, the skip read command154, the destination buffer156, the read command162, and the temporary buffer164are illustrated as being separate entities, in other embodiments some of them, portions of some of them, or all of them may be packaged together.

In an embodiment, the operating system150and the applications152comprise instructions or statements that execute on the processor101or instructions or statements that are interpreted by instructions or statements that execute on the processor101, to carry out the functions as further described below with reference toFIGS. 2,3,4,5,6,7,8,9,10,11,12, and13. In another embodiment, the operating system150and/or the applications152are implemented in hardware via semiconductor devices, chips, logical gates, circuits, circuit cards, and/or other physical hardware devices in lieu of, or in addition to, a processor-based system. In an embodiment, the operating system150and/or the applications152comprise data in addition to instructions or statements. The operating system150comprises a controller160. In another embodiment, the controller160is separate from the operating system150.

The controller160receives the skip read command154from the operating system150or the applications152. The skip read command154identifies a storage device125, requested blocks of data, skipped blocks, and the destination buffer156, into which the requested data blocks are to be transferred from the storage device125. The controller160emulates the skip read command154by creating and sending the read command162to the storage device125. In an embodiment the controller160allocates the temporary buffer164, into which the storage device125or the storage interface112transfers the skipped blocks and the requested blocks. In an embodiment, the issuer of the skip read command154reads the requested blocks (after transfer) from the destination buffer156and does not access the temporary buffer164or read the requested blocks or the skipped blocks from the temporary buffer164. In an embodiment where the skipped blocks are transferred to the destination buffer156, the skipped blocks are overwritten by requested blocks prior to the time that the locations to which the skipped blocks are transferred are read by the issuer of the skip read command154. In an embodiment, the temporary buffer164is not used or, if used, only receives the transfer of the skipped blocks.

The memory bus103provides a data communication path for transferring data among the processor101, the memory102, and the I/O bus interface unit105. The I/O bus interface unit105is further coupled to the system I/O bus104for transferring data to and from the various I/O units. The I/O bus interface unit105communicates with multiple I/O interface units111,112,113, and114, which are also known as I/O processors (IOPs) or I/O adapters (IOAs), through the system I/O bus104.

The I/O interface units support communication with a variety of storage and I/O devices. For example, the terminal interface unit111supports the attachment of one or more user I/O devices121, which may comprise user output devices (such as a video display device, speaker, and/or television set) and user input devices (such as a keyboard, mouse, keypad, touchpad, trackball, buttons, light pen, or other pointing device). A user may manipulate the user input devices using a user interface, in order to provide input data and commands to the user I/O device121and the computer system100, and may receive output data via the user output devices. For example, a user interface may be presented via the user I/O device121, such as displayed on a display device, played via a speaker, or printed via a printer.

The storage interface unit112supports the attachment of one or more disk drives or direct access storage devices125(which are typically rotating magnetic disk drive storage devices, although they could alternatively be other storage devices, including arrays of disk drives configured to appear as a single large storage device to a host computer). In another embodiment, the storage device125may be implemented via any type of secondary storage device. The contents of the memory102, or any portion thereof, may be stored to and retrieved from the storage device125, as needed. The I/O device interface113provides an interface to any of various other input/output devices or devices of other types, such as printers or fax machines. The network adapter114provides one or more communications paths from the computer system100to other digital devices and computer systems132; such paths may comprise, e.g., one or more networks130.

Although the memory bus103is shown inFIG. 1as a relatively simple, single bus structure providing a direct communication path among the processors101, the memory102, and the I/O bus interface105, in fact the memory bus103may comprise multiple different buses or communication paths, which may be arranged in any of various forms, such as point-to-point links in hierarchical, star or web configurations, multiple hierarchical buses, parallel and redundant paths, or any other appropriate type of configuration. Furthermore, while the I/O bus interface105and the I/O bus104are shown as single respective units, the computer system100may, in fact, contain multiple I/O bus interface units105and/or multiple I/O buses104. While multiple I/O interface units are shown, which separate the system I/O bus104from various communications paths running to the various I/O devices, in other embodiments some or all of the I/O devices are connected directly to one or more system I/O buses.

The network130may be any suitable network or combination of networks and may support any appropriate protocol suitable for communication of data and/or code to/from the computer system100and the computer system132. In various embodiments, the network130may represent a storage device or a combination of storage devices, either connected directly or indirectly to the computer system100. In another embodiment, the network130may support wireless communications. In another embodiment, the network130may support hard-wired communications, such as a telephone line or cable. In another embodiment, the network130may be the Internet and may support IP (Internet Protocol). In another embodiment, the network130is implemented as a local area network (LAN) or a wide area network (WAN). In another embodiment, the network130is implemented as a hotspot service provider network. In another embodiment, the network130is implemented an intranet. In another embodiment, the network130is implemented as any appropriate cellular data network, cell-based radio network technology, or wireless network. In another embodiment, the network130is implemented as any suitable network or combination of networks. Although one network130is shown, in other embodiments any number of networks (of the same or different types) may be present.

The client computer132may comprise some or all of the hardware and computer program elements of the computer100. The client computer132may also comprise additional elements not illustrated for the computer100.

FIG. 1is intended to depict the representative major components of the computer system100, the network130, and the client computer132. But, individual components may have greater complexity than represented inFIG. 1, components other than or in addition to those shown inFIG. 1may be present, and the number, type, and configuration of such components may vary. Several particular examples of such additional complexity or additional variations are disclosed herein; these are by way of example only and are not necessarily the only such variations. The various program components illustrated inFIG. 1and implementing various embodiments of the invention may be implemented in a number of manners, including using various computer applications, routines, components, programs, objects, modules, data structures, etc., and are referred to hereinafter as “computer programs,” or simply “programs.”

The computer programs comprise one or more instructions or statements that are resident at various times in various memory and storage devices in the computer system100and that, when read and executed by one or more processors in the computer system100or when interpreted by instructions that are executed by one or more processors, cause the computer system100to perform the actions necessary to execute steps or elements comprising the various aspects of embodiments of the invention. Aspects of embodiments of the invention may be embodied as a system, method, or computer program product. Accordingly, aspects of embodiments of the invention may take the form of an entirely hardware embodiment, an entirely program embodiment (including firmware, resident programs, micro-code, etc., which are stored in a storage device) or an embodiment combining program and hardware aspects that may all generally be referred to herein as a “circuit,” “module,” or “system.” Further, embodiments of the invention may take the form of a computer program product embodied in one or more computer-readable medium(s) having computer-readable program code embodied thereon.

A computer-readable signal medium may comprise a propagated data signal with computer-readable program code embodied thereon, for example, in baseband or as part of a carrier wave. Such a propagated signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A computer-readable signal medium may be any computer-readable medium that is not a computer-readable storage medium and that communicates, propagates, or transports a program for use by, or in connection with, an instruction execution system, apparatus, or device. Program code embodied on a computer-readable medium may be transmitted using any appropriate medium, including but not limited to, wireless, wire line, optical fiber cable, radio frequency, or any suitable combination of the foregoing.

Computer program code for carrying out operations for aspects of embodiments of the present invention may be written in any combination of one or more programming languages, including object oriented programming languages and conventional procedural programming languages. The program code may execute entirely on the user's computer, partly on a remote computer, or entirely on the remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet Service Provider).

Aspects of embodiments of the invention are described below with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products. Each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams may be implemented by computer program instructions embodied in a computer-readable medium. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified by the flowchart and/or block diagram block or blocks. These computer program instructions may also be stored in a computer-readable medium that can direct a computer, other programmable data processing apparatus, or other devices to function in a particular manner, such that the instructions stored in the computer-readable medium produce an article of manufacture, including instructions that implement the function/act specified by the flowchart and/or block diagram block or blocks.

The computer programs defining the functions of various embodiments of the invention may be delivered to a computer system via a variety of tangible computer-readable storage media that may be operatively or communicatively connected (directly or indirectly) to the processor or processors. The computer program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus, or other devices to produce a computer-implemented process, such that the instructions, which execute on the computer or other programmable apparatus, provide processes for implementing the functions/acts specified in the flowcharts and/or block diagram block or blocks.

Embodiments of the invention may also be delivered as part of a service engagement with a client corporation, nonprofit organization, government entity, or internal organizational structure. Aspects of these embodiments may comprise configuring a computer system to perform, and deploying computing services (e.g., computer-readable code, hardware, and web services) that implement, some or all of the methods described herein. Aspects of these embodiments may also comprise analyzing the client company, creating recommendations responsive to the analysis, generating computer-readable code to implement portions of the recommendations, integrating the computer-readable code into existing processes, computer systems, and computing infrastructure, metering use of the methods and systems described herein, allocating expenses to users, and billing users for their use of these methods and systems. In addition, various programs described hereinafter may be identified based upon the application for which they are implemented in a specific embodiment of the invention. But, any particular program nomenclature that follows is used merely for convenience, and thus embodiments of the invention are not limited to use solely in any specific application identified and/or implied by such nomenclature. The exemplary environments illustrated inFIG. 1are not intended to limit the present invention. Indeed, other alternative hardware and/or program environments may be used without departing from the scope of embodiments of the invention.

FIG. 2depicts a block diagram of an example data structure for a skip read command154, according to an embodiment of the invention. The skip read command154comprises a logical block address206, a transfer length208, a skip mask210, and destination address(es)212. The skip mask210specifies which data in a range of logical blocks of data, starting at the logical block address206, is requested to be transferred (the requested blocks) from a storage device125to the destination address(es)212in the destination buffer156at the computer system100that issues the skip read command and which data is requested to be skipped (the skipped blocks) and not transferred from the storage device125to the destination buffer156. The skip mask210specifies the relative location of each requested block and each skipped block relative to every other requested block and skipped block. In various embodiments the requested blocks and skipped blocks are interleaved at the storage device125, one or more contiguous requested blocks may be separated from other requested blocks by one or more skipped blocks, and/or one or more contiguous skipped blocks may be separated from other skipped blocks by one or more requested blocks.

A bit set to one in the skip mask210means that the data block corresponding to, or identified by, the bit is a requested block and is requested to be transferred from the storage device125to the destination address212corresponding to the position of the bit in the skip mask210. A bit set to zero in the skip mask210means that the corresponding or identified block is a skipped block and is requested to be skipped and is not to be transferred from the storage device125to any of the destination address(es)212in the destination buffer156. In various embodiments, any memory amount may be used for the skip mask210, such as bits, bytes, or any other amount. In various embodiments, one and zero may be reversed in the skip mask210or other values such as true and false may be used. A block is the amount or smallest unit of data that the storage device125may transfer to the destination address212, but in other embodiments pages, frames, or any other units may be used. The transfer length208specifies the amount of data (the number of blocks) that is requested to be transferred from the storage device125to the destination address212and matches the number of bits set to one in the skip mask210.

The destination address(es)212specifies either one address in the memory102of the requester or multiple addresses, one for each requested block. If multiple addresses are specified in the destination address212, they may all be identical, some of them may be identical, or all my be different. The multiple addresses may be contiguous, non-contiguous, or partially contiguous.

In the illustrated example, the transfer length208is three, meaning that exactly three bits are set to one in the skip mask210. The logical block address206specifies the address of a block on the storage device, which corresponds to, or is identified by, the first bit (e.g., the left-most bit) in the skip mask210. The block at the logical block address206may or may not be transferred from the storage device, depending on whether or not the first bit in the skip mask210is set. In the illustrated example, the logical block address206is 64, the transfer length208is 3, and the skip mask210is 10101, so the illustrated skip read command154requests that the data blocks at logical block addresses 64, 66, and 68 be transferred to the requested destination addresses “100,” “101,” and “102,” respectively, and the data blocks at logical block addresses 65 and 67 be skipped.

FIG. 3depicts a block diagram of an example data structure for a read command162-1that emulates a skip read command, according to an embodiment of the invention. The read command162-1is an example of, and is generically referred to by, the read command162(FIG. 1). The read command162-1emulates the operation of the skip read command154. The operation of the read command162-1is explained byFIG. 7, as further described below.

Referring again toFIG. 3, the example read command162-1comprises a logical block address306, a transfer length308, and destination address(es)310. The logical block address306specifies the starting address of a range of addresses at the storage device125to which the read command162-1is sent and from which the read command162-1requests data blocks, having a transfer length308, to be transferred to the destination address(es)310in the memory102. The logical block address306specifies the same address as the logical block address206in the skip read command154. In various embodiments, the destination address(es)310may specify locations in the destination buffer156, the temporary buffer164, or any combination thereof. In an embodiment, the destination address(es)310specifies the same number of addresses as the transfer length308, one for each data block requested to be transferred from the storage device125. In another embodiment, the destination address310specifies one address, which is the destination address for the first block of data that the read command162-1requests to be transferred, with subsequent data blocks requested to be transferred to subsequent addresses in consecutive order following the destination address310.

In an embodiment, the controller160sends the read command162-1to an I/O adapter, such as the storage interface112, which sends a read command162-1to the connected storage device125. In an embodiment, the storage interface112sends all of the destination addresses310to the storage device125, which transfers blocks to the destination addresses310. In another embodiment, the storage interface112only sends one address (which specifies a location in memory local to the storage interface112) to the storage device125, and the storage device125transfers the data blocks to the memory of the storage interface112, which then transfers the blocks to the multiple destination addresses310.

FIG. 4depicts a block diagram of an example data structure for a read command162-2that emulates a skip read command, according to an embodiment of the invention. The read command162-2is an example of, and is generically referred to by, the read command162(FIG. 1). The read command162-2emulates the operation of the skip read command154. The operation of the read command162-2is explained byFIG. 8, as further described below. Referring again toFIG. 4, the example read command162-2comprises a logical block address406, a transfer length408, and destination address(es)410, with descriptions analogous to the logical block address306, the length308, and the destination address(es)310, as previously described above.

FIG. 5depicts a block diagram of an example data structure for a read command162-3that emulates a skip read command, according to an embodiment of the invention. The read command162-3is an example of, and is generically referred to by, the read command162(FIG. 1). The read command162-3emulates the operation of the skip read command154. The operation of the read command162-3is explained byFIG. 9, as further described below. Referring again toFIG. 5, the example read command162-3comprises a logical block address506, a transfer length508, and destination address(es)510, with descriptions analogous to the logical block address306, the transfer length308, and the destination address(es)310, as previously described above.

FIG. 6depicts a block diagram of an example data structure for a read command162-4that emulates a skip read command, according to an embodiment of the invention. The read command162-4is an example of, and is generically referred to by, the read command162(FIG. 1). The read command162-4emulates the operation of the skip read command154. The operation of the read command162-4is explained byFIG. 10, as further described below. Referring again toFIG. 6, the example read command162-4comprises a logical block address606, a transfer length608, and destination address(es)610, with descriptions analogous to the logical block address306, the transfer length308, and the destination address(es)310, as previously described above.

FIG. 7depicts a block diagram of an example data transfer between a storage device125-1, a temporary buffer164-1, and a destination buffer156-1, according to an embodiment of the invention. The storage device125-1is an example of, and is generically referred to by, the storage device125(FIG. 1). The temporary buffer164-1is an example of, and is generically referred to by, the temporary buffer164(FIG. 1). The destination buffer156-1is an example of, and is generically referred to by, the destination buffer156(FIG. 1).FIG. 7illustrates the processing of the read command162-1(FIG. 3) in emulating the skip read command154(FIG. 2). The storage device125-1comprises logical block addresses705and respective data blocks710stored at the locations identified by the respective logical block addresses705. The temporary buffer164-1comprises addresses715and respective data blocks720stored at the locations identified by the respective addresses715. The destination buffer156-1comprises addresses725and respective data blocks730stored at the locations identified by the respective addresses725.

In response to receiving the skip read command154, the controller160allocates the temporary buffer164-1large enough to hold both the requested blocks and the skipped blocks specified by the skip mask210. In response to receiving the skip read command154. The controller160creates the read command162-1, which requests transfer of both the requested blocks and the skipped blocks from the storage device125-1to the temporary buffer164-1and sends the read command to the storage device125-1via the I/O adapter. The storage device125-1, via the I/O adapter transfers the requested blocks and the skipped blocks to the temporary buffer164-1, e.g., by transferring the requested block at the location identified by the logical block address705of “64” in the storage device125-1to the location identified by the address715of “90” in the temporary buffer164-1, transferring the skipped block at the location identified by the logical block address705of “65” in the storage device125-1to the location identified by the address715of “91” in the temporary buffer164-1, transferring the requested block at the location identified by the logical block address705of “66” in the storage device125-1to the location identified by the address715of “92” in the temporary buffer164-1, transferring the skipped block at the location identified by the logical block address705of “67” in the storage device125-1to the location identified by the address715of “93” in the temporary buffer164-1, and transferring the requested block at the location identified by the logical block address705of “68” in the storage device125-1to the location indented by the address715of “94” in the temporary buffer164-1.

In response to the transfer of the requested blocks and the skipped blocks to the temporary buffer164-1, the controller160transfers the requested blocks at the locations identified by addresses715of “90,” “92,” and “94” from the temporary buffer164-1to the locations identified by the destination buffer addresses725of “100,” “101,” and “102,” respectively. The controller160does not transfer the skipped blocks at the locations identified by the addresses “91” and “93” from the temporary buffer164-1to the destination buffer156-1; instead, the controller160discards the skipped blocks or deallocates the temporary buffer164-1without transferring the skipped blocks. Thus, the issuer of the skip read command does not receive the skipped blocks, even though the skipped blocks were transferred from the storage device125-1.

FIG. 8depicts a block diagram of an example data transfer between a storage device125-2, a temporary buffer164-2, and a destination buffer156-2, according to an embodiment of the invention. The storage device125-2is an example of, and is generically referred to by, the storage device125(FIG. 1). The temporary buffer164-2is an example of, and is generically referred to by, the temporary buffer164(FIG. 1). The destination buffer156-2is an example of, and is generically referred to by, the destination buffer156(FIG. 1).FIG. 8illustrates the processing of the read command162-2(FIG. 4) in emulating the skip read command154(FIG. 2). The storage device125-2comprises logical block addresses805and respective data blocks810stored at the locations identified by the respective logical block addresses805. The temporary buffer164-2comprises addresses815and respective data blocks820stored at the locations identified by the respective addresses815. The destination buffer156-2comprises addresses825and respective data blocks830stored at the locations identified by the respective addresses825.

In response to receiving the skip read command154, the controller160allocates the temporary buffer164-2large enough to hold the skipped blocks specified by the skip mask210, but not the requested blocks. The controller160creates the read command162-2, which requests transfer of the requested blocks from the storage device125-2to the destination buffer156-2and requests transfer of the skipped blocks from the storage device125-2to the temporary buffer164-2and sends the read command162-2to the storage device125-2via the I/O adapter. The storage device125-2, via the I/O adapter, transfers the requested blocks to the destination buffer156-2and transfers the skipped blocks to the temporary buffer164-2, by transferring the requested block at the logical block address805of “64” in the storage device125-2to the address825of “100” in the destination buffer156-2, transferring the skipped block at the logical block address805of “65” in the storage device125-2to the address815of “90” in the temporary buffer164-2, transferring the requested block at the logical block address805of “66” in the storage device125-2to the address825of “101” in the destination buffer156-2, transferring the skipped block at the logical block address805of “67” in the storage device125-2to the address815of “91” in the temporary buffer164-2, and transferring the requested block at the logical block address805of “68” in the storage device125-2to the address825of “102” in the destination buffer156-2.

In response to the transfer of the requested blocks to the destination buffer156-2and the transfer of the skipped blocks to the temporary buffer164-2, the controller160discards the skipped blocks or deallocates the temporary buffer164-2without transferring the skipped blocks from the temporary buffer164-2to the destination buffer156-2, so that the issuer of the skip read command154does not receive or read the skipped blocks.

FIG. 9depicts a block diagram of an example data transfer between a storage device125-3, a temporary buffer164-3, and a destination buffer156-3, according to an embodiment of the invention. The storage device125-3is an example of, and is generically referred to by, the storage device125(FIG. 1). The temporary buffer164-3is an example of, and is generically referred to by, the temporary buffer164(FIG. 1). The destination buffer156-3is an example of, and is generically referred to by, the destination buffer156(FIG. 1).FIG. 9illustrates the processing of the read command162-3(FIG. 5) in emulating the skip read command154(FIG. 2). The storage device125-3comprises logical block addresses905and respective data blocks910stored at the locations identified by the respective logical block addresses905. The temporary buffer164-3comprises addresses915and respective data blocks920stored at the locations identified by the respective addressees915. The destination buffer156-3comprises addresses925and respective data blocks930stored at the locations identified by the respective addresses925.

In response to receiving the skip read command154, the controller160allocates the temporary buffer164-3large enough to hold only one skipped block (or large enough to hold one skipped block, the address of the one skipped block and any other information associated with the one skipped block, but not large enough to also hold any other skipped blocks). In response to receiving the skip read command154, the controller160creates the read command162-3, which requests transfer of the requested blocks from the storage device125-3to the destination buffer156-3and requests transfer of the skipped blocks from the storage device125-3to the same sole location in the temporary buffer164-3and sends the read command162-3to the storage device125-3via the I/O adapter. The storage device125-3, via the I/O adapter, transfers the requested blocks to the destination buffer156-3and transfers the all of the skipped blocks to the same sole location in the temporary buffer164-3, by transferring the requested block at the logical block address905of “64” in the storage device125-3to the address925of “100” in the destination buffer156-3, transferring the skipped block at the logical block address905of “65” in the storage device125-3to the location identified by the address915of “90” in the temporary buffer164-3, transferring the requested block at the logical block address905of “66” in the storage device125-3to the address925of “101” in the destination buffer156-3, transferring the skipped block at the logical block address905of “67” in the storage device125-3to the sole location identified by the address915of “90” in the temporary buffer164-3(overwriting the previous transferred skipped data block at the location identified by the same address), and transferring the requested block at the logical block address905of “68” in the storage device125-3to the location identified by the address925of “102” in the destination buffer156-3.

In response to the transfer of the requested blocks to the destination buffer156-3and the transfer of the two skipped blocks to the sole location at the same address915in the temporary buffer164-3, the controller160discards the skipped blocks or deallocates the temporary buffer164-3without transferring the skipped blocks from the temporary buffer164-3to the destination buffer156-3, so that the issuer of the skip read command154does not receive or read the skipped blocks.

FIG. 10depicts a block diagram of an example data transfer between a storage device125-4and a destination buffer156-4, according to an embodiment of the invention. The storage device125-4is an example of, and is generically referred to by, the storage device125(FIG. 1). The destination buffer156-4is an example of, and is generically referred to by, the destination buffer156(FIG. 1).FIG. 10illustrates the processing of the read command162-4(FIG. 6) in emulating the skip read command154(FIG. 2). Referring again toFIG. 10, the storage device125-4comprises logical block addresses1005and respective data blocks1010stored at the locations identified by the respective logical block addresses1005in the same row. The destination buffer156-4comprises addresses1025and respective data blocks1030stored at the locations identified by the respective addresses1025in the same row.

In response to receiving the skip read command154, the controller160creates the read command162-4, which requests transfer of the requested blocks from the storage device125-4to the locations at the respective addresses “100,” “101,” and “102” in the destination buffer156-4and requests the transfer of the skipped blocks from the storage device125-4to the same location in the destination buffer156-4that eventually stores the last requested block (the location identified by the address “102”) and sends the read command to the storage device125-4via the I/O adapter. The storage device125-4, via the I/O adapter, transfers the requested blocks and the skipped blocks to the destination buffer156-4in increasing sequential address order (the requested data block1010at the logical block address1005of “64,” followed by the skipped data block1010at the logical block address1005of “65,” followed by the requested data block1010at the logical block address1005of “66,” followed by the skipped data block1010at the logical block address1005of “67,” followed by the requested data block1010at the logical block address1005of “68.”

Since the storage device125-4transfers the skipped blocks (at logical block addresses “65” and “67” to the address1025of “102” prior to transferring the last requested data block1010from the address1005of “68,” the data block1010from the skipped block at the logical block address1005of “67” overwrites the data block1010from the skipped block at the logical block address1005of “65,” and the requested block from the logical block address1005of “68” overwrites the skipped block from the logical block address1005of “67” in the destination buffer156-4at the location identified by the last address1025of “102.” Thus, the emulation example ofFIG. 10does not need a temporary buffer164; instead, the controller160uses the location identified by the address1025that is eventually used by the last requested block (e.g., the address1025of “102”) to store the skipped blocks. Thus, the issuer of the skip read command154does not receive or read the skipped blocks.

FIG. 11depicts a flowchart of example processing for emulating a skip read command using a temporary buffer to store requested and skipped blocks, according to an embodiment of the invention. Control begins at block1100. Control then continues to block1105where the controller160receives a skip read command154from an issuer or client, such as the operating system150or an application152. The skip read command154specifies a destination buffer156, requested blocks, skipped blocks, and a source storage device125and/or an I/O adapter, such as the storage interface112).

Control then continues to block1110where the controller160determines whether the source storage device1125and/or I/O adapter to which the source storage device125is connected supports a skip read operation. If the determination at block1110is true, then the source storage device125and/or I/O adapter supports a skip read operation, so control continues to block1115where the controller160sends a skip read command to the storage device125or I/O adapter. Control then continues to block1120where the source storage device125, via the I/O adapter, transfers the requested blocks to the destination buffer156at the destination address and does not transfer the skipped blocks to the destination buffer156. Control then continues to block1199where the logic ofFIG. 11returns.

If the determination at block1110is false, then the source storage device125and/or I/O adapter does not support a skip read operation, so control continues to block1125where the controller160allocates a temporary buffer164large enough to hold both the requested blocks and the skipped blocks.

Control then continues to block1130where the controller160creates a read command162that requests transfer of both the requested and the skipped blocks to the temporary buffer164and sends the read command to the storage device125via the I/O adapter.

Control then continues to block1135where the storage device, via the I/O adapter transfers the requested blocks and the skipped blocks to the temporary buffer164. Control then continues to block1140where, in response to the transfer of the requested and skipped blocks to the temporary buffer164, the controller160transfers the requested blocks from the temporary buffer164to the destination buffer156. The controller160does not transfer the skipped blocks from the temporary buffer164to the destination buffer156; instead, the controller160discards the skipped blocks or deallocates the temporary buffer164without transferring the skipped blocks. Control then continues to block1199where the logic ofFIG. 11returns.

FIG. 12depicts a flowchart of example processing for emulating a skip read command using a temporary buffer164to store skipped blocks, according to an embodiment of the invention. Control begins at block1200. Control then continues to block1205where the controller160receives a skip read command154from a client, such as the operating system150or an application152. The skip read command154specifies a destination buffer156, requested blocks, skipped blocks, and a source storage device125and/or I/O adapter.

Control then continues to block1210where the controller160determines whether the source storage device125and/or I/O adapter to which the source storage device125is connected supports a skip read operation. If the determination at block1210is true, then the source storage device125and/or I/O Adapter supports a skip read operation, so control continues to block1215where the controller160sends a skip read command to the storage device125or I/O adapter. Control then continues to block1220where the source storage device125, via the I/O adapter, transfers the requested blocks to the destination buffer156at the destination address and does not transfer the skipped blocks to the destination buffer156. Control then continues to block1299where the logic ofFIG. 12returns.

If the determination at block1210is false, then the source storage device125and/or I/O adapter does not support a skip read operation, so control continues to block1225where the controller160allocates a temporary buffer164large enough to store all of the skipped blocks or a temporary buffer164large enough to store one skipped block. Control then continues to block1230where the controller160creates a read command that requests transfer of the requested blocks to the destination buffer156and requests transfer of the skipped blocks to the temporary buffer164(either each skipped block to its own location in the temporary buffer164or all skipped blocks to the same location in the temporary buffer164) and sends the read command to the source storage device125via the I/O adapter.

Control then continues to block1235where the source storage device125, via the I/O adapter, transfers the requested blocks to the destination buffer156and transfers the skipped blocks to the temporary buffer164. The controller160deallocates the temporary buffer164without transferring the skipped blocks to the destination buffer156. Control then continues to block1299where the logic ofFIG. 12returns.

FIG. 13depicts a flowchart of example processing for emulating a skip read command by overwriting skipped blocks in a destination buffer with a requested block, without using a temporary buffer, according to an embodiment of the invention. Control begins at block1300. Control then continues to block1305where the controller160receives a skip read command154from a client, such as the operating system150or an application152. The skip read command154specifies a destination buffer156, requested blocks, skipped blocks, and a source storage device125and/or I/O adapter.

Control then continues to block1310where the controller160determines whether the source storage device125and/or I/O adapter to which the source storage device125is connected supports a skip read operation. If the determination at block1310is true, then the source storage device125and/or I/O adapter supports a skip read operation, so control continues to block1315where the controller160sends a skip read command to the storage device125or I/O adapter. Control then continues to block1320where the source storage device125, via the I/O adapter, transfers the requested blocks to the destination buffer156at the destination address and does not transfer the skipped blocks to the destination buffer156. Control then continues to block1399where the logic ofFIG. 13returns.

If the determination at block1310is false, then the source storage device125and/or I/O adapter does not support a skip read operation, so control continues to block1325where the controller160creates a read command162that requests transfer of the requested blocks to the destination buffer156and requests transfer of the skipped blocks to a location in the destination buffer156that eventually stores the last block of the requested data. In an embodiment, the controller160calculates the address of the last block of the requested data in the destination buffer156by calculating the sum of the first address in the destination buffer156plus the number of requested blocks multiplied by the block length and stores the resultant summed address in the destination addresses610for each of the skipped blocks.

Control then continues to block1330where the source storage device125, via the I/O adapter, transfers the requested blocks to the destination buffer156and transfers the skipped blocks to the location in the destination buffer156that eventually stores the last requested block. The transfer of each skipped block overwrites the previous skipped block in the destination buffer156, and the last requested block overwrites the last skipped block in the destination buffer156. Control then continues to block1399where the logic ofFIG. 13returns.

In the previous detailed description of exemplary embodiments of the invention, reference was made to the accompanying drawings (where like numbers represent like elements), which form a part hereof, and in which is shown by way of illustration specific exemplary embodiments in which the invention may be practiced. These embodiments were described in sufficient detail to enable those skilled in the art to practice the invention, but other embodiments may be utilized and logical, mechanical, electrical, and other changes may be made without departing from the scope of the present invention.

In the previous description, numerous specific details were set forth to provide a thorough understanding of embodiments of the invention. But, embodiments of the invention may be practiced without these specific details. In other instances, well-known circuits, structures, and techniques have not been shown in detail in order not to obscure embodiments of the invention. Different instances of the word “embodiment” as used within this specification do not necessarily refer to the same embodiment, but they may. Any data and data structures illustrated or described herein are examples only, and in other embodiments, different amounts of data, types of data, fields, numbers and types of fields, field names, numbers and types of rows, records, entries, or organizations of data may be used. In addition, any data may be combined with logic, so that a separate data structure is not necessary. The previous detailed description is, therefore, not to be taken in a limiting sense.