Solid-state image pickup device, driving method of solid-state image pickup device, and electronic device

A solid-state image pickup device includes: a plurality of unit pixels including at least a photoelectric converting section, a charge-to-voltage converting section, and one or more transfer means for transferring a charge in a predetermined path; a light shielding film for shielding a surface of the plurality of unit pixels excluding at least a light receiving section of the photoelectric converting section from light; and voltage controlling means for controlling a voltage applied to the light shielding film; wherein transfer of the charge by one of the transfer means is controlled by controlling the voltage applied to the light shielding film.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a solid-state image pickup device, a driving method of a solid-state image pickup device, and an electronic device, and particularly to a solid-state image pickup device, a driving method of a solid-state image pickup device, and an electronic device that are capable of a global shutter.

2. Description of the Related Art

In related art, a rolling shutter (focal-plane shutter) system has spread as a system of an electronic shutter for a CMOS image sensor. In the rolling shutter system, signal resetting is performed by sequentially scanning a large number of pixels arranged two-dimensionally in units of pixel rows, and thus there occurs a difference in exposure period in each pixel row. As a result, a distortion occurs in an image photographed when a subject is moving, for example. When a vertically straight object moving in a horizontal direction is photographed, for example, the object appears to be inclined.

Accordingly, an all-pixel simultaneous electronic shutter for a CMOS high-speed image sensor has been developed (see Japanese Patent Laid-Open No. 2009-268083, for example). The all-pixel simultaneous electronic shutter is to start light exposure simultaneously and end the light exposure simultaneously in all pixels effective in image pickup. The all-pixel simultaneous electronic shutter is referred to also as a global shutter (global exposure).

FIGS. 1 to 4show an example of constitution of a unit pixel of a solid-state image pickup device (CMOS image sensor) capable of the related-art all-pixel simultaneous electronic shutter operation.FIG. 1shows an example of a sectional constitution of a unit pixel11in a direction A-A′ shown inFIG. 4.FIG. 2andFIG. 3are plan views showing a constitution of the unit pixel11. However,FIG. 2shows the constitution excluding a light shielding film37, andFIG. 3shows the constitution including the light shielding film37. Incidentally,FIG. 2andFIG. 3do not show an insulating film36to facilitate the understanding of the figures.FIG. 4is a diagram made by adding a path in the direction A-A′ toFIG. 3.

The unit pixel11has, as a photoelectric conversion element, a photodiode21of a buried type formed by burying an N-type buried layer34in a P-type well layer32formed on an N-type substrate31, with a P-type layer33formed on the side of a substrate surface. The photodiode21generates a light charge whose amount corresponds to an amount of incident light (which light charge will hereinafter be referred to simply as a “charge”) by photoelectric conversion, and accumulates the charge within the photodiode21. The unit pixel11also includes a first transfer gate (TRX)22, a memory part (MEM)23, a second transfer gate (TRG)24, and a floating diffusion region (FD)25.

The gate electrode22A of the first transfer gate22is formed so as to cover a part between the photodiode21and the memory part23and an upper part of the memory part23with an insulating film22B interposed between the gate electrode22A and the covered parts. A contact38for wiring is connected to an upper part on the memory part23side of the gate electrode22A. The first transfer gate22transfers the charge accumulated in the photodiode21when a transfer pulse TRX is applied to the gate electrode22A via the contact38.

The memory part23is formed by an N-type buried channel35formed under the gate electrode22A. The memory part23accumulates the charge transferred from the photodiode21by the first transfer gate22.

Modulation can be applied to the memory part23by disposing the gate electrode22A in the upper part of the memory part23and applying the transfer pulse TRX to the gate electrode22A. That is, the potential of the memory part23is deepened by applying the transfer pulse TRX to the gate electrode22A. Thereby, an amount of saturation charge of the memory part23can be increased as compared with a case where the modulation is not applied.

The gate electrode24A of the second transfer gate24is formed in an upper part between the memory part23and the floating diffusion region25with the insulating film24B interposed between the gate electrode24A and the P-type well layer32. A contact39for wiring is connected to an upper part of the gate electrode24A. The second transfer gate24transfers the charge accumulated in the memory part23when a transfer pulse TRG is applied to the gate electrode24A via the contact39.

The floating diffusion region25is a charge-to-voltage converting part formed of an N-type layer. The floating diffusion region25converts the charge transferred from the memory part23by the second transfer gate24into a voltage. A contact40for wiring is connected to an upper part of the floating diffusion region25.

The unit pixel11further includes a reset transistor26, an amplifying transistor27, and a selecting transistor28.

The drain electrode of the reset transistor26is connected to a power supply VDB via a contact44(FIG. 2). The source electrode of the reset transistor26is connected to the floating diffusion region25. In addition, the gate electrode26A (FIG. 2) of the reset transistor26is connected with a contact43for wiring. By applying a reset pulse RST to the gate electrode26A via the contact43and thus turning on the reset transistor26, the floating diffusion region25is reset, and a charge is discharged from the floating diffusion region25.

The drain electrode of the amplifying transistor27is connected to a power supply VDO via a contact44(FIG. 2). The gate electrode27A (FIG. 2) of the amplifying transistor27is connected to the floating diffusion region25via a contact45(FIG. 2). The drain electrode of the selecting transistor28is connected to the source electrode of the amplifying transistor27. The source electrode of the selecting transistor28is connected to a vertical signal line12via a contact47(FIG. 2). In addition, the gate electrode28A (FIG. 2) of the selecting transistor28is connected with a contact46. By applying a selection pulse SEL to the gate electrode of the selecting transistor28via the contact46and thus turning on the selecting transistor28, the unit pixel11as an object from which to read out a pixel signal is selected. That is, when the selecting transistor28is on, the amplifying transistor27outputs the pixel signal indicating the voltage of the floating diffusion region25to the vertical signal line12via the selecting transistor28and the contact47.

The unit pixel11further includes a charge discharging gate (ABG)29and a charge discharging part (ABD)30.

The gate electrode29A of the charge discharging gate29is formed in an upper part between the photodiode21and the charge discharging part30with an insulating film29B interposed between the gate electrode29A and the P-type well layer32. A contact41for wiring is connected to the gate electrode29A. The charge discharging gate29transfers a charge accumulated in the photodiode21when a control pulse ABG is applied to the gate electrode29A via the contact41.

The charge discharging part30is formed by an N-type layer. The charge discharging part30is connected to a power supply VDA via the contact42. The charge transferred from the photodiode21to the charge discharging part30by the charge discharging gate29is discharged to the power supply VDA. The charge discharging gate29and the charge discharging part30act to prevent an overflow of charge when the photodiode21saturates during a readout period after an end of light exposure.

An insulating film36having a three-layer structure of an oxide film, a nitride film, and an oxide film is formed in an upper surface of the unit pixel11. The insulating film36also functions as an optical reflection preventing film. The insulating film36has openings only in parts where the contacts38to47are formed.

Further, a light shielding film37made of tungsten or the like is formed on an upper surface of the insulating film36. As shown inFIG. 3, the light shielding film37has openings only in parts where a light receiving part of the photodiode21and the contacts38to47are formed.

FIG. 5is a diagram showing an example of an arrangement of unit pixels11in the pixel array section of the solid-state image pickup device to which the unit pixel11is applied. Incidentally, inFIG. 5, description of the reference of each part is omitted to facilitate understanding of the figure.

The unit pixels11are arranged two-dimensionally in a vertical direction (column direction) and a horizontal direction (row direction). Though not shown inFIG. 5, five driving signal lines are provided for each row, the five driving signal lines being a driving signal line TRG for the gate electrode22A of the first transfer gate22, a driving signal line TRX for the gate electrode24A of the second transfer gate24, a driving signal line RST for the gate electrode26A of the reset transistor26, a driving signal line SEL for the gate electrode28A of the selecting transistor28, and a driving signal line ABG for the gate electrode29A of the charge discharging gate29.

A driving method of a unit pixel11will next be described with reference toFIG. 6. Incidentally,FIG. 6is a diagram of potentials of the unit pixel11at times t1to t7. In addition, rectangles shown below the letters TRX, TRG, and RST inFIG. 6indicate states of the transfer pulse TRX, the transfer pulse TRG, and the reset pulse RST. A solid rectangle indicates that the pulse is on. An outline rectangle indicates that the pulse is off.

A period from time t1to time t3is an accumulation period for accumulating a charge corresponding to an amount of incident light on an all-pixel simultaneous basis.

Specifically, at time t1, the transfer pulse TRX, the transfer pulse TRG, and the reset pulse RST are turned on on an all-pixel simultaneous basis, so that charges of the photodiode21, the memory part23, and the floating diffusion region25are discharged. Thereafter, the transfer pulse TRX, the transfer pulse TRG, and the reset pulse RST are turned off, and light exposure is started on an all-pixel simultaneous basis. As shown at time t2, an amount of charge which amount corresponds to an amount of incident light is accumulated in the photodiode21.

At time t3, the transfer pulse TRX is turned on on an all-pixel simultaneous basis, so that the charge accumulated in the photodiode21is transferred to the memory part23. Then, the transfer pulse TRX is turned off.

A period from time t4to time t7is a readout period for reading out the accumulated charge in order in a row unit.

Specifically, at time t4, the reset pulse RST is turned on, so that the floating diffusion region25is reset, and a charge is discharged from the floating diffusion region25. Then, the reset pulse RST is turned off.

At time t5, a pixel signal (hereinafter referred to as a reset signal) indicating the voltage (hereinafter referred to as a reset level) of the floating diffusion region25from which the charge has been discharged is read out.

At time t6, the transfer pulse TRG is turned on, so that the charge accumulated in the memory part23is transferred to the floating diffusion region25. Then, the transfer pulse TRG is turned off.

At time t7, a pixel signal (hereinafter referred to as a charge detection signal) indicating a voltage (hereinafter referred to as a signal level) based on the charge accumulated in the floating diffusion region25is read out. Thereafter, as required, a return is made to the process of time t1to start the accumulation period of a next frame.

SUMMARY OF THE INVENTION

The opening parts of the light shielding film37for the contacts38to47are a size larger than the sections of the respective contacts, and a predetermined space is secured between the light shielding film37and the contacts, in order to prevent a short circuit between each contact and the light shielding film37. However, so-called stray light is made incident from the gap between each contact and the light shielding film37. A charge generated according to the stray light flows into the memory part23and the floating diffusion region25, and causes noise.

The present invention has been made in view of such a situation. It is desirable to improve the light shielding characteristic of the light shielding film of a solid-state image pickup device.

According to an embodiment of the present invention, there is provided a solid-state image pickup device including: a plurality of unit pixels including at least a photoelectric converting section, a charge-to-voltage converting section, and one or more transfer means for transferring a charge in a predetermined path; a light shielding film for shielding a surface of the plurality of unit pixels excluding at least a light receiving section of the photoelectric converting section from light; and voltage controlling means for controlling a voltage applied to the light shielding film; wherein transfer of the charge by one of the transfer means is controlled by controlling the voltage applied to the light shielding film.

The unit pixels can further include a charge discharging section, and transfer of a charge by transfer means for transferring the charge from the photoelectric converting section to the charge discharging section can be controlled by controlling the voltage applied to the light shielding film.

Transfer of a charge by transfer means for transferring the charge from the photoelectric converting section to the charge-to-voltage converting section can be controlled by controlling the voltage applied to the light shielding film.

The unit pixels can further include a charge retaining section, and transfer of a charge by transfer means for transferring the charge from the photoelectric converting section to the charge retaining section can be controlled by controlling the voltage applied to the light shielding film.

An insulating film formed by an oxide film and a nitride film is disposed between the light shielding film and a semiconductor substrate in which the unit pixels are formed, and only the insulating film between a part of the light shielding film, the part of the light shielding film forming transfer means controlled for charge transfer by the voltage applied to the light shielding film, and the semiconductor substrate is formed by an oxide film alone.

The solid-state image pickup device can further include wiring for connecting the light shielding film and the voltage controlling means to each other on an outside of a pixel array section in which the plurality of unit pixels are arranged, and applying the voltage to the light shielding film.

The solid-state image pickup device can further include wiring for connecting the light shielding film and the voltage controlling means to each other within a pixel array section in which the plurality of unit pixels are arranged, and applying the voltage to the light shielding film.

According to an embodiment of the present invention, there is provided a driving method of a solid-state image pickup device, the solid-state image pickup device including a plurality of unit pixels including at least a photoelectric converting section, a charge-to-voltage converting section, and one or more transfer means for transferring a charge in a predetermined path, and a light shielding film for shielding a surface of the plurality of unit pixels excluding at least a light receiving section of the photoelectric converting section from light, the driving method including the solid-state image pickup device controlling transfer of the charge by one of the transfer means by controlling the voltage applied to the light shielding film.

The unit pixels can further include a charge discharging section, and the solid-state image pickup device can control transfer of a charge by transfer means for transferring the charge from the photoelectric converting section to the charge discharging section by controlling the voltage applied to the light shielding film.

The solid-state image pickup device can control transfer of a charge by transfer means for transferring the charge from the photoelectric converting section to the charge-to-voltage converting section by controlling the voltage applied to the light shielding film.

The unit pixels can further include a charge retaining section, and the solid-state image pickup device can control transfer of a charge by transfer means for transferring the charge from the photoelectric converting section to the charge retaining section by controlling the voltage applied to the light shielding film.

According to an embodiment of the present invention, there is provided an electronic device including a solid-state image pickup device, wherein the solid-state image pickup device includes: a plurality of unit pixels including at least a photoelectric converting section, a charge-to-voltage converting section, and one or more transfer means for transferring a charge in a predetermined path; a light shielding film for shielding a surface of the plurality of unit pixels excluding at least a light receiving section of the photoelectric converting section from light; and voltage controlling means for controlling a voltage applied to the light shielding film; and the solid-state image pickup device controls transfer of the charge by one of the transfer means by controlling the voltage applied to the light shielding film.

In an embodiment of the present invention, in a solid-state image pickup device including a plurality of unit pixels including at least a photoelectric converting section, a charge-to-voltage converting section, and one or more transfer means for transferring a charge in a predetermined path, and a light shielding film for shielding a surface of the plurality of unit pixels excluding at least a light receiving section of the photoelectric converting section from light, a voltage applied to the light shielding film is controlled, and transfer of the charge by one of the transfer means is controlled.

According to an embodiment of the present invention, it is possible to improve the light shielding characteristic of the light shielding film of a solid-state image pickup device.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

A mode for carrying out the invention (which mode will hereinafter be referred to as embodiments) will hereinafter be described. Incidentally, description will be made in the following order.1. First Embodiment (Example of Substituting Light Shielding Film for Gate Electrode of Charge Discharging Part)2. Second Embodiment (Example of Forming Light Shielding Film near Charge Discharging Gate by Oxide Film Alone)3. Third Embodiment (Example without Memory Part)4. Fourth Embodiment (Example of Providing Overflow Path between Photodiode and Memory Part)5. Fifth Embodiment (Example of Making Memory Part Have Similar Constitution to That of Floating Diffusion Region)6. Sixth Embodiment (Example of Forming Memory Part by Buried Channel)7. Seventh Embodiment (Example of Two-Stage Configuration of Memory Part)8. Eighth Embodiment (Example of Substituting Light Shielding Film for Gate Electrode of First Transfer Gate)9. Examples of Modification
<1. First Embodiment>

A first embodiment of the present invention will be described with reference toFIGS. 7 to 13.

[Example of Constitution of Solid-State Image Pickup Device]

FIG. 7is a block diagram showing an example of constitution of a CMOS image sensor as a solid-state image pickup device to which the present invention is applied.

The CMOS image sensor100includes a pixel array section111, a vertical driving section112, a column processing section113, a horizontal driving section114, and a system controlling section115. The pixel array section111, the vertical driving section112, the column processing section113, the horizontal driving section114, and the system controlling section115are formed on a semiconductor substrate (chip) not shown inFIG. 7.

In the pixel array section111, unit pixels (unit pixels211A inFIG. 8) having a photoelectric conversion element for generating a light charge whose amount corresponds to an amount of incident light and accumulating the light charge within the photoelectric conversion element are two-dimensionally arranged in the form of a matrix. Incidentally, the unit pixels may hereinafter be referred to simply as “pixels.”

The pixel array section111further has a pixel driving line116formed for each row of the pixel arrangement in the form of a matrix along a horizontal direction ofFIG. 7(direction of arrangement of pixels of pixel rows) and a vertical signal line117formed for each column of the pixel arrangement in the form of a matrix along a vertical direction ofFIG. 7(direction of arrangement of pixels of pixel columns). WhileFIG. 7shows one pixel driving line116for each row, the pixel driving line116is not limited to one line for each row. One terminal of the pixel driving lines116is connected to output terminals corresponding to the respective rows of the vertical driving section112.

The CMOS image sensor100further includes a signal processing section118and a data storing section119. The signal processing section118and the data storing section119may be realized by an external signal processing section provided on a substrate separate from the CMOS image sensor100, for example a DSP (Digital Signal Processor) or processing by software, or may be mounted on the same substrate as the CMOS image sensor100.

The vertical driving section112is formed by a shift register, an address decoder or the like. The vertical driving section112is a pixel driving section for driving each pixel of the pixel array section111on an all-pixel simultaneous basis or in row units, for example. Though a concrete constitution of the vertical driving section112is not shown, the vertical driving section112generally has two scanning systems, that is, a readout scanning system and a sweep-out scanning system.

The readout scanning system sequentially selects and scans the unit pixels of the pixel array section111in row units to read out signals from the unit pixels. The sweep-out scanning system performs sweep-out scanning of a readout row to be subjected to readout scanning by the readout scanning system, the sweep-out scanning preceding the readout scanning by a time corresponding to a shutter speed.

The sweep-out scanning by the sweep-out scanning system sweeps out an unnecessary charge from the photoelectric conversion elements of the unit pixels in the readout row (resets the photoelectric conversion elements). Then, a so-called electronic shutter operation is performed by the sweeping out of the unnecessary charges (reset) by the sweep-out scanning system. The electronic shutter operation in this case refers to an operation of discarding the light charges of the photoelectric conversion elements and starting new light exposure (starting accumulating light charges).

A signal read out by a readout operation of the readout scanning system corresponds to an amount of light incident after an immediately preceding readout operation or the electronic shutter operation. A period from the readout timing of the immediately preceding readout operation or the sweep-out timing of the electronic shutter operation to the readout timing of the present readout operation is a time (exposure time) of accumulation of a light charge in unit pixels.

The pixel signal output from each unit pixel of a pixel row selected and scanned by the vertical driving section112is supplied to the column processing section113through each of the vertical signal lines117. The column processing section113subjects the pixel signal output from each unit pixel of the selected row through the vertical signal line117to predetermined signal processing for each pixel column of the pixel array section111, and temporarily retains the pixel signal after the signal processing.

Specifically, the column processing section113performs at least noise removal processing, for example CDS (Correlated Double Sampling) as the signal processing. The CDS processing of the column processing section113removes reset noise, fixed pattern noise unique to pixels such as variations in threshold value of amplifying transistors. The column processing section113can be provided with for example an AD (Analog-to-Digital) converting function in addition to the noise removal processing function to output a signal level as a digital signal.

The horizontal driving section114is formed by a shift register, an address decoder or the like. The horizontal driving section114selects unit circuits corresponding to the pixel columns of the column processing section113in order. The pixel signals resulting from the signal processing in the column processing section113are output to the signal processing section118in order by the selection and scanning of the horizontal driving section114.

The system controlling section115is formed by a timing generator or the like for generating various timing signals. The system controlling section115performs driving control on the vertical driving section112, the column processing section113, and the horizontal driving section114, for example, on the basis of the various timing signals generated by the timing generator.

The signal processing section118has at least an addition processing function. The signal processing section118subjects the pixel signals output from the column processing section113to various signal processing such as adding processing. The data storing section119temporarily stores data necessary for the signal processing in the signal processing section118at the time of the signal processing in the signal processing section118.

[Constitution of Unit Pixels211A]

A concrete constitution of the unit pixels211A arranged in the form of a matrix in the pixel array section111inFIG. 7will next be described with reference toFIGS. 8 to 11.

FIG. 8shows an example of a sectional constitution of a unit pixel211A in a direction A-A′ shown inFIG. 11.FIG. 9andFIG. 10are plan views showing an example of constitution of the unit pixel211A. However,FIG. 9shows the constitution excluding a light shielding film237, andFIG. 10shows the constitution including the light shielding film237. Incidentally,FIG. 9andFIG. 10do not show an insulating film236to facilitate the understanding of the figures.FIG. 11is a diagram made by adding a path A-A′ toFIG. 10.

The unit pixel211A has for example a photodiode (PD)221as a photoelectric conversion element. The photodiode221is for example a buried type photodiode formed by burying an N-type buried layer234in a P-type well layer232formed on an N-type substrate231, with a P-type layer233formed on the side of a substrate surface. Incidentally, the P-type layer233and the N-type buried layer234have such an impurity concentration as to be in a depleted state at a time of a charge discharge.

In addition to the photodiode221, the unit pixel211A has a first transfer gate (TRX)222, a memory part (MEM)223, a second transfer gate (TRG)224, and a floating diffusion region (FD)225.

The first transfer gate222includes a gate electrode222A formed of polysilicon and an insulating film222B. The gate electrode222A is formed so as to cover a part between the photodiode221and the memory part223and an upper part of the memory part223with the insulating film222B interposed between the gate electrode222A and the covered parts. A contact238for wiring is connected to an upper part on the memory part223side of the gate electrode222A. The first transfer gate222transfers a charge accumulated in the photodiode221when a transfer pulse TRX is applied to the gate electrode222A via the contact238.

Incidentally, a state in which the transfer pulse TRX is applied to the gate electrode222A will hereinafter be referred to also as a state in which the transfer pulse TRX is on or a state in which the first transfer gate222is on. In addition, a state in which the transfer pulse TRX is not applied to the gate electrode222A will hereinafter be referred to also as a state in which the transfer pulse TRX is off or a state in which the first transfer gate222is off.

The memory part223is formed by an N-type buried channel235having such an impurity concentration as to be in a depleted state at a time of a charge discharge, the N-type buried channel235being formed under the gate electrode222A. The memory part223accumulates the charge transferred from the photodiode221by the first transfer gate222. Incidentally, because the memory part223is formed by the buried channel235, it is possible to suppress the occurrence of a dark current at a Si—SiO2interface, and thereby contribute to an improvement in image quality.

In addition, modulation can be applied to the memory part223by disposing the gate electrode222A in the upper part of the memory part223and applying the transfer pulse TRX to the gate electrode222A. That is, the potential of the memory part223is deepened by applying the transfer pulse TRX to the gate electrode222A. Thereby, an amount of saturation charge of the memory part223can be increased as compared with a case where the modulation is not applied.

The second transfer gate224includes a gate electrode224A formed of polysilicon and an insulating film224B. The gate electrode224A is formed in an upper part between the memory part223and the floating diffusion region225with the insulating film224B interposed between the gate electrode224A and the P-type well layer232. A contact239for wiring is connected to an upper part of the gate electrode224A. The second transfer gate224transfers the charge accumulated in the memory part223when a transfer pulse TRG is applied to the gate electrode224A via the contact239.

Incidentally, a state in which the transfer pulse TRG is applied to the gate electrode224A will hereinafter be referred to also as a state in which the transfer pulse TRG is on or a state in which the second transfer gate224is on. In addition, a state in which the transfer pulse TRG is not applied to the gate electrode224A will hereinafter be referred to also as a state in which the transfer pulse TRG is off or a state in which the second transfer gate224is off.

The floating diffusion region225is a charge-to-voltage converting part formed of an N-type layer having an impurity concentration such that a contact240for wiring can be electrically connected to the floating diffusion region225. The floating diffusion region225converts the charge transferred from the memory part223by the second transfer gate224into a voltage. The contact240for wiring is connected to an upper part of the floating diffusion region225.

The unit pixel211A further includes a reset transistor226, an amplifying transistor227, and a selecting transistor228. Incidentally,FIG. 8shows an example in which an N-channel MOS transistor is used as the reset transistor226, the amplifying transistor227, and the selecting transistor228. However, a combination of conduction types of the reset transistor226, the amplifying transistor227, and the selecting transistor228is not limited to the combination of these conduction types.

The drain electrode of the reset transistor226is connected to a power supply VDB via a contact244(FIG. 9). The source electrode of the reset transistor226is connected to the floating diffusion region225. In addition, the gate electrode226A (FIG. 9) of the reset transistor226is connected with a contact243for wiring. By applying a reset pulse RST to the gate electrode226A via the contact243and thus turning on the reset transistor226, the floating diffusion region225is reset, and a charge is discharged from the floating diffusion region225.

The drain electrode of the amplifying transistor227is connected to a power supply VDO via a contact244(FIG. 9). The gate electrode227A (FIG. 9) of the amplifying transistor227is connected to the floating diffusion region225via a contact245(FIG. 9). The drain electrode of the selecting transistor228is connected to the source electrode of the amplifying transistor227. The source electrode of the selecting transistor228is connected to a vertical signal line117via a contact247(FIG. 9). In addition, the gate electrode228A (FIG. 9) of the selecting transistor228is connected with a contact246. By applying a selection pulse SEL to the gate electrode of the selecting transistor228via the contact246and thus turning on the selecting transistor228, the unit pixel211A as an object from which to read out a pixel signal is selected. That is, when the selecting transistor228is on, the amplifying transistor227supplies the pixel signal indicating the voltage of the floating diffusion region225to the column processing section113via the selecting transistor228, the contact247, and the vertical signal line117.

Incidentally, the selecting transistor228can also be connected between the power supply VDO and the drain electrode of the amplifying transistor227. It is also possible to omit one or a plurality of the reset transistor226, the amplifying transistor227, and the selecting transistor228according to a method of reading out the pixel signal, or share one or a plurality of the reset transistor226, the amplifying transistor227, and the selecting transistor228between a plurality of pixels.

The unit pixel211A further includes a charge discharging gate (ABG)229and a charge discharging part (ABD)230.

Unlike the charge discharging gate29inFIG. 1, the charge discharging gate229does not have a gate electrode. When a predetermined control pulse ABG is applied to the light shielding film237instead, the charge discharging gate229transfers the charge accumulated in the photodiode221. That is, in the charge discharging gate229, the light shielding film237performs the function of the gate electrode. Specifically, when the control pulse ABG of a positive voltage is applied to the light shielding film237, the potential of a potential barrier between the photodiode221and the charge discharging part230is heightened, and the height of the potential barrier is lowered. Thereby, an overflow path is formed between the photodiode221and the charge discharging part230, and the charge accumulated in the photodiode221is transferred to the charge discharging part230.

In this case, the other gates such as the first transfer gate222and the second transfer gate224have respective dedicated gate electrodes, and the light shielding film237is disposed on the upper side of each gate electrode. Thus, the application of the control pulse ABG to the light shielding film237does not affect the operation of the other gates.

In addition, because the charge discharging gate229does not have a gate electrode, no contact for wiring of the gate electrode is provided either.

Incidentally, a state in which the control pulse ABG is applied to the light shielding film237will hereinafter be referred to also as a state in which the control pulse ABG is on or a state in which the charge discharging gate229is on. In addition, a state in which the control pulse ABG is not applied to the light shielding film237will hereinafter be referred to also as a state in which the control pulse ABG is off or a state in which the charge discharging gate229is off.

The charge discharging part230is formed by an N-type layer having an impurity concentration such that a contact242for wiring can be electrically connected to the charge discharging part230. The charge discharging part230is connected to a power supply VDA via the contact242. The potential of the charge discharging part230is therefore substantially equal to the potential of the power supply VDA. The charge transferred from the photodiode221to the charge discharging part230by the charge discharging gate229is discharged to the power supply VDA. The charge discharging gate229and the charge discharging part230act to prevent an overflow of charge when the photodiode221saturates during a readout period after an end of light exposure.

An insulating film236having a three-layer structure of an oxide film, a nitride film, and an oxide film is formed in an upper surface of the unit pixel211A. The insulating film236also functions as an optical reflection preventing film. The insulating film236has openings only in parts where the contacts238to247are formed. Incidentally, each of the layers forming the insulating film236is set at an optimum film thickness in consideration of a breakdown voltage and optical sensitivity characteristics.

Further, a light shielding film237made of a metal such as tungsten or the like is formed on an upper surface of the insulating film236. As shown inFIG. 10, the light shielding film237has openings only in parts where a light receiving part of the photodiode221and the contacts238to247are formed.

The opening part of the light shielding film237for the light receiving part of the photodiode221is set at an optimum size and an optimum position according to a tradeoff between the optical sensitivity of the photodiode221and noise occurring in the memory part223. Incidentally, the noise occurring in the memory part223in this case is noise occurring on the same principles as the smear of a CCD image sensor. For example, the noise is caused when light from an opening of the light shielding film237enters the memory part223or the vicinity of the memory part223and a charge thereby occurs within the memory part223, or when a charge generated on the outside is spread and flows into the memory part223.

In addition, the opening parts of the light shielding film237for the contacts238to247are a size larger than the sections of the respective contacts, and a predetermined space is secured between the light shielding film237and the contacts, in order to prevent a short circuit between each contact and the light shielding film237. However, a short circuit tends to occur when the space between each contact and the light shielding film237is too narrow. When the space between each contact and the light shielding film237is too wide, stray light enters from the opening part, and the stray light increases the noise occurring on the same principles as the above-described smear. Thus, the opening parts for the respective contacts are also set at an optimum size according to a tradeoff between the two characteristics.

[Example of Constitution of Driving Signal Lines for Unit Pixels211A]

FIG. 12is a schematic diagram showing an arrangement of the unit pixels211A in the pixel array section111. Incidentally, inFIG. 12, description of the reference of each part is omitted to facilitate understanding of the figure.

In the pixel array section111, the unit pixels211A are arranged two-dimensionally in a vertical direction (column direction) and a horizontal direction (row direction). In addition, though not shown inFIG. 12, four driving signal lines are provided for each row, the four driving signal lines being a driving signal line TRG for the gate electrode222A of the first transfer gate222, a driving signal line TRX for the gate electrode224A of the second transfer gate224, a driving signal line RST for the gate electrode226A of the reset transistor226, and a driving signal line SEL for the gate electrode228A of the selecting transistor228.

Thus, in the pixel array section111in which the unit pixels211A are arranged, the driving signal line ABG for the gate electrode of the charge discharging gate can be omitted as compared with the pixel array section in which the unit pixels11are arranged inFIG. 5. A degree of freedom of layout of wiring for the driving signal lines is thereby improved. In addition, an opening area for the light receiving part of the photodiode221can be increased, the overall light receiving sensitivity of each pixel is improved, and in particular, the light receiving sensitivity of pixels in the vicinity of an end part of an angle of view where an angle of incidence of incident light is increased is improved. In addition, the shading of the incident light by the driving signal lines is decreased, so that the light receiving sensitivity is further improved.

Further, the need to provide an opening of the light shielding film237for the contact for the gate electrode of the charge discharging gate is eliminated, so that the light shielding characteristic of the light shielding film237is improved. Thereby, an amount of incidence of stray light incident from the openings of the light shielding film237is decreased, noise caused by the stray light is decreased, and an S/N ratio is improved.

Incidentally, the light shielding film237is for example connected to wiring extending from the vertical driving section112in a peripheral part on the outside of the pixel array section111. That is, the light shielding film237and the vertical driving section112are connected to each other on the outside of the pixel array section111. The control pulse ABG for driving the charge discharging gate229is applied from the vertical driving section112to the light shielding film237via the wiring. That is, the vertical driving section112controls the control pulse ABG applied to the light shielding film237, whereby the transfer of a charge from the photodiode221to the charge discharging part230by the charge discharging gate229is controlled. Incidentally, the control pulse ABG may be controlled by another part than the vertical driving section112.

[Method of Driving Unit Pixels211A]

A method of driving the unit pixels211A in the CMOS image sensor100will next be described with reference toFIG. 13. Incidentally,FIG. 13is a timing chart of a selection pulse SEL, a transfer pulse TRX, a transfer pulse TRG, a reset pulse RST, and a control pulse ABG for unit pixels211A in an ith row and an (i+1)th row of the pixel array section111in a period of one frame.

First, the transfer pulse TRX, the transfer pulse TRG, and the reset pulse RST are turned on on an all-pixel simultaneous basis. Thereby, the first transfer gate222and the second transfer gate224are turned on, and the floating diffusion region225is reset. As a result, charges of the photodiode221, the memory part223, and the floating diffusion region225are discharged. Thereafter, the transfer pulse TRX is first turned off on an all-pixel simultaneous basis, so that the first transfer gate is turned off. Then, the transfer pulse TRG and the reset pulse RST are turned off, so that the second transfer gate224is turned off. At this point, light exposure is started on an all-pixel simultaneous basis, so that the accumulation of a charge in the photodiode221is started. That is, a period of accumulation of a signal charge is started.

Next, after the passage of a predetermined time, the transfer pulse TRX is turned on and thereby the first transfer gate222is turned on on an all-pixel simultaneous basis, so that a charge accumulated in the photodiode221is transferred to the memory part223. Thereafter, the transfer pulse TRX is turned off on an all-pixel simultaneous basis, so that the first transfer gate222is turned off, and the light exposure is ended on an all-pixel simultaneous basis.

Next, the control pulse ABG is turned on, and thereby the charge discharging gate229is turned on on an all-pixel simultaneous basis, so that an overflow path from the photodiode221to the charge discharging part230is formed. Thereby, a charge generated in the photodiode221after the charge transfer from the photodiode221to the memory part223is discharged into the charge discharging part230via the charge discharging gate229, and is thus prevented from flowing into the memory part223.

At this point, the period of accumulation of the signal charge is ended, and a transition is made to a readout period for reading out a pixel signal based on the charge accumulated in each unit pixel211A. Incidentally, pixel signal readout is performed pixel by pixel or in units of a plurality of pixels. Incidentally, an example of performing pixel signal readout row by row will be shown in the following.

For example, when the pixel signals of unit pixels211A in an ith row are to be read out, the selection pulse SEL for selecting transistors228in the ith row is turned on, so that the unit pixels211A in the ith row are set as objects from which to read out the pixel signals.

Then, the reset pulse RST is first turned on, so that the floating diffusion region225is reset. Thereafter the reset pulse RST is turned off. Then, a reset signal indicating a reset level is supplied from the amplifying transistor227to the column processing section113via the selecting transistor228and the vertical signal line117. The column processing section113reads out the reset level on the basis of the reset signal. Incidentally, a period for reading out the reset level will hereinafter be referred to as a P-period.

Next, the transfer pulse TRG is turned on, and thereby the second transfer gate224is turned on, so that the charge accumulated in the memory part223is transferred to the floating diffusion region225. Then, a charge detection signal indicating a signal level based on the charge transferred to the floating diffusion region225is supplied from the amplifying transistor227to the column processing section113via the selecting transistor228and the vertical signal line117. The column processing section113reads out the signal level on the basis of the charge detection signal. Incidentally, a period for reading out the signal level will hereinafter be referred to as a D-period.

The column processing section113then performs CDS processing for obtaining a difference between the reset level read out in the P-period and the signal level read out in the D-period, and thereby removes noise from the detected signal level.

Thereafter, the selection pulse SEL is turned off, so that the readout period for the unit pixels211A in the ith row is ended, and a transition is made to a readout period for the unit pixels211A in the (i+1)th row. After the readout of signal levels in all rows is completed, a transition is made to the head of the timing chart ofFIG. 13to start an accumulation period for a next frame as required.

A second embodiment of the present invention will next be described with reference toFIG. 14. Incidentally, the second embodiment has a different unit pixel constitution from that of the first embodiment, while the constitution of a CMOS image sensor100is similar to that of the first embodiment. Repeated description of parts common to the first embodiment will be omitted in the following.

As withFIG. 8,FIG. 14is a diagram showing an example of a sectional constitution of a unit pixel211B. Incidentally, inFIG. 14, parts corresponding to those ofFIG. 8are identified by the same reference numerals.

A comparison between the unit pixel211B and the unit pixel211A indicates that the constitution of an insulating film236in a part enclosed by a dotted line A is different and that other parts are the same. Specifically, only the insulating film236between a part of a light shielding film237which part forms a charge discharging gate229between a photodiode221and a charge discharging part230and a semiconductor substrate (silicon substrate) does not have a nitride film having a high breakdown voltage in a second layer of the insulating film236, and is formed by an oxide film alone. Thereby, when a control pulse ABG is applied to the light shielding film237, modulation applied to the semiconductor substrate (silicon substrate) by the control pulse ABG is strengthened in only the part of the charge discharging gate229from which the nitride film is removed, so that the potential barrier of the charge discharging gate229is controlled easily.

In the case of forming this insulating film236, for example, an oxide film in a first layer and the nitride film in the second layer are first formed, and then the part from which to remove the nitride film is covered with a resist. Next, the nitride film in the part covered with the resist is removed by etching. Incidentally, at this time, a part or all of the oxide film in the first layer in the part covered with the resist may be removed. Then, finally, an oxide film in a third layer is formed. Thus, the insulating film236one part of which is formed by an oxide film alone can be formed easily.

A third embodiment of the present invention will next be described with reference toFIGS. 15 to 20. Incidentally, the third embodiment has a different unit pixel constitution from that of the first embodiment, while the constitution of a CMOS image sensor100is similar to that of the first embodiment. Repeated description of parts common to the first embodiment will be omitted in the following.

[Example of Constitution of Unit Pixel211C]

FIG. 15shows an example of a sectional constitution of a unit pixel211C in a direction A-A′ shown inFIG. 18.FIG. 16andFIG. 17are plan views showing an example of constitution of the unit pixel211C. However,FIG. 16shows the constitution excluding a light shielding film237, andFIG. 17shows the constitution including the light shielding film237. Incidentally,FIG. 16andFIG. 17do not show an insulating film236to facilitate the understanding of the figures.FIG. 18is a diagram made by adding a path A-A′ toFIG. 17. Incidentally, inFIGS. 15 to 18, parts corresponding to those ofFIGS. 8 to 11are identified by the same reference numerals.

A comparison between the unit pixel211C and the unit pixel211A indicates that the unit pixel211C and the unit pixel211A are different from each other in that the unit pixel211C does not have a first transfer gate222, a memory part223, and a contact238, and that other parts are the same.

In the unit pixel211C, a charge accumulated in a photodiode221is transferred to a floating diffusion region225via a second transfer gate224, and is retained in the floating diffusion region225. It is thereby possible to increase the area of a light receiving part of the photodiode221, and thus improve light receiving sensitivity, as is clear from a comparison betweenFIG. 17andFIG. 10. In addition, an amount of saturation charge of the photodiode221can be increased. Further, an effect of noise occurring as the same phenomenon as the above-described smear can be reduced.

[Example of Constitution of Driving Signal Lines for Unit Pixels211C]

FIG. 19is a schematic diagram showing an arrangement of unit pixels211C in a pixel array section111. Incidentally, inFIG. 19, description of the reference of each part is omitted to facilitate understanding of the figure.

In the pixel array section111, the unit pixels211C are arranged two-dimensionally in a vertical direction (column direction) and a horizontal direction (row direction). In addition, though not shown inFIG. 19, three driving signal lines are provided for each row, the three driving signal lines being a driving signal line TRX for the gate electrode224A of a second transfer gate224, a driving signal line RST for the gate electrode226A of a reset transistor226, and a driving signal line SEL for the gate electrode228A of a selecting transistor228.

Thus, in the pixel array section111in which the unit pixels211C are arranged, the driving signal line TRX for the gate electrode of the first transfer gate can be omitted as compared with the pixel array section111in which the unit pixels211A are arranged inFIG. 12. A degree of freedom of layout of wiring for the driving signal lines is thereby further improved. In addition, an opening area for the light receiving part of the photodiode221can be further increased.

Further, the need to provide an opening of a light shielding film237for a contact for the gate electrode of the first transfer gate is eliminated, so that the light shielding characteristic of the light shielding film237is further improved. Thereby, further, an amount of incidence of stray light incident from the openings of the light shielding film237is decreased, noise caused by the stray light is decreased, and an S/N ratio is improved.

[Method of Driving Unit Pixels211C]

A method of driving the unit pixels211C in the CMOS image sensor100will next be described with reference toFIG. 20. Incidentally,FIG. 20is a timing chart of a selection pulse SEL, a transfer pulse TRG, a reset pulse RST, and a control pulse ABG for unit pixels211C in an ith row and an (i+1)th row of the pixel array section111in a period of one frame.

First, the transfer pulse TRG and the reset pulse RST are turned on on an all-pixel simultaneous basis. Thereby, the second transfer gate224is turned on, and the floating diffusion region225is reset. As a result, charges of the photodiode221and the floating diffusion region225are discharged. Thereafter, the transfer pulse TRG and the reset pulse RST are turned off, so that the second transfer gate224is turned off. At this point, light exposure is started on an all-pixel simultaneous basis, so that the accumulation of a charge in the photodiode221is started. That is, a period of accumulation of a signal charge is started.

Next, the reset pulse RST is turned on, and thereby the floating diffusion region225is reset, on an all-pixel simultaneous basis.

Next, after the passage of a predetermined time from the start of the signal charge accumulation period, the transfer pulse TRG is turned on and thereby the second transfer gate224is turned on, so that a charge accumulated in the photodiode221is transferred to the floating diffusion region225. Thereafter, the transfer pulse TRG is turned off on an all-pixel simultaneous basis, so that the second transfer gate224is turned off, and the light exposure is ended on an all-pixel simultaneous basis.

Next, the control pulse ABG is turned on, and thereby a charge discharging gate229is turned on on an all-pixel simultaneous basis, so that an overflow path from the photodiode221to a charge discharging part230is formed.

At this point, the period of accumulation of the signal charge is ended, and a transition is made to a readout period for reading out a pixel signal based on the charge accumulated in each unit pixel211C. Incidentally, pixel signal readout is performed pixel by pixel or in units of a plurality of pixels. Incidentally, an example of performing pixel signal readout row by row will be shown in the following.

For example, when the pixel signals of unit pixels211C in an ith row are to be read out, the selection pulse SEL for selecting transistors228in the ith row is turned on, so that the unit pixels211C in the ith row are selected as objects from which to read out the pixel signals.

Then, a charge detection signal indicating a signal level based on the charge transferred to the floating diffusion region225is supplied from an amplifying transistor227to a column processing section113via a selecting transistor228and a vertical signal line117. The column processing section113reads out the signal level on the basis of the charge detection signal.

Next, the reset pulse RST is turned on, so that the floating diffusion region225is reset. Thereafter the reset pulse RST is turned off. Then, a reset signal indicating a reset level is supplied from the amplifying transistor227to the column processing section113via the selecting transistor228and the vertical signal line117. The column processing section113reads out the reset level on the basis of the reset signal.

The column processing section113then performs DDS processing for obtaining a difference between the signal level read out in the D-period and the reset level read out in the P-period, and thereby removes noise from the detected signal level.

Incidentally, when the floating diffusion region225is reset, the switching operation of the reset transistor226causes random kTC noise (thermal noise). This kTC noise cannot be removed precisely unless a reset level before the signal level is read out is used. In this case, however, the reset level after the signal level is read out is used. Therefore, fixed noise such as an offset error or the like can be removed, but the kTC noise cannot be removed.

In addition, there are many crystal defects and a dark current tends to occur at a Si—SiO2interface. Thus, when the charge is retained in the floating diffusion region225, a time during which the charge is retained differs according to order of readout of pixel signals, and there occurs a difference in effect of the dark current on the signal level of each pixel. A difference in noise between pixels due to the difference in effect of the dark current cannot be cancelled out by noise removal using this reset level either.

Thereafter, the selection pulse SEL is turned off, so that the readout period for the unit pixels211C in the ith row is ended, and a transition is made to a readout period for the unit pixels211C in the (i+1)th row. After the readout of pixel levels in all rows is completed, a transition is made to the head of the timing chart ofFIG. 20to start an accumulation period for a next frame as required.

Thus, in the unit pixel211C, as compared with the unit pixel211A, the kTC noise and the noise due to the dark current are increased, but the area of the light receiving part of the photodiode221can be increased. As a result, light receiving sensitivity is improved, and an amount of saturation charge is increased. In addition, an effect of noise occurring as the same phenomenon as the above-described smear can be reduced. The unit pixel211C is therefore suitable for application to a solid-state image pickup device in which each pixel has a small area and the region of a memory part is difficult to secure.

Incidentally, also in the unit pixel211C, as in the unit pixel211B, the insulating film236in only a part corresponding to the charge discharging gate229may be formed by an oxide film alone.

A few examples of constitution of unit pixels in which the light shielding film237can be substituted for the gate electrode of the charge discharging gate229as in the unit pixels211A to211C will next be introduced briefly with reference toFIGS. 21 to 24.

FIG. 21shows a fourth embodiment of the unit pixel, and is a diagram of an example of a sectional constitution of a unit pixel211D, as withFIG. 8. Incidentally, inFIG. 21, parts corresponding to those ofFIG. 8are identified by the same reference numerals, and repeated description of parts common to the first embodiment will be omitted in the following.

The unit pixel211D is different from the unit pixel211A in that the unit pixel211D has an overflow path301formed by providing a P-impurity diffused region302under a gate electrode222A and in a boundary part between a photodiode221and a memory part223.

The potential of the impurity diffused region302needs to be lowered to form the overflow path301. For example, the P-impurity diffused region302can be formed by lowering a P-impurity concentration by lightly doping the impurity diffused region302with an N-impurity. Alternatively, when the impurity diffused region302is doped with a P-impurity at a time of formation of a potential barrier, the P-impurity diffused region302can be formed by lowering the concentration of the P-impurity.

In the unit pixel211D, the overflow path301formed in the boundary part between the photodiode221and the memory part223is used as means for preferentially accumulating a charge generated at a low illuminance in the photodiode221.

The potential barrier of the boundary part between the photodiode221and the memory part223is lowered by providing the P-impurity diffused region302in the boundary part. The part where the potential barrier is lowered is the overflow path301. A charge generated in the photodiode221and going over the potential barrier of the overflow path301automatically leaks into the memory part223and is accumulated in the memory part223. In other words, a generated charge below the potential barrier of the overflow path301is accumulated in the photodiode221.

The overflow path301functions as an intermediate charge transfer part. Specifically, the overflow path301as an intermediate charge transfer part transfers a charge that is generated by photoelectric conversion in the photodiode221and by which a predetermined amount of charge determined by the potential of the overflow path301is exceeded as a signal charge to the memory part223in an exposure period in which all of a plurality of unit pixels simultaneously perform image pickup operation.

Incidentally, in the example ofFIG. 21, the overflow path301is formed by providing the P-impurity diffused region302. However, the overflow path301can also be formed by providing an N-impurity diffused region302in place of the P-impurity diffused region302.

FIG. 22shows a fifth embodiment of the unit pixel, and is a diagram of an example of a sectional constitution of a unit pixel211E, as withFIG. 8. Incidentally, inFIG. 22, parts corresponding to those ofFIG. 8are identified by the same reference numerals, and repeated description of parts common to the first embodiment will be omitted in the following.

The unit pixel211E is formed by providing a memory part223similar to a floating diffusion region225to the constitution of the unit pixel211A inFIG. 8. Specifically, in the unit pixel211E, the gate electrode222A of a first transfer gate222is disposed above a P-type well layer232at a boundary between a photodiode221and the memory part223. In addition, in the unit pixel211E, the memory part223is formed by an N-type layer311similar to that of the floating diffusion region225.

FIG. 23shows a sixth embodiment of the unit pixel, and is a diagram of an example of a sectional constitution of a unit pixel211F, as withFIG. 8. Incidentally, inFIG. 23, parts corresponding to those ofFIG. 8are identified by the same reference numerals, and repeated description of parts common to the first embodiment will be omitted in the following.

The unit pixel211A inFIG. 8has a constitution in which the memory part223is formed by the buried channel235. On the other hand, the unit pixel211F inFIG. 23employs a constitution in which a memory part223is formed by an N-type diffused region322of a buried type.

Action and effect similar to those of the case where the memory part223is formed by the buried channel235can be obtained also in the case where the memory part223is formed by the N-type diffused region322. Specifically, by forming the N-type diffused region322within a P-type well layer232and forming a P-type layer321on the side of a substrate surface, it is possible to prevent a dark current occurring at a Si—SiO2interface from being accumulated in the N-type diffused region322of the memory part223, and thus contribute to an improvement in image quality.

In this case, the impurity concentration of the N-type diffused region322of the memory part223is desirably lower than the impurity concentration of the floating diffusion region225. Such impurity concentration settings can increase efficiency of charge transfer from the memory part223to the floating diffusion region225by a second transfer gate224.

Incidentally, while an example in which the memory part223is formed by the N-type diffused region322of a buried type has been shown in the above, the memory part223may have a constitution that is not of a buried type, though a dark current occurring in the memory part223may increase.

FIG. 24shows a seventh embodiment of the unit pixel, and is a diagram of an example of a sectional constitution of a unit pixel211G, as withFIG. 8. Incidentally, inFIG. 24, parts corresponding to those ofFIG. 8are identified by the same reference numerals, and repeated description of parts common to the first embodiment will be omitted in the following.

While one memory part (MEM)223is disposed between the photodiode221and the floating diffusion region225in the unit pixel211A inFIG. 8, another memory part (MEM2)332is disposed in the unit pixel211G inFIG. 24. That is, the memory part has a two-stage constitution. In addition, a contact334for wiring is connected to an upper part on the memory part332side of the gate electrode331A of a third transfer gate331.

The third transfer gate331transfers a charge accumulated in the memory part223when a transfer pulse TRX2is applied to the gate electrode331A formed of polysilicon via the contact334. The memory part332is formed by an N-type buried channel333formed under the gate electrode331A. The memory part332accumulates the charge transferred from the memory part223by the third transfer gate331. Because the memory part332is formed by the buried channel333, it is possible to suppress the occurrence of a dark current at a Si—SiO2interface, and thus contribute to an improvement in image quality.

The memory part332has a similar constitution to that of the memory part223. Thus, as in the memory part223, an amount of saturation charge of the memory part332in the case where modulation is applied can be increased as compared with a case where modulation is not applied.

In global exposure operation of the unit pixel211G, the charge transferred from the photodiode221can be retained in the memory part223or the memory part332. Thus, for example, charges from different exposure periods can be retained in the respective different memory parts.

Incidentally, also in the unit pixels211D to211G, as in the unit pixel211B, an insulating film236in only a part corresponding to a charge discharging gate229may be formed by an oxide film alone.

The above description has been made of an example in which the light shielding film237is substituted for the gate electrode of the charge discharging gate229. However, for example, the light shielding film237can be substituted for the gate electrode222A of the first transfer gate222.

FIGS. 25 to 30show an embodiment in which a light shielding film237is substituted for the gate electrode of a first transfer gate. Incidentally, as compared with the first embodiment, the eighth embodiment has a different unit pixel constitution, while the constitution of a CMOS image sensor100is similar to that of the first embodiment. Repeated description of parts common to the first embodiment will be omitted in the following.

[Example of Constitution of Unit Pixel211H]

FIG. 25shows an example of a sectional constitution of a unit pixel211H in a direction A-A′ shown inFIG. 28.FIG. 26andFIG. 27are plan views showing an example of constitution of the unit pixel211H. However,FIG. 26shows the constitution excluding a light shielding film237, andFIG. 27shows the constitution including the light shielding film237. Incidentally,FIG. 26andFIG. 27do not show an insulating film236to facilitate the understanding of the figures.FIG. 28is a diagram made by adding a path A-A′ toFIG. 27. Incidentally, inFIGS. 25 to 28, parts corresponding to those ofFIGS. 8 to 11are identified by the same reference numerals.

The unit pixel211H inFIG. 25is different from the unit pixel211A inFIG. 8in the following respects. First, the first transfer gate222including the gate electrode222A and the contact238are not provided, but a first transfer gate401is provided instead. As with the charge discharging gate229in the unit pixel211A, the first transfer gate401transfers a charge accumulated in a photodiode221when a transfer pulse TRX is applied to the light shielding film237. That is, in the first transfer gate401, the light shielding film237functions as a gate electrode. Specifically, when the transfer pulse TRX of a positive voltage is applied to the light shielding film237, the potential of a potential barrier between the photodiode221and a memory part223is heightened, and the height of the potential barrier is lowered. The potential of the memory part223is also heightened. Thereby, an overflow path is formed between the photodiode221and the memory part223, and the charge accumulated in the photodiode221is transferred to the memory part223whose potential is heightened.

In addition, as in the unit pixel211B inFIG. 14, a nitride film in a second layer of an insulating film236is removed and only an oxide film forms the insulating film236in only parts corresponding to the first transfer gate401and the memory part223. Thus, the potential barrier of the first transfer gate401and the potential of the memory part223are controlled easily.

Further, a charge discharging gate402including a gate electrode402A and an insulating film402B is provided between the photodiode221and a charge discharging part230, and a contact403is connected to an upper part of the gate electrode402A.

[Example of Constitution of Driving Signal Lines for Unit Pixels211H]

FIG. 29is a schematic diagram showing an arrangement of the unit pixels211H in a pixel array section111. Incidentally, inFIG. 29, description of the reference of each part is omitted to facilitate understanding of the figure.

In the pixel array section111, the unit pixels211H are arranged two-dimensionally in a vertical direction (column direction) and a horizontal direction (row direction). In addition, though not shown inFIG. 29, four driving signal lines are provided for each row, the four driving signal lines being a driving signal line TRG for the gate electrode224A of a second transfer gate224, a driving signal line RST for the gate electrode226A of a reset transistor226, a driving signal line SEL for the gate electrode228A of a selecting transistor228, and a driving signal line ABG for the gate electrode402A of the charge discharging gate402.

Thus, in the pixel array section111in which the unit pixels211H are arranged, the driving signal line TRX for the gate electrode of the first transfer gate can be omitted as compared with the pixel array section in which the unit pixels11are arranged inFIG. 5. A degree of freedom of layout of wiring for the driving signal lines is thereby improved. In addition, an opening area for the light receiving part of the photodiode221can be increased, the overall light receiving sensitivity of each pixel is improved, and in particular, the light receiving sensitivity of pixels in the vicinity of an end part of an angle of view where an angle of incidence of incident light is increased is improved. In addition, the shading of the incident light by the driving signal lines is decreased, so that the light receiving sensitivity is further improved.

Further, the need to provide an opening of the light shielding film237for the contact for the gate electrode of the first transfer gate is eliminated, so that the light shielding characteristic of the light shielding film237is improved. Thereby, an amount of incidence of stray light incident from the openings of the light shielding film237is decreased, noise caused by the stray light is decreased, and an S/N ratio is improved.

Incidentally, the light shielding film237is for example connected to wiring extending from a vertical driving section112in a peripheral part on the outside of the pixel array section111. The transfer pulse TRX for driving the first transfer gate401is applied from the vertical driving section112to the light shielding film237via the wiring.

[Method of Driving Unit Pixels211H]

A method of driving the unit pixels211H in the CMOS image sensor100will next be described with reference toFIG. 30. Incidentally,FIG. 30is a timing chart of a selection pulse SEL, a control pulse ABG, a transfer pulse TRG, a reset pulse RST, and a transfer pulse TRX for unit pixels211H in an ith row and an (i+1)th row of the pixel array section111in a period of one frame.

First, the transfer pulse TRX is turned on, and the transfer pulse TRG and the reset pulse RST are turned on on an all-pixel simultaneous basis. Thereby, on an all-pixel simultaneous basis, the first transfer gate401and the second transfer gate224are turned on, and a floating diffusion region225is reset. As a result, charges of the photodiode221, the memory part223, and the floating diffusion region225are discharged. Thereafter, the transfer pulse TRX is first turned off, so that the first transfer gate401is turned off on an all-pixel simultaneous basis. Then, the transfer pulse TRG and the reset pulse RST are turned off on an all-pixel simultaneous basis, so that the second transfer gate224is turned off. At this point, light exposure is started on an all-pixel simultaneous basis, so that the accumulation of a charge in the photodiode221is started. That is, a period of accumulation of a signal charge is started.

Next, after the passage of a predetermined time, the transfer pulse TRX is turned on, and thereby the first transfer gate401is turned on on an all-pixel simultaneous basis, so that a charge accumulated in the photodiode221is transferred to the memory part223. Thereafter, the transfer pulse TRX is turned off, so that the first transfer gate401is turned off on an all-pixel simultaneous basis, and the light exposure is ended on an all-pixel simultaneous basis.

Next, on an all-pixel simultaneous basis, the control pulse ABG is turned on, and thereby the charge discharging gate402is turned on, so that an overflow path from the photodiode221to the charge discharging part230is formed.

Incidentally, the processes of readout periods are similar to the processes of readout periods of the unit pixels211A described with reference toFIG. 13, and therefore repeated description thereof will be omitted.

[Example of Modification of Unit Pixels211H]

When the transfer pulse TRX is applied only from the peripheral part of the pixel array section111as described above, a rising edge or a falling edge of the transfer pulse TRX may be faster in unit pixels211H nearer to the peripheral part of the pixel array section111and may be slower in unit pixels211H nearer to the central part of the pixel array section111. That is, there may occur a difference in timing of turning on or off the transfer pulse TRX depending on the position of the unit pixel211H, and there may consequently occur a difference in the control of turning on or off the first transfer gate401. When the difference becomes large, shading occurs within a photographed image.

An example of a measure against this will be described in the following with reference toFIG. 31andFIG. 32.

As withFIG. 25,FIG. 31shows an example of a sectional constitution of a unit pixel211H in a direction A-A′ shown inFIG. 28.

A comparison betweenFIG. 31andFIG. 25indicates thatFIG. 31andFIG. 25are different from each other in that a contact411is connected to an upper part of a light shielding film237on an upper right of a memory part223inFIG. 31.FIG. 31andFIG. 25are otherwise similar to each other.

FIG. 32is a schematic diagram showing an arrangement of the unit pixels211H ofFIG. 31in a pixel array section111. Incidentally, inFIG. 32, description of the reference of each part except contacts411is omitted to facilitate understanding of the figure.

A comparison betweenFIG. 32andFIG. 29indicates that inFIG. 32, a driving signal line TRX is provided for each row and the driving signal line TRX is shunt connected to the light shielding film237via contacts411. The light shielding film237and a vertical driving section112are thereby connected to each other in each pixel within the pixel array section111. It is consequently possible to lower a CR time constant for the transfer pulse TRX, and reduce differences in the timing of turning on or off the first transfer gate401between pixels.

Incidentally, in this case, while the number of driving signal lines is the same as in the related-art case ofFIG. 5, the number of openings provided in the light shielding film237can be reduced, so that the light shielding characteristic of the light shielding film237is improved.

<9. Examples of Modification>

While the above description has shown examples in which the present invention is applied to the charge discharging gate and the first transfer gate, the present invention is also applicable to other gates and transistors for transferring a charge. However, when the present invention is applied to a gate or a transistor driving on a row-by-row basis such for example as the reset transistor226or the selecting transistor228, there arises a need to separate the light shielding film for each row. Therefore a gap is formed in the light shielding film in each row, so that the light shielding characteristic is degraded. It is thus desirable to apply the present invention to gates and transistors driven on an all-pixel simultaneous basis, such as the charge discharging gate and the first transfer gate described above as well as the second transfer gate224inFIG. 15, the third transfer gate331inFIG. 24, and the like.

Incidentally, the charge discharging gate is not required to have high levels of characteristics as compared with the other gates and transistors. For example, when an overflow path can be formed between the photodiode and the charge discharging part, variation in the timing of turning on or off the control pulse ABG or the voltage of the control pulse ABG between pixels do not present much of a problem. It is thus considered that the present invention is most suitably applied to the charge discharging gate.

In addition, the method of connecting the driving signal line inFIG. 32can be adopted also when the present invention is applied to other gates or transistors. For example, the driving signal line for supplying the control pulse ABG in the first embodiment may be of a configuration as shown inFIG. 32.

Further, when the method of connecting the driving signal line inFIG. 32is used, the contacts for connecting the driving signal line do not necessarily need to be provided in each unit pixel, and contacts may be arranged to such an extent as to be able to satisfy necessary pulse characteristics.

In addition, elements other than tungsten described above can also be used for the light shielding film237. However, it is desirable to use elements that have as low an electric resistance as possible and which have excellent light shielding performance and excellent workability.

Incidentally, all pixels in embodiments of the present invention refer to all of pixels of a part appearing in an image, and dummy pixels and the like are excluded. In addition, in embodiments of the present invention, when time difference or image distortion is sufficiently small to such a degree as to present no problem, high-speed scanning in units of a plurality of rows (for example a few ten rows) can be performed instead of all-pixel simultaneous operation. Further, in embodiments of the present invention, it is possible to apply global shutter operation not only to all pixels appearing in an image but also to a predetermined plurality of rows.

In addition, the conduction types of the device structure in the unit pixels211shown in the above are a mere example. The N-type and the P-type may be reversed, and the conduction type of the substrate231may be either of the N-type and the P-type.

Further, the present invention is not limited to application to solid-state image pickup devices. That is, the present invention is applicable to electronic devices in general using a solid-state image pickup device in an image capturing section (photoelectric converting section), which electronic devices include image pickup devices such as digital still cameras and video cameras, portable terminal devices having an image pickup function, copiers using a solid-state image pickup device in an image reading section, and the like. The solid-state image pickup devices may be formed as one chip, or may be in the form of a module having an image pickup function in which module an image pickup section and a signal processing section or an optical system are collectively packaged.

[Example of Configuration of Electronic Device to which Present Invention is Applied]

FIG. 33is a block diagram showing an example of configuration of an image pickup device as an electronic device to which the present invention is applied.

The image pickup device600ofFIG. 33includes an optical section601composed of a lens group and the like, a solid-state image pickup element (image pickup device)602employing each of the constitutions of the unit pixels211described above, and a DSP (Digital Signal Processor) circuit603as a camera signal processing circuit. The image pickup device600also includes a frame memory604, a display section605, a recording section606, an operating section607, and a power supply section608. The DSP circuit603, the frame memory604, the display section605, the recording section606, the operating section607, and the power supply section608are interconnected via a bus line609.

The optical section601captures incident light (image light) from a subject, and forms an image on an image pickup surface of the solid-state image pickup element602. The solid-state image pickup element602converts an amount of incident light whose image is formed on the image pickup surface by the optical section601into an electric signal in pixel units, and outputs the electric signal as a pixel signal. The solid-state image pickup elements of the CMOS image sensors100according to the above-described embodiments or the like, that is, a solid-state image pickup element capable of achieving image pickup free from distortion by global exposure can be used as the solid-state image pickup element602.

The display section605is for example formed by a panel type display device such as a liquid crystal panel or an organic EL (electro luminescence) panel. The display section605displays a moving image or a still image picked up by the solid-state image pickup element602. The recording section606records the moving image or the still image picked up by the solid-state image pickup element602onto a recoding medium such as a video tape or a DVD (Digital Versatile Disk).

The operating section607issues an operation command for various functions of the image pickup device600under operation by a user. The power supply section608supplies various kinds of power as operating power for the DSP circuit603, the frame memory604, the display section605, the recording section606, and the operating section607to these supply objects as appropriate.

As described above, by using the CMOS image sensors100according to the above-described embodiments as the solid-state image pickup element602, noise caused by variations in threshold value of pixel transistors can be reduced, and therefore a high S/N can be ensured. Thus, the image quality of picked-up images can be enhanced also in the image pickup device600such as a video camera or a digital still camera as well as a camera module for a mobile device such as a portable telephone.

In addition, the foregoing embodiments have been described by taking as an example a case where the present invention is applied to a CMOS image sensor formed by arranging unit pixels sensing a signal charge corresponding to an amount of visible light as a physical quantity in the form of a matrix. However, the present invention is not limited to application to CMOS image sensors, but is applicable to solid-state image pickup elements of a column system in general which elements are formed with a column processing section arranged for each pixel column of a pixel array section.

In addition, the present invention is not limited to application to solid-state image pickup devices for sensing a distribution of amounts of incident visible light and picking up the distribution as an image. The present invention is applicable to solid-state image pickup devices for picking up a distribution of amounts of incidence of infrared rays, X-rays, particles or the like as an image and, in a broad sense, solid-state image pickup devices (physical quantity distribution sensing devices) in general including for example fingerprint detecting sensors for sensing a distribution of another physical quantity such as pressure or capacitance, and picking up the distribution as an image.

Embodiments of the present invention are not limited to the above-described embodiments, but various changes can be made without departing from the spirit of the present invention.

The present application contains subject matter related to that disclosed in Japanese Priority Patent Application JP 2010-080525 filed in the Japan Patent Office on Mar. 31, 2010, the entire content of which is hereby incorporated by reference.