MIXER WITH BIAS SHARING

This disclosure provides systems, methods, and devices for wireless communications that support downconversion in a radio frequency (RF) system. In a first aspect, an apparatus for wireless communications includes a first mixer coupled to an input node; a second mixer coupled to the input node; and a first mixer bias circuit configured to output a first local oscillator (LO) signal, the first mixer bias circuit coupled to the first mixer and to the second mixer to output the first LO signal to the first mixer and to the second mixer. Other aspects and features are also claimed and described.

TECHNICAL FIELD

Aspects of the present disclosure relate generally to wireless communication systems, and more particularly, to radio frequency (RF) processing circuitry for wireless communication systems. Some features may enable and provide improved communications, including improved operation of RF transceivers using local oscillator (LO) signals.

INTRODUCTION

Wireless communication networks are widely deployed to provide various communication services such as voice, video, packet data, messaging, broadcast, and the like. These wireless networks may be multiple-access networks capable of supporting multiple users by sharing the available network resources. Such networks may be multiple access networks that support communications for multiple users by sharing the available network resources.

A wireless communication network may include several components. These components may include wireless communication devices, such as base stations (or node Bs) that may support communication for a number of user equipments (UEs). A UE may communicate with a base station via downlink and uplink. The downlink (or forward link) refers to the communication link from the base station to the UE, and the uplink (or reverse link) refers to the communication link from the UE to the base station.

A base station may transmit data and control information on a downlink to a UE or may receive data and control information on an uplink from the UE. On the downlink, a transmission from the base station may encounter interference due to transmissions from neighbor base stations or from other wireless radio frequency (RF) transmitters. On the uplink, a transmission from the UE may encounter interference from uplink transmissions of other UEs communicating with the neighbor base stations or from other wireless RF transmitters. This interference may degrade performance on both the downlink and uplink.

Modern wireless communication networks are sophisticated networks that involve operation on multiple frequencies and multiple frequency ranges. RF signals in different frequencies and ranges may use different components or different configurations of components to support a device operating on these wireless communication networks and maintain high signal integrity and high bandwidth across a range of possible network conditions. The duplication of components and number of supported configurations presents challenges in designing RF systems for the UEs and BSs operating on wireless communication networks.

One example component used throughout an RF system is a mixer. A mixer is a component that downconverts an information signal from a signal at one frequency to a signal at a lower frequency while maintaining the information in the signal. Mixers operate by combining the information signal with a oscillating signal, with the oscillating signal being at a chosen frequency and phase offset to obtain a desired output signal at the lower frequency. The presence of multiple mixers may offer higher signal quality, which results in higher data rates at higher environmental noise levels, which improves the user experience on the wireless network. However, the presence of many mixers of various configurations results in significant duplication both of the mixers themselves but also circuitry for operating the mixers.

BRIEF SUMMARY OF SOME EXAMPLES

According to aspects of this disclosure, supporting circuitry may be reduced by sharing circuitry between mixers. For example, circuitry for biasing a mixer to configure that mixer for a particular operation may be shared between mixers that operate with a similar or same configuration. A mixer bias circuit is one such circuit that may be shared, in some aspects of the disclosure, between mixers to reduce circuitry. In some embodiments, a mixer bias circuit may be shared between auxiliary mixers of a set of mixers in which the auxiliary mixers are similarly configured to operate with a same main mixer. The selection of auxiliary mixers to share the mixer bias circuit is done to equally balance a load on other circuitry such that impact to the rest of the RF system is reduced (or made negligible). For example, mixer bias circuits operate from local oscillator (LO) signals, and the loading on the LO signals is important for maintaining the phase of the LO signals with respect to each other. An unbalanced load may cause the LO signals to be less synchronized, reducing the quality of the downconverted signal, potentially resulting in lost data or operation at lower data rates. Coupling similarly configured mixers to a shared mixer bias circuit allows loading on the LO signals to remain balanced.

Some RF systems include converged receivers, in which a single RF system processes signals across multiple frequencies and/or technologies. One example converged receiver is a receiver that is configured to process multiple sub-bands of sub-6 GHz signals. For example, an RF signal may include multiple sub-6 GHz RF signals (e.g., for inter-band carrier aggregation (CA) operation), such as a combination of a B71 sub-band signal (˜600 MHz) with a B2 sub-band Tx aggressor at the 3rd harmonic (˜1.8 GHz). Another example converged receiver is a receiver that may be configured to process sub-6 GHz signals (e.g., 2G/3G/4G/FR1 5G) and mmWave IF signals (e.g., FR2 5G). A converged receiver may have more desense mechanisms due to relationships between the 3rdand 5thharmonics of the potential signal frequencies. In some embodiments of the disclosure, the mixers are part of a converged receiver, and the mixers are harmonic reject mixers (HRMs) that reduce 3rdand 5thharmonics. The die area of such a converged receiver is larger to accommodate sets of mixers for operating at many frequencies and the mixer's accompanying bias circuitry. The reduction of die area by sharing circuitry, such as certain mixer bias circuits, without affecting other aspects of the circuit, such as loading on the LO signals, reduces the cost of the RF receiver and likewise the wireless device operating on the wireless networks.

In some aspects, a harmonic rejection mixer (HRM) layout is disclosed wherein auxiliary mixer biasing circuits and the LO drivers for like phases are shared. The sharing reduces a number of drivers, buffers, and/or other circuitry. The auxiliary mixers may be sized at approximately 50% the size of the main mixer when there are two auxiliary mixers to maintain a common load on each of the mixer bias circuits. Other ratios of sizes may be used to maintain a balance on the LO signals based on characteristics of the main and auxiliary mixers and the ratio of number of main to auxiliary mixers. In the example of two auxiliary mixers to one main mixer, that each auxiliary mixer is half the size of the main mixer results in the load from the two auxiliary mixers on an auxiliary mixer bias circuit being similar to the load on a main mixer bias circuit from the main mixer.

In one aspect of the disclosure, an apparatus includes an input node configured to receive a radio frequency (RF) signal; a first mixer coupled to the input node; a second mixer coupled to the input node; and a first mixer bias circuit configured to output a first local oscillator (LO) signal, the first mixer bias circuit coupled to the first mixer and to the second mixer to output the first LO signal to the first mixer and to the second mixer. The received RF signal may be, for example, a sub-6 GHz RF signal, a mmWave RF signal, and/or a mmWave IF signal.

In one aspect of the disclosure, a method for wireless communication includes generating a first set of local oscillator (LO) signals for a first mixer; generating a second set of local oscillator (LO) signals for sharing between at least a second mixer and a third mixer; inputting a radio frequency (RF) signal to the first mixer, to the second mixer, and to the third mixer to determine a downconverted signal corresponding to the RF signal; and determining output data from the downconverted signal.

In an additional aspect of the disclosure, an apparatus includes at least one processor and a memory coupled to the at least one processor. The at least one processor is configured to perform operations controlling wireless communications including controlling: generating a first set of local oscillator (LO) signals for a first mixer; generating a second set of local oscillator (LO) signals for sharing between at least a second mixer and a third mixer; inputting a radio frequency (RF) signal to the first mixer, to the second mixer, and to the third mixer to determine a downconverted signal corresponding to the RF signal; and the processor configured to perform operations comprising determining output data from the downconverted signal.

In an additional aspect of the disclosure, an apparatus includes means for means for downconverting a radio frequency (RF) signal to a baseband signal, the downconverting means comprising a plurality of mixers; means for generating one or more local oscillator (LO) signals for sharing by some of the plurality of mixers of the downconverting means; and means for determining output data from the baseband signal.

In an additional aspect of the disclosure, a non-transitory computer-readable medium stores instructions that, when executed by a processor, cause the processor to perform operations. The operations include controlling wireless communications including controlling: generating a first set of local oscillator (LO) signals for a first mixer; generating a second set of local oscillator (LO) signals for sharing between at least a second mixer and a third mixer; inputting a radio frequency (RF) signal to the first mixer, to the second mixer, and to the third mixer to determine a downconverted signal corresponding to the RF signal; and the processor configured to perform operations comprising determining output data from the downconverted signal.

As used herein, a “radio frequency” signal is a signal having a frequency above baseband, which includes, in an example embodiment of a heterodyne receiver, intermediate frequency signals.

As used herein, an “intermediate frequency” signal is a RF signal that has been downconverted from another RF signal to a frequency that is above baseband, such as in an example embodiment of a heterodyne mmWave transceiver that receives a mmWave RF signal and downconverts the mmWave RF signal to a mmWave IF signal that is further processed, such as through further downconversion, to a lower frequency RF signal or a baseband signal.

DETAILED DESCRIPTION

The present disclosure provides systems, apparatus, methods, and computer-readable media that support wireless communications. Mixers of a harmonic rejection mixer (HRM) are configured to share a mixer biasing circuit to reduce die size of the mixer and the RF transceiver that the mixer is embedded in. For example, auxiliary mixer biasing and LO drivers for like phases may be combined and shared across mixers, which may reduce a number of LO drivers and/or buffers. The sharing may be supported by sizing the auxiliary mixer to balance load across the RF transceiver on the local oscillator signals. For example, auxiliary mixers may be sized at 50% of the main mixer to balance loading between eight phases of local oscillator signals.

Particular implementations of the subject matter described in this disclosure may be implemented to realize one or more of the following potential advantages or benefits. The reduced die size and number of circuitry components reduces die size of the mixer, downconverter, and/or RF transceiver. Reduced die size allows the RF transceiver to fit in smaller devices, offering smaller form factors to the user, and reduce power consumption, offering longer mobile device operating times to the user. The shared mixer bias circuit may also provide better harmonic rejection due to the reduced number of routing asymmetries made possible by the fewer number of bias circuits.

Devices, networks, and systems may be configured to communicate via one or more portions of the electromagnetic spectrum. The electromagnetic spectrum is often subdivided, based on frequency or wavelength, into various classes, bands, channels, etc. In 5G NR two initial operating bands have been identified as frequency range designations FR1 (410 MHz-7.125 GHz) and FR2 (24.25 GHz-52.6 GHz). The frequencies between FR1 and FR2 are often referred to as mid-band frequencies. Although a portion of FR1 is greater than 6 GHz, FR1 is often referred to (interchangeably) as a “sub-6 GHz” band in various documents and articles. A similar nomenclature issue sometimes occurs with regard to FR2, which is often referred to (interchangeably) as a “millimeter wave” (mmWave) band in documents and articles, despite being different from the extremely high frequency (EHF) band (30 GHz-300 GHz) which is identified by the International Telecommunications Union (ITU) as a “mmWave” band.

While aspects and implementations are described in this application by illustration to some examples, those skilled in the art will understand that additional implementations and use cases may come about in many different arrangements and scenarios. Innovations described herein may be implemented across many differing platform types, devices, systems, shapes, sizes, packaging arrangements. For example, implementations or uses may come about via integrated chip implementations or other non-module-component based devices (e.g., end-user devices, vehicles, communication devices, computing devices, industrial equipment, retail devices or purchasing devices, medical devices, AI-enabled devices, etc.). While some examples may or may not be specifically directed to use cases or applications, a wide assortment of applicability of described innovations may occur. Implementations may range from chip-level or modular components to non-modular, non-chip-level implementations and further to aggregated, distributed, or original equipment manufacturer (OEM) devices or systems incorporating one or more described aspects. In some practical settings, devices incorporating described aspects and features may also necessarily include additional components and features for implementation and practice of claimed and described aspects. It is intended that innovations described herein may be practiced in a wide variety of implementations, including both large devices or small devices, chip-level components, multi-component systems (e.g., radio frequency (RF)-chain, communication interface, processor), distributed arrangements, end-user devices, etc. of varying sizes, shapes, and constitution.

FIG.1is a block diagram illustrating details of an example wireless communication system according to one or more aspects. The wireless communication system may include wireless network100. Wireless network100may, for example, include a 5G wireless network. As appreciated by those skilled in the art, components appearing inFIG.1are likely to have related counterparts in other network arrangements including, for example, cellular-style network arrangements and non-cellular-style-network arrangements (e.g., device to device or peer to peer or ad hoc network arrangements, etc.).

FIG.2is a block diagram illustrating examples of base station105and UE115according to one or more aspects. Base station105and UE115may be any of the base stations and one of the UEs inFIG.1. For a restricted association scenario (as mentioned above), base station105may be small cell base station105finFIG.1, and UE115may be UE115cor115doperating in a service area of base station105f, which in order to access small cell base station105f, would be included in a list of accessible UEs for small cell base station105f. Base station105may also be a base station of some other type. As shown inFIG.2, base station105may be equipped with antennas234athrough234t, and UE115may be equipped with antennas252athrough252rfor facilitating wireless communications.

At base station105, transmit processor220may receive data from data source212and control information from controller240, such as a processor. The control information may be for a physical broadcast channel (PBCH), a physical control format indicator channel (PCFICH), a physical hybrid-ARQ (automatic repeat request) indicator channel (PHICH), a physical downlink control channel (PDCCH), an enhanced physical downlink control channel (EPDCCH), an MTC physical downlink control channel (MPDCCH), etc. The data may be for a physical downlink shared channel (PDSCH), etc. Additionally, transmit processor220may process (e.g., encode and symbol map) the data and control information to obtain data symbols and control symbols, respectively. Transmit processor220may also generate reference symbols, e.g., for the primary synchronization signal (PSS) and secondary synchronization signal (SSS), and cell-specific reference signal. Transmit (TX) MIMO processor230may perform spatial processing (e.g., precoding) on the data symbols, the control symbols, or the reference symbols, if applicable, and may provide output symbol streams to modulators (MODs)232athrough232t. For example, spatial processing performed on the data symbols, the control symbols, or the reference symbols may include precoding. Each modulator232may process a respective output symbol stream (e.g., for OFDM, etc.) to obtain an output sample stream. Each modulator232may additionally or alternatively process (e.g., convert to analog, amplify, filter, and upconvert) the output sample stream to obtain a downlink signal. Downlink signals from modulators232athrough232tmay be transmitted via antennas234athrough234t, respectively.

Controllers240and280may direct the operation at base station105and UE115, respectively. Controller240or other processors and modules at base station105or controller280or other processors and modules at UE115may perform or direct the execution of various processes for the techniques described herein, such as to perform or direct the execution illustrated inFIG.5, or other processes for the techniques described herein. Memories242and282may store data and program codes for base station105and UE115, respectively. Scheduler244may schedule UEs for data transmission on the downlink or the uplink.

FIG.3is a block diagram illustrating a wireless receiver circuit300according to one or more aspects. In some embodiments, the receiver circuit300may be part of a converged sub-6 Ghz and mmWave radio frequency (RF) transceiver, a sub-6 GHz radio frequency (RF) transceiver, or a mmWave radio frequency (RF) transceiver. In some embodiments, portions or all of the RF transceiver may be located in a single integrated circuit (IC) sharing a common substrate. The receiver circuit300may include an antenna312to receive radio frequency (RF) signals, such as a phase antenna array. The antenna312is coupled to a RF front-end (RFFE)310, which may include duplexers, SAW filters, switches, LNAs, and/or other transmit or receive circuits for conditioning signals received from the antenna312. In some embodiments, the RFFE310may include separate circuits for conditioning or otherwise processing sub-6 GHz signals, mmWave signals, satellite signals, and/or other signals. For example, the RFFE310may include a first plurality of circuits for conditioning a sub-6 GHz signal for further processing by other circuitry and a second plurality of circuits for conditioning a mmWave RF signal for further processing by other circuitry. The output of the RFFE310in this example may be a input RF signal to other circuitry comprising the conditioned sub-6 GHz signal and a conditioned mmWave IF signal. The RFFE310is coupled to an amplifier320, such as a low noise amplifier (LNA). The amplifier320is coupled to one or more downconverters330A,330B, and330C. Each of the downconverters330A,330B, and330C may include mixers332, baseband filters (BBFs)334, and/or analog-to-digital converters (ADCs)336. The downconverters330A,330B,330C may include one or more harmonic rejection mixers (HRMs). In some embodiments, the amplifier320is shared on an IC with one or more of the RFFE310and/or the downconverters330A,330B, and330C.

Interference between wireless signals received at antenna312and processed through RFFE310, amplifier320, and downconverters330A-C complicates operation of the receiver circuit300, particularly when processing a large range of potential frequencies. For example, co-location of processing paths for sub-6 Ghz and mmWave signals in an integrated circuit can create interference between the sub-6 GHz signal harmonics and the mmWave signals. Interference between sub-6 GHz signals and mmWave signals may occur because mmWave IF signals corresponding to mmWave RF signals received at an antenna from over-the-air may be located near to sub-6 GHz signals in frequency (e.g., within 1-6 GHz) and/or located at harmonics of the sub-6 GHz (e.g., at integer multiples of the sub-6 GHz signals).

Interference between wireless signals may be further complicated by carrier aggregation (CA) operation. Carrier aggregation (CA) involves the combination of one or more carrier RF signals to carry a single data stream. Carrier aggregation (CA) improves the flexibility of the wireless devices and improves network utilization by allowing devices to be assigned different numbers of carriers for different periods of time based, at least in part, on historical, instantaneous, and/or predicted bandwidth use by the wireless device. Thus, when a mobile device needs additional bandwidth, additional carriers may be assigned to that wireless device, and then de-assigned and re-assigned to other mobile devices when bandwidth demands change. As carriers are assigned and de-assigned from a mobile device, the interaction of wireless signals may change. For example, different carriers in CA may be in different bands, and certain bands may have harmonics that overlap and/or otherwise interfere with certain other bands.

A controller340may detect conditions in the RF signal received from the antenna312or receive information regarding the carrier configuration from higher levels, such as a MAC layer or network layer. The controller340may configure components of the receiver circuit300to activate, deactivate, or control portions of the receiver circuit300to process an input RF signal. In some embodiments, the controller340configures components to reduce interference between bands within the receiver circuit300. In some embodiments, the controller340may configure mixers in one or more processing paths of a RF transceiver, such as within the downconverters330A,330B, and330C, based on an expected or received RF input signal from the antenna.

In exemplary embodiments of the receiver circuit300, the mixer332may include multiple mixers sharing a bias signal generated by a shared mixer bias circuit according to the embodiments described with reference toFIG.4,FIG.5, andFIG.6.

FIG.4is a circuit diagram illustrating a harmonic rejection mixer (HRM) with a shared mixer bias circuit according to one or more aspects of the disclosure. A mixer400may include an input node402for receiving a radio frequency (RF) signal for downconversion. The input node402may be coupled to an amplifier410that is part of the mixer332or that is the low noise amplifier (LNA)320. The amplifier410may include one or more amplifiers. For example, one amplifier410may drive each of the mixers422,424,426A-B, and428A-B. As another example, three amplifiers may separately drive three pairs of mixers422-424,426A-B, and428A-B from one or more RF inputs. In some embodiments, the mixer400may be coupled to receive the antenna signal without the amplifier410in a mixer-first transceiver configuration. The mixer400includes a first output node404and a second output node406configured to output downconverted signals, which may be an intermediate frequency (IF) signal or a baseband (BB) signal. In embodiments in which the mixer400outputs a baseband (BB) signal, the output node404outputs an I-channel baseband signal and may be coupled to a I-channel baseband filter (BBF)432and the output node406outputs a Q-channel baseband signal and may be coupled to a Q-channel baseband filter (BBF)434. A baseband processor may be coupled to the filters432and434for decoding the baseband signal.

The mixer400may include mixers in which some mixers share a bias signal output by a shared mixer bias circuit. A shared signal of a shared mixer bias circuit refers to a configuration in which one signal line of the mixer bias circuit is coupled to two or more mixers. In some embodiments, a shared signal may refer to a length of signal line that terminates on one end at one buffer and at the other end at two buffers. The sharing of a local oscillator (LO) signal between mixers reduces the amount of circuitry in the mixer. For example, the number of local oscillator (LO) signal drivers and buffers may be reduced. Further, the number of mixer bias circuits may be reduced, which reduces an amount of die area for the mixer.

The shared bias signal may be shared among any two or more mixers. In one example embodiment, auxiliary mixers in an I- and Q-channel arrangement may be configured to share the bias signal as shown inFIG.4. The mixer400includes four auxiliary mixers: first mixer426A, second mixer426B, third mixer428A, and fourth mixer428B. The first mixer426A and third mixer428A may be configured as I- and Q-channel of a first auxiliary mixer, respectively. The second mixer426B and fourth mixer428B may be configured as I- and Q-channel of a second auxiliary mixer, respectively. A first bias circuit414may be coupled to apply local oscillator (LO) signals to the mixers426A,426B,428A, and428B.

At least one LO signal output by the first mixer bias circuit414may be shared between at least two of the mixers426A,426B,428A, and428B. For example, a first LO signal, such as a clock signal at a 45-degree phase offset, may be output to the first mixer426A and the second mixer426B. Additional LO signals may be shared from the mixer bias circuit414to the mixers. For example, a second LO signal, such as a clock signal at a 225-degree phase offset, may be output to the first mixer426A and the second mixer426B. As another example, a third LO signal, such as a clock signal at a 135-degree phase offset, may be output to the third mixer428A and the fourth mixer428B. As a further example, a fourth LO signal, such as a clock signal at a 315-degree phase offset, may be output to the third mixer428A and the fourth mixer428B.

The mixer400may include main and auxiliary mixers arranged for determining I- and Q-channel output signals. The first mixer426A and the third mixer428A form a first auxiliary mixer; the second mixer426B and the fourth mixer428B form a second auxiliary mixer. Additional mixers422and424form a primary mixer coupled to the same input node402as the first and second auxiliary mixers. The mixers422and424may receive LO signals from another mixer bias circuit412. For example, the mixer bias circuit412may output a 0-degree and 180-degree phase offset LO signal to the mixer422and output a 90-degree and 270-degree phase offset LO signal to the mixer424. The output of mixer422is a contribution to an I-channel baseband signal, and the output of mixer424is a contribution to a Q-channel baseband signal.

In the mixer400, the auxiliary mixer biasing and LO drivers for like phases are combined, which reduces a number of LO drivers and/or buffers from 12 (if each auxiliary mixer had a separate mixer bias circuit) to 8 (in the embodiment ofFIG.4in which two auxiliary mixers share a mixer bias circuit). The number of mixer bias circuits is reduced from 3 (one bias circuit for each of the first auxiliary, second auxiliary, and main mixer) to 2 (one shared bias circuit for the first and second auxiliary mixers, and another shared bias circuit for the main mixer), which reduces die size consumed by mixer400and may reduce power consumption. In some embodiments, the auxiliary mixers (e.g., mixers426A,426B,428A, and428B) are sized smaller than the main mixer (e.g., mixers422and424). In some embodiments, each auxiliary mixer is approximately 50% the size of the main mixer to have an approximately equal balancing of loading between the 8 LO signals (0-degree offset signal, 45-degree offset signal, 90-degree offset signal, 135-degree offset signal, 180-degree offset signal, 225-degree offset signal, 270-degree offset signal, and 315-degree offset signal). Each of the eight LO signals may be generated from a shared voltage-controlled oscillator (VCO), which is not shown inFIG.4, but may be coupled to the mixer bias circuits412and414.

Other configurations around the mixer400than that shown inFIG.4may be used with a shared mixer bias circuit. For example, as shown inFIG.4, each of the main mixer and two auxiliary mixers is coupled to the same amplifier410. In some embodiments, each of the main mixer and two auxiliary mixers may be coupled to separate amplifiers in a 1:1 arrangement. Further, although one main and two auxiliary mixers are shown in mixer400, the mixer400may include different number of main and auxiliary mixers in different ratios than 1:2 for main:auxiliary mixers. When more mixers are present, a shared mixer bias circuit may be shared between more than two mixers. In some embodiments, multiple baseband filters (BBFs) may be coupled to each of the I- and Q-channel outputs of the main and auxiliary mixers, such that each main or auxiliary mixer outputs to a separate I-channel baseband filter and a separate Q-channel baseband filer.

One method for operating a mixer with at least one shared mixer bias circuit, such as the mixer400ofFIG.4, is shown inFIG.5.FIG.5is a flow chart illustrating an example method of processing an RF signal using a mixer having a shared mixer bias circuit according to one or more aspects of the disclosure. Method500begins at block502.

At block502, a first set of local oscillator (LO) signals are generated for a first mixer, such as a main mixer of a harmonic rejection mixer (HRM).

At block504, a second set of local oscillator (LO) signals are generated for sharing between a second mixer and a third mixer, such as two auxiliary mixers of a harmonic rejection mixer (HRM).

At block506, an input radio frequency (RF) signal is applied to the first, second, and third mixers to obtain a downconverted signal. The RF signal may be received from one or more antennas coupled to the mixers through a radio frequency front end (RFFE). In some embodiments, the input RF signal includes a combination of sub-6 GHz and mmWave RF signals, and the mixers are configured to downconvert a frequency band within the sub-6 GHz or the mmWave frequencies. An input RF signal may include RF signals such as mmWave intermediate frequency (IF) signals. In some embodiments, the downconverted signal is a baseband signal, but may alternatively be an intermediate frequency (IF) signal that is further processed for downconversion to a baseband signal.

At block508, the baseband signal is processed to determine data that was in the input radio frequency (RF) signal.

One potential layout on a semiconductor die for mixers with shared LO signals is shown inFIG.6.FIG.6is a schematic view of a portion of a semiconductor die with mixers having shared local oscillator (LO) signals according to one or more aspects of the disclosure. A harmonic rejection mixer (HRM) circuit600may include mixers606for downconverting an input RF signal. The mixers606include a first set of main mixers M1_I, M2_I, M3_I, M4_I, M1_Q, M2_Q, M3_Q, and M4_Q. The mixers606also include auxiliary mixers M11_45, M2I_45, M1Q_45, M2Q_45, M11_135, M2I_135, M1Q_135, M2Q_135, M3I_45, M4I_45, M3Q_45, M4Q_45, M3I_135, M4I_135, M3Q_135, and M4Q_135. Coupling capacitors604may couple the mixers606to LO signals602. The LO signals602may be generated by one or more mixer bias circuits from one or more voltage-controlled oscillators (VCOs). Eight LO lines are shown because some of the mixers606share some of the LO signals. The output of mixers606is downconverted differential baseband signals IF I+, IF I−, IF Q+, and IF Q−. The die area occupied by mixers606is reduced based on the circuit600sharing mixer bias circuits. Further, the LO signals602are more evenly balanced between all phases when sharing mixer bias circuits.

In one embodiment of the semiconductor die shown inFIG.6, the circuit600is configured with single-balanced mixers, coupled to a dummy M4I_45and other dummy mixers. One possible sizing is to have M1_I45=⅔*M1_I and M4I_45=⅓*M1_I such that the signal-carrying transistor in the HRM is larger and may provide better performance. In another embodiment of the semiconductor die shown inFIG.6, the mixer M1_I45=½*M1_I and M4I_45=½*M1_I.

One example of a mixer bias circuit for generating the LO signals602ofFIG.6, and which is one embodiment of a mixer bias circuit412and414ofFIG.4, is shown inFIG.7.FIG.7is a circuit schematic illustrating a mixer bias circuit according to one or more aspects of the disclosure. The mixer bias circuit700receives an input at input node702corresponding to a single clock signal. The mixer bias circuit includes amplifiers, switches, and other circuitry for generating four local oscillator (LO) signals LO1, LO2, LO3, and LO4from the input clock signal. In an embodiment in which the mixer bias circuit700is used for the mixer bias circuit414ofFIG.4, the mixer bias circuit700may be configured to generate a 45-degree phase offset signal, a 225-degree phase offset signal, a 135-degree phase offset signal, and a 315-degree phase offset signal as the four LO signals LO1, LO2, LO3, and LO4.

Operations of method5may be performed by a UE, such as UE115described above with reference toFIG.1orFIG.2, or a UE described with reference toFIG.8. For example, example operations (also referred to as “blocks”) of method500may enable UE115to support operation of a harmonic rejection mixer (HRM), such as in a converged receiver, for obtaining data from an antenna signal.

FIG.8is a block diagram of an example UE800that supports reconfiguring a downconverter of a wireless radio according to one or more aspects of the disclosure. UE800may be configured to perform operations, including the blocks of a process described with reference to the above methods. In some implementations, UE800includes the structure, hardware, and components shown and described with reference to UE115ofFIG.1orFIG.2. For example, UE800includes controller880, which operates to execute logic or computer instructions stored in memory882, as well as controlling the components of UE800that provide the features and functionality of UE800. UE800, under control of controller880, transmits and receives signals via wireless radios801a-rand antennas852a-r. Wireless radios801a-rinclude various components and hardware, as illustrated inFIG.2for UE115, including modulator and demodulators254a-r, MIMO detector256, receive processor258, transmit processor264, and TX MIMO processor266. Wireless radios801a-rmay also include one or more receiver circuits with downconverters configured as shown inFIG.4.

As shown, memory882may include information802, logic803, means for determining RF signal configuration804, means for determining wireless radio configuration805, and/or means for configuring wireless radios806. Information802may be configured to include, for example, component values for corresponding sets of active frequencies and/or carrier aggregation sets. Logic803may be configured to process the information802, update the information802, generate new configuration data for information802, and/or store information regarding the current operating mode, e.g., assigned DL grants and/or BWPs. Means for determining RF signal configuration804may be configured to receive information from the wireless radios801a-r, from the controller880, and/or from information802to determine active frequencies in a signal received by the UE800. Means for determining wireless radio configuration705may be configured to determine RF transceiver configuration, such as mixer operation, based on the determined wireless radio configuration from block804. For example, block805may obtain appropriate information from a lookup table stored in information802using the configuration determined by block805as an index into the look-up table. Means for configuring wireless radios806may use the values determined by block705to change the configuration of one or more of the wireless radios801a-r, such as through the controller880. In some embodiments, some of the wireless radios801a-rmay be configured for mmWave operation and other of the wireless radios801a-rmay be configured for sub-6 GHz operation based on commands received from a base station. UE800may receive signals from or transmit signals to one or more network entities, such as base station105ofFIG.1orFIG.2or a base station as illustrated inFIG.9.

FIG.9is a block diagram of an example base station900that supports reconfiguring a downconverter of a wireless radio according to one or more aspects of the disclosure. Base station900may be configured to perform operations, including the blocks of method500described with reference toFIG.5. In some implementations, base station900includes the structure, hardware, and components shown and described with reference to base station105ofFIG.1orFIG.2. For example, base station900may include controller240, which operates to execute logic or computer instructions stored in memory242, as well as controlling the components of base station900that provide the features and functionality of base station900. Base station900, under control of controller240, transmits and receives signals via wireless radios901a-tand antennas934a-t. Wireless radios901a-tinclude various components and hardware, as illustrated inFIG.2for base station105, including modulator and demodulators232a-t, transmit processor220, TX MIMO processor230, MIMO detector236, and receive processor238. Wireless radios901a-rmay also include one or more receiver circuits with downconverters configured as shown inFIG.4.

As shown, memory982may include information902, logic903, means for determining carrier aggregation configuration904, means for determining wireless radio configuration805, and/or means for configuring wireless radios906. Information902may be configured to include, for example, component values for corresponding sets of active frequencies and/or carrier aggregation sets. Logic903may be configured to process the information902, update the information902, generate new configuration data for information902, and/or store information regarding the current operating mode, e.g., assigned DL grants and/or BWPs. Means for determining signal configuration904may be configured to receive information from the wireless radios901a-r, from the controller980, and/or from information902to determine active frequencies in a wireless signal configuration for the BS900. Means for configuring wireless radios906may use the values determined by block905to change the configuration of one or more of the wireless radios901a-r, such as through the controller980. In some embodiments, some of the wireless radios901a-rmay be configured for mmWave operation and other of the wireless radios801a-rmay be configured for sub-6 GHz operation based on channel measurements performed by and received from a UE such as shown inFIG.8. The means for determining wireless radio configuration905may use information regarding the physical location of certain wireless radios901a-rrelative to other wireless radios910a-rto determine the degeneration component values. For example, the closeness of a mmWave wireless radio and a sub-6 GHz wireless radio may be used to determine whether interference may be generated between two frequency bands being processed through the wireless radios901a-r. Base station900may receive signals from or transmit signals to one or more UEs, such as UE115ofFIG.1orFIG.2or UE800ofFIG.8.

In one or more aspects, techniques for supporting wireless communications, such as on multiple frequency bands, may include additional aspects, such as any single aspect or any combination of aspects described below or in connection with one or more other processes or devices described elsewhere herein. In a first aspect, supporting wireless communication may include an apparatus with shared mixer bias circuitry among multiple auxiliary mixers of a harmonic reject mixer (HRM). Additionally, the apparatus may perform or operate according to one or more aspects as described below. In some implementations, the apparatus includes a wireless device, such as a UE or a base station (BS). In some implementations, the apparatus may include at least one processor, and a memory coupled to the processor. The processor may be configured to perform operations described herein with respect to the apparatus, including operations described herein with respect to methods of operating a wireless device. In some other implementations, the apparatus may include a non-transitory computer-readable medium having program code recorded thereon and the program code may be executable by a computer for causing the computer to perform operations described herein with reference to the apparatus. In some implementations, the apparatus may include one or more means configured to perform operations described herein. In some implementations, a method of wireless communication may include one or more operations described herein with reference to the apparatus.

In a first aspect, supporting wireless communication may include an apparatus configured to downconvert RF signals from a first frequency (e.g., a RF signal received from an antenna, such as a phase array antenna) to a second frequency (e.g., baseband). The apparatus includes an input node configured to receive a radio frequency (RF) signal; a first mixer coupled to the input node; a second mixer coupled to the input node; and a first mixer bias circuit configured to output a first local oscillator (LO) signal, the first mixer bias circuit coupled to the first mixer and to the second mixer to output the first LO signal to the first mixer and to the second mixer.

In a second aspect, in combination with the first aspect, the apparatus further includes a third mixer coupled to the input node; a fourth mixer coupled to the input node, wherein the first mixer bias circuit is configured to output a second local oscillator (LO) signal, the first mixer bias circuit coupled to the third mixer and to the fourth mixer to output the second LO signal to the third mixer and to the fourth mixer.

In a third aspect, in combination with one or more of the first aspect or the second aspect, the first mixer and the third mixer comprise a first auxiliary mixer, and the second mixer and the fourth mixer comprise a second auxiliary mixer.

In a fourth aspect, in combination with one or more of the first aspect through the third aspect, the first mixer bias circuit is further configured to output a third local oscillator (LO) signal and a fourth local oscillator (LO) signal, the first mixer bias circuit coupled to the first mixer and the second mixer to output the third LO signal to the first mixer and the second mixer, and the first mixer bias circuit coupled to the third mixer and the fourth mixer to output the fourth LO signal to the third mixer and to the fourth mixer.

In a fifth aspect, in combination with one or more of the first aspect through the fourth aspect, the first LO signal comprises a clock signal at a 45-degree phase offset, the second LO signal comprises the clock signal at a 135-degree phase offset, the third LO signal comprises the clock signal at a 225-degree phase offset, and the fourth LO signal comprises the clock signal at a 315-degree phrase offset.

In a sixth aspect, in combination with one or more of the first aspect through the fifth aspect, the apparatus also includes a fifth mixer coupled to the input node; a sixth mixer coupled to the input node; and a second mixer bias circuit configured to output a third local oscillator (LO) signal and a fourth local oscillator (LO) signal, the second mixer bias circuit coupled to the fifth mixer and to the sixth mixer to output the third LO signal to the fifth mixer and to output the fourth LO signal to the sixth mixer.

In a seventh aspect, in combination with one or more of the first aspect through the sixth aspect, the first mixer and the fourth mixer are configured to output to an I-channel output node, the second mixer and the third mixer are configured to output to a Q-channel output node, and the fifth mixer and the sixth mixer comprise a main mixer, the fifth mixer configured to output to the I-channel output node, and the sixth mixer configured to output to the Q-channel output node.

In an eighth aspect, in combination with one or more of the first aspect through the seventh aspect, a die size of a first auxiliary mixer comprising the first mixer and the second mixer is less than a die size of the main mixer.

In a ninth aspect, in combination with one or more of the first aspect through the eighth aspect, wherein a die size of the first mixer is half a die size of the fifth mixer, and a die size of the second mixer is half a die size of the sixth mixer.

In a tenth aspect, in combination with one or more of the first aspect through the ninth aspect, the first mixer, the second mixer, the third mixer, the fourth mixer, the fifth mixer, and the sixth mixer comprise a harmonic rejection mixer (HRM).

In an eleventh aspect, in combination with one or more of the first aspect through the tenth aspect, the input node is configured to couple to an antenna to receive the RF signal, and the RF signal comprises a first sub-6 GHz RF signal and a second sub-6 GHz RF signal at a third harmonic of the first sub-6 GHz RF signal.

In a twelfth aspect, in combination with one or more of the first aspect through the eleventh aspect, the input node is configured to couple to an antenna, and the RF signal comprises a sub-6 GHz signal and a mmWave IF signal.

In a thirteenth aspect, in combination with one or more of the first aspect through the twelfth aspect, the input node, the first mixer, and the second mixer form a portion of a first integrated circuit that is configured to couple to one or more first radio frequency front end (RFFE) receive circuits configured to condition sub-6 GHz signals, the portion of the first integrated circuit also configured to couple to one or more second RFFE receive circuits configured to condition mmWave signals.

In a fourteenth aspect, in combination with one or more of the first aspect through the thirteenth aspect, the one or more second RFFE receive circuits are configured to couple to a phased antenna array.

In a fifteenth aspect, in combination with one or more of the first aspect through the fourteenth aspect, a method for processing wireless communication signals includes generating a first set of local oscillator (LO) signals for a first mixer; generating a second set of local oscillator (LO) signals for sharing between at least a second mixer and a third mixer; inputting a radio frequency (RF) signal to the first mixer, to the second mixer, and to the third mixer to determine a downconverted signal corresponding to the RF signal; and determining output data from the downconverted signal.

In a sixteenth aspect, in combination with one or more of the first aspect through the fifteenth aspect, the first mixer comprises a main mixer, the second mixer comprises a first auxiliary mixer having an output coupled to an output of the main mixer, and the third mixer comprises a second auxiliary mixer having an output coupled to the output of the main mixer.

In a seventeenth aspect, in combination with one or more of the first aspect through the sixteenth aspect, the first auxiliary mixer and the second auxiliary mixer each have a die size less than half of the main mixer.

In an eighteenth aspect, in combination with one or more of the first aspect through the seventeenth aspect, the downconverted signal comprises a baseband (BB) signal.

In a nineteenth aspect, in combination with one or more of the first aspect through the eighteenth aspect, the RF signal comprises a sub-6 GHz RF signal and a mmWave RF signal.

In a twentieth aspect, in combination with one or more of the first aspect through the nineteenth aspect, the RF signal comprises a first sub-6 GHz RF signal and a second sub-6 GHz RF signal at a third harmonic of the first sub-6 GHz RF signal.

In a twenty-first aspect, in combination with one or more of the first aspect through the twentieth aspect, a harmonic rejection mixer (HRM) for processing wireless communication signals includes an input node for receiving an input radio frequency (RF) signal; a first output node for outputting an I-channel baseband (BB) signal; a second output node for outputting a Q-channel baseband (BB) signal; a first pair of mixers coupled to the input node and configured to output a first downconverted signal to the first output node and to output a second downconverted signal to the second output node; a second pair of mixers coupled to the input node and configured to output a first downconverted signal to the first output node and to output a second downconverted signal to the second output node; a third pair of mixers coupled to the input node and configured to output a first downconverted signal to the first output node and to output a second downconverted signal to the second output node; a first mixer bias circuit coupled to the first pair of mixers and configured to provide a first local oscillator (LO) signal and a second LO signal to a first mixer of the first pair of mixers and a third LO signal and a fourth LO signal to a second mixer of the first pair of mixers; and a second mixer bias circuit coupled to the second pair of mixers and to the third pair of mixers and configured to provide a fifth LO signal and a sixth LO signal to a first mixer of the second pair of mixers and a first mixer of the third pair of mixers and to provide a seventh LO signal and an eighth LO signal to a second mixer of the second pair of mixers and to a second mixer of the third pair of mixers.

In a twenty-second aspect, in combination with one or more of the first aspect through the twenty-first aspect, the first pair of mixers comprises a main mixer, the second pair of mixers comprises a first auxiliary mixer, and the third pair of mixers comprises a second auxiliary mixer.

In a twenty-third aspect, in combination with one or more of the first aspect through the twenty-second aspect, the size of each mixer of the second pair of mixers and the third pair of mixers is approximately half the size of each mixer of the first pair of mixers.

In a twenty-fourth aspect, in combination with one or more of the first aspect through the twenty-third aspect, the input node is coupled to one or more first radio frequency front end (RFFE) receive circuits configured to condition sub-6 GHz signals.

In a twenty-fifth aspect, in combination with one or more of the first aspect through the twenty-fourth aspect, the input node is further coupled to one or more second radio frequency front end (RFFE) receive circuits configured to condition mmWave signals, wherein the input RF signal comprises a sub-6 GHz signal and a mmWave IF signal.

In a twenty-sixth aspect, in combination with one or more of the first aspect through the twenty-fifth aspect, the first pair of mixers, the second pair of mixers, the third pair of mixer, the first mixer bias circuit, and the second mixer bias circuit are part of an integrated circuit.

In a twenty-seventh aspect, in combination with one or more of the first aspect through the twenty-sixth aspect, an apparatus for processing wireless communications signals includes means for downconverting a radio frequency (RF) signal to a baseband signal, the downconverting means comprising a plurality of mixers; means for generating one or more local oscillator (LO) signals for sharing by some of the plurality of mixers of the downconverting means; and means for determining output data from the baseband signal.

In a twenty-eighth aspect, in combination with one or more of the first aspect through the twenty-seventh aspect, the downconverting means comprises a first mixer, a second mixer, and a third mixer, and the LO signal generating means comprises: means for generating a first set of local oscillator (LO) signals for the first mixer; and means for generating a second set of local oscillator (LO) signals for sharing between at least the second mixer and the third mixer.

In a twenty-ninth aspect, in combination with one or more of the first aspect through the twenty-eighth aspect, the apparatus further includes first means for conditioning a received antenna signal to generate the radio frequency (RF) signal, wherein the first conditioning means comprises means for conditioning a sub-6 GHz RF signal.

In a thirtieth aspect, in combination with one or more of the first aspect through the twenty-ninth aspect, the apparatus further includes second means for conditioning the received antenna signal to generate the radio frequency (RF) signal, wherein the second conditioning means comprises means for conditioning a mmWave RF signal; and a phased antenna array coupled to the second conditioning means.

Those of skill in the art that one or more blocks (or operations) described with reference toFIGS.3and4may be combined with one or more blocks (or operations) described with reference to another of the figures. For example, one or more blocks (or operations) ofFIG.3may be combined with one or more blocks (or operations) ofFIG.1. As another example, one or more blocks associated withFIG.4may be combined with one or more blocks (or operations) associated withFIG.1. Additionally, or alternatively, one or more operations described above with reference toFIGS.1-4may be combined with one or more operations described with reference toFIGS.5-9.

Additionally, a person having ordinary skill in the art will readily appreciate, opposing terms such as “upper” and “lower” or “front” and back” or “top” and “bottom” or “forward” and “backward” are sometimes used for ease of describing the figures, and indicate relative positions corresponding to the orientation of the figure on a properly oriented page, and may not reflect the proper orientation of any device as implemented.