MULTILAYER REFLECTIVE STACK FOR REDUCING CROSSTALK IN SPLIT PIXEL IMAGE SENSORS

An image sensor comprising a semiconductor substrate, a plurality of photodiodes, a multilayer reflective stack, and a dielectric layer is disclosed. The plurality of photodiodes is disposed within the semiconductor substrate and includes a first photodiode and a second photodiode adjacent to the first photodiode. The multilayer reflective stack comprises a first material having a first refractive index and a second material having a second refractive index. The dielectric layer has a third refractive index and is disposed between the first photodiode and the multilayer reflective stack. The first material is disposed between the second material and the dielectric layer. The first refractive index is greater than the second refractive index and the third refractive index.

TECHNICAL FIELD

This disclosure relates generally to image sensors, and, in particular but not exclusively, relates to CMOS image sensors and applications thereof.

BACKGROUND INFORMATION

Image sensors have become ubiquitous and are now widely used in digital cameras, cellular phones, security cameras, as well as medical, automobile, and other applications. As image sensors are integrated into a broader range of electronic devices it is desirable to enhance their functionality, performance metrics, and the like in as many ways as possible (e.g., resolution, power consumption, dynamic range, etc.) through both device architecture design as well as image processing.

The typical image sensor operates in response to image light reflected from an external scene being incident upon the image sensor. The image sensor includes an array of pixels having photosensitive elements (e.g., photodiodes) that absorb a portion of the incident image light and generate image charge upon absorption of the image light. The image charge of each of the pixels may be measured as an output voltage of each photosensitive element that varies as a function of the incident image light. In other words, the amount of image charge generated is proportional to the intensity of the image light, which is utilized to produce a digital image (e.g., image data) representing the external scene.

DETAILED DESCRIPTION

Advancements in semiconductor processing techniques have enabled the fabrication of complementary metal oxide semiconductor devices (e.g., image sensors, processors, displays, and the like) with increasingly smaller feature sizes, which has enabled miniaturization of many devices and incorporation of multiple features in a single sensor array. For example, split-pixel image sensors can include two or more types of pixel structures to facilitate high dynamic range imaging in a single sensor. In an illustrative example, small pixel structures can be configured to capture short-exposure information and large pixel structures can be configured to capture long-exposure information, which is particularly advantageous in environments where an image sensor with high dynamic range is desirous (e.g., surveillance, automotive, or other applications where simultaneous imaging of scenes with both bright and dark sources are expected).

Conventional image sensors face several process and performance limitations. Light incident upon an image sensor at an oblique angle may cause crosstalk between adjacent pixels, which can result in imaging artifacts. For example, incident light from bright sources in a dark environment (e.g., oncoming headlights of a vehicle at night) can leak between adjacent pixels, resulting in an image artifact referred to as a petal flare, which may degrade imaging of an external scene or obstruct view of elements within the external scene. Typical approaches for mitigating crosstalk artifacts may reduce quantum efficiency of pixels and impair sensor performance. There is a need, therefore, for image sensors that address the drawbacks of conventional pixel structures.

Embodiments described herein utilize an image sensor including a multilayer reflective stack to provide improved dynamic range in images with reduced or no crosstalk between pixels. As such, the architecture of an image sensor can include a plurality of pixels including first pixels and second pixels, where first photodiodes included in the first pixels may be utilized for shorter-exposure imaging and second photodiodes included in the second pixels may be utilized for longer-exposure imaging (e.g., a global shutter may be utilized such that light collection for both first photodiodes and second photodiodes initialized simultaneously, but exposure duration for the first photodiodes may be less than exposure duration for the second photodiodes). Advantageously, the multilayer reflective stack, in combination with other elements of the image sensor in embodiments described herein, is positioned overlying the first photodiodes to reduce crosstalk by redirecting incident electromagnetic radiation away from the first photodiodes. In this way, embodiments of the present disclosure (e.g., split-pixel image sensors) can operate over a wider dynamic range up to, including, or exceeding 120 dB, while reducing crosstalk and associated image artifacts and without sacrificing quantum efficiency.

Embodiments of the present disclosure include split-pixel image sensors including first pixels and second pixels including multilayer reflective stacks disposed overlying first photodiodes of the first pixel. The multilayer reflective stacks are structured to reduce or eliminate crosstalk between first pixels and second pixels positioned adjacent to one another by, at least in part, inducing internal reflection of a portion of incident electromagnetic radiation within a high-index refractive material (e.g., a first material disposed between a second material and a dielectric layer, the first material having a first refractive index greater than a second refractive index of the second material and a third refractive index of the dielectric layer). In contrast to conventional image sensor configurations, embodiments of the present disclosure may reduce or eliminate the appearance of petal flare and/or other artifacts in images, without coincident loss of quantum efficiency.

In the forthcoming paragraphs multilayer reflective stacks are described that include a “high-index” refractive material and a “low-index” refractive material. In this context, the term “high-index” refers to a material characterized by an index of refraction that is higher than that of the “low-index” refractive material, such that an internal reflection condition is satisfied. To that end, the terms “high” and “low” in connection with indexes of refraction are not absolute measures, but rather indicate relative magnitude that allows light transmitted through the high-index material, being incident on an interface between the high-index material and the low-index material, to be reflected within the high-index material at an angle of incidence above a given angle. It is understood, that the multilayer reflective stacks can function as, but are not limited to, reflectors and/or waveguides, as described in more detail below. Similarly, embodiments of the present disclosure can include dielectric materials that serve as, but are not limited to, reflective surfaces on which multilayer reflective stacks are disposed.

FIG.1is a schematic diagram illustrating a top view of an example image sensor100including first pixel structures105and second pixel structures110, in accordance with embodiments of the present disclosure. Image sensor100is an example of a split-pixel image sensor including two arrays of pixel structures disposed on one or more shared substrates. In the example image sensor100, first pixel structures105are rectangular and disposed in a regular pattern making up a red-green-blue color triad (RGB), such as the Bayer pattern (RGGB, as illustrated). While the first pixel structures105are rectangular in example image sensor100, the first pixel structures105can assume triangular, square, trapezoidal, pentagonal, hexagonal, heptagonal, octagonal, rhomboid, or the like, as regular or irregular polygons, based at least in part on the layout of example image sensor100and/or on the relative position of first pixel structures105in the layout of example pixel sensor100. Similarly, second pixel structures110are octagonal in shape and are laid out in a repeating matrix of four RGGB pixels. While the second pixel structures110are octagonal in the example image sensor100, the second pixel structures110can assume triangular, square, trapezoidal, pentagonal, hexagonal, heptagonal, octagonal, rhomboid, or the like, as regular or irregular polygons, based at least in part on the layout of example image sensor100and/or on the relative position of second pixel structures110in the layout of example pixel sensor100. It is appreciated that in the illustrated embodiment ofFIG.1, the first pixel structures105and the second pixel structures110have different shapes and sizes, but in other embodiments the first pixel structures105and the second pixel structures110may share a common shape, a common size, or both. In some embodiments, a distinction between the first pixel structures105and the second pixel structures110is a difference in full well capacity and/or light sensitivity. In some embodiments, the first pixel structures105(e.g., based on first photodiodes included in the first pixel structures105) may have a light sensitivity that is less than a light sensitivity of the second pixel structures110(e.g., based on second photodiodes included in the second pixel structures110), which may be achieved by different configurations of light sensing area size and/or amount of light capable of being transmitted toward the first photodiodes. In one embodiment, the first pixel structures105(e.g., based on first photodiodes included in the first pixel structures105) may have a first full well capacity that is less than a second full well capacity of the second pixel structures110(e.g., based on second photodiodes included in the second pixel structures110), which may be achieved by a difference in size, shape, photodiode doping concentration, or combinations thereof. In the same or other embodiments, the first pixel structures105may be configured to have less transmissivity of incident light to the underlying first photodiodes relative to the second photodiodes of the second pixel structures110(e.g., via an attenuation layer disposed over the first photodiodes that absorbs, blocks, or reflects a portion of light that would otherwise be incident upon first photodiodes).

In the context of example image sensor100, the term “RGB pixel” refers to a pixel structure (e.g., the first pixel structures105or the second pixel structures110) that is provided with a wavelength-selective filter to generate color information as part of generating visible color images. Discussion of embodiments of the present disclosure focuses on visible wavelength image sensors, but it is contemplated that image sensors can be configured to generate images in other energy spectra, including but not limited to ultraviolet, infrared, x-ray, or the like, where an intense point source of radiation in a dark field could make image generation difficult using a typical image sensor having only one type of pixel structure.

The first pixel structures105are arranged to form an array which is interposed between an array of the second pixel structures110to collectively form a tessellated array comprising instances of unit cell115, each of which includes four of the first pixel structures105and four of the second pixel structures110that are labeled with the color filters245(e.g., in reference toFIG.2A) information (e.g., the group of four of the first pixels105labeled as R, G, and B, and the group of four of the second pixels110labeled as R1, G1, and B1). In such arrangement, each of the first pixel structures105may be surrounded by and adjacent to four of the second pixel structures110. In unlabeled pixel structures105and110of the example image sensor100, the fill pattern denotes the color filter, and it can be seen that the pixel structures are arranged in repeating patterns formed by instances of the unit cell115. It is appreciated that in some embodiments, the arrangement of color filters is based on other mosaic color patterns such as red-clear-clear-blue, red-green-blue-infrared, red-yellow-yellow-blue, or monochrome patterns, infrared patterns, or a combination thereof. In this way, the term “light” is used to indicate electromagnetic radiation having an energy in ultraviolet, visible, or infrared ranges. In some embodiments, the number, position, size, and shape of first pixel structures105and the second pixel structures110can differ from what is illustrated. For example, the first pixel structures105and the second pixel structures110can be distributed differently or otherwise arranged where the energy range to be used as a source of images differs from the full visible spectrum of about 400 nm to about 800 nm.

At least a portion of the first pixel structures105include multilayer reflective stacks215(e.g., as illustrated in greater detail inFIGS.2A-2C), configured to attenuate or eliminate crosstalk between the second pixel structures110and the first pixel structures105. Attenuation of crosstalk is based at least in part on inducing an internal reflection condition within one or more high-index refractive materials (e.g., the first material230in reference toFIG.2B) in the multilayer reflective stacks215. It is appreciated that portions275of the multilayer reflective stacks215can extend into adjacent and/or nearby second pixel structures110, a distance of which may be determined at least in part by balancing attenuation of crosstalk artifacts in images generated by example image sensor100against reduction in quantum efficiency of second pixel structures110.

It is appreciated that a ratio of the first pixel structures105to the second pixel structures110is configurable based on, for example, a target application of the example image sensor100. Thus, while the unit cell115has a one-to-one ratio of the first pixel structures105to the second pixel structures110, embodiments of the disclosure also include smaller and larger ratios. In an illustrative example for monochromatic radiation sensors, including the multilayer reflective stacks215of the present disclosure, the number and configuration of color filters can be different. Similarly, for infrared image sensors including the multilayer reflective stacks215of the present disclosure, the number and configuration of the first pixel structures105and the second pixel structures110can be different. In some cases, the number of the first pixel structures105or the second pixel structures110can be determined based at least in part on the dynamic range expected in the scene to be imaged (e.g., for a special purpose image sensor).

As discussed previously, one difference between the first pixel structure105and the second pixel structure110is full well capacity, which indicates the amount of charge that can be stored within an individual one of the first pixel structures105and the second pixel structures110(e.g., based on first photodiodes of the first pixel structure105and second photodiodes of the second pixel structures110) without the pixel becoming saturated. Thus, the first pixel structures105include the first photodiodes with a first full well capacity less than a second full well capacity of the second photodiodes included in the second pixel structures110. The lower full well capacity (i.e., the first full well capacity) of the first pixel structures105is suitable for shorter exposure durations, while the higher full well capacity (i.e., the second full capacity) is suitable for longer exposure durations (e.g., relative to the shorter exposure duration). Thus, when imaging an external scene the first pixel structures105may be utilized to capture a short exposure duration image while the second pixel structures110may be simultaneously utilized to capture a long exposure duration (relative to the short exposure duration) image. The short exposure duration image and the long exposure duration image may then be stitched together to form a high-dynamic range image. Advantageously, the first pixel structures105can be configured to detect bright or strong light and second pixel structures110can be configured to detect low or dim light. In some embodiments, the relative size, shape, or number of the first pixel structures105and the second pixel structures110can differ, for example, where high intensity information is carried by radiation in a first energy range (e.g., reddish) and low intensity information is carried by radiation in a different energy range (e.g., greenish). As an illustrative example, an image sensor configured for use in an automated vehicle system (e.g., self-driving cars) can include smaller or fewer of the second pixel structures110for reddish wavelengths, in anticipation of high intensity monochromatic reddish wavelength sources associated with brake lights of motor vehicles. In this way, the specific photoresponse of the first pixel structures105and the second pixel structures110can be configured for a specific application, based on expected wavelength signatures of interest to be imaged (e.g., based at least in part on a calibrated measurement of vehicle headlights, the example image sensor100can be configured to capture less incident blue light from vehicle headlights and more red light from brake lights to reduce the likelihood of the vehicle headlights from saturating pixels of the example image sensor100).

The first pixel structures105and the second pixel structures110respectively include microlenses120and125, which are optically aligned over respective photodiodes (see, e.g.,FIG.2A) included in the example image sensor100(e.g., photodiodes210). The microlenses120and125can be formed of a polymer (e.g., polymethylmethacrylate, polydimethylsiloxane, etc.) or other material and can be shaped to focus, defocus, or otherwise reshape, steer, direct, or modify electromagnetic radiation incident on the microlenses120or125toward an underlying photodiode (e.g., a microlens120is shaped and positioned to direct incident light towards an underlying one of the first photodiodes210-1and a microlens125is shaped and positioned to direct incident light towards an underlying one of the second photodiodes210-2)

As part of forming a full color image sensor, the example image sensor100illustrated inFIG.1can include color filters (e.g., annotated as ‘R’ or ‘R1’ for red color filters, ‘G’ or ‘G1’ for green filter, and ‘B’ or ‘B1’ for blue color filters and labeled inFIGS.2A-2Bas color filters245) that have a characteristic spectral photoresponse to collective enable full color imaging over a broad energy spectrum of light (e.g., the visible spectrum of electromagnetic radiation, which is approximately 400 nm to 800 nm in wavelength or otherwise corresponds to light that is detectable by the human eye). The term “spectral photoresponse” describes the portion of the electromagnetic spectrum that a respective color filter (e.g., color filter245-G,245-B,245-R ofFIG.2A) transmits. For example, a spectral photoresponse corresponding to green (G) indicates that the color filter is a bandpass filter that transmits a portion of the electromagnetic spectrum corresponding to greenish light while substantially absorbing or reflecting other portions of the electromagnetic spectrum outside of a given passband for greenish light (e.g., about 520 nm to about 560 nm). Similarly, a spectral photoresponse corresponding to panchromatic or wide-band indicates that the color filter substantially transmits a portion of electromagnetic spectrum corresponding to the visible spectrum of light while substantially absorbing or reflecting regions of the electromagnetic spectrum outside of the visible range (e.g., ultraviolet, infrared, etc., where the photodiode has spectral photoresponse outside of the visible range). In some embodiments, the spectral photoresponse for blue, green, red, and wide-band color filters correspond to frequency ranges within the electromagnetic spectrum of approximately 450 nm to 490 nm, 520 nm to 560 nm, 635 nm to 700 nm, and 400 nm to 700 nm, respectively. In some embodiments, the plurality of color filters (e.g., the color filters245illustrated in FIG.2A-2C) included in the first pixel structures105and the second pixel structures110exhibit a spectral photoresponse corresponding to any one of red, green, blue, panchromatic (e.g., clear or white), infrared, yellow, cyan, magenta, or other colors, individually or in combination.

It is appreciated that the example image sensor100can be fabricated by semiconductor device processing and CMOS-compatible microfabrication techniques known by one of ordinary skill in the art. In one embodiment, fabrication of example image sensor100can include providing a semiconductor substrate (e.g., a wafer or substrate comprising silicon, a silicon germanium alloy, germanium, a silicon carbide alloy, an indium gallium arsenide alloy, any other alloys formed of III-V group compounds, combinations thereof, or a bulk substrate thereof) having a front side and a back side, forming a mask or template (e.g., made of cured photoresist) on the front side or the backside of the semiconductor substrate via photolithography to provide a plurality of exposed regions, doping (e.g., via ion implantation, chemical vapor deposition, physical vapor deposition, and the like) the exposed portions of the semiconductor material to form photodiodes within the semiconductor substrate, removing the mask or template (e.g., by dissolving the cured photoresist with a solvent, a wet etch, a dry etch, or combinations thereof), and planarizing (e.g., via chemical mechanical planarization or polishing) the semiconductor substrate. In the same or another embodiment, photolithography can be similarly used to form constituent elements of the example image sensor100, such as color filters (e.g., the color filters245illustrated inFIGS.2A-2C, which may correspond to cured pigmented polymers having a desired spectral photoresponse), microlenses (e.g., the microlenses120and125illustrated inFIG.2A-2C, which may correspond to polymer based microlenses having a target shape and size formed from a master mold or template), and isolation structures (e.g., metal grids or lines structured or otherwise deposited to block or reduce crosstalk between adjacent pixel structures such as first pixel structures105adjacent to second pixel structures110). It is appreciated that the described techniques are merely demonstrative and not exhaustive and that other techniques can be utilized to fabricate one or more components of the example image sensor100.

FIG.2Ais a schematic diagram illustrating a cross-sectional view along line A-A′ of the example image sensor100shown inFIG.1, in accordance with embodiments of the present disclosure. Specifically, the cross-sectional view illustrates a section including two instances of the first pixel structures105and two instances of the second pixel structures110. The illustration inFIG.2Ais intended to focus description on multilayer reflective stacks215. As such,FIG.2Aomits elements of the example image sensor100in the interest of clarity and ease of explanation. For example, section views ofFIGS.2A-2Comit metal layers, interconnects, and other electronic components that are understood to form a part of an operative image sensor, to focus description on optical aspects of the example image sensor100and attenuation structures that impart improved attenuation of crosstalk artifacts.

The example image sensor100includes microlenses120, microlenses125, a semiconductor substrate205, a plurality of photodiodes210(e.g., first photodiodes210-1and second photodiodes210-2), multilayer reflective stacks215, one or more isolation structures220, dielectric layer235, and color filters245(e.g., red color filters245-R, green color filters245-G, and blue color filters245-B), which collectively form the first pixel structures105and the second pixel structures110. As illustrated, the plurality of photodiodes210disposed within the semiconductor substrate205are separated from one another by the one or more isolation structures220. The dielectric layer235is disposed between the multilayer reflective stack215and the plurality of photodiodes210, including the first photodiodes210-1and the second photodiodes210-2. More specifically the first photodiodes210-1of the first pixel structures105are covered by the multilayer reflective stacks215(e.g., the multilayer reflective stacks215are optically aligned with the first photodiodes210-1) while the second photodiodes210-2of the second pixel structures110are only partially covered by the multilayer reflective stacks215(e.g., the dielectric layer235is disposed between portions275of the multilayer reflective stack215and the second photodiodes210-2). In other words, the multilayer reflective stacks215are optically aligned with an underlying one of the first photodiodes210-1and laterally extend over an adjacent one of the second photodiodes210-2such that the dielectric layer235is disposed between one of the portion275of the multilayer reflective stack215and the adjacent one of the second photodiodes210-2.

In embodiments of the disclosure, the semiconductor substrate205may include silicon, a silicon germanium alloy, germanium, a silicon carbide alloy, an indium gallium arsenide alloy, alloys formed of III-V compounds, other semiconductor materials or alloys, combinations thereof, a substrate thereof, a bulk substrate thereof, or a wafer thereof. In some embodiments, a gap is defined between neighboring or adjacent photodiodes included in the plurality of photodiodes210(e.g., between one of the first photodiodes210-1adjacent to one of the second photodiodes210-2), such that additional structures can be formed in the gaps to improve performance of image sensors (e.g., isolation structures, floating diffusion, pixel transistors, or the like). As illustrated, the one or more isolation structures220are disposed between adjacent pairs of the plurality of photodiodes210. In some embodiments, the one or more isolation structures220may correspond or otherwise include shallow trench isolation structures, deep trench isolation structures, or combinations thereof.

The dielectric layer235is disposed between the multilayer reflective stacks215and semiconductor substrate205. In some embodiments, the dielectric layer235may include or otherwise correspond to a planarized buffer layer, which may be formed of silicon oxide for protecting underlying material layers as well as a surface of the semiconductor substrate205during process. The dielectric layer235may further provide stress relief for stress associated with chemical mechanical polishing and/or stress relief associated with stress incurred during the formation of the plurality of pixel structures105,110. As illustrated, the dielectric layer235is disposed overlying semiconductor substrate205and may form a part of the one or more isolation structures220. For example, during fabrication, one or more trenches are formed within the semiconductor substrate205and filled with at least one of an inner material237(e.g., the corresponding material or materials utilized to form the dielectric layer235and/or one or more different materials such as silicon dioxide, reflective material such as aluminum, or conductive material such as polysilicon or tungsten, or combinations thereof) or a liner240(e.g., one or more materials that line or fill trenches formed within the semiconductor substrate205that are to correspond to or otherwise form the one or more isolation structures220). In some embodiments (e.g., where the inner material237and the dielectric layer235are formed of a common material), one or more shared processing steps may be utilized to simultaneously fill the trenches with the inner material237while also forming the dielectric layer235. It is appreciated that the one or more isolation structures220may, at least in part, mitigate or otherwise reduce optical and/or electric crosstalk between the first pixel structures105and the second pixel structures110, which in combination with the multilayer stacks215provide enhanced crosstalk mitigation. In some embodiments, the inner material237that fills the trenches for forming the one or more isolation structures220may include an oxide-based material (e.g., silicon dioxide). As illustrated, trenches can be first partially filled with the liner240(e.g., one or more high-k materials such as hafnium oxide, aluminum oxide, tantalum oxide, other high-K materials, or a combination thereof) to serve as a passivation layer, diffusion barrier, and/or an antireflective coating. After the formation of the liner240, the trenches may subsequently be filled with the inner material237, which may correspond to the same material that forms the dielectric layer235. In other embodiments, the one or more isolation structures220may be formed followed by subsequent deposition to form the dielectric layer235. In some embodiments, the dielectric layer235may have a refractive index lower than that of the semiconductor substrate205and/or the liner240.

The one or more high-k dielectric materials that form the liner240can at least partially conform to the sidewalls and bottom of the trenches when forming the one or more isolation structures220. In some embodiments, the one or more high-k dielectric materials that form the liner240can be extended over the semiconductor substrate205continuously, for example, coating a front or backside of the semiconductor substrate205. In an illustrative example, the one or more high-x dielectric materials that form the liner240can be used as part of an antireflective coating on the semiconductor substrate205and an overall thickness of a portion of the liner240outside of the one or more isolation structures220(e.g., portions of the liner that coat the front or backside of the semiconductor substrate205) can be thicker than a lining thickness on a sidewall or a bottom surface within the one or more isolation structures220. Advantageously, a larger thickness can improve a light transmittance coefficient to reduce reflections of incoming light that penetrates through the surface of the semiconductor substrate205to be absorbed in the plurality of photodiodes210. It is appreciated that the one or more isolation structures220that can reduce electrical and/or optical crosstalk between the plurality of photodiodes210may be formed in a grid manner that individually surrounds the plurality of photodiodes210(e.g., each photodiode included in the plurality of photodiodes210may be isolated and surrounded by the one or more isolation structures220). As illustrated, the one or more isolation structures220extend a depth into the semiconductor substrate205beyond a depth of the plurality of photodiodes210(e.g., to form deep trench isolation structures). In some embodiments, additional shallow trench isolation structures may be included in the one or more isolation structures220that extend into the semiconductor substrate205for a portion of the depth of the plurality of photodiodes210, which may provide isolation between the plurality of photodiodes210and pixel transistors (e.g., source-follower, row select, or reset transistors). In some embodiments, the one or more isolation structures220are omitted or are otherwise not disposed between at least a portion of the plurality of photodiodes210.

As illustrated, each one of the first pixel structures105includes one of the first photodiodes210-1and each one of the second pixel structures110includes one of the first photodiodes210-2. The first photodiodes210-1can be configured to detect bright light and the second photodiodes210-2can be configured to detect low light (e.g., via different exposure durations for the first photodiodes210-1and the second photodiodes210-2). The first photodiodes210-1and the second photodiodes210-2can have different light sensing characteristics, which may be achieved based on size, shape, doping concentration, or otherwise. In one example, the first photodiodes210-1may be physically smaller than the second photodiodes210-2(e.g., a first light exposure area of the first photodiodes210-1is less than a second light exposure area of the second photodiodes210-2). In the same or another example, the first photodiodes210-1can have a light sensitivity less than that of the second photodiodes210-2(e.g., based on a difference in structure between the first pixel structures105and the second pixel structures110). In the same or a further example, a first full well capacity of the first photodiodes210-1or the first pixel structures105is configured to be less than a second full well capacity of the second photodiodes210-2or the second pixel structures110. However, it is appreciated that in other examples, the first photodiode210-1can be configured to have a larger charge storage capacity than that of the second photodiode210-2.

The example image sensor100also includes multilayer reflective stacks215disposed over the dielectric layer235to cover a light exposure area of first photodiodes210-1(i.e., the dielectric layer235is disposed between the first photodiodes210-1and the multilayer reflective stacks215). As described in more detail in reference toFIG.2B, the multilayer reflective stacks215include a first material230having a first refractive index and a second material225having a second refractive index. The dielectric layer235has a third refractive index. It is appreciated that the first material230is disposed between the second material225and the dielectric layer235. In some embodiments, the first refractive index of the first material230is greater than the second refractive index of the second material225and the third refractive index of the dielectric layer235. In the illustrated embodiment ofFIG.2A, portions275of the multilayer reflective stacks215extend beyond covering the first photodiodes210-1such that the dielectric layer235is disposed between the portions275and the second photodiodes210-2.

As illustrated, the multilayer reflective stacks215overlies at least a portion of a light exposure area of second photodiodes210-2. More specifically, the multilayer reflective stacks215are each optically aligned with a respective one of the first photodiodes210-1. In some embodiments, each of the multilayer stacks215laterally extends over an adjacent one or more of the second photodiodes210-2such that the dielectric layer235is disposed between portions275of the multilayer reflective stacks215and the second photodiodes210-2. In the same or other embodiments, a distance the portions275of the multilayer reflective stacks215extend over from a periphery of one of the second photodiodes210-2toward a center of the one of the second photodiodes210-2is about 0.5%, about 1%, about 2%, about 3%, about 4%, about 5%, about 6%, about 7%, about 8%, about 9%, about 10%, about 11%, about 12%, about 13%, about 14%, about 15%, about 16%, about 17%, about 18%, about 19%, about 20%, about 21%, about 22%, about 23%, about 24%, or about 25% of the width of second photodiodes210-2, including fractions and interpolations thereof. In this way, a distance, size, or length of the portions275can be expressed as a double-bounded range, from about 0.5% to about 25%, from about 0.5% to about 20%, from about 0.5% to about 15%, from about 0.5% to about 10%, from about 0.5% to about 5%, or from about 0.5% to about 1%, including fractions and interpolations thereof. In this context, the term “about” refers to variation of the stated value of +10%. The extent the portions275of the multilayer stacks215extend over or otherwise cover the second photodiodes210-2represents a balance of opposing factors, where a larger distance reduces crosstalk between the first photodiodes210-1and the second photodiodes210-2at the expense of a reduced quantum efficiency for the second photodiodes210-2. As such, when the portions275extend a distance corresponding to an extent over about 15% of the width of the underlying one of the second photodiodes210-2, quantum efficiency may be detrimentally affected. Correspondingly, when the portions275extend a distance corresponding to an extent over about 5% of the width of the underlying one of the second photodiodes210-2, crosstalk attenuation between the first photodiodes210-1and the second photodiodes210-2may be reduced.

The example image sensor100includes the plurality of photodiodes210arranged in a regular, repeating manner such that the plurality of photodiodes210are formed or otherwise disposed in semiconductor substrate205as one or more doped regions within respective portions of the semiconductor material that are responsive to incident electromagnetic radiation. The doped regions can form a PN junction that generates image charge proportional to a magnitude or intensity of the incident electromagnetic radiation. It is appreciated that the plurality of photodiodes210are disposed within the semiconductor substrate205and can be optically aligned with respective color filters (e.g.245-B,245-G, or245-R) as part of the first pixel structures105and the second pixel structures110. In some embodiments, there may be a spacing and/or a separation distance between adjacent elements included in the plurality of photodiodes210, microlenses120, microlenses125, and/or color filters245in accordance with embodiments of the disclosure. Further still, in some embodiments, other components (e.g., vias, wiring, circuitry, isolation trenches such as the one or more isolation structures220, and the like) can be disposed within the spacing.

The example image sensor100further includes the color filters245and metal grid structure250. The color filters245are disposed overlying the dielectric layer235, which may correspond to a buffer oxide layer, and are individually aligned with a respective one of the plurality of photodiodes210, as described in more detail in reference toFIG.1. In the illustrated embodiment ofFIG.2A, a first color filter (e.g., one of the color filters245labeled as245-G, or any other one of the color filters245disposed over a corresponding one of the first photodiodes210-1) is optically aligned with a first photodiode (e.g., the corresponding one of the first photodiodes210-1) such that the multilayer reflective stack (i.e., one of the multilayer reflective stacks215) is disposed between the first photodiode and the first color filter. The illustrated embodiment further shows a second color filter (e.g., one of the color filters245labeled as245-R,245-B, or any other one of the color filters245disposed over a corresponding one of the second photodiodes210-2) optically aligned with the second photodiode (e.g., the corresponding one of the second photodiodes210-2) such that the first color filter is adjacent to the second color filter. Additionally, at least a portion of the second color filter is thicker than the first color filter due, at least in part, to a thickness of the multilayer reflective stack (e.g., a thickness246of the color filter245-R is greater than a thickness248of the color filter245-G due, at least in part, to a thickness216of the underlying one of the multilayer reflective stacks215). Disposed between the first color filter and the second color filter (e.g., color filter245-G adjacent to color filter245-R or245-B) are metal grid structures250. In other words, in some embodiments, second color filters included in the color filters245correspond to color filters optically aligned with the second photodiodes210-2while first color filters included in the color filters245correspond to color filters optically aligned with the first photodiodes210-1. In some embodiments, at least a portion of the second color filters are thicker than the first color filters due, at least in part, to the thickness of the multilayer reflective stack that extends entirely under the first color filters without extending entirely under the second color filters.

The metal grid structure250can be deposited over the multilayer reflective stacks215(e.g., with direct or indirect contact to the multilayer stacks215) and be substantially aligned with the one or more isolation structures220. As part of fabrication, as described in more detail in reference toFIGS.4A-F, constituent structures of the example image sensor100can be planarized following deposition (e.g., by chemical mechanical polishing or other planarizing technique) such that material layer positions, thicknesses, and alignments are preserved. For example, the color filters245can be planarized following deposition, such that the microlenses120and125can be disposed on a substantially planar surface. It is appreciated that the term “substantially” in this context refers to a surface that is planar within allowable tolerances for image sensor applications.

FIG.2Bis a schematic diagram illustrating a detailed view of the section view ofFIG.2A, in accordance with embodiments of the present disclosure.FIG.2Billustrates the relative arrangement of constituent layers of one of the multilayer reflective stacks215, which includes a first material230(e.g., a high-index refractive material) and a second material225(e.g., a low-index refractive material) and the interaction of the constituent layers with incident radiation260in the context of inducing internal reflection at a boundary between first material230, the second material225, and the dielectric layer235. It is appreciated that the first material230has a first refractive index, the second material225has a second refractive index, and the dielectric layer235has a third refractive index. More specifically, the first refractive index of the first material230is greater than the second refractive index of the second material225and the third refractive index of the dielectric layer235. In some embodiments, the multilayer reflective stacks215each include an attenuation layer265disposed overlying second material225(e.g., the second material225is disposed between the first material230and the attenuation layer265) for reducing or attenuating incident light whether being directed to the first photodiodes210-1by the microlenses120through absorption and/or reflection or crosstalk from an adjacent photodiode (e.g., one of the second photodiodes210-2included in second pixel structures110). In some embodiments, the multilayer reflective stacks215further include an insulation layer270overlying attenuation layer265(e.g., the attenuation layer265is disposed between the second material225and the insulation layer270). In some embodiments, the attenuation layer265can have a greater thickness (e.g., ‘A’) than a corresponding thickness of the first material230(e.g., ‘B’). In the same or other embodiments, the attenuation layer265can have a greater refractive index than the second refractive index of the second material225.

Petal flare, x-flare, and other crosstalk artifacts in images generated by image sensors can result from incident light260entering the second pixel structures110at an angle of incidence α with respect to an axis normal to the surface of the semiconductor substrate205(not illustrated inFIG.2B, but the surface such as the first side or the backside of the semiconductor substrate205is planar with at least one of the dielectric layer235, the first material230, the second material225, the attenuation layer265, and/or the insulation layer270) that is greater than or equal to about 30°, about 31º, about 32°, about 33°, about 34°, about 35°, about 36°, about 37º, about 38°, about 39°, about 40°, about 41°, about 42°, about 43°, about 44°, about 45°, about 46°, about 47°, about 48°, about 49°, about 50°, about 51º, about 52°, about 53º, about 54°, about 55°, about 56°, about 57º, about 58°, about 59º, or about 60, including fractions and interpolations thereof (e.g., the incident light260may enter the second pixel structures110at an oblique angle such about 45°-50° and reach an underlying photodiode associated with an adjacent one of the first pixel structures105). In this context, the term “about” refers to variation of the stated value of +10%.

To that end, the multilayer reflective stacks215can be structured to redirect the incident light260that is incident on the image sensor for an angle or range of angles of incidence for a being greater than or equal to a specific angle of incidence (e.g., 45°-50°, which may correspond to a threshold angle or threshold range of angles, by configuring an associated critical angle or range of critical angles for angles of incidence “B” of the incident light260with respect to an axis normal to a surface of the first material230(e.g., the high-index refractive material) to induce total internal reflection where the first material230interfaces with the dielectric layer235. The angle β is related to the angle of incidence α of incident light260. The angle β may be smaller than the angle of incidence α of incident light260. The angle β can be determined at least in part by simulation and/or experiment, from which the materials of composition and dimensions of the multilayer reflective stack215can be configured. In other words, the multilayer stacks215are configured to internally redirect oblique light incident on the image sensor (e.g., the incident light260) from entering the underlying first photodiodes210-1when the point of entry is above the second photodiodes210-2(e.g., in reference toFIG.2A), to prevent crosstalk (and the resultant image artifacts such as petal flare) between the first pixel structures105and the second pixel structures110. In an illustrative example, incident light260at an angle of incidence α being greater than or equal to about 40 degrees may result in significant crosstalk between photodiodes of the first pixel structures105and the second pixel structures110, which can be used to determine the critical angle or range of critical angles for β (e.g., to enforce total internal reflection for incident light a greater than a threshold angle or within a threshold range of angles). Once the critical angle or a range of critical angles for β is determined as described above, the first material230can be determined or otherwise selected using Snell's law such that there is total internal reflection at the interface of the first material230and the dielectric235when the incident light260is equal to or greater than the critical angle or range of critical angles for β. In other words, the multilayer reflective stacks215can be configured such that for a exceeding a threshold angle or range of angles of a (e.g., oblique angles known to result in crosstalk between adjacent pixels), the components of the multilayer reflective stacks215may be selected to induce total internal reflection for a critical angle or range of angles for β, which is directly related to the composition of the multilayer reflective stacks215and the angle of incident α. The expression for n2using Snell's law is:

To find the critical angle or range of critical angles where the incident light260will be reflected at the interface where the first material230meets the dielectric layer235, the aforementioned Snell's law may be used where niis the incident index (e.g., the first refractive index of the first material230), nris the refracted index (e.g., the third refractive index of the dielectric layer235), Θiis the incident angle of the incident light260(e.g., which can be determined using Snell's law based on the critical angle “β” or otherwise be determined experimentally or through simulations) entering the material associated with ni(e.g., the first material230), and Θris the refracted angle associated with ni(e.g., the dielectric layer235). It is appreciated that total internal reflection only occurs when light is entering into a less dense medium, thus nimust be greater than nr(e.g., the first refractive index of the first material230is greater than the third refractive index of the dielectric layer235). For total internal reflection, Θris assigned a value of 90 degrees and Θican be determined from experiment and/or simulation of optical crosstalk (e.g., via optical simulation using Snell's law based on the critical angle “β” and the composition of the constituent components of the first pixel structures105and the second pixel structures110such as, but not limited to the insulation layer270, the attenuation layer265, and the second material225). In some embodiments, it is desired to reflect the incident light260when the angle of incidence “α” is greater than or equal about 40 degrees, about 45 degrees, about 50 degrees above, or otherwise to mitigate crosstalk between the first pixel structures105and the second pixel strictures110. Using Snell's law, optical simulations, or experimental data, the appropriate first material230can be chosen based on the critical angle or critical range of angles for β of the incident light260formed with respect to an axis normal to a surface of the first material230, which is designed based on the target angle of incidence range associated with the incident light260(e.g., angle of incidence a) such that total internal reflection occurs at the interface where the first material230meets the dielectric layer235. That is, the first material230can be selected such that incident light260with an incident angle being greater or equal to the target incident angle threshold (e.g., a greater than or equal to the target incident angle threshold) would be reflected before reaching the first photodiode210-1of the first pixel structures105.

In some embodiments and in reference to the example image sensor100, nicorresponds to the first refractive index of the first material230and nrcorresponds to the third refractive index of the dielectric layer235. In an illustrative example, β can be 45 degrees and nrcan be 1.45 (corresponding to silicon dioxide), which using the above equation can be used to determine that niis greater than or equal to about 2.05. In this way, a range of values of β from about 35 degrees to about 60 degrees, the value of niranges from about 1.67 to about 2.53. In some embodiments, therefore, the first refractive index of the first material230is characterized as greater than or equal to about 1.60, about 1.65, about 1.70, about 1.75, about 1.80, about 1.85, about 1.90, about 1.95, about 2.00, about 2.05, or about 2.10, including fractions or interpolations thereof. In this context, the term “about” refers to variation of the stated value of ±10%.

In some embodiments, a ratio of the first refractive index of the first material230to the second refractive index of second material225and/or a ratio of the first refractive index of the first material230to the third refractive index of the dielectric layer235is from about 1.1 to about 1.8. For example, the ratio of the indexes of refraction can be from about 1.1 to about 1.8, from about 1.2 to about 1.8, from about 1.3 to about 1.8, from about 1.4 to about 1.8, from about 1.5 to about 1.8, from about 1.6 to about 1.8, from about 1.7 to about 1.8, from about 1.1 to about 1.7, from about 1.1 to about 1.6, from about 1.1 to about 1.5, from about 1.1 to about 1.4, from about 1.1 to about 1.3, or from about 1.1 to about 1.2, including fractions and interpolations thereof. For example, the ratio can be about 1.45, about 1.55, or the like, based at least in part on the composition of the dielectric layer235and/or the critical angle for β to induce internal reflection within the first material230. While the internal reflection condition is generally satisfied for values of the ratio equal to or above a critical angle for angle β of incident light260, material selection is limited by the double-bounded ranges at least in part due to limitations with manufacturability, in that values of the ratio above 1.8 can be physically incompatible with CMOS-compatible fabrication systems. For example, a material having an index of refraction above 2.5 can be incompatible with a CMOS deposition-etch system.

In some embodiments, the first material230may be selected such that for values of angle of incident α equal to or greater than about 55 degrees, incident light260can be redirected, absorbed, and/or reflected away from the dielectric layer235, thus away from first photodiode210-1by the metal grid structure250, the microlenses120, the microlenses125, or other constituent elements of the example image sensor100. Correspondingly, for values of a below about 35 degrees, incident radiation260can be unlikely or unable to transit from the second pixel structures110to the underlying photodiodes in an adjacent one of the first pixel structures105based at least in part on dimensional or geometric factors, optical elements such as the microlenses125, as well as absorption and/or reflection by the one or more isolation structures220. In this way, the first refractive index of the first material230can be characterized as being about 1.85 to about 2.10. In an illustrative example, the first material230can be or include titanium, tantalum oxide, silicon nitride, or other materials, or a combination thereof, that are at least partially translucent to incident light260, which may have a corresponding refractive index (i.e., the first refractive index) from about 1.85 to about 2.10 for the energy spectrum of the incident light260.

In addition to inducing a total internal reflection condition, the dimensions of the first material230can facilitate path-length dependent absorption of incident light260. For example, the first material230can be characterized by a thickness that absorbs at least a portion of incident light260. In this way, the first material230can be characterized by a thickness B from about 30 Angstroms to about 300 Angstroms (Å). For example, the thickness B of the first material230can be about 30 Å, about 40 Å, about 50 Å, about 60 Å, about 70 Å, about 80 Å, about 90 Å, about 100 Å, about 110 Å, about 120 Å, about 130 Å, about 140 Å, about 150 Å, about 160 Å, about 170 Å, about 180 Å, about 190 Å, about 200 Å, about 210 Å, about 220 Å, about 230 Å, about 240 Å, about 250 Å, about 260 Å, about 270 Å, about 280 Å, about 290 Å, or about 300 Å, including fractions and interpolations thereof. While an absorptive layer can improve attenuation of incident light260and reduce crosstalk artifacts, above a given thickness quantum efficiency of second photodiodes210-2may be adversely affected, based at least in part on the absorbance of the material to the energy of incident light260. Below a given thickness the effectiveness of first material230as an internal reflection medium is impaired, for example, where deposition processes become imprecise and the layer loses conformality. In some embodiments, the first material230is characterized by thickness B from about 50 Angstroms to about 150 Angstroms. In this context, the term “about” refers to variation of the stated value of ±10%.

In the same or other embodiments, the second material225and/or the dielectric layer235can correspond to nrwhen using Snell's law and be or include a material characterized by an index of refraction (e.g., the second refractive index of the second material225or the third refractive index of the dielectric layer235) that is lower than that of first refractive index of the first material230. In some embodiments, the second refractive index of the second material225and/or the third refractive index of the dielectric layer235is from about 1.0 to about 1.8. For example, the second material225and/or the dielectric layer235can be silicon dioxide. The second refractive index of the second material225and/or the third refractive index of the dielectric layer235can be about 1.00, about 1.05, about 1.10, about 1.15, about 1.20, about 1.25, about 1.30, about 1.35, about 1.40, about 1.45, about 1.50, about 1.55, about 1.60, about 1.65, about 1.70, about 1.75, or about 1.80, including fractions and interpolations thereof. As previously described, the first material230, the second material225, the dielectric layer235, and the critical angle β are coupled through Snell's law for internal reflection. To that end, a higher value of nr(corresponding to the second material225and/or the dielectric layer235) corresponds to a higher value of ni(e.g., the first material230) for a given value of the critical angle β. In an illustrative example, for a target value of a of 50 degrees, nimay be selected to range from about 1.15 to about 2.05 for the stated range of values of nrgiven above. In this way, the selection of materials for the multilayer reflective stacks215can be based at least in part on the configuration of the example image sensor100, the intended application of example image sensor100, and/or the deposition system employed to fabricate example image sensor100.

It is appreciated that the multilayer reflective stack215is configured to have the first material230sandwiched between the second material225and dielectric layer235and further configured for the first material230to have the first refractive index being greater than the second refractive index of the second material225and the third refractive index of the dielectric layer235. In such a configuration, and in some embodiments, the multilayer reflective stack215(e.g., including the first material230and the second material225) in combination with the dielectric layer235may function as a waveguide directing at least a portion of incident light260through the first material230toward an adjacent second photodiode210-2of the second pixel structure110. In one example, when the incident light260directed enters the first material230with an angle of incidence α with respect to an axis normal to a surface of the first material230that results in B being greater than the critical angle that result in total internal reflection within the first material230, then the incident light260may enter and be confined within the first material230and propagate through the first material230in a confined manner until exiting the multilayer reflective stack215away from the first pixel structure105and towards the second pixel structure110. In such an embodiment, the “waveguide” mitigates incident light intended for the second pixel structures110from reaching the first pixel structures105(e.g., optical crosstalk between the second photodiodes210-2and the first photodiodes210-1is mitigated).

It is further appreciated that in some embodiments the second refractive index of the second material225is substantially equivalent (e.g., within 10%, 5%, or less) to the third refractive index of the dielectric layer235. However, in other embodiments, the second refractive index of the second material225and the third refractive index of the dielectric layer235are not equivalent while both the second refractive index and the third refractive index are less than the first refractive index of the first material230.

As previously described, the attenuation layer265can be disposed overlying the second material225. More specifically, the attenuation layer265is disposed between the microlenses120and the multilayer reflective stacks215. The attenuation layer265can be or include titanium, titanium nitride, silicon nitride, or other materials selected to absorb at least a portion of incident radiation260. In some embodiments, the attenuation layer265includes at least one layer of one or more materials, which may be stacked in a regular or repeating manner. For example, in one embodiment, the attenuation layer265may include layers of titanium and titanium nitride to form a Ti/TiN stack. In some embodiments, the attenuation layer265may be formed of multiple stacks of layers (e.g., multiple Ti/TiN stacks). In some embodiments, the attenuation layer265can be characterized by an index of refraction that is greater than that of the second refractive index of the second material225and/or the third refractive index of the dielectric layer235. In this way, where insulation layer270is disposed overlying attenuation layer265, internal reflection can conduct a portion of reflected incident light260away from underlying first photodiodes210-1. The attenuation layer265can be characterized by a thickness A that is greater than or equal to thickness B of first material230. To that end, the thickness A can range from about 50 Angstroms to about 300 Angstroms, or greater, being based at least in part on quantum efficiency constraints of first photodiodes210-1, for example. In an illustrative example, the attenuation layer265can be or include titanium, such that the thickness A can be about 200 Angstroms or less. In another example, the attenuation layer265can be or include titanium nitride, for which the thickness A can be about 100 Angstroms or less. In some embodiments, the attenuation layer265includes a layer of titanium and a layer of titanium nitride, such that the thickness A is about 300 Angstroms or less. It is appreciated that when the attenuation layer265includes a layer of titanium and a layer of titanium nitride, a thickness of the titanium layer may be greater than a thickness of the titanium nitride layer. Further still, the layer of the titanium nitride layer may be disposed between the layer of the titanium layer and the second material225. In some embodiments, the layer of the titanium nitride may correspond to a metal diffusion barrier layer to mitigate diffusion of titanium into the second material225.

In the illustrated embodiment, the insulation layer270is disposed between an overlying one of the color filters245(e.g., a first color filter such as color filter245-G) and one of the multilayer reflective stacks215(e.g., the first material230, the second material225, and/or the attenuation layer265). Additionally in the illustrated embodiment, the attenuation layer265is disposed between the insulation layer270and the second material225. In some embodiments, the insulation layer270is further disposed between the metal grid structures250and the multilayer reflective stacks215(e.g., such that the metal grid structures250are isolated from the multilayer reflective stacks215and the attenuation layer265). In some embodiments, the insulation layer270can be characterized by a thickness C that can be from about 10 nm to about 100 nm. While the thickness C is described as being determined at least in part to chemically isolate the metal grid structures250and the attenuation layer265, the thickness C can be based at least in part on size and/or shape constraints of the example image sensor100. To that end, the thickness C can less than or equal to about 100 nm, about 90 nm, about 80 nm, about 70 nm, about 60 nm, about 50 nm, about 40 nm, about 30 nm, about 20 nm, or about 10 nm, including fractions and interpolations thereof, provided that the insulation layer270electrically isolates the metal grid structures250from the attenuation layer265.

As shown inFIG.2B, multilayer reflective stacks215are disposed overlying the dielectric layer235. In some embodiments, the dielectric layer235is characterized by a thickness280from about 90 nm to about 200 nm. In some embodiments, the dielectric layer235is characterized by thickness280of about 90 nm, about 100 nm, about 110 nm, about 120 nm, about 130 nm, about 140 nm, about 150 nm, about 160 nm, about 170 nm, about 180 nm, about 190 nm, or about 200 nm, including fractions and interpolations thereof. Advantageously, a reduced value for the thickness280reduces the overall size of example image sensor100and improves multiple process factors including fabrication time, material demand, and economic factors such as material cost. In some embodiments, the dielectric layer235functions as a passivation layer and/or diffusion barrier layer that preserves the functionality of the plurality of photodiodes210, for example, by preventing oxygen or other atoms and/or molecules from diffusing into or out of semiconductor substrate205. To that end, below a given thickness, the dielectric layer235can permit the diffusion of species into and/or out of semiconductor substrate205that can impair the performance of the plurality of photodiodes210and detrimentally affect the performance of example image sensor100. In some embodiments, the dielectric layer235corresponds to a planarized process buffer layer (e.g., a buffer oxide layer), which facilitates planarization during processing (i.e., before fabrication of the multilayer reflective stacks215, the attenuation layer265, the insulation layer270, the color filters245, the microlenses120, and the microlenses125, or other constituent components of the example image sensor100). For example, the dielectric layer235may fill in any etched trenches or valleys formed during fabrication, which may provide support and/or relieve mechanical stress that occurs during chemical mechanical polishing.

FIG.2Cis a schematic diagram illustrating a section view of the example image sensor100ofFIG.1along section plane AA′ including an embedded multilayer reflective stack215(e.g., at least one of the first material230, the second material225, or the attenuation layer265embedded, at least in part, within the dielectric layer235), in accordance with embodiments of the present disclosure. It is appreciated that the first material230and the second material225illustrated inFIG.2C, may correspond to one of the multilayer stacks215illustrated inFIG.1-2B. In some embodiments, the second material225, the insulation layer270and270′, and the dielectric layer235include silicon oxide(s), such as silicon dioxide. As such, the same or similar optical activity discussed in reference toFIGS.2A-2B, with respect to internal reflection of incident radiation260at an angle α or greater, can be achieved by at least partially embedding one or more of the multilayer reflective stacks215(e.g., at least one of the first material230, the second material225, or the attenuation layer265) into the dielectric layer235, to achieve a reduced combined thickness290. As described in more detail in reference toFIGS.4A-4F, focused on an example fabrication process300(in reference toFIG.3), the dielectric layer235can be deposited having a thickness280less than 90 nm, such that the combined thickness290of the dielectric layer235and multilayer reflective stacks215is less than or equal to about 200 nm. In the context of the present disclosure, open-ended dimensional ranges are understood to be limited by processing equipment that can introduce fabrication constraints on deposition thicknesses. For example, while the multilayer reflective stacks215can be less than or equal to about 200 nm thick, the lower limit of combined thickness290can be greater than zero, for example, where each of the dielectric layer235and multilayer reflective stack215have a respective lower limit of deposition thickness on a given CMOS processing system. In some embodiments, the combined thickness290is from about 50 nm to about 150 nm. In some embodiments, the combined thickness290is about 50 nm, about 60 nm, about 70 nm, about 80 nm, about 90 nm, about 100 nm, about 110 nm, about 120 nm, about 130 nm, about 140 nm, or about 150 nm, including interpolations and fractions thereof. As described above, reducing the combined thickness290improves multiple process, performance, and material parameters associated with designing and fabricating the example image sensor100, but also improves optical efficiency of the plurality of photodiodes210(e.g., improved angular response) associated with a reduced absorbance by the dielectric layer235, for example. As such, at least partially embedding one or more of the multilayer reflective stacks215in the dielectric layer235permits the example image sensor100to include the multilayer reflective stacks215with little or no increase in overall dimensions of the example image sensor100. Advantageously, limitations on thickness280, arising for example from species diffusion constraints, stress or strain considerations from chemical mechanical polishing, or the like can be addressed by embedding one or more of the multilayer reflective stacks215in the dielectric layer235, such that thickness280as described in more detail in reference toFIG.2Bis maintained while also reducing the combined thickness290.

To facilitate embedding one or more of the multilayer reflective stacks215into the dielectric layer235, the dielectric layer235may be planarized and then selectively etched to form trenches that have a width284(e.g., corresponding to a lateral area having the same or greater lateral dimensions as the multilayer reflective stacks215) and depth282. The multilayer reflective stacks215and subsequent components may then be formed such that they fill the trenches. The depth282that the multilayer reflective stacks215are embedded into the dielectric layer235may range from partial (e.g., only a portion of the first material230may be disposed within the dielectric layer235) to full (e.g., both the first material230and the second material225may be fully embedded within the dielectric layer235). In some embodiments, the first material230of the multilayer reflective stacks215is fully embedded within the dielectric layer235while the second material is partially embedded within the dielectric layer235. In some embodiments, the insulation layer270may make conformal contact with the multilayer reflective stacks215(e.g., at least partially contact sidewalls as illustrated inFIG.4D). In the same or other embodiments, the insulation layer is disposed between the metal grid structures250and the multilayer reflective stacks215(e.g., the insulation layer270is disposed between the metal grid structures250and the attenuation layer265). In the same or other embodiments, the insulation layer270may optionally be extended (e.g., via a second deposition after the formation of the metal grid structures250) such that an extended portion270′ of the insulation layer270at least partially encapsulates the metal grid structures250(e.g., the extended portion270′ of the insulation layer270is disposed between the color filters245and the metal grid structures250).

FIG.3is a block flow diagram illustrating an example process300, including process blocks301,303,305,307,398,311,313, and315for fabricating the example image sensor100ofFIGS.1-2C, in accordance with embodiments of the present disclosure. Cross sectional diagrams inFIGS.4A-4Fillustrate intermediate states420,430,440, and450of the example image sensor100, which may correspond to one or more of the process blocks301-315included in the example process300. As such,FIGS.4A-4Fare understood to represent a temporary structure as fabrication proceeds through the example process300including multiple fabrication, refining, and finishing steps, not all of which are illustrated. In some embodiments, the process blocks301-315of the example process300can be repeated, reordered, or omitted.

The example process300starts with an intermediate structure that includes the one or more isolation structures220(e.g., deep trench isolation structures, shallow trench isolation structures, or combinations thereof) and the plurality of photodiodes210(e.g., the first photodiodes210-1and the second photodiodes210-2).

The process block301for the fabrication process of example image sensor100including providing a wafer substrate or a semiconductor substrate (e.g., the semiconductor substrate205illustrated inFIGS.2A-2C) including a plurality of photodiodes (e.g., the plurality of photodiodes210illustrated inFIGS.2A-2C) disposed therein and separated by one or more isolation structures (e.g., the one or more isolation structures220illustrated inFIGS.2A-2C). In some embodiments, the plurality of photodiodes includes a first photodiode (e.g., one of the first photodiodes210-1illustrated inFIGS.2A-2C) and a second photodiode (e.g., one of the second photodiodes210-2illustrated inFIGS.2A-2C) adjacent to the first photodiode. As such,FIGS.4A-4Ffocus discussion on aspects of forming multilayer reflective stack215by CMOS-compatible processes, such as reactive ion etching, plasma deposition, patterned deposition and etch, planarization, or the like. It is contemplated that various processing operations have been implemented to form the illustrated structures, but such operations are not all explicitly disclosed (e.g., photoresist deposition, patterning, and/or removal). Additionally, at least some of the intermediate states shown can be optional or alternative forms, where applicable. For example,FIGS.4C-4Dillustrate alternative embodiments to those illustrated inFIGS.4E-4F, corresponding to embodiments illustrated inFIG.2BandFIG.2C, respectively.

The process block303illustrates forming a dielectric layer (e.g. the dielectric layer235illustrated inFIGS.2A-2C) over the semiconductor substrate (e.g., the semiconductor substrate205illustrated inFIGS.2A-2C). In some embodiments, the dielectric layer can be, include, or otherwise correspond to a buffer oxide layer. The dielectric layer may be formed in accordance with CMOS-compatible deposition processes. In some embodiments, the dielectric layer is planarized (e.g., when the dielectric layer corresponds to a buffer oxide layer), for example, by chemical mechanical polishing. In some embodiments, the dielectric layer is characterized as having a third refractive index.

The process block305is an optional process that may be included in the example process300that shows selectively etching the dielectric layer formed during block303. Specifically, in some embodiments, the multilayer stacks may be embedded, at least partially, within the dielectric layer. One way to facilitate this feature is to form trenches within the dielectric layer in intended locations where the multilayer stacks are to be formed (see, e.g.,FIG.2C). The trenches may be formed by selectively etching the dielectric layer in an appropriate manner and with an appropriate etch depth (e.g., based on the depth282illustrated inFIG.2C). It is appreciated that in some embodiments, a width of the trenches may be equivalent to a width of the multilayer reflective stacks (e.g., the width284illustrated inFIG.2C).

The process block307shows forming one or more multilayer reflective stacks (e.g., the multilayer reflective stacks215illustrated inFIGS.2A-2C) over the dielectric layer from the process block303such that the dielectric layer is disposed between the multilayer reflective stack and the plurality of photodiodes (e.g., the first photodiodes210-1and/or the second photodiodes210-2illustrated inFIGS.2A-2C). The multilayer reflective stack may be formed by sequential deposition steps, in which a first material (e.g., the first material230illustrated inFIGS.2A-2C) having a first refractive index and a second material (e.g., the second material225illustrated inFIGS.2A-2C) having a second refractive index are deposited overlying the dielectric layer via one or more deposition processes such as chemical vapor deposition or atomic layer deposition, as illustrated inFIG.4A.FIG.4Ais a schematic diagram illustrating a cross-sectional view (e.g., along line A-A′ illustrated inFIG.1) of an intermediate state400that includes a low-index refractive material (e.g., the second material225illustrated inFIG.4A) deposited over a high-index refractive material (e.g., the first material230) during the process block307of example process300illustrated inFIG.3. As discussed previously, the first refractive index of the first material corresponds to a high-index refractive material that is greater than the second refractive index of the second material and the third refractive index of the dielectric layer, which both correspond to a low-index refractive material. It is appreciated that due to the sequential deposition of the first material and the second material, the first material is disposed between the second material and the dielectric layer.

The process blocks303and307of the example process300ofFIG.3are illustrated in sequence, at least in part because of the internal reflection condition, as described in more detail in reference toFIGS.2B-2Cis implemented using a high index material disposed between alternating layers of low-index materials (e.g., the first material230disposed between the second material225and the dielectric layer235) to form a reflection interface between the first material230and the dielectric layer235(e.g., to function as a reflector to mitigate crosstalk from the second photodiodes210-2into the first photodiodes210-1) and in some cases between the first material230and the second material225(e.g., to function in a manner akin to a waveguide to direct out laterally). As described in more detail in reference toFIGS.2A-2C, the first material230can be or include a metal, an oxide, and/or a nitride, such as titanium, tantalum oxide, silicon nitride, titanium nitride, or the like, such that the first refractive index of the first material230is higher than that of the dielectric layer235, which in some embodiments satisfies the internal reflection condition of Snell's law to reflect incoming light incident on a surface of semiconductor substrate205at an incident angle greater or equal to specific incident angle range (e.g., between 30 degrees to 60 degrees with respect to an axis normal to the surface of semiconductor substrate205or as otherwise described in reference to the angle of incident threshold such as angle of incidence “α” ofFIG.2B). To that end, the first material230can be or include one or more materials that are compatible with CMOS processes (e.g., plasma deposition, wet and/or dry etching, etc.), for spatially selective deposition and/or removal with precise depth control to meet the dimensions of each constituent material layer within tolerances, as described in more detail in reference toFIGS.2A-2C.

The process block309of the example process300illustrated inFIG.3optionally includes depositing an attenuation layer (e.g. the attenuation layer265illustrated inFIGS.2A-2C) overlying the second material (e.g., the second material225illustrated inFIGS.2A-2C) for attenuating incoming light. As described in more detail in reference toFIG.2B, the attenuation layer265can include multilayer structures including alternating layers of titanium/titanium nitride. To that end, the process block309can include multiple thickness-controlled deposition processes for forming multilayer films overlying the second material225. In an illustrative example, the attenuation layer can include one or more layers to achieve specific absorption and/or reflection optical characteristics. Advantageously, the attenuation layer265can improve the performance of the first pixel structures105by reducing the likelihood of saturation of first photodiodes210-1(e.g., by attenuating electromagnetic radiation incident on first pixel structures105via reflection, absorption and/or refraction). In some embodiments, therefore, the thickness A (in reference toFIG.2B) of the attenuation layer265exceeds the thickness B of the first material230(in reference toFIG.2B) to provide needed optical effect (e.g., reflectance and absorption achieving desired quantum efficiency of first photodiodes210-1). Beyond a given number of layers, however, the attenuation layer265can inhibit performance of the first photodiodes210-1, based at least in part on path-dependent absorption of electromagnetic radiation transiting attenuation layer265.

Subsequent to the process block309, the example process300illustrated inFIG.3may optionally include planarizing an upper surface of the topmost material layer for subsequent processes. In one example, a chemical mechanical polishing process can be used to smooth or planarize an upper surface of the attenuation layer. Additionally or alternatively, subsequent to process block309, the example process300may optionally include depositing an insulation layer (e.g., the insulation layer270illustrated inFIG.4A). However, in other embodiments, deposition of the insulation layer may be deposited at one or more later stages (e.g., after or during process blocks311and/or315).

The process block311illustrates selectively etching the multilayer reflective stack until exposing the dielectric layer to remove a portion of the multilayer reflective stack disposed over the second photodiodes and to provide exposed portions (e.g., exposed portions235′ of the dielectric layer235illustrated inFIG.4B). In other words, subsequent to the process block309, the example process300illustrated inFIG.3can include removing a portion of the multilayer reflective stack and/or overlying materials (e.g., the multilayer reflective stack215, the attenuation layer265, and the insulation layer270as illustrated by intermediate state410inFIG.4B) at the process block311. Removal processes can be spatially localized and/or patterned such that material is selectively removed from regions corresponding to or overlying each of the second photodiodes (e.g., the second photodiodes210-2associated with the second pixel structures110illustrated inFIGS.1-2C). Removal, in this context, refers to one or more of a number of CMOS-compatible techniques for etching a portion of a semiconductor and/or dielectric materials or substrates. In an illustrative example, an etch-stop or otherwise selective material can be deposited according to a pattern overlying the intermediate state400ofFIG.4A(e.g., using a patterned photoresist to restrict deposition to regions corresponding to first pixel structures105ofFIGS.1-2C), following which wet etch and/or dry etch processes can be used to etch through constituent components (e.g., the attenuation layer265, second material225, and the first material230illustrated inFIG.4B). By selecting etch processes to be selective to oxides, nitrides, or metals, removal processes of the process block311can be controlled to stop substantially at layer boundaries. For example, by applying a wet etch that is selective to oxides, but is unselective to nitrides, the insulation layer (e.g., the insulation layer270illustrated inFIG.4B) can be selectively removed without etching into the attenuation layer (e.g., the attenuation layer265illustrated inFIG.4B). Similarly, removing the first material (e.g., the first material230illustrated inFIG.4B) with a metal or nitride selective etch can permit the etch reaction to effectively stop at the dielectric layer (e.g., the dielectric layer235illustrated inFIG.4B).

The process block313shows an optionally process of depositing an insulation layer over the multilayer reflective stack (e.g., the stack of materials including the first material230, the second material225, the attenuation layer265, and optionally the optional insulation layer270as illustrated inFIG.4B) and the exposed portions (e.g., the exposed portions235′ of the dielectric layer235illustrated inFIG.4B) of the dielectric layer. In some embodiments, the insulation layer at least partially conforms to one or more sidewalls of the multilayer reflective stacks (e.g., as illustrated inFIG.4D, a conformal layer470of the insulation layer270conforms to one or more sidewalls425of the multilayer reflective stacks). Subsequent to removing a portion of multilayer reflective stack, the example process300includes depositing material for forming the insulation layer at the process block313, as illustrated in intermediate state420illustrated inFIG.4C. As described in more detail in reference toFIGS.2A-2C, depositing the insulation layer270at process block313ofFIG.3provides material insulation. For example, the insulation layer270chemically isolates subsequent formed metal grid structures250and color filters245from the attenuation layer265and/or the first material230as well as separating the metal grid structures250from the color filter245. To that end, the insulation layer270can be deposited at the thickness C (in reference toFIG.2B), that achieves the material isolation of the metal grid structures250from multilayer reflective stacks215, isolates the metal grid structures250from the color filters245, and isolates the color filters245from the attenuation layer265, while also permitting the combined thickness290of the multilayer reflective stacks215to be as described above in reference toFIGS.2A-2C.

In some embodiments, the thickness C can be from about 10 nm to about 100 nm. While the thickness C is described as being determined at least in part to chemically isolate the metal grid structures250and the attenuation layer265, the thickness C can be based at least in part on size and/or shape constraints of the example image sensor. To that end, the thickness C can be less than or equal to about 100 nm, about 90 nm, about 80 nm, about 70 nm, about 60 nm, about 50 nm, about 40 nm, about 30 nm, about 20 nm, or about 10 nm, including fractions and interpolations thereof, provided that the insulation layer270electrically isolates metal grid structures250from the attenuation layer265.

In some embodiments, as described in more detail in reference toFIG.2C, the example process300includes disposing the insulation layer270, such that the insulation layer270at least partially conforms one or more sidewalls425of the multilayer reflective stacks215as illustrated inFIG.4D, which provides an example of at least partially conformal layer470of the insulation layer270in intermediate state430. The conformal layer470may comprise dielectric material such as oxide-based material (e.g., silicon dioxide). In one example, the conformal layer470and the dielectric layer235may be formed of the same material. In some embodiments, the example process300illustrated inFIG.3includes one or more removal processes to selectively remove the conformal layer470illustrated inFIG.4D. The intermediate state430corresponds with an embodiment of the example image sensor100where multilayer reflective stack is at least partially embedded in the dielectric layer235as illustrated inFIG.2C. The process block313, therefore, supplements thickness280of the dielectric layer235by the added thickness of insulation layer270and to a point that affords chemical passivation of the surface of semiconductor substrate205while not impairing quantum efficiency of the plurality of photodiodes210of second pixel structures110and increasing angular response (e.g., as illustrated inFIGS.1-2C). To that end, the combined thickness290illustrated inFIG.2Ccan be, as described above, between about 100 nm to about 130 nm.

The process block315illustrates forming metal grid structures (e.g., the metal grid structures250illustrated inFIGS.2A-2C), depositing color filters (e.g., the color filters245illustrated inFIGS.2A-2C), and forming microlenses (e.g., the microlenses120and125illustrated inFIGS.2A-2C). In some embodiments, the example process300illustrated inFIG.3includes one or more processes between the process block313and at least part of the process block315for depositing metal material for forming the metal grid structure250on the insulation layer270, as illustrated in intermediate state440inFIG.4E. As shown, the metal grid structure250can be disposed overlying the insulation layer270prior to deposition of the conformal layer470illustrated inFIG.4Cof the insulation layer270, such that the metal grid structure250is at least partially embedded in the insulation layer270(e.g., the conformal layer470of the insulation layer270at least partially encapsulates the metal grid structure250). Where the insulation layer270includes the same or similar material (e.g., silicon oxide) as included in the dielectric layer235, the multilayer reflective stack215and the metal grid structure250can be embedded in the dielectric layer235. In this way, the metal grid structure250can be chemically isolated from the multilayer reflective stack215and also from additional/alternative structures subsequently formed overlying intermediate state440illustrated inFIG.4E. In addition, subsequently deposited color filter material (e.g., to form the color filters245illustrated inFIGS.2A-2C) can also be insulated from the metal grid structure250. As with intermediate state430, conformal layer470can be at least partially conformal with surfaces of the metal grid structure250, based at least in part on deposition thickness of the insulation layer270, or more specifically the conformal layer470, and the type of deposition techniques employed that can introduce defects in conformality, such that the term “conformal” does not inherently refer to a completely conformal layer.

The process block315illustrated in the example process300ofFIG.3may further include additional operations for forming color filters and microlenses (e.g., the color filters245, microlenses120, and microlenses125illustrated inFIGS.1-2C), as well as additional or alternative structures, as illustrated in state450illustrated inFIG.4F, which reproduces the cross-section view ofFIG.2A. While not described in detail, it is understood that processes for depositing color filters245can include patterned polymer deposition (e.g., by photolithography), followed by planarization (e.g., by chemical mechanical polishing configured for planarizing a polymer surface). Similarly, the microlenses120and125can be fabricated and subsequently transferred onto the color filters245in accordance with the tessellated pattern of the first pixel structures105and the second pixel structures110as illustrated inFIG.1. In this way, intermediate states420-440ofFIGS.4C-4Ecan be further fabricated into the example image sensor100, which can be configured to function as a sensor of electromagnetic radiation in the visible spectrum or invisible radiation including, but not limited to, ultraviolet, infrared, or higher energy electromagnetic radiation. Further, the example image sensor can be configured for selective imaging at pre-determined wavelengths by depositing filter material that provides energy-selective filters other than the RGB color triad discussed.

FIG.5is a functional block diagram of an imaging system502including an image sensor500described in an exemplary embodiment inFIGS.1-4F, in accordance with embodiments of the present disclosure. Image sensor500can have a structure corresponding to example image sensor100illustrated inFIG.1, with first pixel structures105and second pixel structures110as described in more detail in referenceFIGS.1-2C. The imaging system502includes image sensor500to generate electrical or image signals in response to incident radiation570, objective lens(es)565with adjustable optical power to focus on one or more points of interest within the external scene503, and controller550to control, inter alia, operation of image sensor500and objective lens(es)565. Image sensor500is one possible implementation of example image sensor100illustrated inFIG.1. Image sensor500is a simplified schematic showing a semiconductor material501with a plurality of photodiodes505disposed within respective portions of the semiconductor material501, a plurality of color filters510, and a plurality of micro-lenses515. The controller550includes one or more processors552, memory554, control circuitry556, readout circuitry558, and function logic560.

The controller550includes logic and/or circuitry to control the operation (e.g., during pre-, post-, and in situ phases of image and/or video acquisition) of the various components of imaging system502. The controller550can be implemented as hardware logic (e.g., application specific integrated circuits, field programmable gate arrays, system-on-chip, etc.), software/firmware logic executed on a general-purpose microcontroller or microprocessor, or a combination of both hardware and software/firmware logic. In one embodiment, the controller550includes the processor552coupled to memory554that stores instructions for execution by the controller550and/or one or more other components of the imaging system502. The instructions, when executed, can cause the imaging system502to perform operations associated with the various functional modules, logic blocks, or circuitry of the imaging system502including any one of, or a combination of, the control circuitry556, the readout circuitry558, the function logic560, image sensor500, objective lens565, and any other element of imaging system502(illustrated or otherwise). The memory is a non-transitory computer-readable medium that can include, without limitation, a volatile (e.g., RAM) or non-volatile (e.g., ROM) storage system readable by controller550. It is further appreciated that the controller550can be a monolithic integrated circuit, one or more discrete interconnected electrical components, or a combination thereof. Additionally, in some embodiments one or more electrical components can be coupled together to collectively function as controller550for orchestrating operation of the imaging system502.

Control circuitry556can control operational characteristics of the photodiode array505(e.g., exposure duration, when to capture digital images or videos, and the like). Readout circuitry558reads or otherwise samples the analog signal from the individual photodiodes (e.g., read out electrical signals generated by each of the plurality of photodiodes505in response to incident light to generate image signals for capturing an image frame, and the like) and can include amplification circuitry, analog-to-digital (ADC) circuitry, image buffers, or otherwise. In the illustrated embodiment, readout circuitry558is included in controller550, but in other embodiments readout circuitry558can be separate from the controller550. Function logic560is coupled to the readout circuitry558to receive image data to de-mosaic the image data and generate one or more image frames. In some embodiments, the electrical signals and/or image data can be manipulated or otherwise processed by the function logic560(e.g., apply post image effects such as crop, rotate, remove red eye, adjust brightness, adjust contrast, or otherwise).

Reference throughout this specification to “one example” or “one embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, the appearances of the phrases “in one example” or “one embodiment” in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics can be combined in any suitable manner in one or more embodiments.

Spatially relative terms, such as “beneath,” “below.” “over,” “under,” “above,” “upper,” “top,” “bottom,” “left,” “right,” “center,” “middle,” and the like, can be used herein for ease of description to describe one element or feature's relationship relative to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is rotated or turned over, elements described as “below” or “beneath” or “under” other elements or features would then be oriented “above” the other elements or features. Thus, the exemplary terms “below” and “under” can encompass both an orientation of above and below. The device can be otherwise oriented (rotated ninety degrees or at other orientations) and the spatially relative descriptors used herein are interpreted accordingly. In addition, it will also be understood that when an element is referred to as being “between” two other elements, it can be the only element between the two other elements, or one or more intervening elements can also be present.

The processes explained above can be implemented using software and/or hardware. The techniques described can constitute machine-executable instructions embodied within a tangible or non-transitory machine (e.g., computer) readable storage medium, that when executed by a machine (e.g., controller550ofFIG.5) will cause the machine to perform the operations described. Additionally, the processes can be embodied within hardware, such as an application specific integrated circuit (“ASIC”), field programmable gate array (FPGA), or otherwise.