Method and apparatus for reusable and relative indexed register resource allocation in function calls

The disclosed systems, apparatuses and methods are directed to optimizing by a compiler register resource allocation for functions of a module, using a Register File comprising a limited number of registers. After performing interprocedural analysis in the module, the compiler computes the number of registers used by each function, and compiles the function to final machine code, except at callsites where a call is detected to be made to another function. At each callsite and for each called function, the compiler expands call instructions to final machine code after computing and setting a relative index to be used by a called function for running in an available part of the Register File. The relative index optimizes register resource allocation by minimizing the number of spilled registers before a function is called.

FIELD

The present disclosure generally relates to the field of register resource optimization, in particular, to a method and apparatus for optimizing allocation of such resource in function calls.

BACKGROUND

Processors often have general purpose registers or register file, shared by processing threads and partitioned at run-time. These resources provide memory capabilities with very fast access to and from the processor, in a limited quantity owing to the hardware cost of such resources. Processors also use cheaper memory resources, such as caches and main memory, in much larger quantities, but also much slower read/write performances. Exhaustion of register resources while processing imposes on the processor to spill values held in registers to caches and/or main memory. Such spill imposes a high penalty on processing, and is very expensive in terms of both performance and energy, and thus highly inefficient.

For function calls, a regular calling convention would typically require caller and callee spilling live registers to stack, and restoring them after return from callee. Such regular calling conventions require determining how many registers need to be saved for caller, how many registers need to be passed on to the callee, leading to partitioning the available register file, and involving large spilling over to other memory resources.

This may lead to under-utilization of the register file (i.e., although there is enough registers to hold both caller and callee live data, data are stored/loaded to/from stack). Besides, processor programming typically uses inlining when possible (with a large main function and small called functions).

As an example, a particular computing environment may exacerbate this problem: that of raytracing processing with a Graphical Processing Unit (GPU), where shader pipelines make interactions between shaders more dynamic. Shader can call other shaders, much like indirect method invocation in procedural programming. In this computing environment, inlining may not even be a possibility.

Typically, all function/shader register resource allocation requests are resolved and finalized at compile time. They are encoded in the resulting binary and therefore register resource assignments are immutable once compilation completes. Indirect function invocations make it desirable for register resource allocation to be dynamic between function/shader caller and callee.

SUMMARY

The present technology provides a register allocation scheme for callees to “reuse” free register resources at Callsite (a base class of dynamic calling), such allocation scheme being “relative” to the caller. More particularly, the present technology allows for a compiler to perform optimized, dynamic register resource allocation in calls, in particular indirect ones. It provides for optimizing register resource allocations e.g. register allocations in calls using dynamic resource reuse and dynamically indexed resource accesses. It proposes a new mechanism to manage and optimize register resource allocations at runtime based on actual resource usage analysis for each Callsite at compile time, resulting in more efficient resource utilization and reducing probability of spill operation due to register file resource exhaustion. It provides a compiler with the capability to optimize runtime code that anticipates and handles register resource exhaustion, with a recourse to spilling only when such resource is actually about to be depleted.

The present technology enables compiler to perform register resource dataflow analysis to find resource reuse pattern at each Callsite. Based on the analysis, compiler creates a customized allocation map and allocation pointer for callee to consume, realizing an optimized and dynamic allocation scheme among caller and callee(s).

It also proposes dynamic relative register resource access mechanism to facilitate the allocation scheme, which enables compiler to flexibly generate one copy of compiled code for different allocation scenarios at runtime.

An objective of the present technology is therefore to provide a technique for optimizing the use of a register file by functions, by exploiting the availability of free registers so as to avoid having to spill values held in registers to much slower caches and/or main memory. The apparatuses, methods and systems as disclosed herein permit a compiler to, after analyzing call interactions between functions, pass on to called functions relative indexes allowing such functions to use free registers in the register file before having to spill values from registers.

In accordance with this objective, an aspect of the present technology provides a method for optimizing by a compiler register resource allocation for a function Siof a module, i>0, using a Register File comprising a number of registers, Nof_regfile. The method comprises performing interprocedural analysis in the module, and (i) computing the number of registers used by the function Si, Nof_regi, and (ii) compiling the function Sito final machine code, wherein if the compiler detects a call j, j< >i, to another function Si, the compiler leaves the call instructions as pseudo instructions, Callsiteij. The method further comprises for each Callsiteij, (i) determining one or several called functions Sk, k< >i, as Calltargetijk, and (ii) computing a maximum number of live registers used by function Siat the Callsiteij, maxRegIndexij, and computing RegIndexForRelIndexij=maxRegIndexij+1. The method further comprises yet for each Callsiteijand each Calltargetijk, expanding the call instructions to final machine code toward (i) reading the value of a relative index Rel_Indexifor the function Si, and computing a sum of Rel_Indexi+RegIndexForRelIndexij+Nof_regkfor the function Calltargetijk, and (ii) comparing the computed sum to Nof_regfile, wherein: if the computed sum is less than, or equal to Nof_regfile, computing and setting a relative index Rel_Indexijkthat is passed on to each Calltargetijkat Callsiteijto be used by Calltargetijkas register offset for running using an available part of the Register File; otherwise computing and spilling registers from the Register File, and computing and setting an associated relative index Rel_Indexijkthat accounts for the spilled registers, and that is passed on to each Calltargetijkat Callsiteijto be used by Calltargetijkas register offset for running using an available part of the Register File; and repeating the computing, compiling, determining, computing, reading, comparing, computing and spilling and setting for all functions Si of the module.

In some embodiments of the method, functions Siare shader functions performing raytracing in a Graphical Processing Unit, GPU.

In some other embodiments of the method, the performing interprocedural analysis in the module involves an analysis of at least one of (i) caller-callee relationships between functions Si, or (ii) function Skcall target information.

In some other embodiments of the method, the compiler uses profiling information in addition to performing interprocedural analysis.

In some other embodiments of the method, the relative index Rel_Indexijkis passed on by writing it to a register R0 of the Calltargetijk.

In some other embodiments of the method, the relative index Rel_Indexijkis passed on to the Calltargetijkby writing it in a processor register that is not part of the Register File, and fetching it in such register by the Calltargetijk.

In some other embodiments of the method, when performing interprocedural analysis in the module involves an analysis of caller-callee relationships between functions Si, the computing the number of registers Nof_regiused by the functions Siis performed by (i) computing Nof_regifor each leaf function among the functions Si, and (ii) for each leaf function, iteratively computing Nof_regifor each function moving up the call chain among the functions Sithat are in a caller-callee relationship with the leaf function.

In some other embodiments of the method, when performing interprocedural analysis in the module involves an analysis of function Skcall target information, the computing the number of registers Nof_regiused by the functions Siis performed on demand, and if the call target information for a Callsiteij is unknown, compiler returns Nof_regias Nof_regfile.

In some other embodiments of the method, the computing and setting a relative index Rel_Indexijkthat is passed on to each Calltargetijkat Callsiteijin the case the computed sum is less than, or equal to Nof_regfile, comprises expanding the call instructions to final machine code toward (i) computing: Rel_Indexijk=R0+RegIndexForRelIndexijk, where R0 holds the Rel_Indexifor function Si, (ii) storing the value Rel_Indexijk, in register indexed at RegIndexForRelIndexij, RRegIndexForRelIndexij, (iii) setting: Rel_indexk=RRegIndexForRelIndexij, (iv) calling Sk, (v) computing: R0=R0−RRegIndexForRelIndexij, and (vi) setting: Rel_indexi=R0.

In some other embodiments of the method, the computing and setting a relative index Rel_Indexijkthat is passed on to each Calltargetijkat Callsiteijin the case the computed sum is more than Nof_regfile, comprises expanding the call instructions to final machine code toward (i) computing a number of registers to spill NSpillijfrom the Register File: NSpillij=(Nof_regfile−(R0+RegIndexForRelIndexij+Nof_regk), (ii) setting: Rel_indexi=Rel_indexijk, (iii) spilling registers R0 to RNSpillij−1, (iv) storing Rel_indexijkin R0, and (RegIndexForRelIndexij−NSpillij) in R1, (v) calling Sk, (vi) computing: Rfree=R0+R1, and storing Rfreein a register other than R0 or R1, (vi) unspilling registers R0 to RNSpillij-1, and (vii) setting: Set Rel_indexi=Rfree.

In accordance with this objective, a further aspect of the present technology provides an apparatus comprising a processor, a Register File comprising a number of registers, Nof_regfile, and a Memory, the processor running a compiler configured to compile a module comprising functions S to processor executable instructions, wherein the compiler is further configured to optimize register resource allocation for a function Siof the module, i>0, the optimizing comprising: performing interprocedural analysis in the module, and (i) computing the number of registers used by the function Si, Nof_regi, and (ii) compiling the function Sito processor executable instructions. The optimizing further comprises, if the compiler detects a call j, j< >i, to another function Si, leaving the call instructions as pseudo instructions, Callsiteij, and for each Callsiteij, (i) determining one or several called functions Sk, k< >i, as Calltargetijk, and (ii) computing a maximum number of live registers used by function Siat the Callsiteij, maxRegIndexij, and computing RegIndexForRelIndexij=maxRegIndexij+1. The optimizing further comprises for each Callsiteijand each Calltargetijk, expanding the call instructions to processor executable instructions toward (i) reading the value of a relative index Rel_Indexifor the function Si, and computing a sum of Rel_Indexi+RegIndexForRelIndexij+Nof_regkfor the function Calltargetijk, and (ii) comparing the computed sum to Nof_regfile, wherein if the computed sum is less than, or equal to Nof_regfile, computing and setting a relative index Rel_Indexijkthat is passed on to each Calltargetijkat Callsiteuto be used by Calltargetijkas register offset for running using an available part of the Register File, and otherwise computing and spilling registers from the Register File to the Memory, and computing and setting an associated relative index Rel_Indexijkthat accounts for the spilled registers, and that is passed on to each Calltargetijkat Callsiteijto be used by Calltargetijkas register offset for running using an available part of the Register File. The computing, compiling, determining, computing, reading, comparing, computing and spilling and setting are repeated for all functions Siof the module.

In some embodiments of the apparatus, the processor is a Graphical Processing Unit, GPU, and the functions Siare shader functions performing raytracing.

In some other embodiments of the apparatus, the relative index Rel_Indexijkis passed on by writing it to a register R0 of the Calltargetijk.

In some other embodiments of the apparatus, the relative index Rel_Indexijkis passed on to the Calltargetijkby writing it in a register in the processor that is not part of the Register File, and fetching it in such register by the Calltargetijk.

In accordance with this objective, a further aspect of the present technology provides a non-transitory computer readable medium with computer executable instructions stored thereon that, when executed by a processor, cause the processor to optimize register resource allocation for a function Siof a module, i>0, using a Register File comprising a number of registers, Nof_regfile, the optimizing comprising performing interprocedural analysis in the module, and (i) computing the number of registers used by the function Si, Nof_regi, and (ii) compiling the function Sito final machine code, wherein if the compiler detects a call j, j< >i, to another function Si, the compiler leaves the call instructions as pseudo instructions, Callsiteij. The optimizing further comprises for each Callsiteij, (i) determining one or several called functions Sk, k< >i, as Calltargetijk, and (ii) computing a maximum number of live registers used by function Siat the Callsiteij, maxRegIndexij, and computing RegIndexForRelIndexij=maxRegIndexij+1. The optilizing further comprises yet for each Callsiteijand each Calltargetijk, expanding the call instructions to final machine code toward (i) reading the value of a relative index Rel_Indexifor the function Si, and computing a sum of Rel_Indexi+RegIndexForRelIndexij+Nof_regkfor the function Calltargetijk, and (ii) comparing the computed sum to Nof_regfile, wherein: if the computed sum is less than, or equal to Nof_regfile, computing and setting a relative index Rel_Indexijkthat is passed on to each Calltargetijkat Callsiteijto be used by Calltargetijkas register offset for running using an available part of the Register File; otherwise computing and spilling registers from the Register File, and computing and setting an associated relative index Rel_Indexijkthat accounts for the spilled registers, and that is passed on to each Calltargetijkat Callsiteijto be used by Calltargetijkas register offset for running using an available part of the Register File; and repeating the computing, compiling, determining, computing, reading, comparing, computing and spilling and setting for all functions Si of the module.

In some embodiments of the non-transitory computer readable medium with computer executable instructions stored thereon, the performing interprocedural analysis in the module involves an analysis of at least one of (i) caller-callee relationships between functions Si, or (ii) function Skcall target information.

In yet some other embodiments of the non-transitory computer readable medium with computer executable instructions stored thereon, the compiler uses profiling information in addition to performing interprocedural analysis.

In the context of the present description, the expression “processor” in intended to include a single dedicated processor, a single shared processor, or a plurality of individual processors, some of which may be shared. In some aspects of the present technology, the processor may be for example a general purpose processor, such as a Central Processing Unit (CPU), a processor dedicated to a specific purpose, such as a GPU, or a processor implemented in a FPGA. Other hardware, conventional and/or custom, may also be included.

It is to be understood that throughout the appended drawings and corresponding descriptions, like features are identified by like reference characters. Furthermore, it is also to be understood that the drawings and ensuing descriptions are intended for illustrative purposes only and that such disclosures are not intended to limit the scope of the claims.

DETAILED DESCRIPTION

The present technology is being described in a general computing environment context, yet it will be appreciated by the person skilled in the art that the teachings herein are also applicable to particular computing environments, such as that of raytracing and shader callers and callees in a GPU, as a method and system for optimizing register resource allocation in function calls using dynamic relative indexing and reuse of such resources.

For a processing function being compiled, e.g. a called function (callee), an allocation map and an allocation pointer may be consulted to look up reusable register resources from up the call chain. To access register resources within the compilation body, relative indexing of resources may be used, with the base index dynamically set depending on the allocation map and allocation pointer passed in at the Callsite. “Function” herein defines a software processing element comprising instructions, and forming of a module or a library of functions, in which “interprocedural analysis” by a compiler allows to determine the caller/callee relationships in direct calls, and, for indirect calls and a given caller, a view of possible callees with associated likelihood or % of being called. In particular embodiments of the technology, profiling information may also be used in addition to interprocedural analysis. “Call”, “called” or “calling” herein is used interchangeably for respectively “invoke”, “invoked” or “invoking”, to refer to the action of causing a program, a function, a routine, etc. to execute, without technical differences that affect the generality of the teachings herein.

Runtime code may be generated at each Callsite to check for register resource exhaustion and minimal amount of instructions are executed for the necessary spill/unspill operations. If the compiling function invokes other functions, data flow analysis may be performed to determine potential reusable register resources at each Callsite. The largest consecutively free indexed resource may be determined, which forms the allocation map that may be passed to the called function (callee). The callee may be compiled using the same mechanism.

FIG. 1illustrates a call between functions which may be optimized with the present technology. The language and representation used as appreciated by the person skilled in the art is that of pseudo-code, not specific to any programming language, yet reflecting a particular architecture. A function101calls (104) a function102, which in turn calls (105) a function103. An illustrated assumption is that the processor in this environment may consume a Register File100, comprising 64 registers, numbered R0 to R63.

Further illustrated assumptions regarding function101are: it (i) uses a total of 62 registers R0 to R61 (as represented with106), (ii) uses 21 live registers R0 to R20 at Callsite for function102, and (iii) has a value of “0” in R0. “Live registers” herein defines registers in which a data value is stored which is needed by a function after having invoked/called a lower level function.

Function101involves a number of instructions using R0 to R20. Then, before a call (104) is made to function102: (i) the value read from R0 may be added to a value of “21” (number of used live registers at Callsite, a constant for a compiler (not represented), or immediate value that may be encoded directly in an instruction), and the result may be stored in R21 (instruction: R21=R0+21=21), and (ii) a special instruction (Set Rel_Index=R21) allows to pass on to function102a relative index/offset that the hardware may use to offset the physical location of registers used by function102(represented as107) relative to the Register File100.

Returning from function102, the value may be read from R0 which at this point is still the R0 used for/by function102(because the relative index is still that as set by the preceding instruction: Set Rel_Index=R21) with a value of 21, and “21” (number of used live registers at Callsite) may be subtracted from that value. The relative index may be in fact restored to its value prior to the call104. Then function101may run instructions using R21 to R61.

A number of registers used by function101, Nof_reg101, may be calculated as the minimum between “64” (number of registers in Register File100) and the maximum between “62” (62 registers used by function101) and a number that depends, as explained below, on the registers used by functions down the call chain from function101.

Regarding function102, further illustrated assumptions are: it (i) uses a total of 31 registers R0 to R30 (as represented with107), and (ii) uses 11 live registers R0 to R10 at Callsite for function103. Through the Set Rel_Index=R21 instruction in function101, the value of R0 may be “21”.

Function102involves a number of instructions using R0 to R10. Then, before a call (105) is made to function103: (i) the value read from R0 may be added to a value of “11” (number of used live registers at Callsite, a constant for the compiler, or immediate value that may be encoded directly in an instruction), and the result may be stored in R11 (instruction: R11=R0+11=32), and (ii) the special instruction (Set Rel_Index=R11) allows to pass on to function103a relative index/offset that the hardware may use to offset the physical location of registers used by function103(represented as108) relative to the Register File100.

Returning from function103, the value may be read from R0 which at this point is still the R0 used for/by function103(because the relative index is still that as set by the preceding instruction: Set Rel_Index=R11) with a value of 11, and “11” (number of used live registers at Callsite) may be subtracted from that value. The relative index may be in fact restored to its value prior to the call105. Then function102may run instructions using R11 to R30.

A number of registers used by function102, Nof_reg102, may be calculated as the minimum between “64” (number of registers in Register File100) and the maximum between “31” (31 registers used by function102) and a number that depends, as explained below, on the registers used by functions down the call chain from function102.

Regarding function103, further illustrated assumptions are: it (i) uses a total of 27 registers R0 to R26 (as represented with108), and (ii) does not call any other function down the call chain. Thus a number of registers used by function103, Nof_reg103, may be calculated as “27”, which allows in turn to calculate Nof_reg102and Nof_reg101.

Thus, physical registers R21 to R61 from Register File100are optimally used for consumption by functions102and103.

FIG. 2illustrates a top-level function making a call to functions which may be optimized with the present technology, in the same processing environment of a Register File100, comprising 64 registers.

Illustrated assumptions regarding top-level function201are: it (i) uses a total of 31 registers R0 to R30 (as represented with204), (ii) uses 9 live registers R0 to R8 at Callsite for function202, and (iii) has a value of “0” in R0. Regarding a called function202, further illustrated assumptions are: it uses a total of 62 registers R0 to R61 (as represented with205).

Function201involves a number of instructions using R0 to R8. Then, at a call (203) made to function202: a compiler (not represented) may conduct interprocedural analysis and have a view of register needs by all functions, and thus may know at Callsite in top-level function201, that (i) function202is the only possible call target, (ii) 9 live registers are required by function201, and (iii) Nof_reg202=62. The sum 9+62=71 is higher than the total number of available registers in Register File100(Nof_reg100=64), and thus, a need to spill 7 registers before the call203arises. A top-level function201runtime spill check may then be the comparison between the values of:
[Nof_live reg201+R0+Nof_reg202] vs Nof_reg100
and a compiler may dynamically generate spill for 7 registers R2 to R8 before the call203. The spill may be to a Cache/Memory206.

The spilled registers may be the 7 consecutive registers immediately preceding the last of the live registers R8, i.e. function201may spill registers R2 to R8. Next, (i) the value read from R0 may be added to a value of “9−7” (a constant for the compiler, or immediate value that may be encoded directly in an instruction: number of used live registers at Callsite, minus number of spilled registers), the result may be stored in what becomes the next available register after the spill, i.e. R2 (instruction: R2=R0+(9−7)=2), and (ii) the special instruction (Set Rel_Index=R2) allows to pass on to function202a relative index/offset that the hardware may use to offset the physical location of registers used by function202(represented as205) relative to the Register File100.

Returning from function202, the value may be read from R0 which at this point is still the R0 used for/by function202(because the relative index is still that as set by the preceding instruction: Set Rel_Index=R2) with a value of 2, and “9−7” (number of used live registers at Callsite minus number of spilled registers) may be subtracted from that value. The relative index may be in fact restored to its value prior to the call203. Then function201may run instructions using R9 to R30.

A number of registers used by function201Nof_reg201may be calculated as the minimum between “64” (number of registers in Register File100) and the maximum between “9+62” (9 live registers used by function201, plus 62 registers used by function202) and “31” (number of registers used by function201).

The compiler may then Unspill from the Cache/Memory206registers R2 to R8 back into Register file100. In this way, with the present technology, just the right amount of spill/unspill may be generated. The compiler may check the numbers of any temporary or local registers dead at Callsite, and re-use them for the callee by dynamically setting relative index for callee.

FIG. 3illustrates a top-level function making an indirect call where the actual target function may be one of several. With assumptions as, unless otherwise mentioned, inFIGS. 1 and 2, Callsite in a top-level function301may have two possible targets, and an indirect call302may be made to the function202, or303to the function102.

Illustrated assumptions regarding top-level function301are: it (i) uses a total of 35 registers R0 to R34, (ii) uses 11 live registers R0 to R10 at Callsite for indirect call to one of functions202or102, and (iii) has a value of “0” in R0. Regarding potentially called functions202and102, further assumptions are as illustrated inFIGS. 1 and 2.

Function301involves a number of instructions using R0 to R10. Then, before an indirect call (302,303): a compiler (not represented) may conduct interprocedural analysis and have a view that either function202or102may be called, with associated likelihood or % of being called, that function103may be called by function102, and also of all register needs by all functions, and thus may know at Callsite in top-level function301, that (i) 11 live registers are required by function301, (ii) Nof_reg202=62, and (iii) Nof_reg102=38.

Compiler may thus generate code that checks for all possible call target functions, and determine any need for spilling registers depending on actual target, by comparing respectively: [Nof_live reg301+R0+Nof_reg202] vs Nof_reg100for call302, and [Nof_live reg301+R0+Nof_reg102] vs Nof_reg100for call303.

The compiler may accordingly generate code that both spills registers and sets the relative index depending on the target function:

if target is function202: the sum [Nof_live reg301+R0+Nof_reg202] is 11+0+62, higher than the number of registers in Register File100; in this case, 73−64=9 registers need be spilled. The compiler may dynamically generate spill for 9 registers R2 to R10. The spill may be to the Cache/Memory206. Next, the value read from R0 may be added to a value of “11−9” (a constant for the compiler, or immediate value that may be encoded directly in an instruction: number of used live registers at Callsite, minus number of spilled registers), the result may be stored in what becomes the next available register after the spill, i.e. R2 (instruction: R2=R0+(11−9)=2), and (ii) the special instruction (Set Rel_Index=R2) allows to pass on to function202, if called, a relative index/offset that the hardware may use to offset the physical location of registers used by function202relative to the Register File100;

if target is function102: the sum [Nof_live reg301+R0+Nof_reg102] is 11+0+38, lower than the number of registers in Register File100; in this case, no registers need be spilled. Next, (i) the value of “11” (number of used live registers at Callsite, a constant for the compiler, or immediate value that may be encoded directly in an instruction) may be input in R11, and (ii) the special instruction (Set Rel_Index=R11) allows to pass on to function102, if called, a relative index/offset that the hardware may use to offset the physical location of registers used by function102relative to the Register File100.

Compiler may thus spill registers depending on the actual target and its use of registers, and spill only the minimum number of registers. Spilling is optimized, and optimal spilling code adapted per target.

Returning from the indirect call:

if returning from function202: the value may be read from R0 which at this point is still the R0 used for/by function202(because the relative index is still that as set by the preceding instruction: Set Rel_Index=R2) with a value of 2, and “11−9” (number of used live registers at Call site minus number of spilled registers) may be subtracted from that value. The relative index may be in fact restored to its value prior to the call302. The compiler may then Unspill from the Cache/Memory206registers R2 to R10 back into Register file100;

if returning from function102: the value may be read from R0 which at this point is still the R0 used for/by function102(because the relative index is still that as set by the preceding instruction: Set Rel_Index=R11) with a value of 11, and “11” (number of used live registers at Callsite) may be subtracted from that value. The relative index may be in fact restored to its value prior to the call303;

then function301may run instructions using R11 to R34.

In this way, with the present technology, just the right amount of spill may be generated.

In the foregoing examples and figures, it has been assumed that functions101,201and301had a value of “0” in R0, indicative of functions101,201and301being respectively top-level functions. More generally it has been assumed that at compile time for a given function, the compiler could have through, for example, interprocedural analysis, for each analyzed function, knowledge of the value of R0, or of the relative index for that function, or of the level (top-level or other level) for that function. There may however be cases when at compile time, the compiler may not be able to have access to, or deduce, that knowledge.

FIG. 4depicts method steps by a compiler (not represented) according to the present technology, in the general case when the compiler for an analyzed function does not have access to that knowledge, in particular is not able to determine at compile time that the value of R0 for a function is “0” (case of top-level function), or more generally to determine the value of a relative index in R0 (case of a called function). The hardware environment is that of Register File100comprising a limited number of registers, Nof_regfile.

At step401, the compiler may perform interprocedural analysis within the module, and for all function Siof the module: (i) computes a corresponding number of registers Nof_regiused by that function Si, and (ii) compiles the function Sito final machine code, except that if the compiler detects in the function Sia call j to another function: the compiler leaves corresponding call instructions as pseudo instructions (Callsiteij) to be expanded to final machine code in later steps.

For a leaf function, i.e. a function with no calls, Nof_regiis simply the largest register index used by the function+1. For example, if a leaf function f uses registers R0 to R35, Nof_regf=35+1=36. For a non-leaf function n, for each Callsite c in n, RegIndexcmay be computed as maxRegIndexnc+1, where maxRegIndexncis the largest register index used by non-leaf function n at Callsite c. For each Callsite c in n, and for each call target t of c, the compiler may compute the number of registers required for t as: Nof_regtc=RegIndexc+Nof_regt. Nof_regnis defined as min(Nof_regfile, max(Nof_regtc, RegIndexn).

In one embodiment of the present technology, the compiler may utilize interprocedural analysis to compute Nof_regifor functions in a certain order; for example, by computing leaf functions first, and iteratively moving up the call chain to caller functions in the caller-callee relationship graph. In another embodiment, compiler may compute Nof_region demand, and consult interprocedural analysis result to obtain call targets. If call target information for a Callsiteijis unknown, compiler may simply return Nof_regfileas a conservative estimation.

At step402, the compiler determines for each function Siand for each Callsiteij, one or several called functions other than Si, as Calltargetijk, based on an analysis of (i) function caller-callee relationships, and/or (ii) function call target information.

At step403, for each function Siand for each encountered Callsiteij, the compiler computes a maximum number of live registers maxRegIndexijat the Callsiteij. This maximum number is the largest register index along any execution path from the start of function Si, to Callsiteij. For example, inFIG. 1, it is R20 for function106. Compiler further computes RegIndexForRelIndexij: RegIndexForRelIndexij=maxRegIndexij+1.

At step404, for each function Si, for each encountered Callsiteij, and for each encountered Calltargetijk, the compiler expands pseudo call instructions and generates runtime instructions for the function Sitoward: (i) reading the value of a relative index Rel_Indexifor the function Siin R0, and (ii) computing the sum of: RegIndexForRelIndexij, Rel_Indexi, and the number of registers Nof_regkused by the function Calltargetijk.

At step405, for each function Si, for each encountered Callsiteij, and for each encountered Calltargetijk, the compiler generates runtime instructions toward comparing the sum computed at step404, to the total number of registers in Register File100, Nof_regfile.

At step406, if the sum computed at step404is less than, or equal to, the total number of registers in Register File100, Nof_regfile, the compiler expands pseudo call instructions with runtime instructions toward computing and setting a relative index Rel_Indexijkthat is passed on to each Calltargetijkat Callsiteijto be used by the function Calltargetijkas register offset for running using an available part of Register File100.

In an embodiment of the technology, this may be realized by runtime instructions that perform: (i) computing: Rel_Indexijk=R0+RegIndexForRelIndexijwhere R0 holds the Rel_Indexifor function Si, (ii) storing the value Rel_Indexijk, in register indexed at RegIndexForRelIndexiji.e. RRegIndexForRelIndexij; if required, other parameters may be set at RRegIndexForRelIndexij+1, RRegIndexForRelIndexij+2etc, (iii) generating an instruction: Set Rel_indexk=RRegIndexForRelIndexijto set the new relative index for Sk, (iv) generating the call instruction, and (v) generating the instruction: R0=R0−RRegIndexForRelIndexijto reset R0 value back to the previous value for Si, and the instruction: Set Rel_indexi=R0 to reset the relative index for Si.

At step407, if the sum computed at step404is higher than the total number of registers in Register File100, Nof_regfile, the compiler expands pseudo call instructions with runtime instructions for the function Sitoward computing and spilling a number of registers from the Register File100, and invoking Calltargetijkie. computing and setting an associated relative index Rel_Indexijkthat accounts for such spilled registers, and that is passed on to each Calltargetijkat Callsiteijto be used by Calltargetijkas register offset for running using an available part of Register File100.

In an embodiment of the technology, this may be realized by runtime instructions that perform: (i) generating instructions to compute the number of registers to spill NSpillijfrom the Register File100, and an associated relative index Rel_Indexijkthat is passed on to Calltargetijkat Callsiteijto be used by Calltargetijkas register offset for running using an available part of register file100: NSpillij=(Nof_regfile−(R0+RegIndexForRelIndexij+Nof_regk), (ii) generating spill instructions that save these NSpillijregisters, first the instruction: Set Rel_indexi=Rel_indexijkto first adjust the relative index, and then spill R0, R1 . . . to RNSillij−1, (iii) generating instructions that store value Rel_indexijkin R0, and store value (RegIndexForRelIndexij−NSpillij) in R1. The value in R1 may be used as an additional parameter to indicate how callee's relative index has shifted compared to caller's relative index, (iv) generating the call instruction, (v) generating an instruction: Rfree=R0+R1 to compute Rel_Indexiand save it in a free register, as R0 and R1 will be overwritten after unspill, (vi) generating unspill instructions that restore NSpillijregisters starting from register indexed at R0, and (vii) generating an instruction: Set Rel_indexi=Rfreeto reset the relative index for Sito Rel_Indexi.

In relation to the foregoing (i): NSpillijis a runtime value which may be larger than RegIndexForRelIndexij. This means in addition to saving all live registers at Callsiteijin Si, some live registers from up the call chain may also be saved. The range of registers to be spilled may thus start from physical register indexed at Rel_indexijk=(R0+RegIndexForRelIndexij−NSpillij) for NSpillijregisters.

When at compile time for a given function, the compiler has through, for example, interprocedural analysis, for each analyzed function, knowledge of the value of R0, or of the relative index for that function, or of the level (top-level or other level) for that function, then certain computation such as checking for spill in the foregoing steps can be performed at compile time rather than runtime with compiler-generated instructions. InFIG. 1, for example, if compiler obtains knowledge that R0 holds a certain value or has an upper limit, the check in step405can be performed at compile time. If the check indicates no spill will occur, the compiler does not generate any spill instructions

The method and process steps described above, and the compiler (not represented) may be implemented in a computing system, of which an example, without limitation, may be found in relation toFIG. 5. As will be appreciated by the person skilled in the art, such computing system may be implemented in any other suitable hardware, software, and/or firmware, or a combination thereof, and may be a single physical entity, or several separate physical entities with a distributed functionality.

In some aspects of the present technology, the computing system500may comprise various hardware components including one or more single or multi-core processors collectively represented by a processor501, a solid-state drive502, a memory503and an input/output interface504. In this context, the processor501may or may not be included in a FPGA. In some other aspects, the computing system500may be an “off the shelf” generic computing system. In some aspects, the computing system500may also be distributed amongst multiple systems. The computing system500may also be specifically dedicated to the implementation of the present technology. As a person in the art of the present technology may appreciate, multiple variations as to how the computing system500is implemented may be envisioned without departing from the scope of the present technology.

The processor501may include the Register File100. In some aspects, the Register File100may also be included in memory503, or distributed amongst multiple systems.

Communication between the various components of the computing system500may be enabled by one or more internal and/or external buses505(e.g. a PCI bus, universal serial bus, IEEE 1394 “Firewire” bus, SCSI bus, Serial-ATA bus, ARINC bus, etc.), to which the various hardware components are electronically coupled. [78] The input/output interface504may allow enabling networking capabilities such as wire or wireless access. As an example, the input/output interface504may comprise a networking interface such as, but not limited to, a network port, a network socket, a network interface controller and the like. Multiple examples of how the networking interface may be implemented will become apparent to the person skilled in the art of the present technology. According to implementations of the present technology, the solid-state drive502may store program instructions, such as those part of, for example, a library, an application, etc. suitable for being loaded into the memory503and executed by the processor501for the method and process steps according to the present technology.

The memory503may include the Cache/Memory206. In some aspects, the Cache/Memory206may also be included in processor501, or distributed amongst multiple systems.

In this environment, each function Siexecutes using its own relative index passed in its register R0, by a calling function as the case may be, as a register offset for running using an available part of Register File100. In one embodiment of the present technology, as a side effect of executing the set Rel_Index instruction, the value of the relative index may be stored in a hardware register that is not part of Register File100. The currently active relative index may be read via this hardware register. In such embodiment, it is not required to pass the current relative index as an argument in R0, as it may always be read from the hardware register.

It is to be understood that the operations and functionality of the disclosed methods and apparatuses may be achieved by hardware-based, software-based, firmware-based elements and/or combinations thereof. Such operational alternatives do not, in any way, limit the scope of the present disclosure.

It will also be understood that, although the inventive concepts and principles presented herein have been described with reference to specific features, structures, and embodiments, it is clear that various modifications and combinations may be made without departing from such disclosures. The specification and drawings are, accordingly, to be regarded simply as an illustration of the inventive concepts and principles as defined by the appended claims, and are contemplated to cover any and all modifications, variations, combinations or equivalents that fall within the scope of the present disclosure.