Automatic schematic diagram generation using topology information

A netlist of a schematic diagram is generated. The netlist indicates the connectivity of components through connection lines. A normal display mode is provided in which at least a portion of the components are presented on the display, and connection lines corresponding to the components are also displayed. A topology display mode is provided in which the components are presented on the display without the connection lines. The user can switch between the topology display mode and the normal display mode while editing the schematic diagram. Automatic pin assignment and routing of the connection lines is performed according to the netlist, and is based upon grouping similarly classified connection lines. An abstract display mode is provided that presents abstract lines for a selected component, with a single abstract line running between two connected components. The abstract display mode is combinable with the topology display mode. Finally, the automatic positioning of components according to predefined topology templates is provided.

BACKGROUND OF INVENTION

1. Field of the Invention

The present invention relates to software graphics editors. More specifically, a method and related system are disclosed that enable a user to generate schematic diagrams.

2. Description of the Prior Art

Schematic diagrams are widely used to illustrate relationships between the parts of a system. Such diagrams include functional block diagrams, flowcharts, logic diagrams, circuit schematics and flow sheets, to name a few, and are broadly characterized in that they contain components that are interconnected by lines. The components are typically geometrical shapes, or standard shapes recognized amongst professions, that symbolically represent physical components or processes in the system. The interconnecting lines indicate relationships (mechanical, electrical, procedural, etc.) between the components so connected. Schematic diagrams are one of the most effective means of conveying broad information about a system, and are thus extremely useful in conveying knowledge. There exists a great deal of software in public use that enables users to design, edit and print schematic diagrams. However, despite the availability of such sophisticated software, the creation of a good schematic diagram continues to require a great deal of time, much of it spent in the tedious editing of the spatial positioning of the components and interconnecting lines.

As a general guideline, a good schematic diagram should: demonstrate the interconnectedness of components, reflect the existence of logical clusters, minimize the number of intersections and jogs in the connection lines, and efficiently utilize the available drawing area. Schematic diagram generation systems must provide a number of editing features that enable a user to create a schematic diagram. At a minimum, the user must be able to specify the positions and sizes of the components, the position of pins on the components, and the routes the connection lines follow between their respective pins. As used here, the term “pin” indicates the end-point or start-point position of a connection line on a component. Each connection line thus has at least two pins. As the number of components and connection lines increase, so too does the difficulty in creating the schematic diagram. Moreover, there are times when a user may want to create two or more schematic diagrams of the same system, with each diagram emphasizing a different aspect of the system. This is termed changing the topology of the schematic diagram, as it involves the spatial reorganization of the components with respect to each other. Changing the topology of an existing diagram is a time-consuming task when using current editor software packages.

As a first step in creating a schematic diagram, the editor software creates a “netlist”, which holds information about the positions and sizes of components, and the routing of connection lines between these components. The netlist may be loaded from permanent memory (such as a hard disk, CD, etc.), or it may be created from scratch, and is used by graphics software within the editor to draw the corresponding schematic diagram on a display of the computer. As the user makes changes to the schematic diagram as presented on the display, the editing software makes corresponding changes to the netlist. The netlist is, in effect, the internal representation of the schematic diagram within the memory of the computer. As such, its exact nature is a design choice that will vary from program to program, and it is pointless to go into specific details of its organizational structure. The construction and use of such netlists is well known in the art. Netlists may also be generated automatically by specialized software that parses other higher-language files. Examples of this include the parsing of hardware description language (HDL) files to obtain a netlist for a circuit schematic. After the netlist is loaded into memory, the user is free to change the position of the components, the sizes of sizable components, the positions of floating pins, and the routing of the connection lines. As used here, a “floating pin” is one that is not constrained to a specific position on its component. Please refer toFIG. 1.FIG. 1is an example schematic diagram10. The schematic10includes six sizable components (PLA, STK, REG, INC, OUT and MUX), and thirteen fixed-sized component12for a total of 19 components. Numerous connection lines14run between the various components, and are in the form of an arrow to indicate the flow of data between the components. The components may be classed with reference to a connection line14as a “source component” or a “load component”, the terminology being adopted from the electronics profession. The connection line arrows14have their tails anchored on a source component, and their heads pointing to a load component. Depending on the connection lines14being considered, the same component may be both a source and a load, as it may both be pointed to by a connection line14, and point at another component via a connection line14. A user must spend a fair amount of time to generate the schematic10, carefully positioning and sizing the components, and routing the connection lines14. However, the topology of the schematic14is based upon an idea or theme that the user is trying to impart. To emphasize or indicate a different idea, the user may wish to change the topology of the schematic10.FIG. 2illustrates this concept.FIG. 2shows the schematic10with a different topological layout, thereby presenting a new schematic20. In many editing packages, changing the schematic10to look like the schematic20can be almost as time-consuming as making the original schematic10. For example, some editing software does not explicitly remember the connectivity of the various components. Hence, when a component is moved, such as component PLA, the connection lines14associate with the component do not move with the component. Each connection line14must therefore be re-routed, and the positions of its pins re-positioned. Other editor packages may keep track of the connectivity of the components, but they generally perform a rather crude auto-routing function that has connection lines14crossing over and through components. This is shown inFIG. 3.FIG. 3is an example schematic with connection lines14generated by a simple auto-router. It's clear fromFIG. 3that a user will have to spend a great deal of time “cleaning up” the connection lines14generated by the auto-router. Finally, and what is least obvious, is that during the design and construction of a schematic, the user may lose focus of the theme which he or she is trying to convey due to the complexity of the connection lines14. That is, it is not always a quick and easy task to determine which components are connect to which other components. The very presence of so many connection lines and pins can make simple changes to the topology of the schematic more difficult, as poorly routed connection lines and pins during intermediate stages of the design process can actually obscure the flow of information that is to be conveyed by the schematic diagram. Such obfuscation is also present inFIG. 3.

SUMMARY OF INVENTION

It is therefore a primary objective of this invention to provide an improved display methodology that permits a user to switch between a normal display mode and a topology display mode. In the normal display mode, components and their respective connection lines are displayed, whereas in the topology display mode the components are displayed without their corresponding connection lines.

It is a further objective of the present invention to provide support for the automatic generation of new topologies according to certain predefined topology templates.

It is yet another objective of the present invention to classify and group connection lines according to their driver/load characteristics.

It is another object of the present invention to provide an abstract display mode that is combinable with the topology display mode, and which provides a summary of the connectedness of the various components.

It is yet another objective of the present invention to provide automatic routing of connection lines which is based upon the classification grouping of the connection lines.

Briefly summarized, the preferred embodiment of the present invention discloses a schematic diagram editing method and corresponding computer system. The computer system includes a display and an input device, such as a mouse or a keyboard. The present invention generates a netlist of a schematic diagram. The netlist indicates the connectivity of components through connection lines. A normal display mode is provided in which at least a portion of the components are presented on the display, and connection lines corresponding to the components are also displayed. A topology display mode is provided in which the components are presented on the display without the connection lines. The user can switch between the topology display mode and the normal display mode while editing the schematic diagram. Automatic pin assignment and routing of the connection lines is performed according to the netlist, and is based upon grouping similarly classified connection lines. An abstract display mode is provided that presents abstract lines for a selected component, with a single abstract line running between two connected components. The abstract display mode is combinable with the topology display mode. Finally, the automatic positioning of components according to predefined topology templates is provided.

It is an advantage of the present invention that by enabling a user to alternate between the normal display mode and the topology display mode, the user is able to remove the distraction of connection lines at will so as to obtain a better comprehension of the topology of the schematic diagram. Further, with the addition of the abstract view superimposed upon the topology display mode, the user can quickly ascertain the connectivity of a specific component with other components by way of a minimum number of indicating lines. Classifying and grouping connection lines by their driver/load characteristics enables the abstract view to provide summarized information of the total connectivity of a selected device. Further, with an intelligent auto-router, routing a group of similar connection lines, as determined by their related classifications, leads to a more aesthetically pleasing and comprehensible schematic, which is performed automatically for the user. Finally, by providing predefined topology templates, a user can quickly and automatically organize components based upon a desired characteristic that interrelates the various components.

DETAILED DESCRIPTION

Please refer toFIG. 4andFIG. 5.FIG. 4is a simple perspective view of a computer system10according to the preferred embodiment of the present invention.FIG. 5is a block view of the computer system10. The computer system10is a standard computing platform, but is programmed to implement the present invention method. The computer system10includes a display20that is used to provide visual data to a user, input devices30that enable the user to control the computer system10, removable media devices40, a central processing unit (CPU)50, and memory60. The input devices30typically include a mouse32and a keyboard34, though other suitable devices are certainly possible (touch screen displays, light pens, etc.). The memory60is typically virtual memory as provided by an operating system100, in a manner will known to those in the art, and under which various applications run. As such, the memory60may include both volatile memory such as RAM, DRAM, SDRAM, etc., and non-volatile memory such as a hard disk. The CPU50executes programs in memory under control of the operating system100. Those skilled in the art of computer programming will recognize that the operating system100is assumed present in the preferred embodiment, as writing applications under operating systems is generally easier than writing a fully self-supporting application. Nevertheless, the operating system100is not strictly necessary. In a standard manner, the operating system100provides broad support that enables applications to obtain input from the input devices30, read data from the removable media devices40, and control the contents presented on the display20. The removable media devices40may include a CD drive42for reading a CD-ROM42r, a floppy disk drive44for reading a floppy disk44r, or other similar devices. A schematic editing program200, executable by the CPU50, is provided in the memory60, running under the operating system100. The schematic editing program200is designed to implement the features and methods of the present invention, and its design should be clear to a computer programmer of average skill in the art after reading the following disclosure. Initially, a floppy disk44r, a CD-ROM42ror any other similar removable media is provided to one of the appropriate removable media devices40, and an installation procedure is performed that utilizes data read from the removable media42r,44rto provide the schematic editing program200in the memory60. Such installation procedures are well known in the art, and it should be clear that the removable media42r,44rneed not contain an exact duplicate of the schematic editing program200as it resides in the memory60, but rather data sufficient to generate the schematic editing program200. For example, the data on the removable media42r,44rmay be scrambled to prevent unauthorized installation of the schematic editing program200.

The present invention schematic editing program200allocates memory60for a netlist210. The netlist200holds an internal representation of a schematic diagram that can be parsed and modified by the schematic editing program200. In particular, the netlist210contains data about the position212a, size212band type212cof a plurality of components212, and the pins214D,214L; pin type214band routing data214cof a plurality of connection lines214. The type212cof a component212will typically indicate the visible characteristics (i.e., a box, an OR gate, a conditional statement diamond, etc., whether or not the component is sizable, rotatable, etc.) of the component212. Pins types214bcan include floating type pins214D,214L, or fixed pins214D,214L. With floating type pins214D,214L, the position of the pin214D,214L may be placed anywhere along the perimeter of its corresponding component212. Fixed pins214D,214L are constrained to a specific position on the corresponding component212(for example, in a symbol for a logic gate, such as an AND gate, the corresponding pins214D,214L would be of a fixed pin type214b). To ease auto-routing considerations, pins214D,214L are typically floating, if possible. Textual data for labeling purposes can be associated with each component212and connection line214, and is recorded by the netlist210. As a basic characteristic, the netlist210records the relative connectivity of components212by way of the connection lines214. That is, the connectivity of one component212with another component212is recorded within the netlist210, and results in a corresponding connection line214. Exactly how this connectivity is internally indicated within the netlist210is a design choice for the programmer, and may involve nothing more than appropriate parsing of the connection lines214. A load and save module220enables a netlist210to be loaded from an external source (such as a hard disk, from the removable media devices40, etc.), and to save a netlist210to such an external source. Further, as in the prior art, the load and save module220is capable of constructing a suitable netlist210from a higher-level language, such as HDL source code. Additionally, a netlist210may be made from scratch by way of an editing module230. The editing module230enables a user to modify the netlist210, or to create a completely new netlist210. The editing module230enables the user, by way of the input devices30, to add, delete and modify components212and connection lines214.

The editing module230works in conjunction with a display module240to enable a user to view a schematic on the display20while editing that schematic. The schematic presented on the display20by the display module240is drawn according to the netlist210. Using common graphics editing techniques, the user makes changes to the schematic presented on the display20, and the editing module230makes corresponding changes to the netlist210. The display module240, in a continuous fashion, continues to update the display20as these editing steps are being performed, so that the operation appears to the user to perform in a smoothly animated manner. These graphical editing techniques, and the manner in which they utilize the input devices30, are well known in the art and do not need to be expounded upon here.

The display module240of the present invention supports three display modes, two of which are unique to the present invention. These display modes include a normal display mode242, a topology display mode244, and an abstract display mode246. Using the input devices30, the user may select one of the display modes242,244or246to utilize while editing. The display module240then uses the particular user-selected display mode242,244,246when interfacing with the editing module230to enable the user to view and edit a schematic (as defined by the netlist210) on the display20.

Please refer toFIG. 6.FIG. 6is an example schematic300as presented on the display20by the display module240when using the normal display mode242and a corresponding example netlist210. As shown inFIG. 6, the example netlist210is relatively small, having only five components212presented as five corresponding boxes302. Connection lines214in the netlist210are presented as arrows304on the display20. The direction of the arrows304indicates the driver/load arrangement of the corresponding connection lines214. Of course, it should be clear that not all five components212and corresponding connection lines214need be present at once on the display20as boxes302and arrows304. Panning and zooming operations of the user may cause some of the components212and corresponding connection lines214to move out of the viewable range of the display20, and hence only a portion of the components212and connection lines214of the netlist210may be visible on the display20at once. Such characteristics of all graphical editors are common knowledge in the art. The normal display mode242is analogous to those display modes found in the prior art, and it enables the user to edit the schematic300while viewing both the components212and the corresponding connection lines214. Additionally, any textual information associated with a component212or a connection line214is optionally displayed so as to permit clear labeling of each corresponding box302and arrow304. Although in the following only boxes302and arrows304are shown as being displayed on the display20, it should be understood that all of the display modes242,244and246support a wide variety of symbols that may be incorporated within a schematic diagram, with shapes corresponding to the corresponding type212cof the component212.

Please refer toFIG. 7.FIG. 7is an example schematic310as presented on the display20by the display module240when using the topology display mode244and the corresponding example netlist210as presented inFIG. 6. The schematic editing program200permits the user to switch at will between the normal display mode242and the topology display mode244. The method used to enable the user to switch between the various display modes242,244and246is a design choice for the user interface of the schematic editing program200, and will typically involve appropriate manipulation of the input devices30on the part of the user. As shown inFIG. 7, the example netlist210is presented by the topology display mode244with only the components212displayed, with text associated with each component212also being optionally displayed. The topology display mode244is characterized in that no connection lines214are displayed. Further, pins214D,214L are also not displayed. Hence, when in topology display mode244, the viewable portion of a netlist210is displayed in such a manner that only the graphical symbols relating to the components212are presented on the display20. InFIG. 7, this is the boxes312and any associated text. The connection lines214are not displayed when in topology display mode244, nor is any information related to the connection lines214displayed (such as textual information). While in the topology display mode244, the display module240continues to interface with the editing module230to enable the user to add, delete and modify the components212. Hence, the user can still change the relative positions212aof the components212(e.g., by dragging and dropping their associated boxes312), and similarly change the size212band type212cof the components212. The only limit is that the smallest size of a resizable component212is limited by the number of pins214D,214L associated with the component212. The primary difference of the topology display mode244over the normal display mode242is that the user is free to edit the position, size and type of the components212without being distracted by the clutter that is presented by the connection lines214and pins214L,214D. The user is thus better able to analyze the overall topology of the components212.

The schematic editing program200includes a connection line classifier250. The connection line classifier250analyzes the netlist210to determine the related connectivity of the various components212. As each connection between components212corresponds to a connection line214, the connection line classifier250in effect classifies the various connection lines214based upon their connections to the various components212. This classification is based upon the driver/load characteristic of the connection line214. In general, each connection line214has one driver pin214D that is the location of the “tail” of the connection line214, and one or more load pins214L that are the location of the “head” or “heads” of the connection line214. For the sake of simplicity, only one load pin214L is indicated for each connection line214, but it should be understood that the general case permits a plurality of load pins214L for each connection line214. The component212with which the driver pin214D is associated is considered the driver component212for the connection line214. Similarly, the component212with which the load pin214L is associated is termed the load component212of the connection line214. Each connection line214thus has a driver/load characteristic that is given by the driver component212and the load component212of the connection line214. Connection lines214having the same driver/load characteristic are grouped together by the connection line classifier250into the same class252. These classes are utilized by the abstract display mode246.

Please refer toFIG. 8with reference toFIG. 2andFIG. 5.FIG. 8is an example schematic320as presented on the display20by the display module240when using the abstract display mode246and an example netlist210corresponding to the schematic ofFIG. 2. The schematic as presented inFIG. 2would correspond to the normal display mode242for the example netlist210. As with the topology display mode244, the user is free to switch into the abstract display mode246. The abstract display mode246is preferably combined with the topology display mode244, though it is certainly possible to also combine the abstract display mode246with the normal display mode242. In the preferred embodiment, the user originates in the topology display mode244and enters into the abstract display mode246by selecting a component212. The editing module230provides a component selection function232, which is commonly known in the art, and which permits the user (by way of the input devices30) to select a particular component212, thus termed a “selected component”212. Typically, a selected component212is drawn on the display20in a special color by the display module240to indicate the special status of the component212as “selected”. As shown inFIG. 8, box322represents a selected component212. When in the topology display mode244, by selecting a component212, the user may optionally indicate an automatic transition into the abstract display mode246. That is, the user need not always enter into the abstract display mode246when a component212is selected, but rather may do so only if particularly indicated by a program setting, or by a special operation with the input devices30. Such considerations are ones merely of design choice for the user interface of the schematic editing program200. In any case, when in the abstract display mode246, a selected component212exists, and is drawn accordingly. The display module240then parses the classes252, finding any that relate to the selected component212. In particular, classes252that have the selected component212as a driver component212or a load component212are considered related. For each class252that relates to the selected component212, the abstract display mode246draws a single abstract line324on the display20from the load component212to the driver component212of the class252. Each abstract line324thus represents a summary of the connectivity of the selected component212with other components212. The abstract lines324are drawn as arrows to indicate the driver/load characteristic of each associated class252, and a single abstract line324can have two arrow heads to indicate two classes252that are identical but for a flipped relationship in their driver/load characteristic. Such an arrangement is depicted by abstract line324a. By comparing the abstract display mode246for a netlist210as presented inFIG. 8with the corresponding normal display mode242as presented inFIG. 2, it is clear that the present invention abstract display mode246offers the user an extremely quick manner in which to determine the connectivity of a selected component212. Of course, it is possible to combine the abstract display mode246with the normal display mode242, so that abstract lines324are presented on top of a display as presented by the normal display mode242. Finally, while in the abstract display mode246, each abstract line324may be provided with abstract information326. This abstract information326may be drawn when the abstract line324is drawn (in which case each abstract line324will have corresponding abstract information326), or may be drawn in response to the input devices30. For example, when a cursor is moved close to an abstract line324by way of the mouse32, a small informative window may pop up near the abstract line324to provide the abstract information326. The abstract information326will typically indicate how many load and driver connection lines214are represented by the abstract line324, the total number of connection lines214represented by the abstract line326, or both. As shown by the abstract information326inFIG. 8, abstract line324arepresents two connection lines214: one a load line214going to a component212labeled REG, and the other a driver line214coming from the REG component212. The abstract information326is drawn in response to a cursor320abeing brought into proximity with the abstract line324a.

The present invention provides the user with a variety of topology template functions that automatically change the topology of a schematic, with corresponding changes being applied to the netlist210, according to the inherent connectivity of the components212. These predefined template functions are outlined below. The manner used to enable the user to invoke the predefined template functions is, again, a design choice for the user interface of the schematic editing program200, and will typically involve the input devices30(such as pressing a key on the keyboard34, or using the mouse32to click on a button on the display20, etc.). The predefined template functions include:

The user selects a component212by way of the component selection function232, and then invokes this central template function233. The central template function233modifies the netlist210to place the user-selected component212at a central position of the schematic diagram, and then arrays the other components212around the user-selected component212. Components212that have a stronger connectivity relationship with the user-selected component212are placed closer to the user-selected component212. The relative distance between two non-user-selected components212is also based upon the connectivity relationship between the two components212. The components212should not overlap each other.

The user selects a component212by way of the component selection function232, and then invokes this fan-in template function234. The fan-in template function234modifies the netlist210to place the user-selected component212at a rightmost position of the schematic diagram with respect to the other components212, and then arrays the other components212to the left of the user-selected component212. Components212that have a stronger connectivity relationship with the user-selected component212are placed closer to the user-selected component212. The relative distance between two non-user-selected components212is also based upon the connectivity relationship between the two components212.

The user selects a component212by way of the component selection function232, and then invokes this fan-out template function235. The fan-out template function235modifies the netlist210to place the user-selected component212at a leftmost position of the schematic diagram with respect to the other components212, and then arrays the other components212to the right of the user-selected component212. Components212that have a stronger connectivity relationship with the user-selected component212are placed closer to the user-selected component212. The relative distance between two non-user-selected components212is also based upon the connectivity relationship between the two components212.

The user selects multiple components212by way of the component selection function232to define path components212, and then invokes this path template function236. The path template function236modifies the netlist210to place the path components212in a row within the schematic diagram with respect to each other, and centrally with respect to the other components212. The path template function236then modifies the netlist210to place the other components212around the path components212according to their related connectivity.

The user selects a connection line214by way of a line selection function231to define a bus line214, and then invokes this bus template function237. The line selection function231is analogous to the component selection function232, and enables the user to select a particular connection line214by way of the input devices30. The bus template function237modifies the netlist210to place components212related to the bus line214into two rows that run along the bus line214, with the bus line214located centrally with respect to all of the components212. Components212related to the bus line214are those components212that are directly connected to the bus line214. The bus template function237then modifies the netlist210to place the other components212that are not related to the bus line214around the components212that are related to the bus line214according to their connectivity relationships.

Examples of using the present invention display module240and automatic template functions233to237of the present invention shall be presented in the following. Please refer toFIGS. 9–11.FIG. 9shows a schematic330as presented on the display20by the display module240for an example netlist210, when the display module240is in the normal display mode242. The user wishes to arrange the topology of the schematic330so that a component212label “MUX”, as represented on the display by box331, is centrally located within the schematic330.FIG. 10shows a schematic340as presented on the display20by the display module240for the netlist210used inFIG. 9, when the display module240is in the topology display mode244. The user is free to edit the schematic340without the distraction or clutter of the connection lines214. The user, byway of the component selection function232, selects the component212labeled “MUX”, and which is thus rendered as a selected component212by the topology display mode244, as indicated by box341being drawn with a dotted line. As shown inFIG. 11, the user invokes the central template function233to automatically generate a schematic350having a new topology. The selected component212labeled “MUX” is placed in a central position of the schematic350, with the other components212arrayed around the selected component212. The degree of connectivity of the other components212with the selected component212is indicated by the relative distance of the other components212from the selected component212. Further, the relative connectivity of the other components212is indicated by their distances from each other. Hence, a component212labeled “ALU” is placed adjacent to a component212labeled “REG”, but farther from the selected component212labeled “MUX”.

The schematic editing program200includes an auto-router260that provides for the automatic routing of the connection lines214, and automatic positioning (so-called pin assignment) of the pins214L and214D on their respective components212. Whenever the user switches back to the normal display mode242, prior to calling the normal display mode242the schematic editing program200invokes the auto-router260if any changes have been made to the netlist210that would require re-routing of the connection lines214. Such changes include additions and deletions of components212, and changing of the positions212a, size212bor type212cof a component212. The auto-router260provides the routing data214cfor each respective connection line214, and performs the routing in an intelligent manner so as to avoid the connection lines214from crossing over components212, and to minimize the number of jags in the connection lines214. Pin assignment of the pins214L and214D is thus performed in a manner that will best ensure these qualities of the connection lines214. The auto-router260will be discussed in more detail later. As shown inFIG. 12, the user can switch back to the normal display mode242to see a complete schematic360of the netlist210as generated inFIG. 11. Prior to switching into the normal display mode242, the auto-router260re-routes the connection lines214, as represented by arrows364, to accommodate the changed positions212aof the components212. The complete operation, as required by a user, to centrally position the component212labeled “MUX” is thus quick and easy, involving little more than a few user interface operations to select a component212and to invoke the central template function233.

Please refer toFIGS. 13 and 14, with reference toFIGS. 11 and 5. The example netlist210ofFIG. 11is assumed, generating the corresponding schematic350while in the topology display mode244. Again, the user selects a component212labeled “MUX” by way of the component selection function232, and then invokes the fan-in template function234. A new schematic360is generated, as shown inFIG. 13. The fan-in template function234modifies the netlist210so that the selected component212is placed at a right-most position in the schematic360, and the remaining components212are positioned to the left of the select component212(labeled “MUX” as dotted box361). The relative connectivity of the components212is indicated by their placement. Components212that are strongly connected are more closely positioned with respect to each other, with the primary connectivity consideration being given to the selected component212. The component212labeled “ALU” is thus farthest to the left of the selected component212labeled “MUX”, and positioned closely to the component212labeled “REG”.FIG. 14illustrates the netlist210as generated inFIG. 13viewed under the normal display mode242to present a schematic370. Connection lines214, as represented by arrows372, have been auto-routed by the auto-router260just prior to switching into the normal display mode242.

Please refer toFIGS. 15 and 16, with reference toFIGS. 11 and 5. The example netlist210ofFIG. 11is assumed, with the corresponding topology display mode244schematic350. The user selects a component212labeled “REG” by way of the component selection function232, and then invokes the fan-out template function235. A new schematic380is generated, as shown inFIG. 15. The fan-out template function235modifies the netlist210so that the selected component212is placed at a left-most position in the schematic380, and the remaining components212are positioned to the left of the selected component212(labeled “REG” as dotted box381). The relative connectivity of the components212is indicated by their placement. Components212that are strongly connected are more closely positioned with respect to each other, with the primary connectivity consideration being given to the selected component212. The components212labeled “ALU” and “PLA” are thus positioned closely to the component212labeled “REG”. The positions of the remaining components212are determined by their interrelated connectivity characteristics. For example, component212labeled “INC” is properly positioned between components212labeled “PLA” and “STK”, as it is a load for “PLA” and a driver for “STK”.FIG. 16illustrates the netlist210, as generated inFIG. 15, viewed under the normal display mode242to present a schematic390. Connection lines214, as represented by arrows392, have been auto-routed by the auto-router260just prior to switching into the normal display mode242.

Please refer toFIG. 17andFIG. 18.FIG. 17illustrates the example schematic350ofFIG. 11displayed as a new schematic400under the topology display mode244with three selected components212after the path template function236has been invoked. The selected components212are indicated in the schematic400by dotted boxes401. The path template function236modifies the netlist210so that the selected components212are arrayed in a path structure, which is typically a single row of the selected components212. The other components212are then arrayed around this path structure according to their connectivity with the selected components212.FIG. 18illustrates the netlist210ofFIG. 17as viewed under the normal display mode, with the connection lines214being auto-routed by the auto-router260.

Please refer toFIG. 19.FIG. 19illustrates an example template210, viewed under the normal display mode242, with a single user-selected connection line214, presenting a schematic420on the display20. The line selection function231is used to select a connection line214, which is indicated in the schematic420by a dotted line, and is labeled “UPC”.FIG. 20illustrates the netlist210ofFIG. 19viewed under the topology display mode244after the bus template function237has been invoked. The bus template function237modifies the netlist210so that components212that are directly connected to the user-selected connection line214(i.e., are a load or driver component212of the user-selected connection line214, and may be termed connected components212) are arrayed in two rows, one row each on either side of the user-selected connection line214. The other components212are then arrayed around these connected components212according to their connectivity with the connected components212.FIG. 21shows a schematic440for the netlist210ofFIG. 20, as presented by the normal display mode242. Connection lines214, as represented by arrows441in the schematic440, have been auto-routed by the auto-router260.

The auto-router260of the present invention has the ability to group connection lines214based upon their class252to generate more readable schematics. Please refer toFIG. 22.FIG. 22is a schematic450for an example netlist210that may, for example, have been imported from a higher-level language from the load and save module220. As can be seen inFIG. 22, the connection lines214have routing data214cthat does not lend itself to a quick understanding of the connectivity characteristics of the various components212, as represented by boxes A, B, C and D. However, as discussed earlier in the context of the abstract display mode246, the connection line classifier252places each connection line214into a class252according to the driver/load characteristic of the connection line214. For example, connection lines214as represented by arrows451a,451band451cwould belong to the same class252, as they have the same driver/load characteristic, being driver lines from box B, and load lines to box A. The classes252are individually considered by the auto-router260as routing groups. Please refer toFIG. 23andFIG. 24.FIGS. 23 and 24illustrate an auto-routing grouping process utilized by the auto-router260. For each class252, the auto-router260runs a single routing line461from the driver component212to the load component212of that class252. These routing lines461are routed in an intelligent manner so as to not run over the boxes A, B, C, D or any other components212in the netlist210. Routing lines461may, however, cross each other. Such intelligent routers are known in the art of computer aided design/computer aided manufacturing (CAD/CAM), for example for electronic circuit board traces. However, the present invention intelligent router is free to select the locations of floating pins214L and214D, providing for greater flexibility during routing considerations. Each routing line is then split into a number of lines, each line corresponding to a single connection line214in the class252associated with the routing line461.FIG. 24illustrates a schematic470after this splitting process has been performed to generate connection lines214with routing data214cthat groups the connection lines214according to their driver/load characteristics, as shown by arrows471. For example, a routing line461acorresponds to a class252with three connection lines214, indicated by arrows451a,451band451cofFIG. 22. This routing line461ais split into three lines, whose routing characteristics are then respectively assigned as routing data214cfor the associated connection lines214. The connection lines214corresponding to the routing line461aare thus grouped together, as shown by arrows471a,471band471c. This process is repeated for all connection lines214in all classes252, resulting in a netlist210that generates the schematic470. The data flow of schematic470is clearly easier to understand than that for equivalent schematic450. Pins214L and214D are usually floating, which better enables the auto-router260to route connection lines214. As the edge size of a component212may be limited, and as a single edge may not have enough length to hold all of the pins214L,214D assigned to that edge, the auto-router260is free to break routing groups (i.e., classes252) into smaller sub-groups to accommodate the restriction of the number of pins2141,214D that may be assigned to an edge of a component212, and assign a routing line461to each of these sub-groups. This auto-grouping and auto-routing of connection lines214offers a significant savings of both time in effort to the user when routing connection214between components212.

The preferred program flow for the schematic editing program200is now discussed. Please refer toFIG. 25.FIG. 25is a flow chart for creating a schematic diagram according to the present invention. Typically, the user begins the diagram creation process by inputting a netlist210from other systems, databases, or files, or by creating the netlist210in the normal display mode242using various types of connection creation functions, such as “line creation”, “component creation”, “make connection”, sizing and positioning operations, etc. In step1201, initial netlist information210is obtained, which can be later modified in step1202as the user desires by adding or deleting connections lines214, components212, etc. The netlist210should be a valid netlist210before entering the topology display mode244. Hence, step1203processes and validates the netlist210. The netlist210is then stored in an internal database within the memory60for later reference. In step1204, the user enters into the topology display mode244to perform editing of the components212. Prior to returning back to editing in the normal display mode242of step1202, the pins214L and214D are assigned in step1205, and the routing data214cis automatically determined for each connection line214by the auto-router260in step1206. In step1207, if the user is finished editing the schematic diagram, the program200terminates at step1208. Otherwise, the entire editing process can be repeated.

Please refer toFIG. 26.FIG. 26shows details of the netlist processing step1203ofFIG. 25. Validation of the netlist210is performed in step1302, and the netlist210is saved to the database in step1303. The netlist210is then analyzed by the connection line classifier250to classify the connection lines214(step1304), to group the floating pins (step1305), and to prepare the abstract lines used in the abstract display mode246(step1306). The classes252are based on their related connected components212and connection directions (i.e., driver or load). If the connection lines214are not directed (i.e., do not explicitly have a driver or load relationship with their related components212), then only the connected elements212associated with the connection line214are considered.

Please refer toFIG. 27.FIG. 27shows details of step1204inFIG. 25that is concerned with editing while in the topology display mode244. While in the topology display mode244, all symbols for connection lines214and pins214L,214D are removed from the display20(step1402), so as to enable the user to concentrate simply on the topology of the components212. Step1403considers the case that the abstract display mode246is active. If so, then the abstract lines and associated abstract information are drawn in step1404. In steps1405and1406, the user is free to change the position212aand size212bof components212, respectively, thereby enabling the user to manually change the topology of the schematic as defined by the netlist210. Alternatively, step1407concerns itself with whether or not the user wishes to invoke one of the topology template functions233–237. If so, the appropriate template topology function233–237is performed in step1408. In step1409, the user may choose to exit the topology display mode244and return to editing in the normal display mode242, as indicated in step1410, or continue back to step1403to continue editing in the topology display mode244.

Please refer toFIG. 28.FIG. 28details the steps taken in step1408ofFIG. 27to generate template-based topologies. In step1502, if the user invokes the central template function233, then, in step1503, the selected component212and all components212directly connected to the selected component212are positioned first. The connected components212are placed around the selected component212. The selected and connected components212are then treated as a block of components212to prevent them from being broken up or separated by the subsequent placement of the remaining components212in step1511. These remaining components212are positioned in step1511so that their midpoints correspond to their related connectivity with the block of components212, and in such a manner that no overlapping of components212occurs. In step1504, if the fan-in template function234is invoked, then in step1505the selected component212is placed in a right-most position, and other fan-in components212are placed left of the selected component212in a tiered manner. Any remaining components are positioned in step1511. Similarly, the fan-out template function235is considered in steps1506and1507. The fan-out template function235places the selected component212at a left-most position, and other fan-out components212are placed to the right in tiered manner. Step1511takes care of the positioning of any remaining components212. Both fan-in234and fan-out235template functions apply a depth first search to determine the level (i.e., tier) information of the fan-in and fan-out components212. Steps1508and1509handle the path template function236, which places the selected components212that define a path into a single row. Step1511positions the remaining components212. In step1508, if the path template function236is not invoked, then, with all other options exhausted, it is assumed that the user is invoking the bus template function237. In step1510, the bus template function237places components212connected to the specified connection line214into two rows. Step1511positions the remaining components212.

Once editing under the topology display mode244is finished, the user can switch back to the normal display mode242. Before entering the normal display mode242, the schematic editing program200will invoke automatic pin assignment (step1205) and connection line214routing (step1206) by way of calling the auto-router260. Please refer toFIG. 29, which details the steps taken by the auto-router260. In step1602, the auto-router260divides the routing space (which is space not occupied by components212) into a set of channels, which are rectangle routing spaces that have pins214L,214D placed only on two opposite sides. Then, based on the classes252, the auto-router, in step1603, decides the routing line for each class252. This can be done by any Steiner tree based algorithm under the constraints of the edge capacity of the components212and the routing capacity of the channels. The result is a list of channels for each class252. After the routing lines are determined, in step1604, the sides of the components212for placement of the grouped floating pins214L,214D are determined. In step1605, the positions of the grouped floating pins214L,214D are adjusted for each channel to reduce jogs and intersections of lines. Finally, in step1606, the grouped connection lines214and floating pins214L,214D are ungrouped (i.e., the routing line is split), and the position of each floating pin214L,214D is determined.

In contrast to the prior art, the present invention, provides a topology display mode that eliminates connection lines from the display to better enable a user to view the topology of components. The present invention further provides an abstract display mode, which is combinable with the topology display mode, that provides a quick visual cue of the connectivity of the various components in schematic diagram. The abstract view can also provide summary information about the connectivity of one component with another. The present invention also provides a number of predefined topology template functions that arrange the topology of a schematic diagram according to the connectivity relationships between the various components. Finally, the present invention is capable of performing automatic pin assignment and routing of the connection lines to minimize the number of jags the connection lines have, and grouping the connection lines according to their component connectivity characteristics. The combined functionality as provided by the present invention enables a user to make quick and informed changes to the topology of a schematic.