Power electronic device assemblies having heat spreaders and electrically insulating layer

Power electronics device assemblies, circuit board assemblies, and power electronics assemblies are disclosed. In one embodiment, a power electronics device assembly includes an S-cell including a first metal layer comprising a first surface having a recess, a first graphite layer bonded to the first metal layer, a second metal layer bonded to the first graphite layer, a solder layer disposed on the second metal layer, and an electrically insulating layer bonded to the solder layer. The power electronics device assembly may further include a power electronics device disposed within the recess of the first surface of the first metal layer.

TECHNICAL FIELD

The present specification generally relates to power electronic assemblies and, more specifically, apparatus and methods for power electronic assemblies having low overall thermal resistance while achieving a compact package size.

BACKGROUND

Due to the increased use of electronics in vehicles, there is a need to make electronic systems more compact. One component of these electronic systems is a power electronic device used as a switch in an inverter. Power electronic devices have large cooling requirements due to the heat generated.

Additionally, there has been a trend for power electronic devices conventionally composed of silicon to now be composed of silicon-carbide. The use of silicon-carbide causes a larger heat flux due to it defining a smaller device footprint. For these reasons, and more, there is a need to improve the cooling of power electronic devices while maintaining a compact package size.

SUMMARY

In one embodiment, a power electronics device assembly is disclosed. The power electronics assembly includes an S-cell including a first metal layer comprising a first surface having a recess, a first graphite layer bonded to the first metal layer, a second metal layer bonded to the first graphite layer, a solder layer disposed on the second metal layer, and an electrically insulating layer bonded to the solder layer. The power electronics device assembly may further include a power electronics device disposed within the recess of the first surface of the first metal layer.

In another embodiment, a circuit board assembly is disclosed. The circuit board assembly includes a substrate that is electrically insulating, and a power electronics device assembly fully embedded in the substrate. The power electronics device assembly includes The power electronics assembly includes an S-cell including a first metal layer comprising a first surface having a recess, a first graphite layer bonded to the first metal layer, a second metal layer bonded to the first graphite layer, a solder layer disposed on the second metal layer, and an electrically insulating layer bonded to the solder layer. The power electronics device assembly may further include a power electronics device disposed within the recess of the first surface of the first metal layer.

In yet another embodiment, a power electronics assembly is disclosed. The power electronics assembly includes a cold plate and a circuit board assembly affixed to a first surface of the cold plate. The circuit board assembly includes a substrate that is electrically insulating and a power electronics device assembly fully embedded in the substrate. The power electronics assembly includes an S-cell including a first metal layer comprising a first surface having a recess, a first graphite layer bonded to the first metal layer, a second metal layer bonded to the first graphite layer, a solder layer disposed on the second metal layer, and an electrically insulating layer bonded to the solder layer. The power electronics device assembly may further include a power electronics device disposed within the recess of the first surface of the first metal layer.

DETAILED DESCRIPTION

Embodiments described herein are generally directed to power electronics assemblies having one or more power electronics device assemblies embedded directly into a circuit board, such as a printed circuit board. By fully embedding the one or more power electronics device assemblies in the circuit board, an electrical insulation layer between the circuit board and a cold plate of the power electronics assembly may be removed because the power electronics devices are insulated by the substrate material of the circuit board (e.g., FR-4). Removal of the electrical insulation layer reduces the thermal resistance between the power electronics devices and the cold plate, thereby improving thermal performance. Further, removal of the electrical insulation layer also reduces the overall package size of the power electronics device assembly.

The power electronics device assemblies of the present disclosure comprise a power electronics device affixed to a mounting substrate referred to herein as an S-cell. As described in more detail below, the S-cell includes an electrically insulating layer that electrically insulates the bottom electrodes of the power electronics device from other components of the power electronics device assembly. For example, the integral electrically insulating layer of the S-cell enables the removal of the electrical insulation layer between the printed circuit board and the cold plate because the electrical isolation is provided by the S-cell itself.

As described in more detail below, the S-cells of the present disclosure provide enhanced thermal properties due to graphite layers that promote heat flux flow toward a cold plate. The S-cells described herein comprise stacked metal, graphite, and one or more electrically insulating layers in a compact package.

The power electronic device assemblies, the circuit board assemblies, and the power electronics assemblies described herein may be used in electrified vehicles, such as and without being limited to, an electric vehicle, a hybrid electric vehicle, any electric motor, generators, industrial tools, household appliances, and the like. The power electronics assemblies described herein may be electrically coupled to an electric motor and/or a battery and be configured as an inverter circuit operable to convert direct current (DC) electrical power to alternating current (AC) electrical power.

As used herein, a “power electronics device” means any electrical component used to convert DC electrical power to AC electrical power and vice-versa. Embodiments may also be employed in AC-AC converter and DC-DC converter applications. Non-limiting examples of power electronics devices include power metal-oxide-semiconductor field effect transistors (MOSFET), insulated-gate bipolar transistors (IGBT), thyristors, and power transistors.

As used herein, the phrase “fully embedded” means that each surface of a component is surrounded by a substrate. For example, when a power electronics device assembly is fully embedded by a circuit board substrate, it means that the material of the circuit board substrate covers each surface of the circuit board substrate. A component is “partially embedded” when one or more surfaces of the component are exposed.

As used herein, an “S-cell” is a mounting substrate operable to be affixed to a power electronics device and includes one or more of a metal layer, a graphite layer and an electrically insulating layer.

Various embodiments of power electronics device assemblies, circuit board assemblies, and power electronics assemblies are described in detail below. Whenever possible, the same reference numerals will be used throughout the drawings to refer to the same or like parts.

Referring now toFIGS.1and2, an example power electronics assembly100is illustrated in an assembled view and an exploded view, respectively. The power electronics assembly100illustrated byFIGS.1and2include a cold plate102, a bond layer104(or in some embodiments a thermal grease layer), and a circuit board assembly106. The cold plate102may be any device capable of removing heat flux from power electronics devices140(seeFIG.3) embedded within a substrate material of the circuit board assembly106. Non-limiting examples for the cold plate include heat sinks, single-phase liquid cooling, two-phase liquid cooling, a vapor chambers.FIGS.1and2illustrate the cold plate102as being configured as a single-phase liquid cooling device. The cold plate102includes a fluid inlet132and a fluid outlet134fluidly coupled to a fluid chamber115within the cold plate102. Referring briefly toFIG.3, cooling fluid135from a reservoir (not shown) flows into the fluid chamber115through the fluid inlet132and out of the fluid chamber115through the fluid outlet134, where it is returned to the reservoir, such as after flowing through a heat exchanger (not shown) to remove heat from the cooling fluid. Although not shown, an array of fins may be provided in the fluid chamber115to provide additional surface area for heat transfer to the cooling fluid135.

The circuit board assembly106is affixed to a first surface103of the cold plate102.FIGS.1and2illustrate the circuit board assembly106as being affixed to the first surface103of the cold plate102by way of fasteners101(e.g., bolts and nuts) disposed through through-holes105of the cold plate102, through-holes107of the bond layer104, and through-holes of the circuit board assembly106. When fasteners101are used, the bond layer104may be a thermal grease layer to lower the thermal resistance between the circuit board assembly106and cold plate102. It is noted that the bond layer104configured as thermal grease will not have dedicated through-holes; through-holes107are shown for illustrative purposes.

In other embodiments, the circuit board assembly106is affixed to the first surface103of the cold plate102by a bond layer104configured as a solder layer. For example, the bottom surface of the circuit board assembly106may include a metal layer that enables the circuit board assembly106to be affixed to the first surface103of the cold plate102by a solder layer. It should be understood that other bonding methods may be utilized.

Referring now toFIG.3, a cross-sectional view of the example power electronics assembly100is illustrated. The circuit board assembly106comprises a substrate111made of an electrically insulating material. The electrically insulating material may be a material used in the fabrication of printed circuit boards, such as, without limitation, FR-4. The circuit board assembly106further comprises embedded electrically conductive layers110, a plurality of vias112(both electrically conducting vias and thermal vias), and a plurality of power electronics device assemblies120.

As a non-limiting example the circuit board assembly106may include six power electronics device assemblies120for an inverter circuit for an electric vehicle, as will be described in more detail in reference toFIG.6. However, it should be understood that any number of power electronics device assemblies may be utilized depending on the application.

Each power electronics device assembly120includes an S-cell121and a power electronics device140affixed to the S-cell121. As stated above, the S-cell121is a substrate to which the power electronics device140is bonded. It provides electrically conductive surface area to make connections to electrodes on the bottom surface of the power electronics device140. The S-cell121further provides heat spreading functionality as well as electrical isolation. By providing electrical isolation in the S-cell121, a separate electrical isolation layer between the circuit board assembly106and the cold plate102is not needed, as will be described in additional detail herein.

Referring still toFIG.3, electrical connection to the power electronics device140and the first metal layer122may be made by the plurality of vias112. These vias may provide drive signals to the power electronics devices140, as well as provide a current path for switching current. It is noted that, in some embodiments, some of the vias112may be configured as thermal vias that do not conduct drive signals or switching current. For example, the vias112shown contacting the first metal layer122of the S-cells121may be thermally conductive-only vias that are provided to conduct heat flux toward a bottom layer that is close to the cold plate102. Additionally, thermal vias112may be electrically coupled to edges of the second metal layer124to move heat flux from the second metal layer124down toward the cold plate102. In this way, heat flux is optimally directed away from the power electronics devices140and toward the cold plate102. As shown inFIG.3, cold cooling fluid135enters the cold plate102through the fluid inlet132, flows through the fluid chamber115, and exits as warmed cooling fluid out of the fluid outlet134.

Turning now toFIG.4, an example S-cell121in a partially exploded cross-sectional view is depicted. The S-cell121includes a plurality of stacked layers. Particularly, the S-cell121illustrated byFIG.4may include a first metal layer122, a second metal layer124, a first graphite layer126, a solder layer128, and an electrically insulating layer130. In these embodiments, the first metal layer122may include a first surface122aand a second surface122bopposite the first surface122a. The first surface122amay include a recess123having dimensions to receive a power electronics device140. As described in more detail below, the first metal layer122provides an electrically conductive surface to which electrically conductive vias may contact to make an electrical connection to electrodes on a bottom surface of the power electronics device. Furthermore, it should be understood that the second metal layer124may similarly include a first surface124aand a second surface124bopposite the first surface124a, as will be described in more detail herein.

Referring still toFIG.4, the first and second metal layers122,124may be made of any suitable metal or alloy. Copper and aluminum may be used as the first and second metal layers122,124as non-limiting examples. Furthermore, as depicted inFIG.4, the first metal layer122and the second metal layer124of the S-cell may be bonded to the first graphite layer126by a high-temperature active metal brazing method that forms brazing layers125(i.e., active metal brazing layers). However, it should be understood that the various layers may be bonded using other known and yet-to-be-developed techniques.

For example, as depicted inFIG.4, the second surface122bof the first metal layer122may be bonded to the first graphite layer126via active metal brazing, such as silver-copper (“AgCu”) brazing to form a first brazing layer125a. Similarly, the first surface124aof the second metal layer124may be bonded to the first graphite layer126via metal brazing to form a second brazing layer125b.

In these embodiments, the first graphite layer126may be provided to encourage heat spreading both across the S-cell121as well as toward the cold plate102. The crystalline structure of graphite provides it with high thermal conductivity making it useful to conduct heat flux toward the cold plate102. However, graphite does not have an isothermal profile. Rather, graphite has an anisothermal profile with high conductivity along two axes and low thermal conductivity in a third axis. To account for the anisothermal profile of graphite, the S-cell121is designed to be rectangular in shape such that its length dimension is larger than its width dimension. In these embodiments, the first graphite layer126may have high thermal conductivity along the x-axis and the z-axis. Thus, the S-cell121is designed such that its dimension along the x-axis is larger than its dimension along the y-axis. Heat flux will travel along the x- and z-axis. In these embodiments, thermal vias may be provided at the edges of the S-cell along the x-axis to receive heat flux and move it toward the cold plate102. Heat flux will also travel along the z-axis toward the cold plate102.

Referring still toFIG.4, the S-cell121may further include the solder layer128. In these embodiments, the solder layer128may be disposed on the second surface124bof the second metal layer124, and may be used to interface the S-cell121with the electrically insulating layer130. The electrically insulating layer130may be made of any material capable of providing electrical insulation between the second metal layer124and the plurality of vias112of circuit board assembly106(FIG.3). As a non-limiting example, the electrically insulating layer130may be made of a ceramic material, such as silicon nitride or aluminum nitride. The material chosen for the electrically insulating layer130should have a high thermal conductivity so that heat flux may flow through the electrically insulating layer130toward the cold plate102.

It should be noted that disposal of the solder layer128on the second metal layer124requires a mild temperature environment (e.g., approximately 300 degrees Celsius) compared to the high-temperature AgCu brazing process used to bond the first and second metal layers122,124to the first graphite layer126. As a result, thermal stress occurring at the solder layer128is minimized, which in turn allows for the overall thickness of the S-cell to be minimized without sacrificing cooling performance (e.g., heat spreading).

Additionally, it should be understood that the mild temperature environment of the solder layer128may allow the illustrated S-cell to be asymmetrical in nature (e.g., it is noted that the illustrated S-cell includes a pair of metal layers, a graphite layer, and an electrically insulating layer). For example, although many S-cells may require symmetrical profiles to balance forces acting on the S-cell during the high-temperature bonding process, the relatively lower thermal stress that occurs at the solder layer may allow for the forces acting on the S-cell to be balanced without the need for a symmetrical profile. By allowing the profile of the S-cell to be asymmetrical in nature, additional layers (which would be required by a symmetrical profile and thereby increase the overall thickness of the S-cell) may be eliminated from the S-cell.

Furthermore, by positioning the electrically insulating layer130between the second metal layer124and the plurality of vias112disposed within the circuit board assembly106, the power electronic devices disposed within the S-cell may be electrically insulated from the bottom layers of the circuit board assembly106. Accordingly, the structure of the S-cell121effectively alleviates the need for a separate electrical insulation layer disposed between the cold plate102and the circuit board assembly106.

Although the structure of the S-cell described with reference toFIGS.3and4may alleviate the need for a separate electrically insulating layer between the cold plate102and the circuit board assembly106, in some embodiments, the electrically insulating layer130may be positioned between the cold plate102and the circuit board assembly106rather than within the S-cell121, as is depicted inFIG.5. In these embodiments, the S-cell121may include the first metal layer122, second metal layer124, and first graphite layer126, as has been described with reference toFIGS.3and4. However, the electrically insulating layer130may be deposited between the cold plate102and the circuit board assembly106, rather between the second metal layer124and the plurality of vias112.

By placing the electrically insulating layer130between the circuit board assembly106and the cold plate102, the need for the solder layer128disposed on the second metal layer124may be alleviated. However, it should be noted that the thermal performance of the power electronics assembly100may be highly dependent on the thermal conductivity of the electrical insulation material used to form the substrate111. For example, utilization of common insulation material, such as FR-4 or other similar material, in the power electronics assembly100depicted inFIG.5may negatively impact the cooling performance of the power electronics assembly100, such that the maximum temperature achieved by the power electronics assembly100exceeds a predetermined threshold. However, high thermally conductive dielectric material, which is commercially available at higher costs, may be utilized in place of common insulation material in order to achieve similar performance to the power electronics assembly100depicted inFIGS.3and4.

It should now be understood that embodiments of the present disclosure are directed to circuit board assemblies, power electronics device assemblies, and power electronics assemblies comprising an S-cell that is fully embedded within a circuit board substrate. The S-cells of the embodiments described herein include a first graphite layer to improve thermal performance, as well as first and second metal layers coupled to the first graphite layer. The S-cells further include a solder layer disposed on the second metal layer, which is coupled to an electrically insulating layer. It should be understood that the presence of the solder layer may allow for the disclosed S-cells to be asymmetrical in nature, such that additional layers which would be required by symmetrical S-cells are eliminated. Accordingly the elimination of additional layers may allow for the S-cells disclosed herein to be thinner in nature without sacrificing heat spreading performance.