Capacitor and method for manufacturing capacitor

A capacitor that includes a substrate having a principal surface; a dielectric film on the principal surface of the substrate; and an electrode layer on the dielectric film. The substrate has a recess structure portion with at least one recess portion in a second region outside a first region where the electrode layer overlaps the dielectric layer when viewed in a plan view from a normal direction of the principal surface of the substrate, and the dielectric film is on the recess structure portion.

FIELD OF THE INVENTION

The present invention relates to a capacitor and a method for manufacturing a capacitor.

BACKGROUND OF THE INVENTION

As a typical capacitor element used in a semiconductor integrated circuit, for example, an MIM (Metal Insulator Metal) capacitor is well known. The MIM capacitor is a capacitor having a structure in which a dielectric film is sandwiched between a lower electrode and an upper electrode. In order to apply the capacitor element to a high-voltage power device or to mount the capacitor element on a high-density electronic component, the capacitor element is required to have a high withstand voltage and a large capacitance. As a method of realizing such an MIM capacitor having a high withstand voltage, for example, a thickness of a dielectric film has been studied.

However, in the case where the MIM capacitor is provided on the substrate by PVD (Physical Vapor Deposition) or CVD (Chemical Vapor Deposition), as the film thickness of the dielectric film increases, the thermal stress on the dielectric film increases due to the difference in thermal expansion coefficients between the substrate and the dielectric film, and the dielectric film tends to crack.

A crack generated in the dielectric film causes a decrease in the capacitance value due to a leak current and an operation failure due to a short circuit. For example, Patent Document 1 discloses a semiconductor device having a capacitor including a lower electrode disposed on a semiconductor substrate, a second protective film, a dielectric film having a defect extending in the film thickness direction from an upper surface facing the second protective film, a third protective film having at least a defect buried film made of an insulator having the defect buried therein, a first protective film covering the dielectric film and the third protective film, and an upper electrode covering the first protective film. In this semiconductor device, by burying defects (cracks) in the dielectric film of the capacitor, generation of minority defects caused by leakage current is avoided.

SUMMARY OF THE INVENTION

However, the defects buried in the semiconductor device described in Patent Document 1 are cracks caused by volume shrinkage of the dielectric film during crystal growth. Since the protective film on the semiconductor substrate is thickened by providing the defect buried film, it is difficult to prevent the occurrence of cracks caused by thermal stress due to the thermal expansion coefficient between the semiconductor substrate and the protective film.

The present invention has been made in view of such circumstances, and an object of the present invention is to provide a capacitor capable of improving reliability.

A capacitor according to one aspect of the present invention includes a substrate having a principal surface and a recess structure portion with at least one recess portion; a dielectric film on the recess structure portion and the principal surface of the substrate; and an electrode layer on the dielectric film, the electrode layer being located such that the at least one recess portion is in a second region outside a first region where the electrode layer overlaps the dielectric layer when viewed in a plan view from a normal direction of the principal surface of the substrate.

A method for manufacturing a capacitor according to another aspect of the present invention includes: preparing an aggregate substrate having a principal surface and having a plurality of first regions and a second region between the plurality of first regions when viewed in a plan view from a normal direction of the principal surface; forming a recess structure portion with at least one recess portion in the second region; providing a dielectric film on the aggregate substrate in the plurality of first regions and the recess structure portion; providing an electrode layer on the dielectric film in the plurality of first regions; and singulating the plurality of first regions by cutting the aggregate substrate in the second region.

According to the present invention, it is possible to provide a capacitor with improved reliability.

DETAILED DESCRIPTION OF THE INVENTION

Hereinafter, embodiments of the present invention will be described with reference to the drawings. Note that, in the second and subsequent embodiments, components that are identical or similar to those of the first embodiment are denoted by the identical or similar reference numerals as those of the first embodiment, and detailed description thereof will be omitted as appropriate. Further, with respect to the effects obtained in the second and subsequent embodiments, description of the same effects as those in the first embodiment will be appropriately omitted. The drawings of the embodiments are illustrative, the dimensions and shapes of the respective portions are schematic, and the technical scope of the present invention should not be limited to the embodiments.

First Embodiment

First, the configuration of a capacitor100according to the first embodiment of the present invention will be described with reference toFIGS. 1 to 3.FIG. 1is a plan view schematically showing the configuration of a capacitor according to the first embodiment.FIG. 2is a sectional view schematically showing the configuration of a cross section of the capacitor shown inFIG. 1along line II-II.FIG. 3is an enlarged sectional view of the capacitor section shown inFIG. 2.

A first direction X, a second direction Y, and a third direction Z shown in the drawings are directions orthogonal to one another for example, but they are not limited to these directions as long as they intersect one another, and they may intersect one another at angles other than 90°. The first direction X, the second direction Y, and the third direction Z are not limited to the direction (positive direction) of the arrow shown inFIG. 1, but include the direction (negative direction) opposite to the arrow.

The capacitor100includes a substrate110, a first electrode layer120, a dielectric film130, a second electrode layer140, and an insulating film150. The capacitor100has a first portion101and a second portion102positioned outside the first portion101when viewed in a plan view from the normal direction of a first principal surface110A of the substrate110. The first portion101is a region in which the first electrode layer120and the second electrode layer140overlap each other across the dielectric film130, and corresponds to a capacitance forming portion for forming a capacitance. The second portion102corresponds to a stress concentration portion for concentrating thermal stress applied to the dielectric film130. The second portion102is provided in a frame shape so as to surround the first portion101, for example.

The substrate110has, for example, a single-layer structure composed of a low-resistance silicon substrate having conductivity. The substrate110may be an insulating substrate such as quartz crystal. The substrate110may have a multilayer structure, for example, it may be a laminate composed of a conductive substrate and an insulating film. The first principal surface110A is provided on the positive direction side in the third direction Z, and the second principal surface110B is provided on the negative direction side in the third direction Z. The first principal surface110A is a crystal plane whose crystal orientation is expressed as <100>, for example. The first principal surface110A and the second principal surface110B are surfaces parallel to a plane specified by the first direction X and the second direction Y (hereinafter referred to as an “XY plane”). In the substrate110, for example, a trench structure portion111and a recess structure portion112are formed on the first principal surface110A side.

The trench structure portion111is a concavo-convex structure formed in the first portion101, and has a plurality of recess portions111B and a plurality of protrusion portions111A. The recess portion111B is recessed toward the negative direction side in the third direction Z from the first principal surface110A. The recess portion111B is formed in a groove shape having a bottom surface of a predetermined width. The recess portions111B extend in the second direction Y and are aligned in the first direction X. The protrusion portion111A is positioned between the recess portions111B and protrudes from the recess portions111B toward the positive direction side in the third direction Z. The protrusion portion111A has a top surface of a predetermined width. The top surface of the protrusion portion111A is included in the first principal surface110A, for example. The depth of the recess portion111B of the trench structure portion111in the third direction Z (position of the bottom surface of the recess portion111B with respect to the top surface of the protrusion portion111A) is, for example, 10 μm to 50 μm. The width of the recess portion111B of the trench structure portion111in the first direction X is, for example, about 5 μm, and the width of the protrusion portion111A in the first direction X is, for example, about 5 μm.

The corner of the protrusion portion111A of the trench structure portion111has an angle θ11on the substrate110side. The corner of the recess portion111B of the trench structure portion111has an angle θ12on a space side surrounded by the trench structure portion111, i.e., on the opposite side to the substrate110. The angle θ11is an angle formed by the top surface and the side surface of the protrusion portion111A of the trench structure portion111, and the angle θ12is an angle formed by the bottom surface and the side surface of the recess portion111B of the trench structure portion111. For example, the angles θ11and θ12are each approximately 90 degrees. The bottom surface of the trench structure portion111may have a curved shape. In this case, the angle θ12may be larger than 90°. When the protrusion portion111A of the trench structure portion111has a plurality of surfaces and has a plurality of angles formed by the surfaces, the angle θ11indicates the largest angle among the angles formed on the protrusion portion111A. The angle θ12similarly indicates the largest angle formed in the recess portion111B. In this case, the angle ell may be greater than 90°, and the angle θ12may also be greater than 90°.

As an example, the trench structure portion111constituted with the 5 recess portions111B is shown, but the trench structure portion111only needs to have at least one recess portion111B, and the number of recess portions111B and protrusion portions111A is not particularly limited. Further, when viewed in a plan view from the normal direction of the first principal surface110A, the shape of the recess portion111B is not limited to a groove shape, but may be formed in an island shape, for example, a circular (ellipse) non-through hole arranged in a matrix shape. The trench structure portion111may be formed on the second principal surface110B side. That is, the trench structure portion111and the recess structure portion112may be formed on different principal surfaces of the substrate110. The trench structure portion111may be formed on both the first principal surface110A side and the second principal surface110B side.

As shown inFIG. 2, when the first principal surface110A of the substrate110is viewed in a plan view, the trench structure portion111is provided inside the second electrode layer140and overlaps a part of the second electrode layer140. According to this, since the entire trench structure portion111contributes to the formation of the capacitance, the capacitance of the capacitor100can be increased. However, the trench structure portion111may be provided from the inside to the outside of the second electrode layer140. This can increase the creepage distance between the end portion of the first electrode layer120and the end portion of the second electrode layer140. Accordingly, generation of creeping discharge in the capacitor100can be suppressed. The creepage distance is a distance along the surface of the insulating member such as the substrate110and the dielectric film130, which exist between the first electrode layer120and the second electrode layer130.

The shape of the first portion101is not limited as long as a capacitance can be formed, and the trench structure portion111may be omitted. That is, for example, the dielectric film130and the second electrode layer140may be provided on the flat first principal surface110A of the first portion101so as to be parallel to the XY plane. The bottom surface of the recess portion111B or the top surface of the protrusion portion111A may have a polygonal shape composed of a plurality of surfaces, a shape bent toward the third direction Z, or a combination thereof.

The recess structure portion112is a concave-convex structure formed on the second portion102, and has a recess portion112B and a protrusion portion112A. The recess portion112B is recessed toward the negative direction side in the third direction Z from the first principal surface110A. The recess portion112B has a V-shaped cross section where two side surfaces adjacent to each other are connected at the bottom portion thereof, and is formed in a groove shape. The protrusion portion112A has an inverted V-shaped cross section where two side surfaces adjacent to each other are connected at the top portion thereof. The protrusion portion112A is positioned between the recess portions112B and protrudes from the recess portions112B toward the positive direction in the third direction Z. The top portion of the protrusion portion112A is constituted with the first principal surface110A, for example. The recess structure portion112is formed in a region outside the first portion101, i.e., a region overlapping the second electrode layer140of the substrate110when viewed in a plan view from the normal direction of the first principal surface110A. The recess portion112B and the protrusion portion112A are formed in a frame shape along the outer periphery of the first portion101so as to surround the trench structure portion111.

The depth of the recess portion112B of the recess structure portion112(position of the bottom portion of the recess portion112B relative to the top portion of the protrusion portion112A) is smaller than the depth of the recess portion111B of the trench structure portion111. This can increase the surface area of the trench structure portion111and can increase the capacitance formed in the first portion101.

The corner of the protrusion portion112A of the recess structure portion112has an angle θ21on the substrate110side. The corner of the recess portion112B of the recess structure portion112has an angle θ22on the space side surrounded by the recess structure portion112, i.e., on the opposite side to the substrate110. The angle θ21is an angle formed by two adjacent side surfaces of the protrusion portion112A of the recess structure portion112, and the angle θ22is an angle formed by two adjacent side surfaces of the recess portion112B of the recess structure portion112. However, when the recess structure portion112has a top surface at the top portion of the protrusion portion112A, the angle θ21is an angle formed by the top surface and the side surface. When the recess structure portion112has a bottom surface at the bottom portion of the recess portion112B, the angle θ22is an angle formed by the bottom surface and the side surface. When the protrusion portion112A of the recess structure portion112has a plurality of surfaces and has a plurality of angles formed by the surfaces, the angle θ21indicates the largest angle among the angles formed on the protrusion portion112A. The angle θ22similarly indicates the largest angle formed in the recess portion112A.

The angle θ21is smaller than the angle θ11, and the angle θ22is smaller than the angle θ12. The angles θ21and θ22are, for example, acute angles. The size of the angle θ21is not particularly limited as long as it is smaller than the angle θ11, and it may be an obtuse angle or a right angle. The same applies to the size of the angle θ22. In other words, the first principal surface110A side of the substrate110is flatter in the first portion101than in the second portion102. If the first principal surface110A side of the substrate110is flat in the first portion101, i.e., if the trench structure portion111is omitted, the sizes of the angles θ21and θ22of the recess structure portion112can be freely designed. It is preferable that either the angle θ21or the angle θ22is smaller than the smaller one of the angle θ11and the angle θ12. In other words, it is preferable that the minimum angle of the plurality of corners formed in the recess structure portion112is smaller than the minimum angle of the plurality of angles formed in the trench structure portion111. At this time, the minimum angle of the recess structure portion112is the minimum angle of the angle formed on the substrate110side by the corner of the protrusion portion112A and the angle formed on the opposite side to the substrate110by the corner of the recess portion112B in the recess structure portion112. The minimum angle of the trench structure portion111is the minimum angle of the angle formed on the substrate110side by the corner of the protrusion portion111A and the angle formed on the opposite side to the substrate110by the corner of the recess portion111B in the trench structure portion111. Further, the recess structure portion112may have a structure in which stress is more concentrated than in a portion where stress is the most concentrated in the trench structure portion111, and the relationship among the angle θ11, the angle θ12, the angle θ21, and the angle θ22is not limited to this.

As an example, the recess structure portion112constituted with the two recess portions112B and the one protrusion portion112A is mentioned, but the recess structure portion112only needs to have at least one recess portion112B, and the number of the recess portions112B and the protrusion portions112A is not particularly limited. The sectional shapes of the recess portion112B and the protrusion portion112A are not limited to a V-shape and an inverted V-shape, and may have a top surface and a bottom surface each having a predetermined width. The bottom portion of the recess portion112B or the top portion of the protrusion portion111A may have a polygonal shape composed of a plurality of surfaces, a shape bent toward the third direction Z, or a combination thereof. The recess structure portion112is not limited to a frame shape surrounding the first portion101when viewed in a plan view from the normal direction of the first principal surface110A. The recess structure portion112may be formed discontinuously, e.g., the recess structure portion112may be formed so as to be adjacent to the first portion101only in one of the first direction X and the second direction Y, and not to be adjacent to the first portion101in the other direction.

As shown inFIG. 2, the recess structure portion112is provided outside the second electrode layer130when the first principal surface110A of the substrate110is viewed in a plan view. This can increase the creepage distance between the end portion of the first electrode layer120and the end portion of the second electrode layer130. Accordingly, generation of creeping discharge in the capacitor100can be suppressed.

The first electrode layer120covers the second principal surface110B of the substrate110. The first electrode layer120may be provided at least on the second principal surface110B in the first portion101. The first electrode layer120is formed of, for example, a metal material such as Mo (molybdenum), Al (aluminum), Au (gold), Ag (silver), Cu (copper), W (tungsten), Pt (platinum), Ti (titanium), Ni (nickel), Cr (chrome), or the like. The first electrode layer120is not limited to a metal material as long as it is a conductive material, and it may be formed of a conductive resin or the like. The first electrode layer120is not necessarily formed on the entire surface of the second principal surface110B of the substrate110, but it may be formed at least on the first portion101. When the substrate110is a low-resistance silicon substrate, the first electrode layer120and the substrate110are electrically connected to each other and function as the lower electrode of the capacitor100. If the substrate110is an insulating substrate, the substrate110functions as a part of the dielectric layer of the capacitor100, and the first electrode layer120functions as the lower electrode.

The second dielectric layer132is provided on the first dielectric layer131. The second dielectric layer132is provided also inside a space formed on the first principal surface110A side of the substrate110by the trench structure portion111and the recess structure portion112. The second dielectric layer132is formed of, for instance, a silicon nitride-based dielectric material such as silicon oxynitride (SiON) or silicon nitride (Si3N4). The film thickness of the second dielectric layer132is about 1 μm, for example. Since the second dielectric layer132is formed of a dielectric having a dielectric constant higher than that of the first dielectric layer131, the capacitance density of the capacitor100can be improved. The second dielectric layer132may have a laminated structure of a plurality of dielectrics in addition to a single layer. This makes it possible to design more arbitrary capacitance and withstand voltage. The second dielectric layer132is not limited to a silicon nitride-based dielectric material, and it may be formed of a dielectric material made of an oxide such as Al2O3, HfO2, Ta2O5, or ZrO2. The first dielectric layer131is not limited to a silicon oxide-based dielectric material, and it may be formed of another oxide or silicon nitride-based dielectric material.

In the dielectric film130, a crack CR is formed in the second portion102, i.e., in a portion provided on the recess structure portion112. The crack CR is formed so as to integrally penetrate the first dielectric layer131and the second dielectric layer132from the top portion of the protrusion portion112A or the bottom portion of the recess portion112B, for example. However, the crack CR may be formed only in the first dielectric layer131or only in the second dielectric layer132.

The film thickness of the dielectric film130is smaller than the depth and the width of the recess portion111B of the trench structure portion111. According to this, it is possible to avoid a situation in which the recess portion111B of the trench structure portion111is filled with the dielectric film130. That is, a decrease in the capacitance density of the capacitor100can be suppressed. The dielectric film130may have a single-layer structure as long as it can be formed with a sufficient film thickness (e.g., 1 μm or more).

The second electrode layer140is provided on the dielectric film130in the first portion101, i.e., the portion overlapping the trench structure portion111. The second electrode layer140is opposed to the first electrode layer120across the dielectric film130. The second electrode layer140functions as an upper electrode of the capacitor100and forms a capacitance with the lower electrode (the substrate110and the first electrode layer120).

The second electrode layer140has a first conductive layer141and a second conductive layer142. The first conductive layer141is formed on the dielectric film130, and is also provided inside a space formed on the first principal surface110A side of the substrate110by the trench structure portion111. The first conductive layer141is, for example, a p-type or n-type polycrystalline silicon (Poly-Si) film. The second conductive layer142is provided on the first conductive layer141. The second conductive layer142is formed of, for example, a metal material mentioned in the description of the first electrode layer120. The second conductive layer142is not limited to a metal material, and it may be formed of a conductive material such as a conductive resin.

The insulating film150covers the end portion of the second electrode layer140when viewed in a plan view from the normal direction of the first principal surface110A of the substrate110. The insulating film150is, for example, a polyimide (PI) film, but may be another organic insulating film or an inorganic insulating film such as silicon oxide or silicon nitride. The insulating film150can suppress the generation of a leakage current due to creeping discharge. That is, the capacitor100can have a high withstand voltage. If the dielectric constant of the insulating film150is larger than that of the dielectric film130, the leakage electric field from the second electrode layer140can be suppressed. On the other hand, if the dielectric constant of the insulating film150is smaller than that of the dielectric film130, the formation of the parasitic capacitance by the second electrode layer140can be suppressed.

Second Embodiment

As the second embodiment, a method for manufacturing a capacitor200will be described with reference toFIGS. 4 to 11. The second embodiment corresponds to the method for manufacturing the capacitor100according to the first embodiment. In the second embodiment described below, description of matters common to the first embodiment will be omitted and only differences will be described. In particular, no reference will be made one by one to the same actions and effects of the same configuration. The same reference numerals as those in the first embodiment denote the same structures and functions as those in the first embodiment.

FIG. 4is a flowchart showing a substrate processing step in the capacitor manufacturing method according to the second embodiment.FIG. 5is a flowchart showing a capacitor forming step in the capacitor manufacturing method according to the second embodiment.FIG. 6is a view showing a step of patterning the first photoresist layer shown inFIG. 4.FIG. 7is a view showing a step of providing the protruding structure portion shown inFIG. 4.FIG. 8shows a step of providing the trench structure portion shown inFIG. 4.FIG. 9is a view showing a step of forming the polycrystalline silicon (Poly-Si) film shown inFIG. 5.FIG. 10is a view showing a step of performing dry etching of the Poly-Si film shown inFIG. 5.FIG. 11is a view showing a step of singulating the capacitor shown inFIG. 5. Note that, for convenience of explanation, the substrate processing step and the capacitor forming step are presented as separate steps of the method for manufacturing the capacitor200. The substrate processing step is a step of forming a trench structure portion and a recess structure portion on an aggregate substrate. The capacitor forming step is a step of providing a dielectric film, a second electrode layer, and the like on an aggregate substrate, and providing a capacitance forming portion of a MIM (Metal-Insulator-Metal) capacitor.

First, the substrate processing step will be described with reference toFIG. 4. In the substrate processing step, first, a low-resistance silicon substrate is prepared (S11). As shown inFIG. 6, a low-resistance silicon substrate210corresponds to an aggregate substrate. The low-resistance silicon substrate210has a plurality of first regions291and a second region292between the plurality of first regions291when viewed in a plan view from the normal direction of a principal surface210A. The first region291is arranged in a matrix shape in the first direction X and the second direction Y, and the second region292is positioned in a lattice shape.

Next, a first photoresist layer is pattern-formed (S12). A first photoresist layer271corresponds to a mask provided on the first principal surface210A of the low-resistance silicon substrate210in order to form a recess structure portion212. As shown inFIG. 6, the first photoresist layer271is patterned so as to cover the first region291. The first photoresist layer271is patterned in two parallel strips in the second region292. That is, between the two adjacent first regions291in the first direction X, there are two regions covered with the first photoresist layer271, and there are three regions opposed to an opening of the first photoresist layer271. The number of the strip-shaped first photoresist layers271parallel to each other in the second region292is not limited, and at least one may be patterned.

Next, the recess structure portion is formed by wet etching (S13). As shown inFIG. 6, the low-resistance silicon substrate210is cut by wet etching using the first photoresist layer271as a mask and potassium hydroxide solution as an etching solution to form a recess structure portion212. When the crystal is cut by chemical etching such as wet etching, anisotropy of the etching rate is caused by the crystal orientation. The wet etching proceeds such that a crystal plane is formed by the anisotropy of the etching rate. Since the crystal orientation of the first principal surface210A of the low-resistance silicon substrate210is expressed as <100>, etching proceeds so that a surface inclined with respect to the first principal surface210A is formed, and the recess structure portion212having a shape in which acute valleys are alternately continuous are formed.

Next, the first photoresist layer is removed and a second photoresist layer is pattern-formed (S14). After the formation of the recess structure portion212, the first photoresist layer271is removed from the first principal surface210A of the low-resistance silicon substrate210by asking, for example. Thereafter, a second photoresist layer272is provided on the first principal surface210A side of the low-resistance silicon substrate210, and is patterned. The second photoresist layer272corresponds to a mask for providing the trench structure portion211.

Then, the trench structure portion is formed by reactive ion etching (RIE) (S15). As shown inFIG. 8, the low-resistance silicon substrate210is cut by deep dry etching by RIE using the second photoresist layer272as a mask. In the RIE, the anisotropy of the etching rate is smaller than that in the wet etching, and etching with a high aspect ratio can proceed from the opening of the second photoresist layer272in a direction substantially orthogonal to the first principal surface210A. Thus, the recess portion of the trench structure portion211can be formed to be deeper than the recess portion of the recess structure portion212.

Next, the second photoresist layer is removed (S16). The second photoresist layer272is removed by asking, for example. The low-resistance silicon substrate210is rinsed with a rinsing liquid made of, for example, ultrapure water to clean the first principal surface210A, the trench structure portion211, and the recess structure portion212. Thus, the substrate processing step is completed.

Next, the capacitor forming step will be described with reference toFIG. 5. In the capacitor forming step, first, an SiO2film is formed by heat treatment (S21). For example, the surface of the low-resistance silicon substrate210is thermally oxidized by heat treatment at 800° C. to 1100° C. to form an SiO2film231. The SiO2film231corresponds to the first dielectric layer131of the capacitor100according to the first embodiment.

Next, an SiN film is formed by low-pressure CVD (LP-CVD) (S22). As shown inFIG. 9, an SiN film232is provided on the SiO2film231. The SiN film232is grown by thermally reacting a reaction gas composed of SiH2Cl2(dichlorosilane) and NH3(ammonia) on the SiO2film231at a temperature of the low-resistance silicon substrate210of 650° C. to 800° C. under a low-pressure environment. When the low-resistance silicon substrate210heated for growing the SiN film232is cooled, thermal stress is applied to the SiN film232because the thermal expansion coefficients of the low-resistance silicon substrate210and the SiN film232are different. Since the thermal expansion coefficient of the SiN film232is larger than that of the low-resistance silicon substrate210, the SiN film232is subjected to tensile stress in the cooling process. Therefore, as shown inFIG. 9, the crack CR is formed in portions of the SiN film232that are provided on the recess structure portion212. The crack CR alleviates the thermal stress applied to the SiN film232and suppresses the occurrence of a crack in a portion provided on the trench structure portion211. The SiN film232corresponds to the second dielectric layer132of the capacitor100according to the first embodiment. That is, the dielectric film230is formed of the SiO2film231and the SiN film232.

Next, a Poly-Si (polycrystalline silicon) film is formed by low-pressure CVD (S23). As shown inFIG. 9, a Poly-Si film241is provided on the SiN film232. The Poly-Si film241is grown by thermally reacting a reaction gas composed of SiH4(silane) at a temperature of the low-resistance silicon substrate210of 550° C. to 650° C. under a low-pressure environment. In Step S23, thermal stress is applied to the SiN film232in the heating process and the cooling process of the low-resistance silicon substrate210. That is, the crack CR may be formed in Step S23. The Poly-Si film241corresponds to the first conductive layer141of the capacitor100according to the first embodiment.

Next, an Al (aluminum) electrode is formed on the first principal surface side by sputtering, and patterning is performed (S24). An Al electrode242is provided on the entire surface of the Poly-Si film241. Thereafter, it is patterned by wet etching using photolithography and cut leaving a portion provided on the trench structure portion211. The Al electrode242corresponds to the second conductive layer142of the capacitor100according to the first embodiment. That is, the second electrode layer240is formed by the Poly-Si film241and the Al electrode242.

Next, the Al electrode is used as a mask, and dry etching of the Poly-Si film is performed (S25). The Poly-Si film241is cut by a self-aligned process. That is, the Poly-Si film241is processed into the same shape as the shape of the Al electrode242when viewed in a plan view from the normal direction of the first principal surface210A of the low-resistance silicon substrate210.

Next, a PI (polyimide) film is formed by spin coating, and patterning is performed (S26). A PI film250is first formed by coating the entire surfaces of the SiN film232and the Al electrode242exposed on the first principal surface210A side of the low-resistance silicon substrate210. Next, the PI film250is cut by etching using photolithography, with a portion covering the end portion of the second electrode layer240remained. The method for forming the PI film250is not particularly limited, and may be, for example, drawing by a dispenser method or pattern formation by a printing method such as screen printing. The PI film250corresponds to the insulating film150of the capacitor100according to the first embodiment.

Next, an Al electrode is formed on the second principal surface side by sputtering (S27). An Al electrode220is formed on a second principal surface210B of the low-resistance silicon substrate210. The Al electrode220is provided in the same manner as the Al electrode242. The Al electrode220corresponds to the first electrode layer120of the capacitor100according to the first embodiment.

Next, cutting is performed in the second region (S28). That is, as shown inFIG. 11, the low-resistance silicon substrate210is cut together with the Al electrode220, the SiO2film231, and the SiN film232in the second region292, and singulated in the portion including the first region291. The cutting is performed along the center portion of the second region292. That is, the second region292includes a dicing line. A first portion201, corresponding to a capacitance forming portion for forming a capacitance, is formed in the first region291, and a second portion202, corresponding to a stress concentration portion for concentrating stress of the SiN film232, is formed in the second region292having been cut. As a result, the capacitor200, having the first portion201and the second portion202outside the first portion201, is cut out.

Third Embodiment

As the third embodiment, the configuration of a capacitor300will be described with reference toFIG. 12.FIG. 12is a sectional view schematically showing the configuration of a capacitor according to the second embodiment. Also in the third embodiment described below, as in the second embodiment, description of matters common to the first embodiment and the second embodiment will be omitted and only differences will be described. In particular, no reference will be made one by one to the same actions and effects of the same configuration. The same reference numerals as those in the first embodiment denote the same structures and functions as those in the first embodiment.

The capacitor300according to the third embodiment is different from the capacitor100according to the first embodiment in that a recess structure portion312is formed deeper with respect to a first principal surface310A of a substrate310than a trench structure portion311. Specifically, the bottom portion of a recess portion312B of the recess structure portion312is closer to a second principal surface310B of the substrate310than the bottom surface of a recess portion311B of the trench structure portion311.

As described above, according to one aspect of the present invention, it is provided the capacitor100including: the substrate110having the principal surface110A; the dielectric film130provided on the principal surface110A side of the substrate110; and the electrode layer140provided on the dielectric film130, the substrate110has a recess structure portion112constituted with at least one recess portion formed in a region outside a region overlapping the electrode layer140when viewed in a plan view from a normal direction of the principal surface110A of the substrate110, and the dielectric film130is provided on the recess structure portion112.

According to the above aspect, the thermal stress applied to the dielectric film can be concentrated in a portion provided on the recess structure portion. That is, such a capacitor is capable of alleviating the thermal stress in the portion of the dielectric film between the substrate and the electrode layer, and capable of suppressing the occurrence of performance degradation due to leakage current caused by a crack in the dielectric film and operation failure due to short circuit.

The substrate may have the trench structure portion111formed in a region overlapping the electrode layer140when viewed in a plan view from the normal direction of the principal surface110A of the substrate110, and the dielectric film130may be provided on the trench structure portion111. According to this, the area of the capacitance forming portion where the trench structure portion forms a capacitance can be increased, and the capacitance value of the capacitor can be improved. Further, although the trench structure portion tends to cause a crack in the dielectric film in a region overlapping the recess portion or the protrusion portion, the formation of the recess structure portion can suppress the occurrence of a crack in the portion of the dielectric film between the substrate and the electrode layer.

The recess structure portion112may be formed so as to surround a region overlapping the electrode layer140when viewed in a plan view from the normal direction of the principal surface110A of the substrate110. This can alleviate in all directions the thermal stress applied to the dielectric film in the region where the dielectric film overlaps the electrode, and can suppress the occurrence of a crack in the region of the dielectric film between the substrate and the electrode layer.

The recess structure portion112may include a plurality of the recess portions112B and may have the protrusion portion112A positioned between the recess portions112B. According to this, since thermal stress is concentrated in the dielectric film at the corner of the recess portion and the protrusion portion of the recess structure portion, the number of the recess portions and the protrusion portions is increased, so that the concentration of thermal stress into the region overlapping the recess structure portion is facilitated, and the thermal stress can be further alleviated in the region overlapping the electrode layer.

The angle θ21, formed on the substrate110side by the corner of the protrusion portion112A of the recess structure portion112, may be smaller than the angle θ11, formed on the substrate110side by the corner of the protrusion portion111A of the trench structure portion111. This can cause the thermal stress of the dielectric film to be concentrated more in the protrusion portion of the recess structure portion than in the protrusion portion of the trench structure portion. That is, the thermal stress can be alleviated in the region overlapping the electrode layer.

The angle θ22, formed on the opposite side of the substrate110by the corner of the recess portion112B of the recess structure portion112, may be smaller than the angle θ12, formed on the opposite side of the substrate110by the corner of the recess portion111B of the trench structure portion111. This can cause the thermal stress of the dielectric film to be concentrated more in the recess portion of the recess structure portion than in the recess portion of the trench structure portion. That is, the thermal stress can be alleviated in the region overlapping the electrode layer.

The minimum angle of the angle θ21, formed on the substrate110side by the corner of the protrusion portion112A in the recess structure portion112, and the angle θ22, formed on the opposite side to the substrate110by the corner of the recess portion112B, may be smaller than the minimum angle of the angle θ11, formed on the substrate110side by the corner of the protrusion portion111A in the trench structure portion111, and the angle θ12, formed on the opposite side to the substrate110by the corner of the recess portion111B. This can cause the thermal stress of the dielectric film to be concentrated more in the recess portion and the protrusion portion of the recess structure portion than in the recess portion or the protrusion portion of the trench structure portion.

The corner of the protrusion portion112A of the recess structure portion112may has an acute angle. This can cause the dielectric film to concentrate the thermal stress more efficiently to the region overlapping the protrusion portion of the recess structure portion.

The depth of at least one recess portion312B of the recess structure portion312with respect to the principal surface310A may be greater than the depth of the recess portion311B of the trench structure portion311with respect to the principal surface310A. According to this structure, the recess portion of the recess structure portion can alleviate the thermal stress of the substrate, thereby reducing the warpage of the substrate.

The substrate110may have a silicon substrate and the dielectric film130may have a silicon nitride. According to this, even if the silicon nitride having a larger thermal expansion coefficient than that of the silicon substrate is formed thick, the dielectric film can alleviate the thermal stress in the region where the dielectric film overlaps the electrode layer. That is, the occurrence of a crack in the silicon nitride film can be suppressed in the region overlapping the electrode layer.

The crystal orientation of the principal surface110A may be expressed as <100>. According to this, the recess structure portion can be easily formed on the substrate by anisotropic etching such as wet etching.

In the dielectric film130, the crack CR may be formed in a portion provided on the recess structure portion112. According to this, the thermal stress on the dielectric film in the direction along the substrate surface is alleviated by the crack. In other words, the dielectric film can alleviate the thermal stress in the region overlapping the electrode layer due to the crack generated in the region overlapping the recess structure portion, thereby reducing the risk of the occurrence of crack.

According to another aspect of the present invention, it is provided a method for manufacturing the capacitor200, the method including:

a step of preparing the aggregate substrate210having the principal surface210A and having the plurality of first regions291and the second region292between the plurality of first regions291when viewed in a plan view from the normal direction of the principal surface210A;

a step of forming the recess structure portion212constituted with at least one recess portion in the second region292;

a step of providing the dielectric film230on the aggregate substrate210in the plurality of first regions291and the recess structure portion212;

a step of providing the electrode layer240on the dielectric film230in the plurality of first regions291; and

a step of singulating the plurality of first regions291by cutting the aggregate substrate210in the second region292.

According to the above aspect, the thermal stress applied to the dielectric film can be concentrated in a portion provided on the recess structure portion in the second region. That is, such a capacitor is capable of alleviating the thermal stress applied to the dielectric film between the substrate and the electrode layer in the first region, and capable of suppressing the occurrence of performance degradation due to leakage current caused by a crack in the dielectric film and operation failure due to short circuit. Further, by providing the recess structure portion in the dicing line of the aggregate substrate, it is not necessary to provide a space for providing the recess structure portion in the capacitor, and the capacitor can be miniaturized.

The method may further include a step of forming the trench structure portion211in the plurality of first regions291, and the dielectric film230may be provided on the trench structure portion211. According to this, the area of the capacitance forming portion where the trench structure portion forms a capacitance can be increased, and the capacitance value of the capacitor can be improved. Further, although the trench structure portion tends to cause a crack in the dielectric film in a region overlapping the recess portion or the protrusion portion, the formation of the recess structure portion can suppress the occurrence of a crack in the portion of the dielectric film between the substrate and the electrode layer.

The corner of the protrusion portion of the recess structure portion212may be smaller than the corner of the protrusion portion of the trench structure portion. This can cause the thermal stress of the dielectric film to be concentrated more in the protrusion portion of the recess structure portion than in the protrusion portion of the trench structure portion. That is, the thermal stress can be alleviated in the region overlapping the electrode layer.

The corner of the protrusion portion of the recess structure portion212may has an acute angle This can cause the dielectric film to concentrate the thermal stress more efficiently to the region overlapping the protrusion portion of the recess structure portion.

The depth of the recess portion of the recess structure portion212with respect to the principal surface210A may be greater than the depth of the recess portion of the trench structure portion211with respect to the principal surface210A. According to this structure, the recess portion of the recess structure portion can alleviate the thermal stress of the substrate, thereby reducing the warpage of the substrate.

The aggregate substrate210may have a silicon substrate and the dielectric film230may have a silicon nitride. According to this, even if the silicon nitride having a larger thermal expansion coefficient than that of the silicon substrate is formed thick, the dielectric film can alleviate the thermal stress in the region where the dielectric film overlaps the electrode layer. That is, the occurrence of a crack in the silicon nitride film can be suppressed in the region overlapping the electrode layer.

The crystal orientation of the principal surface210A may be expressed as <100>, and the step of providing the recess structure portion212may include wet etching. According to this, the recess structure portion can be easily formed on the substrate by anisotropic etching such as wet etching.

The method may further include a step of forming the crack CR in a portion provided on the recess structure portion212in the dielectric film230. According to this, the thermal stress on the dielectric film in the direction along the surface of the aggregate substrate is alleviated by the crack. In other words, the dielectric film can alleviate the thermal stress in the region overlapping the electrode layer due to the crack generated in the region overlapping the recess structure portion, thereby reducing the risk of the occurrence of crack.

As described above, according to one aspect of the present invention, it is possible to provide a capacitor capable of improving reliability.

Note that the embodiments described above are intended to facilitate understanding of the present invention, and are not intended to be construed as limiting the invention. The present invention may be modified/improved without departing from the scope thereof, and the present invention also includes equivalents thereof. That is, embodiments modified as appropriate by a person skilled in the art are also within the scope of the present invention as long as they possess the features of the present invention. For example, each element of each embodiment and its arrangement, material, condition, shape, size, and the like are not limited to those illustrated, and may be changed as appropriate. The elements of each embodiment may be combined as far as technically possible, and combinations thereof are also within the scope of the present invention as long as they possess the features of the present invention.

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