Semiconductor die substrate with integral heat sink

An integrated circuit device includes a semiconductor substrate with a top surface, a bottom surface opposite the top surface and an intermediate portion positioned between the top and bottom surfaces. The device also includes interior substrate surfaces defined by at least one void extending from the bottom surface to the intermediate portion.

BACKGROUND

An integrated circuit (IC) die typically includes a substrate of semiconductor material, such as silicon, with a flat top surface and an opposite flat bottom surface. A metal circuit layer is usually provided only on the top surface of the semiconductor substrate. The circuit layer generates heat when the die is operating. Various techniques have been used to dissipate the heat generated by the metal circuit layer. Typically only a very small portion of the heat from the circuit layer is dissipated through the semiconductor substrate because semiconductors are poor heat conductors.

SUMMARY

One embodiment of an integrated circuit device includes a semiconductor substrate with a top surface, a bottom surface opposite said top surface and an intermediate portion positioned between the top and bottom surfaces. The device also includes interior substrate surfaces defined by at least one void extending from the bottom surface to the intermediate portion.

One embodiment of an integrated circuit package includes a lead frame with a die pad and a plurality of leads. A first semiconductor die substrate is attached at a bottom surface thereof to the die pad. The first semiconductor substrate has a plurality of slots extending through it laterally. The slots have openings at the bottom surface of the first semiconductor die substrate. A first clip member is attached at one end to a metal circuit layer on the top of the first semiconductor die substrate and on the other end to at least one of the plurality of leads. A second semiconductor die substrate is attached at a bottom surface thereof to the first clip member. The second semiconductor die substrate has a plurality of slots extending through it laterally. The slots have openings at the bottom surface of the second semiconductor die substrate. A second clip member is attached at one end to a metal circuit layer on the top of the second die and on the other end to at least one of the plurality of leads.

One embodiment of a method of forming an integrated circuit die includes etching at least one void in a substrate.

DETAILED DESCRIPTION

FIG. 1is a partially cross-sectional elevation view of a prior art integrated circuit (IC) package and heat sink assembly10. An IC die12is attached to a die attach pad14of a leadframe15with die attach adhesive16. A bond wire18is solder attached to a contact surface of the IC die12at one end and is solder attached to a leadframe lead20at the other end. The leads20are attached to solder pads22with solder23. The solder pads22are provided on a dielectric layer24that is in turn attached to the top surface of an aluminum plate26. The aluminum plate26acts as a heat sink and has a slotted bottom portion28that acts as a heat radiator. A layer of mold compound30encapsulates the die12, the bond wire18, and portions of the lead frame. Heat generated by the die12passes from the die12to the die pad14and leads20and thereafter through the dielectric layer24to the aluminum plate26. Heat is transferred from the aluminum plate to the atmosphere.

FIG. 2illustrates another prior art integrated circuit package known as a stacked die package50. The stacked die package50inFIG. 2is mounted on an electrical substrate such as a PC (printed circuit) board52. Stacked die package50includes a lead frame54that has a central die attach pad56and a plurality of peripherally positioned leads58. A first die62, which in this embodiment comprises a FET (field-effect transistor) die, is attached to the die attach pad56by a layer of adhesive64. A first clip66has a first portion68thereof attached to the top of die62by a second layer of adhesive70. A second portion69of the clip66is attached to a lead58by a portion of the first adhesive layer64.

A second die72is attached to a top portion of the first clip66by a third layer of adhesive74. A second clip76has a first portion78thereof attached to the top of the second die72by a fourth layer of die attach adhesive80. A second portion82of the clip76is attached to a lead58by a portion of the first adhesive layer64. A layer of mold compound84covers the dies62,72and clips66,76leaving the bottom surfaces of the leads58and the die attach pad56exposed on the bottom surface of the package. The leads58are also exposed on the lateral sides of the package50.

In the stacked die package50heat generated by electric circuitry at the top of die62is transferred through the die attach adhesive72to the first clip66and then through adhesive layer64to a lead58. Heat is also transferred through the body of the die62and the first adhesive layer64to the die attached pad56. The heat transferred form the first die62then escapes through the exposed surfaces of the die attach pad56and leads58to the attached PC board52and atmosphere. Heat is transferred from the electrical circuitry at the top of the second die72through adhesive layer80to the second clip76and then to leads58. Heat from the second die circuit layer also passes through the second die72and adhesive layer74to attached first clips66and then to the leads58and thence out of the package. The amount of heat transferred through the dies62and72is relatively small because the die substrates are made from semiconductor material, which has poor thermal conductive properties.

FIG. 3is an isometric view of a prior art IC die90having a semiconductor substrate91. The semiconductor substrate91has a metal circuit layer92formed on a top surface94thereof. Bond wires96,98are attached by solder to contacts102,104on the die metal circuit layer92. The second ends of bond wires96,98are attached by solder to leads106,108. The leads106,108and a die attach pad112are portions of a lead frame110. A bottom side116of the semiconductor substrate91is attached by solder or adhesive114to die attach pad112. The IC die90, bond wires96,98and portions of the lead frame110are encapsulated in mold compound120. Heat from the metal circuit layer92at the top of the semiconductor substrate91passes through an intermediate portion118of the substrate91to the bottom surface116then through die attach material114and die attach pad112before leaving the encapsulated package90. Some heat also escapes through the bond wires96,98and attached leads106,108.

It will be appreciated from the descriptions of the prior art IC packages inFIGS. 1-3that in all cases at least a portion of the heat generated by the electrical circuitry at the top portion of a die is transferred to the associated semiconductor substrate that is in physical contact with it. Virtually all semiconductor materials, for example, silicon, are thermal insulators, i.e., poor conductors of thermal energy. Thus, heat transfer through the semiconductor substrate is slow and inefficient. As used herein, the phrases “thermally nonconductive;” “poor heat conductor;” “poor thermal conductor;” “thermal insulator” and similar phrases refer to materials having a thermal conductivity of less than about 0.5 W/mK. Similarly “thermal conductor;” “heat conductor” and similar phrases refer to materials having a thermal conductivity of more than about 5 W/mK. The integrated circuit dies, developed by the inventors and described below, have significantly improved heat transfer through the IC die substrates thereof as compared to prior art IC dies. This improved heat transfer through a die substrate may be particularly advantages in encapsulated integrated circuit package applications.

FIG. 4is an isometric view of an IC die210having an integral heat sink formed therein. The IC die210includes a semiconductor substrate212with a top (active) side214and a bottom side216. A metal circuit layer218is formed on the top side214. The bottom side216is attached by a die attach material220such as solder or die adhesive to a die attach pad222of a lead frame224. The leadframe has a plurality of leads226,228, etc. Bond wires232,234, etc. are attached between leads226,228, etc., and contact surfaces232,234on the metal circuit layer218. A layer of encapsulant236encapsulates IC die210, bond wires232,234and portions of the lead frame224.

The substrate212has a plurality of voids that extend upwardly from the bottom side216of the substrate to an intermediate height portion244of the substrate. In this embodiment, the voids are parallel longitudinally extending slots242that extend from one longitudinal end face246of the substrate212to the opposite longitudinal end face248thereof. By removing semiconductor material from the substrate212, heat transfer through the substrate is improved. In the embodiment illustrated inFIG. 4, heat transfer is improved because air, which replaces the semiconductor material removed from the slots242is a better heat transfer medium than semiconductor material, even though air is a relatively poor heat transfer medium.

FIG. 5is an isometric view of an IC die310having and integral heat sink formed by intersecting sets of parallel slots342,352, extending through the semiconductor material. The IC die configuration illustrated inFIG. 5, has approximately twice the amount of semiconductor material removed from it and thus has better heat transfer then the semiconductor die210illustrated inFIG. 4. The IC die310may be part of an integrated circuit package of the same type as shown inFIG. 4. It will be understood that the die310ofFIG. 5may be provided in a die package such as shown inFIG. 4.

FIG. 7is an isometric view of IC die380with substrate382and circuit layer390identical to the IC die310shown inFIG. 5, except that the longitudinally extending slots384and laterally extending slots386in the substrate382are filled with thermally conductive material387and389, respectively. The die380is mounted on a leadframe381with a die pad383and leads385as by an adhesive layer (not shown). Because of the conductive fill material placed in the slots and the greater slot volume, the heat transfer property of the substrate382is superior to those of any of the substrates shown inFIGS. 3-6. The IC die380may be part of an integrated circuit package of the same type as shown inFIG. 4.

FIG. 8is a cross-sectional elevation view of an IC die410with an integral heat sink formed in a semiconductor substrate412thereof. The semiconductor substrate412has a top surface416and a bottom surface418. A metal circuit layer414is positioned on the top surface416of the substrate412. A plurality of generally trapezoidal cross sectional shaped voids or slots422,424,426extend from one longitudinal end of the die to the other. These voids422,424,426define corresponding walls423,425,427. An etch reticle432is placed over the bottom surface418of the die410, during void formation. The reticle432has openings434,436,438therein corresponding to the voids422,424,426, which are conventionally formed using the reticle. Voids formed in the semiconductor substrates described herein may be conventionally formed either by wet etching or dry etching processes well known in the art.

FIG. 9is a cross-sectional elevation view of the IC die410after filling the void's with heat conductor material to form filled voids442,444,446which are connected by a thin lower block portion448having a bottom surface450that may be attached to a thermal substrate (not shown) to further improve heat transfer out of the metal layer414.

FIG. 10illustrates another IC die460having a semiconductor substrate462with a plurality of voids therein. The substrate462as a top surface464and a bottom surface466and an intermediate height portion467. A metal circuit layer468is formed on the top surface464. A plurality of narrow slots470extend from one longitudinal end of the substrate462to the other. With thin slots, e.g. slots having a width of less than about 200 μm, a dry etching process is generally used for slot formation. Ink jet printing may be used for placing thermally conductive material into such narrow slots470. The slots extend upwardly from the bottom surface466to the intermediate height portion467. The narrow slots470have a width of less than about 200 μm and may be formed with a dry etching process generally used for slot formation. Ink jet printing may be used for placing thermally conductive material into such narrow slots470.

FIG. 11is a cross-sectional elevation view of an IC die472with an integral heat sink, which includes two different thermally conductive materials. The die472includes a substrate474having a top surface476and a bottom surface478. A plurality of voids define trapezoidal shaped interior sidewalls482,484,486extending upwardly from the bottom surface478. A layer of a first thermally conductive material488, for example graphite, graphene, diamond, zinc oxide, indium phosphide or metal, interfaces with each of the interior sidewalls482,484,486. The empty space remaining in each void after the thermally conductive material488is applied is then filled with another thermally conductive material490, for example thermal epoxy, metal or thermally conductive oxide. In each of the thermally conductive material fills described in this paragraph and other paragraphs, materials are selected that have a coefficient of thermal expansion (CTE) close to that of the semiconductor material, e.g., silicon, of the substrate. For example, the thermally conductive material may have a CTE that is plus or minus about 50% of the CTE of the semiconductor material. For example, in one embodiment, the CTE of the thermally conductive material differs from the CTE of the semiconductor material by less than 15%. The use of two or more thermally conductive materials as thermal fill materials may enable the combined CTE of the fill material to be more closely matched to that of the semiconductor material.

FIG. 12is an isometric view of an IC die512having a semiconductor die514with heat sink slots522,524,526,528,530, etc. These slots are filled with thermally conductive material, which extends outwardly from the IC die substrate514in a plurality of projections521,523,525,527,529, etc. In this IC die512the slots may be two sets of parallel slots that intersect. The additional length of thermally conductive material extending from each slot increases the heat transfer properties of the semiconductor substrate514. The IC die512in this embodiment may have an active metal circuit layer532on a top surface534thereof.

FIG. 13is a cross-sectional side elevation view of an IC substrate610having slots622,624,626filled with thermally conductive material630. The substrate610is mounted on top of another substrate640having through vias642,644,646filled with thermally conductive material650. The slots and vias may be aligned such that a heat transfer pathway extends from each thermally conductive material filled slot, e.g.,622to a corresponding thermally conductive material filled via, e.g.,642to a bottom substrate660on which the substrate640is mounted. In one embodiment, an intermediate plate670made from thermally conductive material is positioned between the two substrates610,640and provides an additional lateral heat transfer path. In one embodiment the substrate610is a portion of an IC die611having a circuit layer613positioned on top of the substrate610. This IC die611may part of an IC package680having a layer of encapsulant682. The plate670may be exposed through the layer of encapsulant682providing a heat transfer path out of the IC package680. A second plate660, to which the thermally conductive material650may be attached, may be a portion of a leadframe that is at least partially exposed at the bottom of the layer of encapsulant680.

FIG. 14is a cross-sectional elevation view of an IC package750with stacked IC dies that have integrally formed heat sinks. The configuration of the IC package750may be identical to that of IC package50described inFIG. 2, except that the dies762,772each have a plurality of slots732,742, respectively, formed in bottom portion. The slots732,742facilitate heat transfer through each of the dies762,772and thereafter out of the package. Other features of the IC die package have 700 series reference numerals that correspond to the 0 series numerals ofFIG. 2

FIG. 15is a side elevation view of a flip chip die810with an integrally formed heat sink. Flip chip die810has a semiconductor substrate812with a bottom surface814and a top surface816. An active circuit layer820is formed on the top surface816. Slots822, which extend upwardly from the bottom surface814, also extend longitudinally through the substrate812. The active circuit layer820comprises a ball grid array830that includes a plurality of solder balls832or copper posts or similar electrical connectors located at a top portion of the active circuit layer820.

FIG. 16is a cross sectional side view of an IC package850that includes two IC dies852,862, each having a semiconductor substrate854,864, respectively and an active circuit layer856,866, respectively. The two circuit layers may be electrically connected by bond wires872, etc. and may also be connected to leads874,876by other bond wires878. Each substrate may have a plurality of slots857,867that define heat sink fins858,868, respectively. A layer of mold compound880may encapsulate the circuit layers856,866and bond wires872,878, but leaves the fins858,868exposed. The fins858,868may dissipate heat by radiation. An airflow may be provided through slots857,867, etc. to increase heat dissipation form the IC package850.

FIG. 17illustrates a method of forming an integrated circuit die that comprises, as illustrated at block910, etching at least one void in a substrate.

FIG. 18illustrates another method of forming an integrated circuit device that comprises, as shown at block920, etching at least one void in a substrate; and, as shown at block922, at least partially filling the at least one void with thermally conductive material.

FIG. 19illustrates another method of forming an integrated circuit device that comprises, as shown at block932, etching at least one void in a substrate; and, as shown at block934, Inkjet printing thermally conductive material in the at least one void.

Various embodiments of integrated circuit dies having heat sinks formed in semiconductor substrates thereof and integrated circuit packaging including such dies have been described in detail herein. Alternative embodiments of such integrated circuit dies and integrated circuit packages and method of making and using same may occur to those skilled in the art after reading this disclosure. It is intended that the language of the appended claims be construed broadly so as to cover all such alternative embodiments, except as limited by the prior art.