Nonvolatile memory device

According to one embodiment, a nonvolatile memory device includes a first conductive layer, a second conductive layer, and an intermediate layer. The first conductive layer includes a first element. The first element includes a at least one selected from the group consisting of Ag, Cu, Ni, Co, Ti, Al, and Au. The intermediate layer is provided between the first conductive layer and the second conductive layer. The intermediate layer includes an oxide. The oxide includes a second element and a third element. The second element includes at least one second element being selected from the group consisting of Ti, Ta, Hf, W, Mg, Al, and Zr. The third element is different from the second element and includes at least one selected from the group consisting of Si, Ge, Hf, Al, Ta, W, Zr, Ti, and Mg.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is based upon and claims the benefit of priority from Japanese Patent Application No. 2016-056055, filed on Mar. 18, 2016; the entire contents of which are incorporated herein by reference.

FIELD

Embodiments described herein relate generally to a nonvolatile memory device.

BACKGROUND

Resistive random access memory (ReRAM) is a nonvolatile memory device in which the resistance can be changed electrically. It is desirable to increase the bit density of such a nonvolatile memory device.

DETAILED DESCRIPTION

According to one embodiment, a nonvolatile memory device includes a first conductive layer, a second conductive layer, and an intermediate layer. The first conductive layer includes a first element. The first element includes a first element selected from the group consisting of Ag, Cu, Ni, Co, Ti, Al, and Au. The intermediate layer is provided between the first conductive layer and the second conductive layer. The intermediate layer includes an oxide. The oxide includes a second element and a third element. The second element includes at least one selected from the group consisting of Ti, Ta, Hf, W, Mg, Al, and Zr. The third element is different from the second element and includes at least one selected from the group consisting of Si, Ge, Hf, Al, Ta, W, Zr, Ti, and Mg. The intermediate layer has a first position inside the intermediate layer, a second position inside the intermediate layer and a third position inside the intermediate layer, the second position being located between the first position and the second conductive layer, the third position being located between the second position and the second conductive layer. A concentration of oxygen at the first position is higher than a concentration of oxygen at the second position. A concentration of oxygen at the third position is higher than the concentration of oxygen at the second position. A concentration of the second element at the first position is lower than a concentration of the second element at the second position. A concentration of the second element at the third position is higher than the concentration of the second element at the second position.

According to another embodiment, a nonvolatile memory device includes a first conductive layer, a second conductive layer, and an intermediate layer. The first conductive layer includes a first element including at least one selected from the group consisting of Ag, Cu, Ni, Co, Ti, Al, and Au. The intermediate layer is provided between the first conductive layer and the second conductive layer. The intermediate layer includes an oxide. The oxide includes a second element and a third element. The second element includes at least one selected from the group consisting of Ti, Ta, Hf, W, Mg, Al, and Zr. The third element is different from the second element and includes at least one selected from the group consisting of Si, Ge, Hf, Al, Ta, W, Zr, Ti, and Mg. The intermediate layer has a first position inside the intermediate layer, a second position inside the intermediate layer, a third position inside the intermediate layer, a fourth position inside the intermediate layer, and a fifth position inside the intermediate layer. The second position is located between the first position and the second conductive layer. The third position is located between the second position and the second conductive layer. The fourth position is located between the second position and the third position. The fifth position is located between the second position and the fourth position. A concentration of oxygen at the first position is higher than a concentration of oxygen at the second position. A concentration of oxygen at the third position is higher than the concentration of oxygen at the second position. A concentration of oxygen at the fourth position is lower than the concentration of oxygen at the third position. A concentration of oxygen at the fifth position is higher than the concentration of oxygen at the second position and higher than the concentration of oxygen at the fourth position. A concentration of the second element at the first position is lower than a concentration of the second element at the second position. A concentration of the second element at the third position is lower than a concentration of the second element at the fourth position. A concentration of the second element at the fifth position is higher than the concentration of the second element at the second position and higher than the concentration of the second element at the fourth position.

According to another embodiment, a nonvolatile memory device includes a first conductive layer, a second conductive layer, and an intermediate layer. The first conductive layer includes a first element including at least one selected from the group consisting of Ag, Cu, Ni, Co, Ti, Al, and Au. The intermediate layer is provided between the first conductive layer and the second conductive layer. The intermediate layer includes an oxide. The oxide includes a second element and a third element. The second element includes at least one selected from the group consisting of Ti, Ta, Hf, W, Mg, Al, and Zr. The third element is different from the second element and includes at least one selected from the group consisting of Si, Ge, Hf, Al, Ta, W, Zr, Ti, and Mg. The intermediate layer includes a first region, a second region, and a third region. The second region is provided around the first region. The third region is provided between the first region and the second region. A concentration of oxygen in the first region is higher than a concentration of oxygen in the third region. A concentration of oxygen in the second region is higher than the concentration of oxygen in the third region. The concentration of the second element in the second region is lower than a concentration of the second element in the third region. The concentration of the second element in the first region is higher than the concentration of the second element in the third region.

The drawings are schematic and conceptual; and the relationships between the thickness and width of portions, the proportions of sizes among portions, etc., are not necessarily the same as the actual values thereof. Further, the dimensions and proportions may be illustrated differently among drawings, even for identical portions.

In the specification and drawings, components similar to those described or illustrated in a drawing thereinabove are marked with like reference numerals, and a detailed description is omitted as appropriate.

First Embodiment

FIG. 1AtoFIG. 1Care schematic views illustrating a nonvolatile memory device according to a first embodiment.

FIG. 1Ais a schematic cross-sectional view.FIG. 1Bis a graph illustrating the concentration distribution of oxygen.FIG. 1Cis a graph illustrating concentration distributions of elements included in the nonvolatile memory device.

As shown inFIG. 1A, the nonvolatile memory device110according to the embodiment includes a stacked body10. The stacked body10includes a first conductive layer11, a second conductive layer12, and an intermediate layer21.

The second conductive layer12is provided to be separated from the first conductive layer11in a first direction. The intermediate layer21is provided between the first conductive layer11and the second conductive layer12.

The first conductive layer11includes a first element. The first element includes a metal that is ionized easily. The first element is, for example, at least one selected from the group consisting of silver (Ag), copper (Cu), nickel (Ni), cobalt (Co), titanium (Ti), aluminum (Al), and gold (Au). The first element is, for example, Ag. As a voltage is applied to the nonvolatile memory device110, the first element of the first conductive layer11is ionized, enters the intermediate layer21, and precipitates inside the intermediate layer21. The first conductive layer11functions as an ion source electrode.

The second conductive layer12includes a material that is chemically inert and ionizes less easily than the first element. The second conductive layer12includes, for example, at least one selected from the group consisting of tungsten (W), platinum (Pt), tantalum (Ta), molybdenum (Mo), titanium nitride (TiN), tantalum nitride (TaN), and tungsten nitride (WN). The second conductive layer12may include, for example, at least one of silicon (Si) or germanium (Ge). The second conductive layer12may include a semiconductor doped with a high concentration. For example, Si that is doped with a high concentration, Ge that is doped with a high concentration, or the like is used. The second conductive layer12functions as a counter electrode.

The intermediate layer21includes an oxide. The oxide includes a second element and a third element. The second element is, for example, at least one selected from the group consisting of Ti, Ta, hafnium (Hf), W, Mg, Al, and zirconium (Zr). The second element is, for example, Ti. The third element is different from the second element. The third element is, for example, at least one of Si or Ge. The third element may be, for example, at least one selected from the group consisting of Hf, Al, Ta, W, Zr, Ti, and Mg. The third element is, for example, Si.

The intermediate layer21functions as a variable resistance layer. The resistance of the intermediate layer21changes due to a voltage applied to the nonvolatile memory device110. For example, the intermediate layer21transitions to a low resistance state according to the voltage application when programming and transitions to a high resistance state according to the voltage application when erasing. In the nonvolatile memory device110, for example, the direction of the voltage application when programming is the reverse orientation of the direction of the voltage application when erasing. For example, the nonvolatile memory device110functions as a nonvolatile resistive random access memory element having a bipolar operation.

A direction (the first direction) from the second conductive layer12toward the first conductive layer11is taken as a Z-axis direction. One direction perpendicular to the Z-axis direction is taken as an X-axis direction. One direction perpendicular to the Z-axis direction and the X-axis direction is taken as a Y-axis direction.

The intermediate layer21has a first position p1, a second position p2, a third position p3, and a fourth position p4. The first position p1is along the Z-axis direction. The second position p2is positioned between the first position p1and the second conductive layer12. The third position p3is positioned between the second position p2and the second conductive layer12. The fourth position p4is positioned between the third position p3and the second conductive layer12. The four positions may be located in a portion of regions respectively in four X-Y planes. For example, the intermediate layer21includes a first region r1including the first position p1, a second region r2including the second position p2, a third region r3including the third position p3, and a fourth region r4including the fourth position p4.

FIG. 1Billustrates the concentration distribution of oxygen of the intermediate layer21. InFIG. 1B, the horizontal axis shows a position pz in the Z-axis direction. The vertical axis shows a concentration c of oxygen.FIG. 1Cillustrates the concentration distributions of the first to third elements of the intermediate layer21. InFIG. 1C, the horizontal axis shows the position pz in the Z-axis direction. The vertical axis shows the concentrations c of the elements. A concentration distribution c1shows the concentration distribution of the first element (e.g., Ag). A concentration distribution c2shows the concentration distribution of the second element (e.g., Ti). A concentration distribution c3shows the concentration distribution of the third element (e.g., Si).

As shown inFIG. 1B, the concentration of oxygen at the first position p1is higher than the concentration of oxygen at the second position p2. The concentration of oxygen at the third position p3is higher than the concentration of oxygen at the second position p2. The first region r1includes an oxide of the third element (e.g., Si). The second region r2includes an oxygen-poor oxide of the third element (e.g., Si). The oxide is, for example, SiO2. For example, the oxygen-poor oxide is represented by SiO2-x(0<x<2). The oxygen-poor oxide is formed by reducing the oxygen of the oxide. The concentration of oxygen in the first region r1is higher than the concentration of oxygen in the second region r2.

In the example ofFIG. 1B, the oxygen concentration of the intermediate layer21has a minimum value at the second position p2.

As shown inFIG. 1C, the concentration of the second element (e.g., Ti) at the first position p1is lower than the concentration of the second element at the second position p2. The concentration of the second element at the third position p3is higher than the concentration of the second element at the second position p2. The concentration of the second element at the fourth position p4is higher than the concentration of the second element at the third position p3. The third region r3includes an oxide of the second element. The fourth region r4includes the second element. The second element is, for example, Ti. The oxide is, for example, TiO2. For example, the oxide is formed by oxidizing the second element. It is desirable for the thickness of the fourth region r4to be, for example, 5 nanometers (nm) or less. It is desirable for the thickness of the third region r3to be, for example, 2 nm or less.

It is desirable for the absolute value of the standard free energy of formation per oxygen atom of the oxide of the second element to be greater than the absolute value of the standard free energy of formation per oxygen atom of the oxide of the third element. The standard free energy of formation (the standard Gibbs free energy of formation) refers to the free energy per oxygen atom required to form a unit amount of the oxide under atmospheric pressure (1 atmosphere at 25° C.). The material becomes more stable chemically as the absolute value of the standard free energy of formation increases. In the example, the oxide of the second element is chemically more stable than the oxide of the third element.

In the embodiment, the oxygen inside the intermediate layer21is reduced by providing the intermediate layer21between the first conductive layer11and the second conductive layer12. Thereby, for example, the stress that is applied to the conducting filament formed in the intermediate layer21is reduced; and the retention characteristics of the conducting filament can be improved. For example, stable operations can be performed even for a high bit density in which the size of the memory unit (the cell size) is small. According to the embodiment, the bit density can be increased.

There is a reference example in which the ion source electrode includes a AgTi alloy, the counter electrode includes p+-Si, and the variable resistance layer includes SiO2in the nonvolatile memory device. The results of component analysis show that Ti precipitates and TiO2is formed at the interface between the AgTi alloy and the SiO2. That is, it is considered that the AgTi alloy, Ti, TiO2, and SiO2are in this order from the ion source electrode toward the variable resistance layer.

As shown inFIG. 1C, the concentration of the first element (e.g., Ag) is high at the first position p1and decreases in the order of the second position p2, the third position p3, and the fourth position p4. The concentration of the third element (e.g., Si) is relatively high at the first position p1and the second position p2and is lower at the fourth position p4than at the third position p3. In the example, the concentration of the third element at the second position p2is higher than the concentration of the third element at the first position p1. The concentration of the third element at the second position p2is higher than the concentration of the third element at the third position p3.

FIG. 2is a graph illustrating characteristics of the nonvolatile memory device.

FIG. 2illustrates the retention characteristics of the conducting filament according to reference examples. InFIG. 2, the horizontal axis shows a time T (hours). The vertical axis shows a current I (A). A retention characteristic S1of a reference example in which the ion source electrode includes the AgTi alloy and a retention characteristic S2of a reference example in which the ion source electrode includes Ag are shown.

FIG. 2shows the time transient of the read current value. A point sp1of the retention characteristic S1is the current value in the high resistance state (the OFF state); and a point sp2of the retention characteristic S1is the current value in the low resistance state (the programmed state).

The retention characteristic S2of the reference example in which the ion source electrode includes Ag also is shown inFIG. 2. In the element, TiO2is not formed at the interface between the ion source electrode and the variable resistance layer. Conversely, in the structure (the retention characteristic S1) in which the ion source electrode includes the AgTi alloy, TiO2is formed at the interface between the ion source electrode and the variable resistance layer. As shown inFIG. 2, for the element in which TiO2is formed at the interface, the read current value after leaving idle for a constant amount of time is high; and the retention characteristics of the low resistance state are improved. That is, it is considered that the interior of the variable resistance layer is in a state of sparse oxygen due to reduction due to the TiO2formed at the interface between the ion source electrode and the variable resistance layer. In other words, it is considered that the improvement of the retention characteristics of the conducting filament becomes possible by setting the oxygen inside the variable resistance layer to be sparse.

However, as inFIG. 2, compared to the case where the ion source electrode includes Ag, the operating voltage when programming undesirably increases in the case where the ion source electrode includes the AgTi alloy. That is, there is a trade-off relationship between the decrease of the operating voltage and the improvement of the retention characteristics of the conducting filament. Therefore, it is desirable to improve the retention characteristics of the conducting filament while suppressing the operating voltage when programming.

FIG. 3is a schematic cross-sectional view illustrating a state of the nonvolatile memory device according to the first embodiment.

FIG. 3illustrates the state of the conducting filament of the nonvolatile memory device.

In the nonvolatile memory device110according to the embodiment as shown inFIG. 3, the first conductive layer11includes, for example, the first element of Ag, etc. The intermediate layer21is provided between the first conductive layer11and the second conductive layer12. The intermediate layer21includes the first region r1, the second region r2, the third region r3, and the fourth region r4. The first region r1includes, for example, SiO2. The second region r2includes, for example, SiO2-x(0<x<2) which has a lower oxygen concentration than SiO2. The third region r3includes, for example, TiO2. The fourth region r4includes, for example, Ti. A conducting filament F1is formed in the interior of the intermediate layer21. The conducting filament F1includes the first element.

The atoms of the first element of the first conductive layer11are ionized when programming when the voltage is applied to the nonvolatile memory device110. The ionized atoms penetrate the intermediate layer21. The conducting filament F1that includes the first element is formed in the interior of the intermediate layer21. The conducting filament F1is strongly affected by the stress inside the intermediate layer21. In the embodiment, the oxygen inside the first to third regions r1to r3decreases due to a reduction effect D1in the fourth region r4. Therefore, the stress inside the first to third regions r1to r3weakens. In the conducting filament F1, the effects of the stress inside the first to third regions r1to r3are reduced. Thereby, the stability of the conducting filament F1becomes high; and the retention characteristics improve.

In the embodiment, the intermediate layer21that includes Ti is provided between the first conductive layer11and the second conductive layer12. That is, the AgTi alloy is not included in the first conductive layer11. Therefore, the increase of the operating voltage when programming can be suppressed.

Thus, according to the embodiment, the retention characteristics of the conducting filament F1can be improved while suppressing the increase of the operating voltage when programming. Thereby, it is possible to perform stable operations even for a high bit density. According to the embodiment, the bit density can be increased.

Operations of the nonvolatile memory device110according to the embodiment will now be described.

The stacked body10of the nonvolatile memory device110is utilized as one unit (e.g., the minimum unit) of the memory device. The one unit has the two memory states of the high resistance state and the low resistance state.

An example of the program operation of the nonvolatile memory device110will now be described with reference toFIG. 3. In the program operation, a voltage that is positive with respect to the second conductive layer12is applied to the first conductive layer11. Thereby, the atoms of the first element of Ag, etc., included in the first conductive layer11are ionized. The ionized atoms are transported toward the intermediate layer21by the electric field generated inside the stacked body10. The transported ions are reduced inside the intermediate layer21and form the conducting filament F1. Thereby, the electrical resistance of the stacked body10transitions from the high resistance state to the low resistance state.

In the erasing operation, a voltage that is positive with respect to the first conductive layer11is applied to the second conductive layer12. Thereby, the first element that is included in the conducting filament F1is transported toward the side of the first conductive layer11; and the conducting filament F1disappears. Thereby, the electrical resistance of the stacked body10transitions from the low resistance state to the high resistance state.

In the read operation, a voltage that is positive with respect to the second conductive layer12is applied to the first conductive layer11to read the memory state of the stacked body10to an external circuit. For example, the voltage of the read operation is different from the voltage of the program operation. A voltage of the reverse direction may be applied. For example, a voltage that is positive with respect to the first conductive layer11may be applied to the second conductive layer12.

FIG. 4is a schematic cross-sectional view illustrating another nonvolatile memory device according to the first embodiment.

As shown inFIG. 4, the nonvolatile memory device111according to the embodiment includes the first conductive layer11, the second conductive layer12, and the intermediate layer21. For example, in the intermediate layer21, the second element may be provided in island configurations. The intermediate layer21has multiple protrusions21aincluding the second element. The multiple protrusions21aare provided between the third position p3and the second conductive layer12. The cross section of each of the multiple protrusions21ahas, for example, an arc configuration.

Second Embodiment

FIG. 5is a schematic cross-sectional view illustrating a nonvolatile memory device according to a second embodiment.

As shown inFIG. 5, the nonvolatile memory device112according to the embodiment includes the first conductive layer11, the second conductive layer12, and an intermediate layer22.

The first conductive layer11includes the first element. The first element is, for example, at least one selected from the group consisting of Ag, Cu, Ni, Co, Ti, Al, and Au. The first element is, for example, Ag.

The second conductive layer12includes, for example, at least one selected from the group consisting of W, Pt, Ta, Mo, TiN, TaN, and WN. The second conductive layer12may include, for example, at least one of Si or Ge.

The intermediate layer22is provided between the first conductive layer11and the second conductive layer12. The intermediate layer22includes an oxide. The oxide includes the second element and the third element. The third element is different from the second element. The second element is, for example, at least one selected from the group consisting of Ti, Ta, Hf, W, Mg, Al, and Zr. The third element is, for example, at least one of Si or Ge. The third element may be, for example, at least one selected from the group consisting of Hf, Al, Ta, W, Zr, Ti, and Mg. The second element is, for example, Ti. The third element is, for example, Si.

The intermediate layer22has a first position p11, a second position p12, a third position p13, a fourth position p14, and a fifth position p15. The second position p12is positioned between the first position p11and the second conductive layer12. The third position p13is positioned between the second position p12and the second conductive layer12. The fourth position p14is positioned between the second position p12and the third position p13. The fifth position p15is positioned between the second position p12and the fourth position p14.

The concentration of oxygen at the first position p11is higher than the concentration of oxygen at the second position p12. The concentration of oxygen at the third position p13is higher than the concentration of oxygen at the second position p12. The concentration of oxygen at the fourth position p14is lower than the concentration of oxygen at the third position p13. The concentration of oxygen at the fifth position p15is higher than the concentration of oxygen at the second position p12and higher than the concentration of oxygen at the fourth position p14.

On the other hand, the concentration of the second element at the first position p11is lower than the concentration of the second element at the second position p12. The concentration of the second element at the third position p13is lower than the concentration of the second element at the fourth position p14. The concentration of the second element at the fifth position p15is higher than the concentration of the second element at the second position p12and higher than the concentration of the second element at the fourth position p14.

The intermediate layer22includes a first region r11including the first position p11, a second region r12including the second position p12, a third region r13including the third position p13, a fourth region r14including the fourth position p14, and a fifth region r15including the fifth position p15. Each of the first region r11and the third region r13include, for example, SiO2. Each of the second region r12and the fourth region r14include, for example, SiO2-x(0<x<2). The fifth region r15includes, for example, TiO2.

In the embodiment, a titanium oxide layer is provided between two silicon oxide layers. In other words, the oxygen inside the first to fourth regions r11to r14is reduced by providing the fifth region r15between the second region r12and the fourth region r14. Thereby, the stress that is applied to the conducting filament formed in the intermediate layer22is reduced; and the retention characteristics of the conducting filament can be improved. Thereby, for example, stable operations can be performed even for a high bit density in which the size of the memory unit (the cell size) is small. According to the embodiment, the bit density can be increased.

Third Embodiment

FIG. 6is a schematic cross-sectional view illustrating a nonvolatile memory device according to a third embodiment.

As shown inFIG. 6, the nonvolatile memory device113according to the embodiment includes the first conductive layer11, the second conductive layer12, and an intermediate layer23.

The first conductive layer11includes the first element. The first element is, for example, at least one selected from the group consisting of Ag, Cu, Ni, Co, Ti, Al, and Au. The first element is, for example, Ag.

The second conductive layer12includes, for example, at least one selected from the group consisting of W, Pt, Ta, Mo, TiN, TaN, and WN. The second conductive layer12may include, for example, at least one of Si or Ge.

The intermediate layer23is provided between the first conductive layer11and the second conductive layer12. The intermediate layer23includes an oxide. The oxide includes the second element and the third element. The third element is different from the second element. The second element is, for example, at least one selected from the group consisting of Ti, Ta, Hf, W, Mg, Al, and Zr. The third element is, for example, at least one of Si or Ge. The third element may be, for example, at least one selected from the group consisting of Hf, Al, Ta, W, Zr, Ti, and Mg. The second element is, for example, Ti. The third element is, for example, Si.

The intermediate layer23includes a first region r21, a second region r22, and a third region r23. The second region r22is provided around the first region r21. The third region r23is provided between the first region r21and the second region r22. That is, the first region r21does not have a layer configuration and is buried inside the intermediate layer23in multiple particle configurations.

The concentration of oxygen in the first region r21is higher than the concentration of oxygen in the third region r23. The concentration of oxygen in the second region r22is higher than the concentration of oxygen in the third region r23. The concentration of the second element in the second region r22is lower than the concentration of the second element in the third region r23. The concentration of the second element in the first region r21is higher than the concentration of the second element in the third region r23. The second region r22includes, for example, SiO2. The third region r23includes, for example, SiO2-x(0<x<2). The first region r21includes, for example, TiO2.

In the embodiment, titanium oxide is buried in a particle configuration inside the silicon oxide layer. In other words, the oxygen that is inside the second and third regions r22and r23is reduced by providing the second and third regions r22and r23around the first region r21. Thereby, the stress that is applied to the conducting filament formed in the intermediate layer23is reduced; and the retention characteristics of the conducting filament can be improved. Thereby, for example, stable operations can be performed even for a high bit density in which the size of the memory unit (the cell size) is small. According to the embodiment, the bit density can be increased.

Fourth Embodiment

A nonvolatile memory device according to the embodiment is a cross-point memory. The stacked body10and modifications of the stacked body10described in reference to the first to third embodiments are used in the nonvolatile memory device according to the embodiment.

FIG. 7AtoFIG. 7Dare schematic perspective views illustrating nonvolatile memory devices according to the fourth embodiment.

In a nonvolatile memory device121according to the embodiment as shown inFIG. 7A, the first conductive layer11extends in the second direction. The second direction is the X-axis direction. For example, the X-axis direction is orthogonal to the Z-axis direction (the stacking direction). The second conductive layer12extends in the third direction. The third direction is the Y-axis direction. For example, the Y-axis direction is orthogonal to the X-axis direction and the Z-axis direction.

The intermediate layer21overlaps a portion of the first conductive layer11when projected onto a plane (the X-Y plane) perpendicular to the Z-axis direction. The intermediate layer21overlaps a portion of the second conductive layer12when projected onto the X-Y plane. The intermediate layer21overlaps a region where the first conductive layer11and the second conductive layer12overlap when projected onto the X-Y plane.

In the example, the first conductive layer11is one interconnect; and the second conductive layer12is one other interconnect. The intermediate layer21is provided at the positions where these interconnects cross.

As shown inFIG. 7B, a first interconnect41is provided in a nonvolatile memory device122. The first interconnect41extends in the X-axis direction. The second conductive layer12extends in the Y-axis direction. The intermediate layer21overlaps a portion of the second conductive layer12when projected onto the X-Y plane. The intermediate layer21and the first conductive layer11are provided between the first interconnect41and the second conductive layer12. The stacked body10overlaps a portion of the first interconnect41when projected onto the X-Y plane.

As shown inFIG. 7C, a second interconnect42is provided in a nonvolatile memory device123. The second interconnect42extends in the Y-axis direction. The first conductive layer11extends in the X-axis direction. The intermediate layer21overlaps a portion of the first conductive layer11when projected onto the X-Y plane. The intermediate layer21and the second conductive layer12are provided between the second interconnect42and the first conductive layer11. The stacked body10overlaps a portion of the second interconnect42when projected onto the X-Y plane.

As shown inFIG. 7D, the first interconnect41and the second interconnect42are provided in a nonvolatile memory device124. The first interconnect41extends in the X-axis direction. The second interconnect42extends in the Y-axis direction. The stacked body10is disposed between the first interconnect41and the second interconnect42. In other words, the first conductive layer11, the intermediate layer21, and the second conductive layer12are disposed between the first interconnect41and the second interconnect42.

In the embodiment, at least one of the first conductive layer11or the second conductive layer12may be used as an interconnect. An interconnect (at least one of the first interconnect41or the second interconnect42) may be provided separately from the first conductive layer11and the second conductive layer12.

The stacked film that includes the intermediate layer21may have a prism configuration or a circular columnar configuration (including a flattened circular configuration).

FIG. 8is a schematic plan view illustrating the nonvolatile memory device according to the fourth embodiment.

As shown inFIG. 8, multiple interconnects61and multiple interconnects62are provided in the nonvolatile memory device125. The multiple interconnects61are parallel to each other. The multiple interconnects62are parallel to each other. The direction in which the interconnects61extend crosses the direction in which the interconnects62extend. The interconnects61include, for example, the first conductive layer11or the first interconnect41. The interconnects62include, for example, the second conductive layer12or the second interconnect42. For example, the interconnects61are used as word lines. For example, the interconnects62are used as bit lines.

The multiple stacked bodies10(at least the intermediate layers21) are provided respectively at the crossing portions between the multiple interconnects61and the multiple interconnects62. The interconnects61and the interconnects62are connected to a controller63. One of the multiple stacked bodies10is set to a selected state by the interconnects and the interconnects62; and a desired operation is performed. The nonvolatile memory device125is a cross-point resistive random access memory.

A substrate64is provided in the nonvolatile memory device125. The interconnects61and the interconnects62are provided on the substrate64. The stacking order in the stacked body10is arbitrary. For example, the second conductive layer12may be disposed between the substrate64and the first conductive layer11. On the other hand, the first conductive layer11may be disposed between the substrate64and the second conductive layer12. The Z-axis direction of the stacked body10may cross the major surface of the substrate64.

The multiple stacked bodies10may be stacked. In other words, the embodiment is applicable to a cross-point memory having a three-dimensionally stacked structure.

According to the embodiments, a nonvolatile memory device can be provided in which the bit density can be increased.

Hereinabove, exemplary embodiments of the invention are described with reference to specific examples. However, the embodiments of the invention are not limited to these specific examples. For example, one skilled in the art may similarly practice the invention by appropriately selecting specific configurations of components included in nonvolatile memory devices such as first conductive layers, second conductive layers, intermediate layers, etc., from known art. Such practice is included in the scope of the invention to the extent that similar effects thereto are obtained.

Moreover, all nonvolatile memory devices practicable by an appropriate design modification by one skilled in the art based on the nonvolatile memory devices described above as embodiments of the invention also are within the scope of the invention to the extent that the spirit of the invention is included.