Method of manufacturing a coordinate detector

A method of manufacturing a coordinate detector having a resistive film and a common electrode for applying a voltage to the resistive film is disclosed that includes the steps of (a) applying a photoresist onto the resistive film formed on a substrate formed of an insulator; (b) forming a resist pattern on the resistive film by exposing the applied photoresist to light through a predetermined mask and subsequently developing the applied photoresist; (c) forming a resistive film removal region by removing a portion of the resistive film without the resist pattern; (d) removing the resist pattern after step (c); and (e) forming the common electrode over the resistive film removal region after step (d).

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates generally to methods of manufacturing a coordinate detector, and more particularly to a method of manufacturing a coordinate detector configured to detect the coordinates of an input position and output a signal corresponding to the coordinates of the input position.

2. Description of the Related Art

Examples of input devices for computer systems include touch panels. The touch panel is mounted on a display, and can detect a coordinate position on the display and obtain a detection signal corresponding to the coordinate position. The touch panel allows direct, simple, and intuitive inputting.

Various systems are proposed for touch panels, such as those using resistive films, those using optical imaging, and those using capacitive coupling. Commonly used are touch panels of a resistive-film type, which are simple in structure and easy to control. There are several types of low-resistance-system touch panels depending on the arrangement of electrodes on resistive films, such as a four-wire type, a five-wire type, and an eight-wire type.

Of those, compared with four-wire or eight-wire resistive-film touch panels, five-wire touch panels are free of the problem of edge sliding, which is a defect in the four-wire type and the eight-wire type, because the conductive film of the upper substrate placed on the operation surface side is used only for reading an electric potential. Therefore, five-wire touch panels are used in an environment of hard usage or where a long useful service life is desired.

The lower substrate12includes a glass substrate21and a transparent resistive film22formed on the entire surface of the glass substrate21. X-coordinate detection electrodes23and24for detecting coordinates of the x-axis and y-coordinate detection electrodes25and26for detecting coordinates of the y-axis are formed on the transparent resistive film22.

The upper substrate11includes a film substrate31and a transparent resistive film32formed on the film substrate31. A coordinate detection electrode33for detecting coordinates is formed on the transparent resistive film32.

First, application of voltage to the x-coordinate detection electrodes23and24causes a distribution of electric potential in the directions of the x-axis of the transparent resistive film22on the lower substrate12. At this point, the x-coordinate of a position where the upper substrate11contacts the lower substrate12can be detected by detecting the electric potential in the transparent resistive film22of the lower substrate12.

Next, application of voltage to the y-coordinate detection electrodes25and26causes a distribution of electric potential in the directions of the y-axis of the transparent resistive film22on the lower substrate12. At this point, the y-coordinate of the position where the upper substrate11contacts the lower substrate12can be detected by detecting the electric potential in the transparent resistive film22of the lower substrate12.

At this point, how to distribute electric potential uniformly in the transparent resistive film22of the lower substrate12becomes an issue in this type of touch panel. Patent Document 1 (listed below) discloses providing peripheral electric potential distribution correction patterns in multiple stages for a uniform distribution of electric potential in the transparent resistive film22of the lower substrate12.

Patent Document 2 (listed below) discloses providing a common electrode so as to encircle an input surface. Patent Document 3 (listed below) discloses forming an opening in an insulating film provided on a transparent resistive film and applying an electric potential through the opening.[Patent Document 1] Japanese Laid-Open Patent Application No. 10-83251[Patent Document 2] Japanese Laid-Open Patent Application No. 2001-125724[Patent Document 3] Japanese Laid-open Patent Application No. 2007-25904

It is desired that coordinate detectors have narrower frames because of reduction in the size of apparatuses on which coordinate detectors are to be mounted. However, it is difficult to narrow the frame of the coordinate detector described in Patent Document 1 because electric potential distribution correction patterns are provided in multiple stages in the periphery.

According to the method described in Patent Document 2, which provides a common electrode around the input surface, there is a problem in that the distribution of electric potential in the transparent resistive film is disturbed unless the ratio of the resistance of the transparent resistive film to the pattern resistance is high.

Further, according to the method described in Patent Document 3, which provides an opening in the insulating film that has been formed, the above-described problems can be solved, but the manufacturing process becomes complicated. In particular, variations in material resistances or variations in resistance during manufacture may cause a decrease in the yield of product manufacturing.

SUMMARY OF THE INVENTION

Embodiments of the present invention may solve or reduce one or more of the above-described problems.

According to one embodiment of the present invention, a method of manufacturing a coordinate detector is provided that can manufacture a narrow-frame coordinate detector with higher coordinate position detection accuracy with high yields.

According to one embodiment of the present invention, a method of manufacturing a coordinate detector having a resistive film and a common electrode for applying a voltage to the resistive film is provided that includes the steps of: (a) applying a photoresist onto the resistive film formed on a substrate formed of an insulator; (b) forming a resist pattern on the resistive film by exposing the applied photoresist to light through a predetermined mask and subsequently developing the applied photoresist; (c) forming a resistive film removal region by removing a portion of the resistive film without the resist pattern; (d) removing the resist pattern after step (c); and (e) forming the common electrode over the resistive film removal region after step (d).

According to one embodiment of the present invention, a method of manufacturing a coordinate detector having a resistive film and a common electrode for applying a voltage to the resistive film is provided that includes the steps of: (a) applying a photoresist onto the resistive film formed on a substrate formed of an insulator; (b) forming a resist pattern on the resistive film by exposing the applied photoresist to light through a predetermined mask and subsequently developing the applied photoresist; and (c) forming a resistive film removal region by removing a portion of the resistive film without the resist pattern, wherein the common electrode is formed between a peripheral edge of the resistive film and the resistive film removal region so that a distance between adjacent sides of the common electrode and the resistive film removal region is more than or equal to 0 mm and less than or equal to 5 mm.

According to one embodiment of the present invention, a method of manufacturing a coordinate detector having a resistive film and a common electrode for applying a voltage to the resistive film is provided that includes the steps of: (a) printing an etching paste on a portion of the resistive film formed on a substrate formed of an insulator, the portion being to be removed to form a resistive film removal region; (b) removing the portion of the resistive film with the etching paste by heat treatment; (c) removing the remaining etching paste after the heat treatment; and (d) forming the common electrode over the resistive film removal region.

According to one embodiment of the present invention, a method of manufacturing a coordinate detector having a resistive film and a common electrode for applying a voltage to the resistive film is provided that includes the steps of: (a) printing an etching paste on a portion of the resistive film formed on a substrate formed of an insulator, the portion being to be removed to form a resistive film removal region; (b) removing the portion of the resistive film with the etching paste by heat treatment; and (c) removing the remaining etching paste after the heat treatment, wherein the common electrode is formed between a peripheral edge of the resistive film and the resistive film removal region so that a distance between adjacent sides of the common electrode and the resistive film removal region is more than or equal to 0 mm and less than or equal to 5 mm.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

A description is given below, with reference to the accompanying drawings, of embodiments of the present invention.

(a) First Embodiment

A description is given of a first embodiment of the present invention. This embodiment relates to a method of manufacturing a coordinate detector. First, a description is given of a coordinate detector manufactured according to this embodiment.

FIG. 2is a diagram illustrating a system configuration in a coordinate detector according to this embodiment. In this embodiment, a description is given of a so-called five-wire analog resistive-film touch panel as a coordinate input system100. The coordinate input system100according to this embodiment includes a panel part111and an interface board112.

The panel part111includes a lower substrate121, an upper substrate122, a spacer123, and a flexible printed circuit (FPC) cable124. The lower substrate121and the upper substrate122are adhered through the spacer123. The spacer123, which is formed of an insulating double-faced tape or the like, bonds the lower substrate121and the upper substrate122together with a predetermined gap between the lower substrate121and the upper substrate122. The FPC cable124, which has first through five interconnects (not graphically illustrated) formed on a flexible printed board (not graphically illustrated), is connected to the lower substrate121by bonding an anisotropic conductive film thereto by thermocompression bonding.

Next, a description is given, with reference toFIGS. 3A through 3E, of a configuration of the lower substrate121.

FIG. 3Ais a plan view of the lower substrate121.FIG. 3Bis a cross-sectional view of the lower substrate121taken along the line A-A ofFIG. 3A.FIG. 3Cis a cross-sectional view of the lower substrate121taken along the line B-B ofFIG. 3A.FIG. 3Dis a cross-sectional view of the lower substrate121taken along the line C-C ofFIG. 3A.FIG. 3Eis a cross-sectional view of the lower substrate121taken along the line D-D ofFIG. 3A.

The lower substrate121includes a glass substrate131, a transparent resistive film132, resistive film removal regions133, a common electrode134, a first insulating film135, interconnects136-1,136-2,136-3, and136-4, and a second insulating film137. The interconnects136-1through136-4may also be denoted collectively by reference numeral136.

The transparent resistive film132is formed over the substantially entire surface of the glass substrate131. The transparent resistive film132, which is formed by depositing ITO (Indium Tin Oxide) or the like by a method such as vacuum evaporation, is a film that transmits visible light and has a predetermined resistance. According to this embodiment, all of the transparent resistive film132may be, but does not have to be, removed in the resistive film removal regions133. That is, the transparent resistive film132may be partly removed in the resistive film removal regions133. The electrical insulation between the transparent resistive film132remaining inside the resistive film removal region133and the transparent resistive film132outside the resistive film removal region133may be provided by removing a portion of the transparent resistive film132in the periphery of the resistive film removal region133. Thus, the resistive film removal region133may be formed of, for example, a linear region where the transparent resistive film132is absent and the transparent resistive film132surrounded by, or inside, the linear region. InFIGS. 3B through 3E, reference numeral133denotes this linear region for convenience of graphical representation.

By thus providing electrical insulation between the transparent resistive film132inside the resistive film removal region133and the transparent resistive film132outside the resistive film removal region133, the same effect as in the case of removing the entire transparent resistive film132inside the resistive film removal region133can be produced. Compared with the case of removing the entire transparent resistive film132inside the resistive film removal region133, the throughput increases because the transparent resistive film132removed is reduced in amount.

The resistive film removal regions133are provided in regions where the common electrode134is formed in the peripheral part of the glass substrate131. The common electrode134is formed on the transparent resistive film132where the resistive film removal regions133are formed. As a result, the common electrode134and the transparent resistive film132between each adjacent two of the resistive film removal regions133are connected to form electric potential application parts141.

According to this embodiment, as illustrated inFIG. 4A, the resistive film removal regions133are formed at equal intervals W. That is, as described below, the electric potential application parts141, each formed between corresponding adjacent two of the resistive film removal regions133, are formed with the same width. The resistive film removal regions133are formed at a relatively wide (large) pitch around the ends of each of a first side171-1, a second side171-2, a third side171-3, and a fourth side171-4of the lower substrate121, and the pitch becomes narrower (smaller) toward the center of each of the first through fourth sides171-1through171-4. For example, the resistive film removal regions133are formed at a pitch that varies (narrows) from P1to P2to P3to P4. . . (P1>P2>P3>P4. . . ) from each end toward the center as illustrated inFIG. 4A.

Each electric potential application part141is formed in the contact region of the transparent resistive film132and the common electrode134between corresponding adjacent two of the resistive film removal regions133. According to this embodiment, referring toFIG. 4B, the electric potential application parts141are formed at a relatively wide (large) pitch around the ends of each of the first side171-1, the second side171-2, the third side171-3, and the fourth side171-4of the lower substrate121, and are formed at a relatively narrow (small) pitch in the center of each of the first through fourth sides171-1through171-4. This configuration reduces the distortion of a distribution of electric potential in the first side171-1, the second side171-2, the third side171-3, and the fourth side171-4, where the distribution of electric potential is likely to be distorted inward greatly, thus enabling a uniform distribution of electric potential in the transparent resistive film132. As a result, it is possible to detect coordinate positions with greater accuracy.

The shape of the electric potential application parts141is not limited to the shape illustrated inFIG. 4B. For example, the contact area of the transparent resistive film132and the common electrode134may be varied by removing part of the transparent resistive film132so as to narrow (decrease) toward the ends and widen (increase) toward the center of each of the first side171-1, the second side171-2, the third side171-3, and the fourth side171-4of the lower substrate121.

The common electrode, which is formed of, for example, Ag—C, is formed in the resistive film removal regions133and on the transparent resistive film132between each adjacent two of the resistive film removal regions133.

The first insulating film135is stacked (formed) on the resistive film removal regions133so as to cover the common electrode134. A first through hole151-1, a second through hole151-2, a third through hole151-3, and a fourth through hole151-4are formed in the first insulating film135at the corresponding (four) corners of the lower substrate121. The first through fourth through holes151-1through151-4form a drive voltage application part.

The first interconnect136-1, which is formed of, for example, a low resistance material such as Ag, is formed on the first insulating film135along the first side171-1of the lower substrate121. The first interconnect136-1is formed so as to fill in the first through hole151-1formed in the first insulating film135. Further, the first interconnect136-1is connected to the first interconnect of the FPC cable124(FIG. 2).

The second interconnect136-2, which is formed of, for example, a low resistance material such as Ag, is formed on the first insulating film135along the second side171-2, opposed to the first side171-1, of the lower substrate121. The second interconnect136-2is formed so as to fill in the second through hole151-2formed in the first insulating film135. Further, the second interconnect136-2is connected to the second interconnect of the FPC cable124(FIG. 2).

The third interconnect136-3, which is formed of, for example, a low resistance material such as Ag, is formed on the first insulating film135along the half of the third side171-3, perpendicular to the first side171-1and the second side171-2, of the lower substrate121, which half is on the side of the second side171-2. The third interconnect136-3is formed so as to fill in the third through hole151-3formed in the first insulating film135. Further, the third interconnect136-3is connected to the third interconnect of the FPC cable124(FIG. 2).

The fourth interconnect136-4, which is formed of, for example, a low resistance material such as Ag, is formed on the first insulating film135along the half of the third side171-3, perpendicular to the first side171-1and the second side171-2, of the lower substrate121, which half is on the side of the first side171-1. The fourth interconnect136-4is formed so as to fill in the fourth through hole151-4formed in the first insulating film135. Further, the fourth interconnect136-4is connected to the fourth interconnect of the FPC cable124(FIG. 2).

The second insulating film137is formed on the first insulating film135so as to cover the first interconnect136-1, the second interconnect136-2, the third interconnection136-3, and the fourth interconnect136-4. Further, the upper substrate122is bonded to (the upper surface of) the second insulating film137through the spacer123(FIG. 2).

Next, a description is given, with reference toFIGS. 5A and 5B, of a configuration of the upper substrate122.

FIG. 5Ais a plan view of the upper substrate122.FIG. 5Bis a cross-sectional view of the upper substrate122.

The upper substrate122includes a film substrate211, a transparent resistive film212, and an electrode213. The film substrate211is formed of, for example, a flexible resin film such as a polyethylene terephthalate (PET) film. The transparent resistive film212is formed over the entire surface of the film substrate211on the side facing toward the lower substrate121. The transparent resistive film212is formed of a transparent conductive material such as ITO. The electrode213is placed at the X1end on the transparent resistive film212of the upper substrate122. The electrode213is connected to the fifth interconnect of the FPC cable124(FIG. 2), which is connected to the lower substrate121through a contact (not graphically illustrated). Coordinate positions are detected by detecting the electric potential of the lower substrate121with the interface board112(FIG. 2) using this upper substrate122as a probe.

Next, a description is given of a process for detecting a coordinate position in a coordinate detector according to this embodiment.

FIG. 6is a flowchart showing processing performed by the interface board112.FIGS. 7A and 7Bare diagrams illustrating electric potential distributions of the lower substrate121.FIG. 7Ais a diagram illustrating an electric potential distribution at the time of detecting an x-coordinate, andFIG. 7Bis a diagram illustrating an electric potential distribution at the time of detecting a y-coordinate.

In step S1-1, the interface board112applies a voltage Vx to the first interconnect136-1and the second interconnect136-2, and grounds the third interconnect136-3and the fourth interconnect136-4. Thereby, a uniform electric potential distribution can be generated in the transparent resistive film132as indicated by broken lines inFIG. 7A. The conventional electric potential distribution is distorted as indicated by single-dot chain lines inFIG. 7A. Therefore, according to this embodiment, it is possible to detect an exact x-coordinate.

Next, in step S1-2, the interface board112detects the electric potential of the lower substrate121. Then, in step S1-3, the interface board112detects an x-coordinate corresponding to the electric potential of the lower substrate121.

Next, in step S1-4, the interface board112applies a voltage Vy to the first interconnect136-1and the fourth interconnect136-4, and grounds the second interconnect136-2and the third interconnect136-3. Thereby, a uniform electric potential distribution can be generated in the transparent resistive film132as indicated by broken lines inFIG. 7B. The conventional electric potential distribution is distorted as indicated by single-dot chain lines inFIG. 7B. Therefore, according to this embodiment, it is possible to detect an exact y-coordinate.

Next, in step S1-5, the interface board112detects the electric potential of the lower substrate121. Then, in step S1-6, the interface board112detects a y-coordinate corresponding to the electric potential of the lower substrate121.

According to this embodiment, the interconnects136-1through136-4are stacked over the common electrode134. Accordingly, it is possible to reduce the frame size of the panel part111. Further, the electric potential application parts141enable the electric potential applied to the transparent resistive film132of the lower substrate121at the time of detecting an x-coordinate or a y-coordinate to be distributed uniformly in the detection region. Accordingly, it is possible to detect coordinates with greater accuracy.

Next, a description is given of a method of manufacturing a coordinate detector according to this embodiment. Specifically, a description is given, with reference toFIGS. 8A through 8H, of a method of manufacturing the lower substrate121.

First, as illustrated inFIG. 8A, the transparent resistive film132of ITO or the like is formed on the glass substrate131by a process such as sputtering or vacuum evaporation.

Next, as illustrated inFIG. 8B, a resist pattern138is formed on the transparent resistive film132. For example, photoresist is applied onto the transparent resistive film132with a spin coater or the like. Thereafter, the photoresist is prebaked, exposed to light with an exposure unit, and developed. Thereby, the resist pattern138is formed. This resist pattern138has openings on regions of the transparent resistive film132, which regions are to be removed to form the resistive film removal regions133.

Next, as illustrated inFIG. 8C, chemical etching is performed using an acid solution such as a hydrochloric acid or a phosphoric acid solution. This process is also called wet etching. By this process, the transparent resistive film132is removed below the openings of the resist pattern138. In this embodiment, the transparent resistive film132can also be removed by dry etching such as RIE (Reactive Ion Etching) in the same manner as by wet etching.

Next, as illustrated inFIG. 8D, the resist pattern138is removed with an organic solvent or the like. As a result, the transparent resistive film132having the resistive film removal regions133formed therein is formed on the glass substrate131.

Next, as illustrated inFIG. 8E, the common electrode134of Ag—C is formed on the transparent resistive film132where the resistive film removal regions133are formed. For example, the common electrode134is formed by printing a pattern of paste including Ag—C by screen printing and thereafter baking the paste. As a result, the electric potential application part141is formed on the transparent resistive film132between each adjacent two of the resistive film removal regions133.

Next, as illustrated inFIG. 8F, the first insulating film135having the first through fourth through holes151-1through151-4is formed. For example, the first insulating film135is formed by printing a pattern of insulating paste by screen printing and thereafter baking the insulating paste.

Next, as illustrated inFIG. 8G, the first through fourth Ag interconnects136-1through136-4are formed on the first insulating film135. For example, the first through fourth Ag interconnects136-1through136-4are formed by printing patterns of conductive paste including Ag by screen printing and thereafter baking the conductive paste.

Next, as illustrated inFIG. 8H, the second insulating film137is formed. For example, the second insulating film137is formed by printing a pattern of insulating paste by screen printing and thereafter baking the insulating paste.

In this embodiment, a description is given of a five-wire resistive-film analog touch panel. However, this embodiment is not limited to this, and is also applicable to other types of touch panels such as four-wire resistive-film touch panels or seven-wire resistive-film touch panels.

(b) Second Embodiment

A description is given of a second embodiment of the present invention. This embodiment relates to a method of manufacturing a coordinate detector, and specifically to a method of manufacturing the above-described lower substrate121using etching paste. A description is given below, with reference toFIGS. 9A through 9G, of this embodiment.

First, as illustrated inFIG. 9A, a transparent resistive film232of ITO or the like is formed on a glass substrate231by a process such as sputtering or vacuum evaporation.

Next, as illustrated inFIG. 9B, etching paste238is formed on the transparent resistive film232. For example, this etching paste238is formed by a printing process such as screen printing. The etching paste238is formed on resistive film removal regions233described below.

Next, as illustrated inFIG. 9C, the etching paste238is removed after heat treatment. For example, the transparent resistive film232is removed by heat treatment where the etching paste238is formed. Thereafter, the remaining etching paste238is removed by cleaning. As a result, the transparent resistive film232having the resistive film removal regions233formed therein is formed on the glass substrate231.

Next, as illustrated inFIG. 9D, a common electrode234of Ag—C is formed on the transparent resistive film232where the resistive film removal regions233are formed. For example, the common electrode234is formed by printing a pattern of paste including Ag—C by screen printing and thereafter baking the paste. As a result, an electric potential application part241is formed on the transparent resistive film232between each adjacent two of the resistive film removal regions233.

Next, as illustrated inFIG. 9E, a first insulating film235having first through fourth through holes251-1,251-2,251-3, and251-4is formed. For example, the first insulating film235is formed by printing a pattern of insulating paste by screen printing and thereafter baking the insulating paste.

Next, as illustrated inFIG. 9F, first through fourth Ag interconnects236-1,236-2,236-3, and236-4are formed on the first insulating film235. For example, the first through fourth interconnects236-1through236-4are formed by printing patterns of conductive paste including Ag by screen printing and thereafter baking the conductive paste.

Next, as illustrated inFIG. 9G, a second insulating film237is formed. For example, the second insulating film237is formed by printing a pattern of insulating paste by screen printing and thereafter baking the insulating paste.

Thereby, the lower substrate121can be manufactured. The lower substrate121thus manufactured according to this embodiment can also be used as the lower substrate121of the coordinate detector of the first embodiment as in the case of the first embodiment.

A description is given of a third embodiment. The present embodiment relates to a method of manufacturing a coordinate detector, and specifically to a method of manufacturing the above-described lower substrate121. A description is given below, with reference toFIGS. 10A through 10D, of this embodiment.FIGS. 10A through 10Dare plan views of the lower substrate121, illustrating its manufacturing process according to this embodiment.

First, as illustrated inFIG. 10A, a common electrode334is formed on a transparent resistive film332of ITO or the like, which is formed on a glass substrate (not graphically illustrated) by a process such as sputtering or vacuum evaporation. For example, the common electrode334is formed by printing a pattern of paste including Ag—C by screen printing and thereafter baking the paste.

Next, as illustrated inFIG. 10B, a resist pattern338is formed on the transparent resistive film332. For example, photoresist is applied onto the transparent resistive film332with a spin coater or the like. Thereafter, the photoresist is prebaked, exposed to light with an exposure unit, and developed. Thereby, the resist pattern338is formed. The resist pattern338has openings on regions of the transparent resistive film332, which regions are to be removed to form resistive film removal regions333described below. The resistive film removal regions333are to be formed inside the common electrode334, which is provided to extend along the peripheral edge of the transparent resistive film332(or of the glass substrate), so that a distance S (FIG. 10D) between the adjacent sides of the common electrode334and each resistive film removal region333, that is, between the internal side of the common electrode334and a side of each resistive film removal region333facing toward the internal side of the common electrode334, is more than or equal to 0 mm and less than or equal to 5 mm (0 mm≦S≦5 mm).

Next, as illustrated inFIG. 10C, chemical etching is performed using an acid solution such as a hydrochloric acid or a phosphoric acid solution. This process is also called wet etching. By this process, the transparent resistive film332is removed below the openings of the resist pattern338, so that the resistive film removal regions333are formed. In this embodiment, the transparent resistive film332can also be removed by dry etching such as RIE in the same manner as by wet etching.

Next, as illustrated inFIG. 10D, the resist pattern338is removed with an organic solvent or the like. As a result, the transparent resistive film332having the resistive film removal regions333formed therein is formed on the glass substrate.

The lower substrate121can be manufactured by subsequently forming the first insulating film135, the first through fourth interconnects136-1through136-4, the second insulating film137, etc., in the same manner as in the first embodiment. The lower substrate121thus manufactured according to this embodiment can also be used as the lower substrate121of the coordinate detector of the first embodiment as in the case of the first embodiment. In the lower substrate121manufactured according to this embodiment, the common electrode334is not formed over the resistive film removal regions333. However, the electric potential can be distributed uniformly in the transparent resistive film332as in the first embodiment by forming the resistive film removal regions333inside the common electrode334. The distance S between the adjacent sides of the common electrode334and the resistive film removal regions333is more than or equal to 0 mm and less than or equal to 5 mm (0 mm≦S≦5 mm), so that this effect is produced.

A description is given of a fourth embodiment of the present invention. The present invention relates to a method of manufacturing a coordinate detector, and specifically to a method of manufacturing the above-described lower substrate121. A description is given below, with reference toFIGS. 11A through 11C, of this embodiment.FIGS. 11A through 11Care plan views of the lower substrate121, illustrating its manufacturing process according to this embodiment.

First, as illustrated inFIG. 11A, a resist pattern438is formed on a transparent resistive film432of ITO or the like, which is formed on a glass substrate (not graphically illustrated) by a process such as sputtering or vacuum evaporation. For example, photoresist is applied onto the transparent resistive film432with a spin coater or the like. Thereafter, the photoresist is prebaked, exposed to light with an exposure unit, and developed. Thereby, the resist pattern438is formed. The resist pattern438has openings on regions of the transparent resistive film432, which regions are to be removed to form resistive film removal regions433described below. The resistive film removal regions433are to be formed inside a below-described common electrode434, which is provided to extend along the peripheral edge of the transparent resistive film432(or of the glass substrate), so that a distance S (FIG. 11C) between the adjacent sides of the common electrode434and each resistive film removal region433, that is, between the internal side of the common electrode434and a side of each resistive film removal region433facing toward the internal side of the common electrode434, is more than or equal to 0 mm and less than or equal to 5 mm (0 mm≦S≦5 mm).

Next, as illustrated inFIG. 11B, chemical etching is performed using an acid solution such as a hydrochloric acid or a phosphoric acid solution. This process is also called wet etching. By this process, the transparent resistive film432is removed below the openings of the resist pattern438, so that the resistive film removal regions433are formed. In this embodiment, the transparent resistive film432can also be removed by dry etching such as RIE in the same manner as by wet etching.

Next, as illustrated inFIG. 11C, the resist pattern438is removed with an organic solvent or the like, and thereafter, the common electrode434is formed. For example, the common electrode434is formed by printing a pattern of paste including Ag—C by screen printing and thereafter baking the paste. As a result, the transparent resistive film432having the resistive film removal regions433formed therein is formed on the glass substrate.

The lower substrate121can be manufactured by subsequently forming the first insulating film135, the first through fourth interconnects136-1through136-4, the second insulating film137, etc., in the same manner as in the first embodiment. The lower substrate121thus manufactured according to this embodiment can also be used as the lower substrate121of the coordinate detector of the first embodiment as in the case of the first embodiment. In the lower substrate121manufactured according to this embodiment, the common electrode434is not formed over the resistive film removal regions433. However, the electric potential can be distributed uniformly in the transparent resistive film432as in the first embodiment by forming the resistive film removal regions433inside the common electrode434. The distance S between the adjacent sides of the common electrode434and the resistive film removal regions433is more than or equal to 0 mm and less than or equal to 5 mm (0 mm≦S≦5 mm), so that this effect is produced.

A description is given of a fifth embodiment of the present invention. This embodiment relates to a method of manufacturing a coordinate detector, and specifically to a method of manufacturing the above-described lower substrate121. A description is given below, with reference toFIGS. 12A through 12C, of this embodiment.FIGS. 12A through 12Care top plan views of the lower substrate121, illustrating its manufacturing process according to this embodiment.

First, as illustrated inFIG. 12A, a common electrode534is formed on a transparent resistive film532of ITO or the like, which is formed on a glass substrate (not graphically illustrated) by a process such as sputtering or vacuum evaporation. For example, the common electrode534is formed by printing a pattern of paste including Ag—C by screen printing and thereafter baking the paste.

Next, as illustrated inFIG. 12B, etching paste538is formed on the transparent resistive film532. For example, this etching paste538is formed by a printing process such as screen printing. The etching paste538is formed on resistive film removal regions533described below. The etching paste538is formed inside the common electrode534, which is provided to extend along the peripheral edge of the transparent resistive film532(or of the glass substrate), so that a distance S (FIG. 12C) between the adjacent sides of the common electrode534and each resistive film removal region533, that is, between the internal side of the common electrode534and a side of each resistive film removal region533facing toward the internal side of the common electrode534, is more than or equal to 0 mm and less than or equal to 5 mm (0 mm≦S≦5 mm).

Next, as illustrated inFIG. 12C, the transparent resistive film532is removed by heat treatment where the etching paste538is formed. Thereafter, the remaining etching paste538is removed by cleaning. As a result, the transparent resistive film532having the resistive film removal regions533formed therein is formed on the glass substrate.

The lower substrate121can be manufactured by subsequently forming the first insulating film135, the first through fourth interconnects136-1through136-4, the second insulating film137, etc., in the same manner as in the first embodiment. The lower substrate121thus manufactured according to this embodiment can also be used as the lower substrate121of the coordinate detector of the first embodiment as in the case of the first embodiment. In the lower substrate121manufactured according to this embodiment, the common electrode534is not formed over the resistive film removal regions533. However, the electric potential can be distributed uniformly in the transparent resistive film532as in the first embodiment by forming the resistive film removal regions533inside the common electrode534. The distance S between the adjacent sides of the common electrode534and the resistive film removal regions533is more than or equal to 0 mm and less than or equal to 5 mm (0 mm≦S≦5 mm), so that this effect is produced.

A description is given of a sixth embodiment of the present invention. This embodiment relates to a method of manufacturing a coordinate detector, and specifically to a method of manufacturing the above-described lower substrate121. A description is given below, with reference toFIGS. 13A through 13C, of this embodiment.FIGS. 13A through 13Care plan views of the lower substrate121, illustrating its manufacturing process according to this embodiment.

First, as illustrated inFIG. 13A, etching paste638is formed on a transparent resistive film632of ITO or the like, which is formed on a glass substrate (not graphically illustrated) by a process such as sputtering or vacuum evaporation. For example, this etching paste638is formed by a printing process such as screen printing. The etching paste638is formed on resistive film removal regions633described below. The etching paste638is formed inside a below-described common electrode634, which is provided to extend along the peripheral edge of the transparent resistive film632(or of the glass substrate), so that a distance S (FIG. 13C) between the adjacent sides of the common electrode634and each resistive film removal region633, that is, between the internal side of the common electrode634and a side of each resistive film removal region633facing toward the internal side of the common electrode634, is more than or equal to 0 mm and less than or equal to 5 mm (0 mm≦S≦5 mm).

Next, as illustrated inFIG. 13B, the transparent resistive film632is removed by heat treatment where the etching paste638is formed. Thereafter, the remaining etching paste638is removed by cleaning. As a result, the transparent resistive film632having the resistive film removal regions633formed therein is formed on the glass substrate.

Next, as illustrated inFIG. 13C, the common electrode634is formed on the transparent resistive film632having the resistive film removal regions633formed therein. For example, the common electrode634is formed by printing a pattern of paste including Ag—C by screen printing and thereafter baking the paste.

The lower substrate121can be manufactured by subsequently forming the first insulating film135, the first through fourth interconnects136-1through136-4, the second insulating film137, etc., in the same manner as in the first embodiment. The lower substrate121thus manufactured according to this embodiment can also be used as the lower substrate121of the coordinate detector of the first embodiment as in the case of the first embodiment. In the lower substrate121manufactured according to this embodiment, the common electrode634is not formed over the resistive film removal regions633. However, the electric potential can be distributed uniformly in the transparent resistive film632as in the first embodiment by forming the resistive film removal regions633inside the common electrode634. The distance S between the adjacent sides of the common electrode634and the resistive film removal regions633is more than or equal to 0 mm and less than or equal to 5 mm (0 mm≦S≦5 mm), so that this effect is produced.

According to one embodiment of the present invention, by way of example, there is provided a method of manufacturing a coordinate detector having a resistive film and a common electrode for applying a voltage to the resistive film, wherein an electric potential is applied from the common electrode to the resistive film to cause the electric potential to be distributed in the resistive film and the coordinates of a contact position of the resistive film is detected by detecting the electric potential of the contact position of the resistive film. The method includes the steps of: (a) applying a photoresist onto the resistive film formed on a substrate formed of an insulator; (b) forming a resist pattern on the resistive film by exposing the applied photoresist to light through a predetermined mask and subsequently developing the applied photoresist; (c) forming a resistive film removal region by removing a portion of the resistive film without the resist pattern; (d) removing the resist pattern after step (c); and (e) forming the common electrode over the resistive film removal region after step (d).

Thus, according to one aspect of the present invention, coordinate detectors capable of uniformly distributing the electric potential of a transparent resistive film can be manufactured with high yields by removing part of the transparent resistive film.

The present application is based on Japanese Priority Patent Application No. 2008-128139, filed on May 15, 2008, the entire contents of which are hereby incorporated by reference.