Time division duplex front end module

An RF module adapted for direct surface mounting to the top surface of the front end of the motherboard of a wireless base station such as, for example, a femtocell. The module comprises a printed circuit board having a plurality of direct surface mounted electrical components defining respective signal transmit and receive sections for RF signals. The signal transmit section is defined by at least a power amplifier, a coupler, and a lowpass filter. The signal receive section is defined by at least a receive bandpass filter and a low-noise amplifier. A lid covers selected ones of the electrical components except for at least the power amplifier. An RF switch is located between and interconnects the respective transmit and receive sections to an antenna pin.

FIELD OF THE INVENTION

The invention relates to a module and, more particularly, to a time division duplex radio frequency (RF) module adapted for use on the front end of a cellular base station such as, for example, a WiMax wireless femtocell communication base station.

BACKGROUND OF THE INVENTION

There are currently four types of cellular/wireless communication base stations or systems in use today for the transmission and reception of W-CDMA, UMTS, and WiMax based cellular/wireless communication signals, i.e., macrocells, microcells, picocells, and femtocells. Macrocells, which today sit atop cellular/wireless towers, operate at approximately 1,000 watts. The coverage of macrocells is in miles. Microcells, which are smaller in size than macrocells, are adapted to sit atop telephone poles, for example, and the coverage is in blocks. Microcells operate at approximately 20 watts. A smaller yet microcell requires about 5 watts of power to operate. Picocells are base stations approximately 8″×18″ in size, are adapted for deployment inside buildings such as shopping malls, office buildings or the like, and output about 0.25 watts of power. The coverage of a picocell is about 50 yards. Femtocells output about 0.10 watts of power and are used in the home.

All of the picocells and microcells in use today include a “motherboard” upon which various electrical components have been individually mounted by the customer. A front end portion of the motherboard (i.e., the RF transceiver section thereof located roughly between the picocell antenna and mixers thereof) is currently referred to in the art as the “node B local area front end,” i.e., a portion of the femtocell, picocell, or microcell on which all the radio frequency control electrical components such as, for example, the filters, amplifiers, couplers, inductors and the like have been individually mounted and interconnected.

While the configuration and structure of the current motherboards has proven satisfactory for most applications, certain disadvantages associated with the current front end RF configuration thereof include performance, the costs associated with a customer's placement of individual RF components onto the motherboard during assembly, and the space which such RF components occupy on such motherboards.

There thus remains the need for increased RF component performance and a reduction in both the cost of these motherboards and the space occupied by the RF components on such motherboards. The present invention provides a compact front end RF component module particularly adapted and structured for the transmission and reception of WiMax signals which addresses and solves the above-identified needs.

SUMMARY OF THE INVENTION

The present invention relates generally to a radio frequency (RF) module adapted for use on the front end of a wireless base station such as a femtocell, picocell, or microcell base station. The RF module includes a printed circuit board/substrate having a plurality of electrical components mounted directly thereto and adapted to allow for the transmission and reception of wireless signals between the antenna of the cell on one end and the respective input and output pads on the motherboard of the cell at the other end.

A first section on the printed circuit board/substrate defines a transmit path for RF signals and includes at least the following electrical components mounted thereon: a power amplifier, a coupler and a lowpass filter.

The module includes a second section on the printed circuit board/substrate which defines a receive path for RF signals and includes at least the following electrical components mounted thereon: a receive bandpass filter and a low-noise amplifier.

An RF single pole double throw (SPDT) switch is located between and interconnects the respective transmit (Tx) and receive (Rx) sections to an antenna pin.

A lid is adapted to cover selected ones of the electrical components mounted to the printed circuit board. At least the power amplifier is preferably located outside the lid. A plurality of through-holes or vias located below the amplifier are adapted to define a sink for heat created by the power amplifier.

Other advantages and features of the present invention will be more readily apparent from the following detailed description of the preferred embodiment of the invention, the accompanying drawings, and the appended claims.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

While this invention is susceptible to embodiments in many different forms, this specification and the accompanying FIGURES disclose only one preferred simplified embodiment as an example of the present invention which is adapted for use in a picocell. The invention is not intended, however, to be limited to the embodiment so described and extends, for example, to femtocells and microcells as well.

FIG. 1is a simplified block diagram of the RF (radio frequency) front end module, generally designated20, constructed in accordance with the present invention and adapted for use in connection with a wireless base station including, for example, a WiMax femtocell, picocell, or microcell.

As described in more detail below, the TDD (time division duplex) WiMax front end module20utilizes filtering with two filters: a receive Rx bandpass filter36, and a transmit Tx lowpass filter28. The module20also includes a power amplifier (PA)26, a low-noise amplifier (LNA)39and other appropriate RF components. In the embodiment shown, all of the appropriate RF components are of the discrete surface-mountable type.

Module20is adapted to replace all of the discrete RF components that would be typically individually mounted and used in a WiMax Node B local area front end. Module20allows customers to select different values for receiver sensitivity, selectivity, and output power. Moreover, module20is RoHS compliant and lead-free. Some of the features of the module20as introduced above and described in more detail below include the scalable power amplifier26capable of delivering about 25 dBm at the antenna port; the above-identified filters28and36offering excellent isolation and harmonic suppression; and the low noise amplifier39.

Table 1 below summarizes the proposed operational parameters and characteristics of the time division duplex front end module of the present invention:

Referring now in particular toFIG. 1, it is understood that module20is defined by a plurality of RF electrical components and pins associated with a substrate22and defining respective RF signal transmit and receive sections or paths. Initially, and as shown inFIG. 1, the lower RF transmit section or path of module20includes a first Tx (transmit) signal input pin17adapted to be coupled to a corresponding Tx (transmit) signal pad on the motherboard (not shown) of a picocell or microcell. Pin17in turn is coupled to a Tx PA (transmit power amplifier)26which, in turn, is coupled to a coupler30which, in turn, is coupled to a Tx LPF (transmit low pass filter)28.

VPA (power amplifier supply voltage) is adapted to be supplied to power amplifier26through pin15. PA bias is adapted to be measured through pin1coupled to power amplifier26. In accordance with the present invention, a portion of the transmit signal is split off from coupler30and passed to a power detect pin3. The Tx LPF28is, in turn, coupled to an RF SPDT (single pole double throw) switch29. The switch29, in turn, is coupled to an antenna via antenna pin11. Voltage is supplied to the module20through the V supply (voltage supply) pin9coupled to switch29. The voltage supplied to module20is controlled via and through VCTRL(voltage control) pin13, also coupled to the switch29. In another embodiment, the VCTRLpin13can be omitted and the switching function can be facilitated with the use of only one voltage input pin (i.e., pin9).

All of the pins associated with the substrate22, including antenna pin11, extend between the top and bottom surfaces of the module20and are adapted to be direct surface mounted into coupling relationship with corresponding pads (not shown) of a picocell or microcell such as, for example, the antenna pad thereof to allow for the transmission of the signals which have passed through the RF signal transmission section of module20.

Referring toFIGS. 1-4, it is thus understood that the Tx (transmit) RF wireless signal is adapted to travel from the femtocell/picocell/microcell motherboard into and up through the substrate22of module20via Tx input pin17extending between the lower and upper substrate surfaces, and then from Tx input pin17into and through power amplifier26, coupler30, lowpass filter28, switch29, antenna pin11, and then back down through the substrate22via antenna pin11extending between the upper and lower substrate surfaces and into the motherboard antenna pad in direct surface contact with module antenna pin11.

The top receive section or path of the signals being received (i.e., Rx signals) from the femtocell, picocell, or microcell antenna (not shown) and transmitted through the module20will now be described also with reference toFIGS. 1-4which shows the Rx signal being transmitted and passed in a left to right, clockwise direction from the picocell or microcell antenna (not shown) through the module antenna pin11and then initially through the switch29.

Switch29is, of course, adapted and structured as known in the art to allow the same to switch from the passage of Tx signals out of the module20through the antenna pin11to the passage of Rx signals into and through the module20from the antenna pin11. Thus, and as shown inFIG. 1, the Rx signal is adapted to pass and travel in a general clockwise direction through the switch29and into Rx bandpass filter36and LNA (low noise amplifier)39. Voltage is supplied to low noise amplifier39via LNA supply voltage pin8coupled thereto.

From the low-noise amplifier39, the Rx signal then passes through Rx O/P (output) signal pin7which, in turn, is adapted to extend between the front and back surfaces23and27of the module20for direct surface coupling to the corresponding Rx output signal pad (not shown) on the motherboard of the picocell or microcell.

FIGS. 2-4depict one simplified embodiment of a module20adapted and structured to be direct surface mounted to the front end of a WiMax TDD (time division duplex) femtocell, picocell, or microcell. It is understood, however, that the module embodiment ofFIGS. 2-4differs from the module embodiment ofFIG. 1in that, in theFIGS. 2-4embodiment, PA power is detected through the use of a VDET pin3instead of a coupler as in theFIG. 1embodiment.

By way of background, it is understood that module20of the present invention as depicted inFIGS. 2-4measures about 19.0 mm in width, 27.0 mm in length, and 6.0 mm max. in height (with the lid secured thereon), and is adapted to be mounted to the motherboard of a WiMax picocell measuring about 8 inches by 18 inches which, as described above, is adapted for use as a wireless signal transfer base station inside a building such as a shopping mall or office complex.

In accordance with the present invention and referring toFIGS. 2-4, module20initially comprises a printed circuit board or substrate22which, in the embodiment shown, is preferably made of multiple layers of GETEK® or the like dielectric material and is about 1 mm (i.e., 0.040 inches) in thickness. Although not shown in any of the FIGURES, it is understood that predetermined regions of both the upper and lower surfaces23and27of the substrate22are covered with copper or the like material and solder mask material, both of which have been applied thereto and/or selectively removed therefrom as is known in the art to create the desired copper, dielectric, and solder mask regions and electrical circuits which interconnect the various electrical components. The metallization system is preferably ENIG, electroless nickel/immersion gold over copper.

A lid45(FIG. 2), which is adapted to cover a portion of the top surface23of the printed circuit board22, is preferably brass with a Cu/Ni/Sn (copper/nickel/tin) plated material for ROHS compliance purposes. Lid45is adapted to act both as a dust cover and a Faraday shield.

As described above, generally rectangularly-shaped substrate22has top or front surface23(FIGS. 2 and 3), a bottom or back surface27(FIG. 4), and an outer peripheral circumferential edge defining respective upper and lower faces or edges42and44and side faces or edges46and48(FIGS. 2-5). Although not described in any detail, it is understood that, in a preferred embodiment, substrate22will be comprised of a plurality of stacked laminate layers of suitable dielectric material sandwiched between respective layers of conductive material as is known in the art such as, for example, a bottom RF ground plane layer, an RF intermediate signal layer, a top RF ground layer, and a topmost DC/RF layer plus ground layer.

Castellations35(FIGS. 2-4) are defined and located about the outer peripheral edge of board22. Castellations35define the various ground and DC voltage input/output pins of the module20. Castellations35are defined by metallized semicircular grooves which have been carved out of the respective edges42,44,46and48and extend between the respective top and bottom surfaces23and27of the substrate22. In the embodiment shown, the castellations35are defined by plated through-holes which have been cut in half during manufacturing of the substrates from an array. Castellations35extend along the length of the respective edges of substrate22in spaced-apart and parallel relationship. In the embodiment shown, the top substrate edge42defines seven spaced-apart castellations35, the lower substrate edge44defines five spaced-apart castellations35, the side substrate edge46defines three castellations35, and the opposed side substrate edge48defines one castellation35.

The outer surface of each of the respective castellations35is coated as by electroplating or the like, with a layer of copper or the like conductive material which is initially applied to all of the surfaces of the substrate22during the manufacturing of the substrate22as is known in the art and then removed from selected portions of the surfaces to define the copper coated castellations35. Castellations35and, more specifically, the copper thereon creates an electrical path between top surface23and bottom or back surface27of substrate22.

Although not shown, it is understood that the copper extends around both the top and bottom edges of each of the castellations35to define pads of copper or the like conductive material on the top surface23of substrate22and surrounding the top or front edge of each of the respective castellations35; and a plurality of pads extending inwardly from the bottom or back edge of each of the castellations35on the bottom surface27of substrate22which allow the module20to be directly surface mounted by reflow soldering or the like, to corresponding pads located on the surface of the motherboard of the picocell (not shown).

Although not disclosed in any detail, it is understood that respective ones of the castellations define respective voltage input/output pins while other ones of the castellations35define pins adapted for direct coupling to the ground copper layer applied to both of the surfaces23and27.

Conductive vias38defined in the board22define the respective RF component signal input/output and antenna pins7,11, and17of the module20. Vias38extend through the substrate22between the substrate surfaces23and27thereof and, as known in the art, define an interior cylindrical surface which has been plated with copper or the like conductive material. In accordance with the present invention, the use of vias38which are spaced from the respective substrate edges instead of castellations35defined in respective substrate edges insures a constant 50-ohm characteristic impedance.

Pinouts1and3extend along the bottom longitudinal edge44of board22. Pinout7extends along the side longitudinal edge48. Pinouts8,9, and13extend along the top longitudinal edge42of board22. Pinout17extends along the side longitudinal edge46of board22.

With reference toFIGS. 2 and 3, power amplifier26(together with the other components which are part of the Tx signal path) is preferably located in an area of the printed circuit board22not intended to be covered by the lid45, to allow for the dissipation of heat created by the amplifier26and also to reduce the transfer of heat created by the amplifier26to any of the electrical components located under the lid45.

More specifically, it is understood that, in the preferred embodiment, power amplifier26is generally centrally located on the left hand half of the top or front surface23of the substrate/board22. Pinout13extends generally opposite the top edge of power amplifier26along longitudinal board edge42. Pinouts1and3extend generally along the bottom edge of power amplifier26along the length of bottom longitudinal board edge44. Pinout17extends generally opposite the left side edge of power amplifier26along (but spaced inwardly from) board side edge46.

In the embodiment shown, a first set of appropriate resistors and capacitors101,102,103,104,105,106, and107are all generally located and fixed on the top or front surface23of board22generally below the power amplifier26and, more specifically, between the power amplifier26and the lower longitudinal edge44of board22.

A second set of appropriate resistors, capacitors, and inductors108,109,110,111,112, and113are all generally located and fixed on the top or front surface23of the board22to the left of the power amplifier26and, more specifically, between the power amplifier26and the left side longitudinal edge46of the board22.

A third set of appropriate resistors and capacitors114,115,116, and117are all generally located and fixed on the top or front surface23of the board22generally above the top edge of power amplifier26and, more specifically, between the power amplifier26and the top longitudinal edge42of board22.

Tx low pass filter28is located and fixed on the left half of the top or front surface23of the board22generally between the right side edge of the power amplifier26and the left edge of the lid45.

A fourth set of appropriate resistors, capacitors and inductors118,119,120, and121are all located and fixed on the top surface23of the board22generally between the power amplifier26and the Tx low pass filter28.

Capacitors122and123are located the top surface23of the board22generally above Tx low pass filter28and, more specifically, between the Tx low pass filter28and the top longitudinal edge42of board22.

RF switch29, Rx bandpass filter36, and Rx low noise amplifier39are all generally located on the right half of the board22and adapted to be located below the lid45. More specifically, Rx bandpass filter36is seated on and covers a substantial portion of the lower portion of the right half of the top or front surface23of the board22. RF switch29and Rx low noise amplifier39are both generally located above the Rx bandpass filter36and, more specifically, between the top longitudinal edge of the Rx bandpass filter36and the top longitudinal edge42of the board22.

Pinout7extending along (but spaced inwardly from) the board side edge48is located generally opposite the right side edge of the Rx low noise amplifier39. Pinout11extending along (but spaced inwardly from) the board top longitudinal edge42is located generally opposite the top edge of the RF switch29.

Referring toFIGS. 2 and 3, lid45includes a top wall or roof46, a first pair of respective opposed side walls49aand49b, and a second pair of respective opposed side walls51aand51b, all adapted to depend and extend generally perpendicularly downwardly from the peripheral edges of the roof46to define the lid when the walls are folded during assembly. Each of the walls49a,49b,51aand51bin turn defines a lower longitudinal terminal edge53. The edge53of each of the side walls49aand49bin turn defines at least two spaced-apart tabs50aand50bprojecting downwardly therefrom and adapted to be fitted into respective through-slots or castellations37defined in the top surface23of the board22for locating and securing the lid45to the board22in a grounded relationship with the board22wherein the edges53of the respective lid walls49a,49b,51aand51bare seated over respective elongate ground strips (not shown) defined on the board top surface23, thus providing and defining a grounded lid45.

As also shown inFIG. 4, a plurality of through-holes or vias136are defined and formed on the board22beneath the region where the power amplifier26is seated on the board22to define a heat sink for the heat created by power amplifier26. Through-holes136could be double-plated with copper or the like material for added thermal conductivity and likewise extend through the board22.

The process for assembling a module20involves the following steps. After the substrate/board22has been fabricated, i.e., once all of the appropriate and desired copper castellations, copper strips, copper vias, copper pads, and copper through-holes have been formed thereon as known in the art, Ag/Sn (silver/tin) solder is screen printed onto a 2.6″ by 4.6″ printed circuit board array and, more particularly, onto the surface of each of the appropriate solder pads and strips defined on the array following the application of predetermined layers and strips of solder mask material as known in the art. Solder is applied to the surface of all of the designated copper strips, pads and regions and all of the desired and appropriate electrical components including all of the filters defining the module20are then appropriately placed and located on the array.

Although not described in any detail, it is understood that the particular selection, number, placement, and values of the appropriate resistors, capacitors, and inductors may vary depending upon the desired end application and performance characteristics of the module20.

The lid45is then placed over the appropriate portion of the board22as described above into a soldered coupled relationship wherein the tabs50aand50bthereof are fitted into appropriate castellations/slots37defined in the board22thereby appropriately locating and securing the lid45to the board22.

To complete the manufacturing process, the module20is then reflow soldered at a maximum temperature of 260° C. so as to couple all of the components and lid45to the board. Finally, the array is diced up as is known in the art and the individual modules20are then final tested and subsequently “taped and reeled” and readied for shipment.

While the invention has been taught with specific reference to an embodiment of the module adapted for use on the front end of a picocell, it is understood that someone skilled in the art will recognize that changes can be made in form and detail such as, for example, to the selection, number, placement, interconnection values, and patterns of the various RF elements and circuits, without departing from the spirit and the scope of the invention as defined in the appended claims. The described embodiment is to be considered in all respects only as illustrative of one embodiment and not restrictive.