Two-terminal integrated circuits with time-varying voltage-current characteristics including phased-locked power supplies

A two-terminal IC chip and method thereof. For example, a two-terminal IC chip includes a first chip terminal, a second chip terminal, a first switch configured to receive a control signal, a first capacitor coupled to the first switch, a second switch configured to receive the control signal, a second capacitor coupled to the second switch, a third switch configured to receive the control signal, and a third capacitor coupled to the third switch. A first terminal voltage is a voltage of the first chip terminal, a second terminal voltage is a voltage of the second chip terminal, and a chip voltage is equal to a difference between the first terminal voltage and the second terminal voltage.

2. BACKGROUND OF THE INVENTION

Certain embodiments of the present invention are directed to integrated circuits. More particularly, some embodiments of the invention provide two-terminal integrated circuits with time-varying voltage-current characteristics including phase-locked power supplies. Merely by way of example, some embodiments of the invention have been applied to drivers for light emitting diodes (LEDs). But it would be recognized that the invention has a much broader range of applicability.

A single conventional integrated circuit often includes one or more electronic circuits on one or more semiconductor materials (e.g., silicon). The single conventional integrated circuit usually is referred to as an IC, a chip, and/or an IC chip. Additionally, the single conventional integrated circuit often can be made much smaller than a discrete circuit that includes one or more discrete components (e.g., discrete resistor, discrete diode, and/or discrete transistor).

Usually, a conventional IC chip includes three or more terminals that can provide interconnections between the internal circuit(s) of the chip and the external environment. Often, the conventional IC chip uses one terminal to receive a power supply, uses another terminal to provide the ground for a current loop, and uses yet another terminal to provide control for input and/or output.

For example, a conventional LED driver includes a conventional IC chip that operates in the switching-power-supply mode. The conventional IC chip includes three or more terminals (e.g., pins) and uses these terminals to support normal operations. These terminals include a pin to receive the input rectified AC power, another pin to receive the IC power supply, and yet another pin to provide input/output control, and/or to provide the chip ground. The input rectified AC power (e.g., the rectified AC voltage) often periodically becomes zero in magnitude with respect to the chip ground. In another example, the pin for the input rectified AC power is connected to a terminal of an external capacitor, and the other terminal of the external capacitor is connected to the pin for the chip ground. The external capacitor often is needed to provide the power supply to the conventional IC chip when the input rectified AC power (e.g., the rectified AC voltage) periodically becomes zero in magnitude with respect to the chip ground. In yet another example, the conventional IC chip uses the three or more terminals to work with one or more external components (e.g., an inductive winding) outside the chip and convert the received input rectified AC power to a DC power supply for the LED lamps in order to provide a constant LED current under certain control scheme. The use of external capacitor and/or one or more additional pins for the IC chip often raises the bill-of-materials (BOM) cost of the LED driver.

Hence, it is highly desirable to improve techniques for the integrated circuit that, for example, is applicable to an LED drive.

3. BRIEF SUMMARY OF THE INVENTION

Certain embodiments of the present invention are directed to integrated circuits. More particularly, some embodiments of the invention provide two-terminal integrated circuits with time-varying voltage-current characteristics including phase-locked power supplies. Merely by way of example, some embodiments of the invention have been applied to drivers for light emitting diodes. But it would be recognized that the invention has a much broader range of applicability.

According to one embodiment, a two-terminal IC chip includes a first chip terminal and a second chip terminal. A first terminal voltage is a voltage of the first chip terminal, a second terminal voltage is a voltage of the second chip terminal, and a chip voltage is equal to a difference between the first terminal voltage and the second terminal voltage. The chip is configured to allow a chip current to flow into the chip at the first chip terminal and out of the chip at the second chip terminal, or to flow into the chip at the second chip terminal and out of the chip at the first chip terminal. The chip current is larger than or equal to zero in magnitude. The chip is further configured to change a relationship between the chip voltage and the chip current with respect to time. The chip is an integrated circuit, and the chip does not include any additional chip terminal other than the first chip terminal and the second chip terminal.

According to another embodiment, a two-terminal IC chip includes a first chip terminal, a second chip terminal, and a first switch. The chip is configured to allow a chip current to flow into the chip at the first chip terminal and out of the chip at the second chip terminal, or to flow into the chip at the second chip terminal and out of the chip at the first chip terminal. The chip current is larger than or equal to zero in magnitude. The first switch is configured to receive a drive signal and be opened or closed in response to the drive signal. The chip is further configured to, in response to the first switch being opened, change the chip current from being larger than zero to being equal to zero in magnitude, and in response to the first switch being closed, change the chip current from being equal to zero to being larger than zero in magnitude. The chip is an integrated circuit, and the chip does not include any additional chip terminal other than the first chip terminal and the second chip terminal.

According to yet another embodiment, a two-terminal IC chip includes a first chip terminal, a second chip terminal, a first switch configured to receive a first signal, and a first power supply coupled to the first switch. The first switch is configured to be closed during a first time duration in response to the first signal, and to be open during a second time duration in response to the first signal. The first power supply is configured to, in response to the first switch being closed, receive a first power through the first switch and store the received first power during the first time duration, and in response to the first switch being open, not store any additional power and not allow the stored power to leak out through the first switch during the second time duration. The first power supply is further configured to output a second power during the first time duration and the second time duration. A first terminal voltage is a voltage of the first chip terminal, a second terminal voltage is a voltage of the second chip terminal, and a chip voltage is equal to a difference between the first terminal voltage and the second terminal voltage. The chip is configured to allow a chip current to flow into the chip at the first chip terminal and out of the chip at the second chip terminal, or to flow into the chip at the second chip terminal and out of the chip at the first chip terminal. The chip current is larger than or equal to zero in magnitude. The chip is further configured to, based at least in part on the second power, generate at least one selected from a group consisting of the chip voltage and the chip current. The chip is an integrated circuit, and the chip does not include any additional chip terminal other than the first chip terminal and the second chip terminal.

According to yet another embodiment, a two-terminal IC chip includes a first chip terminal and a second chip terminal. The first chip terminal is coupled to a first winding terminal of an inductive winding and a first diode terminal of a diode. The inductive winding further includes a second winding terminal, and the diode further includes a second diode terminal. A series of one or more light emitting diodes is coupled to the second winding terminal and the second diode terminal. The second winding terminal and the second diode terminal are configured to receive a rectified AC voltage. The chip is configured to receive an input voltage at the first chip terminal and generate a chip current based at least in part on the input voltage, and the chip current is larger than or equal to zero in magnitude. Additionally, the chip is further configured to allow the chip current to flow into the chip at the first chip terminal and out of the chip at the second chip terminal, or to flow into the chip at the second chip terminal and out of the chip at the first chip terminal, and change the chip current with respect to time to keep the light-emitting-diode current constant with respect to time even if the input voltage changes within a voltage range and a temperature for the chip changes within a temperature range. The chip is an integrated circuit, and the chip does not include any additional chip terminal other than the first chip terminal and the second chip terminal.

According to yet another embodiment, a two-terminal IC chip for an electronic system includes a first chip terminal and a second chip terminal. The first chip terminal is coupled to one or more components of the electronic system. The electronic system is configured to receive a first signal and generate a second signal based on at least information associated with the first signal. The chip is configured to receive an input voltage at the first chip terminal and generate a chip current based at least in part on the input voltage. The chip current is larger than or equal to zero in magnitude. Additionally, the chip is further configured to allow the chip current to flow into the chip at the first chip terminal and out of the chip at the second chip terminal, or to flow into the chip at the second chip terminal and out of the chip at the first chip terminal, and change the chip current with respect to time to keep the electronic system operating normally even if the first signal changes. The chip is an integrated circuit, and the chip does not include any additional chip terminal other than the first chip terminal and the second chip terminal.

In one embodiment, a two-terminal IC chip includes a first chip terminal, a second chip terminal, a first switch configured to receive a control signal, a first capacitor coupled to the first switch, a second switch configured to receive the control signal, a second capacitor coupled to the second switch, a third switch configured to receive the control signal, and a third capacitor coupled to the third switch. A first terminal voltage is a voltage of the first chip terminal, a second terminal voltage is a voltage of the second chip terminal, and a chip voltage is equal to a difference between the first terminal voltage and the second terminal voltage. The chip is configured to allow a chip current to flow into the chip at the first chip terminal and out of the chip at the second chip terminal, or to flow into the chip at the second chip terminal and out of the chip at the first chip terminal, the chip current being larger than or equal to zero in magnitude. The first switch is further configured to be closed during a first time duration in response to the control signal, and open during a second time duration in response to the control signal. The first capacitor is configured to: in response to the first switch being closed, receive a first supply voltage through the first switch during the first time duration; in response to the first switch being open, not store any additional power and not allow first stored power to leak out through the first switch during the second time duration; and output a first output voltage during the first time duration and the second time duration. The second switch is further configured to be closed during the first time duration in response to the control signal, and open during the second time duration in response to the control signal. The second capacitor is configured to: in response to the second switch being closed, receive the first supply voltage through the second switch during the first time duration; in response to the second switch being open, not store any additional power and not allow second stored power to leak out through the second switch during the second time duration; and output a second output voltage during the first time duration and the second time duration. The third switch is further configured to be closed during the first time duration in response to the control signal, and open during the second time duration in response to the control signal. The third capacitor is configured to: in response to the third switch being closed, receive a second supply voltage through the third switch during the first time duration; in response to the third switch being open, not store any additional power and not allow second stored power to leak out through the third switch during the second time duration; and output a third output voltage during the first time duration and the second time duration. The chip is an integrated circuit, and the chip does not include any additional chip terminal other than the first chip terminal and the second chip terminal.

In another embodiment, a two-terminal IC chip includes a first chip terminal, a second chip terminal, a first switch configured to receive a control signal, a first capacitor coupled to the first switch, a second switch configured to receive the control signal, a second capacitor coupled to the second switch, and a voltage generator configured to receive a first terminal voltage and generate a supply voltage. The first terminal voltage is a voltage of the first chip terminal, a second terminal voltage is a voltage of the second chip terminal, and a chip voltage is equal to a difference between the first terminal voltage and the second terminal voltage. The chip is configured to allow a chip current to flow into the chip at the first chip terminal and out of the chip at the second chip terminal, or to flow into the chip at the second chip terminal and out of the chip at the first chip terminal, the chip current being larger than or equal to zero in magnitude. The first switch is further configured to be closed during a first time duration in response to the control signal, and open during a second time duration in response to the control signal. The first capacitor is configured to: in response to the first switch being closed, receive the supply voltage through the first switch during the first time duration; in response to the first switch being open, not store any additional power and not allow first stored power to leak out through the first switch during the second time duration; and output a first output voltage during the first time duration and the second time duration. The second switch is further configured to be closed during the first time duration in response to the control signal, and open during the second time duration in response to the control signal. The second capacitor is configured to: in response to the second switch being closed, receive the supply voltage through the second switch during the first time duration; in response to the second switch being open, not store any additional power and not allow second stored power to leak out through the second switch during the second time duration; and output a second output voltage during the first time duration and the second time duration. The chip is an integrated circuit, and the chip does not include any additional chip terminal other than the first chip terminal and the second chip terminal.

Depending upon embodiment, one or more of these benefits may be achieved. These benefits and various additional objects, features and advantages of the present invention can be fully appreciated with reference to the detailed description and accompanying drawings that follow.

5. DETAILED DESCRIPTION OF THE INVENTION

Certain embodiments of the present invention are directed to integrated circuits. More particularly, some embodiments of the invention provide two-terminal integrated circuits with time-varying voltage-current characteristics including phase-locked power supplies. Merely by way of example, some embodiments of the invention have been applied to drivers for light emitting diodes. But it would be recognized that the invention has a much broader range of applicability.

According to some embodiments, for an IC chip, its terminal to provide control for input and/or output is combined with the terminal to receive a power supply or is combined with the terminal to provide the ground for a current loop. For example, the IC chip includes at most two terminals, such as a power-supply terminal and a ground terminal. In another example, these two terminals of the IC chip not only provide a current loop and/or a current flow but also automatically control an entire electronic system. In yet another example, the IC chip works as a one-input-terminal-and-one-output-terminal system.

FIG. 1is a simplified diagram showing an IC chip according to an embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. The IC chip100includes terminals110and112, an internal power supply120, a phase control block130, controlled switch blocks140,142, and144, power supplies150,152, and154, and function blocks160,162,164, and170. For example, each of the terminals110and112is a pin. In another example, the phase control block130is a phase controller. In yet another example, each of the controlled switch blocks140,142, and144is a switch (e.g., a controlled switch). In yet another example, each of the function blocks160,162,164, and170is a component configured to perform one or more functions.

In one embodiment, the terminal110receives a current and/or voltage114from outside the IC chip100, and provides the received current and/or voltage114to one or more components within the IC chip100, and the terminal112receives a current and/or voltage124and/or a current and/or voltage116from one or more components within the IC chip100, and provides the received current and/or voltage124and/or the received current and/or voltage116to outside the IC chip100. In another embodiment, the terminal110receives the current and/or voltage114from one or more components within the IC chip100, and provides the received current and/or voltage114to outside the IC chip100, and the terminal112receives the current and/or voltage124and/or the current and/or voltage116from outside the IC chip100, and provides the received current and/or voltage124and/or the received current and/or voltage116to one or more components within the IC chip100. In yet another embodiment, at one time, the terminal110receives the current and/or voltage114from outside the IC chip100, and provides the received current and/or voltage114to one or more components within the IC chip100, and the terminal112receives the current and/or voltage124and/or the current and/or voltage116from one or more components within the IC chip100, and provide the received current and/or voltage124and/or the received current and/or voltage116to outside the IC chip100; and at another time, the terminal110receives the current and/or voltage114from one or more components within the IC chip100, and provides the received current and/or voltage114to outside the IC chip100, and the terminal112receives the current and/or voltage124and/or the current and/or voltage116from outside the IC chip100, and provides the received current and/or voltage124and/or the received current and/or voltage116to one or more components within the IC chip100.

As shown inFIG. 1, the terminal110receives the current and/or voltage114from outside the IC chip100, provides the received current and/or voltage114to the internal power supply120during a time duration, and provides the received current and/or voltage114to the function blocks160,162,164, and170during another time duration, according to certain embodiments.

In one embodiment, the internal power supply120receives the current and/or voltage114, and in response outputs a power-supply voltage and/or current122to the phase control block130, the controlled switch blocks140,142, and144, and the function block170. For example, the phase control block130receives the power-supply voltage and/or current122and in response generates phase-control signals132,134, and136. In another example, the phase control block130also generates the current and/or voltage124. In another embodiment, the controlled switch block140receives the power-supply voltage and/or current122and the phase-control signal132, the controlled switch block142receives the power-supply voltage and/or current122and the phase-control signal134, and the controlled switch block144receives the power-supply voltage and/or current122and the phase-control signal136.

According to one embodiment, the controlled switch block140, in response to the phase-control signal132, is closed (e.g., turned on) during a time duration and is open (e.g., turned off) during another time duration. For example, during the time duration when the controlled switch block140is closed, the controlled switch block140uses the power-supply voltage and/or current122to generate a voltage and/or current141, and outputs the voltage and/or current141to the power supply150. In another example, the power supply150receives power by receiving the voltage and/or current141and stores the received power while providing power (e.g., a voltage and/or current151) to the function block160. In yet another example, during the another time duration when the controlled switch block140is open, the power supply150does not receive any power from the controlled switch block140, and the energy stored by the power supply150is trapped within the power supply150except that the power supply150still provides power (e.g., the voltage and/or current151) to the function block160. In yet another example, during the another time duration when the controlled switch block140is open, the power supply150does not receive any power from the controlled switch block140, and the energy stored by the power supply150is blocked from leaking out through the controlled switch block140even though the power supply150still provides power (e.g., the voltage and/or current151) to the function block160.

According to another embodiment, the power supply150is phase locked (e.g., by the phase-control signal132through the controlled switch block140) and self sustaining (e.g., by blocking energy already stored from leaking through the controlled switch block140). For example, when the controlled switch block140is closed during a time duration as determined by the phase-control signal132, the power supply150receives and stores additional energy while providing power to the function block160. In another example, when the controlled switch block140is open during another time duration as determined by the phase-control signal132, the power supply150does not store additional energy and the energy stored by the power supply150is blocked from leaking out through the controlled switch block140, but the power supply150still provides power (e.g., the voltage and/or current151) to the function block160.

In one embodiment, the controlled switch block142, in response to the phase-control signal134, is closed (e.g., turned on) during a time duration and is open (e.g., turned off) during another time duration. For example, during the time duration when the controlled switch block142is closed, the controlled switch block142uses the power-supply voltage and/or current122to generate a voltage and/or current143, and outputs the voltage and/or current143to the power supply152. In another example, the power supply152receives power by receiving the voltage and/or current143and stores the received power while providing power (e.g., a voltage and/or current153) to the function block162. In yet another example, during the another time duration when the controlled switch block142is open, the power supply152does not receive any power from the controlled switch block142, and the energy stored by the power supply152is trapped within the power supply152except that the power supply152still provides power (e.g., the voltage and/or current153) to the function block162. In yet another example, during the another time duration when the controlled switch block142is open, the power supply152does not receive any power from the controlled switch block142, and the energy stored by the power supply152is blocked from leaking out through the controlled switch block142even though the power supply152still provides power (e.g., the voltage and/or current153) to the function block162.

In another embodiment, the power supply152is phase locked (e.g., by the phase-control signal134through the controlled switch block142) and self sustaining (e.g., by blocking energy already stored from leaking through the controlled switch block142). For example, when the controlled switch block142is closed during a time duration as determined by the phase-control signal134, the power supply152receives and stores additional energy while providing power to the function block162. In another example, when the controlled switch block142is open during another time duration as determined by the phase-control signal134, the power supply152does not store additional energy and the energy stored by the power supply152is blocked from leaking out through the controlled switch block142, but the power supply152still provides power (e.g., the voltage and/or current153) to the function block162.

According to one embodiment, the controlled switch block144, in response to the phase-control signal136, is closed (e.g., turned on) during a time duration and is open (e.g., turned off) during another time duration. For example, during the time duration when the controlled switch block144is closed, the controlled switch block144uses the power-supply voltage and/or current122to generate a voltage and/or current145, and outputs the voltage and/or current145to the power supply154. In another example, the power supply154receives power by receiving the voltage and/or current145and stores the received power while providing power (e.g., a voltage and/or current155) to the function block164. In yet another example, during the another time duration when the controlled switch block144is open, the power supply154does not receive any power from the controlled switch block144, and the energy stored by the power supply154is trapped within the power supply154except that the power supply154still provides power (e.g., the voltage and/or current155) to the function block164. In yet another example, during the another time duration when the controlled switch block144is open, the power supply154does not receive any power from the controlled switch block144, and the energy stored by the power supply154is blocked from leaking out through the controlled switch block144even though the power supply154still provides power (e.g., the voltage and/or current155) to the function block164.

According to another embodiment, the power supply154is phase locked (e.g., by the phase-control signal136through the controlled switch block144) and self sustaining (e.g., by blocking energy already stored from leaking through the controlled switch block144). For example, when the controlled switch block144is closed during a time duration as determined by the phase-control signal136, the power supply154receives and stores additional energy while providing power to the function block164. In another example, when the controlled switch block144is open during another time duration as determined by the phase-control signal136, the power supply154does not store additional energy and the energy stored by the power supply154is blocked from leaking out through the controlled switch block144, but the power supply154still provides power (e.g., the voltage and/or current155) to the function block164.

In one embodiment, the function block160receives the power (e.g., the voltage and/or current151) from the power supply150and a signal (e.g., the current and/or voltage114) from the terminal110, performs a function on the signal (e.g., the current and/or voltage114), and generates a current and/or voltage161based at least in part on the signal (e.g., the current and/or voltage114) according to the function. For example, the current and/or voltage161is a part of the current and/or voltage116.

In another embodiment, the function block162receives the power (e.g., the voltage and/or current153) from the power supply152and a signal (e.g., the current and/or voltage114) from the terminal110, performs a function on the signal (e.g., the current and/or voltage114), and generates a current and/or voltage163based at least in part on the signal (e.g., the current and/or voltage114) according to the function. For example, the current and/or voltage163is a part of the current and/or voltage116. In another example, the current and/or voltage163is different from the current and/or voltage161.

In yet another embodiment, the function block164receives the power (e.g., the voltage and/or current155) from the power supply154and a signal (e.g., the current and/or voltage114) from the terminal110, performs a function on the signal (e.g., the current and/or voltage114), and generates a current and/or voltage165based at least in part on the signal (e.g., the current and/or voltage114) according to the function. For example, the current and/or voltage165is a part of the current and/or voltage116. In another example, the current and/or voltage165is different from the current and/or voltage161and from the current and/or voltage163, and the current and/or voltage163is different from the current and/or voltage161.

In yet another embodiment, the function block170receives the power (e.g., the power-supply voltage and/or current122) from the internal power supply120and a signal (e.g., the current and/or voltage114) from the terminal110, performs a function on the signal (e.g., the current and/or voltage114), and generates a current and/or voltage175based at least in part on the signal (e.g., the current and/or voltage114) according to the function. For example, the function performed by the function block160, the function performed by the function block162, the function performed by the function block164, and the function performed by the function block170are different. In yet another example, the current and/or voltage116is a combination of the current and/or voltage161, the current and/or voltage163, the current and/or voltage165, and the current and/or voltage175.

As shown inFIG. 1, the power supply150also generates a current and/or voltage181, the power supply152also generates a current and/or voltage183, and the power supply154also generates a current and/or voltage185, according to certain embodiments. For example, the current and/or voltage181, the current and/or voltage183, and the current and/or voltage185are parts of the current and/or voltage116. In yet another example, the current and/or voltage116is a combination of the current and/or voltage161, the current and/or voltage163, the current and/or voltage165, the current and/or voltage175, the current and/or voltage181, the current and/or voltage183, and the current and/or voltage185.

In one embodiment, the switch blocks140,142, and144are controlled to he turned on or off according to their respective timing arrangements. For example, when the switch block140, the switch block142, and/or the switch block144are turned off, the energy stored by the power supply150, the power supply152, and/or the power supply154respectively are blocked from leaking out through the controlled switch block140, the controlled switch block142, and/or the controlled switch block144respectively, even though the power supply150, the power supply152, and/or the power supply154still provides power to the function block160, the function block162, and/or the function block164respectively. In another example, the energy trapped within the power supply150, the power supply152, and/or the power supply154respectively is used to provide power to different function blocks to maintain proper control, even if the power supply (e.g., the current and/or voltage114and/or the current and/or voltage122) becomes very weak or even lost during a time period.

As discussed above and further emphasized here,FIG. 1is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. In one embodiment, the IC chip100includes two or more function blocks170. For example, each of the two or more function blocks170receives the power (e.g., the power-supply voltage and/or current122) from the internal power supply120and a signal (e.g., the current and/or voltage114) from the terminal110, performs a function on the signal (e.g., the current and/or voltage114), and generates a current and/or voltage based at least in part on the signal (e.g., the current and/or voltage114) according to the function. In another example, the two or more functions performed by the two or more function blocks170respectively are different. In another embodiment, the IC chip100includes one or more additional components that are not explicitly shown inFIG. 1.

FIG. 2is a simplified diagram showing an LED driver that includes the IC chip100as shown inFIG. 1according to an embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. For example, the LED driver200includes the IC chip100, an inductive winding210, a diode220, diodes230,232,234and236, and a capacitor240. In another example, the LED driver200is configured to drive one or more light emitting diodes (LEDs)290. In yet another example, the LED driver200operates in the switching-power-supply mode.

In one embodiment, a terminal231of the diode230and a terminal237of the diode236receive an AC voltage250, and in response, the diodes230,232,234and236and the capacitor240generate a rectified voltage252(e.g., to provide rectified AC power). In another embodiment, the inductive winding210includes terminals212and214, and the diode220includes terminals222and224. For example, the rectified voltage252is received by the terminal222of the diode220, and the terminal224of the diode220is connected to the terminal212of the inductive winding210and the terminal110of the IC chip100. In another example, the one or more light emitting diodes (LEDs)290form a series, which includes terminals292and294. In yet another example, the terminal292is connected to the terminal222, and the terminal294is connected to the terminal214.

In yet another embodiment, the terminal110of the IC chip100receives a voltage256from the terminal224and the terminal212, and in response, the IC chip100generates a current254. For example, the voltage256is received by the terminal110as the voltage114, and the current254is outputted by the terminal112as the current116. In another example, the terminal112of the IC chip100is biased to a predetermined voltage (e.g., the ground voltage).

In yet another embodiment, the IC chip100is biased between the voltage of the terminal110(e.g., the voltage256) and the voltage of the terminal112, and in response generates a current (e.g., the current254) that flows into the IC chip100through the terminal110and flows out of the IC chip100through the terminal112. For example, the IC chip100is a two-terminal device that has a current-voltage characteristic between the voltage Vchipacross the IC chip100(e.g., the voltage of the terminal110minus the voltage of the terminal112) and the current Ichipflowing through the IC chip100(e.g., the current254). In another example, the current-voltage characteristic of the IC chip100is represented by an effective resistance Rchipof the IC chip100as shown below:

Rchip=VchipIchip(Equation⁢⁢1)
wherein Rchiprepresents the effective resistance of the IC chip100. Additionally, Vchiprepresents the voltage across the IC chip100(e.g., the voltage of the terminal110minus the voltage of the terminal112), and Ichiprepresents the current flowing through the IC chip100(e.g., the current254).

In yet another embodiment, the current-voltage characteristic of the IC chip100changes with time. For example, the current-voltage characteristic of the IC chip100changes periodically with time. In another example, within each period, the current-voltage characteristic changes with time. In yet another embodiment, the effective resistance Rchipof the IC chip100changes with time. For example, the effective resistance Rchipof the IC chip100changes periodically with time. In another example, within each period, the effective resistance Rchipof the IC chip100changes with time.

According to one embodiment, the voltage256is received by the IC chip100, and in response, the IC chip100generates the current254. For example, the current254changes with time. In another example, the current254changes periodically with time, and within each period, the current254changes with time. In yet another example, the current254changes with time so that a current296that flows through the series of one or more light emitting diodes290remains constant with respect to time.

According to another embodiment, the IC chip100of the LED driver200does not need to rely on an external capacitor to provide the power supply to the IC chip100. According to another embodiment, the IC chip100of the LED driver200provides a two-functional-pin solution for the LED driver200that reduces the bill-of-materials (BOM) cost but still maintains effective constant-current control for the one or more light emitting diodes (LEDs)290. For example, the IC chip100does not include any terminal (e.g., pin) other than the terminals (e.g., pins)110and112. In another example, the IC chip100can reduce the size and/or cost of the overall system (e.g., the LED driver200), and the IC chip100can be used in various consumer electronics.

According to yet another embodiment, the IC chip100is configured to keep the current296constant with respect to time even if the voltage256changes within a voltage range and the temperature of the IC chip100changes within a temperature range. For example, the IC chip100is further configured to periodically change the current254with respect to time and within each period, change the current254with respect to time, to keep the current296constant with respect to time even if the voltage256changes within the voltage range and the temperature of the IC chip100changes within the temperature range. In another example, the temperature range includes an upper temperature limit equal to 150° C. and a lower temperature limit equal to −40° C. In yet another example, the voltage range includes an upper voltage limit equal to 370 V and a lower voltage limit equal to 126 V.

According to yet another embodiment, the IC chip100is a controller for the LED driver200. For example, the LED driver200is configured to receive the AC voltage250and generate the current296based on at least information associated with the AC voltage250. In another example, the IC chip100is configured to generate the current254, and/or change the current254with respect to time, to keep the LED driver200operating normally even if the AC voltage250changes. In yet another example, the IC chip100is further configured to periodically change the current254with respect to time and within each period, change the current254with respect to time, to keep the LED driver200operating normally even if the AC voltage250changes. In yet another example, the LED driver200is kept operating normally even if the AC voltage250changes, by keeping the current296constant in magnitude with respect to time even if the AC voltage250changes in magnitude.

FIG. 3is a simplified diagram showing an IC chip according to another embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. The IC chip300includes terminals310and312, a low dropout regular320, a phase controller330(e.g., a phase logic controller), a controlled switch and power supply340, a controlled switch and power supply342, an on-time controller360, a logic-control and gate-drive component362(e.g., a driver), a reference-voltage generator370, a demagnetization detector372, a switch380(e.g., a transistor), and a resistor382.

In one embodiment, the IC chip300is the IC chip100. For example, the terminal310is the terminal110, and the terminal312is the terminal112. In another example, the low dropout regular320is the internal power supply120, and the phase controller330is the phase control block130. In yet another example, the controlled switch and power supply340is a combination of the controlled switch block140and the power supply150, and the controlled switch and power supply342is a combination of the controlled switch block142and the power supply152. In yet another example, the on-time controller360is the function block160, and the logic-control and gate-drive component362is the function block162. In yet another example, the reference-voltage generator370is the function block170, and the demagnetization detector372is another function block170. In another embodiment, the IC chip300is the IC chip100that is used in the LED driver200as shown inFIG. 2.

In one embodiment, the terminal310receives a voltage314(e.g., the current and/or voltage114, or the voltage256) from outside the IC chip300, and the terminal312outputs a current316(e.g., the current and/or voltage116, or the current254) to outside the IC chip300. For example, the current316is larger than or equal to zero in magnitude. In another example, the voltage314is received by the low dropout regular320and the switch380. In another example, the switch380is a transistor (e.g., MOSFET). In another embodiment, the low dropout regular320receives the voltage314, and in response outputs a power-supply voltage322to the phase controller330, the controlled switch and power supply340, the controlled switch and power supply342, the reference-voltage generator370, and the demagnetization detector372.

According to one embodiment, the reference-voltage generator370outputs a reference voltage and/or current371to the on-time controller360. According to another embodiment, the demagnetization detector372outputs a demagnetization signal373to the logic-control and gate-drive component362. For example, the demagnetization signal373indicates the beginning and the end of each demagnetization period. In another example, the demagnetization period is related to a demagnetization process of the inductive winding210.

According to yet another embodiment, the phase controller330receives the power-supply voltage322, and outputs a phase-control signal331to the controlled switch and power supply340and the controlled switch and power supply342. For example, the controlled switch and power supply340includes a switch, and the controlled switch and power supply342also includes a switch. In another example, the phase-control signal331indicates the beginning and the end of each turn-on time period and the beginning and the end of each turn-off time period. In yet another example, the phase-control signal331is at a logic level (e.g., a logic high level) during each turn-on period (e.g., from the beginning to the end of each turn-on time period), and is at another logic level (e.g., a logic low level) during each turn-off time period (e.g., from the beginning to the end of each turn-off time period).

In one embodiment, during the turn-on time period as indicated by the phase-control signal331, the switch of the controlled switch and power supply340is closed (e.g., turned on), and during the turn-off time period as indicated by the phase-control signal331, the switch of the controlled switch and power supply340is open (e.g., turned off). For example, if the switch of the controlled switch and power supply340is closed, the controlled switch and power supply340receives power provided by the power-supply voltage322and stores the received power while providing power (e.g., a power-supply voltage341) to the on-time controller360. In another example, if the switch of the controlled switch and power supply340is open, the controlled switch and power supply340does not store any additional power provided by the power-supply voltage322, and the energy that has already been stored by the controlled switch and power supply340is trapped within the controlled switch and power supply340except that the controlled switch and power supply340still provides power (e.g., the power-supply voltage341) to the on-time controller360. In yet another example, if the switch of the controlled switch and power supply340is open, the controlled switch and power supply340does not store any additional power provided by the power-supply voltage322, and the energy that has already been stored by the controlled switch and power supply340is blocked from leaking out through the switch of the controlled switch and power supply340even though the controlled switch and power supply340still provides power (e.g., the power-supply voltage341) to the on-time controller360.

In another embodiment, during the turn-on time period as indicated by the phase-control signal331, the switch of the controlled switch and power supply342is closed (e.g., turned on), and during the turn-off time period as indicated by the phase-control signal331, the switch of the controlled switch and power supply342is open (e.g., turned off). For example, if the switch of the controlled switch and power supply342is closed, the controlled switch and power supply342receives power provided by the power-supply voltage322and stores the received power while providing power (e.g., a power-supply voltage343) to the logic-control and gate-drive component362. In another example, if the switch of the controlled switch and power supply342is open, the controlled switch and power supply342does not store any additional power provided by the power-supply voltage322, and the energy that has already been stored by the controlled switch and power supply342is trapped within the controlled switch and power supply342except that the controlled switch and power supply342still provides power (e.g., the power-supply voltage343) to the logic-control and gate-drive component362. In yet another example, if the switch of the controlled switch and power supply342is open, the controlled switch and power supply342does not store any additional power provided by the power-supply voltage322, and the energy that has already been stored by the controlled switch and power supply342is blocked from leaking out through the switch of the controlled switch and power supply342even though the controlled switch and power supply342still provides power (e.g., the power-supply voltage343) to the logic-control and gate-drive component362.

According to one embodiment, the on-time controller360receives the reference voltage and/or current371and a current-sensing voltage383, and in response generates a control signal361. For example, the on-time controller360compares the current-sensing voltage383with a predetermined voltage limit that corresponds to a predetermined current limit. In another example, the control signal361indicates whether the current316has reached or exceeded the predetermined current limit. In another example, the control signal361is received by the logic-control and gate-drive component362, which also receives the demagnetization signal373and the power-supply voltage343. In another example, the logic-control and gate-drive component362generates a drive signal363, which is received by the switch380and the demagnetization detector372.

According to another embodiment, the demagnetization detector372receives the drive signal363and the power-supply voltage322and generates the demagnetization signal373based on at least in part on the drive signal363. For example, the drive signal363is coupled to the voltage314through the parasitic capacitor between the gate terminal392of the transistor380and the drain terminal390of the transistor380(e.g., Cgd). In another example, the demagnetization signal373indicates the beginning and the end of each demagnetization period. In another example, the demagnetization period is related to the demagnetization process of the inductive winding210.

In one embodiment, the switch380receives the drive signal363, and is closed or opened by the drive signal363. For example, the drive signal363is a pulse-width-modulation (PWM) signal, which changes between a logic low level and a logic high level. In another example, the pulse-width-modulation (PWM) signal remains at the logic high level during a pulse width. In another embodiment, if the drive signal363is at the logic high level, the switch380is turned on and thus closed, and if the drive signal363is at the logic low level, the switch380is turned off and thus opened.

In yet another embodiment, the switch380(e.g., a transistor) includes terminals390,392, and394, and the resistor382includes terminals396and398. For example, the terminal390of the transistor380is connected to the terminal310of the IC chip300, and the terminal392of the transistor380is configured to receive the drive signal363. In another example, the terminal394of the transistor380is connected to the terminal396of the resistor382, and the terminal398of the resistor382is connected to the terminal312of the IC chip300.

As shown inFIG. 3, the transistor380and the resistor382are biased between the voltage of the terminal310and the voltage of the terminal312according to certain embodiments. For example, if the transistor380is turned on, the current316flows into the IC chip300at the terminal310, through the transistor380and the resistor382, and out of the IC chip300at the terminal312. In another example, the current-sensing voltage383represents the magnitude of the current316.

According to one embodiment, the on-time controller360receives the power-supply voltage341, the reference voltage and/or current371, and the current-sensing voltage383, and generates the control signal361, and the demagnetization detector372receives the drive signal363and the power-supply voltage322and generates the demagnetization signal373. For example, the control signal361indicates whether the current316has reached or exceeded the predetermined current limit, and the demagnetization signal373indicates the beginning and the end of each demagnetization period (e.g., related to the demagnetization process of the inductive winding210). In another example, both the control signal361and the demagnetization signal373are received by the logic-control and gate-drive component362.

According to another embodiment, the logic-control and gate-drive component362uses the control signal361and the demagnetization signal373to determine the pulse width of the drive signal363. For example, if the demagnetization signal373indicates the end of a demagnetization period (e.g., related to the demagnetization process of the inductive winding210), the pulse width of the drive signal363starts and the switch380changes from being turned off to being turned on so that the current316starts to increase from zero in magnitude. In another example, if the control signal361indicates the current316has reached or exceeded the predetermined current limit, the pulse width of the drive signal363ends and the switch380changes from being turned on to being turned off so that the current316drops to zero in magnitude.

As discussed above and further emphasized here,FIG. 3is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. For example, the IC chip300also includes a bandgap circuit (e.g., a temperature-independent voltage-reference circuit). In another example, the IC chip300also includes a reference-current generator, in replacement of or in addition to the reference-voltage generator370.

According to certain embodiments, the IC chip100(e.g., the IC chip300) is an integrated circuit. For example, the IC chip100(e.g., the IC chip300) includes two or more semiconductor devices that are integrated, and has a control architecture with multiple functional blocks. In another example, the IC chip100(e.g., the IC chip300) includes no more than two terminals (e.g., the terminals110and112). In yet another example, the IC chip100can be used in various electronic systems (e.g., the LED driver200).

According to some embodiments, the IC chip100(e.g., the IC chip300) is an integrated circuit that includes no more than two terminals (e.g., pins). For example, the integrated circuit of the IC chip100includes two or more active semiconductor devices (e.g., one or more diodes and/or one or more transistors) that are integrated. In another example, the IC chip100(e.g., the IC chip300) generates an internal signal (e.g., the drive signal363), which is a pulse-width-modulation (PWM) signal. In yet another example, the IC chip100(e.g., the IC chip300) has a current-voltage characteristic between the voltage across the IC chip100and the current flowing through the IC chip100. In yet another example, the current-voltage characteristic of the IC chip100is periodic with respect to time, and within each period, the current-voltage characteristic (e.g., the current-voltage analog behavior) changes with time.

According to certain embodiments, the IC chip100(e.g., the IC chip300) includes one or more mixed-signal IC architectures, circuits and/or components. For example, the phase controller330and the logic-control and gate-drive component362each are a digital circuit. In another example, the low dropout regular320, the controlled switch and power supply340, the controlled switch and power supply342, and the reference-voltage generator370each are an analog circuit. In yet another example, the on-time controller360and the demagnetization detector372each include an analog circuit and a digital circuit.

According to some embodiments, the IC chip100(e.g., the IC chip300) is an integrated circuit that includes no more than two terminals (e.g., pins) and that also includes one or more controlled switch blocks (e.g., the controlled switch blocks140,142, and/or144) and one or more power supplies (e.g., the power supplies150,152, and/or154). For example, the IC chip100(e.g., the IC chip300) generates an internal signal (e.g., the drive signal363), which is a pulse-width-modulation (PWM) signal. In another example, the one or more controlled switch blocks (e.g., the controlled switch blocks140,142, and/or144) receive one or more corresponding phase-control signals (e.g., the phase-control signals132,134, and/or136) respectively, and are opened or closed by the one or more corresponding phase-control signals (e.g., the phase-control signals132,134, and/or136) respectively. In yet another example, the one or more controlled switch blocks (e.g., the controlled switch blocks140,142, and/or144) are opened or closed according to their respectively timing arrangements (e.g., as determined by the one or more corresponding phase-control signals respectively).

In one embodiment, if a controlled switch block (e.g., the controlled switch block140,142, or144) is closed (e.g., turned on) during a time duration, a corresponding power supply that is connected to the controlled switch block (e.g., the power supply150,152, or154) receives power through the controlled switch block and stores the received power while providing power to a corresponding function block that is connected to the power supply (e.g., the function block160,162, or164). In another embodiment, if the controlled switch block (e.g., the controlled switch block140,142, or144) is open (e.g., turned off) during another time duration, the corresponding power supply that is connected to the controlled switch block (e.g., the power supply150,152, or154) does not receive any power from the controlled switch block, and the energy stored by the corresponding power supply is trapped within this power supply, except that this power supply still provides power to the corresponding function block that is connected to this power supply (e.g., the function block160,162, or164). In yet another embodiment, if the controlled switch block (e.g., the controlled switch block140,142, or144) is open (e.g., turned off) during another time duration, the corresponding power supply that is connected to the controlled switch block (e.g., the power supply150,152, or154) does not receive any power from the controlled switch block, and the energy stored by the corresponding power supply is blocked from leaking out through the controlled switch block even though this power supply still provides power to the corresponding function block that is connected to this power supply (e.g., the function block160,162, or164).

According to certain embodiments, the IC chip100(e.g., the IC chip300) is an integrated circuit that includes no more than two terminals (e.g., pins). In one embodiment, the two-terminal IC chip100(e.g., the two-terminal IC chip300) is a controller for an electronic system (e.g., an electronic system that includes the LED driver200and the one or more LEDs290). In another embodiment, the two-terminal controller100(e.g., the two-terminal controller300) enables an electronic system to perform normal and/or stable operations even if the external conditions of the electronic system changes. For example, an electronic system includes the LED driver200and the one or more LEDs290, and the two-terminal controller100(e.g., the two-terminal controller300) keeps the current296that flows through the one or more light emitting diodes290constant with respect to time, even if the AC voltage250changes in amplitude (e.g., the peak magnitude of the AC voltage250changes from one voltage value to another voltage value).

According to some embodiments, the IC chip100(e.g., the IC chip300) is a two-terminal controller that can use a same terminal (e.g., the terminal110and/or the terminal310) as an input terminal during a time duration and as an output terminal during another time duration. For example, the two-terminal controller100(e.g., the two-terminal controller300) implements a signal processing mechanism (e.g., a signal processing algorithm), and the signal processing mechanism is used to determine the relationship between the time duration and the another time duration. In another example, during a pulse width of the pulse-width-modulation (PWM) signal363, the two-terminal controller300uses the terminal310as an output terminal to allow the current316that is larger than zero in magnitude to flow into the controller300at the terminal310and flow out of the controller300at the terminal312. In yet another example, during a pulse width of the pulse-width-modulation (PWM) signal363, the two-terminal controller100(e.g., the two-terminal controller300) outputs the current316that is larger than zero in magnitude as the drive current to the one or more light emitting diodes (LEDs)290. In yet another example, during a demagnetization period (e.g., related to the demagnetization process of the inductive winding210) that is outside the pulse width of the pulse-width-modulation (PWM) signal363, the two-terminal controller300uses the terminal310as an input terminal to receive the voltage314and process (e.g., detect and/or sample) the received voltage314to determine the end of the demagnetization period, which corresponds to the beginning of the next pulse width. In yet another example, the voltage314is coupled to the drive signal363through the parasitic capacitor between the gate terminal392of the transistor380and the drain terminal390of the transistor380(e.g., Cgd).

According to some embodiments, the IC chip100(e.g., the IC chip300) is a two-terminal controller that can adaptively change its output (e.g., the current and/or voltage116, the current254, and/or the current316) in response to the change of its input (e.g., the current and/or voltage114, the voltage256, and/or the voltage314), so that an electronic system (e.g., an electronic system including the LED driver200, the one or more LEDs290, and the two-terminal controller100) can perform normal and/or stable operations (e.g., keep the current296that flows through the one or more light emitting diodes290constant with respect to time). For example, in response to the change in amplitude of its input (e.g., the change in peak magnitude of the current and/or voltage114, the voltage256, and/or the voltage314), the IC chip100(e.g., the IC chip300) changes its output (e.g., the current and/or voltage116, the current254, and/or the current316) through a control mechanism (e.g., by changing the pulse width and/or the duty cycle of the drive signal363) so that the current296that flows through the one or more light emitting diodes290remains constant with respect to time.

In another example, if the AC voltage250changes in amplitude (e.g., the peak magnitude of the AC voltage250changes from one voltage value to another voltage value), the amplitude of the current and/or voltage114, the voltage256, and/or the voltage314(e.g., the peak magnitude of the current and/or voltage114, the voltage256, and/or the voltage314) also changes. In yet another example, if the amplitude of the current and/or voltage114, the voltage256, and/or the voltage314becomes smaller, the pulse width and/or the duty cycle of the drive signal363becomes larger so that the current296that flows through the one or more light emitting diodes290remains constant with respect to time.

In yet another example, the two-terminal controller100(e.g., the two-terminal controller300) adaptively changes its output (e.g., the current and/or voltage116, the current254, and/or the current316) in response to the change of its input (e.g., the current and/or voltage114, the voltage256, and/or the voltage314) by changing a relationship (e.g., the current-voltage characteristic of the IC chip100as shown in Equation 1) between the controller input and the controller output, so that the current296that flows through the one or more light emitting diodes290remains constant with respect to time. In another example, without such change in the relationship, the relationship between the controller input and the controller output varies with time periodically; in contrast, with such change in the relationship, the relationship between the controller input and the controller output varies with time but not periodically.

According to another embodiment, a two-terminal IC chip (e.g., the IC chip100and/or the IC chip300) includes a first chip terminal (e.g., the terminal110and/or the terminal310) and a second chip terminal (e.g., the terminal112and/or the terminal312). A first terminal voltage (e.g., the voltage256) is a voltage of the first chip terminal, a second terminal voltage is a voltage of the second chip terminal, and a chip voltage (e.g., the voltage Vchipacross the IC chip100) is equal to a difference between the first terminal voltage and the second terminal voltage. The chip is configured to allow a chip current (e.g., the current254) to flow into the chip at the first chip terminal and out of the chip at the second chip terminal, or to flow into the chip at the second chip terminal and out of the chip at the first chip terminal. The chip current is larger than or equal to zero in magnitude. The chip is further configured to change a relationship (e.g., the current-voltage characteristic of the IC chip100as shown in Equation 1) between the chip voltage and the chip current with respect to time. The chip (e.g., the IC chip100and/or the IC chip300) is an integrated circuit, and the chip does not include any additional chip terminal other than the first chip terminal (e.g., the terminal110and/or the terminal310) and the second chip terminal (e.g., the terminal112and/or the terminal312). For example, the two-terminal IC chip is implemented according to at leastFIG. 1,FIG. 2, and/orFIG. 3.

In another example, the two-terminal IC chip is further configured to periodically change the relationship (e.g., the current-voltage characteristic of the IC chip100as shown in Equation 1) between the chip voltage and the chip current with respect to time, and within each period, change the relationship between the chip voltage and the chip current with respect to time. In yet another example, the two-terminal IC chip also includes a switch (e.g., the switch380) and a resistor (e.g., the resistor382) coupled to the switch. The switch is configured to receive a drive signal (e.g., the drive signal363), and be opened or closed in response to the drive signal. The chip is further configured to, in response to the switch being opened, change the chip current (e.g., the current254) from being larger than zero to being equal to zero in magnitude, and in response to the switch being closed, change the chip current (e.g., the current254) from being equal to zero to being larger than zero in magnitude.

In yet another example, the chip is further configured to, in response to the switch being closed, allow the chip current to flow through the switch and the resistor. The chip current being larger than zero in magnitude. In yet another example, the drive signal (e.g., the drive signal363) is a pulse-width-modulation signal corresponding to a pulse width for each modulation period. In yet another example, the two-terminal IC chip also includes a driver (e.g., the driver362) configured to receive a first signal (e.g., the demagnetization signal373) and a second signal (e.g., the control signal361) and generate the drive signal (e.g., the drive signal363). The driver is further configured to, in response to the first signal (e.g., the demagnetization signal373) indicating an end of a demagnetization period, change the drive signal to start the pulse width, and in response to the second signal (e.g., the control signal361) indicating the chip current (e.g., the current254) has reached or exceeded a predetermined current limit, change the drive signal to end the pulse width. In yet another example, the driver is further configured to, in response to the first signal indicating the end of the demagnetization period, change the drive signal to close the switch and increase the chip current (e.g., the current254) from zero in magnitude, and in response to the second signal indicating the chip current has reached or exceeded the predetermined current limit, change the drive signal to open the switch and decrease the chip current to zero in magnitude.

In yet another example, the first chip terminal (e.g., the terminal110and/or the terminal310) is coupled to a first winding terminal (e.g., the terminal212) of an inductive winding (e.g., the inductive winding210) and a first diode terminal (e.g., the terminal224) of a diode (e.g., the diode220). The inductive winding further includes a second winding terminal (e.g., the terminal214), and the diode further includes a second diode terminal (e.g., the terminal222). A series of one or more light emitting diodes (e.g., the one or more LEDs290) is coupled to the second winding terminal and the second diode terminal. The second winding terminal and the second diode terminal are configured to receive a rectified AC voltage (e.g., the rectified voltage252). In yet another example, the two-terminal IC chip is further configured to receive the first terminal voltage (e.g., the voltage256) at the first chip terminal (e.g., the terminal110and/or the terminal310) and generate the chip current (e.g., the current254) based at least in part on the first terminal voltage. In yet another example, the chip current (e.g., the current254) is configured to flow between the first chip terminal and the second chip terminal to affect a light-emitting-diode current (e.g., the current296) flowing through the series of the one or more light emitting diodes (e.g., the one or more LEDs290). In yet another example, the two-terminal IC chip is further configured to change the chip current (e.g., the current254) with respect to time to keep the light-emitting-diode current (e.g., the current296) constant with respect to time. In yet another example, the two-terminal IC chip (e.g., the IC chip100and/or the IC chip300) is further configured to periodically change the chip current (e.g., the current254) with respect to time and within each period, change the chip current (e.g., the current254) with respect to time, to keep the light-emitting-diode current (e.g., the current296) constant with respect to time.

In yet another example, the two-terminal IC chip (e.g., the IC chip100and/or the IC chip300) also includes a controlled switch (e.g., the controlled switch140, the controlled switch142, and/or the controlled switch144) configured to receive a control signal (e.g., the phase-control signal132, the phase-control signal134, the phase-control signal136, and/or the phase-control signal331), and a power supply (e.g., the power supply150, the power supply152, and/or the power supply154) coupled to the controlled switch. The controlled switch is further configured to be closed during a first time duration in response to the control signal, and to be open during a second time duration in response to the control signal. The power supply is configured to, in response to the controlled switch being closed, receive a first power (e.g., the voltage and/or current141, the voltage and/or current143, and/or the voltage and/or current145) through the controlled switch and store the received first power during the first time duration, and in response to the controlled switch being open, not store any additional power and not allow stored power to leak out through the controlled switch during the second time duration. The power supply (e.g., the power supply150, the power supply152, and/or the power supply154) is further configured to output a second power (e.g., the voltage and/or current151, the voltage and/or current153, the voltage and/or current155, the power-supply voltage341, and/or the power-supply voltage343) during the first time duration and the second time duration. In yet another example, the chip voltage (e.g., the voltage Vchipacross the IC chip100) is equal to the first terminal voltage minus the second terminal voltage.

According to yet another embodiment, a two-terminal IC chip (e.g., the IC chip100and/or the IC chip300) includes a first chip terminal (e.g., the terminal110and/or the terminal310), a second chip terminal (e.g., the terminal112and/or the terminal312), and a first switch (e.g., the switch380). The chip is configured to allow a chip current (e.g., the current254) to flow into the chip at the first chip terminal and out of the chip at the second chip terminal, or to flow into the chip at the second chip terminal and out of the chip at the first chip terminal. The chip current is larger than or equal to zero in magnitude. The first switch is configured to receive a drive signal (e.g., the drive signal363) and be opened or closed in response to the drive signal. The chip is further configured to, in response to the first switch being opened, change the chip current from being larger than zero to being equal to zero in magnitude, and in response to the first switch being closed, change the chip current from being equal to zero to being larger than zero in magnitude. The chip is an integrated circuit, and the chip does not include any additional chip terminal other than the first chip terminal (e.g., the terminal110and/or the terminal310) and the second chip terminal (e.g., the terminal112and/or the terminal312). For example, the two-terminal IC chip is implemented according to at leastFIG. 1,FIG. 2, and/orFIG. 3.

In another example, the drive signal (e.g., the drive signal363) is a pulse-width-modulation signal corresponding to a pulse width for each modulation period. In yet another example, the two-terminal IC chip also includes a driver (e.g., the driver362) configured to receive a first signal (e.g., the demagnetization signal373) and a second signal (e.g., the control signal361) and generate the drive signal (e.g., the drive signal363). The driver is further configured to, in response to the first signal (e.g., the demagnetization signal373) indicating an end of a demagnetization period, change the drive signal to start the pulse width, and in response to the second signal (e.g., the control signal361) indicating the chip current (e.g., the current254) has reached or exceeded a predetermined current limit, change the drive signal to end the pulse width. In yet another example, the driver is further configured to, in response to the first signal indicating the end of the demagnetization period, change the drive signal to close the first switch and increase the chip current (e.g., the current254) from zero in magnitude, and in response to the second signal indicating the chip current has reached or exceeded the predetermined current limit, change the drive signal to open the first switch and decrease the chip current to zero in magnitude.

In yet another example, the first chip terminal (e.g., the terminal110and/or the terminal310) is coupled to a first winding terminal (e.g., the terminal212) of an inductive winding (e.g., the inductive winding210) and a first diode terminal (e.g., the terminal224) of a diode (e.g., the diode220). The inductive winding further includes a second winding terminal (e.g., the terminal214), and the diode further includes a second diode terminal (e.g., the terminal222). A series of one or more light emitting diodes (e.g., the one or more LEDs290) is coupled to the second winding terminal and the second diode terminal. The second winding terminal and the second diode terminal are configured to receive a rectified AC voltage (e.g., the rectified voltage252).

In yet another example, the two-terminal IC chip is further configured to receive an input voltage (e.g., the voltage256) at the first chip terminal (e.g., the terminal110and/or the terminal310) and generate the chip current (e.g., the current254) based at least in part on the received input voltage. In yet another example, the chip current (e.g., the current254) is configured to flow between the first chip terminal and the second chip terminal to affect a light-emitting-diode current (e.g., the current296) flowing through the series of the one or more light emitting diodes (e.g., the one or more LEDs290). In yet another example, the two-terminal IC chip is further configured to change the chip current (e.g., the current254) with respect to time to keep the light-emitting-diode current (e.g., the current296) constant with respect to time. In yet another example, the two-terminal IC chip (e.g., the IC chip100and/or the IC chip300) is further configured to periodically change the chip current (e.g., the current254) with respect to time and within each period, change the chip current (e.g., the current254) with respect to time, to keep the light-emitting-diode current (e.g., the current296) constant with respect to time.

In yet another example, the two-terminal IC chip (e.g., the IC chip100and/or the IC chip300) also includes a second switch (e.g., the switch140, the switch142, and/or the switch144) configured to receive a control signal (e.g., the phase-control signal132, the phase-control signal134, the phase-control signal136, and/or the phase-control signal331), and a power supply (e.g., the power supply150, the power supply152, and/or the power supply154) coupled to the second switch. The second switch is further configured to be closed during a first time duration in response to the control signal, and to be open during a second time duration in response to the control signal. The power supply is configured to, in response to the second switch being closed, receive a first power (e.g., the voltage and/or current141, the voltage and/or current143, and/or the voltage and/or current145) through the second switch and store the received first power during the first time duration, and in response to the second switch being open, not store any additional power and not allow stored power to leak out through the second switch during the second time duration. The power supply (e.g., the power supply150, the power supply152, and/or the power supply154) is further configured to output a second power (e.g., the voltage and/or current151, the voltage and/or current153, the voltage and/or current155, the power-supply voltage341, and/or the power-supply voltage343) during the first time duration and the second time duration.

According to yet another embodiment, a two-terminal IC chip (e.g., the IC chip100and/or the IC chip300) includes a first chip terminal (e.g., the terminal110and/or the terminal310), a second chip terminal (e.g., the terminal112and/or the terminal312), a first switch (e.g., the switch140, the switch142, and/or the switch144) configured to receive a first signal (e.g., the phase-control signal132, the phase-control signal134, the phase-control signal136, and/or the phase-control signal331), and a first power supply (e.g., the power supply150, the power supply152, and/or the power supply154) coupled to the first switch. The first switch is configured to be closed during a first time duration in response to the first signal, and to be open during a second time duration in response to the first signal. The first power supply (e.g., the power supply150, the power supply152, and/or the power supply154) is configured to, in response to the first switch (e.g., the switch140, the switch142, and/or the switch144) being closed, receive a first power (e.g., the voltage and/or current141, the voltage and/or current143, and/or the voltage and/or current145) through the first switch and store the received first power during the first time duration, and in response to the first switch being open, not store any additional power and not allow the stored power to leak out through the first switch during the second time duration. The first power supply (e.g., the power supply150, the power supply152, and/or the power supply154) is further configured to output a second power (e.g., the voltage and/or current151, the voltage and/or current153, the voltage and/or current155, the power-supply voltage341, and/or the power-supply voltage343) during the first time duration and the second time duration. A first terminal voltage (e.g., the voltage256) is a voltage of the first chip terminal (e.g., the terminal110and/or the terminal310), a second terminal voltage is a voltage of the second chip terminal (e.g., the terminal112and/or the terminal312), and a chip voltage (e.g., the voltage Vchipacross the IC chip100) is equal to a difference between the first terminal voltage and the second terminal voltage. The chip is configured to allow a chip current (e.g., the current254) to flow into the chip at the first chip terminal and out of the chip at the second chip terminal, or to flow into the chip at the second chip terminal and out of the chip at the first chip terminal. The chip current is larger than or equal to zero in magnitude. The chip (e.g., the IC chip100and/or the IC chip300) is further configured to, based at least in part on the second power (e.g., the voltage and/or current151, the voltage and/or current153, the voltage and/or current155, the power-supply voltage341, and/or the power-supply voltage343), generate at least one selected from a group consisting of the chip voltage (e.g., the voltage Vchipacross the IC chip100) and the chip current (e.g., the current254). The chip (e.g., the IC chip100and/or the IC chip300) is an integrated circuit, and the chip does not include any additional chip terminal other than the first chip terminal (e.g., the terminal110and/or the terminal310) and the second chip terminal (e.g., the terminal112and/or the terminal312). For example, the two-terminal IC chip is implemented according to at leastFIG. 1,FIG. 2, and/orFIG. 3.

In another example, the two-terminal IC chip also includes a driver (e.g., the driver362) configured to receive the second power (e.g., the power-supply voltage343) and generate a drive signal (e.g., the drive signal363), and a second switch (e.g., the switch380) configured to receive the drive signal and be opened or closed in response to the drive signal. The chip is further configured to, in response to the switch being opened, change the chip current (e.g., the current254) from being larger than zero to being equal to zero in magnitude, and in response to the switch being closed, change the chip current (e.g., the current254) from being equal to zero to being larger than zero in magnitude.

In yet another example, the drive signal (e.g., the drive signal363) is a pulse-width-modulation signal corresponding to a pulse width for each modulation period. In yet another example, the two-terminal IC chip further includes a controller (e.g., the phase controller130and/or the phase controller330) configured to generate the first signal (e.g., the phase-control signal132, the phase-control signal134, the phase-control signal136, and/or the phase-control signal331). The first signal (e.g., the phase-control signal132, the phase-control signal134, the phase-control signal136, and/or the phase-control signal331) is at a first logic level during the first time duration, and the first signal is at a second logic level during the second time duration. The second logic level is different from the first logic level.

In yet another example, the two-terminal IC chip (e.g., the IC chip100and/or the IC chip300) also includes a second power supply (e.g., the internal power supply120and/or the low dropout regular320). The second power supply is configured to receive a third power (e.g., the current and/or voltage114, the voltage256, and/or the voltage314) from the first chip terminal (e.g., the terminal110and/or the terminal310), generate a fourth power (e.g., the power-supply voltage and/or current122and/or the power-supply voltage322) based at least in part on the third power, and output the fourth power to the controller (e.g., the phase controller130and/or the phase controller330) and the first switch (e.g., the switch140, the switch142, and/or the switch144). In yet another example, the first switch (e.g., the switch140, the switch142, and/or the switch144) is further configured to, in response to the first switch being closed, output the first power (e.g., the voltage and/or current141, the voltage and/or current143, and/or the voltage and/or current145) based at least in part on the fourth power (e.g., the power-supply voltage and/or current122and/or the power-supply voltage322).

In yet another example, the first chip terminal (e.g., the terminal110and/or the terminal310) is coupled to a first winding terminal (e.g., the terminal212) of an inductive winding (e.g., the inductive winding210) and a first diode terminal (e.g., the terminal224) of a diode (e.g., the diode220). The inductive winding further includes a second winding terminal (e.g., the terminal214), and the diode further includes a second diode terminal (e.g., the terminal222). A series of one or more light emitting diodes (e.g., the one or more LEDs290) is coupled to the second winding terminal and the second diode terminal. The second winding terminal and the second diode terminal are configured to receive a rectified AC voltage (e.g., the rectified voltage252). In yet another example, the chip voltage (e.g., the voltage Vchipacross the IC chip100) is equal to the first terminal voltage minus the second terminal voltage.

According to yet another embodiment, a two-terminal IC chip (e.g., the IC chip100and/or the IC chip300) includes a first chip terminal (e.g., the terminal110and/or the terminal310) and a second chip terminal (e.g., the terminal112and/or the terminal312). The first chip terminal is coupled to a first winding terminal (e.g., the terminal212) of an inductive winding (e.g., the inductive winding210) and a first diode terminal (e.g., the terminal224) of a diode (e.g., the diode220). The inductive winding further includes a second winding terminal (e.g., the terminal214), and the diode further includes a second diode terminal (e.g., the terminal222). A series of one or more light emitting diodes (e.g., the one or more LEDs290) is coupled to the second winding terminal and the second diode terminal. The second winding terminal and the second diode terminal are configured to receive a rectified AC voltage (e.g., the rectified voltage252). The chip (e.g., the IC chip100and/or the IC chip300) is configured to receive an input voltage (e.g., the voltage256) at the first chip terminal and generate a chip current (e.g., the current254) based at least in part on the input voltage, and the chip current is larger than or equal to zero in magnitude. Additionally, the chip is further configured to allow the chip current to flow into the chip at the first chip terminal and out of the chip at the second chip terminal, or to flow into the chip at the second chip terminal and out of the chip at the first chip terminal, and change the chip current with respect to time to keep the light-emitting-diode current (e.g., the current296) constant with respect to time even if the input voltage (e.g., the voltage256) changes within a voltage range and a temperature for the chip (e.g., the temperature of the IC chip100and/or the IC chip300) changes within a temperature range. The chip (e.g., the IC chip100and/or the IC chip300) is an integrated circuit, and the chip does not include any additional chip terminal other than the first chip terminal and the second chip terminal. For example, the two-terminal IC chip is implemented according to at leastFIG. 1,FIG. 2, and/orFIG. 3.

In another example, the two-terminal IC chip is further configured to periodically change the chip current with respect to time and within each period, change the chip current with respect to time, to keep the light-emitting-diode current constant with respect to time even if the input voltage changes within the voltage range and the temperature for the chip changes within the temperature range. In yet another example, the temperature range includes an upper temperature limit equal to 150° C. and a lower temperature limit equal to −40° C. In yet another example, the voltage range includes an upper voltage limit equal to 370 V and a lower voltage limit equal to 126 V.

According to yet another embodiment, a two-terminal IC chip (e.g., the IC chip100and/or the IC chip300) for an electronic system (e.g., the LED driver200) includes a first chip terminal (e.g., the terminal110and/or the terminal310) and a second chip terminal (e.g., the terminal112and/or the terminal312). The first chip terminal is coupled to one or more components (e.g., the inductive winding210and/or the diode220) of the electronic system (e.g., the LED driver200). The electronic system (e.g., the LED driver200) is configured to receive a first signal (e.g., the AC voltage250) and generate a second signal (e.g., the current296) based on at least information associated with the first signal. The chip (e.g., the IC chip100and/or the IC chip300) is configured to receive an input voltage (e.g., the voltage256) at the first chip terminal (e.g., the terminal110) and generate a chip current (e.g., the current254) based at least in part on the input voltage. The chip current is larger than or equal to zero in magnitude. Additionally, the chip is further configured to allow the chip current to flow into the chip at the first chip terminal and out of the chip at the second chip terminal, or to flow into the chip at the second chip terminal and out of the chip at the first chip terminal, and change the chip current with respect to time to keep the electronic system (e.g., the LED driver200) operating normally even if the first signal (e.g., the AC voltage250) changes. The chip is an integrated circuit, and the chip does not include any additional chip terminal other than the first chip terminal and the second chip terminal. For example, the two-terminal IC chip is implemented according to at leastFIG. 1,FIG. 2, and/orFIG. 3.

In another example, the two-terminal IC chip (e.g., the IC chip100and/or the IC chip300) is further configured to periodically change the chip current with respect to time and within each period, change the chip current with respect to time, to keep the electronic system (e.g., the LED driver200) operating normally even if the first signal changes. In another example, the first signal is a voltage signal (e.g., the AC voltage250), and the second signal is a current signal (e.g., the current296). In yet another example, the two-terminal IC chip is further configured to change the chip current with respect to time to keep the current signal (e.g., the current296) constant in magnitude with respect to time even if the voltage signal (e.g., the AC voltage250) changes in magnitude. In yet another example, the two-terminal IC chip is further configured to periodically change the chip current with respect to time and within each period, change the chip current with respect to time, to keep the current signal (e.g., the current296) constant in magnitude with respect to time even if the voltage signal (e.g., the AC voltage250) changes in magnitude. In yet another example, the two-terminal IC chip (e.g., the IC chip100and/or the IC chip300) is a controller for the electronic system (e.g., the LED driver200).

FIG. 4is a simplified diagram showing an IC chip according to yet another embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. The IC chip400includes terminals410and412, a low dropout regulator420, capacitors450,452and454, switches464,466and468, a comparator460, NOR gates484and486, NOT gates446and448, a delay control component438(e.g., a delay controller), a reference-voltage generator470, a demagnetization detector472, a switch480(e.g., a transistor), and a resistor482.

For example, the NOR gates484and486, the NOT gates446and448, and the delay control component438(e.g., a delay controller) are parts of a logic-control and gate-drive component462(e.g., a logic controller and driver). In another example, the capacitor466and the switch452are parts of a controlled switch and power supply440. In yet another example, the capacitor464and the switch450are parts of a controlled switch and power supply442. In yet another example, the capacitor468and the switch454are parts of a controlled switch and voltage supply444.

According to one embodiment, the IC chip400is the IC chip100and/or the IC chip300. For example, the terminal410is the terminal110and/or the terminal310, and the terminal412is the terminal112and/or the terminal312. In another example, the low dropout regulator420is the internal power supply120and/or the low dropout regular320. In yet another example, the controlled switch and power supply440is a combination of the controlled switch block140and the power supply150, and the controlled switch and power supply442is a combination of the controlled switch block142and the power supply152. In yet another example, the controlled switch and power supply440is the controlled switch and power supply340, and the controlled switch and power supply442is the controlled switch and power supply342.

In yet another example, the comparator460is the function block160and/or the on-time controller360. In yet another example, the logic-control and gate-drive component462(e.g., a logic controller and driver) is the logic-control and gate-drive component362and/or the function block162. In yet another example, the reference-voltage generator470is the function block170and/or the reference-voltage generator370. In yet another example, the demagnetization detector472is another function block170and/or the demagnetization detector372.

According to another embodiment, the IC chip400is the IC chip100that is used in the LED driver200as shown inFIG. 2, the terminal410is the terminal110as shown inFIG. 2, and the terminal412is the terminal112as shown inFIG. 2. According to yet another embodiment, the IC chip400is the IC chip300that is used in the LED driver200as shown inFIG. 2.

In one embodiment, the terminal410receives a voltage414(e.g., the current and/or voltage114, the voltage256, or the voltage314) from outside the IC chip400, and the terminal412outputs a current416(e.g., the current and/or voltage116, the current254, or the current316) to outside the IC chip400. For example, the current416is larger than or equal to zero in magnitude. In another example, the voltage414is received by the low dropout regulator420and the switch480. In another example, the switch480is a transistor (e.g., MOSFET). In another embodiment, the low dropout regulator420receives the voltage414, and in response outputs a power-supply voltage422to the controlled switch and power supply440, the controlled switch and power supply442, the reference-voltage generator470, and the demagnetization detector472.

According to one embodiment, the reference-voltage generator470outputs a reference voltage and/or current471(e.g., a reference voltage) to the controlled switch and power supply442. According to another embodiment, the demagnetization detector472outputs a demagnetization signal473to the logic-control and gate-drive component462(e.g., a logic controller and driver). For example, the demagnetization signal473indicates the beginning and the end of each demagnetization period. In another example, the demagnetization period is related to a demagnetization process of the inductive winding210.

According to another embodiment, a phase-control signal431is received by the controlled switch and power supply440, the controlled switch and power supply442, and the controlled switch and voltage supply444. For example, the controlled switch and power supply440includes the switch466and the capacitor452. In another example, the controlled switch and power supply442includes the switch464and the capacitor450. In yet another example, the controlled switch and voltage supply444includes the switch468and the capacitor454.

According to yet another embodiment, the phase-control signal431indicates the beginning and the end of each turn-on time period and the beginning and the end of each turn-off time period. For example, the phase-control signal431is at a logic level (e.g., a logic high level) during each turn-on period (e.g., from the beginning to the end of each turn-on time period), and is at another logic level (e.g., a logic low level) during each turn-off time period (e.g., from the beginning to the end of each turn-off time period).

In one embodiment, during the turn-on time period as indicated by the phase-control signal431, the switch466of the controlled switch and power supply440is closed (e.g., turned on), and during the turn-off time period as indicated by the phase-control signal431, the switch466of the controlled switch and power supply440is open (e.g., turned off). For example, if the switch466of the controlled switch and power supply440is closed, the capacitor452of the controlled switch and power supply440receives power provided by the power-supply voltage422and stores the received power (e.g., charges) while providing power (e.g., a power-supply voltage441) to the comparator460. In another example, if the switch466of the controlled switch and power supply440is open, the capacitor452of the controlled switch and power supply440does not store any additional power provided by the power-supply voltage422, and the energy that has already been stored by the capacitor452of the controlled switch and power supply440is trapped within the controlled switch and power supply440except that the capacitor452of the controlled switch and power supply440still provides power (e.g., the power-supply voltage441) to the comparator460. In yet another example, if the switch466of the controlled switch and power supply440is open, the capacitor452of the controlled switch and power supply440does not store any additional power provided by the power-supply voltage422, and the energy that has already been stored by the capacitor452of the controlled switch and power supply440is blocked from leaking out through the switch466of the controlled switch and power supply440even though the capacitor452of the controlled switch and power supply440still provides power (e.g., the power-supply voltage441) to the comparator460.

In another embodiment, during the turn-on time period as indicated by the phase-control signal431, the switch464of the controlled switch and power supply442is closed (e.g., turned on), and during the turn-off time period as indicated by the phase-control signal431, the switch464of the controlled switch and power supply442is open (e.g., turned off). For example, if the switch464of the controlled switch and power supply442is closed, the capacitor450of the controlled switch and power supply442receives power provided by the power-supply voltage422and stores the received power (e.g., charges) while providing power (e.g., a power-supply voltage443) to the logic-control and gate-drive component462(e.g., a logic controller and driver). In another example, if the switch464of the controlled switch and power supply442is open, the capacitor450of the controlled switch and power supply442does not store any additional power provided by the power-supply voltage422, and the energy that has already been stored by the capacitor450of the controlled switch and power supply442is trapped within the controlled switch and power supply442except that the capacitor450of the controlled switch and power supply442still provides power (e.g., the power-supply voltage443) to the logic-control and gate-drive component462(e.g., a logic controller and driver). In yet another example, if the switch464of the controlled switch and power supply442is open, the capacitor450of the controlled switch and power supply442does not store any additional power provided by the power-supply voltage422, and the energy that has already been stored by the capacitor450of the controlled switch and power supply442is blocked from leaking out through the switch464of the controlled switch and power supply442even though the capacitor450of the controlled switch and power supply442still provides power (e.g., the power-supply voltage443) to the logic-control and gate-drive component462(e.g., a logic controller and driver).

In yet another embodiment, during the turn-on time period as indicated by the phase-control signal431, the switch468of the controlled switch and voltage supply444is closed (e.g., turned on), and during the turn-off time period as indicated by the phase-control signal431, the switch468of the controlled switch and voltage supply444is open (e.g., turned off). For example, if the switch468of the controlled switch and voltage supply444is closed, the capacitor454of the controlled switch and voltage supply444receives power provided by the reference voltage and/or current471(e.g., the reference voltage) and stores the received power (e.g., charges) while providing a threshold voltage445to the comparator460. In another example, if the switch468of the controlled switch and voltage supply444is open, the capacitor454of the controlled switch and voltage supply444does not store any additional power provided by the reference voltage and/or current471(e.g., the reference voltage), and the energy that has already been stored by the capacitor454of the controlled switch and voltage supply444is trapped within the controlled switch and voltage supply444except that the capacitor454of the controlled switch and voltage supply444still provides the threshold voltage445to the comparator460. In yet another example, if the switch468of the controlled switch and voltage supply444is open, the capacitor454of the controlled switch and voltage supply444does not store any additional power provided by the reference voltage and/or current471(e.g., the reference voltage), and the energy that has already been stored by the capacitor454of the controlled switch and voltage supply444is blocked from leaking out through the switch468of the controlled switch and voltage supply444even though the capacitor454of the controlled switch and voltage supply444still provides the threshold voltage445to the comparator460.

According to one embodiment, the comparator460includes terminals602,604,606, and608. In one embodiment, the terminal602is used as a power input, the terminal604is used as a non-inverting input, and the terminal606is used as an inverting input. For example, the comparator460receives the power-supply voltage441at the terminal602, receives a current-sensing voltage483at the terminal604, and receives the threshold voltage445at the terminal606. In another embodiment, the terminal608is used as an output. For example, the comparator460generates a control signal461and outputs the control signal461at the terminal608. In yet another embodiment, the comparator460compares the current-sensing voltage483with the threshold voltage445, and the threshold voltage445represents a predetermined voltage limit that corresponds to a predetermined current limit. For example, the control signal461indicates whether the current416has reached or exceeded the predetermined current limit. In another example, the control signal461is received by the logic-control and gate-drive component462(e.g., a logic controller and driver), which also receives the demagnetization signal473and the power-supply voltage443. In yet another example, the logic-control and gate-drive component462(e.g., a logic controller and driver) generates a drive signal463, which is received by the switch480and the demagnetization detector472.

According to another embodiment, the demagnetization detector472receives the drive signal463and the power-supply voltage422and generates the demagnetization signal473based on at least in part on the drive signal463. For example, the drive signal463is coupled to the voltage414through the parasitic capacitor between the gate terminal492of the transistor480and the drain terminal490of the transistor480(e.g., Cgd). In another example, the demagnetization signal473indicates the beginning and the end of each demagnetization period. In another example, the demagnetization period is related to the demagnetization process of the inductive winding210.

In one embodiment, the switch480receives the drive signal463, and is closed or opened by the drive signal463. For example, the drive signal463is a pulse-width-modulation (PWM) signal, which changes between a logic low level and a logic high level. In another example, the pulse-width-modulation (PWM) signal remains at the logic high level during a pulse width (e.g., during an on-time period of the drive signal463). In another embodiment, if the drive signal463is at the logic high level, the switch480is turned on and thus closed, and if the drive signal463is at the logic low level, the switch480is turned off and thus opened.

In yet another embodiment, the switch480(e.g., a transistor) includes terminals490,492, and494, and the resistor482includes terminals496and498. For example, the terminal490of the transistor480is connected to the terminal410of the IC chip400, and the terminal492of the transistor480is configured to receive the drive signal463. In another example, the terminal494of the transistor480is connected to the terminal496of the resistor482, and the terminal498of the resistor482is connected to the terminal412of the IC chip400.

As shown inFIG. 4, the transistor480and the resistor482are biased between the voltage of the terminal410and the voltage of the terminal412according to certain embodiments. For example, if the transistor480is turned on, the current416flows into the IC chip400at the terminal410, through the transistor480and the resistor482, and out of the IC chip400at the terminal412. In another example, the current-sensing voltage483represents the magnitude of the current416.

According to one embodiment, the comparator360receives the power-supply voltage441, the threshold voltage445, and the current-sensing voltage483, and generates the control signal461, and the demagnetization detector472receives the drive signal463and the power-supply voltage422and generates the demagnetization signal473. For example, the control signal461is at the logic high level if the current-sensing voltage483is larger than the threshold voltage445in magnitude, and the control signal461is at the logic low level if the current-sensing voltage483is smaller than the threshold voltage445in magnitude. In another example, the control signal361indicates whether the current416has reached or exceeded the predetermined current limit, and the demagnetization signal473indicates the beginning and the end of each demagnetization period (e.g., related to the demagnetization process of the inductive winding210). In yet another example, both the control signal461and the demagnetization signal473are received by the logic-control and gate-drive component462(e.g., a logic controller and driver).

According to another embodiment, the logic-control and gate-drive component462(e.g., a logic controller and driver) uses the control signal461and the demagnetization signal473to determine the pulse width of the drive signal463(e.g., the on-time period of the drive signal463). For example, if the demagnetization signal473indicates the end of a demagnetization period (e.g., related to the demagnetization process of the inductive winding210), the pulse width of the drive signal463(e.g., the on-time period of the drive signal463) starts and the switch480changes from being turned off to being turned on so that the current416starts to increase from zero in magnitude. In another example, if the control signal461indicates the current416has reached or exceeded the predetermined current limit, the pulse width of the drive signal463(e.g., the on-time period of the drive signal463) ends, the switch492changes from being turned on to being turned off, and the off-time period of the drive signal463starts. In yet another example, during the off-time period of the drive signal463, the current416drops to zero in magnitude.

As discussed above and further emphasized here,FIG. 4is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. For example, the IC chip400also includes a bandgap circuit (e.g., a temperature-independent voltage-reference circuit). In another example, the IC chip400also includes a reference-current generator, in replacement of or in addition to the reference-voltage generator470.

As shown inFIG. 4, the control mechanism is performed by the comparator460, the demagnetization detector472, and the logic controller and driver462according to certain embodiments. For example, the drive signal463generated by the logic controller and driver462is used to turn on or off the transistor480. In another example, when the transistor480is turned on, the current-sensing voltage483ramps up. In yet another example, if the current-sensing voltage483becomes higher than the threshold voltage445, the comparator460toggles and forces the control signal461to change from the logic high level to the logic low level. In yet another example, if the control signal461changes to the logic low level, the drive signal463also changes to turn off the transistor480, ending the on-time period of the drive signal463and starting the off-time period of the drive signal463. In yet another example, if the demagnetization signal473indicates the end of a demagnetization period (e.g., related to the demagnetization process of the inductive winding210), the drive signal463changes to turn on the transistor480, ending the off-time period of the drive signal463and starting the on-time period of the drive signal463. In yet another example, each cycle of the drive signal463includes an on-time period of the drive signal463and an off-time period of the drive signal463.

In one embodiment, the controlled switch and power supply440includes the switch466and the capacitor452, and is used to store additional charges at the capacitor452when the switch466is closed, so that the comparator460can still be powered up and work property even when the external AC power (e.g., the AC voltage250) becomes unavailable. In another embodiment, the controlled switch and power supply442includes the switch464and the capacitor450, and is used to store additional charges at the capacitor450when the switch464is closed, so that the logic controller and driver462can still be powered up and work property even when the external AC power (e.g., the AC voltage250) becomes unavailable. In yet another embodiment, the controlled switch and voltage supply444includes the switch468and the capacitor454, and is used to store additional charges at the capacitor454when the switch468is closed, so that the threshold voltage445can still be provided even when the external AC power (e.g., the AC voltage250) becomes unavailable.

According to one embodiment, to properly control dissipation of stored charges on the capacitor452, the comparator460can operate under a wide range of the power-supply voltage441, and the comparator460also has low power consumption. For example, the Miller plateau impact of the transistor480is also reduced by using a large-size transistor as the switch480.

According to another embodiment, the logic controller and driver462includes the NOR gates484and486, the NOT gates446and448, and the delay control component438(e.g., a delay controller). In one embodiment, the NOR gate484receives the control signal461, and the NOR gate486receives the demagnetization signal473. For example, the NOR gate484outputs a signal485to the NOT gate446, which in response generates a signal447. In another example, the signal447is received by the NOT gate448and the delay controller438. In another embodiment, the NOT gate448receives the signal447, and in response generates the drive signal463. For example, the signal447and the drive signal463are complementary signals. In another example, if the drive signal463is at the logic high level, the signal447is at the logic low level, and if the drive signal463is at the logic low level, the signal447is at the logic high level.

According to yet another embodiment, the delay controller438receives the signal447and generates the phase-control signal431that is the signal447with a predetermined delay. In one embodiment, if the predetermined delay is equal to zero, the phase-control signal431is the same as the signal447. For example, if the predetermined delay is equal to zero, the phase-control signal431changes from the logic low level to the logic high level at the same time as the signal447changes from the logic low level to the logic high level, and the phase-control signal431changes from the logic high level to the logic low level at the same time as the signal447changes from the logic high level to the logic low level.

In another embodiment, the predetermined delay is less than the delay from the signal485to the signal447. In yet another embodiment, the predetermined delay is larger than zero. For example, if the predetermined delay is larger than zero, the phase-control signal431changes from the logic low level to the logic high level after the signal447changes from the logic low level to the logic high level, and the phase-control signal431changes from the logic high level to the logic low level after the signal447changes from the logic high level to the logic low level.

As discussed above and further emphasized here,FIG. 4is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. For example, the delay controller438is removed, and the signal447is the phase-control signal431.

FIG. 5shows certain timing diagrams for the IC chip400used as the IC chip100in the LED driver200as shown inFIG. 2according to an embodiment of the present invention. These diagrams are merely examples, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. Waveform510represents the AC voltage250as a function of time, waveform520represents the current-sensing voltage483as a function of time, waveform530represents the drive signal463as a function of time, waveform540represents the phase-control signal431as a function of time, and waveform550represents the power-supply voltage422as a function of time. Additionally, waveform560represents the power-supply voltage441as a function of time, waveform570represents the power-supply voltage443as a function of time, waveform580represents the reference voltage471as a function of time, and waveform590represents the threshold voltage445as a function of time.

In one embodiment, as shown by the waveform550, the power-supply voltage422drops to 0 volts during at least part of an on-time period of the drive signal463(e.g., Ton) when the drive signal463is at the logic high level, as shown by the waveform530. For example, the reduction of the power-supply voltage422to 0 volts causes the reference voltage471to also drop to 0 volts as shown by the waveform580. In another example, during an on-time period of the drive signal463(e.g., Ton), the drive signal463remains at the logic high level as shown by the waveform530. In yet another example, an on-time period of the drive signal463(e.g., Ton) starts at time t1and ends at time t2, and another on-time period of the drive signal463(e.g., Ton) starts at time t3and ends at time t4, as shown by the waveform530. In yet another example, during an off-time period of the drive signal463(e.g., Toff), the drive signal463remains at the logic low level as shown by the waveform530. In yet another example, an off-time period of the drive signal463(e.g., Toff) starts at time t2and ends at time t3, as shown by the waveform530.

In another embodiment, an on-time period of the drive signal463(e.g., Tonfrom time t1to time t2) matches with a turn-off time period of the phase-control signal431(e.g., Tturn-offfrom time t1to time t2) as shown by the waveforms530and540, and an off-time period of the drive signal463(e.g., Tofffrom time t2to time t3) matches with a turn-on time period of the phase-control signal431(e.g., Tturn-offfrom time t2to time t3), as shown by the waveforms530and540.

For example,
Ton=Tturn-off(Equation 2)
where Tonrepresents an on-time period of the drive signal463, and Tturn-offrepresents a turn-off time period of the phase-control signal431.

In another example,
Toff=Tturn-on(Equation 3)
where Toffrepresents an off-time period of the drive signal463, and Tturn-onrepresents a turn-on time period of the phase-control signal431.

In yet another example, the combination of an on-time period of the drive signal463(e.g., Tonfrom time t1to time t2) and an off-time period of the drive signal463(e.g., Tofffrom time t2to time t3) represents a switching cycle for the drive signal463. In yet another example, a switching cycle for the drive signal463starts at time t1and ends at time t3. In yet another example, a pulse width of the drive signal463starts at time t1and ends at time t2. In yet another example, a pulse width of the drive signal463starts at time t3and ends at time t4.

In another embodiment, an on-time period of the drive signal463(e.g., Tonfrom time t1to time t2) matches with a turn-off time period of the phase-control signal431(e.g., Tturn-offfrom time t1to time t2) as shown by the waveforms530and540, and an off-time period of the drive signal463(e.g., Tofffrom time t2to time t3) matches with a turn-on time period of the phase-control signal431(e.g., Tturn-onfrom time t2to time t3), as shown by the waveforms530and540.

In another embodiment, during a turn-on time period (e.g., Tturn-on) of the phase-control signal431, the switch466of the controlled switch and power supply440is closed (e.g., turned on), and during a turn-off time period (e.g., Tturn-off) of the phase-control signal431, the switch466of the controlled switch and power supply440is open (e.g., turned off). For example, if the switch466of the controlled switch and power supply440is open, the capacitor452of the controlled switch and power supply440does not store any additional power provided by the power-supply voltage422, and the energy that has already been stored by the capacitor452of the controlled switch and power supply440is trapped within the controlled switch and power supply440except that the capacitor452of the controlled switch and power supply440still provides power (e.g., the power-supply voltage441) to the comparator460.

In another example, at the beginning of the turn-off time period (e.g., Tturn-off) of the phase-control signal431, the power-supply voltage441is:
Avdd_U1_B=Avdd  (Equation 4)
where Avdd_U1_B represents the power-supply voltage441at the beginning of the turn-off time period of the phase-control signal431, and Avdd represents the power-supply voltage422.

In yet another example, at the end of the turn-off time period (e.g., Tturn-off) of the phase-control signal431, the power-supply voltage441becomes:

Avdd_U1⁢_E=Avdd-Icomp×Tturn⁢-⁢offC(Equation⁢⁢5)
where Avdd_U1_E represents the power-supply voltage441at the end of the turn-off time period of the phase-control signal431, and Avdd represents the power-supply voltage422. Additionally, Icomprepresents current consumption of the comparator460, Tturn-offrepresents the turn-off time period of the phase-control signal431, and C represents capacitance of the capacitor452.

In yet another example, based on Equation 2, Equation 5 becomes:

Avdd_U1⁢_E=Avdd-Icomp×TonC(Equation⁢⁢6)
Where Avdd_U1_E represents the power-supply voltage441at the end of the turn-off time period of the phase-control signal431, and Avdd represents the power-supply voltage422. Additionally, Icomprepresents current consumption of the comparator460, Tonrepresents an on-time period of the drive signal463, and C represents capacitance of the capacitor452.

As shown by the waveform560ofFIG. 5, the power-supply voltage441has a magnitude562at the beginning of a turn-off time period of the phase-control signal431(e.g., at time t1), and the power-supply voltage441has a magnitude564at the end of the turn-off time period of the phase-control signal431(e.g., at time t2), according to certain embodiments. For example, the magnitude562is equal to Avdd_U1_B as shown in Equation 4. In another example, the magnitude564is equal to Avdd_U1_E as shown in Equation 6.

In one embodiment, so long as the power-supply voltage441remains higher than the minimum magnitude of the power-supply voltage441that is required for normal operation of the comparator460, the comparator460can work properly to compare the threshold voltage445and the current-sensing voltage483and generate the control signal461.

In another embodiment, during the turn-on time period as indicated by the phase-control signal431, the switch468of the controlled switch and voltage supply444is closed (e.g., turned on), and during the turn-off time period as indicated by the phase-control signal431, the switch468of the controlled switch and voltage supply444is open (e.g., turned off). For example, if the switch468of the controlled switch and voltage supply444is open, the capacitor454of the controlled switch and voltage supply444does not store any additional power provided by the reference voltage and/or current471(e.g., the reference voltage), and the energy that has already been stored by the capacitor454of the controlled switch and voltage supply444is trapped within the controlled switch and voltage supply444except that the capacitor454of the controlled switch and voltage supply444still provides the threshold voltage445to the comparator460. In another example, if the switch468of the controlled switch and voltage supply444is open, the capacitor454of the controlled switch and voltage supply444does not store any additional power provided by the reference voltage and/or current471(e.g., the reference voltage), and the energy that has already been stored by the capacitor454of the controlled switch and voltage supply444is blocked from leaking out through the switch468of the controlled switch and voltage supply444even though the capacitor454of the controlled switch and voltage supply444still provides the threshold voltage445to the comparator460.

In yet another embodiment, during at least part of a turn-off time period of the phase-control signal431(e.g., Tturn-offfrom time t1to time t2), the reference voltage471drops to 0 volts as shown by the waveform580. For example, during the turn-off time period of the phase-control signal431(e.g., Tturn-offfrom time t1to time t2), the switch468of the controlled switch and voltage supply444is open, so the energy that has already been stored by the capacitor454of the controlled switch and voltage supply444is trapped within the controlled switch and voltage supply444except that the capacitor454of the controlled switch and voltage supply444still provides the threshold voltage445to the comparator460. In another example, during the turn-off time period of the phase-control signal431(e.g., Tturn-offfrom time t1to time t2), the switch468of the controlled switch and voltage supply444is open, so the threshold voltage445remains stable (e.g., remain constant) even when the reference voltage471drops to 0 volts, as shown by the waveforms580and590.

In yet another embodiment, during the turn-on time period as indicated by the phase-control signal431, the switch464of the controlled switch and power supply442is closed (e.g., turned on), and during the turn-off time period as indicated by the phase-control signal431, the switch464of the controlled switch and power supply442is open (e.g., turned off). For example, if the switch464of the controlled switch and power supply442is open, the capacitor450of the controlled switch and power supply442does not store any additional power provided by the power-supply voltage422, and the energy that has already been stored by the capacitor450of the controlled switch and power supply442is trapped within the controlled switch and power supply442except that the capacitor450of the controlled switch and power supply442still provides power (e.g., the power-supply voltage443) to the logic-control and gate-drive component462(e.g., a logic controller and driver). In another example, if the switch464of the controlled switch and power supply442is open, the capacitor450of the controlled switch and power supply442does not store any additional power provided by the power-supply voltage422, and the energy that has already been stored by the capacitor450of the controlled switch and power supply442is blocked from leaking out through the switch464of the controlled switch and power supply442even though the capacitor450of the controlled switch and power supply442still provides power (e.g., the power-supply voltage443) to the logic-control and gate-drive component462(e.g., a logic controller and driver).

In yet another embodiment, when the switch464of the controlled switch and power supply442becomes open (e.g., at time t1), the power-supply voltage443reduces from a magnitude572to another magnitude574as shown by the waveform570. For example, the reduction of the power-supply voltage443from the magnitude572to the magnitude574is caused by the charge redistribution between the capacitor450and one or more parasitic capacitors in the logic controller and driver462. In another example, the reduction of the power-supply voltage443from the magnitude572to the magnitude574is also caused by the Miller plateau effect of the transistor480. In yet another example, after the power-supply voltage443reduces from the magnitude572to the magnitude574, the power-supply voltage443is held at a constant level so that the transistor480remains being turned on, as shown by the waveform570.

According to certain embodiments, a phase-locked, self-sustained power supply is provided for LED lighting. For example, to support the combination of one or more power terminals and one or more control terminals, one or more phase-locked, self-sustained power supplies are used to trap and store energy in case that the AC power supply becomes very weak or even lost at some control phases.

According to another embodiment, a two-terminal IC chip (e.g., the IC chip100, the IC chip300, and/or the IC chip400) includes a first chip terminal (e.g., the terminal110, the terminal310, and/or the terminal410), a second chip terminal (e.g., the terminal112, the terminal312, and/or the terminal412), a first switch (e.g., the switch464) configured to receive a control signal (e.g., the phase-control signal431), a first capacitor (e.g., the capacitor450) coupled to the first switch, a second switch (e.g., the switch466) configured to receive the control signal, a second capacitor (e.g., the capacitor452) coupled to the second switch, a third switch (e.g., the switch468) configured to receive the control signal, and a third capacitor (e.g., the capacitor454) coupled to the third switch. A first terminal voltage (e.g., the voltage256and/or the voltage414) is a voltage of the first chip terminal (e.g., the terminal110, the terminal310, and/or the terminal410), a second terminal voltage is a voltage of the second chip terminal (e.g., the terminal112, the terminal312, and/or the terminal412), and a chip voltage (e.g., the voltage Vchipacross the IC chip100) is equal to a difference between the first terminal voltage and the second terminal voltage. The chip is configured to allow a chip current (e.g., the current254, the current316, and/or the current416) to flow into the chip at the first chip terminal and out of the chip at the second chip terminal, or to flow into the chip at the second chip terminal and out of the chip at the first chip terminal, the chip current being larger than or equal to zero in magnitude. The first switch (e.g., the switch464) is further configured to be closed during a first time duration in response to the control signal, and open during a second time duration in response to the control signal. The first capacitor (e.g., the capacitor450) is configured to: in response to the first switch being closed, receive a first supply voltage (e.g., the power-supply voltage422) through the first switch during the first time duration; in response to the first switch being open, not store any additional power and not allow first stored power to leak out through the first switch during the second time duration; and output a first output voltage (e.g., the power-supply voltage443) during the first time duration and the second time duration. The second switch (e.g., the switch466) is further configured to be closed during the first time duration in response to the control signal, and open during the second time duration in response to the control signal. The second capacitor (e.g., the capacitor452) is configured to: in response to the second switch being closed, receive the first supply voltage through the second switch during the first time duration; in response to the second switch being open, not store any additional power and not allow second stored power to leak out through the second switch during the second time duration; and output a second output voltage (e.g., the power-supply voltage441) during the first time duration and the second time duration. The third switch (e.g., the switch468) is further configured to be closed during the first time duration in response to the control signal, and open during the second time duration in response to the control signal. The third capacitor (e.g., the capacitor454) is configured to: in response to the third switch being closed, receive a second supply voltage (e.g., the reference voltage471) through the third switch during the first time duration; in response to the third switch being open, not store any additional power and not allow second stored power to leak out through the third switch during the second time duration; and output a third output voltage (e.g., the threshold voltage445) during the first time duration and the second time duration. The chip (e.g., the IC chip100, the IC chip300, and/or the IC chip400) is an integrated circuit, and the chip does not include any additional chip terminal (e.g., any additional pin) other than the first chip terminal (e.g., the terminal110, the terminal310, and/or the terminal410) and the second chip terminal (e.g., the terminal112, the terminal312, and/or the terminal412). For example, the two-terminal IC chip is implemented according to at leastFIG. 4.

In another example, the two-terminal IC chip further includes a first voltage generator (e.g., the low dropout regulator420) configured to receive the first terminal voltage (e.g., the voltage256and/or the voltage414) and generate the first supply voltage (e.g., the power-supply voltage422). In yet another example, the two-terminal IC chip further includes a second voltage generator (e.g., a reference-voltage generator470) configured to receive the first supply voltage and generate the second supply voltage. In yet another example, the two-terminal IC chip further includes a comparator (e.g., the comparator460) including a first terminal (e.g., the terminal602), a second terminal (e.g., the terminal604), and a third terminal (e.g., the terminal606). The comparator is configured to receive the second output voltage as power supply at the first terminal, receive a current-sensing voltage (e.g., the current-sensing voltage483) at the second terminal, receive the third output voltage at the third terminal, and generate a comparison signal (e.g., the control signal461) based at least in part on the current-sensing voltage and the third output voltage.

In yet another example, the two-terminal IC chip further includes a logic controller and driver (e.g., the logic-control and gate-drive component462) configured to receive the first output voltage and the comparison signal and generate the control signal and a drive signal (e.g., the drive signal463) based at least in part on the comparison signal. In yet another example, the two-terminal IC chip further includes a demagnetization detector (e.g., the demagnetization detector472) configured to receive the first supply voltage and the drive signal and generate a demagnetization signal (e.g., the demagnetization signal473) based at least in part on the drive signal. The demagnetization signal indicates a beginning and an end of each demagnetization period. In yet another example, the logic controller and driver is further configured to receive the demagnetization signal and generate the control signal and the drive signal based at least in part on the comparison signal and the demagnetization signal. In yet another example, the drive signal is a pulse-width-modulation signal corresponding to a pulse width for each modulation period. In yet another example, the logic controller and driver is further configured to: in response to the demagnetization signal indicating an end of a demagnetization period, change the drive signal to start the pulse width; and in response to the comparison signal indicating the chip current has reached or exceeded a predetermined current limit, change the drive signal to end the pulse width.

In yet another example, the two-terminal IC chip further includes: a fourth switch (e.g., the transistor480) configured to receive the drive signal, and a resistor (e.g., the resistor482) coupled to the fourth switch and configured to generate the current-sensing voltage. The fourth switch is configured to, for each modulation period: be closed during the pulse width to change the chip current from being equal to zero to being larger than zero in magnitude, and be open outside the pulse width to change the chip current from being larger than zero to being equal to zero in magnitude. In yet another example, the logic controller and driver is further configured to generate an internal signal (e.g. the signal447) based at least in part on the comparison signal and the demagnetization signal, and output the control signal and the drive signal based at least in part on the internal signal. In yet another example, the drive signal and the internal signal are complementary signals. In yet another example, the control signal is the internal signal with a predetermined delay, the predetermined delay being larger than zero. In yet another example, the control signal is the same as the internal signal.

In yet another example, the chip is further configured to change a relationship between the chip voltage and the chip current with respect to time. In yet another example, the first chip terminal is coupled to a first winding terminal (e.g., the terminal212) of an inductive winding (e.g., the inductive winding210) and a first diode terminal (e.g., the terminal224) of a diode (e.g., the diode220). The inductive winding further includes a second winding terminal (e.g., the terminal214), and the diode further includes a second diode terminal (e.g., the terminal222). A series of one or more light emitting diodes (e.g., the one or more LEDs290) is coupled to the second winding terminal and the second diode terminal, and the second diode terminal is configured to receive a rectified AC voltage (e.g., the rectified voltage252).

In yet another example, the two-terminal IC chip is further configured to receive the first terminal voltage (e.g., the voltage256and/or the voltage414) at the first chip terminal (e.g., the terminal110, the terminal310, and/or the terminal410) and generate the chip current (e.g., the current254, the current316, and/or the current416) based at least in part on the first terminal voltage. In yet another example, the chip current (e.g., the current254, the current316, and/or the current416) is configured to flow between the first chip terminal (e.g., the terminal110, the terminal310, and/or the terminal410) and the second chip terminal (e.g., the terminal112, the terminal312, and/or the terminal412) to affect a light-emitting-diode current (e.g., the current296) flowing through the series of the one or more light emitting diodes (e.g., the one or more LEDs290). In yet another example, the two-terminal IC chip is further configured to change the chip current (e.g., the current254, the current316, and/or the current416) with respect to time to keep the light-emitting-diode current (e.g., the current296) constant with respect to time. In yet another example, the two-terminal IC chip is further configured to periodically change the chip current with respect to time and within each period, change the chip current with respect to time, to keep the light-emitting-diode current constant with respect to time.

According to yet another embodiment, a two-terminal IC chip (e.g., the IC chip100, the IC chip300, and/or the IC chip400) includes a first chip terminal (e.g., the terminal110, the terminal310, and/or the terminal410), a second chip terminal (e.g., the terminal112, the terminal312, and/or the terminal412), a first switch (e.g., the switch464) configured to receive a control signal (e.g., the phase-control signal431), a first capacitor (e.g., the capacitor450) coupled to the first switch, a second switch (e.g., the switch466) configured to receive the control signal, a second capacitor (e.g., the capacitor452) coupled to the second switch, and a voltage generator (e.g., the low dropout regulator420) configured to receive a first terminal voltage (e.g., the voltage256and/or the voltage414) and generate a supply voltage (e.g., the power-supply voltage422). The first terminal voltage (e.g., the voltage256and/or the voltage414) is a voltage of the first chip terminal (e.g., the terminal110, the terminal310, and/or the terminal410), a second terminal voltage is a voltage of the second chip terminal (e.g., the terminal112, the terminal312, and/or the terminal412), and a chip voltage (e.g., the voltage Vchipacross the IC chip100) is equal to a difference between the first terminal voltage and the second terminal voltage. The chip is configured to allow a chip current (e.g., the current254, the current316, and/or the current416) to flow into the chip at the first chip terminal and out of the chip at the second chip terminal, or to flow into the chip at the second chip terminal and out of the chip at the first chip terminal, the chip current being larger than or equal to zero in magnitude. The first switch (e.g., the switch464) is further configured to be closed during a first time duration in response to the control signal, and open during a second time duration in response to the control signal. The first capacitor (e.g., the capacitor450) is configured to: in response to the first switch being closed, receive the supply voltage (e.g., the power-supply voltage422) through the first switch during the first time duration; in response to the first switch being open, not store any additional power and not allow first stored power to leak out through the first switch during the second time duration; and output a first output voltage (e.g., the power-supply voltage443) during the first time duration and the second time duration. The second switch (e.g., the switch466) is further configured to be closed during the first time duration in response to the control signal, and open during the second time duration in response to the control signal. The second capacitor (e.g., the capacitor452) is configured to: in response to the second switch being closed, receive the supply voltage through the second switch during the first time duration; in response to the second switch being open, not store any additional power and not allow second stored power to leak out through the second switch during the second time duration; and output a second output voltage (e.g., the power-supply voltage441) during the first time duration and the second time duration. The chip (e.g., the IC chip100, the IC chip300, and/or the IC chip400) is an integrated circuit, and the chip does not include any additional chip terminal (e.g., any additional pin) other than the first chip terminal (e.g., the terminal110, the terminal310, and/or the terminal410) and the second chip terminal (e.g., the terminal112, the terminal312, and/or the terminal412). For example, the two-terminal IC chip is implemented according to at leastFIG. 4.

In another example, the two-terminal IC chip further includes a logic controller and driver (e.g., the logic-control and gate-drive component462) configured to receive the first output voltage and generate the control signal and a drive signal (e.g., the drive signal463). In yet another example, the two-terminal IC chip of claim22further includes a demagnetization detector (e.g., the demagnetization detector472) configured to receive the supply voltage and the drive signal and generate a demagnetization signal (e.g., the demagnetization signal473) based at least in part on the drive signal, the demagnetization signal indicating a beginning and an end of each demagnetization period. In yet another example, the logic controller and driver is further configured to receive the demagnetization signal and generate the control signal and the drive signal based at least in part on the demagnetization signal.

In yet another example, the drive signal is related to a pulse width for each switching cycle. In yet another example, the two-terminal IC chip further includes a third switch (e.g., the transistor480) configured to receive the drive signal. The third switch is further configured to, for each switching cycle: be closed during the pulse width; and be open outside the pulse width. In yet another example, the second time duration and the pulse width are equal in magnitude. In yet another example, the second time duration starts after the pulse width starts with a predetermined delay. In yet another example, the second time duration starts at the same time as the pulse width starts.

In yet another example, the first chip terminal is coupled to a first winding terminal (e.g., the terminal212) of an inductive winding (e.g., the inductive winding210) and a first diode terminal (e.g., the terminal224) of a diode (e.g., the diode220), the inductive winding further including a second winding terminal (e.g., the terminal214), the diode further including a second diode terminal (e.g., the terminal222), a series of one or more light emitting diodes (e.g., the one or more LEDs290) being coupled to the second winding terminal and the second diode terminal, the second diode terminal being configured to receive a rectified AC voltage (e.g., the rectified voltage252). In yet another example, the chip current (e.g., the current254, the current316, and/or the current416) is configured to flow between the first chip terminal (e.g., the terminal110, the terminal310, and/or the terminal410) and the second chip terminal (e.g., the terminal112, the terminal312, and/or the terminal412) to affect a light-emitting-diode current (e.g., the current296) flowing through the series of the one or more light emitting diodes (e.g., the one or more LEDs290). In yet another example, the two-terminal IC chip is further configured to change the chip current (e.g., the current254, the current316, and/or the current416) with respect to time to keep the light-emitting-diode current (e.g., the current296) constant with respect to time.

For example, some or all components of various embodiments of the present invention each are, individually and/or in combination with at least another component, implemented using one or more software components, one or more hardware components, and/or one or more combinations of software and hardware components. In another example, some or all components of various embodiments of the present invention each are, individually and/or in combination with at least another component, implemented in one or more circuits, such as one or more analog circuits and/or one or more digital circuits. In yet another example, various embodiments and/or examples of the present invention can be combined.