Packaging of electronic circuitry

A circuit package includes: electronic circuitry, electrically conductive material forming multiple leads, and multiple connections between the electronic circuitry and the multiple leads. A portion of the electrically conductive material associated with the multiple leads (e.g., low impedance leads supporting high current throughput) is removed to accommodate placement of the electronic circuitry. Each of the multiple leads can support high current. The multiple connections between the multiple leads provide connectivity between circuit nodes on the electronic circuitry and pads disposed on a planar surface of the electronic circuit package.

BACKGROUND

Conventional surface-mount technology (SMT) provides a way of interconnecting electronic circuit components with each other. For example, according to such technology, electronic devices can be specifically packaged for subsequent mounting directly on a respective surface of a printed circuit board. Because of the advantages associated with surface mount technology such as smaller part size, surface mount technology has, to a large extent, replaced so-called through-hole technology in which wire leads of components are fitted and soldered into holes of a printed circuit board to provide connectivity.

Surface mount devices can be packaged according to a variety of different styles. For example, a surface mount device can have relatively small leads or no leads extending from the package at all. Because a surface mount device has relatively small leads or no leads at all, a surface mount device is usually smaller than its through-hole (e.g., pin-based) counterpart. The surface mount device may have short pins or leads of various styles, flat contacts, a matrix of solder balls (such as Ball Grid Arrays), or terminations on the body of the component.

According to a conventional application, surface mount devices can include internal bond wires connecting nodes of an integrated circuit to pads of the surface mount device. The pads of the surface mount device can then be connected to a respective circuit board.

As an alternative to fabricating an integrated circuitry device into an electronic circuit package, the integrated circuit device can be mounted directly to a circuit board. For example, a backside surface of a semiconductor device can be mounted to a printed circuit board. The exposed top surface of the semiconductor device can include circuit nodes. Bond wires between the nodes on the semiconductor device and the printed circuit board connect the semiconductor device to the printed circuit board.

BRIEF DESCRIPTION

Conventional applications such as those as discussed above can suffer from a number of deficiencies. For example, as mentioned, bond wires are typically used to provide connectivity between a semiconductor device and another resource. In certain cases, although bond wire technology is somewhat reliable and relatively inexpensive, use of bond wires in high current applications is often undesirable since bond wires typically do not support high current. Accordingly, devices using bond wires to provide conductive paths are prone to failure in high current applications.

Embodiments herein deviate with respect to conventional applications. For example, embodiments herein include novel circuit packaging for applications requiring high current throughput and high thermal heat sinking capabilities.

More specifically, one embodiment herein includes a novel electronic circuit package. The electronic circuit package includes: electronic circuitry, electrically conductive material forming multiple leads, and multiple connections between the electronic circuitry and the multiple leads. In one embodiment, a portion of the electrically conductive material associated with the multiple leads (e.g., low impedance leads supporting high current throughput) is removed to accommodate placement of the electronic circuitry. Each of the multiple leads can support high current. The multiple leads provide low impedance connectivity between circuit nodes on the electronic circuitry and pads disposed on a planar surface of the electronic circuit package.

In accordance with another embodiment, an electronic circuit package comprises a semiconductor device, a set of conductive elements, and a set of planar leads. The semiconductor device has a substantially planar surface facing in a first direction. The substantially planar surface includes multiple circuit nodes. The set of conductive elements are disposed adjacent (e.g., at a periphery) with respect to the semiconductor device. The set of planar leads connect the multiple circuit nodes on the semiconductor device to planar surfaces of the conductive elements.

Embodiments herein further include a method of fabricating an electronic circuit package. For example, one embodiment herein includes steps of receiving a lead frame including lead material; removing a portion of lead material from the lead frame to accommodate a semiconductor device; and electrically connecting the multiple leads of the lead frame to nodes of the semiconductor device.

Another method embodiment includes creating multiple independent leads from a length of conductive material. For example, one embodiment herein includes receiving a lead frame including a length of conductive material; producing a notch on a surface of the length of conductive material; applying a layer of insulative material to the surface of the conductive material including the notch; and removing a portion of material from the length of conductive material on the length of conductive material opposite the notch to create at least two leads from the length of conductive material.

Another method embodiment includes fabricating an electronic circuit package. In accordance with such an embodiment, steps of fabricating the electronic circuit package includes: receiving electronic circuitry, the electronic circuitry having a substantially planar surface including multiple circuit nodes; disposing a facing of the planar surface including the multiple circuit nodes to point in a first direction; disposing a set of conductive elements adjacent to the electronic circuitry; and utilizing a set of planar leads to connect the multiple circuit nodes on the electronic circuitry to planar surfaces of the conductive elements.

These and other more specific embodiments are disclosed in more detail below.

As discussed herein, techniques herein are well suited for use in different electronic circuit package applications such as switching power supplies, voltage regulators, low voltage processors, buck converters, boost regulators, buck-boost regulators, electronic circuit packaging in general, etc. However, it should be noted that embodiments herein are not limited to use in such applications and that the techniques discussed herein are well suited for other applications as well.

Additionally, note that although each of the different features, techniques, configurations, etc., herein may be discussed in different places of this disclosure, it is intended, where appropriate, that each of the concepts can optionally be executed independently of each other or in combination with each other. Accordingly, the one or more present inventions as described herein can be embodied and viewed in many different ways.

Also, note that this preliminary discussion of embodiments herein purposefully does not specify every embodiment and/or incrementally novel aspect of the present disclosure or claimed invention(s). Instead, this brief description only presents general embodiments and corresponding points of novelty over conventional techniques. For additional details, summary, and/or possible perspectives (permutations) of the invention(s), the reader is directed to the Detailed Description section and corresponding figures, which includes a further summary of embodiments.

DETAILED DESCRIPTION

As discussed above, use of conventional bond wires typically do not support high current and therefore are not suitable for high current applications. Bond wires also typically do not provide adequate heat sink capabilities. In contrast to conventional bond wires, embodiments herein provide electrically and thermally conductive paths (e.g., leads) capable of safely conveying, for example, up to tens, hundreds, or more amperes of current and heat from electronic circuitry in an electronic circuit package to a substrate such as a printed circuit board on which the electronic circuit package is mounted.

More specifically,FIG. 1is an example side view of an electronic circuit package according to embodiments herein.

In one embodiment, the electronic circuitry122is a so-called bump die; in such an embodiment, the nodes125on the bump die are made of a material such as solder.

The electronic circuitry122can be any suitable circuit such as a single semiconductor chip, a monolithic circuit, interconnection of one or more circuits, discrete components, etc. By way of non-limiting example, in one embodiment, the electronic circuitry122can include all or a portion of power supply circuitry as discussed later in this specification. For example, in one embodiment, the electronic circuitry122is a semiconductor device including at least a portion of power supply switching circuitry, controller circuitry, etc.

The combination of leads120, electronic circuitry122, etc., can be encapsulated with material160. Material160can be a non-electrically conductive material or insulative material (e.g., electrically non-conductive material, thermally low-conductive material, etc.) such as plastic encapsulating an assembly including the electronic circuitry122, the multiple leads125, etc. The material160protects the leads120and/or electronic circuitry122from damage.

In an example embodiment, the electronic circuitry122is a semiconductor device including one or more transistors175. Interconnection of the transistors175via interconnect layer170provides functionality such as control and/or switching in a power supply application. As an example, the interconnect layer170can connect at least a portion of the multiple transistors175in parallel (e.g., connect gate nodes together, connect drain nodes together, connect source nodes together). The common gate can be connected to a first node125of electronic circuitry122; the common source can be connected to a second node125of electronic circuitry122; the common drain can be connected to a third node125of electronic circuitry122; and so on.

Facing128-1(e.g., a topside) of electronic circuitry122includes multiple circuit nodes125. Interconnect layers170in the electronic circuitry122provide connectivity amongst the transistors175up to nodes125exposed on facing128-1of the electronic circuitry122.

In one embodiment, the circuit nodes125disposed on the facing128-1(e.g., planar facing) of the electronic circuitry122face a substantially opposite direction than a facing128-2(e.g., backside or bottom side planar facing) of the electronic circuit package110.

For example, in accordance withFIG. 1, facing128-1points in an upward direction; facing128-2points in a downward direction. Accordingly, one embodiment herein includes a an electronic circuit package110in which each of the multiple leads120extends from a respective node125disposed on a surface of the electronic circuitry122to a respective pad (e.g., surface124formed via a layer of material such as metal) disposed on a bottom surface of the electronic circuit package. The facing128-1or surface of the electronic circuitry122faces a substantially opposite direction than the mounting surface (e.g., facing128-2) or bottom side of the electronic circuit package110.

In accordance with further embodiments, each of the multiple leads120can include a planar surface to electrically connect a respective lead to a corresponding circuit node on the electronic circuitry. For example, the surface of the lead120-1in contact with the node125-1can be a planar surface pointing (downward) in a same direction as facing128-2. That is, the planar surface at axial ends of each lead frame faces a substantially same direction as the pads (e.g., surfaces124) disposed on a bottom surface of the electronic circuit package110. As mentioned, the circuit nodes125of the planar facing of the electronic circuitry122can be configured to face a substantially opposite direction than the planar surface at axial ends of each lead that connects to a respective node125. A connection between such surfaces provides connectivity between a respective lead and node.

Note that, depending on the embodiment, transistors170can be fabricated into one or both facings of the electronic circuitry122. As mentioned, the connections between axial end of leads120and respective nodes125of electronic circuitry122can be formed from any suitable material or technique such as solder, welds, etc.

In accordance with further embodiments, the multiple connections between the electronic circuitry122and the multiple leads120provide connectivity (i.e., an electrically and thermally conductive pathway) between circuit nodes125on the electronic circuitry122and pads disposed on a planar surface124(e.g., surface124-1, surface124-2such as a layer of metal, etc.) of the electronic circuit package110. For example, when the electronic circuit package110is connected to the substrate105, lead120-1provides an electrically and thermally conductive pathway between node125-1and pad108-1; lead120-2provides an electrically and thermally conductive pathway between node125-2of electronic circuitry122and pad108-3; and so on.

Additionally, the connection between facing128-2or surface124-2of the electronic circuitry122and the pad108-2provides a thermally conductive pathway (and possibly an electrically conductive pathway as well) between the electronic circuitry122and the substrate105.

In one embodiment, an end (e.g., surface124) of each of the leads125terminates as a surface mount pad on the electronic circuit package110.

As shown, the cavity220formed in leads120accommodates placement of the electronic circuitry122. The leads120can be formed from any suitable electrically and thermally conductive mass of material such as metal (e.g., copper, aluminum, combination of materials, etc.).

In accordance with one embodiment as shown, the electronic circuitry120resides in the cavity220formed by a hollowed volume in the mass of material used to produce leads120.

Facing128-2of the electronic circuitry122and electronic circuit package110can be substantially planar. By way of a non-limiting example, the surfaces124(e.g., planar surfaces) and the facing128-2of electronic circuitry122can substantially lie in the planar surface. When electronic circuit package110is mounted to substrate105: surface124-1contacts pad108-1; surface124-2contacts pad108-2; surface124-3contacts pad108-3; and so on.

In one embodiment, solder can be used to electrically and thermally connect the respective surfaces124to pads108. Accordingly, both the leads120and the facing128-2of electronic circuitry122provide a pathway to sink heat generated by the electronic circuitry122to the substrate105during conditions when the electronic circuitry122is powered and generating heat.

To facilitate connectivity with respect to the substrate105, the facing128-2or surface124-2of the electronic circuitry122can substantially align with a planar surface of the electronic circuit package110. For example, in one embodiment, surfaces124-1,124-2,124-3, etc., reside within the same plane as a bottom surface or facing128-2of the electronic circuit package110.

FIG. 2Ais an example side view diagram illustrating steps of fabricating an electronic circuit package according to embodiments herein.FIG. 2Bis an example top view diagram illustrating steps of fabricating an electronic circuit package according to embodiments herein.

The electronic circuit package assembler as discussed below can any implement any number of one or more different types of processes to fabricate the electronic circuit package110.

As shown, in step205, the electronic circuit package assembler receives a frame210including lead material.

The lead material in frame210can include multiple leads120(e.g., metal leads in raw form) attached to the frame210. In one embodiment, the leads120point axially inward with respect to the frame210as shown. Although the leads and frame may be bendable, the frame210holds the leads (e.g., lead material)120in a predetermined positioned.

In step215, in one embodiment, the assembler removes a portion of the lead material from leads120to form cavity220. The material can be removed via any suitable method such as etching, grinding, etc.

In step225, the assembler aligns axial ends of the leads120to the nodes125disposed on the electronic circuitry122. The assembler inserts or installs the electronic circuitry122into the cavity220(e.g., hollowed volume) produced by the removal of material from the lead frame and/or leads120.

For each respective lead120, the assembler then solders the axial end of a respective lead to a corresponding node on the electronic circuitry122.

In step235, the assembler encapsulates (e.g., via a process such as injection moulding) a combination of the leads120and the electronic circuitry122with a suitable insulative material.

In accordance with further embodiments, in any suitable step, the assembler removes (e.g., via a method such as grinding, etching, etc.) the frame210such that the leads120become electrically independent or isolated from each other. The material160is at least semiconductor-rigid to prevent the leads from moving.

Accordingly, embodiments herein include removing a frame portion of the lead frame holding the multiple leads in place and encapsulating an assembly including the electronic circuitry122and the multiple leads120with insulative material to create an electronic circuit package110.

Note that step225can optionally include mounting a discrete electrical component240(e.g., a resistor, capacitor, inductor, etc.) across leads120-1and120-2before encapsulating with material160. In such an instance, the assembler produces the version of electronic circuit package110as shown in step245. Accordingly, one embodiment herein includes connecting an electronic circuit component240to axial ends of at least two leads of the multiple leads120in the electronic circuit package110, the axial ends of the at least two leads (e.g., lead120-1and lead120-2) being disposed between the electronic circuitry122and the electronic circuitry122. The discrete electronic component240can be configured to electrically connect axial ends of at least two leads120-1and120-2as shown, the axial ends of the at least two leads can be disposed between the electronic circuitry and the electronic circuit component.

FIG. 3is an example perspective view diagram illustrating a lead being attached to a node of an electronic circuit according to embodiments herein.

As shown, the assembler positions and aligns leads120with respect to nodes125and causes each respective lead120to make contact with a corresponding node on the electronic circuitry122. Each of the nodes125can include a solder bump. Thereafter, the assembler applies heat to solder the leads120to the nodes125as previously discussed.

Also, note that the axial end of each lead (e.g., where the lead couples with a respective node125) can be tapered in a manner as shown and previously discussed with respect to other figures herein.

FIG. 4is an example perspective view diagram illustrating a lead coupled to respective nodes on an electronic circuit subsequent to soldering according to embodiments herein. As mentioned above, an assembler injects a material such as plastic to encapsulate the electronic circuitry122and leads120.

FIG. 5is an example side view diagram of an electronic circuit package according to embodiments herein.

This example embodiment is similar to the embodiment as discussed above with respect toFIG. 1. However, the version of the electronic circuit package110inFIG. 5includes leads that are fabricated from multiple components. For example, the combination of lead520-1and the conductive element530-1provides the same functionality as previously discussed with respect to lead120-1; the combination of lead520-2and the conductive element530-2provides the same functionality as previously discussed with respect to lead120-2; and so on.

In a similar manner as previously discussed, the set of conductive elements530and the set of planar leads520form a cavity in which the electronic circuitry122resides.

As shown, pairings of a conductive element530and a corresponding lead520(e.g., a planar-surfaced lead) in the electronic circuit package110can be configured to form a substantially L-shaped conductive path from a node125of the electronic circuitry122to a pad or surface524of the electronic circuit package110. As mentioned, the electronic circuitry122can reside in a hollowed volume of the substantially L-shaped conductive paths (e.g., from a side view) formed by the conductive elements530and the leads520.

In this example embodiment, the electronic circuitry122(e.g., semiconductor device) has a substantially planar surface facing in a first direction (e.g., upwards). The substantially planar surface of the electronic circuitry122includes multiple circuit nodes125. A set of conductive elements530is disposed adjacent to the electronic circuitry122. Set of leads520(e.g., at least partially planar leads) electrically couple the multiple circuit nodes125on the electronic circuitry122to planar surfaces of the conductive elements122.

When the electronic circuit package110is mounted on the substrate105, the node125-1of the electronic circuitry122is electrically coupled to pad108-1via the electrical path through lead520-1and conductive element530-1; the node125-2of the electronic circuitry122is electrically coupled to pad108-3via the electrical path (and thermal path) through lead520-2and conductive element530-2.

Each of the conductive elements530can include one or more planar surfaces. For example, surfaces524(e.g., surface524-1, surface524-2, etc.) can be planar surfaces residing on the bottom planar facing of the electronic circuit package110. Opposite each respective surface524, the conductive element530includes another planar surface in which to provide connectivity with respect to a corresponding lead520as shown.

Each respective connection between a planar-surfaced lead520and a respective conductive element530thus provides an electrically and thermally conductive path from a node125on the electronic circuitry122(e.g., semiconductor device) to a pad (e.g., surface524) disposed on a mounting surface of the electronic circuit package110.

In accordance with such an embodiment, the surfaces524of the conductive elements form pads on the electronic circuit package110, the surfaces524of the pads face a first direction (e.g., downwards). The surface of the electronic circuit package including the nodes125faces a second direction (e.g., upwards), the second direction being substantially opposite the first direction.

In one embodiment, an assembler utilizes surfaces524of the conductive elements530to form pads on a surface of the electronic circuit package110. The bottom surface of the electronic circuit package110includes surfaces524, which face a substantially opposite direction than a facing of the planar surface of the electronic circuitry122on which the circuit nodes125reside.

As previously discussed, the electronic circuitry122can be a so-called bump die (e.g., semiconductor chip) including solder bumps.

FIG. 6Ais an example side view diagram illustrating steps of fabricating an electronic circuit package according to embodiments herein.FIG. 6Bis an example top view diagram illustrating steps of fabricating an electronic circuit package according to embodiments herein.

The electronic circuit package assembler as discussed below can any implement any number of one or more different types of processes to fabricate the electronic circuit package110.

As shown, in step605, the electronic circuit package assembler receives a frame610to which multiple leads520(e.g., metal leads) are attached. In one embodiment, the leads520point axially inward with respect to the frame510as shown. The frame510holds the leads520in a predetermined positioned.

In step615, the assembler receives conductive elements530. The assembler disposes the conductive elements (e.g., conductive element530-1,530-2, etc.) to be adjacent to the electronic circuitry122. In one embodiment, the assembler disposes the set of conductive elements530at a periphery with respect to the electronic circuitry122. The bottom planar surfaces of the conductive elements and a bottom surface of the electronic circuitry122can be disposed in the same plane.

In step625, the assembler aligns axial ends of the leads520to the nodes125disposed on the electronic circuitry122and the surfaces of the conductive elements530. For each respective lead520, the assembler then applies heat to: solder a first axial end of a respective lead520to a corresponding conductive element530as well as solder a second axial end (e.g., opposite the first axial end) of the respective lead520to a corresponding node on the electronic circuitry122. For example, the assembler forms an electrically conductive connection (e.g., solder bond) between a first end of lead520-1to conductive element530-1; the assembler forms an electrically conductive connection (e.g., solder bond) between a second end of lead520-1to node125-1; the assembler forms an electrically conductive connection (e.g., solder bond) between a first end of lead520-2to conductive element530-2; the assembler forms an electrically conductive connection (e.g., solder bond) between a second end of lead520-2to node125-2; and so on.

In step635, the assembler encapsulates (e.g., via a process such as injection moulding) a combination of the leads520, conductive elements530, and the electronic circuitry122within a suitable insulative material.

The frame610can be removed at any suitable step in the fabrication process.

In accordance with one embodiment, the assembler removes (e.g., via a method such as grinding, etching, etc.) the frame610such that the leads520become electrically independent or isolated from each other. The frame610may initially couple the leads520together. In one embodiment, the material160is at least semi-rigid to prevent the leads from moving after being encapsulated.

Note that step625can optionally include mounting a discrete electrical component240(e.g., a resistor, capacitor, inductor, etc.) across leads520-1and520-2. In such an instance, the assembler produces the version of electronic circuit package110as shown in step645.

FIG. 7is an example perspective view diagram illustrating a lead being attached to a conductive element and a node of an electronic circuit according to embodiments herein.

As shown, during assembly, the assembler produces the electronic circuit package110as previously discussed. For example, the assembler positions conductive element530-1to be adjacent with respect to the electronic circuitry122. The assembler further aligns the lead520-1as shown with respect to conductive element530-1and the node125-1to provide an electrically and thermally conductive bridge between the conductive element530-1and the node125-1.

In one embodiment, the assembler produces a connection between surface724-1of conductive element530-1and surface734-1of lead520-1as well as a connection between surface734-2of lead520-1and node125-1.

FIG. 8is an example perspective view diagram illustrating a lead coupled to respective nodes on an electronic circuit subsequent to soldering according to embodiments herein.

As mentioned above, subsequent to making connections as discussed above, the assembler then injects a material such as plastic to encapsulate the electronic circuitry122and leads120. As mentioned, each of the two-part leads between a node of the electronic circuitry122and a pad of the electronic circuit package110can include a conductive element530as well as a lead520.

FIG. 9is an example side view diagram illustrating steps of fabricating an electronic circuit package according to embodiments herein.

In step905, the assembler produces cavity220in a manner as previously discussed.

In step915, the assembler couples the leads120to nodes125of electronic circuitry in a manner as previously discussed.

In step925, the assembler flips the assembly including the leads120and the electronic circuitry122.

In step935, the assembler encapsulates the assembly with material160to produce electronic circuit package110.

FIG. 10is an example side view diagram illustrating steps of fabricating an electronic circuit package according to embodiments herein.

In step1005, the assembler produces cavity220in leads120.

In step1015, the assembler couples nodes125of the electronic circuitry122to the leads120.

In step1025, the assembler couples the circuit component240across the leads120opposite the electronic circuitry122.

In step1035, the assembler injects the material160to produce the electronic circuit package110.

FIG. 11Ais an example side view diagram illustrating steps of fabricating an electronic circuit package according to embodiments herein.

In step1105, the assembler receives frame1140. The frame can include one or more lengths of conductive material1110.

In step1115, the assembler removes a portion of material to produce a respective notch1120in each of the one or more lengths of conductive material1110.

In step1125, the assembler applies material1130to a surface of the lengths of conductive material1110. Application of the layer of insulative material1130to the surface of the lengths of conductive material1110can include filling at least a portion of the respective notches1120with the insulative material1130.

In step1135, the assembler removes material from the lengths of conductive material1110to produce cavity1132and leads120. Removing the portion of material from the lengths of conductive material1110can include creating a cavity1132in the lengths of conductive material1110opposite the layer of insulative material1130.

In one embodiment, removal of the material from the mass of conductive material (e.g., a respective length of conductive material1110) also produces multiple electrically isolated leads120in which to attach nodes125on the electronic circuitry122to the pads disposed on the planar surface of the electronic circuit package110.

In step1145, in a manner as previously discussed, installs the electronic circuitry122in the cavity1132. The assembler aligns and couples nodes125of the electronic circuitry122to corresponding leads120as shown.

In step1155, the assembler solders nodes125of the electronic circuitry122to corresponding leads120.

In step1165, the assembler encapsulates the assembly to produce electronic circuit package110for mounting on a respective substrate105.

Note that the frame1140can be removed at any suitable step in the above process such as in step1125.

FIG. 11Bis an example top view diagram illustrating a lead frame1140including multiple lengths of conductive material1120according to embodiments herein.

FIG. 11Cis an example perspective view diagram illustrating a length of conductive material1110including a notch1120according to embodiments herein.

FIG. 12is an example side view diagram illustrating fabrication of an electronic circuit package according to embodiments herein.

In step1205, the assembler receives one or more lengths of conductive material1110. The length of conductive material1110can be one of multiple lengths of conductive material that is processed in a similar manner.

In step1215, the assembler produces notch1120. The assembler electrically couples the component240across the notch1120such that one axial end of the component240is connected to the length of conductive material1110at one side of the notch1120; the other axial end of the component240is connected to the length of conductive material1110at an opposite side of the notch1120as shown.

In step1225, the assembler applies a coating of material1130as shown to a surface of the length of conductive material1110.

In step1235, the assembler produces cavity1132.

In step1245, in a manner as previously discussed, the assembler installs the electronic circuitry122in the cavity1132. The assembler aligns and couples nodes125of the electronic circuitry122to the leads120as shown.

In step1255, the assembler solders nodes125of the electronic circuitry122to corresponding leads120.

In step1265, the assembler encapsulates the assembly to produce electronic circuit package110for mounting on a respective substrate105.

FIGS. 13-15are flowcharts illustrating example methods according to embodiments herein.

FIG. 13is a flowchart1300illustrating an example method of fabricating an electronic circuit package according to embodiments herein. Note that there will be some overlap with respect to concepts as discussed above. Also, the steps can be executed in any suitable order.

In step1310, the electronic circuit package fabricator receives a lead frame210including lead material.

In step1320, the electronic circuit package fabricator removes a portion of the lead material in the lead frame210to create leads120and to accommodate placement of electronic circuitry122(e.g., a semiconductor device).

In step1330, the electronic circuit package fabricator electrically connects multiple leads120of the lead frame210to nodes of the electronic circuitry122.

FIG. 14is a flowchart1400illustrating an example method of fabricating an electronic circuit package according to embodiments herein. Note that there will be some overlap with respect to concepts as discussed above. Also, the steps can be executed in any suitable order.

In step1410, the electronic circuit package fabricator receives a lead frame610including at least one length of conductive material1110.

In step1420, the electronic circuit package fabricator produces a notch1120on a top surface of the length of conductive material1110.

In step1430, the electronic circuit package fabricator applies a layer of insulative material1130to the surface of the conductive material.

In step1440, the electronic circuit package fabricator removes a portion of material from the length of conductive material1110opposite the notch1120to create at least two leads120-1and120-2from the length of conductive material1110.

FIG. 15is a flowchart1500illustrating an example method of fabricating an electronic circuit package according to embodiments herein. Note that there will be some overlap with respect to concepts as discussed above. Also, the steps can be executed in any suitable order.

In step1510, the electronic circuit package fabricator receives electronic circuitry122. The electronic circuitry122has a substantially planar surface including multiple circuit nodes125.

In step1520, the electronic circuit package fabricator disposes a facing128-1of the planar surface of electronic circuitry122including the multiple circuit nodes125to point in a first direction

In step1530, the electronic circuit package fabricator disposes a set of conductive elements530adjacent to the electronic circuitry122.

In step1540, the electronic circuit package fabricator utilizes a set of planar leads (e.g., leads520) to connect the multiple circuit nodes125on the electronic circuitry122to planar surfaces (e.g., surfaces724) of the conductive elements530.

FIG. 16is an example diagram illustrating a power supply circuit according to embodiments herein. The electronic circuitry122can include any portion of or all of the electronic circuitry shown inFIG. 16.

As shown, power supply circuitry1600includes control circuitry1630, control switch circuitry1640(a.k.a., high side switch circuitry), synchronous switch circuitry1670(a.k.a., low side switch circuitry), inductor1644, and load1618. In general, power supply circuitry1600receives and converts input voltage1610to output voltage1675to power load1618.

During operation, control circuitry1630controls a state of drivers DR1and DR2. Driver DR1controls a state of respective control switch circuitry1640; driver DR2controls a state of respective synchronous switch circuitry1670.

In a first portion of a switching control cycle, when control switch circuitry1640is turned ON or activated (while synchronous switch circuitry1670is OFF or deactivated), a low impedance path is formed between respective source and drain nodes of the control switch circuitry1640. The amount of current flowing from the input voltage1610through the control switch circuitry1640and through the inductor1644increases. When in an OFF state, little or no current flows through synchronous switch circuitry1670.

In a second portion of a switching control cycle, when synchronous switch circuitry1670is turned ON or activated (while control switch circuitry1640is OFF or deactivated), a low impedance path is formed between respective source and drain nodes of the synchronous switch circuitry1670. The amount of current flowing from ground through the synchronous switch circuitry1670and through the inductor1644increases. When in an OFF state, little or no current flows through control switch circuitry1640.

The control circuitry1630controls the pulse durations of driving the control switch circuitry1640and the synchronous switch circuitry1670over multiple switching cycles such that the power supply circuitry1600maintains the output voltage1675within a desired magnitude range. Note that in this example, the power supply circuitry1600includes a single phase. It should be note that the power supply circuitry can be expanded to include any number of phases.

In one embodiment, each of the synchronous switch circuitry1670and the control switch circuitry1640are field effect transistors including respective gate, source, and drain nodes. The control switch circuitry1640and the synchronous switch circuitry1670can be fabricated in accordance with different types of technologies. For example, in one embodiment, the control switch circuitry1640is fabricated to include a set of parallel transistors in accordance with lateral or planar fabrication technology; the semiconductor chip substrate1670is fabricated a set of parallel transistors in accordance with vertical fabrication technology.

The electronic circuit package110as discussed herein, such as a surface mount device, can include any portion of or all of the components in power supply circuitry1600. For example, the electronic circuit package110can include the control switch circuitry1640and the synchronous switch circuitry1670.

In accordance with further embodiments, note that the electronic circuit package110can include one or more drivers, control circuitry1630, etc.

Techniques herein are well suited for use in electronic circuit package fabrication and power supply circuitry. However, it should be noted that embodiments herein are not limited to use in such applications and that the techniques discussed herein are well suited for use in other applications as well.