Radioactive-ray imaging apparatus, radioactive-ray imaging display system and transistor

Disclosed herein is a transistor including: a semiconductor layer; a first gate insulation film and a first interlayer insulation film which are provided on a specific surface side of the semiconductor layer; a first gate electrode provided at a location between the first gate insulation film and the first interlayer insulation film; an insulation film provided on the other surface side of the semiconductor layer; source and drain electrodes provided by being electrically connected to the semiconductor layer; and a shield electrode layer provided in such a way that at least portions of the shield electrode layer face edges of the first gate electrode, wherein at least one of the first gate insulation film, the first interlayer insulation film and the insulation film include a silicon-oxide film.

BACKGROUND

The present disclosure relates to a radioactive-ray imaging apparatus proper for X-ray imaging operations for typically medical cares and nondestructive inspections and relates to a radioactive-ray imaging display system employing such an apparatus as well as transistors employed in the apparatus and the system.

In recent years, a technique making use of a CCD (Charge Coupled Device) image sensor and/or a CMOS (Complementary Metal Oxide Semiconductor) image sensor is the mainstream of imaging techniques based on photoelectric conversion. The imaging technique based on photoelectric conversion is a technique for acquiring an image as an electrical signal. The imaging area of the imaging sensor is limited by the size of a crystal substrate or a silicon wafer. In the field of the medical care carried out by making use of an X ray in particular, however, there are demands for an imaging area having a large size, and the number of demands for a good moving-picture performance is also increasing.

A radioactive-ray imaging apparatus for obtaining an image based on radioactive rays as an electrical signal without making use of a radioactive-ray photographic film is being developed as an imaging apparatus required to have an imaging area with a large size. A typical example of the imaging apparatus required to have an imaging area with a large size is the X-ray imaging apparatus for taking an image of the chest of a human body. Such a radioactive-ray imaging apparatus is an apparatus having a wavelength conversion layer (serving as a fluorescent material) on a circuit substrate including photoelectric conversion devices such as photodiodes and TFTs (thin-film transistors). In the radioactive-ray imaging apparatus, after an incident radioactive ray has been converted into a visible ray, the visible ray is received by the photoelectric conversion device for converting the visible ray into an electrical signal. Then, a circuit employing the TFT reads out the electrical signal, the magnitude of which is determined by the quantity of the visible ray.

In this case, the transistor is created as follows. A plurality of layers are created on a substrate to form a laminated stack having the so-called top-gate structure or the so-called bottom-gate structure. The layers include an electrode layer for the gate, source and drain electrodes of the transistor and the like, a semiconductor layer used for creating the channel of the transistor, a gate insulation film and an interlayer insulation film. However, if a silicon-oxide film is used as the gate insulation film in the transistor having such a structure for example, an X ray may propagate to the inside of the film. If an X ray propagates to the inside of the silicon-oxide film, holes are generated in the film so that a threshold voltage Vth of the transistor is shifted to the negative side as is generally known. (Refer to documents such as Japanese Patent Laid-open No. 2008-252074.)

On the other hand, there has been proposed a transistor allowing the length of the shift of the threshold voltage Vth to be reduced by adoption of a dual-gate structure in which two gate electrodes are provided to sandwich a semiconductor layer. (Refer to Japanese Patent Laid-open No. 2004-265935.)

SUMMARY

Also in the case of the transistor adopting the dual-gate structure, however, the threshold voltage Vth is shifted in no small measure due to the effect of the holes generated in the silicon-oxide film by radiation of radioactive rays. It is thus desirable to repress such characteristic deteriorations attributed to radioactive rays in order to implement a transistor capable of demonstrating higher reliability.

It is thus an aim of the present disclosure addressing the problems described above to provide a transistor capable of repressing characteristic deteriorations attributed to radioactive rays in order to improve reliability, a radioactive-ray imaging apparatus employing the transistor and a radioactive-ray imaging display system including the apparatus.

A transistor according to the embodiment of the present disclosure includes:

a semiconductor layer;

a first gate insulation film and a first interlayer insulation film which are provided on a specific surface side of the semiconductor layer;

a first gate electrode provided at a location between the first gate insulation film and the first interlayer insulation film;

an insulation film provided on the other surface side of the semiconductor layer;

source and drain electrodes provided by being electrically connected to the semiconductor layer; and

a shield electrode layer provided in such a way that at least portions of the shield electrode layer face edges of the first gate electrode.

In the transistor, at least one of the first gate insulation film, the first interlayer insulation film and the insulation film include a silicon-oxide film.

A radioactive-ray imaging apparatus according to the embodiments of the present disclosure has a pixel section including the transistor according to the embodiments of the present disclosure and a photoelectric conversion device.

As described above, in the transistor and the radioactive-ray imaging apparatus according to the embodiments of the present disclosure, the silicon-oxide film, which is included in at least one of the first gate insulation film, the first interlayer insulation film, and the insulation film, is electrically charged with positive electrical charge of holes generated by radiation of radioactive rays to the silicon-oxide film and the positive electric charge shifts the threshold voltage Vth of the transistor. By providing the shield electrode layer in such a way that at least portions of the shield electrode layer face the edges of the first gate electrode, however, it is possible to reduce the effect of the positive electric charge particularly in the vicinity of a channel edge of the semiconductor layer and, thus, repress the shift of the threshold voltage Vth.

A radioactive-ray imaging display system according to the embodiments of the present disclosure includes an imaging apparatus (that is, the radioactive-ray imaging apparatus according to the embodiments of the present disclosure) for acquiring an image based on radioactive rays and a display apparatus for displaying the image acquired by the imaging apparatus.

In the transistor and the radioactive-ray imaging apparatus which are provided by the embodiment of the present disclosure, at least one of the first gate insulation film and the first interlayer insulation film which are provided on the specific surface side of the semiconductor layer and the insulation film provided on the other surface side of the semiconductor layer include a silicon-oxide film. The shield electrode layer provided in such a way that at least portions of the shield electrode layer face the edges of the first gate electrode. Thus, it is possible to repress a threshold-voltage shift caused by radiation of radioactive rays. As a result, it is possible to repress characteristic deteriorations attributed to the radiation of radioactive rays and, therefore, improve the reliability.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Embodiments of the present disclosure are explained below by referring to diagrams. It is to be noted that the explanation is divided into topics arranged in the following order.1: First Embodiment (A radioactive-ray imaging apparatus designed into an indirect conversion type to employ a transistor in which portions of both the source and drain electrodes forming a pair are each used as a shield electrode layer)2: First Modification (A typical configuration in which a portion of the drain electrode is used as a shield electrode layer)3: Second Embodiment (A typical configuration in which a shield electrode layer is provided separately from a pair of source and drain electrodes)4: Second Modification (A typical configuration in which a shield electrode layer is held at a negative electric potential)5: Third Modification (A typical transistor having a double-gate structure)6: Fourth Modification (Another typical transistor having a double-gate structure)7: Fifth Modification (A further typical transistor having a double-gate structure)8: Sixth Modification (A typical transistor having a top-gate structure)9: Seventh Modification (A typical transistor having a bottom-gate structure)10: Eighth Modification (A typical pixel circuit adopting the passive driving method)11: Ninth Modification (A typical radioactive-ray imaging apparatus of the direct conversion type)12: Typical Application (A typical radioactive-ray imaging display system)
1: First Embodiment
Whole Configuration of Radioactive-Ray Imaging Apparatus

FIG. 1is a functional block diagram showing the whole configuration of a radioactive-ray imaging apparatus1according to a first embodiment of the present disclosure. The radioactive-ray imaging apparatus1is the so-called indirect-conversion-type FPD (Flat Panel Detector) which receives radioactive rays after the rays have been subjected to a wavelength conversion process and obtains image information based on the radioactive rays as an electrical signal. In this case, typical radioactive rays are the α, β, γ and X rays. For example, the radioactive-ray imaging apparatus1is an X-ray imaging apparatus which is proper for mainly medical cares and other nondestructive inspections such as baggage inspections.

As shown in the figure, the radioactive-ray imaging apparatus1employs a pixel section12created on a substrate11and peripheral circuits (also referred to as driving circuits) provided in areas surrounding the pixel section12. The peripheral circuits typically include a row scanning section13, a horizontal select section14, a column scanning section15and a system control section16.

The pixel section12is the imaging area of the radioactive-ray imaging apparatus1. The pixel section12includes unit pixels P (each also referred to hereafter merely as a pixel P) which are laid out 2-dimesionally to form typically a pixel matrix. The unit pixel P may also be referred to hereafter merely as a pixel P in some cases. The unit pixels P are connected to pixel driving lines17. Typically, two pixel driving lines17are connected to the unit pixels P on each pixel row in the pixel matrix. To put it concretely, the two pixel driving lines17connected to the unit pixels P on each pixel row are a row select line and a reset control line. Every pixel P includes a photoelectric conversion device for generating electric charge having an amount according to the quantity of light incident to the pixel P and storing the electric charge internally in the pixel P. In the following description, the quantity of light incident to the pixel P is also referred to as a received-light quantity whereas the electrical charge is also referred to as an optical electric charge. By the way, a photodiode111A to be explained later is used as the photoelectric conversion device cited above.

In the pixel section12, the two pixel driving lines17provided for every pixel row are stretched in the row direction. In addition, for every pixel column, the unit pixels P in the pixel section12are also connected to a vertical signal line18stretched in the column direction. The pixel driving line17conveys a driving signal for reading out a signal from a pixel P connected to the pixel driving line17. InFIG. 1, a pixel driving line17is shown as a line even though the pixel driving line17is by no means limited to one line. One end of the pixel driving line17is connected to an output terminal of the row scanning section13. This output terminal connected to a pixel driving line17is a terminal specially provided for a row along which the pixel driving line17is stretched. The configuration of the pixel section12will be described later.

As show inFIG. 2, a scintillator layer114(serving as a wavelength conversion layer) is created on the pixel section12and is covered by a protection layer115.

The scintillator layer114carries out a wavelength conversion process to change the wavelength of an incident radioactive ray to a value in a sensitive region of the photodiode111A to be described later. The scintillator layer114makes use of a fluorescent material for typically converting an X ray into a visible ray. Typical examples of the fluorescent material are cesium iodide (CsI) doped with thallium (Tl), sulfur-cadmium oxide (Gd2O2S) doped with terbium (Tb) and BaFx (where X can be Cl, Br, I or the like). A desirable thickness of the scintillator layer114is in a range of 100 microns to 600 microns. For example, the thickness of the scintillator layer114can be set at 600 microns. Such a scintillator layer114can be created on a flattening film113typically by adoption of a vacuum evaporation method.

The protection layer115is typically an organic film made of parylene C or the like. The fluorescent material (such as particularly CsI) used for making the scintillator layer114is prone to deterioration caused by moistures. It is thus desirable to provide the protection layer115serving as a moisture barrier layer on the scintillator layer114.

The row scanning section13is configured to include a shift register and an address decoder. The row scanning section13functions as a pixel driving section for driving the unit pixels P in the pixel section12in typically row units. Signals output by pixels P on a pixel row selected by the row scanning section13in a scanning operation are supplied to the horizontal select section14through the vertical signal lines18connected to the pixels P. The horizontal select section14is configured to include amplifiers each provided for one of the vertical signal lines18and horizontal select switches also each provided for one of the vertical signal lines18.

The column scanning section15is configured to include a shift register and an address decoder. The column scanning section15scans the horizontal select switches of the horizontal select section14in order to sequentially select the switches on a one-switch-after-another basis. The column scanning section15scans and selects the horizontal select switches in order to supply the signals asserted by pixels P on the vertical signal lines18on a one-signal-after another basis on a horizontal select line19connected to sections external to the substrate11.

Circuit portions serving as the row scanning section13, the horizontal select section14, the column scanning section15and the horizontal select line19may be created directly above the substrate11or provided in an external control IC. As an alternative, these circuit portions can also be created on another substrate which is connected to the substrate11by a cable or the like.

The system control section16receives, among others, a clock signal from a source external to the substrate11and data specifying an operating mode. In addition, the system control section16outputs data such as internal information of the radioactive-ray imaging apparatus1. On top of that, the system control section16also has a timing generator for generating a variety of timing signals and carries out control to drive the peripheral circuits such as the row scanning section13, the horizontal select section14and the column scanning section15on the basis of the timing signals generated by the timing generator.

Detailed Configuration of the Pixel Section12

The pixel section12includes pixel circuits12acreated on the substrate11. The pixel circuit12ais shown inFIG. 3. Each of the pixel circuits12aemploys a photodiode111A and transistors111B. The photodiode111A and the transistors111B will be described later. It is to be noted that an organic insulation film serving as a flattening film not shown in the figure is typically provided on the pixel circuit12a. In addition, a protection film also not shown in the figure may also be provided on the flattening film. Detailed configurations of components composing the pixel section12are explained as follows.

Pixel Circuit

FIG. 3is a diagram showing a typical pixel circuit12ain a photoelectric conversion layer112. As shown in the figure, the pixel circuit12aemploys a photodiode111A serving as the photoelectric conversion device mentioned before as well as transistors Tr1, Tr2and Tr3which are the transistors111B cited above. The pixel circuit12ais connected to the vertical signal line18described before, a row select line171and a reset control line172which function as the pixel driving lines17.

The photodiode111A is typically a PIN (Positive Intrinsic Negative) diode. Typically, the sensitive region of the photodiode111A is a visible-light region. That is to say, the received-light wavelength region of the photodiode111A is a visible-light region. When a reference electric potential Vxref is applied to a terminal133connected to a specific end of the photodiode111A, the photodiode111A generates signal electric charge having an amount corresponding to the quantity of light incident to the photodiode111A. The other end of the photodiode111A is connected to an accumulation node N. The accumulation node N has a capacitor136for accumulating the signal electric charge generated by the photodiode111A. Note that it is also possible to provide a configuration in which the photodiode111A is connected between the accumulation node N and the ground. A cross-sectional structure of the photodiode111A will be described later.

Each of the transistors Tr1, Tr2and Tr3is typically a FET (Field Effect Transistor) of N-type or P-type in which a semiconductor layer for channel creation is made typically from LTPS (Low-Temperature Polysilicon). This semiconductor layer is a semiconductor layer126to be described later. However, the material used for making the semiconductor layer does not have to be the LTPS. For example, the semiconductor layer can also be made of a silicon-group semiconductor such as microcrystal silicon or polysilicon. As an alternative, the semiconductor layer can also be made of a semiconductor oxide such as indium-gallium-zinc oxide (InGaZnO) or zinc oxide (ZnO).

The transistor Tr1is a reset transistor connected between a terminal137for receiving a reference electric potential Vref and the accumulation node N. When the reset transistor Tr1is turned on in response to a reset signal Vrst, the reset transistor Tr1resets the electric potential appearing at the accumulation node N to the reference electric potential Vref.

The transistor Tr2is a read transistor. The gate electrode of the read transistor Tr2is connected to the accumulation node N whereas the drain electrode of the read transistor Tr2is connected to a terminal134which is connected to a power supply VDD. The gate electrode of the read transistor Tr2receives a signal representing signal electric charge accumulated in the photodiode111A whereas the source electrode of the read transistor Tr2outputs a signal voltage according to the signal electric charge.

The transistor Tr3is a row select transistor connected between the source electrode of the read transistor Tr2and the vertical signal line18. When the row select transistor Tr3is turned on in response to a row scanning signal Vread, the row select transistor Tr3passes on the signal appearing at the source electrode of the read transistor Tr2to the vertical signal line18. With regard to the row select transistor Tr3, it is also possible to provide a configuration in which the row select transistor Tr3is connected between the drain electrode of the read transistor Tr2and the power supply VDD whereas the source electrode of the read transistor Tr2is connected directly to the vertical signal line18.

The following description explains cross-sectional structures of each of the transistors Tr1, Tr2and Tr3which are each also referred to as the transistor111B which is a generic technical term for the transistors Tr1, Tr2and Tr3.

Detailed Configuration of the Transistor111B

FIG. 4is a cross-sectional diagram showing a typical configuration of the transistor111B. The transistor111B has the so-called dual-gate structure in which the two gate electrodes of the transistor111B sandwich a semiconductor layer126. To put it concretely, the transistor111B has a gate electrode120A in a selective area on a substrate11whereas a second gate insulation film129is provided to cover the gate electrode120A. On the second gate insulation film129, the semiconductor layer126is provided. The semiconductor layer126includes a channel layer126a. The semiconductor layer126also includes an LDD (Lightly Doped Drain) layer126band an N+layer126con each of the two edges of the channel layer126a. A first gate insulation film130is provided to cover the semiconductor layer126. In a selective area on the first gate insulation film130, a gate electrode120B is provided. The selective area on the first gate insulation film130is an area facing the gate electrode120A.

On the gate electrode120B, a first interlayer insulation film131is created. Holes H1are provided in portions of the first interlayer insulation film131and the first gate insulation film130. On the first interlayer insulation film131, a pair of source and drain electrodes128A and128B are provided on the first interlayer insulation film131to fill up such holes H1so that the source and drain electrodes128A and128B are electrically connected to the semiconductor layer126. A second interlayer insulation film132is provided on the source and drain electrodes128A and128B.

It is to be noted that the gate electrode120B according to this embodiment is a concrete example of the first gate electrode according to the embodiment of the present disclosure whereas the gate electrode120A according to this embodiment is a concrete example of the second gate electrode according to the embodiment of the present disclosure. In addition, the first gate insulation film130according to this embodiment is a concrete example of the first gate insulation film according to the embodiment of the present disclosure whereas the second gate insulation film129according to this embodiment is a concrete example of the insulation film according to the embodiment of the present disclosure. On top of that, the first interlayer insulation film131according to this embodiment is a concrete example of the first interlayer insulation film according to the embodiment of the present disclosure whereas the second interlayer insulation film132according to this embodiment is a concrete example of the second interlayer insulation film according to the embodiment of the present disclosure.

Each of the gate electrode120A and the gate electrode120B is a single-layer film or a multi-layer film and the film is made of a material such as titan (Ti), aluminum (Al), molybdenum (Mo), tungsten (W) or chrome (Cr). As described above, the second gate insulation film129is sandwiched between the gate electrode120A and the semiconductor layer126whereas the first gate insulation film130is sandwiched between the semiconductor layer126and the gate electrode120B which faces the gate electrode120A. In other words, the gate electrode120A and the gate electrode120B face each other in about the same area, sandwiching the channel layer126a. Such a gate electrode120B is subjected to a patterning process by making use of typically the same photo mask as the gate electrode120A. However, it is desirable to provide an ideal configuration in which the gate electrode120B is provided right above the gate electrode120A.

The thickness of each of the gate electrode120A and the gate electrode120B is in a range of 30 nm to 150 nm. For example, the thickness of the gate electrode120A is set at a typical value of 65 nm whereas the thickness of the gate electrode120B is set at a typical value of 90 nm.

Each of the second gate insulation film129and the first gate insulation film130is configured to include typically a silicon-oxide film. As the silicon-oxide film, it is possible to make use of a silicon compound film including oxygen. A typical example of the silicon compound film is a film made of silicon oxide (SiO2) or silicon oxynitride (SiON). To put it concretely, each of the second gate insulation film129and the first gate insulation film130is a laminated film created as a stack from a film made of silicon oxide (SiO2) and a film made of silicon nitride (SiNx). To be more specific, the second gate insulation film129is a laminated stack created by sequentially superposing a silicon-nitride film129A and a silicon-oxide film129B on the substrate11in the same order as the order in which the silicon-nitride film129A and the silicon-oxide film129B are enumerated in this sentence. By the same token, the first gate insulation film130is a laminated stack created by sequentially superposing a silicon-oxide film130A, a silicon-nitride film130B and a silicon-oxide film130C on the semiconductor layer126in the same order as the order in which the silicon-oxide film130A, the silicon-nitride film130B and the silicon-oxide film130C are enumerated in this sentence. That is to say, it is desirable to provide a configuration in which the silicon-oxide film129B and the silicon-oxide film130A are created in the vicinity of the semiconductor layer126and at locations sandwiching the semiconductor layer126. Such a configuration is provided in order to eliminate a threshold-voltage shift caused by the effect of a boundary-surface level on the semiconductor layer126.

The semiconductor layer126can be made of typically polysilicon, low-temperature polysilicon, microcrystal silicon or a non-crystal silicon. However, it is desirable to make the semiconductor layer126of low-temperature polysilicon. As an alternative, the semiconductor layer126can also be made of a semiconductor oxide such as indium-gallium-zinc oxide (IGZO). On each edge side of the channel layer126ain the semiconductor layer126, the N+layer126cis provided to serve as an area of connection with the source or drain electrode128A or128B. The edge sides of the channel layer126aare edges on the source and drain sides. In addition, the LDD layer126bis created between the channel layer126aand the N+layer126cfor the purpose of reducing the magnitude of a leak current.

Source/Drain Electrodes and Shield Electrode Layer

Each of the source and drain electrodes128A and128B is capable of functioning as a source or drain electrode, making it possible to swap the functions of the source and drain electrodes with each other between the source and drain electrodes128A and128B. In addition, while any one of the source and drain electrodes128A and128B is functioning as a source electrode, the other of the source and drain electrodes128A and128B is functioning as a drain electrode. Each of the source and drain electrodes128A and128B is a single-layer film or a multi-layer film and the film is made of a material such as titan (Ti), aluminum (Al), molybdenum (Mo), tungsten (W) or chrome (Cr). The source and drain electrodes128A and128B are connected to wires for reading out signals. In order to make each of the source and drain electrodes128A and128B capable of functioning as a source or drain electrode and make it possible to swap the functions of the source and drain electrodes with each other between the source and drain electrodes128A and128B in this embodiment as described above, the transistor111B is designed into a configuration in which the LDD layer126bis provided on each of the two sides of the channel layer126a.

In this embodiment, each of the source and drain electrodes128A and128B is provided by being extended to an area facing an edge e2of the gate electrode120B. In other words, each of the source and drain electrodes128A and128B is provided to overlap (or, strictly speaking, partially overlap) an area facing the edge e2of the gate electrode120B. The portions facing the edges e2correspond to the shield electrode layers128a1and128b1respectively. That is to say, the portions facing the edges e2function also as the shield electrode layers128a1and128b1respectively. As described above, the gate electrode120B is provided to face the gate electrode120A. Since the channel layer126ais created in an area corresponding to the gate electrode120A in the semiconductor layer126, however, the source and drain electrodes128A and128B are provided to face channels edges e1. It is to be noted that, as described above, the LDD layer126bis provided on each of the two sides of the channel layer126aand, in this case, the shield electrode layers128a1and128b1are superposed also on the LDD layer126b.

It is to be noted that, in this embodiment, the gate electrode120B has a taper portion on each of the side surfaces thereof. These taper portions are created inevitably in an etching process. If the gate electrode120B has such taper portions, the edges e2of the gate electrode120B are the bottom edges of the taper portions as shown in an enlarged diagram provided on the right bottom corner ofFIG. 4.

The shield electrode layers128a1and128b1function as electrical shields for reducing the effect of positive electric charge accumulated in the silicon-oxide film on the semiconductor layer126(or, particularly the channel layer126a). At least, portions of the shield electrode layers128a1and128b1are provided to face the edges e2of the gate electrode120B. It is desirable to provide the shield electrode layers128a1and128b1in such a way that the distance d between the shield electrode layers128a1and128b1is smaller than the gate length L of the gate electrode120B. It is even more desirable to provide the shield electrode layers128a1and128b1in such a way that the shield electrode layers128a1and128b1cover all the taper portions of the gate electrode120B. In this case, as explained before, it is ideal to provide the gate electrode120B at the same position as the gate electrode120A. In actuality, however, the position of the gate electrode120B may be shifted from the position of the gate electrode120A in some cases. The shift of the position of the gate electrode120B from the position of the gate electrode120A is referred to as an adjustment shift. If the shield electrode layers128a1and128b1cover the taper portions of the gate electrode120B, the effect of holes serving as positive electric charge on the channel layer126acan be reduced even in the case of such an adjustment shift. It is to be noted that the lower limit of the distance d between the shield electrode layers128a1and128b1is not limited to any value in particular. If the shield electrode layers128a1and128b1are too close to each other, however, problems such as a short circuit are raised. It is thus nice to set the position of an edge e3by taking these problems into consideration. In this embodiment, the shield electrode layers128a1and128b1are provided on the first interlayer insulation film131as portions of the source and drain electrodes128A and128B as described above.

In the same way as the second gate insulation film129and the first gate insulation film130, each of the first interlayer insulation film131and the second interlayer insulation film132is configured as a single-layer film or a multi-layer film and the film is typically a silicon-oxide film, a silicon-oxynitride film or a silicon-nitride film. In this case, the first interlayer insulation film131is a laminated stack including the silicon-oxide film131aand the silicon-nitride film131bwhich are sequentially created above the substrate11in the same order as the order in which the silicon-oxide film131aand the silicon-nitride film131bare enumerated in this sentence. On the other hand, the second interlayer insulation film132is a silicon-oxide film. It is to be noted that the layer of a portion of the transistor111B is common to the photodiode111A to be described later. That is to say, the layer of the portion of the transistor111B is created in the same thin-film process as the photodiode111A. Thus, as long as the second interlayer insulation film132in the photodiode111A is concerned, from the viewpoint of an etching select ratio used at the fabrication time, it is desirable to make use of a silicon-oxide film rather than a silicon-nitride film as the second interlayer insulation film132.

Method for Manufacturing the Transistor111B

The transistor111B described above can be manufactured typically as follows.FIGS. 5A to 5Iare explanatory cross-sectional model diagrams to be referred to in the following description of a process sequence according to a method for manufacturing the transistor111B.

First of all, as shown inFIG. 5A, the gate electrode120A is created on the substrate11. To put it concretely, after a film made of a high-melting-point metal such as Mo has been created on the substrate11by adoption of typically a sputtering method, the film is subjected to a patterning process adopting typically a photolithography method to form an island shape.

Then, as shown inFIG. 5B, the second gate insulation film129is created. To put it concretely, the silicon-nitride film129A and the silicon-oxide film129B are created sequentially and continuously to cover the gate electrode120A on the substrate11in the same order as the order in which the silicon-nitride film129A and the silicon-oxide film129B are enumerated in this sentence by adoption of typically the CVD method for creating the second gate insulation film129having a thickness determined in advance.

Subsequently, on the created second gate insulation film129, an amorphous silicon layer (that is, an α-Si layer)1260to be used as the semiconductor layer126is created by adoption of typically the CVD method.

Then, as shown inFIG. 5C, the created α-Si layer1260is subjected to a multi-crystallization process in order to create the semiconductor layer126. To put it concretely, first of all, at a typical temperature in a range of 400 degrees Celsius to 450 degrees Celsius, the α-Si layer1260is subjected to a dehydrogenation treatment (or an annealing process) in order to decrease the hydrogen content to a value not exceeding 1%. Then, by adoption of typically an ELA (Excimer Laser) method, a laser beam having a typical wavelength of 308 nm is radiated to the α-Si layer1260in order to convert the α-Si layer1260into a multi-crystal layer. Afterwards, the multi-crystal layer is doped with typically boron in order to adjust the threshold voltage Vth so as to create the semiconductor layer126.

Subsequently, as shown inFIG. 5D, ions are injected into predetermined areas of the semiconductor layer126obtained as a result of the multi-crystallization process in order to create the LDD layer126band the N+layer126cin each of the predetermined areas.

Then, as shown inFIG. 5E, the first gate insulation film130is created. To put it concretely, the silicon-oxide film130A, the silicon-nitride film130B and the silicon-oxide film130C are continuously created as films each having a predetermined thickness in the same order as the order in which the silicon-oxide film130A, the silicon-nitride film130B and the silicon-oxide film130C are enumerated in this sentence by adoption of typically the CVD method to form the first gate insulation film130covering the semiconductor layer126. It is to be noted that the thicknesses of the silicon-oxide film130A, the silicon-oxide film130C and the silicon-oxide film129B of the second gate insulation film129described above are set at such values that the sum of the thicknesses of the silicon-oxide film130A, the silicon-oxide film130C and the silicon-oxide film129B of the second gate insulation film129is not greater than 65 nm. It is also worth noting that, after the first gate insulation film130has been created, contact holes are created in advance for electrically connecting the gate electrode120A to the gate electrode120B which is created in a process described below. However, the process of creating the contact holes is shown in none of the figures.

Then, as shown inFIG. 5F, the gate electrode120B is created on the first gate insulation film130. To put it concretely, after a film made of a high-melting-point metal such as Mo has been created on the substrate11by adoption of typically a sputtering method, the film is subjected to a patterning process adopting typically a photolithography method to form an island shape. At that time, the gate electrode120B is subjected to a patterning process by making use of typically the same photo mask as the gate electrode120A. However, it is desirable to adjust the position of the gate electrode120B in order to create the gate electrode120B ideally right above the gate electrode120A.

Then, as shown inFIG. 5G, the silicon-oxide film131aand the silicon-nitride film131bare continuously created by adoption of typically the sputtering method in the same order as the order in which the silicon-oxide film131aand the silicon-nitride film131bare enumerated in this sentence in order to create the first interlayer insulation film131.

Subsequently, as shown inFIG. 5H, the contact holes H1are created to penetrate the created first interlayer insulation film131and the created first gate insulation film130till the surface of the semiconductor layer126by carrying out typically an etching process.

Afterwards, as shown inFIG. 5I, the source and drain electrodes128A and128B are created to fill up the holes H1by adoption of typically the sputtering method and then subjected to a patterning process to form predetermined shapes of the source and drain electrodes128A and128B. In this process, a gap (or a separation groove) is created between the source and drain electrodes128A and128B so that a portion of each of the source and drain electrodes128A and128B overlaps the gate electrode120B. Thus, the source and drain electrodes128A and128B are created to function also as the shield electrode layers128a1and12bb1. Finally, a silicon-oxide layer or the like is created to serve as the second interlayer insulation film132on the source and drain electrodes128A and128B as well as the first interlayer insulation film131by adoption of typically the CVD method. The creation of the second interlayer insulation film132completes the transistor111B shown inFIG. 4.

Configuration of the Photodiode111A

FIG. 6is a model diagram showing a typical cross-sectional configuration of the photodiode111A. The photodiode111A is provided on the substrate11along with the transistor111B. A portion of the stack structure is common to the transistor111B and is created by carrying out the same thin-film process as the transistor111B. The detailed configuration of the photodiode111A is explained as follows.

The photodiode111A has a p-type semiconductor layer122in a selective area on a substrate11. The p-type semiconductor layer122and the selective area sandwich a gate insulation layer121a. A first interlayer insulation film121bhaving a contact hole H2is provided on the substrate11(or, strictly speaking, on the gate insulation layer121a) to face the p-type semiconductor layer122. An i-type semiconductor layer123is provided on the p-type semiconductor layer122and inside the contact hole H2of the first interlayer insulation film121b. On the i-type semiconductor layer123, an n-type semiconductor layer124is created. In the n-type semiconductor layer124, a second interlayer insulation film121chaving a contact hole H3is provided. The n-type semiconductor layer124is electrically connected to an upper electrode125through the contact hole H3.

In the typical structure described above, on the side close to the substrate11or the lower side, the p-type semiconductor layer122is provided and, on the upper side, the n-type semiconductor layer124is provided. It is to be noted, however, that the structure can also be made upside down. That is to say, on the lower side, the n-type layer is provided and, on the upper side, the p-type layer is provided. In addition, a portion or the whole or each of the gate insulation layer121a, the first interlayer insulation film121band the second interlayer insulation film121chas the same layer structure as each layer of respectively the second gate insulation film129, the first gate insulation film130and the first interlayer insulation film131which are employed in the transistor111B. This photodiode111A can be manufactured by carrying out the same thin-film process as the transistor111B.

The p-type semiconductor layer122is a p+ area made of typically poly-crystal silicon (or polysilicon) doped with typically boron (B). The thickness of the p-type semiconductor layer122is typically in a range of 40 nm to 50 nm. The p-type semiconductor layer122functions also as typically a lower electrode for reading out signal electric charge. The p-type semiconductor layer122is connected to an accumulation node N described earlier by referring toFIG. 3. As an alternative, the p-type semiconductor layer122can also serve as the accumulation node N in which electric charge is accumulated.

The i-type semiconductor layer123is a semiconductor layer exhibiting intermediate conductivity between the p and n types. The i-type semiconductor layer123is typically an undoped pure semiconductor layer made of typically non-crystal silicon or amorphous silicon. The thickness of the i-type semiconductor layer123is typically in a range of 400 nm to 1,000 nm. The larger the thickness, the larger the optical sensitivity of the photodiode111A.

The n-type semiconductor layer124is made of typically non-crystal silicon or amorphous silicon, forming an n+ area. The thickness of the n+ area is typically in a range of 10 nm to 50 nm.

The upper electrode125is an electrode for supplying a reference level provided for photoelectric conversion. The n-type semiconductor layer124is typically a transparent conductive film made of ITO (Indium Tin Oxide) or the like. The upper electrode125is connected to a power-supply wire127for applying a voltage to the upper electrode125. The power-supply wire127is made of typically a material having a resistance lower than that of the upper electrode125. Typical examples of the material are Ti, Al, Mo, W and Cr.

Effects of the Embodiment

Effects of this embodiment are explained by referring toFIGS. 1 to 4andFIGS. 7 to 11as follows. A radiation source shown in none of the figures radiates a radioactive ray such as an X ray to the radioactive-ray imaging apparatus1. When the radioactive ray enters the radioactive-ray imaging apparatus1after passing through a detected body serving as the imaging object, the incident radioactive ray is subjected to a photoelectric conversion process following a wavelength conversion process in order to generate an electrical signal representing an image of the imaging object. To put it in detail, first of all, the radioactive ray incident to the radioactive-ray imaging apparatus1is subjected to the wavelength conversion process carried out by the scintillator layer114provided on the pixel section12in order to change the wavelength of the radioactive ray to a wavelength in the sensitive region (or the visible region in this case) of the photodiode111A. Thus, the scintillator layer114emits visible light. The visible light emitted by the scintillator layer114in this way is supplied to the pixel section12.

When an electric potential determined in advance is applied to the photodiode111A from a power-supply line shown in none of the figures through the upper electrode125, incident light is supplied to the pixel section12from the side close to the upper electrode125and the pixel section12carries out the photoelectric conversion process to convert the incident light into signal electric charge having an amount according to the quantity of the incident light. The signal electric charge generated as a result of the photoelectric conversion process is read out from the side close to the p-type semiconductor layer122as an optical current.

To put it in detail, electric charge generated as a result of the photoelectric conversion process carried out by the photodiode111A is collected in the p-type semiconductor layer122(or the accumulation node N) serving as an accumulation layer and read out from the accumulation layer as a current which is supplied to the gate electrode of the transistor Tr2functioning as a read transistor. Receiving the current read out from the accumulation layer, the read transistor Tr2outputs a signal voltage according to the signal electric charge represented by the current. When the row select transistor Tr3is turned on in response to the row scanning signal Vread, the signal voltage output by the read transistor Tr2is asserted on the vertical signal line18, that is the signal voltage output by the read transistor Tr2is read out onto the vertical signal line18. The signal voltage asserted on the vertical signal line18is output to the horizontal select section14through the vertical signal line18for each pixel column.

As described above, in this embodiment, an incident radioactive ray such as an X ray is subjected to a waveform conversion process and a photoelectric conversion process in order to obtain an electrical signal representing image information. However, some radioactive rays pass through the scintillator layer114as they are without experiencing the waveform conversion process carried out in the scintillator layer114. If such radioactive rays hit the pixel section12, in particular, a problem like one described as follows is raised in a transistor111B. The transistor111B has silicon-oxide films each containing oxygen in the second gate insulation film129, the first gate insulation film130, the first interlayer insulation film131and the second interlayer insulation film132. If a radioactive ray hits an silicon-oxide film containing oxygen, electrons in the film are excited due to, among others, the so-called photoelectric effect, the Compton scattering phenomenon or the electron-pair generation phenomenon. As a result, residual holes are trapped on a boundary surface and a defect. That is to say, the boundary surface and the defect are electrically charged with residual holes.

Typical Comparison Transistor

FIG. 7is an explanatory cross-sectional diagram referred to in the following description of an effect given by positive electric charge in a typical comparison transistor100serving as a typical transistor provided for the purpose of comparison with the transistor111B provided by the present disclosure. The comparison transistor100is also a transistor having a dual-gate structure. As shown in the figure, the comparison transistor100includes a gate electrode102A, a first gate insulation film103, a semiconductor layer104, a second gate insulation film105, a gate electrode102B and a first interlayer insulation film107which are sequentially created on a substrate101in the same order as the order in which the gate electrode102A, the first gate insulation film103, the semiconductor layer104, the second gate insulation film105, the gate electrode102B and the first interlayer insulation film107are enumerated in this sentence. The semiconductor layer104includes a channel layer104a, an LDD layer104band an N+layer104c. In the first interlayer insulation film107and the second gate insulation film105, contact holes are provided. Source and drain electrodes106are connected to the semiconductor layer104through these contact holes. A second interlayer insulation film108is created on the source and drain electrodes106as well as on the first interlayer insulation film107. In such a configuration, the first gate insulation film103is a laminated stack provided above the substrate101as a stack including a silicon-nitride film103A and a silicon-oxide film103B which are created above the substrate101sequentially in the same order as the order in which the silicon-nitride film103A and the silicon-oxide film103B are enumerated in this sentence. By the same token, the second gate insulation film105is a laminated stack provided above the substrate101as a stack including a silicon-oxide film105A, a silicon-nitride film105band a silicon-oxide film105C which are created above the substrate101sequentially in the same order as the order in which the silicon-nitride film103A, the silicon-nitride film105band the silicon-oxide film105C are enumerated in this sentence. In the same way, the first interlayer insulation film107is a laminated stack provided above the substrate101as a stack including a silicon-oxide film107A and a silicon-nitride film107B which are created above the substrate101sequentially in the same order as the order in which the silicon-oxide film107A and the silicon-nitride film107B are enumerated in this sentence.

In the transistor100serving as a typical comparison transistor, the silicon-oxide film103B, the silicon-oxide film105A, the silicon-oxide film105C, the silicon-oxide film107A and the second interlayer insulation film108which is also a silicon-oxide film are electrically charged with positive electric charge due to the reason described before. Among the silicon-oxide film103B, the silicon-oxide film105A, the silicon-oxide film105C, the silicon-oxide film107A and the second interlayer insulation film108, for example, the positive electric charge in the second interlayer insulation film108has a worst effect on the semiconductor layer104as indicated by a model shown inFIG. 7. To be more specific, the positive electric charge accumulated in the second interlayer insulation film108has a very bad effect on a channel edge e1as indicated by dashed-line arrows in the model shown in the same figure. Since the comparison transistor100has a dual-gate structure in this case, the positive electric charge accumulated in portions right above the gate electrode102B is shielded by the gate electrode102B so that the effect of this positive electric charge on the semiconductor layer104is reduced. In an area on an outer side outside an edge e2of the gate electrode102B, however, such a shielding effect cannot be obtained sufficiently. For example, in a gap between the gate electrode102B and the drain and source electrodes106, such a shielding effect cannot be obtained sufficiently. In addition, even though it is ideal to provide the gate electrode102B at a position right above the gate electrode102A, in actuality, it is difficult to adjust the position of the gate electrode102B to the position of the gate electrode102A with a high degree of precision. Thus, variations of the position of the gate electrode102B are generated with ease. The variations of the position of the gate electrode102B are each referred to as a position shift. If such a position shift exists, it is particularly difficult to sufficiently obtain the shielding effect for the channel edge e1.

For the reasons described above, the channel layer126aor, in particular, the channel edge e1is affected by positive electric charge with ease. Thus, the threshold voltage Vth is undesirably shifted to the negative side. In addition, if the semiconductor layer104is made of low-temperature polysilicon in particular, it is desirable to sandwich the semiconductor layer104between silicon-oxide films. Thus, in comparison with a configuration using amorphous silicon for example, the threshold voltage Vth cited above is shifted with ease. In addition, if the threshold voltage Vth is shifted, typically, the off current and the on current change, raising problems. To put it concretely, the off current increases, causing a current leak whereas the on current decreases, making it impossible to read out the signal electric charge. That is to say, it is difficult to sustain the reliability of the transistor100.

In the case of this embodiment, on the other hand, the shield electrode layers128a1and128b1are provided on the first interlayer insulation film131. The shield electrode layers128a1and128b1are provided on the first interlayer insulation film131in such a way that portions of the shield electrode layers128a1and128b1face the edges e2of the gate electrode120B. That is to say, the shield electrode layers128a1and128b1are provided on the first interlayer insulation film131in such a way that the portions of the shield electrode layers128a1and128b1overlap the gate electrode120B. Thus, as shown in the model ofFIG. 8, in the first place, the shielding effect of the gate electrode120B typically reduces the effect of positive electric charge accumulated in the second interlayer insulation film132made of silicon oxide on the channel layer126a. In the second place, in this embodiment, the shielding effect of the shield electrode layers128a1and128b1represses the effect of positive electric charge on the channel edges e1.

FIG. 9is a diagram showing the effect of an X-ray radiation quantity of on the current-voltage characteristic of the transistor111B including the semiconductor layer126made of low-temperature polysilicon for a case in which an X ray is radiated to the transistor111B. The current-voltage characteristic of the transistor111B is a relation between the gate voltage Vg and the drain current Ids. The current-voltage characteristic has been obtained for a source-drain voltage of 6.1 V, a width W of 20.5 microns and a length L of 6 microns. In addition,FIG. 10is a characteristic diagram showing a relation between the X-ray radiation quantity and the shift quantity (ΔVshift) of a reference voltage which is a voltage Vg with the drain current Ids of 1.0 e-11 A taken as a reference. On the other hand,FIG. 11is a characteristic diagram showing also a relation between the X-ray radiation quantity and the S value (or the threshold value).

It is to be noted that the curves shown inFIGS. 9,10and11are curves obtained for an X-ray tube voltage of 90 kV and X-ray radiation quantities of 0 Gy, 70 Gy, 110 Gy and 200 Gy. In addition, instead of measuring the shift quantity of the voltage Vg (that is, the threshold voltage Vth) with the drain current Ids of 5.0 e-7 A taken as a reference, the shift quantity (ΔVshift) of the voltage Vg with the drain current Ids of 1.0 e-11 A taken as a reference is measured in order to show this shift quantity in a more easily understood way.

As is obvious from the curves, if an X ray is radiated to the transistor111B, as the radiation quantity of the X ray is increased from 0 Gy to 200 Gy through 70 Gy and 110 Gy, the shift ΔVth of the threshold voltage Vth of the transistor111B shows a gradually rising trend. However, the curves represent good characteristics.

In the embodiment described above, in any of the silicon-oxide films included in the second gate insulation film129, the first gate insulation film130, the first interlayer insulation film131and the second interlayer insulation film132which are employed in the transistor111B, holes are generated by radiation of a radioactive ray so that positive electric charge is accumulated in the second gate insulation film129, the first gate insulation film130, the first interlayer insulation film131and the second interlayer insulation film132. However, the shield electrode layers128a1and128b1are provided on the first interlayer insulation film131in such a way that portions of the shield electrode layers128a1and128b1face the edges e2of the gate electrode120B. Thus, particularly in the vicinity of the channel edge e1of the semiconductor layer, for example, the effect of the positive electric charge accumulated in the second interlayer insulation film132is reduced so that the shift ΔVth of the threshold voltage Vth can be repressed. As a result, it is possible to repress characteristic deteriorations attributed to the radiation of the radioactive ray and, therefore, improve the reliability of the transistor111B.

In addition, in this embodiment, the source and drain electrodes128A and128B function also as the shield electrode layers128a1and128b1so that, in the process of patterning the source and drain electrodes128A and128B, the shield electrode layers128a1and128b1can be created with ease.

First Typical Modification

The first embodiment described so far has a structure in which the two shield electrode layers128a1and128b1are provided on both the sides of the channel by making use of portions of both the source and drain electrodes128A and128B. As shown inFIGS. 12A and 12B, however, a shield electrode layer can also be provided only on one side of the channel.FIGS. 12A and 12Bare cross-sectional diagrams showing a rough configuration of a transistor111C according to first typical modification which is typical modification of the first embodiment described above. Much like the transistor111B according to the first embodiment described above, the transistor111C also referred to hereafter as a first modified version is a transistor having a dual-gate structure having the semiconductor layer126between the two gate electrodes120A and120B. In addition, the second gate insulation film129, the first gate insulation film130, the first interlayer insulation film131and the second interlayer insulation film132each include a silicon-oxide film. It is to be noted that, in the transistor111C described below, each configuration element identical with its counterpart employed in the first embodiment described above is denoted by the same reference numeral as the counterpart and the explanation of the identical configuration element is properly omitted.

In this first modified version, however, a drain electrode128C functioning only as the drain electrode and a source electrode128D functioning only as the source electrode are connected electrically to the semiconductor layer126on the first interlayer insulation film131. In addition, among the channel layer126a, the LDD layer126band the N+layer126cwhich are included in the semiconductor layer126, the LDD layer126bis provided only on the side close to the drain electrode128C. This is because, since the functions of the source and drain electrodes are not swapped with each other between the drain electrode128C and the source electrode128D in the transistor111C for example, it is nice to provide the LDD layer126bonly on the side close to the drain electrode128C, the voltage supplied to which is relatively high. Since the source electrode128D is sustained at the electric potential of the ground in some cases, the LDD layer126bdoes not have to be provided on the side close to the source electrode128D.

In such a configuration, a portion of the drain electrode128C functions also as a shield electrode layer128c1and a portion of the shield electrode layer128c1is provided to face the edge e2of the gate electrode120B. Even if positive electric charge is accumulated in, for example, the second interlayer insulation film132due to the reasons explained before, the shielding effect of the shield electrode layer128c1reduces the effect of the positive electric charge on the channel layer126aprovided on the drain side of the semiconductor layer126. In particular, the shielding effect of the shield electrode layer128c1reduces the effect of the positive electric charge on the channel edge e2. On the source side of the semiconductor layer126, on the other hand, the current is not so large as the current on the drain side of the semiconductor layer126. Thus, the LDD layer is not required on the source side of the semiconductor layer126. In addition, even if the shield electrode layer does not exist, there is hardly an effect, which is as large as that on the drain side of the semiconductor layer126, on the threshold voltage Vth. It is thus possible to provide a configuration in which the shield electrode layer128c1is provided only on one side of the channel, that is, only on the drain side in particular. In such a configuration, the shield electrode layer128c1can be provided efficiently on a portion which can easily have an effect on the characteristic.

The first modified version described above has a configuration in which the shield electrode layer128c1is provided only on the drain side. It is to be noted, however, that the shield electrode layer128c1can also be provided only on the source side. In this case, the shielding effect of the shield electrode layer128c1is small in comparison with the configuration in which the shield electrode layer128c1is provided on the drain side. In comparison with the structure of the typical comparison transistor in which the shield electrode layer is not provided at all, nevertheless, it is possible to reduce the effect of the positive electric charge on the channel edge e1and, thus, repress the shift of the threshold voltage Vth.

In addition, in the first modified version, the LDD layer126bis provided only on the drain side of the channel layer126a. However, the LDD layer126bcan be provided also on the source side. In the case of such a structure, the shield electrode layer128c1can be provided only on either the drain side or the source side.

In addition, as shown inFIG. 12B, the drain electrode128C is created by being extended to positions covering both edges of the gate electrode120B so that a portion of the drain electrode128C also functions as the shield electrode layer128c2.

Second Embodiment

Configuration

FIG. 13is a cross-sectional diagram showing a rough configuration of a transistor111D according to a second embodiment of the present disclosure. It is to be noted that, in the transistor111C described below, each configuration element identical with its counterpart employed in the first embodiment described above is denoted by the same reference numeral as the counterpart and the explanation of the identical configuration element is properly omitted. In addition, in the same way as the transistor111B according to the first embodiment, the transistor111D according to the second embodiment is included in the pixel circuit12aof the pixel section12employed in the radioactive-ray imaging apparatus explained in the description of the first embodiment along with the photodiode111A.

Much like the transistor111B according to the first embodiment described above, the transistor111D is a transistor having a dual-gate structure including the semiconductor layer126between the two gate electrodes120A and120B. In addition, the second gate insulation film129, the first gate insulation film130, the first interlayer insulation film131and the second interlayer insulation film132each include a silicon-oxide film. On top of that, a pair of source and drain electrodes128E connected electrically to the semiconductor layer126are provided on the first interlayer insulation film131.

In the case of this embodiment, however, a shield electrode layer128F is electrically separated from the source and drain electrodes128E and also provided on the first interlayer insulation film131. In the same way as the source and drain electrodes128A and128B employed in the first embodiment, the source and drain electrodes128E are capable of swapping the functions the source and drain electrodes with each other. In addition, the source and drain electrodes128E are made of the same material as the source and drain electrodes128A and128B.

In the same way as the shield electrode layers128a1and128b1employed in the first embodiment, the shield electrode layer128F functions as an electrical shield for repressing the effect of positive electric charge accumulated in a silicon-oxide film on the semiconductor layer126. In addition, the shield electrode layer128F is provided in such a way that at least a portion of the shield electrode layer128F faces the edge e2of the gate electrode120B. To put it concretely, the shield electrode layer128F is provided in such a way that the shield electrode layer128F faces the gate electrode120B and a portion of the shield electrode layer128F overlaps the edge e2of the gate electrode120B. It is to be noted that the positions of the edges e4of the shield electrode layer128F are not limited to specific positions in particular as described above. However, it is nice to provide a desirable structure in which the shield electrode layer128F is provided to cover the entire taper portions of the gate electrode120B in the same way as the first embodiment described above.

The shield electrode layer128F can be made of typically the same material as the source and drain electrodes128A and128B employed in the first embodiment. In addition, the material used for making the shield electrode layer128F can be the same as that for the source and drain electrodes128E or different from that for the source and drain electrodes128E. If the material used for making the shield electrode layer128F is the same as that for the source and drain electrodes128E, the shield electrode layer128F and the source and drain electrodes128E can be created in the same process at the same time.

Such a shield electrode layer128F can be electrically connected to typically the gate electrode120A and/or the gate electrode120B by making use of typically wiring layers not shown in the figure so that the electric potential appearing at the shield electrode layer128F can be sustained at the same level as the electric potential appearing at the gate electrode120A and/or the gate electrode120B. As an alternative, the shield electrode layer128F can be electrically disconnected from the gate electrode120A and the gate electrode120B so that the electric potential appearing at the shield electrode layer128F can be sustained at an arbitrary level set differently from the electric potentials appearing at the gate electrode120A and the gate electrode120B. As another alternative, the shield electrode layer128F can be sustained at the electric potential of the ground or can be put in a state of being floated.

Effects of the Second Embodiment

In the radioactive-ray imaging apparatus employing the transistors111D according to this embodiment as described above, electrical signals conveying information are obtained on the basis of radioactive rays which are typically X rays. However, radioactive rays directly incident to the transistors111D exist. In each of the transistors111D, the second gate insulation film129, the first gate insulation film130, the first interlayer insulation film131and the second interlayer insulation film132each has a silicon-oxide film. If a radioactive ray hits the silicon-oxide film containing such oxygen, positive electric charge is accumulated in the silicon-oxide film due to the reasons explained earlier and the electric charge undesirably shifts the threshold voltage Vth to the negative side.

In order to solve the problem described above, in this embodiment, the shield electrode layer128F is provided on the first interlayer insulation film131in such a way that a portion of the shield electrode layer128F faces or overlaps the edge e2of the gate electrode120B. Thus, as shown by a model inFIG. 14, in the first place, the shielding effect of the gate electrode120B represses the effect of the positive electric charge accumulated typically in the second interlayer insulation film132including a silicon-oxide film on the channel layer126a. In the second place, in the case of this embodiment, the shielding effect of the shield electrode layer128F represses the effect of the positive electric charge on the channel layer126aor, in particular, on the channel edge e1in comparison with the typical comparison structure shown inFIG. 7.

FIG. 15is a diagram showing the effect of the X-ray radiation quantity on the current-voltage characteristic of the transistor111D including the semiconductor layer126made of low-temperature polysilicon for a case in which an X ray is radiated to the transistor111D. The current-voltage characteristic of the transistor111D is a relation between the gate voltage Vg and the drain current Ids.

FIG. 16is a characteristic diagram showing a relation between the X-ray radiation quantity and the shift quantity (ΔVshift) of a reference voltage which is a voltage Vg with the drain current Ids of 1.0 e-11 A taken as a reference. On the other hand,FIG. 17is a characteristic diagram showing a relation between the X-ray radiation quantity and the S value (or the threshold value) in the current-voltage characteristic for each of the transistors111B and111D according to the first and second embodiments respectively.

It is to be noted that the curves shown inFIGS. 15,16and17are curves obtained for an X-ray tube voltage of 90 kV and X-ray radiation quantities of 0 Gy, 70 Gy, 110 Gy and 200 Gy. In addition, in the case ofFIGS. 16 and 17, every solid line represents measurement results for the transistor111B according to the first embodiment whereas each dashed-line represents measurement results for the transistor111D according to the second embodiment. As is obvious from the curves for the transistors111B and111D according to the first and second embodiments respectively, if an X ray is radiated to the transistor111D, as the radiation quantity of the X ray is increased from 0 Gy to 200 Gy through 70 Gy and 110 Gy, the shift ΔVth of the threshold voltage Vth of the transistor111D shows a gradually rising trend. However, the curves represent good characteristics.

In the second embodiment described above, in any of the silicon-oxide films included in the second gate insulation film129, the first gate insulation film130, the first interlayer insulation film131and the second interlayer insulation film132which are employed in the transistor111D, holes are generated by radiation of a radioactive ray so that positive electric charge is accumulated in the second gate insulation film129, the first gate insulation film130, the first interlayer insulation film131and the second interlayer insulation film132. However, the shield electrode layer128F is provided on the first interlayer insulation film131in such a way that portions of the shield electrode layers128F face the edges e2of the gate electrode120B. Thus, particularly in the vicinity of the channel edge e1of the semiconductor layer, for example, the effect of the positive electric charge accumulated in the second interlayer insulation film132is reduced so that the shift ΔVth of the threshold voltage Vth can be repressed. As a result, it is possible to obtain the same effects as the first embodiment.

Second Typical Modification

In the case of the configuration adopted by the second embodiment described above, the shield electrode layer128F is provided by electrically separating the shield electrode layer128F from the source and drain electrodes128E so that the shield electrode layer128F can be held at the gate or ground electric potential. In accordance with second typical modification, however, the shield electrode layer128F can also be held at a negative electric potential as well. In this case, as shown by a model inFIG. 18, positive electric charge is accumulated in the silicon-oxide films of the second gate insulation film129, the first gate insulation film130, the first interlayer insulation film131and the second interlayer insulation film132due to radiation of radioactive rays to the second gate insulation film129, the first gate insulation film130, the first interlayer insulation film131and the second interlayer insulation film132respectively. Since the shield electrode layer128F is held at a negative electric potential in the case of a second modified version according to the second typical modification, however, the positive electric charge accumulated in the silicon-oxide films of the second gate insulation film129, the first gate insulation film130, the first interlayer insulation film131and the second interlayer insulation film132is attracted to the shield electrode layer128F so that the effect of the positive electric charge on the channel layer126ais reduced. As a result, it is possible to obtain the same effects as the second embodiment.

As described above, in the second modified version of the second embodiment, the shield electrode layer128F is provided between the first interlayer insulation film131and the second interlayer insulation film132. It is to be noted, however, that the location of the shield electrode layer128F is by no means limited to a position between the first interlayer insulation film131and the second interlayer insulation film132. For example, the shield electrode layer128F can also be inserted into a position between the silicon-oxide film131aand the silicon-nitride film131bwhich are included in the first interlayer insulation film131.

The following description explains third to fifth typical modifications which are modifications of the first and second embodiments. It is to be noted that, in the description of the third to fifth typical modifications described below, each configuration element identical with its counterpart employed in the first and/or embodiments described above is denoted by the same reference numeral as the counterpart and the explanation of the identical configuration element is properly omitted.

Third Modification

FIG. 19is a cross-sectional diagram showing a rough configuration of a third modified version which is a transistor111E according to third typical modification. In the same way as the transistor111B according to the first embodiment, the transistor111E is included in the pixel circuit12aof the pixel section12employed in the radioactive-ray imaging apparatus along with the photodiode111A. In addition, the transistor111E also has a dual-gate structure having the semiconductor layer126between two gate electrodes. On top of that, each of the second gate insulation film129, the first gate insulation film130, the first interlayer insulation film131and the second interlayer insulation film132includes a silicon-oxide film. Furthermore, a pair of source and drain electrodes128A and128B electrically connected to the semiconductor layer126are provided on the first interlayer insulation film131.

In this third modified version, however, two laminated structures each having the dual-gate structure described above are provided in parallel to each other in one transistor111E. To put it concretely, the transistor111E has two gate electrodes in selective areas on the substrate11. The two electrodes are gate electrodes120A1and120A2. The second gate insulation film129is provided to cover the gate electrodes120A1and120A2. On the second gate insulation film129, the semiconductor layer126is provided. The semiconductor layer126includes the channel layer126a, the LDD layer126band the N+layer126cfor every pair of gate electrodes120A1and120A2. The first gate insulation film130is created to cover the semiconductor layer126. In selective areas on the first gate insulation film130, gate electrodes120B1and120B2are provided. The selective areas on the first gate insulation film130are areas facing the gate electrodes120A1and120A2respectively. The first interlayer insulation film131is created to cover the gate electrodes120B1and120B2. Contact holes H1are each provided in portions of the first interlayer insulation film131and the first gate insulation film130. In the same way as the transistor111B according to the first embodiment, a pair of source and drain electrodes128A and128B are provided on the first interlayer insulation film131to fill up the contact holes H1in a state of being electrically connected to the semiconductor layer126. The second interlayer insulation film132is provided on the source and drain electrodes128A and128B. It is to be noted that, by providing the gate electrodes120A1and120A2as well as the gate electrodes120B1and120B2within one transistor in parallel to each other as is the case with this modified version, it is possible to decrease the magnitude of an off leak current which is a leak current at Vg=0 V.

It is to be noted that, in this embodiment, the gate electrodes120B1and120B2are concrete examples of the first gate electrode according to the embodiment of the present disclosure whereas the gate electrodes120A1and120A2are concrete examples of the second gate electrode according to the embodiment of the present disclosure.

In the same way as the transistor111B, in the transistor111E having such two dual-gate structures in accordance with this typical modification, portions of the source and drain electrodes128A and128B function also as the shield electrode layers128a1and128b1. In this configuration, typically, the shield electrode layer128a1is provided in such a way that at least a portion of the shield electrode layer128a1faces the edge e2of the gate electrode120B1whereas the shield electrode layer128b1is provided in such a way that at least a portion of the shield electrode layer128b1faces the edge e2of the gate electrode120B2. Even though the positions of the edges e3of the shield electrode layers128a1and128b1are not limited to specific positions in particular as described above, it is nice to provide a desirable structure in which the shield electrode layers128a1and128b1are provided to cover the taper portions of the gate electrodes120B1and120B2.

As described above, also in the transistor111E having such two dual-gate structures provided in parallel to each other, the shielding effect of the shield electrode layers128a1and128b1allows the same effects as the first embodiment to be obtained.

In the third modified version described above, the shield electrode layers128a1and128b1are provided on both sides of the source and drain electrodes128A and128B. It is to be noted, however, that the shield electrode layer can also be provided only on either the source electrode or the drain electrode as explained before in the description of the first modified version. In addition,FIG. 19shows a case in which the shield electrode layers128a1and128b1are provided to face only the edges e2on one sides of the gate electrodes120B1and120B2. However, the following configuration can also be provided. For example, as shown inFIG. 20, the shield electrode layers128a1and128b1can also be provided by extending the shield electrode layers128a1and128b1so that the shield electrode layers128a1and128b1face the edges e2on both sides of the gate electrodes120B1and120B2.

Fourth Typical Modification

FIG. 21is a cross-sectional diagram showing a rough configuration of a transistor111F provided in accordance with fourth typical modification to serve as a fourth modified version. In the same way as the transistor111B according to the first embodiment, the transistor111F is included in the pixel circuit12aof the pixel section12employed in the radioactive-ray imaging apparatus along with the photodiode111A. In addition, the transistor111F also has a dual-gate structure having the semiconductor layer126between two gate electrodes. On top of that, each of the second gate insulation film129, the first gate insulation film130, the first interlayer insulation film131and the second interlayer insulation film132includes a silicon-oxide film. Furthermore, a pair of source and drain electrodes128A and128B electrically connected to the semiconductor layer126are provided on the first interlayer insulation film131.

Also in the transistor111F having two dual-gate structures in accordance with the fourth typical modification in the same way as the third modified version, portions of the source and drain electrodes128A and128B function also as the shield electrode layers128a1and128b1.

In this fourth modified version, however, a shield electrode layer128G is further provided on the first interlayer insulation film131. For example, the shield electrode layer128G is provided in an area between the source and drain electrodes128A and128B on the first interlayer insulation film131, being separated electrically from the source and drain electrodes128A and128B.

In the same way as the shield electrode layers128a1and128b1employed in the first embodiment, the shield electrode layer128G functions as an electrical shield for repressing the effect of positive electric charge accumulated in a silicon-oxide film on the semiconductor layer126. In addition, the shield electrode layer128G is provided in such a way that at least a portion of the shield electrode layer128F faces the edges e2of the gate electrodes120B1and120B2. It is to be noted that the positions of the edges e5of the shield electrode layer128G are not limited to specific positions in particular as described above. However, it is nice to provide a desirable structure in which the shield electrode layer128G is provided to cover the entire taper portions of the gate electrodes120B1and120B2.

The shield electrode layer128G can be made of typically the same material as the source and drain electrodes128A and128B employed in the first embodiment. In addition, the material used for making the shield electrode layer128G can be the same as that for the source and drain electrodes128A and128B or different from that for the source and drain electrodes128A and128B.

It is to be noted that, for example, the shield electrode layer128G can be electrically connected by making use of typically a wiring layer not shown in the figure to at least one of typically the gate electrodes120A1and120A2and the gate electrodes120B1and120B2in order to sustain the shield electrode layer128G at the same electric potential as the gate electrodes120A1and120A2and the gate electrodes120B1and120B2. As an alternative, the shield electrode layer128G can be electrically disconnected from the gate electrodes120A1and120A2as well as from the gate electrodes120B1and120B2so that the electric potential appearing at the shield electrode layer128G can be sustained at an arbitrary level set differently from the electric potentials appearing at the gate electrodes120A1and120A2as well as the gate electrodes120B1and120B2. As another alternative, the shield electrode layer128G can be sustained at the electric potential of the ground or can be put in a state of being floated.

As described above, also in the transistor111F having such two dual-gate structures provided in parallel to each other, the shielding effect of the shield electrode layers128a1and128b1allows the same effects as the first embodiment to be obtained. In addition, in this transistor111F, the shield electrode layer128G is further provided between the source and drain electrodes128A and128B so that it is possible to improve the shielding effect to a level higher than the third modified version and, thus, further reduce the effect of holes on the semiconductor layer126.

Fifth Typical Modification

FIG. 22is a cross-sectional diagram showing a rough configuration of a transistor111G provided in accordance with fifth typical modification to serve as a fifth modified version. In the same way as the transistor111B according to the first embodiment, the transistor111G is included in the pixel circuit12aof the pixel section12employed in the radioactive-ray imaging apparatus along with the photodiode111A. In addition, the transistor111G also has a dual-gate structure having the semiconductor layer126between two gate electrodes. On top of that, each of the second gate insulation film129, the first gate insulation film130, the first interlayer insulation film131and the second interlayer insulation film132includes a silicon-oxide film. Furthermore, a pair of source and drain electrodes128E electrically connected to the semiconductor layer126are provided on the first interlayer insulation film131.

Much like the third and fourth modified versions, the fifth modified version also has two dual-gate structures.

In the structure according to this typical modification, much like the second embodiment, shield electrode layers128F electrically disconnected from the source and drain electrodes128E are provided on the first interlayer insulation film131. In this structure, however, the shield electrode layers128F are provided to face their respective gate electrodes120B1and120B2. It is to be noted that the positions of the edges e4of the two shield electrode layers128F are not limited to specific positions in particular as described above. However, it is nice to provide a desirable structure in which the shield electrode layers128F are provided to cover the entire taper portions of the gate electrodes120B1and120B2.

It is to be noted that, for example, the two shield electrode layers128F can be electrically connected by making use of typically a wiring layer not shown in the figure to at least one of typically the gate electrodes120A1and120A2and the gate electrodes120B1and120B2in order to sustain the shield electrode layers128F at the same electric potential as the gate electrodes120A1and120A2and the gate electrodes120B1and120B2. As an alternative, the two shield electrode layers128F can also be electrically disconnected from the gate electrodes120A1and120A2and the gate electrodes120B1and120B2so that the electric potential appearing at the two shield electrode layers128F can be sustained at an arbitrary level set differently from the electric potentials appearing at the gate electrodes120A1and120A2and the gate electrodes120B1and120B2. As another alternative, the two shield electrode layers128F can also be sustained at the electric potential of the ground or can be put in a state of being floated.

As described above, also in the transistor111G having such two dual-gate structures provided in parallel to each other, the shielding effect of the two shield electrode layers128F allows the same effects as the second embodiment to be obtained.

Each of the third to fifth modified versions described above has a configuration in which the shield electrode layers are provided at locations horizontally symmetrical with respect to the two gate electrodes120B1and120B2laid out in parallel to each other. It is to be noted, however, that the locations of the shield electrode layers do not have to be horizontally symmetrical. For example, in a specific half of the transistor or for a specific one of the gate electrodes120B1and120B2, a shield electrode layer is created by making use of a portion of the source and drain electrodes. In the other half of the transistor or for the other one of the gate electrodes120B1and120B2, on the other hand, a shield electrode layer electrically disconnected from the source and drain electrodes is created separately. In addition, the widths (or the creation areas) of the shield electrode layers on the left and right sides may be different from each other. On top of that, the number of gate electrodes laid out in parallel to each other on the substrate or the number of second gate electrodes laid out in parallel to each other on the second gate insulation film is by no means limited to 1 or 2 as described above, but can be 3 or an integer greater than 3.

Sixth Typical Modification

FIG. 23is a diagram showing a cross-sectional structure of a transistor provided in accordance with sixth modification to serve as a transistor111J according to a sixth modified version. In the same way as the transistor111B according to the first embodiment, the transistor111J is employed in the pixel circuit12aof the pixel section12, which is included in the radioactive-ray imaging apparatus, along with the photodiode111A. In addition, each of the second gate insulation film129, the first gate insulation film130, the first interlayer insulation film131and the second interlayer insulation film132includes a silicon-oxide film. On top of that, a pair of source and drain electrodes128A and128B electrically connected to the semiconductor layer126are provided on the first interlayer insulation film131.

However, the transistor111J according to the sixth modified version has the so-called top gate structure. The transistor111B according to this embodiment has a structure including only the gate electrode120B which is one of the gate electrodes. In the same way as the transistor111B, in the transistor111J having such a gate electrode120B, portions of the source and drain electrodes128A and128B also function as the shield electrode layers128a1and128b1. Also in the case of the transistor111J having such a top gate structure, the shield effects of the shield electrode layers128a1and128b1can be obtained.

It is to be noted that the gate electrode120B in this modified version is a concrete example of the first gate electrode provided by the embodiment of the present disclosure.

In addition, in the same way as the first modified version, as shown inFIG. 24A, a transistor having the top gate structure can also be configured into a structure in which only a portion of the drain electrode128cis provided to face one edge e2of the gate electrode120B so that the portion also functions as the shield electrode layer128c1. On top of that, as shown inFIG. 24B, a transistor having the top gate structure can also be configured into a structure in which the drain electrode128cis created by being further extended to positions covering both edges of the gate electrode120B so that a portion of the drain electrode128calso functions as the shield electrode layer128c2. As an alternative shown in none of the figures, it is also possible to provide a structure in which, instead of a portion of the drain electrode128c, a portion of the source electrode128D also functions as a shield electrode layer.

In addition, in the same way as the second embodiment, as shown inFIG. 25, it is also possible to provide a structure in which a shield electrode layer128F electrically separated from the source/drain electrode128E is provided on the first interlayer isolation film131.

Seventh Typical Modification

FIG. 26is a diagram showing a cross-sectional structure of a transistor provided in accordance with seventh modification to serve as a transistor111K according to a seventh modified version. In the same way as the transistor111B according to the first embodiment, the transistor111K is employed in the pixel circuit12aof the pixel section12, which is included in the radioactive-ray imaging apparatus, along with the photodiode111A. In addition, each of the second gate insulation film129, the first gate insulation film130, the first interlayer insulation film131and the second interlayer insulation film132includes a silicon-oxide film. On top of that, a pair of source and drain electrodes128A and128B electrically connected to the semiconductor layer126are provided on the first interlayer insulation film131.

However, the transistor111K according to the seventh modified version has the so-called bottom gate structure. The transistor111B according to this embodiment has a structure including only the gate electrode120A which is one of the gate electrodes. In the same way as the transistor111B, in the transistor111K having such a gate electrode120A, portions of the source and drain electrodes128A and128B also function as the shield electrode layers128a1and128b1. Also in the case of the transistor111K having such a bottom gate structure, the shield effects of the shield electrode layers128a1and128b1can be obtained.

It is to be noted that the gate electrode120A in this modified version is a concrete example of the first gate electrode provided by the embodiment of the present disclosure.

In addition, in the same way as the first modified version, as shown inFIG. 27A, a transistor having the bottom gate structure can also be configured into a structure in which only a portion of the drain electrode128cis provided to face one edge e1of the gate electrode120A so that the portion also functions as the shield electrode layer128c1. On top of that, as shown inFIG. 27B, the transistor having the bottom gate structure can also be configured into a structure in which the drain electrode128cis created by being further extended to positions covering both edges of the gate electrode120A so that a portion of the drain electrode128calso functions as the shield electrode layer128c2.

In addition, in the same way as the second embodiment, as shown inFIG. 28, it is also possible to provide a structure in which a shield electrode layer128F electrically separated from the source/drain electrode128E is provided on the first interlayer isolation film131.

The following description explains eighth and ninth typical modifications which are each a modification implementing a modified version of the radioactive-ray imaging apparatus according to the embodiments of the present disclosure. It is to be noted that, in the description of the eighth and ninth typical modifications described below, each configuration element identical with its counterpart employed in the first and/or second embodiments described above is denoted by the same reference numeral as the counterpart and the explanation of the identical configuration element is properly omitted.

Eighth Typical Modification

In the first embodiment, the pixel circuit provided in every pixel P is the pixel circuit12awhich adopts the active driving method. However, the pixel circuit provided in every pixel P can also be a pixel circuit12blike one shown inFIG. 29to serve as a pixel circuit which adopts the passive driving method. In a sixth modified version according to eighth typical modification, the unit pixel P is configured to include the photodiode111A, a capacitor138and a transistor Tr which corresponds to the read transistor Tr3. The transistor Tr is connected between the accumulation node N and the vertical signal line18. When the transistor Tr is turned on in response to the row scanning signal Vread, signal electric charge accumulated in the accumulation node N in accordance with the quantity of light incident to the photodiode111A is output to the vertical signal line18. It is to be noted that the transistor Tr (or Tr3) is any one of the transistors111A to111D which are provided by the embodiments described above and the modified versions also explained so far. As described above, the method for driving the pixel P is not limited to the active driving method adopted by the embodiments described above. That is to say, the method for driving the pixel P can also be the passive driving method as is the case with this sixth modified version.

Ninth Typical Modification

In the embodiments described above, an indirect-conversion-type FPD having the scintillator layer114provided on the pixel section12is taken as a typical radioactive-ray imaging apparatus. However, the radioactive-ray imaging apparatus according to the embodiments of the present disclosure can also be applied to an FPD of the direct conversion type. The FPD of the direct conversion type does not employ the scintillator layer114for carrying out a wavelength conversion process of converting a radioactive ray into a visible ray and the protection layer115. Instead, the pixel section12is provided with a function for directly converting a radioactive ray into an electrical signal.

FIG. 30is an explanatory model diagram referred to in the following description of a radioactive-ray imaging apparatus provided in accordance with seventh modification to serve as a seventh modified version which is a radioactive-ray imaging apparatus having a direct conversion type. The seventh modified version includes a typical pixel section12making use of a pixel circuit12baccording to the sixth modified version adopting the passive driving method. In this seventh modified version, the pixel section12is configured to include a photoelectrical conversion device111H, a capacitor141and a transistor Tr which corresponds to the read transistor Tr3. The photoelectrical conversion device111H is a section for converting a radioactive ray into an electrical signal. The photoelectrical conversion device111H has a direct conversion layer140provided typically between an upper electrode139A and a pixel electrode139B. The direct conversion layer140is made of typically an amorphous selenium semiconductor (an a-Se semiconductor) or a cadmium tellurium semiconductor (a CdTe semiconductor). It is to be noted that the transistor Tr (or Tr3) is any one of the transistors111B to111D which are provided by the embodiments described above and the modified versions also explained so far.

As described above, the transistors provided by the present disclosure can be applied to not only an FPD of the indirect conversion type, but also an FPD of the direct conversion type. In the case of the direct conversion type particularly, an incident radioactive ray directly hits the pixel section12. Thus, the transistor is exposed more easily than the transistors according to the embodiments described above and the modified versions also explained so far. As a result, the effect to repress the shift of the threshold voltage Vth is also effective for the seventh modified version serving as a radioactive-ray imaging apparatus of the direct conversion type.

Typical Application

The transistors and the radioactive-ray imaging apparatus which are provided by the first and second embodiments as well as the first to fourth modified versions can be applied to a radioactive-ray imaging display system2like one shown inFIG. 31. As shown in the figure, the radioactive-ray imaging display system2includes the radioactive-ray imaging apparatus1, an image processing section25and a display apparatus28. In the radioactive-ray imaging display system2with such a configuration, on the basis of a radioactive ray radiated by a radioactive-ray source26to an imaging object27, the radioactive-ray imaging apparatus1acquires image data Dout of the imaging object27and supplies the image data Dout to the image processing section25. The image processing section25carries out predetermined image processing on the image data Dout received from the radioactive-ray imaging apparatus1and outputs image data (or display data) D1obtained as a result of the image processing to the display apparatus28. The display apparatus28has a monitor screen28afor displaying an image based on the display data D1received from the image processing section25.

As described above, the radioactive-ray imaging apparatus1employed in the radioactive-ray imaging display system2is capable of acquiring an image of the imaging object27as an electrical signal. Thus, by supplying the acquired electrical signal to the display apparatus28, the image of the imaging object27can be displayed. That is to say, the image of the imaging object27can be observed without making use of a radioactive-ray photograph film. In addition, it is also possible to cope with moving-picture imaging operations and moving-picture displaying operations.

The embodiments and the modified versions have been explained so far. However, the scope of the present disclosure is by no means limited to the embodiments and the modified versions. That is to say, a variety of changes can be further made to the embodiments and the modified versions. For example, the wavelength conversion material used for making the scintillator layer114employed in the embodiments and the modified versions is by no means limited those explained in the above descriptions. In other words, a variety of other fluorescent materials can also be used for making the scintillator layer114.

In addition, each of the embodiments and the modified versions has a configuration in which the shield electrode layer as well as the source and drain electrodes are provided on the same layer. However, the shield electrode layer as well as the source and drain electrodes may be provided not necessarily on the same layer. That is to say, the shield electrode layer as well as the source and drain electrodes may also be provided on different layers.

On top of that, in the embodiments and the modified versions, each of the second gate insulation film129, the first gate insulation film130, the first interlayer insulation film131and the second interlayer insulation film132includes a silicon-oxide film. If at least one of the second gate insulation film129, the first gate insulation film130, the first interlayer insulation film131and the second interlayer insulation film132include a silicon-oxide film, however, it is possible to obtain the same effects as the disclosed present disclosure.

In addition, each of the embodiments and the modified versions has a configuration in which the second interlayer insulation film132made of silicon oxide is provided on the source and drain electrodes. However, the second interlayer insulation film132is not necessarily required. As an alternative, the second interlayer insulation film132can also be made of a material not including oxygen. A typical example of the material not including oxygen is silicon nitride. As explained earlier in the description of the first embodiment, from the viewpoint of the manufacturability of the photodiode111A, however, it is desirable to provide a silicon-oxide film to serve as the second interlayer insulation film132. In addition, the effect of the provided shield electrode layer is particularly effective for a silicon-oxide film provided above the shield electrode layer. A typical example of the silicon-oxide film provided above the shield electrode layer is the second interlayer insulation film132.

On top of that, in each of the embodiments and the modified versions, a gate electrode having a taper portion on each of the side surfaces thereof is taken as a typical example of the second gate electrode according to the embodiments of the present disclosure. However, the second gate electrode is not necessarily required to have a taper portion on each of the side surfaces thereof. As shown inFIG. 32for example, a second gate electrode130B3can also have side surfaces each forming a shape perpendicular to the surface of the substrate. In this case, the entire side surfaces of the second gate electrode130B3are each an edge of the second gate electrode130B3.

In addition, in each of the embodiments and the modified versions, a film made of silicon oxide (SiO2) is taken as a typical example of a silicon-oxide film according to the embodiments of the present disclosure. However, the silicon-oxide film can be any other film as far as the other film is a silicon compound film containing oxygen. For example, the silicon-oxide film can also be a film made of silicon oxynitride (SiON).

On top of that, in each of the embodiments and the modified versions, an N-type transistor made of N-MOS is taken as a typical example of the transistor according to the embodiments of the present disclosure. However, the transistor according to the embodiments of the present disclosure is by no means limited to the N-type transistor. For example, the transistor according to the embodiments of the present disclosure can also be a P-type transistor made of P-MOS.

In addition, in each of the embodiments and the modified versions, the photodiode111A has a laminated structure built by creating a p-type semiconductor layer, an i-type semiconductor layer and an n-type semiconductor layer above the substrate in the same order as the order in which the p-type semiconductor layer, the i-type semiconductor layer and the n-type semiconductor layer are enumerated in this sentence. However, the photodiode111A can also have a laminated structure built by creating an n-type semiconductor layer, an i-type semiconductor layer and a p-type semiconductor layer above the substrate in the same order as the order in which the n-type semiconductor layer, the i-type semiconductor layer and the p-type semiconductor layer are enumerated in this sentence.

On top of that, it is not necessary to employ all the configuration elements explained in the descriptions of each embodiment and each modified version which are provided by the present disclosure. Conversely, another layer can be added to each of the embodiments and the modified versions. For example, a protection film made of SiN or the like can also be created on the upper electrode125.

It is to be noted that the present disclosure can be applied to transistors having configurations described in implementations 1 to 11 given below, a radioactive-ray imaging apparatus employing any of the transistors and a radioactive-ray imaging display system employing the radioactive-ray imaging apparatus.1: A transistor including:

a semiconductor layer;

a first gate insulation film and a first interlayer insulation film which are provided on a specific surface side of the semiconductor layer;

a first gate electrode provided at a location between the first gate insulation film and the first interlayer insulation film;

an insulation film provided on the other surface side of the semiconductor layer;

source and drain electrodes provided by being electrically connected to the semiconductor layer; and

a shield electrode layer provided in such a way that at least portions of the shield electrode layer face edges of the first gate electrode,

wherein at least one of the first gate insulation film, the first interlayer insulation film and the insulation film include a silicon-oxide film.2: The transistor according to implementation 1 further including a second gate electrode facing the first gate electrode through the semiconductor layer, wherein

the second gate electrode, the insulation film, the semiconductor layer, the first gate insulation film, the first gate electrode and the first interlayer insulation film are sequentially created on a substrate in the same order as an order in which the second gate electrode, the insulation film, the semiconductor layer, the first gate insulation film, the first gate electrode and the first interlayer insulation film are enumerated in this sentence.3: The transistor according to implementation 1 or 2 wherein the shield electrode layer is provided on the first interlayer insulation film.4: The transistor according to implementation 3 wherein:

one or both of the source electrode and the drain electrode are provided on the first interlayer insulation film by being extended to areas facing the edges of the first gate electrode; and

portions included in the source electrode and the drain electrode to serve as portions facing the edges of the first gate electrode also function as the shield electrode layer.5: The transistor according to implementation 3 wherein:

only the drain electrode is selected from the source electrode and the drain electrode to serve as an electrode to be provided on the first interlayer insulation film by being extended to an area facing the edge of the first gate electrode; and

a portion included in the drain electrode to serve as a portion facing the edge of the first gate electrode also functions as the shield electrode layer.6: The transistor according to any of implementations 3 to 5, the transistor further having a second interlayer insulation film provided on the source electrode and the drain electrode,

wherein the second interlayer insulation film includes a silicon-oxide film.7: The transistor according to any of implementations 3 to 5 wherein the source electrode, the drain electrode and the shield electrode layer are provided on the first interlayer insulation film by being electrically disconnected from each other.8: The transistor according to implementation 7, the transistor further including a second interlayer insulation film provided on the source electrode, the drain electrode and the shield electrode layer,

wherein the second interlayer insulation film includes a silicon-oxide film.9: The transistor according to implementation 7 or 8 wherein the shield electrode layer is held at a negative electric potential.10: The transistor according to any of implementations 2 to 9 wherein a plurality of sets each consisting of the first and second gate electrodes are provided for a pair of the source and drain electrodes.11: The transistor according to any of implementations 1 to 10 wherein the first gate electrode, the first gate insulation film, the semiconductor layer, the insulation film and the first interlayer insulation film are sequentially created on a substrate in the same order as an order in which the first gate electrode, the first gate insulation film, the semiconductor layer, the insulation film and the first interlayer insulation film are enumerated in this sentence.12: The transistor according to any of implementations 1 to 11 wherein the insulation film, the semiconductor layer, the first gate insulation film, the first gate electrode and the first interlayer insulation film are sequentially created on a substrate in the same order as an order in which the insulation film, the semiconductor layer, the first gate insulation film, the first gate electrode and the first interlayer insulation film are enumerated in this sentence.13: The transistor according to any of implementations 1 to 12 wherein the semiconductor layer is made of polysilicon.14: The transistor according to any of implementations 1 to 13 wherein the silicon-oxide film is made of silicon oxide (SiO2).15: A radioactive-ray imaging apparatus including a pixel section having a transistor and a photoelectric conversion device, the transistor including:

a semiconductor layer;

a first gate insulation film and a first interlayer insulation film which are provided on a specific surface side of the semiconductor layer;

a first gate electrode provided at a location between the first gate insulation film and the first interlayer insulation film;

an insulation film provided on the other surface side of the semiconductor layer;

source and drain electrodes provided by being electrically connected to the semiconductor layer; and

a shield electrode layer provided in such a way that at least portions of the shield electrode layer face edges of the first gate electrode, wherein

at least one of the first gate insulation film, the first interlayer insulation film and the insulation film include a silicon-oxide film.16: The radioactive-ray imaging apparatus according to implementation 15

wherein a wavelength conversion layer is provided on the pixel section to serve as a layer for changing the wavelength of an incident radioactive ray to a wavelength in a sensitive region of the photoelectric conversion device.17: The radioactive-ray imaging apparatus according to implementation 15

wherein the photoelectric conversion device has a function for absorbing a radioactive ray and converting the radioactive ray into an electrical signal.18: The radioactive-ray imaging display system employing a radioactive-ray imaging apparatus for acquiring an image based on radioactive rays and a display apparatus for displaying the image acquired by the radioactive-ray imaging apparatus wherein

the radioactive-ray imaging apparatus includes a pixel section having a transistor and a photoelectric conversion device, the transistor including:

a semiconductor layer;

a first gate insulation film and a first interlayer insulation film which are provided on a specific surface side of the semiconductor layer;

a first gate electrode provided at a location between the first gate insulation film and the first interlayer insulation film;

an insulation film provided on the other surface side of the semiconductor layer;

source and drain electrodes provided by being electrically connected to the semiconductor layer; and

a shield electrode layer provided in such a way that at least portions of the shield electrode layer face edges of the first gate electrode, and

at least one of the first gate insulation film, the first interlayer insulation film and the insulation film include a silicon-oxide film.

It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and alterations may occur depending on design requirements and other factors in so far as they are within the scope of the appended claims or the equivalents thereof.