Fabricating surface mountable semiconductor components with leadframe strips

The invention relates to a method for producing an electrical leadframe (10), in particular for a light-emitting diode component, having at least one first electrical connection conductor (2) and at least one second electrical connection conductor (3). The method includes a) production of a layer composite comprising an electrically insulating carrier layer (101) and an electrically conductive connection conductor layer (102), b) patterning of the carrier layer (101) in such a way that at least one contact-making window (7) toward the connection conductor layer (102) is produced in said carrier layer, and c) patterning of the connection conductor layer (102), in such a way that the first electrical connection conductor (2) and the second electrical connection conductor (3) are produced, at least one of which can be electrically connected through the contact-making window (7). The invention also relates to a leadframe strip having a connection conductor layer and a connection carrier layer, on which an array with a multiplicity of component regions is formed, the connection conductor layer being at least partly removed along separating lines between two adjacent component regions.

TECHNICAL FIELD

The invention relates to a method for producing an electrical leadframe, such as a leadframe for a surfacemountable semiconductor component having a semiconductor chip, at least two external electrical connections, which are electrically conductively connected to at least two electrical contacts of the semiconductor chip, and a chip encapsulation. The invention also relates to a leadframe strip and a method for producing a surface-mountable semiconductor component.

BACKGROUND

In order to expand the areas of use and in order to reduce the production costs, attempts are made to produce semiconductor components in ever smaller structural sizes. By way of example, the backlighting of the keys of mobile telephones requires very small light-emitting diodes.

Light-emitting diode housings with an installation area dimensioned as 0402 (corresponding to 0.5 mm×1.0 mm) and a device height of 400 μm–600 μm have become available in the meantime. Such a housing is described in the data sheet from FAIRCHILD SEMICONDUCTOR® concerning the QTLP690C-x design. The corresponding device concept is described in the document U.S. Pat. No. 4,843,280.

A further reduction of the device height is desirable, but is extremely difficult with the conventionally available housing concepts.

SUMMARY

The present invention is based on the object of providing a concept for a surfacemountable semi-conductor component, in particular for surfacemountable miniature light-emitting diode and/or photodiode components, which permits the structural size, in particular the structural height, to be reduced more extensively.

In one aspect, the invention is directed to a method for producing an electrical leadframe (10) for a light-emitting diode component, the electrical leadframe having at least one first electrical connection conductor (2) and at least one second electrical connection conductor (3). The method includes producing a layer composite comprising an electrically insulating carrier layer (101) and an electrically conductive connection conductor layer (102), patterning of the carrier layer (101) in such a way that a contact-making window (7) to the connection conductor layer (102) is produced in said carrier layer, and c) patterning of the connection conductor layer (102) in such a way that the first electrical connection conductor (2) and the second electrical connection conductor (3) are produced. At least one of first and second electrical connection conductors can be electrically connected through the contact-making window (7).

In another aspect, the invention is directed to a method for producing a surfacemountable semiconductor component having at least one semiconductor chip (1), at least two external electrical connection conductors (2,3), which are connected to at least two electrical contacts (4,5) of the semiconductor chip (1), and having a chip housing (11) having a connection carrier (9) and a chip encapsulation (6). The method includes applying an electrically insulating carrier layer (101) to an electrically conductive connection conductor layer (102), patterning at least one chip window (7) and at least one wire connection window (8) in the carrier layer (101), patterning the external electrical connection conductors (2,3) into the connection conductor layer (102), mounting the semiconductor chip (1) into the chip window (7), electrically connecting at least one electrical contact (5) of the semiconductor chip (1) to a connection conductor (3) by means of a bonding wire (50) through the wire connection window (8), placing the composite comprising patterned connection conductor layer (102), patterned carrier layer (101), semiconductor chip (1) and bonding wire (50) into an injection mold, and encapsulating the semiconductor chip (1) including bonding wire (50) with an encapsulation material (6) by injection molding, which material is subsequently at least partly cured or incipiently cured.

In another aspect, the invention is directed to a method for producing a surfacemountable semiconductor component having at least one semiconductor chip (1), at least two external electrical connection conductors (2,3), which are connected to at least two electrical contacts (4,5) of the semiconductor chip (1), and having a chip housing (11) having a connection carrier (9) and a chip encapsulation (6). The method includes applying an electrically insulating carrier layer (101) to an electrically conductive connection conductor layer (102), patterning at least one chip window (7) in the carrier layer (101), patterning the external electrical connection conductors (2,3) into the connection conductor layer (102) with the two connection conductors (2,3) partly overlapping the chip window (7), mounting the semiconductor chip onto the external electrical connection conductors (2,3) in the chip window (7) in such a way that a first contact (4) and a second contact (5) of the semiconductor chip (1) bear on the first (2) and, respectively, on the second of the two connection conductors (3) and are electrically connected thereto, placing the composite comprising patterned connection conductor layer (102), patterned carrier layer (101) and semiconductor chip (1) into an injection mold (500), and encapsulating the semiconductor chip (1) with an encapsulation material (6) by injection molding, which material is subsequently at least partly cured or incipiently cured.

In another aspect, the invention is directed to a leadframe strip (200) having a connection conductor layer (102) and a carrier layer (101), on which an array (201) with a multiplicity of component regions (202) is formed, the connection conductor layer (101) being at least partly removed along separating lines (110) between adjacent component regions (202).

In the case of the method, firstly a laminate having an electrically insulating carrier layer and an electrically conductive connection conductor layer is produced. This laminate may consist solely of these two layers. They may be connected to one another by means of an adhesive layer, for example, and may, moreover, be completely unpatterned. In a subsequent step, in each component section of the laminate, at least one contact-making window toward the connection conductor layer may be produced in the carrier layer and at least one first electrical connection track and at least one second electrical connection track may be formed in the connection conductor layer. At least one of the tracks may be electrically connected through the contact-making window.

This electrical leadframe may be suitable for light-emitting diode components having an extremely small structural height of the component housing in relation to the height of the light-emitting diode chip. This leadframe may enable effective heat dissipation from the light-emitting diode chip if the latter is mounted directly onto a connection track in a contact-making window of the carrier layer by means of a thermally conductive joining agent, such as conductive adhesive or metallic solder.

The patterning of the carrier layer may take place before the patterning of the connection conductor layer. However, this sequence can also be reversed.

The carrier layer may be a plastic layer that can be patterned by means of masking and etching techniques. In particular the carrier layer may be a plastic film, such as a polyimide film. The connection conductor layer is an electrically conductive film that can be patterned by means of masking and etching techniques. In particular the conductor layer may be a metal film. The thicknesses of the carrier layer and of the connection conductor layer may be less than 80 μm, and in particular may be between from and including 30 μm and up to and including 60 μm.

A first contact-making window, for example a chip mounting window, toward the first connection track, and a second contact-making window, for example a wire connection window, toward the second connection track, are formed in the carrier layer.

In one embodiment of the method, the carrier layer initially preferably comprises a soluble plastic layer, at least in the regions to be patterned. This carrier layer is made insoluble, such as by incipient curing or curing, except for the areas of the contact-making windows and, if appropriate, other regions that are subsequently to be removed again. This means that in these regions it is then resistant to the solvent for the plastic layer. The contact-making windows and, if appropriate, other regions to be uncovered are subsequently etched free.

For the patterning of the plastic layer, firstly a mask layer, in particular a photoresist layer, can be applied thereto. The photoresist layer can be patterned or applied in patterned fashion in such a way that the regions of the contact-making windows and other regions that are subsequently to be removed are covered by the mask layer. The plastic layer can be subsequently cured in the uncovered regions which are intended to remain on the connection conductor layer, before the photoresist layer and the underlying plastic layer are then removed from the connection conductor layer at least in the regions of the contact-making windows. The uncured plastic layer can be removed from the connection conductor layer by being dissolved.

In another embodiment of the method, for the patterning of the plastic layer, firstly a photomask is positioned above or on said plastic layer, which photomask shades the regions of the contactmaking windows. The plastic layer is then incipiently cured or cured in unshaded regions which are intended to remain on the connection conductor layer. For this purpose, the plastic layer can preferably be cured by means of UV radiation. Material containing polyimide monomer may be suitable for this purpose. As an alternative, it is possible to use a plastic layer that can be cured by means of thermal radiation. The photomask layer is subsequently lifted off and the plastic layer is removed from the connection conductor layer in the regions of the contact-making windows. This can be done once again by means of wet-chemical dissolving. The use of a plasma incineration method is conceivable as an alternative.

The connection conductor layer likewise can be patterned by means of a mask and a wet-chemical etching method. Such patterning methods for metal layers, for example, are known from printed circuit board technology and are suitable, in principle, in the present case. Therefore, they will not be explained in any further detail at this point.

As a potential advantage, the patterning methods that have been outlined can be incorporated in a simple manner into existing production methods for semiconductor components and can even at least partly utilize already existing techniques that are often used in the production of semiconductor components.

In a method for producing a leadframe strip having a multiplicity of component sections, a multiplicity of contact-making windows and a multiplicity of electrical connection tracks assigned to said contact-making windows are produced in a laminate strip, which can comprise a metal film as connection conductor layer and a polyimide film as carrier layer, by means of a method as described above. The contact making windows reach as far as onto the connection tracks. A respective group comprising contact-making window and assigned connection tracks is situated in a component section within an array comprising a multiplicity of component sections arranged next to one another on the laminate strip.

In one embodiment, the connection conductor layer is at least partly removed along separating lines between in each case two adjacent component regions. This measure can facilitate the severing of the laminate strip along the separating lines, which is done by sawing or stamping, by way of example.

The method according to the invention can be suitable for producing surface-mountable semiconductor components having in each case at least one semiconductor chip, at least two external electrical connection conductors, which are connected to at least two electrical contacts of the semiconductor chip, and having a plastic housing which encapsulates the semiconductor chip.

In this case, in a first embodiment, firstly an electrical insulating carrier layer is applied to an electrically conductive connection conductor layer. Afterward, at least one chip window and at least one wire connection window are formed in the carrier layer and at least two external electrical connection conductors are formed in the connection conductor layer. Later the semiconductor chip is mounted into the chip window and at least one electrical contact of the semiconductor chip is electrically connected to a connection conductor by means of a bonding wire through the wire connection window. The composite comprising patterned connection conductor layer, patterned carrier layer, semiconductor chip and bonding wire is then placed into an injection mold, in which the semiconductor chip including bonding wire is then encapsulated with an encapsulation material by injection molding, which material is subsequently at least partly incipiently cured or cured.

In such a method for simultaneously producing a multiplicity of semiconductor components, arrays with in each case a multiplicity of component regions are produced in a laminate strip having a connection conductor layer and a carrier layer, in which arrays each component region has at least one chip window, at least one wire connection window and at least two external electrical connection conductors. A multiplicity of semiconductor chips are mounted into the multiplicity of chip windows. The electrical contacts of the semiconductor chips are then connected to the external electrical connection conductors by means of bonding wires through the wire connection windows. The arrays are subsequently placed into an injection mold individually or in groups one after the other, which injection mold has, for each array, a single cavity which spans all the component regions of the array and forms a void there essentially exclusively on the side of the semiconductor chips. Encapsulation material is then introduced into the cavity by injection molding and is at least partly cured there. The array is subsequently removed from the injection mold and singulated into mutually separate semiconductor components by severing the encapsulation material, the carrier layer and, if still necessary, the connection conductor layer.

In a second embodiment, likewise firstly an electrically insulating carrier layer is applied to an electrically conductive connection conductor layer. Afterward, at least one chip window is formed in the carrier layer and at least two external electrical connection conductors are formed in the connection conductor layer, which connection conductors partly overlap the chip window. This structure is suitable for example for semiconductor chips in which at least two electrical contacts are arranged on the same side. Such a chip is mounted in the chip window with the contacts onto the external electrical connection conductors and electrically connected. This composite comprising patterned connection conductor layer, patterned carrier layer and semiconductor chip is subsequently placed into an injection mold, in which the semiconductor chip is then encapsulated with an encapsulation material by injection molding, which material is subsequently at least partly incipiently cured or cured.

In such a method for simultaneously producing a multiplicity of semiconductor components, arrays with in each case a multiplicity of component regions are produced in a laminate strip having a connection conductor layer and a carrier layer, in which arrays each component region has at least one chip window and at least two external electrical connection conductors. In each case at least one semiconductor chip is mounted into the chip windows as described above. The arrays are encapsulated and singulated in the same way as already described further above.

The method according to the invention is especially suitable for producing light-emitting diode components in which light-emitting diode chips are mounted onto the leadframe.

In a leadframe strip having a connection conductor layer (preferably made of a patterned metal film) and a carrier layer (preferably a patterned plastic film in particular made of polyimide material), on which an array with a multiplicity of component regions is formed, the connection conductor layer is at least partly removed along separating lines between two adjacent component regions. This can facilitate the severing of the leadframe after the encapsulation of the array of semiconductor components.

The contact-making windows enable particularly simple monitoring of the alignment of the chip mounting installation and the wire bonding installation. An impermissibly large misalignment of the chip mounting installation and/or wire mounting installation can be rapidly identified because the semiconductor chips and/or connection wires do not adhere on the film after their mounting if they settle on the edge of the contact-making windows. This is all the more important, the smaller the design, because firstly the reliability of the components is impaired by misalignment of the chip mounting all the more, the smaller the volume of the chip encapsulation, and secondly the quantity of rejects is very high in the event of misalignment that is not immediately identified, on account of the high packing density of the components and the associated large quantity of components per unit length on a leadframe tape.

DETAILED DESCRIPTION

A method for producing a leadframe10for a surfacemountable semiconductor component in accordance withFIG. 1orFIG. 2, which is a light-emitting semiconductor component in the exemplary embodiment, quite generally has the following steps: a) production of a layer composite comprising an electrically insulating carrier layer101(the carrier layer is preferably a plastic film comprising polyimide or a polyimide-containing material) and an electrically conductive connection conductor layer102(examples of suitable materials for this are copper and copper based alloys) (seeFIGS. 3aand4a); b) patterning of the carrier layer101by means of masking and etching, in such a way that a first contact-making window7and a second contact-making window8are formed in it, which windows lead to the later first connection conductor2and, respectively, to the second connection conductor3(seeFIGS. 3b–3dand4b–4c); and c) patterning of the connection conductor layer102by means of masking and etching, in such a way that the first electrical connection conductor2and the second electrical connection conductor3are produced, which can be electrically connected through the first contact-making window7and, respectively, through the second contact-making window8(seeFIGS. 3e–3fand4d–4e).

As an alternative, step c) may take place before step b). The thickness of the connection carrier layer101lies between from and including 30 μm and up to and including 60 μm. The same applies to the thickness of the connection conductor layer102.

The carrier layer101, prior to patterning, at least in the regions to be patterned, is not yet cured and can be removed by means of a suitable solvent. Except for the areas of the contact-making windows7and8and, if appropriate, other regions that are subsequently to be removed, the carrier layer will be cured. The uncured regions of the carrier layer are subsequently removed.

For the patterning of the plastic carrier layer101, firstly a photoresist layer103is applied thereto (FIG. 3b), which photoresist layer is patterned by means of known methods in such a way that the regions70and80of the contact-making windows7,8are covered by the photoresist layer103(FIG. 3c). The plastic layer is cured in the uncovered regions, preferably by means of UV radiation105(FIG. 3c). The photoresist layer103and the underlying plastic layer are subsequently removed from the connection conductor layer102in the regions70and80. Examples of suitable solvents for this purpose are IPA (isopropanol) and acetone.

As an alternative, for the patterning of the plastic layer, firstly a photomask104is arranged above or on said plastic layer, which photomask shades the regions70,80of the contact-making windows7,8(FIG. 4b). The plastic layer is then incipiently cured or cured, such as by means of UV radiation105, in the regions which are intended to remain on the connection conductor layer102(FIG. 4b). The photomask layer104is subsequently removed and the plastic layer is then etched from the connection conductor layer102by means of a suitable solvent106in the regions70,80of the contact-making windows7,8(FIG. 4c).

In a method for producing a leadframe strip200having a multiplicity of component regions, at least one contact-making window7and at least two connection conductors2,3are formed in each component region by means of one of the methods described above.

Along separating lines110between in each case two adjacent component regions, the connection conductor layer preferably has recesses111and112in which the connection conductor layer is removed (FIGS. 5aand6b).

In an exemplary method for producing a surfacemountable light-emitting component in accordance withFIG. 1having at least one light-emitting diode or laser diode chip1, at least two connection conductors2,3, which are connected to at least two electrical contacts4,5of the semiconductor chip1, and having a chip housing11, which has a connection carrier9and a chip encapsulation6, specifically: a) the carrier layer101is applied to the connection conductor layer102and then at least one chip window7and at least one wire connection window8are patterned in the carrier layer101and the external electrical connection conductors2,3are patterned in the connection conduction layer102(cf.FIGS. 3a–3f,4a–4eand6a–6b); b) the semiconductor chip1is mounted into the chip window7; c) at least one electrical contact5of the semiconductor chip1is electrically connected to a connection conductor3through the wire connection window8by means of a bonding wire50; d) the composite comprising patterned connection conductor layer102, patterned carrier layer101, semiconductor chip1and bonding wire50is placed into an injection mold; and e) the semiconductor chip1including bonding wire50is encapsulated with encapsulating material6by injection molding, which material is subsequently at least partly cured.

For the mass production of such components, arrays201with in each case a multiplicity of component regions202with in each case at least one chip window7, at least one wire connection window8and at least two connection conductors2,3are produced in a laminate strip comprising connection conductor layer102and carrier layer101(cf.FIGS. 6aand6b). After the mounting of semiconductor chips1into the chip windows7and electrical connection of the semiconductor chips1to the connection conductors2,3, each array is placed into an injection mold500(FIG. 7), in which a single cavity501which spans all the component regions202of the array201and forms a void there essentially exclusively on the side of the semiconductor chips1is provided for in each case an entire array201. After the injection of encapsulation material60into the cavity501and the at least partial curing thereof, the array201is removed from the injection mold500and singulated into mutually separate semiconductor components by severing the encapsulation material60and the connection carrier layer101.

An exemplary method for producing a surface-mountable light-emitting component in accordance withFIG. 2having at least one light-emitting diode or laser diode chip1, at least two connection conductors2,3, which are connected to at least two electrical contacts4,5of the semiconductor chip1, and having a chip housing11, which has a connection carrier9and a chip encapsulation6, differs from the method just described merely by the fact that each component region has only one chip window and no wire connection window, and that the chip1is mounted onto the connection conductors2and3in the chip window7in rotated fashion with its light-generating epitaxial layer facing toward said connection conductors. Both electrical contacts4and5are situated on the same side of the chip1. The contact4lies on the connection conductor2and the contact5lies on the connection conductor3.

As mentioned above, the carrier layer can be incipiently cured or cured preferably by means of UV radiation. As an alternative, it may be able to be incipiently cured or cured by means of thermal radiation. The carrier layer can comprise polyimide monomer.

The method according to the invention is suitable for producing electromagnetic radiation-emitting and/or -receiving components having one or more electromagnetic radiation-emitting and/or -receiving semiconductor chips. It is suitable in particular for producing light-emitting diode components having a housing installation barrier with the dimensioning 0402 (corresponding to 0.5 mm×1.0 mm) or less and a device height of less than 400 μm, in particular less than 350 μm.

In the case of optoelectronic components, use is made of a chip encapsulation composed of a material which transmits electromagnetic radiation, in particular is transparent or translucent in the case of light-emitters. An example of an encapsulation compound in this respect is unfilled clear plastic material. Such materials are known and, therefore, are not explained in any further detail at this point.

In order to produce a light-emitting diode component which radiates mixed colored light, the chip encapsulation may have added to it a luminescent material which absorbs at least part of the electromagnetic radiation emitted by the light-emitting diode chip and emits electromagnetic radiation of a different wavelength and color than the absorbed radiation.

The injection of encapsulation material into the cavity as outlined above can be effected from the side and in particular via a film gate. After the encapsulation material has been at least partly incipiently cured or cured, the array is removed from the injection mold and singulated into individual semiconductor components by severing the chip encapsulation material and the leadframe between the component regions.

In a central region above the semiconductor chip and, if appropriate, one or more bonding wires to the semiconductor chip, perpendicular to the leadframe, the chip encapsulation can be given a greater thickness than in an edge region extending around the central region. For this purpose, the cavity501has a multiplicity of recesses502each spanning one or more semiconductor chips1. In this way, the volume of encapsulation material is reduced by reduction of the thickness of the encapsulation material in regions where this is permissible with respect to the thickness in the region of semiconductor chips1and, if appropriate, one or more bonding wires50to the semiconductor chip1. This makes it possible to counteract a bulging of the component array during the production method on account of different thermal expansions of leadframe laminate and chip encapsulation.

A separate recess502can be provided above each semiconductor chip of the array in such a way that, after the injection-molding process, the encapsulation material has a multiplicity of elevations51arranged next to one another. The resulting encapsulation can have a structure similar to a chocolate bar (cf.FIG. 8).

The array can be singulated by severing the encapsulation material and the leadframe in the trenches52between the elevations51.

An adhesion promoter can be expediently applied to the carrier layer101before the array is placed into the injection mold500, which adhesion promoter improves the adhesion of the encapsulation material on the leadframe. A Polyimide covering resist is preferably used for this purpose.

With regard to technically simple handling of the semiconductor components after singulation, the leadframe can be laminated onto an auxiliary film400by its rear side before being placed into the injection mold. This auxiliary film protects the connection conductors2,3on the one hand from mechanical damage (e.g., scratching) and on the other hand from undesirable covering of the connection conductors with encapsulation material, that is to say from a so-called flash on the rear side of the leadframe strip.

The auxiliary film expediently has a thermal expansion coefficient similar to or greater than that of the encapsulation material in such a way that it counteracts to the greatest possible extent a bulging of the array on account of greater shrinkage of the encapsulation material in relation to the leadframe during the curing and/or cooling of said material after the encapsulation of the array by injection molding.

For basically the same purpose, the laminate strip may have, outside the arrays, holes, perforations and/or slots for reducing mechanical strains on account of different thermal expansions and/or material shrinkages.

As a further alternative or additional measure, it is possible to use a bowed injection mold in which the array is convexly curved during the injection of the encapsulation compound into the cavity as seen from the side on which the material having the greater thermal expansion coefficient is later situated.

In order to enable electrical and/or optical testing of the semiconductor components, the array is applied to a film by the encapsulation side prior to singulation and then, if appropriate, the auxiliary film is stripped away from the rear side of the leadframe. For the case where optical measurement of the semiconductor component is necessary, said film preferably transmits electromagnetic radiation and the measurement is effected through the film.

In all the methods outlined above, the singulation of the array can be effected by means of sawing, laser separation and/or water jet cutting.