Method for etching silicon layer and plasma processing apparatus

Disclosed is a method of etching a silicon layer by removing an oxide film formed on a workpiece which includes the silicon layer and a mask provided on the silicon layer. The method includes: (a) forming a denatured region by generating plasma of a first processing gas containing hydrogen, nitrogen, and fluorine within a processing container accommodating the workpiece therein to denature an oxide film formed on a surface of the workpiece; (b1) removing the denatured region by generating plasma of a rare gas within the processing container; and (c) etching the silicon layer by generating plasma of a second processing gas within the processing container.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is based on and claims priority from Japanese Patent Application No. 2013-256041, filed on Dec. 11, 2013, with the Japan Patent Office, the disclosure of which is incorporated herein in its entirety by reference.

TECHNICAL FIELD

Exemplary embodiments of the present disclosure relate to a method for etching a silicon layer and a plasma processing apparatus.

BACKGROUND

In manufacturing an electronic device such as, for example, a fin type field effect transistor, a plasma etching is performed so as to transfer a pattern of a mask to a silicon layer. In some cases, since a natural oxide film is formed on an object to be processed (“workpiece”) including the silicon layer and the mask, the plasma etching of the silicon layer may be performed after removing the natural oxide film. Typically, the natural oxide film is removed by exposing the workpiece to the plasma of a fluorocarbon-based gas.

When removing an oxide film such as the natural oxide film, it is required to selectively remove the oxide film with respect to the silicon layer and the mask. A method called chemical oxide removal (COR) is known as a method for selectively removing the oxide film. In the COR, the workpiece is exposed to a processing gas including hydrogen, nitrogen, and fluorine. As a result, silicon oxide forming the oxide film is denatured to (NH4)2SiF6, i.e., ammonium fluorosilicate, thereby forming a denatured region. Subsequently, in the COR, the workpiece is heated so that the ammonium fluorosilicate of the converted region is thermally decomposed. Therefore, the oxide film is removed.

In some cases, the denatured region may also be formed by a plasma processing. That is, the denatured region may be formed when the workpiece is exposed to the plasma of the processing gas. The COR using plasma is disclosed in Japanese Laid-Open Patent Publication No. H6-188226.

SUMMARY

According to an aspect of the present disclosure, there is provided a method of etching a silicon layer by removing an oxide film formed on an object to be processed (“workpiece”) which includes the silicon layer and a mask provided on the silicon layer. The method includes: (a) forming a denatured region by generating plasma of a first processing gas containing hydrogen, nitrogen, and fluorine within a processing container accommodating the workpiece therein to denature an oxide film formed on a surface of the workpiece; (b1) removing the denatured region by generating plasma of a rare gas within the processing container; and (c) etching the silicon layer generating plasma of a second processing gas within the processing container.

DETAILED DESCRIPTION

In the COR, after the denatured region is formed in the plasma processing apparatus, the workpiece is conveyed to a heating apparatus different from the plasma processing apparatus. Accordingly, the number of steps required up to the etching of the silicon layer is increased.

Accordingly, it is required to remove the oxide film with a high throughput in a pretreatment of the etching of the silicon layer.

In a first aspect of the present disclosure, there is provided a method of etching a silicon layer by removing an oxide film formed on an object to be processed (“workpiece”) which includes the silicon layer and a mask provided on the silicon layer. The method includes: (a) forming a denatured region by generating plasma of a first processing gas containing hydrogen, nitrogen, and fluorine within a processing container accommodating the workpiece therein to denature an oxide film formed on a surface of the workpiece; (b1) removing the denatured region by generating plasma of a rare gas within the processing container; and (c) etching the silicon layer generating plasma of a second processing gas within the processing container.

In the method of the first aspect, in step (b1), the denatured region may be removed by the plasma of the rare gas. In addition, steps (a), (b1) and (c) may be performed in a single processing container. Accordingly, the oxide film may be removed with a high throughput in a pretreatment of the etching of the silicon layer.

In a second aspect of the present disclosure, there is provided a method of etching a silicon layer by removing an oxide film formed on a workpiece which includes the silicon layer and a mask provided on the silicon layer. The method includes: (a) forming a denatured region by generating plasma of a first processing gas containing hydrogen, nitrogen, and fluorine within a processing container accommodating the workpiece therein to denature an oxide film; (b2) removing the denatured region by generating plasma of a second processing gas within the processing container following to forming the denatured region without taking out the workpiece from the processing container; and (c) etching the silicon layer by generating plasma of the second processing gas within the processing container.

According to the method of the second aspect, the denatured region may be removed by the plasma of the second processing gas used in steps (b2) and (c). That is, the removing of the denatured region and the etching of the silicon layer may be performed successively without changing the gas species. In addition, steps (a), (b2) and (c) may be performed in a single processing container. Accordingly, the oxide film may be removed with a high throughput in a pretreatment of the etching of the silicon layer.

In an exemplary embodiment of the first and second aspects, the step of forming the denatured region and the step of removing the denatured region may be performed in a biasless manner. With this exemplary embodiment, the damage of the silicon layer and the mask can be suppressed.

In an exemplary embodiment of the first and second aspects, the first processing gas may include SF6gas.

In a third aspect of the present disclosure, there is provided a plasma processing apparatus which may be used for performing the method according to the first aspect. The plasma processing apparatus is provided with a processing container, a mounting table, a gas supply module, a plasma generation unit, and a control unit. The mounting table is configured to mount an object to be processed (“workpiece”) thereon within the processing container. The gas supply module is configured to supply a first gas containing hydrogen, nitrogen and fluorine, a rare gas, and a second processing gas for etching a silicon layer into the processing container. The plasma generation unit is configured to generate energy to excite a gas supplied into the processing container. The control unit is configured to control the gas supply module and the plasma generation unit. The control unit executes: a first control of causing the gas supply module to supply the first processing gas, and causing the plasma generation unit to generate energy, a second control of causing the gas supply module to supply the rare gas, and causing the plasma generation unit to generate energy, and a third control of causing the gas supply module to supply the second processing gas, and causing the plasma generation unit to generate energy.

In an exemplary embodiment of the third aspect, a bias power may not be supplied to the mounting table during the first control and the second control.

In the fourth aspect of the present disclosure, there is provided a plasma processing apparatus which may be used for performing the method according to the second aspect. The plasma processing apparatus is provided with a processing container, a mounting table, a gas supply module, a plasma generation unit, and a control unit. The mounting table is configured to mount a workpiece thereon within the processing container. The gas supply module is configured to supply a first gas containing hydrogen, nitrogen and fluorine, and a second processing gas for etching a silicon layer into the processing container. The plasma generation unit is configured to generate energy to excite a gas supplied into the processing container. The control unit configured to control the gas supply module and the plasma generation unit. The control unit executes: a first control of causing the gas supply module to supply the first processing gas, and causing the plasma generation unit to generate energy, and a second control of causing the gas supply module to supply the second processing gas, and causing the plasma generation unit to generate energy, following to the first control. According to this plasma processing apparatus, the denatured region is removed in the second control, and subsequently, the silicon is etched.

In an exemplary embodiment of the fourth aspect, the bias power may not be supplied to the mounting table during the first control and a predetermined period from initiation of the second control, and the bias power may be supplied to the mounting table after the predetermined period from the initiation of the second control.

In addition, in an exemplary embodiment of the third and fourth aspects, the first processing gas may include SF6gas.

As described above, the oxide film may be removed with a high throughput in a pretreatment of the etching of the silicon layer.

Hereinafter, various exemplary embodiments will be described with reference to the accompanying drawings. In the accompanying drawings, the same or corresponding components will be denoted by the same reference symbols, respectively.

FIG. 1is a flowchart illustrating an exemplary embodiment of a method for etching a silicon layer. Method MT illustrated inFIG. 1is a method for etching a silicon layer by removing an oxide film from a workpiece (hereinafter, referred to as a “wafer W”). The method may be applied to a wafer W illustrated inFIG. 2.FIG. 2is a cross-sectional view illustrating an exemplary workpiece to which method MT is applicable. The wafer W illustrated inFIG. 2is a product obtained in the middle of manufacturing the fin type field effect transistor, for example, a product obtained in a step prior to forming a dummy gate which is made of silicon.

As illustrated inFIG. 2, the wafer W includes a silicon layer100and a mask102. The silicon layer100is formed of, for example, polycrystalline silicon. The mask102is mounted on the silicon layer100. The mask102is formed of, for example, SiN. In some cases, an oxide film104such as a natural oxide film may be formed on the surface of the wafer W in a step prior to etching the silicon layer100. In method MT and a method according to another exemplary embodiment to be described later, the oxide film104may be removed so as to etch the silicon layer100. Meanwhile, a workpiece, to which methods according to various exemplary embodiments disclosed herein is applicable, is not limited to the wafer W illustrated inFIG. 2. The methods may be applied to any workpiece as long as the workpiece includes a mask installed on a silicon layer and an oxide film is formed on the surface of the silicon layer in a step prior to etching the silicon layer. Hereinafter, descriptions will be made on method MT with reference to the wafer W ofFIG. 2as an example.

Reference will be made toFIG. 1again. In addition, in the following description,FIGS. 3A and 3B, 4A and 4B, and 5A and 5Bwill be properly referred. As illustrated inFIG. 1, in method MT, step ST1is performed first. In step ST1, as illustrated inFIGS. 3A and 3B, the oxide film104is denatured to form a denatured region104a. As illustrated inFIG. 3A, in step ST1, plasma PL1 of first processing gas is generated in a processing container which accommodates the wafer W therein. In step ST1, the wafer W is exposed to the plasma PL1.

The first processing gas contains hydrogen, nitrogen, and fluorine. In an exemplary embodiment, the first processing gas may include H2gas as a hydrogen source, and N2gas as a nitrogen source. In addition, the first processing gas may include at least one of a fluorocarbon gas, a fluorohydrocarbon gas, NF3gas, and SF6gas as a fluorine source. As the fluorocarbon gas, CF4gas, C4F8gas, C5F8gas, and C4F6gas may be exemplified. In addition, as the fluorohydrocarbon gas, CHF3gas, CH2F2gas, and CH3F may be exemplified.

In step ST1, the plasma of the first processing gas may be generated by any plasma source. For example, the first processing gas may be excited by microwaves, may be excited by a capacitively coupled plasma source, or may be excited by an inductively coupled plasma source. Meanwhile, as in step ST1, any other plasma source may be used in steps ST2and ST3to be described later.

In step ST1, the pressure within the processing container may be set to be in a range of 40 Pa (300 mTorr) to 66.66 Pa (500 mTorr). In addition, in step ST1, the first processing gas may include N2gas, and the flow rate of N2may be set to be in a range of 300 sccm to 1000 sccm. Further, in step ST1, the first processing gas may include SF6gas, and the portion occupied by the flow rate of SF6in the entire flow rate of the first processing gas may be set to be in a range of 3% to 8%. In an exemplary embodiment, step ST1, and steps ST2and ST3to be described later are performed in a plasma processing apparatus which excites a gas using microwaves. In step ST1of the present exemplary embodiment, the power of microwaves may be set to be in a range of 800 W to 3000 W.

In step ST1, a bias power for drawing ions in the plasma into the wafer W may not be used. That is, step ST1may be performed in a biasless manner. When step ST1is performed in the biasless manner, damage of the wafer caused by an ion sputtering effect may be suppressed. In particular, deformation of the mask102may be suppressed.

When the wafer W is exposed to the plasma PL1 of the first processing gas, the silicon oxide of the oxide film104is denatured so that the oxide film104is turned into a denatured region104aas illustrated inFIG. 3B. Specifically, hydrogen, nitrogen, and fluorine included in the first processing gas and the silicon oxide of the oxide film104are reacted with each other. As a result, the silicon oxide is denatured into (NH4)2SiF6, i.e. ammonium fluorosilicate.

Subsequently, in method MT, step ST2is performed. In step ST2, the denatured region104aformed in step ST1is removed. Step ST2is performed within the processing container used in step ST1without taking out the wafer W from the corresponding processing container. In step ST2of an exemplary embodiment, plasma PL2 of a rare gas is generated within the processing container as illustrated inFIG. 4A. As for the rare gas, any rare gas such as, for example, Ar gas, Xe gas, Ne gas, or Kr gas may be used. In step ST2, the wafer W is exposed to the plasma PL2. Thus, the denatured region104ais removed and the wafer W is turned into the state illustrated inFIG. 4B.

In step ST2, a bias power for drawing ions in the plasma into the wafer W may not be used. That is, step ST2may be performed in a biasless manner. When step ST2is performed in the biasless manner, damage of the wafer caused by an ion sputtering effect may be suppressed. In particular, deformation of the mask102may be suppressed.

Subsequently step ST3is performed in method MT. In step ST3, the silicon layer100is etched. Step ST3is performed with the processing container used in steps ST1and ST2without taking out the wafer from the processing container. As illustrated inFIG. 5, in step ST3, plasma PL3 of a second processing gas is generated. The second processing gas includes, for example, HBr gas. In addition, the second processing gas may further include a rare gas and oxygen gas. In step ST3, the wafer W is exposed to the plasma PL3. As a result, the silicon layer100is etched and the pattern of the mask102is transferred to the silicon layer100. Meanwhile, a bias power may be used in step ST3. By the bias power, ions are drawn into the wafer W. As a result, a verticality of a shape formed by etching the silicon layer100may be improved.

According to method MT, in step ST2, the denatured region104amay be removed with the plasma of the rare gas. In addition, steps ST1, ST2, and ST3may be formed within a single processing container. Accordingly, the oxide film104may be removed with a high throughput in the pretreatment of the etching of the silicon layer100. As a result, the throughput of a series of processings including the removal of the oxide film104and the etching of the silicon layer100may be improved.

Hereinafter, descriptions will be made on a method according to another exemplary embodiment. The method according to another exemplary embodiment includes steps ST1and ST3which are equal to steps ST1and ST3of method MT. Step ST2of the method according to the present exemplary embodiment generates plasma of the second processing gas unlike method MT.

That is, in step ST2of the method according to the present exemplary embodiment, the wafer W is exposed to the plasma PL3 of the second processing gas for etching the silicon layer100as illustrated inFIG. 6A. As a result, the denatured region104ais removed. In addition, in succession to step ST2, the plasma PL3 is generated in step ST3so that the silicon layer100is etched as illustrated inFIG. 6B. Meanwhile, step ST2may be performed in a biasless manner and in step ST3, a bias power for ion drawing-in may be supplied. In this manner, the plasma of the second processing gas may be continuously used for both the removal of the denatured region104aand the etching of the silicon layer100. Thus, according to the present exemplary embodiment, switching of gases between step ST2and step ST3may be omitted.

Hereinafter, descriptions will be made on a plasma processing apparatus which may be used for the above-described methods according to various exemplary embodiments.FIG. 7is a cross-sectional view schematically illustrating a plasma processing apparatus according to an exemplary embodiment.

The plasma processing apparatus10illustrated inFIG. 7is provided with a processing container12. The processing container12defines a processing space S configured to accommodate a wafer W therein. The processing container12may include a side wall12a, a bottom portion12b, and a ceiling portion12c.

The side wall12ahas a substantially cylindrical shape substantially centering around the axis Z and extending in the direction where an axis Z extends (hereinafter, referred to as an “axis Z direction”). The inner diameter of the side wall12ais, for example, 540 mm. The bottom portion12bis formed at a lower end side of the side wall12a. The upper end of the side wall12ais opened. The opening of the upper end of the side wall12ais closed by a dielectric window18. The dielectric window18is sandwiched between the upper end of the side wall12aand the ceiling portion12c. A sealing member SL1 may be interposed between the dielectric window18and the upper end of the side wall12a. The sealing member SL1 is, for example, an O-ring and contributes to the hermetic sealing of the processing container12.

The plasma processing apparatus10further includes a mounting table20. The mounting table20is installed within the processing container12and below the dielectric window18. The mounting table20includes a plate22and an electrostatic chuck24.

The plate22is a metallic member having substantially a disc shape, and is formed of, for example, aluminum. The plate22is supported by a cylindrical support unit SP1. The support unit SP1 extends vertically upwardly from the bottom portion12b. The plate22also serves as a radio frequency electrode. The plate22is electrically connected to a radio frequency power supply RFG configured to generate a radio frequency bias power via a matching unit MU and a power feeding rod PFR. The radio frequency power supply RFG outputs a radio frequency bias power having a predetermined frequency suitable for controlling an energy of ions drawn into the wafer W, for example 13.65 MHz. The matching unit MU accommodates a matcher for impedance matching between the radio frequency power supply RFG side and a load side impedance (e.g., mainly, an electrode, plasma, or a processing container12). In the matcher, a blocking condenser for self-bias generation is included.

The electrostatic chuck24is installed on the top of the plate22. The electrostatic chuck24includes a base plate24aand a chuck portion24b. The base plate24ais a metallic member having substantially a disc shape and is formed of, for example, aluminum. The base plate24ais installed on the plate22. The chuck portion24bis provided on the top surface of the base plate24a. The top surface of the chuck portion24bbecomes a mounting region MR on which the wafer W is placed. The chuck portion24bholds the wafer by an electrostatic attractive force. The chuck portion24bincludes an electrode film sandwiched between dielectric films. A direct current (DC) power supply DSC is electrically connected to the electrode film of the chuck portion24bvia a switch SW and a coated wire CL. The chuck portion24bmay attract and hold the wafer W on the top surface thereof by a Coulomb force generated by a DC voltage applied from the DC power supply DSC. A focus ring FR is installed radially outside of the chuck portion24bto annularly surround the edge of the wafer W.

In addition, the plasma processing apparatus10is provided with a temperature control mechanism. As a portion of the temperature control mechanism, an annular coolant chamber24gextending in the circumferential direction is provided inside of the base plate24a. A coolant with a predetermined temperature such as, for example, cooling water is supplied to the coolant chamber24gfrom a chiller unit through pipes PP1 and PP3 to be circulated. The processing temperature of the wafer W on the chuck portion24bmay be controlled by the temperature of the coolant. In addition, a heat transfer gas from a heat transfer gas supply module, for example, He gas is supplied to a gap between the top surface of the chuck portion24band the rear surface of the wafer W through a supply pipe PP2.

The plasma processing apparatus10may further include heaters HT, HS, HC, and HE as a portion of the temperature control mechanism. The heater HT is installed within the ceiling portion12cand extends annularly to surround the antenna14. In addition, the heater HS is installed within the side wall12aand extends annularly. The heater HC is installed within the base plate24a. The heater HC is installed below the central portion of the above-described mounting region MR within the base plate24a, i.e. in a region crossing the axis Z. Further, the heater HE is installed within the base plate24aand extends annularly to surround the heater HC. The heater HE is installed below the outer peripheral edge of the above-described mounting region MR.

Further, an annular exhaust path VL is formed around the mounting table20. In the middle of the exhaust path VL in the axis Z direction, an annular baffle plate26is installed in which a plurality of through holes is formed in the baffle plate26. The exhaust path VL is connected to an exhaust pipe28that provides an exhaust port28h. The exhaust pipe28is mounted in the bottom portion12bof the processing container12. An exhaust apparatus30is connected to the exhaust pipe28. The exhaust apparatus30includes a pressure regulator and a vacuum pump such as, for example, a turbo molecular pump. By the exhaust apparatus30, the processing space S within the processing container12may be decompressed to a desired vacuum level. In addition, when the exhaust apparatus30is operated, the gas may be discharged through the exhaust path VL from the outer periphery of the mounting table20.

In addition, the plasma processing apparatus10further includes a plasma generation unit PG of an exemplary embodiment. The plasma generation unit PG includes an antenna14, a coaxial waveguide16, a dielectric window18, a microwave generator32, a tuner34, a waveguide36, and a mode converter38. The microwave generator32generates microwaves having a frequency of, for example, 2.45 GHz. The microwave generator32is connected to an upper portion of the coaxial waveguide16via the tuner34, the waveguide36, and the mode converter38. The coaxial waveguide16extends along the axis Z which is the central axis thereof. In an exemplary embodiment, the center of the mounting region MR of the mounting table20is positioned on the axis Z.

The coaxial waveguide16includes an outer conductor16aand an inner conductor16b. The outer conductor16ahas a cylindrical shape extending along the axis Z which is the central axis thereof. The lower end of the outer conductor16amay be electrically connected to an upper portion of the cooling jacket40having a conductive surface. The inner conductor16bis installed inside of the outer conductor16ato be coaxial to the outer conductor16a. The inner conductor16bhas a cylindrical shape extending along the axis Z which is the central axis thereof. The lower end of the inner conductor16bis connected to a slot plate44of the antenna14.

In an exemplary embodiment, the antenna14is a radial line slot antenna. The antenna14is disposed within the opening formed in the ceiling portion12cand installed above the top surface of the dielectric window18. The antenna14includes a dielectric plate42and a slot plate44. The dielectric plate42shortens the wavelength of microwaves and has substantially a disc-shape. The dielectric plate42is formed of, for example, quartz or alumina. The dielectric plate42is sandwiched between the slot plate44and the bottom surface of the cooling jacket40. Accordingly, the antenna14may be configured by the dielectric plate42, the slot plate44, and the cooling jacket40.

FIG. 8is a plan view illustrating an exemplary slot plate. The slot plate44is formed in a thin disc shape. Each of the opposite surfaces of the slot plate44in the thickness direction is flat. The center CS of the circular slot plate44is positioned on the axis Z. The slot plate44is provided with a plurality of slot pairs44p. Each of the plurality of slot pairs44pincludes two slot holes44aand44bpenetrating the slot plate in the thickness direction. Each of the slot holes44aand44bhas an oblong hole shape. In each slot pair44p, the direction where the major axis of the slot hole44aextends and the direction where the major axis of the slot hole44bextends intersect with each other or lie at right angles to each other.

In the example illustrated inFIG. 8, the plurality of slot pairs44pis generally classified into an inner slot pair group ISP provided inside of a virtual circle VC centering around the axis Z and an outer pair group OSP provided outside of the virtual circle VC. The inner slot pair group ISP includes a plurality of slot pairs44p. In the example illustrated inFIG. 8, the inner slot pair group ISP includes seven (7) slot pairs44p. The plurality slot pairs44pof the inner slot pair group ISP is arranged at regular intervals in a circumferential direction with respect to the center CS. The plurality slot holes44aincluded in the inner slot pair group ISP is arranged at regular intervals such that the center of gravity of each of the slot holes44ais positioned on a circle with a radius r1 from the center CS of the slot plate44. In addition, the plurality of slot holes44bincluded in the inner slot pair group ISP are arranged at regular intervals such that the center of gravity of each of the slot holes44bis positioned on a circle with a radius r2 from the center CS of the slot plate44. Here, the radius r2 is larger than the radius r1.

The outer slot pair group OSP includes a plurality of slot pairs44p. In the example illustrated inFIG. 8, the outer slot pair group OSP includes twenty eight (28) slot pairs44p. The plurality of slot pairs44pof the outer slot pair group OSP is arranged at regular intervals in the circumferential direction with respect to the center CS. The plurality of slot holes44aincluded in the outer slot pair group OSP is arranged at regular intervals such that the center of gravity of each of the slot holes44ais positioned on a circle with a radius r3 from the center CS of the slot plate44. In addition, the plurality of slot holes44bincluded in the outer slot pair group OSP is arranged at regular intervals such that the center of gravity of each of the slot holes44bis positioned on a circle with a radius r4 from the center CS of the slot plate44. Here, the radius r3 is larger than the radius r2, and the radius r4 is larger than the radius r3.

In addition, the slot holes44aof the inner slot pair group ISP and the outer slot pair group OSP are formed such that an angle of the major axis of each slot hole44awith respect to a line segment connecting the center CS and the center of gravity thereof is the same as an angle of the major axis of any other slot hole44awith respect to a line segment connecting the center CS and the center of gravity thereof. Further, the slot holes44bof the inner slot pair group ISP and the outer slot pair group OSP are formed such that an angle of the major axis of each slot hole44bwith respect to a line segment connecting the center CS and the center of gravity thereof is the same as an angle of the major axis of any other slot hole44bwith respect to a line segment connecting the center CS and the center of gravity thereof.

FIG. 9is a plan view illustrating an exemplary dielectric window which is viewed from the processing space S side.FIG. 10is a cross-sectional view taken along line X-X inFIG. 9. The dielectric window18has substantially a disc shape and is formed of a dielectric material such as, for example, quartz or alumina. The slot plate44is installed on the top surface18uof the dielectric window18.

A through hole18his formed at the center of the dielectric window18. The upper portion of the through hole18his a space18swhere an injector50bof the central introduction section50to be described later is accommodated, and the lower portion is a central introduction port18iof the central introduction section50to be described later. Meanwhile, the central axis of the dielectric window18coincides with the axis Z.

The surface opposite to the top surface18uof the dielectric window, i.e. the bottom surface18bis in contact with the processing space S, and becomes the surface facing the side where the plasma is generated. The bottom surface18bdefines various shapes. Specifically, the bottom surface18bhas a flat surface180in the central region surrounding the central introduction port18i. The flat surface180is orthogonal to the axis Z. In a region radially outside of the flat surface180, the bottom surface18bdefines a first recess181which is formed in an annular shape to be continuous annularly and recessed in a tapered shape toward the inside in the thickness direction of the dielectric window18.

The first recess181is defined by the inner tapered surface181a, a bottom surface181b, and an outer tapered surface181c. The bottom surface181bis formed to be closer to the top surface18uside than the flat surface180, and extends annularly in parallel to the flat surface180. The inner tapered surface181aextends annularly between the flat surface180and the bottom surface181band is inclined with respect to the flat surface180. The outer tapered surface181cextends between the bottom surface181band the peripheral edge of the bottom surface18band is inclined with respect to the bottom surface181b. Meanwhile, the peripheral edge region of the bottom surface18bbecomes a surface to be in contact with the side wall12a.

In addition, the bottom surface18bdefines a plurality of second recesses182which is recessed toward the inside in the thickness direction from the flat surface180. The number of the plurality of second recesses182is seven (7) in the example illustrated inFIGS. 9 and 10. The plurality of second recesses182is formed at regular intervals along the circumferential direction. Further, each of the plurality of second recesses182has a circular plan shape in a plane orthogonal to the axis Z. Specifically, an inner surface182adefining each second recess182is a cylindrical surface extending in the axis Z direction. Further, the bottom surface182bdefining each second recess182is a circular surface which is formed to be closer to the top surface18uside than the flat surface180and parallel to the flat surface180.

FIG. 11is a plan view illustrating a state where the slot plate illustrated inFIG. 8is installed on the dielectric window illustrated inFIG. 9, in which the dielectric window18is viewed from the lower side. As illustrated inFIG. 11, in the plan view, i.e., when viewed in the axis Z direction, the plurality of slot holes44aand the plurality of slot holes44bof the outer slot pair group OSP, and the plurality of slot holes44bof the inner slot pair group ISP overlap with the first recess181. Specifically, in the plan view, the plurality of slot holes44bof the outer slot pair group OSP partially overlaps with the outer tapered surface181c, and partially overlaps with the bottom surface181b. In addition, in the plan view, the plurality of slot holes44aof the outer slot pair group OSP overlaps with the bottom surface181b. Further, in the plan view, the plurality of slot holes44bof the inner slot pair group ISP partially overlaps with the inner tapered surface181aand partially overlaps with the bottom surface181b.

In the plan view, i.e. when viewed in the axis Z direction, the plurality of slot holes44aof the inner slot pair group ISP overlaps with the second recess182. Specifically, in the plan view, the center of gravity (center) of the bottom surface of each of the second recesses182is configured to be positioned within one of the plurality of slot holes44aof the inner slot pair group ISP.

Referring back toFIG. 7, in the plasma processing apparatus10, the microwaves generated by the microwave generator32are propagated to the electric plate42through the coaxial waveguide16and given from the slot holes44aand44bof the slot plate44to the dielectric window18.

In the dielectric window18, the plate thickness in the portion defining the first recess181and the plate thickness of the portion defining the second recess182are formed to be thinner than other portions. Accordingly, in the dielectric window18, the permeability of microwaves is increased in the portion defining the first recess181and the portion defining the second recess182. In addition, when viewed in the axis Z direction, the slot holes44aand44bof the outer slot pair group OSP and the slot holes44bof the inner slot pair group ISP overlap with the first recess181, and the slot holes44aof the inner slot pair group ISP overlap with the second recess182. Accordingly, the electric field of the microwaves is concentrated to the first recess181and the second recess182and the energy of the microwaves is concentrated to the first recess181and the second recess182. As a result, plasma may be stably generated in the first recess181and the second recess182so that plasma distributed in the radial direction and in the circumferential direction just below the dielectric window18may be stably generated.

In addition, the plasma processing apparatus10further include a central introduction section50and a peripheral introduction section52. The central introduction section50includes a duct50a, an injector50b, and a central introduction port18i. The duct50ais configured to communicate with an inner bore of the inner conductor16bof the coaxial waveguide16. In addition, an end of the duct50aextends to the inside of a space18adefined by the dielectric window18along the axis Z (see, e.g.,FIG. 10). The injector50bis accommodated within the space18sand below the end of the duct50a. A plurality of through holes extending in the axis Z direction is formed in the injector50b. In addition, the dielectric window18defines the central introduction port18i. The central introduction port18iis continuous to the lower side of the space18sand extends along the axis Z. The central introduction section50with this configuration supplies a gas to the injector50bthrough the duct50a, and jets the gas from the injector50bthrough the central injection port18i. In this manner, the central introduction section50jets the gas just below the dielectric window18along the axis Z. That is, the central introduction section50introduces the gas into a plasma generation region with a high electron temperature.

The peripheral introduction section52includes a plurality of peripheral introduction ports52i. The plurality of peripheral introduction ports52isupplies the gas mainly to the edge region of the wafer W. The plurality of peripheral introduction ports52iis opened toward the edge region of the wafer W or the peripheral edge of the mounting region MR. The plurality of peripheral introduction ports52iis arranged along the circumferential direction below the central introduction port18iand above the mounting table20. That is, the plurality of peripheral introduction ports52iis arranged annularly around the axis Z in a region (plasma diffusion region) having an electron temperature lower than that just below the dielectric window. The peripheral introduction section52supplies the gas toward the wafer W from the region with the lower electron temperature. Accordingly, the dissociation degree of the gas introduced into the processing space S from the peripheral introduction section52is suppressed as compared to the dissociation degree of the gas supplied to the processing space S from the central introduction section50.

To the central introduction section50, a first gas source group GSG1 is connected via a first flow rate control unit group FCG1. In addition, to the peripheral introduction section52, a second gas source group GSG2 is connected via a second flow rate control unit group FCG2.FIG. 12is a view illustrating a gas supply module including the first flow rate control unit group, the first gas source group, the second flow rate control unit group, and the second gas source group. As illustrated inFIG. 12, the first gas source group GSG1, the first flow rate control unit group FCG1, the second gas source group GSG2, and the second flow rate control unit group FCG2 form a gas supply module GU of an exemplary embodiment.

The first gas source group GSG1 includes a plurality of first gas sources GS11 to GS16. The gas source GS11 is a source of a gas containing hydrogen, for example, a source of H2gas. The gas source GS12 is a source of a gas containing nitrogen, for example, a source of N2gas. The gas source GS13 is a source of a gas containing fluorine. As for the gas containing fluorine, at least one of fluorocarbon gas, fluorohydrocarbon gas, NF3gas, and SF6gas as described above may be used. The gas source GS11, the gas source GS12, and the gas source GS13 are gas sources of the first processing gas of the exemplary embodiment. The gas source GS14 is a source of a rare gas, for example, a source of Ar gas. In addition, the gas source GS15 is a gas source of HBr gas described above. Further, the gas source GS16 is a source of O2gas. The gas source GS15 is a source of a gas forming the second processing gas of the exemplary embodiment.

The first flow rate control unit group FCG1 includes a plurality of first flow rate control units FC11 to FC16. Each of the plurality of first flow rate control units FC11 to FC16 includes, for example, two valves, and a flow rate controller installed between the two valves. The flow rate controller is, for example, a mass flow controller. The plurality of first gas sources GS11 to GS16 is connected to the common gas line GL1 via the plurality of first flow rate control units FC11 to FC16, respectively. The common gas line GL1 is connected to the central introduction section50.

The second gas source group GSG2 includes a plurality of first gas sources GS21 to GS26. The second gas sources GS21 to GS26 are the sources of gases which are the same kind as those of the gas sources GS11 to GS16, respectively.

The second flow rate control unit group FCG2 includes a plurality of second flow rate control units FC21 to FC26. Each of the plurality of second flow rate control units FC21 to FC26 includes, for example, two valves, and a flow rate controller installed between the two valves. The flow rate controller is, for example, a mass flow controller. The plurality of second gas sources GS21 to GS26 is connected to a common gas line GL2 via the plurality of second flow rate control units FC21 to FC26, respectively. The common gas line GL2 is connected to the peripheral introduction section52.

As described above, in the plasma processing apparatus10, a plurality of first gas sources and a plurality of first flow rate control units are provided exclusively for the central introduction section50, and a plurality of second gas sources and a plurality of second flow rate control units which are independent from the first gas sources and the plurality of first flow rate control units are provided exclusively for the peripheral introduction section52. Accordingly, the kind of the gases introduced into the processing space S from the central introduction section50, and the flow rates of one or more of the gases introduced into the processing space S from the central introduction section50may be independently controlled, and the kind of the gases introduced into the processing space S from the peripheral introduction section52and the flow rates of one or more of the gases introduced into the processing space S from the peripheral introduction section52may be independently controlled.

In an exemplary embodiment, the peripheral introduction section52further includes an annular pipe52p. The pipe52pis formed with a plurality of peripheral introduction ports52i. The annular pipe52pmay be formed of, for example, quartz. As illustrated inFIG. 7, in the exemplary embodiment, the annular pipe52pis installed along the inner wall surface of the side wall12a. In other words, the annular pipe52pis not disposed on a route that connects the bottom surface of the dielectric window18and the mounting region MR, that is, the wafer W. Accordingly, the annular pipe52pdoes not disturb the diffusion of plasma. In addition, since the annular pipe52pis installed along the inner wall surface of the side wall12a, the consumption of the annular pipe52pby plasma is suppressed, and as a result, the exchange frequency of the annular pipe52pcan be reduced. Further, since the annular pipe52pis installed along the side wall12a, of which the temperature may be controlled by a heater, the temperature stability of a gas introduced into the processing space S from the peripheral introduction section52can be improved.

In the exemplary embodiment, the plurality of peripheral introduction ports52iis opened toward the edge area of the wafer W. That is, the plurality of peripheral introduction ports52iis inclined with respect to a plane orthogonal to the axis Z so as to jet a gas toward the edge region of the wafer W. Since the peripheral introduction ports52iare opened to be inclined toward the edge region of the wafer W as described above, the active species of the gas jetted from the peripheral introduction ports52iis directly directed to the edge region of the wafer W. As a result, the active species of the gas can be supplied to the edge of the wafer W without being deactivated.

The plasma processing apparatus10further includes a control unit Cnt. The control unit Cnt may be a controller such as, for example, a programmable computer device. The control unit Cnt may control each component of the plasma processing apparatus10according to a program based on a recipe.

When step ST1of method MT is performed, the control unit Cnt executes a control of causing the gas supply module GU to supply the first processing gas and causing the plasma generation unit PG to generate energy. With this control, the gas supply module GU supplies a mixed gas of the gases from the gas sources GS11, GS12, GS13, GS21, GS22, and GS23 into the processing container12as the first processing gas. In addition, with this control, the plasma generation unit PG introduces microwaves into the processing container12through the dielectric window18. Thus, the plasma of the first processing gas is generated, and the wafer W is exposed to the plasma. According to an exemplary embodiment, in this control, the control unit Cnt may stop the supplying of a radio frequency bias power from the radio frequency power supply RFG to the plate22, that is, the radio frequency electrode.

In addition, when performing step ST2of method MT, the control unit Cnt executes a control of causing the gas supply module GU to supply a rare gas, and causing the plasma generation unit PG to generate energy. With this control, the gas supply module GU supplies the rare gas from the gas source GS14 and the gas source GS24 into the processing container12. In addition, with this control, the plasma generation unit PG introduces microwaves into the processing container12through the dielectric window18. Thus, the plasma of the rare gas is generated, and the wafer W is exposed to the plasma. According to an exemplary embodiment, in this control, the control unit Cnt may stop the supplying of a radio frequency bias power from the radio frequency power supply RFG to the plate22, that is, the radio frequency electrode.

When step ST3of method MT is performed, the control unit Cnt executes a control of causing the gas supply module GU to supply the second processing gas and causing the plasma generation unit PG to generate energy. With this control, the gas supply module GU supplies a mixed gas of the gases from, for example, the gas sources GS14, GS15, GS16, GS24, GS25, and GS26 into the processing container12as the second processing gas. In addition, with this control, the plasma generation unit PG introduces microwaves into the processing container12through the dielectric window18. Thus, the plasma of the second processing gas is generated and the wafer W is exposed to the plasma. According to an exemplary embodiment, in this control, the control unit Cnt may control the radio frequency power supply RFG such that a radio frequency bias power is supplied from the radio frequency power supply RFG to the plate22, that is, the radio frequency electrode.

When steps ST2and ST3of the method according to the other exemplary embodiment described above with reference toFIGS. 6A and 6Bare performed, the control unit Cnt executes a control of causing the gas supply module GU to supply the second processing gas, and causing the plasma generation unit PG to generate energy. With this control, the gas supply module GU supplies a mixed gas of the gases from, for example, the gas source GS14, GS15, GS16, GS24, GS25, and GS26 into the processing container12as the second processing gas. In addition, with this control, the plasma generation unit PG introduces microwaves into the processing container12through the dielectric window18. Thus, the plasma of the second processing gas is generated, and the wafer W is exposed to the plasma. In addition, in this control, the control unit may perform steps ST2and ST3by not supplying the bias power for a predetermined period from the initiation of this control, and supplying the bias power after the predetermined period elapses.