Pixel circuit in image display device including a storage capacitor with the voltage more than the threshold voltage of the driving transistor by lowering a drain voltage of the driving transistor

The present invention disposes a switch transistor between a driving transistor and a light emitting element, and sets the switch transistor in an off state during a non-emission period. Thereby, a variation in threshold voltage of the driving transistor is corrected while destruction of the light emitting element due to a reverse bias is avoided.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to an image display device, and is applicable to an active matrix type image display device using an organic EL (Electro Luminescence) element, for example. The present invention disposes a switch transistor between a driving transistor and a light emitting element, and sets the switch transistor in an off state during non-emission periods, whereby variation in threshold voltage of the driving transistor is corrected while destruction of the light emitting element due to a reverse bias is effectively avoided.

2. Description of the Related Art

In related art, an active matrix type image display device using an organic EL element has a display section formed by arranging pixel circuits each formed by the organic EL element and a driving circuit for driving the organic EL element in the form of a matrix. The image display device of this type has each pixel formed by an organic EL element provided in the pixel circuit, and drives each pixel circuit by a signal line driving circuit and a scanning line driving circuit arranged on the periphery of the display section to display a desired image.

In relation to the image display device using the organic EL element, Japanese Patent Laid-Open No. 2007-310311 (hereinafter referred to as Patent Document 1) discloses a method of forming a pixel circuit using two transistors. Thus, according to the method disclosed in Patent Document 1, a constitution can be simplified. Patent Document 1 also discloses a constitution for correcting a variation in threshold voltage and a variation in mobility of a driving transistor driving an organic EL element. Thus, according to the constitution disclosed in Patent Document 1, degradation in image quality due to a variation in threshold voltage and a variation in mobility of the driving transistor can be prevented.

FIG. 10is a block diagram showing the image display device disclosed in Patent Document 1. The image display device1has a display section2created on an insulating substrate of glass or the like. The image display device1has a signal line driving circuit3and a scanning line driving circuit4created on the periphery of the display section2.

The display section2is formed by arranging pixel circuits5in the form of a matrix, and pixels (PIX)6are formed by organic EL elements provided in the pixel circuits5. Incidentally, in an image display device for color images, one pixel is formed by a plurality of sub-pixels of red, green, and blue. Thus, in the case of the image display device for color images, the display section2is formed by sequentially arranging pixel circuits5for red, green, and blue forming sub-pixels of red, green, and blue, respectively.

The signal line driving circuit3outputs driving signals Ssig for signal lines to signal lines DTL provided in the display section2. More specifically, a data scan circuit3A in the signal line driving circuit3distributes image data D1input in the order of raster scanning to the signal lines DTL by sequentially latching the image data D1, and thereafter subjects each piece of the distributed image data D1to a digital-to-analog conversion process. The signal line driving circuit3processes a result of the digital-to-analog conversion, and generates the driving signals Ssig. The image display device1thereby sets a gradation of each pixel circuit5on a so-called line-sequential basis, for example.

The scanning line driving circuit4outputs a writing signal WS and a driving signal DS to scanning lines WSL for writing signals and scanning lines DSL for power supply, respectively, the scanning lines WSL and the scanning lines DSL being provided in the display section2. The writing signal WS is a signal for performing on-off control on a writing transistor provided in each pixel circuit5. The driving signal DS is a signal for controlling the drain voltage of a driving transistor provided in each pixel circuit5. A write scan circuit (WSCN)4A and a drive scan circuit (DSCN)4B in the scanning line driving circuit4each process a predetermined sampling pulse SP with a clock CK to generate the writing signal WS and the driving signal DS.

FIG. 11is a connection diagram showing details of a configuration of a pixel circuit5. In the pixel circuit5, the cathode of an organic EL element8is set at a predetermined negative side voltage. In the example ofFIG. 11, the negative side voltage is set at the voltage of a ground line. In the pixel circuit5, the anode of the organic EL element8is connected to the source of a driving transistor Tr2. Incidentally, the driving transistor Tr2is an N-channel type transistor formed by a TFT, for example. In the pixel circuit5, the drain of the driving transistor Tr2is connected to a scanning line DSL for power supply, and a driving signal DS for power supply is supplied from the scanning line driving circuit4to the scanning line DSL. Thus, the pixel circuit5current-drives the organic EL element8using the driving transistor Tr2of a source follower circuit configuration.

The pixel circuit5has a storage capacitor Cs between the gate and the source of the driving transistor Tr2. The gate side terminal voltage of the storage capacitor Cs is set at the voltage of a driving signal Ssig by a writing signal WS. As a result, the pixel circuit5current-drives the organic EL element8by the driving transistor Tr2according to a gate-to-source voltage Vgs corresponding to the driving signal Ssig. Incidentally, inFIG. 11, a capacitance Cel is a stray capacitance of the organic EL element8. Suppose in the following that the capacitance Cel is sufficiently larger than the capacitance of the storage capacitor Cs, and that the parasitic capacitance of the gate node of the driving transistor Tr2is sufficiently smaller than the capacitance of the storage capacitor Cs.

In the pixel circuit5, the gate of the driving transistor Tr2is connected to a signal line DTL via a writing transistor Tr1, which performs on-off operation according to the writing signal WS. Incidentally, in this case, the writing transistor Tr1is an N-channel type transistor formed by a TFT, for example. In this case, the signal line driving circuit3outputs the driving signal Ssig by selecting a gradation setting voltage Vsig and a voltage Vofs for threshold voltage correction in predetermined timing. In this case, the fixed voltage Vofs for threshold voltage correction is a fixed voltage used to correct a variation in threshold voltage of the driving transistor Tr2. The gradation setting voltage Vsig is a voltage indicating the light emission luminance of the organic EL element8, and is a voltage obtained by adding the fixed voltage Vofs for threshold voltage correction to a gradation voltage Vin. The gradation voltage Vin is a voltage corresponding to the light emission luminance of the organic EL element8. The gradation voltage Vin is generated for each signal line DTL by subjecting each piece of image data D1distributed to each signal line DTL to a digital-to-analog conversion process.

In the pixel circuit5, as shown inFIGS. 12A to 12E, the writing transistor Tr1is set in an off state by the writing signal WS during an emission period during which the organic EL element8is made to emit light (FIG.12A). In the pixel circuit5, during the emission period, a power supply voltage Vcc is supplied to the driving transistor Tr2by the driving signal DS for power supply (FIG. 12B). As shown inFIG. 13, the pixel circuit5thereby makes the organic EL element8emit light by a driving current Ids corresponding to the gate-to-source voltage Vgs (FIGS. 12D and 12E) of the driving transistor Tr2, which voltage is a voltage across the storage capacitor Cs, during the emission period.

In the pixel circuit5, the driving signal DS for power supply is lowered to a predetermined fixed voltage Vss at time t0at which the emission period ends (FIG. 12B). The fixed voltage Vss is a voltage low enough to make the drain of the driving transistor Tr2function as a source, and is a voltage lower than the cathode voltage of the organic EL element8.

Thereby, in the pixel circuit5, as shown inFIG. 14, an accumulated charge of the terminal on the organic EL element8side of the storage capacitor Cs flows out to the scanning line via the driving transistor Tr2. As a result, in the pixel circuit5, the source voltage Vs of the driving transistor Tr2is lowered to the voltage Vss (FIG. 12E), and the organic EL element8stops emitting light. In addition, in the pixel circuit5, the gate voltage Vg of the driving transistor Tr2is lowered in such a manner as to be interlocked with the lowering of the source voltage Vs (FIG. 12D).

Incidentally, to be more exact, due to the lowering of the drain voltage to the fixed voltage Vss, the gate voltage Vg of the driving transistor Tr2is maintained at a voltage lowered from the fixed voltage Vss by the threshold voltage of the drain-to-gate voltage of the driving transistor Tr2. The source voltage Vs of the driving transistor Tr2is maintained at a voltage lowered from the gate voltage Vg by a gate-to-source voltage in an immediately preceding emission period.

In the pixel circuit5, at a predetermined next time t1, the writing transistor Tr1is changed to an on state by the writing signal WS (FIG. 12A), and the gate voltage Vg of the driving transistor Tr2is set at the fixed voltage Vofs for threshold voltage correction which voltage Vofs is set in the signal line DTL (FIGS. 12C and 12D). Thereby, in the pixel circuit5, as shown inFIG. 15, the gate-to-source voltage Vgs of the driving transistor Tr2is set at substantially a voltage Vofs−Vss. In the pixel circuit5, due to the settings of the voltages Vofs and Vss, the voltage Vofs−Vss is set to a voltage larger than the threshold voltage Vth of the driving transistor Tr2.

Thereafter, in the pixel circuit5, the drain voltage of the driving transistor Tr2is raised to a power supply voltage Vcc by the driving signal DS at time t2(FIG. 12B). Thereby, in the pixel circuit5, as shown inFIG. 16, a charging current Ids flows in from the power supply Vcc to the terminal on the organic EL element8side of the storage capacitor Cs via the driving transistor Tr2. As a result, in the pixel circuit5, the voltage Vs of the terminal on the organic EL element8side of the storage capacitor Cs rises gradually. Incidentally, in this case, in the pixel circuit5, the current Ids flowing into the organic EL element8via the driving transistor Tr2is used only to charge the capacitance Cel of the organic EL element8and the storage capacitor Cs. As a result, only the source voltage Vs of the driving transistor Tr2rises without the organic EL element8emitting light.

In the pixel circuit5, when the voltage across the storage capacitor Cs becomes the threshold voltage Vth of the driving transistor Tr2, the charging current Ids stops flowing in via the driving transistor Tr2. Thus, in this case, the source voltage Vs of the driving transistor Tr2stops rising when the voltage across the storage capacitor Cs becomes the threshold voltage Vth of the driving transistor Tr2. The pixel circuit5thereby discharges the voltage across the storage capacitor Cs via the driving transistor Tr2, and sets the voltage across the storage capacitor Cs to the threshold voltage Vth of the driving transistor Tr2.

In the pixel circuit5, at time t3after the passage of a sufficient time to set the voltage across the storage capacitor Cs to the threshold voltage Vth of the driving transistor Tr2, as shown inFIG. 17, the writing transistor Tr1is changed to an off state by the writing signal WS (FIG. 12A). Next, as shown inFIG. 18, the voltage of the signal line DTL is set to the gradation setting voltage Vsig (=Vin+Vofs).

In the pixel circuit5, the writing transistor Tr1is set in an on state at next time t4(FIG. 12A). Thereby, in the pixel circuit5, as shown inFIG. 19, the gate voltage Vg of the driving transistor Tr2is set at the gradation setting voltage Vsig, and the gate-to-source voltage Vgs of the driving transistor Tr2is set at a voltage obtained by adding the threshold voltage Vth of the driving transistor Tr2to a gradation voltage Vin. Thereby, the pixel circuit5can drive the organic EL element8while effectively avoiding a variation in threshold voltage Vth of the driving transistor Tr2, and thus prevent degradation in image quality due to a variation in light emission luminance of the organic EL element8.

In the pixel circuit5, at the time of setting the gate voltage Vg of the driving transistor Tr2to the gradation setting voltage Vsig, the gate of the driving transistor Tr2is connected to the signal line DTL for a certain period with the drain voltage of the driving transistor Tr2maintained at the power supply voltage Vcc. Thereby the pixel circuit5also corrects a variation in mobility μ of the driving transistor Tr2.

That is, when the gate of the driving transistor Tr2is connected to the signal line DTL by setting the writing transistor Tr1in an on state with the voltage across the storage capacitor Cs set to the threshold voltage Vth of the driving transistor Tr2, the gate voltage Vg of the driving transistor Tr2gradually rises from the fixed voltage Vofs and is set to the gradation setting voltage Vsig.

In the pixel circuit5, a writing time constant necessary for the rising of the gate voltage Vg of the driving transistor Tr2is set shorter than a time constant necessary for the rising of the source voltage Vs of the driving transistor Tr2.

In this case, when the writing transistor Tr1performs an on operation, the gate voltage Vg of the driving transistor Tr2quickly rises to the gradation setting voltage Vsig (Vofs+Vin). At the time of the rising of the gate voltage Vg, when the capacitance Cel of the organic EL element8is sufficiently larger than the capacitance of the storage capacitor Cs, the source voltage Vs of the driving transistor Tr2does not vary.

However, when the gate-to-source voltage Vgs of the driving transistor Tr2becomes larger than the threshold voltage Vth, the current Ids flows in from the power supply Vcc via the driving transistor Tr2, and the source voltage Vs of the driving transistor Tr2rises gradually. As a result, in the pixel circuit5, the voltage across the storage capacitor Cs is discharged by the driving transistor Tr2, and the rising speed of the gate-to-source voltage Vgs is lowered.

The discharging speed of the voltage across the storage capacitor Cs changes according to the capability of the driving transistor Tr2. More specifically, the higher the mobility μ of the driving transistor Tr2, the faster the discharging speed.

As a result, in the pixel circuit5, the higher the mobility μ of the driving transistor Tr2, the lower the voltage across the storage capacitor Cs, whereby a variation in light emission luminance due to a variation in mobility is corrected. Incidentally, an amount of decrease in the voltage across the storage capacitor Cs which decrease is involved in correcting the mobility μ is represented by ΔV inFIGS. 12A to 12E,FIG. 19, andFIG. 20.

In the pixel circuit5, after the passage of the mobility correcting period, the writing signal WS is lowered at time t5. As a result, the pixel circuit5starts an emission period, and makes the organic EL element8emit light by the driving current Ids corresponding to the voltage across the storage capacitor Cs, as shown inFIG. 20. Incidentally, in the pixel circuit5, after the emission period is started, the gate voltage Vg and the source voltage Vs of the driving transistor Tr2are raised by a so-called bootstrap circuit. Vel inFIG. 20is a voltage of an amount of the rise.

Thus, the pixel circuit5prepares for the process of correcting the threshold voltage of the driving transistor Tr2in a period from time t0to time t2in which period the gate voltage of the driving transistor Tr2is lowered to the voltage Vss. In a next period from time t2to time t3, the pixel circuit5sets the voltage across the storage capacitor Cs to the threshold voltage Vth of the driving transistor Tr2to correct the threshold voltage of the driving transistor Tr2. In addition, in a period from time t4to time t5, the pixel circuit5corrects the mobility of the driving transistor Tr2, and samples the gradation setting voltage Vsig.

Japanese Patent Laid-Open No. 2007-133284 (hereinafter referred to as Patent Document 2) proposes a constitution in which the process of correcting a variation in the threshold voltage of the driving transistor Tr2is divided and performed a plurality of times. According to the constitution disclosed in Patent Document 2, a sufficient time can be assigned to the correction of variation in the threshold voltage even when a time assigned to the setting of a gradation in a pixel circuit is shortened with increase in precision. Thus, even when precision is increased, degradation in image quality due to variation in the threshold voltage can be prevented.

It is therefore considered that when the method disclosed in Patent Document 2 is applied to the method disclosed in Patent Document 1, a display device capable of maintaining high image quality even when precision is increased can be obtained by a simple constitution.

FIGS. 21A,21B,21C,21D,21E, and21F are time charts of a pixel circuit considered when the method disclosed in Patent Document 2 is applied to the method disclosed in Patent Document 1 by contrast withFIGS. 12A to 12E.

In this case, gradation setting voltages Vsig for respective pixel circuits5connected to the signal line DTL are output to the signal line DTL with the fixed voltage Vofs for threshold voltage correction interposed between the gradation setting voltages Vsig. In the pixel circuit5, the writing signal WS is raised intermittently so as to correspond to the driving of the signal line DTL, and the voltage across the storage capacitor Cs is discharged via the driving transistor Tr2in a plurality of periods. Thereby, in the example ofFIGS. 21A to 21F, a variation in threshold voltage of the driving transistor Tr2is corrected in a plurality of separate periods. Incidentally, inFIGS. 21A to 21F, VD denotes a vertical synchronizing signal.

In addition, Japanese Patent Laid-Open No. 2006-338042 (hereinafter referred to as Patent Document 3) discloses a constitution that sets the light emission luminance of an organic EL element by current driving.

SUMMARY OF THE INVENTION

In the constitution ofFIG. 11, the light emission of the organic EL element8is stopped by lowering the drain voltage of the driving transistor Tr2to the predetermined voltage Vss. As a result, during the period when the light emission of the organic EL element8is stopped, the organic EL element8is maintained in a reverse-biased state. When maintained in a reverse-biased state, the organic EL element may be destroyed depending on the magnitude and time of the reverse bias.

Thus, in the constitution ofFIG. 11, there is a fear of the organic EL element8being destroyed and thereby a dark dot being produced. Incidentally, in the constitution ofFIG. 11, the destruction of the organic EL element8can be prevented by raising the predetermined voltage Vss and thus reducing the amount of the reverse bias applied to the organic EL element8. However, when the voltage Vss is raised, it becomes difficult to set the voltage across the storage capacitor Cs to a voltage more than the threshold voltage of the driving transistor Tr2, and resultingly it becomes impossible to correct a variation in the threshold voltage of the driving transistor Tr2.

Embodiments of the present invention have been made in view of the above, and are to propose an image display device that can correct variation in threshold voltage of a driving transistor while effectively avoiding destruction of an organic EL element due to a reverse bias.

According to an embodiment of the present invention, there is provided an image display device wherein a display section is formed by arranging pixel circuits in a form of a matrix, the pixel circuits each include at least a light emitting element, a switch transistor, a driving transistor for current-driving the light emitting element by a driving current corresponding to a gate-to-source voltage of the driving transistor via the switch transistor, a storage capacitor for retaining the gate-to-source voltage, and a writing transistor for setting a terminal voltage of the storage capacitor by a voltage of a signal line, an emission period during which the light emitting element is made to emit light and a non-emission period during which light emission of the light emitting element is stopped are alternately repeated, in the non-emission period, after a voltage across the storage capacitor is set to a voltage more than a threshold voltage of the driving transistor, the voltage across the storage capacitor is set to a voltage corresponding to the threshold voltage of the driving transistor, and the terminal voltage of the storage capacitor is set to the voltage of the signal line, whereby light emission luminance of the light emitting element in the next emission period is set, and the switch transistor is set in an off state during the non-emission period.

With the constitution of the above-described embodiment, when the switch transistor is set in an off state during the non-emission period, the process of setting the voltage across the storage capacitor to a voltage more than the threshold voltage of the driving transistor and the like can be performed while the driving transistor and the light emitting element are disconnected from each other. Thus, the application of a reverse bias to the light emitting element in this process and the like can be prevented.

According to the embodiment of the present invention, it is possible to correct a variation in threshold voltage of a driving transistor while effectively avoiding destruction of an organic EL element due to a reverse bias.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Preferred embodiments of the present invention will hereinafter be described in detail referring to the drawings as appropriate.

First Embodiment

(1) Constitution of First Embodiment

FIG. 1is a connection diagram showing a pixel circuit applied to an image display device according to a first embodiment of the present invention by contrast withFIG. 11.FIG. 2is a connection diagram showing the pixel circuit in a simplified manner. In the pixel circuit25, a switch transistor Tr3functioning as a switch circuit by performing on/off operation according to a cutoff signal CutOFF is provided between a driving transistor Tr2and an organic EL element8. In the image display device21according to the present embodiment, as shown inFIG. 3, the pixel circuit25is arranged in the form of a matrix to form a display section22. The image display device21is formed in the same manner as the image display device1described above with reference toFIG. 11except that the image display device21has a different constitution relating to control of the switch transistor Tr3.

Specifically, in this image display device21(FIG. 1), a signal line driving circuit23generates a gradation setting voltage Vsig for each pixel circuit25by a data scan circuit23A, and sequentially outputs the gradation setting voltages Vsig to a signal line DTL with a fixed voltage Vofs for threshold voltage correction interposed between the gradation setting voltages Vsig. A scanning line driving circuit24outputs a writing signal WS, a driving signal DS, and a cutoff signal CutOFF from a write scan circuit24A, a drive scan circuit24B, and a cutoff scan circuit24C, respectively.

As shown inFIGS. 4A to 4H, in the image display device21, the switch transistor Tr3is set in an off state during a non-emission period by the cutoff signal CutOFF. Thereby a reverse bias applied to the organic EL element8is avoided effectively (FIG. 4E).

Specifically, in the pixel circuit25, during an emission period, as shown inFIG. 5, a writing transistor Tr1and the switch transistor Tr3are set in an off state and an on state, respectively, and a power supply voltage Vcc is supplied to the driving transistor Tr2(FIGS. 4A to 4E). The pixel circuit25thereby drives the organic EL element8by a driving current Ids corresponding to a voltage across a storage capacitor Cs.

In the pixel circuit25, at time t0at which the emission period ends, as shown inFIG. 6, the drain voltage of the driving transistor Tr2is lowered to a fixed potential VSS, and the switch transistor Tr3is set in an off state. Thereby, in the pixel circuit25, an accumulated charge of a terminal on the organic EL element8side of the storage capacitor Cs flows out to a scanning line via the driving transistor Tr2, and thus the gate voltage Vg and the source voltage Vs of the driving transistor Tr2are lowered (FIGS. 4G and 4H). At this time, because the switch transistor Tr3is set in the off state, an accumulated charge of a stray capacitance Cel of the organic EL element8is discharged via the organic EL element8, and the discharge lowers a voltage across the organic EL element8to the threshold voltage Vth EL of the organic EL element8. As a result, the anode voltage VA of the organic EL element8is maintained at a voltage obtained by adding the threshold voltage Vth EL to a cathode voltage (FIG. 4F).

In the pixel circuit25, the writing transistor Tr1is set in an on state by the writing signal WS during a period during which the signal line DTL is next maintained at the fixed voltage Vofs for threshold voltage correction. Thereby, in the pixel circuit25, the voltage across the storage capacitor Cs is set to a voltage more than the threshold voltage Vth of the driving transistor Tr2.

In the pixel circuit25, the drain voltage of the driving transistor Tr2is raised to the power supply voltage Vcc, and the writing transistor Tr1is set in an on state during periods during which the signal line DTL is maintained at the fixed voltage Vofs for threshold voltage correction. Thereby, as shown inFIG. 7, in the pixel circuit25, the voltage across the storage capacitor Cs is set to the threshold voltage Vth of the driving transistor Tr2over a plurality of divided periods.

In the pixel circuit25, the writing transistor Tr1is set in an on state at time t2at which the signal line DTL is next maintained at the gradation setting voltage Vsig of the pixel circuit25. Thereby a terminal voltage of the storage capacitor Cs is set to the gradation setting voltage Vsig. After the passage of a certain time, the writing transistor Tr1is set in an off state. Thereby, variation in mobility is corrected, and the gradation setting voltage Vsig is sampled and held in the storage capacitor Cs.

As a result, as shown inFIG. 8, the pixel circuit25makes the organic EL element8emit light by a driving current Ids corresponding to the voltage across the storage capacitor Cs.

FIG. 9is a plan view of a layout of the pixel circuit25.FIG. 9is a plan view of a substrate side as viewed with members in upper layers from the anode electrode of the organic EL element8removed. InFIG. 9, a wiring pattern of each layer is shown by a difference in hatching. A circular mark represents a contact between layers. The inside of the circular mark is provided with a hatching assigned to a wiring pattern to which the contact is connected to indicate interlayer connection relation.

In the pixel circuit25, after a wiring pattern material layer is deposited on an insulating substrate formed of glass, for example, the wiring pattern material layer is subjected to an etching process to create first wiring. In the pixel circuit25, a gate oxide film is next created, and thereafter an intermediate wiring layer formed by a polysilicon film is created. In the pixel circuit25, a channel protective layer and the like are next created, and thereafter transistors Tr1to Tr3are created by impurity doping.

In the pixel circuit25, after a wiring pattern material layer is next deposited, the wiring pattern material layer is subjected to an etching process to create second wiring. In the pixel circuit25, a scanning line DSL for power supply and a scanning line WSL for a writing signal are created by the second wiring. The scanning line DSL for power supply is created with a wider width than that of the scanning line WSL for a writing signal. In the pixel circuit25, a signal line DTL is created by the second wiring as much as possible. Specifically, in the pixel circuit25, only a part of the signal line DTL which part crosses the scanning lines DSL and WSL is created by the first wiring, and the other part of the signal line DTL is created by the second wiring. Consequently, the signal line DTL is provided with contacts for connecting the first wiring and the second wiring with the part crossing the scanning lines DSL and WSL interposed therebetween.

(2) Operation of Embodiment

With the above constitution of the image display device21, in the signal line driving circuit23, sequentially input image data D1is distributed to signal lines DTL, and then subjected to a digital-to-analog conversion process. Thereby, in the image display device21, a gradation voltage Vin indicating a gradation of each pixel connected to a signal line DTL is created for each signal line DTL. In the image display device21, the gradation voltage Vin is set in each pixel circuit25forming a display section22on a line-sequential basis, for example, by the driving of the display section by the scanning line driving circuit24. In each pixel circuit25, the organic EL element8emits light at a light emission luminance corresponding to the gradation voltage Vin (FIG. 1). The image display device21can thereby display an image corresponding to the image data D1on the display section22.

More specifically, in the pixel circuit5, the organic EL element8is current-driven by the driving transistor Tr2of a source follower circuit configuration. In the pixel circuit25, the voltage of the gate side terminal of the storage capacitor Cs provided between the gate and the source of the driving transistor Tr2is set to a voltage Vsig corresponding to the gradation voltage Vin. The image display device21thereby makes the organic EL element8emit light at a light emission luminance corresponding to the image data D1to display a desired image.

However, the driving transistor Tr2applied to the pixel circuit25has a disadvantage of large variation in threshold voltage Vth. Consequently, in the image display device21, when the voltage of the gate side terminal of the storage capacitor Cs is simply set to the voltage Vsig corresponding to the gradation voltage Vin, a variation in threshold voltage Vth of the driving transistor Tr2causes a variation in light emission luminance of the organic EL element8, thus degrading image quality.

Accordingly, in the image display device21, after the voltage on the organic EL element8side of the storage capacitor Cs is lowered in advance, the gate voltage of the driving transistor Tr2is set to a fixed voltage Vofs for threshold voltage correction via the writing transistor Tr1(FIG. 2). Thereby, in the image display device21, the voltage across the storage capacitor Cs is set larger than the threshold voltage Vth of the driving transistor Tr2. Thereafter the voltage across the storage capacitor Cs is discharged via the driving transistor Tr2. As a result of the series of processes, in the image display device21, the voltage across the storage capacitor Cs is set to the threshold voltage Vth of the driving transistor Tr2in advance.

Thereafter, in the image display device21, a gradation setting voltage Vsig obtained by adding the fixed voltage Vofs to the gradation voltage Vin is set as the gate voltage of the driving transistor Tr2. The image display device21can thereby prevent degradation in image quality due to variations in the threshold voltage Vth of the driving transistor Tr2.

In addition, by maintaining the gate voltage of the driving transistor Tr2at the gradation setting voltage Vsig in a state of power being supplied to the driving transistor Tr2for a certain time, degradation in image quality due to variations in mobility of the driving transistor Tr2can be prevented.

However, increase in resolution or the like may make it difficult to assign a sufficient time to the discharging of the voltage across the storage capacitor Cs via the driving transistor Tr2. In this case, the image display device cannot set the voltage across the storage capacitor Cs to the threshold voltage Vth of the driving transistor Tr2with sufficiently high accuracy. As a result, a variation in threshold voltage Vth of the driving transistor Tr2cannot be corrected sufficiently.

Accordingly, in the present embodiment, the voltage across the storage capacitor Cs is discharged via the driving transistor Tr2in a plurality of periods. Thereby, a sufficient time is assigned to the discharge of the voltage across the storage capacitor Cs via the driving transistor Tr2, and thus a variation in mobility of the driving transistor Tr2is corrected sufficiently even when resolution is increased.

However, when a variation in threshold voltage of the driving transistor Tr2is thus corrected, the organic EL element8is reverse-biased, and there is a fear of destruction of the organic EL element8.

Accordingly, in the present embodiment, the switch transistor Tr3is provided between the organic EL element8and the driving transistor Tr2. The switch transistor Tr3is set in an off state during non-emission periods. The image display device21can thereby perform the series of processes for correcting a variation in threshold voltage of the driving transistor Tr2with the driving transistor Tr2and the organic EL element8disconnected from each other. Thus, a variation in threshold voltage of the driving transistor can be corrected while the reverse biasing of the organic EL element8is effectively avoided.

(3) Effects of Embodiment

According to the above constitution, a switch transistor is disposed between a driving transistor and a light emitting element, and the switch transistor is set in an off state during non-emission periods. It is thereby possible to correct a variation in threshold voltage of the driving transistor while effectively avoiding destruction of the organic EL element due to a reverse bias.

Second Embodiment

It is to be noted that in the foregoing embodiment, description has been made of a case where the embodiment of the present invention is applied to an image display device in which a pixel circuit is formed with two transistors. However, the present invention is not limited to this, but is widely applicable to for example a constitution where the process of correcting a variation in threshold voltage is started after a voltage on the organic EL element side of a storage capacitor is lowered by a dedicated circuit configuration.

In addition, in the foregoing embodiment, description has been made of a case where the voltage across the storage capacitor is discharged via the driving transistor in a plurality of periods. However, the present invention is not limited to this, but is widely applicable to cases where the discharging process is performed in one period.

Further, in the foregoing embodiment, description has been made of a case where an n-channel type transistor is applied to the driving transistor. However, the embodiment of the present invention is not limited to this, but is widely applicable to image display devices and the like in which a p-channel type transistor is applied to the driving transistor.

Further, in the foregoing embodiment, description has been made of a case where the embodiment of present invention is applied to an image display device using an organic EL element. However, the present invention is not limited to this, but is widely applicable to image display devices using various self-luminous elements of a current-driven type.

The embodiment of the present invention relates to an image display device, and is applicable to an active matrix type image display device using an organic EL element, for example.

The present application contains subject matter related to that disclosed in Japanese Priority Patent Application JP 2008-144061, filed in the Japan Patent Office on Jun. 2, 2008, the entire content of which is hereby incorporated by reference.