Amplifying circuit and associated receiver

An amplifying circuit includes a first gain adjusting circuit, a second gain adjusting circuit, a load circuit and a switch module. When the amplifying circuit operates in a first mode, the first gain adjusting circuit receives a first input signal, and generates a first output signal to a second output terminal of the amplifying circuit via the load circuit and the switch module; and when the amplifying circuit operates in a second mode, the second gain adjusting circuit receives a second input signal, and generates a second output signal to a first output terminal of the amplifying circuit via the load circuit and the switch module.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to an amplifying circuit, and more particularly, to an amplifying circuit comprising a plurality of transmission paths with a shared loading.

2. Description of the Prior Art

In a conventional amplifying circuit comprising a plurality of transmission paths, gain adjusting circuits (e.g. an amplifier) on the transmission paths might output signals with different polarities, i.e. apart of the gain adjusting circuits outputs signals whose polarity is same as the input, and the other part of the gain adjusting circuits outputs signals whose polarity is different from the input. This difference in polarity of the input and output might occur when the path is switched which causes a heavy burden for the following circuits.

On the other hand, when the abovementioned transmission paths share a loading, these paths connect to the same terminal of the loading which limits the layout of the circuits.

SUMMARY OF THE INVENTION

One of the objectives of the present invention is therefore to provide an amplifying circuit comprising a plurality of transmission paths with a shared path to make sure the polarity of the output signals stays the same when the path is switched, and make the layout for other circuits flexible, to solve the aforementioned problems.

According to an embodiment of the present invention, an amplifying circuit is disclosed, wherein the amplifying circuit comprises: a first output terminal and a second output terminal; a first gain adjusting circuit; a second gain adjusting circuit; a loading circuit; and a switching circuit coupled to the first gain adjusting circuit, the second gain adjusting circuit, the loading circuit, the first output terminal and the second output terminal of the amplifying circuit. When the amplifying circuit operates in a first operating mode, the first gain adjusting circuit receives a first input signal, and transmits a first output signal to the second output terminal of the amplifying circuit via the switching circuit and the loading circuit, wherein the first output signal is not transmitted to the first output terminal at this point. When the amplifying circuit operates in a second operating mode, the second gain adjusting circuit receives a second input signal, and transmits a second output signal to the first output terminal via the switching circuit and the loading circuit, wherein the second output signal is not transmitted to the second output terminal at this point.

According to an embodiment of the present invention, a receiver is disclosed, comprising: a matching circuit; a low noise amplifier; and a transformer. The low noise amplifier comprises: a first output terminal and a second output terminal; a first gain adjusting circuit; a second gain adjusting circuit; a loading circuit; and a switching circuit coupled to the first gain adjusting circuit, the second gain adjusting circuit, the loading circuit, the first output terminal and the second output terminal of the amplifying circuit. When the low noise amplifier operates in a first operating mode, the first gain adjusting circuit receives a first input signal from an antenna via the matching circuit, and transmits a first output signal to the second output terminal of the low noise amplifier via the switching circuit and the loading circuit, wherein the first output signal is not transmitted to the first output terminal. When the low noise amplifier operates in a second operating mode, the second gain adjusting circuit receives a second input signal from the antenna via the matching circuit, and transmits a second output signal to the first output terminal of the low noise amplifier via the switching circuit and the loading circuit, wherein the second output signal is not transmitted to the second output terminal. In addition, one of two terminals of a side coil of the transformer connects to the first output terminal of the low noise amplifier, and the other connects to the second output terminal of the low noise amplifier.

DETAILED DESCRIPTION

FIG. 1is a diagram illustrating an amplifying circuit100according to an embodiment of the present invention. As shown inFIG. 1, the amplifying circuit100comprises gain adjusting circuits110and120, a loading circuit130, a control signal generating circuit140and a switching circuit, wherein the switching circuit comprises switches SW1-SW4. In this embodiment, the amplifying circuit100comprises two transmission paths, i.e. the gain adjusting circuits110and120shown inFIG. 1. In addition, the amplifying circuit100is arranged to receive an input signal Vin for generating an output signal to one of the output terminals NF1and NF2, and the following signal processing circuits process the output signal according to the voltage difference between the output terminal NF1and NF2.

In this embodiment, the gain adjusting circuits110and120have different polarity/phase, and can be an amplifier implemented by transistors, or implemented by passive circuits. In the embodiment ofFIG. 2, the gain adjusting circuit110is a capacitor, and the gain adjusting circuit120is s source follower, wherein the polarity/phase of the input and the output of the capacitor are identical, and the polarity/phase of the input and the output of the source follower are different. It should be noted thatFIG. 2is for illustrative purposes, and not a limitation of the present invention.

In the embodiment ofFIG. 1, the loading circuit130comprises terminals N1and N2, wherein the switch SW1selectively connects the output signal generated by the gain adjusting circuit110to the terminal N1of the loading circuit130, the switch SW2selectively connects the terminal N1of the loading circuit130to the output terminal NF1of the amplifying circuit100, the switch SW3selectively connects the terminal N2of the loading circuit130to the output terminal NF2of the amplifying circuit100, and the switch SW4selectively connects the output signal generated by the gain adjusting circuit120to the terminal N2of the loading circuit130. It should be noted that the composition of the loading circuit130shown inFIG. 1is only for illustrative purposes. In other embodiments, the loading circuit130can be a resistor, a capacitor, or a resistor and capacitor connected in parallel.

In this embodiment, the output terminals NF1and NF2can selectively connect to any suitable low resistance point and receive a suitable direct current (DC) voltage, e.g. a supply voltage VDD.

For clarity, the following operation of the amplifying circuit100takes the embodiment ofFIG. 2as example. In the operation of the amplifying circuit100, when the amplifying circuit100needs to operate in a first operating mode, the control signal generating circuit140generates control signals Vc1-Vc4according to a received mode signal V_mode, wherein the control signals Vc1and Vc3are arranged to activate the switches SW1and SW3, respectively, and the control signals Vc2and Vc4are arranged to deactivate the switches SW2and SW4, respectively. At this point, the gain adjusting circuit110receives an input signal Vin, and transmits the output signal to the output terminal NF2via the switch SW1, the loading circuit130and the switch SW3; meanwhile, the gain adjusting circuit120does not connect to the loading circuit130and the output terminals NF1and NF2due to the switches SW2and SW4being deactivated, and the output terminal NF1does not receive any output signal from the gain adjusting circuits110and120. Moreover, in this embodiment, the first operating mode is a mode with a low gain or a negative gain.

When the amplifying circuit100needs to operate in a second operating mode, the control signal generating circuit140generates the control signals Vc1-Vc4according to the received mode signal V_mode, wherein the control signals Vc2and Vc4are arranged to activate the switches SW2and SW4, respectively, and the control signals Vc1and Vc3are arranged to deactivate the switches SW1and SW3, respectively. At this point, the gain adjusting circuit120receives the input signal Vin, and transmits the output single to the output terminal NF2via the switch SW2, the loading circuit130and the switch SW4; meanwhile, the gain adjusting circuit110does not connect to the loading circuit130and the output terminals NF1and NF2due to the switches SW1and SW3being deactivated, and the output terminal NF1does not receive any output signal from the gain adjusting circuits110and120.

In the abovementioned embodiments, when the amplifying circuit100operates in the first operating mode, the polarity/phase of the output signal generated via the switch SW1, the loading circuit130and the switch SW3and output to the output terminal NF2is identical to the polarity/phase of the input signal because the gain adjusting circuit110is a capacitor; when the amplifying circuit100operates in the second operating mode, the polarity/phase of the output signal generated via the switch SW4, the loading circuit130and the switch SW2and output to the output terminal NF1is identical to the polarity/phase of the input signal because the gain adjusting circuit120is a source follower. If the following signal processing circuits process signals according to the voltage difference between the output terminals NF1and NF2, the signal processing circuits can receive the signals with identical polarity no matter whether the amplifying circuit110operates in the first operating mode or the second operating mode. The failure of the processing signal can therefore be avoided.

Because the gain adjusting circuits110and120are connected to the terminals N1and N2of the loading circuit130, respectively, the layout of the circuits can be more flexible which can lower the burden for the designer.

In this embodiment, the amplifying circuit100can be applied to a receiver. More specifically, refer toFIG. 3which is a diagram illustrating a receiver300according to an embodiment of the present invention, wherein the receiver300comprises a matching circuit310, a low noise amplifier320, a transformer330and a signal processing circuit340. In the operation of the receiver300, the matching circuit310processes the signals from an antenna302to generate the input signal Vin; the low noise amplifier320can be implemented by the amplifying circuit100shown inFIG. 1which is arranged to receive the input signal Vin and generate output signals to one of the output terminals NF1and NF2; the transformers330comprise two non-electrically connected coils, wherein two terminals of a coil connect to the output terminals NF1and NF2of the low noise amplifier320respectively, and two terminals of the other coil generate voltage signals to the signal processing circuit340; the signal processing circuit340processes the received signals. As mentioned above, the polarity/phase of the signals received by the signal processing circuit340will not be affected when the operating mode of the low noise amplifier320is switched. The failure of the processing signal can thereby be avoided.

The gain adjusting circuits110and120of the amplifying circuit100shown inFIG. 1receive the same input signal Vin. In other embodiments, however, the gain adjusting circuit110and120can receive the input signal from different sources.FIG. 4is a diagram illustrating an amplifying circuit400according to another embodiment of the present invention. As shown inFIG. 4, the amplifying circuit400comprises gain adjusting circuits410and420, a loading circuit430, a control signal generating circuit440and a switching circuit, wherein the switching circuit comprises switches SW1-SW4. In this embodiment, the amplifying circuit400has two transmission paths, i.e. the gain adjusting circuits410and420shown inFIG. 4.

The operation of the amplifying circuit400is similar to the operation of the amplifying circuit100; the only difference is, when the amplifying circuit400operates in the first operating mode, the gain adjusting circuit410receives the input signal Vin, and transmits the output signal to the output terminal NF2via the switch SW1, the loading circuit430and the switch SW3, and the output terminal NF1does not receives the output signals from the gain adjusting circuits410and420. When the amplifying circuit400operates in the second operating mode, the gain adjusting circuit420receives an input signal Vin2, and transmits the output signal to the output terminal NF1via the switch SW4, the loading circuit430and the switch SW2, and the output terminal NF2does not receive the output signal from the gain adjusting circuit410and420. Those skilled in the art should readily understand the operation of the amplifying circuit400after reading the embodiment ofFIG. 1; the detailed description is therefore omitted here.

Briefly summarized, in the amplifying circuit with two gain adjusting circuits (i.e. two transmission paths) proposed by the present invention, in the case that the polarity of the output signals of the gain adjusting circuits are different, the output signals of the gain adjusting circuits can be transmitted to different output terminals with the help of the switching circuit to make sure the polarity of the output signal of the amplifying circuit will not change in response to the switch of the gain adjusting circuit, thereby avoiding failure of the processing signal. In addition, the gain adjusting circuits are connected to different terminals of the loading circuit, meaning the layout of the circuits can be more flexible.