Automated power supply sense line selection

An embodiment includes a circuit block configured to distribute a power signal to a plurality of voltage sense signals, and a voltage regulator configured to generate a regulated voltage level on the power signal. The embodiment also includes a sensing circuit configured to perform a sequence of comparisons of respective voltage levels of the plurality of voltage sense signals using a selection criterion. To perform the sequence of comparisons, the sensing circuit may be configured to select either a first voltage sense signal or a second voltage sense signal to generate a first output voltage sense signal. The sensing circuit may also be configured to select either a third voltage sense signal or a previously generated output voltage sense signal to generate a feedback signal. The voltage regulator circuit may be further configured to modify the regulated voltage level using the feedback signal.

BACKGROUND

Technical Field

The embodiments disclosed herein generally relate to power management and, more particularly, to the implementation of voltage sensing circuits.

Description of the Related Art

Many electronic circuits utilize voltage regulation systems to provide power signals to circuits at one or more voltage levels. These voltage regulation systems may receive a global power signal with a first voltage level and generate a local power signal with a second voltage level. Circuits receiving power from the local power signal may alternate between time periods of high power consumption and low power consumption. In some circuits, changing between high and low periods of power consumption may cause the voltage level of the local power signal to deviate from the desired second voltage level.

Some voltage regulation systems include a feedback signal that allows the system to monitor a voltage level of a power signal within a circuit that receives the local power signal. Using this feedback signal, the voltage regulation system may make adjustments to the voltage level of the local power signal. These adjustments may compensate for voltage level deviations due to the circuit switching between the low and high periods of power consumption, allowing the voltage regulating system to maintain the voltage level of the local power signal at or near the desired second voltage level.

SUMMARY

Various embodiments of a system for a power delivery system are presented herein. One embodiment includes a circuit block configured to distribute a power signal to a plurality of voltage sense signals, and a voltage regulator configured to generate a regulated voltage level on the power signal. The embodiment also includes a sensing circuit configured to perform a sequence of comparisons of respective voltage levels of the plurality of voltage sense signals using a selection criterion. To perform the sequence of comparisons, the sensing circuit may be configured to select either a first voltage sense signal or a second voltage sense signal to generate a first output voltage sense signal. The sensing circuit may also be configured to select either a third voltage sense signal or a previously generated output voltage sense signal to generate a feedback signal. The voltage regulator circuit may be further configured to modify the regulated voltage level using the feedback signal.

In another embodiment, a method includes generating, by a voltage regulator circuit, a regulated voltage level on a power supply signal coupled to a plurality of voltage sense signals in a circuit block, and performing, by a sensing circuit, a sequence of comparisons of respective voltage levels of the plurality of voltage sense signals using a selection criterion. Performing the sequence of comparisons may comprise selecting, using a selection criterion, one of either a first voltage sense signal or a second voltage sense signal of the plurality of voltage sense signals to generate a first output voltage sense signal. Performing the sequence of comparisons may also comprise selecting one of either a last voltage sense signal of the plurality of voltage sense signals or a previously generated output voltage sense signal to generate a feedback signal, and then modifying, by the voltage regulator circuit, the regulated voltage level using the feedback signal.

An embodiment of an apparatus comprises a series of sensing stages. A first sensing stage of the series may be configured to receive a first voltage sense signal and a second voltage sense signal, and to generate a first logic signal based on respective voltage levels of the first voltage sense signal and the second voltage sense signal. The first sensing stage may also be configured to select, based on the first logic signal, one of either the first voltage sense signal or the second voltage sense signal to generate a first output voltage sense signal. A second sensing stage of the series may be configured to receive a previously generated output voltage sense signal and a third voltage sense signal, and to generate a second logic signal based on respective voltage levels of the previously generated output voltage sense signal and the third voltage sense signal. The second sensing stage may be further configured to select, based on the second logic signal, one of either the previously generated output voltage sense signal or the third voltage sense signal to generate a feedback signal.

DETAILED DESCRIPTION OF EMBODIMENTS

A voltage regulating system may generate a power signal that is used by many circuits included in a system. Each circuit may draw various amounts of current from the power signal at various times during operation. During times of high current draw, a voltage level drop (also referred to herein as “voltage droop”) may occur on the power signal. Such voltage droop, if large enough, may cause performance issues for the circuit that draws the current, as the circuit may rely on a minimum voltage level for proper operation.

A voltage regulator that generates the power signal in the voltage regulating system may include a feedback signal that allows the voltage regulator to compensate for the voltage droop by increasing a voltage level of the power signal. In some embodiments, it may be desirable to receive feedback from multiple power nodes within the system. For example, in a multi-core processor, it may be desired to receive feedback from a power node at each core or a subset of cores. Voltage levels of power signals at each of these nodes may fluctuate as the associated core, or subset of cores, enters and exits periods of high activity. To provide a minimum operating voltage level to each of the cores, identifying a lowest voltage level of the multiple power signals is desired. In other embodiments, identifying a highest voltage level of the power signals may be desired in place of, or in addition to, identifying the lowest voltage level. Embodiments disclosed below may refer to a worst case voltage level or power signal. As used herein, “worst case” refers to a voltage level of a power signal, from the power signals that are monitored, that may have a greatest impact to the voltage regulation system at a given point in time. It is noted that any particular characteristic of a power signal may be considered worst case for a given application or under particular operating conditions.

Various embodiments of systems and methods to identify and select a worst case power signal from a plurality of monitored power signals are discussed in this disclosure. The embodiments illustrated in the drawings and described below may provide techniques for identifying a power signal with a worst case voltage level, and then coupling the identified power signal to a feedback input of a voltage regulation system.

A block diagram illustrating an embodiment of power delivery system is illustrated inFIG. 1. Power delivery system100includes voltage regulator101, coupled to circuit block102via power supply signal111. Circuit block102is further coupled to sensing circuit103via voltage sense signals112a-112n(referred to collectively as voltage sense signals112). Sensing circuit103is further coupled to voltage regulator101via feedback signal113.

In the illustrated embodiment, voltage regulator101receives power supply signal Vsupply110as an input and generates power supply signal111with a regulated voltage level that is at or near a target voltage level. In various embodiments, voltage regulator101may include a buck regulator circuit, a boost regulator circuit, a switching capacitor regulator circuit, or any suitable circuit that may be used to generate a regulated power supply signal. Voltage regulator101compares a voltage level of feedback signal113to an expected voltage level, and may adjust the regulated voltage level of power supply signal111if the level of feedback signal113deviates from the expected level. For example, voltage regulator101may compare the voltage level of feedback signal113to the voltage level of power supply signal111. If the level of feedback signal113is less than the level of power supply signal111, then voltage regulator101increases the voltage level of power supply signal111based on a difference between the two voltage levels. In some embodiments, if the voltage level of feedback signal113is higher than the voltage level of power supply signal111, then voltage regulator101may similarly decrease the regulated voltage level of power supply signal111accordingly. In other embodiments, voltage regulator101may compare the level of feedback signal113to a different reference voltage than power supply signal111.

It is noted that some embodiments of a voltage regulator circuit may not generate a power signal with a consistent regulated voltage level. Some regulation schemes may result in a power signal with a varying voltage level that swings above and below the target voltage level. Such output variations may be referred to as “voltage ripple.” A voltage regulator circuit may be considered to be generating the power signal at the target voltage level when the voltage swings above and below the target voltage level deviate by less than a threshold amount.

Circuit block102, in the illustrated embodiment, receives power supply signal111from voltage regulator101for use as a power supply. In various embodiments, circuit block102may correspond to any suitable type of electrical circuit, such as, for example, various circuits comprising a computing system, a multi-core processor, a networking processor, a graphics processor, a plurality of amplifier circuits, one or more memory circuits, or any suitable combination thereof. Circuit block102may include circuits implemented on multiple circuit boards, circuits included on a single integrated circuit (IC), or a combination of the two. In various embodiments, any combination of voltage regulator101, circuit block102, and sensing circuit103may be included on a single IC.

Circuit block102, in the illustrated embodiment, distributes power from power supply signal111to various sub-circuits included in circuit block102. Some sub-circuits may include a power switch that allows the sub-circuit to be decoupled from power supply signal111when the sub-circuit is not in use. In addition, some sub-circuits may include one or more circuit elements coupled between the sub-circuit and power supply signal111. In these cases, impedance between a particular sub-circuit and power supply signal111may be present, resulting in a local power supply signal for the particular sub-circuit. This impedance may result in a voltage droop in the local power supply signal as compared to power supply signal111. To detect such localized voltage droops, circuit block102includes voltage sense signal112a-112n. Voltage sense signals112a-112nare coupled to respective local power supply signals within circuit block102. While three voltage sense signals are illustrated inFIG. 1, any suitable number may be utilized in other embodiments.

Sensing circuit103receives voltage sense signals112. In the illustrated embodiment, sensing circuit103performs a sequence of voltage level comparisons by comparing two of voltage sense signals112(e.g.112aand112b), and then selecting one based on one or more selection criteria. As used herein, “selection criteria” or a “section criterion” refers to any characteristic of the sense signals that may be compared. For example, in the illustrated embodiment, the selection criterion may correspond to a voltage level of the compared signals, and a voltage sense signal112with a worst case voltage level may be selected as an output voltage sense signal. In various embodiments, the selection criterion may correspond to a lowest voltage level, a highest voltage level, a noisiest voltage level, or the like. After selecting one of the two compared voltage sense signals112, sensing circuit103compares the selected voltage sense signal112to a third voltage sense signal112c(not shown). Again, the voltage sense signal with the worst case voltage level is selected as an output signal. Sensing circuit103may repeat comparisons between a currently selected voltage sense signal112to a yet to be compared voltage sense signal112until all voltage sense signals112have been compared. Sensing circuit103selects the worst case voltage sense signal112to use as feedback signal113.

Voltage regulator101then uses feedback signal113, as described above, to modify, if necessary, the voltage level of power supply signal111. By using the voltage sense signal112with the worst case voltage level, voltage regulator101may be designed with a target voltage level that is closer to a desired voltage level. For example, to conserve power, it may be desirable to use a target voltage level that is close to a minimum operational voltage level. If an average voltage level of voltage sense signals112were used, rather than the worst case (lowest in this example), then the target voltage level may have to be set to a higher voltage level to provide an adequate guard band or suitable operating margin for circuits operating near the lowest voltage level to help avoid having the voltage level of these circuits falling below the minimal operating voltage level. By selecting the voltage sense signal112with the lowest voltage level, voltage regulator101makes adjustments to the voltage level of power supply signal111based on the lowest monitored voltage level, rather than the higher average voltage level in which the lowest voltage level may be unknown.

It is noted thatFIG. 1is merely an example. The illustrated embodiment only includes components necessary to demonstrate the disclosed concepts. In other embodiments, additional components may be included. Although three voltage sense signals are shown, any suitable number of voltage sense signals may be utilized.

Details of a voltage sensing system, that corresponds to, for example, sensing circuit103inFIG. 1, are disclosed inFIG. 2. Voltage sensing system200includes a series of sensing stages204a-204n, referred to collectively as sensing stages204. Each sensing stage204receives two voltage sense signals from a plurality of voltage sense signals212a-212n, as inputs. Each sensing stage204selects one of the two as an output voltage sense signal that is used as in input by a next sensing stage204in the series. The output voltage sense signal from the last stage in the series, sensing stage204n, is used as feedback signal214. In some embodiments, voltage sense signals212may correspond to voltage sense signals112, and feedback signal213may correspond to feedback signal113, fromFIG. 1.

Sensing stages204select a respective output voltage sense signal from the two input voltage sense signals using at least one selection criterion. For example, sensing stage204areceives voltage sense signal212aand voltage sense signal212b. If the selection criterion corresponds to a lowest voltage level, then sensing stage204aselects either voltage sense signal212aor voltage sense signal212bbases on which signal has a lower voltage level at the time of the selection. The selected voltage sense signal is passed on to the next stage (sensing stage204b) as output voltage sense signal214a. Sensing stage204bcompares the received output voltage sense signal214ato another voltage sense signal (voltage sense signal212c) and selects the signal with the lower voltage level as output voltage sense signal214b. The process continues until the last stage (sensing stage204n) receives the previously selected signal (output voltage sense signal214n-1) and compares to a last sense signal (voltage sense signal212n+1) and selects the one with the lower voltage level as feedback signal213.

Any suitable number of sensing stages204may be utilized. ‘N’ number of stages may be used to compare and select from ‘N+1’ number of voltage sense signals212, where N corresponds to a positive integer. Although lowest voltage level is used as the selection criterion in the example, other criterion may be used in other embodiments, such as, for example, highest voltage level, lowest or largest voltage swings, lowest or highest average voltage level over a time period, and the like.

It is noted that the embodiment ofFIG. 2is merely an example and circuit blocks are limited to emphasize the functionality of a voltage sensing system. In other embodiments, additional and/or different circuit blocks may be included.

Moving toFIG. 3, a circuit diagram of a voltage sensing stage, such as, for example, one of sensing stages204inFIG. 2, is depicted. Voltage sensing stage300includes comparator circuit301coupled to multiplexor circuit (MUX)302. Comparator301is further coupled to resistors R321through R324and capacitors C325and C326. Voltage sensing stage300receives voltage sense signals312aand312b, and generates output voltage sense signal314.

In the illustrated embodiment, voltage sensing stage300may correspond to any one of sensing stages204inFIG. 2. Accordingly, voltage sense signals312aand312bmay correspond to any pair of voltage sense signals used as inputs to a respective sensing stage204. Comparator301compares two voltage levels that correspond to voltage sense signals312aand312band generates a logic output signal, mux select315, based on a selection criterion of the comparison. Mux select315is coupled to a control input of MUX302and a logic state of mux select315determines if voltage sense signal312aor voltage sense signal312bis selected as the output of MUX302. For example, in one embodiment, comparator301may generate a logic high output on mux select315when a voltage level of the ‘+’ input is greater than a voltage level of the ‘−’ input. If the selection criterion corresponds to a lowest voltage level, then this logic high on mux select315may cause MUX302to generate output voltage sense signal314based on voltage sense signal312b. If, in contrast, the selection criterion corresponds to a highest voltage level, then the inputs to MUX302may be swapped such that MUX302generates output voltage sense signal314based on voltage sense signal312awhen the voltage level of the ‘+’ input is greater than the voltage level of the ‘−’ input.

A resistor divider network is created in the illustrated embodiment by R321and R322that scales down a voltage level of voltage sense signal312a. A similar resistor divider network including R323and R324scales a voltage level of voltage sense signal312b. The voltage levels of these voltage sense signals may be scaled down in order to produce voltage levels that are in a mid-point of an input voltage range of comparator301. By scaling these input voltage levels down below a voltage level of a regulated power supply signal coupled to voltage sense signals312aand312b, the design of comparator301may be simplified, thereby reducing a component count and allowing more voltage sensing stages to be included in a power delivery system such as, e.g., power delivery system100inFIG. 1. To avoid scaling one of voltage sense signals312more than the other, R321and R323may have similar designs to produce match amounts of resistance. R322and R324may also have similar designs for this reason.

Capacitor C325, in combination with resistor R321, forms a low-pass filter for voltage sense signal312ain the illustrated embodiment. This low-pass filter may attenuate one or more frequency components present in voltage sense signal312a. Capacitor C326, in combination with R323, performs a similar function for voltage sense signal312b. As disclosed above, a voltage regulator circuit may produce a power supply signal with a voltage level that oscillates above and below the target voltage level. This oscillation may have a particular frequency that is dependent on a design of the regulator circuit. By including the low-pass filter, these voltage level oscillations may be attenuated such that their impact to a voltage level comparison made by comparator301is reduced. In addition, in a closed-loop voltage regulation system in which the regulated voltage level of the power supply signal is modified based on a feedback signal, if an increase in the regulated voltage level reaches the feedback signal too quickly, then the voltage regulator may detect the sudden rise in the level of the feedback signal and attempt to compensate by reducing the voltage level, which is then detected and the process repeats, potentially creating an oscillation in the power supply signal. The inclusion of the low-pass filters may, therefore, stabilize the voltage level of the power supply signal by filtering out short-term changes in the voltage sense signals due to the changes in the regulated voltage level. Furthermore, brief voltage level spikes that may be created by the operations of circuits such as those included in circuit block102ofFIG. 1, may also be attenuated, thereby allowing for a more accurate comparison between voltage sense signals312.

Comparator301may correspond to any suitable circuit capable of comparing voltage levels of two analog input signals and generating a logic output signal based on this comparison. In some embodiments, comparator301corresponds to a differential input operational amplifier (Op Amp) coupled to one or more logic gates. The Op Amp generates an analog output signal based on a difference between the two voltage sense signals312aand312b, for example, amplifying the difference. This analog output signal is sent to at least one logic gate to generate a logic output. Two or more logic gates, such as inverters, for example, may be arranged in series to generate mux select315with acceptable voltage levels to represent logic high and logic low states that enable MUX302to determine which voltage sense signal312to select.

MUX302may be implemented as any suitable multiplexing circuit. In addition, MUX302may be designed such that output voltage sense signal314is generated with voltage levels that match the selected voltage sense signal312as closely as possible. If there is a voltage difference between the voltage level of the selected voltage sense signal312and the voltage level of output voltage sense signal314, then a comparison between output voltage sense signal314and another voltage sense signal at a next voltage sensing stage may be distorted, and a voltage sense signal with the worst case voltage level may not be properly selected as a feedback signal.

The use of a comparator and a multiplexor in the sensing stages may, in some embodiments, provide for a more accurate feedback signal as compared to some other methods. For example, another embodiment may utilize an analog-to-digital converter circuit (ADC) and a digital-to-analog converter circuit (DAC). Such an embodiment may measure, using the ADC, a voltage level of each voltage sense signal, generating respective digital values that each represent a corresponding voltage level. A worst case digital value may be selected and used as an input to the DAC to generate a feedback signal that represents the worst case measured voltage level. Quantization error inherent in ADCs and DACs may, however, result in a feedback signal with a voltage level that differs somewhat from the corresponding voltage sense signal. Reducing effects of quantization error in such designs may result in large ADC and/or DAC circuit designs that use additional silicon area and consume additional power. The multiplexor circuits used in voltage sensing stage300ofFIG. 3may be designed to reduce error between the selected voltage sense signal and the feedback signal. In addition, the selected voltage sense signal, in the illustrated embodiment, is maintained as an analog signal through each voltage sensing stage, up to and including, generation of the feedback signal, thereby avoiding quantization error during the voltage sense signal selection process. The comparators and multiplexor circuits used in the illustrated embodiment, may, therefore, may produce a more accurate feedback signal while using less silicon area and less power, even when multiple sensing stages are utilized.

It is noted that the circuit ofFIG. 3is merely an example. In other embodiments, additional components may be included. For example, additional capacitors may be utilized top provide further signal noise filtering.

Moving toFIG. 4, an embodiment of a chart of showing signals associated with a power delivery system, such as power delivery system100inFIG. 1, is illustrated. Chart400shows three signals: voltage sense signals412a-412c, each with a different dashed line pattern. In addition, feedback signal413, which corresponds to a selected one of voltage sense signals412at a particular time, is shown as a bold line on top of corresponding segments of voltage sense signals412.

Voltage sense signals412, in the illustrated embodiment, may correspond to a subset of voltage sense signals112inFIG. 1. Therefore, these signals represent voltage levels of the respective voltage sense signal112corresponding to a local power supply signal in circuit block102. From time t0to t1, voltage sense signal412ahas the lowest voltage level of the three sense signals. Sensing circuit103, therefore, selects voltage sense412aas feedback signal413. In addition, the voltage level of voltage sense signal412ais rising and the voltage level of voltage sense signal412bis falling. At time t1, the levels of voltage sense signals412aand412bcross, and once the voltage level of voltage sense signal412bis determined to be less than that of voltage sense signal412a, sensing circuit103selects voltage sense signal412bas feedback signal413. At time t2, the voltage levels of voltage sense signals412band412ccross, and sensing circuit103then selects voltage sense signal412cas feedback signal413. At time t3, the voltage level of voltage sense signal412bcrosses back over the voltage level of voltage sense signal412c, and sensing circuit103again selects voltage sense signal412bas feedback signal413.

As can be seen in chart400, the voltage level of feedback signal413is indicative of the voltage level of the voltage sense signal412with the lowest voltage level. It is noted that, as used herein, phrases such as “selecting signal A as signal B” and “selecting signal A to generate signal B” are used interchangeably to indicate that a voltage level of signal B is substantially the same as a voltage level of signal A when signal A is selected.

It is noted that the chart400ofFIG. 4is merely an example. The signal waveforms shown in chart400have been simplified for clarity. In other embodiments, the signal waveforms may differ based on a technology used to implement the described circuits as well as based on current operating conditions such as, e.g., power supply voltage and operating temperature.

Proceeding toFIG. 5, a flow diagram of an embodiment of a method for selecting a voltage sense signal in a power delivery system, such as, for example, power delivery system100inFIG. 1, is depicted. Referring collectively toFIGS. 1 and 5, method500begins in block501.

A voltage regulator circuit generates a regulated voltage level on a power supply signal (block502). In the illustrated embodiment, a voltage regulator circuit, such as, for example, voltage regulator101, generates power supply signal111with a regulated voltage level. Power supply signal111is received by circuit block102where it is distributed to a plurality of sub-circuits via local power supply signals coupled to power supply signal111.

A voltage sensing system performs a sequence of voltage level comparisons on a plurality of voltage sense signals (block503). Voltage sense signals112a-112nare coupled to respective local power supply signals in circuit block102. Sensing circuit103, using a plurality of comparison stages, such as, for example, sensing stages204inFIG. 2, compares a first pair of voltage sense signals112(e.g.,112aand112b). A selected one of these signals is compared to a next voltage sense signal, such as voltage sense signal112c(not illustrated inFIG. 1), and so forth until all voltage sense signals112have been compared at least once to another voltage sense signals112.

Further operations of method500may depend on a result of a first comparison between a first and a second voltage sense signals (block504). Sensing circuit103compares voltage sense signals112aand112band selects one of the two signals based on a selection criterion. In the illustrated embodiment, voltage levels of voltage sense signals112aand112bare compared and the signal with a lower voltage level may be selected. In other embodiments, criteria other than lowest voltage level may be used, as is disclosed above. If voltage sense signal112ameets the criterion, then method500moves to block505for signal selection, and otherwise moves to block506to select a signal.

If the first voltage sense signal meets the criterion, then the first voltage sense signal is selected (block505). Voltage sense signal112a(i.e., the first voltage sense signal) may be selected by sensing stage204a, for example. Sensing stage204agenerates an output signal corresponding to voltage sense signal112aand sends it to a sensing stage204bto be compared to a next voltage sense signal.

If the second voltage sense signal meets the criterion, then the second voltage sense signal is selected (block506). Voltage sense signal112b(i.e., the second voltage sense signal) may be selected instead of voltage sense signal112aby sensing stage204a. Similar to the description above, sensing stage204agenerates an output signal corresponding to voltage sense signal112band sends it to a sensing stage204bto be compared to a next voltage sense signal.

Subsequent operations of the method may depend on a result of a comparison between a previously selected output voltage sense signal and a last voltage sense signal (block507). Referring toFIG. 2, a last stage, i.e., sensing stage204nin the illustrated embodiment, receives and compares voltage levels of output voltage sense signal214n-1and voltage sense signal212n+1. Sensing stage204nselects one of the two signals based on the selection criterion. It is noted that any number of sensing stages may be included between sensing stage204aand204n, including zero stages (i.e., sensing circuit103may include only two stages in some embodiments). Blocks504through506may be repeated for each stage between sensing stage204aand204nbefore operations of block507are performed. If output voltage sense signal214n-1meets the criterion, then the method moves to block508for signal selection, and otherwise moves to block509to select a signal for generating a feedback signal.

If the last voltage sense signal meets the criterion, then the last voltage sense signal is selected (block508). Sensing stage204ngenerates feedback signal213with a voltage level that corresponds to voltage sense signal212n+1 and sends this feedback signal to voltage regulator101.

If the previously selected output voltage sense signal meets the criterion, then the previously selected output voltage sense signal is selected (block509). If the output voltage sense signal214n-1has the lower voltage level during the comparison, then sensing stage204ngenerates feedback signal213with a voltage level that corresponds to output voltage sense signal214n-1. Sensing stage204nthen sends feedback signal213to voltage regulator101.

The voltage regulator modifies the regulated voltage level of the power supply signal, using the selected feedback signal (block510). In the illustrated embodiment, voltage regulator101receives feedback signal213(which also corresponds to feedback signal113), and compares a voltage level of feedback signal213to at least one reference voltage level. Based on this comparison, voltage regulator101may modify the voltage level of power supply signal111, by, for example, increasing the voltage level if the voltage level of feedback signal213is less than the reference voltage level. In some embodiments, voltage regulator101may lower a voltage level of power supply signal111if the voltage level of feedback signal213is greater than a second reference voltage level. The method ends in block511.

It is noted that the method ofFIG. 5is merely an example. The operations illustrated in method500are depicted as being performed serially. In other embodiments, however, some of the operations may be performed in parallel or in a different sequence. In some embodiments, additional operations may be included.

It is also noted that method500, when performed by circuits disclosed above, may result in a worst case voltage sense signal being selected as a feedback signal to a voltage regulator circuit at a particular point in time. Such a method may allow for an inclusion of more voltage sense signals within a circuit block, therefore, providing a more accurate feedback signal to the voltage regulator circuit. By providing a more accurate feedback signal as compared to traditional methods, the voltage regulator circuit may be designed to regulate at a voltage level that is closer to a threshold operating limit, thereby reducing an amount of operating margin that may otherwise be needed to prevent sub-circuits in the circuit block from crossing the threshold and possibly failing as a result. The disclosed circuits may allow for addition or subtraction of voltage sense signals by adding or subtracting sensing stages, thereby reducing design time of a sensing circuit for a particular number of voltage sense signals.

It is further noted that the systems and circuits described herein may be implemented in any suitable digital logic or mixed-signal process. For example, some embodiments may utilize a Complementary Metal-Oxide Semiconductor Field-Effect Transistor (CMOS) process. Such CMOS logic process may utilize planar devices, non-planar devices, or a combination of the two. Circuits designed in a CMOS process may include various combinations of smaller logic circuits, such as, for example, invertors, AND gates, OR gates, NAND gates, and NOR gates. In addition, as used herein, a “logic level” or “logic signal” corresponds to a signal with a voltage level that indicates one of two states, either a “low logic level” or a “high logic level.” A “low logic level” corresponds to a voltage level sufficiently low to enable a p-channel MOSFET, and a “high logic level” corresponds to a voltage level sufficiently high to enable an n-channel MOSFET. In various other embodiments, different technology, including technologies other than complementary metal-oxide semiconductor (CMOS), may result in different voltage levels for indicating a “low” or a “high” logic level.