Method and apparatus of secure authentication for system on chip (SoC)

A SoC may be utilized to authenticate access to one or more secure functions. A password may be generated within the SoC which is unique to each SoC instance and unique to each iteration of authentication. The SoC may challenge external entities attempting access to provide a matching password. A random number sample may be generated within the SoC and stored. A chip ID, secret word and a table of keys with key indices are also stored in memory. Two or more of the stored items may be passed to a hash function to generate the password. The external entity may generate and return the password utilizing information communicated from the SoC during each authentication operation as well as information known a priori. The SoC may compare the returned password with the internally generated password and may grant access to the secure functions.

FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT

FIELD OF THE INVENTION

Certain embodiments of the invention relate to secure communication systems. More specifically, certain embodiments of the invention relate to a method and apparatus of secure authentication for a System-on-Chip (SoC).

BACKGROUND OF THE INVENTION

Industry standards provide the necessary protocols and infrastructure that may be used for delivering digital television or DVD content with audio, video and data signals. These streams may be processed by various functions and operations within broadband networks, head-end and terminal devices such as set-top boxes (STB), and media devices such as DVD. These various functions and operations may for example involve access to sensitive areas of the device such as scan access, system buses and system interfaces and may benefit from some form of security or user authentication mechanism.

Passwords are the most popular authentication mechanism. They make use of knowledge a user has. The user supplies a password and a security system validates it. If the password is verified to be associated with a user, the user's identity is authenticated. If not, the password is rejected and authentication fails.

Passwords have the fundamental problem that they are reused on multiple devices. If an unauthorized user discovers a password on one device, it may be used to gain access to another device that authenticates with the same password. In this case, a device such as an STB cannot distinguish between the unauthorized user and a legitimate user.

For many applications, such as a secure download operation, a password may be discovered by an unauthorized user during an operation and may then be utilized for gaining access during subsequent operations of the same type.

In order to ensure secure communication, transmitted streams may need to be protected during transmission to devices such as STB. Upon receipt of the transmitted steams, one or more devices within the STB may need to provide secure access for the streams.

BRIEF SUMMARY OF THE INVENTION

An apparatus and/or method of secure authentication for a system on a chip (SoC), substantially as shown in and/or described in connection with at least one of the figures, as set forth more completely in the claims.

DETAILED DESCRIPTION OF THE INVENTION

Certain aspects of the invention may be found in a method and apparatus of secure authentication for system on a chip (SoC). Aspects of the invention may comprise a SoC that may enable authentication of an external entity attempting to gain access to a function or system. The SoC and an authorized external entity may each have knowledge of hidden data prior to an authentication attempt and may communicate data during the authentication process as well. Using like data, the SoC and external entity may be able to generate the same password and achieve system access. Passwords may be unique in two ways, for example: per operation and per SoC device. A random number generator (RNG) on board the SoC may enable the passwords to vary for each iteration of the authentication process. Each instance of a SoC has its own secret word allowing passwords to be unique for each device.

FIG. 1Ais a block diagram that illustrates an exemplary SoC that enables secure authentication operations in accordance with an embodiment of the invention. Referring toFIG. 1A, there is shown an SoC100that may comprise a challenge register102, a random number generator (RNG)104, a plurality of local memory units108,110, local re-writable memory106, an encryption unit112and a digital comparator unit114. The boundary of the SoC100is shown.

The challenge register102may comprise suitable storage for a random number sample generated by the RNG104, chip ID and a key table index. The challenge register102comprises suitable circuitry, logic and/or codes and may be adapted to exchange information between the SoC and an external entityFIG. 2(200), requesting authentication. The challenge register102is communicatively coupled to the RNG104and to memories108and110.

The RNG104may be communicatively coupled to the challenge register102and local re-writable memory106. The RNG104comprises suitable circuitry, logic and/or code and may be adapted to generate the random number sample.

The memory108may comprise storage for the chip ID and the secret word. The memory108may enable secure storage of the secret word. The secret word may be generated utilizing the chip ID and a secure secret algorithm. The secure storage within108may be communicatively coupled to the encryption unit112and decoupled from the any external entity. The memory108may be enabled to store the chip ID and may be communicatively coupled to the challenge register102. The memory108may utilize any type of storage technology such as PROM, Flash or EEPROM.

The local re-writable memory106may comprise storage for output from the random number generator104. The local re-writable memory106may utilize any type of storage technology, such as Flash or EEPROM. The memory local re-writable106may be communicatively coupled to the RNG104and the encryption unit112.

The memory110may comprise suitable logic, circuitry, and/or code that may enable storage of the key table and associated key indices. The memory110may be utilized for communicating data to the encryption unit112as well as the challenge register102.

The encryption unit112may comprise suitable logic, circuitry, and/or code that may enable the generation of a password from a plurality of input data. In one aspect of the invention, the encryption unit112may be enabled to encrypt data from a plurality of sources: the secret word from108, the random number sample from106and a key from the key table within memory110, to generate the password. In another embodiment of the invention, the encryption unit112may comprise suitable logic, circuitry, and/or code to enable use of a hash function such as SHA1, SHA2and HMAC-SHA. In this regard, data from two sources may be utilized to generate the password: the secret word from memory108and the random number sample from local re-writable memory106.

The digital comparator114may comprise suitable logic, circuitry, and/or code that may be adapted to receive the password from an external entity and the password generated by the encryption unit112. The digital comparator114may comprise suitable logic, circuitry, and/or code that may be adapted to compare two passwords and output an authentication pass or fail indication.

In operation, the random number sample may be generated within RNG104. The random number sample generated by the RNG104, chip ID from memory108and key index from memory110may be communicated to the challenge register102. Then the contents of the challenge register102may be sent to the external entity200shown inFIG. 2, in a challenge message so that the external entity may generate the password and return it in a challenge response. The random number sample generated in the RNG104may be stored in local re-writable memory106. The secret word from108, random number sample from106and the key at location key index in110may be communicated to the encryption unit112. The encryption unit112may utilize a hash function to generate the password. The digital comparator114may receive the password from encryption unit112and the password from the external entity200and compare them. The SoC100may determine whether the authentication has passed or failed.

FIG. 1Bis a block diagram that illustrates an exemplary system on a chip that enables secure authentication operations in accordance with an embodiment of the invention. Referring toFIG. 1B, there is shown the SoC100that may comprise the challenge register102, the RNG104, the plurality of local memory108,110, an external memory120, the encryption unit112, the digital comparator unit114, a signing unit116and a verification unit118. The SoC100as well as the challenge register102, the RNG104, the plurality of local memory108,110, the encryption unit112and the comparator unit114may be described similarly to and respectively withFIG. 1Athe SoC100, the challenge register102, the RNG104, the plurality of local memory108,110, the encryption unit112and the comparator unit114. Referring toFIG. 1B, there is shown additional components that may comprise external memory120, a signing unit116and a verification unit118.

The signing unit116may comprise suitable logic, circuitry, and/or code that may be adapted to sign the random number sample output from the RNG104. The signing unit116may sign the random number sample utilizing an asymmetric algorithm such as RSA, DSA or a symmetric algorithm such as HMAC using an embedded signing key. The signing unit116may comprise suitable logic, circuitry, and/or code that may be adapted to exchange information with an external memory120for storage of a signed random number sample. In another aspect of the invention, the signing key may be encrypted and stored on the external memory120.

The external memory120may comprise a storage device, which may comprise suitable logic, circuitry, and/or code that may be adapted to exchange data with the SoC. The external memory120may comprise storage for output from the random number generator104which may have been signed in unit116. The external memory120may be based, for example, on Flash storage technology. In one aspect of the invention, the signing and verification keys may be stored in external memory120

The verification unit118may comprise suitable logic, circuitry, and/or code that may be adapted to receiving a verification key and the signed random number sample from external memory120and may decipher the signed random number sample. The verification unit118may comprise suitable logic, circuitry, and/or code that may be adapted to exchange information with the encryption unit112.

In operation, the random number sample may be generated within RNG104. The random number sample from the RNG104, chip ID from memory108and key index from the memory110may be communicated to the challenge register102. Then the contents of the challenge register102may be sent to the external entity200shown inFIG. 2in a challenge message so that the external entity may generate the password and return it in a challenge response. The random number sample generated in the RNG104may be signed by the signing unit116and stored in external memory120. The secret word from108, the key at location key index in the memory110may be communicated to the encryption unit112. The random number sample stored in external memory120may be returned to the SoC100more specifically to the verification unit118where it is may be and forwarded to the encryption unit112. The encryption unit112may utilize a hash function to generate the password. The digital comparator114may receive the password from the encryption unit112and the password from the external entity200shown inFIG. 2and compare them. The SoC determines if the authentication has passed or failed.

FIG. 2is a block diagram that illustrates an exemplary external entity200, relative to SoC100, which enables secure authentication operations in accordance with an embodiment of the invention. Referring toFIG. 2, there is shown the external entity200that may comprise a plurality of memory208and210, and an encryption unit212. The boundary of the external entity200is shown.

The memory208may comprise storage for the chip ID, and may comprise suitable logic, circuitry, and/or code that may be adapted to exchange data with the SoC100shown inFIGS. 1A and 1B. The memory208may comprise storage for the secret word. The memory208may be adapted to associate the received chip ID with the stored secret word. The secret word may be generated based on the chip ID and a secure secret algorithm. The memory208may be communicatively coupled to the encryption unit212.

The memory210may comprise suitable logic, circuitry, and/or code that may enable storage of the table of keys and associated key indices. The memory210may be utilized for communicating data to the encryption unit212.

The encryption unit212may comprise suitable logic, circuitry, and/or code that may enable the generation of a password from a plurality of input data. In one aspect of the invention, the encryption unit212may encrypt data from three sources: a secret word from208, random number sample from the challenge register102on the SoC100inFIG. 1AandFIG. 1B, and a key from the memory110, and then generate the password. In another embodiment of the invention, the encryption unit212may comprise suitable logic, circuitry, and/or code that may be enabled to utilize a hash function such as SHA1, SHA2and HMAC-SHA. In this regard, data from two sources may be utilized to generate the password: the secret word from memory208and the random number sample from the challenge register102on the SoC100shown inFIG. 1AandFIG. 1B.

In operation, the random number sample, chip ID and key index may be retrieved from the challenge register102. The chip ID may be stored in memory208and associated with the corresponding secret word. The secret word may have been generated based on the received chip ID or may have been stored prior to the authentication process. The key index from the challenge register102may be used to look-up the corresponding key in the memory210. Then the secret word from the memory208, the key from memory210and the random number sample from the challenge register102may be communicated to the encryption unit212. The encryption unit212may utilize a hash function to generate the password. The password may be sent to the SoC100shown inFIG. 1AandFIG. 1Bin the challenge response.

Referring toFIG. 3A, there is shown a flow chart wherein step300refers to the beginning of an authentication operation on the SoC100shown inFIG. 1AandFIG. 1B. In step302, the chip ID from memory108is sent to the challenge register102. In step304, a key index from memory110is sent to the challenge register102. In step306the random number generator (RNG)104generates the random number sample. In step308, the random number sample may be sent to the challenge register102. In step310the contents of the challenge register102are sent from the SoC100to the external entity200shown inFIG. 2. Step312directs continuation of flow chart toFIG. 3BandFIG. 3C.

FIG. 3Bis a flow chart that illustrates an exemplary portion of the authentication process within an exemplary entity external to the SoC, in accordance with an embodiment of the invention. Referring toFIG. 3B, there is shown a flow chart wherein step312is a continuation directive fromFIG. 3A. In step314, the random number sample, chip ID and key index are received by the external entity200shown inFIG. 2from the challenge register102on the SoC100. In step316, the random number sample may be sent to a hash function within encryption unit212. In step318, the chip ID received from the challenge register102may be used to generate or look-up the secret word. The secret word in memory208may then be sent to the hash function within the encryption entity212. In step320the key index received from challenge register102may be utilized to look-up the key in the table of keys. The key may be sent to the hash function within the encryption unit212. In step322, the password is generated by the encryption unit212. In step324, the password may be sent from the external entity200to the SoC100in a challenge response. Step326is a flow chart continuation directive toFIG. 3C.

FIG. 3Cis a flow chart that illustrates an exemplary portion of the authentication process within the SoC, in accordance with an embodiment of the invention. Referring toFIG. 3C, there is shown a flow chart wherein step312is a continuation directive fromFIG. 3A. In step328, when the chip has internal re-writable memory as inFIG. 1A, the process may proceed to step330. In step330, the random number sample from RNG104may be stored in local re-writable memory106. In step332, the secret word from the memory108, is sent to the hash function in the encryption unit112. In step334, the key index is used to look up the key in memory110and sent to encryption unit112. In step336, the random number sample stored in internal re-writable memory106may be sent to the hash function in encryption unit112. In step338, the password may be generated from the hash function in encryption unit112. In step340, the SoC100password from encryption unit112and the password from external entity200shown inFIG. 2, are received by the digital comparator114. In step342, when the passwords are equal, the process may proceed to step344, and pass in the end step. In step342, when the passwords are not equal, the process may continue to step346and fail the end step.

In step328, when the SoC100does not have internal re-writable memory, the process may proceed to step348. In step348, the random number sample from the RNG104is signed in the signing unit116. In step350, the random number sample and its signature are stored in the external re-writable memory120. In step352, the random number sample and its signature are returned to the SoC100and verified in the verification unit118. In step356, when the random number sample and the signature do not pass verification in verification unit118, the process may proceed to step358and fail the end step. In step356, when the random number sample and the signature pass verification in verification unit118, the process may proceed to step336.

The system illustrated inFIG. 1A,FIG. 1BandFIG. 2, enables authenticating of access to one or more secure functions. Authentication may be controlled by the SoC100shown inFIG. 1AandFIG. 1Band may utilize a password that is unique in two ways: for each SoC performing authentication and for each iteration of the authentication process.

The authentication method may comprise generating said password within the SoC100as well as within the external entity200shown inFIG. 2. The authentication process may begin by generating a random number sample within the SoC100random number generator (RNG)104. The random number sample may be stored in either the on-chip memory106referring toFIG. 1Aor, the off-chip memory120referring toFIG. 1B. The secret word may be stored in memory108and may be inaccessible to an external entity attempting access. At least one of the following: the chip ID that is unique to the SoC100may be stored in memory108and a table of keys, wherein said table of keys comprises a key and a corresponding key index that may be stored in the memory110.

Two or more of the following: the secret word from unit108, the random number sample from the memory106referring toFIG. 1Aor from the memory120referring toFIG. 1B, and a key from said table of keys within the memory110may be passed to a hash function in encryption unit112. The hash function may generate the password. A challenge may come from the SoC100shown inFIGS. 1A and 1B, to the external entity200shown inFIG. 2, to generate and return the password. At least two of the following: the random number sample, the chip ID which is unique to the SoC100and the key index may be stored in the challenge register102and then communicated to the external entity200. An authorized external entity may have prior knowledge of the chip ID, the secret word, the table of keys with corresponding key indices and the hash function. The authorized external entity may be able to generate the secret word from the received chip ID and a secure secret algorithm. When the password is returned from external entity200, the returned password may be compared with the password generated within the encryption unit112in the digital comparator114. If the passwords match, access may be granted to the one or more secure functions.

Certain embodiments of the invention may comprise a machine-readable storage having stored thereon, a computer program having at least one code section for communicating information within a network, the at least one code section being executable by a machine for causing the machine to perform one or more of the steps described herein.

Accordingly, aspects of the invention may be realized in hardware, software, firmware or a combination thereof. The invention may be realized in a centralized fashion in at least one computer system or in a distributed fashion where different elements are spread across several interconnected computer systems. Any kind of computer system or other apparatus adapted for carrying out the methods described herein is suited. A typical combination of hardware, software and firmware may be a general-purpose computer system with a computer program that, when being loaded and executed, controls the computer system such that it carries out the methods described herein.