Buck-boost controller achieving high power factor and valley switching

A high power-factor buck-boost converter having a rectified low-frequency AC line voltage input and a DC output is provided. The converter may include a magnetic element, a controlled switch having a gate terminal and a drain terminal that is coupled to the magnetic element, a rectifier diode coupled to the magnetic element, an output smoothing capacitor coupled to the rectifier diode, and a control circuit having an output coupled to the gate terminal of the controlled switch for repeatedly turning the controlled switch off for a first time duration and on for a second time duration. The second time duration may be determined as a function of the first time duration immediately preceding the second time duration.

TECHNICAL FIELD

The present disclosure generally relates to a high power factor buck-boost (flyback) converter and control circuit and method used therein.

SUMMARY

FIG. 1depicts a related-art high power factor discontinuous conduction-mode (DCM) flyback converter for receiving input voltage VINfrom a rectified AC line voltage source100and for delivering regulated DC output voltage \Tour to an output load190. The flyback converter ofFIG. 1includes: a magnetic element103having a primary winding PRI, and a secondary winding SEC; a controlled switch102having a gate and a drain terminals; a rectifier diode105; and an output filtering capacitor106.

The flyback converter ofFIG. 1also includes a control circuit, which includes an integrator107having inverting and a non-inverting inputs for integrating the difference between VOUTand a reference voltage VREF, and having an output for delivering the resulting integral voltage. The control circuit also includes a clock signal CLK, a source of linear ramp voltage VRAMP, and a comparator108having an output, and inverting and non-inverting inputs for comparing the output voltage of the integrator107and the ramp voltage VRAMP. The control circuit may also include a flip-flop circuit109for turning the controlled switch102on and off repeatedly at a high frequency rate, having an output Q coupled to the gate of the switch102, a set input S for receiving the clock signal CLK and for toggling the output Q on when CLK is received, and a reset input R for receiving the output of the comparator108and for toggling the output Q off.

FIG. 2illustrates the gate waveform202of the voltage at the gate of switch102, and the drain voltage waveform201of the drain voltage VDat the drain of switch102. The converter ofFIG. 1is operated at a fixed switching period TSWdetermined by the clock signal CLK. The time interval TONrepresents the conductive state of the switch102. The non-conductive state is represented by conduction of the diode105followed by a post-conduction oscillation of the drain voltage201.

The integration time constant of the integrator107is selected much greater than a period of the rectified AC line voltage100and, therefore, the time interval TONcan be considered to be constant over an individual AC line cycle. The input current of a DCM flyback converter averaged over one switching cycle can be expressed as:

where Reff=LPRI·TSW/T0N2is the effective input resistance. The converter ofFIG. 1features natural unity power factor, since both TONand TSWare fixed.

However, the natural high power factor flyback converter ofFIG. 1operates in deep discontinuous conduction mode. As a result, the switch102is stressed with high peak and RMS current causing high conduction and turn-off power losses. At high switching frequency (or low TSW) and high voltage VDacross the switch102, turn-on power losses also become significant due to large parasitic energy stored in output capacitance of the switch102and other parasitic capacitances.

FIG. 3shows another related-art high power factor discontinuous conduction-mode (DCM) flyback converter including all elements of the converter ofFIG. 1, except wherein the clock signal CLK is replaced by a valley detector circuit101for detecting a post-conduction oscillation valley of the drain voltage201and for triggering the set input S to turn the switch102on when the valley is detected. This minimum-voltage valley switching is illustrated by a drain voltage waveform210of the switch102shown inFIG. 4.

The converter ofFIG. 3achieves improved efficiency compared to the converter ofFIG. 1due to the smallest peak and RMS current possible for a DCM converter and due to turning the switch102on at minimum possible voltage across it. However, the switching period TSWbecomes variable over the AC line cycle of the input voltage100, causing non-constant effective input resistance Reffand, therefore, distortion of input current. Hence, a control circuit is needed to overcome the deficiencies of constant-TONcontrol in the converter ofFIG. 3.

According to an aspect of one or more exemplary embodiments, there is provided a high power-factor buck-boost converter for receiving input voltage from a rectified AC line voltage source and for delivering regulated DC output voltage to an output load that may include a magnetic element, a controlled switch having a gate terminal and a drain terminal that is coupled to the magnetic element, a rectifier diode coupled to the magnetic element, an output smoothing capacitor coupled to the rectifier diode, and a control circuit having an output coupled to the gate terminal of the controlled switch for repeatedly turning the controlled switch off for a first time duration and on for a second time duration. The second time duration may be determined as a function of the first time duration immediately preceding the second time duration.

The high power-factor buck-boost converter may also include a valley detection circuit configured to detect a post-conduction oscillation valley of a voltage at the drain terminal of the controlled switch, wherein the valley detection circuit may output a control signal, which may be used by the control circuit to control the controlled switch. The control circuit may cause the controlled switch to turn on once the control signal is received from the valley detection circuit.

The control circuit may turn the controlled switch on no sooner than when the rectifier diode becomes reverse-biased. The control circuit may determine the second time duration such that the quotient of the square of the second time duration and the sum of the first time duration and the second time duration is substantially constant over a cycle of the rectified AC line voltage.

According to an aspect of one or more exemplary embodiments, the high power-factor buck-boost converter may include an error detector circuit configured to receive as inputs an output voltage from the output smoothing capacitor and a reference voltage, and output a difference voltage that is equal to the difference between the output voltage and the reference voltage. The control circuit may use the difference voltage to determine the first time duration and the second time duration. The high power-factor buck-boost converter may also include an integrator circuit configured to generate a control voltage that is a time integral of the difference voltage, wherein, the control circuit may determine the first time duration and second time duration based on the control voltage.

According an aspect of one or more exemplary embodiments, the high power-factor buck-boost converter may also include a current sense circuit configured to measure an output current of the high power-factor buck-boost converter and output a sense voltage that is proportional to a measured output current of the high power-factor buck-boost converter. The error detector circuit may be configured to receive as inputs the sense voltage, and a reference voltage. The error detector circuit may be configured to output a difference voltage that is equal to the difference between the sense voltage and the reference voltage.

According to yet another aspect of one or more exemplary embodiments, the high power-factor buck-boost converter may include an analog differential integrator configured to receive as inputs an output voltage from the output smoothing capacitor and a reference voltage, and output a difference voltage that is equal to the difference between the output voltage and the reference voltage, wherein the analog differential integrator is configured to generate a control voltage that is a time integral of the difference voltage.

According to still another aspect of one or more exemplary embodiments, the control circuit may include a flip-flop circuit configured to turn the controlled switch on and off repeatedly at a high frequency rate, a controlled ramp generator configured to generate a linear voltage ramp having a slew rate that is proportional to the control voltage, a fixed ramp generator configured to generate a quadratic voltage ramp having a slew rate that is proportional to a time duration of an active state of an output of the flip-flop circuit, and a comparator circuit configured to compare the linear voltage ramp and the quadratic voltage ramp.

The fixed ramp generator may reset the quadratic ramp voltage to an initial level in response to the output of the flip-flop circuit entering an inactive state. The comparator circuit may include an output that is coupled to a reset input of the flip-flop circuit, wherein the output of the comparator circuit may be configured to terminate the active state of the output of the flip-flop circuit and reset the linear voltage ramp to an initial level in response to the quadratic voltage ramp exceeding the linear voltage ramp.

According to yet another aspect of one or more exemplary embodiments, the high power-factor buck-boost converter may include a combined signal generator configured to receive the control voltage and generate an output voltage, and a comparator circuit configured to compare the output voltage generated by the combined signal generator and an initial voltage level. Then output of the comparator circuit may be coupled to a reset input of the combined signal generator to reset the output voltage of the combined signal generator to the initial voltage level, and the combined signal generator may include an input that is coupled to an output of the flip-flop circuit.

According to another aspect of one or more exemplary embodiments, there is provided a method of achieving a high power factor in a DCM buck-boost converter. The method may include turning a controlled switch of the buck-boost converter off; generating a linear signal ramp; determining whether a magnetic element that is coupled to the controlled switch is in a discontinuous conduction mode; in response to determining that the magnetic element is in a discontinuous conduction mode, determining whether a time duration of a non-conductive state of the controlled switch has reached an end of the non-conductive state; in response to determining that the time duration of the non-conductive state of the controlled switch has reached the end of the non-conductive state, turning on the controlled switch; generating a quadratic signal ramp; determining whether the quadratic signal ramp exceeds the linear signal ramp; and in response to determining that the quadratic signal ramp exceeds the linear signal ramp, turning the controlled switch off.

According to still another aspect of one or more exemplary embodiments, there is provided a method of achieving a high power factor in a DCM buck-boost converter. The method may include turning a controlled switch of the buck-boost converter off; determining whether a magnetic element that is coupled to the controlled switch is in a discontinuous conduction mode; in response to determining that the magnetic element is in a discontinuous conduction mode, determining whether a time duration of a non-conductive state of the controlled switch has reached an end of the non-conductive state; in response to determining that the time duration of the non-conductive state of the controlled switch has reached the end of the non-conductive state, computing a time duration of a conductive state of the controlled switch as a function of the time duration of the non-conductive state.

According to an aspect of one or more exemplary embodiments, there is provided a high power-factor buck-boost converter that may include a magnetic element, a controlled switch having a gate terminal and a drain terminal that is coupled to the magnetic element, a rectifier diode coupled to the magnetic element, an output smoothing capacitor coupled to the rectifier diode, and a control circuit having an output coupled to the gate terminal of the controlled switch for repeatedly turning the controlled switch off for a first time duration, turning the controlled switch on for a second time duration immediately following the first time duration, and turning the controlled switch on for a third time duration immediately preceding the first time duration. The first time duration may include a time duration of a non-conductive state of the rectifier diode, and the second time duration may be determined as a function of the third time duration and the time duration of a non-conductive state of the rectifier diode.

The control circuit may generate a fourth time duration as a product of the third time duration and the quotient of the input voltage and the output voltage. The control circuit may determine the second time duration such that the quotient of the square of the second time duration and the sum of the fourth time duration, the time duration of a non-conductive state of the rectifier diode, and the second time duration is substantially constant over a cycle of the rectified AC line voltage.

The magnetic element may include a primary winding and a secondary winding having a turns ratio. The control circuit may generate the fourth time duration as a product of the third time duration and the quotient of the input voltage and the output voltage reflected to the primary winding by the turns ratio.

DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS

Reference will now be made in detail to the following exemplary embodiments, which are illustrated in the accompanying drawings, wherein like reference numerals refer to like elements throughout. The exemplary embodiments may be embodied in various forms without being limited to the exemplary embodiments set forth herein. Descriptions of well-known parts are omitted for clarity.

FIG. 5shows a high power factor discontinuous conduction-mode (DCM) flyback converter according to an exemplary embodiment of the present disclosure. Referring toFIG. 5, the flyback converter of the exemplary embodiment may receive an input voltage VINfrom a rectified AC line voltage source100and deliver a regulated DC output voltage VOUTto an output load190. The flyback converter ofFIG. 5may include a magnetic element103having a primary winding PRI, and a secondary winding SEC; a controlled switch102having a gate terminal and a drain terminal; a rectifier diode105; an output smoothing capacitor106; and a control circuit199having a TON output coupled to the gate terminal of the switch102for turning the switch on and off repeatedly at a high frequency rate. The flyback converter ofFIG. 5may also include a valley detector101. The control circuit199may also include a clock input CLK coupled to the valley detector101.

FIG. 5adepicts a converter according to another exemplary embodiment that is similar to the exemplary embodiment ofFIG. 5, but wherein the magnetic element103is replaced by an inductor303having a single winding.

FIG. 6illustrates operation of the exemplary flyback converter ofFIG. 5.

Waveform202represents the voltage at the output TON controlling the gate of the switch102, where TON,nis a conductive state of the switch102, TOFF,n-1is its non-conductive state immediately preceding TON,n. Waveform210represents an exemplary drain voltage VDof the switch102.

In order to maintain discontinuous conduction-mode (DCM), the control circuit199permits a conductive state TON,nof the switch102no sooner than the diode105becomes reverse-biased. This condition can be fulfilled by design, or using one of the known zero-current detection methods. Once the DCM operation is guaranteed, the switch102conducts for a time duration TON,ncomputed in accordance with the following control law:

where TOis a time constant substantially fixed over a cycle of the rectified AC line voltage.

As shown in equation (2), the control law is iterative, since TON,nin any given switching cycle is determined by TOFF,n-1in a preceding cycle, which, in turn, is an explicit function of TON,n-1. Moreover, a direct substitution of TOFF,n-1with (mR−1TON,n-1+ΔT) can be made in the control law equation (2), which yields equation (2a):

Substituting steady-state values of TON, TOFF, and TSW=TON+TOFFin equation (2), the following equation (3) is obtained:

Equation (3) guaranties unity power factor in a DCM flyback converter in spite of the individually varying TONand TSW. The corresponding effective resistance given by the equation (1) can now be expressed as Reff=LPRI/TO. It is to be noted that, as long as DCM is guaranteed, the high power-factor control law of Equation (2) holds true regardless of a specific moment when a time TON,nbegins.

Equation (2) may be solved for TON,nin a predictive way by computing it prior to a conductive state of the switch102. This can be done by using one of the known iterative root-finding methods, bracketing or open, or by direct calculation of the root, as shown in Equation (4):

With continued reference toFIG. 6, a voltage level299designates VD=VIN+VOR, where VOR=n·VIN, and n=NPRI/NSECis the PRI-to-SEC turn ratio of the magnetic element103. Voltage level200designates VD=VIN+k·VOR, where k is a constant coefficient less than unity. Waveform205represents a time duration ΔT within TOFF,n-1where the drain voltage VDfalls below the voltage level200. The waveform203illustrates an exemplary signal at CLK of the control circuit199received from the valley detector101.

In operation, the switch102turns on once the signal203is received at CLK. The switch102conducts for a time duration TON,ncomputed in accordance with the equation (2). Predictive computing of TON,nmay require finite time. The control circuit199may use the time ΔT to perform this computation. In such case, the control circuit199may use a modified version of Equation (2), which is shown below in Equation (5):

where TC,n-1=TOFF,n-1−ΔT is measured instead, and ΔT is assumed known. Alternatively, ΔT may be determined from preceding switching cycles.

FIG. 7illustrates a control method according to an exemplary embodiment of the present disclosure for achieving high power factor in a DCM flyback converter. The method of the exemplary embodiment may include the steps of switching the switch102off at step701. At step702, it is determined whether the magnetic element is in a discontinuous conduction mode. If not, the method continues checking whether the magnetic element103is in a discontinuous conduction mode. Once it is determined that the magnetic element103is in a discontinuous conduction mode, at step703the method permits the end of the non-conductive state at an arbitrary moment determined by any known criterion. If the end of the non-conductive state has been reached, the method computes the required time duration of a conductive state of the switch102using Equation (2). Equation (2) can be solved by using one of the known iterative root-finding methods, bracketing or open, or by direct calculation of the root.

FIG. 8shows a high power factor flyback converter ofFIG. 5that may additionally include an error detector107for receiving the output voltage VOUTand a reference voltage VREFand for generating a difference voltage VREF-VOUTan integrator191for generating a time integral VERRof the difference voltage, and wherein the control circuit199includes an additional input VCfor receiving VERR.

The control circuit199ofFIG. 8may use the control law of Equation (5a) below:

where α is a constant coefficient. By using the control law of Equation (5a), the control circuit199may achieve regulation of the output voltage VOUTto the reference VREF. Alternatively, the error detector107may receive voltage from a current sense element194proportional to measured output current of the flyback converter.

As opposed to predictively computing TON,n, a real-time solution of Equation (2) is possible.FIG. 9depicts a real-time control method according to an exemplary embodiment of the present disclosure for achieving high power factor in a DCM flyback converter. The method may include the following steps. At step901, a linear signal ramp V1(t)=α1·t may be generated, where α1is a constant coefficient, and ‘t’ is the time variable having its initial value t=0 at a moment of a turn-off transition of the switch102. At step902, it is determined whether the magnetic element is in a discontinuous conduction mode. If not, the method generates the linear signal ramp in step901, and continues checking whether the magnetic element103is in a discontinuous conduction mode. Once it is determined that the magnetic element103is in a discontinuous conduction mode, at step903the method permits the end of the non-conductive state at an arbitrary moment determined by any known criterion. If the duration of the non-conductive state of the switch102has reached the end, the switch102is turned on at step904. At step905, a quadratic signal ramp V2(t) is generated according to the following Equation (6):
V2(t)=α2·(t−TOFF)2(6)

At step906, it is determined whether the quadratic signal ramp V2(t) exceeds the linear signal ramp V1(t). Once it is determined that the quadratic signal ramp V2(t) exceeds the linear signal ramp V1(t), the switch102is turned off at step907.

FIG. 10depicts a high power factor flyback converter ofFIG. 8, wherein the error detector107and the integrator191may be represented by an analog differential integrator circuit311, and wherein the control circuit199may be an analog circuit including: a flip-flop circuit313for turning the controlled switch102on and off repeatedly at a high frequency rate, having an output Q, a set input S coupled to the valley detector101for activating the output Q, and a reset input R for deactivating the output Q; a controlled ramp generator309configured to generate a linear voltage ramp having a slew rate proportional to the output voltage VERRof the integrator311; a fixed ramp generator310configured to generate a quadratic voltage ramp having a slew rate proportional to the time duration of an active state of the output Q, and for resetting the ramp voltage310to its initial level once the output Q becomes inactive; and a comparator312that may have a differential pair of inputs for comparing the voltage ramps309and310, and may include an output coupled to the reset input R of the flip-flop313for terminating an active state of Q and for resetting ramp voltage309to its initial level once ramp voltage310exceeds ramp voltage309.

FIG. 11illustrates the operation of the exemplary embodiment shown inFIG. 10. Referring toFIG. 11, waveform201is the drain voltage VDof the switch102; waveform202is the voltage at the output Q of flip-flop circuit313; and waveforms251and252represent the ramp voltages309and310, respectively.

The ramp251begins with the time period TOFF(n-1)preceding each active state of the output Q, whereas the quadratic ramp252begins with the active state of the output Q. The active state of the output Q is terminated when the ramp voltage252exceeds the ramp voltage251. The resulting control equation can be written as shown in Equation (7):
α1·TON,n2=α2·VERR·(TOFF,n-1+TON,n)  (7)

FIG. 12depicts a high power factor flyback converter ofFIG. 10, wherein the controlled ramp generator309and the fixed ramp generator310have been replaced with a single combined signal generator315, and wherein the comparator312has a differential pair of inputs for comparing an output voltage of the signal generator315and an initial voltage level255. The signal generator315may include an output coupled to the non-inverting input of the comparator312; an input TONcoupled to the output Q of flip-flop circuit313; a reset input coupled to the output of the comparator312for resetting the output of the generator315to an initial voltage level255; and an input VERRcoupled to the output of the integrator311.

FIG. 13illustrates the operation of the exemplary embodiment shown inFIG. 12. Referring toFIG. 13, waveform201is the drain voltage VDof the switch102; a waveform202is the voltage at the output Q of flip-flop circuit313; waveform261represent the output voltage of the generator315; and a dotted line265designates the initial voltage level255. The waveform261is composed as the difference voltage of the waveforms251and252ofFIG. 11.

Although the inventive concepts of the present disclosure have been described and illustrated with respect to exemplary embodiments thereof, it is not limited to the exemplary embodiments disclosed herein and modifications may be made therein without departing from the scope of the inventive concepts.