A multi-mode digital-to-analog converter (DAC) configured to operate in a plurality of modes.

TECHNICAL FIELD

The present invention relates generally to digital-to-analog converters (DACs) and, more particularly, to programmable DACs.

BACKGROUND

In electronics, a digital-to-analog converter, commonly referred to as a DAC or D-to-A), is a device for converting digital code to an analog signals (current or voltage). DACs can be configured using various types of configurations, such a pulse-width modulator DAC, a delta-sigma DAC, which use a pulse density conversion technique, a binary-weighted DAC, etc. Conventionally, a DAC receives a digital code input and provides either a voltage output or a current output; thus, limiting the DAC to be either a voltage-only DAC or a current-only DAC. When a system needs both types of DACs, the system requires two independent circuits, one circuit to implement a voltage-only DAC110and another circuit to implement a current-only DAC120, such as illustrated inFIG. 1. Also, these two independent circuits need to each receive a digital code input, and, typically have fixed resolutions, such as, for example, 8 bits or 6 bits only, and fixed data rates. The current-only DAC120may be either a current source or a current sink. Thus, a system that needs a voltage-only DAC110and both a current source DAC and a current sink DAC requires three independent circuits, each of which receive a digital code input to provide the respective output. By adding independent circuits to achieve the alternate functionalities, the number of components required for the system increases, as well as the space used to implement these components.

DETAILED DESCRIPTION

A multi-mode DAC configured to operate in multiple modes, including, for example, a voltage mode, a current mode, or a voltage-current mode, is described. In one embodiment, the multi-mode DAC is configured to receive a digital code input, provide an analog current output, corresponding to the digital code input, on a first output terminal of the multi-mode DAC when in the current mode, and provide a voltage output, corresponding to the digital code input, on a second output terminal of the multi-mode DAC when in the voltage mode. In another embodiment, the multi-mode DAC has a programmable output range for each of the multiple modes, including a multi-range current output when in the current mode and a multi-range voltage output when in the voltage mode. In another embodiment, the multi-mode DAC has a programmable trimming circuit configured to individually adjust the output range for each of the multiple modes. In another embodiment, the multi-mode DAC has a programmable current output circuit configured to select a current sink or a current source for the current output.

The embodiments described herein provide a highly flexible DAC that has multiple modes. These embodiments provide voltage or current output from the same circuitry block, instead of using independent circuits as done conventionally. These embodiments allow efficient implementation of many DAC functions, allowing the resolution, data rate, output ranges, output analog signal format, and trimming capability of the multi-mode DAC to be programmed. In particular, the embodiments described herein may provide the following capabilities, which are described herein: 1) ability to support a variety of analog signal formats, like voltage, current, and charge; 2) ability to support varying data rate and resolution requirements; 3) ability to combine multiple on-chip DACs to create additional functionality; 4) ability to independently trim each mode, regardless of whether the mode is a current mode, a voltage mode, or a voltage-current mode; 5) ability to sink or source current dynamically at the time of operation; 6) ability to combine the voltage and/or current outputs with other circuits, such as voltage or trans-impedance amplifiers, filters, or the like.

FIG. 2illustrates one embodiment of a multi-mode DAC200configured to operate in multiple modes. The multi-mode DAC200receives a digital code input201, and one or more mode-control signals203. In another embodiment, the multi-mode DAC200also receives a trimming input209and one or more references211, such as one or more voltage and current references. The digital code input201and mode-control signals203and209may be received on one or more bus lines that are coupled between the multi-mode DAC200and a controller210. Using the mode-control signals203, the controller210can program the multi-mode DAC200to operate in one of the multiple modes, such as a current mode, a voltage mode, a voltage-current mode, a current sink mode, a current source mode, as well as other modes as would be appreciated by one of ordinary skill in the art having the benefit of this disclosure. The multi-mode DAC200may also have a programmable output range for each of the modes, including, for example, a multi-range current output and a multi-range voltage output. Using the mode-control signals203, the controller210may program the multi-mode DAC200to provide the voltage output205and/or the current output207in the programmed output range.

In another embodiment, each of these output ranges may be trimmed using the trimming input209. In one embodiment, the controller210provides the trimming input209to the multi-mode DAC200. In other embodiments, the multi-mode DAC200receives the trimming input209from other sources as would be appreciated by one of ordinary skill in the art having the benefit of this disclosure.

In one embodiment, the controller210uses a state machine to provide the appropriate mode-control signals203to the multi-mode DAC200. Alternatively, the controller210may provide the mode-control signals203in other manners as would be appreciated by one of ordinary skill in the art having the benefit of this disclosure, such as the controller210executing a program that allows a user to program the multiple modes of the multi-mode DAC200. The controller210can use hardware, firmware, software, or any combination thereof to program the multi-mode DAC200to operate in the multiple modes as described herein. In one embodiment, the controller210is a processing element of a programmable system, such as the Programmable System on a Chip (PSOC®), developed by Cypress Semiconductor, of San Jose, Calif. Alternatively, the controller210may be a microcontroller, a microprocessor, a processor, a direct memory access (DMA) controller, programmable logic, or other type of processing element that can provide the digital code input201and one or more mode-control signals203and/or209. The controller210may also supply the one or more references211.

Based on the digital code input201, as well as the other inputs, the multi-mode DAC200is configured to provide a current output207on a first output terminal or a voltage output205on a second output terminal. In another embodiment, the multi-mode DAC200is configured to provide both the current output207and the voltage output205simultaneously, or at least concurrently. In another embodiment, the multi-mode DAC200is configured to provide the current output207or the voltage output205on a single output terminal. For example, the voltage output205and the current output207may be coupled to a multiplexer (such as illustrated at the output of the multi-mode DAC200inFIG. 6) that is controlled by the controller210, such as using one of the mode control signals203, to select the voltage output205or the current output207based on the mode. In one embodiment, the multi-mode DAC200is configured to operate in multiple modes, including, for example, a current mode, a voltage mode, and a voltage-current mode. For example, in one embodiment, the multi-mode DAC200has a mode-select terminal that receives a mode-select signal as one of the mode-control signals203, and based on the mode selected, the multi-mode DAC200provides the corresponding output. For example, when a current mode is selected, the multi-mode DAC200provides the current output207, and when a voltage mode is selected, the multi-mode DAC200provides the voltage output205.

In other embodiments, the multi-mode DAC200may be programmed in more than these two modes. For example, in one embodiment, the multi-mode DAC200receives mode-select signals203to select one of a voltage mode, a current mode, or a voltage-current mode. In the voltage-current mode, the multi-mode DAC200provides both the current output207and the voltage output205concurrently or simultaneously based on the same digital input value. In another embodiment, the mode-control signals203can program the multi-mode DAC200to provide a current sink on the current output207or a current source on the current output207. In another embodiment, the mode-control signals203can be used to program the output range of the voltage output205and the current output207in each of the modes. For example, the multi-mode DAC200may receive a scaling value as part of the one or more mode-control signals203, and the multi-mode DAC200may scale the current output207and/or voltage output205according to the received scaling value.

FIG. 3illustrates one embodiment of the multi-mode DAC ofFIG. 2, including a DAC array310, a current output circuit320, and a voltage output circuit330. The DAC array310is configured to receive the digital input code and provide an analog current output303(labeled as I-DAC current303). In one embodiment, the multi-mode DAC200provides the I-DAC current303as the analog current output207. In another embodiment, the multi-mode DAC200uses a current output circuit320, which receives the I-DAC current303from the DAC array310and provides the current output207on the first output terminal. The current output circuit320may receive one or more mode-control signals203, such as a selection input203c(labeled as sink/source select203c) and/or a current range input203b. The selection input203cconfigures the current output circuit320to operate as either a current sink or a current source, and the current range input203bselects the gain of the current output circuit320to scale the current output207accordingly. One embodiment of the current output circuit320is described and illustrated with respect toFIG. 4.

The depicted multi-mode DAC200also includes the voltage output circuit330, which receives the I-DAC current303from the DAC array310and provides the voltage output205on the second output terminal. The voltage output circuit330is configured to convert the I-DAC current303of the DAC array310into the voltage output205. In one embodiment, the voltage output circuit205receives one or more mode-control signals203, such as the voltage range input203a. In one embodiment, the voltage output circuit330includes a selectable resistance to scale the voltage output according to the voltage range input203a. In the depicted embodiment, the voltage output circuit330includes a first resistor332(1×), which when selected converts the I-DAC current303into the voltage output205scales the voltage conversion by one. The voltage range input203amay be used to switch in a second resistor334(3×), which when switched into series with the first resistor scales the voltage conversion by four. Alternatively, the voltage output circuit330may include other valued resistors and may include more resistors that can be switched in and out in series, or in parallel, to scale the voltage to the appropriate voltage output range. Similarly, the voltage output circuit330may use other types of voltage conversion circuits to convert the I-DAC current303to the voltage output205as would be appreciated by one of ordinary skill in the art having the benefit of this disclosure.

In the depicted embodiment, the multi-mode DAC200receives various mode-control signals203that switch in and out the current output circuit320and voltage output circuit330according to the selected mode. For example, in one embodiment, when the current output circuit320is switched on, the voltage output circuit330is switched off, and vice versa. In another embodiment, the current output circuit320and the voltage output circuit330are switched on at the same time, providing both the current output207and the voltage output205.

In the depicted embodiment, the multi-mode DAC200also includes a programmable trimming circuit340, including a first current mirror342, a second current minor344, an operational amplifier346, a transistor348, and a resistor349. The programmable trimming circuit340provides independent trim capability for any mode. In response to the trimming signal209, the trimming circuit340provides a corresponding gain341to the DAC array310to adjust the I-DAC current303. The trimming circuit340is configured to individually adjust the current output207and the voltage output205within the respective mode. For example, the trimming circuit340can trim the current output207and the voltage output205within the respective output ranges. Using the programmable output range for each of the modes and the programmable trimming circuit340, the multi-mode DAC200can efficiently implement various DAC functions.

The multi-mode DAC200may also be combined with other multi-mode DACs to offer additional capability.FIG. 6illustrates one embodiment of the multi-mode DAC200ofFIG. 2whose output is coupled to an output of a DAC600. In one embodiment, the DAC600is a non-multi-mode DAC that receives a digital input code601and provides a current or voltage output605corresponding to the digital input code601. The DAC600may receive the same references211as the multi-mode DAC200as depicted inFIG. 6; alternatively, different references may be used for the DAC600. In another embodiment, the DAC600is a second multi-mode DAC that receives the digital input code601and may also receive one or more mode-control signals and/or trim signals from the controller210, like the mode-control signals203and trim signals209described above with respect toFIG. 2. In the embodiment where the DAC600is a second multi-mode DAC, the second multi-mode DAC may provide both the current output and the voltage output on separate outputs. Also, like described above with respect toFIG. 2, the current and voltage outputs of the second multi-mode DAC600may be multiplexed to provide the output605. The output605is combined with the output of the multi-mode DAC200.

In one embodiment, the current output207from the multi-mode DAC200is coupled to a voltage output605of the DAC600, which may be a second multi-mode DAC, to allow for finer resolution in the voltage output607or provide extended range of output voltages. In another embodiment, the current output from the multi-mode DAC200is coupled to a current output605of the DAC600, which may be a second multi-mode DAC, to allow for finer resolution in the combined current output607, or in extended range in the combined current output. Alternatively, voltage outputs205and605may be combined to provide a combined output607. In the depicted embodiment, a multiplexer609is coupled to receive the voltage output205and the current output207. The selected current or voltage can be added with the output605of the DAC600to provide the combined output607. The multiplexer609may be controlled by the controller210, such as using one of the mode control signals203, to select the voltage output205or the current output207based on the mode. Alternatively, other configurations may be used to combine the functionality of the multi-mode DAC200with the functionality of the DAC600, as well as other circuitry to further enhance the capabilities of the circuit.

In the depicted embodiment, the trimming circuit340receives one or more mode-control signals203to switch between a current reference311and a voltage reference313in setting an input current343, which is used by the current mirror342to provide the gain341to the DAC array310. When selected, the current minor344uses the current reference311to set the input current343. When selected, the operational amplifier346, transistor348, and resistor349uses the voltage reference313to set the input current343. In some embodiments, the multi-mode DAC200may receive only one or the other of the references311and313, in which case, the trimming circuit340is programmed to use the current mirror344or the operational amplifier346, transistor348, and resistor349to set the input current343. In other embodiments, the trimming circuit340may use other types of circuits as would be appreciated by one of ordinary skill in the art having the benefit of this disclosure to set the appropriate gain341for the DAC array310to trim the current output207and/or the voltage output205.

FIG. 4illustrates one embodiment of the current output circuit320of the multi-mode DAC200ofFIG. 3. The current output circuit320includes an N-type current mirror420(N-mirror) and a P-type current mirror430, and a decoder440.

The decoder440receives the selection input203c(labeled as sink/source select203c) to select whether the current output circuit320provides the analog current output207as a current sink or a current source. The decoder440also receives the current range input203bto select the gain of the current output circuit320, scaling the current output207accordingly. The decoder440provides the switch controls442, which are used to control selection switches that select the appropriate N-type scaling current minors or P-type scaling current minors to provide the analog current output207as a current sink or a current source, and to scale the analog current output207accordingly.

The n-mirror420receives the I-DAC current303from the DAC array310and provides an output reference to multiple N-type scaling current mirrors, including the N-mirror 1×421, N-mirror 8×422, and the N-mirror 64×423. For example, in one embodiment, the output reference is a gate-voltage connected to the N-type scaling current mirrors, which are used to produce the scaled output currents. The multiple N-type scaling current minors are configured to receive the output reference from the N-mirror420and to produce a scaled current output of the I-DAC current303according to a corresponding scaling value of the respective N-type scaling current mirror. Each of the outputs of the N-type scaling current minors is coupled to a switch controlled by one of the switch controls442provided by the decoder440. Using the switch controls442, the N-type scaling current mirrors 1×, 8×, and 64× can be individually selected to operate as a current sink for the analog current output207.

The P-mirror430is coupled to the n-mirror420and provides an output reference to multiple P-type scaling current mirrors, including P-mirror 1×431, P-mirror 8×432, and P-mirror 64×433Like the output reference of the N-mirror420, the output reference of the P-mirror430may be the gate-voltage connected to the P-type scaling current mirrors, which are used to produce the scaled output currents. The multiple P-type scaling current mirrors are configured to receive the output reference from the P-mirror430and to produce a scaled current output of the I-DAC current303according to a corresponding scaling value of the respective P-type scaling current mirror. Each of the outputs of the P-type scaling current mirrors is coupled to a switch controlled by one of the switch controls442provided by the decoder440. The P-type scaling current mirrors 1×, 8×, and 64× can be individually selected to operate as a current source for the analog current output207. Although these three N-type and three P-type scaling current mirrors have been illustrated and described with respect toFIG. 4, in other embodiments, other values may be used to achieve the desired scaled value for the current sink or current source for the analog current output207. In other embodiments, more than one of the P-type scaling current mirrors or more than one of the N-type scaling current mirrors may be selected to change the scaling value of the analog current output207as would be appreciated by one of ordinary skill in the art having the benefit of this disclosure. It should also be noted that different scaling values can be used for the P-type scaling current mirrors than the scaling values used for the N-type scaling current mirrors.

It should be noted that the current output circuit320ofFIG. 4is one embodiment of the current output circuit320ofFIG. 3, and in other embodiments, the current output circuit320can be implemented using other techniques as would be appreciated by one of ordinary skill in the art having the benefit of this disclosure.

FIG. 5illustrates a flow diagram of one embodiment of a method of operating a multi-mode DAC. The method500is performed by processing logic that may comprise hardware (circuitry, dedicated logic, etc.), software (such as is run on a general purpose computer system or a dedicated machine), firmware (embedded software), or any combination thereof. In one embodiment, the controller210ofFIG. 2performs the method500. Alternatively, other processing elements may perform the method500.

Referring toFIG. 5, processing logic begins with optionally disabling the DAC output of the multi-mode DAC (block502) (e.g., analog current output207and/or analog voltage output205of multi-mode DAC300). Next, processing logic selects the desired mode of the multi-mode DAC300(block504), such as the voltage mode, the current mode, or the voltage-current mode, for example. The processing logic applies an input reference for the selected mode (block506), selects the gain setting for the selected mode (block508), and selects a current source or a current sink when a current mode is selected (block510). The processing logic optionally applies a trim for the selected mode (block512). Next, the processing logic enables the DAC output (block514) (e.g., analog current output207and/or analog voltage output205of multi-mode DAC300), and applies digital input values (e.g., digital code input201) to the multi-mode DAC input (block516).

In another embodiment, the method receives a digital code input at the multi-mode DAC and provides a current output, corresponding to the digital code input, on a first terminal of the multi-mode DAC when in a current mode, and provides a voltage output, corresponding to the digital code input, on a second output terminal when in a voltage mode. In one embodiment, when the voltage-current mode is selected at block504, the method provides the current output and the voltage output concurrently. In the depicted embodiment, when the current mode is selected at block504, the method selects one of a current sink mode and a current source mode at block510, and provides a current sink or a current source for the current output based on the selection at block510. In another embodiment, there may be two separate current modes that can be selected at block504—a current sink mode and a current source mode.

In another embodiment, when the method receives the current range input at block508(referred to as the gain setting), the method scales the current output based on the current range input. In another embodiment, when the method receives the voltage range input at block508(referred to as the gain setting). the method scales the voltage output based on the voltage range input. In another embodiment, when the method receives the trimming input at block512, the method adjusts the current output when the current mode is selected at block504, and adjusts the voltage output when the voltage mode is elected at block504. In another embodiment, the method adjusts both the current output and the voltage output when the voltage-current mode is selected at block504.

Embodiments of the present invention, described herein, include various operations. These operations may be performed by hardware components, software, firmware, or a combination thereof. As used herein, the term “coupled to” may mean coupled directly or indirectly through one or more intervening components. Any of the signals provided over various buses described herein may be time multiplexed with other signals and provided over one or more common buses. Additionally, the interconnection between circuit components or blocks may be shown as buses or as single signal lines. Each of the buses may alternatively be one or more single signal lines and each of the single signal lines may alternatively be buses.

Certain portions of the embodiments may be implemented as a computer program product that may include instructions stored on a computer-readable medium. These instructions may be used to program a general-purpose or special-purpose processor to perform the described operations. A computer-readable medium includes any mechanism for storing or transmitting information in a form (e.g., software, processing application) readable by a machine (e.g., a computer). The computer-readable storage medium may include, but is not limited to, magnetic storage medium (e.g., floppy diskette); optical storage medium (e.g., CD-ROM); magneto-optical storage medium; read-only memory (ROM); random-access memory (RAM); erasable programmable memory (e.g., EPROM and EEPROM); flash memory, or another type of medium suitable for storing electronic instructions. The computer-readable transmission medium includes, but is not limited to, electrical, optical, acoustical, or other form of propagated signal (e.g., carrier waves, infrared signals, digital signals, or the like), or another type of medium suitable for transmitting electronic instructions.

Additionally, some embodiments may be practiced in distributed computing environments where the computer-readable medium is stored on and/or executed by more than one computer system. In addition, the information transferred between computer systems may either be pulled or pushed across the transmission medium connecting the computer systems.