Method of bonding integrated circuit chip to display panel, and display apparatus

The present application provides a method of bonding an integrated circuit chip to a display panel. The method includes forming a plurality of first bonding pads in a bonding region on a first side of the display panel; forming a plurality of vias extending through the display panel in the bonding region; subsequent to forming the plurality of vias, disposing an integrated circuit chip having a plurality of second bonding pads on a second side of the display panel substantially opposite to the first side, the plurality of second bonding pads being on a side of the integrated circuit chip proximal to the display panel; and electrically connecting the plurality of first bonding pads respectively with the plurality of second bonding pads by forming a plurality of connectors respectively in the plurality of vias.

CROSS-REFERENCE TO RELATED APPLICATION

This application is a national stage application under 35 U.S.C. § 371 of International Application No. PCT/CN2018/110229, filed Oct. 15, 2018, which claims priority to Chinese Patent Application No. 201711057011.3, filed Oct. 27, 2017, the contents of which are incorporated by reference in the entirety.

TECHNICAL FIELD

The present invention relates to display technology, more particularly, to a method of bonding an integrated circuit chip to a display panel, and a display apparatus.

BACKGROUND

In recent years, flexible display apparatuses have been developed. In particular, flexible organic light emitting diode display apparatuses have been widely used in various applications. To achieve better user experience and display quality, a narrow bezel design of display apparatuses has become a focus of research and development.

SUMMARY

In one aspect, the present invention provides a method of bonding an integrated circuit chip to a display panel, comprising forming a plurality of first bonding pads in a bonding region on a first side of the display panel; forming a plurality of vias extending through the display panel in the bonding region; subsequent to forming the plurality of vias, disposing an integrated circuit chip having a plurality of second bonding pads on a second side of the display panel substantially opposite to the first side, the plurality of second bonding pads being on a side of the integrated circuit chip proximal to the display panel; and electrically connecting the plurality of first bonding pads respectively with the plurality of second bonding pads by forming a plurality of connectors respectively in the plurality of vias.

Optionally, the one or more of the plurality of vias extends through one of the plurality of first bonding pads.

Optionally, the one or more of the plurality of vias directly abut an edge of one of the plurality of first bonding pads.

Optionally, the method further comprises, prior to forming the plurality of via, forming an optical film on a second side of the display panel substantially opposite to the first side; and wherein the plurality of vias are formed to extend through the display panel and the optical film in the bonding region.

Optionally, the method further comprises subsequent to forming the optical film, forming a protective film on a side of the optical film distal to the display panel; and subsequent to forming the plurality of vias, removing the protective film from the optical film.

Optionally, one or more of the plurality of vias extend through the display panel and the optical film in the bonding region, and at least partially extend into the protective film.

Optionally, prior to forming the plurality of vias, an orthographic projection of each of the plurality of first bonding pads on the display panel at least partially overlaps with an orthographic projection of one of the plurality of second bonding pads on the display panel, thereby forming an overlapping region.

Optionally, each of the plurality of vias are formed at least partially in the overlapping region.

Optionally, each of the plurality of vias are formed at least partially in the overlapping region, and adjacent to an edge of the overlapping region.

Optionally, each of the plurality of vias are formed at least partially in the overlapping region, and directly abutting an edge of the overlapping region.

Optionally, each of the plurality of vias are formed outside the overlapping region, and directly abutting an edge of the overlapping region.

Optionally, forming the plurality of vias are performed by laser perforation.

Optionally, forming the plurality of connectors respectively in the plurality of vias are performed by sputtering a conductive material in the the plurality of vias.

Optionally, subsequent to disposing the integrated circuit chip having the plurality of second bonding pads on the second side of the display panel, further comprising aligning the plurality of first bonding pads and the plurality of second bonding pads with each other so that an orthographic projection of each of the plurality of first bonding pads on the display panel at least partially overlaps with an orthographic projection of one of the plurality of second bonding pads on the display panel.

Optionally, an orifice of at least one of the plurality of vias on the first side is surrounded by one of the plurality of first bonding pads.

Optionally, an orifice of one of the plurality of vias on the first side directly abuts one of the plurality of first bonding pads.

Optionally, the integrated circuit chip is a chip-on-film.

In another aspect, the present invention provides a display apparatus comprising a display panel and an integrated circuit chip bonded to the display panel according to a method described herein.

Optionally, the display apparatus is a flexible display apparatus.

Optionally, the integrated circuit chip is a chip-on-film.

DETAILED DESCRIPTION

The present disclosure provides, inter alia, a method of bonding an integrated circuit chip to a display panel, and a display apparatus that substantially obviate one or more of the problems due to limitations and disadvantages of the related art. In one aspect, the present disclosure provides a method of bonding an integrated circuit chip to a display panel having a display region and a bonding region.FIG. 1is a flow chart illustrating a method of bonding an integrated circuit chip to a display panel in some embodiments according to the present disclosure. Referring toFIG. 1, the method in some embodiments includes forming a plurality of first bonding pads in a bonding region on a first side of the display panel; forming a plurality of vias extending through the display panel in the bonding region, each of the plurality of vias extending through one of the plurality of first bonding pads or directly abutting an edge of one of the plurality of first bonding pads; subsequent to forming the plurality of vias, disposing an integrated circuit chip having a plurality of second bonding pads on a second side of the display panel substantially opposite to the first side, the plurality of second bonding pads being on a side of the integrated circuit chip proximal to the display panel, an orthographic projection of each of the plurality of first bonding pads on the display panel at least partially overlaps with an orthographic projection of one of the plurality of second bonding pads on the display panel; and electrically connecting the plurality of first bonding pads respectively with the plurality of second bonding pads by forming a plurality of connectors respectively in the plurality of vias. Optionally, the integrated circuit chip is a chip-on-film.

As used herein, the term “display region” refers to a region of the display panel where image is actually displayed. Optionally, the display region may include both a subpixel region and an inter-subpixel region. A subpixel region refers to a light emission region of a subpixel, such as a region corresponding to a pixel electrode in a liquid crystal display or a region corresponding to a light emissive layer in an organic light emitting display. An inter-subpixel region refers to a region between adjacent subpixel regions, such as a region corresponding to a black matrix in a liquid crystal display or a region corresponding a pixel definition layer in an organic light emitting display. Optionally, the inter-subpixel region is a region between adjacent subpixel regions in a same pixel. Optionally, the inter-subpixel region is a region between two adjacent subpixel regions from two adjacent pixels. As used herein, the term “bonding region” refers to a region of the display panel wherein a plurality of signal lines are connected to an integrated circuit ship. Optionally, the bonding region of the display panel includes a plurality of bonding pads. As used herein, the term “substantially opposite” means that two sides (e.g., a first side and a second side) need not be arranged exactly in parallel, but may be arranged in such a manner that an inclination between the two sides is defined, e.g., with an inclined angle less than 45 degrees, 30 degrees, 15 degrees, or 10 degrees.

In the present method, the plurality of vias are first formed in a plurality of pre-designated positions prior to disposing the integrated circuit chip on the second side of the display panel, followed by forming the plurality of connectors respectively in the plurality of vias respectively electrically connecting the plurality of first bonding pads and the plurality of second bonding pads. Because the plurality of vias are formed prior to placing the integrated circuit chip on the display panel, obviating any damage to the integrated circuit chip caused by the via-forming process (e.g., using laser to form the plurality of vias).

FIG. 2is a flow chart illustrating a method of bonding an integrated circuit chip to a display panel in some embodiments according to the present disclosure. Referring toFIG. 2, the method in some embodiments includes forming a plurality of first bonding pads in a bonding region on a first side of the display panel; forming an optical film and a protective film on a second side of the display panel substantially opposite to the first side, the protective film on a side of the optical film distal to the display panel; forming a plurality of vias extending through the display panel and the optical film in the bonding region, each of the plurality of vims extending through one of the plurality of first bonding pads or directly abutting an edge of one of the plurality of first bonding pads; subsequent to forming the plurality of vias, removing the protective film from the optical film; subsequent to removing the protective film, disposing an integrated circuit chip having a plurality of second bonding pads on aside of the optical film distal to the display panel, the plurality of second bonding pads being on a side of the integrated circuit chip proximal to the optical film, an orthographic projection of each of the plurality of first bonding pads on the display panel at least partially overlaps with an orthographic projection of one of the plurality of second bonding pads on the display panel; and electrically connecting the plurality of first bonding pads respectively with the plurality of second bonding pads by forming a plurality of connectors respectively in the plurality of vias. Optionally, the plurality of vias are formed by laser perforation.

Optionally, one or more of the plurality of vias not only extend through the display panel and the optical film in the bonding region, but also at least partially extend into the protective film. Optionally, the plurality of vias extend through the display panel, the optical film, and the protective film in the bonding region.

In some embodiments, each of the plurality of vias extend through one of the plurality of first bonding pads or directly abutting an edge of one of the plurality of first bonding pads. Optionally, an orifice of one of the plurality of vias on the first side is surrounded by one of the plurality of first bonding pads. Optionally, an orifice of one of the plurality of vias on the first side directly abuts one of the plurality of first bonding pads.

In some embodiment, the protective film is required. Optionally, the method in some embodiments includes forming a plurality of first bonding pads in a bonding region on a first side of the display panel; forming an optical film on a second side of the display panel substantially opposite to the first side; forming a plurality of vias extending through the display panel in the bonding region and the optical film, each of the plurality of vias extending through one of the plurality of first bonding pads or directly abutting an edge of one of the plurality of first bonding pads; subsequent to forming the plurality of vias, disposing an integrated circuit chip having a plurality of second bonding pads on a side of the optical film distal to the display panel, the plurality of second bonding pads being on a side of the integrated circuit chip proximal to the optical film, an orthographic projection of each of the plurality of first bonding pads on the display panel at least partially overlaps with an orthographic projection of one of the plurality of second bonding pads on the display panel; and electrically connecting the plurality of first bonding pads respectively with the plurality of second bonding pads by forming a plurality of connectors respectively in the plurality of vias.

FIG. 3is a schematic diagram illustrating the structure of a display panel in some embodiments according to the present disclosure.FIG. 4is a plan view of the display panel inFIG. 3. Referring toFIG. 3andFIG. 4, the display panel1has a display region and a bonding region. In the bonding region, the display panel1includes a plurality of first bonding pads2. The display panel has a first side S1and a second side S2substantially opposite to the first side S1. The plurality of bonding pads are on the first side S1. Optionally, the first side S1is a light emitting side of the display panel1, whereas the second side S2is a light non-emitting side of the display panel1.

FIG. 5illustrates a process of forming an optical film on a display panel in some embodiments according to the present disclosure. Referring toFIG. 5, an optical film3and a protective film4are formed on the second side S2of the display panel1. The protective film4is formed on a side of the optical film3distal to the display panel1. Optionally, the optical film3is in direct contact with the display panel1, and the protective film4is in direction contact with the optical film3. Optionally, the optical film3is attached to the display panel by an optically adhesive film.

Optionally, the optical film3extends throughout the display panel1. Optionally, the protective film4extends throughout the display panel1. Optionally, the protective film4is limited to the bonding region of the display panel1. Optionally, the protective film4is omitted entirely, i.e., only the optical film3is disposed on the second side S2of the display panel1.

FIG. 6Aillustrates a process of forming a plurality of vias in a bonding region of a display panel in some embodiments according to the present disclosure. Referring toFIG. 6A, the plurality of vias5respectively extend through the plurality of first bonding pads2. Each of the pre-designated positions for forming the plurality of vias5is adjacent to an edge of one of the plurality of first bonding pads2. Optionally, the plurality of vias5extend through an entire thickness of the display panel1and the optical film3, as shown inFIG. 6A. Optionally, the plurality of vias5do not extend into the protective film4. Optionally, the plurality of vias5at least partially extend into the protective film4.

FIG. 6Billustrates a process of forming a plurality of vias in a bonding region of a display panel in some embodiments according to the present disclosure. Referring toFIG. 6B, each of the plurality of vias5is directly abutting an edge of one of the plurality of first bonding pads2. The step of forming the plurality of vias5includes removing a portion of each of the plurality of first bonding pads2at its edge. Each of the pre-designated positions for forming the plurality of vias5is at an edge of one of the plurality of first bonding pads2. Optionally, the plurality of vias5extend through an entire thickness of the display panel1and the optical film3, as shown inFIG. 6B. Optionally, the plurality of vias5do not extend into the protective film4. Optionally, the plurality of vias5at least partially extend into the protective film4.

FIG. 6Cillustrates a process of forming a plurality of vias in a bonding region of a display panel in some embodiments according to the present disclosure. Referring toFIG. 6C, each of the plurality of vias5is directly abutting an edge of one of the plurality of first bonding pads2. The step of forming the plurality of vias5does not involve removing any portion of the plurality of first bonding pads2. Each of the pre-designated positions for forming the plurality of vias5is directly abutting an edge of one of the plurality of first bonding pads2. Optionally, the plurality of vias5extend through an entire thickness of the display panel1and the optical film3, as shown inFIG. 6C. Optionally, the plurality of vias5do not extend into the protective film4. Optionally, the plurality of vias5at least partially extend into the protective film4.

Optionally, the step of forming the plurality of vias5is performed by laser perforation.

FIG. 7illustrates a process of removing a protective film from a display panel in some embodiments according to the present disclosure. Referring toFIG. 7, subsequent to forming the plurality of vias, the protective film4is removed from the surface of the optical film3.

FIG. 8is a schematic diagram illustrating the structure of an integrated circuit chip in some embodiments according to the present disclosure.FIG. 9is a plan view of the integrated circuit chip inFIG. 8. Referring toFIG. 8andFIG. 9, the integrated circuit chip7includes a plurality of second bonding pads8. Optionally, the plurality of second bonding pads8are on one side of the integrated circuit chip7.

FIG. 10illustrates a process of attaching an integrated circuit chip in a bonding region of a display panel in some embodiments according to the present disclosure. Referring toFIG. 10, subsequent to removing the protective film, the integrated circuit chip7having a plurality of second bonding pads8is disposed on the second side S2of the display panel1. Specifically, the integrated circuit chip7is placed on the display panel1in a way so that the plurality of second bonding pads8are on a side of the optical film3distal to the display panel1, e.g., the plurality of second bonding pads8are on a side of the integrated circuit chip7proximal to the optical film3. Optionally, an orthographic projection of each of the plurality of first bonding pads2on the display panel1at least partially overlaps with an orthographic projection of one of the plurality of second bonding pads8on the display panel1. Optionally, the plurality of first bonding pads2and the plurality of second bonding pads8have a one-to-one corresponding relationship. Optionally, the plurality of second bonding pads8are in direct contact with the optical film3.

Optionally, the method further includes, subsequent to disposing the integrated circuit chip7having a plurality of second bonding pads8on the second side S2of the display panel, aligning the plurality of first bonding pads2and the plurality of second bonding pads8with each other so that the orthographic projection of each of the plurality of first bonding pads2on the display panel1at least partially overlaps with the orthographic projection of one of the plurality of second bonding pads8on the display panel1. Optionally, the orthographic projection of each of the plurality of first bonding pads2on the display panel1substantially overlaps with the orthographic projection of one of the plurality of second bonding pads8on the display panel1. Optionally, the orthographic projection of each of the plurality of first bonding pads2on the display panel1substantially covers the orthographic projection of one of the plurality of second bonding pads8on the display panel1. Optionally, the orthographic projection of each of the plurality of second bonding pads8on the display panel1substantially covers the orthographic projection of one of the plurality of first bonding pads2on the display panel1.

In some embodiments, the orthographic projection of each of the plurality of first bonding pads2on the display panel1at least partially overlaps with the orthographic projection of one of the plurality of second bonding pads8on the display panel1, thereby forming an overlapping region. Optionally, each of the pro-designated positions for forming the plurality of vias5is at least partially in the overlapping region. Optionally, each of the pre-designated positions for forming the plurality of vias5is in the overlapping region, and adjacent to an edge of the overlapping region. Optionally, one or more of the pre-designated positions for forming the plurality of vias5is entirely in the overlapping region (see, e.g.,FIG. 6A). Optionally, each of the pre-designated positions for forming the plurality of vias5is in the overlapping region, and directly abuts an edge of the overlapping region (see, e.g.,FIG. 6B). Optionally, each of the pre-designated positions for forming the plurality of vias5is outside the overlapping region, and directly abuts an edge of the overlapping region (see, e.g.,FIG. 6C).

FIG. 11Aillustrates a process of bonding an integrated circuit chip to a display panel in some embodiments according to the present disclosure. The structure of the assembly of the integrated circuit chip and the display panel corresponds to that inFIG. 6A.FIG. 11Billustrates a process of bonding an integrated circuit chip to a display panel in some embodiments according to the present disclosure. The structure of the assembly of the integrated circuit chip and the display panel corresponds to that inFIG. 6B.FIG. 11Cillustrates a process of bonding an integrated circuit chip to a display panel in some embodiments according to the present disclosure. The structure of the assembly of the integrated circuit chip and the display panel corresponds to that inFIG. 6C. Referring toFIGS. 11A to 11C, a plurality of connectors9are formed respectively in the plurality of vias. Each of the plurality of connectors9electrically connects one of the plurality of first bonding pads2and one of the plurality of second bonding pads8.

In some embodiments, the step of forming the plurality of connectors9respectively in the plurality of vias includes sputtering a conductive material in the plurality of vias, thereby forming the plurality of connectors9respectively electrically connecting the plurality of first bonding pads2and the plurality of second bonding pads8.

In some embodiments, the step of forming the plurality of connectors9respectively in the plurality of vias includes depositing a conductive material layer following by patterning the conductive material layer to form the plurality of connectors9. Specifically, the step of patterning the conductive material layer in some embodiments includes forming a photoresist layer, exposing the photoresist layer with a mask plate, developing the exposed photoresist layer thereby forming a photoresist pattern, etching the conductive material layer in regions exposed by the photoresist pattern, and removing the photoresist layer, thereby forming the plurality of connectors9in the plurality of vias.

Optionally, the plurality of connectors9include a metallic material such as a metal or an alloy. Optionally, the metallic material is aluminum.

The plurality of first bonding pads2and the plurality of second bonding pads8include a conductive material such as a metal.

In the present method, the plurality of vias are first formed in a plurality of pre-designated positions prior to disposing the integrated circuit chip on the second side of the display panel, followed by forming the plurality of connectors respectively in the plurality of vias respectively electrically connecting the plurality of first bonding pads and the plurality of second bonding pads. Because the plurality of vias are formed prior to placing the integrated circuit chip on the display panel, obviating any damage to the integrated circuit chip caused by the via-forming process (e.g., using laser to form the plurality of vias).

In another aspect, the present disclosure provides a display apparatus having a display panel and an integrated circuit chip, wherein the integrated circuit chip is bonded to the display panel by a method described herein. Optionally, the display panel is a flexible display panel, and the display apparatus is a flexible display apparatus. Optionally, the display apparatus is a display apparatus with a narrow bezel or an extremely narrow bezel. Optionally, the display apparatus is a liquid crystal display apparatus. Optionally, the display apparatus is an organic light emitting diode display apparatus. Optionally, the display apparatus is an electrophoretic display apparatus. Examples of touch display apparatuses include, but are not limited to, an electronic paper, a mobile phone, a tablet computer, a television, a notebook computer, a digital album, a GPS, etc.