The present disclosure relates to a method of gettering that provides for a high efficiency gettering process by increasing an area in which a getter layer is deposited, and an associated apparatus. In some embodiments, the method is performed by providing a substrate into a processing chamber having one or more residual gases. A cavity is formed within a top surface of the substrate. The cavity has a bottom surface and sidewalls extending from the bottom surface to the top surface. A getter layer, which absorbs the one or more residual gases, is deposited over the substrate at a position extending from the bottom surface of the cavity to a location on the sidewalls. By depositing the getter layer to extend to a location on the sidewalls of the cavity, the area of the substrate that is able to absorb the one or more residual gases is increased.

BACKGROUND

Gettering is a process by which unwanted particles are removed (i.e., gettered) from a system. For example, gettering may be used to remove unwanted residual gas molecules from a processing chamber that is under vacuum. By removing the unwanted gas molecules from the chamber, the gettering process reduces a pressure of the vacuum.

Gettering may be performed within a processing chamber by using a vapor deposition technique to deposit a getter layer comprising a plurality of gettering molecules. When a residual gas molecule within the processing chamber comes into contact with a vaporized gettering molecule, the residual gas molecule will combine with the vaporized gettering molecule. The combined gas molecule and gettering molecule are subsequently deposited on the substrate, thereby removing the gas molecule from the vacuum.

DETAILED DESCRIPTION

The description herein is made with reference to the drawings, wherein like reference numerals are generally utilized to refer to like elements throughout, and wherein the various structures are not necessarily drawn to scale. In the following description, for purposes of explanation, numerous specific details are set forth in order to facilitate understanding. It may be evident, however, to one skilled in the art, that one or more aspects described herein may be practiced with a lesser degree of these specific details. In other instances, known structures and devices are shown in block diagram form to facilitate understanding.

MEMs (microelectromechanical system) sensor devices often operate by sensing a characteristic of an environment surrounding the device. For example, to measure an angular momentum, a MEMs vibrational gyroscope may measure a change in an electric field of vibrating particles in proximity to the device. To improve operation of a device, it may be desirable to operate at a specific pressure that enables improved measurement of a desired parameter. For example, in the case of a MEMs vibrational gyroscope, a low pressure vacuum provides for a better measurement since it mitigates background noise.

Therefore, MEMs devices typically have a hermetically-sealed chamber that is held at a controlled pressure level that enables operation of the device. To form the chamber a cap wafer may be eutectically bonded onto a device wafer within a processing chamber. For some MEMs devices, outgassing of residual gases within the processing chamber will increase a pressure within the hermetically-sealed chamber and thereby reduce the sensitivity of an associated MEMs device. To improve a vacuum within the processing chamber, a gettering process may be used to absorb the residual gases. The gettering process deposits a getter layer onto a bottom surface of a cavity within a cap wafer, by way a vapor deposition process, to absorb the residual gases. However, it has been appreciated that if the processing chamber is large, the deposition of a getter layer onto a bottom of the cavity may be unable to absorb enough residual gases to substantially reduce a pressure within the processing chamber.

Accordingly, the present disclosure relates to a method of gettering that provides for a high efficiency gettering process by increasing an area in which a getter layer is deposited, and an associated apparatus. In some embodiments, the method comprises providing a substrate into a processing chamber having one or more residual gases. A cavity is formed within a top surface of the substrate. The cavity comprises a bottom surface and sidewalls extending from the bottom surface to the top surface of the substrate. A getter layer, configured to absorb the one or more residual gases, is deposited over the substrate at a position extending from the bottom surface of the cavity to a location on the sidewalls. By depositing the getter layer to extend to a location on the sidewalls of the cavity, the area of the substrate that is able to absorb the one or more residual gases is increased, thereby increasing an efficiency of the disclosed gettering process.

FIG. 1illustrates a flow diagram of some embodiments of a method100of gettering. The method100increases gettering efficiency by providing for a gettering area, configured to receive a getter layer, which extends beyond a bottom surface of a cavity within a cap wafer.

At102, a substrate is provided into a processing chamber having one or more residual gases. The one or more residual gases comprise gases that remain after a low pressure vacuum has been formed within the processing chamber. The substrate may comprise a semiconductor substrate (e.g., a silicon substrate). In some embodiments, the substrate may comprise a cap wafer configured to form a capping structure of a hermetically sealed chamber in a MEMs (microelectromechanical system) structure. In other embodiments, the substrate may comprise a device wafer (e.g., an ASIC wafer) comprising one or more semiconductor devices.

At104, a cavity is formed within the substrate. In some embodiments, the cavity is formed at a position located between bonding areas comprising sections of a bonding layer configured to affix the substrate (e.g., a cap wafer) to an additional substrate (e.g., a device wafer having one or more MEMs devices). The cavity comprises a depression in the substrate having sidewalls that extend from a top surface of the substrate to a bottom surface of the cavity.

At106, a getter layer is deposited onto the substrate at a position that extends from the bottom surface of the cavity to a location overlying the sidewalls. In some embodiments, the getter layer extends from the bottom surface of the cavity to a location overlying the bonding layers disposed on the top surface of the substrate. In such embodiments, the resulting getter layer covers the bottom surface of the cavity, the sidewalls of the cavity, and a part of the top surface of the substrate. By depositing the getter layer to extend along the sidewalls and top surface of the substrate, the gettering area that is configured to receive the getter layer is increased, thereby increasing the surface area of the substrate that is able to absorb the one or more residual gases. In some embodiments, the getter layer may be deposited by way of a vapor deposition technique (e.g., a chemical vapor deposition, a physical vapor deposition, etc.).

At108, the getter layer may be selectively etched to expose the bonding layer.

At110, the substrate may be bonded to an additional substrate to form a sealed chamber therebetween. In some embodiments, the substrate may comprise a cap wafer that is bonded to an additional substrate comprising a device wafer having one or more MEMs devices. In other embodiments, the substrate may comprise a device wafer (e.g., an ASIC substrate) that is bonded to an additional wafer comprising a cap wafer. The substrate may be bonded to the additional substrate by way of a eutectic bonding process. In some embodiments, the substrate may be bonded to the additional substrate in-situ within the processing chamber (i.e., without removing the substrate from a processing chamber) so that the bonding occurs at the reduced pressure achieved by the disclosed gettering process.

FIG. 2illustrates some embodiments of a cross-sectional view200of a substrate202upon which a disclosed getter layer208has been deposited.

The substrate202comprises a cavity204that extends from a top surface207of the substrate202to a position within the substrate202. The cavity204has interior surfaces comprising a bottom surface206and sidewalls205. In some embodiments, the substrate202may comprise a semiconductor material, such as silicon, for example.

A bonding layer210is disposed onto the top surface207of the substrate202at positions adjacent to the cavity204. In some embodiments, the bonding layer210is set back from edges of the cavity204, so as to provide for a space between the bonding layer210and the cavity204. In some embodiments, the bonding layer210may comprise a eutectic bonding layer having a metal such as aluminum or germanium, for example. In other embodiments, the bonding layer210may comprise an oxide (for a fusion bonding process), or a metal or a polymer (for a thermal compression bonding process).

A getter layer208, configured to absorb unwanted residual gases, is disposed over the substrate202. The getter layer208extends from the bottom surface206of the cavity onto the sidewalls205. In some embodiments, the getter layer208may be disposed onto the bottom surface206, the sidewalls205, and a part of the top surface207. In such embodiments, the bonding layer210is configured to extend through the getter layer208from the substrate202to a position above the getter layer208. In various embodiments, the getter layer208may comprise barium (Ba), titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), iron (Fe), cobalt (Co), aluminum (Al), and/or silicon (Si), for example.

Since the getter layer208is disposed onto the bottom surface206, the sidewalls205, and the top surface207of the substrate202, it provides for a large gettering area that is able to absorb residual gases within a processing chamber. Therefore, the getter layer208provides for efficient capture of the residual gases.

In some embodiments, the substrate202may comprise a cap wafer configured to form a capping structure of a hermetically sealed chamber in a MEMs (microelectromechanical system) structure. In such embodiments, a device wafer214having a MEMs device216may be disposed onto the bonding layer210. The bonding layer210is configured to affix the device wafer214to the substrate202(i.e., cap wafer) causing the cavity204to form a hermetically sealed chamber abutting the MEMs device216. In some embodiments, the bonding layer210may be bonded to the device wafer214at an interface comprising a second bonding layer212. For example, in a eutectic bonding process, bonding layer210may comprise germanium and the second bonding layer212may comprise aluminum.

In some embodiments, an additional getter layer208bmay be deposited onto the device wafer214(e.g., ASIC wafer) comprising one or more semiconductor devices. Depositing the additional getter layer208bonto the device wafer214reduces pressure within a processing chamber (holding the device wafer) by absorbing residual gases and by reducing outgases from the device wafer214. This is because the getter layer208will cover the one or more semiconductor devices, which may comprise an exposed oxide material and/or an exposed nitride material, which provide for significant outgassing of residual gases. In some embodiments, the getter layer208bmay be deposited onto the device wafer214without being deposited onto the substrate202.

FIG. 3illustrates some alternative embodiments of a cross-sectional view300of a substrate202upon which a getter layer308has been deposited.

The substrate202comprises a cavity306as described above. A bonding layer210is disposed onto the top surface207of the substrate202at positions adjacent to the cavity306. In some embodiments, the bonding layer210may comprise a eutectic bonding layer having a metal such as aluminum or germanium, for example. In other embodiments, the bonding layer210may comprise an oxide (for a fusion bonding process), or a metal or a polymer (for a thermal compression bonding process).

A getter layer302, configured to absorb unwanted residual gases, is disposed over the substrate202. In some embodiments, the getter layer302extends from the bottom surface206of the cavity to a location abutting the bonding layer210. The bonding layer210is configured to extend through the getter layer302from the substrate202to a position above the getter layer208. The getter layer302comprises one or more openings304that expose the underlying substrate202at positions within the cavity306. It will be appreciated that although the one or more openings304are illustrated on the bottom surface206, the one or more openings304may be located at any position within the getter layer302. For example, in some embodiments, the one or more openings304may be positioned along the top surface207of the substrate202or along the sidewalls205of the cavity306.

In some embodiments, an additional getter layer302bmay be deposited onto the device wafer214(e.g., ASIC wafer). The additional getter layer302bcomprises one or more openings304bthat expose the underlying device wafer214. In some embodiments, the getter layer302bmay be deposited onto the device wafer214without being deposited onto the substrate202.

FIG. 4illustrates a cross-sectional view of some embodiments of a MEMs (microelectromechanical system) structure400with a socket-type eutectic bond that provides for a sealed chamber414having a getter layer402.

The MEMs structure400comprises a cap wafer401and a device wafer403. The device wafer403comprises a MEMs device having a proof mass412located within a chamber414(e.g., a hermetically sealed chamber). The proof mass412is configured to move within the chamber414depending upon a force that operates upon the MEMs structure400. As the proof mass412moves, sensors (not shown) are configured to measure changes in the system caused by the motion and to calculate a desired parameter based upon the measured changes. For example, for a MEMs accelerometer, the proof mass412is configured to change position based upon a force of acceleration. As the proof mass412moves, a change in capacitance (corresponding to the acceleration) may be measured. In various embodiments, the MEMs device may comprise a MEMs gyroscope, a MEMs accelerometer, or a MEMs pressure sensor, for example.

The device wafer403comprises first and second cavities,416aand416b, disposed within the device wafer403. In some embodiments, the device wafer403comprises an inter-metal dielectric (IMD) layer406disposed onto a MEMs wafer410. In some embodiments, the MEMs wafer410may comprise an ASIC (application specific integrated circuit) substrate. The IMD layer406comprises one or more metal interconnect layers408configured to electrically couple the MEMs device to one or more logic devices (e.g., CMOS transistors that make the MEMs device function), located within the MEMs wafer410. In some embodiments, the IMD layer406may connect the proof mass412to a MEMs wafer410comprising one or more stacked wafers (e.g., a 2.5D integrated chip), wherein the one or more stacked wafers comprise one or more logic devices that make the MEMs device function.

In some embodiments, a semiconductor substrate404may be disposed onto an opposite side of the IMD layer406as the MEMs wafer410. In such embodiments, the first and second cavities,416aand416b, may extend though the semiconductor substrate404to expose the IMD layer406.

The cap wafer401comprises first and second standoff structures,418aand418b, which extend outward from the substrate202as positive reliefs. The first and second standoff structures,418aand418b, are disposed at positions corresponding to the first and second cavities,416aand416b. The first and second cavities,416aand416b, provide an opening for the stand-off structures,418aand418bto bond to the IMD layer406at an interface comprising a bonding layer210configured to affix the cap wafer401to the device wafer403. When the device wafer403is brought into contact with the cap wafer401the chamber414is formed therebetween.

A getter layer402is positioned over the cap wafer401. The getter layer402is disposed onto the cap wafer401at positions along the sidewalls and the top surface of the standoff structures418aand418b. In some embodiments, the getter layer402abuts the bonding layer210, so that the bonding layer210extends through the getter layer402.

FIG. 5illustrates a cross-sectional view of some embodiments of a MEMs (microelectromechanical system) structure500with a bond-on-MEMs-type eutectic bond that provides for a sealed chamber having a getter layer502.

The MEMs structure500comprises a cap wafer501and a device wafer503having a MEMs device. The device wafer503comprises a MEMs device having a proof mass412located within a chamber506(e.g., a hermetically sealed chamber). In some embodiments, the device wafer503comprises an inter-metal dielectric (IMD) layer406disposed onto a MEMs wafer410. The IMD layer406comprises one or more metal interconnect layer408(e.g., copper wires and/or vias) configured to electrically couple the MEMs device to one or more logic devices (e.g., CMOS transistors) within the MEMs wafer410. In some embodiments, a semiconductor substrate504may be disposed onto an opposite side of the IMD layer406as the MEMs wafer410.

The cap wafer501comprises first and second standoff structures,508aand508b, which extend outward from a rectangular structure of the cap wafer501as positive reliefs. A bonding layer210, configured to affix the device wafer503to the cap wafer501, is disposed onto the first and second standoff structures,508aand508b. The bonding layer210is configured to contact the device wafer503at the semiconductor substrate504. When the device wafer503is brought into contact with the cap wafer501the chamber506is formed therebetween.

A getter layer502is positioned over the cap wafer501. The getter layer502is disposed onto the cap wafer501at positions along the sidewalls and the top surface of the standoff structures508aand508b. In some embodiments, the getter layer502abuts the bonding layer210, so that the bonding layer210extends through the getter layer502.

FIG. 6illustrates a flow diagram of some embodiments of a method600of gettering.

At602, a substrate is provided to a processing chamber held under vacuum. In some embodiments, the substrate may comprise a cap wafer configured to operate as a capping structure that forms hermetically sealed chambers for a MEMs (microelectromechanical system) device. In other embodiments, the substrate may comprise a device wafer (e.g., an ASIC substrate) having one or more semiconductor devices.

At604, one or more cavities are selectively etched in the substrate at positions between bonding areas. In some embodiments, the one or more cavities are selectively formed in the substrate by forming a hard mask over the substrate and then by subsequently etching the substrate according to the hard mask.

At606, a bonding layer is formed within the bonding areas. In some embodiments, the bonding layer comprises a eutectic metal that is used in a eutectic bonding process. In some embodiments, the eutectic metal may comprise germanium or aluminum.

At608, a getter layer is deposited over the substrate. The getter layer is deposited over the substrate so as to extend from a bottom surface of the cavities to a position overlying the bonding layer. In some embodiments, the getter layer is deposited onto the bottom and sidewalls of the cavities as well as on the top surface of the substrate.

At610, a protective layer is deposited over the getter layer. In various embodiments, the protective layer may comprise an oxide or a layer of photoresist material.

At612, a thickness of the protective layer is reduced to expose the getter layer at positions overlying the bonding layer. In some embodiments, the thickness of the protective layer may be reduced by etching the protective layer using a dry etching process.

At614, the getter layer is selectively etched to expose the bonding layer. In some embodiments, the getter layer is selectively etched using a wet etching process.

At616, the protective layer is removed from the substrate. In some embodiments, the protective layer may be removed from the substrate by etching the protective layer using a wet or dry etching process.

At618, the substrate is bonded to an additional substrate at an interface comprising the bonding layer. In some embodiments, wherein the substrate comprises a cap wafer, the substrate is bonded to a device wafer having one or more MEMs devices and/or semiconductor devices.

FIGS. 7-13Billustrate cross-sectional views of some embodiments of a substrate upon which a method of gettering is performed. AlthoughFIGS. 7-13Bare described in relation to method600, it will be appreciated that the structures disclosed inFIGS. 7-13Bare not limited to such a method, but instead may stand alone as a structure.

FIG. 7illustrates some embodiments of a cross-sectional view700corresponding to acts602-604. As shown in cross-sectional view700, a substrate202is provided. The substrate202may comprise a semiconductor substrate, such as a silicon substrate for example. A cavity702is formed within the substrate202. The cavity702extends from a top surface207of the substrate202to a position within the substrate202. The cavity702has interior surfaces comprising sidewalls205and a bottom surface206. In some embodiments, the cavity702may be formed by selectively etching the substrate202according to a hard mask (not shown) configured to define the location of cavity702within the substrate202. In various embodiments, the hard mask may comprise an oxide or a nitride (e.g., SiN), for example.

A bonding layer210is formed on the top surface207of the substrate202within bonding areas. In some embodiments, the bonding layer210is set back from edges of the cavity702, so as to provide for a space between the bonding layer210and the cavity702. In some embodiments, the bonding layer210may comprise a eutectic bonding layer having a metal such as aluminum or germanium, for example. In other embodiments, the bonding layer210may comprise an oxide (for a fusion bonding process), or a metal or a polymer (for a thermal compression bonding process).

FIG. 8illustrates some embodiments of a cross-sectional view800corresponding to act606. As shown in cross-sectional view800, a getter layer802is deposited over the substrate202. The getter layer802is deposited over the bottom surface206of the cavity702, the sidewalls205of the cavity702, and the top surface of the substrate202. In some embodiments, the getter layer802may be deposited by a vapor deposition technique, such as a physical vapor deposition or a chemical vapor deposition. In various embodiments, the getter layer802may comprise barium (Ba), titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), iron (Fe), cobalt (Co), aluminum (Al), or silicon (Si), for example.

FIG. 9illustrates some embodiments of a cross-sectional view900corresponding to act608. As shown in cross-sectional view900, a protective layer902is formed over the substrate202. The protective layer902may have a first thickness t1, as illustrated, that is greater than the combined height of the getter layer802and the bonding layer210. In some embodiments, the protective layer902is formed onto the getter layer802. In various embodiments, the protective layer902may comprise a photoresist layer deposited by a spin coating process or an oxide layer deposited by a vapor deposition process.

As shown in cross-sectional view1000, the thickness of the protective layer902is reduced from the first thickness t1to a second thickness t2. The second thickness t2is less than the combined height of the getter layer802and the bonding layer210, thereby resulting in openings,1004aand1004b, that exposing the getter layer802overlying the bonding layer210. In some embodiments, the thickness of the protective layer1002amay be reduced by exposing the protective layer1002ato an etchant1006configured to etch back the protective layer1002ato form the openings,1004aand1004b, that expose the getter layer802at positions above the bonding layer210. In some embodiments, the protective layer1002amay be selectively etched back using a dry etching process. For example, the dry etching process may use an etch chemistry comprising C4F8(octafluorocyclobutane). In other embodiments, the protective layer1002amay be selectively etched back using a wet etching process (e.g., comprising ammonium fluoride (NH4F) and/or hydrogen fluoride (HF)).

As shown in cross-sectional view1008, in some embodiments, the protective layer1002bmay be selectively exposed to an etchant1006configured to etch back the protective layer1002bto form additional openings1010that expose the getter layer802at additional positions. By exposing the getter layer802at additional positions, the position of the getter layer802can be controlled.

As shown in cross-sectional view1100, the section of the getter layer208exposed by openings,1004aand1004b, are exposed to an etchant1102configured to remove the getter layer208from over the bonding layer210. In some embodiments, the getter layer208may be selectively etched using an etchant having a high etching selectivity that removes the exposed getter layer208without removing the protective layer1002. The resulting getter layer208surrounds the bonding layer210, so that the bonding layer210extends through the getter layer208from the substrate202to a position above the getter layer208.

As shown in cross-sectional view1104, sections of the getter layer302exposed by the additional openings1010may also be exposed to an etchant1102configured to remove the getter layer302at additional positions. By removing the getter layer302at additional positions, the position of the getter layer302can be controlled.

FIGS. 12A-12Billustrate some embodiments of cross-sectional views1200and1204, corresponding to act614. As shown in cross-sectional views,1200and1204, the protective layer1002is removed. In some embodiments, the protective layer1002may be removed using a wet etching process or a dry etching process. For example, a dry etching process comprising an etch chemistry having C4F8may be used to remove a protective layer comprising an oxide. Alternatively, a protective layer comprising photoresist may be removed using a dry etching process or a wet etchant (e.g., acetone), for example.

FIGS. 13A-13Billustrate some embodiments of a cross-sectional views,1300and1304, corresponding to act616. As shown in cross-sectional views,1300and1304, a device wafer214(e.g., ASIC substrate) having one or more MEMs devices,216, may be brought into contact with the substrate202at an interface comprising the bonding layer210. In some embodiments, the bonding layer210may be brought into contact with a second bonding layer212. Bringing the device wafer214into contact with the substrate202results in the formation of sealed chambers1306abutting the one or more MEMs devices1302.

As shown in cross-sectional view1300, in some embodiments, the device wafer may comprise a getter layer204bdeposited according to the steps602-616of method600.

As shown in cross-sectional view1300, in some embodiments, the device wafer may comprise a getter layer302bdeposited according to the steps602-616of method600. Getter layer302bcomprises one or more openings304bthat expose the underlying device wafer214.

It will be appreciated that while reference is made throughout this document to exemplary structures in discussing aspects of methodologies described herein (e.g., the structure presented inFIGS. 7-13B, while discussing the methodology set forth inFIG. 6), that those methodologies are not to be limited by the corresponding structures presented. Rather, the methodologies (and structures) are to be considered independent of one another and able to stand alone and be practiced without regard to any of the particular aspects depicted in the Figs. Additionally, layers described herein, can be formed in any suitable manner, such as with spin on, sputtering, growth and/or deposition techniques, etc.

Also, equivalent alterations and/or modifications may occur to those skilled in the art based upon a reading and/or understanding of the specification and annexed drawings. The disclosure herein includes all such modifications and alterations and is generally not intended to be limited thereby. For example, although the figures provided herein, are illustrated and described to have a particular doping type, it will be appreciated that alternative doping types may be utilized as will be appreciated by one of ordinary skill in the art.

In addition, while a particular feature or aspect may have been disclosed with respect to only one of several implementations, such feature or aspect may be combined with one or more other features and/or aspects of other implementations as may be desired. Furthermore, to the extent that the terms “includes”, “having”, “has”, “with”, and/or variants thereof are used herein, such terms are intended to be inclusive in meaning—like “comprising.” Also, “exemplary” is merely meant to mean an example, rather than the best. It is also to be appreciated that features, layers and/or elements depicted herein are illustrated with particular dimensions and/or orientations relative to one another for purposes of simplicity and ease of understanding, and that the actual dimensions and/or orientations may differ substantially from that illustrated herein

The present disclosure relates to a method of gettering that provides for a high efficiency gettering process by increasing an area in which a getter layer is deposited, and an associated apparatus

In some embodiments, the present disclosure relates to a method of gettering. The method comprises providing a substrate into a processing chamber having one or more residual gases and forming a cavity within a top surface of the substrate, wherein the cavity comprises a bottom surface and sidewalls extending from the bottom surface to the top surface of the substrate. The method further comprises depositing a getter layer, configured to absorb the one or more residual gases, over the substrate at a position extending from the bottom surface of the cavity to a location on the sidewalls.

In other embodiments, the present disclosure relates to a method of forming a getter layer. The method comprises providing a substrate into a processing chamber having one or more residual gases and forming a cavity within a top surface of the substrate. The method further comprises depositing a bonding layer within bonding areas located around the cavity. The method further comprises depositing a getter layer over the substrate at a position extending from a bottom surface of the cavity to a location extending over the bonding layer. The method further comprises depositing a protective layer over the getter layer and reducing a thickness of the protective layer to expose the getter layer at openings overlying the bonding layer. The method further comprises removing the getter layer at the openings, resulting in a bonding layer that extends through the getter layer. The method further comprises removing the protective layer.

In yet other embodiments, the present disclosure relates to a MEMs (microelectromechanical system) device. The MEMs device comprises a substrate comprising a one or more cavities disposed between bonding areas on a top surface of the substrate, wherein the one or more cavities comprise a bottom surface and sidewalls extending from the bottom surface to the top surface of the substrate. The MEMs device further comprises a bonding layer disposed within the bonding areas. The MEMs device further comprises a getter layer onto the substrate at a position extending from the bottom surface to a location overlying the bonding layer.