NUCLEAR MEDICINE DIAGNOSTIC APPARATUS

A nuclear medicine diagnostic apparatus according to a present embodiment includes a plurality of units of detector that detects gamma rays, and each of the units of detector includes detection circuitry, generation circuitry, and first production circuitry. The detection circuitry detects an analog signal based on a result of detecting the gamma rays. The generation circuitry generates a clock signal. The first production circuitry produces time information by converting the analog signal into a digital signal on the basis of the clock signal.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is based upon and claims the benefit of priority from Japanese Patent Application No. 2021-145964, filed on Sep. 8, 2021; the entire contents of which are incorporated herein by reference.

FIELD

Embodiments disclosed herein generally relate to a nuclear medicine diagnostic apparatus.

BACKGROUND

Conventionally, a positron emission tomography (PET) apparatus specifies sets of counting information that counts annihilation gamma rays at substantially the same time from counting information of annihilation gamma rays detected by a plurality of units of detector, and generates a PET image on the basis of coincidence counting information in which the specified sets of counting information are correlated.

In such a PET apparatus, it is important to synchronize time information between the units of detector in order to obtain a high-quality PET image. Therefore, for example, a technique of supplying each of the units of detector with a clock signal output from a single oscillator is known.

However, in such a technique, it is necessary to prepare a cable with equal-length wiring for supplying a clock signal or a synchronization signal between the oscillator and each unit of detector, which increases device price and reduces reliability. Such problems are not limited to the PET apparatus, but may occur in other nuclear medicine diagnostic apparatuses as well.

DETAILED DESCRIPTION

A nuclear medicine diagnostic apparatus according to a present embodiment includes a plurality of units of detector that detects gamma rays, and each of the units of detector includes detection circuitry, generation circuitry, and first production circuitry. The detection circuitry detects an analog signal based on a result of detecting the gamma rays. The generation circuitry generates a clock signal. The first production circuitry produces time information by converting the analog signal into a digital signal on the basis of the clock signal.

Hereinafter, embodiments of a nuclear medicine diagnostic apparatus disclosed in the present application are described in detail with reference to the drawings. Hereinafter, an embodiment of a PET apparatus is described as an example of the nuclear medicine diagnostic apparatus.

Embodiment

FIG.1is a diagram illustrating a configuration example of a PET apparatus according to the present embodiment;

For example, as illustrated inFIG.1, a PET apparatus100according to the present embodiment includes a gantry device10and a console device20.

The gantry device10detects annihilation gamma rays emitted when positrons emitted from a tracer administered to a subject P are annihilated with electrons, and collects counting information by counting the detected annihilation gamma rays. The gantry device10has a cylindrical opening formed to penetrate the gantry device10in the horizontal direction, and detects annihilation gamma rays emitted from the subject P disposed in the opening. Hereinafter, a direction along an axis of the cylindrical opening of the gantry device10is defined as a Z-axis direction, a horizontal direction orthogonal to the Z-axis direction is defined as an X-axis direction, and a vertical direction orthogonal to the Z-axis direction is defined as a Y-axis direction.

Specifically, the gantry device10includes a couchtop11, a couch12, a couch driving mechanism13, a PET detector14, and counting information collection circuitry15.

The couchtop11is a bed on which the subject P is placed. For example, the couchtop11is formed in a rectangular flat plate shape and disposed so that a longitudinal direction is parallel to the Z-axis direction.

The couch12supports the couchtop11so as to be movable in the X-axis direction, the Y-axis direction, and the Z-axis direction.

The couch driving mechanism13is provided inside or outside the couch12and moves the couchtop11supported by the couch12. For example, when the subject P is imaged, the couch driving mechanism13moves the couchtop11, on which the subject P is placed, to the opening of the gantry device10. For example, in a state in which the position of the couch12is fixed, the couch driving mechanism13moves the couchtop11on the couch12. Alternatively, for example, the couch driving mechanism13may include a moving base and move the couchtop11together with the couch12on the moving base.

The PET detector14detects annihilation gamma rays emitted from the subject P. Then, the PET detector14produces counting information including the detection position, energy value, and detection time of the detected annihilation gamma rays, and transmits the produced counting information to the console device20.

Specifically, the PET detector14includes a plurality of detector units14aarranged in a ring shape around a Z-axis to surround the opening formed in the gantry device10, and each detector unit14adetects annihilation gamma rays and produces counting information.

For example, the detector unit14ais a photon counting type or Anger type detector and includes scintillators, photodetectors, and light guides.

The scintillator converts the incident annihilation gamma rays emitted from the positrons in the subject P into scintillation light and outputs the scintillation light. For example, the scintillator is formed of scintillator crystals suitable for energy measurement, such as LaBr3, LYSO, LSO, LGSO, BGO, GAGG, and LuAG. For example, the scintillators are arranged two-dimensionally.

The photodetector detects the scintillation light output from the scintillator and converts the scintillation light into an analog signal. For example, the photodetector is configured by a photomultiplier tube such as a photomultiplier (PMT) or a silicon photomultiplier (SiPM).

The light guide is formed of a plastic material or the like with excellent light transmission properties and transmits the scintillation light output from the scintillator to the photodetector.

The detector unit14amay be a non-Anger type detector in which scintillators and photodetectors are optically coupled in a one-to-one manner and there are no light guides. Alternatively, for example, the detector unit14amay not be an indirect conversion detector using scintillators, but a direct conversion detector using semiconductors such as CZT, CdTe, Ge, and Si.

Then, the detector unit14aproduces counting information including the detection position, energy value, and detection time of the annihilation gamma rays on the basis of the analog signal output from the photodetector.

For example, the detector unit14aspecifies a plurality of photodetectors having converted scintillation light into an analog signal at the same timing. Then, the detector unit14aspecifies the position of a scintillator, where the annihilation gamma rays have been incident, as the detection position of the annihilation gamma rays. For example, the detector unit14aspecifies the position of the scintillator where the annihilation gamma rays have been incident by performing a center-of-gravity calculation on the basis of the position of the photodetector and the intensity of the analog signal. Alternatively, for example, when the sizes of the scintillator and the photodetector correspond to each other, the detector unit14amay specify the position of a scintillator, which corresponds to a photodetector from which output is obtained, as the position of the scintillator where the annihilation gamma rays have been incident.

Furthermore, for example, the detector unit14aspecifies the energy value of the annihilation gamma rays by integrally calculating the intensity of the analog signal output from the photodetector. Alternatively, for example, the detector unit14amay specify the energy value of the annihilation gamma rays by measuring the time (time over threshold (ToT)) over which the intensity of the analog signal output from the photodetector exceeds a preset threshold and performing a nonlinear correction using the measured time.

Furthermore, for example, the detector unit14aspecifies the time when the scintillation light is detected by the photodetector as the detection time of the annihilation gamma rays. The detection time may be an absolute time or an elapsed time from the start of imaging.

The console device20receives various operations on the PET apparatus100from an operator and controls the operation of the PET apparatus100on the basis of the received operations. Specifically, the console device20includes an input interface21, a display22, a memory23, and processing circuitry24. The respective parts of the console device20are connected via a bus. Although an example in which the gantry device10and the console device20are provided separately from each other is described, the console device20or a part of the components of the console device20may be included in the gantry device10.

The input interface21receives various input operations from the operator, converts the received input operations into electric signals, and outputs the electric signals to the processing circuitry24. For example, the input interface21is implemented by a mouse, a keyboard, a trackball, a switch, a button, or a joystick for setting imaging conditions, a region of interest (ROI), and the like, a touch pad for performing an input operation by touching an operation surface, a touch screen with integrated display screen and touch pad, non-contact input circuitry using an optical sensor, a voice input interface, or the like. For example, the input interface21may be provided on the gantry device10. Furthermore, for example, the input interface21may include a tablet terminal or the like capable of wirelessly communicating with the console device20itself. Furthermore, the input interface21is not limited to only those with physical operating components such as a mouse and a keyboard. For example, an example of an input interface21also includes an electrical signal processing circuitry that receives electrical signals corresponding to input operations from an external input device provided separately from the console device20and outputs the electrical signals to the processing circuitry24.

The display22displays various types of information. For example, the display22displays a PET image produced by the processing circuitry24, a graphical user interface (GUI) for receiving various operations from the operator, and the like. For example, the display22is a liquid crystal display or a cathode ray tube (CRT) display. For example, the display22may be provided on the gantry device10. Furthermore, for example, the display22may be a desktop type, or may include a tablet terminal or the like capable of wirelessly communicating with the console device20itself.

The memory23stores various data used in the PET apparatus100. For example, the memory23is implemented by a semiconductor memory element such as a random access memory (RAM) and a flash memory, a hard disk, an optical disc, or the like.

The processing circuitry24controls the operation of the entire PET apparatus100. Specifically, the processing circuitry24includes a control function24a,a coincidence counting information production function24b,an image reconstruction function24c,and a correction function24d.

The control function24aperforms overall control of the PET apparatus100by controlling each part of the gantry device10and the console device20. For example, the control function24amoves the couchtop11by controlling the couch driving mechanism13. Furthermore, for example, the control function24acollects counting information of annihilation gamma rays emitted from the subject P by controlling the PET detector14, and stores the collected counting information in the memory23.

The coincidence counting information production function24bproduces coincidence counting information by using counting information collected by the counting information collection circuitry15. Specifically, the coincidence counting information production function24brefers to the counting information stored in the memory23and specifies sets of counting information in which annihilation gamma rays have been counted at roughly the same time, on the basis of the detection time of each counting information. Then, the coincidence counting information production function24bproduces coincidence counting information corresponding to the specified sets of counting information, and stores the produced coincidence counting information in the memory23.

The image reconstruction function24creconstructs a PET image on the basis of the coincidence counting information produced by the coincidence counting information production function24b.Specifically, the image reconstruction function24creconstructs the PET image by reading the coincidence counting information stored in the memory23and performing back-projection processing using the read coincidence counting information as projection data. Furthermore, the image reconstruction function24cstores the reconstructed PET image in the memory23.

The correction function24dis described in detail below.

The processing circuitry24is implemented by a processor, for example. In such a case, processing functions of the processing circuitry24are stored in the memory23in the form of computer programs executable by a computer. The processing circuitry24reads the computer programs from the memory23and executes the read computer programs, thereby implementing processing functions corresponding to the executed computer programs. In other words, the processing circuitry24in the state of reading the computer programs has the processing functions illustrated in the processing circuitry24inFIG.1.

So far, the configuration example of the PET apparatus100according to the present embodiment has been described. Under such a configuration, as described above, the PET apparatus100specifies sets of counting information in which annihilation gamma rays have been counted at roughly the same time between counting information of the annihilation gamma rays detected by the detector units14a,and generates a PET image on the basis of coincidence counting information in which the specified sets of counting information are correlated.

In such a PET apparatus, it is important to synchronize time information between the detector units14ain order to obtain a high-quality PET image. Therefore, for example, a technique of supplying each of the units of detector with a clock signal output from a single oscillator is known.

However, in such a technique, it is necessary to prepare a cable with equal-length wiring for supplying a clock signal or a synchronization signal between the oscillator and each unit of detector, which increases device price and reduces reliability.

Therefore, the PET apparatus100according to the present embodiment is configured to be able to suppress an increase in device price and a decrease in reliability due to synchronization between units of detector.

Specifically, in the present embodiment, each of the detector units14aincluded in the PET detector14includes detection circuitry, generation circuitry, and first production circuitry. The detection circuitry detects an analog signal based on a result of detecting gamma rays. The generation circuitry generates a clock signal. The first production circuitry produces time information by converting the analog signal detected by the detection circuitry into a digital signal on the basis of the clock signal generated by the generation circuitry. The detector unit14ais an example of the unit of detector.

According to such a configuration, by individually providing each detector unit14awith the generation circuitry that generates a clock signal, it is possible to eliminate the need for cables with equal-length wiring required when synchronization is performed using a single oscillator. With this, in the present embodiment, it is possible to suppress an increase in device price and a decrease in reliability due to synchronization between units of detector.

Hereinafter, a configuration example of the PET apparatus100according to the present embodiment is described in more detail.

FIG.2is a diagram illustrating a configuration example of the detector unit14aaccording to the present embodiment.

For example, as illustrated inFIG.2, each detector unit14aincluded in the PET detector14includes an analog section141, an oscillator142, a phase locked loop (PLL)143, a distributor144, a time to digital converter (TDC)145, and a field programmable gate array (FPGA)146.

The analog section141detects an analog signal based on a result of detecting gamma rays. The analog section141is an example of detection circuitry.

Specifically, the analog section141includes the aforementioned scintillator and photodetector, converts incident annihilation gamma rays emitted from the positrons in the subject P into scintillation light, converts the scintillation light into an analog signal, and outputs the analog signal.

The oscillator142generates a clock signal. For example, the oscillator142is implemented by circuitry using a natural transducer element such as a quartz transducer element. The oscillator142is an example of generation circuitry.

The PLL143converts the clock signal generated by the oscillator142into a clock signal with a predetermined frequency and outputs the clock signal.

The distributor144distributes the clock signal output from the PLL143to the TDC145and the FPGA146.

The TDC145produces time information by converting the analog signal detected by the analog section141into a digital signal on the basis of the clock signal generated by the oscillator142. The TDC145is an example of first production circuitry.

Specifically, the TDC145receives the clock signal distributed by the distributor144and the analog signal output from the analog section141, measures the time over which the intensity of the analog signal exceeds a predetermined threshold, and converts the analog signal into a digital signal, thereby producing the time information.

The FPGA146produces counting information including the detection position, energy value, and detection time of the aforementioned annihilation gamma rays on the basis of the analog signal output from the analog section141and the time information produced by the TDC145. Then, the FPGA146transmits the produced counting information to the console device20. The FPGA146is an example of second production circuitry.

Furthermore, the FPGA146acquires the time information produced by the TDC145, on the basis of a synchronization signal generated by synchronization signal generation circuitry. Then, the FPGA146transmits the acquired time information to the console device20. The FPGA146is an example of first acquisition circuitry and second acquisition circuitry.

For example, the synchronization signal generation circuitry is a scintillator included in the analog section141, and the synchronization signal is a gamma ray produced by the spontaneous decay of the scintillator. In this case, for example, the FPGA146acquires time information when gamma rays due to the spontaneous decay of the scintillator are generated. Alternatively, for example, the synchronization signal generation circuitry may be a gamma ray source disposed in the opening of the gantry device10, and the synchronization signal may be gamma rays emitted from the gamma rays source. Alternatively, for example, the synchronization signal generation circuitry may be the control function24aof the console device20and a command transmitted from the control function24a.

Although an example using the FPGA146has been described, for example, other processing circuitry implemented by processors such as a central processing unit (CPU), a graphics processing unit (GPU), an application specific integrated circuit (ASIC), a simple programmable logic device (SPLD), and a complex programmable logic device (CPLD) may be used instead of the FPGA146.

In the present embodiment, the processing circuitry24includes the correction function24d.

The correction function24dcorrects an offset of time information between a detector unit14aas a reference and another detector unit14aon the basis of time information acquired by the FPGA146of the detector unit14aas a reference and the FPGA146of the another detector unit14a.The correction function24dis an example of a correction section.

The following is a specific example of synchronization between units of detector, which is performed by the PET apparatus100according to the present embodiment. For convenience of explanation, it is assumed that three detector units14aare included in the PET detector14as the detector units14a.

FIG.3is a diagram illustrating an example of synchronization between units of detector, which is performed by the PET apparatus100according to the present embodiment.

For example, when the detector units14aare used as in the present embodiment, there may be variations in the time from power-on of the PET apparatus100to completion of the power rise due to factors such as individual differences between the detector units14a.

Therefore, in the present embodiment, the FPGA146in each detector unit14aacquires time information produced by the TDC145, on the basis of a synchronization signal generated by the synchronization signal generation circuitry after the rise in power of all of the detector units14a.

For example, as illustrated inFIG.3, when a detector unit14a,whose rise is completed earliest, is set as a reference DU, it is assumed that DUx completes its rise 2 seconds after the rise completion time of the reference DU and DUy completes its rise 3 seconds after the rise completion time of the reference DU. In this case, the FPGA146for each of the reference DU, the DUx, and the DUy acquires the time information produced by the TDC145after the rise in power of all of the reference DU, the DUx, and the DUy, for example, when gamma rays due to the spontaneous decay of a scintillator are generated.

Then, for example, as illustrated inFIG.3, it is assumed that gamma rays are generated due to the spontaneous decay of the scintillator when 4 seconds have elapsed from the rise completion time of the reference DU. In that case, time information produced by the reference DU is “4 seconds”, but time information produced by the DUx is “2 seconds” with a delay of 2 seconds from the time information of the reference DU, and time information produced by the DUy is “1second” with a delay of 3 seconds from the time information of the reference DU.

In the present embodiment, the correction function24dstores difference information between the time information acquired by the FPGA146of the detector unit14aas a reference and time information acquired by the FPGA146of the other detector unit14ain the memory23as a synchronization process. The memory23is an example of a storage section.

For example, as illustrated inFIG.3, the correction function24dstores, in the memory23, difference information (offsetDUx=2−4=−2) between the time information produced by the reference DU and the time information produced by DUx. Furthermore, the correction function24dstores, in the memory23, difference information (offsetDUy=1−4=−3) between the time information produced by the reference DU and the time information produced by the DUy.

Thereafter, there may be variations in the time between the transmission of a command to start a scan from the console device20and the start of data collection due to factors such as individual differences between the detector units14a.

For example, as illustrated inFIG.3, the reference DU and the DUy each start collecting data when 3 seconds have elapsed from the time of synchronization, and the DUx starts collecting data when 5 seconds have elapsed from the time of synchronization. In that case, time information produced by the reference DU is “7 seconds” by adding 3 seconds to 4 seconds at the time of synchronization, time information produced by DUx is “7 seconds” by adding 5 seconds to 2 seconds at the time of synchronization, and the time information produced by DUy is “4 seconds” by adding 3 seconds to 1 second at the time of synchronization.

Thereafter, in the present embodiment, the correction function24dcorrects an offset of time information between the detector units14aby using the difference information stored in the memory23.

Specifically, the correction function24duses the difference information and corrects a detection time included in the counting information generated by the FPGA146of the other detector unit14aso as to match the detection time with a detection time included in the counting information produced by the FPGA146of the detector unit14aas a reference.

For example, as illustrated inFIG.3, the correction function24dcorrects a detection time included in the counting information generated by the FPGA146of the DUx so as to match the detection time with a detection time included in the counting information produced by the FPGA146of the reference DU. Furthermore, the correction function24dcorrects a detection time included in the counting information produced by the FPGA146of the DUy so as to match the detection time with a detection time included in the counting information produced by the FPGA146of the reference DU.

For example, as illustrated inFIG.3, when the detection time of the counting information produced by the FPGA146of the DUx is 12 seconds, the correction function24dcorrects the detection time to “10 seconds” obtained by subtracting 2 seconds from 12 seconds. Furthermore, when the detection time of the counting information produced by the FPGA146of the DUy is 13 seconds, the correction function24dcorrects the detection time to “10 seconds” obtained by subtracting 3 seconds from 13 seconds.

In the present embodiment, the correction function24duses a linear equation representing the relationship between the time information and an elapsed time defined for each frequency of the clock signal, and corrects an offset of time information caused by a frequency offset of a clock signal between the detector units14a.

FIG.4is a diagram illustrating an example of correction of time information, which is performed by the correction function24daccording to the present embodiment.

For example, as illustrated inFIG.4, when there is a frequency offset of the clock signal between the detector units14a,an offset occurs in time information according to an elapsed time. Therefore, for example, the correction function24duses a linear equation representing the relationship between the time information and the elapsed time predefined for each frequency of the clock signal, and corrects the time information of the other detector unit14ato match a time-dependent change of time information in the number of clocks of the reference DU.

When the correction using the linear equation is difficult due to factors such as jitter or temperature change, the synchronization process may be performed on the basis of gamma rays or the like each time during the standby time or before scanning.

Next, a procedure for processing synchronization between units of detector, which is performed by the PET apparatus100according to the present embodiment will be described.

FIG.5is a flowchart illustrating a procedure for processing synchronization between the units of detector, which is performed by the PET apparatus100according to the present embodiment.

For example, as illustrated inFIG.5, in the present embodiment, when the PET apparatus100is started (step S01) and the rise in the power of all the detector units14ahas been completed (Yes at step S02), each detector unit14astarts collecting data for synchronization (step S03). Specifically, the FPGA146in each detector unit14aacquires the time information produced by the TDC145, on the basis of the synchronization signal generated by the synchronization signal generation circuitry.

After the collection of the data for synchronization is completed (step S04), the processing circuitry24of the console device20stores difference information between the time information produced by each detector unit14aand a reference time in the memory23(step S05). Specifically, the correction function24dof the processing circuitry24stores, in the memory23, difference information between the time information acquired by the FPGA146of the detector unit14aas a reference and the time information acquired by the FPGA146of the other detector unit14a.Since counting information collected together with time information as the data for synchronization may be used, for example, as data for pre-operation inspection of the PET apparatus100because it includes the detection position, energy value, and detection time of gamma rays.

Thereafter, each detector unit14acollects data for synchronization confirmation (step S06). Specifically, the FPGA146in each detector unit14are-acquires the time information produced by the TDC145on the basis of the synchronization signal generated by the synchronization signal generation circuitry.

Then, the processing circuitry24of the console device20verifies whether the detector units14ahave been synchronized (step S07). Specifically, on the basis of the time information re-acquired by the FPGA146of each detector unit14a,the correction function24dof the processing circuitry24verifies that the correction of the offset of the time information using the difference information stored in the memory23is performed correctly.

When the verification result confirms that the detector units14ahave not been synchronized (No at step S07), the processes of steps S03to S06are repeated until it is confirmed that the detector units14aare synchronized.

When it is confirmed that the detector units14ahave been synchronized (Yes at step S07), the processing circuitry24of the console device20starts a scan (step S08). Specifically, the control function24aof the processing circuitry24collects counting information on annihilation gamma rays emitted from the subject P by controlling the PET detector14.

After the scanning is ended (step S09), the processing circuitry24of the console device20corrects the collected data (step S10). Specifically, the correction function24dof the processing circuitry24uses the difference information and corrects a detection time included in the counting information generated by the FPGA146of the other detector unit14aso as to match the detection time with a detection time included in the counting information produced by the FPGA146of the detector unit14aas a reference.

Thereafter, the processing circuitry24of the console device20produces coincidence counting information by using the corrected counting information and generates a PET image on the basis of the produced coincidence counting information (step S11). Specifically, the coincidence counting information production function24bof the processing circuitry24produces the coincidence counting information by using the counting information corrected by the correction function24d.Furthermore, the image reconstruction function24cof the processing circuitry24reconstructs the PET image on the basis of the coincidence counting information produced by the coincidence counting information production function24b.

As described above, since there is a variation in the time until data collection is started between the detector units14a,the image reconstruction function24creconstructs the PET image by using data collected after a detector unit14afor the last scan to be started starts the scan.

For example, when the processing circuitry24is implemented by a processor, the processes performed by the control function24a,the coincidence counting information production function24b,the image reconstruction function24c,and the correction function24ddescribed above are implemented by, for example, the processing circuitry24reading the computer programs corresponding to the processing functions from the memory23and executing the read computer programs.

As described above, in the present embodiment, each of the detector units14aincluded in the PET detector14includes the analog section141, the oscillator142, and the TDC145. The analog section141detects an analog signal based on a result of detecting gamma rays. The oscillator142generates a clock signal. The TDC145produces time information by converting the analog signal detected by the analog section141into a digital signal on the basis of the clock signal generated by the oscillator142.

According to such a configuration, by individually providing the oscillator142for each detector unit14a,it is possible to eliminate the need for cables, connectors, or the like with equal-length wiring required when synchronization is performed using a single oscillator. With this, in the present embodiment, it is possible to suppress an increase in device price, an increase in assembly man-hours, and a decrease in reliability due to synchronization between units of detector.

Furthermore, in the present embodiment, the FPGA146in each detector unit14aacquires time information produced by the TDC145, on the basis of a synchronization signal generated by the synchronization signal generation circuitry. Then, on the basis of time information acquired by the FPGA146of the detector unit14aas a reference and time information acquired by the FPGA146of the other detector unit14a,the correction function24dcorrects an offset of the time information between the detector unit14aas a reference and the other detector unit14a.

According to such a configuration, the image quality of a PET image can be improved by correcting an offset of time information occurring between the detector units14a.

Other Embodiments

Although the embodiment of the PET apparatus100has been described above, the embodiment of the nuclear medicine diagnostic apparatus disclosed in this application is not limited thereto. Therefore, other embodiments of the nuclear medicine diagnostic apparatus are described below.

For example, in the embodiment described above, an example in which the correction function24duses difference information to correct the detection time included in counting information produced by the FPGA146of the detector unit14ahas been described; however, the embodiment is not limited thereto.

For example, the correction function24dmay use difference information and correct time information produced by the TDC145of the other detector unit14aso as to match the time information with time information produced by the TDC145of the detector unit14aas a reference. In this case, for example, the correction function24dis provided in the FPGA146of each detector unit14a,and the FPGA146produces counting information on the basis of the time information corrected by the correction function24d.

Furthermore, in the embodiment described above, an example in which an offset of time information is corrected between the detector units14ahas been described; however, the embodiment is not limited thereto.

For example, when the PET apparatus100includes a plurality of ring-shaped PET detectors arranged in the Z-axis direction, an offset of time information may be corrected between the PET detectors. In this case, the PET detector is an example of the unit of detector.

Moreover, for example, when each detector unit in the PET detector includes a plurality of detector modules arranged in the Z-axis direction, an offset of time information may be corrected between the detector modules. In this case, the detector module is an example of the unit of detector.

Furthermore, in the embodiment described above, the embodiment of the PET apparatus has been described as an example of the nuclear medicine diagnostic apparatus; however, the embodiment is not limited thereto. For example, the technology disclosed in this application can be similarly applied to other nuclear medicine diagnostic apparatuses such as single photon emission computed tomography (SPECT) apparatuses.

Furthermore, in the embodiment described above, an example in which the first production circuitry, the first acquisition circuitry, the second acquisition circuitry, the correction section, and the second production circuitry in this specification are implemented by the processing functions of the processing circuitry has been described; however, the embodiment is not limited thereto. For example, the first production circuitry, the first acquisition circuitry, the second acquisition circuitry, the correction section, and the second production circuitry in this specification may be implemented by the processing functions of the processing circuitry described in the embodiment, or the same processing functions may also be implemented by hardware only, software only, or a mixture of hardware and software.

Furthermore, in the embodiments described above, the processing circuitry is not limited to those implemented by a single processor, but may be configured by combining a plurality of independent processors, and respective processors may implement respective processing functions by executing respective computer programs. Furthermore, the respective processing functions of the processing circuitry may be implemented by being appropriately distributed or integrated into single processing circuitry or a plurality of pieces of processing circuitry. Furthermore, the respective processing functions of the processing circuitry may be implemented by a mixture of hardware such as circuits and software. In the above, an example in which the computer programs corresponding to the respective processing functions are stored in a single memory has been described; however, the embodiment is not limited thereto. For example, the computer programs corresponding to the respective processing functions may be distributed and stored in a plurality of memories, and the processing circuitry may be configured to read the computer programs from the memories and execute the read computer programs.

Furthermore, the term “processor” used in the description of the embodiments described above means, for example, a circuit such as CPU, GPU, ASIC, or a programmable logic device (for example, SPLD, CPLD, and FPGA). Instead of storing the computer programs in the memory, the computer programs may be directly incorporated in the circuitry of the processor. In this case, the processor implements the functions by reading and executing the computer programs incorporated in the circuitry. Furthermore, each processor of the present embodiment is not limited to being configured as single piece of circuitry for each processor, and one processor may be configured by combining a plurality of pieces of independent circuitry to implement the functions thereof.

The computer program executed by the processor is provided by being incorporated in advance in a read only memory (ROM) or the like. The computer program may be provided by being recorded on a computer readable non-transitory storage medium, such as a CD (compact disc)-ROM, a flexible disk (FD), a CD-R (compact disc recordable), and a digital versatile disc (DVD), in a file format installable or executable in these devices. Furthermore, the computer program may be provided or distributed by being stored on a computer connected to a network such as the Internet and downloaded via the network. For example, the computer program is configured as a module including the aforementioned each processing function. As actual hardware, the CPU reads and executes the computer program from the storage medium such as a ROM, so that each module is loaded on a main storage device and produced on the main storage device.

In the embodiments described above, each component of each device illustrated in the drawings is a functional concept, and does not necessarily have to be physically configured as illustrated in the drawings. That is, the specific form of dispersion or integration of each device is not limited to that illustrated in the drawings, but can be configured by functionally or physically dispersing or integrating all or part thereof in arbitrary units, depending on various loads and usage conditions. Moreover, each processing function performed by each device can be implemented in whole or in part by a CPU and a computer program that is analyzed and executed by the CPU, or by hardware using wired logic.

Of the processes described in the embodiments described above, all or part of the processes described as being performed automatically can be performed manually, or all or part of the processes described as being performed manually can be performed automatically by known methods. Processing procedures, control procedures, specific names, and other information including various data and parameters described in the above description and drawings may be changed as desired, unless otherwise noted.

According to at least one of the embodiments described above, an increase in device price and a decrease in reliability due to synchronization between units of detector can be suppressed.