Organic light emitting display panel and method of manufacturing the same

A display panel and a method for manufacturing the display panel are discussed. The display panel includes a substrate; an active layer on the substrate; and a passivation layer on the active layer, wherein the active layer includes a channel part, a first electrode connection part and a second electrode connection part on opposite sides of the channel part in a first direction, and a first taper part and a second taper part on opposite sides of the channel part in a second direction crossing the first direction, and wherein a carrier concentration of each of the first taper part and the second taper part is different from those of the channel part, the first electrode connection part and the second electrode connection part.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the priority benefit of the Korean Patent Application No. 10-2014-0092682 filed on Jul. 22, 2014, which is hereby incorporated by reference as if fully set forth herein.

BACKGROUND OF THE INVENTION

Field of the Invention

The embodiments of the present invention relate to an organic light emitting display panel and a method of manufacturing the same, and particularly, to an organic light emitting display panel including a low temperature poly silicon (LTPS) thin film transistor (TFT) and a method of manufacturing the same.

Discussion of the Related Art

As times have progressed toward the information-oriented society, flat panel display (FPD) devices which have desired characteristics such as thinness, lightness, and low consumption power are increasing in importance. Examples of the FPD devices include liquid crystal display (LCD) devices, plasma display panels (PDPs), organic light emitting display devices, etc. Recently, electrophoretic display (EPD) devices are being widely used as one type of the FPD device.

In the FDP devices, organic light emitting display devices including a thin film transistor (TFT) use a self-emitting device and have low power consumption, a fast response time, high emission efficiency, high luminance, and a wide viewing angle. Therefore, the organic light emitting display devices are attracting much attention as next-generation FPD devices.

Particularly, an LTPS TFT may be manufactured at a low temperature. In comparison with an amorphous silicon (a-Si) TFT, the LTPS TFT has a high mobility of an electron or a hole, and because it is possible to implement a complementary metal-oxide semiconductor (CMOS) transistor including an N channel and a P channel, the LTPS TFT may be applied to a large-size substrate.

FIG. 1is a cross-sectional view for describing an active layer of a related art LTPS TFT.

As illustrated inFIG. 1, an organic light emitting display panel including the related art LTPS TFT includes a buffer11formed on a substrate10, an active layer13formed on the buffer11, a gate insulation layer14formed on the active layer13, a gate electrode (not shown) formed on the gate insulation layer14, an interlayer dielectric (not shown) formed on the gate electrode (not shown), first and second electrodes (not shown) formed on the interlayer dielectric (not shown), and an organic light emitting diode (OLED, not shown) connected to the first electrode or the second electrode.

The active layer13of the LTPS TFT is formed on the substrate10through a photolithography process using a mask. In this instance, inclined planes13aand13bare respectively formed on both sides of the active layer13formed on the substrate10.

When the related art LTPS TFT is driven, a strong electric field is generated from each of the inclined planes13aand13bof the active layer13. As the strong electric field is generated, a free carrier occurs in each of the inclined planes13aand13b, and a hump channel where a high current flows even under a low voltage may be formed.

A gate-source voltage (Vgs) which is a difference voltage between a gate and a source is shifted in a negative (−) direction by the hump channel. As the gate-source voltage (Vgs) is shifted in the negative (−) direction, an off-current of a TFT increases.

Moreover, consumption of power of the organic light emitting display panel increases, and for this reason, deterioration of a transistor is accelerated.

Moreover, a reliability of the organic light emitting display panel is degraded.

SUMMARY OF THE INVENTION

Accordingly, the present invention is directed to provide an organic light emitting display panel and a method of manufacturing the same that substantially obviate one or more problems due to limitations and disadvantages of the related art.

An aspect of the present invention is directed to provide an organic light emitting display panel for reducing an off-current of a TFT and reducing power consumption of a display panel.

According to an aspect of the present invention, a display panel includes a substrate; an active layer on the substrate; and a passivation layer on the active layer, wherein the active layer includes a channel part, a first electrode connection part and a second electrode connection part on opposite sides of the channel part in a first direction, and a first taper part and a second taper part on opposite sides of the channel part in a second direction crossing the first direction, and wherein a carrier concentration of each of the first taper part and the second taper part is different from those of the channel part, the first electrode connection part and the second electrode connection part.

According to another aspect of the present invention, a method of making a display panel includes forming an active layer on a substrate; and doping the active layer to form a channel part, a first electrode connection part and a second electrode connection part on opposite sides of the channel part in a first direction, and a first taper part and a second taper part on opposite sides of the channel part in a second direction crossing the first direction so that a carrier concentration of each of the first taper part and the second taper part is different from those of the channel part, the first electrode connection part and the second electrode connection part.

It is to be understood that both the foregoing general description and the following detailed description of the present invention are by example and explanatory and are intended to provide further explanation of the invention as claimed.

DETAILED DESCRIPTION OF THE EMBODIMENTS

The terms described in the specification should be understood as follows.

As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. The terms “first” and “second” are for differentiating one element from the other element, and these elements should not be limited by these terms. It will be further understood that the terms “comprises”, “comprising,”, “has”, “having”, “includes” and/or “including”, when used herein, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. The term “at least one” should be understood as including any and all combinations of one or more of the associated listed items. For example, the meaning of “at least one of a first item, a second item, and a third item” denotes the combination of all items proposed from two or more of the first item, the second item, and the third item as well as the first item, the second item, or the third item. The term “on” should be construed as including an instance where one element is formed at a top of another element and moreover an instance where a third element is disposed therebetween.

Hereinafter, an organic light emitting display panel and a method of manufacturing the same according to embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 2is an example diagram schematically illustrating a configuration of a display device to which an organic light emitting display panel according to an embodiment of the present invention is applied.

The display device to which the organic light emitting display panel according to an embodiment of the present invention is applied, as illustrated inFIG. 2, includes: a panel100where a pixel (P)110is provided in each of intersection areas of a plurality of gate lines GL1to GLg and a plurality of data lines DL1to DLd; a gate driver200that supplies a scan pulse to the gate lines GL1to GLg provided in the panel100; a data driver300that respectively supplies data voltages to the data lines DL1to DLd provided in the panel100; and a timing controller400that controls operations of the gate driver200and the data driver300.

In the panel100, the pixel (P)110may be provided in each of a plurality of areas defined by intersections of the gate lines GL and the data lines DL. The pixel110may include an organic light emitting diode (OLED), which emits light, and a driver that drives the OLED.

First, the OLED may be implemented in a top emission type where the light emitted from the OLED is transferred to the outside through an upper substrate, or may be implemented in a bottom emission type where the light emitted from the OLED is transferred to a lower substrate.

Second, the driver may include two or more transistors, which are coupled to a data line DL and a gate line GL and control driving of the OLED, and a storage capacitor.

An anode of the OLED may be coupled to a first power source, and a cathode of the OLED may be coupled to a second power source. The OLED may emit light having certain luminance according to a current supplied from a driving transistor.

When the scan pulse is supplied to the gate line GL, the driver may control an amount of current supplied to the OLED according to a data voltage supplied to the data line DL.

To this end, the driving transistor may be coupled between the first power source and the OLED, and a switching transistor may be coupled to the driving transistor, the data line DL, and the gate line GL.

Hereinafter, the panel100will be described in detail with reference toFIGS. 3 to 6G.

The timing controller400may output a gate control signal GCS for controlling the gate driver200and a data control signal DCS for controlling the data driver300by using a vertical sync signal, a horizontal sync signal, and a clock which are supplied from an external system.

The data driver300may convert image data, which are input from the timing controller400, into analog data voltages and may respectively supply the data voltages for one horizontal line to the data lines DL1to DLd every one horizontal period where the scan pulse is supplied to one gate line. That is, the data driver300may convert the image data into the data voltages by using gamma voltages supplied from a gamma voltage generator and may respectively output the data voltages to the data lines DL1to DLd.

The gate driver200may supply the scan pulse to the gate lines GL1to GLg of the panel100in response to the gate control signal GCS input from the timing controller400. Therefore, a plurality of switching transistors which are respectively provided in a plurality of pixels110corresponding to a horizontal line to which the scan pulse is applied may be turned on, and thus, an image may be output to each of the plurality of pixels110.

FIG. 3is a plan view schematically illustrating a structure of an LTPS TFT applied to an organic light emitting display panel according to an embodiment of the present invention.FIG. 4Ais a cross-sectional view illustrating a cross-sectional surface taken along line a-a′ ofFIG. 3illustrating the LTPS TFT applied to the organic light emitting display panel according to an embodiment of the present invention.FIG. 4Bis a cross-sectional view illustrating a cross-sectional surface taken along line b-b′ ofFIG. 3illustrating the LTPS TFT applied to the organic light emitting display panel according to an embodiment of the present invention.

The organic light emitting display panel according to an embodiment of the present invention, as illustrated inFIGS. 3, 4A and 4B, may include: an active layer130that is formed on a substrate120; a gate insulation layer140that is formed on the active layer130; a gate electrode150that is formed on the gate insulation layer140; an interlayer dielectric160that is formed on the gate electrode150; a first electrode171that is formed on the interlayer dielectric160and is electrically coupled to the first electrode connection part161; a second electrode172that is formed on the interlayer dielectric160and is electrically coupled to the second electrode connection part162; a passivation layer175that is formed on the first electrode171and the second electrode172; and an OLED that is formed on the passivation layer175and is connected to the first electrode171or the second electrode172.

As illustrated inFIG. 3, the active layer130includes the channel part132, the first and second electrode connection parts161and162which are respectively formed on the first side and the second side of the channel part132facing each other, and the first and second taper parts134aand134bthat are respectively formed on the third side and the fourth side of the channel part132facing each other.

Here, the first electrode connection part161and the second electrode connection part162may be respectively formed on the first side and the second side of the channel part132to face each other in correspondence with a first direction b-b′ of the substrate120. Also, the first taper part134aand the second taper part134bmay respectively be an edge of the third side and an edge of the fourth side of the channel part132which are parallel to each other to correspond to a second direction a-a′ intersecting the first direction b-b′. A carrier concentration of each of the first and second taper parts134aand134bmay be higher than that of the channel part132and lower than that of each of the first and second electrode connection parts161and162.

Hereinafter, the channel part132, the first electrode connection part161, the second electrode connection part162, the first taper part134a, and the second taper part134bwill be described in detail through a doping process where impurities are injected into the active layer130(for example, a-Si) and which will be described with reference toFIGS. 5A to 5G and 6A to 6G.

As one type of the LTPS TFT, an NMOS TFT may include a lightly doped drain (LDD) area where a portion of each of the first and second electrode connection parts161and162is doped at a low concentration, for reducing an off-current. For example, the portion of the first electrode connection part161may denote a portion of the first electrode connection part161which is adjacent to the channel part132, and the portion of the second electrode connection part162may denote a portion of the second electrode connection part162which is adjacent to the channel part132.

Therefore, the first electrode connection part161may include a first high concentration doping area161aand a first low concentration doping area161bof which a carrier concentration is lower than that of the first high concentration doping area161a. Also, the second electrode connection part162may include a second high concentration doping area162aand a second low concentration doping area162bof which a carrier concentration is lower than that of the second high concentration doping area162a.

The first low concentration doping area161bmay be disposed between the first high concentration doping area161aand the channel part132, and the second low concentration doping area162bmay be disposed between the second high concentration doping area162aand the channel part132.

In a method of forming the active layer130, a first doping process and a second doping process (i.e., a two-time doping process) may be performed on the first taper part134aand the second taper part134b. The second doping process (i.e., a one-time doping process) may be performed on the channel part132. Therefore, the active layer130may be formed in order for a carrier concentration of each of the first and second taper parts134aand134bto be higher than that of the channel part132.

As described above, since the active layer130is provided, an electric field cannot focus on the first taper part134aand the second taper part134b, thereby preventing a free carrier from occurring in the first taper part134aand the second taper part134b.

Moreover, the gate-source voltage (Vgs) is prevented from being shifted in the negative (−) direction by the hump channel.

Moreover, an off-current of a TFT is reduced, and an organic light emitting display panel of which consumption power is low is implemented.

Moreover, a TFT is prevented from being deteriorated, and a reliability of an organic light emitting display panel is enhanced.

In a process of forming the active layer130according to an embodiment of the present invention, a mask is not added. Accordingly, an organic light emitting display panel having the above-described efficiency is implemented without an increase in the process cost.

The gate insulation layer140may be formed on the active layer130. An inorganic insulating material such as oxide silicon (SiO2) may be used as the gate insulation layer140.

The gate electrode150may be formed on the gate insulation layer140. The gate electrode150may be formed by depositing and a conductive material, which is used as the gate electrode150, all over the substrate120and patterning the conductive material.

The interlayer dielectric160may be formed on the gate electrode150. The first electrode171electrically coupled to the first electrode connection part161and the second electrode172electrically coupled to the second electrode connection part162may be formed on the interlayer dielectric160.

The passivation layer175may be formed on the first electrode171and the second electrode172, and the OLED which includes a third electrode180(seeFIG. 5G) connected to the first electrode171or the second electrode172may be formed on the passivation layer175. The OLED may include the third electrode180, an organic emission layer stacked on the third electrode180, and a fourth electrode stacked on the organic emission layer. Also, a sealing part may be formed all over the fourth electrode.

FIGS. 5A to 5Gare example diagrams for describing a method of manufacturing an organic light emitting display panel according to an embodiment of the present invention.

First, as illustrated inFIG. 5A, the active layer130may be formed on the substrate120. The active layer130includes the first taper part134aand the second taper part134bwhich are respectively disposed on the third side and the fourth side facing each other.

The active layer130may be formed to have a certain thickness from a top of the substrate120. The first and second taper parts134aand134bmay be formed on the respective sides of the active layer130to be inclined at a certain slope, and a cross-sectional area of each of the first and second taper parts134aand134bmay be enlarged in a direction from a top of the active layer130to a surface of the substrate120.

The first doping process, where impurities are injected into the first and second taper parts134aand134bof the active layer130, may be performed. In this instance, the impurities may be selectively injected into only portions of the first and second taper parts134aand134bwhich do not overlap a photoresist190formed on the active layer130.

Hereinafter, a detailed method of forming the active layer130and a first doping process will be described in detail with reference toFIGS. 6A to 6G.

Subsequently, as illustrated inFIG. 5B, the gate insulation layer140may be formed on the active layer130. A second doping process of injecting impurities may be performed on a portion of the active layer130which is covered by the gate insulation layer140. In this instance, Group 3 elements (for example, B, Al, Ga, and In) may be injected into the active layer130as the impurities. However, the present embodiment is not limited thereto, and Group 5 elements (for example, P, As, and Sb) may be injected into the active layer130as the impurities.

Subsequently, as illustrated inFIG. 5C, the gate electrode150may be formed on the gate insulation layer140. The gate electrode150may be formed of a low-resistance metal material, for example, aluminum (Al), aluminum alloy (AlNd), copper (Cu), or copper alloy. The gate electrode150may be disposed at a center of the active layer130with the gate insulation layer140therebetween.

Subsequently, as illustrated inFIGS. 3 and 5D, in a third doping process, impurities may be injected into the first side and the second side of the active layer130which face each other and do not overlap the gate electrode150. By performing the third doping process, the active layer130may be divided into the channel part132and the first and second electrode connection parts161and162which are respectively disposed on the first side and the second side of the channel part132facing each other.

In the third doping process, impurities may not be injected into the channel part132, the first taper part134a, and the second taper part134bwhich overlap the gate electrode150, and may be injected into only the first electrode connection part161and the second electrode connection part162which do not overlap the gate electrode150.

In this instance, Group 5 elements (for example, P, As, and Sb) may be used as the impurities. However, the present embodiment is not limited thereto, and Group 3 elements (for example, B, Al, Ga, and In) may be used as the impurities. When Group 3 elements are injected as impurities in the first doping process and the second doping process, Group 5 elements may be injected as impurities in the third doping process. When Group 5 elements are injected as impurities in the first doping process and the second doping process, Group 3 elements may be injected as impurities in the third doping process.

As one type of the LTPS TFT, the NMOS TFT may include the LDD area where a portion of each of the first and second electrode connection parts161and162is doped at a low concentration, for reducing an off-current. For example, the portion of the first electrode connection part161may denote a portion of the first electrode connection part161which is adjacent to the channel part132, and the portion of the second electrode connection part162may denote a portion of the second electrode connection part162which is adjacent to the channel part132.

That is, the third doping process may be performed, and then, a fourth doping process using a doping mask may be further performed on a portion of each of the first and second electrode connection parts161and162, for forming the LDD area. For example, the doping mask may be greater than a width of the gate electrode150and may cover a portion of each of the first and second electrode connection parts161and162.

In the fourth doping process, the doping mask may be disposed on the gate electrode150, and then, impurities may be injected into the active layer130. Therefore, the impurities may not be injected into an area covered by the doping mask, and may be injected into only an area which is not covered by the doping mask.

By performing the fourth doping process, the first electrode connection part161may be divided into the first high concentration doping area161aand the first low concentration doping area161bof which a carrier concentration is lower than that of the first high concentration doping area161a. Also, the second electrode connection part162may be divided into the second high concentration doping area162aand the second low concentration doping area162bof which a carrier concentration is lower than that of the second high concentration doping area162a.

The first low concentration doping area161bmay be disposed between the first high concentration doping area161aand the channel part132, and the second low concentration doping area162bmay be disposed between the second high concentration doping area162aand the channel part132.

To provide a summary on the above description, in the first doping process and the second doping process, a process of injecting impurities into the first and second taper parts134aand134bwhich are respectively disposed on the third side and the fourth side of the active layer130facing each other may be performed twice. In the second doping process, a process of injecting impurities into the channel part132which is disposed between the first taper part134aand the second taper part134bmay be performed once. Therefore, a carrier concentration of each of the first and second taper parts134aand134bmay be higher than that of the channel part132.

Moreover, in the second doping process and the third doping process, impurities may be injected into the first low concentration doping area161bof the first electrode connection part161and the second low concentration doping area162bof the second electrode connection part162. In the second, third, and fourth doping processes, impurities may be injected into the first high concentration doping area161aand the second high concentration doping area162a. Thus, the first low concentration doping area161band the second low concentration doping area162bwhich are the LDD areas may be formed.

Subsequently, as illustrated inFIG. 5E, the interlayer dielectric160may be formed on the substrate120including the active layer130. The first electrode171connected to the first electrode connection part161and the second electrode172connected to the second electrode connection part162may be formed on the interlayer dielectric160. The first electrode171and the second electrode172may be electrically coupled to the first electrode connection part161and the second electrode connection part162through a contact hole which is included in the interlayer dielectric160, respectively.

Finally, as illustrated inFIG. 5G, the passivation layer175may be formed on the first electrode171and the second electrode172. The passivation layer175may be formed of, for example, an organic material such as polyimide (PI), polyamide (PA), acryl resin, benzocyclobutene (BCB), or phenol resin.

The OLED, which includes the third electrode180connected to the second electrode172, may be formed on the passivation layer175. The OLED may include the third electrode180, the organic emission layer formed on the third electrode180, and the fourth electrode formed on the organic emission layer. Also, the sealing part may be formed all over the fourth electrode.

The organic emission layer may be formed to have a structure of a hole transport layer/emission layer/electron transport layer or a structure of a hole injection layer/hole transport layer/electron transport layer/electron injection layer. Furthermore, the organic emission layer may further include a function layer for enhancing an emission efficiency and/or a service life of the organic emission layer.

The fourth electrode formed on the organic emission layer may act as a cathode electrode when the third electrode180acts as an anode electrode.

The sealing part protects the OLED and the TFT from an external impact and prevents moisture from penetrating into a device.

FIGS. 6A to 6Gare example diagrams for describing a method of manufacturing an active layer of the LTPS TFT applied to the organic light emitting display panel according to an embodiment of the present invention.

First, as illustrated inFIG. 6A, an active material135may be provided all over the substrate120. A glass substrate or a plastic substrate may be used as the substrate120. In the LTPS TFT, a-Si may be used as the active material135. In this instance, a buffer125may be formed between the substrate120and the active material135. The buffer125prevents impurities such as metal ions from being spread from the substrate120and penetrating into the active layer130.

Subsequently, as illustrated inFIG. 6B, a photoresist (PR)190may be coated on the active material135. The photoresist190which is a photosensitive polymer resin may be mainly used in a photolithography process of forming a fine pattern on a substrate. Since properties of the photoresist190are chemically changed by light, the photoresist190may be selectively dissolved based on a solubility difference between an exposure part and a non-exposure part.

The photoresist190may be classified into a positive type (a positive PR) and a negative type (a negative PR). Here, the positive PR may be a photosensitive material where a portion unexposed to light is hardened to form a pattern and a portion exposed to the light is rinsed out by a solvent. The positive PR may be used for forming the active layer130, but not limited thereto.

Subsequently, as illustrated inFIG. 6C, an active mask where an active area is patterned may be disposed on the photoresist190. The exposure part and the non-exposure part may be determined based on a pattern of the active mask. The exposure part may be an area exposed to light, and the non-exposure part may be an area unexposed by the light. Therefore, as illustrated inFIG. 6D, the photoresist190of the non-exposure part may be developed to form a pattern.

Subsequently, as illustrated inFIG. 6E, the active material135which is exposed through a development process may be patterned through an etching process. The active layer130, including the first taper part134aand the second taper part134bwhich are respectively disposed on the third side and the fourth side facing each other, may be formed by etching the active material135.

The active layer130may be formed to have a certain thickness from the top of the substrate120. The first and second taper parts134aand134bmay be formed on the respective sides of the active layer130to be inclined at a certain slope, and a cross-sectional area of each of the first and second taper parts134aand134bmay be enlarged in a direction from the top of the active layer130to a surface of the substrate120.

Subsequently, as illustrated inFIG. 6F, a first doping operation of injecting first doping material137into the first and second taper parts134aand134bmay be performed. In this instance, the first doping material137may be selectively injected into only portions of the first and second taper parts134aand134bwhich do not overlap a photoresist190formed on the active layer130. In this instance, Group 3 elements (for example, B, Al, Ga, and In) may be injected into the first and second taper parts134aand134bas the first doping material137. However, the present embodiment is not limited thereto, and Group 5 elements (for example, P, As, and Sb) may be injected into the active layer130as the first doping material137.

Subsequently, as illustrated inFIG. 6G, the active layer130where the first and second taper parts134aand134bare selectively doped may be formed by removing the photoresist190from the active layer130.

The organic light emitting display panel according to an embodiment of the present invention has been described above with the NMOS TFT, which is one type of the LTPS TFT, as an example, but is not limited thereto. For example, a PMOS TFT may be applied to the present invention.

Moreover, the LTPS TFT has been described above as an example of the present invention, but the present invention is not limited thereto. All TFTs (for example, an oxide transistor, an a-Si transistor, etc.) which have a hump characteristic based on the hump channel may be applied to the present invention.

Moreover, the organic light emitting display panel has been described above as an example of the present invention, but the present invention is not limited thereto. The present invention may be applied to all display panels which include a TFT having the hump characteristic.