Noise shielding techniques for ultra low current measurements in biochemical applications

A device having an integrated noise shield is disclosed. The device includes a plurality of vertical shielding structures substantially surrounding a semiconductor device. The device further includes an opening above the semiconductor device substantially filled with a conductive fluid, wherein the plurality of vertical shielding structures and the conductive fluid shield the semiconductor device from ambient radiation. In some embodiments, the device further includes a conductive bottom shield below the semiconductor device shielding the semiconductor device from ambient radiation. In some embodiments, the opening is configured to allow a biological sample to be introduced into the semiconductor device. In some embodiments, the vertical shielding structures comprise a plurality of vias, wherein each of the plurality of vias connects more than one conductive layers together. In some embodiments, the device comprises a nanopore device, and wherein the nanopore device comprises a single cell of a nanopore array.

BACKGROUND OF THE INVENTION

Advances in micro-miniaturization within the semiconductor industry in recent years have enabled biotechnologists to pack traditionally bulky sensing tools into smaller and smaller form factors, onto so-called biochips. As device dimensions shrink, it would be desirable to develop high sensitivity measurement techniques for biochips.

DETAILED DESCRIPTION

Nanopore membrane devices having pore sizes on the order of 1 nanometer in internal diameter have shown promise in rapid nucleotide sequencing. A nanopore is a very small hole, and the nanopore can be created by a pore-forming protein or as a hole in synthetic materials, such as silicon or graphene. When a voltage potential is applied across the nanopore immersed in a conducting fluid, a small ionic current arising from the conduction of ions across the nanopore can be observed. When a molecule, such as a DNA or RNA molecule, passes through the nanopore, the molecule can partially or completely block the nanopore. Since the size of the ionic current is sensitive to the pore size, the blockage of the nanopore by the DNA or RNA molecule causes a change in the magnitude of the current through the nanopore. It has been shown that the ionic current blockage can be correlated with the base pair sequence of the DNA molecule.

However, molecule characterization using nanopore membrane devices face various challenges. One of the challenges is measuring very low-level signals: the magnitude of the ionic current through the nanopore is very low, typically on the order of a few tens or hundreds of picoamps (pA). Therefore, detecting any changes in such a low-level current through the nanopore becomes very challenging.

One effective circuit technique for measuring low-level current is using an integrating amplifier. Using an integrating amplifier to measure low-level current has several advantages. The integrating amplifier averages the current over many measurement periods, which helps mitigate the effects of noise to some degree. The integrating amplifier also limits the bandwidth to the bandwidth of interest without the need for additional filtering. The circuitry for the integrating amplifier at the measurement site is also small as compared to those corresponding to other measurement techniques, thus making it feasible to fabricate a bio-sensor array with a large array of measurement cells, which is highly desirable for identifying molecules in applications such as single strand DNA characterization.

FIG. 1is a block diagram illustrating an embodiment of a sensor circuit100for measuring a physical property, such as a current, voltage, or charge, within a single cell of a bio-sensor array using an integrating amplifier. As shown inFIG. 1, a physical property is detected by detector102as detected signal104. Sensor circuit100may be used to measure the mean value of detected signal104without sampling, as described further below.

In some embodiments, an initiation flag106resets an integrating amplifier108and starts a continuous integration of detected signal104over time. Integrated output110is compared with a trip threshold114using a comparator112. When integrated output110reaches trip threshold114, a trip flag116may be used as a feedback signal to integrating amplifier108for terminating the integration of detected signal104. For example, when trip flag116is “on” or asserted, the integration is terminated. The duration of time between the assertion of initiation flag106and the assertion of trip flag116is proportional to the mean value of detected signal104, e.g., the mean value of a current. Accordingly, the “on” and “off” of trip flag116(only 1 bit of information) may be sent from the cell to an external processor for calculating the mean value of detected signal104. Alternatively, the “on/off” information may be sent from the cell to an external storage for delayed processing. For example, the clock cycles at which initiation flag106and trip flag116are respectively asserted may be recorded in an external storage. The number of clock cycles between the two asserted flags may then be used to determine the mean value of detected signal104at a later time.

In some embodiments, more accurate results may be obtained by integrating detected signal104over multiple integrating cycles. For example, the determined mean value of detected signal104may be further averaged over multiple integrating cycles. In some embodiments, initiation flag106is based at least in part on trip flag116. For example, initiation flag106may be re-asserted in response to trip flag116being asserted. In this example, trip flag116is used as a feedback signal for reinitializing integrating amplifier108, such that another cycle of integration of detected signal104may begin as soon as the previous cycle of integration is terminated. Re-asserting initiation flag106immediately after trip flag116is asserted reduces the portion of time when detector102generates a signal that is not integrated and thus not measured. The integration occurs over approximately the entire time that the signal is available. As a result, most of the information of the signal is captured, thereby minimizing the time to obtain an average value for the measured signal.

The sensitivity of sensor circuit100is maximized by continuously integrating detected signal102without sampling. This serves to limit the bandwidth of the measured signal. With continuous reference toFIG. 1, trip threshold114and an integration coefficient A set the bandwidth of the measured signal. As integration coefficient A decreases or as trip threshold114increases, the measured signal bandwidth decreases.

However, the low-current measuring circuit is susceptible to different noise sources, including external noise sources and noise sources within the measuring circuit itself. External noise sources affecting the performance of the low-current measuring circuit are numerous, including alternating current (AC) line noise, ballast noise from florescent light fixtures, electromagnetic interference (EMI), and the like.

Internal noise sources affecting the performance of the low-current measuring circuit include voltage and noise components from the integrating amplifier, as well as resistive noise from the measurement source. These components are amplified by the noise gain of the integrator, which is equal to (1+Cin/Cfb), where Cinis the total input capacitance, and Cfbis the integration capacitor (i.e., the feedback capacitor (Cfb) for the integrating amplifier).

FIG. 2is a diagram illustrating a cross-sectional view of an embodiment of a semiconductor device200with an integrated noise shield. In some embodiments, semiconductor device200is a nanopore device in a single cell of a nanopore array, and the integrated noise shield shields the nanopore device from both external noise sources and internal noise sources. In some embodiments, the integrated noise shield disclosed herein can also be integrated into other types of bio-sensor semiconductor arrays, such as bio-sensor semiconductor arrays in which low-level signal measurements susceptible to different noise sources are made. A nanopore device is used hereinafter as an example for semiconductor device200. However, a nanopore device is selected for illustration purposes only; accordingly, the present application is not limited to this specific example only.

The integrated noise shield surrounds and shields the portions of semiconductor device200that are susceptible to different noise sources. For example, with continued reference toFIG. 2, the portions of semiconductor device200that are susceptible to noise include a biological sample202, a measurement electrode204, other measurement integrated circuitries (not shown in the figure), and the like, and these portions of semiconductor device200are surrounded and shielded by the integrated noise shield. The integrated noise shield can be formed using any conductive material.

The integrated noise shield includes a bottom shield. With continued reference toFIG. 2, the bottom shield includes one or more conductive layers (206A and206B) that are placed below the portions of semiconductor device200that are susceptible to noise. In some embodiments, conductive layer206A is metal layer5(M5), which is the metal layer below the top metal layer208(M6) of semiconductor device200. Conductive layer206B is metal layer5′(M5′ or MIM Cap layer), which is a metal layer sitting on top of M5with a thin layer of oxide210in between. In some embodiments, the bottom shield is formed using conductive materials other than metal, including polycrystalline silicon, and the like. In some embodiments, semiconductor device200includes other conductive layers, such as a layer of substrate. Since the layer of substrate is typically thick and conductive, it acts as a bottom shield layer for semiconductor device200.

The integrated noise shield includes a top shield. The top shield includes a conductive layer208with an opening212. With continued reference toFIG. 2, the conductive layer208of the top shield is a metal layer placed above the portions of semiconductor device200that are susceptible to noise. In some embodiments, conductive layer208is metal layer6(M6), which is the top metal layer of semiconductor device200. In some embodiments, opening212allows biological sample202to be introduced into semiconductor device200such that biological sample202can be tested or analyzed by semiconductor device200.

The top shield further includes a conductive liquid shield214deposited over and covering the portions of semiconductor device200that are susceptible to noise, including biological sample202. Without conductive liquid shield214, opening212would expose semiconductor device200to different noise sources. In addition, conductive layer208(e.g., M6) cannot come into contact with the conductive liquid shield214. Therefore, conductive layer208is covered with a layer of oxide216to insulate it from conductive liquid shield214. In some embodiments, conductive liquid shield214is an electrolyte containing free ions that make the electrolyte electrically conductive.

The integrated noise shield further includes a side shield. The side shield includes a plurality of vertical shielding structures218forming a sidewall substantially surrounding the noise sensitive portions of semiconductor device200. Note that inFIG. 2, only two vertical shielding structures218are illustrated. However, the number of vertical shielding structures218can be more than two as well. In some embodiments, vertical shielding structures218include vias. Vias are formed by etching holes in insulating materials and depositing tungsten or other conductive material in the etched holes. The vias are used to make vertical conductive connections between the various metal or other conductive layers of semiconductor device200. For example, with reference toFIG. 2, vias218interconnect conductive layer208and conductive layer206A.

The plurality of vertical shielding structures218can be arranged in different configurations to achieve maximum shielding.FIG. 3Ais a diagram illustrating a top-view of an exemplary configuration of vertical shielding structures218. As shown inFIG. 3A, the plurality of vertical shielding structures218(e.g., vias) can be arranged in a rectangular layout surrounding measurement electrode204and other noise sensitive portions of semiconductor device200. However, other configuration shapes can be used as well. For example, the plurality of vertical shielding structures218can be arranged in a concentric ring surrounding measurement electrode204and other noise sensitive portions of semiconductor device200.

FIG. 3Bis a second diagram illustrating a top-view of another exemplary configuration of vertical shielding structures218. In this configuration, the plurality of vertical shielding structures218are arranged in a plurality of concentric squares or rings, e.g., two concentric squares. In some embodiments, the vertical shielding structures218in one ring are offset from the vertical shielding structures218in a different ring, i.e., the rings of vertical shielding structures218are not aligned together. While a single continuous shielding wall surrounding the noise sensitive portions of semiconductor device200may provide good shielding, the implementation of such a shielding wall may not be feasible due to various design or technical constraints. By offsetting one ring of vertical shielding structures218from another as shown inFIG. 3B, the shielding effect is close to that achieved by forming a single continuous shielding wall surrounding the noise sensitive portions of semiconductor device200.

With continued reference toFIG. 2, conductive layer208, which is a portion of the top shield, can be extended horizontally and radially outwards in the directions indicated by arrows218and220, respectively. Extending conductive layer208outwardly in this manner creates a roof edge or awning shielding, which can further prevent some of the interference from passing through a plurality of gaps between the plurality of vertical shielding structures218.

In some embodiments, the amount of extension of conductive layer208described above can be traded off against the density of the plurality of vertical shielding structures218. Vias are typically made of tungsten, and polishing tungsten becomes more challenging when the vias are more densely populated. Therefore, in some embodiments, the plurality of vertical shielding structures218can be spaced further apart when conductive layer208is extended further outward to form an expanded roof edge or awning to prevent some of the interference from infiltrating in between the plurality of vertical shielding structures218.

In some embodiments, some of the conductive layers or oxide layers forming the integrated shield of semiconductor device200are exploited to form a capacitor. For example, as shown inFIG. 2, the oxide layer210between M5′ and M5forms a capacitor222. In some embodiments, semiconductor device200requires capacitors for various purposes. For example, the integrating amplifier in semiconductor device200may require a capacitance, which can be provided by capacitor222.

FIG. 4is a diagram illustrating a cross-sectional view of an embodiment of a semiconductor device400with an integrated noise shield. The integrated noise shield surrounds and shields the portions of semiconductor device400that are susceptible to different noise sources.

The integrated noise shield includes a bottom shield. With continued reference toFIG. 4, the bottom shield includes a substrate layer402that is placed below the portions of semiconductor device400that are susceptible to noise, including a layer404containing active semiconductor circuits.

The integrated noise shield includes a top shield. In this embodiment, the top shield includes a conductive liquid shield214deposited over and covering the portions of semiconductor device400that are susceptible to noise, including biological sample202. Conductive layer406(e.g., M6) cannot come into contact with conductive liquid shield214. Therefore, conductive layer406is covered with a layer of oxide216to insulate it from conductive liquid shield214, which may be an aqueous electrolyte solution as described earlier.

The integrated noise shield further includes a side shield. The side shield includes a plurality of vertical shielding structures218(e.g., vias) forming a sidewall substantially surrounding the noise sensitive portions of semiconductor device400.

The plurality of vertical shielding structures218can be arranged in different configurations to achieve maximum shielding. For example, configurations similar to those inFIG. 3AandFIG. 3Bmay be used.

With continued reference toFIG. 4, conductive layer406can be extended radially outwards in the directions indicated by arrows408and410, respectively. Extending conductive layer406outwards in this manner creates a roof edge or awning, which can prevent some of the interference from infiltrating in between the plurality of vertical shielding structures218. In some embodiments, the amount of extension of conductive layer406described above can be traded off against the density of the plurality of vertical shielding structures218.