Switch apparatus

A switch apparatus is provided, including: a main switch connected between first and second terminals, and electrically connecting or disconnecting the first and second terminals according to gate voltage applied to a gate terminal; a voltage output unit having a voltage divider including a first voltage-division resistance on the first terminal side and a second voltage-division resistance on the second terminal side, and outputting voltage corresponding to voltage of the first terminal and voltage of the second terminal if the main switch is caused to enter a connected state; a buffer outputting voltage following output voltage of the voltage output unit in a connected state of the main switch; and a switch control circuit supplying first voltage corresponding to output voltage of the buffer to the gate terminal, and supplying a second voltage corresponding to output voltage of the buffer to a bulk terminal of the main switch.

The contents of the following Japanese patent application(s) are incorporated herein by reference:NO. 2016-182248 filed on Sep. 16, 2016,NO. 2016-182307 filed on Sep. 16, 2016, andNO. 2017-169023 filed on Sep. 1, 2017.

BACKGROUND

1. Technical Field

The present invention relates to a switch apparatus.

2. Related Art

Conventionally, it has been known to keep, in a semiconductor switch such as a MOSFET, gate-source voltage at approximately constant voltage using a level shifter and reduce variations of an ON-resistance (please see Patent Document 1, for example).

However, because semiconductor switches such as a MOSFET have a junction capacitance, and the junction capacitance varies according to the signal intensity of an input signal, distortion may be generated to signals sometimes. Accordingly, a switch apparatus with reduced variations in an ON-resistance and junction capacitance of a MOSFET has been desired.

SUMMARY

Therefore, it is an object of an aspect of the innovations herein to provide a switch apparatus, which is capable of overcoming the above drawbacks accompanying the related art. The above and other objects can be achieved by combinations described in the claims. In other words, a first aspect of the present invention provides a switch apparatus including: a main switch that is connected between a first terminal and a second terminal and electrically connects or disconnects the first terminal and the second terminal according to gate voltage applied to a gate terminal; a voltage output unit that has a voltage divider including a first voltage-division resistance on the first terminal side and a second voltage-division resistance on the second terminal side, and outputs voltage corresponding to voltage of the first terminal and voltage of the second terminal if the main switch is caused to enter a connected state; a buffer that outputs voltage following output voltage of the voltage output unit in a connected state of the main switch; and a switch control circuit that supplies first voltage corresponding to output voltage of the buffer to the gate terminal, and supplies a second voltage corresponding to output voltage of the buffer to a bulk terminal of the main switch.

DESCRIPTION OF EXEMPLARY EMBODIMENTS

FIG. 1shows a configuration example of a switch apparatus100. The switch apparatus100performs control to keep gate-source voltage of a semiconductor switch approximately constant to keep an ON-resistance of the semiconductor switch at an approximately constant value. The switch apparatus100includes a first terminal12, a second terminal14, a third terminal16, a power source unit20, a main switch110, a first sub-switch112, a second sub-switch114, a current source120, an inverter130, a logical level shifter140, a third sub-switch150and a level shifter160.

The first terminal12and the second terminal14are connected to one end and the other end of the main switch110, respectively, and transmit an electrical signal if the main switch110is in a connected state. The first terminal12and the second terminal14are connected with a source of transmission, destination of transmission, or the like of an electrical signal, for example. One of the first terminal12and the second terminal14functions as an input terminal for an electrical signal, for example, and in this case the other terminal functions as an output terminal.

The third terminal16receives an input of a control signal to control the switch apparatus100. That is, the switch apparatus100electrically connects or disconnects the first terminal12and the second terminal14according to a control signal input through the third terminal16. The power source unit20outputs predetermined voltage. The power source unit20may supply power source voltage of the switch apparatus100, and in this case supplies voltage to each unit of the switch apparatus100.

The main switch110is connected between the first terminal12and the second terminal14, and electrically connects or disconnects the first terminal12and the second terminal14according to gate voltage applied to its gate terminal (G). The main switch110may be an n-channel MOSFET, or instead of this may be a p-channel MOSFET.FIG. 1shows an example in which the main switch110is an n-channel MOSFET.

As one example, the main switch110has a source terminal (S) connected to the first terminal12and a drain terminal (D) connected to the second terminal14. As one example, the source terminal and/or bulk terminal (B) of the main switch110is/are connected to the ground (GND) potential such as 0V. The main switch110electrically connects or disconnects the drain terminal and source terminal according to gate-source voltage.

The first sub-switch112is connected between the first terminal12and the bulk terminal of the main switch110, and electrically connects or disconnects the first terminal12and the bulk terminal of the main switch110according to gate voltage applied to its gate terminal. The second sub-switch114is connected between the bulk terminal of the main switch110and the second terminal14, and electrically connects or disconnects the bulk terminal of the main switch110and the second terminal14according to gate voltage applied to its gate terminal.

The first sub-switch112and the second sub-switch114may be n-channel MOSFETs, or instead of this may be p-channel MOSFETs. The gate terminals of the main switch110, the first sub-switch112and the second sub-switch114are desirably MOSFETs of the same polarity.FIG. 1shows an example in which the first sub-switch112and the second sub-switch114are n-channel MOSFETs. As one example, the drain terminal of the first sub-switch112is connected to the first terminal12, and its source terminal is connected to the bulk terminal of the main switch110. Also, the source terminal of the second sub-switch114is connected to the bulk terminal of the main switch110, and its drain terminal is connected to the second terminal14.

The gate terminals of the main switch110, the first sub-switch112and the second sub-switch114are connected to each other, and approximately the same gate voltage is supplied thereto. That is, the main switch110, the first sub-switch112and the second sub-switch114are switched to either a connected state or a disconnected state according to a control signal. Accordingly, a transmission path through the main switch110and a transmission path through the first sub-switch112and the second sub-switch114are formed between the first terminal12and the second terminal14if they enter a connected state.

The current source120allows predetermined constant current to flow. The inverter130reverses the logic of a control signal input through the third terminal16. Also, the logical level shifter140shifts the output level of the inverter130. The third sub-switch150is connected between the gate terminal of the main switch110and the ground potential, and electrically connects or disconnects the gate terminal of the main switch110and the ground potential according to an output of the logical level shifter140. As one example, the third sub-switch150is an n-channel MOSFET.

The level shifter160is provided between the gate terminal and bulk terminal of the main switch110, and generates a predetermined potential difference between the gate terminal and bulk terminal of the main switch110according to an input of current. Here, the predetermined potential difference is a potential difference equal to or larger than gate-source voltage that causes the main switch110to enter a connected state. That is, corresponding to the level shifter160generating the predetermined potential difference, the main switch110, the first sub-switch112and the second sub-switch114are switched to a connected state.

As one example, the level shifter160has one end connected to the gate terminal of the main switch110and the current source120, and the other end connected to the bulk terminal of the main switch110, and generates a predetermined potential difference between the one end and the other end according to current input from the current source120. In this case, the level shifter160may stop generation of a potential difference corresponding to the voltage at the one end side being approximately 0V.

For example, the inverter130and the logical level shifter140supply, to the gate electrode of the third sub-switch150, a low potential signal according to a control signal (as one example, high potential) to cause the main switch110to enter a connected state. Thereby, the third sub-switch150electrically disconnects the gate terminal of the main switch110and the ground potential. Because thereby the current source120causes approximately constant current to flow to the level shifter160, the main switch110, the first sub-switch112and the second sub-switch114can be switched to a connected state.

Also, the inverter130and the logical level shifter140supply, to the gate electrode of the third sub-switch150, high potential signal according to a control signal (as one example, low potential) to cause the main switch110to enter a disconnected state. Thereby, the third sub-switch150electrically connects the gate terminal of the main switch110and the ground potential to make the gate voltage of the main switch110approximately 0V. Because thereby the current source120causes approximately constant current to flow to the ground, current is not supplied to the level shifter160, and the gate-source voltage of the main switch110becomes approximately 0V, and it enters a disconnected state. Likewise, the first sub-switch112and the second sub-switch114enter a disconnected state.

As mentioned above, the switch apparatus100can switch the main switch110to either a connected state or a disconnected state according to a control signal. Also, because the switch apparatus100makes the gate-source voltage of the main switch110approximately constant voltage to cause it to enter a connected state, even if voltage of the first terminal12or the second terminal14varies, an ON-resistance can be kept at an approximately constant value.

However, the switch apparatus100has the main switch110, the first sub-switch112and the second sub-switch114between the first terminal12and the second terminal14, and if the first terminal12and the second terminal14are electrically connected, these multiple switches enter a connected state. It has been known to form such a main switch110, first sub-switch112and second sub-switch114electrically separately from the semiconductor substrate on a well region formed by PN junction or the like.

In this case, a parasitic junction capacitance is formed to be loads for the first terminal12and the second terminal14. If such a junction capacitance exists, variations in potential of the first terminal12and the second terminal14correspondingly result in variations in load capacitances for the first terminal12and the second terminal14. For example, because if an analog signal is input through the first terminal12, and the second terminal14is caused to receive the analog signal using a load connected to the second terminal, the load capacitance varies according to the signal intensity of the analog signal, distortion is generated to the received analog signal, and the signal waveform may be degraded in some cases.

Also, because in the switch apparatus100, the other end of the level shifter160is connected to the source terminals of the first sub-switch112and the second sub-switch114, current flows into a transmitted analog signal. Here, current to flow to the level shifter160is current supplied by the current source120, but if higher harmonic noises or the like of an electrical signal are superimposed on this current source120, the higher harmonic noises are mixed in an analog signal, and the signal waveform of the analog signal may be degraded.

Such degradation of a signal waveform becomes significant if a dumping resistance or the like is provided on the first terminal12side of a transmitting side, for example. It has been known to make the W/L ratio of a MOS transistor high, and lower an ON-resistance for the purpose of reducing such distortion to be superimposed on an analog signal. Here, L is a channel length. It has been known to increase a channel width W because the channel length has its lower limit.

However, if high-quality audio signals are handled, transmission of less distorted signals at the level of −130 dB or lower is required in some cases for example, and it has been difficult to realize distortion reduction by adjustment of the W/L ratio of a transistor. Also, it has been difficult to reduce higher harmonic noises or the like to be mixed in from the current source120. In view of this, a switch apparatus200according to the present embodiment reduces the ON-resistance, and reduces distortion to be superimposed on a transmitted signal, and at the same time, allows sure execution of switching operations corresponding to a control signal. Such a switch apparatus200is explained next.

FIG. 2shows a configuration example of the switch apparatus200according to the present embodiment. The switch apparatus200controls the gate voltage according to signal voltage of an input electrical signal to reduce distortion to be superimposed on a transmitted signal. The switch apparatus200includes a first terminal22, a second terminal24, a third terminal26, a main switch210, a voltage output unit220, a buffer230and a switch control circuit240.

The first terminal22and the second terminal24are connected to one end and the other end of the main switch210, respectively, and transmit an electrical signal if the main switch210is in a connected state. The first terminal22and the second terminal24are connected with a source of transmission, destination of transmission, or the like of an electrical signal, for example. One of the first terminal22and the second terminal24functions as an input terminal for an electrical signal, for example, and in this case the other terminal functions as an output terminal.

The third terminal26receives an input of a control signal to control the switch apparatus200. That is, the switch apparatus200electrically connects or disconnects the first terminal22and the second terminal24according to a control signal input through the third terminal26.

The main switch210is connected between the first terminal22and the second terminal24, and electrically connects or disconnects the first terminal22and the second terminal24according to gate voltage applied to its gate terminal (G). The main switch210is a semiconductor switch such as a FET. As one example, the main switch210has a drain terminal (D) connected to the second terminal24, and a source terminal (S) connected to the first terminal22. The main switch210electrically connects or disconnects the drain terminal and source terminal according to gate-source voltage. Also, the main switch210further has a bulk terminal (back gate terminal, B).

In the present embodiment, the main switch210is explained, for example, as a normally-off n-type semiconductor switch that electrically connects the drain terminal and source terminal corresponding to the gate terminal having ON-potential (high potential). In this case, the main switch210is desirably an n channel MOSFET. Also, the main switch210is desirably provided in a p-well on a substrate surface of a semiconductor substrate or the like.

If the main switch210is caused to enter a connected state, the voltage output unit220outputs voltage corresponding to voltage of the first terminal22and voltage of the second terminal24. The voltage output unit220is connected to the first terminal22, the second terminal24and the third terminal26for example, and supplies, to the buffer230, voltage corresponding to voltage of the first terminal22, voltage of the second terminal24and a control signal.

If the main switch210is in a connected state, the buffer230outputs voltage following voltage corresponding to at least one of voltage of the first terminal22and voltage of the second terminal24. The buffer230supplies, to the switch control circuit240, voltage following output voltage of the voltage output unit220.

The switch control circuit240supplies, to the gate terminal of the main switch210, first voltage corresponding to output voltage of the buffer230. Also, the switch control circuit240supplies, to the bulk terminal of the main switch210, second voltage corresponding to output voltage of the buffer230. If the main switch210is caused to enter a connected state, the switch control circuit240supplies, to the gate terminal of the main switch210, the first voltage obtained by adding non-zero offset voltage to the second voltage supplied to the bulk terminal of the main switch210. Also, if the main switch210is caused to enter a disconnected state, the switch control circuit240supplies, to the gate terminal of the main switch210, the first voltage which is the same as the second voltage supplied to the bulk terminal of the main switch210.

The above-mentioned switch apparatus200supplies, to the gate electrode of the main switch210, gate voltage corresponding to signal voltage of an electrical signal that the main switch210transmits. The gate voltage that the switch apparatus200supplies to the gate electrode of the main switch210is explained next together with details of each unit.

FIG. 3shows a configuration example of the voltage output unit220according to the present embodiment. The voltage output unit220has a reference potential generating unit30, a first input terminal32, a second input terminal34, a third input terminal36, an intermediate terminal38, a voltage divider222, a first sub-switch224, a second sub-switch226and a third sub-switch228.

The reference potential generating unit30generates first reference potential to be a reference for the switch apparatus200. The reference potential generating unit30generates, as the first reference potential, potential that causes the main switch210to enter an OFF-state for example. The first reference potential may be potential to cause a diode formed between the source terminal and bulk terminal of the main switch210to enter an OFF-state. The reference potential generating unit30generates, as the first reference potential, potential equal to or lower than the lower limit value of a voltage range of an electrical signal that the main switch210transmits. As one example, the reference potential generating unit30generates, as the first reference potential, potential of −3V or lower if transmitting, between the first terminal22and the second terminal24, a sinusoidal signal (3·sin(t) having amplitude voltage of 3V with 0V as its reference. Here, the first reference potential is \TOFF.

The first input terminal32is connected with the first terminal22, and receives an input of a signal to be input through the source terminal of the main switch210or a signal to be output through the source terminal. The second input terminal34is connected with the second terminal24, and receives an input of a signal to be input through the drain terminal of the main switch210or a signal to be output through the drain terminal. The third input terminal36is connected with the third terminal26, and receives an input of a control signal. The intermediate terminal38outputs an output of the voltage output unit220to the buffer230.

The voltage divider222is provided between the first input terminal32and the second input terminal34. If the main switch210is caused to enter a connected state, the voltage divider222divides voltage of the source terminal of the main switch210and voltage of its drain terminal. The voltage divider222includes a first voltage-division resistance252on the first terminal22side and a second voltage-division resistance254on the second terminal24side.

The first voltage-division resistance252is a voltage-division resistance connected to the first terminal22side. The first voltage-division resistance252has one end connected to the first input terminal32side, and the other end connected to the second voltage-division resistance254. Here, a resistance value of the first voltage-division resistance252is R1. The second voltage-division resistance254is a voltage-division resistance connected to the second terminal24side. The second voltage-division resistance254has one end connected to the other end of the first voltage-division resistance252, and the other end connected to the second input terminal34side. Here, a resistance value of the second voltage-division resistance254is R2.

The first voltage-division resistance252and the second voltage-division resistance254desirably have approximately the same resistance values. In this case, the voltage divider222divides voltage between the first terminal22and the second terminal24at a ratio of approximately 1:1. The intermediate terminal38is connected between the first voltage-division resistance252and the second voltage-division resistance254, and outputs resultant voltage obtained after voltage-division by the voltage divider222to the buffer230.

The first sub-switch224is provided between the first terminal22and the first voltage-division resistance252, and enters a connected state if the main switch210is caused to enter a connected state, and enters a disconnected state if the main switch210is caused to enter a disconnected state. That is, the first sub-switch224switches whether or not to electrically connect one end of the first voltage-division resistance252and the first input terminal32according to a control signal input through the third input terminal36.

The second sub-switch226is provided between the second terminal24and the second voltage-division resistance254, and enters a connected state if the main switch210is caused to enter a connected state, and enters a disconnected state if the main switch210is caused to enter a disconnected state. That is, the second sub-switch226switches whether or not to electrically connect the other end of the second voltage-division resistance254and the second input terminal34according to a control signal input through the third input terminal36.

Instead of this, the first sub-switch224may be provided between the intermediate terminal38and the first voltage-division resistance252. That is, according to a control signal input through the third input terminal36, the first sub-switch224switches whether or not to convey an electrical signal input through the first input terminal32to the intermediate terminal38. Likewise, the second sub-switch226may be provided between the intermediate terminal38and the second voltage-division resistance254. That is, according to a control signal input through the third input terminal36, the second sub-switch226switches whether or not to convey an electrical signal input through the second input terminal34to the intermediate terminal38.

The third sub-switch228is connected between a portion between the first voltage-division resistance252and the second voltage-division resistance254and the reference potential generating unit30, and enters a connected state if the main switch210is caused to enter a disconnected state, and enters a disconnected state if the main switch210is caused to enter a connected state. That is, the third sub-switch228switches whether or not to electrically connect the portion between the first voltage-division resistance252and the second voltage-division resistance254and the reference potential generating unit30according to a control signal.

For example, if the main switch210is caused to enter a disconnected state, the third sub-switch228supplies first reference potential VOFFto the intermediate terminal38between the first voltage-division resistance252and the second voltage-division resistance254. Also, if the main switch210is caused to enter a connected state, the third sub-switch228electrically disconnects the portion between the first voltage-division resistance252and the second voltage-division resistance254and the reference potential generating unit30. Thereby, voltage obtained after voltage-division by the voltage divider222is output through the intermediate terminal38. In this case, if voltage output through the intermediate terminal38is VM, the voltage VMcan be expressed as shown in the following equation.

Here, voltage of the first terminal22is V1, and voltage of the second terminal24is V2. Also, R1=R2. The first sub-switch224, the second sub-switch226and the third sub-switch228are desirably semiconductor switches.

As mentioned above, the voltage output unit220supplies, from the intermediate terminal38to the buffer230, voltage obtained after voltage-division by the voltage divider222according to a control signal to cause the main switch210to enter a connected state. Also, the voltage output unit220supplies, from the intermediate terminal38to the buffer230, the first reference potential VOFFof the reference potential generating unit30according to a control signal to cause the main switch210to enter a disconnected state. The buffer230is explained next.

FIG. 4shows a configuration example of the buffer230according to the present embodiment. The buffer230outputs, to the switch control circuit240, voltage following the voltage VMfrom the intermediate terminal38of the voltage output unit220. The buffer230has a fourth input terminal232, a first output terminal234and an amplifying unit236.

The fourth input terminal232is connected to the intermediate terminal38of the voltage output unit220, and receives output voltage of the voltage divider222of the voltage output unit220. The first output terminal234outputs the output of the buffer230to the switch control circuit240.

The amplifying unit236amplifies an input electrical signal. The amplifying unit236may be a buffer amplifier having an amplification factor of approximately 1. Thereby, the buffer230supplies, to the switch control circuit240, voltage following the voltage VMoutput through the intermediate terminal38. For example, according to a control signal to cause the main switch210to enter a connected state, the buffer230supplies voltage obtained after voltage-division by the voltage divider222. Also, according to a control signal to cause the main switch210to enter a disconnected state, the buffer230supplies first reference potential VOFF. The buffer230may be a voltage follower circuit that outputs voltage of an input signal at an amplification factor of approximately 1. Also, the buffer230may be a circuit formed by connecting inverting amplifier circuits at two steps. The switch control circuit240is explained next.

FIG. 5shows a configuration example of the switch control circuit240according to the present embodiment. The switch control circuit240has a fifth input terminal42, a sixth input terminal44, a second output terminal46, a third output terminal48, a power source unit52, a constant-current circuit242, a resistance244and a fourth sub-switch246.

The fifth input terminal42is connected to the first output terminal234of the buffer230, and receives an output of the buffer230. The sixth input terminal44is connected with the third terminal26and receives an input of a control signal. The second output terminal46outputs a first output of the switch control circuit240to the bulk terminal of the main switch210. For example, in the switch control circuit240, the fifth input terminal42and the second output terminal46are connected, and the switch control circuit240supplies, as a first output, voltage approximately the same as output voltage of the buffer230to the bulk terminal of the main switch210.

The third output terminal48outputs, to the gate terminal of the main switch210, a second output of the switch control circuit240. The power source unit52outputs predetermined voltage. The power source unit52may supply power source voltage of the switch apparatus200, and in this case, supplies the voltage to each unit of the buffer230or the like. In the present embodiment, voltage that the switch control circuit240supplies to the gate terminal of the main switch210is first voltage, and voltage that the switch control circuit240supplies to the bulk terminal of the main switch210is second voltage.

The constant-current circuit242allows a predetermined current to flow. The constant-current circuit242has one end connected to the power source unit52and outputs an approximately constant current from the other end. The constant-current circuit242is desirably configured with a transistor or the like.

The resistance244generates offset voltage if current from the constant-current circuit242flows therethrough. The resistance244has one end connected to the fifth input terminal42and the second output terminal46, and the other end connected to the third output terminal48. The resistance244has a predetermined resistance value so that predetermined offset voltage is generated between the one end and the other end according to a current value of current that the constant-current circuit242causes to flow. Here, the value of the offset voltage is Va.

As one example, the offset voltage Vais set to voltage equal to or higher than voltage between the gate and source (as one example, threshold voltage VT) that switches the main switch210to a connected state. Thereby, if current from the constant-current circuit242flows through the resistance244, the resistance244supplies the offset voltage Vabetween the gate terminal and bulk terminal of the main switch210. If the main switch210is an n-type semiconductor switch, the switch control circuit240supplies positive offset voltage Va.

The fourth sub-switch246is connected between the constant-current circuit242and the resistance244, and switches whether or not to cause an approximately constant current from the constant-current circuit242to flow through the resistance244according to a control signal input through the sixth input terminal44. That is, the fourth sub-switch246switches whether or not to electrically connect the other end of the constant-current circuit242and the other end of the resistance244. The fourth sub-switch246is desirably a semiconductor switch.

The fourth sub-switch246electrically disconnects the constant-current circuit242and the resistance244if the main switch210is caused to enter a disconnected state, for example. That is, the fourth sub-switch246is a switch that enters a disconnected state according to a control signal to cause the main switch210to enter a disconnected state. Thereby, the resistance244does not generate offset voltage Va, but makes the voltage between the gate terminal and bulk terminal of the main switch210approximately 0V.

Also, the fourth sub-switch246electrically connects the constant-current circuit242and the resistance244if the main switch210is caused to enter a connected state. That is, the fourth sub-switch246is a switch that enters a connected state according to a control signal to cause the main switch210to enter a connected state. Thereby, the resistance244generates offset voltage Va, and supplies the offset voltage Vato a portion between the gate terminal and bulk terminal of the main switch210.

As mentioned above, the switch control circuit240supplies, to the gate terminal of the main switch210, gate voltage (first voltage) obtained by adding offset voltage Vato voltage from the intermediate terminal38if the main switch210is caused to enter a connected state. Also, the switch control circuit240supplies, to the gate terminal of the main switch210, gate voltage (first voltage) which is equal to voltage from the intermediate terminal38, but does not include offset voltage Vaif the main switch210is caused to enter a disconnected state.

That is, if the gate voltage is VG, VGis expressed as shown in the following equation.
VG=VM+Va(connected state)
VG=VM(disconnected state)  (Equation 2)

Here, because a voltage drop I·RONdue to an ON-resistance RONof the main switch210is generated if current I flows from the first terminal22to the second terminal24, voltage of the first terminal22becomes higher than voltage of the second terminal24as shown in the following equation.
V1=V2+I·RON(Equation 4)

In this case, an average voltage VAVEof voltage of the first terminal22and voltage of the second terminal24is calculated as shown in the following equation.
VAVE=(V1+V2)/2=V2+I·RON/2  (Equation 5)

Gate voltage VGof the main switch210becomes voltage VAVE+Vaobtained by adding the offset voltage Vato the average voltage VAVE. In this case, because the first terminal22side functions as a drain terminal and the second terminal24side functions as a source terminal, the gate-source voltage VGSof the main switch210is calculated as shown in the following equation.
VGS=VAVE+Va−V2=Va+I·RON/2  (Equation 6)

On the other hand, because a voltage drop I·RONdue to an ON-resistance RONof the main switch210is generated if current I flows from the second terminal24to the first terminal22, voltage of the second terminal24becomes higher than voltage of the first terminal22as shown in the following equation.
V1=V2−I·RON(Equation 7)

In this case, because the second terminal24side functions as a drain terminal and the first terminal22side functions as a source terminal, the gate-source voltage VGSof the main switch210is calculated as shown in the following equation.

Because (Equation 8) is the same as (Equation 6), the gate-source voltage VGSof the main switch210becomes an approximately constant voltage higher than the threshold voltage VTirrespective of the direction of a signal transmitted between the first terminal22and the second terminal24. It can be known that if the ON-resistance RONis taken into consideration, the gate-source voltage VGSundergoes a variation merely of I·RON/2 even if a signal current I flowing between the first terminal22and the second terminal24changes, and the voltage remains approximately constant.

Also, if the main switch210is caused to enter a disconnected state, the switch control circuit240supplies first reference potential VOFFto the gate terminal and bulk terminal of the main switch210. Because the first reference potential VOFFis potential equal to or lower than the lower limit value of the voltage range of an electrical signal that the main switch210transmits, the potential of the gate terminal becomes equal to or lower than potential of the first terminal22and the second terminal24. That is, the gate-source voltage VGSof the main switch210becomes 0V or lower, and the main switch210keeps its disconnected state.

That is, the switch apparatus200according to the present embodiment can stably keep its disconnected state or connected state corresponding to a control signal even if the signal intensity of an input electrical signal varies. Also, because the switch apparatus200keeps the gate-source voltage VGSat an approximately constant voltage, it can reduce variations of an ON-resistance.

Also, in the switch apparatus200, the first terminal22and second terminal24to function as input/output terminals are not connected with the bulk terminal of the main switch210. Accordingly, even if higher harmonic noises or the like are superimposed on the constant-current circuit242, the higher harmonic noises can be prevented from being mixed in a transmission path between the first terminal22and the second terminal24through the bulk terminal. Also, even if the main switch210is provided on a p-well on a substrate surface of a semiconductor substrate or the like, and a junction capacitance is formed, the first terminal22and the second terminal24can prevent the junction capacitance from becoming a load.

In this manner, because the switch apparatus200according to the present embodiment can reduce higher harmonic noises, and reduce variations of a load capacitance based on a junction capacitance, it can reduce distortion generated to a transmitted electrical signal, and prevent degradation of the signal waveform.

The above-mentioned switch apparatus200according to the present embodiment is explained as supplying, to the buffer230, voltage obtained after dividing voltage of the first terminal22and voltage of the second terminal24, the switch apparatus200is not limited thereto. For example, if it is known in advance through which one of the first terminal22and the second terminal24an electrical signal is input to the switch apparatus200, the switch apparatus200may supply, to the buffer230, voltage of a terminal on the side where the electrical signal is input. Such a switch apparatus200is explained next.

FIG. 6shows a first variant of the switch apparatus200according to the present embodiment. In the switch apparatus200of the first variant, units that perform operations that are approximately the same as those of the switch apparatus200according to the present embodiment shown inFIG. 2are given the same reference symbols, and explanation about them is omitted. In the example shown, in the switch apparatus200of the first variant, if the main switch210is caused to enter a connected state, an electrical signal is input through the first terminal22. In this case, the switch apparatus200supplies, to the buffer230through the third sub-switch228, voltage V1of the first terminal22through which an electrical signal is input.

That is, according to a control signal to cause the main switch210to enter a connected state, the third sub-switch228of the first variant switches to supply the voltage V1of the first terminal22to the buffer230. Also, according to a control signal to cause the main switch210to enter a disconnected state, the third sub-switch228of the first variant switches to supply the first reference potential VOFFgenerated by the reference potential generating unit30to the buffer230. As one example, the third sub-switch228of the first variant is configured with a plurality of n-channel MOSFETs.

Thereby, the buffer230supplies the voltage V1or first reference potential VOFFof the first terminal22to the switch control circuit240. The switch control circuit240supplies, to the bulk terminal of the main switch210, the voltage V1of the first terminal22and supplies, to the gate terminal, a gate voltage obtained by adding the offset voltage Vato the voltage V1of the first terminal22according to a control signal to cause the main switch210to enter a connected state. Thereby, the gate-source voltage VGs of the main switch210becomes an approximately constant voltage exceeding the threshold voltage VT, and so can keep its connected state while at the same time reducing variations of an ON-resistance.

Also, the switch control circuit240supplies, to the bulk terminal and gate terminal of the main switch210, the first reference potential VOFFaccording to a control signal to cause the main switch210to enter a disconnected state. Because thereby even if an electrical signal is input through the first terminal22, potential equal to or lower than the lower limit value of the voltage range of the electrical signal is supplied to the gate terminal of the main switch210as a gate voltage, the gate-source voltage VGSof the main switch210becomes voltage lower than the threshold voltage VT. Accordingly, the main switch210can keep its disconnected state.

In the above-mentioned switch apparatus200of the first variant, the first terminal22and the second terminal24to function as input/output terminals are not connected with the bulk terminal of the main switch210, in a similar manner to the switch apparatus200shown inFIG. 2. That is, because the switch apparatus200of the first variant can reduce higher harmonic noises, and reduce variations of a load capacitance based on a junction capacitance, it can reduce distortion generated to a transmitted electrical signal, and prevent degradation of the signal waveform. In the above-mentioned switch apparatus200according to the present embodiment explained as an example, the main switch210is an n-type semiconductor switch, but the switch apparatus200is not limited thereto. The main switch210may be a p-type semiconductor switch. Such a switch apparatus200is explained next.

FIG. 7shows a second variant of the switch apparatus200according to the present embodiment. In the switch apparatus200of the second variant shown as an example, the main switch210is a p-type semiconductor switch. In this case, the main switch210is desirably a p-channel MOSFET. Also, the main switch210is desirably provided in an n-well on a substrate surface. In the switch apparatus200of the second variant, units that perform operations that are approximately the same as those of the switch apparatus200according to the present embodiment shown inFIG. 2are given the same reference symbols, and explanation about them is omitted.

The switch apparatus200of the second variant has approximately the same schematic configuration as the schematic configuration of the switch apparatus200shown inFIG. 2. Because in the switch apparatus200, the polarity of the main switch210is different, the reference potential generating unit30of the voltage output unit220generates potential different from the first reference potential explained with reference toFIG. 3. The reference potential generating unit30generates, as the first reference potential, potential equal to or higher than the upper limit value of a voltage range of an electrical signal that the main switch210transmits, for example. Also, the switch control circuit240correspondingly has a different internal circuit configuration as well. The switch control circuit240of the second variant is explained next.

FIG. 8shows a configuration example of the switch control circuit240of the switch apparatus200of the second variant. The switch control circuit240of the second variant has, in a similar manner to the switch control circuit240shown inFIG. 5, the fifth input terminal42, the sixth input terminal44, the second output terminal46, the third output terminal48, the constant-current circuit242, the resistance244and the fourth sub-switch246. The switch control circuit240of the second variant has second reference potential54in place of the power source unit52. The second reference potential54is potential equal to or lower than voltage at which the gate voltage Vacan be supplied to the main switch210for the lowest potential of an electrical signal that the main switch210transmits.

Because the polarity of the main switch210is different, the constant-current circuit242causes current to flow in a reverse direction to the constant-current circuit242of the switch control circuit240shown inFIG. 5. That is, the constant-current circuit242causes current to flow from the resistance244toward the constant-current circuit242. That is, if current from the constant-current circuit242flows through the resistance244, the resistance244supplies a negative offset voltage Vabetween the gate terminal and source terminal of the main switch210. Because in this manner, the switch control circuit240switches whether or not to supply a negative offset voltage Vaaccording to a control signal, it can correspondingly switch the main switch210of the p-type semiconductor switch to either a connected state or a disconnected state.

FIG. 9shows a first variant of the voltage output unit220according to the present embodiment. In the voltage output unit220of the first variant, units that perform operations that are approximately the same as those of the voltage output unit220according to the present embodiment shown inFIG. 3are given the same reference symbols, and explanation about them is omitted. If the main switch210is caused to enter a connected state, the voltage output unit220of the first variant outputs an average voltage of voltage of the first terminal22and voltage of the second terminal24. Also, if the main switch210is caused to enter a disconnected state, the voltage output unit220of the first variant outputs voltage corresponding to either voltage of the first terminal22or voltage of the second terminal24and to the first reference potential VOFF.

The voltage output unit220of the first variant has a sub-switch on at least one of the first terminal22side relative to an intermediate point between the first voltage-division resistance252and the second voltage-division resistance254the second terminal24side relative to the intermediate point. With reference toFIG. 9, an example in which a signal is transmitted from the first terminal22to the second terminal24if the main switch210enters a connected state is explained. As one example, the signal is a sinusoidal signal (3·sin(t) having an amplitude voltage of 3V. In this case, the first sub-switch224explained with reference toFIG. 3may not be present. That is,FIG. 9shows an example of the voltage output unit220that outputs voltage corresponding to voltage of the first terminal22and the first reference potential VOFFif the main switch210is caused to enter a disconnected state. The voltage output unit220may further include a first output resistance312and a second output resistance314.

The first output resistance312has one end that is connected between the first voltage-division resistance252and the second voltage-division resistance254, and the other end that outputs output voltage of the voltage output unit220. That is, the first output resistance312is connected between a portion between the first voltage-division resistance252and the second voltage-division resistance254and the intermediate terminal38. Also, the second output resistance314has one end that is connected to the other end of the first output resistance312and the other end to which the first reference potential VOFFis supplied. That is, the intermediate terminal38is connected between the first output resistance312and the second output resistance314.

A resistance value R3of the first output resistance312and a resistance value R4of the second output resistance314desirably have approximately the same values. Also, a resistance value R1of the first voltage-division resistance252and a resistance value R2of the second voltage-division resistance254desirably have approximately the same values. Also, the resistance value R3of the first output resistance312and the resistance value R4of the second output resistance314desirably have values sufficiently higher than (for example, several times higher than, a dozen times higher than, or several dozen times higher than) the resistance value R1of the first voltage-division resistance252and the resistance value R2of the second voltage-division resistance254, respectively. In the present embodiment, in an example explained, the resistance values of the first voltage-division resistance252and the second voltage-division resistance254are approximately the same values, the resistance values of the first output resistance312and the second output resistance314are approximately the same values, and the resistance value R3of the first output resistance312and the resistance value R4of the second output resistance314are values sufficiently higher than the resistance value R1of the first voltage-division resistance252and the resistance value R2of the second voltage-division resistance254, respectively (R1=R2, R3=R4, R1<<R3and R2<<R4).

In the voltage output unit220of the first variant, the third sub-switch228is connected between the second output resistance314and the reference potential generating unit30. The third sub-switch228enters a disconnected state if the main switch210is caused to enter a connected state, and enters a connected state if the main switch210is caused to enter a disconnected state. That is, according to a control signal, the third sub-switch228switches whether or not to electrically connect the other end of the second output resistance314and the reference potential generating unit30. Here, the first reference potential VOFFis potential to cause a diode formed between the source terminal and bulk terminal of the main switch210to enter an OFF-state.

Also, in the voltage output unit220of the first variant, the second sub-switch226enters a connected state if the main switch210is caused to enter a connected state, and enters a disconnected state if the main switch210is caused to enter a disconnected state. That is, because in the voltage output unit220of the first variant, for example, if the main switch210is caused to enter a connected state, the second sub-switch226enters a connected state, and the third sub-switch228enters a disconnected state, voltage obtained after voltage-division by the voltage divider222is output through the intermediate terminal38.

Here, if the first voltage-division resistance252and the second voltage-division resistance254have approximately the same resistance values, similar to (Equation 1), the voltage VMoutput through the intermediate terminal38equals an average voltage of voltage of the first terminal22and voltage of the second terminal24as shown in the following equation.

Also, because in the voltage output unit220of the first variant, if the main switch210is caused to enter a disconnected state, the second sub-switch226enters a disconnected state, and the third sub-switch228enters a connected state, voltage obtained after voltage-division of the voltage V1of the first terminal22and the first reference potential VOFFat each resistance is output. Based on the relationships, R1=R2, R3=R4, R1<<R3and R2<<R4, among the resistance value R1of the first voltage-division resistance252, the resistance value R2of the second voltage-division resistance254, the resistance value R3of the first output resistance312and the resistance value R4of the second output resistance314, the voltage VMoutput through the intermediate terminal38is expressed as shown in the following equation.

If the above-mentioned voltage output unit220of the first variant is used, the gate voltage VGof the main switch210is calculated as shown in the following equation by assigning (Equation 9) and (Equation 10) to (Equation 2). The voltage waveform at each unit of the main switch210to which such a gate voltage VGis supplied is explained next.
VG=(V1+V2)/2+Va(connected state)
VG=(V1+VOFF)/2(disconnected state)  (Equation 11)

FIG. 10shows a first example of a voltage waveform at each unit of the main switch210according to the present embodiment. The horizontal axis ofFIG. 10indicates time, and the vertical axis indicates voltage.FIG. 10shows one example of a voltage waveform observed if a control signal to cause the main switch210to enter a disconnected state is supplied. Accordingly, the gate voltage VGof the main switch210and the voltage VBof the bulk terminal become voltage approximately equal to the voltage VMfrom the intermediate terminal38.

Also, because the sinusoidal signal V1is supplied to the source terminal of the main switch210, the source-gate voltage VSGis expressed as shown in the following equation.
VSG=VSB=V1−VM=(V1−VOFF)·R3/(R3+R4)  (Equation 12)

Here, the source-bulk voltage is VSB. As one example, if the voltage-division ratio between the first output resistance312and the second output resistance314is 1:1, and the first reference voltage value \TOFFis −3V, the source-gate voltage VSGis a sinusoidal signal having amplitude of 1.5V that oscillates between 0V and +3V.FIG. 10shows such a source-gate voltage VSGwith an alternate long and short dash line.FIG. 10shows an electrical signal V1input through the first terminal22with a solid line.

Also, if voltage input through the drain terminal of the main switch210is V2, the source-drain voltage VSDis expressed as shown in the following equation.
VSD=V1−V2(Equation 13)

As one example, if the voltage V2input through the source terminal is 0V, the source-drain voltage VSDbecomes V1. That is, the source-gate voltage VSGbecomes a sinusoidal signal having amplitude of 3V that oscillates between −3V and +3V. Such a source-gate voltage VSGapproximately matches the solid line waveform ofFIG. 10.

Also, the gate-drain voltage VGDof the main switch210is expressed as shown in the following equation. Here, the bulk-drain voltage is VBD.

As one example, the gate-drain voltage VGDbecomes a sinusoidal signal having amplitude of 1.5V that oscillates between −3V and 0V. Such a gate-drain voltage VGDis indicated with a dotted line ofFIG. 10. As mentioned above, because according to a control signal to cause the main switch210to enter a disconnected state, the switch apparatus200makes the gate-drain voltage VGDof the main switch2100V or lower, it can cause the main switch210to enter a disconnected state. Also, it can be known that as shown inFIG. 10, the absolute values of the inter-terminal voltage VSG, VSB, VSD, VSBand VGDof the main switch210all become small signals of approximately 5V or lower.

As mentioned above, in the disconnected state of the main switch210, the switch apparatus200according to the present embodiment sets the first reference potential to a lower limit value or lower of a voltage range of an electrical signal input through the first terminal22. Then, the switch apparatus200sets the voltage-division ratio between the first output resistance312and the second output resistance314to a ratio such that the gate voltage of the main switch210does not exceed voltage of the second terminal24in a disconnected state even if voltage becomes an upper limit voltage of an electrical signal input through the first terminal22.

Also, the switch apparatus200sets the voltage-division ratio between the first output resistance312and the second output resistance314such that in a disconnected state of the main switch210, the voltage range of voltage output through the intermediate terminal38between the first output resistance312and the second output resistance314stays within a predetermined voltage range (as one example, a small signal voltage range of 5V or lower). Thereby, the switch apparatus200can make the inter-terminal voltage of the main switch210stay within a predetermined voltage range while at the same time making the gate-drain voltage VGDof the main switch2100V or lower.

FIG. 11shows a second example of a voltage waveform at each unit of the main switch210according to the present embodiment. The horizontal axis ofFIG. 11indicates time, and the vertical axis indicates voltage.FIG. 11shows one example of a voltage waveform observed if a control signal to cause the main switch210to enter a connected state is supplied. Accordingly, the gate voltage VGof the main switch210becomes V1+Va, and the voltage VBof the bulk terminal becomes V1. InFIG. 11, an example of the gate voltage VGof the main switch210is indicated with a dotted line.FIG. 11shows an example in which the offset voltage Vais set to approximately 1V.

Also, because voltage input through the source terminal of the main switch210is V1, the gate-source voltage VGSof the main switch210becomes Va, and the main switch210enters a connected state. Thereby, the first terminal22and the second terminal24are electrically connected, and if the ON-resistance of the main switch210is sufficiently small, the voltage V2of the second terminal24becomes approximately the same as the voltage V1of the first terminal22. That is, the voltage V1of the first terminal22, the voltage V2of the second terminal24and the voltage VBof the bulk terminal become approximately the same voltage signals as indicated with a solid line ofFIG. 11.

Because, as mentioned above, signal voltage input through the source terminal, drain terminal and bulk terminal of the main switch210becomes approximately equal to V1, the inter-terminal voltage VSB, VDBand VDSof the main switch210become approximately 0V. Also, −VSGbecomes approximately equal to the offset voltage Va. That is, it can be known that the absolute values of the inter-terminal voltage VSG, VSB, VSD, VDBand VGAof the main switch210all become small signals of approximately 5V or lower. Accordingly, the switch apparatus200according to the present embodiment can make the absolute values of the inter-terminal voltage of the main switch210equal to or lower than a predetermined value even if the main switch210is caused to enter a connected state and a disconnected state.

For example, withstanding voltage of the main switch210can be set smaller than the difference between the upper limit value and lower limit value of the voltage range of an electrical signal input through the first terminal22. As one example, if a sinusoidal signal having amplitude of 3V with its reference voltage at 0V is input through the first terminal22, withstanding voltage of the main switch210can set lower than the difference (6V) between the upper limit value (+3V) and lower limit value (−3V) of the sinusoidal signal. That is, the switch apparatus200according to the present embodiment can use the main switch110for small signals if an electrical signal to be input is a small signal which is of as small as 5V or lower. This allows cost reduction, and also size-reduction of the switch apparatus200.

Although the above-mentioned voltage output unit220of the first variant explained is exemplarily one in which an electrical signal is input through the first terminal22, the voltage output unit220is not limited thereto. The voltage output unit220may receive an input of an electrical signal from the second terminal24. In this case, the voltage output unit220has the first sub-switch224on the first terminal22side in place of the second sub-switch226on the second terminal24side. Thereby, the voltage output unit220can output voltage corresponding to voltage of the second terminal24and the first reference potential VOFFif the main switch210is caused to enter a disconnected state, and can operate the switch apparatus200in a similar manner to the explanation above.

As mentioned above, the voltage output unit220of the first variant is preferably used if it is known in advance through which one of the first terminal22and the second terminal24an electrical signal is input. That is, the voltage output unit220of the first variant only has to be provided with a sub-switch on a terminal which is among the first terminal22and the second terminal24and is opposite to a side where an electrical signal is input, and a sub-switch on the side where the electrical signal is input may be omitted or always in a connected state.

In contrast to this, if an electrical signal is input through both the first terminal22and the second terminal24, or if it is unknown in advance which of them receives an input, the voltage output unit220may be provided with both the first sub-switch224and the second sub-switch226. Such a voltage output unit220is shown next.

FIG. 12shows a second variant of the voltage output unit220according to the present embodiment. In the voltage output unit220of the second variant, units that perform operations that are approximately the same as those of the voltage output unit220according to the first variant shown inFIG. 9are given the same reference symbols, and explanation about them is omitted. The voltage output unit220of the second variant has the first sub-switch224and the second sub-switch226.

The first sub-switch224is provided on the first terminal22side relative to the intermediate point between the first voltage-division resistance252and the second voltage-division resistance254. The first sub-switch224may be provided between the first terminal22side and the first voltage-division resistance252, and instead of this may be provided between the first voltage-division resistance252and the intermediate point.

The second sub-switch226is provided on the second terminal24side relative to the intermediate point between the first voltage-division resistance252and the second voltage-division resistance254. The second sub-switch226may be provided between the second terminal24side and the second voltage-division resistance254, and instead of this may be provided between the second voltage-division resistance254and the intermediate point.

The first sub-switch224and the second sub-switch226enter a connected state, respectively, if the main switch210is caused to enter a connected state. Also, the third sub-switch228enters a disconnected state. Thereby, the voltage output unit220of the second variant can output an average voltage of the voltage V1of the first terminal22and the voltage V2of the second terminal24.

If the main switch210is caused to enter a disconnected state, when an electrical signal is input through the first terminal22, the first sub-switch224enters a connected state, and the second sub-switch226enters a disconnected state. In this case, the voltage output unit220of the second variant has a circuit configuration similar to that of the voltage output unit220of the first variant explained with reference toFIG. 9, and as explained with reference toFIG. 10, can output, from the intermediate terminal38, the voltage VMto cause the main switch210to enter a disconnected state.

Also, if the main switch210is caused to enter a disconnected state, when an electrical signal is input through the second terminal24, the first sub-switch224enters a disconnected state, and the second sub-switch226enters a connected state. In this case, in the voltage output unit220of the second variant, as explained with reference to an example in which an electrical signal is input through the first terminal22, the voltage output unit220can output voltage corresponding to voltage of the second terminal24and the first reference potential VOFF, and can output, from the intermediate terminal38, the voltage VMto cause the main switch210to enter a disconnected state.

As mentioned above, the voltage output unit220of the second variant can cause the main switch210to enter a disconnected state by causing a sub-switch which is among the first terminal22and the second terminal24and is opposite to a terminal through which an electrical signal is input to enter a disconnected state. Thereby, even if a terminal through which an electrical signal is input is switched, the voltage output unit220can control the state of the main switch210by selecting a sub-switch to be caused to enter a disconnected state according to an electrical signal to be input.