APPARATUS AND METHOD FOR SELECTIVELY FORMING A SHIELDING LAYER ON A SEMICONDUCTOR PACKAGE

An apparatus for selectively forming a shielding layer on a semiconductor package is provided. The apparatus includes: a tray including a plurality of package seats, the tray defines, for each of the plurality of package seats, one or more sets of guide holes outside the package seat; deposition masks, each of the deposition masks includes: a set of pins releasably inserted within one set of the one or more sets of guide holes to place the deposition mask on the tray; and a cover attached to the set of pins, the cover is configured to cover at least a portion of an outer surface of a semiconductor package received within a package seat when the set of pins is inserted within the set of guide holes associated with the package seat; and a deposition source configured to deposit a shielding material.

TECHNICAL FIELD

The present application generally relates to semiconductor packaging technology, and more particularly, to an apparatus for selectively forming a shielding layer on a semiconductor package, and a method for performing the same.

BACKGROUND OF THE INVENTION

The semiconductor industry is constantly faced with complex integration challenges as consumers want their electronic products to be lighter, smaller and have higher performance with more and more functionalities. For sensitive electronic components in an electronic product, interference shielding needs to be performed to prevent disruption by electromagnetic field, electrostatic field, etc. Typically, a semiconductor package may be provided with a metal cover or a uniformly spread coating around its outer periphery as a shielding layer. In nearer cases where more electronic components are integrated in a single package, different components might need to be shielded differently. For example, a Magnetic Random Access Memory (MRAM) device may require local magnetic shielding since global shielding is neither cost-effective nor advantageous for heat dissipation. For another example, shielding may not be desired for antennas which need to transmit to and/or receive from the exterior space electromagnetic signals.

Therefore, a need exists for selectively forming a shielding layer on a semiconductor package.

SUMMARY OF THE INVENTION

An objective of the present application is to provide an apparatus for selectively forming a shielding layer on a semiconductor package.

According to an aspect of embodiments of the present application, an apparatus for selectively forming a shielding layer on a semiconductor package is provided. The apparatus may include: a tray including a plurality of package seats each being configured to receive a semiconductor package, wherein the tray defines, for each of the plurality of package seats, one or more sets of guide holes outside the package seat; deposition masks, wherein each of the deposition masks includes: a set of pins releasably inserted within one set of the one or more sets of guide holes to place the deposition mask on the tray; and a cover attached to the set of pins, wherein the cover is configured to cover at least a portion of an outer surface of a semiconductor package received within a package seat when the set of pins is inserted within the set of guide holes associated with the package seat; and a deposition source configured to deposit a shielding material onto the tray to form a shielding layer on each of the semiconductor packages when they are received in the plurality of package seats.

According to another aspect of embodiments of the present application, a method for selectively forming a shielding layer on a semiconductor package is provided. The method may include: providing a tray including a plurality of package seats, wherein the tray defines, for each of the plurality of package seats, one or more sets of guide holes outside the package seat; providing deposition masks, wherein each of the deposition masks includes a set of pins releasably inserted within one set of the one or more sets of guide holes to place the deposition mask on the tray; and a cover attached to the set of pins; placing a plurality of semiconductor packages within the respective package seats of the tray; placing the deposition masks on the tray by inserting the set of pins of each deposition mask within one set of the one or more sets of guide holes of a package seat so as to cover at least a portion of an outer surface of a semiconductor package received within the package seat; and depositing, via a deposition source, a shielding material onto the tray to form a shielding layer on each of the plurality of semiconductor packages.

The same reference numbers will be used throughout the drawings to refer to the same or like parts.

DETAILED DESCRIPTION OF THE INVENTION

The following detailed description of exemplary embodiments of the application refers to the accompanying drawings that form a part of the description. The drawings illustrate specific exemplary embodiments in which the application may be practiced. The detailed description, including the drawings, describes these embodiments in sufficient detail to enable those skilled in the art to practice the application. Those skilled in the art may further utilize other embodiments of the application, and make logical, mechanical, and other changes without departing from the spirit or scope of the application. Readers of the following detailed description should, therefore, not interpret the description in a limiting sense, and only the appended claims define the scope of the embodiment of the application.

In this application, the use of the singular includes the plural unless specifically stated otherwise. In this application, the use of “or” means “and/or” unless stated otherwise. Furthermore, the use of the term “including” as well as other forms such as “includes” and “included” is not limiting. In addition, terms such as “element” or “component” encompass both elements and components including one unit, and elements and components that include more than one subunit, unless specifically stated otherwise. Additionally, the section headings used herein are for organizational purposes only, and are not to be construed as limiting the subject matter described.

FIG.1illustrates a cross-sectional view of an apparatus100for selectively forming a shielding layer on a semiconductor package according to an embodiment of the present application. In some embodiments, the apparatus100can be a physical vapor deposition apparatus such as a sputtering apparatus, which may include a deposition chamber that receives various components of the apparatus. For example, a target (i.e., a deposition source) can be disposed within the deposition chamber, which, upon ion or atom bombardment during a deposition process, ejects sputtered atoms onto a substrate within the deposition chamber to form a thin film on the substrate. A conductive casing or housing can be formed on a semiconductor package by the deposition apparatus100to function as shielding for reducing electromagnetic interferences to semiconductor devices within the semiconductor package. Furthermore, a selective shielding layer can be formed which does not cover an entirety of a top surface and lateral surfaces of the semiconductor package, as elaborated below with more details.

As shown inFIG.1, the apparatus100includes a tray110. The tray110works as the substrate for receiving semiconductor devices or packages where a thin film is desired to be formed. In some embodiments, the packages can be semiconductor packages singulated from a wafer-level package, all of which have the same or similar physical structure and may need forming the same thin film thereon. Accordingly, the tray110may have one or more package seats having the same structure as a package seat120shown inFIG.1. In some embodiments, the tray110may be a flat plate, or a curved plate facing towards the target.

Each package seat120may receive a semiconductor package130. The package seat120may take the form of a cavity with a cross section shaped as a rectangle, but aspects of the present application are not limited thereto. For example, the package seat120may be of a non-regular shape that is suitable to receive a semiconductor package. In some alternative examples, the package seat may be a flat support surface instead of a cavity. A set of guide hole(s)140can be formed outside the package seat120on the tray110. In some embodiments, the guide holes140may be through holes. In some other embodiments, the guide holes140may not pass through the tray110.

In order to selectively form a shielding layer for the semiconductor package130received within the package seat120, a deposition mask150can be attached close to the package seat120. In particular, the deposition mask150includes a set of pin(s)151and a cover152. The set of pins151may be releasably inserted within the set of guide holes140to place the deposition mask150on the tray110. In particular, as shown in the apparatus100, the deposition mask150is attached to the tray110after the semiconductor package130is placed within the package seat120, but the order of placing the deposition mask150and placing the semiconductor package130is not limited thereto, as elaborated in some other embodiments. The cover152is attached to the set of pins151, and the cover152may cover at least a portion132of an outer surface131of the semiconductor package130when the semiconductor package130is received within the package seat120. Specifically, as shown in the apparatus100, the cover152of the deposition mask150may include a top portion153, which may cover at least a portion of a top surface of the semiconductor package130. The cover152may further include a bottom portion154which extends between the top portion153and the pin151. The bottom portion154may cover at least a portion of a lateral surface of the semiconductor package130. The height of the bottom portion154may be equal to a thickness of the semiconductor package130. Aspects of the present application are not limited thereto. Preferably, the inner surface of the deposition mask150may entirely cling to the outer surface131of the semiconductor package130without space in between, thereby the inner surface of the deposition mask150clings to the covered portion132of the outer surface131of the semiconductor package130by the deposition mask150. In the apparatus100, the cover152clings to a portion of an upper surface and a lateral surface of the semiconductor package130, but the shape and position of the covered portion132of the outer surface131of the semiconductor package130may not be limited thereto, as elaborated below with reference to some other embodiments of the present application.

As aforementioned, to protect a semiconductor package from interference such as thermal shock, chemical attack, physical attack, and fluid penetration, shielding material(s) such as metals, conducting plastics and conducting polymers may be deposited onto the semiconductor package130. Multiple electronic components may be integrated in a semiconductor package, and different electronic components may require different shielding configurations. As a shielding material is being deposited onto the tray110to form a shielding layer160on the semiconductor package130, an exposed portion133of the outer surface131of the semiconductor package130is formed with a shielding layer while the portion132covered by the deposition mask150remains not formed with a shielding layer when the deposition mask150is removed off the tray110.

FIGS.2A to2Care cross-sectional views of an apparatus200for selectively forming a shielding layer on a semiconductor package with multiple alternative deposition mask covering configurations according to some embodiments of the present application.

As shown inFIGS.2A to2C, several configurations for covering respective semiconductor packages which are different from the configuration shown inFIG.1are shown. Deposition masks250a,250band250cmay cover portions232a,232band232cof the respective semiconductor packages in different positions and with different shapes. In this way, uncovered portions233a,233band233cof outer surfaces of the respective semiconductor packages may be formed with a shielding layer. As shown inFIG.2A, the deposition mask250amay partially cover only a lateral surface232aof an outer surface231aof a semiconductor package230a, and a top surface of the semiconductor package230amay remain not covered and thus be formed with a shielding layer. In the embodiment shown inFIG.2A, the semiconductor package230amay be inserted into a package seat220afrom above, regardless of the attachment of the deposition mask250ato a tray210a. Therefore, the deposition mask250amay be attached to the tray210abefore, after or at the same time that the semiconductor package230ais inserted into the package seat220a. InFIG.2B, the deposition mask250bmay include one or more holes, thereby exposing multiple portions233bof an outer surface231bof a semiconductor package. The exposed portion233bmay include multiple portions of the outer surface231bthat are not connected to each other.FIG.2Cillustrates an embodiment where the deposition mask250cmay not entirely cling to an outer surface231cof a semiconductor package, thereby leaving space between the inner surface of the deposition mask250cand the covered portion232cof the outer surface231c. In that case, the surface232cwhich is covered by the deposition mask250cbut not in contact with its cover may not be formed with the shielding layer, or may be formed with a thinner shielding layer, depending on the type of the deposition process (e.g., anisotropic deposition or isotropic deposition).

FIG.2Dillustrates a cross-sectional view of an apparatus for selectively forming a shielding layer on a semiconductor package with a half-open package seat configuration according to another embodiment of the present application.

In the embodiment shown inFIG.2D, a package seat220dmay be semi-open to allow insertion of a semiconductor package230dinto the package seat220d, even if a deposition mask250dis already attached to a tray210dby inserting a set of pin(s)251dinto guide holes240d. In an embodiment, a fastener may further hold the semiconductor package230din place after it is horizontally inserted into the package seat220d, for example, by blocking the opening (to the right of the package seat shown inFIG.2D) of the semi-open package seat220d. As such, in the case illustrated inFIG.2D, the deposition mask250dmay be attached to the tray210dbefore, after or at the same time that the semiconductor package230dis received by the package seat220d. It can be appreciated that the specific order of attaching the semiconductor package and the deposition mask onto the tray can be adjusted based on the configurations of the deposition mask and the package seat.

FIG.2Eillustrates a cross-sectional view of an apparatus with a fastener for selectively forming a shielding layer on a semiconductor package according to another embodiment of the present application.

As shown inFIG.2E, a deposition mask250emay be secured to a tray210eby a fastener270e. The fastener270eis mechanically coupled with one of a set of pin(s)251eof the deposition mask250esuch that the fastener270ecan apply a force on the deposition mask250eagainst the movement of the deposition mask250eafter the pins251eof the deposition mask250eare inserted into respective guide holes240e. In some embodiments, the fastener270emay be a nut or ring which has a width larger than a diameter of the guide hole240e. The fastener270emay mate with a bolt structure at a bottom of the pin251ethat extends through the tray210eout of the guide hole240e. In can be appreciated that the fastener270emay be omitted in some embodiments.

FIG.3illustrates a plan view of a tray having a plurality of semiconductor package seats with sets of guide holes outside the seats according to an embodiment of the present application. The tray can be any of the trays shown inFIG.1andFIGS.2A to2E.

Referring toFIG.3, a tray310may include a plurality of package seats320, and each package seat320may receive a semiconductor package. The material of the tray310may be conductive, anti-static, strong, and heat tolerant for safe handling, transport, and storage of semiconductor packages. Tray material may be modified polyphenylene oxide (MPPO), polyphenylene ether (PPE), polysulfone (PSU), modified polysulfone (MPSU), polyethersulfone (PES), etc. The tray310may be made of metal to improve the thermal conductivity of the apparatus. One or more sets of guide holes340may be configured outside each package seat320. In the illustration, for each package seat320, the guide holes340may be disposed around a corner of the package seat320, but aspects of the present application are not limited thereto. The position, number and shape of the one or more sets of guide holes340may be differently configured. For example, as shown inFIG.3, a set of two guide holes are formed at an upper left corner of the package seat320, and another set of three guide holes are formed at a lower right corner of the package seat320. It is preferred to include two or more guide holes in a set of guide holes to prevent any lateral movement of a deposition mask relative to a package seat.

FIGS.4A to4Dare perspective views of deposition masks with pins of different forms according to some embodiments of the present application.

Referring toFIGS.4A to4D, a set of pin(s) of a deposition mask may take different forms. For example, as shown inFIG.4A, each of pins451of a deposition mask450may have a cross section shaped as a square. As shown inFIG.4B to4D, each pin of a deposition mask may also have a cross section shaped as a triangle, a circle, an oval, a rectangle. As such, a non-circular shaped pin can prevent a lateral movement of a deposition mask relative to a package seat, if only one pin is included in a guide pin set. It can be appreciated that a deposition mask may have pins of different forms.

FIGS.4E and4Fare plan views of two forms of deposition masks that are connected with each other by exemplary connection frames according to some embodiments of the present application. The deposition masks along with the connection frames can be placed on a tray. For example, the deposition masks can be any of the deposition masks shown inFIG.4A to4D, and the tray can be any of the trays shown inFIG.1andFIGS.2A to2E.

Referring toFIG.4E, a connection frame481emay connect three deposition masks with each other. For example, as shown inFIG.4E, the connection frame481emay be connected at an end to a right corner of a cover of a left deposition mask, and be connected at another end to a left lateral edge of a cover of an adjacent right deposition mask in a row. The connection frame481edoes not overlay with the semiconductor packages on a tray410e. In this way, the connection frame481eand the connected deposition masks form a deposition mask assembly480eplaced on a row of package seats on the tray410e. Aspects of the present disclosure are not limited thereto. It can be appreciated that the connection frame can be connected to other positions or parts of a deposition mask, so long as the connection formed with the connection frame does not interfere with the desired shielding pattern. It can also be appreciated that the connection frame may connect deposition masks corresponding to a row, a column, a section or all of the package seats of a tray.

Further referring toFIG.4E, two rows of semiconductor packages placed on the tray410emay require different shielding configurations. For example, the semiconductor packages received within the first row of the package seats may require a shielding pattern that excludes an upper left triangle portion, while the semiconductor packages in the second row may require a shielding pattern that excludes a lower right triangle portion, and semiconductor packages placed in the third row may require an entire shielding layer. As such, the connection frame481emay be connected to the deposition masks forming the same shielding pattern, i.e., in the same row. It can be appreciated that the connection frame may also be connected to deposition masks with different shielding patterns. In another embodiment, all semiconductor packages received within the package seats of a tray may require different shielding patterns and thereby require different deposition masks. The different deposition masks may also be connected with a connection frame for disposing the connected deposition masks on the tray at the same time. The connected deposition masks may correspond to a row, a column, a section of the package seats or even all the package seats.

Referring toFIG.4F, all the deposition masks placed on a tray410are connected together via a single connection frame, forming a gridded deposition mask assembly480f. In some embodiments, the connection frame may be integrally formed with the deposition masks. In some other embodiments, the connection frame can be a component formed separately from the deposition masks, and can be assembled with the depositions masks before a shielding deposition process. In this way, all the deposition masks of the deposition mask assembly480fmay be placed on and/or unload from the tray410fat the same time.

FIG.5illustrates a plan view of a semiconductor package seat and several sets of guide holes in its vicinity with different shapes according to an embodiment of the present application.

Referring toFIG.5, outside a semiconductor package seat520, one or more sets of guide holes540of different forms and different positions may be configured. As illustrated, the cross section of the guide holes540may take various shapes such as a triangle, a circle, an oval, a rectangle and a square. Aspects of the present application are not limited thereto. The position of the guide holes may be configured according to specific situations in industrial production.

FIG.6illustrates a flowchart of a method600for selectively forming a shielding layer on a semiconductor package according to an embodiment of the present application.

As shown inFIG.6, the method600starts with blocks610and620, wherein a tray and a plurality of deposition masks are provided. As shown in block630and640, semiconductor packages and deposition masks may be placed on a tray. In this illustration, the deposition masks may be provided antecedently as in block620, then may follow the placement of a plurality of semiconductor packages as shown in block630, and the deposition masks may be placed subsequently as shown in block640, but aspects of the present application are not limited thereto. For example, the deposition masks could be placed on the tray beforehand, and the semiconductor packages may be placed on the tray afterwards in the case that the space formed by the deposition masks and the tray allows a positioning of the semiconductor packages, which could refer to the embodiments shown inFIG.2A and2D, for example. In another embodiment, the placement of the plurality of semiconductor packages may be antecedent, then the deposition masks may be provided, the deposition masks may be placed subsequently. The present disclosure is not limited to the order of the method illustrated in the diagram. Afterwards, as shown in block650, a deposition source deposits a shielding material onto the tray to form a shielding layer on the plurality of semiconductor packages and the depositions masks. Each deposition mask covers partially the respective semiconductor package to prevent the forming of the shielding layer on the covered surfaces of the semiconductor package. After the deposition in block650, the deposition masks can be removed from the tray.

FIGS.7A to7Dare cross-sectional views illustrating various steps of the method for selectively forming a shielding layer on a semiconductor package illustrated inFIG.6according to an embodiment of the present application.

As shown inFIG.7A, a semiconductor package730is firstly placed in a package seat720configured on a tray710. As shown inFIG.7B, a deposition mask750, which has a cover752and a set of pin(s)751, is disposed on the tray710by inserting the releasable pin751into a guide hole740on the tray710. The pin751may take various forms such as a pillar with a cross section of a rectangle, a square, a circle, an oval, a triangle, etc. The form of the pin751may be configured as stated in the illustration ofFIGS.4A to4D, for example. The deposition mask750may also be one deposition mask connected via a connection frame to another deposition mask as stated in the illustration ofFIGS.4E and4F. The guide hole740is a through hole but it may take various other forms such as a cavity. The deposition mask750may further include a fastener attachable to the pin751to secure the connection between the deposition mask750and the tray710.

Further referring toFIG.7B, the deposition mask750may cling to one or more faces of the semiconductor package730. The cover752of the deposition mask750may form a cavity having an inner surface, and the inner surface may conform to at least a portion732of an outer surface731of the semiconductor package730. At the same time, at least a portion733of the outer surface731remains exposed to an external environment. The deposition mask750may take various forms, and there may or may not be space between the deposition mask750and the semiconductor package730.

Further referring toFIG.7C, a shielding layer760is formed by depositing shielding material onto the tray710from a deposition source. The covered portion732of the surface731of the semiconductor package730remains not shielded, while the exposed portion733of the surface731of the semiconductor package730is then shielded by the shielding layer760.

Further referring toFIG.7D, after the removal of the deposition mask shown inFIG.7C, the covered portion732of the surface731of the semiconductor package730is exposed to the external environment with no shielding layer thereon, while the exposed portion733of the surface731is shielded. In this way, the method may form a selective shielding layer761on the partial surface733of the semiconductor package730. Since deposition masks are releasably attached to a tray, after unloading the deposition masks and the respective semiconductor packages from the tray, the tray and the deposition masks may be reused, which is more cost-effective compared to traditional shielding process that requires one-time subsidiary material such as polyimide tape and metal frame. Therefore, the method according to the embodiment of the present application defines a selectively forming shielding solution with flexibility and cost efficiency.

In some embodiments, it may be desired to form irregular shaped shielding layer on a semiconductor package, and accordingly the cover of a deposition mask can be constructed to have a similar shape to the desired shape.FIGS.8A to8Care plan views illustrating steps of selectively forming a shielding layer with a curved shape on a semiconductor package according to an embodiment of the present application.

Referring toFIG.8A, a package seat820having three sets of guide holes840may be provided on a tray (not shown). A semiconductor package830may be placed within the package seat820. As shown inFIG.8B, three deposition masks having three respective covers852may be placed over the package seat820to shield three corners of a surface of the semiconductor package830. It can be seen that it is flexible to form a shielding layer of more complex patterns such as a curved pattern shown inFIG.8B. Aspects of the present application are not limited thereto. The deposition mask may also be designed to cover a portion of a top surface and/or a portion of a lateral surface of the semiconductor package830. Afterwards, as shown inFIG.8C, after removal of the deposition masks, three non-shielded regions832and a central shielding layer833are formed at least on a top surface of the semiconductor package830.

The discussion herein included numerous illustrative figures that showed various apparatus for selectively forming a shielding layer on a semiconductor package and method of performing thereof. For illustrative clarity, such figures did not show all aspects of each example assembly. Any of the example assemblies and/or methods provided herein may share any or all characteristics with any or all other assemblies and/or methods provided herein.

Various embodiments have been described herein with reference to the accompanying drawings. It will, however, be evident that various modifications and changes may be made thereto, and additional embodiments may be implemented, without departing from the broader scope of the invention as set forth in the claims that follow. Further, other embodiments will be apparent to those skilled in the art from consideration of the specification and practice of one or more embodiments of the invention disclosed herein. It is intended, therefore, that this application and the examples herein be considered as exemplary only, with a true scope and spirit of the invention being indicated by the following listing of exemplary claims.