Interface configuration by a memory tag

A memory tag is powered by and addressable via a radio frequency wireless link to read data from a memory. The memory tag is addressable by a reader. The memory holds data and interface configuration information relating to the operation of an interface device. This interface configuration information including at least one status item and an item type associated with the, or each, status item.

FIELD OF THE INVENTION

This invention relates to a memory tag which holds interface configuration information, a reader to read the memory tag, method of writing to the memory tag and a method of reading memory tag.

BACKGROUND OF THE INVENTION

Memory tags in the form of Radio Frequency Identification (RFID) tags are well known in the prior art. RFID tags come in many forms but all comprise an integrated circuit on which in use data can be stored and a coil which enables it to be interrogated by a reader which also powers it by means of an inductive (wireless) link. Generally RFID tags are quite large, due to the frequency they operate at (13.56 MHz) and the size of antenna they thus require, and operate over large ranges and have very small storage capacities. Smaller RFID tags have also been developed, operating at various frequencies, but still having small storage capacities. Some RFID tags include Read Only Memory (ROM) and are written to at the time of manufacture, whilst others have read and write capability. RFID tags have tended to be used in quite simple applications, such as for file tracking within offices or in place of or in addition to bar codes for product identification and supply chain management. The storage of more than simple identification data provides challenges for user interaction with the memory tag.

SUMMARY OF THE INVENTION

According to a first aspect of the invention we provide a memory tag having a memory and powered by and addressable via a radio frequency wireless link to read data from the memory, the memory tag being addressable by a reader, wherein the memory holds data and interface configuration information relating to the operation of an interface device, the interface configuration information comprising at least one status item and an item type associated with the or each status item.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

FIG. 1illustrates an document comprising a substrate, in this case a sheet of paper10, bearing printing12, which has been annotated with electronic data using a plurality of memory tags14. The memory tags14have been secured to the sheet of paper10at various locations over its surface, although they may alternatively be embedded in the paper sheet10, preferably in locations identified by the printing12, in order to assist in locating them for the purposes of reading data from or writing data to the memory tags14.

In this description, the term ‘memory tag’ is intended to refer to any transponder device which has a memory and is powered by and addressable via a radio frequency wireless link to read data from the memory. The term ‘memory tag’ thus includes, but is not limited to, RFID tags having a read only memory and transponder devices having a larger memory which may be read from and written to.

A hand held read/write device16is used to communicate with the memory tags14in wireless manner, as will be discussed further below. The read/write device16is also connected to a host computer, display, data rendering device or other apparatus17from which the data for writing to the memory tags14is received, and/or the data read from the memory tags14is passed. User interface devices are shown at18on the memory tag14and at19on the host apparatus17.

The term ‘user interface device’ is intended to cover any appropriate apparatus or device by which feedback or information on the operation of the read/write device16and/or the memory tag14may be supplied to a user. Such an apparatus or device may provide information through sound, status lights, generating information on a screen, through vibration or otherwise. If appropriate, the user interface device may be operable to request instructions or other input from the user. Examples of such user interface devices are discussed below.

Referring now toFIG. 2, a schematic of a memory tag14is shown. The memory tag14is provided on a chip, and comprises an transponder circuit20, a memory22, a power supply capacitor24and an antenna coil26having only a few turns e.g. five, or as in this case a single turn. The transponder circuit20operates at 2.45 GHz, is of an area of approximately 0.5 mm2, and will be described further below. The memory22provides 1 Mbit of capacity of non-volatile memory and is of an area of approximately 1 mm2, and uses FRAM (ferroelectric random access memory) or MRAM (magnetoresistive random access memory) or similar memory technology requiring low power. The memory tags14are of a substantially square shape in plan view with an external dimension D for their sides of around 1 mm.

Referring now toFIG. 3, the circuitry of a memory tag14and circuitry28of the read/write device16are illustrated schematically, using conventional component identifications (C-capacitor, L-inductance, R-resistor, D-diode and S-switch). The transponder circuit20of the memory tag14comprises a capacitor C2which, in combination with the antenna coil L2(26), forms a resonant circuit with component values being chosen to tune the combination to approximately 2.45 GHz for inductive coupling with the read/write device16. The portion of transponder circuit20responsible for power supply is diode D1and capacitor C4(24), with diode D1rectifying the alternating current generated by the inductive coupling and the capacitor C4acts as a power supply storage. The portion of the transponder circuit20responsible for receiving transmitted data from the read/write device16is diode D2, capacitor C5and resistor R1which form a simple envelope detector; the data thus received is stored in memory22. The portion of the transponder circuit20responsible for the reading of data from the memory22is the tuned circuit L2/C2in combination with S1and C3, switching C3in and out of the circuit using S1changes the resonance of tuned circuit L2/C2resulting in phase modulation of the reflected power from the memory tag14to the read/write device16.

The circuit28of the read/write device16comprises a signal generator30which generates a signal at the chosen frequency of 2.45 GHz. This signal passes via an amplitude modulator32, where it is amplitude modulated with data to be written to the memory tag14, and a splitter34, to an antenna L1and capacitor C1which form a tuned circuit. The component values of L1and C1being chosen to tune it to 2.45 GHz, as for the tuned circuit in the memory tag14, in order to maximise inductive coupling between the two circuits, and thus transmission of power and data to the memory tag14.

The splitter34takes a part (as much as 50% of the power) of the amplitude modulated signal, for use as a reference signal, and passes it to a multiplier36. The signal received from the memory tag14, via the tuned circuit L1/C1and divided from the outgoing signal by a coupler38, is also passed to the multiplier36. Thus the transmitted amplitude modulated signal and received signal are multiplied and then pass through a low pass filter40to provide a signal comprising the phase modulation from the memory tag14and thus indicative of the data read from the memory tag14. This signal is then passed to the host computer or other apparatus17to which the read/write device16is connected, for subsequent data processing. In this example, the read/write device16comprises an output controller42operable to control the user interface device18.

One amplitude modulation format which may be used to apply the data to be transmitted to the 2.45 GHz signal is Amplitude Shift Keying (ASK) which only requires the simple envelope detector D2/C5described in the circuit20. However, other amplitude modulation formats may also be employed. Further alternatives are Frequency Shift Keying (FSK) and Phase Shift Keying (PSK) that provide near constant envelope modulation (i.e. without any significant amplitude modulation): these options have more complex demodulation requirements and thus demand more complex circuitry in the memory tag14.

With the apparatus of memory tag14and read/write device16described above power transfer of around 25% can be achieved with a distance of around 1.8 mm between the antennae L1and L2, of the read/write device16and memory tag14respectively. This is sufficient to transfer enough power to the memory tag14for it to operate.

The memory tags14have an external dimension D of around 1 mm, as described above, and therefore the read/write device16can communicate with them over a relatively short range, in this example of approximately 2D.

To permit a read/write device16or the apparatus17to provide user feedback or user interaction appropriately, the memory tag14stores interface configuration information in its memory22, as shown diagrammatically at50. The memory tag14will also store data in memory22as indicated generally at52. The interface configuration information, in this example, comprises a plurality of status items54corresponding to particular classes of control or status information to be transmitted to the read/write device16. Each status item54has an item type56associated with the status item54classifying the type of status item, for example whether the status item is binary such as a data transfer complete/incomplete status, continuous, for example indicate how much of the data has been transferred, an enumeration or a prompt, requesting a particular response, or any other type as appropriate. Each status item54may also have an associated priority58.

With reference toFIG. 4, the memory spot14and the reader/writer communicate via a interface protocol for transmitting control and status information and data, generally shown at60,62. Thus, both the data52and control and status information can be transmitted over the inductive coupling as discussed above. The read/write device28is provided with one or more user interface devices shown at18,19and is operable, for example using a controller shown at42, to map the user interface devices18,19to the control and status information available from the memory spot14and stored as the interface configuration information. The interface controller42has a user interface mapper, illustrated at64, which is operable to map the status items set out in the user interface configuration information to specific user interface devices in accordance with the priority order and according to type.

It will be apparent that, where the memory spot14is operable to receive instructions from the read/write device16, the read/write device16may only be able to process a subset of status items available from the memory spot14and can transmit a list of accepted status items to the memory spot14indicating those status items which can be processed and the user interface device18,19operated accordingly. The memory spot14may then transmit the data52and those status items included in the accepted status items list. Thus, as illustrated atFIG. 5, at a first step70the memory spot14is bought within range of the read/write device16to provide inductive coupling and is powered up accordingly. At steps72and74, data synchronisation occurs between the memory spot14and the read/write device16to ensure that the memory spot14and read/write device16are able to communicate appropriately. At step76, the memory spot14transmits the interface configuration information to the reader which at step78performs the mapping step and at step80transmits the list of accepted status items to the memory spot14. At step82, the memory spot begins transmitting data and status information, and at step84the read/write device is operable to control the user interface devices in accordance with the received status information.

It will be apparent that the present invention thus permits a memory spot14to be used with a variety of read/write devices16having different user interface devices18,19and may display this information as required. For example, in a very simple example, the user interface device18may comprise an LED which is illuminated when data transfer from the memory tag14is complete. The user interface controller42will then respond to a single status item, indicating that data transfer is complete, and this status item is mapped to a single output device in the form of the LED. Thus, when the read/write device receives status information corresponding to the data transfer complete status item, the LED will be illuminated and the user can then remove the read/write device16from the memory tag14.

It will be apparent however that the user interface devices addressed by the read/write device16and the status information transferred may be very much more complex as desired. For example, the user interface device18,19may comprise an audio output device, a display, a soft key or even a force-feedback controller to indicate a desired status. The status information may for example indicate when the reader has been moved away from the spot, may indicate data transfer progress, for example by generating an extending bar corresponding to the proportion of the data transmitted, as indicated by status information corresponding to the data transfer status item, provide a prompt to a user on an appropriate user interface device, or indicate that a memory spot is not relevant to a task performed by the read/write device16. It may be particularly advantageous that the memory tag14may comprise user interface device configuration information relating to a wide variety of user interface devices, and the read/write device16will only respond to those status items which it is able to map to a corresponding user interface device18,19.

A more sophisticated user interface mapping using several of these features will now be described, for exemplary purposes, with reference toFIG. 6. A memory tag102on a document100is being read by a reader104implementing the method set out inFIG. 5in accordance with the functional interrelationships illustrated inFIG. 4. The reader104is in this example a cellular telephone into which memory tag reader functionality is integrated. The reader thus contains user interface devices appropriate to this functionality: a display110, a loudspeaker112, a vibration alarm114and keys116. The memory tag provides a list of status items with associated types as set out in Table 1 below.

TABLE 1Status Items with associated typesSTATUS ITEMITEM TYPEPURPOSE OF ITEMRead CompleteBinaryAlert that reader canbe moved away from tag.Transfer ProgressContinuousIndicate data transferprogress.Summary typeListChoose summary typefor displayImage listListAllow for display ofindividual images in tag.

As can be determined from these status items, this exemplary memory tag contains a number of images with an accompanying text description. The controller implementing the interface protocol is able to map these status items to the user interface devices of the reader. The “Read Complete” item may be mapped to the most appropriate indicator to give a binary indication to a user—in this case, a brief activation of the vibrating alarm114coupled with a beep on the loudspeaker112. The “Transfer Progress” item is rendered as a status bar at the top of the display110. The “Summary Type” item—a list indicating that there are two summary types that may be selected, image and text—is mapped to two programmable keys116of the reader identified by text at the bottom of the display110. The “Image List” item—a list enumerating each single image available for display—is mapped to the number keys116of the reader. When the image summary key is activated, the display110provides thumbnails of all the images in the memory tag. When the text summary key is activated, the display110provides a text description of the images in the memory tag. When any of the individual number keys of the reader is activated, the corresponding image is displayed on the display110. This approach allows individual memory tags to indicate how display should be provided, obviating any need for a specific memory tag image reader software program to be resident on the reader.

In general, the first read/write device to store contents to the memory spot will know the likely use model for the memory tag14, and in addition to writing data to the memory22of the memory tag14will write the interface configuration information52including at least one status item and an item type associated with the status item and, more probably, a plurality of status items corresponding item types and priorities. It might be envisaged, that subsequent read/write devices, where appropriate, may be able to modify the interface configuration information as appropriate, for example where the stored data is modified.

The memory tags14will preferably have a data rate of 10 Mbitss−1, which is two orders of magnitude faster than is typical in prior art devices. Such a data rate would enable the read/write device16to be held over the memory tag for a very short period of time (“brush and go”) for the data to be read or written as appropriate.

Although the memory tags14described above operate at 2.45 GHz it should be understood that memory tags operating at other frequencies may be used to implement the invention. Factors affecting the choice of operating frequency for the memory tags are: a) government regulations concerning radio frequency transmissions; b) adequate bandwidth (consistent with government regulations); c) frequency high enough to render the physical size of components in the memory tag small enough to keep the area of silicon required low (and hence the cost to manufacture low); d) frequency low enough to provide adequate performance when using low-cost high-volume CMOS technology to manufacture the memory tag.