Direct memory download in a voice data and RF integrated circuit and method for use therewith

A voice data and RF integrated circuit (IC) includes an RF transceiver module that produces received data based on a received RF signal and that produces a transmitted RF signal based on transmit data. A memory module includes a first read only memory (ROM) segment for storing a first plurality of operational instructions, and a first random access memory (RAM) segment for storing a second plurality of operational instructions. A first processing module executes the plurality of operational instructions that include baseband processing to generate input data from the received data, and to produce the transmit data from input data. A first memory interface provides direct downloading of the second plurality of operational instructions from the external memory to the first RAM segment.

BACKGROUND OF THE INVENTION

1. Technical Field of the Invention

This invention relates generally to mobile communication devices and more particularly to memory in a combined voice, data and RF integrated circuit used therein.

2. Description of Related Art

As is known, integrated circuits are used in a wide variety of products including, but certainly not limited to, portable electronic devices, computers, computer networking equipment, home entertainment, automotive controls and features, and home appliances. As is also known, integrated circuits include a plurality of circuits in a very small space to perform one or more fixed or programmable functions.

Memory management can be an important consideration for electronic devices. While memory has become cheaper to produce and easier to implement, more advanced and sophisticated applications can require more memory than ever before. When memory is not used wisely, it can slow the operation of a device, consume more power and/or be more costly to produce.

The advantages of the present invention will be apparent to one skilled in the art when presented with the disclosure herein.

BRIEF SUMMARY OF THE INVENTION

DETAILED DESCRIPTION OF THE INVENTION

FIG. 1is a schematic block diagram of an embodiment of a communication system in accordance with the present invention. In particular a communication system is shown that includes a communication device10that communicates real-time data24and non-real-time data26wirelessly with one or more other devices such as base station18, non-real-time device20, real-time device22, and non-real-time and/or real-time device24. In addition, communication device10can also optionally communicate over a wireline connection with non-real-time device12, real-time device14and non-real-time and/or real-time device16.

In an embodiment of the present invention the wireline connection28can be a wired connection that operates in accordance with one or more standard protocols, such as a universal serial bus (USB), Institute of Electrical and Electronics Engineers (IEEE) 488, IEEE 1394 (Firewire), Ethernet, small computer system interface (SCSI), serial or parallel advanced technology attachment (SATA or PATA), or other wired communication protocol, either standard or proprietary. The wireless connection can communicate in accordance with a wireless network protocol such as IEEE 802.11, Bluetooth, Ultra-Wideband (UWB), WIMAX, or other wireless network protocol, a wireless telephony data/voice protocol such as Global System for Mobile Communications (GSM), General Packet Radio Service (GPRS), Enhanced Data Rates for Global Evolution (EDGE), Personal Communication Services (PCS), or other mobile wireless protocol or other wireless communication protocol, either standard or proprietary. Further, the wireless communication path can include separate transmit and receive paths that use separate carrier frequencies and/or separate frequency channels. Alternatively, a single frequency or frequency channel can be used to bi-directionally communicate data to and from the communication device10.

Communication device10can be a mobile phone such as a cellular telephone, a personal digital assistant, game console, personal computer, laptop computer, or other device that performs one or more functions that include communication of voice and/or data via wireline connection28and/or the wireless communication path. In an embodiment of the present invention, the real-time and non-real-time devices12,1416,18,20,22and24can be personal computers, laptops, PDAs, mobile phones, such as cellular telephones, devices equipped with wireless local area network or Bluetooth transceivers, FM tuners, TV tuners, digital cameras, digital camcorders, or other devices that either produce, process or use audio, video signals or other data or communications.

In operation, the communication device includes one or more applications that include voice communications such as standard telephony applications, voice-over-Internet Protocol (VoIP) applications, local gaming, Internet gaming, email, instant messaging, multimedia messaging, web browsing, audio/video recording, audio/video playback, audio/video downloading, playing of streaming audio/video, office applications such as databases, spreadsheets, word processing, presentation creation and processing and other voice and data applications. In conjunction with these applications, the real-time data26includes voice, audio, video and multimedia applications including Internet gaming, etc. The non-real-time data24includes text messaging, email, web browsing, file uploading and downloading, etc.

In an embodiment of the present invention, the communication device10includes an integrated circuit, such as a combined voice, data and RF integrated circuit that includes one or more features or functions of the present invention. Such integrated circuits shall be described in greater detail in association withFIGS. 3-7that follow.

FIG. 2is a schematic block diagram of an embodiment of another communication system in accordance with the present invention. In particular,FIG. 2presents a communication system that includes many common elements ofFIG. 1that are referred to by common reference numerals. Communication device30is similar to communication device10and is capable of any of the applications, functions and features attributed to communication device10, as discussed in conjunction withFIG. 1. However, communication device30includes two separate wireless transceivers for communicating, contemporaneously, via two or more wireless communication protocols with data device32and/or data base station34via RF data40and voice base station36and/or voice device38via RF voice signals42.

FIG. 3is a schematic block diagram of an embodiment of an integrated circuit in accordance with the present invention. In particular, a voice data RF integrated circuit (IC)50is shown that implements communication device10in conjunction with microphone60, keypad/keyboard58, memory54, speaker62, display56, camera76, antenna interface52and wireline port64. In operation, voice data RF IC50includes RF and baseband modules for formatting and modulating data into RF real-time data26and non-real-time data24and transmitting this data via an antenna interface52and antenna. In addition, voice data RF IC50includes the appropriate encoders and decoders for communicating via the wireline connection28via wireline port64, an optional memory interface for communicating with off-chip memory54, a codec for encoding voice signals from microphone60into digital voice signals, a keypad/keyboard interface for generating data from keypad/keyboard58in response to the actions of a user, a display driver for driving display56, such as by rendering a color video signal, text, graphics, or other display data, and an audio driver such as an audio amplifier for driving speaker62and one or more other interfaces, such as for interfacing with the camera76or the other peripheral devices.

In an embodiment of the present invention, the voice data RF IC is a system on a chip integrated circuit that includes at least one processing device. Such a processing device may be a microprocessor, micro-controller, digital signal processor, microcomputer, central processing unit, field programmable gate array, programmable logic device, state machine, logic circuitry, analog circuitry, digital circuitry, and/or any device that manipulates signals (analog and/or digital) based on operational instructions. The associated memory may be a single memory device or a plurality of memory devices that are either on-chip or off-chip such as memory54. Such a memory device may be a read-only memory, random access memory, volatile memory, non-volatile memory, static memory, dynamic memory, flash memory, and/or any device for storing digital information. Note that when the Voice Data RF IC50implements one or more of its functions via a state machine, analog circuitry, digital circuitry, and/or logic circuitry, the associated memory storing the corresponding operational instructions for this circuitry is embedded with the circuitry comprising the state machine, analog circuitry, digital circuitry, and/or logic circuitry.

In operation, the voice data RF IC50executes operational instructions that implement one or more of the applications (real-time or non-real-time) attributed to communication devices10and30as discussed in conjunction withFIGS. 1 and 3. Voice data RF IC50particularly includes a digital signal processor (DSP) subsystem that includes processing module225and memory module230that receives data from an RF module and provides baseband processing to produce input data. In addition, this DSP subsystem accepts output data and provides baseband processing to generate output data to the RF module. Further details regarding the operation of the DSP subsystem will be described in greater detail in conjunction withFIGS. 5-9that follow.

FIG. 4is a schematic block diagram of another embodiment of an integrated circuit in accordance with the present invention. In particular,FIG. 4presents a communication device30that includes many common elements ofFIG. 3that are referred to by common reference numerals. Voice data RF IC70is similar to voice data RF IC50and is capable of any of the applications, functions and features attributed to voice data RF IC50as discussed in conjunction withFIG. 3. However, voice data RF IC70includes two separate wireless transceivers for communicating, contemporaneously, via two or more wireless communication protocols via RF data40and RF voice signals42.

In operation, the voice data RF IC70executes operational instructions that implement one or more of the applications (real-time or non-real-time) attributed to communication device10as discussed in conjunction withFIG. 1. Further, RF IC70includes a digital signal processing subsystem in accordance with the present invention that will be discussed in greater detail in association withFIGS. 5-9.

FIG. 5is a more detailed schematic block diagram of an embodiment of a digital signal processing subsystem175of an integrated circuit. In particular, a voice data and RF integrated circuit (IC), such as Voice data RF IC50or70includes an RF transceiver module200that produces received data202based on a received RF signal208such as from antenna interface52,72or74and that produces a transmitted RF signal206based on transmit data204in accordance with a wireless network protocol such as IEEE 802.11, Bluetooth, Ultra-Wideband (UWB), WIMAX, or other wireless network protocol, a wireless telephony data/voice protocol such as Global System for Mobile Communications (GSM), General Packet Radio Service (GPRS), Enhanced Data Rates for Global Evolution (EDGE), Personal Communication Services (PCS), or other mobile wireless protocol or other wireless communication protocol, either standard or proprietary. The DSP subsystem175includes a memory module230that includes a first read only memory (ROM) segment238for storing a first plurality of operational instructions, and a first random access memory (RAM) segment232for storing a second plurality of operational instructions. The voice data and RF IC further includes bus210for providing data flow between various modules of the voice data and RF IC and with external devices such as memory54optionally through an additional memory interface (not expressly shown), an optional second processing module300for executing the applications associated with voice data RF IC, for controlling the protocol stack and performing and/or controlling other functions of communication device10and/or30.

In operation, the processing module225executes the plurality of operational instructions to perform baseband processing that generates input data from the received data202to be shared with one or more applications of the voice data RF IC50and/or70. In addition, DSP subsystem175produces the transmit data204from output data received from the application or applications. In particular, such baseband processing can include digital transmit/receive functions that include, but are not limited to, digital basedband to intermediate frequency (IF) conversion, IF to baseband conversion, modulation/demodulation, mapping/demapping, puncturing/depuncturing, coding/decoding, and/or scrambling/descrambling.

In addition, this architecture provides a memory interface, such as DMA interface244or other interface that provides direct downloading of the second plurality of operational instructions from the external memory54to the first RAM segment. In a particular embodiment of the present invention, a direct memory access (DMA) channel is provided to facilitate such DMA transfers of program code from the external memory54to the memory module230, via DMA commands. This memory interface can further include one or more memory registers of memory54and/or memory module230for storing DMA commands and operational instructions executed by DMA interface244of memory module230to transfer the program code using DMA commands as described above.

In an embodiment of the present invention, the memory module includes a second read only memory (ROM) segment240for storing baseband processing data, and a second random access memory (RAM) segment234for storing first data, wherein the first data includes at least one of transmit data, receive data, input data and output data and or other intermediate results used in the baseband processing. A second memory interface, also implemented in DMA interface244, transfers receive data to the second RAM segment and transfers transmit data from second RAM segment. Further, memory module includes a third random access memory (RAM) segment236for storing second data, wherein the second data includes at least one or transmit data, receive data, input data and output data, and wherein the processing module parallel processes the first data and the second data. For instance, RAM234can store an X value and RAM236can store a Y value such that parallel processing can be used to compute a value for the product XY, etc. The baseband processing data can include wave tables such as sine and cosine tables, filter coefficients and other constants, fixed parameters and look-up tables used in baseband processing.

Memory module230further includes a patch code RAM section for providing corrections that may be required to the ROM program code or data stored on ROM238or240. As shown, one or more hardware engines260are included that facilitate the transfer of received data202and transmit data204between the DSP subsystem175and the RF transceiver module200, and that perform other functions, such as coding and decoding, equalization, audio processing, encryption, event timing, pulse code modulation, a command interface to the RF transceiver module200, audio and/or voice processing, and other processing functions, either real-time or otherwise. Memory module230further includes an interface250, for providing transfers of data directly between DSP subsystem175and hardware engines260. In an embodiment of the present invention, the interface250provides a high-speed interface that can handle realtime data streams.

In an embodiment of the present invention, processing module225can includes at least one processing device. Such a processing device may be a microprocessor, micro-controller, digital signal processor, microcomputer, central processing unit, field programmable gate array, programmable logic device, state machine, logic circuitry, digital circuitry, and/or any device that manipulates signals (analog and/or digital) based on operational instructions stored in an associated memory such as integrated memory module230. Portions of the memory device may be a volatile memory, non-volatile memory, static memory, dynamic memory, flash memory, and/or any device for storing digital information. Note that when the processing module225implements one or more of its functions via a state machine, digital circuitry, and/or logic circuitry, the associated memory storing the corresponding operational instructions for this circuitry is embedded with the circuitry comprising the state machine, analog circuitry, digital circuitry, and/or logic circuitry.

FIG. 6is a flow chart of an embodiment of a method in accordance with the present invention. In particular, a method is presented for use in conjunction with one or more of the functions and features described in conjunction withFIGS. 1-5. In step400, received data is received based on a received RF signal. In step402, a transmitted RF signal is generated based on transmit data. In step404, a first plurality of operational instructions are stored in a first read only memory (ROM) segment. In step406, a second plurality of operational instructions are directly downloaded from an external memory to a first random access memory (RAM) segment. In step408, input data is generated from the received data. In step410, the transmit data is generated from input data. In an embodiment of the present invention, step406includes a direct memory access (DMA) transfer.

FIG. 7is a flow chart of an embodiment of a method in accordance with the present invention. In particular, a method is presented for use in conjunction with the method ofFIG. 6and one or more of the functions and features described in conjunction withFIGS. 1-5. In step500, baseband processing data are stored in a second read only memory (ROM) segment. In step502, first data is stored in a second random access memory (RAM) segment, wherein the first data includes at least one of transmit data, receive data, input data and output data. In an embodiment of the present invention, the baseband processing data includes at least one of filter coefficients, a wave table, and a look-up table.

FIG. 8is a flow chart of an embodiment of a method in accordance with the present invention. In particular, a method is presented for use in conjunction with the method ofFIG. 7and one or more of the functions and features described in conjunction withFIGS. 1-6. In step510receive data is directly transferred to the second RAM segment. In step512, transmit data are directly transferred from second RAM segment. In an embodiment of the present invention, steps510and/or step512include a direct memory access (DMA) transfer.

FIG. 9is a flow chart of an embodiment of a method in accordance with the present invention. In particular, a method is presented for use in conjunction with the method ofFIG. 7and one or more of the functions and features described in conjunction withFIGS. 1-6and8. In step520, second data are stored in a third random access memory (RAM) segment, wherein the second data includes at least one or transmit data, receive data, input data and output data. In step522, the first data and the second data are processed in parallel.