Rechargeable-battery implantable medical device having a primary battery active during a rechargeable-battery undervoltage condition

A rechargeable-battery Implantable Medical Device (IMD) is disclosed including a primary battery which can be used as a back up to power critical loads in the IMD when the rechargeable battery is undervoltage and other non-critical loads are thus decoupled from the rechargeable battery. A rechargeable battery undervoltage detector provides at least one rechargeable battery undervoltage control signal to a power supply selector, which is used to set the power supply for the critical loads either to the rechargeable battery voltage when the rechargeable battery is not undervoltage, or to the primary battery voltage when the rechargeable battery is undervoltage. Circuitry for detecting the rechargeable battery undervoltage condition may be included as part of the critical loads, and so the undervoltage control signal(s) is reliably generated in a manner to additionally decouple the rechargeable battery from the load to prevent further rechargeable battery depletion.

FIELD OF THE INVENTION

This application relates to the field of implantable medical devices, and in particular to batteries useable in an implantable medical device.

BACKGROUND

Implantable stimulation devices deliver electrical stimuli to nerves and tissues for the therapy of various biological disorders, such as pacemakers to treat cardiac arrhythmia, defibrillators to treat cardiac fibrillation, cochlear stimulators to treat deafness, retinal stimulators to treat blindness, muscle stimulators to produce coordinated limb movement, spinal cord stimulators to treat chronic pain, cortical and deep brain stimulators to treat motor and psychological disorders, and other neural stimulators to treat urinary incontinence, sleep apnea, shoulder subluxation, etc. The description that follows will generally focus on the use of the invention within a Spinal Cord Stimulation (SCS) system, such as that disclosed in U.S. Pat. No. 6,516,227. However, the present invention may find applicability with any implantable medical.

An SCS system typically includes an Implantable Pulse Generator (IPG)10shown in plan and cross-sectional views inFIGS. 1A and 1B. The IPG10includes a biocompatible device case30that holds the circuitry and battery36necessary for the IPG to function. The IPG10is coupled to electrodes16via one or more electrode leads14that form an electrode array12. The electrodes16are configured to contact a patient's tissue and are carried on a flexible body18, which also houses the individual lead wires20coupled to each electrode16. The lead wires20are also coupled to proximal contacts22, which are insertable into lead connectors24fixed in a header28on the IPG10, which header can comprise an epoxy for example. Once inserted, the proximal contacts22connect to header contacts26, which are in turn coupled by feedthrough pins34through a case feedthrough32to circuitry within the case30.

In the illustrated IPG10, there are thirty-two lead electrodes (E1-E32) split between four leads14, with the header28containing a 2×2 array of lead connectors24. However, the number of leads and electrodes in an IPG is application specific and therefore can vary. In a SCS application, the electrode leads14are typically implanted proximate to the dura in a patient's spinal cord, and when a four-lead IPG10is used, these leads are usually split with two on each of the right and left sides of the dura. The proximal electrodes22are tunneled through the patient's tissue to a distant location such as the buttocks where the IPG case30is implanted, at which point they are coupled to the lead connectors24. A four-lead IPG10can also be used for Deep Brain Stimulation (DBS) in another example. In other IPG examples designed for implantation directly at a site requiring stimulation, the IPG can be lead-less, having electrodes16instead appearing on the body of the IPG for contacting the patient's tissue.

As shown in the cross section ofFIG. 1B, the IPG10includes a printed circuit board (PCB)40. Electrically coupled to the PCB40are the battery36, which in this example is rechargeable (36r); other circuitry50aand50bcoupled to top and bottom surfaces of the PCB; a telemetry coil42for wirelessly communicating with an external controller (not shown); a charging coil44for wirelessly receiving a magnetic charging field from an external charger90(FIG. 2) for recharging the battery36; and the feedthrough pins34(connection not shown). (Further details concerning operation of the coils42and44and the external devices with which they communicate can be found in U.S. Patent Application Ser. No. 61/877,871, filed Sep. 13, 2013).

An issue requiring care in an IPG10, especially one in which the battery36is rechargeable, is design of the battery management circuitry, which is described in one example in commonly-owned U.S. Patent Application Publication 2013/0023943, which is incorporated herein by reference in its entirety.FIG. 2shows the battery management circuitry84disclosed in the '943 Publication, which is briefly discussed. Rechargeable battery36rmay comprise a Li-ion polymer battery, which when fully charged can provide a voltage, Vbat(r), of about Vmax(r)=4.2 Volts. However, other rechargeable battery chemistries could be used for battery36ras well.

As noted, an external charger90, typically a hand-held, battery-powered device, produces a magnetic non-data-modulated charging field98(e.g., 80 kHz) from a coil92. The magnetic field98is met in the IPG10by front-end charging circuitry96, where it induces a current in the charging coil44in the IPG10. This induced current is rectified46to a voltage V1, which is then filtered (by a capacitor) and limited in its magnitude (by a Zener diode, e.g., to 5.5V), and passed through a back-flow-prevention diode48to produce a DC voltage, Vdc. Transistors102coupled to the charging coil44can be controlled by the IPG10(via control signal LSK) to transmit data back to the external charger90during production of the magnetic field98via Load Shift Keying, as is well known.

As discussed in the '943 Publication, Vdc is provided to battery management circuitry84, which may reside on an Application Specific Integrated Circuit (ASIC) along with other circuitry necessary for IPG10operation, including current generation circuitry (used to provide specified currents to selected ones of the electrodes16); telemetry circuitry (for modulating and demodulating data associated with telemetry coil42ofFIG. 1B); various measurement and generator circuits; system memory; etc. The front-end charging circuitry96and the battery36rtypically comprise off-chip (off-ASIC) components, along with other electronics in the IPG10, such as the telemetry coil42; various DC-blocking capacitors coupled to the electrodes16(not shown); a microcontroller100, which can communicate with the ASIC (and the battery management circuitry84) via a digital bus88; and other components of lesser relevance here. Microcontroller100may comprise in one example Part Number MSP430, manufactured by Texas Instruments, which is described in data sheets at http://www.ti.com/lsds/ti/microcontroller/16-bit_msp430/overview.page? DCMP=MCU_other& HQS=msp430, which is incorporated herein by reference. The ASIC may be as described in U.S. Patent Application Publication 2012/0095529, which is also incorporated herein by reference.

The battery management circuitry84inFIG. 2is comprised of two circuit blocks: charging circuitry80for generating a current for charging the battery36r, and load isolation circuitry82for controllably connecting or disconnecting the battery36rfrom the load75that the battery36rpowers during normal operation of the IPG10. Load75can comprise both on-chip (on-ASIC) circuit blocks such as the current generation circuitry and the telemetry circuitry mentioned earlier, and off-chip (off-ASIC) components such as the microcontroller100.

As depicted, the charging circuitry80, the load isolation circuitry82, and the battery36rgenerally have a T-shaped topology, with the charging circuitry80intervening between the front-end charging circuitry96(Vdc) and the positive terminal (Vbat(r)) of the battery36r, and with the load isolation circuitry82intervening between Vbat(r) and the load75.

As discussed in the '943 Publication, the load isolation circuitry82can prohibit the battery36r(Vbat(r)) from being passed to power the load (Vload) dependent on a number of conditions. For example, if the load75is drawing a significantly high current (as indicated by overcurrent detection circuitry74via assertion of control signal OI); if Vbat(r) is too low (as indicated by rechargeable battery undervoltage detector70via assertion of a rechargeable battery undervoltage control signal UV(r)); or if an external magnetic field signal μ is indicated by a Reed switch78(e.g., in an emergency condition warranting presentation by the patient of an external shut-off magnet), the load75will be decoupled from Vbat(r) via switches62or64. Load isolation circuitry82is discussed in further detail in the above-incorporated '943 Publication. Discharge circuitry68is also provided to intentionally drain the battery36rif Vbat(r) is too high.

The charging circuitry80begins at Vdc—the DC-voltage produced by the front-end charging circuitry96in response to the external charger90's magnetic field98. Vdc splits into two paths in the charging circuitry80that are connected in parallel between Vdc and Vbat(r): a trickle charging path, and an active charging path, either of which can be used to provide a charging current (Ibat) to the battery36r.

The trickle charging path is passive, i.e., its operation is not controlled by control signals, and requires no power other than that provided by Vdc to produce a charging current (Itrickle) for the battery36r. As shown, the trickle charging path presents Vdc to a current-limiting resistor50and one or more diodes52, and is used to provide a small charging current, Itrickle, to the battery36r. Using a small trickle charging current is particularly useful when the battery36ris significantly depleted, i.e., if Vbat(r) is below a threshold Vt1, such as 2.7V for example.

To produce Itrickle, Vdc must be higher than the sum of the voltage drops across the resistor50and diode(s)52and the voltage of the battery36r, Vbat(r). If Vdc is small (perhaps because the coupling between the external charger90and the IPG10is poor) or non-existent, diodes52will prevent the battery36rfrom draining backwards through the trickle charging path. Itrickle is generally on the order of ten milliamps. This is desirably small, because a significantly depleted rechargeable battery36rcan be damaged if it receives charging currents (Ibat) that are too high, as is well known.

The active charging path proceeds inFIG. 2from Vdc to the battery36rthrough a current/voltage source56, which is used to produce charging current Iactive. In the example ofFIG. 2, the active charging path also passes through control and protective measures for the battery management circuitry84, including a charging current sense resistor58used in conjunction with a charging current detector72, and an overvoltage protection switch60used in conjunction with an overvoltage detector66to open circuit the active charging path if the battery voltage, Vbat(r), exceeds a maximum value (such as Vmax(r)=4.2V).

Circuitry for the current/voltage source56in the active charging path is shown inFIG. 3A. As its name implies, source56can be controlled to provide either a constant current or a constant voltage to the battery36rduring active charging. The source56comprises a current mirror comprised of P-channel transistors104and106, which receive Vdc and a reference current, Iref, provided by a current source110in reference current generator circuitry113. Current mirror control transistor104mirrors a representation of Iref in current mirror output transistor(s)106to produce the active charging current, Iactive. In the example shown, M output transistors106are wired in parallel, and thus the current provided by output transistor(s) 106 equals Iactive=M*Iref. A single wider output transistor106(M times wider than the current mirror control transistor104) could also be used.

The current source110used to produce Iref is adjustable via control signals Itrim[2:0], and also comprises a current mirror. As shown, a system reference current, I′ (e.g., 100 nA), is mirrored transistors116,118, and120, each of which are coupled in series to gating transistors controlled by the Itrim control signals. Transistors116,118, and120are preferably of different widths, or comprise different numbers of transistors in parallel, to provide different contributions to Iref. For example, transistors116,118, and120may respectively contribute I′*N, I′*2N, and I′*4N to Iref, thus allowing Iref to vary from I′*N to I′*7N in increments of I′*N, depending on which control signals Itrim0, Itrim1, and Itrim2are active. Additional Itrim control signals and additional current mirror output transistors (e.g.,116-120) could be used to control Iref over a wider range, and/or with smaller resolution. Adjusting Iref in this manner in turn adjusts Iactive via operation of the current mirror transistor104and106discussed above.

Control signals Itrim are issued by a source controller86. As shown at the bottom ofFIG. 3A, the source controller86communicates with the microcontroller100by a digital bus88, and so the microcontroller100can control the source controller86to in turn control the source56via Itrim and other control signals discussed further below.

The mode in which the source56operates to generate a charging current depends on the magnitude of the battery voltage, Vbat(r), which is known to the microcontroller100. If the battery36ris significantly depleted, i.e., Vbat(r)<Vt1(e.g., 2.7), the microcontroller100commands the source controller86to disable the source56. This occurs by the source controller86issuing charge enable control signal Ch_en=‘0’ to the reference current generator113, which turns off N-channel transistor108and disables generation of the reference current, Iref, and hence Iactive. Thus, the battery36rin this circumstance can only be charged via the trickle charging path, and only if magnetic field98and Vdc are present and sufficient.

If Vbat(r)>Vt1, but below an upper threshold Vt2described further below (i.e., if Vt1<Vbat(r)<Vt2), the source56operates in a constant current mode. In this mode, Ch_en=‘1’, and transistor108allows Iref and hence Iactive to flow with a magnitude ultimately set by the Itrim control signals. When source56operates in constant current mode, Iactive is generally on the order of 50 milliamps. A P-channel transistor114in the active current path is fully on in constant current mode, thus allowing Iactive to flow to the battery36rwithout resistance.

If Vbat(r)>Vt2(e.g., 4.0 V), the source56operates in a constant voltage mode. Ch_en and the Itrim control signals are still asserted in this mode. Crossing of the Vt2threshold and switching of charging modes is affected via rechargeable voltage measurement circuitry111in the source56. Vbat(r) is determined in this circuitry111via a high-impedance resistor ladder, which produces a voltage Va indicative of Vbat(r). Va and a known band-gap reference voltage, Vref(a), are compared at a comparator112. When Va>Vref(a), indicating that Vbat(r)>Vt2, the comparator112starts to turn off transistor114, and the source56operates in constant voltage mode, providing an essentially constant voltage to the positive terminal of the battery36r. As the internal cell voltage of the battery36rincreases in this mode, its internal resistance causes Iactive to fall off exponentially, until Vbat(r) reaches a maximum value, Vmax(r) (e.g., 4.2V). At this point, the microcontroller100will consider charging of the battery36rto be complete, and will once again assert Ch_en=‘0’ to curtail further active charging. (Additionally, overvoltage switch60may also be opened). By contrast, when Va<Vref(a), indicating that Vbat(r)<Vt2, the comparator112turns on P-channel transistor114, and the source56operates in constant current mode as described earlier. Voltage Va can be trimmed as necessary using control signals Vtrim to trim the resistance in the ladder, which essentially sets threshold Vt2.

FIG. 3Bgenerally illustrates operation of the charging circuitry80to produce the charging current (Ibat) received by a severely depleted battery36r(i.e., where Vbat(r) is below an even lower threshold Vuv(r)=2.0V) as a function of time during a charging session, including the trickle, constant current, and constant voltage modes enabled by the charging circuitry80as described above. Also shown are typical values for the charging current in each of these modes, and the capacity of the battery36rillustrated as a percentage.

The battery management circuitry84ofFIG. 2provides additional safeguards as discussed in the '943 Publication. For example, diode(s)54, preferably matching diode(s)52in number, are connected between the trickle and active charging paths, which ensure that both the source and drain of the overvoltage switch60are biased to the same voltage—to Vbat(r)—even when Vbat(r) is low. Diode(s)54thus protect the battery36rfrom inadvertently discharging through overvoltage switch60, particularly at the inopportune time when Vbat(r) is already low, and when it therefore might be difficult to provide a suitably high voltage to the gate of P-channel transistor60to turn it off.

The problem of low levels for Vbat(r) is significant. If Vbat(r) is severely depleted, i.e., if Vbat(r)<Vuv(r)=2.0V for example, it may be difficult to recover (recharge) the battery36rby traditional charging techniques. This is because rechargeable batteries are unable to handle large charging currents without damage, and Itrickle, as passively set by the resistance R of the components (50,52) in the trickle charging path, may be too large when Vbat(r)<Vuv(r). This problem is exacerbated the lower Vbat(r) becomes.

As discussed above, one solution to the problem of battery depletion is to decouple the battery36rfrom the load75via the load isolation circuitry82to prevent the battery from being further depleted by the load. This is the function of the rechargeable battery undervoltage detector70, which as disclosed in the '943 Publication is shown inFIG. 4. Note that the rechargeable battery undervoltage detector70receives no control signals and thus passively outputs a rechargeable battery undervoltage control signal UV(r), which is preferred because this circuit must work reliably at low levels for Vbat(r) when control signals may not be trustworthy. When Vbat(r)>Vuv(r), the voltage divider formed by diodes122and resistor124forms a suitably high voltage at the gate of N-channel transistor128to turn it on, which pulls UV(r) to ‘0’. By contrast, when Vbat(r)<Vuv(r), the voltage at the gate of transistor128is not high enough to turn on that transistor. UV(r) is thus pulled to ‘1’ (i.e., to Vbat(r)) through a pull-up resistor126. Both of resistors124and126are in the range of tens of M-ohms. The forward drop across the diode(s)122(as well as their number) and the resistor124effectively operate to set the value of threshold Vuv(r). Although not shown, control signal UV(r) may be buffered at the output of the rechargeable battery undervoltage detector70to improve its integrity. When UV(r)=‘1’ during a rechargeable battery undervoltage condition, both of the P-channel load isolation switches62and64(FIG. 2) are off, thus isolating the battery36rand preventing further depletion.

However, decoupling the battery from the load75during a rechargeable battery undervoltage condition brings other problems. The load75includes all of the remaining circuitry in the IPG, including the microcontroller100and the ASIC, which are completely shut down. Once power is eventually restored to these circuits, their state may be uncertain. For example, the inventors consider it particularly unfortunate that the timing (clock) circuitry in the IPG can lose its time basis, such that when the timing circuitry is later powered (assuming the battery36ris eventually recharged), the timing circuitry will be reset to zero. Because various data is logged and stored with timestamps for later review, having an unreliable timestamp makes it difficult to review data spanning such a loss of time basis. See, e.g., U.S. Pat. No. 8,065,019 (discussing a solution to this problem involving time basis resetting in the IPG using timestamps provided wirelessly by an external device).

Plus, it may simply be difficult to reliably decouple the load75using the load isolation switches62and64if Vbat(r) is very low (e.g., <1.0 V). This is because the load switches62and64comprise P-channel transistors, which require a high signal (‘1’) to turn these transistors off. However, if Vbat(r) drops to very low levels, it cannot be guaranteed that control signal UV(r) can be generated by the rechargeable battery undervoltage detector70(FIG. 4) to a voltage sufficient to turn load isolation switches62and64off, taking the thresholds of those switches into account. This could cause discharging of the battery through the load isolation switches62and64and the load75at the very time when Vbat(r) is already very low and battery depletion is least desired.

Despite the protections provided in the '943 Publication to keep the battery36rfrom depleting to severe levels, such depletion is still possible, and the ability to recovery the battery made more difficult during subsequent charging sessions. Solutions to these problems are disclosed herein.

DETAILED DESCRIPTION

A rechargeable-battery Implantable Medical Device (IMD) such as an IPG is disclosed. The IMD includes a primary (non-rechargeable) battery which can be used as a back up to power critical loads in the IMD (e.g., timing circuitry) when the rechargeable battery is undervoltage and other non-critical loads are thus decoupled from the rechargeable battery. A rechargeable battery undervoltage detector provides at least one rechargeable battery undervoltage control signal to a power supply selector, which is used to set the power supply for the critical loads either to the rechargeable battery voltage when the rechargeable battery is not undervoltage, or to the primary battery voltage when the rechargeable battery is undervoltage. Thus, such critical loads can continue to operate despite the rechargeable battery undervoltage condition. Circuitry for detecting the rechargeable battery undervoltage condition may be included as part of the critical loads, and so the undervoltage control signal(s) is reliably generated in a manner to additionally decouple the rechargeable battery from the load to prevent further rechargeable battery depletion. In a modification, an additional primary battery undervoltage detector is provided to generate at least one primary battery undervoltage control signal, and to control the power supply selector to set the power supply for the critical loads to the voltage of the rechargeable battery, even if it is not as high as desired, during a primary battery undervoltage condition.

FIG. 5Ashows improved battery management circuitry184for an implantable medical device (IMD) such as an IPG10having a rechargeable battery36r. Many of the components in the battery management circuitry184are unchanged from the '943 Publication discussed earlier and shown inFIG. 2, and are thus not described again. Some components (the external charger90; the front-end charging circuitry96) have been removed inFIG. 5Afor easier viewing, while others have been drawn more simply. Load isolation switches62and64(FIG. 2) are shown for simplicity as a single transistor, which it could be in an actual implementation, and without control based on overcurrent (OI) or magnetic field (μ) conditions, although such control could also be used. The rechargeable battery36rmay be as described earlier, with a maximum Vbat(r) of Vmax(r)=4.2V. Charging circuitry80can remain unchanged to allow the rechargeable battery36rto be recharged as before.

New to the battery management circuitry184is the addition of a primary (non-rechargeable) battery36p, which is used in conjunction with the rechargeable battery36r. The primary battery36pcan comprise any number of battery chemistries used in implantable medical devices. The maximum voltage of the primary battery, Vmax(p), when fresh, can be established in different manners, and may comprise a number of cells connected together in series. Vmax(p) is preferably greater than the undervoltage threshold voltage for the rechargeable battery36r, which as before can be Vuv(r)=2.0V. Still more preferably, Vmax(p) is significantly higher than this threshold Vuv(r), such as from 2.5 to 4.5 V.

Vbat(p) is preferably used to power certain loads in the IPG10during a rechargeable battery undervoltage condition—e.g., when Vbat(r)<Vuv(r)=2.0V. In this regard, the load in the IPG has been split into critical loads (load75b) potentially powered by either the rechargeable battery36ror the primary battery36p, as explained further below; and non-critical loads75awhich are only powered by the rechargeable battery36r, and which are subject to being decoupled from the rechargeable battery36rwhen during a rechargeable battery undervoltage condition. Critical loads75bcan include circuitry that is desirable to power even during a rechargeable battery undervoltage condition, such as timing circuitry152for example, as well as circuitry used to determine whether the rechargeable battery undervoltage condition exists, such as a rechargeable battery undervoltage detector130, explained further below. Non-critical loads75acan comprise circuitry involved in providing therapy to a patient, such as the microcontroller100and/or the ASIC mentioned earlier. It is preferable that critical loads75bin the IPG10are limited to reduce the current drawn from the primary battery36pduring a rechargeable battery undervoltage condition (Icrit).

Also new to battery management circuitry184are the rechargeable battery undervoltage detector130just mentioned, and a power supply selector140. Rechargeable battery undervoltage detector130which may differ in construction from the rechargeable battery undervoltage detector70described earlier (FIG. 4), but similarly issues a rechargeable battery undervoltage control signal UV(r)=‘1’ when Vbat(r)<Vuv(r), and ‘0’ when Vbat(r)>Vuv(r). Power supply selector140passes either Vbat(r) from the rechargeable battery36ror Vbat(p) from the primary battery36pas a power supply, Vsup, used by the critical loads75b. Which of these voltages is selected for Vsup depends on the UV(r) control signal provided by the rechargeable battery undervoltage detector130.

By way of summary, and as shown in the chart at the bottom ofFIG. 5A, when Vbat(r)>Vuv(r), no rechargeable battery undervoltage condition exists. Rechargeable battery undervoltage detector130thus sets UV(r)=‘0’, which sets Vsup=Vbat(r) in the power supply selector140. As such, critical loads75bare powered by Vbat(r). Because UV(r)=‘0’, P-channel load isolation switches62and64are on, and thus the non-critical loads75aare coupled to the rechargeable battery36r, i.e., Vload=Vbat(r). In effect, when the rechargeable battery36ris not undervoltage, both loads75aand75bare powered by the rechargeable battery36r(Vbat(r)).

By contrast, when Vbat(r)<Vuv(r), a rechargeable battery undervoltage condition exists. Rechargeable battery undervoltage detector130thus sets UV(r)=‘1’, which sets Vsup=Vbat(p) in the power supply selector140. As such, critical loads75bare powered by Vbat(p). Because UV(r)=‘1’, load isolation switches62and64are off, and thus the non-critical loads75aare decoupled from the rechargeable battery36r, i.e., Vload=0. (Because Vload isn't actually tied to ground, it will more accurately float, eventually near ground). In effect, when the rechargeable battery36ris undervoltage, critical loads75bare powered by the primary battery36p(Vbat(p)), and the rechargeable battery36ris decoupled from all loads75aor75b, thus preventing depletion of the rechargeable battery36r.

Details of rechargeable battery undervoltage detector130and power supply selector140are shown in one example inFIG. 5B. It is preferred that rechargeable battery undervoltage detector130, unlike70(FIG. 4), be actively driven to produce at least one UV(r) control signal. Thus, undervoltage detector is powered by Vsup, i.e., by Vbat(r) when sufficient, or by Vbat(p) otherwise. Rechargeable battery undervoltage detector130is thus powered as are other critical loads75b, and may be considered as part of such loads75b, as shown by the dotted-line box inFIG. 5A.

In the example shown inFIG. 5B, rechargeable battery undervoltage detector130includes rechargeable battery measurement circuitry131, such as a high-impedance resistor ladder, which produces a voltage Vb indicative of Vbat(r). A reference voltage generator135generates a known band-gap reference voltage, Vref(b), and Vb and Vref(b) are compared at a comparator132. When Vb>Vref(b), indicating that Vbat(r)>Vuv(r), the amplifier132outputs UV(r)=‘0.’ An inverter136in turn provides UV(r)'s inverse, UV(r)*=‘1’, which inverse of true signal UV(r) is not strictly necessary, but can be useful in the power supply selector140, as discussed subsequently. By contrast, when Vb<Vref(b), indicating that Vbat(r)<Vuv(r), UV(r)=‘1’ and UV(r)*=‘0.’ The resistors in the resistor ladder effectively set the rechargeable battery undervoltage threshold Vuv(r) relative to the value of Vref(b).

Notice that active elements in the rechargeable battery undervoltage detector130—the Vref(b) generator135, the comparator132, and the inverter136—are powered by Vsup, which should normally be of a sufficient voltage to reliably drive such elements, i.e., either Vbat(r)>Vuv(r), else Vbat(p), which is also preferably greater than Vuv(r) as noted earlier. Thus, control signals UV(r) and UV(r)* are referenced to (i.e., derived from) Vsup, and thus should also be of sufficient voltage.

Note that sufficiency of the UV(r) control signal(s) is beneficial compared to the prior art, and in particular the passive rechargeable battery undervoltage detector70discussed previously (FIG. 4). As discussed, rechargeable battery undervoltage detector70may not reliably generate a control signal UV(r)=‘1’ of a sufficiently high voltage to turn off P-channel load isolation switches62and64during a rechargeable battery undervoltage condition, when Vbat(r)<Vuv(r). This could inadvertently cause the rechargeable battery36rto deplete through the load75, thus running the risk of severely depleting the rechargeable battery, perhaps to a point where it can no longer be recovered during a subsequent charging session. By contrast, rechargeable battery undervoltage detector130, with its suitably-high control signal UV(r)=‘1’ referenced to Vsup, will reliably turn off these load isolation transistors62and64during a rechargeable battery undervoltage condition, thus completely isolating the rechargeable battery and allowing it to be subsequently recharged without difficulty.

While beneficial, it is not strictly necessary in all implementations that the rechargeable battery undervoltage detector130be powered by Vsup like the remainder of the critical loads75b. Instead, the rechargeable battery undervoltage detector130may passively generate the UV(r) control signal(s) (seeFIG. 4) for the benefit of the load isolation switches62and64and the power supply selector140used to provide Vsup to the critical loads75b, which is explained next.

Power supply selector140sets the power supply voltage for the critical loads75b, Vsup, to either Vbat(r) or Vbat(p) using the UV(r) control signal(s) generated by the rechargeable battery undervoltage detector130. In the example shown, power supply selector140comprises two transistors142and144, which in this example are P-channel transistors. Transistors142and144are coupled at their drains to Vbat(p) of primary battery36pand Vbat(r) of rechargeable battery36rrespectively, and at their sources to Vsup. If Vbat>Vuv(r) (UV(r)/UV(r)*=0/1), transistor144is on, transistor142is off, and Vbat(r) is passed to Vsup. If Vbat<Vuv(r) (UV(r)/UV(r)*=1/0), transistor142is on, transistor144is off, and Vbat(p) is passed to Vsup. Thus, and as discussed earlier, Vsup should normally be of a sufficient voltage to reliably power the critical loads75band allow them to continue operating, even when non-critical loads75aare no longer powered. This allows, in just one example, timing circuitry152to continue to track the time basis of the IPG10despite the rechargeable battery undervoltage condition. Still other beneficial circuits in the IPG10could also similarly be powered by the primary battery36pas part of the critical loads.

Optional diodes146and148span the sources and drains of transistors142and144, and are beneficial to smooth transition of Vsup between Vbat(r) and Vbat(p) and to otherwise decouple Vbat(r) and Vbat(p). Operation of transistors142and144are ideally mutually exclusive, with one being on when the other is off. However, due to parasitics, delays and other non-idealities, transistors142and144could both be on at the same time for a very short period. This runs the risk of shorting Vbat(r) and Vbat(p) during this very short period, with current flowing from the higher to the lower of these voltages. Likewise, transistors142and144could both be off at the same time for a very short period, which would run the risk that Vsup is decoupled from both Vbat(r) and Vbat(p), and could therefore drop in value to a point at which it could not reliably drive the critical loads75b.

Diodes146and148can be used to address these concerns, and setting of the on resistances of the transistors142and144can also be helpful. The on resistance of the transistors142and144can be made to have a significant resistance, such as 100-500 ohms. Diodes146and148can comprise low-threshold voltages diodes, such as Schottky diodes. So configured, if both transistors142and144are simultaneously on, the significant resistance of the transistor associated with the lower of Vbat(r) or Vbat(p) will impair an influx of current from the higher voltage supply, which again should be very short in duration. If both transistors142and144are simultaneously off, current can flow from the higher voltage supply through its associated diode to Vsup to prevent its interruption; the other diode associated with the lower voltage supply would not receive current from the higher voltage supply, because its associated diode would be reversed biased.

Another manner in which rechargeable battery undervoltage detector130can be implemented is shown inFIG. 5C. In this example, rechargeable battery undervoltage detector130comprises at least a portion of an integrated circuit (IC)170powered by Vsup (as a critical load75b), unlike other integrated circuits (such as microcontroller100and/or the ASIC mentioned earlier) that are powered by Vload (as non-critical loads75a). Integrated circuit170includes an Analog-to-Digital converter (A/D)172that receives Vbat(r), and further includes an undervoltage module174for digitally comparing Vbat(r) to the rechargeable battery undervoltage threshold Vuv(r), and for outputting control signal(s) UV(r). In this regard, note that the control signals received by the rechargeable battery undervoltage detector130(cntr) can be referenced to (i.e., derived from) Vsup by virtue of their generation within IC170, which is powered by Vsup. Note also that IC170could include other critical loads75b, such as timing circuitry152for keeping the IPG10's time basis.

FIG. 6shows different examples of an IPG10accommodating both the rechargeable battery36rand the primary battery36p. The batteries36rand36pcan be located anywhere inside the IPG110so long as they don't impact other IPG functions or interfere unduly with telemetry. Shown are examples in which the batteries36rand36pare side-by-side on one side of the IPG's PCB40(4); on opposite sides of the PCB (3,5); inside the IPG's telemetry coil42(1); outside of the IPG's charging coil44(1,2); outside of both coils42and44(2); and stacked on one side of the PCB (2,6).

In all of the examples, the IPG10includes a charging coil44for receiving operational power from an external charger90(FIG. 2) and for allowing recharging of the rechargeable battery36r. Each also includes a telemetry coil42for communicating with an external controller (not shown), although other forms of antennas could be used for this purpose. Telemetry antennas or coils42could also be placed in the IPG's header28instead of within its case30. Although not shown, a single coil42/44could be provided for performing both telemetry and charging functions, with these functions being (for example) time multiplexed at the single coil.

In most of the examples shown inFIG. 6, the rechargeable36ris larger than the primary battery36p. This is in recognition that the rechargeable battery36ris preferentially used as the main battery for the IPG10, with the primary battery36pinstead being used as a back-up battery when the voltage of the rechargeable battery36rbecomes too low (<Vuv(r)) before it is subsequently recharged. As such, the rechargeable battery36ris preferably as large as possible, while the primary battery36pmay be relatively small, as it may be infrequently used assuming the rechargeable battery36ris diligently charged at appropriate intervals.

FIG. 6merely illustrates some examples of IPG10containing batteries36rand36p. Such batteries can be placed anywhere in the IPG10as its design permits. Various combinations of the depicted examples could be used. The positions of36rand36pcould also be swapped. If necessary, a larger IPG case30could be used for the IPG10to accommodate both batteries36rand36p. More than one rechargeable battery36r, and/or more than one primary battery36p, could also be used, although not depicted. See also U.S. patent application Ser. No. 61/887,231, filed Oct. 14, 2013 (disclosing an IPG having a rechargeable and a primary battery).

Because patients are trained to recharge the rechargeable battery36rin the IPG10in a manner to keep it from severely depleting, Vbat(r) would hopefully only rarely fall below Vuv(r), and thus primary battery36pwould only be used sparingly to continue to power critical loads75b. Moreover, by minimizing the critical loads75b, the current drawn by such loads (Icrit) is preferably kept low. Thus, the primary battery36pshould deplete slowly, and hopefully will last the natural lifetime of the IPG10before the primary battery36preaches its End of Life (EOL)—that is, before Vbat(p) falls to a primary battery undervoltage threshold (Vuv(p)) at which it can no longer power the critical loads75b.

Should Vbat(p) fall below this threshold Vuv(p) and is therefore in effect useless, it is preferable that the power supply selector140set Vsup to the voltage of the rechargeable battery, Vbat(r), even if Vbat(r) is insufficient: Although Vbat(r) may be insufficient, it may eventually be recharged or recovered to a point where it can power the loads75aand75b, whereas Vbat(p) cannot.

Modification to the battery management circuitry184to affect such behavior by the power supply selector140is shown inFIGS. 7A and 7B. Included is a primary battery undervoltage detector180for outputting a primary battery undervoltage control signal UV(p) indicating when Vbat(p) falls below Vuv(p). In the example shown, Vuv(p)=Vuv(r)=2.0 V, but this is not strictly necessary and different values for these thresholds can be used. Note that both Vuv(r) and Vuv(p) are both preferably set slightly higher than the minimum operating voltage needed to power the critical loads75b.

As shown inFIG. 7B, the primary battery undervoltage detector180can be passive, and can comprise the same basic circuitry illustrated for rechargeable battery undervoltage detector70described earlier (seeFIG. 4), but receiving Vbat(p) at its input. As operation of that circuit70was explained earlier, it is not explained again, other than to note that Vuv(p) is set by the diode(s)122and the resistor124.

As shown inFIG. 7B, control signal UV(r) is generated in the rechargeable battery undervoltage detector130as before, and is sent to load isolation switches62and64as before, with a logic level dependent on Vbat(r)'s comparison to Vuv(r). UV(r) is still referenced to Vsup, although Vsup may be set to Vbat(r) regardless of its level, as explained shortly.

Both undervoltage control signals UV(r) and UV(p) are sent to the power supply selector140, where they are met by a logic block182powered by Vsup. Logic gates inside the logic block process UV(r) and UV(p) to produce signals at the gates of the P-channel transistors142and144to either set Vsup to Vbat(r) or Vbat(p). In the example shown, logic block182contains a NAND logic gate184and two inverters186and188, although other processing of the UV(r) and UV(b) signals could be used to control power supply selection.

If UV(r)=‘0’, indicating that the rechargeable battery36ris not undervoltage (Vbat(r)>Vuv(r)), the NAND gate outputs a ‘1’, regardless of the level of Vbat(p) or the status of UV(p). The NAND output is provided to the gate of transistor142, turning it off. This NAND output is inverted188(‘0’) and provided to the gate of transistor144, turning it on. Thus Vsup=Vbat(r), which is desired because Vbat(r) is sufficient. UV(r)=‘0’ will also turn on load isolation switches62and64, setting Vload=Vbat(r). Thus, both critical loads75band non-critical loads75aare powered by Vbat(r).

If UV(r)=‘1’, indicating that the rechargeable battery36ris undervoltage (Vbat(r)<Vuv(r)), Vsup will be set to Vbat(p), but only if Vbat(p) is not undervoltage (Vbat(p)>Vuv(p)); else Vsup is set to Vbat(r), even if it is insufficient. This works as follows.

If UV(p)=‘0’, indicating that the primary battery36pis not undervoltage (Vbat(p)>Vuv(p)), both inputs to the NAND gate184are ‘1’ (after UV(p) is inverted186). The NAND gate184outputs a ‘0’, which turns transistor142on, and inverter188outputs a ‘1’, which turns transistor144off. Thus, Vsup=Vbat(p) to power the critical loads75b, which is desired because Vbat(p) is sufficient. UV(r)=‘1’ will also turn off load isolation switches62and64, decoupling the non-critical loads75afrom Vbat(r) (i.e., Vload=0).

If UV(p)=‘1’, indicating that the primary battery36pis undervoltage (Vbat(p)<Vuv(p)), inverter186inputs a ‘0’ to the NAND gate184, which will necessarily output a ‘1’, regardless of UV(r). The NAND output is provided to the gate of transistor142, turning it off, and its inverse is provided to the gate of transistor144, turning it on. Thus Vsup=Vbat(r) to power the critical loads75b, even if it is not currently as high as desired. UV(r)=‘1’ will also turn off load isolation switches62and64, decoupling the non-critical loads75afrom Vbat(r) (i.e., Vload=0), although because UV(r) is derived from Vbat(r), it may not be wholly reliable. The table inFIG. 7Asummarizes this operation.

The disclosed technique can be used in conjunction with other techniques addressing rechargeable battery depletion in an IMD, such as those disclosed in U.S. Provisional Patent Application Ser. Nos. 61/928,342 and 61/928,352, both filed Jan. 16, 2014, which are both incorporated herein by reference in their entireties.