Switching element and protection circuit using the same

Provided is a switching element including: first switching element primarily used for formation of a two-way current path; a second switching element that forms, at the time when the first switching element is turned off, a current path by switching a parasitic diode from another; and a third switching element. The second and third switching elements may be of smaller chip size because they allow a current to flow through them only while the current path of the first switching element is being switched. This contributes miniaturization of the switching element as well as reduction in the ON resistance. Moreover, adoption of the switching element to a protection circuit realizes miniaturization of the protection circuit.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a switching element and a protection circuit using the switching element. More specifically, the present invention relates to a switching element that can switch a current path in two directions and has a reduced chip size, and to a protection circuit using the switching element.

2. Description of the Related Art

As a switching element, a switching element that not only switches a device between ON and OFF but also switches the direction of a current path (the direction in which a current path flows) is also under development, and such a switching element is adopted, for example, to a protection circuit of a secondary battery.

As an example of a conventional two-way switching element,FIG. 5shows a circuit diagram of a protection circuit for a secondary battery.

A two-way switching element86has an overdischarge-prevention switching element82connected in series to an overcharge-prevention switching element83, and a control circuit84performs an ON-OFF control.

The control circuit84detects the battery voltage and switches the overcharging-prevention switching element83off at the time when the detected voltage is higher than the maximum set voltage, thereby preventing a secondary battery1from being overcharged. In addition, the control circuit84switches the overdischarge-prevention switching element82off at the time when the detected voltage is lower than the minimum set voltage, thereby preventing the secondary battery1from being overdischarged.

The overdischarge-prevention switching element82and the overcharge-prevention switching element83have a small internal resistance in their ON states, and are constituted of MOSFETs that can achieve reduced power loss and voltage drop. The MOSFETs have parasitic diodes and, therefore, even when the MOSFETs are in OFF state, a current path can be formed in a desired direction by use of the parasitic diodes.

Therefore, even when the battery voltage becomes higher than the maximum set voltage and thus the MOSFET of the overcharge-prevention switching element83is turned off, for instance, the secondary battery1can be discharged using the parasitic diodes.

Meanwhile, even when the battery voltage becomes lower than the minimum set voltage and thus the MOSFET of the overdischarge-prevention switching element82is turned off, the secondary battery1can be charged using the parasitic diodes.

The protection circuit85shown inFIG. 5operates in the manner described above and prevents the secondary battery1from being overcharged and overdischarged. This technology is described for instance in Japanese Patent Application Publication No. Hei. 10-12282 (page 7, FIG. 1).

As described above, in the conventional technologies, one of switching elements is set to as the overcharge-prevention switching element83for preventing the secondary battery from being overcharged, and the other one of the switching elements is set to as the overdischarge-prevention switching element82for preventing the secondary battery1from being overdischarged, thereby realizing the two-way switching element86. Such a two-way switching element86is obtained by connecting two switching elements (MOSFETs) of the same size in series, but it prevents miniaturization of size as well as progress in reduction of the manufacturing costs.

SUMMARY OF THE INVENTION

The present invention provides a switching device that includes a first switching element, a second switching element and a third switching element, each of the switching elements comprising a control terminal, a first power terminal, a second power terminal and a back gate, wherein the first power terminal of the second switching element is connected with the first power terminal of the first switching element, and the second power terminal of the second switching element is connected with the back gates of the first and second switching elements, and the first power terminal of third switching element is connected with the second power terminal of the first switching element, and the second power terminal of the third switching element is connected with the back gates of the first and third switching elements.

The present invention also provides a protection circuit for a secondary battery that includes a switching device comprising a first switching element, a second switching element and a third switching element, the first switching element being connected with the secondary battery in series, the second switching element being connected with the third switching element in series, and the connected second and third switching elements as a whole being connected with the first switching element in parallel, and a control device controlling the first, second and third switching elements so that the secondary battery is charged when a current flows in a first direction through the switching device and the secondary battery is discharged when a current flows in a second direction through the switching device.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

The embodiments of the present invention will be described in detail with reference toFIGS. 1 to 4.

FIGS. 1A and 1Bshow a first embodiment of the present invention.FIG. 1Ais a circuit diagram of a switching element, andFIG. 1Bis a schematic cross section of the switching element.

A switching element3of the first embodiment includes a first MOSFET5, a second MOSFET6and a third MOSFET7.

The drain (or source) of the second MOSFET6is connected to the drain (or source) of the first MOSFET5. Additionally, the source (or drain) of the second MOSFET6is connected to a back-gate68of the second MOSFET6and to a back-gate58of the first MOSFET5.

The source (or drain) of the third MOSFET7is connected to the source (or drain) of the first MOSFET5. Additionally, the drain (or source) of the third MOSFET7is connected to a back-gate78of the third MOSFET7and to the back-gate58of the first MOSFET5.

Referring toFIG. 1B, the structure of the switching element3will be described. It should be noted that sources are equivalent to drains in the present embodiments, and therefore may be replaced by drains in the following descriptions.

The first, second and third MOSFETs5,6and7are, for example, n-channel MOSFETs. In the first MOSFET5, an n(+)-type source52and an n(+)-type drain51are provided on a p(−)-type substrate that constitutes the back-gate58. Furthermore, a p(+)-type back-gate contact53is provided on the p(−)-type substrate for the purpose of reducing the contact resistance of the back-gate58.

The second MOSFET6is similar to the first MOSFET5. In the second MOSFET6, an n(+)-type source62and an n(+)-type drain61are provided on a p(−)-type substrate that constitutes the back-gate68. Furthermore, a p(+)-type back-gate contact63is provided on the p(−)-type substrate. The source62and the back-gate68(the back-gate contact63) are then shorted to each other, thereby connecting them to the back-gate58(the back-gate contact53) of the first MOSFET5.

In the third MOSFET7, an n(+)-type source72and an n(+)-type drain71are provided on a p(−)-type substrate that constitutes the back-gate78, and a p(+)-type back-gate contact73is also provided thereon. The drain71and the back-gate78(the back-gate contact73) are then shorted to each other, thereby connecting them to the back-gate58(the back-gate contact53) of the first MOSFET5.

In addition, the drain61of the second MOSFET6is connected to the drain51of the first MOSFET5, and the source72of the third MOSFET7is connected to the source52of the first MOSFET5.

In the first MOSFET5, parasitic diodes55and56are formed on the substrate depending on the operation state.

Meanwhile, the second MOSFET6is at the same potential when the back-gate68becomes shorted to the source62. Thus, only one parasitic diode65is formed in the second MOSFET6, and only one parasitic diode75is formed in the third MOSFET7for the same reason.

Control signals are applied to gates54,64and74respectively of the first, second and third MOSFETs5,6and7. In addition, different potentials are applied to the drain61of the second MOSFET6and to the source72of the third MOSFET7. Depending on the potential difference to be applied and signals to be applied to the gates54,64and74respectively of the first, second and third MOSFETs5,6and7, each of the parasitic diodes55,56and75is switched. In this way, a current path, formed between the drain61of the second MOSFET6and the source72of the third MOSFET7, can switch between two directions.

Next, a specific description will be provided for the operation of the switching element3with reference to the drawings.

At the first place, the switching element3is in normal ON state while the gate54of the first MOSFET5is turned on, and regardless of signals applied to the gates64and74respectively of the second and third MOSFETs6and7, a current flows between the source52and drain51of the first MOSFET5. For example, when the drain51of the first MOSFET5(the drain61of the second MOSFET6) has high potential (H) and the source52of the first MOSFET5(the source72of the third MOSFET7) has low potential (L), a current flows in the direction of an arrow “a” shown inFIG. 1B. Meanwhile, when the potential relationship between the drain51and the source52is reverse, a current flows in the direction of an arrow “b”. Thus, since the turning on of the first MOSFET5allows a current to flow in two directions, the second and third MOSFETs6and7may be switched on or off.

Next, a description will be provided for a case where the first MOSFET5is turned off. When a current path (direction in which a current flows) is intended to be switched by using the switching element3that switches a two-way current path, the first MOSFET5is turned off. Depending on the applications of the switch, it is sometimes necessary to allow a current to flow in either of two directions even during the switching period (period during which the first MOSFET5is turned off) in order to prevent full interruption of current. The switching element3of the present embodiment can form, even during the switching period, the current path in which a current flows in either of two directions.

For example, when the first MOSFET5is turned off, the switching element3turns on any of the second and third MOSFETs6and7, thereby forming the current path by use of the parasitic diodes of the OFF-state MOSFETs.

To be more specific, the first and third MOSFETs5and7are turned off, and the second MOSFET6is turned on. At this point, if the drain61of the second MOSFET6has high potential and the source72of the third MOSFET7has low potential, the current path shown by the arrow “a” is formed by use of the parasitic diode56of the first MOSFET5and the parasitic diode75of the third MOSFET7, both of which are in OFF state. Meanwhile, when the potential relationship between the drain61and the source72is reverse, a current never flows.

In addition, the first and second MOSFETs5and6are turned off and the third MOSFET7is turned on. At this point, if the source72of the third MOSFET7has high potential and the drain61of the second MOSFET6has low potential, the current path shown by the arrow “b” is formed by use of the parasitic diode55of the first MOSFET5and the parasitic diode65of the second MOSFET6, both of which are in OFF state. Meanwhile, when the potential relationship between the drain61and the source72is reverse, a current never flows.

As described above, when the first MOSFET5is turned off, any one of the second and third MOSFETs6and7is turned off, and a potential, applied to the terminals (source or drain) leading to the outside of the OFF-state MOSFETs, is set to be lower than that, which is applied to the terminals (source or drain) leading to the outside of the ON-state MOSFETs. In this way, the current path can be formed in which a current flows in two directions, by switching the parasitic diodes that operate on the OFF-state first MOSFET5and by using the parasitic diodes of any one of the second and third MOSFETs6and7that are in OFF state.

Here, the main switch in the embodiment is the first MOSFET5. That is, the first MOSFET5is generally in ON state, and a potential applied to the drain61of the second MOSFET6and the source72of the third MOSFET7is switched between low and high, whereby the two-way current path can be formed. When the direction of the current flow is changed from one direction to another, the first MOSFET5is turned off. During this off period of the main switch, i.e., the first MOSFET5, the second MOSFET6and the third MOSFET7operate to allow current conduction. For this reason, the on-resistance of these MOSFETs does not have to be significantly low.

Accordingly, the chip size of the second and third MOSFETs6and7can be sufficiently reduced compared to that of the first MOSFET5. For example, by reducing the chip size of the second and third MOSFETs6and7to less than half the chip size of the first MOSFET5, the switching element3can be smaller than the conventional two-way switching element86in which two MOSFETs with the same chip size are connected in series.

Alternatively, if the chip size of the conventional two-way switching element86is intended to be maintained, it is possible to increase the chip size of the first MOSFET5and thus to reduce the ON resistance of the switching element3.

Next, a second embodiment of the present invention will be described with reference toFIGS. 2A and 2B.FIG. 2Ais a circuit diagram of a switching element3, andFIG. 2Bis schematic cross section showing the structure of the switching element3.

As shown inFIGS. 2A and 2B, the second embodiment is one where an AND gate circuit11is connected to the switching element3of the first embodiment.

In the switching element3shown inFIG. 1, one of the two switches, i.e., the second and third MOSFETs6and7, has to be switched off when a first MOSFET5is turned off. For this reason, by connecting the AND gate circuit11to the switching element3, gates54,64and74of the MOSFETs can be simultaneously controlled by two input signals (control signals).

To be more specific, as shown inFIGS. 2A and 2B, first and second control terminals9and10, constituting the input of the AND gate circuit11, are connected to the gate64of the second MOSFET6and the gate74of the third MOSFET7, respectively. The output of the AND gate circuit11is connected to the gate54of the first MOSFET5.

The AND gate circuit11performs a logical operation for the two input signals (control signals) and outputs the result to the first MOSFET5, constituting a circuit for turning off the gate54and turning off any one of the gates64and74by means of the two input signals of the AND gate circuit11.

To be more specific, when both the first and second control terminals9and10are in “H” level, the first, second and third MOSFETs5,6and7are all turned on, and thereby a current path is formed in accordance with the potentials of drain61and source72.

In addition, when the first control terminal9is in “H” level and the second control terminal10is in “L” level, the second MOSFET6is turned on and the first and third MOSFETs5and7are turned off. Accordingly, the current path shown by the arrow “a” is formed when the drain61has high potential (H) and the source72has low potential (L).

Furthermore, when the first control terminal9is in “L” level and the second control terminal10is in “H” level, the third MOSFET7is turned on and the first and second MOSFETs5and6are turned off. Accordingly, the current path shown by the arrow “b” is formed when the drain61has low potential (L) and the source72has high potential (H).

Note that, when both the first and second control terminals9and10are in “L” level, the first, second and third MOSFETs5,6and7are all turned off. Thus, no current paths shown by the arrows “a” and “b” are formed.

The use of the AND gate circuit11in this way can reduce the number of terminals to 2, which was 3 in the switching element3of the first embodiment. It should be noted that other components are similar to those in the first embodiment, and therefore their descriptions are omitted here.

FIGS. 3 and 4show a third embodiment of the present invention, where the switching element described above is used for a protection circuit.

FIG. 3is a circuit diagram showing a protection circuit, where a protection circuit of a secondary battery is described by way of example.

A protection circuit2is connected in series to a secondary battery1, and includes a switching element3, an AND gate circuit11and a control circuit4. Here, by way of example, the protection circuit2has such a configuration in which the switching element3of the first embodiment is connected to the AND gate circuit11.

The switching element3is constituted of a first MOSFET5, a second MOSFET6and a third MOSFET7. Note that, details of these MOSFETs are similar to those in the first and second embodiments, and therefore their descriptions are omitted.

The first MOSFET5is connected in series to the secondary battery1and prevents the secondary battery1from being overcharged or overdischarged. The second MOSFET6is configured in such a way that when the secondary battery1is overcharged, it allows a current to flow in the direction in which the secondary battery1discharges by use of one of the two parasitic diodes55and56incorporated in the first MOSFET5. The third MOSFET7is configured in such a way that when the secondary battery1is overdischarged, it allows a current to flow in the direction in which the secondary battery1charges by use of another one of parasitic diodes55and56incorporated in the first MOSFET5.

The control circuit4includes a first control terminal9for controlling the ON/OFF state of the second MOSFET6, and a second control terminal10for controlling the ON/OFF state of the third MOSFET7.

The AND gate circuit11performs logical operations for the outputs of the first and second control terminals9and10that are provided to the control circuit4, and outputs the result to the first MOSFET5.

The control circuit4switches the MOSFETs5,6and7on if the battery voltage is in a range between the minimum set voltage and the maximum set voltage, allowing a current to flow in the directions in which the secondary battery1charges and discharges.

Although a detailed description will be provided later, when the battery voltage becomes higher than the maximum set voltage, the control circuit4switches the first MOSFET5off. At this time, the control circuit4switches the second MOSFET6off based on the output from the first control terminal9, and switches the third MOSFET7on based on the output from the second control terminal10, thereby allowing a current to flow in the direction in which the secondary battery1discharges.

When the battery voltage is lower than the minimum set voltage, the control circuit4switches the first MOSFET5off. At this time, the control circuit4switches the second MOSFET6on based on the output from the first control terminal9, and switches the third MOSFET7off based on the output from the second control terminal10, thereby allowing a current to flow in the direction in which the secondary battery1charges. Note that, detailed descriptions thereof will be provided later.

FIG. 4is a schematic cross section showing the structure of the protection circuit2. The protection circuit2is similar to those in the first and second embodiments, with exception that the control circuit4for applying control signals to the AND gate circuit11is connected thereto. For this reason, descriptions for overlapped portions are omitted.

A gate64of the second MOSFET6is controlled by the output of the first control terminal9. A gate74of the third MOSFET7is controlled by the output of the second control terminal10. A gate54of the first MOSFET5is controlled by the outputs of the first and second control terminals9and10via the AND gate circuit11.

In addition, the parasitic diodes55and56incorporated in the first MOSFET5are switched by the parasitic diodes65and75that operate by switching the second and third MOSFETs6and7between ON and OFF. Thus, when the first MOSFET5is turned off, one of the following current paths are formed: the current path where a current flows in the charge direction, and the current path where a current flows in the discharge direction.

The control circuit4provided to the protection circuit2operates in the manner described below to control the switching element (overcharge/overdischarge-prevention switch)3, and prevents the secondary battery1from being overcharged and overdischarged.

[When the Secondary Battery is Discharged]

Since the current path is formed in the direction in which the secondary battery1discharges, a source72has high potential (H) and a drain61has low potential (L).

(When the Battery Voltage Becomes Higher than the Maximum Set Voltage)

The first control terminal9outputs “L” and switches the first MOSFET5off. At this time, the second control terminal10outputs “H” and switches the third MOSFET7on. Since the source72and the drain61are in “H” level and “L” level, respectively, a current is allowed to flow in the parasitic diode55incorporated in the first MOSFET5, forming the current path in the direction in which the secondary battery1discharges. On the other hand, a current never flows in the direction in which the secondary battery1charges.

To be more specific, a current that flows in the direction in which the secondary battery1discharges flows from the third MOSFET7toward a back-gate58of the first MOSFET5and a back-gate68of the second MOSFET6. The current continues to flow via the parasitic diodes55and65.

(When the Battery Voltage is Between the Minimum Set Voltage and the Maximum Set Voltage)

The first and second control terminals9and10output “H” and switch the first, second and third MOSFETs5,6and7on. At this time, a current flows mainly via the first MOSFET5. A current also flows in the second and third MOSFETs6and7. Since the source72is in “H” level and the drain61is in “L” level, the current path is formed in the direction in which the secondary battery discharges.

(When the Battery Voltage Becomes Lower than the Minimum Set Voltage)

If the battery voltage becomes lower than the minimum set voltage when the secondary battery1is discharged, the current path in the discharge direction is interrupted in order to prevent the secondary battery1from being overdischarged. In this case, however, the secondary battery1needs to be charged and accordingly, the current path is switched in the charge direction. That is, the source72is set to have low potential (L) and the drain61is set to have high potential (H).

The second control terminal10outputs “L” and switches the first and third MOSFETs5and7off. At this time, the first control terminal9outputs “H” and switches the second MOSFET6on. Since the source72and the drain61are in “L” level and “H” level, respectively, a current is allowed to flow in the parasitic diode56incorporated in the first MOSFET5, forming the current path in the direction in which the secondary battery1charges. On the other hand, a current never flows in the direction in which the secondary battery1discharges.

To be more specific, a current that flows in the direction in which the secondary battery1charges flows from the second MOSFET6toward the back-gate58of the first MOSFET5and a back-gate78of the third MOSFET7. The current continues to flow via the parasitic diodes56and75.

[When the Secondary Battery is Charged]

Since the current path is formed in the direction in which the secondary battery1charges, the source72has lower potential (L) and the drain61has high potential (H).

(When the Battery Voltage is Lower than the Minimum Set Voltage)

The second control terminal10outputs “L” and switches the first and third MOSFETs5and7off. At this time, the first control terminal9outputs “H” and switches the second MOSFET6on. Since the source72and the drain61are in “L” level and “H” level, respectively, a current is allowed to flow in the parasitic diode56incorporated in the first MOSFET5, forming the current path in the direction in which the secondary battery1charges. On the other hand, a current never flows in the direction in which the secondary battery1discharges.

To be more specific, a current that flows in the direction in which the secondary battery1charges flows from the second MOSFET6toward the back-gate58of the first MOSFET5and the back-gate78of the third MOSFET7. The current continues to flow via the parasitic diodes56and75.

(When the Battery Voltage is Between the Minimum Set Voltage and the Maximum Set Voltage)

The first and second control terminals9and10output “H” and turns on the first, second and third MOSFETs5,6and7. At this time, although a current flows mainly via the first MOSFET5, a current also flows in the second and third MOSFETs6and7. Since the source72is in “L” level and the drain61is in “H” level, the current path is formed in the direction in which the secondary battery1charges.

(When the Battery Voltage Becomes Higher than the Maximum Set Voltage)

If the battery voltage becomes higher than the maximum set voltage when the secondary battery1is charged, the current path in the charge direction is interrupted in order to prevent the secondary battery1from being overcharged. In this case, however, the secondary battery1needs to be discharged and accordingly, the current path is switched in the discharge direction. That is, the source72is set to have high potential (H) and the drain61is set to have low potential (L).

The first control terminal9outputs “L” and switches the first and second MOSFETs5and6off. At this time, the second control terminal10outputs “H” and switches the third MOSFET7on. Since the source72and the drain61are in “H” level and “L” level, respectively, a current is allowed to flow in the parasitic diode55incorporated in the first MOSFET5, forming the current path in the direction in which the secondary battery1discharges. On the other hand, a current never flows in the direction in which the secondary battery1charges.

To be more specific, a current that flows in the direction in which the secondary battery1discharges flows from the third MOSFET7toward the back-gate58of the first MOSFET5and the back-gate68of the second MOSFET6. The current continues to flow via the parasitic diodes55and65.

In the second and third MOSFETs6and7, a current mainly flows while the secondary battery1is attempting to return to the normal state from the overcharged state or overdischarged state. For this reason, there in not much need to consider the ON resistance as in the first MOSFET5where a current flows mainly in the normal state.

Thus, the size of the second and third MOSFETs6and7can be sufficiently smaller than the first MOSFET5. For example, if the size of the second and third MOSFETs6and7is less than half the size of the first MOSFET5, the chip size can be smaller than that of the conventional two-way switching element86.

In some cases, the protection circuit2performs control operations by detecting the resistance (ON resistance) of the switching element3. Therefore, it is sometimes desirable for the switching element3to have a design that allows it to maintain a predetermined ON resistance value. Specifically, when the conventional ON resistance is maintained, it is possible to reduce the chip size to about ¼, according to the present embodiment.

A detailed description thereof will be provided below. For example, the ON resistance and size of the conventional MOSFETs82and83(shown inFIG. 5) are assumed to be 20 mΩ and 2 mm2, respectively, which in turn means that the conventional two-way switching element86has an ON resistance of 40 mΩ and a chip size (occupied area) of 4 mm2.

Meanwhile, since it is possible to sufficiently minimize the chip size of the second and third MOSFETs6and7in the third embodiment, when the conventional ON resistance (40 mΩ) is maintained, the chip size of the switching element3can be reduced as small as 1 mm2. That is, the chip size of the switching element3can be reduced to about ¼.

It should be noted that the protection device of the third embodiment has been described by taking a protection device provided with the AND gate circuit11as an example. The switching element3can reduce the number of the input terminals thereof to 2 by using the AND gate circuit11. For example, the two-way switching element86in a conventional control IC87has two control terminals, providing an advantage that the use of the AND gate circuit11eliminates the need to change the number of terminals for implementation of the third embodiment.

Meanwhile, the third embodiment can be similarly implemented even when the AND gate circuit11is not provided and thus the switching element3in the first embodiment is controlled by the control circuit4. The elimination of the need for the AND gate circuit11contributes to miniaturization of the switching element3and to the reduction in the number of components.

It should be noted that although a lateral n-channel MOSFET is used for the MOSFETs5,6and7provided in the switching element3and the protection circuit2, MOSFETs are not limited to this. A p-channel MOSFET may be used, and similar effects can also be obtained when a vertical MOSFET is used. In addition, the switching element3of the embodiments may be applicable as a line switch in a two-way switching system.

According to the embodiments of the present invention, the two parasitic diodes of the first switching element can be switched by the second and third switching elements. It is sufficient for the second and third switching elements to switch the current path in two directions, and they may be of smaller chip size than the first switching element. For this reason, it is possible to provide a two-way switching element that is much smaller than the conventional two-way switching element.

In addition, the AND gate circuit is provided, the input of the AND gate circuit is connected to the control terminals respectively of the second and third switching elements, and the output of the AND gate circuit is connected to the control terminal of the first switching element. Thus, the switching element can operate using two control signals.

This provides an advantage that a control circuit, controlling the conventional two-way switching element, can be utilized without changing the number of its output terminals, for example.

Moreover, adoption of the switching element described above to a protection circuit for secondary batteries significantly reduces the size of switching elements for preventing a secondary battery from being overcharged and overdischarged, thereby achieving reduced manufacturing costs.

The protection circuit performs control operations by detecting the resistance value (ON resistance) of the switching element in some cases, and therefore, it is sometimes desirable for the switching element to have a design that allows it to maintain a predetermined ON resistance value. Specifically, when the predetermined ON resistance is maintained, it is possible to reduce the chip size to about ¼ the chip size of the two-way switching element used in the conventional protection circuit, according to the present embodiment.

Furthermore, the following advantage is provided: that is, the control circuit used in the conventional protection circuit can be utilized without changing the number of its output terminals.