Manufacturing method of semiconductor device and semiconductor device

According to one embodiment, a manufacturing method of a semiconductor device attained as follows. A dielectric layer having a first opening and a second opening reaching an electrode terminal is formed by modifying a photosensitive resin film on a substrate on which the electrode terminal of a first conductive layer is provided. Next, a second conductive layer that is electrically connected to the electrode terminal is formed on the dielectric layer that includes inside of the first opening, and a third conductive layer that has an oxidation-reduction potential of which difference from the oxidation-reduction potential of the first conductive layer is smaller than a difference of the oxidation-reduction potential between the first conductive layer and the second conductive layer is formed on the second conductive layer. Next, a dielectric layer having a third opening reaching the third conductive layer and a fourth opening reaching the electrode terminal via the second opening is formed by modifying a photosensitive resin film, and a bump that is electrically connected to the third conductive layer is formed.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2009-178179, filed on Jul. 30, 2009 and 2010-143085, filed on Jun. 23, 2010; the entire contents all of which are incorporated herein by reference.

FIELD

Embodiments described herein relate generally to a manufacturing method of a semiconductor device and a semiconductor device.

BACKGROUND

In recent years, there is a demand for improvement in a device operation speed and increase in memory capacity for achieving high integration and high performance of a semiconductor device. Recently, a COC (Chip on Chip) device, in which a logic chip and a large-capacity DRAM are stacked, is also developed instead of an eDRAM (Embedded Dynamic Random Access Memory) chip.

In the COC device, in one chip, two types of terminals, i.e., a terminal (hereinafter, first terminal) for connection to the other chip and a terminal (hereinafter, second terminal) for connection to the outside are required in some cases. Moreover, the first terminal and the second terminal are required to be formed into different shapes appropriate for each of them. Specifically, the first terminal is required to form a bump to have sufficient height. The second terminal is required to use an electrode pad formed in a chip. In forming such two types of terminals, the terminals are formed by using, for example, a redistribution technology, for example, in Japanese Patent Application Laid-open No. 2008-84962.

In Japanese Patent Application Laid-open No. 2008-84962, a tip side of a redistribution is patterned into a pad shape to be a connection terminal portion. Then, especially, this connection terminal portion is plated on its surface with nickel (Ni) and gold (Au), so that an electrical contactability and a bondability in wire bonding can be improved. In other words, Japanese Patent Application Laid-open No. 2008-84962 discloses that a laminated structure of nickel (Ni) and gold (Au) is applied only to the surface layer of the second terminal. However, Japanese Patent Application Laid-open No. 2008-84962 does not disclose a specific process of forming this structure selectively on the second terminal.

DETAILED DESCRIPTION

In general, according to one embodiment, a manufacturing method of a semiconductor device attained as follows. A dielectric layer having a first opening and a second opening reaching an electrode terminal is formed by modifying a photosensitive resin film on a substrate on which the electrode terminal of a first conductive layer is provided. Next, a second conductive layer that is electrically connected to the electrode terminal is formed on the dielectric layer that includes inside of the first opening, and a third conductive layer that has an oxidation-reduction potential of which difference from the oxidation-reduction potential of the first conductive layer is smaller than a difference of the oxidation-reduction potential between the first conductive layer and the second conductive layer is formed on the second conductive layer. Next, a dielectric layer having a third opening reaching the third conductive layer and a fourth opening reaching the electrode terminal via the second opening is formed by modifying a photosensitive resin film, and a bump that is electrically connected to the third conductive layer is formed.

Exemplary embodiments of a manufacturing method of a semiconductor device and a semiconductor device will be explained below in detail with reference to the accompanying drawings. The present invention is not limited to the following embodiments. In the following drawings, the scale of each component may be different from the actual one for easy understanding.

First Embodiment

FIG. 1AtoFIG. 1Nare cross-sectional views schematically explaining a manufacturing method of a semiconductor device according to the first embodiment. First, a semiconductor wafer (substrate) used in the present embodiment is explained. As shown inFIG. 1A, on a surface of a semiconductor substrate W1(hereinafter, simply “wafer W1”) in which an LSI (Large Scale Integrated Circuit (not shown)) is formed on a semiconductor such as silicon, an electrode pad11as an electrode terminal of the LSI is formed. The material constituting the electrode pad11, for example, includes aluminum (Al). In the present embodiment, the case is explained in which the electrode pad11comprises aluminum (Al), however, it goes without saying that, as aluminum (Al) in this example, an aluminum (Al) alloy in which aluminum (Al) is the main component, such as aluminum (Al)-copper (Cu) and aluminum (Al)-copper (Cu)-silicon (Si), used in a typical semiconductor device can be used. The following processes are performed using the wafer W1on which such the electrode pad11is formed.

First, as shown inFIG. 1B, a passivation film12having openings13aand13bat predetermined positions on the electrode pad11is formed on the entire surface of the wafer W1. The material constituting the passivation film12, for example, includes silicon nitride (SiN). In the present embodiment, the case is explained in which the passivation film12comprises silicon nitride (SiN).

A forming method of the passivation film12is explained. First, a silicon nitride film (SiN film) to be the passivation film12is formed on the entire surface of the wafer W1. Moreover, a resist pattern having openings at the predetermined positions (positions corresponding to the openings13aand13b) on the electrode pad11is formed on the silicon nitride film (SiN film), the passivation film12having the openings13aand13bat the predetermined positions on the electrode pad11is formed by an etching technique by using this resist pattern as a mask, and thereafter the resist pattern is removed.

Next, as shown inFIG. 1C, a first dielectric layer14having the openings13aand13bat the predetermined positions on the electrode pad11is formed on the entire surface of the wafer W1. As the material constituting the first dielectric layer14, for example, a polyimide resin, an epoxy resin, or a photosensitive resin such as resin obtained by sensitizing a silicone resin is used. In the present embodiment, the case is explained in which the first dielectric layer14comprises a photosensitive polyimide resin.

A forming method of the first dielectric layer14is explained. First, a photosensitive polyimide film is formed on the entire surface of the wafer W1. Next, the predetermined positions (positions corresponding to the openings13aand13b) on the electrode pad11are exposed by using a photolithography technique. Next, development is performed by using, for example, a strong alkaline solution as a developer to form the openings13aand13breaching the electrode pad11at the predetermined positions on the electrode pad11.

Then, baking is performed to modify the photosensitive polyimide film into the first dielectric layer14. Whereby, the first dielectric layer14is formed, which has the openings13aand13breaching the electrode pad11at the predetermined positions on the electrode pad11. The first dielectric layer14is in a state where further patterning cannot be performed by being subjected to the baking. Moreover, the photosensitive polyimide film can be a positive type or a negative type.

Next, as shown inFIG. 1D, a metal layer15is formed on the entire surface of the wafer W1by using the sputtering method, the CVD method, the ALD method, or the like. The Metal layer15functions as a current-carrying layer in an electrolytic plating process of copper that is a process to be described later. In the passivation film12and the first dielectric layer14, the openings13aand13breaching the electrode pad11are formed at a portion on the electrode pad11. Therefore, the Metal layer15is in contact with the electrode pad11at the portion on the electrode pad11.

The material constituting the Metal layer15, for example, includes a copper (Cu) based material. The Metal layer15can have a multilayer structure, and in the present embodiment, explanation is given for the case where the Metal layer15is configured to have a laminated structure of titanium (Ti)/copper (Cu). Titanium (Ti) in the Metal layer15is used to suppress diffusion between the electrode pad11and a redistribution layer17to be described later and improve adhesion therebetween.

After forming the Metal layer15, a resist pattern16as a mask layer having an opening13cis formed on the Metal layer15as shown inFIG. 1Dby a typical lithography process of resist application, exposure, and development. This opening13cis formed in a wiring pattern shape at a position at which a redistribution and a desired circuit are formed and the opening13ais included. In other words, the resist pattern16is formed to have a predetermined pattern opening for forming the redistribution and the desired circuit.

After forming the resist pattern16on the Metal layer15, for example, copper (Cu) is deposited on the Metal layer15in the opening13cby an electrolytic plating method to form the redistribution layer17comprising copper (Cu) in the opening13cas shown inFIG. 1E. This redistribution layer17is electrically connected to the electrode pad11via the Metal layer15. Next, as shown inFIG. 1E, for example, nickel (Ni) is deposited as a conductive protective layer18on the redistribution layer17by the electrolytic plating method to form the conductive protective layer18comprising nickel (Ni) on the uppermost layer of the redistribution layer17comprising copper (Cu).

Thereafter, as shown inFIG. 1F, the resist pattern16is removed by using chemicals such as resist stripper. Then, as shown inFIG. 1G, the wet etching is performed with the conductive protective layer18and the redistribution layer17as an etching mask to remove the Metal layer15other than a portion covered with the redistribution layer17and the conductive protective layer18. The reason to remove the Metal layer15in this process is that the photosensitive resin formed on the first dielectric layer14in the next process is modified to be directly used as a dielectric layer together with the first dielectric layer14. In other words, if unnecessary Metal layer15is not removed at this stage, after the photosensitive resin is formed on the first dielectric layer14, the Metal layer15between the first dielectric layer14and the photosensitive resin cannot be removed.

Next, as shown inFIG. 1H, a second dielectric layer19is formed on the entire surface of the wafer W1, which has an opening13dat a predetermined position on the conductive protective layer18and an opening13eat a predetermined position (position same as the opening13b) on the electrode pad11. In other words, the second dielectric layer19is formed on the first dielectric layer14and the conductive protective layer18in a state of having the opening13dand the opening13e.

As the material constituting the second dielectric layer19, for example, a polyimide resin, an epoxy resin, or a photosensitive resin such as resin obtained by sensitizing a silicone resin is used. In the present embodiment, the case is explained in which the second dielectric layer19comprises photosensitive polyimide. The same material is used for the first dielectric layer14and the second dielectric layer19in this example, however, different materials can be used for the first dielectric layer14and the second dielectric layer19.

A forming method of the second dielectric layer19is explained. First, a photosensitive polyimide film is formed on the entire surface of the wafer W1. Next, the predetermined position on the conductive protective layer18and the predetermined position (position corresponding to the opening13b) on the electrode pad11are exposed by using the photolithography technique. Next, development is performed by using, for example, a strong alkaline solution as the developer to form the opening13dreaching the conductive protective layer18at the predetermined position on the conductive protective layer18. Moreover, development is performed to form the opening13ereaching the electrode pad11via the opening13b.

Then, baking is performed to modify the photosensitive polyimide film into the second dielectric layer19. Whereby, the second dielectric layer19is formed, which has the opening13dreaching the conductive protective layer18at the predetermined position on the conductive protective layer18to be an internal connection terminal20and the opening13ereaching the electrode pad11via the opening13bat the position corresponding to an external connection terminal21. The second dielectric layer19is in a state where further patterning cannot be performed by being subjected to the baking. Moreover, the photosensitive polyimide film can be a positive type or a negative type.

The internal connection terminal20in this example is a terminal formed by exposing the conductive protective layer18from the second dielectric layer19. A solder bump to be described later is formed on this internal connection terminal20. The external connection terminal21is a terminal formed by exposing the electrode pad11from the second dielectric layer19and the first dielectric layer14. This external connection terminal21is a bonding pad for wire bonding for connecting to the outside, and is a terminal for supplying power, a signal, and the like from outside of the semiconductor device by being subjected to bonding with gold (Au) wires or the like.

In the present embodiment, in a state where the conductive protective layer18comprising nickel (Ni) is laminated to the redistribution layer17comprising copper (Cu), development of the photosensitive polyimide film to be the second dielectric layer19is performed by using a strong alkaline solution as the developer. In other words, at the development, the redistribution layer17comprising copper (Cu) is not exposed because the redistribution layer17is covered with the conductive protective layer18comprising nickel (Ni), and development of the photosensitive polyimide film by the strong alkaline solution is performed in a state where the conductive protective layer18is exposed to the surface.

On the other hand,FIG. 2is a cross-sectional view schematically explaining a manufacturing method of a semiconductor device of a comparison example.FIG. 2illustrates the state where the conductive protective layer18comprising nickel (Ni) is not laminated to the redistribution layer17comprising copper (Cu) and the redistribution layer17comprising copper (Cu) is exposed. When development of the photosensitive polyimide film by the strong alkaline solution is performed in this state, the redistribution layer17comprising copper (Cu) that is exposed from the opening13dand the electrode pad11comprising aluminum (Al) that is exposed from the opening13eare in the state of being present in the strong alkaline solution. In other words, two types of dissimilar metals (corresponding to anode and cathode) of copper (Cu) and aluminum (Al) having different ionization tendencies and largely different oxidation-reduction potentials are present in the strong alkaline solution. The oxidation-reduction potential of aluminum (Al) is −1.676 V and the oxidation-reduction potential of copper (Cu) is 0.340 V, so that the difference of the oxidation-reduction potential between both of them is about 2 V.

Then, a cell effect (electrolysis) occurs in the developer at the development of the photosensitive polyimide film, and gas such as hydrogen (H2) gas and oxygen (O2) gas is generated in the developer due to the potential difference between copper (Cu) and aluminum (Al). This gas is generated in a peripheral portion of the openings13dand13efrom which the redistribution layer17and the electrode pad11are exposed. Therefore, a problem may occur that the photosensitive polyimide film on the first dielectric layer14is separated from the first dielectric layer14due to generation of this gas. This is a problem that does not occur, for example, when the opening is formed by performing resist application, exposure, and development on the redistribution layer17in a state where the electrode pad11comprising aluminum (Al) is covered with the current-carrying layer comprising a copper (Cu) based material, and this separated state of the photosensitive polyimide film remains even after the photosensitive polyimide film is modified into the second dielectric layer19, thereby causing degradation of reliability of the semiconductor device.

However, in the present embodiment, the conductive protective layer18comprising nickel (Ni) is laminated to the redistribution layer17comprising copper (Cu), and development of the photosensitive polyimide film is performed in a state where two types of dissimilar metals (corresponding to anode and cathode) of nickel (Ni) of the conductive protective layer18and aluminum (Al) of the electrode pad11are present in the strong alkaline solution. The oxidation-reduction potential of aluminum (Al) is −1.676 V and the oxidation-reduction potential of nickel (Ni) is −0.257 V, so that the difference of the oxidation-reduction potential between both of them is about 1.4 V. In other words, the potential difference between the two types of dissimilar metals present in the strong alkaline solution is reduced significantly compared with the case of the configuration shown inFIG. 2.

Whereby, the cell effect (electrolysis) at the development of the photosensitive polyimide film due to the potential difference between two types of dissimilar metals present in the developer is suppressed significantly and the amount of gas to be generated, such as hydrogen (H2) gas, can be reduced significantly. Therefore, it is prevented that the photosensitive polyimide film (the second dielectric layer19) is separated from the first dielectric layer14or the like due to generation of this gas and thus degradation of reliability of the semiconductor device can be prevented.

In the present embodiment, nickel (Ni) is used for the conductive protective layer18, however, the material used for the conductive protective layer18is not limited to nickel (Ni). As the conductive protective layer18, a metal material having the oxidation-reduction potential of which difference from the oxidation-reduction potential of aluminum (Al) is smaller than the difference of the oxidation-reduction potential between aluminum (Al) and copper (Cu) can be used. When the metal material satisfying such a condition is used for the conductive protective layer18, the cell effect (electrolysis) at the development of the photosensitive polyimide film due to the potential difference between two types of dissimilar metals present in the developer is suppressed significantly compared with the case where the conductive protective layer18is not provided, and therefore the amount of gas to be generated, such as hydrogen (H2) gas, can be reduced significantly. Whereby, it is prevented that the photosensitive polyimide film on the first dielectric layer14is separated from the first dielectric layer14or the like due to generation of this gas and thus degradation of reliability of the semiconductor device can be prevented.

Such a metal material, for example, includes manganese (Mn), tantalum (Ta), zinc (Zn), chrome (Cr), cobalt (Co), tin (Sn), and lead (Pb) in addition to nickel (Ni).

In a semiconductor device disclosed in Japanese Patent Application Laid-open No. 2008-84962, a configuration is disclosed in which a laminated structure of nickel (Ni)/gold (Au) is provided on a surface of a connection terminal portion. However, gold (Au) is provided on the surface layer of the connection terminal portion in this configuration, so that provision of nickel (Ni) on a lower layer of gold (Au) have no meaning to the above described suppression of gas generation at the development of the photosensitive polyimide film due to the potential difference between two types of dissimilar metals present in the developer.

Next, as shown inFIG. 1I, an under bump metal (UBM) layer22is formed on the entire surface of the wafer W1by using the sputtering method, the CVD method, the ALD method, or the like. The UBM layer22functions as the current-carrying layer in a plating process of the solder bump that is a process to be described later. In the second dielectric layer19, the opening13dreaching the conductive protective layer18is formed at a portion on the conductive protective layer18. Therefore, the UBM layer22is in contact with the conductive protective layer18at the portion on the conductive protective layer18. Moreover, in the first dielectric layer14and the second dielectric layer19, the opening13eis formed at a portion on the electrode pad11, so that the UBM layer22is in contact with the electrode pad11at the portion on the electrode pad11.

The material constituting the UBM layer22, for example, includes a Ti based material, such as titanium (Ti) and titanium tungsten (TiW). In the present embodiment, explanation is given for the case where the UBM layer22comprises a titanium (Ti) film. The UBM layer22can have a multilayer structure.

After forming the UBM layer22, a resist pattern23as a mask layer having an opening13fis formed on the UBM layer22as shown inFIG. 1Jby a typical lithography process of resist application, exposure, and development. This opening13fis formed at a position at which the solder bump is formed and the opening13dis included. This opening13fis used as an opening for forming the solder bump.

After forming the resist pattern23on the UBM layer22, as shown inFIG. 1K, for example, nickel (Ni) film is formed in the opening13fas a barrier metal layer24for the solder bump by the plating method, and then, for example, a copper (Cu) film25and a tin (Sn) film26are formed in this order in the opening13fas a solder plating film27for the solder bump by the electrolytic plating method. The barrier metal layer24suppresses diffusion of tin (Sn) included in a solder bump28to be described later.

Thereafter, as shown inFIG. 1L, the resist pattern23is removed by using chemicals such as resist stripper. Then, as shown inFIG. 1M, the wet etching is performed with the solder plating film27as an etching mask to remove the UBM layer22other than a portion covered with the solder plating film27.

Thereafter, a reflow process is performed by using flux to melt and solidify the solder plating film27to be molded in a round shape. At this time, it is applicable that the barrier metal layer24is dissolved in the solder plating film27. Whereby, as shown inFIG. 1N, a first semiconductor chip10is obtained in which the solder bump28is formed on the redistribution layer17(on the barrier metal layer24) to form an external connection terminal29. The processes as described above are performed, so that it is prevented that the second dielectric layer19is separated from the first dielectric layer14due to generation of gas during a manufacturing process and thus the semiconductor device with excellent reliability can be manufactured.

FIG. 3is a cross-sectional view schematically explaining a configuration of a chip-stack semiconductor device (COC device) in which the semiconductor device in the present embodiment is used.FIG. 3schematically illustrates the configuration of the chip-stack semiconductor device in which the above described first semiconductor chip10and a second semiconductor chip40as another electronic component are stacked by using a COC method. The second semiconductor chip40includes an electrode pad41as an electrode terminal of the LSI on a surface of a semiconductor substrate W2in which, for example, the LSI (Large Scale Integrated Circuit (not shown)) is formed on a semiconductor such as silicon. The electrode pad41, for example, comprises aluminum (Al). The electric component that is stacked with the above first semiconductor chip10is not limited to the semiconductor chip and can be, for example, a chip of a passive element.

The electrode pad41is covered with a dielectric layer42in a state where part of a connection area is open, and the connection area functions as the external connection terminal. Then, as shown inFIG. 3, the solder bump28is connected to this external connection terminal via a barrier metal layer43, so that the first semiconductor chip10and the second semiconductor chip40are electrically connected. As the barrier metal layer43, for example, a nickel (Ni) film is used. A gap between the first semiconductor chip10and the second semiconductor chip40is sealed with a seal resin51. The external connection terminal of the second semiconductor chip40can be configured to have the solder bump.

Supply of power, a signal, and the like between the first semiconductor chip10and the second semiconductor chip40is performed through the redistribution layer17and the solder bump28included in the first semiconductor chip10and the electrode pad41included in the second semiconductor chip40.

Moreover, on the external connection terminal21included in the first semiconductor chip10, bonding by gold (Au) wires or the like is performed (not shown). Then, supply of power, a signal, and the like from the outside of the semiconductor device to the first semiconductor chip10is performed through the gold (Au) wires or the like connected on the external connection terminal21.

In such a chip-stack semiconductor device, it is prevented that the second dielectric layer19is separated from the first dielectric layer14due to generation of gas during the manufacturing process of the first semiconductor chip10and thus the chip-stack semiconductor device with excellent reliability can be realized.

As described above, in the semiconductor device according to the present embodiment, the conductive protective layer18comprising nickel (Ni) is provided on the redistribution layer17comprising copper (Cu). Therefore, separation of the second dielectric layer19from the first dielectric layer14at the time of forming the second dielectric layer19is prevented and thus the semiconductor device with excellent reliability can be realized.

Moreover, as described above, in the manufacturing method of the semiconductor device according to the present embodiment, the conductive protective layer18comprising nickel (Ni) is laminated to the redistribution layer17comprising copper (Cu). In other words, the difference of the oxidation-reduction potential between two types of dissimilar metals present in the developer at the development of the photosensitive polyimide film to be the second dielectric layer19becomes smaller than the difference of the oxidation-reduction potential between aluminum (Al) of the electrode pad11and copper (Cu) of the redistribution layer17. Therefore, the cell effect (electrolysis) due to the potential difference between two types of dissimilar metals present in the developer is suppressed significantly and thus the amount of gas to be generated, such as hydrogen (H2) gas and oxygen (O2) gas, at the development of the photosensitive polyimide film can be reduced significantly. Whereby, it is prevented that the photosensitive polyimide film to be the second dielectric layer19is separated from the first dielectric layer14due to generation of gas and thus the semiconductor device with excellent reliability can be manufactured.

In the above present embodiment, the case is explained as an example in which the electrode pad11comprises aluminum (Al) and the redistribution layer17comprises copper (Cu) in the first semiconductor chip10, however, the present invention is not limited to this combination. In other words, a constituent material of the electrode pad11and a constituent material of the redistribution layer17in the first semiconductor chip10can be arbitrary changed. The metal material of the conductive protective layer18laminated to the redistribution layer17is selected so that the difference of the oxidation-reduction potential from the electrode pad11becomes small, for example, becomes smaller than the difference of the oxidation-reduction potential between aluminum (Al) and copper (Cu), whereby it is prevented that the second dielectric layer19is separated from the first dielectric layer14due to generation of gas during the manufacturing process in the similar manner to the above and thus the semiconductor device with excellent reliability can be manufactured.

Second Embodiment

In the second embodiment, a modified example of the first embodiment is explained with reference toFIG. 4AtoFIG. 4C.FIG. 4AtoFIG. 4Care cross-sectional views schematically explaining a manufacturing method of a semiconductor device according to the second embodiment. First, processes corresponding toFIG. 1AtoFIG. 1Gin the first embodiment are performed to form the conductive protective layer18comprising nickel (Ni) on the redistribution layer17as shown inFIG. 4A.

Next, a surface treatment is performed on the surface of the conductive protective layer18by any of an organic solution such as alcohol, acetone, hexane, toluene, ethylamine, acetonitrile, tetrahydrofuran (THF), propylene glycol monomethyl ether (PGME), propyleneglycol monomethyl ether acetate (PGMEA), N-methyl-2-pyrrolidone (NMP), dimethyl sulfoxide (DMSO), and N,N-Dimethylformamide (DMF), an alkaline solution such as an ammonium-based solution, a sodium-based solution, and a potassium-based solution, and a mixture of these solutions. A plurality of species can be mixed in the solution used in the surface treatment.

When this surface treatment is performed, nickel oxide (II) (NiO) is formed on the uppermost surface of the conductive protective layer18, so that the content of nickel oxide (II) (NiO) on the uppermost surface of the conductive protective layer18increases. Whereby, as shown inFIG. 4B, a conductive protective layer18′ having a two-layer structure is formed on the redistribution layer17. The conductive protective layer18′ includes a first conductive protective layer18ain which nickel (Ni) is the main component and a second conductive protective layer18bin which the content of nickel oxide (II) (NiO) is larger than the first conductive protective layer18aand nickel oxide (II) (NiO) is the main component, from the side of the redistribution layer17. The first conductive protective layer18aon which the surface treatment is not performed has a composition same as the conductive protective layer18. The main component means the component having the largest content.

The component such as nickel oxide (III) and nickel hydroxide (Ni(OH)x) has an unstable bonding state to other components. Therefore, it is not preferable in view of adhesion with the second dielectric layer19that protects the redistribution layer17that these components be the main component on the surface of the conductive protective layer18. Moreover, a nickel metal component (elemental metal) has no anisotropy in bonding. Therefore, the nickel metal component (elemental metal) is in a state where the nickel metal component cannot bind to an organic film or the like. Thus, metal oxide is formed on the nickel metal component (elemental metal) to create covalent bonds to the organic film or the like, i.e., create a state in which electrons are easily ejected, thus enabling to improve adhesion with the organic film or the like.

On the other hand, nickel oxide (II) (NiO) has a stable bonding state to other components and has adhesion with resin used as the second dielectric layer19higher than the nickel metal component (elemental metal).

Thus, in the present embodiment, the second conductive protective layer18bin which nickel oxide (II) (NiO) is the main component is intentionally formed on a joint surface with the second dielectric layer19to improve adhesion between the second dielectric layer19and the conductive protective layer18′. In other words, the second conductive protective layer18bin which nickel oxide (II) (NiO) that is a component in a stable oxidation state is the main component is arranged on the uppermost surface of the conductive protective layer, so that higher adhesion can be obtained between the conductive protective layer18′ and the second dielectric layer19. As the second dielectric layer19in this case, for example, a phenol-based resin, a polyimide resin, an epoxy resin, or a photosensitive resin such as resin obtained by sensitizing a silicone resin can be used. Among them, when the phenol-based resin is used as the second dielectric layer19, a remarkable effect can be obtained.

Nickel oxide (II) (NiO) can be formed on the uppermost surface of the conductive protective layer18, by performing a heat treatment on the surface of the conductive protective layer18. For example nickel oxide (II) (NiO) can be formed on the uppermost surface of the conductive protective layer18, by heating the conductive protective layer18in oxygen mixture atmosphere or in oxygen-inactive gas atmosphere. Moreover, Nickel oxide (II) (NiO) can be formed on the uppermost surface of the conductive protective layer18, by performing a plasma treatment on the surface of the conductive protective layer18. For example nickel oxide (II) (NiO) can be formed on the uppermost surface of the conductive protective layer18, by exposuring of the conductive protective layer18to plasma in oxygen mixture atmosphere or in oxygen-inactive gas atmosphere.

The nickel metal component (elemental metal) is oxidized even by natural oxidation of the surface of the conductive protective layer18to form oxide (native oxide). However, the number of bonds of nickel oxide (II) (NiO) and hydroxyl group (OH group) or the like included in an organic film or the like as the second dielectric layer19increases significantly by intentionally forming nickel oxide (II) (NiO) by the surface treatment as described above. Therefore, adhesion between the conductive protective layer18′ and the second dielectric layer19is improved compared with the case where the uppermost surface is the native oxide.

The thickness of the conductive protective layer18′ is, for example, 1 nm to 10 μm, and preferably 1 nm to 5 μm. When the thickness of the conductive protective layer18′ is smaller than 1 nm, the conductive protective layer18′ is formed in the form of islands although it depends on a film forming method or the like, so that the conductive protective layer18′ does not function as the conductive protective layer. When the thickness of the conductive protective layer18′ is larger than 10 μm, it takes time to form a plating film, which affects the throughput. Therefore, the conductive protective layer18′ is preferably a continuous film and as thin as possible.

After forming the conductive protective layer18′, processes corresponding toFIG. 1HtoFIG. 1Nin the first embodiment are performed. Whereby, as shown inFIG. 4C, a first semiconductor chip10′ is obtained in which the solder bump28is formed on the redistribution layer17(on the barrier metal layer24) to form the external connection terminal29. The first semiconductor chip10′ is different from the first semiconductor chip10in that the first semiconductor chip10′ includes the conductive protective layer18′ instead of the conductive protective layer18. The processes as above are performed, so that it is prevented that the second dielectric layer19is separated from the redistribution layer17and further from the first dielectric layer14due to generation of gas during the manufacturing process and thus the semiconductor device with excellent reliability can be manufactured.

In the above, the case is explained in which the conductive protective layer18is formed of nickel (Ni), however, the metal material of the conductive protective layer18, for example, includes manganese (Mn), tantalum (Ta), zinc (Zn), chrome (Cr), cobalt (Co), tin (Sn), and lead (Pb) in addition to nickel (Ni). In this case also, the content of the component of stable metal oxide on the uppermost surface of the conductive protective layer18is increased by performing the surface treatment on the surface of the conductive protective layer18. Whereby, the conductive protective layer18′ having a two-layer structure including the first conductive protective layer18ain which a metal component is the main component and the second conductive protective layer18bin which metal oxide is the main component is formed on the redistribution layer17.

Moreover, in the similar manner to the first embodiment, the chip-stack semiconductor device similar to the chip-stack semiconductor device shown inFIG. 3can be configured by stacking the first semiconductor chip10′ and the second semiconductor chip40as another electronic component by using the COC method. In such a chip-stack semiconductor device, it is prevented more surely that the second dielectric layer19is separated from the redistribution layer17and further from the first dielectric layer14due to generation of gas during the manufacturing process of the first semiconductor chip10′ and thus the chip-stack semiconductor device with excellent reliability can be manufactured.

As described above, the semiconductor device according to the present embodiment includes the conductive protective layer18′ having a two-layer structure including the first conductive protective layer18ain which nickel (Ni) is the main component and the second conductive protective layer18bin which the content of nickel oxide (II) (NiO) is larger than the first conductive protective layer18aand nickel oxide (II) (NiO) is the main component from the side of the redistribution layer17, on the redistribution layer17comprising copper (Cu). Therefore, separation of the second dielectric layer19from the redistribution layer17and separation of the second dielectric layer19from the first dielectric layer14at the time of forming the second dielectric layer19are prevented and thus the semiconductor device with more excellent reliability can be manufactured.

Moreover, as described above, in the manufacturing method of the semiconductor device according to the present embodiment, the conductive protective layer18′ having a two-layer structure including the first conductive protective layer18ain which nickel (Ni) is the main component and the second conductive protective layer18bin which the content of nickel oxide (II) (NiO) is larger than the first conductive protective layer18aand nickel oxide (II) (NiO) is the main component is laminated to the redistribution layer17comprising copper (Cu). Therefore, in the similar manner to the case of the first embodiment, the cell effect (electrolysis) due to the potential difference between two types of dissimilar metals present in the developer is suppressed significantly and therefore the amount of gas to be generated, such as hydrogen (H2) gas and oxygen (O2) gas, at the development of the photosensitive polyimide film is reduced significantly. Therefore, it is prevented that the photosensitive polyimide film to be the second dielectric layer19is separated from the redistribution layer17and further from the first dielectric layer14due to generation of gas and thus the semiconductor device with excellent reliability can be manufactured.

Furthermore, the second conductive protective layer18bin which the content of nickel oxide (II) (NiO) is larger than the first conductive protective layer18aand nickel oxide (II) (NiO) is the main component is arranged on the surface layer of the conductive protective layer18′. Whereby, higher adhesion is obtained between the conductive protective layer18′ and the second dielectric layer19, so that it is prevented more surely that the photosensitive polyimide film to be the second dielectric layer19is separated from the redistribution layer17and further from the first dielectric layer14due to generation of gas and thus the semiconductor device with excellent reliability can be manufactured.

In the present embodiment also, a constituent material of the electrode pad11and a constituent material of the redistribution layer17in the first semiconductor chip10′ can be arbitrary changed from the similar reason to the first embodiment.