Differential output driver circuit and method of operation

A differential output driver circuit includes a drive path having a first output node that provides a first output differential signal and a second output node that provides a complementary second output differential signal to the first output differential signal, a current control transistor to control current of the drive path, and a current measurement resistor circuit located in the drive current path outside of a path segment between the first and second output node. Current flowing through the drive path flows through the current measurement resistor circuit, and a voltage across the current measurement resistor circuit is indicative of an amount of current flowing through the drive path. A transistor control circuit utilizes a voltage across the current measurement resistor circuit to control a control terminal of the current control transistor to control the current in the drive path based on the voltage across the current measurement resistor circuit.

BACKGROUND

Field

This disclosure relates generally to integrated circuits, and more specifically, to a differential output driver circuit.

Related Art

Low Voltage Differential Signal (LVDS) is a technical standard that specifies electrical characteristics of a differential, serial communications protocol. LVDS typically operates at low power and can run at very high speeds, such as 5 Gbps. In an LVDS transmission system, differential signals are provided via a pair of transmission lines to a load in which the pair of lines carry complementary signals.

In an integrated circuit, there may be multiple output lanes, each driven by a corresponding differential transmitter, such as an LVDS transmitter. The voltage swings of the differential outputs transmitted by each of these lanes are subject to mismatch. This mismatch may be due to one or more of mismatch in current references used inside each lane, the effects of drain induced barrier lowering (DIBL), local mismatch and IR drops across the padring, etc. This mismatch may be more problematic when the differential output has a fixed common mode voltage (e.g. 1.2V), but the supply voltage level of the transmitter has a wide supply range (e.g. 3V to 5.5V). The mismatches in voltage swing across the lanes can cause problems in circuits utilizing these differential output signals. Therefore, a need exists to reduce the mismatch across multiple output lanes, including reducing mismatch in designs requiring operation across a wide range of supply voltage levels.

DETAILED DESCRIPTION

In one aspect, an integrated circuit (IC), such as a system on a chip (SoC), includes a plurality of differential transmitters in which each transmitter converts a single ended input signal to complementary output signals. These complementary signals are provided to an output driver stage of the transmitter which drives complementary pad signals, thus providing a differential output for the transmitter. It is desirable for the voltage swings at the differential outputs across the plurality of differential transmitters to match. However, due in some cases to current mismatches, mismatches result among the differential outputs of the plurality of transmitters. Therefore, in one embodiment, a target differential voltage swing for the differential output is set by a current reference generator. The drive path of a differential output driver circuit includes a current measurement resistor to measure current through the drive path. A voltage across the current measurement resistor is fed back to a transistor control circuit for comparison with the target differential voltage swing to control the current in the drive path. By controlling the current through the drive path in this manner, the target output differential swing voltage is maintained and mismatch among differential transmitters of an IC can be reduced. Furthermore, the target differential voltage swing may be provided by the current reference generator to multiple differential transmitters, in which use of this shared reference may also help reduce mismatch among the differential transmitters.

FIG. 1illustrates an integrated circuit100including a reference generator110and a differential output diver circuit140. Reference generator110generates a reference current in response to a band gap voltage reference, and converts the reference current to a reference voltage, corresponding to a target differential voltage (Vdiff_tx), which is provided to circuit140. In one embodiment, differential output driver circuit140corresponds to the output driver stage of a differential transmitter, such as an LVDS transmitter. The differential transmitter receives a single ended input signal (not shown), and through one or more stages, converts the single ended input signal to a complementary output signals, including complementary signals IN and INB. Differential output driver circuit140receives Vdiff_tx, IN and INB and outputs complementary pad signals Pad_N and Pad_P. The pad signals are provided to output pads (i.e. external terminals) and may be transmitted via a pair of transmission lines to a load in which the pair of transmission lines carry the complementary signals. In one example, the pair of transmission lines may be twisted wires or traces on a printed circuit board.

Reference generator110includes an amplifier112having an inverting input coupled to receive a bandgap voltage, which may be 1.2 V, and a non-inverting input coupled to a circuit node115. An output of amplifier112is coupled to a control electrode of a PMOS transistor114. A first current electrode of transistor114is coupled to a first voltage supply terminal which is coupled to receive a first supply voltage, Vdd. In one embodiment, Vdd can be set to a voltage within a particular range, such as in a range of 3.0V to 5.5V. A second current electrode is coupled to circuit node115. Series-connected resistors116,118,120, and122are coupled between circuit node115, and a second voltage supply terminal coupled to receive a second supply voltage, Vss, which is less than Vdd. A circuit node between series-connected resistors120and122provides Vdiff_tx. In operation, amplifier112and transistor114operate to place the band gap voltage on node115, resulting in a reference current through the series-connected resistors (thus operated as a voltage to current, V2I, converter). Vdiff_tx corresponds to the voltage resulting from the reference current through resistor122. The values of the band gap voltage and of resistors116,118,120, and122are set to provide a desired or target voltage swing between the differential outputs Pad_N and Pad_P of output driver circuit140. For example, in one embodiment in which Vdd can be between 3.0V and 5.5V, and band gap voltage is 1.2V, each resistor116,118,120, and122is selected as3K ohms, resulting in a target swing voltage of 300 mV. Alternate embodiments may use different circuit configurations to provide the target or desired voltage swing.

Output driver circuit140includes a comparator142, PMOS transistors144146, and150, NMOS transistor162, resistors156,158,154, and164, and comparator160. Comparators142and160can be referred to as comparison circuits and may be implemented as a comparator or operational amplifier. A non-inverting input of comparator142is coupled to receive a voltage, Isense, and an inverting input of comparator142is coupled to receive Vdiff_tx from reference generator110. An output of comparator142is coupled to provide pbias to a control electrode of PMOS144. Transistor144has a first current electrode coupled to the first supply voltage terminal which receives Vdd and a second current electrode coupled to first current electrodes of transistors146and150. A second current electrode of transistor146is coupled to a first terminal of resistor156, a first terminal of resistor154, and a first current electrode of transistor148. A second current electrode of transistor148is coupled to a first current electrode of transistor162. A second terminal of resistor156is coupled to a first terminal of resistor158. A second current electrode of transistor150is coupled to a second terminal of resistor158, a second terminal of resistor154, and a first current electrode of transistor152. A second current electrode of transistor152is coupled to the second current electrode of transistor148and the first current electrode of transistor162. The circuit node between the second terminal of resistor156and the first terminal of resistor158provides the common mode voltage, Vcm, of the output differential signals Pad_N and Pad_P. In one embodiment, resistors156and156each have a resistance of10K Ohms and resistor154has a resistance of 100 Ohms. In one embodiment, resister154may be located outside the chip (e.g. outside IC100).

Still referring toFIG. 1, an inverting input of comparator160receives a common mode target voltage, Vcm_target, which, in one embodiment, is 1.2V. A non-inverting input of comparator160receives Vcm. An output of comparator160is coupled to provide nbias to a control electrode of transistor162. A second current electrode of transistor162is coupled to a first terminal of resistor164, and a second terminal of resistor164is coupled to the second supply voltage terminal. In the illustrated embodiment, resistor164has a resistance of 100 Ohms, and the first terminal of resistor164provides the voltage, Isense, which is provided as an input to comparator142.

In operation, complementary signals are provided as IN and INB to generate output differential signals Pad_P and Pad_N. For example, if IN is a logic level high (and thus INB is a logic level low), then transistors148and150are turned on and transistors146and152are turned off, resulting in Pad_P being driven to a logic level high and Pad_N to a logic level low. Conversely, if IN is a logic level low (and thus INB is a logic level high), then transistors146and152are turned on and transistors148and150are turned off, resulting in Pad_N being driven to a logic level high and Pad_P to a logic level low. Note that transistors146,148,150, and152may each be referred to as a switch, in which these switches control current flow from Pad_P to Pad_N or from Pad_N to Pad_P (depending on the values of IN and INB).

In the illustrated embodiment, Pad_P and Pad_N are differential signals. The voltage swing of the differential output is represented as the difference between the voltage at Pad_P and the voltage at Pad_N. A current drive path is therefore provided through transistor144, transistor146/152or transistor150/148(depending on the values of IN and INB), transistor162, and resistor164. The drive path also includes a common mode resistor circuit, including resistors156and158coupled in series between Pad_N and Pad_P and including the common voltage sense node, Vcm.

As discussed above, it is desirable to control current in the drive path to ensure that the common mode voltage and the voltage swing between Pad_P and Pad_N stay at the desired targets. This helps reduce mismatch between various transmitters on chip. Resistor164provides a current measurement resistor circuit which measures the current in the drive path, and provides the sensed voltage, Isense, in response to the measured current. Isense is compared with the target swing voltage, Vdiff_tx, and modulates the current in the drive path provided by transistor144by controlling pbias at the control electrode of transistor144based on the comparison. Therefore, comparator142(also referred to as a transistor control circuit) utilizes the voltage across the current measurement resistor to control the current in the drive path based on the voltage across the current measurement resistor. In this manner, the current in the drive path is modulated to produce the desired voltage swing. Also, Vcm is compared to the target common mode voltage, Vcm_target, which modulates the resistance of transistor162to properly maintain Vcm at its target level.

FIG. 2illustrates an integrated circuit200including reference generator110and a differential output diver circuit240. Note that the same reference voltage, Vdiff_tx, which is provided to differential output driver circuit140may also be provided to differential output driver circuit240. (Alternatively, a different reference generator can generate this reference for differential output driver circuit240.) In one embodiment, differential output driver circuit240corresponds to the driver stage of a differential transmitter, such as an LVDS transmitter. The differential transmitter receives a single ended input signal (not shown), and through one or more stages, converts the single ended input signal to a complementary output signals, including complementary signals IN and INB. Differential output driver circuit240receives Vdiff_tx, IN and INB and outputs complementary pad signals Pad_N and Pad_P. The pad signals are provided to output pads (i.e. external terminals) and may be transmitted via a pair of transmission lines to a load in which the pair of transmission lines carry the complementary signals. In one example, the pair of transmission lines may be twisted wires or traces on a printed circuit board.

Transistors258,260,262, and264, and resistors266,268, and270of output driver240are coupled analogously to transistors146,148,150, and152and resistors154,156, and158, respectively, of output driver140ofFIG. 1. Differential output driver240also includes comparators242,252, and274, PMOS transistor254, resistors256,244,246,248, and250, and NMOS transistor272. A first terminal of transistor254is coupled to the first voltage supply terminal, an output of comparator252is coupled to provide pbias to a control electrode of transistor254, and a second current electrode of transistor254is coupled to a circuit node, P, at a first terminal of resistor256. A second terminal of resistor256is coupled to a circuit node, N, at first current electrodes of transistors258and262. A first current electrode of transistor272is coupled to the second current electrodes of transistors260and264. A control electrode of transistor272is coupled to an output of comparator274to receive nbias, and a second current electrode of transistor272is coupled to the second voltage supply terminal.

A first terminal of resistor244is coupled to circuit node P, a second terminal of resistor244is coupled to a non-inverting input of comparator242. A first terminal of resistor246is coupled to the second terminal of resistor244and to the non-inverting input of comparator242. An inverting input of comparator242is coupled to a first terminal of resistor248and to a first terminal of resistor250. A second terminal of resistor248is coupled to the circuit node N, and a second terminal of resistor250is coupled to the output of comparator242. In the illustrated embodiment, each of resistors244,246,248, and250have a same resistance of 50 k Ohms each. An inverting input of comparator274is coupled to receive Vcm_target, which may also be 1.2V in the example ofFIG. 2, and a non-inverting input of comparator274is coupled to receive Vcm.

In operation, note that transistors258,260,262, and264, and resistors266,268, and270of output driver240operate analogously to transistors146,148,150, and152and resistors154,156, and158, respectively, ofFIG. 1. For example, when IN is a logic level high (and thus INB is a logic level low), then transistors260and262are turned on and transistors258and264are turned off, resulting in Pad_P being driven to a logic level high and Pad_N to a logic level low. Conversely, if IN is a logic level low (and thus INB is a logic level high), then transistors258and264are turned on and transistors260and262are turned off, resulting in Pad_N being driven to a logic level high and Pad_P to a logic level low. Note that transistors258,260,262, and264may also each be referred to as a switch, in which these switches control current flow from Pad_P to Pad_N or from Pad_N to Pad_P (depending on the values of IN and INB).

In the embodiment ofFIG. 2, a current drive path is therefore provided through transistor254, transistor258/262or transistor262/260(depending on the values of IN and INB), and transistor272. The drive path also includes a common mode resistor circuit which is the same as the common mode resistor circuit ofFIG. 1, including resistors268and270coupled in series between Pad_N and Pad_P and including the common voltage sense node, Vcm.

In the illustrated embodiment, resistor256operates as a current measurement resistor circuit which measures the current in the drive path, and results in voltages at nodes P and N which are used to determine the voltage drop over the resistor. With node P coupled to the non-inverting input of comparator242, and node N coupled to the inverting input of comparator242, the output of comparator242provides the voltage difference between node P and N and is thus labeled as (P−N). P−N corresponds to the voltage drop over resistor256. This voltage drop is provided to the non-inverting input of comparator252which compares it to the desired voltage swing of Vdiff_tx, and modulates the current in the drive path provided by transistor254by controlling pbias at the control electrode of transistor254. Therefore, comparators242and252may collectively be referred to as a transistor control circuit which utilizes the voltage across the current measurement resistor to control the current in the drive path based on the voltage across the current measurement resistor. In this manner, the current in the drive path is modulated to produce the desired voltage swing. Also, as is the case inFIG. 1with comparator160and transistor162, Vcm is compared to the target common mode voltage, Vcm_target, by comparator274which modulates the resistance of transistor272to properly maintain Vcm.

Therefore both resistor164ofFIG. 1and resistor256ofFIG. 2operate as current measurement resistors which allows for the measurement of current in the drive path of the output stage of the corresponding differential output driver. Note that the current measurement resistor, resistor164or256, is located in the drive path of the output stage of the differential output diver circuit140or240, respectively, but is outside of the path segment between Pad_N and Pad_P (e.g. outside of the common mode resistor circuit). Further, in the embodiment ofFIG. 1, this current measurement resistor is located between the second voltage supply terminal and the second current electrodes of transistors148and152(i.e. between the second voltage supply terminal and switches148and152). However, in the embodiment ofFIG. 2, this current measurement resistor is located between the first supply terminal and the first current electrodes of transistors258and262(i.e. between the first voltage supply terminal and switches158and262). Through the use of current measurement resistors, located outside the path segment between Pad_N and Pad_P, the current in the drive path can be controlled to maintain it at a desired current (e.g. 3 mA through the current measurement resistor) thus setting the voltage swing to the desired voltage, regardless of the variation in the power supply provided to the first power supply terminal. For example, Vdd may vary between 3V and 5.5V, yet by modulating the current in the drive path based on the voltage drop over the current measurement resistor, the desired swing voltage can be maintained, thus allowing for improved matching among various differential output drivers.

FIG. 3illustrates an integrated circuit300having a plurality of differential transmitters, such as LVDS transmitters301-306, in which each transmitter is located in its corresponding lane. These transmitters may be located in a pad ring of integrated circuit300. Each transmitter provides differential output signals for the corresponding lane. For example, transmitter301provides differential output signals Pad_P0and Pad_N0, transmitter302provides differential output signals Pad_P1and Pad_N1, etc. Each of the transmitters301-306may include a differential output driver circuit similar to differential output driver circuit140. A current reference cell308may include a V2I converter circuit316which may correspond to the circuitry of reference generator110illustrated in the example ofFIGS. 1 and 2, in which the output of converter316is the reference Vdiff_tx which is provided to all of transmitters301-306. By sharing this reference voltage, mismatch between the transmitters can be further reduced. Also, comparators310-315in each of transmitters301-306, respectively, correspond to comparator142ofFIG. 1(or comparator252ofFIG. 2), in which each comparator receives its corresponding Isense voltage as the voltage drop over a current measurement resistor located in the output stage of the differential output driver of the corresponding transmitter. (The remainder of the circuitry of each transmitter or of the output stage is not being illustrated for the sake of simplicity, but may include circuitry similar to that ofFIG. 1orFIG. 2)

Therefore, Isense( ) may correspond to the voltage sensed in response to current measured by the current measurement resistor in the differential output driver of transmitter301. Similarly, Isense1may correspond to the voltage sensed in response to current measured by the current measurement resistor in the differential output driver of transmitter302. Note that in reference to the embodiment ofFIG. 1, the sensed voltage Isense corresponds to the voltage drop over resistor164, and in reference to the embodiment ofFIG. 2, the sensed voltage Isense corresponds to the voltage drop over resistor256. With each of Isense0-Isense5being matched to a single reference, Vdiff_tx, and by comparing the voltage drop over the current measurement circuit to Vdiff_tx to control the current in the drive path, improved matching may be achieved among LVDS transmitters301-306.

FIG. 4illustrates the differential output signals provided by each of the 6 lanes ofFIG. 3. In the illustrated embodiment ofFIG. 4, the bandgap voltage used in reference generator308corresponds to 1.2V. Each of the 6 transmitters (in the 6 lanes) receives the same Vdiff_tx, which may be 300 mV. The sensed voltage drop over the current measurement resistor in each lane (corresponding to Isense0-5) are all at about 300 mV since they are all controlled to match the same Vdiff_tx. That is, the transistor control circuits, based on the difference between Isense and Vdiff_tx, controls the current in the drive path of the output stage of each transmitter, resulting in a matched voltage swing of 300 mV across all 6 lanes. Furthermore, with the controlled current in the drive path, the cross over point of the differential signals in each lane upon a change of state of the input (e.g. IN) occurs at time t1. Without matching, this crossover point would occur at different times for each lane, and the voltage swings may also not match across all lanes.

Therefore, by now it can be understood how improved matching may be achieved, even with a wide range of variation of the supply voltage, across multiple transmitter lanes by measuring a drive path current and modulating the drive path current based on a desired voltage swing of the differential output signal. The drive path current is measured using a current measuring resistor which is located outside the switches of the output path and thus outside the common mode resistor circuit between the output nodes. A separate transistor control circuit (e.g. comparator) may be used to modulate a resistance in the drive path to also maintain a consistent common mode voltage, Vcm.

Also for example, in one embodiment, the illustrated elements of transmitter100, transmitter200, or IC300are each circuitry located on a single integrated circuit or within a same device. Furthermore, those skilled in the art will recognize that boundaries between the functionality of the above described operations merely illustrative. The functionality of multiple operations may be combined into a single operation, and/or the functionality of a single operation may be distributed in additional operations. Moreover, alternative embodiments may include multiple instances of a particular operation, and the order of operations may be altered in various other embodiments.

Although the invention is described herein with reference to specific embodiments, various modifications and changes can be made without departing from the scope of the present invention as set forth in the claims below. For example, the current measurement resistors ofFIGS. 1 and 2can be referred to as current measurement resistor circuits and may be implemented with multiple resistors or with different configurations. Accordingly, the specification and figures are to be regarded in an illustrative rather than a restrictive sense, and all such modifications are intended to be included within the scope of the present invention. Any benefits, advantages, or solutions to problems that are described herein with regard to specific embodiments are not intended to be construed as a critical, required, or essential feature or element of any or all the claims.

In one embodiment, a differential output driver circuit includes a drive path which includes a first output node that provides a first output differential signal and a second output node that provides a complementary second output differential signal to the first output differential signal; a current control transistor to control current of the drive path; and a current measurement resistor circuit located in the drive current path outside of a path segment between the first output node and the second output node, wherein current flowing through the drive path flows through the current measurement resistor circuit, wherein a voltage across the current measurement resistor circuit is indicative of an amount of current flowing through the drive path. The differential output driver circuit also includes a transistor control circuit that utilizes a voltage across the current measurement resistor circuit to control a control terminal of the current control transistor to control the current in the drive path based on the voltage across the current measurement resistor circuit. In one aspect, the current controlled by the current control transistor is set by the transistor control circuit to provide a desired differential output voltage swing between the first output node and the second output node. In another aspect, the differential output driver circuit further includes a plurality of switches, wherein the plurality of switches control current to flow from the first output node to the second output node when conveying a first output value and control current to flow from the second output node to the first node to convey a second output value opposite the first output value; wherein the current measurement resistor circuit is located in the current path between a low voltage supply terminal of the drive path and the plurality of switches. In a further aspect, the current control transistor is located in the drive path between a high voltage supply terminal of the drive path and the plurality of switches. In another aspect of the above embodiment, the transistor control circuit includes a comparison circuit with the first input to receive a voltage indicative of the voltage across the current measurement resistor circuit, a second input to receive a reference voltage, and an output to control the control terminal of the current control transistor. In a further aspect, the differential output driver circuit includes a second comparison circuit including a first input coupled to a first terminal of the current measurement resistor circuit, a second input coupled to a second terminal of the current measurement resistor circuit, and an output coupled to the first input of the comparison circuit. In another aspect, the differential output driver circuit further includes a plurality of switches, wherein the plurality of switches control current to flow from the first output node to the second output node when conveying a first output value and control current to flow from the second output node to the first node to convey a second output value opposite the first output value; wherein the current measurement resistor circuit is located in the current path between a high voltage supply terminal of the drive path and the plurality of switches. In a further aspect, the current control transistor is located in the drive path between a high voltage supply terminal and the plurality of switches. In yet another aspect of the above embodiment, the differential output driver circuit further includes a plurality of switches, wherein the plurality of switches control current to flow from the first output node to the second output node when conveying a first output value and control current to flow from the second output node to the first node to convey a second output value opposite the first output value; wherein the plurality of switches includes a first switch, a second switch, a third switch, and a fourth switch, the conductivity of the first switch and the second switch are controlled by a first input differential signal and the conductivity of the third switch and the fourth switch are controlled by a second input differential signal that is complementary to the first input differential signal, the first output node is connected to a first current terminal of the first switch and a first current terminal of the second switch, the second output node is connected to a first current terminal of the third switch and a first current terminals of the fourth switch. In another aspect, the drive path includes a common mode voltage resistor circuit connected between the first output node and the second output node and including a sense node, the drive path includes a common mode voltage control transistor for controlling the common mode voltage of the first output differential signal and the second output differential signal, wherein the differential output driver circuit includes: a common mode transistor control circuit that includes a first input coupled to the sense node and a second input coupled to receive a reference common mode voltage, the common mode transistor control circuit utilizes the first input and the second input to control a control terminal of the common mode voltage control transistor to control the common mode voltage of the first output differential signal and the second output differential signal. In another aspect, a circuit includes a plurality differential output driver circuits. In a further aspect, the transistor control circuit of each differential output driver circuit of the plurality includes a comparison circuit with a first input to receive a voltage indicative of the voltage across the current measurement resistor circuit of the each differential output driver circuit, a second input to receive a reference voltage, and an output to control the control terminal of the current control transistor of the each differential output driver circuit, and the circuit further includes a reference voltage generation circuit to provide the reference voltage to the first input of the comparison circuit of each differential output driver circuit of the plurality. In another aspect of the circuit, the reference voltage is indicative of a desired voltage swing between the first output node and the second output node of each of the differential output driver circuits of the plurality.

In another embodiment, a method of operating a differential output driver circuit, wherein the differential output driver circuit includes a drive path including a first output node that provides a first output differential signal and a second output node that provides a complementary output differential signal to the first output differential signal, includes providing first voltage indicative of a voltage across a current measurement resistor circuit located in the drive path outside of a path segment of the drive path between the first output node and the second output node, wherein current flowing through the drive path flows through the current measurement resistor circuit, wherein the voltage across the current measurement resistor circuit is indicative of an amount of current flowing through the drive path; comparing the first voltage with a reference voltage to produce a signal that controls a control terminal of a current control transistor of the drive path to control the current in the drive path. In one aspect of the another embodiment, the current controlled by the current control transistor is set to provide a desired differential output voltage swing between the first output node and the second output node. In another aspect, the drive path includes a plurality of switches, wherein the plurality of switches control current to flow from the first output node to the second output node when conveying a first output value and control current to flow from the second output node to the first output node to convey a second output value opposite the first output value, wherein the current measurement resistor circuit is located in the current path between a low voltage supply terminal of the drive path and the plurality of switches. In a further aspect, the current control transistor is located in the current path between a high voltage supply terminal of the drive path and the plurality of switches. In another aspect of the another embodiment, the drive path includes a plurality of switches, wherein the plurality of switches control current to flow from the first output node to the second output node when conveying a first output value and control current to flow from the second output node to the first node to convey a second output value opposite the first output value, wherein the current measurement resistor circuit is located in the drive path between a high voltage supply terminal of the drive path and the plurality of switches.

In yet another embodiment, a differential output driver circuit includes a drive path from a high voltage supply terminal to a low voltage supply terminal, the drive path including: a first output node that provides a first output differential signal and a second output node that provides a complementary output differential signal to the first output differential signal; a current control transistor to control current of the drive path; a current measurement resistor circuit located in the drive current path outside of a path segment between the first output node and the second output node, wherein current flowing through the drive path flows through the current measurement resistor circuit, wherein a voltage across the current measurement resistor circuit is indicative of an amount of current flowing through the drive path; a transistor control circuit that utilizes a voltage across the current measurement resistor circuit to control a control terminal of the current control transistor to control the current in the drive path to provide a desired differential output voltage swing between the first output node and the second output node. In a further aspect, the differential output driver circuit further includes a plurality of switches, wherein the plurality of switches control current to flow from the first output node to the second output node when conveying a first output value and control current to flow from the second output node to the first node to convey a second output value opposite the first output value; wherein the current measurement resistor circuit is located in the current path between a low voltage supply terminal of the current path and the plurality of switches; wherein the current control transistor is located in the current path between a high voltage supply terminal and the plurality of switches.