System and method to accelerate settling of an amplifier

A system and method are used to accelerate settling or steady state of an amplifier in an amplifier system. This is used to ensure the amplifier reaches steady-state within a specified time period from stand-by or another state without using more current than is needed for steady-state. A comparator in a common-mode feedback system compares a desired amplifier output signal to one or more nodes of the amplifier. A result of the comparison is compared to a threshold value using a comparator in a settling acceleration system. If the result crosses the threshold, a controller turns on a driver in the settling acceleration system. The driver pulls on one or more nodes of the amplifier, which, along with a driver in the amplifier system pulling on the node, quickly brings the amplifier to settling or steady state.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention is related to systems and methods to bring amplifier systems to steady state.

2. Background Art

Low power electronic circuits usually have a complex set of power-down modes to save as much power as possible. However, these circuits often also have a specific response time requirement to power-up requests. Therefore, the circuits need to be able to wake-up relatively quickly. The power-up time for the circuits is determined by the capacitance on each node of the circuit and the amount of current available to charge that capacitance to the desired steady-state voltage. In amplifiers or operational transconductance amplifiers (OTAs) with differential inputs and differential outputs, the circuits need to settle to an operating point both differentially and common-mode. Often, such differential input/output amplifiers have a common-mode control circuit that sets the common-mode voltage levels in the circuit to desired levels.

Often, powering up of these circuits within the specified time takes more power (current) than is needed for steady state operation, resulting in conflicting design requirements. This is because if a designer limits a current for a low power circuit, the designer is also limiting the minimum power-up time. For example, circuits are designed to handle the power-up requirements, which results in wasted power during steady-state operation. Also, a first stage of a two-stage Miller-compensated amplifier must have very low current for stability of the circuit, which can lead to deteriorating of the power-up time.

Therefore, what is needed is a system and method that would allow an amplifier to remain stable and achieve power-up within a required time period, but that does not require more power than a steady-state operation of the amplifier.

BRIEF SUMMARY OF THE INVENTION

Embodiments of the present invention provide a method, including the following steps. Comparing one or more nodes of an amplifier to a common-mode reference to generate a result signal. Comparing the result signal to a threshold. Activating a driving system to drive the amplifier if the result signal crosses the threshold value, such that the amplifier achieves steady state in an accelerated time period.

Embodiments of the present invention provide a system including an amplifier portion, a common-mode feedback portion, and a settling acceleration portion. The settling acceleration portion includes a comparator, a controller, and a driving system. The comparator generates a first signal from comparing a second signal from the common-mode feedback portion to a threshold value. The controller activates the driving system when the second signal crosses the threshold value to drive the amplifier portion, such that the amplifier portion achieves steady state in an accelerated time period.

The present invention will now be described with reference to the accompanying drawings. In the drawings, like reference numbers may indicate identical or functionally similar elements. Additionally, the left-most digit(s) of a reference number may identify the drawing in which the reference number first appears.

DETAILED DESCRIPTION OF THE INVENTION

Overview

While specific configurations and arrangements are discussed, it should be understood that this is done for illustrative purposes only. A person skilled in the pertinent art will recognize that other configurations and arrangements can be used without departing from the spirit and scope of the present invention. It will be apparent to a person skilled in the pertinent art that this invention can also be employed in a variety of other applications.

Embodiments of the present invention provide a system and method of accelerating settling or steady state of an amplifier in an amplifier system. This is used to ensure the amplifier reaches steady state within a specified time period from stand-by or another state without having more current than is needed for steady-state operation. A comparator in a common-mode feedback system compares a desired amplifier output signal to one or more nodes of an the amplifier. A result of the comparison is compared to a threshold value using a comparator in a settling acceleration system. If the result crosses the threshold, a controller turns on a driver in the settling acceleration system. The driver pulls on one or more nodes of the amplifier, which, along with a common-mode driver in the amplifier system pulling on the node, quickly brings the amplifier to settling or steady state.

Overall System Having an Amplifier Accelerated Settling System

FIG. 1shows a system100according to embodiments of the present invention. System100includes an amplifier system110, a common mode feedback system130, and a settling acceleration system150. As best seen inFIGS. 2-4, these systems can be powered via Vsupply and Gnd and biased using Vbias.

System and Circuit Having a Single Stage Amplifier and an Accelerated Setting System

FIGS. 2-3show a system200and a schematic diagram of a circuit implementation300of system200according to embodiments of the present invention. System200and circuit300include a single-stage amplifier system110and settling acceleration system150. Amplifier system110includes an amplifier201and a driver202. Amplifier201is biased via current source Ibias1204and receives an input206, which can be from inside or outside system100. Input206can be used to initiate amplifier201transitioning from a power-down state (e.g., stand-by) to steady state, or for other uses known in the relevant arts.

An output signal Vao210from amplifier201is received at comparator230in common-mode feedback portion130, which is biased using Ibias2231. Vao210is compared to a reference value CMREF232, which can be a desired value for an amplifier portion output. Comparison result signals Cr1234and234′ are generated. Signal Cr1234′ is received at controller236in common-mode feedback portion130and signal Cr1234is received at comparator250in settling acceleration system150. Although based on the same comparison, result signals Cr1234and Cr1234′ can be variations of each other. Cr1234is compared to a threshold value TH252(e.g., a bias current from bias current source Ibias3253) to produce a comparison result signal Cr2254. Comparison signal Cr2254is received at controller256and used to control driver258.

In a second state (e.g., power-up of amplifier201), Vbias transitions to high, causing Vao210to begin decreasing towards CMREF232, which takes a certain amount of time. This time period is usually set based on specifications for system200. When this second state begins, Vao210is still greater than CMREF232, so controller236and driver202are still inactive. As Vao210continues to decrease towards CMREF232, controller236and driver202become active, pulling-up on Vao210or a node thereof.

A force or speed in which Vao210or a node thereof can be pulled down is relatively slow compared to a force or speed Vao210or a node thereof can be pulled up. Pulling down is determined based on a current from current source Ibias1204that sets a normal operating current of amplifier201, which is fixed. When trying to limit peak power of amplifier system110to steady state operating power, a time to settling or steady state of Vao210may not conform to required specified time frames. Therefore, settling acceleration portion150is used to speed-up transitioning of amplifier201to steady state through additional current used to pull down on Vao210. This is done without requiring amplifier system110to have more power than necessary for steady-state (e.g., when Vao210equalizes with CMREF232), as is discussed in detail below.

Thus, when Vao210is still far above CMREF232and before controller236and driver202activate, Cr1234is greater than TH252, which activates controller256using Cr2254. When controller256is active, driver258is used to pull-down on Vao210(assisting Ibias1204), which causes amplifier201to quickly settle or achieve steady-state (e.g., when Vao210equalizes with CMREF232). When Voa210gets near CMREF232, Cr1234becomes lower then TH252and driver258is turned off by controller256. The final settling of Voa210is achieved by Ibias1204pulling down and/or driver202pulling up.

It is to be appreciated that driver258can also be coupled to driver202and/or controller236to assist them in their operation during the second state.

In a third state, steady state operation is achieved when an output from driver202matches Ibias1204and controller256and driver258are off. Therefore, amplifier201can be settled or brought to steady-state within specified time periods through use of driver202and driver258, while avoiding using power beyond what amplifier201needs for steady-state. This allows amplifier system110to have more efficient power consumption during steady state than conventional systems.

The use of comparators230and250allows for a monitoring and detection of a state of amplifier201. Through this monitoring or detection, any time amplifier201deviates too far from steady-state operation (e.g., when Voa210equals to CMREF232), controller256activates driver258, which quickly supplies the additional power necessary to settle amplifier201back into steady state. Thus, an automatic compensation operation can be implemented using system100.

Therefore, there can be at least three states of systems200and300. During a first state (e.g., an amplifier power-down situation), amplifier system110is off, and common-mode feedback system130and settling acceleration system150may be powered off as well. For example, Vbias is low and Voa1210is not near CMREF232. During a second state (e.g., an amplifier power-up situation), amplifier system110, common-mode feedback system130, settling acceleration system150are on and Vbias is not low, but Vao1210is not near CMREF232and controllers236and256and driver258are active. During a third state (e.g., an amplifier is powered up and in steady-state operating condition), Voa1210is equal to CMREF232and controller236is active to keep Vao1210equal to CMREF232. At the same time, controller256and driver258are no longer active because Cr1234is below TH252.

As discussed above,FIG. 3is a schematic circuit diagram300of system200. Circuit300includes a single-stage amplifier201(M13and M14) (where M refers to a transistor, a field effect transistor, or the like). Although shown as MOSFETS (e.g., PMOS and NMOS devices), other electronic devices could also be used, as would be apparent to a skilled artisan reading the instant specification. All variations for electronics are contemplated within the scope of the present invention.

Amplifier system110is biased using Ibias1204(M8) and includes an amplifier201(M13and M14) having differential input signals206(VIP/VIN) and differential output signals210(VXN/VXP). Also, amplifier system110includes driver202(M9/M10).

Once Cr1234is copied as Cr1234″, comparator250(M2/M3) in settling acceleration system150compares Cr1234″ (current from M2) to TH252(current from M3) to generate comparison result signal Cr2254. Comparison result signal Cr2254is received at controller256(M7), which controls driver258(M4/M5).

Using NMOS devices for driver258allows for the pull-down of output VXN/VXP210. Similarly, using PMOS devices for controller236and driver202allows for the pull-up of output VXN/VXP210.

Operation of circuit300is similar to system200described above.

In the first state, Vbias is low, causing VXN/VXP210to go to Vsupply and not near CMREF232.

In the second state, as Vbias becomes high VXP/VXN210are still well above CMREF232, and M9/M10and M11are still turned off, while M8pulls down on VXP/VXN210. At this time current Cr1234″ is larger than current TH254. When Cr1234″ is larger than TH254, M7turns on, causing M4/M5to turn on. Once on, M4/M5pull down on VXN/VXP210, assisting M8, allowing M13/M14to settle or come to steady state in an accelerated fashion.

In the third state, when VXN/VXP210come near CMREF232, Cr1234″ drops below TH252and M7no longer receives current, turning M4/M5off. At the same time, M11receives more current and controls M9/M10to start pulling up on VXP/VXN210. When M13/M14reaches steady state, the pull up of M9/M10matches the pull down of M8.

As discussed above, normally to speed up pull down time or force, current would have to be increased through M8. This, however, increases power consumption of amplifier system110. Through use of M4/M5pulling down on VXP/VXN210, no increase in current is needed through M8, and M13/M14settle very quickly at steady state.

The comparison of Cr1234″ and TH254in settling acceleration portion150is based on a width (W) to length (L) ratio of M1, M2, M3and M12. Thus, comparator parameters can be adjusted by adjusting the W/L of M1, M2M3, and/or M12. Thus, the threshold established by the W/L of M3, which has a fixed current there through, also establishes when M4and M5will turn on.

System Having a Two-Stage Amplifier and an Accelerated Settling System

FIG. 4is a schematic diagram of a system400according to an embodiment of the present invention. System400can be an implementation of system100using a two-stage amplifier402(e.g. a two-stage Miller-compensated amplifier) including a first stage201(M13/M14) and a second stage404(M20/M21) (where M refers to a transistor, a field effect transistor, or the like). Second stage404(M20/M21) is bias using Ibias4(M22)403and Ibias5(M23)405, respectively. Although shown as MOSFETS (e.g., PMOS and NMOS devices), other electronic devices could also be used, as would be known to a skilled artisan. All variations for electronics are contemplated within the scope of the present invention.

In addition to adding second stage404to amplifier system110, a differential output voltage Vop/Von406from second stage404is used in comparator230instead of first stage201output voltage Vxn/Vxp210in circuit300. Also, a large capacitance Cm is placed between first stage201and second stage404and the current in first stage201is reduced to make two-stage amplifier402stable. Common-mode feedback system130has some elements in opposite positions, compared to circuit300. This can be because the polarity of Vop/Von406is opposite to the polarity of Vxp/Vxn210(e.g., voltages Vop/Von406go up together, while voltages Vxp/Vxn210went down together), so M15receiving Vcmref232was repositioned.

It is to be appreciated that although shown as three elements110,130, and150, they could be configured as one or two elements, with a larger system incorporating two or more of the smaller systems. Any configuration of systems110,130, and150is contemplated within the scope of the present invention.

In alternative embodiments, Ibias1204, Ibias2231, and Ibias3253could be positioned between Vsupply and systems110,130, and150instead of between Gnd and systems110,130and150. In these embodiments, Ibias1204would be pulling up on node Voa210and driver202(and driver258) would be pulling down on node Vao210. It is to be appreciated other alternative embodiments are also possible, as would become apparent to a skilled artisan from reading the instant application, and are contemplated within the scope of the present invention.

It is to be appreciated that many other configurations and types of amplifiers can incorporate the monitoring/settling acceleration system150, which are all within the scope of the present invention.

For example, system100can include: cascode transistors could be placed in series with the current-source transistors; more elaborate current mirrors could be used; the settling acceleration circuit could be extended to a pull up-pull down configuration, or only a pull-up.

Also, variations to the amplifier system110can be that it includes: folded-cascode structures; a PMOS or combined NMOS/PMOS input differential pairs; implementation in a complete different technology such as bipolar or BiCMOS; multi-stage, with optional stability compensation; etc. Other specific amplifiers can be Ahuja Compensated two-stage differential input/output amplifiers.

Method of Accelerating Settling

FIG. 5is a flowchart depicting a method500for accelerating settling or steady state of an amplifier according to embodiments of the present invention. One or more of the above systems100,300, and/or400can perform the method. In step502, an output of an amplifier is compared to a common-mode reference to generate a result signal. In step504, the result signal is compared to a threshold value. In step506, a driving system is activated to drive the amplifier if the result signal is greater than the threshold value, such that the amplifier achieves steady state in an accelerated time period. The driving system can optionally also drive a common-mode feedback device that controls the amplifier to bring it to steady state.

Conclusion