SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND ELECTRONIC DEVICE

Provided is a semiconductor device including a wiring board including a plurality of alternately stacked insulating layers and wiring layers, the wiring layers being connected to each other by via-plugs, a semiconductor chip mounted on the wiring board, a heat-dissipating member that is disposed on a side opposite to the wiring board with the semiconductor chip sandwiched between the wiring board and the heat-dissipating member, and dissipates heat generated in the semiconductor chip, a sealing resin layer that is bonded to the wiring board and the heat-dissipating member between the wiring board and the heat-dissipating member, and seals the semiconductor chip from an outer periphery side, and a heat-conducting material that is bonded to the semiconductor chip and the heat-dissipating member between the semiconductor chip and the heat-dissipating member inside the sealing resin layer and conducts heat generated in the semiconductor chip to the heat-dissipating member.

DETAILED DESCRIPTION

Hereinafter, best modes for implementing a semiconductor device, a method for manufacturing the semiconductor device, and an electronic device according to embodiments of the present application will be described with reference to attached drawings.

A semiconductor device described below is a structure body that is a so-called semiconductor package in which a wiring board, a semiconductor chip, and a heat-dissipating member are sequentially disposed in the thickness direction. As the wiring board, for example, a wiring board called coreless board that does not have a core layer (core board) is used.

In the following description, front, back, up, down, left, and right directions are all referred to by referring to, as the up-down direction, the direction (thickness direction) in which the wiring board, the semiconductor chip, and the heat-dissipating member are disposed.

Note that the front, back, up, down, left, and right directions described below are used for convenience of the description, and the implementation of the present application is not limited to these directions.

[Schematic Structure of Electronic Device]

First, a schematic structure of an electronic device100will be described (seeFIG. 1).

The electronic device100is, for example, formed by disposing necessary units inside and outside an external housing101formed in an oblong and flat form, and used as a game machine, for example.

On a front surface of the external housing101, a display panel102is provided in a central part in the left-right direction, and operation keys103,103, . . . and operation keys104,104, . . . are provided in circumferential directions to be separately arranged on the left and the right of the display panel102. Further, operation keys105,105, . . . are provided in a lower end portion of the front surface of the external housing101.

The operation keys103,103, . . . , the operation keys104,104, . . . , and the operation keys105,105, . . . function as direction keys, decision keys, and the like used to select menu items displayed on the display panel102or to play games, for example.

On a top surface of the external housing101, a connection terminal106for connecting an external device, supplement terminals107and107for supplement of power, a light-receiving window108for conducting infrared communication with an external device, and the like are provided.

[Circuit Configuration of Electronic Device]

Next, a circuit configuration of the electronic device100will be described (seeFIG. 2).

The electronic device100includes a main CPU (central processing unit)110and a system controller120. Power is supplied to the main CPU110and the system controller120from an unillustrated battery by a different system, for example.

Further, the electronic device100includes a setting information retention unit130, such as a memory that retains various pieces of information that are set by a user.

The main CPU110includes a menu processing unit111that generates a menu screen so that a user can set various pieces of information and select applications, and an application processing unit112that executes the applications. The set information is transmitted to the setting information retention unit130by the main CPU110and is retained in the setting information retention unit130.

The system controller120includes an operation input receiving unit121, a communication processing unit122, and a power controlling unit123. The operation input receiving unit121checks states of the operation keys103,103, . . . , the operation keys104,104, . . . , and the operation keys105,105, . . . , the communication processing unit122performs a communication processing with an external device, and the power controlling unit123controls power supplied to each unit.

Next, a structure of a semiconductor device1will be described (seeFIGS. 3 to 6).

The semiconductor device1includes a wiring board2, a semiconductor chip3, and a heat-dissipating member4(seeFIGS. 3 and 4). The semiconductor device1has, for example, a BGA (ball grid array) structure in which later-described solder balls are provided in an array form below a lower surface of the wiring board2.

The wiring board2is, for example, a coreless board that does not have a core layer, and includes a plurality of insulating layers5,5, . . . , and a plurality of wiring layers6,6, . . . , which are alternately stacked (seeFIG. 5). Examples of a material for the insulating layer5include an epoxy resin, and examples of a material for the wiring layer4include copper, silver, nickel, and the like. The wiring layers6,6, . . . are connected from an upper layer to a lower layer in a predetermined path by via-plugs7,7, . . . .

On a top surface of the wiring board2, that is, a top surface of the uppermost insulating layer5, connection pads8,8, . . . are formed. The connection pads8,8, . . . are connected to terminal portions of the semiconductor chip3. The connection pads8,8, . . . are, for example, formed in an array form by electroplating with nickel, lead, gold, or an alloy thereof.

Below a lower surface of the wiring board2, that is, a lower surface of the undermost insulating layer5, lands10,10, . . . are formed. On the lands10,10, . . . positioned on a central side of the wiring board2, electrode pads11,11, . . . are formed using tin, silver, copper, or an alloy thereof. The lands10,10, . . . are connected to connection terminals of an unillustrated circuit board (motherboard) by solder balls12,12, . . . provided in an array form, and the electrode pads11,11, . . . are connected to capacitors13,13, . . . (seeFIG. 4).

The capacitors13,13, . . . are connected to the lower surface of the wiring board2directly beneath the semiconductor chip3.

By thus connecting the capacitors13,13, . . . to the lower surface of the wiring board2directly beneath the semiconductor chip3, wiring paths from the semiconductor chip3to the capacitors13,13, . . . are shortened and wiring resistance can be reduced.

Note that positions of the capacitors13,13, . . . are not limited to the lower surface of the wiring board2directly beneath the semiconductor chip3, and may be, for example, the lower surface of the wiring board2not directly beneath the semiconductor chip3as long as the wiring paths are sufficiently shortened. Further, the capacitors13,13, . . . may be, for example, connected to a top surface of the wiring board2and sealed by the later-described sealing resin layer as long as the wiring paths are sufficiently shortened.

Below the lower surface of the undermost insulating layer5, solder resists14are formed in portions where the lands10,10, . . . are not formed (seeFIG. 5).

As described above, the wiring substrate2is formed as the coreless board that does not have the core layer, and can be thinned to approximately 300 μm with a six layer structure, for example. By reducing the thickness of the wiring board2, the length of wiring can be reduced, and accordingly, the operation speed of the semiconductor device1can be higher.

The semiconductor chip3is an LSI (large scale integration) or the like, and external electrodes are bonded to the top surface of the wiring board2by flipchip connection (seeFIGS. 3 and 4). Specifically, solder bumps serving as the external electrodes of the semiconductor chip3are bonded to the C4 bumps9,9, . . . of the wiring board2by solder.

A space between the wiring board2and the semiconductor chip3is filled with an underfill resin material15. By filling the space between the wiring board2and the semiconductor chip3with the underfill resin material15, stress on the solder bumps is dispersed, and accordingly, reliability of the semiconductor device1is increased.

The heat-dissipating member4is formed using a metal material having a high heat dissipation property in a rectangle plate form, for example. In a central portion of the heat-dissipating member4, for example, through holes16,16, . . . each of which penetrates the heat-dissipating member4in the up-down direction are formed to be arranged at regular intervals in the front-back and left-right directions.

The thickness of the heat-dissipating member4is, for example, 0.5 mm to 2.0 mm, and the diameter of each of the through holes16is, for example, approximately 0.3 mm.

In each of the through holes16, an upper end portion is formed as a first taper portion16ain which the diameter becomes larger as the upper end portion is closer to the above, and a lower end portion is formed as a second taper portion16bin which the diameter becomes larger as the lower end portion is closer to the lower part (seeFIG. 6).

The heat-dissipating member4is disposed over a top surface of the semiconductor chip3with a heat-conducting material17interposed therebetween (seeFIGS. 3 and 4). The heat-conducting material17is provided as a thermal interface material (TIM) using, for example, an alumina paste, a silver past, or the like. A lower surface of the heat-conducting material17is bonded to the top surface of the semiconductor chip3, and a top surface of the heat-conducting material17is bonded to a central portion in the lower surface of the heat-dissipating member4(seeFIG. 4). The heat-conducting material17is bonded in the entire region where the through holes16,16, . . . in the heat-dissipating member4are formed.

In an outer periphery portion of the wiring board2, that is, on an outer periphery side of the semiconductor chip3, a sealing resin layer18is provided, an outer periphery portion of the heat-dissipating member4is bonded to the sealing resin layer18with an adhesive resin19, and the heat-dissipating member4is fixed to the wiring board2. Therefore, the semiconductor chip3is sealed from the outer periphery side with the sealing resin layer18.

Note that the sealing resin layer18is desirably provided to outside of the outermost solder balls12,12, . . . out of the solder balls12,12, . . . provided in an array form.

By providing the sealing resin layer18to outside of the outermost solder balls12,12, . . . , the strength of the wiring substrate2is increased by the sealing resin layer18, and accordingly, a warp of the wiring board2can be suppressed. In this manner, since the sealing resin layer18functions as a reinforcement material of the wiring board2; therefore, even when the wiring board2is made thinner, a high strength of the semiconductor device1can be secured.

As the adhesive resin19, it is possible to use a variety of adhesives such as an epoxy-based adhesive and an acrylic-based adhesive, a heat conductor paste such as TIM or silicon grease, and any of a variety of materials such as indium or gold. The adhesive resin19can be selected as appropriate considering materials of the sealing resin layer18and the heat-dissipating member4.

Note that a heat sink may be disposed over the top surface of the heat-dissipating member4. When the heat sink is disposed, heat generated in the semiconductor chip3is conducted in the heat-conducting material17and is dissipated from the heat-dissipating member4and the heat sink.

[Outline of Method for Manufacturing Semiconductor Device]

Next, an outline of a method for manufacturing the semiconductor device1will be described (seeFIG. 7).

(S1) Manufacture of the semiconductor device1starts, and the wiring board2having a multilayer wiring structure including the plurality of insulating layers5,5, . . . and the plurality of wiring layers6,6, . . . which are alternately stacked is formed (board forming step).

(S2) Next, the semiconductor chip3is mounted on the wiring substrate2(chip mounting step). Specifically, the solder bumps serving as the external electrodes of the semiconductor chip3are bonded to the C4 bump9,9, . . . of the wiring board2by solder.

(S3) Consequently, the sealing resin layer18is formed over the wiring board2in the periphery of the semiconductor chip3(resin layer forming step).

(S4) Next, the heat-conducting material17is bonded to a top surface of the semiconductor chip3and also the adhesive resin19is applied onto the sealing resin layer18, and the heat-dissipating member4is attached (member attaching step). The central portion of the heat-dissipating member4is bonded to the heat-conducting material17, and the semiconductor chip3is sealed from the outer periphery side with the sealing resin layer18.

(S5) Next, the solder balls12,12, . . . , the capacitors13,13, . . . , and the like are formed on the lower surface of the wiring board2, and the wiring board2is connected to the circuit substrate by reflow (board mounting step).

(S6) Next, it is checked whether the heat-conducting material (TIM)17is separated from the top surface of the semiconductor chip3by a scanning acoustic temograph (SAT) (checking step). When a result of the check decides that the heat-conducting material17is separated from the top surface of the semiconductor chip3, the process moves to the NG side, (S7). On the other hand, when a result of the check decides that the heat-conducting material17is not separated from the top surface of the semiconductor chip3, the process moves to the OK side, and the manufacturing process ends.

(S7) The heat-conducting material17is injected from the through holes16,16, . . . in the heat-dissipating member4. By injecting the heat-conducting material17from the though holes16,16, . . . , the heat-conducting material17is bonded again to the top surface of the semiconductor chip3, and the separation of heat-conducting material17from the top surface of the semiconductor chip3is repaired.

[Details of Method for Manufacturing Semiconductor Device]

Next, details of the method for manufacturing the semiconductor device1will be described (seeFIGS. 8 to 16).

Firstly, the wiring board2having a multi-layer wiring structure in which the plurality of insulating layers5,5, . . . and the plurality of wiring layers6,6, . . . are alternately stacked is formed in the board forming step.

Next, the semiconductor chip3is flipchip-mounted on the wiring board2in a state where the semiconductor chip3faces downward (seeFIG. 8). Specifically, the solder bumps serving as the external electrodes of the semiconductor chip3are bonded to the C4 bumps9,9, . . . of the wiring board2by solder.

Next, the space between the wiring board2and the semiconductor chip3is filled with the underfill resin material15(seeFIG. 9). By filling the space between the wiring board2and the semiconductor chip3with the underfill resin material15, the semiconductor chip3is mounted on the wiring board2in a state where stress generated from a bonding portion by solder is dispersed.

Consequently, the sealing resin layer18is formed in the following manner (seeFIGS. 10 to 16).

The sealing resin layer18is formed by using a mold for formation200, and the mold for formation200includes an upper mold201and a lower mold202(seeFIG. 10). On the upper mold201, a runner201ato be a flow path of a melting resin is formed. The runner201ais a flow path to a cavity203formed when the upper mold201and the lower mold202are jointed to each other.

In the upper mold201, suction holes201b,201b,. . . to a suction mechanism, such as a pump, are formed.

The lower mold202includes a pot202afor pumping of a plunger204. Further, in the lower mold202, a depression part for disposition202bfor disposing the wiring board2is formed.

In the above mold for formation200, first, the wiring board2on which the semiconductor chip3is mounted is inserted and disposed in the depression part for disposition202bin the lower mold202(seeFIG. 10).

Next, a release film20is inserted between the upper mold201and the lower mold202. The release film20is inserted in a position so as to cover the entire wiring board2.

Next, a solid resin tablet18A is input to the pot202ain the lower mold202(seeFIG. 11). The resin tablet18A is a material for forming the sealing resin layer18and is a material that changes into a liquid by being heated.

Consequently, the suction mechanism is operated, air between the upper mold201and the release film20is exhausted from the suction holes201b,201b,. . . , and the release film20is adhered to a formation surface201cof the upper mold201(seeFIG. 12). In this manner, by using the release film20, the sealing resin layer18can be formed without a touch between the formation surface201cand the later-described melting resin with which the cavity203is to be filled later. Therefore, cleaning of the upper mold201is unnecessary, and it is possible to increase the productivity and to reduce the manufacturing cost.

Next, the upper mold201and the lower mold202are jointed to each other to perform mold clamping (seeFIG. 13). By performing the mold clamping, the cavity203is formed and also the release film20is adhered to the top surface of the semiconductor chip3.

Next, in a state where the resin tablet18A is heated and melted, the plunger204is operated so that the resin tablet18A is fluxed to the cavity203from the runner201a(seeFIG. 14). At this time, the resin tablet18A changes into a liquid as a melting resin18B by being heated, and the cavity203formed in the periphery of the semiconductor chip3is filled with the melting resin18B.

Consequently, by performing heating treatment for a fixed time, the melting resin18B in the cavity203is solidified, and the sealing resin layer18is formed in the periphery of the semiconductor chip3(seeFIG. 15).

Lastly, the upper mold201and the lower mold202are parted (seeFIG. 16), and the wiring board2over which the sealing resin layer18is formed is taken out of the mold for formation200.

CONCLUSION

As describe above, in the electronic device100and the semiconductor device1, the though holes16,16, . . . to the heat-conducting material17are formed in the heat-dissipating member4that dissipates heat generated in the semiconductor chip3.

Therefore, when a warp is generated in the semiconductor device1and the heat-conducting material17is separated from the semiconductor chip3, it is possible to repair the separation by injecting the heat-conducting material17from the though holes16,16, . . . , to secure excellent bondability of the heat-conducting material17to the semiconductor chip3, and to secure an excellent heat dissipation property of heat generated in the semiconductor chip3.

Further, since the terminal portion of the though hole16on a side opposite to the heat-conducting material17is formed as the first taper portion16ain which the diameter becomes larger as the terminal portion is farther away from the heat-conducting material17, the heat-conducting material17can be easily injected to the through hole16, and the efficiency of the injection can be increased.

Furthermore, since the first taper portion16ais formed in the though hole16, when the heat sink is disposed over the top surface of the heat-dissipating member4, the bonding strength of heat-conducting material17to the heat sink is increased, excellent conductivity of heat to the heat sink from the heat-conducting material17can be secured, and the heat dissipation performance can be increased.

Moreover, since the terminal portion of the though hole16on the heat-conducting material17side is formed as the second taper portion16ain which the diameter becomes larger as the terminal portion is closer to the heat-conducting material17, the bonding strength of heat-conducting material17to the heat-dissipating member4is increased, excellent conductivity of heat to the heat-dissipating member4from the heat-conducting material17can be secured, and the heat dissipation performance can be increased.

In addition, in the manufacturing process of the semiconductor device1, since it is checked whether the heat-conducting material17is separated from the semiconductor chip2, it is reliably decided whether the heat-conducting material17is separated from the semiconductor chip3, and by injecting the heat-conducting material17from the though holes16,16, . . . only in a case of necessity, the manufacturing efficiency of the semiconductor device1can be increased.

Additionally, the present application may also be configured as below.

(1) A semiconductor device including:

a wiring board including a plurality of alternately stacked insulating layers and wiring layers, the wiring layers being connected to each other by via-plugs;

a semiconductor chip mounted on the wiring board;

a heat-dissipating member that is disposed on a side opposite to the wiring board with the semiconductor chip sandwiched between the wiring board and the heat-dissipating member, and dissipates heat generated in the semiconductor chip;

a sealing resin layer that is bonded to the wiring board and the heat-dissipating member between the wiring board and the heat-dissipating member, and seals the semiconductor chip from an outer periphery side; and

a heat-conducting material that is bonded to the semiconductor chip and the heat-dissipating member between the semiconductor chip and the heat-dissipating member inside the sealing resin layer and conducts heat generated in the semiconductor chip to the heat-dissipating member,

wherein a through hole to the heat-conducting material is formed in the heat-dissipating member.

(2) The semiconductor device according to (1), wherein a terminal portion of the through hole on a side opposite to the heat-conducting material is formed as a taper portion in which a diameter becomes larger as the terminal portion is farther away from the heat-conducting material.

(3) The semiconductor device according to (1), wherein a terminal portion of the through hole on a heat-conducting material side is formed as a taper portion in which a diameter becomes larger as the terminal portion is closer to the heat-conducting material.

(4) The semiconductor device according to any one of (1) to (3), wherein it is checked whether the heat-conducting material is separated from the semiconductor chip.

(5) A method for manufacturing a semiconductor device, the method including:

forming a wiring board including a plurality of alternately stacked insulating layers and wiring layers, the wiring layers being connected to each other by via-plugs;

mounting a semiconductor chip on the wiring board;

forming a sealing resin layer that is bonded to the wiring board and seals the semiconductor chip from an outer periphery side;

attaching, to the semiconductor chip, a heat-dissipating member including a through hole to a heat-conducting material bonded to the semiconductor chip; and

checking whether the heat-conducting material is separated from the semiconductor chip.

(6) An electronic device including:

a circuit board disposed inside an external housing; and

a semiconductor device connected to a predetermined circuit in the circuit board,

wherein the semiconductor device includesa wiring board including a plurality of alternately stacked insulating layers and wiring layers, the wiring layers being connected to each other by via-plugs,a semiconductor chip mounted on the wiring board,a heat-dissipating member that is disposed on a side opposite to the wiring board with the semiconductor chip sandwiched between the wiring board and the heat-dissipating member, and dissipates heat generated in the semiconductor chip,a sealing resin layer that is bonded to the wiring board and the heat-dissipating member between the wiring board and the heat-dissipating member, and seals the semiconductor chip from an outer periphery side, anda heat-conducting material that is bonded to the semiconductor chip and the heat-dissipating member between the semiconductor chip and the heat-dissipating member inside the sealing resin layer and conducts heat generated in the semiconductor chip to the heat-dissipating member,wherein a through hole to the heat-conducting material is formed in the heat-dissipating member.