Systems and methods for valley switching in a switching power converter

A controller may be configured to generate a control signal to activate and deactivate a switch of a switching power converter in order to control a switching period and a peak current of the switching power converter to maintain a regulated current of the switching power converter at a desired current level such that: if the switching period decreases below a minimum switching period, the controller increases the switching period by a ringing period of a voltage of the switch and increases the peak current to compensate for the increase of the switching period in order to maintain the regulated current, and if the peak current increases above a maximum peak current, the controller decreases the switching period by a ringing period of the voltage of the switch and decreases the peak current to compensate for the decrease of the switching period in order to maintain the regulated current.

FIELD OF DISCLOSURE

The present disclosure relates in general to the field of electronics, and more specifically to systems and methods for valley switching in a switching power converter.

BACKGROUND

Many electronic systems include circuits, such as switching power converters or transformers that interface with a dimmer. The interfacing circuits deliver power to a load in accordance with the dimming level set by the dimmer. For example, in a lighting system, dimmers provide an input signal to the lighting system. The input signal represents a dimming level that causes the lighting system to adjust power delivered to a lamp, and, thus, depending on the dimming level, increase or decrease the brightness of the lamp. Many different types of dimmers exist. In general, dimmers generate an output signal in which a portion of an alternating current (“AC”) input signal is removed or zeroed out. For example, some analog-based dimmers utilize a triode for alternating current (“triac”) device to modulate a phase angle of each cycle of an alternating current supply voltage. This modulation of the phase angle of the supply voltage is also commonly referred to as “phase cutting” the supply voltage. Phase cutting the supply voltage reduces the average power supplied to a load, such as a lighting system, and thereby controls the energy provided to the load.

A particular type of a triac-based, phase-cutting dimmer is known as a leading-edge dimmer. A leading-edge dimmer phase cuts from the beginning of an AC cycle, such that during the phase-cut angle, the dimmer is “off” and supplies no output voltage to its load, and then turns “on” after the phase-cut angle and passes phase cut input signal to its load. To ensure proper operation, the load must provide to the leading-edge dimmer a load current sufficient to maintain an inrush current above a current necessary for opening the triac. Due to the sudden increase in voltage provided by the dimmer and the presence of capacitors in the dimmer, the current that must be provided is typically substantially higher than the steady state current necessary for triac conduction. Additionally, in steady state operation, the load must provide to the dimmer a load current to remain above another threshold known as a “hold current” needed to prevent premature disconnection of the triac.

FIG. 1depicts a lighting system100that includes a triac-based leading-edge dimmer102and a lamp142.FIG. 2depicts example voltage and current graphs associated with lighting system100. Referring toFIGS. 1 and 2, lighting system100receives an AC supply voltage VSUPPLYfrom voltage supply104. The supply voltage VSUPPLYindicated by voltage waveform200may be, for example, a nominally 60 Hz/110 V line voltage in the United States of America or a nominally 50 Hz/220 V line voltage in Europe. Triac106acts as a voltage-driven switch, and a gate terminal108of triac106controls current flow between the first terminal110and the second terminal112. A gate voltage VGon the gate terminal108above a firing threshold voltage value VFwill cause triac106to turn ON, in turn causing a short of capacitor121and allowing current to flow through triac106and dimmer102to generate an output current iDIM.

Assuming a resistive load for lamp142, the dimmer output voltage VΦ—DIM, indicated by voltage waveform206, may be zero volts from the beginning of each of half cycles202and204at respective times t0and t2until the gate voltage VGreaches the firing threshold voltage value VF. Dimmer output voltage VΦ—DIMrepresents the output voltage of dimmer102. During time period TOFF, the dimmer102chops or cuts the supply voltage VSUPPLYso that the dimmer output voltage VΦ—DIMremains at zero volts during time period tOFF. At time t1, the gate voltage VGreaches the firing threshold value VF, and triac106begins conducting. Once triac106turns ON, the dimmer voltage VΦ—DIMtracks the supply voltage VSUPPLYduring time period tON.

Once triac106turns ON, the current iDIMdrawn from triac106must exceed an attach current iATTin order to sustain the inrush current through triac106above a threshold current necessary for opening triac106. In addition, once triac106turns ON, triac106continues to conduct current iDIMregardless of the value of the gate voltage VGas long as the current iDIMremains above a holding current value iHC. The attach current value iATTand the holding current value iHCare a function of the physical characteristics of triac106. Once the current iDIMdrops below the holding current value iHC, i.e. iDIM<iHC, triac106turns OFF (i.e., stops conducting), until the gate voltage VGagain reaches the firing threshold value VF. In many traditional applications, the holding current value iHCis generally low enough so that, ideally, the current iDIMdrops below the holding current value iHCwhen the supply voltage VSUPPLYis approximately zero volts near the end of the half cycle202at time t2.

The variable resistor114in series with the parallel connected resistor116and capacitor118form a timing circuit115to control the time t1at which the gate voltage VGreaches the firing threshold value VF. Increasing the resistance of variable resistor114increases the time TOFF, and decreasing the resistance of variable resistor114decreases the time TOFF. The resistance value of the variable resistor114effectively sets a dimming value for lamp142. Diac119provides current flow into the gate terminal108of triac106. The dimmer102also includes an inductor choke120to smooth the dimmer output voltage VΦ—DIM. Triac-based dimmer102also includes a capacitor121connected across triac106and inductor choke120to reduce electro-magnetic interference.

Ideally, modulating the phase angle of the dimmer output voltage VΦ—DIMeffectively turns the lamp142OFF during time period TOFFand ON during time period TONfor each half cycle of the supply voltage VSUPPLY. Thus, ideally, the dimmer102effectively controls the average energy supplied to lamp142in accordance with the dimmer output voltage VΦ—DIM.

Another particular type of phase-cutting dimmer is known as a trailing-edge dimmer. A trailing-edge dimmer phase cuts from the end of an AC cycle, such that during the phase-cut angle, the dimmer is “off” and supplies no output voltage to its load, but is “on” before the phase-cut angle and in an ideal case passes a waveform proportional to its input voltage to its load.

FIG. 3depicts a lighting system300that includes a trailing-edge, phase-cut dimmer302and a lamp342.FIG. 4depicts example voltage and current graphs associated with lighting system300. Referring toFIGS. 3 and 4, lighting system300receives an AC supply voltage VSUPPLYfrom voltage supply304. The supply voltage VSUPPLY, indicated by voltage waveform400, is, for example, a nominally 60 Hz/110 V line voltage in the United States of America or a nominally 50 Hz/220 V line voltage in Europe. Trailing-edge dimmer302phase cuts trailing edges, such as trailing edges402and404, of each half cycle of supply voltage VSUPPLY. Since each half cycle of supply voltage VSUPPLYis 180 degrees of the supply voltage VSUPPLY, the trailing-edge dimmer302phase cuts the supply voltage VSUPPLYat an angle greater than 0 degrees and less than 180 degrees. The phase cut, input voltage VΦ—DIMto lamp342represents a dimming level that causes the lighting system300to adjust power delivered to lamp342, and, thus, depending on the dimming level, increase or decrease the brightness of lamp342.

Dimmer302includes a timer controller310that generates dimmer control signal DCS to control a duty cycle of switch312. The duty cycle of switch312is a pulse width (e.g., times t1-t0) divided by a period of the dimmer control signal (e.g., times t3-t0) for each cycle of the dimmer control signal DCS. Timer controller310converts a desired dimming level into the duty cycle for switch312. The duty cycle of the dimmer control signal DCS is decreased for lower dimming levels (i.e., higher brightness for lamp342) and increased for higher dimming levels. During a pulse (e.g., pulse406and pulse408) of the dimmer control signal DCS, switch312conducts (i.e., is “on”), and dimmer302enters a low resistance state. In the low resistance state of dimmer302, the resistance of switch312is, for example, less than or equal to 10 ohms. During the low resistance state of switch312, the phase cut, input voltage VΦ—DIMtracks the input supply voltage VSUPPLYand dimmer302transfers a dimmer current iDIMto lamp342.

When timer controller310causes the pulse406of dimmer control signal DCS to end, dimmer control signal DCS turns switch312off, which causes dimmer302to enter a high resistance state (i.e., turns off). In the high resistance state of dimmer302, the resistance of switch312is, for example, greater than 1 kiloohm. Dimmer302includes a capacitor314, which charges to the supply voltage VSUPPLYduring each pulse of the dimmer control signal DCS. In both the high and low resistance states of dimmer302, the capacitor314remains connected across switch312. When switch312is off and dimmer302enters the high resistance state, the voltage VCacross capacitor314increases (e.g., between times t1and t2and between times t4and t5). The rate of increase is a function of the amount of capacitance C of capacitor314and the input impedance of lamp342. If effective input resistance of lamp342is low enough, it permits a high enough value of the dimmer current iDIMto allow the phase cut, input voltage VΦ—DIMto decay to a zero crossing (e.g., at times t2and t5) before the next pulse of the dimmer control signal DCS.

In some lighting applications, a dimmer may not be directly coupled to a lamp. For example, in applications in which a lamp comprises a low-power lamp (e.g., halogen or light-emitting diode (LED) lamp), a switching power converter may be interfaced between the dimmer and the lamp to convert the AC input voltage to a direct current (DC) voltage to be delivered to the lamp.FIG. 5depicts a lighting system500that includes a lamp assembly542with a bridge rectifier534and a power converter536for converting an AC voltage input to a DC voltage for delivery to a low-power lamp comprising LEDs532, as is known in the art. As shown inFIG. 5, lighting system500may include a voltage supply504, a dimmer502, and a lamp assembly542. Voltage supply504may generate a supply voltage VSUPPLYthat is, for example, a nominally 60 Hz/110 V line voltage in the United States of America or a nominally 50 Hz/220 V line voltage in Europe.

Dimmer502may comprise any system, device, or apparatus for generating a dimming signal to other elements of lighting system500, the dimming signal representing a dimming level that causes lighting system500to adjust power delivered to a lamp, and, thus, depending on the dimming level, increase or decrease the brightness of LEDs532. Thus, dimmer502may include a leading-edge dimmer similar to that depicted inFIG. 1, a trailing-edge dimmer similar to that depicted inFIG. 3, or any other suitable dimmer.

Lamp assembly542may comprise any system, device, or apparatus for converting electrical energy (e.g., delivered by dimmer502) into photonic energy (e.g., at LEDs532). For example, lamp assembly542may comprise a multifaceted reflector form factor (e.g., an MR16 form factor) with a lamp comprising LEDs532. As shown inFIG. 5, lamp assembly542may include a bridge rectifier534, a power converter536, and a switch state controller512.

Bridge rectifier534may comprise any suitable electrical or electronic device as is known in the art for converting the whole of alternating current voltage signal VΦ—DIMinto a rectified voltage signal vREChaving only one polarity.

Power converter536may comprise any system, device, or apparatus configured to convert an input voltage (e.g., vREC) to a different output voltage (e.g., vOUT) wherein the conversion is based on a control signal (e.g., a pulse-width modulated control signal communicated from switch state controller512). Accordingly, power converter536may comprise a boost converter, a buck converter, a boost-buck converter, or other suitable power converter.

LEDs532may comprise one or more light-emitting diodes configured to emit photonic energy in an amount based on the voltage vOUTacross the LEDs532.

Switch-state controller512may comprise any system, device, or apparatus configured to determine one or more characteristics of voltage vRECpresent at the input of power converter536and control an amount of current iRECdrawn by power converter536based on such one or more characteristics of voltage vREC.

In some embodiments, power converter536may comprise a switching power converter, such as a buck converter536A, as shown inFIG. 6. As shown inFIG. 6, a buck-type power converter536A may comprise a switch608that may operate in response to a control signal CSto regulate the transfer of energy from the rectified, time-varying input voltage VREC, through inductor610to capacitor606. Power converter536A may also include a diode611that prevents reverse current flow from capacitor606into inductor610. Energy transferred through inductor610may be stored by capacitor606. Capacitor606may have sufficient capacitance to maintain an approximately constant voltage VOUT(e.g., lesser than the peak of input voltage VREC) while providing current to LEDs532.

In operation, inductor current iLmay vary over time, with a peak input current proportionate to the “on-time” of switch608and with the energy transferred to capacitor606proportionate to the “on-time” squared. As shown inFIG. 6, in some implementations switch608may comprise n-channel field effect transistor (FET), and control signal CSis a pulse-width modulated (PWM) control signal that causes switch608to conduct when control signal CSis high. Thus, in such implementations, the “on-time” of switch608may be determined by the pulse width of control signal CS, and the energy transferred from VRECto capacitor606may be proportionate to a square of the pulse width of control signal CS.

Control signal CSmay be generated by switch state controller512, with a goal of causing switching power converter536A to transfer a desired amount of energy to capacitor606, and thus, to LEDs532. The desired amount of energy may depend upon the voltage and current requirements of LEDs532. To provide power factor correction close to one, switch state controller512may generally seek to control input current iRECso that input current iRECtracks input voltage VRECwhile holding capacitor voltage VOUTconstant. Accordingly, input current iRECand peak inductor current iLmay each be proportional to the conduction period of dimmer502(e.g., the period of time in which dimmer502is on and conducts current).

In implementations in which switch608is implemented with a FET, one known problem is that the inherent capacitance of the FET undesirably resonates with inductor610after input current in inductor610is demagnetized. A known technique to minimize such resonance and to reduce the attendant switching losses is sometimes referred to as “valley switching” in which control signal CSis controlled to turn on switch608when the drain-to-source voltage VDSof switch608reaches its minimum value.

Referring now toFIG. 7, there is depicted a timing diagram illustrating the concept of valley switching, as is known in the art. In the absence of valley switching, switch state controller512may operate so as to maintain a target switching period TT for a particular dimmer control setting. The period TT may be equal to the sum of interval T1, T2, and T3, wherein T1is an interval of time in which switch608is activated and conducts current, T2is an interval of the time in which switch608is deactivated and current iLflows while inductor610is demagnetized, and T3is an interval of time, which may be referred to as a valley interval, in which no current iLflows. However, when implementing valley switching, a valley of drain-to-source voltage VDSmay occur before or after the end of target switching period TT. Accordingly, to implement valley switching, switch state controller512may assert control signal CSto activate switch608before or after the end of target switching period TT, thus modifying the desired switching period by an error TTerr, thus reducing or extending the switching period to obtain an actual switching period TT′. Accordingly, conventional valley-switching techniques lead to reduction or addition in the average current supplied to LEDs532from an intended amount. Thus, maintaining constant voltage regulation for a load (e.g., LEDs532) while performing valley switching is a challenge if switching periods may become quantized to specific valleys. Another challenge is to maintain valley switching throughout an entire phase angle range of a dimmer while maintaining desired output regulation.

SUMMARY

In accordance with the teachings of the present disclosure, certain disadvantages and problems associated with power efficiency in valley switching of switching power converters may be reduced or eliminated.

In accordance with embodiments of the present disclosure, an apparatus may include a switching power converter and a controller. The switching power converter may be configured to transfer energy from an input of the power converter to a load coupled to the power converter in conformity with a regulated current, the switching power converter comprising a switch and an energy storage device, wherein the regulated current is a function of a switching period of the switching power converter and a peak current of the energy storage device during the switching period. The controller may be configured to generate a control signal to activate and deactivate the switch in order to control the switching period and the peak current to maintain the regulated current at a desired current level such that: if the switching period decreases below a minimum switching period, the controller increases the switching period by a ringing period of a voltage of the switch and increases the peak current to compensate for the increase of the switching period in order to maintain the regulated current, and if the peak current increases above a maximum peak current, the controller decreases the switching period by a ringing period of the voltage of the switch and decreases the peak current to compensate for the decrease of the switching period in order to maintain the regulated current.

In accordance with these and other embodiments of the present disclosure, a method may include comprising activating and deactivating a switch of a switching power converter in order to control a switching period and peak current of the switching power converter in order to maintain a regulated current of the switching power converter at a desired current level such that: if the switching period decreases below a minimum switching period, increasing the switching period by a ringing period of a voltage of the switch and increasing the peak current to compensate for the increase of the switching period in order to maintain the regulated current, and if the peak current increases above a maximum peak current, decreasing the switching period by a ringing period of the voltage of the switch and decreasing the peak current to compensate for the decrease of the switching period in order to maintain the regulated current.

Technical advantages of the present disclosure may be readily apparent to one of ordinary skill in the art from the figures, description and claims included herein. The objects and advantages of the embodiments will be realized and achieved at least by the elements, features, and combinations particularly pointed out in the claims.

DETAILED DESCRIPTION

FIG. 8depicts a lighting system800with improved valley switching techniques, in accordance with embodiments of the present disclosure. As shown inFIG. 8, lighting system800may include a voltage supply804, a dimmer802, and a lamp assembly842. Voltage supply804may generate a supply voltage VSUPPLYthat is, for example, a nominally 60 Hz/110 V line voltage in the United States of America or a nominally 50 Hz/220 V line voltage in Europe.

Dimmer802may comprise any system, device, or apparatus for generating a dimming signal to other elements of lighting system800, the dimming signal representing a dimming level that causes lighting system800to adjust power delivered to a lamp, and, thus, depending on the dimming level, increase or decrease the brightness of LEDs832. Thus, dimmer802may include a leading-edge dimmer similar to that depicted inFIG. 1, a trailing-edge dimmer similar to that depicted inFIG. 3, or any other suitable dimmer.

Lamp assembly842may comprise any system, device, or apparatus for converting electrical energy (e.g., delivered by dimmer802) into photonic energy (e.g., at LEDs832). For example, lamp assembly842may comprise a multifaceted reflector form factor (e.g., an MR16 form factor) with a lamp comprising LEDs832. As shown inFIG. 8, lamp assembly842may include a bridge rectifier834, a power converter836, and a switch state controller812.

Bridge rectifier834may comprise any suitable electrical or electronic device as is known in the art for converting the whole of alternating current voltage signal VΦ—DIMinto a rectified voltage signal vREChaving only one polarity.

Power converter836may comprise any system, device, or apparatus configured to convert an input voltage (e.g., vREC) to a different output voltage (e.g., vOUT) wherein the conversion is based on a control signal (e.g., a pulse-width modulated control signal communicated from switch state controller812). Although power converter836is depicted inFIG. 8as a buck converter, power converter836may comprise a boost converter, a buck converter, a boost-buck converter, or other suitable power converter. In a buck-type implementation, as shown inFIG. 8, power converter836may comprise a switch808(e.g., an n-type field effect transistor) that may operate in response to a control signal CS(e.g., a pulse-width modulated control signal) received from switch state controller812to regulate the transfer of energy from the rectified, time-varying input voltage VREC, through inductor810to capacitor806. Power converter836may also include a diode811that prevents reverse current flow from capacitor806into inductor810. Energy transferred through inductor810may be stored by capacitor806. Capacitor806may have sufficient capacitance to maintain an approximately constant voltage VOUT(e.g., lesser than the peak of input voltage VREC) while providing current to LEDs832.

LEDs832may comprise one or more light-emitting diodes configured to emit photonic energy in an amount based on the voltage vOUTacross the LEDs832.

Switch-state controller812may comprise any system, device, or apparatus configured to determine one or more characteristics of voltage vRECpresent at the input of power converter836and control an amount of current iRECdrawn by power converter836based on such one or more characteristics of voltage vREC. Functionality of switch-state controller812is set forth in more detail below.

In operation, switch state controller812may generate control signal CS, with a goal of causing switching power converter836to transfer a desired amount of energy to capacitor806, and thus, to LEDs832. Accordingly, inductor current iLmay vary over time, with a peak input current proportionate to the “on-time” of switch808and with the energy transferred to capacitor806proportionate to the “on-time” squared. The desired amount of energy may depend upon the voltage and current requirements of LEDs832. To provide power factor correction close to one, switch state controller812may generally seek to control input current iRECso that input current iRECtracks input voltage VRECwhile holding capacitor voltage VOUTconstant. Thus, input current iRECand peak inductor current iLmay each be proportional to the conduction period of dimmer802(e.g., the period of time in which dimmer802is on and conducts current).

The regulated LED current is an average of the inductor current feeding directly to the load. For a buck converter, such LED current iOUTis given by:
Iout=dim*Ifullscale=0.5*Ipk*(TTcrit/TT′)
where dim is a dimmer phase angle normalized to 1 (e.g., has a value between 0 and 1), Ifullscaleis a full-scale output current for LEDs832, Ipkis the peak value of inductor current iL, TTcritis the critical conduction switching period (e.g., intervals T1and T2in FIG.7) and TT′ is the overall actual switching period (e.g., intervals T1, T2, and T3inFIG. 7).

To regulate output current for a given phase angle of dimmer802, controller812may scale the peak inductor current Ipkand actual switching period TT′. The peak inductor current may thus be given as:
Ipk=(Ifullscale/Dimfullscale)*dim+ipk-offset
where Dimfullscaleis the fullscale value of dim (which, in some cases may be 1) and ipk-offsetis a current error term that takes into account the difference between a desired average current Ioutduring a target switching period TT and an actual current of Ioutduring an actual switching period TT′, to offset effects of actual switching periods TT′ that are quantized to valleys in order to provide accurate load regulation.

Thus, controller812may cause peak inductor current Ipkto scale linearly with the dimmer phase angle dim, which also may also cause critical conduction period TTcritto also vary linearly with dimmer phase angle dim. As a result, actual switching period TT′ may also scale linearly with dimmer phase angle dim for a fixed valley interval T3. Accordingly, an actual switching period TT′ can be quantized to a fixed valley interval T3while scaling peak inductor current Ipkto achieve load regulation.

For example, in the case of decreases of dimmer phase angle dim, controller812may cause peak current Ipkto scale down linearly with dimmer phase angle dim. As actual switching period TT′ scales down linearly with dim for a fixed valley interval T3, it is possible for actual switching period TT′ to decrease to a minimum switching period TTmin(or a maximum switching frequency value) which may be a criterion for increasing the existing number of valleys by one. In doing so, actual switching period TT′ may increase by one inductor-parasitic capacitor (LC) ringing period of the drain-source voltage VDSand may in turn cause a decrease in load current iOUT. Controller812may compensate for this transient effect by increasing peak inductor current Ipkin order to maintain constant output current regulation. The same linear peak current profile as a function of dimmer phase angle dim may be carried out with the new peak inductor current Ipkuntil the minimum switching period is again met which may prompt controller812to seek the next valley.FIG. 9illustrates example graphs plotting profiles of peak inductor current Ipk, switching frequency (e.g., 1/TT′), load current iOUT, and current error ipk-offsetversus dimmer phase angle dim. InFIG. 9, N represents an LC ringing valley at which valley switching occurs (e.g., at which an actual switching period TT′ ends and a new one begins).

As another example, in the case of increases of dimmer phase angle dim, controller812may cause peak current Ipkto scale up linearly with dimmer phase angle dim, such that switching period TT′ scales up linearly with dim for a fixed valley interval T3. In doing so, it is possible for peak current Ipkto increase to a maximum inductor peak current limit which becomes the criterion for decreasing the number of valleys by one. Thus, upon reaching the criterion, actual switching period TT′ may decrease by one LC ringing period of the drain-source voltage VDSand may in turn cause an increase in load current iOUT. Controller812may compensate for this transient effect by decreasing peak inductor current Ipkin order to maintain constant output current regulation. The same linear peak current profile as a function of dimmer phase angle dim may be carried out with the new peak inductor current Ipkuntil the maximum inductor peak current limit is again met which may prompt controller812to seek the next valley.FIG. 10illustrates example graphs plotting profiles of peak inductor current Ipk, switching frequency (e.g., 1/TT′), load current iOUT, and current error ipk-offsetversus dimmer phase angle dim. InFIG. 10, N represents an LC ringing valley at which valley switching occurs (e.g., at which an actual switching period TT′ ends and a new one begins).

FIG. 11illustrates a block diagram of a method1100for regulating a load current in the lighting system ofFIG. 8, in accordance with embodiments of the present disclosure. Method1100may be implemented by controller812. As shown inFIG. 11, controller812may implement a feedback loop1102for regulating load current iOUT, and a valley switching block1104for determining which LC ringing valley to switch. Feedback loop1102may regulate load current iOUTby regulating peak inductor current Ipkbased on dimmer phase angle dim and full-scale output current Ifullscale, which may be multiplied together by multiplier1106to generate a target peak inductor current, and current error Ipk-offset, which may be subtracted from the target peak inductor current by combiner1108. Current error Ipk-offsetmay be calculated by integrating with integrator1112the switching period error TTerrgenerated by combiner1110which is equal to the difference of actual switching period TT′ (determined by valley switching control block1104) and target switching period TT, and multiplying the integrated switching period error by a gain block1114having gain K, which effectively translates the integrated switching period error into a corresponding current error Ipk-offset.

Controller812may determine target switching period TT based on dimmer phase angle dim and peak inductor current Ipk. For example, based on a topology of switching power converter836, a multiplexer1122may output one of the interval T2or the interval of critical conduction period TTcrit. For example, if the topology of switching power converter836is a buck converter, as shown inFIG. 8, multiplexer1122may output the interval of critical conduction period TTcrit. On the other hand, if switching power converter836employs a flyback topology, multiplexer1122may output the interval T2. The value output by multiplexer1122may be multiplied by peak inductor current Ipkat multiplier1116and inverse of the dimmer phase angle dim at multiplier1118, generating an intermediate result. The value of this intermediate result may then be multiplied at block1120by a constant GTTto generate target switching period TT. The constant GTTis a constant that may provide a user or a circuit designer programmability in choosing valley interval T3. For example, for a buck topology, GTTmay equal TT/(T1+T2).

In valley switching control block1104, a comparator1124may compare actual switching period TT′ to a minimum switching period TTminand generate a signal indicative of the comparison. Likewise, a comparator1126may compare peak inductor current Ipkto a maximum peak inductor current Ipk-maxand generate a signal indicative of the comparison. The signal generated by comparator1126may be multiplied by −1 by a gain block1128. Accordingly, an accumulator1130may increment by 1 if actual switching period TT′ is less than minimum switching period TTmin, and may decrement by 1 if peak inductor current Ipkexceeds maximum peak inductor current Ipk-maxin order to determine the ringing valley N at which switching shall occur. The value N may be multiplied by the LC ringing period of drain-source voltage VDSby gain block1132, the result being added by combiner1134to the intervals T1and T2to generate actual switching period TT′. Controller812may then generate an appropriate control signal Csin order to cause switching power converter836to operate at the actual switching period TT′ calculated by valley switching control block1104with a peak inductor current Ipkcalculated by feedback loop1102.

Thus, at the time of transition of switching from one valley to another, closed feedback loop1102may appropriately increase or decrease peak inductor current Ipk to maintain load regulation within a few switching cycles of control signal Cs (e.g., as limited by a bandwidth of integrator1112).

Among the advantages of the methods and systems set forth herein are that they may provide a simple and robust control scheme wherein only the inductor current profile is defined based on dimmer phase angle. In addition, in accordance with these methods and systems, there may be minimal transient flicker observed in the output current iOUTwhen controller812causes switching to change from one valley to another, because the compensation carried out by feedback loop1102may take immediate action by increasing or decreasing peak inductor current Ipkwithin a few switching cycles to maintain load regulation. Furthermore, the approach employed by these methods and systems may lead to a reduction in power dissipation of switch808, as compared to existing approaches.

As used herein, when two or more elements are referred to as “coupled” to one another, such term indicates that such two or more elements are in electronic communication whether connected indirectly or directly, with or without intervening elements.