Input device for electronic apparatus

An input device for electronic apparatus includes key signal output lines each having plural key switches connected thereto and circuitry for identifying the same key signal under the control of plural keys.

BACKGROUND OF THE INVENTION 
1. Field of the Invention 
This invention relates to an input device for electronic apparatus. 
2. Description of the Prior Art 
The recent advancement in the performance of electronic apparatus such as 
electronic calculators brought about by the progress of the large-scale 
integrated circuits is resulting in the increase in number of the key 
switches constituting a part of the input device. Therefore, for example 
in calculators capable of functional calculations, a compact structure is 
generally achieved by the use of double- or triple-function keys wherein 
each key performs plural functions by combinations with other keys. 
Also the increase in number of keys leads to the increase in number of 
input/output ports of the large-scale integrated circuit, and the use of 
the above-mentioned double- or triple-function keys has been an effective 
measure for preventing such increase. However multiple functions 
represented by a single key are difficult to learn for the users and 
inevitably lead to complicated and easily mistakable operations. 
SUMMARY OF THE INVENTION 
An object of the present invention is to provide electronic apparatus 
provided with a key input device wherein each key represents a single 
function without increasing the number of input/output ports of the 
large-scale integrated circuit. 
The present invention will be better understood in view of the following 
description of an embodiment thereof represented in the accompanying 
drawings.

DESCRIPTION OF THE PREFERRED EMBODIMENTS 
FIG. 1 shows a front view of an electronic calculator embodying the present 
invention. At use, after a power switch (not shown) is turned on, a clear 
key K51 is actuated for "all clear", whereby the calculator is placed in 
the ordinary arithmetic calculation mode in which the keys K12 (1/x), K22 
(.sqroot. ), K32 (x), K42 (+) and K52 (=) can be used. In this state the 
keys K12' (n), K22' (x), K32' (.rho.x), K42' (.SIGMA.x.sup.2) and K52' 
(DATA/DEL), which are not used in this mode, are designed to perform, if 
they are actuated, the respectively same functions as those of the 
above-mentioned keys K12, K22, K32, K42 and K52. Upon actuation of a key 
K11 (STAT) for shifting the calculator to the statistical calculation 
mode, keys K12', K22', K32', K42' and K52' respectively perform the 
functions of entering instructions for calculation of data number, 
calculation standard deviation, calculation of total summation, 
calculation of total square summation and data input or correction in the 
statistical calculations. Similarly in this state the above-mentioned keys 
K12, K22, K32, K42 and K52 for arithmetic calculation, which are not used 
in this mode, are designed to perform, if they are actuated, the same 
functions as those of keys K12', K22', K32', K42' and K52'. 
In this manner each key represents a single function so that the input 
device is easy to learn and unmistakable, and still it is not necessary to 
increase the number of input/output ports of the large-scale integrated 
circuit. The above-explained arrangement will be further explained in 
connection with FIGS. 2 and 3. 
FIG. 2 shows a schematic circuit diagram of the key arrangement for 
obtaining the above-explained easily usable key input device while FIG. 3 
shows a printed circuit board therefor, wherein T1 to T5 designate 
circuits for timing signals, which are shown in FIG. 4, for key matrix 
scanning to be released from a central processing unit CPU, and C1 to C5 
denote key signal output lines constituting the rows of the key matrix and 
functioning as key signal input ports for processing unit CPU. As shown in 
FIG. 2, the keys K12 (1/x) and K12' (n), for example, are connected in 
parallel. 
Referring to FIG. 3, a printed circuit board PCB of the keyboard unit is 
provided with printed circuits on both faces thereof, wherein a solid line 
L1 indicates a printed pattern on the top face while a broken line L2 is a 
printed pattern on the bottom face, which patterns are mutually connected 
by means of through-holes H1, H2. On the upper end of the printed circuit 
board there are shown input and output terminals C1I-C5I and T10-T50 for 
the keys. The combined fork-shaped patterns connected to the terminals 
constitute the key contacts, on which there will be provided an 
electroconductive rubber sheet. Upon pressing for example a key K14 (0), 
the electroconductive rubber comes into contact with the pattern P0 to 
connect electrically the corresponding fork-shaped patterns thereby 
generating a key signal T1.times.C4. In a similar manner 25 different key 
signals can be introduced into the processing unit CPU by the combination 
of 5 different timings T10-T50 and 5 different positions C1I-C5I. The 
arrangement of these contact patterns P corresponds to the key arrangement 
shown in FIG. 1. 
As shown in FIG. 2, the keys K52 (=) and K52' (DATA/DEL) for example are 
both connected to the same signal lines T5 and C2. This is realized on the 
printed circuit board shown in FIG. 3 by connecting the terminal C21 to a 
contact pattern P=C for the key K52 (=) and also to a contact pattern PDC 
for the key K52' (DATA/DEL) and the terminal T50 to another contact 
pattern P=T of key K52 and also to another contact pattern PDT of key 
K52', thus achieving the parallel connection of keys K52 and K52'. 
Similarly the keys K12 (1/x) and K12' (n) are connected in common to the 
terminals T20 and C2I, and other keys are also connected in pairs of 
K22-K22', K32-K32' and K42-K42'. The printed patterns from the contacts of 
these keys to respective terminals are omitted from the drawing for the 
purpose of clarity. 
In FIG. 2 there is provided a flip-flop FF for storing a signal 
representative of the calculating mode which is set, upon actuation of a 
key STAT for selecting the statistical calculation mode, in response to 
the opening of an AND gate A11 at a time T10 shown in FIG. 4, and is 
reset, upon actuation of a clear key C in response to the opening of an 
AND gate A15 at the time T50 shown in FIG. 4. The processing unit CPU 
performs the statistical calculations upon receipt of a level "1" signal 
from the port Q of flip-flop FF. 
Set signal Q, a high level enables an AND gate A2Q, and complement signal 
Q, a low level, disables an AND gate A2Q whereby the output signal line 
C2Q is placed at the level "0". Consequently the actuation of either the 
key K12 or K12', for example, results in an output signal T10.times.C2I on 
the output signal line C2Q. In this manner the processing unit CPU 
identifies the actuation of the key K12' (n) or K12 (1/x) and also 
identifies the statistical calculation mode from the zero output signal on 
the signal line C2Q, thus performing the calculation of data number in the 
statistical calculation mode. In a similar manner the processing unit CPU 
identifies four other instructions for x, .SIGMA.x, .SIGMA.x.sup.2 and 
DATA/DEL by receiving the zero signal from the line C2Q and also receiving 
the output signal from the line C2Q respectively at the timing T20, T30, 
T40 or T50. As already explained in the foregoing, such an instruction 
signal can be supplied from either of paired keys K22'-K22, K32'-K32, 
K42'-K42 or K52'-K52. 
Upon actuation of the key K51 (C) for shifting the calculator to the 
arithmetic calculation mode, the flip-flop FF is reset to disable the AND 
gate A2Q and to enable the AND gate A2Q, whereby the processing unit CPU 
identifies the arithmetic calculation mode from the zero signal level on 
the signal line C2Q. Also in this state, as explained in the foregoing, 
the processing unit CPU is capable of identifying five different key 
signals from the arithmetic instruction keys K12, K22, K32, K42 and K52 to 
be supplied on the line C2Q respective at the time T10, T20, T30, T40 and 
T50. In this state, as aforementioned, the signals generated by the 
actuation of the keys K12', K22', K32', K42' and K52' are supplied to the 
processing unit CPU as the instructions for arithmetic calculations 1/x, 
.sqroot. , x, + and =. 
As discussed in the foregoing, the present invention overcomes the 
difficulty in learning and in use of conventional double- or 
triple-function keys each representing multiple functions without 
increasing the number of input/output ports of the central processing 
unit, thereby providing electronic apparatus equipped with an easily 
usable key input device.