Semiconductor device and method of manufacturing the same

According to one embodiment, a semiconductor device includes first, second, third electrodes, a semiconductor member, and a first compound member. The third electrode is between the first and second electrodes in a first direction from the first to second electrodes. The semiconductor member includes first and second semiconductor regions. The first semiconductor region includes first, second, third, fourth, and fifth partial regions. A second direction from the first partial region to the first electrode crosses the first direction. The fourth partial region is between the first and third partial regions in the first direction. The fifth partial region is between the third and second partial regions in the first direction. The second semiconductor region includes first and second semiconductor portions. The first compound member includes first, second and third compound regions.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is based upon and claims the benefit of priority from Japanese Patent Application No. 2020-208394, filed on Dec. 16, 2020; the entire contents of which are incorporated herein by reference.

FIELD

Embodiments described herein relate generally to a semiconductor device and a manufacturing method thereof.

BACKGROUND

There are semiconductor devices such as transistors that use nitride semiconductors. In semiconductor devices, improvement in characteristics is desired.

DETAILED DESCRIPTION

According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a semiconductor member, and a first compound member. A position of the third electrode in a first direction from the first electrode to the second electrode is between a position of the first electrode in the first direction and a position of the second electrode in the first direction. The semiconductor member includes a first semiconductor region and a second semiconductor region. The first semiconductor region includes Alx1Ga1−x1N (0≤x1<1). The first semiconductor region includes a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region. A second direction from the first partial region to the first electrode crosses the first direction. A direction from the second partial region to the second electrode is along the second direction. A direction from the third partial region to the third electrode is along the second direction. A position of the fourth partial region in the first direction is between a position of the first partial region in the first direction and a position of the third partial region in the first direction. A position of the fifth partial region in the first direction is between the position of the third partial region in the first direction and a position of the second partial region in the first direction. The second semiconductor region includes Alx2Ga1−x2N (0<x2≤1, x1<x2). The second semiconductor region includes a first semiconductor portion and a second semiconductor portion. A direction from the fourth partial region to the first semiconductor portion is along the second direction. A direction from the fifth partial region to the second semiconductor portion is along the second direction. The first compound member includes aluminum, silicon and oxygen. The first compound member includes a first compound region, a second compound region and a third compound region. The first compound region is between the fourth partial region and at least a part of the third electrode in the first direction. The second compound region is between the at least the part of the third electrode and the fifth partial region in the first direction. The third compound region is between the third partial region and the third electrode in the second direction. The first compound region includes a first face and a first side face. The first face faces the third partial region. The first side face faces the fourth partial region. A first angle between the first face and the first side face is less than 90 degrees.

According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a semiconductor member, a first compound member, and an intermediate region. A position of the third electrode in a first direction from the first electrode to the second electrode is between a position of the first electrode in the first direction and a position of the second electrode in the first direction. The semiconductor member includes a first semiconductor region and a second semiconductor region. The first semiconductor region includes Alx1Ga1−x1N (0≤x1<1). The first semiconductor region includes a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region. A second direction from the first partial region to the first electrode crosses the first direction. A direction from the second partial region to the second electrode is along the second direction. A direction from the third partial region to the third electrode is along the second direction. A position of the fourth partial region in the first direction is between a position of the first partial region in the first direction and a position of the third partial region in the first direction. A position of the fifth partial region in the first direction is between the position of the third partial region in the first direction and a position of the second partial region in the first direction. The second semiconductor region includes Alx2Ga1−x2N (0<x2≤1, x1<x2). The second semiconductor region includes a first semiconductor portion and a second semiconductor portion. A direction from the fourth partial region to the first semiconductor portion is along the second direction. A direction from the fifth partial region to the second semiconductor portion is along the second direction. The first compound member includes aluminum, silicon and oxygen. The first compound member includes a first compound region, a second compound region and a third compound region. The first compound region is between the fourth partial region and at least a part of the third electrode in the first direction. The second compound region is between the at least the part of the third electrode and the fifth partial region in the first direction. The third compound region is between the third partial region and the third electrode in the second direction. The intermediate region is between the third partial region and the third compound region. The intermediate region includes a first intermediate portion and a second intermediate portion. The second intermediate portion is between the first intermediate portion and the third compound region in the second direction. The first intermediate portion includes Ga, N, O and Al. The second intermediate portion includes Ga, N, O, Al and Si. The first intermediate portion does not include Si, or a concentration of Si at the first intermediate portion is lower than a concentration of Si at the second intermediate portion.

According to one embodiment, a method of manufacturing a semiconductor device is disclosed. The method can include preparing a first structure body. The first structure body includes a base semiconductor layer being a part of a semiconductor member, and a first compound member, the base semiconductor layer including Alx3Ga1−x3N (0≤x3<1) and including an upper face, the first compound member being provided on the upper face and including aluminum, silicon, and oxygen. The method can include removing a part of the first compound member to expose a part of the base semiconductor layer. The method can include growing another part of the semiconductor member from the exposed part of the base semiconductor layer. The semiconductor member includes a first semiconductor region provided on the part of the base semiconductor layer and including Alx1Ga1−x1N (0≤x1<1), and a second semiconductor region provided on the first semiconductor region and including Alx2Ga1−x2N (0<x2<1, x1<x2, x3<x2). The method can include making a hole in the first compound member after the growing the other part of the semiconductor member, and filling a conductive member in the hole.

First Embodiment

FIG.1is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment.

As shown inFIG.1, the semiconductor device110according to the embodiment includes a first electrode51, a second electrode52, a third electrode53, a semiconductor member10M, and a first compound member41. In this example, the semiconductor device110includes a second compound member42. The second compound member42is provided as needed and may be omitted.

The direction from the first electrode51to the second electrode52is taken as a first direction. The first direction is, for example, an X-axis direction. One direction perpendicular to the X-axis direction is taken as the Z-axis direction. The direction perpendicular to the X-axis direction and the Z-axis direction is the Y-axis direction.

The position of the third electrode53in the first direction (X-axis direction) is between the position of the first electrode51in the first direction and the position of the second electrode52in the first direction. For example, at least a part of the third electrode53is between the first electrode51and the second electrode52in the first direction.

The semiconductor member10M includes a first semiconductor region10and a second semiconductor region20.

The first semiconductor region10includes Alx1Ga1−x1N (0≤x1<1). The first semiconductor region10includes, for example, GaN. The Al composition ratio in the first semiconductor region10is, for example, not less than 0 and not more than 0.05.

The first semiconductor region10includes a first partial region11, a second partial region12, a third partial region13, a fourth partial region14and a fifth partial region15. The second direction from the first partial region11to the first electrode51crosses the first direction (X-axis direction). The second direction is, for example, the Z-axis direction.

The direction from the second partial region12to the second electrode52is along the second direction. The direction from the third partial region13to the third electrode53is along the second direction.

The position of the fourth partial region14in the first direction (X-axis direction) is between the position of the first partial region11in the first direction and the position of the third partial region13in the first direction. The position of the fifth partial region15in the first direction is between the position of the third partial region13in the first direction and the position of the second partial region12in the first direction. The partial areas are continuous, for example.

The second semiconductor region20includes Alx2Ga1−x2N (0<x2≤1, x1<x2). The second semiconductor region20includes, for example, AlGaN. The Al composition ratio in the second semiconductor region20is more than 0.05 and not more than 1, for example.

The second semiconductor region20includes a first semiconductor portion21and a second semiconductor portion22. The direction from the fourth partial region14to the first semiconductor portion21is along the second direction (for example, the Z-axis direction). The direction from the fifth partial region15to the second semiconductor portion22is along the second direction.

The first compound member41includes aluminum, silicon, and oxygen. The first compound member41includes, for example, AlSiO. For example, the first compound member41includes Al1−z2Siz2O (0<z2<1). As described later, the Si composition ratio z2 in the first compound member41may be not less than 0.2 and not more than 0.8.

The first compound member41includes a first compound region41a, a second compound region41b, and a third compound region41c. The first compound region41ais between the fourth partial region14and at least a part of the third electrode53in the first direction (X-axis direction). The second compound region41bis between the at least the part of the third electrode53and the fifth partial region15in the first direction. The third compound region41cis between the third partial region13and the third electrode53in the second direction (Z-axis direction). These compound regions may be continuous with each other.

In the case where the second compound member42is provided, the second compound member42is provided between the third partial region13and the third compound region41cin the second direction (Z-axis direction). The second compound member42includes gallium and oxygen. The second compound member42includes, for example, GaO. The second compound member42may include GaOx, for example.

The current flowing between the first electrode51and the second electrode52is controlled by the potential of the third electrode53. The potential of the third electrode53is, for example, a potential based on the potential of the first electrode51. One of the first electrode51and the second electrode52is, for example, a source electrode. The other of the first electrode51and the second electrode52is, for example, a drain electrode. The third electrode53is, for example, a gate electrode. The second compound member42becomes, for example, a part of the gate insulating film. The first compound member41becomes, for example, another part of the gate insulating film. The semiconductor device110is, for example, a transistor. For example, the first semiconductor region10includes a portion facing the second semiconductor region20. A carrier region (for example, a two-dimensional electron gas) is generated in this portion. The semiconductor device110is, for example, a HEMT (High Electron Mobility Transistor).

For example, the c-axis direction of the semiconductor member10M is along the second direction (Z-axis direction). The angle between the c-axis direction and the Z-axis direction is not more than 10 degrees. The carrier region is formed due to the difference in composition between the first semiconductor region10and the second semiconductor region20.

The first electrode51is electrically connected to the first semiconductor portion21, for example. The second electrode52is electrically connected to the second semiconductor portion22, for example.

As shown inFIG.1, in the embodiment, the outer side face of the first compound region41ahas an inverse tapered shape. In this example, the outer side face of the second compound region41balso has an inverse tapered shape.

For example, the first compound region41aincludes a first face F1and a first side face SF1. The first face F1faces the third partial region13. In the case where the second compound region42is provided, the first face F1faces the second compound member42. The first side face SF1faces the fourth partial region14. An angle between the first face F1and the first side face SF1is a first angle θ1. The first angle θ1is smaller than 90 degrees. The first angle θ1may be not more than 88 degrees, for example. The first angle θ1may be not more than 85 degrees, for example.

Thus, it was found that, for example, a high threshold value can be obtained by forming the outer side face of the first compound member41on the reverse taper. According to the embodiment, for example, it is possible to provide a semiconductor device whose characteristics can be improved.

FIG.2is a graph illustrating the characteristics of the semiconductor device.

The horizontal axis ofFIG.2is the bias voltage Vb applied to the third electrode53. The bias voltage Vb is a voltage based on the potential of the first electrode51. The vertical axis ofFIG.2represents the current I1flowing between the first electrode51and the second electrode52.FIG.2illustrates the measurement results of the first sample SP1and the second sample SP2. In the first sample SP1, the above first angle θ1is smaller than 90 degrees. In the first sample SP1, the first angle θ1is 85 degrees. In the second sample SP2, the first angle θ1is larger than 90 degrees. In the second sample SP2, the first angle θ1is 150 degrees.

As shown inFIG.2, the threshold voltage in the first sample SP1is higher than the threshold voltage in the second sample SP2. As described above, when the side face of the gate insulating film (for example, the first side face SF1of the first compound region41a) has an inverse tapered shape, a high threshold value can be obtained.

For example, when the side face of the gate insulating film (for example, the first side face SF1of the first compound region41a) has an inverse taper shape, for example, in the portion of the fourth partial region14facing the third electrode53, the local potential is raised, and the current therefore becomes difficult to flow.

For example, the direction from the first semiconductor region10to the second semiconductor region20is along the +c-axis direction of the semiconductor member10M. As a result, a carrier region is formed in a portion of the first semiconductor region10facing the second semiconductor region20. For example, the carrier region is formed near the upper face of the fourth partial region14. It is considered that when the first side face SF1has an inversely tapered shape, polarization in the direction opposite to the +c-axis direction occurs in the portion of the fourth partial region14facing the third electrode53. It is considered that this makes it difficult for current to flow in the portion of the fourth partial region14that faces the first semiconductor portion21, because the current path to the drain is blocked in the gate region.

As shown inFIG.1, the first compound region41aincludes a first portion p1and a second portion p2. The position of the second portion p2in the second direction (Z-axis direction) is between the position of the third compound region41cin the second direction and the position of the first portion p1in the second direction. The first portion p1is, for example, a top portion. The second portion p2is, for example, a bottom portion.

The thickness (length) along the first direction (X-axis direction) of the first portion p1is defined as the first thickness t1. The thickness (length) of the second portion p2along the first direction is defined as a second thickness t2. The first thickness t1is thinner than the second thickness t2. Since the second thickness t2is thick, the threshold voltage can be increased more stably.

For example, the thickness (length) along the second direction (for example, the Z-axis direction) of the third compound region41cis set as the third thickness t3. The third thickness t3is different from the second thickness t2. In an example, the second thickness t2is thicker than the third thickness t3.

The first thickness t1is, for example, not less than 2 nm, and not more than 30 nm. The second thickness t2is, for example, not less than 5 nm, and not more than 100 nm. The third thickness t3is, for example, not less than 5 nm, and not more than 100 nm. For example, the second portion p2contacts the third compound region41c. The other outer side face of the first compound region41afaces the fifth partial region15. The angle between the other outer side face and the first side face F1may be substantially same as the first angle θ1.

As shown inFIG.1, for example, the third compound region41ccontacts the second compound member42. The first compound region41acontacts the fourth partial region14and at least a part of the third electrode53described above. The second compound region41bcontacts the fifth partial region15and at least a part of the third electrode53described above.

In the embodiment, the thickness t4of the second compound member42along the second direction (Z-axis direction) is, for example, not less than 0.1 nm, and not more than 30 nm. When the thickness t4of the second compound member42is not more than 0.5 nm, low interface state density can be obtained, for example. When the thickness t4of the second compound member42is not more than 30 nm, high switching performance (transconductance) can be obtained, for example. The thickness t4may be, for example, not less than 0.1 nm and not more than 0.5 nm. Even by the thin second compound member42, for example, the interface state density in the vicinity of the interface between the second compound region42and the third partial region13is reduced. For example, the threshold voltage can be stabilized.

As shown inFIG.1, the semiconductor device110may include a third compound member43. The third compound member43includes silicon and nitrogen. The third compound member43includes, for example, silicon nitride. At least a part of the third compound member43includes, for example, Si3N4. The third compound member43includes a first insulating portion43aand a second insulating portion43b. The first semiconductor portion21is between the fourth partial region14and the first insulating portion43ain the second direction (Z-axis direction). The second semiconductor portion22is between the fifth partial region15and the second insulating portion43bin the second direction. For example, the semiconductor member10M is protected by the third compound member43. Higher stability is obtained.

As shown inFIG.1, the semiconductor member10M may include a base body10sand a buffer layer18. The substrate10sincludes at least one selected from the group consisting of silicon, silicon carbide, sapphire, aluminum nitride and gallium nitride, for example. The buffer layer18is provided on the base body10s. The buffer layer18includes, for example, a nitride semiconductor. The first semiconductor region10is provided on the buffer layer18. The second semiconductor region20is provided on the first semiconductor region10.

FIG.3is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment.

As shown inFIG.3, in the semiconductor device111according to the embodiment, the shape of the side face of the first compound member41is different from the shape of the side face of the first compound member41in the semiconductor device110. The configuration of the semiconductor device111other than this may be the same as the configuration of the semiconductor device110.

In the semiconductor device111, the first compound region41aincludes the second side face SF2. The second side face SF2faces at least a part of the third electrode53in the first direction (X-axis direction).

The angle between the second side face SF2and the first side face F1is the second angle θ2. The second angle θ2is larger than 90 degrees. The second side face SF2has, for example, a forward tapered shape.

Due to such second side face SF2, the first thickness t1is thinner than the second thickness t2. Since the second thickness t2is thick, the threshold voltage can be increased more stably. The second angle θ2is, for example, not less than 92 degrees. The second angle θ2may be, for example, not less than 95 degrees.

In the semiconductor device111, a high threshold value can be obtained more stably. According to the semiconductor device111, it is possible to provide a semiconductor device having improved characteristics.

FIGS.4A to4Care graphs illustrating the characteristics of the semiconductor device.

These figures illustrate an experimental result of characteristics when the Si composition ratio in the first compound member41is changed. In these figures, a temperature Tm of a heat treatment after the forming the first compound member41is changed. InFIG.4A, the temperature Tm is 900° C. InFIG.4B, the temperature Tm is 800° C. InFIG.4C, the temperature Tm is 700° C. The first compound member41includes Al1−z2Siz2O. The horizontal axis represents the Si composition ratio z2. When the Si composition ratio z2 is 1, the first compound member41includes SiO2. When the Si composition ratio z2 is 0, the first compound member41includes Al2O3. The vertical axis represents a hysteresis Hr (relative value). The hysteresis Hr is the characteristic of the capacitance between the semiconductor member10M and the third electrode53when the bias voltage Vb is increased, and the capacitance between the semiconductor member10M and the third electrode53when the bias voltage Vb is decreased. It corresponds to the difference between the characteristics of the electric capacitance between the two.

As can be seen fromFIGS.4A to4C, when the Si composition ratio z2 is not less than 0.2 and not more than 0.8, a small hysteresis Hr is obtained. For example, when the Si composition ratio z2 is not less than 0.22 and not more than 0.77, a small hysteresis Hr is obtained. In the embodiment, the Si composition ratio z2 is preferably not less than 0.2 and not more than 0.8. In the embodiment, the Si composition ratio z2 may be not less than 0.22 and not more than 0.77. For example, a small hysteresis is obtained. The Si composition ratio z2 may be not less than 0.23, for example. When the composition ratio z2 of Si is not less than 0.2, a small hysteresis Hr can be obtained regardless of the heat treatment temperature Tm. High heat resistance can be obtained.

In the embodiment, the first compound member41described above is provided. With such a structure, more stable characteristics can be obtained. By providing the second compound member42, more stable characteristics can be obtained.

FIG.5is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment.

As shown inFIG.5, in the semiconductor device112according to the embodiment, the second compound member is omitted. Other configurations of the semiconductor device112may be the same as those of the semiconductor device110. The characteristics of the semiconductor device112can also be improved. In the semiconductor device111illustrated inFIG.3, the second compound member42may be omitted.

In the embodiment, the first electrode51and the second electrode52include, for example, at least one selected from the group consisting of Ti, Al, Ni, Au, Mo, Pt, Pd, W, Cu, Cr. The third electrode53includes, for example, at least one selected from the group consisting of TiN, Ni, Pt, Au, Cr, Al, Mo, W, Cu.

FIG.6is a graph illustrating an example of a semiconductor device according to the first embodiment.

FIG.6shows an example of an element profile in the semiconductor device113according to the embodiment. The semiconductor device113may have any of the configurations of the above-mentioned semiconductor devices110to112. In the semiconductor device113, a first semiconductor region10including a third partial region13and a first compound member41including a third compound region41care provided (seeFIGS.1,3and5and the like). The second compound member42may be provided in the semiconductor device113. In the semiconductor device113, the configurations of the first electrode51, the second electrode52, the third electrode53, the semiconductor member10M, and the first compound member41may be the same as any of the configurations of the semiconductor devices110to112.

FIG.6shows the XPS (X-ray Photoelectron Spectroscopy) analysis results of the region including the third partial region13and the third compound region41c. The horizontal axis ofFIG.6is the position pZ along the Z-axis direction. The vertical axis is the concentration Cx of the element.FIG.6shows the concentrations Cx of Ga, Al, N, Si and O.

As shown inFIG.6, the semiconductor device113may include an intermediate region IR. The intermediate region IR is between the third partial region13and the third compound region41c. At least a part of the intermediate region IR may be at least a part of the second compound member42.

The intermediate region IR includes a first intermediate portion pR1and a second intermediate portion pR2. The second intermediate portion pR2is between the first intermediate portion pR1and the third compound region41cin the second direction (Z-axis direction).

As shown inFIG.6, the composition may be different between the first intermediate portion pR1and the second intermediate portion pR2. For example, the concentration of Al may be different between the first intermediate portion pR1and the second intermediate portion pR2. For example, the concentration of Si may be different between the first intermediate portion pR1and the second intermediate portion pR2.

For example, the first intermediate portion pR1includes Ga, N, O and Al. The second intermediate portion pR2includes Ga, N, O, Al and Si. For example, the first intermediate portion pR1does not include Si. Alternatively, the concentration of Si at the first intermediate portion pR1is lower than the concentration of Si at the second intermediate portion pR2.

For example, at the first intermediate portion pR1near the third partial region13, the high concentration of Si can maintain high crystal quality in the third partial region13. For example, it is easier to obtain a lower on-resistance. The characteristics can be further improved.

Second Embodiment

The second embodiment relates to a semiconductor device manufacturing method.

FIG.7is a flowchart illustrating the method for manufacturing a semiconductor device according to the second embodiment.FIGS.8A to8C,FIGS.9A to9C,FIGS.10A and10Billustrate the method for manufacturing a semiconductor device according to the second embodiment.

As shown inFIG.7, the method for manufacturing a semiconductor device according to the embodiment includes steps S110to S150. In step S110, the first structure body is prepared. The first structure body includes a base semiconductor layer including a part of a semiconductor member10M. In step S120, a part of the base semiconductor layer is exposed. In step S130, another part of the semiconductor member10M is grown. In step S140, holes are formed. In step S150, the conductive member is embedded.

For example, as shown inFIG.8A, in this example, the second compound member42is formed on the upper face10uof the base semiconductor layer10a. The base semiconductor layer10aincludes, for example, Alx3Ga1−x3N (0≤x3<1). The second compound member42includes gallium, and oxygen. The second compound member42is formed, for example, by sputtering, chemical vapor deposition or atomic layer deposition.

For example, as shown inFIG.8B, the first compound member41is formed on the second compound member42. The first compound member41includes aluminum, silicon, and oxygen. The first compound member41is formed, for example, by sputtering, chemical vapor deposition or atomic layer deposition.

By this, the first structure body SB1is formed. The first structure body SB1includes a base semiconductor layer10aincluding Alx3Ga1−x3N (0≤x3<1) and including an upper face10u. The first structure body SB1includes the first compound member41provided on the upper face10u. The first compound member41includes aluminum, silicon, and oxygen. The first structure SB1may include the second compound member42. The second compound member42is provided between the upper surface10uand the first compound member41. The second compound member42includes gallium and oxygen.

As described above, the preparation of the first structure body SB1may include forming the second compound member42on the base semiconductor layer10a. The preparation of the first structure body SB1may include forming the first compound member41on the second compound member42.

As shown inFIG.8C, a part of the first compound member41is removed. The side face of the remaining first compound member41has a forward tapered shape. In this way, the first side face SF1of the first compound member41formed by removing a part of the first compound member41is inclined in a forward tapered shape with respect to the upper face10u.

As shown inFIG.9A, a part of the second compound member42is removed to expose a part10pof the base semiconductor layer10a.

As shown inFIG.9B, another part of the semiconductor member10M is grown from the exposed part10pof the base semiconductor layer10a. The other part of the semiconductor member10M includes the first semiconductor region10including Alx1Ga1−x1N (0≤x1<1) provided on the part10pof the base semiconductor layer10a. The other part of the semiconductor member10M includes a second semiconductor region20provided on the first semiconductor region10. The second semiconductor region20includes Alx2Ga1−x2N (0<x2<1, x1<x2, x3<x2).

As shown inFIG.9B, the side face10SF of the other part of the semiconductor member10M faces the first side face SF1. The side face10SF of the other part of the semiconductor member10M has an inverse tapered shape.

As shown inFIG.9C, a third compound member43including silicon and nitrogen is further formed.

As shown inFIG.10A, a hole41his formed in the first compound member41after the growth of the other part of the semiconductor member10M. For example, the side face41sfof the hole41his inclined in a forward tapered shape.

Thus, in this example, the method of manufacturing the semiconductor device may include forming the third compound member43on the other part of the semiconductor member10M after the growth of the other part of the semiconductor member10M and before the formation of the hole41h.

As shown inFIG.10B, the hole41his filled with the conductive member53M. As a result, the third electrode53is formed. For example, a part of the third compound member43is removed to form the first electrode51and the second electrode52. Thereby, for example, the semiconductor device111is obtained.

According to the method of manufacturing a semiconductor device according to the embodiment, it is possible to provide a method of manufacturing a semiconductor device that can improve characteristics.

In the above manufacturing method, the second compound member42does not have to be formed by sputtering, CVD, atomic deposition, or the like. The first compound member41may be formed on the base semiconductor layer10a, and the second compound member42may be formed by heat treatment or the like. In this case, the thickness of the second compound member42(for example, the thickness t4) may be not less than 0.1 nm and not more than 0.8 nm (for example, not less than 0.1 nm and not more than 0.5 nm).

In the embodiment, for example, the thickness of the first compound member41(for example, the third thickness t3) and the thickness of the second compound member42(for example, the thickness t4), and the like may be obtained by electron microscope observation. The thickness of the first compound member41(for example, the third thickness t3), the thickness of the second compound member42(for example, the thickness t4), and the like may be obtained by the strength profile obtained from XPS.

According to the embodiment, it is possible to provide a semiconductor device capable of improving characteristics and a method for manufacturing the same.

In the specification, “nitride semiconductor” includes all compositions of semiconductors of the chemical formula BxInyAlzGa1−x−y−zN (0≤x≤1, 0≤y≤1, 0≤z≤1, and x+y+z≤1) for which the composition ratios x, y, and z are changed within the ranges respectively. “Nitride semiconductor” further includes Group V elements other than N (nitrogen) in the chemical formula recited above, various elements added to control various properties such as the conductivity type and the like, and various elements included unintentionally.

Moreover, all semiconductor devices practicable by an appropriate design modification by one skilled in the art based on the semiconductor devices described above as embodiments of the invention also are within the scope of the invention to the extent that the spirit of the invention is included.