Method, system, and software for evaluating characteristics of a surface with reference to its edge

A method and software is disclosed for evaluating characteristics, such as flatness, of a surface of a sample having an edge, comprising selecting an evaluation area having an area surface and a boundary, at least one portion of which is definable with reference to the edge, and evaluating characteristics of the area surface. Edge-specific evaluation conditions are used with edge-specific metrics to quantify parameters for said evaluation area. A system for evaluating such characteristics comprises a data collection system for generating data values for selected locations on said surface; and a data analyzing system for analyzing data values to determine such characteristics. A data interpolation system may be provided to interpolate data values collected with reference to a first coordinate system for analyzing with reference to a second coordinate system.

The present invention is directed to the field of materials processing, and more particularly to a novel method and system for evaluating characteristics of a semiconductor wafer.

BACKGROUND

The production and quality control processes used by semiconductor device manufacturers and material producers, among others, often require an accurate knowledge of wafer characteristics such as flatness, diameter, thickness, bow, warp, and resistivity, among others.

Automated, high-throughput assembly line systems may be employed to obtain the desired information on wafer characteristics. For example, in order to evaluate the flatness of a wafer, typically, the wafers are moved into a wafer flatness station. The flatness station is operated to provide information representative of the degree of flatness or deviation from a planar or other intended surface, for each wafer. Such information may be advantageously utilized, for example, during the various phases of photolithographic processing typically employed in electronic circuit device fabrication.

Conventionally, semiconductor wafer flatness is determined by evaluating the deviation of a wafer surface relative to a defined surface, called herein the deviation surface. The flatness parameters involved in the conventional evaluation of semiconductor wafers include global or local evaluation of the wafer, definition of the surface from which deviation from the wafer will be evaluated, and presentation format of the metrics calculation. Some options for the parameters, described below, are outlined in SEMI STD M1-1103, SPECIFICATIONS FOR POLISHED MONOCRYSTALLINE SILICON (©SEMI 1978, 2003) (hereinafter SEMI STD M1-1103).

SEMI STD M1-1103 contains dimensional and crystallographic orientation characteristics and limits on surface defects for semiconductor wafers. It specifies that wafer flatness should be determined either by the method outlined in ASTM Test Method F1530 or by another method as agreed upon between the supplier and the purchaser. ASTM Test Method F1530 is now known as SEMI STD MF1530-02, TEST METHOD FOR MEASURING FLATNESS, THICKNESS, AND THICKNESS VARIATION ON SILICON WAFERS BY AUTOMATED NONCONTACT SCANNING (© SEMI) (hereinafter SEMI MF1530-02).

SEMI MF1530-02 specifies determining flatness of a wafer as it would appear relative to a specified reference plane when the back surface is ideally flat, as when pulled down onto an ideally clean, flat chuck. In the method described therein, an opposed pair of probes scans the front and back surface along a prescribed pattern. The data so obtained is constructed into a thickness data array, which represents the front surface as it would appear when the back surface is ideally flat. With the definition of an evaluation area and a reference plane, the thickness data array may be used to calculate surface flatness of the wafer within the evaluation area. An analogous wafer evaluating method is also described in U.S. Pat. No. 4,860,229, issued Aug. 22, 1989, and entitled WAFER FLATNESS STATION, which is hereby incorporated by reference.

An illustrative semiconductor wafer surface100for which flatness could be evaluated in accordance with SEMI STD M1-1103 and SEMI MF1530-02 is shown inFIG. 1. The surface100has a front surface F, a back surface B, an edge150, and a fixed quality area120, also known as FQA120, which is the central area of a wafer surface100and an area of chief interest to manufacturers. The wafer surface area outside the FQA120is the edge exclusion region140, defined by an edge exclusion, XX, extending inwardly from the edge150. Currently, common edge exclusion is 2-3 mm. As semiconductor production improves, the length of the edge exclusion is expected to decrease. The Semiconductor Industry Association predicts that the edge exclusion length will be 1 mm by the year 2007.

Typically, the wafer surface is organized into a Cartesian grid of sites having areas measuring, for example, 26 mm by 8 mm.FIG. 2shows a portion of a Cartesian grid defined (but not shown to scale) on the wafer ofFIG. 1. Sites are defined to be rectangular areas with centers that fall within the FQA120. Areas inFIG. 2with centers (represented by a point) within FQA120that are defined as sites include sites13aand13b.Areas inFIG. 2with centers (represented by a point) outside of FQA120that are not defined as sites include non-site areas13cand13d.

Which evaluation area and deviation surface to choose in order to judge flatness depends upon the specifications of the electronic circuit device fabrication system for which the wafer is intended, for example a photolithographic processing system. Both SEMI STD M1-1103 and SEMI MF1530-02 specify that the wafer evaluation area could be defined by site, also known as “S”; or globally (encompassing the entire wafer), also known as “G”. They also specify relative to which wafer surface the deviation should be evaluated: the front surface, also known as “F”, or the back surface, also known as “B”.

SEMI STD M1-1103 and SEMI MF1530-02 then identify four options for specifying a reference plane: an ideal back surface (equivalent to the ideally flat surface of a chuck that is holding the surface), also known as “I”; or a plane defined by three points at specified locations on the front surface F of the wafer surface100, also known as “3”; or a plane defined by a least-squares fit to the front surface F using all points of a fixed quality area on the wafer surface100, also known as “L”; or a plane defined by a least-squares fit to the front surface F within a site13a,13b,also known as “Q”.

A suitable deviation surface from which deviation may be evaluated is then identified. For example, the deviation surface could be coincident with the reference plane. Alternatively, while it is not necessary, the deviation surface could be defined, as in SEMI STD M1-1103 and SEMI MF1530-02, to be that plane parallel to the reference plane but having zero deviation from the wafer surface at the center point of the evaluation area.

Deviation is then calculated point by point between the surface of the wafer and the deviation surface. Finally, the deviation is presented either as the range of deviation from the reference plane, also known as “R”; or as the maximum deviation from the reference plane, also known as “D”.

One common set of conditions used by manufacturers to evaluate flatness is known as SFQR:S=the wafer is evaluated by sites on the wafer;F=the reference plane is constructed relative to the front surface of the wafer;Q=the reference plane is defined by a least-squares fit to the front surface using all points of a site13a; andR=the results are presented as the range of deviation from the deviation surface.

A significant drawback to using the conventional methods to evaluate semiconductor wafer flatness is that the test methods of U.S. Pat. No. 4,860,229, SEMI STD M1-1103 and SEMI MF1530-02 specifically cover procedures that, once the FQA120is defined, evaluate the flatness of the wafer in such a way that the boundary of the wafer is not considered. The flatness evaluation methods defined therein are defined intentionally to evaluate flatness independent of wafer boundary. However, given that wafers do have a boundary, wafer boundary affects flatness evaluation, especially within the area of the FQA120near the edge exclusion region140. Flatness evaluation of such area using the test methods of U.S. Pat. No. 4,860,229, SEMI STD M1-1103 and SEMI MF1530-02 will be incomplete and inexact. Further, the imposition of a grid defined by Cartesian coordinates upon a generally disc-shaped surface results in sites of different geometries and orientation relative to each other.

Referring toFIG. 2, because semiconductor wafers are generally disc-shaped, a portion of the area of certain sites will be beyond the FQA120or even beyond the edge150of the wafer. A site having its entire area falling within the FQA120, such as site13a, is called a full site, and a site without its entire area falling within the FQA120, such as site13b, is called a partial site. While SEMI STD M1-1103 and SEMI MF1530-02 provide for optional inclusion or exclusion of partial sites in flatness evaluation, non-site areas near or at the edges of the wafer are not evaluated.

Referring toFIG. 2, a grid area having a center that falls outside the FQA120, such as area13c(which has a center within edge exclusion region140) or area13d(which has a center beyond the edge150), is not considered a site, and is typically not evaluated. Therefore, limitations in the definitions outlined in SEMI STD M1-1103 of areas near or at the edge cause evaluation of flatness near or at the edge to be incomplete and inexact.

Further, the characteristics of rectangular sites situated in similar radial locations on the wafer surface100will not be comparable, because the orientation of those areas with respect to the wafer is dissimilar. For example, referring toFIG. 1, sites13e,13f(not shown to scale) are both located close to the edge150but at a radial location 90 degrees apart. As can be seen inFIG. 1, the areas of sites13e,13fare not oriented similarly on the wafer surface100. Most of the area of site13eis close to the edge150, while more of the area of site13fis internal to the wafer surface100. Therefore, the metrics from the sites13e,13fwill not be comparable, because the evaluation areas on the sites13e,13fare not comparable, given the disc shape of the wafer.

If, for example, the wafer surface100has a topographical feature, such as a ridge51, a portion of which is shown generally as a dashed line inFIG. 1, that extends around the wafer surface100circumferentially but interior to the wafer edge, the feature would extend across the rectangular sites13e,13fat different locations. The rectangular site13e,13fwould provide a different measure of certain metrics, such as SFQR. In addition, data values about the ridge51on the wafers13e,13fwould not be comparable because the data locations of the ridge51on the sites13e,13fare not comparable. The methods described above do not take account of the edge of the wafer, in particular its radius, and how wafer edge affects the area being evaluated, despite the importance of the wafer edge to the evaluation of flatness in certain regions of the wafer.

Thus, it is apparent that the methods described above do not define methods that provide appropriate characterization of a semiconductor wafer near or at its edge, that provide exact characterization of a semiconductor wafer relative to its edge, or that allow comparison between or among selected areas of a wafer relative to their location on the wafer relative to the edge

With the development of improved photolithography methods, characterizing a semiconductor wafer near and at its edge is becoming of increasing importance. Edge flatness evaluation methodologies, which are not defined by SEMI STD M1-1103 and which provide information about the amount of roll off of the wafer surface at or near the edge, as compared to the surface within the FQA120, have been developed.

One such system is described in Kimura et al., “A New Method for the Precise Measurement of Wafer Roll Off of Silicon Polished Wafer”, 38Jpn. J. Appl. Phy.38 (1999). In Kimura, a stylus profiler and a block gauge evaluate the profile of a wafer's surface (known as edge roll off) near the edge of the wafer. A wafer is placed on an optical flat so that the physical edge of the wafer touches a block gauge. The stylus of the profiler moves along the block gauge, and drops off the gauge at the physical edge of the wafer. As the stylus moves along the surface of the wafer toward the center, it measures the displacement z between the actual height of the wafer within the FQA and the height of the wafer below the stylus. Kimura defines a metric known as the roll off amount (ROA), which is the amount of displacement z relative to a reference line when the stylus is located 1 mm from the physical edge.

Another system is described in U.S. Ser. No. 10/203,882, entitled Wafer Shape Evaluating Method and Device Producing Method, Wafer and Wafer Selecting Method, filed Nov. 15, 2001 (hereinafter “Kobayashi et al.”). In Kobayashi et al., the flatness of an area at a wafer's edge is determined by extrapolating known surface characteristics into areas having unknown characteristics. A first region is provided within a wafer surface, and a reference line or a reference plane is calculated in the first region. A second region is then provided outside the first region, and the reference line/plane is extrapolated into the second region. Finally, the displacement z is determined between the configuration of the second region and the reference line/plane within the second region.

While the Kimura et al. and Kobayashi et al. methodologies provide some evaluation of the wafer edge that would not otherwise be able to be evaluated, their usage poses certain difficulties. They neither develop metrics nor statistics relating to the topography of the surface of wafer regions near or at the wafer edge. Therefore, their uses in wafer characterization of the edge are limited.

Other systems evaluate the edge of a wafer. Found in the field of edge profilometry, systems such as those developed by Chapman Instruments develop a two-dimensional profile of radial segments around an edge, providing a 2-D data set for a line extending along the radius of an edge and the displacement z from the line and an ideal line extending from the internal part of the wafer. While edge profilometers are thus able to map roll-off of radial lines near the edge of a wafer, like Kimura et al. and Kobayashi et al., they develop neither metrics nor statistics relating to the topography of the surface of wafer regions at or near a wafer edge. Therefore, their uses in wafer characterization of the edge are also limited.

It is therefore desirable to provide an improved methodology for evaluating the flatness of a semiconductor wafer, in particular to provide a methodology for evaluating the flatness of the entire extent of a semiconductor wafer.

Further, it is desirable to provide a methodology for accurate and complete evaluation of the flatness of a wafer at and near its edges, including the areas of a wafer that would not obtain complete and exact characterization should a conventional flatness evaluating technique be applied to the wafer.

Finally, it is desirable to provide a methodology for evaluating the flatness of a semiconductor wafer to allow comparison between or among selected areas of a wafer that are definable with respect to the edge of the wafer.

SUMMARY OF THE INVENTION

A method for evaluating characteristics of a surface of a sample having an edge, comprises selecting an evaluation area of a sample such that the evaluation area has an area surface and a boundary, with at least one portion of the boundary being definable with reference to the edge, and evaluating characteristics of the area surface.

In a further aspect of the invention, a method for evaluating the flatness of a surface of a sample having a shape with an edge comprises selecting an area of the sample such that the area has an area surface and a location that is defined with reference to the edge of the sample, and evaluating flatness of the area by evaluating deviation between the area surface and a deviation surface.

In a further aspect of the invention, the deviation surface is selected based on edge-specific evaluation conditions, which could comprise the definition of evaluation area, a fitted reference surface for use in developing the deviation surface, the deviation surface itself, and a metrics calculation format with which to present the sample characteristics. The evaluation area definition could comprise one of the set of an annulus centered around a center point of the sample and an annular sector defined with respect to the center point.

In a further aspect of the invention, the area of the sample has a boundary, with a portion of the boundary defined with reference to the edge of the sample.

In a further aspect, the sample is generally disc-shaped and has a center point, and selecting the evaluation area could also comprise defining the portion of the boundary with reference to said edge as a first arc at a first radial distance from the center point. Selecting the evaluation area could also comprise defining a second portion of the boundary as a second arc at a second radial distance from the center point, with the second radial distance being shorter than the first radial distance.

In a further aspect of the invention, the location of the area could be defined on the sample in polar coordinates. In a further aspect, the surface comprises a semiconductor wafer. In addition, the evaluation area could be defined as extending from a fixed quality area boundary of the wafer at a first radial distance from the wafer center point to an inner boundary that is a second radial distance from the center point, with the second radial distance being shorter than the first radial distance.

In another aspect of the invention, selecting an area further comprises selecting an annular sector as the evaluation area. Sub-areas within the annular sector could be defined to comprise a first annular sector and a second annular sector. Each first annular sector and said second annular sector could have an inner arc, an outer arc, and side boundary portions, and the inner arc of the first annular sector could be coincident with the outer arc of the second annular sector.

Alternatively, selecting an area further comprises selecting an annulus as the evaluation area. Sub-areas within the annulus could be defined to comprise a plurality of annular sectors extending along the annulus. In an illustrative but not necessarily preferred embodiment, the sub-area annular sectors have a circumferential angular length of 5 degrees.

Another aspect of the invention involves a method of evaluating flatness of a surface of a sample having an edge, comprising selecting an area of the sample such that the area has an area surface and a boundary, with a portion of the boundary defined with reference to the edge of the sample, and evaluating the flatness of the area by evaluating deviation between the evaluation area surface and a deviation surface. The deviation evaluation could comprise using edge-specific metrics to quantify parameters for the evaluation area.

In one aspect, the portion of the boundary extends along the evaluation area at a fixed distance from the sample's edge. In another aspect, the sample is generally disc-shaped and has a center point, and the boundary portion extends along the boundary of the evaluation area at a fixed distance from the center point.

In another aspect of the invention, there is disclosed a software program product for evaluating the geometry of a surface of a sample, with the sample having an edge, embodied on a computer readable medium and implemented in a series of instructions. The instructions comprise selecting an evaluation area having an area surface and a location that is definable with reference to the edge; selecting a deviation surface; and calculating deviation between the area surface and deviation surface. The set of instructions for evaluation area selection could comprise a defining a portion of a boundary of the evaluation area with reference to the edge. The set of instructions for defining the boundary portion could comprise extending the portion along the evaluation area at a fixed distance from the sample edge.

In another aspect of the invention, there is disclosed a software program product for measuring deviation between a surface of a sample and a deviation surface, with the sample having an edge, embodied on a computer readable medium and implemented in a series of instructions. The instructions comprise selecting an sample evaluation area with an area surface and a location that is defined with reference to the edge, selecting deviation surface based on edge-specific evaluation conditions; and calculating deviation of evaluation area surface from deviation surface.

In another aspect of the invention, there is disclosed a method of measuring deviation between a surface of a sample and a deviation surface, with the sample having an edge, comprising a step for selecting an evaluation area, a step for selecting a deviation surface based on edge-specific evaluation conditions; and a step for calculating deviation of area surface from deviation surface. The edge-specific evaluation conditions could comprise selecting the evaluation area having a boundary that is definable with reference to the edge.

In addition, selecting the deviation surface could comprise selecting a fitted reference surface and defining the deviation surface relative to said fitted reference surface. The fitted reference surface could comprise a planar fitted reference surface or a conical fitted reference surface, with the conical fitted reference surface comprising a portion of a conical surface, not including the base. The deviation surface could comprise a coincident deviation surface (in which the deviation surface is coincident with the fitted reference surface). Alternatively, the deviation surface could comprise a displaced deviation surface (in which the deviation surface is displaced a selected distance from the fitted reference surface).

The displaced deviation surface could be thus defined as a plane that is parallel to a planar fitted reference surface but having zero deviation from the sample surface at a center point of the annular sector. Alternatively, the deviation surface could be defined as a conical surface portion having coefficients a and b equal to coefficients a and b of a conical fitted reference surface, but displaced from the conical fitted reference surface such that the conical portion has zero deviation from the sample at a center point of the annular sector comprising the evaluation area.

In another aspect of the invention, there is disclosed a method of evaluating characteristics of a surface of a sample having an edge comprising selecting a first area and a second area, each with a boundary, with a portion of each boundary defined with reference to the edge of the sample; evaluating the first area in order to obtain first characteristics results and evaluating the second area in order to obtain second characteristics results.

The first area and said second area could each have an inner arc and an outer arc, with the first area inner arc comprising the second area outer arc. In one embodiment, the first area and said second areas each have equal area; in another embodiment, they each have side boundary portions extending from inner arc to outer arc that are equal in length.

Another aspect of the invention discloses a system for evaluating characteristics of a sample having a surface with an edge, comprising a data collection system for generating data values for selected locations on the surface; and a data analyzing system for analyzing data values to determine characteristics of the sample, further comprising a system for organizing a surface area of a sample into a grid of areas each area having a boundary, a portion of each boundary being definable d with reference to the edge of the sample. The data analyzing system could comprise a system for developing an evaluation area for the sample that is defined relative to the edge and for applying edge-specific evaluation conditions to use edge-specific metrics to evaluate the evaluation area. In one embodiment, evaluating characteristics comprises evaluating sample flatness, and the data analyzing system further comprises a flatness analyzing system for determining flatness of the sample relative to a deviation surface.

In another aspect of the invention, there is defined, on the wafer surface, an annulus, which is the figure bounded by and containing the area extending from a wafer's FQA boundary to an inner smaller radius than the FQA boundary. A plurality of annular sectors is then defined along an annulus. In a further embodiment, each sector has a circumferential angular length of 5 degrees.

In another embodiment of the present invention, a plurality of annular sectors is defined within a sector extending from a selected radius to the center of the wafer. A first annular sector is defined extending from a first radius to an intermediate radius shorter than the first radius, and a second annular sector is defined extending from the intermediate radius to an inner radius shorter, than the intermediate radius. In one aspect of the further embodiment, the first annular sector and second annular sector have equivalent radial length. In another aspect, the first annular sector and second annular sector have equivalent areas.

Finally, there is described a method of evaluating deviation between a surface of a sample and a deviation surface, with the sample having a shape with an edge. The method comprises selecting an area of the sample for evaluation, with the area having an area surface and a location that is defined with reference to the sample edge, selecting the deviation surface; and evaluating deviation between the area surface and the deviation surface.

It can be seen that the method and systems described herein extends the known flatness evaluating methodologies to take into account the edge of the wafer, with the location of the area of the sample undergoing evaluation being defined with reference to the edge of the sample, and, in the case of one embodiment, in polar coordinates. Therefore, in one embodiment, the invention comprises determining flatness of a semiconductor wafer by evaluating the deviation of the surface of an area of the wafer relative to a deviation surface, wherein the area is defined by polar coordinates.

DETAILED DESCRIPTION OF THE INVENTION

Referring toFIG. 3, there is shown a semiconductor wafer generally designated as10to be evaluated according to the present invention. Wafer10has a front surface6, a back surface8, and a periphery15, also known as edge15. Recognizing that the wafer10is generally but not perfectly circular, as shown inFIG. 21, the edge15may be a physical edge11of the wafer10or, as in an illustrative but not necessarily preferred embodiment, it may be a nominal edge14that is a selected radial distance17from the center of the wafer10.

Wafer10has fixed quality area12, also known as an FQA12, extending from the center of the wafer10to an FQA boundary22. The wafer surface area outside the FQA12is the edge exclusion region114, which is an annulus of the wafer10defined by the FQA boundary22and the edge15. The edge exclusion region114has an edge exclusion, M, the radial length of which may be any value from 0 up to the length of the radius of the wafer10, but, in the illustrative but not necessarily preferred embodiment, is defined to be either 1, 2, or 3 mm.

Wafer10has sectors30a,30b,30c,30d,30e,30f,30g, and30hderived from diameters20a,20b,20c, and20dand the included arcs along edge15.FIG. 4shows sector30adivided into annular sectors14a,40a. Edge exclusion annular sector14ais the annular sector extending from the periphery15to the FQA boundary22. FQA annular sector40ais the annular sector extending from the FQA boundary22to a radius16that is interior to FQA boundary22.

As seen inFIG. 5, wafer10has an annulus, shown generally as44and also known as zone44. Zone44may be defined using a selected radius16and the FQA boundary22of the wafer10. Alternatively, zone44may be defined by the FQA boundary22and a selected radial length extending from the FQA boundary22a selected distance toward the center of the wafer10. The annulus44is divided to form evaluation areas40a,40b,40c,40d,40e,40f,40gand40hhaving a geometry that is defined with reference to the edge15of the wafer10.

Referring toFIG. 16, which shows a generalized version of a sample416and an area45having a geometry that is defined with reference to the edge415, analogously to the areas shown inFIGS. 3 and 5, the geometry of an area45could have any geometry, so long as at least one portion of its boundary417(such as its external side edge446) is defined with reference to the edge415of the sample416, for example, extending along the sample at a selected distance from the edge415.

Referring toFIG. 17, a generalized version of defining a set of evaluation areas is shown. The sample416ofFIG. 16is shown as having evaluation areas411a,411b, . . . ,411j, each of which with equal area and containing all points of the sample416that are less than a selected distance from the external side edge446but that are not included in the region between external side edge446and sample edge415.

Annular Sectors

Returning toFIG. 4, an example of an area having a geometry that is defined with reference to the edge15is an annular segment49, being a portion of the wafer10with an upper boundary being a circular arc (a portion of radius16) and a lower boundary being a chord48displaced from the radius16. In the illustrative but not necessarily preferred embodiment, the FQA areas, shown inFIG. 5, are annular sectors40a,40b,40c,40d,40e,40f,40gand40h.

As the wafer10is disc-shaped, wafer10will have an angular extent of 360°. An annular sector can have any angular extent up to 360°. While it is not required by the invention, in the illustrative but not necessarily preferred embodiment the angular extent of each annular sector may be equal. In one embodiment, the angular extent of each annular sector is equal to 5°, but can extend from to 1° to N°.

A plurality of annular sectors may also be defined extending from a selected radius to the center of the wafer. A wafer could have any number of annular sectors; the number is user defined. As seen inFIG. 6, a portion of a wafer210is shown with an annular sector240aextending from an FQA boundary arc222, formed from a portion of the FQA boundary, to an intermediate arc216that is a shorter radial distance from the center point C than is the FQA boundary arc222. An annular sector260ais defined extending from the intermediate arc216to an inner arc224that is a shorter radial distance from the center point C than is the radius from arc216to center point C. While not required by the illustrative but not necessarily preferred embodiment, annular sectors940a,960amay be defined on a wafer310as having equal radial length, as seen inFIG. 7. Alternatively, while not required by the illustrative but not necessarily preferred embodiment, annular sectors970a,980amay be defined on a wafer410as having equal area, as seen inFIG. 8.

InFIG. 7, annular sectors940a,960aeach have a radius of 10 mm. Each annular sector940a,960ahas a maximum radius rmaxand a minimum radius rminthat are calculated using the formulae:
Annular sector 940a: rmax=rnom−EE, rmin=rnom−EE−LR
Annular sector 960a: rmax=rnom−EE−LR, rmin=rnom−EE−2LR
with rnombeing the length of the radius of the nominal edge; EE being the length of the edge exclusion, and LRbeing the selected radial length. Therefore, with a wafer310having a 300 mm diameter (rnom=150 mm) and an edge exclusion EE=2 mm, and with annular sectors940a,960ahaving a constant radial length LR=10 mm, annular sector940ahas an rmaxof 148 mm and an rminof 138 mm; and annular sector960ahas an rmaxof 138 mm and an rminof 128 mm.

The area A of an annular sector may be calculated using the formula A=½ h(s1+s2), where h is the radial length of the annular sector, s1is the length of the outer arc, and s2is the length of the inner arc. When annular sectors share an arc, holding their radial lengths constant results in the area of the outer annular sector being greater than the area of the inner annular sector. Referring toFIG. 7, annular sector940ais defined by a radial length h, an outer arc350aof length s1, and intermediate arc350bof length s2. Annular sector960ais defined by a radial length h, intermediate arc350bof length s2, and an inner arc350cof length s3. The length s2of intermediate arc350bis necessarily shorter than the length s1of outer arc350aand is necessarily longer than the length s3of the inner arc350c.Therefore, holding the radial lengths of annular sectors940a,960aconstant at 10 mm results in the area A1of annular sector940abeing greater than the area A2of annular sector960a.

Similarly, holding constant the areas of annular sectors that share an arc results in the radial length of the inner annular sector being greater than the radial length of the outer annular sector. InFIG. 8, annular sectors970a,980ahave constant areas. With a wafer410having a 300 mm diameter, an edge exclusion of 2 mm, and annular sectors of 5° angular extent, when the radial length of annular sector970ais 10 mm, holding the areas of both annular sectors970a,980ato a value A results in a radial length of 10.784 mm for annular sector980a.Therefore, annular sector970ahas an rmaxof 148 mm and an rminof 138 mm; and annular sector980ahas an rmaxof 138 mm and an rminof 127.216 mm.

When the boundaries of evaluations areas on the semiconductor wafer10are defined relative to the edge of the wafer10, it is now possible to evaluate characteristics such as flatness of wafer regions near or at the edge of the wafer10. One system for such evaluation, shown as wafer flatness evaluation system200inFIG. 9, has a wafer data collection system60and a wafer data analyzing system70that develops and displays edge-specific metrics50that derive from the specification of edge-specific evaluation conditions151. Edge-specific evaluation conditions151may be developed that are analogous to traditional sets of conditions such as those defined by SEMI STD M1-1103 and commonly used by manufacturers to characterize wafers, but also taking into account the boundary of the wafer. Specifically, edge-specific evaluation conditions151may be developed which provide accurate and complete evaluation of the flatness of a wafer at and near its edges.

Wafer flatness evaluation system200inFIG. 9implements a flatness evaluation methodology such as that described in U.S. Pat. No. 4,860,229 but that takes wafer boundary into account by developing evaluation areas that are defined relative to the wafer's edge and using edge-specific metrics50that are derived from edge-specific evaluation conditions151.

Edge-specific metrics50may be applied to areas that, in the illustrative but not necessarily preferred embodiment, are annular sectors, the areas of which are defined by polar coordinates, to obtain flatness data near the FQA boundary22of the wafer10. Each edge-specific metric50is a single value quantifying a parameter for an edge-specific area. Edge-specific metrics50are analogous to conventional flatness metrics, in which conventional rectangular sites used in the calculation of conventional flatness metrics are replaced with annular sectors.

Edge-specific statistics950are values that are derived from combinations of the edge-specific metrics50. Each statistic950characterizes the set of annuli or annular sectors (for example, the set comprising the wafer10) from which the statistic was derived. For example, statistics950could be the mean or the arithmetic average of a set of evaluation areas.

The flatness of regions of a semiconductor wafer10near its edge is determined according to the present invention by evaluating the point deviation of a wafer surface at each point in an evaluation area82, using edge specific evaluation151conditions that are defined with reference to the edge15, and where the point deviation is the distance between a point on a wafer surface at the evaluation area82and its corresponding point on a deviation surface86. The point deviation is positive when the point on the evaluation area82is above its corresponding point on the deviation surface86, and it is negative when the point on the evaluation area82is above its corresponding point on the deviation surface86.

As shown inFIG. 14, selecting the edge-specific evaluation conditions151involved in the evaluation of regions near semiconductor wafer edges comprises selecting the evaluation area82having an area surface and a location that is defined with reference to the edge of the sample, selecting the fitted reference surface84from which a deviation will be derived, and calculating deviation results.

Which evaluation area82(also known as measurement area82), fitted reference surface84, and deviation surface86to choose in order to judge flatness depends upon the characteristics of the wafer10, its edge15, and the properties of the evaluating equipment.

As shown inFIG. 22, the wafer evaluation area82of the present invention, having an area surface and a location that is defined with reference to the edge of the sample, could be defined as an annulus of the wafer, also known as an “Edge Global” evaluation area or EG evaluation area7, or as an annular sector, known as an “Edge Sector” evaluation area or ES evaluation area9. The EG evaluation area7and ES evaluation area9are analogous to the global and site evaluation areas known as “G” and “S” in SEMI STD M1-1103 and SEMI MF1530-02. In the illustrative but not necessarily preferred embodiment, and referring toFIG. 5, the EG evaluation area7could be a zone44(also known as annulus44), and the ES evaluation area9could be an annular sector such as annular sector40b.

Fitted Reference Surface84

The fitted reference surface84is a mathematically constructed surface that could be either two-dimensional in its own coordinate system (known as a planar fitted surface184and as shown inFIG. 18) or three-dimensional in its own coordinate system (such as a conical fitted surface284and as shown inFIG. 19). The fitted reference surface84is defined by an evaluation algorithm384, described in more detail below in connection withFIGS. 23-25, that takes into account the selected number of dimensions of the fitted reference surface84. Conventional G or S evaluation areas employ planar fitted surfaces184; while EG evaluation areas7and ES evaluation areas9employ either planar fitted surfaces184or conical fitted surfaces284, depending upon the selected number of dimensions of the fitted reference surface84. The fitted reference surface84may be defined to be a planar fitted surface184or a conical fitted surface284.

As with reference planes used in conventional flatness evaluation systems, edge-specific planar fitted surfaces184are planes defined by the formula: Z=ax+by+c. As shown inFIG. 24, an edge-specific planar fitted surface184may comprise one of the following planar fitted surfaces184, namely a Planar Back Surface (Ideal) fitted surface184BI, a Planar Front Surface (Three Point) fitted surface184F3, a Planar Front Surface Least Squares (Global) fitted surface184FL, and a Planar Front Surface Least Squares (Sector) fitted surface184FQ, each of which having coefficients a, b, c selected in accordance with its associated type of planar fitted surface184, using the following method associated therewith:Planar Back Surface (Ideal) method384BI: The Planar Back Surface (Ideal) fitted surface184BI is a planar fitted surface184that is defined as an ideal back surface B (equivalent to the ideally flat surface of a chuck that is holding the surface), in which the coefficients a=b=c=0.Planar Front Surface (Three Point) method384F3: The Planar Front Surface (Three Point) fitted surface184F3is a planar fitted surface184that is defined by three points at selected locations on the front surface F of the wafer10.Planar Front Surface Least Squares (Global) method384FL: The Planar Front Surface Least Squares (Global) fitted surface184FL is a planar fitted surface184that is defined by minimizing the difference of the squares between the planar fitted surface184and either all points, or preferably an annulus44, of a fixed quality area12on the wafer10.Planar Front Surface Least Squares (Sector) method384FQ: The Planar Front Surface Least Squares (Sector) fitted surface184FQ is a planar fitted surface184that is defined by minimizing the difference of the squares between the planar fitted surface184and the ES evaluation area9.

As shown inFIG. 19, an edge-specific conical fitted surface284is a portion of the surface of a cone, not shown, not including the base, defined in cylindrical coordinates. The Z value of the conical fitted surface284at a point (R, θ) is given by the formula Z=aR+bθ+c, with R being the distance of the point in the rθ plane from the origin, and with θ being the angle formed by a line in the Rθ plane connecting the point to the origin and the line forming θ=0, and with Z being the perpendicular distance from the rθ plane.In a merely illustratative but not necessarily preferred embodiment, the conical fitted surface284comprises a Conical Front Surface Least Squares (Sector) fitted surface284FQ′, having coefficients a, b, c selected using the
Conical Front Surface (Least Squares Sector) method484FQ′, which defines the conical fitted surface284by minimizing the difference of the squares between the conical fitted surface284FQ′ and the area of the wafer surface within the annulus44that either is or contains the defined evaluation area82.

Note that certain annular sectors40bmay have a tilt. In order to allow the conical fitted surface284FQ′ to match the tilt of an annular sector40b, it may be necessary for the coefficient b to have a non-zero value. Therefore, in order to avoid the discontinuity of the conical fitted surface284FQ′ if an annular sector40bcontains θ=2π, the θ associated with each annular sector40bis defined to be the angular distance between a line passing through the center of the annular sector40band a line passing through the point at which a least squares evaluation occurs.

Once the fitted reference surface84is selected, a suitable deviation surface86is then identified from which deviation of the wafer surface may be calculated. Options include either a coincident deviation surface386C (being coincident with the fitted reference surface84) or a displaced deviation surface386D (being displaced from the fitted reference surface84), both shown inFIGS. 18 and 19.

In the presently illustrated but not necessarily preferred embodiment, when an annulus44is selected to be an EG evaluation area7(irrespective of whether a planar fitted surface184or a conical fitted surface284has been selected as fitted reference surface84), the deviation surface86is defined to be a coincident surface386C. However, when an annular sector40bis selected to be an ES evaluation area9, a suitable deviation surface86may be either a coincident deviation surface386C or a displaced deviation surface386D.

A coincident deviation surface386C may be defined to be either a coincident planar deviation surface186C or a coincident conical deviation surface286C, depending on the selected number of dimensions of the fitted reference surface84. When a coincident deviation surface386C is defined with a planar fitted surface184, a coincident planar deviation surface186C, such as shown inFIG. 18, is defined. When a coincident deviation surface386D is defined with a conical fitted surface284, a coincident conical deviation surface286D, such as shown inFIG. 19, is defined.

When a displaced deviation surface386D is defined with a planar fitted surface184, a displaced planar deviation surface186D, such as shown inFIG. 18, is defined, analogously to those defined in SEMI STD M1-1103 and SEMI MF1530-02, as that plane parallel to the planar fitted surface184but having zero deviation from the wafer surface10at the center point P of the annular sector40b.

When a displaced deviation surface386D is defined with a conical fitted surface284, a displaced conical deviation surface286D, such as is shown inFIG. 19, is defined to be that conical surface having the same a and b coefficients as the conical fitted surface284, but displaced from the conical fitted surface284so that it has zero deviation from the wafer surface10at the center point P′ of the annular sector40b.

Finally, the edge-specific metrics calculation format88options with which to show deviation, shown in an explanatory view inFIG. 20, are as follows:The range of deviation, shown as “R”, within the evaluation area82, is known as the R metric24.The point deviation having the largest absolute value in a set of point deviations, each point deviation comprising an amount of deviation from a point on the evaluation area82to its corresponding point on the deviation surface86. The point deviation having the largest absolute value, shown as “D, D′”, is known as the D metric25for a displaced deviation surface386D. It is known as D′ metric26for a coincident deviation surface386C.The point deviation having the largest positive value in a set of point deviations, each point deviation comprising an amount of deviation from a point on the evaluation area82to its corresponding point on the deviation surface86. The point deviation having the largest positive value, shown as “X, X′”, is known as the X metric27for a displaced deviation surface386D. It is known as the X′ metric28for a coincident deviation surface386C.The point deviation having the largest negative value in a set of point deviations, each point deviation comprising an amount of deviation from a point on the evaluation area82to its corresponding point on the deviation surface86. The point deviation having the largest negative value, shown as “N, N′”, is known is known as the N metric31for a displaced deviation surface386D. It is known as the N′ metric32for a coincident deviation surface386C.The ratio of positive to negative point deviation within the evaluation area is known as the Q metric33for a displaced deviation surface386D. It is known as the Q′ metric34for a coincident deviation surface386C.

The D metric25may be defined to provide either a signed or an unsigned value. A signed value is preferred, as additional information is thus provided about the surface of the wafer10at the evaluation area82.

The N metric31and the N′ metric32may be defined to provide either negative or positive values. When the N metric31is defined to be a positive value, it would correspond directly with values provided by the R metric24and X metric27. Similarly, when the N′ metric32is defined to be a positive value, it would correspond directly with values provided by the R metric24and X′ metric28. Metrics so developed could then be plotted on the same scale. Further, values provided by the R metric24would then equal the sum of the values provided by the N metric31and X metric27; and values provided by the R metric24would then equal the sum of the values provided by the N′ metric32and X′ metric28.

Also, defining the values provided by the N metric31and N′ metric32as positive values allows them to have a direct numerical correspondence with Roll-off Amount (ROA); larger values of ROA thus correspond to larger values provided by the N metric31and N′ metric32. If positive values of the N metric31and N′ metric32are desired, they are obtained by multiplying the value by −1.

The Q metric33is provided by dividing the value provided by the N metric31by the value provided by the X metric27. Similarly, the Q′ metric34is provided by dividing the value provided by the N′ metric32by the value provided by the X′ metric28. Since the values provided by the X metric27and the X′ metric28are always positive, when the values provided by the N metric31and N′ metric32are defined to be positive, the values provided by the Q metric33and the Q′ metric34are also positive; otherwise, they are negative.

While the Q metric33and the Q′ metric34are described above in connection with the merely illustrative yet not necessarily preferred embodiment, it should be noted that it would be obvious for a person skilled in the art to combine metrics in different ways in order to create metrics for generating values quantifying other parameters for an evaluation area.

For example, another quotient metric quantifying a ratio of a first metric to a second metric could comprise a ratio of a deviation metric, for quantifying a point deviation having a largest absolute value, to a range metric, for quantifying a range of the amount of deviation in a set of point deviations of deviation within an evaluation area. Such a ratio could be known as the DR metric133for a displaced deviation surface386D. It could be known as the DR′ metric134for a coincident deviation surface386C.

As another example, a summing metric quantifying a sum of a first metric to a second metric could comprise a sum of the deviation metric and the range metric. Such a ratio could be known as the S metric233for a displaced deviation surface386D. It could be known as the S′ metric234for a coincident deviation surface386C.

The options for definition of the evaluation area82, the fitted reference surface84, and the deviation surface86, and metrics calculation format88may be combined to generate edge-specific evaluation conditions151. Certain edge-specific evaluation conditions151that are created by combinations of options are analogous to conditions useful in conventional wafer evaluation, and their uses are analogous also. For example, the ESFQD condition55and its uses are analogous to conventional SFQD conditions and its uses.

In addition, certain conditions created by combinations of options may be useful for analyzing specific edge-specific wafer characteristics. For example, the ESFQD metric54may prove helpful in analyzing Roll-Off Amount. Finally, certain edge-flatness evaluation conditions created by combinations of options do not provide logically reasonable or useful results. For example, no EGFQ conditions are defined because the EG evaluation area7is defined to be global while the FQ fitted reference surface84FQ would be defined with an annular sector. Also, there are no EGBI′ or ESBI′ conditions because the BI fitted reference surface84BI requires an ideal wafer back surface, which cannot have a conical component.

Edge-specific evaluation conditions151can be applied to a wafer evaluation system to provide edge-specific metrics50. From edge-specific metrics50may then be derived edge-specific statistics950, which comprise, for example, an average of all the values of the metric with which it is associated, for all of the evaluation areas84in a specified set. For example, for annular sector-defined ES evaluation areas9, the set of evaluation areas84comprises all of the annular sectors in annulus44. For annuli-defined EG evaluation areas7, the set of evaluation areas84comprises all of the annuli defined on the wafer10.

Referring toFIGS. 15a-15c, EG conditions110, which specify an edge global evaluation area82EG (i.e., an annulus44), include the EGBI conditions410, the EGF3conditions420, and the EGFL conditions440.

Referring toFIG. 15a, the EGBI conditions322, which specify measuring the flatness of an Edge Global evaluation area7using an ideal wafer back surface planar fitted surface184BI, which is used to define a BI coincident deviation surface186BIC, provide the EGBIR metric302, and its associated Mean EGBIR statistic312.

As shown inFIG. 15b, the EGF3conditions420, which specify measuring the flatness of an Edge Global evaluation area7using a planar F3Three Point Front Surface fitted reference surface184F3and a coincident deviation surface386C to define a Three Point Front Surface planar coincident deviation surface186F3C, provide the following metrics and statistics:EGF3R metric421and its associated Mean EGF3R statistic521.EGF3D′ metric426and its associated Mean EGF3D′ statistic526,EGF3X′ metric427and its associated Mean EGF3X′ statistic527,EGF3N′ metric428and its associated Mean EGF3N′ statistic528, andEGF3Q′ metric429and its associated Mean EGF3Q′ statistic529.
EGFL Conditions440:

As shown inFIG. 15c, the EGFL conditions440, which specify measuring the flatness of an Edge Global evaluation area7using a planar FL Least Squares Global Front Surface fitted reference surface184FL and a coincident deviation surface386C to define a Least Squares Global Front Surface planar coincident deviation surface186FLC, provide the following metrics and statistics:EGFLR metric441and its associated Mean EGFLR statistic541,EGFLD′ metric446and its associated Mean EGFLD′ statistic546,EGFLX′ metric447and its associated Mean EGFLX′ statistic547,EGFLN′ metric448and its associated Mean EGFLN′ statistic548, andEGFLQ′ metric449and its associated Mean EGFLQ′ statistic549.

Referring toFIGS. 15d-15g, ES conditions130, which specify an edge sector evaluation area9(i.e. annular sector40b), include the ESBI conditions310, the ESF3conditions320, the ESFL conditions340, and ESFQ conditions360.

As shown inFIG. 15d, the ESBI conditions310, which specify measuring the flatness of an Edge Sector evaluation area9using a Planar Back Surface (Ideal) planar fitted surface184BI, which is used to define a BI coincident deviation surface186BIC and a BI displaced deviation surface186BID, collectively known as BI planar deviation surfaces186BI, provide the following metrics and statistics:For BI planar deviation surfaces186BI:ESBIR metric311and its associated Mean ESBIR statistic911,For a BI planar displaced deviation surface186BID:ESBID metric312and its associated Mean ESBID statistic912,ESBIX metric313and its associated Mean ESBIX statistic913,ESBIN metric314and its associated Mean ESBIN statistic914,ESBIQ metric315and its associated Mean ESBIQ statistic915,For a BI planar coincident deviation surface186BIC:ESBID′ metric316and its associated Mean ESBID′ statistic916,ESBIX′ metric317and its associated Mean ESBIX′ statistic917,ESBIN′ metric318and its associated Mean ESBIN′ statistic918, andESBIQ′ metric319and its associated Mean ESBIQ′ statistic919.
ESF3Conditions320:

As shown inFIG. 15e,the ESF3conditions320, which specify measuring the flatness of an Edge Sector evaluation area9using a planar F3Three Point Front Surface fitted reference surface184F3and a deviation surface86(comprising one of the coincident deviation surface386C or displaced deviation surface386D) to define the Three Point Front Surface planar deviation surfaces186F3(comprising an F3planar coincident deviation surface186F3C and an F3planar displaced deviation surface186F3D), provide the following metrics and statistics:For F3planar deviation surfaces186F3:ESF3R metric321and its associated Mean ESF3R statistic921,For an F3planar displaced deviation surface186F3D:ESF3D metric322and its associated Mean ESF3D statistic922,ESF3X metric323and its associated Mean ESF3X statistic923,ESF3N metric324and its associated Mean ESF3N statistic924,ESF3Q metric325and its associated Mean ESF3Q statistic925,For an F3planar coincident deviation surface186F3C:ESF3D′ metric326and its associated Mean ESF3D′ statistic926,ESF3X′ metric327and its associated Mean ESF3X′ statistic927,ESF3N′ metric328and its associated Mean ESF3N′ statistic928, andESF3Q′ metric329and its associated Mean ESF3Q′ statistic929.
ESFL Conditions340:

As shown inFIG. 15f, the ESFL conditions340, which specify measuring the flatness of an Edge Sector evaluation area9using a planar FL Least Squares Global Front Surface fitted reference surface184FL and a deviation surface86(comprising a coincident deviation surface386C or displaced deviation surface386D) to define the Least Squares Global Front Surface deviation surfaces186FL (comprising an FL planar coincident deviation surface186FLC and an FL planar displaced deviation surface186FLD), provide the following metrics and statistics:For FL planar deviation surfaces186FL:ESFLR metric341and its associated Mean ESFLR statistic525.For an FL planar displaced deviation surface186FLD:ESFLD metric342and its associated Mean ESFLD statistic942,ESFLX metric343and its associated Mean ESFLX statistic943,ESFLN metric344and its associated Mean ESFLN statistic944,ESFLQ metric345and its associated Mean ESFLQ statistic945,For an FL planar coincident deviation surface186FLC):ESFLD′ metric346and its associated Mean ESFLD′ statistic946,ESFLX′ metric347and its associated Mean ESFLX′ statistic947,ESFLN′ metric348and its associated Mean ESFLN′ statistic948, andESFLQ′ metric349and its associated Mean ESFLQ′ statistic949.
ESFQ Conditions360:

As shown inFIG. 15g, the ESFQ conditions360, which specify measuring the flatness of an Edge Sector evaluation area9using a Least Squares Sector Front Surface fitted reference surface84FQ (comprising one of the FQ planar fitted surface184FQ or FQ conical fitted surface284FQ′) and a deviation surface86(comprising a coincident deviation surface386C or displaced deviation surface386D) to define Least Squares Sector Front Surface planar deviation surfaces186FQ (comprising an FQ planar coincident deviation surface186FQC and an FQ planar displaced deviation surface186FQD) and Least Squares Sector Front Surface conical deviation surfaces286FQ′ (comprising an FQ conical coincident deviation surface286FQ′C and an FQ conical displaced deviation surface286FQ′D), provide the following metrics and statistics:For FQ planar deviation surfaces186FQ:ESFQR metric361and its associated Mean ESFQR statistic961.For an FQ planar displaced deviation surface186FQD):ESFQD metric362and its associated Mean ESFQD statistic962,ESFQX metric363and its associated Mean ESFQX statistic963,ESFQN metric364and its associated Mean ESFQN statistic964,ESFQQ metric365and its associated Mean ESFQQ statistic965,For an FQ planar coincident deviation surface186FQC:ESFQD′ metric366and its associated Mean ESFQD′ statistic966,ESFQX′ metric367and its associated Mean ESFQX′ statistic967,ESFQN′ metric368and its associated Mean ESFQN′ statistic968,ESFQQ′ metric369and its associated Mean ESFQQ′ statistic969.For FQ conical deviation surfaces286FQ′:ESFQ′R metric371and its associated Mean ESFQ′R statistic971.For an FQ conical displaced deviation surface286FQ′D:ESFQ′D metric372and its associated Mean ESFQ′D statistic972,ESFQ′X metric373and its associated Mean ESFQ′X statistic973,ESFQ′N metric374and its associated Mean ESFQ′N statistic974,ESFQ′Q metric375and its associated Mean ESFQ′Q statistic975,For an FQ conical coincident deviation surface286FQ′C:ESFQ′D′ metric376and its associated Mean ESFQ′D′ statistic976,ESFQ′X′ metric377and its associated Mean ESFQ′X′ statistic977,ESFQ′N′ metric378and its associated Mean ESFQ′N′ statistic978, andESFQ′Q′ metric379and its associated Mean ESFQ′Q′ statistic979.
Operation

In operation, as shown inFIGS. 9 and 10, the illustrative but not necessarily preferred embodiment has a wafer flatness evaluation system200using a method500for evaluating the flatness of a semiconductor wafer having an edge, in which a sample area is defined with reference to the sample's edge, and the flatness of the area is evaluated by evaluating the deviation between the area's surface and a deviation surface. As noted above, the flatness evaluation method of the illustrative but not necessarily preferred embodiment extends a flatness evaluation methodology described in U.S. Pat. No. 4,860,229 to take wafer boundary into account by developing evaluation areas that are defined with reference to the sample's edge and using edge-specific metrics50that are derived from edge-specific evaluation conditions151.

The wafer flatness evaluation system200has a wafer data collection system60which generated data values640for selected locations on the surface of the wafer10, and a wafer data analyzing system70for applying edge-specific evaluation conditions151to develop edge-specific metrics50and edge-specific statistics950.

The method500has a step600for acquiring data values640for the wafer10, and a step700for analyzing the data point values640to determine the flatness of a least a region of the wafer by determining the deviation of the wafer surface relative to a deviation surface.

Acquiring data for the locations on the annular sector in accordance with step600involves using an opposed pair of probes, not shown, to scan the front and back surface along a prescribed pattern, or by interferometric analysis such as that described in U.S. Ser. No. 10/411,019, entitled APPARATUS & METHOD FOR HOLDING & TRANSPORTING THIN OPAQUE PLATES and filed Apr. 9, 2003; and U.S. Ser. No. 10/308,484 entitled WEIGHTED LEAST SQUARE INTERFEROMETRIC MEASUREMENT OF MULTIPLE SURFACES and filed Dec. 3, 2002; and U.S. Ser. No. 10/393,883, entitled METHOD & APPARATUS FOR MEASURING SHAPE & THICKNESS VARIATION OF POLISHED OPAQUE PLATES, filed Mar. 20, 2003; all of which are herein incorporated by reference.

Alternatively, data may be acquired by obtaining the front surface height of a wafer10chucked on a surface. The data so obtained is constructed into a data array644that represents a surface of the wafer10. For example, the data array644could be a front surface data array641, a back surface data array643, or a thickness data array647that represents the front surface as it would appear if the back surface is ideally flat.

Data for data array644may be collected from only the area being evaluated or, as in the illustrative but not necessarily preferred embodiment, from the entire sample, with those values selected for analysis from locations within the area being investigated. The locations within the sample area may be anywhere within the area at any suitable data point locations and may be defined using any appropriate coordinate system.

When, as in the illustrative but not necessarily preferred embodiment, the evaluation area is an annulus or an annular sector defined in a first coordinate system, such as the polar coordinate system, data point locations may be defined in the same coordinate system or in a second coordinate system such as the Cartesian coordinate system. Further, data values for locations that are defined by one coordinate system may be interpolated from data values from data point locations that are defined by another coordinate system.

Therefore, acquiring data for locations defined by polar coordinates in accordance with step600may be accomplished in a step600adirectly or in a step600bthrough interpolation. Data values640may be direct data values642that are obtained by data development system60in a step600adirectly at locations defined by a selected coordinate system. Alternatively, data values640may be interpolated data values645that are developed in a step600bfor wafer locations defined by polar coordinates from data values obtained from wafer locations defined by Cartesian coordinates.

FIG. 11shows the step600awhen data values640are obtained from the wafer surface at the same locations on the wafers where the thickness measurement was made. In a step610, the surface area of the wafer10is organized into a grid of data points620. Data points620may be data points defined by any selected coordinate system. For example, data points620may be data points625that are defined by a polar coordinate system. Alternatively, data points620may be data points680that are defined by Cartesian coordinates.

If the Cartesian coordinate system is selected, for example, data points680may be located every 0.5 mm horizontally and vertically. In a step610A, the wafer evaluating system62uses any suitable conventional Cartesian grid defining technique to construct the Cartesian grid. One such suitable rectangular grid construction technique is to use the MESHGRID function in the MATLAB™ technical computing system to generate X and Y matrices for three-dimensional plots. The MATLAB™ technical computing system is available from the MathWorks, Inc. of Natick, Mass.

If the polar coordinate system is selected, data points625may be located every 0.1 degrees in the angular direction and 0.2 mm in the radiai direction. In a step610b, the system62would use any suitable conventional polar grid defining technique to construct the polar grid. One such suitable polar grid defining technique is to use the POLAR function in the MATLAB™ technical computing system, to generate r and θ matrices.

After the locations of data points620are defined, in a step630, direct data values642are collected from each of the locations of the data points620, and the thickness data array647is constructed. The system62uses any suitable conventional wafer reading system to obtain the thickness data array647.

FIG. 12shows the step600bwhen interpolated data values645are selected to be the data values640. The wafer flatness evaluating system200′ shown inFIG. 13may be used to operate the embodiment of step600bshown inFIG. 12. The system200′ has a wafer data collection system60′ and a wafer data development system62. Wafer data development system62has a location identification system63with a coordinate definition system61, a zone and annular sector definition system161and a data exclusion and interpolation system66, that uses input from the wafer data collection system60′ to provide interpolated data values645to a wafer data analyzing system70to develop the desired metrics and statistics.

Referring to bothFIG. 12andFIG. 13, step600binvolves a coordinate definition step650for defining the data point locations620,680for data analysis, and a step670for defining the zones44,64and annular sectors240a,260ato be analyzed. It also involves a step685for obtaining from the wafer data collection system60′ the data values660for the selected locations in the selected zones and annular sectors. Finally, step600binvolves a step690for creating interpolated data values645for locations620that are defined by polar coordinates from data values660from locations680defined by Cartesian coordinates.

The coordinate definition step650involves a step652, in which an input data Cartesian grid651is defined in order to form locations680that are defined by Cartesian coordinates. Locations680defined by Cartesian coordinates may be formed, for example, every 0.5 mm horizontally and vertically, for example in the same manner described above in connection with step610A. In a step653, polar coordinates corresponding to the locations680are calculated. Finally, in a step654, locations620comprising a uniform grid of polar coordinates, are defined, for example, every 0.1 degrees in the angular direction and 0.2 mm in the radial direction, for example in the same manner described above in connection with step610a.

Generally, the coordinate system and the locations of Cartesian coordinate-defined locations680are defined with step650as a part of the initial design of a wafer flatness evaluating system200′, and remain invariant. Once defined, the wafer flatness evaluating system62uses locations680as the locations for gathering data for all of the wafers10of the specified wafer size.

The zone and annular sector definition step670involves a step672in which zones44,64that are annuli based on FQA boundary22, intermediate radius42, and inner radius43are defined. In a step673, annular sectors240a,260athat are based on zones44,64and a selected angle a are defined. The zones' angle a is chosen as its annular extent so that there is always a sector centered on each cardinal point (e.g. 180 degrees).

As noted before, in the illustrative but not necessarily preferred embodiment, the circumferential edge exclusion AA is defined relative to the nominal edge14, and may be a value anywhere between 0 and the radius of the wafer10. Suggested values of circumferential edge exclusion AA are 2, 3, 4, & 5 mm. In one embodiment of the invention, FQA boundary22is defined 2 mm from the nominal edge14, and annular sector240a,260aare one of 72 annular sectors, respectively, in zones44,64, each having angular extent of 5° along zones44,64. Further, the radial extent (LR) of zones44,64is selectable; suggested values are LR=10, 15, 20 or 26 mm.

Generally, the zone and annular sector definition step670is performed by the user as part of the set up of the wafer flatness evaluating system200′ for analysis of a selected set of wafers10.

When the zones44,64and annular sectors240a,260aare defined, the step600bproceeds to a step685of obtaining a set of values660for locations680to prepare them for analysis. The data values660may be a set of values from a wafer10that is freshly determined by the wafer data collection system60′, or it could be a set of historical data that had been stored for future reference. The step600bthen proceeds to an exclusion and interpolation step690for developing a set of interpolated data values645for locations620.

Step690starts with a step692, in which the data exclusion and interpolation system66excludes from consideration any sectors in the wafer with features, such as notch and laser marks, that would disrupt flatness analysis. Then, in a step694, the data exclusion and interpolation system66interpolates data values660that are not so excluded onto the desired locations620. It uses the locations680and their associated data values660, and the locations620(which are defined in polar coordinates), to develop interpolated data values645at the locations620. The data exclusion and interpolation system66uses any suitable conventional interpolation technique to conduct the interpolation. One such suitable technique is to perform cubic interpolation using the INTERP2 “cubic” command in the MATLAB™ technical computing system.

Referring toFIG. 14andFIG. 3, in a step700, the wafer data analyzing system70determines the deviation of the wafer surface relative to a deviation surface86. With the definition of a fitted reference surface84and a suitable deviation surface86, the thickness data array647may be used to calculate surface flatness at the wafer's periphery.

Step700starts with a step710of defining the appropriate edge-specific evaluation conditions151. Such conditions are discussed above and identified inFIGS. 15a-15g.The variables within the conditions include an evaluation area82(such as annular sector40aofFIG. 4), a fitted reference surface84, a deviation surface86, and a metric calculation format88.

As shown inFIG. 22, the step710comprises a step712for selecting an evaluation area82, a step714for defining a fitted reference surface84, a step716for defining a deviation surface86, and a step718for defining a metric calculation format88.

As noted above, the evaluation area82defined in the step712may be either an “Edge Global” evaluation area or EG evaluation area7or, an “Edge Sector” evaluation area or ES evaluation area9.

Step714defines the fitted reference surface84using the evaluation algorithm384, outlined inFIGS. 23-25, which takes into account the desired number of dimensions of the fitted reference surface84. Turning toFIG. 23, the step714starts with a step715, in which the wafer surface for the fitted reference surface84is selected to be either the front surface6, also known as “F”, or the back surface8, also known as “B”. Once “F” or “B” is selected, step714proceeds to a step713to define a fitted reference surface84, using either a step713ato specify a planar fitted surface184or a step713bto specify a conical fitted surface284.

As shown inFIG. 24, in the step713a, the coefficients a, b, c of a planar fitted surface184are selected using one of the planar fitted surface development methods described above, namely the Planar Back Surface (Ideal) method384BI, the Planar Front Surface (Three Point) method384F3, the Planar Front Surface Least Squares (Global) method384FL, and the Planar Front Surface Least Squares (Sector) method384FQ, to define one of planar fitted surfaces184, namely and respectively, a Planar Back Surface (Ideal) planar fitted surface184BI, a Planar Front Surface (Three Point) planar fitted surface184F3, a Planar Front Surface Least Squares (Global) planar fitted surface184FL, and a Planar Front Surface Least Squares (Sector) planar fitted surface184FQ.

As shown inFIG. 25, in the step713b, the coefficients a, b, c of a conical fitted surface284are selected, using a Conical Front Surface Least Squares (Sector) method484FQ′, to define the Conical Front Surface Least Squares (Sector) conical fitted surface284FQ′.

Returning toFIG. 22, when the step714is completed, the step710proceeds to the step716for defining the suitable deviation surface86from which deviation of the wafer surface may be calculated. As noted above, options include either a coincident deviation surface386C (being coincident with the fitted reference surface84) or a displaced deviation surface386D (being displaced from the fitted reference surface84). The step710then proceeds to its end to the step718for defining a metric calculation format88such as one described in detail above.

Referring toFIG. 4withFIG. 14, when step710is completed, step700then proceeds to a step730for analyzing the data values640aat the locations620within the annular sector40ato determine the deviation of the surface of the annular sector40arelative to a deviation surface86. The data analyzing system70would select locations620located in the defined evaluation area82, calculating edge-specific metrics50for the defined evaluation areas82, such as the annular sectors40a, in an annulus44, using the desired set of edge-specific evaluation conditions151.

The data analyzing system70would develop as many metrics as would be appropriate given the circumstances. For example, it would calculate the ESFQR metric584with valid data within each annular sector as defined above. In addition, it would calculate any other desired edge-specific metrics50and edge-specific statistics950such as those shown inFIGS. 15a-15g.

Returning toFIG. 14, step700would then proceed to a step735, in which the data may be sorted to facilitate analysis. For example, thresholds736may be assigned to any metric50or statistic950.

Step700would then proceed to a step740, in which the data analyzing system70would present the results. Edge-specific metrics50and edge-specific statistics950are displayed, using display procedures such as the Site Metrics™ display that is available on the WaferSight™ system, which is available from Phase Shift Technology, Inc. (a wholly owned subsidiary of ADE Corporation, dba ADE Phase Shift), of Tucson, Ariz. For example, the edge-specific metrics50and edge-specific statistics950may be reported in spreadsheets, with metrics presented using rows for each sector and columns for each input parameter, and with statistics presented using rows for each set of metrics from which the statistic is developed and columns for each statistic type.

In addition, the annular sectors and zones associated with the calculated metrics and statistics to which thresholds have been applied could be displayed by presenting a figure of the wafer10, showing the areas evaluated and using color to represent sorting data. For example, when thresholds are assigned to calculated metrics and statistics for sorting purposes, each annular sector or zone could be displayed in selected colors to show its passed or failed status. In addition, plots of metrics could be displayed, for example ESFQR plotted against theta values and variation around the wafer.

It will be appreciated that the present invention can be advantageously employed for characterizing wafers other than determining flatness. It will further be appreciated that the present invention can be advantageously employed for characterizing objects other than wafers. In addition, it is important to note that, while the present invention has been described in the context of a fully functioning data processing system, those of ordinary skill in the art will appreciate that the processes and methods of the present invention are capable of being distributed in the form of a computer readable medium of instructions and a variety of forms, and that the present invention applies equally regardless of the particular type of signal bearing media actually used to carry out the distribution. Examples of computer readable media include recordable-type media such as floppy discs, hard disk drives, RAM, CD-ROMs, and transmission-type media, such as digital and analog communications links.

The description of the present invention has been presented for purposes of illustration and description but is not intended to be exhaustive or limited to the invention in the form disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art. This embodiment was chosen and described in order to best explain the principles of the invention, the practical application, and to enable others of ordinary skill in the art to understand the invention for various embodiments with various modifications as are suited to the particular use contemplated. Modifications of the presently disclosed invention are possible without departing from the scope of the appended claims.