Close-proximity communications system using capacitively coupled signal transfer

A system includes a first device having a first transceiver and a first device electrode pair connected to the first transceiver, and a second device having a second transceiver and a second device electrode pair connected to the second transceiver. The second device electrode pair is located relative to the first device electrode pair such that the first device electrode pair and the second device electrode pair form a capacitive network. The first transceiver and second transceiver are each configured to receive a plurality of bits, encode each bit of the plurality of bits, and DC balance and transmit each of the plurality of encoded bits over the capacitive network. Methods for use with the system are provided for encoding and transmitting data, as well as receiving and decoding the encoded data.

BACKGROUND

There are numerous ways that two electrically isolated devices can communicate. Radio frequency (RF) communications is one of the most common communication methods. However, for close proximity communication, RF communication is not desirable in light of the bandwidth requirements, power consumption, and design complexity associated with RF system design.

Infrared (IR) communication presents another possible communication method, wherein infrared light is used to communicate digital information. Compared to RF, IR is more suitable for proximity communications, but the transceiver aperture must be kept relatively free of blockage (e.g. dust and dirt build up). As a result, IR communication is not generally suitable for outdoor applications. To overcome such blockages, the output power of the IR transmitter can be increased which increases overall power consumption. Additionally, IR diodes and transistors, whether packaged together or separate, have some amount of height, which may not be ideal for certain communication devices.

Magnetic coupling offers another communication alternative. This form of communication uses magnetic fields to allow two devices that are magnetically coupled to communicate. The magnetic fields are typically generated by driving coils. The generated magnetic field is picked up by a pick-up coil on the receiving circuitry. For fast communications, the coils have to be small to reduce the coil charging time. However, this results in a weak magnetic field generated by the small coil, meaning that: a) effective communications may only be possible if the generator and pick-up coil are placed very near each other, beyond practical limits, b) the receiver circuitry of the pick up coil has be extremely sensitive, or c) there must be a set of separate generator and pick-up coil in each transceiver where the pick-up coil can be made bigger to be more effective, but this means that the coils take up additional space in each device. Bigger coils and/or more power is needed to generate larger magnetic fields to meet the above limitations, but this requires more device space and/or more power consumption.

A need exists for a system and method that allows for close-proximity communication between devices without requiring high power consumption or significant device space.

DETAILED DESCRIPTION OF SOME EMBODIMENTS

As shown inFIG. 1, a transceiver10, viewed as “black box”, contains one input port (Tx), one output port (Rx), and two bi-directional differential ports (E0and E1). As an example, data received by transceiver10may originate from a microprocessor. Ports E0and E1are connected to electrodes E0and E1and are bi-directional. Overlapping respective E0and E1electrodes of two transceiver devices forms a capacitive network (seeFIG. 2), via which encoded bits are transmitted and received. Output bits from the data source, fed into the Tx port, are encoded and differentially transmitted over the E0and E1electrodes. Similarly, encoded bits differentially received by electrodes E0and E1are decoded and sent to the data source over the Rx port. This method allows two devices to communicate bi-directionally in half-duplex mode.

Transceiver10provides non-contact form of bi-directional digital communications between two electrically isolated devices. The devices communicate over a capacitively coupled differential interface by transmitting and receiving encoded binary data. Transceiver10allows DC balanced encoded bits to be differentially transmitted and received between two devices in close proximity. Such close proximity allows the formation of a capacitive interface via which data is communicated. In the following sections the capacitive interface, differential transmission, and bit encoding will be discussed.

Capacitive Interface

Each transceiver, such as transceiver1000ofFIGS. 12 and 13, contains a set of electrodes that are connected to the E0and E1ports. The close proximity of the pair of electrodes in one device to another transceiver device forms a capacitive interface through which data is communicated.FIGS. 3-7show perspective views of some examples of two such transceiver devices.FIG. 2shows the equivalent capacitive network of the capacitive interface, regardless of the configurations shown inFIGS. 3-7. Vinrepresents a differentially transmitted signal and Vouta differentially received signal, in phase with Vin.

When placed close to each other, the electrodes form a capacitive network. As an example, for a capacitive network to form using 1 inch square electrodes, the distance between the electrodes of the devices should be approximately 10 mm. The closer the electrodes are, the better capacitive network formed. However, it is to be recognized that the close proximity distance between the electrodes that may cause a capacitive network to form may vary depending on various factors such as the size and shape of the electrodes and the dielectric material used. The subscript of each electrode denotes the device number. Exciting electrodes E01and E11with a voltage source Vin, causes a corresponding output voltage Vout, to appear across electrodes E02and E12through capacitive coupling. Similarly, exciting electrodes E02and E12with a voltage source Vin, causes a corresponding output voltage Vout, to appear across electrodes E01and E11.

Due to the nature of the capacitive network, a fundamental voltage division takes place, causing Voutto necessarily be an attenuated version of Vin. The analytical expression for Voutis simplified to prove this point. InFIG. 2a, let all the electrodes be equal in dimension, then, due to symmetry, C4=C1, C5=C2, and C6=C3. Under this special condition,

Vout=Vin⁢C⁢⁢2-C⁢⁢32⁢C⁢⁢1+C⁢⁢2+C⁢⁢3Eq.⁢(1)
which shows that Voutis an attenuated version of Vin, therefore, signal amplification may be necessary by the receiver circuitry. Note that C2is always greater than C3, causing Voutto be in phase with Vin.

As shown inFIG. 3, system200includes device210and250. Device210has a transceiver220and electrodes230and240. Device250has a transceiver260and electrodes270and280. When devices210and250are placed in close proximity to one another, separated by a distance s, electrodes230and240line up with electrodes270and280, forming the capacitive interface.

FIG. 4shows another embodiment of a close proximity communication system300using capacitively coupled signal transfer. System300includes device310with electrodes320and330, and device340with electrodes350and360. The capacitive interface is formed when device310is inserted into device340such that electrode320lines up with electrode350and electrode330lines up with electrode360.

As shown inFIG. 5A, system400includes device410and460. Device410includes a base420, shaft430, and electrodes440and450formed on or within shaft430. Electrodes440and450have breaks therein, such as break442, to prevent a loop antenna from forming that prevents pickup of unwanted electromagnetic noise. Device460includes an internal opening470with electrodes480and490on or formed therein. Electrodes480and490have breaks therein, such as break492, to prevent a loop antenna from forming. The capacitive interface is formed when shaft430of device410is inserted into opening470of device460such that electrode440lines up with electrode480and electrode450lines up with electrode490(seeFIG. 5B). In this configuration, communications can take place even when the devices rotate with respect to each other.

As shown inFIG. 6, system500includes a device510having an end512with a first electrode520and a second electrode530. Electrode520has a break522therein and electrode530has a break532therein to prevent a loop antenna from forming. As shown inFIG. 7, when end512of device510is placed a distance s from a device540having an end542, with device540being similarly configured as device510, a capacitive interface is formed and the devices can communicate with one another even if one device rotates with respect to the other.

Each electrode in any ofFIGS. 3-7can be made from a simple copper or other conductive material. As an example, the electrodes can comprise copper areas formed on a printed circuit board (PCB). The electrodes may comprise various shapes depending on the functionality and configuration of the particular device it is contained within.

In some embodiments, each electrode pair can be placed inside the enclosure of a device. Layer stack-up examples for the electrode configuration shown inFIG. 3are shown inFIG. 8. Referring toFIG. 8A, a system600may include a first device610and a second device620separated by a distance s by an air gap630. It should be recognized that it is not necessary for air to be the content within the separation distance s, as any non-conductive dielectric material, liquid, or gas, can fill the gap. In fact, any non-conductive dielectric material, liquid, or gas with a high dielectric constant can help increase C2, therefore minimizing the voltage division. For example, the dielectric constant of air is about 1, so any improvement upon this value helps the system.

First device610may include a PCB612, a pair of electrodes614, and a non-conductive enclosure616having a dielectric material618therein. Non-conductive enclosure616may be separated from PCB612by an air gap619. Second device620may be similarly configured as first device610, including a PCB622, a pair of electrodes624, and a non-conductive enclosure626having a dielectric material628therein. Non-conductive enclosure626may be separated from PCB622by an air gap629. Electrodes614and electrodes624may be separated by a distance d.

As shown inFIG. 8B, dielectric material618and628of device610and620may have a gap640and642, respectively. Further, as shown inFIG. 8C, a floating shield650may be coupled to PCB612of device610and PCB622of device620. Shields650and660may serve to protect any circuitry in close proximity to the electrodes from any potential interference when the electrodes are charged by the transmitter. The shield will cause some amount of attenuation to the received signal. That is, Vout will be further attenuated. However, the amount of attenuation may be tolerable based on the overall design. Shields650and660may be placed further away from PCB612to minimize the level of attenuation on Vout, but they cannot be too far away such that they will not act as a proper shield. The distance between the shield and the PCB depends on the amount of shielding that is needed and attenuation of Vout that can be tolerated. It should be noted that the relative dimensions shown inFIG. 8are not to scale.

Further, in some embodiments, the air gaps and dielectric materials may or may not be present in the devices. Additionally, in some embodiments, the electrodes need not be of equal dimension, as one device can have larger electrodes than the other, although it is desirable to make both electrodes in a pair to be of equal dimension to maximize the common mode rejection (CMR) of any coupled noise. Electrode size variation simply changes the overall capacitance values in the capacitive network.

The voltage division of equation 1 reduces the signal-to-noise ratio (SNR) of the received signal and limits the maximum distance d, therefore, reducing the amount of voltage division is desired to maximize the SNR. From equation 1, the voltage division is reduced when C2is increased and/or C1and C3are decreased. A first order expression for a parallel plate capacitor is given by,

C=ɛ0⁢ɛr⁢AdEq.⁢(2)
where ∈ois the permittivity constant, ∈ris the relative permittivity of the dielectric material between the plates (e.g. for air the value of ∈ris approximately 1, for ABS plastic ∈ris approximately 3), d is the distance between the plates (or dielectric thickness), and A is the surface areas of the plates. C2can then be increased by reducing d, but this may not be practical or possible based on the application. The surface area of the electrodes can be increased but this also causes an increase in C1and C3that is relatively significant. Additionally, increasing the electrode size may not be practical given the available real estate in a device.

Thus, the last option is to increase ∈r. This can be accomplished by placing a dielectric material between the electrodes, like that shown inFIGS. 8A-8C. It should be noted that the non-conductive enclosure material will also increase ∈rsince its value is greater than 1. But much higher valued dielectric materials, which may not be suitable as device enclosures, can be used within the enclosure for greater increase in capacitance, C2. In addition to increasing C2(and C5) the dielectric material will also cause an increase in C1(and C4) and C3(and C6), but of much less significance.

The dielectric material placement can be further improved by concentrating its area of coverage to just over each electrode, as shown inFIG. 8B. Due to the removal of a small portion of the dielectric material, the value of C2(and C5) will be slightly less than what it would be under the stack-up ofFIG. 8A. On the other hand, the values of C1(and C4) and C3(and C6) will be much less than what they would be under the stack-up ofFIG. 8A. The consequence of this is reduced voltage division (less signal attenuation) in the material stack-up ofFIG. 8Bcompared toFIG. 8A. This is a desirable effect. Removing the non-conductive enclosure material from in between the two separated dielectric materials should further reduce the voltage division.

The shape of the dielectric material over the electrodes need not be the same as the electrodes. The effectiveness in reducing the voltage division is what is important, which depends on the dielectric constant and geometry of the overall material stack-up. The position and area of the dielectric material over the electrode area can be adjusted to minimize the voltage division across the capacitive network.

FIGS. 9-11show cross-section views of embodiments of material layering configurations of systems such as those shown inFIGS. 4-7.FIG. 9shows a cross-section view of a system similar to system300ofFIG. 4.FIG. 9depicts a system700having a first device710with a second device740inserted therein and separated by distance s. First device710contains dielectric materials712and714, while second device742contains dielectric material742and744. First device710also includes electrodes720and730, while second device740includes electrodes750and760. Dielectric materials712,714,742, and744are aligned with corresponding electrodes720,750,760, and730, such that a capacitive interface is formed.

One advantage of the configuration shown inFIG. 9is that the cross coupling capacitors C3and C6, and the loading capacitor C4, is quite reduced since the electrode pair in each device are quite far from another. This reduces the voltage division. One disadvantage is that the farther the electrode pairs are within a device, the less effective they will be against common mode noise.

FIG. 10shows a cross-section view of system similar to system400ofFIG. 5A.FIG. 10depicts a system800having a first device810inserted within a second device820and separated by an air gap830of a distance s. First device810has an outside diameter shown by dimension812. First device810also includes an inner electrode having a break814therein. The purpose of break814is to prevent current flow due to external electromagnetic or magnetic field interference, which translates into noise. The break prevents a loop antenna from forming. Second device820has an inner diameter shown by dimension822. Second device820contains an outer electrode having a break824therein. The electrodes of devices810and820are separated by a distance d, such that a capacitive interface is formed between the electrodes.

FIG. 11shows a cross-section view along line A-A′ of system500ofFIG. 7.FIG. 11shows a system900having a first device910and a second device960. First device910includes a PCB920, a first pair of electrodes930, a second pair of electrodes940, and a non-conductive enclosure950having dielectric material952therein. First device910and second device960may be separated by a distance s. Second device960includes a PCB970, a first pair of electrodes980, a second pair of electrodes990, and a non-conductive enclosure992having dielectric material994therein. The electrodes of devices910and960are separated by a distance d, such that a capacitive interface is formed between the electrodes.

Differential Transmission

Two devices as discussed herein, such as devices210and250, may communicate using differential signaling. Differential signals are used in a wide array of communications interfaces such as Ethernet, Low Voltage Differential Signaling (LVDS), Universal Serial Bus (USB), and many others. Differential signals are well understood and known to be highly immune to external noise and interference, such as electromagnetic interference (EMI) and radio frequency interference (RFI).

Differential signals are formed by two complimentary signals. The differential receiver recognizes the difference between these signals and ignores any common signals. This is known as common mode rejection (CMR). Since the wiring between two complimentary pairs is tightly coupled, any external form of noise and interference couples to both conductors that shows up at the receiver as common mode noise, which is rejected.

FIG. 12shows a more detailed block diagram of the transceiver shown inFIG. 1. The following explanation of transceiver1000refers toFIGS. 2,3, and12, with the assumption that a first device is transmitting and a second device is receiving. A series of bits representing some binary information to be transmitted by transceiver1000is fed into the transmit line (Tx) of encoder1010. For each bit in this series, encoder1010generates a corresponding pair of bits on lines transmit-bit-0(Txb0) and transmit-bit-1(Txb1). A pulse transmitter1020converts these bits into a differential pair of DC balanced pulses, pulse-0(P0) and pulse-1(P1), which represent the encoded bit. Encoder1010enables pulse transmitter1020via the transmit enable (TE) line. Pulse transmitter1020is deactivated upon completing the transmission.

The differential signal of P01and P11(subscript number denoting the device number) transmitted by the first device is capacitively coupled to the electrodes of the second device through the capacitance network formed by the electrodes, such as E01030and E11040, of both devices. The differential signal of P02and P12received by the second device is an attenuated version of the signals P01and P11. The attenuation is due to the inherent voltage division of the capacitive network. The amount of voltage division (or signal attenuation) is further worsened by any capacitive loading in parallel with C4. This additional capacitive loading can come from any parasitic capacitance and internal capacitance of pulse receiver1050and circuitry of pulse transmitter1020.

The attenuated differential voltage of signals P02and P12is received by pulse receiver1050. Pulse receiver1050amplifies this differential voltage, converts it into a single-ended signal, and adds a DC bias. The receive-pulse (RxP) signal provided by the pulse receiver1050is fed into a threshold detector1060, which reconstructs the original pair of bits Txb0and Txb1, as bits receive-bit-0(Rxb0) and receive-bit-1(Rxb1). The Rxb0and Rxb1bits are used by a decoder1070to reconstruct the original binary information, which is output on the receive line (Rx).

During transmission, a transceiver1000receives its own transmitted signal since the P0and P1lines are tied to both pulse transmitter1020output and the pulse receiver1050input. Therefore, transceiver1000will receive its own Txb0and Txb1bits at the input of decoder1070in the form of Rxb0and Rxb1. Transceiver1000must either ignore these bits or not decode any received information while it is transmitting. This limitation causes transceiver1000to operate in half duplex mode, where information cannot be received while a transmission is in progress. However, this limitation can be avoided if multiple pairs of electrodes are used, with one pair of electrodes connected to pulse transmitter1020and the other pair of electrodes connected to pulse receiver1050, such that pulse transmitter1020is isolated from pulse receiver1050. Such configuration may be possible provided there is available space in the device within which transceiver1000is contained.

Transceiver1000can be constructed entirely as an integrated circuit (IC) with a Tx input port, Rx output port, E0/E1bi-directional ports, positive supply connection, and negative supply connection (where connecting the negative supply pin to the system ground places transceiver1000in single-supply operation). Alternatively, an internal charge pump or a switching regulator can be used to provide a negative supply voltage from the external positive supply voltage, allowing the IC to have access to positive and negative supply voltages from a single external positive supply voltage. Other ports can be provided to allow custom setting of the threshold levels via external resistors. An IC version will dramatically reduce size, cost, and power consumption. Additionally, incorporating some form of hardware differential coding mechanism within the IC to make the received data polarity insensitive will further enhance the capabilities of transceiver1000.

FIG. 13depicts a simplified schematic diagram of transceiver1000as shown inFIG. 12. Pulse transmitter1020is broken down into two sections comprising amplifiers1022and1024, and a transmit switch1026. Amplifiers1022and1024are set up as two parallel difference-amplifiers, producing the two complimentary signals TxP0and TxP1. The voltages of TxP0and TxP1can be represented as,
TxP0=AV1(Txb0−Txb1)  Eq. (3)
TxP1=AV2(Txb1−Txb0)  Eq. (4)
where AV1and AV2are the voltage gains of the amplifiers1022and1024, respectively. To generate symmetrical signals AV1=AV2=AV. For simplicity, the feedback networks that produce these gains are omitted from the diagram.

Transmission is enabled by activating transmit switch1026. Transmit switch1026is needed to isolate the output of amplifiers1022and1024during receive mode because the outputs of amplifiers1022and1024are low impedance. Failing to isolate the outputs will make signal reception impossible by severely loading the C4. Therefore, after completion of a transmission, transmit switch1026is disabled (i.e. switch is open, isolating the electrodes from the output of1022and1024), causing its output to go into high-Z (or high impedance) mode. In high-Z mode the output of transmit switch1026must have a minimal capacitive and resistive loading effect on the electrodes E0and E1(or equivalently, C4). Transmit switch1026can be any one of a vast variety of solid state analog switches available from different manufacturers. Enabling transmit switch1026connects TxP0to P0and TxP1to P1. The differential voltage across the electrodes is expressed as,
P1−P0=TxP1−TxP0=2AV(Txb1−Txb0)  Eq. (5)
which is twice the magnitude of the individual gain of each difference-amplifier. Since the received signal is inherently attenuated, the greater the amplitude of the transmitted differential voltage the greater will be the received differential voltage. Transmitting twice the differential voltage between Txb1and Txb0equates to a 6 dB increase in the received SNR.

In some embodiments, amplifiers1022and1024can be replaced by a single, fully differential amplifier. In such case, with transmit switch1026closed, the output differential voltage will be,
P1−P0=TxP1−TxP0=AV(Txb1−Txb0)  Eq. (6)

Again, for simplicity, the feedback network that generates the gain AVis omitted. The fully differential amplifier produces one half the gain of the two parallel difference-amplifiers for a given amplifier gain of AV. Even though its output voltage is 6 dB less than the difference-amplifiers, the required signals TxP0and TxP1can be generated with only one amplifier.

A pulse receiver1050comprising amplifiers1052,1054, and1056, is shown in a standard three-amplifier instrumentation amplifier (IA) topology. Since it is important to minimize any loading across C4, pulse receiver1050must have low input capacitance and high input resistance. The low input capacitance helps to minimize the amount of voltage division across the capacitive network as indicated in equation 1. The high input resistance helps to increase the RC time constant formed between the capacitive network and the input resistance of the IA, which minimizes the exponential decay of the received signal. IA's are ideally suited for these requirements.

The high input impedance (low input capacitance and high input resistance) of the IA topology is much less of a constraint and concern when compared to the input bias current Ibof the amplifiers1052and1054. Electrodes E01030and E11040connected directly to the non-inverting input of amplifiers1052and1054cannot be allowed to float because the inherent input bias current of amplifiers1052and1054will charge the equivalent capacitive network to the supply rails, making signal reception impossible. Therefore, a DC current path to ground must be provided at the non-inverting input of amplifiers1052and1054. This is shown as resistors R4and R5connected to ground.

The input resistance of amplifiers1052and1054is usually much higher than R4and R5, therefore the need for R4and R5has the adverse effect of lowering the input resistance of pulse receiver1050. R4and R5can be chosen to be of a sufficiently high value, however, Ib3and Ib4may cause too great an output offset voltage Vo3and Vo4(undesired DC voltage appearing at the A3and A4output). For example, if R4and R5are 1MΩ each with Ib3and Ib4both equal to 1 μA, then Vo3and Vo4will be equal to (1 μA)(1MΩ)=1V each. This leads to an undesired introduction of a common mode voltage at the inputs of A5that works to minimize its CMR headroom, which can ultimately lead to decoding errors.

Amplifiers with higher Ibtend to operate much faster than their lower Ibcounterparts. Higher bias currents require lower values for R4and R5to keep Volow. But low resistor values decrease the total RC time constant of the capacitive network and resistors R4and R5. This in turn leads to an increase in the received signal decay rate. Therefore, the transmitted signal pulse widths must be shortened to minimize the amount of signal decay, so that proper decoding can take place. This means that the amplifiers must be fast to deal with short pulse widths, which happens to be the case when Ibis large, as stated earlier. The goal, then, is to minimize Vowhile being able to successfully decode the received signal.

The inverse of this process also allows the above mentioned goal to be met. That is, when slower amplifiers are used, the signal pulse widths must be widened to allow ample time for signal propagation. Longer pulse widths, though, require slower signal decay for proper signal decoding. This in turn requires a higher total RC time constant, which requires high values for R4and R5. Fortunately, slower amplifiers usually have low Ibwhich when combined with higher R4and R5values still manage to produce a small Vo. This design loop of the input of pulse receiver1050is illustrated by diagram1100as shown inFIG. 14. Amplifier1056in the IA topology serves to provide CMR and add a DC bias to the output signal RxP. It should be noted that pulse transmitter1020and pulse receiver1050can operate with single-supply or dual-supply voltages. The single-supply operation, however, limits the magnitude of the transmitted signal, which can reduce the effective distance d.

Threshold detector1060, including comparators1062and1064, reconstructs the initial transmitted pair of bits Txb0and Txb1by comparing the signal RxP to two threshold levels. The DC bias sets RxP at the midpoint of the supply voltage VDD. The two threshold levels are set to deviate from this DC bias by an equal amount. The upper threshold level VTHis set somewhere above VDD/2, while the lower threshold level VTLis set somewhere below VDD/2. If a pulse riding around the DC offset value of RxP rises above VTHthen threshold detector1060outputs a high bit on line Rxb1, and if the pulse drops below VTLthen threshold detector1060outputs a high bit on line Rxb0. Setting the VTHand VTLvalues close to the DC offset value of RxP increases the sensitivity of threshold detector1060, which means the pulses around the DC offset do not need to be amplified by a great deal. The disadvantage is that increasing the sensitivity leads to an increasing vulnerability to noise and errors.

FIG. 15shows an embodiment of a threshold detector1200including hysteresis. Threshold detector1200may be used to further improve the detection of proper pulses in the presence of noise. Adding hysteresis to the threshold detector allows proper Rxb0and Rxb1reconstruction even in the presence of noise that the differential signaling and sensitivity settings were unable to eliminate and ignore.

The added buffers1210and1220, connected to amplifiers1230and1240, along with the additional resistors R6and R7, allow individual adjustments for the amount of hysteresis. In some embodiments, buffers1210and1220can be replaced with inverters, N-channel MOSFETS, P-channel MOSFETs or diodes. In operation, when RxP rises above the upper threshold VTH, a switch is activated (in this case buffer1210) to pull R6low, causing the value of VTHto drop according to the R1, R2, R3, and R6resistors. When RxP transitions below the new value of VTHbut above VTL, the threshold levels returns back to normal values which only depend on R1, R2, and R3. In this region, buffers1210and1220are off. As RxP transitions below VTL, a switch is activated (in this case buffer1220) to pull up R7, causing the value of VTLto rise according to R1, R2, R3, and R7resistors. Finally, as RxP transitions above the new value of VTLbut below VTH, the threshold levels return back to nominal values.

FIG. 16shows a graph1300illustrating hysterisis plots for a threshold detector such as that ofFIG. 15. As shown, as RxP increases above VDD/2 passing the nominal upper threshold VTH, Rxb1switches high. At this time, the upper threshold voltage is modified to be lower than the nominal. As RxP transitions back, it passes the modified upper threshold VTH(MOD)before Rxb1switches low. A similar transition is shown for Rxb0when RxP varies below VDD/2. The DC value of RxP does not have to be VDD/2, but setting it as such maximizes the signal headroom above and below this value.

A transceiver, such as transceiver1000, may thus employ three techniques to deal with noise and make the entire communication system extremely noise-and-interference robust: 1) differential signaling to reject common mode noise; 2) sensitivity setting to ignore other coupled noise or non-rejected noise; and 3) hysteresis setting to detect correctly in the presence of noise

Bit Encoding

To implement a robust communications scheme, a method of line encoding having the following characteristics may be used: 1) every bit is encoded; 2) every encoded bit is DC balanced, and 3) every DC balanced encoded bit is differentially transmitted and received. The bit encoding technique may be used to effectively reduce the receiver error to zero. To achieve this, each bit in the binary sequence of the data may be encoded in a manner such that every encoded bit has the same average DC value. DC balancing of every bit ensures that the DC value of the overall encoded signal is unchanged and independent of the data. This means that there will be no long term signal decay and degradation that can cause decoding errors. Such encoded bits create a predictable encoded signal that the receiver can decode accurately.FIG. 17illustrates a graphical illustration1400of the encoding logic for “zero” and “one” bit data. In some embodiments, the encoding logic for “zero” and “one” bit data may be the reverse of what is shown inFIG. 17.

The b0and b1logic levels correspond to the Txb0/Rxb0and Txb1/Rxb1lines shown inFIG. 13. With reference toFIG. 13, when encoder1010receives a zero bit on its Tx line it generates the corresponding Txb0and Txb1levels according to the logic 0 encoding column. In other words, decoder1070first generates a high pulse on line Txb0, then simultaneously drives Txb0low while driving Txb1high, and finally drives Txb1low. The opposite sequence is performed for a one bit received on the Tx line. The encoded bit may be represented by,
Encoded bit=b1−b0  Eq. (7)
Amplifiers1022and1024generate two encoded bits of opposite polarity, the difference of which appears across the electrodes E01030and E11040. Pulse receiver1050may receive an attenuated version of this encoded train of bits, which it can amplify if necessary. Pulse receiver1050may add a DC bias to the received signal, which is used for proper decoding. The same data sequence shown inFIG. 17is now put through this encoding and decoding mechanism. The example signals are shown inFIG. 18.

Signal (a) ofFIG. 18represents a Tx signal to be encoded by encoder1010. Signals (b), (c), and (d) represent the method, as shown and described with respect toFIG. 17, to encode each zero and one bit of the Tx signal shown in signal (a), and the encoded data to be differentially transmitted across electrodes E01030and E11040. Signal (e) represents RxP, which is the attenuated version of the received transmitted signal shown in signal (d), amplified if necessary, and injected with a DC value of half the supply voltage, represented by VDD/2. The encoded bits ride around this known DC value. When a pulse rises above the upper threshold of VTHa high pulse is generated on signal Rxb1and when a pulse drops below the lower threshold of VTLa high pulse is generated on Rxb0. The pulse order of Rxb0and Rxb1correlate exactly with the pulse order of Txb0and Txb1. Decoder1070may then correctly reconstruct the original message based on this order, as shown in signals (f), (g), and (h) ofFIG. 18, where Tx equals Rx.

The bit encoding discussed above possesses two important characteristics, 1) the pulse widths of the encoded bits are kept relatively short so that the per-bit decay is insignificant and 2) the average DC value of the encoded train of bits does not vary over time, which is not subject to long term signal decay. Therefore all the factors shown inFIG. 14still apply, but this form of bit encoding is ideally suited to fit within that fundamental framework and constraints.

Clock recovery is not necessary for proper data reception since every bit is encoded. Therefore, a complete message is received without the need for a clock. It is entirely possible to send data one bit at a time where the time between bits varies, but still receive the entire message correctly. Since timing accuracy is not required, system complexity and cost are reduced.

There are several ways decoder1070can reconstruct the original message. A closer look at a received encoded logic “one” bit signal (signal a), with Rxb0/Rxb1pulses (signals b and c), is shown inFIG. 19. The encoded logic 1 bit signal serves as the input into the threshold detector on the RxP line. The Rxb0/Rxb1pulses represent the threshold detector output. Since amplifiers A31052and A41054are used to generate the differential signal of P0and P1, the signals are subject to the amplifier's slew rate. This is illustrated by the rising and falling ramps on the encoded logic 1 signal. As comparators C11062and C21064are usually much faster than the amplifiers, there is an amount of time where both Rxb0and Rxb1are low as the encoded pulse transitions from above VTHto below VTL. This does not present an issue however, as decoder1070can use different methods that employ different aspects of the received Rxb0and Rxb1pulses to decode the original message. Decoder1070can use many of the known characteristic of the Rxb0and Rxb1pulses to determine the validity of the pulses and arrive at the intended logic level of the original transmitted signal.

One decoding method that may be used is to determine which line pulsed first. That is, if Rxb0pulses first, then a logic 0 is received, and if Rxb1pulses first, then a logic 1 is received. Another method is to look for both pulses. For example, if Rxb0pulses first, followed by Rxb1, than a valid logic 0 has been received. Timing can also be used to decode the original message. For example, if Rxb0pulses first and if within a given window of time Rxb1pulses then a valid logic 0 has been received. Further, in other embodiments, logic level sampling can also be used. Decoder1070can be configured to sample the logic level of each pulse. If a pulse is received and the logic level is high at a give point in time or over a period of time, then a valid pulse has been received and decoder1070will have to determine which pulse was received first and which one received second.

In some embodiments, it is possible to receive the inverted version of the transmitted signal. In other words, Rx can equal the inverse of Tx. This can happen if the wiring to the electrodes is reversed on one of the devices, or if the devices are aligned such that E01lines up with E12, and E11lines up with E02. If this is a concern, the original binary data to be transmitted can first be differentially encoded and then fed into the Tx port so that no matter what Rx is, once differentially decoded, the original binary data is be retrieved. One example of differential encoding and decoding that is widely available, is given below. Note that “differentially encoded/decoded” bits here do not refer to the differentially encoded signal across the electrodes E0and E1.
Txi=Tx1-1⊕sidifferential encoding ofsiEq. (8)
si=Rxi⊕Rxi-1differential decoding ofsiEq. (9)
Here, sirepresents the binary information that is to be communicated between both devices. Txi, which depends on the previous bit Txi-1, represents the differentially encoded version of siand is fed into the Tx port of transceiver1000. At the receiver, the received signal Rximay or may not be the inverted version of Txi. No matter the case, differentially decoding Rxiwill retrieve the original signal which depends on the current bit Rxiand the previous bit Rxi-1.

FIG. 20shows a flowchart of an embodiment of a bit encoding and transmission method1700in accordance with the Close-Proximity Communications System Using Capacitively Coupled Signal Transfer. For illustration purposes, method1700will be discussed with reference to systems shown inFIGS. 2,3, and13discussed herein. Method1700may begin at step1710, which involves forming a capacitive network100between a first device210having a first device electrode pair (electrodes230and240) and a second device250having a second device electrode pair (electrodes270and280). Such capacitive network may be formed by placing the respective electrode pairs in close proximity to each other. In some embodiments, close proximity means a distance in the millimeter range. As one non-limiting example, close proximity may be a distance of less than about 10 mm.

It should also be recognized that, in other embodiments, the distance between the first and second electrode pairs may vary depending upon factors including, but not limited to, the surface area of the electrodes, the amount of overlap between the electrode pairs, the dielectric material between the devices, and the applied voltage across the electrodes within each electrode pair. As such, the term “close proximity” may be used to refer to different distances depending upon the particular configuration of the devices.

Method1700may then continue to step1720, which involves receiving a plurality of bits (shown as signal Tx) at first device210. Step1730may then involve encoding, using encoder1010, each bit of the plurality of bits to create two complimentary encoded bit pulses (Txb0and Txb1) from the plurality of bits. In some embodiments, each of the encoded plurality of bits has the same average DC value.

Next, method1700may proceed to step1740. Step1740involves using one or more amplifiers1022and1024to create two differential and DC balanced pulses (TxP0- and TxP1) from the two complimentary encoded bit pulses (Txb0and Txb1). Step1750may then involve transmitting the two differential and DC balanced pulses to the second device electrode pair (electrodes270and280) via capacitive network100. Such transmission may occur by activating a transmit switch1026, which may be activated by the TE line from encoder1010(seeFIG. 13).

If, at step1720, a “zero” bit is received by first device210, step1730may comprise the following steps: generating a high pulse on a first transmit line, subsequently generating a high pulse on a second transmit line, and generating an encoded bit pulse by subtracting the pulse values on the first transmit line from the pulse values on the second transmit line. If, at step1720, a “one” bit is received by first device210, step1730may comprise the following steps: generating a high pulse on a second transmit line, subsequently generating a high pulse on a first transmit line, and generating an encoded bit pulse by subtracting the pulse values on the first transmit line from the pulse values on the second transmit line.

FIG. 21shows a flowchart of an embodiment of a pulse reception and bit decoding method1800in accordance with the Close-Proximity Communications System Using Capacitively Coupled Signal Transfer. For illustration purposes, method1800will be discussed with reference to systems shown inFIGS. 2,3, and13discussed herein. Method1800may begin at step1810, which involves receiving, via a capacitive network100formed between a first device210having a first device electrode pair (electrodes230and240) and a second device250having a second device electrode pair (electrodes270and280), two differential and DC balanced pulses at the second device electrode pair (electrodes270and280).

Step1820may then involve calculating the difference between the received differential and DC balanced pulses using one or more amplifiers1052and1054. Method1800may then proceed to step1830, which involves converting the received differential and DC balanced pulses into a single ended signal with DC bias (shown inFIG. 13as RxP). Step1840may then involve converting the single ended signal with DC bias into two complimentary bit signals (Rxb0and Rxb1). Step1850may then involve using a decoder1070to convert the two complimentary bit signals into a plurality of received bits, shown inFIG. 13as signal Rx.

Many modifications and variations of the Close-Proximity Communications System Using Capacitively Coupled Signal Transfer are possible in light of the above description. Within the scope of the appended claims, the Close-Proximity Communications System Using Capacitively Coupled Signal Transfer may be practiced otherwise than as specifically described. Further, the scope of the claims is not limited to the implementations and embodiments disclosed herein, but extends to other implementations and embodiments as may be contemplated by those having ordinary skill in the art.