Method of manufacturing semiconductor device

A method of manufacturing a semiconductor device, wherein a first substrate where first electrode pads are formed and a second substrate where second electrode pads are formed are stacked and the first electrode pads and the corresponding second electrode pads are electrically connected thereby forming the semiconductor device is disclosed. The method includes steps of performing a first hydrophilic treatment with respect to the first electrode pads; supplying liquid to a surface where the first electrode pads are formed in the first substrate; and placing the second substrate on the first substrate to which the liquid is supplied so that the surface where the first electrode pads are formed opposes a surface where the second electrode pads are formed, thereby aligning the first electrode pads and the second electrode pads by the liquid that gathers in the first electrode pads that have been subject to the first hydrophilic treatment.

TECHNICAL FIELD

The present invention relates to a method of manufacturing a semiconductor device formed by stacking substrates.

BACKGROUND ART

Along with advancements in miniaturization, faster operation, and a higher degree of integration of semiconductor devices, electrode pads that are provided on a substrate, where the semiconductor devices are formed in order to electrically connect the semiconductor devices to an exterior circuit, can be further reduced in size.

Incidentally, there is a highly integrated semiconductor device formed by stacking plural substrates having miniaturized, high speed, and highly integrated semiconductor elements therein.

In such a semiconductor device composed of plural substrates where the semiconductor elements are formed, the stacking structure must be formed after the electrode pads of the substrates to be stacked are aligned with a high degree of accuracy in order to assure electrically connecting the electrode pads, even when the electrode pads are further reduced in size. There have been disclosed several manufacturing methods of manufacturing the semiconductor device, which includes a method of aligning the substrates and a method of forming the stacking structure.

For example, Patent Document 1 discloses a method of applying an adhesive between the substrates, optically detecting patterns formed in the substrates, tentatively aligning the substrates, verifying positions of the substrate by X-ray fluoroscopy, adjusting the positions of the substrate in accordance with information regarding the positions, and then applying and hardening the adhesive.

In addition, Patent Document 2 discloses a method employing a substrate holding surface of the substrate holder, the surface being divided into plural holding areas, which are capable of independently controlling a suction force that attracts the substrate and/or a pressing force that presses one of the substrates onto the other in each of the holding areas.Patent Document 1: Japanese Patent Application Laid-Open Publication No. 2009-49051.Patent Document 2: Japanese Patent Application Laid-Open Publication No. 2005-302858.

SUMMARY OF INVENTION

Problems to be Solved by the Invention

In the method of manufacturing the semiconductor device having a stacking structure mentioned above, there exist the following problems when the electrode pads of the semiconductor devices are aligned with a high degree of accuracy.

In order to assure electrically connecting the electrode pad of one of the substrates with the electrode pad of the other one of the substrates, the substrates need to be stacked and aligned with a high degree of accuracy. To this end, a method is employed where alignment marks formed in the substrates are observed by using a charge-coupled device (CCD) camera provided in an aligning apparatus thereby aligning the substrate.

However, the method disclosed in Patent Document 1 may require a mechanism that employs X-ray fluoroscopy thereby verifying the positions of the substrates, in addition to a detection mechanism such as the CCD camera that optically detects the patterns in the substrate.

In addition, the method disclosed in Patent Document 2 may require a mechanism that independently controls the pressing force, in addition to the detection mechanism such as the CCD camera that optically detects the patterns in the substrate.

The present invention has been made in view of the above, and provides a method of manufacturing a semiconductor device, the method being capable of aligning substrates with a high degree of accuracy without employing a complex mechanism when the substrates are stacked and thus electrode pads that are reduced in size and/or narrow-pitched are electrically connected, thereby assuring electrically connecting the electrode pads.

Means of Solving the Problems

According to a first aspect of the present invention, there is provided a method of manufacturing a semiconductor device, wherein a first substrate where first electrode pads are formed and a second substrate where second electrodes are formed are stacked and the first electrode pads and the corresponding second electrode pads are electrically connected thereby forming the semiconductor device. The method includes steps of performing a first hydrophilic treatment with respect to the first electrode pads; supplying liquid to a surface where the first electrode pads are formed in the first substrate; and placing the second substrate on the first substrate to which the liquid is supplied so that the surface where the first electrode pads are formed opposes a surface where the second electrode pads are formed, thereby aligning the first electrode pads and the second electrode pads by use of the liquid that gathers in the first electrode pads that have been subject to the first hydrophilic treatment.

According to a second aspect of the present invention, there is provided a method of manufacturing a semiconductor device, wherein a first substrate where first electrode pads are formed and a second substrate where second electrode pads are formed are stacked and the first electrode pads and the corresponding second electrode pads are electrically connected thereby forming the semiconductor device. The method includes steps of performing a first wettability treatment that enhances solder wettability in the first electrode pads; supplying melted solder to a surface where the first electrode pads are formed in the first substrate; and placing the second substrate on the first substrate to which the melted solder is supplied so that the surface where the first electrode pads are formed opposes a surface where the second electrode pads are formed, thereby aligning the first electrode pads and the second electrode pads by use of the melted solder that gathers in the first electrode pads that have been subject to the first hydrophilic treatment.

MODE(S) FOR CARRYING OUT THE INVENTION

According to an embodiment of the present invention, there is provided a method of manufacturing a semiconductor device where electrodes are electrically connected and substrates are stacked thereby forming the semiconductor device. The method is capable of aligning the substrates with a high degree of accuracy without employing a complex mechanism when the substrates are stacked and thus electrode pads that are reduced in size and/or narrow-pitched are electrically connected, thereby assuring electrically connecting the electrode pads.

First Embodiment

First, a method of manufacturing a semiconductor device according to a first embodiment of the present invention is explained, with reference toFIGS. 1A through 2B.

FIGS. 1A and 1Bare flowcharts for explaining procedures in corresponding processes of the method of manufacturing a semiconductor device according to this embodiment.FIGS. 2A through 2Care cross-sectional views that schematically illustrate the corresponding step of the stacking process of the method of manufacturing a semiconductor device according to this embodiment.

A method of manufacturing a semiconductor device according to this embodiment includes a first hydrophilic treatment process (S11), a liquid supplying process (S12), a second hydrophilic treatment process (S13), placement processes (S14through S17), solder supplying processes (S18and S19), and a solder hardening process (S20). The placement processes includes a substrate reversing step (S14), a placement step (S15), an alignment step (S16), and an etching step (S17). The solder supplying process includes a supplying step (S18) and a solder flow-in step (S19).

First, the first hydrophilic process is carried out (S11ofFIG. 1A). In this process, a first wafer11where first electrode pads12are formed is prepared as shown in FIG.2A(a), and a hydrophilic treatment is carried out with respect to the first electrode pads12. Surfaces of the first electrode pads12that have gone through the hydrophilic process are represented by reference symbols13. Incidentally, the first electrode pads12are electrically connected to an electric circuit (not shown) or the like formed in the first wafer11.

The hydrophilic treatment in the first hydrophilic process may be carried out by applying a photocatalyst on the surface of the first wafer11and then selectively irradiating ultra-violet light through a predetermined mask.

In addition, in this embodiment, a hydrophobic treatment is carried out with respect to areas except for the first electrode pads12in the first wafer11. The hydrophobic treatment may be carried out by selectively applying a water repellent agent such as an organic silicon compound. However, the hydrophobic treatment to the areas except for the first electrodes pads12may not be carried out in other embodiments.

Incidentally, first dummy pads14that are not electrically connected may be formed separately from the first electrode pads12in the first wafer11. The first dummy pads14are not electrically connected to the electric circuit or the like formed in the first wafer11, and provided in order to align the first wafer11and a second wafer21. The first dummy pads14may be formed, for example, in a circumferential area of the first wafer11. When the first dummy pads14are formed in the first wafer11, the hydrophilic treatment is carried out with respect to the first dummy pads14.

Next, the liquid supplying process is carried out to supply liquid to the first wafer11where the surfaces13of the first electrode pads12have been hydrophilically treated and the areas except for the first electrode pads12have been hydrophobically treated (S12ofFIG. 1A). Specifically, the liquid is supplied to the surfaces13of the first electrode pads12, as shown in FIG.2A(a). The liquid may be supplied by a supplying method such as applying, spraying, or ejecting the liquid. In the example shown in FIG.2A(b), the supplied liquid remains in the form of a droplet15on and around the surfaces13of the electrode pads12.

The supplied liquid (or the droplet15) may have electrical conductivity. In addition, the liquid having a hydrophilic property, for example, a liquid containing water may be used when the surfaces13of the first electrode pads12is hydrophilically treated and the areas except for the electrode pads12are hydrophobically treated.

In addition, the liquid is not necessarily supplied directly to the surfaces13that have gone through the hydrophilic treatment. Even when the liquid is supplied to an entire surface of the first wafer11thereby creating a liquid layer, the liquid moves from the hydrophobically treated areas to the hydrophilically treated surfaces13, and thus the droplets15are created. Alternatively, the droplets15may be selectively created by use of an ink-jet printing technology, which is explained later.

In addition, when the first dummy pads14are formed on the first wafer11, the liquid is supplied to the first dummy pads14, thereby creating the droplets15.

Next, the second hydrophilic process is carried out (S13ofFIG. 1A). In this process, the second wafer21where second electrode pads22are formed as shown in FIG.2A(c) is prepared, and the hydrophilic process is carried out with respect to the second electrode pads22. Surfaces of the second electrode pads22that have gone through the hydrophilic process are represented by reference symbols23. Incidentally, the second electrode pads22are electrically connected to an electric circuit (not shown) or the like formed in the second wafer21. In addition, the second electrode pads22are formed in advance in order to be connected to the corresponding first electrode pads12of the first wafer11.

The hydrophilic treatment in the second hydrophilic process may be carried out by, for example, applying a photocatalyst and then selectively irradiating ultra-violet light through a predetermined mask.

In addition, in this embodiment, a hydrophobic treatment is carried out with respect to areas except for the second electrode pads22in the second wafer21. The hydrophobic treatment may be carried out by selectively applying a water repellent agent such as an organic silicon compound. However, the hydrophobic treatment to the areas except for the second electrodes pads22may not be carried out in other embodiments.

Incidentally, second dummy pads24that are not electrically connected may be formed separately from the second electrode pads22also in the second wafer21. The second dummy pads24are not electrically connected to the electric circuit or the like formed in the second wafer21, and provided in order to align the first wafer11and the second wafer21. The second dummy pads24may be formed, for example, in a circumferential area of the second wafer21. When the second dummy pads24are formed in the second wafer21, the hydrophilic treatment is carried out with respect to the second dummy pads24.

In addition, the second wafer21is provided with third electrode pads25on a surface opposing a surface where the second electrode pads11are formed, as shown in FIG.2A(c). Moreover, through-holes26are formed from the surface where the second electrode pads22are formed through the surface where the third electrode pads25are formed. The through-holes26have openings to be electrically connected to the second electrode pads22on the surface where the second electrode pads22are formed in the second wafer21.

Next, the placement processes is carried out (S14through S17). In the placement processes in this embodiment, the substrate reversing step that vertically reverses the second wafer21(S14ofFIG. 1A), the placement step that places the second wafer21on the first wafer11where the droplets15are created (S15ofFIG. 1A), the alignment step that aligns the first electrode pads12and the second electrode pads22(S16ofFIG. 1B), and the etching step (S17ofFIG. 1B) are carried out in this order.

In the substrate reversing step, the second wafer21of which second electrode pads22have been hydrophilically treated is vertically reversed as shown in FIG.2A(d). A method of vertically reversing the second wafer21is explained later.

Next, in the placement step, the second wafer21is placed on the first wafer11so that the surface where the second electrode pads22are formed in the second wafer21opposes the surface where the first electrode pads21are formed and the droplets15that are created on or around the surfaces13of the first electrode pads12in the first wafer11, as shown in FIG.2B(e).

Incidentally, the placement step may be carried out under a reduced pressure environment. In this case, the subsequent steps until the supplying step are carried out under the reduced pressure environment.

In addition, the second wafer21may be placed on the first wafer11after alignment is carried out by an alignment apparatus having an alignment mechanism or the like. A method of aligning the second wafer21on the first wafer11using the alignment apparatus having the alignment mechanism is explained later. However, the alignment is not necessarily carried out with a high degree of accuracy, as described later. Moreover, when carrying out the placement, application of pressure onto the second wafer21is not necessary in either direction.

In addition, when the first dummy pads14mentioned above are formed in the first wafer11and the second dummy pads24mentioned above are formed in the second wafer21, the first dummy pads14come in contact with the corresponding second dummy pads24via the droplets15.

In the alignment step (S16ofFIG. 1B) as shown in FIG.2B(f), the second wafer21placed on the first wafer11is self-aligned with respect to the first wafer11. This is because the second wafer21can move relative to the first wafer11in connection with that the droplets15move to come in contact with the corresponding hydrophilic surfaces13of the first electrode pads12in the first wafer11and the corresponding hydrophilic surfaces23of the second electrode pad22in the second wafer21, and because the droplets15themselves remain between the corresponding surfaces13and the corresponding surfaces23, without spreading, due to surface tension of the droplets15. From a viewpoint of use of the surface tension, it is preferable that the hydrophilic liquid is used, and the first electrode pads12and the second electrode pads22are hydrophilically treated.

In addition, when the first dummy pads14mentioned above are formed in the first wafer11and the second dummy pads24mentioned above are formed in the second wafer21, the first dummy pads14are aligned with the corresponding second dummy pads24via the corresponding droplets15.

In the first wafer11and the second wafer21that are aligned with each other in the alignment step (S16), the surfaces of the first electrode pads12may be reduced and/or etched by the droplets15, as shown in FIG.2B(g) (S17). Namely, while oxide films or coated layers of contaminants may be formed on the surfaces of the first electrode pads12, such oxide films or the coated layers can be removed through reduction and/or etching. Alternatively, when oxide films or coated layers of contaminants may be formed on the surfaces of the second electrode pads22, such oxide films or the coated layers can be removed. Incidentally, FIG.2B(g) illustrates an example where the hydrophilic surfaces13of the first electrode pads12and the hydrophilic surfaces23of the second electrode pads22are etched.

As stated above, the droplets15preferably have an etching capability with respect to the oxide film and the like formed on the electrode pads12,22. By etching the oxide film and the like formed on the electrode pads12,22, electrical connection between the first electrode pads12and the second electrode pads22, which is realized by using solder (described later), can be ensured.

Next, the solder supplying processes that flows melted solder into the through-holes26formed in the second wafer21are carried out (S18and S19). Specifically, the solder supplying processes are composed of the solder supplying step (S18) and the solder flow-in step (S19).

First, an environment of the first wafer11and the second wafer21placed on the first wafer11is maintained at a reduced pressure in this embodiment. For example, the placement step (S15) and the alignment step (S16) are carried out in a chamber (not shown) that is coupled to an evacuation apparatus (not shown) that evacuates the chamber to a reduced pressure. After the alignment step the chamber is evacuated to a reduced pressure. In addition, a wafer receiving part of the chamber is preferably provided with a heating apparatus such as a heater, by which the first wafer11and the second wafer21are heated to a predetermined temperature in this embodiment.

Incidentally, the droplets15between the first electrode pads12and the second electrode pads22are evaporated under the reduced pressure environment, as shown in FIG.2C(i).

Next, in the solder supplying step, melted solder27is supplied onto the surface of the second wafer21, the surface opposing the first wafer11, as shown in FIG.2B(h). Specifically, the melted solder27is supplied to and around the openings of the through-holes26on the surface opposing the first wafer11.

Alternatively, a wettable treatment may be carried out in order to enhance wettability of the melted solder27with respect to the surfaces of the third electrode pads25formed on the surface opposing the surface where the second electrode pads22are formed in the second wafer21, so that the melted solder27can selectively gather on and around the through-holes26. Incidentally, whileFIGS. 2A and 2Billustrate an example where the second electrode pads22and the third electrode pads25are formed on one side of the corresponding through-holes26, the second electrode pads22and the third electrode pads25may also be formed on both sides of the corresponding through-holes26. Alternatively, the second electrode pads22and the third electrode pads25may be formed to surround the openings of the through-holes26.

Next, in the flow-in step (S19), the melted solder27is caused to flow into the through-holes26. Specifically, the environment of the first wafer11and the second wafer21is pressurized to an atmospheric pressure. Here, the through-holes26are blocked by the melted solder27, and the melted solder27is sucked into the through-holes26, as shown in FIG.2C(j), because the insides of the through-holes26are kept at a reduced pressure.

Incidentally, the solder supplying step (S18) may be carried out in a normal pressure environment. In this case, the droplets15may be evaporated by heating the first wafer11and the second wafer21, and the melted solder27may be pushed into the through-holes26by applying pressure.

Next, the solder hardening process (S20) is carried out where the solder27is hardened thereby bonding the first electrode pads12and the second electrode pads22. Specifically, the first wafer11and the second wafer21are intentionally or naturally cooled, so that the solder27is hardened and remains between the first electrode pads12and the second electrode pads22, thereby electrically connecting the first electrode pads12and the second electrode pads22.

Next, a liquid applying apparatus that applies liquid that becomes the droplet15in the liquid supplying process (S12), utilizing an ink-jet printing technology, is explained with reference toFIGS. 3 and 4.FIG. 3is a cross-sectional view illustrating the liquid applying apparatus utilizing the ink-jet printing technology, andFIG. 4is a plan view of the liquid applying apparatus ofFIG. 3. As shown in these drawings, the liquid applying apparatus includes a body30, a liquid supplying nozzle40, and a controlling part42.

The body30includes a chassis31that is provided at its bottom surface with a base part33that is movable from one side to the other side in the chassis31via a rail32extending along a Y direction. The base part33is provided on its upper surface with a substrate holding part35configured to be movable via a rail34extending along an X direction. The substrate holding part35is configured so that the wafer21is horizontally held from its reverse side by suction with an upper end part of the substrate holding part35. With these configurations, the wafer11held by the substrate holding part35can change the positions in the X direction and the Y direction in the chassis31via the substrate holding part35and the base part33by the operation of a driving mechanism36.

A mask supporting member37that is configured integrally with the substrate holding part35and is elevated above an upper surface of the wafer11is provided around the substrate holding part35. A detachable mask38that has a relatively large opening in the center in order to prevent the liquid from attaching to an area except for an area on which the liquid attaches is supported by an upper end of the mask supporting member37. On one side of the mask supporting member37and the chassis31, an opening (not shown) through which the wafer11is transferred in or out from the chassis31is formed.

The liquid supplying nozzle40is held by a linear slide mechanism41that is installed in an upper part of the chassis31along the X direction. In addition, a distal end of the liquid supplying nozzle40protrudes into the inside of the chassis31through a slit31a(FIG. 4) formed in a ceiling part of the chassis31. The liquid supplying nozzle40can be moved along the X direction by operating the linear slide mechanism41under control of the controlling part42. A liquid supplying part43that is connected to a liquid supplying source (not shown) is connected to the liquid supplying nozzle40, so that the liquid is supplied from the liquid supplying part43to the liquid supplying nozzle40, for example, in accordance with a control signal from the controlling part42to the liquid supplying part43.

The liquid supplying nozzle40is provided with a nozzle part44composed of an ink-jet nozzle having plural discharging holes. The discharging holes of the nozzle part44may be arranged in the form of a rectangle or a line so that the liquid is discharged, for example, at 180 dots per inch (dpi) with respect to one of the plural electrode pads formed on the surface of the wafer11. The ink-jet nozzle may be of a share type where piezo elements are arranged on both sides of a liquid passage thereby to oppose each other and press out the liquid by deforming the piezo elements.

In the liquid supplying process (S12), after the first wafer11is sucked by the substrate holding part35in the liquid applying apparatus, the liquid supplying nozzle40is reciprocated in the X direction by the linear slide mechanism41, while the liquid is discharged from the liquid supplying nozzle40. In this case, when the liquid supplying nozzle40turns back at one end of the first wafer11, the base part33is shifted toward the Y direction by a slight distance of, for example, 0.5 mm. In such a manner, the liquid supplying nozzle40scans over the first wafer11while discharging the liquid from the liquid supplying nozzle40, and thus the liquid is supplied to an entire surface of the first wafer11.

Next, a method of vertically reversing the second wafer21and placing the vertically reversed second wafer21onto the first wafer11in the substrate reversing step (S14ofFIG. 1A) is explained with reference toFIG. 5andFIG. 6. FIG.5is a plan view illustrating an example of a wafer reversing apparatus, andFIG. 6is a side view of the wafer reversing apparatus ofFIG. 5.

A wafer reversing apparatus50includes a wafer relay part51that transfers the wafer21to or from a primary wafer transfer mechanism (not shown), an elevation mechanism52that moves the wafer relay part51upward or downward, and a wafer reversing mechanism53that grips the wafer21held by the wafer relay part51thereby to receive the wafer21, rotates the wafer21thereby to reverse the wafer21, and transfers the wafer21back to the wafer relay part51.

As shown inFIG. 5andFIG. 6, the wafer relay part51has a supporting pedestal54having a substantial H-shape and two supporting arms55a,55bthat horizontally hold the supporting pedestal54. Four leg parts54b(FIG. 6) are arranged at corresponding four end parts of the supporting pedestal54, and a supporting member54ahaving a substantially cross-sectional shape of “L” is arranged on the four leg parts54b. The holding member54asupports a circumferential part of the wafer21by a horizontal part of the L-shape, and guides the wafer21supported by the horizontal part by a vertical part of the L-shape.

Referring toFIG. 6, base parts of the supporting arms55a,55bare fixed on a block58attached to the elevation mechanism52. The block58is coupled with an air cylinder59that elongates and contracts along a Z direction, so that the block58is moved upward or downward along a guide60extending along the Z direction by the elevating movement of the air cylinder59(FIG. 5). Incidentally, the elevation mechanism52is not limited to a structure employing the air cylinder59, but may be a mechanism that realizes the elevating movement by conveying rotational force caused by a rotating mechanism such as a motor to the block58by use of a pulley, a belt, or the like.

The wafer reversing mechanism53includes a pair of wafer gripping arms61a,61bthat are openable and closable in the X direction. The wafer gripping arms61a,61bare provided at distal ends thereof with corresponding gripping members61chaving corresponding V grooves of which bottoms are along a side surface of the wafer21. When the wafer gripping arms61a,61bare closed, the circumferential part of the wafer21is gripped by the V grooves. In addition, the wafer gripping arms61a,61bare coupled at base ends thereof with a rotational mechanism62and rotated around a horizontal axis by the rotational mechanism62.FIG. 6illustrates the wafer gripping arms61a,61brotated around the horizontal axis 90° by the rotational mechanism62, and the second wafer21that is gripped by the wafer gripping arms61a,61band vertically maintained, with a dotted line.

In the wafer reversing apparatus50configured above, the substrate reversing step (S14ofFIG. 1A) is carried out in the following manner. First, the second wafer21that has gone through the second hydrophilic process (S13ofFIG. 1A) is transferred from the wafer transfer mechanism (not shown) to the wafer reversing apparatus50, while the surface where the second electrode pads22are formed in the second wafer21is facing upward, and then received by the supporting member54aon the supporting pedestal54. Next, the supporting pedestal54that holds the second wafer21is elevated by the elevation mechanism52to the same level as the wafer gripping arms61a,61bthat are opened. Then, the wafer gripping arms61a,61bare closed thereby gripping the second wafer21.

Next, the supporting pedestal54and the supporting member54aare receded downward in order not to interfere with the wafer gripping arms61a,61bthat reverses the second wafer21. Then, the second wafer21is rotated 180° by the rotational mechanism62, which vertically reverses the second wafer21. After this, the supporting pedestal54is brought upward to the level of the wafer gripping arms61a,61b, and the second wafer21is received by the supporting pedestal54by opening the wafer gripping arms61a,61b. Subsequently, the supporting pedestal54that supports the second wafer21is brought downward, and thus the second wafer21is transferred from the supporting pedestal54to the wafer transfer mechanism.

Then, the second wafer21that has been vertically reversed goes through the placement step (S15ofFIG. 1A).

Next, procedures of roughly aligning the first wafer11and the second wafer21by use of an alignment apparatus, and placing the second wafer21onto the first wafer11in the placement step (S15) are explained with reference toFIG. 7.FIG. 7is a side view illustrating the alignment apparatus.

An alignment apparatus70includes a wafer transfer arm71that transfers the second wafer21that has been vertically reversed, a chamber72that the wafer transfer arm71can move into or out from, a position adjusting mechanism73that is provided in the chamber72and aligns the first wafer11, alignment mechanism79a,79bthat include a charge-coupled device (CCD) for taking an image of the dummy pads14,24, or the like formed in the first wafer11and the second wafer21, respectively, a placement pedestal78on which the first wafer11and the second wafer21that are aligned with each other are placed.

The chamber72has a substantially cylindrical shape having an open bottom and a closed top, and is elevatable by an elevation mechanism (not shown). A transfer opening72athrough which the second wafer21is transferred in or out by the wafer transfer arm71is formed on a circumferential wall of the chamber72. The transfer opening72ais openable or closable by a gate valve72b. The gate valve72bcloses the transfer opening72ain an air-tight manner after the wafer transfer arm71transfers the second wafer21into the chamber72, as shown inFIG. 7. A gas supplying opening72cto which a gas supplying line (not shown) is connected and a gas evacuation opening72dto which a gas evacuating line (not shown) is connected are formed on an upper wall of the chamber72. With such configurations, a flow of a predetermined inert gas or a clean air from the gas supplying opening72cto the gas evacuation opening72dthrough the chamber72can be created. In addition, a flange72eis provided at a bottom end of the chamber72. The flange72ehas an opening having an inner diameter that is greater than outer diameters of the first wafer11and the second wafer21.

In addition, the flange72eof the chamber72is provided with a position adjustment mechanism73for aligning the first wafer11. An0-ring75is arranged on an upper surface of the position adjustment mechanism73. Namely, the position adjustment mechanism73supports an upper surface of the second wafer21that has been transferred in by the wafer transfer arm71via the O-ring75. In addition, when the wafer transfer arm71holding the second wafer21proceeds into the chamber72, and then the second wafer21is placed onto the O-ring75, a closed space76is created by the O-ring75above the second wafer21.

The position adjustment mechanism73is provided with guide rails (not shown) respectively along the X direction, the Y direction, and a θ direction, and piezo elements (not shown) provided corresponding to the guide rails. With such configurations, the position adjustment mechanism73can move in the X direction, the Y direction, and the θ direction although in a slight distance, so that a position of the first wafer11can be adjusted. Specifically, the position adjustment mechanism73moves the first wafer11in accordance with a positional difference between the first wafer11and the second wafer21obtained by the alignment mechanism79a,79b, so that the first electrode pads12of the first wafer11are aligned with the corresponding second electrode pads22of the second wafer21.

By using the alignment apparatus70configured as explained above, alignment of the first wafer11and the second wafer21is carried out, and the second wafer21is placed on the first wafer11in accordance with the following procedures.

First, the first wafer11that has gone through the liquid supplying process (S12) is held by the position adjustment mechanism73in the chamber72. Next, the second wafer21that has been vertically reversed in the substrate reversing step (S14) is held (or vacuum chucked) by the wafer transfer arm71, and transferred into the chamber72. The wafer transfer arm71is stopped at a position where the center of the second wafer21is substantially in agreement with the center of the first wafer11. Then, the wafer transfer arm71is brought downward and stopped at a position where the second wafer21comes in contact with the O-ring75. The vacuum chuck of the wafer transfer arm71is released, so that the second wafer21is placed on the O-ring75. Subsequently, the gate valve72bis closed.

Next, the first dummy pads14, for alignment, arranged in the circumferential part of the first wafer11and the second dummy pads24, for alignment, arranged in the circumferential part of the second wafer21have an image of them taken, thereby obtaining corresponding X-coordinates and Y coordinates, according to which the positional difference between the first wafer11and the second wafer21is obtained. Based on the positional difference, the position of the first wafer11is fine adjusted by the position adjustment mechanism73, and thus the first wafer11and the second wafer21are aligned in the X direction, the Y direction, and/or the θ direction.

Next, the chamber72is brought down toward the placement pedestal78, and the first wafer11comes in contact with a stage78aof the placement pedestal78. After the position adjustment mechanism73releases the first wafer11, when the chamber72is further brought downward, the second wafer21is placed on the first wafer11.

Here, the flange72eof the chamber72comes in contact with the placement pedestal78via the O-ring75or the like, so that the inside of the chamber72is maintained in an air-tight manner. For example, when the alignment apparatus70is provided with an evacuation apparatus (not shown), the subsequent solder supplying steps (S18and S19) are carried out inside the chamber72.

Incidentally, the aforementioned alignment apparatus is merely an example, but other alignment apparatuses of various types may be used.

According to this embodiment, when the second wafer21is placed on the first wafer11, because the droplets15on the hydrophilically treated surfaces13of the first electrode pads12in the first wafer11gather between the surfaces13and the corresponding hydrophilically treated surfaces23, the second wafer21can be self-aligned with the first wafer11. Therefore, even when the alignment apparatus70is necessary for rough alignment, the need for an alignment mechanism that enables alignment with a high degree of accuracy is eliminated. In addition, even when the electrode pads are further reduced in size and/or narrow-pitched, highly accurate alignment can be realized, thereby assuring electrically connecting the two wafers.

Incidentally, the melted solder is flowed in the through-holes26formed in the second wafer21thereby electrically connecting the first electrode pads12and the corresponding second electrode pads22after the placement process, in this embodiment. However, a material that is flowed into the through-holes26is not limited to the solder, but any material having flowability and electrical conductivity. As explained in a second embodiment, an ink, a paste-like liquid, or the like (a metal microparticle mixed liquid) may be used that is obtained by dispersing metal microparticles having electrical conductivity such as gold, silver, and platinum into a solvent.

Second Embodiment

Next, a method of manufacturing a semiconductor device according to a second embodiment is explained with reference toFIGS. 8A through 9B.

FIGS. 8A and 8Bare flowcharts for explaining procedures in each of a stacking process in the method of manufacturing a semiconductor device according to this embodiment.FIGS. 9A and 9Bare cross-sectional views schematically illustrating substrate structures in each of the stacking processes in the method of manufacturing a semiconductor device according to this embodiment. Incidentally, the same reference symbols are given to the same members or parts that have been explained, and the explanation thereof may be omitted.

In the method of manufacturing a semiconductor device according to this embodiment, metal microparticle mixed liquid (silver ink) where silver microparticles are dispersed in a predetermined solvent is used as the liquid, but the solder is not used.

The method of manufacturing a semiconductor device according to this embodiment includes a first hydrophilic treatment process (S21ofFIG. 8A), a liquid supplying process (S22), a second hydrophilic treatment process (S23), placement processes S24through S27, a liquid evaporating process (S28). The placement processes includes a substrate reversing step (S24), a placement step (S25), an alignment step (S26ofFIG. 8B), and an etching step (S27). Among these, the processes from the first hydrophilic process through the placement process (S21through S27) are the same as those from the first hydrophilic process through the placement process (S11through S17) in the first embodiment, except for use of the silver ink as the liquid that becomes the droplets15.

In addition, FIGS.9A(a) through9B(h) schematically illustrate the first wafer11and the second wafer21athat go through the corresponding process S21through S27. In this embodiment, through-holes are not necessarily formed in the second wafer21, as shown in FIG.9A(c), because the solder is not used.

In addition, the solder supplying step (S18) and the solder hardening step (S19) that are carried out after the placement process in the first embodiment are not carried out in this embodiment, but the liquid evaporating step (S28) is carried out. Specifically, the silver ink is hardened by evaporating the solvent in the silver ink in the liquid evaporating step, thereby electrically connecting the first electrode pads12and the second electrode pads22.

In addition, other inks or paste-like liquids obtained by dispersing metals having electrical conductivity such as gold, platinum may be used as the metal microparticle mixed liquid, instead of the silver ink.

According to this embodiment, when the second wafer21ais placed on the first wafer11, the second wafer21is self-aligned with respect to the first wafer11. This is because the second wafer21acan move to be self-aligned with respect to the first wafer11in connection with that the droplets15of the silver ink move to come in contact with the corresponding hydrophilic surfaces13of the first electrode pads12in the first wafer11and the corresponding hydrophilic surfaces23of the second electrode pad22in the second wafer21a, and because the droplets15of the silver ink themselves remain between the corresponding surfaces13and the corresponding surfaces23, without spreading, due to surface tension of the droplets15.

In addition, by drying the silver ink having electrical conductivity, the first electrode pads12are electrically connected to the corresponding second electrode pads22, thereby reducing the number of processes.

Third Embodiment

Next, a method of manufacturing a semiconductor device according to a third embodiment is explained with reference toFIGS. 10A through 11B.

FIGS. 10A and 10Bare flowcharts for explaining procedures in corresponding processes of the method of manufacturing a semiconductor device according to this embodiment.FIGS. 11A through 11Bschematically illustrate the corresponding step of the stacking process of the method of manufacturing a semiconductor device according to this embodiment.

In the method of manufacturing a semiconductor device according to this embodiment, melted solder is used instead of the liquid, and the alignment is carried out by the melted solder.

As shown inFIGS. 10A and 10B, a method of manufacturing a semiconductor device according to this embodiment includes a first wettability treatment process (S31ofFIG. 10A), a solder supplying process (S32), a second wettability treatment process (S33), placement processes (S34ofFIG. 10Athrough S36ofFIG. 10B), and a solder hardening process (S37ofFIG. 10B). The placement processes includes a substrate reversing step (S34), a placement step (S35), and an alignment step (S36).

First, the first wettability treatment (S31) is carried out. In the first wettability treatment, a first wafer11bwhere first electrode pads12are formed is prepared, and the wettability treatment is carried out with respect to the first electrode pads12. FIG.11A(a) schematically illustrates the first wafer11bthat has gone through the first wettability treatment. Surfaces of the first electrode pads12that have gone through the first wettability treatment are represented by reference symbols13. The wettability treatment may be carried out by applying flux.

In addition, along with the wettability treatment carried out with respect to the first electrode pads12, areas except for the first electrode pads12may be covered by, for example, a solder resist or the like. In the examples shown inFIG. 11AandFIG. 11B, the areas except for the first electrode pads12is covered by a solder resist18.

Incidentally, the first dummy pads14may be formed in the first wafer11b, in addition to the first electrode pads12, in the similar manner as the first embodiment.

Next, the solder supplying process (S32) is carried out. In the solder supplying process, melted solder27is supplied to the first wafer11bwhere the surfaces13of the first electrode pads12has been subject to the wettability treatment and the areas except for the surfaces13have been covered by the solder resist18. As shown in FIG.11A(b), the melted solder27is supplied to and around the surfaces13of the first electrode pads12, the surfaces13having been subject to the wettability treatment. The melted solder27may be supplied by, for example but not limited to, applying, spraying, or ejecting the melted solder. Incidentally, solder balls may be placed on and around the corresponding surfaces13of the first electrode pads12, the surfaces13having been subject to the wettability treatment, while the first wafer11bis maintained at a temperature at which the solder is not melted, and then the first wafer11bmay be heated thereby melting the solder balls. As shown in FIG.11A(b), because the wettability treatment is carried out with respect to the surfaces13of the first electrode pads12and the areas except for the surfaces13are covered by the solder resist18, the supplied melted solder27remains at and around the surfaces13of the first electrode pads12.

In addition, when the first dummy pads14are formed on the first wafer11b, the melted solder27is also supplied to the first dummy pads14.

Next, the second wettability treatment (S33) is carried out. In the second wettability treatment, a second wafer21bis prepared and the wettability treatment is carried out the second electrode pads22formed in the second wafer21b. FIG.11A(c) schematically illustrates the second wafer21bthat has gone through the second wettability treatment (S33). Surfaces of the second electrode pads22that have gone through the second wettability treatment are represented by reference symbols23. The wettability treatment may be carried out by, for example but not limited to, applying flux in the similar manner as in the first wettability treatment.

In addition, along with the wettability treatment carried out with respect to the second electrode pads22, areas except for the second electrode pads22may be covered by, for example, a solder resist28or the like, in the same manner as in the first wettability treatment. Moreover, the second dummy pads24may also be formed in the areas except for the second electrode pads22in the second wafer21b.

Next, the placement processes (S34through S36) are carried out. In the placement processes, the second wafer21bis vertically reversed; the reversed second wafer21bis placed on the first wafer11bto which the melted solder27is supplied; and the first electrode pads12and the second electrode pads22are aligned. The placement processes include a substrate reversing step (S34), a placement step (S35), and an alignment step (S36). In addition, FIG.11A(d) through FIG.11B(f) schematically illustrate the wafers11band/or21bafter the corresponding steps are carried out.

First, the substrate reversing step (S34) is carried out. The substrate reversing step may be carried out in the similar manner as the substrate reversing step (S14) in the first embodiment, as shown in FIG.11A(d).

Next, the placement step (S35) is carried out. In the placement step, the second wafer21bis placed on the first wafer11bso that the surface where the first electrode pads12are formed in the first wafer11bopposes the surface where the second electrode pads22are formed in the second wafer21b, while the melted solder27exists in and around the surfaces13of the first electrode pads12that has gone through the wettability treatment, as shown in FIG.11B(e).

Here, the second wafer21bmay be placed on the first wafer11bafter the second wafer21bis roughly aligned to the first wafer11bby using the alignment apparatus70having an alignment mechanism, in the same manner as in the first embodiment.

The second wafer21bplaced on the first wafer11bin the placement step (S35) is self-aligned with respect to the first wafer11b, as shown in FIG.11B(f). This is because the second wafer21bcan move relative to the first wafer11bin connection with the melted solder27to come in contact with the corresponding solder-wettable surfaces13of the first electrode pads12in the first wafer11band the corresponding solder-wettable surfaces23of the second electrode pad22in the second wafer21b, and because the melted solder27itself remains between the corresponding surfaces13and the corresponding surfaces23due to surface tension of the melted solder27.

In addition, when the first wafer11bhas the first dummy pads14and the second wafer21bhas the second dummy pads24, the first dummy pads14are aligned with the corresponding second dummy pads24by the corresponding melted solder27.

Next, the solder hardening process (S37) is carried out. In the solder hardening process, the melted solder27is hardened thereby solder-connecting the first electrode pads12and the corresponding second electrode pads22. FIG.11B(g) schematically illustrates the first wafer11band the second wafer21bafter the solder hardening process.

As shown in FIG.11B(g), the second wafer21band the first wafer11bon which the second wafer21bis placed are intentionally or naturally cooled, and thus the melted solder27is hardened, thereby electrically connecting the first electrode pads12and the corresponding second electrode pads22.

In this embodiment, alignment is carried out by using the melted solder27without using the liquid, and then the solder is hardened, so that the first electrode pads12and the second electrode pads22can be aligned and electrically connected.

While the present invention has been described in reference to the preferable embodiments, the present invention is not limited to the particular embodiments, but may be modified or altered within the scope of the accompanying claims.

This international application claims priority based on Japanese Patent Application No. 2009-207971 filed Sep. 9, 2009, the entire content of which is incorporated herein by reference in this international application.