Optimized mounting area circuit module system and method

A flexible circuitry is populated with integrated circuitry (ICs) disposed along one or both of its major sides. Contacts are distributed along the flexible circuitry to provide connection between the module and an application environment. A rigid substrate is configured to provide space on one side where the populated flex is disposed while in some embodiments, heat management or cooling structures are arranged on one side of the module to mitigate thermal accumulation in the module.

FIELD

The present invention relates to systems and methods for creating high density circuit modules and, in particular, to systems and methods for creating such modules that provide optimized areas for IC devices.

BACKGROUND

Memory expansion is one of the many fields where high density circuit module solutions provide space-saving advantages. For example, the well-known DIMM (Dual In-line Memory Module) has been used for years, in various forms, to provide memory expansion. A typical DIMM includes a conventional PCB (printed circuit board) with memory devices and supporting digital logic devices mounted on both sides. The DINM is typically mounted in the host computer system by inserting a contact-bearing edge of the DIMM into a card edge connector. Typically, systems that employ DIMMs provide limited profile space for such devices and conventional DIMM-based solutions have typically provided only a moderate amount of memory expansion.

As bus speeds have increased, fewer devices per channel can be reliably addressed with a DIMM-based solution. For example, 288 ICs or devices per channel may be addressed using the SDRAM-100 bus protocol with an unbuffered DIMM. Using the DDR-200 bus protocol, approximately 144 devices may be addressed per channel. With the DDR2-400 bus protocol, only 72 devices per channel may be addressed. This constraint has led to the development of the fully-buffered DIMM (FB-DIMM) with buffered C/A and data in which 288 devices per channel may be addressed. That buffering function is provided by what is typically identified as the Advanced Memory Buffer or AMB. With the FB-DIMM, not only has capacity increased, pin count has declined to approximately 69 signal pins from the approximately 240 pins previously required.

The FB-DIMM circuit solution is expected to offer practical motherboard memory capacities of up to about 192 gigabytes with six channels and eight DIMMs per channel and two ranks per DIMM using one gigabyte DRAMs. This solution should also be adaptable to next generation technologies and should exhibit significant downward compatibility. The FB-DIMM solution does, however, generate significant thermal energy, particularly about the AMB.

There are several known methods to improve the limited capacity of a DIMM or other circuit board. In one strategy, for example, small circuit boards (daughter cards) are connected to the DIMM to provide extra mounting space.

In another strategy, multiple die packages (MDP) can also be used to increase DINM capacity. This scheme increases the capacity of the memory devices on the DIMM by including multiple semiconductor die in a single device package. The additional heat generated by the multiple die typically requires, however, additional cooling capabilities to operate at maximum operating speed. Further, the MDP scheme may exhibit increased costs because of increased yield loss from packaging together multiple die that are not fully pre-tested.

Stacked packages are yet another way to increase module capacity. Capacity is increased by stacking packaged integrated circuits to create a high-density circuit module for mounting on the larger circuit board. In some techniques, flexible conductors are used to selectively interconnect packaged integrated circuits. Staktek Group L.P., the assignee of the present application, has developed numerous systems for aggregating CSP (chipscale packaged) devices in space saving topologies. The increased component height of some stacking techniques may, however, alter system requirements such as, for example, required cooling airflow or the minimum spacing around a circuit board on its host system.

Typically, the known methods for improved memory module performance or enlarged capacity raise thermal management issues. For example, when a conventional packaged DRAM is mounted on a DIMM, the primary thermal path is through the balls of the package into the core of a multilayer DIMM that has less than desirable thermal characteristics. In particular, when an advanced memory buffer (AMB) is employed in an FB-DIMM, a significant amount of heat is generated. Consequently, the already marginal thermal shedding attributes of DIMM circuit modules is exacerbated in a typical FB-DIMM by the localized generation of heat by the AMB.

What is needed, therefore, are methods and structures for providing high capacity circuit boards in thermally-efficient, reliable designs.

SUMMARY

A flexible circuitry is populated with integrated circuitry (ICs) disposed along one or both of its major sides. Contacts are distributed along the flexible circuitry to provide connection between the module and an application environment. A rigid substrate is configured to provide space on one side where the populated portion of the flex is disposed at least in part while in some embodiments, heat management or cooling structures are arranged on one side of the module to mitigate thermal accumulation in the module.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

FIG. 1depicts a module10devised in accordance with a preferred embodiment of the present invention. The depiction ofFIG. 1illustrates module10having a substrate14about a part of which is disposed flex circuit12populated with ICs18which are, in one preferred embodiment, memory devices in CSP packages. The profiles shown for ICs18are, however, structured to indicate just some configurations of the many of ICs that may be employed as ICs18in some embodiments of the present invention. While some modules10may be employed as memory modules to supplant more traditionally constructed DIMM modules, other configurations of module10may have a primary function other than memory such as, for example, communications or graphics. Further a variety of memory modules may be configured in conformity with the principles of the invention and some such memory configurations will exhibit fully-buffered DIMM (“FB-DIMM”) circuitry.

Optional extension16T is shown diverging from the axis (AXB) of the substrate body (shown inFIG. 4) of substrate14. Extension16T, which may come in a variety of configurations, increases the cooling area for module10while providing a surface for insertion force application. Side11A of module10is the primary perspective ofFIG. 1, but a small part of thermal management structure21is visible. In addition to extension16T, cooling structure21increases the cooling surface for module10.FIG. 2is an enlarged depiction of a part of module10. In the view ofFIG. 2, substrate space15S may be discerned which is formed by the offset between portions of substrate14as will be further described.

FIG. 3depicts side11B of a module10devised in accordance with a preferred embodiment of the present invention. In the depicted embodiment ofFIG. 3, thermal management or cooling structure21is configured as integral with substrate14. In other depicted embodiments, a thermal management or cooling structure21is configured separately from substrate14but appended to become a part of substrate14while in other embodiments, there is no cooling structure21.

In the depicted embodiment, thermal management or cooling structure21comprises plural fins21F which may be configured in any number and orientation and need not extend laterally nor extend across the entirely of the module. As a later cross-section shows, some embodiments of the present invention exhibit no fins and thus those of skill should understand that although fin structures21F provide added surface area to module10, their presence is not required. Further, neither cooling structure21nor extension16T are required.

FIG. 4is cross-section along line A-A ofFIG. 3. As shown, a portion of flex circuit12is disposed about end16A of substrate14. As shown inFIG. 4, in the depicted embodiment, substrate space15S is created on side11A of module10by the offset of substrate body14B from substrate end portion14E realized through deflection14D. Deflection14D may also be described as a bend, offset, or diversion, just as examples of the nomenclature that could be employed to indicate the axial offsetting of axis AXBof substrate body14B from axis AXEof end portion14E of substrate14to realize substrate space15S into which in the depicted embodiment, at least a portion of ICs18are depicted as being disposed. Later depictions of modules10that employ larger profile ICs19such as an AMB populated along the inner side of flex circuit12will show that at least a part of IC19is disposed in substrate space15S.

Those of skill will recognize that substrate14may be comprised of more than one piece, but still exhibit the principles disclosed herein as they relate to the offsetting of one part of the employed substrate from another to create substrate space15S to allow the populated part of flex circuit12to reside on side11A of module10. By disposing the populated area of flex circuit12on one side of module10, this leaves a substantial are of the other side of module10available for thermal management structure(s)21which in the depicted embodiment comprises a plurality of fins. Other structures besides fins may be employed for cooling structure21as those of skill will recognize and where fin-like structures are employed, they need not be oriented perpendicularly to illustrated substrate body axis AXB.

FIG. 5depicts a substrate14as may be employed in an alternative embodiment in accordance with the present invention. Illustrated substrate14is shown with inset or cutaway area14disposed in substrate240at a position that corresponds with section line B-B inFIG. 3. Insert area240provides a profile-lowering inset that reduces the increase in module profile that would otherwise arise from disposition of a higher profile device on flex circuit12. An example is shown inFIG. 6.

FIG. 6depicts an exemplar module10in accordance with an embodiment of the present invention. In the depicted module10, IC19is shown disposed in part in cutaway area240, an example of which is shown inFIG. 5that has been configured to accommodate at least a part of IC19. The profile depicted for IC19is representative of an advanced memory buffer (“AMB”) such as employed in a FB-DIMM, but module10may be devised with a variety of ICs including microprocessors and logic as well as buffers and control devices and/or memory devices. Consequently, the similarity of the depicted profile shown for IC19with the profile of an AMB should be understood to be merely representative and those of skill should understand that IC19may, in other embodiments, be any of the other non-memory devices known to useful in the context of a device such as module10. Thus, some embodiments of module10will include ICs of a first type such as memory, while other embodiments may include ICs of a first type such as memory and ICs of a second type such as logic, microprocessor, buffer, or control integrated circuitry or, in some cases, a module may include memory, microprocessor/logic, and buffer/control circuitry, for example. This is not an exhaustive list as those of skill will recognize, but merely a shorthand way to identify just some of the many types of ICs that may, in some cases, be employed in modules10.

FIG. 7depicts another preferred embodiment in accordance with the present invention. As shown, module10includes cooling structure21appended to become a part of substrate14.

FIG. 8is a cross-sectional view of the module10depicted inFIG. 7taken along section line C-C. As illustrated inFIG. 8, a portion of IC19representative of the die of that device is identified by the reference19D. Die19D is inserted, at least in part, into cooling structure21which is disposed over opening250in substrate14. Die19D is shown disposed abutting fin assembly21FA which is comprised of plural fins21F. As with some of the earlier depicted embodiments, the substrate of module10ofFIG. 8exhibits an offset between the axis AXBof substrate body14B and axis AXEof end portion14E of substrate14that allows substrate space15S.

The module embodiment depicted inFIG. 9does not exhibit a plurality of fins21F, but includes a thermal sink14TS with a central area14TC. Those of skill will recognize that an alternative embodiment module may be devised in accordance with the principles disclosed herein that exhibits both a thermal sink and a cooling structure.

Thermal sink14TS is comprised, in this preferred embodiment, of high thermal conductivity such as, for example, copper or copper alloy and, in this preferred embodiment, is substantially larger than and preferably in thermal contact with die19D either directly or through thermally-conductive adhesive such as the depicted adhesive30or a thermally-conductive gasket material, for example. Thermal contact with a part of IC19should be considered thermal contact with IC19.

In this preferred embodiment, central portion14TC of thermal sink14TS is raised above the periphery of thermal sink14TS and additionally provides on its other side, an indentation into which may be introduced at least a portion of IC19such as, for example, die19D, to assist in realization of a low profile for module10. An indentation is not required, however. In the preferred depicted embodiment, thermal sink14TS is disposed over a window250through substrate14. IC19, which is mounted on side9(the “inside” in this embodiment) of flex circuit12, is disposed, at least in part, into window250to realize thermal contact with thermal sink14TS to provide a conduit to reduce thermal energy loading of IC19.

Thermal sink14TS need not cover the entirety of window250. In other embodiments, for example, thermal sink14TS may merely be across the window250or thermal sink14TS may be set into window250instead of over or across the opening of window250. Thermal sink14TS is typically a separate piece of metal from substrate14but, after appreciating this specification, those of skill will recognize that, in alternative instances, thermal sink14TS may be integral with substrate14or a particular portion of substrate14may be constructed to be a thermal sink14TS in accordance with the teachings herein. For example, substrate14may be comprised of aluminum, while a thermal sink area14TS of substrate14may be comprised of copper yet substrate14and thermal sink14TS are of a single piece. In a variation of such an integral thermal sink-substrate embodiment, the thermal sink could be attached to the substrate without a window and thus be preferentially accessible only on one side of substrate14. Construction expense will be more likely to militate against such construction, but the principles of the invention encompass such constructions. Consequently, a window in substrate14is not required. Therefore, a thermal sink14TS should be considered to be an area or element integral with or attached to a substrate14and the material from which that thermal sink is composed exhibits greater thermal conductivity than the material of the substrate. To continue the example, substrate14may be aluminum, while thermal sink14TS is comprised of copper. U.S. patent application Ser. No. 11/231,418, filed Sep. 21, 2005 and pending is owned by Staktek Group L.P. and which has been incorporated by reference herein, provides other examples of modules10with thermal sinks14TS and shows a module with an integral thermal sink14TS in certain figures from that application.

Where a window250in substrate14is employed, at least a part of thermal sink14TS should be accessible through window250from the “other” side of substrate14. AMB circuit19or other high heat IC19and, in particular, die19D, may be disposed in or across or over window250and preferably, will be introduced into an indentation of thermal sink14TS and disposed in thermal contact with thermal sink14TS and, more preferably, with the central core14TC of thermal sink14TS (where a central core has been optionally included in thermal sink14TS) either with direct contact or through thermal adhesives or glues. Other embodiments may include additional windows where other high heat circuits are employed on module10. Still other embodiments may insert some or all of ICs18into cutout areas240in substrate14as described in detail in U.S. patent application Ser. No. 11/005,992, filed Dec. 7, 2004 which is owned by Staktek Group L.P. and has been incorporated by reference herein.

FIG. 10depicts in enlarged view an area about deformation14D of substrate14to illustrate how a part of populated flex circuit12is disposed about edge16A of substrate14. While a rounded configuration is shown, edge16A may take on other shapes devised to mate with various connectors or sockets. The form and function of various edge card connectors are well know in the art. In many preferred embodiments, flex12is wrapped around edge16A of substrate14and may be laminated or adhesively connected to substrate14with adhesive30. The depicted adhesive30and flex12may vary in thickness and are not drawn to scale to simplify the drawing. The depicted substrate14preferably has a thickness such that when assembled with the flex12and adhesive30, the thickness measured between module contacts20falls in the range specified for the mating connector. Adhesive30is preferably employed to attached flex circuit12to substrate14and contacts20are disposed on each side of module10. In other embodiments, contacts20need not be on both sides of module10and may be exhibited on only one side in configurations.

FIG. 11depicts a first side8of flex circuit12(“flex”, “flex circuitry”, “flexible circuit”) used in constructing a module according to an embodiment of the present invention. Flex circuit12is preferably made from one or more conductive layers supported by one or more flexible substrate layers as further described with reference to laterFIG. 12. The construction of flex circuitry is known in the art. The entirety of the flex circuit12may be flexible or, as those of skill in the art will recognize, the flexible circuit structure12may be made flexible in certain areas to allow conformability to required shapes or bends, and rigid in other areas to provide rigid and planar mounting surfaces.FIG. 11depicts a side8of flex circuit12populated with exemplar ICs18profiled to illustrate that many different types of ICs18may be employed. Contacts20are shown in two pluralities CR1and CR2which are disposed closer to edge12E of flex circuit12than the ICs18are disposed.

ICs18on flexible circuit12are, in this embodiment, chip-scale packaged memory devices of small scale. For purposes of this disclosure, the term chip-scale or “CSP” shall refer to integrated circuitry of any function with an array package providing connection to one or more die through contacts (often embodied as “bumps” or “balls” for example) distributed across a major surface of the package or die. CSP does not refer to leaded devices that provide connection to an integrated circuit within the package through leads emergent from at least one side of the periphery of the package such as, for example, a TSOP.

Embodiments of the present invention may be employed with leaded or CSP devices or other devices in both packaged and unpackaged forms but where the term CSP is used, the above definition for CSP should be adopted. Consequently, although CSP excludes leaded devices, references to CSP are to be broadly construed to include the large variety of array devices (and not to be limited to memory only) and whether die-sized or other size such as BGA and micro BGA as well as flip-chip. As those of skill will understand after appreciating this disclosure, some embodiments of the present invention may be devised to employ stacks of ICs each disposed where an IC18is indicated in the exemplar Figs. Multiple integrated circuit die may be included in a package depicted as a single IC18.

While in this embodiment memory ICs are used to provide a memory expansion board or module, and various embodiments may include a variety of integrated circuits and other components. Such variety may include microprocessors, FPGA's, RF transceiver circuitry, digital logic, as a list of non-limiting examples, or other circuits or systems which may benefit from a high-density circuit board or module capability. In some preferred embodiments, circuit19will be an AMB, but the principles of the invention may be employed with a variety of devices such as, for example, a microprocessor or graphics processor employed in a circuit module while other embodiments will consist essentially of memory ICs only.

FIG. 12depicts a side9of flex circuit12illustrating an IC population of flex circuit12that includes an IC19which is depicted to be an AMB with die19D and contacts19C. Typically, side9will be closer to substrate14than will be side8of flex circuit12when module10is assembled.

FIG. 13is an exploded depiction of a flex circuit12cross-section according to one preferred embodiment of the present invention. The depicted flex circuit12has four conductive layers1301-1304and seven insulative layers1305-1311. The numbers of layers described are merely those used in one preferred embodiment and other numbers of layers and arrangements of layers may be employed. Even a single conductive layer flex circuit12may be employed in some embodiments, but flex circuits with more than one conductive layer prove to be more adaptable to more complex embodiments of the invention.

Top conductive layer1301and the other conductive layers are preferably made of a conductive metal such as, for example, copper or alloy110. In this arrangement, conductive layers1301,1302, and1304express signal traces1312that make various connections by use of flex circuit12. These layers may also express conductive planes for ground, power or reference voltages.

In this embodiment, inner conductive layer1302expresses traces connecting to and among various ICs. The function of any one of the depicted conductive layers may be interchanged in function with others of the conductive layers. Inner conductive layer1303expresses a ground plane, which may be split to provide VDD return for pre-register address signals. Inner conductive layer1303may further express other planes and traces. In this embodiment, floods or planes at bottom conductive layer1304provides VREF and ground in addition to the depicted traces.

Insulative layers1305and1311are, in this embodiment, dielectric solder mask layers which may be deposited on the adjacent conductive layers for example. Other embodiments may not have such adhesive dielectric layers. Insulating layers1306,1308, and1310are preferably flexible dielectric substrate layers made of polyimide. However, any suitable flexible circuitry may be employed in the present invention and the depiction ofFIG. 13should be understood to be merely exemplary of one of the more complex flexible circuit structures that may be employed as flex circuit12.

Although the present invention has been described in detail, it will be apparent to those skilled in the art that many embodiments taking a variety of specific forms and reflecting changes, substitutions and alterations can be made without departing from the spirit and scope of the invention. Therefore, the described embodiments illustrate but do not restrict the scope of the claims.