Video device

A video device includes a signal generating circuit configured for generating video signals; an internal resistor connected to the output port of the signal generating circuit and matching with an external resistor of an external device; a detecting circuit connected to two ends of the internal resistor through two input ports thereof, and configured for detecting voltages of the two ends of the internal resistor and outputting a voltage difference therebetween; a controlling circuit connected to the output port of the detecting circuit, and configured for determining whether or not the external device is connected to the video device according to the voltage deference, and outputting a controlling signal to the signal generating circuit; an auxiliary detecting circuit connected to the output port of the controlling circuit, and configured for generating an auxiliary detecting signal transmitted to the internal resistor.

BACKGROUND

1. Technical Field

The present disclosure generally relates to video devices and, particularly, to a video device that can automatically detect its status of connection to an external device.

2. Description of Related Art

Usually, a typical video device such as a digital video disc (DVD) player has a central processing unit (CPU) for processing video and audio data, a video buffer for buffering the video and audio data received from the CPU, and an output port for transmitting out the video and audio data. An external device such as a television can be detachably connected to the output port through a cable for receiving the video and audio data. The CPU and the video buffer generally maintain a working state once the typical video device is turned on. Thus, power efficiency is less than satisfactory.

Therefore, it is desirable to provide a video device which can overcome the limitations described.

BRIEF DESCRIPTION OF THE DRAWING

The drawing is a circuit diagram of a video device, according to an exemplary embodiment.

DETAILED DESCRIPTION

Referring to the drawing, a video device100, according to an exemplary embodiment of the present disclosure, can automatically detect its connection status to an external device200. The video device100comprises a signal generating circuit10, an internal resistor a detecting circuit20, a controlling circuit30, and an auxiliary detecting circuit40.

The signal generating circuit10is configured for generating a video signal. The internal resistor Riis connected to the output port of the signal generating circuit10and matches with an external resistor Roof the external device200. The detecting circuit20is connected to the two ends of the internal resistor Rithrough two input ports, and configured for detecting voltages of the two ends of the internal resistor Riand outputting a voltage difference. The controlling circuit30is connected to the output port of the detecting circuit20, and configured for determining whether or not the external device200is connected to the video device100based on the voltage difference, and sending a controlling signal to the signal generating circuit10and the auxiliary detecting circuit40. The auxiliary detecting circuit40is connected to the output port of the controlling circuit30, and configured for generating an auxiliary signal transmitted to the internal resistor Ri.

In the present embodiment, the video device100is a DVD player. Understandably, the video device100could be a video decoder or a computer. The resistance of the internal resistor Riis about 70-80 ohms and, particularly, is about 75 ohms. The external device200is a television or other display device. Corresponding to the resistance of the internal resistor the resistance of the external resistor Rois also about 70-80 ohms and, specifically, is about 75 ohms. The external device200can be connected to the video device100through a cable (not shown).

The signal generating circuit10has two input ports3,4and an output port1, and is comprised of a CPU11, a video buffer12, and a transistor M1. The input port of the CPU11is connected to the input port4, and the output port of the CPU11is connected to the video buffer12. The CPU11is configured for decoding video and audio data and transmitting the decoded video and audio data to the video buffer12. The output port of the video buffer12is connected to the output port1. The transistor M1is a metal oxide semiconductor field effect transistor (MOSFET). The transistor M1is positioned between a 5V power supply and the video buffer12, and configured for controlling connection or disconnection between the 5V power supply and the video buffer12. The drain of the transistor M1is connected to the 5V power supply, the source is connected to the video buffer12, and the gate is connected to the input port3.

The internal resistor Riis comprised of an input port and an output port2, wherein the input port is connected to the output port1of the signal generating circuit10, and the output port2is directly connected to the external device200through a cable.

The detecting circuit20has two input ports and an output port5. The detecting circuit20is comprised of a comparator U1, four resistors R1, R2, R3, and R4. The two ends of resistor R1are respectively connected to the output port1of the signal generating circuit10and the positive terminal of the comparator U1. The two ends of resistor R2are respectively connected to output port2of the internal resistor Riand the negative terminal of the comparator U1. The positive terminal of the comparator U1is grounded through the resistor R3. The negative terminal of the comparator U1is connected to its output port through the resistor R4. The output port of the comparator U1is connected to the output port5.

The controlling circuit30has an input port and an output port A. The controlling circuit30is comprised of a transistor Q1, a transistor M2, a capacitor C1, and three resistors R5, R6and R7. The transistor M2is a metal oxide semiconductor field effect transistor (MOSFET). The two ends of the resistor R5is respectively connected to the output port5of the detecting circuit20and the base of the transistor Q1. The base of the transistor Q1is grounded through the capacitor C1. The emitter of the transistor Q1is directly grounded. The collector of the transistor Q1is connected to the 5V power supply through the resistor R6and connected to the gate of the transistor M2. The source of the transistor M2is directly grounded, and the drain of the transistor M2is connected to the 5V power supply through the resistor R7. The drain of the transistor M2is the output port A. Controlling signals output from the controlling circuit30are transmitted to the gate of the transistor M1, the input port4of the signal generating circuit10, and the auxiliary detecting circuit40simultaneously.

The auxiliary detecting circuit40has an input port6and an output port7. The input port6is connected to the output port A of the controlling circuit30. The auxiliary detecting circuit40includes a transistor Q2, a comparator U2, two capacitors C2and C3, four resistors R8, R9, R10and R11, and a diode D1. The two ends of the resistor R8are respectively connected to the input port6and the base of the transistor Q2. The emitter of the transistor Q2is connected to the 5V power supply and the collector is connected to the positive terminal of the comparator U2. The negative terminal of the comparator U2is grounded through the capacitor C3and connected to the output port of the comparator U2through the resistor R11. The positive terminal of the comparator U2is connected to the output port of the comparator U2through the resistor R9. The output port of the comparator U2is connected to the input port of the diode D1. The output port of the diode D1is connected to the output port7.

When the external device200is connected to the video device100, the internal resistor Riis serially connected to the external resistor Ro. The video signal generated by the signal generating circuit10is transmitted to the external device200through the internal resistor Ri. The voltage difference between the two ends of the internal resistor Riis very small, almost approaching zero, for example, in a range of about 0.01V to about 0.05V. The detecting circuit20outputs a low voltage difference to the base of the transistor Q1. Thus, the transistor Q1is switched to an off state or is maintained in the off state until a high voltage difference comes and the transistor M2is also switched to an off state or maintained in the off state until a high voltage difference comes (see below). The controlling circuit30outputs a controlling signal of a high voltage level. The high voltage level is about 5V. The controlling signal of the high voltage level is transmitted to the CPU11to make the CPU11work normally. The transistor M1will be switched to an on state or maintained in the on state until a low voltage level comes and the video buffer12is connected to the 5V power supply. Thus, both the CPU11and the video buffer12are in a normal working state. The transistor Q2is switched to the off state or is maintained in the off state, thus the auxiliary detecting circuit40idles.

When the external device200is disconnected to the video device100. The voltage difference between the two ends of the internal resistor Riis about in a range of about 1V to about 2V. The detecting circuit20outputs a voltage difference of a high voltage level. Thus, the transistor Q1is switched to an on state or is maintained in the on state until a low voltage difference comes and the transistor M2is also switched to an on state or is maintained in the on state until a low voltage difference comes. The controlling circuit30outputs a controlling signal of a low voltage level. The controlling signal of the low voltage level is transmitted to the CPU11to turn off the CPU11. The transistor M1will be switched to an off state or maintained in the off state until a high voltage level comes, thus the video buffer12is cut off with the 5V power supply. Thus, both the CPU11and the video buffer12are in a turned off state. The transistor Q2is switched to an on state or is maintained in the on state, thus the comparator U2generates an auxiliary signal and transmits the auxiliary signal to the internal resistor Ri. In the present embodiment the auxiliary signal is a zigzag plus signal. The auxiliary signal can keep the CPU11and the video buffer12turned off when the external device200is disconnected with the video device100.