Complementary tuned mixer

A mixer circuit for frequency conversion operates with low power supply voltage lower than 1 V. The circuit comprises a first pair of N-channel MOS transistors and a second pair of N-channel MOS transistors each receiving differential local frequency signal, and a third pair of P-channel MOS transistors receiving differential radio frequency signal. Each pair of transistors is coupled in series with a parallel resonance circuit which operates as a constant current source. A drain of each transistor of the third pair of transistors is connected to a junction of a first pair and a second pair of transistors and a parallel resonance circuit. An output intermediate frequency signal, which differs between the local frequency and the radio frequency, is obtained at the junction of drains of the first and the second pair of transistors and load resistors. No series connected transistor is inserted between a power source and a ground, and each pair of transistors is inserted between the power source and the ground essentially in parallel with one another.

BACKGROUND OF THE INVENTION
 The present invention relates to a mixer circuit used for frequency
 conversion of carrier frequency in radio communication system.
 A mixer circuit is used for frequency conversion in a radio transceiver. A
 mixer circuit operates to multiply two analog signals for frequency
 conversion. A Gilbert cell type mixer circuit has been known for an
 integrated mixer circuit.
 FIG. 8 shows a prior Gilbert cell type mixer circuit which used MOSFET
 elements. The symbols MN1 and MN2 show N-channel MOS transistors
 constituting a first differential pair 1. A gate of those transistors
 accepts local frequency signals LO (LO+, LO-) in differential form. The
 symbols MN3 and MN4 are N-channel MOS transistors constituting a second
 pair 2, having a gate similarly accepting local frequency signals LO (LO+,
 LO-). The symbols MN5 and MN6 are N-channel MOS transistors constituting a
 third pair 3A. Each gate of those transistors accepts high frequency
 signal RF (RF+ and RF-) in differential form, respectively. The symbol MN7
 is an N-channel MOS transistor which operates as a current source. The
 symbols RL1 and RL2 are a load resistor common to the first pair 1 and the
 second pair 2.
 In the Gilbert cell type mixer circuit in FIG. 8, the transistors MN5 and
 MN6 converts high frequency signal RF into differential current form, and
 each of the transistors MN1 through MN4 switches said current according to
 the local frequency signal LO, so that the product of the high frequency
 signal RF and the local frequency signal LO is obtained at one terminal of
 the loads RL1 and RL2 to provide intermediate frequency signal IF (IF+,
 IF-) in differential form.
 By the way, a wireless transceiver operates with a battery, and it is
 preferable that voltage of the battery is as low as possible in view of
 small size and light weight of a transceiver.
 However, the prior Gilbert cell type mixer circuit must have power supply
 voltage VDD at least 1.5-2.0 V, since the prior Gilbert cell type mixer
 circuit must have three stacks of transistors (MN1, MN5 and MN7), or (MN3,
 MN6 and MN7) et al.
 If we try to decrease power supply voltage, high frequency operation is
 difficult since drain junction capacitance of a transistor increases,
 therefore, no application to wireless communication is possible.
 As mentioned above, as the operation with low power supply voltage less
 than 1.5 V is impossible, a prior transceiver must have more than two
 series connected batteries each of which may be a primary battery (1.5 V)
 or a NiCd type secondary battery (1.2 V). Thus, small sized and/or light
 weight transceiver has been difficult because of the use of two series
 connected batteries.
 SUMMARY OF THE INVENTION
 It is an object of the present invention, therefore, to provide a new and
 improved tuned mixer by overcoming the disadvantages and limitations of a
 prior tuned mixer.
 It is an object of the present invention to provide a tuned mixer which
 operates with power supply voltage lower than 1.0 V.
 The above and other objects are attained by a complementary tuned mixer
 circuit comprising; a first series circuit having a first pair of
 differentially arranged transistors receiving a first multiply signal in
 differential form, and an impedance circuit which operates as a constant
 current source; a second series circuit of the similar configuration to
 said first series circuit; a differential amplifier receiving a second
 multiply signal and providing a pair of outputs in differential form; said
 first series circuit and said second series circuit being inserted between
 a first power terminal (VDD) and a second power terminal, respectively
 through a respective load resistor (RL1, RL2); said differential
 amplifiers being supplied directly by said first power terminal (VDD), and
 each outputs in differential form being coupled with a junction of said
 impedance circuit and transistors in said first series circuit and a
 junction of said impedance circuit and transistors in said second series
 circuit, respectively; and a product, in differential form, of said first
 multiply signal and said second multiply signal being obtained at junction
 of said load resistors and said series circuits.
 The transistors composing said first series circuit and said second series
 circuit have opposite conductivity type to that of the transistors
 composing said differential amplifier.
 Said differential amplifier has differential transistor pair which receive
 the second multiply signal, and an impedance circuit which operates as a
 constant current source, each connected in series with said differential
 amplifier, between the first power supply terminal and the second power
 supply terminal.
 Preferably, said differential amplifier has a pair of capacitors in
 coupling lines between output lines of the differential amplifier and said
 series circuits to cut off D.C. current.
 When said capacitors are provided in said coupling lines, transistors in
 the first and the second series circuits may have the same conductivity
 type as that of transistors in the differential amplifier.
 Preferably, said impedance circuit is a parallel resonance circuit having
 an inductor and a capacitor, and resonating with said first multiply
 signal or said second multiply signal. As the first multiply signal
 frequency is in general close to the second multiply signal frequency,
 when the resonance circuit resonates with one of the multiply signal
 frequencies, it may have enough impedance to operate as a constant current
 source for both the multiply signals. When the value Q of the parallel
 resonance circuit is too high, a resistor is coupled with the resonance
 circuit in parallel to decrease the value Q. As an impedance circuit has
 high impedance for high frequency so that it operates as a constant
 current source, and low resistance for D.C. current so that high D.C.
 voltage is applied to transistors, it may not necessarily a parallel
 resonance circuit, but a mere inductor is enough.

DESCRIPTION OF THE PREFERRED EMBODIMENTS
 (First embodiment)
 FIG. 1 is a circuit diagram of a frequency mixer according to the present
 invention. The same numerals are assigned in FIG. 1 for the same members
 as those in FIG. 8.
 In FIG. 1, a first differential pair 1 comprises a pair of transistors MN1
 and MN2 which receive differential local frequency signals LO+ and LO- on
 each gate. A current supply terminal (source) of those transistors is
 coupled with a power source (ground) through a parallel resonance circuit
 4 having an inductor L and a capacitor C.
 Similarly, a second differential pair 2 comprises a pair of transistors MN3
 and MN4 which receive differential local frequency signals LO+ and LO- on
 each gate. A current supply terminal (source) of those transistors is
 coupled with a power source (ground) through a parallel resonance circuit
 5 having an inductor L and a capacitor C.
 A third differential pair 3 comprises a pair of P-channel MOS transistors
 MP1 and MP2 which receive differential high frequency signals RF+ and RF-
 on each gate. A current supply terminal (source) of those transistors is
 coupled with a power source (VDD) through a parallel resonance circuit 6
 having an inductor L and a capacitor C. Drains (outputs) of those
 transistors are connected to each current supply terminal (source) of the
 transistors of the first pair and the second pair, respectively.
 A load RL1 is connected to a drain of a non-inverted transistor MN1 (which
 receives one (+) of the differential local signals) of the first pair 1
 and a drain of an inverted transistor MN4 (which receives one (-) of the
 differential local signals) of the second pair 2. A load RL2 is connected
 to a drain of an inverted transistor MN2 of the first pair 1 and a drain
 of a non-inverted transistor MN3 of the second pair 2.
 Each of the resonance circuits 4 through 6 are equivalent to the circuit of
 FIG. 2(a), which has a capacitor C, and a series circuit of an inductor L
 and a resistor Rs. The frequency-impedance characteristics of a parallel
 resonance circuit is shown in FIG. 2(b), which has the maximum impedance
 z.sub.0 =L/CRs=RsQ.sup.2 at the resonance frequency f.sub.0
 =1/2.ang.(LC).sup.1/2, where Q is a value showing how sharp a resonance
 circuit is.
 It should be noted that a parallel resonance circuit has high impedance at
 resonance frequency f.sub.0, therefore, a parallel resonance circuit is
 equivalent to a current source for alternate (AC) signal. A parallel
 resonance circuit has small resistance for DC signal. That small
 resistance provides small voltage drop, which does not much affect to the
 operation of the present invention.
 As compared with a prior art of FIG. 8, the first differential pair 1, the
 second differential pair 2 and the third differential pair 3 are inserted
 essentially in parallel between the power supply terminal VDD and the
 ground. The signal transfer between the first pair 1 or the second pair 2,
 and the third pair 3 is carried out through resonance circuits 1 and 2
 which operate as a constant current source. It should be noted that the
 total current in the transistors MN1, MN2 and MP3 is almost constant
 because of the presence of the parallel resonance circuit 4 which operates
 as a constant current source. Similarly, the total current in the
 transistors MN3, MN4 and MP2 is almost constant, and the total current in
 the transistors MP1 and MP2 is almost constant. For instance, when drain
 current of the transistor MP1 of the third pair 3 increases by the high
 frequency signal RF+, the current in the first differential pair 1
 decreases, and therefore, the high frequency signal RF is transferred to
 the first pair 1.
 It should be appreciated that the total current in the first differential
 pair 1 (MN1 and MN2), and the transistor MP1 is constant because of the
 presence of the current source 4, the total current in the second
 differential pair 2 (MN3 and MN4) and the transistor MP2 is constant
 because of the presence of the current source 5. And, the total current in
 the transistors MP1 and MP2 is constant because of the presence of the
 current source 6.
 The voltage between a gate and a source of the third differential pair 3 is
 almost equal to the voltage between the power source voltage VDD and the
 high frequency signal (RF+, RF-), as the D.C. voltage drop in the parallel
 resonance circuit 6 is almost zero. That voltage determines bias current
 of the transistors.
 Similarly, the voltage between a gate and a source in the first
 differential pair 1 and the second differential pair 2 is determined by
 the voltage between the local frequency signal (LO+, LO-) and the ground.
 Therefore, bias voltage may be set arbitrarily and a circuit itself can
 operate with low power supply voltage.
 FIG. 3 shows simulated waveforms of the device of FIG. 1, in which a
 computer program HSPICE was used. In FIG. 3, the power supply voltage VDD
 is 1 V, the local frequency signal LO is 1.71 GHz, the radio frequency
 signal RF is 1.95 GHz, and an output intermediate frequency is 240 MHz. A
 lowpass filter is used to process the intermediate frequency so that the
 difference frequency component (240 MHz) is clarified.
 As described above, according to the present invention, no series
 connection of transistors between power supply terminals is necessary, and
 therefore, a frequency mixer can operate with low voltage less than 1 V.
 (Second embodiment)
 FIG. 4 shows a circuit diagram of a second embodiment of a frequency mixer
 according to the present invention.
 The feature of FIG. 4 as compared with the embodiment of FIG. 1 is that a
 N-channel MOS transistor in FIG. 1 is changed to a P-channel MOS
 transistor in FIG. 4, and a P-channel MOS transistor in FIG. 1 is changed
 to a N-channel MOS transistor in FIG. 4. The first differential pair 1 and
 the second differential pair 2 in FIG. 1 which receive differential local
 frequency signal are changed to the first differential pair 1A and the
 second differential pair 2A which have P-channel MOS transistors MP3
 through MP6, and the third differential pair 3 in FIG. 1 is changed to the
 third differential pair 3A having N-channel MOS transistors MN5 and MN6.
 The relation of the power source VDD and the ground in view of the
 transistors is opposite to that of FIG. 1, and the parallel resonance
 circuits 4 through 6 are connected to a source of a respective
 differential pair of transistors, and the load resistors RL1 and RL2 are
 connected to a drain of a respective transistor.
 (Third embodiment)
 FIG. 5 is a circuit diagram of the third embodiment of a frequency mixer
 according to the present invention. The feature of the embodiment of FIG.
 5 is that parallel resonance circuits 4A through 6A have a resistor Rp
 coupled with each of parallel resonance circuits 4-6 of FIG. 1, in
 parallel.
 When the value Q is too high in a parallel resonance circuit, the impedance
 of the parallel resonance circuit is sensitive in view of the frequency
 change. Therefore, the resistor Rp which satisfies z.sub.0 =L/CRs&gt;Rp is
 coupled with a parallel resonance circuit in parallel to decrease the
 value Q, so that the circuit may be designed easily. It should be note
 that no voltage drop for D.C. current occurs in the parallel resonance
 circuit of FIG. 5.
 (Fourth embodiment)
 FIG. 6 is a circuit diagram of the fourth embodiment of a frequency mixer
 according to the present invention. The feature of the embodiment of FIG.
 6 is that parallel resonance circuits 4A through 6A have a resistor Rp
 coupled with each of parallel resonance circuits 4-6 of FIG. 4. The
 circuit of FIG. 6 has the advantage similar to that of FIG. 5.
 (Another embodiment)
 In the above embodiments, although an FET (Field Effect Transistor) is
 used, it is possible to use a bipolar transistor. In that case, a drain, a
 gate and a source of an FET corresponds to a collector, base and an
 emitter, respectively, and a P-channel MOS transistor is replaced by an
 NPN transistor, and a N-channel MOS transistor is replaced by a PNP
 transistor.
 It should be noted in the embodiments in FIGS. 1, 4, 5 and 6 that the
 operation by the circuit P enclosed by the dotted line is equivalent with
 a differential amplifier Q in FIG. 7A, and the circuit P may be replaced
 by a differential amplifier. A differential amplifier Q receives, in the
 embodiment of FIG. 1, radio frequency signal RF+ and RF-, and provides
 differential outputs W1 and W2 to the transistor pairs (MN1, MN2) and
 (MN3, MN4). A differential amplifier Q is inserted between a power supply
 terminal VDD and ground. It should be noted that the ground line of the
 differential amplifier Q is provided by the impedance circuits 4 and 5
 through the output lines W1 and W2 in the embodiments of FIGS. 1 and 5,
 and by the ground line QE in the embodiments of FIGS. 4 and 6.
 Further, the output lines W1 and W2 may have capacitors C1 and C2
 respectively in series in each output lines as shown in FIG. 7B, so that
 DC current is prevented by the capacitors. In that case, inductors QL1,
 QL2 which are a load should be inserted between the power supply terminal
 VDD and the differential amplifier Q. When the capacitors C1 and C2 are
 inserted, the conductivity type of transistors composing a differential
 amplifier Q may the the same as the conductivity type of transistors (MN1,
 MN2, MN3, MN4) which receive local frequency signal. The application of
 the structure of FIG. 7B to each of the embodiments of FIGS. 1, 4, 5 and
 6, and the selection of the conductivity type of transistors (P-channel,
 or N-channel) are obvious to those skilled in the art.
 (Effect of the invention)
 As described above in detail, the present invention uses a current source
 implemented by a parallel resonance circuit, instead of a current source
 implemented by a transistor in a prior art. Therefore, transistors are not
 connected in series between two power supply terminals. The circuit can
 operate with power supply voltage which is requested to operate one stage
 of a transistor, and therefore, the circuit can operate with low voltage
 around 1 V.
 Further, when a resistor is coupled with a parallel resonance circuit in
 parallel, the impedance of the parallel resonance circuit is less
 sensitive to frequency, and the circuit design is easy.
 From the foregoing, it will now be apparent that a new and improved
 frequency mixer has been found. It should be appreciated of course that
 the embodiments disclosed are merely illustrative and are not intended to
 limit the scope of the invention. Reference should be made to the appended
 claims, therefore, for indicating the scope of the invention.