SYSTEMS AND METHODS FOR SUPPRESSING RESONANCES IN POWER CONVERTERS

Systems and methods for suppressing resonances in power converters are provided. A power converter (100) includes an input stage (101) configured to receive alternating current (AC), an output stage (102) configured to output alternating current (AC), a first direct current (DC) bus (106) coupling the input stage (101) to the output stage (102), a second DC bus (108) coupling the input stage (101) to the output stage (102), a first capacitor leg (110) coupling the first DC bus (106) to the second DC bus (108) and a second capacitor leg (112) coupling the first DC bus (106) to the second DC bus (108). The first DC bus (106), the second DC bus (108), the first capacitor leg (110), and the second capacitor leg (112) form a current loop (130) having an effective inductance, and at least one resistor (140,142) configured to suppress a resonance of the power converter (100), wherein the resonance is based at least in part on the effective inductance of the current loop.

DETAILED DESCRIPTION OF THE INVENTION

The methods and systems described herein facilitate suppressing resonances in power converters. Power converters including distributed direct current (DC) links may produce non-trivial inductances and may effectively act as inductor-capacitor (LC) circuits with corresponding resonant frequencies. Damping resistors are included at various locations within the power converter to facilitate suppressing the resonances produced by effective LC circuits. Suppressing resonances using the systems and methods described herein facilitates stabilizing operation of the power converter, and facilitates reducing the likelihood of damage to and/or malfunction of the power converter.

FIG. 1is a schematic diagram of an exemplary power converter100. In the exemplary embodiment, power converter100is a non-reversible, or unidirectional, power converter that includes an input stage101that receives alternating current (AC), and an output stage102that outputs AC. More specifically, in the exemplary embodiment, input101includes a three-phase rectifier arrangement (details not shown), and output stage102includes six phase legs (details not shown) that contain metal-oxide-semiconductor field-effect transistors (MOSFETs), insulated gate bipolar transistors (IGBTs), integrated gate commutated thyristors (IGCTs), and/or any other power device suitable for use in pulse-width modulation (PWM). Alternatively, input stage101and output stage102include any power device that enables power converter100to function as described herein. In the exemplary embodiment, input101is coupled to an AC source103, and output102is coupled to an AC load104. AC source103may include, but is not limited to only including, a transformer, a generator, a power grid, and/or any other device configured to supply AC power. AC load104may include, but is not limited to only including, a power grid, a motor, an appliance, and/or any other electrical device configured to operate using AC power.

In the exemplary embodiment, converter100is a two-level converter that includes a first direct current (DC) bus106and a second DC bus108. Each of first and second DC busses106and108extends from input stage101to output stage102. Converter100also includes a first capacitor leg110and a second capacitor leg112. Each of first and second capacitor legs110and112extend from first DC bus106to second DC bus108. First capacitor leg110includes a first capacitor bank114, and second capacitor leg112includes a second capacitor bank116. First and second capacitor banks114and116each include at least one capacitor120. In the exemplary embodiment, capacitors120are polarized capacitors. Alternatively, capacitors120may be unpolarized.

First capacitor leg110, first DC bus106, second capacitor leg112, and second DC bus108form a current loop130that has an effective inductance L. Loop effective inductance L is at least partially based on a total length of bus in first capacitor leg110, first DC bus106, second capacitor leg112, and second DC bus108. For clarity, inFIG. 1, effective inductance L is represented by a first effective inductor132and a second effective inductor134. In the exemplary embodiment, effective inductors132and134are balanced, each having an inductance ½L. Alternatively, first and second effective inductors132and134may have any inductance that enables power converter100to function as described herein, including having different inductances from each other.

In the exemplary embodiment, first and second capacitor banks114and116each have a capacitance ½C. Alternatively, first and second capacitor banks114and116may have any capacitance that enables power converter100to function as described herein, including having different capacitances from each other. Current loop130forms a series LC circuit having inductance L and capacitance C. For balanced power converters, the resonant frequency f of the LC circuit formed within power converter100is given by Equation 1:

Accordingly, if power converter100is operated at or near the resonant frequency f, and/or has harmonics that are at or near the resonant frequency f, large ripple currents may be generated in power converter100, damaging one or more components of power converter100.

To inhibit power converter100from resonating at the resonant frequency, a first resistor140and a second resistor142are incorporated into power converter100. In the exemplary embodiment, first DC bus106includes first resistor140, and second DC bus108includes second resistor142. Alternatively, first and second resistors140and142may be incorporated at any location within power converter100that enables power converter100to function as described herein. Further, any number of resistors may be incorporated within power convertor100that enables power converter100to function as described herein.

In the exemplary embodiment, first and second resistors140and142each have a resistance, ½R, such that with first and second resistors140and142, current loop130forms a series RLC circuit having inductance L, capacitance C, and resistance R. Alternatively, first and second resistors140and142may each have any resistance that enables power converter100to function as described herein, including having different resistances from each other. The damping ratio ζ of a balanced circuit formed by current loop130is given by Equation 2:

In the exemplary embodiment, the resistance R is selected to provide a damping ratio of

More specifically, in terms of inductance L and capacitance C, resistance R is given by Equation (3):

Alternatively, resistance R may be selected as any suitable resistance that enables power converter100to function as described herein. For example, resistance R may be selected to give a damping ratio less than

in order to reduce power losses caused by the resistance R. By including first and second resistors140and142in power converter100, when power converter100operates at or near resonant frequency f, and/or has harmonics that are at or near the resonant frequency f, any current oscillations generated as a result of the resonant frequency of current loop130will be damped out by first and second resistors140and142.

FIG. 2is a schematic diagram of an exemplary non-reversible power converter200. Unless otherwise specified, power converter200is substantially similar to power converter100(shown inFIG. 1), and similar components are labeled inFIG. 2with the same reference numerals used inFIG. 1. Power converter200is substantially similar to power converter100(shown inFIG. 1), except that first and second resistors140and142are coupled in series with respective first and second capacitor banks114and116. More specifically, first capacitor leg110includes first resistor140, and second capacitor leg112includes second resistor142. Similar to the power converter100(shown inFIG. 1), a current loop230defined by first capacitor leg110, first DC bus106, second capacitor leg112, and second DC bus108has a resonant frequency f as given by Equation 1. Equations 2 and 3 are also applicable for use with power converter200. Moreover, the methods and systems described with respect to power converter100(shown inFIG. 1) are also applicable to power converter200.

FIG. 3is a schematic diagram of an exemplary power converter300, which is composed of two three-level stages. In the exemplary embodiment, power converter300is a reversible, or bi-directional, power converter that includes a three-level input stage302that receives (or outputs, when reversed) AC and a three-level output stage304that outputs (or receives, when reversed) AC. More specifically, in the exemplary embodiment, input stage302and output stage304each include six phase legs with neutral clamping diodes (details not shown) that contain metal-oxide-semiconductor field-effect transistors (MOSFETs), insulated gate bipolar transistors (IGBTs), integrated gate commutated thyristors (IGCTs), diodes, and/or any other power device suitable for use in pulse-width modulation (PWM). Alternatively, input stage302and output stage304may include any power device that enables power converter300to function as described herein.

Converter300is a three-level converter that includes a first DC bus306, a second DC bus308, and a third DC bus310that each couple input stage302to output stage304. Converter300also includes a first capacitor leg320, a second capacitor leg322, a third capacitor leg324, and a fourth capacitor leg326. First and second capacitor legs320and322each extend from first DC bus306to second DC bus308, and third and fourth capacitor legs324and326each extend from second DC bus308to third DC bus310. First capacitor leg320includes a first capacitor bank328, second capacitor leg322includes a second capacitor bank330, third capacitor leg324includes a third capacitor bank332, and fourth capacitor leg326includes a fourth capacitor bank334. First, second, third, and fourth capacitor banks328,330,332, and334each include at least one capacitor340. In the exemplary embodiment, capacitors340are polarized capacitors. Alternatively, capacitors340may be unpolarized.

In the exemplary embodiment, first capacitor leg320, first DC bus306, second capacitor leg322, and second DC bus308form a first current loop350that has an effective inductance L. Similarly, third capacitor leg324, second DC bus308, fourth capacitor leg326, and third DC bus310form a second current loop360having an effective inductance L. The effective inductance L of first current loop350is at least partially based on a total length of bus in first capacitor leg320, first DC bus306, second capacitor leg322, and second DC bus308, and the effective inductance L of second current loop360is at least partially based on a total length of bus in third capacitor leg324, second DC bus308, fourth capacitor leg326, and third DC bus310.

For clarity, inFIG. 3, the effective inductance L of first current loop350is represented by a first effective inductor362and a second effective inductor364, and the effective inductance L of second current loop360is represented by second effective inductor364and a third effective inductor366. In the exemplary embodiment effective inductors362,364, and366each have an inductance ½L. Alternatively, first, second, and third effective inductors362,364, and366may have any inductance that enables power converter300to function as described herein, including having different inductances from each other.

Further, first, second, third, and fourth capacitor banks328,330,332, and334each have an effective capacitance ½C. Alternatively, first, second, third, and fourth capacitor banks328,330,332, and334may have any capacitance that enables power converter100to function as described herein, including having different capacitances from each other. First current loop350and second current loop360each form a series LC circuit having inductance L and capacitance C. The resonant frequencies of each LC circuit are given by Equation 1 (above). Accordingly, if power converter300is operated at or near the resonant frequency f, and/or has harmonics that are at or near the resonant frequency f, large ripple currents may be generated in power converter300, damaging one or more components of power converter300.

To inhibit power converter300from resonating at the resonant frequency, a first resistor370and a second resistor372are incorporated into power converter300. In the exemplary embodiment, first DC bus306includes first resistor370, and third DC bus310includes second resistor362. Alternatively, first and second resistors370and372may be incorporated at any position within power converter300that enables power converter300to function as described herein. Further, any number of resistors may be incorporated within power convertor300that enables power converter300to function as described herein.

In the exemplary embodiment, first and second resistors370and372each have a resistance, R, such that with first and second resistors370and372, first current loop350and second current loop360each form a series RLC circuit having inductance L, capacitance C, and resistance R. Alternatively, first and second resistors370and372may each have any resistance that enables power converter300to function as described herein, including having different resistances from each other. In the exemplary embodiment, the damping ratios ζ of the circuits formed by current loop350and current loop360are both given by Equation 2 (above).

In the exemplary embodiment, the resistance R is selected to provide a damping ratio of

More specifically, in terms of inductance L and capacitance C, resistance R is given by Equation (3) (above). Alternatively, resistance R may be selected as any suitable resistance that enables power converter300to function as described herein. For example, resistance R may be selected to give a damping ratio less than

in order to reduce power losses caused by the resistance R. By including first and second resistors370and372in power converter300, when power converter300operates at or near resonant frequency f, and/or has harmonics that are at or near the resonant frequency f, any current oscillations generated as a result of the resonant frequencies of first and second current loops350and360will be damped out by first and second resistors370and372.

FIG. 4is a schematic diagram of an exemplary reversible power converter400. Unless otherwise specified, power converter400is substantially similar to power converter300(shown inFIG. 3), and similar components are labeled inFIG. 4with the same reference numerals used inFIG. 3. Power converter400is substantially similar to power converter300(shown inFIG. 3), except that resistors are coupled in series with respective first, second, third, and fourth capacitor banks328,330,332, and334. More specifically, first capacitor leg320includes a first resistor402, second capacitor leg322includes a second resistor404, third capacitor leg324includes a third resistor406, and fourth capacitor leg326includes a fourth resistor408. In the exemplary embodiment, first, second, third, and fourth resistors402,404,406, and408each have a resistance ½R, such that a first current loop450and a second current loop460each form a series RLC circuit having inductance L, capacitance C, and resistance R. Alternatively, first, second, third, and fourth resistors402,404,406, and408may each have any resistance that enables power converter400to function as described herein, including having different resistances from each other.

Similar to power converter300(shown inFIG. 3), first current loop450and second current loop460have a resonant frequency f as given by Equation 1. Equations 2 and 3 are also applicable for use with power converter400. Moreover, the methods and systems described with respect to power converter300(shown inFIG. 3) are also applicable to power converter400.

FIG. 5is a schematic diagram of an exemplary power converter500. In the exemplary embodiment, power converter500is a non-reversible dual-output power converter that includes a first input stage504and a second input stage506that each receive AC. Power converter500also includes a first three-level output stage502and a second three-level output stage508that output AC. More specifically, in the exemplary embodiment, first output stage502and second output stage508each include six phase legs (details not shown) that contain metal-oxide-semiconductor field-effect transistors (MOSFETs), insulated gate bipolar transistors (IGBTs), integrated gate commutated thyristors (IGCTs), and/or any other power device suitable for use in pulse-width modulation (PWM), along with neutral clamp diodes. Further, in the exemplary embodiment, first input stage504and second input stage506each include a three-phase rectifier arrangement (details not shown). Alternatively, first output stage502, first input stage504, second input stage506, and second output stage508include any power device that enables power converter500to function as described herein.

Converter500is a three-level converter that includes a first DC bus510, a second DC bus512, and a third DC bus514that each couple first output stage502to second output stage508. Converter500also includes a first capacitor leg520, a second capacitor leg522, a third capacitor leg524, and a fourth capacitor leg526. First and second capacitor legs520and522each extend from first DC bus510to second DC bus512, and third and fourth capacitor legs524and526each extend from second DC bus512to third DC bus514. First capacitor leg520includes a first capacitor bank528, second capacitor leg522includes a second capacitor bank530, third capacitor leg524includes a third capacitor bank532, and fourth capacitor leg526includes a fourth capacitor bank534. First, second, third, and fourth capacitor banks528,530,532, and534each include at least one capacitor540. In the exemplary embodiment, capacitors540are polarized capacitors. Alternatively, capacitors540may be unpolarized.

In the exemplary embodiment, first capacitor leg520, first DC bus510, second capacitor leg522, and second DC bus512form a first current loop550that has an effective inductance L. Similarly, third capacitor leg524, second DC bus512, fourth capacitor leg526, and third DC bus514form a second current loop560that has an effective inductance L. The effective inductance L of first current loop550is at least partially based on a total length of bus in first capacitor leg520, first DC bus510, second capacitor leg522, and second DC bus512, and the effective inductance L of second current loop560is at least partially based on a total length of bus in third capacitor leg524, second DC bus512, fourth capacitor leg526, and third DC bus514.

For clarity, inFIG. 5, the effective inductance L of first current loop550is represented by a first effective inductor562, a second effective inductor564, a third effective inductor566, and a fourth effective inductor568. Similarly, the effective inductance L of second current loop560is represented by third effective inductor566, fourth effective inductor568, a fifth effective inductor570, and a sixth effective inductor572. In the exemplary embodiment, effective inductors562,564,566,568,570, and572each have an inductance ¼L. Alternatively, first, second, and third, fourth, fifth, and sixth effective inductors562,564,566,568,570, and572may have any inductance that enables power converter500to function as described herein, including having different inductances from each another.

Further, first, second, third, and fourth capacitor banks528,530,532, and534each have an effective capacitance ½C. Alternatively, first, second, third, and fourth capacitor banks528,530,532, and534may have any capacitance that enables power converter500to function as described herein, including having different capacitances from each other. First current loop550and second current loop560each form a series LC circuit having inductance L and capacitance C. The resonant frequencies of each LC circuit are given by Equation 1 (above). Accordingly, if power converter500is operated at or near the resonant frequency f, and/or has harmonics that are at or near the resonant frequency f, large ripple currents may be generated in power converter500, damaging one or more components of power converter500.

To inhibit power converter500from resonating at the resonant frequency, a first resistor580, second resistor582, third resistor584, and fourth resistor586are incorporated into power converter500. In the exemplary embodiment, first DC bus510includes first resistor580and second resistor582, and third DC bus514includes third resistor584and fourth resistor586. Alternatively, first, second, third, and fourth resistors580,582,584, and586may be incorporated at any position within power converter500that enables power converter500to function as described herein. Further, any number of resistors may be incorporated within power convertor500that enables power converter500to function as described herein.

In the exemplary embodiment, first, second, third, and fourth resistors580,582,584, and586each have a resistance, ½R, such that first and second current loops550and560each form a series RLC circuit having inductance L, capacitance C, and resistance R. Alternatively, first, second, third, and fourth resistors580,582,584, and586may each have any resistance that enables power converter500to function as described herein, including having different resistances from each other. In the exemplary embodiment, the damping ratios ζ of the circuits formed by first current loop550and second current loop560are both given by Equation 2 (above).

In the exemplary embodiment, the resistance R is selected to provide a damping ratio of

More specifically, in terms of inductance L and capacitance C, resistance R is given by Equation (3) (above). Alternatively, resistance R may be selected as any suitable resistance that enables power converter500to function as described herein. For example, resistance R may be selected to give a damping ratio less than

in order to reduce power losses caused by the resistance R. By including first, second, third, and fourth resistors580,582,584, and586in power converter500, when power converter500operates at or near resonant frequency f, and/or has harmonics that are at or near the resonant frequency f, any current oscillations generated as a result of the resonant frequencies of first and second current loops550and560will be damped out by first, second, third, and fourth resistors580,582,584, and586.

FIG. 6is a schematic diagram of an exemplary non-reversible dual-output power converter600. Unless otherwise specified, power converter600is substantially similar to power converter500(shown inFIG. 5), and similar components are labeled inFIG. 6with the same reference numerals used inFIG. 5. Power converter600is substantially similar to power converter500(shown inFIG. 5), except that resistors are coupled in series with first, second, third, and fourth capacitor banks528,530,532, and534. More specifically, first capacitor leg520includes a first resistor602, second capacitor leg522includes a second resistor604, third capacitor leg524includes a third resistor606, and fourth capacitor leg526includes a fourth resistor608. In the exemplary embodiment, first, second, third, and fourth resistors602,604,606, and608each have a resistance ½R, such that a first current loop650and a second current loop660each form a series RLC circuit having inductance L, capacitance C, and resistance R. Alternatively, first, second, third, and fourth resistors602,604,606, and608may each have any resistance that enables power converter600to function as described herein, including having different resistances from each other.

Similar to power converter500(shown inFIG. 5), first current loop650and second current loop660have a resonant frequency f as given by Equation 1. Equations 2 and 3 are also applicable for use with power converter600. Moreover, the methods and systems described with respect to power converter500(shown inFIG. 5) are also applicable to power converter600.

FIG. 7is a flow chart of an exemplary method700that may be used to suppress resonances generated when using a power converter. In method700, a power converter, such as, for example, power converter100, is provided702. The power converter includes an input stage configured to receive alternating current (AC) and an output stage configured to output AC, such as, for example, input stage101and output stage102. The power converter also includes a first direct current (DC) bus coupling the input stage to the output stage and a second DC bus coupling the input stage to the output stage, such as, for example, first DC bus106and second DC bus108. The power converter also includes a first capacitor leg coupling the first DC bus to the second DC bus, and a second capacitor leg coupling the first DC bus to the second DC bus, such as, for example, first capacitor leg110and second capacitor leg112. The first DC bus, the second DC bus, the first capacitor leg, and the second capacitor leg form a current loop having an effective inductance, such as, for example, current loop130.

At least one resistor is coupled704within the power converter, such as, for example first resistor140and/or second resistor142. The at least one resistor is configured to suppress a resonance of the power converter. The suppressed resonance is based at least in part on the effective inductance of the current loop.

FIGS. 8-10are graphs illustrating the frequency versus the ripple current generated in an exemplary two-level power converter, for example, power converter100. InFIG. 8, a graph800illustrates the frequency in Hertz (Hz) versus the ripple current in Amperes (A) for a power converter that does not include resistors to suppress resonances. As shown in graph800, at certain frequencies, the ripple current exceeds a current threshold802. Current threshold802may represent, for example, an operating capability of a bus in the power converter. Accordingly, when the ripple current exceeds current threshold802, one or more components of the power converter may overheat and/or malfunction.

InFIG. 9, a graph900illustrates the frequency versus the ripple current generated for a power converter that does include resistors to suppress resonances. As shown in graph900, while the ripple current varies in response to the frequency, the ripple current is kept below current threshold802for all frequencies. Accordingly, the resistors facilitate preventing one or more components of the power converter from overheating and/or malfunctioning.

InFIG. 10, a graph1000illustrates the frequency versus the ripple current generated for a power converter that is heavily damped with resistors. As compared to graph900, the ripple current is more suppressed in graph1000. However, as the damping of the power converter increases, the resistors absorb significant amounts of power, reducing the overall efficiency of the converter and increasing overall cooling requirements.

As compared to known power converters, the methods and systems described herein enable larger and more resilient power converters to be manufactured and operated. Because the resistors described herein suppress resonances in power converters, non-trivial inductances produced by distributed DC link power converters will be less likely to generate resonating currents that could result in component damage and/or malfunction. Further, the methods and systems described herein will reduce the maintenance and repair costs associated with known power converters, as the methods and systems described herein reduce the likelihood of component damage and/or malfunction.

The methods and systems described herein facilitate suppressing resonances in power converters. Power converters including distributed DC links may produce non-trivial inductances and may effectively act as LC circuits with corresponding resonant frequencies. Damping resistors are included at various locations within the power converter to facilitate suppressing the resonances produced by effective LC circuits. Suppressing resonances using the systems and methods described herein facilitates stabilizing operation of the power converter, and facilitates reducing the likelihood of damage to and/or malfunction of the power converter.

Exemplary embodiments of methods and systems for suppressing resonances in power converters are described above in detail. The methods and systems described herein are not limited to the specific embodiments described herein, but rather, components of the systems and/or steps of the methods may be utilized independently and separately from other components and/or steps described herein. For example, the methods and systems described herein may have other applications not limited to practice with power converters, as described herein. Rather, the methods and systems described herein can be implemented and utilized in connection with various other industries.