Electronic device

An electronic device is provided. The electronic device includes: a circuit board having a surface on which a hollow is formed; an electronic component placed into the hollow; a pattern wiring which is formed on a bottom surface of the hollow and whose tip is provided at a position corresponding to a signal electrode of the electronic component; a signal wire connecting a tip of the pattern wiring and the signal electrode of the electronic component; two in-hollow ground patterns formed so as to sandwich the tip of the pattern wiring therebetween on the bottom surface of the hollow; and two or more ground wires that connect two ground electrodes provided on the electronic component so as to sandwich the signal electrode therebetween to the corresponding in-hollow ground patterns, respectively.

BACKGROUND

1. Technical Field

The present invention relates to an electronic device. Particularly, the present invention relates to an electronic device including a circuit board which includes a plurality of dielectric layers and has a surface having a hollow into which an electronic component is placed.

2. Related Art

As a multilayer substrate in which a plurality of substrates each of which has a pattern wiring are stacked, a multilayer substrate has been known as disclosed, for example, in Japanese Patent Application Publication No. 2007-88058. In such multilayer substrate, sometimes an electronic component is disposed in a concave portion which is formed by removing a dielectric layer as the surface of the multilayer substrate by means of machining. In this case, the electronic component disposed in the concave portion is electrically connected to a pattern wiring formed on a side surface of the concave portion through a wire, for example.

In such multilayer substrate, radio emission is generated from the wire connecting the electronic component to the pattern wiring when a high frequency signal is transmitted from the pattern wiring to the electronic component. Such radio emission sometimes has an effect on a signal transmitted through the other wire or the pattern wiring. Particularly, when an attenuator is disposed as the electronic component, it is expected that the attenuation ratio of input/output of the attenuator is affected.

SUMMARY

Therefore, it is an object of an aspect of the innovations herein to provide an electronic device, which is capable of overcoming the above drawbacks accompanying the related art. The above and other objects can be achieved by combinations described in the independent claims. The dependent claims define further advantageous and exemplary combinations of the present invention.

According to a first aspect related to the innovations herein, one exemplary electronic device is provided. The electronic device includes: a circuit board having a surface on which a hollow is formed; an electronic component placed within the hollow; a pattern wiring which is formed on a bottom surface of the hollow and whose tip is provided on a position corresponding to a signal electrode of the electronic component; a signal wire connecting the tip of the pattern wiring and the signal electrode of the electronic component; two in-hollow ground patterns which are formed so as to sandwich the tip of the pattern wiring therebetween on the bottom surface of the hollow; and two or more ground wires that connect two ground electrodes which are provided on the electronic component so as to sandwich the signal electrode therebetween to the corresponding in-hollow ground patterns, respectively.

The above and other features and advantages of the present invention will become more apparent from the following description of the embodiments taken in conjunction with the accompanying drawings.

DESCRIPTION OF EXEMPLARY EMBODIMENTS

Some aspects of the invention will now be described based on preferred embodiments, which do not intend to limit the scope of the invention, but exemplify the invention. All of the features and the combinations thereof described in the embodiments are not necessarily essential to the invention.

FIG. 1is a top plan view showing an electronic device500according to the present embodiment. The electronic device500is such as a SiP (System in Package) module that transmits/receives high frequency signals to/from a motherboard (not shown in figures) and includes a circuit board10. A hollow50framed in by side surfaces51-54and a bottom surface55is formed on the surface of the circuit board10. An electronic component200is placed into the hollow50. Here, inFIG. 1and the following other figures, only the peripheral part of the hollow50of the circuit board10is extracted and shown for ease of explanation, however, a plurality of hollows into which the other electronic components is placed may be formed on the circuit board10in addition to the hollow50into which the electronic component200is placed. Moreover, such as wiring and electronic components may be placed on the surface of the circuit board10. Furthermore, the circuit board10may be a motherboard in itself that transmits/receives signals to/from the other circuit board.

Pattern wirings61and62and in-hollow ground patterns71to75are formed on a bottom surface55of the hollow50. Among them, the in-hollow ground pattern75is formed between the electronic component200and the bottom surface55of the hollow50. Here, all of the in-hollow ground patterns71to75are connected to ground and kept at the ground potential as described later. Here, the in-hollow ground pattern75may not always be formed dependent on the kind of the electronic component200.

FIG. 2is a perspective view by enlarging the neighborhood of the hollow50of the circuit board10. As shown inFIG. 2, signal electrodes211and212, a signal wiring230, ground electrodes221to224are formed on the upper surface of the electronic component200. The signal electrodes211and212are formed on a side surface51and a side surface53of the upper surface of the electronic component200, respectively and electrically connected to each other through the signal wiring230. Ground electrodes221and222are formed on both sides of the signal electrode211on the side surface51on the upper surface of the electronic component200, meanwhile, ground electrodes223and224are formed on both sides of the signal electrode212on the side surface53on the upper surface. Here, the electronic component200may be an attenuator that attenuates signals inputted to the signal electrode211at a constant attenuation factor and outputs them from the signal electrode212, and may be such as an IC and an LSI, for example.

The pattern wiring61is provided such that its tip65faces the signal electrode211near the signal electrode211of the electronic component200. In addition, the tip65of the pattern wiring61is electrically connected to the signal electrode211of the electronic component200through a signal wire111. Meanwhile, the pattern wiring62(seeFIG. 1) is provided such that its tip66faces the signal electrode212near the signal electrode212of the electronic component200. In addition, the tip66of the pattern wiring62is electrically connected to the signal electrode212of the electronic component200through a signal wire112. Here, the signal wires111and112may be wires (air wiring) which are formed by wire bonding, for example. In addition, two signal wires111and two signal wires112are provided, respectively in the present embodiment, however, there may be one, or three or more signal wires111and112, respectively.

The in-hollow ground patterns71and72are formed such that the tip65of the pattern wiring61is sandwiched by the in-hollow ground patterns71and72on the bottom surface55of the hollow50. Accordingly, the tip65of the pattern wiring61and the in-hollow ground patterns71and72constitute a so-called coplanar line. Among the in-hollow ground patterns71and72, the in-hollow ground pattern71faces the ground electrode221near the ground electrode221of the electronic component200and the in-hollow ground pattern72faces the ground electrode222near the ground electrode222of the electronic component200. Meanwhile, the in-hollow ground patterns73and74are formed such that the tip66of the pattern wiring62is sandwiched by the in-hollow ground pattern73and74on the bottom surface55of the hollow50. Accordingly, the tip66of the pattern wiring62and the in-hollow ground patterns73and74constitute the so-called coplanar line. Among the in-hollow ground patterns73and74, the in-hollow ground pattern73faces the ground electrode223near the ground electrode223of the electronic component200, and the in-hollow ground pattern74faces the ground electrode224near the ground electrode224of the electronic component200.

The in-hollow ground pattern71is electrically connected to the ground electrode221of the electronic component200through the ground wire121. In the same way, the in-hollow ground patterns72to74are electrically connected to the ground electrodes222to224of the electronic component200through the ground wires122to124, respectively. Thereby the ground wires121and122are provided so as to sandwich the signal wire111therebetween, and the ground wires123and124are provided so as to sandwich the signal wire112therebetween. In addition, all of the ground wires121to124, and the ground electrodes221to224which are electrically connected to the in-hollow ground patterns71to74through the ground wires121to124are kept at approximately the same potential as that of the in-hollow ground patterns71to74, i.e. the ground potential.

By arranging the ground wires121to124as described above, the ground wires121to124are provided so as to run parallel to one another on both sides of each of the signal wires111and112as air wiring. Thereby signals transmitted on the electronic component200, the signal wire112and the pattern wirings61and62can be prevented from being affected by radio emission from the signal wire111. In addition, signals transmitted on the electronic component200, the signal wire111and the pattern wirings61and62can be prevented from being affected by radio emission from the signal wire112. Here, the ground wires121to124may be wires (air wiring) which are formed by wire bonding. There is each one of ground wires121to124in the present embodiment, however, there may be two or more ground wires121to124, respectively.

Continuously it will be described that the characteristic of the tip65of the pattern wiring61on the circuit board10and the in-hollow ground patterns71and72provided so as to sandwich the tip65therebetween. Here, the above-described characteristic is common to the characteristic of the tip66of the pattern wiring62and that of the in-hollow ground patterns73and74provided so as to sandwich the tip66therebetween, so that the descriptions of the characteristics of the tip66and the in-hollow ground patterns73and74are omitted.

The tip65of the pattern wiring61is formed such that its pattern width is gradually increased in accordance with a distance from the end of the electronic component200. That is, the tip65of the pattern wiring61is formed such that the width in the direction in parallel with the side surface51is gradually increased from the side proximate to the electronic component200to the side close to the side surface51of the hollow50. Thereby variation in impedance of a junction between the tip65and the signal wire111can be reduced in comparison with a case that the above-described width of the tip65of the pattern wiring61is fixed.

The in-hollow ground patterns71and72provided so as to sandwich the tip65of the pattern wiring61therebetween are formed so as to be gradually reduced their pattern widths in accordance with a distance from the electronic component200. That is, the in-hollow ground pattern71is formed such that the width in the direction in parallel with the side surface51is gradually reduced from the side proximate to the electronic component200to the side close to the side surface51of the hollow50, for example. In addition, the in-hollow ground patterns71and72are formed such that a distance between the tip65of the pattern wiring61and the in-hollow ground pattern71, and a distance between the tip65and the in-hollow ground pattern72are gradually increased in accordance with a distance from the end of the electronic component200. That is, the distance between the tip65of the pattern wiring61and the in-hollow ground pattern71in the direction in parallel with the side surface51is formed so as to be gradually increased from the side proximate to the electronic component200to the side close to the side surface51of the hollow50, for example. Thereby variation in impedance of the tip65of the pattern wiring61is reduced.

FIG. 3is a cross-sectional view showing a cross section by A-A′ line as shown inFIG. 1viewed from a direction of an arrow of the cross section. In addition,FIG. 4is a cross-sectional view showing a cross section by B-B′ line as shown inFIG. 1viewed from a direction of an arrow of the cross section. As shown inFIG. 3andFIG. 4, the circuit board10is a multilayer substrate and has a plurality of dielectric layers21to24. Here, each upper (lower) side surface of the dielectric layers21to24as shown inFIG. 3andFIG. 4in the following description is referred to as “the upper surface (lower surface) of each of the dielectric layers21to24”. Moreover, particularly, the upper side surface of the dielectric layer21is referred to as “the upper surface of the circuit board10” and the lower side surface of the dielectric layer24is referred to as “the lower surface of the circuit board10”.

As shown inFIG. 3andFIG. 4, a surface-side ground pattern81is provided on the upper surface of the circuit board10and a bottom surface-side ground pattern82is provided on the lower surface of the circuit board10. A bottom surface-side ground pattern82is connected to ground outside the circuit board via such as an electric wiring or an electrode ball (not shown in the figure) and kept at the ground potential. Meanwhile, the surface-side ground pattern81is electrically connected to the bottom surface-side ground pattern82via a plurality of interlayer wires381formed through the dielectric layers21to24. Therefore, the surface-side ground pattern81is kept at a potential substantially the same as that of the bottom surface-side ground pattern82, i.e. substantially the ground potential.

The hollow50is formed on a portion obtained by eliminating a part of the dielectric layers21and22among the plurality of dielectric layers21to24of the circuit board10. Accordingly, each of the side surfaces51to54of the hollow50is a cross section of the dielectric layers21and22. Meanwhile, the bottom surface55of the hollow50is a part of the upper surface of the dielectric layer23which is exposed by eliminating a part of the dielectric layers21and22. In addition, as shown inFIG. 3, the in-hollow ground pattern75formed between the electronic component200and the bottom surface55of the hollow50is electrically connected to the bottom surface-side ground pattern82through a plurality of interlayer wires375formed through the dielectric layers23and24. Moreover, as shown inFIG. 4, the in-hollow ground patterns72and73are electrically connected to the bottom surface-side ground pattern82via interlayer wires372and373formed through the dielectric layers23and24, respectively. Here, the in-hollow ground patterns71and74are also electrically connected to the bottom surface-side ground pattern82via an interlayer wire (the figure is omitted) formed through the dielectric layers23and24as well as the in-hollow ground patterns72and73. As described above, the in-hollow ground patterns71to75can be kept at the potential substantially the same as that of the bottom surface-side ground pattern82, i.e. substantially the ground potential.

The pattern wirings61and62are formed by intersecting the side surfaces51and53, respectively i.e. beyond the side surfaces51and53, and extending from the bottom surface55of the hollow50to a space between the dielectric layers22and23. The pattern wiring61may be further electrically connected to the pattern wiring63formed on the upper surface of the dielectric layer24via the interlayer wire361formed through the dielectric layer23, between the dielectric layers22and23. Meanwhile, the pattern wiring62may be electrically connected to the other pattern wiring (not shown in the figure) formed on the upper surface of the dielectric layer23outside the hollow50. Here, a connection configuration of the pattern wirings61and62outside the hollow50is not limited to the configuration of the present embodiment. The pattern wirings61and62may be electrically connected to such as a pattern wiring formed on a dielectric layer different from that of the present embodiment in accordance with the kind or a destination (source) of a signal transmitted.

An upper layer-side ground pattern83is provided so as to face the pattern wiring61on the upper surface of the dielectric layer22above the dielectric layer23having the upper surface on which the pattern wiring61is formed. In addition, a lower layer-side ground pattern85is provided so as to face the pattern wiring61on the upper surface of the dielectric layer24below the dielectric layer23. The upper layer-side ground pattern83and the lower layer-side ground pattern85are electrically connected to the bottom surface-side ground pattern82via the interlayer wire383formed through the dielectric layers22to24and the interlayer wire385formed through the dielectric layer24, respectively. Therefore, the upper layer-side ground pattern83and the lower layer-side ground pattern85are kept at a potential substantially the same as that of the bottom surface-side ground pattern82, i.e. substantially the ground potential.

Therefore, the pattern wiring61forms a stripline with the upper layer-side ground pattern83and the lower layer-side ground pattern85on a portion other than the portion formed on the bottom surface55of the hollow50. In addition, the lower layer-side ground pattern85is also formed on the under side of the portion formed on the bottom surface55of the hollow50of the pattern wiring61. Accordingly, the pattern wiring61forms a microstripline with the lower layer-side ground pattern85on a portion formed on the bottom surface55of the hollow50.

Meanwhile, the upper layer-side ground pattern84is provided so as to face the pattern wiring62on the upper surface of the dielectric layer22above the dielectric layer23having the upper surface on which the pattern wiring62is formed. The lower layer-side ground pattern86is provided so as to face the pattern wiring62on the upper surface of the dielectric layer24below the dielectric layer23. An upper layer-side ground pattern84and the lower layer-side ground pattern86are electrically connected to the bottom surface-side ground pattern82via the interlayer wire384formed through the dielectric layers22to24and the interlayer wire386formed through the dielectric layer24and kept at substantially the ground potential, respectively.

Therefore, the pattern wiring62forms a stripline with the upper layer-side ground pattern84and the lower layer-side ground pattern86on a portion other than the portion formed on the bottom surface55of the hollow50. Meanwhile, the lower layer-side ground pattern86is also formed on the under side of the portion formed on the bottom surface55of the hollow50of the pattern wiring62. Therefore, the pattern wiring62forms a microstripline with the lower layer-side ground pattern86on the portion formed on the bottom surface55of the hollow50.

FIG. 5is a top plan view showing an electronic device501according to another example of the present embodiment. Components of the electronic device501the same as those of the electronic device500described with reference toFIG. 1toFIG. 4have reference numerals the same as those ofFIG. 1toFIG. 4, so that the description is partially omitted. The electronic device501includes a circuit board11having a plurality of dielectric layers21to24as well as the above-described circuit board10.

A hollow50is formed on the surface of the circuit board11, and an electronic component200is placed into the hollow50. In addition, pattern wirings61and62and in-hollow ground patterns71to75are formed on a bottom surface55of the hollow50.

FIG. 6is a perspective view by enlarging the neighborhood of the hollow50of the circuit board11. As shown inFIG. 6, the in-hollow ground pattern71is electrically connected to a surface-side ground pattern81provided on the upper surface of the circuit board11via a shield wire171. In the same way, the in-hollow ground patterns72to74are electrically connected to the surface-side ground pattern81via shield wires172to174, respectively. The shield wires171and172are air-wired above the pattern wiring61including an upper space of the side surface51intersecting the pattern wiring61extending from the outside to the inside of the hollow50. In the same way, the shield wires173and174are air-wired above the pattern wiring62including an upper space of the side surface53intersecting the pattern wiring62. All of those shield wires171to174are kept at a potential substantially the same as that of the in-hollow ground patterns71to74and the surface-side ground pattern81, i.e. the ground potential.

By arranging the shield wires171to174described above, even if radio emission is generated from portions of the pattern wirings61and62which intersect the side surfaces51and53in the hollow50, respectively and a portion more inside than the intersecting portion of the hollow50, the effect created by the radio emission on signals transmitted on the electronic component200, the signal wires111and112and the pattern wirings61and62can be reduced by the shield wires171to174. Here, the shield wires171to174may be wires (air-wiring) formed by wire bonding. Moreover, it is preferred that a plurality of shield wires171to174are provided, respectively as the present embodiment, however, it is no problem if one or more shield wires171to174are provided.

FIG. 7is a cross-sectional view showing a cross section by C-C′ line as shown inFIG. 5viewed from a direction of an arrow of the cross section. As shown inFIG. 7, a plurality of interlayer wires382are formed on both sides of the pattern wiring61near the side surface51intersecting the pattern wiring61outside the hollow50(here, two interlayer wires382each of which is formed on one side of the pattern wiring61is formed in the present embodiment). Those interlayer wires382are formed through the dielectric layers21to24and electrically connects the surface-side ground pattern81to the bottom surface-side ground pattern82. Here, a plurality of interlayer wires382may provided on both sides of the pattern wiring61and spaced from one another in a direction in parallel with the pattern wiring61.

In addition, a distance between a connecting position of the shield wires171and172to the surface-side ground pattern81and the pattern wiring61is less than a distance between the pattern wiring61and the interlayer wire382in a direction in parallel with the side surface51intersecting the pattern wiring61, i.e. the horizontal direction of the cross-sectional view as shown inFIG. 7. Specifically, in the above-described direction, a distance between a connecting position of each one end of the shield wires171and172to the surface-side ground pattern81and the pattern wiring61is less than a distance between each of the interlayer wires382provided on both sides of the pattern wiring61and the pattern wiring61.

By arranging the shield wires171and172described above, the shield wires171and172can be provided so as to run in parallel with each other on both sides of a portion intersecting the side surface51of the hollow50and a portion nearer the200on the bottom surface55of the hollow50than the intersecting portion on the pattern wiring61. Thereby signals transmitted on the electronic component200, the signal wires111and112, and the pattern wirings61and62can be prevented from being affected by radio emission from the above described portions of the pattern wiring61.

Here, although an illustration and a description are omitted, a plurality of interlayer wires may be formed on both sides of the pattern wiring62near the side surface53intersecting the pattern wiring62outside the hollow50. In this case, it is preferred that a distance between connecting positions of the shield wires173and174to the surface-side ground pattern81and the pattern wiring62is less than a distance between the pattern wiring62and the plurality of interlayer wires in a direction in parallel with the side surface53intersecting the pattern wiring62.

By arranging the shield wires173and174as described above, the shield wires173and174can be provided so as to run in parallel with each other on both sides of a portion intersecting the side surface53of the hollow50and a portion nearer the200on the bottom surface55of the hollow50than the intersecting portion on the pattern wiring62. Thereby signals transmitted on the electronic component200, the signal wires111and112, and the pattern wirings61and62can be prevented from being affected by radio emission from the above described portions of the pattern wiring62.

While the aspects of the invention have been described by way of the exemplary embodiments, it should be understood that those skilled in the art might make many changes and substitutions without departing from the spirit and scope of the invention. It is obvious from the definition of the appended claims that the embodiments with such modifications also belong to the scope of the invention.

As apparent from the above descriptions, according to an embodiment of the present invention, it is possible to provide an electronic device provided with a circuit board which includes a plurality of dielectric layers and has a surface having a hollow into which an electronic component is placed.