Pin photodiode structure

A PIN photodiode structure includes a substrate, a P-doped region disposed in the substrate, an N-doped region disposed in the substrate, and a first semiconductor material disposed in the substrate and between the P-doped region and the N-doped region.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a photodiode structure and the method for making the photodiode. In particular, the present invention relates to a photosensitive PIN photodiode structure and the method for manufacturing the photodiode.

2. Description of the Prior Art

The conventional copper cables are less and less likely capable to carry more and more signals to travel a longer and longer distance due to the physical limitation of electrical resistance and signal delays. Naturally, optical fibers meet the demand of carrying very large information to travel a very long distance so they replace the conventional copper cables to be the medium of long distance carrier of information because one single optical fiber allows multiple beams of light of different wavelength, each carrying different information to travel at the speed of light without mutual interference and without attenuating too much after traveling an extreme long distance.

Light of different wavelengths in the form of pulse signals constitutes the basic principle of transmission by optical fiber. However, such basic principle of transmission is not compatible with the basic principle of transmission by electron current in the current electronic devices to carry and to transmit signals. In order to form a transform medium between the optical fiber transmission and the electron current transmission, the photo-detector is deemed to be a convenient tool.

The photo-detector is an important photo-electrical transform unit. The photo-detector is capable of transforming the optical signals to electrical signals (into voltage or current), so it can transform the optical pulse signals in the optical fibers to become the electrical signals which can be carried, transmitted or used by ordinary electronic devices. Amongst them, the PIN (p-intrinsic-n photodiode) which has the advantages of easy to be manufactured, high reliability, low noise, compatible with low-voltage amplifier circuits and very wide bandwidth becomes one of the most widely used photo-detector.

The basic operational mechanism of the PIN photodiode is that when the incident light hits the p-n junction of the semiconductor, the electrons in the valence band of the semiconductor would absorb the energy of the photons in the incident light and jump over the forbidden band to arrive at the conduction band, which means, the incident photons create electrons, called photo-electrons, in the conduction band of the semiconductor if the photons have sufficient energy. Simultaneously, an electrical hole is left behind in the valence band and an electron-hole pair, or called photocarrier, is thus generated, which is also known as the photoelectric effect of the semiconductors. Afterwards, the photo-electron and the corresponding hole are quickly separated under the influence of an inner electric field and an outer negative bias to be respectively collected at the positive electrode and the negative electrode. Therefore, a photo-current appears in the outer circuit.

In order to enhance the operational performance of the PIN photodiode, the current technology integrates the Ge semiconductor material into the Si substrate to accomplish an optical communication of wide wavelength because Ge is deemed to have much higher carrier mobility than Si. The importance of integration of Ge semiconductor material into the Si substrate lies in the essential qualities of fast, effective and low noise. The photo-detectors made of Ge have the capabilities of effectively detecting the optical signals at the wavelength used by the optical communication. In addition, if the photo-detectors made of Ge are integrated with the conventional processes of Si type, it would be able to further lower the cost of the PIN photodiode.

There is a known PIN photodiode which integrates the Ge semiconductor material into the Si substrate.FIG. 1illustrates the conventional PIN photodiode with Ge semiconductor material. The PIN photodiode101includes a Si substrate110, an oxide layer120, a P-doped Si130, the intrinsic Ge140, an N-doped Si150, electrode regions such as the first electrode region161and the second electrode region162. The P-doped Si130, the intrinsic Ge140and the N-doped Si150together constitute the core element of the PIN photodiode. Because in the above-mentioned structure of the PIN photodiode101, the first electrode region161in the electrode regions is disposed above the N-doped Si150, such arrangement will decrease the frontal area to receive light and the quantum yield is thus lower due to the incident light partially absorbed by passing through the p-doped Si130. Moreover, the manufacturing process of the PIN photodiode101is not fully compatible with that of the conventional MOS. Accordingly, it is needed to provide a novel PIN photodiode structure and the method for making the PIN photodiode to more effectively integrate the manufacturing process of the novel PIN photodiode structure with the traditionally fully-developed MOS manufacturing process to lower the manufacturing cost.

SUMMARY OF THE INVENTION

Accordingly, the present invention provides a novel PIN photodiode structure and the method for making the PIN photodiode to more effectively integrate the manufacturing process with the traditionally fully-developed MOS manufacturing process in order to lower the manufacturing cost and to solve the above-mentioned problems.

The present invention first relates to a PIN photodiode structure. The PIN photodiode structure of the present invention includes a semiconductor substrate including Si, a P-doped region disposed in the substrate, an N-doped region disposed in the substrate and, a first semiconductor material disposed in the semiconductor substrate and between the P-doped region and the N-doped region. Preferably, the first semiconductor material includes Ge or has a Ge concentration gradient.

The present invention secondly relates to a method for forming a PIN photodiode structure. In the method for forming a PIN photodiode structure of the present invention first a semiconductor substrate including a P-doped region and an N-doped region is provided. Second, a trench disposed in the semiconductor substrate and between the P-doped region and the N-doped region is formed. Then the trench is filled with a first semiconductor material, so that the first semiconductor material may be bulging from the trench. Preferably, the first semiconductor material includes Ge or has a Ge concentration gradient.

Because the P-doped region and the N-doped region for use as the conductive electrodes in the PIN photodiode structure of the present invention all are disposed in the substrate of the semiconductor, the PIN photodiode structure has larger area for receiving the incident light. Further, the manufacturing process of the PIN photodiode structure of the present invention can be more effectively integrated with the traditionally fully-developed MOS manufacturing process to lower the manufacturing cost.

DETAILED DESCRIPTION

The present invention provides a novel PIN photodiode structure and the method for making the PIN photodiode. Because each of the P-doped region and the N-doped region for use as the conductive electrodes in the PIN photodiode structure of the present invention is disposed in the substrate of the semiconductor adjacent to the Ge semiconductor material, not only does the PIN photodiode structure have much larger area for receiving the incident light, but also the manufacturing process of the PIN photodiode structure of the present invention can be more effectively integrated with the traditionally fully-developed MOS manufacturing process to lower the manufacturing cost and to solve the above-mentioned problems.

The present invention first provides a photodiode structure.FIG. 2illustrates a preferred embodiment of the photodiode structure of the present invention. The photodiode structure200of the present invention includes a semiconductor substrate201, a shallow trench isolation (STI)210, a P-type doped region221, an N-type doped region222, a trench223, an interlayer dielectric240, a P-type doped region plug251and an N-type doped region plug252.

The semiconductor substrate201may be a common semiconductor substrate, such as Si or SOI. The isolation structure such as the shallow trench isolation (STI)210is disposed on the semiconductor substrate201to segregate different element regions. As shown inFIG. 2, the photodiode structure200of the present invention has the shallow trench isolation (STI)210.

The trench223is located in the semiconductor substrate201surrounded by the shallow trench isolation (STI)210. In addition, the P-type doped region221and the N-type doped region222in the semiconductor substrate201are just disposed on the two opposite sides of the trench223. The P-type doped region221and the N-type doped region222may be formed in the semiconductor substrate201by using the conventional ion implantation in accordance with convention dopants. In addition, the P-type doped region221and the N-type doped region222can be activated by a thermal diffusion step or an annealing step.

The first semiconductor material231is disposed in the trench223and fills the trench223. Because the trench223is located in the semiconductor substrate201and between the P-type doped region221and the N-type doped region222, the first semiconductor material231is disposed in the semiconductor substrate201and between the P-type doped region221and the N-type doped region222, too. The first semiconductor material231may be a common semiconductor substrate, such as Si, Ge or the combination thereof. Preferably, the first semiconductor material231has a Ge concentration gradient.

Furthermore, on the first semiconductor material231there may be another second semiconductor material232which is connected to the first semiconductor material231and protrudes from the surface of the first semiconductor material231. The second semiconductor material232may be a common semiconductor substrate, such as Si, Ge or the combination thereof. Preferably, the second semiconductor material232may have a Ge concentration gradient inherited from the Ge concentration gradient of the first semiconductor material231.

The interlayer dielectric240covers the semiconductor substrate201, the P-type doped region221, the N-type doped region222, the trench223, a shallow trench isolation (STI)210, the P-type doped region221, the N-type doped region222, the first semiconductor material231and the second semiconductor material232. Further, within the interlayer dielectric240there is a P-type doped region plug251disposed on the P-type doped region221to construct the electrical connection between the P-type doped region221and the following other overlying layers. Similarly, the N-type doped region plug252is disposed within the interlayer dielectric240and on the N-type doped region222to construct the electrical connection between the N-type doped region222and the following other overlying layers. The P-type doped region plug251and the N-type doped region plug252may respectively include conventional conductive materials, such as Al or W. Optionally, on the surface of the P-type doped region221and the N-type doped region222there may be an additional silicide such as cobalt silicide or nickel silicide to decrease the surface resistance of the P-type doped region plug251to the P-type doped region221and of the N-type doped region plug252to the N-type doped region222.

If necessary, the semiconductor substrate201of the present invention may further include at least one MOS. In other words, there may be a CMOS260adjacent to the photodiode structure200.FIG. 3illustrates a preferred embodiment of CMOS adjacent to the photodiode structure of the present invention. As shown inFIG. 3, the complimentary PMOS261and NMOS262are disposed adjacent to the photodiode structure200of the present invention, segregated by the insulating shallow trench isolation (STI)210.

Additionally, in order to be fully compatible with the manufacturing process of conventional MOS, the elements in the photodiode structure200of the present invention and the elements in the CMOS260may share some of the process features. For example, the doping concentration of the P-doped region221and of the N-doped region222in the photodiode structure200of the present invention is substantially the same as at least one of the doped regions of the CMOS260such as source or the drain.

Please notice that the photodiode structure200of the present invention may receive light from different directions. For example, as illustrated inFIG. 2, the photodiode structure200of the present invention may receive the top incident light. On the other hand, the photodiode structure200of the present invention may receive the side incident light.FIG. 4illustrates a preferred embodiment of the photodiode structure of the present invention receiving the side incident light. The photodiode structure200of the present invention additionally include a waveguide270for receiving the side incident light so that the photodiode structure200of the present invention may receive the top incident light, the side incident light or both.

The present invention again provides a method for forming a PIN photodiode structure.FIGS. 5-9illustrate a preferred embodiment of the method for forming the PIN photodiode structure of the present invention. First, as shown inFIG. 5, a semiconductor substrate501is provided. The semiconductor substrate501includes a P-doped region521and an N-doped region522. The semiconductor substrate501may be a common semiconductor substrate, such as Si. There is an oxide layer502covering the surface of the semiconductor substrate501. The semiconductor substrate501may further include at least one MOS. For example, there is a complementary MOS560disposed on the semiconductor substrate501. The complementary MOS560includes a complimentary PMOS561and NMOS562, segregated by the insulating shallow trench isolation (STI)510.

In order to be fully compatible with the manufacturing process of conventional MOS, the elements in the photodiode structure of the present invention and the elements in the CMOS560may share some of the process features. For example, the P-type doped region521and the N-type doped region522in the photodiode structure of the present invention may be formed simultaneously with the formation of the CMOS560in the semiconductor substrate501by using the conventional ion implantation in accordance with convention dopants. In addition, the P-type doped region521and the N-type doped region522can be activated by a thermal diffusion step or an annealing step. When the P-type doped region521and the N-type doped region522are formed simultaneously with the CMOS560, the doping concentration of at least one of the P-doped region521and of the N-doped region522in the photodiode structure of the present invention is substantially the same as the doped regions of the CMOS560such as source or the drain.

Secondly, as shown inFIG. 6, the trench530is formed in the semiconductor substrate501and between the P-doped region521and the N-doped region522. For example, the location of the trench530is first defined by a convention photoresist, then some of the semiconductor substrate501is removed by etching to form the trench530.

Later, as shown inFIG. 7, the trench530is filled with a first semiconductor material531. The first semiconductor material531may be a common semiconductor substrate, such as Si, Ge or the combination thereof. For example, the trench530is filled with the first semiconductor material531by a conventional epitaxial procedure. Preferably, the first semiconductor material531is a mixture of Si and Ge and has a Ge concentration gradient. In such way, the mismatch problem with the lattice of the silicon-containing semiconductor substrate501can be effectively avoided.

In one preferred embodiment of the present invention, another second semiconductor material532is formed by an extended epitaxial growth procedure on the first semiconductor material531and protruding from the surface of the first semiconductor material531during the epitaxial growth procedure of the first semiconductor material531to receive the top incident light or the side incident light. The second semiconductor material532may be a common semiconductor substrate, such as Si, Ge or the combination thereof. Preferably, the second semiconductor material532may have a Ge concentration gradient inherited from the Ge concentration gradient of the first semiconductor material531.

After the process is finished as shown inFIG. 7, then as shown inFIG. 8, an interlayer dielectric540is formed to cover the semiconductor substrate501, the P-type doped region521, the N-type doped region522, the first semiconductor material531and the second semiconductor material532. Besides, in order to form the electrical contact, contact holes are formed to accommodate the P-type doped region plug551and the N-type doped region plug552. Optionally, on the surface of the P-type doped region521and the N-type doped region522a silicide, such as cobalt silicide or nickel silicide, may be formed in advance to decrease the surface resistance of the P-type doped region plug551to the P-type doped region521and of the N-type doped region plug552to the N-type doped region522.

As described above, the photodiode structure fabricated by the method of the present invention may receive light from different directions. For example, as illustrated inFIG. 8, the photodiode structure of the present invention may be useful in receiving the top incident light. On the other hand, the photodiode structure of the present invention may be also useful in receiving the side incident light.FIG. 9illustrates a preferred embodiment of the photodiode structure fabricated by the method of the present invention for receiving the side incident light. In the photodiode structure of the present invention, a waveguide270is additionally formed near the first semiconductor material531and by the second semiconductor material532for guiding and receiving the side incident light so that the photodiode structure fabricated by the method of the present invention may receive the top incident light, the side incident light or both.