Amplifying circuit

The present invention provides an amplifying circuit capable of accomplishing high-impedance input/output, and providing a high gain and low power consumption. The amplifier amplifies a signal received through an input terminal, and outputs the signal through an output terminal. A control circuit comprised of the inductors, and the switches turns input/output impedances of the amplifier into a high impedance.

CROSS-REFERENCE TO RELATED PATENT APPLICATIONS

The entire disclosure of Japanese Patent Application No. 2002-352664 filed on Dec. 4, 2002 including specification, claims, drawings and summary is incorporated herein by reference in its entirety.

FIELD OF THE INVENTION

The invention relates to an amplifying circuit for amplifying a high-frequency signal, and further to a gain-variable amplifying circuit including a plurality of the amplifying circuits.

PRIOR ART

A gain-variable amplifying circuit is an important circuit in a wireless communication system. With popularization of a mobile phone and an increase in a data transmission rate in a wireless LAN system for adaptation to a multi-media system, such a gain-variable amplifying circuit is now required to be able to operate with smaller power and control a gain more precisely.

FIG. 11is a circuit diagram of an example of a conventional gain-variable amplifying circuit.

The gain-variable amplifying circuit illustrated inFIG. 11is comprised of a variable attenuator91, and an amplifier92electrically connected in series to the variable attenuator91. The illustrated gain-variable amplifying circuit controls an amplification rate by varying attenuation of the variable attenuator91.

FIG. 12is a circuit diagram of another example of a conventional gain-variable amplifying circuit.

The gain-variable amplifying circuit illustrated inFIG. 12is comprised of a variable attenuator93, an amplifier94electrically connected in parallel to the variable attenuator93, and switches951and952through which one of the variable attenuator93and the amplifier94is selected.

When the switches951and952are electrically connected to terminals associated with the amplifier94, the amplifier94is selected (FIG. 12illustrates a condition where the amplifier94is selected). In contrast, when the switches951and952are electrically connected to terminals associated with the variable attenuator93, the variable attenuator93is selected

FIG. 13is a circuit diagram of still another example of a conventional gain-variable amplifying circuit, disclosed in Japanese Patent Application Publication No. 2001-345653.

The gain-variable amplifying circuit illustrated inFIG. 13is comprised of a plurality of amplifiers961to96N, and a demodulator97electrically connected in series to each of the amplifiers961to96N. Each of the amplifiers961to96Nis designed to have a gain different from gains of others.

In the illustrated gain-variable amplifying circuit, only an amplifier suitable for providing a desired gain is turned on, and other amplifiers are turned off. As a result, the gain-variable amplifying circuit transmits an output having a high impedance, and the amplifiers turned off are electrically separated from the demodulator97.

In the gain-variable amplifying circuit illustrated inFIG. 11, since the variable attenuator91is arranged in a first stage, a loss of the variable attenuator91harmfully influences a noise index, and hence, it would not be possible to have a better noise index.

In addition, since the amplifier92keeps carrying out amplification, power is consumed regardless of whether a desired amplification degree is high or low, power. For instance, even if an input is high and hence it is not necessary to have a high amplification degree, the amplifier92keeps carrying out amplification. Accordingly, in a device which operates with a battery having a limited lifetime, such as a mobile terminal, it would not be possible to extend a period of time during which the device is usable.

Since the gain-variable amplifying circuit illustrated inFIG. 12includes a plurality of switches (specifically, two switches), it is necessary to compensate for a loss caused by the switches by the amplifier94or an amplifier (not illustrated) arranged at a later stage in the gain-variable amplifying circuit. Thus, power consumption of the gain-variable amplifying circuit is increased.

In particular, a loss caused by the switches in a frequency band beyond a couple of GHz is quite high, and hence, power consumption necessary for having a desired gain would be further increased.

A frequency to which the gain-variable amplifying circuit illustrated inFIG. 13can be applied is equal to or smaller than a couple of tens of MHz, such as IF band. Each of the amplifiers961to96Nis designed to have a load resistance in the range of about 50 to about 200 ohms. However, since an impedance in an off-condition lowers because of parasitic capacity of a semiconductor device, when a frequency is over GHz, an amplifier(s) turned off cannot transmit an output having a sufficiently high impedance.

In order to broaden a variable range of a gain or to narrow a variable step of a gain, it would be necessary to increase a number of amplifiers electrically connected in parallel to one another. However, a signal is not transmitted to a next stage due to an impedance of an amplifier(s) turned off, resulting in reduction in a gain.

In view of the above-mentioned problems in the prior art, it is an object of the present invention to provide an amplifying circuit capable of accomplishing high-impedance input/output, and providing a high gain in low power consumption.

It is also an object of the present invention to provide a gain-variable amplifying circuit including a plurality of the above-mentioned amplifying circuits, having superior noise characteristics, and providing a broad band in which a gain is variable.

DISCLOSURE OF THE INVENTION

In order to accomplish the above-mentioned object, the present invention provides an amplifying circuit including an amplifier amplifying a signal received through an input terminal, and outputting the signal through an output terminal, and a control circuit turning at least one of an input impedance and an output impedance of the amplifier into a high impedance.

In the amplifying circuit in accordance with the present invention, the control circuit turns at least one of an input impedance and an output impedance of the amplifier into a high impedance. Hence, it would be possible to select one of electrical connection and disconnection without arranging a switch in a signal path, ensuring no loss caused by arranging a switch in a signal path.

For instance, the control circuit may be comprised of an inductor and a switch, in which case, the inductor and the switch may be electrically connected in series to each other, and further electrically connected in an AC manner between the input or output terminal and a grounded voltage.

The control circuit having the above-mentioned structure can cancel reduction in an impedance in a high-frequency band caused by a parasitic capacity of the amplifier, with the inductor.

For instance, the switch is comprised of a field effect transistor.

It is preferable that the inductor has an inductance resonating in parallel with a parasitic capacity of the amplifier.

The inductor which resonates in parallel with a parasitic capacity of the amplifier at a particular frequency cancels reduction in an impedance in a high-frequency band caused by a parasitic capacity of the amplifier.

For instance, the control circuit may be comprised of at least two transmission lines including at least a first transmission line electrically connected at one end thereof to the input or output terminal, and a second transmission line grounded at one end thereof, a total length of the at least two transmission lines being equal to K×S wherein K indicates an odd number, and S indicates a quarter of a wavelength of the signal, and a switch for selecting whether the input or output terminal is electrically connected to a grounded voltage through a transmission line having a length of K×S or through a transmission line having a length shorter than K×S.

It is preferable that the transmission line having a length shorter than K×S acts as an inductor having an inductance resonating in parallel with a parasitic capacity of the amplifier.

For instance, the amplifier may be comprised of two field effect transistors electrically connected in cascode to each other.

The amplifying circuit in accordance with the present invention may further include a field effect transistor electrically connected in series between the amplifier and a power source, in which case, the field effect transistor interrupts a current from flowing to the amplifying circuit from the power source when the amplifying circuit is off.

The amplifying circuit in accordance with the present invention may be constructed as a differential amplifying circuit, in which case, the amplifying circuit further includes a field effect transistor as a constant-current source between the amplifier and a grounded voltage.

The present invention further provides a gain-variable amplifying circuit comprising at least two amplifying circuits electrically connected in parallel to each other and having gains different from one another, the amplifying circuits each comprised of the above-mentioned amplifying circuits, wherein a gain is controlled by turning at least one of the input and output impedances of any one of the at least two amplifying circuits or an amplifying circuit(s) other than a selected amplifying circuit, into a high impedance.

INDICATION BY REFERENCE NUMERALS

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Preferred embodiments in accordance with the present invention will be explained hereinbelow with reference to drawings.

FIG. 1is a circuit diagram of a gain-variable amplifying circuit1000in accordance with an embodiment of the present invention. The gain-variable amplifying circuit1000in accordance with an embodiment of the present invention includes N amplifying circuits1001to100N(N indicates an integer equal to or greater than 2). The N amplifying circuits1001to100Nare electrically connected in parallel to one another between an input terminal IN and an output terminal OUT.

Input terminals of the amplifying circuits1001to100Nare electrically connected to the input terminal N, and output terminals of the amplifying circuits1001to100Nare electrically connected to the output terminal OUT.

The amplifying circuits1001to100Nare designed to have the same structure as one another, but have gains different from one another.

Control voltages Vc1to VcN applied to the amplifying circuits1001to100N, respectively, cause the amplifying circuits1001to100Nto have a high impedance. Furthermore, the control voltages Vc1to VcN make it possible to select whether the amplifying circuits1001to100Nare electrically connected to the input terminal IN and the output terminal OUT. Accordingly, it is possible for the gain-variable amplifying circuit1000to have a desired gain by selecting any one of the amplifying circuits1001to100Nand causing the selected amplifying circuit or other amplifying circuits to have a high impedance.

FIG. 2is a circuit diagram of a first example of the amplifying circuits1001to100Nas a part of the gain-variable amplifying circuit1000in accordance with an embodiment of the present invention.

An amplifying circuit100A in accordance with the first example is a single-end type amplifying circuit.

As illustrated inFIG. 2, the amplifying circuit100A is comprised of a first inductor201, a second inductor203, a third inductor204, a fourth inductor205, a fifth inductor206, a resistor202, a capacitor207, a first field effect transistor208, a second field effect transistor209, and a third field effect transistor210.

The first inductor201is electrically connected at one end to both the input terminal IN and an end of the resistor202, and at the other end to a gate of the first field effect transistor208and an end of the second inductor203.

The resistor202is electrically connected at the above-mentioned end thereof to the input terminal IN and an end of the first inductor201, and at the other end to a gate bias voltage Vgbias.

The second inductor203is electrically connected at the above-mentioned end thereof to the other and of the first inductor201and a gate of the first field effect transistor208, and at the other end to a drain of the second field effect transistor209.

The first field effect transistor208is electrically connected at a gate thereof to the other end of the first inductor201and the above-mentioned end of the second inductor203, and at a drain thereof to ends of the third inductor204, the fourth inductor205and the fifth inductor206, and grounded at a source thereof.

A control voltage Vc is applied to a gate of the second field effect transistor209. The second field effect transistor209is electrically connected at a drain thereof to the other end of the second inductor203, and grounded at a source thereof.

The third inductor204is electrically connected at an end thereof to ends of the fourth inductor205and the fifth inductor206and a drain of the first field effect transistor208, and at the other end to a drain of the third field effect transistor210.

A control voltage Vc is applied to a gate of the third field effect transistor210. The third field effect transistor210is electrically connected at a drain thereof to the other end of the third inductor204, and grounded at a source thereof.

The fifth inductor206is electrically connected at an end thereof to ends of the third inductor204and the fourth inductor205and a drain of the first field effect transistor208, and receives a power-source voltage Vdd at the other end thereof.

The fourth inductor205is electrically connected at an end thereof to ends of the third inductor204and the fifth inductor206and a drain of the first field effect transistor208, and at the other end to an end of the capacitor207and the output terminal OUT.

The capacitor207is electrically connected at the above-mentioned end thereof to the other end of the fourth inductor205and the output terminal OUT, and grounded at the other end thereof.

The first inductor201, the fourth inductor205, the fifth inductor206, and the capacitor207define an input/output matching circuit. In addition, the fifth inductor206acts also as a choke inductor. The resistor202applies a gate bias to an input signal.

The first field effect transistor208acts as a main amplifying device in the amplifying circuit100A. The control voltage Vc is used to turn on or off the amplifying circuit100A.

The second and third field effect transistors209and210both acting as a switching device and the second and third inductors203and204both for making resonation define a control circuit. The amplifying circuit100A is turned on or off by controlling the control circuit.

For instance, if the control voltage Vc is set a high level (for instance, the power-source voltage Vdd), and the gate bias voltage Vgbias is set equal to 0V, the amplifying circuit100A is turned off. As an alternative, if the control voltage Vc is set a low level (for instance, 0V), and the gate bias voltage Vgbias is set equal to an operational voltage, the amplifying circuit100A is turned on. Herein, the operational voltage is defined as a gate bias voltage at which the first field effect transistor208operates as an amplifier.

When the amplifying circuit100A is on, the amplifying circuit100A is electrically connected to both the input terminal IN and the output terminal OUT, and amplifies a signal received through the input terminal IN and transmits the amplified signal to the output terminal OUT.

When the amplifying circuit100A is off, the amplifying circuit100A has a high impedance in input and output thereof, and hence, the amplifying circuit100A is electrically separated from both the input terminal IN and the output terminal OUT.

FIG. 3shows a principle as to why the amplifying circuit100A illustrated inFIG. 2has a high impedance. Hereinbelow, the principle is explained with reference toFIG. 3.

FIG. 3(a) is a circuit diagram of an equivalent circuit of an input of the amplifying circuit100A in the case that the control signal Vc is set a high level to turn the second and third field effect transistors209and210are turned on, and the gate bias voltage Vgbias is set equal to 0V.FIG. 3(b) is a circuit diagram of an equivalent circuit of an output of the amplifying circuit100A in the same case.

InFIG. 3(a), an inductor301corresponds to the first inductor201, and an inductor303corresponds to the second inductor203. InFIG. 3(b), an inductor306, an inductor305, a capacitor307, and an inductor304correspond to the fifth inductor206, the fourth inductor205, the capacitor207, and the third inductor204, respectively.

InFIGS. 3(a) and3(b), since the gate bias voltage Vgbias is set equal to 0V, the first field effect transistor208is off. Hence, viewing from a gate of the first field effect transistor208(FIG. 3(a)) or viewing from a drain of the same (FIG. 3(b)), the circuits illustrated inFIGS. 3(a) and3(b) have a capacity equal to a gate or drain capacity of an intrinsic semiconductor of a device, that is, the capacitor320or321, respectively.

In the circuit illustrated inFIG. 3(a), the inductor303is designed to have such an inductance that the inductor303and the capacitor320resonate with each other in parallel. Similarly, in the circuit illustrated inFIG. 3(b), the inductor304is designed to have such an inductance that the inductor304and the capacitor321resonate with each other in parallel. Thus, it is possible to make input and output impedances high.

The capacitors320and321have a capacity dependent on a generation of a process and a gate size. For instance, the capacitors320and321have about 300 fF in a field effect transistor having a gate width of 300 micrometers. If a capacity is equal to about 300 fF, the inductors303and304in an amplifying circuit which operates at a frequency of 5 GHz have an inductance of about 3 nH. Inductors having such an inductance can be readily fabricated on an IC by wire arrangement.

When the amplifying circuit100A is on and carries out normal amplification, the second and third field effect transistors209and210are off. Since the second and third field effect transistors209and210are not arranged in a signal path between the input terminal IN and the output terminal OUT, a resistance during they are off is set high. Furthermore, a shunt parasitic capacity during they are off is set low, resulting in a high impedance. Accordingly, when the second and third field effect transistors209and210are off, the inductors303and304are in a floating condition.

As having been explained above, it is possible in the amplifying circuit100A to make an input/output impedance high in a high-frequency band beyond GHz order without arranging a switch into a signal path.

Thus, in the gain-variable amplifying circuit1000including the amplifying circuits1001to100N having the same structure as that of the amplifying circuit100A and electrically connected in parallel with one another, even if a range in which a gain varies is set broad or even if a step by which a gain varies is set narrow, it would be possible to maintain a high gain and a low noise indication.

Furthermore, since it is possible to maintain a high gain in the gain-variable amplifying circuit1000, even if a number of amplifying circuits electrically connected in parallel to one another is increased, it would be possible to avoid an increase in current consumption. In particular, the avoidance of an increase in current consumption is remarkable in a high-frequency band beyond GHz.

FIG. 4is a circuit diagram of a second example of the amplifying circuits1001to100Nas a part of the gain-variable amplifying circuit1000in accordance with the embodiment of the present invention.

The amplifying circuit100B illustrated inFIG. 4is structurally different from the amplifying circuit100A illustrated inFIG. 2in including a fourth field effect transistor400acting as a second amplifier. The first field effect transistor208acting as a first amplifier, and the fourth field effect transistor400are electrically connected in cascode to each other.

A first control voltage VcA is applied to a gate of the fourth field effect transistor400. The fourth field effect transistor400has a drain electrically connected to ends of the third inductor204, the fourth inductor205and the fifth inductor206, and a source electrically connected to a drain of the first field effect transistor208.

A second control voltage VcB is applied to each of gates of the second and third field effect transistors209and210.

The first and fifth field effect transistors208and400are main amplifying devices in the amplifying circuit100B.

The first and second control voltages VcA and VcB are used for turning on or off the amplifying circuit100B, and are complementary with each other.

The second and third field effect transistors209and210and the second and third inductors203and204define a control circuit. The amplifying circuit100B is turned on or off by controlling the control circuit.

For instance, if the first control voltage VcA is set a low level and the second control voltage VcB is set a high level, and the gate bias voltage Vgbias is set equal to 0V, the amplifying circuit100B is turned off. On the other hand, if the first control voltage VcA is set a high level and the second control voltage VcB is set a low level, and the gate bias voltage Vgbias is set equal to an operational voltage, the amplifying circuit100B is turned on. Herein, the operational voltage is defined as a gate bias voltage at which the first field effect transistor208operates as an amplifier.

When the amplifying circuit100B is on, the amplifying circuit100B is electrically connected to both the input terminal IN and the output terminal OUT, and amplifies a signal received through the input terminal IN and transmits the amplified signal to the output terminal OUT.

When the amplifying circuit100B is off, the amplifying circuit100B has a high impedance in input and output thereof, and hence, the amplifying circuit100B is electrically separated from both the input terminal IN and the output terminal OUT.

A principle in accordance with which the amplifying circuit100B is in a high-impedance condition is identical with the principle in accordance with which the amplifying circuit100A illustrated inFIG. 2is in a high-impedance condition.

In the amplifying circuit100B, since the field effect transistors208and400are electrically connected in cascode to each other, a capacity between the input terminal IN and the output terminal OUT is smaller than the same in the amplifying circuit100A, ensuring that the amplifying circuit100B can operate in a higher frequency band than the same of the amplifying circuit100B illustrated inFIG. 2.

FIG. 5is a circuit diagram of a third example of the amplifying circuits1001to100Nas a part of the gain-variable amplifying circuit1000in accordance with the embodiment of the present invention.

The amplifying circuit100C illustrated inFIG. 5is structurally different from the amplifying circuit100B illustrated inFIG. 4in further including a fifth field effect transistor401acting as a current breaker.

The fifth field effect transistor401is electrically connected in series between the matching inductor206and the power-source voltage Vdd. Specifically, the fifth field effect transistor401has a gate to which a second control voltage VcB is applied, a drain to which the power-source voltage Vdd is applied, and a source electrically connected to an end of the fifth inductor206.

The fifth field effect transistor401interrupts a current flow from the power source to the amplifying circuit100C, when the amplifying circuit100C is off.

FIG. 6is a circuit diagram of a fourth example of the amplifying circuits1001to100Nas a part of the gain-variable amplifying circuit1000in accordance with the embodiment of the present invention.

The amplifying circuit100D illustrated inFIG. 6is structurally different from the amplifying circuit100C illustrated inFIG. 5in the amplifying circuit100D is comprised of a differential amplifying circuit, and in further including a sixth field effect transistor613acting as a constant-current source.

The amplifying circuit100D has a basic circuit structure identical with that of the amplifying circuit100C illustrated inFIG. 5. However, the parts constituting the amplifying circuit100C are replaced with other parts as follows in the amplifying circuit100D except the fifth field effect transistor401.

The first inductor201is replaced with a pair of inductors601aand601barranged in parallel with each other. The resistor202is replaced with a pair of resistors602aand602belectrically connected to the inductors601aand601b,respectively. The second inductor203is replaced with a pair of inductors603aand603b.The second field effect transistor209is replaced with a pair of field effect transistors609aand609b.

The fifth inductor206is replaced with a pair of inductors606aand606b.The fourth field effect transistor400is replaced with a pair of field effect transistors611aand611b.The first field effect transistor208is replaced with a pair of field effect transistors608aand608b.The third inductor204is replaced with a pair of inductors604aand604b.The third field effect transistor210is replaced with a pair of field effect transistors610aand610b.

The fourth inductor205is replaced with a pair of inductors605aand605b.The capacitor207is replaced with a pair of capacitors607aand607b.

The sixth field effect transistor613is arranged between sources of the first field effect transistors608aand608bboth acting as an amplifier, and a grounded voltage. Specifically, the sixth field effect transistor613has a gate to which a gate bias voltage Vs as an operational voltage is applied, a drain electrically connected to sources of the first field effect transistors608aand608b,and a source grounded.

When the gate bias voltage Vgbias applied to the gates of the first field effect transistors608aand608b,and the gate bias voltage Vs applied to the gate of the sixth field effect transistor613are set equal to an operational voltage, and the control voltage VcA is set equal to a high level, the fourth field effect transistors211aand211band the fifth field effect transistor401are turned on, and the second field effect transistors609aand609band the third field effect transistors610aand610bare turned off. As a result, the second inductors603aand603band the third inductors604aand604are put into a floating condition, and hence, the amplifying circuit100D carries out amplification.

In contrast, when the control voltage VcA is set equal to a low level, the fourth field effect transistor611aand611band the fifth field effect transistor401are turned off, and the second field effect transistors609aand609band the third field effect transistors610aand610bare turned on. The second inductors603aand603band the third inductors604aand604bare grounded, and resonate in parallel with capacities of the second field effect transistors609aand609band the third field effect transistors610aand610b.As a result, the amplifying circuit100D has a high input/output impedance.

FIG. 7is a circuit diagram of a fifth example of the amplifying circuits1001to100Nas a part of the gain-variable amplifying circuit1000in accordance with the embodiment of the present invention.

The amplifying circuit100E illustrated inFIG. 7is comprised of transmission lines.

As illustrated inFIG. 7, the amplifying circuit100E is comprised of a first transmission line721, a second transmission line722, a third transmission line723, a first field effect transistor720, a second field effect transistor724, a third field effect transistor725, and an output matching circuit726.

The first transmission line721is connected at one end thereof to the input terminal IN, and at the other end thereof to an end of the second transmission line722and a gate of the first field effect transistor720.

The second transmission line722is connected at one end thereof to the other end of the first transmission line721and a gate of the first field effect transistor720, and at the other end thereof to drains of the second and third field effect transistors724and725.

The third transmission line723is connected at one end thereof to a source of the second field effect transistor724, and at the other end thereof grounded.

The first field effect transistor720has a gate electrically connected to the other end of the first transmission line721and one end of the second transmission line722, a drain electrically connected to the output terminal OUT through the output matching circuit726, and a source grounded.

The second field effect transistor724has a gate to which a second control voltage VcB is applied, a drain electrically connected to the other end of the second transmission line722and a drain of the third field effect transistor725, and a source electrically connected to one end of the third transmission line723.

The third field effect transistor725has a gate to which a first control voltage VcA is applied, a drain electrically connected to the other end of the second transmission line722and a drain of the second field effect transistor724, and a source grounded. The first and second control voltages VcA and VcB are complementary with each other.

The first transmission line721matches inputs, and the output matching circuit726matches outputs. The first field effect transistor720acts as a main amplifying device in the amplifying circuit100E.

The second transmission line722has a length shorter than a quarter (¼) of a wavelength of a signal to which the amplifying circuit100E is applied. Thus, the second transmission line722acts as an inductor. The length of the second transmission line722is designed to be such a length that an inductance of the second transmission line722and a gate capacity of the first field effect transistor720resonate in parallel with each other.

Each of the second and third transmission lines722and723is designed to have such a length that a total of the length of them is equal to a quarter (¼) or K quarter (K/4) of a wavelength of a signal to which the amplifying circuit100E is applied, wherein K indicates an odd number.

For simplification, an operation of the amplifying circuit100E is explained hereinbelow only with respect to inputs thereof.

Each of the second and third field effect transistors724and725defines a single-pole single-throw (SPST) switch. The second and third field effect transistors724and725are controlled by the first and second control voltages VcA and VcB which are complementary with each other, respectively.

When the first control voltage VcA is set a high level, and the second control voltage VcB is set a low level, the second field effect transistor724is off, and the third field effect transistor725is on. Thus, the third transmission line723is electrically separated from the amplifying circuit100E, and the second transmission line722is directly grounded. Since the second transmission line722has a length shorter than a quarter of the wavelength, the second transmission line722acts as an inductor, and further since an inductance of the inductor is designed to resonate in parallel with a gate capacity of the first field effect transistor720, the amplifying circuit100E is in a high-impedance condition, when viewed from the input terminal IN.

In contrast, when the first control voltage VcA is set a low level, and the second control voltage VcB is set a high level, the second field effect transistor724is on, and the third field effect transistor725is off. Thus, the third transmission line723is electrically connected to the second transmission line722through the second field effect transistor724.

Since a total length of the second and third transmission lines722and723is equal to a quarter of the wavelength of the signal, and the third transmission line723is grounded at the other end, the impedance is infinite, resulting in that the second and third transmission lines722and723seems to have an infinite impedance, when viewed from a gate of the first field effect transistor720. The second and third transmission lines722and723which seem to have an infinite impedance do not exert any influence on a gate of the first field effect transistor720. Accordingly, the amplifying circuit100E normally carries out amplification without being influenced by the second and third transmission lines722and723.

It is necessary to set a gate bias voltage such that the first field effect transistor720does not carry out amplification, when the first control voltage VcA is set a high level, and the second control voltage VcB is set a low level.

Hereinbelow, the above-mentioned amplifying circuits100A to100E are compared with a conventional amplifying circuit with respect to performances.

FIG. 8(a) is a circuit diagram of a gain-variable amplifying circuit including any one of the above-mentioned amplifying circuits100A to100E, andFIG. 8(b) is a circuit diagram of a conventional gain-variable amplifying circuit.

The gain-variable amplifying circuit illustrated inFIG. 8(a) is comprised of an amplifying circuit832, an amplifying circuit830electrically connected in series to an output of the amplifying circuit832, and an attenuator831electrically connected in series to an output of the amplifying circuit832and in parallel with the amplifying circuit830.

The amplifying circuit830is designed to define a resonance circuit comprised of a gate capacity of a field effect transistor acting as an amplifier, and an inductor, by switching a field effect transistor acting as a switch. When the amplifying circuit830defines the resonance circuit, the amplifying circuit830would have a high impedance in input/output thereof, resulting in that the amplifying circuit830is electrically separated from the gain-variable amplifying circuit.

Specifically, the amplifying circuit830is comprised of any one of the above-mentioned amplifying circuits100A to100E.

The gain-variable amplifying circuit illustrated inFIG. 8(b) is comprised of, similarly to the gain-variable amplifying circuit illustrated inFIG. 8(a), an amplifying circuit832, an amplifying circuit830electrically connected in series to an output of the amplifying circuit832, and an attenuator831electrically connected in series to an output of the amplifying circuit830and in parallel with an amplifying circuit833.

Unlike the amplifying circuit830, the amplifying circuit833is designed to be electrically connected to the gain-variable amplifying circuit by turning on a field effect transistor acting as a switch and arranged in a signal path.

It is assumed that the gain-variable amplifying circuits illustrated inFIGS. 8(a) and8(b) are applied to a signal having a frequency in a 5 GHz band, and are designed to have a predetermined inductance.

FIG. 9is a graph showing a relation between a frequency and a gain in the gain-variable amplifying circuits illustrated inFIGS. 8(a) and8(b).

FIG. 9shows the gain characteristic found when the amplifying circuits830and833are electrically connected to the gain-variable amplifying circuit (high-gain operation), and the gain characteristic found when the amplifying circuits830and833are electrically separated from the gain-variable amplifying circuit (low-gain operation).

FIG. 10is a graph showing a relation between a frequency and a noise indication in the gain-variable amplifying circuits illustrated inFIGS. 8(a) and8(b).

InFIGS. 9 and 10, the characteristic of the gain-variable amplifying circuit illustrated inFIG. 8(a) is shown with a solid line, and the characteristic of the gain-variable amplifying circuit illustrated inFIG. 8(b) is shown with a broken line.

With reference toFIG. 9, a gain in the high-gain operation in the gain-variable amplifying circuit illustrated inFIG. 8(a) is higher by about 5 dB than the same in the gain-variable amplifying circuit illustrated inFIG. 8(b).

With reference toFIG. 10, a noise indication in the gain-variable amplifying circuit illustrated inFIG. 8(a) is lower by about 0.2 dB than the same in the gain-variable amplifying circuit illustrated inFIG. 8(b). This is because there is caused a loss due to a signal in a field effect transistor arranged in a signal path as a switch, in the gain-variable amplifying circuit illustrated inFIG. 8(b). If the loss is compensated for by increasing a gain of the gain-variable amplifying circuit, current consumption would be increased by about 50%. In other words, the gain-variable amplifying circuit illustrated inFIG. 8(a) can reduce power consumption by 50% in comparison with the gain-variable amplifying circuit illustrated inFIG. 8(b).

With reference toFIG. 9, a gain in the low-gain operation in the gain-variable amplifying circuit illustrated inFIG. 8(a) is almost equal to the same in the gain-variable amplifying circuit illustrated inFIG. 8(b). This is because the amplifying circuits830and833are sufficiently electrically separated from the gain-variable amplifying circuit. That is, the amplifying circuit is in a high-impedance condition with respect to input/output thereof.

INDUSTRIAL APPLICABILITY

In accordance with the present invention, the control circuit makes input and/or output impedances high. Hence, it would be possible to switch electrical connection to disconnection and vice versa without arranging a switch into a signal path. Furthermore, it would be possible to accomplish a high gain in low power consumption without a loss caused by arranging a switch into a signal path.

In addition, since it is possible to cancel reduction in an impedance in a high-frequency band, caused by a parasitic capacity in an amplifying device, with an inductance device, it would be possible to accomplish a high impedance in a high-frequency band. Furthermore, since it is possible to cancel reduction in an impedance with an inductance device which resonate in parallel with a parasitic capacity at a certain frequency, it would be possible to accomplish a high impedance at the certain frequency.

The gain-variable amplifying circuit in accordance with the present invention makes input/output impedance high, when an amplifying circuit(s) constituting the gain-variable amplifying circuit is(are) not selected. Hence, it is possible to maintain a high gain, regardless of a number of amplifying circuits electrically connected in parallel with one another, ensuring that there are accomplished a high gain, a low noise indication, and low current consumption, even in a broad band in which a gain varies, or even at a narrow step by which a gain varies.