Semiconductor device, method for manufacturing the same, circuit substrate and electronic device

The invention provides highly reliable semiconductor devices, methods for manufacturing the same, circuit substrates and electronic devices. A semiconductor substrate is provided that includes: an integrated circuit and a pad defining a through hole electrically connected to the integrated circuit. A convex section is formed at a first surface where the pad is formed in a region that overlaps the through hole in the semiconductor substrate. A dielectric layer is formed on an inner surface of the convex section. An electrical connection section is provided having a conductive section disposed inside the dielectric layer and a wiring section disposed on the first surface to be electrically connected to the conductive section. An end surface of the conductive section is exposed through a second surface of the semiconductor substrate on the opposite side of the first surface.

BACKGROUND OF THE INVENTION

1. Field of Invention

The present invention relates to semiconductor devices and methods for manufacturing the same, circuit substrates and electronic devices.

2. Description of Related Art

The related art includes semiconductor devices provided in a three-dimensional mounting configuration. Electrodes can be formed in semiconductor substrates to enable the three-dimensional mounting. In order to stack a plurality of semiconductor substrates in layers, electrodes on each of the semiconductor substrates are preferably formed into shapes that are suitable for electrical connections. Japanese Laid-Open Patent Application 2001-135780 discloses a related art method and apparatus.

SUMMARY OF THE INVENTION

The present invention provides semiconductor devices that have enhanced mountability, methods for manufacturing the same, circuit substrates and electronic devices.

A method for manufacturing a semiconductor device in accordance with the present invention includes:(a) preparing a semiconductor substrate including an integrated circuit, and a pad defining a through hole electrically connected to the integrated circuit;(b) forming a convex section at a first surface where the pad is formed in a region that overlaps the through hole in the semiconductor substrate;(c) forming a dielectric layer on an inner surface of the convex section;(d) forming an electrical connection section having a conductive section disposed inside the dielectric layer and a wiring section disposed on the first surface to be electrically connected to the conductive section; and(e) exposing an end surface of the conductive section through a second surface of the semiconductor substrate on the opposite side of the first surface.

According to the present invention, the electrical connection section includes a conductive section and a wiring section. The conductive section is formed within a pad region, such that a space to independently form the convex sections do not have to be secured, and therefore the conductive sections can be formed with a reduced or minimized space. Also, since the electrical connection section includes the wiring section that is electrically connected to the conductive section, electrical connections can be made in places that are different from the positions of the pads, even when each conductive section is formed within the pad region. Accordingly, by stacking semiconductor devices having mutually different pad arrangements, a semiconductor device that has enhanced mountability and yet allows electrical connections can be manufactured.

In the method for manufacturing a semiconductor device, in step (d), the conductive section and the wiring section may be formed collectively. Accordingly, the efficiency in manufacturing a semiconductor device can be enhanced.

In the method for manufacturing a semiconductor device, in step (d), the conductive section and the wiring section may be formed in one piece. Accordingly, a highly reliable semiconductor device can be manufactured.

In the method for manufacturing a semiconductor device, in step (d), the electrical connection section may be formed to have a convex section above the through hole.

In the method for manufacturing a semiconductor device, in step (d), the electrical connection section may be formed such that the wiring section has a land. Accordingly, a semiconductor device that is highly reliable in its electrical connection can be manufactured.

In the method for manufacturing a semiconductor device, in step (d), the electrical connection section may be formed such that a surface of the land is flat. Accordingly, a semiconductor device that is highly reliable in its electrical connection can be manufactured.

In the method for manufacturing a semiconductor device, in step (d), the electrical connection section may be formed such that an external configuration of the land is larger than the tip surface of the conductive section. Accordingly, a semiconductor device that is highly reliable in its electrical connection can be manufactured.

In the method for manufacturing a semiconductor device, step (d) may include:(d1) forming a patterned resist on the first surface; and(d2) forming the electrical connection section in a portion that is exposed through the resist.

In the method for manufacturing a semiconductor device, in step (e), a tip section of the conductive section may be made to protrude from the second surface. Accordingly, a semiconductor device that is difficult to have short circuit when stacked in layers and is highly reliable in its electrical connection can be manufactured.

In the method for manufacturing a semiconductor device, in step (e), the semiconductor substrate may be a semiconductor wafer having a plurality of integrated circuits formed thereon, and the convex section may be formed for each of the integrated circuits, and the method may further include: cutting the semiconductor substrate after step (e).

Accordingly, a plurality of semiconductor devices can be collectively manufactured, such that the efficiency in manufacturing semiconductor devices can be improved.

A method for manufacturing a semiconductor device includes: stacking and electrically connecting, through the electrical connection sections, a plurality of semiconductor devices that are manufactured by the method described above. In accordance with the present invention, semiconductor devices that have enhanced mountability are stacked in layers, such that a semiconductor device with a high electrical reliability can be manufactured.

A semiconductor device in accordance with the present invention is manufactured by the method described above.

A semiconductor device in accordance with the present invention includes:a semiconductor substrate including:an integrated circuit, and a pad defining a first through hole electrically connected to the integrated circuit;a second through hole that penetrates the semiconductor substrate and is formed in a region that overlaps the first through hole in the semiconductor substrate;a dielectric layer formed on an inner surface of the second through hole; andan electrical connection section including:a conductive section that passes inside the dielectric layer and penetrates the semiconductor substrate, and a wiring section that is electrically connected to the conductive section and disposed on a surface of the semiconductor substrate where the pad is formed.

The present invention can therefore provide a semiconductor device that includes an electrical connection section that allows semiconductor substrates having mutually different pad arrangements to be stacked in layers and electrically connected in a reduced or minimized space, and therefore has enhanced mountability.

In the semiconductor device, the conductive section and the wiring section may be formed in one piece. Accordingly, a highly reliable semiconductor device can be provided.

In the semiconductor device, a convex section may be formed in the electrical connection section above the first through hole.

In the semiconductor device, the wiring section may include a land. Accordingly, a semiconductor device that is highly reliable in its electrical connection can be provided.

In the semiconductor device, a surface of the land may be a flat surface. Accordingly, a semiconductor device that is highly reliable in its electrical connection can be provided.

In the semiconductor device, an external configuration of the land may be larger than a tip surface of the conductive section. Accordingly, a semiconductor device that is highly reliable in its electrical connection can be provided.

In the semiconductor device, a tip section of the conductive section may protrude from a surface of the semiconductor substrate on the opposite side of a surface thereof where the pad is formed. Accordingly, a highly reliable semiconductor device that is difficult to have short circuit when stacked in layers can be provided.

A semiconductor device in accordance with the present invention may include a plurality of stacked semiconductor devices described above. The plurality of semiconductor devices can be stacked in layers and electrically connected through the electrical connection sections. According to the present invention, a highly reliable semiconductor device in which semiconductor devices that are excellent in mountability are stacked in layers can be provided.

A circuit substrate in accordance with the present invention has the semiconductor device described above mounted thereon.

An electronic device in accordance with the present invention has the semiconductor device described above.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

Exemplary embodiments of the present invention are described below with reference to the accompanying drawings. However, the present invention is not limited to the exemplary embodiments described below.

FIG. 1throughFIG. 6are schematics describing a method for manufacturing a semiconductor device in accordance with an exemplary embodiment of the present invention. First, a semiconductor substrate10(seeFIG. 1) is prepared. The semiconductor substrate10may be prepared in the state of a semiconductor chip, or may be prepared in the state of a semiconductor wafer. At least one (one on a semiconductor chip, a plurality on a semiconductor wafer) integrated circuit (for example, a circuit having transistors and memories)12is formed on the semiconductor substrate10.

A plurality of pads14are formed on the semiconductor substrate10. Each of the pads14is electrically connected to the integrated circuit12. The pad14may be referred to as an electrode pad. The pad14may be formed from aluminum. The plan configuration of the pad14is not particularly limited, but may generally be rectangular. When the semiconductor substrate10is defined in a semiconductor wafer, two or more (each one group) pads14are formed in each region that becomes each of plural semiconductor chips.

One layer or more layers of dielectric films may be formed on the semiconductor substrate10. In the example shown inFIG. 1, dielectric films16and18are formed on the semiconductor substrate10. The pad14and a wiring (not shown) for electrically connecting the integrated circuit12and the pad14may be formed on the dielectric film16. Also, the other dielectric film18may be formed on the dielectric film16in a manner to avoid at least a part of the surface of the pad14. The dielectric film18may be formed to cover the surface of the pad14, and then a part thereof may be etched to expose a part of the pad14. Either dry etching or wet etching may be used for the etching. The dielectric film16may be formed from an oxide film. Also, the dielectric film18may be referred to as a passivation film, and may be formed from SiN, SiO2, polyamide resin, or the like.

A through hole20is formed in the pad14. The through hole20may be formed in a region of the pad14, which is exposed through the dielectric film18. The through hole20may be formed by, for example, etching (dry etching or wet etching). The etching may be conducted after a resist (not shown) that is patterned by a lithography process is formed. Alternatively, a laser beam (for example, CO2laser, YAG laser, or the like) may be used to form the through hole20. However, the semiconductor substrate10may be formed by using pads14having through holes20formed in advance. When the dielectric film16is formed below the pad14, a through hole21is also formed therein (seeFIG. 1). The through hole21may be formed in the same step that forms the through hole20.

Next, as indicated inFIG. 2, a convex section30is formed in the semiconductor substrate10. The convex section30is formed in a region that overlaps the through hole20in the semiconductor substrate10. In other words, the convex section30is formed in a portion of the semiconductor substrate10which is exposed through the through hole20. Also, the convex section30is formed in a surface (first surface32) of the semiconductor substrate10on which the pad14is formed. In order to form the convex section30, a process similar to the process of forming the through hole20in the pad14may be used. Also, the through holes20and21and the convex section30may be successively formed. The through holes20and21and the convex section30in combination may be defined as a convex section. By the method for manufacturing the semiconductor device in accordance with the present exemplary embodiment, the convex section30is formed in a region of the pad14. Accordingly, since there is no need to independently secure another space to form the convex section on the semiconductor substrate10, the convex section30can be formed with a reduced or minimized space, and a semiconductor device that is high in the degree of freedom in routing a wiring section54to be described below and that has enhanced mountability can be manufactured.

Next, as indicated inFIG. 3, a dielectric layer40is formed on an inner surface of the convex section30. The dielectric layer40may be an oxide film. For example, when base material of the semiconductor substrate10is Si, the dielectric layer40may be SiO2or SiN. The dielectric layer40is formed on an inner wall surface of the convex section30. The dielectric layer40may be formed on an inner wall surface of the through hole21in the dielectric film16. The dielectric layer40may be formed on the dielectric film (passivation film)18. The dielectric layer40may be formed on an inner wall surface of the through hole20of the pad14. The dielectric layer40is formed in a manner to avoid a part of the pad14(for example, its upper surface). By this, the pad14can be electrically connected to an electrical connection section50to be described below. The dielectric layer40may be formed to cover the entire surface of the pad14, and a part thereof may be etched (dry etched or wet etched) to expose a part of the pad14. The etching may be conducted after forming a resist (not shown) that is patterned by a lithography process.

Next, an electrical connection section50is formed on the semiconductor substrate10. The electrical connection section50may be formed by, for example, forming a patterned resist56(see FIG.4(A)), and forming an electrical connection section50in a portion that is exposed through the resist56(seeFIG. 4(B)). More specifically, for example, a conductive film (not shown) is formed by sputtering or electroless plating over the first surface32, and then the patterned resist56is formed (FIG. 4(A)). The resist56may be patterned by a lithography process. Thereafter, electroplating may be conducted to form the electrical connection section50(seeFIG. 4(B)). Lastly, the electrical connection section50may be formed through removing a part of the conductive film and the resist56. However, the process of forming the electrical connection section50is not limited to the above; and for example, any one of related art or known methods, such as, for example, an ink jet method may be used. The material of the electrical connection section50is not particularly limited, and may be formed from, for example, Cu.

The electrical connection section50is formed to have a conduction section52and a wiring section54. The conductive section52is disposed inside the dielectric layer40. Further, the wiring section54is disposed over the first surface32in a manner to be electrically connected to the conductive section52. Consequently, the conductive section52is formed within the convex section20in the region of the pad14in the semiconductor substrate10. As described above, due to the fact that the convex section20is formed in the region of the pad14, the degree of freedom in routing the wiring section54can be increased. Further, because the wiring section54allows the electrical connection section50to be electrically connected at a position different from the pad14, semiconductor substrates having mutually different pad arrangements can be stacked in layers, and electrically connected to one another. Consequently, by forming the electrical connection section50in the semiconductor substrate10, a semiconductor device having enhanced mountability can be manufactured.

The conductive section52and the wiring section54may be collectively formed. By this, the efficiency in manufacturing the semiconductor device can be enhanced. Also, the conductive section52and the wiring section54may be formed in one piece. By this, a semiconductor device that is highly reliable in its electrical connection can be manufactured. Also, the electrical connection section50may be formed with a convex section53provided above the through hole20(seeFIG. 4(B)). Electrical connection to the electrical connection section50can be readily made because it has the wiring section54, even when the convex section53is provided above the through hole20. However, the electrical connection section50may be formed in a manner that a portion thereof above the through hole20is flat.

The electrical connection section50may be formed such that the wiring section54has a land55(seeFIG. 6). As a consequence, when a plurality of semiconductor substrates10are stacked in layers, mutual electrical connection among the electrical connection sections50can be readily made. Accordingly, a highly reliable semiconductor device can be manufactured. The electrical connection section50may be formed in a manner that the surface of the land55becomes flat. For example, the land55may be formed on a flat portion in the first surface32of the semiconductor substrate10, and its surface may be formed to become flat. Alternatively, the electrical connection section50may be formed in a manner that the external configuration of the land55becomes larger than the tip surface of the conductive section52. As a consequence, a semiconductor device with a greater reliability can be manufactured.

Next, as indicated inFIG. 5, the tip surface51of the conductive section52is exposed through a second surface34on the opposite side of the first surface32of the semiconductor substrate10. By this, the two surfaces of the semiconductor substrate10can be electrically connected through the electrical connection section50. For example, the tip surface51can be exposed by mechanically polishing the second surface34, or removing a part of the second surface34by etching. Alternatively, both mechanical polishing and etching can be used to expose the tip surface51. In this instance, since the convex section30penetrates the semiconductor substrate10, the through hole60is formed in the semiconductor substrate10. Further, by removing a part of the dielectric layer40, the tip surface51of the conductive section52may be exposed. A part of the dielectric layer40may be removed by etching. As indicated inFIG. 5, the tip portion58of the conductive section52may be made to protrude from the second surface34. By this, when a plurality of semiconductor substrates10are stacked in layers, short circuits can be reduced or prevented, and a stacked-layered type semiconductor device with a high electrical reliability can be manufactured.

By the steps described above, the semiconductor device1can be manufactured (seeFIG. 5). When a semiconductor wafer is used as the semiconductor substrate10, the semiconductor device1may be manufactured through cutting the semiconductor wafer into individual segments in the end.

The semiconductor device1includes the semiconductor substrate10. The semiconductor substrate10includes an integrated circuit12, and a pad14having a through hole (first through hole)20formed therein and electrically connected to the integrated circuit12. The semiconductor device1includes a through hole (second through hole)60that penetrates the semiconductor substrate10. In other words, the through hole (second through hole)60is formed in the semiconductor substrate10. The through hole60is formed in a region that overlaps the through hole (first through hole)20in the semiconductor substrate10. The semiconductor device1includes a dielectric layer40that is formed on an inner surface of the through hole60. The semiconductor device1includes an electrical connection section50. The electrical connection section50includes a conductive section52that passes inside the dielectric layer40and penetrates the semiconductor substrate10, and a wiring section54that is electrically connected to the conductive section52and disposed on a surface (first surface32) of the semiconductor substrate10on which the pad14is formed. The other compositions are equal to the contents obtained through the manufacturing method described above.

As indicated inFIG. 6, a semiconductor device100having a stacked-layered semiconductor device1may be manufactured by stacking a plurality of the semiconductor devices1in layers, and electrically connecting them through the electrical connection sections50. The present exemplary embodiment is effective in conducting such a three dimensional mounting, because the semiconductor device1includes the electrical connection section50having the conductive section52and the wiring section54. In particular, when semiconductor substrates having mutually different pad arrangements are stacked in layers, the electrical connection sections50allow them to be electrically connected to one another. When the wiring section54includes a land55, the tip surface51of the conductive section52of one semiconductor device1and the land55of the wiring section54of another semiconductor device1may be opposed to each other and electrically connected to each other. By this, a highly reliable semiconductor device100can be manufactured.

The semiconductor device100may include a wiring substrate90. The stacked-layered semiconductor device1may be mounted on the wiring substrate90. A plurality of wirings92and external terminals94may be formed on the wiring substrate90. As a result, a semiconductor device100that is easy to mount on a circuit substrate, etc., can be provided. Furthermore, dielectric layers (not shown) (that may have a stress relieving function) may be formed between the semiconductor devices1stacked in layers. By this, a highly reliable semiconductor device100can be formed.FIG. 7shows a circuit substrate1000on which the semiconductor device100in accordance with the exemplary embodiment of the present invention is mounted. Also, as electronic devices having the semiconductor device in accordance with the exemplary embodiment of the present invention, a notebook type personal computer2000is shown inFIG. 8, and a portable telephone3000is shown inFIG. 9.

The present invention is not limited to the exemplary embodiments described above, and many modifications can be made. For example, the present invention may include compositions that are substantially the same as the compositions described in the exemplary embodiments (for example, a composition that has the same or similar functions, the same or similar methods and the results, or a composition that has the same or similar advantages and effects). Also, the present invention includes compositions in which portions not essential in the compositions described in the exemplary embodiments are replaced with others. Also, the present invention includes compositions that achieve the same or similar functions and effects or achieve the same or similar advantages as those of the compositions described in the exemplary embodiments. Furthermore, the present invention includes compositions that include related art or known technology added to the compositions described in the exemplary embodiments.