Method and apparatus for supplying voltage to amplifier using multiple linear regulators

Various embodiments disclose a method and a device. The device includes: an antenna; a switching regulator; a communication chip including an amplifier, a first linear regulator operably connected to the amplifier and the switching regulator and configured to be supplied with a first voltage from the switching regulator, and a second linear regulator operably connected to the amplifier and the switching regulator and configured to be supplied with a second voltage higher than the first voltage from the switching regulator, the communication chip configured to transmit a radio-frequency signal outside of the electronic device through the antenna; and a control circuit. The control circuit is configured to produce an envelope of an input signal input to the amplifier in connection with the radio-frequency signal and to provide the produced envelope to at least one of the first linear regulator or the second linear regulator. The first linear regulator is configured to provide a third voltage corresponding to the envelope to the amplifier using the first voltage based on the envelope having a voltage in a first range. The second linear regulator is configured to provide a fourth voltage higher than the third voltage to the amplifier using the second voltage based on the voltage of the envelope being in a second range including values larger than values included in the first range.

CROSS-REFERENCE TO RELATED APPLICATION

This application is based on and claims priority under 35 U.S.C. § 119 to Korean Patent Application No. 10-2019-0153306, filed on Nov. 26, 2019, in the Korean Intellectual Property Office, the disclosure of which is incorporated by reference herein in its entirety.

BACKGROUND

Field

The disclosure relates to a method and an apparatus for providing a voltage to an amplifier using multiple linear regulators.

Description of Related Art

Wireless communication systems have been developed to support higher data transmission rates in order to satisfy the ever-increasing wireless data traffic demands. Supporting high data transmission rates requires wide signal bandwidths and complicates signal modulation schemes, thereby increasing the peak-to-average power ratio (PAPR). Therefore, power amplifiers, which consume a large amount of power inside electronic devices, are being developed to have high-efficiency and high-linearity characteristics.

An envelope tracking (ET) technology may be applied to ensure high-efficiency and high-linearity characteristics with regard to wideband and high-PAPR signals. The ET technology refers to a technology wherein the envelope signal of an RF input signal applied to an amplifier (for example, RF power amplifier) is applied as a power-supply voltage of the amplifier, thereby reducing power consumption. According to the ET technology, the envelope signal is adjusted such that the voltage Vcc applied to the amplifier tracks the envelope of the RF signal, and power consumption is accordingly reduced, thereby enabling the amplifier to operate more efficiently. During signal amplification, the amplifier produces a third-order intermodulation distortion (IMD3), and the IMD3 may have a sweet spot point. The ET technology, if applied to the amplifier, may ensure highly linear characteristics through Vcc shaping which enables the same to track a sweet spot.

The transmission rate of wireless communication systems has rapidly increased in line with their evolution from 3rdgeneration (3G) to 4G, and differential services in mobile service markets have been actively developed. However, mobile communication networks have evolved beyond the same, and there has been strenuous domestic/international research on new 5G mobile communication, such as enhanced mobile broadband (eMBB), ultra-reliable & low-latency communication (URLLC), or massive machine-type communication (mMTC).

Actual implementation of 5G mobile communication may be divided into Sub6 5G and mmWave 5G. Compared with 4G LTE signals, Sub6 5G and mmWave 5G may have more complicated signal modulation schemes for the sake of super-fast data transmission, the rate of which increases in proportion to the frequency, and this may result in a wider bandwidth and a larger PAPR. A wider signal bandwidth makes it difficult to develop a modulator capable of tracking the same. However, the efficiency of the RF power amplifier decreases in the course of transmitting a signal having a large PAPR. Accordingly, the ET technology is applicable. For such reasons, developers of RF system chipset solutions and ET modulators are devoted to developing wideband ET modulators such that the ET technology can be applied to 5G.

SUMMARY

Embodiments of the disclosure provide a method and an apparatus wherein a linear regulator of an envelope tracking (ET) modulator is included in a communication chip such that the ET technology can be applied to a wide-bandwidth signal between the linear regulator and the communication chip.

An electronic device according to various example embodiments may include: an antenna; a switching regulator; a communication chip including an amplifier, a first linear regulator operably connected to the amplifier and the switching regulator and configured to be supplied with a first voltage from the switching regulator, and a second linear regulator operably connected to the amplifier and the switching regulator and configured to be supplied with a second voltage higher than the first voltage from the switching regulator, the communication chip configured to transmit a radio-frequency signal outside of the electronic device through the antenna; and a control circuit. The control circuit may be configured to produce an envelope of an input signal input to the amplifier in connection with the radio-frequency signal and to provide the produced envelope to at least one of the first linear regulator or the second linear regulator. The first linear regulator may be configured to provide a third voltage corresponding to the envelope to the amplifier using the first voltage based on the envelope having a voltage in to a first range. The second linear regulator may be configured to provide a fourth voltage higher than the third voltage to the amplifier using the second voltage based on the voltage of the envelope having a voltage in a second range including values larger than values included in the first range.

A communication chip configured to process a radio-frequency signal received or transmitted in an electronic device, according to various example embodiments, may include: an amplifier; a first linear regulator operably connected to the amplifier; and a second linear regulator operably connected to the amplifier. The first linear regulator may be configured to receive a first voltage supplied from the switching regulator of the electronic device and to provide a third voltage to the amplifier using the first voltage. The second linear regulator may be configured to receive a second voltage supplied from the switching regulator and to provide a fourth voltage to the amplifier using the second voltage.

DETAILED DESCRIPTION

The power management module188may manage power supplied to the electronic device101. According to an example embodiment, the power management module188may be implemented as at least part of, for example, a power management integrated circuit (PMIC).

FIG.2is a block diagram200illustrating an example electronic device101for supporting legacy network communication and 5G network communication according to various embodiments.

Referring toFIG.2, the electronic device101may include a first communication processor (e.g., including processing circuitry)212, a second communication processor (e.g., including processing circuitry)214, a first radio frequency integrated circuit (RFIC)222, a second RFIC224, a third RFIC226, a fourth RFIC228, a first radio frequency front end (RFFE)232, a second RFFE234, a first antenna module (e.g., including at least one antenna)242, a second antenna module (e.g., including at least one antenna)244, and an antenna248. The electronic device101may further include a processor (e.g., including processing circuitry)120and a memory130.

The network199may include a first network (e.g., a legacy network)292and a second network (e.g., a 5G network)294. According to another embodiment, the electronic device101may further include at least one component among the components illustrated inFIG.1, and the network199may further include at least one different network. According to an embodiment, the first communication processor212, the second communication processor214, the first RFIC222, the second RFIC224, the fourth RFIC228, the first RFFE232, and the second RFFE234may form at least a part of the wireless communication module192. According to another embodiment, the fourth RFIC228may be omitted or included as a part of the third RFIC226.

The first communication processor212may include various communication processing circuitry and support establishment of a communication channel in a band to be used for wireless communication with the first network292, and legacy network communication through the established communication channel. According to various embodiments, the first network may be a legacy network including, for example, and without limitation, a 2G, 3G, 4G, or long term evolution (LTE) network. The second communication processor214may support establishment of a communication channel corresponding to a designated band (for example, about 6 GHz to about 60 GHz) among bands to be used for wireless communication with the second network294, and, for example, and without limitation, 5G network communication through the established communication channel. According to various embodiments, the second network294may, for example, be a 5G network as referenced by third generation partnership project (3GPP).

Additionally, according to an embodiment, the first communication processor212or the second communication processor214may support establishment of a communication channel corresponding to another designated band (for example, about 6 GHz or lower) among the bands to be used for wireless communication with the second network294, and, for example, 5G network communication through the established communication channel. According to an embodiment, the first communication processor212and the second communication processor214may be implemented inside a single chip or a single package. According to various embodiments, the first communication processor212or the second communication processor214may, for example, be provided inside a single chip or a single package together with a processor120, an auxiliary processor123, or a communication module190.

The first RFIC222may convert a baseband signal generated by the first communication processor212into a radio frequency (RF) signal at about 700 MHz to about 3 GHz, which may be used for the first network292(for example, legacy network), during transmission. During reception, an RF signal may be acquired from the first network292(for example, legacy network) through an antenna (for example, the first antenna module242), and may be preprocessed through an RFFE (for example, the first RFFE232). The first RFIC222may convert the preprocessed RF signal into a baseband signal such that the same can be processed by the first communication processor212.

The second RFIC224may convert a baseband signal generated by the first communication processor212or the second communication processor214into an RF signal in a Sub6 band (for example, about 6 GHz or lower) (hereinafter, referred to as a 5G Sub6 RF signal) that may be used for the second network294(for example, 5G network). During reception, a 5G Sub6 RF signal may be acquired from the second network294(for example, 5G network) through an antenna (for example, the second antenna module244), and may be preprocessed through an RFFE (for example, the second RFFE234). The second RFIC224may convert the preprocessed 5G Sub6 RF signal into a baseband signal such that the same can be processed by a communication processor corresponding to the first communication processor212or the second communication processor214.

The third RFIC226may convert a baseband signal generated by the second communication processor214into an RF signal in a 5G Above6 band (for example, about 6 GHz to about 60 GHz) (hereinafter, referred to as a 5G Above6 signal) that is to be used for the second network294(for example, 5G network). During reception, a 5G Above6 RF signal may be acquired from the second network294(for example, 5G network) through an antenna (for example, the antenna248), and may be preprocessed through the third RFFE236. The third RFIC226may convert the preprocessed 5G Above6 signal into a baseband signal such that the same can be processed by the second communication processor214. According to an embodiment, the third RFFE236may be formed as a part of the third RFIC226.

According to an embodiment, the electronic device101may include a fourth RFIC228separately from the third RFIC226or as at least a part thereof. In this example, the fourth RFIC228may convert a baseband signal generated by the second communication processor214into an RF signal in an intermediate frequency band (for example, about 9 GHz to about 11 GHz) (hereinafter, referred to as an IF signal) and then deliver the IF signal to the third RFIC226. The third RFIC226may convert the IF signal into a 5G Above6 RF signal. During reception, a 5G Above6 RF signal may be received from the second network294(for example, 5G network) through an antenna (for example, antenna248) and converted into an IF signal by the third RFIC226. The fourth RFIC228may convert the IF signal into a baseband signal such that the same can be processed by the second communication processor214.

According to an embodiment, the first RIFC222and the second RFIC224may, for example, be implemented as at least a part of a single chip or a single package. According to an embodiment, the first RFFE232and the second RFFE234may, for example, be implemented as at least a part of a single chip or a single package. According to an embodiment, at least one antenna module of the first antenna module242or the second antenna module244may be omitted or coupled to another antenna module so as to process RF signal in multiple corresponding bands.

According to an embodiment, the third RFIC226and the antenna248may be arranged on the same substrate so as to form a third antenna module246. For example, the wireless communication module192or the processor120may be arranged on a first substrate (for example, main PCB). In this example, the third RFIC226may be formed on a partial area (for example, lower surface) of a second substrate (for example, sub PCB) that is separate from the first substrate, and the antenna248may be arranged in another partial area (for example, upper surface), thereby forming a third antenna module246. The third RFIC226and the antenna248may be arranged on the same substrate such that the length of the transmission line between the same can be reduced. This may reduce loss (for example, attenuation) of a signal in a high-frequency band (for example, about 6 GHz to about 60 GHz) used for 5G network communication, for example, due to the transmission line. Accordingly, the electronic device101may improve the quality or speed of communication with the second network294(for example, 5G network).

According to an embodiment, the antenna248may, for example, include an antenna array including multiple antenna elements that may be used for beamforming. In this example, the third RFIC226may include multiple phase shifters238corresponding to the multiple antenna elements, as a part of the third RFFE236, for example. During transmission, each of the multiple phase shifters238may shift the phase of a 5G Above6 RF signal, which is to be transmitted to the outside (for example, base station of 5G network) of the electronic device101, through a corresponding antenna element. During reception, each of the multiple phase shifters238may shift the phase of a 5G Above6 RF signal received from the outside into the same or substantially same phase through a corresponding antenna element. This enables transmission or reception through beamforming between the electronic device101and the outside.

The second network294(for example, 5G network) may be operated independently of the first network292(for example, legacy network) (for example, standalone (SA)), or operated while being connected thereto (for example, non-standalone (NSA)). For example, the 5G network may include an access network (for example, 5G radio access network (RAN) or next-generation network (NG RAN)) and may not include a core network (for example, next-generation core (NGC)). In this example, the electronic device101may access the access network of the 5G network and then access an external network (for example, Internet) under the control of the core network (for example, evolved packed core (EPC)) of the legacy network. Protocol information (for example, LTE protocol network) for communication with the legacy network or protocol information (for example, new radio (NR) protocol information) for communication with the 5G network may be stored in the memory130, and may be accessed by another component (for example, the processor120, the first communication processor212, or the second communication processor214).

FIG.3Ais a block diagram illustrating an example configuration of an electronic device including multiple linear regulators in a communication chip of an example electronic device according to various embodiments,FIG.3Bis a block diagram illustrating an example configuration of an electronic device including multiple linear regulators in a communication chip of the electronic device according to various embodiments, andFIG.3Cis a block diagram illustrating an example configuration of an electronic device including multiple linear regulators in a communication chip of the electronic device according to various embodiments.

InFIGS.3A,3B and3C(which may be referred to hereinafter asFIG.3AtoFIG.3Cfor convenience), although expressions “first” and “second” are used to distinguish communication chips (for example, first communication chip310and second communication chip320), amplifiers (for example, first amplifier311and second amplifier321), and linear regulators (for example, first linear regulators313and second linear regulators315), the elements may perform the same or similar functions. In other words, the expressions “first” and “second” are used only to facilitate identification, and do not limit the scope of the disclosure. In an embodiment, the first communication chip310and the second communication chip320may be configured to process signals in different frequency bands. In an embodiment, the first linear regulator313and the second linear regulator315may supply (or provide) different voltages (or voltage levels).

FIG.3Ais a diagram illustrating an example configuration of an example electronic device according to an embodiment.

Referring toFIG.3A, the electronic device according to various embodiments (for example, the electronic device101inFIG.1) may include a first communication chip310, a control circuit330, and/or a switching regulator340. The first communication chip310may include an amplifier311, a first linear regulator313, and/or a second linear regulator315.

The first communication chip310according to various embodiments may include, besides the above components, one or more other components (for example, a low-noise amplifier, an MIPI controller, an antenna switch). The first communication chip310may be formed as an integrated circuit or chip (for example, a single chip). The first communication chip310may be positioned on a printed circuit board of the electronic device101as a separate chip distinguished from the switching regulator340. In an embodiment, the first communication chip310may be included in an RFFE inFIG.2(for example, the first RFFE232, the second RFFE234, or the third RFFE236).

The first communication chip310may receive an input signal related to communication (for example, wireless communication) from a communication processor (for example, the first communication processor212inFIG.2) through an RFIC (for example, the first RFIC222or the second RFIC224inFIG.2), may amplify the received input signal, and may output a radio-frequency signal. The input signal and the radio-frequency signal may be the same or similar signal, differing only in the magnitude of the signal power (or voltage). Hereinafter, in order to distinguish between the signal input to the first amplifier311and the signal output from the first amplifier311, the signal input to the first amplifier311may be referred to as an “input signal”, and the signal output from the first amplifier311may be referred to as a “radio-frequency signal”.

According to various embodiments, the first communication chip310may amplify the input signal (or first input signal) into a high-power signal using the first amplifier311. The signal input to the first amplifier311, in order to distinguish the same from the input signal input to the second amplifier320inFIG.3C, may be referred to as a “first input signal”, and the input signal input to the second amplifier320may be referred to as a “second input signal”. The first amplifier311may be configured to amplify the first input signal. The first amplifier311may amplify the first input signal using a power supply (for example, fixed power-supply voltage) supplied from a power management module of the electronic device101(for example, the power management module188inFIG.1). If the first amplifier311amplifies the first input signal using a fixed power supply, unnecessary power dissipation may occur. Since the first amplifier311consumes a large amount of power in the electronic device101, the same may need to have high-efficiency and high-linearity characteristics. In order for the first amplifier311to have high-efficiency and high-linearity characteristics, at least one of, for example, an envelope tracking (ET) technology (or algorithm), an average power tracking (APT) technology, or a step power tracking (SPT) technology may be applied to the first amplifier311.

According to various embodiments, the ET technology may refer, for example, to a technology wherein, based on the envelope of the first input signal input to an amplifier (for example, the first amplifier311), a voltage (or power supply) is provided to the first amplifier311, thereby reducing power consumed by the amplifier311. According to the ET technology, the voltage Vcc applied to the first amplifier311may be made to track the envelope of the first input signal, thereby enabling the first amplifier311to operate while reducing power dissipation (or increasing the power efficiency of the first amplifier311).

According to various embodiments, the APT technology or the SPT technology may be used, in order to reduce power consumed by an amplifier (for example, the first amplifier311), so as to change the voltage supplied to the first amplifier311. If the ET technology is not applied to the first amplifier311, the APT technology or the SPT technology may be applied instead. If the APT technology or the SPT technology is applied to the first amplifier311, the same voltage supplied from the power management module188to the switching regulator340may be input to the first amplifier311. If the voltage supplied to the switching regulator340is input to the first amplifier311, the first linear regulator313and the second linear regulator315may not operate.

In an embodiment, which one of the ET technology, the APT technology, and the SPT technology is to be applied to the first amplifier311may be determined based on a signal control table stored in the memory of the electronic device101(for example, the memory130inFIG.1). The signal control table may be stored in the memory130based on the performance of the first communication chip310included in the electronic device101, for example, or an antenna (for example, the first antenna module242). The signal control table may include a code value corresponding to power (or voltage) of an input signal. The control circuit330may control, based on the signal control table, one of the ET technology, the APT technology, or the SPT technology to be applied to the first amplifier311.

According to various embodiments, the first linear regulator313may be operably connected to the first amplifier311and the switching regulator340, and may receive a first voltage (or current/power supply) supplied from the switching regulator340. The second linear regulator315may be operably connected to the first amplifier311and the switching regulator340, and may receive a second voltage, which is higher than the first voltage, supplied from the switching regulator340. The first voltage and the second voltage may differ from each other. As an example, the first voltage may be relatively low, and the second voltage may be relatively high. As another example, the first voltage may be relatively high, and the second voltage may be relatively low. The first linear regulator313may be configured to supply a third voltage (or current) to the first amplifier311according to the envelope of the first input signal using the first voltage. In an embodiment, if the voltage of the envelope of the first input signal is in a first range, the first linear regulator313may provide the first amplifier311with a third voltage corresponding to the envelope. The third voltage may be equal to or higher than the first voltage, for example.

According to an embodiment, the second linear regulator315may be configured to supply a fourth voltage, which is higher than the third voltage, to the first amplifier311according to the envelope of the first input signal using the second voltage. For example, the third voltage and the fourth voltage may differ from each other. If the voltage of the envelope of the first input signal is in a second range, the second linear regulator315may provide the first amplifier311with a fourth voltage corresponding to the envelope. The second range may include values larger than values included in the first range. The fourth voltage may be equal to or higher than the second voltage, for example.

According to an embodiment, the first range may be determined based on the first voltage, and the second range may be determined based on the second voltage. The first range and the second range may or may not overlap each other. For example, values in the second range (for example, 1.5-2V) may be larger than values in the first range (for example, 1-1.49V). Example values given above are only provided to aid in understanding of the disclosure, and descriptions thereof do not limit the disclosure. According to an embodiment, if the voltage of the envelope of the first input signal is a value between the first range and the second range, the first linear regulator313may be driven, and the second regulator315may not be driven.

As another example, if the voltage of the envelope of the first input signal is a value between the first range and the second range, the first linear regulator313may not be driven, and the second linear regulator315may be driven. As another example, if a threshold value is set between the first voltage and the second voltage such that the voltage of the envelope of the first input signal is equal to/below the threshold value, the first linear regulator313may be driven, and if the voltage exceeds the threshold value, the second linear regulator315may be driven. This is only an example design modification, the description of which is not limiting in any manner.

The first linear regulator313or the second linear regulator315, which controls (or adjusts) a voltage, may be designed to operate with a linear relation between input and output. The first linear regulator313or the second linear regulator315, which has high-speed characteristics, may produce a high-frequency signal of the voltage of the envelope of the first input signal. The first linear regulator313or the second linear regulator315may receive the envelope of the first input signal from the control circuit330.

For example, the first linear regulator313may control (or adjust) the third voltage so as to correspond to the envelope of the first input signal. The first linear regulator313may provide the first amplifier311with the third voltage obtained by adjusting the first voltage so as to correspond to the envelope. The second linear regulator315may control (or adjust) the fourth voltage so as to correspond to the envelope of the first input signal. The second linear regulator315may provide the first amplifier311with the fourth voltage obtained by adjusting the second voltage so as to correspond to the envelope.

According to various embodiments, the first linear regulator313or the second linear regulator315may regulate and thus compensate for noise included in a signal output from the switching regulator340. Even if a signal (for example, a low-frequency signal or a first voltage) output from the switching regulator340is distorted by a trace (for example, an electric path along which a signal from the switching regulator340is transferred), the first linear regulator313or the second linear regulator315may regulate the same and may provide the first amplifier311with the third voltage or the fourth voltage.

According to various embodiments, the first linear regulator313or the second linear regulator315and the first amplifier311may be disposed inside the first communication chip310, and the switching regulator340may be disposed outside the first communication chip310. The first linear regulator313or the second linear regulator315may adjust the voltage output from the switching regulator340to correspond to the envelope of the first input signal, and may provide the same to the first amplifier311. The first length (or distance) between the first linear regulator313or the second linear regulator315and the first amplifier311may be shorter than the second length between the switching regulator340and the amplifier311. This may reduce the restriction resulting from the distance between the switching regulator340and the first amplifier311.

According to various embodiments, the switching regulator340may provide a relatively large voltage (for example, a first voltage or a second voltage) to the first linear regulator313or the second linear regulator315. The first linear regulator313may micro-adjust the first voltage from the switching regulator340and may provide the resulting third voltage to the amplifier311, and the second linear regulator315may micro-adjust the second voltage from the switching regulator340and may provide the resulting fourth voltage to the amplifier311. As a result of the first linear regulator313or the second linear regulator315, which is included in the first communication chip310, micro-adjusting a voltage and providing the same to the first amplifier311included in the first communication chip310, the power efficiency of the first amplifier311may be improved compared with the case in which a voltage is provided to the first amplifier311from outside the first communication chip310.

The switching regulator340may be operably connected to the first linear regulator313or the second linear regulator315. As another example, the switching regulator340may be operably connected to the power management module180inFIG.1. Using a voltage input from the power management module180, the switching regulator340may simultaneously provide different voltages to the first linear regulator313and the second linear regulator315. The switching regulator340may make a single input (for example, an input from the power management module180) and multiple outputs (for example, outputs to the first linear regulator313and the second linear regulator315).

According to various embodiments, the switching regulator340, which may be configured to adjust (or control) a voltage, may supply a desired voltage while turning on or off a switch element (for example, a MOSFET). In an embodiment, the switching regulator340may include a direct current (DC)-DC converter, such as a buck converter, a boost converter, or a buck-boost converter. The switching regulator340may produce a low-frequency signal of the voltage of the envelope of the first input signal input to the first amplifier311. For example, the switching regulator340may provide the first voltage to the first linear regulator313and may provide the second voltage to the second linear regulator315.

Although the first communication chip310is illustrated inFIG.3Aas including two linear regulators, the first communication chip310may include more than two linear regulators. The disclosure is not limited by the drawings or descriptions. For example, if the first communication chip310includes four linear regulators, the switching regulator340may provide different voltages to the four linear regulators. If multiple linear regulators are included, voltages may be provided more efficiently, but an increased number of linear regulators may increase the area (for example, the linear regulator mounting area) and may result in expenditure (for example, linear regulator usage expenditure). The number of linear regulators included in the first communication chip310may be determined in view of the performance of the linear regulators or the efficiency of the electronic device101.

According to an embodiment, the control circuit330may be configured to produce an envelope (for example, a first envelope) corresponding to the first input signal. The control circuit330may produce the envelope such that the envelope tracks the first input signal. The control circuit330may provide the produced envelope to at least one of the first linear regulator313or the second linear regulator315.

According to an embodiment, the control circuit330may control the first linear regulator313or the second linear regulator315to be used selectively according to the situation. The first linear regulator313or the second linear regulator315, which is designed to be optimized for the corresponding power (for example, the first voltage or the second voltage), may output power with a high efficiency with regard to each type of power. The control circuit330may produce the envelope such that the first linear regulator313or the second linear regulator315is selectively driven according to the voltage of the envelope of the first input signal.

According to various embodiments, the control circuit330may have a comprehensive concept encompassing circuits for controlling wireless communication in various embodiments, such as a communication processor (for example, the processor120inFIG.1, the first communication processor212or the second communication processor214inFIG.2), an RFIC (for example, the first RFIC222or the second RFIC224inFIG.2), a wireless communication module (for example, the wireless communication module192inFIG.1orFIG.2), or an envelope tracking digital-analog converter (ET DAC), for example. For example, the control circuit330may be included inside at least one of the first communication processor212, the first RFIC222, or the first communication chip310.

FIG.3Bis a block diagram illustrating an example configuration of an example electronic device according to various embodiments.

Referring toFIG.3B, the electronic device according to various embodiments (for example, the electronic device101inFIG.1) may include a first communication chip310, a control circuit330, and/or a switching regulator340. The first communication chip310may include a first amplifier311, a first linear regulator313, a second linear regulator315, a first switch (or switch module)351, and a second switch353.

The first communication chip310, the first linear regulator313, the second linear regulator315, the control circuit330, or the switching regulator340has been described in detail with reference toFIG.3A, and repeated descriptions thereof will not be repeated here.

According to various embodiments, the first switch351may be operably connected to the switching regulator340and the first linear regulator313. The first switch351may be disposed between the switching regulator340and the first linear regulator313. For example, the first switch351may be disposed between the output terminal of the switching regulator340and the output terminal of the first linear regulator313. The second switch353may be operably connected to the switching regulator340and the second linear regulator315. The second switch353may be disposed between the switching regulator340and the second linear regulator315. For example, the second switch353may be disposed between the output terminal of the switching regulator340and the output terminal of the second linear regulator315.

According to various embodiments, the control circuit330may control the first switch351or the second switch353according to the input signal such that the APT technology or the SPT technology is applied to the first amplifier311. In an embodiment, the control circuit330may apply the APT technology or the SPT technology to the first amplifier311, based on a signal control table stored in the memory130. For example, if it is difficult to secure a high-efficiency dynamic range of the first linear regulator313or the second linear regulator315, the control circuit330may implement an APT operation or SPT operation by directly using a voltage (for example, a first voltage or a second voltage) output from the switching regulator340. The control circuit330may control the first switch351or the second switch353such that the voltage output from the switching regulator340is supplied to the first amplifier311with no change.

According to an embodiment, if the input signal corresponds to a first code value stored in the signal control table, the control circuit330may turn on the first switch351such that a first voltage supplied from the switching regulator340to the first linear regulator313is controlled to be supplied to the first amplifier311with no change. If the first switch351is turned on, the first linear regulator313may not operate. The control circuit330may turn off the first switch351such that the first voltage output from the switching regulator340is controlled to be provided to the first linear regulator313. If the first switch351is turned off, and if the voltage of the envelope of the first input signal corresponds to a first range, the first linear regulator313may provide the first amplifier311with a third voltage corresponding to the envelope.

According to an embodiment, if the input signal corresponds to a second code value stored in the signal control table, the control circuit330may turn on the second switch353such that a second voltage supplied from the switching regulator340to the second linear regulator315is controlled to be supplied to the first amplifier311with no change. If the second switch353is turned on, the second linear regulator315may not operate. The control circuit330may turn off the second switch353such that a second voltage output from the switching regulator340is controlled to be provided to the second linear regulator315. If the second switch353is turned off, and if the voltage of the envelope of the first input signal is in a second range, the second linear regulator315may provide the first amplifier311with a fourth voltage corresponding to the envelope. For example, the fourth voltage may be higher than the third voltage.

FIG.3Cis a block diagram illustrating an example configuration of an example electronic device according to various embodiments.

Referring toFIG.3C, the electronic device according to various embodiments (for example, the electronic device101inFIG.1) may include a first communication chip310, a second communication chip320, a control circuit330, and/or a switching regulator340. The first communication chip310may include at least one of a first amplifier311, a first linear regulator313, and a second linear regulator315. The second communication chip320may include a second amplifier321, a third linear regulator323, and a fourth linear regulator325.

The first communication chip310, the first linear regulator313, the second linear regulator315, the control circuit330, or the switching regulator340has been described in detail with reference toFIG.3A, and repeated descriptions thereof will not be repeated here.

According to various embodiments, the first communication chip310may be included in the first RFFE232inFIG.2, and the second communication chip320may be included in the second RFFE234inFIG.2. According to various embodiments, the second communication chip320may further include one or more other components (for example, a low-noise amplifier, an MIPI controller, an antenna switch) than the above components. The second communication chip320may be implemented as an integrated circuit or chip (for example, a single chip). The second communication chip320may be positioned on the printed circuit board of the electronic device101as a separate chip distinguished from the switching regulator340. In an embodiment, each of the first communication chip310and the second communication chip320may be mounted on the printed circuit board of the electronic device101as a separate chip.

According to an embodiment, the second communication chip320may receive a second input signal related to communication (for example, wireless communication) from a communication processor (for example, the first communication processor212inFIG.2) through the second RFIC224inFIG.2, may amplify the received second input signal, and may output a second radio-frequency signal. The second input signal and the second radio-frequency signal may be the same signal, differing only in the magnitude of the signal power (or voltage). Hereinafter, in order to distinguish between the signal input to the second amplifier321and the signal output from the second amplifier321, the signal input to the second amplifier321may be referred to as a “second input signal”, and the signal output from the second amplifier321may be referred to as a “second radio-frequency signal”. In addition, the signal input to the first amplifier311may be referred to as a “first input signal”, and the signal output from the first amplifier311may be referred to as a “first radio-frequency signal”.

According to various embodiments, the first input signal may be a signal corresponding to a first frequency band, and the second input signal may be a signal corresponding to a second frequency band. The first frequency band may be a frequency band configured in the first communication chip310, and the second frequency band may be a frequency band configured in the second communication chip320. The first frequency band and the second frequency band may be equal to or different from each other.

According to various embodiments, the first frequency band or the second frequency band may include, for example, and without limitation, at least one of a band of about 700 MHz to 3 GHz used for a first network (for example, the first network292inFIG.2or a legacy network), a Sub6 band (for example, about 6 GH or lower) used for a second network (for example, the second network294inFIG.2or a 5G network), an intermediate frequency band (for example, about 9 GH to about 11 GHz), or a 5G Above6 band (for example, about 6 GH to about 60 GHz). The first frequency band may be lower than the second frequency band. For example, the first frequency band may include, for example, and without limitation, a band of about 700 MHz to about 3 GHz, and the second frequency band may be a 5G Above6 band (for example, about 6 GHz to about 60 GHz). Such descriptions are simply provided to aid in understanding of the disclosure, and do not limit the disclosure.

According to an embodiment, the second amplifier321may be configured to amplify the second input signal. The second amplifier321may amplify the second input signal using a power supply (for example, a fixed power-supply voltage) supplied from the power management module (for example, the power management module188inFIG.1) of the electronic device101. In order for the second amplifier321to have high-efficiency and high-linearity characteristics, at least one of the ET technology (or algorithm), the APT technology, or the SPT technology may be applied to the second amplifier321.

The third linear regulator323or the fourth linear regulator325described below, although referred to as “third” or “fourth” to be distinguished from the first linear regulator313or the second linear regulator315included in the first communication chip310, may be identical or similar thereto.

According to various embodiments, the third linear regulator323may be operably connected to the second amplifier321and the switching regulator340and may receive a fifth voltage (or current/power supply) supplied from the switching regulator340. The fourth linear regulator325may be operably connected to the second amplifier321and the switching regulator340and may receive a sixth voltage supplied from the switching regulator340. For example, the fifth voltage and the sixth voltage may differ from each other. As an example, the fifth voltage may be relatively low, and the sixth voltage may be relatively high. As another example, the fifth voltage may be relatively high, and the sixth voltage may be relatively low. The third linear regulator323may be configured to supply a seventh voltage to the second amplifier321according to the envelope of the second input signal using the fifth voltage. If the voltage of the envelope of the second input signal input to the second amplifier321is in a third range, the third linear regulator323may provide the second amplifier321with a seventh voltage corresponding to the envelope. The seventh voltage may be equal to or higher than the fifth voltage, for example.

According to an embodiment, the fourth linear regulator325may be configured to supply an eighth voltage to the second amplifier321according to the envelope of the second input signal using the sixth voltage. For example, the sixth voltage and the eighth voltage may differ from each other. As another example, the eighth voltage may be equal to or higher than the sixth voltage. If the voltage of the envelope of the second input signal is in a fourth range, the fourth linear regulator325may provide the second amplifier321with an eighth voltage corresponding to the envelope. The fourth range may include values larger than values included in the third range, for example.

According to an embodiment, the third range may be determined based on the fifth voltage, and the fourth range may be determined based on the sixth voltage. The third range and the fourth range may or may not overlap each other. For example, values in the fourth range (for example, 2.1-2.3V) may be larger than values in the third range (for example, 1.8-2.0V). Example values given above are merely provided to aid in understanding of the disclosure, and descriptions thereof do not limit the disclosure.

According to an embodiment, if the voltage of the envelope of the second input signal is a value between the third range and the fourth range, the third linear regulator323may be driven, and the fourth linear regulator325may not be driven. As another example, if the voltage of the envelope of the second input signal is a value between the third range and the fourth range, the third linear regulator323may not be driven, and the fourth linear regulator325may be driven. As another example, if a threshold value is set between the fifth voltage and the sixth voltage such that the voltage of the envelope of the second input signal is equal to/below the threshold value, the third linear regulator323may be driven, and if the voltage exceeds the threshold value, the fourth linear regulator325may be driven. This is merely an example design modification, the description of which is not limiting in any manner.

According to an embodiment, the third linear regulator323or the fourth linear regulator325, which controls (or adjusts) a voltage, may be designed to operate with a linear relation between input and output. The third linear regulator323or the fourth linear regulator325may produce a high-frequency signal of the voltage of the envelope of the second input signal applied to the second amplifier321. The third linear regulator323or the fourth linear regulator325may receive the envelope of the second input signal from the control circuit330.

For example, the third linear regulator323may control (or adjust) the seventh voltage so as to correspond to the envelope of the second input signal. The third linear regulator323may provide the second amplifier321with the seventh voltage obtained by adjusting the fifth voltage so as to correspond to the envelope. The fourth linear regulator325may control (or adjust) the eighth voltage so as to correspond to the envelope of the second input signal. The fourth linear regulator325may provide the second amplifier321with the eighth voltage obtained by adjusting the sixth voltage so as to correspond to the envelope.

According to various embodiments, the third linear regulator312or the fourth linear regulator325may regulate and thus compensate for noise included in a signal output from the switching regulator340. Even if a signal (for example, a low-frequency signal or a fifth voltage) output from the switching regulator340is distorted by a second electric path along which a signal from the switching regulator340is transferred, the third linear regulator323or the fourth linear regulator325may regulate the same and may then provide the second amplifier321with the seventh voltage or the eighth voltage.

According to an embodiment, the third linear regulator323or the fourth linear regulator325and the second amplifier321may be disposed inside the second communication chip320, and the switching regulator340may be disposed outside the second communication chip320. The third linear regulator323or the fourth linear regulator325may adjust the voltage output from the switching regulator340so as to correspond to the envelope of the second input signal, and may provide the same to the second amplifier321. The first length (or distance) between the third linear regulator323or the fourth linear regulator325and the second amplifier321may be shorter than the second distance between the switching regulator340and the second amplifier321. This may reduce the restriction resulting from the distance between the switching regulator340and the second amplifier321.

According to an embodiment, the switching regulator340may be operably connected to the third linear regulator323and the fourth linear regulator325. The switching regulator340may produce a low-frequency signal of power of the envelope of the second input signal input to the second amplifier321. The switching regulator340may receive the envelope of the second input signal from the control circuit330. According to an embodiment, the switching regulator340may provide different voltages to the third linear regulator323and the fourth linear regulator325according to the envelope. For example, the switching regulator340may provide the fifth voltage to the third linear regulator323, and may simultaneously provide the sixth voltage to the fourth linear regulator325.

According to an embodiment, the control circuit330may be configured to produce an envelope (for example, a second envelope) corresponding to the second input signal. The control circuit330may provide the produced envelope of the second input signal to at least one of the switching regulator340, the third linear regulator323, or the fourth linear regulator325.

According to an embodiment, the control circuit330may control the third linear regulator323or the fourth linear regulator325to be used selectively according to the situation. The third linear regulator323or the fourth linear regulator325, which may be designed to be optimized for the corresponding power (for example, the fifth voltage or the sixth voltage), may output power with a high efficiency with regard to each type of power. The control circuit330may control the envelope such that the third linear regulator323or the fourth linear regulator325is selectively driven according to the voltage of the envelope of the second input signal.

FIG.4Ais a diagram illustrating an example configuration of an ET modulator according to various embodiments,FIG.4Bis a diagram illustrating an example configuration of an ET modulator according to various embodiments, andFIG.4Cis a diagram illustrating an example configuration of an ET modulator according to various embodiments.

FIG.4Ais a diagram illustrating an example configuration of an example ET modulator according to a comparative example.

Referring toFIG.4A, the envelope-tracking (ET) modulator400may apply the envelope (or envelope signal) of an input signal (for example, a first input signal or a second input signal), which is applied to an amplifier (for example, the first amplifier311or the second amplifier321inFIG.3AtoFIG.3C), as a power-supply voltage of the first amplifier311or the second amplifier321. The ET modulator400, configured as above, may include two different types of regulators (e.g., hybrid structure) in order to have high-efficiency and high-linearity characteristics. For example, the ET modulator400may include a linear regulator410and/or a switching regulator430. The ET modulator400may further include a comparator420configured to compare outputs from the linear regulator410and to control inputs to the switching regulator430. The ET modulator400inFIG.4Amay be referred to as a “first-type ET modulator”.

The linear regulator410(for example, the first linear regulator311or the second linear regulator321inFIG.3AtoFIG.3C), which controls (or adjusts) a voltage, may compare an output voltage and a reference voltage and may output a constant voltage. The linear regulator410, configured as above, is designed to operate with a linear relation between input and output. The linear regulator410may produce a high-frequency signal of the voltage of the envelope of an input signal input to the first amplifier311or the second amplifier321.

According to various embodiments, the linear regulator410may regulate and thus compensate for noise produced in the switching regulator430. The linear regulator410may have high-speed characteristics and thus can track the envelope of a wide bandwidth, but may have a low efficiency (for example, a small amount of current output). Due to the high speed of the linear regulator410and the low speed of the switching regulator430, the linear regulator410may operate as a master controlling the switching regulator430, and the switching regulator430may operate as a slave.

The switching regulator430(for example, the switching regulator340inFIG.3AtoFIG.3C), which adjusts (or controls) a voltage, is designed to supply a desired voltage while turning on or off a switch element (for example, a MOSFET). The switching regulator430may produce a low-frequency signal of the voltage of the envelope of an input signal input to an amplifier (for example, the first amplifier311or the second amplifier321). For example, the switching regulator430may supply power from the input side to the output side by turning on the switch element until the output voltage reaches the desired voltage, and may turn off the switch element, if the output voltage reaches the desired voltage, thereby preventing waste of the input power.

For example, if the switching regulator430may turn on the switch element, power may be supplied to the output terminal OUT through an inductor440, and if the switching regulator430turns off the switch element, power accumulated in the inductor440may be supplied to the output terminal. If the switch element is turned on, the output power may increase, and if the switch element is turned off, the output power may decrease. The switching regulator430may control the output power based on this principle. The switching regulator430may output a large amount of current (or voltage) (for example, high efficiency), and the lower speed thereof may impede tracking the envelope of a wide bandwidth. For this reason, the ET modulator400may include a linear regulator410and a switching regulator430(hybrid structure).

FIG.4Bis a diagram illustrating an example configuration of an example ET modulator according to various embodiments.

Referring toFIG.4B, the ET modulator450may be designed to include only a switching regulator430. If the ET modulator450is included in an electronic device (for example, the electronic device101inFIG.1), a linear regulator410may be included in a communication chip (for example, the first communication chip310or the second communication chip320inFIG.3AtoFIG.3C). The ET modulator450inFIG.4Bmay be referred to as a “second-type ET modulator”. Although not illustrated, the switching regulator430may be connected to the power management module180inFIG.1. The switching regulator430may make a single input (for example, an input from the power management module180) and/or multiple outputs (for example, outputs to the first linear regulator313and the second linear regulator315, respectively). The switching regulator430may provide a first voltage to the first linear regulator313and may provide a second voltage to the second linear regulator315.

FIG.4Cis a diagram illustrating an example configuration of an example ET modulator according to various embodiments.

Referring toFIG.4C, the ET modulator470may be designed to include multiple switching regulators. For example, the ET modulator470may include a first switching regulator430or a second switching regulator435. If the ET modulator470is included in an electronic device (for example, the electronic device101inFIG.1), a first linear regulator313and a second linear regulator315may be included in a communication chip (for example, the first communication chip310inFIG.3AtoFIG.3C). The first switching regulator430may provide a first voltage to the first linear regulator313, and the second switching regulator435may provide a second voltage to the second linear regulator315.

The ET modulator470inFIG.4Cmay be referred to as a “second-type ET modulator”. Although the ET modulator470is illustrated inFIG.4Cas including two switching regulators, the same may include more than two (for example, three or four) switching regulators.

FIG.5Ais a diagram illustrating an example of driving multiple linear regulators according to various embodiments.

Referring toFIG.5A, according to an embodiment, is an example510of driving linear regulators, if the voltage of the envelope of a first input signal input to a first amplifier (for example, the first amplifier311inFIG.3AtoFIG.3C) is in a first range501, a first linear regulator LDO1313may operate. The first linear regulator LDO1313may provide a third voltage to the first amplifier using a first voltage Vdd1supplied from a switching regulator (for example, the switching regulator340inFIG.3AtoFIG.3C). For example, the third voltage may be equal to or higher than the first voltage.

According to an embodiment, if the voltage of the envelope of the first input signal is in a second range503, a second linear regulator315LDO2may operate. The second linear regulator315LDO2may provide a fourth voltage to the first amplifier311using a second voltage Vdd2supplied from the switching regulator340. For example, the fourth voltage may be equal to or higher than the second voltage. The second range503may include values larger than values included in the first range501. For example, the first range501may be 1.2-1.49V, and the second range503may be 1.5-1.79V.

According to an embodiment, if the voltage of the envelope of the first input signal is in a third range505, a third linear regulator317LDO3may operate. The third linear regulator317LDO3may provide a seventh voltage to the first amplifier311using a fifth voltage Vdd3supplied from the switching regulator340. For example, the seventh voltage may be equal to or higher than the fifth voltage.

According to an embodiment, if the voltage of the envelope of the first input signal is in a fourth range507, a fourth linear regulator319LDO4may operate. The fourth linear regulator319LDO4may provide an eighth voltage to the first amplifier311using a sixth voltage Vdd4supplied from the switching regulator340. For example, the eighth voltage may be equal to or higher than the sixth voltage. The fourth range507may include values larger than values included in the third range505. For example, the third range505may be 1.8-2.09V, and the fourth range507may be 2.1-2.4V.

Although the diagram illustrates four linear regulators, the number of included linear regulators may be less than or greater than four. The diagram is only an example, and does not limit the disclosure.

FIG.5Bis a diagram illustrating the efficiency of using multiple linear regulators according to various embodiments.

Referring toFIG.5B, the efficiency graph530shows a first output vs. efficiency531in the case of using multiple linear regulators providing different voltages and a second output vs. efficiency533in the case of using a single regulator. It is clear that the second output vs. efficiency533increases in proportion to the output power (for example, output), and is low if the output power is low. According to various embodiments, multiple linear regulators may be configured (or designed) to operate in high-efficiency sections so as to correspond to respective voltages (for example, Vdd1, Vdd2, Vdd3, Vdd4) based on the first output vs. efficiency531.

FIG.6Ais a diagram illustrating an example configuration of an example electronic device, to which an ET modulator is applied, according to a comparative example.

Referring toFIG.6A, the electronic device according to a comparative example (for example, electronic device101inFIG.1) may include a communication processor (for example, first communication processor212), an RFIC (for example, the first RFIC222inFIG.2), an ET modulator400, and/or a communication chip600.

The communication processor212may include various communication processing circuitry and establish a communication channel in a band to be used for wireless communication with a network (for example, the second network199inFIG.1), and may support network communication through the established communication channel. According to various embodiments, the network may be a legacy network including a 2G, 3G, 4G, or long term revolution (LTE) network. The communication processor212may include an envelope-tracking digital-analog converter (ET DAC)660.

The ET DAC660may include an envelope detector and a digital signal processor (DSP). The envelope detector may convert an in-phase/quadrature-phase (I/Q) signal into an envelope signal (or envelope). The I/Q signal may refer to a signal having a modulated frequency. The DSP may adjust the shaping or delay of the envelope signal output from the envelope detector. An amplifier produces a third-order intermodulation distortion (IMD3) during signal amplification, and the IMD3 may have a sweet spot point. The shaping may refer to controlling the envelope signal by tracking a sweet spot. The DSP may control the envelope signal such that the envelope signal tracks a radio-frequency signal amplified by the communication chip600. According to various embodiments, the ET DAC660is illustrated in the diagram as being included in the communication processor212, but may be included in the RFIC222.

The RFIC222may convert, during transmission, a baseband signal produced by the communication processor212into a radio-frequency signal used for the network (for example, in a frequency band of about 600 MHz to about 6 GHz).

The ET modulator400may include a linear regulator410, a comparator420, and/or a switching regulator430. The ET modulator400may be the first-type ET modulator illustrated inFIG.4A. The linear regulator410(for example, the first linear regulator311or the second linear regulator321inFIG.3AtoFIG.3C), the comparator420, or the switching regulator430(for example, the switching regulator340inFIG.3AtoFIG.3C) has been described in detail with reference toFIG.3AtoFIG.3CorFIG.4AtoFIG.4C, and detailed descriptions thereof may not be repeated here. The ET modulator400may provide the amplifier610with an output corresponding to the sum of an output from the linear regulator410and an output from the switching regulator430.

The communication chip600may include a power amplifier (PA)610, a low-noise amplifier (LNA)620, a filter/duplexer630, a mobile industry processor interface (MIPI) controller640, and an antenna switch (ASW)650. The PA610(for example, the first amplifier311or the second amplifier321inFIG.3AtoFIG.3C) may amplify an input signal. For example, the PA610may receive an input signal (for example, PA_IN) from the RFIC222and may amplify the input signal, thereby outputting (or producing) a radio-frequency signal (for example, transmission signal). The LNA620may amplify a radio-frequency signal (for example, reception signal) received through an antenna (for example, the first antenna module242inFIG.2).

The LNA620may amplify the radio-frequency signal and may output (for example, LNA_OUT) the same to the RFIC222. The filter/duplexer630may be connected to the first antenna module242so as to separate transmission and reception frequencies of the electronic device101. The filter/duplexer630may include multiple filters or duplexers with regard to respective frequency bands. The MIPI controller640may control a transmission signal or a reception signal. The MIPI controller640may be made of a switch module such that, when a transmission signal is transmitted, the filter/duplexer630is controlled (for example, MIPI #1) to be connected to the amplifier610and, when a reception signal is received, the filter/duplexer630is controlled (for example, MIPI #2) to be connected to the LNA620. The ASW650may select the frequency band of a signal to be transmitted/received. The ASW650may control a switch so as to conform to the frequency band of the signal to be transmitted/received.

Since an envelope signal output from the ET DAC660is input to the ET modulator400, distortion of the envelope signal input to the ET modulator400may worsen. The signal distortion may worsen in proportion to the distance670(for example, distance between the ET modulator400and the communication chip600), or in proportion to the bandwidth of the signal. Therefore, the ET modulator400according to the comparative example may be amounted at as small a distance670from the communication chip600as possible. If the ET technology is applied to a signal having a wide bandwidth equal to/larger than 100 MHz (for example, 5G), distortion may occur due to the distance670between the ET modulator400and the communication chip600.

FIG.6Bis a diagram illustrating an example configuration of an example electronic device, to which an ET modulator is applied, according to various embodiments.

Referring toFIG.6B, the electronic device according to the disclosure (for example, electronic device101inFIG.1) may include a communication processor (for example, first communication processor212), an RFIC (for example, the RFIC222inFIG.2), a switching regulator430, and/or a first communication chip310(for example, the first communication chip310inFIG.3AtoFIG.3C).

The communication processor212and the RFIC222have been described in detail with reference toFIG.6A, and repeated descriptions may not be repeated here.

According to an embodiment, the RFIC222may include an ET DAC660. The ET DAC660may produce an envelope (or an envelope signal) based on an input signal input to the first amplifier included in the first communication chip310(for example, the first amplifier311or the second amplifier321inFIG.3AtoFIG.3C). The ET DAC660may provide the produced envelope to a first linear regulator313LDO1to a fourth linear regulator319LDO4(e.g., linear regulators313,315,317and319). Although the ET DAC660is illustrated inFIG.6Bas being included in the RFIC222, the ET DAC660may be included inside the first communication chip310. Although the diagram illustrates four linear regulators included, the number of included linear regulators may be greater than or less than four. This is only an example, and does not limit the disclosure.

According to an embodiment, the switching regulator430may refer, for example, to an ET modulator including a switching regulator, and may be the second-type ET modulator illustrated inFIG.4BorFIG.4C. According to various embodiments, the switching regulator430may be configured to include a single switching regulator430as inFIG.4B, or may be configured to include multiple switching regulators as inFIG.4C(for example, a first switching regulator430and a second switching regulator435). According to various embodiments, the switching regulator430may include four switching regulators, the number of which corresponds to the number of linear regulators included in the first communication chip310.

According to an embodiment, the switching regulator430may be operably connected to the first linear regulator313LDO1, the second linear regulator315LDO2, the third linear regulator317LDO3, and/or the fourth linear regulator319LDO4. According to an embodiment, using a voltage supplied from the power management module188inFIG.1, the switching regulator430may provide different voltages to the first linear regulator313, the second linear regulator315, the third linear regulator317, and/or the fourth linear regulator319. For example, the switching regulator430may provide a first voltage to the first linear regulator313, may provide a second voltage to the second linear regulator315, may provide a fifth voltage to the third linear regulator317, and may provide a sixth voltage to the fourth linear regulator319. The switching regulator430has been described in detail with reference toFIG.3AtoFIG.3CorFIG.4AtoFIG.4C, and repeated descriptions thereof may not be repeated here.

According to an embodiment, the first communication chip310may include a first amplifier311, a first linear regulator313LDO1, a second linear regulator315LDO2, a third linear regulator317LDO3, a fourth linear regulator319LDO4, a low-noise amplifier620, a filter/duplexer630, an MIPI controller640, or an antenna switch (ASW)650.

According to an embodiment, the first linear regulator313may provide a third voltage to the first amplifier311using a first voltage supplied from the switching regulator430. The first linear regulator313may be designed to operate if the voltage of the envelope of a first input signal (for example, PA_IN) input from the RFIC222to the first amplifier311corresponds to a first range. The second linear regulator315may provide a fourth voltage to the first amplifier311using a second voltage supplied from the switching regulator430. The second linear regulator315may be designed to operate if the voltage of the envelope of the first input signal corresponds to a second range.

According to an embodiment, the third linear regulator317may provide a seventh voltage to the first amplifier311using a fifth voltage supplied from the switching regulator430. The third linear regulator317may be designed to operate if the voltage of the envelope of the first input signal corresponds to a third range. The fourth linear regulator319may provide an eighth voltage to the first amplifier311using a sixth voltage supplied from the switching regulator430. The fourth linear regulator319may be designed to operate if the voltage of the envelope of the first input signal corresponds to a fourth range.

According to an embodiment, values in the second range (for example, 1.5-1.79V) may be greater than values in the first range (for example, 1-1.49V), values in the third range (for example, 1.8-2.1V) may be greater than values in the second range, and values in the fourth range (for example, 2.11V) may be greater than values in the third range.

According to various embodiments, if the voltage of the envelope of the first input signal is a value between the second range and the third range, the second linear regulator315may be driven, and the third linear regulator317may not be driven. In an embodiment, if the voltage of the envelope of the first input signal is a value between the second range and the third range, the second linear regulator315may be not driven, and the third linear regulator317may be driven. As another example, if a threshold value is set between the second range and the third range such that the voltage of the envelope of the first input signal is equal to/lower than the threshold value, the second linear regulator315may be driven, and if the voltage exceeds the threshold value, the third linear regulator317may be driven.

In an embodiment, if the voltage of the envelope of the first input signal is a value between the third range and the fourth range (for example, 1.95-2.03V), the third linear regulator317may be driven, and the fourth linear regulator319may not be driven. As another example, if a threshold value is set between the third range and the fourth range such that the voltage of the envelope of the first input signal is equal to/lower than the threshold value, the third linear regulator317may be driven, and if the voltage exceeds the threshold value, the fourth linear regulator319may be driven.

According to various embodiments, the switching regulator430may output a relatively large voltage, but the low speed thereof may make it difficult to track the envelope of a wide bandwidth. Multiple linear regulators680may output a relatively small voltage, but the high speed thereof may make it easy to track the envelope of a wide bandwidth.

A comparison betweenFIG.6AandFIG.6Billustrates that a linear regulator410may be included outside the communication chip600inFIG.6A, and multiple linear regulators680may be included inside the first communication chip310inFIG.6B. InFIG.6A, an output (for example, 1.51V) of the ET modulator400, which corresponds to the sum of an output (for example, 0.1V) of the linear regulator410and an output (for example, 1.5V) of the switching regulator430, may be input to the amplifier610. InFIG.6B, using an output (for example, 1.5V) received from the switching regulator430, the multiple linear regulators680may finally provide an output (for example, 1.51V) to the first amplifier311.

Signal distortion may be less severe when a voltage is provided to the first amplifier311from inside the first communication chip310than when a voltage is provided to the amplifier610from outside the first communication chip310as inFIG.6A. Since multiple linear regulators680provide the final voltage with regard to a signal having a wide bandwidth equal to/larger than about 100 MHz (for example, as in 5G), signal distortion may be less severe than when a voltage is provided to the amplifier610from outside the first communication chip310.

In addition, providing a wide range of voltage using multiple linear regulators680as inFIG.6Bmay be more efficient than providing a wide range of voltage (for example, 1.0-2.5V) using one linear regulator410as inFIG.6A. For example, in the case ofFIG.6A, the switching regulator430and the linear regulator410continuously operate to output a voltage corresponding to the envelope. However, in the case ofFIG.6B, the first linear regulator313may operate if the voltage of the envelope corresponds to a first range, the second linear regulator315may operate if the voltage of the envelope corresponds to a second range, the third linear regulator317may operate if the voltage of the envelope corresponds to a third range, and the fourth linear regulator319may operate if the voltage of the envelope corresponds to a fourth range. The efficiency may be higher, since each linear regulator operates to output an optimal voltage in each range, than when a wide range of voltage is output using one linear regulator. Providing an optimal voltage corresponding to the envelope may finally help reducing power consumed by the amplifier.

According to various embodiments, the first amplifier311, the low-noise amplifier620, the filter/duplexer630, the MIPI controller640, or the antenna switch (ASW)650, which is included in the first communication chip310, may use a complementary metal-oxide-semiconductor (CMOS)/silicon-on-insulator (SOI) wafer process. As another example, the ET modulator including the linear regulator313and the switching regulator430may also use the CMOS/SOI wafer process. Therefore, if the linear regulator313, which is one of the components of the ET modulator, is included in the first communication chip310, there may be no chip size change, and chip manufacturing may be facilitated.

FIG.6Cis a diagram illustrating an example configuration of an example electronic device, to which an ET modulator is applied, according to various embodiments.

Referring toFIG.6C, the electronic device according to the disclosure (for example, electronic device101inFIG.1) may include a communication processor (for example, first communication processor212), an RFIC (for example, the RFIC222inFIG.2), a switching regulator430, and/or a first communication chip310(for example, the first communication chip310inFIG.3AtoFIG.3C).

The communication processor212and the RFIC222have been described in detail with reference toFIG.6AorFIG.6B, and repeated descriptions may not be repeated here.

According to an embodiment, the switching regulator430refers to an ET modulator including a switching regulator, and may be the second-type ET modulator illustrated inFIG.4BorFIG.4C. The switching regulator430may be operably connected to a first linear regulator313LDO1, a second linear regulator315LDO2, a third linear regulator317LDO3, and/or a fourth linear regulator319LDO4. The switching regulator430is substantially the same as described in detail with reference toFIG.3AtoFIG.3CorFIG.4AtoFIG.4C, and repeated descriptions thereof may not be repeated here.

The first communication chip310may include an amplifier311(for example, the first amplifier311or the second amplifier321inFIG.3AtoFIG.3C), multiple linear regulators680(for example, a first linear regulator313LDO1, a second linear regulator315LDO2, a third linear regulator317LDO3, and a fourth linear regulator319LDO4), a first switch351, a second switch353, a third switch355, a fourth switch357, a low-noise amplifier620, a filter/duplexer630, an MIPI controller640, or an antenna switch (ASW)650.

According to various embodiments, although the ET DAC660is illustrated inFIG.6Cas being included in the RFIC222, the ET DAC660may be included in the first communication chip310. For example, the ET DAC660may refer to the control circuit330inFIG.3AtoFIG.3C. The ET DAC660may control the first switch351, the second switch353, the third switch355, or the fourth switch357such that one of the ET technology, the APT technology, or the SPT technology is applied to the first amplifier311. If it is difficult to secure a high-efficiency dynamic range of multiple linear regulators680, the ET DAC660may control the output voltage of the switching regulator430to be directly input to the first amplifier311.

For example, the ET DAC660may control the third switch355or the fourth switch357such that a voltage supplied from the switching regulator340is controlled to be supplied to the first amplifier311with no change. For example, if the input signal corresponds to a third code value stored in the signal control table, the ET DAC660may turn on the third switch355such that a voltage (for example, a fifth voltage) supplied from the switching regulator340to the third linear regulator317is controlled to be supplied to the first amplifier311with no change. If the third switch355is turned on, the third linear regulator317may not operate. The ET DAC660may turn off the third switch355such that the fifth voltage output from the switching regulator340is controlled to be provided to the third linear regulator317. If the envelope of the input signal is in a third range, the third linear regulator317may provide a seventh voltage to the first amplifier311using the fifth voltage.

If the input signal corresponds to a fourth code value stored in the signal control table, the ET DAC660may turn on the fourth switch357such that a voltage (for example, a sixth voltage) supplied from the switching regulator340to the fourth linear regulator319is controlled to be supplied to the first amplifier311with no change. If the fourth switch357is turned on, the fourth linear regulator319may not operate. The ET DAC660may turn off the fourth switch357such that the sixth voltage output from the switching regulator340is controlled to be provided to the fourth linear regulator319. If the envelope of the input signal is in a fourth range, the fourth linear regulator319may provide an eighth voltage to the first amplifier311using the sixth voltage.

FIG.7Ais a voltage measurement graph based on simulation of an ET modulator according to various embodiments, andFIG.7Bis a voltage measurement graph based on simulation of an ET modulator according to various embodiments.

FIG.7Ais a voltage measurement graph based on simulation of an ET modulator.

Referring toFIG.7A, the first voltage measurement graph shows an input signal710, an envelope signal730, or a power-supply signal750input to a linear regulator. The input signal710, which is produced by a communication processor (for example, the first communication processor212inFIG.2) in connection with communication (for example, wireless communication), may be input to an amplifier (for example, the first amplifier311inFIG.3AtoFIG.3C) via an RFIC (for example, the first RFIC222or the second RFIC224inFIG.2). The first amplifier311may amplify the input signal710and may thereby output a radio-frequency signal.

The envelope signal730may be a signal produced by a control circuit (for example, the control circuit330inFIG.3AtoFIG.3C, or an ET DAC660) based on the input signal710. The control circuit330may provide the produced envelope signal730to a first linear regulator (for example, the first linear regulator313inFIG.3AtoFIG.3C) or a second linear regulator (for example, the second linear regulator315inFIG.3AtoFIG.3C) included in a communication chip (for example, the first communication chip310or the second communication chip320inFIG.3AtoFIG.3C).

The power-supply signal750may be a voltage (or a signal) provided from a switching regulator (for example, the switching regulator340inFIG.3AtoFIG.3C) disposed outside the first communication chip310to the first linear regulator313to the fourth linear regulator319included in the first communication chip310. For example, if the voltage of the envelope signal730of the input signal710corresponds to a first range (for example, Vdd1-Vdd2), the first linear regulator313may output a third voltage according to the envelope signal730using a first voltage751received from the switching regulator340. If the voltage of the envelope signal730of the input signal710corresponds to a second range (for example, Vdd2-Vdd3), the second linear regulator315may output a fourth voltage according to the envelope signal730using a second voltage753received from the switching regulator340.

If the voltage of the envelope signal730of the input signal710corresponds to a third range (for example, Vdd3-Vdd4), the third linear regulator317may output a seventh voltage according to the envelope signal730using a fifth voltage755received from the switching regulator340. If the voltage of the envelope signal730of the input signal710corresponds to a fourth range (for example, Vdd4-), the third linear regulator317may output an eighth voltage according to the envelope signal730using a sixth voltage757received from the switching regulator340. The third voltage, the fourth voltage, the seventh voltage, or the eighth voltage may refer to a power supply provided to the first amplifier311. The first amplifier311may amplify the input signal710using a voltage output from a linear regulator. The third voltage, the fourth voltage, the seventh voltage, or the eighth voltage may correspond to the envelope signal730.

FIG.7Bis a voltage measurement graph based on simulation of an ET modulator.

Referring toFIG.7B, the second voltage measurement graph shows an input signal710and a signal770input, as a power supply, to a first amplifier311. A control circuit330may control a first switch (for example, the first switch351inFIG.3C) or a second switch (for example, the second switch353inFIG.3C) such that the APT technology or the SPT technology is applied to the first amplifier311. The control circuit330may control an output voltage of a switching regulator340to be input to the first amplifier311with no change. For example, the control circuit330may turn on the first switch351so as to supply a first voltage751from the switching regulator340to the first amplifier311, may turn on the second switch353so as to supply a second voltage753from the switching regulator340to the first amplifier311, may turn on the third switch355so as to supply a fifth voltage755from the switching regulator340to the first amplifier311, and may turn on the fourth switch357so as to supply a sixth voltage757from the switching regulator340to the first amplifier311.

According to an embodiment, an antenna capable of transmitting or receiving signals may be included in an electronic device (for example, the electronic device101inFIG.1). For example, the electronic device may generally transmit an RF signal to a base station using an antenna at the lower end thereof. However, in order to increase the uplink throughput (T-put) or an uplink carrier aggregation (ULCA) technology or an evolved universal terrestrial radio access (UTRA) new radio (NR) dual connectivity (ENDC) technology may be applied to the electronic device101. As such, in order to simultaneously transmit two or more independent RF signals, the electronic device101may use a first antenna (for example, the first antenna module241inFIG.2) or a second antenna (for example, the second antenna module244inFIG.2). According to an embodiment, multiple RF signals may be transmitted using only the first antenna, but parasitic components, such as intermodulation distortion (IMD)/harmonic, may make it difficult to satisfy the 3GPP Spurious spec, and may cause sensitivity degradation. In an embodiment, the electronic device101may have an ET modulator and a communication chip disposed at various locations in the electronic device, as illustrated and described below inFIG.8A,FIG.8B,FIG.9A, andFIG.9B, for the purpose of multiple transmissions (Tx).

According to various embodiments, the first comparative example810and the second comparative example910inFIG.8A,FIG.8B,FIG.9A, andFIG.9Bmay refer to an electronic device including the ET modulator400illustrated inFIG.4A. The first disposition structure850and the second disposition structure950inFIG.8BandFIG.9Bmay refer to an electronic device including the ET modulator450illustrated inFIG.4B(or the ET modulator470illustrated inFIG.4C) and the first communication chip310illustrated inFIG.3B.FIG.8A,FIG.8B,FIG.9A, andFIG.9Bmay illustrate a structure in which an ET modulator and a communication chip are disposed when the user views the display of the electronic device101inFIG.1from the front, or when the user views the rear surface of the electronic device101(opposite to the display).

According to various embodiments, the first disposition structure850and the second disposition structure950can be implemented using a minimum number of ET modulators with no limit on the distance between the ET modulator and the communication chip, even in the case of a scenario in which ULCA/ENDC needs to be supported, without using multiple complicated first-type ET modulators for the electronic device, and use of a simple second-type ET modulator may have advantages in connection with the size, the mounting area, the unit price, the circuit disposition, or the degree of design freedom.

In the following description with reference toFIG.8A,FIG.8B,FIG.9A, andFIG.9B, the ET modulator400illustrated inFIG.4Amay be referred to as a “first-type ET modulator”, and the ET modulator450illustrated inFIG.4Bmay be referred to as a “second-type ET modulator”. Similarly, the communication chip600inFIG.6Amay be referred to as a “first-type communication chip”, and the first communication chip310inFIG.3Amay be referred to as a “second-type communication chip”.

FIG.8Ais a diagram illustrating an example structure in which components included in an electronic device are disposed according to a comparative example.

Referring toFIG.8A, the first comparative example810may illustrate a structure in which, when the circuit board of an electronic device is implemented as a half board, a first-type ET modulator and a first-type communication chip are disposed inside the half board. For example, the half board may be a circuit board formed such that, when a surface (for example, front or rear surface) of an electronic is seen from above, the same can be disposed in approximately half the area of the electronic device. The first-type ET modulator may refer to the ET modulator400illustrated inFIG.4A, and the first-type communication chip may refer to the communication chip600inFIG.6A. The circuit board of the electronic device101may include a first substrate830and a second substrate835and may have a structure in which an FPCB-type RF cable (FRC)837connects the first substrate830and the second substrate835. In addition, the electronic device may include a battery833between the first substrate830and the second substrate835. For example, the first substrate830may be the main circuit board, and the second substrate835may be the sub circuit board. The first substrate830may have a first-type ET modulator and a first-type communication chip disposed thereon.

In connection with the first comparative example810, if the electronic device101include multiple communication chips and five antennas connected to the multiple communication chips, the first-type ET modulator may be disposed so as to correspond to each communication chip. The first-type ET modulator may include, as inFIG.4A, a linear regulator410, a comparator420, and a switching regulator430. The first-type communication chip refers to the communication chip600inFIG.6A, and may include at least one of the amplifier610, the low-noise amplifier620, the MIPI controller640, the filter/duplexer630, or the antenna switch (ASW)650illustrated inFIG.6A.

For example, in the first comparative example810, the first-type ET modulator may include an ETIC1801, an ETIC2802, an ETIC3803, an ETIC4804, and/or an ETIC5805. In addition, in the first comparative example810, the first-type communication chip may include a first communication chip com_chip1811, a second communication chip com_chip2812, a third communication chip com_chip3813, a fourth communication chip com_chip4814, and/or a fifth communication chip com_chip5815. The first communication chip811may be connected to the ETIC1801and a first antenna (or antenna module)821(for example, the first antenna module242inFIG.2). For example, the first communication chip811may process (or amplify) an RF signal in a Sub6 band (for example, about 6 GHa or less) used for a second network (for example, the second network294inFIG.2). The first communication chip811may transmit or receive a signal (for example, a radio-frequency signal) through the first antenna821. The second communication chip812may be connected to the ETIC2802and a second antenna822(for example, the second antenna module244inFIG.2). For example, the second communication chip812may process an RF signal in a 5G Above6 band (for example, about 6 GHz or higher) used for the second network294. The second communication chip812may transmit or receive signals through the second antenna822.

According to various embodiments, if the ETIC1801is connected to the first communication chip811and the second communication chip812and then used, the second length L2between the ETIC1801and the second communication chip812may be larger than the first length L1between the ETIC1801and the first communication chip811. As used herein, the first length L1or the second length L2may refer to the length between the output terminal of the ETIC (for example, the terminal through which an envelope signal (for example, a voltage) is output from the ETIC) and the input terminal of the amplifier included in the communication chip (for example, the terminal to which the envelope signal from the ETIC is input). Signal distortion may occur if the length between the ETIC and the communication chip increases, as in the case of the second length L2, the third length L3, or the fourth length L4.

The signal distortion may worsen if the length (or distance) between the ETIC and the communication chip or the signal bandwidth increases. For example, if the first communication chip811and the second communication chip812transmit signals in a wide bandwidth of 100 MHz or larger, signal distortion may occur due to the distance between the ETIC1801and the second communication chip812. In order to remedy such a drawback, one ETIC may be disposed on one communication chip in the first comparative example810. The more communication chips included in the electronic device101, the more ETICs need to be disposed, and this may increase the ETIC mounting area or the ETIC disposition cost.

As another example, the third communication chip813may be connected to the ETIC3803and a third antenna823(for example, the third antenna module246inFIG.2). For example, the third communication chip813may process an RF signal in an intermediate frequency band (for example, about 9 GHz to about 11 GHz) used for the second network294. The third communication chip813may transmit or receive signals through the third antenna823. The fourth communication chip814may be connected to the ETIC4804and a fourth antenna LB824. For example, the fourth communication chip814may process an RF signal in a low-band frequency band (for example, about 700 MHz to about 3 GHz) used for the first network (for example, the first network292inFIG.2). The fourth communication chip814may transmit or receive signals through the fourth antenna824. The fifth communication chip815may be connected to the ETIC5805and a fifth antenna OMH825. For example, the fifth communication chip815may process an RF signal in an intermediate frequency band or a high-band frequency band used for the first network292. The fifth communication chip815may transmit or receive signals through the fifth antenna825.

According to various embodiments, the structure in which ET modulators and communication chips are disposed may vary depending on the implementation. For example, the first communication chip811to the third communication chip813are illustrated in the diagram as being disposed closer to the upper end, with reference to the center of the electronic device101, than the fourth communication chip814and the fifth communication chip815. The fourth communication chip814and the fifth communication chip815may instead be disposed closer to the upper end, with reference to the center of the electronic device101, than the first communication chip811to the third communication chip813.

FIG.8Bis a diagram illustrating an example structure in which components included in an electronic device are disposed according to various embodiments.

Referring toFIG.8B, the first disposition structure850may illustrate a structure in which, when the circuit board of an electronic device101is implemented as a half board, a second-type ET modulator and a second-type communication chip are disposed inside the half board. The second-type ET modulator may refer to the ET modulator450illustrated inFIG.4Bor the ET modulator470inFIG.4C. The second-type communication chip may refer to the first communication chip310inFIG.6BorFIG.6C. The circuit board of the electronic device101may include a first substrate830and a second substrate835and may have a structure in which an FPCB-type RF cable (FRC)837connects the first substrate830and the second substrate835. In addition, the electronic device may include a battery833between the first substrate830and the second substrate835. For example, the first substrate830may be the main circuit board, and the second substrate835may be the sub circuit board. The first substrate830may have a second-type ET modulator and a second-type communication chip disposed thereon.

According to various embodiments, assuming that the user views the display of the electronic device101(for example, the display device160inFIG.1) from the front (or the user views the rear surface of the electronic device101(opposite to the display)), the position in which the first substrate830is disposed on the diagram may correspond to the upper end with reference to the center of the electronic device101, and the position in which the second substrate835is disposed on the diagram may correspond to the lower end with reference to the center of the electronic device101. As another example, the position in which the first substrate830is disposed may correspond to the lower end with reference to the center of the electronic device101, and the position in which the second substrate835is disposed may correspond to the upper end with reference to the center of the electronic device101. This is only an example of implementing the electronic device101, and descriptions thereof do not limit the disclosure.

According to the first disposition structure850, if the electronic device101includes multiple communication chips and five antennas connected to the multiple communication chips, a second-type ET modulator may be disposed so as to correspond to the communication chips. The second-type ET modulator may include a switching regulator430as inFIG.4B, or the first switching regulator430or the second switching regulator435as inFIG.4C. The second-type ET modulator, which includes a switching regulator, may hereinafter be referred to as a switching regulator as a whole. The second-type communication chip refer to the first communication chip310inFIG.6BorFIG.6C, and may include at least one of the first amplifier310, the multiple linear regulators680, the low-noise amplifier620, the MIPI controller640, the filter/duplexer630, or the antenna switch (ASW)650illustrated inFIG.6B, for example.

For example, in the first disposition structure850, the second-type ET modulator may include a first switching regulator SL1871or a second switching regulator SL2872. In addition, in the first disposition structure850, the second-type communication chip may include a first communication chip com_chip1881, a second communication chip com_chip2882, a third communication chip com_chip3883, a fourth communication chip com_chip4884, and/or a fifth communication chip com_chip5885. According to an embodiment, the first communication chip881, the second communication chip882, and the third communication chip883may be connected to the first switching regulator871, and the fourth communication chip884and the fifth communication chip885may be connected to the second switching regulator872. In an embodiment, the first communication chip881may be connected to the first antenna821, the second communication chip882may be connected to the second antenna822, the third communication chip883may be connected to the third antenna823, the fourth communication chip884may be connected to the fourth antenna824, and the fifth communication chip885may be connected to the fifth antenna825.

For example, the first communication chip881may process (or amplify) an RF signal in a Sub6 band (for example, about 6 GH or less) used for the second network (for example, the second network294inFIG.2). The second communication chip882may process an RF signal in a 5G Above6 band (for example, about 6 GH or higher) used for the second network294. In addition, the third communication chip883may process an RF signal in an intermediate frequency band (for example, about 9 GHz to about 11 GHz) used for the second network294. The fourth communication chip884may process an RF signal in a low-band frequency band (for example, about 700 MHz to about 3 GHz) used for the first network (for example, the first network292inFIG.2). The fifth communication chip885may process an RF signal in an intermediate frequency band or a high-band frequency band used for the first network292.

According to various embodiments, in the first disposition structure850, the first switching regulator871may be connected to the first communication chip881, the second communication chip882, and/or the third communication chip883and then used. According to an embodiment, a linear regulator (for example, the multiple linear regulators680inFIG.6B) is included in the first communication chip881, the second communication chip882, and/or the third communication chip883. For example, the linear regulator included in the first communication chip881, the second communication chip882, and/or the third communication chip883may receive a voltage supplied from the first switching regulator871and may provide the voltage to an amplifier included in the communication chip. The linear regulator may control the voltage (or signal) more minutely than the first switching regulator871and, since the same is included in the communication chip, a signal output from the linear regulator may be input to the amplifier with no distortion.

According to various embodiments, if the signal output from the linear regulator is distorted, the electronic device101may be more heavily affected than in the case of distortion of a signal output from the switching regulator. A comparison between the first comparative example810and the first disposition structure850shows that the length (for example, L5, L6, L7, or L8) between the first switching regulator871and each communication chip in the first disposition structure850may be equal to or larger than the distance (for example, L2, L3, or L4) between the ETIC and each communication chip812in the first comparative example810. In the first disposition structure850, even if the length between the first switching regulator871and the first communication chip881, the second communication chip882, or the third communication chip883is large, a signal output from a linear regulator may be input to an amplifier with no distortion because the linear regulator is included in the first communication chip881, the second communication chip882, or the third communication chip883.

According to an embodiment, if the first communication chip881, the second communication chip882, or the third communication chip883transmits a signal in a wide bandwidth equal to/higher than 100 MHz, minute control is performed by the linear regulator included in the first communication chip881, the second communication chip882, or the third communication chip883, and signal distortion (for example, noise) resulting from the length between the first switching regulator871and the first communication chip881, the second communication chip882, or the third communication chip883may accordingly be reduced. In addition, since one switching regulator is disposed per two or three communication chips in the first disposition structure850, the number of switching regulators to be disposed may not increase even if more communication chips are included in the electronic device101. This is because one switching regulator can provide a voltage to two or three communication chips such that, in the first disposition structure850, the area in which switching regulators or the cost for disposing them may be less than in the comparative example810. In addition, compared with the first comparative example810, the first disposition structure850may have a reduced number of switching regulators corresponding to the ETIC such that components included in the electronic device101may be more freely disposed and used. In addition, multiple linear regulators optimized for each communication chip may be disposed in the first disposition structure850such that the ET technology can be implemented efficiently with regard to signals corresponding to 5G frequency bands.

According to various embodiments, the structure in which switching regulators and communication chips are disposed may vary depending on the implementation. For example, the first communication chip811to the third communication chip813are illustrated in the diagram as being disposed closer to the upper end, with reference to the center of the electronic device101, than the fourth communication chip814and the fifth communication chip815. The fourth communication chip814and the fifth communication chip815may instead be disposed closer to the upper end of the electronic device101than the first communication chip811to the third communication chip813. As another example, the number of switching regulators, communication chips, or antennas included in the electronic device101may not be limited toFIG.8B.

FIG.9Ais a diagram illustrating an example structure in which components included in an electronic device are disposed according to a comparative example.

Referring toFIG.9A, the second comparative example910may illustrate a structure in which, when the circuit board of an electronic device is implemented as a “⊃”-shaped board (or a board having a U-shape rotated by 90° clockwise or counterclockwise), a first-type ET modulator (for example, the ET modulator400inFIG.4A) and a first-type communication chip (for example, the communication chip600inFIG.6A) are disposed inside the “⊃”-shaped board. The electronic device may include a “⊃”-shaped main circuit board930and a battery933. The first-type ET modulator and the first-type communication chip may be disposed on the main circuit board930.

The second comparative example910and the first comparative example810, compared with each other, differ only in the structure in which the ETIC and the communication chip are disposed according to the circuit board type. Details of the ETIC and the communication chip have been described in detail with reference toFIG.8A, and repeated descriptions thereof may not be repeated here.

According to various embodiments, if an ETIC1801is connected to a first communication chip811and a second communication chip812and then used, the second length L2between the ETIC1801and the second communication chip812may be larger than the length L1between the ETIC1801and the first communication chip811. As used herein, the first length L1or the second length L2may refer to the length between the output terminal of the ETIC and the input terminal of the amplifier included in the communication chip (for example, the terminal to which the envelope signal from the ETIC is input). Signal distortion may occur if the length between the ETIC1801and the second communication chip812increases, as in the case of the second length L2. In order to remedy such a drawback, one first-type communication chip may be disposed on one first-type ET modulator in the second comparative example910.

FIG.9Bis a diagram illustrating an example structure in which components included in an electronic device are disposed according to various embodiments.

Referring toFIG.9B, the second disposition structure950may illustrate a structure in which, when the circuit board of an electronic device101is implemented as a “⊃”-shaped board (or a board having a U-shape rotated by 90° clockwise or counterclockwise), a second-type ET modulator (for example, the ET modulator450inFIG.4Bor the ET modulator470inFIG.4C) and a second-type communication chip (for example, the first communication chip310inFIG.6BorFIG.6C) are disposed inside the “⊃”-shaped board. The electronic device101may include a “⊃”-shaped main circuit board930and a battery933. The second-type ET modulator and the second-type communication chip may be disposed on the main circuit board930.

The second disposition structure950and the first disposition structure850, compared with each other, differ only in the structure in which the switching regulator and the communication chip disposed according to the circuit board type. Details of the switching regulator and the communication chip have been described in detail with reference toFIG.8B, and repeated descriptions thereof may not be repeated here.

According to various embodiments, in the second disposition structure950, a first switching regulator871may be connected to a first communication chip881, a second communication chip882, and a third communication chip883and then used. For example, the first communication chip881and the second communication chip882may be disposed adjacent to the upper end, with reference to the center of the electronic device101, and the third communication chip883may be disposed adjacent to the center of the electronic device101. As another example, in the second disposition structure950, a second switching regulator872may be connected to a fourth communication chip884and a fifth communication chip885and then used. The fourth communication chip884and the fifth communication chip885may be disposed adjacent to the lower end with reference to the center of the electronic device101.

A comparison between the second comparative example910and the second disposition structure950shows that the length (for example, L5, L6, or L7) between the first switching regulator871and each communication chip in the second disposition structure950may be equal to or larger than the second length L2between the ETIC1801and the second communication chip812in the second comparative example910. In the second disposition structure950, even if the length between the first switching regulator871and the first communication chip881, the second communication chip882, or the third communication chip883is large, a signal output from a linear regulator may be input to an amplifier with no distortion because the linear regulator is included in the first communication chip881, the second communication chip882, or the third communication chip883.

According to various embodiments, the structure in which switching regulators and communication chips are disposed may vary depending on the implementation. For example, the first communication chip881and the second communication chip882are illustrated in the diagram as being disposed closer to the upper end, with reference to the center of the electronic device101, than the fourth communication chip814and/or the fifth communication chip815. The fourth communication chip814and/or the fifth communication chip815may instead be disposed at the upper end with reference to the center of the electronic device101, and the first communication chip881and/or the second communication chip882may be disposed closer to the lower end with reference to the center of the electronic device101.

FIG.10is a flowchart illustrating example operations of an electronic device according to various embodiments.

Referring toFIG.10, in operation1001, a control circuit330(or an ET DAC660) of an electronic device according to various embodiments (for example, the electronic device101inFIG.1) may produce an envelope of an input signal. The input signal, which is input to a communication chip (for example, the first communication chip310inFIG.3AtoFIG.3C) of the electronic device101, may refer to a signal related to communication (for example, wireless communication) from a communication processor (for example, the first communication processor212inFIG.2). The input signal may be input to an amplifier (for example, the first amplifier311inFIG.3AtoFIG.3C) included in the first communication chip310. The control circuit330may produce an envelope (or an envelope signal) based on the input signal. The control circuit330may provide the produced envelope to a linear regulator (for example, the first linear regulator313or the second linear regulator315inFIG.3AtoFIG.3C).

In operation1003, the control circuit330may determine whether the voltage of the envelope of the input signal is in a first range. The first linear regulator313or the second linear regulator315may be configured (or designed) to operate (or to be driven) if the voltage of the envelope corresponds to the configured range. The control circuit330may control the first linear regulator313or the second linear regulator315so as to selectively operate based on the voltage of the envelope of the input signal. The control circuit330may control so as to perform operation1007if the voltage of the envelope of the input signal corresponds to the first range (“Yes” in operation1003), and may operate so as to perform operation1005if the voltage of the envelope of the input signal does not correspond to the first range (“No” in operation1003).

If the voltage of the envelope of the input signal does not correspond to the first range, the control circuit330may determine, in operation1005, whether the voltage of the envelope of the input signal is in a second range. If the voltage of the envelope of the input signal is in the second range (“Yes” in operation1005), the control circuit330may control so as to perform operation1009, and if the voltage of the envelope of the input signal is not in the second range (“No” in operation1005), the control circuit330may control so as to perform operation1011.

If the voltage of the envelope of the input signal corresponds to the first range, the control circuit330may drive the first linear regulator313in operation1007. Using a first voltage supplied from the switching regulator340, the first linear regulator313may provide a third voltage to the first amplifier311included in the first communication chip310according to the envelope of the input signal. For example, the third voltage may be equal to or higher than the first voltage.

If the voltage of the envelope of the input signal corresponds to the second range, the control circuit330may drive the second linear regulator315in operation1009. Using a second voltage supplied from the switching regulator340, the second linear regulator315may provide a fourth voltage to the first amplifier311included in the first communication chip310according to the envelope of the input signal. For example, the second voltage may be higher than the first voltage. For example, the fourth voltage may be equal to or higher than the second voltage and may be higher than the third voltage.

If the voltage of the envelope of the input signal does not correspond to the second range (“No” in operation1005), the control circuit330may drive the third linear regulator317in operation1011. Using a fifth voltage supplied from the switching regulator340, the third linear regulator317may provide a seventh voltage according to the envelope of the input signal. For example, the fifth voltage may be higher than the first voltage or the second voltage. The seventh voltage may be equal to or higher than the fifth voltage and may be higher than the fourth voltage.

Although it has been assumed in the description with reference toFIG.10that three linear regulators are included, the disclosure is not limited by the description.

FIG.11is a flowchart illustrating example operations of an electronic device according to various embodiments.FIG.11may illustrate operations performed in a situation (or state) in which no ET technology is applied to an amplifier included in a communication chip.

Referring toFIG.11, in operation1101, a control circuit330(or an ET DAC660) of an electronic device according to various embodiments (for example, the electronic device101inFIG.1) may identify a code value of an input signal (for example, a first input signal). The control circuit330may implement an APT operation or an SPT operation based on the code value of the input signal. According to various embodiments, a memory (for example, the memory130inFIG.1) of the electronic device101may have a signal control table stored therein in connection with application of the APT technology or SPT technology.

In operation1103, the control circuit330may determine whether the code value of the input signal corresponds to a first code value. The control circuit330may determine whether the code value of the input signal corresponds to the first code value based on the signal control table stored in the memory130. If the code value of the input signal corresponds to the first code value (“Yes” in operation1103), the control circuit330may perform operation1107, and if the code value of the input signal does not correspond to the first code value (“No” in operation1103), the control circuit330may perform operation1105.

If the code value of the input signal corresponds to the first code value (“Yes” in operation1103), the control circuit330may turn on the first switch351in operation1107. By turning on the first switch351, the control circuit330may control a voltage (for example, a first voltage) supplied from the switching regulator340to the first linear regulator313so as to be supplied to the first amplifier311with no change.

If the code value of the input signal does not correspond to the first code value (“No” in operation1103), the control circuit330may determine, in operation1105, whether the code value of the input signal corresponds to a second code value. The control circuit330may identify whether the code value of the input signal corresponds to the second code value based on a signal control table stored in the memory130. If the code value of the input signal corresponds to the second code value (“Yes” in operation1105), the control circuit330may perform operation1109, and if the code value of the input signal does not correspond to the second code value (“No” in operation1105), the control circuit330may perform operation1111.

If the code value of the input signal corresponds to the second code value (“Yes” in operation1105), the control circuit330may turn on the second switch353in operation1109. By turning on the second switch353, the control circuit330may control a voltage (for example, a second voltage) supplied from the switching regulator340to the second linear regulator315so as to be supplied to the first amplifier311with no change.

If the code value of the input signal does not correspond to the second code value (“No” in operation1105), the control circuit330may turn on the third switch355in operation1111. By turning on the third switch355, the control circuit330may control a voltage (for example, a fifth voltage) supplied from the switching regulator340to the third linear regulator317so as to be supplied to the first amplifier311with no change.

Although it has been assumed in the description with reference toFIG.11that three switches are included, the disclosure is not limited by the description.

An electronic device according to various example embodiments (for example, the electronic device101inFIG.1) may include: an antenna (for example, the first antenna module197inFIG.1or the first antenna module242inFIG.2); a switching regulator (for example, the switching regulator340inFIG.3AtoFIG.3C); a communication chip (for example, the first communication chip310inFIG.3AtoFIG.3C) including an amplifier (for example, the first amplifier311inFIG.3AtoFIG.3C), a first linear regulator (for example, the first linear regulator313inFIG.3AtoFIG.3C) operably connected to the amplifier and the switching regulator and configured to be supplied with a first voltage from the switching regulator, and a second linear regulator (for example, the second linear regulator315inFIG.3AtoFIG.3C) operably connected to the amplifier and the switching regulator and configured to be supplied with a second voltage higher than the first voltage from the switching regulator, the communication chip configured to transmit a radio-frequency signal outside of the electronic device through the antenna; and a control circuit. The control circuit (for example, the control circuit330inFIG.3AtoFIG.3C) may be configured to produce an envelope of an input signal input to the amplifier in connection with the radio-frequency signal and to provide the produced envelope to at least one of the first linear regulator or the second linear regulator. The first linear regulator may be configured to provide a third voltage corresponding to the envelope to the amplifier using the first voltage based on the envelope having a voltage in a first range. The second linear regulator may be configured to provide a fourth voltage higher than the third voltage to the amplifier using the second voltage based on the voltage of the envelope being in a second range including values larger than values included in the first range.

The control circuit may be configured to control the envelope, thereby controlling the first linear regulator or the second linear regulator so as to operate selectively.

The switching regulator may be configured to provide the first voltage to the first linear regulator and to provide the second voltage to the second linear regulator.

The switching regulator may be configured to include: a first switching regulator (for example, the first switching regulator430inFIG.4C) configured to provide the first voltage to the first linear regulator; and a second switching regulator (for example, the second switching regulator435inFIG.4C) configured to provide the second voltage to the second linear regulator.

The communication chip may further include: a first switch (for example, the first switch351inFIG.3B) operably connected to the switching regulator and the first linear regulator; and a second switch (for example, the second switch353inFIG.3B) operably connected to the switching regulator and the second linear regulator. The control circuit may be configured to control the first switch and/or the second switch such that a voltage supplied from the switching regulator is provided to the amplifier.

The control circuit may be configured to turn on the first switch, based on the input signal having a code value corresponding to a first code value, such that the first voltage supplied from the switching regulator to the first linear regulator is provided to the amplifier.

The control circuit may be configured to turn on the second switch, based on the input signal having a code value corresponding to a second code value, such that the second voltage supplied from the switching regulator to the second linear regulator is provided to the amplifier.

The control circuit may be configured to turn off the first switch, based on the envelope having a voltage in the first range, and to turn off the second switch, based on the voltage of the envelope being in the second range.

Based on the first switch being turned off, the first linear regulator may be configured to provide a third voltage corresponding to the envelope of the input signal as a power supply to the amplifier, based on the envelope having a voltage in the first range. Based on the second switch being turned off, the second linear regulator may be configured to provide the fourth voltage as a power supply to the amplifier, based on the voltage of the envelope corresponding to the second range.

The control circuit may be configured to include an envelope-tracking digital-analog converter (ET DAC) (for example, the ET DAC660inFIG.6B).

The ET DAC may be disposed inside the communication chip or outside the communication chip.

A first length between the switching regulator and the amplifier may be longer than a second length between the linear regulator and the amplifier.

The electronic device may further include a second communication chip (for example, the second communication chip320inFIG.3C) including: a second amplifier (for example, the second amplifier321inFIG.3C), a third linear regulator (for example, the third linear regulator323inFIG.3C) operably connected to the second amplifier and the switching regulator and configured to be supplied with a fifth voltage from the switching regulator; and a fourth linear regulator (for example, the fourth linear regulator325inFIG.3C) operably connected to the second amplifier and the switching regulator and configured to be supplied with a sixth voltage higher than the fifth voltage from the switching regulator. The second communication chip may be configured to transmit a second radio-frequency signal through the antenna.

The control circuit may be configured to produce a second envelope of a second input signal input to the second amplifier in connection with the second radio-frequency signal and to provide the produced second envelope to at least one of the third linear regulator or the fourth linear regulator. The third linear regulator may be configured to provide a seventh voltage corresponding to the envelope of the second input signal to the second amplifier using the fifth voltage, based on the second envelope having a voltage in a third range. The fourth linear regulator may be configured to provide an eighth voltage higher than the seventh voltage to the second amplifier using the sixth voltage, based on the voltage of the second envelope being in a fourth range including values larger than values included in the third range.

A first length between the switching regulator and the amplifier may be shorter than a third length between the switching regulator and the second amplifier.

A communication chip (for example, the first communication chip310inFIG.3AtoFIG.3C) configured to process a radio-frequency signal received and/or transmitted in an electronic device according to various embodiments may include: an amplifier (for example, the first amplifier311inFIG.3AtoFIG.3C); a first linear regulator (for example, the first linear regulator313inFIG.3AtoFIG.3C) operably connected to the amplifier; and a second linear regulator (for example, the second linear regulator315inFIG.3AtoFIG.3C) operably connected to the amplifier. The first linear regulator may be configured to receive a first voltage supplied from the switching regulator of the electronic device and to provide a third voltage to the amplifier using the first voltage. The second linear regulator may be configured to receive a second voltage supplied from the switching regulator and to provide a fourth voltage to the amplifier using the second voltage.

The first linear regulator may be configured to receive an envelope of a radio-frequency signal to be transmitted from a control circuit of the electronic device and to provide the third voltage to the amplifier so as to correspond to the envelope, based on the envelope having a voltage corresponding to a first range. The amplifier may be configured to amplify the radio-frequency signal using the third voltage.

The second linear regulator may be configured to receive an envelope of an input signal related to a radio-frequency signal to be transmitted from a control circuit of the electronic device and to provide the fourth voltage to the amplifier so as to correspond to the envelope, based on the envelope having a voltage corresponding to a second range. The amplifier may be configured to amplify the input signal using the fourth voltage such that the radio-frequency signal to be transmitted is output.

The communication chip may further include: a first switch (for example, the first switch351inFIG.3B) operably connected to the switching regulator and the first linear regulator; and a second switch (for example, the second switch353inFIG.3B) operably connected to the switching regulator and the second linear regulator.

The amplifier may be configured to receive the first voltage from the switching regulator (e.g., not via the first linear regulator), based on the first switch being turned on, and to receive the second voltage from the switching regulator (e.g., not via the second linear regulator), based on the second switch being turned on.

According to various example embodiments, by including a linear regulator of an ET modulator in a communication chip, an ET technology may be applied with regard to a signal in a wide bandwidth between the linear regulator and the communication chip.

According to various example embodiments, by including multiple linear regulators in a communication chip so as to provide different voltages, the multiple linear regulators may provide a voltage corresponding to an amplifier.

According to various example embodiments, by supplying a power supply (or voltage) to multiple power amplifiers through a small number of ET modulators, the area in which components of an electronic device are mounted may be reduced, and the cost of using components may be decreased.