Method of fabricating a semiconductor device with reduced leak paths

A method of fabricating a semiconductor device with reduced leak paths is disclosed. The method comprises etching a void in non-conductive material in the semiconductor device to provide a conduction path between isolated material, forming a non-conductive surface layer on an unintended conductive item adjacent to the void, and filling the void with a conductive material. Forming a non-conductive surface layer may comprise oxidizing a surface surrounding the void. Forming a non-conductive surface layer may comprise oxidizing a side wall of the void. Forming a non-conductive surface layer may comprise oxidizing a surface surrounding the void using plasma oxidation operations. Forming a non-conductive surface layer may comprise oxidizing a side wall of the void using plasma oxidation operations. The unintended conductive item may comprise a conductive impurity or conductive residue. The void may comprise a trench or a hole for a via.

BACKGROUND

The technology described in this patent document relates to MOSFET devices, and more specifically to reducing leak paths in MOSFET devices.

Scaling of semiconductor devices, such as a metal-oxide semiconductor field-effect transistor (MOSFET), has enabled continued improvement in speed, performance, density, and cost per unit function of integrated circuits over the past few decades. Reducing leak paths in MOSFET devices can further the scaling of integrated circuits.

DETAILED DESCRIPTION

In semiconductor fabrication, the pattern pitch is getting narrower and process window margins such as the over-etch window is constrained. Meanwhile, the leak tolerance is often very tight. Process metal residue, conductive by-products, or in-film conductive impurities may lead to a leak path resulting in electrical failure. The following examples provide methods to reduce the occurrence of a leak path.

FIG. 1is a diagram depicting a cross sectional view of a portion of a semiconductor device10. Illustrated are two voids12,14that may be etched or otherwise formed in non-conductive portions of the semiconductor device10that may, for example, serve as a hole for a via or metal contact that provides a conduction path between material that is otherwise isolated. Also shown are two unintended conductive items16,18that exist in the semiconductor device. These unintended conductive items16,18may, for example, be conductive structures such as metal residue, a conductive by-product, an in-film conductive impurity, or some other unintended conductive item. Because of their particular placement in this example, the unintended conductive items may provide a leak path between the two voids after the voids are filled with metallic or other conductive material.

FIG. 2is a diagram depicting a cross sectional view of a portion of a semiconductor device20. Illustrated are two voids22,24that may be formed in the semiconductor device20that may, for example, serve as a trench or a hole for a via or metal contact that provides a conduction path between material that is otherwise isolated. Also shown are two unintended conductive items26,28that exist in the semiconductor device. These unintended conductive items26,28may, for example, be conductive structures such as a metal or other conductive residue, a conductive by-product, an in-film conductive impurity, or some other unintended conductive item. These unintended conductive items26,28have had a non-conductive surface layer material, such as a non-conductive oxide surface layer, formed on their surfaces to prevent these conductive items26,28from providing a conduction path, i.e., a leak path, between the two voids22,24after the voids are filled with metallic or other conductive material. The application of a non-conductive surface layer material to the unintended conductive items may reduce the occurrences of a leak path between conductive elements in the semiconductor device such as metal gates, vias, contacts, metal trenches, etc.

FIG. 3is a process flow chart depicting an example process for applying a non-conductive surface layer to unintended conductive items near voids such as holes and trenches. In this example, a trench or a hole for a via or metal contact is formed through operations such as etching operations (operation102). Prior to filling the trench or hole with conductive material, non-conductive surface layer application operations such as oxidation operations and more particularly plasma oxidation operations may be applied a surface surrounding the hole opening and to side walls of the hole or trench (operation104). The application of plasma oxidation operations to a surface surrounding the hole or trench opening may cause a non-conductive oxide surface layer to be formed on an unintended conductive item located adjacent to the trench or hole opening, such as the non-conductive oxide surface layer formed on the unintended conductive item26ofFIG. 2. The application of plasma oxidation operations to side walls of the hole or trench may cause a non-conductive oxide surface layer to be formed on an unintended conductive item located adjacent to sidewalls of the trench or hole, such as the non-conductive oxide surface layer formed on the unintended conductive item28ofFIG. 2. After non-conductive surface layer application operations are performed, the hole or trench may be filled with conductive material such as metal material (operation106).

FIGS. 4-7depict cross-sectional views of an example semiconductor device during different stages of fabrication. Depicted inFIG. 4is a semiconductor device having an substrate200, a first oxidation diffusion (OD) region202, a second OD region204, a metal gate206of a first transistor, a metal gate208of a second transistor, an etch stop layer (ESL210), an interlayer dielectric layer (ILD0212), spacers214surrounding the metal gates206,208, and an unintended conductive item216. The unintended conductive item216, in this example, comprises metal gate (MG) residue or MG metallic extrusion resulting from metal gate chemical mechanical polishing (CMP) operations.

Depicted inFIG. 5, is the example semiconductor device after a second ESL218has been deposited and a contact hole220has been etched. In this example, the unintended conductive item216forms a conductive bridge between the contact hole220and the metal gate208.

Depicted inFIG. 6, is the example semiconductor device after plasma oxidation operations have been performed on side walls of the contact hole220. In this example, a surface area222of the unintended conductive item216has been oxidized by the plasma oxidation operations to form an insulator to prevent a conductive bridge between the contact hole220and the metal gate208.

Depicted inFIG. 7, is the example semiconductor device after metal gap filling of the contact hole220. In this example, the surface area222of the unintended conductive item216has blocked the formation of a conductive bridge between the metal224in the contact hole220and the metal gate208.

FIG. 8depicts a cross-sectional view of another example semiconductor device. Depicted inFIG. 4is a semiconductor device300having a substrate302, a first OD region304, a second OD region306, a metal gate308of a first transistor, a metal gate310of a second transistor, a first insulator layer312, an ILD0314, spacers316surrounding the metal gates308,310, a contact318, a second insulator layer320, an intermediate dielectric layer322, a third insulator layer324, a first via326, a metal contact328, a second via330, and a metal capacitor having a bottom metal plate332and a top metal plate334.

The example semiconductor device300also has three unintended conductive items: poly residue336(e.g., residue from dummy poly gate removal), metal gate residue338(e.g., residue from metal gate etching operations), and metal residue340(e.g., residue from metal plate formation). The example semiconductor device300has non-conductive surface layer oxide applied to each of the three unintended conductive items. The poly residue336has an oxidized surface area342to prevent bridging between the contact318and the metal gate310through the poly residue336. The metal gate residue338has an oxidized surface area344to prevent bridging between the contact318and the metal gate310through the metal gate residue338. The metal residue340has an oxidized surface area346to prevent bridging between the via330and the metal plate332through the metal residue340.

The preceding examples illustrate that in a semiconductor fabrication process the surface surrounding a void and side walls within the void may be oxidized, for example, by plasma oxidation in a last step in the void etching process. The surface oxide formed on an unintended conductive item by the oxidation operation may effectively block a potential leak path between conductive items that are intended to be isolated from each other.

In one embodiment, disclosed is a method of fabricating a semiconductor device with reduced leak paths. The method comprises etching a void in non-conductive material in the semiconductor device to provide a conduction path between isolated material, forming a non-conductive surface layer on an unintended conductive item adjacent to the void, and filling the void with a conductive material.

These aspects and other embodiments may include one or more of the following features. Forming a non-conductive surface layer may comprise oxidizing a surface surrounding the void. Forming a non-conductive surface layer may comprise oxidizing a side wall of the void. Forming a non-conductive surface layer may comprise oxidizing a surface surrounding the void using plasma oxidation operations. Forming a non-conductive surface layer may comprise oxidizing a side wall of the void using plasma oxidation operations. The unintended conductive item may comprise a conductive impurity or conductive residue. The void may comprise a trench or a hole for a via.

In another embodiment, a semiconductor device is disclosed. The semiconductor device comprises an area in which a void had been formed in non-conductive material in the semiconductor device to provide a conduction path between isolated material, a non-conductive surface layer formed on an unintended conductive item adjacent to the void area, and conductive material inside the void area.

These aspects and other embodiments may include one or more of the following features. The non-conductive surface layer may comprise a non-conductive oxide surface layer that is formed by oxidizing a surface surrounding the void. The non-conductive surface layer may comprise a non-conductive oxide surface layer that is formed by oxidizing a side wall of the void. The non-conductive surface layer may comprise a non-conductive oxide surface layer that is formed by oxidizing a surface surrounding the void using plasma oxidation operations. The non-conductive surface layer may comprise a non-conductive oxide surface layer that is formed by oxidizing a side wall of the void using plasma oxidation operations. The unintended conductive item may comprise a conductive impurity or conductive residue. The void may comprise a trench or a hole for a via.

In another embodiment, a semiconductor device is disclosed. The semiconductor device comprises a first non-conductive oxide surface layer formed on a first unintended conductive item and a second non-conductive oxide surface layer formed on a second unintended conductive item. Each of the first and second non-conductive oxide surface layers is adjacent to an area in which a void had been formed. Each of the first and second non-conductive oxide surface layers was formed after the void to which the respective non-conductive oxide surface layer is adjacent was etched but before the void was filled with conductive material.

These aspects and other embodiments may include one or more of the following features. The first unintended conductive item may be of a type different from that of the second unintended conductive item. Both the first unintended conductive item and the second unintended conductive item may comprise poly residue, metal gate residue or metal residue. The semiconductor device may comprise a third non-conductive oxide surface layer formed on a third unintended conductive item wherein the third unintended conductive item is of a type different from that of the first unintended conductive item and that of the second unintended conductive item. The first non-conductive oxide surface layer may be adjacent to the same void as the second non-conductive oxide surface layer.