Stimulated circuits and fault testing methods

A logic gate system for fault insertion testing can include a logic gate module having a plurality of input pins. The plurality of input pins can include an input signal pin configured to receive an input signal, a power supply input pin configured to receive power from a power supply, and a test input pin. The logic gate module can also include an output pin connected to the input pins via one or more logic gates. The logic gate system can include a power supply line connected to the power supply input pin and the test input pin. The logic gate system can also include a zero-ohm jumper resistor disposed between the power supply input pin and the test input pin. The zero-ohm resistor can be configured to be replaced with a low ohm resistor to allow reverse driving a voltage on the test input pin. The one or more logic gates can be configured to reverse an output at the output pin when the voltage on the test input pin is reverse driven.

FIELD

This disclosure relates to stimulated circuits and fault testing methods.

BACKGROUND

Traditional fault insertion testing is effected by causing the stimulated (stim) circuits to act opposite to how they are commanded. These stim circuits can have a configurable logic gate acting as a buffer or inverter (e.g., mostly buffers) between a microprocessor (which drives the stims) and the actual circuit being stimmed. Traditional systems require several components to connect to a stim circuit to fault test the stim circuit, which makes it a time consuming operation to do fault testing.

Such conventional methods and systems have generally been considered satisfactory for their intended purpose. However, there is still a need in the art for improved stim circuits and testing methods. The present disclosure provides a solution for this need.

SUMMARY

A logic gate system for fault insertion testing can include a logic gate module having a plurality of input pins. The plurality of input pins can include an input signal pin configured to receive an input signal, a power supply input pin configured to receive power from a power supply, and a test input pin. The logic gate module can also include an output pin connected to the input pins via one or more logic gates. The logic gate system can include a power supply line connected to the power supply input pin and the test input pin. The logic gate system can also include a zero-ohm jumper resistor disposed between the power supply input pin and the test input pin. The zero-ohm resistor can be configured to be replaced with a low ohm resistor to allow reverse driving a voltage on the test input pin. The one or more logic gates can be configured to reverse an output at the output pin when the voltage on the test input pin is reverse driven (e.g., pulled low).

The system can include a test pad connected to the power supply line configured to receive a test fixture for reverse driving voltage (e.g., pulling voltage low) on the test input pin. Any other suitable electrical connection type is contemplated herein.

The logic gate module can include four or five total input pins. Any suitable number of input pins (e.g., more than three) is contemplated herein.

In certain embodiments, the logic gate module can be a buffer. In certain embodiments, the logic gate module can be an inverter. Any suitable function for the logic gate module is contemplated herein.

In accordance with at least one aspect of this disclosure, a method for fault insertion testing in a circuit can include removing a zero-ohm resistor between a power supply input pin and a test input pin, inserting a low-ohm resistor in place of the zero-ohm resistor, connecting a test fixture to be in electrical communication with the low-ohm resistor and the test input pin on a test input pin side of the low-ohm resistor, and reverse driving voltage (e.g., pulling voltage low) at the test input pin to change an output of the logic module. Connecting the test fixture can include connecting to a test pad that is electrically connected to the low-ohm resistor and the test input pin. The logic gate module can be any suitable logic gate module disclosed herein (e.g., as described above). Reverse driving voltage (e.g., pulling voltage low) on the test input pin can cause the output at the output pin to reverse such that a buffer acts like and inverter and an inverter acts like a buffer.

In accordance with at least one aspect of this disclosure, a system configured for fault insertion testing can include an input module configured to output an input signal, and a logic gate system for fault insertion testing, e.g., as disclosed herein (e.g., as described above). The input signal pin can be connected to the input module and configured to receive the input signal from the input module. The system can also include a circuit-to-be-tested connected to the output pin to receive the output from the logic gate module.

In certain embodiments, the system can include a test pad connected to the power supply line configured to receive a test fixture for reverse driving voltage (e.g., pulling voltage low) on the test input pin. In certain embodiments, the system can include the test fixture.

The input module can be a processor, for example. In certain embodiments, the system can be an aircraft system. For example, the aircraft system can be a health monitoring system.

DETAILED DESCRIPTION

Referring toFIGS.1and2, a logic gate system100for fault insertion testing can include a logic gate module101having a plurality of input pins (e.g., pins1,2,3,5, and6as shown). The plurality of input pins1,2,3,5,6can include an input signal pin5configured to receive an input signal, a power supply input pin2configured to receive power from a power supply105, and a test input pin6. The logic gate module101can also include an output pin7connected to the input pins1,2,3,5,6via one or more logic gates101a,101b,101c,101d,101e(e.g., including one or more AND operators, one or more OR operators, one or more XOR operators, one or more gain blocks, and/or any other suitable logic block type).

The logic gate system100can include a power supply line107connected to the power supply input pin2and the test input pin6. The logic gate system100can also include a zero-ohm jumper resistor109disposed between the power supply input pin2and the test input pin6. The zero-ohm resistor109can be configured to be replaced with a low ohm resistor (e.g., equal to or less than about 1 k ohms) to allow reverse driving a voltage on the test input pin. The one or more logic gates can be configured to reverse an output at the output pin7when the voltage on the test input pin6is reverse driven (e.g., pulled low).

The system100can include a test pad111(e.g., a large metallic area for soldering, a fitting for a releasable connection) connected to the power supply line107configured to receive a test fixture113(e.g., having test circuitry) for reverse driving voltage (e.g., pulling voltage low) on the test input pin6. Any other suitable electrical connection type is contemplated herein.

The logic gate module101can include four or five total input pins (e.g., five pins1,2,3,5,6as shown) for example. Any suitable number of input pins (e.g., more than three) is contemplated herein.

In certain embodiments, the logic gate module101can be a buffer. In certain embodiments, the logic gate module101can be an inverter. Any suitable function for the logic gate module101is contemplated herein. The logic gate module101can include any suitable hardware and/or software module(s) configured to perform any suitable function (e.g., logic gates).

In accordance with at least one aspect of this disclosure, a system99configured for fault insertion testing can include an input module115configured to output an input signal, and a logic gate system for fault insertion testing, e.g., as disclosed herein (e.g., system100as described above). The input signal pin5can be connected to the input module115and configured to receive the input signal from the input module115. The system99can also include a circuit-to-be-tested117connected to the output pin7to receive the output from the logic gate module101.

In certain embodiments, the system99can include a test pad111connected to the power supply line107configured to receive a test fixture113for reverse driving voltage (e.g., pulling voltage low) on the test input pin6. In certain embodiments, the system99can include the test fixture113.

The input module115can be a processor, for example. Any suitable input module115is contemplated herein. In certain embodiments, the system99can be an aircraft system. For example, the aircraft system can be a health monitoring system.

In accordance with at least one aspect of this disclosure, a method for fault insertion testing in a circuit (e.g., circuit117) can include removing a zero-ohm resistor109between a power supply input pin2and a test input pin6, inserting a low-ohm resistor109b(e.g., as shown inFIG.2) in place of the zero-ohm resistor109(as shown inFIG.1), connecting a test fixture113to be in electrical communication with the low-ohm resistor109band the test input pin6on a test input pin side of the low-ohm resistor109b, and reverse driving voltage (e.g., pulling voltage low) at the test input pin6to change an output of the logic module101(at output pin7). By reverse driving voltage (e.g., pulling voltage low) at the test pin6, the logic of the module101(e.g., logic gate101d) will see a low signal from test input pin6instead of the usual power supply signal. As shown, the logic gate101dcan be an XOR logic gate configured to switch its output when the voltage is low on the test input pin6connected thereto, while the other pin inputs remain the same, for example. Any suitable logic block or function to cause logic module101output state switching with change of the test input pin signal is contemplated herein.

In certain embodiments, connecting the test fixture113can include connecting to a test pad111that is electrically connected to the low-ohm resistor and the test input pin. The logic gate module101can be any suitable logic gate module disclosed herein (e.g., as described above). Reverse driving voltage (e.g., pulling voltage low) on the test input pin6can cause the output at the output pin7to reverse such that a buffer acts like an inverter and an inverter acts like a buffer. Any other suitable function is contemplated herein.

Embodiments enable quick fault insertion to cause a circuit to act in reverse. This can be done to check if software or other suitable logic in the system is catching those faults. Traditional systems require substantial physical rework to do such tests and also require the use of switches and other electronics parts. Traditional methods also require many parts, solder joints, etc. Embodiments, however, allow this type of testing without the rework. For example, stimulated (stim) circuits are made to health test a system before it is allowed to work. Fault insertion testing can be used to test these health monitoring circuits to make sure they are functioning properly.

Embodiments can utilize new logic gate modules that have an extra test pin that can be driven to change the output state of the logic gate module.

Embodiments can use a logic module that is an ultra-configurable gate (e.g., SN74LVC1G99-Q1) instead of previous basic configurable gates that were traditionally used. There is one or more extra input pins in such ultra-configurable parts, for example. An extra pin can be the difference between configuring the gate as a buffer or an inverter, for example. Certain embodiments can have the extra pin (e.g., pin6) tied to the power supply to be a buffer. Embodiments can pull that test pin to ground through a resistor (e.g., 1 k or less during fault insertion testing). The value can be small so that when the test input pin is pulled to ground, noise does not create any significant voltage across the resistor and make the gate see a high signal when the pin is in fact being pulled down. In certain embodiments, that resistor can be a zero ohm jumper and during fault insertion testing, it could be replaced with the low value resistor. In this regard, it can aid in assuring that there are no issues with certain hardware. Also, to make it easier to connect the test lead, embodiments can also include a small test pad, e.g., between the test input pin and the resistor to give a place for the test lead to connect to.

Using embodiments can decrease the amount of rework for fault insertion testing for the stimmed circuits. Embodiments require a lot less pins to be lifted and a lot less switches and resistors to be added to the board. Embodiments can still use an external test fixture, but instead of the external test fixture controlling a switch that has been added to the board, the external test fixture can connect to the test lead between the test input pin and resistor and either drive it high or low depending on the test.

Embodiments include a method of only two steps. For example, reworking the circuit for fault insertion testing can include replacing R1 0Ω jumper with a 1 k resistor and connecting the jumper from a test pad to an external test fixture connector. While embodiments show a buffer being converted to an inverter, the same method can be used to convert an inverter to a buffer for the same benefits during fault insertion testing. This method can be used on input stim circuits and output monitor circuits, as well as any other suitable circuits.

Embodiments reduce the amount of rework (effort/time) needed for fault insertion testing. Using an ultra-configurable gate, there is one pin difference between configuring as a buffer or as an inverter. These buffers/inverters are used between stim driving signals and the circuits being stimmed. Using the ultra-configurable gate, with a resistor provision (normally 0 ohm but increased during testing) between the pin and either ground or supply, the node can be tied into via a test pad to convert buffers to inverters and inverters to buffers during fault insertion testing. Embodiments can provide a significant reduction in rework needed to induce faults. This includes, for example, a reduction of external components that are needed to be added to the board (switches/pull up or down resistors), reduction of lifting pins, and connecting jumpers to switches and jumpers from switches to power and ground connections for the switches.