Computer-readable recording medium having stored therein program for write inspection, information processing device, and method for write inspection

An information processing device that inputs and outputs data into and from a storage device having a plurality of regions, and includes a processor that: changes a first counter value corresponding to a first region serving as a writing target and being retained in a retainer retaining multiple counter values one representing the number of times of data writing into each of the regions; obtains the first counter value from the retainer; generates block data by attaching the first counter value to data to be written into the first region; writes the block data into the first region; when the first counter value satisfies a predetermined condition, reads the block data from the first region after the writing, and compares the read block data with the block data written into the first region, and when the read block data does not match the written block data, notifies an error.

CROSS-REFERENCE TO RELATED APPLICATION

This application is based upon and claims the benefit of priority of the prior Japanese Patent application No. 2014-009257, filed on Jan. 22, 2014, the entire contents of which are incorporated herein by reference.

FIELD

The embodiment discussed herein is a computer-readable recording medium having stored therein a program for write inspection, an information processing device, and a method for write inspection.

BACKGROUND

A storing device such as a Hard Disk Drive (HDD) sometimes has, at a low possibility however, errors in writing data into the storing device in response to a write command from a host device. Examples of the errors are a wrong address that the data is written into a different address from an address instructed by the command and lost write that data is not written into the instructed address. A wrong address is caused when head seek in the HDD has failed or the like; and lost write is caused when data writing has been carried out in a state where the HDD head comes apart from the disk to lower the magnetic force therebetween.

As described above, causes of a wrong address and lost write (hereinafter also collectively referred to as a “writing error”) in an HDD frequently depend on the state of the HDD. This makes a controller that controls accesses to the HDD difficult to detect a writing error that occurs after the controller instructs data writing into the HDD in response to a write command. Consequently, the controller sometimes has difficulty in notifying occurrence of a writing error to the host device.

One of the known methods to detect above writing errors uses, for example, a Block Check Code (BCC). A BCC is data used for detecting an error in data by means of Cyclic Redundancy Check (CRC). A BCC includes the result of CRC that the controller has performed on the data directed by a write command and information of the write address directed by the write command.

For example, in response to a read command from the host device, the controller compares the read address directed by the read command with address data included in the BCC of the block read from the HDD. In cases where the compared two addresses do not match, the controller detects that the block read from the HDD has been written therein data of a wrong address, which means that the read data is data that has have to be written into another address.

However, simply using a BCC sometimes makes the controller difficult to detect that the data directed by the read command is written into a different address from the read address or has lost write. One of the above cases is that although data in the block directed by the read address is old data supposed to be overwritten with different (new) data, there is high possibility that address in the BCC in the same block is the correct read address and therefore the result of comparing the read addresses match.

In one of the related techniques known to public, the controller generates chronological data, such as a counter value, that makes it possible to discriminate the current write command from the latest write command into the same storing region (see, for example, Patent Document 1). In this technique, the controller provides the generated chronological data to each of updating data and parity data, writes the updating data and the parity data into different disks, compares the chronological data provided to the updating data with that provided to the parity data when reading data in response to the current write command, so that a possible writing error can be detected.

In another known related technique, the controller sets a history block that stores therein an updating state value such as the updated generation number for each block, and regards each history block as a management unit to be inspected (see, for example, Patent Document 2). In this technique, the controller calculates the updating state value for each management unit, stores the updating state value into a memory, and writes the entire management unit including the updating data and the updating state value into the disk. After that, the controller compares the updating state value read from the disk with the updating state value stored in the memory to detect lost write on the disk.

As the above, there have been provided known techniques that the controller compares the counter value (updated generation number) stored in the disk with the counter value for comparing stored in a different disk or a memory and, when the counter values do not match, detects the occurrence of a writing error. These techniques are capable of detecting a wrong address that the data is written into a different address from an address instructed by the read command and lost write that data is not written into the instructed address.

In the above technique, the chronological data and the updating state value, which are stored into the storing region of the HDD, may suppress the available disk volume, that is the disk volume that can store the business data (user data), depending on the data size of the chronological data and the updating state value. In particular, the technique that generates chronological data and writes such chronological data corresponding to each block largely suppresses the available disk volume in accordance with an increase in data size of chronological data.

A solution to the above minimizes the chronological data and the updating state value to reserve an available disk volume. Here, the chronological data and the updating state value are assumed to be a counter value. An example of a counter value is represented by an n-bit value (where n is an integer equal to or more than one) and is in the range of 0 to m (where m=2n−1). In this solution, the counter small in size may have difficulty in detecting a wrong address and lost write as to be detailed below. The following description focuses on the occurrence of lost write, but the same description is applied to the occurrence of a wrong address.

FIG. 6is a diagram denoting the lost-write detectability of the controller when the counter value is a two-bit data (n=2). In the example ofFIG. 6assumes that under a state where the value “D0” is set in the predetermined block having a counter value of “0” representing the initial state, write commands to each write values “D1”, “D2”, “D3”, and “D4” are successively issued but all results in the occurrence of lost write.

As denoted inFIG. 6, even when lost write has occurred successive three times (“D1”-“D3”), the controller is capable of detecting the lost write by comparing the counter value of the predetermined block stored in the disk with the counter value for comparing.

However, in cases where lost write has occurred successive four times (“D1”-“D4”), the counter value for comparing overflows and the counter value for comparing is cleared (returns from three to the initial value zero), and the counter value for comparing comes to be the same as the counter value of the predetermined block. At that time, the controller determines the both counter values match and therefore does not determine that lost write has occurred. Having a smaller maximum value of the counter value, a counter having a smaller counter size has higher possibility that the counter value is the same as the counter value for comparing.

As the above, when a counter used for writing error inspection (writing inspection) is made to have a small size to reserve an available disk volume of the storing device, the controller sometimes has difficulty in detecting a writing error, which lowers the reliability of the writing inspection.

SUMMARY

According to an aspect of an embodiment, a computer-readable recording medium having stored therein a writing inspection program for causing a computer that inputs and outputs data into and from a storage device having a plurality of regions to execute a process for writing inspection, the process including: changing a first counter value corresponding to a first region serving as a writing target and being retained in a retainer, the retainer retaining a plurality of the counter values one representing the number of times of data writing into each of the plurality of regions; obtaining the first counter value of the first region from the retainer; generating block data by attaching the first counter value to data to be written into the first region; writing the block data into the first region; when the first counter value of the first region satisfies a predetermined condition, reading the block data from the first region after the writing, and comparing the read block data with the block data written into the first region, and when the read block data does not match the written block data, notifying an error.

DESCRIPTION OF EMBODIMENTS

Hereinafter, a first embodiment will now be described with reference to the accompanying drawings.

(1) First Embodiment

FIG. 1is a block diagram schematically illustrating an example of the configuration of the information processing system1according to the first embodiment.

As illustrated inFIG. 1, the information processing system1includes a storage apparatus2and a host device3. The host device3is an information processing device such as a Personal Computer (PC) or a server and is an example of a superordinate device that issues a command for data writing or data reading (i.e., data writing command or data reading command) to the storage apparatus2. The storage apparatus includes a controller4, at least one HDD5, and a non-volatile memory6.

The controller4accesses the HDD5for, for example, data inputting and outputting in response to a command from the host device3, and controls management of a memory20that is to be detailed below, the non-volatile memory6, and other resources. An example of the controller is an information processing device of a Controller Module (CM). The controller4will be detailed below.

The HDD5is an example of a storing device that stores therein various pieces of data and programs. An example of the storing device of the first embodiment is a magnetic disk device such as an HDD, but the storing device is not limited to an HDD. Any device that would have a write address miss and lost write can be used as the storing device. Although only one HDD5appears inFIG. 1, multiple HDDs5may be connected to the controller4via a device adaptor8a.

The HDD5includes a storing region50having multiple blocks51. The storing region50is a disk region that stores therein various pieces of data and programs. Each block (region) includes data51a, a BCC51b, and a counter value51c. The controller4inputs and outputs data into and from the HDD5in a unit of the block size of the block51.

The data51ais data (user data) that is written by the controller4and that is related to a write command from the host device3. The BCC51bis information to be used for error detection in the data51aby means of CRC. The BCC51bincludes the result of CRC performed on the data51adirected by the write command and information of the write address directed by the write command.

The counter value51crepresents the number of times that the data51ain the same block has been updated (i.e., the number of times that the data51ahas been written into the block51). The counter value51cis represented in the form of n bit data (where, n is an integer equal to or more than 1) and also is the range of 0 to m (where, m=2n−1).

Since a BCC has a vender region that the vender can proprietarily set, the controller4may set the counter value51cinto the vender region in the BCC51b. In this case, the data51aand the BCC51b(the combination of the BCC51band the counter value51c) are assumed to be, for example, 512 bytes and 8 bytes, respectively, a single block51has a size of 520 bytes.

Alternatively, a setting region of the counter value51cmay be provided in a part of the data51aor may be prepared in the block51except for the data51aand BCC51b.

The non-volatile memory6is an example of a retainer that retains a counter value6arepresenting the number of times of writing into a block51included in the HDD5for each block51. Each counter value6aretained in the non-volatile memory6is an n-bit value corresponding to one of the blocks51in the HDD51. Examples of the non-volatile memory6are a storing device such as a NAND flash memory or a Magnetoresistive Random Access Memory (MRAM), or a semiconductor drive device such as a Solid State Drive (SSD). A magnetic disk device such as an HDD5may be used as the non-volatile memory6, but the non-volatile memory6is preferably the above storing device or semiconductor drive device for the data reliability aspect because the counter value6ais used in comparison for writing error by the controller4.

FIG. 2is a diagram denoting examples of multiple counter values6aretained in the non-volatile memory6ofFIG. 1. As illustrated inFIG. 2, when the HDD5includes N blocks51(where, N is an integer equal to or more than 2) collectively serving as the storing region50, the non-volatile memory6retains N counter values6a(#0 to #N−1) corresponding one to each of the counter values51c(#0 to #N−1) of the N blocks51. For example, as illustrated inFIG. 2, the non-volatile memory6can retain counter values 0(0b00), 2(0b10), 3(0b11), . . . , 0(0b00) being in bitmap values and corresponding to the blocks51numbered with #0, #2, . . . , #N−1, respectively.

Next, the controller4will now be detailed with reference toFIG. 1. As illustrated inFIG. 1, the controller4includes a Central Processing Unit (CPU)10, a memory20, a channel adaptor7, and device adaptors8a,8b.

The channel adaptor7is a module that is connected to the host device3and that carries out interfacing control with the host device3to establish communication and data forwarding with the host device3. The device adaptors8a,8bare modules that carry out interface control with the HDD5and the non-volatile memory6that are included in the storage apparatus2, respectively, to establish communication and data forwarding with the HDD5and the non-volatile memory6.

The CPU (processor)10is an example of a processing device (processor) that is connected to the blocks20,7,8a, and8bincluded in the controller4to carryout various controls and calculations. The CPU10achieves various functions by executing one or more programs that are stored in the memory20or a non-illustrated recording medium such as a Read Only Memory (ROM).

The memory20is a storing device, such as a cache memory, that temporarily stores therein various data and programs. In executing a program, the CPU10temporarily expands data and the program that are to be used into the memory20. For example, the memory20can include a buffer region21and a variable storing region22as illustrated inFIG. 1. An example of the memory20is a volatile memory such as a RAM.

The buffer region21is a region that temporarily stores therein one or more pieces of block data211including write data that the host device3is to write into the HDD5or read data that is to be read from the HDD5to the host device3. The block data211includes data21arelated to a write or read command, a BCC21b, and a counter value21c.

The variable storing region22is a region that stores therein various variables that are to be used in operation of the controller4. For example, information representing a counter value21cof the block data211that has been written from the buffer region21into the HDD5may be set in the variable storing region22.

Next, description will now be made in relation to the respective functions of the processor achieved by the CPU10.

As illustrated inFIG. 1, the CPU10includes functions of the processor including a command processor11, a counter manager12, a write controller13, and a read controller14.

The command processor11processes a read or write command communicated with the host device3via the channel adaptor7and a response to the command. For example, upon receipt of a write command from the host device3, the command processor11notifies the write controller13of at least write data (updating data) and a write address directed by the received write command. In addition, upon received of a result of a writing process that the write controller13has carried out in response to the write command, the command processor11replies to the host device3with a normal response or an error response based on the result of the writing process. Furthermore, upon receipt of a read command from the host device3, the command processor11notifies the read controller14of at least a read address and a read region directed by the read command. After that, upon receipt of a result of a reading process that the read controller14has carried out in response to the read command, the command processor11replies to the host device3with the read data and a normal response, or an error response, based on the result of the read process.

The counter manager12makes an accesses to the non-volatile memory6via the device adaptor8a. Specifically, in response to a write or read command directed to one of the blocks51in the HDD5, the counter manager12obtains a counter value6acorresponding to the target block51from the non-volatile memory6. For example, the counter manager12reads the counter value6acorresponding to the target block51directed by the write or read command from the host device3in response to an instruction from the write controller13or the read controller14, and notifies the read counter value6ato the sender of the instruction.

The counter manager12changes the value of the counter value6ain the non-volatile memory6in obedience to the write command directed to the target block51of the HDD5. For example, the counter manager12adds one to the counter value6aof the non-volatile memory6corresponding to the target block51directed by the write command from the host device3. In cases where the addition of one to the counter value6acauses the counter value6ato reach a predetermined value (e.g., 2n), that is, in cases where the counter value6aoverflows as a result of the addition of one, the counter manager12resets (initializes) the counter value6ato return to the initial value (e.g., 0(0b00)). The counter manager12may add (change by one) one to the counter value6abefore or after the counter value6ais read. In cases where the counter manager12adds one to the counter value6ain the non-volatile memory6after the counter value6ain the non-volatile memory6is read, the counter manager12adds one to the counter value6athat has been previously read.

The write controller13controls data writing into the HDD5in response to a write command from the host device3. The write controller13may include, for example, a block data generator13a, a write processor13b, a counter determiner13c, and a block data comparer13d.

When the controller4receives a write command, the block data generator13agenerates block data211and temporarily stores the block data211into the buffer region21(block buffer) of the memory20. Specifically, the block data generator13astores the write data notified by the command processor11into the buffer region21(data buffer), regarding the write data as data21a. The block data generator13acalculates CRC of the write data, generates a BCC21bbased on the result of the calculating of the CRC and the write address notified by the command processor11, and stores the BCC21binto the buffer region21(BCC buffer). The BCC21bmay be generated by any known method, so detailed description of the method is omitted here.

Furthermore, the block data generator13ainstructs to the counter manager12to obtain the counter value6ain the non-volatile memory6, the value6acorresponding to the block51that the write address represents. Then, upon notification of the counter value6aby the counter manager12, the block data generator13astores the counter value6ainto the buffer region21to serve as the counter value21c. The block data generator13agenerates block data211such that the counter value21chas the same value of the counter value6acorresponding to the write address in this way.

Upon notification of completion of generating the block data211from the block data generator13a, the write processor13bwrites the block data211into the write address via the device adaptor8b. Specifically, the write processor13bwrites the block data211(data21a, BCC21b, counter value21c) into the target block (first region)51(data51a, BCC51b, counter value51c) of the HDD5, the block51being directed by the write address.

When the write processor13bcompletes writing of the block data211into the HDD5, the counter determiner13cdetermines whether the counter values21cof the block data211is the initial value (e.g., zero), i.e., whether the counter value21chas been reset. In cases where the counter value21cis not the initial value, the counter determiner13cnotifies the command processor11that the writing process into the HDD5responsive to the write command has been normally completed. This means that, when the counter value21cis not the initial value, the counter value21cdoes not overflow. Accordingly, even when a writing error of the block data211has occurred, the controller4is capable of detecting the writing error when the read data is read from the target block51(see “D1”, “D2”, “D3” inFIG. 6).

On the other hand, when the counter value21cis the initial value, the counter determiner13cinstructs the block data comparer13dto detect a writing error in the block data211. Namely, the counter value21cbeing the initial value means that the counter value21chas overflown. Accordingly, in cases where a writing error of the block data211has occurred, it is difficult for the controller4to detect the writing error when the controller4reads data from the block51(see “D4” inFIG. 6). To compensate for the difficulty, the counter determiner13cinstructs the block data comparer13dto inspect whether the block data211has been correctly written into the block (first region) of the writing target immediately after the write processor13bwrites the block data211.

The counter determiner13ccan obtain the counter value21cthat is to be used for the above inspection from the buffer region21, the variable storing region22, or the non-volatile memory6.

The block data comparer (first comparer)13dreads information in the block51of the HDD5in response to the instruction from the counter determiner13c, the block being indicated by the write address. Then, the block data comparer13dstores the read data, being regarded as the block data211(read block data), into the buffer region21(block buffer). The block data comparer13dstores the read block data read from the block51into a region in the buffer region21different from the region storing therein the block data211(write block data) that the write processor13bhas written into the block of the writing target.

Unless a writing error has occurred, the read block data read by the block data comparer13dmatches the block data211(write block data) written by the write processor13b. For the above, the block data comparer13dcompares the write block data stored in the buffer region21with the read block data and determines whether the write block data matches the read block data. Namely, the block data comparer13dcarries out read after write that reads data from the block51, into which data has been written by the write processor13b, and compares the written data and the read data, in response to the instruction from the counter determiner13c.

The above determination by the block data comparer13dis satisfactorily accomplished through comparison of at least of part of the block data. For example, the data to be compared may be at least one or a combination of two of a block data211, a BCC21b, and a counter value21cof each of the write and read block data. Alternatively, the part data to be compared for the determination may be CRCs of the data21aand the BCC21b.

In cases where the write block data matches the read block data, the block data comparer13dnotifies the command processor11that the writing process into the HDD5in response to the write command has been correctly accomplished. In contrast, in cases where the write block data does not match the read block data, the block data comparer13dnotifies the command processor11that the writing error has occurred in the writing process into the HDD5in response to the write command.

As the above, since the counter value51cis written into the storing region50of the HDD5, the data volume of the counter value51csuppresses the available disk volume (for storing user data) of the HDD5, that is, storing region for data51ain all the blocks51. In particular, when the counter value51cfor each block51is written in order to detect a writing error in a unit of the block51, increase in the counter size largely decreases the available disk volume.

Conversely, a smaller counter size to reserve an available disk volume of the HDD5sometimes makes the controller4difficult to detect a writing error as described with reference toFIG. 6, leading to lowering the reliability of the writing inspection.

As a solution to the above, when the counter value21ccorresponding to a block51of the writing target satisfies a predetermined condition, which specifically is that the counter value21chas been reset, the write controller13of the first embodiment writes and reads data from and into the block (first region)51of the writing target. Then the write controller13compares the block data211written into the block with data read from the block51after the writing and in cases where the written data does not match the read data, the write controller13replies to the host device3with an error response (error notification) via the command processor11.

Even if the counter has only a small data volume (n), the write controller13is capable of detecting successive writing errors. The write controller13reserves the storing region for user data (data51a) in the HDD5and improves the reliability of the writing error inspection compatible with each other.

Since the controller4of the first embodiment can ensure the reliability of the writing error inspection even when the counter has a small size, the counter value51csmall in size can be set in an empty region of each block51. For example, the controller4can include the counter value21cin, for example, the vender region of the BCC21bthat serves as information (BCC21b) used for error detection among the data to be written into the block51of the writing target, so that the block data211can be generated. This makes it possible to increase the storing region of the data51aand increase the number of blocks51in the storing region50, and consequently the available disk volume can further be increased.

Since the controller4of the first embodiment can ensure the reliability of the writing error inspection even when the counter has a small size, the non-volatile memory6that stores therein multiple counter values6acan have a small size. This can reduce the circuit size and also the production cost.

The read data and the written data are compared when the counter value21ccorresponding to the block51of the writing target is reset. Alternatively, the block data comparer13dmay carry out adopt the “read after write” scheme each time the writing data into the HDD5is accomplished. However, the read after write scheme takes an additional time for seeking the magnetic head for reading the data, reading the data, and comparing the written data and the read data to the time that the simple writing process takes. Accordingly, the read after write performed each time the writing data into the HDD is accomplished remarkably lowers the throughput of the storage apparatus2. In contrast, the block data comparer13dof the first embodiment can minimize the execution of the read after write and thereby avoid lowering of the throughput of the storage apparatus2.

Next, the read controller14will now be detailed.

The read controller14controls data reading from the HDD5in response to the read command from the host device3, and includes, for example, a read processor14a, a BCC determiner14b, and a counter determiner14c.

When the controller4receives a read command, the read processor14areads information in a block (second region)51of the reading target in the HDD5and temporarily stores the read data into the buffer region21. Specifically, the read processor14aspecifies the block51of the reading target based on a read address and a read region that are notified from the command processor11. The read processor14areads the data51a, the BCC51b, and the counter value51cfrom the block51of the reading target, and stores the pieces of the read data, serving as the block data211, into the buffer region21(block buffer).

The BCC determiner14bcarries out BCC inspection on the read block data stored in the buffer region21by the read processor14a. Specifically, the BCC determiner14bcompares the read address associated with the read command notified by the command processor11with the address data included in the BCC21bof the read block data. In cases where the two addresses do not match, the BCC determiner14bdetects that a writing error has occurred in the latest writing into the block51of the reading target. Thereby, the BCC determiner14bdetects that the data51aof a wrong address is written in the block51read from the HDD5, that is, detects that the read data51ahas to be written in a different address. The BCC determiner14bnotifies the command processor11of the detection of the writing error in the block51of the reading target in the course of a reading process from the HDD51carried out in response to the read command.

On the other hand, in cases where the two addresses match, the BCC determiner14bdetermines that the BCC inspection has not detected a writing error and instructs the counter determiner14cto inspect a writing error based on the counter value. As described above, the BCC inspection sometimes has difficulty in detecting that data requested by a read command is mistakenly written in a different address from the read address or that the data requested by the read command has lost write. If the compared addresses match, the BCC determiner14binstructs the counter determiner14cto inspect whether the read block data is correct data requested by the read command.

Upon receipt of the instruction from the BCC determiner14b, the counter determiner (second comparer)14cinstructs the counter manager12to obtain counter value6aassociated with the block (second region)51indicated by the read address from the non-volatile memory6. Upon receipt of the notification of the counter value6afrom the counter manager12, the counter determiner14ccompares the counter value6awith the counter value21cin the read block data stored in the buffer region21.

In cases where the compared two counter values match, the counter determiner14cnotifies the command processor11of the normal completion of the reading data process on the HDD5carried out in response to the read command.

In contrast, in cases where the compared two counter values do not match, the counter determiner14cdetects that a writing error has occurred in the latest writing into the block51of the reading target. After that, the counter determiner14cnotifies the command processor11of detection of the writing error in the block51of the reading target in the reading process on the HDD5carried out in response to the read command.

In notification of the response to the read command to the command processor11, the read controller14also notifies the command processor11of at least partial data of the block data211(read block data) stored in the buffer region21. In cases where the response to the read command represents the detection of a writing error (i.e., error response), the read controller14does not have to notify of the command processor11of the read block data.

Here, the number of blocks51that the storage apparatus2accesses when writing and reading data into and from the HDD5is compared with the number of blocks a controller accesses when carrying out the similar process in the above related technique. The related technique here assumes that the controller provides history blocks one storing therein a state of updating each of multiple blocks and regards the history blocks as management units to be inspected.

The related technique uses, for example, a time stamp, the number of updated generations, a check code of the entire management unit as an updating state value. In cases where a check code is used, the controller has difficulty in detecting lost write in the entire management unit. Hereinafter, to conform to the conditions of the storage apparatus2, the related technique uses the number of updated generations as the value representing the updating state value.

The controller4of the storage apparatus2and the controller of the related technique each access the following blocks in the HDD when reading and writing data from and into the HDD. In the following comparison, the terms of (read) and (write) represent the type of access to a block.blocks in a disk accessed when reading

the related technique: block of the reading target (read)+block storing therein an updating state value (read)

the storage apparatus2: block51of the reading target (read)blocks in a disk accessed when writing

the related technique: block of the writing target (write)+block storing therein an updating state value (write)

the storage apparatus2

(when the counter value21cis 0): block of the writing target (write)+block51of the writing target (read)

(when the counter value21cis not 0): block51of the writing target (write)

As understood from the above, in the both cases of reading and writing, the storage apparatus2can reduce the access frequency to blocks as compared with the related technique. Since the storage apparatus2writes and reads data into and from the block51of the writing target in the read after write scheme when the writing process is being carried out (i.e., when the counter value21cis zero), the number of blocks to be accessed by the storage apparatus2is the same as that of related technique. The probability that the counter value21ccomes to be 0 is ¼ when the counter value21cis a two-bit value (n=2) and ⅛ when the counter value21cis a three-bit value (n=3), which are limited as compared with the related technique, which always writes data into two blocks.

As described above, the storage apparatus2according to the first embodiment can reduce the access frequency to the block51when writing and reading data into and from the HDD5, and thereby improves the throughput as compared with the above related technique.

(1-4) Example of Operation of the Information Processing System:

Description will now be made in relation to the examples of operation performed by the information processing system1having the above configuration with reference toFIGS. 3 and 4.FIG. 3is a flow diagram illustrating an example of a succession of procedural steps of data writing process to the HDD5by the storage apparatus2ofFIG. 1; andFIG. 4is a flow diagram illustrating an example of a succession of procedural steps of data reading process from the HDD5by the storage apparatus2ofFIG. 1.

(1-4-1) Examples of Writing Process:

To begin with, the operation of the writing process will now be described with reference toFIG. 3.

As illustrated inFIG. 3, when the host device3issues a write command and the storage apparatus2receives the write command (step S1), the command processor11notifies the block data generator13aof the write data and the write data directed by the write command.

The block data generator13astores the write data, serving as the data21a, into the buffer region21(data buffer) (step S2). The block data generator13agenerates a BCC21bincluding the write address on the basis of the write data and the write address (step S3), and stores the generated BCC21binto the buffer region21(BCC buffer) (step S4).

Next, the block data generator13ainstructs the counter manager12to obtain, from the non-volatile memory6, the counter value6acorresponding to the block51of the writing target indicated by the write address. Then the counter manager12reads the counter value6afrom the non-volatile memory6(step S5), increases the read counter value6aby one (step S6), and outputs the increased counter value6ato the block data generator13a. The block data generator13astores the counter value6areceived from the counter manager12, serving as a counter value21c, into the buffer region21(step S7).

The counter manager12updates the counter value6astored in the non-volatile memory6and corresponding to the block51of the writing target by increasing by one (step S8). In cases where the counter value6areaches the predetermined value (2n) by increasing by one in either of steps S6and S8, the counter manager12resets the counter value6athat reaches the predetermined value (2n), to the initial value.

After that, the write processor13bwrites the block data211(write block data) being generated by the block data generator13aand being stored in the buffer region21(block buffer) into the region of the HDD5indicated by the write address (step S9).

After the data writing into the HDD5finishes, the counter determiner13cdetermines whether the counter value21cwritten into the block51of the writing target is the initial value (e.g., zero) (step S10). In cases where the counter value21cis not the initial value (No route of step S10), the counter determiner13cnotifies the command processor11of the normal completion of the data writing. The command processor11replies to the host device3with the normal response (step S14) to terminate the procedure.

On the other hand, the counter value21cis the initial value (Yes route in step S10), the block data comparer13dreads the data in the block51of the HDD5indicated by the write address (step S11). The block data comparer13dstores the read data, serving as the block data211(read block data), into the buffer region21.

Then the block data comparer13dcompares the write block data in the buffer region21with the read block data (step S12) to determine whether the write block data matches the read block data (step S13). In cases where the two pieces of data match (Yes route of step S13), the block data comparer13dnotifies the normal completion of the data writing to the command processor11. Then, the command processor11replies to the host device3with the normal response (step S14) to terminate the procedure.

On the other hand, in cases where the two pieces of data do not match (No route of step S13), the block data comparer13dnotifies the occurrence of a writing error to the command processor11. Then, the command processor11replies to the host device3with an error response (step S15) to terminate the procedure.

Alternatively, the step S8ofFIG. 3may be carried out between the steps S4and S5, which allows omission of step S6.

As described above, in the storage apparatus2of the first embodiment, the controller4carries out read after write after the data writing to the HDD5is completed only when the counter value21ccomes to be the predetermined value. In detail, the controller4compares the read block data read from the same address as the write address with the write block data that has been written in the execution of read after write scheme. In cases where the two pieces of data do not match as the result of the comparison, the controller4determines that the write address is wrong or lost write has occurred.

With this configuration, even when the counter having a small data volume (n) is used, the controller4can detect writing errors that successively occur before and after the counter value51cis reset. Consequently, the controller4can improve the reliability of the writing error inspection, reserving an adequate storing region for the user data (data51a) in the HDD5.

(1-4-2) Example of Operation of a Reading Process:

Next, the operation of the reading process will now be described with reference toFIG. 4.

As illustrated inFIG. 4, when the host device3issues a read command and the storage apparatus2receives the read command (step S21), the command processor11notifies the read processor14aof the read address and the read region directed by the read command.

The read processor14aspecifies the block51of the HDD5, serving as the reading target, on the basis of the read address and the read region, and reads information in the block51of the reading target (step S22). The read processor14astores the information read from the block51of the reading target as block data211(read block data) into the buffer region21(block buffer).

After that, the BCC determiner14bcarries out BCC inspection on the read block data on the basis of the read address and the BCC21bincluded in the read block data stored in the buffer region21(step S23). In cases where a BCC error is detected (step S24and Yes route of step S24), the BCC determiner14bnotifies the command processor11that a writing error has occurred in the latest writing into the block51of the reading target. Then, the command processor11replies to the host device3with an error response (step S29) to terminate the procedure.

In contrast, in cases where no BCC error is detected in step S24(No route in step S24), the counter determiner14cinstructs the counter manager12to obtain, from the non-volatile memory6, the counter value6acorresponding to the block51of the reading target. Responsively, the counter manager12reads the counter value6afrom the non-volatile memory6(step S25), which is then output to the counter determiner14c. The counter determiner14ccompares the counter value21cin the read block data with the counter value6areceived from the counter manager12(step S26), and determines whether the two counter values match (step S27).

In cases where the counter value21cmatches the counter value6a(Yes route of step S27), the counter determiner14cnotifies the command processor11that the read block has been correctly read with the read block data. Then command processor11replies to the host device3with the read block data and a normal response (step S28) to terminate the procedure.

In contrast, in cases where the counter value21cdoes not match the counter value6a(No route of step S27), the counter determiner14cnotifies the command processor11that a writing error has occurred in the latest writing into the block51of the reading target. Then, the command processor11replies to the host device3with an error response (step S29) to terminate the procedure.

The storage apparatus2of an example of the first embodiment carries out the data writing process into and the data reading process from the HDD5along the above procedures.

(2) Example of the Hardware Configuration

Next, the hardware configuration of the controller4ofFIG. 1will now be detailed with reference toFIG. 5, which illustrates an example of the hardware configuration of the controller4ofFIG. 1.

As illustrated inFIG. 5, the controller4includes the CPU10, the memory20, the channel adaptor7, and the device adaptors8a,8bthat have already appeared inFIG. 1, and may additionally include an Input/Output (I/O) unit41, a recording medium42a, and a reader43.

The I/O unit41may include, for example, at least one of an input device such as a mouse or a keyboard and an output device such as a monitor display or a printer. The I/O unit41receives an operation instruction that the operator of the controller4makes via the input device and also displays (outputs) the result of the operation of the controller4on the output device.

An example of the recording medium42ais a storing device such as a flash memory and a ROM. The recording medium42astores therein various pieces of data and programs. The reader reads data and programs from a computer-readable recording medium42b. In at least one of the recording media42aand42b, the writing inspection program that achieves part or the entire of the function of the controller4of the first embodiment may be stored. For example, the CPU10expand a program read from the recording medium42aor the recording medium42busing the reader43on the storing device such as the memory20and executes the program. Thereby, the computer (including the CPU10, the information processing device, and various terminals) achieves the above function of the controller4.

Examples of the recording medium42bserving as a non-transitory recording medium, are a flexible disc, an optical disc such as a Compact Disc (CD), a Digital Versatile Disc (DVD), a Blu-Ray disc; and a flash memory such as a Universal Serial Bus (USB) memory and an SD card. Examples of the CD are CD-ROM, CD-R(CD-Recordable), and CD-RW (CD-Rewritable); examples of the DVD are DVD-ROM, DVD-RAM, DVD-R, DVD-RW, DVD+R, and DVD+RW.

The blocks10,20,7,8a,8b, and41-43are communicably connected to one another via a bus. The above hardware configuration is a mere example and accordingly, the hardware elements of the controller4(CPU10) may be appropriately increased and decreased (e.g., omitting an arbitrary block), divided, integrated by arbitrary combinations. Alternatively, the channel adaptor7and the device adaptors8a,8bmay be disposed outside of the controller4.

The preferred embodiment of the present invention has been described in detail. The present invention is not limited to specific embodiments, and can be variously deformed and changed in a range which does not deviate from the spirit of the present invention.

For example, the controller4of the first embodiment includes the BCC21bin the block data211that is generated on the buffer region21in the course of the data writing process into the HDD5, but the present invention is not limited to this. Alternatively, the BCC21bmay be omitted, and in this case, each block51of the HDD5includes the data51aand the counter value51c. Omission of the BCC21ballows the controller4to omit the BCC determiner14band also to omit steps S3and S4ofFIG. 3and steps S23and S24ofFIG. 4.

The first embodiment assumes that the storage apparatus2includes a single HDD5, but the operation of the storage apparatus2can be the same even when the storage apparatus2includes multiple HDDs5. In this case, the non-volatile memory6satisfactorily retains the counter values6acorresponding to the multiple blocks51for each of the HDDs5.

The first embodiment assumes that the controller4is included in the storage apparatus2, but the configuration of the information processing system1is not limited to this. Alternatively, the controller4may be included in each HDD5or in the host device3.

The above description made with reference toFIG. 5assumes that the controller4of the first embodiment includes the I/O unit41, the recording medium42b, and the reader43, but the configuration of the controller4is not limited to this. Alternatively, at least one of the I/O unit41, the recording medium42b, and the reader43may be included in another device, such as the host device3. With this configuration, the writing inspection program may be forwarded from the other device such as the host device3to the controller4through a wire or radio, and the CPU10may expand the forwarded writing inspection program on the memory20and execute the expanded program.

The controller4of the first embodiment can control a storage apparatus having various Redundant Array of Inexpensive Disks (RAID) configurations using multiple HDDs5in the same manner as performed in the first embodiment.

In the above description, the controller4of the first embodiment changes the counter value6aby adding one to the counter, but the counting manner is not limited to this. Alternatively, the counter value6amay be changed by decreasing one each time. This case satisfactorily sets the initial value to be 2nand sets the predetermined value to reset the counter value6ato be 0.

The above first embodiment can improve the reliability of the writing error inspection, reserving an adequate storing region for data storage in a storing device.