Liquid crystal display discharge circuit

A discharge circuit is connected to a bias voltage generating circuit and a liquid crystal driver. The discharge circuit includes a plurality of discharge transistors, wherein each bias voltage is connected to ground via a transistor. When a power of the apparatus is set in the ON state, the transistor is set OFF so that the bias voltage can be supplied only to the liquid crystal display panel without being supplied to the discharge circuit. On the other hand, when the power is set in the OFF state, the transistor is set ON so that a discharge occurs by moving charges stored on the liquid crystal display panel to the transistor. As a result, when the power is set in the ON state, a waste power consumption by members other than the liquid crystal display panel can be prevented, thereby achieving an apparatus of a low power consumption. Moreover, possible degradation due to charges of the liquid crystal display apparatus in its quality and appearance when the power of the apparatus is set in the OFF state can be prevented.

FIELD OF THE INVENTION 
The present invention relates to a liquid crystal display apparatus for use 
in OA (office Automation) apparatuses, AV (Audio Visual) apparatuses, etc. 
In particular, a display is performed by supplying a plurality of bias 
voltages to a liquid crystal display panel. 
BACKGROUND OF THE INVENTION 
FIG. 11 shows a schematic structure of a Super Twisted Nematic (STN) liquid 
crystal apparatus. As shown in the figure, the liquid crystal display 
apparatus includes a liquid crystal display panel 51, a segment driver 52, 
and a common driver 53. Although not shown, a plurality of scanning lines 
and signal lines are formed in the liquid crystal display panel 51. The 
segment driver 52 and the common driver 53 are drive circuits for 
supplying various signals (to be described later) to the liquid crystal 
display panel 51. 
To the segment driver 52, a display data signal DATA and an input data 
shift clock XCK are respectively inputted via a buffer 54. To the common 
driver 53, a scanning start signal YD is inputted via the buffer 54. 
Further, an input data latch signal LP is inputted to the segment driver 
52 and the common driver 53 via the buffer 54. A display control signal 
DISP is inputted via the buffer 54 to an alternating signal generating 
circuit 55 and a power sequence circuit 56. 
The alternating signal generating circuit 55 generates an alternating 
signal M based on the display control signal DISP to be inputted thereto. 
The alternating signal M is inputted to the segment driver 52 and the 
common driver 53. The power sequence circuit 56 controls ON/OFF of the 
liquid crystal display panel 51 based on the display control signal DISP 
to be inputted thereto. The display control signal DISP outputted from the 
power sequence circuit 56 is respectively inputted to the segment driver 
52, the common driver 53 and a DC/DC converter 57. 
Other than the display control signal DISP, a logic source voltage 
V.sub.dd, and a contrast adjusting voltage V.sub.CON are inputted to the 
DC/DC converter 57. Then, the DC/DC converter 57 outputs a bias reference 
voltage V.sub.ee to the bias voltage generating circuit 58. The bias 
voltage generating circuit 58 outputs bias voltages (intermediate voltage) 
V.sub.1, V.sub.2, . . . , V.sub.n based on the bias reference voltage 
V.sub.ee to the segment driver 52 and the common driver 53. 
Namely, in the described liquid crystal display apparatus, various signals, 
clocks and bias voltages V.sub.1, V.sub.2, . . . V.sub.n are inputted to 
the segment driver 52 and the common driver 53. As a result, a scanning 
line of the liquid crystal display panel 51 is selected as desired, and a 
predetermined dot of the liquid crystal display panel 51 is lightened in 
response to the display data signal DATA. 
In the described liquid crystal display apparatus, even when the power of 
the apparatus is set in the OFF state, or a display is prohibited, a DC 
voltage is still being applied to the liquid crystal display panel 51. 
This causes degradation of the liquid crystal display panel 51 in its 
quality and appearance. In order to prevent such problem, it is required 
to remove charges stored on the liquid crystal display panel 51 when the 
power of the apparatus is set in the OFF state, or a display is 
prohibited. 
For the described purpose, the conventional liquid crystal display 
apparatus includes a discharge circuit 59 to remove charges stored on the 
liquid crystal display panel 51 when the power of the apparatus is set in 
the OFF state or a display is prohibited. 
As shown in FIG. 12, the discharge circuit 59 is formed by discharge 
resistors R.sub.1, R.sub.2, . . . R.sub.n. These discharge resistors 
R.sub.1, R.sub.2, . . . , R.sub.n are provided in parallel across 
respective bias voltages V.sub.1, V.sub.2, . . . V.sub.n, outputted from 
the bias voltage generating circuit 58, and a V.sub.ss line (0 V). In the 
described arrangement, when the power of the apparatus is set in the OFF 
state, or a display is prohibited, charges on the liquid crystal display 
panel 51 are removed via the discharge resistors R.sub.1, R.sub.2, . . . , 
R.sub.n by discharge. 
On the other hand, FIG. 13 shows a schematic structure of the liquid 
crystal display apparatus which is disclosed, for example, by Japanese 
Unexamined Patent Application No. 46687/1984 (Tokukaisho 59-46687). In 
this liquid crystal display apparatus, a bias supply circuit 61 is 
connected to the V.sub.ss line (0V) via switching elements such as field 
effect transistors Q.sub.1 ' and Q.sub.2 '. When an application of bias 
voltages is not needed such as in a display prohibit drive mode, etc., the 
field effect transistors Q.sub.1 ' and Q.sub.2 ' are set in the OFF state. 
According to the described arrangement, when the application of the bias 
voltages is not needed, the field effect transistors Q.sub.1 ' and Q.sub.2 
' are set in the OFF state. Therefore, a current does not flow in the 
V.sub.ss line via bias voltage generation-use voltage dividing resistors 
R.sub.1 ' and R.sub.2 '. As a result, a waste power consumption in the 
bias voltage generation-use voltage dividing resistors R.sub.1 ' and 
R.sub.2 ' when an application of bias voltages is not needed can be 
avoided. 
However, in the arrangement of the conventional liquid crystal display 
apparatus shown in FIG. 12, as bias voltages V.sub.1, V.sub.2, . . . , 
V.sub.n are always applied to the liquid crystal display panel 51 and 
peripheral circuits, while the bias voltages V.sub.2, V.sub.2, . . . , 
V.sub.n are being applied thereto, a current from the bias voltage 
generating circuit 58 flows also in the discharge resistors R.sub.1, 
R.sub.2, . . . R.sub.n that are respectively connected to the bias 
voltages V.sub.1, V.sub.2, . . . , V.sub.n in parallel. Therefore, in the 
conventional arrangement, when the power of the apparatus is set in the ON 
state, a power P.sub.R is wasted. 
For example, a waste power consumption in the case of generating four bias 
voltages V.sub.1, V.sub.2, V.sub.3 and V.sub.4 as shown in FIG. 14 will be 
considered. Generally, the power P.sub.R to be consumed in the discharge 
resistors R.sub.1, R.sub.2, . . . R.sub.n are given by the following 
equation: 
##EQU1## 
Assumed that the bias reference voltage V.sub.ee =30 V, then respective 
bias voltages V.sub.1, V.sub.2, V.sub.3 and V.sub.4 are respectively 
28.125 V, 26.26 V, 3.75 V and 1.875 V, and the discharge resistors 
R.sub.1, R.sub.2, R.sub.3 and R.sub.4 are respectively 33 k.OMEGA.. From 
the above equation, the power P.sub.R to be consumed in the discharge 
resistors R.sub.1, R.sub.2, R.sub.3 and R.sub.4 is given as P.sub.R =45.4 
mW. Here, these numeral values correspond to around 5 to 6 percents of the 
power consumed when displaying an image. Therefore, while the bias 
voltages V.sub.1, V.sub.2, V.sub.3 and V.sub.4 are being applied, the 
power P.sub.R is always consumed in the discharge circuit 59. 
According to the arrangement of the described Japanese publication shown in 
FIG. 13, when the power of the apparatus is set in the OFF state, the 
power to be consumed in the bias supply circuit 61 can be saved by setting 
the field effect transistors Q.sub.1 ' and Q.sub.2 ' in the OFF state. 
However, when the field effect transistors Q.sub.1 ' and Q.sub.2 ' are set 
in the OFF state, charges stored on the liquid crystal display panel 62 do 
not flow in the V.sub.ss line (0 V) via the field effect transistors 
Q.sub.1 ' and Q.sub.2 '. As a result, the charges stored on the liquid 
crystal display panel 62 are not removed, which results in degradation of 
the liquid crystal display panel 62 in its quality and appearance. 
SUMMARY OF THE INVENTION 
It is therefore an objective of the present invention to provide a liquid 
crystal display apparatus which permits a reduction in waste power 
consumption when a power of the apparatus is set in the ON state and 
prevents a liquid crystal display panel from being degraded in its quality 
and appearance by removing therefrom charges stored thereon when the power 
of the apparatus is set in the OFF state. 
In order to achieve the object, the liquid crystal display apparatus in 
accordance with the present invention is characterized by including: a 
liquid crystal display panel; drive means for driving the liquid crystal 
display panel; bias voltage generation means for generating a plurality of 
bias voltages in accordance with display data, and for supplying the 
plurality of bias voltages to the drive means to perform a display on the 
liquid crystal display panel; and discharge means, connected to the drive 
means and to the bias voltage generation means, for removing charges 
supplied thereto by discharge, wherein the discharge means removes charges 
stored on the liquid crystal display panel by discharge when a power of 
the apparatus is set in the OFF state, or a display is prohibited, while 
the bias voltages are supplied only to the liquid crystal display panel 
when a display is permitted. 
According to the described arrangement, when a display is permitted, a 
plurality of bias voltages are applied to a liquid crystal display panel 
according to the display data via the drive means from the bias voltage 
generation means. Here, the bias voltage is supplied only to the liquid 
crystal display panel by the function of the discharge means. Namely, when 
a display is permitted, the bias voltage is not supplied to members other 
than the liquid crystal display panel. As a result, waste power 
consumption by members other than the liquid crystal display panel can be 
prevented. 
Conventionally, when a display is permitted, the bias voltages are applied 
also to the discharge means, and the power is wasted in the discharge 
means when a display is permitted. However, according to the described 
arrangement, when a display is permitted, the bias voltages are not 
supplied to members other than the liquid crystal display panel. 
Therefore, the described arrangement offers a solution to the described 
problem associated with the conventional arrangement, i.e., a waste power 
consumption by members other than the liquid crystal display panel, 
thereby achieving an apparatus of a low power consumption. 
On the other hand, when the power of the apparatus is set OFF, or a display 
is prohibited, charges stored on the liquid crystal display panel are 
discharged by the function of the discharge means. As a result, the liquid 
crystal display panel can be prevented from being degraded in its quality 
and appearance. 
The discharge means is composed of a pair of switch means and a resistor 
provided corresponding to each bias voltage. In this case, each bias 
voltage is connected to ground via the corresponding switch means and the 
resistor. 
In this case, for example, by switching OFF the switch means when a display 
is permitted, bias voltages are not supplied to the discharge means but 
only to the liquid crystal display panel. As a result, the power is not 
consumed in the discharge means when a display is permitted. 
Additionally, for example, when the power is set OFF, or a display is 
prohibited, by switching ON the switch means, charges stored on the liquid 
crystal display panel flow in the resistor provided in the discharge means 
via the switch means. As a result, charges are removed from the resistor 
by discharge. 
Therefore, the described arrangement reliably prevents the bias voltage 
from being supplied the discharge means by means of the switch means when 
a display is permitted, thereby achieving an apparatus of low power 
consumption. Moreover, in the state where the power is set OFF, and a 
display is prohibited, charges stored on the liquid crystal display panel 
are supplied to the discharge means by switch means and discharged. As a 
result, the liquid crystal display panel can be prevented from being 
degraded in its quality and appearance. 
The discharge means is composed of, for example, the field effect 
transistors provided so as to correspond to respective bias voltages which 
may be connected to ground via the corresponding field effect transistors. 
For example, the P-type field effect transistor has such characteristic 
that a drain current does not flow when a gate-source voltage becomes not 
less than a predetermined threshold value. Namely, in this state, the 
field effect transistor is set in the OFF state. On the other hand, when 
the gate-source voltage becomes not more than the predetermined threshold 
value, the field effect transistor has such characteristic that a drain 
current flows with a predetermined resistance. Namely, in this case, the 
field effect transistor is set in the ON state. 
The field effect transistor is set in the OFF state when the power of the 
apparatus is set in the ON state; while it is set in the ON state with a 
predetermined resistance when the power of the apparatus is set in the OFF 
state. Namely, the field effect transistor serve both as the switch means 
and the resistor. 
Therefore, according to the described arrangement, even if the discharge 
means is constituted by the field effect transistors, the described 
effects of the present invention that a waste power consumption which 
possibly occurs when the power of the apparatus is set in the OFF state 
can be prevented, and the liquid crystal display panel can be prevented 
from being degraded by removing charges stored on the liquid crystal 
display panel by discharge when the power of the apparatus is set in the 
OFF position. 
Additionally, as the field effect transistor itself serves as the resistor, 
a need of additional resistor for use in discharge can be eliminated. As 
this permits a number of required members in the apparatus to be reduced, 
a liquid crystal display apparatus of a simplified structure can be 
achieved. 
Here, instead of adopting the field effect transistors, bipolar transistors 
having the same characteristics as the field effect transistor may be 
equally adopted, and such transistor would offer the described effects of 
the present invention. 
For a fuller understanding of the nature and advantages of the invention, 
reference should be made to the ensuing detailed description taken in 
conjunction with the accompanying drawings.

DETAILED DESCRIPTION OF THE EXEMPLARY EMBODIMENTS 
The following descriptions will discuss a embodiment of the present 
invention in reference to FIG. 1. A liquid crystal display apparatus in 
accordance with the present invention has the same structure as the 
conventional liquid crystal display apparatus except for a discharge 
circuit 1. Thus, the descriptions of the members having the same function 
as those of the aforementioned conventional arrangement shall be omitted, 
and the explanations will be given mainly on the structure of the 
discharge circuit 1 and the operation of the apparatus. 
As shown in FIG. 1, a liquid crystal display apparatus in accordance with 
the present invention includes a liquid crystal display panel 2, a bias 
voltage generating circuit 3, and a liquid crystal driver 4 for driving 
the liquid crystal display panel 2. 
The liquid crystal display panel 2 is arranged such that a liquid crystal 
is sealed between a pair of transparent substrates, wherein a plurality of 
scanning lines and signal lines are formed on one of the transparent 
substrates. The bias voltage generating circuit 3 generates a plurality of 
bias voltages V.sub.1, V.sub.2, . . . V.sub.n according to display data by 
dividing a predetermined reference voltage, and applies the plurality of 
bias voltages V.sub.1, V.sub.2, . . . V.sub.n to the liquid crystal driver 
4 to display the liquid crystal display panel 2. 
The liquid crystal driver 4 is composed of a segment driver and a common 
driver. The segment driver selects the plurality of bias voltages V.sub.1, 
V.sub.2, . . . V.sub.n from the bias voltage generating circuit 3 to be 
applied to the liquid crystal display panel 2. The common driver supplies 
a display drive signal of the voltage corresponding to the display data 
based on the bias voltages V.sub.1, V.sub.2, . . . V.sub.n to the liquid 
crystal display panel 2. As a result, dots in the liquid crystal display 
panel 2, corresponding to the scanning line which undergoes an application 
of the bias voltages V.sub.1, V.sub.2, . . . V.sub.n and the signal line 
which undergoes an application of a display drive signal, flash, thereby 
performing a display based on the display data. 
To the bias voltage generating circuit 3 and the liquid crystal driver 4, a 
discharge circuit 1 for removing charges by discharge is connected. The 
discharge circuit 1 composed of a plurality of switches SW.sub.1, 
SW.sub.2, . . . SW.sub.n, and discharge resistors R.sub.1, R.sub.2, . . . 
R.sub.n. Then, a switch SW.sub.1 and a resistor R.sub.1, a switch SW.sub.2 
and a resistor R.sub.2, and a switch SW.sub.n and a resistor R.sub.n are 
provided in pairs so as to correspond to the bias voltages V.sub.1, 
V.sub.2, . . . V.sub.n respectively. 
To be specific, switches SW.sub.1, SW.sub.2 . . . SW.sub.n sides of the 
discharge circuit 1 are respectively connected to output terminals of the 
bias voltage generating circuit 3. On the other hand, the resistors 
R.sub.1, R.sub.2, . . . R.sub.n sides of the discharge circuit 1 are 
connected to ground to be set in a ground potential V.sub.ss (0V). Namely, 
the bias voltages V.sub.1, V.sub.2, . . . V.sub.n are connected to ground 
via switches SW.sub.1, SW.sub.2, . . . , SW.sub.n and the resistors 
R.sub.1, R.sub.2, . . . R.sub.n. Additionally, the switches SW.sub.1, 
SW.sub.2, . . . SW.sub.n are set OFF when the power of the apparatus is 
set in the ON state, while set ON when the power of the apparatus is set 
in the OFF state. 
Next, an operation of the liquid crystal display apparatus of the present 
invention including the discharge circuit 1 will be explained in reference 
to figures. 
In the described arrangement, when the power of the apparatus is set in the 
ON state, i.e., a display is permitted (normal display state), the bias 
voltage generating circuit 3 generates a plurality of bias voltages 
V.sub.1, V.sub.2, . . . V.sub.n. Then, the selected bias voltage and the 
display drive signal are applied to the liquid crystal display panel 2 via 
the scanning line and the signal line. 
Here, when the power of the apparatus is set in the ON state, i.e., when a 
display is permitted, as respective switches SW.sub.1, SW.sub.2, . . . 
SW.sub.n of the discharge circuit 1 are set in the OFF state, the bias 
voltages V.sub.1, V.sub.2, . . . V.sub.n are not applied to the discharge 
circuit 1 but to the liquid crystal display panel 2 via the liquid crystal 
driver 4. Namely, in the state where a display is permitted, the bias 
voltages V.sub.1, V.sub.2, . . . V.sub.n are not applied to the members 
other than the liquid crystal display panel 2. 
On the other hand, when the power of the apparatus is set in the OFF state, 
i.e., when a display is prohibited, as the switches SW.sub.1, SW.sub.2, . 
. . SW.sub.n are set in the ON state, charges stored on the liquid crystal 
display panel 2 flow in the resistors R.sub.1, R.sub.2, . . . R.sub.n via 
the switches SW.sub.1, SW.sub.2, . . . SW.sub.n. As a result, charges are 
removed via the resistors R.sub.1, R.sub.2, . . . R.sub.n by discharge. 
As described, the liquid crystal display apparatus in accordance with the 
present invention includes the liquid crystal display panel 2, and the 
liquid crystal driver 4 for driving the liquid crystal display panel 2, 
wherein a plurality of bias voltages V.sub.1, V.sub.2, . . . V.sub.n are 
applied to the liquid crystal driver 4 based on the display data so as to 
perform a display of the liquid crystal display panel 2. The liquid 
crystal display apparatus includes the discharge circuit 1 for removing 
charges from the liquid crystal display panel 2 by discharge when the 
apparatus is set in the OFF state, and the display is prohibited, while 
for supplying the bias voltages V.sub.1, V.sub.2, . . . V.sub.n only to 
the liquid crystal display panel 2 when a display is permitted. 
According to the described arrangement, when a display is permitted, a 
plurality of bias voltages V.sub.1, V.sub.2, . . . V.sub.n are applied 
based on the display data to the liquid crystal display panel 2 via the 
liquid crystal driver 4. In this state, the bias voltages V.sub.1, 
V.sub.2, . . . V.sub.n are applied only to the liquid crystal display 
panel 2 by the discharge circuit 1. Namely, the plurality of bias voltages 
V.sub.1, V.sub.2, . . . V.sub.n are not applied to the members other than 
the liquid crystal display panel 2 when a display is permitted. As a 
result, a waste power consumption by the members other than the liquid 
crystal display panel 2 can be avoided. 
For comparison, conventionally, respective bias voltages are also applied 
to the discharge circuit when a display is permitted. This causes a waste 
power consumption by the discharge circuit. In contrast, according to the 
described arrangement, the bias voltages V.sub.1, V.sub.2, . . . V.sub.n 
are not applied to members other than the liquid crystal display panel 2 
when a display is permitted. 
Therefore, the described arrangement offers a solution to the problem 
associated with the conventional arrangement, i.e., the waste power 
consumption by members other than the liquid crystal display panel 2 when 
a display is permitted. As a result, a total power consumption by the 
apparatus as a whole can be reduced from around 5 to 6% of the power 
consumption in the conventional liquid crystal display apparatus, thereby 
providing a liquid crystal display apparatus of low power consumption. 
On the other hand, when the power of the apparatus is set in the OFF state, 
or when a display is inhibited, charges stored on the liquid crystal 
display panel 2 are removed by discharge by the discharge circuit 1. As a 
result, the liquid crystal display panel 2 can be prevented from being 
degraded in its quality and appearance. 
The liquid crystal display apparatus in accordance with the present 
invention is composed of switches SW.sub.1, SW.sub.2, . . . SW.sub.n and 
the resistors R.sub.1, R.sub.2 and R.sub.n which form pairs respectively 
corresponding to the bias voltages V.sub.1, V.sub.2, . . . , V.sub.n, 
wherein respective bias voltages V.sub.1, V.sub.2, . . . V.sub.n are 
connected to ground via the switches SW.sub.1, SW.sub.2, . . . SW.sub.n 
and the resistors R.sub.1, R.sub.2, R.sub.n. 
According to the described arrangement, upon switching OFF the switches 
SW.sub.1, SW.sub.2, . . . SW.sub.n, the bias voltages V.sub.1, V.sub.2, . 
. . V.sub.n are applied not to the discharge circuit 1 but only to the 
liquid crystal display panel 2. This prevents a waste power consumption by 
the discharge circuit 1 in a state where a display is permitted. 
On the other hand, when the switches SW.sub.1, SW.sub.2, . . . SW.sub.n are 
set ON in the state when the power is set in the OFF state, or a display 
is prohibited, charges stored on the liquid crystal display panel 2 flow 
in the resistors R.sub.1, R.sub.2, . . . R.sub.n provided in the discharge 
circuit 1 via the switches SW.sub.1, SW.sub.2, . . . SW.sub.n. As a 
result, charges are removed by the resistors R.sub.1, R.sub.2, . . . 
R.sub.n by discharge. 
Therefore, according to the described arrangement, when a display is 
permitted, an application of respective bias voltages V.sub.1, V.sub.2, . 
. . V.sub.n to the discharge circuit 1 can be surely prevented. As a 
result, when a display is permitted, respective bias voltages V.sub.1, 
V.sub.2, . . . V.sub.n can be supplied only to the liquid crystal display 
panel 2. As a result, a waste power consumption of the members other than 
liquid crystal display panel 2 can be surely prevented, thereby providing 
a liquid crystal display apparatus which surely permits a reduction in 
power consumption. 
When the power of the apparatus is set in the OFF state, and the display is 
prohibited, the charges stored on the liquid crystal display panel 2 can 
be supplied to the discharge circuit 1 for sure and discharged by the 
switches SW.sub.1, SW.sub.2, . . . SW.sub.n. As a result, the liquid 
crystal display panel 2 can be surely prevented from being degraded in its 
quality and appearance. 
Another embodiment of the present invention will be explained in reference 
to FIG. 2 through FIG. 10. Here, members having the same function as those 
of the aforementioned embodiment will be designated by the same reference 
numerals, and thus the descriptions thereof shall be omitted here. 
FIG. 2 shows a schematic structure of a liquid crystal display apparatus in 
accordance with the present embodiment. According to the liquid crystal 
display apparatus, a discharge circuit 1a composed of P-type field effect 
transistors Q.sub.1, Q.sub.2, . . . Q.sub.n is adopted in replace of the 
discharge circuit 1 (see FIG. 1) of the first embodiment which is 
constituted by respective pairs of the switch SW.sub.1 and the resistor 
R.sub.1, the switch SW.sub.2 and the resistor R.sub.2, . . . the switch 
SW.sub.n and the resistor R.sub.n. 
Drain electrodes D.sub.1, D.sub.2, . . . D.sub.n of the P-type field effect 
transistors Q.sub.1, Q.sub.2, . . . Q.sub.n are respectively connected to 
output terminals of the bias voltage generating circuit 3. Source 
electrodes S.sub.1, S.sub.2, . . . S.sub.n are respectively connected the 
ground potential V.sub.ss. The gate electrodes G.sub.1, G.sub.2, . . . 
G.sub.n are respectively connected to the bias reference voltage V.sub.ee 
for generating the bias voltages V.sub.1, V.sub.2, . . . V.sub.n. The bias 
voltages V.sub.1, V.sub.2, . . . V.sub.n are connected to ground via the 
P-type field effect transistors Q.sub.1, Q.sub.2, . . . Q.sub.n. 
Here, FIG. 3 shows a correlation between the gate-source voltage and the 
drain current in the P-type field effect transistors Q.sub.1, Q.sub.2, . . 
. Q.sub.n. As can be seen from the figure, the P-type field effect 
transistors Q.sub.1, Q.sub.2, . . . Q.sub.n have such characteristics that 
when a gate-source voltage becomes not less than a predetermined threshold 
value, a drain current does not flow. Namely, in this state, the P-type 
field effect transistors Q.sub.1, Q.sub.2, . . . Q.sub.n are set in the 
OFF state. On the other hand, when a gate-source voltage is not more than 
a predetermined threshold value, a drain current flows in the P-type field 
effect transistors Q.sub.1, Q.sub.2, . . . Q.sub.n with a predetermined 
resistor. Namely, P-type field effect transistors Q.sub.1, Q.sub.2, . . . 
Q.sub.n are set in the ON state. In the present embodiment, the bias 
reference voltage V.sub.ee is set such that the gate-source voltage of the 
P-type field effect transistors Q.sub.1, Q.sub.2, . . . Q.sub.n is greater 
than a predetermined threshold value. 
In the described arrangement, as the above-defined bias reference voltage 
Vhd ee is applied to the gate electrodes G.sub.1, G.sub.2, . . . G.sub.n 
respectively when the power of the apparatus is in the ON state, a 
gate-source voltage becomes greater than the threshold value, and the 
drain current does not flow by the described characteristics. As a result, 
the P-type field effect transistors Q.sub.1, Q.sub.2, . . . Q.sub.n shown 
in FIG. 2 are set in the OFF state. Therefore, bias voltages V.sub.1, 
V.sub.2, . . . V.sub.n from the bias voltage generating circuit 3 are 
applied only to the liquid crystal display panel 2 via the liquid crystal 
driver 4. 
On the other hand, when the power of the apparatus is in the OFF state, as 
the bias reference voltage V.sub.ee is not applied to the gate electrodes 
G.sub.1, G.sub.2, . . . G.sub.n respectively, a gate-source voltage 
becomes smaller than the predetermined threshold value, and the P-type 
field effect transistors Q.sub.1, Q.sub.2, . . . Q.sub.n respectively have 
a predetermined resistor by the described characteristics, thereby setting 
the transistors Q.sub.1, Q.sub.2, . . . Q.sub.n in the ON state. As a 
result, when the power of the apparatus is set in the OFF state, in the 
described P-type field effect transistors Q.sub.1, Q.sub.2, . . . Q.sub.n, 
charges stored on the liquid crystal display panel 2 are surely removed by 
discharge. 
As described, the liquid crystal display apparatus in accordance with the 
present embodiment is arranged such that the discharge circuit 1a is 
composed of the P-type field effect transistors Q.sub.1, Q.sub.2, . . . 
Q.sub.n provided so as to correspond to the bias voltages V.sub.1, 
V.sub.2, . . . V.sub.n respectively, and the bias voltages V.sub.1, 
V.sub.2, . . . V.sub.n are connected to ground via the P-type field effect 
transistors Q.sub.1, Q.sub.2, . . . Q.sub.n. 
According to the described arrangement, when the power of the apparatus is 
set in the ON state, the P-type field effect transistors Q.sub.1, Q.sub.2, 
. . . Q.sub.n are set in the OFF state. On the other hand, when the power 
of the apparatus is set in the OFF state, the P-type field effect 
transistors Q.sub.1, Q.sub.2, . . . Q.sub.n themselves have resistors and 
are set in the ON state. Namely, the P-type field effect transistors 
Q.sub.1, Q.sub.2, . . . Q.sub.n serve both the switches SW.sub.1, 
SW.sub.2, . . . SW.sub.n and the resistors R.sub.1, R.sub.2 . . . R.sub.n 
adopted in the first embodiment. 
Therefore, when the power of the apparatus is set in the ON state, the bias 
voltages V.sub.1, V.sub.2, . . . V.sub.n generated from the bias voltage 
generating circuit 3 can be surely applied only to the liquid crystal 
display panel 2. As a result, the problem of waste power consumption by 
members other than the liquid crystal display panel 2 can be prevented, 
thereby providing a liquid crystal display apparatus of low power 
consumption. 
On the other hand, when the power of the apparatus is set in the OFF state, 
charges stored on the liquid crystal display panel 2 can be removed by 
discharge by the P-type field effect transistors Q.sub.1, Q.sub.2, . . . 
Q.sub.n, thereby preventing the liquid crystal display panel 2 from being 
degraded in its quality and appearance. 
Another beneficial feature that the discharge circuit 1a composed of the 
P-type field effect transistors Q.sub.1, Q.sub.2, . . . Q.sub.n serves as 
the discharge circuit 1 of the first embodiment eliminates a need of 
additional resistors for use in discharge. Namely, as the described 
arrangement permits a simplification of the structure by reducing a number 
of required members of the apparatus and a cost reduction of the liquid 
crystal display apparatus. 
Furthermore, as the bias reference voltage V.sub.ee for generating the bias 
voltages V.sub.1, V.sub.2, . . . V.sub.n are applied to the gate 
electrodes G.sub.1, G.sub.2, . . . G.sub.n of the P-type field effect 
transistors Q.sub.1, Q.sub.2, . . . Q.sub.n, the drain current as well as 
the voltage applied thereto can be adjusted. 
In the described embodiment, the arrangement wherein the bias reference 
voltage V.sub.ee is applied to respective gate electrodes G.sub.1, G.sub.2 
. . . G.sub.n of the P-type field effect transistors Q.sub.1, Q.sub.2, . . 
. Q.sub.n is adopted. However, as shown in FIG. 4, the arrangement of 
applying the display control signal DISP to the respective gate electrodes 
G.sub.1, G.sub.2, . . . G.sub.n may be adopted, as such arrangement offers 
the same effect as achieved from the arrangement of the present embodiment 
by the characteristics of the P-type field effect transistors Q.sub.1, 
Q.sub.2, . . . Q.sub.n. 
Namely, the bias reference voltage V.sub.ee is outputted from a DC/DC 
converter (not shown) based on the ON/OFF control of the display control 
signal DISP. Therefore, the ON/OFF control of the display control signal 
DISP is consequently the same as the ON/OFF control of the bias reference 
voltage V.sub.ee. Therefore, the same effect can be achieved also from the 
arrangement of applying the display control signal DISP to respective gate 
electrodes G.sub.1, G.sub.2, . . . G.sub.n of the P-type field effect 
transistors Q.sub.1, Q.sub.2, . . . Q.sub.n. Therefore, the bias reference 
voltage V.sub.ee and the display control signal DISP, the one which can be 
applied to the gate electrodes G.sub.1, G.sub.2, . . . G.sub.n in more 
convenient manner can be selected. 
Further, by applying the bias reference voltage V.sub.ee or the display 
control signal DISP to respective gate electrodes G.sub.1, G.sub.2, . . . 
G.sub.n of the P-type field effect transistors Q.sub.1, Q.sub.2, . . . 
Q.sub.n, the selective use of the P-type field effect transistors Q.sub.1, 
Q.sub.2, . . . Q.sub.n according to the withstanding voltage may be 
permitted. 
In the present embodiment, explanations have been given through the case of 
adopting the discharge circuit 1a composed of the P-type field effect 
transistors Q.sub.1, Q.sub.2, . . . Q.sub.n in replace of the discharge 
circuit 1 adopted in the first embodiment. However, other than the 
discharge circuit 1a, for example, as shown in FIG. 5, a discharge circuit 
1b composed of bipolar transistors T.sub.1, T.sub.2, . . . T.sub.n having 
the same characteristics as the P-type field effect transistors Q.sub.1, 
Q.sub.2, . . . Q.sub.n may be adopted in replace of the discharge circuit 
1. 
In this case, collectors C.sub.1, C.sub.2, . . . C.sub.n of the bipolar 
transistors T.sub.1, T.sub.2, . . . T.sub.n are respectively connected to 
output terminals of the bias voltage generating circuit 3. On the other 
hand, emitters E.sub.1, E.sub.2, . . . E.sub.n are respectively connected 
to a ground potential V.sub.ss. On the other hand, bases B.sub.1, B.sub.2, 
. . . B.sub.n are respectively connected to the bias reference voltage 
V.sub.ee for generating the bias voltages V.sub.1, V.sub.2, . . . V.sub.n. 
Namely, the bipolar transistors T.sub.1, T.sub.2, . . . T.sub.n are 
provided so as to respectively correspond to the bias voltages V.sub.1, 
V.sub.2, . . . V.sub.n, and the bias voltages V.sub.1, V.sub.2, . . . 
V.sub.n are connected to ground via the bipolar transistors T.sub.1, 
T.sub.2, . . . T.sub.n. 
When the power of the apparatus is set in the ON state, as the bias 
reference voltage V.sub.ee is applied to the bases B.sub.1, B.sub.2, . . . 
B.sub.n respectively, the bipolar transistor T.sub.1, T.sub.2, . . . 
T.sub.n are set in the OFF state by the characteristics thereof. As a 
result, bias voltages V.sub.1, V.sub.2, . . . V.sub.n generated by the 
bias voltage generating circuit 3 are surely applied only to the liquid 
crystal display panel 2, thereby preventing a waste power consumption by 
members other than the liquid crystal display panel 2. 
On the other hand, when the power of the apparatus is set in the OFF state, 
as the bias reference voltage V.sub.ee is not applied to the bases 
B.sub.1, B.sub.2, . . . B.sub.n respectively, the bipolar transistors 
T.sub.1, T.sub.2, . . . T.sub.n have predetermined resistors by the 
characteristics thereof, and are set in the ON state. This permits charges 
stored on the liquid crystal display panel 2 to be surely removed by 
discharge in the bipolar transistors T.sub.1, T.sub.2, . . . T.sub.n. As a 
result, the described arrangement prevents the liquid crystal display 
panel 2 from being degraded in its quality and appearance. 
As shown in FIG. 6, it may be arranged such that the display control signal 
DISP is inputted instead of the bias reference voltage V.sub.ee to the 
respective bases of the bipolar transistor T.sub.1, T.sub.2, . . . 
T.sub.n. Needless to mention, this arrangement would offer the same 
effects as achieved from the aforementioned arrangement. 
Additionally, as shown in FIG. 7, by supplying the bias reference voltage 
V.sub.ee or the display control signal DISP to respective bases B.sub.1, 
B.sub.2, . . . B.sub.n of the bipolar transistors T.sub.1, T.sub.2, . . . 
T.sub.n, the collector current as well as the voltage to be applied to the 
bipolar transistors T.sub.1, T.sub.2, . . . T.sub.n can be adjusted. 
Additionally, a bias voltage generating circuit 3' in which the discharge 
circuit 1a composed of the P-type field effect transistors Q.sub.1, 
Q.sub.2, . . . Q.sub.n is incorporated into the bias voltage generating 
circuit 3 may be adopted. 
The generally used bias voltage generating circuit 3 is composed of a 
bipolar or CMOS (Complementary Metal Oxide Semiconductor). This permits 
the transistor to be easily incorporated into the bias voltage generating 
circuit 3. Therefore, by adopting the bias voltage generating circuit 3' 
in which the discharge circuit 1a and the bias voltage generating circuit 
3 are integrated by incorporating the P-type field effect transistor 
Q.sub.1, Q.sub.2, . . . Q.sub.n into the bias voltage generating circuit 
3, a required space for the apparatus can be reduced. 
To be more specific, in the arrangement where the bias voltage generating 
circuit 3 and the discharge circuit 1a are separately provided, the 
measurement shows that the occupied area by these members is 205.3 
mm.sup.2. On the other hand, when adopting the described bias voltage 
generating circuit 3' in which the discharge circuit la and the bias 
voltage generating circuit 3 are integrated, the occupied area by these 
members, i.e., the occupied area by the bias voltage generating circuit 3' 
is 108 mm.sup.2. This proves that the required space can be saved by 
adopting the bias voltage generating circuit 3'. 
As shown in FIG. 8, a liquid crystal driver 4' in which the discharge 
circuit 1a composed of the P-type field effect transistors Q.sub.1, 
Q.sub.2, . . . Q.sub.n is incorporated into the liquid crystal driver 4 
may be adopted. 
The liquid crystal driver 4 is arranged such that the segment driver and 
the common driver to which bias voltages V.sub.1, V.sub.2, . . . V.sub.n 
are respectively applied are constituted by the CMOS. This permits the 
P-type field effect transistors Q.sub.1, Q.sub.2, . . . Q.sub.n to be 
easily incorporated into the segment driver and the common driver. 
Therefore, by incorporating the P-type field effect transistors Q.sub.1, 
Q.sub.2, . . . Q.sub.n into the liquid crystal driver 4 to form the liquid 
crystal driver 4' in which the discharge circuit 1a and the liquid crystal 
driver 4 are integrated, a required space for the apparatus can be 
reduced. 
As shown in FIG. 9, a bias voltage generating circuit 3' in which the 
discharge circuit lb composed of the bipolar transistors T.sub.1, T.sub.2, 
. . . T.sub.n and the bias voltage generating circuit 3 are integrally 
formed may be adopted. Needless to say, such arrangement would offer the 
same effect as achieved by the aforementioned arrangement. 
Similarly, as shown in FIG. 10, the liquid crystal driver 4' in which the 
discharge circuit 1b composed of the bipolar transistors T.sub.1, T.sub.2, 
. . . T.sub.n and the liquid crystal driver 4 are integrally formed may be 
adopted. Needless to say, such arrangement would offer the same effect as 
achieved by the aforementioned arrangement. 
As described, the arrangement in which the discharge circuits la and lb are 
respectively incorporated into the bias voltage generating circuit 3 or 
the liquid crystal driver 4, the same effect of the present invention can 
be achieved without increasing a cost. 
The invention being thus described, it will be understood that the same may 
be varied in many ways. Such variations are not to be regarded as a 
departure from the spirit and scope of the invention, and all such 
modifications as would be apparent to one skilled in the art are intended 
to be included within the scope of the following claims.