Logic devices, digital filters and video codecs including logic devices, and methods of controlling logic devices

A logic device includes: a function block and a configuration block. The function block is configurable to perform operations associated with a plurality of operation modes. The configuration block is configured to configure the function block to perform an operation associated with any one of the plurality of operation modes. The logic device also includes a controller configured to control the configuration block so that the function block is configured to perform the operation.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims priority under 35 U.S.C. § 119 to Korean Patent Application No. 10-2012-0131110, filed on Nov. 19, 2012, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.

BACKGROUND

Field

Example embodiments relate to logic devices, digital filters and video codecs including logic devices, methods of operating controllers and methods of controlling logic devices.

Description of the Related Art

Use of logic devices capable of being arbitrarily configured by users has increased. As such, users may control the connection between signal lines included in logic devices to configure or re-configure the logic devices to implement different functions.

Also, logic devices may be initially configured or re-configured later to perform a plurality of functions as desired. Logic devices may be implemented in the form of programmable logic devices (PLDs).

SUMMARY

Example embodiments provide logic devices that may be configured more effectively.

Example embodiments also provide digital filters and video codecs including logic devices.

Example embodiments also provide methods of operating controllers and methods of controlling logic devices.

Example embodiments also provide non-transitory computer readable recording media having recorded thereon programs that when executed by a computing device cause the computing device to execute the methods.

According to at least one example embodiment, a logic device includes: a function block configurable to perform operations associated with a plurality of operation modes; a configuration block including at least one nonvolatile storage device configured to store configurable data for configuring the function block to perform an operation associated with any one of the plurality of operation modes; and a controller configured to control the configuration block to configure the function block to perform the operation associated with any one of the plurality of operation modes.

At least one other example embodiment provides a digital filter including a logic device. The logic device includes: a function block configurable to perform operations associated with a plurality of operation modes; a configuration block including at least one nonvolatile storage device configured to store configurable data for configuring the function block to perform an operation associated with any one of the plurality of operation modes; and a controller configured to control the configuration block to configure the function block to perform the operation associated with any one of the plurality of operation modes. In at least this example embodiment, the logic device is configurable to perform operations associated with a plurality of operation modes according to or associated with a filter function.

At least one other example embodiment provides a video codec configured to perform an encoding operation. According to at least this example embodiment, the video codec includes: an intra predictor configured to perform a prediction operation using a digital filter that is configured to perform operations associated with a plurality of operation modes corresponding to a plurality of arithmetic operations based on an intra prediction mode. The digital filter is configured to perform the operations associated with the plurality of operation modes using a plurality of logic devices. Each of the logic devices includes: a function block configurable to perform the operations associated with the plurality of operation modes; a configuration block including at least one nonvolatile storage device configured to store configurable data for configuring the function block to perform an operation associated with any one of the plurality of operation modes; and a controller configured to control the configuration block to configure the function block.

At least one other example embodiment provides a method of controlling a logic device that is configurable to perform operations corresponding to a plurality of operation modes. According to at least this example embodiment, the method includes: configuring the logic device to perform a first operation associated with a first operation mode from among a plurality of operation modes; and reconfiguring the logic device to perform a second operation associated with a second operation mode from among the plurality of operation modes by using configurable data loaded from a nonvolatile memory in the logic device while the logic device performs the first operation.

At least one other example embodiment provides a non-transitory computer readable recording medium having recorded thereon a program that, when executed on a computing device, causes the computing device to execute a method of controlling a logic device that is configurable to perform operations associated with a plurality of operation modes. According to at least this example embodiment, the method includes: configuring the logic device to perform a first operation associated with a first operation mode from among a plurality of operation modes; and reconfiguring the logic device to perform a second operation associated with a second operation mode from among the plurality of operation modes by using configurable data loaded from a nonvolatile memory in the logic device while the logic device performs the first operation.

At least one other example embodiment provides a logic device including: a function block configurable to perform a first operation associated with a first operation mode from among a plurality of operation modes; and a configuration block including at least a first nonvolatile storage device for storing first configuration data to configure the function block to perform the first operation associated with the first operation mode.

According to at least some example embodiments, the logic device may further include: a controller configured to control the configuration block to configure the function block to perform the first operation associated with the first operation mode.

The configuration block may further include: a latch configured to output, to the function block, the first configuration data stored in the first nonvolatile storage device.

The logic device may further include: a first nonvolatile memory configured to store the first configuration data. The configuration block is configured to load the first configuration data from the first nonvolatile memory, and to write the first configuration data from the first nonvolatile memory to the first nonvolatile storage device.

The configuration block may further include a second nonvolatile storage device, and the configuration block may be further configured to write second configuration data corresponding to a second of the plurality of operation modes to the second nonvolatile storage device. The configuration block may be further configured to write the second configuration data to the second nonvolatile storage device while the function block performs the first operation.

The configuration block may be further configured to write the second configuration data to the second nonvolatile storage device while the function block is being configured to perform the first operation.

The configuration block may be further configured to write the second configuration data to the second nonvolatile storage device between a time when the first configuration data read from the first nonvolatile storage device of the configuration block is output to the function block and a time when the function block completes the first operation.

The configuration block may be configured to write data to at least one of the first and second nonvolatile storage devices in response to a switching control signal output from the controller. The controller may be configured to output the switching control signal with reference to a control signal indicative of activation or deactivation of the first or second nonvolatile storage device.

The control signal indicative of activation or deactivation of the first or second nonvolatile storage device may control a switching operation of a switching device connected to the first or second nonvolatile storage device.

The configuration block may include a plurality of nonvolatile storage devices, and the configuration block may be configured to configure the function block based on configuration data stored in each of the plurality of nonvolatile storage devices. Each of the plurality of nonvolatile storage devices may correspond to an operation mode among the plurality of operation modes.

At least one other example embodiment provides a digital filter. The digital filter includes a logic device. The logic device includes: a function block configurable to perform a first operation associated with a first operation mode from among a plurality of operation modes; and a configuration block including at least a first nonvolatile storage device for storing first configuration data to configure the function block to perform the first operation associated with the first operation mode. In at least this example embodiment, the plurality of operation modes are associated with a filter function.

According to at least some example embodiments, the digital filter may include a plurality of shifters. At least one of the plurality of shifters may include a logic device that is configurable to shift a data word by a first bit number corresponding to each of the plurality of operation modes.

At least one other example embodiment provides a format conversion filter configured to convert a format of input data using a digital filter. The digital filter includes a logic device. The logic device includes: a function block configurable to perform a first operation associated with a first operation mode from among a plurality of operation modes; and a configuration block including at least a first nonvolatile storage device for storing first configuration data to configure the function block to perform the first operation associated with the first operation mode. In at least this example embodiment, the plurality of operation modes are associated with a filter function.

At least one other example embodiment provides a video codec for performing an encoding operation. The video codec includes: an intra predictor configured to perform a prediction operation by using a digital filter that is configurable to perform operations based on a plurality of operation modes corresponding to a plurality of arithmetic operations associated with an intra prediction mode. The digital filter is configurable to perform operations associated with the plurality of operation modes using a plurality of logic devices. Each of the logic devices includes: a function block that is configurable to perform the operations associated with the plurality of operation modes; and a configuration block including at least one nonvolatile storage device configured to store configurable data for configuring the function block to perform an operation associated with an operation mode among the plurality of operation modes.

At least one other example embodiment provides a logic device including: a configuration block including at least a first nonvolatile storage device, the configuration block being configured to store, in the first nonvolatile storage device, first configuration data, the configuration block being further configured to configure the logic device to perform a first operation associated with a first operation mode from among a plurality of operation modes based on the first configuration data stored in the first nonvolatile storage device.

According to at least some example embodiments, the logic device may further include a controller configured to control the configuration block to configure the logic device to perform the first operation. The logic device may further include a function block configured to perform the first operation associated with the first operation mode.

The configuration block may be configured to configure the function block to perform the first operation based on the first configuration data stored in the first nonvolatile storage device.

The configuration block may include a second nonvolatile storage device, and the configuration block may be further configured to store, in the second nonvolatile storage device, second configuration data corresponding to a second operation mode from among the plurality of operation modes. The configuration block may be configured to configure the logic device to perform a second operation associated with the second operation mode based on the second configuration data. The configuration block may be configured to read the second configuration data from a first nonvolatile memory and store the second configuration data in the second nonvolatile memory device while the logic device is being configured to perform or performs the first operation.

As described above, logic devices may be configured and/or reconfigured more efficiently to perform a given, desired or predetermined operations via nonvolatile memory devices.

DETAILED DESCRIPTION

Inventive concepts will now be described more fully hereinafter with reference to the accompanying drawings, in which some example embodiments of inventive concepts are shown. However, the inventive concepts may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these example embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of inventive concepts to those skilled in the art.

Also, it is noted that example embodiments may be described as a process depicted as a flowchart, a flow diagram, a data flow diagram, a structure diagram, or a block diagram. Although a flowchart may describe the operations as a sequential process, many of the operations may be performed in parallel, concurrently or simultaneously. In addition, the order of the operations may be re-arranged. A process may be terminated when its operations are completed, but may also have additional steps not included in the figure. A process may correspond to a method, a function, a procedure, a subroutine, a subprogram, etc. When a process corresponds to a function, its termination may correspond to a return of the function to the calling function or the main function.

Moreover, as disclosed herein, the term “buffer,” “memory” or the like, may represent one or more devices for storing data, including random access memory (RAM), magnetic RAM, core memory, and/or other machine readable mediums for storing information. The term “storage medium” may represent one or more devices for storing data, including read only memory (ROM), random access memory (RAM), magnetic RAM, core memory, magnetic disk storage mediums, optical storage mediums, flash memory devices and/or other machine readable mediums for storing information. The term “computer-readable medium” may include, but is not limited to, portable or fixed storage devices, optical storage devices, and various other mediums capable of storing or containing instruction(s) and/or data.

Furthermore, example embodiments may be implemented by hardware, software, firmware, middleware, microcode, hardware description languages, or any combination thereof. When implemented in software, firmware, middleware or microcode, the program code or code segments to perform the necessary tasks may be stored in a machine or computer readable medium such as a storage medium. A processor(s) may perform the necessary tasks.

A code segment may represent a procedure, a function, a subprogram, a program, a routine, a subroutine, a module, a software package, a class, or any combination of instructions, data structures, or program statements.

FIG. 1is a block diagram of a logic device100according to an example embodiment.

Referring toFIG. 1, the logic device100includes a logic block110, a first nonvolatile memory120, and a controller130. The logic block110includes a function block112and a configuration block114.

FIG. 1illustrates only components related to this example embodiment of the logic device100. Accordingly, it will be understood by those of ordinary skill in the art that other general purpose components other than those illustrated inFIG. 1may be further included in the logic device100.

The logic device100may be configured to perform one or more functions from among a plurality of functions. In this case, the plurality of functions include operations corresponding to a plurality of operation modes. The logic device100may be configured or reconfigured to perform any one of various given, desired or predetermined operations. For example, the logic device100may be configured to perform a first operation corresponding to a first operation mode from among the plurality of operation modes. In addition, the logic device100may be reconfigured to perform a second operation corresponding to a second operation mode from among the plurality of operation modes. The first and second operations may be different logic operations. The terms “configuration/configured” and “reconfiguration/reconfigured” may be used interchangeably.

The plurality of functions and the plurality of operation modes that correspond to each of the plurality of functions may be set by a user. In more detail, the logic device100may be configured or reconfigured so that the logic device100is able to perform operations corresponding to a plurality of operation modes according to functionality desired by a user.

The plurality of operation modes may be determined according to an implementation of the logic device100(e.g., an environment where the logic device100is used). For example, if the logic device100is defined or configured to perform a function corresponding to an MPEG-4 format conversion filter, then the plurality of operation modes may include various video format conversion modes. As another example, if the logic device100is defined to perform a function corresponding to an H.264 video codec, then the plurality of operation modes may include various calculations according to a prediction mode of intra prediction.

According to at least some example embodiments, the logic device100may be a programmable logic device (PLD), a field programmable gate array (FPGA), a programmable array logic (PAL), a programmable logic array (PLA), a generic array logic (GAL), or the like. However, example embodiments are not limited to these examples.

As mentioned above, the logic block110includes the function block112and the configuration block114. The function block112may be configured to perform operations corresponding to a plurality of operation modes. The configuration block114configures the function block112to perform the operations according to the plurality of operation modes.

In one example, the function block may be configured to perform a shifter function. In this example, the function block112is configured to shift a data word by a given, desired or predetermined bit number corresponding to the plurality of operation modes.

The configuration block114includes one or more (e.g., at least one or a plurality of) nonvolatile storage devices (not shown) for storing configurable data (also referred to herein as configuration data) for configuring the function block112to perform an operation corresponding to one of a plurality of operation modes. In addition, the configuration block114may include a latch for outputting configurable data written in the nonvolatile storage device or a plurality of nonvolatile storage devices to the function block112.

According to at least one example embodiment, the configuration block114may have an overlay configuration type or a multi configuration type.

The overlay configuration type refers to a case in which configurable data is stored in the first nonvolatile memory120, and if necessary, the configuration block114reads the configurable data stored in the first nonvolatile memory120, writes the read configurable data to a nonvolatile storage device, and configures the function block112using or based on the written configurable data.

The multi configuration type refers to a case where configurable data is previously written (e.g., stored in advance) to a nonvolatile storage device of the configuration block114, and if necessary, the configuration block114configures the function block112based on the configurable data stored in the nonvolatile storage device.

If the configuration block114is implemented as an overlay configuration type, then the configuration block114configures the function block112based on configurable data stored in the first nonvolatile memory120so that an operation corresponding to any one of a plurality of operation modes may be performed by the function block112. For example, if the plurality of operation modes include first through fourth operation modes, then the configuration block114may configure the function block112to perform an operation corresponding to any one of the first through fourth operation modes. In this case, configurable data for configuring the function block112to perform each of the first through fourth operation modes may be loaded into the configuration block114from the first nonvolatile memory120.

The configuration block114may include one or more (e.g., at least one or a plurality of) nonvolatile storage devices for storing configurable data that is loaded from the first nonvolatile memory120. In more detail, for example, the configuration block114may be a latch including one or more nonvolatile storage devices. However, example embodiments are not limited to this example. Although a case where the configuration block114includes at least two nonvolatile storage devices is discussed below as an example, example embodiments are not limited thereto.

According to at least some example embodiments, the configuration block114may write configurable data from the first nonvolatile memory120to any one of the nonvolatile storage devices when configuring the function block112.

To configure the function block112to operate in the first operation mode from among the plurality of operation modes, the configuration block114writes first configurable data corresponding to the first operation mode. In this example, the first configurable data is loaded from the first nonvolatile memory120to any one of the at least two nonvolatile storage devices in the configuration block114.

In one example, if the configuration block114includes a first nonvolatile storage device and a second nonvolatile storage device and first configurable data corresponding to a first operation mode is written to the first nonvolatile storage device, then the configuration block114reads the first configurable data stored in the first nonvolatile storage device and configures the function block112to perform the first operation based on or according to the first configurable data. Thus, the function block112is configured to perform the first operation, which corresponds to the first operation mode, based on the first configurable data. At the same time (e.g., simultaneously and/or concurrently) as the function block112is being configured to perform the first operation, the configuration block114may write second configurable data corresponding to a second operation mode to a second nonvolatile storage device. In this case, after the first operation is performed by the function block112, the configuration block114reads the second configurable data written to the second nonvolatile storage device, and configures the function block112to perform a second operation according to or based on the second configurable data.

According to at least this example embodiment, the second configurable data may be written to the second nonvolatile storage device of the configuration block114while the configuration block114is configuring the function block112to perform the first operation. Alternatively, the second configurable data may be written to the second nonvolatile storage device of the configuration block114while the function block112performing the first operation. In this case, the configuration block114reads the configurable data written to the first or second nonvolatile storage device of the configuration block114and outputs the read configurable data to the function block112to configure the function block112.

When it is desired to sequentially perform the first operation and the second operation in the function block112, the second configurable data may be written to the second nonvolatile storage device of the configuration block114between a time when the first configurable data read from the first nonvolatile storage device of the configuration block114is output to the function block112and a time when the function block112completes the first operation. Accordingly, the logic device100may have improved configuration/reconfiguration operating speeds.

In addition, the function block112may be reconfigured to more rapidly to perform the second operation after performing the first operation. Thus, the logic device100may be implemented to have a runtime reconfiguration logic (RRL).

Although a case where the function block112performs the first operation while the second configurable data is simultaneously and/or concurrently written to the second nonvolatile storage device of the configuration block114is described above, example embodiments are not limited thereto. For example, according to at least one other example embodiment, and based on implementation, the second configurable data may be written to the second nonvolatile storage device of the configuration block114after the function block112performs the first operation and a given, desired or predetermined time elapses. In this case, the given, desired or predetermined time may be determined according to a time when the second operation is to be initiated in the logic device100.

In this manner, the configuration block114may configure the function block112by using at least two nonvolatile storage devices so that the function block112may perform operations corresponding to a plurality of operation modes. An example case in which the configuration block114has an overlay configuration is described with reference toFIG. 4A.

In a case where the configuration block114has a multi configuration, the configuration block114configures the function block112based on configurable data written to each of the nonvolatile storage devices, which corresponds to each of a plurality of operation modes, so that the function block112may perform an operation corresponding to any one of the plurality of operation modes. In more detail, the configuration block114may write configurable data corresponding to each of the plurality of operation modes to a corresponding nonvolatile storage device, such that each nonvolatile storage device stores configurable data corresponding to an operation mode.

Unlike the case where the configuration block114has an overlay configuration, when the configuration block114is of the multi configuration type, configurable data may be previously written to each of the nonvolatile storage devices of the configuration block114. In this case, configurable data may be written to a nonvolatile storage device when configuring or reconfiguring the logic device100so that operations corresponding to a plurality of operation modes may be performed in the logic device100according to a function desired by a user. However, example embodiments are not limited thereto. An example case where the configuration block114is implemented in the multi configuration type is described with reference toFIG. 4B.

For example, in the case where the configuration block114has an overlay configuration, when it is desired to have the function block112perform a particular operation, the configuration block114reads configurable data stored in the first nonvolatile memory120and writes the configurable data to a nonvolatile storage device of the configuration block114. The configuration block114then outputs the written configurable data to the function block112to configure the function block112to perform the particular operation. In this example configuration, the function block112is configured to perform the operation at a given, desired or predetermined time when it is desired to perform a given, desired or predetermined operation in the function block112.

In the case where the configuration block114has a multi configuration, configurable data corresponding to a plurality of operation modes is written to nonvolatile storage devices of the configuration block114regardless (or independent) of the time when it is desired to have the function block112perform a particular operation. Accordingly, at a time when it is desired to have the function block112perform the operation, the configuration block114outputs configurable data from a nonvolatile storage device to the function block112to configure the function block112.

According to at least this example embodiment, if the configuration block114has an overlay configuration, then the logic device100may be configured so that operations corresponding to a plurality of operation modes may be performed by using a relatively small number of nonvolatile storage devices. If the configuration block114has a multi configuration, then the logic device100may be configured so that operations corresponding to a plurality of operation modes may be performed by using a plurality of nonvolatile storage devices, which correspond to the plurality of operation modes.

If the configuration block114has an overlay configuration, then the logic device100may include the first nonvolatile memory120, unlike the case where the configuration block114has a multi configuration. However, when the configuration block114has an overlay configuration, the logic device100may be configured so that operations corresponding to a plurality of operation modes may be performed by using a smaller number of nonvolatile storage devices as compared to the case where the configuration block114has a multi configuration. In addition, if the configuration block114has a multi configuration, then a number of nonvolatile storage devices may correspond to the number of a plurality of operation modes, unlike the case where the configuration block114has an overlay configuration.

Moreover, in the multi configuration case, since configurable data has already been written to the nonvolatile storage devices of the configuration block114, the logic device100may be more rapidly configured compared to the case where the configuration block114has an overlay configuration. The first nonvolatile memory120stores configurable data for configuring the logic block110so that operations corresponding to a plurality of operation modes may be performed. If the plurality of operation modes includes first through n-th operation modes, then the configurable data includes first through n-th configurable data for performing operations corresponding to the first through n-th operation modes, respectively.

InFIG. 1, for convenience of explanation, the case where the logic device100includes the first nonvolatile memory120is illustrated. If the configuration block114has a multi configuration, then the logic device100may not include the first nonvolatile memory120for storing configurable data.

Still referring toFIG. 1, the controller130controls the overall operation of the logic device100. For example, the controller130controls the first nonvolatile memory120and/or the configuration block114so that the function block112may be configured to perform an operation corresponding to any one of a plurality of operation modes.

In more detail, for example, the controller130controls the configuration block114to configure the function block112to perform a first operation corresponding to a first operation mode from among a plurality of operation modes, and also controls the configuration block114to configure the function block112to perform a second operation corresponding to a second operation mode from among a plurality of operation modes with a given, desired or predetermined clock frequency. The given, desired or predetermined clock frequency may be a first or second clock frequency of the logic device100, but example embodiments are not limited thereto. An example of this operation will be described below with reference toFIGS. 4A and 4B.

Because the logic device100may perform each of a plurality of operations by using the single function block112, which may be configured to perform the plurality of operations, the area of the logic device100may be reduced.

In addition, because the configuration block114writes configurable data to a nonvolatile storage device to configure the function block112, power consumption of the logic device100may be reduced. In more detail, since configurable data written to a nonvolatile storage device may be maintained even when power is not supplied to the logic device100, a time required to load data from another nonvolatile memory (not shown) outside of the logic device100and/or power consumption may be reduced as power is supplied to the logic device100.

Additionally, if the first nonvolatile memory120storing configurable data is included in the logic device110, then a time required to load data from another nonvolatile memory (not shown) outside of the logic device100and/or power consumption may be reduced as power is supplied to the logic device100because data stored in the first nonvolatile memory120may be maintained even when power is not supplied to the logic device100.

Accordingly, the logic device100using nonvolatile devices may be implemented in the form of a logic application, and thus, may be applied to various codecs, data processing devices, and filters. Thus, relatively low power and/or relatively low cost nonvolatile reconfiguration filters, codecs, and data processing devices may be implemented using the logic device100according to example embodiments.

FIG. 2is a block diagram illustrating a system200including a logic device100according to an example embodiment.

Referring toFIG. 2, the system200includes the logic device100, a system bus210, a plurality of central processing units (CPUs)220, an interface230, and a timer240. The logic device100is similar to the logic device100shown inFIG. 1, but further includes a second nonvolatile memory140.FIG. 2also illustrates an example embodiment of the configuration block114in more detail than inFIG. 1. As discussed below, the second nonvolatile memory140may store data that is generated during operation of the logic device100or the system200. The logic block110includes the function block112and the configuration block114.

AlthoughFIG. 2shows a plurality of central processing units220, the example embodiment may include one or more central processing units including one or more processing cores.

Only components related to the example embodiment shown inFIG. 2are illustrated inFIG. 2. It will be understood by those of ordinary skill in the art that components other than those illustrated inFIG. 2may also be included in the system200. The logic device100is not limited to the configuration illustrated inFIG. 2. Since at least some of the above description of the logic device100illustrated inFIG. 1is applicable to the logic device100illustratedFIG. 2, a repeated description is omitted.

The system200may be implemented in a form of a system on chip (SOC), and for example, may be an advanced RISC machine (ARM)-based system. However, example embodiments are not limited thereto. In addition, the system200may be implemented in a form of an RRL.

The logic device100may perform a given, desired or predefined function of a plurality of functions by using the logic block110, the first nonvolatile memory120, the controller130, and the second nonvolatile memory140. The given, desired or predetermined function may include operations corresponding to a plurality of operation modes.

The logic block110includes the function block112and the configuration block114. The function block112may be configured to perform operations corresponding to a plurality of operation modes. The configuration block114may configure the function block112to perform the operations corresponding to the plurality of operation modes.

An example embodiment in which the function block112may be configured to perform operations corresponding to first through fourth operation modes is conceptually described below with reference toFIG. 2. In this example embodiment, the configuration block114configures the function block112according to a configuration set selected by a multiplexer MUX from among first through fourth configuration sets. Thus, the function block112may perform an operation based on an operation mode corresponding to a configuration set from among the first through fourth configuration sets.

In this manner, the logic block100is implemented so that hardware resources (e.g., limited hardware resources) may be reconfigured, and thus, the area of the system200may be reduced.

Still referring toFIG. 2, the first nonvolatile memory120stores configurable data for configuring the function block112according to one or more of the plurality of operation modes.

The controller130controls the first nonvolatile memory120and the configuration block114to configure the function block112to perform operations corresponding to one or more of a plurality of operation modes. In addition, the controller130may control the second nonvolatile memory140, and the second nonvolatile memory140may store data that is generated during operation of the logic device100or the system200.

The controller130controls a mode of the logic device100so that the logic device100may perform a given, desired or predefined function of a plurality of functions. For example, the logic device100may operate in a test mode, a switching mode, an operation mode, etc. However, example embodiments are not limited thereto.

The test mode may be a bitstream verification mode or a memory state control mode.

The switching mode may be a mode for switching a runtime configuration so that operations corresponding to the plurality of operation modes may be performed by the logic device100.

The operation mode may be a mode for performing a given, desired or predetermined operation setting in the function block112of the logic device100. According to at least some example embodiments, the logic device100may be in the switching mode and the operation mode simultaneously and/or concurrently. However, example embodiments are not limited thereto.

The system bus210transmits and/or receives data to and/or from the logic device100, the plurality of central processing units220, the interface230, and the timer240. The system bus210may include an advanced microcontroller bus architecture (AMBA) interface. However, example embodiments are not limited thereto. The AMBA interface enables the logic device100to be connected to the system bus210, which may allow for a more flexible system configuration.

The plurality of central processing units220control the overall function of the system200. Each of the plurality of central processing units220may be an ARM processor, however, example embodiments are not limited thereto.

The interface230may include a communication interface for transmitting and receiving data to and from an external device (not shown), and a user interface for receiving input information from a user or outputting output information.

The timer240monitors operations of the system200and detects abnormal operation of the system200. For example, the timer240may be a watchdog timer. However, example embodiments are not limited thereto.

In one example, the system200may be implemented in a form of a nonvolatile reconfigurable SOC.

FIG. 3is a block diagram of a logic device according to another example embodiment.

Referring toFIG. 3, the logic device100includes: a logic block110, a first nonvolatile memory120, a controller130and a second nonvolatile memory140. The logic block110may be implemented as a nonvolatile (NV) reconfigurable logic module. The first nonvolatile memory120may be configured as a nonvolatile (NV) configuration memory. The controller130may be implemented as a main control module. The second nonvolatile memory140may be implemented as a nonvolatile (NV) user memory. However, example embodiments are not limited to these example implementations.

The logic block110is connected to a slave350through a plurality of registers312,314,316, and318. A nonvolatile reconfigurable logic (NVRL) control module340is connected to the controller130, and controls the logic block110. In this case, the NVRL control module340is connected to the slave350through a NVRL control register module320. In addition, the logic block110transmits and receives data to and from the controller130through a buffer control module135.

Still referring toFIG. 3, the first nonvolatile memory120is connected to the slave350through registers328and330. In this example, the register328is a nonvolatile configuration memory input register, and the register330is a nonvolatile configuration memory output register. The second nonvolatile memory140is connected to the slave350through registers324and326. In this example, the register324is a nonvolatile user memory input register, and the register326is a nonvolatile user memory output register.

In the example embodiment shown inFIG. 3, the first nonvolatile memory120is a nonvolatile configuration memory, and the second nonvolatile memory140is a nonvolatile user memory.

The first and second nonvolatile memories120and140are controlled via a nonvolatile memory (NVM) control module344connected to the controller130. The NVM control module344is connected to the slave350through an NVM control register322. In the example embodiment shown inFIG. 3, the register322is a nonvolatile memory control register.

In addition, the first nonvolatile memory120transmits and receives data to and from the logic block110through a configuration buffer125. The second nonvolatile memory140transmits and receives data to and from the logic block110through a data R. buffer145.

The controller130is connected to the slave350through a main control register342. The controller130controls the configuration buffer125, the buffer control module135, and the data R. buffer145.

The slave350is connected to the system bus210, which is described above with regard toFIG. 2. The slave350may be a 135 bit advanced high-performance bus (AHB) slave or a 98 bit advanced peripheral bus (APB) slave. However, example embodiments are not limited thereto, and the slave350may be an advanced system bus (ASB) slave.

FIGS. 4A and 4Bare circuit diagrams each illustrating a latch as an example of the configuration block114ofFIG. 1. In more detail,FIG. 4Aindicates a case where the configuration block114has an overlay configuration, andFIG. 4Bindicates a case where the configuration block114has a multi configuration.

Referring toFIGS. 1 and 4A, the configuration block114is a nonvolatile latch having an overlay configuration, but is not limited thereto. In addition, althoughFIG. 4Aillustrates a case where two nonvolatile storage devices RE and REn are included in the latch, the latch may include one nonvolatile storage device or three or more nonvolatile storage devices according to implementation and/or usage environment, and thus, may further include a plurality of transistors.

The latch may perform a read operation for reading data stored in each of the first and second nonvolatile storage devices RE and REn. The latch may also perform an output operation for outputting the read data through an output terminal Dout.

The latch may also perform a write operation for writing data, which is input through data lines DL and DLn, to the first and second nonvolatile storage devices RE and REn. In one example, data input through the data lines DL and DLn may be loaded from the first nonvolatile memory120, and the input data may be written to any one of the first and second nonvolatile storage devices RE and REn according to switching operations of first through fourth switching devices TR1, TR2, TR3, and TR4. In this case, the first through fourth switching devices TR1, TR2, TR3, and TR4are transistors.

In addition, the configuration block114includes fifth and sixth transistors CT11and CT12, which are connected to respective ends of the first nonvolatile storage device RE, and seventh and eighth transistors CT21and CT22, which are connected to respective ends of the second nonvolatile storage device REn.

Each of the first and second nonvolatile storage devices RE and REn may be implemented with a variable resistor device that may be a high resistance state or a low resistance state according to a comparison with a reference cell Ref. Cell. However, example embodiments are not limited thereto.

Example operation of the latch ofFIG. 4Ais described below with reference toFIGS. 5A and 5B.

FIGS. 5A and 5Bare timing diagrams illustrating example operation of the latch ofFIG. 4A. In more detail,FIG. 5Ais a timing diagram illustrating example operation of the latch in a read mode, andFIG. 5Bis a timing diagram illustrating example operation of the latch in a write mode.

Referring toFIGS. 1, 4A, and 5A, the timing diagram ofFIG. 5Aillustrates example operation of the latch during a read operation for reading data written to the first nonvolatile storage device RE. When it is desired to read data written to the nonvolatile storage device RE, a control signal CF that is output from the controller130changes from a deactivated state to an activated state at a positive edge thereof. When a positive edge of the control signal CF is generated, an enable signal nEN is activated, and data written to the first nonvolatile storage device RE is read. The read data is then output through an output terminal Dout. In this example, the data output through the output terminal Dout is input to the function block112, and the function block112is configured to perform an operation corresponding to an operation mode based on the data output through the output terminal Dout.

While performing the read operation, first and second switching control signals WS1and WS2for controlling switching operations of the first through fourth transistors TR1, TR2, TR3, and TR4are deactivated, and a signal that is input through the data lines DL and DLn does not exist or is deactivated.

FIG. 5Bis a timing diagram illustrating example operation of the latch according to a write operation for writing data to the first nonvolatile storage device RE.

Referring toFIGS. 1, 4A, and 5B, data that is input through the data lines DL and DLn from the first nonvolatile memory120is written to any one of the first and second nonvolatile storage devices RE and REn in response to a control signal output from the controller130. In this case, the control signal that is output from the controller130may be the first switching control signal WS1or the second switching control signal WS2that controls at least one of the switching devices TR1, TR2, TR3, and TR4. The switching device TR1is connected between the data line DLn and a terminal of the nonvolatile storage device RE, the switching device TR2is connected between the data line DL and another terminal of the nonvolatile storage device RE, the switching device TR3is connected between the data line DLn and a terminal of the nonvolatile storage device REn, and the switching device TR4is connected between the data line DL and another terminal of the nonvolatile storage device REn.

When it is desired to write data input through the data lines DL and/or DLn to the first nonvolatile storage device RE, the enable signal nEN maintains a deactivated state and the first switching signal WS1is activated. Accordingly, the data input through the data lines DL and/or DLn is written to the first nonvolatile storage device RE.

In more detail, switching operations of the first and second transistors TR1and TR2are controlled by the activated first switching control signal WS1, and thus, the data input through the data lines DL and/or DLn is written to the first nonvolatile storage device RE.

The data that is input through the data lines DL and DLn may be configurable data stored in the first nonvolatile memory120shown inFIG. 1, for example. Accordingly, as described above, configurable data input through the data lines DL and DLn may be written to any of the two nonvolatile storage devices RE and REn, the written configurable data may be read, and the read configurable data may be output to the function block112. Accordingly, the function block112may perform an operation corresponding to an operation mode, which corresponds to the configurable data.

In addition, the control signal CF indicating the activation or deactivation of the first nonvolatile storage device RE controls switching operations of the fifth and sixth transistors CT11and CT12connected to respective ends of the first nonvolatile storage device RE, and a control signal CFn indicating the activation or deactivation of the second nonvolatile storage device REn controls switching operations of the seventh and eighth transistors CT21and CT22connected to respective ends of the second nonvolatile storage device REn. In this case, each of the plurality of transistors CT11, CT12, CT21, and CT22serves as a switching device. However, example embodiments are not limited to this example.

As illustrated in the timing diagram ofFIG. 5B, when the control signal CF indicating the activation or deactivation of the first nonvolatile storage device RE is deactivated, data is written to the first nonvolatile storage device RE. However, the example embodiments are not limited thereto. For example, when the control signal CF is activated, data may be written to the second nonvolatile storage device REn. In this case, the enable signal nEN is maintained (e.g., continuously remains) in a deactivated state and the second switching control signal WS2is activated, and thus, data input through the data lines DL and DLn is written to the second nonvolatile storage device REn. However, example embodiments are not limited thereto. For example, an operation for writing data to the first nonvolatile storage device RE or the second nonvolatile storage device REn may be performed with reference to the control signal CFn indicating the activation or deactivation of the second nonvolatile storage device REn.

In this manner, the configuration block114may configure the function block112by using a latch including at least two nonvolatile storage devices so that the function block112may be configured to perform an operation corresponding to any of a plurality of operation modes.

As illustrated inFIGS. 5A and 5B, a write operation may be performed in a period in which the enable signal nEN is deactivated, whereas a read operation may be performed in a period in which the enable signal nEN is activated. Thus, when a read operation for any one of the two nonvolatile storage devices RE and REn is completed, a write operation for any one of the two nonvolatile storage devices RE and REn may be performed. Similarly, when a write operation for any one of the two nonvolatile storage devices RE and REn is completed, a read operation for any one of the two nonvolatile storage devices RE and REn may be performed.

In a logic device according to at least some example embodiments, a second configurable data may be written to the second nonvolatile storage device REn of the configuration block114between a time when a first configurable data read from the first nonvolatile storage device RE of the configuration block114is output to the function block112and a time when the function block112completes the first operation corresponding to the first configurable data, thereby improving speed of configuration and reconfiguration operations of logic devices.

However, if only one nonvolatile storage device is included in the configuration block114, or if two or more nonvolatile storage devices are included in the configuration block114, the second configurable data may be written to the first nonvolatile storage device RE rather than the second nonvolatile storage device REn according to implementation and/or usage environment.

The configuration block114discussed above is implemented in a form of a latch including nonvolatile storage devices, and thus, configuration or reconfiguration of the logic device100may be implemented in runtime.

In connection withFIGS. 5A and 5B, an activated signal may indicate a high level signal and a deactivated signal may indicate a low level signal. However, example embodiments are not limited to this example.

Referring back toFIG. 4B, the configuration block114may be a nonvolatile type latch having a multi configuration form. However, example embodiments are not limited thereto. In addition, althoughFIG. 4Bshows four nonvolatile storage devices RE1, RE2, RE3, and RE4included in the nonvolatile type latch, the nonvolatile type latch may include any number of nonvolatile storage devices, wherein the number of nonvolatile storage devices may correspond to the number of operation modes or more based on implementation and/or usage environment. Accordingly, the nonvolatile type latch may further include a plurality of transistors.

The nonvolatile type latch shown inFIG. 4Bincludes a first nonvolatile storage device RE1to store first configurable data corresponding to a first operation mode, a second nonvolatile storage device RE2to store second configurable data corresponding to a second operation mode, a third nonvolatile storage device RE3to store third configurable data corresponding to a third operation mode, and a fourth nonvolatile storage device RE4to store fourth configurable data corresponding to a fourth operation mode. The first through fourth nonvolatile storage devices RE1, RE2, RE3, and RE4may be implemented with a variable resistor device that may be in a high resistance state or a low resistance state according to a comparison with a reference cell Ref. Cell. However, example embodiments are not limited thereto.

The nonvolatile type latch may perform a read operation for reading data stored in each of the first through fourth nonvolatile storage devices RE1, RE2, RE3, and RE4, and an output operation for outputting the read data through an output terminal Dout.

First through fourth transistors CT1, CT2, CT3, and CT4are connected to the first through fourth nonvolatile storage devices RE1, RE2, RE3, and RE4, respectively.

If a read operation for reading data written to any one of the first through fourth nonvolatile storage devices RE1through RE4is performed, data written to any one of the first through fourth nonvolatile storage devices RE1through RE4is read according to switching operations of the first through fourth transistors CT1, CT2, CT3, and CT4based on respective control signals CF1through CF4that are output from, for example, the controller130. The read data is output through the output terminal Dout. In this example, as the data output through the output terminal Dout is input to the function block112, the function block112is configured to perform an operation corresponding to the data output through the output terminal Dout. In this case, the controller130outputs at least one of the control signals CF1, CF2, CF3, and CF4(e.g., control signal CF3in this example), which causes output of configurable data to the function block112. In one example, the nonvolatile type latch may output the third configurable data written to the third nonvolatile storage device RE3to the function block112through the output terminal Dout to configure the function block112to perform an operation corresponding to the third operation mode. In this example, the nonvolatile type latch outputs the third configurable data written to the third nonvolatile storage device RE3to the function block112through the output terminal Dout in response to the control signal CF3.

Example operation of the circuit illustrated inFIG. 4Bwill be understood by those of ordinary skill in the art with reference to the circuit illustrated inFIG. 4A, the timing diagrams illustrated inFIGS. 5A and 5B, and the descriptions thereof, and thus, a more detailed description of the operation of the circuit illustrated inFIG. 4Bis omitted.

Because the configuration block114is a multi configuration type latch including nonvolatile storage devices as explained above, configuration and reconfiguration of the logic device100may be implemented in and/or at run time.

FIG. 6is a diagram illustrating an example embodiment of a digital filter including the logic device ofFIG. 1.

Referring toFIG. 6, the digital filter600includes a plurality of coefficient modules610, a plurality of adders616, a plurality of R-shift1s617, a plurality of R-Shift5s, a R-shift630, a down sampler640, and a multiplexer650. Each of the coefficient modules610, the R-shift630, the down sampler640, and the multiplexer650may be implemented using one or more of the logic devices discussed above with regard toFIGS. 1-5B. In this example, the digital filter600includes one or more of the logic devices100, which may be configured to perform operations corresponding to a plurality of operation modes based on a filter function.

The digital filter600shown inFIG. 6is formed of eighteen taps, and may perform a plurality of operations based on a MPEG-4 format conversion filter, an H.264 half-pel interpolation, an H.264 quarter-pel interpolation, etc., according to a function defined in the one or more logic devices100included in the digital filter600.

In example operation, input data620passes through the plurality of coefficient modules610, the plurality of adders616and the plurality of round R-shifters617,618. An output is then selected by the multiplexer650.

In the example embodiment shown inFIG. 6, a first output651may be an output of the MPEG-4 format conversion filter, a second output652may be an output of the H.264 half-pel interpolation, and a third output653may be an output of the H.264 quarter-pel interpolation. The first output651is output by the down sampler640, the second output652is output after the plurality of R-Shift1s617, and the third output653is output after a plurality of R-Shift5s

Still referring toFIG. 6, each of the plurality of coefficient modules610generates coefficients of the digital filter600. In the example embodiment shown inFIG. 6, each of the plurality of coefficient modules610includes a negation device611, a plurality of barrel shifters612and613, an adder614, and a multiplexer615. The adder614may be replaced by a multiplier in other example embodiments.

One or more logic devices according to one or more example embodiments may be included in one or more (e.g., each) of the negation device611, the plurality of barrel shifters612and613, and the multiplexer615.

If, for example, the negation device611includes the logic device100, then the logic device100may be configured or reconfigured to perform an operation corresponding to a first operation mode, in which the negation device611performs a negation operation, and a second operation mode in which the negation device611does not perform a negation operation. In this case, the function block112of the logic device100may be configured to perform a first operation corresponding to the first operation mode and a second operation corresponding to the second operation mode.

As another example, if the barrel shifters612and613include logic devices100, then the logic devices100may be configured or reconfigured to perform operations corresponding to a plurality of operation modes indicating whether each of the barrel shifters612and613shifts a data word by a number of bits. In this case, the function block112of the logic device100may be configured to perform an operation corresponding to an operation mode for shifting a data word by any number of bits. For example, the function block112of the logic device100may be configured to perform a first operation corresponding to a first operation mode for shifting the data word by one bit, a second operation corresponding to a second operation mode for shifting the data word by two bits, . . . , an n-th operation corresponding to an n-th operation mode for shifting the data word by n bits (where n is a natural number that is greater than two).

As another example, if the multiplexer615includes the logic device100, then the logic device100may be configured or reconfigured to perform operations corresponding to a plurality of operation modes in which the multiplexer615selects an output. In this case, the function block112of the logic device100may be configured to perform a first operation corresponding to a first operation mode for selecting logic “0”, a second operation corresponding to a second operation mode for selecting input data as an output, and a third operation corresponding to a third operation mode for selecting an output of the adder614.

Accordingly, each of the plurality of coefficient modules610may be configured or reconfigured in the manner as described above.

In this manner, as each of the shifter630, the down sampler640, and the multiplexer650is configured and/or reconfigured, the digital filter600may be implemented with a universal filter in which a plurality of filter functions are combined with each other.

FIG. 7is a diagram illustrating an example embodiment of a video codec including the digital filter600. In this example, the video codec700performs an encoding operation based on the H.264 standard.

Referring toFIG. 7, the video codec700may perform operations corresponding to various functions by using a sub-sampling module, a frame memory, a pre-filter, an intra prediction module, a coding control module, a transform module, a quantization module, an inverse quantization module, an inverse transform module, an entropy coding module, a video multiplexer, a buffer, a bit stream output module, a motion compensation module, a motion estimation module, a multi frame store module, a deblocking filter, an adder, etc. Thus, the video codec700may output a video source in a bit stream form.

The video codec700may require many hardware resources due to various arithmetic operation modes. Because the video codec700includes the digital filter600with a runtime reconfigurable logic, various arithmetic operation modes may be effectively performed while reducing hardware costs.

For example, the video codec700shown inFIG. 7includes an intra predictor710, which performs an intra prediction operation according to an intra prediction mode of the video codec700. In the example embodiment shown inFIG. 7, the intra predictor710may include the digital filter600. The intra predictor710may perform a prediction operation by using the digital filter600configured to perform operations corresponding to a plurality of operation modes corresponding to a plurality of arithmetic operations according to a given, desired or predetermined intra prediction mode. In addition, the digital filter600may be configured so that the operations corresponding to the plurality of operation modes may be performed by using a plurality of logic devices100.

In one example, the intra predictor710may perform nine arithmetic operations according to a 4×4 intra prediction mode, and the digital filter600may be configured or reconfigured to perform operations corresponding to a plurality of operation modes for performing the nine arithmetic operations. An example of nine operation modes corresponding to the nine arithmetic operations according to the 4×4 intra prediction mode is shown in Table 1.

Thus, the digital filter600may be configured or reconfigured to perform operations corresponding to the nine operation modes that are defined to perform an intra prediction function and corresponds to the 4×4 intra prediction mode.

According to at least some example embodiments, the intra predictor710of the video codec700may perform four arithmetic operations according to a 16×16 intra prediction mode and may perform four arithmetic operations according to an 8×8 intra prediction mode. In each case, the digital filter600may be configured or reconfigured to operate according to each intra prediction mode.

A plurality of filters having a similar or substantially similar structure may be implemented in the video codec700by using the digital filter600, thereby suppressing and/or preventing increases in power consumption and/or size.

FIG. 8is a diagram illustrating an example of various conversion operations in a case where a format conversion filter includes the digital filter ofFIG. 6. In this case, the format conversion filter is a MPEG-4 filter, but example embodiments are not limited thereto.

The format conversion filter may perform various video format conversion operations. Because the format conversion filter includes the digital filter600having a runtime reconfigurable logic, conversion modes may be performed more effectively while reducing hardware cost.

For example, the format conversion filter may perform various conversion operations, and the digital filter600may be configured or reconfigured to perform operations corresponding to a plurality of operation modes for performing the conversion operations. Example operation modes corresponding to various conversion operations according to the format conversion filter are shown in Table 2.

Accordingly, the digital filter600may be configured and/or reconfigured to perform an operation according to each of operation modes corresponding to the various conversion operations. Thus, the digital filter600may be a universal filter in which the plurality of conversion operations described in Table 2 may be performed.

For example, when converting data defined by the CCIR-601 standard 810 to data defined by the CIF standard 820, first data (704×480) may be converted to second data (704×240) via a 1/2 decimation (vertical) operation, the second Data (704×240) may be converted to third data (352×240) via an operation of a B filter (1/2, horizontal), and the third data (352×240) may be converted to fourth data (352×288) via an operation of a D filter (6/5, vertical).

In this example, the first data defined by the CCIR-601 standard 810 may be converted to the fourth data defined by the CIF standard 820, and the three conversion operations explained above may be performed as the digital filter600according to at least this example embodiment is configured and/or reconfigured.

Example embodiments are not limited to the above example. The digital filter600may perform an operation for converting data defined by any one of the CCIR-601 standard 810, the CIF standard 820, the SIF standard 830, the QCIF standard 840, and the SQCIF standard 850 to data defined by another one of the CCIR-601 standard 810, the CIF standard 820, the SIF standard 830, the QCIF standard 840, and the SQCIF standard 850.

Logic devices according to example embodiments as illustrated inFIGS. 1 through 3are not limited to digital filters and video codecs. Rather the logic devices may be included in modules for performing a communication according to a software defined radio (SDR). For example, the logic devices may be configured or reconfigured to implement 2G, 3G, 4G, GPS, and Wi-Fi based on a software defined radio (SDR).

FIG. 9is a flowchart illustrating a method of controlling a logic device according to an example embodiment. The method shown inFIG. 9will be described with regard to the logic device100for example purposes.

Referring toFIG. 9, the method of controlling the logic device100includes operations that are sequentially processed in logic devices illustrated inFIGS. 1 through 3. Thus, although omitted below, the contents described above with respect to the logic devices illustrated inFIGS. 1 through 3may be included in the description of the method ofFIG. 9. For example, the method ofFIG. 9may be applied to a case where the configuration block114has an overlay configuration. Thus, according to the flowchart ofFIG. 9, the logic device100may be configured so that operations corresponding to a plurality of operation modes may be performed. As mentioned above, for example purposes, the method shown inFIG. 9will be discussed with regard to the logic device100shown inFIG. 1.

Referring toFIG. 9, in operation901the controller130configures the logic device100to perform a first operation according to a first operation mode from among a plurality of operation modes.

In operation902, the controller130reconfigures the logic device100to perform a second operation according to a second operation mode from among the plurality of operation modes by using configurable data loaded from the first nonvolatile memory120in the logic device100while the logic device100performs the first operation.

In one example, the controller130may reconfigure the logic device100by writing configurable data loaded from the first nonvolatile memory120to a nonvolatile storage device existing in the logic device100while the logic device100performs the first operation. In this case, the controller130may reconfigure the logic device100by using a latch including the nonvolatile storage device.

Thus, after the logic device100is configured to perform the first operation, the logic device100may be reconfigured to perform the second operation while performing the first operation. Accordingly, configuration and reconfiguration of the logic device100may be implemented in runtime, and the size of the logic device100may be reduced as a plurality of function blocks are integrated in a single function block.

In addition, because the logic device100uses the first nonvolatile memory120or the nonvolatile storage device, data stored in the first nonvolatile memory120or the nonvolatile storage device may be maintained even when no power is supplied to the logic device100. Thus, power consumption of the logic device100may be reduced.

Example embodiments may be written as computer programs stored on tangible and/or a non-transitory computer readable recording mediums. The computer programs, when executed, cause the computer to perform the operations and/or functions discussed herein. In addition, the structure of data used in the above-described method may be recorded on a non-transitory computer readable recording medium by using various methods. Examples of the non-transitory computer readable recording medium include magnetic storage media (e.g., ROM, RAM, USB, floppy disks, hard disks, etc.), storage media such as optical recording media (e.g., CD-ROMs, or DVDs), and PC interface (e.g., PCI, PCI-express, WiFi, etc.)

Example embodiments discussed herein may be implemented in electric devices such as mobile phones, laptop computers, tablet computers, digital television (TV), etc.

Although example embodiments may be discussed herein as units, blocks, devices, etc., these elements may also be referred to as circuits. For example, the logic block110shown inFIG. 1may alternatively be referred to as a logic circuit110, the function block112may be referred to as a function circuit112, the configuration block114may be referred to as the configuration circuit114, etc.