APPARATUS AND METHOD FOR AMPLIFYING TRANSMISSION/RECEPTION SIGNAL AND CONTROLLING PHASE OF TRANSMISSION/RECEPTION SIGNAL IN WIRELESS COMMUNICATION SYSTEM

The present disclosure relates to a 5th generation (5G) or pre-5G communication system for supporting higher data transmission rates than 4th generation (4G) communication systems such as long-term evolution (LTE). In a wireless communication system, an apparatus comprises: a first amplifier unit that has a common source structure, includes cross-coupled capacitors, and amplifies an input signal; and a second amplifier unit that has a common gate structure, is connected to the first amplifier unit, and amplifies the signal output from the first amplifier unit, wherein the second amplifier unit includes a first input unit, a second input unit, a third input unit, and a fourth input unit, and two input units among the first input unit, the second input unit, the third input unit, and the fourth input unit may be connected to the first amplifier unit.

FIELD

The disclosure generally relates to a device for a transmission/reception signal and, more particularly, to a device and method for amplifying a transmission/reception signal and controlling the phase of a transmission/reception signal in a wireless communication system.

BACKGROUND

To meet the demand for wireless data traffic having increased since deployment of 4th generation (4G) communication systems, efforts have been made to develop an improved 5th generation (5G) or pre-5G communication system. Therefore, the 5G or pre-5G communication system is also called a “beyond 4G network” communication system or a “post long term evolution (post LTE)” system.

The 5G communication system is considered to be implemented in ultrahigh frequency bands (e.g., 60 GHz bands) so as to accomplish higher data rates. To decrease propagation loss of the radio waves and increase the transmission distance in the ultrahigh frequency bands, beamforming, massive multiple-input multiple-output (massive MIMO), full dimensional MIMO (FD-MIMO), array antenna, analog beam forming, large scale antenna techniques are discussed in 5G communication systems.

Products equipped with multiple antennas are being developed to increase communication performance, and it is expected that equipment having a much larger number of antennas is to be used by utilizing massive MIMO technology. As the number of antenna elements in a communication device increases, the number of RF components (e.g., filters) also inevitably increases accordingly.

SUMMARY

Based on the foregoing discussion, the disclosure provides a device and method for efficiently amplifying a transmission/reception signal and controlling the phase of a transmission/reception signal in a wireless communication system.

In addition, the disclosure provides a device and a method capable of performing 180° phase shifting of an RF signal according to switching of each transistor, while concurrently amplifying power of the RF signal in a wireless communication system.

In addition, the disclosure provides a device and a method in which, in a wireless communication system, symmetrical left and right-side transistors may be referred to as a single input unit, and two input units among a number of input units are selected by switching.

In addition, the disclosure provides a structure of adding a transistor pair in a wireless communication system.

In addition, the disclosure provides a structure of using a phase controller in a wireless communication system.

According to various embodiments of the disclosure, a device may include a first amplifier configured to amplify an input signal, and a second amplifier connected to the first amplifier and having a common gate structure of amplifying a signal output from the first amplifier, wherein the second amplifier includes a first input unit, a second input unit, a third input unit, and a fourth input unit, and two input units among the first input unit, the second input unit, the third input unit, and the fourth input unit are connected to the first amplifier.

According to various embodiments of the disclosure, the first amplifier may have a common source structure and include cross-coupled capacitors.

According to various embodiments of the disclosure, the first input unit and the second input unit may amplify a signal output from the first amplifier without inverting a phase of the signal.

According to various embodiments of the disclosure, the third input unit and the fourth input unit may amplify a signal output from the first amplifier while inverting a phase of the signal.

According to various embodiments of the disclosure, first sides of the first input unit and the second input unit may be connected to a non-inverting output unit, and second sides may be connected to an inverting output unit.

According to various embodiments of the disclosure, first sides of the third input unit and the fourth input unit may be connected to an inverting output unit, and second sides may be connected to a non-inverting output unit.

According to various embodiments of the disclosure, the first input unit, the second input unit, the third input unit, and the fourth input unit may have different voltage gains, respectively.

According to various embodiments of the disclosure, at least one of the first input unit, the second input unit, the third input unit, and the fourth input unit may be additionally divided so as to have a different voltage gain.

According to various embodiments of the disclosure, each of the first input unit, the second input unit, the third input unit, and the fourth input unit may include a pair of transistors, and a voltage gain may be controlled using a channel width for the each pair of transistors.

According to various embodiments of the disclosure, additional division may be performed for the each pair of transistors, at least one of the divided transistors may be connected, and a voltage gain may be controlled using a channel width for the connected divided transistor.

A device and a method according to various embodiments of the disclosure can improve the overall performance of an RFIC by minimizing an area and power loss of an attenuation circuit compared to conventional methods, by adding a transistor pair and using a phase controller.

Advantageous effects obtainable from the disclosure may not be limited to the above mentioned effects, and other effects which are not mentioned may be clearly understood, through the following descriptions, by those skilled in the art to which the disclosure pertains.

DETAILED DESCRIPTION

The terms used in the disclosure are only used to describe specific embodiments, and are not intended to limit the disclosure. A singular expression may include a plural expression unless they are definitely different in a context. Unless defined otherwise, all terms used herein, including technical and scientific terms, have the same meaning as those commonly understood by a person skilled in the art to which the disclosure pertains. Such terms as those defined in a generally used dictionary may be interpreted to have the meanings equal to the contextual meanings in the relevant field of art, and are not to be interpreted to have ideal or excessively formal meanings unless clearly defined in the disclosure. In some cases, even the term defined in the disclosure should not be interpreted to exclude embodiments of the disclosure.

Hereinafter, various embodiments of the disclosure will be described based on an approach of hardware. However, various embodiments of the disclosure include a technology that uses both hardware and software, and thus the various embodiments of the disclosure may not exclude the perspective of software.

In the description below, terms referring to signals, terms referring to device elements or circuit elements, and the like are illustratively used for the sake of descriptive convenience. Therefore, the disclosure is not limited by the terms as used below, and other terms referring to subjects having equivalent technical meanings may be used.

For a system using a high frequency, for example, millimeter waves (mmWave), like a 5th generation (5G) system, a phased array radio frequency integrated circuit (RFIC) is actively developing. There is a need for development of a power amplifier having high power, high efficiency, and high linearity in an RFIC. In order to increase power and gain, a cascode or a stacked structure may be applied, differential and capacitor neutralization (Cneu) technology may be applied to improve the gain, stability, and power in a millimeter wave band (e.g., 28/39/60 GHz), and the same technology may be applied to implementation of a cascode/stacked power amplifier.

In the description below, terms referring to electronic device components (e.g., substrate, plate, printed circuit board (PCB), flexible PCB (FPCB), module, antenna, antenna element, circuit, processor, chip, element, and device), terms referring to component shapes (e.g., tuning member, tuning structure, tuning structural body, structure, support, contact, protrusion, and opening), terms referring to connections between structures (e.g., connection part, contact part, support part, contact structure, conductive member, and assembly), terms referring to circuits (e.g., transmission line, PCB, FPCB, signal line, feeding line, data line, RF signal line, antenna cable, RF path, RF module, and RF circuit), and the like are illustratively used for the sake of descriptive convenience. Therefore, the disclosure is not limited by the terms as used below, and other terms referring to subjects having equivalent technical meanings may be used. Furthermore, as used below, the terms “unit”, “device”, “member”, “body”, and the like may indicate at least one shape structure or may indicate a unit for processing a function.

As used in the disclosure, the expression “greater than” or “less than” is used to determine whether a specific condition is satisfied or fulfilled, but this is intended only to illustrate an example and does not exclude “greater than or equal to” or “equal to or less than”. A condition indicated by the expression “greater than or equal to” may be replaced with a condition indicated by “greater than”, a condition indicated by the expression “equal to or less than” may be replaced with a condition indicated by “less than”, and a condition indicated by “greater than and equal to or less than” may be replaced with a condition indicated by “greater than and less than”.

In the disclosure, various embodiments will be described using terms employed in some communication standards (e.g., the 3rd generation partnership project (3GPP) and institute of electrical and electronics engineers (IEEE)), but they are only for the sake of illustration. The embodiments of the disclosure may also be easily applied to other communication systems through modifications.

FIG.1Ais a diagram illustrating beam sweeping via a wireless communication chip in a wireless communication system according to various embodiments of the disclosure.

According to an embodiment, in a communication system using a mmWave band, a new method different from a conventional wireless communication method should be considered. For example, in a mmWave band, a gain loss of a beam emitted via an electronic device may increase as a frequency increases.

According to an embodiment, a multi-chain structure may be used to minimize a gain loss of a beam in a mmWave band. For example, an electronic device may include at least one wireless communication chip100, and the at least one wireless communication chip100may generate four multi-chains.

According to various embodiments, the electronic device including the wireless communication chip100may form a beam and perform beam sweeping by using the multi-chains generated via the wireless communication chip100. (Multi-chain may refer to multiple radio frequency (RF) chains.)

According to an embodiment, the number of multi-chains that may be generated via one wireless communication chip100may be 16 or 32. According to various embodiments, the electronic device may include four wireless communication chips, and each wireless communication chip included in the electronic device may generate32multi-chains.

FIG.1Billustrates a wireless communication system according to various embodiments of the disclosure. A wireless communication environment ofFIG.1Billustrates a base station110and a terminal120as some of nodes using a radio channel.

The base station110is a network infrastructure that provides radio access to the terminal120. The base station110has coverage defined to be a predetermined geographic area on the basis of a distance over which a signal may be transmitted. The base station110may be referred to as, in addition to a base station, a “massive multiple input multiple output (MIMO) unit (MMU)”, an “access point (AP)”, an “eNodeB (eNB)”, a “5th generation node (5G node)”, a “5G NodeB (NB)”, a “wireless point”, a “transmission/reception point (TRP)”, an “access unit”, a “distributed unit (DU)”, a “radio unit (RU)”, a “remote radio head (RRH)”, or other terms having equivalent technical meanings. The base station110may transmit a downlink signal or receive an uplink signal.

The terminal120is a device used by a user and performs communication with the base station110via a radio channel. In some cases, the terminal120may be operated without user involvement. That is, the terminal120is a device that performs machine type communication (MTC), and may not be carried by a user. The terminal120may be referred to as, in addition to a terminal, a “user equipment (UE)”, a “mobile station”, a “subscriber station”, a “customer premises equipment (CPE)”, a “remote terminal”, a “wireless terminal”, an “electronic device”, a “vehicle terminal”, a “user device”, or other terms having equivalent technical meaning.

FIG.1Cillustrates an example of an antenna array in a wireless communication system according to various embodiments of the disclosure. As one of technologies for mitigating a propagation path loss and increasing a propagation distance of radio waves, a beamforming technology has been used. Beamforming generally concentrates coverage of radio waves by using multiple antennas, or increases the directivity of reception sensitivity in a specific direction. Accordingly, in order to form beamforming coverage instead of forming a signal in an isotropic pattern by using a single antenna, the base station110may include multiple antennas. Hereinafter, an antenna array including multiple antennas is described. The example of the antenna array illustrated inFIG.1Cis only an example for describing embodiments of the disclosure, and is not construed as limiting other embodiments of the disclosure.

Referring toFIG.1C, the base station110may include an antenna array130. According to an embodiment, the base station110may include a massive MIMO unit (MMU) including the antenna array130. Each antenna included in the antenna array130may be referred to as an array element or an antenna element. InFIG.1C, the antenna array130is illustrated as a two-dimensional planar array, but this is merely an example and does not limit other examples of the disclosure. According to another embodiment, the antenna array130may be configured in various forms, such as a linear array. An antenna array may be referred to as a massive antenna array.

A primary technology for improving data capacity of 5G communication is a beamforming technology using an antenna array connected to multiple RF paths. For higher data capacity, either the number of RF paths needs to be increased or power per RF path needs to be increased. Increasing of RF paths increases the size of products, and is currently at a level that can no longer be increased due to space limitations in installing actual base station equipment. In order to increase an antenna gain via a high power output without increasing the number of RF paths, multiple antenna elements may be connected to the RF paths by using a splitter (or divider), so as to increase the antenna gain.

In order to improve communication performance, the number of antennas (or antenna elements) of equipment (e.g., the base station110) performing wireless communication is increasing. In addition, the number of components and RF parts (e.g., an amplifier and a filter) for processing an RF signal received or transmitted through an antenna element increases, so that, in configuration of communication equipment, spatial gain and cost efficiency are essentially required while satisfying communication performance. As the number of paths increases, the number of filters for processing signals in each antenna element also increases.

An RF filter may include a circuit that performs filtering to transfer a radio signal of a desired frequency by forming resonance. That is, the RF filter may perform a function to selectively identify a frequency. Such an RF filter is an important component for selecting and attenuating a frequency, and is used in most communication equipment. Although there are many filters that have many advantages in terms of miniaturization, such as a ceramic filter and a bulk acoustic wave(BAW) filter, since performance of a cavity filter is excellent in terms of power handling and capacity/insertion loss/attenuation performance, the cavity filter is used in multiple pieces of communication equipment. Although a ceramic filter and a BAW filter are available in an MMU/small cell requiring small power specifications, the use of the cavity filter is continuously required in a high-performance MMU and all remote radio units (RRUs). Therefore, miniaturization/light weight and unit price of the cavity filter are very important factors in securing competitiveness of communication equipment.

FIG.2Ais a diagram illustrating a multi-chain type radio frequency integrated circuit (RFIC) in a wireless communication system according to various embodiments of the disclosure.

According to an embodiment, an electronic device200amay include a first antenna array (antenna array #1)201aincluding a first amplifier205afor amplifying a signal received from a communication circuit. According to various embodiments, the signal received from the communication circuit may be a radio frequency (RF) signal.

According to an embodiment, a signal distributor213amay transmit an RF signal received from a communication circuit to each antenna array215a. According to various embodiments, each of the antenna array215amay form a beam of a specific frequency band, based on the RF signal distributed from the signal distributor213a. According to an embodiment, the specific frequency band may be a frequency band used in a 5G mobile communication system. For example, each antenna array215amay form a beam having a center frequency of 60 GHz, 39 GHz, or 28 GHz. According to an embodiment, the signal distributor213amay operate as a signal combiner that combines RF signals received from the respective antenna arrays215a.

According to an embodiment, the first antenna array201amay include a phase shifter (PS)211aconfigured to shift a phase of an RF signal distributed from the signal distributor210a, a switch (SW)207aconfigured to selectively connect a transmission end and a reception end, a first amplifier205aconnected to a transmission end of the first antenna array201aof the first antenna array201aso as to amplify power of an RF signal supplied from the communication circuit, and a second amplifier203aconnected to an output end of the first antenna array201aso as to amplify power of an RF signal supplied from the electronic device200a.

According to an embodiment, the first amplifier205amay be a power amplifier (PA) amplifier, and the second amplifier203amay be a low-noise amplifier (LNA) amplifier. According to various embodiments, the second amplifier203ahas a small noise figure (NF), so that noise generated by the amplifier may be small.

According to an embodiment, the electronic device200amay form a first chain via the first antenna array201aand include a multi-chain structure via each antenna array215a.

According to an embodiment, the electronic device200amay form a first chain via the first antenna array201aand include a multi-chain structure via each antenna array215a.

According to an embodiment, if a pair of crossed transistors are added at a common gate position between219athe first amplifier205aand the first switch207aor between217athe second amplifier203aand the first switch207a, and respective transistors are divided into several transistors having a specific ratio and disposed so as to be connected, an RF signal may be phase-shifted by 180° according to switching of each transistor, while power of the RF signal is being amplified at the same time.

However, according to other embodiments, in the drawing, it is illustrated that a circuit configured to control phase and power is disposed between219athe first amplifier205aand the first switch207aor between217athe second amplifier203aand the first switch207a, but, without being limited to this position, the circuit may also be disposed at other positions.

FIG.2Bis a diagram illustrating a configuration of a circuit for improving the performance of an RFIC in a wireless communication system according to various embodiments of the disclosure. Referring toFIG.2B, a circuit may include a first amplifier210band a second amplifier220b.

The first amplifier210bamplifies an input signal, and the second amplifier220bamplifies the signal output from the first amplifier210b. That is, the first amplifier210band the second amplifier220bform a cascode or stacked amplifier.

According to an embodiment, the first amplifier210bis connected to an input terminal of a power amplifier, and the second amplifier220bis connected to an output terminal of the power amplifier. The first amplifier210band the second amplifier220bmay be differential amplifiers. For example, the first amplifier210bmay have a common source (CS) structure, and the second amplifier220bmay have a common gate (CG) structure.

According to an embodiment, the first amplifier210bhas a structure according to a capacitor neutralization (Cneu) technology, that is, may include cross-couple-capacitors. In this case, the first amplifier210bmay increase gain of the entire amplifier circuit.

FIG.2Cis a diagram illustrating the second amplifier and the output unit ofFIG.2Bin the configuration of the circuit to improve the performance of an RFIC in a wireless communication system according to various embodiments of the disclosure. Referring to FIG.2C, the second amplifier220bmay include a first-side amplifier211cand a second-side amplifier213c, and an output unit230cmay include a first-side output unit231cand a second-side output unit233c. In addition, the first-side amplifier211cmay include amplifier a221cand amplifier b222c, and the second-side amplifier213cmay include amplifier c223cand amplifier d224c.

(1) Case in which a Phase of an Input Signal is Amplified without being Shifted

According to an embodiment, when the first-side amplifier211cis connected to the first-side output unit231c, and the second-side amplifier213cis connected to the second-side output unit233c, a signal may be amplified without inverting a phase (that is, this refers to a case in which amplifier a221cis connected to the first-side output unit231c, and amplifier d224cis connected to the second-side output unit233c).

(2) Case in which an Input Signal is Phase-Shifted and Amplified

According to an embodiment, an input signal may be phase-shifted by 180° as well as amplified by changing an element connected to an output terminal inside the second amplifier220b. Specifically, when the first-side amplifier211cis connected to the second-side output unit233c, and the second-side amplifier213cis connected to the first-side output unit231c, a signal may be phase-inverted and amplified (that is, this refers to a case in which amplifier b222cis connected to the second-side output unit233c, and amplifier c223cis connected to the first-side output unit231c), and based on this, the input signal may be phase-shifted by 180° as well as amplified.

According to an embodiment, an amplification ratio of an input signal may be changed by changing an internal configuration of internal elements of the second amplifier220b. For example, for the second amplifier, an amplification ratio of an input signal may be adjusted by changing the internal configuration of amplifier a221c, amplifier d224c, amplifier b222c, and amplifier c223c.

According to an embodiment, an amplification ratio of an input signal may be changed by changing an element connected to an internal output terminal of the second amplifier220b. For example, by connecting a part of amplifier a221cto the first-side output unit231cand connecting a part of amplifier d224cto the second-side output unit233c, while concurrently connecting a part of amplifier b222cto the second-side output unit233cand connecting a part of amplifier c223cto the first-side output unit231c, an amplification ratio of an input signal may be adjusted.

FIG.3illustrates an implementation example of a circuit for controlling a phase and power of a signal, for improving the performance of an RFIC in a wireless communication system according to various embodiments of the disclosure.

Referring toFIG.3, a first amplifier340is a differential amplifier having a common source structure and may include cross-couple-capacitors. Specifically, the first amplifier340may include a first transistor pair, and the first transistor pair may include a first transistor342-1and a second transistor342-2.

According to an embodiment, source terminals of the first transistor342-1and the second transistor342-2may be grounded, and gate terminals may be connected to input terminals344-1and344-2. In addition, a drain terminal of the first transistor342-1is connected to one end of a first capacitor346-1, and the other end of the first capacitor346-1may be connected to a gate terminal of the second transistor342-2. In addition, a drain terminal of the second transistor342-2is connected to one end of a second capacitor346-2, and the other end of the second capacitor346-2may be connected to a gate terminal of the first transistor342-1. The drain terminals of the first transistor342-1and the second transistor342-2are output terminals of the first amplifier340and may be connected to input terminals of a second amplifier350.

The second amplifier350is a differential amplifier having a common gate structure. Specifically, the second amplifier350may include a second transistor pair310and a fifth transistor pair330. The second transistor pair310may include a third transistor312-1and a fourth transistor312-2. Similarly, the fifth transistor pair330may include a ninth transistor332-2and a tenth transistor332-1.

Source terminals of the third transistor312-1and the fourth transistor312-2are input terminals of the second amplifier350and may be connected to the first amplifier340, and drain terminals are output terminals and may be connected to a first output terminal352-1of the second amplifier350. In addition, bias voltages314-1and314-2for gain control may be applied to gate terminals of the third transistor312-1and the fourth transistor312-2, respectively. Source terminals of the ninth transistor332-2and the tenth transistor332-1are input terminals of the second amplifier350and may be connected to the first amplifier340, and drain terminals are output terminals and may be connected to a second output terminal352-2of the second amplifier350. In addition, bias voltages334-2and334-1for gain control may be applied to gate terminals of the ninth transistor332-2and the tenth transistor332-1, respectively.

According to an embodiment, for convenience of description, a channel width may be assumed for a transistor. For example, inFIG.3, channel width of the third transistor312-1and the tenth transistor332-1may be assumed to have a voltage gain of 1, and channel width of the fourth transistor312-2and the ninth transistor332-2may be assumed to have a voltage gain of 2. However, a ratio of such length values is not limited to a determined embodiment, and may be applied in the same manner to all cases configured for different length ratios. For example, the channel width of the fourth transistor312-2and the ninth transistor332-2may be assumed to have a voltage gain of n so that the channel width of the third transistor312-1and the tenth transistor332-1have a voltage gain of m (m and n are any positive numbers).

As described above, when a channel width is assumed according to a voltage gain, an input signal may be amplified according to a channel width. For example, referring toFIG.3, a signal received from an input power source may be amplified by the first amplifier340, and may be amplified by the second amplifier350three times in magnitude compared to the magnitude of the signal amplified by the first amplifier340.

Specifically, the first transistor342-1of the first amplifier340may be connected to the third transistor312-1having a voltage gain of 1 and to the fourth transistor312-2having a voltage gain of 2. Also, the second transistor342-2of the first amplifier340may be connected to the tenth transistor332-1having a voltage gain of 1 and to the ninth transistor332-2having a voltage gain of 2. In this case, the magnitude of the signal output from the first amplifier340may be amplified by one time by the third transistor312-1via the connection to the first output terminal352-1and by the tenth transistor332-1via the connection to the second output terminal352-2, and the magnitude of the signal output from the first amplifier340may be amplified by two times by the fourth transistor312-2via the connection to the first output terminal352-1and by the ninth transistor332-2via the connection to the second output terminal. That is, the voltage gain of the entire circuit may be 3 obtained by summing a voltage gain of 1 according to the third and tenth transistors312-1and332-1and a voltage gain of 2 according to the fourth and ninth transistors312-2and332-2, and the input signal may be amplified three times in magnitude.

According to an embodiment, although illustrated as dotted lines, instead of being connected to the second transistor pair310and the fifth transistor pair330of the second amplifier350, the first amplifier340may be connected to a phase controller320so as to amplify the signal while shifting a phase of the signal by 180° (phase shifting). The phase controller320may include two pairs of transistors. Source terminals of the two pairs of transistors of the phase controller320may be connected to the first amplifier340. In this case, the signal may undergo a phase change of 180°.

A detailed circuit configuration of the phase controller320will be described with reference toFIG.4below.

FIG.4illustrates another implementation example of a circuit for controlling a phase and power of a signal, for improving the performance of an RFIC in a wireless communication system according to various embodiments of the disclosure.

Compared toFIG.3, instead of being connected to the second transistor pair310and the fifth transistor pair330of the second amplifier350, the first amplifier420may be connected to a phase controller410so as to amplify an input signal while shifting a phase of the input signal by 180° (phase shifting). Specifically, the phase controller410included in the second amplifier350is a differential amplifier having a common gate structure and may include a third transistor pair410-1and a fourth transistor pair410-2. In addition, the third transistor pair410-1may include a fifth transistor412-1and a sixth transistor412-2. Similarly, the fourth transistor pair410-2may include a seventh transistor414-2and an eighth transistor414-1.

Source terminals of the fifth transistor412-1and the sixth transistor412-2are input terminals of the phase controller410and may be connected to the first amplifier420, and drain terminals are output terminals and may be connected to a second output terminal416-2of the phase controller410included in the second amplifier350. In addition, bias voltages418-1and418-2for gain control may be applied to gate terminals of the fifth transistor412-1and the sixth transistor412-2, respectively.

Source terminals of the seventh transistor414-2and the eighth transistor414-1are input terminals of the phase controller410and may be connected to the first amplifier420, and drain terminals are output terminals and may be connected to the second output terminal416-2of the phase controller410. In addition, bias voltages418-4and418-3for gain control may be applied to gate terminals of the seventh transistor414-2and the eighth transistor414-1, respectively.

According to an embodiment, inFIG.4, as described in the embodiment of (2) ofFIG.2Cwhere the input signal is phase-shifted as well as amplified, if the first-side amplifier211cis connected to the second-side output unit233cand the second-side amplifier213cis connected to the first-side output unit231c, a signal may be phase-inverted and amplified, and based on this, an input signal may be phase-shifted by 180° as well as amplified. Specifically, the third transistor pair410-1(corresponding to the first-side amplifier211c) may be connected to the first output terminal416-1(corresponding to the first-side output unit231c), and the fourth transistor pair410-2(corresponding to the second-side amplifier213c) may be connected to the second output terminal416-2(corresponding to the second-side output unit233c), so that a signal may be phase-inverted and amplified, and based on this, a phase of an input signal may be shifted by 180°.

According to an embodiment, for convenience of description, a channel width may be assumed for a transistor. For example, inFIG.4, channel width of the fifth transistor412-1and the eighth transistor414-1may be assumed to have a voltage gain of 1, and channel width of the sixth transistor412-2and the seventh transistor414-2may be assumed to have a voltage gain of 2. However, a ratio of such length values is not limited to a determined embodiment, and may be applied in the same manner to all cases configured for different length ratios. For example, the channel width of the sixth transistor412-2and the seventh transistor414-2may be assumed to have a voltage gain of n so that the channel width of the fifth transistor412-1and the eighth transistor414-1have a voltage gain of m (m and n are any positive numbers).

As described above, when a channel width is assumed according to a voltage gain, an input signal may be amplified according to a channel width. For example, referring toFIG.4, signals received from input power sources424-1and424-2may be amplified by the first amplifier420, and may be amplified by the phase controller410included in the second amplifier350three times in magnitude compared to the signal amplified by the first amplifier420.

Specifically, the first transistor342-1of the first amplifier340may be connected to the fifth transistor412-1having a voltage gain of 1 and to the sixth transistor412-2having a voltage gain of 2. Also, the second transistor342-2of the first amplifier340may be connected to the eighth transistor414-1having a voltage gain of 1 and to the seventh transistor414-2having a voltage gain of 2. In this case, the signal output from the first amplifier340may be amplified by one time by the fifth transistor412-1via the connection to the second output terminal416-2and by the eighth transistor414-1via the connection to the first output terminal416-1, while concurrently being amplified by inverting the phase of the signal, and the signal output from the phase included in the first amplifier340may be amplified by two times by the sixth transistor412-2via the connection to the first output terminal352-1and by the seventh transistor414-2via the connection to the second output terminal, while concurrently being amplified by inverting the phase of the signal. That is, the voltage gain of the entire circuit may be 3 obtained by summing a voltage gain of 1 according to the fifth and eighth transistors412-1and414-1and a voltage gain of 2 according to the sixth and seventh transistors412-2and414-2. In addition, the input signal may be amplified three times in magnitude, while the phase of the input signal is being shifted by 180° at the same time.

As described above, in various embodiments of the disclosure, by shifting a phase by 180° by using the phase controller410included in the second amplifier350, area and loss may be minimized compared to conventional methods, and therefore overall RFIC performance may be improved.

FIG.5illustrates another implementation example of a circuit for controlling a phase and power of a signal, for improving the performance of an RFIC in a wireless communication system according to various embodiments of the disclosure.

InFIG.5, an assumption is made for a case of selecting one of two transistors of a second transistor pair and one of two transistors of a third transistor pair, and connecting the same to a first amplifier, wherein a corresponding transistor is also connected to the other side. For example, inFIG.5, for convenience of description, an assumption is made for a case of connecting, to the first amplifier, a third transistor of the second transistor pair and a sixth transistor of the third transistor pair. In this case, the other side corresponding thereto connects, to the first amplifier, a seventh transistor of a fourth transistor pair and a tenth transistor of a fifth transistor pair. However, the cases above do not limit embodiments ofFIG.5, which are to be described below, and may be applied in the same manner to all cases in which different transistors are connected.

Also, for convenience of description, it may be indicated that a first input unit refers to a third transistor512-1and a tenth transistor542-1, a second input refers to a fourth transistor512-2and a ninth transistor542-2, a third input unit refers to a fifth transistor522-1and an eighth transistor532-1, and a fourth input unit refers to a sixth transistor522-2and a seventh transistor532-2.

Referring toFIG.5, a circuit may include a first amplifier550and a second amplifier560, which may have the same configuration as the first amplifier340and the second amplifier350ofFIG.3. Compared toFIG.3, instead of being connected to the second transistor pair310and the fifth transistor pair330of the second amplifier350, the first amplifier550may be connected to the first input units512-1and542-1and the fourth input units522-2and532-2so as to amplify an input signal for the first input units512-1and542-1and amplify an input signal for the fourth input units522-2and532-2while performing phase-shifting by 180° (phase shifting).

Specifically, the second amplifier560is a differential amplifier having a common gate structure, wherein source terminals516-1,526-2,536-2, and546-1of the first input units512-1and542-1and the fourth input units522-2and532-2are input terminals of the second amplifier560and may be connected to the first amplifier550, and drain terminals are output terminals and may be connected to a first output terminal562and a second output terminal564. In addition, bias voltages514-1,524-2,534-2, and544-1for gain control may be applied to gate terminals of the third transistor512-1, the sixth transistor522-2, the seventh transistor532-2, and the tenth transistor542-1, respectively.

According to an embodiment, inFIG.5, as described in the embodiment ofFIG.2Cin which the input signal is amplified without phase shifting or the input signal is phase-shifted and amplified, an input signal may be amplified or phase-shifted.

Specifically, as illustrated inFIG.5, the first input unit and the fourth input unit are included, and whether an output signal is amplified and is phase-inversed by 180° may be identified by adding output signals of both cases (1) and (2) below.

(1) Case in which a Phase of an Input Signal is Amplified without being Shifted (First Input Unit):

In the first input units512-1and542-1(corresponding to amplifier a221cand amplifier d224c), the first-side amplifier211cmay be connected to the first-side output unit231c, and the second-side amplifier213cmay be connected to the second-side output unit233cso as to perform amplification without phase inversion. Specifically, the third transistor512-1may be connected to the first output terminal562(512-1is connected to562, and562corresponds to the first-side output unit231c), and the tenth transistor542-1may be connected to the second output terminal564(542-1is connected to564, and564corresponds to the second-side output unit233c), so that the input signal may be amplified without phase inversion.

(2) Case in which an Input Signal is Phase-Shifted and Amplified (Fourth Input Unit):

In the fourth input units522-2and532-2(corresponding to amplifier b222cand amplifier c223c), the first-side amplifier211cmay be connected to the second-side output unit233c, and the second-side amplifier213cmay be connected to the first-side output unit231c, so as to amplify the input signal while concurrently shifting the phase of the input signal by 180°. Specifically, the sixth transistor522-2may be connected to the second output terminal562(522-1is connected to564, and564corresponds to the second-side output unit233c), and the seventh transistor532-2may be connected to the first output terminal564(532-2is connected to562, and562corresponds to the first-side output unit231c), so that the input signal may be amplified while the phase of the input signal is being inverted by 180° at the same time.

In the first-side amplifier211cbeing connected to the second-side output unit233c, and the second-side amplifier213caccording to an embodiment, an input signal may be phase-shifted by 180° as well as amplified, by changing an element connected to an output terminal inside the second amplifier220b. Specifically, when the first-side amplifier211cis connected to the second-side output unit233c, and the second-side amplifier213cis connected to the first-side output unit231c, a signal may be phase-inverted and amplified (that is, this refers to a case in which amplifier b222cis connected to the second-side output unit233c, and amplifier c223cis connected to the first-side output unit231c), and based on this, the input signal may be phase-shifted by 180° as well as amplified.

According to an embodiment, for convenience of description, a channel width may be assumed for a transistor. For example, inFIG.5, channel width of the third transistor512-1and the tenth transistor542-1may be assumed to have a voltage gain of 1, and channel width of the sixth transistor522-2and the seventh transistor532-2may be assumed to have a voltage gain of 2. However, a ratio of such length values is not limited to a determined embodiment, and may be applied in the same manner to all cases configured for different length ratios. For example, the channel width of the third transistor512-1and the tenth transistor542-1may be assumed to have a voltage gain of n so that the channel width of the sixth transistor522-2and the seventh transistor532-2have a voltage gain of m (m and n are any positive numbers).

As described above, when a channel width is assumed according to a voltage gain, an input signal may be amplified according to a channel width. For example, referring toFIG.5, signals received from input power sources554-1and554-2may be amplified by the first amplifier550, the signals amplified by the first amplifier550may be output in the same magnitude by the first input units512-1and542-1of the second amplifier560, and the signals amplified by the first amplifier550may be amplified two times in magnitude thereof by the fourth input units522-2and532-2of the second amplifier560, while the phase of the signal is being shifted by 180° at the same time. When the outputs of the first input units512-1and542-1and the fourth input units522-2and532-2are added, the signals received from the input power sources554-1and554-2may have the same magnitude as the signals amplified by the first amplifier550, and may be phase-shifted by 180°.

According to an embodiment, inFIG.5, for convenience of description, it has been assumed that the second amplifier560is connected to the first input units512-1and542-1and the fourth input units522-2and532-2, but the embodiment is not limited thereto, and in this case, two input units among the first input units512-1and542-1, the second input units512-2and542-2, the third input units522-1and532-1, and the fourth input units522-2and532-2may be connected instead. In this case, the amplified signal magnitude of the input signal and whether the input signal is phase-shifted by 180° may be vary.

As described above, in various embodiments of the disclosure, a signal may be amplified with a desired value or may be phase-shifted by 180° by using the second amplifier560, area and loss may be minimized compared to conventional methods, and therefore overall RFIC performance may be improved.

FIG.6Aillustrates another implementation example of a circuit for controlling a phase and power of a signal, for improving the performance of an RFIC in a wireless communication system according to various embodiments of the disclosure.

InFIG.6A, the sixth transistor522-2ofFIG.5may be divided into two (632aand636a), via which a voltage gain may be adjusted. Specifically, inFIG.6A, for convenience of description, an assumption may be made with respect to a channel width for a transistor. For example, channel width of the third transistor512-1and the tenth transistor542-1may be assumed to have a voltage gain of 1, and channel width of the sixth transistor522-2and the seventh transistor532-2may be assumed to have a voltage gain of 2. In addition, as illustrated inFIG.6A, the sixth transistor522-2may be divided into two transistors632aand636a. In this case, the two transistors may be assumed to be the 6a-th transistor632aallowing a voltage gain of 4/3 and the 6b-th transistor636aallowing a voltage gain of ⅔, respectively, and it may be assumed that the sum of channel width of the divided two transistors632aand636ais the same as that for the transistors before division. The seventh transistor532-2corresponding thereto may also be divided in the same way. However, a ratio of such length values is not limited to a determined embodiment, and may be applied in the same manner to all cases configured for different length ratios.

InFIG.6A, an assumption is made for a case in which, by switching, a connection is made only to the 6a-th transistor632aand a connection is not made to the 6b-th transistor636a. As described above, when a channel width is assumed according to a voltage gain, an input signal may be amplified according to a channel width. For example, the signals amplified by the first amplifier550may be output in the same magnitude by the first input units512-1and542-1of the second amplifier560, and may be amplified 4/3 times in magnitude thereof, while being phase-shifted by 180° at the same time, by the divided 6a-th transistor632a(and a transistor divided by 4/3 in the seventh transistor) among the fourth input units522-2and532-2of the second amplifier560. According to adding of the outputs, the signals amplified by the first amplifier550are attenuated by ⅓ times in magnitude of the signals amplified by the first amplifier550, and phase-shifting may be performed by 180°.

FIG.6Billustrates a part of another implementation example of a circuit for controlling a phase and power of a signal so as to improve the performance of an RFIC in a wireless communication system according to various embodiments of the disclosure.

InFIG.6B, the sixth transistor522-2ofFIG.5may be divided into two (632band636b), via which a voltage gain may be adjusted. Specifically, inFIG.6B, for convenience of description, an assumption may be made with respect to a channel width for a transistor. For example, channel width of the third transistor512-1and the tenth transistor542-1may be assumed to have a voltage gain of 1, and channel width of the sixth transistor522-2and the seventh transistor532-2may be assumed to have a voltage gain of 2. In addition, as illustrated inFIG.6B, the sixth transistor522-2may be divided into two transistors632band636b. In this case, the two transistors may be assumed to be the 6b-th transistor632ballowing a voltage gain of 4/3 and the 6b-th transistor636ballowing a voltage gain of ⅔, respectively, and it may be assumed that the sum of channel width of the divided two transistors632band636bis the same as that for the transistors before division. The seventh transistor532-2corresponding thereto may also be divided in the same way. However, a ratio of such length values is not limited to a determined embodiment, and may be applied in the same manner to all cases configured for different length ratios.

InFIG.6B, an assumption is made for a case in which both the 6a-th transistor632band the 6b-th transistor636bare connected by switching. As described above, when a channel width is assumed according to a voltage gain, an input signal may be amplified according to a channel width. For example, the signals amplified by the first amplifier550may be output in the same magnitude by the first input units512-1and542-1of the second amplifier560, and may be amplified two times in magnitude thereof, while being phase-shifted by 180° at the same time, by the divided transistor (632a,632b, and a corresponding divided transistor in the seventh transistor) among the fourth input units522-2and532-2of the second amplifier560. According to adding of the outputs, the signals amplified by the first amplifier550may have the same value as the magnitude of the signals amplified by the first amplification unit550, and phase-shifting may be performed by 180°.

According to an embodiment, inFIG.6AandFIG.6B, for convenience of description, it has been assumed that the second amplifier560is connected to the first input units512-1and542-1and the fourth input units522-2and532-2, but the embodiment is not limited thereto, and in this case, two input units among the first input units512-1and542-1, the second input units512-2and542-2, the third input units522-1and532-1, and the fourth input units522-2and532-2may be connected instead. In this case, the amplified signal magnitude of the input signal and whether the input signal is phase-shifted by 180° may be vary.

As described above, in various embodiments of the disclosure, a signal may be amplified with a desired value or may be phase-shifted by 180° by dividing some of the transistors of the second amplifier560into two, area and loss may be minimized compared to conventional methods, and therefore overall RFIC performance may be improved.

FIG.7illustrates a flowchart of a circuit for amplifying a transmission/reception signal and controlling a phase of the transmission/reception signal in a wireless communication system according to various embodiments of the disclosure.

Referring toFIG.7, in operation710, a transceiver may amplify an input signal by using a first amplifier circuit. Here, the first amplifier circuit may have a common source structure and include cross-coupled capacitors.

The common source structure may refer to a structure in which a source terminal of a transistor is grounded, an input signal is applied to a gate terminal, and an output signal is obtained from a drain terminal. When the common source structure is used, during designing of an amplifier, a circuit design may be relatively simple, and high gain characteristics may be exhibited at low frequencies. However, since a capacitor capacitance seen from an input side of the common source structure is C(1+Av) (C is a feedback capacitance, and Av is a voltage gain when passing through the first amplifier circuit), high frequency response characteristics may be limited due to the increase in capacitance.

Cross-connected capacitors may refer to capacitors that serve to couple one stage to another stage. Cross-connected capacitors may be used for smooth coupling of signals between two cascaded terminals, and may serve to pass AC voltage and block DC voltage.

In operation703, the transceiver may amplify the signal output from the first amplifier circuit by using the second amplifier circuit. Here, the second amplifier circuit may have a common gate structure.

The common gate structure may refer to a structure in which an input signal is applied to a source terminal, a gate terminal is grounded, and an output signal is obtained from a drain terminal. Unlike the common source structure, since there is no internal feedback capacitance component, the overall capacitance value may be reduced. Therefore, an environment in which a cutoff frequency may move to a high frequency and may be used even at a high frequency may be formed.

As illustrated inFIG.5, the circuit may include the first amplifier550and the second amplifier560, wherein a signal is amplified or phase-shifted by 180° by connecting two input units among the first to fourth input units. In addition, a channel width may also be assumed, by which a voltage gain may be additionally adjusted. In addition, as inFIG.6AandFIG.6B, a channel width may be assumed for one transistor, this transistor may be divided into two transistors, and in this case, the sum of the channel width of the two transistors may be equal to the channel width of the transistor before division. In this case, the voltage gain may be additionally adjusted according to the channel width of the transistor.

Via operation710and operation720as described above, the input signal may be amplified with various values while being phase-inverted by 180° at the same time, area and loss may be minimized compared to conventional methods, and therefore the overall RFIC performance may be improved.

FIG.8illustrates gain control performance of a circuit for amplifying a transmission/reception signal and controlling a phase of a transmission/reception signal according to various embodiments of the disclosure. InFIG.8, the horizontal axis represents a frequency (unit: GHz) and the vertical axis represents voltage gain (unit: dB).

InFIG.8, a first line810represents measured values of voltage gains according to frequencies when power amplification and phase control are not performed, and a second line820represents measured values of voltage gains according to frequencies when power amplification and phase control are performed via a common source amplifier and a common gate amplifier. Referring toFIG.8, it may be identified that the measured values of the voltage gains of the second line820are improved (gain control)830by at least 10 dB compared to the first line810, and accordingly it may be identified that the voltage gain is improved by at least 10 dB or more when power amplification and phase control are performed.

FIG.9illustrates phase control performance of a circuit for amplifying a transmission/reception signal and controlling a phase of the transmission/reception signal according to various embodiments of the disclosure. InFIG.9, the horizontal axis represents a frequency (unit: GHz) and the vertical axis represents a phase (unit: deg) of an output voltage with respect to an input voltage.

InFIG.9, a first line910represents measured values of phases of output voltages with respect to input voltages according to frequencies when power amplification and phase control are not performed, and a second line920represents measured values of phases of output voltages with respect to input voltages according to frequencies when power amplification and phase control are performed via a common source amplifier and a common gate amplifier. Referring toFIG.9, it mm be identified that, compared to the first line910, the measured values of the phases of the output voltages with respect to the input voltages of the second line920are shifted (180° phase shifting)930to an extent close to 180°, and accordingly it may be identified that the phases of the output voltages with respect to the input voltages when power amplification and phase control are performed is shifted to an extent close to 180°.

FIG.10illustrates a change rate of a voltage gain during a phase control of a circuit for amplifying a transmission/reception signal and controlling a phase of the transmission/reception signal in a wireless communication system according to various embodiments of the disclosure. InFIG.10, the horizontal axis represents a frequency (unit: GHz) and the vertical axis represents voltage gain (unit: dB).

InFIG.10, a first line1010represents measured values of voltage gain according to frequencies when power amplification and phase control are not performed, a second line1020represents measured values of voltage gain according to frequencies when only power amplification is performed via a common source amplifier and a common gate amplifier, a third line1030represents measured values of voltage gain according to frequencies when only phase control is performed via the common source amplifier and the common gate amplifier, and a fourth line1040represents measured values of voltage gain according to frequencies when power amplification and phase control are performed via the common source amplifier and the common gate amplifier.

Referring toFIG.10, when comparing the first line1010obtained when power amplification and phase control are not performed, with the third line1020obtained when only phase control is performed without performing of power amplification, it is identified that there is almost no difference in the measured values of the voltage gain. Similarly, when comparing the third line1030obtained when only power amplification is performed without performing of phase control, with the fourth case1040obtained when both power amplification and phase control are performed, it is identified that there is almost no difference in the measured values of the voltage gain. Accordingly, it may be identified that, when power amplification is not performed, even if phase control is performed, the voltage gain hardly changes.

According to embodiments of the disclosure, a device in a wireless communication system may include a first amplifier configured to amplify an input signal, and a second amplifier connected to the first amplifier and having a common gate structure of amplifying a signal output from the first amplifier, wherein the second amplifier includes a first input unit, a second input unit, a third input unit, and a fourth input unit, and two input units among the first input unit, the second input unit, the third input unit, and the fourth input unit are connected to the first amplifier.

According to an embodiment, the first amplifier may have a common source structure and include cross-coupled capacitors.

According to an embodiment, the first input unit and the second input unit may amplify the signal output from the first amplifier without inverting a phase of the signal.

According to an embodiment, the third input unit and the fourth input unit may amplify the signal output from the first amplifier while inverting a phase of the signal.

According to an embodiment, first sides of the first input unit and the second input unit may be connected to a non-inverting output unit, and second sides may be connected to an inverting output unit.

According to an embodiment, first sides of the third input unit and the fourth input unit may be connected to an inverting output unit, and second sides may be connected to a non-inverting output unit.

According to an embodiment, the first input unit, the second input unit, the third input unit, and the fourth input unit may have different voltage gains, respectively.

According to an embodiment, at least one input unit among the first input unit, the second input unit, the third input unit, and the fourth input unit may be additionally divided so as to have a different voltage.

According to an embodiment, each of the first input unit, the second input unit, the third input unit, and the fourth input unit may include a pair of transistors, and a voltage gain may be controlled using a channel width for the each pair of transistors.

According to an embodiment, the each pair of transistors is additionally divided, at least one of the divided transistors may be connected, and a voltage gain may be controlled using a channel width for the connected divided transistor.

According to embodiments of the disclosure, a method in a wireless communication system may include amplifying an input signal by using a first amplifier circuit, and amplifying the signal output from the first amplifier circuit by using a second amplifier circuit having a common gate structure, wherein the second amplifier circuit includes a first input circuit, a second input circuit, a third input circuit, and a fourth input circuit, and two input circuits among the first input circuit, the second input circuit, the third input circuit, and the fourth input circuit are connected to the first amplifier circuit.

According to an embodiment, the first amplifier circuit may have a common source structure and include cross-coupled capacitors.

According to an embodiment, the first input circuit and the second input circuit may amplify the signal output from the first amplifier circuit without inverting a phase of the signal.

According to an embodiment, the third input circuit and the fourth input circuit may amplify the signal output from the first amplifier circuit while inverting a phase of the signal.

According to an embodiment, first sides of the first input circuit and the second input circuit may be connected to a non-inverting output unit, and second sides may be connected to an inverting output unit.

According to an embodiment, first sides of the third input unit and the fourth input unit may be connected to an inverting output unit, and second sides may be connected to a non-inverting output unit.

According to an embodiment, the first input unit, the second input unit, the third input unit, and the fourth input unit may have different voltage gains, respectively.

According to an embodiment, at least one input unit among the first input unit, the second input unit, the third input unit, and the fourth input unit may be additionally divided so as to have a different voltage.

According to an embodiment, each of the first input unit, the second input unit, the third input unit, and the fourth input unit may include a pair of transistors, and a voltage gain may be controlled using a channel width for the each pair of transistors.

According to an embodiment, the each pair of transistors is additionally divided, at least one of the divided transistors may be connected, and a voltage gain may be controlled using a channel width for the connected divided transistor.

The methods according to embodiments described in the claims or the specification of the disclosure may be implemented by hardware, software, or a combination of hardware and software.

Although specific embodiments have been described in the detailed description of the disclosure, it will be apparent that various modifications and changes may be made thereto without departing from the scope of the disclosure.