Circuit board with measure against high frequency noise

A circuit board with a measure against high frequency noise includes: an interconnect substrate having an interconnect pattern to which an IC which is a source of high frequency noise is electrically connected; a pair of lands provided on a mounting surface of the interconnect substrate; and a chip component having a body composed of a magnetic body (i.e., ferrite) in a rectangular parallelepiped, and a pair of external electrodes provided at opposite ends of the body, the pair of external electrodes being connected to the pair of lands, the body being disposed on the interconnect pattern, as observed in a direction perpendicular to the mounting surface.

CROSS REFERENCE TO RELATED APPLICATIONS

This application claims benefit of priority to Japanese Patent Application 2016-093253 filed May 6, 2016, the entire content of which is incorporated herein by reference.

TECHNICAL FIELD

The present disclosure relates to a circuit board with a measure against high frequency noise.

BACKGROUND

In recent years, electronic devices such as mobile terminals represented by smart phones are increasingly developed to present high performance, multi-functionality, and the like, and accordingly, they are increasingly developed to be rapidly driven by a low voltage and a large current. As an electronic device is rapidly driven, in an electronic component such as an IC, a high frequency noise is generated by a switching device rapidly switching or the like. The noise has a negative effect on an operation of an electronic device, and accordingly, an anti-noise measure is required.

For example, Japanese Patent Laying-Open No. 10-163027 discloses an inductance element comprising a printed pattern laid on a printed circuit board and a magnetic body stuck in a vicinity of the printed pattern wherein the magnetic body can be partially cut and thus adjusted in a direction to reduce the printed pattern's inductance to adjust inductance successively with good precision. Japanese Patent Laying-Open No. 10-163027 discloses that by applying this inductance element to an electronic circuit, a low pass filter with good adjustment precision is obtained.

Furthermore, Japanese Utility Model Laying-open No. 61-66911 discloses a multilayer type bead chip inductor in which a conductor is disposed inside a ferrite sheet. Furthermore, as a measure against high frequency noise, there is also a measure using an inductor in the form of a multilayer coil for high frequency.

SUMMARY

The inductance element disclosed in Japanese Patent Laying-Open No. 10-163027 requires sticking the magnetic body to the printed circuit board in order to finely adjust inductance. Sticking such a component with a measure against noise to a substrate must be done manually for example. This reduces mountability to the substrate.

Furthermore, the multilayer type bead chip inductor disclosed in Japanese Utility Model Laying-open No. 61-66911 has a pattern formed of a conductor inside ferrite. When such a component provided with a pattern inside is used to take a measure against noise, a stray capacitance is generated between the component's internal pattern and an external electrode, between patterns, and/or the like, and this stray capacitance reduces high frequency characteristics against noise. Accordingly, there is a possibility that conduction of a noise of a high frequency band (e.g., a frequency band of 10 GHz or more) cannot be suppressed.

Furthermore, when the above described high frequency inductor is used to take a measure against high frequency noise, the measure can suppress conduction of the noise, however, the inductor may reflect the noise. The reflected noise is radiated secondarily and has a negative effect on the surrounding components.

The present disclosure has been made in order to resolve the above problem, and contemplates a circuit board with a measure against high frequency noise which is excellent in mountability and can suppress conduction and reflection of a high frequency noise.

The circuit board with a measure against high frequency noise according to the present disclosure is such that when a noise (a current) flows through an interconnect pattern, a magnetic field is generated around the interconnect pattern, and a chip component (a body) composed of a magnetic body and disposed on the interconnect pattern allows the magnetic body to absorb the magnetic field's energy. This can suppress conduction of a noise in the interconnect pattern and also suppress reflection of the noise at the chip component. In particular, the chip component does not have a conductor pattern formed inside the body composed of the magnetic body, and stray capacitance is not generated between the conductor pattern and an external electrode. Accordingly, the circuit board with a measure against high frequency noise according to the present disclosure is excellent in high frequency characteristics (e.g., a transmission characteristic and a reflection characteristic) against noise, and can suppress conduction and reflection of a noise in a high frequency band. Furthermore, in the circuit board with a measure against high frequency noise according to the present disclosure, a pair of lands is provided on a mounting surface of an interconnect substrate and a pair of external electrodes is provided to the chip component, and the chip component can be mounted using a mounting machine used for mounting another chip component mounted on the interconnect substrate. Thus the circuit board with a measure against high frequency noise according to the present disclosure is excellent in mountability and can suppress conduction and reflection of a high frequency noise.

Preferably, in the circuit board with a measure against high frequency noise according to the present disclosure, the magnetic body is ferrite. By using ferrite, an absorptance of a magnetic field's energy generated by a high frequency noise is high.

Preferably, in the circuit board with a measure against high frequency noise according to the present disclosure, the ferrite is hexagonal ferrite. Hexagonal ferrite never has magnetic permeability decreased in a high frequency band. When hexagonal ferrite is compared with a different ferrite, the former allows a noise to be absorbed in a larger amount and a noise of a high frequency to be also absorbed.

Preferably, in the circuit board with a measure against high frequency noise according to the present disclosure, the interconnect pattern is provided on the mounting surface, and the body is disposed at a location covering a portion of the interconnect pattern. By such a configuration, by the body (the magnetic body) of the chip component disposed immediately adjacent to the interconnect pattern, a magnetic field's energy generated by a high frequency noise conducting through the interconnect pattern can be efficiently absorbed.

Preferably, in the circuit board with a measure against high frequency noise according to the present disclosure, the interconnect substrate is a multilayer interconnect substrate, the interconnect pattern is provided in an interior of the interconnect substrate, and the body is disposed over the interconnect pattern provided in the interior. By such a configuration, by the body (the magnetic body) of the chip component, a magnetic field's energy generated by a high frequency noise conducting through the interconnect pattern provided inside the substrate can be absorbed, and the high frequency noise's conduction and reflection at the interconnect pattern provided inside the substrate can be suppressed.

Preferably, in the circuit board with a measure against high frequency noise according to the present disclosure, the lands are not connected to the interconnect pattern. Thus, a magnetic field caused by a high frequency noise conducting through the interconnect pattern is not interrupted by the lands (a metal object), and an absorptance of the magnetic field's energy at the chip component is high.

DETAILED DESCRIPTION

Hereafter, reference will be made to the drawings to describe suitable embodiments of the present disclosure. In the figures, identical or corresponding components are identically denoted. Furthermore, in each figure, identical elements are identically denoted and will not be described repeatedly.

With reference toFIG. 1andFIG. 2, a circuit board1with a measure against high frequency noise according to an embodiment will be described.FIG. 1is a plan view showing a configuration of circuit board1with a measure against high frequency noise according to an embodiment.FIG. 2is a cross section taken along a line II-II shown inFIG. 1.

Circuit board1with a measure against high frequency noise is a circuit which suppresses conduction and reflection of a noise of a high frequency band (a high frequency noise). In the embodiment, a high frequency band of a noise to be suppressed is a frequency band of 10 GHz or more. Circuit board1with a measure against high frequency noise is configured on an interconnect substrate10. Interconnect substrate10has a mounting surface10a(an upper surface or a lower surface) on which electronic components such as an IC11(corresponding to the claimed integrated circuit) and a chip component20are surface-mounted. An interconnect pattern30is provided on mounting surface10aof interconnect substrate10. Interconnect substrate10is a multilayer interconnect substrate, for example. Note thatFIGS. 1 and 2only show IC11and chip component20mounted on interconnect substrate10, and other electronic components such as a variety of types of chip components mounted on interconnect substrate10are not shown in the figures. Furthermore,FIG. 1andFIG. 2only show interconnect pattern30provided on interconnect substrate10, and other patterns such as a ground pattern provided to interconnect substrate10are not shown in the figures.

IC11is mounted on mounting surface10a. IC11is electrically connected to interconnect pattern30. IC11is a CPU, a basebands IC, a PMIC (a power management IC (an IC which creates a power supply)), a memory, for example. In IC11, a noise of a high frequency band is caused as a switching device is rapidly switched. The noise (a current) of the high frequency band generated in IC11flows to interconnect pattern30to which IC11is connected.

Chip component20is mounted on mounting surface10a. Chip component20is a component with a measure against high frequency noise, and when it is observed on interconnect substrate10in a direction perpendicular to mounting surface10a(in a plan view), it is disposed on a conduction path of high frequency noise (i.e., on interconnect pattern30). Chip component20has a body21and a pair of external electrodes22and23. Chip component20is generally a rectangular parallelepiped as well as another chip component mounted on interconnect substrate10. Chip component20has a size similar to that of another chip component mounted on interconnect substrate10, and it is for example 1.0 mm×0.5 mm×0.5 mm.

Body21is a rectangular parallelepiped. Body21is formed of a ferrite material. Ferrite is a ceramic which contains iron oxide as a major component and presents magnetism, and it is a type of a magnetic body. The ferrite includes a MnZn-based ferrite and a NiZn-based ferrite, for example. Depending on the type of ferrite used for body21, a frequency band can be adjusted so that a noise to be suppressed can be absorbed. Furthermore, by increasing the size of body21, an amount of a high frequency noise absorbed can be increased.

In particular, the ferrite used for body21is preferably hexagonal ferrite. Hexagonal ferrite is produced as a ferrite material such that a manner of arranging particles of molecules configuring a ferrite is changed into a hexagonal-type crystal structure. Hexagonal ferrite never has magnetic permeability decreased in a high frequency band. When this hexagonal ferrite is compared with a case where a ferrite of a different structure is used, the former allows a noise to be absorbed in a larger amount and a noise of a high frequency to be also absorbed.

The pair of external electrodes22and23is provided on body21. One external electrode22is provided at one of the ends of body21opposite to each other in the longitudinal direction of body21(it is provided at at least an end surface and may be provided at a portion of a side surface, a portion of a main surface or the like). External electrode23is provided at the other of the ends of body21opposite to each other in the longitudinal direction of body21. External electrodes22and23each have a Cu electrode and a plating layer (e.g., a nickel plating layer and a tin plating layer covering the nickel plating layer) formed to cover the Cu electrode, for example.

Interconnect pattern30is provided on mounting surface10aof interconnect substrate10. Interconnect pattern30is a power supply pattern, a signal pattern, or the like for example. Interconnect pattern30is a printed interconnect pattern composed of a copper foil or the like for example. IC11is electrically connected to interconnect pattern30. Lands40and41are provided to interconnect pattern30.

Lands40and41are lands provided on mounting surface10aof interconnect substrate10for mounting chip component20on interconnect substrate10. Lands40and41are preferably disposed at a location close to IC11. Lands40and41are each disposed at a prescribed portion of interconnect pattern30. A spacing of land40and land41is determined based on a spacing of external electrode22and external electrode23of chip component20. Lands40and41are shaped and sized based on the shape, size and the like of external electrodes22and23.

One external electrode22of chip component20is soldered or similarly bonded to one land40and thus connected thereto. Furthermore, the other external electrode23of chip component20is soldered or similarly bonded to the other land41and thus connected thereto. Thus, chip component20is mounted on interconnect substrate10. When mounting chip component20, the same mounting machine as that used to mount another chip component on interconnect substrate10is used. Chip component20(body21) mounted on interconnect substrate10is disposed to cover a portion of interconnect pattern30. Chip component20has a longitudinal direction generally parallel to the direction of interconnect pattern30.

A function of chip component20mounted on interconnect substrate10will now be described. When a high frequency noise is generated in IC11, the high frequency noise (a current) flows through interconnect pattern30. When the high frequency noise (the current) flows through interconnect pattern30, a magnetic field (a magnetic flux) is generated around interconnect pattern30. On interconnect pattern30, chip component20(body21) composed of ferrite is disposed, and the magnetic field's energy is absorbed by the ferrite. This suppresses conduction of the high frequency noise in interconnect pattern30downstream of chip component20. Furthermore, this suppresses reflection of the high frequency noise at chip component20. Note that chip component20(body21) covering a larger portion of interconnect pattern30allows more energy of the magnetic field to be absorbed.

In particular, inside body21of chip component20, there is no conductor pattern (e.g., no coil pattern) formed. Accordingly, in chip component20, no stray capacitance is generated between the conductor pattern and external electrodes22and23. As a result, chip component20is excellent in characteristics (a transmission characteristic and a reflection characteristic) against noise in a high frequency band. Thus chip component20can suppress conduction of a noise of a high frequency band of 10 GHz or more and also suppress reflection of the noise.

With reference toFIG. 3andFIG. 4, a comparative example of frequency characteristics (a transmission characteristic and a reflection characteristic) against a noise conducting through an interconnect pattern will be described. This comparative example compares a case where chip component20according to an embodiment is used as a component with a measure against noise, a case where a conventional component with a measure against noise is used, and a case where no component with a measure against noise is used. As the conventional component with a measure against noise are two types of chip ferrite beads (ferrite bead inductors formed in chips) and a chip inductor for high frequency. The frequency characteristics such as transmission and reflection are measured using a network analyzer, for example.

Initially, with reference toFIG. 3, a comparative example of a transmission characteristic against a noise conducting through an interconnect pattern will be described.FIG. 3shows a comparative example of a transmission characteristic against a noise conducting through an interconnect pattern. InFIG. 3, the axis of abscissa represents a frequency (10 MHz or more), and an axis of ordinate represents S21(a transmission coefficient). This S21(a transmission coefficient) represents a transmission characteristic of a noise (a current) from an input end of the component with a measure against noise to an output end of the component with a measure against noise, and indicates that when it has a smaller value, noise is less easily transmitted. InFIG. 3, a graph indicated by a broken line (of long line segments) P1represents a transmission characteristic when one chip ferrite bead is used, a graph indicated by a broken line (of short line segments) P2represents a transmission characteristic when the other chip ferrite bead is used, a graph indicated by an alternate long and short dash line P3represents a transmission characteristic when a chip inductor for high frequency is used, a graph indicated by a chain double-dashed line P4represents a transmission characteristic when no component with a measure against noise is used, and a graph indicated by a solid line P5represents a transmission characteristic when chip component20according to the embodiment is used.

When the chip ferrite beads are used, as indicated by transmission characteristics P1and P2, in a frequency band of 10 GHz or more, a small S21is not obtained, and a high frequency noise of 10 GHz or more is easily transmitted. When the chip inductor for high frequency is used, as indicated by transmission characteristic P3, in the frequency band of 10 GHz or more, a small S21is not obtained, and a high frequency noise of 10 GHz or more is easily transmitted. When chip component20according to the embodiment is used, as indicated by transmission characteristic P5, in the frequency band of 10 GHz or more, S21is small, and a high frequency noise of 10 GHz or more is not easily transmitted (an excellent transmission characteristic is presented against a noise of a high frequency band of 10 GHz or more). Note that when no component with a measure against noise is used, S21is small in the frequency band of 10 GHz or more, however, it is larger than when chip component20according to the embodiment is used, and a transmission characteristic is presented in the high frequency band of 10 GHz or more which is inferior to that of chip component20according to the embodiment.

Reference will now be made toFIG. 4to describe a comparative example of a reflection characteristic against a noise conducting through an interconnect pattern.FIG. 4shows a comparative example of a reflection characteristic against a noise conducting through the interconnect pattern. InFIG. 4, the axis of abscissa represents a frequency (10 MHz or more), and an axis of ordinate represents S11(a reflection coefficient). This S11(the reflection coefficient) represents a reflection characteristic of a noise (a current) at the input end of the component with a measure against noise, and indicates that when it has a smaller value, noise is less easily reflected. InFIG. 4, a graph indicated by a broken line (of long line segments) R1represents a reflection characteristic when one chip ferrite bead is used, a graph indicated by a broken line (of short line segments) R2represents a reflection characteristic when the other chip ferrite bead is used, a graph indicated by an alternate long and short dash line R3represents a reflection characteristic when the chip inductor for high frequency is used, a graph indicated by a chain double-dashed line R4represents a reflection characteristic when no component with a measure against noise is used, and a graph indicated by a solid line R5represents a reflection characteristic when chip component20is used.

When the chip ferrite beads are used, as indicated by reflection characteristics R1and R2, S11is large and noise is reflected. When the chip inductor for high frequency is used, as indicated by reflection characteristic R3, in the frequency band of 10 GHz or more, a small S11is not obtained, and a high frequency noise of 10 GHz or more is easily reflected. When chip component20according to the embodiment is used, as indicated by reflection characteristic R5, in the frequency band of 10 GHz or more, S11is small, and a high frequency noise of 10 GHz or more is not easily reflected (an excellent reflection characteristic is presented against a noise of a high frequency band of 10 GHz or more). Note that when no component with a measure against noise is used, S11is small in the frequency band of 10 GHz or more, however, it is larger than when chip component20according to the embodiment is used, and a reflection characteristic is presented in the high frequency band of 10 GHz or more which is inferior to that of chip component20according to the embodiment.

As can also be seen from these transmission and reflection characteristics, when chip component20according to the embodiment is used, a high frequency noise of 10 GHz or more is not easily transmitted or reflected. This suppresses conduction of the high frequency noise in interconnect pattern30downstream of chip component20. Furthermore, the high frequency noise is not easily reflected at chip component20upstream, and the high frequency noise's secondary radiation can also be suppressed.

Note that when chip component20according to the embodiment is used, as indicated by transmission characteristic P5and reflection characteristic R5, in the frequency band of 10 GHz or more, there are frequencies for which S21and S11are significantly small. The frequencies are adjustable by the type of ferrite used in chip component20or the like.

According to circuit board1with a measure against high frequency noise according to the embodiment, by disposing chip component20(body21) of ferrite on interconnect pattern30, as observed in a direction perpendicular to mounting surface10a, conduction and reflection of a high frequency noise at interconnect pattern30can be suppressed. Note that as chip component20does not have a conductor pattern formed inside body21of ferrite, no stray capacitance is generated between the conductor pattern and external electrodes22and23, and chip component20is excellent in characteristics (a transmission characteristic and a reflection characteristic) against noise in a high frequency band.

According to circuit board1with a measure against high frequency noise according to the embodiment, as a pair of lands40and41are provided on mounting surface10aand a pair of external electrodes22and23are provided to chip component20, chip component20can be mounted using a mounting machine used for mounting another chip component mounted on interconnect substrate10, and is thus excellent in mountability. Thus, chip component20can be mounted as a component with a measure against high frequency noise in a reduced time with a reduced cost.

According to circuit board1with a measure against high frequency noise according to the embodiment, ferrite is used for body21of chip component20, and an absorptance of a magnetic field's energy at the chip component is high. Furthermore, according to circuit board1with a measure against high frequency noise according to the embodiment, when hexagonal ferrite is used for body21of chip component20, a high frequency noise of a higher frequency band can be absorbed.

According to circuit board1with a measure against high frequency noise according to the embodiment, interconnect pattern30through which a high frequency noise conducts is provided on mounting surface10aof interconnect substrate10, and body21of chip component20is disposed on a portion of mounting surface10acovering a portion of interconnect pattern30, so that, by chip component20disposed immediately adjacent to interconnect pattern30, a magnetic field's energy generated in a high frequency noise can be efficiently absorbed.

While the present disclosure has thus been described in an embodiment, the present disclosure is not limited to the above embodiment and is susceptible of a variety of variations. For example, while in the above embodiment body21of chip component20is formed using ferrite, a magnetic body other than ferrite is also applicable.

While in the above embodiment interconnect pattern30through which a high frequency noise conducts is provided with a pair of lands40and41integrally, the pair of lands40and41may not be connected to interconnect pattern30. Even in this configuration, by the ferrite of body21of chip component20, a magnetic field's energy generated by a high frequency noise can be absorbed, and the high frequency noise's conduction and reflection can be suppressed.

While in the above embodiment one chip component20which is a component with a measure against high frequency noise is provided on interconnect pattern30, a plurality of chip components20may be provided. Thus, by providing a plurality of chip components20, a portion covering interconnect pattern30with ferrite is increased, and a magnetic field's energy can be more absorbed.

While in the above embodiment chip component20which is a component with a measure against high frequency noise is disposed parallel to the direction of interconnect pattern30through which a high frequency noise conducts, chip component20may be disposed (to have a longitudinal direction) across the direction of interconnect pattern30. For example, with reference toFIG. 5AandFIG. 5B, an example of disposing chip component20in a different direction will be described.FIG. 5AandFIG. 5Bshow another exemplary arrangement of chip component20according to an embodiment, andFIG. 5Ais a plan view andFIG. 5Bis a cross section taken along a line III-III shown inFIG. 5A. In a circuit board2with a measure against high frequency noise shown inFIG. 5AandFIG. 5B, a pair of lands42and43is provided on mounting surface10aof interconnect substrate10, and the pair of lands42and43is disposed with interconnect pattern30interposed therebetween. Chip component20has one external electrode22connected to one land42. Furthermore, chip component20has the other external electrode23connected to the other land43. Thus, chip component20is mounted on interconnect substrate10and disposed across (i.e., to be substantially orthogonal to) interconnect pattern30. In the case of circuit board2with a measure against high frequency noise, a magnetic field (a magnetic flux) caused by a high frequency noise conducting through interconnect pattern30is not interrupted by lands42and43(a metal object), and an absorptance of the magnetic field's energy at chip component20is high.

While in the above embodiment interconnect pattern30through which a high frequency noise conducts is provided on mounting surface10aof interconnect substrate10(i.e., a surface of a substrate) and chip component20is mounted on mounting surface10a, the present disclosure is also applicable to a case in which the interconnect pattern is provided in an interior of the substrate. For example, with reference toFIG. 6AandFIG. 6B, an example in which an interconnect pattern31is provided in an interior of an interconnect substrate12will be described.FIG. 6AandFIG. 6Bshow a configuration when interconnect pattern31according to an embodiment is disposed in an interior of interconnect substrate12, andFIG. 6Ais a plan view andFIG. 6Bis a cross section taken along a line IV-IV shown inFIG. 6A.

In the case of a circuit board3with a measure against high frequency noise, interconnect pattern31through which a high frequency noise conducts is provided in an interior of interconnect substrate12(a multilayer interconnect substrate). IC11is electrically connected to interconnect pattern31via an interlayer penetrating via32formed to penetrate an insulating layer12bin a thickness direction. Lands44and45are provided on a mounting surface12aof interconnect substrate12and disposed over interconnect pattern31in a direction perpendicular to mounting surface12a. Between lands44,45and interconnect pattern31, only insulating layer12bexists, and lands44,45are disposed at a location free of a metal object (e.g., a ground pattern) between the lands and interconnect pattern31. Chip component20has one external electrode22connected to one land44. Furthermore, chip component20has the other external electrode23connected to the other land45.

Thus, chip component20is mounted on interconnect substrate12and disposed over interconnect pattern31with insulating layer12binterposed, and also parallel to interconnect pattern31. In the case of circuit board3with a measure against high frequency noise, by body21(i.e., ferrite) of chip component20, a magnetic field's energy generated by a high frequency noise conducting through interconnect pattern31provided inside a substrate can be absorbed, and the high frequency noise's conduction and reflection at interconnect pattern31provided inside the substrate can be suppressed. Note, however, that this is applicable to a case in which chip component20(body21) is present in a magnetic field generated with interconnect pattern31serving as a center. Note that while in the example shown inFIG. 6AandFIG. 6Bchip component20is disposed parallel to interconnect pattern31provided inside a substrate, chip component20may be disposed across interconnect pattern31.

While the present disclosure has been described in embodiments, it should be understood that the embodiments disclosed herein are illustrative and non-restrictive in any respect. The scope of the present disclosure is defined by the terms of the claims, and is intended to include any modifications within the meaning and scope equivalent to the terms of the claims.