SYSTEM AND METHOD FOR ENERGY EFFICIENT LINE DRIVER BOOST STAGE WITH HIGH OUTPUT SWING

A system may include circuitry configured to couple a first end of a first resistor to a first input terminal of a line driver and couple a first end of a second resistor to a second input terminal of the line driver. The circuitry may be configured to receive, at a second end of the first resistor, a first signal. The circuitry may be configured to receive, at a second end of the second resistor, a second signal. The circuitry may be configured to set at least one of the first resistor or the second resistor to cause the line driver to output a predetermined range of output voltages, based at least on a voltage sensed from at least one of the first signal or the second signal.

FIELD OF THE DISCLOSURE

This disclosure generally relates to systems and methods for providing a line driver, and more particularly to provide a boost stage of a line driver in an energy efficient manner.

BACKGROUND

Transmitters in wired communication systems often require backward compatibility with legacy standards using relatively high transmit voltages. In modern integrated circuit (IC) technologies, with the decreasing supply voltages and stringent device reliability requirements, it becomes a major design challenge for integrated line drivers to provide high voltages in a reliable and efficient way.

The details of various embodiments of the methods and systems are set forth in the accompanying drawings and the description below.

DETAILED DESCRIPTION

Various embodiments disclosed herein are related to a system including a first amplifier and a second amplifier. Each of the first amplifier and the second amplifier may be a voltage amplifier, a current amplifier, a transimpedance amplifier, a transconductance amplifier, or any electronic device/circuit/system that can increase the power of a signal (voltage signal or current signal). In some embodiments, each of the first amplifier and the second amplifier may be a pseudo-differential amplifier. The first amplifier and a first end of a first resistor may be coupled to a first output terminal of a line driver to receive a first signal. In some embodiments, the line driver may be one or more electronic amplifiers configured to amplify input voltage signals or current signals, or any circuit that can drive a load such as a transmission line or provide/push more current through a transmission line so as to enable a longer cable length. The second amplifier and a first end of a second resistor may be coupled to a second output terminal of the line driver to receive a second signal. Each of the first signal and the second signal may be a voltage signal or a current signal. A second end of the second resistor and an output terminal of the first amplifier may be coupled to an interface to a physical medium (e.g., 10/100/1000BASE-T Ethernet physical media/layers). In some embodiments, each of the first resistor and the second resistor may be a termination resistor or any resistor that is coupled at an end of a respective electrical transmission line coupled to the interface. In some embodiments, the interface to the physical medium may be a medium dependent interface (MDI), a medium dependent crossover interface (MDI-X), an Ethernet interface such as coaxial Ethernet, a twisted pair Ethernet, or an uplink port, or any interface from a physical layer implementation to the physical medium used to carry a signal transmission. In some embodiments, the interface may include a transformer configured to filter a common mode noise, and/or provide electrical isolation between a transmit device and the physical medium. A second end of the first resistor and an output terminal of the second amplifier may be coupled to the interface.

In some embodiments, the first amplifier may be configured to generate a current at the second end of the second resistor, based at least on a voltage sensed from the first signal, to supply an additional current to the second signal traversing the second resistor towards the interface. The second amplifier may be configured to generate a current at the second end of the first resistor, based at least on a voltage sensed from the second signal, to supply an additional current to the first signal traversing the first resistor towards the interface. In some embodiments, each of the first amplifier and the second amplifier may be a current amplifier or a transconductance amplifier. In some embodiments, the transconductance amplifier may be an operational transconductance amplifier (OTA), a voltage controlled current source (VCCS), or any amplifier that can converts an input of voltage (e.g., differential input voltage) to an output of current such that the current is a function of the input voltage.

In some embodiments, each of the first amplifier and the second amplifier may include one or more common-gate transistors in an input stage and one or more common-gate transistors in an output stage. In some embodiments, the one or more common-gate transistors may be one or more transistors (e.g., field-effect transistor (FET) or any other types of transistors) or one or more amplifiers in which a gate terminal/electrode (or a terminal equivalent to the gate terminal depending on the type of transistors/amplifiers) is connected to a ground or a common. In some embodiments, the input stage of an amplifier may be a circuit that can sense/receive an input voltage or current signal (e.g., differential voltage signal) in the amplifier. In some embodiments, the output stage of an amplifier may be a circuit that can deliver/supply/push a certain amount of signal power into a load. In some embodiments, each of the first amplifier and the second amplifier may include a current mirror circuit configured to output a respective current in an output stage. In some embodiments, the current mirror circuit may be a circuit including a pair of matched transistors, a circuit including a Widlar current source, a Wilson current mirror circuit, or any device/circuit/system that can mirror a current through one active device (e.g., transistor) by controlling a current in another active device of the circuit. In some embodiments, at least one of the first amplifier or the second amplifier may be a class AB amplifier. In some other embodiments, at least one of the first amplifier or the second amplifier may be a class B amplifier.

Various embodiments disclosed herein are related to a system including a first amplifier and a first resistor coupled to an input terminal of the first amplifier. The system may include a second amplifier and a second resistor coupled to an input terminal of the second amplifier. In some embodiments, each of the first resistor and the second resistor may be a variable resistor, a programmable resistor, or any resistor whose resistance can be set a particular value in a range of resistance. A first end of the first resistor may be coupled to a first output terminal of a line driver to receive a first signal. A first end of the second resistor may be coupled to a second output terminal of the line driver to receive a second signal. An output terminal of the second amplifier may be coupled to a first terminal of an interface to a physical medium. An output terminal of the first amplifier may be coupled to a second terminal of the interface. The first amplifier may be configured to generate a current, based at least on a voltage sensed from the first signal and a resistance of the first resistor, to supply an additional current to the second signal traversing towards the interface. The second amplifier may be configured to generate a current, based at least on a voltage sensed from the second signal and a resistance of the second resistor, to supply an additional current to the second signal traversing towards the interface.

In some embodiments, at least one of the first resistor or the second resistor may be set to cause the first amplifier and the second amplifier to output a particular range of output voltages, based at least on a voltage sensed from at least one of the first signal or the second signal.

In some embodiments, each of the first amplifier and the second amplifier may be a current amplifier or a transconductance amplifier. In some embodiments, each of the first amplifier and the second amplifier may be a pseudo-differential amplifier. In some embodiments, each of the first amplifier and the second amplifier may include one or more common-gate transistors in an input stage and one or more common-gate transistors in an output stage. In some embodiments, each of the first amplifier and the second amplifier may include a current mirror circuit configured to output a respective current in an output stage. In some embodiments, at least one of the first amplifier or the second amplifier may be a class AB amplifier.

In some embodiments, a first end of a third resistor may be coupled to a first output terminal of a line driver. A first end of a fourth resistor may be coupled to a second output terminal of the line driver. A second end of the fourth resistor and the output terminal of the first amplifier may be coupled to the interface. A second end of the third resistor and the output terminal of the second amplifier may be coupled to the interface. In some embodiments, each of the third resistor and the fourth resistor may be coupled at an end of a respective transmission line coupled to the interface.

Various embodiments disclosed herein are related to a system including circuitry configured to couple a first end of a first resistor to a first input terminal of a line driver and couple a first end of a second resistor to a second input terminal of the line driver. In some embodiments, the line driver may be one or more electronic amplifiers configured to amplify input voltage signals or current signals, or any circuit that can drive a load such as a transmission line or provide/push more current through a transmission line so as to enable a longer cable length. In some embodiments, the line driver may be a single fully differential amplifier. In some embodiments, the line driver may include a plurality of line drivers. The circuitry may be configured to receive, at a second end of the first resistor, a first signal. The circuitry may be configured to receive, at a second end of the second resistor, a second signal. The circuitry may be configured to set at least one of the first resistor or the second resistor to cause the line driver to output a predetermined range of output voltages, based at least on a voltage sensed from at least one of the first signal or the second signal.

In some embodiments, the line driver at least one of a class AB line driver or a class B line driver. In some embodiments, the second end of the first resistor may be coupled to a first output terminal of another line driver. The second end of the second resistor may be coupled to a second output terminal of the other line driver.

In some embodiments, a first end of a third resistor and a first output terminal of the line driver are coupled to an interface to a physical medium. A first end of a fourth resistor and a second output terminal of the line driver may be coupled to the interface. A second end of the fourth resistor may be coupled to the second end of the first resistor. A second end of the third resistor may be coupled to the second end of the second resistor. In some embodiments, each of the third resistor and the fourth resistor may be coupled at an end of a respective transmission line coupled to the interface.

In some embodiments, the line driver may be configured to generate a current, based at least on (1) a voltage sensed from at least the first signal or the second signal and (2) at least one of a resistance of the first resistor or a resistance of the second resistor, to supply an additional current to at least one of the first signal or the second signal.

Various embodiments disclosed herein are related to a method. The method includes receiving, by circuitry at a second end of a first resistor, a first signal. A first end of the first resistor may be coupled to a first input terminal of a line driver. The method may include receiving, by the circuitry at a second end of a second resistor, a second signal. A first end of the second resistor may be coupled to a second input terminal of the line driver. The method may include setting, by the circuitry at least one of the first resistor or the second resistor to cause the line driver to output a predetermined range of output voltages, based at least on a voltage sensed from at least one of the first signal or the second signal.

In some embodiments, the line driver may be one or more electronic amplifiers configured to amplify input voltage signals or current signals, or any circuit that can drive a load such as a transmission line or provide/push more current through a transmission line so as to enable a longer cable length. In some embodiments, the line driver may be a single fully differential amplifier. In some embodiments, the line driver may generate a current, based at least on (1) a voltage sensed from at least the first signal or the second signal and (2) at least one of a resistance of the first resistor or a resistance of the second resistor, to supply an additional current to at least one of the first signal or the second signal.

In some embodiments, the line driver may be at least one of a class AB line driver or a class B line driver. In some embodiments, the second end of the first resistor may be coupled to a first output terminal of another line driver. The second end of the second resistor may be coupled to a second output terminal of the other line driver.

In some embodiments, a first end of a third resistor and a first output terminal of the line driver may be coupled to an interface to a physical medium. A first end of a fourth resistor and a second output terminal of the line driver may be coupled to the interface. A second end of the fourth resistor may be coupled to the second end of the first resistor. A second end of the third resistor may be coupled to the second end of the second resistor. In some embodiments, each of the third resistor and the fourth resistor is coupled at an end of a respective transmission line coupled to the interface.

Transmitters in wired communication systems often require backward compatibility with legacy standards using relatively high transmit voltages. In modern integrated circuit (IC) technologies, with the decreasing supply voltages and stringent device reliability requirements, it becomes a major design challenge for integrated line drivers to provide high voltages in a reliable and efficient way. For example, a line driver may not be able to provide output voltages high enough to drive a transmission line due to performance and reliability limitations. Example configurations of line drivers are shown inFIG.1andFIG.2.

FIG.1is a schematic block diagram of a system100including a line driver120, in accordance with an embodiment. The system100may include a digital-to-analog converter (DAC)110, a resistor131, a resistor132, and an interface140. In some embodiments, the DAC110may be a current output DAC or a current steering DAC which is configured to receive a digital input101and generate a current output signal which is a function of a value represented by the digital input101. In some embodiments, the DAC110may be a voltage output DAC configured to receive a digital input101and generate a voltage output signal which is a function of a value represented by the digital input101. The line driver120may include one or more amplifiers122, and feedback resistors124,126. The line driver120may receive differential output signals of the DAC110(e.g., differential current output or differential voltage output) at input terminals thereof (e.g. Vin+and Vin−as shown inFIG.1) and generate differential output signals (e.g., voltage signals or current signals) at output terminals thereof (e.g. Vout+and Vout−as shown inFIG.1). In some embodiments, the one or more amplifiers122together with feedback resistors124,126can form an amplifier, a gain of which can be set by setting resistance of feedback resistors124,126.

In some embodiments, a first end of the resistor131may be coupled to a second output terminal of the line driver120(e.g., Vout+), and a first end of the resistor132may be coupled to a first output terminal of the line driver120(e.g., Vout−). A second end of the resistor132may be coupled to an interface140to a physical medium (e.g., 10/100/1000BASE-T Ethernet physical media/layers) which can be represented as a load resistor150. Similarly, a second end of the resistor131may be coupled to the interface140. In some embodiments, each of the resistor131and the resistor132may be a termination resistor or any resistor that is coupled at an end of a respective electrical transmission line coupled to the interface140. In some embodiments, the interface140to the physical medium may be an MDI, an MDI-X, an Ethernet interface such as coaxial Ethernet, a twisted pair Ethernet, or an uplink port, or any interface from a physical layer implementation to the physical medium used to carry a signal transmission. In some embodiments, the interface140may include a transformer142configured to filter a common mode noise, and/or provide electrical isolation between a transmit device and the physical medium. In some embodiments, the line driver120may be a class AB line driver which uses one or more class AB amplifiers, or a class B line driver which uses one or more class B amplifiers.

FIG.2is a schematic block diagram of a system200including a line driver220and a boost stage260, in accordance with an embodiment. The line driver220may have a configuration similar to that of the line driver120. The system200may include a DAC210, a resistor231, a resistor232, an interface240, and a load resistor250which have similar configurations as those of the DAC110, the resistor131, the resistor132, the interface140, and the load resistor150, respectively. In some embodiments, the boost stage260may include a DAC262which may have a configuration similar to the DAC210. For example, the DAC262may be a current output DAC configured to receive a digital input261and generate a current output signal which is a function of a value represented by the digital input261. Each of output terminals of the DAC262may be coupled between (1) an end of each of the resistors231and232and (2) the interface240. In this manner, the DAC262can supply differential output signals thereof (e.g., differential current output or differential voltage output) to signals flowing towards the interface240, thereby functioning as a boost stage260of the line driver220. In some embodiments, the DAC262can be only enabled when a high amplitude is used. In some embodiments, the number of bits in the digital input261for the DAC262may be dependent on the linearity requirement of high amplitude applications.

As shown inFIG.1, a current signal from the DAC110flows through the feedback resistors124,126to generate output swing at the line driver120, which may be limited by device reliability and linearity performance of the line driver120. For example, the output swing at the interface140may be half of the output swing at the output terminals of the line driver120due to the impedance division of the resistance of termination resistors131,132and the impedance of a cable or physical medium (e.g., the resistance of the load resistor150), thereby causing the amplitude of transmitted signals to be limited and not enough for legacy standards.

Moreover, as shown inFIG.2, the extra current steering DAC262can supply an additional current directly at the interface240to provide extra output swing. The extra current can be controlled by scaling the current between the DAC210and the DAC262such that the weight of the bits between the digital input201(of the DAC210) and the digital input261(of the DAC262) is different. However, the system200including the extra DAC262may be complex and not efficient enough when certain linearity performance and energy efficiency are required. Moreover, It is hard to match the frequency response of the path through the line driver220(or the transfer function from the digital input101to the interface140) with the frequency response of the path through the booster stage260(or the transfer function from the digital input261to the interface140), as the impedance at the driver output is very different from the impedance at the DAC output. Therefore, there is a need to improve a system/method for providing a boost stage of a line driver.

To solve this problem, according to certain aspects, embodiments in the present disclosure relate to an energy and area efficient technique to boost a transmit signal (e.g., output voltage/current of a main line driver) to meet high amplitude requirements, using a second/auxiliary line driver (e.g., a voltage-mode line driver or a transconductance line driver), while maintaining an acceptable performance and reliability (e.g., satisfying performance and reliability requirements). In some embodiments, an auxiliary line driver may include one or more transconductance amplifiers configured to sense/receive an output signal (e.g., voltage/current signal) of a main line driver and supply an extra boost current directly to the output signal. In some embodiments, the auxiliary line driver may reuse the output signal of the main line driver as an input signal of the auxiliary line driver. In some embodiments, the auxiliary line driver may convert/transform an input voltage signal (Vin) received from the main line driver, into an output current signal (Iout).

In some embodiments, the auxiliary line driver may include one or more class AB line drivers or one or more class AB amplifiers. In some embodiments, the auxiliary line driver may include one or more class B line drivers or one or more class B amplifiers. In some embodiments, a type of the auxiliary line driver may be independent of a type of the main line driver. For example, the main line driver may include two-stage amplifiers (e.g., a cascade of two amplifiers), while the auxiliary line driver may include a single stage amplifier, thereby providing an improved frequency response.

In some embodiments, an auxiliary line driver may include a first resistor coupled to a first amplifier, and a second resistor coupled to a second amplifier. Each of the first amplifier and the second amplifier may include common-gate transistors in an input stage to generate a current signal. Each of the first amplifier and the second amplifier may include a current mirror circuit in an output stage to provide high output swing. In some embodiments, each of the first resistor and the second resistor may be a programmable resistor or a variable resistor. Each of the first resistor and the second resistor may be set or programmed to have different resistance values to accommodate for different output swing requirements for different applications. For example, a less resistance value of each of the first resistor and the second resistor may be set or programmed to provide higher output swing (to satisfy higher output swing requirements). In some embodiments, each of the first resistor and the second resistor may be set or programmed to have the same resistance value. In some embodiments, the auxiliary line driver may be disabled when a high output amplitude is not required for power savings.

In some embodiments, each of the first amplifier and the second amplifier may include a current amplifier or a transconductance amplifier. In some embodiments, the auxiliary line driver may convert, via the first resistor, an input voltage (e.g., Vin+) into an input current (e.g., Iin_1) for the first amplifier to receive the input current and generate an amplified output current (e.g., Iout_1). Similarly, the auxiliary line driver may convert, via the second resistor, an input voltage (e.g., Vin+) into an input current (Iin_2) for the second amplifier to receive the input current and generate an amplified output current (Iout_2). In some embodiments, the auxiliary line driver as a transconductance line driver may be configured to implement Vin-to-Iouttransconductance. In this manner, the auxiliary (transconductance) line driver may be configured to sense/receive an output voltage signal of the main line driver as an input voltage signal (Vin), generate an extra boost current (Iout) based on the input voltage signal, and supply the extra boost current directly to the interface.

Embodiments in the present disclosure have at least the following advantages and benefits. First, embodiments in the present disclosure can provide useful techniques for re-using the signal information from an output of a (main) line driver, thereby implementing an auxiliary/additional line driver in a simple and efficient manner. With the simple implementation, the auxiliary line driver can achieve a better linearity with higher output swing, compared with other implementations (e.g., addition of an extra current steering DAC; seeFIG.2).

Second, embodiments in the present disclosure can provide useful techniques for re-using a main line driver such that addition of an auxiliary line driver can easily achieve impedance matching between the combined line driver and a low impedance physical medium (e.g., a low impedance coaxial cable). In this manner, the addition of the auxiliary line driver can provide a boost stage of a line driver with better energy efficiency (e.g., low power consumption), less noise/distortions, and/or better area efficiency (e.g., occupying less area), compared with other implementations (e.g., addition of an extra current steering DAC; seeFIG.2).

Third, embodiments in the present disclosure can provide useful techniques for re-using a main line driver such the auxiliary line driver can easily achieve a frequency transfer function matched with the frequency transfer function of the main line driver (e.g., a first-order low pass filter of the main line driver).

FIG.3is a schematic block diagram of a system300including a main line driver320and an auxiliary line driver360as a boost stage, in accordance with an embodiment. The line driver320may have a configuration similar to that of the line driver120(seeFIG.1). The system300may include a DAC310, a resistor331, a resistor332, an interface340, and a load resistor350which have similar configurations as those of the DAC110, the resistor131, the resistor132, the interface140, and the load resistor150, respectively (seeFIG.1).

In some embodiments, the system300may boost a transmit signal (e.g., output voltage/current of the main line driver320) to meet high amplitude requirements, using the auxiliary line driver360(e.g., a voltage-mode line driver or a transconductance line driver), while maintaining an acceptable performance and reliability (e.g., satisfying performance and reliability requirements). In some embodiments, the auxiliary line driver360may include one or more amplifiers (not shown) configured to sense/receive an output signal361(e.g., voltage/current signal S1) of the main line driver320at a first input terminal363(Vin+) and supply an extra boost current371(Iout_1) directly to the output signal S2traversing the resistor332. The one or more amplifier may include a voltage amplifier, a current amplifier, a transimpedance amplifier, a transconductance amplifier, or any electronic device/circuit/system that can increase the power of a signal (voltage signal or current signal). In some embodiments, the auxiliary line driver360may be a single fully differential amplifier. The auxiliary line driver360may be configured to sense/receive an output signal361(e.g., voltage/current signal S2) of the main line driver320at a second input terminal364(Vin−) and supply an extra boost current372(Iout_2) directly to the output signal S1traversing the resistor331. In some embodiments, the auxiliary line driver360may reuse the output signal S1, S2of the main line driver320as an input signal of the auxiliary line driver. In some embodiments, the auxiliary line driver360may convert/transform an input voltage signal (S1, S2) received from the main line driver, into an output current signal (Iout_1, Iout_2).

In some embodiments, the auxiliary line driver360may include one or more class AB line drivers or one or more class AB amplifiers. In some embodiments, the auxiliary line driver360may include one or more class B line drivers or one or more class B amplifiers. In some embodiments, a type of the auxiliary line driver360may be independent of a type of the main line driver320. For example, the main line driver320may include two-stage amplifiers (e.g., a cascade of two amplifiers), while the auxiliary line driver360may include a single stage amplifier, thereby providing an improved frequency response.

FIG.4is a schematic block diagram of a system400including a line driver420and an auxiliary (transconductance) line driver460as a boost stage, in accordance with an embodiment. The line driver420may have a configuration similar to that of the line driver120(seeFIG.1). The system400may include a DAC410, a resistor431, a resistor432, an interface440, and a load resistor450which have similar configurations as those of the DAC110, the resistor131, the resistor132, the interface140, and the load resistor150, respectively (seeFIG.1).

In some embodiments, the auxiliary line driver460may include a first amplifier465configured to sense/receive an output signal461(e.g., voltage/current signal S1) of the main line driver420at a first input terminal463(Vin+) and supply an extra boost current466(Iout_1) directly to the output signal S2traversing the resistor432. Similarly, the auxiliary line driver460may include a second amplifier467configured to sense/receive an output signal462(e.g., voltage/current signal S2) of the main line driver420at a second input terminal464(Vin−) and supply an extra boost current468(Iout_2) directly to the output signal S1traversing the resistor431. In some embodiments, each of the first amplifier465and the second amplifier467may be a pseudo-differential amplifier. In some embodiments, each of the first amplifier465and the second amplifier467may be a current amplifier or a transconductance amplifier. In some embodiments, the transconductance amplifier may be an operational transconductance amplifier (OTA), a voltage controlled current source (VCCS), or any amplifier that can converts an input of voltage (e.g., differential input voltage) to an output of current such that the current is a function of the input voltage. In some embodiments, the auxiliary line driver460may reuse the output signal (S1, S2) of the main line driver420as an input signal of the auxiliary line driver. In some embodiments, the auxiliary line driver460may convert/transform an input voltage signal (S1, S2) received from the main line driver, into an output current signal (Iout_1, Iout_2).

In some embodiments, the auxiliary line driver460may include one or more class AB line drivers or one or more class AB amplifiers. In some embodiments, the auxiliary line driver460may include one or more class B line drivers or one or more class B amplifiers. In some embodiments, a type of the auxiliary line driver460may be independent of a type of the main line driver420. For example, the main line driver420may include two-stage amplifiers (e.g., a cascade of two amplifiers), while the auxiliary line driver460may include a single stage amplifier, thereby providing an improved frequency response.

In some embodiments, the first amplifier465and a first end of the first resistor431(e.g., left end of the first resistor431inFIG.4) may be coupled to a first output terminal (Vout+) of the main line driver420to receive a first signal461(S1). The second amplifier467and a first end of the second resistor432(e.g., left end of the second resistor432inFIG.4) may be coupled to a second output terminal (Vout−) of the main line driver420to receive a second signal462(S2). Each of the first signal461(S1) and the second signal462(S2) may be a voltage signal or a current signal. A second end of the second resistor432(e.g., right end of the second resistor432inFIG.4) and an output terminal of the first amplifier465may be coupled to the interface440. A second end of the first resistor (e.g., right end of the first resistor431inFIG.4) and an output terminal of the second amplifier467may be coupled to the interface. In some embodiments, the first amplifier465may be configured to generate a current466(Iout_1) at the second end of the second resistor432, based at least on a voltage sensed from the first signal461(S1), to supply an additional current to the second signal462(S2) traversing the second resistor432towards the interface440. The second amplifier467may be configured to generate a current468(Iout_2) at the second end of the first resistor431, based at least on a voltage sensed from the second signal, to supply an additional current to the first signal461(S1) traversing the first resistor431towards the interface440.

FIG.5AandFIG.5Bare schematic block diagrams of a system500including a main line driver520and an auxiliary (transconductance) line driver (which includes a first transconductance amplifier560and a second transconductance amplifier570) as a boost stage, in accordance with an embodiment. The line driver520may have a configuration similar to that of the line driver120(seeFIG.1). The system500may include a DAC510, a resistor531, a resistor532, an interface540, and a load resistor550which have similar configurations as those of the DAC110, the resistor131, the resistor132, the interface140, and the load resistor150, respectively (seeFIG.1).

In some embodiments, the auxiliary line driver may include a first resistor563coupled to a first amplifier560, and a second resistor573coupled to a second amplifier570. In some embodiments, each of the first amplifier560and the second amplifier570may be a current amplifier or a transconductance amplifier. In some embodiments, each of the first amplifier560and the second amplifier570may be a pseudo-differential amplifier. In some embodiments, each of the first resistor563and the second resistor573may be a programmable resistor or a variable resistor. Each of the first resistor563and the second resistor573may be set or programmed to have different resistance values to accommodate for different output swing requirements for different applications. For example, a less resistance value of each of the first resistor563and the second resistor573may be set or programmed to provide higher output swing (to satisfy higher output swing requirements). In some embodiments, each of the first resistor563and the second resistor573may be set or programmed to have the same resistance value. In some embodiments, the auxiliary line driver may be disabled when a high output amplitude is not required for power savings.

In some embodiments, the auxiliary line driver may convert, via the first resistor563, an input voltage of a first signal562(S1) received at a first input terminal561(Vin+) into an input current564(e.g., Iin_1) for the first amplifier560to receive the input current564and generate an amplified output current565(Iout_1). Similarly, the auxiliary line driver may convert, via the second resistor573, an input voltage of a second signal572(S2) received at a second input terminal571(Vin−) into an input current574(e.g., Iin_2) for the second amplifier570to receive the input current574and generate an amplified output current575(Iout_2). In some embodiments, the auxiliary line driver as a transconductance line driver may be configured to implement Vin-to-Iouttransconductance. In this manner, the auxiliary (transconductance) line driver may be configured to sense/receive an output voltage signal (S2, S2) of the main line driver520as an input voltage signal (Vin), generate an extra boost current (Iout_1, Iout_2) based on the input voltage signal (S2, S2), and supply the extra boost current (Iout_1, Iout_2) directly to the interface540.

Referring toFIG.5AandFIG.5B, the first amplifier560may include one or more common-gate transistors582in an input stage and one or more common-gate transistors584in an output stage. In some embodiments, the one or more common-gate transistors582,584may be one or more transistors (e.g., field-effect transistor (FET) or any other types of transistors) or one or more amplifiers in which a gate terminal/electrode (or a terminal equivalent to the gate terminal depending on the type of transistors/amplifiers) is connected to a ground or a common. In some embodiments, the input stage of an amplifier may be a circuit that can sense/receive an input voltage or current signal (e.g., differential voltage signal) in the amplifier. In some embodiments, the output stage of an amplifier may be a circuit that deliver/supply/push a certain amount of signal power into a load. In some embodiments, the one or more common-gate transistors582,584may include a pMOS transistor whose gate is biased with a pMOS transistor gate bias voltage Vbp, and an nMOS transistor whose gate is biased with an nMOS transistor gate bias voltage Vbn. In some embodiments, the pMOS transistor gate bias voltage Vbp may be a fixed voltage lower than a high potential supply voltage Vdd by a prescribed voltage, while the nMOS transistor gate bias voltage Von may be a fixed voltage higher than the low potential supply voltage Vss by a prescribed voltage. In some embodiments, the first amplifier560may include a current mirror circuit586(e.g., PMOS current mirror) configured to output a current in an output stage. In some embodiments, the first amplifier560may include a current mirror circuit588(e.g., NMOS current mirror) configured to output a current in the output stage. In some embodiments, the current mirror circuit may be a circuit including a pair of matched transistors (as shown inFIG.5B), a circuit including a Widlar current source, a Wilson current mirror circuit, or any device/circuit/system that can mirror a current through one active device (e.g., transistor) by controlling a current in another active device of the circuit. In some embodiments, the gain of the current mirror is greater than one. The second amplifier570may have a configuration similar to the first amplifier560. In some embodiments, at least one of the first amplifier560or the second amplifier570may be a class AB amplifier. In some other embodiments, at least one of the first amplifier560or the second amplifier570may be a class B amplifier.

Referring toFIG.5A, in some embodiments, a system (e.g., system500) may include a first amplifier560and a first resistor563coupled to an input terminal of the first amplifier560. The system500may include a second amplifier570and a second resistor573coupled to an input terminal of the second amplifier570. In some embodiments, each of the first resistor563and the second resistor573may be a variable resistor, a programmable resistor, or any resistor whose resistance can be set a particular value in a range of resistance. A first end of the first resistor563(e.g., left end of the first resistor563inFIG.5A) may be coupled to a first output terminal (Vout+) of the main line driver520to receive a first signal562(S1). A first end of the second resistor573(e.g., left end of the second resistor573inFIG.5A) may be coupled to a second output terminal (Vout−) of the main line driver520to receive a second signal572(S2). An output terminal of the second amplifier570may be coupled to a first terminal541of the interface540. An output terminal of the first amplifier560may be coupled to a second terminal542of the interface540. The first amplifier560may be configured to generate a current565(Iout_1), based at least on a voltage sensed from the first signal562(S1) and a resistance of the first resistor563, to supply an additional current to the second signal572(S2) traversing towards the interface540. The second amplifier570may be configured to generate a current575(Iout_2), based at least on a voltage sensed from the second signal572(S2) and a resistance of the second resistor573, to supply an additional current to the second signal572(S2) traversing towards the interface540. In some embodiments, at least one of the first resistor563or the second resistor573may be set (e.g., a resistance value of at least one of the first resistor563or the second resistor573is set) to cause the first amplifier560and the second amplifier570to output a particular range of output voltages, based at least on a voltage sensed from at least one of the first signal562(S1) or the second signal572(S2).

In some embodiments, a first end of a third resistor (e.g., left end of termination resistor531) may be coupled to a first output terminal (e.g., Vout+) of the main line driver520. A first end of a fourth resistor (e.g., left end of termination resistor532) may be coupled to a second output terminal (e.g., Vout−) of the main line driver520. A second end of the fourth resistor (e.g., right end of termination resistor532) and the output terminal of the first amplifier560may be coupled to the interface (e.g., the second terminal542of the interface540). A second end of the third resistor (e.g., right end of termination resistor531) and the output terminal of the second amplifier570may be coupled to the interface (e.g., the first terminal541of the interface540). In some embodiments, each of the third resistor (e.g., termination resistor531) and the fourth resistor (e.g., termination resistor532) may be coupled at an end of a respective transmission line coupled to the interface540.

Referring toFIG.5A, in some embodiment, a system (e.g., system500) may include circuitry (e.g., circuitry of an auxiliary line driver including resistors563,573, amplifiers560,570) configured to couple a first end of a first resistor (e.g., right end of first resistor563) to a first input terminal561(Vin+) of the auxiliary line driver, and couple a first end of a second resistor (e.g., right end of second resistor573) to a second input terminal571(Vin−) of the auxiliary line driver. In some embodiments, the auxiliary line driver may be one or more electronic amplifiers configured to amplify input voltage signals or current signals, or any circuit that can drive a load such as a transmission line or provide/push more current through a transmission line so as to enable a longer cable length. In some embodiments, the auxiliary line driver may include a plurality of line drivers. The circuitry may be configured to receive, at a second end of the first resistor (e.g., left end of first resistor563), a first signal562(S1). The circuitry may be configured to receive, at a second end of the second resistor (e.g., left end of second resistor573), a second signal572(S2). The circuitry may be configured to set at least one of the first resistor563or the second resistor573to cause the auxiliary line driver to output a predetermined range of output voltages, based at least on a voltage sensed from at least one of the first signal562(S1) or the second signal572(S2). In some embodiments, the line driver may include at least one of a class AB line driver or a class B line driver. In some embodiments, the second end of the first resistor (e.g., left end of first resistor563) may be coupled to a first output terminal of another line driver (e.g., first output terminal Vout+of the main line driver520). The second end of the second resistor (e.g., left end of second resistor573) may be coupled to a second output terminal of the other line driver (e.g., first output terminal Vout+of the main line driver520).

In some embodiments, a first end of a third resistor (e.g., right end of termination resistor532) and a first output terminal of the auxiliary line driver (e.g., output terminal of the first amplifier560) may be coupled to the interface540(e.g., the second terminal542of the interface540). A first end of a fourth resistor (e.g., right end of termination resistor531) and a second output terminal of the auxiliary line driver (e.g., output terminal of the second amplifier570) may be coupled to the interface540(e.g., the first terminal541of the interface540). A second end of the fourth resistor (e.g., left end of termination resistor531) may be coupled to the second end of the first resistor (e.g., left end of first resistor563). A second end of the third resistor (e.g., left end of termination resistor532) may be coupled to the second end of the second resistor (e.g., left end of first resistor573). In some embodiments, each of the third resistor532and the fourth resistor531may be coupled at an end of a respective transmission line coupled to the interface540. In some embodiments, the auxiliary line driver may be configured to generate a current (e.g., current565(Iout_1), current575(Iout_2)), based at least on (1) a voltage sensed from at least the first signal562(S1) or the second signal572(S2) and (2) at least one of a resistance of the first resistor563or a resistance of the second resistor573, to supply an additional current to at least one of the first signal562(S1) or the second signal572(S2).

FIG.6is a flow diagram showing a process600for providing a boost stage of a line driver, in accordance with an embodiment. In some embodiments, the process600is performed by a system, circuitry, or a line driver (e.g., system300,400,500, auxiliary line driver360,460, circuitry of auxiliary line driver including resistors563,573and amplifiers560,570). In other embodiments, the process600is performed by other entities. In some embodiments, the process600includes more, fewer, or different steps than shown inFIG.6.

At step602, the circuitry (e.g., circuitry of auxiliary line driver including resistors563,573and amplifiers560,570inFIG.5A) may receive, at a second end of a first resistor (e.g., left end of first resistor563), a first signal562(S1). A first end of the first resistor (e.g., right end of first resistor563) may be coupled to a first input terminal561(Vin+) of a line driver (e.g., an auxiliary line driver). In some embodiments, the line driver may include at least one of a class AB line driver or a class B line driver. In some embodiments, the second end of the first resistor (e.g., left end of first resistor563) may be coupled to a first output terminal of another line driver (e.g., first output terminal Vout+of the main line driver520).

At step604, the circuitry may receive, at a second end of a second resistor (e.g., left end of second resistor573), a second signal572(S2). A first end of the second resistor (e.g., right end of second resistor573) may be coupled to a second input terminal571(Vin+) of the auxiliary line driver. The second end of the second resistor (e.g., left end of second resistor573) may be coupled to a second output terminal of the other line driver (e.g., second output terminal Vout−of the main line driver520).

At step606, the circuitry may set, at least one of the first resistor563or the second resistor573to cause the auxiliary line driver to output a predetermined range of output voltages, based at least on a voltage sensed from at least one of the first signal562(S1) or the second signal572(S2).

In some embodiments, the auxiliary line driver may be one or more electronic amplifiers configured to amplify input voltage signals or current signals, or any circuit that can drive a load such as a transmission line or provide/push more current through a transmission line so as to enable a longer cable length. In some embodiments, the line driver may be a single fully differential amplifier. In some embodiments, the auxiliary line driver may generate a current (e.g., current565(Iout_1), current575(Iout_2)), based at least on (1) a voltage sensed from at least the first signal562(S1) or the second signal572(S2) and (2) at least one of a resistance of the first resistor563or a resistance of the second resistor573, to supply an additional current to at least one of the first signal562(S1) or the second signal572(S2). In some embodiments, a first end of a third resistor (e.g., right end of termination resistor532) and a first output terminal of the line driver (e.g., output terminal of the first amplifier560) may be coupled to an interface (e.g., interface540) to a physical medium. A first end of a fourth resistor (e.g., right end of termination resistor531) and a second output terminal of the auxiliary line driver (e.g., output terminal of the second amplifier570) may be coupled to the interface540(e.g., the first terminal541of the interface540). A second end of the fourth resistor (e.g., left end of termination resistor531) may be coupled to the second end of the first resistor (e.g., left end of first resistor563). A second end of the third resistor (e.g., left end of termination resistor532) may be coupled to the second end of the second resistor (e.g., left end of first resistor573). In some embodiments, each of the third resistor532and the fourth resistor531may be coupled at an end of a respective transmission line coupled to the interface540.

The term “coupled” and variations thereof includes the joining of two members directly or indirectly to one another. The term “electrically coupled” and variations thereof includes the joining of two members directly or indirectly to one another through conductive materials (e.g., metal or copper traces). Such joining may be stationary (e.g., permanent or fixed) or moveable (e.g., removable or releasable). Such joining may be achieved with the two members coupled directly with or to each other, with the two members coupled with each other using a separate intervening member and any additional intermediate members coupled with one another, or with the two members coupled with each other using an intervening member that is integrally formed as a single unitary body with one of the two members. If “coupled” or variations thereof are modified by an additional term (e.g., directly coupled), the generic definition of “coupled” provided above is modified by the plain language meaning of the additional term (e.g., “directly coupled” means the joining of two members without any separate intervening member), resulting in a narrower definition than the generic definition of “coupled” provided above. Such coupling may be mechanical, electrical, or fluidic.

It should be noted that certain passages of this disclosure can reference terms such as “first” and “second” in connection with subsets of transmit spatial streams, sounding frames, response, and devices, for purposes of identifying or differentiating one from another or from others. These terms are not intended to merely relate entities (e.g., a first device and a second device) temporally or according to a sequence, although in some cases, these entities can include such a relationship. Nor do these terms limit the number of possible entities that can operate within a system or environment. It should be understood that the systems described above can provide multiple ones of any or each of those components and these components can be provided on either a standalone machine or, in some embodiments, on multiple machines in a distributed system. In addition, the systems and methods described above can be provided as one or more computer-readable programs or executable instructions embodied on or in one or more articles of manufacture, e.g., a floppy disk, a hard disk, a CD-ROM, a flash memory card, a PROM, a RAM, a ROM, or a magnetic tape. The programs can be implemented in any programming language, such as LISP, PERL, C, C++, C#, or in any byte code language such as JAVA. The software programs or executable instructions can be stored on or in one or more articles of manufacture as object code. In some embodiments, the ADC is employed as an integrated circuit in a transmitter for wireless communication. The ADC is provided on an integrated circuit that includes the calibration engine. The ADC and calibration engine are provided in a single chip or multichip integrated package in some embodiments.

While the foregoing written description of the methods and systems enables one of ordinary skill to make and use embodiments thereof, those of ordinary skill will understand and appreciate the existence of variations, combinations, and equivalents of the specific embodiment, method, and examples herein. The present methods and systems should therefore not be limited by the above-described embodiments, methods, and examples, but by all embodiments and methods within the scope and spirit of the disclosure.