Laser light detection circuit

The invention provides a laser light detection circuit that prevents a peak output occurring when the circuit switches between the operation stop mode and the operation mode so as to prevent the breakdown or malfunction of the next-connected circuit. A laser light detection circuit has a differential amplifier that amplifies and outputs a signal corresponding to the intensity of laser light, a drive transistor having a base to which the output of the differential amplifier is applied, a second constant-current source connected to the emitter of the drive transistor, an output transistor having a base connected to the emitter of the drive transistor, a bypass transistor connected between the emitter of the drive transistor and the ground, and a control circuit. The control circuit forms a bypass current route from the second constant-current source to the ground through the bypass transistor by turning on the bypass transistor when the circuit switches from the operation stop mode to the operation mode.

CROSS-REFERENCE OF THE INVENTION

This application claims priority from Japanese Patent Application No. 2010-095011, the content of which is incorporated herein by reference in its entirety.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The invention relates to a laser light detection circuit that outputs an electric signal corresponding to the intensity of laser light.

2. Description of the Related Art

In recent years, optical discs such as CD (the abbreviation of a compact disc) is rapidly prevailing and leading in the multimedia age. A Blu-ray Disc using a blue-violet semiconductor laser is developed as a new generation of optical disc.

FIG. 6is a schematic view showing a structure of an optical disc device100. The optical disc device100includes a semiconductor laser1, a half mirror2, a laser light detection circuit3, a laser driver4, a microcomputer5, an optical disc6and a data readout device7.

Laser light generated by the semiconductor laser1is reflected by the half mirror2and travels to the surface of the optical disc6. The reflected light from the surface of the optical disc6is received by the data readout device7through the half mirror2. The data readout device7reads data stored in the optical disc6based on the received reflected light.

On the other hand, the laser light generated by the semiconductor laser1is received by the laser light detection circuit3through the half mirror2. The laser light detection circuit3is a circuit that outputs an electric signal corresponding to the intensity of laser light. In this case, the laser light detection circuit3outputs a pair of differential voltage signals, i.e., a first output voltage Vop and a second output voltage Von. The second output voltage Von corresponds to an inverted voltage of the first output voltage Vop relative to a reference voltage.

The laser driver4is a circuit that receives the first and second output voltages Vop, Von and controls the intensity of laser light of the semiconductor laser1corresponding to the voltage difference between these (Vop−Von). By the feedback control of the laser driver4, the intensity of laser light generated by the semiconductor laser1is controlled so as to be constant. This kind of optical disc device100is described in the Japanese Patent Application No. 2003-141767.

The optical disc device100having two modes of an operation stop mode (sleep mode) and an operation mode (active mode) has been developed. In this case, the microcomputer5outputs a mode switch signal for controlling switching between the operation stop mode and the operation mode. The laser light detection circuit3is set to either the operation stop mode or the operation mode in response to the mode switch signal from the microcomputer5.

However, as shown inFIG. 4, when the laser light detection circuit3switches from the operation stop mode to the operation mode, there occurs a problem that the first output voltage Vop of the laser light detection circuit3transiently increases to near the supply voltage Vcc (a peak output). (see a chain line curve inFIG. 4)

The laser driver4in the next stage to the laser light detection circuit3thus receives this peak output as an input voltage. Then the input voltage of the laser driver4exceeds the absolute maximum rating, and this may cause the breakdown or malfunction of the laser driver4. This problem may occur when the supply voltage of the laser light detection circuit3, e.g. 5V is higher than the supply voltage of the laser driver4, e.g. 3.3V.

The invention is to address the problem described above, and is directed to preventing a peak output occurring when a circuit switches between the operation stop mode and the operation mode so as to prevent the breakdown or malfunction of the next-connected circuit.

SUMMARY OF THE INVENTION

The invention provides a laser light detection circuit including: an amplifier amplifying an inputted signal corresponding to intensity of laser light and outputting the amplified signal; a first transistor having an input terminal to which the signal amplified by the amplifier is applied; a constant-current source connected to an output terminal of the first transistor; a second transistor having an input terminal connected to the output terminal of the first transistor; a bypass transistor connected between the output terminal of the first transistor and the ground; and a control circuit controlling the constant-current source and the bypass transistor so as to form a bypass current route from the constant-current source to the ground through the bypass transistor by starting the operation of the constant-current source and turning on the bypass transistor when the circuit switches from an operation stop mode to an operation mode.

DETAILED DESCRIPTION OF THE INVENTION

A laser light detection circuit3of an embodiment of the invention will be described referring to figures. Hereafter, the whole structure of the laser light detection circuit3will be described first, and the structure of an amplification circuit13in the output stage of the laser light detection circuit3, which is a main part of the invention, will be described next.

[Structure of Laser Light Detection Circuit3]

The laser light detection circuit3forms a part of an optical disc device100inFIG. 6.FIG. 1is a circuit diagram of the laser light detection circuit3. The laser light detection circuit3is made of an IC (Integrated Circuit), and this is a circuit that outputs an electric signal corresponding to the intensity of laser light. The laser light detection circuit3includes a photodiode10, a current voltage conversion circuit11, a front stage amplification circuit12, output stage amplification circuits (buffer amplifiers)13,14, output terminals15,16, and an input terminal17.

The photodiode10receives laser light generated by the semiconductor laser1inFIG. 6, and generates a current I1corresponding to the intensity of the laser light. The current voltage conversion circuit11is a circuit that converts the current I1to a voltage V1, and includes an operational amplifier18and a resistor19. A reference voltage Vref1is applied to the non-inverting input terminal of the operational amplifier18.

The resistor19is connected between the inverting input terminal and the output terminal of the operational amplifier18. Therefore, the voltage V1, that changes corresponding to the product of the current value of the current I1and the resistance value of the resistor19relative to the reference voltage Vref1, is generated at the output terminal of the operational amplifier18.

The front stage amplification circuit12is an amplification circuit that amplifies the voltage V1, and includes an operational amplifier20, resistors21,22, and a capacitor23. A reference voltage Vref2is applied to the non-inverting input terminal of the operational amplifier20. The resistor21is connected between the output terminal of the operational amplifier18and the inverting input terminal of the operational amplifier20. The resistor22is connected between the inverting input terminal and the output terminal of the operational amplifier20.

The capacitor23is a capacitor that limits the frequency band of the amplification circuit12, and is connected between the inverting input terminal and the output terminal of the operational amplifier20. The direct current gain of the amplification circuit12is R2/R1.

Therefore, the operational amplifier20operates as an inverting amplification circuit that inverts and amplifies the voltage V1by the gain R2/R1. Since the reference voltage Vref2is applied to the non-inverting input terminal of the operational amplifier20, the voltage V2at the output terminal changes relative to the reference voltage Vref2.

The amplification circuit13in the output stage is a buffer amplifier and outputs a first output voltage Vop generated by amplifying the voltage V2by a predetermined gain to the output terminal15. The amplification circuit14outputs a second output voltage Von generated by inverting and amplifying the voltage V2by a predetermined gain to the terminal16. In other words, the voltage V2is differentially amplified at the amplification circuits13,14. In this case, the second output voltage Von corresponds to an inverted voltage of the first output voltage Vop relative to a reference voltage Vref3.

The laser light detection circuit3is set to either the operation stop mode (sleep mode) or the operation mode (active mode) in response to a mode switch signal from a microcomputer5inFIG. 6. In detail, the mode switch signal from the microcomputer5is applied to the laser light detection circuit3through the input terminal17. For example, when the mode switch signal is L level, the operational amplifiers18,20and the amplification circuits13,14are set to the operation stop mode, and these circuits stop operating. When the mode switch signal is H level, the operational amplifiers18,20and the amplification circuits13,14are set to the operation mode, and these circuits operate.

FIG. 2is a circuit diagram of the amplification circuit13in the output stage of the laser light detection circuit3. The amplification circuit13includes a differential amplifier30(an example of the “amplifier” of the invention) including PNP type transistors TR1, TR2and NPN type transistors TR3, TR4, a first constant-current source31, a second constant-current source32(an example of the “constant-current source” of the invention), a third constant-current source33, a PNP type drive transistor TR5(an example of the “first transistor” of the invention), an NPN type drive transistor TR6, an NPN type output transistor TR7(an example of the “second transistor” of the invention), a PNP type output transistor TR8, a bypass transistor TR9made of an N-channel type MOS transistor, a power control signal generation circuit34, a bias signal generation circuit35, a switch control circuit36, a power supply line40supplying the supply voltage Vcc to the circuit elements described above, resistors38,39and an output terminal15. The power control signal generation circuit34, the bias signal generation circuit35and the switch control circuit36are an example of the “control circuit” of the invention.

The transistors TR3, TR4of the differential amplifier30form a pair of differential input transistors, and the voltage V2of the output terminal of the amplification circuit12inFIG. 1is applied to the base of the transistor TR3. The base of the transistor TR4is connected to the emitters of the output transistors TR7, TR8through the resistor38, and the reference voltage Vref3is applied to the base of the transistor TR4through the resistor39.

The first constant-current source31is connected to the emitters of the transistors TR3, TR4of the differential amplifier30, and supplies an operation current to the differential amplifier30. The second constant-current source32is connected between the emitter of the drive transistor TR5and the power supply line40. The third constant-current source33is connected between the emitter of the drive transistor TR6and the ground.

The emitter of the drive transistor TR5is connected to the base of the output transistor TR7. The emitter of the drive transistor TR6is connected to the base of the output transistor TR8. The emitters of the output transistors TR7, TR8are commonly connected to the output terminal15. An external load resistor37is a load resistor provided outside the laser light detection circuit3(e.g. a resistor of about 1 MΩ which a measurement probe has), and is connected between the output terminal15and the ground.

The bypass transistor TR9is connected between the connection node of the emitter of the drive transistor TR5and the second constant-current source32and the ground.

The power control signal generation circuit34is formed so as to generate and output a power control signal PS in response to the mode switch signal from the microcomputer5. The bias signal generation circuit35is formed so as to generate a bias signal BIS for controlling the switching of the first constant-current source31, the second constant-current source32and the third constant-current source33in response to this power control signal PS.

The amplification circuit13is set to the operation stop mode when the bias signal BIS is H level. At this time, the supply voltage Vcc is supplied to the power supply line40, but the first constant-current source31, the second constant-current source32and the third constant-current source33stop operating. In other words, the current values of the first constant-current source31, the second constant-current source32and the third constant-current source33are set to “0”. By this, the differential amplifier30, and the drive transistors TR5, TR6becomes in the operation stop state (off state).

When the bias signal BIS turns from H level to L level, the amplification circuit13switches from the operation stop mode to the operation mode. By this, the first constant-current source31, the second constant-current source32and the third constant-current source33start operating. In other words, the current values of the first constant-current source31, the second constant-current source32and the third constant-current source33are set to a constant value except “0”. In response to this, the differential amplifier30, the drive transistors TR5, TR6start operating.

Furthermore, the switch control circuit36generates a switch control signal SWS that is a pulse signal for controlling the switching of the bypass transistor TR9in response to the power control signal PS. The switch control signal SWS is supplied to the gate of the bypass transistor TR9. When the switch control signal SWS is H level, the bypass transistor TR9turns on, and when the switch control signal SWS is L level, the bypass transistor TR9turns off.

The switch control signal SWS turns from L level to H level immediately when the power control signal PS turns from L level to H level as shown inFIG. 3, and turns from H level to L level after a predetermined time. This switch control signal SWS may be made by a timer circuit or a CR time constant circuit based on the power control signal PS.

With the structure of the amplification circuit13described above, when the circuit13switches from the operation stop mode to the operation mode, the bypass transistor TR9keeps the on state for a predetermined period to form a bypass current route from the second constant-current source32to the ground through the bypass transistor TR9. Therefore, the base current of the output transistor TR7is limited, and the phenomenon that the first output voltage Vop of the output terminal15transiently increases to near the supply voltage Vcc, i.e. the peak output is prevented.

By this, the input voltage of the laser driver4next connected to the laser light detection circuit3is limited to below the absolute maximum rating, thereby preventing the breakdown or malfunction of the laser driver4.

(a) An operation example of the amplification circuit13when it switches from the operation stop mode to the operation mode will be described referring toFIGS. 3 and 4.

When the power control signal PS turns from L level to H level, the switch control signal SWS turns from L level to H level. Then the bypass transistor TR9turns on. Furthermore, the bias signal BIS turns from H level to L level. Then the first to third constant-current sources31,32,33start operating.

At this time, there may occur a case where the second constant-current source32starts operating earlier while the drive transistor TR5is in the off state. For example, this case may occur when the operation start of the first constant-current source31is later than that of the second constant-current source32by a difference in wiring delay in transmitting the bias signal BIS.

In this case, the current I2of the second constant-current source32does not flow in the drive transistor TR5that is in the off state, and flows toward the base of the output transistor TR7. However, at this time, since the bypass transistor TR9turns on, the bypass current route from the second constant-current source32to the ground through the bypass transistor TR9is formed.

It is preferable to turn on the bypass transistor TR9before the second constant-current source32starts operating since this effectively limits the current I2of the second constant-current source32flowing in the base of the output transistor TR7.

The forming of the bypass current route decreases the current flowing in the base of the output transistor TR7from the second constant-current source32, and decreases the emitter current of the output transistor TR7. As a result, as shown by a solid line curve inFIG. 4, the peak output of the first output voltage Vop of the output terminal15is prevented. When the drive transistor TR5starts operating after then, the switch control signal SWS turns from H level to L level, and the bypass transistor TR9turns off. By this, the amplification circuit13turns to the ordinary operation mode.

On the other hand, since the bypass transistor TR9is not provided in an amplification circuit13A of a comparison example inFIG. 7, when the drive transistor TR5is in the off state and the second constant-current source32starts operating, all of the current I2of the second constant-current source32flows in the base of the output transistor TR7. As a result, a large emitter current I3flows in the output transistor TR7, and this emitter current I3flows in the external load resistor37. Therefore, as shown by a chain line curve inFIG. 4, the peak output of the first output voltage Vop of the output terminal15occurs.

(b) Next, an operation example of the amplification circuit13when it switches from the operation mode to the operation stop mode will be described referring toFIG. 5.

When the power control signal PS turns from H level to L level, the switch control signal SWS turns from L level to H level. Then the bypass transistor TR9turns on. Furthermore, the bias signal BIS turns from L level to H level. Then the first to third constant-current sources31,32,33stop operating.

At this time, there may occur a case where the drive transistor TR5turns off earlier while the second constant-current source32is still operating.

In this case, the current I2of the second constant-current source32does not flow in the drive transistor TR5that is in the off state, and flows toward the base of the output transistor TR7. However, at this time, since the bypass transistor TR9turns on before the second constant-current source32stops operating, the bypass current route from the second constant-current source32to the ground through the bypass transistor TR9is formed. By this, in the similar manner, the peak output of the first output voltage Vop of the output terminal15is prevented.

On the other hand, since the bypass transistor TR9is not provided in the amplification circuit13A of the comparison example inFIG. 7, when the drive transistor TR5turns off while the second constant-current source32is operating, the peak output of the first output voltage Vop of the output terminal15occurs for the reason described above.

Although the amplification circuit13of the laser light detection circuit3is described in the embodiment, the amplification circuit14as an inverting amplification circuit may have the same structure. Furthermore, the bypass transistor TR9is not limitedly made of a MOS transistor, and may be made of other switching device such as a bipolar transistor.

A laser light detection circuit of the invention prevents a peak output when a circuit switches between the operation stop mode and the operation mode and limits the input voltage of the next-connected circuit to below the absolute maximum rating, thereby preventing the breakdown or malfunction of the circuit.