Audio frequency power amplifiers with actively damped filter

An inverter for an audio amplifier. The inverter comprises a current damping feedback loop for actively damping oscillations caused by an output inductor within the inverter. A forward compensator is provided to compensate for the frequency response of the actively damped filter. The resulting inverter generates an output voltage that tracks an input voltage thereof with improved frequency response within the frequency range of interest.

TECHNICAL FIELD 
The present invention relates to the amplification of audio frequency 
signals and, more particularly, to filters used in switch mode converters 
of a tracking power supply. 
BACKGROUND OF THE INVENTION 
To reduce dissipation losses in the output stage, most audio frequency 
amplifiers comprise a class B or AB amplifier. A conventional class B or 
AB amplifier comprises a pair of emitter-coupled output transistors 
configured in a push-pull arrangement. The audio frequency signal is 
applied to the bases of these output transistors and the amplified audio 
frequency signal is present at the emitters thereof. In a conventional 
push-pull amplifier, the collector of one of the output transistors is 
connected to a fixed positive DC voltage to provide a current source and 
the collector of the other of the output transistors is connected to a 
fixed negative DC voltage to provide a current sink. The positive and 
negative DC voltages are commonly referred to as the source and sink 
voltages, respectively. 
With a reactive load, the entire fixed voltage is present across the 
amplifying transistor of a class B or AB amplifier when current flows to 
the load, yielding high dissipation losses. These losses are particularly 
high with high dynamic range signals such as music signals. Accordingly, 
while more efficient than a pure class A amplifier, class B and AB 
amplifiers still exhibit significant dissipation losses with resistive 
loads and exhibit considerably greater losses with reactive loads. At the 
high power levels of modern audio amplifiers, these dissipation losses 
require the use of numerous expensive high power semiconductors in 
parallel and also that extensive steps be taken to cool the output 
transistors. 
To obtain higher efficiencies, class D amplifiers have also been proposed 
as audio amplifiers. Class D amplifiers comprise a power transistor, a low 
pass filter, and a freewheeling diode or rectifier in parallel with the 
low pass filter. The power transistor is switched on and off according to 
a high frequency square wave signal the pulse width of which is modulated 
according to the audio frequency signal to be amplified. The filter then 
recovers the audio frequency signal by filtering off the high frequency 
square wave signal. The class D amplifier achieves high efficiencies by 
delivering current only when substantially zero volts are present across 
the power transistors. 
While significantly more efficient than a class B or AB amplifier, a class 
D amplifier has high distortion that cannot be easily be corrected with 
negative feedback because of the phase shift introduced by the low pass 
filter. Further, the low pass filter tends to interact with the load in an 
undesirable fashion. Also, because of the relatively high frequencies 
involved, class D amplifiers are subject to radiation problems. Finally, 
class D amplifiers exhibit poor power supply rejection and thus are highly 
susceptible to power supply disturbances. For these and other reasons, 
class D amplifiers have not been used in commercial audio amplifiers. 
Two other classes of high efficiency audio frequency amplifiers have been 
proposed to increase the efficiency of output transistors arranged in a 
push-pull configuration. These amplifiers are referred to as class G and 
class BD amplifiers and employ adaptive power supplies for generating 
source and sink voltages for a push-pull amplifier. These adaptive power 
supplies generate source and sink voltages that increase and decrease as 
the audio frequency signal increases and decreases. The basic idea with 
these amplifiers is to provide high voltage to the push-pull amplifier 
only when the audio frequency signal is high. As an audio frequency signal 
developed from a musical source is normally relatively low with infrequent 
high bursts, class G and BD amplifiers used as audio amplifiers normally 
maintain the voltage across the power transistors at a low level, thereby 
greatly reducing the average power dissipation of the output transistors. 
A class G amplifier normally comprises a push-pull amplifier and a stepped 
power supply that generates source and sink voltages that are increased 
and decreased in two or three discrete steps as the power requirement of 
the signal being amplified increases and decreases. Such an amplifier is 
disclosed, for example, in U.S. Pat. No. 4,484,150 to Carver and U.S. Pat. 
No. 3,961,280 to Sampei. 
A class BD amplifier conventionally comprises a pair of highly efficient 
class D amplifiers to provide signal tracking source and sink voltages to 
a push-pull amplifier. Class BD amplifiers are generally discussed in the 
following articles: (a) The Class BD High-Efficiency RF Power Amplifier 
dated June 1977 and written by Frederick H. Raab; and (b) An Amplifier 
With A Tracking Power Supply dated Nov. 5, 1973, and written by V. M. 
Kibakin. 
The present invention is particularly useful when implemented in the 
context of audio amplifiers containing tracking power supplies, and that 
application will be discussed in detail herein. However, the present 
invention has broader application as will become apparent from the 
following detailed discussion. Accordingly, the scope of the present 
invention should be determined according to the claims appended hereto and 
not the following detailed discussion. 
Tracking power supplies can be classified as envelope trackers, 
rail-to-ground trackers, and rail-to-rail trackers; the present invention 
may be used to advantage in each of these configurations. 
Exemplary envelope trackers are disclosed in U.S. Pat. No. 3,426,290 issued 
4 Feb. 1969 to Jensen, U.S. Pat. No. 4,218,660 issued 19 Aug. 1980 to 
Carver, and, more recently, U.S. Pat. No. 5,075,634 issued 24 Dec. 1991 to 
French. 
Rail-to-ground tracking power supplies are disclosed in U.S. Pat. No. 
4,054,843 issued 18 Oct. 1977 to Hamada, U.S. Pat. No. 4,409,559 issued 11 
Oct. 1983 to Amada, an article published by the Audio Engineering Society 
in 1981 entitled A HIGH EFFICIENCY AUDIO POWER AMPLIFIER (Nakagaki and 
Amada), and U.S. Pat. No. 4,507,619 issued 26 Mar. 1985 to Dijkstra. 
Rail-to-rail tracking power supplies are disclosed in U.S. Pat. No. 
4,087,759 issued 2 May 1978 to Iwamatsu, U.S. Pat. No. 4,472,687 issued 18 
Sep. 1984 to Kashiwagi et al., and U.S. Pat. No. 5,200,711 issued 6 Apr. 
1993 to Andersson et al. 
In an amplifier having any one of these three types of tracking power 
supplies, the collector-emitter voltage across the amplifying transistor 
will ideally remain substantially constant at a low value. The basic 
advantage of all types of tracking power supplies is thus that dissipation 
losses in the amplifying transistor are reduced. Additionally, in tracking 
power supplies, dissipation losses of the amplifying device are ideally 
kept low for both resistive and reactive loads. 
A tracking power supply in a class BD amplifier will thus in general reduce 
by varying degrees the dissipation of the output transistors relative to 
the dissipation of the output transistors in a pure class B or AB 
amplifier. Rail-to-rail tracking power supplies are theoretically the most 
efficient, while envelope tracking power supplies are the least efficient 
of the three types of tracking power supplies. Rail-to-ground and 
rail-to-rail tracking power supplies will also have the additional 
advantage of reducing the voltage rating requirements of the output 
transistors. 
As mentioned, in theory the most efficient of the various amplifier 
configurations having tracking power supplies is the rail-to-rail tracking 
power supply. However, despite the potential advantages theoretically 
obtainable by using a rail-to-rail tracking power supply, no commercially 
available amplifier exists that uses a rail-to-rail tracking power supply 
as described above. 
In related U.S. patent application Ser. No. 08/154,739 assigned to the 
Assignee of this application, and now U.S. Pat. No. 5,396,194, the 
Applicants recognized that prior art amplifiers having signal tracking 
powers supplies do not precisely track the signal being amplified; 
instead, the source and sink supply voltages deviate from their 
theoretical levels under the following conditions: (a) high frequency 
audio signals; (b) open circuit or light loads; (c) certain reactive 
loads; (d) asymmetric signals; and/or (e) high offset voltages. This 
deviation of the actual source and sink supply voltages from the ideal 
source and sink voltages of a tracking power supply is referred to as 
floating. 
The '739 application further recognized that this floating occurs because, 
under the conditions described above, insufficient current flows through 
the amplifying transistor to pull the supply voltage towards the reference 
when the audio frequency signal being tracked moves towards the reference. 
In particular, a class BD amplifier comprises a class B or AB output stage 
and a power supply containing source and sink output filters, each output 
filter comprising an inductor and an output capacitor. When little or no 
current is being drawn by the output stage, no current flows back through 
the inductors of the output filters to discharge the output capacitors. 
The source and sink voltages thus tend to hang or float until the output 
devices begin to draw current to discharge the output capacitors. The 
difference between the floating source supply voltage and the plunging 
sink supply voltage can become very large, and this large voltage 
difference can last from one cycle of the audio frequency signal to the 
next cycle thereof. 
The large voltage across the output stage caused by floating can result in 
high dissipative losses in the output devices and thus requires high power 
transistors with a large safe operation area. The large voltages that can 
momentarily develop across the amplifier output stage also require that 
the transistors have a high breakdown voltage. Without high dissipative 
capacity and high breakdown voltage, the likelihood that the output 
devices will fail under the conditions during which floating occurs is 
greatly increased. 
The '739 application thus proposed an audio frequency amplifier comprising 
a signal tracking power supply having at least one output filter and 
further comprising discharge means for discharging an output capacitor of 
the power supply output filter, thereby ensuring that the source supply 
voltage follows the audio frequency signal back down and/or that the sink 
supply voltage follows the audio frequency signal back up after the slope 
of the audio frequency signal changes signs. 
Discharge means as described in the '739 application will guarantee that 
the source and sink supply voltages will not float. This results in a 
predetermined maximum voltage value across the output stage. Therefore, by 
setting this predetermined maximum voltage value at a lot level, low 
voltage devices can be used in the output stage of a rail-to-rail tracking 
power supply and, to a lesser extent, of a rail-to-ground tracking power 
supply. 
OBJECTS OF THE INVENTION 
From the foregoing, it should be apparent that a primary object of the 
present invention is to obtain a design for a highly efficient audio 
frequency power amplifier having a tracking power supply. 
Another more specific object of the present invention is no obtain an audio 
frequency amplifier having a favorable mix of the following 
characteristics: 
a. low distortion; 
b. low thermal dissipation; 
c. light weight; 
d. high power; 
e. allows a rail-to-rail tracking amplifier to be commercially viable; 
f. allows elimination of a high voltage preamplifier; and 
g. low manufacturing costs through the use of low voltage components having 
a relatively small safe operation area throughout the output stage. 
Other objects of the present invention will become apparent from the 
following detailed description of the invention. 
SUMMARY OF THE INVENTION 
The Applicants have recognized that, while discharge means as described in 
the '739 application can lock the source and sink supply voltages together 
to prevent the voltage difference across the output stage from exceeding a 
predetermined maximum value, phase error in the overall frequency response 
of the system can cause the the supply voltages to vary from the signal 
being tracked, resulting in a distorted output signal. This problem is 
especially acute at high frequencies because the resonant frequency of the 
inductor used in the output filter of the tracking power supply is 
relatively close to the highest frequency of interest of the system. 
Therefore, while the discharge means disclosed in the '739 application can 
guarantee that the source and sink supply voltages will track the output 
signal, these supply voltages may be slightly offset from the output 
signal due to phase shift introduced by the power supply output filter. 
To overcome the problem in frequency response caused by the power supply 
output filter, the present invention provides a class BD amplifier 
comprising: (a) an output stage for amplifying an input voltage to obtain 
an amplified output signal; (b) a tracking power supply having an output 
filter comprising an inductor and a capacitor; (c) an active damping 
control circuit for actively damping oscillations in the power supply 
output filter; and (d) a compensation circuit for compensating for the 
frequency response of the actively damped output filter. 
The operation of an amplifier so constructed can perhaps best be explained 
using the terminology employed in control theory to describe a pole-zero 
diagram. In this context, the inductor in the power supply output filter 
results in two poles being placed on the pole-zero diagram; these poles 
are equally spaced above and below the .sigma.-axis and lie fairly close 
to the j.omega.-axis. This arrangement of poles is inherently unstable, as 
it does not take much for these poles to move into the right half of the 
s-plane. 
The active damping control circuit effectively damps oscillations in the 
filter to move the poles contributed by the inductor onto the .sigma.-axis 
and away from the right half of the s-plane. Because the two poles 
contributed by the actively damped inductor now lie on the .sigma.-axis, 
they can easily be compensated for by the compensating circuit. In 
particular, the compensating circuit places two zeros on top of the two 
poles contributed by the actively damped inductor to cancel the effect of 
these poles. The result is a single remaining pole located on the 
pole-zero diagram near the origin; this remaining pole is contributed by 
the error amplifier. Such a system provides a stable, nearly flat 
frequency response within the frequency range of interest. 
To the extent that the zeroes provided by the compensating circuit are 
misaligned with the poles contributed by the actively damped output 
filter, this misalignment provides only a small, acceptable amount of 
variation in the frequency response of the system. In contrast, without 
the damping of the filter oscillations provided by the active damping 
control circuit, the poles contributed by the filter inductor are very 
difficult to cancel. In the undamped case, even slight misalignment 
between the poles contributed by the inductor and the zeroes contributed 
by the compensation circuit can result in severe stability problems in the 
overall frequency response of the system that may lead to ringing or even 
self-sustaining oscillations. 
The present invention is of particular importance in the context of a 
tracking power supply of an audio amplifier; however, the concept of 
actively damping the filter and then compensating for the actively damped 
filter has broader application in any system where the frequency response 
of the output filter must be stable and flat. 
Additionally, the present invention is described herein in the context of a 
second order conventional filter. The principles of the present invention 
may be applied to more complex filters using a state variable approach.

DETAILED DESCRIPTION OF THE INVENTION 
Referring to the drawing, depicted at 20 in FIG. 1 is a block diagram of an 
exemplary complete converter constructed in accordance with, and 
embodying, the principles of the present invention. 
The complete converter 20 basically comprises an offset circuit 22, a first 
summer 24, a forward compensator block 26, a damped converter block 28, 
and a unity gain feedback amplifier 30. The damped converter block 28 
itself basically comprises a second summer 32, a forward gain block 34, 
and a low pass filter 36. An input voltage V.sub.I, a positive raw supply 
voltage V+, and a negative raw supply voltage V- are present at input 
terminals 38, 40, and 42, respectively, while an output voltage V.sub.O is 
present at an output terminal 44. 
The offset circuit 22 in the exemplary complete converter 20 is set to 
provide a positive predetermined voltage offset to the input voltage 
V.sub.I. 
The forward gain block 34 comprises a modulator circuit 46, a gate driver 
circuit 48, a gate 50, and a freewheeling diode 52. The input to the 
forward gain circuit 34 is a current damping loop error voltage V.sub.EI. 
Based on this error voltage V.sub.EI, the modulator circuit 46 opens and 
closes the gate 50 through the gate driver circuit 48 to obtain a low pass 
filter input voltage V.sub.F, 
The low pass filter 36 comprises an output inductor 54, an output capacitor 
56, and an instrumentation amplifier 58. High frequency components of the 
low pass filter input voltage V.sub.F generated by the forward gain block 
are removed by the low pass filter 36 to obtain the output voltage 
V.sub.O. The instrumentation amplifier 58 generates a current damping loop 
feedback voltage V.sub.IS indicative of the resonant current within the 
output capacitor 56; the second summer 32 adds the current damping loop 
feedback voltage V.sub.IS to a current damping loop input signal V.sub.II 
to obtain the current damping loop error voltage V.sub.EI. 
The feedback amplifier 30 generates a voltage loop feedback voltage 
V.sub.FV based on the output voltage low pass filter input voltage. The 
first summer 24 adds the voltage loop feedback voltage V.sub.FV to the 
input voltage V.sub.I to obtain a voltage loop error voltage V.sub.EV. 
This voltage loop error voltage V.sub.EV is passed through the forward 
compensation block 26 to obtain the current damping loop input voltage 
V.sub.II. 
Accordingly, the complete converter 20 as shown in FIG. 1 basically 
comprises two feedback loops: (a) an inner or secondary loop 60 including 
the forward gain block 34, the low pass filter 36, and the second summer 
32; and (b) an outer or primary loop 62 including the forward compensator 
block 26, the damped converter block 28, and the feedback amplifier 30. 
The inner feedback loop 60 varies the current damping loop error voltage 
V.sub.EI based on the resonant current flowing through the output 
capacitor 56 to actively damp oscillations within the filter 36. Stated 
alternatively, the output inductor 54 contributes two poles that lie in 
the left half of the s-plane; these poles are spaced above and below the 
.sigma.-axis adjacent to the j.omega.-axis. The active damping introduced 
by the inner feedback loop 60 causes the poles contributed by the output 
inductor 54 to move away from the right half of the s-plane onto the 
.sigma.-axis. The resulting damped converter 28 thus contributes two poles 
that lie well within the left half of the s-plane on the .sigma.-axis. 
Without this active damping, the frequency response of the low pass filter 
36 results in loop instability because the resonant frequency of the 
output inductor 54 is relatively close to the highest frequency of 
interest. 
The forward compensator block 26 in the outer feedback loop forward 
compensates for the frequency response of the damped converter block 28. 
More particularly, the forward compensator block 26 results in a zero 
being placed on top of each the two poles contributed by the damped 
converter 28 as described above. Since the two poles contributed by the 
damped converter 28 lie on the .sigma.-axis, the two zeros contributed by 
the forward compensator block need not be exactly aligned with the two 
poles contributed by the converter 28; any slight misalignment between 
these poles and zeros will result in a slight but acceptable variation in 
frequency response within the frequency range of interest. 
The outer feedback loop 62 is constructed in a conventional manner such 
that the modulator circuit 46 varies the widths of the pulses that form 
the low pass filter input voltage V.sub.F to cause the output voltage 
V.sub.O to track the input voltage V.sub.I. The feedback amplifier 30 
contributes a single zero on the .sigma.-axis at or near the origin. 
Because of the offset provided by the offset circuit 22, the output 
voltage V.sub.O will thus track the input voltage V.sub.I but will be 
offset above the input voltage by the predetermined voltage offset. 
As the poles contributed by the filter 36 have been actively damped by the 
inner loop 60 and cancelled by the zeros contributed by the forward 
compensator block 26, the transfer function of the complete converter 20 
thus comprises a single zero at or near the origin, resulting in an 
essentially flat frequency response within the frequency range of 
interest. 
Referring now to FIG. 2, a typical operating environment of the complete 
converter 120 will be described in further detail. Depicted at 120 in FIG. 
2 is an exemplary amplifier having a power supply 122 incorporating source 
and sink converters 122 and 124. The source converter 122 is formed by the 
complete converter 20 shown in FIG. 1; the sink converter 122 is in all 
respects the same as the complete converter 20 except that: (a) the 
positions of the gate 50 and freewheeling diode 52 are exchanged; and (b) 
the offset circuit 22 is set to provide a negative predetermined offset 
voltage to the input voltage V.sub.I. The positive and negative 
predetermined offset voltages will usually, although not necessarily, be 
the same. 
The amplifier 120 drives a load 128 and further comprises a linear 
amplifier 130 and a discharge element 132. The power supply 122 further 
comprises conventional positive and negative direct current power sources 
134 and 136. The linear amplifier 130 is a conventional class AB amplifier 
comprising a pair of transistors arranged in a push-pull configuration. 
The discharge element 132 is connected across the linear amplifier 130 to 
discharge the output capacitors within the source and sink converters 124 
and 126 and thus reduce floating of these signals. Examples of the linear 
amplifier 130, discharge element 132, and direct current power sources 134 
and 136 were discussed in detail in the Applicants' copending U.S. patent 
application Ser. No. 08/154,739, which is incorporated herein by 
reference. 
The signal names employed above with reference to FIG. 1 will be used 
consistently in the following discussion of FIG. 2, with further 
definition being provided when necessary to distinguish between signals 
associated with the source converter 124 and the sink converter 126. The 
positive raw supply signals V+ and V- described above are generated by the 
positive and negative direct current power sources 134 and 136, 
respectively. 
As shown in FIG. 2, a signal INPUT is applied to an input terminal 138 of 
the linear amplifier 130. A signal OUTPUT generated by the linear 
amplifier 130 is present at an output terminal 140. The OUTPUT signal is 
used as the input voltage V.sub.I(SOURCE) and V.sub.I(SINK) to the source 
and sink converters 124 and 126. As the output voltages V.sub.O(SOURCE) 
and V.sub.O(SINK) of the converters 124 and 126 will track, with offset, 
the signals V.sub.I(SOURCE) and V.sub.I(SINK) input thereto, these output 
voltages V.sub.O(SOURCE) and V.sub.O(SINK) will track the OUTPUT signal 
but will be offset above and below the OUTPUT signal by the positive and 
negative predetermined offset voltage. 
FIG. 3 depicts the relationships of the signals V+, V-, V.sub.O(SOURCE), 
V.sub.O(SINK), and OUTPUT. The discharge element 132 maintains the 
difference between the signals V.sub.O(SOURCE) and V.sub.O(SINK) and the 
converter circuits 124 and 126 containing the actively damped and forward 
compensated filter 36 ensure that no phase shift occurs between the 
signals V.sub.O(SOURCE) and OUTPUT or between the signals V.sub.O(SINK) 
and OUTPUT with the frequency range of interest. The elimination of 
floating and phase shift ensures that the proper voltage drop is present 
across the linear amplifier 130 to allow this amplifier 130 to function 
properly. 
The theory of operation of the complete converter 20 shown in FIG. 1 will 
now be explained in further detail with reference to FIGS. 4-12. 
FIGS. 4-10 show the transfer functions in the frequency domain and 
pole-zero diagrams for the complete converter 20 and various components 
and sub-components thereof. FIGS. 11 and 12 depict signal flow diagrams 
representing the damped converter 28 and the complete converter 20, 
respectively. 
FIGS. 4A and 4B depict the operating characteristics of the low pass filter 
36. As shown, this filter 36 contributes two poles 220 and 222 (FIG. 4B) 
which result in a frequency response curve 224 thereof having a peak 226 
in the frequency domain at a resonant frequency f.sub.o (FIG. 4B). The 
resonant frequency f.sub.o is determined by the characteristics of the 
inductor 54. The transfer function T.sub.LP and admittance Y.sub.F of the 
filter 36 are set forth in the following equations (1) and (2), 
respectively: 
##EQU1## 
The situation in which the filter 36 is included undamped and uncompensated 
for in a feedback loop is depicted in FIGS. 5A and 5B. The feedback loop 
adds a pole 228 at or near the origin. The frequency response curve 230 of 
the undamped and uncompensated for filter within a feedback loop contains 
a peak 232 in the frequency domain at the resonant frequency f.sub.o. The 
highest frequency of interest is indicated at f.sub.i in FIG. 4A-12A. In 
an audio amplifier, the highest frequency of interest is normally 20 kHz. 
So that the audio signal may be tracked accurately, the inductor 54 is 
selected such that its resonant frequency f.sub.o is approximately 60-100 
kHz. Accordingly, the resonant frequency f.sub.o is relatively close to 
the highest frequency of interest f.sub.i and must be that way if the 
converters 124 and 126 art to track accurately. 
This arrangement described in relation to FIGS. 5A and 5B results in a 
significant deviation at the highest frequency of interest f.sub.i between 
the actual frequency response curve and the desired frequency response 
curve indicated by dashed lines at 234; this deviation is shown at 236 in 
FIG. 5A and results in unacceptable phase shift in the tracking signal at 
the output of the filter 36. As shown by dotted lines 238 and 240 in FIG. 
3, shifting the phase of the converter output voltages V.sub.O(SOURCE) and 
V.sub.O(SINK) can result in these signals crossing over the audio signal 
being amplified. Such phase shift will thus prevent proper operation of 
the linear amplifier 130. 
The inner feedback loop 60 described above actively damps the oscillations 
at the resonant frequency f.sub.o and results in the damped converter 28 
having a frequency response curve 242 as depicted in FIG. 6A. This 
frequency response curve 242 is flat out to the resonant frequency 
f.sub.o, at which point it drops with a slope of -2. As shown in FIG. 6B 
and described in detail below, this active damping effectively moves the 
two poles 220 and 222 contributed by the filter 36 away from the right 
half of the s-plane and onto the .sigma.-axis. 
Referring for a moment to FIG. 11A, depicted therein is a signal flow 
diagram representing the damped converter 28. This diagram may be 
simplified as shown in FIGS. 11B-D to obtain the following Equation (1): 
##EQU2## 
Given Equations (1) and (2) above, Equation (3) can be solved to obtain the 
damped converter gain T.sub.DC : 
##EQU3## 
With 
##EQU4## 
we have critical damping, and the gain T.sub.DC of the damped converter 
becomes 
##EQU5## 
Once the filter has been damped as just described, the forward compensator 
26 can be provided to the system. The gain T.sub.FC of the forward 
compensator block 26 is as follows: 
##EQU6## 
Accordingly, as shown in FIG. 7B, the forward compensator block 26 
contributes two zeroes 244 and 246 on the .sigma.-axis that coincide with 
the two poles 220 and 222 contributed by the damped converter 28. The 
frequency response curve of the forward compensator block 26 is shown at 
248 in FIG. 7A. This frequency response curve has a slope of -1 below the 
resonant frequency f.sub.o and a slope of +1 above the resonant frequency 
f.sub.o. 
The frequency response curve of the forward compensator block 26 and the 
damped converter 28 together is shown at 250 in FIG. 8A. The slope of the 
frequency response curve 250 is -1. As shown in FIG. 8B, the zeroes 246 
and 248 cancel the poles 220 and 222. As will be explained in detail 
below, the zeroes 246 and 248 may be slightly misaligned with the poles 
246 and 248 without adversely affecting the output of the complete 
converter 20. 
Integrating the forward compensator 26 and damped converter 28 together 
into the complete converter 20 results in the signal flow diagram shown in 
FIG. 12A. By simplifying the diagram in FIG. 12A as shown in FIG. 12B-D, 
the following equation (8) is obtained: 
##EQU7## 
By substituting into equation (8) the gain T.sub.FC of the forward 
compensator 26 (equation 7) and the gain T.sub.DC of the damped converter 
28 (equation 6) and simplifying, we obtain the following Equation (9) 
defining the gain T.sub.CC of the complete converter 20: 
##EQU8## 
It should be recognized that the damped converter has a gain of 1/k.sub.B 
and a bandwidth .omega..sub.C of 1/k.sub.B k.sub.F T.sub.F. The 
application of the complete converter 20 into the signal tracking power 
supply 122 of the audio amplifier 120 requires a gain of 1. Therefore, 
k.sub.B =1 and .omega..sub.C =1/k.sub.F T.sub.F. 
FIG. 9A depicts the open loop frequency response curve 252 of the complete 
converter 20, while FIG. 10A depicts the closed loop frequency response 
curve 254 of the complete converter 20. The open loop frequency response 
curve 252 has a slope of -1 and a magnitude of 1 at a roll-off frequency 
f1. When the loop is closed, the frequency response curve 254 is flat with 
unity gain out to the roll-off frequency f1, at which point the curve 254 
has a slope of -1. 
If the zeroes 244 and 246 are slightly misaligned with the poles 220 and 
222, the frequency response curve 254 may have a perturbation at the 
resonant frequency f0; however, this perturbation will be slight and is 
insignificant below the highest frequency of interest fi. The result is 
that the frequency response of the complete converter will be flat within 
the entire frequency range of interest, resulting in little or no phase 
shift even near the highest frequency of interest. 
Referring now to FIGS. 13-16, the details of construction of the exemplary 
complete converter 20 will be described. The modulator block 46 is 
depicted in detail in FIG. 13. The gate driver 48, gate 50, freewheeling 
diode 52, and low pass filter 36 are depicted in detail in FIG. 14. The 
forward compensator 26 is described in further detail in FIG. 15. FIG. 16 
depicts the transfer function of the forward compensator 26 in further 
detail. 
Referring initially to FIG. 13, the modulator block 46 basically comprises 
a triangle generator 320 and a comparator circuit 322. The triangle 
generator 320 generates a triangle wave signal the amplitude of which 
varies in proportion to the difference between the raw supply voltages V+ 
and V-. Under heavy loads, these voltages V+ and V- tend to droop. Unless 
compensated for, this droop will cause a deviation in the gain of the 
inner loop 60 that will result in the loop becoming unstable. By varying 
the amplitude of the triangle wave, the triangle generator 320 compensates 
for the droop of the raw supply voltages V+ and V- and thereby maintains 
the gain of the inner loop 60 at 1. 
The triangle generator 320 operates basically as follows. An amplifier 324 
and its associated resistors 326-336 generate a voltage signal that is a 
scaled down version of the differential voltage between the raw supply 
voltages V+ and V-. Based on the output of the amplifier 324, an amplifier 
338, diode 340, transistor 342, and resistor 344 generate a current signal 
that is also proportional to the differential voltage between the raw 
supply signals V+ and V-. 
A clock signal CLK opens and closes transistors 346 and 348 alternately; 
when the transistor 348 is opened, the current signal generated at the 
emitter of the transistor 342 charges a capacitor 350; when the transistor 
346 is opened, transistors 352, 354, and 356 are operated to provide a 
path for discharging the capacitor 350. Accordingly, the voltage across 
the capacitor 350 forms the triangle wave signal discussed above. 
The rate at which the capacitor 350 is charged and discharged is determined 
by the amplitude of the current signal generated by the transistor 342. 
The charge/discharge rate of the capacitor 350 determines the amplitude of 
the triangle signal developed thereacross. Thus, the amplitude of the 
triangle voltage signal developed across the capacitor 350 varies in 
proportion to the differential voltage between the raw supply voltages V+ 
and V-. 
The remaining components shown in FIG. 13 facilitate the operation of the 
components described above and will be discussed herein only briefly. A 
resistor 352 and diodes 354 and 356 shift the voltage applied to the bases 
of the transistors 346 and 348 to an appropriate level. Diodes 358 and 360 
form a clamp that limits the differential voltages across the resistors 
346 and 348. A resistor 362 limits input current, and a capacitor 364 
eliminates DC offset. Resistors 366 and 368 set the center of the triangle 
wave and prevent floating. A transistor 370 is configured as an 
emitter-follower to obtain a low output impedance. Resistors 372 and 374 
damp parasitic oscillations, and resistors 376 and 378 set the quiescent 
current of the transistor 370. 
The triangle voltage signal generated by the triangle generator 320 is 
applied to a - terminal of comparator 380. The current damping loop error 
voltage V.sub.EI is applied to the negative terminal of the comparator 
380. The output of the comparator 380 is a pulse-width modulated drive 
signal .phi., where the widths of the pulses that comprise the drive 
signal .phi. varies based on the magnitude of the current damping loop 
error voltage V.sub.EI. 
As shown in FIG. 14, the drive signal .phi. turns ON and OFF MOSFETs 420 
and 422 through the gate driver 48. These MOSFETs 420 and 424 are arranged 
in parallel to form the gate 50. The number of MOSFETs employed depends 
upon the power rating of the amplifier in which the complete converter 20 
is used. 
The drive signal .phi. is applied to the gate drive circuit 48. In 
particular, the gate drive circuit 48 comprises a gate driver 424, a 
resister 426, and capacitors 428, 430, 432, and 434. The gate driver 424 
provides the gate drive voltage and current necessary to turn ON and OFF 
the MOSFETs 420 and 422 that form the gate 50. The resistor 548 forces the 
driver 424 to generate to turn the MOSFETs 420 and 422 OFF should an open 
circuit occur across the gate driver 424. The capacitors 428-434 are 
supply bypass capacitors that provide a low impedance path to ground for 
any high frequency signals present on the supply voltage for the gate 
driver 424. A resistor 436 is provided for the MOSFET 420 and a resistor 
438 is provided for the MOSFET 422 to damp parasitic oscillations. 
FIG. 14 further depicts that the freewheeling diode 52 can actually 
comprise two diodes 440 and 442 in parallel depending upon the power 
rating of the amplifier. 
A current sense resistor 544 is provided in series with the output 
capacitor 56. A voltage V.sub.SENSE developed across the sense resistor 
544 is proportional to the current through the output capacitor 56. 
Referring now to FIG. 15, shown in detail therein is the instrumentation 
amplifier 58. The instrumentation amplifier 58 generates a voltage 
V.sub.IS at its output based on the voltage V.sub.SENSE at its input. In 
particular, the voltage V.sub.SENSE is applied across transistors 520 and 
522; these transistors 520 and 522 form a differential transconductor that 
causes differential output currents to flow through resistors 524 and 526. 
These differential output currents are proportional to the differential 
voltage V.sub.SENSE. An amplifier 528 and its associated resistors 530 and 
532 converts the differential output currents into the current damping 
loop feedback voltage V.sub.IS. So obtained, the current damping loop 
feedback voltage V.sub.IS is proportional to the resonant current flowing 
through the output capacitor 56. 
The current damping loop feedback voltage V.sub.IS is applied to one input 
of an operational amplifier 534. This operational amplifier 534 and it 
associated resistors 536, 538, and 540 form the second summer 32. 
The remaining components shown in FIG. 15 facilitate the operation of the 
components described above and will be described herein only briefly. 
Transistor 542 and resistors 544, 546, and 548 form a current source to 
bias the resistors 520 and 522. Resistors 550 and 552 provide local 
degeneration. Resistors 554 and 556 and diodes 558-568 provide overvoltage 
protection. Capacitors 570 and 572 allow high frequency signals to bypass 
the resistors 554 and 556. 
The forward compensator 26 will now be explained in further detail with 
reference to FIG. 16. The compensator 26 comprises first and second 
operational amplifiers 620 and 622, first and second capacitors 624 and 
626, and first through seventh resistors 628-640. Also shown in FIG. 16 is 
a zener diode 642 that forms the offset circuit 22. It should also be 
noted that the function of the first adder 24 is inherent in the operation 
of the exemplary compensator 26 shown in FIG. 16. 
Perhaps the best way to explain the operation of the circuit shown in FIG. 
16 is by referencing the elements thereof to corresponding portions of the 
transfer function thereof. The transfer function for the circuit shown in 
FIG. 16 is shown in FIG. 17. 
In particular, FIG. 17 shows that the overall frequency response curve of 
the compensator 26 as shown at 248 in FIG. 7A is actually comprised of two 
separate curves 720 and 722. The first curve 720 is associated with the op 
amp 620 and is comprised of segments A, B, C, and D, while the second 
curve 722 is associated with the op amp 622 and is comprised of segments 
E, F, and G. 
Segment A is contributed by resistors 630 and 632. Segment B is contributed 
by resistor 632 and capacitor 624. Segment C is contributed by resistors 
632 and 628. Segment D is due to the op amp 620 running out of gain at 
higher frequencies. Segment E is contributed by resistors 634 and 636. 
Segment F is contributed by resistor 634 and capacitor 626. Segment G is 
contributed by resistor 28 and resistor 638. It should be noted that the 
juncture of segments B and C should be a factor of 5 above the loop 
bandwidth. 
Because the it is used as a voltage follower, the exemplary complete 
complete converter 20 employs two separate and distinct ground referencing 
schemes to simplify the implementation thereof. 
In particular, the first scheme is employed in the block diagrams shown in 
FIGS. 1 and 2. The ground shown in FIGS. 1 and 2 ground is connected to 
the common or center tap of the main supply. VI, VF, VO, V+, and V- are 
always referred to this first ground. 
The second grounding scheme is employed in the control circuitry and is 
indicated by a triangle symbol instead of the symbol using three short 
lines. This second ground is connected to the input, VI. The second 
summer's input voltages VI and VFV are referred to the first ground, but 
its output VEV is referred to the second ground. The subsequent signals 
VII, VEI, and VIS are also referred to the second ground. 
The use of these two separate grounding schemes is not essential to 
practice the present invention but significantly simplifies the 
implementation of the present invention. 
From the forgoing, it should be clear that the present invention may be 
embodied in forms other than described above. The above-described example 
is therefore to be considered in all respects illustrative and not 
restrictive, the scope of the invention being indicated by the appended 
claims rather than the foregoing description. All changes that come within 
the meaning and scope of the claims are intended to be embraced therein.