System for relieving stress and improving heat management in a 3D chip stack having an array of inter-stack connections

The present disclosure provides a system and method for relieving stress and providing improved heat management in a 3D chip stack of a multichip package. A stress relief apparatus is provided to allow the chip stack to adjust in response to pressure, thereby relieving stress applied to the chip stack. Additionally, improved heat management is provided such that the chip stack adjusts in response to thermal energy generated within the chip stack to remove heat from between chips of the stack, thereby allowing the chips to operate as desired without compromising the performance of the chip stack. The chip stack also includes an array of flexible conductors disposed between two chips, thereby providing an electrical connection between the two chips.

BACKGROUND

1. Technical Field

The present invention relates generally to micro-electromechanical systems (MEMS) and, more specifically, to a system and method for relieving stress and optimizing heat management in a three dimensional (3D) chip stack.

As consumer demand increases for smaller multi-function devices, manufacturers face significant challenges to integrate different semiconductor technologies on a single die. Multichip packages such as, for example, 3D chip stacks, have become increasingly popular to increase device density and to combine traditionally incompatible technologies, such as logic, analog, memory, and MEMS. One of the major challenges facing multichip packages is stress applied to its components. One element contributing to the stress of the components is packaging designs implementing a fixed-distance chip stack. The stress resulting from the fixed-distance chip stack may warp the components and may even cause physical damage to the chip stack. Many conventional multichip package designs have attempted to alleviate stress by implementing a mechanically flexible interconnection (MFI) such as, for example, using a through silicon via (TSV). However, known MFIs are required to maintain a constant vertical alignment between chips to maintain electrical connection and provide stress relief. However, due to this alignment restriction, known MFIs only relieve stress in a vertical direction and are susceptible to loss of connection as a result of cross-directional, horizontal movement between the chips.

Another adverse condition facing the components of a multichip package is heat generated through use of the multichip package. Heat generated in chip stacks is known to cause the multichip package to malfunction. As such, heat management may be implemented to alleviate the heat in the chip stack. However, known methods of heat management such as, for example, thermal throttling, respond to the detection of an overheating chip stack by reducing the power to the chip stack or reducing the speed at which the chip stack is running Accordingly, current methods of heat management limit the performance of the chip stack and are, therefore, undesirable.

SUMMARY

The present disclosure provides a system and method for relieving stress and providing improved heat management in a 3D chip stack of a multichip package.

In an embodiment of the present disclosure, stress is relieved in a 3D chip stack through the use of a stress relief apparatus. The stress relief apparatus responds to pressure applied to the chip stack by adjusting the positioning of the chips to thereby relieve stress applied to the chip stack.

In another embodiment of the present disclosure, improved heat management is provided in a 3D chip stack by implementing heat sink walls disposed along the outside surfaces of the chips of the 3D chip stack and an elastic thermal material disposed between the heat sink walls and the chips of the chip stack. The elastic thermal material receives heat generated within the chip stack, causing the elastic thermal material to expand locally. The expansion of the elastic thermal material adjusts the positioning of the chip stack, thereby allowing the heat to transfer from the elastic thermal material to the heat sink walls where it is absorbed and removed from the chip stack.

In another embodiment of the present disclosure, stress is relieved in a 3D chip stack through the use of a stress relief apparatus, and signals are transmitted between the chips through an array of inter-stack connections, also referred to herein as flexible conductors. The stress relief apparatus responds to pressure applied to the chip stack by adjusting the positioning of the chips to thereby relieve stress applied to the chip stack.

The foregoing and other features and advantages of the present disclosure will become further apparent from the following detailed description of the embodiments, read in conjunction with the accompanying drawings. The detailed description and drawings are merely illustrative of the disclosure, rather than limiting the scope of the invention as defined by the appended claims and equivalents thereof.

DETAILED DESCRIPTION OF THE DRAWINGS

The present disclosure provides a system and method for relieving stress and providing improved heat management in a 3D chip stack of a multichip package. The 3D chip stack is comprised of two or more chips, wherein a chip may comprise a substrate and other components known in the art such as, for example, metallization layers, circuitry, bonding pads, through silicon vias, etc. In embodiments of the present disclosure, stress relief and improved heat management are generally provided, at least in part, by a stress relief apparatus having adjusting functionality. One of the advantages of implementing the stress relief apparatus is that the circuitry located within the chip may be distributed as desired without affecting the stress relief apparatus or its adjusting functionality. Accordingly, stress relief may be provided for a chip stack while maintaining the preferred design and functionality of each chip.FIG. 1illustrates an overhead view of an example chip100, wherein the circuitry105is shown on the surface of the chip100. In some embodiments, the circuitry105may optionally be electrically coupled to a stress relief apparatus110as shown inFIG. 1. The stress relief apparatus110shown inFIG. 1is a general representation of any embodiment as described herein or defined by the claims attached hereto.

FIG. 2illustrates an overview of a first example embodiment of the present disclosure, wherein stress relief is provided in a stack200comprised of an upper chip202and a lower chip204. In the embodiment illustrated inFIG. 2, a stress relief apparatus206(otherwise referred to herein as an “apparatus”) provides a coupling between the upper chip202and the lower chip204. In some embodiments, the stress relief apparatus206may be comprised of a single unit, or may be comprised of multiple units combined to form the apparatus206. As is further explained in the multiple embodiments below, the stress relief apparatus206is generally disposed within a central region208of the chip stack200, such that the location and design of the stress relief apparatus206facilitate movement of at least one of the chips202and204in response to pressure exerted on the stack200. The stress relief apparatus206may be designed to permit movement of one or both of the chips202and204in any direction (not just vertically or horizontally) to alleviate the pressure and, thus, relieve stress applied to the chip stack200. Additionally, in some embodiments of the present disclosure, the stress release apparatus206may provide an electrical connection between the upper chip202and the lower chip204, and may even be combined with additional flexible conductors to allow multiple electrical connections between the chips in the stack.

The stress relief apparatus206may comprise multiple elements and arrangements as illustrated and described in the multiple embodiments provided throughout the present disclosure. However, it should be understood that the multiple embodiments provided herein are merely examples, and that the example embodiments are not intended to limit the stress relief apparatus, or any other elements of the disclosure, to a specific embodiment. As such, various modifications and additions to the disclosed embodiments may be made without departing from the scope of the invention as defined by the appended claims.

FIGS. 3A and 3Billustrate an example embodiment of the present disclosure, wherein a chip stack300is shown to comprise an upper chip302, lower chip304, and a “ball-and-rod” stress relief apparatus306. The “ball-and-rod” apparatus306illustrated inFIGS. 3A and 3Bmay be comprised of a single unit, or may be comprised of multiple units such as a “rod” unit308and a “ball” unit310combined to form the “ball-and-rod” apparatus306. The stress relief apparatus306may be disposed, at least partially, within recesses312(shown inFIG. 3Aas upper recess312A and lower recess312B) embedded (for example, via etching) within the lower surface314of the upper chip302and the upper surface316of the lower chip304. As such, the recesses312may be designed to conform to an end of a stress relief apparatus306. For example, the upper recess312A conforms to the “rod” end of the apparatus306, while the lower recess312B conforms to the “ball” end of the apparatus306. In some embodiments, such as the one illustrated inFIGS. 3A and 3B, the upper chip302may include an upper through silicon via (TSV)318, wherein the upper recess312A embedded within the upper chip302may be embedded within the upper TSV318. Additionally, the lower chip304may include a lower TSV320, wherein the lower recess312B embedded within the lower chip304may be embedded within the lower TSV320.

As illustrated inFIG. 3B, the stress relief apparatus306may be positioned such that the “rod” section308of the apparatus306is disposed within the upper recess312A and is in direct contact with the upper TSV318, and the “ball” section310of the apparatus306is disposed within the lower recess312B and is in direct contact with the lower TSV320. In some embodiments, this positioning may facilitate an electrical connection between the upper chip202and the lower chip204through the upper TSV318, apparatus306, and lower TSV320while also providing stress relief for the chip stack200. In other embodiments, recesses may be embedded in the substrate, a metallization layer, bonding pad, or any other material located on the surface of a chip.

FIG. 4illustrates the example embodiment shown inFIGS. 3A and 3B, wherein pressure400applied to the upper chip302is relieved by the stress relief apparatus306. In accordance with the present disclosure, and as illustrated inFIG. 4, the stress relief apparatus306facilitates adjusting the positioning of the chip stack300in response to the pressure400by permitting movement of the upper chip302and/or lower chip304to relieve stress applied to the chip stack300by the pressure400. Specifically, the pressure400applied to the chip stack300forces the apparatus306to rotate within the lower recess312B, thereby tilting the upper chip302and relieving the stress exerted on the stack300by the pressure400.

FIG. 5illustrates another example embodiment wherein a chip stack500is comprised of an upper chip510, middle chip520, and lower chip530. As illustrated inFIG. 5, a stress relief apparatus similar to that shown inFIGS. 3A,3B, and4, is provided between each of the chips510,520, and530. In the embodiment shown inFIG. 5, the upper chip510includes a recess515embedded in the lower surface511of the upper chip510, wherein the recess515conforms to the “ball” end of an apparatus506. The middle chip520includes a recess525embedded in the upper surface521of the middle chip520, wherein the recess525conforms to the “rod” end of the apparatus506. The middle chip520further includes another recess527embedded in the lower surface522of the middle chip520, wherein the recess527conforms to the “rod” end of an apparatus516. The lower chip530illustrated inFIG. 5includes a recess535embedded in the upper surface531of the lower chip530, wherein the recess535conforms to the “ball” end of the apparatus516.

The embodiment illustrated inFIG. 5may provide stress relief from pressure applied simultaneously in multiple directions. For example, a downward pressure540exerted on the upper chip510and an upward pressure550exerted on the lower chip530stress the chip stack500. Stress is relieved through the repositioning of the chips as they move about the stress relief apparatuses506and516to which they are respectively coupled. In the embodiment shown inFIG. 5, the downward pressure540applied to the chip stack500forces the upper chip510to rotate about the rounded “ball” end of the apparatus506, thereby tilting the upper chip510and relieving the stress exerted on the stack500by the downward pressure540. Additionally, the upward pressure550forces the lower chip530to rotate about the “ball” end of the apparatus516, thereby tilting the lower chip530and relieving the stress exerted on the stack500by the upward pressure550.

FIG. 6illustrates an example embodiment of the present disclosure similar to the embodiment illustrated inFIG. 5.FIG. 6illustrates a chip stack600comprised of an upper chip610, middle chip620, lower chip630, a first stress relief apparatus606disposed between the upper chip610and the middle chip620, and a second stress relief apparatus616disposed between the middle chip620and the lower chip630. In the embodiment shown inFIG. 6, the upper chip610includes a recess615embedded in the lower surface611of the upper chip610, wherein the recess615conforms to the “rod” end of the apparatus606. The middle chip620includes a recess625embedded in the upper surface621of the middle chip620, wherein the recess625conforms to the “ball” end of the apparatus606. The middle chip620further includes another recess627embedded in the lower surface622of the middle chip620, wherein the recess627conforms to the “ball” end of the apparatus616. The lower chip630illustrated inFIG. 6includes a recess635embedded in the upper surface631of the lower chip630, wherein the recess635conforms to the “rod” end of the apparatus616.

The embodiment illustrated inFIG. 6is similar to that illustrated inFIG. 5, in that the embodiment inFIG. 6may provide stress relief from pressure applied simultaneously in multiple directions. For example, as shown inFIG. 6, a downward pressure640exerted on the upper chip610and an upward pressure650exerted on the lower chip630stress the chip stack600. The stress is relieved through the repositioning of the chips as they move about the stress relief apparatuses606and616to which they are respectively coupled. In the embodiment shown inFIG. 6, the downward pressure640applied to the chip stack600tilts the upper chip610and forces the apparatus606to rotate within the recess625, thereby relieving the stress exerted on the stack600by the downward pressure640. Additionally, the upward pressure650tilts the lower chip630and forces the apparatus616to rotate within the recess627, thereby relieving the stress exerted on the stack600by the upward pressure650. Although it is not illustrated inFIG. 6, the stress relief apparatuses606and616may also allow the positioning of the middle chip620to be adjusted to relieve stress applied to the chip stack600.

In the embodiment illustrated inFIG. 7, a chip stack700is comprised of an upper chip710, middle chip720, lower chip730, a first stress relief apparatus706disposed between the upper chip710and the middle chip720, and a second stress relief apparatus716disposed between the middle chip720and the lower chip730. The upper chip710includes a recess715embedded in the lower surface711of the upper chip710, wherein the recess715conforms to the “rod” end of apparatus706. The middle chip720includes a recess725embedded in the upper surface721of the middle chip720, wherein the recess725conforms to the “ball” end of the apparatus706. The middle chip720further includes another recess727embedded in the lower surface722of the middle chip720, wherein the recess727conforms to the “rod” end of the apparatus716. The lower chip730illustrated inFIG. 7includes a recess735embedded in the upper surface731of the lower chip730, wherein the recess735conforms to the “ball” end of the apparatus716.

The embodiment illustrated inFIG. 7is similar to those illustrated inFIGS. 5 and 6, in that the embodiment inFIG. 7may provide stress relief from pressure applied simultaneously in multiple directions. In the example shown inFIG. 7, a downward pressure740exerted on the upper chip710, an upward pressure750exerted on the lower chip730, and a horizontal pressure760exerted on the middle chip720apply stress to the chip stack700. The stress is relieved through the repositioning of the chips as they move about the stress relief apparatuses706and716to which they are respectively coupled. In the embodiment shown inFIG. 7, the downward pressure740applied to the chip stack700tilts the upper chip710and forces the apparatus706to rotate within the recess725, thereby relieving the stress exerted on the stack700by the downward pressure740. The upward pressure750tilts the lower chip730, forcing it to rotate about the round end of the apparatus716, thereby relieving the stress exerted on the stack700by the upward pressure750. Additionally, the horizontal pressure760applied to the middle chip720displaces the middle chip720along the direction of the horizontal pressure760, thereby causing the apparatus706to rotate within the recess725, which also causes the upper chip710to tilt even more and also become displaced along a horizontal direction opposite the horizontal pressure760. Additionally, the horizontal displacement of the middle chip720also relieves stress applied to the chip stack700by causing the ball end of apparatus716to rotate within the recess735, which may cause the lower chip730to tilt even more and also become displaced along a horizontal direction opposite the horizontal pressure760. The foregoing displacement of the middle chip720relieves stress applied to the chip stack700.

It should be understood that the scope of the invention is not limited to the embodiments disclosed herein. As such, portions of the disclosed embodiments may be combined to generate additional embodiments without departing from the scope of the present disclosure. Additionally, the manner in which the adjusting is shown and/or described is not meant to limit the invention in any way to one particular direction or manner of adjusting. Pressure may be applied to any chip(s) from any angle or direction, and any chip(s) may be permitted by a stress relief apparatus to be tilted, rotated, horizontally displaced, vertically displaced, or otherwise adjusted in any direction, thereby relieving pressure applied to the chip stack.

The combination of chips, recesses, and stress relieving apparatuses provided in the text and figures are not meant to limit the invention to a particular configuration. As such, a stress relief apparatus may be disposed in a recess that is located within any component located on the surface of the chip such as, for example, a TSV, metallization layer, bonding pad, or any other material located on the surface of the chip, including the substrate. Additionally, any recess, apparatus, and chip configuration may be implemented without limiting the apparatus to a “ball-and-rod” apparatus, and without limiting the recess to coupling or conforming to a “ball” end or a “rod” end. Accordingly, the stress relief apparatus may have ends of various sizes and shapes, and the recesses may be designed to accommodate any shape or size of any end of an apparatus with any fit, as described below. Additionally, some stress relief apparatuses may be designed to provide a particular range of motion, wherein the range of motion may be determined by the size, shape, design, and/or fit of the apparatus within a recess. In some embodiments, various ranges of motion may be provided by apparatuses having joints that couple the ends of an apparatus as illustrated inFIGS. 8-11.

The example embodiments of the disclosed stress relief apparatuses shown inFIGS. 8-11are provided to illustrate apparatuses, and accompanying recesses, of various sizes and shapes. Additionally, the apparatuses provide various ranges of motion by using different joints to create a couple between the ends of the apparatuses (as mentioned above, apparatuses may comprise a single unit or may be comprised of multiple units coupled to form the apparatus).FIGS. 8A and 8Billustrate a stress relief apparatus810having a first rod end815disposed within a first recess820in an upper chip825and a second rod end830disposed within a second recess835in a lower chip840, wherein an ellipsoid ball-and-socket joint850provides a couple between the first and second rod ends815and830.FIGS. 9A and 9Billustrate a stress relief apparatus910having a first rod end915disposed within a first recess920in an upper chip925and a second rod end930disposed within a second recess935in a lower chip940, wherein a gliding hinge joint950provides a couple between the first and second rod ends915and930.FIGS. 10A and 10Billustrate a stress relief apparatus1010having a first rod end1015disposed within a first recess1020in an upper chip1025and a second rod end1030disposed within a second recess1035in a lower chip1040, wherein a pivot joint1050provides a couple between the first and second rod ends1015and1030.FIGS. 11A and 11Billustrate an apparatus1110having a first rod end1115disposed within a first recess1120in an upper chip1125and a second rod end1130disposed within a second recess1135in a lower chip1140, wherein a saddle joint1150provides a couple between the first and second rod ends1115and1130. Although an end of an apparatus shown in some of the above embodiments may have a cross-sectional shape of a circle, it should be understood that the cross-sectional shape of an end of any apparatus, and any recess conforming to any apparatus provided within the present disclosure, is not limited to any one size or shape and may include, but is not limited to, a circle, rectangle, oval, triangle, hexagon, star, toroid, torus, etc.

It should be noted that there may be multiple fits created by bonding or adhering an end of an apparatus within the recess of a chip. One such fit includes an interference fit1205, as shown inFIG. 12A, wherein an end of an apparatus1206is disposed within a recess such that the end of the apparatus1206may be allowed limited movement within the recess, thereby limiting movement of the chip1202relative to the position of the end of the apparatus1206. Another fit includes a loose fit1210, as illustrated generally inFIG. 12B, whereby the recess and/or apparatus1206are designed such that an end of the apparatus1206is loosely fitted within the recess, thereby permitting greater movement of the end of the apparatus1206within the recess to accommodate movement of the chip1202or1204relative to the position of the end of the apparatus1206. Although in some embodiments it may be preferable to use one fit over another, any fit may be used with any of the embodiments provided within the present disclosure.

Multiple embodiments and variations of the stress relief apparatus may be used within a single chip stack. Since various embodiments of the stress relief apparatus may offer different ranges of motion, particular stress relief apparatuses may be combined for a number of reasons such as, for example, to optimize the spatial relationship between chips in a chip stack. For example,FIGS. 13A and 13Billustrate example embodiments of chip stacks1300A and1300B, wherein inFIG. 13Aan upper chip1310is coupled to a middle chip1320by a stress relief apparatus1325having a saddle joint1327, and the middle chip1320is coupled to a lower chip1330by a stress relief apparatus1335having a gliding hinge joint1337. InFIG. 13B, multiple upper chips1312A,1312B, and1312C are each coupled to a lower chip1322by respective stress relief apparatuses1338A,1338B, and1338C, having a saddle joint1327, gliding hinge joint1337, and ellipsoid ball-and-socket joint1339, respectively. In accordance with these example embodiments, the chip manufacturer may choose to utilize different stress relief apparatuses (1325,1335,1338A,1338B, and1338C) to provide different ranges of motion between the chips in the chip stacks1300A and1300B. It should be understood that the combinations of stress relief apparatuses provided in these example embodiments are not limited to those illustrated inFIGS. 13Aor13B. As such, any combination of stress relief apparatuses may be implemented within a chip stack without departing from the scope of the present disclosure. Also, in accordance with the example embodiment illustrated inFIG. 13B, multiple adjacent chips such as, for example, upper chips1312A,1312B, and1312C may be electrically coupled to each other through various means including, but not limited to, a wire bond1341or an electrical connection provided between the adjacent chips1312A,1312B, and1312C and the lower chip1322.

Another embodiment of the present disclosure provides improved heat management in a 3D chip stack.FIG. 14provides an example embodiment of a chip stack1400implementing an example stress relief apparatus1410as provided in an example embodiment described above, wherein improved heat management is provided by implementing heat sink walls1420disposed along the outside surfaces of the chips1430and an elastic thermal material1440disposed between the heat sink walls1420and chips1430of the chip stack1400. The heat sink walls1420are designed to absorb or conduct thermal energy, and may be generally comprised of a heat-absorbing, or thermally-conductive, material such as, for example, ceramic-based paint offering thermal radiation characteristics for heat dissipation. The elastic thermal material1440is generally comprised of a thermally-reactive material that expands locally in response to an increase in temperature. Examples of an elastic thermal material1440may include sol-gel prepared materials such as, for example, Silica xerogels and Aerogels. It should be understood that the heat sink walls and elastic thermal material are not limited to the example materials provided above.

In one embodiment, improved heat management may be provided as illustrated inFIG. 15. Thermal energy1510(otherwise referred to herein as heat) produced by the circuitry (not shown) on the chips1430causes at least a portion of the elastic thermal material1440to expand at the location at which the heat is received by the elastic thermal material1440. The local expansion of the elastic thermal material1440adjusts the positioning of the chip stack1400to allow the heat1510generated by the circuitry to transfer from the elastic thermal material1440disposed between the chips1430to the heat sink walls1420where it is dissipated from the chip stack1400. Because the heat generated by the circuitry is removed from between the chips1430through the adjusting of the chip stack1400and subsequent dissipation by the heat sink walls1420, thermal throttling is unnecessary, and thus, the circuitry is able to operate as desired without sacrificing performance of the chip stack1400. In addition to providing improved heat management, the embodiment illustrated inFIGS. 14 and 15is operable to provide stress relief by adjusting the position of the chip stack1400in response to pressure, as described in accordance with the foregoing embodiments. Accordingly, the example embodiment provided herein provides stress relief within the chip stack1400while also allowing for improved heat dispersion management by removing heat from the chip stack without sacrificing performance.

It should be appreciated by those of ordinary skill in the art that improved heat management is not limited to the embodiment illustrated inFIGS. 14 and 15. In fact, improved heat management may be applied to any of the embodiments and stress relief apparatuses disclosed herein without departing from the spirit and scope of the present disclosure as defined by the claims below. One such example embodiment is illustrated inFIG. 16, wherein a chip stack1600includes an upper chip1610coupled to a middle chip1620by a stress relief apparatus1625having a saddle joint1627, and a lower chip1630coupled to the middle chip1620by a stress relief apparatus1635having an ellipsoid ball-and-socket joint1637. Additionally, the chip stack1600incorporates improved heat management through the implementation of heat sink walls1640disposed along the outside surfaces of the chips1610,1620and1630, and elastic thermal material1650disposed between the chips in accordance with the foregoing discussion.

In yet another embodiment of the present disclosure, signals may be communicated through the chips in a chip stack through an array of inter-stack connectors, or flexible conductors, connected between two chips, as illustrated inFIG. 17.FIG. 17illustrates an example embodiment in accordance with the present disclosure, wherein multiple flexible conductors1750are disposed in an array between chips1710in a chip stack1700. In some embodiments, as shown inFIG. 17, the ends of some or all of the flexible conductors1750may be connected to a component located within the chip1710such as for example, a TSV1720, the chip substrate, or other circuitry located within the chip1710. Additionally, the ends of some or all of the flexible conductors1750may be connected to a component located on the surface of a chip1710such as, for example, a bonding pad1730, a metallization layer1740, or other circuitry located on the surface of a chip1710. Flexible conductors1750are designed to adjust with the chips1710to which they are connected while also conducting an electrical signal between two chips1710. Flexible conductors1750may include a conductive spring such as, for example, a coil spring, leaf spring, or the like, or, the flexible conductors1750may even include carbon nanotubes (CNT). In addition to using flexible conductors1750, an electrical signal may be conducted between two chips1710via the stress relief apparatus1706. It should be appreciated by one of ordinary skill in the art that the flexible conductors1750may be incorporated in any of the embodiments provided herein without departing from the scope of the present disclosure.

FIG. 18A-18Bare provided to illustrate a cross-sectional view of an example electronic package1800incorporating one or more of the embodiments provided throughout the present disclosure, wherein the electronic package1800is installed on a circuit board1810. InFIG. 18A, the electronic package1800is illustrated to show an example chip stack comprised of an upper chip1802A connected to a lower chip1804A by an example stress relief apparatus1806A, wherein the lower chip1804A is connected to the circuit board1810by bonding pads1808, and the upper chip1802A is connected to the circuit board1810via wire bonding1812. In the example embodiment illustrated inFIG. 18B, the electronic package1800comprises an upper chip1802B connected to a middle chip1804B by an example stress relief apparatus1806B, and the middle chip1804B is connected to a lower chip1814B by a second example stress relief apparatus1816B and flexible conductors1818. The electronic package1800illustrated inFIG. 18Bfurther comprises heat sink walls1820and thermal elastic material1822. In the example embodiment illustrated inFIG. 18B, the upper chip1802B is connected to the circuit board1810via wire bonding1812, the lower chip1814B is connected to the circuit board1810via bonding pads1808, and the middle chip1804B communicates with the circuit board1810through the flexible conductors1818and the lower chip1814B. The example embodiments illustrated inFIGS. 18A and 18Bare provided to illustrate an example electronic package incorporating one or more of the embodiments provided throughout the present disclosure. As such, it should be understood that any of the embodiments provided herein may be similarly incorporated in an electronic package without departing from the spirit and scope of the present disclosure and defined in the claims below.