Load control device having a wide output range

A load control device (e.g., an LED driver) for controlling the intensity of a lighting load (e.g., an LED light source) may provide a wide output range and flicker-free adjustment of the intensity of the lighting load. The load control device may comprise a load regulation circuit, a control circuit, and a filter circuit (e.g., a boxcar filter circuit) that operates in a different manner in dependence upon a target current. When the intensity of the lighting load is near a low-end intensity, the control circuit may adjust an operating frequency of the load regulation circuit in response to the target current, and may control the filter circuit to filter a current feedback signal during a filter window that repeats on periodic basis. When the intensity of the lighting load is near a high-end intensity, the control circuit may control the filter circuit to constantly filter the current feedback signal.

BACKGROUND OF THE INVENTION

Light-emitting diode (LED) light sources (e.g., LED light engines) are replacing conventional incandescent, fluorescent, and halogen lamps as a primary form of lighting devices. LED light sources may comprise a plurality of light-emitting diodes mounted on a single structure and provided in a suitable housing. LED light sources may be more efficient and provide longer operational lives as compared to incandescent, fluorescent, and halogen lamps. An LED driver control device (e.g., an LED driver) may be coupled between a power source, such as an alternating-current (AC) power source or a direct-current (DC) power source, and an LED light source for regulating the power supplied to the LED light source. For example, the LED driver may regulate the voltage provided to the LED light source, the current supplied to the LED light source, or both the current and voltage.

Different control techniques may be employed to drive LED light sources including, for example, a current load control technique and a voltage load control technique. An LED light source driven by the current load control technique may be characterized by a rated current (e.g., approximately 350 milliamps) to which the magnitude (e.g., peak or average magnitude) of the current through the LED light source may be regulated to ensure that the LED light source is illuminated to the appropriate intensity and/or color. An LED light source driven by the voltage load control technique may be characterized by a rated voltage (e.g., approximately 15 volts) to which the voltage across the LED light source may be regulated to ensure proper operation of the LED light source. If an LED light source rated for the voltage load control technique includes multiple parallel strings of LEDs, a current balance regulation element may be used to ensure that the parallel strings have the same impedance so that the same current is drawn in each of the parallel strings.

The light output of an LED light source may be dimmed. Methods for dimming an LED light source may include, for example, a pulse-width modulation (PWM) technique and a constant current reduction (CCR) technique. In pulse-width modulation dimming, a pulsed signal with a varying duty cycle may be supplied to the LED light source. For example, if the LED light source is being controlled using a current load control technique, the peak current supplied to the LED light source may be kept constant during an on-time of the duty cycle of the pulsed signal. The duty cycle of the pulsed signal may be varied, however, to vary the average current supplied to the LED light source, thereby changing the intensity of the light output of the LED light source. As another example, if the LED light source is being controlled using a voltage load control technique, the voltage supplied to the LED light source may be kept constant during the on-time of the duty cycle of the pulsed signal. The duty cycle of the load voltage may be varied, however, to adjust the intensity of the light output. Constant current reduction dimming may be used if an LED light source is being controlled using the current load control technique. In constant current reduction dimming, current may be continuously provided to the LED light source. The DC magnitude of the current provided to the LED light source, however, may be varied to adjust the intensity of the light output.

Examples of LED drivers are described in U.S. Pat. No. 8,492,987, issued Jul. 23, 2013, entitled LOAD CONTROL DEVICE FOR A LIGHT-EMITTING DIODE LIGHT SOURCE; U.S. Pat. No. 9,655,177, issued May 16, 2017, entitled FORWARD CONVERTER HAVING A PRIMARY-SIDE CURRENT SENSE CIRCUIT; and U.S. Pat. No. 9,247,608, issued Jan. 26, 2016, entitled LOAD CONTROL DEVICE FOR A LIGHT-EMITTING DIODE LIGHT SOURCE; the entire disclosures of which are hereby incorporated by reference.

SUMMARY OF THE INVENTION

As described herein, a load control device (e.g., an LED driver) for controlling the intensity of a lighting load (e.g., an LED light source) may provide a wide output range for current conducted through the lighting load to achieve flicker-free adjustment of the intensity of the lighting load. Since the load control device is characterized by a wide output range, the load control device may be able to control a large variety of different lighting loads having different ratings (e.g., different rated output currents and/or rated output voltages). This may allow a manufacturer of the load control device, a manufacturer of a fixture of the light source (such as an original equipment manufacturer (OEM)), and/or a distributer of the load control device and/or the fixture to maintain stock of a smaller number of stock keeping units (SKUs).

The load control device may comprise a load regulation circuit, a control circuit, and a filter circuit (e.g., such as a boxcar filter circuit) that operates in a different manner in dependence upon the intensity (e.g., a target intensity) of the load control device in order to provide the wide output range. The load regulation circuit may control the magnitude of a load current conducted through the lighting load to adjust the intensity of the lighting load between a low-end intensity and a high-end intensity. The filter circuit may receive a current feedback signal from the load regulation circuit and filter the current feedback signal to generate a filtered feedback signal. The control circuit may be operatively coupled to the load regulation circuit for controlling the magnitude of the load current towards a target current in response to the filtered feedback signal. When the intensity of the lighting load is near the low-end intensity (e.g., when the magnitude of the target current is less than a transition current), the control circuit may adjust an operating frequency of the load regulation circuit in response to the target current, and may control the filter circuit to filter the current feedback signal during a filter window that repeats on a periodic basis. When the intensity of the lighting load is near the high-end intensity (e.g., when the magnitude of the target current is greater than the transition current), the control circuit may control the filter circuit to constantly filter the current feedback signal. The control circuit may generate a filter control signal for controlling the filter circuit to filter the current feedback signal during the filter window when the magnitude of the target current is less than the transition current, and control the filter control signal to have a maximum duty cycle (e.g., 100%) when the magnitude of the target current is greater than the transition current.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 1is a simplified block diagram of a load control device, such as a light-emitting diode (LED) driver100for controlling the intensity of an LED light source102(e.g., an LED light engine). The LED light source102is shown inFIG. 1as a plurality of LEDs connected in series but may comprise a single LED or a plurality of LEDs connected in parallel or a suitable combination thereof, depending on the particular lighting system. In addition, the LED light source102may alternatively comprise one or more organic light-emitting diodes (OLEDs). The LED driver100may be adapted to work with a plurality of different LED light sources, which may be rated at different magnitudes of load current and voltage.

The LED driver100may comprise a hot terminal H and a neutral terminal N for receiving an alternating-current (AC) voltage VACfrom an AC power source (not shown). The LED driver100may comprise a radio-frequency (RFI) filter and rectifier circuit110, which may receive the AC voltage VAC. The RFI filter and rectifier circuit110may operate to minimize the noise provided on the AC power source and to generate a rectified voltage VRECT. The LED driver100may comprise a power converter circuit120, which may receive the rectified voltage VRECTand generate a variable direct-current (DC) bus voltage VBUSacross a bus capacitor CBUS. The power converter circuit120may comprise any suitable power converter circuit for generating an appropriate bus voltage, such as, for example, a boost converter, a buck converter, a buck-boost converter, a flyback converter, a single-ended primary-inductance converter (SEPIC), a Ćuk converter, or other suitable power converter circuit. The power converter circuit120may also provide electrical isolation between the AC power source and the LED light source102, and operate as a power factor correction (PFC) circuit to adjust the power factor of the LED driver100towards a power factor of one.

The LED driver100may comprise a load regulation circuit, e.g., an LED drive circuit130, which may receive the bus voltage VBUSand control the amount of power delivered to the LED light source102so as to control the intensity of the LED light source. For example, the LED drive circuit130may comprise a buck converter, as will be described in greater detail below. To control the amount of power delivered to the LED light source102, the LED drive circuit130may be configured to control an average magnitude of a load current ILOADconducted through the LED light source102.

The LED driver100may include a control circuit140for controlling the operation of the power converter circuit120and the LED drive circuit130. The control circuit140may comprise, for example, a controller or any other suitable processing device, such as, for example, a microcontroller, a programmable logic device (PLD), a microprocessor, an application specific integrated circuit (ASIC), or a field-programmable gate array (FPGA). The control circuit140may be configured to control the LED drive circuit130to control the average magnitude of the load current ILOADconducted through the LED light source to control the amount of power delivered to the LED light source. The control circuit140may be configured to control the LED drive circuit130to turn the LED light source102on and off and to adjust (e.g., dim) a present intensity LPRESof the LED light source102towards a target intensity LTRGT, which may range across a dimming range of the LED light source, e.g., between a low-end intensity LLE(e.g., approximately 0.1%-1.0%) and a high-end intensity LHE(e.g., approximately 100%).

The control circuit may be configured to fade (e.g., gradually adjust over a period of time) the target intensity LTRGT(and thus the present intensity LPRES) of the LED light source102. The control circuit140may be configured to fade the LED light source102from off to on by slowly increasing the present intensity LPRESof the LED light source from a minimum fading intensity LFADE-MIN, which may be less than the low-end intensity LLE(e.g., such as approximately 0.02%), to the target intensity LTRGT. The control circuit140may be configured to fade the LED light source102from on to off by slowly decreasing the present intensity LPRESof the LED light source from an initial intensity greater than or equal to the low-end intensity LLEto the minimum fading intensity LFADE-MINat which point the control circuit140may turn off the LED light source.

The control circuit140may be coupled to a memory112configured to store operational characteristics of the LED driver100(e.g., the target intensity LTRGT, the low-end intensity LLE, the high-end intensity LHE, etc.). The memory112may be implemented as an external integrated circuit (IC) or as an internal circuit of the control circuit140. The LED driver100may also comprise a communication circuit114, which may be coupled to, for example, a wired communication link or a wireless communication link, such as a radio-frequency (RF) communication link or an infrared (IR) communication link. The control circuit140may be configured to determine the target intensity LTRGTof the LED light source102or the operational characteristics stored in the memory112in response to digital messages received via the communication circuit114. In response to receiving a command to turn on the LED light source102, the control circuit140may be configured to execute the turn-on routine. The LED driver100may further comprise a power supply116, which may receive the rectified voltage VRECTand generate a direct-current (DC) supply voltage VCC(e.g., approximately 5 volts) for powering the low-voltage circuitry of the LED driver. In addition, the power supply116may generate one or more additional supply voltages, for example, for powering control circuitry of the power converter circuit120and/or the LED drive circuit130.

The control circuit140may comprise a digital control circuit, such as a processor142, which may be, for example, a microprocessor, a programmable logic device (PLD), a microcontroller, an application specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other suitable processing device or controller. The control circuit140may also comprise an analog control loop circuit150. The processor142and the analog control loop circuit150may operate together to control the LED driver circuit130to adjust the average magnitude of the load current ILOADtowards a target current ITRGT. The target current ITRGTmay be dependent upon the target intensity LTRGT(e.g., a function of the target intensity LTRGT). The processor142may generate a target-current control signal VI-TRGT, which may have a DC magnitude or a duty cycle that may indicate the target current ITRGT. The processor142may control the DC magnitude or the duty cycle of the target-current control signal VI-TRGTbased on the target intensity LTRGTof the LED light source102.

The control circuit140may also comprise a latch circuit160that may generate a drive signal VDRfor controlling the operation of the LED drive circuit130(e.g., for rendering a switching transistor of the LED drive circuit130conductive and non-conductive to regulate the average magnitude of the load current ILOADtowards the target current ITRGT). The processor142may generate a frequency control signal VFREQthat may set an operating frequency fOPof the LED drive circuit130. In response to the frequency control signal VFREQ, the latch circuit160may control the drive signal VDRto render the switching transistor of the LED drive circuit130conductive to start a cycle of the LED drive circuit, at which time the LED drive circuit may begin to conduct an inductor current ILconducted through an inductor (not shown) of the LED drive circuit130. The analog control loop circuit150may generate a peak current threshold VTH-PK, which may be used by the latch circuit160to render the switching transistor of the LED drive circuit130non-conductive in response to the magnitude of the inductor current IL.

The LED driver100may comprise an amplifier circuit170, which may receive a current feedback signal VI-FBfrom the LED drive circuit130. The amplifier circuit170may amplify the current feedback signal VI-FBto generate an instantaneous current feedback signal VI-INST, which may indicate an instantaneous magnitude of the inductor current ILflowing through the inductor of the LED drive circuit130.

The LED driver100may further comprise a filter circuit180, such as a boxcar filter circuit. The filter circuit180may receive the instantaneous current feedback signal VI-INSTand generate a filtered feedback signal, e.g., an average current feedback signal VI-AVE, which may indicate an average magnitude of the inductor current ILflowing through the inductor of the LED drive circuit130(e.g., over a specific time window). The processor142may generate a filter control signal VFILTER(e.g., a filter control signal) for controlling the operation of the filter circuit180, e.g., to control when the filter circuit180filters the instantaneous current feedback signal VI-INST. For example, the processor142may control the filter control signal VFILTERto allow the filter circuit180to filter the instantaneous current feedback signal VI-INSTover a filter window period TFILTERduring each cycle of the LED drive circuit130. The processor142may control the filter control signal VFILTERin a manner that is synchronous with the frequency control signal VFREQ, e.g., to start a cycle of the LED drive circuit130at the beginning of the filter window period TFILTER. For example, the filter window period TFILTERmay have the same length during each cycle of the LED drive circuit130independent of the frequency of the frequency control signal VFREQ. The magnitude of the average current feedback signal VI-AVEmay indicate the average magnitude of the inductor current ILduring the filter window period TFILTER(e.g., while the filter circuit180is filtering the instantaneous current feedback signal VI-INST).

The analog control loop circuit150of the control circuit140may receive the average current feedback signal VI-AVEand the latch circuit160may receive the instantaneous current feedback signal VI-INST. The analog control loop circuit150may adjust the magnitude of the peak current threshold VTH-PKin response to the target-current control signal VI-TRGTand the average current feedback signal VI-AVE. The latch circuit160may control the drive signal VDRto render the switching transistor of the LED drive circuit130conductive in response to the frequency control signal VFREQ(e.g., at the beginning of a cycle of the LED drive circuit130). The latch circuit160may control the drive signal VDRto render the switching transistor non-conductive in response to the peak current threshold VTH-PKand the instantaneous current feedback signal VI-INST. After rendering the switching transistor of the LED drive circuit130non-conductive, the latch circuit160may remain in a latched state and maintain the switching transistor non-conductive until the beginning of the next cycle of the LED drive circuit130.

The control circuit140may be configured to determine or learn (e.g., measure or receive an indication of) one or more operational characteristics of the LED light source102(e.g., learned load characteristics). For example, the control circuit140may be configured to determine a voltage representative of the magnitude of the load voltage VLOAD. The magnitude of the load voltage VLOADgenerated across the LED light source102may be dependent upon the magnitude of the load current ILOAD(e.g., the target load current ITRGTto which the control circuit140is regulating the load current ILOAD) as well as the internal circuitry of the LED light source. The control circuit140may be configured to determine (e.g., measure) the magnitude of the load voltage VLOADand/or store the measurement in the memory112as a learned load voltage VLEARNED. The control circuit140may be configured to determine (e.g., measure) the magnitude of the load voltage VLOADusing a load voltage feedback signal VV-LOADreceived from the LED drive circuit130. For example, the LED drive circuit130may comprise a resistive divider circuit (not shown) coupled across the LED light source102for generating the load voltage feedback signal VV-LOADas a scaled load voltage. The load voltage feedback signal VV-LOADmay be received by an analog-to-digital converter (ADC) of the processor142for learning the magnitude of the load voltage VLOAD.

The control circuit140may be configured to determine (e.g., measure) the magnitude of the load voltage VLOADwhen the target intensity LTRGTis at or near the low-end intensity LLE. For example, the control circuit140may be configured to determine (e.g., measure) the magnitude of the load voltage VLOADwhile the control circuit140is fading the LED light source102from on to off, for example, while the average magnitude of the load current ILOADis within a measurement window that may range from a maximum learning threshold ILEARN-MAXto a minimum learning threshold ILEARN-MIN. The maximum learning threshold ILEARN-MAXand the minimum learning threshold ILEARN-MINmay be functions of a rated (or maximum) current IRATEDof the LED light source102, for example, 0.0020·IRATEDand 0.0002·IRATED, respectively.

The control circuit140may be configured to control the LED drive circuit130using the learned load voltage VLEARNED. For example, the control circuit140may be configured to control the LED drive circuit130in response to the learned load voltage VLEARNEDwhen turning on the LED light source102. The control circuit140may be configured to charge (e.g., “pre-charge”) an output capacitor (not shown) of the LED drive circuit130prior to attempting to turn on the LED light source102. In response to receiving a command to turn on the LED light source102and/or in response to power being applied to the LED driver100to turn on the LED light source, the control circuit140may pre-charge the output capacitor until the magnitude of the load voltage VLOADreaches or exceeds a pre-charge voltage threshold VTH-PC, which may be, for example, a function of the learned load voltage VLEARNED(e.g., as will be described in greater detail below). The pre-charging of the output capacitor may allow the LED driver100to turn-on the LED light source102quickly and consistently, e.g., when fading on to the low-end intensity LLE.

The control circuit140may be configured to determine an operating parameter (e.g., a pre-load parameter) as a function of the learned load voltage VLEARNEDand use the operating parameter to control the LED drive circuit130to pre-charge the output capacitor of the LED drive circuit130prior to turning the LED light source102on (e.g., as will be described in greater detail below). For example, the control circuit140may be configured to determine the DC magnitude or the duty cycle of the target-current control signal VI-TRGTto use while pre-charging the output capacitor of the LED drive circuit130as a function of the learned load voltage VLEARNED. In addition, the processor142may generate a start-up control signal VSTART-UPfor controlling the analog control loop circuit150while pre-charging the output capacitor of the LED drive circuit130to maintain the output of the analog control loop circuit150at a predetermined voltage.

After the magnitude of the load voltage VLOADreaches or exceeds the pre-charge voltage threshold VTH-PC, the processor142may control the start-up control signal VSTART-UPto allow the analog control loop circuit150to control the LED drive circuit130using closed loop control in response to the current feedback signal VI-FBto regulate the magnitude of the load current ILOADtowards the target current ITRGT.

FIG. 2is a simplified schematic diagram of a load regulation device, e.g., an LED driver200(such as the LED driver100ofFIG. 1) for controlling the intensity of an LED light source202. The LED driver200may comprise a bus capacitor CBUSfor storing a bus voltage VBUS, which may be generated by a power converter circuit (e.g., the power converter circuit120of the LED driver100). The LED driver200may comprise an LED drive circuit230, which may be configured to control the magnitude of a load current ILOADconducted through the LED light source202. The LED driver200may further comprise a control circuit240, which may be a hybrid analog-digital control circuit (e.g., the control circuit140of the LED driver100). The control circuit240may comprise a processor242, a low-pass filter circuit244, an analog control loop circuit (e.g., which may include an integrator circuit250), and a latch circuit260. The latch circuit260may generate a drive signal VDR, which may be provided to the LED driver circuit230. The LED driver200may further comprise an amplifier circuit270and a filter circuit280(e.g., a boxcar filter circuit) for generating an instantaneous current feedback signal VI-INSTand an average current feedback signal VI-AVE, respectively.

As shown inFIG. 2, the LED drive circuit230may comprise a buck converter. The LED drive circuit230may comprise a switching transistor, e.g., a field-effect transistor (FET) Q232, which may be controlled in response to the drive signal VDRto control the average magnitude of the load current ILOAD. The LED drive circuit230may also comprise an inductor L234, a switching diode D235, an output capacitor C236, and a feedback resistor8238. The drive signal VDRmay be coupled to a gate of the FET Q232through a gate drive circuit239. When the FET Q232is conductive, the inductor L234may conduct an inductor current ILfrom the bus capacitor CBUSthrough the parallel combination of the output capacitor C236and the LED light source202. When the FET Q232is non-conductive, the inductor L234may conduct the inductor current ILthrough the switching diode D235and the parallel combination of the output capacitor C236, and the LED light source202. The LED light source202may conduct the average component of the inductor current ILand the output capacitor C236may conduct the transient component of the inductor current IL. The average magnitude of the load current ILOADmay be approximately equal to the average magnitude of the inductor current IL.

The current feedback signal VI-FBmay be generated across the feedback resistor R238of the LED drive circuit230and may be proportional to the magnitude of the inductor current IL. The current feedback signal VI-FBmay be received by the amplifier circuit270. The amplifier circuit270may comprise an operational amplifier U272and may be configured as a non-inverting amplifier circuit. The operational amplifier U272may have a non-inverting input that may receive the current feedback signal VI-FB. The amplifier circuit270may also comprise a resistor R274coupled between an inverting input of the operational amplifier U272and circuit common, and a resistor R276coupled between the inverting input and an output of the operational amplifier U272. The amplifier circuit270may be configured to generate the instantaneous current feedback signal VI-INST, which may be an amplified version of the current feedback signal VI-FBand may indicate the instantaneous magnitude of the inductor current IL.

The filter circuit280may filter the instantaneous current feedback signal VI-INSTto generate the average load current signal VI-AVE, which may indicate the average magnitude of the inductor current IL. The filter circuit280may comprise a controllable switching circuit282and a low-pass filter circuit (e.g., a third-order low-pass filter circuit) that includes resistors R284, R286, R288and capacitors C285, C287, C289. The processor242may generate a filter control signal VFILTERfor rendering the controllable switching circuit282conductive and non-conductive. When the controllable switching circuit282is conductive, the filter circuit280may be configured to filter the instantaneous current feedback signal VI-INSTto generate the average current feedback signal VI-AVE. When the controllable switching circuit282is non-conductive, the capacitors C285, C287, C289of the filter circuit280may maintain the magnitude of the average current feedback signal VI-AVEat a value that indicates the average magnitude of the inductor current ILduring the period of time when the controllable switching circuit282was previously conductive.

The processor242may generate a pulse-width modulated (PWM) signal VPWM, which may be received by the low-pass filter circuit244of the control circuit240. The low-pass filter circuit244may be configured to generate a target-current control signal VI-TRGT, which may have a DC magnitude that indicates the target current ITRGT. For example, the low-pass filter circuit244may comprise a resistor-capacitor (RC) circuit having a resistor R246and a capacitor C248. The processor242may be configured to control the duty cycle of the pulse-width modulated signal VPWMto adjust the magnitude of the target-current control signal VI-TRGT.

The average current feedback signal VI-AVEgenerated by the filter circuit280and the target-current control signal VI-TRGTgenerated by the low-pass filter circuit244may be received by the integrator circuit250. The integrator circuit250may comprise an operational amplifier U252having a non-inverting input coupled to the target-current control signal VI-TRGTand an inverting input coupled to the average current feedback signal VI-AVEvia a resistor R254. The integrator circuit250may comprise a capacitor C256coupled between the inverting input and an output of the operational amplifier U252, such that the integrator circuit250may be configured to integrate the error between the average current feedback signal VI-AVEand the target-current control signal VI-TRGT. The integrator circuit250may generate a peak current threshold VTH-PKhaving a DC magnitude that may increase or decrease by amounts dependent upon the error between the magnitude of the target-current control signal VI-TRGTand the average current feedback signal VI-AVE. The integrator circuit250may comprise a controllable switching circuit258coupled in parallel with the capacitor C256. The controllable switching circuit258may be rendered conductive and non-conductive in response to a startup control signal VSTART-UPreceived from the processor242during a startup routine (e.g., as will be described in greater detail below).

The latch circuit260may receive the peak current threshold VTH-PKgenerated by the integrator circuit250and the instantaneous current feedback signal VI-INSTgenerated by the amplifier circuit270. The latch circuit260may comprise a comparator U262configured to compare the magnitude of the instantaneous current feedback signal VI-INSTto the magnitude of the peak current threshold VTH. The comparator U262may generate a latch control signal VLATCHat an output. When the magnitude of the instantaneous current feedback signal VI-INSTis less than the magnitude of the peak current threshold VTH, the comparator U262may drive the latch control signal VLATCHat the output high (e.g., towards the supply voltage VCC). When the magnitude of the instantaneous current feedback signal VI-INSTexceeds the magnitude of the peak current threshold VTH-PK, the comparator U262may drive the latch control signal VLATCHat the output low (e.g., towards circuit common).

The processor242may generate a frequency control signal VFREQthat may set an operating frequency fOPof the LED drive circuit230. The latch circuit260may comprise a PWM control circuit266, which may receive the latch control signal VLATCHfrom the comparator U262and the frequency control signal VFREQfrom the processor242. The PWM control circuit266may generate the drive signal VDR, which may be received by the gate drive circuit239of the LED drive circuit230. When the frequency control signal VFREQis driven high at the beginning of a cycle of the LED driver circuit230, the PWM control circuit266may drive the magnitude of the drive signal VDRhigh, which may render the FET Q232of the LED drive circuit230conductive. When the magnitude of the instantaneous current feedback signal VI-INSTexceeds the magnitude of the peak current threshold signal VTH, the comparator U262may drive the latch control signal VLATCHlow, which may cause the PWM control circuit266to drive the magnitude of the drive signal VDRlow. The PWM control circuit266may maintain the magnitude of the drive signal VDRlow until the processor242drives the magnitude of the frequency control signal VFREQhigh once again at the end of the present cycle and the beginning of the next cycle of the LED drive circuit230.

The processor242may control the frequency of the frequency control signal VFREQand the duty cycle of the pulse-width modulated control signal VPWM(and thus the magnitude of the target-current control signal VI-TRGT) in dependence upon the target current ITRGTof the LED light source202using open loop control.FIG. 3Ais an example plot of the relationship300between the frequency of the frequency control signal VFREQ(e.g., the operating frequency fOPof the LED drive circuit230) and the target current ITRGT.FIG. 3Bis an example plot of the relationship310between the magnitude of the target-current control signal VI-TRGTand the target current ITRGT. For example, the target current ITRGTmay range between a high-end current IHE(e.g., approximately 150 mA) at the high-end intensity LHEand a low-end current ILE(e.g., approximately 150 μA) at the low-end intensity LLE.

The processor242may operate in first and second modes of operation depending upon whether the target current ITRGTis less than or greater than approximately a transition current ITRAN(e.g., approximately 16.8 mA). Near the low-end intensity LLE(e.g., when the target current ITRGTis less than approximately the transition current ITRAN), the processor242may operate in the first operating mode during which the processor242may adjust the frequency of the frequency control signal VFREQbetween a minimum operating frequency fMINand a maximum operating frequency fMAX(e.g., linearly) with respect to the target current ITRGTwhile holding the magnitude of the target-current control signal VI-TRGTconstant (e.g., at a minimum voltage VMIN). Near the high-end intensity LHE(e.g., when the target current ITRGTis greater than or equal to approximately the transition current ITRAN), the processor242may operate in the second operating mode during which the processor242may adjust the magnitude of the target-current control signal VI-TRGTbetween the minimum voltage VMINand a maximum voltage VMAX(e.g., linearly) with respect to the target current ITRGTwhile holding the frequency control signal VFREQconstant (e.g., at the maximum operating frequency fMAX). For example, the maximum operating frequency fMAXmay be approximately 140 kHz and the minimum operating frequency fMINmay be approximately 1250 Hz. For example, the maximum voltage VMAXmay be approximately 3.3 V and the minimum voltage VMINmay be approximately 44 mV.

FIGS. 4A and 4Bshow example waveforms illustrating the operation of the LED driver200shown inFIG. 2.FIG. 4Ashows example waveforms illustrating the operation of the LED driver200when the target current ITRGTis less than the transition current ITRAN. The processor242may generate the frequency control signal VFREQto set the operating frequency fOPof the LED drive circuit230. For example, an operating period TOPof the LED drive circuit230may be equal to the period of the frequency control signal VFREQ. The processor242may set the operating frequency fOP(and thus the operating period TOP) in dependence upon the target current ITRGT(e.g., as shown inFIG. 3A). The processor242may generate the frequency control signal VFREQto have a predetermined on-time TFREQ-ON, which may have the same length each cycle of the LED drive circuit130(e.g., independent of the frequency of the frequency control signal VFREQor the target current ITRGT).

The processor242may generate the filter control signal VFILTERin a synchronous manner with respect to the frequency control signal VFREQ. For example, the processor242may drive both the filter control signal VFILTERand the frequency control signal VFREQhigh at the same time to start a cycle of the LED drive circuit230(e.g., at time t1inFIG. 4A). At time t1, the PWM control circuit266of the latch circuit260may drive the magnitude of the drive signal VDRhigh (e.g., towards the supply voltage VCC) causing the FET Q232of the LED drive circuit230to be rendered conductive. At this time, the inductor L234of the LED drive circuit230may begin to conduct the inductor current IL. When the instantaneous current feedback signal VI-INST(which may be proportional to the magnitude of the inductor current IL) exceeds the magnitude of the peak current threshold signal VTH, the PWM control circuit266may drive the magnitude of the drive voltage VDRlow (e.g., towards circuit common) as shown at time t2ofFIG. 4A, which may cause the FET Q232of the LED drive circuit230to be rendered non-conductive. The drive signal VDRmay be characterized by an on-time TONand a period that may be equal to the operating period TOPas shown inFIG. 4A. The PWM control circuit266may render the FET Q232conductive for the length of the on-time TONof the drive signal VDRduring each operating cycle of the LED drive circuit230. The inductor current ILmay have a peak magnitude IPKas shown inFIG. 4A. The magnitude of the inductor current ILmay begin to decrease at time t2until the magnitude of the inductor current ILdrops to zero amps at time t3.

The processor242may drive the frequency control signal VFREQlow at the end of the predetermined on-time TFREQ-ON(e.g., at time t4inFIG. 4A). The processor242may drive the filter control signal VFILTERlow at the end of a filter window period TFILTER(e.g., at time t5inFIG. 4A). The processor242may drive both the filter control signal VFILTERand the frequency control signal VFREQhigh to start another cycle of the LED drive circuit230at the end of the operating period TOP(e.g., at time t6inFIG. 4A).

When the target current ITRGTis less than the transition current ITRAN, the processor242may hold the magnitude of the target-current control signal VI-TRGTconstant at the minimum voltage VMIN, and linearly adjust the frequency of the frequency control signal VFREQbetween the minimum frequency fMINand the maximum frequency fMAXas a function of the target current ITRGT(e.g., as shown inFIGS. 3A and 3B). The filter circuit280may be configured to filter the instantaneous current feedback signal VI-INSTduring the filter window period TFILTEReach cycle of the LED drive circuit230. When the target current ITRGTis less than the transition current ITRAN, the filter control signal VFILTERmay be a periodic signal characterized by the operating frequency fOP. The processor242may maintain the length of the filter window period TFILTERof the filter control signal VFILTERconstant from one cycle of the LED driver circuit230to the next cycle independent of the frequency of the frequency control signal VFREQ. A duty cycle of the filter control signal VFILTERmay vary as the frequency of the frequency control signal VFREQis adjusted.

Since the target-current control signal VI-TRGTand the filter window period TFILTERare held constant, the on-time TONof the drive signal VDRmay be approximately the same each cycle of the LED drive circuit230even though the frequency of the drive signal VDR(e.g., the operating period TOP) may vary in dependence upon the target current ITRGT. As a result, the peak and average magnitudes of the inductor current ILduring the filter window period TFILTERmay be approximately the same from one cycle to the next of the LED drive circuit230independent of the target current ITRGTwhen the target current ITRGTis less than the transition current ITRAN. The length of the filter window period TFILTERmay be sized to ensure that the inductor current ILdrops to zero amps before the end of the filter window period TFILTERwhen the target current ITRGTis less than the transition current ITRAN. When the target current is less than the transition current ITRAN, the LED drive circuit230may be configured to operate in a discontinuous mode of operation.

FIG. 4Bshows example waveforms illustrating the operation of the LED driver200when the target current ITRGTis greater than the transition current ITRAN. When the target current ITRGTis greater than the transition current ITRAN, the processor242may linearly adjust the magnitude of the target-current control signal VI-TRGTbetween the minimum voltage VMINand the maximum voltage VMAXas a function of the target current ITRGT(e.g., as shown inFIGS. 3A and 3B). In addition, the processor242may hold the frequency of the frequency control signal VFREQconstant at the maximum operating frequency fMAX(e.g., causing the operating period TOPto be held constant at a minimum operating period TMIN). When the target current ITRGTis greater than the transition current ITRAN, the processor242may control the duty cycle of the filter control signal VFILTERto a maximum filter duty cycle (e.g., 100%). For example, the operating period TOPmay be equal to the length of the filter window period TFILTERwhen the target current ITRGTis greater than the transition current ITRAN. As a result, the processor242may drive the filter control signal VFILTERhigh at all times (e.g., the filter control signal VFILTERis a constant signal) while the target current ITRGTis greater than the transition current ITRANas shown inFIG. 4B. The average current feedback signal VI-AVEmay indicate the average magnitude of the inductor current ILwhen the target current ITRGTis greater than the transition current ITRAN. Additionally or alternatively, the processor242may drive the filter control signal VFILTERhigh approximately all of the time (e.g., almost all of the time), for example at substantially large duty cycle (e.g., approximately 90% or greater).

Because the processor242varies the magnitude of the target-current control signal VI-TRGTas a function of the target current ITRGT, the length of the on-time TONof the drive signal VDRmay vary as a function of the target current ITRGTeven though the frequency of the drive signal VDR(e.g., the operating period TOP) is held constant. As the target current ITRGTincreases, the peak current IPKof the inductor current may increase to a point at which the LED drive circuit230may begin to operate in a continuous mode of operation. Since the minimum operating period TMIN(e.g., the operating period TOPwhen the target current ITRGTis greater than the transition current ITRAN) may be equal to the length of the filter window time period TFILTER, the processor242may be configured to smoothly transition the LED driver200between the first operating mode when the target current ITRGTis less than the transition current ITRANand the second operating mode when the target current ITRGTis greater than the transition current ITRAN.

The length of the predetermined on-time TFREQ-ONof the frequency control signal TFREQis less than the length of the operating period TOPwhen the target current ITRGTis greater than the transition current ITRAN. The processor242may drive the frequency control signal TFREQlow (e.g., at time t7inFIG. 4B) and then high (e.g., at time t8) at the end of each cycle of the LED drive circuit230. This causes the PWM control circuit266of the latch circuit260to stop maintaining the magnitude of the drive signal VDRlow, and to drive the magnitude of the drive signal VDRhigh again when the frequency control signal TFREQis driven high to begin the next cycle of the LED drive circuit230(e.g., at time t8).

The processor242of the control circuit240may be configured to determine or learn (e.g., measure or receive an indication of) the magnitude of the load voltage VLOADand/or store the measurement in memory (e.g., the memory112) as a learned load voltage VLEARNED. The magnitude of the load voltage VLOADgenerated across the LED light source202may be dependent upon the magnitude of the load current ILOAD(e.g., the target load current ITRGTto which the control circuit240is regulating the load current ILOAD) as well as the internal circuitry of the LED light source. The processor242may be configured to receive a load voltage feedback signal from the LED drive circuit230(e.g., the load voltage feedback signal VV-LOADof the LED driver100), which may be a scaled version of the load voltage VLOADgenerated by a resistive divider circuit (not shown) of the LED drive circuit230. The processor242may sample the load voltage feedback signal using an analog-to-digital converter (ADC) to measure the magnitude of the load voltage VLOAD.

FIG. 5Ashows example waveforms illustrating the operation of the LED driver200when the processor242is learning the load voltage VLOAD. The processor242may be configured to determine (e.g., measure) the magnitude of the load voltage VLOADwhile the processor242is fading the LED light source202from on to off. As shown inFIG. 5A, when fading the LED light source202from on to off, the processor242may begin to decrease the average magnitude of the load current ILOADfrom an initial current IINITat time t0, at which time the magnitude of the load voltage VLOADmay also begin to decrease, e.g., from an initial voltage VINIT. The processor242may be configured to determine (e.g., measure) the magnitude of the load voltage VLOADwhile the average magnitude of the load current ILOADis within a measurement window that may range from a maximum learning threshold ILEARN-MAXand a minimum learning threshold ILEARN-MIN(e.g., between times tWIN-STARTand tWIN-ENDas shown inFIG. 5A). The maximum learning threshold ILEARN-MAXand the minimum learning threshold ILEARN-MINmay be functions of a rated (or maximum) current IRATEDof the LED light source202, for example, 0.0020·IRATEDand 0.0002·IRATED, respectively. The processor242may be configured to periodically sample the load voltage feedback signal during the measurement window, and to process the plurality of samples to determine the learned load voltage VLEARNED. For example, the processor242may be configured to process the plurality of samples of the load voltage feedback signal by calculating an average or median value of the plurality of samples or filtering the samples using a digital low-pass filter.

The processor242may be configured to measure the load voltage VLOADand determine the learned load voltage VLEARNEDwhen (e.g., each time that) the processor242turns the LED light source202off (e.g., fades the LED light source off). The processor242may be configured to overwrite the learned load voltage VLEARNEDstored in the memory with the learned load voltage VLEARNEDdetermined the last time that the processor242turned off the LED light source202. In addition, the processor242may be configured to process the learned load voltages VLEARNEDfrom multiple turn-off events (e.g., calculate the average or median value of the multiple learned load voltages) before overwriting the learned load voltage VLEARNEDstored in the memory.

The processor242may be configured to control the LED drive circuit230using the learned load voltage VLEARNED, for example, when turning on the LED light source202.FIG. 5Bshows example waveforms illustrating the operation of the LED driver200when the processor242is fading on the LED light source202(e.g., fading on to a target intensity LTRGTthat corresponds to a target current ITRGT). In response to receiving a command to turn on the LED light source202and/or in response to power being applied to the LED driver200to turn on the LED light source, the processor242may be configured to pre-charge the output capacitor C236of the LED drive circuit230during a pre-charge period TPRE-CHARGEprior to attempting to turn on the LED light source202. During the pre-charge period TPRE-CHARGE, the processor242may be configured to control the duty cycle of the pulse-width modulated signal VPWM(and thus the DC magnitude of the target-current control signal VI-TRGT) as a function of the learned load voltage VLEARNEDto cause the output capacitor C236to charge faster than normal (e.g., faster than if the processor242controlled the DC magnitude of the target-current control signal VI-TRGTin response to the target current ITRGTas shown inFIG. 3B). The faster rate at which the output capacitor C236charges during the pre-charge period TPRE-CHARGEmay allow the processor242to turn-on the LED light source202quickly and consistently, e.g., when fading the LED light source on to the low-end intensity LLE.

The control circuit240may be configured to pre-charge the output capacitor C236of the LED drive circuit230until the magnitude of the load voltage VLOADreaches or exceeds a pre-charge voltage threshold VTH-PC. The pre-charge voltage threshold VTH-PCmay be determined, for example, as a function of the learned load voltage VLEARNED(e.g., VTH-PC=α·VLEARNED, where α is a constant that may be, for example, approximately 0.90). Since the magnitude of the load voltage VLOADmay be greater when the LED light source202is cold than when the LED light source202is warm, the constant α may be sized to be less than one to ensure that the LED drive circuit230does not overshoot the learned load voltage VLEARNEDwhen pre-charging the output capacitor C236. Additionally or alternatively, the pre-charge voltage threshold VTH-PCmay be determined, for example, using a different function of the learned load voltage VLEARNED(e.g., VTH-PC=VLEARNED−β, where β is a constant that may be, for example, approximately one volt). Additionally or alternatively, the pre-charge voltage threshold VTH-PCmay be a fixed threshold (e.g., a predetermined threshold). The processor242may be configured to cease pre-charging the output capacitor C236if the magnitude of the load voltage VLOADdoes not exceed the pre-charge voltage threshold VTH-PCwithin a timeout period. The processor242may be configured to select the value of the duty cycle of the pulse-width modulated signal VPWMbased on the learned load voltage VLEARNEDsuch that pre-charge period TPRE-CHARGEfor the LED driver200may be approximately the same for different LED light sources that have different resulting load voltages.

The processor242may control the start-up control signal VSTART-UPto render the controllable switching circuit258of the integrator circuit250conductive during the pre-charge period TPRE-CHARGE. After the magnitude of the load voltage VLOADreaches or exceeds the pre-charge voltage threshold VTH-PC, the processor242may control the start-up control signal VSTART-UPto render the controllable switching circuit258of the integrator circuit250non-conductive. This may allow the integrator circuit250and the latch circuit260to control the LED drive circuit230using closed loop control in response to the current feedback signal VI-FBto regulate the magnitude of the load current ILOADtowards the target current ITRGT.

FIG. 6is a simplified flowchart of an example control procedure600for controlling a load control device (e.g., the LED driver200) to control a magnitude of a load current conducted through a lighting load (e.g., the LED light source202). The control procedure600may be executed by a control circuit of the load control device (e.g., the control circuit240of the LED driver200) at step610, for example, periodically and/or in response to a change in the target current ITRGTfor the lighting load. If the target current ITRGTis less than the transition current ITRANat612(e.g., when the target intensity LTRGTin near the low-end intensity LLE), the control circuit may maintain the magnitude of the target-current control signal VI-TRGTconstant (e.g., at the minimum voltage VMIN) at614, and may adjust the frequency of the frequency control signal VFREQin response to the target current ITRGT(e.g., as shown inFIG. 3A) at616. The control circuit may then control a filter circuit (e.g., the filter circuit280) at618by controlling the filter control signal VFILTERto be periodic (e.g., having the same frequency of the frequency control signal VFREQ) and synchronized to the frequency control signal VFREQ(e.g., as shown inFIG. 4A). The control procedure600may then exit.

If the target current ITRGTis greater than the transition current ITRAN(e.g., greater than or equal to the transition current ITRAN) at612(e.g., when the target intensity LTRGTin near the high-end intensity LHE), the control circuit may maintain the frequency of the frequency control signal VFREQconstant (e.g., at the maximum operating frequency fMAX) at620, and may adjust the magnitude of the target-current control signal VI-TRGTin response to the target current ITRGT(e.g., as shown inFIG. 3B) at622. The control circuit may then control the filter control signal VFILTERto be substantially constant at624, before the control procedure600exits. For example, the control circuit may drive the control signal VFILTERusing a maximum duty cycle, such as 100% (e.g., by constantly driving the filter control signal VFILTERhigh as shown inFIG. 4B), or a substantially high duty cycle (e.g., 90% or greater) at624.