MASSIVE PARALLEL ASSEMBLY METHOD

Embodiments provide a method for manufacturing a device. The method comprises providing a first carrier having attached thereto a plurality of chips by means of an adhesive layer of the first carrier, a first surface of the plurality of chips being attached to the first carrier. Further, the method comprises selectively attaching a second surface of a subset of the plurality of chips to a conveyor carrier by means of a structured adhesive layer of the conveyor layer. Further, the method comprises selectively releasing the subset of the plurality of chips from the first carrier by means of debonding corresponding sections of the adhesive layer of the first carrier. Further, the method comprises attaching the first surface of the subset of the plurality of chips to a substrate of the device.

TECHNICAL FIELD

Embodiments relate to a method for manufacturing a device, and specifically, to a method that allows to attach in parallel a plurality of chips to a substrate. Some embodiments relate to a massive parallel assembly.

BACKGROUND

Usually, for bonding chips on a substrate, the chips are cut out individually by means of a needle from a sawn wafer with an adhesive film, received in a vacuum tool, aligned with respect to the substrate in an accurate position and connected, for example, in a thermal step, by means of adhering, soldering or pressure welding or friction welding. If the chip size becomes very small, e.g., below 250 μm edge length, handling during cutting and receiving becomes difficult. With a plurality of chips to be bonded (e.g., several 1000 chips), it becomes increasingly uneconomical, since the entire loading time for a substrate increases.

From reference [1], different methods are known for realizing parallel assembly of equal members, which are usable to a limited extent.

Therefore, it is the object of the present invention to improve the current situation.

SUMMARY

This object is solved by the independent claims.

Advantageous implementations are addressed in the dependent claims.

Embodiments provide a method for manufacturing a device. The method comprises providing a first carrier [e.g., a glass carrier/glass wafer] having attached thereto a plurality of chips [e.g., μLEDs] by means of an adhesive layer of the first carrier [e.g., disposed on, for example, a surface of the carrier], a first surface of the plurality of chips being attached to the first carrier. Further, the method comprises selectively attaching a second surface [e.g., opposite to the first surface] of a subset [e.g.. proper subset] of the plurality of chips to a conveyor carrier [e.g., a glass carrier/glass wafer] by means of a structured adhesive layer of the conveyor layer [e.g., disposed on, for example, a surface of the conveyor carrier]. Further, the method comprises selectively releasing the subset [e.g. proper subset] of the plurality of chips from the first carrier by means of debonding [e.g., laser debonding] corresponding sections of the adhesive layer of the first carrier [e.g., sections of the adhesive layer of the first carrier to which the subset [e.g., proper subset] of the plurality of chips are attached] [e.g., and cleaning the first surface of the subset of the plurality of chips]. Further, the method comprises attaching the first surface of the subset [e.g. proper subset] of the plurality of chips to a substrate of the device. Further, the method comprises releasing the subset [e.g.. proper subset] of the plurality of chips from the conveyor carrier by means of debonding [e.g., laser debonding] at least corresponding sections of the structured adhesive layer of the conveyor carrier [e.g., sections of the adhesive layer of the conveyor layer to which the proper subset of the plurality of chips are attached]. Thereby, at least one out of selectively releasing the proper subset of the plurality of chips from the first carrier and releasing the proper subset of the plurality of chips from the conveyor carrier is performed by means of laser debonding.

Embodiments allow for a parallel high-precision assembly.

In embodiments, the plurality of chips are a two-dimensional array of chips.

In embodiments, the subset [e.g., proper subset] of the plurality of chips is defined by a two-dimensional pattern.

In embodiments, according to the two-dimensional pattern at least every 2nd or 3rd chip in a row direction and/or at least every 2nd or 3rd chip in a column direction is selected out of the two-dimensional array of chips, to obtain the subset [e.g., proper subset] of chips.

In embodiments, the method further comprises providing the conveyor carrier with an adhesive layer disposed thereon, and a structuring the adhesive layer of the conveyor carrier based on the two-dimensional pattern defining the subset [e.g., proper subset] of the chips, to obtain the structured adhesive laser of the conveyor layer.

In embodiments, attaching the first surface of the subset [e.g., proper subset] of the plurality of chips to the substrate of the device comprises bonding the subset of the plurality of chips to the substrate of the device.

In embodiments, the first surface of plurality of chips comprises a metallization layer.

In embodiments, the first surface of the subset [e.g., proper subset] of the plurality of chips comprises a metallization layer having disposed thereon an AuSn solder layer stack, wherein attaching the first surface of the subset [e.g., proper subset] of the plurality of chips to the substrate of the device comprises soldering the subset [e.g., proper subset] of the plurality of chips to the substrate of the device at a temperature of at least 280° C. [e.g., a temperature between 280° C. and 350° C., or a temperature between 280° C. and 500° C.].

In embodiments, the first carrier is a handling carrier.

In embodiments, the first carrier is a donor carrier, wherein providing the donor carrier comprises: providing a handling carrier [e.g., a glass carrier/glass wafer] having attached thereto the plurality of chips by means of an adhesive layer of the handling carrier [e.g., disposed on, for example, a surface of the handling carrier], the second surface of the plurality of chips being attached to the handling carrier; attaching the first surface of the plurality of chips or a proper subset of the plurality of chips to the donor carrier by means of the adhesive layer of the donor carrier; and releasing the plurality of chips or the proper subset of the chips from the handling carrier by means of laser debonding at least corresponding sections of the adhesive layer of the handling carrier.

In embodiments, providing the donor carrier further comprises providing a metallization layer on the first surface of the devices prior to attaching the first surface of the plurality of chips to the donor carrier.

In embodiments, providing the donor carrier further comprises providing a metallization layer on the first surface of the devices prior to attaching the first surface of the plurality of chips to the donor carrier and providing an AuSn solder layer stack on the metallization layer.

In embodiments, providing the donor carrier further comprises providing an AuSn solder layer stack on a metallization layer of the plurality of chips [e.g., a metallization layer that is disposed on a first surface of the plurality of chips].

For example, an Au/Sn stack [e.g., Au/Sn metal stack] can be provided [e.g., disposed] [e.g., on the metallization layer] and annealed. The eutectic solder AuSn20 or Au/Sn 80/20 is formed at a soldering temperature of at least 280° C. When re-melting/soldering, excessive gold alloys with Au/Sn 80/20 (eutectic) and converts to Au/Sn 88/12 (Au5Sn or zeta phase), which only melts at 512° C.

In embodiments, providing the handling carrier comprises: providing a [e.g., semiconductor] substrate having formed thereon the plurality of chips; attaching the substrate with the plurality of chips to the handling carrier by means of an adhesive layer [e.g., disposed on, for example, a surface of the carrier], the plurality of chips facing the carrier; and separating the plurality of chips from the substrate [e.g., by means of dicing the substrate].

In embodiments, the plurality of chips is a first plurality of chips [e.g., μLEDs of a first color], wherein the method further comprises: providing a second carrier [e.g., a glass carrier/glass wafer] having attached thereto a second plurality of chips [e.g., μLEDs of a second color, different from the first color] by means of an adhesive layer of the second carrier [e.g., disposed on, for example, a surface of the carrier], a first surface of the second plurality of chips being attached to the second carrier; selectively attaching a second surface [e.g., opposite to the first surface] of a subset [e.g., proper subset] of the second plurality of chips to a second conveyor carrier [e.g., a glass carrier/glass wafer] by means of a structured adhesive layer of the second conveyor layer [e.g., disposed on, for example, a surface of the conveyor carrier]; selectively releasing the subset [e.g., proper subset] of the second plurality of chips from the second carrier by means of laser debonding corresponding sections of the adhesive layer of the second carrier [e.g., sections of the adhesive layer of the second carrier to which the subset, for example, a proper subset, of the second plurality of chips are attached]; attaching the first surface of the subset [e.g., proper subset] of the second plurality of chips to the substrate of the device; and releasing the subset [e.g., proper subset] of the second plurality of chips from the second conveyor carrier by means of laser debonding at least corresponding sections of the structured adhesive layer of the second conveyor carrier [e.g., sections of the adhesive layer of the second conveyor layer to which the subset [e.g., proper subset] of the second plurality of chips are attached].

In embodiments, the subset [e.g., proper subset] of the first plurality of chips and the subset [e.g., proper subset] of the second plurality of chips are arranged in an interleaved manner with respect to each other on the substrate of the device.

In embodiments, the first surface of the subset [e.g., proper subset] of the first plurality of chips and the first surface of the subset [e.g., proper subset] of the second plurality of chips comprises a metallization layer having disposed thereon an AuSn solder layer stack, wherein attaching the first surface of the subset [e.g., proper subset] of the first plurality of chips to the substrate of the device comprises soldering the first subset [e.g., proper subset] of the first plurality of chips to the substrate of the device at a temperature between 280° and 350° C., and wherein attaching the first surface of the subset [e.g., proper subset] of the second plurality of chips to the substrate of the device comprises soldering the second subset [e.g. proper subset] of the first plurality of chips to the substrate of the device at a temperature between 280° and 350° C., wherein the first plurality of chips are soldered to the substrate of the device prior to attaching the first surface of the subset [e.g., proper subset] of the second plurality of chips to the substrate of the device.

In embodiments, the chips are at least one out of semiconductor chips, optical filters, ferromagnets, high-K dielectrics, tilting mirrors, micro lenses, laser diodes, photodetectors and light emitting diodes [e.g., mini or micro light emitting diodes].

In embodiments, the device is a display or a part of a display.

In embodiments, the device is an optical module or part of an optical module [e.g., optical transceiver, for example, for laser diodes, photodetectors, mirrors or optical filters].

In embodiments, the device is a power regulator or switches [e.g., for capacitors with high-K dielectrics or for inductors with ferrites or ferromagnets].

DESCRIPTION OF EMBODIMENTS

In the following description, a plurality of details are set forth to provide a more thorough explanation of embodiments of the present invention. However, it will be apparent to one skilled in the art that embodiments of the present invention may be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form rather than in detail in order to avoid obscuring embodiments of the present invention. In addition, features of the different embodiments described hereinafter may be combined with each other, unless specifically noted otherwise.

FIG. 1shows a flow chart of a method100for manufacturing a device, according to an embodiment of the present invention. The method100comprises a step102of providing a first carrier having attached thereto a plurality of chips by means of an adhesive layer of the first carrier, a first surface of the plurality of chips being attached to the first carrier. Further, the method100comprises a step104of selectively attaching a second surface of a subset of the plurality of chips to a conveyor carrier by means of a structured adhesive layer of the conveyor layer. Further, the method100comprises a step106of selectively releasing the subset of the plurality of chips from the first carrier by means of debonding corresponding sections of the adhesive layer of the first carrier. Further, the method100comprises a step108of attaching the first surface of the subset of the plurality of chips to a substrate of the device. Further, the method100comprises a step110of releasing the subset of the plurality of chips from the conveyor carrier by means of debonding at least corresponding sections of the structured adhesive layer of the conveyor carrier. Thereby, at least one out of selectively releasing the proper subset of the plurality of chips from the first carrier and releasing the proper subset of the plurality of chips from the conveyor carrier is performed by means of laser debonding.

Subsequently, embodiments of the method100for manufacturing a device are described in further detail referring toFIGS. 2ato 2f, which show cross-sectional views of the device or of intermediate (or interstage) products of the manufacturing of the device obtained after different steps of the method100for manufacturing the device.

FIG. 2ashows a cross-sectional view of an intermediate product of the manufacturing of the device after a step of providing a handling carrier200having attached thereto a plurality of chips210by means of an adhesive layer202. In other words,FIG. 2ashows chips210on a handling carrier210.

The adhesive layer202can be disposed on a surface of the handling carrier200, wherein the plurality of chips210can be attached to the adhesive layer202.

As indicated inFIG. 2aby way of example, a second surface212of the plurality of chips210can be attached to the handling carrier200by means of the adhesive layer202. Naturally, in embodiments, also a first surface214, opposing the second surface212, of the plurality of chips210can be attached the handling carrier200by means of the adhesive layer202.

The first surface214of the chips210can be pre-processed, e.g., comprising a metallization layer and optionally having a solder disposed thereon, such as an AuSn layer stack (AU=gold, SN=tin). Alternatively, the method100can comprise a step of processing the first surface214of the chips210, such as providing the metallization layer on the first surface214of the chips210and/or providing a solder on the metallization layer. In the latter case, it is advantageous if the second surface212of the chips210is attached to the handling carrier200by means of the adhesive layer202, alternatively, a donor carrier could be used for flipping the chips210.

The handling carrier200can be, for example, a glass carrier or glass wafer (i.e., a carrier wafer comprising glass or consisting of glass).

As indicated inFIG. 2aby way of example, the plurality of chips can be micro light emitting diodes (μLEDs). Naturally, in embodiments, the plurality of chips also could be semiconductor chips, optical filters, ferromagnets, high-K dielectrics, tilting mirrors, micro lenses, laser diodes, or photodetectors.

FIG. 2bshows a cross sectional view of an intermediate product of the manufacturing of the device after a step of attaching the first surface214of the plurality of chips210or a proper subset of the plurality of chips210to a donor carrier220by means of an adhesive layer222of the donor carrier220. In other words,FIG. 2bshows a transfer of the chips210to a donor (wafer flipping).

The adhesive layer222can be disposed on a surface of the donor carrier220, wherein the plurality of chips210can be attached to the adhesive layer222.

The donor carrier220can be, for example, a glass carrier or glass wafer (i.e., a carrier wafer comprising glass or consisting of glass).

FIG. 2cshows a cross sectional view of an intermediate product of the manufacturing of the device after a step of releasing the plurality of chips210or the proper subset of the plurality of chips from the handling carrier200. In other words,FIG. 2cshows a chip carrier release (e.g., laser debonding).

The plurality of chips210or the proper subset of the plurality of chips210can be released from the handling carrier200by means of debonding at least corresponding sections of the adhesive layer202of the handling carrier200(e.g., sections of the adhesive layer202of the handling carrier200to which the plurality of chips210or the proper subset of the plurality of chips210are attached).

For example, the plurality of chips210or the proper subset of the plurality of chips210can be released from the handling carrier200by means of debonding (e.g., laser debonding) at least corresponding sections of the adhesive layer202of the handling carrier200. When using temporary bonding and laser debonding of glass carriers (e.g., wafers), in a first step (cf.FIG. 3), the adhesive layer can be exposed through the glass carrier by means of a laser270(e.g., excimer laser (e.g., 248 nm (KrF) excimer laser)) that scans over the entire carrier surface or at least over corresponding sections of the carrier surface, wherein the laser is focused on the adhesive layer, such that the laser energy causes a material de-composition of the adhesive layer, thereby opening the bond layer (adhesive layer). In a second step, the glass carrier can be detached, and in a third step, adhesive residues can be cleansed.

FIG. 2dshows a cross sectional view of an intermediate product of the manufacturing of the device after the step104of selectively attaching the second surface212of a subset (e.g. proper subset) of the plurality of chips210to a conveyor carrier230by means of a structured adhesive layer232. In other words,FIG. 2dshows a conveyor chip bonding.

The structured adhesive layer232can be disposed on a surface of the conveyor carrier230. The structured adhesive layer232can be obtained, for example, by providing the conveyor carrier230with an adhesive layer disposed thereon, and structuring the adhesive layer of the conveyor carrier230based on a two-dimensional pattern defining the subset (e.g., proper subset) of the plurality of chips210.

The conveyor carrier230can be, for example, a glass carrier or glass wafer (i.e., a carrier wafer comprising glass or consisting of glass).

InFIG. 2dit is exemplarily assumed that the conveyor carrier230is attached to the subset (e.g., proper subset) of the plurality of chips210that are attached to the donor carrier220. Thereby, it is noted that depending on whether the chips210have to be processed (e.g., a metallization layer has to be provided on the first surface212of the chips and/or a solder has to be provided on the metallization layer) and/or depending on the orientation of chips210on the handling carrier200, the conveyor carrier230also can be attached directly to the subset (e.g., proper subset) of plurality of chips210that are attached to the handling carrier200, i.e., in embodiments, the steps ofFIGS. 2band 2c(providing the donor carrier and flipping the chips) can be omitted.

FIG. 2eshows a cross sectional view of an intermediate product of the manufacturing of the device after the step106of selectively releasing the subset (e.g. proper subset) of the plurality of chips210from the donor carrier220(or handling carrier200).

The subset (e.g. proper subset) of the plurality of chips210can be released from the donor carrier220(or handling carrier200) by means of debonding corresponding sections of the adhesive layer of the donor carrier220(or handling carrier200), e.g., sections of the adhesive layer of the donor carrier220(or handling carrier200) to which the subset (e.g., proper subset) of the plurality of chips210are attached.

For example, the subset (e.g. proper subset) of the plurality of chips210can be released from the donor carrier220(or handling carrier200) by means of laser debonding (cf.FIG. 3) corresponding sections of the adhesive layer of the donor carrier220(or handling carrier200).

Further, the method100can comprise a step of cleaning the first surface214of the subset of the plurality of chips210after releasing the subset (e.g. proper subset) of the plurality of chips210from the donor carrier220(or handling carrier200).

FIG. 2fshows a cross sectional view of an intermediate product of the manufacturing of the device after the step108of attaching the first surface214of the subset (e.g. proper subset) of the plurality of chips210to a substrate250of the device and after the step110of releasing the subset (e.g. proper subset) of the plurality of chips210from the conveyor carrier230.

The subset (e.g. proper subset) of the plurality of chips210can be released from the conveyor carrier230by means of debonding at least corresponding sections of the structured adhesive layer232of the conveyor carrier230(e.g., sections of the structured adhesive layer232of the conveyor layer230to which the subset (e.g., proper subset) of the plurality of chips210are attached).

For example, the subset (e.g. proper subset) of the plurality of chips210can be released from the conveyor carrier230by means of laser debonding (cf.FIG. 3) at least corresponding sections of the structured adhesive layer232of the conveyor carrier230.

As indicated inFIG. 2fby way of example, the method100allows to attach different chips (e.g., μLEDs of different colors) to the same substrate250, by means of sequential attaching (e.g., bonding) the different chips to the substrate250of the device and debonding (e.g., laser debonding (laser release)) from the respective conveyor carrier, as described with respect toFIG. 4in further detail.

FIG. 4ashows a top view of an intermediate product of the manufacturing of the device after a step of providing three handling carriers (or donor carriers), each handling carrier (or donor carrier) having attached thereto a plurality of chips. In detail, a first plurality of chips210_1can be attached to a first handling carrier (or donor carrier), a second plurality of chips210_2can be attached to a second handling carrier (or donor carrier), and a third plurality of chips210_3can be attached to a third handling carrier (or donor carrier).

The first plurality of chips210_1can be arranged in a two-dimensional array on the first handling carrier (or donor carrier), wherein a proper subset of the first plurality of chips210_1that are to be transferred and attached to the substrate250of the device can be defined by a two-dimensional pattern. Similarly, the second plurality of chips210_2can be arranged in a two-dimensional array on the second handling carrier (or donor carrier), wherein a proper subset of the second plurality of chips210_2that are to be transferred and attached to the substrate250of the device can be defined by a two-dimensional pattern. The third plurality of chips210_3can be arranged in a two-dimensional array on the third handling carrier (or donor carrier), wherein a proper subset of the third plurality of chips210_3that are to be transferred and attached to the substrate250of the device can be defined by a two-dimensional pattern.

As exemplarily indicated inFIG. 4a, according to the respective two-dimensional pattern, at least every 2nd chip in a row direction and/or at least every 2nd chip in a column direction can be selected out of the corresponding two-dimensional array of chips, to obtain the corresponding proper subset of chips.

FIG. 4bshows a top view of an intermediate product of the manufacturing of the device after attaching the proper subsets of the first, second and third pluralities of chips210_1,210_2,210_3to the substrate250of the device.

InFIGS. 4aand 4bit is exemplarily assumed that the first plurality of chips210_1are μLEDs of a first color (e.g., red), the second plurality of chips210_2are μLEDs of a second color (e.g., green), and the third plurality of chips210_3are μLEDs of a third color (e.g., blue). Naturally, in embodiments, the plurality of chips also could be semiconductor chips, optical filters, ferromagnets, high-K dielectrics, tilting mirrors, micro lenses, laser diodes, or photo detectors.

As becomes obvious, embodiments provide a collective picking of a chip (e.g., LED) selection (=proper subset of the corresponding plurality of chips), and a collective transfer and bonding to the substrate250of the device. Thereby, no handling of single chip dies is required.

Subsequently, embodiments of the different steps of the method100for manufacturing the device are described in further detail.

FIG. 5shows a cross-sectional view of an intermediate product of the manufacturing of the device after a step of providing a handling carrier200having attached thereto a plurality of chips210by means of an adhesive layer202. In other words,FIG. 5shows a chip (e.g., LED) wafer with (e.g., AuSn) contacts.

The first surface of the chips210can be pre-processed, e.g., comprising a metallization layer and optionally having a solder disposed thereon, such as an AuSn layer stack. Alternatively, the method100can comprise a step of processing the first surface214of the chips210, such as providing the metallization layer on the first surface214of the chips210and/or providing a solder on the metallization layer.

The handling carrier200can be, for example, a glass carrier or glass wafer (i.e., a carrier wafer comprising glass or consisting of glass).

In embodiments, the method100can comprise a step (e.g., step 1) of providing a chip wafer or chip substrate (e.g., with the plurality of chips), wherein the wafer/substrate can be (temporary) adhered on (or attached to) a handling wafer200, wherein the wafer/substrate can be diced in the chips to be bonded.

In embodiments, optionally the wafer/substrate can be thinned, e.g., if the target thickness has not been obtained.

In embodiments, optionally, metallizations can be deposited on the wafer/substrate for subsequent bonding, e.g., if metallizations are not yet present.

For example, for soldering with AuSn, an AuSn solder can be used, wherein a solderable metallization can be deposited on the target substrate.

For example, for soldering with AuSn, an Sn solder can be used, wherein Au can be deposited on the target substrate, such that an AuSn solder is formed during bonding.

For example, for soldering with AuSn, a solderable metallization (e.g., Ti/Pt/Au) can be used, wherein AuSn solder can be deposited on the target substrate.

For example, for soldering in general, a solder component can be used, wherein a solderable metallization can be deposited on the target substrate.

For example, for soldering in general, a solderable metallization can be used, wherein a solder component can be deposited on the target substrate.

For example, for pressure welding, Au or nanoporous Au can be used, wherein Au or nanoporous Au can be deposited on the target substrate.

In embodiments, the wafer/substrate can be diced preferably by a dry etching processes, laser dicing or plasma etching.

Preferably, in embodiments, an AuSn solder can be used. For example, AuSn soldering can be performed with a stack of Au and Sn at an eutectic temperature of approx. 280° C. or higher. The layer stack on the (e.g., semiconductor) chips can be adjusted to the eutectic composition with an excess of Au. Soldering initially creates the eutectic composition with the low melting point of 280° C., then the excess of gold shifts the eutectic composition of the compound to a gold-rich composition that solidifies (Transient Liquid Phase Bonding, TLPB), so that the solder connection requires a higher temperature of approx. 510° C. for a long time to melt again. Thus, when the bonding the second subset of the plurality of chips to the substrate of the device, the solder connection of the first bonding process by means of which the first plurality of chips are bonded to the substrate of the device does not melt. When bonding the third plurality of chips to the substrate of the device, the bond connection of the first plurality of chips and of the second plurality of chips no longer melts.

FIG. 6ashows a cross-sectional view of an intermediate product of the manufacturing of the device during a step of attaching the first surface214of the plurality of chips210or a proper subset of the plurality of chips210to a donor carrier220by means of an adhesive layer222of the donor carrier220.

FIG. 6bshows a cross sectional view of an intermediate product of the manufacturing of the device after a step of releasing the plurality of chips210or the proper subset of the plurality of chips210from the handling carrier200.

FIG. 6cshows a cross-sectional view of an intermediate product of the manufacturing of the device after a step of providing a handling carrier200having attached thereto a plurality of chips210by means of an adhesive layer202.

FIG. 6dshows a cross sectional view of an intermediate product of the manufacturing of the device after a step of flipping the plurality of chips210or the proper subset of the plurality of chips210by means of the donor carrier220and removing the handling carrier200from the plurality of chips210or the proper subset of the plurality of chips210.

As indicated inFIGS. 6a-6d, the donor carrier220(e.g., donor wafer (glass)) can be used for flipping the plurality of chips210or the proper subset of the plurality of chips210, i.e. chips frontside down.

In embodiments, the method100optionally can comprise a step (e.g., step 2) of re-bonding the wafer/substrate to a second carrier (=donor carrier)220with an adhesive layer222.

Thereby, in embodiments, for subsequently offering the desired front and rear of the chips, the handling carrier can become the donor carrier without re-bonding.

Further, in embodiments, optionally, the adhesive layer can be structured into adhesive figures, wherein the adhesive figures can be significantly smaller than the chip dimensions and several adhesive figures can be allocated to one chip (cf. DE 10 2014 201 635 B3).

Further, in embodiments, optionally, the carrier (donor) carrier can diced with the diced chips arranged thereon into donor tiles.

FIG. 7shows a cross sectional view of an intermediate product of the manufacturing of the device after the steps of selectively attaching a subset (e.g. proper subset) of the plurality of chips210to a conveyor carrier230and selectively releasing a proper subset of the plurality of chips210from the donor carrier220(or handling carrier200).

As indicated inFIG. 7, in embodiments, the method100can comprise a step (e.g., step 3) of providing transfer tiles. In detail, a conveyor carrier230(e.g., transfer wafer (substrate)) can be provided with a structured assembly of (temporary) adhesive joints232.

For example, for each chip to be transferred, at least one adhesive joint can be provided.

For example, adhesive joints can be lithographically structured on the conveyor carrier230(e.g., transfer wafer/substrate).

For example, adhesive joints can be structured by stamping or printing the adhesive.

For example, the conveyor carrier230(e.g., transfer wafer/substrate) can be diced into transfer tiles.

FIG. 8ashows a cross sectional view of an intermediate product of the manufacturing of the device after a step of providing a conveyor carrier230having disposed thereon a structured adhesive layer232. In other words,FIG. 8ashows a glass substrate230with structured adhesive layer232, coupon level (glass chip).

FIG. 8bshows a cross sectional view of an intermediate product of the manufacturing of the device after a step of selectively attaching a subset (e.g. proper subset) of the plurality of chips210to a conveyor carrier230by means of the structured adhesive layer232. In other words,FIG. 8bshows a bonding of conveyor substrate230to donor substrate220using a precise alignment. For example, the alignment can be performed at conveyor bonding temperature.

FIG. 8cshows a cross sectional view of an intermediate product of the manufacturing of the device after the step106of selectively releasing the subset (e.g. proper subset) of the plurality of chips210from the donor carrier220(or handling carrier200) by means of laser270debonding. In other words,FIG. 8cshows a laser release of the conveyor230and a transfer of chips (e.g., LEDs) defined by the design of the adhesive232of the conveyor substrate230. Thereby, pitch adjustment can be performed for each type of chip (e.g., color).

As shown inFIGS. 8a-8c, in embodiments, the method100can comprise a step (e.g., step 4) of transferring the chips210(e.g., a subset (e.g., proper subset) of the plurality of chips210) from the donor carrier220(e.g., donor wafer/substrate) or from the donor tile to the conveyor carrier230or transfer tile.

For example, the adhesive joints232of the transfer tiles can be aligned to the chips210on the donor carrier220(e.g., donor wafer/substrate) or the donor tile.

For example, the transfer tile can be bonded by means of pressure and temperature.

For example, the chips can be de-bonded from the donor wafer/substrate or from the donor tile. For instance, de-bonding can be performed by means of a laser beam through the rear of the donor carrier220(e.g., donor wafer/substrate) or the donor tile. For this, the same has to be transparent for the wavelength of the laser, wherein the laser reduces the adhesive strength of the adhesive layer222. Alternatively, de-bonding can be performed by means of force application for mechanical separation. For this, the adhesive layer222on the donor carrier220can be structured in small adhesive figures (cf. DE 10 2014 201 635 B3).

For example, after de-bonding the chips210, same can cleansed from adhesive residues.

FIG. 9shows a cross sectional view of an intermediate product of the manufacturing of the device after the step108of attaching the subset (e.g. proper subset) of the plurality of chips210to the substrate250of the device. In other words,FIG. 9shows a device (e.g., display) substrate wafer/die (e.g., silicon), wherein selected chips (=subset (e.g. proper subset) of the plurality of chips210) are soldered to the substrate250(e.g., sequentially (e.g., 1× first type chip (e.g., red LED), 1× second type chip (e.g., green LED), 1× third type of chip (e.g., blue LED)). The wafer (e.g., of the plurality of chips210) can comprise, for example, Au contacts and lines.

FIG. 10ashows a cross sectional view of an intermediate product of the manufacturing of the device after the step104of selectively attaching a subset (e.g. proper subset) of the plurality of chips210to a conveyor carrier230by means of a structured adhesive layer232. In other words,FIG. 10ashows a conveyor230bonding on chips (e.g., μLEDs) of donor220.

FIG. 10bshows a cross sectional view of an intermediate product of the manufacturing of the device during the step106of selectively releasing the subset (e.g. proper subset) of the plurality of chips210from the donor carrier220(or handling carrier200) by means of laser debonding. In other words,FIG. 10bshows (e.g., KrF) laser debonding of donor carrier220.

FIG. 10cshows a cross sectional view of an intermediate product of the manufacturing of the device after the step106of selectively releasing the subset (e.g. proper subset) of the plurality of chips210from the donor carrier220(or handling carrier200) and cleansing the subset (e.g. proper subset) of the plurality of chips210by means of a plasma.

FIG. 10dshows a cross sectional view of an intermediate product of the manufacturing of the device after cleansing the subset (e.g. proper subset) of the plurality of chips210that are attached to the conveyor carrier230by means of a plasma.

As indicated inFIGS. 10a-10c, in embodiments, the method100can comprise a step (e.g. step 5) of transferring the chips210from the conveyor carrier230(e.g., transfer tile) to a target substrate250and removing the conveyor carrier230(e.g., transfer tile).

For example, the target substrate250can comprise bondable terminal contact, solder or solder components or Au or nanoporous Au for pressure welding.

For example, the conveyor carrier230(e.g., transfer tile) can be aligned with the chips to the terminal contacts of the target substrate250.

For example, the conveyor carrier230(e.g., transfer tile) can be bonded with individual chips, e.g., by means of placing same on the target substrate and remelting the solder without contact pressure (reflow soldering), or by means of pressure and temperature for soldering or pressure welding.

For example, the conveyor carrier230(e.g., transfer tile) can be de-bonded from the chips that are bonded to the target substrate250. Thereby, de-bonding can be perfomed by means of a laser beam through the rear of the donor carrier220(e.g., donor wafer/substrate) or the donor tile. For this, the same can be transparent for the wavelength of the laser. The laser reduces the adhesive strength of the adhesive layer. Alternatively, de-bonding can be performed by means of force application for mechanical separation. For this, the adhesive layer on the donor side can be structured in small adhesive figures (cf. DE 10 2014 201 635 B3).

For example, after de-bonding, optionally the chips210can be cleansed from adhesive residues.

In embodiments, transfer bonding with above described steps 1 to 5 can be repeated for bonding chips of different wafer/substrate sources onto the same target substrate, as will become clear from the following discussion ofFIGS. 11a-11f.

FIG. 11ashows a cross sectional view of an intermediate product of the manufacturing of the device after the step108of attaching a subset (e.g. proper subset) of the first plurality of chips210_1(e.g., μLEDs of a first color (e.g., red)) to the substrate250of the device using a first conveyor carrier230_1. In other words,FIG. 11ashows a bonding of the first conveyor230_1(e.g., R-conveyor (i.e., with R (=red) μLEDs)).

FIG. 11bshows a cross sectional view of an intermediate product of the manufacturing of the device during the step110of releasing the subset (e.g. proper subset) of the first plurality of chips210_1from the first conveyor carrier230_1, e.g. by means of laser270debonding. In other words,FIG. 11bshows a laser debonding of the first conveyor230_1(e.g., R-conveyor).

FIG. 11cshows a cross sectional view of an intermediate product of the manufacturing of the device after the step108of attaching a subset (e.g. proper subset) of a second plurality of chips210_2(e.g., μLEDs of a second color (e.g., green)) to the substrate250of the device using a second conveyor carrier230_2. In other words,FIG. 11cshows a bonding of the second conveyor230_2(e.g., G-conveyor (i.e., with G (=green) μLEDs)).

FIG. 11dshows a cross sectional view of an intermediate product of the manufacturing of the device during the step110of releasing the subset (e.g. proper subset) of the second plurality of chips210_2from the second conveyor carrier230_2, e.g., by means of laser270debonding. In other words,Fig. 11dshows a laser debonding of the second conveyor230_2(e.g., G-conveyor).

FIG. 11eshows a cross sectional view of an intermediate product of the manufacturing of the device after the step108of attaching a subset (e.g. proper subset) of a third plurality of chips210_3(e.g., μLEDs of a third color (e.g., blue)) to the substrate250of the device using a third conveyor carrier230_3. In other words,FIG. 112shows a bonding of the third conveyor230_3(e.g., B-conveyor (i.e., with B (=blue) μLEDs)).

FIG. 11fshows a cross sectional view of an intermediate product of the manufacturing of the device during the step110of releasing the subset (e.g. proper subset) of the third plurality of chips210_3from the third conveyor carrier230_3, e.g., by means of laser270debonding. In other words,FIG. 11fshows a laser debonding of the third conveyor230_3(e.g., B-conveyor).

In embodiments, chips can be LEDs, in particular, mini-LEDs or micro-LEDs (below 100 μm edge length). Target substrate250can be a display or part of a display (e.g., a glass substrate or a flexible circuit carrier) or a semi-conductor chip for active control of the LEDs. Also, several LED chips or wafers having different wavelengths red, green and blue, can be bonded offset to one another in order to generate RGB cells and to form a color display.

In embodiments, chips can be VCSEL (=vertical-cavity surface-emitting laser) that are arranged in one- or two-dimensional arrays on a circuit carrier. Here, different wavelengths can be arranged side by side in order to transmit signals in parallel in the same waveguide or in the same optical fiber and in that way to increase the bandwidth.

Embodiments provide the advantage that no specifically designed components (e.g., without removable/breakable holding rod) and no expensive tools are required. Rather, standard equipment, such as lithography and micro galvanics, wafer bonder, flip chip bonder, laser for de-bonding, and plasma cleaning can be used.

Embodiments provide the advantage that AuSn solder is extremely solid compared to adhesive processes or conventional soldering AuSn compounds, such as a low thermal resistance for good cooling, corrosion-proof, electromigration-resistant and a high melting point.

The apparatus described herein, or any components of the apparatus described herein, may be implemented at least partially in hardware and/or in software.

The methods described herein, or any components of the apparatus described herein, may be performed at least partially by hardware and/or by software.

LITERATURE