Light emitting device for display and display apparatus having the same

A light emitting device for a display including a first LED stack configured to generate light having a first peak wavelength, a second LED stack disposed under the first LED stack, and configured to generate light having a second peak wavelength, a third LED stack disposed under the second LED stack, and configured to generate light having a third peak wavelength, and a floating reflection layer disposed over the first LED stack, and configured to reflect light having the first peak wavelength, in which the first peak wavelength is longer than the second and third peak wavelengths.

BACKGROUND

Field

Exemplary embodiments relate to a light emitting device for a display and a display apparatus, and, more particularly, to a light emitting device having a stacked structure of a plurality of LEDs for a display, and a display apparatus including the same.

Discussion of the Background

As an inorganic light source, light emitting diodes have been used in various fields including displays, vehicular lamps, general lighting, and the like. With various advantages of the light emitting diodes, such as longer lifespan, lower power consumption, and rapid response than conventional light sources, light emitting diodes have been replacing conventional existing light sources.

Light emitting diodes have been used as backlight light sources in display apparatuses. However, LED displays that directly display images using the light emitting diodes have been recently developed.

In general, a display apparatus realizes various colors through mixture of blue, green, and red light. In order to display various images, the display apparatus may include a plurality of pixels that each includes sub-pixels corresponding to blue, green, and red light, respectively. As such, a color of a certain pixel is determined based on the colors of the sub-pixels and images can be displayed through combination of such pixels.

Since LEDs can emit various colors depending upon materials thereof, it is possible to provide a display apparatus by arranging individual LED chips emitting blue, green, and red light on a two-dimensional plane. However, when one LED chip is provided to each sub-pixel, the number of LED chips may be increased, which may require excessive time for a mounting process during manufacture.

Since the sub-pixels are arranged on two-dimensional plane in the display apparatus, a relatively large area is occupied by one pixel that includes the sub-pixels for blue, green, and red light. As such, an area of each LED chip may be reduced in order to arrange the sub-pixels in a restricted area. However, reduction in sizes of the LED chips makes it difficult to mount the LED chips, and results in reduction in luminous areas of the LED chips.

A display apparatus that realizes various colors needs to consistently provide high-quality white light. Conventional TVs use an RGB mixing ratio of 3:6:1 to realize the standard white light of D65. More particularly, luminance intensity of red is higher than that of blue, and luminance intensity of green is relatively the highest. However, conventional LED chips that are mainly used as blue LEDs have relatively very high luminance intensity as compared to that of other LEDs, and thus, it is difficult to match the RGB mixing ratio in the display apparatus using LED chips.

SUMMARY

Light emitting devices for a display constructed according to exemplary embodiments of the invention are capable of increasing an area of each sub-pixel in a restricted pixel area and a display apparatus including the same.

Exemplary embodiments also provide a light emitting device for a display that is capable of reducing a time associated with a mounting process and a display apparatus including the same.

Exemplary embodiments still provide a light emitting device for a display that is capable of increasing the production yield and a display apparatus including the same.

Exemplary embodiments further provide a light emitting device and a display apparatus that are capable of easily controlling an RGB mixing ratio.

A light emitting device for a display according to an exemplary embodiment includes a first LED stack configured to generate light having a first peak wavelength, a second LED stack disposed under the first LED stack, and configured to generate light having a second peak wavelength, a third LED stack disposed under the second LED stack, and configured to generate light having a third peak wavelength, and a floating reflection layer disposed over the first LED stack, and configured to reflect light having the first peak wavelength, in which the first peak wavelength is longer than the second and third peak wavelengths.

The first, second, and third LED stacks may be configured to emit red light, green light, and blue light, respectively.

The floating reflection layer may include Au, Al, Ag, Pt, or an alloy thereof.

The floating reflection layer may include a distributed Bragg reflector.

The light emitting device may further include a first intermediate insulation layer interposed between the first LED stack and the floating reflection layer.

The light emitting device may further include a second intermediate insulation layer covering the floating reflection layer.

The light emitting device may further include upper connectors disposed on the second intermediate insulation layer, in which each of the upper connectors may be electrically connected to at least one of the first, second, and third LED stacks.

The light emitting device may further include a first bonding layer interposed between the second LED stack and the third LED stack, a second bonding layer interposed between the first LED stack and the second LED stack, a lower insulation layer interposed between the second bonding layer and the second LED stack, first lower buried layers passing through the lower insulation layer and the second LED stack to be electrically connected to a first conductivity type semiconductor layer and a second conductivity type semiconductor layer of the third LED stack, respectively, and first upper buried layers passing through the first LED stack and the second bonding layer to be electrically connected to the first lower buried layers, in which the upper connectors cover the first upper buried layers and are electrically connected to the first upper buried layers, respectively.

The light emitting device may further include a first electrode pad electrically connected to the first conductivity type semiconductor layer of the third LED stack, and a second electrode pad disposed on the second conductivity type semiconductor layer of the third LED stack, in which the first lower buried layers may be electrically connected to the first electrode pad and the second electrode pad, respectively.

The light emitting device may further include a second lower buried layer passing through the lower insulation layer to be electrically connected to a first conductivity type semiconductor layer of the second LED stack, and a second upper buried layer passing through the first LED stack and the second bonding layer to be electrically connected to the second lower buried layer, in which a first one of the upper connectors may be electrically connected to the first conductivity type semiconductor layer of the second LED stack through the second upper buried layer and the second lower buried layer.

The first one of the upper connectors may include an upper common connector electrically connected to first conductivity type semiconductor layers of the first, second, and third LED stacks.

The light emitting device may further include a third upper buried layer passing through the first LED stack, the second bonding layer, and the lower insulation layer to be electrically connected to a second conductivity type semiconductor layer of the second LED stack, in which a second one of the upper connectors may be connected to the third upper buried layer to be electrically connected to the second conductivity type semiconductor layer of the second LED stack.

A third one of the upper connectors may be electrically connected to a second conductivity type semiconductor layer of the first LED stack.

The light emitting device may further include bump pads disposed on the upper connectors, in which the bump pads may include first, second, and third bump pads and a common bump pad, the common bump pad may be commonly electrically connected to the first, second, and third LED stacks, and the first, second, and third bump pads may be electrically connected to the first, second, and third LED stacks, respectively.

The light emitting device may further include a first transparent electrode interposed between the first LED stack and the second LED stack, and in ohmic contact with a lower surface of the first LED stack, a second transparent electrode interposed between the first LED stack and the second LED stack, and in ohmic contact with an upper surface of the second LED stack, and a third transparent electrode interposed between the second LED stack and the third LED stack, and in ohmic contact with an upper surface of the third LED stack,

Each of the first LED stack and the second LED stack may have a roughened surface by texturing.

Upper and lower surfaces of the third LED stack may have a flat surface without texturing.

The first, second, and third LED stacks are stacks may not include a growth substrate.

The first, second, and third LED stacks may be configured to be independently driven, light generated from the first LED stack may be configured to be emitted to the outside by passing through the second LED stack and the third LED stack, and light generated from the second LED stack may be configured to be emitted to the outside by passing through the third LED stack.

A display apparatus according to another exemplary embodiment includes a circuit board, and a plurality of light emitting devices arranged on the circuit board, each of the light emitting devices including a first LED stack configured to generate light having a first peak wavelength, a second LED stack disposed under the first LED stack, and configured to generate light having a second peak wavelength, a third LED stack disposed under the second LED stack, and configured to generate light having a third peak wavelength, and a floating reflection layer disposed over the first LED stack, and configured to reflect light having the first peak wavelength, in which the first peak wavelength is longer than the second and third peak wavelengths.

DETAILED DESCRIPTION

A light emitting device for a display according to an exemplary embodiment includes: a first LED stack generating light of a first peak wavelength; a second LED stack disposed under the first LED stack, and generating light of a second peak wavelength; a third LED stack disposed under the second LED stack, and generating light of a third peak wavelength; and a floating reflection layer disposed over the first LED stack, and reflecting light of the first peak wavelength, in which the first peak wavelength is longer than the second and third peak wavelengths.

Hereinafter, the second LED stack is described as being disposed under the first LED stack, and the third LED stack is described as being disposed under the second LED stack, however, in some exemplary embodiments, the light emitting device may be flip-bonded. In this case, upper and lower positions of these first, second, and third LED stacks may be reversed.

As used herein, the term “floating reflection layer” means a reflection layer spaced apart from the first LED stack. In particular, the floating reflection layer is not directly electrically connected to the first LED stack.

For example, the first, second, and third LED stacks may emit red light, green light, and blue light, respectively.

The first, second, and third LED stacks can be driven independently, light generated in the first LED stack may be emitted to the outside through the second LED stack and the third LED stack, and light generated in the second LED stack may be emitted to the outside through the third LED stack.

The floating reflection layer may include Au, Al, Ag, Pt, or alloys thereof. For example, the Au alloy may include AuGe, AuBe, AuTe, AuZn, or the like.

The floating reflection layer includes a distributed Bragg reflector.

The light emitting device for a display may further include: a first intermediate insulation layer interposed between the first LED stack and the floating reflection layer. The first intermediate insulation layer may insulate the floating reflection layer from the first LED stack.

The light emitting device for a display may further include: a second intermediate insulation layer covering the floating reflection layer. The second intermediate insulation layer may insulate the floating reflection layer from upper connectors disposed over the floating reflection layer.

The light emitting device for a display may further include: upper connectors disposed on the second intermediate insulation layer, in which each of the upper connectors may be electrically connected to at least one of the first, second, and third LED stacks.

Moreover, the light emitting device for a display may further include: a first bonding layer interposed between the second LED stack and the third LED stack; a second bonding layer interposed between the first LED stack and the second LED stack; a lower insulation layer interposed between the first bonding layer and the third LED stack; lower buried layers passing through the lower insulation layer and the second LED stack to be electrically connected to a first conductivity type semiconductor layer and a second conductivity type semiconductor layer of the third LED stack, respectively; and upper buried layers passing through the first LED stack and the first bonding layer to be electrically connected to the lower buried layers, in which the upper connectors may include upper connectors covering the upper buried layers and electrically connected to the upper buried layers, respectively.

The light emitting device for a display may further include: an n-electrode pad electrically connected to the first conductivity type semiconductor layer of the third LED stack; and a lower p-electrode pad disposed on the second conductivity type semiconductor layer of the third LED stack, in which the lower buried layers may be electrically connected to the n-electrode pad and the lower p-electrode pad, respectively.

The light emitting device for a display may further include: a lower buried layer passing through the lower insulation layer to be electrically connected to a first conductivity type semiconductor layer of the second LED stack; and an upper buried layer passing through the first LED stack and the first bonding layer to be electrically connected to the lower buried layer, in which one of the upper connectors may be electrically connected to the first conductivity type semiconductor layer of the second LED stack through the upper buried layer and the lower buried layer.

The one of the upper connectors may be an upper common connector electrically connected to first conductivity type semiconductor layers of the first, second, and third LED stacks.

The light emitting device for a display may further include: an upper buried layer passing through the first LED stack, the first bonding layer, and the lower insulation layer to be electrically connected to a second conductivity type semiconductor layer of the second LED stack, in which one of the upper connectors may be connected to the upper buried layer to be electrically connected to the second conductivity type semiconductor layer of the second LED stack.

The one of the upper connectors may be electrically connected to a second conductivity type semiconductor layer of the first LED stack.

The light emitting device for a display may further include: bump pads disposed on the upper connectors, in which the bump pads may include first, second, and third bump pads and common bump pads, the common bump pad may be commonly electrically connected to the first, second, and third LED stacks, and the first, second, and third bump pads may be electrically connected to the first, second, and third LED stacks, respectively.

The light emitting device for a display may further include: a first transparent electrode interposed between the first LED stack and the second LED stack, and in ohmic contact with a lower surface of the first LED stack; a second transparent electrode interposed between the first LED stack and the second LED stack, and in ohmic contact with an upper surface of the second LED stack; and a third transparent electrode interposed between the second LED stack and the third LED stack, and in ohmic contact with an upper surface of the third LED stack.

The first LED stack may have a roughened surface by texturing, and the second LED stack may have a roughened surface by texturing.

Upper and lower surfaces of the third LED stack may have flat surfaces without texturing.

The first, second, and third LED stacks may be stacks separated from a growth substrate, respectively.

A display apparatus according to an exemplary embodiment includes: a circuit board; and a plurality of light emitting devices arranged on the circuit board, in which each of the light emitting devices is any one of the light emitting devices set forth above.

Hereinafter, exemplary embodiments of the inventive concepts will be described in detail with reference to the accompanying drawings.

FIG. 1shows schematic perspective views of display apparatuses according to exemplary embodiments.

The display apparatus according to exemplary embodiments may be used in a VR display apparatus, such as a smart watch1000aor a VR headset1000b, or an AR display apparatus, such as augmented reality glasses1000c, but the inventive concepts are not limited thereto.

The display apparatus may include a display panel for implementing an image.FIG. 2is a schematic plan view illustrating the display panel according to an exemplary embodiment.

Referring toFIG. 2, the display panel includes a circuit board101and light emitting devices100.

The circuit board101may include a circuit for passive matrix driving or active matrix driving. In an exemplary embodiment, the circuit board101may include interconnection lines and resistors. In another exemplary embodiment, the circuit board101may include interconnection lines, transistors, and capacitors. The circuit board101may also have pads disposed on an upper surface thereof to allow electrical connection to the circuit therein.

A plurality of light emitting devices100are arranged on the circuit board101. Each of the light emitting devices100may form one pixel. The light emitting device100includes bump pads73, and the bump pads73are electrically connected to the circuit board101. For example, the bump pads73may be bonded to pads exposed on the circuit board101.

An interval between the light emitting devices100may be greater than at least a width of the light emitting device100.

A configuration of the light emitting device100according to an exemplary embodiment will be described with reference toFIG. 3,FIG. 4A,FIG. 4B, andFIG. 4C.FIG. 3is a schematic plan view of a light emitting device100according to an exemplary embodiment,FIG. 4A,FIGS. 4B, and 4Care schematic cross-sectional views taken along lines A-A′, B-B′, and C-C′ ofFIG. 3, respectively.

Hereinafter, although bump pads73r,73b,73g, and73care exemplarily illustrated and described as being disposed at an upper side in the drawings, the inventive concepts are not limited thereto. For example, in some exemplary embodiments, the light emitting device100may be flip-bonded on the circuit board101as shown inFIG. 2, and in this case, the bump pads73r,73b,73g, and73cmay be disposed at a lower side. Furthermore, in some exemplary embodiments, the bump pads73r,73b,73g, and73cmay be omitted.

Referring toFIG. 3,FIG. 4A,FIG. 4B, andFIG. 4C, the light emitting device100may include a first LED stack23, a second LED stack33, a third LED stack43, a first transparent electrode25, a second transparent electrode35, a third transparent electrode45, an n-electrode pad47a, a lower p-electrode pad47b, an upper p-electrode pad37b, lower buried layers55b,55cb, and55cg, upper buried layers65r,65b,65g,65cr,65cg, and65cb, a first sidewall insulation layer53, an upper common connector67c, a first upper connector67r, a second upper connector67g, a third upper connector67b, a first bonding layer49, a second bonding layer59, a lower insulation layer51, a first intermediate insulation layer61, a floating reflection layer62, a second intermediate insulation layer63, an upper insulation layer71, and bump pads73a,73b,73c, and73d. The light emitting device100may further include through holes23h1,23h2,23h3,23h4, and23h5passing through the first LED stack23, and through holes33h1and33h2passing through the second LED stack33.

As shown inFIGS. 4A, 4B, and 4C, the first, second, and third LED stacks23,33and43according to exemplary embodiments are stacked in the vertical direction. Each of the LED stacks23,33, and43is grown on different growth substrates, but each of the growth substrates are removed without being retained in a final light emitting device100. As such, the light emitting device100may not include any growth substrate. However, the inventive concepts are not limited thereto, and in some exemplary embodiments, at least one growth substrate may be included in the light emitting device100.

The first LED stack23, the second LED stack33, and the third LED stack43include a first conductivity type semiconductor layer23a,33a, and43a, a second conductivity type semiconductor layer23c,33c, and43c, and active layers interposed therebetween, respectively. The active layers may have multiple quantum well structures, for example.

In an exemplary embodiment, the second LED stack33is disposed under the first LED stack23, and the third LED stack43is disposed under the second LED stack33. Light generated in the first, second, and third LED stacks23,33, and43may be emitted to the outside through the third LED stack43. For example, the first LED stack23may emit light of a red color, the second LED stack33may emit light of a green color, and the third LED stack may emit light of a blue color. Accordingly, the first, second, and third LED stacks23,33, and43may be stacked in a sequence to emit red light/green light/blue light from top to bottom. In another exemplary embodiment, the second LED stack33and the third LED stack43may change their positions with each other. Accordingly, the first, second, and third LED stacks23,33, and43may be stacked in a sequence to emit red light/blue light/green light from top to bottom. In this case, light generated from the first, second, and third LED stacks23,33, and43may be emitted to the outside through the second LED stack33.

The first LED stack23emits light of a first peak wavelength which is a longer wavelength than those of light emitted from the second and third LED stacks33and43. The second LED stack33emits light of a second peak wavelength which is a longer wavelength than that of light emitted from the third LED stack43. The third LED stack43emits light of a third peak wavelength which is a shorter wavelength than the first and second peak wavelengths. For example, the first LED stack23may be an inorganic light emitting diode emitting red light, the second LED stack33may be an inorganic light emitting diode emitting green light, and the third LED stack43may be an inorganic light emitting diode emitting blue light. The first LED stack23may include an AlGaInP-based well layer, the second LED stack33may include an AlGaInP-based or AlGaInN-based well layer, and the third LED stack43may include an AlGaInN-based well layer.

Since the first LED stack23emits light having a longer wavelength than those emitted from the second and third LED stacks33and43, light generated from the first LED stack23may be emitted to the outside after passing through the second and third LED stacks33and43. In addition, since the second LED stack33emits light having a longer wavelength than that emitted from the third LED stack43, light generated from the second LED stack33may be emitted to the outside after passing through the third LED stack43. When the second LED stack33and the third LED stack43change their positions with each other, a portion of light generated from the third LED stack43may be absorbed by the second LED stack33and lost.

The first conductivity type semiconductor layer23a,33a, and43aof each of the LED stacks23,33, and43may be an n-type semiconductor layer, and the second conductivity type semiconductor layer23b,33b, and43bthereof may be a p-type semiconductor layer. In addition, according to the illustrated exemplary embodiment, an upper surface of the first LED stack23is an n-type semiconductor layer23a, an upper surface of the second LED stack33is a p-type semiconductor layer33b, and an upper surface of the third LED stack43is a p-type semiconductor layer43b. More particularly, the first LED stack23has a stacked sequence of semiconductor layers different from those of the second and third LED stacks33and43. The semiconductor layers of the second LED stack33are stacked in the same order as the semiconductor layers of the third LED stack43, and thus, process stability may be enhanced, which will be described in more detail later with reference to a manufacturing method. However, the stacked sequence of semiconductor layers of the first, second, and third LED stacks23,33, and43is not limited thereto.

The second LED stack33includes a mesa etching region, in which a portion of the second conductivity type semiconductor layer33bis removed to expose an upper surface of the first conductivity type semiconductor layer33a. As shown inFIG. 3andFIG. 4A, lower buried layers55band55cbare formed through the mesa etching region of the second LED stack33, and a lower buried layer55cgis also formed on the mesa etching region of the second LED stack33.

The third LED stack43also includes a mesa etching region, in which a portion of the second conductivity type semiconductor layer43bis removed to expose an upper surface of the first conductivity type semiconductor layer43a. The first LED stack23, however, may not include a mesa etching region.

The first LED stack23may have a roughened surface23r. The roughened surface23rmay be formed on a surface of the first conductivity type semiconductor layer23a, but the inventive concepts are not limited thereto. The roughened surface23rimproves the light extraction efficiency of the first LED stack23, thereby increasing the luminous intensity of light generated in the first LED stack23. The roughened surface23rmay be formed on an entire surface of the first conductivity type semiconductor layer23a, but the inventive concepts are not limited thereto. For example, in some exemplary embodiments, a region around where the through holes are formed or a region where the electrical connection is formed may be formed flat.

In addition, the second LED stack33may have a roughened surface33r. The roughened surface33rmay be formed on a surface of the second conductivity type semiconductor layer33b, but the inventive concepts are not limited thereto. The roughened surface33rimproves the light extraction efficiency of the second LED stack33, thereby increasing the luminous intensity of light generated in the second LED stack33. The roughened surface33rmay be formed on an entire surface of the second conductivity type semiconductor layer33b, but the inventive concepts are not limited thereto. For example, in some exemplary embodiments, a region around where the through holes are formed or a region where the electrical connection is formed, may be formed flat.

The through holes33h1and33h2may be formed through the first conductivity type semiconductor layer33aexposed in the mesa etching region. The through holes23h1,23h2,23h3,23h4, and23h5may pass through the first LED stack23, and particularly, may pass through the first and second conductivity type semiconductor layers23aand23b.

Unlike the first and second LED stacks23and33, the third LED stack43may not have a roughened surface formed by surface texturing. Accordingly, the luminous intensity of the first and second LED stacks23and33may be adjusted to be relatively higher than that of the third LED stack43.

The first LED stack23, the second LED stack33, and the third LED stack43according to the illustrated exemplary embodiment may be stacked to overlap one another, and may also have substantially the same luminous area. However, the luminous area of the first LED stack23may be smaller than that of the second LED stack33, and the luminous area of the second LED stack33may be smaller than that of the third LED stack43, by the through holes23h1,23h2,23h3,23h4, and23h5and the through holes33h1and33h2. In addition, a side surface of the light emitting device100may be inclined, such that a width of the light emitting device100may be gradually increasing from the first LED stack23to the third LED stack43. As such, the luminous area of the third LED stack43may be larger than that of the first LED stack23. An inclination angle of the side surface of the light emitting device100with respect to the upper surface of the third LED stack43may be about 75 degrees to about 90 degrees. When the inclination angle is less than 75 degrees, the luminous area of the first LED stack23may become too small, and thus, it may be difficult to reduce a size of the light emitting device100.

The first transparent electrode25is disposed between the first LED stack23and the second LED stack33. The first transparent electrode25is in ohmic contact with the second conductivity type semiconductor layer23bof the first LED stack23, and transmits light generated from the first LED stack23. The first transparent electrode25may be formed using a transparent oxide layer or a metal layer, such as indium tin oxide (ITO). The first transparent electrode25may cover an entire surface of the second conductivity type semiconductor layer23bof the first LED stack23, and a side surface thereof may be disposed to be flush with a side surface of the first LED stack23. More particularly, the side surface of the first transparent electrode25may not be covered with the second bonding layer59. Furthermore, the through holes23h1,23h2,23h3, and23h4may pass through the first transparent electrode25, and thus, the first transparent electrode25may be exposed by the sidewalls of the through holes23h1,23h2,23h3, and23h4. Meanwhile, the through hole23h5exposes an upper surface of the first transparent electrode25. However, the inventive concepts are not limited thereto, and in some exemplary embodiments, the first transparent electrode25may be partially removed along an edge of the first LED stack23, and thus, at least a portion of the side surface of the first transparent electrode25may be covered with the second bonding layer59. In addition, when the first transparent electrode25is previously patterned and removed in a region where the through holes23h1,23h2,23h3, and23h4are formed according to other exemplary embodiments, the first transparent electrode25may not be exposed by the sidewalls of the through holes23h1,23h2,23h3, and23h4.

The second transparent electrode35is in ohmic contact with the second conductivity type semiconductor layer33bof the second LED stack33. As shown in the drawings, the second transparent electrode35contacts the upper surface of the second LED stack33between the first LED stack23and the second LED stack33. The second transparent electrode35may be formed of a metal layer or a conductive oxide layer that is transparent to red light. For example, the conductive oxide layer may include SnO2, InO2, ITO, ZnO, IZO, or the like. In particular, the second transparent electrode35may be formed of ZnO, which may be formed as a single crystal on the second LED stack33. In this manner, the ZnO may have favorable electrical and optical characteristics as compared with the metal layer or other conductive oxide layers. In particular, ZnO has a strong bonding force to the second LED stack33, and remains undamaged even when the growth substrate is separated using a laser lift-off process or the like during manufacture.

The second transparent electrode35may be partially removed along an edge of the second LED stack33, and, accordingly, an outer side surface of the second transparent electrode35is not exposed to the outside, but is covered with the lower insulation layer51. In particular, the side surface of the second transparent electrode35is recessed inwardly than that of the second LED stack33, and a region where the second transparent electrode35is recessed is filled with the lower insulation layer51and/or the second bonding layer59. The second transparent electrode35may also be recessed near the mesa etching region of the second LED stack33, and the recessed region may be filled with the lower insulation layer51or the second bonding layer59.

The third transparent electrode45is in ohmic contact with the second conductivity type semiconductor layer43bof the third LED stack43. The third transparent electrode45may be disposed between the second LED stack33and the third LED stack43, and contacts the upper surface of the third LED stack43. The third transparent electrode45may be formed of a metal layer or a conductive oxide layer that is transparent to red light and green light. For example, the conductive oxide layer may include SnO2, InO2, ITO, ZnO, IZO, or the like. In particular, the third transparent electrode45may be formed of ZnO, which may be formed as a single crystal on the third LED stack43. In this manner, the ZnO may have favorable electrical and optical characteristics as compared with the metal layer or other conductive oxide layers. In particular, ZnO has a strong bonding force to the third LED stack43, and remains undamaged even when the growth substrate is separated using the laser lift-off process or the like during manufacture.

The third transparent electrode45may be partially removed along an edge of the third LED stack43, and, accordingly, an outer side surface of the third transparent electrode45is not exposed to the outside, but is covered with the first bonding layer49. In particular, the side surface of the third transparent electrode45is recessed inwardly than that of the third LED stack43, and a region where the third transparent electrode45is recessed is filled with the first bonding layer49. The third transparent electrode45is also recessed near the mesa etching region of the third LED stack43, and the recessed region is filled with the first bonding layer49.

The second transparent electrode35and the third transparent electrode45are recessed as described above, and thus, the side surfaces of the second transparent electrode35and the third transparent electrode45may be prevented from being exposed to an etching gas, thereby improving the production yield of the light emitting device100.

In the illustrated exemplary embodiment, the second transparent electrode35and the third transparent electrode45may be formed of the same conductive oxide layer, for example, ZnO, and the first transparent electrode25may be formed of a different conductive oxide layer from the second and third transparent electrodes35and45, such as ITO. However, the inventive concepts are not limited thereto, and each of the first, second, and third transparent electrodes25,35, and45may include the same material, or at least one of the transparent electrode may include a different material.

The n-electrode pad47ais in ohmic contact with the first conductivity type semiconductor layer43aof the third LED stack43. The n-electrode pad47amay be disposed on the first conductivity type semiconductor layer43aexposed through the second conductivity type semiconductor layer43b, that is, in the mesa etching region. The n-electrode pad47amay be formed of, for example, Cr/Au/Ti. An upper surface of the n-electrode pad47amay be placed higher than that of the second conductivity type semiconductor layer43b, and further, higher than that of the third transparent electrode45. For example, a thickness of the n-electrode pad47amay be about 2 μm or more. The n-electrode pad47amay have a shape of a truncated cone, but the inventive concepts are not limited thereto. The n-electrode pad47amay have various shapes, such as a truncated pyramid, a cylindrical shape, or a square cylindrical shape.

The lower p-electrode pad47bmay include substantially the same material as the n-electrode pad47a. An upper surface of the lower p-electrode pad47bis located at the substantially same elevation as the n-electrode pad47a, and, accordingly, a thickness of the lower p-electrode pad47bmay be less than that of the n-electrode pad47a. More particularly, the thickness of the lower p-electrode pad47bmay be approximately equal to a thickness of a portion of the n-electrode pad47aprotruding above the third transparent electrode45. For example, the thickness of the lower p-electrode pad47bmay be about 1.2 μm or less. Since the upper surface of the lower p-electrode pad47bis located at substantially the same elevation as that of the n-electrode pad47a, the lower p-electrode pad47band the n-electrode pad47amay be simultaneously exposed when the through holes33h1and33h2are formed. When the elevations of the n-electrode pad47aand the lower p-electrode pad47bare different, any one of the electrode pads may be damaged in the etching process. As such, the elevations of the n-electrode pad47aand the lower p-electrode pad47bare set to be approximately equal, and thus, it is possible to prevent any one of the electrode pads from being damaged during the etching process or the like.

The first bonding layer49couples the second LED stack33to the third LED stack43. The first bonding layer49may couple the first conductivity type semiconductor layer33aand the third transparent electrode45therebetween. The first bonding layer49may partially contact the second conductivity type semiconductor layer43b, and may partially contact the first conductivity type semiconductor layer43aexposed by the mesa etching region. In addition, the first bonding layer49may cover the n-electrode pad47aand the lower p-electrode pad47b.

The first bonding layer49may be formed of a transparent organic material layer, or may be formed of a transparent inorganic material layer. For example, the organic material layer may include SUB, poly methylmethacrylate (PMMA), polyimide, parylene, benzocyclobutene (BCB), or the like, and the inorganic material layer may include Al2O3, SiO2, SiNx, or the like. In addition, the first bonding layer49may be formed of spin-on-glass (SOG).

The upper p-electrode pad37bmay be disposed on the second transparent electrode35. As shown inFIG. 3andFIG. 4B, the upper p-electrode pad37bmay be covered with the lower insulation layer51. The upper p-electrode pad37bmay be formed of Ni/Au/Ti, for example, and may be formed to have a thickness of about 2 μm.

The lower insulation layer51is formed on the second LED stack33, and covers the second transparent electrode35. The lower insulation layer51may also cover the mesa etching region of the second LED stack33to provide a flat upper surface. The lower insulation layer51may be formed of SiO2, for example.

The through hole33h1and the through hole33h2expose the n-electrode pad47aand the lower p-electrode pad47bthrough the lower insulation layer51, the second LED stack33, and the first bonding layer49, respectively. As described above, the through holes33h1and33h2may be formed in the mesa etching region of the second LED stack33. Meanwhile, as shown inFIG. 4B, a through hole51hexposes the first conductivity type semiconductor layer33athrough the lower insulation layer51.

The first sidewall insulation layer53covers sidewalls of the through holes33h1,33h2, and51h, and has openings exposing the bottoms of the through holes33h1,33h2, and51h. The first sidewall insulation layer53may be formed using, for example, a chemical vapor deposition technique or an atomic layer deposition technique, and may be formed of, for example Al2O3, SiO2, Si3N4, or the like.

The lower buried layers55cb,55b, and55cgmay fill the through holes33h1,33h2, and51h, respectively. The lower buried layers55cband55bare insulated from the second LED stack33by the first sidewall insulation layer53. The lower buried layer55cbmay be electrically connected to the n-electrode pad47a, the lower buried layer55bmay be electrically connected to the lower p-electrode pad47b, and the lower buried layer55cgmay be electrically connected to the first conductivity type semiconductor layer33aof the second LED stack33.

The lower buried layers55cb,55b, and55cgmay be formed using a chemical mechanical polishing technique. For example, after forming a seed layer and filling the through holes33h1,33h2, and51husing a plating technique, the lower buried layers55cb,55b, and55cgmay be formed by removing metal layers on the lower insulation layer51using the chemical mechanical polishing technique. Furthermore, a metal barrier layer may be formed before forming the seed layer.

The lower buried layers55cb,55b, and55cgmay be formed together through the same process. Accordingly, upper surfaces of the lower buried layers55cb,55b, and55cgmay be substantially flush with the lower insulation layer51. However, the inventive concepts are not limited thereto, and in some exemplary embodiments, the lower buried layers55cb,55b, and55cgmay be formed through different processes from one another.

The second bonding layer59couples the first LED stack23to the second LED stack33. As shown in the drawing, the second bonding layer59may be disposed between the first transparent electrode25and the lower insulation layer51. The second bonding layer59may include substantially the same material that may form the first bonding layer49described above, and thus, repeated descriptions thereof will be omitted to avoid redundancy.

The first intermediate insulation layer61covers the first LED stack23. The first intermediate insulation layer61may be formed of an aluminum oxide film, a silicon oxide film, or a silicon nitride film.

The floating reflection layer62is disposed on the first intermediate insulation layer61, and thus, is spaced apart from the first LED stack23. Furthermore, the floating reflection layer62may be electrically isolated from the first LED stack23. The floating reflection layer62is formed of a reflective material that reflects light generated from the first LED stack23. For example, the floating reflection layer62may be formed of a reflective metal layer, Au, Al, Ag, Pt, or an alloy thereof, such as Au alloy, which reflects red light. The floating reflection layer62may also be formed as a distributed Bragg reflector. In particular, when the floating reflection layer62is formed as a distributed Bragg reflector, the distributed Bragg reflector may be formed to have a high reflectance to red light generated from the first LED stack23. For example, considering an incident angle of light incident on the floating reflection layer62from the first LED stack23, the distributed Bragg reflector may be formed to have a high reflectance of 80% or more, and further 90% or more, over a wavelength range of about 600 nm to about 650 nm.

Light generated from the second LED stack33and the third LED stack43is generally absorbed by the first LED stack23. As such, the floating reflection layer62may selectively reflect light generated from the first LED stack23, and thus, luminous intensity of light generated from the first LED stack23may be adjusted to be relatively higher than that of light generated from the second LED stack33or the third LED stack43.

The floating reflection layer62may have openings62a. The openings62amay be located in a region where the through holes23h1,23h2,23h3,23h4,23h5, and61hare formed. However, the inventive concepts are not limited thereto, and the floating reflection layer62may be formed within a region surrounded by the through holes23h1,23h2,23h3,23h4,23h5,61h, and thus, the openings62amay be omitted. An area of the floating reflection layer62may be about 60% or more of the area of the first LED stack23.

The second intermediate insulation layer63covers the floating reflection layer62. The second intermediate insulation layer63may be formed of, for example, an aluminum oxide film, a silicon oxide film, or a silicon nitride film.

The through holes23h1,23h2,23h3,23h4, and23h5pass through the first LED stack23. The through hole23h1is formed to provide a passage for allowing electrical connection to the lower buried layer55cb. Further, the through hole23h2is formed to provide a passage for allowing electrical connection to the lower buried layer55b, the through hole23h3is formed to provide a passage for allowing electrical connection to the upper p-electrode pad37b, and the through hole23h4is formed to provide a passage for allowing electrical connection to the lower buried layer55cg. The through hole23h5is formed to provide a passage for allowing electrical connection to the first transparent electrode25.

In the illustrated exemplary embodiment, the through hole23h1may expose the upper surface of the lower buried layer55cb, the through hole23h2may expose the upper surface of the lower buried layer55b, the through hole23h3may expose the upper p-electrode pad37b, and the through hole23h4may expose the upper surface of the lower buried layer55cg.

The through hole23h5is formed to provide a passage for allowing electrical connection to the first transparent electrode25, as described above. The through hole23h5does not pass through the first transparent electrode25. However, the inventive concepts are not limited thereto, and in some exemplary embodiments, the through hole23h1may pass through at least a portion of the first transparent electrode25, as long as the through hole23h1provides the passage for electrical connection to the first transparent electrode25.

The through holes23h1,23h2,23h3, and23h4may pass through the first LED stack23, and may also pass through the first and second intermediate insulation layers61and63, the first transparent electrode25, and the second bonding layer59. Furthermore, the through hole23h3may pass through the lower insulation layer51.

The through hole61hmay expose the first conductivity type semiconductor layer23aof the first LED stack23through the first and second intermediate insulation layers61and63.

A second sidewall insulation layer64covers sidewalls of the through holes23h1,23h2,23h3,23h4,23h5, and61h, and has openings exposing the bottoms of the through holes23h1,23h2,23h3,23h4,23h5, and61h. The second sidewall insulation layer64may be formed using, for example, a chemical vapor deposition technique or an atomic layer deposition technique, and may be formed of, for example, Al2O3, SiO2, Si3N4, or the like.

The upper buried layers65cb,65b,65g,65cg,65r, and65crmay fill the through holes23h1,23h2,23h3,23h4,23h5, and61h, respectively. The upper buried layers65cb,65b,65g,65cg, and65rare electrically insulated from the first LED stack23by the second sidewall insulation layer64.

The upper buried layer65cbis electrically connected to the lower buried layer55cb, the upper buried layer65bis electrically connected to the lower buried layer55b, and the upper buried layer65gis the upper p-electrode pad37b, and the upper buried layer65cgis electrically connected to the lower buried layer55cg. The upper buried layer65rmay be electrically connected to the first transparent electrode25, and the upper buried layer65crmay be electrically connected to the first conductivity type semiconductor layer23aof the first LED stack23.

The upper buried layers65cb,65b,65g,65cg,65r, and65crmay be formed using a chemical mechanical polishing technique. For example, after forming a seed layer and filling the through holes23h1,23h2,23h3,23h4,23h5, and61husing a plating technique, the upper buried layers65cb,65b,65g,65cg,65r, and65crmay be formed by removing metal layers on the second intermediate insulation layer63using the chemical mechanical polishing technique. Furthermore, a metal barrier layer may be formed before forming the seed layer.

The upper buried layers65cb,65b,65g,65cg,65r, and65crmay be formed together through the same process. Accordingly, upper surfaces of the upper buried layers65cb,65b,65g,65cg,65r, and65crmay be substantially flush with the second intermediate insulation layer63. However, the inventive concepts are not limited thereto, and in some exemplary embodiments, the upper buried layers65cb,65b,65g,65cg,65r, and65crmay be formed through different processes from one another.

The first upper connector67r, the second upper connector67g, the third upper connector67b, and the upper common connector67care disposed on the second intermediate insulation layer63. The first upper connector67ris electrically connected to the upper buried layer65r, the second upper connector67gis electrically connected to the upper buried layer65g, and the third upper connector67bis electrically connected to the upper buried layer65b. The upper common connector67cis commonly electrically connected to the upper buried layers65cb,65cg, and65cr. More particularly, the upper buried layers65cb,65cg, and65crare electrically connected to one another by the upper common connector67c, and thus, the first conductivity type semiconductor layers23a,33a, and43aof the first, second, and third LED stacks23,33, and43are electrically connected to one another.

The first upper connector67r, the second upper connector67g, the third upper connector67b, and the upper common connector67cmay be formed of substantially the same material, for example, AuGe/Ni/Au/Ti, in the same process. In this case, AuGe may be in ohmic contact with the first conductivity type semiconductor layer23a. AuGe may be formed to have a thickness of about 100 nm, and Ni/Au/Ti may be formed to have a thickness of about 2 um. In some exemplary embodiments, AuTe may replace AuGe.

The upper insulation layer71covers the second intermediate insulation layer63, and covers the first upper connector67r, the second upper connector67g, the third upper connector67b, and the upper common connector67c. The upper insulation layer71may also cover side surfaces of the first, second, and third LED stacks23,33, and43. The upper insulation layer71may have openings71aexposing the first upper connector67r, the second upper connector67g, the third upper connector67b, and the upper common connector67c. The openings71aof the upper insulation layer71may be generally disposed on flat surfaces of the first upper connector67r, the second upper connector67g, the third upper connector67b, and the upper common connector67c. The upper insulation layer71may be formed of a silicon oxide film or a silicon nitride film, and may be formed to be, for example, about 400 nm thick.

Each of the bump pads73r,73g,73b, and73cmay be disposed on the first upper connector67r, the second upper connector67g, and the third upper connector67b, and the upper common connector67c, respectively, in the openings71aof the upper insulation layer71and electrically connected thereto.

The first bump pad73rmay be electrically connected to the second conductivity type semiconductor layer23bof the first LED stack23through the first upper connector67randsthe first transparent electrode25.

The second bump pad73gmay be electrically connected to the second conductivity type semiconductor layer33bof the second LED stack33through the second upper connector67g, the upper buried layer65g, the upper p-electrode pad37b, and the second transparent electrode35.

The third bump pad73bmay be electrically connected to the second conductivity type semiconductor layer43bof the third LED stack43through the third upper connector67b, the upper buried layer65b, the lower buried layer55b, the lower p-electrode pad47b, and the third transparent electrode45.

The common bump pad73cmay be electrically connected to the upper buried layers65cb,65cg, and65crthrough the upper common connector67c, and accordingly, the common bump pad73cis electrically connected to the first conductivity type semiconductor layers23a,33a, and43aof the first, second, and third LED stacks23,33, and43.

As such, each of the first, second, and third bump pads73r,73g, and73bmay be electrically connected to the second conductivity type semiconductor layers23b,33b, and43bof the first, second, and third LED stacks23,33, and43, and the common bump pad73cmay be commonly electrically connected to the first conductivity type semiconductor layers23a,33a, and43aof the first, second, and third LED stacks23,33, and43.

The bump pads73r,73g,73b, and73cmay be disposed in the openings71aof the upper insulation layer71, and upper surfaces of the bump pads73r,73g,73b, and73cmay be substantially flat. The bump pads73r,73g,73b, and73cmay be disposed on the flat surfaces of the first, second, and third upper connectors67r,67g, and67b, and the upper common connector67c. The bump pads73r,73g,73b, and73cmay be formed of Au/In. For example, Au may be formed to have a thickness of about 3 μm, and In may be formed to have a thickness of about 1 μm. According to an exemplary embodiment, the light emitting device100may be bonded to the pads of the circuit board101using In. However, the inventive concepts are not limited thereto, and in some exemplary embodiments, the light emitting device100may be bonded to the pads using Pb or AuSn of the bump pads.

In the illustrated exemplary embodiment, the upper surfaces of the bump pads73r,73g,73b, and73care described and illustrated as being flat, but the inventive concepts are not limited thereto. For example, in some exemplary embodiments, the bump pads73r,73g,73b, and73cmay have irregular upper surfaces, and some of the bump pads may be disposed on the upper insulation layer71.

According to the illustrated exemplary embodiment, the first LED stack23is electrically connected to the bump pads73rand73c, the second LED stack33is electrically connected to the bump pads73gand73c, and the third LED stack43is electrically connected to the bump pads73band73c. Accordingly, cathodes of the first LED stack23, the second LED stack33, and the third LED stack43are electrically connected to the common bump pad73c, and anodes thereof are electrically connected to the first, second, and third bump pads73r,73g, and73b, respectively. Accordingly, the first, second, and third LED stacks23,33, and43may be driven independently.

In the illustrated exemplary embodiment, the bump pads73r,73g,73b, and73care described as being formed, but in some exemplary embodiments, the bump pads may be omitted. In particular, when bonding to a circuit board using an anisotropic conductive film or an anisotropic conductive paste, the bump pads may be omitted, and the upper connectors67r,67g,67b, and67cmay be directly bonded to the circuit board. In this case, a bonding area may be increased.

Hereinafter, a method of manufacturing the light emitting device100will be described in detail. A structure of the light emitting device100will be further described through the method of manufacturing the light emitting device100described below.FIG. 5A,FIG. 5B, andFIG. 5Care schematic cross-sectional views illustrating the first, second, and third LED stacks grown on growth substrates, respectively, according to an exemplary embodiment.

First, referring toFIG. 5A, a first LED stack23including a first conductivity type semiconductor layer23aand a second conductivity type semiconductor layer23bis grown on a first substrate21. An active layer may be interposed between the first conductivity type semiconductor layer23aand the second conductivity type semiconductor layer23b.

The first substrate21may be a substrate capable of growing the first LED stack23thereon, such as a GaAs substrate. The first conductivity type semiconductor layer23aand the second conductivity type semiconductor layer23bmay be formed of an AlGaInAs-based or AlGaInP-based semiconductor layer, and the active layer may include, for example, an AlGaInP-based well layer. A composition ratio of AlGaInP may be determined so that the first LED stack23emits red light, for example.

A first transparent electrode25may be formed on the second conductivity type semiconductor layer23b. As described above, the first transparent electrode25may be formed of a metal layer or a conductive oxide layer that transmits light generated by the first LED stack23, for example, red light. The first transparent electrode25may be formed of, for example, indium-tin oxide (ITO).

Referring toFIG. 5B, a second LED stack33including a first conductivity type semiconductor layer33aand a second conductivity type semiconductor layer33bis grown on a second substrate31. An active layer may be interposed between the first conductivity type semiconductor layer33aand the second conductivity type semiconductor layer33b.

The second substrate31may be a substrate capable of growing the second LED stack33thereon, such as a sapphire substrate, a GaN substrate or a GaAs substrate. The first conductivity type semiconductor layer33aand the second conductivity type semiconductor layer33bmay be formed of an AlGaInAs-based or AlGaInP-based semiconductor layer, an AlGaInN-based semiconductor layer, and the active layer may include, for example, an AlGaInP-based well layer or AlGaInN-based well layer. A composition ratio of AlGaInP or AlGaInN may be determined so that the second LED stack33emits green light, for example.

A second transparent electrode35may be formed on the second conductivity type semiconductor layer33b. As described above, the second transparent electrode35may be formed of a metal layer or a conductive oxide layer that transmits light generated by the first LED stack23, for example, red light. In particular, the second transparent electrode35may be formed of ZnO.

Referring toFIG. 5C, a third LED stack43including a first conductivity type semiconductor layer43aand a second conductivity type semiconductor layer43bis grown on a third substrate41. An active layer may be interposed between the first conductivity type semiconductor layer43aand the second conductivity type semiconductor layer43b.

The third substrate41may be a substrate capable of growing the third LED stack43thereon, such as a sapphire substrate, a SiC substrate, or a GaN substrate. In an exemplary embodiment, the third substrate41may be a flat sapphire substrate, but may also be a patterned sapphire substrate. The first conductivity type semiconductor layer43aand the second conductivity type semiconductor layer43bmay be formed of an AlGaInN-based semiconductor layer, and the active layer may include, for example, an AlGaInN-based well layer. A composition ratio of AlGaInN may be determined so that the third LED stack43emits blue light, for example.

A third transparent electrode45may be formed on the second conductivity type semiconductor layer43b. As described above, the third transparent electrode45may be formed of a metal layer or a conductive oxide layer that transmits light generated in the first and second LED stacks23and33, for example, red light and green light. In particular, the third transparent electrode45may be formed of ZnO.

The first, second, and third LED stacks23,33, and43are grown on the different growth substrates21,31, and41, respectively, and, accordingly, the order of the manufacturing process is not particularly limited.

Hereinafter, a method of manufacturing the light emitting device100using first, second, and third LED stacks23,33, and43grown on growth substrates21,31, and41will be described. Hereinafter, although a region of a single light emitting device100will be mainly illustrated and described, a plurality of light emitting devices100may be manufactured in a batch in the same manufacturing process using the LED stacks23,33, and43grown on the growth substrates21,31, and41.

FIGS. 6A, 6B, 7A, 7B, 8A, 8B, 9A, 9B, 10A, 10B, 11A, and 11Bare schematic plan views and cross-sectional views illustrating the method of manufacturing the light emitting device100for a display according to an exemplary embodiment. Hereinafter, the cross-sectional views correspond to that taken along line A-A′ inFIG. 3.

First, referring toFIG. 6AandFIG. 6B, the third transparent electrode45and the second conductivity type semiconductor layer43bof the third LED stack43are patterned to expose the first conductivity type semiconductor layer43ausing photolithography and etching techniques. This process corresponds to, for example, a mesa etching process. A photoresist pattern may be used as an etching mask. For example, after the etching mask is formed, the third transparent electrode45may be etched first by a wet etching technique, and then the second conductivity type semiconductor layer43bmay be etched by a dry etching technique using the same etching mask. In this manner, the third transparent electrode45may be recessed from a mesa etching region.FIG. 6Aexemplarily shows an edge of the mesa and does not show an edge of the third transparent electrode45to simplify illustration. However, since the third transparent electrode45is wet etched using the same etching mask, the edge of the third transparent electrode45may also be recessed from the edge of the mesa toward an inner side of the mesa. Since the same etching mask is used, the number of photolithography processes may not be increased, thereby reducing the process costs. However, the inventive concepts are not limited thereto, and the etching mask for etching the mesa etching process may be different from the etching mask for etching the third transparent electrode45.

Subsequently, an n-electrode pad47aand a lower p-electrode pad47bare formed on the first conductivity type semiconductor layer43aand the third transparent electrode45, respectively. The n-electrode pad47aand the lower p-electrode pad47bmay be formed to have different thicknesses. In particular, an upper surface of the n-electrode pad47aand that of the lower p-electrode pad47bmay be located at substantially the same elevation.

Referring toFIG. 7AandFIG. 7B, the second LED stack33shown inFIG. 5Bis bonded onto the third LED stack43described with reference toFIG. 6AandFIG. 6B. The second LED stack33is bonded to a temporary substrate using a temporary bonding/debonding (TBDB) technique, and the second substrate31is removed from the second LED stack33. The second substrate31may be removed using, for example, a laser lift off technique. After the second substrate31is removed, a roughened surface33rmay be formed on a surface of the first conductivity type semiconductor layer33a. Thereafter, the first conductivity type semiconductor layer33aof the second LED stack33bonded to the temporary substrate may be disposed to face the third LED stack43and bonded to the third LED stack43. The second LED stack33and the third LED stack43are bonded to each other by a first bonding layer49. After bonding the second LED stack33to the third LED stack43, the temporary substrate may be removed using a laser lift off technique. Accordingly, the second LED stack33may be disposed on the third LED stack43, in which the second transparent electrode35may form an upper surface.

In general, when the second transparent electrode35is formed of ITO, ITO may be peeled from the second LED stack33when the second substrate31is removed using the laser lift off technique. As such, when the second substrate31is to be removed using the laser lift-off technique, the second transparent electrode35may include ZnO, which has a favorable bonding force.

Subsequently, the second transparent electrode35and the second conductivity type semiconductor layer33bare patterned to expose the first conductivity type semiconductor layer33a. The second transparent electrode35and the second conductivity type semiconductor layer33bmay be patterned by using photolithography and etching techniques. This process may be performed using the wet etching and the dry etching techniques in substantially the same manner as the mesa etching process, during which the third transparent electrode45and the second conductivity type semiconductor layer43bare etched as described above.

For example, after the etching mask is formed, the second transparent electrode35may be etched first by the wet etching technique, and then the second conductivity type semiconductor layer33bmay be etched by the dry etching technique using the same etching mask. Accordingly, the second transparent electrode35may be recessed from the mesa etching region.FIG. 7Aexemplarily shows an edge of the mesa, and does not show an edge of the second transparent electrode35to simplify illustration. However, since the second transparent electrode35is wet etched using the same etching mask, the edge of the second transparent electrode35may also be recessed from the edge of the mesa toward an inner side of the mesa. In this manner, since the same etching mask is used, the number of photolithography processes may not be increased, thereby reducing the process costs. However, the inventive concepts are not limited thereto, and in some exemplary embodiments, the etching mask for etching the mesa etching process and the etching mask for etching the second transparent electrode35may be different from each other.

As shown inFIG. 7A, a mesa etching region of the second LED stack33may be partially overlapped with that of the third LED stack43. For example, a portion of the mesa etching region of the second LED stack33may be formed over the n-electrode pad47a. In addition, another portion of the mesa etching region thereof may be disposed over the lower p-electrode pad47b.

An upper p-electrode pad37b, as shown inFIG. 7A, may also be formed on the second transparent electrode35.

A lower insulation layer51, as shown inFIG. 7B, may be formed to cover the second LED stack33and the second transparent electrode35. The lower insulation layer51may also cover the upper p-electrode pad37b, and may further be processed to provide a flat surface.

Referring toFIG. 8AandFIG. 8B, through holes33h1and33h2passing through the second LED stack33are formed. The through holes33h1and33h2pass through the first bonding layer49to expose the n-electrode pad47aand the lower p-electrode pad47b. The through holes33h1and33h2may be formed in the mesa etching region.

A through hole51h(seeFIG. 4B) exposing the first conductivity type semiconductor layer33aof the second LED stack33may be formed. The through hole51hmay be located in the mesa etching region of the second conductivity type semiconductor layer33b. The through hole51hmay be formed after or before forming the through holes33h1and33h2.

Subsequently, a first sidewall insulation layer53is formed. The first sidewall insulation layer53may be formed using, for example, atomic layer deposition technology. The first sidewall insulation layer53may cover an upper surface of the lower insulation layer51, and may further cover sidewalls and bottom surfaces of the through holes33h1,33h2, and51h. The first sidewall insulation layer53formed on the bottom surfaces of the through holes33h1,33h2, and51hmay be removed through an etching process, and thus, the n-electrode pad47a, the lower p-electrode pad47b, and the first conductivity type semiconductor layer33amay be exposed.

Then, after forming a seed layer, and forming a metal layer using a plating technique, a process of forming lower buried layers55cb,55b, and55cgfilling the through holes33h1,33h2, and51his completed by removing metal layers formed on the upper surface of the lower insulation layer51using a chemical mechanical polishing technique.

Thereafter, the first LED stack23ofFIG. 5Ais bonded to the second LED stack33. The first LED stack23and the second LED stack33may be bonded using a second bonding layer59, so that the first transparent electrode25faces the second LED stack33. Accordingly, the second bonding layer59may be in contact with the first transparent electrode25, and may also be in contact with the lower insulation layer51and the lower buried layers55cb,55b, and55cg.

The first substrate21is removed from the first LED stack23. The first substrate21may be removed using, for example, an etching technique. After the first substrate21is removed, a roughened surface23rmay be formed on a first conductivity type semiconductor layer23a.

A first intermediate insulation layer61covering the first conductivity type semiconductor layer23ais formed, and a floating reflection layer62is formed on the first intermediate insulation layer61. The floating reflection layer62may also be patterned to have openings62a. Subsequently, a second intermediate insulation layer63is formed to cover the floating reflection layer62.

Referring toFIG. 9AandFIG. 9B, through holes23h1,23h2,23h3, and23h4passing through the first LED stack23and the first transparent electrode25are formed. The through hole23h1may expose the lower buried layer55cb, the through hole23h2may expose the lower buried layer55b, the through hole23h3may expose the upper p-electrode pad37b, and the through hole23h4may expose the lower buried layer55cg.

In addition, a through hole25h5is formed. The through hole25h5exposes the first transparent electrode25through the first LED stack23. In addition, a through hole61h(seeFIG. 4C) passing through the first and second intermediate insulation layers61and63may be formed. The through hole61hexposes the first conductivity type semiconductor layer23a.

The through holes23h1,23h2,23h3, and23h4may be formed together in the same process. The through holes23h1,23h2,23h3, and23h4may pass through the first and second intermediate insulation layers61and63, the first LED stack23, the first transparent electrode25, and the second bonding layer59. Furthermore, the through hole23h3may pass through the lower insulation layer51.

However, since the through hole61hand the through hole23h5have different etching depths from those of the through holes23h1,23h2,23h3, and23h4, the through hole61hand the through hole23h5may be formed through a different process from that forming the through holes23h1,23h2,23h3, and23h4. The through hole61hand the through hole23h5may also be formed through different processes from each other.

Subsequently, upper buried layers65cb,65b,65g,65cg,65r, and65crfilling the through holes23h1,23h2,23h3,23h4,23h5, and61hare formed. To form the upper buried layers65cb,65b,65g,65cg,65r, and65cr, a second sidewall insulation layer64may be formed to cover sidewalls of the through holes23h1,23h2,23h3,23h4,23h5, and61h, a seed layer and a metal plating layer may be formed, metal layers on the second intermediate insulation layer63may be removed using a chemical mechanical polishing technique. A metal barrier layer may be further formed before forming the seed layer. A process of forming the upper buried layers65cb,65b,65g,65cg,65r, and65cris substantially similar to that of forming the lower buried layers55cb,55b, and55cg, and thus, detailed descriptions thereof will be omitted.

Referring toFIG. 10AandFIG. 10B, first, second, and third upper connectors67r,67g, and67b, and an upper common connector67care formed on the second intermediate insulation layer63. The first upper connector67ris electrically connected to the upper buried layer65r, the second upper connector67gis electrically connected to the upper buried layer65g, and the third upper connector67bis electrically connected to the upper buried layer65b. The upper common connector67cis electrically connected to the upper buried layers65cb,65cg, and65cr.

As such, the first, second, and third upper connectors67r,67g, and67bare electrically connected to the second conductivity type semiconductor layers23b,33b, and43bof the first, second, and third LED stacks23,33, and43, respectively, and the upper common connector67cis electrically connected to the first conductivity type semiconductor layers23a,33a, and43aof the first, second, and third LED stacks23,33, and43.

Referring toFIG. 11AandFIG. 11B, an isolation trench is formed to define a region of the light emitting device100by an isolation process. The isolation trench may expose the third substrate41along the peripheries of the first, second, and third LED stacks23,33, and43. Between regions of the light emitting device, the isolation trench may be formed by sequentially removing the first LED stack23, the first transparent electrode25, the second bonding layer59, the lower insulation layer51, the second LED stack33, the first bonding layer49, and the third LED stack43. In this case, the second transparent electrode35and the third transparent electrode45are not exposed during the isolation process as being recessed inwardly, and thus, the second transparent electrode35and the third transparent electrode45may not be damaged by etching gas. When the second and third transparent electrodes35and45are formed of ZnO, ZnO may be easily damaged by etching gas. However, according to the illustrated exemplary embodiment, the second transparent electrode35and the third transparent electrode45may be prevented from being exposed to an etching gas by forming the second and third transparent electrodes35and45to be recessed inwardly.

In the illustrated exemplary embodiment, the first, second, and third LED stacks23,33, and43are described as being sequentially patterned through the isolation process, but the inventive concepts are not limited thereto. For example, in some exemplary embodiments, the third LED stack43may be removed in advance in a region where the isolation trench will be formed before bonding the second LED stack33, or the second LED stack33may be removed in advance in the region in which the isolation trench will be formed before bonding the first LED stack23. In this case, the region where the third LED stack43is removed may be filled with the first bonding layer49, and the region where the second LED stack33is removed may be filled with the second bonding layer59. Accordingly, the second and third LED stacks33and43may not be exposed in the isolation process.

The isolation process may also be performed before forming the upper connectors67r,67g,67b, and67c. In this case, a protective insulation layer covering the second intermediate insulation layer63may be added to protect the sidewalls exposed by the isolation process. The protective insulation layer may have openings exposing the upper buried layers65b,65cb,65g,65cg,65r, and65cr, and the protective insulation layer may be formed so that the upper connectors67r,67g,67b, and67care electrically connected to the upper buried layers.

An upper insulation layer71covering the upper connectors67r,67g, and67b, and67cis formed. The upper insulation layer71may cover the second intermediate insulation layer63or the protective insulation layer.

The upper insulation layer71may cover side surfaces of the first, second, and third LED stacks23,33, and43. The upper insulation layer71may be patterned to have openings71aexposing the first, second, and third upper connectors67r,67g, and67band the upper common connector67c.

Subsequently, bump pads73r,73g,73b, and73cmay be formed in the openings71a, respectively. The first bump pad73ris disposed on the first upper connector67r, the second bump pad73gis disposed on the second upper connector67g, and the third bump pad73bis disposed on the third upper connector67b. The common bump pad73cis disposed on the upper common connector67c.

Then, the light emitting device100is bonded onto a circuit board101, and the third substrate41may be separated to form the light emitting device100. A schematic cross-sectional view of the light emitting device100bonded to the circuit board101is exemplarily shown inFIG. 12.

AlthoughFIG. 12exemplarily illustrates a single light emitting device100disposed on the circuit board101, however, a plurality of light emitting devices100may be mounted on the circuit board101. Each of the light emitting devices100may form one pixel capable of emitting any one of blue light, green light, and red light, and a plurality of pixels are arranged on the circuit board101to provide a display panel.

The plurality of light emitting devices100may be formed on the substrate41, and the light emitting devices100may be transferred onto the circuit board101in a group, not individually.FIG. 13A,FIG. 13B, andFIG. 13Care schematic cross-sectional views illustrating a method of transferring the light emitting device to the circuit board according to an exemplary embodiment. Hereinafter, a method of transferring the light emitting devices100formed on the substrate41to the circuit board101in a group will be described.

Referring toFIG. 13A, as described with reference toFIG. 11AandFIG. 11B, when the manufacturing process of the light emitting device100on the substrate41(or the third substrate41) is completed, the plurality of light emitting devices100is isolated from one another, and arranged on the substrate41by the isolation trench.

The circuit board101having pads on an upper surface thereof is provided. The pads are arranged on the circuit board101to correspond to locations where the pixels for a display are to be arranged. In general, an interval between the light emitting devices100arranged on the substrate41may be more dense than that of the pixels on the circuit board101.

Referring toFIG. 13B, bump pads of the light emitting devices100are bonded to the pads on the circuit board101. The bump pads and the pads may be bonded using In bonding, for example. In this case, the light emitting devices100located between pixel regions may be spaced apart from the circuit board101, since these light emitting devices100do not have corresponding pads of the circuit board101to be boned to.

Subsequently, a laser is irradiated onto the substrate41. The light emitting devices100bonded to the pads are selectively irradiated with the laser. In this case, a mask having openings to selectively expose the light emitting devices100may be formed on the substrate41.

Thereafter, the light emitting devices100are transferred to the circuit board101by separating the light emitting devices100irradiated with the laser from the substrate41. Accordingly, as shown inFIG. 13C, the display panel in which the light emitting devices100are arranged on the circuit board101is provided. The display panel may be mounted on various display apparatuses as described with reference toFIG. 1.

FIG. 14is a schematic cross-sectional view illustrating a method of transferring a light emitting device to a circuit board according to another exemplary embodiment.

Referring toFIG. 14, the method of transferring a light emitting device according to the illustrated exemplary embodiment is to bond light emitting devices to pads using an anisotropic conductive adhesive film or an anisotropic conductive adhesive paste121. More particularly, the anisotropic conductive adhesive film or the adhesive paste121is provided on the pads, and the light emitting devices100may be adhered to the pads through the anisotropic conductive adhesive film or the adhesive paste121. The light emitting devices100are electrically connected to the pads by a conductive material within the anisotropic conductive adhesive film or the adhesive paste121.

In some exemplary embodiments, the bump pads73r,73g,73b, and73cmay be omitted, and the upper connectors67r,67g,67b, and67cmay be electrically connected to the pads73r,73g,73b, and73cthrough a conductive material.

According to exemplary embodiments, the first, second, and third LED stacks may be stacked one above another, and thus, the light emitting device may have an increased luminous area of each sub-pixel without increasing a pixel area. Furthermore, the light emitting device according to exemplary embodiments include a floating reflection layer, and thus, the luminous intensity of the first LED stack emitting light of a relatively long wavelength may be selectively improved.