Video timing for display systems with variable refresh rates

A display system supports variable refresh rates that include a plurality of refresh rates. A source such as a graphics processing unit (GPU) provides frames to the display system at a selected one of the refresh rates. The refresh rates are factored into a corresponding plurality of prime factors. A plurality of numbers of lines per frame in frames provided at the plurality of refresh rates is determined based on one or more ratios of the plurality of refresh rates, the plurality of prime factors, and a line rate for providing frames to the display system at the plurality of refresh rates. The source then selectively provides frames to the display system at one refresh rate of the plurality of refresh rates using the same line rate regardless of which refresh rate is chosen. Furthermore, the number of lines per frame is an integer for frames provided at the refresh rates.

BACKGROUND

A display system typically includes a screen that displays video rendered by a processor such as a graphics processing unit (GPU) and provided to the screen in a stream of frames. The display video timing is determined by a frame rate (or refresh rate), a number of pixels per line in the frame (HTotal), a number of lines per frame (VTotal), and a pixel clock rate (PClk) that is equal to the product of the refresh rate, the number of pixels per line, and the number of lines per frame. The number of pixels per line includes a horizontal active region that includes pixel values used to generate images and a horizontal blanking region that conveys other information such as digital audio or metadata. Thus, the total number of pixels per line is equal to a sum of the pixels in the horizontal active region and the pixels in the horizontal blanking region. The number of lines per frame includes a vertical active region that includes pixel values and a vertical blanking region that conveys other information such as digital audio or metadata. Thus, the total number of lines per frame is equal to a sum of the lines in the vertical active region and the lines in the vertical blanking region. For example, a high definition frame can represent an image using 1080 active vertical lines that include values of the pixels and 45 vertical blanking lines. A line rate for the frame is defined as the pixel clock rate divided by the number of pixels per line or, equivalently, as the product of the refresh rate and the number of lines per frame.

DETAILED DESCRIPTION

A source (e.g., a GPU or other processor) provides frames at a refresh rate that is determined by source timing. The timing of the display system is synchronized to the source timing. For example, the source can provide frames at 60 Hertz (Hz) and the display system can read/display the frames at 60 Hz at times that are synchronized to the GPU. However, video is captured or generated at different refresh rates by different sources. For example, video is typically rendered at 50 Hz in some geographical regions such as Europe and Japan, while video is rendered at 60 Hz in another geographical region such as North America. Display systems therefore implement variable refresh rates to allow the refresh rate to change from, for example, 50 Hz to 60 Hz and vice versa. The source and display systems that implement variable refresh rates typically use the same pixel clock rate and the same number of pixels per line for the different refresh rates. The number of lines per frame therefore changes in response to the changing refresh rate to preserve the fixed pixel clock rate and number of pixels per line, that is, to maintain a constant line rate. The change in the number of lines per frame is determined by the ratio of the refresh rates and so the change in the refresh rate from a first refresh rate to a second refresh rate typically leads to a fractional number of lines per frame at the second refresh rate. Display systems account for the fractional line rate using techniques including rounding the fractional number of lines per frame up or down (corresponding to a refresh rate that is higher or lower than the target refresh rate) or dithering between integer values of the number of lines per frame for even/odd frames. Furthermore, display systems perform a mode reset in response to detecting a change in the refresh rate or number of lines per frame, which causes display interruptions of up to a few seconds.

FIGS.1-4disclose embodiments of a display system does not require a mode reset in response to a change in a refresh rate by implementing the same line rate for a set of refresh rates supported by the display system. As used herein, the term “line rate” refers to the product of the refresh rate used by the display system to present frames on a screen and the number of lines per frame provided by a source such as a graphics processing unit (GPU). In some embodiments, frames that are provided to the display system include numbers of lines per frame determined by at least one ratio of the refresh rates in the set. The numbers of lines per frame used for the set of refresh rates are chosen so that the line rate is constant over the set of refresh rates. Furthermore, the numbers of lines per frame associated with the refresh rates in the set are determined based on prime factors of the refresh rates to ensure that the numbers of lines per frame are integer values. For example, if the set includes a first refresh rate and a second refresh rate, frames provided at the first refresh rate include a first number of lines per frame and frames provided at the second refresh rate include a second number of lines per frame that is equal to the first number of lines per frame multiplied by a ratio of the second refresh rate to the first refresh rate. The first and second numbers of lines per frame are guaranteed to be integer values if the prime factors of the numerator and denominator of the ratio (the second, higher refresh rate and the first, lower refresh rate, respectively) are also prime factors of the first and second numbers of lines per frame, respectively. Some embodiments of the source and display system implement more than two refresh rates, in which case an iterative process is used to find common prime factors that are shared by the refresh rates. The prime factors are also chosen so that the number of lines per frame has these prime factors. In some embodiments, the numbers of lines per frame associated with the refresh rates in the set include the same number of lines in the vertical active region and different numbers of lines in the vertical blanking region. Thus, multiple refresh rates are supported with a common line rate and integer number of lines per frame for all refresh rates.

FIG.1is a block diagram of a processing system100that generates and displays frames at variable refresh rates using a common line rate that is determined based on prime factors of the variable refresh rates according to some embodiments. The processing system100includes or has access to a system memory105or other storage component that is implemented using a non-transitory computer readable medium such as a dynamic random-access memory (DRAM). However, some embodiments of the memory105are implemented using other types of memory including static RAM (SRAM), nonvolatile RAM, and the like. The processing system100also includes a bus110to support communication between entities implemented in the processing system100, such as the memory105. Some embodiments of the processing system100include other buses, bridges, switches, routers, and the like, which are not shown inFIG.1in the interest of clarity.

The processing system100includes at least one central processing unit (CPU)115. Some embodiments of the CPU115include multiple processing elements (not shown inFIG.1in the interest of clarity) that execute instructions concurrently or in parallel. The processing elements are referred to as processor cores, compute units, or using other terms. The CPU115is connected to the bus110and communicates with the memory105via the bus110. The CPU115executes instructions such as program code120stored in the memory105and the CPU115stores information in the memory105such as the results of the executed instructions. The CPU115is also able to initiate graphics processing by issuing draw calls.

An input/output (I/O) engine125handles input or output operations associated with a display system130, as well as other elements of the processing system100such as keyboards, mice, printers, external disks, and the like. The display system130supports a variable refresh rate so that the display system130can present frames at refresh rates within a range up to a maximum refresh rate. For example, the display system130can support refresh rates of 24 Hz, 25 Hz, 30 Hz, 50 Hz, 60 Hz, 100 Hz, and 120 Hz. The variable refresh rate corresponds to a variable vertical blanking region, which is within a range beginning at a minimum vertical blanking region that corresponds to the maximum refresh rate of the display system130. In some embodiments, the refresh rates are determined by querying the display system130its Enhanced Extended Display Identification Data (E-EDID) and determining the refresh rates from the EDID reply. The I/O engine125is coupled to the bus110so that the I/O engine125communicates with the memory105, the CPU115, or other entities that are connected to the bus110. In the illustrated embodiment, the I/O engine125reads information stored on an external storage component135, which is implemented using a non-transitory computer readable medium such as a compact disk (CD), a digital video disc (DVD), and the like. The I/O engine125also writes information to the external storage component135, such as the results of processing by the CPU115.

The processing system100includes at least one GPU140that renders images for presentation by the display system130. For example, the GPU140renders objects to produce values of pixels that are provided to the display system130, which uses the pixel values to display an image that represents the rendered objects. The GPU140includes one or more processing elements such as an array142of compute units that execute instructions concurrently or in parallel. Some embodiments of the GPU140are used for general purpose computing. In the illustrated embodiment, the GPU140communicates with the memory105(and other entities that are connected to the bus110) over the bus110. However, some embodiments of the GPU140communicate with the memory105over a direct connection or via other buses, bridges, switches, routers, and the like. The GPU140executes instructions stored in the memory105and the GPU140stores information in the memory105such as the results of the executed instructions. For example, the memory105stores a copy145of instructions that represent a program code that is to be executed by the GPU140. The GPU140also includes a timing reference144.

The GPU140generates a stream of frames that is provided to the display system130. Some embodiments of the display system130include a buffer150that stores the frames in the stream received from the GPU140. The display system130also includes a display controller152that reads out the pixel values in the frames from the buffer150and uses the values to display an image on (or present an image to) a screen154. The display controller152provides the frames via a display interface153(such as an HDMI or DisplayPort interface) configured to couple to the screen154. The display system130also includes a timing reference156, which is synchronized to the GPU timing reference144during normal operation. For example, the GPU140can generate frames at 60 Hz and provide the frames to the display system130, which displays or presents the frames on the screen154at 60 Hz. Some embodiments of the timing reference156are implemented in a timing controller (TCON) chip157, e.g., as an application-specific integrated circuit (ASIC) or other circuit, which also performs timing and synchronization operations for the display system130, as discussed herein. The display system130also includes a monitor scaler158that scales information in the frames received from the GPU140to the pixel density of the screen154.

The frames generated by the GPU140and displayed by the display system130are characterized by a number of pixels per line in the frame (HTotal), a number of lines per frame (VTotal), and a pixel clock rate (PClk) that is equal to the product of the refresh rate, the number of pixels per line, and the number of lines per frame. A line rate for the frame is defined as the pixel clock rate divided by the number of pixels per line or, equivalently, as the product of the refresh rate and the number of lines per frame. The refresh rates used by the GPU140and the display system130are factored into a corresponding plurality of prime factors. For example, a frame rate of 50 Hz has the prime factors (5, 2) and a frame rate of 60 Hz as the prime factors (2, 3, 5). Numbers of lines per frame in the frames provided by the GPU140at the multiple refresh rates is determined based on ratios of the refresh rates, the prime factors of the refresh rates, and a common line rate for providing frames to the display system at the different refresh rates. The GPU140provides frames to the display system130at a selected one of the refresh rates using the same line rate regardless of which refresh rate is chosen. Furthermore, the line rate is an integer for frames provided at the refresh rates.

FIG.2is a block diagram of a frame200that is generated by a GPU and provided to a display system according to some embodiments. The frame200is generated (e.g., rendered) by some embodiments of the GPU140shown inFIG.1and displayed or presented by some embodiments of the display system130shown inFIG.1.

The frame200is partitioned into lines201(only one indicated by a reference numeral in the interest of clarity) of pixels202(only one indicated by a reference numeral in the interest of clarity). Each line201includes a number205of pixels per line (HTotal). The number205of pixels per line includes a horizontal active region210that includes pixel values used to generate images (as indicated by the open boxes) and a horizontal blanking region215that conveys other information such as digital audio or metadata (as indicated by the hatched boxes). The frame200also includes a number220of lines per frame (VTotal). The number220of lines per frame includes a vertical active region225that includes pixel values (as indicated by the open boxes) and a vertical blanking region230that conveys other information such as digital audio or metadata (as indicated by the hatched boxes). Thus, the total number220of lines per frame is equal to a sum of the lines in the vertical active region225and the lines in the vertical blanking region230. For example, a high definition frame can represent an image using 1080 active vertical lines that include values of the pixels and 45 vertical blanking lines.

The GPU provides the frame200(and the display system presents the frame200) at a refresh rate. The frame200is therefore characterized by a pixel clock rate (PClk) that is equal to the product of the refresh rate, the number205of pixels per line, and the number220of lines per frame. A line rate for the frame200is defined as the pixel clock rate divided by the number205of pixels per line or, equivalently, as the product of the refresh rate and the number220of lines per frame.

The display system that presents the frame200supports variable refresh rates. The GPU therefore renders the frame200at different refresh rates corresponding to the variable refresh rates supported by the display system. The characteristics of the frame200are modified based on the variable refresh rate used to render the frame200and presented the frame200at the display system. The number220of lines per frame that are included in the frame200for the different refresh rates is determined based on ratios of the refresh rates, the prime factors of the refresh rates, and a common line rate for providing frames to the display system at the different refresh rates. For example, if the display system supports refresh rates of 50 Hz and 60 Hz, the ratio of the supported refresh rates is 5/6. The numbers220of lines per frame used at the different refresh rates are therefore chosen to have prime factors corresponding to the ratio of the supported refresh rates. For example, the number220for the frame200is chosen to be:
2250=21*32*53at 60 Hz
and the number220for the frame200is chosen to be:
2250*6/5=2700 at 50 Hz.
Thus, the number220is a whole number for both refresh rates and the frame200has a common line rate for both refresh rates:
2250*60=2700*50=135 kHz

In some embodiments, the parameters of the frame200are chosen to provide a common line rate over a larger range of refresh rates. For example, if a frame rate set supported by the display system includes the refresh rates 24 Hz, 25 Hz, and 30 Hz, the ratios of the refresh rates are:
30/25=6/5
30/24=5/4
The number220of lines in the frame200for the refresh rate of 30 Hz is chosen to have prime factors (5, 4=22) so that the frame200is generated at 24 Hz and 25 Hz using the same line rate and pixel clock as the frame200at 30 Hz. In that case, the numbers220of lines for the different refresh rates is:
VTotal25=VTotal30*6/5
VTotal24=VTotal30*5/4
The numbers220of lines in the frame200at the different refresh rates (VTotal24, VTotal25, VTotal30) are all whole numbers because the values of the refresh rates have prime factors (5, 4=22). For example, the numbers220can have the values:
VTotal30=2200=23*52*111
VTotal25=2200*6/5=2640
VTotal24=2200*5/4=2750
The frames200having the above numbers220of lines also have the same line rates:
2200*30=2640*25=2750*24=66 kHz
Although the examples discussed above include two and three different refresh rates, some embodiments of these techniques are applied to larger sets of refresh rates. Moreover, other prime factors can also be used, including, but not limited to, the prime factors 7, 11, and 13.

In some embodiments, the number220of lines is constrained to be above a minimum number of lines. For example, the pixels in the vertical blanking region230can be used to convey audio information. The minimum number of lines can therefore be set based on a required (or minimum) audio bandwidth per line or per frame. In some embodiments, the number205of pixels per line is constrained by the required audio bandwidth or other overhead requirements. In some embodiments, the pixel rate for the frame200is constrained based on parameters defined in a timing descriptor. For example, an 18-byte detailed timing descriptor (DTD) structure defined in Enhanced Extended Display Identification Data (E-EDID) allows pixel rates to be specified in terms of 10 kilo-pixels per second (kPix/s), e.g., within a range of 0.01 MPix/s to 655.35 MPix/s. For another example, a 20-byte DTD structure defined in E-EDID allows pixel rates to be specified in terms of 1 kPix/s, e.g., within a range of 0.001 MPix/s to 16777.216 MPix/s.

FIG.3is a flow diagram of a method300of determining numbers of lines per frame for frames provided at different refresh rates according to some embodiments. The method300is implemented in some embodiments of the processing system100shown inFIG.1.

At block310, the processing system determines a ratio between a first refresh rate and a second refresh rate supported by the display system. For example, as discussed herein, the ratio between a 50 Hz refresh rate and a 60 Hz refresh rate is 5/6.

At block315, the processing system determines prime factors of the refresh rates. For example, the prime factors of the 50 Hz refresh rate are (5, 2) and the prime factors of the 60 Hz refresh rate are (5, 3, 2).

At block320, the processing system determines a first number of lines per frame for frames provided at the first refresh rate and a second number of lines per frame for frames provided at the second refresh rate. The first and second numbers of lines per frame are determined based on the ratio of refresh rates and the prime factors. For example, the first number of lines per frame is selected to have a value that shares one or more prime factors with the second refresh rate and the second number of lines per frame is selected to have a value that shares one or more prime factors with the first refresh rate. Thus, the first and second numbers of lines per frame are whole numbers and produce the same line rate. The first and second numbers of lines per frame are also determined so that the line rates of the frames having the first and second numbers of lines per frames are both equal to the common line rate.

FIG.4is a flow diagram of a method400of modifying numbers of lines per frame in response to changing a refresh rate according to some embodiments. The method400is implemented in a processing unit such as some embodiments of the CPU115or the GPU140in the processing system100shown inFIG.1.

At block405, a processing unit such as a GPU is rendering frames at a first refresh rate and providing the frames to a display system. The display system is a variable refresh rate system and the first refresh rate is one of a set of refresh rates that is supported by the display system. As discussed herein, the frames initially include a first number of lines per frame that is determined based on one or more ratios of the refresh rates in the set supported by the display system, prime factors of the refresh rates, and a common line rate for providing frames to the display system at all the refresh rates in the set.

At decision block410, the processing unit and the display system determine whether there is been a change in refresh rate. If not, the method400continues to monitor for changes in the refresh rate. If a change in the refresh rate is detected, the method400flows to block415.

At block415, the processing unit provides frames having a second number of lines per frame. The processing unit renders the frames at a second refresh rate that differs from the first refresh rate. The second number of lines per frame is determined based on the second refresh rate and the line rate, as discussed herein.

At block420, the processing unit provides the frames to the display unit, which presents or displays the frames at the second refresh rate. The first and second numbers of lines per frame in the frames transmitted at the first and second refresh rates are determined based on one or more ratios of the refresh rates, the prime factors of the refresh rates, and the common line rate. The line rates are therefore whole numbers and the display system does not need to account for fractional line rates. Furthermore, the display system does not perform a mode reset in response to detecting a change in the refresh rate or number of lines per frame.