SIGNAL PROCESSING DEVICE AND CONTROL METHOD OF SIGNAL PROCESSING DEVICE

In the disclosure, unnecessary notification is suppressed in notification that indicates abnormality of an analog signal. A signal processing device includes: a signal state determination part, which determines, for an analog input signal, whether an abnormal state lasts longer than a predetermined time; a notification signal generation part, which notifies, based on the determination result, a controller that an abnormal state occurs in the analog input signal.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims the priority of Japan patent application serial no. 2018-001761, filed on Jan. 10, 2018. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification.

BACKGROUND

Technical Field

The disclosure relates to a signal processing device and the like, in particular, to a signal processing device which processes a signal from a sensor and delivers the signal to a control device.

Related Art

A signal processing device is known which acquires, from a sensor mounted on an industrial machine, such as a measuring device, the physical quantity detected by the sensor, processes the detected signal that is acquired, and delivers the signal to a control device which controls the industrial machine. In such a signal processing device, an analog signal acquired from the sensor is converted into a digital signal by an A/D converter and delivered to the control device.

For example, in patent literature 1 (Japanese Laid-Open No. 2017-134769 (published on Aug. 3, 2017)), a signal control device is disclosed which acquires a signal from a sensor in a data acquisition period that is shorter than a delivery cycle to a control device, thereby avoiding the delay in noise elimination from the signal and delivering the time series data related to the signal after noise elimination to the control device without being delayed.

Here, for A/D converters with equal performance, in a case that a division number of an analog input signal is set high, the input conversion range of the analog input signal is limited. Therefore, compared with a case in which the division number of the analog input signal is set low, in the case that the division number of the analog input signal is set high, the value of the analog input signal easily turns into such a state as described below. For example, the value of the analog input signal is in an over-range state in which the value exceeds the input conversion range of the A/D converter, or the value of the analog input signal is in an under-range state in which the value falls below the input conversion range. The detail is described below.

FIGS. 7(a) and 7(b)are drawings showing an example in which an analog input signal turns into an over-range or under-range state in an A/D converter having a resolution of 16 Bit or 18 Bit.FIG. 7(a)shows an example of the state of the analog input signal when a division number of the analog input signal is set to 30000 under full-scale upper and lower limit values (+10 V, −10 V). Besides,FIG. 7(b)shows an example of the state of the analog input signal when the division number of the analog input signal is set to 64000 under the full-scale upper and lower limit values (+10 V, −10 V). As shown inFIG. 7(a), when the division number is set to as low as30000, the input conversion range is set to 105% and −5% of the full-scale upper and lower limit values. That is, the upper limit value of the input conversion range is +11 V, and the lower limit value is −11 V. Therefore, as long as the value of the analog input signal does not reach +11 V or not fall below −11 V, the analog input signal does not turn to an over-range or under-range state. In contrast, as shown inFIG. 7(b), when the division number is set to as high as 64000, the input conversion range is necessarily limited to 101% and −1% of the full-scale upper and lower limit values. That is, the upper limit value of the input conversion range is +10.2 V, and the lower limit value is −10.2 V. Therefore, compared with the case that the division number is set to as low as 30000, the frequency at which the analog input signal turns into an over-range or under-range state increases. Besides, inFIG. 7(a)andFIG. 7(b), the time series data of the analog input signal when overshoot occurs is shown. As shown inFIG. 7(a), when the upper limit value of the input conversion range is +11 V, the value of the analog input signal does not exceed the upper limit value. On the other hand, as shown inFIG. 7(b), when the upper limit value of the input conversion range is +10.2 V, the value of the analog input signal exceeds the upper limit value. That is, by setting a high division number, the input conversion range becomes narrow; as a result, the analog input signal easily turns over-range or under-range.

For example, when the analog input signal turns into an over-range or under-range state, in a configuration in which a notification showing the abnormality of the analog signal is given, such circumstances as described below come up. That is, when the division number is set high, the notification showing the abnormality of the analog signal is frequently given. For example, the over-range or under-range state of the analog input signal caused by overshoot or undershoot is not necessarily a case in which an abnormal state occurs. However, if the notification showing the abnormality of the analog signal is frequently given even in such a case, circumstances such a decrease in the operation rate are caused.

Such related art as shown in the above-mentioned patent literature 1 is a technology of eliminating the noise in the signal, other than a technology intending to suppress an unnecessary “notification that shows an abnormality”. One aspect of the disclosure realizes a signal processing device which can suppress an unnecessary notification in the notification showing an abnormality of the analog signal.

SUMMARY

The signal processing device of one aspect of the disclosure is a signal processing device that processes an analog input signal from a sensor and delivers the signal to a control device, and includes: a signal state determination part, which determines, for the analog input signal, whether an over-range or under-range state lasts longer than a predetermined time; and a notification part, which notifies the control device that an over-range or under-range state occurs when the signal state determination part determines that the state lasts longer than the predetermined time.

Besides, a control method of the signal processing device of one aspect of the disclosure is a control method of a signal processing device which processes an analog input signal from a sensor and delivers the signal to a control device, and includes: a signal state determination step, which determines, for the analog input signal, whether an over-range or under-range state lasts longer than a predetermined time; and a notification step, which notifies the control device that the over-range or under-range state occurs when it is determined in the signal state determination step that the state lasts longer than the predetermined time.

DESCRIPTION OF THE EMBODIMENTS

Next, an embodiment of one aspect of the disclosure (also referred to as “the embodiment” hereinafter) is described based on the drawings.

A signal processing device10determines, for an analog input signal, whether an over-range or under-range state lasts longer than a predetermined time. When the state lasts longer than a predetermined time, the signal processing device10notifies a controller (control device)40that an over-range or under-range state occurs in the analog input signal.

(a) ofFIG. 2and (b) ofFIG. 2are drawings showing an example of a processing performed to the analog input signal by the signal processing device10of the embodiment. Specifically, (a) ofFIG. 2is a drawing showing an example of a processing in which the signal processing device10converts the analog input signal into a digital signal. In (a) ofFIG. 2, the value of the analog input signal (analog input signal) is represented by a solid line, and the value of the digital signal (converted value) is represented a dotted line. As shown in (a) ofFIG. 2, when the value of the analog input signal is within the input conversion range, the signal processing device10directly converts the value of the analog input signal into a digital signal. On the other hand, when the value of the analog input signal is out of the input conversion range, the signal processing device10converts the value of the analog input signal into a digital signal with the value of the analog input signal as the upper limit value (or the lower limit value) of the input conversion range.

(b) ofFIG. 2is a drawing showing an example of the generation of the signal sent by the signal processing device10to the controller40(the signal which notifies the controller40that an over-range or under-range state occurs). The signal indicates the state of the analog input signal by values. As shown in (b) ofFIG. 2, the signal indicating the value of 1 indicates that analog input signal is in an over-range or under-range state (abnormal state). Besides, the signal indicating the value of 0 indicates that the analog input signal is in a normal state. In the example shown in (b) ofFIG. 2, when the over-range or under-range state lasts longer than the predetermined time (100 ms in the example shown in (b) ofFIG. 2), the signal processing device10generates the signal which indicates the value of 1. Upon receiving the signal which indicates the value of 1 (the signal which indicates that the analog input signal is in an abnormal state), the controller40causes the images showing that the analog input signal is in an abnormal state to be displayed on a display input device50. Besides, the signal processing device10may be configured to accept an input operation of the user which cancels the normality notification through an external machine (such as a support device60described below), and restore the value of the signal to 0.

According to the above-mentioned configuration, even if the analog input signal turns into an over-range or under-range state, when the state does not last longer than 100 ms, the notification that the analog input signal is in an abnormal state is not performed. For example, when the analog input signal is in an over-range or under-range state (abnormal state) because of overshoot or undershoot, the cause of the state is not the failure in the sensor and so on. Therefore, the notification to the effect that the analog input signal is in an abnormal state is unnecessary. Besides, the duration of the abnormal state of the analog input signal caused by overshoot or undershoot is limited. Therefore, by appropriately setting the predetermined time, the notification of abnormal state of the analog input signal caused by overshoot or undershoot can be suppressed.

Besides, the signal processing device10may be configured to receive a plurality of analog input signals from a plurality of sensors, and may perform the abnormality notification processing to each analog input signal.

FIG. 3is a drawing showing an overview of a control system1of the embodiment. As shown inFIG. 3, the control system1includes a plurality of sensors20, a signal processing device10, a communication coupler30, a controller40, a display input device50and a support device60.

For example, the controller40is a master device, and the signal processing device10is a slave device connected to the master device via a high-order bus, namely a high-order communication network. In other words, the control system1may be a master-slave control system which includes the controller40serving as the master device, and more than one signal processing devices10connected to the master device via the network and serving as slave devices. While the controller40is called a “master device” in the sense of management of data transmission via the high-order communication network, the signal processing device10is called a “slave device”.

As shown inFIG. 3, the signal processing device10is a relay device which relays data between a high-order network including the controller40and the like and the sensor2. In the embodiment, the signal processing device10is an AID converter which converts the analog signal to a digital signal.

The communication coupler30is a relay device which relays the communication between the high-order network and the signal processing device10. The communication coupler30relays the communication between the machine included in the high-order network and the signal processing device10.

The sensor20detects the physical quantity (state value) of a control target (not shown), and outputs the signal corresponding to the detected physical quantity (for example, an analog signal) to the signal processing device10. The state value of the control target detected by the sensor20may be any physical quantity such as weight, pressure and so on. As shown inFIG. 3, the sensor20is a device connected to the signal processing device10for communication and becomes the control target of the controller40.

The controller40is a control device which integrally controls the whole control system1, for example, a PLC (Programmable Logic Controller). The controller40acts as the master device of the signal processing device10in the control system1. As shown inFIG. 3, the support device60, the display input device50and so on may be connected to the controller40via a connection cable and the like.

The support device60is a device connected to the control system1to be used for various settings in the control system1such as the operation setting of the sensor20and the signal processing device10. The support device60can be connected to the control system1through the controller40. The support device60may be an information processing device such as a personal computer or a portable information device such as a notebook computer. Moreover, the support device60may also connected to the signal processing device10via the communication coupler30and perform various settings.

The display input device50is, for example, a touch-panel type display input device. The user of the control system1can operate the controller40via the display input device50, or confirm the operation state of the control system1with the display input device50.

(Configuration of Signal Processing Device10)

FIG. 1is a block diagram showing an example of the main part configuration of the signal processing device10in the embodiment. As described above, the signal processing device10is an A/D converter which converts the input analog signal into a digital signal. As shown inFIG. 1, the signal processing device10includes an input terminal11, an A/D conversion part12, a control part13, a transmission-reception part (a notification part, a reception part)14and a storage part15.

The input terminal11accepts the input of a signal from an external machine. In the embodiment, the input terminal11accepts the input of an analog signal from the sensor20in particular. Besides, the signal processing device10may also accept the input of an analog signal from each of a plurality of the sensors20by each of a plurality of channels. In this configuration, the signal processing device10may include a plurality of input terminals11corresponding to the plurality of channels.

The A/D conversion part12converts the analog signal output by the sensor20into a digital signal cyclically (at a sampling cycle).

Specifically, when the value of the analog signal (analog input signal) output by the sensor20is within the input conversion range, the A/D conversion part12directly converts the value of the analog input signal into a digital signal. On the other hand, when the value of the analog input signal is out of the input conversion range, the A/D conversion part12converts the value of the analog input signal into a digital signal with the value of the analog input signal as the upper limit value (or the lower limit value) of the input conversion range.

The A/D conversion part12transmits the digital signal to the control part13. In the embodiment, the digital signal is transmitted to a signal state determination part131in particular.

The control part13includes a CPU (Central Processing Unit), a RAM (Random Access Memory), a ROM (Read Only Memory) and the like, and controls each configuration element according to the information processing. The control part13includes an upper and lower limit value determination part130, a signal state determination part131, a notification signal generation part (a notification part, a display instruction part)132and a determination condition setting part133.

Besides, the control part13may conduct a filter processing to eliminate the noise of the digital signal. The control part13may transmits the digital signal to which the filter processing is conducted to the controller40via the communication coupler30.

(Upper and Lower Limit Value Determination Part130)

The upper and lower limit value determination part130determines, in each sampling cycle, whether the value of the digital signal received from the A/D conversion part12is the upper limit value or lower limit value of the input conversion range, and notifies, in each sampling cycle for example, the signal state determination part131of the determination result. The upper and lower limit value determination part130may transmit the received digital signal to the signal state determination part131only when the value of the received digital signal is the upper limit value or lower limit value of the input conversion range.

Besides, the upper and lower limit value determination part130may cause the time series data of the analog input signal to be displayed on an external machine.

For example, the upper and lower limit value determination part130determines whether the value of the digital signal received from the A/D conversion part12is above or below a predetermined value. Here, the predetermined value is a value set within the input conversion range, and is a value used to determine whether the value of the analog input signal is close to the upper limit value or lower limit value of the input conversion range. For example, the predetermined value may be set to two values, one of which is used to determine whether the value of the analog input signal is close to the upper limit value of the input conversion range, and the other of which is used to determine whether the value of the analog input signal is close to the lower limit value of the input conversion range. The upper and lower limit value determination part130may notify, in accordance with the determination result, the notification signal generation part132that the value of the digital signal is above or below the predetermined value (close to the upper limit value or lower limit value of the input conversion range).

According to the above-mentioned configuration, the time series data of the analog input signal can be displayed to the user. Moreover, the display input device50may also be a configuration which accepts an instruction of the time series data of the analog input signal from the user and displays the time series data.

The signal state determination part131determines, for the analog input signal, whether an over-range or under-range state lasts longer than a predetermined time.

Specifically, the signal state determination part131determines whether the receiving of the digital signal indicating the upper limit value or lower limit value of the input conversion range lasts longer than a predetermined time. That is, the signal state determination part131determines whether the digital signal in each sampling cycle is continuously determined by the upper and lower limit value determination part130to be the upper limit value or lower limit value for longer than a predetermined time (for example, the duration of predetermined integer multiple of the sampling cycle). When the receiving of the digital signal indicating the upper limit value or lower limit value of the input conversion range lasts longer than the predetermined time, the signal state determination part131notifies the notification signal generation part132that the analog input signal is in an over-range or under-range state (abnormal state). The signal state determination part131may also perform the determination with reference to, for example, determination condition151stored in the storage part15which indicates the predetermined time.

When “n times of the sampling cycle≥the predetermined time”, the signal state determination part131determines that the determination result of the upper and lower limit value determination part130in each sampling cycle “is the upper limit value or lower limit value” continuously form more than n times. Moreover, in the description below, “n” is “an integer of 1 or more”.

When the determination result of the upper and lower limit value determination part130in each sampling cycle is continuously “the upper limit value or lower limit value” for more than n times, the signal state determination part131determines that an over-range or under-range state occurs. Then, the signal state determination part131notifies the notification signal generation part132of the determination result. In contrast, when the determination result of the upper and lower limit value determination part130is not continuously “the upper limit value or lower limit value” for more than n times, the signal state determination part131determines that an over-range or under-range state does not occur.

For example, in a case of “sampling cycle=50 ms”, and “twice of sampling cycle=100 ms≥predetermined time>50 ms=one time of sampling cycle”, the signal state determination part131conducts the following processing. That is, the signal state determination part131determines whether “the determination result of the upper and lower limit value determination part130in each sampling cycle is continuously the upper limit value or lower limit value for more than twice”.

When it is determined that “the determination result of the upper and lower limit value determination part130in each sampling cycle is continuously ‘the upper limit value or lower limit value’ for more than twice”, the signal state determination part131determines that an over-range or under-range state occurs. The signal state determination part131determines, when the determination result of the upper and lower limit value determination part130in the n-th cycle is “the upper limit value or lower limit value”, and the determination result of the upper and lower limit value determination part130in the n+1-th cycle is also “the upper limit value or lower limit value”, that an over-range or under-range state occurs.

In contrast, when it is determined that “even if one of the determination result of the upper and lower limit value determination part130in each sampling cycle is ‘the upper limit value or lower limit value’, the determination result of the upper and lower limit value determination part130is not continuously ‘the upper limit value or lower limit value’”, the signal state determination part131determines that an over-range or under-range state does not occur. That is, even when the determination result of the upper and lower limit value determination part130in the n-th cycle is “the upper limit value or lower limit value”, if the determination result of the upper and lower limit value determination part130in the n+1-th cycle is not “the upper limit value or lower limit value”, the signal state determination part131determines that an over-range or under-range state does not occur.

Besides, the predetermined time may be set to integer multiple of the sampling period of the analog input signal in the A/D conversion part12.

According to the above-mentioned configuration, when an over-range or under-range state lasts for analog input signals continuously sampled by the A/D conversion part12for predetermined times, it can be determined that the state occurs.

Besides, the signal processing device10may further include a plurality of channels for the connection to each of the plurality of sensors20. The above-mentioned time series data may be the time series data of one analog input signal input by one channel or the time series data of a plurality of analog input signals input by a plurality of different channels.

According to the above-mentioned configuration, the time series data of one analog input signal input by one channel or the time series data of a plurality of analog input signals input by a plurality of different channels can be displayed to the user. Besides, by displaying the time series data of a plurality of analog input signals input by a plurality of different channels, the user can compare the time series data of the analog input signals input by each channel with each other.

In accordance with the determination result of the signal state determination part131, the notification signal generation part132notifies the controller40that an over-range or under-range state occurs in the analog input signal.

Specifically, the notification signal generation part132generates a signal which indicates the state of the analog input signal. The notification signal generation part132generates, in accordance with an instruction of generating a signal which indicates that the analog input signal of the signal state determination part131is in an abnormal state, a signal which indicates that the analog input signal is in an abnormal state. Moreover, when such an instruction is not received from the signal state determination part131, the notification signal generation part132may generates a signal which indicates that the analog input signal is in a normal state. Detailed example of the signal which indicates the state of the analog input signal is described in the above-mentioned “§ 1 Application example”, therefore repeated description is omitted here. The notification signal generation part132transmits the generated signal to the transmission-reception part14and instructs a transmission to the controller40.

Besides, the notification signal generation part132may be configured so that once the signal indicating that the analog input signal is in an abnormal state is generated, the signal generation goes on until an input operation of notification cancellation from the user is accepted. For example, the notification signal generation part132may accept the input operation of notification cancellation of the user from the display input device50via the controller40and the transmission-reception part14.

Besides, when the upper and lower limit value determination part130determines that the value of the analog input signal is close to the upper limit value or lower limit value of the input conversion range, the notification signal generation part132may also perform the following processing. The notification signal generation part132generates a signal which instructs the controller40to display the time series data of the analog input signal through the transmission-reception part14and the communication coupler30.

The notification signal generation part132transmits the generated signal to the transmission-reception part14and instructs a transmission to the controller40. The controller40may instruct the display input device50and so on to display upon receiving the instruction.

Besides, the display of the time series data of the analog input signal may also be conducted when the controller40accepts an operation of the user instructing the display via the display input device50and so on.

The determination condition setting part133sets the predetermined time according to the user operation. Specifically, the determination condition setting part133accepts, from the support device60and via the transmission-reception part14, the user operation on the setting of the predetermined time indicated by the determination condition151. The determination condition setting part133sets the predetermined time indicated by the determination condition151based on this operation.

According to the above-mentioned configuration, for the analog input signal, when an over-range or under-range state lasts longer than the predetermined time desired by the user, the controller40can be notified of the occurrence of the state. Besides, when the signal processing device10is configured to process a plurality of analog input signals, it may be configured so that the user can set the predetermined time indicated by the determination condition151for each analog input signal. For example, when the display input device50is configured to display the time series data (for example, waveform data) of a plurality of analog input signals, the signal processing device10may be configured as follows. The signal processing device10accepts the input data from the user regarding the setting (change) of the predetermined time indicated by the determination condition151for each analog input signal, and sets the predetermined time for each analog input signal.

The transmission-reception part14receives the signal from the notification signal generation part132and transmits the signal to the communication coupler30. Besides, the transmission-reception part14receives, from the communication coupler30, the operation input of the user related to the setting of the predetermined time indicated by the determination condition151, and transmits to the determination condition setting part133.

Besides, the transmission-reception part14transmits the digital signal converted by the A/D conversion part12to the communication coupler30. The communication coupler30cyclically delivers the signal received from the signal processing device10(the transmission-reception part14) to the controller40(control device) in a predetermined delivery cycle.

Besides, the transmission-reception part14acquires, from the support device60and via the communication coupler30and the controller40, the user operation which sets the predetermined time indicated by the determination condition151. The transmission-reception part14transmits the input data to the determination condition setting part133.

The storage part15is, for example, an auxiliary storage device such as a solid state drive, and stores the above-mentioned determination condition151and so on.

(Example of Processing Flow of Signal Processing Device10: Abnormality Notification Determination Processing of Analog Input Signal)

FIG. 4is a flowchart showing an example of the flow of abnormality notification determination processing of the analog input signal of the signal processing device10. An example of the processing flow of the signal processing device10is described usingFIG. 4. The A/D conversion part12cyclically samples (acquires) the analog input signal (S1), and converts the analog input signal into a digital signal (S2). Next, the upper and lower limit value determination part130determines, in each sampling cycle, whether the value of the converted digital signal is the upper limit value or lower limit value of the input conversion range (S3). When the value of the converted digital signal is the upper limit value or lower limit value of the input conversion range (“YES” in S3), the processing proceeds to S4described below. The signal state determination part131determines, for the converted digital signal, whether the lower limit value or upper limit value of the input conversion range lasts for the predetermined time (S4: signal state determination step). That is, for the number n which satisfies “n times of sampling cycle≥predetermined time”, the signal state determination part131determines whether the determination result of the upper and lower limit value determination part130in each sampling cycle is continuously “the upper limit value or lower limit value” for more than n times. When the value of the digital signal lasts for the predetermined time in the form of the lower limit value or the upper limit value (“YES” in S4), the notification signal generation part132notifies the controller40of the abnormality of the analog signal by transmitting a signal which indicates the state of the analog input signal (S5: notification step). Next, when the input of the analog signal is ended (“YES” in S6), the processing is ended. Moreover, when the input of the analog signal is not ended (“NO” in S6), the processing returns to S1. Besides, when the lower limit value or upper limit value does not last for the predetermined time (“NO” in S4), the processing proceeds to S6. Besides, when the value of the converted digital signal is not the upper limit value or lower limit value of the input conversion range (“NO” in S3), the processing also proceeds to S6.

(Example of Processing Flow of Signal Processing Device10: Determination Condition Setting Processing)

FIG. 5is a flowchart showing an example of the condition setting processing flow of the abnormality notification determination of the analog input signal of the signal processing device10. An example of the processing flow of the signal processing device10is described usingFIG. 5. The notification signal generation part132instructs the controller40to display the time series data of the analog input signal (S11). Next, the transmission-reception part14receives the input data of the user related to the predetermined time indicated by the determination condition151(S12). Next, the determination condition setting part133changes the predetermined time indicated by the determination condition151based on the input data (sets the determination condition) (S13). Then, the processing is ended.

FIG. 6is a drawing showing an example of the setting of the predetermined time used for the determination performed by the signal state determination part131. The graph inFIG. 6represents the time series data of a plurality of analog input signals. For example, the display input device50may display the graph shown inFIG. 6as the time series data of the analog input signal. In the graph shown inFIG. 6, channel numbers (ch1-ch4) corresponding to each analog input signal are associated. The waveform in the circle of the dotted line inFIG. 6is the time series data of the analog input signal of ch4. More specifically, the behavior of the value of analog input signal caused by overshoot is shown. As shown inFIG. 6, the value of the analog input signal having the time series data of the analog input signal of ch4 exceeds the upper limit value of the input conversion range for 500 microseconds due to overshoot. That is, the analog input signal of ch4 is in an over-range state for 500 microseconds due to overshoot.

For example, when the predetermined time is set longer than 500 microseconds, the signal state determination part131does not determine the generation of over-range state of the analog input signal caused by overshoot as an abnormal state. Therefore, the controller40is not notified of the over-range of the analog input signal caused by overshoot. For example, taking the margin into consideration, the predetermined time may be set to twice the length of the time in which the analog input signal is in an over-range state (1 millisecond in the example shown inFIGS. 7(a) and 7(b)).

The signal processing device10may also be capable of performing, for example, an A/D conversion processing in which the resolution is 16 Bit or 18 Bit.

The control block (in particular, the signal state determination part131, the notification signal generation part132and the determination condition setting part133) of the signal processing device10may be realized by a logical circuit (hardware) formed into an integrated circuit (IC chip) or be realized by software.

In the case of the latter, the signal processing device10includes a computer for executing commands of programs acting as software which fulfills various functions. The computer includes, for example, more than one processor and computer readable storage medium which stores the programs. Then, the operation of the disclosure is achieved by the processor reading the programs from the storage medium and executing the programs in the computer. The processor can be a CPU (Central Processing Unit) for example. Besides “non-temporary tangible medium” such as a ROM (Read Only Memory), the storage medium may also be a tape, a disk, a card, a semiconductor memory, a programmable logical circuit and so on. In addition, a RAM (Random Access Memory) which develops the program may also be included. Besides, the program may be supplied to the computer via any transmission medium (a communication network, a broadcast wave or the like) capable of transmitting the program. Moreover, one aspect of the disclosure can also be realized by the form of a data signal which is embedded in a carrier wave and for which the program is embodied by electronic transmission.

According to the above configuration, even if the analog input signal turns into an over-range or under-range state (abnormal state), when the state does not last for a predetermined time, the notification is not given which shows the over-range or under-range state of the analog input signal. For example, when the analog input signal turns into an abnormal state because of overshoot or undershoot, the cause of the state is not the failure in the sensor and so on. Therefore, the notification to the effect that the analog input signal is in an abnormal state is unnecessary. Besides, the duration of the abnormal state of the analog input signal caused by overshoot or undershoot is limited. Therefore, by appropriately setting the predetermined time, the notification of abnormal state caused by overshoot or undershoot can be suppressed.

The signal processing device of one aspect of the disclosure may also include a reception part which acquires a user operation that sets the predetermined time; and a determination condition setting part which sets the predetermined time in accordance with the user operation.

According to the above configuration, for the analog input signal, when the over-range or under-range state lasts longer than the predetermined time desired by the user, the control device can be notified that the state occurs.

The signal processing device of one aspect of the disclosure may also include a display instruction part which causes time series data of the analog input signal to be displayed on an external machine. According to the above-mentioned configuration, the time series data of the analog input signal can be shown to the user.

The signal processing device of one aspect of the disclosure may further include a plurality of channels for connection to each of a plurality of the sensors, and the time series data may be the time series data of one of the analog input signals input by one of the channels, or be the time series data of a plurality of the analog input signals input by a plurality of different channels.

According to the above-mentioned configuration, the time series data of one analog input signal input by one channel, or the time series data of a plurality of analog input signals input by a plurality of different channels can be shown to the user. Besides, by displaying the time series data of a plurality of analog input signals input by a plurality of different channels, the user can compare the time series data of the analog input signals input by each channel.

In the signal processing device of one aspect of the disclosure, the predetermined time may be the integer multiple of a sampling period of the analog input signals by the signal processing device.

According to the above-mentioned configuration, for the analog input signals sampled continuously by the signal processing device for predetermined times, when the over-range or under-range state lasts, the occurrence of the state can be notified.

In the signal processing device of one aspect of the disclosure, the control device may be a master device in a master-slave control system, and the signal processing device may be a slave device connected to the master device via a network.

According to the above-mentioned configuration, the signal processing device can be applied in a master-slave control system.

According to one aspect of the disclosure, unnecessary notification can be suppressed in the notification showing abnormality of the analog signal.

The disclosure is not limited to the embodiments described above, various changes can be made within the scope defined by the claims, and embodiments obtained by appropriately combining the technical means disclosed respectively in different embodiments are also included in the technical scope of the disclosure.