Component-embedded substrate, and method of manufacturing the component-embedded substrate

A component-embedded substrate includes an electrically insulating base (11) of resin, an electric or electronic embedded component (8) and a dummy embedded component (7) both embedded in the insulating base (11), a conductor pattern (18) formed on at least one side of the insulating base (11) and connected directly to or indirectly via a connection layer (6) to the embedded component (8) and the dummy embedded component (7), and a mark (10) formed on a surface of the dummy embedded component (7) and used as a reference when the conductor pattern (18) is formed, whereby positional accuracy of the conductor pattern (18) relative to the embedded component (8) can be improved.

TECHNICAL FIELD

The present invention relates to a component-embedded substrate with a conductor pattern formed with high accuracy, and a method of manufacturing such a component-embedded substrate.

BACKGROUND ART

There have been known component-embedded substrates having electric or electronic components embedded therein (see Patent Document 1, for example). A component-embedded substrate as typified by the one disclosed in Patent Document 1 is fabricated by laminating an electrically insulating base such as a prepreg on a component, and then partly removing an outside electrically conductive layer by etching or the like, to form a conductor pattern. When the pattern is to be formed, however, difficulty arises in aligning the pattern with the terminals of the component. Thus, using an electrically conductive substance such as copper, a mark is formed on a core substrate, which is an insulating base with a hole permitting the component to be inserted therein, and the core substrate is subjected to lamination along with the component. The buried mark is detected by means of X rays to form a through hole passing through the mark, and a conductor pattern is formed using the through hole as a reference, to improve the positional accuracy of the conductor pattern. However, forming a mark on the core substrate requires the same amount of labor as forming an ordinary conductor pattern, and also an additional process needs to be performed for that purpose.

There has also been known a method in which a hole is formed beforehand in an electrically conductive layer such as a copper foil, a solder resist is formed using the hole as a reference, X-ray hole cutting is performed following lamination by using the hole as a reference, a guide hole is formed using the X rays-cut hole as a reference, and a conductor pattern is formed using the guide hole as a reference, to improve positional accuracy. This method, however, involves multiple processes performed using different holes as reference positions, and actual positional accuracy is low. In practice, moreover, the resin of prepreg flows into the hole formed in the conductive layer, making it difficult to fabricate a satisfactory substrate.

PRIOR ART DOCUMENT

Patent Document

SUMMARY OF THE INVENTION

Problem to be Solved by the Invention

The present invention was created in view of the aforementioned conventional techniques, and an object thereof is to provide a component-embedded substrate whose conductor pattern can be formed with high positional accuracy relative to an embedded component without the need for complicated process, and a method of manufacturing the component-embedded substrate.

Means for Solving the Problem

To achieve the object, the present invention provides a component-embedded substrate comprising: an electrically insulating base made of resin; an electric or electronic embedded component and a dummy embedded component both embedded in the insulating base; a conductor pattern formed on at least one side of the insulating base and connected directly to or indirectly via a connection layer to the embedded component and the dummy embedded component; and a mark formed on a surface of the dummy embedded component and used as a reference when the conductor pattern is formed.

Preferably, the connection layer is made of solder.

Alternatively, the connection layer is preferably made of an adhesive.

Preferably, the mark is made of a metal (e.g., copper, nickel, solder, etc.) capable of being easily detected by X rays.

The dummy embedded component and the insulating base are preferably made of an identical material (e.g., epoxy resin etc.).

Preferably, the component-embedded substrate has a reference hole penetrating through the insulating base, the mark and the dummy embedded component.

The present invention also provides a method of manufacturing a component-embedded substrate, comprising: forming an electrically conductive layer, which is to form a conductor pattern, on a supporting plate; forming a connection layer on the supporting plate and the conductive layer; connecting an electric or electronic component to the conductive layer with the connection layer therebetween; connecting a dummy component having a mark affixed thereon to the supporting plate with the connection layer therebetween; embedding the component and the dummy component in an electrically insulating base of resin; and removing part of the conductive layer while using the mark as a reference, to form the conductor pattern.

Advantageous Effects of the Invention

According to the present invention, the component and the dummy component are mounted via the connection layer on the conductive layer forming the conductor pattern. The component and the dummy component are mounted directly or indirectly on the conductive layer with use of an identical mounter and, therefore, are positioned with identical accuracy. Accordingly, relative positional accuracy of the components can be enhanced. Also, the conductor pattern is formed using, as a reference position, the mark affixed on the dummy embedded component, and this makes it possible, in combination with the fact that the relative positional accuracy of the dummy embedded component and the embedded component is enhanced, to improve the positional accuracy of the conductor pattern relative to the embedded component. Further, the dummy component used for improving the positional accuracy can be mounted by the same process as that for mounting the component, as stated above. No complicated process is therefore required for improving the positional accuracy of the conductor pattern.

Where the connection layer is made of solder, it is possible to further enhance the positional accuracy of the embedded component and the dummy embedded component by making use of the self-alignment effect of solder.

Alternatively, the connection layer may be made of an adhesive, and the component and the dummy component may be mounted via the adhesive such that the electrodes of the component face the adhesive, whereby the electrode-side surface of the component can be positioned on a level with the corresponding surface of the dummy component. Since the mounting accuracy depends on the precision of the mounter used, relative positional accuracy of the components can be further enhanced. The dummy embedded component and the adhesive are indirectly connected with the mark therebetween, and in this case, by appropriately changing the thickness of the mark, it is possible to adjust the height of the dummy component so as to be on a level with the component.

Where a material capable of being easily detected by X rays is used as the material of the mark, the mark can be detected using an automatic aligner capable of identifying the mark on an X-ray image.

The dummy component and the insulating base may be made of an identical material. In this case, after the mark is detected and used as a reference position for forming the conductor pattern, the dummy embedded component itself can be used as the insulating base in the subsequent process, whereby processing efficiency is improved. Further, since the coefficient of thermal expansion of the dummy embedded component is identical with that of the insulating base, displacement between the mark and the dummy embedded component can be suppressed.

The reference hole is formed so that the conductor pattern can be formed using the reference hole as a reference. Since the conductor pattern can be formed with its positioning relative to the reference hole being visually checked, workability improves.

Also, according to the present invention, the dummy component may be connected to a region located in the same plane as, but set apart from, the conductive layer to which the component is connected. In this case, even if the substrate does not have sufficient space therein for mounting the dummy component, positional accuracy of the conductor pattern can be improved by using the mark on the dummy component as a reference position without embedding the dummy component in or near the product. Also in the manufacturing method of the present invention, since the positional accuracy of the components is determined by the precision of an identical mounter used to mount the components, relative positional accuracy of these components improves. Further, the conductor pattern is formed using, as a reference position, the mark affixed on the dummy embedded component, and this makes it possible, in combination with the fact that the relative positional accuracy of the dummy embedded component and the embedded component is enhanced, to improve the positional accuracy of the conductor pattern relative to the embedded component. In the manufacturing method, moreover, the dummy component used for improving the positional accuracy can be mounted by the same process as that for mounting the component. No complicated process is therefore required for improving the positional accuracy of the conductor pattern.

MODE FOR CARRYING OUT THE INVENTION

As illustrated inFIG. 1, a supporting plate1is prepared first. The supporting plate1is, for example, a SUS plate. Then, as shown inFIG. 2, a thin electrically conductive layer2is formed over a surface of the supporting plate1. The conductive layer2is formed, for example, by copper plating. Subsequently, a mask layer3is formed on the conductive layer2, as shown inFIG. 3. The mask layer3is a solder resist, for example, and is formed such that predetermined portions of the conductive layer2are exposed. Some of the exposed regions serve as mounting spots4for mounting a component, and others of the exposed regions are used as dummy mounting spots5for mounting a dummy component. The positions of the mounting spots4and dummy mounting spots5are determined beforehand. Specifically, the positions of the mounting spots4are determined taking into account the positions of solder pads6(seeFIG. 4) formed as a connection layer for mounting a component8(seeFIG. 5) on the conductive layer2which is to form a conductor pattern18(seeFIG. 8). The positions of the dummy mounting spots5are determined taking into account the position of a dummy component7(seeFIG. 5) formed so as to improve the positional accuracy of the conductor pattern18.

Then, the solder pads6are formed as a connection layer on the mounting spots4and the dummy mounting spots5, as illustrated inFIG. 4. Next, as shown inFIG. 5, an electric or electronic component8and a dummy component7are mounted on the conductive layer2or the mask layer3. The component8is mounted with its connection terminals9connected to the respective solder pads6, thereby achieving electrical connection between the component8and the conductive layer2. The dummy component7is connected to the corresponding solder pads6, whereby the conductive layer2and the dummy component7are connected to each other. The dummy component7is connected directly to or indirectly via the solder pads6or the mask layer3to the conductive layer2. A mark10, described later, is formed on a surface of the dummy component7(usually, on a connection surface where the dummy component7is connected to the conductive layer2, though, in the figure, the mark10is arranged on that surface of the dummy component7which is located opposite the connection surface).

Subsequently, an electrically insulating base11and a core substrate12are prepared. The insulating base11and the core substrate12are each made of resin. The insulating base11is what is called a prepreg. The core substrate12has a through hole14into which the component8can be inserted. With the component8inserted into the through hole14, the insulating base11and further an upper electrically conductive layer22are superposed, and the resulting structure is compressed.

As a result, a laminated body15is obtained as shown inFIG. 6, the laminated body15being a laminate of the supporting plate1, the insulating base11and the core substrate12. At this stage, the insulating base11is filled into the space of the through hole14. Thus, the insulating base11and the core substrate12form an electrically insulating layer16, and the component8is embedded in the insulating layer16. Since the through hole14is formed in advance, it is possible to suppress the pressure applied to the component8during the lamination process. Also, the component8, if large in size, can be satisfactorily embedded in the insulating layer16. Although, in the above example, the core substrate12is used, prepreg (insulating base11) alone may be used for the lamination as the case may be. In this case, the insulating layer16is formed in its entirety of the insulating base11.

Because of the lamination, the dummy component7is also embedded in the insulating layer16. The core substrate12may be provided with a through hole into which the dummy component7can be inserted, or the core substrate12may be placed so as not to apply pressure to the dummy component7as illustrated.

Then, the supporting plate1is removed as shown inFIG. 7. Subsequently, the position of the dummy embedded component7is detected, and a reference hole17penetrating through the dummy embedded component7as well as the conductive layer2is formed. InFIG. 7, the reference hole17penetrates through the insulating layer16as well as the conductive layers2and22formed on the opposite surfaces of the insulating layer16. The position of the dummy embedded component7is detected using an automatic aligner capable of identifying the mark10of copper on an X-ray image, such as an X-ray irradiation device (not shown). By using an X-ray irradiation device, it is possible to accurately detect the mark10and thus the position of the dummy embedded component7. The material of the mark10is therefore not limited to copper and may be any material (e.g., nickel, solder, etc.) that can be easily detected by means of X rays. Instead of detecting the dummy embedded component7in the above manner, the conductive layer2may be scraped to expose the dummy embedded component7so that the mark10may be directly identified with use of a camera. Also, without embedding the dummy component7in the insulating layer16, the mark10may be visually identified from outside.

Subsequently, as illustrated inFIG. 8, a through hole23is formed using the reference hole17as a reference position, and an electrically conductive coating20is formed on the inner surface of the through hole23by plating, thereby ensuring electrical conduction between the opposite sides of the insulating layer.

Then, using the reference hole17as a reference position, the conductive layers2and22are partly removed by etching or the like, as shown inFIG. 9, to form conductor patterns18. This completes the fabrication of a component-embedded substrate19.

In the component-embedded substrate19fabricated in the aforementioned manner, the embedded component8and the dummy embedded component7are mounted via the solder pads6as a connection layer on the conductive layer2forming the conductor pattern18. The component8and the dummy component7are mounted with use of an identical mounter and therefore, are positioned with identical accuracy. Accordingly, relative positional accuracy of the components7and8can be enhanced. Also, the conductor patterns18are formed using, as a reference position, the mark10affixed on the dummy embedded component7, and this makes it possible, in combination with the fact that the relative positional accuracy of the dummy embedded component7and the embedded component8is enhanced, to improve the positional accuracy of the conductor patterns18relative to the embedded component8. Further, the dummy component7used for improving the positional accuracy can be mounted by the same process as that for mounting the component8, as stated above. No complicated process is therefore required for improving the positional accuracy of the conductor patterns18.

Also, since the connection layer is constituted by the solder pads6, it is possible to further enhance the positional accuracy of the embedded component8and the dummy embedded component7by making use of the self-alignment effect of the solder pads6. Further, the mark10is made of copper and thus can be easily detected by means of X rays. The dummy component7may be made of a material (e.g., epoxy resin) identical with that of the insulating base11. In this case, after the mark10is detected and used as a reference position for forming the conductor patterns18, the dummy embedded component7itself can be used as the insulating base11in the subsequent process, whereby processing efficiency is improved. Further, since the coefficient of thermal expansion of the dummy embedded component7is identical with that of the insulating base11, displacement between the mark10and the dummy embedded component7can be suppressed.

The reference hole17is formed so that the conductor patterns18can be formed using the reference hole17as a reference. Since the conductor patterns18can be formed with their positioning relative to the reference hole17being visually checked, workability improves.

Instead of using the solder6as the connection layer, adhesive13may be used as illustrated inFIG. 10. In the example ofFIG. 10, the adhesive13is in direct contact with the mark10and the conductor pattern18. This permits the mark10of the dummy component7to be located on a level with the component8, and since the mounting accuracy depends on the precision of the mounter used, relative positional accuracy of the components7and8can be further enhanced.

In the foregoing example, the mark10is formed on that surface of the dummy embedded component7which is located opposite the connection surface where the component7is connected to the solder pads6. Alternatively, the mark10may be formed on the connection surface where the dummy component7is connected to the solder pads6, as illustrated inFIG. 11, and terminals (ball lands)21may be formed so as to surround the mark10. The terminals21are connected to the solder pads6. The formation of the ball lands21in the form of a grid as shown inFIG. 11is preferred because self-alignment stability can be improved.

Further, as illustrated inFIG. 12, dummy components7may be mounted on the supporting plate1. In the aforementioned example of manufacturing procedure, the dummy components7are mounted on a portion of the supporting plate1located outside of the conductive layer2, instead of mounting the dummy component7on the mask layer3formed on the conductive layer2as illustrated inFIG. 5. In this case, dummy mounting spots5may be defined by the mask layer3, as in the example shown inFIG. 5. Then, using marks10on the dummy components7as reference positions, conductor patterns18are formed. With this configuration, even in the case where the substrate does not have sufficient space therein for mounting the dummy components7, the positional accuracy of the conductor patterns18can be improved by using the marks10as reference positions without embedding the dummy components7. The component-embedded substrate fabricated in this manner has the same advantages as those achieved by the aforementioned component-embedded substrate19.

EXPLANATION OF REFERENCE SIGNS