Negative capacity circuit for high frequencies applications

A negative capacitances circuit includes first and second branches connected between a first reference voltage and a second reference voltage. The first branch includes, in series, a first biasing resistor, a first diode, a first bipolar transistor, and a first current source. The second branch includes, in series, a second biasing resistor, a second diode, a second bipolar transistor, and a second current source. The first transistor has a base coupled to a collector of the second transistor and to one input, and the second transistor has a base coupled to a collector of the first transistor and to another input. A capacitor is connected between the emitter of said first transistor and the emitter of said second transistor. A linearization resistor is coupled in parallel between the two emitters of said first and said second transistors.

TECHNICAL FIELD

The present disclosure generally relates to the field of electronic circuits and more particularly but not exclusively to a negative capacitance circuit.

BACKGROUND INFORMATION

Circuits achieving an electric model being equivalent to a negative capacitor are already known in the art, as shown in the following publications.

The document “Using a negative capacitance to increase the tuning range of a varactor diode in MMIC technology”, Svilen Kolev, IEEE Transactions on microwave theory and techniques, December 2001, discloses a first application of such a negative capacitance circuit.

Another application of such a circuit is disclosed in this publication “Generation of negative capacitance in a common gate MESFET stage and application to optical receiver design at microwave frequencies”, Jason D Drew, Wideband circuits, modeling and techniques, IEE colloquium, May 1996.

However, one may notice that such circuits can not be used for high frequencies applications, operating at frequencies beyond 2 Ghz in BiCMOS technology.

BRIEF SUMMARY

An embodiment provides a negative capacitance circuit for high frequencies applications.

An embodiment provides a negative capacitance circuit which is simple to carry out and which can be used for RF filters for mobile telecommunications.

Another embodiment provides a negative capacitance circuit which can be easily combined with filtering circuits based on Bulk Acoustic Wave (B.A.W.) resonators.

An embodiment of a negative capacitance circuit comprises a first input (In+) and a second input (In−).

The circuit of one embodiment further comprises:a first branch connected between a first reference voltage (Vdd) and a second voltage reference (Ground), the first branch including, in series, a first biasing resistor, a first diode, a collector-emitter circuit of a first bipolar transistor (43) and a first current source; anda second branch connected between said first reference voltage (Vdd) and said second reference voltage (Ground), the second branch including, connected in series, a second biasing resistor, a second diode, a collector-emitter circuit of a second bipolar transistor and a second current source.

The base of the first transistor is coupled to the collector terminal of the second transistor and to said second input (In−). Furthermore, the base of the second transistor is coupled to the collector terminal of the first transistor and to the first input (In+).

The circuit of one embodiment further comprises a capacitor connected between the emitter terminal of the first bipolar transistor and the emitter terminal of the second bipolar transistor, and in addition a linearization resistor being coupled in parallel between the two emitter terminals of the first and the second bipolar transistors.

In one embodiment, the first and said second current sources are based on MOS type transistors.

In one particular embodiment the first and said second diodes are emitter-collector junctions of bipolar transistors.

In one particular embodiment, the negative capacitance circuit is coupled in parallel to a BAW type resonator so as to modify the anti-resonant frequency of that resonator.

Particularly in one embodiment, the circuit comprises a varactor which allows the adjustment of the series resonant frequency of the resonator.

In one embodiment, the capacitance circuit is used for carrying out a Voltage Control Oscillator (V.C.O.).

An embodiment of the invention is well fitted for the realization of RF filters for mobile telecommunications.

DETAILED DESCRIPTION

There is now described one particular embodiment of a circuit comprising an integrated resonator in accordance with the present invention and which is adapted to the realization of a RF receiver which can be used for mobile telecommunications. More specifically, the circuit of one embodiment is associated with an acoustic resonator, such as, for instance, a Bulk Acoustic Wave (B.A.W.) or Surface Acoustic Wave (S.A.W.) resonator for the purpose of realizing highly effective filtering circuits.

With respect toFIG. 1, there is now described the realization of a negative capacitance circuit1A between two terminals, respectively12and14, which comprises, in series, a first controllable current source11, a capacitor10and a second controllable current source13.

The voltage of terminals12and14are respectively designated as V1and V2(V2being supposed to be equal to −V1in a differential configuration). In addition, one designates Va the voltage of the terminal at the junction between the first source11and capacitor10, and one designates Vb the voltage of the terminal at the junction of the second source13and capacitor10.

The equations ruling the operation of the two controllable current sources11and13are as follows:

I=gm(V2+Vb)=−gm(V1+Va) for the controlled current source11, and

I=gm(V1+Va) for controlled current source13.

The parameter gm is, by definition, the transconductance of the voltage controlled source of bipolar transistors43and48(inFIG. 4) of the controllable current source.

When considering this electrical equivalent model, the equations of which being illustrated inFIG. 3for the sake of clarity, one notices that it is possible to achieve impedance curves complying with the charts shown inFIG. 2. It can be seen that, the impedance curve21falls with a slope of −20 dB/decade until it reaches a critical pulsation value being equal to gm/2C and, beyond that value, the circuit introduces a phase advance of 90 degrees on the phase curve20.

Those curves clearly show the behavior of a resistive circuit having a negative capacitance.

FIG. 4illustrates one embodiment of a circuit1B in accordance with the present invention which is particular suitable for high frequencies.

This circuit1B comprises a first and a second branch2,3, each being connected between a first reference voltage Vdd and a second reference voltage (Ground).

The first branch2comprises, connected in series, a first bias resistor41, a first diode42, and then a collector-emitter circuit (the collector-base and base-emitter junctions connected in series) of a first bipolar transistor43and a first current source44.

The second branch3comprises, connected in series, a second bias resistor46, a second diode47, and then the collector—emitter circuit (i.e., the series of the collector-base and base-emitter junctions) of a second bipolar transistor48and then a second current source49.

The base terminal of first transistor43is connected to the collector terminal of the second transistor48(corresponding to the input In−). Based on a differential configuration, the base terminal of the second transistor48is connected to the collector of the first transistor43(corresponding in addition to input In+).

At last, the circuit1B includes a capacitor40having a value C which is connected between the emitter of the first bipolar transistor43and the emitter of the second bipolar transistor48. A linearization resistor Rlin50is also connected in parallel between the two emitter terminals of the first and second bipolar transistors.

On may take advantage of bipolar transistors for circuits43and44since such bipolar transistors provide a high value of transconductance.

Current sources44and49are bias current sources which respectively cooperate with bias resistors41and46.

In one particular embodiment, diodes42and47are carried out by using the emitter-collector junction of the bipolar transistors.

In one particular embodiment, these current sources44and49are carried out by using MOS type transistors. Alternatively, one can use bipolar type transistors.

It should be noticed that the circuit1B ofFIG. 4enters into oscillation if no voltage control is applied to the terminals of the collector of the first and second bipolar transistors43and48, respectively corresponding to inputs In− and In+.

On the other hand, when one applies a control voltage on the two inputs terminal In+ and In− which are respectively coupled to the collectors of transistors43and48, one can prevent the oscillation by default of the circuit. In that situation, it has been seen that one emulates the circuit1A which is illustrated inFIG. 1, and particularly adapted for high frequencies applications, such as beyond 2 Ghz. The linearization resistor50achieves the operation of the circuit for significant variations of the input voltages (of the order of 150 millivolts).

FIG. 5illustrates the charts which are representative of the impedance (modulus and phase) of the circuit1B illustrated inFIG. 4. It can be seen that the curve ofFIG. 2has been slightly changed with the use of the linearization resistor50being connected in parallel with the capacitor40and the diode connected transistors.

FIGS. 6 and 7illustrate the operating of the circuit1B ofFIG. 4, with respect to the classical positive capacitance (FIG. 6) and the classical inductor (FIG. 7).

As it can be seen inFIG. 6, the impedance curve shows a decrease with a slope of −20 dB per decade beyond the cutting frequency. Regarding now the gain characteristics, one sees on the other hand a phase advance of 90 degrees from the cutting frequency, what can be opposed to the phase delay of 90 degrees which is known for a purely (positive) capacitance circuit.

This gives evidence that a negative capacitor circuit has been actually achieved.

FIG. 7illustrates the characteristics charts for a standard inductor which is this is well known in the art, shows a phase advance from the cutting frequency. On the other hand, for the inductor, the impedance curve shows a decrease from the same cutting frequency, in contrary to the negative capacitance curve.

The circuit according to one embodiment of the present invention is likely to be usable in many applications, and is particularly suitable for high frequencies applications.

There is now described how to integrate, and this is a non-limiting example, an embodiment of the invention with a BAW type resonator in order to build a filtering circuit which is tunable. More specifically, one couples the negative capacitor circuit on the two terminals of a BAW resonator so as to modify the anti-resonance frequency of the same.

It will be more particularly described one embodiment including an integrated receiver which is well suited for the realization of a RF receiver usable for mobile telecommunication. Indeed, in mobile telecommunications and particularly in the more recent applications as Wide Code Division Multiplexing Access (WCDMA), one shows the need to perform a very effective filtering process. A new integrated acoustic component will be disclosed which should only be taken as an example for the embodiment of the invention.

An embodiment of the invention provides a very effective and integrated filtering circuit by means of the combination of the negative capacitor circuit with a BAW resonator, the electrical equivalent model of which being illustrated inFIGS. 8A,8B and8C showing the phase and impedance charts as well as the series and parallel resonance frequencies equations.

FIG. 9Aillustrates a first example application of a negative capacitor circuit1according to an embodiment of the present invention, wherein such circuit is coupled in parallel with a BAW type resonator4. For example in one embodiment, the In+ and In− terminals of the negative capacitor circuit1can be respectively coupled to the two terminals of the resonator, thereby providing a parallel configuration.

Such combination has an effect, in a very surprising and advantageous manner, on the anti-resonance frequency Fp which is moved away from the series frequency so as to take full advantage of that resonance frequency. In this manner, one even achieves to get rid of any additional inductor which is known to occupy a non-negligible surface on the semiconductor chip and which, furthermore, results in the appearance of parasitic anti-resonance frequencies in low frequencies and a decrease of the quality factor of the acoustic filter constituted by the BAW resonator.

FIGS. 9B and 9Cshow that, as a function of the absolute value of this negative capacitor, it becomes possible to move, either towards the right direction or towards the left direction, the anti-resonance frequency Fp while keeping unchanged the series frequency.

More particularly,FIG. 9Bshows that when the absolute value of Cneg is lower than the internal parameters C0+Cm of the BAW resonator, the anti-resonance frequency is being moved towards the right direction.

Conversely, the same anti-resonance frequency is moved towards the left, as illustrated inFIG. 9Cwhen the absolute value of Cneg is higher than C0+Cm.

FIG. 10Aillustrates a second example embodiment of a tunable resonator which uses the negative capacitor circuit according to an embodiment of the present invention. This second embodiment comprises, in series with the circuit ofFIG. 9A, a tunable capacitive component54, such as a varactor for instance, having an adjustable capacitance Cv.

There is thus provided a circuit5having multiple different tunable possibilities in accordance with the absolute value of Cneg.

FIG. 10B to 10Drespectively illustrate the characteristics charts of the second embodiment according to the value of the negative capacitance Cneg with respect to the values C0+Cm and C0+Cm+Cv.

When the absolute value of Cneg is lower than C0+Cm, one observes a shift to the right of the two series and parallel frequencies, as illustrated inFIG. 10B.

When the absolute value of Cneg is higher than C0+Cm+Cv, one then sees a shift to the left of both series resonance frequency Fs and parallel resonance frequency Fp, as illustrated inFIG. 10C.

At last, when the absolute value of Cneg is comprised within C0+Cm and C0+Cm+Cv, one notices that the series frequency is moved towards the right whereas the parallel frequency is shifted to the left, as illustrated inFIG. 10D.

It can thus be seen that, in accordance with the particular values given to the parameters Cneg and Cv, one may achieve a wide tuning of the resonance circuit.

In another embodiment illustrated inFIG. 11, by combining the cell5shown inFIG. 10Awith a loss compensation circuit based on a PMOS transistor51connected in series with a current source52as well as a resistor53, one may achieve a tunable Voltage Controlled Oscillator (V.C.O.) which can be adjusted by means of the control of the variable capacitance (Cv).

In one embodiment, the variable capacitance Cv—represented by element54in the Figure—may be based on a matrix of interconnected capacitors in order to achieve a wide range of tuning. The capacitor54can be then controlled by means of a binary word so as to cover the frequency band comprised between the nominal resonance frequency, e.g., for the maximal value of the variable frequency, and the parallel frequency determined by the resulting value of the difference between C0and Cneg.

As it can be seen inFIG. 11, the voltage controlled oscillator is based on a Pierce configuration biased by:the bias current source52;

the resistor53connecting the drain terminal of PMOS transistor54to the gate.

The size of the transistor is used for determining the level of the compensation of the loss required for maintaining the oscillation.