MEASUREMENT SYSTEM

A measurement system includes: n measurement paths that output measurement data of one or more measurement objects, where n is an integer of four or greater; m reference signal generation circuits that output reference signals to be referenced by the n measurement paths, each of the m reference signal generation circuits outputting the reference signal to two or more measurement paths among the n measurement paths, where m is an integer of two or greater; k path anomaly detection circuits that detect/confirm presence or absence of anomalies by comparing the measurement data output from two measurement paths among the n measurement paths, where k is an integer of two or greater; and a processing circuit that receives the measurement data output from the n measurement paths and outputs from the k path anomaly detection circuits as its inputs.

CROSS REFERENCE TO RELATED APPLICATIONS

This is a continuation application of PCT International Application No. PCT/JP2023/014266 filed on Apr. 6, 2023, designating the United States of America, which is based on and claims priority of Japanese Patent Application No. 2022-074512 filed on Apr. 28, 2022. The entire disclosures of the above-identified applications, including the specifications, drawings, and claims are incorporated herein by reference in their entirety.

FIELD

The present disclosure relates to a measurement system.

BACKGROUND

In a typical fault diagnosis of measurement circuits, two measurement paths are provided for a single measurement object, and their outputs are compared. If the measurement results show a difference exceeding an allowable error, it is diagnosed that a fault has occurred in the measurement circuit. For example, the voltage detection device disclosed in Patent Literature (PTL) 1 includes two voltage detection units that selectively detect the voltage of each battery cell of a battery pack, and has a first mode for measuring voltages of different battery cells and a second mode for measuring the cell voltage of the same battery cell. In the second mode, if there is a difference in the measurement results, the device detects that some kind of fault has occurred in either of the voltage detection units.

CITATION LIST

Patent Literature

SUMMARY

Technical Problem

However, the technique disclosed in PTL 1 has a problem in that when a failure occurs in, for example, a power supply that is commonly used by the two measurement paths, measurement data of the measurement object cannot be obtained.

In view of this, the present disclosure provides a measurement system that can obtain measurement data of the measurement object more reliably than conventional systems.

Solution to Problem

A measurement system according to one aspect of the present disclosure includes: n measurement paths that output measurement data of one or more measurement objects, n being an integer of four or greater; m reference signal generation circuits that output reference signals to be referenced by the n measurement paths, each of the m reference signal generation circuits outputting a reference signal among the reference signals to two or more measurement paths among the n measurement paths, m being an integer of two or greater; k path anomaly detection circuits each of which detects/confirms presence or absence of an anomaly by comparing the measurement data output from two measurement paths among the n measurement paths, k being an integer of two or greater; and a processing circuit that receives the measurement data output from the n measurement paths and detection results output from the k path anomaly detection circuits as its inputs.

Advantageous Effects

A measurement system according to one aspect of the present disclosure can obtain measurement data of the measurement object more reliably than conventional systems.

DESCRIPTION OF EMBODIMENTS

Knowledge Leading to Present Disclosure

Prior to explaining the present disclosure, the knowledge that leads to the present disclosure will be described with reference toFIG.9AthroughFIG.9C.

First, the problem described above will be explained with reference toFIG.9A.FIG.9Ais a block diagram illustrating a first example of a circuit configuration of a measurement system according to a comparative example.FIG.9Aillustrates measurement paths11and12that use resistor10to detect/measure a supply current for a circuit that supplies power from battery1to load circuit2, and transmit the measurement data to processing circuit5A.

As illustrated inFIG.9A, the measurement system according to the first example includes measurement paths11and12, detection circuit14, bandgap reference (hereinafter abbreviated as BGR) circuit41, and processing circuit5A. Measurement path11includes amplifier110and analog-to-digital converter (hereinafter abbreviated as ADC)111, and measurement path12includes amplifier120and ADC121.

In measurement path11, the voltage across both ends of resistor10is amplified by amplifier110, and the output of amplifier110is converted to digital data and output by ADC111. In measurement path12, the voltage across both ends of resistor10is amplified by amplifier120, and the output of amplifier120is converted to digital data and output by ADC121.

The outputs of measurement paths11and12are compared in detection circuit14, and if the difference is within a predetermined value, it is confirmed that neither of measurement paths11and12is anomalous, and “L” is output from detection circuit14to processing circuit5A. However, if the difference exceeds the predetermined value, it is detected that either measurement path11or12is anomalous, and “H” is output from detection circuit14to processing circuit5A. Therefore, if either of measurement paths11and12fails, detection circuit14detects there is a failure, and processing circuit5A can issue a warning indicating that the input measurement data is unreliable. Note that “L” indicates a low level signal (for example, 0V) and “H” indicates a high level signal (for example, 5V), but the present disclosure is not limited to this example.

The reference voltage necessary for level determination of the measurement data in each of ADC111and121is generated by BGR circuit41. If BGR circuit41fails, the outputs of each of measurement path11and12will also be anomalous values, but there will be no difference between them, and detection circuit14cannot detect there is a failure. Note that the reference voltage is one example of a reference signal.

To overcome this problem, two reference signals of, for example, the power supplies used on measurement paths11and12should be used, and a detection circuit for comparing the two reference signals should be provided. A measurement system which overcomes this problem will be described with reference toFIG.9B.FIG.9Bis a block diagram illustrating a second example of a circuit configuration of a measurement system according to a comparative example.

As illustrated inFIG.9B, the measurement system according to the second example includes a configuration in which BGR circuit42, which generates the same reference voltage as BGR circuit41, and detection circuit44, which compares the reference voltages output by BGR circuits41and42and outputs the presence or absence of an anomaly, are added to the measurement system illustrated inFIG.9A. Compared to processing circuit5A, processing circuit5B further receives the output from detection circuit44as its input. Processing circuit5B includes, in addition to the functions of processing circuit5A, processing functionality corresponding to the output from detection circuit44.

Accordingly, if either of measurement paths11and12fails, detection circuit14detects there is a failure, and if either of BGR circuits41and42fails, detection circuit44detects there is a failure, and processing circuit5B can issue a warning indicating that the input measurement data is unreliable.

However, in this configuration, if the reference signal that is commonly referenced by each of measurement path11and12is anomalous, all of the plurality of measurement paths11and12provided will be rendered inoperable. Stated differently, in the measurement system illustrated inFIG.9B, if the reference signal is anomalous, measurement cannot be continued.

Note that in the above description and in the figures, it is indicated that the reference voltages to the ADCs are directly compared in detection circuit44. However, since detection circuit44only needs to detect differences between BGR circuits41and42, the configuration is not limited to this example. For example, each of BGR circuits41and42may output a signal corresponding to the reference voltage internally generated and output to detection circuit44, and detection circuit44may detect/confirm the presence or absence of an anomaly by comparing these corresponding signals. This applies similarly to subsequent embodiments and drawings.

FIG.9Cis a block diagram illustrating a third example of a circuit configuration of a measurement system according to a comparative example.

As illustrated inFIG.9C, the measurement system according to the third example includes a configuration in which BGR circuit42is added to the measurement system illustrated inFIG.9A, and is configured such that the reference voltage of BGR circuit41is referenced by ADC111, and the reference voltage of BGR circuit42is referenced by ADC121. Stated differently, this is a solution that eliminates the reference signal commonly used in each measurement path11and12by including BGR circuit41in measurement path11and including BGR circuit42in measurement path12. Note that processing circuit5C includes the same functions as processing circuit5A. Note that “referenced” means, for example, being used when processing (for example, AD conversion processing) is performed in a processing unit (for example, ADC111).

However, this method has the problem of increasing circuit size when there is a plurality of or a plurality of types of measurement objects, measurement paths, or reference signals.

Here, measurement paths11and12may have the same measurement purpose or may have different measurement purposes. For example, when measurement paths11and12have the same measurement purpose, measurement accuracy can be improved by taking the average of both in processing circuits5A to5C. However, when the measurement purposes are different, for example, measurement path11is used to calculate and store the power consumption of load circuit2from the supply current, and measurement path12is used for overcurrent detection to protect battery1from anomalies in load circuit2. Measurement paths11and12detect/measure the supply current to the same load circuit2, but since their measurement purposes are different, the required accuracy, processing speed, and other factors may differ. The measurement purposes are not limited to current measurement, overcurrent detection, etc., and in the following explanation, they may be generally referred to as measurement purpose A, measurement purpose B, and so on.

In the measurement system illustrated inFIG.9A, when BGR circuit41fails, and in the measurement system illustrated inFIG.9B, when BGR circuit41or42fails, measurement data of the measurement object cannot be obtained. In view of this, the inventors diligently researched a measurement system that can continuously obtain measurement data of the measurement object even when a failure occurs in a BGR circuit or the like, and devised the measurement system described below.

Hereinafter, a measurement system according to embodiments will be described in detail with reference to the drawings. The embodiments described below each illustrate one specific example of the present disclosure. The numerical values, shapes, materials, elements, the arrangement and connection of the elements, etc., shown in the following embodiments are mere examples, and therefore do not limit the scope of the present disclosure. Accordingly, among the elements in the following embodiments, those not recited in any of the independent claims defining the broadest concept are described as optional elements.

The figures are not necessarily precise illustrations. In the figures, elements that are essentially the same share the same reference signs, and repeated description may be omitted or simplified in some cases.

In the present specification, terms indicating relationships between elements such as “same”, numerical values, and numerical ranges refer not only to their strict meanings, but encompass a range of essentially equivalents, such as a range of deviations of a small percent (or approximately 10%).

The term “connection” with respect to elements means electrical connection, and includes not only cases where two elements are directly connected, but also cases where two elements are indirectly connected with other elements interposed between the two elements.

First, a first example of the measurement system according to the present embodiment will be described with reference toFIG.1A.FIG.1Ais a block diagram illustrating a first example of a circuit configuration of a measurement system according to the present embodiment.FIG.1Aillustrates measurement paths11A,12A,11B and12B that detect/measure a supply current from battery1to load circuit2using resistor10and transmit the supply current to processing circuit5D. Resistor10is one example of a first measurement object, and includes a function of converting current supplied to load circuit2into voltage.

As illustrated inFIG.1A, the measurement system according to the first example of present embodiment includes measurement paths11A,12A,11B, and12B, BGR circuits41and42, detection circuits14A,14B, and44, and processing circuit5D. In the following, the plurality of measurement paths including measurement paths11A,12A,11B, and12B may also be referred to simply as “measurement paths11A, etc.”, and the plurality of ADCs including ADCs111A,121A,111B, and121B may be referred to simply as “ADCs111A, etc.”.

The measurement system can also be said to include four measurement paths11, etc., (one example of n measurement paths), two BGR circuits41and42(one example of m reference signal generation circuits), detection circuits14A and14B (one example of k path anomaly detection circuits), and processing circuit5D. The number of measurement paths included in the measurement system is not particularly limited as long as it is 4 or more (n is an integer of 4 or greater), the number of BGR circuits is not particularly limited as long as it is 2 or more (m is an integer of 2 or greater), and the number of detection circuits is not particularly limited as long as it is 2 or more (k is an integer of 2 or greater).

Measurement paths11A and12A are used for measurement purpose A, and measurement paths11B and12B are used for measurement purpose B, but the relationship between measurement paths and measurement purposes is not limited to this.

Each of measurement paths11A, etc., detects/measures current using resistor10, and transmits the measurement data to processing circuit5D.

Measurement path11A includes amplifier110A and ADC111A. In measurement path11A, the voltage across both ends of resistor10is amplified by amplifier110A, and the output of amplifier110A is converted to digital data and output to processing circuit5D by ADC111A. Measurement path11A is one example of a first measurement path.

Measurement path12A includes amplifier120A and ADC121A. In measurement path12, the voltage across both ends of resistor10is amplified by amplifier120A, and the output of amplifier120A is converted to digital data and output to processing circuit5D by ADC121A. Measurement path12A is one example of a second measurement path.

Measurement path11B includes amplifier110B and ADC111B. In measurement path11B, the voltage across both ends of resistor10is amplified by amplifier110B, and the output of amplifier110B is converted to digital data and output to processing circuit5D by ADC111B. Measurement path11B is one example of a third measurement path.

Measurement path12B includes amplifier120B and ADC121B. In measurement path12B, the voltage across both ends of resistor10is amplified by amplifier120B, and the output of amplifier120B is converted to digital data and output to processing circuit5D by ADC121B. Measurement path12B is one example of a fourth measurement path.

ADC111A, etc., may be, for example, a delta-sigma type ADC, a successive approximation register (SAR) type ADC, or an ADC of another type.

Each of ADC111A, etc., for example, converts the input voltage to digital data with the same number of bits, but is not limited to this. ADCs111A, etc., may use the same time or mutually different times to perform AD conversion. Generally, ADCs obtain more accurate values when the AD conversion time is longer, so the time for performing AD conversion is appropriately determined according to the measurement purpose of the measurement path.

Detection circuit14A is connected between (i) measurement paths11A and12A and (ii) processing circuit5D, and detects whether or not there are anomalies in measurement paths11A and12A based on the output (digital value of measurement data) of measurement path11A and the output of measurement path12A. For example, detection circuit14A compares the measurement data output from measurement paths11A and12A and detects whether or not there are anomalies in measurement paths11A and12A. Detection circuit14A is one example of a path anomaly detection circuit (first path anomaly detection circuit).

Detection circuit14B is connected between (i) measurement paths11B and12B and (ii) processing circuit5D, and detects whether or not there are anomalies in measurement paths11B and12B based on the output (digital value of measurement data) of measurement path11B and the output of measurement path12B. For example, detection circuit14B compares the measurement data output from measurement paths11B and12B and detects whether or not there are anomalies in measurement paths11B and12B. Detection circuit14B is one example of a path anomaly detection circuit (second path anomaly detection circuit).

Detection circuits14A and14B confirm that there are no anomalies if the difference in measurement data is within a predetermined value, and detect that there are anomalies if the difference in measurement data is greater than the predetermined value, and output the detection result (“H” or “L” described above) to processing circuit5D. Assuming that the measurement data is 10-bit data, detection circuits14A and14B may judge whether the difference in measurement data is within a predetermined value by, for example, checking whether a predetermined number of upper bits (for example, the upper 8 bits) match, or by checking whether the difference in the numerical values represented by the 10 bits is within a predetermined value.

When the AD conversion times in ADCs111A and121A are different, detection circuit14A may compare (i) calculated data obtained by performing a calculation with a set of several digital data output from the ADC with the shorter AD conversion time and (ii) one digital data output from the ADC with the longer AD conversion time. The calculated data is the average value of the set of several digital data, but may also be the median value, the mode, or the like. The same applies to detection circuit14B.

BGR circuit41is connected to ADCs111A and121A and detection circuit44, and outputs the respective reference signals used in measurement paths11A and12A. BGR circuit41is one example of a first reference signal generation circuit.

BGR circuit42is connected to ADCs111B and121B and detection circuit44, and outputs the respective reference signals used in measurement paths11B and12B. BGR circuit42is one example of a second reference signal generation circuit.

In this way, the reference voltages necessary for level detection of measurement data in ADCs111A, etc., are generated by BGR circuits41and42, where the reference voltage output by BGR circuit41is referenced by ADCs111A and121A, and the reference voltage output by BGR circuit42is referenced by ADCs111B and121B. Note that the reference voltage supplied by BGR circuit42and the reference voltage supplied by BGR circuit41are the same voltage.

Detection circuit44is connected between (i) BGR circuits41and42and (ii) processing circuit5D, and detects whether or not there is a failure in either BGR circuit41or BGR circuit42based on the output (reference signal) of BGR circuit41and the output (reference signal) of BGR circuit42. Detection circuit44confirms that there is no anomaly if the difference in reference voltage is within a predetermined value, and detects that there is an anomaly if the difference in measurement data is greater than the predetermined value, and outputs the detection result (“H” or “L” described above) to processing circuit5D. Detection circuit44is one example of a circuit anomaly detection unit (circuit anomaly detection circuit).

In the measurement system according to the first example of the present embodiment, the outputs of measurement paths11A and12A are compared in detection circuit14A, and if the difference is within a predetermined value, it is confirmed that neither of measurement paths11A and12A is anomalous, and “L” is output from detection circuit14A to processing circuit5D. However, if the difference exceeds the predetermined value, it is detected that either measurement path11A or12A is anomalous, and “H” is output from detection circuit14A to processing circuit5D. Similarly, the outputs of measurement paths11B and12B are compared in detection circuit14B, and the presence or absence of an anomaly is output from detection circuit14B to processing circuit5D. Furthermore, the reference voltages output by BGR circuits41and42are compared in detection circuit44, and the presence or absence of an anomaly is output from detection circuit44to processing circuit5D.

With the configuration described above, detection circuit14A can detect there is a failure if there is an anomaly in measurement path11A or12A, detection circuit14B can detect there is a failure if there is an anomaly in measurement path11B or12B, and detection circuit44can detect there is a failure if there is an anomaly in BGR circuit41or42. Processing circuit5D issues a warning indicating that the current measurement data from measurement paths11A and12A is unreliable when detection circuit14A detects there is a failure, and similarly issues a warning indicating that the overcurrent detection data from measurement paths11B and12B is unreliable when detection circuit14B detects there is a failure. When detection circuit44detects there is a failure, even if other detection circuits14A and14B have not detects there is a failure, processing circuit5D can issue a warning that the reference voltage supplied to each circuit or measurement system is anomalous, and take measures such as stopping the operation of load circuit2.

In the measurement system, even when detection circuit14A detects there is a failure, measurement of measurement data can be continued using measurement paths11B and12B, and even when detection circuit14B detects there is a failure, measurement of measurement data can be continued using measurement paths11A and12A.

Next, a second example of the measurement system according to the present embodiment will be described with reference toFIG.1B.FIG.1Bis a block diagram illustrating a second example of a circuit configuration of a measurement system according to the present embodiment.

The measurement system illustrated inFIG.1Bis equivalent to the measurement system illustrated inFIG.1Awith a simplified detection circuit44. The measurement system illustrated inFIG.1Bdiffers from the measurement system illustrated inFIG.1Ain that the reference voltage output by BGR circuit41is referenced by ADC111A of measurement path11A and ADC111B of measurement path11B, and the reference voltage output by BGR circuit42is referenced by ADC121A of measurement path12A and ADC121B of measurement path12B. This allows detection circuit44A to be simplified. Detection circuit44A can be implemented, for example, using an AND circuit. Detection circuit44A receives the output from detection circuit14A and the output from detection circuit14B as its inputs.

Detection circuit44A is connected to detection circuits14A and14B and processing circuit5D, and detects whether either BGR circuit41or42is anomalous based on the output (“H” or “L”) of detection circuit14A and the output (“H” or “L”) of detection circuit14B. Detection circuit44A outputs “H” to processing circuit5D indicating that either BGR circuit41or42is anomalous when the outputs of both detection circuits14A and14B are “H”, and outputs “L” to processing circuit5D when at least one of the outputs of detection circuits14A and14B is “L”. Detection circuit44A is one example of a circuit anomaly detection unit.

In the configuration ofFIG.1Bas described above, in two measurement paths having the same measurement purpose, reference voltages from different BGR circuits are referenced. For example, measurement paths11A and12A are measurement paths having the same measurement purpose, but measurement path11A references a reference voltage from BGR circuit41, and measurement path12A references a reference voltage from BGR circuit42. When an anomaly occurs in a BGR circuit, different reference voltages are referenced in the measurement paths, causing a difference in the output measurement data. As a result, both detection circuits14A and14B detect there is a failure and output “H” to each of detection circuit44A and processing circuit5D. Detection circuit44A therefore outputs “H” to processing circuit5D. Assuming that failures do not occur simultaneously in two locations, detection circuits14A and14B simultaneously detects there is a failure only when an anomaly occurs in one of BGR circuit41or42. Stated differently, detection circuit44A has a simpler configuration than detection circuit44illustrated inFIG.1A, while having the same operation (function) as detection circuit44.

Note that in order to achieve the advantageous effect of a simplified detection circuit44, which ADC111A, etc., references the reference voltage of which BGR circuit41and42is not limited to the connections illustrated inFIG.1B. ADCs of different measurement paths handling measurement data for the same measurement purpose may be connected so as to reference reference voltages from different BGR circuits.

Next, a third example of the measurement system according to the present embodiment will be described with reference toFIG.1C.FIG.1Cis a block diagram illustrating a third example of a circuit configuration of a measurement system according to the present embodiment.FIG.1Cillustrates another connection of ADC and BGR circuits, and is one example of a circuit configuration of a measurement system that includes, in integrated circuit100, everything from measurement paths11A, etc., (excluding resistor10) to processing circuit5D.

In the embodiment illustrated inFIG.1C, there are four measurement paths, so terminal pair101and terminal pair102to which the voltage across both ends of resistor10, which is the measurement object, is applied are provided. Measurement paths11A and11B are connected to terminal pair101, and measurement paths12A and12B are connected to terminal pair102. Stated differently, the measurement system illustrated inFIG.1Cincludes terminal pair101(one example of a first terminal pair) connected to measurement paths11A and11B, and terminal pair102(one example of a second terminal pair) connected to measurement paths12A and12B. This connection configuration assumes that separate measurement objects may be connected to each of the two terminal pairs101and102, and is to accommodate both measurement purposes A and B for each of terminal pairs101and102.

InFIG.1C, the reference voltage output by BGR circuit41is referenced by ADC111A of measurement path11A and ADC121B of measurement path12B, and the reference voltage output by BGR circuit42is referenced by ADC111B of measurement path11B and ADC121A of measurement path12A. The outputs of measurement paths11A and11B are compared in detection circuit15, and if the difference is within a predetermined value, it is confirmed that neither of measurement paths11A and11B is anomalous, and “L” is output from detection circuit15to processing circuit5D. However, if the difference exceeds the predetermined value, it is detected that either measurement path11A or11B is anomalous, and “H” is output from detection circuit15to processing circuit5D. Similarly, the outputs of measurement paths12A and12B are compared in detection circuit16, and the presence or absence of an anomaly is output from detection circuit16to processing circuit5D. Detection circuit45receives the output from detection circuit15and the output from detection circuit16as its inputs.

With this above configuration, since ADCs of two measurement paths for the same measurement purpose are connected so as to reference reference voltages from different BGR circuits, in addition to the advantageous effect of a simplified detection circuit45similar toFIG.1B, it is possible to achieve a configuration including an integrated circuit having two sets of terminal pairs with two measurement purposes.

The measurement data output from measurement paths11A and12A may be used for measurement purpose A, and the measurement data output from measurement paths11B and12B may be used for measurement purpose B. Terminal pairs101and102may each be connected to different measurement objects. Stated differently, measurement paths11A and11B may measure a different measurement object than measurement paths12A and12B. In such cases, measurement paths11A and11B and measurement paths12A and12B are used for different measurement purposes, and reference signals are supplied from mutually different BGR circuits (BGR circuit41or42) to measurement paths having the same measurement purpose (for example, to measurement paths11A and12A, and to measurement paths11B and12B).

While Embodiment 1 described a measurement system for obtaining measurement data of one measurement object, the number of measurement objects to be measured may be two or more. Hereinafter, a measurement system capable of obtaining measurement data of two measurement objects will be described with reference toFIG.2AthroughFIG.2C.FIG.2Ais a block diagram illustrating a first example of a circuit configuration of a measurement system according to the present embodiment. The present embodiment includes resistors10and20as one or more measurement objects. Note that measurement paths11and12illustrated inFIG.2Amay have the same configuration as measurement paths11A and12A illustrated inFIG.1A, and measurement paths21and22may have the same configuration as measurement paths11B and12B illustrated inFIG.1A. Detection circuits14and24may have the same configuration as detection circuits14A and14B illustrated inFIG.1A. Accordingly, detailed explanations of measurement paths11, etc., and detection circuits14and24will be omitted.

FIG.2Aillustrates paths that supply power from battery1to two load circuits2and3, and paths that each detect/measure supply current and transmit the measurement data to processing circuit5.

Resistor10is connected so as to measure current supplied to load circuit2, and the voltage across both ends of resistor10is transmitted to measurement paths11and12.

In measurement path11, the voltage across both ends of resistor10is amplified by amplifier110, and the output of amplifier110is converted to digital data and output by ADC111. In measurement path12, the voltage across both ends of resistor10is amplified by amplifier120, and the output of amplifier120is converted to digital data and output by ADC121.

Resistor20is one example of a second measurement object, and converts current supplied to load circuit3into voltage, and the voltage across both ends of resistor20is transmitted to measurement paths21and22. In measurement path21, the voltage across both ends of resistor20is amplified by amplifier210, and the output of amplifier210is converted to digital data and output by ADC211. In measurement path22, the voltage across both ends of resistor20is amplified by amplifier220, and the output of amplifier220is converted to digital data and output by ADC221.

Here, measurement paths11and12may be for the same type of measurement or may be for different types of measurement. When measurement paths11and12pertain to the same type of measurement, measurement accuracy can be improved by taking the average of both in processing circuit5. However, for heterogeneous measurements, measurement path11can be used to calculate and store the power consumption of load circuit2from the supply current, and measurement path12can be used for overcurrent detection to protect battery1from anomalies in load circuit2. Measurement paths11and12detect/measure the supply current to the same load circuit2, but since their usage purposes are different, the required accuracy, processing speed, and other factors differ. This applies similarly to measurement paths21and22, and to subsequent embodiments and drawings. Note that the same type of measurement means that the measurement purpose is the same, and different types of measurement means that the measurement purposes are different.

The reference voltages necessary for level determination of measurement data in ADCs111, etc., are generated by BGR circuits41and42, where the reference voltage output by BGR circuit41is referenced by ADCs111and121, and the reference voltage output by BGR circuit42is referenced by ADCs211and221. BGR circuits41and42output reference signals used in measurement paths for different measurement objects.

The outputs of measurement paths11and12are compared in detection circuit14, and if the difference is within a predetermined value, it is confirmed that neither of measurement paths11and12is anomalous, and “L” is output from detection circuit14to processing circuit5. However, if the difference exceeds the predetermined value, it is detected that either or both of measurement paths11and12are anomalous, and “H” is output from detection circuit14to processing circuit5. Similarly, the outputs of measurement paths21and22are compared in detection circuit24, and the presence or absence of an anomaly is output from detection circuit24to processing circuit5. Furthermore, the reference voltages output by BGR circuits41and42are compared in detection circuit44, and the presence or absence of an anomaly is output from detection circuit44to processing circuit5.

With the configuration described above, detection circuit14can detect there is a failure if there is an anomaly in measurement path11or12, and detection circuit24can detect there is a failure if there is an anomaly in measurement path21or22. Additionally, while detection circuits14and24cannot detect anomalies in BGR circuit41or42if there is an anomaly in BGR circuit41or42, detection circuit44can detect there is a failure.

When detection circuit14detects there is a failure, processing circuit5can issue a warning that the supply current to load circuit2cannot be correctly detected/measured, and can take measures such as stopping the operation of load circuit2. Similarly, when detection circuit24detects there is a failure, processing circuit5can issue a warning that the supply current to load circuit3cannot be correctly detected/measured, and can take measures such as stopping the operation of load circuit3. When detection circuit44detects there is a failure, even if other detection circuits14and24have not detected there is a failure, processing circuit5can issue a warning that the reference voltage supplied to each circuit or measurement system is anomalous, and take measures such as stopping the operation of all load circuits.

Next, a second example of the measurement system according to the present embodiment will be described with reference toFIG.2B.FIG.2Bis a block diagram illustrating a second example of a circuit configuration of a measurement system according to the present embodiment.

The measurement system illustrated inFIG.2Bis equivalent to the measurement system illustrated inFIG.2Awith simplified detection circuit44. The measurement system illustrated inFIG.2Bdiffers from the measurement system illustrated inFIG.2Ain that the reference voltage output by BGR circuit41is referenced by ADC111of measurement path11and ADC211of measurement path21, and the reference voltage output by BGR circuit42is referenced by ADC121of measurement path12and ADC221of measurement path22. Detection circuit44A, which is an AND circuit similar to the measurement system illustrated inFIG.1B, receives the output from detection circuit14and the output from detection circuit24as its inputs.

BGR circuit41supplies reference voltage to ADCs111and211. BGR circuit41supplies a common reference voltage to measurement paths11and21, which have different measurement objects but the same measurement purpose. BGR circuit42supplies reference voltage to ADCs121and221. BGR circuit42supplies a common reference voltage to measurement paths12and22, which have different measurement objects but the same measurement purpose.

In the configuration ofFIG.2Bas described above, in two measurement paths measuring the same measurement object, reference voltages from different BGR circuits are referenced. For example, measurement paths11and12are measurement paths for measuring the same measurement object, but measurement path11references a reference voltage from BGR circuit41, and measurement path12references a reference voltage from BGR circuit42. When an anomaly occurs in a BGR circuit, different reference voltages are referenced in the measurement paths, causing a difference in the output measurement data. As a result, both detection circuits14and24detect there is a failure and output “H” to detection circuit44A and processing circuit5. Detection circuit44A therefore outputs “H” to processing circuit5. Assuming that failures do not occur simultaneously in two locations, detection circuits14and24simultaneously detect there is a failure only when an anomaly occurs in one of BGR circuit41or42. Stated differently, detection circuit44A has a simpler configuration than detection circuit44illustrated inFIG.2A, while being able to perform the same operation as detection circuit44.

Note that with respect to the advantageous effect of a simplified detection circuit44A, which ADC111, etc., references the reference voltage of which BGR circuit41and42is not limited to the connections illustrated inFIG.2B. ADCs of different measurement paths handling measurement data for the same measurement object may be connected so as to reference reference voltages from different BGR circuits.

Next, a third example of the measurement system according to the present embodiment will be described with reference toFIG.2C.FIG.2Cis a block diagram illustrating a third example of a circuit configuration of a measurement system according to the present embodiment.FIG.2Cillustrates another example of the connection of ADCs and BGR circuits.

The measurement system illustrated inFIG.2Cdiffers from the measurement system illustrated inFIG.2Bin that the reference voltage output by BGR circuit41is referenced by ADC111of measurement path11and ADC221of measurement path22, and the reference voltage output by BGR circuit42is referenced by ADC121of measurement path12and ADC211of measurement path21.

BGR circuit41supplies reference voltage to ADCs111and221. BGR circuit41supplies a common reference voltage to measurement paths11and22, which have different measurement objects and different measurement purposes. BGR circuit42supplies reference voltage to ADCs121and211. BGR circuit42supplies a common reference voltage to measurement paths12and21, which have different measurement objects and different measurement purposes.

InFIG.2Cas well, since ADCs of two measurement paths for the same measurement object are connected so as to reference reference voltages from different BGR circuits, simplification of detection circuit44A can be achieved similar toFIG.2B. Furthermore, the configuration illustrated inFIG.2Ccorresponds to the configuration ofFIG.1Cin which ADCs of two measurement paths for the same measurement purpose are connected so as to reference reference voltages from different BGR circuits.

Digital data output from an ADC in a measurement path is often subjected to processing such as calculation processing in a post-signal-processing circuit and latch processing to registers accessible from outside. In such cases, a sequencer circuit may be used in the measurement system to adjust various timings such as AD conversion output timing and various processing timings. The sequencer circuit generates various trigger signals in accordance with counter values of a counter synchronized with an internal system clock. The ADC, post-signal-processing circuit, etc., perform appropriate output, processing, and other operations by referencing these various trigger signals. Note that the post-signal-processing circuit is a processing circuit different from processing circuit5that is connected between the ADC and the processing circuit (for example, processing circuit5illustrated inFIG.3). The various trigger signals are one example of a reference signal. Hereinafter, the post-signal-processing circuit may also be referred to as a post-signal-processing unit.

FIG.3is a block diagram illustrating a circuit configuration of a measurement system according to the present embodiment. The measurement system illustrated inFIG.3differs from the measurement system illustrated inFIG.2Cin that sequencer circuits51and52are provided to generate various trigger signals (hereinafter also referred to as reference signals) necessary for each ADC111, etc., and each post-signal-processing unit112, etc. Note that inFIG.3, illustration of battery1and load circuits2and3is omitted for convenience.

Measurement path11includes amplifier110, ADC111, and post-signal-processing unit112. Post-signal-processing unit112is connected between ADC111and processing circuit5. In measurement path11, the voltage across both ends of resistor10is amplified by amplifier110, and the output of amplifier110is converted to digital data and output by ADC111, and the output of ADC111is subjected to predetermined processing by post-signal-processing unit112and output to processing circuit5.

Measurement path12includes amplifier120, ADC121, and post-signal-processing unit122. Post-signal-processing unit122is connected between ADC121and processing circuit5. In measurement path12, the voltage across both ends of resistor10is amplified by amplifier120, and the output of amplifier120is converted to digital data and output by ADC121, and the output of ADC121is subjected to predetermined processing by post-signal-processing unit122and output to processing circuit5.

Measurement path21includes amplifier210, ADC211, and post-signal-processing unit212. Post-signal-processing unit212is connected between ADC211and processing circuit5. In measurement path21, the voltage across both ends of resistor20is amplified by amplifier210, and the output of amplifier210is converted to digital data and output by ADC211, and the output of ADC211is subjected to predetermined processing by post-signal-processing unit212and output to processing circuit5.

Measurement path22includes amplifier220, ADC221, and post-signal-processing unit222. Post-signal-processing unit222is connected between ADC221and processing circuit5. In measurement path22, the voltage across both ends of resistor20is amplified by amplifier220, and the output of amplifier220is converted to digital data and output by ADC221, and the output of ADC221is subjected to predetermined processing by post-signal-processing unit222and output to processing circuit5.

Note that the predetermined processing in post-signal-processing unit112, etc., may be the same processing or may be mutually different processing.

The reference signal output by sequencer circuit51is referenced by at least one of (i) ADCs111and221or (ii) post-signal-processing units112and222, and in the example ofFIG.3, it is referenced by both. The reference signal output by sequencer circuit51is a reference signal different from the reference signal output by BGR circuit41.

The reference signal output by sequencer circuit52is referenced by at least one of (i) ADCs121and211or (ii) post-signal-processing units122and212, and in the example ofFIG.3, it is referenced by both. The reference signal output by sequencer circuit52is a reference signal different from the reference signal output by BGR circuit42.

Note that although omitted in the present embodiment, the measurement system may include a detection circuit for sequencer circuits51and52corresponding to the detection circuit for BGR circuits41and42. The detection circuit for sequencer circuits51and52should confirm at least one of: directly, that the timings of the various trigger signals match; or indirectly, that the counter values of counters inside sequencer circuits51and52match.

Sequencer circuits51and52are one example of m reference signal generation circuits. In the present embodiment, sequencer circuit51is one example of a third reference signal generation circuit, and sequencer circuit52is one example of a fourth reference signal generation circuit.

In the configuration inFIG.3described above, in two measurement paths measuring the same measurement object, reference voltages from different BGR circuits41and42are referenced, and reference signals (for example, trigger signals) from different sequencer circuits51and52are also referenced. For example, measurement paths11and12are measurement paths for measuring the same measurement object. Measurement path11references reference signals from BGR circuit41and sequencer circuit51, and measurement path12references reference signals from BGR circuit42and sequencer circuit52.

When an anomaly occurs in BGR circuits41and42or sequencer circuits51and52, different reference voltages or reference signals are referenced in the measurement paths, causing a difference in the output measurement data. As a result, both detection circuits14and24detect there is a failure and output “H” to detection circuit44A. Detection circuit44A therefore outputs “H” to processing circuit5. Assuming that failures do not occur simultaneously in two locations, detection circuits14and24simultaneously detect there is a failure only when an anomaly occurs in BGR circuits41and42or sequencer circuits51and52. Stated differently, detection circuit44A is connected between (i) detection circuits14and24and (ii) processing circuit5, and functions as a detection circuit that detects anomalies in BGR circuits41and42or sequencer circuits51and52based on the output of detection circuit14and the output of detection circuit24.

FIG.4is a block diagram illustrating a circuit configuration of a generalized measurement system according to the present embodiment. Note that to keep the drawing simple, detection circuits14,24, and44A are incorporated into processing circuit5E, and their illustration is omitted.

When one or more reference signals are used in the two measurement paths11and12for measuring/processing resistor10and the two measurement paths21and22for measuring/processing resistor20, two reference signal generation circuits (41and42,51and52, . . . , n1and n2) that generate the same or similar reference signals are provided. By having each measurement path reference a reference signal from a different reference signal generation circuit, it becomes possible to detect failures in the reference signal generation circuits based on the outputs of the detection circuits of each measurement path.

In subsequent embodiments and drawings, as illustrated inFIG.4, the measurement object is generalized and represented as a block. The reference signal generation circuits (for example, BGR circuits, sequencer circuits) and their outputs are collectively represented as single block referred to as “BGR circuit”, which is one example of a reference signal generation circuit, with an output referred to as “reference signal”.

While Embodiment 2 described above pertained to a measurement system that performs failure detection by providing two reference signal generation circuits (for example, BGR circuits41and42) and two measurement paths respectively connected to the measurement objects, the system may include three reference signal generation circuits and three measurement paths respectively connected to the measurement objects. This makes it possible to realize a measurement system capable of identifying locations of failures including the reference signal generation circuit.

FIG.5Ais a block diagram illustrating a circuit configuration of a measurement system according to the present embodiment.

As illustrated inFIG.5A, the measurement system according to present embodiment includes measurement paths11,12, and13for measuring/processing resistor10, measurement paths21,22, and23for measuring/processing resistor20, BGR circuits41,42, and43, detection circuits14,15,24,25,45, and46, and processing circuit6. The reference signals necessary for measurement/processing in each of measurement paths11, etc., are generated by BGR circuits41and42, where the reference signal output by BGR circuit41is referenced by measurement paths11,12, and13, and the reference signal output by BGR circuit42is referenced by measurement paths21,22, and23. The reference signal output by BGR circuit43is not referenced by any measurement path, including measurement path11, etc. BGR circuit43is configured to be capable of outputting the reference signal output from BGR circuit41and the reference signal output from BGR circuit42, and outputs a reference signal used for detecting failure of BGR circuits41and42. In the present embodiment, BGR circuit43is one example of a fifth reference signal generation circuit.

Measurement path13is one example of a fifth measurement path, and measurement path23is one example of a sixth measurement path. Detection circuit14is one example of a first path anomaly detection circuit, detection circuit15is one example of a third path anomaly detection circuit, detection circuit24is one example of a second path anomaly detection circuit, and detection circuit25is one example of a fourth path anomaly detection circuit.

Measurement paths11,12, and13are connected between resistor10and processing circuit6, and measurement paths21,22, and23are connected between resistor20and processing circuit6. Detection circuit14is connected between (i) measurement paths11and12and (ii) processing circuit6, and receives the respective outputs of measurement paths11and12as its inputs, and detection circuit15is connected between (i) measurement paths12and13and (ii) processing circuit6, and receives the respective outputs of measurement paths12and13as its inputs. Detection circuit24is connected between (i) measurement paths21and22and (ii) processing circuit6, and receives the respective outputs of measurement paths21and22as its inputs, and detection circuit25is connected between (i) measurement paths22and23and (ii) processing circuit6, and receives the respective outputs of measurement paths22and23as its inputs.

Detection circuit45is connected between (i) BGR circuits41and43and (ii) processing circuit6, and receives the respective outputs of BGR circuits41and43as its inputs, and detection circuit46is connected between (i) BGR circuits42and43and (ii) processing circuit6, and receives the respective outputs of BGR circuits42and43as its inputs.

BGR circuit41outputs reference signals used in measurement paths11,12, and13, and BGR circuit42outputs reference signals used in measurement paths21,22, and23.

The outputs of measurement paths11and12are compared in detection circuit14, and if the difference is within a predetermined value, it is confirmed that neither of measurement paths11and12is anomalous, and “L” (V14illustrated inFIG.5A) is output from detection circuit14to processing circuit6. However, if the difference exceeds the predetermined value, it is detected that either measurement path11or12is anomalous, and “H” (V14illustrated inFIG.5A) is output from detection circuit14to processing circuit6. Similarly, the outputs of measurement paths12and13are compared in detection circuit15, and the presence or absence of an anomaly (V15illustrated inFIG.5A) is output from detection circuit15to processing circuit6. The outputs of measurement paths21and22are compared in detection circuit24, and the presence or absence of an anomaly (V24illustrated inFIG.5A) is output from detection circuit24to processing circuit6. The outputs of measurement paths22and23are compared in detection circuit25, and the presence or absence of an anomaly (V25illustrated inFIG.5A) is output from detection circuit25to processing circuit6.

In this way, detection circuit14detects whether or not there are anomalies in measurement paths11and12based on the outputs of measurement paths11and12, and detection circuit15detects whether or not there are anomalies in measurement paths12and13based on the outputs of measurement paths12and13. Detection circuit24detects whether or not there are anomalies in measurement paths21and22based on the outputs of measurement paths21and22, and detection circuit25detects whether or not there are anomalies in measurement paths22and23based on the outputs of measurement paths22and23. The output of measurement path12is input to each of detection circuits14and15, and the output of measurement path22is input to each of detection circuits24and25.

Furthermore, the reference voltages output by BGR circuits41and43are compared in detection circuit45, and the presence or absence of an anomaly in BGR circuit41is output. Stated differently, detection circuit45detects where there is an anomaly in BGR circuit41based on the output of BGR circuit41and the output of BGR circuit43. Moreover, the reference voltages output by BGR circuits42and43are compared in detection circuit46, and the presence or absence of an anomaly in BGR circuit42is output. Stated differently, detection circuit46detects where there is an anomaly in BGR circuit42based on the output of BGR circuit42and the output of BGR circuit43. The reference voltage output by BGR circuit43is compared in each of detection circuits45and46, and the presence or absence of an anomaly is output. Processing circuit6detects whether there is an anomaly in BGR circuit43based on the output of detection circuit45and the output of detection circuit46.

The outputs of each measurement path and each detection circuit are input to processing circuit6.

From the outputs of each detection circuit14and the like, it becomes possible to detect/confirm the presence or absence of a failure and identify the location of the failure as follows. If all circuits are operating normally, all detection circuits14and the like output “L”. When measurement path11fails, only detection circuit14outputs “H”. When measurement path12fails, detection circuits14and15output “H”. When measurement path13fails, only detection circuit15outputs “H”. Similarly, when measurement path21fails, only detection circuit24outputs “H”. When measurement path22fails, detection circuits24and25output “H”. When measurement path23fails, only detection circuit25outputs “H”. Moreover, when BGR circuit41fails, only detection circuit45outputs “H”. When BGR circuit42fails, only detection circuit46outputs “H”. When BGR circuit43fails, detection circuits45and46output “H”.

FIG.5Billustrates a truth table in the measurement system ofFIG.5A. The truth table shows the relationship between the outputs (“H” or “L” signals) of each detection circuit14and the like and the location of failure. Note that V14, V15, V24, V25, V45, and V46illustrated inFIG.5Brespectively indicate the outputs (“H” or “L” signals) of detection circuits14,15,24,25,45, and46.

For example, when BGR circuit41fails, since the reference signal referenced for measurement/processing is anomalous, the measurement data output by measurement path11, measurement path12, and measurement path13are unreliable. Therefore, the location of failure in the truth table is indicated as “BGR circuit41(measurement paths11,12,13)”. Similarly, when BGR circuit42fails, the measurement data output by measurement path21, measurement path22, and measurement path23are unreliable.

When, based on the above truth table, processing circuit6detects there is a failure on a measurement path and identifies the failed measurement path, processing circuit6takes measures such as issuing a warning that correct detection/measurement cannot be performed on the identified measurement path and notifying a higher-level system. When processing circuit6detects there is a failure in a BGR circuit and identifies the failed BGR circuit, even if other detection circuits have not detected there is a failure, processing circuit6takes measures such as issuing a warning that the reference signal supplied to the failed BGR circuit and the measurement system connected to it is anomalous, and notifying a higher-level system.

In the measurement system illustrated inFIG.5A, when measurement paths11and21have the same measurement purpose (measurement purpose A), measurement paths12and22have the same measurement purpose (measurement purpose B), and measurement paths13and23have the same measurement purpose (measurement purpose C), if BGR circuit41fails, measurement of resistor10cannot be performed, but measurement of resistor20can be continued, and if BGR circuit42fails, measurement of resistor20cannot be performed, but measurement of resistor10can be continued. Stated differently, the measurement system illustrated inFIG.5Acan continue measurement even if one of BGR circuits41or42fails.

In the measurement system illustrated inFIG.5A, even if one of measurement paths11,12, or13is detected to have failed, measurement of resistor10can be continued using the remaining measurement paths. The same applies to measurement paths21,22and23.

FIG.6Ais a block diagram illustrating a circuit configuration of a measurement system according to the present embodiment. The measurement system illustrated inFIG.6Ais equivalent to the measurement system illustrated inFIG.5Awith a simplified detection circuit.

The measurement system illustrated inFIG.6Adiffers from the measurement system illustrated inFIG.5Ain that the reference signal output by BGR circuit41is referenced by measurement paths11and21, the reference signal output by BGR circuit42is referenced by measurement paths12and22, the reference signal output by BGR circuit43is referenced by measurement paths13and23, and detection circuits45and46are simplified. The measurement system according to the present embodiment does not include detection circuits45and46illustrated inFIG.5A. BGR circuit43is one example of a third or fifth reference signal generation circuit.

With this configuration, from the outputs of each detection circuit14and the like, it becomes possible to detect/confirm the presence or absence of a failure and identify the location of the failure as follows. If all circuits are operating normally, all detection circuits14and the like output “L”. When measurement path11fails, only detection circuit14outputs “H”. When measurement path12fails, detection circuits14and15output “H”. When measurement path13fails, only detection circuit15outputs “H”. Similarly, when measurement path21fails, only detection circuit24outputs “H”. When measurement path22fails, detection circuits24and25output “H”. When measurement path23fails, only detection circuit25outputs “H”. Furthermore, when BGR circuit41fails, the outputs of measurement paths11and21, which reference the reference signal of BGR circuit41, become anomalous, so detection circuits14and24output “H”. When BGR circuit42fails, detection circuits14,15,24, and25output “H”. When BGR circuit43fails, detection circuits15and25output “H”.

Note that the reference signals output by BGR circuits41to43are not input to processing circuit6A.

FIG.6Billustrates a truth table in the measurement system ofFIG.6A. The truth table shows the relationship between the outputs (“H” or “L” signals) of each detection circuit and the location of failure.

When, based on the above truth table, processing circuit6A detects there is a failure on a measurement path and identifies the failed measurement path, processing circuit6A takes measures such as issuing a warning that correct detection/measurement cannot be performed on the identified measurement path and notifying a higher-level system. When processing circuit6A detects there is a failure in a BGR circuit and identifies the failed BGR circuit, even if other detection circuits have not detected there is a failure, processing circuit6A takes measures such as issuing a warning that the reference signal supplied to the failed BGR circuit and the measurement system connected to it is anomalous, and notifying a higher-level system.

In the present embodiment, each of measurement paths11, etc., references a reference signal from a different BGR circuit, enabling detecting failures of the BGR circuits based on the outputs of detection circuits14, etc., of each of measurement paths11, etc. Accordingly, the measurement system illustrated inFIG.6Anot only has fewer detection circuits compared to Embodiment4, but can also prevent at least one of all measurement paths for the same measurement object from being rendered inoperable even if a BGR circuit fails.

Next, another example of the measurement system according to the present embodiment will be described with reference toFIG.7AandFIG.7B.FIG.7Ais a block diagram illustrating a first example of another circuit configuration of a measurement system according to the present embodiment. The measurement system illustrated inFIG.7Ais equivalent to the measurement system illustrated inFIG.6Amodified to correspond to a system for a single measurement object (resistor10). Accordingly, the reference numerals have been changed, and measurement paths11,12,13,21,22, and23illustrated inFIG.6Aare designated as measurement paths11A,12A,13A,11B,12B, and13B. Note that measurement paths11, etc., and measurement paths11A, etc., are, for example, identical in configuration and function.

The reference signal output by BGR circuit41is referenced by measurement paths11A and11B, the reference signal output by BGR circuit42is referenced by measurement paths12A and12B, and the reference signal output by BGR circuit43is referenced by measurement paths13A and13B. Stated differently, BGR circuit41is connected to measurement paths11A and11B, BGR circuit42is connected to measurement paths12A and12B, and BGR circuit43is connected to measurement paths13A and13B.

The outputs of measurement paths11A and12A are compared in detection circuit14A, and if the difference exceeds a predetermined value, it is detected that either measurement path11A or12A is anomalous, and “H” is output from detection circuit14A to processing circuit6B. Similarly, the outputs of measurement paths12A and13A are compared in detection circuit15A, and the presence or absence of an anomaly is output from detection circuit15A to processing circuit6B. The outputs of measurement paths11B and12B are compared in detection circuit14B, and the presence or absence of an anomaly is output from detection circuit14B to processing circuit6B. The outputs of measurement paths12B and13B are compared in detection circuit15B, and the presence or absence of an anomaly is output from detection circuit15B to processing circuit6B. The outputs of each measurement path and each detection circuit are input to processing circuit6B.

For example, measurement paths11A,12A, and13A are used for measurement purpose A, and measurement paths11B,12B, and13B are used for measurement purpose B.

FIG.7Bis a truth table in the measurement system ofFIG.7A, showing the relationship between the outputs (“H” or “L” signals) of each detection circuit and the location of failure.

Operations in this configuration of the measurement system are the same as those inFIG.6A, with only the reference signs for each part being different. Based on the truth table ofFIG.7B, processing circuit6B notifies a higher-level system of the detection of a failure and the location where the failure was identified, and can continue measurement for both measurement purposes A and B using normally functioning BGR circuits and measurement paths.

In the embodiment illustrated inFIG.7A, the measurement system also includes fewer detection circuits, can identify the location of failure, and can further prevent at least one of measurement paths from being rendered inoperable. The measurement system imposes two types of measurement purposes on a single measurement object and applies three measurement paths to each measurement purpose, but if there is a failure only at one location, measurement can be performed as usual.

Next, another example of the measurement system according to the present embodiment will be described with reference toFIG.8AandFIG.8B.FIG.8Ais a block diagram illustrating a second example of another circuit configuration of a measurement system according to the present embodiment.

FIG.8Ais a circuit block diagram of a measurement system according to yet another example where there is one measurement object. The configuration differs from the configuration ofFIG.7Ain that it corresponds to three types of measurement purposes, and measurement system includes measurement paths11A and12A for measurement purpose A, measurement paths11B and12B for measurement purpose B, and measurement paths11C and12C for measurement purpose C. The reference signal output by BGR circuit41is referenced by measurement paths11A and12B, the reference signal output by BGR circuit42is referenced by measurement paths11B and12C, and the reference signal output by BGR circuit43is referenced by measurement paths11C and12A. Stated differently, BGR circuit41is connected to measurement paths11A and12B, BGR circuit42is connected to measurement paths11B and12C, and BGR circuit43is connected to measurement paths11C and12A.

InFIG.8A, measurement path11A is one example of a first measurement path, measurement path11B is one example of a second measurement path, measurement path11C is one example of a third measurement path, measurement path12A is one example of a fourth measurement path, measurement path12B is one example of a fifth measurement path, and measurement path12C is one example of a sixth measurement path.

Detection circuit16A is one example of a first path anomaly detection circuit, and has the same functionality as detection circuit14A illustrated inFIG.7A. Detection circuit17A is one example of a second path anomaly detection circuit, and has the same functionality as detection circuit15A illustrated inFIG.7A. Detection circuit16B is one example of a third path anomaly detection circuit, and has the same functionality as detection circuit14B illustrated inFIG.7A. Detection circuit17B is one example of a fourth path anomaly detection circuit, and has the same functionality as detection circuit15B illustrated inFIG.7A.

The outputs of measurement paths11A and11B are compared in detection circuit16A, and if the difference exceeds a predetermined value, it is detected that either measurement path11A or11B is anomalous, and “H” is output from detection circuit16A to processing circuit6C. Similarly, the outputs of measurement paths11B and11C are compared in detection circuit17A, and the presence or absence of an anomaly is output from detection circuit17A to processing circuit6C. The outputs of measurement paths12A and12B are compared in detection circuit16B, and the presence or absence of an anomaly is output from detection circuit16B to processing circuit6C. The outputs of measurement paths12B and12C are compared in detection circuit17B, and the presence or absence of an anomaly is output from detection circuit17B to processing circuit6C. The outputs of each measurement path and each detection circuit are input to processing circuit6C.

With this configuration, from the outputs of each detection circuit16A and the like, it becomes possible to detect/confirm the presence or absence of a failure and identify the location of the failure as follows. If all circuits are operating normally, all detection circuits16A and the like output “L”. When measurement path11A fails, only detection circuit16A outputs “H”. When measurement path11B fails, detection circuits16A and17A output “H”. When measurement path11C fails, only detection circuit17A outputs “H”. Similarly, when measurement path12A fails, only detection circuit16B outputs “H”. When measurement path12B fails, detection circuits16B and17B output “H”. When measurement path12C fails, only detection circuit17B outputs “H”.

Next, when BGR circuit41fails, the outputs of measurement paths11A and12B, which reference the reference signal of BGR circuit41, become anomalous, so detection circuits16A,16B, and17B output “H”. When BGR circuit42fails, detection circuits16A,17A, and17B output “H”. When BGR circuit43fails, detection circuits17A and16B output “H”.

FIG.8Bis a figure showing a truth table in the measurement system ofFIG.8A, showing the relationship between the outputs (“H” or “L” signals) of each detection circuit and the location of failure.

Processing circuit6C can, based on the truth table ofFIG.8B, notify a higher-level system of the detection of a failure and the location where the failure was identified, and can continue measurement for all of measurement purposes A, B, and C using normally functioning BGR circuits and measurement paths.

In the embodiment illustrated inFIG.8A, the measurement system also includes fewer detection circuits, can identify the location of failure, and can further prevent at least one of measurement paths from being rendered inoperable. The measurement system imposes three types of measurement purposes on a single measurement object and applies two measurement paths to each measurement purpose, but if there is a failure at one location, measurement can be performed as usual.

As described above, the measurement system according to the present embodiment includes a configuration in which three measurement paths are provided for each measurement object, reference signals from three BGR circuits are allocated to and referenced by each measurement path, and detection circuits are provided to compare two selected pairs from the three measurement paths. This makes it possible to detect/confirm the presence or absence of a failure and identify the location of the failure from the outputs of each detection circuit16A and the like. When the location of a failure is identifiable, the measurement system can continue measurement even at the presence of the failure by using the normally operating circuits other than the failed location. Furthermore, the measurement system can continue the failure detection as in Embodiment 1 or 2, as three paths or three circuits become two paths or two circuits for measurement.

In summary, in a measurement system including a plurality of measurement paths for detecting a failure, the system includes a plurality of reference signal generation circuits that generate reference signals commonly used by the measurement paths. By referencing reference signals, which are to be input to a failure detection circuit, from reference signal generation circuits of different measurement paths, failure detection can be performed reliably and in a simplified manner.

Note that the measurement systems illustrated inFIG.6A,FIG.7A, andFIG.8Amay be integrated into an integrated circuit. For example, in the case ofFIG.6A, the measurement system may further include: a first terminal group including a terminal connected to measurement path11, a terminal connected to measurement path12, and a terminal connected to measurement path13; and a second terminal group including a terminal connected to measurement path21, a terminal connected to measurement path22, and a terminal connected to measurement path23, and the first terminal group, the second terminal group, measurement paths11to13and21to23, detection circuits14,15,24, and25, and processing circuit6A may be integrated into an integrated circuit.

For example, in the case ofFIG.7A, the measurement system may further include: a first terminal group including a terminal connected to measurement path11A, a terminal connected to measurement path12A, and a terminal connected to measurement path13A; and a second terminal group including a terminal connected to measurement path11B, a terminal connected to measurement path12B, and a terminal connected to measurement path13B, and the first terminal group, the second terminal group, measurement paths11A to13A and11B to13B, detection circuits14A,15A,14B, and15B, and processing circuit6B may be integrated into an integrated circuit.

For example, in the case ofFIG.8A, the measurement system may further include: a first terminal group including a terminal connected to measurement path11A, a terminal connected to measurement path11B, and a terminal connected to measurement path11C; and a second terminal group including a terminal connected to measurement path12A, a terminal connected to measurement path12B, and a terminal connected to measurement path12C, and the first terminal group, the second terminal group, measurement paths11A to11C and12A to12C, detection circuits16A,17A,16B, and17B, and processing circuit6C may be integrated into an integrated circuit.

OTHER EMBODIMENTS

Hereinbefore, a measurement system according to one or more aspects of the present disclosure has been described based on embodiments, but the present disclosure is not limited to these embodiments. Various modifications to the present embodiment that may be conceived by those skilled in the art, as well as embodiments resulting from combinations of elements from different embodiments, may also be included within the scope of one or more aspects of the present disclosure as long as these do not depart from the essence of the present disclosure.

For example,FIG.1Cin Embodiment 1 illustrates a diagram where the configuration of the measurement system is integrated into an integrated circuit, and it was explained that the configurations of the measurement systems illustrated inFIG.6A,FIG.7A, andFIG.8Ain Embodiment 5 may also be integrated into integrated circuits. However, the configurations of measurement systems described in other embodiments or illustrated in other figures may also be integrated into integrated circuits.

In the above embodiments, the measurement object is exemplified as a resistor that converts current to be measured into voltage, but the measurement object is not limited to being a resistor. The measurement object may be some other electronic component as long as it can convert the object to be measured into an electrical quantity that can be data-processed, such as voltage.

In the above embodiments, the detection circuit is exemplified as outputting “H” in case of failure and “L” in case of normal operation, but the detection circuit may output “L” in case of failure and “H” in case of normal operation.

The measurement system according to the above embodiments may be implemented as a single device (or a single electronic component), and, alternatively, may be implemented by a plurality of devices (or a plurality of electronic components). When the measurement system is implemented by a plurality of devices (or a plurality of electronic components), the elements included in the measurement system may be distributed among the plurality of devices (or the plurality of electronic components) in any manner. When the measurement system is implemented by a plurality of devices (or a plurality of electronic components), the communication method between the plurality of devices is not particularly limited, and may be wireless or wired communication. A combination of wireless communication and wired communication may be used between the devices.

Each element described in the above embodiments may be implemented as software, and typically, may be implemented as an LSI circuit, which is an integrated circuit. These elements may be integrated into individual chips, or a portion or all of the elements may be integrated into one chip. Although the term LSI is used here, depending on the degree of integration, it may also be referred to as an IC, system LSI, super LSI, or ultra LSI. Furthermore, if a new technology for circuit integration that replaces LSI emerges due to advances in semiconductor technology or other derived technologies, it goes without saying that the elements may be integrated using that technology.

A system LSI circuit is ultra-multifunctional LSI circuit manufactured by integrating a plurality of processing units on a single chip, and specifically, is a computer system including a microprocessor, read only memory (ROM), random access memory (RAM), and the like. The ROM stores a computer program. The microprocessor operates according to the computer program, thereby enabling the system LSI circuit to achieve its functionality.

Industrial Applicability

The present disclosure is applicable in a measurement system, mounted in semiconductor devices, for failure detection/diagnosis of measurement circuits for measuring electrical quantities such as current and voltage.