Semiconductor device package for reducing parasitic light and method of manufacturing the same

A semiconductor device package includes a carrier, a sensor element disposed on or within the carrier, a cover and a filter. The cover includes a base substrate and a periphery barrier. The base substrate includes an inner sidewall. The inner sidewall of the base substrate defines a penetrating hole extending from a top surface of the base substrate to a bottom surface of the base substrate; at least a portion of the inner sidewall of the base substrate is tilted. The periphery barrier is coupled to the bottom surface of the base substrate and contacts a top surface of the carrier. The filter is disposed on the top surface of the base substrate and covers the penetrating hole.

BACKGROUND

1. Technical Field

The present disclosure relates to a semiconductor device package and a method of making the same, and more particularly, to a semiconductor device package having a micro-electro-mechanical systems (MEMS) device and a manufacturing method thereof.

2. Description of the Related Art

Packaging requirements for MEMS devices (such as MEMS dies) can be much more complex than traditional IC packaging requirements. An optical sensor package including a MEMS device is described by way of example. The optical sensor package should include an aperture to allow transmission of light to be detected, while reducing undesired parasitic light. Parasitic light refers to any of the incident light that may cause disturbance to the optical sensor. A MEMS die that allows the passage of light within a specific wavelength range through an aperture may be positioned on or within the optical sensor package adjacent to the aperture, such as on an outer surface of a lid of the MEMS device or on an inner surface of the lid.

When the MEMS die is placed on the inner surface of the lid, such as by pick-and-place, a relatively large distance between the aperture and a sidewall of the lid is needed, to avoid collision during the placement. Alternatively, a special apparatus can be used for placement, but the special apparatus increases manufacturing time and cost.

Additionally, undesired parasitic light may enter the package through an adhesive used to adhere the MEMS die to the lid. To enhance the sensitivity of the sensor, it is desired to reduce parasitic light detected by the sensor.

SUMMARY

In an embodiment, a semiconductor device package includes a carrier, a sensor element disposed on or within the carrier, a cover and a filter. The cover includes a base substrate and a periphery barrier. The base substrate includes an inner sidewall. The inner sidewall of the base substrate defines a penetrating hole extending from a top surface of the base substrate to a bottom surface of the base substrate; at least a portion of the inner sidewall of the base substrate is tilted. The periphery barrier is coupled to the bottom surface of the base substrate and is disposed on a top surface of the carrier. The filter is disposed on the top surface of the base substrate and covers the penetrating hole.

In an embodiment, a method of manufacturing a semiconductor device package includes: providing a carrier having a sensor element disposed thereon; and attaching a cover to the carrier, the cover including a base substrate defining a penetrating hole, the cover further including a periphery barrier. The cover is positioned on the carrier such that the periphery barrier of the cover contacts a top surface of the carrier. The method further includes attaching a filter to a top surface of the base substrate of the cover such that the filter covers the penetrating hole.

DETAILED DESCRIPTION

The present disclosure describes techniques suitable for the manufacture of smaller sensor device packages without the need of a special apparatus or special apparatuses. For embodiments of an optical sensor, the resulting sensor device packages can reduce parasitic light detected by the sensor, and thus enhance the sensitivity of the sensor.

FIG. 1illustrates a cross-sectional view of a semiconductor device package100in accordance with an embodiment of the present disclosure. The semiconductor device package100includes a carrier10, a sensor element11, a cover12and a filter13.

In one or more embodiments, the carrier10is a pre-molded leadframe including a die pad and leads. In one or more embodiments, the leadframe is, or includes, copper or a copper alloy. In other embodiments, the leadframe includes one of, or a combination of, iron, an iron alloy, nickel, a nickel alloy, or another metal or metal alloy. In one or more embodiments, the leadframe is coated with a silver or a copper layer.

In one or more embodiments, the carrier10is a substrate. The substrate is, for example, a printed circuit board (PCB), such as a paper-based copper foil laminate, a composite copper foil laminate, or a polymer-impregnated glass-fiber-based copper foil laminate. The substrate can include a core layer which is made of a bismaleimide-triazine (BT) resin or a glass-reinforced epoxy composite (e.g., an FR-4 composite).

In one or more embodiments, the carrier10is a semiconductor die. The semiconductor die may be, for example, an application-specific integrated circuit (ASIC) die.

In the embodiment illustrated inFIG. 1, the sensor element11(e.g., an infrared sensor) is disposed on a top surface10aof the carrier10to sense or detect light passing through the filter13. In other embodiments, the sensor element11is disposed within the carrier10. The sensor element11is electrically connected (e.g., by wire bonding or flip chip bonding) to another device, such as to a processor14as shown inFIG. 1, or such as to an electrode (not shown) of the carrier10or other electronic device.

The cover12is positioned on the top surface10aof the carrier10. The cover12includes a base substrate121and a periphery barrier122. The periphery barrier122is coupled to a bottom surface121bof the base substrate121, and contacts the top surface10aof the carrier10. The periphery barrier122may be integral with the base substrate121of the cover12, or may be included as a separate component from the cover12. The cover12and the carrier10together define a space to accommodate the sensor element11and protect the sensor element11.

The base substrate121of the cover12has an inner sidewall121s. The inner sidewall121sof the base substrate121defines a penetrating hole123extending from a top surface121aof the base substrate121to the bottom surface121bof the base substrate121.

In one or more embodiments, the cover12is, or includes, plastic. For example, the cover12may include a liquid crystal polymer, an epoxy resin, a polyphthalamide (PPA) resin, or a combination thereof. In such embodiments, the inner sidewall121s, the top surface121aand/or the bottom surface121bof the base substrate121of the cover12may be coated with a reflective material for light reflection, and to prevent external light from entering the semiconductor device package100through the cover12. In one or more embodiments, the reflective material is a metal coating; in other embodiments, the reflective material is another material.

In other embodiments, the cover12is, or includes, a metal for light reflection, and to prevent external light from entering the semiconductor device package100through the cover12.

The metal used for the cover12, or for the metal reflective material coated on the cover12, can be stainless steel, aluminum (Al), gold (Au), silver (Ag), copper (Cu), nickel (Ni), or other metal, or can be a metal composite having a layered structure, such as stainless steel/Ni/Au, Ni/Ag, Ni/Au, stainless steel/Cu/stainless steel, and the like.

The filter13is disposed on the top surface121aof the base substrate121and covers the penetrating hole123. In one or more embodiments, depending on the intended application for the semiconductor device package100, the filter13can be selected to allow light within a specific wavelength range to pass. In some embodiments, the sensor11is an infrared sensor, and the filter13allows infrared rays (e.g., near-infrared, middle-infrared or far-infrared rays) to pass, and may block light having other wavelengths. In one or more embodiments, the filter13allows infrared rays having a wavelength of about 5 μm or above to pass.

The filter13can be made of suitable materials, for example, silicon.

The filter13can be applied to the top surface121aof the base substrate121, for example, by a pick-and-place machine, and therefore the filter13(and the periphery barrier122) would not be damaged during placement, as could be the case if the filter13were applied on the bottom surface121bof the base substrate121. Accordingly, a distance between the aperture and the inner sidewall can be decreased, without the need to accommodate a placement technique.

An adhesive (not shown) can be used to adhere the filter13to the cover12.

To reduce or minimize undesired parasitic light from entering the package100, such as from the edge of the filter13through the adhesive or by way of undesirable non-normal incident light (as described below), the inner sidewall121sof the base substrate121is angled, as shown inFIG. 1. The benefits of this approach are discussed with respect toFIGS. 2A and 2B.

In some embodiments, the sensor element11is divided into several sensing areas for receiving light from a corresponding area of an external object, to identify the position or shape of the external object. In such embodiments, it is desirable that most of the received light is normal incident light (i.e., substantially perpendicular to a receiving area of the sensor element11), because non-normal incident light may cause misjudgment of the sensor element11. An example of non-normal incident light is when the light comes from the left side of the external object and is received by a sensing area located at the right side of the sensor element11.

FIG. 2Aillustrates how the undesired parasitic light could affect the sensitivity of the sensor element11if an inner sidewall121s1were to be positioned perpendicularly to the top surface121aof the base substrate121. As shown inFIG. 2A, the undesired parasitic light enters from the right side of the package100and is received by the sensor element11, after being reflected by the inner sidewall121s1, thereby reducing the sensitivity of the sensor element11.

According to the present disclosure, to reduce the undesired parasitic light, as shown inFIG. 1, the inner sidewall121sis tilted at an angle (shown as θ inFIG. 1). The angle is less than about 90 degrees.

FIG. 2Bshows, for the semiconductor device package100ofFIG. 1, the reflection of undesired parasitic light by the inner sidewall121stilted at an angle (shown as θ inFIG. 2B). The tilted inner sidewall121schanges the path of the reflected light so the reflected light is directed away from the sensor element11. The sensor element11inFIG. 2Breceives less undesired parasitic light than the sensor element11inFIG. 2A, and thus has an improved sensitivity.

The titled angle (θ) may be adjusted or optimized in view of one or more of the following factors: a distance between the inner sidewall121sand a nearest lateral surface11sof the sensor element11, a distance between the bottom surface121bof the base substrate121and a top surface11aof the sensor element11, and a size of the penetrating hole123. In one or more embodiments, the inner sidewall121sof the base substrate121is tilted at an angle (θ) of between about 10° to less than about 90°, such as about 15° to about 80°, about 20° to about 70°, about 25° to about 65°, about 30° to about 60°, about 35° to about 55°, or about 40° to about 50°, relative to the top surface121aof the base substrate121. In one or more embodiments (e.g., as shown inFIG. 1), the inner sidewall121sof the base substrate121is tilted at an angle of about 45°, such as about 42° to about 48°, relative to the top surface of the base substrate121.

In one or more embodiments (e.g., as shown inFIG. 1), the whole of the inner sidewall121sof the base substrate121is tilted. In other embodiments, a portion of the inner sidewall121sis tilted at an angle, and a portion is not tilted.

FIG. 3illustrates a cross-sectional view of a semiconductor device package300in accordance with an embodiment of the present disclosure. The semiconductor device package300is similar to the semiconductor device package100illustrated and described with respect toFIG. 1, except that a portion of an inner sidewall121s′ is substantially perpendicular to the top surface121aof the base substrate121, and a portion of the inner sidewall121s′ is tilted. In the embodiment ofFIG. 3, the inner sidewall121s′ of the base substrate121has a perpendicular portion s1and a tilted portion s2.

The tilted portion s2is tilted at an angle (θ) of between about 10° to less than about 90°, such as about 15° to about 80°, about 20° to about 70°, about 25° to about 65°, about 30° to about 60°, about 35° to about 55°, or about 40° to about 50°, relative to the top surface121aof the base substrate121. In one or more embodiments (e.g., as shown inFIG. 3), the tilted portion s2of the inner sidewall121s′ is tilted at an angle of about 45°, such as about 42° to about 48°, relative to the top surface of the base substrate121. The tilted portion s2can change a path of the undesired parasitic light and reduce the amount of the undesired parasitic light received by the sensor element11.

The combination of a perpendicular portion s1and a tilted portion s2(as shown inFIG. 3) avoids a sharp edge between the inner sidewall121sand the top surface121a, as can occur in an embodiment in which the whole of the inner sidewall121sof the base substrate121is tilted (e.g., as shown inFIG. 1). Such a sharp edge may be more susceptible to breakage during handling or manufacture. To further reduce a potential for breakage at edges of the base substrate121, ones of the edges may be rounded. For example, one or more of the following edges may be rounded: the edge between the inner sidewall121sor121s′ and the top surface121a; an edge between the perpendicular portion s1and the tilted portion s2; or an edge between the tilted portion s2and the bottom surface121b.

FIG. 4illustrates a cross-sectional view of a semiconductor device package400in accordance with an embodiment of the present disclosure. The semiconductor device package400is similar to the semiconductor device package100described with respect toFIG. 1, with the cover12including an inner sidewall121s′ having a perpendicular portion s1and a tilted portion s2as described with respect toFIG. 3, except that the cover12further includes a portion surrounding the filter13.

The cover12includes a base substrate121, a periphery barrier122and a portion124protruding from the top surface121aof the base substrate121. The protruding portion124may be integral with the base substrate121of the cover12, or may be included as a separate component from the cover12. Additionally, as described above with respect toFIG. 1, the periphery barrier122may be integral with the base substrate121of the cover12, or may be included as a separate component from the cover12. Accordingly, the cover12may include one, two, or three components (e.g., one integral component121/122/124; one integral component121/122and one separate component124; one integral component121/124and one separate component122; or three separate components121,122,124).

As described with respect toFIG. 1, the base substrate121of the cover12defines a penetrating hole123extending from a top surface121aof the base substrate121to a bottom surface121bof the base substrate121. Specifically, in the embodiment shown inFIG. 4, the penetration hole123is defined by the inner sidewall121s′ of the base substrate121.

The protruding portion124of the cover12has an inner sidewall124sdefining a space to accommodate the filter13; therefore, it is easier to align the filter.

In one or more embodiments, the inner sidewall124sof the protruding portion124is substantially perpendicular to the top surface121aof the base substrate121. In other embodiments, the inner sidewall124sof the protruding portion124is tilted. For example, the inner sidewall124smay be tilted at an angle (α) of between about 10° to less than about 90°, such as about 15° to about 80°, about 20° to about 70°, about 25° to about 65°, about 30° to about 60°, about 35° to about 55°, or about 40° to about 50°, relative to the top surface121aof the base substrate121. In one or more embodiments, the inner sidewall124sof the protruding portion124is tilted at an angle of about 45°, such as about 42° to about 48°, relative to the top surface121aof the base substrate121. The titled inner sidewall124scan reduce collision between the filter13and the protruding portion124during the placement of the filter13.

A portion of the space defined by the inner sidewall124sof the protruding portion124is filled with an adhesive15that adheres the filter13to the top surface121aof the base substrate121and affixes the filter13in the space. The adhesive15may be any suitable adhesive. In an embodiment, the adhesive is a conductive adhesive. In an embodiment, the adhesive comprises a binder resin and conductive fillers. For example, the binder resin may be an epoxy resin, a polyimide, a polyacrylate, a polyurethane or a silicone resin, and the conductive fillers may be carbon black, metal (e.g., gold, silver, copper, aluminum, zinc, iron or nickel), metal-coated particles, a conductive compound, or combinations thereof. In one embodiment, the adhesive includes conductive fillers selected from carbon black, metal particles, metal-coated particles and a combination thereof. The adhesive may be selected to minimize undesired parasitic light from entering the package400.

As described with respect toFIG. 1, the cover12may be plastic or metal, and the cover12may be coated with a reflective material. Refer to the description ofFIG. 1for details. As also described with respect toFIGS. 1 and 3, the base substrate121of the cover12may respectively have a tilted inner sidewall121s, or an inner sidewall121s′ including a tilted portion s2. Refer to the respective descriptions ofFIGS. 1 and 3for details. The tilted inner sidewall121sor tilted portion s2of the inner sidewall121s′ can change the path of undesired parasitic light and reduce the amount of undesired parasitic light received by the sensor element11As noted, the filter13is attached to the top surface121aof the base substrate121by the adhesive15filled in a portion of the space defined by the inner sidewall124sof the protruding portion124, and the filter13covers the penetrating hole123. As compared to the embodiments shown inFIG. 1andFIG. 3, the protruding portion124and the adhesive15filled in the space defined by the inner sidewall124sof the protruding portion124can not only fix the position of the filter13, but also protect the filter13from damage.

As described with respect toFIG. 1, in one or more embodiments, depending on the intended application for the semiconductor device package400, the filter13can be selected to allow light within a specific wavelength range to pass. In one or more embodiments, the sensor11is an infrared sensor, and the filter13allows infrared rays (e.g., near-infrared, middle-infrared or far-infrared rays) to pass and may block the light having other wavelength.

The semiconductor device packages (e.g., as shown inFIGS. 1, 3 and 4) of the present disclosure can be applied to various MEMS devices, such as MEMS devices used for an infrared camera, a thermopile, a gesture sensor, or a proximity sensor. The techniques described in the present disclosure enhance the sensitivity of the sensor due to the design of the inner sidewall (e.g.,121sor121s′) defining the penetrating hole123.

FIGS. 5A-5Cillustrate a method of manufacturing a semiconductor device package300in accordance with the embodiment shown inFIG. 3. InFIG. 5A, a carrier10having a sensor element11disposed thereon or therein is provided. InFIG. 5B, a cover12is attached to the carrier. The cover12includes a base substrate121defining a penetrating hole123, and further includes a periphery barrier122. The cover12is positioned such that the periphery barrier122contacts a top surface10aof the carrier. InFIG. 5C, a filter13is attached to a top surface121aof the base substrate121, for example, by an adhesive, and covers the penetrating hole123.

The semiconductor device package100in accordance with the embodiment shown inFIG. 1can be manufactured in a similar manner as described inFIGS. 5A-5Cfor the semiconductor device package300.

FIGS. 6A-6Cillustrate a method of manufacturing a semiconductor device package400in accordance with the embodiment shown inFIG. 4. InFIG. 6A, a carrier10having a sensor element11disposed thereon or therein is provided. InFIG. 6B, a cover12is attached to the carrier10. The cover12includes a base substrate121defining a penetrating hole123, a periphery barrier122, and a portion124protruding from a top surface121aof the base substrate121. The cover12is positioned such that the periphery barrier122contacts a top surface10aof the carrier10. InFIG. 6C, an adhesive15is applied to a space defined by an inner sidewall124sof the protruding portion124of the cover12, and a filter13is placed on the top surface121aof the base substrate121to cover the penetrating hole123, the filter13being adhered to the top surface121aof the base substrate121by the adhesive15. As can be seen inFIG. 6C(andFIG. 4), the inner sidewall124sof the protruding portion124is set back from the inner sidewall121s′, leaving a shelf area on the top surface121aof the base substrate121on which to apply the adhesive15. By this technique, positioning of the adhesive may be better controlled.

The semiconductor device packages according to the present disclosure can be prepared using existing equipment, and the manufacture is cost-effective. For example, the cover12can be preformed, such as by molding (e.g., injection molding); and the filter13can be applied to the top surface121aof the base substrate121of the cover12, for example, by a pick-and-place machine already present in a semiconductor package plant, and damage to the filter13would be avoided during such placement.

The techniques described in the present disclosure result in improved sensor sensitivity.

As used herein, the terms “substantially” and “about” are used to denote small variations. For example, when used in conjunction with a numerical value, the terms can refer to a range of variation of less than or equal to ±10% of that numerical value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. When used in conjunction with an event or circumstance, the terms “substantially” and “about” can refer to instances in which the event or circumstance occurs precisely, as well as instances in which the event or circumstance occurs to a close approximation. For example, “substantially perpendicular” can refer to a range of variation of less than or equal to ±10% of 90°, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%.

Additionally, amounts, ratios, and other numerical values are sometimes presented herein in a range format. It can be understood that such range formats are used for convenience and brevity, and should be understood flexibly to include not only numerical values explicitly specified as limits of a range, but also all individual numerical values or sub-ranges encompassed within that range as if each numerical value and sub-range is explicitly specified.