A light-receiving device according to an embodiment of the present disclosure includes: a first substrate including a plurality of photoelectric conversion sections that photoelectrically converts light and an accumulation section that accumulates electric charge photoelectrically converted by the photoelectric conversion sections; a second substrate stacked on the first substrate and including a readout circuit that outputs a first signal based on the electric charge accumulated in the accumulation section; and a wiring layer including a via that electrically couples the accumulation section and the readout circuit to each other. The first substrate and the second substrate are stacked to allow a first surface of the first substrate on which an element is formed and a second surface of the second substrate on which an element is formed to be opposed to each other. The via penetrates a plurality of layers in the wiring layer.

TECHNICAL FIELD

The present disclosure relates to a light-receiving device.

BACKGROUND ART

There has been proposed an imaging device having a three-dimensional structure configured by attaching together a substrate including a sensor pixel, a substrate including a readout circuit, and a substrate including a logic circuit (PTL 1).

CITATION LIST

Patent Literature

SUMMARY OF THE INVENTION

It is desired for an imaging device to have improved conversion efficiency upon conversion of electric charge into a voltage.

It is desirable to provide an imaging device that makes it possible to improve conversion efficiency.

A light-receiving device according to an embodiment of the present disclosure includes: a first substrate including a plurality of photoelectric conversion sections that photoelectrically converts light and an accumulation section that accumulates electric charge photoelectrically converted by the photoelectric conversion sections; a second substrate stacked on the first substrate and including a readout circuit that outputs a first signal based on the electric charge accumulated in the accumulation section; and a wiring layer including a via that electrically couples the accumulation section and the readout circuit to each other. The first substrate and the second substrate are stacked to allow a first surface of the first substrate on which an element is formed and a second surface of the second substrate on which an element is formed to be opposed to each other. The via penetrates a plurality of layers in the wiring layer.

MODES FOR CARRYING OUT THE INVENTION

Hereinafter, description is given in detail of embodiments of the present disclosure with reference to the drawings. It is to be noted that the description is given in the following order.1. Embodiment2. Modification Examples3. Application Example4. Practical Application Examples

FIG.1is a block diagram illustrating an example of an overall configuration of an imaging device, which is an example of a light-receiving device according to an embodiment of the present disclosure. An imaging device1which is the light-receiving device is a device that receives incident light to perform photoelectric conversion. The imaging device (light-receiving device)1photoelectrically converts the received light to generate a signal. The imaging device1takes in incident light (image light) from a subject via an optical lens system (unillustrated). The imaging device1is, for example, a CMOS (Complementary Metal Oxide Semiconductor) image sensor, and captures an image of the subject.

The imaging device1includes a pixel array section240in which pixels P each including a photoelectric conversion section (photoelectric conversion element) are arranged in matrix. In the pixel array section240, the pixels P each including the photoelectric conversion section are arranged in matrix. The pixel array section240is a region in which the pixels P are repeatedly arranged in an array. The imaging device1includes, in a peripheral region of the pixel array section240, for example, an input section210, a row drive section220, a timing control section230, a column signal processing section250, an image signal processing section260, and an output section270.

In the present embodiment, pixel sharing units40each including a plurality of pixels P are arranged in an array. In the example illustrated inFIG.1, the pixel sharing unit40includes four pixels (a pixel Pa, a pixel Pb, a pixel Pc, and a pixel Pd). The pixels Pa to Pd are arranged in two rows x two columns, for example. Each of the pixels Pa to Pd has, for example, a photodiode PD as the photoelectric conversion section.

The imaging device1is provided with a readout circuit (seeFIG.2) described later for each of the pixel sharing units40. The readout circuit includes an amplification transistor, a reset transistor, and the like, and outputs a pixel signal based on electric charge photoelectrically converted by the photoelectric conversion section. The pixel sharing unit40is a unit that shares one readout circuit, and the plurality of pixels (pixels Pa to Pd inFIG.1) of the pixel sharing unit40shares one readout circuit. In the pixel array section240, one readout circuit is provided for every four pixels (pixels Pa to Pd). Operating the readout circuit time-divisionally allows respective pixel signals of the pixels Pa to Pd to be read.

As illustrated inFIG.1, the imaging device1is provided with a plurality of row drive signal lines Lread (row selection lines, reset control lines, etc.) and a plurality of vertical signal lines (column read lines) Lsig. For example, in the pixel array section240, the row drive signal lines Lread are wired for respective pixel rows configured by the plurality of pixels P arranged in a horizontal direction (row direction). In addition, in the pixel array section240, the vertical signal lines Lsig are wired for respective pixel columns configured by the plurality of pixels P arranged in a vertical direction (column direction). The row drive signal line Lread transmits a signal that drives each transistor of the pixel sharing unit40, for example. A pixel signal may be read from each of the pixels Pa to Pd included in the pixel sharing unit40to the vertical signal line Lsig.

The row drive section220is configured by a plurality of circuits each including a shift register, an address decoder, and the like. The row drive section220(drive circuit) generates a signal to drive the pixel P, and outputs the signal to each of the pixel sharing units40of the pixel array section240via the row drive signal line Lread. The row drive section220generates, for example, a signal TRG that controls a transfer transistor, a signal SEL that controls a selection transistor, a signal RST that controls a reset transistor, and the like, and outputs the signals to each of the pixel sharing units40by the row drive signal line Lread.

As described above, the row drive signal line Lread transmits drive signals (signal TRG, signal SEL, etc.) to read signals from the pixels P. The row drive section220is a row address control section, selectively scans each of the pixels P of the pixel array section240, and drives the plurality of pixels P arranged in the pixel array section240, for example, on a row-by-row basis. The pixel signal of each of the pixels P selectively scanned by the row drive section220is outputted to the column signal processing section250via the vertical signal line Lsig coupled to the pixel P.

The column signal processing section250(signal processing circuit) includes, for example, a load circuit part coupled to the vertical signal line Lsig. The load circuit part constitutes a source follower circuit together with the amplification transistor of the readout circuit. It is to be noted that the column signal processing section250may include an amplification circuit part that amplifies a pixel signal read from the pixel sharing unit40via the vertical signal line Lsig. In addition, the column signal processing section250may include a noise processing part that removes a noise component from the pixel signal.

In addition, the column signal processing section250includes an analog-to-digital converter (ADC). The ADC includes, for example, a comparator part and a counter part. The comparator part compares an analog signal to be converted with a reference signal to be compared. The counter part measures time until inversion of a comparison result at the comparator part.

The ADC of the column signal processing section250converts a pixel signal as an analog signal to be outputted from the pixel sharing unit40into a digital signal. The ADC may perform AD conversion on a pixel signal before noise processing by the noise processing part, or may perform AD conversion on a pixel signal after the noise processing by the noise processing part. It is to be noted that the column signal processing section250may also include a horizontal scanning circuit part that performs a control to scan a read column.

The timing control section230supplies a signal that controls a timing to the row drive section220and the column signal processing section250on the basis of, for example, a reference clock signal and a timing control signal inputted to the imaging device1from the outside. The timing control signal is, for example, a vertical synchronization signal, a horizontal synchronization signal, or the like. The timing control section230(control circuit) includes, for example, a timing generator that generates various timing signals, and controls driving of the row drive section220, the column signal processing section250, and the like on the basis of the generated various timing signals.

The image signal processing section260is a circuit that performs various types of signal processing on the pixel signal. The image signal processing section260may include a processor and a memory. The image signal processing section260(signal processing circuit) performs, for example, signal processing such as tone curve correction processing for gradation adjustment and black level adjustment on a pixel signal subjected to the AD conversion. It is to be noted that characteristic data on a tone curve indicating a correction amount of gradation may be stored in advance in a memory inside the image signal processing section260.

The input section210and the output section270exchange signals with the outside. For example, the above-described reference clock signal, timing control signal, and characteristic data are inputted to the input section210(input circuit) from the outside of the imaging device1. The output section270(output circuit) may output to the outside, for example, a pixel signal after the signal processing by the image signal processing section260or a pixel signal before the signal processing by the image signal processing section260.

FIG.2is a diagram illustrating a configuration example of the pixel sharing unit of the imaging device according to an embodiment of the present disclosure. Description is given below of an example of a case where four pixels P share one readout circuit45, as illustrated inFIG.1. Each of the four pixels Pa to Pd includes the photodiode PD, which is a photoelectric conversion section (photoelectric conversion element), a transfer transistor Tr1, and a floating diffusion FD.

The photodiode PD, which is a photoelectric conversion section, converts incident light into electric charge. The photodiode PD performs photoelectric conversion to generate electric charge corresponding to a received light amount. The transfer transistor Tr1is electrically coupled to the photodiode PD. The transfer transistor Tr1is controlled by the signal TRG, and is photoelectrically converted by the photodiode PD to transmit accumulated electric charge to the floating diffusion FD.

The floating diffusion FD is an accumulation section, and accumulates transferred electric charge. The floating diffusion FD can also be referred to as a holding section that holds electric charge transferred from the photodiode PD. The floating diffusion FD accumulates the transferred electric charge, and converts the electric charge into a voltage corresponding to a capacitance of the floating diffusion FD. The electric charge converted by the photodiode PD is transferred to the floating diffusion FD by the transfer transistor Tr1, and is converted into a voltage corresponding to the capacitance of the floating diffusion FD.

In the example illustrated inFIG.2, the transfer transistors Tr1of the respective pixels Pa to the pixel Pd are controlled ON/OFF by signals different from each other. The transfer transistor Tr1of the pixel Pa is controlled by the signal TRG1, and the transfer transistor Tr1of the pixel Pb is controlled by the signal TRG2. In addition, the transfer transistor Tr1of the pixel Pc is controlled by the signal TRG3, and the transfer transistor Tr1of the pixel Pd is controlled by the signal TRG4.

As an example, the readout circuit45includes an amplification transistor Tr2, a selection transistor Tr3, and a reset transistor Tr4. A gate of the amplification transistor Tr2is coupled to the floating diffusion FD, and receives an input of a voltage converted by the floating diffusion FD. The amplification transistor Tr2generates a pixel signal based on a voltage of the floating diffusion FD. The pixel signal is an analog signal based on photoelectrically converted electric charge.

The selection transistor Tr3is controlled by the signal SEL, and outputs a pixel signal from the amplification transistor Tr2to the vertical signal line Lsig. The selection transistor Tr3can also be said to control an output timing of the pixel signal. The reset transistor Tr4may be controlled by the signal RST to reset the electric charge accumulated in the floating diffusion FD and to reset the voltage of the floating diffusion FD. A pixel signal outputted from the readout circuit45is inputted to the above-described column signal processing section250(seeFIG.1) via the vertical signal line Lsig. It is to be noted that the selection transistor Tr3may be provided between a power supply line to be supplied with a power supply voltage VDD and the amplification transistor Tr2. In addition, the selection transistor Tr3may be omitted as needed.

The readout circuit45may include a transistor (gain switching transistor) to change a gain of electric charge-voltage conversion in the floating diffusion FD. The gain switching transistor is provided between the reset transistor Tr4and the floating diffusion FD, for example. Bringing the gain switching transistor into an ON state increases a capacitance to be added to the floating diffusion FD, thus making it possible to change the gain upon conversion of electric charge into a voltage.

FIG.3is a schematic view of an example of a cross-sectional configuration of the imaging device according to an embodiment of the present disclosure. The imaging device1has a configuration in which a first substrate101, a second substrate102, and a third substrate103are stacked in a Z-axis direction. The first substrate101, the second substrate102, and the third substrate103are each configured by a semiconductor substrate (e.g., silicon substrate). It is to be noted that, as illustrated inFIG.3, a direction of incidence of light from a subject is defined as the Z-axis direction, a right-left direction on the sheet orthogonal to the Z-axis direction is defined as an X-axis direction, and a direction orthogonal to the Z-axis direction and the X-axis direction is defined as a Y-axis direction. In the following diagrams, a direction may be expressed, in some cases, with arrows inFIG.3as references.

As illustrated inFIG.3, the first substrate101, the second substrate102, and the third substrate103have, respectively, first surfaces11S1,12S1, and13S1to be provided with transistors, and second surfaces11S2,12S2, and13S2. The first surfaces11S1,12S1, and13S1are each an element formation surface on which an element such as a transistor is formed. The first surfaces11S1,12S1, and13S1are each provided with a gate electrode, a gated oxide film, or the like.

The first surface11S1of the first substrate101is provided with a wiring layer111, as illustrated inFIG.3. The first surface12S1of the second substrate102is provided with a wiring layer121, and the second surface12S2of the second substrate102is provided with a wiring layer122. In addition, the first surface13S1of the third substrate103is provided with a wiring layer131. The wiring layers111,121,122, and131include, for example, a conductive film and an insulating film, and include a plurality of wiring lines, vias, or the like. Each of the wiring layers111,121,122, and131includes, for example, wiring lines of two or more layers. The wiring layers111,121,122, and131may each include wiring lines of three layers or four or more layers.

The wiring layers111,121,122, and131have a configuration in which, for example, the wiring lines are stacked with an interlayer insulating layer (interlayer insulating film) interposed therebetween. The wiring layer is formed using, for example, aluminum (Al), copper (Cu), tungsten (W), polysilicon (Poly-Si), or the like. The interlayer insulating layer is formed by a monolayer film including one of silicon oxide (SiO), silicon nitride (SiN), or silicon oxynitride (SiON), for example, or a stacked film including two or more thereof.

It is to be noted that the first substrate101and the wiring layer111can also be collectively referred to as the first substrate101(or a first circuit layer). In addition, the second substrate102and the wiring layers121and122can also be collectively referred to as the second substrate102(or a second circuit layer). Further, the third substrate103and the wiring layer131can also be collectively referred to as the third substrate103(or a third circuit layer).

The first substrate101and the second substrate102are stacked by bonding between electrodes to allow the first surface11S1and the first surface12S1on each of which elements such as transistors are formed to be opposed to each other. That is, the first substrate101and the second substrate102are bonded to each other to allow their respective front surfaces to be opposed to each other. This bonding method is referred to as Face to Face bonding.

The second substrate102and the third substrate103are stacked d by bonding between electrodes to allow the second surface1252and the first surface13S1on which elements such as transistors are formed to be opposed to each other. That is, the second substrate102and the third substrate103are bonded to each other to allow a back surface of the second substrate102and a front surface of the third substrate103to be opposed to each other. This bonding method is referred to as Face to Back bonding.

As an example, the first surface11S1of the first substrate101and the first surface12S1of the second substrate102are attached to each other by bonding between metal electrodes including copper (Cu), i.e., Cu-Cu bonding. In addition, the second surface1252of the second substrate102and the first surface13S1of the third substrate103are also attached to each other, for example by Cu-Cu bonding. It is to be noted that the electrode to be used for the bonding may be configured by a metal material other than copper (Cu), e.g., nickel (Ni), cobalt (Co), tin (Sn), or the like, or may be configured by another material.

In the example illustrated inFIG.3, a plurality of electrodes15configured by a fourth layer wiring line M4in the wiring layer111and a plurality of electrodes25configured by the fourth layer wiring line M4in the wiring layer121are bonded to each other, to thereby allow the first substrate101and the second substrate102to be coupled to each other. In addition, a plurality of electrodes26configured by a wiring line of the uppermost layer in the wiring layer122and a plurality of electrodes35configured by a wiring line of the uppermost layer in the wiring layer131are bonded to each other, to thereby allow the second substrate102and the third substrate103to be coupled to each other. The electrodes15,25,26, and35are each a bonding electrode.

In the imaging device1according to the present embodiment, the photodiode PD, the transfer transistor Tr1, and the floating diffusion FD described above are disposed in the first substrate101, and the readout circuit45is disposed in the second substrate102. The photodiode PD and the readout circuit45are disposed in separate substrates, thus making it possible to allow the photodiode PD to have a sufficient size, as compared with a case where the photodiode PD and the readout circuit45are disposed in the same substrate. This makes it possible to acquire an image having a wide dynamic range. It is to be noted that, in the third substrate103, for example, there are disposed the above-described row drive section220, the timing control section230, the column signal processing section250, the image signal processing section260, and the like. In addition, the input section210and the output section270described above may be disposed in the third substrate103.

As schematically illustrated inFIG.3, the floating diffusion FD of the pixel P of the first substrate101is electrically coupled to the amplification transistor Tr2, or the like of the readout circuit45of the second substrate102via the wiring line of the wiring layer111and the wiring line of the wiring layer121. Electric charge photoelectrically converted by the photodiode PD of the first substrate101is outputted to the floating diffusion FD and the readout circuit45of the second substrate102via the transfer transistor Tr1.

The imaging device1according to the present embodiment is provided with a through-via17that penetrates a plurality of layers. The through-via17is a via that penetrates some or all of layers in the wiring layer. For example, the through-via17penetrates some of the wiring lines and the interlayer insulating film in the wiring layer to couple the upper layer wiring line and the lower layer wiring line to each other. The through-via17is a coupling section, and may couple wiring lines to each other, which are distant from each other by two or more layers, for example. The imaging device1is provided with the through-via17for each of the pixels P or for every plurality of pixels P.

The through-via17is configured by, for example, tungsten (W), aluminum (Al), cobalt (Co), molybdenum (Mo), ruthenium (Ru), or the like. It is to be noted that the through-via17may be formed by another metal material.FIG.3exemplifies, as the through-via17, a first through-via17aand a second through-via17b. The first through-via17aand the second through-via17bmay be collectively referred to herein as the through-via17in some cases.

As schematically illustrated inFIG.3, the wiring layers111and121include the first through-via17aand the second through-via17b, respectively. A plurality of first through-vias17ais provided in the wiring layer111, and a plurality of second through-vias17bis provided in the wiring layer121. The first through-via17aand the second through-via17bare provided for each of the readout circuits45, for example.

The first through-via17ais a via that penetrates a plurality of layers in the wiring layer111. In the example illustrated inFIG.3, the first through-via17ais provided to penetrate layers of a second layer wiring line and a third layer wiring line among layers of first to fourth wiring lines of the wiring layer111. The first through-via17acoupled to a first layer wiring line M1of the wiring layer111is formed to extend in the Z-axis direction to reach the fourth layer wiring line M4. That is, the first through-via17acouples the first layer wiring line M1and the fourth layer wiring line M4to each other in the wiring layer111without passing through a second layer wiring line M2and a third layer wiring line M3.

The second through-via17bis a via that penetrates a plurality of layers in the wiring layer121. In the example illustrated inFIG.3, the second through-via17bis provided to penetrate layers of a second layer wiring line and a third layer wiring line among layers of first to fourth wiring lines of the wiring layer121. The second through-via17bcouples the first layer wiring line M1and the fourth layer wiring line M4to each other in the wiring layer121without passing through the second layer wiring line M2and the third layer wiring line M3. It is to be noted that first through-via17aand the second through-via17bmay each be provided to penetrate layers of wiring lines of three or more layers.

In the present embodiment, the floating diffusion FD provided in the first substrate101is electrically coupled to the readout circuit45of the second substrate102via the first through-via17a, the bonding electrodes15and25, and the second through-via17b. The first through-via17ais coupled to the electrode15without passing through some of the plurality of layers (layers of the second and third layer wiring lines inFIG.3) in the wiring layer111. It is therefore possible, in the wiring layer111, to widen (lengthen) each of an interval (distance) between the first through-via17aand the second layer wiring line M2and an interval between the first through-via17aand the third layer wiring line M3, as indicated by dotted arrows inFIG.3. It is therefore possible to reduce a wiring capacitance to be added to the floating diffusion FD electrically coupled to the first through-via17a.

In addition, the second through-via17bis coupled to the electrode25without passing through some of the plurality of layers (layers of the second and third layer wiring lines inFIG.3) in the wiring layer121. It is therefore possible, in the wiring layer121, to widen each of an interval between the second through-via17band the second layer wiring line M2and an interval between the second through-via17band the third layer wiring line M3, as indicated by dotted arrows inFIG.3. It is therefore possible to reduce a wiring capacitance to be added to the floating diffusion FD electrically coupled to the second through-via17b.

As described above, in the present embodiment, the interval between the wiring line coupling the floating diffusion FD and the readout circuit45to each other and the surrounding metal wiring line is secured. This makes it possible to reduce a capacitance to be added to the floating diffusion FD. It is therefore possible to improve conversion efficiency (conversion gain) upon conversion of electric charge into a voltage in the floating diffusion FD.

It becomes possible to suppress dispersion of wiring capacitances to be added to the floating diffusion FD, as compared with a case where the floating diffusion FD and the readout circuit45are coupled by a large number of wiring lines (e.g., eight-layer wiring lines). This makes it possible to reduce the dispersion of the conversion efficiencies, and thus to suppress degradation of the pixel signal.

It is to be noted that the imaging device1may include the through-via17electrically coupled to another circuit element of the first substrate101, e.g., a gate of the transfer transistor Tr1to transmit the signal TRG. In addition, the imaging device1may include the through-via17electrically coupled to another circuit element of the second substrate102, e.g., a gate of the selection transistor Tr3or a gate of the reset transistor Tr4.

FIG.4is a diagram illustrating an example of a cross-sectional configuration of the imaging device according to an embodiment of the present disclosure. The imaging device1includes a lens section31that condenses light, and a color filter32. The color filter32and the lens section31are sequentially stacked on the first substrate101. The color filter32and the lens section31are provided for each of the pixels P, for example.

The lens section31guides light incident from above to a side of the photodiode PD inFIG.4. The lens section31is an optical member also referred to as an on-chip lens. The color filter32selectively transmits light of a specific wavelength region of incident light. Light transmitted through the lens section31and the color filter32is incident on the photodiode PD. The photodiode PD photoelectrically converts the incident light to generate electric charge.

In the example illustrated inFIG.4, a pad80is provided on a side of the second surface11S2of the first substrate101. In the first substrate101, an opening on the pad80is formed, and the pad80is exposed to the outside. The pad80is, for example, an electrode formed using aluminum (Al). It is to be noted that pad80may be configured using another metal material. A plurality of pads80is disposed in the imaging device1. The pad80may supply, for example, the power supply voltage VDD (or a ground voltage VSS) inputted from the outside to respective circuits of the first substrate101to the third substrate103.

In addition, the imaging device1is provided with a through-electrode28, as illustrated inFIG.4. The through-electrode28is an electrode that penetrates the second substrate102. The through-electrode28extends in the Z-axis direction, and is formed to reach the wiring layer122of the second substrate102. The through-electrode28is able to couple a circuit provided on a side of the first surface12S1of the second substrate102and a circuit provided on a side of the second surface12S2of the second substrate102to each other. The through-electrode28couples circuits provided in different layers to each other. The through-electrode28is configured by, for example, tungsten (W), aluminum (Al), cobalt (Co), molybdenum (Mo), ruthenium (Ru), or the like. It is to be noted that the through-electrode28may be formed by another metal material.

For example, a plurality of through-electrodes28is disposed in the peripheral region of the pixel array section240. The readout circuit45provided in the second substrate102is electrically coupled to circuits of the third substrate103and the wiring layer131via the wiring layer121, the through-electrode28, and the wiring layer122. The readout circuit45is electrically coupled by the plurality of through-electrodes28to, for example, a circuit that controls the readout circuit45and a circuit that processes a pixel signal outputted from the readout circuit45. For example, the readout circuit45is coupled to the row drive section220and the column signal processing section250described above via the through-electrodes28different from each other.

The plurality of through-electrodes28provided in the imaging device1includes, for example, a through-electrode, or the like, that transmits a pixel signal and signals (the signal SEL, the signal RST, etc. described above) to control the transistors of the readout circuit45. In addition, the through-electrode28coupled to a power supply line to supply the power supply voltage VDD, the through-electrode28coupled to a grounding wire to supply the ground voltage VSS, or the like may be disposed.

As illustrated inFIG.4, the floating diffusion FD and the amplification transistor Tr2, or the like of the readout circuit45are electrically coupled to each other via the first through-via17aand the second through-via17b. Electric charge photoelectrically converted in the photodiode PD is transferred by the transfer transistor Tr1to the floating diffusion FD, the first through-via17a, and the second through-via17b. The amplification transistor Tr2generates a pixel signal corresponding to a voltage having been subjected to electric charge-voltage conversion in the floating diffusion FD. Pixel signals outputted by the amplification transistor Tr2and the selection transistor Tr3of the readout circuit45are transmitted to the column signal processing section250of the third substrate103, for example.

In the example illustrated inFIG.4, the color filter32that transmits green (G) light is provided on the photodiode PD of the pixel P on the left side of the right and left pixels P in the pixel sharing unit40. The photodiode PD of the pixel P on the left side receives light of a green wavelength region to perform photoelectric conversion. The color filter32that transmits red (R) light is provided on the photodiode PD of the pixel P on the right side of the right and left pixels P in the pixel sharing unit40. The photodiode PD of the pixel P on the right side receives light of a red wavelength region to perform photoelectric conversion. It is to be noted that the photodiode PD disposed below the color filter32that transmits blue (B) light receives light of a blue wavelength region to perform photoelectric conversion. It is therefore possible for the respective pixels P of the imaging device1to generate a pixel signal of an R component, a pixel signal of a G component, and a pixel signal of a B component. It becomes possible for the imaging device1to obtain pixel signals of RGB.

It is to be noted that the color filter32is not limited to the color filter of the primary color system (RGB) but may be a color filter of a complementary color system such as Cy (cyan), Mg (magenta), or Ye (yellow). In addition, a color filter corresponding to W (white), i.e., a filter that transmits light of all wavelength regions of incident light may be disposed.

FIGS.5A to5Gare each a diagram illustrating an example of a manufacturing method of the imaging device according to an embodiment of the present disclosure. First, as illustrated inFIG.5A, various elements such as the photodiode PD and the transfer transistor Tr1are formed in the first substrate101. The transfer transistor Tr1, the floating diffusion FD, and the like are provided on a side of the first surface11S1of the first substrate101. In addition, the wiring layer111is formed on the first surface11S1of the first substrate101.

In this case, for example, an insulating film such as a silicone oxide film (SiO2) is formed as an interlayer insulating layer (interlayer insulating film) in each of a lower layer part51and an upper layer part53of the wiring layer111. In a middle layer part52of the wiring layer111, for example, an insulating film having a permittivity lower than that of the silicone oxide film is formed as an interlayer insulating layer in order to reduce the wiring capacitance. The interlayer insulating layer of the middle layer part52may be configured by SiOC, SiOCH, or the like which is a low permittivity material (Low-k material). The interlayer insulating layer of the middle layer part52may be configured by a silicone oxide film. The middle layer part52is provided with a wiring line configured by a conductor, e.g., a wiring line configured by copper (Cu) and tantalum (Ta) which is a barrier metal. It is to be noted that other wiring layers (wiring layers121,122,131, etc.) may also be formed by stacking layers (e.g., the upper layer part and the lower layer part) including a silicon oxide film as the interlayer insulating layer and a layer (e.g., the middle layer part) including a low permittivity material as the interlayer insulating layer, in the same manner as the case of the wiring layer111.

Various elements including the transistors of the readout circuit45are formed in the second substrate102illustrated inFIG.5B. The amplification transistor Tr2, the selection transistor Tr3, the reset transistor Tr4, and the like are provided on the side of the first surface12S1of the second substrate102. In addition, the wiring layer121is formed on the first surface12S1of the second substrate102.

Various elements constituting the row drive section220, the column signal processing section250, the image signal processing section260, and the like described above are formed in the third substrate103illustrated inFIG.5C. For example, a transistor of the row drive section220, a transistor of the column signal processing section250, a transistor of the image signal processing section260, and the like are provided on a side of the first surface13S1of the third substrate103. In addition, the wiring layer131including the electrode35that serves as a terminal for Cu—Cu coupling is formed on the first surface13S1of the third substrate103.

As illustrated inFIG.5D, the plurality of first through-vias17a, the electrode15that serve as a terminal for Cu—Cu coupling, and the like are formed in the wiring layer111. The electrode15is disposed on a surface of the wiring layer111. In addition, as illustrated inFIG.5E, the plurality of second through-vias17b, the electrode25that serve as a terminal for Cu—Cu coupling, and the like are formed in the wiring layer121. The electrode25is disposed on a surface of the wiring layer121.

Next, as illustrated inFIG.5F, the first substrate101and the second substrate102are Cu—Cu bonded by the plurality of electrodes15and the plurality of electrodes25to allow the first surface11S1and the first surface12S1to be opposed to each other. That is, respective surfaces of the first substrate101and the second substrate102are bonded to each other. Thereafter, a thickness of the second substrate102is reduced. As an example, the thickness of the second substrate102is set to 3 m or less, e.g., 0.5 μm.

Next, an insulating film (e.g., silicon oxide film) is first formed on the second surface12S2of the second substrate102, and then the insulating film and the second substrate102are partially etched (e.g., reactive ion etching) to form a hole for the through-electrode. It is to be noted that the hole for through-electrode may be formed in advance in the second substrate102and the wiring layer121before bonding the first substrate101and the second substrate102to each other. Then, an insulating film (e.g., silicone oxide film) is formed on an inner wall of the hole for the through-electrode. Further, etching is performed to allow a bottom surface of the hole for the through-electrode to reach the wiring layer121, and the first layer wiring line M1of the wiring layer121is exposed by the hole for the through-electrode.

Thereafter, a low-resistance electrically-conductive material including Cu or Al is used to fill the hole for the through-electrode, thus forming the through-electrode28. Them, an extra metal film at the upper part of the through-electrode28is removed by CMP or etching. Further, the wiring layer122including a wiring line to be coupled to the through-electrode28and the electrode26that serves as a terminal for Cu—Cu coupling is formed on the side of the second surface12S2of the second substrate102; this state is illustrated inFIG.5F.

Next, as illustrated inFIG.5G, the second substrate102and the third substrate103are then Cu—Cu bonded by the plurality of electrodes26and the plurality of electrodes35to allow the second surface12S2and the first surface13S1to be opposed to each other. Thereafter, a thickness of the first substrate101is reduced. As an example, the thickness of the first substrate101is set to 4 m. Thereafter, the color filter32and the lens section31are sequentially formed on the side of the second surface11S2of the first substrate101. Further, an opening is formed by dry etching in the peripheral region of the pixel array section240, of a region on the side of the second surface11S2of the first substrate101, and the pad80is provided. The above-described manufacturing method enables the imaging device1illustrated inFIG.4to be manufactured. In addition, it is to be noted that the above-described manufacturing method is merely exemplary and another manufacturing method may be adopted.

The light-receiving device (the imaging device1) according to the present embodiment includes: the first substrate101including a plurality of photoelectric conversion sections (the photodiodes PD) that photoelectrically converts light and an accumulation section (the floating diffusion FD) that accumulates electric charge photoelectrically converted by the photoelectric conversion sections; the second substrate102stacked on the first substrate and including the readout circuit45that outputs a first signal (the pixel signal) based on electric charge accumulated in the accumulation section; and a wiring layer (the wiring layers111and121) including a via (the through-via17) that electrically couples the accumulation section and the readout circuit to each other. The first substrate and the second substrate are stacked to allow a first surface of the first substrate (the first surface11S1of the first substrate101) on which an element is formed and a second surface of the second substrate (the first surface12S1of the second substrate102) on which an element is formed to be opposed to each other. The via (the through-via17) penetrates a plurality of layers in the wiring layer.

In the imaging device1according to the present embodiment, the floating diffusion FD and the readout circuit45are electrically coupled to each other by the through-via17that penetrates a plurality of layers in the wiring layers111and121. It is therefore possible to reduce a capacitance to be added to the floating diffusion FD. It becomes possible to improve the conversion efficiency (conversion gain) upon conversion of electric charge into a voltage in the floating diffusion FD.

Next, description is given of modification examples of the present disclosure. Hereinafter, components similar to those of the foregoing embodiment are denoted by the same reference numerals, and description thereof are omitted as appropriate.

2. Modification Examples

The description has been given, in the foregoing embodiment, of the example in which the through-via17is provided that couples wiring lines of different layers in the wiring layer. However, the through-via17may be directly coupled to the semiconductor substrate (e.g., the first substrate101or the second substrate102). The first through-via17ato be directly coupled to the circuit element (e.g., the floating diffusion FD, the transfer transistor Tr1, etc.) of the first substrate101may be provided. In addition, the second through-via17bto be directly coupled to the circuit element (e.g., a transistor of the readout circuit45) of the second substrate102may be provided.

FIG.6is a diagram illustrating an example of a cross-sectional configuration of an imaging device according to Modification Example 1. The first through-via17ais disposed that couples the bonding electrode15and the floating diffusion FD to each other. In the example illustrated inFIG.6, the first through-via17ais directly coupled to the floating diffusion FD as an accumulation section without passing through the first layer to fourth layer wiring lines in the wiring layer111. In addition, the second through-via17bis disposed that couples the coupling electrode25and the amplification transistor Tr2of the readout circuit45to each other. In the example illustrated inFIG.6, the second through-via17bis directly coupled to the amplification transistor Tr2without passing through the first layer to fourth layer wiring lines in the wiring layer121. It is also possible, in the case of the present modification example, to reduce a capacitance to be added to the floating diffusion FD, and thus to improve the conversion efficiency.

The imaging device1may include a protective film around the through-via17. The protective film may be formed to coat the through-via17in the wiring layer.FIG.7is a diagram illustrating an example of a cross-sectional configuration of an imaging device according to Modification Example 2. In the example illustrated inFIG.7, a protective film29is provided to cover a periphery of the first through-via17a, in the wiring layer111. In addition, the protective film29is provided to cover a periphery of the second through-via17b, in the wiring layer121. The protective film29includes silicon and at least one of oxygen, nitrogen, or carbon. For example, the protective film29may be configured by a silicone oxide film.

In the present modification example, providing the protective film29between the through-via17and the insulating film of the wiring layer, e.g., the insulating film configured by a low permittivity material makes it possible to suppress the entry of a metal material used for the through-via17into the wiring layer. This makes it possible to prevent an increase in the capacitance to be added to the circuit part coupled to the through-via17(e.g., the floating diffusion FD) as well as to prevent the through-via17from being shorted (short-circuited) with another wiring line, or the like. It is to be noted that, also in the case of the present modification example, the first through-via17amay be directly coupled to the circuit element of the first substrate101, and the second through-via17bmay be directly coupled to the circuit element of the second substrate102, as illustrated inFIG.8.

In the foregoing embodiment, the configuration example of the imaging device1has been described, but is merely exemplary; the configuration of the imaging device1is not limited to the above-described example. The bonding between the through-via and the bonding electrode may be utilized to couple a plurality of substrates to each other. For example, bonding between a plurality of through-vias and a plurality of bonding electrodes allows the first substrate101and the second substrate102to be coupled to each other.

FIG.9is a diagram illustrating an example of a cross-sectional configuration of an imaging device according to Modification Example 3.FIG.9schematically illustrates a cross-sectional configuration example of a portion of the imaging device1. As illustrated inFIG.9, the second through-via17bmay be coupled to the electrode15as the bonding electrode. The first substrate101and the second substrate102are stacked by bonding between the second through-via17band the electrode15. The first substrate101and the second substrate102of the imaging device1have a bonding surface between the second through-via17band the electrode15.

In the example illustrated inFIG.9, the second through-via17bis coupled to the electrode15of the wiring layer111without passing through the second layer to fourth layer wiring lines in the wiring layer121. In a direction orthogonal to the stacking direction of the first substrate101and the second substrate102(Z-axis direction inFIG.9), a width (area) of the second through-via17bis smaller than a width of the electrode15as the bonding electrode.

In the imaging device1, the floating diffusion FD provided in the first substrate101is electrically coupled to the readout circuit45of the second substrate102via the bonding electrode15on a side of the first substrate101and the second through-via17b. It is possible to reduce a capacitance to be added to the floating diffusion FD, as compared with the case where the floating diffusion FD and the readout circuit45are coupled to each other using the two bonding electrodes on the side of the first substrate101and a side of the second substrate102. It is therefore possible to improve the conversion efficiency. In addition, it is possible to suppress occurrence of a decrease in a withstand voltage between wiring lines of the imaging device1and degradation in the characteristics of the imaging device1.

FIGS.10A to10Fare each an explanatory diagram of an example of a manufacturing method of the imaging device according to Modification Example 3. As illustrated inFIG.10A, the wiring layer111is formed on the first surface11S1of the first substrate101. In addition, as illustrated inFIG.10B, the first through-via17ais formed in the wiring layer111. Then, as illustrated inFIG.10C, the electrode15as the bonding electrode is formed in the wiring layer111.

As illustrated inFIG.10D, the wiring layer121is formed on the first surface12S1of the second substrate102. In addition, as illustrated inFIG.10E, the second through-via17bis formed in the wiring layer121. Then, as illustrated inFIG.10F, the first substrate101and the second substrate102are bonded to each other by the plurality of electrodes15and the plurality of second through-vias17bto allow the first surface11S1and first surface12S1to be opposed to each other. The above-described manufacturing method enables the imaging device1having the structure illustrated inFIG.9to be manufactured. It is to be noted that the above-described manufacturing method is merely exemplary, and another manufacturing method may be adopted.

FIGS.11to13are each a diagram illustrating another example of the cross-sectional configuration of the imaging device according to Modification Example 3. As schematically illustrated inFIG.11, the first through-via17amay be directly coupled to the circuit element of the first substrate101, and the second through-via17bmay be directly coupled to the circuit element of the second substrate102. In the example illustrated inFIG.11, the second through-via17bis coupled to the electrode15of the wiring layer111without passing through the first layer to fourth layer wiring lines in the wiring layer121.

As in the example illustrated inFIG.12, the first through-via17amay be coupled to the electrode25as the bonding electrode. The first substrate101and the second substrate102are stacked by bonding between the first through-via17aand the electrode25. The first substrate101and the second substrate102of the imaging device1have a bonding surface between the first through-via17aand the electrode25.

In the example illustrated inFIG.12, the first through-via17ais coupled to the electrode25of the wiring layer121without passing through the second layer to fourth layer wiring lines in the wiring layer111. In a direction orthogonal to the stacking direction of the first substrate101and the second substrate102(Z-axis direction inFIG.9), a width (area) of the first through-via17ais smaller than a width of the electrode25as the bonding electrode.

It is to be noted that, as illustrated inFIG.13, the first through-via17amay be directly coupled to the circuit element of the first substrate101, and the second through-via17bmay be directly coupled to the circuit element of the second substrate102. In the example illustrated inFIG.13, the first through-via17ais coupled to the electrode25of the wiring layer121without passing through the first layer to fourth layer wiring lines in the wiring layer111.

FIG.14is a diagram illustrating an example of a cross-sectional configuration of an imaging device according to Modification Example 4. Bonding between through-vias may be utilized to couple a plurality of substrates to each other. For example, the first through-via17amay be directly coupled to the second through-via17b. Bonding between the plurality of first through-vias17aof the first substrate101and the plurality of second through-vias17bof the second substrate102allows the first substrate101and the second substrate102to be coupled to each other.

As illustrated inFIG.14, the first substrate101and the second substrate102are stacked by bonding between the first through-via17aand the second through-via17b. The first substrate101and the second substrate102of the imaging device1have a bonding surface between the first through-via17aand the second through-via17b.

In the example illustrated inFIG.14, the first through-via17ais coupled to the second through-via17bof the wiring layer121without passing through the second layer to fourth layer wiring lines in the wiring layer111. The second through-via17bis coupled to the first through-via17aof the wiring layer111without passing through the second layer to fourth layer wiring lines in the wiring layer121.

In the imaging device1, the floating diffusion FD provided in the first substrate101is electrically coupled to the readout circuit45of the second substrate102by the first through-via17aand the second through-via17b. It is therefore possible to reduce a capacitance to be added to the floating diffusion FD.

In the imaging device1according to the present modification example, it is possible to secure a space between wiring lines, as compared with the case where the plurality of wiring lines and the plurality of bonding electrodes are used to couple the floating diffusion FD and the readout circuit45to each other. It is therefore possible to effectively reduce a capacitance to be added to the floating diffusion FD, and thus to improve the conversion efficiency. In addition, it is possible to suppress occurrence of a decrease in a withstand voltage between wiring lines of the imaging device1and degradation in the characteristics of the imaging device1.

FIG.15is a diagram illustrating another example of the cross-sectional configuration of the imaging device according to Modification Example 4. As schematically illustrated inFIG.15, the first through-via17amay be directly coupled to the circuit element of the first substrate101, and the second through-via17bmay be directly coupled to the circuit element of the second substrate102. In the example illustrated inFIG.15, the first through-via17aand the second through-via17bare coupled to each other without passing through the first layer to fourth layer wiring lines in the wiring layer111and the wiring layer121.

The description has been given, in the foregoing embodiment, of the example in which three-dimensional coupling is achieved by bonding between electrodes (e.g., Cu—Cu bonding). However, as the form of the coupling between the substrates, any of Wafer on Wafer (wafer-on-wafer), Die to wafer (die-to-wafer), and Die to die (die-to-die) may be adopted.

The description has been given above of the example in which the back surface of the second substrate102and the front surface of the third substrate103are bonded to each other; however, the back surface of the second substrate102and the back surface of the third substrate103may be bonded to each other. It is to be noted that the third substrate103including the row drive section220, the column signal processing section250, the image signal processing section260, and the like may be three-dimensionally bonded or coupled to a substrate different from the second substrate102.

3. Application Example

The above-described imaging device1or the like is applicable, for example, to any type of electronic apparatus with an imaging function including a camera system such as a digital still camera or a video camera, a mobile phone having an imaging function, and the like.FIG.9illustrates a schematic configuration of an electronic apparatus1000.

The electronic apparatus1000includes, for example, a lens group1001, the imaging device1, a DSP (Digital Signal Processor) circuit1002, a frame memory1003, a display unit1004, a recording unit1005, an operation unit1006, and a power supply unit1007. They are coupled to each other via a bus line1008.

The lens group1001takes in incident light (image light) from a subject, and forms an image on an imaging surface of the imaging device1. The imaging device1converts the amount of incident light formed as an image on the imaging surface by the lens group1001into electric signals on a pixel-by-pixel basis, and supplies the DSP circuit1002with the electric signals as pixel signals.

The DSP circuit1002is a signal processing circuit that processes signals supplied from the imaging device1. The DSP circuit1002outputs image data obtained by processing the signals from the imaging device1. The frame memory1003temporarily holds the image data processed by the DSP circuit1002on a frame-by-frame basis.

The display unit1004includes, for example, a panel-type display device such as a liquid crystal panel or an organic EL (Electro Luminescence) panel, and records image data of a moving image or a still image captured by the imaging device1in a recording medium such as a semiconductor memory or a hard disk.

The operation unit1006outputs an operation signal for a variety of functions of the electronic apparatus1000in accordance with an operation by a user. The power supply unit1007appropriately supplies the DSP circuit1002, the frame memory1003, the display unit1004, the recording unit1005, and the operation unit1006with various kinds of power for operations of these supply targets.

4. Practical Application Examples

(Example of Practical Application to Mobile Body)

The technology (the present technology) according to the present disclosure is applicable to a variety of products. For example, the technology according to the present disclosure may be achieved as a device mounted on any type of mobile body such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility, an aircraft, a drone, a vessel, or a robot.

The description has been given hereinabove of the mobile body control system to which the technology according to an embodiment of the present disclosure is applicable. The technology according to an embodiment of the present disclosure is applicable to the imaging section12031, for example, of the configurations described above. Specifically, for example, the imaging device1can be applied to the imaging section12031. Applying the technology according to an embodiment of the present disclosure to the imaging section12031enables obtainment of a high-definition photographed image, thus making it possible to perform highly accurate control utilizing the photographed image in the mobile body control system. (Example of Practical Application to Endoscopic Surgery System)

The technology according to an embodiment of the present disclosure (present technology) is applicable to various products. For example, the technology according to an embodiment of the present disclosure may be applied to an endoscopic surgery system.

FIG.13is a block diagram depicting an example of a functional configuration of the camera head11102and the CCU11201depicted inFIG.12.

The description has been given hereinabove of one example of the endoscopic surgery system, to which the technology according to an embodiment of the present disclosure is applicable. The technology according to an embodiment of the present disclosure is suitably applicable to, for example, the image pickup unit11402provided in the camera head11102of the endoscope11100of the configurations described above. Applying the technology according to an embodiment of the present disclosure to the image pickup unit11402enables the image pickup unit11402to have high sensitivity, thus making it possible to provide the endoscope11100having high definition.

Although the description has been given hereinabove of the present disclosure with reference to the embodiment, the modification examples, the application example, and the practical application examples, the present technology is not limited to the foregoing embodiment and the like, and may be modified in a wide variety of ways. For example, although the foregoing modification examples have been described as modification examples of the foregoing embodiment, the configurations of the respective modification examples may be combined as appropriate.

In addition, the light-receiving device of the present disclosure may be in the form of a module in which an imaging section and a signal processing section or an optical system are packaged as a whole.

Further, the description has been given, in the foregoing embodiment and the like, by exemplifying the imaging device that converts the amount of incident light formed as an image on an imaging surface via the optical lens system into electric signals on a pixel-by-pixel basis and outputs the electric signals as pixel signals. However, the light-receiving device of the present disclosure is not limited to such an imaging device. For example, it is sufficient for the light-receiving device of the present disclosure to be one that receives incident light and converts the light into electric charge. A signal to be outputted may be a signal of image information or a signal of distance measurement information.

In the light-receiving device of an embodiment of the present disclosure, a first substrate including a photoelectric conversion section and an accumulation section and a second substrate including a readout circuit are stacked to allow a surface of the first substrate on which an element is formed and a surface of the second substrate on which an element is formed to be opposed to each other. The light-receiving device is provided with a via that penetrates a plurality of layers in a wiring layer to electrically couple the accumulation section and the readout circuit to each other. It is therefore possible to reduce a capacitance to be added to the accumulation section, and thus to improve the conversion efficiency.

It is to be noted that the effects described herein are merely exemplary and are not limited to the description, and may further include other effects. In addition, the present disclosure may also have the following configurations.

A light-receiving device including:a first substrate including a plurality of photoelectric conversion sections that photoelectrically converts light and an accumulation section that accumulates electric charge photoelectrically converted by the photoelectric conversion sections;a second substrate stacked on the first substrate, the second substrate including a readout circuit that outputs a first signal based on the electric charge accumulated in the accumulation section; anda wiring layer including a via that electrically couples the accumulation section and the readout circuit to each other, in whichthe first substrate and the second substrate are stacked to allow a first surface of the first substrate on which an element is formed and a second surface of the second substrate on which an element is formed to be opposed to each other, andthe via penetrates a plurality of layers in the wiring layer.
(2)

The light-receiving device according to (1), in whichthe first substrate and the second substrate are stacked by bonding between electrodes, andthe via is directly coupled to the bonded electrodes.
(3)

The light-receiving device according to (1) or (2), in which the via is directly coupled to the first substrate.

The light-receiving device according to (3), in which the via is directly coupled to the accumulation section of the first substrate.

The light-receiving device according to (1) or (2), in which the via is directly coupled to the second substrate.

The light-receiving device according to (5), in which the via is directly coupled to a gate of a transistor provided in the second substrate.

The light-receiving device according to (6), in which the transistor includes a transistor of the readout circuit.

The light-receiving device according to (1), in whichthe readout circuit includes an amplification transistor that generates the first signal, andthe via is electrically coupled to a gate of the amplification transistor.
(9)

The light-receiving device according to (8), in which the via is directly coupled to the gate of the amplification transistor.

The light-receiving device according to any one of (1) to (9), in which the via includes tungsten, cobalt, ruthenium, copper, molybdenum, or aluminum.

The light-receiving device according to any one of (1) to (10), in whichthe wiring layer includes an insulating film having a permittivity lower than a permittivity of a silicone oxide film, andthe via penetrates the insulating film.
(12)

The light-receiving device according to (11), including a protective film provided between the via and the insulating film.

The light-receiving device according to (12), in which the protective film includes silicon and at least one of oxygen, nitrogen, or carbon.

The light-receiving device according to any one of (1) to (13), in which the first substrate and the second substrate are stacked by bonding between the via and an electrode.

The light-receiving device according to (14), in which a width of the via is smaller than a width of the electrode in a direction orthogonal to a stacking direction of the first substrate and the second substrate.

The light-receiving device according to any one of (1) to (15), in whichthe wiring layer includes a first wiring layer provided on a side of the first surface of the first substrate and a second wiring layer provided on a side of the second surface of the second substrate, andthe via includes a first via provided in the first wiring layer and being electrically coupled to the accumulation section and a second via provided in the second wiring layer and electrically coupling the first via and the readout circuit to each other.
(17)

The light-receiving device according to (16), in whichthe first via penetrates a plurality of layers in the first wiring layer, andthe second via penetrates a plurality of layers in the second wiring layer.
(18)

The light-receiving device according to (16) or (17), in which the second via is directly coupled to the first via.

The light-receiving device according to any one of (16) to (18), in which the first substrate and the second substrate are stacked by bonding between the first via and the second via.

The present application claims the benefit of Japanese Priority Patent Application JP2021-201271 filed with the Japan Patent Office on Dec. 10, 2021, the entire contents of which are incorporated herein by reference.