Adaptive frequency jitter for controller

In order to convert an input power to one or more DC power levels that are provided to an output load, some aspects of the present disclosure relate to techniques for driving a switching regulator as a function of a pulsed voltage signal. In particular, this pulsed voltage signal is provided substantially at a target frequency, but exhibits frequency jitter that causes the pulsed voltage to vary slightly from the target frequency in time. The frequency jitter has a frequency range that varies as a function of the output load.

BACKGROUND

Electromagnetic interference (EMI), which may also be called radio frequency interference (RFI) in some instances, is a disturbance that affects an electrical circuit due to undesired electromagnetic conduction or electromagnetic radiation. For example, if an electrical circuit in a printer processes 850 kHz signals and nearby wireless transmitter transmits a competing 850 kHz wireless signal, the printer may experience significant signal degradation and possibly make printing mistakes because the wireless transmitter generates EMI that interferes with the printer's own internal signal processing.

To keep EMI within manageable levels, the Federal Communications Commission (FCC) in the United States and other regulatory agencies around the globe have promulgated regulations to establish acceptable EMI levels for electronic devices. Generally speaking, such regulations setup different classes of electronics devices, and assign a maximum EMI level that can be produced by devices within each class. In this way, consumers and businesses can have confidence that their electronic devices should function adequately without being concerned about interference from other devices.

One particularly problematic source of EMI is power supplies for electronic devices. These power supplies often convert power in one format to another format. For example, because some laptop computers include integrated circuits designed to operate on a DC voltage at 19.5 V (and because typical residential and commercial power outlets deliver an AC voltage at 60 Hz and 120 V); laptops often come with a power adapter that converts the AC voltage to a 19.5 V DC voltage, which is suitable for powering the laptop.

In many implementations, these power supplies include one or more switching elements that operate according to a pulse width modulated control signal, thereby maintaining an output power required for a given electronic device. However, because pulse width modulated switches operate at a relatively high frequency compared to the frequency of AC voltage, they can generate a high frequency signal that can cause conductive or radiative EMI problems. With regards to conductive EMI, the high frequency signals can be injected back into the AC mains and become an undesirable component of the AC mains signal. With regards to radiative EMI, the high frequency signals can also be radiated by the power supply as electromagnetic waves. In either case, the EMI generated by the power supply can cause problems for communications devices in the vicinity of the power supply.

Because power supplies generate a major component of the EMI for electronic devices, an important step in designing a power supply is limiting the EMI provided by the power supply to levels with the acceptable limits of the various standards. Therefore, the inventors have devised power supplies that exhibit favorable EMI characteristics while at the same time delivering power to an electronics device in a suitable manner.

DETAILED DESCRIPTION

In order to convert an input power to one or more DC power levels that are provided to an output load, some aspects of the present disclosure relate to techniques for driving a switching regulator as a function of a pulsed voltage signal. In particular, this pulsed voltage signal is provided substantially at a target frequency, but exhibits frequency jitter that causes the actual frequency of the pulsed voltage signal to vary from the target frequency in time. The frequency jitter has a frequency range that varies as a function of the output load. By “smoothing” out the frequency of the pulsed voltage signal over different jitter frequency ranges (instead of continuously “spiking” the pulsed voltage signal at precisely the target frequency), the adaptive frequency jitter techniques can “smooth” out EMI over the jitter frequency ranges and thereby limit the power emanated at the target frequency. This can provide a good blend of power conversion functionality and EMI characteristics.

For example, consider an instance where a power converter converts a 120 V AC signal from a residential power outlet to a 19.5 V DC signal suitable for driving a load comprising a laser printer. If the laser printer exhibits a first load condition (e.g., the printer is waiting to receive data and not yet printing), a pulsed voltage signal is delivered substantially at a target frequency, albeit with a first jitter frequency range, to provide the desired 19.5 V DC signal. By contrast, if the laser printer subsequently exhibits a second load condition (e.g., the printer is performing a print operation by driving various motors and extracting ink from a toner cartridge using a high voltage), the pulsed voltage signal is still delivered substantially at the target frequency to provide the desired 19.5 V DC signal, but the pulsed voltage signal now exhibits a second jitter frequency range that differs from the first frequency range. By dynamically adjusting the jitter frequency range to account for different load conditions, the techniques disclosed herein can provide a good blend of power conversion functionality while concurrently maintaining acceptable EMI levels.

FIG. 1shows one manner in which jitter frequency range of a pulsed voltage signal can vary as a function of load. For relatively small loads102that are less than a threshold load level104, the jitter frequency range has a first value106. However, as the load is increased beyond the threshold load level at108, the jitter frequency range starts to decrease. In the illustrated example, the jitter frequency range decreases linearly as the load is increased beyond the threshold value104. However, in other embodiments the jitter frequency range could decrease according to other relations (e.g., quadratic, exponential, non-linear, periodic). Again, by dynamically adjusting the jitter frequency range to adjust for different load conditions, the techniques disclosed herein can provide a good blend of power conversion functionality while at the same time maintaining acceptable EMI levels. More particular implementations are now discussed with regards to the remaining figures.

FIG. 2shows a power converter200that makes use of adaptive frequency jitter in accordance with some embodiments. The power converter200includes an input terminal202and an output terminal204. A DC supply signal (VDC IN) is provided to the input terminal202, from which the power converter200provides a DC output signal (VDC OUT) to the output terminal204and a load206coupled thereto. For example, in one embodiment, the DC supply signal could be derived from an AC input signal (e.g., having a voltage of 120V at frequency of 60 HZ), and could be used to provide a DC output signal having a substantially constant voltage (e.g., a DC voltage of about 19.5 V suitable for a printer, laptop, or other electronics device). It will be appreciated that although the term “DC” implies a substantially constant voltage level, “DC” can also include small AC variations that vary about the DC voltage level. For example, as is appreciated by one of ordinary skill in the art, a 5.0 V DC voltage is a voltage that is at least substantially centered around 5.0V. However, due to signal processing, power demands, etc., a 5.0 V DC voltage may actually deviate in time somewhat from 5.0 V.

Structurally speaking, the input terminal202and output terminal204are disposed about opposing sides of a switching regulator208, which includes a power transformer210and a switching element212. The power transformer210includes inductively coupled conductors, typically in the form of a pair of coils214,216that are wound around a core218. The switching element212is coupled to a first coil214of the power transformer210, and driven by control logic220such that the transformer210facilitates generation of a desired DC voltage on the output terminal204.

Typically, when the switching element212is turned on, energy is stored in the first coil214of the transformer210. The transformer210is arranged with respect to a diode222so there is little or no energy transferred to the load206while the switching element212is on. When the switching element212is turned off, the polarity of the transformer windings reverses due to a collapsing magnetic field in the transformer. This causes the diode222to conduct, thereby transferring the energy stored in the core to the load206. This energy transfer to the load206continues until the transformer is depleted of energy or until the switching element212is once again turned on to reenergize the transformer.

Depending on the implementation, the power converter200can operate in either discontinuous mode or continuous mode. In the discontinuous mode, the energy stored when the switching element212is on/off is completely emptied from the core during the flyback period. In continuous mode, the switching element212is turned on before the core empties of flyback energy. In either case, control logic220can turn the switching element212on/off according to a target frequency suitable for providing a desired DC power to the output terminal204.

To regulate the target frequency at which the switching element212is driven (and thereby regulate the output DC power), a first feedback loop224is included in the power converter200. This feedback loop224compensates for changes in the load206coupled to the output terminal.

As shown, control logic220uses a feedback signal (VFB) from the feedback loop224to provide a time-varying gate voltage (VGate), which drives the switching element212to provide a stable DC voltage at the output terminal.

The illustrated control logic220includes a comparator226, a modulator228, an oscillator230, and a gate driver232. Briefly, the comparator226compares the feedback voltage (VFB) to a reference DC signal (VREF DC), thereby providing an error signal (VERROR). The modulator228provides an oscillating current signal (IOSC) based on the error signal (VERROR). The oscillator230, in turn, provides a pulsed voltage signal (Vpulse) based on IOSC. The pulsed voltage signal (Vpulse) includes a frequency jitter that has a frequency range that varies as a function of output load condition. Based on the pulsed voltage signal (Vpulse), the gate driver232delivers the gate voltage (VGate) to the switching element212, thereby regulating the power through the transformer210to provide the desired DC voltage at the output terminal.

FIG. 3shows some sample waveforms in accordance with some implementations. It will be appreciated that these waveforms are merely one non-limiting example of signals that could be used, and other waveforms also fall within the scope of the present disclosure.

The illustrated waveforms include oscillating current signals300(e.g., IOSCfromFIG. 2); pulsed voltage signals302(e.g., VpulsefromFIG. 2), and frequencies304at which the pulsed voltage signals are provided. Notably, two different waveforms are provided for each signal—one of which (solid line) corresponds to a relatively small load (e.g., less than or equal to threshold load level104inFIG. 1) and the other of which (dashed line) corresponds to a relatively large load (e.g., greater than threshold load level104inFIG. 1).

As shown by waveforms304, the illustrated pulsed voltage signals302are provided substantially at a target frequency306. However, the illustrated pulsed voltage signals302exhibit frequency jitter that causes the frequency of the pulsed voltage signal to vary slightly from the target frequency306. The frequency jitter has a frequency range that varies as a function of the output load condition. For example, for the relatively small load, the frequency of the pulsed voltage signal308has a first jitter frequency range310. In contrast, for the relatively large load, the frequency of the pulsed voltage signal312has a second jitter frequency range314.

Thus, consider an example where the target frequency306is about 100 kHz. For a relatively small load (e.g., load in low-power mode), the jitter frequency range310could be about 15% of the target frequency (e.g., the jitter frequency range310could be about 15 kHZ). On the other hand, for a relatively large load (e.g. load experiencing power surge), the jitter frequency range314could be about 4% of the target frequency (e.g., the jitter frequency range314could be about 4 kHz). By providing a relatively wide adaptive jitter frequency range, the techniques disclosed herein can help “smooth” out EMI over the jitter frequency range as a function of load, thereby helping to provide good EMI characteristics.

FIG. 4shows another embodiment of a power converter400in accordance with some aspects of this disclosure. In this embodiment, a modulator402(e.g., modulator228inFIG. 2) comprises a triangle wave generator404and a comparator406that supply a time-varying gate voltage to a switching element408. To control the amount of current IOSCinto the switching element408, an analog-to-digital converter (ADC)410provides n-bits (where n is an integer) to control the resistance of a variable resistor412. In this manner, the modulator402provides a time-varying current IOSCthat reflects an error signal VERROR. The error signal is a function of the difference between a feedback signal VFBand a reference DC signal VREF DC, and can therefore reflect changes in an output load condition. Typically, the reference DC signal is fixed, although it need not be.

Based on the oscillating current signal IOSC, an oscillator414(e.g., oscillator230inFIG. 2) provides a pulsed voltage signal (Vpulse). Again, this pulsed voltage signal can be provided substantially at a target frequency, but can exhibit an adaptive frequency jitter having a jitter frequency range that varies as a function of output load. See e.g.,FIGS. 1 and 3(supra) andFIG. 5(infra).

A gate driver416(e.g., gate driver232inFIG. 2) receives the pulsed voltage signal and provides a gate voltage (VGate) as a function thereof. In the illustrated embodiment, the gate driver includes a Reset/Set (RS) latch418, where the Set terminal receives the pulsed voltage and the Reset terminal is coupled to a comparator420that provides dynamic feedback. In other embodiments, stateful elements other than an RS latch (e.g., other types of latches or a flip-flop) could also be used.

The gate driver416drives a switching element422of a switching regulator424, thereby inducing a transformer426to facilitate provision of a DC output voltage (VDC OUT). In FIG.4's illustrated example, the switching regulator424receives an input DC supply voltage (VDC IN) from an input rectifier428. In the illustrated example, the input rectifier428converts an input AC voltage (VAC IN) to the DC supply voltage (VDC IN). An output rectifier430converts the power from the transformer426into a DC output voltage (VDC OUT).

A feedback path432, which can include an isolation circuit434such as an optocoupler, for example, can provide the feedback signal (VFB) to a comparator436, thereby providing an error signal (VError) that accounts for changes in the output load.

As shown inFIG. 5, as the output bits of the ADC410change to account for changes in output load condition, the oscillating current IOSCexperiences a corresponding change. This change in IOSCinduces a change in the jitter frequency range of the pulsed voltage signal (VPulse). Thus, during first time502, the power converter supplies an output DC power to a relatively small load (e.g., normalized load less than threshold load value104inFIG. 1). Accordingly, during the first time502, the jitter frequency range504is relatively large.

Subsequently, during second time506the output load gets smaller. The output of the ADC reflects this change in load by linearly increasing in digital value from 0000 to 1111. This change in ADC output causes a corresponding change in oscillating current IOSC(e.g., by changing the resistance of variable resistor412inFIG. 4). Consequently during time506, the jitter frequency range of the pulsed voltage linearly decreases in a continuous manner as shown by envelope508.

Finally, during third time510the output load reaches a relatively large value. The output of the ADC reflects this change in load by providing a fixed digital value of 1111 during this time510. Consequently, during time510, the jitter frequency range512of the pulsed voltage signal is relatively small.

FIGS. 6-7show some methodologies in accordance with some aspects of this disclosure. While these methods are illustrated and described below as a series of acts or events, the present disclosure is not limited by the illustrated ordering of such acts or events. For example, some acts may occur in different orders and/or concurrently with other acts or events apart from those illustrated and/or described herein. In addition, not all illustrated acts are required and the waveform shapes are merely illustrative and other waveforms may vary significantly from those illustrated. Further, one or more of the acts depicted herein may be carried out in one or more separate acts or phases.

FIG. 6starts at602when a first feedback voltage is sensed during a first time. The first feedback voltage is indicative of a first load condition, and is derived from a DC output signal delivered to an output load exhibiting the first load condition.

At604, an error signal is provided by comparing the first feedback signal to a fixed reference DC signal.

At606, an oscillating current signal is provided based on the error signal. In one embodiment, the oscillating current signal can be provided by adjusting a resistance value of a variable resistor based on the error signal. See e.g.,FIG. 4(supra).

At608, a pulsed voltage signal is provided substantially at a target frequency. Although the pulsed voltage signal is provided substantially at the target frequency, the pulsed voltage signal exhibits a first jitter frequency range that is based on the feedback signal sensed at the first time.

At610, the load condition of the output load is changed and a second feedback voltage is sensed during a second time. Thus, the second feedback voltage is indicative of a second load condition that differs from the first load condition.

At612, the error signal is updated by comparing the second feedback voltage to the fixed reference DC signal.

At614, the oscillating current signal is updated based on the updated error signal.

At616, the pulsed voltage signal is updated to exhibit a second jitter frequency range that differs from the first frequency jitter range. The second jitter frequency range differs from the first frequency range, and the jitter frequency ranges vary as a function of the change in the load condition of the output load.

FIG. 7shows another methodology700in accordance with some embodiments. At702, the method700compares a feedback signal derived from an output DC signal to a reference DC signal. In this manner,702provides an error signal indicative of a difference between the feedback signal and the output DC signal.

At704, the method700provides an oscillating current signal based on the error signal.

At706, the method700provides a pulsed voltage signal that exhibits frequency jitter based on the oscillating current signal. The frequency jitter has a first frequency range while the load exhibits a first load condition, and has a second frequency range while the load exhibits a second load condition that differs from the first load condition.

At708, a switching control signal (e.g., gated signal) is provided based on the pulsed voltage signal.

At710, the method700regulates a DC supply voltage with the switching control signal to provide the output DC signal at a desired DC voltage.

Certain terms are used throughout the specification to refer to particular system components. As one skilled in the art will appreciate, different companies can refer to a component by different names. This document does not intend to distinguish between components that differ in name but not function herein. In this document the terms “including” and “comprising” are used in an open ended fashion, and thus should be interpreted to mean “including, but not limited to . . . ” Also, the term “couple” (and variations thereof) is intended to mean either an indirect or direct electrical connection. Thus, if a first element is coupled to a second element, that connection may be a direct electrical connection, or may be an indirect electrical connection via other elements and connections. Although various approximately numeric values are provided herein, these numeric values are merely examples should not be used to limit the scope of the disclosure.

Furthermore, to the extent that the terms “includes”, “having”, “has”, “with”, or variants thereof are used in either the detailed description or the claims, such terms are intended to be inclusive in a manner similar to the term “comprising.”