Digital communication interface circuit for line-pair with individually adjustable transition edges

An interface circuit interfaces a device with a line-pair. The interface circuit includes: a diode bridge having polarity-independent input terminals coupled to the line-pair, and first and second output terminals having a positive polarity and a negative polarity, respectively; a first galvanic isolation device for outputting a receive signal received on the line-pair via the diode bridge; a second galvanic isolation device receiving a transmit signal; a voltage-controlled variable resistance element connected across the positive and negative output terminals of the diode bridge; and first and second filters cascaded between the second galvanic isolation device and the voltage-controlled variable resistance element. The first filter has decoupled charge and discharge paths so as to decouple the rise time and the fall time of the transmit signal. The second filter has a voltage-dependent frequency characteristic. The voltage-controlled variable resistance element couples the transmit signal to the line-pair via the diode bridge.

TECHNICAL FIELD

The present invention is directed generally to a digital communication interface, and more particularly to an interface circuit for interfacing a device with a line-pair such as a Digital Addressable Lighting Interface (DALI).

BACKGROUND

In recent years, new or more stringent demands have been imposed on lighting systems, such as increased requirements for energy conservation, and the need to accommodate an increasing variety of different types of lighting devices (e.g., incandescent, fluorescent, light emitting diode, etc.) with different driving requirements, with different types of lighting devices often being deployed within a same building or even the same room. These demands have driven need for more options and flexibility in the control of the lighting devices within a facility.

In response to these needs, the lighting industry developed the Digital Addressable Lighting Interface (DALI) standard for digital communications between the individual components of a lighting system. A wide variety of different DALI devices from different manufacturers can be connected together and integrated into a lighting system. This provides a high level of flexibility in configuring a lighting system while being assured of interoperability between all of the devices. Control and address capabilities allow a DALI compliant lighting system to individually control the light level of each of the luminaries as well as easily controlling light levels for groups of luminaries.

To maintain this interoperability, the DALI standard imposes requirements on the interfaces of control devices and slave devices for compatibility with other devices on a DALI bus. DALI interfaces are connected to a two-wire differential control/data bus which is common to groups of DALI interfaces. DALI messages are serial data streams and comply with a bi-phase coding, Manchester IEEE 802.3, in which the bit transitions occur between the typical voltage levels of 16 volts (H) and 0 volts (L).

FIG. 1illustrates the voltage range relationships for the differential two-wire line (a “line-pair”) of a DALI bus (which may sometimes also be referred to as a DALI loop or DALI network). A power source is usually incorporated in the master controller, providing the necessary voltage level on the DALI bus. Each DALI interface receives information by determining the voltage changes representing the bit values, and transmits information by either not clamping or clamping (shorting) the voltage across the two-wire DALI bus.

Electromagnetic interference (EMI) is a concern for many electronic devices and circuits. In particular, EMI may pose limitations on the amplitude of the high frequency harmonic components of the signals transmitted on a communication bus. For example, the DALI standard imposes both upper and lower limits on the rise and fall times (edge transitions) of the signals transmitted on a DALI bus. Compliance with these requirements must be ensured by the interface circuits of the DALI devices.

To address these requirements, several different communication interface circuits have been developed. In particular, examples of DALI interface circuits are disclosed in: U.S. Patent Application Publication 2004/0225811; U.S. Pat. No. 6,876,224, U.S. Patent Application Publication 2005/0152440; and U.S. Patent Application Publication 2009/0003417.

However, each of these communication interface circuits has certain disadvantages or limitations pertaining to complexity, cost, and/or performance.

Thus, it would be desirable to provide a communication interface circuit which can provide flexible control of the rise and fall times of the edge transitions to meet desired EMI performance without undue complexity and cost.

SUMMARY

The present disclosure is directed to inventive methods and apparatus for interfacing a device to a line-pair for digital communication, and more particularly to an interface circuit for interfacing a device to a line-pair such as a Digital Addressable Lighting Interface (DALI) bus.

Generally, in one aspect, a device includes an interface circuit configured to interface a controller with a Digital Addressable Lighting Interface (DALI) bus. The interface circuit includes: a diode bridge; a current limiter; a first optocoupler; a supply storage capacitor; a first unidirectional device; a Zener diode; a second optocoupler; a first first-order low pass filter; a second first-order low pass filter; and a field effect transistor. The diode bridge has a pair of polarity-independent input terminals configured to be coupled to the DALI bus, and further has positive and negative output terminals. The current limiter has an input and an output, wherein the input is connected to the positive output terminal of the diode bridge. The first optocoupler has first and second input terminals and first and second output terminals, wherein the first input terminal is connected to the output of the current limiter, and the output terminals are connected to a receiver. The first optocoupler is configured to couple to the receiver a receive signal received on the DALI bus via the diode bridge. The supply storage capacitor is connected via the first unidirectional device between the output of the current limiter and the negative output terminal of the diode bridge. The first unidirectional device allows current to flow from the output of the current limiter to charge a voltage on the supply storage capacitor, and prevents the voltage on the supply storage capacitor from discharging through the current limiter and the first optocoupler. The Zener diode is connected between the second input terminal of the first optocoupler and the negative output terminal of the diode bridge, and is configured to establish a voltage level of the voltage stored by the supply storage capacitor. The second optocoupler has first and second input terminals and first and second output terminals, wherein the first and second input terminals are connected to receive a transmit signal generated by the controller, and the first output terminal is connected to receive a supply voltage from the supply storage capacitor. The first first-order low pass filter has an input terminal and an output terminal, wherein the input terminal is connected to the second output terminal of the second optocoupler. The first first-order low pass filter includes: a shunt resistor connected between the input terminal of the first first-order low pass filter and the negative output terminal of the diode bridge, first and second series resistors connected between the input terminal of the first first-order low pass filter and the output terminal of the first first-order low pass filter, a second unidirectional device connected in parallel with either the first or second series resistor, and a shunt capacitor connected between the output terminal of the first first-order low pass filter and the negative output terminal of the diode bridge. The second first-order low pass filter has an input terminal and an output terminal, wherein the input terminal is connected to the output terminal of the first first-order low pass filter, a fourth resistor is connected between the input terminal and the output terminal of the second first-order low pass filter, and wherein the second first-order low pass filter has a voltage-dependent cutoff frequency. The field effect transistor has first and second terminals, drain and source, connected respectively to the positive and negative output terminals of the diode bridge, and has a gate terminal connected to the output terminal of the second first-order low pass filter.

In one embodiment, the cutoff frequency of the second first-order low pass filter decreases as a function of an increasing input voltage provided thereto when the input voltage exceeds a threshold voltage of the field effect transistor.

In another embodiment, the second first-order low pass filter includes a shunt capacitance between the gate terminal of the field effect transistor and the negative output terminal of the diode bridge, wherein the shunt capacitance increases when an input voltage to the second first-order low pass filter increases and is greater than a threshold voltage of the field effect transistor.

According to another embodiment, the device includes the controller, wherein the controller is configured to control a lighting device. According to yet another embodiment, the Zener diode has a breakdown (Zener knee) voltage that is between approximately 4.7 volts and approximately 6.2 volts.

Generally, in another aspect, a device includes an interface circuit configured to interface a controller with a Digital Addressable Lighting Interface (DALI) bus. The interface circuit includes: a diode bridge; a first optocoupler; a second optocoupler; a voltage-controlled variable resistance element; and first and second first-order low pass filters. The diode bridge has a pair of polarity-independent input terminals configured to be coupled to the DALI bus, and further has a positive output terminal and a negative output terminal. The first optocoupler is operatively connected to the diode bridge and configured to couple to a receiver a receive signal received on the DALI bus via the diode bridge. The second optocoupler is configured to receive a transmit signal generated by the controller. The voltage-controlled variable resistance element is connected across the positive and negative output terminals of the diode bridge. The first and second first-order low pass filters are cascaded between the second optocoupler and a control terminal of the voltage-controlled variable resistance element. The first first-order low pass filter includes decoupled charge and discharge paths so as to decouple a rise time of the transmit signal from a fall time of the transmit signal such that the rise time is different from the fall time. The second first-order low pass filter has a voltage-dependent cutoff frequency. The voltage-controlled variable resistance element is operatively connected to the diode bridge and configured to couple to the DALI bus via the diode bridge the transmit signal generated by the controller.

In one embodiment, the interface circuit further includes a transmit voltage supply and a transmit voltage reference for setting a voltage of the transmit voltage supply. The transmit voltage supply supplies a voltage to an output side of the second optocoupler, and the transmit voltage reference is supplied a current from the DALI bus.

According to another embodiment, the voltage-controlled variable resistance element includes a field effect transistor connected between positive and negative output terminals of the diode bridge.

According to yet another embodiment, the first first-order low pass filter includes: first and second series resistors connected between an output of the second optocoupler and an input of the second first-order low pass filter; a unidirectional device in parallel with either the first or second series resistor; and a capacitor connected between the output terminal of the first first-order low pass filter and the negative output terminal of the diode bridge.

According to still another embodiment, the cutoff frequency of the second first-order low pass filter decreases when an input voltage to the second first-order low pass filter increases and is greater than a threshold value.

According to a further embodiment, the second first-order low pass filter includes a shunt capacitance between an output of the second first-order low pass filter and the negative output terminal of the diode bridge, wherein the shunt capacitance increases when an input voltage to the second first-order low pass filter increases and is greater than a threshold value. According to one optional feature of this embodiment, the voltage-controlled variable resistance element includes a field effect transistor, and wherein the threshold value equals a threshold voltage of the field effect transistor. According to another optional feature of this embodiment, the shunt capacitance includes a gate-to-source capacitance of the field effect transistor.

According to a still further embodiment, the device further includes the controller, wherein the controller is configured to control a lighting device.

Generally, in yet another aspect, a device includes an interface circuit configured to interface a device with a line-pair. The interface circuit includes: a diode bridge; a first galvanic isolation device; a second galvanic isolation device; a voltage-controlled variable resistance element; and a first filter. The diode bridge has a pair of polarity-independent input terminals configured to be coupled to the line-pair, and further has a positive output terminal and a negative output terminal. The first galvanic isolation device is operatively connected to the diode bridge and configured to output a receive signal received on the line-pair via the diode bridge. The second galvanic isolation device is configured to receive a transmit signal. The voltage-controlled variable resistance element is connected across the positive and negative output terminals of the diode bridge. The first filter is connected between the second galvanic isolation device and the voltage-controlled variable resistance element. The first filter includes decoupled charge and discharge paths so as to decouple a rise time of the transmit signal from a fall time of the transmit signal. The voltage-controlled variable resistance element is operatively connected to the diode bridge and configured to couple the transmit signal to the line-pair via the diode bridge.

In one embodiment, the interface circuit further includes a second filter connected between the first filter and the control terminal of the voltage-controlled variable resistance element, wherein the second filter has a voltage-dependent frequency characteristic. In an optional variation of this embodiment, the first filter includes: first and second series resistors connected between an output of the second galvanic isolation device and an input of the second filter; a unidirectional device in parallel with either the first or second series resistor; and a capacitor connected between the input of the second filter and the negative output terminal of the diode bridge. According to another optional variation of this embodiment, the second filter has a cutoff frequency which decreases when an input voltage to the second filter increases and is greater than a threshold value. According to yet another optional variation of this embodiment, the second filter includes a shunt capacitance between an output of the second filter and the negative output terminal of the diode bridge, wherein the shunt capacitance increases when an input voltage to the second filter increases and is greater than a threshold value. According to still another optional variation of this embodiment, the voltage-controlled variable resistance element includes a field effect transistor, and wherein the threshold value equals a threshold voltage of the field effect transistor.

As used herein for purposes of the present disclosure, the term “light source” should be understood to refer to any one or more of a variety of radiation sources, including, but not limited to, LED-based sources (including one or more LEDs as defined above), incandescent sources (e.g., filament lamps, halogen lamps), fluorescent sources, phosphorescent sources, high-intensity discharge sources (e.g., sodium vapor, mercury vapor, and metal halide lamps), lasers, other types of electroluminescent sources, pyro-luminescent sources (e.g., flames), candle-luminescent sources (e.g., gas mantles, carbon arc radiation sources), photo-luminescent sources (e.g., gaseous discharge sources), cathode luminescent sources using electronic satiation, galvano-luminescent sources, crystallo-luminescent sources, kine-luminescent sources, thermo-luminescent sources, triboluminescent sources, sonoluminescent sources, radioluminescent sources, and luminescent polymers.

A “lighting driver” is used herein to refer to an apparatus that supplies electrical power to one or more light sources in a format to cause the light sources to emit light. In particular, a lighting driver may receive electrical power in a first format (e.g., AC Mains power; a fixed DC voltage; etc.) and supplies power in a second format that is tailored to the requirements of the light source(s) (e.g., LED light source(s)) that it drives.

The term “lighting module” is used herein to refer to a module, which may include a circuit board (e.g., a printed circuit board) having one or more light sources mounted thereon, as well as one or more associated electronic components, such as sensors, current sources, etc., and which is configured to be connected to a lighting driver. Such lighting modules may be plugged into slots in a lighting fixture, or a motherboard, on which the lighting driver may be provided. Such lighting modules may be plugged into slots in a lighting fixture, or a motherboard, on which the lighting driver may be provided.

The term “lighting unit” is used herein to refer to an apparatus including one or more light sources of same or different types. A given lighting unit may have any one of a variety of mounting arrangements for the light source(s), enclosure/housing arrangements and shapes, and/or electrical and mechanical connection configurations. Additionally, a given lighting unit optionally may be associated with (e.g., include, be coupled to and/or packaged together with) various other components (e.g., control circuitry; a lighting driver) relating to the operation of the light source(s).

The terms “lighting fixture” and “luminaire” are used herein interchangeably to refer to an implementation or arrangement of one or more lighting units in a particular form factor, assembly, or package, and may be associated with (e.g., include, be coupled to and/or packaged together with) other components.

As used herein, the term “approximately” means within +/−5% of the nominal value. The term “substantially” means within 10% of the nominal value.

DETAILED DESCRIPTION

As discussed above, there is a general need for a communication interface circuit which can ensure that signals transmitted by the interface satisfy specified upper and lower limits on the rise and fall times of edge transitions of signals transmitted by the interface circuit.

Therefore, the present inventor has recognized and appreciated that it would be beneficial to provide a communication interface circuit which provides more flexible control of the rise time and fall time of edge transitions of a transmitted signal.

In view of the foregoing, various embodiments and implementations of the present invention are directed to a communication interface circuit and a device that includes a communication interface circuit. In particular, various embodiments and implementations of the present invention are directed to an interface circuit which decouples the rise time and fall time of edge transitions of a transmitted signal. Furthermore, various embodiments and implementations of the present invention are directed to an interface circuit which can achieve an additional slowdown of the falling edge transition, which in some implementations is typically faster than the rising edge transition.

To provide a concrete illustration of the inventive concepts disclosed in this patent application,FIG. 2is a conceptual diagram of one embodiment of a device20having an interface circuit200for interfacing the device to a DALI bus. It should be understood that a DALI device is being provided as an example application for the inventive concepts, but the inventive concepts may be applied to other communication interfaces, and particularly to interface circuits for interfacing devices to other line-pairs.

In the example illustrated inFIG. 2, device20is a DALI device, and may include a controller27for controlling an operation of one or more lighting units or luminaires via signals communicated over the DALI bus. Each lighting unit or luminaire may include a lighting driver and/or a ballast, together with one or more light sources.

Interface circuit200includes: a diode bridge210; a first galvanic isolation device220; a second galvanic isolation device230; a first filter240; a second filter250; and a voltage-controlled variable resistance element260.

Diode bridge210has a pair of polarity-independent input terminals coupled to a line-pair (e.g., a DALI bus), and also has a positive output terminal and a negative output terminal.

First galvanic isolation device220is operatively connected to diode bridge210and outputs a receive signal received on the DALI bus via diode bridge210. In device20, first galvanic isolation device220outputs the receive signal to controller27of device20, for example via a receive signal conditioning circuit not shown. First galvanic isolation device220provides an ability for interface circuit200to communicate the receive signal to controller27while maintaining galvanic isolation between the DALI bus and interface circuit200on one side, and the rest of device20, including controller27, on the other side.

Second galvanic isolation device230is configured to receive a transmit signal from controller27of device20, for example via a controller transmit signal conditioning circuit not shown, and supplies the transmit signal to first filter240. Second galvanic isolation device230provides an ability for interface circuit200to receive the transmit signal from controller27while maintaining galvanic isolation between the DALI bus and interface circuit200on one side, and the rest of device20, including controller27, on the other side.

Voltage-controlled variable resistance element260is connected across the positive and negative output terminals of diode bridge210, denoted inFIG. 2as nodes P and N, respectively. In particular, voltage-controlled variable resistance element260has a first terminal connected to the positive output terminal of diode bridge210and a second terminal connected to the negative output terminal of diode bridge210. Voltage-controlled variable resistance element260also has a control terminal which is connected to the output of second filter250at a node denoted as C inFIG. 2and to which a control voltage VCNis applied which varies the resistance RPNof voltage-controlled variable resistance element260. That is, the resistance of voltage-controlled variable resistance element260between nodes P and N is a function of the voltage between nodes C and N: RPN(VCN). In some embodiments, voltage-controlled variable resistance element260has a variable resistance RPNwhich varies over a range of a low value of a few ohms (e.g., <10 ohms, such as 2-8 ohms) to a high value of several mega ohms. Interface200transmits a high voltage value (e.g., a voltage of 16 volts ±4.5 volts) to the line-pair (e.g., DALI bus) by causing voltage-controlled variable resistance element260to have a high resistance RPN(e.g., >1 MΩ), and transmits a low voltage value (e.g., a voltage of 0 volts±4.5 volts) to the DALI bus by causing voltage-controlled variable resistance element260to have a low resistance RPN(e.g., <10Ω). In the context of a DALI bus, data is transmitted at a given information rate (e.g., 1200 bits/s) using Manchester encoding, so that every data bit includes a portion with a high voltage value and a portion with a low voltage value. In some embodiments, voltage-controlled variable resistance element may comprise a field effect transistor (FET). In some embodiments, voltage-controlled variable resistance element260may have a threshold voltage VTHof 3-4 volts, wherein the resistance RPNis very low (e.g., <10Ω) for a control or input voltage VCNthat is greater than the threshold voltage, and the resistance RPNis very high (e.g., >1 MΩ) for a control or input voltage VCNthat is less than the threshold voltage.

First and second filters240and250are cascaded (a series connection) between second galvanic isolation device230and voltage-controlled variable resistance element260and provide a means for individually adjusting or controlling the rise time and fall time of edge transitions of data transmitted by interface200. More specifically, first and second filters240and250receive a transmit signal comprising transmit data (for example data generated by processor27) via second galvanic isolation device230and condition the transition edges of that transmit signal before supplying the transmit data to voltage-controlled variable resistance element260so as to control the EMI generated by interface200.

First filter240includes decoupled charge and discharge paths for the transmit signal which is communicated from second galvanic isolation device230. By decoupling the charge and discharge paths in first filter240, the rise time and the fall time of the transmit signal may be separately adjusted so as to be different from each other, providing increased flexibility for managing the edge transitions of the transmit signal, and thereby managing the EMI generated by interface circuit200. For example, in some embodiments first filter240may slow down the fall time of data transitions in the transmit signal to a lesser degree with respect to the rise time of data transitions in the transmit signal so as to manage the EMI generated by interface circuit200in a desirable fashion.

Second filter250has a transfer function whose frequency response is a function of the input voltage shown as VINinFIG. 2: X(f, VIN). Beneficially, second filter250has a voltage-dependent frequency response such that its bandwidth is reduced in a voltage region where the resistance of voltage-controlled variable resistance element260is decreasing so as to pull the voltage on the DALI bus low. This may achieve a desirable additional slowdown of the falling edge transitions of the transmit signal on the DALI bus, which may otherwise be faster than the rising edge transitions. Accordingly, the overall EMI generated from interface200may be reduced while still meeting the data transition time requirements of a DALI interface.

In some embodiments, second filter250may be omitted, thereby providing an advantage of simplicity but in some cases incurring a disadvantage in terms of reduced flexibility and degraded EMI performance.

FIG. 3is a more detailed block diagram of one embodiment of a device30having an interface circuit300for interfacing the device to a DALI bus. In particular, device30may be one example embodiment of device20, and interface circuit300may be one example embodiment of interface circuit200.

In the example illustrated inFIG. 3, device30is a DALI device, and may include controller27for controlling an operation of one or more lighting units or luminaires via signals communicated over the DALI bus. Each lighting unit or luminaire may include a lighting driver and/or a ballast, together with one or more light sources.

Interface circuit300includes: diode bridge210; a first optocoupler320; a second optocoupler330; a first filter340; a second filter350; a voltage-controlled variable resistance360; a transmit voltage supply370; a transmit voltage reference380; a current limiter390; and a first unidirectional device395.

First optocoupler320has first and second input terminals and first and second output terminals. The first input terminal is operatively connected to diode bridge210via current limiter390, and the output terminals are configured to output a receive signal received on the DALI bus via diode bridge210. In device30, the receive signal is output to controller27of device30, for example via a receive signal conditioning circuit. First optocoupler320is one embodiment of a galvanic isolation device and in principle a different galvanic isolation device could be substituted for it in different embodiments of the interface circuit.

Second optocoupler330has first and second input terminals and first and second output terminals. Second optocoupler330is configured to receive a transmit signal between the first and second input terminals. The transmit signal may be received from controller27, either directly or via a controller transmit signal conditioning circuit. The first output terminal (e.g., collector) of second optocoupler330receives a transmit voltage from transmit voltage supply370and the second output terminal (e.g., emitter) of second optocoupler330outputs the transmit data to first filter340. Second optocoupler330is one embodiment of a galvanic isolation device and in principle a different galvanic isolation device could be substituted for it in different embodiments of the interface circuit.

Voltage-controlled variable resistance element360operates like voltage-controlled variable resistance element260described above and so a description thereof will not be repeated.

First and second filters340and350are cascaded (a series connection) between second optocoupler330and voltage-controlled variable resistance element360and provide a means for individually adjusting or controlling the rise time and fall time of edge transitions of data transmitted by interface300. More specifically, first and second filters340and350receive a transmit signal comprising transmit data (for example data generated by processor27) via second optocoupler330and condition the transition edges of that transmit signal before supplying the transmit data to voltage-controlled variable resistance element360so as to control the EMI generated by interface300.

First filter340includes decoupled charge and discharge paths so as to decouple the rise time of the transmit signal from the fall time of the transmit signal. As a result, in some embodiments first filter340may slow down the fall time of data transitions in the transmit signal to a lesser degree with respect to the rise time of data transitions in the transmit signal. Beneficially, first filter340includes a first-order low pass filter. In that case, first filter340may have a first time constant τCfor the charging path and a second, different, time constant τDfor the discharge path, where τDmay be greater than τC. Beneficially, first filter340is referenced with respect to the negative output terminal of diode bridge210.

Second filter350has a voltage-dependent frequency characteristic. Beneficially, second filter350has a voltage-dependent frequency response such that its bandwidth is reduced in a voltage region where the resistance of voltage-controlled variable resistance element360is decreasing so as to pull the voltage on the DALI bus low. This may achieve a desirable additional slowdown of the falling edge transitions of the transmit signal on the DALI bus, which may otherwise be faster than the rising edge transitions. Accordingly, the overall EMI generated from interface300may be reduced while still meeting the data transition time requirements of a DALI interface. Beneficially, second filter350is a first-order low pass filter. In that case, second filter350may have a variable time constant τvariable. Beneficially, second filter350has a cutoff frequency which decreases when the input voltage to second filter350increases and is greater than a threshold value. In some embodiments, the threshold value equals a threshold voltage of a FET employed for voltage-controlled variable resistance element360. Beneficially, second filter350is referenced with respect to the negative output terminal of diode bridge210. In some embodiments, second filter350includes a shunt capacitance between an output of second filter350and the negative output terminal of diode bridge210, wherein the shunt capacitance increases when the input voltage to second filter350increases and is greater than the threshold value.

Beneficially, the time constant τvariableof second filter350may be less than the time constants τCand τDof first filter340.

In similarity to interface circuit200, in some embodiments of interface circuit300second filter350may be omitted, thereby providing an advantage of simplicity but in some cases incurring a disadvantage in terms of reduced flexibility and degraded EMI performance.

Transmit voltage supply370is connected in series with first unidirectional device395between the output of current limiter390and the negative output terminal of diode bridge210. Transmit voltage supply370is supplied by current from the DALI-bus via current limiter390and first unidirectional device395, and supplies a transmit voltage to drive the output side of second optocoupler330. First unidirectional device395allows current to flow from the output of current limiter390to charge transmit voltage supply370, but prevents a current from flowing in the opposite direction from transmit supply370to current limiter390and/or first optocoupler320(e.g., when the receive signal corresponds to a low voltage-differential on the DALI bus). Accordingly, first unidirectional device395prevents the voltage of transmit voltage supply370from discharging through current limiter390and/or first optocoupler320.

Transmit voltage reference380is connected between the second input terminal of first optocoupler320and the negative output terminal of diode bridge210and sets the amplitude of the voltage swing at the second output terminal (emitter) of second optocoupler330. In some embodiments, transmit voltage reference380may comprise a Zener diode. In some embodiments, the Zener diode has a breakdown (Zener knee) voltage that is in a range of approximately 4.7 volts to 6.2 volts.

FIG. 4is a circuit diagram of another embodiment of a device40having an interface circuit400for interfacing the device to a DALI bus. In particular, device40may be one example embodiment of devices20and/or30, and interface circuit400may be one example embodiment of interface circuit200and/or300.

In the example illustrated inFIG. 4, device40is a DALI device, and may include a controller for controlling an operation of one or more lighting units via signals communicated over the DALI bus.

Interface circuit400includes: diode bridge210; first optocoupler320; second optocoupler330; a first filter440; a second filter450; a field effect transistor460; a transmit supply storage capacitor470; a Zener diode480; current limiter390; and a diode495.

For brevity, the descriptions of elements of interface circuit400which are identical to those in interface circuit200and/or300will not be repeated.

Supply storage capacitor470is illustrated as one example embodiment of transmit supply voltage370of interface circuit300, and diode495is illustrated as one example embodiment of first unidirectional device395of interface circuit300. Zener diode480is illustrated as one example embodiment of transmit supply voltage reference380of interface circuit300.

Field effect transistor (FET)460is illustrated as one example embodiment of voltage-controlled variable resistance element360ofFIG. 3.

In interface circuit400, first filter440is a first-order low pass filter. First filter440includes: a shunt resistor442connected between the input terminal of first filter440and the negative terminal of diode bridge210; first and second series resistors444and448, respectively, connected between the input terminal of first filter440and the output terminal of first filter440; a second unidirectional device446connected in parallel with either first series resistor444or second series resistor448(e.g., first series resistor444inFIG. 4); and a shunt capacitor449connected between the output terminal of first filter440and the negative output terminal of diode bridge210. In some embodiments, second series resistor448may be omitted (shorted). In some embodiments, second unidirectional device446may be a diode. By means of second unidirectional device446, first filter440decouples the charge and discharge paths so as to decouple the rise time of the transmit signal from the fall time of the transmit signal. In some embodiments, second unidirectional device446may be configured to only pass current from the input of first filter440to the output of first filter440while preventing a current from passing therethrough from the output of first filter440to the input of first filter440. In other embodiments, second unidirectional device446may be configured to only pass current from the output of first filter440to the input of first filter440while preventing a current from passing therethrough from the input of first filter440to the output of first filter440. More specifically, first filter440has a first time constant τCfor the charging path and a second, different, time constant τDfor the discharge path. In some beneficial embodiments, τDis greater than τC. In that case, first filter440may slow down the fall time of data transitions in the transmit signal to a lesser degree with respect to the rise time of data transitions in the transmit signal. Due to the logic inversion through the FET460, the opposite becomes true for the rise and fall times of the data transitions on the DALI bus.

In interface circuit400, second filter450includes a series resistor connected between the output terminal of first filter440and a control terminal (e.g., the gate terminal) of field effect transistor460. Optionally, second filter450also includes a shunt capacitor between the control terminal (e.g., the gate terminal) of field effect transistor460and the negative output terminal of diode bridge210, which is in parallel with the parasitic gate-to-source capacitance CGSof field effect transistor460. Beneficially, in second filter450the shunt capacitance between the gate terminal of field effect transistor460and the negative output terminal of diode bridge210increases when the input voltage to second filter450increases and is greater than a threshold value. Beneficially, the threshold value may equal the threshold voltage VTHof field effect transistor460. In some embodiments, the shunt capacitor of second filter450may be omitted and the shunt capacitance of second filter450is realized by the parasitic gate-to-source capacitance CGSof field effect transistor460, which beneficially is a function of the gate-to-source voltage VGS: CGS(VGS). More specifically, the gate-to-source capacitance CGSof field effect transistor460increases as the gate-to-source voltage increases when the gate-to-source voltage is greater than the threshold voltage VTH.

In similarity to interface circuits200and300, in some embodiments of interface circuit400, second filter450may be omitted. More specifically, the series resistor and shunt capacitor may be omitted, in which case the parasitic capacitance of field effect transistor460will still be present. Accordingly, the value of the shunt capacitor in first filter440should be reduced compared to an embodiment where both the first and second filters440and450are present.

It should be understood that although, to provide a concrete illustration, example embodiments have been described above in the context of a DALI device interfacing to a DALI bus, the concepts described above need not be so limited, and can be applied to other communication interfaces for other networks, systems, buses or loops, and in particular to a communication interface for a line-pair.

While several inventive embodiments have been described and illustrated herein, those of ordinary skill in the art will readily envision a variety of other means and/or structures for performing the function and/or obtaining the results and/or one or more of the advantages described herein, and each of such variations and/or modifications is deemed to be within the scope of the inventive embodiments described herein. More generally, those skilled in the art will readily appreciate that all parameters, dimensions, materials, and configurations described herein are meant to be exemplary and that the actual parameters, dimensions, materials, and/or configurations will depend upon the specific application or applications for which the inventive teachings is/are used. Those skilled in the art will recognize, or be able to ascertain using no more than routine experimentation, many equivalents to the specific inventive embodiments described herein. It is, therefore, to be understood that the foregoing embodiments are presented by way of example only and that, within the scope of the appended claims and equivalents thereto, inventive embodiments may be practiced otherwise than as specifically described and claimed. Inventive embodiments of the present disclosure are directed to each individual feature, system, article, material, kit, and/or method described herein.

It should also be understood that, unless clearly indicated to the contrary, in any methods claimed herein that include more than one step or act, the order of the steps or acts of the method is not necessarily limited to the order in which the steps or acts of the method are recited. Also, reference numerals appearing in the claims in parentheses, if any, are provided merely for convenience and should not be construed as limiting the claims in any way.