Redundant critical path circuits to meet performance requirement

Method, system, IC and design structure for meeting a performance requirement using redundant critical path circuits, are disclosed. In one embodiment, the IC includes a plurality of redundant critical path circuits, wherein at least one of the plurality of redundant critical path circuits meeting a performance requirement is operational and the others are non-operational.

BACKGROUND

1. Technical Field

The disclosure relates generally to integrated circuit (IC) chip fabrication and design, and more particularly, to a method, system, IC and design structure for meeting a performance requirement using redundant critical path circuits.

2. Background Art

In the integrated circuit (IC) fabrication industry, miniaturization of circuitry continues. As this occurs, process variability has become increasingly troublesome. For example, at smaller geometries (e.g., 90 nm, 65 nm or 45 nm technology nodes) absolute errors in oxide thickness, length and other dimensions present a larger percentage of errors. Further, worst case performance is not scaling at the same rate as circuit density, and significant variation can be observed within a single IC. Currently, most IC fabricators focus on maximizing performance of a given critical path, e.g., by increasing voltage, maintaining temperature, etc.

SUMMARY

Method, system, IC and design structure for meeting a performance requirement using redundant critical path circuits, are disclosed. In one embodiment, the IC includes a plurality of redundant critical path circuits, wherein at least one of the plurality of redundant critical path circuits meeting a performance requirement is operational and the others are non-operational.

A first aspect of the disclosure provides an integrated circuit (IC) comprising: a plurality of redundant critical path circuits, wherein at least one of the plurality of redundant critical path circuits meeting a performance requirement is operational and the others are non-operational.

A second aspect of the disclosure provides a design structure embodied in a machine readable medium used in a design process, the design structure comprising: a circuit including a plurality of redundant critical path circuits, wherein at least one of the plurality of redundant critical path circuits meeting a performance requirement is operational and the others are non operational.

A third aspect of the disclosure provides a method comprising: identifying a critical path in an integrated circuit (IC) design structure that presents a challenge to a performance requirement; modifying the IC design structure to have a plurality of redundant circuits of the identified critical path, each circuit constrained to an island in design hierarchy; forming an integrated circuit (IC) having the plurality of redundant circuits of the identified critical path; testing the IC to determine which of the plurality of redundant circuits meet the performance requirement; and activating at least one of the plurality of redundant circuits that meets the performance requirement while leaving at least one other of the plurality of redundant circuits de-activated.

A fourth aspect of the disclosure provides a system comprising: means for identifying a critical path in an integrated circuit (IC) design structure that presents a challenge to a performance requirement; means for modifying the IC design structure to have a plurality of redundant circuits of the identified critical path, each circuit constrained to an island in design hierarchy; means for forming an integrated circuit (IC) having the plurality of redundant circuits of the identified critical path; means for testing the IC to determine which of the plurality of redundant circuits meet the performance requirement; and means for activating at least one of the plurality of redundant circuits that meets the performance requirement while leaving at least one other of the plurality of redundant circuits de-activated.

A fifth aspect of the disclosure provides a program product stored on a computer-readable medium, which when executed, aids in meeting a performance requirement for an IC using redundant critical path circuits, the program product comprising program code configured for: identifying a critical path in an integrated circuit (IC) design structure that presents a challenge to a performance requirement; modifying the IC design structure to have a plurality of redundant circuits of the identified critical path, each circuit constrained to an island in design hierarchy; forming an integrated circuit (IC) having the plurality of redundant circuits of the identified critical path; testing the IC to determine which of the plurality of redundant circuits meet the performance requirement; and activating at least one of the plurality of redundant circuits that meets the performance requirement while leaving at least one other of the plurality of redundant circuits de-activated.

A sixth aspect of the disclosure provides a computer-readable medium that includes computer program code to enable a computer infrastructure to meet a performance requirement using redundant critical path circuits, the computer-readable medium comprising computer program code for performing the method steps of the disclosure.

A seventh aspect of the disclosure provides a business method for meeting a performance requirement using redundant critical path circuits, the business method comprising managing a computer infrastructure that performs each of the steps of the disclosure; and receiving payment based on the managing step.

An eighth aspect of the disclosure provides a method of generating a system for meeting a performance requirement using redundant critical path circuits, the method comprising: obtaining a computer infrastructure; and deploying means for performing each of the steps of the disclosure to the computer infrastructure.

DETAILED DESCRIPTION

Referring toFIG. 1A, one embodiment of the disclosure relates to an integrated circuit (IC)100including a plurality of redundant critical path circuits102. Circuits102are also labeled as “islands” because in a layout150form, each circuit102is constrained to an island in design hierarchy. The particular redundant critical path circuit102that has been copied may be one that has been identified as presenting a challenge to a performance requirement. The performance requirement could be any parameter(s) of IC100, e.g., timing, power usage, clock speed, active power, leakage power, etc. At least one of the plurality of redundant critical path circuits102A that meets the performance requirement is operational and the others are non-operational. In this fashion, once IC100is formed, testing of IC100may reveal which of redundant critical path circuits102A meets (i.e., meet or exceeds) the performance requirement. In one embodiment, the circuit102A having the best performance is activated while leaving the other of redundant circuits102de-activated. The number of redundant circuits102provided may vary, and may be created according to an algorithm based upon, for example, the performance requirement, known process variables, etc.

FIG. 1Bshows one embodiment of circuit inter-relations within the IC ofFIG. 1Aaccording to the disclosure. As shown, a redundant circuit102A may be switched into or out of the rest of IC100using a multiplexer104.

FIG. 2illustrates a block diagram of a general-purpose computer system which can be used to implement IC100(FIG. 1A) and a design structure190, described herein. IC100(FIG. 1A) as described above is part of the design structure for an integrated circuit chip. The chip design is created in a graphical computer programming language, and coded as a set of instructions on machine readable removable or hard media (e.g., residing on a graphical design system (GDS) storage medium). That is, design structure190(FIG. 2) is embodied in a machine readable medium308used in a design process. (Although design structure190is shown interfacing with mass storage device316or removable storage device314, it may interface with any part of machine readable media308). Design structure190includes a plurality of redundant critical path circuits102, wherein at least one of the plurality of redundant critical path circuits102A meets a performance requirement is operational and the others102are non-operational. Design structure190may include a netlist, which describes IC100(FIG. 1A), and may include test data files, characterization data, verification data, or design specifications. If the designer does not fabricate chips or the photolithographic masks used to fabricate chips, the designer transmits the resulting design structure190by physical means (e.g., by providing a copy of the storage medium storing the design) or electronically (e.g., through the Internet) to such entities, directly or indirectly. The stored design is then converted into the appropriate format (e.g., graphic design system II (GDSII)) for the fabrication of photolithographic masks, which typically include multiple copies of the chip design in question that are to be formed on a wafer. The photolithographic masks are utilized to define areas of the wafer (and/or the layers thereon) to be etched or otherwise processed.

FIG. 2shows a computer system300, which has at least one microprocessor or central processing unit (CPU)304. CPU304is interconnected via a system bus306to machine readable media308, which includes, for example, a random access memory (RAM)310, a read-only memory (ROM)312, a removable and/or program storage device314and a mass data and/or program storage device316. For the purposes of this description, machine readable media (also referred to as a computer-usable or computer readable medium) can be any apparatus that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device, i.e., computer system. The medium can be an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system (or apparatus or device) or a propagation medium. I/O device(s)326can comprise any device that enables a user to interact with computer system300or any device that enables computer system300to communicate with one or more other computing devices. Input/output device(s)326can be coupled to system bus306either directly or through intervening I/O controllers328. As illustrated, an input/output (I/O) adapter330connects mass storage device316and removable storage device314to system bus306; user interface332connects a keyboard334and a mouse336to system bus306; a port adapter340connects a data port342to system bus306; and a display adapter344connects a display device346. ROM312contains the basic operating system for computer system300. Examples of removable data and/or program storage device314include magnetic media such as floppy drives, tape drives, portable flash drives, zip drives, and optical media such as CD ROM or DVD drives. Examples of mass data and/or program storage device316include hard disk drives and non-volatile memory such as flash memory. In addition to keyboard334and mouse336, other user input devices such as trackballs, writing tablets, pressure pads, microphones, light pens and position-sensing screen displays may be connected to user interface332. Examples of display device346include cathode-ray tubes (CRT) and liquid crystal displays (LCD).

Computer system300can comprise any general purpose computing article of manufacture capable of executing computer program code installed by a user (e.g., a personal computer, server, handheld device, etc.). However, it is understood that computer system300is only representative of various possible equivalent computing devices that may perform the various processes of the disclosure. To this extent, in other embodiments, computer system300can comprise any specific purpose computing article of manufacture comprising hardware and/or computer program code for performing specific functions, any computing article of manufacture that comprises a combination of specific purpose and general purpose hardware/software, or the like. In each case, the program code and hardware can be created using standard programming and engineering techniques, respectively.

Similarly, computer system300is only illustrative of various types of computer infrastructures for implementing the disclosure. For example, in one embodiment, computer system300comprises two or more computing devices (e.g., a server cluster) that communicate over any type of interconnected and/or interconnectless communications link, such as a network, a shared memory, or the like, to perform the various process steps of the disclosure. When the communications link comprises a network, the network can comprise any combination of one or more types of networks (e.g., the Internet, a wide area network, a local area network, a virtual private network, etc.). Network adapters may also be coupled to the system to enable the data processing system to become coupled to other data processing systems or remote printers or storage devices through intervening private or public networks. Modems, cable modem and Ethernet cards are just a few of the currently available types of network adapters. Regardless, communications between the computing devices may utilize any combination of various types of transmission techniques.

A machine readable computer program may be created by one of skill in the art and stored in computer system300and/or any one or more of machine readable media308to simplify the practicing of this disclosure. In operation, information for the computer program created to run the present disclosure is loaded on the appropriate removable data and/or program storage device314, fed through data port342or entered using keyboard334. A user controls the program by manipulating functions performed by the computer program and providing other data inputs via any of the above mentioned data input means. Display device346provides a means for the user to accurately control the computer program and perform the desired tasks described herein.

FIG. 3shows a block diagram of an example design flow400. Design flow400may vary depending on the type of integrated circuit (IC) being designed. For example, a design flow400for building an application specific IC (ASIC) will differ from a design flow400for designing a standard component. Design structure190is an input to a design process410and may come from an IP provider, a core developer, or other design company. Design structure190comprises IC100in the form of schematics or a hardware-description language (HDL) (e.g., Verilog, VHDL, C, etc.). Design structure190may be on one or more of machine readable medium308as shown inFIG. 2. For example, design structure190may be a text file or a graphical representation of IC100. Design process410synthesizes (or translates) IC100into a netlist420, where netlist420is, for example, a list of interconnects, transistors, logic gates, control circuits, I/O, models, etc. and describes the connections to other elements and circuits in an integrated circuit design and recorded on at least one of machine readable medium308.

Design process410includes using a variety of inputs; for example, inputs from library elements430which may house a set of commonly used elements, circuits, and devices, including models, layouts, and symbolic representations, for a given manufacturing technology (e.g., different technology nodes, 32 nm, 45 nm, 40 nm, etc.), design specifications440, characterization data450, verification data460, design rules470, and test data files480, which may include test patterns and other testing information. Design process410further includes, for example, standard circuit design processes such as timing analysis, verification tools, design rule checkers, place and route tools, etc. One of ordinary skill in the art of integrated circuit design can appreciate the extent of possible electronic design automation tools and applications used in design process410without deviating from the scope and spirit of the disclosure.

Ultimately, design process410translates IC100, along with the rest of the integrated circuit design (if applicable), into a final design structure490(e.g., information stored in a GDS storage medium). Final design structure490may comprise information such as, for example, test data files, design content files, manufacturing data, layout parameters, interconnects, levels of metal, vias, shapes, test data, data for routing through the manufacturing line, and any other data required by a semiconductor manufacturer to produce IC100. Final design structure490may then proceed to a stage492of design flow400, where stage492is, for example, where final design structure490proceeds to tape-out, is released to manufacturing, is sent to another design house or is sent back to the customer.

Turning toFIG. 4, a block diagram of one embodiment of a design system500for implementing a part of design process410(FIG. 3) according to the disclosure is illustrated. Design system500is stored on machine readable medium308(FIG. 2). Design system500includes an identifier502and a modifier504, the functions of which will be described further herein.

Turning toFIG. 5, a flow diagram illustrating one embodiment of part of design process410for meeting a performance requirement of an IC using redundant critical path circuits is illustrated. In process P1, identifier502identifies a critical path in an integrated circuit (IC) design structure190that presents a challenge to a performance requirement. As noted above, the performance requirement may be any parameter(s) of IC100, e.g., timing, power usage, clock speed, active power, leakage power, etc. In process P2, modifier504modifies IC design structure190to have a plurality of redundant circuits102(FIG. 1A) of the identified critical path, each circuit constrained to an island in design hierarchy. In process P3, IC100is formed having plurality of redundant circuits102of the identified critical path. This process may include any now known or later developed techniques and equipment for forming an IC, e.g., photolithography equipment, etching process chambers, deposition chambers, testing equipment, etc. In process P4, IC100is tested to determine which of the plurality of redundant circuits102meets the performance requirement. This process may include using any now known or later developed testing techniques and equipment, and may be carried out in a number ways. For example, each circuit102may include a built-in-self-test (BIST) such that direct testing can occur, or indirect ring oscillator (PSRO) may be used. The results of testing can be stored for various temperatures and voltage levels.FIG. 1Bshows an illustrative performance data/measurement/control106, e.g., a BIST with storage. In one embodiment, process P4occurs at manufacturing test and the results are stored in electronic fuse (e-fuse) or flash memory. Process P4may occur at power-up or system start. As understood by those with skill in the art, any performance parameter may be tested in this manner. In process P5, at least one of the plurality of redundant circuits102A that meets the performance requirement is activated while leaving at least one other of the plurality of redundant circuits102de-activated. In one embodiment, redundant circuit(s)102A exhibits the best performance, e.g., optimal timing. However, the selection of redundant circuit(s)102A that is activated may vary on a number of different issues. This process may be controlled via multiplexer104(FIG. 1), electronic fuses within IC100or other now known or later developed mechanisms of activating/deactivating parts of an IC. Process P5may also include re-evaluation and re-configuring of IC100based on a change in circumstances, e.g., a voltage change, temperature change, etc. Processes P4-P5may be controlled by an algorithm that controls testing, polling of redundant circuits102and decisionmaking as to which redundant circuit(s)102is activated. The algorithm may be implemented via hardware (flip-flop machine) and/or software.

Layout150(FIG. 1A) is output as part of final design structure490(FIG. 3) such that final design structure490includes IC100. As noted above, final design structure490may comprise a netlist, which describes IC100(layout150), and may reside on a graphical design system (GDS) storage medium308(FIG. 2). Further, final design structure490may include, as shown inFIG. 3, test data files480, characterization data450, verification data460or design specifications440.

As discussed herein, various systems may be described as “obtaining” data. It is understood that the corresponding data can be obtained using any solution. For example, the corresponding system/component can generate and/or be used to generate the data, retrieve the data from one or more data stores (e.g., a database), receive the data from another system/component, and/or the like. When the data is not generated by the particular system/component, it is understood that another system/component can be implemented apart from the system/component shown, which generates the data and provides it to the system/component and/or stores the data for access by the system/component.

The disclosure can take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment containing both hardware and software elements. In a preferred embodiment, the disclosure is implemented in software, which includes but is not limited to firmware, resident software, microcode, etc. In one embodiment, the disclosure can take the form of a computer program product accessible from a computer-usable, computer-readable medium or machine readable medium providing program code for use by or in connection with a computer system or any instruction execution system, which when executed, enables a computer system to perform the processes described herein.

In another embodiment, the disclosure provides a method of generating a system for performing the processes described herein. In this case, a computer system300, can be obtained (e.g., created, maintained, having made available to, etc.) and one or more systems for performing the process described herein can be obtained (e.g., created, purchased, used, modified, etc.) and deployed to the computer infrastructure. To this extent, the deployment of each system can comprise one or more of: (1) installing program code on a computing device, such as computer system300, from a machine readable medium; (2) adding one or more computing devices to the computer infrastructure; and (3) incorporating and/or modifying one or more existing systems of the computer infrastructure, to enable the computer infrastructure to perform the process steps of the disclosure.

In still another embodiment, the disclosure provides a business method that performs the process described herein on a subscription, advertising, and/or fee basis. That is, a service provider, such as an application service provider (ASP), could offer to perform the processes as described herein. In this case, the service provider can manage (e.g., create, maintain, support, etc.) a computer infrastructure, such as computer system300, that performs the process described herein for one or more customers. In return, the service provider can receive payment from the customer(s) under a subscription and/or fee agreement, receive payment from the sale of advertising to one or more third parties, and/or the like.

The foregoing description of various aspects of the disclosure has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the disclosure to the precise form disclosed, and obviously, many modifications and variations are possible. Such modifications and variations that may be apparent to a person skilled in the art are intended to be included within the scope of the disclosure as defined by the accompanying claims.