Multi-gain mode power amplifier, chip, and communication terminal

A multi-gain mode power amplifier, a chip, and a communication terminal. The multi-gain mode power amplifier comprises at least one amplifier circuit. The amplifier circuit comprises a bias circuit, a feedback circuit, a transistor (101), and an input matching network/output matching network. A bias voltage or a control voltage (120) is adjusted to make the feedback circuit to be either turned on or turned off, thus allowing the amplifier circuit to work in a high-gain mode or a low-gain mode. The multi-gain mode power amplifier has different gain modes, fully satisfies the actual demand of the communication terminal to work in the high-gain mode when transmitting a high power and to work in the low-gain mode when transmitting a low power.

CROSS-REFERENCE TO RELATED APPLICATIONS

The present application is the U.S. national phase of PCT/CN2017/091341 filed on Jun. 30, 2017, which claims the priority to the Chinese Patent Application No. 201610507258.X filed on Jun. 30, 2016, the disclosures of which are incorporated herein by reference in their entireties.

BACKGROUND

Technical Field

The present invention relates to a radio frequency power amplifier, and in particular, to a multi-gain mode power amplifier, a chip including same and a communication terminal including same, and belongs to the field of integrated circuit technologies.

Related Art

With the development of wireless communications technologies, and in particular, with the massive popularization of 3G/4G communication standards, there are higher requirements of communications systems. Signals received by base stations from communication terminals such as mobile phones are easily affected by objective conditions such as distance, landform, and weather. To meet requirements on performance indexes such as signal stability and linearity of a base station, a radio frequency power amplifier usually adopts multi-power modes typically including a high-gain mode and a low-gain mode. The low-gain mode requires to ensure performance such as linearity while reduce gains at a relatively low output power level, thereby improving the efficiency.

In practice, a communication terminal needs to adjust a transmitted power based on a path attenuation degree, and transmits a high power when the path attenuation is high, consuming a relatively large amount of current, or transmits a low power when the path attenuation is low, consuming a relatively small amount of current. This requires a power amplifier to not only have different gain modes, which enables the communication terminal to work in the high-gain mode when a high power is transmitted and work in the low-gain mode when a low power is transmitted, but also reduce a working current in the low-gain mode, to save battery power.

SUMMARY

A primary technical problem to be resolved in the present invention is to provide a multi-gain mode power amplifier.

Another technical problem to be resolved in the present invention is to provide a chip and a communication terminal that include the multi-gain mode power amplifier.

To achieve the foregoing objectives, the following technical solutions are used in the present invention:

According to a first aspect of embodiments of the present invention, a multi-gain mode power amplifier is provided. The multi-gain mode power amplifier includes at least one stage of amplifier circuit, where

the amplifier circuit includes a bias circuit, a feedback circuit, a transistor, and an input matching network/output matching network, where the bias circuit, the feedback circuit, the transistor, and the input matching network are connected to each other;

the input matching network/the output matching network is configured to receive/send a radio frequency signal; a bias voltage end is connected to the bias circuit and the feedback circuit, a control voltage end is connected to the feedback circuit, and a power supply supplies power to the amplifier circuit by using an inductor; and

a bias voltage or a control voltage is adjusted to enable the feedback circuit to be in a turned-on or turned-off state, so that the amplifier circuit works in a high-gain mode or a low-gain mode.

Preferably, there are two stages of amplifier circuits, a first-stage amplifier circuit is a variable gain structure, a second-stage amplifier circuit is a fixed gain structure, and the first-stage amplifier circuit and the second-stage amplifier circuit are connected in series.

Preferably, there is a plurality of stages of amplifier circuits, and the plurality of stages includes several variable gain structures and several fixed gain structures connected in cascade.

Preferably, the output matching network is configured to implement impedance translation of the radio frequency signal, to output a power to the outside based on a radio frequency signal transmitted by the first-stage amplifier circuit.

Preferably, when the multi-gain mode power amplifier is in the high-gain mode, a first bias voltage of the first-stage amplifier circuit is greater than a breakover voltage of a transistor of the first-stage amplifier circuit, and a second bias voltage of the second-stage amplifier circuit is greater than a breakover voltage of a transistor of the second-stage amplifier circuit.

Preferably, when the multi-gain mode power amplifier is in the high-gain mode, the control voltage of the feedback circuit of the first-stage amplifier circuit is less than a supply voltage of the first-stage amplifier circuit, and a voltage difference between the control voltage and the supply voltage is less than a breakover voltage of the transistor, so that the feedback circuit is in a turned-off state, and the first-stage amplifier circuit implements the high-gain mode by using the transistor.

Preferably, when the multi-gain mode power amplifier is in the low-gain mode, the control voltage of the feedback circuit is less than a supply voltage of the first-stage amplifier circuit, and a voltage difference between the control voltage and the supply voltage is greater than a breakover voltage of a transistor of the first-stage amplifier circuit, so that the feedback circuit is in a turned-on state, and the first-stage amplifier circuit implements the low-gain mode.

Preferably, when the multi-gain mode power amplifier is in a mode 1, a supply voltage (VCC) of the first-stage amplifier circuit is greater than a sum of a turn-on voltage (Vth_main) of the transistor of the first-stage amplifier circuit and a breakover voltage (Vth_diode) of a diode.

Preferably, when a bias voltage (Vreg) of a first bias circuit is not less than a voltage difference between the supply voltage (VCC) and the breakover voltage (Vth_diode) of the diode and is not greater than a maximum value (Vreg_max) of the bias voltage, the transistor in the first-stage amplifier circuit is turned on, and the diode is not conducted, to enable the first-stage amplifier circuit to implement the high-gain mode.

Preferably, a current of the transistor decreases as the bias voltage (Vreg) of the bias circuit decreases.

Preferably, when the bias voltage (Vreg) of the bias circuit is not less than the turn-on voltage (Vth_main) of the transistor and is less than the voltage difference between the supply voltage (VCC) and the breakover voltage (Vth_diode) of the diode, the transistor is turned on, and the diode is also conducted, so that a gain of the first-stage amplifier circuit decreases.

Preferably, when the bias voltage (Vreg) of the bias circuit is not less than 0 and is less than the turn-on voltage (Vth_main) of the transistor, the transistor is not turned on, the diode is conducted, an input signal is transmitted to the second-stage amplifier circuit by using the feedback circuit, and a gain of the first-stage amplifier circuit is the lowest.

Preferably, when the multi-gain mode power amplifier is in a mode 2, a supply voltage (VCC) of the first-stage amplifier circuit is not greater than a sum of a turn-on voltage (Vth_main) of the transistor of the first-stage amplifier circuit and a breakover voltage (Vth_diode) of a diode.

Preferably, when the bias voltage (Vreg) of the bias circuit is not less than the turn-on voltage (Vth_main) of the transistor and is not greater than a maximum value (Vreg_max) of the bias voltage, the transistor is turned on, the diode is not conducted, and the gain mode of the first-stage amplifier circuit is implemented by using the transistor.

Preferably, when the bias voltage (Vreg) of the bias circuit is not less than a voltage difference between the supply voltage (VCC) and the breakover voltage (Vth_diode) of the diode and is less than the turn-on voltage (Vth_main) of the transistor, the transistor is not turned on, the diode is also not conducted, and the first-stage amplifier circuit is in a turned-off state.

Preferably, when the bias voltage (Vreg) of the bias circuit is not less than 0 and is less than a voltage difference between the supply voltage (VCC) and the breakover voltage (Vth_diode) of the diode, the transistor is not turned on, the diode is conducted, and an input signal is transmitted to the second-stage amplifier circuit by using the feedback circuit.

According to a second aspect of the embodiments of the present invention, a chip having a multi-gain mode power amplifier is provided. The chip includes the multi-gain mode power amplifier described in the first aspect.

According to a third aspect of the embodiments of the present invention, a communication terminal having a multi-gain mode power amplifier is provided. The communication terminal includes the multi-gain mode power amplifier described in the first aspect.

Compared with the prior art, according to the multi-gain mode power amplifier provided in the present invention, the adjustment of the bias voltage or the control voltage enables the multi-gain mode power amplifier to have different gain modes. This fully meets an actual requirement that the communication terminal works in the high-gain mode when transmitting a high power and works in the low-gain mode when transmitting a low power. Especially, in the low-gain mode, the multi-gain mode power amplifier provided in the present invention can effectively reduce a working current, thereby further saving power.

DETAILED DESCRIPTION

The following further describes in detail the technical content of the present invention with reference to the accompanying drawings and specific embodiments.

First, it should be noted that, in each embodiment of the present invention, a related communication terminal refers to a computer device including a mobile phone, a notebook computer, a tablet computer, an in-vehicle computer, and the like that can be used in a mobile environment and that supports various communication standards such as GSM, EDGE, TD_SCDMA, TDD_LTE, and FDD_LTE. In addition, the multi-gain mode power amplifier is also applicable to another scenario in which a multimode technology is used, for example, a communications base station compatible with various communication standards.

In the prior art, both the three-mode solution and the five-mode solution provided by China Mobile Communications Corporation include the following three modes: GSM/TD_SCDMA/TDD_LTE. In addition, due to limitations of LTE network coverage, the current three-mode solution and the five-mode solution still need to be compatible with an EDGE mode. A frequency on a PCS band in a high-frequency GSM is 1850 MHz to 1910 MHz, a frequency on a TD_SCDMA frequency band is 1880 MHz to 1920 MHz and 2010 MHz to 2025 MHz, and a frequency on a TDD_LTE B39 frequency band is 1880 MHz to 1920 MHz. It can be learned that frequencies in the three modes are relatively close. In addition, the frequency bands of the GSM and the EDGE are completely overlapped, making circuit multiplexing necessarily possible. The multi-gain mode power amplifier works in different modes, and therefore has different requirements on an output power, a gain, and a working current. The foregoing indexes of the multi-gain mode power amplifier are determined based on a control voltage or a bias voltage, so that optimization of the control voltage or the bias voltage of the multi-gain mode power amplifier in different modes can implement overall optimization of the output power, the gain, and the current.

FIG. 1is a principle diagram of a circuit of a multi-gain mode power amplifier. As shown inFIG. 1, the multi-gain mode power amplifier includes a first-stage amplifier circuit and a second-stage amplifier circuit connected in series.

As shown inFIG. 1, the first-stage amplifier circuit includes a first bias circuit, a first feedback circuit, a transistor101, and an input matching network116. The first bias circuit includes a transistor107, a resistor106and a resistor112. A first bias voltage121is connected to a collector of the transistor107by using the resistor106. Emitters of the transistor107and the transistor101are grounded. A base of the transistor107is not only connected between the resistor106and the base of the transistor107, but also connected to an end of an input matching network, a base of the transistor101, and a resistor105by using the resistor112. The first feedback circuit includes a diode103, a capacitor104, and the resistor105sequentially connected in series. A control voltage120is disposed between a cathode of the diode103and the capacitor104, and the control voltage120is configured to control conduction and non-conduction of the diode103. An anode of the diode103is connected to an inductor114and a collector of the transistor101by using a node123. A resistor is disposed between another end of the input matching network116and the ground, and is configured to access a radio frequency signal and implement impedance matching. A supply voltage118supplies a voltage to the first-stage amplifier circuit by using the inductor114.

The second-stage amplifier circuit includes a second bias circuit, a transistor102, and an output matching network117. The second bias circuit includes a transistor108, a transistor109, a transistor110, a resistor111, and a resistor113. A second bias voltage122is connected to the resistor111and a collector of the transistor110. The resistor111is further connected to a collector of the transistor108. A base of the transistor108is not only connected between the collector of the transistor108and the resistor111, but also connected to a base of the transistor110. An emitter of the transistor108, a collector of the transistor109, and a base of the transistor109are connected to each other. An emitter of the transistor109is grounded. An emitter of the transistor110is connected to a base of the transistor102and a capacitor by using the resistor113. An emitter of the transistor102is also grounded. The transistor102is connected to an inductor115and an end of the output matching network117. A resistor is also disposed between another end of the output matching network117and the ground, to implement impedance translation of radio frequency signal, to output a radio frequency output power based on a radio frequency signal transmitted by the first-stage amplifier circuit. A supply voltage119supplies a voltage to the first-stage amplifier circuit by using the inductor115.

The capacitor (which is a capacitor connected to the base of the transistor102) in the second-stage amplifier circuit is coupled between the node123and the transistor101in the first-stage amplifier circuit, to form the multi-gain mode power amplifier. Turning-on or turning-off of the first feedback circuit is controlled by adjusting the control voltage, to implement different gain modes of the power amplifier. When the multi-gain mode power amplifier is in a high-gain mode, a voltage value of the first bias voltage121is greater than a voltage value of a breakover voltage of the transistor101, so that the transistor101has a specific quiescent current. A voltage value of the second bias voltage122is greater than a voltage value of a breakover voltage of the transistor102, so that the transistor102also has a specific quiescent current. A voltage value of the control voltage120of the first feedback circuit of the first-stage amplifier circuit is less than a voltage value of the supply voltage118of the first-stage amplifier circuit. In addition, a voltage difference between the control voltage120and the supply voltage118is less than the voltage value of the breakover voltage of the transistor101. In this case, voltage values at the two ends of the diode103are less than a voltage value of a breakover voltage of the diode103, so that the diode103is in a non-conducted state, and therefore the first feedback circuit is in a turned-off state (which means that the feedback circuit barely works), and an amplification effect is implemented by using the transistor101, so that the first-stage amplifier circuit implements the high-gain mode. When the multi-gain mode power amplifier is in a low-gain mode, the voltage value of the control voltage120of the feedback circuit is less than the voltage value of the supply voltage118of the first-stage amplifier circuit. In addition, the voltage difference between the control voltage120and the supply voltage118is greater than the breakover voltage of the transistor101. In this case, the voltage values at the two ends of the diode103are greater than the voltage value of the breakover voltage of the diode103, so that the diode103is in a conducted state, and the first feedback circuit is in a turned-on state (where the feedback circuit starts to work), and the first-stage amplifier circuit implements the low-gain mode. The multi-gain mode power amplifier has a same quiescent current in the high-gain mode and the low-gain mode, and therefore cannot save currents in the low-gain mode.

According to the multi-gain mode power amplifier provided in the present invention, without changing the structure of the second-stage amplifier circuit, by connecting the first-stage amplifier circuit and the second-stage amplifier circuit that have different structures in series, the multi-gain mode power amplifier not only can implement the high-gain mode or the low-gain mode, but also can save currents in the low-gain mode. Further descriptions are given below by using specific embodiments.

First Embodiment

As shown inFIG. 2, a first-stage amplifier circuit provided in the first embodiment includes a first bias circuit, a first feedback circuit, a transistor201, and an input matching network. The first bias circuit includes a transistor207, a resistor206, and a resistor208. An emitter of the transistor207is grounded. A base of the transistor207is connected to the resistor206, a collector of the transistor207, and the resistor208. The first feedback circuit includes a diode202, a capacitor203, and a resistor204sequentially connected in series. A resistor205is disposed between a node209and a first bias voltage211. A resistor is disposed between an end of the input matching network and the ground (which implements the functions described above). Another end of the input matching network is connected to the resistor208, the resistor204, and a base of the transistor201. An emitter of the transistor201is grounded. The first bias voltage211provides a bias voltage to the first bias circuit by using the resistor206. A supply voltage212is connected to the diode202and the transistor201by using an inductor. Likewise, a capacitor of a second-stage amplifier circuit is connected between a node210and a collector of the transistor201, to form a multi-gain mode power amplifier. Turning-on and turning-off of the first feedback circuit is controlled by adjusting a voltage value of the first bias voltage211, so that the multi-gain mode power amplifier works in a high-gain mode or a low-gain mode, and a working current of the multi-gain mode power amplifier in the low-gain mode is reduced.

A working principle of the multi-gain mode power amplifier is as follows. As shown in Table 1, the multi-gain mode power amplifier is in a mode 1 (the high-gain mode) and meets the following conditions. When the supply voltage212(VCC) of the first-stage amplifier circuit is greater than a sum of a turn-on voltage (Vth_main) of the transistor201and a breakover voltage (Vth_diode) of the diode202, and when the first bias voltage211(Vreg) of the first bias circuit is not less than a voltage difference between the supply voltage212(VCC) and the breakover voltage (Vth_diode) of the diode202and is not greater than a maximum value (Vreg_max) of the first bias voltage211, the transistor201in the first-stage amplifier circuit is turned on, the diode202in the first feedback circuit is not conducted, the first feedback circuit does not work, and the first-stage amplifier circuit achieves amplification by using the transistor201, so that the first-stage amplifier circuit implements the high-gain mode. When the first bias voltage211(Vreg) of the first bias circuit is not less than the turn-on voltage (Vth_main) of the transistor201and is less than the voltage difference between the supply voltage212(VCC) and the breakover voltage (Vth_diode) of the diode202, the transistor201is turned on, and the diode202is also conducted, and the first feedback circuit starts to work, to reduce a gain of the first-stage amplifier circuit. When the first bias voltage211(Vreg) of the first bias circuit is not less than 0 and is less than the turn-on voltage (Vth_main) of the transistor201, the transistor201is not turned on, the diode202is conducted, and the first feedback circuit works. In this case, an input signal is transmitted to the second-stage amplifier circuit by using the first feedback circuit, and the gain of the first-stage amplifier circuit is the lowest.

When the multi-gain mode power amplifier is in a mode 2 (the low-gain mode), the following conditions are met. When the supply voltage212(VCC) of the first-stage amplifier circuit is not greater than the sum of the turn-on voltage (Vth_main) of the transistor201and the breakover voltage (Vth_diode) of the diode202, and when the first bias voltage211(Vreg) of the first bias circuit is not less than the turn-on voltage (Vth_main) of the transistor201and is not greater than the maximum value (Vreg_max) of the first bias voltage211, the transistor201is turned on, the diode202is not conducted, and the gain mode of the first-stage amplifier circuit is implemented by using the transistor201. When the first bias voltage211(Vreg) of the first bias circuit is not less than the voltage difference between the supply voltage212(VCC) and the breakover voltage (Vth_diode) of the diode202and is less than the turn-on voltage (Vth_main) of the transistor201, the transistor201is not turned on, and the diode202is also not conducted. In this case, the first-stage amplifier circuit is in a completed turned-off state. When the first bias voltage211(Vreg) of the first bias circuit is not less than 0 and is less than the voltage difference between the supply voltage212(VCC) and the breakover voltage (Vth_diode) of the diode202, the transistor201is not turned on, the diode202is conducted, and the first feedback circuit works. In this case, the input signal is transmitted to the second-stage amplifier circuit by using the first feedback circuit.

FIG. 6is a simulation diagram of the first bias voltage211(Vreg) and the gain mode of the first-stage amplifier circuit, the current of the transistor201and the current of the diode202when the supply voltage212(VCC) of the first-stage amplifier circuit is greater than the sum of the turn-on voltage (Vth_main) of the transistor201and the breakover voltage (Vth_diode) of the diode202. In the figure, an area I corresponds to a case in Table 1 in the mode 1 (the high-gain mode) in which the first bias voltage211(Vreg) of the first bias circuit is not less than the voltage difference between the supply voltage212(VCC) and the breakover voltage (Vth_diode) of the diode202and is not greater than the maximum value (Vreg_max) of the first bias voltage211. In this case, the current of the diode202is 0, and the gain of the first-stage amplifier circuit is implemented by using the transistor201. The current of the transistor201decreases as the first bias voltage211(Vreg) of the first bias circuit decreases, and the gain mode of the first-stage amplifier circuit keeps unchanged. An area II corresponds to a case in Table 1 in the mode 1 (the high-gain mode) in which the first bias voltage211(Vreg) of the first bias circuit is not less than the turn-on voltage (Vth_main) of the transistor201and is less than the voltage difference between the supply voltage212(VCC) and the breakover voltage (Vth_diode) of the diode202. In this case, the transistor201is turned on, and the diode202is also conducted, the gain mode of the first-stage amplifier circuit is implemented by using the transistor201and the first feedback circuit. As the first bias voltage211(Vreg) decreases, the current of the diode202in the first feedback circuit increases, the current of the transistor201decreases, a total amount of currents consumed by first-stage amplifier circuit is reduced, and the gain of the first-stage amplifier circuit is reduced. An area III corresponds to a case in Table 1 in the mode 1 (the high-gain mode) in which the first bias voltage211(Vreg) of the first bias circuit is not less than 0 and is less than the turn-on voltage (Vth_main) of the transistor201. In this case, the current of the transistor201is 0, and the gain mode of the first-stage amplifier circuit is implemented by using the first feedback circuit to be the low-gain mode. In this case, the total amount of currents consumed by the first-stage amplifier circuit is a conduction current of the diode202that is far less than the total amount of currents of the first-stage amplifier circuit in the high-gain mode, and therefore power consumption can be effectively reduced.

FIG. 7is a simulation diagram of the first bias voltage211(Vreg) and the gain mode of the first-stage amplifier circuit, the current of the transistor201and the current of the diode202when the supply voltage212(VCC) of the first-stage amplifier circuit is less than the sum of the turn-on voltage (Vth_main) of the transistor201and the turn-on voltage (Vth_diode) of the diode202. An area I corresponds to a case in Table 1 in the mode 2 (the low-gain mode) in which the first bias voltage211(Vreg) of the first bias circuit is not less than the turn-on voltage (Vth_main) of the transistor201and is not greater than the maximum value (Vreg_max) of the first bias voltage211. The first bias voltage211(Vreg) of the first bias circuit is greater than the turn-on voltage (Vth_main) of the transistor201, the current of the diode202is 0, and the gain mode of the first-stage amplifier circuit is implemented by using the transistor201. An area II corresponds to a case in Table 1 in the mode 2 (the low-gain mode) in which the first bias voltage211(Vreg) of the first bias circuit is not less than the voltage difference between the supply voltage212(VCC) and the breakover voltage (Vth_diode) of the diode202and is less than the turn-on voltage (Vth_main) of the transistor201. In this case, the current of the transistor201is 0, the current of the diode202is 0, and the first-stage amplifier circuit is in a turned-off state. An area III corresponds to a case in Table 1 in the mode 2 (the low-gain mode) in which the first bias voltage211(Vreg) of the first bias circuit is not less than 0 and is less than the voltage difference between the supply voltage212(VCC) and the breakover voltage (Vth_diode) of the diode202. In this case, the current of the transistor201is 0, the current of the diode202is not 0, and the first feedback circuit works. In this case, the input signal is transmitted to the second-stage amplifier circuit by using the first feedback circuit of the first-stage amplifier circuit, to implement the low-gain mode.

TABLE 1Table of a relationship between a working state of the first-stage amplifiercircuit and the first bias voltageMode 1: VCC > Vth_main + Vth_diodeVreg_max ≥ Vreg ≥ VCC_Vth_diodeThe transistor is turned on, and the diode isnot conductedVCC-Vth_diode > Vreg ≥ Vth_mainThe transistor is turned on, and the diode isconductedVth_main > Vreg ≥ 0The transistor is not turned on, and the diodeis conductedMode 2: VCC ≤ Vth_main + Vth_diodeVreg_max ≥ Vrea ≥ Vth_mainThe transistor is turned on, and the diode isnot conductedVth_main > Vreg ≥ VCC-Vth_diodeThe transistor is not turned on, and the diodeis not conductedVCC-Vth_diode > Vreg ≥ 0The transistor is not turned on, and the diodeis conducted

Second Embodiment

In a same process, the turn-on voltage (Vth_diode) of the diode and the turn-on voltage (Vth_main) of the transistor in the first-stage amplifier circuit are the same. For ease of description, the turn-on voltage (Vth_diode) of the diode and the turn-on voltage (Vth_main) of the transistor are collectively referred to as Vth in the second embodiment to a fourth embodiment.

As shown inFIG. 3, a first-stage amplifier circuit provided in the second embodiment includes a first bias circuit, a second feedback circuit, a transistor301, and an input matching network. The first bias circuit includes a transistor307, a resistor306, and a resistor307. The structure of the first bias circuit is the same as the structure of the first bias circuit shown inFIG. 2. The second feedback circuit includes a diode3022, a diode3021, a capacitor303, and a resistor304sequentially connected in series. A resistor305is disposed between a node309and a first bias voltage311. The diode3022is connected to a collector of the transistor301by using a node310. A connection relationship between each part of the first-stage amplifier circuit is the same as that in the first embodiment, and details are not described herein again. Likewise, turning-on and turning-off of the second feedback circuit is controlled by adjusting a voltage value of the first bias voltage311, so that the multi-gain mode power amplifier works in a high-gain mode or a low-gain mode, and a working current of the multi-gain mode power amplifier in the low-gain mode is reduced.

Because the diode3021and the diode3022are connected in series, an equivalent turn-on voltage of the diode changes to 2Vth. A relationship between a working state of the first-stage amplifier circuit and the first bias voltage311of the first bias circuit is summarized in Table 2, and a supply voltage VCC switching point used to distinguish between the two modes is 3Vth. A working principle of the multi-gain mode power amplifier is the same as that in the first embodiment, and details are not described herein again.

TABLE 2Table of a relationship between a working state ofthe first-stage amplifier circuit and the first bias voltageMode 1: VCC > 3VthVreg_max ≥ Vreg ≥ VCC-2VthThe transistor is turned on, and thediode is not conductedVCC-2Vth > Vreg ≥ VthThe transistor is turned on, and thediode is conductedVth > Vreg ≥ 0The transistor is not turned on, andthe diode is conductedMode 2: VCC ≤ 3VthVreg_max ≥ Vreg ≥ VthThe transistor is turned on, and thediode is not conductedVth > Vreg ≥ VCC-2VthThe transistor is not turned on, andthe diode is not conductedVCC-2Vth > Vreg ≥ 0The transistor is not turned on, andthe diode is conducted

Third Embodiment

As shown inFIG. 4, a first-stage amplifier circuit provided in the third embodiment includes a second bias circuit, a first feedback circuit, a transistor401, and an input matching network. The second bias circuit includes a transistor407, a transistor413, a transistor414, a resistor406, and a resistor408. The structure of the second bias circuit is the same as the structure of the second bias circuit of the second-stage amplifier circuit shown inFIG. 1, and details are not described herein again. The first feedback circuit includes a diode402, a capacitor403, and a resistor404sequentially connected in series. A second bias voltage411provides a bias voltage to the second bias circuit by using the resistor406. Likewise, a resistor405is disposed between the second bias voltage411and a node409. A supply voltage412supplies power to the first-stage amplifier circuit by using an inductor. A connection relationship between each part of the first-stage amplifier circuit is the same as that in the first embodiment. Likewise, turning-on and turning-off of the first feedback circuit is controlled by adjusting a voltage value of the second bias voltage411, so that the multi-gain mode power amplifier works in a high-gain mode or a low-gain mode, and a working current of the multi-gain mode power amplifier in the low-gain mode is reduced.

As shown in Table 3, the transistor401can be turned on only when the second bias voltage411(Vreg) of the second bias circuit is greater than 2Vth. A relationship between a working state of the first-stage amplifier circuit and the second bias voltage of the second bias circuit is summarized in Table 3, and a supply voltage VCC switching point used to distinguish between the two modes is 3Vth. A working principle of the multi-gain mode power amplifier is also the same as that in the first embodiment, and details are not described herein again.

TABLE 3Table of a relationship between a working state of thefirst-stage amplifier circuit and the second bias voltageMode 1: NCC > 3VthVreg_max ≥ Vreg ≥ VCC-VthThe transistor is turned on, and thediode is not conductedVCC-Vth > Vreg ≥ 2VthThe transistor is turned on, and thediode is conducted2Vth > Vreg ≥ 0The transistor is not turned on, and thediode is conductedMode 2: VCC ≤ 3VthVreg_max ≥ Vreg ≥ 2VthThe transistor is turned on, and thediode is not conducted2Vth > Vreg ≥ VCC-VthThe transistor is not turned on, and thediode is not conductedVCC-Vth > Vreg ≥ 0The transistor is not turned on, and thediode is conducted

Fourth Embodiment

As shown inFIG. 5, a first-stage amplifier circuit provided in the fourth embodiment includes a second bias circuit, a second feedback circuit, a transistor501, and an input matching network. The second bias circuit includes a transistor507, a transistor513, a transistor514, a resistor506, and a resistor508. The structure of the second bias circuit is the same as the structure of the second bias circuit of the second-stage amplifier circuit shown inFIG. 1, and details are not described herein again. The second feedback circuit includes a diode5022, a diode5021, a capacitor503, and a resistor504. The structure of the second feedback circuit is the same as the structure of the second feedback circuit shown inFIG. 3, and details are not described herein again. A second bias voltage511provides a bias voltage to the second bias circuit by using the resistor506. Likewise, a resistor505is disposed between the second bias voltage511and a node509. A supply voltage512supplies power to the first-stage amplifier circuit by using an inductor. A connection relationship between each part of the first-stage amplifier circuit is the same as that in the first embodiment. Likewise, turning-on and turning-off of the second feedback circuit is controlled by adjusting the voltage value of the second bias voltage511, so that the multi-gain mode power amplifier works in a high-gain mode or a low-gain mode, and a working current of the multi-gain mode power amplifier in the low-gain mode is reduced.

The diode5021and the diode5022are connected in series, and an equivalent turn-on voltage of the diode is 2Vth. A relationship between a working state of the first-stage amplifier circuit and the second bias voltage of the second bias circuit is summarized in Table 4, and a supply voltage VCC switching point used to distinguish between the two modes is 4Vth. A working principle of the multi-gain mode power amplifier is also the same as that in the first embodiment, and details are not described herein again.

FIG. 8shows impact of variations of the resistor505on a conduction current of the diode in the second feedback circuit and impact on the gain mode when the diode is conducted. The supply voltage512(VCC) of the first-stage amplifier circuit is set to 4 V, the turn-on voltage of the diode in the second feedback circuit is 1.2 V, and such a voltage setting corresponds to a case in Table 4 in the mode 2. An area I corresponds to a case in which the second bias voltage511(Vreg) is not less than a voltage difference between the supply voltage512(VCC) and a breakover voltage (2Vth) of the diode5021and the diode5022and is not greater than a maximum value (Vreg_max) of the second bias voltage511. In this case, the transistor501is turned on, the diode5021and the diode5022are not conducted, and the gain mode of the first-stage amplifier circuit is implemented by the using transistor501. As the second bias voltage511(Vreg) decreases, a current of the transistor501decreases, and a gain of the first-stage amplifier circuit decreases. An area II corresponds to a case in which the second bias voltage511(Vreg) is not less than the voltage difference between the supply voltage (VCC) and the breakover voltage (2Vth) of the diode5021and the diode5022and is less than the breakover voltage (2Vth) of the diode5021and the diode5022. In this case, the transistor501is not turned on, the diode5021and the diode5022are not conducted, and the first-stage amplifier circuit is in a turned-off state. An area III corresponds to a case in which the second bias voltage511(Vreg) is not less than 0 and is less than the voltage difference between the supply voltage and the breakover voltage (2Vth) of the diode5021and the diode5022. In this case, the transistor501is not turned on, the diode5021and the diode5022are conducted, and an input signal is transmitted to the second-stage amplifier circuit by using the second feedback circuit to implement the low-gain mode. In the area III, different currents of the diode and different gains in the low-gain mode can be obtained by using different values of the resistor505. When the resistor505provides 100Ω, a maximum conduction current of the diode can reach 9.9 mA, and the gain in this case is 8.1 dB. When the resistor505provides 1000Ω, a conduction current of the diode is 1.2 mA, and the gain in this case is 3.6 dB.

TABLE 4Table of a relationship between a working state of thefirst-stage amplifier circuit and the second bias voltageMode 1: VCC > 4VthVreg_max ≥ Vreg ≥ VCC_2VthThe transistor is turned on, and thediode is not conductedVCC-2Vth > Vreg ≥ 2VthThe transistor is turned on, and thediode is conducted2Vth > Vreg ≥ 0The transistor is not turned on, andthe diode is conductedMode 2: VCC ≤ 4VthVreg_max ≥ Vreg ≥ 2VthThe transistor is turned on, and thediode is not conducted2Vth > Vreg ≥ VCC-2VthThe transistor is not turned on, andthe diode is not conductedVCC-2Vth > Vreg ≥ 0The transistor is not turned on, andthe diode is conducted

It should be noted that, in the multi-gain mode power amplifier provided in the first embodiment, the resistor205is connected between the first bias voltage211(Vreg) of the first bias circuit and the node209in the first feedback circuit. A forward conduction current during the conduction of the diode202can be adjusted by using the resistor205, to adjust the gain mode of the multi-gain mode power amplifier in the low-gain mode. The resistor in the structure of the multi-gain mode power amplifier provided in the second embodiment is the resistor305, the resistor in the structure of the multi-gain mode power amplifier provided in the third embodiment is the resistor405, and the resistor in the structure of the multi-gain mode power amplifier provided in the fourth embodiment is the resistor505.

In addition, the multi-gain mode power amplifier provided in the present invention is not limited to being applied to the two-stage amplifier circuit shown in the foregoing embodiments, but may further be applied to a three-stage amplifier circuit or a multi-stage amplifier circuit. For example, the three-stage amplifier circuit may be implemented by adding a stage of fixed gain structure to an existing second-stage amplifier circuit. The fixed gain structure is the second-stage amplifier circuit in an existing two-stage amplifier circuit. Alternatively, based on the three-stage amplifier circuit, the first two stages may be changed into variable gain structures, and the variable gain structures are the first-stage amplifier circuits in the existing two-stage amplifier circuit. The multi-stage amplifier circuit may include several variable gain structures and several fixed gain structures connected in cascade.

The multi-gain mode power amplifier shown in the foregoing embodiments may further be used in a communication terminal, to serve as an important part of a radio frequency circuit. The communication terminal refers to a computer device including but not limited to a mobile phone, a notebook computer, a tablet computer, an in-vehicle computer, and the like that can be used in a mobile environment and that supports various communication standards such as GSM, EDGE, TD_SCDMA, TDD_LTE, and FDD_LTE. In addition, the multi-gain mode power amplifier is also applicable to another scenario in which a multimode technology is used, for example, a communications base station compatible with various communication standards. This is not described in detail herein.

The foregoing describes in detail the multi-gain mode power amplifier, the chip, and the communication terminal provided in the present invention. For a person of ordinary skill in the art, any obvious changes made without departing from the essential spirit of the present invention shall fall within the protection scope of the present invention.