Leadframe, plastic-encapsulated semiconductor device, and method for fabricating the same

An inventive leadframe includes an outer frame, a die pad, and a plurality of leads each having land portions and connections. The land portions each have an upper surface serving as a bonding pad to be connected with a metal wiring, and a lowermost part serving as an external terminal. The connections are each devoid of its lower part so as to be thinner than the land portion, and are provided between the outer frame and the land portions, between the land portions associated with each other in each lead, and between the land portions and the die pad. Furthermore, the inventive leadframe is provided with no member that functions as a suspension lead for connecting the outer frame and the die pad to each other during plastic encapsulation.

BACKGROUND OF THE INVENTION

The present invention relates to a plastic-encapsulated semiconductor device that is plastic-encapsulated at a portion thereof in which a semiconductor chip is mounted on a leadframe, and that exposes land electrodes each serving as an external terminal at the bottom surface of the device, and also relates to a leadframe used for the plastic-encapsulated semiconductor device.

In recent years, in order to cope with the downsizing of electronic equipment, high-density packaging of semiconductor components has been more and more required. In keeping with this trend, semiconductor devices are reduced not only in size but also in thickness. Furthermore, a variety of new ideas and new devices are being tested for the reduction of production cost and the improvement of productivity. Hereinafter, a conventional leadframe used for a plastic-encapsulated semiconductor device, and how the leadframe is formed will be described.

FIG. 12shows the structure of a conventional leadframe used for a plastic-encapsulated semiconductor device disclosed in Japanese Unexamined Patent Publication No. 2001-77274. As shown inFIG. 12, the conventional leadframe includes: a die pad1001on which a semiconductor chip is to be mounted; suspension leads1003each having a tail end which is connected to an outer frame1002and a front end at which an associated one of four corners of the die pad1001is supported; and linear land leads1004and leads1005each having a front end facing the die pad1001and a tail end connected to the outer frame1002. As used herein, “suspension lead” refers to a lead that is suspended between a die pad and an outer frame of a leadframe. The bottom portions of the land leads1004and leads1005each constitute an external terminal (land portion1008). Each lead1005is formed so that, in addition to the bottom portion thereof, an outer lateral portion thereof constitutes an external terminal to be connected to a motherboard. Besides, the front end of each land lead1004is extended beyond that of each lead1005and is located closer to the die pad1001.

The die pad1001is provided with an upwardly protruding circular protrusion1006located at an approximate center of the surface of the die pad1001. The protrusion1006is formed by performing a pressing process in which a plate constituting the die pad1001is pressed so that the plate is half-sheared and is partially protruded upward. The protrusion1006substantially functions as a portion for supporting a semiconductor chip, and when a semiconductor chip has been mounted thereon, a gap is formed between the top surface of the die pad1001(except a region thereof at which the protrusion1006is formed) and the bottom surface of the semiconductor chip. At a region of the top surface of the die pad1001surrounding the protrusion1006, a groove1007is provided. When a semiconductor chip, which has been mounted on the die pad1001, is encapsulated with plastic encapsulant, the plastic encapsulant is allowed to get into the groove1007.

With the use of the leadframe formed as described above, a semiconductor chip is mounted on the die pad, connected to each lead with a metal wiring, and encapsulated with plastic encapsulant, thereby forming a plastic-encapsulated semiconductor device. In the resulting device, the bottom surface of each land portion1008whose front end is curved is located at the bottom surface of the plastic-encapsulated semiconductor device, i.e., the bottom surface of the plastic package, and the bottom portion of each lead1005whose front end is curved is located outwardly of each land portion1008so that two rows of the external terminals are arranged in a zigzag manner. Thus, a Land Grid Array (LGA) package is provided.

SUMMARY OF THE INVENTION

However, the conventional leadframe presents the following problems.

Although an LGA package in which a plurality of rows of the land portions are arranged can be obtained by using the conventional leadframe, the land portions cannot be provided at a region of the leadframe where the suspension leads1003for fixing the die pad1001exist. Therefore, restrictions are imposed when the number of the land portions (terminal electrodes) is increased.

Further, when plastic encapsulation is carried out to form a semiconductor device using the leadframe, warping of the semiconductor device occurs because the coefficients of thermal contraction of the die pad and the plastic encapsulant are different due to the existence of the suspension leads.

Furthermore, the number of process steps carried out before a sheet is affixed is increased, which contributes to an increase in the cost.

Therefore, with an eye to forming more various semiconductor devices and more numerous terminals in each semiconductor device, the object of the present invention is to provide a leadframe suitably used in fabricating a high-quality plastic-encapsulated semiconductor device with a high productivity at a low cost, a plastic-encapsulated semiconductor device formed using such a leadframe, and a method for fabricating the device.

A first inventive leadframe includes: an outer frame; a die pad; and a plurality of leads each having land portions and connections. The land portions each have an upper surface serving as a bonding pad and a lowermost part serving as an external terminal, and the connections are provided between the outer frame and the land portions, between the land portions associated with each other in each lead, and between the land portions and the die pad. In addition, in the first inventive leadframe, there exists no lead that functions as a suspension lead during plastic encapsulation.

Thus, the external terminals can be provided instead of suspension leads that have normally been provided in the corners of the die pad, and therefore, it becomes possible to obtain a plastic-encapsulated semiconductor device in which the external terminals are provided at a high density. Further, it becomes possible to suppress, for example, deformation and displacement of the die pad which are likely to occur due to the existence of the suspension leads.

In one embodiment of the first inventive leadframe, the lowermost parts of the land portions may be substantially identical in shape in plan view and may be arranged in a lattice pattern. In such an embodiment, a higher density packaging can be achieved.

In another embodiment of the first inventive leadframe, three or more rows of the lowermost parts of the land portions are preferably arranged along each side of the outer frame.

A second inventive leadframe includes: an outer frame; a die pad having a thin portion that is provided along the peripheral section of the die pad and that is devoid of its lower part, and having heat dissipating terminals protruded downward from the lower surface of the thin portion; and a plurality of leads each having land portions and connections. The land portions each have an upper surface serving as a bonding pad and a lowermost part serving as an external terminal, and the connections are provided between the outer frame and the land portions, between the land portions associated with each other in each lead, and between the land portions and the heat dissipating terminals.

Thus, when a plastic-encapsulated semiconductor device that has been formed using the leadframe is mounted on a motherboard, the external terminals and the heat dissipating terminals can be connected to, for example, electrodes of the motherboard by a ass reflow soldering process, thus carrying out the packaging more stably and easily.

In one embodiment of the second inventive leadframe, the land portions and the heat dissipating terminals may be substantially identical in shape in plan view and may be arranged in a lattice pattern. In such an embodiment, a higher density packaging can be achieved.

In another embodiment of the second inventive leadframe, the land portions and the heat dissipating terminals are preferably arranged at substantially fixed pitch intervals in at least one direction. In still another embodiment, three or more rows of the land portions are preferably arranged along each side of the outer frame.

A first inventive plastic-encapsulated semiconductor device is one that is formed using the first inventive leadframe. More specifically, the first inventive plastic-encapsulated semiconductor device includes: a die pad; a semiconductor chip; land portions each having an upper surface serving as a bonding pad to be connected with a metal wiring and a lowermost part serving as an external terminal; and a plastic encapsulant for encapsulating the semiconductor chip, land portions, die pad and so on, with the lowermost parts of the land portions and at least a part of the bottom surface of the die pad exposed, wherein the semiconductor device is provided with no member that extends from the die pad and that has its end exposed at a surface of the plastic encapsulant.

Thus, the external terminals can be provided instead of the suspension leads that have normally been provided in the corners of the die pad, and therefore, it becomes possible to obtain a plastic-encapsulated semiconductor device in which the external terminals are provided at a high density.

In one embodiment of the first inventive plastic-encapsulated semiconductor device, the external terminals may be substantially identical in shape in plan view and may be arranged in a lattice pattern at the bottom surface of the plastic encapsulant. In such an embodiment, a higher density packaging can be achieved.

In another embodiment of the first inventive plastic-encapsulated semiconductor device, three or more rows of the external terminals are preferably arranged at the bottom surface of the plastic encapsulant along the peripheral region thereof.

A second inventive plastic-encapsulated semiconductor device is one that is formed using the second inventive leadframe. More specifically, the second inventive plastic-encapsulated semiconductor device includes: a die pad having a thin portion that is provided along the peripheral section of the main body of the die pad and that is devoid of its lower part, and a plurality of heat dissipating terminals provided so as to protrude downward from the lower surface of the thin portion; a semiconductor chip; land portions each having an upper surface serving as a bonding pad to be connected with a metal wiring and a lowermost part serving as an external terminal; and a plastic encapsulant for encapsulating the semiconductor chip, land portions, leads, die pad and so on, with the lowermost parts of the land portions and the lowermost parts of the heat dissipating terminals exposed.

Thus, when the plastic-encapsulated semiconductor device is mounted on a motherboard, the external terminals and the heat dissipating terminals can be connected to, for example, electrodes of the motherboard by a mass reflow soldering process, thus carrying out the packaging more stably and easily

In one embodiment of the second inventive plastic-encapsulated semiconductor device, the external terminals and the heat dissipating terminals may be substantially identical in shape in plan view and may be arranged in a lattice pattern at the bottom surface of the plastic encapsulant. In such an embodiment, the packaging can be carried out more easily at a high density.

In another embodiment of the second inventive plastic-encapsulated semiconductor device, the external terminals and the heat dissipating terminals are preferably arranged at substantially fixed pitch intervals in at least one direction. In still another embodiment, three or more rows of the external terminals are preferably arranged at the bottom surface of the plastic encapsulant along the peripheral region thereof.

In a first inventive method for fabricating a plastic-encapsulated semiconductor device, after the first inventive leadframe has been prepared, a die bonding step is carried out, the connections of the leadframe placed on a sheet for encapsulation are cut, electrical connection is provided, and then plastic encapsulation is carried out with the encapsulation sheet affixed to the leadframe.

Thus, even if no suspension leads are provided, the electrical connection and plastic encapsulation can be provided while the positions of the die pad and the land portions are stabilized, thereby obtaining the plastic-encapsulated semiconductor device in which the external terminals are provided at a high density.

In a second inventive method for fabricating a plastic-encapsulated semiconductor device, after the second inventive leadframe has been prepared, a die bonding step is carried out, the connections of the leadframe placed on a sheet for encapsulation are cut, electrical connection is provided, and then plastic encapsulation is carried out with the encapsulation sheet affixed to the leadframe.

Thus, the electrical connection and plastic encapsulation can be provided while the positions of the die pad and the land portions are stabilized, and the heat dissipating terminals and external terminals can be aligned together so as to be protruded from the bottom surface of the plastic encapsulant, thereby obtaining the plastic-encapsulated semiconductor device that can be easily packaged on a motherboard.

In the first inventive leadframe, the plastic-encapsulated semiconductor device formed using the leadframe, and the method for fabricating the semiconductor device, no suspension leads are provided, and thus the external terminals can be provided at a high density accordingly in the resulting plastic-encapsulated semiconductor device.

In the second inventive leadframe, the plastic-encapsulated semiconductor device formed using the leadframe, and the method for fabricating the semiconductor device, the die pad is provided with the heat dissipating terminals that are arranged along with the external terminals, and thus the packaging can be more easily carried out.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Structure of Leadframe

FIGS. 1A and 1Bare a plan view of a leadframe (leadframe LF1) according to a first embodiment of the present invention, and a cross-sectional view taken along the line IB—IB shown inFIG. 1A, respectively. Actually, in the leadframe LF1, regions thereof on which a large number of semiconductor chips are to be mounted are laid out continuously in a grid pattern; however,FIG. 1Aonly shows a part of the leadframe LF1, i.e., a region thereof on which a single semiconductor chip is to be mounted. The leadframe LF1is obtained by, for example, etching or stamping a copper alloy plate.

As shown inFIGS. 1A and 1B, the leadframe LF1according to the present embodiment includes: a rectangular outer frame100including four sides that surround a region of the leadframe LF1on which a semiconductor chip is to be mounted (which region will be hereinafter called a “chip mounting region Rtp”); a die pad101which is provided at the center of the chip mounting region Rtp and on which a semiconductor chip is to be mounted; leads102each extending from the outer frame100to connect with the die pad101; and reinforcing lands103.

The leads102of the present embodiment each include land portions104and connections105which are alternately arranged. The land portions104each have a width of 20 μm to 120 μm, for example, and a thickness of 20 μm to 120 μm, for example, and the connections105each have a width of 15 μm to 100 μm, for example, and a thickness of 15 μm to 100 μm, for example. That is, each land portion104is wider and thicker than each connection105. The upper surface of each land portion104functions as a bonding pad104ato be connected with a metal wiring. In the step of packaging a semiconductor chip on the leadframe LF1, plastic encapsulation is carried out with the lower surface of each land portion104fixed onto a sheet for encapsulation which has an adhesive layer, and after the plastic encapsulation has been completed, the lowermost part of each land portion104is allowed to function as a land electrode104b(external terminal) that is protruded downward from the bottom surface of the plastic encapsulant. Via the connections105, the outer frame100and the land portions104are connected to each other, the land portions104associated with each other in each lead102are connected to each other, and the land portions104and the die pad101are connected to each other. Each connection105is allowed to be devoid of its lower part by a pressing process utilizing a die or by an etching process, and is embedded within the plastic encapsulant in the step of packaging a semiconductor chip on the leadframe LF1. The connection105are each continuous with the upper part of each land portion104, and the upper surface of each connection105and that of each land portion104constitute a common plane.

The features of the leadframe LF1according to the present embodiment will be described below. In the leadframe LF1of the present embodiment, there exists no member that has been provided in a normal leadframe and that merely functions as a suspension lead. In other words, every lead is provided with the land portion104in the present embodiment. Therefore, the die pad of the leadframe LF1of the present embodiment is not connected to the outer frame during the step of carrying out plastic encapsulation, and there is provided no lead that functions as a suspension lead during this step. That is, in the plastic-encapsulated semiconductor device formed using the lead frame LF1, there exists no lead that is extended from the die pad101and is exposed at the surface of the plastic encapsulant.

In the leadframe LF1of the present embodiment, the land portions104(i.e., the bonding pads104aand land electrodes104b) are also provided on lines that connect the corners of the die pad101and outer frame100together. Further, in the leadframe LF1of the present embodiment, there exist leads102x(or102y) each having one end that is connected to one side of the outer frame100and the other end that is connected, in the vicinity of the associated corner, to other lead102y(or102x) extending from the other side of the outer frame100adjacent to the one side thereof. In other words, there exist the leads102x(or102y) that are connected to the die pad101via the other leads102y(or102x). Furthermore, the leadframe LF1of the present embodiment is provided with the reinforcing lands103each directly connected to the outer fame100in the vicinity of the corner thereof and having an area (e.g., a diameter of 300 μm to 1500 μm) considerably larger than that of each land portion104.

The land electrodes (external terminals)104b, which are the lowermost parts of the land portions104, are substantially identical in shape in plan view, and are arranged in a lattice pattern. In this case, “substantially identical” means that they are identical when variations caused during fabrication are not taken into consideration.

In the leadframe LF1of the present embodiment, in the vicinities of the corners of the die pad101and outer frame100, no suspension leads are provided but the leads extending from adjacent two sides of the outer frame100are connected to each other, thus making it possible to form a plastic-encapsulated semiconductor device in which a plurality of rows of the land electrodes104b(external terminals) are provided along each side of the outer frame100including the vicinities of the corners of the die pad101. If suspension leads exist in the corners of the die pad and outer frame as in the conventional leadframe, a land electrode can be provided in a part of each suspension lead. In that case, however, each suspension lead is connected to the die pad, and therefore, the land electrode provided in a part of each suspension lead is only used as a simple reinforcing one or as a terminal (e.g., a ground terminal) whose potential is equal to that of the die pad. On the other hand, in the leadframe LF1of the present embodiment, the land electrodes each functioning as a signal terminal can also be provided in the vicinity of each corner of the die pad101, and thus the land electrodes can be provided at a high density. In other words, restrictions on the location and the number of the land electrodes can be relaxed.

Further, as will be described later, in the step of carrying out plastic encapsulation using the leadframe LF1of the present embodiment, each land electrode104b(land portion104) and the die pad101are spaced apart and disconnected from each other, and are supported on a sheet for encapsulation in this state. Thus, it becomes possible to disperse the warping of the semiconductor device, which occurs due to a difference between the thermal contraction coefficient of the leadframe main body and that of the plastic encapsulant, and therefore, the amount of warping of the overall semiconductor device can be reduced.

In the leadframe LF1of the present embodiment, the reinforcing lands103, each having a large circular pattern, are provided in the corners of the outer frame100. Therefore, when the plastic-encapsulated semiconductor device is packaged on a motherboard (i.e., when a secondary packaging is carried out), the strength of the connection between the plastic-encapsulated semiconductor device and the motherboard, which is provided by solder or the like, can be increased.

However, the reinforcing lands103do not necessarily have to be provided in the leadframe LF1of the present embodiment. If the reinforcing lands103do not exist, the land electrodes (land portions) can be provided in the space made available by providing no reinforcing lands103, and thus the land electrodes can be provided at a higher density.

Fabrication Process of Plastic-Encapsulated Semiconductor Device

Described below is an exemplary fabrication process of a plastic-encapsulated semiconductor device in which the leadframe LF1of the present embodiment is used.FIGS. 2A and 2Bare a plan view illustrating the step of upsetting the center of the die pad which is included in the fabrication process of the plastic-encapsulated semiconductor device of the first embodiment, and a cross-sectional view taken along the line IIIB—IIIB shown inFIG. 2A, respectively.FIGS. 3A and 3Bare a plan view illustrating the step of placing the leadframe on a sheet for encapsulation which is included in the fabrication process of the plastic-encapsulated semiconductor device of the first embodiment, and a cross-sectional view taken along the line IIIB—IIIB shown inFIG. 3A, respectively.FIGS. 4A and 4Bare a plan view illustrating the step of dividing the leads which is included in the fabrication process of the plastic-encapsulated semiconductor device of the first embodiment, and a cross-sectional view taken along the line IVB—IVB shown inFIG. 4A, respectively.FIG. 5is a partial cross-sectional view illustrating the step of carrying out plastic encapsulation which is included in the fabrication process of the plastic-encapsulated semiconductor device of the first embodiment. AndFIGS. 6A and 6Bare a cross-sectional view, which is taken along the line VIA—VIA, for illustrating the structure of the plastic-encapsulated semiconductor device of the first embodiment after the plastic encapsulation step has been completed, and a bottom view of the semiconductor device, respectively.

First, in the step shown inFIGS. 2A and 2B, a metal plate made of an alloy whose major constituent is copper (Cu) or made of an iron (Fe) and nickel (Ni) alloy is integrally molded by stamping or etching, and the leadframe LF1having the structure shown inFIGS. 1A and 1Bis prepared. Next, the leadframe LF1is subjected to a pressing process by utilizing an upper die for half-shearing and a lower die for pressing (both the dies are not shown), thereby forming a circular protrusion101aon the die pad101. Although this step is carried out in order to upset a semiconductor chip and support it on the die pad101, the protrusion101adoes not necessarily have to be provided. Furthermore, the leadframe LF1is partially or entirely subjected to plating that is required for the connection of the leadframe LF1with the semiconductor chip or the packaging thereof. The leadframe LF1may be given Ag plating, Au plating, Ni—Pd—Au plating or the like.

Next, in the step shown inFIGS. 3A and 3B, an encapsulation sheet150is affixed to the bottom surface of the leadframe LF1, i.e., the lower surfaces of the main body of the die pad101, reinforcing lands103and land portions104, so that the encapsulation sheet150is brought into intimate contact with these lower surfaces. Provided at the upper surface of the encapsulation sheet150is an adhesive layer, and via this adhesive layer, the die pad101, the reinforcing lands103and the land portions104of the leads102are isolatedly fixed onto the encapsulation sheet150.

Then, in the step shown inFIGS. 4A and 4B, the leads102are divided into cut portions Ct1, Ct2and Ct3by carrying out a pressing process using a die with the leadframe LF1fixed on the encapsulation sheet150. That is, the leads102are cut at the connections105between the land portions104and the die pad101, at the connections105between the land portions104associated with each other in each lead102, and at the connections between the land portions104and the outer frame100, thus isolating the die pad101and each land portion104.

Subsequently, although not shown, a die bonding step and a wire bonding step are carried out. In the die bonding step, a semiconductor chip160is mounted on the die pad101in each chip mounting region Rtp of the leadframe LF1that is placed onto the encapsulation sheet150, and in the wire bonding step, pad electrodes of the semiconductor chip160and the bonding pads104aof the land portions104are connected to each other with metal wirings170each serving as a connecting member.

Then, as shown inFIG. 5, the leadframe LF1is set in a die for encapsulation which includes an upper die member180aand a lower die member180band has a die cavity therebetween. Specifically, the leadframe LF1is set in the encapsulation die so that the semiconductor chip160, the metal wirings170and so on are located within the die cavity, and the die cavity is filled with plastic encapsulant with the upper and lower die members180aand180bpressed towards each other.

After the plastic encapsulation step has been completed, the encapsulation sheet150is removed from the leadframe LF1and the plastic encapsulant, and then a large number of plastic-encapsulated semiconductor devices provided on the leadframe LF1are each cut out, thus obtaining the plastic-encapsulated semiconductor devices each having the structure shown inFIGS. 6A and 6B. It is to be noted that in the cross section shown inFIG. 6A, the transverse size of the right half is scaled down so as to correspond to that of the left half.

As shown inFIGS. 6A and 6B, each land electrode104b, which is the lowermost part of each land portion104of the leadframe LF1, the lowermost part of the die pad101and the lowermost part of each reinforcing land103are protruded downward from plastic encapsulant190. In particular, it can be seen that a plurality of rows of the land electrodes104bare arranged at fixed pitch intervals (spacing) P1in the longitudinal and transverse directions inFIG. 6B, and that the land electrodes104bare arranged also in the vicinity of each corner. In the resulting plastic-encapsulated semiconductor device, there exists no lead that is extended from the die pad101and is exposed at the surface of the plastic encapsulant.

The spacing between the land electrodes104bdoes not necessarily have to be fixed, and even if they are arranged at fixed pitch intervals, the pitch between the land electrodes104bin the longitudinal direction inFIG. 6Bmay be different from the pitch between the land electrodes104bin the transverse direction in FIG.6B. However, if the land electrodes104bare arranged at fixed pitch intervals in this way, the plastic-encapsulated semiconductor device compliant with the standards of the actual semiconductor device can be obtained.

In the plastic-encapsulated semiconductor device of the present embodiment, there exist no suspension leads that have conventionally been provided, and furthermore, the connections105, which are narrower and thinner than the land portions104, are provided between the die pad101and the land portions104of the leads102, between the land portions104associated with each other in each lead102, and between the land portions104and the outer frame100. Therefore, in the step shown inFIGS. 4A and 4B, the leads102can be easily cut between the land portions104associated with each other in each lead102and between the land portions104and the outer frame100with the semiconductor chip160mounted on the leadframe LF1, and the wire bonding step and/or the plastic encapsulation step can be carried out with no connecting members provided between the die pad101and the outer frame100.

Accordingly, the fabricators can be saved from having to carry out etching, stamping or the like for the formation of the suspension leads, and it becomes possible to obtain the plastic-encapsulated semiconductor device in which the land electrodes104bare provided at a high density as shown inFIGS. 6A and 6B.

FIGS. 7A and 7Bare a plan view of a leadframe (leadframe LF2) according to a second embodiment of the present invention, and a cross-sectional view taken along the line VIIB—VIIB shown inFIG. 7A, respectively. Actually, in the leadframe LF2, regions thereof on which a large number of semiconductor chips are to be mounted are laid out continuously in a grid pattern; however,FIG. 7Aonly shows a part of the leadframe LF2, i.e., a region thereof on which a single semiconductor chip is to be mounted. The leadframe LF2is obtained by, for example, etching or stamping a copper alloy plate.

As shown inFIGS. 7A and 7B, the leadframe LF2according to the present embodiment includes: a rectangular outer frame200including four sides that surround a chip mounting region Rtp; a die pad201which is provided at the center of the chip mounting region Rtp and on which a semiconductor chip is to be mounted; leads202each extending from the outer frame200to connect with the die pad201; reinforcing lands203; and heat dissipating terminals201bthat are provided at the peripheral section of the die pad201and are connected to the leads202.

The leads202of the present embodiment each include land portions204and connections205which are alternately arranged. The land portions204each have a width of 20 μm to 120 μm, for example, and a thickness of 20 μm to 120 μm, for example, and the connections205each have a width of 15 μm to 100 μm, for example, and a thickness of 15 μm to 100 μm, for example. That is, each land portion204is wider and thicker than each connection205. The upper surface of each land portion204functions as a bonding pad204ato be connected with a metal wiring. In the step of packaging a semiconductor chip on the leadframe LF2, plastic encapsulation is carried out with the lower surface of each land portion204fixed onto an encapsulation sheet that has an adhesive layer, and after the plastic encapsulation has been completed, the lowermost part of each land portion204is allowed to function as a land electrode204bthat is protruded downward from the bottom surface of the plastic encapsulant. Via the connections205, the outer frame200and the land portions204are connected to each other, the land portions204associated with each other in each lead202are connected to each other, and the land portions204and the heat dissipating terminals201bof the die pad201are connected to each other. Each connection205is allowed to be devoid of its lower part by a pressing process utilizing a die or by an etching process, and is embedded within the plastic encapsulant in the step of packaging a semiconductor chip on the leadframe LF2. The connections205are each continuous with the upper part of each land portion204, and the upper surface of each connection205and that of each land portion204constitute a common plane.

The features of the leadframe LF2according to the present embodiment will be described below. In the leadframe LF2of the present embodiment, there exists no suspension lead that has been provided in a normal leadframe and that only has the function of supporting the die pad. Furthermore, since the leads202, through which the die pad201of the leadframe LF2of the present embodiment is connected to the outer frame200, are divided, the die pad201is disconnected from the outer frame200during the step of carrying out plastic encapsulation, and there is provided no lead that functions as a suspension lead during this step. In the leadframe LF2of the present embodiment, the land portions204(i.e., the bonding pads204aand land electrodes204b) are also provided on lines that connect the corners of the die pad201and outer frame200together. Besides, in the leadframe LF2of the present embodiment, there exist leads202x(or202y) each having one end that is connected to one side of the outer frame200and the other end that is not directly connected to the die pad201but connected, in the vicinity of the associated corner, to other lead202y(or202x) extending from the other side of the outer frame200adjacent to the one side thereof. In other words, there exist the leads202x(or202y) that extend from one side of the outer frame200and that are connected to the die pad201via the other leads202y(or202x) extending from the other side of the outer frame200adjacent to the one side thereof. Furthermore, in the vicinities of the corners of the outer frame200, the leadframe LF2of the present embodiment is provided with the reinforcing lands203each having an area (e.g., a diameter of 300 μm to 1500 μm) considerably larger than that of each land portion204.

In addition to the features of the leadframe LF1of the first embodiment, the leadframe LF2of the second embodiment further has the following feature. The peripheral section of the die pad201is devoid of its lower part so as to form a thin portion201c, and the heat dissipating terminals201bare provided at the thin portion201cso as to protrude downward from the lower surface thereof. The heat dissipating terminals201bare each formed into such a shape by carrying out a half-etching or pressing process so that the peripheral section of the die pad201is devoid of its lower part while portions thereof to be used as the heat dissipating terminals201bare left.

In the present embodiment, the land electrodes (external terminals)204b, which are the lowermost parts of the land portions204, and the lowermost parts of the heat dissipating terminals201bare substantially identical in shape in plan view, and are arranged in a lattice pattern. In this case, “substantially identical” means that they are identical when variations caused during fabrication are not taken into consideration. However, the land electrodes (external terminals)204b, i.e., the lowermost parts of the land portions204, and the lowermost parts of the heat dissipating terminals201bdo not necessarily have to be substantially identical in shape in plan view. Even if these lowermost parts are not substantially identical in shape in plan view, the after-mentioned basic effects can be achieved.

Since the heat dissipating terminals201bare provided, the leadframe LF2of the present embodiment can achieve, in addition to the effects of the first embodiment, the following exceptional effects.

Suppose that a plastic-encapsulated semiconductor device with a Land Grid Array (LGA) structure is fabricated using the leadframe LF1of the first embodiment. In that case, when the leads102are cut between the land portions104and the die pad101by a stamping process, the leads102might be deformed after they have been cut. Therefore, to avoid such a problem, it is required that the connections105between the land portions104and the die pad101be longer than the connections105between the land portions104associated with each other in each lead102, as shown inFIGS. 1A and 1B. However, in the future, as the number of the land electrodes will be increased, the shape of the leads after stamping is expected to increase in complexity, which will be more likely to cause deformation and might reduce productivity.

If the die pad201is provided with the heat dissipating terminals201bas in the second embodiment, the land portions204and die pad201can be smoothly detached from the outer frame200while the deformation of the leads202is being suppressed in the after-mentioned step of cutting the leads202. As a result, the connections205for connecting the land portions204at the extreme ends of the leads202to the heat dissipating terminals201bcan be reduced in length, and thus the land portions204(and the land electrodes204b) can be provided at a higher density.

Due to the existence of the heat dissipating terminals201b, when the after-mentioned plastic-encapsulated semiconductor device is packaged on a motherboard, only the heat dissipating terminals201band land electrodes204bcan be connected to, for example, electrodes of the motherboard by a mass reflow soldering process without connecting the main body of the die pad201, which is likely to cause connection failure, to the motherboard. Even if the main body of the die pad201is not connected to the motherboard, the heat generated in the semiconductor chip is allowed to quickly dissipate to the motherboard through the heat dissipating terminals201b. The present embodiment is provided in view of the fact that heat dissipating function is saturated if the area of heat dissipation exceeds a certain level, and therefore, the total area of the lower surfaces of the plurality of heat dissipating terminals201bis set so that the heat generated in the semiconductor chip is quickly dissipated to the motherboard and the function of each semiconductor element provided on the semiconductor chip is not degraded. Accordingly, the heat dissipating function of the plastic-encapsulated semiconductor device, in which the leadframe of the second embodiment is used, can be maintained at the substantially same level as that of the plastic-encapsulated semiconductor device of the first embodiment.

Fabrication Process of Plastic-encapsulated Semiconductor Device

Described below is an exemplary fabrication process of a plastic-encapsulated semiconductor device in which the leadframe LF2of the present embodiment is used.FIGS. 8A and 8Bare a plan view illustrating the step of upsetting the center of the die pad and placing the leadframe on an encapsulation sheet which is included in the fabrication process of the plastic-encapsulated semiconductor device of the second embodiment, and a cross-sectional view taken along the line VIIIB—VIIIB shown inFIG. 8A, respectively.FIGS. 9A and 9Bare a plan view illustrating the step of dividing the leads which is included in the fabrication process of the plastic-encapsulated semiconductor device of the second embodiment, and a cross-sectional view taken along the line IXB—IXB shown inFIG. 9A, respectively. AndFIGS. 10A and 10Bare a cross-sectional view, which is taken along the line XA—XA, for illustrating the structure of the plastic-encapsulated semiconductor device of the second embodiment after plastic encapsulation has been completed, and a bottom view of the semiconductor device, respectively.

First, in the step shown inFIGS. 8A and 8B, a metal plate made of an alloy whose major constituent is copper (Cu) or made of an iron (Fe) and nickel (Ni) alloy is integrally molded by stamping or etching, and the leadframe LF2having the structure shown inFIGS. 7A and 7Bis prepared. Next, the leadframe LF2is subjected to a pressing process by utilizing an upper die for half-shearing and a lower die for pressing (both the dies are not shown), thereby forming a circular protrusion201aon the die pad201. Although this step is carried out in order to upset a semiconductor chip and support it on the die pad201, the protrusion201adoes not necessarily have to be provided. Furthermore, the leadframe LF2is partially or entirely subjected to plating that is required for the connection of the leadframe LF2with the semiconductor chip or the packaging thereof. The leadframe LF2may be given Ag plating, Au plating, Ni—Pd—Au plating or the like.

Next, an encapsulation sheet250is affixed to the bottom surface of the leadframe LF2, i.e., the lower surfaces of the die pad201, reinforcing lands203and land portions204, so that the encapsulation sheet250is brought into intimate contact with these lower surfaces. Provided at the upper surface of the encapsulation sheet250is an adhesive layer, and via this adhesive layer, the main body of the die pad201, the heat dissipating terminals201bof the die pad201, the reinforcing lands203and the land portions204of the leads202are isolatedly fixed onto the encapsulation sheet250.

Then, in the step shown inFIGS. 9A and 9B, the leads202are cut at the connections205by carrying out a pressing process using a die with the leadframe LF2fixed onto the encapsulation sheet250. In this step, the leads202are cut at the connections205between the land portions204of the leads202and the heat dissipating terminals201bof the die pad201, at the connections205between the land portions204associated with each other in each lead202, and at the connections205between the land portions204and the outer frame200so that the die pad201and each land portion204are isolated. In this case, there exists no connecting member for connecting the die pad201to the outer frame200.

Subsequently, although not shown, a die bonding step and a wire bonding step are carried out. In the die bonding step, a semiconductor chip260is mounted on the die pad201in each chip mounting region Rtp of the leadframe LF2that is placed onto the encapsulation sheet250, and in the wire bonding step, pad electrodes of the semiconductor chip260and the bonding pads204aof the land portions204are connected to each other with metal wirings270each serving as a connecting member.

Then, as in the step shown inFIG. 5in the first embodiment, the leadframe LF2is set in an encapsulation die that includes an upper die member180aand a lower die member180band has a die cavity therebetween. Specifically, the leadframe LF2is set in the encapsulation die so that the semiconductor chip260, the metal wirings270and so on are located within the die cavity, and the die cavity is filled with plastic encapsulant with the upper and lower die members180aand180bpressed toward each other.

After the step of carrying out plastic encapsulation has been completed, the encapsulation sheet250is removed from the leadframe LF2and plastic encapsulant, and then a large number of plastic-encapsulated semiconductor devices provided on the leadframe LF2are each cut out, thus obtaining the plastic-encapsulated semiconductor devices each having the structure shown inFIGS. 10A and 10B. It is to be noted that in the cross section shown inFIG. 10A, the transverse size of the right half is scaled down so as to correspond to that of the left half.

As shown inFIGS. 10A and 10B, each land electrode204b, which is the lowermost part of each land portion204of the leadframe LF2, the lowermost part of the main body of the die pad201, the lowermost part of each heat dissipating terminal201bof the die pad201, and the lowermost part of each reinforcing land203are protruded downward from plastic encapsulant290. In particular, it can be seen that a plurality of rows (three or more rows) of the heat dissipating terminals201band land electrodes204bare arranged at fixed pitch intervals (spacing) P2in the longitudinal and transverse directions inFIG. 10B, and the heat dissipating terminals201band the land electrodes204bare arranged also in the vicinity of each corner.

When the plastic-encapsulated semiconductor device is packaged on the motherboard afterward, it is sufficient to connect the land electrodes204band heat dissipating terminals201bto the associated electrodes of the motherboard by a mass reflow soldering process, and in this case, it is unnecessary to connect the main body of the die pad201to the motherboard.

In the plastic-encapsulated semiconductor device of the present embodiment, there exist no suspension leads that have conventionally been provided, and furthermore, the connections205, which are narrower and thinner than the land portions204, are provided between the die pad201and the land portions204of the leads202, between the land portions204associated with each other in each lead202, and between the land portions204and the outer frame200. Therefore, in the step shown inFIGS. 9A and 9B, the leads202can be easily cut between the land portions204associated with each other in each lead202and between the land portions204and the outer frame200with the semiconductor chip260mounted on the leadframe LF2, and the wire bonding step and/or the plastic encapsulation step can be carried out with no connecting member provided between the die pad201and the outer frame200.

Accordingly, the fabricators can be saved from having to carry out etching, stamping or the like for the formation of the suspension leads, and since the heat dissipating terminals201bare provided as already described above, the land electrodes204bcan be provided at a density higher than that at which the land electrodes104aare provided in the first embodiment.

Besides, since the die pad201is provided with the heat dissipating terminals201b, the heat dissipating terminals201band land electrodes204bcan be connected to, for example, the electrodes of the motherboard by a mass reflow soldering process in the step of packaging the plastic-encapsulated semiconductor device. That is, when the plastic-encapsulated semiconductor device is packaged, it is unnecessary to connect the main body of the die pad201to the motherboard for heat dissipation; therefore, the occurrence of connection failure can be reduced, and the packaging can be easily completed while the heat dissipating property of the plastic-encapsulated semiconductor device is being maintained at a high level.

The spacing between the heat dissipating terminals201band the land electrodes204b, and the spacing between the land electrodes204bdo not necessarily have to be fixed, and even if they are arranged at fixed pitch intervals, the pitch in the longitudinal direction inFIG. 10Bmay be different from the pitch in the transverse direction in FIG.10B. However, it is particularly preferable that the heat dissipating terminals201band the land portions204are substantially identical in shape in plan view, and that the connections205between the heat dissipating terminals201band the land portions204and the connections205between the land portions204associated with each other in each lead202are substantially identical in shape in plan view. In such a case, since the heat dissipating terminals201band the land electrodes204bare provided at fixed pitch intervals, the mass reflow soldering process can be easily carried out, thus easily carrying out the packaging of the plastic-encapsulated semiconductor device.

Other Embodiments

FIGS. 11A and 11Bare a plan view of a leadframe (leadframe LF3) according to a modified example of the second embodiment of the present invention, and a cross-sectional view taken along the line XIB—XIB shown inFIG. 11A, respectively. Actually, in the leadframe LF3, regions thereof on which a large number of semiconductor chips are to be mounted are laid out continuously in a grid pattern; however,FIG. 11Aonly shows a part of the leadframe LF3, i.e., a region thereof on which a single semiconductor chip is to be mounted. The leadframe LF3is obtained by, for example, etching or stamping a copper alloy plate.

As shown inFIGS. 11A and 11B, the leadframe LF3according to the modified example includes: a rectangular outer frame300including four sides that surround a chip mounting region Rtp; a die pad301which is provided at the center of the chip mounting region Rtp and on which a semiconductor chip is to be mounted; leads302extending from the outer frame300to connect with the die pad301; reinforcing lands303; and heat dissipating terminals301bthat are provided at the peripheral section of the die pad301and are connected to the lead302.

The leads302of the modified example each include land portions304and connections305which are alternately arranged. The land portions304each have a width of 20 μm to 120 μm, for example, and a thickness of 20 μm to 120 μm, for example, and the connections305each have a width of 15 μm to 100 μm, for example, and a thickness of 15 μm to 100 μm, for example. That is, each land portion304is wider and thicker than each connection305. The upper surface of each land portion304functions as a bonding pad304ato be connected with a metal wiring. In the step of packaging a semiconductor chip on the leadframe LF3, plastic encapsulation is carried out with the lower surface of each land portion304fixed onto an encapsulation sheet having an adhesive layer, and after the plastic encapsulation has been completed, the lowermost part of each land portion304is allowed to function as a land electrode304bthat is protruded downward from the bottom surface of the plastic encapsulant. Via the connections305, the outer frame300and the land portions304are connected to each other, the land portions304associated with each other in each lead302are connected to each other, and the land portions304and the heat dissipating terminals301bof the die pad301are connected to each other. Each connection305is allowed to be devoid of its lower part by a pressing process utilizing a die or by an etching process, and is embedded within the plastic encapsulant in the step of packaging a semiconductor chip on the leadframe LF3. The connections305are each continuous with the upper part of each land portion304, and the upper surface of each connection305and that of each land portion304constitute a common plane.

In the leadframe LF3of the modified example, there exist leads each functioning as a suspension lead during the step of carrying out plastic encapsulation. To be more specific, in the leadframe LF3of the modified example, unlike the leadframe LF2of the second embodiment, there are provided suspension leads309that are directly connected to the die pad301in the vicinities of the corners thereof. Therefore, unlike the second embodiment, there exists no lead having one end connected to one side of the outer frame300and the other end connected to the other lead extending from the other side of the outer frame300adjacent to the one side thereof. In the leadframe LF3, each lead302x(or302y), provided in the vicinity of a corner of the outer frame300and connected to one side of the outer frame300, is connected with another lead302x(or302y) extending from the one side of the outer frame300.

Also in the leadframe LF3of the modified example, in the vicinities of the corners of the outer frame300, there are provided the reinforcing lands303each having an area (e.g., a diameter of 300 μm to 1500 μm) considerably larger than that of each land portion304.

In the modified example, like the second embodiment, the heat dissipating property can be improved and the land electrodes304bcan be provided at a high density due to the existence of the heat dissipating terminals301b. However, since the suspension leads309are provided in the modified example, the density at which the land electrodes304bare provided in the modified example is lower than that at which the land electrodes204bare provided in the second embodiment; on the other hand, the die pad301can be more stably held during the step of cutting the leads302in the modified example than in the second embodiment.

In the first embodiment, second embodiment and modified example thereof, the connections may be provided between the land portions of the adjacent leads. In such a case, the land portions are connected in a lattice pattern in both of the longitudinal and transverse directions, and therefore, the shape of the leadframe can be more stably kept until the leads are cut.

The inventive leadframe and plastic-encapsulated semiconductor device are applicable as electronic components to be provided in personal computers, household electrical appliances and communications equipment.