Reference clock compensation in DVB-H receivers

A wireless receiver providing multiple services (FIG. 3) is disclosed. The wireless receiver includes an oscillator circuit (304, FIG. 4) arranged to produce a reference frequency (308). A first receiver (302) receives a first signal (300) having a first carrier frequency in response to the reference frequency. A second receiver (322) receives a second signal (320) having a second carrier frequency different from the first carrier frequency in response to the reference frequency.

BACKGROUND OF THE INVENTION

The present embodiments relate to wireless communications systems and, more particularly, to reference clock frequency compensation for Digital Video Broadcast-Handheld (DVB-H) and other wireless communication systems.

Wireless communications are prevalent in business, personal, and other applications, and as a result the technology for such communications continues to advance in various areas. One such advancement includes the use of spread spectrum communications, including that of code division multiple access (CDMA) which includes wideband code division multiple access (WCDMA) cellular communications. In CDMA communications, user equipment (UE) (e.g., a hand held cellular phone, personal digital assistant, or other) communicates with a base station, where typically the base station corresponds to a “cell.” CDMA communications are by way of transmitting symbols from a transmitter to a receiver, and the symbols are modulated using a spreading code which consists of a series of binary pulses. The code runs at a higher rate than the symbol rate and determines the actual transmission bandwidth. In the current industry, each piece of CDMA signal transmitted according to this code is said to be a “chip,” where each chip corresponds to an element in the CDMA code. Thus, the chip frequency defines the rate of the CDMA code. WCDMA includes alternative methods of data transfer, one being frequency division duplex (FDD) and another being time division duplex (TDD), where the uplink and downlink channels are asymmetric for FDD and symmetric for TDD.

The Global System for Mobile (GSM) communications is another common wireless standard. Most GSM systems use either 900 MHz or 1800 MHz bands. The 900 MHz band is divided into an 890-915 MHz uplink frequency band and a 935-960 MHz downlink frequency band. Each 25 MHz bandwidth is divided into 124 carrier frequency channels spaced 200 kHz apart. Each carrier frequency channel transmits and receives over eight time division multiple access (TDMA) time slots in each TDMA frame. TDMA communications are transmitted as a group of packets in a time period, where the time period is divided into time slots so that multiple receivers may access meaningful information during a different part of that time period. In other words, in a group of TDMA receivers, each receiver is designated a time slot in the time period, and that time slot repeats for each group of successive packets transmitted to the receiver. Accordingly, each receiver is able to identify the information intended for it by synchronizing to the group of packets and then deciphering the time slot corresponding to the given receiver. Given the preceding, CDMA transmissions are receiver-distinguished in response to codes, while TDMA transmissions are receiver-distinguished in response to time slots.

New standards for Digital Video Broadcast (DVB) standards are currently being developed to permit streaming video reception by portable user equipment. DVB typically uses carrier frequencies in the 470-800 MHz band. DVB packets or data streams are transmitted by Orthogonal Frequency Division Multiplex (OFDM) transmission with time slicing. With OFDM, multiple symbols are transmitted on multiple carriers that are spaced apart to provide orthogonality. An OFDM modulator typically takes data symbols into a serial-to-parallel converter, and the output of the serial-to-parallel converter is considered as frequency domain data symbols. The frequency domain tones at either edge of the band may be set to zero and are called guard tones. These guard tones allow the OFDM signal to fit into an appropriate spectral mask. Some of the frequency domain tones are set to values which will be known at the receiver, and these tones are termed pilot tones or symbols. These pilot symbols can be useful for channel estimation at the receiver. An inverse fast Fourier transform (IFFT) converts the frequency domain data symbols into a time domain waveform. The IFFT structure allows the frequency tones to be orthogonal. A cyclic prefix is formed by copying the tail samples from the time domain waveform and appending them to the front of the waveform. The time domain waveform with cyclic prefix is termed an OFDM symbol, and this OFDM symbol may be upconverted to an RF frequency and transmitted. An OFDM receiver may recover the timing and carrier frequency and then process the received samples through a fast Fourier transform (FFT). The cyclic prefix may be discarded and after the FFT, frequency domain information is recovered. The pilot symbols may be recovered to aid in channel estimation so that the data sent on the frequency tones can be recovered.

Referring toFIG. 1, rectangles100and102represent DVB packets of a current data stream104. The time between the start of DVB packets100and102is the delta-t time. Time between the DVB packets100and102is off time. The delta-t time is transmitted with other header information in each DVB packet to inform the DVB-H receiver when the next packet will arrive. The delta-t time is relative rather than absolute, so the DVB-H clock only needs to accurately measure the time from one packet to the next packet. Moreover, if a packet is lost, the DVB-H receiver may continue to monitor the carrier frequency104until the next packet arrives. This form of time slicing advantageously permits the DVB-H receiver to enter a low power mode or sleep mode after packet100is received. The DVB-H receiver subsequently wakes up in response to a timed interrupt to receive the next data packet102. This method of operation greatly reduces power consumption by the DVB-H receiver and prolongs battery life. Alternatively, the DVB-H receiver may use this time between packets to monitor alternative carrier frequencies of nearby cells. These alternative carrier frequencies are provided in a Network Information Table (NIT) for each network.

Mobile handsets of the prior art use a different crystal oscillator circuit for each wireless service. Each crystal oscillator circuit is relatively expensive and may comprise more than 10% of the receiver module cost. Each additional mobile handset service, therefore, significantly increases the total cost of the handset. Thus, the present inventors have recognized a need for a cost effective reference frequency oscillator circuit that is compatible with multiple wireless services.

BRIEF SUMMARY OF THE INVENTION

A wireless receiver of the present invention provides a reference frequency from a single oscillator circuit for multiple wireless receivers. The wireless receiver includes a first receiver arranged to receive a first signal having a first carrier frequency in response to the reference frequency. The wireless receiver also includes a second receiver arranged to receive a second signal having a second carrier frequency different from the first carrier frequency in response to the reference frequency. Other devices, systems, and methods are also disclosed and claimed.

DETAILED DESCRIPTION OF THE INVENTION

Referring now toFIG. 2, there is an exemplary GSM network and a DVB multi-frequency network (MFN). As will become apparent in the following discussion, GSM and DVB as well as other services such as WCDMA and Global Positioning System (GPS) services may be employed in a single mobile handset. The GSM network includes cells206,208, and210. The MFN includes cells200,202, and204operating at frequencies f1, f2, and f3, respectively. GSM cells206,208,210are much smaller than the DVB cells200,202,204to indicate the relative difference in transmit power of the base stations. GSM transmit power is relatively smaller than DVB transmit power to reduce interference with other base stations. Additionally, GSM handsets are preferably limited to 2 watts of transmit power and, therefore, limit the size of the GSM cell. DVB cells are subject to different constraints. DVB transmits signals to many different users in a single frequency cell so that interference is minimal. Moreover, cell size is not limited by transmit power of the mobile handset. Thus, DVB transmit power is much greater than GSM transmit power.

Arrow212represents a mobile handset moving between GSM cells206and208. A handover from GSM cell206to GSM cell208may produce significant variations in the GSM carrier frequency. During the GSM handover the mobile handset remains in DVB cell200. The carrier frequency f1of DVB cell200, therefore, remains relatively unchanged during the GSM handover. The handover of one service while another service remains relatively unchanged produces a significant problem for different services using the same oscillator reference frequency. Although GSM pilot symbols may be used to detect and compensate for carrier frequency variations in the oscillator reference frequency circuit, this compensation should not erroneously compensate for DVB carrier frequency variations. Such erroneous compensation would produce read errors and degrade Doppler performance.

Turning now toFIG. 3, there is a schematic diagram of a multiple service wireless handset of the present invention. The handset includes three separate receivers. Since each receiver operates on a different carrier frequency, each receiver has a separate antenna. For example, GSM receiver302is coupled to antenna300, DVB-H receiver322is coupled to antenna320, and GPS receiver332is coupled to antenna330. Each receiver is further coupled to application processor340by bus310. Application processor340exchanges baseband signals with each receiver, performs appropriate signal processing operations, and sends resulting signals to respective peripheral devices342. These peripheral devices preferably include a microphone, speaker, liquid crystal display (LCD), and other appropriate devices. Bus310includes data, address, and control signal lines to direct operation of each receiver. In particular, bus310preferably includes interrupt control signal lines as will be discussed in detail. The multiple service wireless handset also includes voltage controlled crystal oscillator (VCXO)304. The VCXO304produces a reference frequency of preferably 38.4 MHz on lead308. This reference frequency is supplied to each receiver (302,322, and332). Each receiver subsequently produces an appropriate multiplied frequency for down conversion of received signals by respective radio frequency (RF) front ends. The VCXO304receives control signals on lead306from GSM receiver302. These control signals adjust the VCXO reference frequency as necessary to compensate for GSM carrier frequency changes due to handovers from one cell to another as well as other factors.

Turning now toFIG. 4, there is a circuit diagram of GSM receiver302showing circuit elements that are relevant to the present invention. In this embodiment of The GSM receiver302includes a radio frequency (RF) front end400, an analog-to-digital (A/D) converter402, a demodulator circuit404, and a processor circuit406. The RF front end includes a low noise amplifier (LNA)410coupled to antenna300. The output of LNA410is applied to mixer412. The RF front end400further includes voltage controlled crystal oscillator (VCXO) circuit304and voltage controlled oscillator (VCO)416. In operation, VCXO304generates a reference frequency of preferably 38.4 MHz at lead308. VCO416multiplies this reference frequency and applies the output to mixer412. Mixer412mixes the output of VCO416with the output of LNA410to produce a down converted baseband signal. The down converted baseband signal is filtered by analog baseband filter (BB)414. The analog baseband signal is then applied to A/D converter402to produce a digital baseband signal.

Demodulator circuit404receives and demodulates the digital baseband signal from A/D converter402. In particular, demodulator circuit404includes digital frequency correction circuit420, digital baseband filter (DBB)422, and frequency offset estimate circuit424. In operation, digital frequency correction circuit420receives signals from A/D converter402together with a correction signal on lead426. The correction signal on lead426corrects the frequency of the received signal by a phase locked loop (PLL) and applies the output to digital baseband (DBB) filter422. The output of DBB filter422is then applied to frequency offset estimate circuit424to produce a new frequency offset estimate. A preferred embodiment of the frequency offset estimate circuit424uses pilot symbols to estimate the frequency offset. Alternative embodiments may use other known data signals to produce the new frequency offset estimate. The new frequency offset estimate is then applied to processor circuit406.

Processor circuit406includes a correction computation circuit430. The correction computation circuit430performs several major tasks. First, it produces a correction signal on lead426that is applied to digital frequency correction circuit420. Second, it produces a digital correction signal that is applied to digital-to-analog (D/A) circuit428. This digital correction signal corresponds to a received carrier frequency change at the GSM receiver. As previously mentioned, these carrier frequency changes may be due to cell-to-cell handovers in the GSM network, Doppler shift, temperature variation, or other factors. D/A circuit428converts the digital correction signal to an analog correction signal on lead306. The analog correction signal on lead306is applied to VCXO304to adjust the reference frequency on lead308. The reference frequency on lead308compensates for carrier frequency change in the GSM receiver302. The reference frequency on lead308is also applied to other receivers of the wireless handset. These other receivers, however, may not require carrier frequency compensation. A third task of computational correction circuit430, therefore, is to transmit a frequency correction signal to the other receivers on bus310. This frequency correction signal on bus310tells the other receivers (322and332) the change of the VCXO reference frequency on lead308and permits them to compensate for the modified reference frequency on lead308.

Referring now toFIG. 5, there is a circuit diagram of DVB-H receiver322showing circuit elements that are relevant to the present invention. The GPS receiver332includes similar features of the present invention, so only the DVB-H receiver322will be discussed in detail. The DVB-H receiver322includes a radio frequency (RF) front end500, an analog-to-digital (A/D) converter502, a demodulator circuit504, and a processor circuit506. The RF front end includes a low noise amplifier (LNA)510coupled to antenna320. The output of LNA510is applied to mixer512. The RF front end500further includes voltage controlled oscillator (VCO) circuit516. In operation, VCO516receives a reference frequency of preferably 38.4 MHz at lead308from VCXO304. VCO516multiplies this reference frequency and applies the output to mixer512. Mixer512mixes the output of VCO516with the output of LNA510to produce a down converted baseband signal. The down converted baseband signal is filtered by analog baseband filter (BB)514. The analog baseband signal is then applied to A/D converter502to produce a digital baseband signal.

Demodulator circuit504receives and demodulates the digital baseband signal from A/D converter502. In particular, demodulator circuit504includes digital frequency correction circuit520, digital baseband filter (DBB)522, and frequency offset estimate circuit524. In operation, digital frequency correction circuit520receives signals from A/D converter502together with a correction signal on lead526. The correction signal on lead526corrects the frequency of the received signal by a phase locked loop (PLL) and applies the output to digital baseband (DBB) filter522. The output of DBB filter522is then applied to frequency offset estimate circuit524to produce a new frequency offset estimate. A preferred embodiment of the frequency offset estimate circuit524uses pilot symbols to estimate the frequency offset. Alternative embodiments may use other known data signals to produce the new frequency offset estimate. The new frequency offset estimate is then applied to processor circuit506. Processor circuit506includes a correction computation circuit530. The correction computation circuit530performs several major tasks. First, it receives a frequency correction signal on bus310from processor circuit406. Second, it produces a new correction signal on lead526that is applied to digital frequency correction circuit520.

Referring now toFIG. 6, there is a flow chart showing operation of the GSM302and DVB-H322receivers of the present invention. The flow chart is organized to show operation of the GSM receiver302on the left and the DVB-H receiver322on the right. Solid lines indicate transfer of control. Dashed lines indicate signal flow. Operation of the GSM receiver302begins with an update of the voltage controlled crystal oscillator (VCXO)304frequency at block600. As previously discussed, this is due to some variation in the GSM carrier frequency. Decision block602determines whether an interrupt signal to indicate a reference frequency modification is active. This interrupt signal notifies other receivers of an update to the VCXO reference frequency. If the interrupt signal is not currently active, it is set to active mode by block604. Next block606adds the frequency change Δf to any previous reference frequency modification. The interrupt signal is then applied620to the DVB-H receiver322via bus310. Decision block612determines if the DVB-H receiver is in sleep mode. If it is in sleep mode, no action is taken until the DVB-H wakes up after delta-t (FIG. 1). After the DVB-H wakes up, decision block614determines if the interrupt signal is active. If the interrupt signal is inactive, no action is taken. Alternatively, if the interrupt signal is active, the DVB-H clears the interrupt signal and requests the current Δf622at block616. At block608, the GSM receiver sends the current accumulated Δf624to block618of the DVB-H receiver via bus310. The current Δf is then applied to digital frequency correction circuit520as indicated by block618. The GSM receiver then clears the Δf accumulator at block610and waits for the next VCXO update at block600.

The current Δf from the GSM receiver is used to negate the reference frequency update of the GSM receiver in the DVB-H receiver. This advantageously permits the use of a single voltage controlled crystal oscillator (VCXO) for multiple receivers in a wireless handset. The DVB-H receiver maintains a stable reference frequency even with reference frequency adjustments in the GSM receiver. Total cost of the wireless handset is reduced according to the present invention. Both receivers accurately track their respective carrier frequencies, thereby avoiding read errors and degraded Doppler performance.

Still further, while numerous examples have thus been provided, one skilled in the art should recognize that various modifications, substitutions, or alterations may be made to the described embodiments while still falling with the inventive scope as defined by the following claims. For example, in the foregoing embodiment the GSM receiver302is the master and produces the VCXO reference frequency, and the DVB-H receiver322is the slave and receives the VCXO reference. In alternative embodiments, any receiver might be the master and the other receivers would be slaves. In yet another embodiment, the master is selectable and the unselected receivers are slaves.