Method of making improved lateral polysilicon diode by treating plasma etched sidewalls to remove defects

An improved lateral polysilicon diode in an integrated circuit structure is disclosed. The diode is characterized by low reverse current leakage, a breakdown voltage of at least 5 volts, and low series resistance permitting high current flow before being limited by saturation. The polysilicon diode comprises a polysilicon substrate having a first zone sufficiently doped to provide a first semiconductor type and a second zone sufficiently doped to provide a second semiconductor type whereby the junction between the two zones forms a diode. The lateral edges of the diode are treated to remove defects to thereby inhibit current leakage around the edges of the lateral diode to lower the reverse current leakage of the diode.

BACKGROUND OF THE INVENTION 
1. Technical Field of the Invention 
This invention relates to an improved lateral polysilicon diode and a 
method for forming same in an integrated circuit device. 
2. Background Art 
In general, the fabrication of a lateral diode in a film or layer of 
polysilicon, i.e., polycrystalline silicon, is well known to those skilled 
in the art. However, such diodes usually have high reverse current leakage 
if the polysilicon is doped sufficiently to lower the series resistance to 
provide satisfactory current flow before the diode saturates. The effects 
of dopant concentration on both forward current-voltage characteristics as 
well as reverse current leakage was discussed by Manoliu et al in "P-N 
Junctions in Polycrystalline-Silicon Films", Solid State Electronics, 
Volume 15, 1972, at pages 1103-1106. 
Dutoit et al in "Lateral Polysilicon p-n Diodes" published in the Journal 
of Electrochem. Society: Solid-State Science and Technology, Volume 125, 
Number 10, October, 1978, at pages 1648-1651, stated that high value 
resistors or leaky diodes required in integrated circuits could easily be 
implemented using lateral polysilicon diodes. Dutoit et al noted that an 
excess reverse current, not accounted for by classical theories, was 
observed in heavily doped diodes. 
While it is known that lowering the amount of doping will, in turn, lower 
the reverse current leakage of such polysilicon diodes, this has the 
undesirable effect of raising the series resistance of the diode which 
will cause it to saturate at too low a voltage resulting in low current 
flow. 
Mandurah et al in "A Model for Conduction in Polycrystalline Silicon - Part 
I: Theory", in the IEEE Transactions on Electron Devices, Volume ED-28, 
Number 10, October, 1981, at pages 1163-1171, discussed some of the 
theories or models used to explain the resistivity variations with doping 
concentrations in polycrystalline silicon. Both the carrier-trapping model 
and the dopant-segregation model were discussed by the authors who 
proposed that the conduction may be a combining of the mechanisms of 
dopant-segregation, carrier-trapping and carrier-reflection at the grain 
boundaries of the polycrystalline silicon. Grain boundaries were assumed 
to behave as an intrinsic wide-band-semiconductor forming a heterojunction 
with the grains. 
However, despite the amount of research and postulation as to the 
conduction phenomena occurring in P-N junctions formed from 
polycrystalline silicon, the fact still remains that if polysilicon is 
sufficiently doped to lower the series resistance to provide acceptable 
forward voltage drops, such high doping not only reduces the series 
resistance but also increases the reverse current leakage as well as 
reducing the breakdown voltage of the device. 
It would, therefore, be desirable to fabricate a diode from polysilicon 
having reduced reverse current leakage while still maintaining a low 
enough series resistance to permit high forward current flow without 
saturating. 
SUMMARY OF THE INVENTION 
It is therefore an object of the invention to provide a lateral diode 
constructed of polycrystalline silicon characterized by a low reverse 
current leakage as well as low series resistance. 
It is another object of this invention to provide a diode constructed of 
polycrystalline silicon characterized by low reverse current leakage as 
well as low series resistance wherein reverse current leakage is reduced 
by repairing the damaged sidewalls of the polysilicon diode as it is 
formed. 
It is yet another object of this invention to provide a diode constructed 
of polycrystalline silicon characterized by a low reverse current leakage 
as well as low series resistance whereby current leakage is reduced by 
etching the damaged sidewalls of the polysilicon diode as it is formed to 
repair damage thereto and a protective layer of oxide is placed over the 
repaired sidewalls. 
It is a further object of the invention to provide a process of 
construction of a lateral polydiode which is self aligned, whereby the 
junction formed is defined by the structure of the diode. 
These and other objects of the invention will be apparent from the 
description and accompanying drawings.

DESCRIPTION OF THE PREFERRED EMBODIMENT 
The novel polysilicon diode of the invention may be fabricated and utilized 
in connection with either bipolar or MOS type devices. FIGS. 2-6, which 
illustrate the step by step construction of the polysilicon diode, 
therefore merely illustrate the underlying integrated circuit structure as 
a substrate 10. 
Referring now to FIG. 2, the substrate 10, representing a typical 
underlying integrated circuit structure, is shown with a polysilicon layer 
20 thereon having a thickness of 3000 to 6000 Angstroms deposited thereon 
depending upon the desired current carrying capacity of the diode. A 
buffer oxide layer 30 of silicon dioxide, having a typical thickness of 
350 Angstroms, is thermally grown over polysilicon layer 20. A slow 
oxidizing layer, which may be removable independent of the oxide layer, 
such as a silicon nitride layer 40, is then formed over the oxide layer 30 
by deposition of a nitride, from ammonia and a silicon-containing material 
such as silane, to provide a layer typically about 1000 Angstroms thick. 
Turning now to FIG. 3, the resulting three layer structure is masked and 
etched using a suitable plasma etch, such as SF.sub.6, to etch the 
nitride, oxide and polysilicon layers leaving behind portion 22 of the 
polysilicon layer, together with, respectively, portions 32 and 42 of the 
oxide and nitride layers thereon. Portion 22 will ultimately form the 
polysilicon diode. 
In accordance with the invention, the sidewall 24 of polysilicon portion 22 
is then wet etched with a chemical etch, such as chromium trioxide to 
remove any defects formed in the lateral edges or polysilicon sidewall 24 
by the plasma etch. Preferably about 300-400 Angstroms of sidewall 24 is 
etched away to provide a smooth surface. Thermal oxide, i.e., silicon 
dioxide, is then grown, as shown at 50, over the newly etched side surface 
to a thickness sufficient to protect the sidewall surface during further 
processing, preferably about 800-1000 Angstroms. 
In FIG. 5, the device is shown after masking to define contacts areas 44 
and 46 in nitride portion 42. The silicon nitride between contact areas 44 
and 46 is then etched away using a suitable etchant, such as hot 
phosphoric acid. Thermal oxide is then grown at this point to provide a 
layer 60 of silicon dioxide of about 3500 Angstroms thick. This thickness 
is limited by the oxide quality and may be thinner if a good quality oxide 
can be grown. At the same time, a further increment or layer 52 of thermal 
oxide is grown over silicon dioxide layer 50 on sidewall 24. This provides 
a total silicon dioxide thickness of more than 3500 Angstroms around 
sidewall 24 of the polysilicon diode. 
Polysilicon portion 22 is now doped by implanting boron at a dose or 
concentration of from 1.times.10.sup.14 to 1.times.10.sup.15 atoms per 
cm.sup.-2 and using an energy level sufficient to pass through the oxide 
and nitride layers, preferably about 180 KEV. At this energy level the 
boron dopant will penetrate the nitride contact areas 44 and 46 as well as 
silicon dioxide layers 60 and 32 to dope the polysilicon portion 22 to 
form a P or P+ region. It should be noted here that the amount of dopant 
used in this step is preselected to obtain the desired series resistance. 
Unlike prior art construction, the repairing of defects in polysilicon 
sidewall 24 lowers the reverse current leakage sufficiently to permit such 
doping levels, proving the fact that the surface leakage is the major 
contributor of reverse leakage and not junction leakage. 
Following the boron implant, nitride contact portions 44 and 46 are 
chemically wet etched with phosphoric acid to remove the nitride. As shown 
in FIG. 6, a layer of photoresist 70 is then placed over the device. 
Photoresist layer 70 is then masked to expose contact 26, i.e., the area 
in polysilicon 22 previously defined by overlying nitride contact area 46. 
An N+ doped region is then formed in contact area 26 by implanting 
phosphorus or arsenic at a dose or concentration of from 1.times.10.sup.15 
to 1.times.10.sup.16 atoms per cm.sup.-2 at 180 KEV. The phosphorus or 
arsenic dopant, at this energy level and concentration, will only 
penetrate the polysilicon layer at portion 26, i.e., it will not pass 
through photoresist layer 70 or oxide layer 60. After removing photoresist 
layer 70, the implant is then annealed at 1000.degree. C. for about 30 
minutes. It should be noted here that the position of the photoresist mask 
over region 26 is not critical because oxide portions 50, 52, and 60 
beneath the photoresist mask will provide self alignment for the formation 
of N+ contact region 26. Metal contacts are then applied using 
conventional masking techniques well known to those skilled in the art. 
Turning now to FIG. 7, a lateral polysilicon diode, constructed in 
accordance with the invention, is shown in connection with the base and 
emitter of a bipolar transistor. The polysilicon layer 122 has been doped 
to provide a P+ region with a P+ contact 125. A layer of silicon dioxide 
160 separates P+ contact 125 from N+ contact 126. In accordance with the 
invention, sidewall oxide 150 has been grown around sidewall 124 of 
polysilicon layer 122 after etching of the sidewall to remove defects 
caused by the initial plasma etching to define the polysilicon used to 
construct the diode. As shown in the drawings, field oxide portions 180 
and 182 wall off emitter 190 and base 194 of the bipolar transistor from 
adjacent devices. 
In FIG. 8, both the leakage current and the forward current of a lateral 
polysilicon diode constructed in accordance with the invention are plotted 
to show the low reverse current leakage as well as the high forward 
current which is indicative of the high doping levels used. It will be 
seen that, surprisingly, despite the high doping levels used to obtain the 
resulting high current as the voltage approaches 2 volts, the reverse 
leakage current of the diode remains at low nanoamperes until the reverse 
voltage bias approaches -5 volts. When tested, the device was further 
found to have a reverse breakdown voltage level of over 5 volts. 
Thus, the invention provides a novel lateral polysilicon diode which may be 
constructed on an integrated circuit structure wherein the diode is 
characterized by high forward current with low series resistance while 
exhibiting low reverse current leakage by repairing the damage to the 
sidewalls of the polysilicon diode as it is constructed and providing a 
protective thermal oxide layer around the repaired polysilicon sidewall. 
While we do not wish to be bound by any particular theory of operation, it 
appears that repairing the damaged sidewall reduces the number of defects, 
which, in turn, reduces in some manner the amount of reverse current which 
would otherwise leak around the sides or edges of the diode. Minor 
modifications may be made in the construction of the novel diode of the 
invention without departing from the spirit of the invention as defined by 
the appended claims.