Biomedical signal sensing circuit

A biomedical signal sensing circuit including a first and a second modulation unit, an amplifying unit, a first and a second demodulation unit is provided. The first modulation unit performs a first modulation operation to a first biomedical signal according to a first signal to generate a first modulation signal. The second modulation unit performs a second modulation operation to a second biomedical signal according to a second signal to generate a second modulation signal. The amplifying unit amplifies the first and second modulation signals, and adds the amplified first and second modulation signals to generate a third modulation signal. The first demodulation unit performs a first demodulation operation to the third modulation signal according to the first signal to generate a first sensing signal. The second demodulation unit performs a second demodulation operation to the third modulation signal according to the second signal to generate a second sensing signal.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims the priority benefit of Taiwan application serial no. 102141664, filed on Nov. 15, 2013. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification.

BACKGROUND

Technical Field

The invention relates to a sensing circuit. Particularly, the invention relates to a biomedical signal sensing circuit.

Related Art

Along with development of technology and progress of the times, people pay more and more attention to personal health, and various health-related industries are quickly developed. In order to accurately grasp various biomedical signals on human body, various manufactures have developed a wide range of instruments for measuring biomedical signals, for example, an electrocardiograph (ECG) machine, an electroencephalogram (EEG) machine, etc.

However, in a current biomedical signal sensing circuit, when a plurality of biomedical signals are simultaneously sensed, a plurality of independently operated sensing circuit has to be used for sensing. Since each of the sensing circuits has a little mismatch, outputs of the sensing circuits have to be summed and fed back to input terminals of the sensing circuits according to a common-mode feedback method, so as to increase a common-mode rejection ratio (CMRR). However, such method not only wastes a chip fabrication area, but also causes extra power consumption.

SUMMARY

The invention provides a biomedical signal sensing circuit including a first modulation unit, a second modulation unit, an amplifying unit, a first demodulation unit and a second demodulation unit. The first modulation unit receives a first biomedical signal, and performs a first modulation operation to the first biomedical signal according to a first signal to generate a first modulation signal. The second modulation unit receives a second biomedical signal, and performs a second modulation operation to the second biomedical signal according to a second signal to generate a second modulation signal. The second signal is orthogonal to the first signal. The amplifying unit is coupled to the first modulation unit and the second modulation unit, and amplifies the first modulation signal and the second modulation signal, and adds the amplified first and second modulation signals to generate a third modulation signal. The first demodulation unit is coupled to the amplifying unit, and performs a first demodulation operation to the third modulation signal according to the first signal to generate a first sensing signal. The second demodulation unit is coupled to the amplifying unit, and performs a second demodulation operation to the third modulation signal according to the second signal to generate a second sensing signal.

In an embodiment of the invention, the first modulation unit includes a first multiplier, and the first multiplier multiplies the first biomedical signal with the first signal to generate the first modulation signal. The second modulation unit includes a second multiplier, and the second multiplier multiplies the second biomedical signal with the second signal to generate the second modulation signal.

In an embodiment of the invention, the first signal is a sine wave, and the second signal is a cosine wave orthogonal to the sine wave.

In an embodiment of the invention, the amplifying unit includes a first capacitor, a second capacitor, a third capacitor and an operational amplifier. The first capacitor has a first terminal and a second terminal. The first terminal of the first capacitor receives the first modulation signal. The second capacitor has a first terminal and a second terminal. The first terminal of the second capacitor receives the second modulation signal. The third capacitor has a first terminal and a second terminal. The first terminal of the third capacitor is coupled to the second terminal of the first capacitor and the second terminal of the second capacitor. The operational amplifier has a first input terminal, a second input terminal and an output terminal. The first input terminal of the operational amplifier is coupled to the second terminal of the first capacitor. The second input terminal of the operational amplifier is coupled to a ground potential. The output terminal of the operational amplifier is coupled to the first demodulation unit and the second demodulation unit.

In an embodiment of the invention, the first modulation signal includes a first signal component and a second signal component. The first signal component is inverted to the second signal component. The second modulation signal includes a third signal component and a fourth signal component. The third signal component is inverted to the fourth signal component. The amplifying unit includes a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor and an operational amplifier. The first capacitor has a first terminal and a second terminal. The first terminal of the first capacitor receives the first signal component. The second capacitor has a first terminal and a second terminal. The first terminal of the second capacitor receives the second signal component. The third capacitor has a first terminal and a second terminal. The first terminal of the third capacitor receives the third signal component. The second terminal of the third capacitor is coupled to the second terminal of the first capacitor. The fourth capacitor has a first terminal and a second terminal. The first terminal of the fourth capacitor receives the fourth signal component. The second terminal of the fourth capacitor is coupled to the second terminal of the second capacitor. The fifth capacitor has a first terminal and a second terminal. The first terminal of the fifth capacitor is coupled to the second terminal of the first capacitor. The sixth capacitor has a first terminal and a second terminal. The first terminal of the sixth capacitor is coupled to the second terminal of the second capacitor. The operational amplifier has a first input terminal, a second input terminal, a first output terminal and a second output terminal. The first input terminal of the operational amplifier is coupled to the second terminal of the first capacitor. The second input terminal of the operational amplifier is coupled to the second terminal of the second capacitor. The first output terminal of the operational amplifier is coupled to the second terminal of the fifth capacitor. The second output terminal of the operational amplifier is coupled to the second terminal of the sixth capacitor.

In an embodiment of the invention, the third modulation signal includes a first component and a second component. The first component is inverted to the second component. The first sensing signal includes a third component and a fourth component. The third component is inverted to the fourth component. The second sensing signal includes a fifth component and a sixth component. The fifth component is inverted to the sixth component. The first demodulation unit has a first input terminal, a second input terminal, a third input terminal, a first output terminal and a second output terminal. The first input terminal of the first demodulation unit is coupled to the first output terminal of the operational amplifier to receive the first component. The second input terminal of the first demodulation unit is coupled to the second output terminal of the operational amplifier to receive the second component. The third input terminal of the first demodulation unit receives the first signal. The first output terminal of the first demodulation unit outputs the third component. The second output terminal of the first demodulation unit outputs the fourth component. The second demodulation unit has a first input terminal, a second input terminal, a third input terminal, a first output terminal and a second output terminal. The first input terminal of the second demodulation unit is coupled to the first output terminal of the operational amplifier to receive the first component. The second input terminal of the second demodulation unit is coupled to the second output terminal of the operational amplifier to receive the second component. The third input terminal of the second demodulation unit receives the second signal. The first output terminal of the second demodulation unit outputs the fifth component. The second output terminal of the second demodulation unit outputs the sixth component.

In an embodiment of the invention, the first biomedical signal includes a first differential signal component and a second differential signal component. The first differential signal component is inverted to the second differential signal component. The second biomedical signal includes a third differential signal component and a fourth differential signal component. The third differential signal component is inverted to the fourth differential signal component. The first signal includes a first portion and a second portion. The first portion is inverted to the second portion. The second signal includes a third portion and a fourth portion. The third portion is inverted to the fourth portion. The first modulation unit has a first input terminal, a second input terminal, a third input terminal, a fourth input terminal, a first output terminal and a second output terminal. The first input terminal of the first modulation unit receives the first differential signal component. The second input terminal of the first modulation unit receives the second differential signal component. The third input terminal of the first modulation unit receives the first portion. The fourth input terminal of the first modulation unit receives the second portion. The second modulation unit has a first input terminal, a second input terminal, a third input terminal, a fourth input terminal, a first output terminal and a second output terminal. The first input terminal of the second modulation unit receives the third differential signal component. The second input terminal of the second modulation unit receives the fourth differential signal component. The third input terminal of the second modulation unit receives the third portion. The fourth input terminal of the second modulation unit receives the fourth portion. The first output terminal of the second modulation unit is coupled to the second output terminal of the first modulation unit.

In an embodiment of the invention, the amplifying unit includes a first capacitor, a second capacitor, a third capacitor, a fourth capacitor and an operational amplifier. The first capacitor has a first terminal and a second terminal. The first terminal of the first capacitor is coupled to the first output terminal of the first modulation unit for receiving the first modulation signal. The second capacitor has a first terminal and a second terminal. The first terminal of the second capacitor is coupled to the second output terminal of the second modulation unit for receiving the second modulation signal. The third capacitor has a first terminal and a second terminal. The first terminal of the third capacitor is coupled to the second terminal of the first capacitor. The fourth capacitor has a first terminal and a second terminal. The first terminal of the fourth capacitor is coupled to the second terminal of the second capacitor. The operational amplifier has a first input terminal, a second input terminal, a first output terminal and a second output terminal. The first input terminal of the operational amplifier is coupled to the second terminal of the first capacitor. The second input terminal of the operational amplifier is coupled to the second terminal of the second capacitor. The first output terminal of the operational amplifier is coupled to the second terminal of the third capacitor. The second output terminal of the operational amplifier is coupled to the second terminal of the fourth capacitor.

In an embodiment of the invention, the first modulation unit includes a first transistor, a second transistor, a third transistor and a fourth transistor. The first transistor has a first terminal, a second terminal and a control terminal. The first terminal of the first transistor receives the first differential signal component. The control terminal of the first transistor receives the second portion. The second transistor has a first terminal, a second terminal and a control terminal. The first terminal of the second transistor receives the first differential signal component. The control terminal of the second transistor receives the first portion. The third transistor has a first terminal, a second terminal and a control terminal. The first terminal of the third transistor receives the second differential signal component. The control terminal of the third transistor receives the first portion. The second terminal of the third transistor is coupled to the second terminal of the first transistor. The fourth transistor has a first terminal, a second terminal and a control terminal. The first terminal of the fourth transistor receives the second differential signal component, and the control terminal of the fourth transistor receives the second portion. The second terminal of the fourth transistor is coupled to the second terminal of the second transistor. The second modulation unit includes a fifth transistor, a sixth transistor, a seventh transistor and an eighth transistor. The fifth transistor has a first terminal, a second terminal and a control terminal. The first terminal of the fifth transistor receives the third differential signal component. The control terminal of the fifth transistor receives the fourth portion. The sixth transistor has a first terminal, a second terminal and a control terminal. The first terminal of the sixth transistor receives the third differential signal component. The control terminal of the sixth transistor receives the third portion. The seventh transistor has a first terminal, a second terminal and a control terminal. The first terminal of the seventh transistor receives the fourth differential signal component. The control terminal of the seventh transistor receives the third portion. The second terminal of the seventh transistor is coupled to the second terminal of the fifth transistor. The eighth transistor has a first terminal, a second terminal and a control terminal. The first terminal of the eighth transistor receives the fourth differential signal component. The control terminal of the eighth transistor receives the fourth portion. The second terminal of the eighth transistor is coupled to the second terminal of the sixth transistor.

In an embodiment of the invention, the third modulation signal includes a first component and a second component. The first component is inverted to the second component. The first sensing signal includes a third component and a fourth component. The third component is inverted to the fourth component. The second sensing signal includes a fifth component and a sixth component. The fifth component is inverted to the sixth component. The first demodulation unit has a first input terminal, a second input terminal, a third input terminal, a fourth input terminal, a first output terminal and a second output terminal. The first input terminal of the first demodulation unit is coupled to the first output terminal of the operational amplifier to receive the first component. The second input terminal of the first demodulation unit is coupled to the second output terminal of the operational amplifier to receive the second component. The third input terminal of the first demodulation unit receives the first portion. The fourth input terminal of the first demodulation unit receives the second portion. The first output terminal of the first demodulation unit outputs the third component. The second output terminal of the first demodulation unit outputs the fourth component. The second demodulation unit has a first input terminal, a second input terminal, a third input terminal, a fourth input terminal, a first output terminal and a second output terminal. The first input terminal of the second demodulation unit is coupled to the first output terminal of the operational amplifier to receive the first component. The second input terminal of the second demodulation unit is coupled to the second output terminal of the operational amplifier to receive the second component. The third input terminal of the second demodulation unit receives the third portion. The fourth input terminal of the second demodulation unit receives the fourth portion. The first output terminal of the second demodulation unit outputs the fifth component. The second output terminal of the second demodulation unit outputs the sixth component.

In an embodiment of the invention, the first demodulation unit includes a ninth transistor, a tenth transistor, an eleventh transistor and a twelfth transistor. The ninth transistor has a first terminal, a second terminal and a control terminal. The first terminal of the ninth transistor receives the first component. The control terminal of the ninth transistor receives the second portion. The tenth transistor has a first terminal, a second terminal and a control terminal. The first terminal of the tenth transistor receives the first component. The control terminal of the tenth transistor receives the first portion. The eleventh transistor has a first terminal, a second terminal and a control terminal. The first terminal of the eleventh transistor receives the second component. The control terminal of the eleventh transistor receives the first portion. The second terminal of the eleventh transistor is coupled to the second terminal of the ninth transistor. The twelfth transistor has a first terminal, a second terminal and a control terminal. The first terminal of the twelfth transistor receives the second component, and the control terminal of the twelfth transistor receives the second portion. The second terminal of the twelfth transistor is coupled to the second terminal of the tenth transistor. The second demodulation unit includes a thirteenth transistor, a fourteenth transistor, a fifteenth transistor and a sixteenth transistor. The thirteenth transistor has a first terminal, a second terminal and a control terminal. The first terminal of the thirteenth transistor receives the first component. The control terminal of the thirteenth transistor receives the fourth portion. The fourteenth transistor has a first terminal, a second terminal and a control terminal. The first terminal of the fourteenth transistor receives the first component. The control terminal of the fourteenth transistor receives the third portion. The fifteenth transistor has a first terminal, a second terminal and a control terminal. The first terminal of the fifteenth transistor receives the second component. The control terminal of the fifteenth transistor receives the third portion. The second terminal of the fifteenth transistor is coupled to the second terminal of the thirteenth transistor. The sixteenth transistor has a first terminal, a second terminal and a control terminal. The first terminal of the sixteenth transistor receives the second component. The control terminal of the sixteenth transistor receives the fourth portion. The second terminal of the sixteenth transistor is coupled to the second terminal of the fourteenth transistor.

According to the above descriptions, the biomedical signal sensing circuit of the invention is capable of simultaneously processing a plurality of biomedical signals through a plurality of modulation units and demodulation units, so as to correspondingly generate a plurality of sensing signals that do not interfere with each other according to the biomedical signals.

DETAILED DESCRIPTION OF DISCLOSED EMBODIMENTS

FIG. 1is a functional block diagram of a biomedical signal sensing circuit according to an embodiment of the invention. In the present embodiment, the biomedical signal sensing circuit100includes a first modulation unit110, a second modulation unit120, an amplifying unit130, a first demodulation unit140and a second demodulation unit150.

The first modulation unit110receives a first biomedical signal BS1, and performs a first modulation operation to the first biomedical signal BS1according to a first signal S1to generate a first modulation signal MS1. In an embodiment, the first modulation unit110is, for example, a first multiplier, which multiplies the first biomedical signal BS1by the first signal S1to generate the first modulation signal MS1.

The second modulation unit120receives a second biomedical signal BS2, and performs a second modulation operation to the second biomedical signal BS2according to a second signal S2to generate a second modulation signal MS2. In an embodiment, the second modulation unit120is, for example, a second multiplier, which multiplies the second biomedical signal BS2by the second signal S2to generate the second modulation signal MS2.

In an embodiment, the first biomedical signal BS1and the second biomedical signal BS2are, for example, electrocardiogram (ECG) signals, electroencephalogram (EEG) signals or other physiological measurement signals.

In an embodiment, the second signal S2is orthogonal to the first signal S1. For example, the first signal S1is, for example, a sine wave, and the second signal S2is, for example, a cosine wave orthogonal to the sine wave. Alternatively, in other embodiments, the first signal S1and the second signal S2can be respectively implemented by pseudo random codes orthogonal to each other, or other signals orthogonal to each other.

The amplifying unit130is coupled to the first modulation unit110and the second modulation unit120. The amplifying unit130amplifies the first modulation signal MS1and the second modulation signal MS2, and adds the amplified first and second modulation signals MS1and MS2to generate a third modulation signal MS3. The first demodulation unit140is coupled to the amplifying unit130, and performs a first demodulation operation to the third modulation signal MS3according to the first signal S1to generate a first sensing signal SS1. The second demodulation unit150is coupled to the amplifying unit130, and performs a second demodulation operation to the third modulation signal MS3according to the second signal S2to generate a second sensing signal SS2.

Since the first signal S1and the second signal S2are orthogonal to each other, even if the third modulation signal MS3includes the added and amplified first and second modulation signals MS1and MS2, the first demodulation unit140and the second demodulation unit150can still eliminate an influence of the other modulation signal when performing the first and second demodulation operations, so as to obtain a correct measuring result. For example, when the first demodulation unit140performs the first demodulation operation to the third modulation signal MS3according to the first signal S1, since the first signal S1is orthogonal to a component of the second signal S2in the second modulation signal MS2, the first demodulation unit140can eliminate the influence of the second modulation signal MS2from the third modulation signal MS3, so as to generate the first sensing signal SS1not including the component related to the second modulation signal MS2. On the other hand, when the second demodulation unit150performs the second demodulation operation to the third modulation signal MS3according to the second signal S2, since the second signal S2is orthogonal to a component of the first signal S1in the first modulation signal MS1, the second demodulation unit150can eliminate the influence of the first modulation signal MS1from the third modulation signal MS3, so as to generate the second sensing signal SS2not including the component related to the first modulation signal MS1.

According to another aspect, since the first signal S1and the second signal S2are orthogonal to each other, the biomedical signal sensing circuit100can process a plurality of biomedical signals simultaneously by only including the single amplifying unit130, such that the biomedical signal sensing circuit100may achieve a smaller volume and lower implementation cost.

Moreover, those skilled in the art should understand that the biomedical signal sensing circuit100may also include other modulation units and corresponding demodulation units. In this case, as long as the signals (for example, the first signal S1and the second signal S2) according which each of the modulation units and the corresponding demodulation unit perform the modulation operation and the demodulation operation are orthogonal to each other, the biomedical signal sensing circuit100can simultaneously receive a plurality of biomedical signals, and correspondingly generate a plurality of sensing signals that do not influence each other.

FIG. 2is a schematic diagram of a biomedical signal sensing circuit according to the embodiment ofFIG. 1. In the present embodiment, the biomedical signal sensing circuit200includes a first modulation unit210, a second modulation unit220, an amplifying unit230, a first demodulation unit240and a second demodulation unit250. The first modulation unit210, the second modulation unit220, the first demodulation unit240and the second demodulation unit250can be respectively implemented by multipliers, though the invention is not limited thereto.

The first modulation unit210receives the first biomedical signal BS1, and multiplies the first biomedical signal BS1by the first signal S1to generate the first modulation signal MS1, and the second modulation unit220receives the second biomedical signal BS2, and multiplies the second biomedical signal BS2by the second signal S2to generate the second modulation signal MS2.

The amplifying unit230includes a first capacitor C21, a second capacitor C22, a third capacitor C23and an operational amplifier235. The first capacitor C21has a first terminal and a second terminal. The first terminal of the first capacitor C21receives the first modulation signal MS1. The second capacitor C22has a first terminal and a second terminal. The first terminal of the second capacitor C22receives the second modulation signal MS2. The third capacitor C23has a first terminal and a second terminal. The first terminal of the third capacitor C23is coupled to the second terminal of the first capacitor C21and the second terminal of the second capacitor C22. The operational amplifier235has a first input terminal, a second input terminal and an output terminal. The first input terminal of the operational amplifier235is coupled to the second terminal of the first capacitor C21. The second input terminal of the operational amplifier235is coupled to a ground potential GND. The output terminal of the operational amplifier235is coupled to the first demodulation unit240and the second demodulation unit250.

In detail, the first modulation signal MS1and the second modulation signal MS2can be respectively a first voltage signal and a second voltage signal, and the two voltage signals can be respectively converted into a first current signal and a second current signal by the first capacitor C21and the second capacitor C22. Then, the two current signals can be added to produce a third current signal at the second terminal of the first capacitor C21(i.e. the second terminal of the second capacitor C22). Thereafter, the operational amplifier235amplifies the third current signal to generate the third modulation signal MS3.

Then, the first demodulation unit240receives the third modulation signal MS3and multiplies the same by the first signal S1to generate the first sensing signal SS1. Moreover, the second demodulation unit250receives the third modulation signal MS3and multiplies the same by the second signal S2to generate the second sensing signal SS2.

Similar to the instructions of the embodiment ofFIG. 1, since the first signal S1is orthogonal to the second signal S2, when the first demodulation unit240multiplies the third modulation signal MS3by the first signal S1, the first demodulation unit240can correspondingly eliminate the component related to the second modulation signal MS2from the third modulation signal MS3, so as to generate the first sensing signal SS1not including the component related to the second modulation signal MS2. Similarly, the second demodulation unit250can also generate the second sensing signal SS2not including the component related to the first modulation signal MS1, and details thereof are not repeated.

In other embodiments, the biomedical signal sensing circuit200may further include a first low-pass filter260and a second low-pass filter270. The first low-pass filter260is coupled to the first demodulation unit240, and performs a first low-pass filtering operation to the first sensing signal SS1to generate a first filtering signal SS1′. The second low-pass filter270is coupled to the second demodulation unit250, and performs a second low-pass filtering operation to the second sensing signal SS2to generate a second filtering signal SS2′.

In other embodiments, various devices in the biomedical signal sensing circuit can also be implemented by differential circuits, so as to further decrease a noise, for example, a common-mode noise, etc.

FIG. 3is a schematic diagram of a biomedical signal sensing circuit according to the embodiment ofFIG. 1. In the present embodiment, the biomedical signal sensing circuit300includes a first modulation unit310, a second modulation unit320, an amplifying unit330, a first demodulation unit340and a second demodulation unit350.

In the present embodiment, the first biomedical signal BS1includes a first differential signal component BS1_1and a second differential signal component BS1_2. The first differential signal component BS1_1is inverted to the second differential signal component BS1_2. The second biomedical signal BS2includes a third differential signal component BS2_1and a fourth differential signal component BS2_2. The third differential signal component BS2_1is inverted to the fourth differential signal component BS2_2.

The first modulation unit310has a first input terminal, a second input terminal, a third input terminal, a first output terminal and a second output terminal. The first input terminal of the first modulation unit310receives the first differential signal BS1_1. The second input terminal of the first modulation unit310receives the second differential signal BS1_2. The third input terminal of the first modulation unit310receives the first signal. The second modulation unit320has a first input terminal, a second input terminal, a third input terminal, a first output terminal and a second output terminal. The first input terminal of the second modulation unit320receives the third differential signal BS2_1. The second input terminal of the second modulation unit320receives the fourth differential signal BS2_2. The third input terminal of the second modulation unit320receives the second signal.

In the present embodiment, the first modulation signal MS1includes a first signal component MS1_1and a second signal component MS1_2. The first signal component MS1_1is inverted to the second signal component MS1_2. The second modulation signal MS2includes a third signal component MS2_1and a fourth signal component MS2_2. The third signal component MS2_1is inverted to the fourth signal component MS2_2.

The amplifying unit330includes a first capacitor C31, a second capacitor C32, a third capacitor C33, a fourth capacitor C34, a fifth capacitor C35, a sixth capacitor C36and an operational amplifier335. The first capacitor C31has a first terminal and a second terminal. The first terminal of the first capacitor C31receives the first signal component MS1_1. The second capacitor C32has a first terminal and a second terminal. The first terminal of the second capacitor C32receives the second signal component MS1_2. The third capacitor C33has a first terminal and a second terminal. The first terminal of the third capacitor C33receives the third signal component MS2_1. The second terminal of the third capacitor C33is coupled to the second terminal of the first capacitor C31. The fourth capacitor C34has a first terminal and a second terminal. The first terminal of the fourth capacitor C34receives the fourth signal component MS2_2. The second terminal of the fourth capacitor C34is coupled to the second terminal of the second capacitor C32. The fifth capacitor C35has a first terminal and a second terminal. The first terminal of the fifth capacitor C35is coupled to the second terminal of the first capacitor C31. The sixth capacitor C36has a first terminal and a second terminal. The first terminal of the sixth capacitor C36is coupled to the second terminal of the second capacitor C32. The operational amplifier335has a first input terminal, a second input terminal, a first output terminal and a second output terminal. The first input terminal of the operational amplifier335is coupled to the second terminal of the first capacitor C31. The second input terminal of the operational amplifier335is coupled to the second terminal of the second capacitor C32. The first output terminal of the operational amplifier335is coupled to the second terminal of the fifth capacitor C35. The second output terminal of the operational amplifier335is coupled to the second terminal of the sixth capacitor C36.

The third modulation signal MS3includes a first component MS3_1and a second component MS3_2. The first component MS3_1is inverted to the second component MS3_2. The first sensing signal SS1includes a third component SS1_1and a fourth component SS1_2. The third component SS1_1is inverted to the fourth component SS1_2. The second sensing signal SS2includes a fifth component SS2_1and a sixth component SS2_2. The fifth component SS2_1is inverted to the sixth component SS2_2.

The first demodulation unit340has a first input terminal, a second input terminal, a third input terminal, a first output terminal and a second output terminal. The first input terminal of the first demodulation unit340is coupled to the first output terminal of the operational amplifier335to receive the first component MS3_1. The second input terminal of the first demodulation unit340is coupled to the second output terminal of the operational amplifier335to receive the second component MS3_2. The third input terminal of the first demodulation unit340receives the first signal S1. The first output terminal of the first demodulation unit340outputs the third component SS1_1. The second output terminal of the first demodulation unit340outputs the fourth component SS1_2. The second demodulation unit350has a first input terminal, a second input terminal, a third input terminal, a first output terminal and a second output terminal. The first input terminal of the second demodulation unit350is coupled to the first output terminal of the operational amplifier335to receive the first component MS3_1. The second input terminal of the second demodulation unit350is coupled to the second output terminal of the operational amplifier335to receive the second component MS3_2. The third input terminal of the second demodulation unit350receives the second signal S2. The first output terminal of the second demodulation unit350outputs the fifth component SS2_1. The second output terminal of the second demodulation unit350outputs the sixth component SS2_2.

Compared to the biomedical signal sensing circuit200in the embodiment ofFIG. 2, besides that the biomedical signal sensing circuit300of the present embodiment can correctly generate the first sensing signal SS1and the second sensing signal SS2that do not interfere with each other, a whole common-mode noise can be further decreased.

In other embodiments, the designer can decrease the required number of the capacitors by adjusting a circuit connection method of the biomedical signal sensing circuit, so as to decrease a whole circuit area and the manufacturing cost.

Referring toFIG. 4,FIG. 4is a schematic diagram of a biomedical signal sensing circuit according to an embodiment of the invention. As that shown inFIG. 4, the biomedical signal sensing circuit400includes a first modulation unit410, a second modulation unit420, an amplifying unit430, a first demodulation unit440and a second demodulation unit450.

In the present embodiment, the first biomedical signal BS1includes a first differential signal component BS1_1and a second differential signal component BS1_2. The first differential signal component BS1_1is inverted to the second differential signal component BS1_2. The second biomedical signal BS2includes a third differential signal component BS2_1and a fourth differential signal component BS2_2. The third differential signal component BS2_1is inverted to the fourth differential signal component BS2_2. The first signal S1includes a first portion S1_1and a second portion S1_2. The first portion S1_1is inverted to the second portion S1_2. The second signal S2includes a third portion S2_1and a fourth portion S2_2. The third portion S2_1is inverted to the fourth portion S2_2.

The first modulation unit410has a first input terminal, a second input terminal, a third input terminal, a fourth input terminal, a first output terminal and a second output terminal. The first input terminal of the first modulation unit410receives the first differential signal BS1_1. The second input terminal of the first modulation unit410receives the second differential signal BS1_2. The third input terminal of the first modulation unit410receives the first portion S1_1. The fourth input terminal of the first modulation unit410receives the second portion S1_2.

The second modulation unit420has a first input terminal, a second input terminal, a third input terminal, a fourth input terminal, a first output terminal and a second output terminal. The first input terminal of the second modulation unit420receives the third differential signal BS2_1. The second input terminal of the second modulation unit420receives the fourth differential signal BS2_2. The third input terminal of the second modulation unit420receives the third portion S2_1. The fourth input terminal of the second modulation unit420receives the fourth portion S2_2. The first output terminal of the second modulation unit420is coupled to the second output terminal of the first modulation unit410.

The amplifying unit430includes a first capacitor C41, a second capacitor C42, a third capacitor C43, a fourth capacitor C44and an operational amplifier435. The first capacitor C41has a first terminal and a second terminal. The first terminal of the first capacitor C41is coupled to the first output terminal of the first modulation unit410for receiving the first modulation signal MS1. The second capacitor C42has a first terminal and a second terminal. The first terminal of the second capacitor C42is coupled to the second output terminal of the second modulation unit420for receiving the second modulation signal MS2. The third capacitor C43has a first terminal and a second terminal. The first terminal of the third capacitor C43is coupled to the second terminal of the first capacitor C41. The fourth capacitor C44has a first terminal and a second terminal. The first terminal of the fourth capacitor C44is coupled to the second terminal of the second capacitor C42. The operational amplifier435has a first input terminal, a second input terminal, a first output terminal and a second output terminal. The first input terminal of the operational amplifier435is coupled to the second terminal of the first capacitor C41. The second input terminal of the operational amplifier435is coupled to the second terminal of the second capacitor C42. The first output terminal of the operational amplifier435is coupled to the second terminal of the third capacitor C43. The second output terminal of the operational amplifier435is coupled to the second terminal of the fourth capacitor C44.

In the present embodiment, the first modulation unit410includes a first transistor T1, a second transistor T2, a third transistor T3and a fourth transistor T4. The first transistor T1has a first terminal, a second terminal and a control terminal. The first terminal of the first transistor T1receives the first differential signal component BS1_1. The control terminal of the first transistor T1receives the second portion S1_2. The second transistor T2has a first terminal, a second terminal and a control terminal. The first terminal of the second transistor T2receives the first differential signal component BS1_1. The control terminal of the second transistor T2receives the first portion S1_1. The third transistor T3has a first terminal, a second terminal and a control terminal. The first terminal of the third transistor T3receives the second differential signal component BS1_2. The control terminal of the third transistor T3receives the first portion S1_1. The second terminal of the third transistor T3is coupled to the second terminal of the first transistor T1. The fourth transistor T4has a first terminal, a second terminal and a control terminal. The first terminal of the fourth transistor T4receives the second differential signal component BS1_2, and the control terminal of the fourth transistor T4receives the second portion S1_2. The second terminal of the fourth transistor T4is coupled to the second terminal of the second transistor T2.

The second modulation unit420includes a fifth transistor T5, a sixth transistor T6, a seventh transistor T7and an eighth transistor T8. The fifth transistor T5has a first terminal, a second terminal and a control terminal. The first terminal of the fifth transistor T5receives the third differential signal component BS2_1. The control terminal of the fifth transistor T5receives the fourth portion S2_2. The sixth transistor T6has a first terminal, a second terminal and a control terminal. The first terminal of the sixth transistor T6receives the third differential signal component BS2_1. The control terminal of the sixth transistor T6receives the third portion S2_1. The seventh transistor T7has a first terminal, a second terminal and a control terminal. The first terminal of the seventh transistor T7receives the fourth differential signal component BS2_2. The control terminal of the seventh transistor T7receives the third portion S2_1. The second terminal of the seventh transistor T7is coupled to the second terminal of the fifth transistor T5. The eighth transistor T8has a first terminal, a second terminal and a control terminal. The first terminal of the eighth transistor T8receives the fourth differential signal component BS2_2. The control terminal of the eighth transistor T8receives the fourth portion S2_2. The second terminal of the eighth transistor T8is coupled to the second terminal of the sixth transistor T6.

The third modulation signal MS3includes a first component MS3_1and a second component MS3_2. The first component MS3_1is inverted to the second component MS3_2. The first sensing signal SS1includes a third component SS1_1and a fourth component SS1_2. The third component SS1_1is inverted to the fourth component SS1_2. The second sensing signal SS2includes a fifth component SS2_1and a sixth component SS2_2. The fifth component SS2_1is inverted to the sixth component SS2_2.

The first demodulation unit440has a first input terminal, a second input terminal, a third input terminal, a fourth input terminal, a first output terminal and a second output terminal. The first input terminal of the first demodulation unit440is coupled to the first output terminal of the operational amplifier435to receive the first component MS3_1. The second input terminal of the first demodulation unit440is coupled to the second output terminal of the operational amplifier435to receive the second component MS3_2. The third input terminal of the first demodulation unit440receives the first portion S1_1. The fourth input terminal of the first demodulation unit440receives the second portion S1_2. The first output terminal of the first demodulation unit440outputs the third component SS1_1. The second output terminal of the first demodulation unit440outputs the fourth component SS1_2.

The second demodulation unit450has a first input terminal, a second input terminal, a third input terminal, a fourth input terminal, a first output terminal and a second output terminal. The first input terminal of the second demodulation unit450is coupled to the first output terminal of the operational amplifier435to receive the first component MS3_1. The second input terminal of the second demodulation unit450is coupled to the second output terminal of the operational amplifier435to receive the second component MS3_2. The third input terminal of the second demodulation unit450receives the third portion S2_1. The fourth input terminal of the second demodulation unit450receives the fourth portion S2_2. The first output terminal of the second demodulation unit450outputs the fifth component SS2_1. The second output terminal of the second demodulation unit450outputs the sixth component SS2_2.

The first demodulation unit440includes a ninth transistor T9, a tenth transistor T10, an eleventh transistor T11and a twelfth transistor T12. The ninth transistor T9has a first terminal, a second terminal and a control terminal. The first terminal of the ninth transistor T9receives the first component MS3_1. The control terminal of the ninth transistor T9receives the second portion S1_2. The tenth transistor T10has a first terminal, a second terminal and a control terminal. The first terminal of the tenth transistor T10receives the first component MS3_1. The control terminal of the tenth transistor T10receives the first portion S1_1. The eleventh transistor T11has a first terminal, a second terminal and a control terminal. The first terminal of the eleventh transistor T11receives the second component MS3_2. The control terminal of the eleventh transistor T11receives the first portion S1_1. The second terminal of the eleventh transistor T11is coupled to the second terminal of the ninth transistor T9. The twelfth transistor T12has a first terminal, a second terminal and a control terminal. The first terminal of the twelfth transistor T12receives the second component MS3_2. The control terminal of the twelfth transistor T12receives the second portion S1_2. The second terminal of the twelfth transistor T12is coupled to the second terminal of the tenth transistor T10.

The second demodulation unit450includes a thirteenth transistor T13, a fourteenth transistor T14, a fifteenth transistor T15and a sixteenth transistor T16. The thirteenth transistor T13has a first terminal, a second terminal and a control terminal. The first terminal of the thirteenth transistor T13receives the first component MS3_1. The control terminal of the thirteenth transistor T13receives the fourth portion S2_2. The fourteenth transistor T14has a first terminal, a second terminal and a control terminal. The first terminal of the fourteenth transistor T14receives the first component MS3_1. The control terminal of the fourteenth transistor T14receives the third portion S2_1. The fifteenth transistor T15has a first terminal, a second terminal and a control terminal. The first terminal of the fifteenth transistor T15receives the second component MS3_2. The control terminal of the fifteenth transistor T15receives the third portion S2_1. The second terminal of the fifteenth transistor T15is coupled to the second terminal of the thirteenth transistor T13. The sixteenth transistor T16has a first terminal, a second terminal and a control terminal. The first terminal of the sixteenth transistor T16receives the second component MS32. The control terminal of the sixteenth transistor T16receives the fourth portion S2_2. The second terminal of the sixteenth transistor T16is coupled to the second terminal of the fourteenth transistor T14.

Compared to the biomedical signal sensing circuit300ofFIG. 3that includes six capacitors, the biomedical signal sensing circuit400ofFIG. 4can achieve the effect of generating a plurality of sensing signals that do not interfere with each other by only using four capacitors, such that the whole circuit volume and the manufacturing cost are further decreased.

In summary, the biomedical signal sensing circuit of the invention is capable of simultaneously processing a plurality of biomedical signals through a plurality of modulation units and demodulation units, so as to correspondingly generate a plurality of sensing signals that do not interfere with each other according to the biomedical signals. It should be noticed that the biomedical signal sensing circuit of the invention may simultaneously process a plurality of biomedical signals in case that only a single amplifying unit is included, which is different to the conventional biomedical signal sensing circuit that can only process a single biomedical signal at one time. Therefore, compared to the conventional biomedical signal sensing circuit, the biomedical signal sensing circuit of the invention may have a smaller volume and lower implementation cost.

Moreover, since the biomedical signal sensing circuit of the invention is unnecessary to use a plurality of sensing circuits to sense the biomedical signals, mismatch of the sensing circuits is avoided, such that common-mode feedback is avoided, and the power consumption is reduced.