Light-emitting diode and method of manufacturing the same

A light-emitting diode and manufacturing method, including a flat portion and a mesa structure. An inclined side surface is formed by wet etching such that a cross-sectional area of the mesa structure is continuously reduced toward a top surface. A protective film covers the flat portion, the inclined side surface, and a peripheral region of the top surface of the mesa structure. The protective film includes an electrical conduction window arranged around a light emission hole and from which a compound semiconductor layer is exposed. A continuous electrode film contacts the exposed compound semiconductor layer, covers the protective film formed on the flat portion, and has the light emission hole on the top surface. A transparent conductive film is formed between a reflecting layer and the layer at a position that corresponds to the electrical conduction window and in a range surrounded by the electrical conduction window.

CROSS REFERENCE TO RELATED APPLICATIONS

This is a National Stage of International Application No. PCT/JP2012/082386 filed Dec. 13, 2012, claiming priority based on Japanese Patent Application No. 2011-277535 filed Dec. 19, 2011, the contents of all of which are incorporated herein by reference in their entirety.

FIELD OF THE INVENTION

The present invention relates to a light-emitting diode and a method of manufacturing the same.

DESCRIPTION OF RELATED ART

A point light source type light-emitting diode is known in which light generated by a light-emitting layer is extracted from a portion of the upper surface of an element. In this type of light-emitting diode, a light-emitting diode is known which has a current-blocking structure for limiting an electrically conductive region of a light-emitting layer to a portion of the plane of the light-emitting layer (for example, see Patent Document 1). In the light-emitting diode having the current-blocking structure, a light-emitting region is limited. Since light is emitted from a light emission hole which is provided immediately above this light-emitting region, it is possible to obtain a high light emission output and to input the emitted light to, for example, an optical component with high efficiency.

In the point light source type light-emitting diode, a structure is known in which an active layer has a pillar structure in order to narrow a light-emitting region in a direction parallel to a substrate and a layer including a light emission opening (light emission hole) is provided on a light emission surface of the top of the pillar structure (for example, see Patent Document 2).

FIG. 16shows a resonator-type light-emitting diode in which a lower mirror layer132, an active layer133, an upper mirror layer134, and a contact layer135are sequentially formed on a substrate131; a pillar structure137includes the active layer133, the upper mirror layer134, and the contact layer135; the pillar structure137and the periphery thereof are covered with a protective film138; an electrode film139is formed on the protective film138; and a light emission opening139ais formed in the electrode film139on the top surface137a(light emission surface) of the pillar structure137. Reference numeral140indicates a rear surface electrode.

PRIOR ART DOCUMENTS

Patent Documents

SUMMARY OF THE INVENTION

When the pillar structure is formed, a portion other than the pillar structure is removed by anisotropic dry etching after the active layer is formed. Therefore, as shown inFIG. 16, a side surface137bof the pillar structure137is vertical or steeply inclined with respect to the substrate131. In general, a protective film is formed on the side surface of the pillar structure by a vapor deposition method or a sputtering method and an electrode metal (for example, Au) film is formed on the side surface by a vapor deposition method. However, it is not easy to form the protective film or the electrode metal film on the vertical side surface or the steeply inclined side surface with a uniform thickness and the protective film or the electrode metal film is likely to be a discontinuous film. When the protective film is a discontinuous film (letter A inFIG. 16), the electrode metal film enters the discontinuous portion and contacts the active layer, which causes the leakage of light. In addition, when the electrode metal film is a discontinuous film (letter B inFIG. 16), an electrical conduction failure occurs.

When the portion other than the pillar structure is removed by dry etching, an expensive apparatus is required and the etching time increases.

In the point-light-source-type light-emitting diode as shown inFIG. 16, in which the light emission hole is provided on the top surface of the pillar structure, a current flows in the entire light-emitting layer of the pillar structure. Therefore, a large amount of light is emitted from a portion other than the portion which is arranged immediately below the light emission hole in the light-emitting layer, and the light which is emitted from the portion other than the portion which is arranged immediately below the light emission hole is less likely to be emitted to the outside of the light-emitting diode than light emitted from the portion which is arranged immediately below the light emission hole. Therefore, light extraction efficiency is not improved.

The invention has been made in view of the above-mentioned problems and an object of the invention is to provide a light-emitting diode in which a protective film and an electrode film formed on the protective film are formed with a uniform thickness and which has high light extraction efficiency and a light-emitting diode production method which can reduce leakage or electrical conduction failure, improve yield, and produce a light-emitting diode at a lower cost than in the related art.

The invention provides the following means.

(1) A light-emitting diode is provided that outputs light from a light emission hole to the outside. The light-emitting diode includes: a reflecting layer that consists of metal; and a compound semiconductor layer that sequentially includes an active layer and a contact layer; on a supporting substrate in this order, wherein a flat portion and a mesa structure portion including an inclined side surface and a top surface are provided in an upper part of the light-emitting diode. At least a part of the flat portion and the mesa structure portion are sequentially covered with a protective film and an electrode film. The mesa structure portion includes at least a portion of the active layer. The inclined side surface is formed by wet etching. A cross-sectional area of the mesa structure portion in a horizontal direction is continuously reduced toward the top surface. The protective film covers at least a part of the flat portion, the inclined side surface of the mesa structure portion, and a peripheral region of the top surface of the mesa structure portion and the protective film includes an electrical conduction window which is provided inside the peripheral region in plan view and is arranged around the light emission hole and from which a portion of a surface of the compound semiconductor layer is exposed. The electrode film is a continuous film that comes into contact with the surface of the compound semiconductor layer which is exposed from the electrical conduction window, covers at least a portion of the protective film formed on the flat portion, and has the light emission hole on the top surface of the mesa structure portion. A transparent conductive film is provided between the reflecting layer and the compound semiconductor layer at a position that corresponds to the electrical conduction window and in a range surrounded by the electrical conduction window in plan view.

(2) In the aspect stated in the above (1), the transparent conductive film may consist of any one of ITO, IZO, and ZnO.

(3) In the aspect stated in the above (1) or (2) may further include an ohmic metal portion that consists of AuBe or AuZn and is provided in a peripheral portion of the transparent conductive film which does not overlap the light emission hole in plan view, between the transparent conductive film and the compound semiconductor layer.

(4) In the aspect stated in the above any one of (1) to (3), the contact layer may come into contact with the electrode film.

(5) In the aspect stated in the above any one of (1) to (4), the mesa structure portion may have a rectangular shape in plan view.

(6) In the aspect stated in the above any one of (1) to (5), the mesa structure portion may have a height of 3 μm to 7 μm, and the width of the inclined side surface in plan view may be in the range of 0.5 μm to 7 μm.

(7) In the aspect stated in the above any one of (1) to (6), the light emission hole may have a circular shape or an elliptical shape in plan view.

(8) In the aspect stated in the above (7), the light emission hole may have a diameter of 50 μm to 150 μm.

(9) In the aspect stated in the above any one of (1) to (8), a bonding wire may be provided in a portion of the electrode film on the flat portion.

(10) In the aspect stated in the above any one of (1) to (9), a light-emitting layer that is included in the active layer may have a multiple quantum well structure.

(11) In the aspect stated in the above any one of (1) to (10), the light-emitting layer that is included in the active layer may consist of any one of (AlX1Ga1-X1)Y1In1-Y1P (0≦X1≦1, 0<Y1≦1), (AlX2Ga1-X2)As (0≦X2≦1), and (InX3Ga1-X3)As (0≦X3≦1).

(12) A method is provided of manufacturing a light-emitting diode that includes a reflecting layer made of metal and a compound semiconductor layer sequentially including an active layer and a contact layer which are sequentially provided on a supporting substrate, in this order, and that emits light from a light emission hole to the outside. The method includes: a step of forming the compound semiconductor layer that sequentially includes the active layer and the contact layer on a growth substrate; a step of forming a transparent conductive film on the compound semiconductor layer at a position that corresponds to an electrical conduction window to be formed and in a range surrounded by the electrical conduction window in plan view; a step of forming the reflecting layer made of metal on the compound semiconductor layer so as to cover the transparent conductive film; a step of bonding the supporting substrate to the reflecting layer; a step of removing the growth substrate; a step of performing wet etching for the compound semiconductor layer to form a mesa structure portion which is formed such that a cross-sectional area thereof in a horizontal direction is continuously reduced toward a top surface and a flat portion which is arranged around the mesa structure portion; a step of forming a protective film that covers, at least, a part of the flat portion, the inclined side surface of the mesa structure portion, and a peripheral region of the top surface of the mesa structure portion and includes the electrical conduction window which is provided inside the peripheral region in plan view and is arranged around the light emission hole and from which a portion of a surface of the compound semiconductor layer is exposed; and a step of forming an electrode film which is a continuous film that comes into direct contact with the surface of the compound semiconductor layer exposed from the electrical conduction window, that covers at least a portion of the protective film formed on the flat portion, and that has the light emission hole on the top surface of the mesa structure portion.

(13) In the aspect stated in the above (12) may further include a step of forming an ohmic metal portion that consists of AuBe or AuZn, that is provided in a peripheral portion of the transparent conductive film to be formed and that does not overlap the light emission hole in plan view on the compound semiconductor layer, the step being performed between the step of forming the compound semiconductor layer and the step of forming the transparent conductive film.

(14) In the aspect stated in the above (12) or (13), the wet etching may be performed with at least one of a mixture of phosphoric acid, hydrogen peroxide, and water, a mixture of ammonia, hydrogen peroxide, and water, a mixture of bromine and methanol, and a mixture of potassium iodide and ammonia.

Advantageous Effects of Invention

A light-emitting diode according to an aspect of the invention includes a reflecting layer that consists of metal and a compound semiconductor layer sequentially including an active layer and a contact layer which are sequentially provided on a supporting substrate, and outputs light from a light emission hole to the outside. In addition, the light-emitting diode includes a transparent conductive film that is provided between the reflecting layer and the compound semiconductor layer at a position that corresponds to the electrical conduction window and in a range surrounded by the electrical conduction window in plan view. As a result, the amount of light emitted from a portion of the active layer which is arranged immediately below the electrical conduction window and the range surrounded by the electrical conduction window is more than the amount of light emitted from a portion other than the portion which is arranged immediately below the electrical conduction window and the range. In addition, the reflecting layer reflects light which travels from a light-emitting layer to the supporting substrate with high efficiency. Therefore, the percentage of light which travels toward the light emission hole increases and light extraction efficiency is improved.

The light-emitting diode according to the aspect of the invention includes the flat portion and the mesa structure portion including the inclined side surface and the top surface that are provided in its upper part. As a result, it is possible to obtain a high light emission output and to input the emitted light to, for example, an optical component with high efficiency.

In the light-emitting diode according to the aspect of the invention, the inclined side surface of the mesa structure portion is formed by wet etching such that the cross-sectional area thereof in the horizontal direction is continuously reduced toward the top surface. As a result, it is easy to sequentially form the protective film and the electrode film on the side surface of the mesa structure portion, as compared to a case in which the mesa structure portion has a vertical side surface. Therefore, a continuous film with a uniform thickness is formed. As a result, leakage or electrical conduction failure caused by a discontinuous film does not occur and stable and high-brightness light emission is ensured. This effect is obtained when the light-emitting diode has the mesa structure portion with the inclined side surface which is formed by wet etching, regardless of the internal laminated structure of the light-emitting diode or the structure of the substrate.

In the light-emitting diode according to the aspect of the invention, the transparent conductive film is made of any one of ITO, IZO, and ZnO. Therefore, the operating voltage is reduced by high conductivity and high transmittance of light reflected from the reflecting layer is ensured. As a result, a high output is obtained.

The light-emitting diode according to the aspect of the invention includes an ohmic metal portion that consists of AuBe or AuZn and is provided in a peripheral portion of the transparent conductive film which does not overlap the light emission hole in plan view, between the transparent conductive film and the compound semiconductor layer. Therefore, a sufficient ohmic contact with the contact layer is ensured and a transparent portion which is covered with the ohmic metal portion is formed in the transparent conductive film at a position immediately below the light emission hole. As a result, most light which is reflected by the reflecting layer and passes through the transparent portion is emitted from the light emission hole.

In the light-emitting diode according to the aspect of the invention, the contact layer comes into contact with the electrode film. According to this structure, the contact resistance of an ohmic electrode is reduced and low-voltage driving can be performed.

In the light-emitting diode according to the aspect of the invention, the mesa structure portion has a rectangular shape in plan view. According to this structure, a change in the shape of a mesa, which depends on an etching depth, due to the influence of the anisotropy of wet etching during manufacturing is prevented. Therefore, it is easy to control the area of a mesa structure portion and required size and shape are obtained with high-accuracy.

In the light-emitting diode according to the aspect of the invention, each inclined side surface of the mesa structure portion is formed so as to be offset from an orientation flat of the substrate. According to this structure, the influence of anisotropy on four sides of the rectangular mesa structure portion due to the orientation of the substrate is reduced and uniform mesa shape and gradient are obtained.

In the light-emitting diode according to the aspect of the invention, the mesa structure portion has a height of 3 μm to 7 μm and the width of the inclined side surface in plan view is in the range of 0.5 μm to 7 μm. According to this structure, it is easy to sequentially form the protective film and the electrode film on the side surface, as compared to the case in which the mesa structure portion has a vertical side surface. Therefore, a continuous film with a uniform thickness is formed. As a result, leakage or electrical conduction failure caused by a discontinuous film does not occur and stable and high-brightness light emission is ensured.

In the light-emitting diode according to the aspect of the invention, the light emission hole has a circular shape or an elliptical shape in plan view. According to this structure, it is easy to form a uniform contact region, as compared to a structure in which the light emission hole has an angular shape, such as a rectangular shape, and it is possible to prevent, for example, the concentration of a current on the corner. In addition, this structure is suitable for coupling to a fiber in a light-receiving side.

In the light-emitting diode according to the aspect of the invention, the light emission hole has a diameter of 50 μm to 150 μm. According to this structure, when the diameter is less than 50 μm, current density increases in the mesa structure portion and output is saturated with a small amount of current. In contrast, when the diameter is greater than 150 μm, it is difficult to diffuse the current to the entire mesa structure portion. Therefore, the problem of output saturation is solved.

In the light-emitting diode according to the aspect of the invention, a bonding wire is provided on a flat portion of the electrode film. According to this structure, wire bonding is performed on the flat portion to which a sufficient load (and ultrasonic waves) is applied. As a result, wire bonding with high bonding strength is achieved.

In the light-emitting diode according to the aspect of the invention, a light-emitting layer that is included in the active layer has a multiple quantum well structure. According to this structure, a sufficient number of injected carriers are confined in a well layer. Therefore, current density in the well layer increases. As a result, the radiative recombination probability increases and a response speed increases.

Here, the quantum well structure means a structure in which two types of materials with different band gaps and a thin film (on an order of nanometers) made of a material with a small band gap is sandwiched between thin films made of a material with a large band gap. A “multiple quantum well” means a quantum well structure including a plurality of well layers.

According to an aspect of the invention, a method of manufacturing a light-emitting diode is provided that includes a reflecting layer made of metal and a compound semiconductor layer sequentially including a contact layer and an active layer, which are sequentially provided on a supporting substrate, and emits light from a light emission hole to the outside. The method includes a step of forming the compound semiconductor layer that sequentially includes the active layer and the contact layer on a growth substrate and a step of forming a transparent conductive film on the compound semiconductor layer at a position that corresponds to an electrical conduction window to be formed and in a range surrounded by the electrical conduction window in plan view. As a result, the amount of light emitted from a portion of the active layer which is arranged immediately below the electrical conduction window and the range surrounded by the electrical conduction window is more than the amount of light emitted from a portion other than the portion which is arranged immediately below the electrical conduction window and the range. In addition, the reflecting layer reflects light which travels from a light-emitting layer to the supporting substrate with high efficiency. Therefore, the ratio of light which travels toward the light emission hole increases and it is possible to manufacture a light-emitting diode with high light extraction efficiency.

The method of manufacturing a light-emitting diode according to the invention includes a step of bonding the supporting substrate to the reflecting layer and a step of removing the growth substrate. As a result, it is possible to avoid the absorption of light by the growth substrate, such as a GaAs substrate which is generally used as the growth substrate for the compound semiconductor layer, is prevented and it is possible to manufacture a light-emitting diode with a high light emission output.

The method of manufacturing a light-emitting diode according to the invention includes: a step of performing wet etching on the compound semiconductor layer to form a mesa structure portion which is formed such that a cross-sectional area thereof in a horizontal direction is continuously reduced toward a top surface and a flat portion which is arranged around the mesa structure portion; a step of forming a protective film on the flat portion and the mesa structure portion such that an electrical conduction window from which a portion of a surface of the compound semiconductor layer is exposed is formed on the top surface of the mesa structure portion; and a step of forming an electrode film which is a continuous film that comes into direct contact with the surface of the compound semiconductor layer exposed from the electrical conduction window, covers at least a portion of the protective film formed on the flat portion, and has the light emission hole on the top surface of the mesa structure portion. As a result, it is possible to obtain a high light emission output and to input the emitted light to, for example, an optical component with high efficiency. In addition, it is easy to sequentially form the protective film and the electrode film on the inclined side surface, as compared to the case in which the mesa structure portion has a vertical side surface. Therefore, a continuous film with a uniform thickness is formed. As a result, it is possible to manufacture a light-emitting diode which does not have leakage or electrical conduction failure caused by a discontinuous film and ensures stable and high-brightness light emission. When the pillar structure is formed by anisotropic dry etching as in the related art, the side surface is vertically formed. However, when the mesa structure portion is formed by wet etching, it is possible to form a side surface which is gently inclined. In addition, when the mesa structure portion is formed by wet etching, it is possible to reduce the formation time, as compared to the case in which the pillar structure is formed by dry etching as in the related art

DETAILED DESCRIPTION OF THE INVENTION

Hereinafter, the structure of a light-emitting diode and a method of manufacturing the same according to the invention will be described with reference to the drawings. In the drawings used in the following description, in some cases, for ease of understanding of characteristics, a characteristic portion is enlarged and the dimensions and scale of each component are different from the actual dimensions and scale. For example, materials and dimensions which are exemplified in the following description are illustrative and the invention is not limited thereto. Various modifications and changes to the invention can be made without departing from the scope and spirit of the invention.

The invention may include layers which are not described in the following as long as the effect of the invention is maintained.

First Embodiment

FIG. 1is a schematic cross-sectional view illustrating an example of a light-emitting diode to which the invention is applied.FIG. 2is a perspective view illustrating the light-emitting diode formed on a wafer including the light-emitting diode shown inFIG. 1.

Hereinafter, a light-emitting diode according to an embodiment of the invention will be described in detail with reference toFIGS. 1 and 2.

A light-emitting diode100shown inFIG. 1includes a reflecting layer2which consists of metal and a compound semiconductor layer20(seeFIG. 4) that includes an active layer4and a contact layer5in this order, which are sequentially provided on a supporting substrate1, and emits light from a light emission hole9bto the outside. The light-emitting diode includes a flat portion6and a mesa structure portion7including an inclined side surface7aand a top surface7bin its upper part. The flat portion6and the mesa structure portion7are at least partially covered with a protective film8and an electrode film9, respectively. The mesa structure portion7includes at least a portion of the active layer4. The inclined side surface7ais formed by wet etching such that the cross-sectional area thereof in the horizontal direction is continuously reduced toward the top surface7b. The protective film8covers at least a portion of the flat portion6, the inclined side surface7aof the mesa structure portion7, and a peripheral region7baof the top surface7bof the mesa structure portion7. In addition, the protective film8includes an electrical conduction window8bwhich is provided around the light emission hole9binside the peripheral region in plan view and from which a portion of the surface of the compound semiconductor layer20(contact layer5) is exposed. The electrode film9comes into contact with the surface of the compound semiconductor layer20(contact layer5) exposed from the electrical conduction window8b. The electrode film9is a continuous film which is formed so as to cover at least a portion of the protective film8formed on the flat portion6and to have the light emission hole9bon the top surface7bof the mesa structure portion7. A transparent conductive film30is provided between the reflecting layer2and the compound semiconductor layer20(bonding (contact) layer3) at a position that corresponds to the electrical conduction window8band a region S surrounded by the electrical conduction window8bin plan view. In addition, an ohmic metal portion31is provided in a peripheral portion30a(seeFIG. 4) of the transparent conductive film30which does not overlap the light emission hole9bin plan view, between the transparent conductive film30and the compound semiconductor layer20. In addition, the bonding (contact) layer3is provided between the reflecting layer2and the active layer4.

In the light-emitting diode according to this embodiment, the mesa structure portion7has a rectangular shape in plan view and the light emission hole9bof the electrode film9has a circular shape in plan view. The shape of the mesa structure portion7in plan view is not limited to rectangular and the shape of the light emission hole9bin plan view is not limited to circular.

A light-leakage-prevention film16for preventing the leakage of light from the side surface is provided on the electrode film constituting the mesa structure portion7.

In addition, a rear surface electrode40is provided on the lower surface of the substrate1.

In the drawings, the outside diameter of the transparent conductive film30is less than the outside diameter of the ohmic metal portion31. The dimensional relationship indicates only the magnitude relationship therebetween in terms of a manufacturing process, but does not indicate an indispensable structure of the invention.

As shown inFIG. 2, the light-emitting diode according to the invention can be manufactured by forming a plurality of light-emitting diodes100on a wafer-shaped substrate and cutting the wafer-shaped substrate into each light-emitting diode along streets (lines scheduled to be cut)21(a one-dot chain line22is a center line of the street21in the longitudinal direction). That is, a laser beam or a blade contacts the streets21along the one-dot chain line22to cut the wafer-shaped substrate into each light-emitting diode.

The mesa structure portion7protrudes upward from the flat portion6and includes the inclined side surface7aand the top surface7b. In the example shown inFIG. 1, the inclined side surface7aincludes the entire active layer4and the inclined cross-sectional surface of the contact layer5. The protective film8, the electrode film (front surface electrode film)9, and the light-leakage prevention film16are sequentially provided on the inclined side surface7a. The top surface7bincludes the surface of the contact layer5. The protective film8(portions denoted by reference numeral8baand reference numeral8d) and the electrode film9(portions denoted by reference numerals9ba,9bband9d) are provided on the top surface7b.

The contact layer5and at least a portion of the active layer4are included in the mesa structure portion7according to the invention.

In the example shown inFIG. 1, the contact layer5and the entire active layer4are included in the mesa structure portion7. Only a portion of the active layer4may be included in the mesa structure portion7. It is preferable that the entire active layer4is included in the mesa structure portion7. The reason is that light emitted from the active layer4is all generated in the mesa structure portion and light extraction efficiency is improved.

The inclined side surface7aof the mesa structure portion7is formed by wet etching. In addition, the mesa structure portion7is formed such that the cross-sectional area thereof in the horizontal direction is continuously reduced from the supporting substrate1to the top surface7b. Since the inclined side surface7ais formed by wet etching, the inclination of the mesa structure portion7from the top surface to the supporting substrate1is gentle. It is preferable that the height h of the mesa structure portion7is in the range of 3 μm to 7 μm and the width w of the inclined side surface7ain plan view be in the range of 0.5 μm to 7 μm. In addition, it is more preferable that the height h is in the range of 5 μm to 7 μm. The width w is more preferably in the range of 3 μm to 7 μm and most preferably, in the range of 4 μm to 6 μm. In this case, since the side surface of the mesa structure portion7is not vertical or steeply inclined, but is gently inclined, it is easy to form the protective film or the electrode metal film to have a uniform thickness and there is no concern that a discontinuous film will be formed. Therefore, light leakage or poor electrical connection due to a discontinuous film is not caused and it is ensured that stable and high-brightness light emission is obtained.

When the wet etching is performed until the height is greater than 7 μm, the inclined side surface is likely to have an overhang shape (inverse tapered shape), which is not preferable. It is more difficult to form the protective film or the electrode film to have a uniform thickness, without any discontinuous portion, when the inclined side surface has the overhang shape (inverse tapered shape) than when the side surface is vertical.

In the specification, the height h means a distance (seeFIG. 1) from the surface of the electrode film9(a portion denoted by reference numeral9c) which is formed on the flat portion6, with the protective film interposed therebetween, to the surface of the electrode film9(a portion denoted by reference numeral9ba) which covers a portion denoted by reference numeral8bain the protective film8in the vertical direction. The width w means a distance (seeFIG. 1) from the edge of the electrode film9(a portion denoted by reference numeral9ba) which covers a portion denoted by reference numeral8bain the protective film8to the lowest edge of the electrode film9(a portion denoted by reference numeral9a) on the inclined side surface which is connected to the edge in the horizontal direction.

FIG. 3is an electron micrograph of the cross-section in the vicinity of the mesa structure portion7.

The layer structure shown inFIG. 3is the same as that in the following example except that a contact layer consists of Al0.3Ga0.7As and has a thickness of 3 μm.

Since the mesa structure portion according to the invention is formed by wet etching, the rate of increase in the horizontal cross-sectional area (or the width or diameter) of the mesa structure portion increases from the top surface toward the substrate (toward the lower side inFIG. 3). It is possible to distinguish that the mesa structure portion is not formed by dry etching, but is formed by wet etching on the basis of this shape.

In the example shown inFIG. 3, the height h was 7 μm and the width w was in the range of 3.5 μm to 4.5 μm.

It is preferable that the mesa structure portion7has a rectangular shape in plan view. The reason is as follows. It is possible to suppress a change in the mesa shape depending on an etching depth due to the anisotropy of wet etching during production and it is easy to control the area of each surface of the mesa structure portion. Therefore, required size and shape are obtained with high accuracy.

It is preferable that the mesa structure portion7is disposed in the light-emitting diode so as to lean to one side in the long axis direction of the light-emitting diode in order to reduce the size of an element, as shown inFIGS. 1 and 2. Since the flat portion6needs to have a width required to attach bonding wires (not shown), there is a limit in reducing the width of the flat portion6. When the mesa structure portion7leans to one side, it is possible to minimize the range of the flat portion6and to reduce the size of the element.

The flat portion6is arranged around the mesa structure portion7. In the invention, since wire bonding is performed on the flat portion of the electrode film to which sufficient load and/or ultrasonic waves are applied to the portion, therefore it is possible to perform wire bonding with high bonding strength.

The protective film8and the electrode film (front surface electrode film)9are sequentially formed on the flat portion6and a bonding wire (not shown) is attached onto the electrode film9. The material forming a portion of the flat portion6which is arranged immediately below the protective film8is determined by the internal structure of the mesa structure portion7.

The protective film8includes a portion8awhich covers the inclined side surface7aof the mesa structure portion7, a portion8c(including a portion8ccwhich is opposite to the portion8c, with the mesa structure portion7interposed therebetween, and covers an opposite flat portion) which covers at least a portion of the flat portion6, a portion8bawhich covers the peripheral region7baof the top surface7bof the mesa structure portion7, and a portion8dwhich covers a central portion of the top surface7b. The protective film8includes the electrical conduction window8bwhich is provided inside the peripheral region7bain plan view and from which a portion of the surface of the contact layer5is exposed.

In this embodiment, a region (ring-shaped region) between two concentric circuits with different diameters which are provided between the portion8bathat is disposed below the peripheral region7baand a portion that is disposed below the portion8dcovering the central portion on the surface of the contact layer5in the top surface7bof the mesa structure portion7is exposed from the electrical conduction window8b.

The shape of the electrical conduction window8bis not limited. It is necessary that the electrical conduction window8bhas the ring shape. In addition, the electrical conduction window8bmay be not a continuous region but a plurality of discrete regions.

The protective film8is arranged below the front surface electrode film9and has a first function of limiting a portion of the front surface electrode film9which comes into contact with the compound semiconductor layer20and through which a current flows into or out from the compound semiconductor layer20to the electrical conduction window8bof the top surface, in order to narrow a light emission region and a light extraction range. That is, after the protective film8is formed, the front surface electrode film is formed on the entire surface including the protective film8. Then, the front surface electrode film is patterned. Even though the front surface electrode film is not removed from the portion in which the protective film8is formed, no current flows. The electrical conduction window8bof the protective film8is formed at the desired position where the current flows.

Therefore, as long as the electrical conduction window8bis formed in a portion of the top surface7bof the mesa structure portion7in order to make the protective film8have the first function, the shape or position of the electrical conduction window8bis not limited to that shown inFIG. 1.

While the first function is indispensable, the second function of the protective film8is not indispensable. The protective film8shown inFIG. 1is arranged on the surface of the contact layer5in the light emission hole9aof the front surface electrode film9in plan view and takes on the second function of extracting light through the protective film8and protecting the surface of the contact layer5which extracts light.

In a second embodiment, which will be described below, the protective film is not provided below the light emission hole and light is directly extracted from the light emission hole9b, without passing through the protective film. The protective film does not have the second function.

A known material forming an insulating layer can be used as the material forming the protective film8. A silicon oxide film is preferable since it is easy to form a stable insulating film.

In this embodiment, since light is extracted through the protective film8(8d), the protective film8needs to be transparent.

The thickness of the protective film8is preferably in the range of 0.3 μm to 1 μm and more preferably, in the range of 0.5 μm to 0.8 μm. The reason is that sufficient insulation is not obtained when the thickness is less than 0.3 μm and it takes a lot of time to form the protective film8when the thickness is greater than 1 μm.

Here, the thickness of the protective film means the thickness of the protective film in a flat portion, such as the upper surface of the supporting structure portion or the top surface of the mesa structure portion.

The electrode film (front surface electrode film)9consists of a portion9awhich covers the portion8aof the protective film8covering the inclined side surface7a, a portion9cwhich covers the portion8cof the protective film8covering at least a portion of the flat portion6, a portion9bawhich covers the portion8baof the protective film8covering the peripheral region7baof the top surface7bof the mesa structure portion7, a portion9bb(hereinafter, appropriately referred to as a “contact portion”) which fills the electrical conduction window8bof the protective film8, and a portion9dwhich covers the outer circumferential edge of the portion8dof the protective film8covering the central portion of the top surface7bof the mesa structure portion7.

The first function of the electrode film (front surface electrode film)9is the function of an electrode for current flow and the second function thereof is limiting the emission range of generated light. In the example shown inFIG. 1, the contact portion9bbtakes on the first function and the portion9dwhich covers the outer circumferential edge of the portion8dcovering the central portion takes on the second function.

A non-transparent protective film may be used and take on the second function.

The electrode film9may cover a portion of or the entire protective film8on the flat portion6. It is preferable that the electrode film9covers a range as wide as possible in order to appropriately attach the bonding wire. It is preferable that the street21is not covered with the electrode film when the wafer is divided into light-emitting diode in order to reduce costs, as shown inFIG. 2.

In the electrode film9, only the contact portion9bbcomes into contact with the contact layer5in the top surface7bof the mesa structure portion7. Therefore, the current which flows in the light-emitting diode flows only through the contact portion9bb.

A known electrode material which has good ohmic contact with the contact layer can be used as the material forming the electrode film9. For example, an n-type electrode can have a layer structure (AuGe/Ni/Au) including an AuGe layer, a Ni layer, and an Au layer which are sequentially formed.

The thickness of the electrode film9is preferably in the range of 0.5 μm to 2.0 μm and more preferably in the range of 1.2 μm to 1.8 μm. The reason is that it is difficult to obtain a uniform and good ohmic contact, which results in insufficient bonding strength and thickness when the thickness is less than 0.5 μm, and production costs increase when the thickness is greater than 2.0 μm.

The thickness of the electrode film means the thickness of the electrode film in a flat portion, such as the upper surface of the supporting structure portion or the top surface of the mesa structure portion.

FIG. 4is an enlarged cross-sectional view illustrating the vicinity of the transparent conductive film30and the electrical conduction window8b.

InFIG. 4, R1indicates the electrical conduction window8band the range S surrounded by the electrical conduction window8b(seeFIG. 1)). R2indicates the range (width) of the light emission hole9b. R3indicates the range (width) of the transparent conductive film30. R4indicates the inside of the ohmic metal portion (a range of the transparent conductive film30which is not covered with the ohmic metal portion). R5and R6indicate the range in which the ohmic metal portion is formed.

The transparent conductive film30is formed between the reflecting layer2and the compound semiconductor layer20at the position that corresponds to the electrical conduction window8band in the range S (seeFIG. 1) surrounded by the electrical conduction window8bin plan view.

The planar arrangement relationship between the components in the cross-section shown inFIG. 4will be described in reference toFIG. 4. First, R3(the range of the transparent conductive film30) is within R1(the electrical conduction window8band the range S surrounded by the electrical conduction window8b) in plan view.

In addition, R5and R6(the range in which the ohmic metal layer is formed) is beyond R2(the range of the light emission hole9b). In other words, R2(the range of the light emission hole9b) is within R4(the range of the transparent conductive film30which is not covered with the ohmic metal portion).

Since the transparent conductive film30is formed in the range S (seeFIG. 1), the flow of a current is concentrated between the contact portion9bbof the electrode film9and the transparent conductive film30, and an amount of current which flows to the other portion is small. As a result, for the amount of light emitted from the light-emitting layer13, the amount of light emitted from a portion which is arranged immediately below the electrical conduction window8band the range S (seeFIG. 1) surrounded by the electrical conduction window8bis significantly more than the amount of light emitted from a portion other than the portion which is arranged immediately below the electrical conduction window8band the range S. As a result, the ratio of light emitted from the light emission hole9bincreases and light extraction efficiency is improved.

The material forming the transparent conductive film30is not particularly limited as long as it is transparent (translucent) and has high conductivity. For example, ITO, IZO, or ZnO can be used.

The thickness of the transparent conductive film30is preferably in the range of 100 nm to 150 nm. The reason is that a sufficient current diffusion effect is not obtained when the thickness is less than 100 nm and the amount of light which is reflected and extracted by the metal reflecting film is reduced when the thickness is greater than 150 nm.

As shown inFIG. 4, the ohmic metal portion31may be provided in the peripheral portion30aof the transparent conductive film30, which does not overlap the light emission hole9bin plan view, between the transparent conductive film and the compound semiconductor layer.

The material forming the ohmic metal portion31is not particularly limited as long as it can make an ohmic contact with the bonding (contact) layer5. For example, AuBe or AuZn can be used.

It is preferable that the thickness of the ohmic metal portion is in the range of 0.8 μm to 1.2 μm. The reason is that it is difficult to obtain good contact when the thickness is less than 0.8 μm and raw material efficiency is reduced when the thickness is greater than 1.2 μm.

As shown inFIG. 1, the light leakage prevention film16, which prevents light emitted from the active layer from leaking from the side surface of the mesa structure portion7to the outside of the element, may be provided.

A known reflective material can be used as the material forming the light leakage prevention film16. For example, when AuGe/Ni/Au is used as the material forming the electrode film9, AuGe/Ni/Au can be used as the material forming the light leakage prevention film16.

In this embodiment, the protective film8d(8) is formed below the light emission hole9band light is extracted from the light emission hole9bthrough the protective film8d(8) in the top surface of the mesa structure portion7.

It is preferable that the light emission hole9bhas a circular or elliptical shape in plan view. The reason is as follows. It is easy to form a uniform contact region, as compared to a structure in which the light emission hole9bhas an angular shape, such as a rectangular shape, and it is possible to prevent, for example, the concentration of a current on the corner. In addition, this structure is suitable for coupling to a fiber in the light-receiving side.

It is preferable that the diameter of the light emission hole9bis in the range of 50 μm to 150 μm. The reason is as follows. When the diameter is less than 50 μm, current density increases in the light emission portion and output is saturated with a small amount of current. When the diameter is greater than 150 μm, it is difficult to diffuse the current to the entire light emission portion. As a result, light emission efficiency (luminous efficiency) with respect to an input current is reduced.

For example, metal, Ge, Si, GaP, GaInP, or SiC can be used as the material forming the supporting substrate1. A Ge substrate and a Si substrate have the advantages that they are inexpensive and have high humidity resistance. GaP, GaInP, and SiC substrate have advantages that they have a thermal expansion coefficient close to that of the light emission portion and have high humidity resistance and high thermal conductivity. A metal substrate is inexpensive and has high mechanical strength and high radiation performance. A laminated structure of a plurality of metal layers (metal plates) has the advantage that it can adjust the thermal expansion coefficient of the entire metal substrate, which will be described below.

When the metal substrate is used as the supporting substrate1, a plurality of metal layers (metal plates) can be laminated.

When the plurality of metal layers (metal plates) are laminated, it is preferable that two types of metal layers are alternately laminated. In particular, in two types of metal layers (for example, they are named a first metal layer and a second metal layer), it is preferable that the total number of the two types of metal layers is an odd number.

For example, when the second metal layer is a metal substrate interposed between the first metal layers, and the second metal layer consists of a material which has a smaller thermal expansion coefficient than the compound semiconductor layer, it is preferable that the first metal layer consists of a material which has a larger thermal expansion coefficient than the compound semiconductor layer, in order to prevent the warping or breaking of the metal substrate. The reason is as follows. Since the thermal expansion coefficient of the entire metal substrate is close to the thermal expansion coefficient of the compound semiconductor layer, it is possible to prevent the warping or breaking of the metal substrate when the compound semiconductor layer and the metal substrate are bonded to each other and to improve the production yield of the light-emitting diode. Similarly, when the second metal layer consists of a material which has a larger thermal expansion coefficient than the compound semiconductor layer, it is preferable that the first metal layer consists of a material which has a smaller thermal expansion coefficient than the compound semiconductor layer. The reason is as follows. Since the thermal expansion coefficient of the entire metal substrate is close to the thermal expansion coefficient of the compound semiconductor layer, it is possible to prevent the warping or breaking of the metal substrate when the compound semiconductor layer and the metal substrate are bonded to each other and to improve the production yield of the light-emitting diode.

From the above-mentioned viewpoint, one of the two types of metal layers may be the first metal layer or the second metal layer.

As the two types of metal layers, for example, a combination of a metal layer which consists of any one of silver (thermal expansion coefficient=18.9 ppm/K), copper (thermal expansion coefficient=16.5 ppm/K), gold (thermal expansion coefficient=14.2 ppm/K), aluminum (thermal expansion coefficient=23.1 ppm/K), nickel (thermal expansion coefficient=13.4 ppm/K), and alloys thereof and a metal layer which is made of any one of molybdenum (thermal expansion coefficient=5.1 ppm/K), tungsten (thermal expansion coefficient=4.3 ppm/K), chromium (thermal expansion coefficient=4.9 ppm/K), and alloys thereof can be used.

As a preferred example, there is a metal substrate including three layers of Cu/Mo/Cu. From the above-mentioned viewpoint, the same effect as described above is obtained from the metal substrate including three layers of Mo/Cu/Mo. Since the metal substrate including three layers of Cu/Mo/Cu has a structure in which the Mo layer with high mechanical strength is interposed between the Cu layers which are easy to process, the metal substrate is easier to cut than a metal substrate consisting of three layers of Mo/Cu/Mo.

For the thermal expansion coefficient of the metal substrate, for example, the thermal expansion coefficient of the metal substrate consisting of three layers of Cu (30 μm)/Mo (25 μm)/Cu (30 μm) is 6.1 ppm/K and the thermal expansion coefficient of the metal substrate consisting of three layers of Mo (25 μm)/Cu (70 μm)/Mo (25 μm) is 5.7 ppm/K.

From the viewpoint of heat dissipation, it is preferable that the metal layer forming the metal substrate consists of a material with high thermal conductivity. In this case, it is possible to improve the radiation performance of the metal substrate and to make the light-emitting diode emit light with high brightness. In addition, it is possible to increase the lifespan of the light-emitting diode.

It is more preferable that the metal layers consist of a material with a thermal expansion coefficient that is substantially equal to the thermal expansion coefficient of the compound semiconductor layer. In particular, it is preferable that the material of the metal layer has a thermal expansion coefficient that is ±1.5 ppm/K for the thermal expansion coefficient of the compound semiconductor layer. In this case, it is possible to reduce thermal stress on the light-emitting portion when the metal substrate and the compound semiconductor layer are bonded to each other. As a result, it is possible to suppress the breaking of the metal substrate due to heat caused when the metal substrate is connected to the compound semiconductor layer and to improve the production yield of the light-emitting diode.

For the thermal conductivity of the entire metal substrate, for example, the thermal conductivity of the metal substrate including three layers of Cu (30 μm)/Mo (25 μm)/Cu (30 μm) is 250 W/m·K and the thermal conductivity of the metal substrate including three layers of Mo (25 μm)/Cu (70 μm)/Mo (25 μm) is 220 W/m·K.

When the compound semiconductor layer is grown on a growth substrate, the metal substrate is bonded, and the growth substrate is removed by an etchant, it is preferable that the upper and lower surfaces of the metal substrate are covered with a metal protective film in order to prevent deterioration of it due to the etchant. In addition, it is preferable that the side surface of the metal substrate is covered with the metal protective film.

It is preferable that the metal protective film consists of a material including at least one of chromium and nickel with high adhesion, platinum which is chemically stable, and gold.

It is most preferable that the metal protective film is a layer made of a combination of nickel with high adhesion and gold with high chemical resistance. The thickness of the metal protective film is not particularly limited and is in the range of 0.2 μm to 5 μm in terms of the balance between etchant resistance and costs. Preferably, the optimum range of the thickness is from 0.5 μm to 3 μm. When expensive gold is used, it is preferable that the thickness is equal to or less than 2 μm.

Known functional layers can be timely added to the structure of the reflecting layer2and the compound semiconductor layer20(the bonding layer3, the active layer4, and the contact layer5). For example, the known layer structure, such as a current diffusion layer for diffusing an element driving current to the entire plane of the light-emitting portion, a current blocking layer for limiting a region through which the element driving current flows, or a current blocking layer, can be used.

As shown inFIG. 5, the active layer4includes a lower cladding layer11, a lower guide layer12, a light-emitting layer13, an upper guide layer14, and an upper cladding layer15which are sequentially laminated. That is, in order to emit light with high intensity, it is preferable that the active layer4has a so-called double hetero (abbreviated to DH) structure in which the lower cladding layer11and the lower guide layer12, and the upper guide layer14and the upper cladding layer15are arranged on the upper and lower sides of the light-emitting layer13to “confine” carriers causing radiation recombination and light emission to the light-emitting layer13, respectively.

As shown inFIG. 5, the light-emitting layer13can form a quantum well structure in order to control the emission wavelength of the light emitted with the light-emitting diode (LED). That is, the light-emitting layer13can have a multi-layer structure (laminated structure) of well layers17and barrier layers18which has the barrier layers18at both ends thereof.

It is preferable that the thickness of the light-emitting layer13is in the range of 0.02 μm to 2 μm. The conductivity type of the light-emitting layer13is not particularly limited and can be selected from any one of an undoped type, a p type, and an n type. It is preferable that the light-emitting layer13is an undoped type with good crystallinity or have a carrier concentration of less than 3×1017cm−3in order to improve light emission efficiency.

A known well layer material can be used as the material forming the well layer. 17. For example, AlGaAs, InGaAs, or AlGaInP can be used.

The thickness of the well layer17is preferably in the range of 3 nm to 30 nm and more preferably in the range of 3 nm to 10 nm.

It is preferable that a material which is suitable for the material forming the well layer17is selected as the material forming the barrier layer18. A material with a composition which has a larger band gap than the material forming the well layer17is preferably used in order to prevent the absorption of light by the barrier layer18and to improve light emission efficiency.

For example, when AlGaAs or InGaAs is used as the material forming the well layer17, it is preferable that AlGaAs or AlGaInP is used as the material forming the barrier layer18. When AlGaInP is the material forming the barrier layer18, the barrier layer18has high crystallinity and contributes to a high output since it does not include As which is likely to cause a defect.

When (AlX1Ga1-X1)Y1In1-Y1P (0≦X1≦1, 0<Y1≦1) is used as the material forming the well layer17, (AlX4Ga1-X4)Y1In1-Y1P (0≦X4≦1, 0<Y1≦1, X1<X4) with a composition containing Al in a large amount or AlGaAs with a higher band gap energy than the well layer (AlX1Ga1-X1)Y1In1-Y1P (0≦X1≦1, 0<Y1≦1) can be used as the material forming the barrier layer18.

It is preferable that the thickness of the barrier layer18is equal to or greater than the thickness of the well layer17. When the thickness of the barrier layer18is sufficiently large in a thickness range in which a tunnel effect is obtained, the spreading of carriers between the well layers due to the tunnel effect is suppressed and the effect of confining the carriers is improved. Therefore, the radiative recombination probability of electrons and holes increases and it is possible improve an emission output.

In the multi-layer structure of the well layers17and the barrier layers18, the number of pairs of the well layers17and the barrier layers18which are alternately laminated is not particularly and it is preferable that the number of pairs is equal to or greater than 2 and equal to or less than 40. That is, it is preferable that the light-emitting layer13includes 2 to 40 well layers17. It is preferable that five or more well layers17are provided in terms of the optimal light emission efficiency range of the light-emitting layer13. When a large number of pairs of the well layers17and the barrier layers18are provided, the forward voltage (VF) increases since the well layer17and the barrier layer18have low carrier concentration. Therefore, the number of pairs of the well layers17and the barrier layers18is preferably equal to or less than 40 and more preferably equal to less than 20.

As shown inFIG. 5, the lower guide layer12and the upper guide layer14are provided on the lower and upper surfaces of the light-emitting layer13, respectively. Specifically, the lower guide layer12is provided on the lower surface of the light-emitting layer13and the upper guide layer14is provided on the upper surface of the light-emitting layer13.

A known compound semiconductor material can be used as the material forming the lower guide layer12and the upper guide layer14. It is preferable to select a material which is suitable for the material forming the light-emitting layer13. For example, AlGaAs or AlGaInP can be used.

For example, when AlGaAs or InGaAs is used as the material forming the well layer17and AlGaAs or AlGaInP is used as the material forming the barrier layer18, AlGaAs or AlGaInP is preferable as the material forming the lower guide layer12and the upper guide layer14. When AlGaInP is used as the material forming the lower guide layer12and the upper guide layer14, the lower guide layer12and the upper guide layer14have high crystallinity and contribute to a high output since they do not include As which is likely to cause a defect.

When (AlX1Ga1-X1)Y1In1-Y1P (0≦X1≦1, 0<Y1≦1) is used as the material forming the well layer17, (AlX4Ga1-X4)Y1In1-Y1P (0≦X4≦1, 0<Y1≦1, X1<X4) with a high Al composition or AlGaAs with a higher band gap energy than the well layer (AlX1Ga1-X1)Y1In1-Y1P (0≦X1≦1, 0<Y1≦1) can be used as the material forming the guide layer14.

The lower guide layer12and the upper guide layer14are provided in order to reduce the propagation of defects between the lower and upper cladding layers11and15and the light-emitting layer13. Therefore, the thickness of the lower guide layer12and the upper guide layer14is preferably equal to or greater than 10 nm and more preferably in the range of 20 nm to 100 nm.

The conductivity type of the lower guide layer12and the upper guide layer14is not particularly limited and can be selected from any one of an undoped type, a p type, and an n type. It is preferable that the guide layers are an undoped type with good crystallinity or have a carrier concentration of less than 3×1017cm−3in order to improve light emission efficiency.

As shown inFIG. 5, the lower cladding layer11and the upper cladding layer15are provided on the lower surface of the lower guide layer12and the upper surface of the upper guide layer14, respectively.

A known compound semiconductor material can be used as the material forming the lower cladding layer11and the upper cladding layer15. It is preferable to select a material which is suitable for the material forming the light-emitting layer13. For example, AlGaAs or AlGaInP can be used.

For example, when AlGaAs or InGaAs is used as the material forming the well layer17and AlGaAs or AlGaInP is used as the material forming the barrier layer18, AlGaAs or AlGaInP is preferable as the material forming the lower cladding layer11and the upper cladding layer15. When AlGaInP is used as the material forming the lower cladding layer11and the upper cladding layer15, the lower cladding layer11and the upper cladding layer15have high crystallinity and contribute to a high output since they do not include As which is likely to cause a defect.

When (AlX1Ga1-X1)Y1In1-Y1P (0≦X1≦1, 0<Y1≦1) is used as the material forming the well layer17, (AlX4Ga1-X4)Y1In1-Y1P (0≦X4≦1, 0<Y1≦1, X1<X4) with a composition containing Al in a large amount or AlGaAs with a higher band gap energy than the well layer (AlX1Ga1-X1)Y1In1-Y1P (0≦X1≦1, 0<Y1≦1) can be used as the material forming the cladding layer15.

The lower cladding layer11and the upper cladding layer15are configured so as to have different polarities. The carrier concentration and thickness of the lower cladding layer11and the upper cladding layer15can be set in the known proper range. It is preferable to optimize conditions such that the light emission efficiency of the light-emitting layer13is improved. The lower and upper cladding layers don't have to be provided.

In addition, it is possible to control the composition of the lower cladding layer11and the upper cladding layer15to reduce the warping of the compound semiconductor layer20.

The contact layer5is provided in order to reduce contact resistance with the electrode. It is preferable that the contact layer5is made of a material with a higher band gap energy than that forming the light-emitting layer13. The lower limit of the carrier concentration of the contact layer5is preferably equal to or greater than 5×1017cm−3and more preferably equal to or greater than 1×1018cm−3, in order to reduce the contact resistance with the electrode. It is preferable that the upper limit of the carrier concentration is equal to or less than 2×1019cm−3at which crystallinity is likely to be reduced. It is preferable that the thickness of the contact layer5is equal to or greater than 0.05 μm. The upper limit of the thickness of the contact layer5is not particularly limited and is preferably equal to or less than 10 μm in order to set costs for epitaxial growth in a proper range.

The light-emitting diode according to the invention can be incorporated into electronic apparatuses, such as lamps, backlights, mobile phones, displays, various types of panels, computers, game machines, and illuminators, or mechanical devices, such as vehicles into which the electronic apparatuses are incorporated.

Second Embodiment

FIG. 6is a schematic cross-sectional view illustrating another example of the light-emitting diode which is an example of the light-emitting diode to which the invention is applied.

In the first embodiment, the protective film is formed below the light emission hole and light is extracted from the light emission hole through the protective film in the top surface of the mesa structure portion. A second embodiment has a structure in which the protective film is not provided below the light emission hole and light is directly extracted from a light emission hole9b, without passing through the protective film.

That is, in a light-emitting diode200according to the second embodiment, a protective film28covers at least a portion28cof a flat portion6, an inclined side surface7aof a mesa structure portion7, and a peripheral region7baof a top surface7bof the mesa structure portion7. In addition, the protective film28includes an electrical conduction window28bwhich is provided inside the peripheral region7bain plan view and from which the surface of a contact layer5is exposed. An electrode film29covers at least a portion of the flat portion6through the protective film28, covers the inclined side surface7aof the mesa structure portion7through the protective film28, and covers the peripheral region7baof the top surface7bof the mesa structure portion7through the protective film28. In addition, the electrode film29includes a light emission hole29bwhich is formed by covering only a portion of the surface of the contact layer5exposed from the electrical conduction window28bin the top surface of the mesa structure portion7and from which another portion5aof the surface of the contact layer5is exposed.

As shown inFIG. 6, the protective film28according to the second embodiment includes a portion28awhich covers the inclined side surface7aof the mesa structure portion7, a portion28c(including a portion28ccwhich is opposite to the portion28c, with the mesa structure portion7interposed therebetween, and covers an opposite flat portion) which covers at least a portion of the flat portion6, and a portion28bawhich covers the peripheral region7baof the top surface7bof the mesa structure portion7. In addition, the protective film28includes the electrical conduction window28bwhich is provided inside the peripheral region7bain plan view and from which the surface of the contact layer5is exposed. That is, a portion other than the portion of the surface of the contact layer5which is disposed below the peripheral region7bain the top surface7bof the mesa structure portion7is exposed from the electrical conduction window28b. The electrode film (front surface electrode film)29is formed on the protective film8. The protective film28is formed in a portion in which no current flows.

As shown inFIG. 6, the electrode film (front surface electrode film)29according to the second embodiment includes a portion29awhich covers the portion28aof the protective film28covering the inclined side surface7a, a portion29cwhich covers the portion28cof the protective film28covering at least a portion of the flat portion6, a portion29bawhich covers the portion28baof the protective film28covering the peripheral region7baof the top surface7bof the mesa structure portion7, and a portion29bbwhich covers the contact layer5over a portion28baof the protective film28in the top surface7bof the mesa structure portion7such that the light emission hole29bis formed.

In the electrode film (front surface electrode film)29according to the second embodiment, the portion29bbtakes on both the first function and the second function.

Next, a method of manufacturing the light-emitting diode according to the invention will be described.

<Process of Producing Supporting Substrate>

[1] when Ge Substrate is Used as Supporting Substrate1(See Reference Numerals Shown in FIG.11A)

A layer structure (a layer including Ti/Au/In)42including, for example, a Ti layer, an Au layer, and an In layer which are sequentially laminated is formed on a front surface41A of a germanium substrate41and a layer structure (a layer including Ti/Au)43including, for example, a Ti layer and an Au layer which are sequentially laminated is formed on a rear surface of the germanium substrate41. In this way, the supporting substrate1is produced.

[2] When Metal Substrate is Used as Supporting Substrate1

Modification Example

FIGS. 7(a) to 7(c)are schematic cross-sectional views illustrating a portion of the metal substrate for describing a process of manufacturing the metal substrate.

A first metal layer (first metal plate)51bwhich has a larger thermal expansion coefficient than the material forming the active layer and a second metal layer (second metal plate)51awhich has a smaller thermal expansion coefficient than the material forming the active layer are used as the metal substrate1and the substrate1is formed by performing a hot press.

Specifically, first, two first metal layers51bwhich are substantially flat plates and one second metal layer51awhich is a substantially flat plate are prepared. For example, a Cu layer with a thickness of 10 μm is used as the first metal layer51band a Mo layer with a thickness of 75 μm is used as the second metal layer51a.

Then, as shown inFIG. 7(a), the second metal layer51ais inserted between the two first metal layers51bso as to overlap each other.

Then, these metal layers which overlap each other are arranged in a predetermined pressing apparatus and a load is applied to the first metal layer51band the second metal layer51ain the direction of arrows at a high temperature. Then, as shown inFIG. 7(b), the metal substrate1consisting of three layers, that is, the Cu layer (10 μm), which is the first metal layer51b, the Mo layer (75 μm) which is the second metal layer51a, and the Cu layer (10 μm) which is the first metal layer51b, is formed.

For example, the metal substrate1has a thermal expansion coefficient of 5.7 ppm/K and a thermal conductivity of 220 W/m·K.

Then, as shown inFIG. 7(c), a metal protective film51cwhich covers the entire surface, that is, the upper, lower, and side surfaces of the metal substrate1is formed. In this case, since the metal substrate has not been divided into each light-emitting diode, the side surface of the metal substrate which is covered with the metal protective film means the outer circumferential side surface of the metal substrate (plate). Therefore, when the metal protective film51ccovers the side surface of the metal substrate1of each divided light-emitting diode, a process of covering the side surface with the metal protective film is separately performed.

FIG. 7(c)shows a portion of the metal substrate (plate), not the outer circumferential end. Therefore, the metal protective film on the outer circumferential side surface is not shown inFIG. 7(c).

The metal substrate doesn't have to include the metal protective film.

The metal protective film can be formed by a known film formation method. A plating method by which can form a film on the entire surface including the side surface is most preferable.

For example, by using an electroless plating method, nickel, gold are sequentially plated for the metal substrate1. Then the metal substrate1, whose upper, side, and lower surface are sequentially covered with the nickel film and the gold film (metal protective film), is obtained.

A plating material is not particularly limited and a known material, such as copper, silver, nickel, chromium, platinum, or gold can be used. A layer made of a combination of nickel with high adhesion and gold with high chemical resistance is optimal.

The plating method can use a known technique and a known chemical. The electroless plating method which does not require an electrode is simple and preferable.

<Process of Forming Compound Semiconductor Layer>

First, as shown inFIG. 8, a plurality of epitaxial layers are grown on one surface61aof a semiconductor substrate (growth substrate)61to form an epitaxial laminate80including the active layer4.

The semiconductor substrate61is used to form the epitaxial laminate80. For example, the semiconductor substrate61is a Si-doped n-type GaAs single crystal substrate in which one surface61ais inclined at 15° with respect to the (100) plane. When an AlGaInP layer or an AlGaAs layer is used as the epitaxial laminate80, a gallium arsenide (GaAs) single crystal substrate can be used as the substrate for forming the epitaxial laminate80.

As a method for forming the active layer4, for example, the following method can be used: a metal organic chemical vapor deposition (MOCVD) method; a molecular beam epitaxicy (MBE) method; or a liquid phase epitaxicy (LPE) method.

In this embodiment, each layer is epitaxially grown by using a low pressure MOCVD method with trimethylaluminum ((CH3)3Al), trimethylgallium ((CH3)3Ga) and trimethylindium ((CH3)3In) as a raw material for a group-III element.

Bis(cyclopentadienyl)magnesium ((C5H5)2Mg) is used as a MG doping material. In addition, disilane (Si2H6) is used as a Si doping material. Phosphine (PH3) or arsine (AsH3) is used as a raw material for a group-V element.

A p-type GaP layer3is grown at a temperature of, for example, 750° C. and the other epitaxially grown layers are grown at a temperature of, for example, 730° C.

Specifically, first, a buffer layer62awhich consists of Si-doped n-type GaAs is formed on the one surface61aof the growth substrate61. For example, the buffer layer62ais made of, for example, Si-doped n-type GaAs and has a carrier concentration of 2×1018cm−3and a thickness of 0.2 μm.

Then, in this embodiment, an etching stop layer62bis formed on the buffer layer62a.

The etching stop layer62bis used to prevent the cladding layer and the light-emitting layer from being etched when the semiconductor substrate is removed by etching, consists of, for example, Si-doped (Al0.5Ga0.5)0.5In0.5P, and has a thickness of 0.5 μM.

Then, the contact layer5which consists of, for example, Si-doped n-type AlXGa1-XAs (0.1≦X≦0.3) is formed on the etching stop layer62b.

Then, a cladding layer63awhich consists of, for example, Si-doped n-type (Al0.7Ga0.3)0.5In0.5P is formed on the contact layer5.

Then, a light-emitting layer64having a laminated structure of three pairs of well layers and barrier layers which respectively consists of, for example, pairs of Al0.17Ga0.83As and Al0.3Ga0.7As are formed on the cladding layer63a.

Then, a bonding (contact) layer3which is, for example, a Mg-doped p-type GaP layer is formed on the cladding layer63b.

Before the epitaxial laminate is bonded to a substrate, such as a metal substrate which will be described below, it is preferably polished by about 1 μm in order to process the bonding surface (that is, to perform a mirroring process such that surface roughness is equal to or less than, for example, 0.2 nm).

A guide layer may be provided between the cladding layer and the light-emitting layer.

<Process of Forming Transparent Conductive Film and Ohmic Metal Portion>

Then, as shown inFIG. 8, first, the ohmic metal portion31is formed in the peripheral portion30aof the transparent conductive film30(seeFIG. 1) to be formed which does not overlap the light emission hole to be formed in plan view on the bonding (contact) layer3. Since the transparent conductive film30(seeFIG. 1) is formed in the range corresponding to the electrical conduction window to be formed and the range S (seeFIG. 1) surrounded by the electrical conduction window, the ohmic metal portion31is also formed in the range.

Specifically, a film which consists of a metal material forming the ohmic metal portion is formed on the entire surface of the bonding (contact) layer3by, for example, a vapor deposition method. Then, the film which consists of the metal material is patterned by a photolithography method to form the ohmic metal portion31with the above-mentioned shape at a predetermined position.

The ohmic metal portion31may be formed by a liftoff technique. That is, a mask which has an opening corresponding to the shape of the ohmic metal portion at the formation position of the ohmic metal portion may be formed on the bonding (contact) layer3, a film which is made of a metal material forming the ohmic metal portion may be formed on the mask by the vapor deposition method, and the mask may be removed to form the ohmic metal portion31.

Then, as shown inFIG. 9, the transparent conductive film30is formed on the bonding (contact) layer3at the position that corresponds to the electrical conduction window to be formed and the range S (seeFIG. 1) surrounded by the electrical conduction window in plan view.

Specifically, a film which is made of a material forming a transparent conductive film is formed on the entire surface of the bonding (contact) layer3by, for example, a CVD method so as to cover the ohmic metal portion31. Then, the transparent conductive film is patterned by a photolithography method to form the transparent conductive film30with the above-mentioned shape at the position which corresponds to the electrical conduction window to be formed and in the range surrounded by the electrical conduction window.

The transparent conductive film30may be formed by the liftoff technique. That is, a mask which has an opening corresponding to the shape of the transparent conductive film30at the formation position of the transparent conductive film30may be formed on the bonding (contact) layer3, a film which is made of a metal material forming the transparent conductive film may be formed on the mask by, for example, the CVD method, and the mask may be removed to form the transparent conductive film30.

<Process of Forming Reflecting Layer>

Then, as shown inFIG. 10, a reflecting layer2which is made of, for example, Au is formed on the bonding (contact) layer3so as to cover the transparent conductive film30.

<Process of Bonding Supporting Substrate>

[1] when Ge Substrate is Used as Supporting Substrate1(See Reference Numerals inFIG. 11A)

The In layer on the front surface of the supporting substrate1, which is produced by forming the layer42including a Ti layer, an Au layer, and an In layer on the front surface of the germanium substrate41and by forming the layer43including a Ti layer and an Au layer on the rear surface, and the reflecting layer2which consists of Au in the structure shown inFIG. 10overlap each other, are heated at, for example, 320° C., and are pressed at 500 g/cm2. In this way, as shown inFIG. 11A, the supporting substrate1is bonded to the structure including the epitaxial laminate.

[2] When Metal Substrate is Used as Supporting Substrate1

Before the metal substrate is bonded to the reflecting layer2, a barrier layer (not shown) and/or a bonding layer (not shown) may be formed on the reflecting layer2.

The barrier layer can prevent metal contained in the metal substrate from being diffused and reacting with the reflecting layer2.

The barrier layer can be made of, for example, nickel, titanium, platinum, chromium, tantalum, tungsten, or molybdenum. The barrier layer may be a combination of two or more types of metal layers, for example, a combination of a platinum layer and a titanium layer which are sequentially provided from the reflecting layer. In this case, it is possible to improve the performance of the barrier.

The barrier layer doesn't have to be provided when these materials are added to the bonding layer, the bonding layer has the same function as the barrier layer.

The bonding layer is used to closely bond, for example, a compound semiconductor layer20including the active layer4to the metal substrate.

For example, an Au-based eutectic metal material which is chemically stable and has a low melting point can be used as the material forming the bonding layer. Examples of the Au-based eutectic metal material include eutectic alloys, such as AuGe, AuSn, AuSi, and AuIn.

Then, as shown inFIG. 11B, the semiconductor substrate61having the epitaxial laminate80, the reflecting layer2formed thereon and the metal substrate which is formed by the metal substrate manufacturing process are put into a decompression device and are arranged such that the bonding surface of the reflecting layer (a bonding surface of a bonding layer when the bonding layer is provided (the bonding layer is not shown inFIG. 11B)) and a bonding surface1A of the metal substrate face and overlap each other.

Then, the inside of the decompression device is evacuated to 3×10−5Pa and the semiconductor substrate61and the metal substrate1which overlap each other are heated at 400° C. In this state, a load of 500 kg is applied to bond the bonding surface of the reflecting layer (the bonding surface of the bonding layer when the bonding layer is provided) and the bonding surface1A of the metal substrate1. In this way, a bonding structure90is formed.

Next, a case in which a Ge substrate is used as the supporting substrate1will be described.

<Process of Removing Semiconductor Substrate and Buffer Layer>

Then, as shown inFIG. 12, the semiconductor substrate61and the buffer layer62aare selectively removed from the bonding structure90with an ammonia-based etchant.

In this case, since the metal substrate according to this embodiment is covered with the metal protective film and has high resistance to an etchant, it is possible to prevent the deterioration of the quality of the metal substrate.

<Process of Removing Etching Stop Layer>

Then, as shown inFIG. 12, the etching stop layer62bis selectively removed with a hydrochloric acid-based etchant.

Since the metal substrate according to this embodiment is covered with the metal protective film and has high resistance to an etchant, it is possible to prevent the deterioration of the quality of the metal substrate.

(Process of Forming Rear Surface Electrode)

Then, as shown inFIG. 12, a rear surface electrode40is formed on the rear surface of the metal substrate1.

When the metal substrate is used as the supporting substrate1, the rear surface electrode40doesn't have to be formed.

(Process of Forming Mesa Structure Portion)

Then, wet etching is performed on the compound semiconductor layer in a portion other than the mesa structure portion, that is, the contact layer and at least a portion of the active layer, or the contact layer, the active layer, and at least a portion of the bonding (contact) layer in order to form the mesa structure portion (except the protective film and the electrode film). Wet etching is performed on the contact layer5and the active layer4in order to form the mesa structure portion shown inFIG. 1.

Specifically, first, as shown inFIG. 13, a photoresist is deposited on the contact layer, which is the uppermost layer of the compound semiconductor layer, and a resist pattern65which has an opening65ain a portion other than the mesa structure portion is formed by photolithography.

The shape of the mesa structure portion in plan view is determined by the shape of the opening65aof the resist pattern65. The opening65awhich has a shape corresponding to a desired shape in plan view is formed in the resist pattern65.

It is preferable that the size of a portion of the resist pattern in which the mesa structure portion will be formed is about 10 μm greater than each of the upper, lower, left, and right sides of the top surface of the “mesa structure portion”.

An etching depth, that is, the layer to be removed by etching in the compound semiconductor layer is determined by the type of etchant and an etching time.

After wet etching is performed, the resist is removed.

Then, wet etching is performed on the compound semiconductor layer in the portion other than the mesa structure portion.

An etchant used for the wet etching is not limited. An ammonia-based etchant (for example, a mixture of ammonia, hydrogen peroxide, and water) is suitable for an As-based compound semiconductor material such as AlGaAs. An iodine-based etchant (for example, potassium iodide/ammonia) is suitable for a P-based compound semiconductor material such as AlGaInP. A mixture of phosphoric acid, hydrogen peroxide, and water is suitable for an AlGaAs-based material. A mixture of bromine and methanol is suitable for a P-based material.

In a structure in which the compound semiconductor layer is made of only an As-based material, a phosphoric acid mixture may be used. In a structure in which As and a P-based material is mixed, an ammonia mixture may be used for an As-based structure portion and an iodine mixture may be used for a P-based structure portion.

When the above-mentioned compound semiconductor layer, that includes the contact layer5which is the uppermost layer and is made of AlGaAs, the cladding layer63awhich is made of AlGaInP, the light-emitting layer64which is made of AlGaAs, the cladding layer63bwhich is made of AlGaInP, and the GaP layer3, is used, it is preferable that different etchant is used for the As-based contact layer5and light-emitting layer64and the P-based layers, so that the etching speed is high in each layer.

For example, it is preferable that an iodine-based etchant is used to etch the P-based layer and an ammonia-based etchant be used to etch the As-based contact layer5and light-emitting layer64.

For example, an etchant having iodine (I), potassium iodide (KI), pure water (H2O), or ammonia water (NH4OH) mixed therewith can be used as the iodine-based etchant.

In addition, for example, a mixture of ammonia, hydrogen peroxide, and water (NH4OH:H2O2:H2O) can be used as the ammonia-based etchant.

A case in which the portion other than the mesa structure portion is removed by the preferred etchant will be described. First, the contact layer5which is arranged in the portion other than the mesa structure portion and consists of AlGaAs is removed by etching with the ammonia-based etchant.

During the etching, since the cladding layer63awhich consists of AlGaInP, which is the next layer, functions as an etching stop layer, it is not necessary to strictly manage the etching time. For example, when the thickness of the contact layer5is about 0.05 μm, the etching may be performed for about 10 seconds.

Then, the cladding layer63awhich is arranged in the portion other than the mesa structure portion and consists of AlGaInP is removed by etching with the iodine-based etchant.

When an etchant containing 500 cc of iodine (I), 100 g of potassium iodide (KI), 2000 cc of pure water (H2O), and 90 cc of ammonium hydroxide (NH4OH) mixed with each other at this rate was used, the etching speed was 0.72 μm/min.

During the etching, since the light-emitting layer64which consists of AlGaAs, which is the next layer, functions as an etching stop layer, it is not necessary to strictly manage the etching time. For example, when the thickness of the cladding layer63ais about 4 μm, the etching may be performed for about 6 minutes.

Then, the light-emitting layer64which is arranged in the portion other than the mesa structure portion and consists of AlGaAs is removed by etching with the ammonia-based etchant.

During the etching, since the cladding layer63bwhich consists of AlGaInP, which is the next layer, functions as an etching stop layer, it is not necessary to strictly manage the etching time. For example, when the thickness of the light-emitting layer64is about 0.25 the etching may be performed for about 40 seconds.

Then, the cladding layer63bwhich is arranged in the portion other than the mesa structure portion and consists of AlGaInP is removed by etching with the iodine-based etchant.

The GaP layer3is arranged below the cladding layer63b. Since the exposure of the reflecting layer2which consists of metal and is arranged below the GaP layer3is not preferable in obtaining of electric characteristics, the GaP layer3also needs to function as an etching stop layer.

For example, when the GaP layer is formed to a thickness of 3.5 μm and is polished by 1 μm, the thickness of the GaP layer is 2.5 μm. When the thickness of the cladding layer63bis 0.5 μm and the iodine-based etchant is used, the etching time needs to be equal to or less than 4 minutes.

When a mixture of phosphoric acid, hydrogen peroxide, and water (for example, H2PO4:H2O2:H2O=1 to 3:4 to 6:8 to 10) is used, the etching can be performed for a wet etching time of 30 seconds to 120 seconds.

FIG. 14shows the relationship among the depth, the width, and the etching time when wet etching is performed on a compound semiconductor layer according to Example 1, which will be described below, using an etchant which is a mixture of H2PO4:H2O2:H2O=2:5:9 (100:250:450), contains 56% of H2O, and is at a temperature of 30° C. to 34° C. The conditions and results are numerically shown in Table 1.

As can be seen fromFIG. 14and Table 1, the etching depth (corresponding to “h” inFIG. 1) is substantially proportional to the etching time (sec) and the rate of increase in the etching width increases as the etching time increases. That is, as shown inFIG. 3, as the depth increases (as it goes down inFIG. 14), the rate of increase in the horizontal cross-sectional area (or the width or diameter) of the mesa structure portion increases. The etching shape is different from an etching shape by dry etching. Therefore, it is possible to distinguish whether the mesa structure portion is formed by dry etching or wet etching on the basis of the shape of the inclined side surface of the mesa structure portion.

(Process of Forming Protective Film)

Then, the material forming the protective film8is deposited on the entire surface. Specifically, for example, a SiO2film is formed on the entire surface by a sputtering method.

(Process of Removing Protective Film Corresponding to Street and Contact Layer)

Then, a photoresist is deposited on the entire surface and a resist pattern in which a portion corresponding to the electrical conduction window8band a portion corresponding to the street are opened is formed on the contact layer by photolithography.

Then, for example, in the material forming the protective film8, a portion corresponding to the electrical conduction window8bin the top surface of the mesa structure portion and a portion corresponding to the street are removed by wet etching with a buffered hydrofluoric acid to form the protective film8.

FIG. 15is a plan view illustrating the vicinity of the electrical conduction window8bof the protective film8.

Then, the resist is removed.

(Process of Forming Front Surface Electrode Film)

Then, the front surface electrode film9is formed. That is, the front surface electrode film9including the light emission hole9bis formed on the protective film8and on a portion of the contact layer5which is exposed from the electrical conduction window8bof the protective film8.

Specifically, a photoresist is deposited on the entire surface and a resist pattern in which portions that include a portion corresponding to the light emission hole9band a cutting portion (street) between a plurality of light-emitting diodes on a wafer substrate and do not require the electrode film are opened is formed by photolithography. Then, an electrode film material is vapor-deposited. When the electrode film material is not sufficiently vapor-deposited on the inclined side surface of the mesa structure portion only by the vapor deposition, it is further vapor-deposited on the inclined side surface of the mesa structure portion by a planetary deposition apparatus in which deposition metal easily goes round.

Then, the resist is removed.

The shape of the light emission hole9bis determined by the shape of the opening in the resist pattern (not shown). A resist pattern in which the shape of the opening corresponds to the desired shape of the light emission hole9bis formed.

Then, the wafer substrate is cut into light-emitting diodes.

Specifically, for example, the wafer substrate is cut into light-emitting diodes along the street portions by a dicing saw or a laser.

(Process of Forming Metal Protective Film on Side Surface of Metal Substrate)

When a metal substrate is used as the supporting substrate, the metal protective film may be formed on the cut side surface of the metal substrate of each divided light-emitting diode under the same conditions as those for forming the metal protective film on the upper surface and the lower surface.

Example

Hereinafter, the light-emitting diode according to the invention will be further described in detail using an example. However, the invention is not limited only to this example. In this example, a light-emitting diode lamp having a light-emitting diode chip mounted on a substrate was produced for characteristic evaluation.

In this example, with reference toFIGS. 1 and 4, the outside diameter R1of an electrical conduction window8bwas 166 μm, the inside diameter thereof was 154 μm, the diameter R2of a light emission hole was 150 μm, the outside diameter R3of a transparent conductive film30was 160 μm, the width R5(R6) of an ohmic metal portion was 6 and R4was 152 μm.

First, a layer42consisting of a Ti layer with a thickness of 0.1 μm, an Au layer with a thickness of 0.5 μm, and an In layer with a thickness of 0.3 μm was formed on the surface of a germanium substrate41. A layer43consisting of a Ti layer with a thickness of 0.1 μm and an Au layer with a thickness of 0.5 μm was formed on the rear surface of the germanium substrate41.

Then, compound semiconductor layers were sequentially laminated on a GaAs substrate which consists of a Si-doped n-type GaAs single crystal to produce an epitaxial wafer with an emission wavelength of 730 nm.

The GaAs substrate had a surface which was inclined at an angle of 15° with respect to the (100) plane in the (0-1-1) direction as a growth surface and had a carrier concentration of 2×1018cm−3. In addition, the thickness of the GaAs substrate was about 0.5 μm. The compound semiconductor layers include an n-type buffer layer62awhich consists of Si-doped GaAs, an etching stop layer62bwhich consists of Si-doped (Al0.5Ga0.5)0.5In0.5P, the contact layer5which consists of Si-doped n-type Al0.3GaAs, an n-type upper cladding layer63awhich consists of Si-doped (Al0.7Ga0.3)0.5In0.5P, an upper guide layer which consists of Al0.4Ga0.6As, a well layer/barrier layer64which consists of Al0.17Ga0.83As/Al0.3Ga0.7As, a lower guide layer which consists of Al0.4Ga0.6As, a p-type lower cladding layer63bwhich consists of Mg-doped (Al0.7Ga0.3)0.5In0.5P, a thin intermediate layer which consists of (Al0.5Ga0.5)0.5In0.5P, and a Mg-doped p-type GaP layer3.

In this example, the compound semiconductor layers were epitaxially grown on the GaAs substrate to a diameter of 50 mm and a thickness of 250 μm by using a low pressure metal organic chemical vapor deposition method (MOCVD apparatus) to form an epitaxial wafer. When the epitaxial growth layer was formed, trimethylaluminum ((CH3)3Al), trimethylgallium ((CH3)3Ga), and trimethylindium ((CH3)3In) were used as a raw material for a group-III element. In addition, bis(cyclopentadienyl)magnesium (bis-(C5H5)2Mg) was used as a MG doping material. In addition, disilane (Si2H6) was used as a Si doping material. Phosphine (PH3), arsine (AsH3) were used as a raw material for a group-V element.

The growth temperature of each layer is as follows. The p-type GaP layer was grown at 750° C. The other layers were grown at 700° C.

The buffer layer which consisted of GaAs had a carrier concentration of about 2×1018cm−3and a thickness of about 0.5 μm. The etching stop layer had a carrier concentration of 2×1018cm−3and a thickness of about 0.5 μm. The contact layer had a carrier concentration of about 2×1018cm−3and a thickness of about 0.05 μm. The upper cladding layer had a carrier concentration of about 1×1018cm−3and a thickness of about 3.0 μm. The well layer was undoped, consisted of Al0.17Ga0.83As, and had a thickness of about 7 nm. The barrier layer was undoped, consisted of Al0.3Ga0.7As, and had a thickness of about 19 nm. Three pairs of the well layers and the barrier layers were alternately laminated. The lower guide layer was undoped and had a thickness of about 50 nm. The lower cladding layer had a carrier concentration of about 8×1017cm3and a thickness of about 0.5 μm. The intermediate layer had a carrier concentration of about 8×1017cm−3and a thickness of about 0.05 μm. The GaP layer had a carrier concentration of about 3×1018cm3and a thickness of about 3.5 μm.

Then, the GaP layer3was polished to a depth of about 1 μm from the surface by mirror polishing. The surface roughness of the GaP layer was 0.18 nm by the mirror polishing.

Then, an ohmic metal portion31, which consisted of AuBe and had a thickness of 0.1 μm and a width R5(R6) (seeFIG. 4) of 6 μm, was formed on the GaP layer3. Then, a transparent conductive film30, which consisted of ITO and had a thickness of 150 nm and an outside diameter R3(seeFIG. 4) of 160 μm, was formed so as to cover the ohmic metal portion.

Then, a reflecting layer2, which consisted of Au and had a thickness of 0.7 μm, was formed on the GaP layer3so as to cover the transparent conductive film30. In addition, a Ti layer with a thickness of 0.5 μm was formed as the barrier layer on the reflecting layer and an AuGe layer with a thickness of 1.0 μm was formed as the bonding layer on the barrier layer.

Then, the structure having the compound semiconductor layers and the reflecting layer formed on the GaAs substrate and the metal substrate were arranged so as to face each other, were placed into the decompression device, and were heated at 400° C. In this state, a load of 500 kg was applied to bond the structure and the metal substrate, thereby forming a bonding structure.

Then, the GaAs substrate, which was a growth substrate for the compound semiconductor layers, and the buffer layer were selectively removed from the bonding structure by an ammonia-based etchant. In addition, the etching stop layer was selectively removed with a hydrochloric acid-based etchant.

(Process of Forming Rear Surface Electrode)

Then, an Au film with a thickness of 1.2 μm and an AuBe film with a thickness of 0.15 μm were sequentially formed on the rear surface of the metal substrate1by a vacuum vapor deposition method to form a rear surface electrode40.

Then, in order to form a mesa structure portion, a resist pattern was formed and wet etching was performed with a mixture of ammonia, hydrogen peroxide, and water (NH4OH:H2O2:H2O) for 10 seconds to remove a current diffusion layer55in a portion other than the mesa structure portion.

Then, wet etching was performed with an iodine-based etchant which contained 500 cc of iodine (I), 100 g of potassium iodide (KI), 2000 cc of pure water (H2O), and 90 cc of ammonium hydroxide water (NH4OH) at this ratio for 45 seconds to remove the upper cladding layer55in the portion other than the mesa structure portion.

Then, wet etching was performed with the mixture of ammonia, hydrogen peroxide, and water (NH4OH:H2O2:H2O) for 40 seconds to remove the upper guide layer, the light-emitting layer64, and the lower guide layer in the portion other than the mesa structure portion.

Then, wet etching was performed with the iodine-based etchant for 50 seconds to remove the lower cladding layer63bin the portion other than the mesa structure portion.

In this way, the mesa structure portion was formed.

Then, in order to form a protective film, the protective film which consisted of SiO2was formed to have a thickness of about 0.5 μm.

Then, a resist pattern was formed and an opening (seeFIG. 15) which had a concentric shape (an outside diameter dout: 166 μm; and an inside diameter din: 154 μm) in plan view and an opening for the street portion were formed by using a buffered hydrofluoric acid.

Then, in order to form a front surface electrode (film), after a resist pattern was formed, an AuGe film with a thickness of 0.5 μm, a Ni alloy film with a thickness of 0.5 μm, a Pt film with a thickness of 0.2 μm, and an Au film with a thickness of 1 μm were formed by a vacuum vapor deposition method, and the front surface electrode (n-type ohmic electrode) which included a light emission hole9bwith a circular shape (diameter: 150 μm) in plan view and had a long side of 350 μm and a short side of 250 μm was formed by a liftoff technique.

Then, a heat treatment was performed at 450° C. for 10 minutes to change the materials into an alloy, thereby forming a low-resistance n-type ohmic electrode.

Then, in order to form a light-leakage-prevention film16on the side surface of the mesa structure portion, after a resist pattern was formed, a Ti film with a thickness of 0.5 μm and an Au film with a thickness of 0.17 μm were sequentially formed by vapor deposition, and the light-leakage-prevention film16was formed by the liftoff technique.

Then, wet etching and laser cutting were sequentially performed to divide the wafer into light-emitting diodes. In this way, the light-emitting diode according to the example was manufactured.

100 light-emitting diode lamps, each having the manufactured light-emitting diode chip according to the example mounted on a mount substrate, were assembled. The light-emitting diode lamp was manufactured by supporting (mounting) a mount with a die bonder, connecting a p-type ohmic electrode and a p electrode terminal with a gold line using wire bonding, and performing sealing with a general epoxy resin.

In the light-emitting diode (light-emitting diode lamp), when a current flowed between the n-type electrode and the p-type electrode, infrared light with a peak wavelength 730 of nm was emitted. When a current of 20 milliamperes (mA) flowed in the forward direction, a forward voltage (VF) was 1.7V. When the forward current was 20 mA, an emission output was 3.8 mW. A response speed (rise time: Tr) was 12.5 nsec.

The 100 produced light-emitting diode lamps had the same characteristics and there was no defect caused by leakage (short-circuit) when the protective film was a discontinuous film or an electrical conduction failure when the electrode metal film was a discontinuous film.

Comparative Example

A light-emitting diode according to a comparative example was formed by a liquid phase epitaxial method according to the related art. The light-emitting diode includes a light emission portion with a double hetero structure in which an Al0.2Ga0.8As light-emitting layer is formed on a GaAs substrate.

Specifically, the light-emitting diode according to the comparative example was manufactured by the liquid phase epitaxial method such that an n-type upper cladding layer that consisted of Al0.7Ga0.3As and had a thickness of 20 μm, an undoped light-emitting layer that consisted of Al0.2Ga0.8As and had a thickness of 2 μm, a p-type lower cladding layer that was made of Al0.7Ga0.3As and had a thickness of 20 μm, and a p-type thin layer that was made of Al0.6Ga0.4As, which was transparent with respect to an emission wavelength, and had a thickness of 120 μm were formed on an n-type GaAs single crystal substrate with the (100) plane. After the epitaxial growth, the GaAs substrate was removed. Then, an n-type ohmic electrode to a diameter of 100 μm was formed on the surface of the n-type AlGaAs substrate. Then, p-type ohmic electrodes with a diameter of 20 μm were formed on the rear surface of the p-type AlGaAs layer at intervals of 80 μm. Then, the substrate was cut by a dicing saw at intervals of 350 μm and a broken layer was removed by etching. In this way, the light-emitting diode chip according to the comparative example was manufactured.

When a current flowed between the n-type electrode and the p-type electrode, infrared light with a peak wavelength 730 of nm was emitted. When a current of 20 milliamperes (mA) flowed in the forward direction, a forward voltage (VF) was about 1.9 volts (V). When the forward current was 20 mA, a light emission output was 5 mW. A response speed (Tr) was 15.6 nsec, which was later than that in the example according to the invention.

REFERENCE SIGNS LIST