Backside illuminated image sensor with self-aligned metal pad structures

An image sensor comprises a semiconductor material having a front side and a back side opposite the front side; a dielectric layer disposed on the front side of the semiconductor material; a poly layer disposed on the dielectric layer; an interlayer dielectric material covering both the poly layer and the dielectric layer; an inter-metal layer disposed on the interlayer dielectric material, wherein a metal interconnect is disposed in the inter-metal layer; and a contact pad trench extending from the back side of the semiconductor material into the semiconductor material, wherein the contact pad trench comprises a contact pad disposed in the contact pad trench, wherein the contact pad and the metal interconnect are coupled with a plurality of contact plugs; and at least an air gap isolates the contact pad and side walls of the contact pad trench. The poly layer and the semiconductor material between adjacent two STI structures of a plurality of first and second STI structures are used as hard masks to form the plurality of contact plugs by selectively removing the dielectric materials between a first side of the plurality of first STI structures and the metal interconnect, wherein each of the plurality of contact plugs extends from the first side of each of the plurality of first STI structures through each of the plurality of first STI structures into the interlayer dielectric material and vertically abuts the metal interconnect.

TECHNICAL FIELD

This disclosure relates generally to semiconductor image sensors, and in particular but not exclusively, relates to backside illuminated semiconductor image sensors.

BACKGROUND INFORMATION

Image sensors have become ubiquitous. They are widely used in digital still cameras, cellular phones, security cameras, as well as medical, automobile, and other applications. The device architecture of image sensors has continued to advance at a great pace due to increasing demands for higher resolution, lower power consumption, increased dynamic range, etc. These demands have also encouraged the further miniaturization and integration of image sensors into these devices.

The typical image sensor operates as follows. Image light from an external scene is incident on the image sensor. The image sensor includes a plurality of photosensitive elements such that each photosensitive element absorbs a portion of incident image light. Photosensitive elements included in the image sensor, such as photodiodes, each generate image charge upon absorption of the image light. The amount of image charge generated is proportional to the intensity of the image light. The generated image charge may be used to produce an image representing the external scene.

While there are a variety of ways to make image sensors, reducing the number of steps with fewer photo masks in semiconductor processing applications is always important. Since every fabrication step adds cost and time on the assembly line, new techniques to enhance image sensor throughput are needed.

DETAILED DESCRIPTION

FIG. 3is a block diagram schematically illustrating one example of an imaging system300with self-aligned metal pad structures, in accordance with the teachings of the present invention. Imaging system300includes pixel array312, control circuitry321, readout circuitry311, and function logic315. Readout circuitry311and control circuitry321may be at least partially disposed in inter-metal layer106ofFIGS. 2A-2F. For example, a metal interconnect107may be included in at least one of readout circuitry and control circuitry.

Referring back toFIG. 3, in one example, pixel array312is a two-dimensional (2D) array of photodiodes, or image sensor pixels (e.g., pixels P1, P2. . . , Pn). As illustrated, photodiodes are arranged into rows (e.g., rows R1to Ry) and columns (e.g., column C1to Cx) to acquire image data of a person, place, object, etc., which can then be used to render a 2D image of the person, place, object, etc. However, in other examples, it is appreciated that the photodiodes do not have to be arranged into rows and columns and may take other configurations.

In one example, after the image sensor photodiode/pixel in pixel array312has acquired its image data or image charge, the image data is readout by readout circuitry311and then transferred to function logic315. In various examples, readout circuitry311may include amplification circuitry, analog-to-digital conversion (ADC) circuitry, or otherwise. Function logic315may simply store the image data or even manipulate the image data by applying post image effects (e.g., crop, rotate, remove red eye, adjust brightness, adjust contrast, or otherwise). In one example, readout circuitry311may readout a row of image data at a time along readout column lines (illustrated) or may readout the image data using a variety of other techniques (not illustrated), such as a serial readout or a full parallel readout of all pixels simultaneously.

In one example, control circuitry321is coupled to pixel array312to control operation of the plurality of photodiodes in pixel array312. For example, control circuitry321may generate a shutter signal for controlling image acquisition. In one example, the shutter signal is a global shutter signal for simultaneously enabling all pixels within pixel array312to simultaneously capture their respective image data during a single acquisition window. In another example, the shutter signal is a rolling shutter signal such that each row, column, or group of pixels is sequentially enabled during consecutive acquisition windows. In another example, image acquisition is synchronized with lighting effects such as a flash.

In one example, imaging system300may be included in a digital camera, cell phone, laptop computer, automobile or the like. Additionally, imaging system300may be coupled to other pieces of hardware such as a processor (general purpose or otherwise), memory elements, output (USB port, wireless transmitter, HDMI port, etc.), lighting/flash, electrical input (keyboard, touch display, track pad, mouse, microphone, etc.), and/or display. Other pieces of hardware may deliver instructions to imaging system300, extract image data from imaging system300, or manipulate image data supplied by imaging system300.

FIG. 1A-FIG. 1Dare cross sectional illustrations of an example image sensor100, wherein each of the figures represents the example image sensor100after a series of critical process steps are finished during fabrication of the example image sensor100with a standard metal pad structure inFIG. 1D, in accordance with the teachings of the present invention. In order to keep the description consistent and simple, the same structure is defined with the same number inFIG. 1A-FIG. 1D.

FIG. 1Aillustrates a cross sectional view of the example image sensor100comprising a semiconductor material102having a front side111and a back side109opposite the front side111. In the semiconductor material102, there is a shallow trench isolation (STI) structure103which extends from the front side111of the semiconductor material102into the semiconductor material102. The STI structure103is used to electrically separate adjacent image sensors. In one example, the STI structure103is filled by at least one of dielectric materials such as silicon oxide or silicon nitride. In another example, the STI structure103may also comprise a negative charged material liner at an interface between the filled dielectric materials and the semiconductor material102(not illustrated in the figures). The negative charged material liner is used to form a P+ pinning layer at the interface between the filled dielectric materials and the semiconductor material102in order to reduce the dark current and white pixels. On the front side111of the semiconductor material102, there are also a thin dielectric layer104, an interlayer dielectric material105and an inter-metal layer106. The thin dielectric layer104may be the gate oxide of the pixel transistors. The interlayer dielectric material105is disposed between the thin dielectric layer104and the inter-metal layer106. In the inter-metal layer106, there is a metal interconnect107wherein the metal interconnect107is made of at least one of metals comprising Cu and TiN. The interlayer dielectric material105, the dielectric layer104and the inter-metal layer106are made of at least one of dielectric materials comprising silicon oxide and silicon nitride. In one example, they are made of same dielectric materials. In another example, they are made of different dielectric materials. In one example, a buffer layer101is disposed on the back side109of the semiconductor material102in order to protect the back side109of the semiconductor material102. The buffer layer101comprises at least one of dielectric materials such as silicon oxide or silicon nitride.

FIG. 1Billustrates a cross sectional view of the example image sensor100after a contact pad trench108is formed in the example image sensor100ofFIG. 1A. In one example, the contact pad trench108extends from the back side109of the semiconductor material102into the semiconductor material102until lands on a first side118of the STI structure103, wherein the contact pad trench108is enclosed with the STI structure103. In one example, the contact pad trench108is formed by a first patterning process which comprises at least a first photolithography process followed by a first etch processes comprising at least one of a first anisotropic plasma etch and a first selective wet etch process. The first etch processes have significantly higher etch rate for the semiconductor material102compared to the dielectric materials in the STI structure103. Therefore, the first etch processes stop on the first side118of the STI structure103. In another example, the contact pad trench108extends from the buffer layer101into the semiconductor material102, wherein the buffer layer101is also selectively etched during the first patterning process to form the contact pad trench108.

FIG. 1Cillustrates a cross sectional view of the example image sensor100after a plurality of contact plugs110are formed in the example image sensor100ofFIG. 1B. Each of the plurality of contact plugs110extends from the first side118of the STI structure103through the dielectric layer104, the interlayer dielectric material105and lands on the metal interconnect107at the interface114between the interlayer dielectric material105and the metal interconnect107. In one example, each of the plurality of contact plugs110is formed by a second patterning process which comprises at least a second photolithography process followed by at least one of a second anisotropic plasma dry etch and a second selective wet etch process. In the second etch processes, the second etch rates for the dielectric materials in the STI structures103, the interlayer dielectric material105and the dielectric layer104are significantly higher than the second etch rates for the conductive materials in the metal interconnect107. Therefore, the second etch processes stop at the interface114between the interlayer dielectric material105and the metal interconnect107. As a result, each of the plurality of contact plugs110lands on the metal interconnect107.

FIG. 1Dillustrates a cross sectional view of the example image sensor100after a contact pad112is formed in the example image sensor100ofFIG. 1C. In the contact pad trench108, the contact pad112is disposed on the first side118of the STI structure103and coupled with the metal interconnect107by the plurality of contact plugs110. In one example, each of the plurality of the contact plugs110is filled by at least one of conductive materials comprising Al, W, Cu, and TiN, and the contact pad is made of the same conductive materials as ones in each of the plurality of the contact plugs110. In another example, the contact pad is made of different conductive materials from ones in each of the plurality of the contact plugs110. The conductive materials comprise at least one of Al, Cu, W, and TiN. There is at least one air gap113between the contact pad112and sidewalls of the contact pad trench108, wherein the air gaps isolate the contact pad112from the semiconductor material102. In one example, the contact pad112and the air gap113are formed by a third patterning process which comprises at least a third photolithography process followed by at least one of a third anisotropic plasma dry etch and a third selective wet etch process. In the third etch processes, the third etch rates for the conductive materials in the contact pad112is significantly higher than the third etch rates for the dielectric materials in the STI structures103and the semiconductor material102. Therefore, the third etch processes stop at the first side118of the STI structure103and there is no undercut on sidewalls of the contact pad trench108.

FIG. 2A-FIG. 2Fare cross sectional illustrations of an example image sensor200, wherein each of the figures represents the example image sensor200after a series of critical process steps are finished during fabrication of the example image sensor200with a self-aligned metal pad structure inFIG. 2F, in accordance with the teachings of the present invention. In order to keep the description consistent and simple, the same structure is defined with the same number inFIGS. 1A-1DandFIG. 2A-2F.FIG. 4illustrates an example method400for forming the example image sensors with a self-aligned metal pad inFIG. 2A-2F, wherein each of the process blocks inFIG. 4corresponds to one of the figures inFIG. 2A-FIG. 2Fas described in the next paragraphs. The order in which some or all process blocks appear in method400should not be deemed limited. Rather, one of ordinary skill in the art having the benefit of the present disclosure will understand that some of method400may be executed in a variety of orders not illustrated, or even in parallel. Furthermore, method400may omit certain process blocks in order to avoid obscuring certain aspects. Alternatively, method400may include additional process blocks that may not be necessary in some embodiments or examples of the disclosure.

FIG. 2Aillustrates a cross sectional view of the example image sensor200comprising a semiconductor material102after the corresponding process block401and partial process block402inFIG. 4has been done. In the process block401, the semiconductor material102is provided, which has a front side111and a back side109opposite the front side111, wherein a plurality of first shallow trench isolation (STI) structures201aand a plurality of second STI structures201bare formed extending from the front side111of the semiconductor material102into the semiconductor material102, wherein each of the plurality of first STI structures201ais fully surrounded by adjacent first201aand second201bSTI structures and each of the plurality of second STI structures201bis partially surrounded by adjacent first201aand second201bSTI structures. The plurality of first STI structures201aand second STI structures201bare used to electrically separate adjacent image sensors. In one example, each of the plurality of first STI structures201aand second STI structures201bis filled by at least one of dielectric materials such as silicon oxide or silicon nitride. In another example, each of the plurality of first STI structures201aand second STI structures201bmay also comprise a negative charged material liner at an interface between the filled dielectric materials in each of the plurality of first201aand second201bSTI structures and the semiconductor material102(not illustrated in the figures). The negative charged material liner is used to form a P+ pinning layer at the interface so as to reduce the dark current and white pixels.

As illustrated inFIG. 2Aand described in the process block402inFIG. 4, a dielectric layer104may be disposed on the front side111of the semiconductor material102at the same process step as disposing the gate oxide of the pixel and periphery transistors. Moreover, a poly layer202may also be disposed on the thin dielectric layer104at the same process step as disposing the poly gate of pixel and periphery transistors. In one example, a buffer layer101is disposed on the back side109of the semiconductor material102in order to protect the back side109of the semiconductor material102. The buffer layer101comprises at least one of dielectric materials such as silicon oxide or silicon nitride.

FIG. 2Billustrates a cross sectional view of the example image sensor200after a plurality of open slots203are formed in the poly layer202in the example image sensor200ofFIG. 2A. The corresponding process block is402inFIG. 4. Each of the plurality of open slots203extends from a first side220of the poly layer202to the interface of the poly layer202and the dielectric layer104, wherein each of the plurality of open slots203aligns up with each of the plurality of first STI structures201aand has same two dimensional lateral dimensions as the aligned first STI structure201a. In one example, the plurality of open slots203and the poly gates of the pixel and periphery transistors are formed at the same time with the same patterning process and photo mask. Therefore, compared to the fabrication processes of the standard metal pad structure inFIG. 1A-1D, it does not require an additional patterning process step to form the plurality of open slots203.

FIG. 2Cillustrates a cross sectional view of the example image sensor200after an interlayer dielectric material105and an inter-metal layer106are disposed on the example image sensor200ofFIG. 2B. The corresponding process block is403inFIG. 4. The interlayer dielectric material105is disposed between the dielectric layer104and the inter-metal layer106. The dielectric layer104and the poly layer202are covered by the interlayer dielectric material105, wherein the plurality of open slots203are filled with the interlayer dielectric material105. In the inter-metal layer106, there is a metal interconnect107wherein the metal interconnect107is made of at least one of metals comprising Cu and TiN. The interlayer dielectric material105, the dielectric layer104and the inter-metal layer106are made of at least one of dielectric materials comprising silicon oxide and silicon nitride. In one example, they are made of same dielectric materials. In another example, they are made of different dielectric materials.

FIG. 2Dillustrates a cross sectional view of the example image sensor200after a contact pad trench204is formed in the example image sensor200ofFIG. 2C. The corresponding process block is404inFIG. 4. In one example, the contact pad trench204extends from the back side109of the semiconductor material102into the semiconductor material102until lands on a first side218of the plurality of first STI structure201aand second STI structure201b, wherein the sidewalls of the contact pad trench204land on the plurality of the second STI structures201b. In one example, the contact pad trench204is formed by a fourth patterning process which comprises at least a fourth photolithography process followed by at least one of a fourth anisotropic plasma etch and a fourth selective wet etch process. The fourth etch processes have significantly higher etch rate for the semiconductor material102compared to the dielectric materials in the plurality of the first STI structures201aand the second STI structures201b. Moreover, the etch time is preciously monitored and controlled during the plasma dry etch and the selective wet etch processes in order to avoid over etch and under etch. As a result, the fourth etch processes stop on the first side218of the first STI structures201aand the second STI structures201b. There are portions206of the semiconductor material102remained between adjacent first201aand second201bSTI structures, which will be used as a hard mask in the following self-aligned patterning process steps. In another example, the contact pad trench204extends from the buffer layer101into the semiconductor material102, wherein the buffer layer101is also selectively etched during the fourth patterning process to form the contact pad trench204.

FIG. 2Eillustrates a cross sectional view of the example image sensor200after a plurality of contact plugs205and at least one air gap208aare formed in the example image sensor200ofFIG. 2D. The corresponding process block is405inFIG. 4. Each of the plurality of contact plugs205extends from the first side218of the first201aand second201bSTI structure through the dielectric layer104, the interlayer dielectric material105and lands on the metal interconnect107at the interface114between the interlayer dielectric material105and the metal interconnect107.

In one example, each of the plurality of contact plugs205is formed by a self-aligned patterning process, wherein the portions206of the semiconductor material102are used as a hard mask to define the plurality of the contact plugs205and the air gaps208a. Therefore, the self-aligned patterning process comprises only a fifth selective etch process without a fifth photolithography process, which may help to reduce the fabrication cost and simplify the fabrication process by minimizing the number of photolithography steps.

During the fifth selective etch process, the dielectric materials defined by the portions206of the semiconductor material102are selectively removed by at least one of selective anisotropic plasma dry etch and a selective wet etch processes. The removed dielectric materials include the dielectric materials in each of the plurality of the first STI structure201aand a partial second STI structure201b, the dielectric materials in each of the plurality of open slots203in the poly layer202, a portion of the dielectric layer104, and a portion of the interlayer dielectric material105. The portion of the dielectric layer104and the portion of the interlayer dielectric material105are self-aligned with the STI structures, wherein the portions206of the semiconductor material102are used as a hard mask during the selective etch processes. The selective plasma dry etch and the selective wet etch processes have significantly higher etch rates for the dielectric materials in the STI structures201aand201b, the dielectric layer104and the interlayer dielectric material105, than the etch rates for the conductive materials in the metal interconnect107and the semiconductor materials in the portions206of the semiconductor material102and the poly layer202. As a result, the selective etch processes automatically slow down greatly at the interface114between the interlayer dielectric material105and the metal interconnect107so as to form the plurality of contact plugs205, wherein each of the plurality of contact plugs205lands on the metal interconnect107. Moreover, the selective etch processes also automatically slow down greatly at the interface between the poly layer202and the dielectric layer104, so as to form at least one air gap208a, wherein each of the air gaps lands on the poly layer202. In one example, after the selective anisotropic etch processes are finished, there are a portion of the dielectric materials remained in each of the plurality of the second STI structures201bbetween the air gaps and the semiconductor material102.

FIG. 2Fillustrates a cross sectional view of the example image sensor200after a contact pad207and at least one air gap208bare formed in the example image sensor200ofFIG. 2E. The corresponding process block is406inFIG. 4. In the contact pad trench204, the contact pad207is disposed on the first side218of the plurality of first STI structures201aand second STI structures201b. The contact pad207is coupled with the metal interconnect107by the plurality of contact plugs205. In one example, each of the plurality of the contact plugs205is filled by at least one of conductive materials comprising Al, and the contact pad207is made of the same conductive materials as the conductive materials in each of the plurality of the contact plugs205. In another example, the contact pad207is made of different conductive materials than the conductive materials in each of the plurality of the contact plugs205. The conductive materials comprise at least one of Al, Cu, W, and TiN. There is at least one air gap208aand at least one air gap208bbetween the contact pad207and sidewalls of the contact pad trench204, wherein the air gaps isolate the contact pad207from the semiconductor material102.

In one example, the contact pad207and the air gap208aand208bare formed by a sixth patterning process which comprises at least a sixth photolithography process followed by at least one of a sixth anisotropic plasma dry etch and a sixth selective wet etch process. In the sixth etch processes, the sixth etch rates for the conductive materials in the contact pad207and the contact plugs205are significantly higher than the sixth etch rates for the dielectric materials in the STI structures (201aand201b) and the semiconductor material102and206. Therefore, the sixth etch processes stop on the first side218of the STI structures (201aand201b) and there is no undercut on sidewalls of the contact pad trench204.