Digital-controlled vector signal modulator

A vector modulator includes a quadrature component generator, configured to generate an input in-phase signal and an input quadrature signal according to an input radio frequency (RF) signal; a switching circuit, receiving a plurality of bits, comprising a plurality of switches controlled by the plurality of bits, configured to generate an output in-phase signal and an output quadrature signal according to the plurality of bits, where the output in-phase signal and the output quadrature signal are related to input in-phase signal and the input quadrature signal; and a combining module, configured to generate an output RF signal according to the output in-phase signal and the output quadrature signal.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a digital-controlled vector signal modulator, and more particularly, to a vector signal modulator directly controlled by digital signal without digital-to-analog signal conversion.

2. Description of the Prior Art

Electronic systems, such as communication systems and test instruments, use vector signal modulators to generate vector signals that meet the amplitude and phase requirement. In a vector signal modulator, a signal is separated to two signals with different phase degree, i.e., the in-phase (I) and quadrature (Q) signals, first. After then, the amplitudes of the in-phase (I) and quadrature (Q) are modulated, respectively, and finally combined together to generate the a vector signal which amplitude and phase both meet requirement. For instance, when the I and Q channels (i.e. signal paths) of the modulator are calibrated to be equal in gain responses, a 45° degree vector signal is generated. °.

Conventional vector modulators utilize variable gain amplifiers (VGAs) to adjust the in-phase and the quadrature signals. However, these VGAs use analog signals to control the gain of the VGAs, and therefore digital to analog converters (DACs) are required. The need of DAC complicates the design of a vector signal modulator and increases production cost.

SUMMARY OF THE INVENTION

It is therefore a primary objective of the present invention/application to provide a vector modulator with low complexity, to reduce over disadvantages of the prior art.

An embodiment of the present invention discloses a vector modulator comprising a quadrature component generator, configured to generate an input in-phase signal and an input quadrature signal according to an input radio frequency (RF) signal; a switching circuit, receiving a plurality of bits, comprising a plurality of switches controlled by the plurality of bits, configured to generate an output in-phase signal and an output quadrature signal according to the plurality of bits, where the output in-phase signal and the output quadrature signal are related to input in-phase signal and the input quadrature signal; and a combining module, configured to generate an output RF signal according to the output in-phase signal and the output quadrature signal.

DETAILED DESCRIPTION

The present invention proposes to realize a vector signal modulator directly from the digital control signal without DACs, saving time and the cost the device considerably.

FIG. 1is a schematic diagram of a vector modulator10according to an embodiment of the present invention. The vector modulator10comprises a quadrature component generator12, an in-phase amplifier I-Amp, a quadrature amplifier Q-Amp, a switching circuit14and a combining module16. Note that, the vector modulator10does not include any digital-to-analog converter (DAC). Specifically, the quadrature component generator12receives an input radio frequency (RF) signal RFinand generates an input in-phase signal Iiand an input quadrature signal Qiaccording to the RF signal RFin. The input in-phase signal Iiand the input quadrature signal Qihave 90° phase difference. The in-phase amplifier I-Amp receives the input in-phase signal Iiand generates an intermediate in-phase signal Im; the quadrature amplifier Q-Amp receives the input quadrature signal Qiand generates the intermediate quadrature signal Qm. The switching circuit14comprises a plurality of switches (which will be illustrated later on) and receives a plurality of bits Bi, . . . , BN, where the bits Bi, . . . , BNare configured to control an ON-OFF status of the plurality of switches. The switching circuit14is configured to adjust the input in-phase signal Iito generate an output in-phase signal Io, and to adjust the input quadrature signal Qito generate an output quadrature signal Qo, according to the bits Bi, . . . , BN. The combining module16is configured to combine the output in-phase signal Ioand the output quadrature signal Qoto generate an output RF signal RFout.

The signals RFin, Ii, Qi, Im, Qm, Io, Qoand RFoutmay be voltage signals or current signals. In an embodiment, the signals RFin, Ii, Qi, Im, Qm, Io, Qoand RFoutare all differential signals, but not limited thereto. For example, as illustrated inFIG. 1, the RF signal RFin/RFoutcomprises a positive input/output RF signal RFin+/RFout+and a negative input/output RF signal RFin−/RFout−, the input/intermediate/output in-phase signal Ii/Im/Iocomprises a positive input/intermediate/output in-phase signal Ii+/Im+/Io+and a negative input/intermediate/output in-phase signal Ii−/Im−/Io−, and the input/intermediate/output quadrature signal Qi/Qm/Qocomprises a positive input/intermediate/output quadrature signal Qi+/Qm+/Qo+and a negative input/intermediate/output quadrature signal Qi−/Qm−/Qo−.

The in-phase amplifier I-Amp and the quadrature amplifier Q-Amp are full differential amplifiers. The in-phase amplifier I-Amp comprises a positive in-phase output terminal OI+and a negative in-phase output terminal OI−. The quadrature amplifier Q-Amp comprises a positive quadrature output terminal OQ+and a negative quadrature output terminal OQ−.

In this regard, the combining module16may comprise a first combining element CE+ and a second combining element CE−. The first combining element CE+ is configured to generate the positive output RF signal RFout+by combining the positive output in-phase signal Io+and the positive output quadrature signal Qo+. The positive output RF signal RFout+may be expressed as RFout+=Io++j*Qo+. The second combining element CE− is configured to generate the negative output RF signal RFout+by combining the negative output in-phase signal Io−and the negative output quadrature signal Qo−. The negative output RF signal RFout−may be expressed as RFout−=Io−+j*Qo−.

FIG. 2is a schematic diagram of a switching circuit24according to an embodiment of the present invention. The switching circuit24is an embodiment of the switching circuit14. The switching circuit24comprises a first in-phase switching sub-circuit SWI+and a first quadrature switching sub-circuit SWQ+. The in-phase switching sub-circuit SWI+and the quadrature switching sub-circuit SWQ+have similar circuit structure.

The first in-phase switching sub-circuit STAII+comprises a first in-phase switching input terminal NIin+, a second in-phase switching input terminal NIin−, a first in-phase switching output terminal NIout+, a second in-phase switching output terminal NIout−, in-phase conducting switches SI1+, SI0+, SI0−, SI−and in-phase diverting switches SI1+′, SI0+′, SI1−′, SI0−′. The first in-phase switching input terminal NIin+of the in-phase switching sub-circuit SWI+is coupled to the positive in-phase output terminal OI+. The second in-phase switching input terminal NIin−of the in-phase switching sub-circuit SWI+is coupled to the negative in-phase output terminal OI−. The in-phase conducting switches SI1+, SI0+, controlled by in-phase conducting bits BI0, BI1, are coupled between the first in-phase switching input terminal NIin+and the first in-phase switching output terminal NIout+. The in-phase conducting switches SI0−, SI1−, also controlled by the in-phase conducting bits BI0, BI1, are coupled between the second in-phase switching input terminal NIin−and the second in-phase switching output terminal NIout−. The in-phase diverting switches SI1+′, SI0+′, controlled by in-phase diverting bits BI0′, BI1′, have one terminal coupled to the first in-phase switching input terminal NIin+and have another terminal to receive a voltage VDD. The in-phase diverting switches SI1−′, SI0−′, also controlled by the in-phase diverting bits BI0′, BI1′, have one terminal coupled to the second in-phase switching input terminal NIin−and have another terminal to receive the voltage VDD. The in-phase diverting bits BI0′, BI1′, are complements of the in-phase conducting bits BI0, BI1.

The first quadrature switching sub-circuit SWQ+comprises a first quadrature switching input terminal NQin+, a second quadrature switching input terminal NQin−, a first quadrature switching output terminal NQout+, a second quadrature switching output terminal NQout−, quadrature conducting switches SQ1+, SQ0+, SQ0−, SQ1−and quadrature diverting switches SQ1+′, SQ0+′, SQ1−′, SQ0−′. The first quadrature switching input terminal NQin+of the quadrature switching sub-circuit SWQ+is coupled to the positive quadrature output terminal OQ+. The second quadrature switching input terminal NQin−of the quadrature switching sub-circuit SWQ+is coupled to the negative quadrature output terminal OQ−. The quadrature conducting switches SQ1+, SQ0+, controlled by quadrature conducting bits BQ0, BQ1, are coupled between the first quadrature switching input terminal NQin+and the first quadrature switching output terminal NQout+. The quadrature conducting switches SQ0−, SQ1−, also controlled by the quadrature conducting bits BQ0, BQ1, are coupled between the second quadrature switching input terminal NQin−and the second quadrature switching output terminal NQout−. The quadrature diverting switches SQ1+′, SQ0+′, controlled by quadrature diverting bits BQ0′, BQ1′, have one terminal coupled to the first quadrature switching input terminal NQin+and have another terminal to receive the voltage VDD. The quadrature diverting switches SQ1−′, SQ0−′, also controlled by the quadrature diverting bits BQ0′, BQ1′, have one terminal coupled to the second quadrature switching input terminal NQin−and have another terminal to receive the voltage VDD.

Operations of the switching circuit24are described as follows.FIG. 3is a schematic diagram of a conduction status of the switching circuit24. Suppose that (BI0, BI1, BQ0, BQ1) is (1, 0, 1, 1) , which means that the switches SI0+, SI0−, SI1+′, SI1−′, SQ1+, SQ0+, SQ0−, SQ1−are conducted (ON) and the switches SI1+, SI1−, SI0+′, SI0−′, SQ1+′, SQ0+′, SQ1−′, SQ0−′ are cutoff (OFF) . Suppose that an output current of the in-phase amplifier I-Amp is denoted as IIand an output current of the quadrature amplifier Q-Amp is denoted as IQ. Within the in-phase switching sub-circuit SWI+, half of the output current II(i.e., 0.5 II) would flow through the conducting switches SI0+, SI0−and another half of the output current II(i.e., 0.5 II) would be diverted through the diverting switches SI1+′, SI1−′. Current through the in-phase switching output terminals NIout+, NIout−would be 0.5 II. On the other hand, within the quadrature switching sub-circuit SWQ+, all of the output current IQwould flow through the conducting switches SQ1+, SQ0+, SQ0−, SQ1−and no current is diverted through the diverting switches SQ1+′, SQ0+′, SQ1−′, SQ0−′. Current through the quadrature switching output terminals NQout+, NQout−would be IQ. Therefore, the output RF signal RFoutwould have a phase θ as tan−1(|IQ|/0.5|II|), where tan−1(·) denotes an inverse of tangent function. Suppose that |IQ|=|II|, meaning that the in-phase amplifier I-Amp and the quadrature amplifier Q-Amp produces the same output current, the phase difference θ is tan−1(2).

In another perspective, the switching circuit24is controlled mainly by 4 bits, where 2 bits are used for controlling in-phase component (i.e., the output in-phase signal Io) and 2 bits are used for quadrature component (i.e., the output quadrature signal Qo), which is for illustrative purpose. In practice, the switching circuit14may be controlled by 2*M bits, where M bits are used for controlling/adjusting in-phase component and M bits are used for controlling/adjusting the quadrature component, and various values of the phase difference θ would be generated.

In the prior art, the vector modulator utilizes variable gain amplifier (VGA) to adjust the in-phase component and the quadrature component. However, the VGA needs an analog signal to control the gain of the VGA, and a DAC is required, which increases a circuit complexity since the DAC is complicated. In comparison, by utilizing the switching circuit of the present invention, the digital bits B1, . . . , BN(e.g., the conducting bits BI0, BI1, BQ0, BQ1or the diverting bits BI0′, BI1′, BQ0′, BQ1′) can be directly used to control/adjust the in-phase component and the quadrature component, such that the complexity and the production cost brought by DAC may be spared.

Note that, the switching circuit24generates the phase difference θ only within a range between 0° and 90° , i.e., the first quadrant of a complex plane, and not limited thereto. The switching circuit of the present invention may generate the phase difference θ distributed over a range between 0° and 360° .

For example,FIG. 4is a schematic diagram of a switching circuit44according to an embodiment of the present invention. The switching circuit44is similar to the switching circuit24, and thus, the same denotations are applied. Different from the switching circuit24, the switching circuit44further comprises a second in-phase switching sub-circuit SWI−and a second quadrature switching sub-circuit SWQ−, in addition to the first in-phase switching sub-circuit SWI+and the first quadrature switching sub-circuit SWQ+. The in-phase switching sub-circuit SWI−has the same circuit structure as the in-phase switching sub-circuit SWI+, and the quadrature switching sub-circuit SWQ−has the same circuit structure as the quadrature switching sub-circuit SWQ+. Different from the switching sub-circuit SWI+and SWQ+, a first in-phase switching input terminal NIin+of the second in-phase switching sub-circuit SWI−is coupled to the negative in-phase output terminal OI−, a second in-phase switching input terminal NIin−of the second in-phase switching sub-circuit SWI−is coupled to the positive in-phase output terminal OI+, a first quadrature switching input terminal NQin+of the second quadrature switching sub-circuit SWQ−is coupled to the negative quadrature output terminal OQ−, and a second quadrature switching input terminal NQin−of the second quadrature switching sub-circuit SWQ−is coupled to the positive quadrature output terminal OQ+.

In other words, a current direction of the current flowing through the second in-phase switching sub-circuit SWI−would be opposite to a current direction of the current flowing through the first in-phase switching sub-circuit SWI+, and a current direction of the current flowing through the second quadrature switching sub-circuit SWQ−would be opposite to a current direction of the current flowing through the first quadrature switching sub-circuit SWQ+.

When the sub-circuits SWI−and SWQ+are enabled, the switching circuit44is able to generate the phase difference θ within a range between 90° and 180° , i.e. , the second quadrant. When the sub-circuits SWI−and SWQ−are enabled, the switching circuit44is able to generate the phase difference θ within a range between 180° and 270° , i.e., the third quadrant. When the sub-circuits SWI+and SWQ−are enabled, the switching circuit44is able to generate the phase difference θ within a range between 270° and 360° , i.e., the fourth quadrant. Therefore, the switching circuit44is able to generate the phase difference θ distributed over the range between 0° and 360° .

In summary, the vector modulator utilizes the switching circuit comprising the plurality of switches and controlled by the plurality of bits to control/adjust the in-phase component and the quadrature component, such that the complexity and the production cost brought by DAC may be spared.