Organic thin film transistor and method of forming the same

Provided are an organic thin film transistor and a method of forming the same. The method comprises forming a gate electrode on a substrate, forming a gate dielectric, which covers the gate electrode and includes a recess region at an upper portion, on the substrate, forming a source electrode and a drain electrode in the recess region, and forming an organic semiconductor layer between the source electrode and the drain electrode in the recess region.

CROSS-REFERENCE TO RELATED APPLICATIONS

This U.S. non-provisional patent application claims priority under 35 U.S.C. §119 of Korean Patent Application No. 10-2010-0015052, filed on February 19, the entire contents of which are hereby incorporated by reference.

BACKGROUND OF THE INVENTION

The present invention disclosed herein relates to a transistor and a method of forming the same, and more particularly, to an organic thin film transistor and a method of forming the same.

Generally, an organic thin film transistor includes a gate electrode that is formed on a substrate, source and drain electrodes that are electrically insulated from the gate electrode by a gate dielectric, and an organic semiconductor layer that is formed on a gate dielectric between the source and drain electrodes.

The organic semiconductor layer is formed in various and flexible synthesis methods and it is formed at relatively low cost. Moreover, since the organic semiconductor layer may be easily formed in a printing process, it may be applied to large-area devices. Because of these features, attempts are being continuously made for applying the organic semiconductor layer to electronic products such as flexible displays and Radio Frequency Identification (RFID) tags.

However, for using the organic semiconductor layer as the key elements of the flexible displays and RFID tags, low power consumption is required. Typical organic thin film transistors may operate at a high operating voltage, for example, 20 V or higher. This is caused by the thickness of a gate dielectric, which may commonly have a large thickness of 100 nm or more.

For solving these limitations, various researches are being continuously made in the art. For example, some researches have proposed technologies that form a gate dielectric with tantalum oxide, vanadium oxide or titanium oxide through a sputtering process. However, such technologies use a vacuum process, and thus it costs a great deal.

SUMMARY OF THE INVENTION

The present invention provides an organic thin film transistor having operation characteristic improved and a method of forming the same.

Embodiments of the present invention provide a method of forming organic thin film transistor including: forming a gate electrode on a substrate; forming a gate dielectric, which covers the gate electrode and includes a recess region at an upper portion, on the substrate; forming a source electrode and a drain electrode in the recess region; and forming an organic semiconductor layer between the source electrode and the drain electrode in the recess region.

In some embodiments, the forming of a gate dielectric may include: forming an auxiliary gate dielectric on the substrate; and performing an imprinting process with a mold having a convex portion to form the recess region at an upper portion of the auxiliary gate dielectric.

In other embodiments, the forming of a gate dielectric may further include curing the auxiliary gate dielectric after forming the recess region.

In still other embodiments, the forming of a gate dielectric may include: forming a first gate dielectric between the gate electrode and the recess region; and forming a second gate dielectric between the substrate and the recess region, wherein a thickness of the first gate dielectric may be thinner than a thickness of the second gate dielectric, and a thickness of the auxiliary gate dielectric is thicker than a thickness of the second gate dielectric.

In even other embodiments, the auxiliary gate dielectric may be formed of an organic insulator.

In yet other embodiments, the forming of a source electrode and a drain electrode may include: forming a conductive layer in the recess region; and curing a conductive layer which is formed at both sides of the gate electrode.

In further embodiments, the curing of a conductive layer may include performing an exposure process on the conductive layer by using the gate electrode as a mask.

In still further embodiments, the gate dielectric may be formed of an ultraviolet-transmissive insulating material.

In even further embodiments, the source electrode and the drain electrode may be formed so as to be self-aligned with the gate electrode.

In yet further embodiments, the conductive layer may be formed of an ink of conductivity.

In much further embodiments, the conductive layer may be formed in an inkjet printing process.

In still much further embodiments, the forming of the source electrode and the drain electrode may further include removing the conductive layer between the source electrode and the drain electrode after curing the conductive layer.

In yet further embodiments, the organic semiconductor layer may be formed so as to be self-aligned with the source electrode and the drain electrode.

In even much further embodiments, the organic semiconductor layer may be formed in an inkjet printing process.

In other embodiments of the present invention, an organic thin film transistor includes: a gate electrode on a substrate; a gate dielectric covering the gate electrode and including a recess region at an upper portion, on the substrate; a source electrode and a drain electrode disposed in the recess region; and an organic semiconductor layer disposed between the source electrode and the drain electrode in the recess region.

In some embodiments, lower surfaces of the source electrode, the drain electrode and the organic semiconductor layer may be parallel to an upper surface of the substrate.

In other embodiments, the gate dielectric may include: a first gate dielectric disposed between the gate electrode and the organic semiconductor layer; a second gate dielectric disposed between the source electrode and the substrate and between the drain electrode and the substrate; and a third gate dielectric on the substrate, and including an upper surface having the same height as height of upper surfaces of the source electrode and drain electrode.

In still other embodiments, a thickness of the third gate dielectric may be the same as a sum of a thickness of the source electrode or drain electrode, a thickness of the first gate dielectric and a thickness of the gate electrode.

In even other embodiments, the source electrode and the drain electrode may be self-aligned with the gate electrode and disposed.

In yet other embodiments, the organic semiconductor layer may be disposed so as to be self-aligned with the source electrode and the drain electrode.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

In the specification, it will be understood that when one element is referred to as being ‘on’ another element, it can be directly on the other element, or intervening elements may also be present. In the figures, moreover, the dimensions of elements are exaggerated for clarity of illustration. Like reference numerals refer to like elements throughout.

Additionally, the embodiment in the detailed description will be described with sectional views as ideal exemplary views of the present invention. In the figures, the dimensions of layers and regions are exaggerated for clarity of illustration. Accordingly, shapes of the exemplary views may be modified according to manufacturing techniques and/or allowable errors. Therefore, the embodiments of the present invention are not limited to the specific shape illustrated in the exemplary views, but may include other shapes that may be created according to manufacturing processes. For example, an etched region illustrated as a rectangle may have rounded or curved features. Areas exemplified in the drawings have general properties, and are used to illustrate a specific shape of a semiconductor package region. Though terms like a first, a second, and a third are used to describe various elements in various embodiments of the present invention, the elements are not limited to these terms. It will be understood that although the terms first, second and third are used herein to describe various elements, these elements should not be limited by these terms. An embodiment described and exemplified herein includes a complementary embodiment thereof.

The terms of a singular form may include plural forms unless referred to the contrary. The meaning of “include,” “comprise,” “including,” or “comprising,” specifies a property, a region, a fixed number, a step, a process, an element and/or a component but does not exclude other properties, regions, fixed numbers, steps, processes, elements and/or components.

FIGS. 1A to 1Eare views for describing a method of forming organic thin film transistor according to an embodiment of the present invention.

Referring toFIG. 1A, a gate electrode110is formed on the substrate100. The substrate100may be formed as a glass substrate or a plastic substrate. The plastic substrate may be formed of a polymer compound such as polyimide, polyethylenenaphthalate (PEN) or polyethylene terephthalate (PET).

The gate electrode110is formed by forming and patterning a conductive layer (not shown) on the substrate100, or it is formed in a process that covers the substrate100with a patterned mask and forms the conductive layer. The gate electrode110may be formed in any one of a thermal evaporation process, an E-beam evaporation process, a sputtering process, a micro contact printing process or a nano imprinting process. The gate electrode110may be formed of metal material such as aluminum (Al), chrome (Cr), molybdenum (Mo), copper (Cu), titanium (Ti) or tantalum (Ta), or it may be formed of non-metal material having conductivity.

An auxiliary gate dielectric112covering the gate electrode110is formed on the substrate100. The auxiliary gate dielectric112may be formed with a dispenser in a dispensing process. The dispensing process may be useful when the organic thin film transistor is formed in a roll-to-roll process. Alternatively, the auxiliary gate dielectric112may be formed in a spin coating process.

The auxiliary gate dielectric112may substantially include a planar upper surface. The auxiliary gate dielectric112may be formed of an insulating material capable of transmitting ultraviolet. For example, the auxiliary gate dielectric112may be formed of a material such as poly-4-vinylphenol (PVP), polyimide, polyvinylalcohol (PVA) or polystyrene (PS). Alternatively, the auxiliary gate dielectric112may be formed of an inorganic/organic hybrid insulating material such as Al2O3/PS.

Referring toFIG. 1B, a recess region105may be formed at the upper portion of the auxiliary gate dielectric112by using a mold125including a convex portion122. A process of forming the recess region105may be called an imprinting process. The auxiliary gate dielectric112may have liquidity so that the recess region105may be formed. That is, in a state where the auxiliary gate dielectric112has liquidity so that a shape may be changed by the mold125, the shape of the convex portion122of the mold125may be carved in the auxiliary gate dielectric112.

After the recess region105is formed, a gate dielectric120is formed by curing the auxiliary gate dielectric112. The gate dielectric120may be formed in a thermal curing process. The thermal curing process may be performed at a temperature lower than 200° C. Since the thermal curing process is performed at a relatively low temperature, the damage of the substrate100can be minimized Alternatively, the gate dielectric120may be cured using ultraviolet.

Forming the gate dielectric120may include: forming a first gate dielectric120abetween the gate electrode110and the recess region105; and forming a second gate dielectric120bbetween the substrate100and the recess region105. A thickness t1of the first gate dielectric120ais thinner than a thickness t2of the second gate dielectric120b, and a thickness t3of the auxiliary gate dielectric112is thicker than the thickness t2of the second gate dielectric120b. The gate dielectric120may include a third gate dielectric120cthat is not recessed, and a thickness of the third gate dielectric120cmay be the substantially same as the thickness t3of the auxiliary gate dielectric112. The depth D1of the recess region105may be limited by controlling the thickness of the first gate dielectric120a.

The first gate dielectric120ais an element that determines the operating voltage of the organic thin film transistor. Since the first gate dielectric120ais formed to have a relatively thin thickness, the operating voltage of the organic thin film transistor can be reduced. That is, the auxiliary gate dielectric112is recessed, and thus the first gate dielectric120ahaving a thin thickness may be formed.

Referring toFIG. 1C, after the mold125is removed, a conductive layer132may be formed in the recess region105. The conductive layer132may be formed of an ultraviolet (UV)-curable conductive material. Specifically, the conductive layer132may be formed of a paste or an ink where conductive powders such as argentums (Ag), aurum (Au), zinc (Zn), Cu, carbon nano tube and polymer are dispersed in a UV-curing resin. The UV-curing resin may contain a photoinitiator that reacts on UV energy. In case that the conductive layer132is formed of a conductive ink, it may be formed in an inkjet printing process.

Referring toFIG. 1D, the conductive layer132formed at the both sides of the gate electrode110is cured by performing an exposure process by using the gate electrode110as a mask. A source electrode130S and a drain electrode130D are formed by curing the conductive layer132. The exposure process may be performed in order for UV to be exposed from the rear surface of substrate100. Accordingly, the substrate100and the gate dielectric120may be formed of UV-transmissive materials.

An exposure process may be performed using the gate electrode110as a mask, and thus the source electrode130S and the drain electrode130D may be self-aligned with the gate electrode110and formed. Specifically, the shine intensity of UV may be about 7 mW/cm2and a shining time of UV may be about 60 min in the exposure process. A portion of the conductive layer132that is screened by the gate electrode110may maintain physical properties as-is, but another portion of the conductive layer132that is not screened by the gate electrode110may be cured by UV and its physical properties are changed.

Referring toFIG. 1E, the uncured conductive layer132is removed. The conductive layer132, for example, may be removed by a developer in a development process. An organic semiconductor layer140is formed between the source electrode130S and the drain electrode130D in the recess region105. The organic semiconductor layer140may be formed of any one of Tips-Pentacene[6,13-bis(triisopropylsilylethynyl)pentacene], P3HT [poly(3-hexylthiophene)], F8T2[poly (9,9-dioctylfluoreneco-bithiophene)], PQT-12[poly(3,3-didodecylquarter-thiophene) or PBTTT[poly(2,5-bis(3-tetradecylthiophen-2yl)thieno[3,2-b]thiophene). The organic semiconductor layer140may be formed in an inkjet printing process. The organic semiconductor layer140may be formed so as to be self-aligned with the source electrode130S and the drain electrode130D that have been formed in advance.

According to an embodiment of the present invention, the gate dielectric120(particularly, the first gate dielectric120a) of the organic thin film transistor is thinly formed, thereby decreasing the operating voltage. Moreover, since the source electrode130S, the drain electrode130D and the organic semiconductor layer140are formed to be self-aligned, a forming process can be simplified and electrical characteristics can be improved. Since the source electrode130S, the drain electrode130D and the organic semiconductor layer140are formed in the recess region105, the entire thickness of the organic thin film transistor can be reduced and the scaling down of the device is enabled. Furthermore, the gate dielectric120can be thinly formed in a simple imprinting process.

FIG. 2is a diagram for describing a method of forming organic thin film transistor in a roll-to-roll process according to another embodiment of the present invention. Except for a difference in that an organic thin film transistor is formed in a roll-to-roll process, this embodiment is similar to the preceding embodiment. For conciseness, accordingly, a repetitive description on the same technical features will be omitted. InFIGS. 2, S1, S2, S3, S4and S5indicate the processes that have been described above with reference toFIGS. 1A to 1E, respectively. InFIG. 2, reference numeral is omitted, and a description will be made below by referencing the reference numerals ofFIGS. 1A to 1E.

Referring toFIGS. 1A to 1EandFIG. 2, an organic thin film transistor is formed in a roll-to-roll process. In a method of forming organic thin film transistor, all processes may be performed in a state where the substrate100is continuously conveyed. The substrate100is prepared on a roller device50that includes a feed roller52and a feed plate54. First, the gate electrode110is formed on the substrate100. Next, the substrate100is conveyed by the roller device50, and thereby the gate dielectric120is formed. As described above, the gate dielectric120may be formed in a dispensing process. The gate dielectric120may be formed by forming the recess region105with the mold125(seeFIG. 1B) and being cured.

The substrate100is conveyed by the roller device50, and the conductive layer132is formed in the recess region105of the gate dielectric120. The conductive layer132may be formed in an inkjet printing process. The conductive layer132is continuously exposed to UV and cured, and thereby the source electrode130S and the drain electrode130D may be self-aligned with the gate electrode110. The organic semiconductor layer140may be formed105between the source electrode130S and the drain electrode130D in the recess region.

According to another embodiment of the present invention, the organic thin film transistor can be easily formed in the roll-to-roll process, thereby saving the cost.

FIG. 3is a diagram for describing an organic thin film transistor according to an embodiment of the present invention.

Referring toFIG. 3, the gate electrode110is disposed on the substrate100. The substrate100may be a glass substrate or a plastic substrate. The plastic substrate may be formed of a polymer compound such as polyimide, polyethylenenaphthalate (PEN) or polyethylene terephthalate (PET). The gate electrode110may be formed of metal material such as aluminum (Al), chrome (Cr), molybdenum (Mo), copper (Cu), titanium (Ti) or tantalum (Ta), or it may be formed of non-metal material having conductivity.

The gate dielectric120, which covers the gate electrode110and includes the recess region105in its upper portion, disposed on the substrate100. The gate dielectric120may be formed of an insulating material capable of transmitting UV. For example, the gate dielectric120may be formed of a material such as poly-4-vinylphenol (PVP), polyimide, polyvinylalcohol (PVA) or polystyrene (PS). Alternatively, the gate dielectric120may be formed of an inorganic/organic hybrid insulating material such as Al2O3/PS.

The source electrode130S and the drain electrode130D are disposed in the recess region105of the gate dielectric120. Specifically, the source electrode130S and the drain electrode130D may include a paste, an ink or conductive materials such as argentums (Ag), aurum (Au), zinc (Zn), Cu, carbon nano tube and polymer.

The organic semiconductor layer140is formed in the recess region105between the source electrode130S and the drain electrode130D. The organic semiconductor layer140may be formed of any one of Tips-Pentacene[6,13-bis(triisopropylsilylethynyl)pentacene], P3HT[poly(3-hexylthiophene)], F8T2[poly (9,9-dioctylfluoreneco-bithiophene)], PQT-12[poly(3,3-didodecylquarter-thiophene) or PBTTT[poly(2,5-bis(3-tetradecylthiophen-2yl)thieno[3,2-b]thiophene).

Lower surfaces of the source electrode130S, drain electrode130D and organic semiconductor layer140may be disposed on the same plane. Alternatively, the lower surfaces of the source electrode130S, drain electrode130D and organic semiconductor layer140may be parallel to an upper surface of the substrate100.

The gate dielectric120may include the first gate dielectric120abetween the gate electrode110and the organic semiconductor layer140, the second gate dielectric120bbetween the substrate100and the source electrode130S and between the substrate100and the drain electrode130D, and the third gate dielectric120cthat is disposed on the substrate100and includes an upper surface having the same height as that of upper surfaces of the source electrode130S and drain electrode130D. A thickness t1of the first gate dielectric120amay be thinner than a thickness t2of the second gate dielectric120b.

A thickness t3of the third gate dielectric120cmay be the substantially same as the sum of the thickness of the source electrode130S or drain electrode130D, the thickness t1of the first gate dielectric120aand the thickness of the gate electrode110. Moreover, the thickness of the source electrode130and the thickness of the drain electrode130D may be the substantially same as a depth D1of the recess region105.

The first gate dielectric120ais an element that determines the operating voltage of the organic thin film transistor. Since the first gate dielectric120ais formed to have a relatively thin thickness, the operating voltage of the organic thin film transistor can be reduced. That is, the auxiliary gate dielectric112is recessed, and thus the first gate dielectric120ahaving a thin thickness may be disposed.

The source electrode130S and the drain electrode130D may be disposed so as to be self-aligned with the gate electrode110. The organic semiconductor layer140may be disposed so as to be self-aligned with the source electrode130S and the drain electrode130D. That is, side surfaces where the source electrode130S contacts the organic semiconductor layer140and the drain electrode130D contacts the organic semiconductor layer140, and each of both side surfaces of the gate electrode110may be disposed on the substantially same virtual plane.

According to an embodiment of the present invention, the gate dielectric120(particularly, the first gate dielectric120a) of the organic thin film transistor has a thin thickness, thereby decreasing the operating voltage. Moreover, since the source electrode130S, the drain electrode130D and the organic semiconductor layer140are disposed to be self-aligned, electrical characteristics can be improved. Since the source electrode130S, the drain electrode130D and the organic semiconductor layer140are disposed in the recess region105, the thickness of the organic thin film transistor can be reduced and the scaling down of the device is enabled.

According to embodiments of the present invention, the gate dielectric (particularly, the gate dielectric between the gate electrode and the organic semiconductor layer) of the organic thin film transistor is thinly formed, thereby decreasing the operating voltage. Moreover, since the source electrode, the drain electrode and the organic semiconductor layer are formed to be self-aligned, a forming process can be simplified and electrical characteristics can be improved. Since the source electrode, the drain electrode and the organic semiconductor layer are formed in the recess region, an entire thickness of the organic thin film transistor can be reduced and the scaling down of the device is enabled. Furthermore, the gate dielectric can be thinly formed in a simple imprinting process.