Electronic component

An electronic component includes an electronic element including outer electrodes on a surface, a substrate terminal on which the electronic element is mounted, and a conductor that covers at least a portion of the substrate terminal. The substrate terminal includes a first main surface, a second main surface at a side opposite to the first main surface, and a side surface connecting the first main surface and the second main surface. The substrate terminal includes a mounting electrode that is provided on the first main surface and is electrically connected to the outer electrodes of the electronic element. The mounting electrode includes adjacent portions that are located to be adjacent to the side surface of the substrate terminal. The conductor covers at least a portion of the adjacent portion.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to an electronic component, and in particular, relates to an electronic component including an electronic element including an electrostrictive property.

2. Description of the Related Art

Japanese Unexamined Patent Application Publication No. 2004-134430 discloses an electronic component that suppresses propagation of vibration so as to try to reduce generation of noise. In the electronic component as described in Japanese Unexamined Patent Application Publication No. 2004-134430, one interposer substrate is arranged at the lower side of a capacitor element as a main body portion of a multilayer capacitor. A pair of mounting electrodes that are connected to a pair of outer electrodes of the capacitor element, respectively, are arranged at the surface side of the interposer substrate. A pair of connection electrodes each of which is connected to a wiring pattern on the interposer substrate by solder are arranged at the rear surface side of the interposer substrate.

When the electronic component is mounted on a circuit substrate by connecting the electronic element and the circuit substrate with a substrate terminal interposed therebetween, failures in mounting of the electronic component occur due to electrode burrs on the substrate terminal in some cases.

SUMMARY OF THE INVENTION

Accordingly, preferred embodiments of the present invention provide an electronic component that significantly reduces or prevents failures in mounting of the electronic component due to electrode burrs on a substrate terminal.

According to a preferred embodiment of the present invention, an electronic component includes an electronic element including an outer electrode on a surface, a substrate terminal on which the electronic element is mounted, and a conductor that covers a portion of the substrate terminal. The substrate terminal includes a first main surface, a second main surface opposite to the first main surface, and a side surface connecting the first main surface and the second main surface. The substrate terminal includes a mounting electrode on the first main surface electrically connected to the outer electrode of the electronic element. The mounting electrode includes an adjacent portion that is adjacent to the peripheral surface of the substrate terminal. The conductor covers at least a portion of the adjacent portion.

According to another preferred embodiment of the present invention, the conductor covers an entirety of the adjacent portion.

According to still another preferred embodiment of the present invention, the adjacent portion is covered by the electronic element when seen from a height direction perpendicular or substantially perpendicular to the first main surface.

According to still another preferred embodiment of the present invention, the substrate terminal has a rectangular or substantially rectangular outer shape when seen from a height direction perpendicular or substantially perpendicular to the first main surface. The peripheral surface of the substrate terminal includes first and second side surfaces opposite to each other and third and fourth side surfaces connecting the first and second side surfaces opposite to each other.

According to still another preferred embodiment of the present invention, a maximum width of the substrate terminal is smaller than a maximum width of the electronic element in a direction perpendicular or substantially perpendicular to the first and second side surfaces.

According to still another preferred embodiment of the present invention, a maximum length of the substrate terminal is smaller than a maximum length of the electronic element in a direction perpendicular or substantially perpendicular to the third and fourth side surfaces.

According to still another preferred embodiment of the present invention, an entirety of the substrate terminal is covered by the electronic element when seen from a height direction perpendicular or substantially perpendicular to the first main surface.

According to still another preferred embodiment of the present invention, the mounting electrode includes two adjacent portions that are adjacent to the first and second side surfaces, respectively.

According to still another preferred embodiment of the present invention, the mounting electrode is spaced apart from the third and fourth side surfaces when seen from a height direction perpendicular or substantially perpendicular to the first main surface.

According to still another preferred embodiment of the present invention, a maximum length of the adjacent portion is smaller than a maximum length of the mounting electrode in a direction perpendicular or substantially perpendicular the third and fourth side surfaces.

According to still another preferred embodiment of the present invention, the conductor is solder and electrically connects the outer electrode and the mounting electrode.

According to still another preferred embodiment of the present invention, the adjacent portion includes a burr of the mounting electrode. The conductor fixes the burr.

According to various preferred embodiments of the present invention, mounting failures of the electronic component due to the electrode burrs on the substrate terminal are significantly reduced or prevented.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Hereinafter, electronic components according to preferred embodiments of the present invention will be described with reference to the drawings. In the following description of the preferred embodiments, the same reference numerals denote the same or corresponding portions in the drawings and explanation thereof is not repeated.

First Preferred Embodiment

First, a capacitor element as an example of an electronic element included in an electronic component according to a first preferred embodiment of the present invention will be described. The electronic element is not limited to the capacitor element and may be an inductor element, a thermistor element, a piezoelectric element, a semiconductor element, or the like.

FIG. 1is a perspective view illustrating a first structure of the capacitor element included in the electronic component according to the first preferred embodiment of the present invention.FIG. 2is a perspective view illustrating a second structure of the capacitor element included in the electronic component according to the first preferred embodiment of the present invention. InFIGS. 1 and 2, a lengthwise direction L of the capacitor element, a width direction W of the capacitor element, and a height direction H of the capacitor element are illustrated.

As illustrated inFIG. 1, a capacitor element10ahaving the first structure, which is included in the electronic component according to the first preferred embodiment of the present invention, includes a multilayer body11ahaving a rectangular or substantially rectangular parallelepiped shape and outer electrodes14. Dielectric layers13and flat plate-shaped inner electrodes12are alternately laminated in the multilayer body11a. The outer electrodes14are provided on the multilayer body11aand are located on surfaces at both ends of the capacitor element10ain the lengthwise direction L.

First inner electrodes12of the adjacent inner electrodes12opposing each other are electrically connected to the outer electrode14located at one end of the capacitor element10ain the lengthwise direction L. Second inner electrodes12thereof are electrically connected to the outer electrode14located at the other end of the capacitor element10ain the lengthwise direction L.

In the capacitor element10ahaving the first structure, the lamination direction of the dielectric layers13and the inner electrodes12is perpendicular or substantially perpendicular to the lengthwise direction L of the capacitor element10aand the height direction H of the capacitor element10a. That is to say, the lamination direction of the dielectric layers13and the inner electrodes12is parallel with the width direction W of the capacitor element10a.

As illustrated inFIG. 2, a capacitor element10bhaving the second structure included in the electronic component according to the first preferred embodiment of the present invention includes a multilayer body11bhaving a rectangular or substantially rectangular parallelepiped shape and the outer electrodes14. The dielectric layers13and the flat plate-shaped inner electrodes12are alternately laminated in the multilayer body11b. The outer electrodes14are provided on the multilayer body11band are located on surfaces at both ends of the capacitor element10bin the lengthwise direction L.

First inner electrodes12of the adjacent inner electrodes12opposing each other are electrically connected to the outer electrode14located at one end of the capacitor element10bin the lengthwise direction L. Second inner electrodes12thereof are electrically connected to the outer electrode14located at the other end of the capacitor element10bin the lengthwise direction L.

In the capacitor element10bhaving the second structure, the lamination direction of the dielectric layers13and the inner electrodes12is perpendicular or substantially perpendicular to the lengthwise direction L of the capacitor element10band the width direction W of the capacitor element10b. That is to say, the lamination direction of the dielectric layers13and the inner electrodes12is parallel or substantially parallel with the height direction H of the capacitor element10b.

In the present preferred embodiment, the dielectric layers13preferably are defined by ceramic sheets mainly containing barium titanate. It should be noted that the main component forming the dielectric layers13is not limited to barium titanate and may be a ceramic material having a high dielectric constant such as calcium titanate and strontium titanate. The dielectric layers13may contain a sub-component of at least one type, such as Mn compound, Fe compound, Cr compound, Co compound, and Ni compound. Further, the dielectric layer13may contain Si, a glass component, and the like.

As the capacitor element10aor10b, a capacitor element having an electrostatic capacitance of equal to or higher than about 1 μF, a capacitor element having a relative dielectric constant of equal to or higher than about 3000, a capacitor element having equal to or more than about 350 inner electrodes12, a capacitor element in which the thickness of one dielectric layer13is equal to or smaller than about 1 μm, or the like can be preferably used, for example.

The inner electrodes12are formed preferably by printing pastes containing Ni on the ceramic sheets forming the dielectric layers13. It should be noted that the main material of the inner electrodes12is not limited to Ni and may be alloy of Pd and Ag.

The outer electrodes14are formed preferably by baking conductive pastes on the multilayer body11aor11bor performing plating on the multilayer body11aor11b. The outer electrodes14have a multilayer structure in which metal films made of Ni, Sn, and the like are laminated sequentially.

In the present preferred embodiment, the outer electrodes14are preferably provided on five surfaces at each of both ends of the capacitor element10aor10bin the lengthwise direction L. It is, however, sufficient that the outer electrodes are provided on at least surfaces at the side opposing a substrate terminal, which will be described later, in the capacitor element10aor10b. In terms of mounting stability of the capacitor element10aor10b, the outer electrodes14are preferably provided over the third and fourth side surfaces of the capacitor element10aor10bin the lengthwise direction L.

Hereinafter, the electronic component according to the present preferred embodiment will be described.

FIG. 3is a perspective view illustrating a state where the electronic component according to the present preferred embodiment including the capacitor element having the first structure as the electronic element is mounted on a circuit substrate.FIG. 4is a perspective view illustrating a state where the electronic component according to the present preferred embodiment including the capacitor element having the second structure as the electronic element is mounted on the circuit substrate.FIG. 5is a view illustrating the electronic component as illustrated inFIG. 3 or 4when seen from the direction of an arrow V.FIG. 6is an exploded perspective view illustrating the electronic component according to the present preferred embodiment.FIG. 7is a view illustrating a substrate terminal included in the electronic component inFIG. 6when seen from the direction of an arrow VII. InFIG. 6, a conductor included in the electronic component is not illustrated.

As illustrated inFIGS. 3 to 7, an electronic component100aor100baccording to the present preferred embodiment includes the capacitor element10aor10bincluding the outer electrodes14on the surfaces thereof, a substrate terminal20on which the capacitor element10aor10bis mounted, and a conductor30covering a portion of the substrate terminal20.

As illustrated inFIGS. 3 and 4, a circuit substrate90includes lands91on the surface thereof. The lands91are connected to connection electrodes23, which will be described later, of the substrate terminal20.

As illustrated inFIGS. 5 to 7, the substrate terminal20included in the electronic component100aor100baccording to the present preferred embodiment includes an insulating substrate21. In the present preferred embodiment, the insulating substrate21has a rectangular or substantially rectangular outer shape when seen from a height direction H perpendicular or substantially perpendicular to a first main surface21a. Note that the outer shape of the insulating substrate21is not limited to the rectangular or substantially rectangular shape and may be an elliptical or substantially elliptical shape or the like, for example. The corners and ridge line portions of the insulating substrate21may be chamfered.

The insulating substrate21includes a first main surface21aat the side at which the capacitor element10aor10bis mounted, a second main surface21bat the side opposite to the first main surface21a, and a peripheral surface connecting the first main surface21aand the second main surface21b. The peripheral surface of the insulating substrate21includes first and second side surfaces21clocated at the sides opposite to each other and third and fourth side surfaces21dconnecting the first and second side surfaces21cand located at the sides opposite to each other.

A resin material such as epoxy resin or a ceramic material such as alumina can be used as a material of the insulating substrate21. Further, filler made of an inorganic material or an organic material or a woven fabric may be added to the insulating substrate21. In the present preferred embodiment, a glass epoxy substrate formed by adding a glass woven fabric to a base body made of epoxy resin is preferably used as the insulating substrate21.

In consideration of suppression of propagation of vibration, the thickness of the insulating substrate21is preferably equal to or larger than about 0.05 mm and equal to or smaller than about 0.4 mm, for example. To be specific, in order to suppress propagation of vibration, the rigidity of the insulating substrate21is preferably low. Therefore, the thickness of the insulating substrate21is preferably equal to or smaller than about 0.4 mm, for example.

On the other hand, when the insulating substrate21is too thin, solder to bond the electronic component100aor100band the lands91of the circuit substrate90wets up and reaches the capacitor element10aor10b. Due to this, fillets are formed on the third and fourth side surfaces21dof the capacitor element10aor10bin the lengthwise direction L in some cases. In this case, vibration propagates to the circuit substrate90from the capacitor element10aor10bthrough the fillets and it is not preferable. Therefore, in consideration of suppression of wetting-up of the solder, the thickness of the insulating substrate21is preferably equal to or larger than about 0.05 mm, for example.

As illustrated inFIG. 6, a maximum width Wbof the substrate terminal20is smaller than a maximum width Waof the capacitor element10aor10bin the width direction of the insulating substrate21, which is the direction perpendicular or substantially perpendicular to the first and second side surfaces21c. A maximum length Lbof the substrate terminal20is smaller than a maximum length Laof the capacitor element10aor10bin the lengthwise direction of the insulating substrate21, which is the direction perpendicular or substantially perpendicular to third and fourth side surfaces21d.

As illustrated inFIGS. 3, 4, and 6, in the present preferred embodiment, the capacitor element10aor10bpreferably covers an entirety of the substrate terminal20when seen from the above (the height direction H perpendicular or substantially perpendicular to the first main surface21a). Therefore, as will be described later, when the conductor30is formed by solder to bond the outer electrodes14and mounting electrodes22, adjacent portions22e, which will be described later, are covered by the conductor30easily.

In terms of the mounting stability of the capacitor element10aor10b, a minimum length of the insulating substrate21is preferably equal to or more than about 0.8 times the maximum length of the capacitor element10aor10b, more preferably equal to or more than about 0.9 times, for example. A minimum width of the insulating substrate21is preferably equal to or more than about 0.8 times the maximum width of the capacitor element10aor10b, more preferably equal to or more than about 0.9 times, for example.

As illustrated inFIGS. 6 and 7, in the present preferred embodiment, cutouts21seach having a half-oval, substantially half-oval, half-ellipsoid or substantially half-ellipsoid shape when seen from the above are provided on both the ends of the insulating substrate21in the lengthwise direction. It should be noted that the shape of each cutout21swhen seen from the above is not limited to the half-oval, substantially half-oval, half-ellipsoid or substantially half-ellipsoid shape and may be a polygonal shape.

The solder to bond the electronic component100aor100band the lands91of the circuit substrate90can be held in spaces defined by the cutouts21sby providing the cutouts21s. This prevents the wetting-up of the solder to the third and fourth side surfaces of the capacitor element10aor10bin the lengthwise direction L. Note that the cutouts21smay not be necessarily provided.

As illustrated inFIGS. 5 and 6, the substrate terminal20includes the mounting electrodes22that are provided on the first main surface21aand are electrically connected to the outer electrodes14of the capacitor element10aor10b. To be specific, the two mounting electrodes22are arranged with an interval interposed therebetween in the lengthwise direction of the insulating substrate21.

The mounting electrodes22include the adjacent portions22elocated to be adjacent to the peripheral surface of the substrate terminal20. The adjacent portions22eare adjacent to the peripheral surface of the substrate terminal20in at least any of the lengthwise direction of the insulating substrate21, the width direction of the insulating substrate21, and the height direction of the insulating substrate21.

As illustrated inFIG. 6, in the present preferred embodiment, the adjacent portions22eare covered by the capacitor element10aor10bwhen seen from the above. Each of the mounting electrodes22includes the two adjacent portions22ewhich are adjacent to the first and second side surfaces21cof the insulating substrate21, respectively. Further, the mounting electrodes22are spaced apart from the third and fourth side surfaces21dof the insulating substrate21when seen from the above.

A maximum length L2of each adjacent portion22eis smaller than a maximum length L1of each mounting electrode22in the lengthwise direction of the insulating substrate21. That is to say, each mounting electrode22is configured such that the length of the mounting electrode22in the lengthwise direction of the insulating substrate21is smaller on the adjacent portions22ethan other portions.

As illustrated inFIGS. 3, 4, 5, and 7, the substrate terminal20includes the connection electrodes23that are provided on the second main surface21band are electrically connected to the lands91of the circuit substrate90. To be specific, the two connection electrodes23are arranged with an interval interposed therebetween in the lengthwise direction of the insulating substrate21. In the present preferred embodiment, the connection electrodes23include no adjacent portion.

The substrate terminal20includes through-electrodes24that electrically connect the mounting electrodes22and the connection electrodes23. As illustrated inFIGS. 5, 6, and 7, in the present preferred embodiment, the through-electrodes24are provided on the wall surfaces of the cutouts21s.

In the present preferred embodiment, the conductor30is preferably defined by the solder and electrically connects the outer electrodes14and the mounting electrodes22. Note that the conductor30is not limited to being defined by the solder and may be a conductive adhesive. Further, the conductor30may not necessarily electrically connect the outer electrodes14and the mounting electrodes22. In this case, another conductor different from the conductor30is provided in order to electrically connect the outer electrodes14and the mounting electrodes22.

As illustrated inFIG. 5, the conductor30covers at least a portion of the adjacent portions22e. Preferably, the conductor30covers an entirety of the adjacent portions22e.

As will be described later, and as shown inFIGS. 29A and 29B, the adjacent portions22econtain burrs25of the mounting electrodes22in some cases. The conductor30fixes the burrs25of the mounting electrodes22. It is sufficient that the conductor30fixes at least a portion of the burrs25of the mounting electrodes22.

The connection electrodes23of the substrate terminal20and the lands91of the circuit substrate90are physically and electrically connected by an adhesive such as the solder, so that the electronic component100aor100bis mounted on the circuit substrate90as illustrated inFIGS. 3 and 4. With this, the capacitor element10aor10band the circuit substrate90are connected with the substrate terminal20interposed therebetween.

The electronic component100aor100bis mounted on the circuit substrate90as described above, so that vibration generated on the capacitor element10aor10battenuates when it propagates through the substrate terminal20. Therefore, audible sound that is generated by propagation of the vibration to the circuit substrate90is significantly reduced.

Hereinafter, a method for manufacturing the electronic component according to the present preferred embodiment will be described. First, a non-limiting example of a method for manufacturing the substrate terminal20included in the electronic component100aor100baccording to the present preferred embodiment will be described.

FIG. 8is a view illustrating a mother substrate as a base of the substrate terminal included in the electronic component according to the present preferred embodiment when seen from the first main surface side.FIG. 9is a view illustrating the mother substrate as the base of the substrate terminal included in the electronic component according to the present preferred embodiment when seen from the second main surface side.

First, as illustrated inFIGS. 8 and 9, a mother substrate200aon which wiring patterns are formed on both of a first main surface210aand a second main surface210bis prepared. For example, the mother substrate200ais preferably manufactured in the following manner.

Via holes240are formed on a double-sided copper clad laminated plate including an insulating substrate210having a rectangular shape when seen from the above, which is available in the market for a printed circuit board. With this, electrodes220on the first main surface210aand electrodes230on the second main surface210bare conducted to each other. Subsequently, the wiring patterns are formed on both of the first main surface210aand the second main surface210bby etching processing or the like.

In the present preferred embodiment, electroplating is performed in a subsequent process. Therefore, at least the wiring pattern on the first main surface210ahas a shape that the plurality of electrodes220are coupled by coupling portions220e. As illustrated inFIG. 8, in the present preferred embodiment, the coupling portions220eextend in a straight-line form in the width direction of the mother substrate200a. The width direction of the mother substrate200acorresponds to the width direction of the substrate terminal20and the lengthwise direction of the mother substrate200acorresponds to the lengthwise direction of the substrate terminal20.

The length of each coupling portion220ein the lengthwise direction of the mother substrate200ais preferably equal to or larger than about 0.10 mm in terms of conduction in the electroplating, for example.

The wiring pattern on the second main surface210bhas a shape that the individual electrodes230are aligned in a matrix form. As described above, the electrodes230are conducted to the electrodes220with the via holes240. Therefore, electroplating can be also performed on the electrodes230arranged in the matrix form.

Thereafter, a Ni film is formed on the wiring pattern made of copper by electroplating and an Sn film is further formed on the Ni film by electroplating. When the electroplating is performed, a plating terminal is attached to one end of the mother substrate200ain the width direction, so that a direct current flows through all the electrodes220, the electrodes230, and the via holes240.

When the Sn film is formed on the wiring pattern made of copper by non-electrolytic plating, a whisker is easy to be generated due to stress between both the metals. When the whisker flies on the circuit substrate90on which the electronic component100aor100bis mounted, the circuit substrate90is short-circuited in some cases. For coping with this, in the present preferred embodiment, the electroplating is performed so as to reduce the whisker that is generated on the electrodes and prevent the occurrence of a short circuit of the circuit substrate90.

In order to significantly reduce or prevent generation of the burrs, the thickness of the Ni film is equal to or larger than about 1 μm preferably, and equal to or larger than about 3 μm more preferably, for example. In terms of bonding property with the solder, the thickness of the Sn film preferably is equal to or larger than about 1 μm, for example.

The mother substrate200amanufactured as described above is cut into the individual substrate terminals20.FIG. 10is a cross-sectional view illustrating a state where the mother substrate is cut by dicing in the present preferred embodiment.FIG. 11is a perspective view illustrating a state where the mother substrate is cut by dicing in the present preferred embodiment.FIG. 12is a view illustrating the cut mother substrate when seen from the first main surface side in the present preferred embodiment.FIG. 13is a view illustrating the cut mother substrate when seen from the second main surface side in the present preferred embodiment.

As illustrated inFIGS. 10 and 11, the mother substrate200ais cut from the first main surface210aside by a dicing blade1. Preferably, the dicing blade1is made close to the mother substrate200afrom the first main surface210aside in the direction perpendicular or substantially perpendicular to the first main surface210aas indicated by an arrow1aso as to cut the mother substrate200a.

As illustrated inFIGS. 10 to 13, the mother substrate200ais cut along cut lines CL1and CL2as virtual lines, so that the mother substrate200ais diced into the individual substrate terminals20. The cut lines CL1are virtual lines used to form the first and second side surfaces of the substrate terminals20and the cut lines CL2are virtual lines used to form the third and fourth side surfaces of the substrate terminals20.

The coupling portions220eare located on the cut lines CL1on the first main surface210aof the mother substrate200a. Therefore, the coupling portions220eare cut by the dicing blade1. The dicing blade1is made close to the mother substrate200ato cut the mother substrate200aas described above, so that generation of burrs on the cut portions of the coupling portions220eis significantly reduced or prevented.

To be specific, when the coupling portions220eare cut by the dicing blade1, the insulating substrate210is located at the lower side of the coupling portions220e. Therefore, extension of the cut portions of the coupling portions220eby the dicing blade1is prevented by the insulating substrate210. As a result, generation of burrs due to the extension of the cut portions of the coupling portions220eis significantly reduced or prevented.

The cut portions of the coupling portions220ecorrespond to the adjacent portions22e. The electrodes220after the coupling portions220eare cut correspond to the mounting electrodes22. As a result of the electroplating as described above, each of the mounting electrodes22includes the two adjacent portions22ethat are adjacent to the first and second side surfaces21cof the insulating substrate21, respectively. The burrs on the cut portions of the coupling portions220eare burrs of the mounting electrodes22.

The electrodes230are not located on the cut lines CL1on the second main surface210bof the mother substrate200a. Therefore, generation of burrs of the connection electrodes23is significantly reduced or prevented.

The through-electrodes are not located on the cut lines CL2on the via holes240of the mother substrate200a. Therefore, generation of burrs of the through-electrodes24is significantly reduced or prevented.

Solder pastes are applied to the mounting electrodes22of the substrate terminal20manufactured as described above. Then, the capacitor element10aor10bis placed on the substrate terminal20such that the solder pastes adhere to the outer electrodes14to be re-flowed. The solder pastes melt by reflow are solidified, so that the conductor30is formed. With this, the capacitor element10aor10bis mounted on the substrate terminal20, and the electronic component100aor100bis manufactured.

The manufactured electronic component100aor100bis accommodated in a package with tape. In the package, a number of accommodation holes to accommodate the electronic components100aor100bone by one are formed in one row. When the electronic component100aor100bis mounted on the circuit substrate90, the electronic component100aor100bis taken out of the package one by one and is mounted.

In the electronic component100aor100baccording to the present preferred embodiment, generation of burrs of the mounting electrodes22is significantly reduced or prevented. In addition, the conductor30covers at least a portion of the adjacent portions22e. With this, generation of failure in mounting of the electronic component100aor100bdue to the burrs of the mounting electrodes22is significantly reduced or prevented.

To be specific, as shown inFIGS. 29A and 29B, the conductor30fixes at least a portion of the burrs25of the mounting electrodes22, so that short-circuit of the circuit substrate90due to drop of the burrs25of the mounting electrodes22onto the circuit substrate90is significantly reduced or prevented. When the conductor30covers an entirety of the adjacent portions22e, a short-circuit of the circuit substrate90due to drop of the burrs25of the mounting electrodes22onto the circuit substrate90is significantly reduced or prevented more reliably.

In the electronic component100aor100baccording to the present preferred embodiment, the maximum length Lbof the substrate terminal20is smaller than the maximum length Laof the capacitor element10aor10bin the lengthwise direction of the insulating substrate21. Therefore, the adjacent portions22eare easily covered by the conductor30.

Further, in the present preferred embodiment, the capacitor element10aor10bcovers an entirety of the substrate terminal20when seen from the above. Therefore, the adjacent portions22eare easily covered by the conductor30reliably.

In the electronic component100aor100baccording to the present preferred embodiment, the mounting electrodes22are spaced apart from the third and fourth side surfaces21dof the insulating substrate21when seen from the above. With this, when the capacitor element10aor10bis mounted on the substrate terminal20, an occurrence of positional deviation of the capacitor element10aor10bon the substrate terminal20, in particular, positional deviation of the capacitor element10aor10bdue to rotation thereof on the substrate terminal20is significantly reduced or prevented. Accordingly, bonding of the capacitor elements100aor100bthat are mounted so as to be adjacent to each other is significantly reduced or prevented.

In the electronic component100aor100baccording to the present preferred embodiment, the maximum length L2of each adjacent portion22eis smaller than the maximum length L1of each mounting electrode22in the lengthwise direction of the insulating substrate21. With this, when the capacitor element10aor10bis mounted on the substrate terminal20, positional deviation that the capacitor element10aor10bapproaches the first and second side surfaces of the substrate terminal20on the substrate terminal20is significantly reduced or prevented.

In the electronic component100aor100baccording to the present preferred embodiment, the adjacent portions22eare covered by the capacitor element10aor10bwhen seen from the above. This prevents a load from being applied from be by an external force on the burrs of the mounting electrodes22. To be specific, the capacitor element10aor10bis located above the burrs of the mounting electrodes22, so that the capacitor element10aor10bprevents contact between the burrs of the mounting electrodes22and other members. As a result, short-circuit of the circuit substrate90due to drop of the burrs of the mounting electrodes22onto the circuit substrate90is significantly reduced or prevented.

As described above, the electronic component100aor100bis accommodated in the package including the tape. In the case where the tape is made of paper, when the electronic component100aor100bis accommodated in the package or when the electronic component100aor100bis taken out of the package, nap is generated on the tape due to the burrs of the mounting electrodes22. When the capacitor element10aor10bis mounted on the substrate terminal20, if the nap is mixed into the solder, bonding strength between the capacitor element10aor10band the substrate terminal20lowers in some cases. Further, the burrs of the mounting electrodes22are caught by the tape and the electronic component100aor100bcannot be taken out of the package in some cases. These are failures in mounting of the electronic component100aor100bdue to the burrs of the mounting electrodes22.

In the electronic component100aor100baccording to the present preferred embodiment, generation of the burrs of the mounting electrodes22is significantly reduced or prevented. In addition, the conductor30covers at least a portion of the adjacent portions22e. With this, nap that is generated due to the burrs of the mounting electrodes22is reduced so as to prevent mixing of the nap into the solder and catching tape by the burrs of the mounting electrodes22is significantly reduced or prevented.

Moreover, in the present preferred embodiment, the adjacent portions22eare covered by the capacitor element10aor10bwhen seen from the above. Therefore, contact between the burrs of the mounting electrodes22and the tape is significantly reduced or prevented, thus further reducing the nap that is generated due to the burrs of the mounting electrodes22.

Hereinafter, an electronic component according to a second preferred embodiment of the present invention will be described with reference to the drawings. The electronic component according to the present preferred embodiment is different from the electronic component100aor100baccording to the first preferred embodiment only in the shapes of the mounting electrodes and description of other configurations is not repeated.

Second Preferred Embodiment

FIG. 14is an exploded perspective view illustrating the electronic component according to the second preferred embodiment of the present invention. InFIG. 14, a conductor included in the electronic component is not illustrated.

As illustrated inFIG. 14, in a substrate terminal20bincluded in the electronic component according to the second preferred embodiment of the present invention, the length of each adjacent portion22ein the lengthwise direction of the insulating substrate21is preferably equal or substantially equal to a maximum length L1of other portions of each mounting electrode22.

FIG. 15is a view illustrating a mother substrate as a base of a substrate terminal included in the electronic component according to the present preferred embodiment when seen from the first main surface side.FIG. 16is a view illustrating a cut mother substrate when seen from the first main surface side in the present preferred embodiment.

As illustrated inFIGS. 15 and 16, a mother substrate200bis cut along the cut lines CL1and CL2as virtual lines so as to be the individual substrate terminals20b.

As illustrated inFIG. 15, in the mother substrate200baccording to the present preferred embodiment, the length of each coupling portion220ein the lengthwise direction of the mother substrate is larger than that in the mother substrate200ain the first preferred embodiment.

As illustrated inFIG. 16, in the substrate terminal20baccording to the present preferred embodiment, a maximum length of each adjacent portion22ein the lengthwise direction of the insulating substrate21is larger than that in the substrate terminal20in the first preferred embodiment.

In the electronic component according to the present preferred embodiment, a bonding area of each outer electrode14and each mounting electrode22can be made larger than that in the electronic component100aor100baccording to the first preferred embodiment. Therefore, bonding strength between the capacitor element10aor10band the substrate terminal20bis enhanced.

Hereinafter, an electronic component according to a third preferred embodiment of the present invention will be described with reference to the drawings. The electronic component according to the present preferred embodiment is different from the electronic component100aor100baccording to the first preferred embodiment only in the shapes of connection electrodes and description of other configurations is not repeated.

Third Preferred Embodiment

FIG. 17is a view illustrating a mother substrate as a base of a substrate terminal included in the electronic component according to the third preferred embodiment of the present invention when seen from the second main surface side.FIG. 18is a view illustrating a cut mother substrate when seen from the second main surface side in the present preferred embodiment.

As illustrated inFIGS. 17 and 18, a mother substrate200cis cut along the cut lines CL1and CL2as virtual lines so as to be individual substrate terminals20c.

As illustrated inFIG. 17, in the mother substrate200cas the base of the substrate terminal included in an electronic component according to the present preferred embodiment, a wiring pattern on the second main surface210bhas a configuration such that the plurality of electrodes230are coupled by coupling portions230eas in the wiring pattern on the first main surface210a.

As illustrated inFIGS. 17 and 18, in the second main surface210bof the mother substrate200c, the coupling portions230eare located on the cut lines CL1, so that the coupling portions230eare cut by the dicing blade1.

As illustrated inFIG. 18, in the second main surface21bof the substrate terminal20cin the present preferred embodiment, cut portions of the coupling portions230ecorrespond to adjacent portions23eand the electrodes230after the coupling portions230eare cut correspond to the connection electrodes23. Burrs on the cut portions of the coupling portions230eare burrs of the connection electrodes23. That is to say, in the present preferred embodiment, the connection electrodes23include the adjacent portions23e.

In the present preferred embodiment, the mother substrate200cis cut from the second main surface210bside by the dicing blade1.

In this case, when the coupling portions220eare cut by the dicing blade1, the insulating substrate210is not located at the lower side of the coupling portions220e. Therefore, the cut portions of the coupling portions220eare made to extend by the dicing blade1. Due to this, burrs are generated on the cut portions of the coupling portions220ein some cases.

On the other hand, when the coupling portions230eare cut by the dicing blade1, the insulating substrate210is located at the lower side of the coupling portions230e. Therefore, extension of the cut portions of the coupling portion230eby the dicing blade1is prevented by the insulating substrate210. As a result, burrs that are generated by the extension of the cut portions of the coupling portions230eare significantly reduced or prevented.

In the electronic component according to the present preferred embodiment, even when the burrs of the mounting electrodes22are generated, the conductor30covers at least a portion of the adjacent portions22eof the mounting electrodes22.

In the electronic component according to the present preferred embodiment, generation of the burrs on the adjacent portions23eof the connection electrodes23is significantly reduced or prevented. In addition, the conductor30covers at least a portion of the adjacent portions22eof the mounting electrodes22. With this, failure in mounting of the electronic component due to the burrs of the mounting electrodes22and the burrs of the connection electrodes23is significantly reduced or prevented.

Hereinafter, an electronic component according to a fourth preferred embodiment of the present invention will be described with reference to the drawings. The electronic component according to the present preferred embodiment is different from the electronic component according to the second preferred embodiment only in the shapes of connection electrodes and description of other configurations is not repeated.

Fourth Preferred Embodiment

FIG. 19is a view illustrating a mother substrate as a base of a substrate terminal included in the electronic component according to the fourth preferred embodiment of the present invention when seen from the second main surface side.FIG. 20is a view illustrating a cut mother substrate when seen from the second main surface side in the present preferred embodiment.

As illustrated inFIGS. 19 and 20, a mother substrate200dis cut along the cut lines CL1and CL2as virtual lines so as to be individual substrate terminals20d.

As illustrated inFIG. 19, in the mother substrate200das the base of the substrate terminal included in the electronic component in the present preferred embodiment, a wiring pattern on the second main surface210bhas a configuration that the plurality of electrodes230are coupled by the coupling portions230eas in the wiring pattern on the first main surface210a.

As illustrated inFIGS. 19 and 20, in the second main surface210bof the mother substrate200d, the coupling portions230eare located on the cut lines CL1, so that the coupling portions230eare cut by the dicing blade1.

As illustrated inFIG. 20, in the second main surface21bof the substrate terminal20din the present preferred embodiment, cut portions of the coupling portions230ecorrespond to the adjacent portions23eand the electrodes230after the coupling portions230eare cut correspond to the connection electrodes23. Burrs on the cut portions of the coupling portions230eare burrs of the connection electrodes23. That is to say, in the present preferred embodiment, the connection electrodes23include the adjacent portions23e.

In the present preferred embodiment, the mother substrate200dis cut from the second main surface210bside by the dicing blade1.

In this case, when the coupling portions220eare cut by the dicing blade1, the insulating substrate210is not located at the lower side of the coupling portions220e. Therefore, the cut portions of the coupling portions220eare made to extend by the dicing blade1. Due to this, burrs are generated on the cut portions of the coupling portions220ein some cases.

On the other hand, when the coupling portions230eare cut by the dicing blade1, the insulating substrate210is located at the lower side of the coupling portions230e. Therefore, extension of the cut portions of the coupling portion230eby the dicing blade1is prevented by the insulating substrate210. As a result, burrs that are generated by the extension of the cut portions of the coupling portions230eis significantly reduced or prevented.

In the electronic component according to the present preferred embodiment, even when the burrs of the mounting electrodes22are generated, the conductor30covers at least a portion of the adjacent portions22eof the mounting electrodes22.

That is to say, in the electronic component according to the present preferred embodiment, generation of the burrs on the adjacent portions23eof the connection electrodes23is significantly reduced or prevented. In addition, the conductor30covers at least a portion of the adjacent portions22eof the mounting electrodes22. With this, failure in mounting of the electronic component due to the burrs of the mounting electrodes22and the burrs of the connection electrodes23is significantly reduced or prevented.

As illustrated inFIG. 19, in the mother substrate200daccording to the present preferred embodiment, the length of each coupling portion230ein the lengthwise direction of the mother substrate is larger than that in the mother substrate200caccording to the third preferred embodiment.

As illustrated inFIG. 20, in the substrate terminal20daccording to the present preferred embodiment, a maximum length of each adjacent portion23ein the lengthwise direction of the insulating substrate21is larger than that in the substrate terminal20caccording to the third preferred embodiment.

In the electronic component according to the present preferred embodiment, a bonding area of each connection electrode23and each land91is made larger than that in the electronic component according to the third preferred embodiment. Therefore, bonding strength between the substrate terminal20dand the circuit substrate90is improved.

Hereinafter, an electronic component according to a fifth preferred embodiment of the present invention will be described with reference to the drawings. The electronic component according to the present preferred embodiment is different from the electronic component100aor100baccording to the first preferred embodiment mainly in the shapes and the positions of through-electrodes and description of other configurations is not repeated.

Fifth Preferred Embodiment

FIG. 21is a view illustrating a mother substrate as a base of a substrate terminal included in the electronic component according to a fifth preferred embodiment of the present invention when seen from the first main surface side.FIG. 22is a view illustrating the mother substrate as the base of the substrate terminal included in the electronic component according to the present preferred embodiment when seen from the second main surface side.

As illustrated inFIGS. 21 and 22, in a mother substrate200eas the base of the substrate terminal included in the electronic component according to the fifth preferred embodiment of the present invention, the via holes240are located at substantially the respective centers of the electrodes220and the electrodes230and cause the electrode220and the electrode230to conduct to each other. The inside of each of via holes240is plated with a conductive material such as copper.

FIG. 23is a view illustrating a cut mother substrate when seen from the first main surface side in the present preferred embodiment.FIG. 24is a view illustrating the cut mother substrate when seen from the second main surface side in the present preferred embodiment.

As illustrated inFIGS. 23 and 24, the mother substrate200eis cut along the cut lines CL1and CL2as virtual lines so as to be individual substrate terminals20e.

In the substrate terminal20eaccording to the present preferred embodiment, the columnar through-electrodes24are located at or substantially at the respective centers of the mounting electrodes22and the connection electrodes23. As a result, in the electronic component according to the present preferred embodiment, the through-electrodes24are located at the center side of the capacitor element10aor10bso as to reduce a loop inductance in the electronic component in comparison with the electronic component100aor100baccording to the first preferred embodiment.

Hereinafter, an electronic component according to a sixth preferred embodiment of the present invention will be described with reference to the drawings. The electronic component according to the present preferred embodiment is different from the electronic component according to the fifth preferred embodiment mainly in the positions of the adjacent portions and description of other configurations is not repeated.

Sixth Preferred Embodiment

FIG. 25is a view illustrating a mother substrate as a base of a substrate terminal included in the electronic component according to the sixth preferred embodiment of the present invention when seen from the first main surface side.FIG. 26is a view illustrating the mother substrate as the base of the substrate terminal included in the electronic component in the present preferred embodiment when seen from the second main surface side.

As illustrated inFIGS. 25 and 26, in a mother substrate200fas the base of the substrate terminal included in the electronic component in the present preferred embodiment, the coupling portions220eextend along the straight line alternately in the width direction of the mother substrate200fand the lengthwise direction of the mother substrate200f. In the same manner, the coupling portions230eextend along the straight line alternately in the width direction of the mother substrate200fand the lengthwise direction of the mother substrate200f. With this, when metal-plating is performed, a direct current is made to flow through all the electrodes220, the electrodes230, and the via holes240.

FIG. 27is a view illustrating a cut mother substrate when seen from the first main surface side in the present preferred embodiment.FIG. 28is a view illustrating the cut mother substrate when seen from the second main surface side in the present preferred embodiment.

As illustrated inFIGS. 27 and 28, the mother substrate200fis cut along the cut lines CL1and CL2as virtual lines so as to be individual substrate terminals20f.

In the first main surface210aof the mother substrate200f, the coupling portions220eare located on the cut lines CL1and the cut lines CL2, so that the coupling portions220eare cut by the dicing blade1.

In the second main surface210bof the mother substrate200f, the coupling portions230eare located on the cut lines CL1and the cut lines CL2, so that the coupling portions220eare cut by the dicing blade1.

In the present preferred embodiment, the mother substrate200fis cut from the second main surface210bside by the dicing blade1.

In this case, when the coupling portions220eare cut by the dicing blade1, the insulating substrate210is not located at the lower side of the coupling portions220e. Therefore, the cut portions of the coupling portions220eare made to extend by the dicing blade1. Due to this, burrs are generated on the cut portions of the coupling portions220ein some cases.

On the other hand, when the coupling portions230eare cut by the dicing blade1, the insulating substrate210is located at the lower side of the coupling portions230e. Therefore, extension of the cut portions of the coupling portion230eby the dicing blade1is prevented by the insulating substrate210. As a result, burrs that are generated by the extension of the cut portions of the coupling portions230eare significantly reduced or prevented.

In the electronic component according to the present preferred embodiment, even when the burrs of the mounting electrodes22are generated, the conductor30covers at least a portion of the adjacent portions22eon both of the first and second side surfaces and the third and fourth side surfaces of the substrate terminal20f.

That is to say, in the electronic component according to the present preferred embodiment, generation of the burrs on the adjacent portions23eof the connection electrodes23is significantly reduced or prevented. In addition, the conductor30covers at least a portion of the adjacent portions22eof the mounting electrodes22. With this, failure in mounting of the electronic component due to the burrs of the mounting electrodes22and the burrs of the connection electrodes23is significantly reduced or prevented.

It should be considered that the preferred embodiments disclosed herein are exemplary in all the points and not limiting. The scope of the present invention is defined not by the above-mentioned description but by the scope of the present invention as follows and encompasses all the changes within meanings and ranges equivalent to the scope of the invention.