Pseudo bipolar junction transistor

A pseudo bipolar junction transistor according to the invention includes two MOS transistors operating in saturation region, electrically connected in parallel with their drains and sources functioning as a collector and a emitter of the pseudo bipolar junction transistor, respectively, a first gate without any signal inputted and a second gate functioning as a base of the pseudo bipolar junction transistor, wherein the two gates is supplied with the same DC bias. The pseudo bipolar junction transistor is manufactured by CMOS process for applications in variable gain amplifiers, transfer linear function signal processors and logarithmic filters.

BACKGROUND OF THE INVENTION
 Field of the Invention
 The invention relates to a bipolar junction transistor, and more
 particularly to a pseudo bipolar junction transistor using CMOS process.
 2. Description of the Related Art
 Variable grain amplifiers, auto-gain controllers, transfer linear function
 signal processors and recently-developed logarithmic filters and
 logarithmic current control oscillators are significantly applied in
 various fields. There is a common point for those circuits that bipolar
 junction transistors (BJTs) having an exponential function are used.
 Although in CMOS process, lateral transistors and MOS transistors
 operating in weak inversion region can be used for replacement, their
 application fields are limited due to their poor performances. Therefore,
 in many fields, BJTs can not be replaced with MOS transistors.
 For variable gain amplifier and auto-gain controller applications, several
 pseudo-exponential circuits designed according to CMOS technology has been
 successfully developed. However, due to their complicated structures, the
 pseudo-exponential circuits can not function as BJTs. Therefore, CMOS
 transistors operating in saturation region are used to replace BJTs. The
 reason how come does the CMOS transistors operate in saturation region is
 that MOS transistors in weak inverse region has a narrow operation region,
 poor frequency response and poor match effect. Furthermore, lateral
 transistors have a small collector-base current gain and a larger leakage
 current. Consequently, making MOS transistors operate in saturation region
 has a valuable application.
 SUMMARY OF THE INVENTION
 In view of the above, the invention provides a pseudo bipolar junction
 transistor circuit which is performed by CMOS transistors operating in
 saturation region. The pseudo bipolar junction transistor circuit
 according to the invention has a simple structure, being able to function
 as a single bipolar junction transistor. Therefore, variable gain
 amplifiers, transfer linear function signal processors and logarithmic
 filters and oscillators can be realized using the inventive pseudo bipolar
 junction transistor. Moreover, the principle for designing various
 circuits using the inventive pseudo bipolar junction transistor is the
 same as that using the general bipolar junction transistor. Therefore,
 bipolar junction transistors used in original circuits can be directly
 replaced by the inventive pseudo bipolar junction transistors, with an
 appropriate bias current selected. Therefore, in intermediate frequency
 applications and designs, BiCMOS process can be replaced with CMOS
 process, thereby simplifying the requirements of process.
 In order to attain the above-stated objects, a pseudo bipolar junction
 transistor according to the invention includes two MOS transistors
 operating in saturation region. The two MOS transistors are electrically
 connected in parallel with their drains and sources functioning as a
 collector and a emitter of the pseudo bipolar junction transistor,
 respectively, a first gate without any signal inputted and a second gate
 functioning as a base of the pseudo bipolar junction transistor, wherein
 the two gates are supplied with the same DC bias.
 The pseudo bipolar junction transistor further includes two identical
 squares. The two identical squares are electrically connected to the two
 MOS transistors in series, having the same bias, one without any signal
 inputted and the other with a signal inputted. The outputs of the two
 identical squarers are added to each other to generate a pseudo
 exponential function, and then the pseudo exponential function is expanded
 into a Tyler series with the terms over two order omitted.
 Furthermore, the pseudo bipolar junction transistor includes a constant
 current source and a PMOS transistor. One terminal of the constant current
 source is electrically connected to the source of the PMOS transistor, and
 the gate of the PMOS transistor is electrically connected to the sources
 of the MOS transistors to prevent constant DC bias from being affected by
 variation of the source voltage.
 The pseudo bipolar junction transistor further includes a first PMOS
 transistor, a second PMOS transistor, a third PMOS transistor and a four
 PMOS transistor. The gates of the first PMOS transistor and the second
 PMOS transistor are electrically connected to the sources of the MOS
 transistors, the source of the third PMOS transistor is electrically
 connected to the drain of the first PMOS transistor and the source of the
 four PMOS transistor is electrically connected to the drain of the second
 PMOS transistor.
 According to the invention, the pseudo bipolar junction transistor has a
 characteristic equation similar to that of a general bipolar junction
 transistor. The pseudo bipolar junction transistor can easily replace the
 general bipolar junction transistor for applications in variable gain
 amplifiers, auto-gain controllers, transfer linear function signal
 processors and recently-developed logarithmic filters and logarithmic
 current controlled oscillators. The pseudo bipolar junction transistor is
 manufactured by CMOS process instead of BiCMOS process.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
 There is an exponential relation between the base-emitter voltage and
 collector current of a bipolar junction transistor (BJT). When
 .vertline..times..vertline.&lt;1, an exponential function can be expanded
 into a Taylor series with the terms over two orders omitted, by:
 ##EQU1##
 Furthermore, Equation (1) can be rewritten as:
 ##EQU2##
 According to Equation (2), a pseudo bipolar junction transistor which
 includes two NMOS transistors M1, M2 electrically connected in parallel
 having their sources and drains functioning as a collector and an emitter
 thereof, respectively, can be expressed in FIG. 1A. In FIG. 1A, the drain
 currents of the two matched NMOS transistors M1 and M2 operating in
 saturation region can be expressed by:
EQU I.sub.M1 =K(V.sub.H -V.sub.E -V.sub.TH).sup.2 (3)
EQU I.sub.M2 =K(V.sub.i +V.sub.B -V.sub.E -V.sub.TH).sup.2 (4)
 Then, the collector current I.sub.C =(I.sub.M1 +I.sub.M2) can be obtained
 by:
 ##EQU3##
 I.sub.s =2K(V.sub.H -V.sub.E -V.sub.Th).sup.2
 V.sub.T =V.sub.H -V.sub.E -V.sub.Th
 wherein V.sub.i is an input voltage, V.sub.TH is a threshold voltage,
 V.sub.H is a pseudo base bias voltage, V.sub.E is a pseudo emitter voltage
 and K is a transfer coefficient. Equation (5) is a characteristic equation
 of the inventive pseudo bipolar junction transistor. Although it is a
 pseudo equation, the error of Equation (5) is less than 5% when
 ##EQU4##
 Meanwhile the characteristic equation of the pseudo bipolar junction
 transistor is the same as that of the BJT. Therefore, the inventive pseudo
 bipolar junction transistor shown in FIG. 1A can be used to replace the
 BJT.
 The pseudo bipolar junction transistor of FIG. 1A has a characteristic
 equation similar to BJT. It, however, will cause a problem that a dynamic
 output range is too narrow if the pseudo bipolar junction transistor is
 applied in variable gain amplifiers and auto-gain controllers.
 Fortunately, a plurality of squarers (not shown) can be coupled to the
 pseudo bipolar junction transistor in series, and therefore, a pseudo
 exponential function e.sup.2nx can be obtained, wherein n is the number of
 the squarers. Since the dynamic output range is 2n times the value
 e.sup.x, for a dynamic range of 80 dB, three squares are needed.
 Typically, no more than four squarers are needed. Taking two squarers
 having the same bias voltage as an example, one of two squares is not
 supplied with an input signal while the other squarer is supplied with an
 input signal. The two outputs of two squarers are added to each other to
 obtain a pseudo exponential function, and then the pseudo exponential
 function is expanded into a Tyler series with the terms over two orders
 omitted.
 The pseudo bipolar junction transistor shown in FIG. 1A can be successfully
 applied to variable gain amplifiers and auto-gain controllers. However,
 the pseudo bipolar junction transistor is a grounded device. In other
 words, the thermal voltage V.sub.T of the general bipolar junction
 transistor is a constant value under a constant temperature while the
 thermal voltage V.sub.T (=V.sub.B -V.sub.E -V.sub.TH) of the pseudo
 bipolar junction transistor varies with the emitter voltage, and
 therefore, the pseudo bipolar junction transistor can not function as a
 floating device in transfer linear function signal processors and
 logarithmic filters.
 To resolve the above-stated problem, the invention provides an improved
 pseudo bipolar junction transistor as shown in FIG. 1B. In FIG. 1B, the
 improved pseudo bipolar junction transistor includes two NMOS transistors
 M1, M2, a constant current source I.sup.B and a PMOS transistor 10. The
 output terminal of the constant current source I.sub.B is electrically
 coupled to the gate of the NMOS transistor M1 and the source of the PMOS
 transistor 10. The gate of the PMOS transistor 10 is electrically
 connected to the sources of the NMOS transistors M1, M2, wherein V.sub.T
 =V.sub.B -V.sub.TH. Since V.sub.T is not affected by the emitter voltage,
 and V.sub.B can be controlled by a bias current I.sub.B, V.sub.T is a
 constant value. Consequently, the improved pseudo bipolar junction
 transistor of FIG. 1B can function as a floating device in transfer linear
 function signal processors and logarithmic filters. Furthermore, the
 improved pseudo bipolar junction transistor of FIG. 1B is a current input
 device which must have an input current Ic
 (0.5631I.sub.S.ltoreq.I.sub.C.ltoreq.2.259I.sub.S) to make the pseudo
 bipolar junction transistor have a proper bias voltage V.sub.B. That is,
 the NMOS transistors M1, M2 must be supplied with a proper bias voltage
 V.sub.B. To overcome this problem, the invention provides another improved
 pseudo bipolar junction transistor as shown in FIG. 1C. In FIG. 1C, the
 improved pseudo bipolar junction transistor includes two NMOS transistors
 M1, M2, a first PMOS transistor 12, a second PMOS transistor 14, a third
 PMOS transistor 16 and a four PMOS transistor 18. The gates of the first
 PMOS transistor 12 and the second PMOS transistor 14 are electrically
 coupled to the sources of the NMOS transistors M1, M2. The source of the
 third PMOS transistor 16 is electrically coupled to the gate of the NMOS
 transistor MI and the drain of the first PMOS transistor 12. The source of
 the four PMOS transistor 18 is electrically connected to the gate of the
 NMOS transistor M2 and the drain of the second PMOS transistor 14. For
 applications in signal processors and logarithmic filters, it is enough to
 adopt the pseudo bipolar function transistor of FIG. 1B.
 The floating pseudo bipolar junction transistors of FIGS. 1B and 1C face a
 problem of body effect in N-Well process, causing variation of the
 threshold voltage V.sub.TH, and then affectingly the value of V.sub.T.
 That is, V.sub.T is no longer a constant value. In this case, these pseudo
 bipolar junction transistors of FIGS. 1B and 1C can not function as a
 floating device. There are two ways to avoid body effect, for example, in
 N-Well process. First, PMOS transistors are used instead of NMOS
 transistors because the body voltage of PMOS transistors is controllable
 in N-Well process, and the bias circuit is properly modified as shown in
 FIG. 1D. Additionally, any circuit structure which is not sensible to body
 effect can be adopted, for example, a differential circuit having a
 symmetric structure that can counteract body effect.
 Moreover, the dynamic range of the grounded pseudo bipolar junction
 transistor according to the invention can be improved by serially
 connecting squarers. However, it is not suitable for the floating pseudo
 bipolar junction transistor to add squarers to increase the dynamic range
 because it will increase complexity on circuit designs. For intermediate
 frequency applications in transfer liner function signal processors and
 logarithmic filters, a larger bias current and aspect ratio of transistors
 (W/L) can be used to attain requirements of the static output range.
 Next, there are several experimental results using 0.8 .mu.m CMOS process
 will be described as follows:
 Experiment 1: Exponential Voltage-Current Converter
 Referring to FIG. 2A, a relationship between the input voltage and the
 output current of the pseudo bipolar junction transistor of FIG. 1A is
 shown, wherein power source is .+-.1.5, V.sub.E =-1.5V, V.sub.TH =0.755,
 V.sub.B =0.25V, W=5 .mu.m and L=50 .mu.m. The result shows that the
 dynamic range of the output current is approximately 12dB and error is
 less than 2% when the input voltage is between -0.65V and 0.9V.
 Referring to FIG. 2B, a relationship between the input voltage and the
 output current of the pseudo bipolar junction transistor of FIG. 1A using
 detached transistor devices (CD4007). The power source is .+-.1.5, V.sub.E
 =-1.5V and V.sub.B =0.5V. The result shows that the dynamic range of the
 output current is approximately 12dB, error is less than 5%, when the
 input voltage ranges from -0.32V to 0.48V
 Experiment 2: Four Quadrant Transfer Linear Function Divider
 Referring to FIG. 3, a four quadrant transfer linear function divider is
 shown. The characteristic equation of the four quadrant transfer linear
 function divider can be expressed by:
 ##EQU5##
 FIG. 4 shows a relationship between the input current and the output
 current of the four quadrant transfer linear function divider of FIG. 3.
 In FIG. 4, the bipolar junction transistor is compared to the pseudo
 bipolar junction transistor, wherein the bipolar junction transistor's
 .beta.=10, the aspect ratio (W/L) of the pseudo bipolar junction
 transistor=5 .mu.m/5 .mu.m, V.sub.B =1.75V, power source=3V, I.sub.1 =70
 .mu.A and I.sub.2 =140 .mu.A. The result shows that error of the divider
 using the bipolar junction transistor is approximately 14% while error of
 the divider using the pseudo bipolar junction transistor is less than 6.5%
 when -15 .mu.A.ltoreq.i.sub.1.ltoreq.15 .mu.A and -40
 .mu.A.ltoreq.i.sub.2.ltoreq.40 .mu.A. The error of the divider using the
 bipolar junction transistor is larger because of the bipolar junction
 transistor is finite.
 Experiment 3: First Order Logarithmic Low Pass Filter
 Referring to FIG. 5, a simple first order logarithmic low pass filter is
 shown, wherein the transfer function thereof is as follows:
 ##EQU6##
 wherein
 ##EQU7##
 FIG. 6A shows a frequency response of the low pass filter of FIG. 5,
 wherein power source=3V, I.sub.O =5 .mu.A, V.sub.B =1.5V, the aspect ratio
 (W/L) of the pseudo bipolar junction transistor=.mu.m/5 .mu.m, and
 capacitance=1 pF, 10 pF and 100 pF. FIG. 6B shows a relationship between
 the modulation index and the harmonic distortion of the low pass filter of
 FIG. 5, wherein the input signal I.sub.IN is less than 50% of the bias
 voltage current I.sub.O, and the sum of the harmonic distortion is less
 than 0.22%. From FIG. 6A, the frequency response is inversely proportional
 to the capacitance.
 Experiment 4: First Order High Pass Filter
 FIG. 7 is an improved first order high pass filter, wherein the transfer
 function thereof is as follows:
 ##EQU8##
 Moreover, the parameters of the high pass filter are the same as those of
 the low pass filter. FIG. 8 shows a frequency response of the high pass
 filter of FIG. 7. The result shows that the frequency response is
 inversely proportional to the capacitance.
 Experiment 5: Logarithmic Band Pass Filter
 The low pass filter of FIG. 5 is electrically connected to the high pass
 filter of FIG. 7 in series to form a logarithmic band pass filter. FIGS.
 9A and 9B shows the frequency response of the band pass filter, wherein
 the frequency response is inversely proportional to the capacitance and
 positively proportional to the bias current I.sub.O.
 Experiment 6: Logarithmic Current Controlled Oscillator
 Referring to FIG. 10, a current controlled oscillator is formed by
 adjusting the gain of the band pass filter and connecting the input to the
 output thereof. FIG. 11A shows a transition response of the oscillator.
 FIG. 11B shows a relationship between the oscillation frequency and
 capacitance of the oscillator. The result shows that the oscillation
 frequency is inversely proportional to the capacitance as calculated.
 In summary, a pseudo bipolar junction transistor according to the invention
 has a characteristic equation similar to that of a general bipolar
 junction transistor. The pseudo bipolar junction transistor can easily
 replace the general bipolar junction transistor for applications in
 variable gain amplifiers, auto-gain controllers, transfer linear function
 signal processors and recently-developed logarithmic filters and
 logarithmic current controlled oscillators. The pseudo bipolar junction
 transistor is manufactured by CMOS process instead of BiCMOS process.
 While the invention has been described by way of example and in terms of
 the preferred embodiment, it is to be understood that the invention is not
 limited to the disclosed embodiments. On the contrary, it is intended to
 cover various modifications and similar arrangements as would be apparent
 to those skilled in the art. Therefore, the scope of the appended claims
 should be accorded the broadest interpretation so as to encompass all such
 modifications and similar arrangements.