Systems and Methods for Achieving Consistent Front-of-Screen Performance for Varying Media Rates

Front-of-screen performance of the electronic display may be highly sensitive to timing settings of emission and anode reset frequencies. Changes in the timing settings may result in diverging brightness and color performance on the electronic display, which may negatively impact user experience. In some cases, emission frequency of the self-emissive display pixels may be fixed at a value, such as 120 Hertz (Hz), 240 Hz, or 480 Hz. The anode reset frequency may be set at a divisor of the emission frequency. Some refresh rates may be divisors of the pixel emission frequency. However, other refresh rates may not be divisors of the pixel emission frequency. For such non-divisor refresh rates, different driving schemes may be used to compensate for a difference from the pixel emission frequency.

SUMMARY

This disclosure relates to methods for improving front-of-screen consistency between various refresh rates.

A summary of certain embodiments disclosed herein is set forth below. It should be understood that these aspects are presented to provide the reader with a brief summary of these certain embodiments and that these aspects are not intended to limit the scope of this disclosure.

Electronic displays may be found in numerous electronic devices, from mobile phones to computers, televisions, automobile dashboards, and augmented reality or virtual reality glasses, to name just a few. Electronic displays with self-emissive display pixels produce their own light. Self-emissive display pixels may include any suitable light-emissive elements, including light-emitting diodes (LEDs) such as organic light-emitting diodes (OLEDs) or micro-light-emitting diodes (uLEDs). By causing different display pixels to emit different amounts of light, individual display pixels of an electronic display may collectively produce images.

Front-of-screen (FoS) performance of an electronic display may be highly sensitive to timing settings of display pixel emission and anode reset frequencies. Changes in the timing settings may result in diverging brightness and color performance on the electronic display, which may negatively impact user experience. In some cases, emission frequency of the self-emissive display pixels may be fixed at a value, such as 120 Hertz (Hz), 240 Hz, or 480 Hz. The anode reset frequency may be fixed as a divisor of the emission frequency, such as 30 Hz, 60 Hz, or 120 Hz. Refresh rates, however, may be adjusted via user settings. Some refresh rates, such as 24 Hz, 30 Hz, 34.3 Hz, 80 Hz, and so on may be divisors of the pixel emission frequency. Other refresh rates, such as 50 Hz, 59.94 Hz, 47.95 Hz, and so on, may not be divisors of the pixel emission frequency. For such non-divisor refresh rates, different driving schemes may be used to compensate for a difference from the pixel emission frequency, as the different from the pixel emission frequency may negatively impact FoS performance. The different driving schemes may include applying different time constants to a pixel, using different lookup tables (LUTs) based on refresh rate, or adjusting an LUT based on refresh rate.

DETAILED DESCRIPTION OF SPECIFIC EMBODIMENTS

Front-of-screen (FoS) performance of the electronic display may be highly sensitive to timing settings of emission frequencies and anode reset frequencies of an electronic display. Changes in the timing settings may result in diverging brightness and color performance on the electronic display, which may negatively impact user experience. In some cases, emission frequency of the self-emissive display pixels may be fixed at a value, such as 120 Hertz (Hz), 240 Hz, or 480 Hz. The anode reset frequency may be fixed at a divisor of the emission frequency, such as 30 Hz, 60 Hz, or 120 Hz. However, refresh rates may be changed and adjusted via user settings. Some refresh rates may be divisors of the pixel emission frequency, such as 24 Hz, 30 Hz, 34.3 Hz, 80 Hz, and so on. Other refresh rates may not be divisors of the pixel emission frequency, such as 50 Hz, 59.94 Hz, 47.95 Hz, and so on. For such non-divisor refresh rates, different driving schemes may be used to compensate for a difference between various refresh rates and the pixel emission frequency, as the different from the pixel emission frequency may negatively impact FoS performance.

Embodiments herein provide various apparatuses and techniques to maintain consistent brightness and color between varying refresh rates. In an embodiment, multiple optical calibration (OC) lookup tables (LUTs) may be used for corresponding gamma bands. For refresh rates with longer emission pulse widths (e.g., a 50 Hz refresh rate), a driving voltage may be reduced in order to achieve a similar or identical integrated brightness with respect to refresh rates having shorter emission pulse widths. That is, the driving voltage may be adjusted such that a charging speed of a display pixel54having a refresh rate with longer emission pulse width may be slower than a charging speed of a display pixel54having refresh rate with shorter emission pulse width. Slowing down the charging speed of the display pixels54having refresh rates with longer emission pulse widths may cause the electronic display to behave similarly with a lower refresh rate (e.g., 50 Hz refresh rate) as it would with a higher refresh rate (e.g., 60 Hz refresh rate). This may be verified from measurements of panel dynamic response.

In another embodiment, a single OC LUT may be shared between various refresh rates, and separate LUTs may be used at the global display brightness (GDB) values (e.g., display brightness values (DBVs)) and/or gray levels where different refresh rates produce a brightness and/or color deviation or difference beyond a threshold. As used herein, the GDB and DBV refer to a global display brightness setting (e.g., a setting that corresponds to the maximum brightness level of the display), which may be selected by a person viewing the display and/or based on ambient light conditions. At certain lower GDB and/or gray levels, the different charging speeds of the pixels may cause the pixels to produce noticeably different amounts of light.

For example, a common OC LUT may be used for display pixels having a refresh rate of 50 Hz and display pixels having a refresh rate of 60 Hz under certain conditions (e.g., when the display pixels are associated with a given gray level or GDB value). However, different OC LUTs may be used for display pixels having a refresh rate of 50 Hz and display pixels having a refresh rate of 60 Hz under other conditions (e.g., when the display pixels are associated with an additional gray level or GDB value). While multiple OC LUTs are discussed, it should be noted that in some cases, there may be a single LUT that is calibrated for a first refresh rate (e.g., 60 Hz) but is adjusted via unity gain to be used for display pixels having a second refresh rate (50 Hz).

With this in mind, an example of an electronic device10, which includes an electronic display12that may benefit from these features, is shown inFIG.1.FIG.1is a schematic block diagram of the electronic device10. The electronic device10may be any suitable electronic device, such as a computer, a mobile (e.g., portable) phone, a portable media device, a tablet device, a television, a handheld game platform, a personal data organizer, a virtual-reality headset, a mixed-reality headset, a wearable device, a watch, a vehicle dashboard, and/or the like. Thus, it should be noted thatFIG.1is merely one example of a particular implementation and is intended to illustrate the types of components that may be present in an electronic device10.

In addition to the electronic display12, as depicted, the electronic device10includes one or more input devices14, one or more input/output (I/O) ports16, a processor core complex 18 having one or more processors or processor cores and/or image processing circuitry, memory20, one or more storage devices22, a network interface24, and a power supply26. The various components described inFIG.1may include hardware elements (e.g., circuitry), software elements (e.g., a tangible, non-transitory computer-readable medium storing instructions), or a combination of both hardware and software elements. It should be noted that the various depicted components may be combined into fewer components or separated into additional components. For example, the memory20and the storage devices22may be included in a single component. Additionally or alternatively, image processing circuitry of the processor core complex 18 may be disposed as a separate module or may be disposed within the electronic display12.

The processor core complex 18 is operably coupled with the memory20and the storage device22. As such, the processor core complex 18 may execute instructions stored in memory20and/or a storage device22to perform operations, such as generating or processing image data. The processor core complex 18 may include one or more microprocessors, one or more application specific processors (ASICs), one or more field programmable logic arrays (FPGAs), or any combination thereof.

In addition to instructions, the memory20and/or the storage device22may store data, such as image data. Thus, the memory20and/or the storage device22may include one or more tangible, non-transitory, computer-readable media that store instructions executable by processing circuitry, such as the processor core complex 18, and/or data to be processed by the processing circuitry. For example, the memory20may include random access memory (RAM) and the storage device22may include read only memory (ROM), rewritable non-volatile memory, such as flash memory, hard drives, optical discs, and/or the like.

The network interface24may enable the electronic device10to communicate with a communication network and/or another electronic device10. For example, the network interface24may connect the electronic device10to a personal area network (PAN), such as a Bluetooth network, a local area network (LAN), such as an 802.11x Wi-Fi network, and/or a wide area network (WAN), such as a fourth-generation wireless network (4G), LTE, or fifth-generation wireless network (5G), or the like. In other words, the network interface24may enable the electronic device10to transmit data (e.g., image data) to a communication network and/or receive data from the communication network.

The power supply26may provide electrical power to operate the processor core complex 18 and/or other components in the electronic device10, for example, via one or more power supply rails. Thus, the power supply26may include any suitable source of electrical power, such as a rechargeable lithium polymer (Li-poly) battery and/or an alternating current (AC) power converter. A power management integrated circuit (PMIC) may control the provision and generation of electrical power to the various components of the electronic device10.

The I/O ports16may enable the electronic device10to interface with another electronic device10. For example, a portable storage device may be connected to an I/O port16, thereby enabling the electronic device10to communicate data, such as image data, with the portable storage device.

The input devices14may enable a user to interact with the electronic device10. For example, the input devices14may include one or more buttons, one or more keyboards, one or more mice, one or more trackpads, and/or the like. Additionally, the input devices14may include touch sensing components implemented in the electronic display12, as described further herein. The touch sensing components may receive user inputs by detecting occurrence and/or position of an object contacting the display surface of the electronic display12.

In addition to enabling user inputs, the electronic display12may provide visual representations of information by displaying one or more images (e.g., image frames or pictures). For example, the electronic display12may display a graphical user interface (GUI) of an operating system, an application interface, text, a still image, or video content. To facilitate displaying images, the electronic display12may include a display panel with one or more display pixels. The display pixels may represent sub-pixels that each control a brightness of one color component (e.g., red, green, or blue for a red-green-blue (RGB) pixel arrangement).

The electronic display12may display an image by controlling the brightness of its display pixels based at least in part image data associated with corresponding image pixels in image data. In some embodiments, the image data may be generated by an image source, such as the processor core complex 18, a graphics processing unit (GPU), an image sensor, and/or memory20or storage devices22. Additionally, in some embodiments, image data may be received from another electronic device10, for example, via the network interface24and/or an I/O port16.

One example of the electronic device10, specifically a handheld device10A, is shown inFIG.2.FIG.2is a front view of the handheld device10A representing an example of the electronic device10. The handheld device10A may be a portable phone, a media player, a personal data organizer, a handheld game platform, and/or the like. For example, the handheld device10A may be a smart phone, such as any iPhone® model available from Apple Inc.

The handheld device10A includes an enclosure30(e.g., housing). The enclosure30may protect interior components from physical damage and/or shield them from electromagnetic interference. In the depicted embodiment, the electronic display12is displaying a graphical user interface (GUI)32having an array of icons34. By way of example, when an icon34is selected either by an input device14or a touch sensing component of the electronic display12, an application program may launch.

Input devices14may be provided through the enclosure30. As described above, the input devices14may enable a user to interact with the handheld device10A. For example, the input devices14may enable the user to activate or deactivate the handheld device10A, navigate a user interface to a home screen, navigate a user interface to a user-configurable application screen, activate a voice-recognition feature, provide volume control, and/or toggle between vibrate and ring modes. The I/O ports16also open through the enclosure30. The I/O ports16may include, for example, a Lightning® or Universal Serial Bus (USB) port.

The electronic device10may take the form of a tablet device10B, as shown inFIG.3.FIG.3is a front view of the tablet device10B representing an example of the electronic device10. By way of example, the tablet device10B may be any iPad® model available from Apple Inc. A further example of a suitable electronic device10, specifically a computer10C, is shown inFIG.4.FIG.4is a front view of the computer10C representing an example of the electronic device10. By way of example, the computer10C may be any MacBook® or iMac® model available from Apple Inc. Another example of a suitable electronic device10, specifically a watch10D, is shown inFIG.5.FIG.5are front and side views of the watch10D representing an example of the electronic device. By way of example, the watch10D may be any Apple Watch® model available from Apple Inc. As depicted, the tablet device10B, the computer10C, and the watch10D all include respective electronic displays12, input devices14, I/O ports16, and enclosures30.

Describing now the display pixel array50,FIG.6is a block diagram of the display pixel array50of the electronic display12. It should be understood that, in an actual implementation, additional or fewer components may be included in the display pixel array50.

The electronic display12may receive compensated image data74for presentation on the electronic display12. The electronic display12includes display driver circuitry that includes scan driver circuitry76and data driver circuitry78. The display driver circuitry controls programing the compensated image data74into the display pixels54for presentation of an image frame via light emitted according to each respective bit of compensated image data74programmed into one or more of the display pixels54.

The display pixels54may each include one or more self-emissive elements, such as a light-emitting diodes (LEDs) (e.g., organic light emitting diodes (OLEDs) or micro-LEDs (uLEDs)), however other pixels may be used with the systems and methods described herein including but not limited to liquid-crystal devices (LCDs), digital mirror devices (DMD), or the like, and include use of displays that use different driving methods than those described herein, including partial image frame presentation modes, variable refresh rate modes, or the like.

Different display pixels54may emit different colors. For example, some of the display pixels54may emit red light, some may emit green light, and some may emit blue light. Thus, the display pixels54may be driven to emit light at different brightness levels to cause a user viewing the electronic display12to perceive an image formed from different colors of light. The display pixels54may also correspond to hue and/or brightness levels of a color to be emitted and/or to alternative color combinations, such as combinations that use red (R), green (G), blue (B), or others.

The scan driver circuitry76may provide scan signals (e.g., pixel reset, data enable, on-bias stress) on scan lines80to control the display pixels54by row. For example, the scan driver circuitry76may cause a row of the display pixels54to become enabled to receive a portion of the compensated image data74from data lines82from the data driver circuitry78. In this way, an image frame of the compensated image data74may be programmed onto the display pixels54row by row. Other examples of the electronic display12may program the display pixels54in groups other than by row.

In some cases, emission frequency of the self-emissive display pixels may be fixed at a value, such as 120 Hertz (Hz), 240 Hz, or 480 Hz. The anode reset frequency may be set at a divisor of the emission frequency, such as 30 Hz, 60 Hz, or 120 Hz. Some refresh rates may be divisors of the pixel emission frequency, such as 24 Hz, 30 Hz, 34.3 Hz, 80 Hz, and so on. However, other refresh rates may not be divisors of the pixel emission frequency, and thus may not be supported by the display12with certain emission frequencies (e.g., 480 Hz).FIG.7illustrates operation of a display pixel54with an emission frequency of 480 Hz, an anode refresh frequency of 240 Hz, and a refresh rate of 50 Hz. As the anode refresh frequency is one-half of the emission frequency, an anode reset102may occur at every two pulses106. A voltage108of the display pixel54(indicated by the shading in each of the pulses106) may reach a maximum amplitude for each pulse106, indicating full charging—and thus full brightness—of the display pixel54. As 50 is not a divisor of 480, the pulse104undergoes only a partial refresh, which may lead to FoS issues and negatively impact user experience. For such non-divisor refresh rates, different driving schemes may be used to compensate for a difference between various refresh rates and the pixel emission frequency.

FIG.8illustrates operation of a display pixel54under high-brightness (e.g., high-luminance) condition at various refresh rates. Timing diagram120illustrates an image frame having a 480 Hz emission rate, a 60 Hz refresh rate, and an anode reset rate of 240 Hz. Similar toFIG.7, the timing diagram120illustrates an emission rate of 480 Hz and an anode reset rate of 240 Hz, thus the anode reset102occurs every two pulses121. The voltage122of the display pixel54(indicated by the shading in each of the pulses121) may reach a maximum amplitude for each of the pulses121, indicating full charging—and thus full brightness—of the display pixel54.

Timing diagram124illustrates a display pixel54having a 50 Hz refresh rate. To avoid the FoS issues discussed with respect toFIG.7, the emission frequency may be set such that the refresh rate is a divisor of the emission frequency. For example, as the refresh rate of the timing diagram124is 50 Hz, the emission frequency may be set to a multiple of 100 Hz, such as 400 Hz, and the anode refresh rate may be set to 200 Hz, such that an anode reset102occurs every two pulses126. It may be appreciated that, as the refresh rate of the timing diagram is 50 Hz rather than 60 Hz (as show in the timing diagram120), the pulses126may be 20% longer than the width of the pulses121. Given the extended pulse width, the display pixels54may have more time to charge at each pulse126than at the pulses121. However, at high brightness, the charging of the pulses121and126is sufficiently fast that all pulses121and126may be fully charged despite the differences in charging time. Indeed, voltage128of the display pixels54(indicated by the shading in each of the pulses126) may reach a maximum amplitude for each of the pulses126, indicating full charging—and thus full brightness—of the display pixel54. While the emission frequency in the example above is discussed as being 400 Hz, it should be noted that the emission frequency may be any multiple of 100 Hz, such as 500 Hz, 600 Hz, and so on.

The graph130illustrates brightness outputs at higher brightness levels of display pixels54having a 60 Hz refresh rate (e.g., corresponding to the timing diagram120) and display pixels54having a 50 Hz refresh rate (e.g., corresponding to the timing diagram124). The graph130includes an x-axis132illustrating gray level, and a y-axis134illustrating brightness (in nits). The y-axis134may represent relatively higher brightness levels, such as ranging from 0.3 nits to 200 nits (e.g., on a logarithmic scale). The graph130includes a curve136representing brightness as a function of gray level for a display pixel54having a refresh rate of 50 Hz and a curve138representing brightness as a function of gray level for a display pixel54having a refresh rate of 60 Hz. As may be observed from the graph130, the curve136illustrates slightly brighter display pixels54at lower gray levels, but the curve136and the curve138are similar at higher gray levels. Accordingly, at higher brightness levels, display pixels54having an emission frequency of 400 Hz (or an emission frequency of any multiple of 100, such as 500 Hz, 600 Hz, and so on) and a refresh rate of 50 Hz may have a FoS appearance similar to that of display pixels54having an emission frequency of 480 Hz and a refresh rate of 50 Hz. However, as will be discussed with respect toFIG.9below, the differences between display pixels54having a refresh rate of 50 Hz and display pixels54having a refresh rate of 60 Hz may diverge substantially at lower brightness.

FIG.9illustrates operation of a display pixel54under low-brightness (e.g., low-luminance) condition at various refresh rates. The timing diagram120illustrates a display pixel54having a 60 Hz refresh rate. At low brightness, a voltage150of the display pixel54(indicated by the shading in each of the pulses121) may not reach a maximum amplitude for each of the pulses121, indicating less than full charging—and thus less than full brightness—of the display pixel54.

The timing diagram124illustrates a display pixel54having a 50 Hz refresh rate. As was previously stated, as the refresh rate of the timing diagram124is 50 Hz rather than 60 Hz (as show in the timing diagram120), the pulses126may be 20% longer than the width of the pulses121. Given the extended pulse width, the display pixels54may have more time to charge at each pulse126than at the pulses121. In contrast to the high-brightness condition discussed with respect toFIG.8above, at lower brightness, the longer pulse-width of the 50 Hz pulses126may result in higher charging of the pulses126than the pulses121, causing a brightness differential between display pixels54having a refresh rate of 60 Hz and display pixels54having a refresh rate of 50 Hz.

A graph170illustrates brightness outputs at lower brightness levels of display pixels54having a 60 Hz refresh rate (e.g., corresponding to the timing diagram120) and display pixels54having a 50 Hz refresh rate (e.g., corresponding to the timing diagram124). The graph170includes an x-axis132illustrating gray level, and a y-axis172illustrating brightness (in nits). The y-axis172may represent relatively lower brightness levels, such as ranging from 0.01 nits to 20 nits (e.g., on a logarithmic scale). The graph170includes a curve174representing brightness as a function of gray level for a display pixel54having a refresh rate of 50 Hz and a curve176representing brightness as a function of gray level for a display pixel54having a refresh rate of 60 Hz. As may be observed from the graph170, the curve174illustrates significantly brighter display pixels54than the curve176at lower gray levels, which may cause FOS issues and negatively impact user experience. Accordingly, at lower brightness levels, display pixels54having an emission frequency of 400 Hz (e.g., or 500 Hz, 600 Hz, and so on) and a refresh rate of 50 Hz may have a FoS appearance that may be significantly dimmer than that of display pixels54having an emission frequency of 480 Hz and a refresh rate of 50 Hz. This brightness differential may be mitigated or eliminated by applying different a first driving scheme to the display pixels54having a 50 Hz refresh rate and a second driving scheme to the display pixels54having a 50 Hz refresh rate.

In some embodiments, an electronic display12having two different refresh rates may share a common OC LUT. For example, the electronic display12may have a refresh rate of 50 Hz at one time, but the refresh rate may be adjusted in settings to have a 60 Hz refresh rate at another time. In some embodiments, the electronic display12may share the same OC LUT under both refresh rate conditions. By sharing the same OC LUT, the electronic display12having a refresh rate of 60 Hz may receive the same gray level and voltage as the electronic display12having a refresh rate of 50 Hz.FIG.10includes a diagram180illustrating the charging of a display pixel with a 60 Hz refresh rate and the charging of a display pixel with a 50 Hz refresh rate when the display pixels shares an OC LUT under both the 50 Hz refresh rate and the 60 Hz refresh rate conditions.FIG.10includes a diagram182illustrating the charging of a display pixel54of the electronic display12with a 60 Hz refresh rate and the charging of a display pixel54of the electronic display12with a 50 Hz refresh rate when the electronic device has separate OC LUTs for the separate refresh rate conditions, according to an embodiment of the present disclosure. As previously discussed, and as may be observed from the diagram180, the pulse width of the 50 Hz pulse126is wider than the pulse width of the 60 Hz pulse121. Consequently, the display pixels54under the 50 Hz refresh rate condition have a longer period of time in which to charge than under the 60 Hz refresh rate condition, and thus the voltage152of the 50 Hz pulse126is greater than the voltage150of the 60 Hz pulse121. Such a voltage differential associated with the 50 Hz pulse126and the 60 Hz pulse121may cause a noticeable brightness differential between the electronic display12under the respective conditions, which may cause noticeable FOS differences between images displayed under the 50 Hz refresh rate condition and the 60 Hz refresh rate condition, leading to negatively impacted user experience.

To eliminate or mitigate the brightness and/or color differential due to the difference in pulse widths between the 50 Hz pulse126and the 60 Hz pulse121, a time constant of a resistor-capacitor (RC) circuit of the display pixels54may be adjusted.FIG.11is a flowchart of a method200for adjusting the time constant of one or more of the display pixels54to reduce or eliminate a brightness differential between at least two of the display pixels54, in accordance with embodiments of the present disclosure. In process block202, pixel circuitry or processing circuitry (e.g., the processor core complex 18) may receive input image data. In process block204, the pixel circuitry or the processing circuitry may adjust a time constant of one or more of the display pixels54to reduce or increase the brightness and/or color of the one or more of the display pixels54. The pixel circuitry or the processing circuitry may adjust the time constant by providing different gray levels to the pixels having a 50 Hz refresh rate and the pixels having a 60 Hz refresh rate. To provide different gray levels, multiple OC LUTs may be used, such that the 50 Hz refresh rate pixels correspond to a first OC LUT (which may provide a first gray level adjustment) and the 60 Hz refresh rate pixels correspond to a second OC LUT (which may provide a second gray level adjustment). By using multiple OC LUTs, various driving currents or driving voltages may be used for each of the display pixels to adjust the time constant.

For example, the pixel circuitry or the processing circuitry may reduce the gray level values sent to the display pixels54having a 50 Hz refresh rate or may increase the gray level values sent to the display pixels54having a 60 Hz refresh rate. By reducing the gray level values of the display pixels54having a 50 Hz refresh rate, the voltage of the 50 Hz pulse126may charge slower, reducing the overall charge of the 50 Hz pulse126and thus reducing the brightness of the 50 Hz pulse126. Additionally or alternatively, by increasing the gray level values of the display pixels54having a 60 Hz refresh rate, the voltage of the 60 Hz pulse121may charge faster, increasing the overall charge of the 60 Hz pulse121, and thus increasing the brightness of the 60 Hz pulse121. By decreasing the overall charge associated with the 50 Hz pulse126and/or increasing the overall charge associated with the 60 Hz pulse121, the brightness and/or color differential between the electronic display12under the 50 Hz refresh rate condition and the 60 Hz refresh rate condition may be reduced or eliminated.

Returning toFIG.10, the diagram182illustrates the brightness differential between the 60 Hz pulse121and the 50 Hz pulse126after the time constant of the pixels having a 50 Hz refresh rate have been adjusted. As may be appreciated, the 50 Hz pixels and the 60 Hz pixels do not share a time constant in the diagram182. The gray levels (e.g., and thus the driving current and/or the driving voltage) of the pixels having a 50 Hz refresh rate are reduced to provide a voltage184to the pixels having a 50 Hz refresh rate that is closer to the voltage150of the pixels having a 60 Hz refresh rate. In this manner, adjusting (via different OC LUTs) the time constant of the display pixels54in an electronic display under different conditions (e.g., applying a first time constant to the display pixels54across the electronic display12under a 50 Hz refresh rate condition and applying a second time constant to the display pixels54across the electronic display12under a 60 Hz condition) may reduce a brightness differential between the display pixels54operating at varying refresh rates.

FIG.12includes an OC LUT250providing various pixel gamma (PGMA) voltages252and digital gamma (DGMA) codes254according to global display brightness (GDB) (e.g., display brightness value (DBV)) bands256A and256B (collectively, the GDB bands256). A PGMA voltage252and a DGMA code254may be provided to each red (R), green (G), and blue (B) value of a display pixel54for each GDB band256. The OC LUT250includes a list of voltages corresponding to RBG pixel color components and gamma values for each GDB band256. For example, voltage VR1is a voltage corresponding to a red pixel color component, VB1is a voltage corresponding to a blue pixel color component, and VG1is a voltage corresponding to a green pixel color component. Each of the voltages corresponding to the gamma levels GMA1-GMA10may represent voltages associated a gamma voltage ladder. The OC LUT250includes tap points corresponding to the RGB color components and gray level values (e.g., GL1-GL255). The tap points may represent areas on the gamma voltage ladder that may be tapped to output a given gamma voltage.

FIG.12also includes a plot260illustrating PGMA voltages252and DGMA codes254across eight GDB bands256. The OC LUT250may generate the DGMA codes254based on the PGMA voltages252and the GDB bands256and supply the DGMA codes254to the display pixels54. As previously discussed, in some embodiments, the display pixels54of the electronic display12may share an OC LUT such as the OC LUT250under multiple refresh rate conditions, such as sharing a single OC LUT when operating at a 50 Hz refresh rate and a 60 Hz refresh rate. However, as previously discussed, in some instances sharing one OC LUT between multiple refresh rate conditions may result in significant (e.g., noticeable to the human eye) brightness differential. Consequently, it may be beneficial in some instances for the electronic display12to utilize different OC LUTs for respective refresh rate conditions.

FIG.13is a flowchart of a method300for selecting a set of OC LUTs based on a determined refresh rate to reduce or eliminate a brightness differential between a display pixel54having a first refresh rate at a first time and a second display pixel54having a second refresh rate at a second time, in accordance with embodiments of the present disclosure. In process block302, pixel circuitry or processing circuitry (e.g., the processor core complex 18) may determine refresh rate of a display pixel54. The pixel circuitry or processing circuitry may determine whether the refresh rate is a divisor of a 480 Hz emission frequency (e.g., 60 Hz) or a non-divisor of a 480 Hz emission frequency (e.g., 50 Hz). In process block304, the pixel circuitry or processing circuitry may select a set of optical calibration LUTs based on the determined refresh rate.

FIG.14is a plot320illustrating conditions under which display pixels54having different refresh rates (e.g., having a first refresh rate at time N and a second refresh rate at time N+1) may share a common OC LUT and conditions under which display pixels54may utilize separate OC LUTs, according to embodiments of the present disclosure. The plot320may be similar to the plot260discussed with respect toFIG.12. The plot320may be divided into a section322and a section324. The section322may include GDB values and gray level values in which the determined refresh rates (e.g., a 60 Hz refresh rate and a 50 Hz refresh rate) exhibit a brightness differential below a threshold. The threshold may include brightness differential or color differential.

For example, it may be determined in a design stage that input image data in a second GDB band at gray level140G (e.g., in the section322) causes 50 Hz display pixels and 60 Hz display pixels to exhibit a brightness differential less than 1% or a color differential less than 0.004, and consequently that the brightness of the 50 Hz display pixels and the 60 Hz display pixels are sufficiently similar in brightness or color to cause no FoS issues, and thus the display pixels54may operate off of the same OC LUT (e.g., the OC LUT250) under 50 Hz refresh rates conditions and 60 Hz refresh rate conditions. That is, the display pixels54may receive the same DGMA codes254based on the PGMA voltages252and the GDB bands256under 50 Hz refresh rate conditions and 60 Hz refresh rate conditions.

However, in another example, it may be determined in a design stage that input image data in an eight GDB band at gray level18G (e.g., in the section324) causes display pixels54with a 50 Hz refresh rate and display pixels54with a 60 Hz refresh rate to exhibit a brightness differential greater than 1% or a color differential greater than 0.004, and consequently that the brightness of the 50 Hz display pixels and the 60 Hz display pixels are sufficiently different in brightness or color to cause FoS issues that may affect user experience. Consequently, under such conditions, the 50 Hz display pixels may receive GDB band and gray level relationships from a first OC LUT and the 60 Hz display pixels may receive GDB band and gray level relationships from a second OC LUT. That is, the 50 Hz display pixels and the 60 Hz display pixels may receive the different DGMA codes254based on the PGMA voltages252and the GDB bands256. It should be noted that, while two OC LUTs are discussed, in some embodiments there may be a single OC LUT calibrated for a first refresh rate (e.g., 60 Hz) that may be adjusted for a second refresh rate (e.g., 50 Hz) by applying a unity gain to the OC LUT.

FIG.15is a block diagram illustrating the physical topology of the processes discussed above, according to embodiments of the present disclosure. The diagram350includes input image data352, and a processor354(e.g., the processor core complex 18) configured to perform content (e.g., image) processing and send refresh rate info356to the display12. In the display12, LUT selection circuitry358may select an LUT based on a refresh rate360determined via the refresh rate info356. For example, the LUT selection circuitry358may select one or more OC LUTs based on the refresh rate including a 50 Hz refresh rate and may select an additional one or more OC LUTs based on the refresh rate including a 60 Hz refresh rate. Gamma correction block362may receive the OC LUTs from the LUT selection circuitry358and choose which OC LUT to use based on GDB and gray level conditions as discussed with respect toFIG.14. In electrical compensation circuitry364pixel driving current may be adjusted according to the OC LUT used and converted to a voltage code. The voltage code may be delivered to the display panel pixel366to cause the pixel driving circuitry of the display panel pixel366to generate the adjusted pixel driving current. In this manner, the diagram350may enable selection of an OC LUT based on refresh rate, which may be used to reduce or mitigate brightness differential between multiple display pixels54.