Electro-optical device with connecting conductive film provided opposite to an end of an interlayer conductive film with insulating sidewall, the conductive film electrically connecting a pixel electrode to a lower electrode and method for making the same

An electrooptic device includes: a plurality of data lines and a plurality of scanning lines that intersect on a substrate; a pixel electrode provided for each of pixels corresponding to the intersection of the data lines and the scanning lines; a first conductive layer provided for each pixel and a second conductive layer provided above the first conductive layer and electrically insulated from the first conductive layer; a third conductive layer provided above the second conductive layer and electrically insulated from the second conductive layer; an insulating side wall provided at an end of the second conductive layer and extending along the thickness of the second conductive layer; and a connecting conductive film disposed opposite to the end with the side wall in between and extending along the thickness to electrically connect the first conductive layer with the third conductive layer.

BACKGROUND

1. Technical Field

The present invention relates to a technical field of an electrooptic device such as a liquid crystal device, a method for manufacturing the same, and a structure for electrically connecting conductive parts such as wires or electrodes of a semiconductor device.

2. Related Art

Liquid crystal devices, examples of this type of electrooptic device, often have a holding capacitor in parallel with a liquid-crystal capacitor to prevent the leakage of image signals held in a pixel section. For example, JP-A-2001-290171 (Patent Document 1) discloses a method for manufacturing the holding capacitor. By the method disclosed in Patent Document 1, the distance between the edge of the contact hole for contact with the wire above the upper electrode and the upper electrode of the holding capacitor is determined by two kinds of mask patterns, thus providing electrical insulation, the contact hole being connected to the lower electrode of the holding capacitor.

However, the electrical connection between the lower electrode of the holding capacitor and the wire above the upper electrode via the contact hole using the two kinds of masks, as in the technique of Patent Document 1, has the technical problem of difficulty in expanding the open area of the pixel. More specifically, to form a contact hole in a region where non-optical-transmitting elements that block light that is to pass through the pixel, such as wires, light-shielding films, or semiconductor devices, are formed, it is necessary to design the contact hole while ensuring a margin in consideration with the registration of the two kinds of mask so as to partly remove the insulating layer where the contact hole is to be formed. This increases the proportion of the unopen area of the pixel by an amount corresponding to the margin, posing the problem of difficulty in increasing the display quality due to the high percentage of the unopen area of the pixel.

Furthermore, this arrangement has the problem encountered on designing that the unuseful area of the semiconductor device is increased due to the contact hole which is formed to electrically connect the conductive parts on different layers, such as wires, so that it becomes difficult to minimize the device.

SUMMARY

An advantage of some aspects of the invention is to provide an electrooptic device with a high open area ratio and capable of high-quality image display, a method for the same, and a conductive-layer connection structure that allows miniaturization of devices such as semiconductor devices.

According to a first aspect of invention there is provided an electrooptic device comprising: a plurality of data lines and a plurality of scanning lines that intersect on a substrate; pixel electrode provided for each of pixels corresponding to the intersection of the data lines and the scanning lines; first conductive layer provided for each pixel and a second conductive layer provided above the first conductive layer and electrically insulated from the first conductive layer; a third conductive layer provided above the second conductive layer and electrically insulated from the second conductive layer; an insulating side wall provided at an end of the second conductive layer and extending along the thickness of the second conductive layer; and a connecting conductive film disposed opposite to the end with the side wall in between and extending along the thickness to electrically connect the first conductive layer with the third conductive layer.

In this case, the electrooptic device is constructed such that the second conductive layer is provided above the first conductive layer. The second conductive layer and the first conductive layer may comprise electrodes or wires provided for each pixel or across a plurality of pixels on different layers on the substrate. The electrooptic device may have another layer for insulating the conductive layers between the first and second conductive layers.

The side wall is provided at an end of the second conductive layer to electrically insulate the second conductive layer from, the connecting conductive film. The “end” here includes a new rim formed by removing part of the second conductive layer from the outline of the second conductive layer, as seen from the top. The side wall is formed such that an insulating film having a flat portion extending on the region of the pixel where the second conductive layer is removed and a portion extending along the thickness of the second conductive layer is formed and then the flat portion is removed by anisotropic etching so that the portion extending along the thickness of the second conductive layer remains.

The connecting conductive film is disposed opposite to the end of the second conductive layer with the side wall in between, and extends along the thickness of the second conductive layer. More specifically, the connecting conductive film is formed such that a conductive film is Formed so as to extend from the exposed surface of the first conductive layer along the surface of the side wall, the exposed surface being exposed such that the insulating film of the side wall is partially removed and then it is patterned into a specified shape.

The third conductive layer is electrically connected to the first conductive layer via the connecting conductive film. The third conductive layer may be any conductor provided that it is disposed above the first conductive layer and electrically connected to the first conductive layer according to the design and structure of the electrooptic device.

In this case, the connecting conductive film can electrically connect the first conductive layer and the third conductive layer together while maintaining the electrical insulation between the second conductive layer and the first conductive layer without forming a contact hole in the second conductive layer above the first conductive layer and the layer above the second conductive layer by using a mask.

In this specification, the electrical connection between the first conductive layer and the third conductive layer via the connecting conductive film provided opposite to the second conductive layer with the side wall in between without a contact hole formed using a mask is referred to as “selfalignment contact”.

The use of the selfalignment contact in place of the contact hole can reduce the areas of the first conductive layer and the third conductive layer, which are needed to increase the margin for the contact hole, allowing a decrease in the unopen area between the open areas of the pixels. More specifically, the width of the side wall can be reduced within a range that the connecting conductive film and the second conductive layer can be insulated, thereby reducing the unopen area of the pixel. This allows the open area to be increased correspondingly.

Here, the “open area” is the area of a pixel through which light passes, for example, an area for a pixel electrode in which the gray level of the light that has passed through the liquid crystal can be varied with changes in transmittance, in other words, an area where the light concentrated in the pixel is not cut off by the light-shielding film or the semiconductor device. The “unopen area” indicates an area through which the light for display does not pass, for example, the area of the pixel where untransparent wires or electrodes are disposed.

Accordingly, with this arrangement, an open area ratio which is the proportion of the open area of a pixel can be increased, so that display quality of electrooptic devices can be improved. Particularly, when the pixel pitch is decreased to meet the demand for higher display quality, it becomes more difficult to decrease the area of the unopen area by microfabricating wires or electrodes, so that the method of electrical connection by the selfalignment contact offers significant advantages in increasing the open area ratio.

In addition, the arrangement can reduce the unevenness of the multilayer structure on the substrate due to the contact holes of the substrate by the selfalignment contact in place of the contact holes. This prevents the display quality of the electrooptic device such as a liquid crystal device from decreasing because of the unevenness of the substrate that decreases the flatness of the pixel electrode formed on the first conductive layer and the second conductive layer.

Moreover, with the electrooptic device, the number of contact holes to be formed on the substrate can be remarkably decreased by the selfalignment contact in place of the contact holes, so that the yield of manufacturing electrooptic devices can be improved. More specifically, this arrangement can prevent the failure of the contact holes due to accumulation of minute foreign matter, thus decreasing defects such as poor contact.

Thus, the arrangement can improve display quality and manufacturing yield, so that an electrooptic device excellent both in quality and cost can be provided.

In this case, the end may include a portion facing an inner wall of a notch of the second conductive film from which the first conductive film is exposed.

With this arrangement, the notch is formed in such a way that the second conductive layer is partly removed by a known etching method such as anisotropic etching so that the end adjacent to the connecting conductive film is open as viewed from the top. The notch95has a portion that faces the inner wall of the notch. The side wail covers the portion that faces the inner wall, thereby electrically insulating the connecting conductive film and the second conductive layer from each other.

Thus, even if part of the second conductive layer is removed so as to increase the contact portion where the connecting conductive film and the first conductive layer are electrically connected, the side wall can reliably insulate the connecting conductive film and the second conductive layer from each other. Moreover, the increase in the contact area of the first conductive layer and the connecting conductive film reduces the contact resistance between the connecting conductive film and the first conductive layer.

In this case, the potential of the second conductive layer may be maintained constant; the first conductive layer may be electrically connected to the pixel electrodes via the third conductive layer and the connecting conductive film; and the second conductive layer and the first conductive layer may configure a storage capacitor together with a dielectric film interposed between the second conductive layer and the first conductive layer

With this arrangement, in operation, pixel scanning signals are supplied via the scanning lines and image signals are supplied to the pixels via data lines and switching devices such as thin-film transistors, and the image signals are written to the pixel electrodes and the storage capacitors. This allows specified kinds of operation such as active matrix driving for multiple pixels. In this case, the presence of the storage capacitor improves the potential holding characteristic of the pixel electrode and the display characteristics such as contrast and flicker.

This arrangement can reduce the thickness of the side wall in a range that the insulation between the connecting conductive film and the second conductive layer is maintained. This allows an increase in the area of the second conductive layer toward the side wall by the amount of the decrease in the thickness of the side wall, thus allowing an increase in the overlapping area of the first conductive layer and the second conductive layer, as viewed from the top. This allows an increase in the storage capacitor configured by the first conductive layer, the second conductive layer, and the dielectric film. This further enhances the potential holding characteristic by the storage capacitor, thus allowing a further improvement in display characteristic such as contrast and flickering.

In this case, the first conductive layer may be a polysilicon film; and the conductivity of the second conductive layer may be higher than that of the polysilicon film.

This arrangement can reduce an increase in electric resistance which increases with the area of the second conductive layer appropriately even if the second conductive layer extends across multiple pixels, thus preventing a decrease in display quality due to the electric resistance at the driving, or more specifically, preventing a decrease in responsibility in displaying images by the electrooptic device.

The electrooptic device may further include: a plurality of thin-film transistors whose sources are individually electrically connected to the data lines, and whose gates are individually electrically connected to the scanning lines. Of the plurality of thin-film transistors, a pair of first and second adjacent thin-film transistors arranged in the direction in which the data lines extend may be arranged such that the sources and the drains are in mirror symmetry in the direction in which the data lines extend. A contact hole that electrically connects the source of the first thin-film transistor to the data line and a contact hole that electrically connects the source of the second thin-film transistor to the data line may be the same.

In this case, the plurality of thin-film transistors are provided for the pixels respectively, and function as switching devices for switching the conduction between the data lines and the first conductive layers for supplying image signals to the pixel electrodes.

The scanning line, the data line, the second conductive layer, the first conductive layer, and the thin-film transistor are disposed on the substrate and in the unopen area surrounding the open area of each pixel corresponding to the pixel electrode. That is, the scanning line, the data line, the second conductive layer, the first conductive layer, and the thin-film transistor are disposed not in the open area of each pixel but in the unopen area so as not to be an obstacle to display. Particularly, a pair of the thin-film transistors is disposed such that the source and the drain are disposed in rows in mirror symmetry (for example, in the Y-direction) in the pixel region including multiple pixels in matrix form. A pair of the thin-film transistors next to each other in the direction of row (for example, in the Y-direction) is disposed in mirror symmetry in the direction of row.

Accordingly, this arrangement allows shared use of a contact hole that electrically connects the source of the first thin-film transistor of a pair of thin-film transistors arranged in mirror symmetry to the data line and a contact hole that electrically connects the source of the second thin-film transistor to the data line. Here the “contact hole” indicates a hole that passes through the interlayer insulating film on the thin-film transistor along the thickness thereof. For example, the contact hole may be in contact with the sources of the thin-film transistor either with a structure in which the data line is put in the hole (that is, the contact hole), or with a structure in which a conductive material is embedded in the hole, one end of which is in contact with the conductive layer of the data line and the other end is in contact with the source.

This arrangement can remarkably reduce the number of contact holes in comparison with a case where the data line and the source are Individually electrically connected pixel by pixel, thus enhancing the manufacturing yield of electrooptic devices. Moreover, this arrangement can reduce the proportion of the unopen area of the pixel in the direction of the scanning line owing to the decrease in the number of the contact holes, thereby increasing the an open area ratio.

This arrangement can increase display quality while achieving miniaturization and high definition of the device owing to the small pitch of pixels.

According to a second aspect of the invention, there is provided a method for manufacturing an electrooptic device, the method comprising: forming a first conductive layer provided for each of pixels corresponding to the intersection of a plurality of data lines and a plurality of scanning lines on a substrate; forming a second conductive layer insulated from the first conductive layer above the first conductive layer; forming an insulating side wall at an end of the second conductive layer, the side wall extending along the thickness of the second conductive layer; forming a connecting conductive film extending along the thickness opposite to the end with the side wall in between; and forming a third conductive layer above the second conductive layer, the third conductive layer being electrically connected to the first conductive layer via the connecting conductive film.

By the method for manufacturing an electrooptic device, high-display-quality electrooptic devices can be manufactured and the manufacturing yield can be enhanced, so that electrooptic devices excellent both in quality and cost can be manufactured.

According to a third aspect of the invention, there is provided a conductive-layer connection structure, comprising: a first conductive layer and a second conductive layer electrically insulated from each other on a substrate; an insulating side wall provided at an end of the second conductive layer and extending along the thickness of the second conductive layer; a connecting conductive film disposed opposite to the end with the side wall in between and extending along the thickness; and a third conductive layer provided above the second conductive layer and electrically connected to the first conductive layer via the connecting conductive film.

With the connection structure, the interval between the connecting conductive film and the second conductive layer can be reduced by decreasing the thickness of the side wall, as described above for the electrooptic device, so that the connection structure can be reduced in size as compared with the structure having a contact hole.

Accordingly, application of the connection structure to various electrooptic devices such as semiconductor devices can reduce the size of the electrooptic devices.

The operation and other advantages of the invention will be described in the following embodiment.

DESCRIPTION OF EXEMPLARY EMBODIMENTS

An electrooptic device, a method for the same, and a conductive-layer connection structure according to an embodiment of the invention will be described with reference to the drawings.

1-1. Entire Structure of Electrooptic Device

Referring first toFIGS. 1 and 2, an electrooptic device according to an embodiment of the invention will be described.FIG. 1is a plan view of the electrooptic device including a TFT array substrate and components thereon, viewed from the opposing substrate;FIG. 2is a cross-sectional view taken along line II-II ofFIG. 1. The embodiment takes a TFT active-matrix-driving liquid crystal device having a drive circuit built-in by way of example.

Referring toFIGS. 1 and 2, a liquid crystal device1has a TFT array substrate10and an opposing substrate20opposed to each other. A liquid crystal layer50is sealed in between the TFT array substrate10and the opposing substrate20. The TFT array substrate10and the opposing substrate20are bonded to each other with a sealant52disposed In a sealing region around an image display region10aor a pixel region having a plurality of pixel sections.

The sealant52is composed of, for example, ultraviolet cure resin or thermosetting resin for bonding the substrates together. The sealant52is applied onto the TFT array substrate10in the manufacturing process and then hardened under ultraviolet irradiation or heat. The sealant52contains scattered gap members, such as glass fibers or glass beads, for providing a specified interval (intersubstrate gap) between the TFT array substrate10and the opposing substrate20. Accordingly, the electrooptic device according to the embodiment is compact and suitable or enlarged display as the light valve of a projector.

A frame light-shielding film53that defines the frame of the image display region10ais provided to the opposing substrate20in parallel with the inside of the sealing region having the sealant52. However, part or all of the frame light-shielding film53may be provided to the TFT array substrate10as a built-in light-shielding film.

There is a peripheral region around the image display region10a.In other words, particularly in this embodiment, the region apart from the frame light-shielding film53with respect to the center of the TFT array substrate10is defined as a peripheral region.

Of the peripheral region, the region outside the sealing region having the sealant52has a data-line drive circuit101and an external-circuit connecting terminal102along a first side of the TFT array substrate10. Scanning-line drive circuits104are disposed along the two sides adjacent to the first side in such a manner as to be covered with the frame light-shielding film53. To connect the two scanning-line drive circuits104on both sides of the image display region10a,a plurality of wires105is disposed along the remaining side of the TFT array substrate10in such a manner as to be covered with the frame light-shielding film53.

There are vertically conducting materials106for conducting the substrates at the four corners of the opposing substrate20. On the other hand, the TFT array substrate10has vertically conducting terminals at the portions corresponding to the corners. This allows electrical conduction between the TFT array substrate10and the opposing substrate20.

Referring toFIG. 2, the TFT array substrate10has thereon TFT-s for switching pixels, scanning lines, data lines, and pixel electrodes9a.An alignment layer is formed on the pixel electrodes9a.On the other hand, the opposing substrate20has thereon opposing electrodes21, a grid or stripe light-shielding film23, and also an uppermost alignment layer. The liquid crystal layer50is made of one nematic liquid crystal or a mixture of several kinds of nematic liquid crystal, and is aligned in a specified orientation between the pair of alignment layers.

The TFT array substrate10is a transparent substrate such as a quartz substrate, a glass substrate, or a silicon substrate. The opposing substrate20is also a transparent substrate as is the TFT array substrate10.

The TFT array substrate10has the pixel electrodes9athereon, on which the alignment layer subjected to a specified alignment process such as rubbing is provided. For example, the pixel electrode9ais made of a transparent conductive film such as an indium tin oxide (ITO) film, while the alignment layer is made of an organic film such as a polyimide film.

The opposing substrate20has opposing electrodes21over the entire surface, under which an alignment layer subjected to a specified alignment process such as rubbing is provided. The opposing electrode21is made of a transparent conductive film such as an ITO film, while the alignment layer is made of an organic film such as a polyimide film.

The opposing substrate20may have a grid or stripe light-shielding film. This structure more reliably prevents the light from the TFT array substrate10from entering a channel region1a′ or the periphery thereof together with the upper light-shielding film provided as an upper capacitor electrode300.

The liquid crystal layer50is formed between the TFT array substrate10and the opposing substrate20with such a structure that the pixel electrode9aand the opposing electrode21are opposed. The liquid crystal layer50is aligned in a specified orientation by the alignment layer with no electric field applied from the pixel electrode9a.

In addition to the drive circuits including the data-line drive circuit101and the scanning-line drive circuit104, the TFT array substrate10shown inFIGS. 1 and 2may have thereon a sampling circuit for sampling the image signals on image signal lines and supplying it to the data lines; a precharge circuit for supplying precharge signals with a predetermined voltage level to the data lines ahead of the image signals; and an inspection circuit for checking the quality and defect of the electrooptic device during manufacture or at shipment.

1-2. Electrical Connection of Pixel Section

Referring then toFIG. 3, the electrical connection of the pixel section of the liquid crystal device1will be specifically described.FIG. 3shows an equivalent circuit of various elements and wires of the pixels in matrix form on the image display region of the liquid crystal device1.

Referring toFIG. 3, the pixels in matrix form on the image display region of the liquid crystal device1each have the pixel electrode9aand a TFT30. The TFT30is electrically connected to the pixel electrode9aand controls the switching of the pixel electrode9aat the activation of the liquid crystal device1. A data line6a,to which an image signal is supplied, is electrically connected to the source of the TFT30. Image signals S1to Sn may be supplied to the data line6aline-sequentially or, alternatively, may be supplied to the adjacent data lines6agroup by group.

A scanning line3ais electrically connected to the gate of the TFT30. The liquid crystal device1applies pulsated scanning signals G1to Gm to the scanning line3ain that order an a specified timing. The pixel electrode9ais electrically connected to the drain of the TFT30, to which the image signals S1to Sn supplied from the data line6aare written at a specified timing by the closing of the switch of the TFT30, which is a switching element, for a fixed period. The specified-level image signals S1to Sn written to the liquid crystal as an example of an electrooptic material via the pixel electrode9aare held between the pixel electrode9aand the opposing electrode on the opposing substrate.

The liquid crystal modulates light to allow gray-scale display by changing in orientation or order of the molecule sets depending on the level of the voltage applied. In a normally white mode, the light transmittance is decreased with the voltage applied on a pixel basis; in a normally black mode, the light transmittance is increased with the voltage applied on a pixel basis. Consequently, the electrooptic device emits light with a contrast according to the image signal. To prevent the leakage of the held image signals, there is a storage capacitor70in parallel with the liquid-crystal capacitor formed between the pixel electrode9aand the opposing electrode. This arrangement improves the potential holding characteristic of the pixel electrode9aand the display characteristics such as contrast and flicker.

1-3. Concrete Structure of Pixel Section

A concrete structure of the pixel section will be described with reference toFIGS. 4 to 8.FIG. 4is a plan view of multiple adjacent pixels on the TFT array substrate having data lines, scanning lines, and pixel electrodes;FIG. 5is a cross-sectional view taken along line V-V ofFIG. 4; andFIG. 6is a cross-sectional view taken along line VI-VI ofFIG. 4. InFIGS. 5 and 6, the scale differs from one layer to another and from one member to another for the purpose of recognition on the drawings, and the part above the pixel electrode9ais not shown for the convenience of description.

InFIGS. 4 and 5, a plurality of transparent pixel electrodes9a(outlined by a dotted line9a′) is disposed in matrix form in the X-direction and Y-direction on the TFT array substrate10of the liquid crystal device1. The data lines6aand the scanning lines3aare provided along the boundaries of the pixel electrodes9a.

The scanning line3ais opposed to a channel region1a′ of a semiconductor layer1a,indicated by oblique lines inFIG. 4. The TFTs30for switching Pixels are disposed at the intersections of the scanning lines3aand the data lines6a.

The data line6ais formed on a second interlayer insulating film42having a flat top surface, shown inFIG. 5, and is electrically connected to a high-density source region1dof the TFT30of the semiconductor layer1avia a contact hole81. The data line6aand the interior of the contact hole81is composed of, for example, an aluminum containing material containing aluminum, silicon, and copper or aluminum and copper, an aluminum simple substance, or a multilayer of aluminum and titanium nitride. The data line6aalso has the function of shading the TFT30.

A lower capacitor electrode71and the upper capacitor electrode300are opposed with a dielectric film75in between. The lower capacitor electrode71is a pixel-potential-side capacitor electrode connected to a high-density drain region1eof the TFT30and the pixel electrode9a.The upper capacitor electrode300extends from the image display region10ahaving the pixel electrode9ato the periphery thereof, and is electrically connected to a constant potential source. The upper capacitor electrode300is a fixed-potential-side capacitor electrode whose potential is maintained at a fixed potential.

The upper capacitor electrode300contains, for example, metal or alloy, and is disposed on the TFT30, so that it functions as an upper light-shielding film (built-in light-shielding film) for shading the TFT30. The upper capacitor electrode300is made of a metal single material, an alloy, a metal silicide, a polysilicide, or a multilayer thereof containing at least one of high melting metals such as titanium, chrome, tungsten, tantalum, molybdenum, and palladium The upper capacitor electrode300may contain another metal such as aluminum or silver.

The lower capacitor electrode71is made of a conductive polysilicon film, and the functions of a pixel-potential-side capacitor electrode and a light-absorbing or light-shielding film disposed between the upper capacitor electrode300and the TFT30serving as an upper light-shielding film, and the function of connecting the pixel electrode9aand the high-density drain region1eof the TFT30.

Accordingly, in this embodiment, the conductivity of the upper capacitor electrode300is higher than that of the lower capacitor electrode71made of a polysilicon film. The upper capacitor electrode300and the lower capacitor electrode71can reduce an increase in electric resistance which increases with the area of the upper capacitor electrode300appropriately even If the upper capacitor electrode300extends across multiple pixels, offering the advantage of preventing a decrease in display quality due to the electric resistance at the driving of the liquid crystal device1, or more specifically, preventing a decrease in responsibility in displaying Images by the liquid crystal device1. This advantage is not limited to the case where the upper capacitor electrode300extends across adjacent pixels along the Y-direction, as in this embodiment, but is remarkable when the upper capacitor electrode300is formed across multiple pixels in a large area of the image display region10a.

The upper capacitor electrode300may have a multilayer structure in which a first layer made of, for example, a conductive polysilicon film and a second layer made of a metal silicide film or the like containing high melting metal are stacked. The lower capacitor electrode71may be made of a single layer or a multilayer containing metal or alloy, as is the upper capacitor electrode300. The dielectric layer75is made of a silicon oxide film such as a high-temperature oxide (HTO) film or a low-temperature oxide (LTO) film or a silicon nitride layer.

A grid lower light-shielding film11aprovided at the lower part of the TFT30with a foundation insulating film12in between shields the channel region1a′ of the TFT30and its periphery from the return light incident on the device from the TFT array substrate10. The lower light-shielding film11ais made of a metal single material, an alloy, a metal silicide, a polysilicide, or a multilayer thereof containing at least one of high melting metals such as titanium, chrome, tungsten, tantalum, molybdenum, and palladium, as is the upper capacitor electrode300.

The foundation insulating film12has the function of insulating the TFT30from the lower light-shielding film11a,and, since it is formed over the entire surface of the TFT array substrate10, it also has the function of preventing the roughness of the surface of the TFT array substrate10due to grinding and the degradation of the characteristics of the pixel-switching TFT30due to dirt remaining after cleaning. The pixel electrode9ais electrically connected to the high-density drain region1eof the semiconductor layer1avia the lower capacitor electrode71, a contact hole83, a connecting conductive film93, and a contact hole85. Part of the pixel electrode9aextends to the contact hole85. The pixel electrode9ais formed such that a conductive material such as an ITO is formed on the inner wall of the contact hole85passing through a third Interlayer insulating layer43.

FIG. 5shows a lightly doped drain (LDD) structure including the channel region1a′ of the semiconductor layer1a,which is formed by the electric field from the scanning line3awhich is used both as a gate electrode, a gate insulating layer2including two insulating layers2aand2bfor insulating the scanning line3aand the semiconductor layer1afrom each other, a low-density source region1b,a low-density drain region1c,a high-density source region1d,and the high-density drain region1e.The low-density source region1b,the low-density drain region1c,the high-density source region1d,and the high-density drain region1econstitute an impurity region of the semiconductor layer1a,and is provided on both sides of the channel region1a,in mirror symmetry. The TFT30can decrease off-current flowing in the low-density source region1band the low-density drain region1cwhile the TFT30is out of operation, and prevent a decrease in on-current flowing during the operation of the TFT30. Thus, the liquid crystal device1can display high-quality images during the operation.

A first interlayer insulating film41having a contact hole81connected to the high-density source region1dand the contact hole83connected to the high-density drain region1eis formed on the scanning line3a.The lower capacitor electrode71and the upper capacitor electrode300are formed on the air cleaner41, on which a second interlayer insulating film42having the contact hole81is formed. The third interlayer insulating film43having the contact hole85is formed so as to cover the entire surface of the second interlayer insulating film42and the connecting conductive film93from above the data line6a.The pixel electrode9aand the alignment layer (not shown) are formed on the upper surface of the third interlayer insulating film43.

Referring toFIGS. 4 and 6, the scanning line3a,the data line6a,the lower light-shielding film11a,and the TFT30are disposed on the TFT array substrate10and in the unopen area surrounding the open area of each pixel (the area of the pixel which the light for display passes through or is reflected) corresponding to the pixel electrode9a.That is, the scanning line3a,the data line6a,the lower light-shielding film11a,and the TFT30are disposed nor in the open area of each pixel but in the unopen area so as not to be an obstacle to display. Particularly, in this embodiment, a pair of the TFTs30is disposed such that the high-density source region1dand the high-density drain region1eare disposed in rows in mirror symmetry (in the Y-direction inFIG. 4). For example, assuming that the vertical direction is the direction of row (in the Y-direction inFIG. 4), a pair of the TFTs30is vertically reversed or vertically mirror reversed TFTs30. The plurality of TFTs30disposed in mirror symmetry shares the source of the ithTFT30(i) in the direction of row and the source of the (i+1)thTFT30(i+1).

The contact hole81electrically connects the source of the TFT30(i) and the source of the TFT30(i+1) to the data line6a.In other words, the TFT30(i) and the TFT30(i+1) are electrically connected to the data line6avia the common contact hole81.

The contact hole81may be in contact with the sources of the TFT30(i) and the TFT30(i+1) either with a structure in which the conductive layer of the data line6ais put in the contact hole81, or with a structure in which a conductive material is embedded in the contact hole81, one end of which is in contact with the conductive layer of the data line6aand the other end is in contact with the source of the TFT30(i) and the TFT30(i+1).

Accordingly, the high-density source regions id of both a pair of TFTs (the TFT30(i) and the TFT30(i+1) ofFIG. 6) can be electrically connected to the data line6aonly by the contact hole81.

The use of the contact hole81can remarkably reduce the number of contact holes in comparison with a case where the data line6aand the source are individually electrically connected pixel by pixel, thus enhancing the manufacturing yield of electrooptic devices.

Moreover, the use of the contact hole81can reduce the space as a margin for forming a contact hole in an unopen area since the number of contact holes which electrically connect the TFTs30and the data lines6atogether is decreased. This increases the proportion of the unopen area in the pixels in the X-direction in the drawing, thereby increasing an open area ratio.

Thus, the shared use of the contact hole81which electrically connects the TFT30and the data line6aby adjacent pixels allows an increase in display quality while achieving miniaturization and high definition of the device owing to the small pitch of pixels.

Referring now toFIGS. 7 and 8, the structure of the vicinity of the contact hole85of the nonpixel section will be specifically described.FIG. 7is an enlarged view of the cross section VII-VII ofFIG. 4; andFIG. 8is a perspective view of the partly cut-away portion of the upper capacitor electrode, as viewed from the cross section VIII-VIII ofFIG. 4.

InFIG. 7, the liquid crystal device1includes the upper capacitor electrode300and the lower capacitor electrode71formed in different layers on the TFT array substrate10and insulated by the dielectric film75, a side wall91, a connecting conductive film93, and the contact hole85,

The side wall91is made of an insulating film and disposed at an end300aof the upper capacitor electrode300and extends along the thickness of the upper capacitor electrode300. The end300aof the upper capacitor electrode300includes a new rim formed by removing part of the upper capacitor electrode300from the outline of the upper capacitor electrode300, as seen from the top.

The side wall91is formed such that an insulating film having a flat portion extending on the region of the pixel where the upper capacitor electrode300is removed and a portion extending along the thickness of the upper capacitor electrode300is formed and then the flat portion is removed by anisotropic etching so that the portion extending along the thickness of the upper capacitor electrode300remains.

The connecting conductive film93is disposed opposite to the end300awith the side wall91in between, and extends along the thickness of the upper capacitor electrode300. The connecting conductive film93extends along the surface of the side wall91onto the second interlayer insulating film42from the exposed surface of the lower capacitor electrode71which is exposed such that the insulating film of the side wall91is partially removed. The connecting conductive film93is formed in such a manner that a conductive layer is formed so as to extend along the surface of the side wall91onto the second interlayer insulating film42from the lower capacitor electrode71and then it is patterned into a specified shape.

The part of the pixel electrode9awhich extends along the inner wall of the contact hole85is in contact with the connecting conductive film93extending on the second interlayer insulating film42. The upper capacitor electrode300, the lower capacitor electrode71, and the dielectric film75interposed therebetween configure the storage capacitor70, and the pixel electrode9aand the lower capacitor electrode71are electrically connected by the connecting conductive film93. Accordingly, in this embodiment, the storage capacitor70for displaying high-quality images can be formed while allowing image signals to be supplied to the pixel electrode9avia the TFT30. The embodiment takes an example in which the lower capacitor electrode71and the pixel electrode9aare electrically connected by the connecting conductive film93. Alternatively, the connecting conductive film93may connect the electrodes or wires formed on each pixel or across multiple pixels of different layers on the TFT array substrate10.

The connecting conductive film93electrically connects the lower capacitor electrode71and the upper capacitor electrode300together while maintaining the electrical insulation between the upper capacitor electrode300and the lower capacitor electrode71without via the contact hole which is formed in the upper capacitor electrode300above the dielectric film75and in the third interlayer insulating film43on the upper capacitor electrode300by using a mask.

The use of the connecting conductive film93can reduce the areas of the lower capacitor electrode71and the upper capacitor electrode300, which are needed to increase the margin for the contact hole, allowing a decrease in the unopen area between the open areas of the pixels More specifically, the width W2of the side wall91can be reduced within a range that the connecting conductive film93and the upper capacitor electrode300can be insulated. This reduces the width W1of the unopen area of the pixel according to the width W2of the side wall91, thereby increasing the open area of the pixel along the Y-direction ofFIG. 4. More specifically, the distance between the connecting conductive film93and the upper capacitor electrode300can be reduced from one eighth to one tenth in comparison with the known case in which the lower capacitor electrode71and the pixel electrode9aare directly connected via the contact hole formed in the third interlayer insulating film43.

Accordingly, the liquid crystal device1according to this embodiment shows an increased open area ratio, which is the proportion of the open area of a pixel, providing high-quality display. Particularly, when the pixel pitch is decreased to meet the demand for higher display quality, it becomes more difficult to decrease the area of the unopen area by microfabricating wires or electrodes, so that the use of the connecting conductive film93in place of the contact hole offers significant advantages in increasing the open area ratio.

Moreover, the liquid crystal device1according to this embodiment can be constructed such that the thickness of the side wall91is reduced in a range that the insulation between the connecting conductive film93and the TFT30is maintained. This allows an increase in the area of the upper capacitor electrode300from the end300atoward the side wall91by the amount of the decrease in the thickness of the side wall91, thus allowing an increase in he overlapping area of the upper capacitor electrode300and the lower capacitor electrode71, as viewed from the top. This allows an increase in the storage capacitor70configured by the upper capacitor electrode300, the lower capacitor electrode71, and the dielectric film75. This further enhances the potential holding characteristic by the storage capacitor, thus allowing a further improvement in display characteristic such as contrast and flickering.

In addition, the liquid crystal device1according to the embodiment can be constructed such that the unevenness of the multilayer structure on the TFT substrate due to the contact holes is decreased because the lower capacitor electrode71and the upper capacitor electrode300are electrically connected by the connecting conductive film93in place of the contact holes. This prevents the display quality of the liquid crystal device1from decreasing because of the unevenness that decreases the flatness of the pixel electrode9aformed on the upper capacitor electrode300and the lower capacitor electrode71.

Moreover, with the liquid crystal device1according to this embodiment, the number of the contact holes to be formed on the TFT array substrate10can be remarkably decreased because the lower capacitor electrode71and the pixel electrode9aare electrically connected by selfalignment contact using the connecting conductive film93.

More specifically, as shown inFIG. 4, the two pixels adjacent in the Y-direction have two contact holes83, two contact holes85, and one contact hole81. Thus, each pixel has two and half contact holes, so that the number of the contact holes on the TFT array substrate10can be reduced in comparison with electrical connection of the lower capacitor electrode71and the upper capacitor electrode300with the contact holes.

In addition, since the contact hole81is shared by two adjacent pixels, the number of contact holes on the TFT array substrate10can be remarkably decreased.

This arrangement can reduce defects such as poor contact caused by accumulation of minute foreign matter in the contact holes, thus enhancing the manufacturing yield of the liquid crystal device1.

Thus, the liquid crystal device1according to the embodiment shows an improved display quality and improved manufacturing yield, so that a liquid crystal device excellent both in quality and cost can be provided.

Referring toFIG. 8, the end300aof the upper capacitor electrode300faces inner walls96a,96b,and96cof the notch95of the upper capacitor electrode300which is partially cut away so that the lower capacitor electrode71is exposed.FIG. 8does not show the connecting conductive film93that covers the notch95, the side wall91, and the second interlayer insulating film42for the convenience of description.

The notch95is formed in such a way that the upper capacitor electrode300is partly removed by a known etching method such as anisotropic etching so that the end extending in the Y-direction is partly open in the X-direction, as viewed from the top. The notch95is defined by the three inner walls96a,96b,and96cthat are formed by cutting away the upper capacitor electrode300.

The side wall91extends along the inner walls91a,96b,and96cof the notch95of the upper capacitor electrode300. For example, the side wall91shown inFIG. 7is the inner wall96b.The side wall91electrically insulates the end300aof the upper capacitor electrode300and the connecting conductive film93from each other while exposing the surface of the lower capacitor electrode71which extends into the space surrounded by the inner walls91a,96b,and96cof the notch95.

Thus, with the liquid crystal device1, the contact resistance between the lower capacitor electrode71and the connecting conductive film93can be reduced by the wide electrical contact area of the connecting conductive film93and the lower capacitor electrode71, so that electrical insulation between the connecting conductive film93and the upper capacitor electrode300is maintained by the side wall91even if part of the upper capacitor electrode300is removed.

As described above, the arrangement of the liquid crystal device1according to this embodiment can increase the open area ratio of pixels even with a small pixel pitch and prevent a decrease in yield due to defects such as poor contact which may be generated at the forming of contact holes. This provides an electrooptic device such as a liquid crystal device capable of displaying high-quality images at low manufacturing cost. In addition, the arrangement can decrease the unevenness of the TFT array substrate10due to the presence of contact holes and enhance the storage capacitor, thus improving the display quality of electrooptic devices such as liquid crystal devices. Accordingly, the electrooptic device according to this embodiment offers a remarkable advantage of providing excellent quality and cost performance.

2. Method for Manufacturing Electrooptic Device

Referring toFIGS. 9A to 9CandFIGS. 10A to 10C, a method for manufacturing the above-described electrooptic device will be described.FIGS. 9A to 9CandFIGS. 10A to 10Care cross-sectional views of the electrooptic device, showing the principal manufacturing process of the method of this embodiment. The method will be described mainly about the process of forming an electrical connection between the pixel electrode9aand the lower capacitor electrode71via the connecting conductive film93.

Referring toFIG. 9A, the first interlayer insulating film41, the lower capacitor electrode71, the dielectric film75, an upper capacitor electrode300b,a second interlayer insulating film42a,and a resist film98are formed on the TFT array substrate10. The elements disposed under the lower capacitor electrode71inFIGS. 5 and 6have been formed before the lower capacitor electrode71is formed. The data line6aand the contact hole81are formed in parallel with or before or after the process of forming the connecting conductive film93.

Referring next toFIG. 9B, the portion of the second interlayer insulating film42awhich is not coated with the resist film98is etched to form the second interlayer insulating film42, thereby partially exposing the upper capacitor electrode300b.

Referring then toFIG. 9C, the portion of the upper capacitor electrode300bwhich is not coated by the second interlayer insulating film42is removed by anisotropic etching to form the upper capacitor electrode300, and then an insulating film91ais formed along the surface of the exposed dielectric film75, the end of the upper capacitor electrode300, and the end and surface of the second interlayer insulating film42.

Referring now toFIG. 10A, the side wall91is formed along the end300aof the upper capacitor electrode300by anisotropic etching of the insulating film91afrom thereabove. The portion of the insulating film91awhich extends vertically along the end300aof the upper capacitor electrode300is vertically thicker than the portion along the surface of the dielectric film75and the portion along the upper surface of the second interlayer insulating film42. Accordingly, even if the insulating film91ais uniformly subjected to the anisotropic etching, the portion of the insulating film91aserving as the side wall91remains.

Referring toFIG. 10B, a conductive film is formed along the upper surface of the second interlayer insulating film42, the surface of the side wall91, the part of the lower capacitor electrode71which is not covered with the dielectric film75, and the surface of the first Interlayer insulating film41and then the conductive film is patterned into a specified shape to form the connecting conductive film93. The connecting conductive film93is in contact with the lower capacitor electrode71and extends to the upper surface of the second interlayer insulating film42.

Then, after the third interlayer insulating film43is formed so as to cover the connecting conductive film93, the contact hole85is formed in the third interlayer insulating film43so as to expose the part of the connecting conductive film93extending over the upper surface of the second interlayer insulating film42to form the pixel electrode9aelectrically connected to the connecting conductive film93.

Thereafter, an alignment layer and a liquid crystal layer are formed on the pixel electrode9a,on which the opposing substrate20is disposed to form the liquid crystal device1.

In the method of manufacturing the electrooptic device according to this embodiment, the connecting conductive film93is formed so as to maintain electrical insulation with the upper capacitor electrode300using the side wall91without a contact hole. The use of the connecting conductive film93eliminates the need for the mask that is used in forming the contact holes. The selfalignment contact in which the pixel electrode9aand the lower capacitor electrode71are connected via the connecting conductive film93that is formed without using the mask because no contact hole is formed is easier than conventional electrical connection in which the conductive elements on and under the insulating layer are electrically connected via the contact holes.

Accordingly, as has been described above, high-display-quality electrooptic devices such as liquid crystal devices can be manufactured and the manufacturing yield can be enhanced, so that electrooptic devices excellent both in quality and cost can be manufactured.

3. Connection Structure of Conductive Layer

A connection structure of the conductive layer according to the embodiment will be described with reference toFIG. 11.FIG. 11is a cross-sectional view of the connection structure according to the embodiment, denoted by numeral400, showing an enlarged cross section of the semiconductor device ofFIG. 5. The connection structure according to this embodiment is applicable to any devices or substrates in which conductive elements such as wires and electrodes on and under an insulating layer are electrically connected.

Referring toFIG. 11, the connection structure400includes wiring layers230and271formed above a substrate210, a side wall291, a wiring layer271, a connecting wire293, and a wiring layer299.

The wiring layer271is formed on the substrate210with an insulating layer241in between, and projects partly from an insulating layer275formed on the wiring layer271to the right and left in the drawing.

The wiring layer230is formed on the wiring layer271with the insulating layer275formed on the wiring layer271in between. Thus, the wiring layers271and230are electrically insulated from each other by the insulating layer275.

The side wall291is made of an insulating film and disposed at an end230aof the wiring layer230and extends along the thickness of the wiring layer230. The connecting wire293is disposed on the opposite side of the side wall291with respect to the end230aof the wiring layer230, and extends along the thickness of the wiring layer230. Accordingly, the wiring layer230and the connecting wire293are located on both sides of the side wall291in the lateral direction of the drawing, so that the wiring layer230and the connecting wire293are insulated from each other by the side wall291.

The connecting wire293extends from the surface of the part of the connecting wiring layer271protecting from the insulating layer275in the lateral direction of the drawing through the surface of the side wall291to the surface of the insulating layer242formed on the wiring layer230. The wiring layer299is formed on an insulating layer243in such a manner as to be in contact with the part of the connecting wire293exposed from the insulating layer243.

Thus, the connecting wire293electrically connects the wiring layer299and the wiring layer271while being electrically insulated from the wiring layer230by the side wall291.

Here, the side wall291has only to insulate the connecting wire293and the wiring layer230from each other. Accordingly, the distance between the connecting wire293and the wiring layer230can be reduced in the lateral direction of the drawing by reducing the width W3of the side wall291within the confines of maintaining the insulation between the connecting wire293and the wiring layer230, so that the connection structure400can be reduced in size as compared with the case where the wiring layer299and the wiring layer271are electrically connected via the contact holes of the insulating layer243.

Consequently, the connection structure of the embodiment provides the remarkable advantage of reducing the size of the device with the size reduction of the connection structure400.

4. Electronic Equipment

Referring toFIG. 12, an application of the foregoing liquid crystal device to various electronic equipment will be described. Electronic equipment according to this embodiment is a projector that uses the liquid crystal device as a light valve.FIG. 12is a plan view of a projector1100that is an example of the electronic equipment including the liquid crystal device. As shown inFIG. 12, the projector1100has therein a lamp unit1102using a white light source such as a halogen lamp. The light emitted from the lamp unit1102is divided into the three primary colors of light by four mirrors116and two dichroic mirrors1108disposed in a light guide1104, and enters liquid crystal panels1110R,1110B, and1110G serving as light valves for the primary colors.

The structures of the liquid crystal panels1110R,1110B, and1110G are the same as that of the foregoing liquid crystal device, which are driven by the signals of the primary colors K, G, and B supplied from an image-signal processing circuit The lights modulated by the liquid crystal panels1110R,1110B, and1110G are incident on a dichroic prism1112from three directions. The dichroic prism1112refracts R and B lights at 90 degrees and allows G light to travel in a straight line. Accordingly, images of the respective colors are composed, so that a color image is projected onto a screen or the like through a projection lens1114.

Speaking of the display images through the liquid crystal panels1110R,1110B, and1110G, the display image through the liquid crystal panel1110G is laterally reversed from those by the liquid crystal panels1110R and1110B. The liquid crystal panels1110R,1110B, and1110G need no color filters because lights corresponding to the respective primary colors of light are incident thereon by the dichroic mirrors1108.

With the arrangement including the liquid crystal device according to this embodiment, various compact electronic equipment capable of high-quality display can be achieved such as projection display apparatus, mobile phones, electronic notepads, word processors, view-finder or monitor-direct-view video tape recorders, work stations, videophones, POS terminals, and touch panels.

The entire disclosure of Japanese Patent Application No. 2006-009583, filed Jan. 18, 2006 is expressly incorporated by reference herein.