Semiconductor device

A transistor which includes an electron transit layer and an electron supply layer which are stacked in a thickness direction of a substrate; an electron transit layer formed over the substrate in parallel to the electron transit layer and the electron supply layer; an anode electrode which forms a Schottky junction with the electron transit layer; and a cathode electrode which forms an ohmic junction with the electron transit layer are provided. The anode electrode is connected to a source of the transistor, and the cathode electrode is connected to a drain of the transistor.

FIELD

The embodiments discussed herein relate to a semiconductor device.

BACKGROUND

Conventionally, studies have been conducted on a high electron mobility transistor (HEMT) having an AlGaN layer and a GaN layer formed by crystal growth over a substrate, in which the GaN layer functions as an electron transit layer. The band gap of GaN is 3.4 eV, which is wider than the band gap of Si (1.1 eV) and the band gap of GaAs (1.4 eV). Accordingly, the GaN-based HEMT has high breakdown voltage, and is promising as a high breakdown voltage power device for automobiles or the like.

A body diode exists inevitably in an Si-based field effect transistor. The body diode is connected to a transistor to be in inversely parallel to the transistor, and functions as a free wheel diode in a full-bridge circuit method used for a high-power power supply. However, in the GaN-based HEMT, such a body diode does not exist inevitably. Accordingly, there has been proposed a structure in which a pn junction diode, which has a p-type layer and an n-type layer stacked in a thickness direction of the substrate, is connected to the GaN-based HEMT.

However, in the structure which has been proposed, a delay easily occurs in operation of the diode. Then, accompanying the delay, inverse electric current flows in the HEMT before the diode operates as the free wheel diode, and the power consumption increases. Further, when overvoltage is applied between the source and the drain of the HEMT due to the delay, the diode does not operate as a protective circuit.

SUMMARY

According to an aspect of the embodiments, a semiconductor device includes: a substrate; a transistor that comprises a first electron transit layer and an electron supply layer which are stacked in a thickness direction of the substrate; a second electron transit layer formed over the substrate in parallel to the first electron transit layer and the electron supply layer; an anode electrode that forms a Schottky junction with the second electron transit layer; and a cathode electrode that forms an ohmic junction with the second electron transit layer. The anode electrode is connected to a source of the transistor, and the cathode electrode is connected to a drain of the transistor.

DESCRIPTION OF EMBODIMENTS

Hereinafter, embodiments will be described specifically with reference to the attached drawings.

First Embodiment

First, a first embodiment will be described.FIG. 1Ais a cross-sectional view illustrating a structure of a semiconductor device according to the first embodiment.FIG. 1Bis a plan view illustrating a positional relation of electrodes in the first embodiment. Further,FIG. 2is a schematic diagram three-dimensionally illustrating the positional relation of electrodes. Note thatFIG. 1Aillustrates a cross section taken along a line I-I inFIG. 1B.

In the first embodiment, as illustrated inFIG. 1A, a buffer layer2, an electron transit layer3(second electron transit layer), an insulating layer4, an electron transit layer5(first electron transit layer), an electron supply layer6, a cap layer7, and an insulating layer8are formed in this order over a substrate1. The substrate1is an n-type Si substrate, for example. As the buffer layer2, for example, an AlN layer is formed, which has a thickness of 1 nm to 1000 nm, for example. As the electron transit layer3, for example, a GaN layer is formed, which has a thickness of 10 nm to 5000 nm, for example. As the insulating layer4, for example, an AlN layer is formed, which has a thickness of 10 nm to 5000 nm for example. As the electron transit layer5, for example, a GaN layer is formed, which has a thickness of 10 nm to 5000 nm, for example. As the electron supply layer6, for example, an AlO0.25Ga0.75N layer is formed, which has a thickness of 1 nm to 100 nm, for example. As the cap layer7, for example, an n-type GaN layer is formed, which has a thickness of 1 nm to 100 nm, for example. Si is doped to the cap layer7, for example. As the insulating layer8, for example, a silicon nitride layer is formed.

An opening10gfor a gate electrode is formed in the insulating layer8, and an opening10sfor a source electrode and an opening10dfor a drain electrode are formed in the insulating layer8and the cap layer7. Further, an opening9afor an anode electrode and an opening9kfor a cathode electrode are formed in the electron supply layer6, the electron transit layer5, and the insulating layer4. The opening9ais connected to the opening10s, and the opening9kis connected to the opening10d. Further, an insulating layer11which covers the electron supply layer6, the electron transit layer5, and the insulating layer4is formed on side faces of the opening9aand the opening9k. As the insulating layer11, for example, an AlN layer is formed. The opening10gis located closer to the opening10sside than the opening10d.

In a bottom portion of the opening9a, an anode electrode12ain Schottky contact with the electron transit layer3is formed. As the anode electrode12a, for example, a stacked body of a Ni film in contact with the electron transit layer3and a Au film located thereon is formed. Further, a source electrode13slocated on the anode electrode12aand in ohmic contact with the electron supply layer6is formed in the opening9aand the opening10s. As the source electrode13s, for example, a stacked body of a Ta film in contact with the anode electrode12aand the electron supply layer6, and an Al film located thereon is formed. Moreover, a cathode-drain electrode13din ohmic contact with the electron transit layer3and the electron supply layer6is formed in the opening9kand the opening10d. As the cathode-drain electrode13d, for example, a stacked body of a Ta film in contact with the electron transit layer3and the electron supply layer6, and an Al film located thereon is formed. In the opening10g, a gate electrode13gis formed. As the gate electrode13g, for example, a stacked body of a Ni film in contact with the cap layer7and a Au film located thereon is formed.

Then, a surface protection layer14which covers the gate electrode13g, the source electrode13s, and the cathode-drain electrode13dis formed over the insulating layer8. As the surface protection layer14, for example, a silicon nitride layer is formed. As illustrated inFIG. 1BandFIG. 2, the gate electrode13g, the source electrode13s, and the cathode-drain electrode13dare disposed in a comb shape. Then, the gate electrode13gis connected to a gate pad15g, the source electrode13sis connected to a source pad15s, and the cathode-drain electrode13dis connected to a drain pad15d. Further, in the surface protection layer14, openings which expose the gate pad15g, the source pad15s, and the drain pad15d, respectively, are formed.

In the first embodiment structured thus, a GaN-based HEMT exists, which includes the gate electrode13g, the source electrode13s, the cathode-drain electrode13d, the electron supply layer6, and the electron transit layer5. Further, a Schottky barrier diode also exists, which includes the anode electrode12a, the cathode-drain electrode13d, and the electron transit layer3, and is connected in inversely parallel to the HEMT. Then, when negative voltage is applied to the cathode-drain electrode13d, electrons move from the cathode-drain electrode13dto the anode electrode12avia the electron transit layer3, and electric current flows toward the cathode-drain electrode13dfrom the anode electrode12a. That is, the Schottky barrier diode functions as a free wheel diode. The cathode electrode of the Schottky barrier diode is integrated with the drain electrode of the HEMT, and the anode electrode is in direct contact with the source electrode. Therefore, the Schottky barrier diode operates before large electric current flows through the HEMT, which suppresses increase in power consumption. Further, when large positive voltage is applied to the cathode-drain electrode13d, electrons move from the anode electrode12ato the cathode-drain electrode13dvia the electron transit layer3, and electric current flows toward the anode electrode12afrom the cathode-drain electrode13d. That is, the Schottky barrier diode functions as a protective diode. Therefore, failure of the HEMT can be prevented.

Next, a method of manufacturing the semiconductor device according to the first embodiment will be described.FIG. 3AtoFIG. 3Eare cross-sectional views illustrating the method of manufacturing the semiconductor device according to the first embodiment in the order of steps.

First, as illustrated inFIG. 3A, the buffer layer2, the electron transit layer3, the insulating layer4, the electron transit layer5, the electron supply layer6, and the cap layer7are formed in this order over the substrate1by a metal organic chemical vapor deposition (MOCVD) method, for example.

Here, an MOCVD apparatus will be described.FIG. 4is a diagram illustrating a structure of an MOCVD apparatus. A high-frequency coil41is disposed around a reaction tube40made of quartz, and a carbon susceptor42that mounts a substrate101is disposed inside the reaction tube40. Two gas introduction tubes44and45are connected on an upstream end (end portion on the left side inFIG. 4) of the reaction tube40, through which a source gas of chemical compound is supplied. For example, an NH3gas is introduced as an N source gas from the gas introduction tube44, and an organic group III chemical compound raw material such as a trimethyl aluminum (TMA), trimethyl gallium (TMG), or the like is introduced as a source gas of group III element from the gas introduction tube45. Crystal growth is performed on the substrate101, and excess gasses are exhausted to a detoxifying tower from a gas exhaust tube46. Note that when the crystal growth by the MOCVD method is performed in a reduced pressure atmosphere, the gas exhaust tube46is connected to a vacuum pump, and an exhaust port of the vacuum pump is connected to the detoxifying tower.

Conditions for forming the Al0.25Ga0.75N layer as the electron supply layer6are set for example as:flow rate of trimethyl gallium (TMG): 0 to 50 sccm,flow rate of trimethyl aluminum (TMA): 0 to 50 sccm,flow rate of ammonium (NH3): 20 slm,pressure: 100 Torr, andtemperature: 1100° C.

After the cap layer7is formed, the insulating layer8is formed over the cap layer7. The insulating layer8is formed by a plasma CVD method, for example.

Next, as illustrated inFIG. 3B, the opening10g, the opening for a source electrode, and the opening for a drain electrode are formed in the insulating layer8. In formation of these openings, for example, selective etching using SF6gas is performed with a resist pattern being a mask. After these openings are formed, the openings10sand10dare formed in the cap layer7. In formation of the openings10sand10d, for example, selective etching using a Cl2gas is performed with a resist pattern being a mask. After the openings10sand10dare formed, openings9aand9kare formed. In formation of the openings9aand9k, for example, selective etching using the Cl2gas is performed with a resist pattern being a mask.

Thereafter, as illustrated inFIG. 3C, the insulating layer11is formed on side faces of the openings9aand9k, the gate electrode13gis formed in the opening10g, and the anode electrode12ais formed in a bottom part of the opening9a. The insulating layer11is formed before the anode electrode12ais formed. Regarding the gate electrode13gand the anode electrode12a, one of them may be formed first, or the both of them may be formed simultaneously. The gate electrode13gand the anode electrode12amay be formed by a lift-off method, for example.

Subsequently, as illustrated inFIG. 3D, the source electrode13sis formed in the openings9aand10s, and the cathode-drain electrode13dis formed in the openings9kand10d. Regarding the source electrode13sand the cathode-drain electrode13d, one of them may be formed first, or the both of them may be formed simultaneously. The source electrode13sand the cathode-drain electrode13dmay be formed by a lift-off method, for example.

Next, as illustrated inFIG. 3E, the surface protection layer14which covers the gate electrode13g, the source electrode13s, and the cathode-drain electrode13dis formed over the insulating layer8. The surface protection layer14may be formed by a plasma CVD method, for example.

Thereafter, the back surface of the substrate is polished as necessary to make the substrate have a predetermined thickness. Further, the opening exposing the gate pad, the opening exposing the source pad, and the opening exposing the drain pad are formed in the surface protection layer14.

Thus, the semiconductor device according to the first embodiment can be completed.

Second Embodiment

First, a second embodiment will be described.FIG. 5Ais a cross-sectional view illustrating a structure of a semiconductor device according to the second embodiment, andFIG. 5Bis a plan view illustrating a positional relation of electrodes in the second embodiment. Note thatFIG. 5Aillustrates a cross section taken along a line I-I inFIG. 5B.

In the second embodiment, as illustrated inFIG. 5A, a buffer layer22, an electron transit layer23(first electron transit layer), an electron supply layer24, a cap layer25, an insulating layer26, an electron transit layer27(second electron transit layer), and an insulating layer28are formed in this order over a substrate21. The substrate21is an n-type Si substrate, for example. As the buffer layer22, for example, an AlN layer is formed, which has a thickness of 1 nm to 1000 nm, for example. As the electron transit layer23, for example, a GaN layer is formed, which has a thickness of 10 nm to 5000 nm, for example. As the electron supply layer24, for example, an Al0.25Ga0.75N layer is formed, which has a thickness of 1 nm to 100 nm, for example. As the cap layer25, for example, an n-type GaN layer is formed, which has a thickness of 1 nm to 100 nm, for example. Si is doped to the cap layer25, for example. As the insulating layer26, for example, an AlN layer is formed, which has a thickness of 10 nm to 5000 nm, for example. As the electron transit layer27, for example, a GaN layer is formed, which has a thickness of 10 nm to 5000 nm, for example. As the insulating layer28, for example, a silicon nitride layer is formed.

An opening30sfor a source electrode, an opening30dfor a drain electrode, an opening29afor an anode electrode, and an opening29kfor a cathode electrode are formed in the insulating layer28. The opening30sand the opening30dare also formed in the electron transit layer27, the insulating layer26, and the cap layer25. The opening30sand the opening29aare connected to each other, and it is not necessary to make the boundary therebetween clear. Similarly, the opening30dand the opening29kare connected to each other, and it is not necessary to make the boundary therebetween clear. Moreover, a recess30gfor a gate electrode is formed in the cap layer25. The recess30gis located closer to the opening30sside than the opening30d.

A gate electrode33gis formed in the recess30g. As the gate electrode33g, for example, a stacked body of a Ni film located in a bottom portion of the recess30gand a Au film located thereon is formed. At a position matching with the recess30gin plan view in the electron transit layer27and the insulating layer26, an opening connected to the opening29aand the opening30sis formed, and an insulating layer31which covers the gate electrode33gis formed in this opening. As the insulating layer31, for example, an AlN layer is formed. In the opening29aand on the insulating layer31, an anode electrode32ain Schottky contact with the electron transit layer27is formed. As the anode electrode32a, for example, a stacked body of a Ni film in contact with the electron transit layer27and a Au film located thereon is formed. Further, in the opening29aand the opening30s, a source electrode33sin contact with the anode electrode32aand in ohmic contact with the electron supply layer24is formed. As the source electrode33s, for example, a stacked body of a Ta film in contact with the anode electrode32aand the electron supply layer24, and an Al film located thereon is formed. Moreover, in the opening29kand the opening30d, a cathode-drain electrode33din ohmic contact with the electron transit layer27and the electron supply layer24is formed. As the cathode-drain electrode33d, for example, a stacked body of a Ta film in contact with the electron transit layer27and the electron supply layer24, and an Al film located thereon is formed.

Then, a surface protection layer34which covers the source electrode33sand the cathode-drain electrode33dis formed over the insulating layer2. As the surface protection layer34, for example, a silicon nitride layer is formed. As illustrated inFIG. 5B, the gate electrode33g, the source electrode33s, and the cathode-drain electrode33dare disposed in a comb shape. Then, similarly to the first embodiment, the gate electrode33gis connected to a gate pad, the source electrode33sis connected to a source pad, and the cathode-drain electrode33dis connected to a drain pad. Further, in the surface protection layer34, the openings which expose the gate pad, the source pad, and the drain pad, respectively, are formed.

In the second embodiment structured thus, a GaN-based HEMT exists, which includes the gate electrode33g, the source electrode33s, the cathode-drain electrode33d, the electron supply layer24, and the electron transit layer23. Further, a Schottky barrier diode also exists, which includes the anode electrode32a, the cathode-drain electrode33d, and the electron transit layer27, and is connected in inversely parallel to the HEMT. Then, when negative voltage is applied to the cathode-drain electrode33d, electrons move from the cathode-drain electrode33dto the anode electrode32avia the electron transit layer27, and electric current flows toward the cathode-drain electrode33dfrom the anode electrode32a. That is, the Schottky barrier diode functions as a free wheel diode. The cathode electrode of the Schottky barrier diode is integrated with the drain electrode of the HEMT, and the anode electrode is in direct contact with the source electrode. Therefore, the Schottky barrier diode operates before large electric current flows through the HEMT, which suppresses increase in power consumption. Further, when large positive voltage is applied to the cathode-drain electrode33d, electrons move from the anode electrode32ato the cathode-drain electrode33dvia the electron transit layer27, and electric current flows toward the anode electrode32afrom the cathode-drain electrode33d. That is, the Schottky barrier diode functions as a protective diode. Therefore, failure of the HEMT can be prevented.

In general, when semiconductor layers are stacked, a trap is formed in the semiconductor layer located on the surface. Then, the trap may become a factor for decreasing characteristics of the HEMT. However, in the second embodiment, since the semiconductor layer which forms the Schottky barrier diode is formed on the HEMT, it is difficult for a trap to be formed in the semiconductor layers in the HEMT. Therefore, an HEMT with more favorable characteristics can be obtained.

Next, a method of manufacturing the semiconductor device according to the second embodiment will be described.FIG. 6AtoFIG. 6Eare cross-sectional views illustrating the method of manufacturing the semiconductor device according to the second embodiment in the order of steps.

First, as illustrated inFIG. 6A, the buffer layer22, the electron transit layer23, the electron supply layer24, the cap layer25, the insulating layer26, and the electron transit layer27are formed in this order over the substrate21by an MOCVD method, for example. Then, the insulating layer28is formed over the electron transit layer27. The insulating layer28may be formed by a plasma CVD method, for example.

Next, as illustrated inFIG. 6B, the openings30s,30d,29a, and29kare formed in the insulating layer28. In formation of the openings30s,30d,29a, and29k, for example, selective etching using SF6gas is performed with a resist pattern being a mask. After the openings30s,30d,29a, and29kare formed, the openings30g,30s, and30dare formed. At this time, an opening connected to the opening30gis formed in the electron transit layer27and the insulating layer26. In formation of these openings, for example, selective etching using the Cl2gas is performed with a resist pattern being a mask.

Thereafter, as illustrated inFIG. 6C, the gate electrode33gis formed in the recess30g. Subsequently, the insulating layer31is formed over the gate electrode33g. Then, the anode electrode32ais formed over insulating layer31. The gate electrode33gand the anode electrode32amay be formed by a lift-off method, for example.

Thereafter, as illustrated inFIG. 6D, the source electrode33sis formed in the openings29aand30s, and the cathode-drain electrode33dis formed in the openings29kand30d. Regarding the source electrode33sand the cathode-drain electrode33d, one of them may be formed first, or the both of them may be formed simultaneously. The source electrode33sand the cathode-drain electrode33dmay be formed by a lift-off method, for example.

Next, as illustrated inFIG. 6E, the surface protection layer34which covers the source electrode33sand the cathode-drain electrode33dis formed over the insulating layer28. The surface protection layer34may be formed by a plasma CVD method, for example.

Thereafter, the back surface of the substrate is polished as necessary to make the substrate have a predetermined thickness. Further, the opening exposing the gate pad, the opening exposing the source pad, and the opening exposing the drain pad are formed in the surface protection layer34.

Thus, the semiconductor device according to the second embodiment can be completed.

Note that the materials, thicknesses, impurity concentrations and so on of the substrate and the respective layers are not particularly limited. For example, as the substrate, a sapphire substrate, a SiC substrate, a GaN substrate, or the like may be used instead of the Si substrate. As the electron transit layer included in the Schottky barrier diode, one including a p-type or n-type semiconductor may be used, or one including at least two types of semiconductors which have different lattice constants from each other such as GaN or AlGaN may be used. Moreover, as the insulating layer which insulates the electron transit layer included in the Schottky barrier diode and the HEMT from each other, one containing at least one of AlN, AlGaN, p-type GaN, Fe doped GaN, Si oxide, Al oxide, Si nitride, or C may be used. Further, as the material for the anode electrode in Schottky contact with the electron transit layer, there are Ni, Pd, and Pt, which may be used in combination.

Further, as illustrated inFIG. 7A, an insulating layer41of AlN or AlGaN and an n-type GaN layer.42may be stacked over the cap layer7of n-type GaN in the first embodiment. Similarly, as illustrated inFIG. 7B, the cap layer25of n-type GaN may be located below the gate electrode33g, and an insulating layer51of AlN or AlGaN and an n-type GaN layer52may be stacked over the cap layer25.

These semiconductor devices may be used for a switching semiconductor element for example. Further, such a switching element may also be used for a switching power supply or electronic equipment. Moreover, it is possible to use these semiconductor devices as a part for a full-bridge power supply circuit such as a power supply circuit of a server.

These semiconductor devices and the like enable a diode connected to a transistor to operate properly.