Image feature extraction apparatus, method of extracting image characteristic, monitoring and inspection system, exposure system, and interface system

The present apparatus initially shoots the object to generate a differential image signal. It processes row by row the differential image signal to detect a left-end edge and a right-end edge, and stores information about the end edges as a characteristic of a matter. The present apparatus preferably eliminates noise by expanding/contracting the detected end edges. The present apparatus also preferably obtains a calculation such as an area and position of a matter from the information about the end edges in order to judge occurrence of anomaly in the object based on the calculation. The processing described above is performed on two end edges per row on the screen. The amount of information to be processed is significantly reduced as compared with the cases where the processing is performed pixel by pixel, thereby realizing high-speed, simple processing.

DESCRIPTION OF THE PREFERRED EMBODIMENTS &square;First Embodiment&square; The first embodiment is an embodiment corresponding to the inventions set forth in claims 1 - 10 . &lsqb;General Configuration of the First Embodiment&rsqb; FIG. 1 is a block diagram showing the configuration of a monitoring and inspection system 10 (including an image feature extraction apparatus 11 ) in the first embodiment. Incidentally, in this diagram, the internal functions of a microprocessor 15 which are realized by software processing or the like are also shown as functional blocks for convenience of explanation. In FIG. 1, a photographic lens 12 is mounted on the monitoring and inspection system 10 . The imaging plane of a solid-state image pickup device 13 is placed on the image-space side of the photographic lens 12 . An image signal output from the solid-state image pickup device 13 is supplied to a recording apparatus 14 . Besides, a differential image signal output from the solid-state image pickup device 13 is supplied to the microprocessor 15 for image processing. The microprocessor 15 comprises the following functional blocks. &square;Edge coordinate detecting part 16 &square;&square; to detect end edges from the differential image signal and store the coordinate information about the end edges into a system memory 20 . &square;Noise elimination part 17 &square;&square; to eliminate noise components from the coordinate information about the end edges stored in the system memory 20 . &square;Area operation part 18 &square;&square; to calculate the on-screen area of a matter from the end edges stored in the system memory 20 . &square;Abnormal signal outputting part 19 &square;&square; to decide whether or not the on-screen area of the matter falls within a predetermined allowable range, and, if out of the allowable range, issue a notification of the abnormal condition. The notification is transmitted to the recording apparatus 14 and an alarm 21 . &lsqb;Internal Configuration of the Solid-state Image Pickup Device 13 &rsqb; FIG. 2 is a diagram showing the internal configuration of the solid-state image pickup device 13 . In FIG. 2 , unit pixels 1 are arranged on the solid-state image pickup device 13 , in matrix with n rows and m columns. The unit pixels 1 comprise a photodiode PD for performing photoelectric conversion, an MOS switch QT for charge transfer, an MOS switch QP for charge resetting, an MOS switch QX for row selection, and an amplifying element QA composed of a junction field effect transistor. The outputs of such unit pixels 1 are connected in common by each vertical column to form m vertical read lines 2 . The solid-state image pickup device 13 is also provided with a vertical shift register 3 . The vertical shift register 3 outputs control pulses &phgr;TG 1 , &phgr;PX 1 , and &phgr;RG 1 to control the opening/closing of the MOS switches QT, QP, and QX, so that the pixel outputs of the unit pixels 1 are output onto the vertical read lines 2 . Current sources 4 are also connected to the vertical read lines 2 , respectively. Moreover, the vertical read lines 2 are connected to a horizontal read line 7 through respective difference processing circuits 5 . A resetting MOS switch QRSH is connected to the horizontal read line 7 . A resetting control pulse &phgr;RSH is supplied from a horizontal shift register 8 or the like to the MOS switch QRSH. Meanwhile, the difference processing circuits 5 mentioned above are composed of a capacitor CV for charge retention, an MOS switch QV for forming a capacitor charging path, and an MOS switch QH for horizontal transfer. Parallel outputs &phgr;Hl to &phgr;Hm of the horizontal shift register 8 are connected to the MOS switches QH, respectively. Besides, a control pulse &phgr;V for determining the timing of charge retention is supplied from the vertical shift register 3 or the like to the difference processing circuits 5 . In addition, different value detecting circuits 6 are connected to the vertical read lines 2 , respectively. The different value detecting circuits 6 are circuits for comparing vertically-transmitted old and new pixel outputs, composed of, for example, a sampling circuit and a comparison circuit for comparing the old and new pixel outputs based on the outputs of the sampling circuit. A control pulse &phgr;SA for determining the sampling timing is supplied from the vertical shift register 3 or the like to the different value detecting circuits 6 . The individual outputs of such different value detecting circuits 6 are connected to parallel inputs Q 1 to Qm of a shift register 9 , respectively. A control pulse &phgr;LD for determining the timing of accepting the parallel inputs and a transfer clock &phgr;CK for serial transfer are input to the shift register 9 . The pulses &phgr;LD and &phgr;CK are supplied from the horizontal shift register 8 or the like, for example. &lsqb;Correspondences between the First Embodiment and the Items Described in the Claims&rsqb; Hereinafter, description will be given of the correspondences between the first invention and the claims. Incidentally, these correspondences simply provide an interpretation for reference purposes, and are not intended to limit the invention. (a) The correspondences between the invention set forth in claim 1 and the first embodiment are as follows: the differential image signal generating part → the photographic lens 12 and the solid-state image pickup device 13 , the edge coordinate detecting part→the edge coordinate detecting part 16 , and the edge coordinate storing part→the system memory 20 . (b) The correspondence between the invention set forth in claim 2 and the first embodiment is as follows: the noise elimination part→the noise elimination part 17 . (c) The correspondences between the invention set forth in claim 3 and the first embodiment are as follows: the left-end expansion processing part→“the function of performing left-end expansion processing ( FIG. 4 , S 22 - 26 )” of the noise elimination part 17 , the right-end expansion processing part→“the function of performing right-end expansion processing ( FIG. 4 , S 22 - 26 )” of the noise elimination part 17 , the left-end contraction processing part→“the function of performing left-end contraction processing ( FIG. 5 , S 42 - 47 )” of the noise elimination part 17 , and the right-end contraction processing part→“the function of performing right-end contraction processing ( FIG. 5 , S 42 - 47 )” of the noise elimination part 17 . (d) The correspondence between the invention set forth in claim 4 and the first embodiment is as follows: &square;the feature operation part → the area operation part 18 . (e) The correspondence between the invention set forth in claim 5 and the first embodiment is as follows: the abnormal signal outputting part→the abnormal signal outputting part 19 . (f) The correspondences between the invention set forth in claim 6 and the first embodiment are as follows: the optical system→the photographic lens 12 , the solid-state image pickup device→the solid-state image pickup device 13 , the light receiving part→the photodiodes PD, the pixel output transfer part→the vertical shift register 3 , the vertical read lines 2 , the horizontal read lines 7 , the horizontal shift register 8 , and the MOS switches QT, QX, and QA, and the differential processing part → the different value detecting circuits 6 and the shift register 9 . (g) The correspondences between the invention set forth in claim 7 and the first embodiment are as follows: the step of generating a differential image signal → the step of generating a differential image signal within the solid-state image pickup device 13 , the step of detecting end edges → the step of detecting end edges in the edge coordinate detecting part 16 , and the step of storing information as to the end edges → the step for the edge coordinate detecting part 16 to record the coordinate information about the end edges into the system memory 20 . (h) The correspondences between the inventions set forth in claims 8 to 10 and the first embodiment are as follows: the image feature extraction apparatus → the photographic lens 12 , the solid-state image pickup device 13 , the edge coordinate detecting part 16 , the noise elimination part 17 , the area operation part 18 , and the system memory 20 , and the monitoring unit → the abnormal signal outputting part 19 , the alarm 21 , and the recording apparatus 14 . &lsqb;Description of the Shooting Operation in the Solid-state Image Pickup Device 13 &rsqb; Before the description of the operation of the entire monitoring and inspection system 10 , description will be first given of the shooting operation of the solid-state image pickup device 13 . The photographic lens 12 images an object of light on the imaging plane of the solid-state image pickup device 13 . Here, the vertical shift register 3 sets the MOS switches QT for charge transfer at OFF state to maintain the photodiodes PD floating. Accordingly, in the photodiodes PD, the light image is photoelectrically converted pixel by pixel, whereby signal charges corresponding to the amount of light received are successively stored into the photodiodes PD. Along with such a signal-charge storing operation, the vertical shift register 3 selectively places the MOS switches QX in a row to be read into ON state, so that the amplifying elements QA in the row to be read are connected to the vertical read lines 2 for supply of bias currents IB. Here, since the MOS switches QT and QP in the row to be read are in OFF state, the signal charges upon the previous read remain in the gate capacitances of the amplifying elements QA. On that account, the amplifying elements QA in the row to be read output pixel outputs of the previous frame to the vertical read lines 2 . The different value detecting circuits 6 accept and retain the pixel outputs of the previous frame. Next, the vertical shift register 3 temporarily places the MOS switches QP in the row to be read into ON state so that the residual charges in the gate capacitances are reset once. In this state, the amplifying elements QA in the row to be read output a dark signal to the vertical read lines 2 . The dark signal contains resetting noise (so-called kTC noise) and variations of the gate-to-source voltages in the amplifying elements QA. The difference processing circuits 5 temporarily place their MOS switches QV into ON state to retain the dark current into the capacitors CV. Subsequently, the vertical shift register 3 temporarily places the MOS switches QT in the row to be read, into ON state so that the signal charges in the photodiodes PD are transferred into the gate capacitances of the amplifying elements QA. As a result, the latest pixel outputs are output from the amplifying elements QA to the vertical read lines 2 . The different value detecting circuits 6 decide whether or not the pixel outputs of the previous frame retained immediately before and the latest pixel outputs match with each other within a predetermined range, and output the decision results. The shift register 9 accepts the decision results on a row-by-row basis through the parallel input terminals Ql to Qm. Meanwhile, the latest pixel outputs are applied to either ones of the capacitors CV which hold the dark signal. As a result, real pixel outputs excluding the dark signal are output to the other sides of the capacitors CV. In this state, the same transfer clock &PHgr;CK is input to both the shift register 9 and the horizontal shift register 8 . Then, the shift register 9 serially outputs the differential image signal for a single row. Meanwhile, the horizontal shift register 8 places the MOS switches QH for horizontal transfer into ON state in turn, so that a single row of pixel outputs are successively output to the horizontal read line 7 . The operations as described above are repeated while shifting the to-be-read row by one, so that ordinary image signals and temporally-differentiated differential image signals are output from the solid-state image pickup device 13 in succession. &lsqb;Description on the Operation of End Edge Detection&rsqb; Next, description will be given of the operation of detecting end edges by the edge coordinate detecting part 16 (the microprocessor 15 , in fact). FIG. 3 is a flowchart explaining the operation of detecting end edges. Hereinafter, description will be given along the step numbers in FIG. 3 . Step S 1 : For a start, the edge coordinate detecting part 16 initializes variables i and j, which indicate a position of the pixel being processed at the moment, to 1. Besides, the edge coordinate detecting part 16 reserves integer arrays L(x) and R(x) having (n&plus;1) elements on the system memory 20 . The edge coordinate detecting part 16 applies the following initialization to the integer arrays L(x) and R(x). L(x)&equals;m, R(x)&equals;1 &lsqb;where x&equals;1 to n&rsqb;  (1) Step S 2 : Next, the edge coordinate detecting part 16 accepts an i-th row, j-th column differential image signal D(i,j) in synchronization with the read pulse of the solid-state image pickup device 13 . If the differential image signal D(i,j) is “1,” the edge coordinate detecting part 16 determines that the pixel has changed temporally (so-called motion edge), and moves the operation to Step S 3 . On the other hand, if the differential image signal D(i,j) is “zero,” it determines that the pixel has not changed temporally, and moves the operation to Step S 6 . Step S 3 : Whether or not the differential image signal D(i,j) is the first motion edge to be detected on the i-th row is decided. If it is the first motion edge to be detected on the i-th row, then the edge coordinate detecting unit 16 determines that it is the left-end edge, and moves the operation to Step S 4 . On the other hand, at all other times, the edge coordinate detecting part 16 moves the operation to Step S 5 . Step S 4 : In accordance with the determination of the left-end edge, the edge coordinate detecting part 16 stores the pixel position j of the left-end edge on the i-th row into the integer array L(i). Step S 5 : The edge coordinate detecting part 16 temporarily stores the pixel position j of the motion edge on the i-th row into the integer array R(i). Step S 6 : The edge coordinate detecting unit 16 decides whether j&equals;m or not. Here, if j≠m, the edge coordinate detecting part 16 determines that the processing on the i-th row is yet to be completed, and moves the operation to Step S 7 . On the other hand, if j&equals;m, the edge coordinate detecting part 16 determines that the processing on the i-th row is completed, and moves the operation to Step S 8 . Step S 7 : Here, since the processing on the i-th row is yet to be completed, the edge coordinate detecting part 16 increments j by one and returns the operation to Step S 2 . Step S 8 : In accordance with the determination that the processing on the i-th row is completed, the edge coordinate detecting unit 16 decides whether i&equals;n or not. Here, if i≠n, the edge coordinate detecting part 16 determines that the processing for a single screen is yet to be completed, and moves the operation to Step S 9 . On the other hand, if i&equals;n, the edge coordinate detecting part 16 determines that the processing for a single screen is completed, and ends the operation. (Incidentally, in the cases of processing moving images, returns to Step S 1 to start processing the next frame) Step S 9 : Here, since the processing for a single screen is yet to be completed, the edge coordinate detecting part 16 increments i by one, restores j to 1, and then returns the operation to Step S 2 to enter the processing of the next row. Through the series of operations described above, the left-end edges on x-th rows are stored into the integer array L(x). Besides, the right-end edges on x-th rows are stored into the integer array R(x). &lsqb;Expansion Processing of End Edges&rsqb; Next, description will be given of the expansion processing of end edges by the noise elimination part 17 (the microprocessor 15 , in fact). FIG. 4 is a flowchart explaining the expansion processing of end edges. Hereinafter, the description will be given along the step numbers in FIG. 4 . Step S 21 : For a start, the noise elimination part 17 initializes variables as follows: 1 i = 1 Lb = m , L &af; ( n + 1 ) = m , and ( 2 ) Rb = 1 , R &af; ( n + 1 ) = 1. ( 3 ) Step S 22 : Based on the values of the variables Rb, R(i), and R(i&plus;1), the noise elimination part 17 decides whether or not edges exist in a plurality of adjoining rows (here, three rows) including an i-th row to be processed. Here, if no edge exists in the plurality of rows, the noise elimination part 17 moves the operation to Step S 23 . On the other hand, if edges exist in the plurality of rows, the noise elimination part 17 moves the operation to Step S 24 . Step S 23 : The noise elimination part 17 will not perform any edge expansion processing on the i-th row since no edge exists in the plurality of rows including the i-th row. Then, for the processing of the next row, it simply updates the variables Lb and Rb as described below, and moves the operation to Step S 27 . Lb&equals;L(i), Rb&equals;R(i)   (4) Step S 24 : Since edges exist in the plurality of rows including the i-th row, the noise elimination part 17 performs the following equations to expand both the end edges on the i-th row. Lx &equals;min&lsqb; Lb, L ( i ), L ( i&plus; 1)&rsqb;−1   (5) Rx &equals;max&lsqb; Rb, R ( i ), R ( i&plus; 1)&rsqb;&plus;1   (6) The equation (5) determines the leftmost end of the left-end edges in the plurality of rows, and sets Lx to a position in one pixel further left of the leftmost end. Moreover, the equation (6) determines the rightmost end of the right-end edge(s) in the plurality of rows, and sets Rx to a position in one pixel further right of the rightmost end. Step S 25 : As in Step S 23 , the noise elimination part 17 , in preparation for the processing of the next row, updates the variables Lb and Rb as follows: Lb&equals;L(i), Rb&equals;R(i).   (4) Step S 26 : The noise elimination part 17 substitutes Lx and Rx calculated by the above-stated equations (5) and (6) into L(i) and R(i) as the end edges on the i-th row. Step S 27 : The noise elimination part 17 decides whether i&equals;n or not. Here, if i≠n, the noise elimination part 17 determines that the processing for a single screen is yet to be completed, and moves the operation to Step S 28 . On the other hand, if i&equals;n, the noise elimination part 17 determines that the processing for a single screen is completed, and ends the single round of expansion processing. Step S 28 : Here, since the processing for a single screen is yet to be completed, the noise elimination part 17 increments i by one and then returns the operation to Step S 22 to enter the processing of the next row. The processing of expanding, by one pixel obliquely upward and downward, the end edges stored in the integer arrays L(x) and R(x) can be achieved by performing the series of operations described above. &lsqb;Contraction Processing of End Edges&rsqb; Next, description will be given of the contraction processing of end edges by the noise elimination part 17 (the microprocessor 15 , in fact). FIG. 5 is a flowchart explaining the contraction processing of end edges. Hereinafter, the description will be given along the step numbers in FIG. 5 . Step S 41 : For a start, the noise elimination part 17 initializes variables as follows: i&equals;1, Lb&equals; 1, L ( n&plus; 1)&equals;1,and   (7) Rb&equals;m, R ( n&plus; 1)&equals; m. (8) Step S 42 : Based on the values of the variables Rb, R(i), and R(i&plus;1), the noise elimination part 17 decides whether or not a plurality of adjoining rows (here, three rows) which includes an i-th row to be processed includes a loss in any edge. Here, when any edge loss is found in the plurality of rows, the noise elimination part 17 moves the operation to Step S 43 . On the other hand, when the plurality of rows includes no edge loss, the noise elimination part 17 moves the operation to Step S 45 . Step S 43 : The noise elimination part 17 , in preparation for the processing of the next row, updates the variables Lb and Rb as follows: Lb&equals;L ( i ), Rb&equals;R ( i ).   (9) Step S 44 : Since an edge loss is found in the plurality of rows including the i-th row, the noise elimination part 17 performs the following equations to delete the edges on the i-th row and moves the operation to Step S 48 . L ( i )&equals; m, R ( i )&equals;1   (10) Step S 45 : Since the plurality of rows including the i-th row includes no edge loss, the noise elimination part 17 performs the following equations to contract both of the end edges on the i-th row. Lx &equals;max&lsqb; Lb, L ( i ), L ( i&plus; 1)&rsqb;&plus;1   (11) Rx &equals;min&lsqb; Rb, R ( i ), R ( i&plus; 1)&rsqb;−1   (12) The equation (11) determines the rightmost end of the left-end edge(s) in the plurality of rows, and sets Lx to a position in one pixel further right of the rightmost end. Moreover, the equation (12) determines the leftmost end of the right-end edge(s) in the plurality of rows, and sets Rx to a position in one pixel further left of the leftmost end. Step S 46 : As in Step S 43 , the noise elimination part 17 , in preparation for the processing of the next row, updates the variables Lb and Rb as follows: Lb&equals;L ( i ), Rb&equals;R ( i ).   (9) Step S 47 : The noise elimination part 17 substitutes Lx and Rx calculated by the above-stated equations ( 11) and (12) into L(i) and R(i) as the end edges on the i-th row. Step S 48 : The noise elimination part 17 decides whether i&equals;n or not. Here, if i≠n, the noise elimination part 17 determines that the processing for a single screen is yet to be completed, and moves the operation to Step S 49 . On the other hand, if i&equals;n, the noise elimination part 17 determines that the processing for a single screen is completed, and ends the single round of contraction processing. Step S 49 : Here, since the processing for a single screen is yet to be completed, the noise elimination part 17 increments i by one and then returns the operation to Step S 42 to enter the processing of the next row. The processing of contracting, by one pixel obliquely upward and downward, the end edges stored in the integer arrays L(x) and R(x) can be achieved by performing the series of operations described above. &lsqb;Concerning Noise Elimination Effects obtained from the Expansion Processing and Contraction Processing&rsqb; The noise elimination effects obtained from the above-described expansion processing and contraction processing will be specifically described. FIG. 6 is a diagram showing the noise elimination effects from the expansion processing and contraction processing. As shown in FIG. 6 ( a ), point noises p and a choppy noise Q slightly get mixed as noise components into differential image signals. As shown in FIG. 6 ( b ), upon the detection of the end edges, the noise components produce misrecognized edges Pe and a split edge Qe. On that account, the outline shape of the matter is partly deformed, which causes troubles in recognizing the shape and calculating the area of the matter. FIG. 6 ( c ) is a diagram showing a state in which the end edges containing such noise components are subjected to the above-described expansion processing one to several times. The end edges expand obliquely upward and downward by several pixels so that the split edge Qe seen in FIG. 6 ( b ) is filled in from around. As a result, the deformation in the outline shape resulting from the split edge Qe is eliminated without fault. FIG. 6 ( d ) is a diagram showing a state in which the end edges given the expansion processing are subjected to the above-described contraction processing one to several times. In this case, the misrecognized edges Pe remaining in FIG. 6 ( c ) are eliminated by contracting by several pixels the end edges obliquely upward and downward. As a result, the deformations in the outline shape resulting from the misrecognized edges Pe are eliminated without fault. In this connection, as to such expansion processing and contraction processing, the number of times the processing is repeated, the execution order, and the width of expansion (contraction) at a time are preferably determined in accordance with image resolutions and noise conditions. Incidentally, on such a noise condition that choppy noise is relatively high and the matter edges are split to pieces, the expansion processing is preferably preceded so as to restore the matter edges. Moreover, when point noise is relatively high, the contraction processing is preferably preceded so as not to misrecognize a group of point noises as a matter. &lsqb;Area Operation and Abnormality Decision Processing&rsqb; Next, description will be given of the area operation and the abnormality decision processing by the area operation part 18 and the abnormal signal outputting part 19 (both by the microprocessor 15 , in fact). FIG. 7 is a flowchart explaining the area operation and the abnormality decision processing. Hereinafter, the description will be given along the step numbers in FIG. 7 . Step S 61 : For a start, the area operation part 18 initializes variables as follows: i&equals;1, and S&equals;0. Step S 62 : The area operation part 18 accumulates the distances between the end edges on i-th rows to an area S, after the following equation: S&equals;S &plus;max&lsqb;0, R ( i )− L ( i )&plus;1&rsqb;.   (13) Step S 63 : The area operation part 18 decides whether i&equals;n or not. Here, if i≠n, the area operation part 18 determines that the processing for a single screen is yet to be completed, and moves the operation to Step S 64 . On the other hand, if i&equals;n, the area operation part 18 determines that the processing for a single screen is completed, and moves the operation to Step S 65 . Step S 64 : Here, since the processing for a single screen is yet to be completed, the area operation part 18 increments i by one and then returns the operation to Step S 62 to enter the processing of the next row. Step S 65 : Through the processing S 61 - 64 described above, the on-screen area S of the matter surrounded by the end edges (here, equivalent to the number of pixels the matter occupies) is calculated. The abnormal signal outputting part 19 compares magnitudes between the on-screen area S and an allowable value Se that is predetermined to distinguish a human from small animals and the like. For example, when a solid-state image pickup device 13 with two hundred thousand pixels is used and the range of object is set at 3 m ×3 m, a single pixel is equivalent to an area of 45 mm 2 . Here, given that a human body is 170 cm ×50 cm in size and the small animal is a mouse of 20 cm ×10 cm in size, the size of the human body is equivalent to approximately nineteen thousand pixels and the size of the mouse is to 400 pixels. In such a case, the allowable value Se is set to the order of 4000 pixels to allow the distinction between a human and a small animal. Here, if the on-screen area S is smaller than or equal to the allowable value Se, the abnormal signal outputting part 19 judges only a small animal such as a mouse is present on the screen, and makes no anomaly notification. On the other hand, when the on-screen area S exceeds the allowable value Se, the abnormal signal outputting part 19 determines that there is a relatively large moving body such as a human on the screen, and moves the operation to Step S 66 . Step S 66 : The abnormal signal outputting part 19 notifies occurrence of anomaly to exterior. In response to the notification, the recording apparatus 14 starts recording image signals. The alarm 21 sends an emergency alert to a remote supervisory center through a communication line or the like. &lsqb;Effects of First Embodiment&rsqb; By performing the operations described above, the first embodiment can accurately identify a moving body greater than or equal to the size of a human through information processing of end edges, to precisely notify occurrence of anomaly. In particular, since the processing of end edges is mainly performed in the first embodiment, the integer arrays L(x) and R(x) of the order, at most, of (n&plus;1) in the number of elements need to be reserved on the system memory 20 . Therefore, the image feature extraction apparatus 11 requires an extremely smaller memory capacity as compared with the conventional example where pixel-by-pixel frame memories are required. Moreover, since the processing of end edges is mainly performed in the first embodiment, the noise elimination and the area operation have only to be performed with row-by-row speed at best. This produces a far greater margin in the processing speed as compared with the conventional example where pixel-by-pixel processing is mainly performed. Therefore, according to the first embodiment, an image feature extraction apparatus that monitors moving images in real time to notify occurrence of anomaly can be realized without difficulty. Now, description will be given of other embodiments. &square;Second Embodiment&square; The second embodiment is an embodiment of the monitoring and inspection system corresponding to claims 8 to 10 . FIG. 8 is a diagram showing a monitoring and inspection system 30 for use in pattern inspection, which is used on plant lines. Concerning the correspondences between the components described in claims 8 - 10 and the components shown in FIG. 8 , the image feature extraction apparatus corresponds to an image feature extraction apparatus 31 , and the monitoring unit corresponds to a comparison processing unit 33 and a reference information storing unit 34 . Incidentally, since the internal configuration of the image feature extraction apparatus 31 is identical to that of the image feature extraction apparatus 11 in the first embodiment, description thereof will be omitted here. In FIG. 8 , an inspection target 32 is placed in the object of the image feature extraction apparatus 31 . Initially, the image feature extraction apparatus 31 detects end edges from differential image signals of the inspection target. The image feature extraction apparatus 31 applies the expansion/contraction-based noise elimination to the coordinate information about the end edges. The coordination information about the edges having noise eliminated is supplied to the comparison processing unit 33 . The comparison processing unit 33 compares the coordinate information about the edges with information recorded in the reference information storing unit 34 (for example, the coordinate information about the edges of conforming items) to make pass/fail evaluations for parts losses, flaws, cold joints, and the like. In such an operation as described above, the pass/fail evaluations are made on the small amount of information, or the coordinate information about edges. Accordingly, there is an advantage that the total amount of information processed for the pass/fail evaluations is small so that the conformance inspection can be performed faster. As a result, there is provided a monitoring and inspection system particularly suited to plant lines and semiconductor fabrication lines that require higher work speed. &square;Third Embodiment&square; The third embodiment is an embodiment of the semiconductor exposure system corresponding to claims 11 to 13 . FIG. 9 is a diagram showing a semiconductor exposure system 40 to be used for fabricating semiconductors. Concerning the correspondences between the components described in claims 11 - 13 and the components shown in FIG. 9 , the image feature extraction apparatus corresponds to image feature extraction apparatuses 44 a - c , the alignment detecting unit corresponds to an alignment detecting unit 45 , the position control unit corresponds to a position control unit 46 , and the exposure unit corresponds to an exposure unit 43 . Incidentally, the interiors of the image feature extraction apparatuses 44 a - c are identical to that of the image feature extraction apparatus 11 in the first embodiment, excepting in that end edges are detected from spatial differential image signals. On that account, description of the image feature extraction apparatuses 44 a - c will be omitted here. In FIG. 9, a wafer-like semiconductor 42 is placed on a stage 41 . An exposure optical system of the exposure unit 43 is arranged over the semiconductor 42 . The image feature extraction apparatuses 44 a - b are arranged so as to shoot an alignment mark on the semiconductor 42 through the exposure optical system. Moreover, the image feature extraction apparatus 44 c is arranged so as to shoot the alignment mark on the semiconductor 42 directly. The image feature extraction apparatuses 44 a - c detect end edges from spatial differential image signals of the alignment mark. The image feature extraction apparatuses 44 a - c apply the expansion/contraction-based noise elimination to the coordinate information about the end edges. The coordination information about the edges thus eliminated of noise is supplied to the alignment detecting unit 45 . The alignment detecting unit 45 detects the position of the alignment mark from the coordinate information about the edges. The position control unit 46 controls the position of the stage 41 based on the position information about the alignment mark, thereby positioning the semiconductor 42 . The exposure unit 43 projects a predetermined semiconductor circuit pattern onto the semiconductor 42 positioned thus. In such an operation as described above, the position of the alignment mark is detected based on the small amount of information, or the coordinate information about the edges. Accordingly, there is an advantage that the total amount of information processed for the position detection is small so that the position detection can be performed at high speed. As a result, there is provided a semiconductor exposure system particularly suited for semiconductor fabrication lines that require faster work speed. &square;Fourth Embodiment&square; The fourth embodiment is an embodiment of the interface system corresponding to claims 14 to 16 . FIG. 10 is a diagram showing an interface 50 for inputting the posture information about a human to a computer 53 . Concerning the correspondences between the components described in claims 14 - 16 and the components shown in FIG. 10 , the image feature extraction apparatus corresponds to an image feature extraction apparatus 51 , and the recognition processing unit corresponds to a recognition processing unit 52 . Incidentally, since the internal configuration of the image feature extraction apparatus 51 is identical to that of the image feature extraction apparatus 11 in the first embodiment, description thereof will be omitted here. In FIG. 10 , the image feature extraction apparatus 51 is arranged at a position where it shoots a human on a stage. Initially, the image feature extraction apparatus 51 detects end edges from differential image signals of the person. The image feature extraction apparatus 51 applies the expansion/contraction-based noise elimination to the coordinate information about the end edges. The coordination information about the edges thus eliminated of noise is supplied to the recognition processing unit 52 . The recognition processing unit 52 performs recognition processing on the coordinate information about the edges to classify the person's posture under patterns. The recognition processing unit 52 supplies the result of such pattern classification, as the posture information about the person, to the computer 53 . The computer 53 creates game images or the like that reflect the posture information about the person, and displays the same on a monitor screen 54 . In such an operation as described above, the posture information about the person is recognized based on the small amount of information, or the coordinate information about the edges. Accordingly, there is an advantage that the total amount of information processed for the feature extraction and image recognition is small so that the image recognition can be performed at high speed. As a result, there is provided an interface system particularly suited to game machines and the like that require high speed processing. Incidentally, while the present embodiment has dealt with inputting human posture, it is not limited thereto. The interface system of the present embodiment may be applied to inputting hand gestures (a sign language) and so on. &square;Supplemental Remarks on the Embodiments&square; In the embodiment described above, the solid-state image pickup device 13 generates differential image signals on the basis of time differentiation. Such an operation is excellent in that moving bodies can be monitored in distinction from still images such as a background. However, this operation is not restrictive. For example, differential image signals may be generated from differences among adjacent pixels (spatial differentiation). For solid-state image pickup devices capable of generating differential image signals on the basis of such spatial differentiation, edge detection solid-state image pickup devices described in Japanese Unexamined Patent Application Publication No.Hei 11-225289, devices described in Japanese Unexamined Patent Application Publication No.Hei 06-139361, light receiving element circuit arrays described in Japanese Unexamined Patent Application Publication No.Hei 8-275059, and the like may be used. In the embodiments described above, the on-screen area of a matter is determined from the information about the end edges so that an occurrence of anomaly is notified based on the on-screen area. Such an operation is excellent in identifying the size of the matter. However, this operation is not restrictive. For example, the microprocessor 15 may determine the center position of a matter based on the information about the end edges. In this case, it becomes possible for the microprocessor 15 to decide whether or not the center position of the matter lies in a forbidden area on the screen. Therefore, such operations as issuing a proper alarm to intruders whom enter the forbidden area on the screen become feasible. Moreover, the microprocessor 15 may determine the dimension of a matter from the end edges, for example. In this case, it becomes possible for the microprocessor 15 to make such operations as separately counting adults and children who pass through the screen. While the embodiments described above have dealt with an exposure system intended for semiconductor fabrication, the present invention is not limited thereto. For example, the present invention may be applied to exposure systems to be used for fabricating liquid crystal devices, magnetic heads, or the like. The invention is not limited to the above embodiments and various modifications may be made without departing from the spirit and the scope of the invention. Any improvement may be made in part or all of the components.