Multi-layer wiring board

A multi-layer wiring board that has stacked therein a first printed wiring bases on at least one surface of which a wiring pattern is formed and in which a conductive paste via is formed, that includes an electronic component terminal and a board terminal whose terminal pitch differs from that of the electronic component terminal, and that has an electronic component installed thereon via the electronic component terminal, wherein a second wiring base whose wiring pitch is smaller than that of the first wiring base is built in to a lower portion of an installing portion of the electronic component via the first wiring base, and the second wiring base is connected to the electronic component terminal via the conductive paste via of the first wiring base, has formed on both surfaces thereof a pattern that enlarges the terminal pitch from the electronic component terminal to the board terminal, and includes a via that connects the pattern of the both surfaces.

STATEMENT REGARDING PRIOR DISCLOSURES BY THE INVENTOR OR A JOINT INVENTOR UNDER 37 C.F.R. 1.77(b)(6)

Japanese Patent No. P5261756 was published on Aug. 14, 2013. The inventor of the Japanese Patent No. P5261756 is Masahiro OKAMOTO who is the inventor of the present application. The applicant, Fujikura Ltd., of the Japanese Patent No. P5261756 is an assignee who obtained the invention of the Japanese Patent from the present inventor. A copy of the Japanese Patent is provided on a concurrently filed Information Disclosure Statement pursuant to the guidance of 78 Fed. Reg. 11076 (Feb. 14, 2013).

Japanese Patent Application Publication No. 2013-211479 A was published on Oct. 10, 2013. The inventor of the Japanese Patent Application Publication No. 2013-211479 A is Masahiro OKAMOTO who is the inventor of the present application. The applicant, Fujikura Ltd., of the Japanese Patent Application Publication No. 2013-211479 A is an assignee who obtained the invention of the Japanese Patent Application Publication from the present inventor. A copy of the Japanese Patent Application Publication is provided on a concurrently filed Information Disclosure Statement pursuant to the guidance of 78 Fed. Reg. 11076 (Feb. 14, 2013).

BACKGROUND OF THE INVENTION

Field of the Invention

This invention relates to a multi-layer wiring board having an electronic component installed thereon.

Description of the Prior Art

Along with miniaturization of electronic devices in recent years, an increase in the density or miniaturization of electronic components in semiconductor chips, and so on, and narrowing of pitch of electronic component terminals, have been proceeding. Accompanying this, reduction or miniaturization of mounting area of wiring bases on which electronic components are mounted, has also been progressing. Under such current circumstances, multi-layering of wiring bases is also being pushed forward, and securing reliability of connection in inter-layer connection has become an essential requirement.

A multi-layer wiring board of a structure where wiring bases are multi-layered is sometimes employed, for example, as a board comprising an interposer for mounting an electronic component having a fine wiring pitch on a mounting board whose wiring pitch is comparatively coarse, such as a mother board (refer to International Patent Publication No. WO2007/129545 and Japanese Patent Publication No. 2008-60609).

However, in the multi-layer wiring board of conventional technology disclosed in the above-mentioned International Patent Publication No. WO2007/129545, a heat-resistant base which is the interposer is configured from a silicon (Si) base. Hence the more the number of electronic component terminals increases, the more difficult thinning is, and as a result, there is a problem that thickness of the board as a whole ends up increasing. In addition, the above-described conventional technology is basically build-up type, and also has a high manufacturing cost.

Moreover, in the multi-layer wiring board of conventional technology disclosed in the above-mentioned Japanese Patent Publication No. 2008-60609, the interposer configured from a printed base is disposed in an outermost layer, hence has room for improvement regarding cost and physical stability.

SUMMARY OF THE INVENTION

This invention has an object of overcoming the above-mentioned problems due to the conventional technology to provide a multi-layer wiring board in which thinning can be achieved at low cost and reliability of connection can be improved without lowering board strength.

A multi-layer wiring board according to an embodiment of the present invention, that has stacked therein a first wiring base on at least one surface of which a wiring pattern is formed and in which a conductive paste via is formed, that includes an electronic component terminal and a board terminal whose terminal pitch differs from that of the electronic component terminal, and that has an electronic component installed thereon via the electronic component terminal, wherein a second wiring base whose wiring pitch is smaller than that of the first wiring base is built in to a lower portion of an installing portion of the electronic component via the first wiring base; and the second wiring base is connected to the electronic component terminal via the conductive paste via of the first wiring base, has formed on both surfaces thereof a pattern that enlarges the terminal pitch from the electronic component terminal to the board terminal, and includes a via that connects the pattern of the both surfaces.

The multi-layer wiring board according to the embodiment of the present invention results in a board in which a second wiring base acting as an interposer is built in to a lower portion of an installing portion of an electronic component via a first wiring base, and the second wiring base has formed on both surfaces thereof a pattern that enlarges a terminal pitch from an electronic component terminal to a board terminal, and includes a via that connects the pattern of the both surfaces. In this way, the second wiring base acting as the interposer connected to the electronic component is built in a similar step to a built-in electronic component when stacking the first wiring base in which a conductive paste via is formed, hence thinning can be achieved at lower cost compared to in a conventional board, and reliability of connection can be improved without lowering board strength.

In an embodiment of the multi-layer wiring board, the first wiring base and the second wiring base are formed by a resin base.

In another embodiment of the multi-layer wiring board, an outermost electronic component terminal of the electronic component terminals has its terminal pitch enlarged by a pattern continuous with the electronic component terminal of the first wiring base on which the electronic component is installed, to be connected to the board terminal via the conductive paste via without being mediated by the second wiring base.

A multi-layer wiring board according to another embodiment of the present invention, that has stacked therein, via an adhesive layer, a plurality of wiring bases on at least one surface of which a wiring pattern is formed and in which a conductive paste via is formed, that includes an electronic component terminal and a board terminal whose terminal pitch differs from that of the electronic component terminal, and that has an electronic component installed thereon via the electronic component terminal, wherein the plurality of wiring bases include a first wiring base, a second wiring base, a third wiring base, and a fourth wiring base of similar thicknesses; the second wiring base includes an opening in which the fourth wiring base is housed, and is disposed, along with the fourth wiring base housed in the opening, between the first wiring base and the third wiring base; and the fourth wiring base has a smaller wiring pitch than those of the first wiring base, the second wiring base, and the third wiring base, is built in to between the first wiring base at a lower portion of an installing portion of the electronic component and the third wiring base, is connected to the electronic component terminal via the conductive paste via of the first wiring base, has formed on both surfaces thereof a pattern that enlarges the terminal pitch from the electronic component terminal to the board terminal, and includes a via that connects the pattern of the both surfaces.

The multi-layer wiring board according to the other embodiment of the present invention results in a board in which a fourth wiring base acting as an interposer is built in to a lower portion of an installing portion of an electronic component via a first wiring base, and the fourth wiring base has formed on both surfaces thereof a pattern that enlarges a terminal pitch from an electronic component terminal to a board terminal, and includes a via that connects the pattern of the both surfaces. In this way, the fourth wiring base acting as the interposer connected to the electronic component is built in a similar step to a built-in electronic component when stacking the first wiring base in which a conductive paste via is formed, hence thinning can be achieved at lower cost compared to in a conventional board, and reliability of connection can be improved without lowering board strength.

In yet another embodiment of the multi-layer wiring board, the fourth wiring base is a single layer, and, moreover, the first wiring base, the second wiring base, the third wiring base, and the fourth wiring base are formed by a resin base.

In yet another embodiment of the multi-layer wiring board, an outermost electronic component terminal of the electronic component terminals has its terminal pitch enlarged by a pattern continuous with the electronic component terminal of the first wiring base on which the electronic component is installed, to be connected to the board terminal via the conductive paste via without being mediated by the fourth wiring base.

The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate embodiments of the invention, and together with the general description given above and the detailed description of the embodiments given below, serve to explain the principles of the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

A multi-layer wiring board according to an embodiment of this invention will be described in detail below with reference to the accompanying drawings.

FIG. 1is a cross-sectional view showing a structure of a multi-layer wiring board according to an embodiment of the present invention. As shown inFIG. 1, a multi-layer wiring board1according to the present embodiment comprises a multi-layer structure in which a first printed wiring base10which is a first wiring base, a second printed wiring base20, and a third printed wiring base30are stacked collectively by thermal compression bonding.

In addition, the multi-layer wiring board1comprises a fourth printed wiring base40which is a second wiring base built in to an opening29formed in a second resin base21of the second printed wiring base20, in a state of being sandwiched between the first and third printed wiring bases10and30. As will be mentioned later, a wiring pitch of the fourth printed wiring base40is far smaller than those of the first through third printed wiring bases10,20, and30. Note that the multi-layer wiring board1comprises an electronic component90mounted on the first printed wiring base10.

The first through third printed wiring bases10to30respectively comprise: a first resin base11, the second resin base21, and a third resin base31; and wirings12,22, and32formed on at least one surface of these first through third resin bases11to31. In addition, the first and third printed wiring bases10and30respectively comprise conductive paste vias13and33formed by filling in via holes2and3of diameter of about 50 to 150 μm formed in the first and third resin bases11and31.

Furthermore, the second printed wiring base20comprises a plated via23formed in a via hole4of diameter of about 100 μm formed in the second resin base21so as to provide conduction between both surfaces of the second resin base21. Employable as these first through third printed wiring bases10to30are, for example, a single-sided copper clad laminated board (single-sided CCL) or a double-sided copper clad laminated board (double-sided CCL), and so on.

In the present example, the second printed wiring base20is formed based on a double-sided CCL, and the other first and third printed wiring bases10and30are formed based on a single-sided CCL. Therefore, the wiring22of the second printed wiring base20is formed on the both surfaces of the second resin base21, and the plated via23provides inter-layer connection between the wirings22of these both surfaces.

Note that the plated via23is configured from, for example, an LVH plated via having a structure in which a plating is applied in a through-hole formed from a side of one of the wirings22without penetrating the other of the wirings22, and is formed by, for example, a copper (Cu) plating. Therefore, a plated layer is formed on one of the wirings22.

In addition, although omitted from illustration, it is also possible to form a via having a structure in which the inside of the through-hole is filled with a conductive paste instead of the plated via23where the inside of the through-hole is plated, or to form a plated through-hole having a structure in which a plating is applied in a through-hole that penetrates between the wirings22.

On the other hand, the fourth printed wiring base40comprises: a fourth resin base41; wiring patterns42and43formed on both surfaces of this fourth resin base41; and a filled plated via44formed by plating inside a via hole5of diameter of about 10 to 30 μm formed in the fourth resin base41to provide conduction between these wiring patterns42and43.

The wiring patterns42and43are formed in a pattern such as to enlarge a connection pitch between the electronic component90and the multi-layer wiring board1, and are here formed such that a pattern pitch of the lower wiring pattern43is broader than a pattern pitch of the upper wiring pattern42. In the present example, whereas a wiring pitch of the wirings12,22, and32of the first through third printed wiring bases10,20, and30is 80 μm, a wiring pitch of the wiring patterns42and43of the fourth printed wiring base40is set to about 20 μm.

Now, a mode of arrangement of the wiring patterns42and43will be described.FIG. 2is a plan view showing part of the wiring patterns42and43of the both surfaces in the fourth printed wiring base40of the multi-layer wiring board1. Moreover,FIG. 3is a plan view showing part of the wiring pattern42of one of the surfaces of the fourth printed wiring base40, andFIG. 4is a plan view showing part of the wiring pattern43of the other of the surfaces of the fourth printed wiring base40. Note that in order to further facilitate understanding of the mode of arrangement of the wiring patterns42and43, the wiring patterns42and43in theseFIGS. 2 to 4are displayed with layouts or dimensions, and so on, that are different from those of the fourth printed wiring base40inFIG. 1. Note that the illustrated example shows part of a corner portion of the wiring patterns42and43, and that in reality, a similar pattern continues also downward in a vertical direction and leftward in a horizontal direction.

That is, as shown inFIG. 2, the wiring patterns42and43are pattern formed such that their respective pattern pitches in the fourth resin base41are different, hence as illustrated, it becomes possible for the wiring patterns42and43to be extremely finely laid out to be led out outwardly in a planar direction. Depending on design conditions of layout, for example, a terminal pitch of an 8 row by 8 column portion of electronic component terminals19in the wiring pattern42of one of the surfaces can be enlarged, hence together with the wiring pattern43of the other of the surfaces, it becomes possible for a terminal pitch of a 16 row by 16 column portion to be enlarged in a thickness of a single-layer portion. Achieving such a fine layout by the likes of a silicon interposer results in thickness significantly increasing, but, as shown inFIGS. 3 and 4, the multi-layer wiring board1of the present embodiment enables the wiring pitch to be efficiently enlarged without the fine wiring patterns42and43short-circuiting, and so on, even in a thickness of a single-layer portion.

The first through fourth resin bases11to41are each formed by, for example, a resin film having a thickness of about 25 μm. Now, employable as the resin film are, for example, a resin film configured from the likes of a polyimide (PI), polyolefin (PO), or liquid crystal polymer (LCP), or a resin film configured from a thermosetting epoxy resin (EP), and so on.

The electronic component90is, for example, a semiconductor component such as an IC chip, or a passive component, and so on, and is configured from a WLP (Wafer Level Package) that has been rewired. Provided on an electrode formation surface91bof the electronic component90are a plurality of re-wiring electrodes91formed on a pad not illustrated. Moreover, formed on the electrode formation surface91bin a periphery of the re-wiring electrodes91is an insulating layer not illustrated. Note that the wirings12,22, and32are configured by pattern forming a conductive material such as copper foil.

The conductive paste forming the conductive paste vias13and33includes at least one kind of metallic particle of low electrical resistance selected from the likes of gold, silver, copper, aluminum, and iron, and at least one kind of metallic particle of low melting point selected from the likes of tin, bismuth, indium, and lead. The conductive paste is configured from, for example, a paste having mixed into these metallic particles a binder component whose main component is an epoxy, an acrylic, a urethane, and so on.

The conductive paste configured in this way enables the metallic particle of low melting point contained therein to melt and form an alloy at a temperature of 200° C. or less, specifically the likes of copper or silver comprise characteristics allowing an inter-metallic compound to be formed. Therefore, a connection between the conductive paste vias13and33, the wirings12,22, and32, the wiring patterns42and43, and the plated via23is alloyed by an inter-metallic compound during thermal compression bonding of collective stacking.

In this case, the conductive paste is characterized in that electrical connection is performed by contact between fellow metallic particles. Adoptable as a method of filling the conductive paste into the via holes2and3is, for example, a printing method, a spin coating method, a spray coating method, a dispensing method, a laminating method, a method combining use of these methods, and so on.

Note that the first through fourth printed wiring bases10to40are stacked via an adhesive layer9provided beforehand in the first and third printed wiring bases10and30. The adhesive layer9is configured from, for example, a thermosetting resin or a thermoplastic resin. The wiring patterns42and43and the filled plated via44of the fourth printed wiring base40are formed with an extremely fine pitch compared to the wirings12,22, and32, and the conductive paste vias13and33and the plated via23of the first through third printed wiring bases10to30. In addition, the multi-layer wiring board1comprises: the electronic component terminal19formed on a surface side of the first printed wiring base10; and a board terminal39formed on a reverse side of the third printed wiring base30.

These electronic component terminal19and board terminal39are configured from, for example, solder or the like, and are formed on the wiring12formed on a surface side of the first resin base11of the printed wiring base10in a portion thereof not covered by a solder resist18, or on the wiring32formed on a reverse side of the third resin base31of the third printed wiring base30in a portion thereof not covered by a solder resist38.

The electronic component terminal19is connected to the re-wiring electrode91of the electronic component90, and the board terminal39is connected to a land of a mounting board. The electronic component terminal19is formed with a narrow terminal pitch matching its arrangement pitch to that of the re-wiring electrode91, and the board terminal39is formed with a terminal pitch broader than the terminal pitch of the electronic component terminal19.

In the first printed wiring base10in the multi-layer wiring board1configured in this way, the wiring12having formed thereon the electronic component terminal19connected to the outermost re-wiring electrode91of the electronic component90, is formed laid out extending outwardly in a planar direction assuming an installing portion of the electronic component90to be at the center, and the conductive paste via13is formed below a close vicinity to an outer end of that wiring12.

On the other hand, in the first printed wiring base10, the wiring12having formed thereon another inner electronic component terminal19, is formed with a layout substantially matched to the arrangement pitch of the re-wiring electrode91, and the conductive paste via13is formed below that wiring12. Therefore, in this first printed wiring base10, in a first stage, the wiring12and the conductive paste via13are formed such that a terminal pitch broadens between the outermost electronic component terminal19and an electronic component terminal19on the inside thereof.

Next, in the second printed wiring base20, the wiring22and the plated via23result in layout being performed such that the conductive paste via33connected to the plated via23is disposed more outwardly in a planar direction than the conductive paste via13connected to the wiring22. At the same time, in the fourth printed wiring base40housed in the opening29in the second printed wiring base20, the conductive paste via13formed below the wiring12having formed thereon the above-described inner electronic component terminal19is connected to the wiring pattern42.

As mentioned above, the fourth printed wiring base40has formed therein the wiring pattern43whose pattern pitch is broader than that of this wiring pattern42and these wiring patterns42and43are connected by the filled plated via44, hence in the fourth printed wiring base40, layout is performed such that the conductive paste via33connected to the wiring pattern43is disposed more outwardly in a planar direction than the conductive paste via13connected to the wiring pattern42. Therefore, in the fourth printed wiring base40, a terminal pitch of the above-mentioned electronic component terminal19formed on the inside of the outermost electronic component terminal19respectively broadens.

Thus, in a second stage, the second printed wiring base20and the fourth printed wiring base40built in thereto result in a terminal pitch of substantially all of the electronic component terminals19being enlarged. Therefore, in the third printed wiring base30, the wiring32and the board terminal39need only be formed so as to match the arrangement pitch of the conductive paste via33.

Therefore, the multi-layer wiring board1according to the present embodiment is more capable of thinning and more capable of suppressing thickness of the board as a whole even when the number of electronic component terminals19increases, compared to a conventional silicon interposer. Moreover, the fourth printed wiring base40is built in, hence strength of the board as a whole can be more greatly maintained to improve reliability of connection, compared to in a board of the kind where the fourth printed wiring base40is disposed in an outermost layer.

Furthermore, the fourth printed wiring base40is built in to part of the second printed wiring base20, hence can be formed at a cheaper price compared to the case where the entire second printed wiring base20is formed with a fine pitch like the fourth printed wiring base40. Therefore, thinning can be achieved at low cost and reliability of connection can be improved without lowering board strength. Note that if it becomes possible to manufacture the fourth printed wiring base40at a cheap price, a structure may be adopted in which the fourth printed wiring base40is disposed on an entire surface between the first and third printed wiring bases10and30, instead of in the second printed wiring base20.

Next, a manufacturing method of the multi-layer wiring board1according to the present embodiment will be described.

FIGS. 5 to 8are each a flowchart showing a manufacturing process of the multi-layer wiring board1.FIGS. 9A, 9B, 9C, 9D, 9E, 10A, 10B, 10C, 10D, 10E, 11A, 11B, 11C, 11D, 12A, 12B, and12C are each a cross-sectional view showing the multi-layer wiring board1on a manufacturing process basis. Note thatFIGS. 5 and 9A to 9Eshow the manufacturing process of the first printed wiring base10;FIGS. 6 and 10A to 10Eshow the manufacturing process of the second printed wiring base20;FIGS. 7 and 11A to 11Dshow the manufacturing process of the fourth printed wiring base40; andFIGS. 8 and 12A to 12Cshow the manufacturing process of a final process of the multi-layer wiring board1. The third printed wiring base30can be manufactured by a similar process to the manufacturing process of the first printed wiring base10, hence unless specifically mentioned, a description of the manufacturing process of the third printed wiring base30will be omitted.

First, the manufacturing process of the first printed wiring base10will be described with reference toFIG. 5. As shown inFIG. 9A, a single-sided CCL in which a conductor layer8configured from the likes of a solid-state copper foil is formed on one surface of the first resin base11, is prepared (step S100). Next, an etching resist is formed on the conductor layer8by photolithography, and then, as shown inFIG. 9B, etching is performed to form a wiring pattern of the wiring12, and so on (step S102).

The single-sided CCL used in step S100is, for example, configured from a structure in which the first resin base11having a thickness of about 25 μm is affixed to the conductor layer8configured from copper foil having a thickness of about 12 μm. Usable as this single-sided CCL is, for example, a single-sided CCL prepared by applying a varnish of polyimide to copper foil and hardening the varnish, by a publicly known casting method.

Otherwise employable as the single-sided CCL are the likes of a single-sided CCL in which a seed layer is formed on a polyimide film by sputtering and the conductor layer8is formed by growing copper by plating, or a single-sided CCL prepared by attaching a rolled or electrolytic copper foil and a polyimide film by an adhesive material.

Note that the first resin base11is not necessarily required to be configured from a polyimide, and as described above, may be configured from a plastic film of a liquid crystal polymer, or the like. Moreover, an etchant whose main component is the likes of ferric chloride or cupric chloride may be employed in the etching in step S102.

As shown inFIG. 9C, after the wiring12has been formed, an adhesive material9aand a mask material7are attached, by thermal compression bonding, to a surface on an opposite side to a side of formation of the wiring12of the first resin base11(step S104). Employable as the adhesive material9aattached in step S104is, for example, an epoxy system thermosetting film having a thickness of about 25 μm. The thermal compression bonding includes employing a vacuum laminator to press and attach these in a reduced pressure atmosphere, at a temperature where the adhesive material9adoes not harden, by a pressure of 0.3 MPa.

Note that an inter-layer adhesive material employed in the adhesive layer9or the adhesive material9aincludes not only an epoxy system thermosetting resin, but also the likes of an acrylic system adhesive material or a thermoplastic adhesive material typified by a thermoplastic polyimide, or the like. Moreover, the inter-layer adhesive material is not necessarily required to be in a film state, and may have resin coated in a varnish state. Employable as the mask material7are various kinds of films capable of adhesion or detachment by UV irradiation, as well as the above-mentioned resin film or plastic film of PET, PEN, and so on.

Then, a UV-YAG laser device, for example, is employed to irradiate laser light from an attached mask material7side toward the wiring12, whereby the via hole2penetrating the mask material7, the adhesive material9a, and the first resin base11is formed at a certain place (step S106). The via hole2at this time is formed such that its diameter is about 50 μm to 150 μm. Note that desmear processing such as plasma desmear is performed in the via hole2after formation of the via hole2.

The via hole2formed in step S106may otherwise by formed by the likes of a carbon dioxide laser (CO2laser) or an excimer laser, or may be formed by the likes of drill processing or chemical etching. Moreover, the desmear processing can be performed by a mixed gas of CF4and O2(tetrafluoromethane+oxygen), but may also employ another inert gas such as Ar (argon), and may be configured as wet desmear processing employing a chemical, rather than so-called dry processing.

Then, as shown inFIG. 9D, the conductive paste is filled into the formed via hole2by, for example, screen printing, to form the conductive paste via13(step S108) and the mask material7is removed by peeling (step S110), thereby forming, as shown inFIG. 9E, the first printed wiring base10including the first resin base11having formed thereon/therein the wiring12and the conductive paste via13and provided with the adhesive layer9. Note that processing similar to that described above is performed to manufacture and prepare the third printed wiring base30that includes the wiring32or conductive paste via33whose size or arrangement pitch are different.

Next, the manufacturing process of the second printed wiring base20will be described with reference toFIG. 6. Note that places already described are assigned with identical symbols and a description of such places will sometimes be omitted, and that the above-described content is assumed to be applicable to specific processing content of each of the steps. First, as shown inFIG. 10A, a double-sided copper clad laminated board (double-sided CCL) in which the conductor layer8is formed on both surfaces of the second resin base21is prepared (step S120), then, as shown inFIG. 10B, the via hole4is formed at a certain place (step S122), and, for example, plasma desmear processing is performed.

Next, as shown inFIG. 10C, panel plate processing is performed on both surfaces of the second resin base21(step S124) to form a plating layer23aon the conductor layer8and in the via hole4. Note that inFIG. 10C, illustration of a plating layer on an upper side of the conductor layer8is omitted. The plating layer23ainside the via hole4will be employed later as the plated via23, and provides electrical conduction between the conductor layers8of both surfaces of the second resin base21.

Then, as shown inFIG. 10D, etching, and so on, is performed on both surfaces of the second resin base21to form a wiring pattern of the wiring22or the plated via23, and so on (step S126). Finally, as shown inFIG. 10E, the second resin base21at a portion thereof where the fourth printed wiring base40is to be built in is removed by the likes of a UV laser to form the opening29(step S128), thereby forming the second printed wiring base20.

Next, the manufacturing process of the fourth printed wiring base40will be described with reference toFIG. 7.

As shown inFIG. 11A, first, the fourth resin base41configured from the likes of a polyimide resin film is prepared (step S130), and then, as shown inFIG. 11B, an excimer laser or the like is employed to form the via hole5having a diameter of about 10 μm to 30 μm at a certain place of the fourth resin base41(step S132).

After the via hole5has been formed, desmear processing such as plasma desmear is performed (step S134) to form a plating resist not illustrated (step S136), and, as shown inFIG. 11C, the wiring patterns42and43and the filled plated via44are formed by, for example, a semi-additive method (step S138).

Then, the plating resist is removed (step S140), and finally, as shown inFIG. 11D, a device such as a dicer not illustrated is employed to individualize by cutting to a certain size (step S142), thereby manufacturing a plurality of the fourth printed wiring bases40.

When the first through fourth printed wiring bases10to40have been produced in this way, then as shown inFIG. 12A, the wiring pattern42of the fourth printed wiring base40and the conductive paste via13of the first printed wiring base10are aligned using an electronic component mounting device, and the fourth printed wiring base40is provisionally adhered to the first printed wiring base10in a state where the adhesive layer9of the first printed wiring base10and the conductive paste of the conductive paste via13are unhardened.

Then, as shown inFIG. 8, each of the printed wiring bases10to40are positioned and stacked (step S150). Then, for example, a vacuum press is employed to collectively stack by thermal compression bonding by applying heat and pressure in a reduced pressure atmosphere of 1 kPa or less (step S152). As a result, the multi-layer wiring board1of the kind shown inFIG. 12Bis manufactured. At this time, hardening and alloying of the conductive paste filled into the via holes is performed simultaneously to hardening of each of the inter-layer adhesive layers9or each of the resin bases11to41, and so on. Therefore, as mentioned above, an alloy layer of an inter-metallic compound is formed between the conductive paste and the wirings contacting the conductive paste, and so on.

Then, as shown inFIG. 12C, the solder resists18and38are pattern formed on the first and third resin bases11and31on wirings12and32sides of the first printed wiring base10and the third printed wiring base30in the multi-layer wiring board1. Finally, when bumps which are to be the electronic component terminal19and the board terminal39are formed on each of the wirings12and32and the re-wiring electrode91of the electronic component90is connected to the electronic component terminal19to mount the electronic component90, the multi-layer wiring board1of the kind shown inFIG. 1is completed.

In this way, the multi-layer wiring board1according to the present embodiment can be manufactured by the simple manufacturing process of the above-described kind. Specifically, the fact that the fourth printed wiring base40can be installed in a printed wiring base using an ordinary electronic component mounting device for installing an electronic component and can be built in to the multi-layer wiring board1by collective stacking makes it possible to easily manufacture the multi-layer wiring board1in which thinning can be achieved at low cost while reliability of connection is improved without lowering board strength.