Method and device for supplying clock

A clock supplying device for supplying a clock signal to be used in an operation of a communication apparatus, includes an oscillator for generating the clock signal; a measurement unit for acquiring a reference clock signal extracted from a transmission line connected to the communication apparatus, and measuring a frequency difference between the clock signal and the reference clock signal; and a determiner for determining whether a warm-up operation of the oscillator unit has been completed or not, in accordance with measurement results of the frequency difference and a status of power supplying.

CROSS-REFERENCE TO RELATED APPLICATION

This application is based upon and claims the benefit of priority of prior Japanese Patent Application No. 2010-180684, filed on Aug. 12, 2010, the entire contents of which are incorporated herein by reference.

FIELD

A certain aspect of the embodiments discussed herein relates to supplying a clock signal.

BACKGROUND

A communication apparatus such as a radio base station includes a clock supplying device. The clock supplying device supplies a clock signal to be used in a signal process of the communication apparatus. The clock supplying device may include an oven controlled crystal oscillator (OCXO) as an oscillator generating the clock signal. The OCXO includes a crystal oscillator housed in a constant temperature oven, and generates and outputs the clock signal on a stable frequency.

The constant temperature oven is typically set at a relatively high temperature within a range of 70° C. to 80° C. to stabilize the oscillation frequency. A warm-up period may last from when the communication apparatus starts to be supplied with power from power on to when the constant temperature oven rises and reaches a specific temperature. During the warm-up period, the oscillation frequency remains unstable. While the OCXO is in a warm-up period, the communication apparatus may stop part or whole of the signal processing operation thereof.

In one method, a constant period of time from the power-on may be treated as a warm-up period in the warm-up control of the OCXO. In this method, however, the supplying of the clock signal remains stopped until the constant period of time has elapsed even if the warm-up operation is complete in practice. The power supplying may be interrupted and shortly restored. In such a case, the constant temperature oven may be already high when the power supplying resumes. The warm-up operation may be complete within a short period of time. Even in such a case, the communication apparatus is forced to wait on standby until the constant period of time has elapsed.

Another type of radio base station includes an OCXO and a temperature compensated crystal oscillator (TCXO). This type of radio base station compares a clock, into which an output of the OCXO is frequency divided, with a clock, into which an output of the TCXO is frequency-divided, and determines whether the OCXO has completed the warm-up operation in response to the phase difference. This arrangement shortens an excessively long warm-up waiting time.

Another type of clock supplying device has a duplicate structure to detect a fault therewithin. The clock supplying device measures a frequency difference between a reference clock input from the outside for system synchronization and each of the output clocks of an operative OCXO and a backup OCXO. The clock supplying device then identifies a fault in an operative clock, a backup clock, and the reference clock.

SUMMARY

According to an aspect of an embodiment, a clock supplying device for supplying a clock signal to be used in an operation of a communication apparatus, includes an oscillator for generating the clock signal; a measurement unit for acquiring a reference clock signal extracted from a transmission line connected to the communication apparatus, and measuring a frequency difference between the clock signal and the reference clock signal; and a determiner for determining whether a warm-up operation of the oscillator unit has been completed or not, in accordance with measurement results of the frequency difference and a status of power supplying.

DESCRIPTION OF EMBODIMENTS

A clock supplying device for supplying a clock signal to be used in a communication apparatus is provided to overcome the above problems. The clock supplying device includes an oscillator unit, a measurement unit, and a determiner. The oscillator unit generates the clock signal. The measurement unit acquires a reference clock signal extracted from a transmission line connected to a communication apparatus, and measures a frequency difference between the clock signal and the reference clock signal. The determiner determines, in accordance with the measurement results of the measurement unit and a status of power supplying, whether a warm-up operation of the oscillator unit has been completed.

A clock supplying method is provided to overcome the problem. The clock supplying method is used to supply the clock signal to be used in an operation of a communication apparatus. The clock signal is generated using the oscillator unit. The reference clock signal extracted from a transmission line connected to the communication is acquired, and the frequency difference between the clock signal and the reference clock signal is measured. Whether the warm-up operation of the oscillator has been completed or not is determined in accordance with the measurement results of the frequency difference and a status of power supplying.

The clock supplying device and the clock supplying method easily determine whether the warm-up operation of the oscillator has been completed or not.

The embodiments are described below with reference to the drawings.

FIG. 1is a block diagram of a clock supplying device1of a first embodiment. The clock supplying device1of the first embodiment is mounted on a communication apparatus and supplies a clock signal to be used in an operation of the communication apparatus. The communication apparatus may include but is not limited to a radio base station. The clock supplying device1includes an oscillator unit1a, a measurement unit1b, and a determiner1c.

The oscillator unit1agenerates the clock signal. The oscillator unit1amay include but is not limited to an OCXO. The oscillator unit1atakes a warm-up period before the oscillation frequency thereof becomes stable. The warm-up period lasts from when the oscillator unit1astarts generating the clock signal with power supplied thereto to when the oscillation frequency becomes stable. The warm-up period time depends on a temperature of a constant temperature oven when the power supplying starts.

The measurement unit1bacquires a reference clock signal extracted from a transmission line connected to a communication apparatus. The transmission line may include a wired line connecting a radio base station to a radio network controller (RNC). The reference clock signal is used to establish synchronization between communication apparatuses. The measurement unit1bmeasures a frequency difference between the clock signal generated by the oscillator unit1aand the reference clock signal.

The determiner1cacquires as measurement results the frequency difference measured by the measurement unit1b. The determiner1cmonitors a status of power supplied to one of the clock supplying device1and the oscillator unit1a. Depending the measurement results of the frequency difference and the status of the supplied power, the determiner1cdetermines whether the warm-up operation of the oscillator unit1ahas been completed. After the power supplying starts, the determiner1cdetermines that the warm-up operation is completed when the measurement results come to satisfy a specific permission condition for the first time.

The determiner1cmay also detect a fault in the clock signal generated by the oscillator unit1aor the reference clock signal. The determiner1cdetermines that a fault has taken place if the measurement results come to fail to satisfy the specific permission condition after the completion of the warm-up operation (i.e., the measurement results once satisfy the specific permission condition). The determiner1calso determines that a fault has taken place if the measurement results come to fail to satisfy the specific permission condition within a specific period of time subsequent to the start of the power supplying.

The oscillator unit1ain the clock supplying device1generates the clock signal. The measurement unit1bacquires the reference clock signal extracted from the transmission line connected to the communication apparatus, and measures the frequency difference between the clock signal and the reference clock signal. In response to the measurement results of the frequency difference and the status of the supplied power, the determiner1cdetermines whether the oscillator unit1ahas completed the warm-up operation.

Whether the warm-up operation of the oscillator unit1ahas been completed or not is thus easily determined. In accordance with the measurement results of the frequency difference, the determiner1cdetermines whether the warm-up operation has been completed or not. The clock supplying device1reduces an excessive waiting time more than the method of treating a constant period of time as a warm-up period. Since the measurement unit1bmeasures the frequency difference using the reference clock signal extracted from the transmission line, the circuit scale of the clock supplying device1is reduced. A drop in the determination accuracy of the warm-up completion is reduced. The determiner1cmay detect a fault in addition to the completion of the warm-up operation.

The clock supplying device1may be commercially available as a standalone component. Alternatively, the clock supplying device1may be commercially available in a state built in the communication apparatus. The clock supplying device1may be built in a variety of communication apparatuses. In a second embodiment, the clock supplying device having an OCXO and generating a clock signal is installed in a radio base station.

FIG. 2illustrates a mobile communication system of the second embodiment. The mobile communication system of the second embodiment includes radio base station10, radio network control (RNC) apparatus20, core network30, and mobile station40. The radio base station10is connected to the RNC apparatus20via a wired transmission line. The RNC apparatus20is connected to the core network30via a wired transmission line.

The radio base station10performs radio communications with the mobile station40. The radio base station10receives user data from the RNC apparatus20and wirelessly transmits the user data to the mobile station40. The radio base station10wirelessly receives user data from the mobile station40, and transmits the user data to the core network30via the RNC apparatus20. Upon being powered on by a mobile communication operator, the radio base station10starts operating. If the radio base station10is installed in an area where power supplying conditions are unstable, power supplying may be interrupted. When power is restored, the radio base station10performs a resume operation.

The RNC apparatus20controls the radio base station10. More specifically, the RNC apparatus20allocates a radio channel to the mobile station40, and performs handover control to the mobile station40as the mobile station40moves. The RNC apparatus20transfers the user data between the radio base station10and the core network30. The radio base station10and the RNC apparatus20form a radio access network (RAN).

The core network30performs voice communications via line switching, and data communications via packet switching. The core network30includes a line switching system and a packet switching system. The core network30also includes a database storing subscriber information of the mobile station40, and a database storing location information of the mobile station40.

The mobile station40is linked to the radio base station10. The mobile station40under the control of the radio base station10performs radio communications. The mobile station40wirelessly transmits user data to the radio base station10, and wirelessly receives user data from the radio base station10. A subscriber station (fixed radio terminal), which is not mobile, may be linked to the radio base station10.

FIG. 3is a block diagram of the radio base station of the second embodiment. The radio base station10includes a controller module11and a radio module12. The controller module11and the radio module12may be respectively constructed of integrated circuits (IC), and linked via digital signal lines.

The controller module11performs a digital baseband signal process and controls a radio signal process of the radio module12. The controller module11includes transmission line interfaces (I/Fs)13nand13e, clock supplying units14nand14e, radio I/F15, and control processors16aand16b. The radio module12under the control of the controller module11performs a radio signal process. The radio module12includes a controller I/F17and a radio processor18.

The transmission line I/Fs13nand13eare wired communication interfaces connected to the transmission line between the radio base station10and the RNC apparatus20. The transmission line I/Fs13nand13eare arranged for redundancy. The transmission line I/F13nis a normal system (hereinafter referred to as an N system) that is used in a normal operation. The transmission line I/F13eis an emergency system (hereinafter referred to as an E system) that is used when the transmission line I/F13nmalfunctions. The clock supplying units14nand14econtrol the switching between the reference clock signals of the transmission line I/Fs13nand13e.

The transmission line I/Fs13nand13erespectively extract the reference clock signals from the transmission line, and then outputs the reference clock signals to the clock supplying units14nand14e. The transmission line I/Fs13nand13eserve as reference clock suppliers. The reference clock signal is used to synchronize the radio base station10with the RNC apparatus20, and the frequency of the reference clock signal is about 8 kHz, for example.

The clock supplying units14nand14esupply a system clock signal (5 MHz, for example) to be used in signal processing of the controller module11and the radio module12. The clock supplying units14nand14eare arranged for redundancy. The clock supplying unit14nis an N system, and the clock supplying unit14eis an E system. The clock supplying units14nand14eoutput a system clock signal to the radio I/F15and the control processors16aand16b. The clock supplying units14nand14eperform warm-up control of oscillators generating the system clock signal, detect a fault, and switch between the N system and the E system. The warm-up control and the fault detection are described later.

The radio I/F15receives a signal from and outputs a signal to the radio module12. The radio I/F15outputs a baseband signal to the radio module12as a transmission signal to the mobile station40, and acquires a baseband signal from the mobile station40as a reception signal. The radio I/F15outputs the system clock signal supplied from the clock supplying units14nand14eto the radio module12.

The control processors16aand16bperform a variety of processes on radio communications between the radio base station10and the mobile station40.FIG. 3illustrates the two control processors16aand16b. Optionally, the controller module11may include three or more control processors. The control processors16aand16bperform call control, file data control, and baseband signal process of the transmission signal and the reception signal. The control processors16aand16bperform the process thereof using the system clock signal supplied from the clock supplying units14nand14e.

The control processors16aand16brespectively include gate circuits for switching between conducting and blocking the system clock signal output by the clock supplying units14nand14e. The gate circuit blocks the system clock signal during the warm-up operation of the oscillator unit or during malfunction. In response to a system clock select (SEL) signal output by the clock supplying units14nand14e, the gate circuit determines whether to receive the system clock signal and determines which of the system clock signals output by the clock supplying units14nand14eto receive.

The controller I/F17receives a signal from and outputs a signal to the controller module11. The controller I/F17acquires the baseband signal as the transmission signal from the controller module11, and then outputs the baseband signal to the radio processor18. The controller I/F17acquires the baseband signal as the reception signal from the radio processor18, and outputs the baseband signal to the controller module11. The controller I/F17outputs to the radio processor18the system clock signal supplied by the clock supplying units14nand14evia the radio I/F15. As the control processors16aand16b, the controller I/F17includes a gate circuit. The gate circuit switches between conducting and blocking the system clock signal.

The radio processor18processes a radio signal transmitted to or received from the mobile station40. The radio processor18down-converts a radio signal received from the mobile station40via an antenna into a baseband signal, and then outputs the baseband signal to the controller I/F17. The radio processor18up-converts a baseband signal acquired via the controller I/F17into a radio signal and then outputs the radio signal via the antenna. The radio processor18performs a radio signal process using the system clock signal acquired via the controller I/F17.

FIG. 4is a block diagram of the clock supplying units14nand14eof the second embodiment. The clock supplying unit14nincludes selector141n, oscillator142n, measurement unit143n, detector144n, determiner145n, and clock output unit146n. Similarly, the clock supplying unit14eincludes selector141e, oscillator142e, measurement unit143e, detector144e, determiner145e, and clock output unit146e.

The selector141nacquires the reference clock signals from each of the transmission line I/Fs13nand13e, selects the reference clock signal from one of the transmission line I/Fs13nand13e, and outputs the selected reference clock signal to the measurement unit143n. The selection of the reference clock signal is performed in response to a reference clock SEL signal output from the determiner145n. The selector141ein the E system performs an operation similar to the operation of the selector141n. The reference clock signal selected by the selector141nis identical to the reference clock signal selected by the selector141e.

The oscillator142ngenerates a clock signal (having 5 MHz, for example). The oscillator142nis an OCXO. The oscillator142noutputs the generated clock signal to each of the measurement unit143nand the clock output unit146n. The oscillator142ein the E system performs an operation similar to the operation of the oscillator142n.

The measurement unit143nmeasures a frequency difference between the reference clock signal acquired via the selector141nand the clock signal acquired from the oscillator142n. If the measurement result falls outside a specific permission range, the measurement unit143noutputs a fault detection signal to the detector144n. If the measurement result falls within the specific permission range, the measurement unit143noutputs a fault recovery signal to the detector144n. The measurement unit143ein the E system performs an operation similar to the operation of the measurement unit143n.

The detector144ndetects a frequency difference measurement fault (frequency unacceptable) in response to the acquisition result of the fault detection signal or the fault recovery signal from the measurement unit143n. For example, the detector144ndetermines the frequency unacceptable if the fault detection signal has been consecutively received by a predetermined number of times, or if the fault detection signal has been received beyond a predetermined number of times within a specific period of time. The detector144nthus controls erroneous detection of fault by waiting on standby for a plurality of fault detection signals. It is also acceptable that the detector144ndetermines in response to a single reception of the fault detection signal that the frequency is unacceptable.

The detector144nalso detects a normal frequency difference measurement result (frequency acceptable) in a manner similar to the unacceptable frequency determination. The detector144nnotifies the determiners145nand145eof the N system measurement result indicative of the acceptable frequency or the unacceptable frequency. More specifically, the detector144nnotifies the determiners145nand145eof the measurement result at the timing the frequency becomes acceptable for the first time after power on. The detector144nnotifies the determiners145nand145eof the N system measurement result each time the acceptable frequency and the unacceptable frequency alternate. Alternatively, the detector144nnotifies the determiners145nand145eof the N system measurement result at a timing other than the timing the acceptable frequency and the unacceptable frequency alternate. The detector144eperforms an operation similar to the operation of the detector144n. The detector144ethus notifies the determiners145nand145eof the E system measurement result.

The determiner145nacquires the N system measurement result from the detector144n, and the E system measurement result from the detector144e. In response to the N and E system measurement results, the determiner145ndetermines whether each of the oscillator142nand the oscillator142ehas completed the warm-up operation. The determiner145ndetects any fault in the clock signal generated by the oscillator142n, the clock signal generated by the oscillator142e, and the reference clock signal.

In response to the determination results, the determiner145ngenerates the system clock SEL signal, and then outputs the generated system clock SEL signal to the radio I/F15and the control processors16aand16b. Upon determining that the reference clock signal is faulty, the determiner145ngenerates a reference clock SEL signal and then outputs the generated reference clock SEL signal to the selector141n. The determiner145eperforms an operation similar to the operation of the determiner145n. If the reference clock signal is found to be faulty, the determiner145eoutputs a reference clock SEL signal to the selector141e.

The clock output unit146nacquires the clock signal generated by the oscillator142nand then outputs the clock signal as an N system clock signal to the radio I/F15, and the control processors16aand16b. The clock output unit146eacquires the clock signal generated by the oscillator142e, and outputs the clock signal as an E system clock signal to the radio I/F15and the control processors16aand16b.

FIG. 5is a block diagram of a measurement unit143of the second embodiment. The measurement unit143is used for each of the measurement units143nand143e. The measurement unit143includes monitor reference timer1431, frequency counter1432, count monitor1433, and notifier unit1444.

The monitor reference timer1431measures a specific time in accordance with a clock signal generated by the oscillator unit as a reference. For example, the monitor reference timer1431measures one second using a 5 MHz clock signal as a reference. The monitor reference timer1431then outputs to the frequency counter1432and the count monitor1433a frame signal indicating the measurement start of the specific time and the measurement end of the specific time.

The frequency counter1432counts the clock of the reference clock signal every period indicated by the frame signal from the monitor reference timer1431. For example, the frequency counter1432counts rising edges of the 8 kHz reference clock signal during 1 second, measured with respect to the clock signal of the oscillator. The frequency counter1432outputs the count value to the count monitor1433.

Every period of the frame signal from the monitor reference timer1431, the count monitor1433determines whether the count acquired from the frequency counter1432falls within a specific permission range. If the reference clock signal is 8 kHz, and the one period of the frame signal is 1 second, the permission range may be set to be within 7999 to 8001. The count monitor1433then notifies the notifier unit1444whether the count value is within the permission range.

Upon receiving from the count monitor1433a notification that the count value falls outside the permission range, the notifier unit1444generates and outputs the fault detection signal. Upon receiving from the count monitor1433that the count value falls within the permission range, the notifier unit1444generates and outputs the fault recovery signal.

FIG. 6is a timing chart illustrating the measurement method of the frequency difference. As illustrated inFIG. 6, the measurement unit143measures 1 second with reference to the 5 MHz clock signal generated by the oscillator. The measurement unit143then counts the rising edges of the 8 kHz reference clock signal throughout the time measured in accordance with the clock signal of the oscillator.

If the clock signal of the oscillator and the reference clock signal are both accurately output, 8000 rising edges are counted. A permission range of 7999-8001 may be set up with a degree of tolerance accounted for. The probability that both the clock signal of the oscillator and the reference clock signal are faulty is considered to be low. The count value falling within the permission range may indicate that the two signals are normal, and the count falling outside the permission range may indicate that one of the two signals is faulty.

FIG. 7is a block diagram of a determiner145of the second embodiment. The determiner145may be used as one of the determiners145nand145e. The determiner145includes state manager1451, fault state display1452, warm-up state display1453, reference clock SEL signal generator1454, N system/E system switch1455, and system clock SEL signal generator1456.

The state manager1451acquires the N system measurement result from the detector144n, and the S system measurement result from the detector144e. The state manager1451monitors the status of power supplied to the clock supplying units14nand14eand the oscillators142nand142e. The state manager1451manages the state of the clock supplying units14nand14ein response to the N system measurement result and the S system measurement result and the power supply status. The state manager1451thus determines the fault state and the warm-up state. The state manager1451notifies the fault state display1452and the N system/E system switch1455of the fault state. The state manager1451notifies the warm-up state display1453and the N system/E system switch1455of the warm-up state.

The fault state display1452controls the lighting of a lamp to indicate whether the clock supplying units14nand14eare in a fault state or not. For example, the fault state display1452lights the lamp in a manner that allows the user to learn whether both the N system and the E system, only the N system, or only the E system is faulty. Each of the determiners145nand145econtrols the state displaying of both systems. Alternatively, the determiner145nmay control the displaying of the state of the N system, and the determiner145emay control the displaying of the state of the E system.

The warm-up state display1453controls the lighting of a lamp to indicate whether the warm-up operation is in progress in the clock supplying units14nand14e. For example, the warm-up state display1453lights the lamp in a manner that allows the user to learn whether both the N system and the E system have completed the warm-up operation, the warm-up operation is in progress in the N system, or the warm-up operation is in progress in the E system. Each of the determiners145nand145econtrols the state displaying of both systems. Alternatively, the determiner145nmay control the displaying of the state of the N system, and the determiner145emay control the displaying of the state of the E system.

Upon being notified of a fault in the reference clock signal from the state manager1451, the reference clock SEL signal generator1454generates a reference clock SEL signal indicating the switching between the transmission line I/Fs13nand13e. The reference clock SEL signal is then output to one of the selector141nand the selector141e.

Upon being notified of the fault state and the warm-up state from the state manager1451, the N system/E system switch1455determines whether to enable the N and E system clock signals. The N system/E system switch1455then notifies the N system/E system switch of the other system of the determination. The N system/E system switch1455also notifies the system clock SEL signal generator1456of the determination.

In response to the notification from the N system/E system switch1455, the system clock SEL signal generator1456generates a system clock SEL signal indicating whether to enable or disable the N and E system clock signals. For example, the system clock SEL signal discriminates whether both the N system and the E system are on, only the N system is on, or only the E system is on. The system clock SEL signal is then output to the radio I/F15and the control processors16aand16b. Each of the determiners145nand145emay control both the N system on and the E system on. Alternatively, the determiner145nmay control the N system on, and the determiner145emay control the E system on.

FIG. 8is a block diagram illustrating the state manager1451of the second embodiment. The state manager1451includes warm-up/fault determiner110, power monitor111, and warm-up notification generator112.

The warm-up/fault determiner110acquires the N measurement result and the E measurement result. The warm-up/fault determiner110receives from the power monitor111a notification of the start of power (power-on) and a notification of interruption and end (power-off). In response to the notification of the power-on, the warm-up/fault determiner110starts up the monitor timer. The warm-up/fault determiner110manages state transition in response to a variety of triggers. The triggers include the power-on, the power-off, the N system frequency acceptable, the N system frequency unacceptable, the E system frequency acceptable, the E system frequency unacceptable, and the time-out. In response to a state subsequent to a transition, the warm-up/fault determiner110generates and outputs a fault notification, and notifies the warm-up notification generator112of the warm-up state.

The power monitor111monitors the power supply status to the clock supplying units14nand14eor the oscillators142nand142e. Upon detecting the power-on or the power-off, the power monitor111notifies of the warm-up/fault determiner110of the detected power-on or power-off.

In response to a notification from the warm-up/fault determiner110, the warm-up notification generator112notifies generates and outputs a warm-up notification indicative of the system in the warm-up operation.

FIG. 9is a block diagram illustrating a first mounting example of the state manager1451. The state manager1451includes central processing unit (CPU)101, bus bridge102, memory103, power monitor111, warm-up notification generator112, measurement result I/F113, power monitor I/F114, fault notification generator115, and I/F controller116.

The warm-up/fault determiner110corresponds to a group of the CPU101, the bus bridge102, the memory103, the measurement result I/F113, the power monitor I/F114, the fault notification generator115, and the I/F controller116. The warm-up notification generator112, the measurement result I/F113, the power monitor I/F114, the fault notification generator115, and the I/F controller116may be mounted as a field programmable gate array (FPGA) or a large-scale integrated circuit (LSI).

The CPU101executes a program of state management. The CPU101acquires event data from one of the measurement result I/F113and the power monitor I/F114, decides a next state, and then determines whether to perform a fault notification or a warm-up notification responsive to the decided next state. The CPU101then outputs notification data to one of the warm-up notification generator112and the fault notification generator115. The CPU101executes the program for state management. Upon receiving a command from a management terminal, the CPU101reports the present position of the management terminal and modifies the setting of the management terminal. To access the memory103, the CPU101specifies a memory address.

The bus bridge102causes data to be exchanged between the CPU101, the memory103, and the I/F controller116.

The memory103is a volatile memory temporarily storing a program and data. Subsequent to power-on, a state management program and data (such as a state transition table) referenced in a process of the state management program are expanded on the memory103. The state management program and the referenced data are pre-stored on a non-volatile memory (not illustrated) in the state manager1451. The memory103performs a write operation to a memory area corresponding to an address specified by the CPU101and a read operation to a memory area corresponding to an address specified by the CPU101.

As described above, the power monitor111monitors the power supply status. Upon detecting a power-on operation or a power-off operation, the power monitor111notifies the power monitor I/F114of the power-off operation or the power-on operation.

The warm-up notification generator112acquires the notification data from the CPU101via the I/F controller116. As described above, the warm-up notification generator112generates and outputs the warm-up notification indicative of the system in the warm-up operation.

The measurement result I/F113acquires the N system measurement result and the E system measurement result. The measurement result I/F113generates event data of the measurement results (the N system frequency acceptable, the N system frequency unacceptable, the E system frequency acceptable, and the E system frequency unacceptable), and outputs the event data to the CPU101via the I/F controller116.

The power monitor I/F114acquires a notification of the power supply status from the power monitor111. The power monitor I/F114then generates event data related to the power (power acceptable and power unacceptable), and outputs the event data to the CPU101via the I/F controller116.

The fault notification generator115acquires the notification data from the CPU101via the I/F controller116. The fault notification generator115generates and outputs a fault notification indicative of a location of fault.

The I/F controller116controls data exchange with the bus bridge102. The I/F controller116may be connected to the bus bridge102via peripheral component interconnect (PCI) or PCI-X. The I/F controller116connects to the warm-up notification generator112, the measurement result I/F113, the power monitor I/F114, and the fault notification generator115.

FIG. 10is a block diagram of a second mounting example of the state manager1451. The state manager1451includes CPU101, bus bridge102, memory103, power monitor111, warm-up notification generator112, measurement result I/F113, power monitor I/F114, fault notification generator115, I/F controller116, and state transition controller117.

The warm-up/fault determiner110corresponds to a group including the measurement result I/F113, the power monitor I/F114, the fault notification generator115, and the state transition controller117. The warm-up notification generator112, the measurement result I/F113, the power monitor I/F114, the fault notification generator115, the I/F controller116, and the state transition controller117are mounted as an FPGA or LSI.

The CPU101executes a program for management as in the first mounting example. Unlike the first mounting example, the second mounting example is free from execution of the program for state management. The operation of the bus bridge102, the memory103, the power monitor111, and the I/F controller116is identical to the operation of the counterparts in the first mounting example.

The warm-up notification generator112acquires notification data from the state transition controller117, and generates and outputs a warm-up notification. The measurement result I/F113acquires the N system measurement result and the E system measurement result, generates event data related to the measurement results, and outputs the event data to the state transition controller117. The power monitor I/F114acquires a notification of the power supply status from the power monitor111, generates the event data related to the power supply, and then outputs the event data to the state transition controller117. The fault notification generator115acquires notification data from the state transition controller117, and generates and outputs a fault notification indicative of a location of fault.

The state transition controller117acquires event data from one of the measurement result I/F113, and the power monitor I/F114, decides a next state, and determines whether to perform a fault notification or a warm-up notification in response to the decided state. The state transition controller117then outputs the notification data to one of the warm-up notification generator112and the fault notification generator115. The state transition controller117implements in a wired logic the state management function of the CPU101of the first mounting example. The state transition controller117may include a non-volatile memory storing the state transition table.

FIG. 11is a table defining the stages of the clock supplying units14nand14e. States #1-#10are defined with reference to the clock supplying units14nand14e. More specifically, the states #1-#10are defined in accordance with a combination of states of own system and the other system (power-off, warm-up in progress, fault, normal). If viewed from the clock supplying unit14n, own system is the N system, and the other system is the E system. If viewed from the clock supplying unit14e, on the other hand, own system is the E system, and the other system is the N system.

(1) In state #1, both own system and the other system are powered off (initial state).

(2) In state #2, both own system and the other system are in the warm-up operation.

(3) In state #3, own system is in a normal operation, while the other system is in the warm-up operation.

(4) In state #4, own system is in the warm-up operation, while the other system is in the normal operation.

(5) In state #5, both own system and the other system are in the normal operation.

(6) In state #6, own system is in a fault state, while the other system in the warm-up operation.

(7) In state #7, own system in the fault state, while the other system is in the normal state.

(8) In step #8, own system is in the warm-up operation, while the other system is in the fault state.

(9) In step #9, own system in the normal state, while the other state is in the fault state.

(10) In step #10, own system is in the fault state, while the other system is in the fault state.

FIG. 12is a table defining state transitions of the clock supplying unit. The state manager1451may retain as data a state transition table ofFIG. 12, and may manage states.

(1) If power-on is detected in state #1, the state manager1451transitions to state #2. The monitor timer having a specific time set therein is started. With power supplied, the oscillators142nand142estart generating the clock signals.

(2) If own system frequency acceptable is detected in state #2, the state manager1451transitions to state #3. If the other system frequency acceptable is detected, the state manager1451transitions to state #4. If the time-out of the monitor timer is detected, it is suspected that the reference clock signal is faulty. The state manager1451transitions to state #10. If the power-off is detected, the monitor timer stops and the state manager1451transitions to state #1.

(3) If the other system frequency acceptable is detected in state #3, the monitor timer stops. The state manager1451transitions to state #5. If own system frequency unacceptable is detected, the state manager1451transitions to state #6. If the time-out of the monitor timer is detected, the state manager1451transitions to state #9. If the power-off is detected, the monitor timer stops, and the state manager1451transitions to state #1.

(4) If own system frequency acceptable is detected in state #4, the monitor timer stops, and the state manager1451transitions to state #5. If the other system frequency unacceptable is detected, the state manager1451transitions to state #8. If the time-out of the monitor timer is detected, the state manager1451proceeds to state #7. If the power-off is detected, the monitor timer stops, and the state manager1451transitions to state #1.

(5) If own system frequency unacceptable is detected in state #5, the state manager1451transitions to state #7. If the other system frequency unacceptable is detected, the state manager1451transitions to state #9. If the power-off is detected, the state manager1451transitions to state #1.

(6) If own system frequency acceptable is detected in state #6, the state manager1451transitions to state #3. If the other system frequency acceptable is detected, the monitor timer stops, and the state manager1451transitions to state #7. If the time-out of the monitor timer is detected, the state manager1451transitions to state #10. If the power-off is detected, the monitor timer stops and the state manager1451transitions to state #1.

(7) If own system frequency acceptable is detected in state #7, the state manager1451transitions to sate #5. If the other system frequency unacceptable is detected, the state manager1451transitions to state #10. If the power-off is detected, the state manager1451transitions to state #1.

(8) If own system frequency acceptable is detected in state #8, the monitor timer stops, and the state manager1451transitions to state #9. If the other system frequency acceptable is detected, the state manager1451transitions to state #4. If the time-out of the monitor timer is detected, the state manager1451transitions to state #10. If the power-off is detected, the monitor timer stops and the state manager1451transitions to state #1.

(9) If the other system frequency acceptable is detected in state #9, the state manager1451transitions to state #5. If own system frequency unacceptable is detected, the state manager1451transitions to state #10. If the power-off is detected, the state manager1451transitions to state #1.

(10) If own system frequency acceptable is detected in state #10, the state manager1451transitions to state #9. If the other system frequency acceptable is detected, the state manager1451transitions to state #7. If the power-off is detected, the state manager1451transitions to state #1.

FIG. 13illustrates part of the state transition of the clock supplying unit. States #2-#9are divided into four groups depending on whether both the clock supplying units14nand14ehave completed the warm-up operation and whether both the clock supplying units14nand14eoperate in normal condition.

States #2, #3, and #4indicate that the clock supplying units14nand14eoperate in a normal condition although at least one of the clock supplying units14nand14eis in the warm-up operation. States #6and #8indicate that one of the clock supplying units14nand14eis in the warm-up operation but the other of the clock supplying units14nand14emalfunctions. States #7and #9indicate that one of the clock supplying units14nand14ecomes to malfunction after both the clock supplying units14nand14ehave completed the warm-up operation. State #5indicates that both the clock supplying units14nand14eoperate in a normal condition after having completing the warm-up operation.

As illustrated inFIG. 13, a period from the start of the power supplying to the first occurrence of the frequency acceptable (i.e., duration of the frequency unacceptable) is regarded as the warm-up period. In contrast, a transition from the frequency acceptable to the frequency unacceptable is regarded as an occurrence of a fault. Once the warm-up operation has been regarded as being completed, the warm-up operation does not resume unless the event of the power-on or the power-off occurs.

FIG. 14is a table listing the outputs of the clock supplying unit. The determiners145nand145eperform the operation ofFIG. 14in response to the states #1-#10.

(1) In state #1, the system clock SEL signal is set to be off (in a state with none of the N and E system clock signals selected). Neither the fault state nor the warm-up state is displayed.

(2) In state #2, the system clock SEL signal is set to be off. The N system and the E system are displayed to be in the warm-up operation.

(3) If the N system is in state #3(with the E system in state #4), the system clock SEL signal is set to an N system on (with the N system clock signal selected). The E system is displayed to be in the warm-up operation. The system clock SEL signal may be set to be off until the completion of the E system warm-up.

(4) If the N system is in state #4(with the E system in state #3), the system clock SEL signal is set to be off. The N system is displayed to be in the warm-up operation.

(5) In state #5, the system clock SEL signal is set to be the N system on. Both the N system and the E system are displayed to be in a normal condition.

(6) If the N system is in state #6(with the E system in #8), the system clock SEL signal is set to be off. The N system is displayed to be faulty, and the E system is displayed to be in the warm-up operation.

(7) If the N system is in state #7(with the E system in state #9), the system clock SEL signal is set to be the E system on (with the clock signal of the E system selected). The N system is displayed to be faulty.

(8) If the N system is in state #8(with the E system in state #6), the system clock SEL signal is set to be off. The E system is displayed to be faulty, and the N system is displayed in the warm-up operation.

(9) If the N system is in state #9(with the E system in state #7), the system clock SEL signal is set to be the N system on. The E system is displayed to be faulty.

(10) In state #10, the system clock SEL signal is set to be off. The determiners145nand145egenerate the reference clock SEL signals indicative of the switching of the reference clock signal. The determiners145nand145emay indicate that the reference clock signal is faulty.

FIG. 15is a flowchart illustrating the state management of the clock supplying unit. This flowchart focuses on one of the N system measurement result and the E system measurement result as a state transition trigger. In the discussion that follows, the clock supplying unit14nperforms on the N system measurement result the process thereof in accordance with operation numbers ofFIG. 15. The clock supplying unit14ealso performs a process similar to the process of the clock supplying unit14n.

(Operation S11) The determiner145ndetects the start of power supplying (power-on). The power-on may be detected when a user operates a power switch, or when power is restored after an interruption of the power supply.

(Operation S12) The determiner145ndetermines that the oscillator142nis in the warm-up operation. Immediately subsequent to the power-on, the oscillator142eis also determined as being in the warm-up operation.

(Operation S13) The measurement unit143nmeasures a frequency difference between the clock signal generated by the oscillator142nand the reference clock signal extracted by the transmission line I/F13n. The measurement unit143nthen determines whether the frequency difference is within the permission range.

(Operation S14) Depending on whether the frequency difference falls within the permission range, the detector144ndetermines whether the clock signal of the oscillator142nis frequency acceptable or not. If the clock signal is frequency acceptable, processing proceeds to operation S16. If the clock signal is not frequency acceptable, processing proceeds to operation S15.

(Operation S15) The determiner145ndetermines whether a specific period of time has elapsed since the detection of the power-on. If the specific period of time has elapsed, the clock supplying unit14nproceeds to operation519. If the specific period of time has not elapsed, the clock supplying unit14nreturns to operation S13.

(Operation S16) The determiner145nthen determines that the oscillator142nhas completed the warm-up operation and thus operates normally. State transition is performed. Subsequent to the state transition, the determiner145noutputs the system clock SEL signal and displays the state.

(Operation S17) The measurement unit143nmeasures a frequency difference between the clock signal generated by the oscillator142nand the reference clock signal. The measurement unit143ndetermines whether the frequency difference falls within a permission range.

(Operation S18) Depending on whether the frequency difference falls within the permission range, the detector144ndetermines whether the clock signal of the oscillator142nis frequency acceptable. If the clock signal is frequency acceptable, processing returns to operation S17. If the clock signal is frequency unacceptable, processing proceeds to operation S19.

(Operation S19) The determiner145ndetermines that the oscillator142nis faulty. In other words, state transition is performed. Depending on the state subsequent to state transition, the determiner145noutputs the system clock SEL signal and displays the state.

(Operation S20) The measurement unit143nmeasures a frequency difference between the clock signal generated by the oscillator142nand the reference clock signal. The measurement unit143nthen determines whether the frequency difference falls within the permission range.

(Operation S21) Depending on whether the frequency difference falls within the permission range, the detector144ndetermines whether the clock signal of the oscillator142nis frequency acceptable. If the clock signal is frequency acceptable, processing returns to operation S16. If the clock signal is frequency unacceptable, processing returns to operation S20.

The determiner145nthen determines that the oscillator142nis in the warm-up operation from the detection of the power-on to the detection of the first frequency acceptable. The frequency unacceptable subsequent to the completion of the warm-up operation indicates a fault. If the frequency unacceptable is followed by the frequency acceptable, the determiner145ndetermines that the fault is corrected. If the power-on is not followed by the frequency acceptable within a specific period of time, the determiner145ndetermines that a fault exists. If both the N system and the E system are faulty, a faulty reference clock signal may be suspected of being faulty.

In response to the measurement results of the frequency difference, the radio base station10of the second embodiment determines the timing of the completion of the warm-up operation of the oscillators142nand142e. An excessive waiting time is thus reduced in comparison with the method of treating a constant period of time as a warm-up time. Since the reference clock signal extracted from the transmission line is used to measure the frequency difference, the clock supplying units14nand14eneed no more oscillator for measuring the frequency difference. The scale of the device is reduced.

The determiners145nand145emanage the state transition triggered by the event related to the frequency difference, and the event related to the power supply status. The determiners145nand145emanage the completion of the warm-up operation and the generation of the fault in a consistent fashion. Consistency between the warm-up control and the switching control of the N system and the E system is assured. Appropriate clock supplying control is performed.

All examples and conditional language recited herein are intended for pedagogical purposes to aid the reader in understanding the invention and the concepts contributed by the inventor to furthering the art, and are to be construed as being without limitation to such specifically recited examples and condition, nor does the organization of such examples in the specification relate to a showing of superiority and inferiority of the invention. Although the embodiment of the present inventions have been described in detail, it should be understood that the various changes, substitutions, and alternations could be made hereto without departing from the spirit and scope of the invention.