Wilkinson power combiner, communication unit and method therefor

A Wilkinson power combiner (202) is described that includes: at least one input port (210) coupled to at least one output port (212, 214, 216, 218) by at least two power combining stages. A first power combining stage (204) of the at least two power combining stages is configured as a single-stage first frequency pass circuit and a second power combining stage (206) of the at least two stages is configured as a single-stage second frequency pass circuit, and wherein the first frequency is different to the second frequency.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the priority under 35 U.S.C. § 119 of European Patent application no. 20184083.2, filed on Jul. 3, 2020, and entitled WILKINSON POWER COMBINER, COMMUNICATION UNIT AND METHOD THEREFOR, the contents of which are incorporated by reference herein.

FIELD OF THE INVENTION

The field of the invention relates to a Wilkinson power combiner/splitter, a communication unit having a Wilkinson power combiner and a method therefor. The invention is applicable to, but not limited to, a radio frequency Wilkinson power combining circuit.

BACKGROUND OF THE INVENTION

In the field of radio frequency (RF) and microwave engineering, the Wilkinson power divider is a specific class of power divider circuit that can achieve isolation between the output ports, whilst maintaining a matched condition on all ports. The Wilkinson power divider splits an input signal into two equal phase output signals or combines two equal-phase signals into one signal in the opposite direction. Thus, it is often referred to as either a Wilkinson power divider (or splitter) or a Wilkinson power combiner. Hereafter, the term Wilkinson power combiner will be used to encompass both applications.

The Wilkinson power combiner is particularly simple and can easily be realised using printed components on a printed circuit board that utilises quarter wave (λ/4) transmission lines (TLs) to effect the power combination or power split, e.g. these designs use quarter wavelength transformers to split an input signal and to provide two output signals that are ‘in-phase’ with each other, with a characteristic impedance Zc=√{square root over (2)}Z0. This implementation at lower frequencies can be bulky in size due to the λ/4 TLs. This often means that the Wilkinson Power Combiner tends to be used more at higher, e.g. high microwave, frequencies where the λ/4 transmission line lengths become manageable.

It is also possible to use lumped inductor and capacitor elements to implement a Wilkinson power combiner. However, it is known that use of lumped inductor and capacitor elements complicates the overall circuit design. Use of lumped element components also makes the accurate phase matching of output ports more difficult, due to different component tolerances of parallel circuits.FIG.1illustrates one typical application of a Wilkinson power combiner100that that uses lumped inductor and capacitor elements. Here, multiple Wilkinson power combiners120,122,124are employed in a multi-channel analog beamforming integrated circuit (IC), e.g. for antenna arrays. The multi-channel analog beamforming integrated circuit includes an input110having a shunt inductance that is an electro-static discharge (ESD) coil, which is usually placed at the input of the complete chain a transmitter sense), such as the input pin of the IC. The input110is provided to a first power combiner (or splitter in a transmitter sense)120that provides two equal phase representations of the input signal to a second Wilkinson power combiner122and third Wilkinson power combiner124. Each of the second Wilkinson power combiners122and third Wilkinson power combiner124also produces two equal phase representations of their respective input signal. The outputs of the second Wilkinson power combiner122and third Wilkinson power combiner124are input to a respective antenna in the antenna array138via a respective beamformer130,132,134,136where control of a respective phase shifter controls a phase of that particular output signal.

In a receive sense, a receive signal is extracted from the antenna array138and input to respective beamformers130,132,134,136and then signals are combined in the second Wilkinson power combiners122and third Wilkinson power combiner124. The outputs of the second Wilkinson power combiners122and third Wilkinson power combiner124are then input to the first power combiner120to combine all phase adjusted (beam formed) signals and provide these to the receiver circuitry (not shown).

FIG.1also illustrates a classical lumped element approach of one such Wilkinson power combiner124, which uses a shunt capacitor-series inductor-shunt capacitor (CLC) low pass u network structure for the two combining/splitting paths. The Wilkinson power combiner124includes, on one side, a single port P1140with a matched impedance Z0, and, on the other side, two ports P2142, P3144, each also with a matched impedance Zo. With a lumped element Wilkinson combiner approach, the transmission lines are replaced by a CLC low-pass design, as shown, Here, the low pass π network comprises shunt capacitors Co154,164separated by a lumped element inductor/coil L0152,162. An isolation resistance Riso170separates (and isolates) receive or transmit signals on the two Wilkinson combiner paths (sometimes referred to as ‘arms’). The device parameters are:

However, the Wilkinson power combiner is often laced with a delicate design choice in either implementing the circuit with quarter wave (λ/4) transmission lines, where the quarter wave (λ/4) transmission lines become unmanageable at low microwave frequencies or high radio frequencies (e.g. <5 GHz). However, at these lower microwave frequencies, the two series separated coils L0152,162in a lumped element Wilkinson power combiner result in a relatively large chip size, which is also undesirable. Typical applications for fifth generation (5G) mmWave networks cover frequency ranges from 24-50 GHz. A major problem at higher frequencies is that die size needs to be small for cost as well as physical-size reasons. Hence, for a practical RF design, it is important to populate multiple of these beamformer chips on an antenna panel, comprising up to 256 or more patches. In order to route all of the RF signal tracks in between these chips, sufficient die space is needed. Hence, an improved design is needed to assist the designer of Wilkinson power combiners radio frequency and microwave frequencies.

The paper titled “Lumped Element Wilkinson Power Combiners Using Reactively Compensated Star/Delta Coupled Coils in 28-nm Bulk CMOS”, authored by Matthew Love et. al, and published in May 2019 in the IEEE Transactions on Microwave Theory and Techniques, pp, 1798-1811, Vol. 67, No. 5 describes a 5 GHz low-pass Wilkinson combiner with port-to-port isolation capacitor and coupled (differential/parallel) inductors.

SUMMARY OF THE INVENTION

The present invention provides a Wilkinson power combiner circuit, a communication unit, and a method therefor, as described in the accompanying claims. Specific embodiments of the invention are set forth in the dependent claims. These and other aspects of the invention will be apparent from, and elucidated with reference to, the embodiments described hereinafter.

DETAILED DESCRIPTION

In a first aspect of the invention, examples of the present invention provide a Wilkinson power combiner that includes at least one input port coupled to at least one output port by at least two power combining stages. A first power combining stage of the at least two power combining stages is configured as a single-stage first frequency pass circuit and a second power combining stage of the at least two stages is configured as a single-stage second frequency pass circuit, and wherein the first frequency is different to the second frequency. In this manner, the multi-stage Wilkinson power combiner creates at least a split of 1:4 (or higher) to accommodate at least four or more transceiver beamformer channels, for example in a single integrated circuit (IC), for example to drive four or more patches on say an antenna array. In some examples, it is envisaged that one stage of the multiple stages may be a high-pass operating at a different centre frequency than a second stage that operates at a different centre frequency due to being a low-pass stage.

In some examples, the Wilkinson Power combiner may use a combination of single-stage high-pass and single-stage low-pass Wilkinson combiners, in either configuration, e.g. HP-LP or LP-HP. In some examples, a band-pass stage may be constructed using combined high-pass and low-pass stages, dependent upon the configured centre frequencies of the respective HP and LP stages. Thus, in some examples, the at least two power combining stages of the Wilkinson power combiner may be configured as a 2-stage band-pass, BP, frequency circuit based on a first centre frequency of the single-stage first HP frequency pass circuit and a second centre frequency of the single-stage second LP frequency pass circuit, thereby forming a BP response.

In some examples, a high-pass (or band-pass stages with a HP stage and LP stage) of a Wilkinson Power combiner may be configured to include a port-to-port series or parallel RL isolation circuit that is implemented by a compact low Q-factor inductor in lower metal layers. In some examples, a FIG. 8-shaped inductor may be employed in the design, as the layout implementation of the low-pass Wilkinson Power combiner for millimeter-wave applications. In this manner, in some examples, the multi-stage Wilkinson power combiner may yield the best trade-off between insertion loss and isolation bandwidth within a compact design. In some examples, a series RC isolation circuit may be used for a low-pass Wilkinson Power combiner stage. In this manner, in some examples, the multi-stage Wilkinson power combiner may improve the frequency bandwidth of isolation.

In a second aspect of the invention, examples of the present invention provide a Wilkinson power combiner that includes at least one high-pass, HP, frequency circuit. The HP frequency circuit includes at least one of: (i) one input port coupled to at least two output ports via at least two paths; and an input shunt inductor coupling the input port to ground: and coupled to the at least two output ports via respective series capacitances on the at least two paths, which in cooperation with the input shunt inductor forms a first HP frequency circuit; (ii) at least one resistor-inductor, R-L isolation circuit configured to couple the at least two output ports that forms a second HP frequency circuit. In this manner, a more compact Wilkinson power combiner can be designed. Furthermore, in this manner, a high-pass circuit may be implemented in a very compact structure, since the isolation network with its low-Q inductor can be implemented, say, underneath in a lower metal to save die area. The high-pass circuit also enables a shunt inductor at the input that can also serve as ESD element. Furthermore, in a cascading high-pass and low-pass network implementation, it is possible to make wide band-pass characteristics with high selectivity at both sides of the pass-band.

Referring first toFIG.2, a communication unit200with an (at least) 2-stage Wilkinson power combiner202design is illustrated, according to example embodiments of the invention. The communication unit200comprises a receiver and a transmitter, each comprising distinct circuits and signal paths, and each coupled to an antenna or array of antennas (not shown). The receiver and a transmitter of the communication unit200are each connected to the antenna or array of antennas by an (at least) 2-stage Wilkinson power combiner202, which may be configured to isolate signals between the transmitter and receiver circuits.

Although this example illustrates a 2-stage Wilkinson power combiner/splitter design, i.e. a first power combining stage204with a second power combining stage206, and consequently a 1-to-4 input/output design, it is envisaged that in other examples, as will be appreciated by a skilled artisan, the concepts described herein apply equally to more stages, e.g. a 3-stage, i.e. a 1-to-8 input/output design; a 4-stage, i.e. a 1-to-16 input/output design, or extensions or variations thereof, etc. In this example, the 2-stage204,206Wilkinson power combiner202includes a first high-pass (filtering) Wilkinson power combiner/splitter stage and a second stage with two second low-pass (filtering) Wilkinson power combiner/splitter circuits. It is envisaged that in other examples, as will be appreciated by a skilled artisan, the concepts described herein apply equally to a different configuration of stages, e.g. a HP-Wilkinson power combiner/splitter stage followed by one or two or more further HP Wilkinson power combiner/splitter stages, a LP-Wilkinson power combiner/splitter stage, followed by one or two or more further HP Wilkinson power combiner/splitter stages, etc. In some examples, it is envisaged that one stage of the multiple stages may be a high-pass operating at a different centre frequency than a second stage that operates at a different centre frequency due to being a low-pass stage. Hereafter, a reference to high-pass stage is intended to also cover HP and LP stages that are combined to form a band-pass design.

The 2-stage Wilkinson power combiner202includes a first input/output port (P1)210, with four (opposite) output/input ports, respectively P2212, P3214, P4216, P5218, dependent upon the combining or splitting application. The first input/output port (P1)210is coupled to an input shunt inductor220, which is configured to provide input electro-static discharge, protection. With a 2-stage RF Wilkinson combiner200, with HP and LP stages, the insertion loss and isolation between the first input/output port (P1)210, and the four (opposite) output/input ports, respectively P2212, P3214, P4216, P5218, provides a wideband response through a combination of HP and LP circuits.

In this example, the first power combining stage204is configured as a high-pass (HP) circuit and includes two signal paths coupled to the single port P1210that includes series capacitors230,238. Unlike the known Wilkinson power combiner that uses a low-pass combiner with series R-C isolation circuit at the input port, examples of the present invention include the shunt inductor220for a dual purpose of functioning as an ESD coil as well as part of a HP circuit that includes series capacitors230,238.

In this example, the first high-pass power combining stage204comprises shunt inductor220as well as a series-coupled lumped element inductor/coil234and isolation resistance Riso236that separates (and isolates) receive or transmit signals on the two paths.

In this 2-stage example, the second power combining stage206is configured as two parallel low-pass circuits, with each of the two signal paths being split into two further signal paths such that the first power combining stage204is coupled to four input/output ports, respectively P2212, P3214, P4216, P5218, via series capacitors230,233connected to the second power combining stage206from the first power combining stage204, The second power combining stage206(which in this example forms two second stage low-pass Wilkinson combiners) couples the first high-pass power combining stage204to the four input/output ports of the two parallel low-pass circuits, respectively P2212, P3214, P4216, P5218includes, at each input, respective shunt capacitors232,240, connected to each respective path via series-coupled lumped element inductors/coils252and254,256and258. The values are given by equations [2].

In some examples of the invention, within the pairs of series-coupled lumped element inductors/coils252,254and series-coupled lumped element inductors/coils256,258, leading to the two parallel low-pass circuits, the paired inductors/coils252,254and/or paired inductors/coils256,258may form mutually coupled inductors. In some examples, coupling the inductors may save die area, for example by ensuring that there is zero mutual coupling between the inductor pairs and arranging to inter-wind those inductor pairs, for example using a figure-8 shaped inductor layout, as described inFIG.9. Additionally, with such a zero mutual coupling configuration and inductor/coil layout, it is possible to organize a layout that is able to reach, say, all the analog beamforming channels of a communication unit that employed multiple beamforming channels in an efficient manner.

In this example, each of the two parallel low-pass circuits comprises a respective series isolation resistance Riso/capacitance (R-C) circuit260,262and264,266, which separates (and isolates) receive or transmit signals on the respective two paths of each of the two parallel low-pass circuits.

In this example, and compared to a classical parallel isolation RC circuit, the LP circuits inFIG.2illustrate a series isolation RC circuit. This proposal increases the isolation frequency bandwidth. Here, the LP circuit component parameters are:

In an example whereby the communication unit200uses, say, a beamformer that is able to communicate on a plurality of communication channels, it is envisaged that the at east 2-stage Wilkinson power combiner design may be able to provide channel-to-channel isolation. Here, the channel-to-channel isolation is implemented in both stages of the Wilkinson power combiner by the shunt circuits (series R-L or R-C inFIG.2). In this HP-LP example, the combination of high-pass and low-pass circuits may be configured to create an overall wide band-pass performance. In a beamformer application, isolation between each channel in the beamformer (carrying the same modulation) needs to be carefully aligned using the phase shifters in each channel, so as to guarantee good coherent signal reception and transmission. This addresses a known problem with beamformer applications, in that poor isolation can cause inter-channel interference, thereby degrading the coherency of the total beamforming signal that is transmitted or received.

Thus, examples of the invention according to a first aspect describe a Wilkinson power combiner202that includes at least one input port210coupled to at least one output port212,214,216,218by at least two power combining stages. A first power combining stage204is configured as a single-stage first frequency pass circuit and a second power combining stage206is configured as a single-stage second frequency pass circuit. In accordance with examples of the invention, whereby the first frequency is different to the second frequency.

In some examples, it is envisaged that the at least two power combining stages may include an optimized isolation circuit to provide for a wider isolation bandwidth, for example by tuning isolation inductor Liso234, isolation resistor Riso236, isolation capacitors Ciso250,264and isolation resistors Riso262,266to further improve isolation bandwidth. In a typical example for centering the operational frequency stages of a high-pass and low-pass example Wilkinson combiner, where the input and output impedances are Z0, the device parameters may be as shown in the following equations:

In order to improve the isolation bandwidth, examples of the invention may tune some of the components, for example decreasing inductor, L234to shift up the isolation frequency and increasing isolation capacitors Ciso260,264to shift down the isolation frequency. In combination, this results in a wider isolation bandwidth. The plots1200illustrated inFIG.12provide this performance comparison, with the dotted lines referring to the original case (both low-pass and high-pass Wilkinson combiner stages are centered at fc), and the solid lines refer to the isolation network tuning case that improves the isolation bandwidth in1202.

In some optional examples, one of the single-stage first frequency pass circuit and single-stage second frequency pass circuit is configured as a high-pass, HP, frequency circuit. In this manner, the HP frequency circuit, with a dual-function shunt inductor at the input (that serves as part of the HP circuit as well as ESD element) may be implemented as a very compact structure. The compact structure can be achieved as the isolation circuit with its low-Q inductor can be implemented underneath in lower metal to save area. Furthermore, in some examples, cascading multiple high-pass networks enables to make higher order filters to tailor specific pass and stop-band characteristics (e.g. Chebyshev, Butterworth). For example, an amplifier circuit usually benefits from having a wide-band loading that is flat across the pass-band, which can be enabled e.g. by having cascade of LP and HP circuits. Furthermore, in some optional examples, it is envisaged that different frequencies in the cascaded stages maybe exploited, for example to create specific filter characteristics, such as Chebyshev, Butterworth, etc.

In some optional examples, the HP frequency circuit includes the at least one input port210coupled to the at least two power combining stages via respective series capacitances230,238and coupled to ground via an input shunt coil220.

In some optional examples, the shunt coil220is configured to function as both: (i) part of the single-stage first frequency pass circuit that sets the first frequency together with series capacitors230,238; and (ii) to provide electrostatic discharge, ESD, protection of the Wilkinson power combiner202. In some optional examples, the HP frequency circuit comprises a series R-L isolation circuit between two intermediate input-output ports512,514coupled between the at least one input port210and the at least one output port212,214,216,218. In some optional examples, the HP frequency circuit comprises a parallel R-L isolation circuit between the two intermediate output ports512,514coupled between the at least one input port210and the at least one output port212,214,216,218, as shown inFIG.5. In some optional examples, the inductor234in the RL isolation circuit may be a slopey inductor configured in a lower metal layer with a non-high Q′. In some examples, the isolation resistor236may be embedded as the parasitic resistor of the inductor234, which makes it a low-Q inductor, sometimes referred to as a ‘slopey’ inductor. In this manner, the isolation resistor236embedded as a parasitic resistor of the inductor234can be implemented within a relatively small area and in lower metal layer, thereby hidden underneath the rest of the structure comprising the high-Q elements, such as series capacitors230,238.

In some optional examples, the first power combining stage204may be coupled to the second power combining stage206via at least two zero mutually-coupled inductors252,254and/or256,258configured in a figure-8 arrangement. In some optional examples, the single-stage second frequency pass circuit is configured as a low-pass, LP, frequency circuit. In some optional examples, the Wilkinson power combiner202may be configured as a 2-stage one input port210, four output port212,214,216,218design.

Clearly, the various components within the wireless communication unit200can be realized in discrete or integrated component form, with an ultimate structure therefore being an application-specific or design selection.

Referring now toFIG.3,FIG.3illustrates one example of a layout300of the 2-stage power RF Wilkinson combiner/splitter design ofFIG.2showing five input/output ports, according to example embodiments of the invention. The 2-stage RF Wilkinson combiner200includes the first input/output port (P1)210, with four (opposite) output/input ports, respectively P2212, P3214, P4216, P5218. The 2-stage RF Wilkinson combiner200includes a first high-pass (HP stage)310connected to the first input/output port (P1)210. As shown, P2212, P3214provide inputs/outputs after a space consuming low-pass (LP) stage on the left-hand side of the layout300. Similarly, P4216, P5218provide inputs/outputs after a further space consuming low-pass (LP) stage on the left-hand side of the layout300.

The example layout300ofFIG.3further illustrates other circuit components ofFIG.2, including the shunt inductor220, the area of a first-stage high-pass Wilkinson combiner204and the area of a second stage low-pass Wilkinson combiner206.FIG.3also illustrates coils referring to the series inductors252,254and256,258inFIG.2, formed as figure-8-shape inductors, which are similar to the figure-8-shape inductors of theFIG.9example.

In the layout300ofFIG.3, there are two figure-8 shape inductors315as the second-stage Wilkinson in the layout left side and right side. The figure-8 shape inductors315are able to localize the magnetic field and reduce the inductive cross-talk to other inductors. In addition, using the figure-8 shape inductors315for the second stage Wilkinson power combiner layout, it is also possible to improve the channel-to-channel isolation between left side ports (P2212& P3214) and right side ports (P4216& P5218).

In this example,FIG.3refers to an optimized layout for a 39-GHz application. The values for a 39-GHz application can be determined from equation [4]. Port impedance is usually set to 50 Ohm as default. Thus, for a typical 39-GHz case: shunt inductor220L=204 pH, series capacitances C230,238=82 fF, isolation inductor234L=204 pH, isolation resistor236R=50 Ohm. For a typical 28-GHz case, again determined from equation [4]: shunt inductor220L=284 pH, series capacitances C230,238=114 fF, isolation inductor234L=284 pH, isolation resistor236R=50 Ohm. Such values enable the shunt inductor220L to be part of the HP circuit as well as perform the additional ESD function.

Referring now toFIG.4,FIG.4illustrates one example of a number of graphs400showing a performance of the 2-stage Wilkinson power combiner design ofFIG.2, according to example embodiments of the invention. A first graph410illustrates input return loss412vs. frequency414vis-a-vis a target performance specification476. A second graph420illustrates output return loss422vs, frequency424vis-a-vis a target performance specification476, A third graph430illustrates insertion loss432vs, frequency434. A fourth graph440illustrates isolation442vs. frequency444vis-a-vis a target performance specification476. The graphs400illustrate the Wilkinson power combiner with a parallel isolation RC circuit (dotted line) and series isolation RC circuit (solid line). When comparing the fourth graph440of isolation vs second graph420of output return loss, it is noteworthy that with regard to isolation between channels, for example in an analog beamformer application as illustrated inFIG.1, it is important to keep the signal coherency after re-combining the individual paths, Therefore, in accordance with some examples, the slightly worse return loss is acceptable or may be compensated for by the preceding circuit, e.g. the first combining stage204ofFIG.2.

As illustrated in fourth graph440the series isolation RC circuit increases the frequency bandwidth of isolation446with a trade-off of narrower frequency bandwidth426of output return loss (as illustrated in the second graph420. In some example applications, for example one that employs beamforming, the channel-to-channel isolation is achieved mainly by the 1-to-2 port configuration of a Wilkinson combiner/splitter.

Referring now toFIG.5,FIG.5illustrates two optional example implementations for a RF high pass (HP) frequency circuit of a RF Wilkinson power combiner, for example the Wilkinson power combiner ofFIG.2, according to example embodiments of the invention. In this example, the Wilkinson power combiner includes, on one side, a single port P1510with a shunt inductor520to provide a matched impedance Zo, and, on the other side two ports P2512, P3514. In this example, the high-pass (HP) circuit500includes two signal paths coupled to the single port P1510that includes series capacitors230,238. The shunt inductor520located at the input (or output, dependent upon the function) is a basic part of the HP circuit500that includes these series capacitors230,238to form a first HP frequency circuit. Advantageously, in accordance with examples of the invention, shunt inductor520may also perform the function of an ESD protection element. The HP circuit500also includes a parallel-coupled lumped element inductor/coil524and isolation resistance. Riso526that separates (and isolates) receive or transmit signals on the two paths to form a second HP frequency circuit.

The HP circuit500component parameters are:

Compared to low-pass Wilkinson splitter, the high-pass circuit500includes the shunt inductor520coupling ground to the input port, which naturally absorbs the ESD protection functionality. Thus, and advantageously the high-pass circuit500design is more compact compared to a classical low-pass Wilkinson combiner/splitter plus extra ESD protection circuit, as this classical configuration includes a series (bulky) coil in each path of a CLC low pass Ti network.

In some examples, the shunt inductor520can serve as an ESD coil due to its ability to sink current to ground after an ESD event. The existing art of a low-pass Wilkinson splitter circuit does not have this component naturally, and thus an additional ESD element is required in known implementations. In examples of the invention, a high-pass circuit is formed with a shunt-L and series-C component, since both present a zero-transmission at zero frequency. At an infinite frequency, the signal is passed with zero attenuation, as the shunt-L presents an infinite impedance, and a series-C presents zero impedance.

In another example, the Wilkinson power combiner includes, on one side, a single port P1510with a shunt inductor520to provide a matched impedance Zo, and, on the other side two ports P2512, P3514. In this second example, the high-pass (HP) circuit550includes two signal paths coupled to the single port P1510that includes series capacitors230,238. Advantageously, and again in accordance with examples of the invention, the shunt inductor520functions as part of a first HP circuit and additionally adopts a purpose of an ESD protection element. The HP circuit550also includes a series-coupled lumped element inductor/coil552and isolation resistance Riso554that separates (and isolates) receive or transmit signals on the two paths.

The second high-pass circuit550ofFIG.5comprises component parameters of:

It is noteworthy that,

ω⁢⁢LisoRiso=1,
as the means that the Q of the inductor, Q=Imag(Z)/real(Z), can be ‘1’, and thus can be implemented with a less-accurate inductor. In some examples, the isolation resistance Riso554may be embedded inside the inductor (as illustrated in the layout ofFIG.7), thereby allowing the inductor to be of a low-Q by design.

In this manner, in one example layout ofFIG.5, it is possible to use lower metal layer to make a very compact input shunt coil enables ESD protection function, and the port-to-port low Q isolation coil makes the design very compact.

Thus, in a second aspect of the invention, two HP frequency circuits500,550are described that include at least one input port510coupled to at least two output ports512,514via at least two paths. Furthermore, the HP frequency circuits500,550include at least one of: an input shunt coil520that couples the input port510to ground; wherein the one input port510is coupled to the at least two output ports512,514via respective series capacitances230,238, which in cooperation with the input shunt coil520forms a first HP frequency circuit; and at least one resistor554,526—inductor552,524, R-L isolation circuit configured to couple the at least two output ports512,514that forms a second HP frequency circuit.

In the illustrated examples, the second HP frequency circuit includes either a parallel isolation RL HP circuit500or a series shunt isolation RL HP circuit550. In some examples, the HP frequency circuit may be of, say, a 2-stage RF Wilkinson power combiner/splitter, such as the 2-stage RF Wilkinson power combiner ofFIG.2.

Referring now toFIG.6,FIG.6illustrates a number of graphs showing a simulated performance of comparing performance differences between series RL isolation circuit550and a parallel RL isolation circuit500ofFIG.5, e.g. for a HP circuit, according to example embodiments of the invention. A first graph610illustrates input return loss612vs. frequency614for both the parallel and series isolation R-L circuits500,550vis-à-vis a target performance specification676. A second graph620illustrates output return loss622vs. frequency624for both the parallel and series isolation R-L circuits500,550vis-à-vis a target performance specification676. A third graph630illustrates insertion loss632vs. frequency634for both the parallel and series isolation R-L circuits500,550. A fourth graph640illustrates isolation642vs. frequency644vis-à-vis a target performance specification676for both the parallel and series isolation R-L circuits500,550. It is noted that both the parallel and series isolation R-L circuits500,550can be implemented with a low-Q inductor. Here, the dotted lines672and678showing the parallel isolation RL HP circuit500and the solid lines674and680showing the series isolation RL HP circuit550versus a target performance specification676. In this case, the series RL isolation network may use a less-accurate coil that can improve the isolation bandwidth to the more acceptable detriment that it sacrifices a small performance in output return loss.

Referring now toFIG.7,FIG.7illustrates one example of a layout700of the HP circuit ofFIG.5, according to example embodiments of the invention. In this example illustration, a HR Wilkinson combiner. The high-Q shunt matching coil/inductor710, which also serves as ESD component520inFIG.5), may be implemented in the metal layer M6. Furthermore, since the input (or output) port-to-port isolation coil ofFIG.5, e.g. inductor524,552needs a low Q-factor of 1, this (slopey) coil may be implemented underneath the main structure in an M1 layer720, as shown inFIG.7, which advantageously leads to more compact area. Also, in this layout example the series isolation RL circuit realized by the slopey coil has a wider isolation bandwidth than the parallel RL isolation circuit.

Referring now toFIG.8,FIG.8illustrates one example of a simulated performance of the layout implementation ofFIG.7. according to example embodiments of the invention, A first graph810illustrates input return loss812vs. frequency814for both the parallel and series isolation R-L circuits500,550vis-à-vis a target performance specification876. A second graph820illustrates output return loss822vs. frequency824for both the parallel and series isolation R-L circuits500,550vis-à-vis a target performance specification876. A third graph830illustrates insertion loss832vs. frequency834for both the parallel and series isolation R-L circuits500,550. A fourth graph840illustrates isolation842vs. frequency844vis-à-vis a target performance specification876for both the parallel and series isolation R-L circuits500,550. It is noted that both the parallel and series isolation R-L circuits500,550can be implemented with a low-Q inductor.

Referring now to HG.9, HG.9illustrates one example of a layout900showing a millimeter-wave Figure-8 design920, configured to implement a pair of mutually-coupled inductors912,914, with close to zero inter-coupling (k≈0), according to example embodiments of the invention. In this manner, it is possible to implement a millimeter-wave figure-8 design920, including a surrounding ground ring930, in a compact size and which balances a trade-off between insertion loss and isolation frequency bandwidth. Advantageously, in this manner, a layout900in a Figure-8 configuration, can be implemented without the classical approach's need to use two individual, typically large, inductors to create the uncoupled inductor circuit.

Referring now toFIG.10,FIG.10illustrates one example of a flowchart1000of a method of power combining/splitting using at least a 2-stage Wilkinson power combiner/splitter, according to some example embodiments of the invention. The flowchart1000of power combining using a Wilkinson power combiner includes coupling, at1002, at least one input port (such as at least one input port210ofFIG.2) to at least one output port (such as at least one output port212,214,216,218ofFIG.2) of the Wilkinson power combiner (such as Wilkinson power combiner202ofFIG.2). In one example, this coupling at1002uses and traverses at least two power combining stages. The flowchart1000further comprises configuring, at1004, a first power combining stage (204) of the at least two power combining stages as a single-stage first frequency pass circuit. The flowchart1000further comprises configuring, at1006a second power combining stage (206) of the at least two stages as a single-stage second frequency pass circuit. The configuring at1004and1006is such that the first frequency is different to the second frequency.

Referring now toFIG.11,FIG.11illustrates one example of a flowchart1100of a method of power combining/splitting using at least one high-pass (HP) circuit, for example in a HP-low pass (LP) arrangement, according to some example embodiments of the invention. The flowchart1100of power combining using a Wilkinson power combiner includes coupling, at1102, at least one input port (such as at least one input port510) to at least one output port (such as output ports512,514,516,518ofFIG.2) of the Wilkinson power combiner (such as Wilkinson power combiner202ofFIG.2). In one example, this coupling at1102couples the at least one input port to the at least two output ports via at least two paths, wherein each path of the at least two paths includes a series capacitance and the input port is coupled to a shunt inductor. The flowchart1100further includes coupling1104a high-pass, HP, frequency circuit between the at least two output ports wherein the HP frequency circuit comprises at least one resistor-inductor, R-L, isolation circuit.

In some examples, the circuits may be implemented using discrete components and circuits, whereas in other examples the circuit may be formed in integrated form in an integrated circuit for example using quarter wave (λ/4) transmission lines. Because the illustrated embodiments of the present invention may, for the most part, be implemented using electronic components and circuits known to those skilled in the art, details have not been explained in any greater extent than that considered necessary as illustrated below, for the understanding and appreciation of the underlying concepts of the present invention and in order not to obfuscate or distract from the teachings of the present invention.

Any arrangement of components to achieve the same functionality is effectively ‘associated’ such that the desired functionality is achieved. Hence, any two components herein combined to achieve a particular functionality can be seen as ‘associated with’ each other such that the desired functionality is achieved, irrespective of architectures or intermediary components. Likewise, any two components so associated can also be viewed as being ‘operably connected,’ or ‘operably coupled,’ to each other to achieve the desired functionality.

Also, the illustrated examples may be implemented as circuitry located on a single integrated circuit or within a same device. For example, as illustrated in the Wilkinson power combiner202ofFIG.2. Alternatively, the circuit and/or component examples may be implemented as any number of separate integrated circuits or separate devices interconnected with each other in a suitable manner. However, other modifications, variations and alternatives are also possible. The specifications and drawings are, accordingly, to be regarded in an illustrative rather than in a restrictive sense.

In alternative embodiments, a Wilkinson power combiner (200) is described that comprises a high-pass, HP, frequency circuit (500,550), wherein the HP frequency circuit (500,550) comprises at least one of: (i) one input port (510) coupled to at least two output ports (512,514) via at least two paths; and an input shunt inductor (520) coupling the input port (510) to ground; wherein the one input port (510) is coupled to the at least two output ports (512,514) via respective series capacitances (230,238) on the at least two paths, which in cooperation with the input shunt inductor (520) forms a first HP frequency circuit; (ii) at least one resistor (554,526)—inductor (552,524), R-L isolation circuit (500,550) configured to couple the at least two output ports (512,514) that forms a second HP frequency circuit.

In this alternative Wilkinson power combiner, the at least one R-L isolation circuit may be configured as one of: a series R-L isolation circuit (550); a parallel R-L isolation circuit (500).

In this alternative embodiment, a method (1000) of power combining using a Wilkinson power combiner (202) is also described. The method comprises: coupling (1002) at least one input port (510) to at least two output port (512,514,516,518) via at least two paths wherein each path of the at least two paths comprises a series capacitance (230,238) and the at least one input port (510) is coupled to ground via an input shunt inductor (520), which in cooperation with the series capacitance (230,233) to form a first HP circuit; and coupling (1004) a high-pass, HP, frequency circuit (500,550) between the at least two output ports (512,514), wherein the HP, frequency circuit (500,550) comprises at least one resistor (554,526)—inductor (552,524), R-L isolation circuit (500,550) to form a second HP circuit.