Image sensor pixels with multiple compartments

An image sensor with an array of pixels is provided. In order to achieve high image quality, it may be desirable to improve well capacity of individual pixels within the array. When forming each pixel, multiple n-type compartments having p-type isolation regions interposed between compartments may be formed. These compartments may have higher dopant concentrations due to lateral depletion that may occur within multiple PN-NP back to back junctions to assist full depletion at pinning-voltage. Compartments may allow distributing a moderately higher electric-field over a larger portion of the photodiode while lowering peak electric-fields that contribute to dark-current. Compartments will thereby improve the well capacity of the photodiode while preventing additional noise that may degrade the quality of the image signal. The quantity, doping, and depth of these compartments may be selected to maximize well capacity while minimizing effects on operating voltage, manufacturing cost, and power consumption.

BACKGROUND

This relates generally to image sensors, and more specifically, to the storage capacitance of photodiodes within image sensors.

Image sensors are commonly used in electronic devices such as cellular telephones, cameras, and computers to capture images. Conventional image sensors are fabricated on a semiconductor substrate using complementary metal-oxide-semiconductor (CMOS) technology or charge-coupled device (CCD) technology. The image sensors may include an array of image sensor pixels each of which includes a photodiode and other operational circuitry such as transistors formed in the substrate.

Image sensors often include a photodiode having a pinning-voltage which is a design parameter set by the doping levels of the photodiode. During normal operation, a photodiode node is first reset to the pinning-voltage using transistor circuitry. Then photons are allowed to enter the photodiode region for a pre-defined amount of time. The photons are converted to electrons inside the photodiode volume, and these electrons reduce the reset pinning-voltage. In this process, the maximum total charge stored, QMAX, is commonly referred to as the saturation full well (SFW) and depends on the well capacity of the photodiode. The actual charge stored, Q, is less than or equal to QMAXbased on the intensity and integration time of photons. When it is time to read out the stored signal, the stored charge Q at the photodiode node is transferred to a floating diffusion node through additional transistor circuitry. Pixel design should maximize the amount of charge Q that can be transferred from the photodiode to the floating diffusion node. If not, the charge spill back manifests as a loss to image quality. Maximum charge stored, QMAX, determines the highest signal level detected in the photodiode array. High QMAXimproves the dynamic range of an image sensor.

There are many sources of noise that may degrade the captured signal Q. Dark-current refers to electrons generated and captured by a photodiode from non-photon sources. Dark-current can originate from many sources including: Si defects due to implant & plasma damage, metallic contaminants in photodiode volume, avalanche and/or Zener high field electron-hole (e-h) pair generation, SRH e-h pair generation, trap related band-to-band-tunneling (BTBT), transfer gate induced BTBT on both photodiode and floating diffusion sides, and many others. In order to achieve high image quality, dark-current must be reduced. Lower dark-current improves signal to noise ratio (SNR) of the image sensor.

It would therefore be desirable to be able to achieve very high photodiode well capacity and very low dark current without sacrificing image quality.

DETAILED DESCRIPTION

Embodiments of the present invention relate to image sensors, and more particularly, to the storage capacitance of photodiodes within image sensors. It will be recognized by one skilled in the art, that the present exemplary embodiments may be practiced without some or all of these specific details. In other instances, well-known operations have not been described in detail in order not to unnecessarily obscure the present embodiments.

FIG. 1is a diagram of an illustrative electronic device in accordance with an embodiment. Imaging system10ofFIG. 1may be a portable imaging system such as a camera, a cellular telephone, a video camera, or other imaging device that captures digital image data. Camera module12may be used to convert incoming light into digital image data. Camera module12may include an array of lenses14and a corresponding image sensor array16. Lens array14and image sensor array16may be mounted in a common package and may provide image data to processing circuitry18.

Processing circuitry18may include one or more integrated circuits (e.g., image processing circuits, microprocessors, storage devices such as random-access memory and non-volatile memory, etc.) and may be implemented using components that are separate from camera module12and/or that form part of camera module12(e.g., circuits that form part of an integrated circuit that includes image sensor array16or an integrated circuit within module12that is associated with image sensor array16). Image data that has been captured and processed by camera module12may, if desired, be further processed and stored using processing circuitry18. Processed image data may, if desired, be provided to external equipment (e.g., a computer or other device) using wired and/or wireless communications paths coupled to processing circuitry18.

Image sensor array16may contain an array of individual image sensors configured to receive light of a given color by providing each image sensor with a color filter. The color filters that are used for image sensor pixel arrays in the image sensors may, for example, be red filters, blue filters, and green filters. Each filter may form a color filter layer that covers the image sensor pixel array of a respective image sensor in the array. Other filters such as white color filters, dual-band IR cutoff filters (e.g., filters that allow visible light and a range of infrared light emitted by LED lights), etc. may also be used.

FIG. 2is a simplified isometric view of a portion of an image sensor photodiode. As shown inFIG. 2, photodiode200may be constructed on a substrate and include a p-isolation202that surrounds the photodiode, a higher doped p-type layer204at the surface of the substrate, an n-type layer206that is formed directly below the p-type layer204, a lower doped deep n-type region208that is formed directly below higher doped n-type region206, a p-well210, and an additional p-type region212that is formed below deep n-type region208.

P-isolation202may extend at least as deep as the lightly doped deep n-type region208and may therefore sometimes be referred to as a deep p-well or an array deep p-type well (ADPW). P-type layer204may be heavily doped with p-type material and may therefore sometimes be referred to as a P+layer or P-pinning layer. N-type layer206may be heavily doped with n-type material and may therefore sometimes be referred to as an N+layer or an array n-type photodiode (ANP) layer. Deep n-type region208may be lightly doped and may extend at least as deep into the substrate as ADPW region202and may therefore sometimes be referred to as an array deep n-type photodiode (ADNP) layer. P-well210may sometimes be referred to as an array p-type well (APW). P-well210may sometimes include transistors for pixel operation. ADPW region202, P+layer204, APW region210, and additional p-type region212interact with ANP layer206and ADNP region208to form a p-n junction. APW region210may be located in a corner of photodiode200and may house transistor circuitry and a floating diffusion node.

During operation, a pinning-voltage between 1V and 2V may be applied to photodiode200in order to completely deplete the p-n junction. Photons may then be permitted to enter photodiode200for a pre-defined amount of time. A majority of the photons that enter the photodiode may then generate electrons-hole pairs inside photodiode200. Generated holes are collected by the p-isolation region and removed. Photodiode200may store an electron charge Q during this time period. The magnitude of charge that may be stored in photodiode200is limited by the SFW capacity of photodiode200. The charge Q may then be transferred from photodiode200to a floating diffusion node with transistor circuitry.

ADPW region304may be formed to surround photodiode300and may extend at least as deep as ADNP region310. P+layer302may be formed at the surface of the substrate. ANP layer306may be formed directly below P+layer302. N-type compartments308-1and308-2need not extend as deep into the substrate as ADNP region310and may therefore sometimes be referred to as array shallow n-type photodiode (ASNP) compartments. ASNP compartments308-1and308-2may be formed directly below ANP layer306. P-well312may not extend as deep into the substrate as ADPW region304and may therefore sometimes be referred to as an array shallow p-type well (ASPW). ASPW region312may be interposed between ASNP compartments308-1and308-2and may be formed directly below ANP layer306. ADNP region310may be located directly below ASPW region312and ASNP compartments308-1and308-2. Additional p-type region314may be located directly below ADNP region310, but may not be surrounded by ADPW region304.

It should be noted that the geometries presented inFIGS. 3A and 3Bare illustrative, and one familiar in the art will recognize how to incorporate this construction into many other complex 3D pixel geometries. It should be appreciated that the doping types presented in this embodiment may be reversed without deviating from the basic concept. Operation of photodiode300may be similar to the previously described operation of photodiode200.

FIG. 4is a cross-sectional side view of an illustrative image sensor photodiode showing a compartmental ASNP region having two compartments in accordance with an embodiment. As shown inFIG. 4, this cross-section may be taken from photodiode300from the perspective shown inFIG. 3B.

The doping level of ANP layer306may be optimized for vertical depletion such that, at the pinning-voltage, a one-sided depletion edge completely depletes the ANP thickness in the vertical direction. The doping level of the ADNP region may be optimized for lateral depletion such that, at the pinning-voltage, the constant longer y-dimension is fully depleted in the lateral direction. In the ADNP region, for symmetric pixels, this y-dimension is same as the x-dimension. ASNP compartments308-1and308-2may be optimized for lateral depletion such that, at the pinning-voltage, the shorter x-dimension is fully depleted in the lateral direction. It is understood that depletion is 3-dimensional, and only the main factor for depletion is described to illustrate the invention. In this way, there may be three total contributing factors to SFW capacity. The sum of the three may provide a much higher well capacity than that of the photodiode200ofFIG. 2without degrading the maximum vertical E-field at the P+/ANP junction while operating at the pinning-voltage.

ASPW region312and ASNP compartments may extend from ANP layer306to a particular depth in z-direction350. This depth may be customized to ensure full depletion at a particular pinning-voltage. This depth may be customized to simplify manufacturability & cost at a particular pinning-voltage. Additionally, this depth may be selected to allow significantly higher well capacity than that of photodiode200ofFIG. 2without degrading the maximum vertical E-field. Alternatively, this design consideration may be used to lower the maximum vertical E-field in order to minimize or eliminate dark-current due to trap assisted band to band tunneling that degrades dark current. This design may be used to both improve Dynamic Ratio and Signal-to-Noise Ratio of an image sensor.

The additional p-type region314may be formed either by ion implantation of p-type dopants or by inversion (e.g. deposition of fixed charge material adjacent to the bottom surface). In a back side illumination (BSI) configuration, additional p-type region314may become the ingress for photon entry.

FIG. 5is a graph plotting dopant concentration versus substrate depth in accordance with an embodiment. As shown inFIG. 5, a nonlinear doping profile may be applied to a photodiode (e.g. the photodiode300inFIGS. 3A and 3B) into the substrate of the photodiode (e.g. in z-direction350inFIG. 4). This profile may illustrate the doping concentrations of various layers and regions of the photodiode such as photodiode300inFIGS. 3A and 3B. For example, p-type doping profile section502may relate to the doping concentration and thickness of P+layer302; n-type doping profile section504may relate to the doping concentration and thickness of ANP layer306; n-type doping profile section506may relate to the doping concentration and thickness of ASNP regions308-1and308-2; and n-type doping profile section508may relate to the doping concentration and thickness of ADNP region310. To provide adequate isolation, p-type doping profiles of ADPW and ASPW in the z-direction may be adjusted to be higher than the adjacent n-type doping levels.

FIG. 6is a cross-sectional side view of an illustrative image sensor photodiode showing an array deep photodiode well (ADPW) region and a compartmental ASNP region extending down the length of the photodiode in accordance with an embodiment. As shown inFIG. 6, photodiode600may include P+layer602, ADPW region604, ANP layer606, ADNP compartments608-1and608-2, additional ADPW region610, and additional p-type region612. ADPW region604may be formed to surround photodiode600. It should be noted that the geometries presented inFIG. 6are illustrative, and one familiar in the art will recognize how to incorporate this construction into many other complex 3D pixel geometries. It should be appreciated that the doping types presented in this embodiment may be reversed without deviating from the basic concept. Operation of photodiode600may be similar to the previously described operation of photodiode200.

ADNP compartments608-1and608-2may be optimized for lateral depletion when the pinning-voltage is applied. ANP region606may be optimized for vertical depletion when the pinning-voltage is applied. It should be noted that ADPW region610and ADNP compartments608-1and608-2may be formed to have PN-NP back to back junctions when under depletion. ADPW region604and ADPW region610may have similar or different doping levels.

ADPW region610and ADNP compartments608-1and608-2may be formed to extend in the z-direction from ANP606to additional p-type region612. ADPW region610and ADNP compartment608-1and608-2may be formed to extend from a position below ANP606to a position above additional p-type region612. By extending the ADNP compartments in such a way, photodiode600may produce higher LFW values compared to those of photodiode300(FIGS. 3A and 3B).

FIG. 7is a cross-sectional side view of an illustrative image sensor photodiode showing a compartmental ASNP region having more than two compartments in accordance with an embodiment. As shown inFIG. 7, photodiode700may include P+layer702, ADPW region704, ANP layer706, a plurality of ASNP compartments708, a plurality of ASPW regions710, ADNP region712, and additional p-type region714. ADPW region704may be formed to surround photodiode700.

The plurality of ASNP compartments708and the plurality of ASPW regions710may be implemented in various ways. For example, three ASNP compartments708may be formed having two ASPW interposing wells710and three PN-NP junctions. In another illustrative embodiment, four ASNP compartments708may be formed having three ASPW interposing wells710and four PN-NP junctions. In yet another suitable embodiment, N ASNP compartments may be formed having (N−1) ASPW interposing wells710and N PN-NP junctions.

It should be noted that the geometries presented inFIG. 7are illustrative, and one familiar in the art will recognize how to incorporate this construction into many other complex 3D pixel geometries. It should be appreciated that the doping types presented in this embodiment may be reversed without deviating from the basic concept. Operation of photodiode700may be similar to the previously described operation of photodiode200.

The plurality of ASPW regions710may be formed in such a way as to isolate the plurality of ASNP regions708from one another. The plurality of ASPW regions710may be formed in such a way as to partially isolate the plurality of ASNP regions708from one another. Each of the plurality of ASNP regions708may be formed to have PN-NP back to back junctions with corresponding ASPW regions710when under depletion. By forming these additional junctions, the well capacity of photodiode700may be higher than that of photodiode200(FIG. 2).

FIG. 8is a flowchart of the illustrative steps involved in fabricating an image sensor photodiode having a compartmental ASNP region in accordance with an embodiment. Step802corresponds to the formation of an ADNP region (e.g. ADNP region310ofFIG. 4). Step804describes the formation of an ASNP region above the ADNP region. Step806corresponds to the formation of one or more ASPW regions (e.g. ASPW region312ofFIG. 4) that partition the ASNP region into separate compartments (e.g. ASNP compartments308-1and308-2ofFIG. 4). Step808corresponds to the formation of an ANP layer (e.g. ANP layer306ofFIG. 4) above the ASNP and APW regions. Step810corresponds to the formation of a P+layer (e.g. P+layer302ofFIG. 4) above the ANP layer. Step812corresponds to the formation of an ADPW region (e.g. ADPW region304ofFIG. 4) surrounding the image pixel. These regions may be formed by one or more ion-implantation processing steps with proper implant masking layers.

FIG. 9is a block diagram of a processor system employing the image sensor photodiode ofFIGS. 3A, 3B, 4, 6, and 7in accordance with an embodiment. Device984may comprise the elements of device10(FIG. 1) or any relevant subset of the elements. Processor system900is exemplary of a system having digital circuits that could include imaging device984. Without being limiting, such a system could include a computer system, still or video camera system, scanner, machine vision, vehicle navigation, video phone, surveillance system, auto focus system, star tracker system, motion detection system, image stabilization system, and other systems employing an imaging device.

Processor system900, which may be a digital still or video camera system, may include a lens or multiple lenses indicated by lens996for focusing an image onto an image sensor array or multiple image sensor arrays such as image sensor array16(FIG. 1) when shutter release button998is pressed. Processor system900may include a central processing unit such as central processing unit (CPU)994. CPU994may be a microprocessor that controls camera functions and one or more image flow functions and communicates with one or more input/output (I/O) devices986over a bus such as bus990. Imaging device984may also communicate with CPU994over bus990. System900may include random access memory (RAM)992and removable memory988. Removable memory988may include flash memory that communicates with CPU994over bus990. Imaging device984may be combined with CPU994, with or without memory storage, on a single integrated circuit or on a different chip. Although bus990is illustrated as a single bus, it may be one or more buses or bridges or other communication paths used to interconnect the system components.

Various embodiments have been described illustrating image sensor pixels that include two or more n-type compartments isolated by p-type material and configured to form multiple laterally depleting P-N junctions. The n-type compartments may extend through the depth of the photodiode to maximize the area of the lateral depletion junctions. The photodiode may contain at least two n-type compartments, or may contain more than two compartments in order to create additional laterally depleting P-N junctions.

An image sensor pixel may include a p-type layer, first and second n-type regions formed below the p-type layer, and a p-type region that is interposed between the first and second n-type regions. The image sensor pixel may include a third n-type region formed below the p-type region and the first and second n-type regions. If desired, the third n-type region may be formed with a uniform doping profile. The first and second n-type regions may have a higher doping concentration than the third n-type region.

The image sensor may include an additional p-type region that surrounds the p-type layer, the first and second n-type regions, and the third n-type region. The image sensor may include an n-type layer formed between the p-type layer and the first and second n-type regions. If desired, instead of forming the third n-type region, the p-type region and the first and second n-type regions may extend vertically from the n-type layer to the additional p-type region.

If desired, instead of forming the first and second n-type regions and the p-type region, a single n-type region may be formed and multiple p-type regions may be interposed in the single n-type region to form multiple n-type compartments.