Receiver

A receiver for receiving an RF signal transmitting a bit sequence representing a symbol is provided. The receiver includes an oscillator, a counter, at least one state machine and at least one correlator. The oscillator is configured to oscillate dependent on the received RF signal, wherein the oscillator signal is controlled to provide an oscillation signal based on the oscillation during a plurality of subsequent active periods. The counter is configured to provide a counter value describing threshold crossings of the oscillator signal for each of the active periods. The at least one state machine is connected to the counter and configured to output state values, each state value dependent on two subsequent counter values. The at least one correlator is configured to correlate the output state values with a predefined bit sequence and to output a value representing the symbol dependent on the correlation.

BACKGROUND OF THE INVENTION

The present invention relates to a receiver for receiving an RF signal transmitting a bit sequence representing a symbol, and to a method for receiving an RF signal transmitting a bit sequence representing a symbol. Some embodiments of the present invention relate to a super regenerative receiver suitable for sub-μA operation.

Standard regenerative receivers comprise a detector with a positive or regenerative feedback from the output to the input. Thereby, the feedback maintains operation of the oscillator on the verge of oscillation. In a super-regenerative receiver, the detector is switched into and out of oscillation by an oscillator operating at a very low frequency rate, called the quench frequency. The quench frequency is lower than the carrier frequency but higher than the frequency of the modulating signal. That is, the quench oscillator allows oscillation to build up in the regenerative circuit and then causes them to die out.

In the absence of an incoming signal, oscillations are initiated by thermal noise, build up to a critical amplitude and die out. An incoming signal larger than the thermal noise advances the build up time. Thus, the maximum oscillation amplitude is reached sooner. A detector will provide indication of an incoming signal based on the advance of the build up period.

Standard super-regenerative receivers are restricted to oversampling at quench frequencies above the data rate of the received signal, in order to accomplish time integration. However, the local oscillator leads to spurious emissions into the environment of the receiver.

SUMMARY

According to an embodiment, a receiver for receiving an RF signal transmitting a bit sequence representing a symbol may have: an oscillator configured to oscillate dependent on the received RF signal, wherein the oscillator is controlled to provide an oscillation signal based on the oscillation during a plurality of subsequent active periods; a counter configured to provide a counter value describing threshold crossings of the oscillator signal for each of the active periods; at least one state machine connected to the counter and configured to output state values, each state value dependent on two subsequent counter values; and at least one correlator configured to correlate the output state values with a predefined bit sequence and to output a value representing the symbol dependent on the correlation.

According to another embodiment, a method for receiving an RF signal transmitting a bit sequence representing a symbol may have the steps of: providing an oscillation signal based on an oscillation during a plurality of subsequent active periods, wherein the oscillation depends on the received RF signal; obtaining a counter value describing threshold crossings of the oscillator signal for each of the active periods; obtaining state values using at least one state machine, wherein each state value depends on two subsequent counter values; and correlating the output state values with a predefined bit sequence and outputting a value representing the symbol dependent on the correlation.

Another embodiment may have a computer program for performing, when running on a computer, microprocessor or digital circuit, an inventive method.

A receiver for receiving an RF signal transmitting a bit sequence representing a symbol is provided. The receiver comprises an oscillator, a counter, at least one state machine and at least one correlator. The oscillator is configured to oscillate dependent on the received RF signal, wherein the oscillator signal is controlled to provide an oscillation signal based on the oscillation during a plurality of subsequent active periods. The counter is configured to provide a counter value describing threshold crossings of the oscillator signal for each of the active periods. The at least one state machine is connected to the counter and configured to output state values, each state value dependent on two subsequent counter values. The at least one correlator is configured to correlate the output state values with a predefined bit sequence and to output a value representing the symbol dependent on the correlation.

A method for receiving an RF signal transmitting a bit sequence representing a symbol is provided. The method comprises providing an oscillation signal based on an oscillation during a plurality of subsequent active periods, wherein the oscillation depends on the received RF signal. Further, the method comprises obtaining a counter value describing threshold crossings of the oscillator signal for each of the active periods. Further, the method comprises obtaining state values using a state machine, wherein each state value depends on two subsequent counter values. Further, the method comprises correlating the output state values with a predefined bit sequence and outputting a value representing the symbol dependent on the correlation.

DETAILED DESCRIPTION OF THE INVENTION

In the following description, a plurality of details are set forth to provide a more thorough explanation of embodiments of the present invention. However, it will be apparent to those skilled in the art that embodiments of the present invention may be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form rather than in detail in order to avoid obscuring embodiments of the present invention. In addition, features of the different embodiments described hereinafter may be combined with each other, unless specifically noted otherwise.

FIG. 1shows a block diagram of a receiver100for receiving an RF signal102transmitting a bit sequence representing a symbol. The receiver100comprises an oscillator104(e.g., a super regenerative oscillator), a counter106, at least one state machine108_1:108—nand at least one decoder110_1:110—n(e.g., correlator). The oscillator104is configured to oscillate dependent on the received RF signal102, wherein the oscillator104is controlled to provide an oscillation signal112based on the oscillation during a plurality of subsequent active periods113. The counter106is configured to provide a counter value114describing threshold crossings of the oscillator signal112for each of the active periods113. The at least one state machine108_1:108—nis connected to the counter106and configured to output state values116_1:116—n,each state value of the state values116_1:116—ndependent on two subsequent counter values114. The at least one correlator110_1:110—nis configured to correlate the output state values116_1:116—nwith a predefined bit sequence and to output a value118_1:118—nrepresenting the symbol dependent on the correlation.

According to the concept of the present invention, energy consumption and spurious emissions of the receiver100can be reduced by operating the oscillator104and the counter106(only) during the active periods113. Moreover, a direct digital evaluation of the RF signal102can be achieved by means of the at least one state machine108_1:108—nand the at least one correlator110_1:110—n.

In some embodiments, the receiver100may comprise up to n state machines108_1:108—nand n correlators110_1:110—n,wherein n is a natural number greater than or equal to 1 (n≧1). Thereby, the number of state machines108_1:108—nmay be equal to the number of correlators110_1:110—n.

For example, the receiver100can comprise n=2 (or 3, 4, 5, 10, 20, 30, 50, 100 or more) state machines108_1:108—nand correlators118_1:118—n.Thereby a first correlator118_1can be connected to a first state machine108_1, wherein a second correlator1182can be connected to a second state machine1082, and wherein an n-th correlator118—ncan be connected to an n-th state machine108—n.

The first correlator118_1can be configured to correlate the output state values116_1provided by the first state machine108_1with a first bit sequence and to output a first value118_1representing the symbol dependent on the correlation. The second correlator118_2can be configured to correlate the output state values116_2provided by the second state machine1082with a second bit sequence and to output a second value118_2representing the symbol dependent on the correlation. The n-th correlator118—ncan be configured to correlate the output state values116—nprovided by the n-th state machine108—nwith a n-th bit sequence and to output a n-th value118—nrepresenting the symbol dependent on the correlation.

Thereby, the correlators118_1:118—ncan be configured to correlate the state values116_1:116—nwith the same or different bit sequences.

Note that instead of correlators110_1:110—nalso decoders110_1:110—nconfigured to correlate the output state values116_1:116—nwith the predefined bit sequence (or bit sequences) could be used.

In some embodiments, non-active periods115can be interspersed between the active periods113. In other words, a non-active period115can be inserted between two subsequent active periods113.

The active periods may comprise a duty-cycle ratio of, e.g., 1:100 (or 1:200, 1:500, 1:700, 1:1000, or 1:1500) or less. In other words, the non-active periods115can be by a factor of 100 (or 200, 500, 700, 1000 or 1500) greater or larger than the active periods113.

In some embodiments, the oscillator104can be, for example, a voltage controlled oscillator (VCO). Of course, also other implementations of the oscillator104are possible.

FIG. 2shows a block diagram of the receiver100for receiving the RF signal102transmitting a bit sequence representing a symbol, according to a further embodiment of the present invention.

The receiver100can comprise a low-noise amplifier120connected to the oscillator104. The low-noise amplifier120can be configured to amplify the received RF signal102during the active periods113. Moreover, the low-noise amplifier120can be configured to provide an amplified received RF signal122, wherein the oscillator104can be configured to oscillate dependent on the amplified received RF signal122.

Further, the receiver100can comprise an antenna124for receiving the RF signal102transmitting a bit sequence representing a symbol. The antenna124can be connected to the low-noise amplifier120.

Moreover, the receiver100can comprise a memory126connected between the counter106and the at least one state machine108_1:108—n,wherein the memory126can be configured to provide two subsequent counter values to the at least one state machine108_1:108—n.

Thereby, the memory126can be configured to provide a current counter value (counter(t)) and a previous counter value (counter(t−1)) as the two subsequent counter values to the at least one state machine108_1:108—n.

As already mentioned, the counter106can be configured to provide in each active period a counter value114describing the threshold crossings of the oscillator signal112for each of the active periods113. Thereby, the threshold of the counter106may be selected to lay above (or below) the noise floor.

The memory126can be configured to store (or cache or buffer) the counter values114provided by the counter106in order to provide the two subsequent counter values to the at least one state machine108_1:108—n.Therefore, the memory126can be an intermediate storage, cache or buffer.

As indicated inFIG. 2, the memory126, the at least one state machine108_1:108—nand the at least one correlator118_1:118—ncan form a digital block128. The digital block128can be configured to output the state values116_1:116—nprovided by the at least one state machine108_1:108—nas raw-bits. Further, the digital block128can be configured to output the value (118_1:118—n) provided by the at least one correlator110_1:110—nas data.

Further, the receiver100can comprise a pulse shape generator130configured to provide shape signals132_1:132_3indicating the active periods113(and the non-active periods115).

For example, the pulse shape generator130can be connected to the low-noise amplifier120and configured to provide a first shape signal132_1(shape1) for the low-noise amplifier120. Further, the pulse shape generator130can be connected to the oscillator104and configured to provide a second shape signal132_2(shape2) for the oscillator104. Further, the pulse shape generator130can be connected to the counter106and configured to provide a third shape signal132_3(shape3) for the counter106.

As shown inFIG. 2, the pulse shape generator130and the digital block128may receive a clock signal129. The clock signal129can be provided by an external clock or a clock of the receiver100.

Moreover, the digital block128can comprise a configuration unit131configured to control the pulse shape generator130. The configuration unit131can be connected to the pulse shape generator130in order to configure the shape signals132_1:132_3(e.g., the lengths of the active periods113and non-active periods115, or a duty cycle ratio between the active periods113and the non-active periods115).

The configuration unit131can further be configured to provide a mute signal133for muting the low-noise amplifier120.

In the following, the functionality of the receiver100is explained by means of exemplary courses of signals which may be present in the receiver100. Thereby, the courses of the signals were selected for illustration purposes and are for no way limiting.

FIG. 3shows diagrams of the amplified received RF signal122, the second shape signal132_2, the oscillation signal112and a counter value signal carrying the counter value114.

More precisely, a first diagram150shows a course of the amplified received RF signal122input into the oscillator104; a second diagram152shows a course of the second shape signal132_2input into the oscillator104; a third diagram154shows the oscillation signal112provided by the oscillator104; and a fourth diagram156shows a course of the counter value signal114carrying the counter value. Thereby, the ordinates denote the amplitude or value of the respective signal, where the abscissas denote the time.

As shown inFIG. 3, the pulse shape generator130may generate different periodic time-continuous waveforms132_1to132_3, each subdivided into two phases, i.e. active periods113and non-active periods115. The shape signals132_1:132_3may have the following common properties.

During the active periods113(in phase1, denoted with t1inFIG. 3) the time-integral of the absolute value of the signal is non-zero. The length of the active periods113(phase1) and its maximum value are configurable by the digital block128. During the non-active periods115(in phase2, denoted with t2inFIG. 3) the above integral becomes zero.

The first shape signal132_1(shape1) shown inFIG. 2can control the gain and hence current consumption of the low-noise amplifier120. The second shape signal132_2(shape2) can control the oscillator104in such a way that it does not oscillate during the non-active periods115(in phase2). During the active periods113(in phase1) of the signal132_2(shape2) the oscillator104should start oscillating according to the super-regenerative principle with a time constant T, dependent on the slope and maximal value of the signal132_2. The signal132_3(shape3) can control the time of operation of the counter106.

In the following, the functionally of the different features of the receiver100are described in detail.

The low-noise amplifier120can be configured to amplify during the active periods113(in phase1) of the first pulse shape signal132_1and be switched off during the non-active periods115(in phase2). Further, the low-noise amplifier120circuit may include a so called muting function controlled by the mute signal133of the digital block128. If the mute signal133is high, the low-noise amplifier120may switch to a circuit behavior in which it attenuates the RF input signal strongly, but at the same time offers a noise signal to the oscillator104as if it were in normal operating mode. It “sees” and amplifies the noise of the antenna impedance but attenuates any antenna signals. For example, the operation can be multiplexed between two identical low-noise amplifiers120where one is attached to the antenna124and the other to an integrated impedance of the same value as the antenna124.

The counter106can be configured to count the number of periods of the oscillator output signal112during the active periods113(in phase1) of the signal132_2(shape2), wherein the result of the counting can be stored in the memory126of the digital block128. During the non-active periods115(in phase2) the counter106may reset to zero and switch off.

In other words, the frequency counter106can be configured to count the number of the zero crossing events (above the noise floor) during the active periods113(in phase1) of the second shape signal132_2, wherein the result of the counting can be stored in the memory126of the digital block128. During the non-active periods115(in phase2) the counter106may reset to zero and switch off.

FIG. 4shows a state diagram of a state machine108_1:108—n,according to an embodiment of the present invention. The state machine108_1:108—nmay comprise a logic high state150and a logic low state152. The logic high state may indicate a logic one, wherein the logic low state152may indicate a logic zero.

The state machine108_1:108—ncan be configured to transient from the logic high state150to the logic low state152if a difference k between the two subsequent counter values falls below a lower threshold −z, i.e. k<−z, and to transient from the logic low state152to the logic high state150if the difference k between the two subsequent counter values exceeds an upper threshold z, i.e. k>z. Thereby, each state value118_1:118—noutput by the state machine108_1:108—nmay indicate the current state of the state machine108_1:108—n.

Note that the lower threshold −z may be a negative version of the upper threshold z.

Further, in some embodiments, the receiver100may comprise more than one state machine108_1:108—n.In that case, the state machines108_1:108—nmay comprise different upper thresholds z1:znand different lower thresholds −z1:−zn.

Moreover, the state machine108_1:108—nmay stay in the logic high state150, if the difference k between the two subsequent counter values is equal to or greater than the lower threshold −z, i.e. k≧−z. Similarly, the state machine108_1:108—nmay stay in the logic low state152if the difference k in between the two subsequent counter values is smaller than or equal to the upper threshold z, i.e. k≦z.

In other words, the state machine108_1:108—nmay compare the current counter output with the previous one and take the difference. Assuming the difference between the current counter value and the previous one was k, then the state machine108_1:108—nbehaves as inFIG. 4with the configurable threshold parameter z from the digital block128.

The correlator (or decoder block)110_1:110—ncan be configured to perform a comparison between the state values116_1:116—n(e.g., received bits from the output of state machine108_1:108—n) and a configurable bit-sequence (or bit-code) of arbitrary length from the digital block128. If the output and the configurable code match, the correlator118_1:118—nmay produce a digital signal at its output.

In other words, the correlator110_1:110—ncan be configured to perform a cross correlation between the state values116_1:116—n(e.g., received bits) and a configurable bit-sequence (or bit-code) of the digital block128. If the correlation peak exceeds a certain threshold the digital block128may trigger a signal118_1:118—nat the output pin of the digital block.

Note that each of the n correlators110_1:110—nmay be connected to only one of the n state machines108_1:108—n.

For example, a first correlator110_1can be connected to a first state machine108_1, wherein a second correlator110_2can be connected to a second state machine108_2, and wherein an n-th correlator110—ncan be connected to an n-th state machine108—n.

The receiver100can be configured to calibrate a length of the active periods113such that the oscillator104starts oscillating within the active periods113. For example, the receiver100can be configured to calibrate the length of the active periods113such that the oscillator104starts oscillating within the active period113if no RF signal102is received by the receiver100during the active period113or if the bit of the bit sequence transmitted by the RF signal102during the active period113comprises a logic low state (e.g., logic zero). Further, the receiver100can be configured to calibrate the length of the active periods113such that the oscillator104starts oscillating within the active period113only if the bit of the bit sequence transmitted by the RF signal102during the active period113comprises a logic high state (e.g., logic one).

The receiver100can be configured to suppress received RF components in the signal122input into the oscillator104and to decrease the length of the active periods113iteratively until the counter value114provided by the counter106falls below a predefined calibration threshold, in order to calibrate the length of the active periods113.

In other words, during calibration, the low-noise amplifier120can be brought into mute mode via external configuration or via the configuration unit131. Thus, no or only strongly attenuated RF signals are injected into the oscillator104. Its settling-time is increased or even maximized. The settings for the length of the active periods113(phase1) of the pulse shape signals132_1:132_3are iterated in a decreasing manner and the corresponding counter values114are evaluated. If a setting is reached where the counter value114is smaller than a given reference value, this setting is stored as a default value for the pulse shape generator130.

Small counter values114mean the oscillator104is at the brink of starting oscillation but does not reach full swing within the active periods113(phase1) of the second shape signal132_2(shape2).

Note that calibration may be triggered at any time via a digital input, or (especially) after power up of the receiver100.

After calibration is completed, any RF signal within the passband of the low-noise amplifier120will decrease the settling-time of the oscillator104and result in higher output values114of the counter106.

If the power of the received RF signal102(RF power) decreases by a certain amount the counter values (counter output)114will also decrease. Each state machine108_1:108—nhas its own distinguished threshold z1:znand each state machine108_1:108—nhas its own decoder110_1:110—nattached to it.

Each threshold z1:znmay correspond to a change around a certain RF input level. The RF power at the input of the low-noise amplifier102will translate into discrete counter values114, modulating the state machines108_1:108—naccording to the RF pattern.

The correlators110_1:110—n(or decoders) then interpret predefined bit-patterns as symbols. A certain amount of errors in each pattern is tolerated. Each of the n decoders110_1:110—nmay scan for the same bit-patterns, as all other decoders110_1:110—n.It is sufficient if only one of the n decoders110_1:110—nfinds a matching bit-pattern, in order to pass that symbol to the output as received data.

The shape signals132_1:132_3of the pulse shape generator130are duty cycled with active periods113(t2) much smaller than non-active periods115(t1) (seeFIG. 3), e.g. duty-cycle-ratio of 1:1000. This results in a reduction of the emissions of the oscillator signal112to the environment of the receiver100of around 30 dB and better, if the duty cycle is further decreased.

Because the low-noise amplifier120may (be controlled to) operate with a similar duty cycle it can be incorporated in the receiver100(or system) with very low average current consumption, attenuating the local oscillator feed through to the antenna124in addition the reduction through duty cycling the oscillator104.

Note that all elements from the digital block128fromFIG. 2are not duty cycled and may run persistently.

In the following, the digital evaluation of the bit sequence168transmitted by the RF signal102is described making reference to a receiver100which exemplarily comprises three state machines108_1:108_3having the thresholds z1=35, z2=15 and z3=5.

FIG. 5shows a diagram of an exemplary bit sequence168transmitted by the RF signal102together with diagrams of the corresponding counter values114provided by the counter106and output state values provided by three state machines108_1:108_3.

Thereby, a first diagram170shows the bit sequence168transmitted by the RF signal102; a second diagram172shows the counter values114provided by the counter106; a third diagram174shows the state values116_1provided by the first state machine108_1; a fourth176diagram shows the state values116_2provided by the second state machine1082; and a fifth diagram178shows the state values116_3provided by the third state machine1083.

The rejection of interferers can be accomplished through the parallel processing in n multiple state machines108_1:108—neach with distinct thresholds.FIG. 4shows this behavior in an example for the case n=3, with distinct counter difference thresholds z1=35, z2=15 and z3=5, respectively. It is assumed that the depicted bit pattern168is transmitted by the RF signal102(modulated onto an RF carrier) and received by the receiver100. The RF signal102is exposed to fading and also gets superimposed with interfering signals of other transmitters within the channel, which lead to an output signal of counter values114over time as suggested in the second diagram172ofFIG. 5. Each state machine108_1:108_3processes this signal114and transforms it into the depicted state values (or bit pattern)116_1:116_3according to its threshold.

In the case of z1=35 the state-machine-output gives three false zeros because the threshold of 35 is too high for the appearing counter differences of 30. The state machine with z2=15 however gives the correct bit-pattern. z3=5 is too low resulting in the false recognition of a one bit, when the signal strength of the weak interferer increased.

Applying a fault tolerant pattern decoder (e.g. a digital correlator110_1:110—n), in the case of z3=5 the state machine output will still lead to a positive match at the decoder output.

The result is, that in practice only a small number (e.g. n=5) of both decoders and state machines is sufficient to allow for failure tolerant data reception.

The above example shows that the proposed architecture is capable of proper decoding of bit patterns, in the presence of fading and in-channel interferers, without the use of any feedback (e.g. gain adjusting from the counter value to the analog gain stages).

In other words, the above embodiments provide an improved radio receiver architecture based on the super regenerative receiver.

The improvements incorporate a reduction of spurious emissions, and suitability for current consumption in the range of sub microamperes (e.g., several 100 nA). Further, no adaptive gain-control is needed. In addition, the active period (length of active periods113) can be optimized through calibration.

Major differences compared to standard super-regenerative receivers are the direct digital evaluation of the RF data, and that no pulse width modulation and no time-integration of pulse width modulation is used.

In some embodiments, the proposed receiver100comprises an RF amplifier120with mute function, an oscillator104with controllable settling-time, a pulse shape generator130, a counter106and a digital block128. The digital block128incorporates a memory-buffer126, an array of n state-machines108_1:108—nand of n decoders110_1:110—n.

FIG. 6shows a flowchart of a method200for receiving an RF signal102transmitting a bit sequence representing a symbol. The method200comprises a step202of providing an oscillation signal112based on an oscillation during a plurality of subsequent active periods113, wherein the oscillation depends on the received RF signal102. Further, the method200comprises a step204of obtaining a counter value114describing threshold crossings of the oscillator signal112for each of the active periods113. Further, the method200comprises a step206of obtaining state values116_1:116—nusing at least one state machine108_1:108—n,wherein each state value depends on two subsequent counter values. Further, the method200comprises a step208of correlating the output state values116_1:116—nwith a predefined bit sequence and outputting a value118_1:118—nrepresenting the symbol dependent on the correlation.