Inductor shielding structure, integrated circuit including the same and method of forming the integrated circuit

An inductor shielding structure includes a first conductive layer including a plurality of first conductive lines having a first width and a plurality of second conductive lines having a second width. The inductor shielding structure further includes a second conductive layer over the first conductive layer. The second conductive layer includes at least one third conductive line having a third width and a plurality of fourth conductive lines having a fourth width. Each conductive line of the at least one third conductive line is parallel to each conductive line of the plurality of first conductive lines. Each conductive line of the plurality of fourth conductive lines is parallel to each conductive line of the plurality of second conductive lines. The first width is different from the second width, or the third width is different from the fourth width.

BACKGROUND

Inductors are used in integrated circuits to help resist a change in current which could potentially damage components of an integrated circuit. In integrated circuits which include alternating current (AC) power, inductors are used to filter out high frequency signals. Passing a current through an inductor creates a magnetic field which is capable of impacting a performance of other components in the integrated circuit as a result of coupling between the inductor and the other components.

Inductors are generally large elements which occupy a significant amount of space in the integrated circuit. To reduce an impact of coupling, inductors are spaced away from other components, in some instances. This spacing increases an overall size of the integrated circuit.

DETAILED DESCRIPTION

FIG. 1Ais a top view of an integrated circuit100including an inductor shielding structure in accordance with some embodiments. Integrated circuit100includes an inductor110over an inductor shielding structure120. Inductor shielding structure120extends under conductive regions of inductor110as well as under a central region of the inductor.

Inductor110includes a conductive element configured to receive an input signal and output and output signal. In some embodiments, inductor110includes copper, aluminum, tungsten or another suitable conductive material. In some embodiments, inductor110is on a top layer of integrated circuit100farthest from a substrate102(FIG. 1B). In some embodiments, inductor110is on multiple layers of integrated circuit100. Portions of inductor110on different layers of integrated circuit100are electrically connected by vias, line plugs, or other suitable connective elements. A line plug is a conductive element which is capable of both vertical routing between layers of the integrated circuit and routing within a plane of a layer of the integrated circuit.

Inductor shielding structure120is configured to reduce coupling between inductor110and circuitry within integrated circuit100. Inductor shielding structure120includes conductive elements on multiple layers of integrated circuit100. In some embodiments, inductor shielding structure includes copper, aluminum, tungsten, or another suitable conductive material. In some embodiments, conductive elements on the multiple layers of integrated circuit100are electrically connected together by vias, line plugs, or other connective elements. In some embodiments, inductor shielding structure120is connected to a reference voltage, e.g., a ground voltage. In some embodiments, inductor shielding structure120is electrically floating, i.e., electrically separated from a supply voltage.

FIG. 1Bis a cross-sectional view of integrated circuit100including inductor shielding structure120in accordance with some embodiments.FIG. 1Bis a cross-sectional view of integrated circuit including a conductive region of inductor110. Integrated circuit100includes a substrate102. Circuitry104is over substrate102. Inductor shielding structure120is on an opposite side of circuitry104from substrate102. Inductor shielding structure120includes a first conductive layer120aand a second conductive layer120b. First conductive layer120ais closer to substrate102than second conductive layer120b. First conductive layer120aextends in a first direction parallel to a top surface of substrate102. Second conductive layer120balso extends in the first direction. A dielectric layer106is over inductor shielding layer120. Inductor110is over dielectric layer106.

In some embodiments, substrate102includes an elementary semiconductor including silicon or germanium in crystal, polycrystalline, or an amorphous structure; a compound semiconductor including silicon carbide, gallium arsenic, gallium phosphide, indium phosphide, indium arsenide, and indium antimonide; an alloy semiconductor including SiGe, GaAsP, AlinAs, AlGaAs, GaInAs, GaInP, and GaInAsP; any other suitable material; or combinations thereof. In some embodiments, the alloy semiconductor substrate has a gradient SiGe feature in which the Si and Ge composition change from one ratio at one location to another ratio at another location of the gradient SiGe feature. In some embodiments, the alloy SiGe is formed over a silicon substrate. In some embodiments, substrate102is a strained SiGe substrate. In some embodiments, the semiconductor substrate has a semiconductor on insulator structure, such as a silicon on insulator (SOI) structure. In some embodiments, the semiconductor substrate includes a doped epi layer or a buried layer. In some embodiments, the compound semiconductor substrate has a multilayer structure, or the substrate includes a multilayer compound semiconductor structure.

Circuitry104includes at least one conductive element. In some embodiments, circuitry104includes active circuitry, such as transistors, pass gates, or other suitable active devices, configured to execute at least one function. In some embodiments, circuitry104includes passive circuitry, such as resistors, capacitors or other suitable passive devices. In some embodiments, at least a portion of circuitry104is formed in a region of substrate102. In some embodiments, circuitry104includes an interconnect structure.

Dielectric layer106is above circuitry104and is configured to help insulate inductor110from the circuitry. In some embodiments, dielectric layer106includes silicon oxide, silicon carbide, silicon nitride, silicon oxynitride, or another suitable dielectric material. In some embodiments, dielectric layer106is a same material as a dielectric material in the interconnect structure of circuitry104. In some embodiments, dielectric layer106is a different material from the dielectric material in the interconnect structure of circuitry104. In some embodiments, dielectric layer106is a single layer. In some embodiments, dielectric layer106is a multi-layer structure.

Inductor110is at least partially over dielectric layer106. In some embodiments, inductor110includes a single layer over a top surface of dielectric layer106. In some embodiments, inductor110includes multiple layers and at least one of the layers is within dielectric layer106. The multiple layers of inductor110are electrically connected by vias, line plugs, or other suitable connective elements.

Inductor shielding structure120is configured to reduce coupling between circuitry104and inductor110. A distance D between inductor110and inductor shielding structure120depends on a technology node of integrated circuit100and on system specifications in frequency ranges. In some embodiments, distance D ranges from about 10 microns (μm) to about 200 μm. In some embodiments, distance D ranges from about 1 microns (μm) to about 10 μm. In some embodiments, distance D ranges from about 0.5 μm to about 1 μm. In some embodiments, distance D ranges from about 0.1 μm to about 0.5 μm If the distance D is too small an ability of inductor shielding structure120to reduce coupling between inductor110and circuitry104is reduced, in some instances. If the distance D is too great a size of integrated circuit100is increased without significant impact on functionality of the integrated circuit, in some instances. Inductor shielding structure120includes an interlaced structure of first conductive layer120aand second conductive layer120b. The interlaced structure of inductor shielding structure120obscures circuitry104from inductor110in a straight line extending perpendicular to the top surface of substrate102.

First conductive layer120aincludes a plurality of parallel conductive lines extending in the first direction. Second conductive layer120balso includes a plurality of parallel conductive lines extending in the first direction. A pitch or spacing between conductive lines of first conductive layer120ais less than a width of conductive lines of second conductive layer120b. Similarly, a pitch or spacing between conductive lines of second conductive layer120bis less than a width of conductive lines of first conductive layer120a. In some embodiments, the width of conductive lines of first conductive layer120ais equal to the width of conductive lines of second conductive layer120b. In some embodiments, the width of conductive lines of first conductive layer120ais different from the width of conductive lines of second conductive layer120b. In some embodiments, the pitch or spacing between conductive lines of first conductive layer120ais equal to the pitch or spacing between conductive lines of second conductive layer120b. In some embodiments, the pitch or spacing between conductive lines of first conductive layer120ais different from the pitch or spacing between conductive lines of second conductive layer120b.

In some embodiments, first conductive layer120ais electrically connected to second conductive layer120bby vias, line plugs or other suitable connective elements. In some embodiments, first conductive layer120ais electrically disconnected from second conductive layer120b. In some embodiments, at least one of first conductive layer120aor second conductive layer120bis connected to the reference voltage. In some embodiments, at least one of first conductive layer120aor second conductive layer120bis electrically floating.

In some embodiments, both first conductive layer120aand second conductive layer120bare in dielectric layer106. In some embodiments, second conductive layer120bis in dielectric layer106and first conductive layer is in an interconnect structure of circuitry104. In some embodiments, both first conductive layer120aand second conductive layer120bare in an interconnect structure of circuitry104.

FIG. 1Cis a cross-sectional view of integrated circuit100including inductor shielding structure120in accordance with some embodiments.FIG. 1Cis a cross-sectional view in a central region of inductor110where no conductive elements of the inductor are above circuitry104. Inductor shielding structure120is continuous across integrated circuit100despite the lack of conductive elements of inductor110directly above portions of the inductor shielding structure. In some embodiments, inductor shielding structure120is discontinuous in the central region of inductor110and an opening in the inductor shielding structure exposes a portion of circuitry104.

FIG. 1Dis a perspective view of integrated circuit100including inductor shielding structure120in accordance with some embodiments.FIG. 1Dincludes both first conductive layer120aand second conductive layer120bin dielectric layer106.FIG. 1Dalso includes a multi-layer inductor110wherein the layers of the inductor are connected by vias115.

FIG. 2Ais a top view of an integrated circuit200including an inductor shielding structure220in accordance with some embodiments. Integrated circuit200includes an inductor210over an inductor shielding structure220. Inductor shielding structure220extends under conductive regions of inductor210as well as under a central region of the inductor. Inductor210is the same as inductor110(FIG. 1A).

Inductor shielding structure220is configured to reduce coupling between inductor210and circuitry within integrated circuit200. Inductor shielding structure220is similar to inductor shielding structure120(FIG. 1A). In comparison with inductor shielding structure120, inductor shielding structure220has a perpendicular arrangement.

FIG. 2Bis a cross-sectional view of integrated circuit200including inductor shielding structure220in accordance with some embodiments.FIG. 2Bis a cross-sectional view of integrated circuit including a conductive region of inductor210. Integrated circuit200is similar to integrated circuit100(FIG. 1B). Same elements have a same reference number increased by 100. In comparison with integrated circuit100, the perpendicular structure of inductor shielding structure220exposes portions of circuitry204to inductor210in a straight line extending perpendicular to the top surface of substrate202.

Inductor shielding structure220is configured to reduce coupling between circuitry204and inductor210. First conductive layer220aincludes a plurality of parallel conductive lines extending in a first direction parallel to the top surface of substrate202. Second conductive layer220bincludes a plurality of conductive lines extending in a second direction parallel to the top surface of substrate202and perpendicular to the first direction.

In some embodiments, a pitch between conductive lines of first conductive layer220ais less than a width of conductive lines of second conductive layer220b. In some embodiments, the pitch between conductive lines of first conductive layer220ais equal to or greater than the width of conductive lines of second conductive layer220b. In some embodiments, a pitch between conductive lines of second conductive layer220bis less than a width of conductive lines of first conductive layer220a. In some embodiments, the pitch between conductive lines of second conductive layer220bis equal to or greater than the width of conductive lines of first conductive layer220a. In some embodiments, the pitch between conductive lines of first conductive layer220ais equal to the pitch between conductive lines of second conductive layer220b. In some embodiments, the pitch between conductive lines of first conductive layer220ais different from the pitch between conductive lines of second conductive layer220b.

FIG. 2Cis a cross-sectional view of integrated circuit200including inductor shielding structure220in accordance with some embodiments.FIG. 2Cis a cross-sectional view in a central region of inductor210where no conductive elements of the inductor are above circuitry204. Inductor shielding structure220is continuous across integrated circuit200despite the lack of conductive elements of inductor210directly above portions of the inductor shielding structure. In some embodiments, inductor shielding structure220is discontinuous in the central region of inductor210and an opening in the inductor shielding structure exposes a portion of circuitry204.

FIG. 2Dis a perspective view of integrated circuit200including inductor shielding structure220in accordance with some embodiments.FIG. 2Dincludes both first conductive layer220aand second conductive layer220bin dielectric layer206.FIG. 2Dalso includes a multi-layer inductor210wherein the layers of the inductor are connected by vias215.

FIG. 3is a top view of an integrated circuit300including an inductor shielding structure320in accordance with some embodiments. Integrated circuit300is similar to integrated circuit100. Integrated circuit300includes an inductor310. Inductor310is the same as inductor110(FIG. 1A). Inductor shielding structure320is between inductor310and circuitry (not shown inFIG. 3). Inductor shielding structure320has a perpendicular arrangement. In some embodiments, inductor shielding structure320has an interlaced arrangement. Inductor shielding structure320includes a first portion325in areas spaced from portions of inductor310in a direction parallel to a top surface of a substrate (not shown inFIG. 3). Inductor shielding structure320includes a second portion330beneath inductor310.

First portion325includes a first conductive layer325ahaving a plurality of parallel conductive lines extending in a first direction parallel to the top surface of the substrate. First portion325also includes a second conductive layer325bhaving a plurality of conductive lines extending in a second direction parallel to the top surface of the substrate and perpendicular to the first direction. In some embodiments, conductive lines of second conductive layer325bextend in the first direction in an interlaced arrangement. First portion325extends under corner sections310aand port sections310bof inductor310.

Second portion330extends under straight regions310cof inductor310between adjacent corner regions310aof the inductor and between the corner region310aand an adjacent port region310bof the inductor. Second portion330includes a first conductive layer330ahaving at least one conductive line extending parallel to conductive liens of first conductive layer325a. Second portion330also includes a second conductive layer330bhaving a plurality of parallel conductive lines extending perpendicular to the at least one conductive line of first conductive layer330ain a perpendicular arrangement. In some embodiments, the conductive lines of second conductive layer330bextend parallel to the at least one conductive line of first conductive layer330ain an interlaced arrangement.

Edges of second portion330extend beyond edges of inductor310when viewed in a direction perpendicular to the top surface of the substrate. In some embodiments, a ratio of a width of second portion330to a width of straight regions310cranges from about 1.0 to about 1.5. In some embodiments, a ratio of a width of second portion330to a width of straight regions310cranges from about 1.0 to about 1.25. In some embodiments, a ratio of a width of second portion330to a width of straight regions310cranges from about 0.8 to about 1.25 If the ratio of the width of second portion330to the width of straight regions310cis too small, an ability of the second portion to reduce coupling between inductor310and circuitry is hampered, in some instances. If the ratio of the width of second region330to the width of straight regions310c, difficulty of manufacturing integrated circuit300increases because spacing between adjacent second portions330is reduced.

A width of the at least one conductive line of first conductive layer330ais less than the width of straight regions310c. In some embodiments, the width of the at least one conductive line of first conductive layer330ais equal to or greater than the width of straight regions310c.

The width of the at least one conductive line of first conductive layer330ais greater than a width of conductive lines of first conductive layer325a. A width of the conductive lines of second conductive layer330bis greater than a width of the conductive lines of second conductive layer325b. In some embodiments, the width of the conductive liens of second conductive layer330bis equal to or less than the width of the conductive lines of second conductive layer325b.

In some embodiments in which includes a plurality of conductive lines in first conductive layer330a, a pitch between the conductive lines of first conductive layer330ais larger than a pitch between the conductive lines of first conductive layer325a. In some embodiments in which includes a plurality of conductive lines in first conductive layer330a, the pitch between the conductive lines of first conductive layer330ais less than or equal to the pitch between the conductive lines of first conductive layer325a. In some embodiments, a pitch between the conductive lines of second conductive layer330bis larger than a pitch between the conductive lines of second conductive layer325b. In some embodiments, the pitch between the conductive lines of second conductive layer330bis equal to or less than the pitch between the conductive lines of second conductive layer325b.

Second portion330is spaced from first portion325by a gap340. In some embodiments, a width of gap340is a smallest spacing distance able to be manufactured, i.e., a critical dimension. In some embodiments, gap340is omitted and second portion330abuts first portion325. In some embodiments, first portion325is discontinuous in a central region of inductor310and a portion of the circuitry underlying inductor shielding structure320is exposed.

FIG. 4Ais a top view of a portion of an integrated circuit400including an inductor shielding structure420in accordance with some embodiments. Integrated circuit400is similar to integrated circuit100(FIG. 1A). Same elements have a same reference number increased by 300. Integrated circuit400includes inductor410which is the same as inductor110. Inductor shielding structure420includes a corner region425underneath a corner of inductor410. Inductor shielding structure420also includes a straight region430underneath a straight region of inductor410. Inductor shielding structure420is discontinuous in a central region of inductor410and an opening exposes circuitry (not shown inFIG. 4A) underlying the inductor shielding structure.

Corner region425has a different layout of conductive lines in comparison with straight region430. In some embodiments, a pitch between conductive lines of corner region425is equal to a pitch between conductive lines of straight region430. In some embodiments, the pitch between conductive lines of corner region425is less than the pitch between conductive lines of straight region430. In some embodiments, straight region430is the same as second portion330(FIG. 3). A width of inductor shielding structure420is at least twice a width of inductor410. In some embodiments, a ratio of the width of inductor shielding structure420to the width of inductor410ranges from about 2.0 to about 3.0. In some embodiments, a ratio of the width of inductor shielding structure420to the width of inductor410ranges from about 2.0 to about 2.5. In some embodiments, a ratio of the width of inductor shielding structure420to the width of inductor410ranges from about 2.3 to about 3.0. In some embodiments, a ratio of the width of inductor shielding structure420to the width of inductor410ranges from about 1.8 to about 3.0.

FIG. 4Bis a schematic view of corner region425of inductor shielding structure420in accordance with some embodiments. Corner region425includes a first conductive layer similar to first conductive layer325a(FIG. 3). In comparison with first conductive layer325, the first conductive layer of corner region425includes a continuous conductive line425a′ and a plurality of connecting elements425a″. Continuous conductive line425a′ is parallel to each of the plurality of connecting elements425a″. A distance between continuous conductive line425a′ and a connecting element425a″ closest to straight region430is greater than a distance between continuous conductive line425a′ and a connecting element425a″ spaced from straight region430. A distance between continuous conductive line425a′ and a connecting element425a″ farthest from straight region430is less than a distance between continuous conductive line425a′ and a connecting element425a″ closer to straight region430.

Corner region425further includes a second conductive layer similar to second conductive layer325b(FIG. 3). In comparison with second conductive layer325b, the second conductive layer of corner region425includes a first conductive line425b′ extending from continuous conductive line425a′ to one connecting element425a″. First conductive line425b′ is above or below continuous conductive line425a′ and the connecting element425a″. In some embodiments, first conductive line425b′ is electrically connected to continuous conductive line425a′ and the connecting element425a″. The second conductive layer of corner region425also includes a second conductive line425b″ extending from the same connecting element425a″ connected to first conducting line425b′. In some embodiments, second conductive line425b″ is electrically connected to connecting element425b″. Second conductive line425b″ is in a same plane as first conductive line425b′. Second conductive line425b″ extends less than an entire way from the connective element425a″ to continuous conductive line425a′, i.e., a length of second conductive line425b″ is less than a length of first conductive line425b′. Each connecting element425a″ includes similar first conductive line and second conductive line. A length of the first conductive line is equal to or greater than a distance between continuous conductive line425a′ and a corresponding connecting element425a″. A length of the second conductive line is less than the distance between continuous conductive line425a′ and the corresponding connecting element425a″.

FIG. 4Cis a schematic view of straight region430of inductor shielding structure420in accordance with some embodiments. Straight region430includes a first conductive layer similar to first conductive layer330a(FIG. 3). In comparison with first conductive layer330a, the first conductive layer of straight region430includes a continuous conductive line430a′ and a plurality of connecting elements430a″. Continuous conductive line430a′ is parallel to each of the plurality of connecting elements430a″. A distance between continuous conductive line430a′ and each connecting element430a″ is constant for each connecting element430a″.

Straight region430further includes a second conductive layer similar to second conductive layer330b(FIG. 3). In comparison with second conductive layer330b, the second conductive layer of straight region430includes a first conductive line430b′ extending from continuous conductive line430a′ to one connecting element430a″. First conductive line430b′ is above or below continuous conductive line430a′ and the connecting element430a″. In some embodiments, first conductive line430b′ is electrically connected to continuous conductive line430a′ and the connecting element430a″. The second conductive layer of straight region430also includes a second conductive line430b″ extending from the same connecting element430a″ connected to first conducting line430b′. In some embodiments, second conductive line430b″ is electrically connected to connecting element430a″. Second conductive line430b″ is in a same plane as first conductive line430b′. Second conductive line430b″ extends less than an entire way from the connective element430a″ to continuous conductive line430a′, i.e., a length of second conductive line430b″ is less than a length of first conductive line430b′. Each connecting element430a″ includes similar first conductive line and second conductive line. A length of the first conductive line is equal to or greater than a distance between continuous conductive line430a′ and a corresponding connecting element430a″. A length of the second conductive line is less than the distance between continuous conductive line430a′ and the corresponding connecting element430a″.

FIG. 4Dis a schematic view of straight region430of inductor shielding structure420in accordance with some embodiments. In comparison withFIG. 4C, straight region430inFIG. 4Dincludes a second continuous conductive line and a second plurality of connecting elements. Straight region430inFIG. 4Dalso includes an additional first conductive line and an additional second conductive line extending from a corresponding connecting element. The additional first conductive line and the additional second conductive line connected to the second plurality of connecting elements are arranged in an interdigitated arrangement with the first conductive line and the second conductive line connected to the first plurality of connecting elements fromFIG. 4C.

Straight region430inFIG. 4Chelps to reduce coupling between inductor410and circuitry in integrated circuit400in comparison with straight region430inFIG. 4Bdue to the increased physical shielding. However, straight region430inFIG. 4Cuses more material and is more difficult to manufacture in comparison with straight region430inFIG. 4B.

FIG. 4Eis a schematic view of straight region430of inductor shielding structure420in accordance with some embodiments. In comparison withFIG. 4D, straight region430inFIG. 4Eincludes several connective elements440electrically connected to corresponding conductive lines the second conductive layer of straight region430. Connective elements440are in a same plane as second conductive layer of straight region430.

Straight region430inFIG. 4Dhelps to reduce coupling between inductor410and circuitry in integrated circuit400in comparison with straight region430inFIGS. 4B and 4Cdue to the increased physical shielding. However, straight region430inFIG. 4Duses more material and is more difficult to manufacture in comparison with straight region430inFIGS. 4B and 4C.

FIG. 5Ais a graph500of a coupling efficiency of a transmission line with an inductor in accordance with some embodiments.FIG. 5Bis a schematic view of a testing arrangement500′ for determining a coupling efficiency of a transmission line550and an inductor560for graph500in accordance with some embodiments. In testing arrangement500′ transmission line550extends under a central portion of inductor560. During testing a signal is passed through inductor560from port1to port2.

Graph500includes a plot510which indicates a coupling between transmission line550and inductor560measured at port4and port2of testing arrangement500′ without the use of an inductor shielding structure. Graph500includes a plot520which indicates a coupling between transmission line550and inductor560measured at port3and port2of testing arrangement500′ without the use of an inductor shielding structure. Graph500includes a plot530which indicates a coupling between transmission line550and inductor560measured at port4and port2of testing arrangement500′ including an inductor shielding structure, e.g., inductor shielding structure120(FIG. 1A), inductor shielding structure220(FIG. 2A), inductor shielding structure320(FIG. 3), or inductor shielding structure420(FIG. 4A). Graph500includes a plot540which indicates a coupling between transmission line550and inductor560measured at port3and port2of testing arrangement500′ including the inductor shielding structure. Graph500indicates that coupling between inductor560and transmission line550is less than about 40 decibels (dB) at a test signal frequency below 30 gigahertz (GHz).

FIG. 6Ais a graph600of a coupling efficiency of a transmission line with an inductor in accordance with some embodiments.FIG. 6Bis a schematic view of a testing arrangement600′ for determining a coupling efficiency of a transmission line650and an inductor660for graph600in accordance with some embodiments. In testing arrangement600′ transmission line650extends under a conductive portion of inductor660. During testing a signal is passed through inductor660from port1to port2.

Graph600includes a plot610which indicates a coupling between transmission line650and inductor660measured at port4and port1of testing arrangement660′ without the use of an inductor shielding structure. Graph600includes a plot620which indicates a coupling between transmission line650and inductor660measured at port3and port2of testing arrangement600′ without the use of an inductor shielding structure. Graph600includes a plot630which indicates a coupling between transmission line650and inductor660measured at port4and port1of testing arrangement600′ including an inductor shielding structure, e.g., inductor shielding structure120(FIG. 1A), inductor shielding structure220(FIG. 2A), inductor shielding structure320(FIG. 3), or inductor shielding structure420(FIG. 4A). Graph600includes a plot640which indicates a coupling between transmission line650and inductor660measured at port3and port2of testing arrangement600′ including the inductor shielding structure. Graph600indicates that coupling between inductor660and transmission line650is less than about 32 dB at a test signal frequency below 10 GHz.

FIG. 7is a flowchart of a method700of making an integrated circuit including an inductor shielding structure in accordance with some embodiments. In operation702, a circuit is formed over a substrate. In some embodiments, the circuit includes active devices. In some embodiments, the circuit includes passive devices. In some embodiments, the circuit is circuitry104(FIG. 1B) or circuitry204(FIG. 2B). In some embodiments, the circuit is formed using a series of doping processes, deposition processes, etching processes, or other suitable processes.

In some embodiments, operation702is omitted. Operation702is omitted when a pre-formed circuit is received by a manufacturer of the inductor shielding structure, in some embodiments. Operation702is omitted when the circuit is formed in a separate process, in some embodiments.

In operation704a first layer of the inductor shielding structure is formed over the circuit. In some embodiments, the first layer of the inductor shielding structure is formed by etching openings in an interconnect of the circuit and forming a conductive material in the openings. In some embodiments, the first layer of the inductor shielding structure is formed by forming a layer of conductive material over the interconnect of the circuit. In some embodiments, a pitch between conductive lines in the first layer of the inductor shielding structure is constant. In some embodiments, the first layer of the inductor shielding structure includes at least one portion having a first pitch and at least one portion having a second pitch different from the first pitch. In some embodiments, a width of conductive lines in the first layer of the inductor shielding structure is constant. In some embodiments, the first layer of the inductor shielding structure includes at least one portion having conductive lines having a first width and at least one portion having conductive lines having a second width different from the first width. In some embodiments, the first layer of the inductor shielding structure is connected to a reference voltage, e.g., a ground voltage. In some embodiments, the first layer of the inductor shielding structure is electrically floated.

In operation706a second layer of the inductor shielding structure is formed over the first layer of the inductor shielding structure. In some embodiments, the second layer of the inductor shielding structure is formed by etching openings in the interconnect of the circuit and forming a conductive material in the openings. In some embodiments, the second layer of the inductor shielding structure is formed by forming a layer of conductive material over the interconnect of the circuit. In some embodiments, a pitch between conductive lines in the second layer of the inductor shielding structure is constant. In some embodiments, the second layer of the inductor shielding structure includes at least one portion having a first pitch and at least one portion having a second pitch different from the first pitch. In some embodiments, a width of conductive lines in the second layer of the inductor shielding structure is constant. In some embodiments, the second layer of the inductor shielding structure includes at least one portion having conductive lines having a first width and at least one portion having conductive lines having a second width different from the first width. In some embodiments, the pitch of conductive lines in the second layer of the inductor shielding structure is equal to the pitch of conductive lines in the first layer of the inductor shielding structure. In some embodiments, at least one pitch in the second layer of the inductor shielding structure is different from at least one pitch in the first layer of the inductor shielding structure. In some embodiments, the width of conductive lines in the second layer of the inductor shielding structure is equal to the width of conductive lines in the first layer of the inductor shielding structure. In some embodiments, at least one conductive line width in the second layer of the inductor shielding structure is different from at least one conductive line width in the first layer of the inductor shielding structure. In some embodiments, the second layer of the inductor shielding structure is connected to the reference voltage. In some embodiments, the second layer of the inductor shielding structure is electrically floated.

In operation708, an inductor is formed over the inductor shielding structure. In some embodiments, the inductor is formed over a dielectric layer configured to separate the inductor from the inductor shielding structure. In some embodiments, the inductor is completely over the dielectric layer. In some embodiments, at least a portion of the inductor is formed within the dielectric layer. In some embodiments, the inductor includes a single conductive layer. In some embodiments, the inductor is a multi-layered conductive structure.

In some embodiments, method700includes additional operations. In some embodiments, an order of operation of method700is changed.

One aspect of this description relates to an inductor shielding structure. The inductor shielding structure includes a first conductive layer including a plurality of first conductive lines having a first width and a plurality of second conductive lines having a second width. The inductor shielding structure further includes a second conductive layer over the first conductive layer. The second conductive layer includes at least one third conductive line having a third width and a plurality of fourth conductive lines having a fourth width. Each conductive line of the at least one third conductive line is parallel to each conductive line of the plurality of first conductive lines. Each conductive line of the plurality of fourth conductive lines is parallel to each conductive line of the plurality of second conductive lines. The first width is different from the second width, or the third width is different from the fourth width.

Another aspect of this description relates to an integrated circuit. The integrated circuit includes a circuit over a substrate. The integrated circuit further includes an inductor over the circuit, wherein the inductor includes a straight region and a corner region. The integrated circuit further includes an inductor shielding structure between the inductor and the circuit. The inductor shielding structure includes a first conductive layer including a plurality of first conductive lines. The plurality of first conductive lines extends parallel to a top surface of the substrate. The inductor shielding structure further includes a second conductive layer including a plurality of second conductive lines. The plurality of second conductive lines extends parallel to the top surface of the substrate. The second conductive layer is between the first conductive layer and the inductor.

Still another aspect of this description relates to a method of making an integrated circuit. The method includes forming an inductor over a circuit. The inductor includes a straight region and a corner region. The circuit is over a substrate. The method further includes forming an inductor shielding structure between the inductor and the circuit. Forming the inductor shielding structure includes forming a first conductive layer including a plurality of first conductive lines, wherein the plurality of first conductive lines extends parallel to a top surface of the substrate. Forming the inductor shielding structure further includes forming a second conductive layer including a plurality of second conductive lines. The plurality of second conductive lines extends parallel to the top surface of the substrate, and the second conductive layer is between the first conductive layer and the inductor.