X capacitor discharging circuit and method thereof

A discharge circuit for an X capacitor has a first voltage detection circuit providing a first indicating signal based on a voltage across two input terminals of a switching converter to indicate whether the two input terminals are connected to an AC power source, and a discharge module starting a discharge operation on the X capacitor based on first indicating signal, and the discharge operation discharges the X capacitor during a first time period, and stops discharging the X capacitor and compares a sampled signal with the voltage across the two input terminals during a following second time period.

This application claims the benefit of CN application No. 201910705470.0, filed on Aug. 1, 2019, and incorporated herein by reference.

TECHNICAL FIELD

The present invention relates to electrical circuit, more particularly but not exclusively relates to X capacitor discharging circuit and method.

BACKGROUND

An EMI filter is needed at input terminals of a switching converter to suppress electromagnetic interference. The EMI filter usually has at least one capacitor coupled between the input terminals of the switching converter, and the at least one capacitor is also known as safety capacitor, or X capacitor. When the switching converter is disconnected from a power source, a voltage across the X capacitor should be reduced to a safe value within a specified time period. Otherwise, the voltage across the X capacitor will pose a safety risk to those who touch the switching converter after disconnected from the power source. Therefore, it is necessary to propose a safe, reliable and efficient discharging circuit and discharging method for X capacitor.

SUMMARY

It is one of the objects of the present invention to provide an X capacitor discharging circuit and method with low power loss, high efficiency and high security.

One embodiment of the present invention discloses a discharge circuit for an X capacitor, the X capacitor is coupled between two input terminals of a switching converter, the discharge circuit comprising: a first voltage detection circuit, configured to provide a first indicating signal based on a voltage across the two input terminals of the switching converter, to indicate whether the two input terminals of the switching converter are connected to an AC power source; and a discharge module, coupled to the first voltage detection circuit to receive the first indicating signal, wherein when the first indicating signal indicates that the two input terminals of the switching converter are disconnected from the AC power source, the discharge module starts a discharge operation on the X capacitor; wherein the discharge operation comprises providing a sampled signal via sampling the voltage across the two input terminals of the switching converter, discharging the X capacitor during a first time period, and stopping discharging the X capacitor and comparing the sampled signal with the voltage across the two input terminals of the switching converter to judge whether the two input terminals of the switching converter are connected to the AC power source or a DC power source during a following second time period.

Another embodiment of the present invention discloses a discharge method for an X capacitor, the X capacitor is coupled between two input terminals of a switching converter, the discharge method comprising: detecting whether the two input terminals of the switching converter are connected to an AC power source; starting a discharge operation on the X capacitor if the two input terminals of the switching converter are detected as being disconnected from the AC power source; wherein the discharge operation further comprises providing a sampled signal via sampling a voltage across the two input terminals of the switching converter, discharging the X capacitor during a first time period, and stopping the discharging of the X capacitor and judging whether the two input terminals of the switching converter are connected to the AC power source or a DC power source based on the sampled signal and the voltage across the two input terminals of the switching converter during a following second time period.

Yet another embodiment of the present invention discloses a discharge circuit for an X capacitor, the X capacitor is coupled between two input terminals of a switching converter, the discharge circuit comprising: a first voltage detection circuit, configured to provide a first indicating signal based on a voltage across the two input terminals of the switching converter to indicate whether the two input terminals of the switching converter are connected to an AC power source; a second voltage detection circuit, configure to sample the voltage across the two input terminals of the switching converter under control of a sample control signal, and configured to generate a sampled signal accordingly, the second voltage detection circuit is further configured to provide a second indicating signal based on the sampled signal and the voltage across the two input terminals of the switching converter; and a discharge component, configured to discharge the X capacitor under control of a discharge control signal; wherein the discharge circuit is configured to start a discharge operation on the X capacitor when the first indicating signal indicates that the two input terminals of the switching converter are connected to the AC power source.

DETAILED DESCRIPTION

In the present application, numerous specific details are described to provide a thorough understanding of the present invention, such as examples of circuits, components, and methods. These embodiments illustrated are exemplary, not to confine the scope of the invention. A person ordinary skilled in the art will recognize, however, that the invention can be implemented without one or more of the specific details. In other instances, well-known details are not shown or described to avoid obscuring the aspects of the invention. Some phrases are used in some exemplary embodiments. However, the usage of these phrases is not confined to these embodiments.

FIG. 1schematically illustrates a circuit block diagram of a switching converter10according to an embodiment of the present invention. As shown inFIG. 1, switching converter10comprises an X capacitor XCAP, a rectifier circuit100, a DC/DC (direct current to direct current) circuit200, and a discharge circuit300. X capacitor is coupled between input terminals IN1and IN2of switching converter10. Input terminals IN1and IN2receive an input voltage VIN from a direct current (DC) power source or an alternate current (AC) power source, rectifier circuit100converts input voltage VIN to a DC voltage VDC, and a specified DC voltage is provided to a load through conversion of DC/DC circuit200.

In one embodiment, discharge circuit300comprises a rectifier circuit400. Discharge circuit300is coupled to input terminals IN1and IN2of switching converter10through rectifier circuit400. Rectifier circuit400comprises a first input terminal, a second input terminal and an output terminal, wherein the first input terminal and the second input terminal of rectifier circuit400are respectively coupled to input terminals IN1and IN2of switching converter10, the output terminal of rectifier circuit400is configured to provide a rectification voltage HV via rectifying a voltage across input terminals IN1and IN2of switching converter10.

Discharge circuit300further comprises an AC voltage detection circuit302, and a discharge module303. An input terminal of AC voltage detection circuit302is coupled to the output terminal of rectifier circuit400to receive rectification voltage HV, and an output terminal of AC voltage detection circuit302is configured to provide a first indicating signal FI1to indicate whether input terminals IN1and IN2of switching converter10is connected to the AC power source according to the voltage across input terminals IN1and IN2of switching converter10. Discharge module303is coupled to AC voltage detection circuit302to receive the first indicating signal FI1. When the first indicating signal FI1indicates that input terminals IN1and IN2of switching converter10are disconnected from the AC power source, discharge module303performs a discharge operation on X capacitor XCAP.

In one embodiment, discharge module303further provides a detecting control signal Ctrl to AC voltage detection circuit302, AC voltage detection circuit302is configured to conduct voltage detection on the voltage across input terminals IN1and IN2under control of detecting control signal Ctrl.

FIG. 2shows a flow chart20for the discharge operation on X capacitor XCAP according to an embodiment of the present invention. Flow chart20comprises steps S11-S13, and the discharge protection comprises repeated sequences A-B shown in steps S11-S12.

Step S11comprises sequence A: discharging X capacitor XCAP during a time period TP1.

Step S12comprises sequence B: during a time period TP2, stopping discharging X capacitor and detecting whether input terminals IN1and IN2are connected to a power source, e.g., the AC power source or the DC power source based on the voltage across input terminals IN1and IN2.

When terminals IN1and IN2are detected being connected to the power source, stopping the repeated sequences A-B, go to step S13, i.e., stopping the discharge operation on X capacitor XCAP. Otherwise, go to step S11, continuing the repeated sequences A-B.

The discharge operation disclosed by embodiments of the present invention discharges X capacitor XCAP after input terminals IN1and IN2disconnected from the AC power source, and then stops discharge X capacitor XCAP and checks whether input terminals IN1and IN2are connected to one of the AC power source and the DC power source. Thus embodiments of the present invention can avoid false triggering of the discharge operation, have high reliability, low power dissipation and high efficiency.

FIG. 3schematically illustrates a circuit block diagram of discharge module303according to an embodiment of the present invention. As shown inFIG. 3, discharge module303further comprises a timing logic circuit21and a discharge component22. Timing logic circuit21is coupled to AC voltage detection circuit302to receive the first indicating signal FI1, and is configured to provide a discharge control signal Ct2and detecting control signal Ctrl based on the first indicating signal FI1. Discharge component22is configured to discharge X capacitor XCAP under control of discharge control signal Ct2. AC voltage detection circuit302is configured to detect the voltage across input terminals IN1and IN2under control of detecting control signal Ctrl. In one embodiment, timing logic circuit21comprises a timing circuit211and a logic circuit212. Timing circuit211is configured to provide a first timing signal T1and a second timing signal T2based on the first indicating signal FI1. Logic circuit212is configured to provide discharge control signal Ct2and detecting control signal Ctrl based on the first timing signal T1and the second timing signal T2.

FIG. 4shows waveforms of discharge module303shown inFIG. 3according to an embodiment of the present invention. The waveforms inFIG. 4shows the first indicating signal FI1, the first timing signal T1, the second timing signal T2, detecting control signal Ctrl, and discharge control signal Ct2from top to below. In the embodiment shown inFIG. 4, when switching converter10works normally, detecting control signal Ctrl is at logic high, AC voltage detection circuit302is configured to detect the voltage across input terminals IN1and IN2and update the first indicating signal FI1accordingly. At time t1, the first indicating signal FI1transits to at logic high, which indicates that switching converter10is disconnected from the AC power source, and discharge module303starts the discharge operation on X capacitor XCAP. Timing circuit211starts timing, the first timing signal T1becomes at logic high, discharge control signal Ct2becomes at logic high, discharge component22starts discharging X capacitor XCAP, detecting control signal Ctrl becomes at logic low, AC voltage detection circuit302stops detect the voltage across input terminals IN1and IN2. At time t2, the first time period Tp1during which the first timing signal T1remaining at logic high equals a first predetermined time period, then the first timing signal T1becomes at logic low, the second timing signal T2becomes at logic high, discharge control signal Ct2becomes at logic low, discharge component22stops discharging X capacitor XCAP. At the following time t2′, detecting control signal Ctrl becomes at logic high, AC voltage detection circuit302is configured to detect the voltage across input terminals IN1and IN2and update the first indicating signal FI1accordingly, timing logic circuit21is configured to judge whether input terminals IN1and IN2are connected to the AC power source based on the first indicating signal FI1. In one embodiment, there is an interval between time t2and time t2′. At time t3, the second time period Tp2during which the second timing signal T2remaining at logic high equals a second predetermined time period, the second timing signal T2becomes at logic low. The second time period Tp2is a time period during which discharge component22stopping discharging X capacitor XCAP. In the embodiment shown inFIG. 4, during a detecting time period between time t2′ and time t3, the first indicating signal FI1is at logic high, input terminals IN1and IN2are still disconnected from the AC power source, timing circuit211restarts timing again after the second timing signal T2becomes at logic low. Then repeat above operation, the first timing signal T1becomes at logic high, discharge control signal Ct2becomes at logic high, detecting control signal Ctrl becomes at logic low, discharge component22starts discharging X capacitor XCAP, AC voltage detection circuit302stops detect the voltage across input terminals IN1and IN2. At time t4, the first time period Tp1during which the first timing signal T1remaining at logic high equals the first predetermined time period, then the first timing signal T1becomes at logic low, the second timing signal T2becomes at logic high, discharge control signal Ct2becomes at logic low, discharge component22stops discharging X capacitor XCAP. At the following time t4′, detecting control signal Ctrl becomes at logic high, AC voltage detection circuit302is configured to detect the voltage across input terminals IN1and IN2and update the first indicating signal FI1accordingly, timing logic circuit21is configured to judge whether input terminals IN1and IN2are connected to the AC power source based on the first indicating signal FI1. At time t5, the second time period Tp2during which the second timing signal T2remaining at logic high equals the second predetermined time period, the second timing signal T2becomes at logic low. In the embodiment shown inFIG. 4, during a time period between time t4′ and time t5, the first indicating signal FI1becomes at logic low, it is judged that input terminals IN1and IN2are connected to the AC power source, timing circuit211stops, and the discharge operation stops. In one embodiment, the first predetermined time period and the second predetermine time period may be constant or programmable.

FIG. 5shows waveforms of discharge module303shown inFIG. 3according to another embodiment of the present invention. Different fromFIG. 4, in the embodiment shown inFIG. 5, when detecting control signal Ctrl is at logic high, timing circuit211stops timing and discharge component22stops discharging X capacitor XCAP immediately once it is judged that input terminals IN1and IN2are connected to the AC power source, e.g., the first indicating signal FI1becomes at logic low.

FIG. 6schematically illustrates a circuit block of a discharge component22according to an embodiment of the present invention. InFIG. 6, discharging component22comprises a discharging current source331and discharging switch332coupled in serial between rectifier voltage HV and a reference ground. Discharging switch332is turned ON and OFF based on discharge control signal Ct2. In one embodiment, when discharge control signal Ct2is at a first state, e.g., at logic high, discharging switch332is turned ON, discharging current source331discharges X capacitor XCAP through discharge switch332.

FIG. 7schematically illustrates a circuit block diagram of discharge module303according to another embodiment of the present invention. InFIG. 7, discharge module303further comprises a timing logic circuit31, discharge component22, and a DC voltage detection circuit33. Timing logic circuit31has a first input terminal, a second input terminal, a first output terminal, a second output terminal, and a third output terminal, wherein the first input terminal of timing logic circuit31is coupled to AC voltage detection circuit302to receive the first indicating signal FI1, the second input terminal of timing logic circuit31is configured to receive a second indicating signal FI2, the first output terminal of timing logic circuit31is configured to provide discharge control signal Ct2, the second output terminal of timing logic circuit32is configured to provide sample control signal Ct1, and the third output terminal of timing logic circuit32is configured to provide detecting control signal Ctrl. The input terminal of discharge component22is coupled to the first output terminal of timing logic circuit31to receive discharge control signal Ct2, and the output terminal of discharge component22is coupled to one terminal of X capacitor XCAP through rectifier circuit400. Discharge component22is configured to discharge X capacitor XCAP based on discharge control signal Ct2. DC voltage detection circuit33has a first input terminal, a second input terminal, a third input terminal and an output terminal, wherein the first input terminal of DC voltage detection circuit33is coupled to input terminals IN1and IN2through rectifier circuit400, the second input terminal of DC voltage detection circuit33is coupled to the second input terminal of timing logic circuit32to receive sample control signal Ct1, the third input terminal of DC voltage detection circuit33is configured to receive detecting control signal Ctrl, and the output terminal of DC voltage detection circuit33is coupled to the second input terminal of timing logic circuit31to provide the second indicating signal FI2. DC voltage detection circuit33is configured to detect whether input terminals IN1and IN2are connected to the DC power source and provide the second indicating signal FI2accordingly. When the second indicating signal FI2indicates that input terminals IN1and IN2are connected to the DC power source, discharge component22is controlled by discharge control signal Ct2to stop discharging X capacitor XCAP. In one embodiment, when it is judged that input terminals IN1and IN2are connected to the DC power source, discharge module303stops working, e.g., be disabled.

In the embodiment ofFIG. 7, DC voltage detection circuit33further comprises a sample and hold circuit331and a comparison circuit332. Sample and hold circuit331has a first input terminal, a second input terminal and an output terminal, wherein the first input terminal of sample and hold circuit331is coupled to input terminals IN1and IN2through rectifier circuit400, the second input terminal of sample and hold circuit331is coupled to the second output terminal of timing logic circuit31to receive sample control signal Ct1. Sample and hold circuit331is configured to sample the voltage across input terminals IN1and IN2and provide a sampled signal SHV based on sample control signal Ct1. Comparison circuit332receives sampled signal SHV, a bias signal Vbias, rectifier voltage HV, and detecting control signal Ctrl, and provides the second indicating signal FI2via comparing rectifier voltage HV with sampled signal SHV when detecting control signal Ctrl is active, e.g., at logic high.

In one embodiment, timing logic circuit31further comprises a timing circuit311and a logic circuit312. Timing circuit311is configured to provide the first timing signal T1, the second timing signal T2, and a third timing signal T3based on the first indicating signal FI1and the second indicating signal FI2. Logic circuit312is configured to provide detect control signal Ctrl, discharge control signal Ct2and sample control signal Ct1based on the first timing signal T1, the second timing signal T2, and the third timing signal T3.

FIG. 8shows waveforms of discharge module303shown inFIG. 7according to an embodiment of the present invention.FIG. 8shows the first indicating signal FI1, the second indicating signal FI2, the third timing signal T3, the first timing signal T1, the second timing signal T2, detecting control signal Ctrl, sample control signal Ct1, and discharge control signal Ct2from top to below. When switching converter10works normally, detecting control signal Ctrl is at logic high, AC detection circuit302is configured to detect the voltage across input terminals IN1and IN2. At time t6, the first indicating signal FI1becomes at logic high to indicate that input terminals IN1and IN2are disconnected from the AC power source, the discharge operation on X capacitor XCAP starts. Timing circuit311starts timing, the third timing signal becomes at logic high, sample control signal Ct1becomes at logic high, sample and hold circuit331samples the voltage across input terminals IN1and IN2, e.g., samples rectifier voltage HV and provides sampled signal SHV. At time t7, the first timing signal T1becomes at logic high, discharge control signal Ct2becomes at logic high, discharge component22starts to discharge X capacitor XCAP, detecting control signal Ctrl becomes at logic low. At time t8, the time period Tp1during which the first timing signal T1maintaining at logic high, the first timing signal T1becomes at logic low, the second timing signal becomes at logic high, discharge control signal Ct2becomes at logic low, and discharge component22stops discharge X capacitor XCAP. At the following time t8′, detecting control signal Ctrl becomes at logic high, AC voltage detection circuit302is configured to detect the voltage across input terminals IN1and IN2and update the first indicating signal FI1accordingly. Comparison circuit332compares sampled signal SHV with the voltage across input terminals IN1and IN2, and updates the second indicating signal FI2accordingly. In one embodiment, at least partial of the first time period Tp1is between time t6and t8. One with ordinary skill in the art should understand that sample and hold circuit331may sample the voltage across input terminals IN1and IN2before or during discharging X capacitor XCAP. In one embodiment, comparison circuit332is configured to provide the second indicating signal FI2via comparing sampled signal SHV and rectifier voltage HV. When rectifier voltage HV is far less than sampled signal SHV, the second indicating signal FI2indicates that input terminals IN1and IN2are disconnected from the DC power source. Otherwise, when rectifier voltage HV equals or is a little less than sampled signal SHV, the second indicating signal FI2indicates that input terminals IN1and IN2are connected to the DC power source. In one embodiment, when rectifier voltage HV is larger than or equal to a difference between sampled signal SHV and a bias signal Vbias, the second indicating signal FI2indicates that input terminals IN1and IN2are connected to the DC power source. In one embodiment, bias signal Vbias is slightly larger than zero volts. In one embodiment, bias signal Vbias is programmable. Timing logic circuit31is configured to judge whether input terminals IN1and IN2are connected to the AC power source based on the first indicating signal FI1, and judge whether input terminals IN1and IN2are connected to the DC power source based on the second indicating signal FI2. In the embodiment shown inFIG. 8, during a time period between time t8and time t8′, the first indicating signal FI1is at logic high to indicate that input terminals IN1and IN2are disconnected from the AC power source, and the second indicating signal FI2is at logic high to indicate that input terminals IN1and IN2are disconnected from the DC power source. In one embodiment, there is an interval between time t8and time t8′. At time t9, timing circuit311restarts timing. Above operation repeats until time t11. At time t11, the second indicating signal FI2becomes at logic low to indicate that input terminals IN1and IN2are connected to the DC power source, and then timing circuit311stops, the discharge operation on X capacitor XCAP stops.

FIG. 9shows a flow chart90of a discharge method of discharge module303shown inFIG. 7according to an embodiment of the present invention. The discharge method shown inFIG. 9comprises steps S21-S27.

At step S21, switching converter10is in a normal operation.

At step S22, if the first indicating signal FI1indicates that input terminals IN1and IN2are disconnected from the AC power source, then go to steps S23-S26, discharge module303conducts discharge operation on X capacitor XCAP, otherwise, if the first indicating signal FI1indicates that input terminals IN1and IN2are connected to the AC power source, then continues step S22.

At step S23, sample and hold circuit331samples the voltage across input terminals IN1and IN2under control of sample control signal Ct1, e.g., provides sampled signal SHV via sampling rectifier voltage HV.

At step S24, during time period Tp1, discharge component22discharges X capacitor XCAP under control of discharge control signal Ct2.

At step S25, during time period Tp2, discharge component22stops discharge X capacitor XCAP under control of discharge control signal Ct2, and the voltage across input terminals IN1and IN2is compared with sampled signal SHV, e.g., comparing rectifier voltage HV with sampled signal SHV.

At step S26, when the voltage across input terminals IN1and IN2is close to or equal to sampled signal SHV, e.g., when HW≥SHV-Vbias, it is judged that input terminals IN1and IN2are connected to the DC power source, discharge module303stops the discharge operation on X capacitor XCAP, and then go to step S27.

FIG. 10schematically illustrates a circuit block of an AC voltage detection circuit302according to an embodiment of the present invention. As shown inFIG. 10, AC voltage detection circuit302comprises a detection circuit201and a power off indicating circuit202. Detection circuit201has an input terminal and an output terminal, wherein the input terminal of detection circuit201is configured to receive rectifier voltage HV, and the output terminal of detection circuit201is configured to provide a square wave signal SP based on rectifier voltage HV. Power off indicating circuit202has an input terminal and an output terminal, wherein the input terminal of power off indicating circuit202is coupled to detection circuit201to receive square wave signal SP, and the output terminal of power off indicating circuit202is configured to provide the first indicating signal FI1based on square wave signal SP.

In one embodiment, detection circuit201comprises a delay circuit203and a detecting comparator204. Delay circuit203has an input terminal and an output terminal, wherein the input terminal of delay circuit203is configured to receive rectifier voltage HV, and the output terminal of delay circuit203is configured to provide a delayed rectifier voltage HVD. Detecting comparator204has a first input terminal (a non-inverting terminal), a second input terminal (an inverting terminal), and an output terminal, wherein the first input terminal of detecting comparator204is configured to receive rectifier voltage HV, the second input terminal of detecting comparator204is coupled to the output terminal of delay circuit203to receive delayed rectifier voltage HVD, and the output terminal of detecting comparator204is configured to provide square wave signal SP based on rectifier voltage HV and delayed rectifier voltage HVD.

In one embodiment, power off indicating circuit202further comprises a rising edge flip-flop205, a falling edge flip-flop206, an adder circuit208, and a timing circuit207. An input terminal of rising edge flip flop205is coupled to the output terminal of detection circuit201to receive square wave signal SP, and an output terminal of rising edge flip-flop is configured to provide a rising edge pulse signal at the rising edge of square wave signal SP. An input terminal of falling edge flip-flop206is coupled to the output terminal of detection circuit201to receive square wave signal SP, and an output terminal of falling edge flip-flop206is configured to provide a falling edge pulse signal at the falling edge of square wave signal SP. Adder circuit208has a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of adder circuit208is coupled to the output terminal of rising edge flip-flop205, the second input terminal of adder circuit208is coupled to the output terminal of falling edge flip-flop206, and the output terminal is configured to provide an adder pulse signal213. An input terminal of timing circuit207is coupled to the output terminal of adder circuit208to receive adder pulse signal213, an output terminal of timing circuit207is configured to provide the first indicating signal FI1based on adder pulse signal213. Timing signal207is configured to time based on adder pulse signal213. In one embodiment, when an interval time period between pulses of adder pulse signal213is larger than a first predetermined value PT1, the first indicating signal FI1indicates that input terminals IN1and IN2are disconnected from the AC power source. One of ordinary skill in the art should understand that detailed circuit structure of AC voltage detect circuit302is not limited byFIG. 10.