Tuning circuit

To suppress a fluctuation in resonance frequency caused by an input signal voltage in a tunable circuit, a respective capacitor is connected to each of two variable capacitance diodes connected in series-opposition.

BACKGROUND OF THE INVENTION 
The present invention relates to a tuning circuit of an electronic tuning 
type receiver. More particularly, the invention relates to a tuning 
circuit in which the fluctuation of a resonance frequency caused by an 
input signal is suppressed by connecting a capacitor having a 
predetermined capacitance to each of two variable capacitance diodes 
connected in series-opposition. 
Heretofore, a tuning circuit as shown in FIG. 1 is known in which variable 
capacitance diodes (hereinafter referred to as "Varicap diodes") C.sub.v1 
and C.sub.v2 are connected in series-opposition and a tuning capacitor C 
and a tuning coil L are connected in parallel to the serially connected 
Varicap diodes. A d.c. bias voltage for tuning is applied to a junction 
point A of the Varicap diodes C.sub.v1 and C.sub.v2. 
When a signal voltage is applied to the tuning coil L, the capacitances of 
the Varicap diodes C.sub.v1 and C.sub.v2 vary inversely with one another. 
That is, if the capacitance of the Varicap diode C.sub.v1 increases, the 
capacitance of the Varicap diode C.sub.v2 decreases, and vice versa. This 
is due to the fact that the signal voltages applied to the Varicap diodes 
C.sub.v1 and C.sub.v2 are opposite in phase in each other. 
If a signal voltage E.sub.in is applied to the tuning coil L, the 
capacitances C.sub.1 and C.sub.2 of the Varicap diodes C.sub.v1 and 
C.sub.v2 can be expressed by the following expressions. When E.sub.in &gt;0 
(see FIG. 2), 
EQU C.sub.1 =C.sub.v1 +C.sub..DELTA.vs1 
EQU C.sub.2 =C.sub.v2 -C.sub..DELTA.vs2, 
when E.sub.in &lt;0, 
EQU C.sub.1 =C.sub.v1 -C.sub..DELTA.vs1 
EQU C.sub.2 =C.sub.v2 +C.sub..DELTA.vs2 
where C.sub.v1 and C.sub.v2 are the capacitances of the Varicap diodes at a 
predetermined reference voltage, e.g. zero volts, and C.sub..DELTA.vs1 and 
C.sub..DELTA.vs2 are the capacitance variations of the Varicap diodes 
C.sub.v1 and C.sub.v2. 
The voltage variation at the junction point A when the signal voltage 
E.sub.in is applied can be expressed as follows: 
##EQU1## 
Since C.sub..DELTA.vs1 &gt;C.sub..DELTA.vs2 (as shown in FIG. 2), 
##EQU2## 
On the other hand, when E.sub.in &lt;0, 
##EQU3## 
In this case, however, since C.sub..DELTA.vs1 &lt;C.sub..DELTA.vs2, the 
following inequality can be established taking E.sub.in &lt;0 into account. 
##EQU4## 
The above expressions or inequalities imply that when the signal voltage is 
applied, the voltage at the junction point A shifts in the positive 
direction as indicated by the dotted line in FIG. 4, resulting in a 
variation in the resonance frequency. 
SUMMARY OF THE INVENTION 
Accordingly, an object of this invention is to eliminate the aforementioned 
drawback accompanying the prior art tuning circuit and to provide an 
improved circuit in which the fluctuation of the resonance frequency 
caused by the signal voltage is suppressed. 
Briefly, this object of the invention is implemented by the connection of a 
capacitor in parallel with each of the two Varicap diodes connected in 
series-opposition, with the d.c. bias voltage being applied to the 
junction point of the Varicap diodes.

DESCRIPTION OF THE PREFERRED EMBODIMENTS 
A preferred embodiment of this invention will now be described with 
reference to FIG. 3. In lieu of the tuning capacitor conventionally 
employed, a capacitor C.sub.0 having a capacitance twice as large as that 
of the conventional capacitor is connected in parallel with each of the 
two Varicap diodes. Then, the voltage variation at the junction point A' 
of the two Varicap diodes is expressed as follows. 
##EQU5## 
where C'.sub..DELTA.vs1 and C'.sub..DELTA.vs2 are the capacitance 
variations in the Varicap diodes C.sub.v1 and C.sub.v2, respectively, 
caused by the signal voltage. 
Since C.sub.o &gt;&gt;C'.sub..DELTA.vs1, C'.sub..DELTA.vs2, even if 
C'.sub..DELTA.vs1 and C'.sub..DELTA.vs2 have the same values as 
C.sub..DELTA.vs1 and C.sub..DELTA.vs2 in the prior art circuit (strictly 
speaking, C'.sub..DELTA.vs1 and C.sub..DELTA.vs2 are slightly smaller than 
C.sub..DELTA.vs1 and C.sub..DELTA.vs2, respectively), the following 
relationship is established. 
A'.sub.v &lt;A.sub.v. 
The voltage variation at the junction point A' will thus be indicated by 
one dot-dash line in FIG. 4. 
As is apparent from the foregoing description, the tuning circuit according 
to this invention is capable of sufficiently supressing the fluctuation of 
the resonance frequency caused by the input signal. This means that the 
load variation of the tuning circuit per se is small, resulting that the 
distortion caused by the tuning circuit is small relative to the signal 
voltage E.sub.in. In the above described embodiment, the capacitor having 
a capacitance twice as large as the conventional tuning capacitor is 
employed while removing the tuning capacitor, but it is possible to use 
both capacitors. In this case, the degree of suppression of the 
fluctuation is not the same as that shown in FIG. 4, however,it is still 
sufficiently advantageous to achieve the underlying object of this 
invention. 
The tuning circuit according to this invention is applicable not only to 
the electronic tuning type receiver but also to other resonance circuits, 
such as local oscillation circuits in receivers.