Trimming circuit for a sensor and trimming method

An on-board trimming circuit suitable for trimming an accelerometer provides offset trim and gain trim modules for determining correct trim codes for subsequent programming into the trimming circuit. The correct trim codes may be determined by comparing sensor outputs which have been adjusted by successive trim codes, with a reference voltage in a comparator until the comparator toggles or by using a successive approximation technique. The reference voltage is supplied form a tap of a feedback resistance divider circuit which forms a part of an on-board voltage reference generator which may be used to provide a full scale reference for an analog to digital converter which converts a sensor output voltage into a digital signal. Using these reference voltages significantly lessens the impact of any offsets inherent in the voltage reference generator on the trimming process.

FIELD OF THE INVENTION

This invention relates to a trimming circuit and method suitable for the trimming of sensors and has particular, though not exclusive, applicability to accelerometers.

BACKGROUND OF THE INVENTION

An accelerometer is a device that typically measures the acceleration experienced relative to freefall. Single- and multi-axis accelerometers are available to detect magnitude and direction of the acceleration as a vector quantity, and can be used to sense orientation, acceleration, vibration, shock, and falling. Micromachined accelerometers are increasingly present in portable electronic devices and video game controllers to detect the position of the device and/or provide for game input. Such accelerometers may be packaged in an integrated circuit device which may also include conditioning circuitry. Various sources of error in an accelerometer typically call for calibration before use. One of the leading sources of error in an accelerometer is attributed to the 0 g-offset or bias error. The 0 g-offset is defined as the difference between the measured value of the sensor from the true zero value. The 0 g-offset value is commonly subtracted when taking acceleration measurements. Accelerometers are typically calibrated by the semiconductor manufacturer prior to their installation into another device. For example, accelerometers are “trimmed” for 0 g-offset and sensitivity by adjusting the offset trim codes and gain (if the trimming is done using digitally-stored trim codes and a digital to analog converter). Other (analog) trim methods are also known. Many semiconductor devices incorporate a digital trim circuit, which can be used to adjust a device's operating voltages following manufacture. The programming of a trim circuit can be performed in accordance with trim codes, which comprise information corresponding to different adjustment values. A trim circuit is typically programmed by calibrating trim codes during a test operation. The test operation is typically performed by a dedicated test apparatus. In a conventional test operation, the test apparatus applies various signals to the device according to the trim codes and calibrates the trim codes according to the device's responses to the signals. Following the test operation, the calibrated trim codes are programmed into the device. US 2011110164 A1 describes an example of a trim circuit incorporated in a memory device. Even though accelerometers are calibrated by the semiconductor manufacturer, they can lose their calibration during use. For example, when the accelerometers are mounted onto a printed circuit board, various mechanical strains are produced. Such conditions can cause further 0 g-offset shifts. US 20120215477 A1 describes an accelerometer having an autocalibration function which permits the accelerometer to be re-calibrated over time.

SUMMARY OF THE INVENTION

The present invention provides a trimming circuit and trimming method as described in the accompanying claims.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Referring toFIG. 1, a sensor100is capable of generating an output, for example a voltage, which is function of some parameter which the sensor detects and responds to. In the example ofFIG. 1, the sensor may be an accelerometer (sometimes called a “gcell”) and has three sensor outputs101,102and103which relate to the sensor's response to accelerations applied to its x, y and z axis respectively. The sensor may be implemented within an integrated circuit package or device104which may also comprise trimming circuitry to be described herein. The device104may be a ratiometric device; for example, one which provides an output voltage in proportion with an acceleration and an applied reference voltage. The device104may be operably coupled with remote test circuitry105via a digital interface106and via x, y and z axis analog output ports107,108,109respectively. Other similar devices,110,111may also be operably coupled to the test circuitry105for simultaneous trimming.

Trimming circuitry may comprise an x axis trim offset module112(which may comprise an offset trim DAC) which may be operably coupled between one input of a first summer module113and an autotrim controller module114. A second input of the first summer module113may be operably coupled to the sensor's x axis output101. An output of the first summer module113may be operably coupled to an input of a first variable gain amplifier115. An x axis trim gain module116(which may comprise a gain trim DAC) may be operably coupled between the first variable gain amplifier115and the auto trim controller module114. An output of the first variable gain amplifier115may be operably coupled to the x axis output port107. The output of the first variable gain amplifier115may also be selectively coupled to a first input of a comparator117.

Trimming circuitry may also comprise a y axis trim offset module118which may be operably coupled between one input of a second summer module119and the autotrim controller module114. A second input of the second summer module119may be operably coupled to the sensor's y axis output102. An output of the second summer module119may be operably coupled to an input of a second variable gain amplifier120. A y axis trim gain module121may be operably coupled between the second variable gain amplifier120and the auto trim controller module114. An output of the second variable gain amplifier120may be operably coupled to the y axis output port108. The output of the second variable gain amplifier120may also be selectively coupled to the first input of the comparator117.

Trimming circuitry may also comprise a z axis trim offset module122which may be operably coupled between one input of a third summer module123and the autotrim controller module114. A second input of the third summer module123may be operably coupled to the sensor's z axis output103. An output of the third summer module123may be operably coupled to an input of a third variable gain amplifier124. An output of the third variable gain amplifier124may be operably coupled to the z axis output port109. A z axis trim gain module125may be operably coupled between the third variable gain amplifier124and the auto trim controller module114. The output of the third variable gain amplifier124may also be selectively coupled to the first input of the comparator117.

The x, y and z axis trim offset modules112,118,122may comprise trim DAC's (digital to analog converters), as are known in the art, which may respond to trim codes provided by the autotrim converter module114. A standard trim DAC may be built up from binary weighted trim elements such as bias current sources or resistor strings or weighted capacitors. Each bit of a trim DAC may comprise a trim element and a trim switch.

The x, y and z axis trim gain modules116,121,125may adjust the gain of the first, second or third variable gain amplifiers115,120,124respectively in response to receiving trim codes from the auto trim controller module114.

A voltage reference generator module126may supply an output voltage VBYP at an output port127of the device104. The voltage reference generator module126may be supplied from a main voltage supply (not shown) of the device104. The regulated voltage VBYP may serve as full scale reference for any Analogue to Digital Converter (not shown) which may be connected to the device in use. The voltage reference generator module126may include feedback resistance divider circuitry represented by a module128inFIG. 1which may include two or more resistors129and one or more taps130at the junctions of resistor pairs for example. Each tap may provide a (known) reference voltage which may be used in a trimming process to be described below. A voltage from any one tap may be selectively applied to a second input of the comparator117for comparison with an output from any one of the variable gain amplifiers115,120,124. Selection of a particular reference voltage (from a particular tap of the feedback resistance divider circuit128) may be controlled by the auto trim controller.

In operation of the exemplary trimming circuitry ofFIG. 1, an output of the sensor (in this example, device104outputs107,108or109) may be compared in the comparator with a reference voltage taken from a tap130of the voltage generator's feedback resistance divider circuit128. If the result of the comparison is that the two compared inputs are not equal then the output of the sensor may be adjusted in offset or gain and the comparison may be made again, this time between an adjusted sensor output and the reference voltage.

An offset trim procedure is performed in order to determine, for each axis, the offset trim codes. An offset may be applied to an output of the sensor by an adjustment circuit comprising a trim offset module112and a summer113. For example, the autotrim controller114, on receipt of an instruction from the test circuitry105, may set an offset trim procedure in motion whereby the sensor's output is summed with successive trim values provided by the trim offset module112and the adjusted outputs are compared with a reference voltage in the comparator117. One comparison per trim bit may be made. The results may be read and stored by the test circuitry105.

A gain trim procedure is performed in order to determine, for each axis, the gain trim codes so that for a given acceleration (in the case where the sensor100is an accelerometer), the device's analog outputs at ports107,108,109will be close to prescribed values. For example, when trimming with one axis placed a +1 g acceleration, the expected output voltage would be V(0 g)+(nominal_sensitivity)×(1 g). V(0 g) value and its tolerance may, typically, be given in the device's datasheet. Similarly then, a gain adjustment may be applied to an output of the sensor100by an adjustment circuit comprising a trim gain module116and a variable gain amplifier115. For example, the autotrim controller114, on receipt of an instruction from the test circuitry, may set a gain trim procedure in motion whereby the sensor's output is amplified or attenuated by successive trim values provided to the trim gain module116by the autotrim controller module114and the adjusted outputs are compared with a reference voltage in the comparator117. One comparison may be made per trim bit. As an example, for a particular axis of a particular device104, successive trim codes (one for each bit of the result) may be computed in the device (in the auto trim controller114, for example) based on a comparison between a voltage appearing at an output port107and a reference voltage applied from a selected one of the taps130. The trim codes may be applied to a gain control input of the variable gain amplifier115. The resulting, adjusted voltage appearing at port107may be compared again with the same reference voltage with the result of the comparison being used to compute the next trim value to be applied to the variable gain amplifier115. After all bits are computed in the autotrim controller module114the result may be read and stored by the test circuitry105.

The stored trim codes for offset and gain may be programmed into the device by conventional techniques.

The trimming circuitry, the auto trim controller, for example, may also be arranged to calculate an interpolated value for a gain trim code for programming into the device104. This interpolation may involve determining a first gain trim code at a positive acceleration (in the case where the sensor100is an accelerometer for example) and then determining a second gain trim code at a negative acceleration. An interpolated value equal to an arithmetical combination of the first and second trim codes may then be computed. The interpolated trim code may be computed in the test circuitry105as an alternative to computing it in the device104itself.

Performing on-board voltage comparisons, that is within the integrated circuit package104rather than in the remote test circuitry105, which may be a few feet away, offers a precision which significantly enhances the overall trimming accuracy. On-board trimming also has the advantages of resolving the problem caused by limited availability and cost of high precision analog input channels on production testers, and the reduction of their performance by noise or electro-magnetic interference due to long cables between the sensor mechanical handler and the tester. For Analog sensors, it allows a significant reduction in test time as an embedded digital state-machine may be employed to automatically do the binary search to find the best trim code at each step of the trim procedure. This removes most of the communication accesses between devices under test and the tester.

A trimming procedure may be run on all devices104,110,111in parallel under the control of the test circuit105and on all desired axes in rapid succession by switching the comparator's first input between the xout107, yout108and zout109ports in succession.

A further advantage of the invention will now be explained with reference toFIG. 2.

Consider the typical reference voltage generator components ofFIG. 2comprising an operational amplifier201and resistance divider circuit202comprising resistances R1and R2(R1and R2may comprise one or more resistor elements). Such a voltage generator203may be used to provide a reference voltage VBYP (for example, for an analog to digital converter arranged to convert a voltage representing a sensor output to a digital signal). Say that a voltage source Vref of 0.75 volts, summed with an unknown and variable offset VOS_BYP (due for example to non-perfect operation of the operational amplifier) is applied to one input of the operational amplifier201. The other input of the operational amplifier is provided by the resistance divider circuit202and in this example is taken from a point at the junction of the two resistors R1, R2. The resistances R1and R2are connected in series between an output204of the operational amplifier201and ground. An offset trim procedure is taken as an example but the conclusions can be extended to sensitivity/gain trim. For the purposes of this explanation, say that from the user's viewpoint the expected output voltage from the sensor in a zero acceleration (0 g) field condition is VBYP/2. That is to say that the sensor's offset and sensitivity specifications are defined in a ratiometric fashion with respect to VBYP. Hence the ideal output voltage from the sensor at 0 g acceleration can be written:

In a conventional calibration procedure, the reference voltage for the comparator117ofFIG. 1may typically be taken from the voltage source Vref_0.75V (seeFIG. 2). The offset DAC trim codes are swept until the comparator117toggles, signalling that the sensor's compensated output voltage has crossed the comparator's reference voltage. Hence,
Vout+VosCOMP=VrefCOMP=Vref0V75
However, since the sensor offset which is responsible for the output offset is a continuous variable and the DAC trim module can only approximate this value due to its quantised output, the 0 g output voltage after offset trim contains a small and controled component linked to this quantisation error, hence,
Vout0g=Vref0V75−VosCOMP+VQerror

So the offset seen by the user (customer) in 0 g field is thus:
offsetcustomer=Vout0g−Voutideal0g≈α·Vref0V75−(1−α)·VosBYP−VosCOMP+VQerror

From this it will be seen that the offset of the VBYP voltage generator's operational amplifier201may directly impact the accuracy of an offset trim (and similarly a sensitivity trim). When other error sources are optimised (for example careful resistor matching to decrease the value of alpha and choosing relatively small trim steps in the DAC trim offset module) with this conventional approach the VBYP offset is the dominant error source.

The inventors have discovered that this error can be much reduced if the reference voltages for the comparator117(seeFIG. 1) are taken from the feedback resistor ladder, at tapping points205,206and207for example, instead of from the voltage source Vref. This will be evident from the following analysis with reference again toFIG. 2

As described above with reference toFIG. 2, the offset trim is taken as an example but the conclusions can be extended to the sensitivity/gain trim. From the user's viewpoint, the expected output voltage in a 0 g field can be written as above as

However, this time, the reference inputs for the comparator117(FIG. 1) may be tapped off the resistance divider circuit202of the VBYP regulator203instead of from Vref.

In the calibration process, the offset DAC trim codes are swept until the comparator toggles signalling that the output voltage has crossed the comparator reference voltage. Hence,
Vout+VosCOMP=VrefCOMP=Vcomp0V75=Vref0V75+VosBYP

However, once again, since the sensor offset which is responsible for the output offset is a continuous variable and the offset DAC module can only approximate this value due to its quantised output, the 0 g output voltage after offset trim contains a small and controled component linked to this quantisation error. Hence,
Vout0g=Vref0V75+VosBYP−VosCOMP+VQerror

The offset seen by the user/customer in a 0 g field is thus:
offsetcustomer=Vout0g−Voutideal0g≈α·Vref0V75+α·VosBYP−VosCOMP+VQerror

From the above, it will be appreciated that the offset of the VBYP reference voltage generator's operational amplifier is now weighted by the resistor mismatch. So its contribution is decreased compared with the conventional method by typically 100 times. The dominant error source is now the reference voltage Vref_0.75 multiplied by the resistor mismatch.

An example of a method300for performing an offset trim for a sensor for one or more axes of sensitivity will now be described with reference toFIG. 3. A purpose of an offset trim procedure may be to compensate for any offset in the sensor's outputs and in any subsequent processing chain.

At301, one or more sensors and their associated circuitry may be placed on a test board in a null acceleration field on their X and Y axes, for example. A sensor and associated circuitry may be implemented in a single package comprising an integrated circuit device. As such, several devices may be arranged on the test board for simultaneous trimming.

At302, each device may be programmed with a nominal gain trim code.

At303, each device on the test board receives a “start offset autotrim procedure on X and Y axes” instruction. In response to this instruction each device on the test board applies on one input of the comparator117, a reference voltage set to a value such as that is expected to appear on the X and Y analog outputs of the sensor for a 0 g acceleration. (In the above example ofFIG. 2, this was VBYP/2=0.75V). This reference voltage may be obtained using an appropriate tap on a resistance divider circuit of a reference voltage generator which may be included in each device. Additionally, digital circuitry comprising each device may successively connect the X and Y axis outputs of the device to the second input of the comparator117.

Hence at304, for each of the X and Y axes, the reference voltage may be compared with sensor output voltages which have been summed with trim values associated with successive offset trim codes, thereby determining the trim codes that cause the comparator to toggle. The process for ascertaining the correct trim code may be performed using one of several conventional techniques such as a linear search; starting at one end of the trimming range at incrementing or decrementing a trim data word until the comparator toggles or a binary search sometimes known as “successive approximation.” As an example of the use of a successive approximation loop, say that the trim code values allowed are between 0 and MAX. In order to determine the most significant bit of the result the trim code may initially be set to 0.5 MAX. Depending on the comparator output, for the next step, the trim code may be set to either 0.25 MAX or 0.75 MAX. This process may continue, incrementing or decrementing the trim code until the correct binary word is determined. This process, when completed, determines the trim code which will provide on X and Y axes respectively, a voltage which is the closest to the expected (or targeted) value (VBYP/2 in the example ofFIG. 2).

At305, a wait time (optionally variable) may be set between setting a new offset trim code and the moment the comparison result is taken into account. The wait time may be a compromise between trim speed and the comparison precision.

Optionally at306, an (adjustable) number of comparisons for the same trim bit for a particular axis (X or Y for example) may be made in order to allow a trade-off between trim time and noise.

At307, once the correct offset trim codes (for each axis) are computed they may be read and stored by external circuitry using a digital interface provided for each device on the test board.

At308, the test board may be set in a second reference position providing a null acceleration field on the Z axis of the sensor and a similar process comprising steps304to307may be performed following receipt of a “start offset autotrim procedure on Z axis instruction” at309in order to determine offset trim codes for the Z axis.

When all the offset trim codes for each axis have been determined for each device, these trim codes may be programmed into each device at310. These codes (one per axis), once programmed inside a device may ensure that the analog outputs of the device for each axis will be close to a prescribed value.

An example of a method400for performing a gain trim for a sensor for one or more axes of sensitivity will now be described with reference toFIG. 4. A gain trim may be required in order to calibrate the sensitivity of a sensor and the actual gain in any subsequent processing chain. In order to compensate for any nonlinearity in a sensor's operation and for inaccuracies in locating it in the chosen testing positions or conditions, two gain trim codes may be computed for each axis and for each device on a test board. For example, one of the two gain trim codes (for each axis) may be determined for a positive acceleration and another gain trim code may be determined for a negative acceleration, in a case where the sensor is an accelerometer. A final value for a gain trim code may be an interpolation of the two computed gain trim codes.

At401, one or more sensors and their associated circuitry may be placed on a test board in a g/sqrt(3) field on their X, Y and Z axes, for example, in the case of an accelerometer. A sensor and associated circuitry may be implemented in a single package comprising an integrated circuit device. As such, several devices may be arranged on the test board for simultaneous trimming.

At402, each device may be programmed with a nominal offset trim code. In one example, each device may be programmed with an offset trim code determined by the method described above with reference toFIG. 3.

At403, each device on the test board receives a “start gain autotrim procedure on X, Y and Z axes at a positive acceleration” instruction. In response to this instruction each device on the test board applies on one input of the comparator117, a reference voltage set to a value such as that is expected to appear on the X, Y and Z analog outputs of the sensor for a g/sqrt(3) acceleration. This reference voltage may be obtained using an appropriate tap on a resistance divider circuit of a voltage reference generator which may be included in each device. Additionally, digital circuitry comprising each device may successively connect the X, Y and Z axis outputs of the device to the second input of the comparator117.

Hence at404, for each of the X, Y and Z axes, the reference voltage may be compared with sensor output voltages which have been amplified (or attenuated) by a gain value associated with successive gain trim codes until a gain trim code is found that causes the comparator to toggle. The process for ascertaining the correct trim code may be performed using one of several conventional techniques such as a linear search; starting at one end of the trimming range at incrementing or decrementing a trim data word until the comparator toggles or using a “successive approximation” technique. A successive approximation technique may typically ensure that after a certain number of steps (equal to the number of bits of the trim DAC) the output voltage of a device will match a reference (expected) voltage with a certain precision. The linear search will also ensure the same precision but generally after more steps.

At405, a wait time (optionally variable) may be set between setting a new gain trim code and the moment the comparison result is taken into account. The wait time may be a compromise between trim speed and the comparison precision.

Optionally at406, an adjustable number of comparisons for the same trim bit for each axis (X, Y and Z for example) may be made in order to allow a trade-off between trim time and noise.

At407, once the correct gain trim codes (for each axis) are computed they may be read and stored by external circuitry using a digital interface provided for each device on the test board.

At408, a “start gain autotrim procedure on X, Y and Z axes at a negative acceleration” instruction may be received by each device and the method from404to407may repeat for the case of a −g/sqrt(3) acceleration for each axis. Again, the reference voltages for applying to the comparator may be obtained from the appropriate taps of a resistance divider circuit of a reference voltage generator.

At409, an interpolation or averaging procedure may be carried out to determine a final value for gain trim codes. In order to compensate for the sensor's and processing circuitry's nonlinearity an interpolated value g_interpolated for a gain trim code may be determined from the formula:
g_interpolated=(g_positive×g_negative)/((g_positive+g_negative)/2),

where g_positive is the gain (or gain trim code) determined for a positive acceleration and g_negative is the gain or (gain trim code) determined for a negative acceleration of the same magnitude.

When the final, averaged gain trim codes for each axis have been determined for each device, these trim codes may be programmed into each device at410.

Nonlinearity in the gain DAC and variable gain amplifier may be compensated for by using a table: real_gain=f(trim code) obtained for example by simulation. Firstly, the table may be used to go from positive acceleration and negative acceleration trim codes towards simulated real gains. The “g_interpolated” parameter is computed based on the above formula, then the trim code is computed again by using the table.

The autotrimming procedure described above may be carried out by the manufacturer as part of a factory test or alternatively by the customer. A customer may employ the procedure after board mount, for example.

The invention may also be implemented in a computer program for running on a computer system, at least including code portions for performing steps of a method according to the invention when run on a programmable apparatus, such as a computer system or enabling a programmable apparatus to perform functions of a device or system according to the invention.

As an example, a tangible computer program product may be provided having executable code stored therein to perform a method for trimming a sensor in accordance with the appended claims.

The computer program may be stored internally on computer readable storage medium or transmitted to the computer system via a computer readable transmission medium. All or some of the computer program may be provided on computer readable media permanently, removably or remotely coupled to an information processing system. The computer readable media may include, for example and without limitation, any number of the following: magnetic storage media including disk and tape storage media; optical storage media such as compact disk media (e.g., CD-ROM, CD-R, etc.) and digital video disk storage media; nonvolatile memory storage media including semiconductor-based memory units such as FLASH memory, EEPROM, EPROM, ROM; ferromagnetic digital memories; MRAM; volatile storage media including registers, buffers or caches, main memory, RAM, etc.; and data transmission media including computer networks, point-to-point telecommunication equipment, and carrier wave transmission media, just to name a few.

Those skilled in the art will recognize that the boundaries between digital and analog blocks are merely illustrative and that alternative embodiments may merge blocks or circuit elements or impose an alternate decomposition of functionality upon various blocks or circuit elements. Thus, it is to be understood that the architectures depicted herein are merely exemplary, and that in fact many other architectures can be implemented which achieve the same functionality.

Also for example, in one embodiment, the illustrated examples may be implemented as circuitry located on a single integrated circuit or within a same device. For example, the entire functionality of the modules and sensor comprising the device104ofFIG. 1may be implemented in an integrated circuit. Alternatively, the modules ofFIG. 1excluding the sensor may be implemented in an integrated circuit, said integrated circuit being capable of being operably coupled to the sensor100. Such an integrated circuit may be a package containing one or more dies. Alternatively, any combination of the modules ofFIG. 1may be implemented as any number of separate integrated circuits or separate devices interconnected with each other in a suitable manner. An integrated circuit device may comprise one or more dies in a single package with electronic components provided on the dies that form the modules and which are connectable to other components outside the package through suitable connections such as pins of the package and bondwires between the pins and the dies.