Cascaded electrical device bus structure systems and methods

The present disclosure presents techniques to facilitate improving operation of an electrical system, which includes a bus structure that cascades multiple electrical devices. The bus structure includes a first outer conductive layer implemented as a positive layer; a second outer conductive layer implemented as a negative layer; a first intermediate conductive layer neighboring the first outer conductive layer; a second intermediate conductive layer neighboring the second outer conductive layer; and a third intermediate conductive layer neighboring the second intermediate conductive layer, in which the third intermediate conductive layer is implemented as an inter-device layer that facilitates electrically coupling at least two of the electrical devices in series. The first intermediate conductive layer is implemented as a negative layer and the second intermediate conductive layer is implemented as a positive layer to facilitate reducing stray inductance and/or increasing stray capacitance introduced in the electrical system during operation.

BACKGROUND

Generally, an electrical system may include multiple electrical devices electrically interconnected to facilitate supplying electrical power from an electrical power source (e.g., generator) to an electrical load. In some instances, the electrical devices may include a passive electrical device, such as a capacitor or an inductor, and/or an active electrical device that may be operationally controlled, such as an electromechanical switching device or a semiconductor switching device. For example, a power converter may include a capacitor and a semiconductor switching device, which may be controlled to convert alternating current (AC) electrical power received from an electrical source into direct current (DC) electrical power supplied to an electrical load.

In some instances, multiple electrical devices with lower power ratings may be electrically coupled in series, thereby cascading the electrical devices to facilitate implementation in higher power rating applications. For example, the power converter may be implemented with multiple cascaded capacitors, which have a total capacitance expected to be sufficient for operation in a high voltage application, connected in series between a positive DC bus and a negative DC bus via multiple wires (e.g., electrical connectors). Additionally or alternatively, the power converter may be implemented with multiple cascaded semiconductor switching devices, which have a combined rating expected to reliably switch between connecting and disconnecting electrical power in the high voltage application, connected in series between the positive DC bus and the negative DC bus via multiple wires.

However, in some instances, switching between connecting and disconnecting electrical power to an electrical connector may introduce stray impedance (e.g., capacitance and/or inductance), which affects operation of the electrical system and/or surrounding electrical devices. For example, when electrical power is alternatingly connected to and disconnected from an electrical connector, change in electrical current flowing through the electrical connector may generate a magnetic field that introduces stray inductance in nearby electrically conductive material, such as another electrical connector or an electrical device in the electrical system. In some instances, stray inductance may result in voltage overshoot occurring in the electrical system, which may affect lifespan and/or operational reliability of electrical devices in the electrical system.

BRIEF DESCRIPTION

In one embodiment, an electrical system includes a bus structure to cascade multiple electrical devices. The first bus structure includes a first outer conductive layer implemented as a first positive layer; a second outer conductive layer implemented as a first negative layer; a first intermediate conductive layer neighboring the first outer conductive layer and electrically coupled to the second outer conductive layer, in which the first intermediate conductive layer is implemented as a second negative layer to facilitate reducing stray inductance, increasing stray capacitance, or both introduced in the electrical system during operation; a second intermediate conductive layer neighboring the second outer conductive layer and electrically coupled to the first outer conductive layer, in which the second intermediate conductive layer is implemented as a second positive layer to facilitate reducing the stray inductance, increasing the stray capacitance, or both introduced in the electrical system during operation; and a third intermediate conductive layer neighboring the second intermediate conductive layer, in which the third intermediate conductive layer is implemented as an inter-device layer that facilitates electrically coupling at least two of the multiple electrical devices in series.

In another embodiment, a method for implementing a bus structure to be deployed in an electrical system includes forming multiple layers, in which the multiple layers include multiple conductive layers and multiple non-conductive layers each formed between a pair of neighboring conductive layers; implementing a first conductive layer of the multiple conductive layers formed on a first side of the bus structure as a first positive layer; implementing a second conductive layer of the multiple conductive layers formed on a second side of the bus structure opposite the first side as a first negative layer; implementing a third conductive layer of the multiple conductive layers separated from the second conductive layer by a first non-conductive layer of the multiple non-conductive layers as a second positive layer to facilitate reducing magnitude of a voltage overshoot produced in the electrical system when the bus structure is deployed in the electrical system; implementing a fourth conductive layer of the multiple conductive layers separated from the first conductive layer by a second non-conductive layer of the multiple non-conductive layers as a second negative layer to facilitate reducing magnitude of the voltage overshoot produced in the electrical system when the bus structure is deployed in the electrical system; and implementing a fifth conductive layer of the multiple conductive layers separated from the fourth conductive layer by a third non-conductive layer of the multiple non-conductive layers as a first inter-device layer to facilitate electrically coupling at least a first electrical device and a second electrical device in series.

In another embodiment, a tangible, non-transitory, computer-readable medium stores instructions executable by one or more processors of a design device to facilitate implementing a bus structure. The instructions include instructions to determine, using the one or more processors, characteristics of an electrical system that the bus structure is expected to be deployed in, in which the characteristics include number of electrical devices expected to be cascaded by the bus structure and expected current flow order through the electrical devices; determine, using the one or more processor, target design parameters to be used to implement the bus structure based at least in part on the characteristics of the electrical system, in which the target design parameters indicate at least number of conductive layers to be implemented in the bus structure and assignment of each of the conductive layers as one of a positive layer, a negative layer, and an inter-device layer; and indicate, using the one or more processors, the target design parameters to facilitate implementing the bus structure using manufacturing equipment.

DETAILED DESCRIPTION

The present disclosure generally relates to electrical systems including multiple electrically interconnected electrical devices. In some instances, an electrical system may include a passive electrical device, such as a capacitor, an inductor, a resistor, and/or the like. Additionally or alternatively, the electrical system may include an active electrical devices that may be actively controlled, for example, to selectively connect and/or disconnect flow of electrical power though the electrical system. In other words, in some instances, the electrical devices in the electrical system may include one or more switching devices. For example, the electrical system may include an electromechanical switching device, such as a relay or a contactor, and/or a semiconductor switching device, such as a metal-oxide-semiconductor field-effect transistor (MOSFET) or a bipolar junction transistor (BJT).

In any case, the electrical devices in the electrical system may operate to facilitate supplying electrical power from an electrical power source (e.g., generator) to an electrical load. For example, a power converter may be electrically coupled between an alternating current (AC) power source and a direct current (DC) electrical load. In operation, electrical devices in the power converter (e.g., a composite device) may convert AC electrical power received from the AC power source into DC electrical power, which may then be supplied to the DC electrical load.

To facilitate converting AC electrical power into DC electrical power, the power converter may selectively supply electrical power from input AC buses to output DC buses. Thus, in some instances, the power converter may include a switching device, for example, electrically coupled between a positive DC bus and a negative DC bus. Additionally, the power converter may filter (e.g., smooth) generated DC electrical power using stored electrical power. Thus, in some instances, the power converter may include a capacitor, for example, electrically coupled between the positive DC bus and the negative DC bus.

Generally, each electrical device may be rated to operate using electrical power with specific characteristics (e.g., voltage, current, and/or frequency). For example, for low voltage applications, capacitance utilized in the power converter may be implemented using a single capacitor. Additionally or alternatively, for low voltage applications, control over supply of electrical power utilized in the power converter may be implemented using a single switching device.

To enable implementation in higher electrical power (e.g., medium voltage or high voltage) applications, an electrical system may be implemented using multiple cascaded electrical devices, which are each rated for lower electrical power (e.g., low voltage) applications. For example, instead of a single capacitor, the power converter may be implemented using three cascaded capacitors electrically coupled in series between the positive DC bus and the negative DC bus. Additionally or alternatively, instead of a single switching device, the power converter may be implemented using three cascaded switching devices electrically coupled in series between the positive DC bus and the negative DC bus. Since connected in series, operational constraints (e.g., voltage rating compared to voltage drop) may be divided between multiple electrical devices, thereby enabling lower electrical power rated electrical devices to be used for higher electrical power applications.

In any case, to facilitate implementing an electrical system, electrical devices may be electrically interconnected via electrical connectors, such as wires or cables. For example, to implement the cascaded capacitors in the power converter, a first wire may be electrically coupled between the positive DC bus and a first capacitor, a second wire may be electrically coupled between the first capacitor and a second capacitor, a third wire may be electrically coupled between the second capacitor and a third capacitor, and a fourth wire may be electrically coupled between the third capacitor and the negative DC bus. Additionally or alternatively, to implement the cascaded switching devices in the power converter, a fifth wire may be electrically coupled between the positive DC bus and a first switching device, a sixth wire may be electrically coupled between the first switching device and a second switching device, a seventh wire may be electrically coupled between the second switching device and a third switching device, and an eighth wire may be electrically coupled between the third switching device and the negative DC bus.

As described above, operation of active electrical devices may be actively controlled to control flow of electrical power in an electrical system. For example, in an open position, a switching device may block (e.g., disable) flow of electrical current through the switching device and, thus, an electrical connector electrically coupled to the switching device. On the other hand, in a closed position, the switching device may permit (e.g., enable) flow of electrical current through the switching device and, thus, the electrical connector electrically coupled to the switching device.

To facilitate supplying electrical power to the electrical load, in some instances, switching devices electrically coupled between the electrical power source and the electrical load may be selectively switched between the open position and the closed position. For example, in the power converter, the cascaded switching devices may be instructed to successively switch between the open position and the closed position. In this manner, the cascaded switching devices may be operated to alternatingly enable and disable flow of electrical power through one or more corresponding electrical connectors.

In some instances, flow of electrical power through an electrical system may produce stray impedance (e.g., capacitance or inductance) in surrounding electrically conductive material, such as an electrical connector or an electrical device in the electrical system. For example, when electrical current flows through an electrical connector, the electrical current may produce a magnetic field, which interacts with electrically conductive material is located in relatively close proximity. In particular, changes in electrical current flowing through the electrical connector may produce stray inductance in the electrically conductive material. Additionally, when voltage of an electrical connector is different from voltage of electrically conductive material located in relatively close proximity, the voltage difference may produce an electric field and, thus, stray capacitance between the electrical connector and the electrically conductive material.

However, in some instances, stray impedance produced in an electrical system may affect operation of electrical devices in the electrical system. For example, stray inductance and/or stray capacitance of an electrical connector may affect magnitude of voltage overshoot (e.g., spike) produced when a switching device switches from the open position to the closed position. In particular, since inductors generally resist sudden changes in current flow, an increase in stray inductance may result in an increase in magnitude of the voltage overshoot. Additionally, since capacitors generally resist sudden changes in voltage, an increase in stray capacitance may result in a decrease in magnitude of the voltage overshoot.

When propagated through the electrical system, the voltage overshoot may stress operation of one or more downstream electrical devices. As described above, electrical devices are generally rated for operation within specific electrical power characteristics. For example, a capacitor may be rated to reliably store electrical energy when it receives electrical power with voltage less than a voltage threshold. Additionally or alternatively, a switching device may be rated to reliably switch between connecting and disconnecting electrical power that has voltage less than a voltage threshold. In any case, stressing operation of an electrical device may reduce lifespan and/or operational reliability of the electrical device—particularly when the voltage overshoot exceeds voltage rating of the electrical device.

Accordingly, the present disclosure provides techniques to facilitate improving operation of an electrical system, for example, by reducing magnitude of voltage overshoots expected to be produced during operation of the electrical system. To facilitate reducing magnitude of voltage overshoot, in some embodiments, cascaded electrical devices may be electrically and physically coupled via a bus structure, such as a laminated bus bar or a printed circuit board (PCB). In other words, the bus structure may be an electrical connector that electrically couples multiple electrical devices in series. For example, in the power converter, a first bus structure may electrically couple each of the cascaded capacitors in series and a second bus structure may electrically couple each of the cascaded switching devices in series.

The bus structure may include multiple parallel conductive layers separated by non-conductive layers implemented to facilitate reducing stray inductance and/or increasing stay capacitance introduced in the electrical system. In some embodiments, the bus structure may be implemented based at least in part on design parameters, such as number of layers and/or conductive layer assignments. Additionally, in some embodiments, the design parameters may be determined based at least in part on expected characteristics of the electrical system, such as number of cascaded electrical devices expected to be coupled to the bus structure, expected current flow order through the cascaded electrical devices, and/or expected operational (e.g., current and/or voltage) rating of the electrical system.

For example, when a first bus structure is expected to cascade N electrical devices for implementation in a lower operational rating electrical system, a design device may determine its design parameters to indicate that the first bus structure should include N+3 conductive layers. In other words, the first bus structure may include two outer conductive layers and N+1 intermediate conductive layers. On the other hand, when a second (e.g., stacked) bus structure is expected to cascade N electrical devices for implementation in a higher operational rating electrical system, the design device may determine its design parameters to indicate that the second bus structure should include 2N+4 conductive layers. In other words, the second bus structure may include two outer conductive layers and 2N+2 intermediate conductive layers (e.g., first group of N intermediate conductive layers separated from a second group of N intermediate conductive layers by two central intermediate conductive layers).

In any case, since a bus structure includes multiple layers, to facilitate cascading electrical devices, through-holes may be formed across multiple layers of the bus structure and perpendicular vias (e.g., electrical connections) may be formed in the through-holes to facilitate electrically coupling each conductive layer to a corresponding electrical device. Additionally, the bus structure may include a positive layer, which may be electrically coupled to a positive DC bus, and a negative layer, which may be electrically coupled to a negative DC bus. In some embodiments, the outer conductive layers of the bus structure may each be implemented as either a positive layer or a negative layer. For example, the design device may determine the design parameters of the first bus to indicate that a first outer conductive layer should be implemented as a positive layer and that a second outer conductive layer should be implemented as a negative layer.

Additionally, in some embodiments, intermediate conductive layers of the bus structure closest to each outer conductive layer may also be implemented as either a positive layer or a negative layer. For example, the design device may determine the design parameters of the first bus bar to indicate that a first intermediate conductive layer neighboring (e.g., closest to) the first outer conductive layer (which is to be implemented as a positive layer) should be implemented as a negative layer and that a second intermediate conductive layer closest to the second outer conductive layer (which is to be implemented as a negative layer) should be implemented as a positive layer. Furthermore, in some embodiments, central intermediate conductive layers of the bus structure may each be implemented as either a positive layer or a negative layer. Since magnetic fields produced by current flow in opposite directions cancel and magnitude of magnetic field is inversely related to distance, implementing a bus structure with positive layers and negative layers in close proximity may facilitate reducing stray inductance introduced in the electrical system. Additionally, since magnitude of electric field is proportional to voltage difference and inversely related to distance, implementing a bus structure with positive layers and negative layers in close proximity may facilitate increasing stray capacitance across the cascaded electrical devices.

Each remaining intermediate conductive layer of the bus structure may be implemented as an inter-device layer. In some embodiments, the remaining intermediate conductive layers may be implemented as inter-device layers based at least in part on expected current flow order through the cascaded electrical devices and/or relative position of the conductive layers. For example, when electrical current is expected to flow from a first electrical device to a second electrical device, the design device may determine the design parameters of the first bus bar to indicate that a third intermediate conductive layer neighboring (e.g., closest to) the second intermediate conductive layer should be implemented as a first inter-device layer that facilitates forming an electrical connection between the first electrical device to the second electrical device. Additionally, when electrical current is expected to flow from the second electrical device to a third electrical device, the design device may determine the design parameters of the first bus bar to indicate that a fourth intermediate conductive layer neighboring (e.g., closest to) the third intermediate conductive layer should be implemented as a second inter-device layer that facilitates forming an electrical connection between the second electrical device and the third electrical device.

A bus structure with inter-device layers implemented based at least in part on current flow order through cascaded electrical devices may facilitate balancing stray capacitance between each of the cascaded electrical devices. In this manner, the bus structure may facilitate improving lifespan uniformity and/or operational reliability uniformity of the cascaded electrical devices. With this understanding, the present disclosure provides techniques for implementing a bus structure, which when deployed in an electrical system to cascade multiple electrical devices may facilitate improving operation of the electrical system, for example, by reducing magnitude of voltage overshoot, reducing operational stress, balancing stray capacitance between cascaded electrical devices, increasing stray capacitance across the cascaded electrical devices, and/or reducing stray inductance across the cascaded electrical devices.

To help illustrate, an example embodiment of an electrical system10is shown inFIG. 1. In some embodiments, the electrical system10may be included in an industrial system, a manufacturing system, an automation system, or the like, such as a factory or plant. Additionally, in some embodiments, the electrical system10may be included in a computing system, an automotive system, or an imaging system, such as a magnetic resonance imaging (MRI) system.

In any case, in the depicted embodiment, the electrical system10includes an electrical power source12, an electrical load16, and one or more electrical devices14. As depicted, the electrical power source12is electrically coupled to the electrical devices14via a first electrical connection20and the electrical devices14are electrically coupled to the electrical load16via a second electrical connection22. In some embodiments, the first electrical connection20and/or the second electrical connection22may each include one or more electrical connectors, such as wires, cables, bus structures (e.g., laminated bus bars or PCB), and/or the like.

Utilizing the first electrical connection20, the electrical power source12may supply electrical power to the electrical devices14. In operation, the electrical power source12may output electrical power with specific characteristics, such as type (e.g., AC or DC), voltage, current, frequency, and/or the like. For example, in some embodiments, the electrical power source12may be an alternating current (AC) power source, such as an AC power generator, an alternator, and/or the like. In other words, in such embodiments, the electrical power source12may output AC electrical power to one or more of the electrical devices14. In other embodiments, the electrical power source12may a direct current (DC) power source, such as a battery, a capacitor, an ultra-capacitor, a DC power supply, and/or the like. In other words, in such embodiments, the electrical power source12may output DC electrical power to one or more of the electrical devices14.

In any case, utilizing the second electrical connection22, one or more of the electrical devices14may supply electrical power to the electrical load16. In some embodiments, the electrical load16may operate to store received electrical power as electrical energy and/or to perform an operation, such as actuating a motor, using the received electrical power. Additionally, the electrical load16may expect (e.g., be designed) to operate using electrical power with target characteristics such as, target type (e.g., AC or DC), target voltage, target current, target frequency, and/or the like. For example, in some embodiments, the electrical load16may be a DC load, such as a battery, a computer, an engine control unit, a display, a light bulb, and/or the like. In other words, in such embodiments, electrical load16may expect to receive DC electrical power from one or more of the electrical devices14. In other embodiments, the electrical load16may be an AC load, such as an electric motor, a heating, ventilating, and air conditioning (HVAC) system, and/or the like. In other words, in such embodiments, the electrical load16may expect to receive AC electrical power from one or more of the electrical devices14.

In some embodiments, characteristics of electrical power output by the electrical power source12may differ from the target characteristics the electrical load16expects to receive, for example, when the electrical power source12is an AC power source and the electrical load16is a DC load. To facilitate supplying electrical power with the target characteristics, the electrical devices14may operate on electrical power received from the electrical power source12. In some embodiments, the electrical devices14may include one or more passive electrical devices15, which passively operate on electrical power flowing through the electrical system10. For example, a passive electrical device15may be an impedance device, such as a resistor, a capacitor, an inductor, a diode, or the like.

Additionally, in some embodiments, the electrical devices14may include one or more active electrical devices17, which may actively be controlled to adjust operation on electrical power flowing through the electrical system10. For example, an active electrical device17may be a switching device, such as an electromechanical switching device (e.g., relay or contactor), a semiconductor switching device (e.g., MOSFET or BJT), or the like. In some embodiments, an active electrical device17(e.g., switching device) may alternating switch between an open position and a closed position. To facilitate achieving higher switch frequencies, in some embodiments, an active electrical device17may be silicon-carbide (SiC) MOSFET.

In any case, in some embodiments, the electrical system10may include a control system24to control and/or monitor operation of the electrical devices14, the electrical power source12, and/or the electrical load16. To facilitate controlling and/or monitoring operation, the control system24may include a processor26and memory28. In some embodiments, the memory28may store instructions executable by the processor26and/or data to be processed (e.g., analyzed) by the processor26. Thus, the memory28may include one or more tangible, non-transitory, computer readable media, such as random access memory (RAM), read only memory (ROM), rewritable non-volatile memory (e.g., flash memory), a hard drive, an optical discs, and/or the like. Additionally, the processor26may include one or more general-purpose microprocessors, one or more application specific processors (ASICs), one or more field programmable logic arrays (FPGAs), or any combination thereof. Additionally or alternatively, the control system24may utilize analog control based on op-amps, logic gates, and/or other control circuitry.

In some embodiments, the control system24may monitor operation of the electrical system10by determining operational parameters of the electrical system10. To facilitate determining the operational parameters, one or more sensors30may be disposed on or coupled to the electrical devices14, the first electrical connection20, and/or the second electrical connection22. For example, the sensors30may include temperature sensors, pressure sensors, voltage sensors, current sensors, and/or power sensors.

In any case, a sensor30may operate to measure an operational parameter of the electrical system10and generate sensor data indicative of the measured operational parameter. Thus, the control system24may be communicatively coupled to the sensors30disposed in the electrical system10. In this manner, the control system24may monitor operation of the electrical system10by determining the measured operational parameters based at least in part on sensor data received from one or more sensors30.

In addition to merely monitoring operation, in some embodiments, the control system24may control operation of the electrical system10based at least in part on the determined operational parameters. In some embodiments, the control system24may control operation of one or more electrical devices14(e.g., an active electrical device17), the electrical power source12, and/or the electrical load16. Thus, the control system24may be communicatively coupled to the electrical devices14, the electrical power source12, and/or the electrical load16.

In this manner, the control system24may control operation of a component (e.g., electrical device14, electrical power source12, or electrical load16) by communicating a control signal instructing the component to adjust operation. For example, the control system24may communicate a control signal to an active electrical device17(e.g., switching device), which instructs the active electrical device17to switch from an open position to a closed position. Additionally or alternatively, the control system24may communicate a control signal to the active electrical device17, which instructs the active electrical device17to switch from the closed position to the open position.

As described above, the electrical devices14may operate to facilitate converting electrical power received from the electrical power source12into electrical power with the target characteristics expected to be received by the electrical load16. To facilitate producing the target characteristics, in some embodiments, multiple electrical devices14may operate together. Thus, in such embodiments, the control system24may coordinate operation of multiple electrical devices14, for example, by directly controlling operation of an active electrical device17and/or indirectly controlling operation of a passive electrical device15via the active electrical device17. Additionally, in some embodiments, multiple electrical devices14that operate together (e.g., as a unit) may be grouped into one or more composite devices, such as a power converter, a power conditioning unit, or the like.

To help illustrate, an example embodiment of a power converter32(e.g., composite device) is shown inFIG. 2. Generally, the power converter32may operate to convert AC electrical power into DC electrical power. Thus, the power converter32may be electrically coupled between an AC power source12A and a DC load16A. It should be appreciated that the depicted power converter32is merely intended to be illustrative and not limiting. In particular, it is recognized that other power converters32may be implemented differently compared to the depicted embodiment. For example, other power converters32may include different number of electrical devices14, different types of electrical devices, and/or different inter-device electrical connections.

In any case, as described above, the AC power source12A may operate to generate AC electrical power. To facilitate generating AC electrical power, the AC power source12A may include a rotor31and a stator, which includes a first winding34A, a second winding34B, and a third winding34C. In other embodiments, the windings34may instead be located on the rotor31.

In any case, with regard to the depicted embodiment, the rotor31may generate a rotor magnetic field, for example, using a permanent magnet or an electromagnet. In some embodiments, the rotor31may be mechanically coupled to a mechanical energy source, such as an internal combustion engine, a gas turbine, a steam turbine, a wind turbine, or the like. In such embodiments, the mechanical energy source may operate to actuate (e.g., rotate) the rotor31and, thus, the rotor magnetic field, thereby inducing voltage in the windings34.

In some embodiments, the voltage induced in each winding34may be used to generate a different phase of the AC electrical power. For example, the rotor31may induce a first voltage in the first winding34A to generate a first phase of the AC electrical power, a second voltage in the second winding34B to generate a second phase of the AC electrical power, and a third voltage in the third winding34C to generate a third phase of the AC electrical power. Thus, in the depicted embodiment, the AC power source12A may generate three phase AC electrical power. In other embodiments, the AC power source12A may use any number of windings34to generate any number of phases.

In some embodiments, voltage and/or frequency of AC electrical power may be dependent at least in part on actuation speed of the rotor31. For example, when actuation speed of the rotor31increases, the rate of change of the rotor magnetic flux may increase, thereby increasing magnitude of voltage and/or frequency of the AC electrical power generated. On the other hand, when actuation speed of the rotor31decreases, the rate of change of the rotor magnetic flux may decrease, thereby decreasing magnitude of voltage and/or frequency of the AC electrical power generated. In other words, when the actuation speed of the rotor31varies, the voltage and/or frequency of AC electrical power output from the AC power source12A may also vary.

In any case, the power converter32may receive AC electrical power generated by the AC power source12A and operate to convert the AC electrical power into voltage regulated DC electrical power supplied to the DC load16A. Thus, with regard to the depicted embodiment, the power converter32may operate to convert the three-phase AC electrical power generated by the AC power source12A into voltage regulated DC electrical power.

As described above, to facilitate converting AC electrical power into DC electrical power, the power converter32may be a composite device, which includes multiple electrical devices14. In the depicted embodiment, the electrical devices14include diodes36, a semiconductor switching device38, a capacitor40, and an inductor42. In the depicted embodiment, a pair of diodes36is implemented on each phase leg44, which is electrically coupled between a positive DC bus46, a negative DC bus48, and a corresponding AC bus49. For example, on a first phase leg44A, a first diode36A is electrically coupled between the positive DC bus46and a first AC bus49A, which is electrically coupled to the first winding34A and, thus, supplies a first phase of AC electrical power to the first phase leg44B. Additionally, on the first phase leg44A, a first diode36A is electrically coupled between the positive DC bus46and the first AC bus49.

In the depicted embodiment, the semiconductor switching device38is electrically between the positive DC bus46and the negative DC bus48. In some embodiments, the semiconductor switching device38may include a wide band-gap transistor, such as a silicon carbide (SiC) transistor, a metal-oxide-semiconductor field-effect transistor (MOSFET), a field-effect transistor (FET), a bipolar junction transistor (BJT), an insulated-gate bipolar transistor (IGBT), or the like. In any case, in an open position, the semiconductor switching device38may block (e.g., disable) current flow through the semiconductor switching device38. Additionally, in a closed position, the semiconductor switching device38may permit (e.g., enable) current flow current flow through the semiconductor switching device38. In some embodiments, the semiconductor switching device38may alternatingly switch between the open position and the closed position to control flow of electrical power between the positive DC bus46and the negative DC bus48, for example, based at least in part on frequency of the AC electrical power generated by the AC power source12A.

Since the DC load16A expects to receive electrical power, in the depicted embodiment, a diode36is electrically coupled on the positive DC bus46. In this manner, the diode36may reduce likelihood of the power converter32and/or the AC power source12A attempting to draw electrical power from the DC load16A. Additionally, the capacitor40and/or the inductor42may act as a filter to smooth DC electrical power before supply to the DC load16A.

As indicated above, other power converters32may be implemented in a different manner than the depicted embodiment. For example, in some embodiments, one or more of the diodes36of each phase leg44may be replaced with a semiconductor switching device38. Additionally, in some embodiments, one or more electrical devices14may each be replaced with cascaded electrical devices14, which includes multiple electrical devices14connected in series, to facilitate adaptation for deployment in other applications. For example, in the depicted embodiment, the semiconductor switching device38and/or the capacitor40may be rated (e.g., sized) for reliable operation in lower voltage applications. To facilitate deployment in higher voltage applications, instead of a single semiconductor switching device38, the power converter32may be implemented using multiple cascaded semiconductor switching devices38. Additionally or alternatively, instead of a single capacitor40, the power converter32may be implemented using multiple cascaded capacitors40.

To help illustrate, an example of cascaded electrical devices14is shown inFIG. 3. In the depicted embodiment, three electrical devices14—namely a first electrical device14A, a second electrical device14B, and a third electrical device14C—are cascaded. It should be appreciated that the depicted embodiment is merely intended to be illustrative and not limiting. In particular, it is recognized that other implementations of cascaded electrical devices14may include a different number (e.g., two, four, five, or more) of electrical devices14.

In any case, as depicted, the cascaded electrical devices14are electrically coupled between the positive DC bus46and the negative DC bus48via one or more electrical connections50. For example, a first electrical connection50A may be formed between the positive DC bus46and the first electrical device14A, a second electrical connection50B may be formed between the first electrical device14A and the second electrical device14B, a third electrical connection50C may be formed between the second electrical device14B and the third electrical device14C, and a fourth electrical connection50D may be formed between the third electrical device14C and the negative DC bus48.

In some embodiments, the electrical connections50may be implemented via one or more electrical connectors, such as wires, cables, bus structures (e.g., bus bar or PCB), and/or the like. For example, the first electrical connection50A may be implemented using a first wire, the second electrical connection50B may be implemented using a second wire, the third electrical connection50C may be implemented using a third wire, and the fourth electrical connection50D may be implemented using a fourth wire.

As described above, during operation of the electrical system10, stray impedance (e.g., capacitance or inductance) may be introduced in surrounding electrically conductive material, such as electrical devices14and/or electrical connectors in the electrical system10. Since strength of magnetic fields and electric fields generally vary with distance, resulting stray impedance introduced in the electrical system10may be dependent on implementation of the electrical connections50. In other words, implementing the electrical connections50with different electrical connector configurations may result in different magnitudes of stray impedance being introduced in electrical system10.

To help illustrate, an example of a bus structure52(e.g., second bus structure52B) implemented to cascade three electrical devices14is shown inFIG. 4. It should be appreciated that the depicted bus structure52is merely intended to be illustrative and not limiting. In particular, it is recognized that implementing a bus structure52using the techniques of the present disclosure may allow for some variations, for example, with different number of layers and/or with the layer assignments reversed. Moreover, as will be described in more detail below, the techniques of the present disclosure may also enable implementing a bus structure52used to cascade two electrical devices14, four electrical devices14, five electrical devices14, or more electrical devices14.

In any case, the second bus structure52B may include conductive layers54and non-conductive layers56, which electrically and physically separate the conductive layers54. Thus, each non-conductive layer56may be formed from an electrically insulating material, such as silicon, rubber, plastic, and/or the like. Additionally, each conductive layer54may be formed from an electrically conductive material, such as copper. Furthermore, in some embodiments, each conductive layer54and each non-conductive layer56may have approximately the same surface area (e.g., width and length). Thus, in some embodiments, the second bus structure52B may be implemented as a multi-layer bus bar or a multi-layer PCB.

As will be described in more detail below, design parameters of a bus structure52, including number of conducting layer54, may be determined based at least in part on number of electrical devices14expected to be cascaded by the bus structure52. For example, to cascade N electrical devices14, the bus structure52may be implemented using N+3 conductive layers54. Since three electrical devices14are cascaded, in the depicted embodiment, the second bus structure52B includes six conductive layers54and, thus, at least five non-conductive layers56.

In some embodiments, each conductive layer54may be implemented as one of a positive layer, a negative layer, or an inter-device layer. In particular, when electrical devices14are coupled to the bus structure52, an inter-device layer may provide an electrical connection50between two of the electrical devices14. Additionally, when the bus structure52is deployed, a positive layer may provide an electrical connection50between the positive DC bus46and an electrical device14coupled to the bus structure52. Furthermore, when the bus structure52is deployed, a negative layer may provide an electrical connection50between the negative DC bus48and another electrical device14coupled to the bus structure52. Thus, to cascade multiple electrical devices14, each conductive layer54may be electrically coupled to one of the electrical devices14.

Since the bus structure52includes multiple layers, to facilitate electrically coupling conductive layers54to the electrical devices14, through-holes58may be formed in the bus structure52. For example, the through-holes58may be formed perpendicular to a surface (e.g., width×length) of the bus structure52. Additionally, perpendicular vias60may be formed in each through-hole58. In particular, each perpendicular via60may be electrically coupled to one or more conductive layers54and electrically insulated from the remaining conductive layers54.

In the depicted embodiment, a first outer conductive layer54A is implemented as a positive layer and a second outer conductive layer54B is implemented as a negative layer. To facilitate reducing stray inductance, an intermediate conductive layer54(e.g., between the first outer conductive layer54A and the second outer conductive layer54B) neighboring (e.g., closest to) each outer conductive layer54may also be implemented as either a positive layer or a negative layer. For example, since the first outer conductive layer54A is implemented as a positive layer, a first intermediate conductive layer54C may be implemented as a negative layer. Additionally, since the second outer conductive layer56B is implemented as a negative layer, a second intermediate conductive layer54D may be implemented as a positive layer.

Thus, when the first electrical device14A is coupled to the second bus structure52B, the first outer conductive layer54A and the second intermediate conductive layer54D may be electrically coupled to the first electrical device14A via a first perpendicular via60A. In other words, the first outer conductive layer54A, the second intermediate conductive layer54D, and the first perpendicular via60A may be implemented to form the first electrical connection50A between the positive DC bus46and the first electrical device14A. Additionally, when the third electrical device14C is coupled to the second bus structure52B, the second outer conductive layer54B and the first intermediate conductive layer54C may be electrically coupled to the third electrical device14C via a second perpendicular via60B. In other words, the second outer conductive layer54B, the first intermediate conductive layer54C, and the second perpendicular via60B may be implemented to form the fourth electrical connection50D between the third electrical device14C and the negative DC bus48.

Each remaining intermediate conductive layer54may be implemented as an inter-device layer. In some embodiments, the remaining intermediate conductive layers54may be implemented as inter-device layers based at least in part on expected current flow order through the cascaded electrical devices14and/or relative position of the conductive layers54. For example, since electrical current is expected to flow from the first electrical device14A to the second electrical device14B, a third intermediate conductive layer54E may be implemented as a first inter-device layer, which facilitates electrically coupling the first electrical device14A and the second electrical device14B. Thus, when the first electrical device14A is coupled to the second bus structure52B, the third intermediate conductive layer54E may be electrically coupled to the first electrical device14A via a third perpendicular via60C. Additionally, when the second electrical device14B is coupled to the second bus structure52B, the third intermediate conductive layer54E may be electrically coupled to the second electrical device14B via a fourth perpendicular via60D. In other words, the third perpendicular via60C, the third intermediate conductive layer54E, and the fourth perpendicular via60D may be implemented to form the second electrical connection50B between the first electrical device14A and the second electrical device14B.

Additionally, since electrical current is expected to flow from the second electrical device14B to the third electrical device14C, a fourth intermediate conductive layer54F may be implemented as a second inter-device layer, which facilitates electrically coupling the second electrical device14B and the third electrical device14C. Thus, when the second electrical device14B is coupled to the second bus structure52B, the fourth intermediate conductive layer54F may be electrically coupled to the second electrical device14B via a fifth perpendicular via60E. Additionally, when the third electrical device14C is coupled to the second bus structure52B, the fourth intermediate conductive layer54F may be electrically coupled to the third electrical device14C via a sixth perpendicular via60F. In other words, the fifth perpendicular via60E, the fourth intermediate conductive layer54F, and the sixth perpendicular via60F may be implemented to form the third electrical connection50C between the second electrical device14B and the third electrical device14C. In this manner, the second bus structure52B may be implemented to cascade the first electrical device14A, the second electrical device14B, and the third electrical device14C.

As described above, design parameters of bus structures52may vary based at least in part on target operational (e.g., current and/or voltage) rating of an electrical system10. For example, current flow through electrically conductive material may be limited by physical dimension (e.g., size and/or surface area) of the conductive material. Thus, in some embodiments, current flow capabilities provided by a bus structure52may be increased by increasing size (e.g., thickness) of the conductive layers54. Additionally or alternatively, current flow capabilities provided by a bus structure52may be increased by increasing number of conductive layers54.

For example, a higher current capability bus structure52may be implemented by stacking multiple instances of the second bus structure52B. When implemented merely by stacking two instances of the first bus structures52, a resulting (e.g., stacked) bus structure may include twelve conductive layers with two directly adjacent positive and negative layer pairs. To facilitate reducing implementation associated cost, in some embodiments, multiple directly adjacent positive and negative layer pairs may instead be implemented using a single positive and negative layer pair.

To help illustrate, another example embodiment of a bus structure52(e.g., second bus structure52B), which may provide higher current carrying capabilities compared to the bus structure (e.g., first bus structure52) described above, is shown inFIG. 5. As depicted, the second bus structure52B is generally implemented by stacking two instances of the first bus structures52A using a single pair of central conductive layers54—namely a first central conductive layer54G implemented as a negative layer and a second central conductive layer54H implemented as a positive layer.

Thus, when the first electrical device14A is coupled to the second bus structure52B, the first outer conductive layer54A, the second intermediate conductive layer54D, and the second central conductive layer54H may be electrically coupled to the first electrical device14A via the first perpendicular via60A. In other words, the first outer conductive layer54A, the second intermediate conductive layer54D, the second central conductive layer54H, and the first perpendicular via60A may be implemented to form the first electrical connection50A between the positive DC bus46and the first electrical device14A. Additionally, when the third electrical device14C is coupled to the second bus structure52B, the second outer conductive layer54B, the first central conductive layer54G, and the first intermediate conductive layer54C may be electrically coupled to the third electrical device14C via the second perpendicular via60B. In other words, the second outer conductive layer54B, the first intermediate conductive layer54C, the first central conductive layer54G, and the second perpendicular via60B may be implemented to form the fourth electrical connection50D between the third electrical device14C and the negative DC bus48.

As described above, each remaining intermediate conductive layer54may be implemented as an inter-device layer. In some embodiments, the remaining intermediate conductive layers54may be implemented as inter-device layers based at least in part on expected current flow order through the cascaded electrical devices14and/or relative position of the conductive layers54. For example, since electrical current is expected to flow from the first electrical device14A to the second electrical device14B, two instances of the third intermediate conductive layer54E may be implemented as a first pair of inter-device layers, which facilitates electrically coupling the first electrical device14A and the second electrical device14B. Thus, when the first electrical device14A is coupled to the second bus structure52B, the two instances of the third intermediate conductive layer54E may be electrically coupled to the first electrical device14A via the third perpendicular via60C. Additionally, when the second electrical device14B is coupled to the second bus structure52B, the two instances of third intermediate conductive layer54E may be electrically coupled to the second electrical device14B via the fourth perpendicular via60D. In other words, the third perpendicular via60C, the two instances of the third intermediate conductive layer54E, and the fourth perpendicular via60D may be implemented to form the second electrical connection50B between the first electrical device14A and the second electrical device14B.

Additionally, since electrical current is expected to flow from the second electrical device14B to the third electrical device14C, two instances of the fourth intermediate conductive layer54F may be implemented as a second pair of inter-device layers, which facilitates electrically coupling the second electrical device14B and the third electrical device14C. Thus, when the second electrical device14B is coupled to the second bus structure52B, the two instances of the fourth intermediate conductive layer54F may be electrically coupled to the second electrical device14B via the fifth perpendicular via60E. Additionally, when the third electrical device14C is coupled to the second bus structure52B, the two instances of the fourth intermediate conductive layer54F may be electrically coupled to the third electrical device14C via the sixth perpendicular via60F. In other words, the fifth perpendicular via60E, the two instances of the fourth intermediate conductive layer54F, and the sixth perpendicular via60F may be implemented to form the third electrical connection50C between the second electrical device14B and the third electrical device14C. In this manner, the second bus structure52B may be implemented to cascade the first electrical device14A, the second electrical device14B, and the third electrical device14C, for example, with increased current capabilities compared to the first bus structure52A described with reference toFIG. 4since the second bus structure52B described with reference toFIG. 5includes more conductive layers54.

In a similar manner, bus structures52to provide further improved operational rating by stacking M instances of the first structure52A. In other words, when implemented to electrically couple N electrical devices14by stacking M bus structures52, a higher current bus structure may be implemented using (N+3)+(M−1)(N+3−2) conductive layers52of which (M−1) pairs of central conductive layers as a positive and negative layer pair. In any case, as described above, implementing the bus structure52in this manner described by the present disclosure may facilitate improving operation of the electrical system10.

In particular, each conductive layer54implemented as a positive layer may be paired with a neighboring conductive layer54implemented as a negative layer. As such, electrical current flowing in the pair of neighboring conductive layers54may have approximately the same magnitude, but flow opposite directions. Since orientation of a magnetic field is dependent on current flow direction and magnitude of the magnetic field is dependent on current flow magnitude and distance, implementing the bus structure52with a negative layer in close proximity to each positive layer may result in magnetic fields produced by current flow in the positive layers and the negative layers canceling before reaching other conductive layers54, thereby reducing stray inductance introduced in the electrical system10during operation.

Additionally, since electrically coupled between the positive DC bus46and the negative DC bus48, a voltage drop may occur across each of the cascaded electrical devices14. As such, different conductive layers54may have different voltages with the largest voltage difference occurring between positive layers and negative layers. Since magnitude of electric field is dependent on magnitude of voltage difference and distance, implementing the bus structure52with a negative layer in close proximity to each positive layer may increase magnitude of electric fields produced by voltage differences between conductive layers54in the bus structure, thereby increasing stray capacitance61introduced in the electrical system10during operation.

As described above, voltage stress (e.g., overshoot or spikes) produced when electrical power is initially connected or re-connected may affect operation of electrical devices14in the electrical system10, for example, by reducing lifespan and/or operational reliability of one or more electrical devices14. In fact, in some instances, magnitude of an operational effect and/or likelihood of producing the operational effect may increase as magnitude of the voltage overshoot increases. As described above, magnitude of the voltage overshoot may be dependent on stray impedance and/or stray capacitance introduced in the electrical system10.

In particular, since inductors generally resist sudden changes in current flow, stray inductance introduced in the electrical system may result in electrical power unexpectedly flowing in the electrical system10and contributing to the voltage overshoot. Thus, implementing the bus structure52in the manner described herein to reduce stray inductance may facilitate reducing magnitude of voltage overshoots produced in the electrical system10. Additionally, since capacitors generally resist sudden changes in voltage, stray capacitance may impede (e.g., block) electrical power that would otherwise contribute to the voltage overshoot. Thus, implementing the bus structure52in the manner described herein to increase stray capacitance may facilitate reducing magnitude of voltage overshoots produced in the electrical system10.

Moreover, when the conductive layers54are approximately the same size and conductive layers54are implemented based on expected current flow order through the cascaded electrical devices14, the bus structure52may facilitate balancing stray capacitance introduced across each of the cascaded electrical devices14. For example, with regard to the second bus structure52B shown inFIG. 6, voltage difference between neighboring intermediate conductive layers54may be approximately uniform since implemented based on expected current flow order, thereby resulting in first inter-device stray capacitance63, second inter-device stray capacitance65, and third inter-device stray capacitance67being approximately equal. Since smaller capacitance generally dominates when coupled in series, implementing a bus structure52in the manner described in the present disclosure may facilitate operational reliability, for example, to reduce likelihood of producing unbalanced inter-device stray capacitance that results in unbalanced voltage stress on electrical devices.

Additionally, as described above, cascaded electrical devices14may be implemented in an electrical system10to facilitate using multiple lower rated electrical devices14in higher electrical power applications, for example, by dividing voltage drop across the multiple lower rated electrical devices14. Thus, implementing the bus structure52in the manner described herein to balance stray capacitance across each of the cascaded electrical devices14may facilitate improving lifespan uniformity and/or operational reliability uniformity of the cascaded electrical devices14.

In any case, as described above, the techniques described in the present disclosure may be used to implement bus structures52for cascading any suitable number of electrical devices14. However, to achieve target effects of the bus structure52, design parameters, such as number of conductive layers54and/or conductive layer54assignments, may vary between bus structures52, for example, based on number of electrical devices14intended to be electrically coupled and/or current flow capabilities intended to be provided. In some embodiments, to facilitate implementing a bus structure52, a design device may determine target design parameters expected to enable the bus structure52to provide the target effects when deployed.

To help illustrate, one embodiment of a design device62is shown inFIG. 5. As depicted, the design device62includes a processor64, memory66, and one or more input/output (I/O) devices68. Thus, the design device62may be any suitable electronic device, such as a handheld computing device, a tablet computing device, a notebook computer, a desktop computer, a workstation computer, a cloud-based computing device, or any combination of such devices.

In any case, the memory66may store instructions executable by the processor64and/or data to be processed (e.g., analyzed) by the processor64, for example, to determine target design parameters of a bus structure52. Thus, in some embodiments, the memory66may include one or more tangible, non-transitory, computer-readable media, such as random access memory (RAM), read only memory (ROM), rewritable non-volatile memory, flash memory, hard drives, optical discs, and/or the like. Additionally, in some embodiments, the processor64may include one or more general-purpose microprocessors, one or more application specific processors (ASICs), one or more field programmable logic arrays (FPGAs), or any combination thereof.

Furthermore, in some embodiments, I/O devices68may enable the design device62to interface with various other electronic devices. For example, the I/O devices68may communicatively couple the design device62to a communication network, such as a personal area network (PAN), a local area network (LAN), and/or a wide area network (WAN), thereby enabling the design device62to communicate with another electronic device communicatively coupled to the communication network. Additionally or alternatively, the I/O devices68may communicatively couple the design device62to a communication (e.g., serial or parallel) cable, thereby enabling the design device62to communicate with another electronic device communicatively coupled to the communication cable.

In any case, in some embodiments, communication between the design device62and other electronic devices may facilitate determining design parameters of a bus structure52and/or implementing (e.g., manufacturing) the bus structure52based at least in part on the determined design parameters. For example, to facilitate determining target design parameters of a bus structure52, the design device62may be communicatively coupled to an electrical system10, in which the bus structure52is expected to be deployed. In this manner, the design device62may analyze the electrical system10to determine characteristics expected to be relevant to design of the bus structure52, such as number of electrical devices14expected to be cascaded by the bus structure52, characteristics of electrical power expected to be out output by an electrical power source12, target characteristics of electrical power an electrical load16expects to receive, expected switching frequency of active electrical devices17, and/or the like.

Additionally or alternatively, the design device62may be communicatively coupled to manufacturing equipment70, which may operate to implement and/or deploy the bus structure52. In some embodiments, the manufacturing equipment70may include laminating equipment, patterning equipment, masking equipment, drilling equipment, etching equipment, plating equipment, coating equipment, soldering equipment, 3D printing equipment, and/or the like. Thus, to facilitate implementing and/or deploying the bus structure52, the design device62may communicate target design parameters of the bus structure52and/or control command to the manufacturing equipment70.

In some embodiments, the I/O devices68, additionally or alternatively, may enable a user to interact with the design device62, for example, to input target design parameters and/or instructions (e.g., control commands). Thus, in some embodiments, the input device65may include buttons, keyboards, mice, trackpads, and/or the like. Additionally or alternatively, the display63may include touch components that enable user inputs to the design device62by detecting occurrence and/or position of an object touching its screen (e.g., surface of the display63). In addition to enabling user inputs, the display63may present visual representations of information, such as characteristics of the electrical system10and/or target design parameters, to facilitate implementation (e.g., assembly) and/or deployment of the bus structure52.

Thus, the design device62may operate to determine target design parameters for bus structures52. To help further illustrate, one embodiment of a process72for operating a design device62is described inFIG. 6. Generally, the process72includes determining expected characteristics of an electrical system (process block74) and determining target design parameters of a bus structure to be deployed in the electrical system (process block76). In some embodiments, the process72may be implemented by executing instructions stored in one or more tangible, non-transitory, computer-readable media, such as memory28or memory66, using processing circuitry, such as processor26or processor64.

Accordingly, in some embodiments, the design device62may determine characteristics of an electrical system10, in which a bus structure52is expected to be deployed (process block74). As described above, in some embodiments, the design device62may determine characteristics of the electrical system10based at least in part on automated analysis of the electrical system10. Additionally or alternatively, the design device62may determine characteristics of the electrical system10based at least in part on user inputs, for example, received via the I/O devices68.

As described above, to facilitate improving operation of the electrical system10, the design device62may determine characteristics of the electrical system10expected to impact ability of the bus structure52to provide target effects, such as reduced stray inductance, increased stray capacitance, and/or balanced stray capacitance. In some embodiments, such characteristics may include number of electrical devices14expected to be cascaded by the bus structure52, expected current flow order through the cascaded electrical devices14, and/or expected operational (e.g., current and/or voltage) rating of the electrical system10.

Based at least in part on the expected characteristics, the design device62may determine target design parameters of the bus structure52(process block76). For example, based at least in part on the expected number of electrical devices14, the design device62may determine number of conductive layers54and, thus, number of non-conductive layers56that should be implemented in the bus structure52. In some embodiments, the design device62may determine that, to cascade N electrical devices14, the bus structure52should include N+3 conductive layers54. Additionally, since non-conductive layers56are formed between neighboring pairs of conductive layers54, the design device62may determine that the bus structure52should include at least N+2 non-conductive layers56. For example, when the bus structure52is expected to cascade four electrical devices, the design device62may determine that the bus structure52should include seven conductive layers54and at least six non-conductive layers56.

Additionally, based at least in part on the expected current flow order and/or relative position (e.g., order) of the conductive layers54, the design device62may assign each conductive layer56as one of a positive layer, a negative layer, and an inter-device layer. In some embodiments, the design device62may assign one outer conductive layer56as a positive layer and the other outer conductive layer56as a negative positive layer. To facilitate reducing stray inductance and/or increasing stray capacitance, the design device62may assign one intermediate conductive layer54neighboring (e.g., closest to) the positive outer conductive layer as a negative layer and another intermediate conductive layer54neighboring the negative outer conductive layer56as a positive layer. Moreover, in some (e.g., stacked) embodiments, the design device62may assign (M−1) pairs of central conductive layers54each as a positive and negative layer pair.

Additionally, the design device62may assign each remaining (e.g., not positive or negative) intermediate conductive layer54as an inter-device layer. To facilitate balancing stray capacitance, in some embodiments, the design device62may assign intermediate conductive layers54as inter-device layers such that each inter-device layer is electrically coupled to an opposite side of an electrical device14compared to its neighboring conductive layer54. For example, when a conductive layer54is expected to be electrically coupled to an input side of an electrical device14, the design device62may assign a neighboring conductive layer54as an inter-device layer to be electrically coupled to an output side of the electrical device14, which facilitates providing an electrical connection50between the electrical device14and the next downstream electrical device14. Additionally or alternatively, when the conductive layer54is expected to be electrically coupled to an output side of the electrical device14, the design device62may assign the neighboring conductive layer54as an inter-device layer to be electrically coupled to an input side of the electrical device14, which facilitates providing an electrical connection between the electrical device14and the previous upstream electrical device14.

In this manner, the design device62may determine target design parameters to be used to implement a bus structure52including number of conductive layers54and/or assignment of each conductive layer54. In some embodiments, the target design parameters may additionally include target size (e.g., height, width, and/or length) of each layer, target material composition of each layer, target size of each through-holes58, target placement of each through-holes58, target size of each perpendicular via60, target material composition of each perpendicular via, and/or the like. In any case, the bus structure52may be implemented based at least in part on the target design parameters, for example, when the design device62communicates the target design parameters to the manufacturing equipment70.

To help illustrate, one embodiment of a process80for implementing a bus structure52is described inFIG. 7. Generally, the process80includes forming parallel conductive layers (process block82), forming non-conductive layers between each pair of neighboring conductive layers (process block84), implementing a first outer conductive layer as a positive layer (process block86), implementing an intermediate conductive layer neighboring the first outer conductive layer as a negative layer (process block88), implementing a second outer conductive layer as a negative layer (process block90), implementing an intermediate conductive layer neighboring the second outer conductive layer as a positive layer (process block92), and implementing each remaining intermediate conductive layer as an inter-device layer (process block94). In some embodiments, the process80may be implemented by executing instructions stored in one or more tangible, non-transitory, computer-readable media, such as memory28or memory66, using processing circuitry, such as processor26or processor64.

Accordingly, in some embodiments, the design device62may instruct the manufacturing equipment70to implement the bus structure52, for example, by communicating control signals and/or control commands based at least in part on target design parameters. In particular the design device62may instruct the manufacturing equipment70form parallel conductive layers54(process block82) with a non-conductive layers56between each pair of neighboring conductive layers54(process block84). In some embodiments, the manufacturing equipment70may form the layers by alternatingly depositing conductive material and non-conductive material. In this manner, the bus structure52may be implemented such that neighboring conductive layers54are physically separated by a non-conductive layer56.

Additionally, the design device62may instruct the manufacturing equipment70to implement a first outer conductive layer54A as a positive layer (process block86) and to implement a second intermediate conductive layer54D neighboring a second outer conductive layer54B as a positive layer (process block92). In some embodiments, to facilitate implementation as a positive layer, the manufacturing equipment70may prepare the first outer conductive layer54A and/or the second intermediate conductive layer54D for electrical connection to the positive DC bus46. Additionally, in some embodiments, the manufacturing equipment70may form a first through-hole58through at least the first outer conductive layer54A and the second intermediate conductive layer54D. In such embodiments, the manufacturing equipment70may then form a first perpendicular via60A in the first through-hole58such that the first perpendicular via60A is electrically coupled to the first outer conductive layer54A and the second intermediate conductive layer54D, but electrically insulated from the other conductive layers54. Furthermore, in some embodiments, the manufacturing equipment70may form the first perpendicular via60A such that it extends outwardly from the layers of the bus structure52to facilitate electrically coupling an electrical device14(e.g., the first electrical device14A) to the first perpendicular via60A.

The design device62may also instruct the manufacturing equipment70to implement a first intermediate conductive layer54C neighboring the first outer conducive layer54A as a negative layer (process block88) and to implement the second outer conductive layer54B as a negative layer (process block90). In some embodiments, to facilitate implementation as a negative layer, the manufacturing equipment70may prepare the second outer conductive layer54B and/or the first intermediate conductive layer54C for electrical connection to the negative DC bus48. Additionally, in some embodiments, the manufacturing equipment70may form a second through-hole58through at least the second outer conductive layer54B and the first intermediate conductive layer54C. In such embodiments, the manufacturing equipment70may then form a second perpendicular via60B in the second through-hole58such that the second perpendicular via60B is electrically coupled to the second outer conductive layer54B and the first intermediate conductive layer54C, but electrically insulated from the other conductive layers54. Furthermore, in some embodiments, the manufacturing equipment70may form the second perpendicular via60B such that it extends outwardly from the layers of the bus structure52to facilitate electrically coupling another electrical device14(e.g., third electrical device14C) to the second perpendicular via60B.

The design device62may also instruct the manufacturing equipment70to implement each remaining intermediate conductive layers54(e.g., third intermediate conductive layer54E and fourth intermediate conductive layer54F) as an inter-device layer (process block94). As described above, in some embodiments, the remaining intermediate conductive layers54may be implemented as inter-device layers based at least in part on expected current flow order through the cascaded electrical devices14and/or relative position of the remaining intermediate conductive layers54. When stacked to increase current flow capabilities, neighboring intermediate conductive layers54may nevertheless be implemented as a positive and negative layer pair.

Additionally, in some embodiments, the manufacturing equipment70may form a through-hole58corresponding to each inter-device layer. In particular, the through-hole58may be formed at least through the intermediate conductive layer54implemented as the corresponding inter-device layer. In such embodiments, the manufacturing equipment70may then form a perpendicular via60in each through-hole58such that the perpendicular via60is electrically coupled to the corresponding intermediate conductive layer, but electrically insulated from the other conductive layers54. Furthermore, in some embodiments, the manufacturing equipment70may form the perpendicular vias60(e.g., third perpendicular vias60C, fourth perpendicular vias60D, fifth perpendicular vias60E, and/or sixth perpendicular vias60F) such that they extends outwardly from the layers of the bus structure52to facilitate electrically coupling an electrical device14(e.g., first electrical device14A, second electrical device14, or third electrical device14C) to each.

In this manner, a bus structure52used to cascade multiple electrical devices14may be implemented. Moreover, as described above, deploying a bus structure52implemented using the techniques described herein in an electrical system10may facilitate improving operation of the electrical system10. To deploy the bus structure52, electrical devices14may be electrically and physically coupled to perpendicular vias60formed in the bus structure52. Additionally, one or more conductive layers54implemented as a positive layer may be electrically coupled to the positive DC bus46and one or more conductive layers implemented as a negative layer may be electrically coupled to the negative DC bus48.

Accordingly, the technical effects of the techniques described in the present disclosure include enabling deployment of cascaded electrical devices in an electrical system in a manner that improves operation of the electrical system. In particular, the present disclosure describes techniques for implementing a bus structure (e.g., bus bar or PCB) that may be used cascade multiple electrical devices in a manner that facilitate reducing stray capacitance introduced in the electrical system, increasing stray capacitance introduced in the electrical system, and/or balancing stray capacitance between the cascaded electrical devices. By reducing stray inductance and/or increasing stray capacitance, the bus structure may facilitate reducing voltage stress (e.g., overshoot or spike) that may otherwise be produced during operation of the electrical system, thereby improving lifespan and/or operational reliability of one or more electrical devices in the electrical system. Moreover, by balancing stray capacitance between the cascaded electrical devices, the bus structure may facilitate balancing wear between the cascaded electrical devices, thereby improving lifespan uniformity and/or operational reliability uniformity of the cascaded electrical devices.