Planar inductor devices

A planar inductor device includes a ferrite body and a conductive pathway, The ferrite body extends around an opening in the ferrite body. The conductive pathway includes an input section, a current-splitting section, a coil section, a current-combining section, and an output section connected with each other, the input section extending toward the opening in the ferrite body. The current-splitting section includes a plurality of conductive coils joined with the conductive pathway and electrically disposed parallel to each other. The coil section includes the conductive coils helically wrapped around the ferrite body. The current-combining section includes the conductive coils joined with each other. The output section includes the joined conductive coils extending out of the ferrite body.

BACKGROUND OF THE INVENTION

The subject matter herein relates generally to electronic devices, such as transformers, inductors, filters, couplers, baluns, diplexers, multiplexers, modules or chokes.

Some electronic inductive devices include conductive coils wrapped around a ferrite component. For example, the inductive devices can include one or more inductors, transformers, or chokes. In general, a wire or set of wires is helically wrapped around an iron or magnetic body several times. Current flows through the wire and generates magnetic flux in the magnetic body. The magnetic flux may be used to induce current in another conductive coil and/or filter out components of the current.

Some of these known inductive devices are not without their shortcomings. For example, traditional inductors, transformers, or chokes can be relatively large and/or limited in topology and performance, especially in the context of Ethernet devices and other communication devices. The ferrites can be relatively large, and the conductive coils that are hand or machine-wrapped around the ferrites can consume relatively large amounts of space. Such inductive devices may need to be mounted on top of circuit boards that are included in the communication device and, as a result, increase the size of the communication device.

However, when the size of the inductive device is decreased, the relatively brittle ferrites may be damaged and/or break during incorporation of the inductor, transformer, or choke into the communication device. For example, the hand- or machine-wrapping of conductive wire around the relatively small ferrites can be difficult, if not impossible to reliably achieve.

A need exists for smaller inductive devices that include ferrites with conductive coils extending around the ferrites.

SUMMARY OF THE INVENTION

In one embodiment, an inductor device is provided. The device includes a ferrite body and a conductive pathway. The ferrite body extends around an opening in the ferrite body. The conductive pathway includes an input section, a current-splitting section, a coil section, a current-combining section, and an output section connected with each other, the input section extending toward the opening in the ferrite body. The current-splitting section includes a plurality of conductive coils joined with the conductive pathway and electrically disposed parallel to each other. The coil section includes the conductive coils helically wrapped around the ferrite body. The current-combining section includes the conductive coils joined with each other. The output section includes the joined conductive coils extending out of the ferrite body.

In another embodiment, another planar inductor device is provided. The device includes a substrate, a ferrite body, and a plurality of conductors and conductive vias. The substrate vertically extends between an upper surface and an opposite lower surface. The ferrite body is disposed in the substrate between the upper surface and the lower surface. The ferrite body has an opening that extends through the ferrite body. The conductors include an input conductor disposed between the ferrite body and the upper surface of the substrate, a current-splitting conductor disposed between the ferrite body and the lower surface of the substrate, and a current-combining conductor disposed between the ferrite body and the upper surface of the substrate. The vias include one or more conductive input vias coupled with both the input conductor and the current-splitting conductor and one or more current-splitting vias coupled with both the current-splitting conductor and the current-combining conductor. The input conductor, the current-splitting conductor, the current-combining conductor, the input vias, and the current-splitting vias form a conductive pathway that extends into the opening in the ferrite body and forms a plurality of conductive coils that each helically wrap around the ferrite body before combining back together and extending out of the opening in the ferrite body.

DETAILED DESCRIPTION OF THE DRAWINGS

FIG. 1is a side view of one embodiment of a planar inductor device100. The device100includes a planar substrate102with one or more electronic components of the device100embedded in the substrate102. By “planar,” it is meant that the substrate102is larger along two perpendicular dimensions than in a third perpendicular direction. The substrate102may be a flexible and non-rigid sheet, such as a sheet of cured epoxy, or a rigid or semi-rigid board, such as a printed circuit board (PCB) formed of FR-4.

The substrate102has a thickness dimension104that is vertically measured from a lower surface106to an opposite upper surface108. The thickness dimension104may be relatively small, such as 2.5 millimeters or less, 2.0 millimeters or less, 1.0 millimeters or less, or another distance. Alternatively, the thickness dimension104may be a larger distance.

In one embodiment, the substrate102includes an interior cavity120. The interior cavity120may be at least partially filled with a flexible material, such as cured epoxy, or with air. A ferrite body110is entirely disposed within the substrate102in one embodiment. For example, the ferrite body110may be located in the interior cavity120surrounded by the flexible material or air. The ferrite body110can be entirely disposed within the thickness dimension104of the substrate102and not protrude or project through a plane defined by the upper surface108of the substrate102and/or a plane defined by the lower surface106. The ferrite body110may be positioned within a cavity of a substrate with the cavity being filled with air or a flexible material (such as epoxy) in accordance with one or more embodiments described in U.S. patent application Ser. No. 12/699,777, which is entitled “Packaged Structure Having Magnetic Component And Method Thereof” (referred to herein as “'777 Application”) and/or U.S. patent application Ser. No. 12/592,771, which is entitled “Manufacture And Use Of Planar Embedded Magnetics As Discrete Components And In Integrated Connectors” (referred to herein as the “'771 Application”). The entire disclosures of the '777 and the '771 Applications are incorporated by reference herein.

The ferrite body110is shown as having an approximately rectangular shape. Alternatively, the ferrite body110may have another shape, such as a cylinder, toroid, annulus, E-shape, and the like. The ferrite body110may include or be formed from iron, an iron alloy, or a magnetic material. The ferrite body110can be enveloped in a flexible elastic epoxy or in air cavity within the cavity120of the substrate102. When the ferrite body110is enveloped in epoxy, the epoxy can be premixed with high permeability materials aid or increase the inductance per unit length of the ferrite body110. Examples of such high permeability materials include cobalt, nickel, manganese, chromium, iron, and the like. Alternatively, the cavity120of the substrate102can be filled or substantially filled with an epoxy having high permeability materials without the ferrite body110being disposed within the substrate102. For example, the ferrite body110may be replaced with a body formed from an epoxy having high permeability materials in the epoxy.

The device100includes a plurality of interconnected upper conductors114, conductive vias116, and lower conductors118. The upper conductors114may include conductive traces that are deposited on the upper surface108of the substrate102and/or below the upper surface108. For example, the substrate102may include a plurality of sub-layers stacked on top of each other, such as on one or more layers of FR-4 stacked on top of each other. The upper conductors114can be deposited on or in one of the sub-layers disposed below the upper surface108. The lower conductors118may include conductive traces that are deposited on the lower surface106of the substrate102and/or above the lower surface106. For example, the lower conductors118may be deposited on or in one of the sub-layers disposed above the lower surface106.

The vias116may be formed as holes or channels that vertically extend through all or a portion of the thickness dimension104of the substrate102. In one embodiment, the vias116are formed using lasers and/or mechanical drilling of the substrate102. For example, the vias116may be formed into the substrate102using CO2 lasers, ultraviolet (UV) lasers, and/or or multi-head mechanical drilling machines with via diameter sizes in the range of 25 micrometers to 500 micrometers. Alternatively, different techniques may be used to form the vias116and/or different sized vias116may be used.

In the illustrated embodiment, the vias116are disposed outside of the cavity120of the substrate102. For example, the vias116shown inFIG. 2do not extend through the cavity120. Alternatively, the vias116may at least partially extend through the cavity120. For example, at least a portion of the vias116located inside the substrate102may extend through the cavity120and/or the flexible material or air inside the cavity120.

The vias116may extend through the entirety of the thickness dimension104along center axes122from the upper surface108to the lower surface106. The vias116may be filed with a conductive material, such as a conductive solder, and/or may be conductively plated. For example, the exposed surfaces of the substrate102inside the vias116may be plated with a conductive material, such as a metal or metal alloy. The vias116conductively couple the upper conductors114with the lower conductors118.

In one embodiment, one or more of the upper conductors114and/or the lower conductors118may be formed from a combination of conductive traces and wire bonds. For example, the vias116may extend through the substrate102and be conductively coupled with the conductive traces and wire bonds of the upper conductors114and with the lower conductors118.

FIG. 2is a top view of the upper surface108of the planar inductor device100. The upper conductors114, the lower conductors118, and the vias116are arranged around the ferrite body110to form a conductive coil200. For example, the vias116are arranged in a plurality of pairs202, with each pair202including vias116on opposite sides204,206of the ferrite body110. The vias116in each pair202are conductively coupled along the upper surface108of the substrate102by one of the upper conductors114in the illustrated embodiment. Alternatively, the vias116may be coupled by more than one of the upper conductors114. As shown inFIG. 2, the upper conductors114are elongated conductive bodies that extend from a first via116in each pair202to a second, opposite via116in the same pair202.

The vias116vertically extend through the substrate102on opposite sides of the ferrite body110from the upper conductors114to the lower conductors118. In the illustrated embodiment, the vias116have circular shapes, but alternatively may have another shape, such as a polygon shape. The vias116define channels or holes that vertically extend through the substrate102. As shown inFIG. 2, the vias116are encircled by the substrate102. For example, the substrate102extends around and encircles the entire outer periphery of the vias116throughout the thickness dimension104of the substrate102. The channels or holes of the vias116are only open at the upper surface108and at the lower surface106of the vias116but are surrounded by the substrate102from the lower surface106to the upper surface108in the illustrated embodiment.

While the illustrated embodiment is a single coil device, multiple conductive pathways can be helically wrapped around the ferrite body to form chokes and transformers having two or more conductive coils. For Power over Ethernet (POE) or other applications, a longer bar shape-inductor device that can accommodate two or more conductive coils may be used. Each pair of conductive coils can support an opposite polarity of a voltage required for the POE application. If the two or more conductive coils are wound in the same direction around the ferrite body, the ferrite body may not saturate for the POE application.

As shown inFIG. 2, each lower conductor118conductively couples vias116in different pairs202of the vias116. For example, each lower conductor118conductively couples a first via116in a first pair202of the vias116on the first side204of the ferrite body110with a second via116in a second, different pair202of the vias116on the opposite second side206of the ferrite body110. The lower conductors118are elongated conductive bodies in the illustrated embodiment. The lower conductors118and the upper conductors114are obliquely oriented relative to each other. For example, as shown inFIG. 2, the lower conductors118are elongated along directions disposed at acute angles relative to the directions along which the upper conductors114are elongated.

The conductively coupled upper conductors114, the vias116, and the lower conductors118form the conductive coil200that helically wraps or encircles the ferrite body110. By “encircle,” the conductive coil200may follow a helical path that moves around the outer perimeter of the ferrite body110. An encircling path of the conductive coil200can extend around an entire 360 degrees of the ferrite body110, even though the upper conductors114, the vias116, and the lower conductors118do not follow a pathway that is a perfect circle.

The coil200can extend from a first via116disposed along the first side204of the ferrite body110to a second via116in the same pair202of the vias116on the opposite, second side206of the ferrite body110. The second via116extends along the second side206of the ferrite body110through the thickness dimension104of the substrate102to a first lower conductor118. The first lower conductor118conductively couples the second via116with a third via116in a second, different pair202of the vias116on the first side204of the ferrite body110. The third via116extends along the first side204of the ferrite body110to a first upper conductor114. The first upper conductor114conductively couples the third via116with a fourth via116in the same set202of the vias116. The remaining vias116, upper conductors114, and lower conductors118continue to form the conductive coil200that wraps around the ferrite body110.

In the illustrated embodiment, the ferrite body110is elongated between opposite first and second ends208,210. The coil200helically wraps around the ferrite body110from at or near the first end208toward the opposite end210. The coil200has a lateral length dimension220that is measured along the length of the coil200and in a direction that is perpendicular to the thickness dimension104. The length dimension220may be measured from center lines of the vias116on opposite ends of the coil200.

The device100may be included into or connected to an electric circuit212to provide an inductive element, or inductor, to the circuit. For example, two or more of the vias116, the upper conductors114, and/or the lower conductors118may be conductively coupled to conductors214,216(e.g., wires, buses, terminals, contacts, or other conductive bodies) of the circuit. One conductor214of the circuit212can be coupled with a first via116, upper conductor114, or lower conductor118while the other conductor216of the circuit212is coupled with a second, different via116, upper conductor114, or lower conductor118. In one embodiment, the circuit212is connected to two different vias116in different pairs202of the vias116.

The device100may provide an inductive element to the circuit212that has an operator-customizable inductance characteristic. In operation, current from the circuit212flows through the coil200of the device100. At least some of the energy of the current is stored as magnetic energy in the ferrite body110. The coil200may be used to delay and/or reshape currents flowing through the circuit212, such as by filtering relatively high frequencies from the current. The amount of magnetic energy stored in the ferrite body110can represent an inductance characteristic of the device100. The inductance characteristic provided by the device100may be altered by changing a lateral distance dimension218between the contacts between the conductors214,216and the coil200. For example, the inductance of the device100may increase when the circuit212is connected to vias116(or upper conductors114and/or lower conductors118) that are farther apart from each other. Conversely, the inductance of the device100may decrease when the circuit212is connected to vias116, upper conductors114, and/or lower conductors118that are disposed closer to each other.

FIG. 18is a top view of another embodiment of the planar inductor device100shown inFIGS. 1 and 2where2coils are wrapped around the ferrite body. The device100is shown without the substrate102in order to more clearly illustrate the upper conductors114, lower conductors118, and vias116. The ferrite body110is shown in phantom so that the lower conductors118are visible. In the illustrated embodiment, the vias116are staggered so that the upper conductors114are closer to each other and the lower conductors118are closer to each other. For example, in the embodiment shown inFIG. 2, the vias116are linearly aligned with each other at the upper surface108and at the lower surface106of the substrate102.

In contrast, the vias116in the embodiment shown inFIG. 18are staggered on each side of the ferrite body110such that different groups2100,2102of the vias116are linearly aligned along different lines2104,2106. The staggering of the vias116can cause the upper conductors118to be closer to each other and/or the lower conductors114to be closer to each other, as shown inFIG. 18. The inductance or impedance per unit length of the device100may be increased by locating the upper conductors118closer to each other and/or the lower conductors114closer to each other.

FIG. 3is a top view of a planar inductor device300in accordance with another embodiment. The device300may be similar to the device100shown inFIG. 1. For example, the device300includes a substrate302having a thickness dimension400(shown inFIG. 4) that vertically extends from a lower surface402(shown inFIG. 4) to an opposite upper surface404(shown inFIG. 4). The thickness dimension400may be relatively small, such as 2.5 millimeters or less, 2.0 millimeters or less, 1.0 millimeters or less, or another distance. Alternatively, the thickness dimension400may be a larger distance. The device300also includes a ferrite body310that may be entirely disposed within the thickness dimension400of the substrate302. In one embodiment, the substrate302may include an interior cavity, such as the cavity120(shown inFIG. 1) of the substrate102(shown inFIG. 1), with the ferrite body310disposed in the cavity. Upper conductors314and lower conductors318are provided at or on upper and lower surfaces404,402(shown inFIG. 4) of the substrate302, respectively, and conductive vias316extend through the thickness dimension400of the substrate302and conductively couple the upper conductors314with the lower conductors318. Similar to the device100, the upper conductors314, the lower conductors318, and the vias316form a conductive coil320that helically wraps around the ferrite body310.

One difference between the device100shown inFIG. 1and the device300shown inFIG. 3is that the vias316are not encircled or enclosed by the substrate302throughout the thickness dimension400(shown inFIG. 4) of the substrate302. For example, the substrate302laterally extends between opposite edges322,324along a lateral direction326. The lateral direction326can be perpendicular to the vertical direction in which the thickness dimension400is measured and/or perpendicular to a center axis328of the coil320and that the coil320helically wraps around. As shown inFIG. 3, the edges322,324extend through the vias316such that the vias316are at least partially exposed along the edges322,324.

With continued reference toFIG. 3,FIG. 4is a perspective view of a portion of the inductor device300. As described above, the substrate302of the device300has the thickness dimension400that vertically extends from the lower surface402to the upper surface404. The vias316shown inFIGS. 3 and 4are plated vias. For example, the vias316are formed as holes or channels that extend through the thickness dimension400and have interior surfaces that are coated or plated with a conductive material, such as a metal or metal alloy. Alternatively, the vias316may be filled with a conductive material, such as a metal, metal alloy, or solder.

The edges322,324of the substrate302“cut,” or extend through, the vias316such that conductive interior surfaces330of the vias316are exposed. In contrast to the vias116(shown inFIG. 1) of the device100(shown inFIG. 1) that are encircled by the substrate102(shown inFIG. 1) throughout the thickness dimension104(shown inFIG. 1) of the substrate102, the vias316are exposed and not entirely encircled by the substrate302throughout the thickness dimension400of the substrate302. The exposed interior surfaces330of the vias316provide conductive castellations406of the device300. The castellations406represent conductive surfaces of the device300that are conductively coupled with the coil320formed in the substrate302along one or more of the edges322,324of the substrate302. In one embodiment, the castellations406are provided by mechanically cutting and removing portions of the vias316and the substrate302along the edges322,324to expose the edges322,324and the vias316. Alternatively, the vias316may be formed along the outer edges322,324of the substrate302without mechanically cutting portions of the substrate302. For example, semi-circle channels may be formed into the edges322,324of the substrate302and then plated with a conductive material to form the vias316shown inFIGS. 3 and 4.

Similar to the vias116shown inFIGS. 1 and 2, the castellations406conductively couple the lower conductors318(shown inFIG. 3) with the upper conductors314to form the coil320(shown inFIG. 3) that helically wraps around the ferrite body310(shown inFIG. 3). The device300may be included into or connected to an electric circuit that is similar to the electric circuit212(shown inFIG. 2) to provide an inductive element, or inductor, to the circuit. Such an electric circuit may be conductively coupled to two or more of the castellations406of the device300. The castellations406may provide locations that are more easily coupled with the electric circuit. For example, the upper and/or lower surfaces404,402may not be readily accessible and/or may be relatively difficult to access. The edges322and/or324may be exposed and/or more easily accessible for conductors (e.g., wires, busses, and the like) of the electric circuit to be conductively coupled with the castellations406. Moreover, the castellations406can provide increased conductive areas with which the electric circuit may couple. For example, instead of coupling the electric circuit212with the portions of the vias116that are at or near the upper and/or lower surfaces108,106of the substrate102, the electric circuit212may couple with a much larger conductive area of the castellations406along the edges322,324of the device300. The larger conductive area of the castellations406can provide decreased electrical resistance between the coil320and the electric circuit.

Similar to the device100(shown inFIG. 1), the device300may provide an inductive element to the circuit212(shown inFIG. 2) that has an operator-customizable inductance characteristic. Similar to the inductance characteristic provided by the device100, the inductance characteristic of the device300may be customized based on which castellations406are used to couple the coil320with the circuit212. The inductance of the device300may increase when the circuit212is connected to castellations406located farther from each other or decrease when the circuit212is connected to castellations406located closer to each other. The ability to use different castellations406can provide for increased tenability of high precision inductors that may be used or required for filters, diplexers, multiplexers, or baluns. During a back end test, and as ferrites may vary by +/−20% in ferrite permeability, the castellations406can allow for binning depending on the value of the nominal inductance of the device300. For example, if the device300having a predetermined number of turns of the coil320around the ferrite body310, but the inductance of the device300is lower than expected due to variation in the permeability of the ferrite body310(e.g., a lower than expected permeability), then a user of the device300can use different castellations406to electrically couple a circuit with the device300. The user may select other castellations406that can provide increased inductance of the device300. For example, the user may use castellations406that are disposed farther apart. In one embodiment, the user can connect to the castellation406or castellations406that increase the inductance of the device300based on the number of additional turns of the coil320that are disposed between the selected castellations406. As one example, the inductance of the device300may be proportional to n2, where “n” represent the number of turns, or times that the coil320helically wraps around the ferrite body300. If the user selects castellations406that are located such that there are 10 turns of the coil320between the castellations406and then changes one of the castellations406such that 9 turns of the coil320are between the selected castellations406, then the inductance of the device300may be reduced by 20%.

FIG. 5is a top view of a planar inductor device500in accordance with another embodiment.FIG. 6is a side view of the device500. The device500may be similar to the device100shown inFIG. 1. For example, the device500includes a substrate502having a thickness dimension504that vertically extends from a lower surface506to an opposite upper surface508. The thickness dimension504may be relatively small, such as 2.5 millimeters or less, 2.0 millimeters or less, 1.0 millimeters or less, or another distance. Alternatively, the thickness dimension504may be a larger distance. The device500also includes a ferrite body510that may be entirely disposed within the thickness dimension504of the substrate502. In one embodiment, the substrate502may include an interior cavity, such as the cavity120(shown inFIG. 1) of the substrate102(shown inFIG. 1), with the ferrite body510disposed in the cavity. Conductive vias516extend through the thickness dimension504of the substrate502.

The device500includes upper conductors514that conductively couple the vias516along or across the upper surface508of the substrate502and lower conductors518that conductively couple the vias516along or across the lower surface506of the substrate502. Similar to the device100, the upper conductors514, the lower conductors518, and the vias516form a conductive coil520that helically wraps around the ferrite body310.

One difference between the device100shown inFIG. 1and the device500shown inFIGS. 5 and 6is that the upper and lower conductors514,518are wires, such as wire bonds, instead of conductive layers or traces that are deposited onto the substrate502. For example, the upper conductors514and/or the lower conductors518may be elongated strands, wires, filars, and the like, that are coupled to the vias516. In one embodiment, the upper and/or lower conductors514and/or518may be wires that are soldered across the ferrite body510. The upper and lower conductors514,518are coupled to the vias516to provide the coil520that helically wraps around the ferrite body510. The upper and lower conductors514,518are separated from the upper and lower surfaces508,506of the substrate502such that the upper and lower conductors514,518do not contact the substrate502. The upper and lower conductors514,518may be used in place of or in addition to the upper and lower conductors114,118(shown inFIG. 1) to reduce an electric resistance characteristic of the coil520and/or to allow for a wirebonding method to be used to provide the upper and/or lower conductors514,518. In one embodiment, the upper and/or lower surfaces508,506of the substrate502can be protected with a dielectric overmold layer or similar type of material that covers the wire bonds and conductors and protects the device500.

FIG. 7is a schematic view of a planar inductor device1000in accordance with another embodiment. The device1000includes a conductive pathway1002and a ferrite body1016. In the illustrated embodiment, the ferrite body1016has a toroid or anulus shape such that the ferrite body1016extends around and encircles an opening1014. Alternatively, the ferrite body1016may have another shape, such as a polygon having an opening.

The conductive pathway1002is shown as including a plurality of interconnected sections, including an input section1004, a current-splitting section1006, a coil section1008, a current-combining section1010, and an output section1012. The sections1004,1006,1008,1010,1012may be conductively coupled with each other to form the conductive pathway1002through which electric current may flow from the input section1004to the output section1012. In the illustrated embodiment, the input section1004extends to the current-splitting section1006. The current-splitting section1006extends from the input section1004to the coil section1008. The coil section1008extends from the current-splitting section1006to the current-combining section1010. The current-combining section1010extends from the coil section1008to the output section1012. The input section1004and the output section1012may be conductively coupled with an electronic circuit (e.g., the circuit212shown inFIG. 2) in order to provide an inductive element, such as an inductor, to the circuit. The input section1004may receive current from the circuit and the output section1012may convey the current to the circuit (or to another circuit or component).

The input section1004of the conductive pathway1002is oriented toward the opening1014of the ferrite body1016. In the illustrated embodiment, the input section1004is disposed above the ferrite body1016, or is disposed closer to the viewer ofFIG. 7than the ferrite body1016. The conductive pathway1002splits into a plurality of conductive coils1018in the current-splitting section1006, as shown inFIG. 7. While the conductive pathway1002is split into two coils1018in the illustrated embodiment, alternatively, the conductive pathway1002may be split into three or more coils1018. The coils1018in the current-splitting section1006extend below the ferrite body1016and encircle or helically wrap around the ferrite body1016in the coil sections1008.

Each of the coils1018may have similar or equivalent dimensions and/or be formed from the same material as the conductive pathway1002in the input section1004. For example, each coil1018may be formed from the same material and/or have the same cross-sectional diameter as the conductive pathway1002in the input section1004. Each of the coils1018includes a single turn1020around the ferrite body1016in the illustrated embodiment. Alternatively, one or more of the coils1018may wrap around the ferrite body1016multiple times to form multiple turns1020around the ferrite body1016. The coils1018form parallel inductive elements of the device1000. For example, each coil1018provides an inductor comprising a conductive pathway1002that wraps around the ferrite body1016.

The conductive pathways1002in the coil sections1008combine with each other in the current-combining section1010. The conductive pathways1002combine into a combined conductive pathway1002in the current-combining section1010, with the combined conductive pathway1002extending below the ferrite body1016to the output section1012. Alternatively, the conductive pathways1002in the coil section1008may combine into the combined conductive pathway1002that extends above the ferrite body1016. The conductive pathway1002in the output section1012is oriented away from the ferrite body1016.

In operation, the device1000may be used to provide an inductive element to an electric circuit. The device1000may have a lower electric resistance characteristic and/or a larger inductance characteristic relative to inductive elements having a single conductive pathway that wraps around a ferrite body. For example, the conductive pathway1002in the input section1004may convey an electric current (I) into the device1000. The current (I) is divided between and conveyed along the multiple conductive pathways1002formed in the current-dividing section1006. The current (I) can be divided among the multiple conductive pathways1002in the current-dividing section1006into current fractions. In the illustrated embodiment, the current (I) is divided into a first current fraction (I1) and a second current fraction (I2). The first and second current fractions (I1, I2) may be equal or approximately equal. Alternatively, the first and second current fractions (I1, I2) may differ from each other. The conductive pathway1002can be divided into more conductive pathways1002in the current-splitting section1006to further divide the current (I) into more current fractions.

The current fractions (I1, I2) are separately conveyed around the ferrite body1016by the coils1018of the conductive pathways1002. Each of the current fractions (I1, I2) is smaller than the total current (I). For example, the current fractions (I1, I2) may be related to the total current (I) as follows:
I=I1+I2(Equation #1)
where I represents the total current flowing through the device1000, I1represents the first current fraction, and I1represents the second current fraction. A resistance characteristic (Ω) of the conductive pathway1002and/or one or more of the coils1018may be based on the current flowing through the conductive pathway1002or coils1018according to the following relationship:

R=VIN(Equation⁢⁢#2)
where R represents an electric resistance characteristic of the conductive pathway1002or coil1018, such as resistance or impedance, V represents a voltage or energy characteristic of the current flowing through the conductive pathway1002or coil1018, and INrepresents the current (e.g., the total current (I), the first current fraction (I1), or the second current fraction (I2)) flowing through the corresponding conductive pathway1002or coil1018).

When the total current (I) flowing through the conductive pathway1002is divided up into the current fractions (I1, I2) that separately flow through the parallel coils1018, the resistance characteristic (R) of each of the coils1018can decrease relative to the conductive pathway1002. For example, the resistance for the current (I) flowing through the conductive pathway1002may be halved, or reduced by up to 50%, for the first and/or second current (I1, I2) flowing through the parallel first and second coils1018. Reducing the resistance characteristic (R) in the coils1018can reduce power losses in the current (I) as the current (I) flows through the device1000. As described below, the resistance characteristic (R) can be decreased in the device1000without an accompanying loss in an inductance characteristic (L) of the device1000.

Arrows1022indicate the direction in which the current (I) and current fractions (I1, I2) flow through the device1000. As the current fractions (I1, I2) flow around the ferrite body1016, the current fractions (I1, I2) generate first and second magnetic fluxes (ΦB1, ΦB2) in the ferrite body1016. The magnetic fluxes (ΦB1, ΦB2) may be based on a number of factors, such as the number of turns1020(N) of the coils1018around the ferrite body1016, the magnetic permeability (μ0) of the ferrite body1016, the cross-sectional area (A) of the conductive pathways1002within the coils1018, the radius (R) of the turn1020formed by the coil1018, and the current fractions (I1, I2) flowing through the coils1018. In one embodiment, the magnetic fluxes (ΦB1, ΦB2) may be based on the following relationships:

ΦB1≈N·μ0⁢NA2⁢π⁢⁢R·I1(Equation⁢⁢#3)ΦB2≈N·μ0⁢NA2⁢π⁢⁢R·I2(Equation⁢⁢#4)
where ΦB1represents the first magnetic flux, ΦB2represents the second magnetic flux, N represents the number of turns1020around the ferrite body1016, A represents the cross-sectional area of the conductive pathway1002in the coil1018, R represents the radius of curvature of the coil1018, μ0represents the magnetic permeability of the ferrite body1016, I1represents the first current fraction, and I2represents the second current fraction. The above equations may represent approximations of the magnetic fluxes (ΦB1, ΦB2) and not actual relationships used to determine an exact value of the magnetic fluxes (ΦB1, ΦB2). For example, Equations #1 and 2 may indicate which terms in the Equations are proportional, inversely proportional, and the like, with the magnetic fluxes (ΦB1, ΦB2).

The directions in which the magnetic fluxes (ΦB1, ΦB2) flow in the ferrite body1016are based on the direction of flow of the current fractions (I1, I2) through the coils1018of the conductive pathways1002. For example, as shown inFIG. 7, the first magnetic flux (ΦB1) generated by the first current fraction (I1) is oriented in the direction of arrow1024while the second magnetic flux (ΦB2) generated by the second current fraction (I2) is oriented in the direction of the arrow1026. Due to the direction of current flow and the directions in which the coils1018wrap around the ferrite body1016, the magnetic fluxes (ΦB1, ΦB2) are additive. For example, the magnetic fluxes (ΦB1, ΦB2) may add together and increase a total magnetic flux (ΦB) of the device1000, rather than decrease the total magnetic flux (ΦB) of the device1000. The total magnetic flux (ΦB) of the device1000may be represented by the following relationship:
ΦB=ΦB1+ΦB2(Equation #5)
where ΦBrepresents the total magnetic flux, ΦB1represents the first magnetic flux, and ΦB2represents the second magnetic flux.

The device1000can provide an inductor having an inductance characteristic (L). The inductance characteristic (L) represents the magnetic energy generated by the device1000when the current (I) flows through the device1000. In one embodiment, the inductance characteristic (L) of the device1000is represented by the following relationship:

L=ΦBI(Equation⁢⁢#5)
where L represents the inductance characteristic of the device1000, I represents the current flowing through the conductive pathways1002of the device1000, and ΦBrepresents the total magnetic flux generated in the ferrite body1016of the device1000caused by the flow of current (I) through the device1000.

As described above, a resistance characteristic (R) of the device1000can be reduced by providing a plurality of the parallel coils1018and dividing the current (I) into divided currents (I1, I2) that separately flow through the parallel coils1018. The resistance characteristic (R) can represent the total electric impedance or resistance of the conductive pathway1002and coils1018in the device1000. The resistance characteristic (R) can be reduced relative to other inductors or inductive elements having the same or approximately the same inductance characteristic (L) as the device1000. For example, the device1000may have approximately the same inductance, but a lower resistance, as another device having a single conductive pathway1002that does not include parallel coils1018but helically wraps around the ferrite body1016for a single turn1020. The parallel coils1018enable the device1000to provide the same or approximately the same inductance characteristic (L) without an increase or significant increase in the resistance characteristic (R) of the device1000.

FIG. 8is a perspective view of a planar inductor device1100in accordance with another embodiment.FIG. 9is a top view of the device1100. The device1100may be similar to the device1000that is schematically shown inFIG. 7. For example, the device1100may include a conductive pathway that extends toward a ferrite body, includes or is divided into parallel coils that helically wrap around the ferrite body, and recombines the parallel coils into the conductive pathway that extends out of the ferrite body.

In the illustrated embodiment, the device1100is embedded within a planar substrate1102(shown inFIG. 8). The substrate1102may be a flexible and non-rigid sheet, such as a sheet of cured epoxy, or a rigid or semi-rigid board, such as a printed circuit board (PCB) formed of FR-4. The substrate1102is shown in phantom view inFIG. 8and is not shown inFIG. 9. The substrate1102vertically extends from a lower surface1104(shown inFIG. 8) to an opposite upper surface1106(shown inFIG. 8). The substrate1102has a thickness dimension1108(shown inFIG. 8) that is measured from the lower surface1104to the upper surface1106along a vertical direction1120(shown inFIG. 8) that is oriented perpendicular to the upper surface1106. The thickness dimension1108may be relatively small, such as 2.5 millimeters or less, 2.0 millimeters or less, 1.0 millimeters or less, or another distance. Alternatively, the thickness dimension1108may be a larger distance.

The device1100includes an input conductor1110that receives electric current into the device1100. In the illustrated embodiment, the input conductor1110is formed as a planar conductive body. The input conductor1110may be deposited as a planar conductive trace on one or more sub-layers of the substrate1102(shown inFIG. 8) that are disposed between the upper surface1106(shown inFIG. 8) and the lower surface1104(shown inFIG. 8). A conductive bus1112and/or a conductive bus1114(shown inFIG. 8) may be coupled with the input conductor1110and exposed at or along the upper surface1106and the lower surface1104, respectively, of the substrate1102. Conductive vias1122can couple the buses1112,1114with each other. Multiple vias1122can be added to reduce electrical resistance for the device1100. In some instances, the vias1122can be filled with thermally conductive paste or electrically conductive paste to reduce electrical resistance and/or increase thermal conductivity of the device1100. Alternatively, the input conductor1110may be located on the upper surface1106or lower surface1104of the substrate1102. The conductive bus1112and/or1114may receive electric current from an electric circuit, such as from a wire or other conductive body that is coupled with the circuit, and convey the current to the input conductor1110.

A ferrite body1116is disposed within the substrate1102in the illustrated embodiment. The ferrite body1116is shown in phantom inFIG. 8. The ferrite body1116can be entirely located within the substrate1102such that no part of the ferrite body1116extends above or projects through a plane defined by the upper surface1106(shown inFIG. 8) of the substrate1102and/or a plane defined by the lower surface1104of the substrate1102(shown inFIG. 8). The ferrite body1116can have a toroid or anulus shape similar to the shape of the ferrite body1016shown inFIG. 7. Alternatively, the ferrite body1116can have a different shape. The ferrite body1116includes an opening1118that is similar to the opening1014of the ferrite body1016shown inFIG. 7.

As shown inFIG. 9, the input conductor1110extends above the ferrite body1116and at least a portion of the opening1118in the ferrite body1116. For example, at least part of the input conductor1110may be located between the ferrite body1116and the upper surface1106(shown inFIG. 8) of the substrate1102(shown inFIG. 8) along or parallel to the vertical direction1120(shown inFIG. 8) and at least part of the input conductor1110may be between the opening1118and the upper surface1106of the substrate1102along the vertical direction1120. Alternatively, at least part of the input conductor1110may be located between the ferrite body1116and the lower surface1104(shown inFIG. 8) of the substrate1102along or parallel to the vertical direction1120and at least part of the input conductor1110may be between the opening1118and the lower surface1104of the substrate1102along the vertical direction1120.

One or more conductive input vias1124are coupled with the input conductor1110. The input vias1124include holes or channels that extend through the substrate1102(shown inFIG. 8) that are plated or substantially filled with a conductive material (e.g., a metal, metal alloy, or conductive solder). As shown inFIG. 9, the input vias1124are disposed within the opening1118of the ferrite body1116. In the illustrated embodiment, the device1100includes seven input vias1124. Alternatively, a smaller or larger number of input vias1124may be provided. The input vias1124can vertically extend through the substrate1102from the input conductor1110toward the lower surface1104(shown inFIG. 8) of the substrate1102. In the illustrated embodiment, the input conductor1110and the input vias1124can provide a portion of the conductive pathway1002that is represented by the input section1004inFIG. 7. For example, the input conductor1110and the input vias1124may provide a conductive pathway that extends toward and into the opening1118of the ferrite body1116. The input conductor1110and the input vias1124may convey the electric current (I) described above in connection withFIG. 7into the device1100.

The device1100includes a current-splitting conductor1126that is conductively coupled with the input vias1124. The input vias1124conductively couple the input conductor1110with the current-splitting conductor1126. In the illustrated embodiment, the current-splitting conductor1126is formed as a planar conductive body. The current-splitting conductor1126may be deposited as a planar conductive trace on one or more sub-layers of the substrate1102(shown inFIG. 8) that are disposed between the upper surface1106(shown inFIG. 8) and the lower surface1104(shown inFIG. 8). Alternatively, the current-splitting conductor1126may be located on the upper surface1106or lower surface1104of the substrate1102.

In the illustrated embodiment, the current-splitting conductor1126extends below the ferrite body1116and at least a portion of the opening1118in the ferrite body1116. For example, at least part of the current-splitting conductor1126may be located between the ferrite body1116and the lower surface1104(shown inFIG. 8) of the substrate1102(shown inFIG. 8) along or parallel to the vertical direction1120(shown inFIG. 8) and at least part of the current-splitting conductor1126may be between the opening1118and the lower surface1104of the substrate1102along the vertical direction1120. As shown inFIG. 8, the input conductor1110and the current-splitting conductor1126are disposed on opposite sides of the ferrite body1116.

One or more conductive current-splitting vias1128,1130are coupled with the current-splitting conductor1126. The current-splitting vias1128,1130include holes or channels that extend through the substrate1102(shown inFIG. 8) and that are plated or substantially filled with a conductive material (e.g., a metal, metal alloy, or conductive solder). As shown inFIG. 9, the current-splitting vias1128,1130are disposed outside of the ferrite body1116. For example, the current-splitting vias1128,1130are not located inside the opening1118of the ferrite body1116in the illustrated embodiment. The current-splitting vias1128are grouped in a first set1200(shown inFIG. 9) on one side of the ferrite body1116while the current-splitting vias1130are grouped in a different second set1202(shown inFIG. 9) that is spaced apart from the first set1200on the opposite side of the ferrite body1116. As shown inFIG. 9, the first and second sets1200,1202may include non-overlapping groups of the current-splitting vias1128,1130. For example, the first and second sets1200,1202may not share or include one or more of the same current-splitting vias1128,1130. Alternatively, the current-splitting vias1128and/or1130may be grouped into a different number of sets1200,1202.

In the illustrated embodiment, the device1100includes ten current-splitting vias1128,1130with five current-splitting vias1128or1130in each set1200,1202(shown inFIG. 9) disposed on opposite sides of the ferrite body1116. Alternatively, a different number of current-splitting vias1128and/or1130may be provided. The current-splitting vias1128,1130vertically extend through the substrate1102(shown inFIG. 8) from the current-splitting conductor1126toward the upper surface1106(shown inFIG. 8) of the substrate1102. In the illustrated embodiment, the current-splitting conductor1126and the current-splitting vias1128,1130can provide a portion of the conductive pathway1002(shown inFIG. 7) that is represented by the current-splitting section1006inFIG. 7. For example, the current-splitting conductor1126and the current-splitting vias1128,1130may provide the plurality of conductive pathways1002that are coupled with and split off of the conductive pathway1002in the input section1004ofFIG. 7. The current-splitting conductor1126and the current-splitting vias1128,1130may divide the electric current (I) received from the input conductor1110and the input vias1124into the first and second current fractions (I1and I2).

The device1100includes a current-combining conductor1134that is conductively coupled with the separate sets1200,1202(shown inFIG. 9) of the current-splitting vias1128,1130. The current-splitting vias1128,1130conductively couple the current-splitting conductor1126with the current-combining conductor1134. In the illustrated embodiment, the current-combining conductor1134is formed as a planar conductive body. The current-combining conductor1134may be deposited as a planar conductive trace on one or more sub-layers of the substrate1102(shown inFIG. 8) that are disposed between the upper surface1106(shown inFIG. 8) and the lower surface1104(shown inFIG. 8). Alternatively, the current-combining conductor1134may be located on the upper surface1106or lower surface1104of the substrate1102.

In the illustrated embodiment, the current-combining conductor1134extends above the ferrite body1116and at least a portion of the opening1118in the ferrite body1116. For example, at least part of the current-combining conductor1134may be located between the ferrite body1116and the upper surface1106(shown inFIG. 8) of the substrate1102(shown inFIG. 8) along or parallel to the vertical direction1120(shown inFIG. 8) and at least part of the current-combining conductor1134may be between the opening1118and the upper surface1106of the substrate1102along the vertical direction1120. As shown inFIG. 8, the current-splitting conductor1126and the current-combining conductor1134are disposed on opposite sides of the ferrite body1116.

One or more conductive current-combining vias1132are coupled with the current-combining conductor1134and the current-splitting conductor1126. The current-combining vias1132include holes or channels that extend through the substrate1102(shown inFIG. 8) and that are plated or substantially filled with a conductive material (e.g., a metal, metal alloy, or conductive solder). As shown inFIG. 9, the current-combining vias1132are disposed inside the ferrite body1116. For example, the current-combining vias1132are located inside the opening1118of the ferrite body1116. In the illustrated embodiment, the device1100includes seven current-combining vias1132. Alternatively, a different number of current-combining vias1132may be provided.

In one embodiment, holes or interior cavities in the substrate1102(shown inFIG. 8) are preformed or premade. For example, the holes or cavities may be formed when the substrate1102is created. The holes or cavities can include posts that are positioned and shaped within the holes or cavities for the ferrite body1116to reside on. The ferrite body1116can be mechanically shaken into position within the substrate1102and on top of the post in a hole or cavity by using a tapered insert that guides the ferrite body1116into the hole. Alternatively, the ferrite body1116can be placed into the hole and on the post with a pick-and-place machine. The post can provide a supporting framework for the structure. In one embodiment, a low stress or ultra low-stress material, such as silicone, can be inserted into the hole or cavity and surround the ferrite body1116. In one embodiment, if the device1110is used for relatively high voltage and/or current applications, a special grade material may be used for substrate and/or post. The material can have relatively low amounts of halogens and/or be relatively glass bundle-free for increased reliability, as well as providing an encapsulation around the ferrite body1116that is hermetic or near hermetic. Examples of such a material can include liquid crystalline polymer (LCP) and/or teflon. The vias1132can extend through the substrate1102and/or the low-stress material around the ferrite body1116and may carry relatively large amounts of electric power. The substrate1102can provide relatively high electric isolation between the vias1132even in the presence of moisture and high temperatures.

The current-combining conductor1134and the current-combining vias1132can provide a portion of the conductive pathway1002(shown inFIG. 7) that is represented by the current-combining section1010inFIG. 7. For example, the current-combining conductor1134and the current-combining vias1132may combine the first and second current fractions (I1, I2) that are separately conveyed through the current-splitting vias1128,1130around the ferrite body1116to the current-combining conductor1134.

The device1100includes an output conductor1136that receives the current (I) that is combined from the first and second current fractions (I1, I2) by the current-combining conductor1134. In the illustrated embodiment, the output conductor1136is formed as a planar conductive body. The output conductor1136may be deposited as a planar conductive trace on one or more sub-layers of the substrate1102(shown inFIG. 8) that are disposed between the upper surface1106(shown inFIG. 8) and the lower surface1104(shown inFIG. 8).

As shown inFIG. 9, the output conductor1136extends below the ferrite body1116and at least a portion of the opening1118in the ferrite body1116. For example, at least part of the output conductor1136may be located between the ferrite body1116and the lower surface1104(shown inFIG. 8) of the substrate1102(shown inFIG. 8) along or parallel to the vertical direction1120(shown inFIG. 8) and at least part of the output conductor1136may be between the opening1118and the lower surface1104of the substrate1102along the vertical direction1120. Alternatively, at least part of the output conductor1136may be located between the ferrite body1116and the upper surface1106(shown inFIG. 8) of the substrate1102along or parallel to the vertical direction1120and at least part of the output conductor1136may be between the opening1118and the upper surface1106of the substrate1102along the vertical direction1120.

A conductive bus1138and/or a conductive bus1140(shown inFIG. 8) may be coupled with the output conductor1136and exposed at or along the lower surface1104and the upper surface1106, respectively, of the substrate1102. Conductive vias1142can couple the buses1138,1140with each other. Alternatively, the output conductor1136may be located on the upper surface1106or lower surface1104of the substrate1102. The conductive bus1138and/or1140outputs the electric current (I) that is combined from the first and second current fractions (I1, I2) from the device1100. A circuit may be conductively coupled with one or more of the busses1138,1140to receive the combined current (I).

In operation, the device1100receives electric current (I) from an electric circuit and conveys the current (I) along the input conductor1110to the input vias1124. The input vias1124convey the current (I) through the opening1118in the ferrite body1116. The current (I) flows through the input vias1124to the current-splitting conductor1126. The current-splitting conductor1126divides the current (I) into the first and second current fractions (I1, I2). The first current fraction (I1) is conveyed by the first set1200of current-splitting vias1128outside of the ferrite body1116and the second current fraction (I2) is conveyed by the second set1202of current-splitting vias1130outside of the ferrite body1116. The current-splitting vias1128,1130conduct the current fractions (I1, I2) to the current-combining conductor1134. The flow of the current fractions (I1, I2) through the current-splitting conductor1126and the current-splitting vias1128,1130to the current-combining conductor1134approximately follows the flow of current through coils that helically encircle the ferrite body1116. The current fractions (I1, I2) are received by the current-combining conductor1134and combined into the current (I). The current (I) is conveyed from the current-combining conductor1134to the output conductor1136by the current-combining vias1132.

FIG. 10is a perspective view of a planar inductor device1300in accordance with another embodiment. The device1300may be similar to the device1100shown inFIGS. 8 and 9. For example, the device1300may include the busses1112,1114,1138,1140, the conductors1110,1126,1134,1136, the vias1124,1128(shown inFIG. 9),1130,1132, and/or the ferrite body1116embedded in the substrate1102. One difference between the device1100and the device1300is that the device1300may include additional conductive pathways1302,1304. In the illustrated embodiment, the conductive pathways1302,1304represent wires that are coupled with the device1300by wire bonding. Alternatively, the conductive pathways1302,1304may represent other conductors, such as conductive traces, busses, and the like.

The conductive pathways1302are coupled with the bus1112and one or more of the input conductor1110and/or the input vias1124. In one embodiment, the conductive pathways1302are wire bonds that are coupled to the bus1112and the interfaces between the input conductor1110and the input vias1124. The conductive pathways1302provide additional pathways for the current (I) to be conveyed from the bus1112to the input vias1124. As shown inFIG. 10, current (I) that is received by the bus1112can be conveyed to the input vias1124by the input conductor1110and the conductive pathways1302. Providing the conductive pathways1302can reduce the resistance of the path that the current (I) experiences and/or power losses that may otherwise occur when the current (I) flows to the input vias1124. Although not shown inFIG. 10, conductive pathways that are similar to the conductive pathways1302and/or1304may be joined to one or more of the conductors1126,1136,

The conductive pathways1304are coupled with the current-combining conductor1134in a plurality of locations. For example, the conductive pathways1304may be coupled to the interfaces between the current-combining conductor1134and the current-combining vias1132and coupled to the current-combining conductor1134in locations that are spaced apart from the interfaces between the current-combining conductor1134and the current-combining vias1132. The conductive pathways1304provide additional pathways for the current fractions (I1, I2) to be conveyed from the current-combining conductor1134to the current-combining vias1132. Providing the conductive pathways1304can reduce the resistance of the path that the current fractions (I1, I2) experience and/or power losses that may otherwise occur when the current fractions (I1, I2) are combined into the current (I) by the current-combining conductor1134and/or the current-combining vias1132.

FIGS. 21 through 23illustrate different techniques for conductively coupling conductors and/or conductive layers in one or of the embodiments described herein. For example, the techniques illustrated inFIGS. 21 through 23may be used to conductively couple two or more of the conductors1110,1126,1134,1136(shown inFIG. 8) of the device1100(shown inFIG. 8) and/or of the device1300(shown inFIG. 10).

With respect toFIG. 21, conductive layers or conductors2400,2402and conductive layers or conductors2404,2406are coupled with each other using conductive microvias2408. In another embodiment, conductive couplings between conductive layers or conductors2400,2402and/or between conductive layers or conductors2404,2406disposed on different layers of a substrate can represent portions of through holes that extend through the entire thickness of the substrate. The view shown inFIG. 21is an exploded view with the conductors2400,2402separated from the conductors2404,2408. The conductors2400,2404may be edge-coupled conductors that are joined along edges2410,2412that face each other and the conductors2402,2406may be edge-coupled and/or offset broadside coupled conductors that are joined along edges2414,2416that face each other. The coupling of the conductors2400,2402and of the conductors2404,2406with the microvias2408can increase the amount of electric current that may be conveyed using the conductors2400,2402,2404,2406and/or can modify inductive coupling between the conductors2400,2402,2404,2406.

With respect toFIG. 22, conductive layers or conductors2500,2502,2504are conductively coupled in a plurality of manners. The view shown inFIG. 22is an exploded view with the conductors2502,2504separated from the conductor2500. For example, the conductor2500can be edge-coupled with the conductors2502,2504. The conductors2502,2504are conductively coupled with each other by a wire bond2506.

With respect toFIG. 23, conductive layers or conductors2600,2602are edge-coupled conductors. The view shown inFIG. 23is an exploded view with the conductors2600,2602separated from each other. Each of the conductors2600,2602includes a wire bond2604,2606that is coupled with the corresponding conductor2600,2602in a plurality of locations. The addition of the wire bonds2604,2606can increase the current-carrying capability of the conductors2600,2602.

FIG. 11is a top view of a ferrite body1400in accordance with one embodiment. The ferrite body1400may be used as the ferrite body in one or more embodiments described herein. For example, the ferrite body1400may be used as the ferrite body110(shown inFIG. 1), the ferrite body310(shown inFIG. 3), the ferrite body510(shown inFIG. 5), the ferrite body1016(shown inFIG. 7), or the ferrite body1116(shown inFIG. 8). With respect to the ferrite bodies110,310,510, these bodies110,310,510may represent a section or portion of the ferrite body1400. For example, one or more of the ferrite bodies110,310,510may represent a subsection of the ferrite body1400shown inFIG. 11.

The ferrite body1400may include, or be formed from, a metal and/or a magnetic material. In one embodiment, the ferrite body1400includes, or is formed from, a relatively soft ferrite such as NiZn or MnZn. Alternatively, a different metal or metal alloy may be used. The ferrite body1400has a toroid or anulus shape that encircles a central opening1402in the illustrated embodiment. Alternatively, the ferrite body1400may have another shape. The ferrite body1400is divided into a plurality of sections1404,1406. For example, the ferrite body1400may have two U-shaped sections1404,1406, with the section1404extending along an arcuate path between opposite ends1408,1410and the section1406extending along an arcuate path between opposite ends1412,1414.

In the illustrated embodiment, the ends1408,1410of the section1404face the ends1412,1414of the section1406. The ends1408and1412and the ends1410and1414are separated from each other by a buffer layer1416. The buffer layers1416separate the sections1404,1406from each other. The buffer layers1416may be formed from a non-conductive and/or non-magnetic material. For example, the buffer layers1416may be formed from dielectric materials, such as epoxy.

The buffer layers1416can separate the ferrite body1400into the sections1404,1406to reduce saturation of the ferrite body1400. For example, when one or more conductive coils helically wrap around the ferrite body1400and convey current around the ferrite body1400(such as in one or more of the devices100,300,500,1000,1100,1300shown and described above), the current may generate sufficiently high magnetic flux in the ferrite body1400that the ferrite body1400becomes saturated. The ferrite body1400may be saturated when further increases in the electric current that is conveyed in conductive coils encircling the ferrite body do not result in a corresponding increase in the magnetic flux in the ferrite body1400. The buffer layers1416separate the sections1404,1406of the ferrite body1400such that magnetic flux in the ferrite body1400cannot flow between the sections1404,1406. As a result, the magnetic flux in the ferrite body1400may be decreased for relatively large current flowing around the ferrite body1400.

In one embodiment, the ferrite body1400is cut into the sections1404,1406after the ferrite body1400is disposed within a substrate. For example, after an electric circuit is formed that includes a conductive coil helically wrapped around the ferrite body1400, a punch machine or saw plate can be used to cut through a portion of ferrite body1400that is already embedded in a substrate with relatively high precision and accuracy. There can be one or numerous cuts through the ferrite body1400. For example, the ferrite body1400may be embedded into a substrate in a manner as described in U.S. patent application Ser. No. 13/028,949, which is entitled “Planar Electronic Device Having A Magnetic Component And Method For Manufacturing The Electronic Device” and was filed on 16 Feb. 2011 (referred to herein as the “'949 Application”). The entire disclosure of the '949 Application is incorporated by reference herein in its entirety. In connection with the description of the '949 Application, the ferrite body1400may be embedded in the encapsulating material304of the substrate104of the '949 Application in a manner similar to the ferrite body200of the '949 Application.

In another embodiment, mechanically pressure may be applied to the substrate that includes the ferrite body1400to create cracks or fractures in the ferrite body1400. For example, pressure may be applied to provide enough force that the ferrite body1400develops a fixed amount of hairline cracks through the ferrite body1400. Because the ferrite body1400is a continuous shape in the illustrated embodiment, the application of pressure may develop cracks on opposite ends of the ferrite body1400to convert the ferrite body1400from a continuous to non-continuous body.

FIG. 12is a top view of a multilayer planar inductor device1500in accordance with one embodiment. Similar to the substrate102(shown inFIG. 1) of the device100(shown inFIG. 1), the device1500includes a substrate1502having a thickness dimension that vertically extends from a lower surface (not shown inFIG. 12) that is similar to the lower surface106(shown inFIG. 1) to an opposite upper surface1504. The thickness dimension may be relatively small, such as 2.5 millimeters or less, 2.0 millimeters or less, 1.0 millimeters or less, or another distance. Alternatively, the thickness dimension may be a larger distance. The substrate1502can be formed from a plurality of dielectric layers1700(shown inFIG. 14) that are vertically stacked on top of each other. As shown inFIG. 12, the dielectric layers1700can be oriented parallel to each other. The device1500includes a ferrite body1506that may be entirely disposed within the thickness dimension of the substrate1502. In the illustrated embodiment, the ferrite body1506has a toroid or anulus shape that extends around an interior opening1508. Alternatively, the ferrite body1506may have a different shape.

With continued reference toFIG. 12,FIG. 13is a perspective view of the device1500with the substrate1502not shown inFIG. 13.FIG. 14is an exploded view of the device1500. The ferrite body1506is not shown inFIG. 14. The substrate1502may be a multilayer body that includes several dielectric layers1700(shown inFIG. 14) that are sandwiched on one another. For example, the substrate1502may include several layers of FR-4 and/or epoxy material that form the various dielectric layers1700. The dielectric layers1700are individually referred to with the reference number1700and are individually referred to by the reference numbers1700A,1700B,1700C, and1700D. While only four dielectric layers1700are shown inFIG. 14, alternatively, several more dielectric layers1700may be provided. For example, a plurality of dielectric layers1700may be provided between the dielectric layers1700A and1700B, between the dielectric layers1700B and1700C, and/or between the dielectric layers1700C and1700D. In the illustrated embodiment, several dielectric layers1700are provided between the dielectric layers1700B and1700C. The dielectric layers1700between the dielectric layers1700B and1700C may include openings to form a cavity that receives the ferrite body1506, as described above.

The device1500includes several conductors1510,1600,1602,1604and conductive vias1512,1514,1606,1608. The conductors1510,1600,1602,1604are shown as conductive layers, such as conductive traces. Alternatively, and as described below, the conductors1510,1600,1602,1604may include one or more other conductive bodies, such as wire bonds. The conductors1510may be referred to as outer upper conductors1510that are disposed at or near the upper surface1504(shown inFIG. 12) of the substrate1502. For example, the outer upper conductors1510may include conductive traces that are deposited on the upper surface1504of the substrate1502or on the dielectric layer1700A that is located beneath the upper surface1504. The outer upper conductors1510are generally referred to by the reference number1510and are individually referred to by the reference numbers1510A,1510B,1510C, and so on. In one embodiment, one or more of the conductors1510,1600,1602,1604can be combined with wire bonds and/or replaced with wire bonds, similar to as described below in connection withFIGS. 15,19, and/or20. The conductors1602may be referred to as outer lower conductors1602that are disposed at or near the lower surface of the substrate1502(shown inFIG. 12), such as at or near the lower surface106(shown inFIG. 1) of the substrate102(shown inFIG. 1). For example, the outer lower conductors1602may include conductive traces that are deposited on the lower surface of the substrate1502or on the dielectric layer1700D that is located above the lower surface. The outer lower conductors1602are generally referred to by the reference number1602and are individually referred to by the reference numbers1602A,1602B,1602C, and so on.

The conductors1600may be referred to as inner upper conductors1600that are disposed within the substrate1502. For example, the inner upper conductors1600may include conductive traces that are deposited on the dielectric layer1700B, with the dielectric layer1700B disposed between the dielectric layer1700A having the outer upper conductors1510and the lower surface of the substrate1502. The inner upper conductors1600are generally referred to by the reference number1600and are individually referred to by the reference numbers1600A,1600B,1600C, and so on.

The conductors1604may be referred to as inner lower conductors1604that are disposed within the substrate1502. For example, the inner lower conductors1604may include conductive traces that are deposited on the dielectric layer1700C, with the dielectric layer1700C disposed between the dielectric layer1700D having the outer lower conductors1602and the dielectric layer1700B having the inner upper conductors1600. The inner lower conductors1604are generally referred to by the reference number1604and are individually referred to by the reference numbers1604A,1604B,1604C, and so on.

The vias1512,1514,1606,1608vertically extend through the substrate1502to conductively couple the conductors1510,1600,1602,1604. The vias1512may be referred to as a first inner set of interior vias1512that are disposed inside the opening1508of the ferrite body1506. The interior vias1512conductively couple the outer upper conductors1510with the outer lower conductors1602. The vias1514may be referred to as a first outer set of exterior vias1514that are disposed outside of the ferrite body1506. For example, the vias1512and the vias1514may be located on opposite sides of the ferrite body1506. The exterior vias1514conductively couple the outer upper conductors1510with the outer lower conductors1602. The interior vias1512are generally referred to by the reference number1512and are individually referred to by the reference numbers1512A,1512B,1512C, and so on. The exterior vias1514are generally referred to by the reference number1514and are individually referred to by the reference numbers1514A,1514B,1514C, and so on.

The vias1606may be referred to as a second inner set of interior vias1606that are disposed inside the opening1508of the ferrite body1506. The interior vias1606conductively couple the inner upper conductors1600with the inner lower conductors1604. The vias1608may be referred to as a second outer set of exterior vias1608that are disposed outside of the ferrite body1506. For example, the interior vias1606and the exterior vias1608may be located on opposite sides of the ferrite body1506. The exterior vias1608conductively couple the inner upper conductors1600with the inner lower conductors1604. The interior vias1606are generally referred to by the reference number1606and are individually referred to by the reference numbers1606A,1606B,1606C, and so on. The exterior vias1608are generally referred to by the reference number1608and are individually referred to by the reference numbers1608A,1608B,1608C, and so on

The conductors1510,1600,1602,1604and the vias1512,1514,1606,1608are conductively coupled to form one or more conductive coils that helically extend around the ferrite body1506. For example, the conductors1510,1600,1602,1604and the vias1512,1514,1606,1608can form inner and outer conductive coils1610,1612that helically wrap around the ferrite body1506such that each coil1610,1612extends through the opening1508in the ferrite body1506and wraps around the exterior of the ferrite body1506before returning into the opening1508of the ferrite body1506. The conductive coils1610,1612are not conductively coupled with each other in one embodiment. For example, the conductive coils1610,1612may not have a common conductive body that is coupled to each of the conductive coils1610,1612. The conductive coils1610,1612may be capable of inductively transferring electric energy from one coil1610or1612to the other coil1612or1610, such as in a transformer or choke.

In one embodiment, the outer upper conductors1510, the outer lower conductors1602, the first inner vias1512, and the first outer vias1514form the outer conductive coil1612and the inner upper conductors1600, the inner lower conductors1604, the second inner vias1606, and the second outer vias1608form the inner conductive coil1610. The outer conductors1510,1602may be elongated in directions that are obliquely oriented, or angled, with respect to each other. The first inner and outer vias1512,1514can be coupled with different outer conductors1510,1602to form the outer conductive coil1612. As shown inFIG. 14, for example, the outer upper conductor1510A can be conductively coupled with the interior via1512A. The first inner via1512A conductively couples the outer upper conductor1510A with the outer lower conductor1602A. The outer lower conductor1602A also is conductively coupled with the exterior via1514A. The first outer via1514A is conductively coupled with the outer upper conductor1510B. The outer upper conductor1510B is conductively coupled with the first inner via1512B. The first inner via1512B conductively couples the outer upper conductor1510B with the outer lower conductor1602B. The progression of the first inner and outer vias1512,1514coupling different outer upper conductors1510with different outer lower conductors1602continues to form the helical outer conductive coil1612. In the illustrated embodiment, the outer conductive coil1612helically wraps around the ferrite body1506twelve times. Alternatively, the outer conductive coil1612helically wraps around the ferrite body1506a different number of times.

Similarly, the second inner and outer vias1606,1608can be coupled with different inner conductors1600,1604to form the inner conductive coil1610. As shown inFIG. 14, for example, the inner upper conductor1600A can be conductively coupled with the second inner via1606A. The second inner via1606A conductively couples the inner upper conductor1600A with the inner lower conductor1604A. The inner lower conductor1604A is coupled with the second inner via1606A and with the second outer via1608A. The second outer via1608A conductively couples the inner lower conductor1604A with a different inner upper conductor1600B. The inner upper conductor1600B is coupled with a different inner via1606B, which is coupled with a different inner lower conductor1604B. This progression of the inner and outer vias1606,1608coupling different inner upper conductors1600with different inner lower conductors1604continues to form the helical inner conductive coil1610. In the illustrated embodiment, the inner conductive coil1610helically wraps around the ferrite body1506thirty-two times. Alternatively, the inner conductive coil1612helically wraps around the ferrite body1506a different number of times.

The conductive coils1610,1612can provide inductive components for an electronic circuit. For example, one or more conductive traces, wires, or other bodies may be coupled with the conductive coils1610,1612to form a transformer (e.g., where the conductive coils1610,1612inductively pass electric current between two circuits), a choke, balun, or other component. When constructing different inductive elements such as transformer, balun, inductor, chokes, and the like, such as the device1600, one or more techniques for conductively coupling conductors or conductive layers as shown inFIGS. 21 through 23and described above. In the case of a transformer device that is used for DSL and/or Ethernet applications, the dielectric separation between conductors can provide relatively large dielectric voltage isolation, such as electric isolation at voltages of up to 5000 V. Alternatively, the dielectric separation can provide relatively large dielectric voltage isolation at other voltages.

FIG. 15is a cross-sectional view of another embodiment of a planar inductor device1800. The device1800may be similar to the device1500shown inFIGS. 12 through 14. For example, the device1800may include a planar substrate1802having a toroid or annulus shaped ferrite body1804disposed within the substrate1802and one or more conductive coils1806helically wrapping around the ferrite body1804. The substrate1802extends between opposite upper and lower surfaces1808,1810. An interior cavity1812is disposed within the substrate1802between the upper and lower surfaces1808,1810. The ferrite body1804is located within the cavity1812. In the illustrated embodiment, the cavity1812is filled or substantially filled with a dielectric material1814, such as a flexible epoxy material, such that the dielectric material1814at least partially encloses the ferrite body1804in the cavity1812. Alternatively, the cavity1812may be filled or substantially filled with air or another gas, such that the air or gas at least partially surrounds the ferrite body1804in the cavity1812.

In the illustrated embodiment, lower conductive layers1816are disposed on the lower surface1810of the substrate1802. For example, the lower conductive layers1816may be conductive traces deposited on the lower surface1810. Conductive vias1822are coupled with the lower conductive layers1816and vertically extend through the substrate1802. The vias1822can be filled with conductive paste or with another conductive or non-conductive filling material such that the vias1822can be capped. Conductive caps1818are disposed on the upper surface1808of the substrate1802and are conductively coupled with the vias1822. As shown inFIG. 15, the conductive caps1818are spaced apart from each other such that the conductive caps1818do not contact each other on the upper surface1808of the substrate1802. The conductive vias1822may be filled with a conductive material, such as a metal, metal alloy, solder, or other conductive body, that is coupled with the conductive caps1818.

Wire bonds1820are conductively coupled with the conductive caps1818to provide conductive pathways between the caps1818. The wire bonds1820are elongated conductive bodies, such as conductive wires. In one embodiment, the wire bonds1820are formed from 10 micrometer to 50 micrometer diameter sized gold wires. Alternatively, a different sized wire and/or different material may be used as the wire bonds1820.

The conductive coil1806forms several turns around the ferrite body1804. In the illustrated embodiment, the turns of the coil1806are formed by the vias1822, the lower conductive layers1816, the caps1818, and the wire bonds1820. A dielectric overmold layer1824can be provided above the upper surface1808of substrate1802. The overmold layer1824covers or encapsulates the wire bonds1820and caps1818. For example, the wire bonds1820may be entirely disposed within the overmold layer1824. The overmold layer1824can provide voltage isolation. In another embodiment, wire bonds may be used in place of or in addition to the lower conductive layers1816.

In the illustrated embodiment, conductive access to the device1800is provided by conductive terminals1826that extend through the overmold layer1824. For example, openings or vias may be formed through the overmold layer1824using laser vias and/or mechanical vias. A conductive body may be deposited into the openings or vias that are conductively coupled with one or more of the caps1818to form the conductive terminals1826.

FIG. 19is a cross-sectional view of another embodiment of a planar inductor device2200. The device2200may be similar to the device1500shown inFIGS. 12 through 14. For example, the device2200may include a planar substrate2202having a toroid or anulus shaped ferrite body2204disposed within the substrate2202and one or more conductive coils2206helically wrapping around the ferrite body2204. The substrate2202extends between opposite upper and lower surfaces2208,2210. An interior cavity2212is disposed within the substrate2202and the ferrite body2204is located within the cavity2212. In one embodiment, the interior cavities2212can be premade (e.g., formed when the substrate2202is created) and/or include posts for the ferrite body2204to be disposed upon. The ferrite body2204can be mechanically shaken into position using a tapered insert that guides the ferrite body2204into the cavity2212and onto the post, or the ferrite body2204may be placed with a pick and place machine. Alternatively, another technique may be used. The post can provide a supporting framework for the device2200. In one embodiment, a low stress or an ultra low-stress material, such as silicone, can be used to surround the ferrite body2204, as described above. In one embodiment, if the device2200is used for relatively high voltage and/or current applications, a special grade material may be used for substrate and/or post. The material can have relatively low amounts of halogens and/or be relatively glass bundle-free for increased reliability, as well as providing an encapsulation around the ferrite body2204that is hermetic or near hermetic. Examples of such a material can include liquid crystalline polymer (LCP) and/or teflon. Conductive vias2218can extend through the substrate2202and/or the low-stress material around the ferrite body2204and may carry relatively large amounts of electric power. The substrate2202can provide relatively high electric isolation between the vias2218even in the presence of moisture and high temperatures.

In the illustrated embodiment, upper and lower conductive caps2214,2216are disposed on the upper surface2208of the substrate2202and are conductively coupled with the conductive vias2218that extend through the substrate2202. The upper conductive caps2214can be spaced apart from each other such that the upper conductive caps2214do not contact each other and/or the lower conductive caps2216can be spaced apart from each other such that the lower conductive caps2216do not contact each other. The vias2218may be filled with a conductive material, such as a metal, metal alloy, solder, or other conductive body, that is coupled with the upper and lower conductive caps2214,2216.

Upper and lower wire bonds2220,2222are conductively coupled with the upper and lower conductive caps2214,2216, respectively, to provide conductive pathways between the upper conductive caps2214and between the lower conductive caps2216. Similar to the wire bonds1820(shown inFIG. 15), the wire bonds2220,2222are elongated conductive bodies, such as conductive wires. The conductive coil2206forms several turns around the ferrite body2204. In the illustrated embodiment, the turns of the coil2206are formed by the vias2218, the lower conductive caps2216, the lower wire bonds2222, the upper conductive caps2214, and the upper wire bonds2220. Upper and/or lower dielectric overmold layers2224,2226can be provided to cover or encapsulate the upper and/or lower wire bonds2220,2222and upper and/or lower conductive caps2214,2216.

FIG. 20is a cross-sectional view of another embodiment of a planar inductor device2300. The device2300may be similar to the device1500shown inFIGS. 12 through 14and the device2200shown inFIG. 19. For example, the device2300may include a planar substrate2302, a toroid or anulus shaped ferrite body2304, and one or more conductive coils2306helically wrapping around the ferrite body2304. In the illustrated embodiment, the substrate2302includes several interior conductive layers2308disposed within the thickness of the substrate2302. The interior conductive layers2308may include one or more conductive traces located within the substrate2302. The substrate2302also includes conductive vias2310that may be similar to the vias2218(shown inFIG. 19), upper and lower conductive caps2320,2322that may be similar to the upper and lower conductive caps2214,2216(shown inFIG. 19), and upper and lower wire bonds2324,2326that may be similar to the upper and lower wire bonds2220,2222(shown inFIG. 19).

One difference between the devices2200and2300is that the wire bonds2324,2326of the device2300are conductively coupled with one or more of the interior conductive layers2308by microvias2328in the substrate2302. The microvias2328can include channels or holes in the substrate2302that are filled and/or plated with conductive materials, such as metals, metal alloys, and the like. The microvias2328may not entirely extend through the thickness of the substrate2302, as shown inFIG. 20. For example, the microvias2328may only partially extend through the substrate2302between two or more interior conductive layers2308and/or between an interior conductive layer2308and an upper or lower conductive cap2320,2322.

FIG. 16is a cross-sectional view of another embodiment of a planar inductor device1900. The device1900may be similar to the device1500shown inFIGS. 12 through 14. For example, the device1900may include a planar substrate1902having a toroid or anulus shaped ferrite body1904disposed within the substrate1902and one or more conductive coils1906helically wrapping around the ferrite body1904. The substrate1902extends between opposite upper and lower surfaces1908,1910. An interior cavity1912is disposed within the substrate1902between the upper and lower surfaces1908,1910. The ferrite body1904is located within the cavity1912. Upper and lower conductive layers1918,1916and conductive vias1922form the conductive coil1906that helically wraps around the ferrite body1904, as described above.

In the illustrated embodiment, the cavity1912is filled or substantially filled with a flexible dielectric material1914that is mixed with and/or includes one or more relatively high permeability materials. A “high permeability” material may include a material having a magnetic relative permeability (μr) of at least 100. In one embodiment, the ferrite body1904may be at least partially surrounded by an epoxy material that is mixed with high permeability powders, such as nanopowders of cobalt, nickel, manganese, chromium, iron, and the like. In another embodiment, the ferrite body1904can not be provided and the cavity1912may be filled with the material1914mixed with the high permeability materials. The material1914and high permeability materials may replace the ferrite body1904in an inductor device that is formed by conductive coil1906helically wrapped around the material1914with the high permeability materials.

Upper and lower high permeability layers1924,1926may be deposited outside of the substrate1902on the upper and lower surfaces1908,1910, respectively. The layers1924,1926may be formed from a flexible dielectric material that is mixed with or includes one or more high permeability materials, similar to the material1914in the cavity1912. The layers1924,1926can reduce or prevent flux leakage from the device1900and/or increase the effective permeability of the device1900.

FIG. 17is a cross-sectional view of another embodiment of the planar inductor device1900shown inFIG. 16. In the illustrated embodiment, one or more planar ferrite slabs2000are disposed within the cavity1912in the substrate1902. As shown inFIG. 17, the slabs2000may be disposed above and below the ferrite body1904. The slabs2000may be held in place by the material1914in the cavity1912. The slabs2000may be planar bodies that are formed from or include a ferrite material, such as cobalt, nickel, manganese, chromium, iron, and the like. In one embodiment, the slabs2000may be ferrite material sheets that are 8 to 10 micrometers thick. Alternatively, the slabs2000may be a different thickness.

As shown inFIG. 17, one or more of the slabs2000may be provided in the upper and/or lower layers1924,1926. For example, slabs2000that extend over a substantial portion of the upper and/or lower surfaces1908,1910of the substrate1902may be held in the layers1924,1926. The slabs2000can further reduce or prevent flux leakage from the device1900and/or increase the effective permeability of the device1900.

In one embodiment, one or more of the material1914having the high permeability material and/or the ferrite slabs2000may be provided in connection with one or more of the devices100,300,500,1100,1500(shown inFIGS. 1,3,5,8, and12). For example, one or more of the ferrite bodies110,310,510,1116,1506(shown inFIGS. 1,3,5,8, and12) may be disposed within a cavity that is filled or substantially filled with the dielectric material1914that includes high permeability materials and/or one or more of the slabs2000.

FIG. 24is a side view of a planar inductor device700in accordance with another embodiment. The device1800may be similar to one or more devices shown and described herein, such as the device100shown inFIG. 1. For example, the device700includes a substrate702having a thickness dimension704that vertically extends from a lower surface706to an opposite upper surface708. The thickness dimension704may be relatively small, such as 2.5 millimeters or less, 2.0 millimeters or less, 1.0 millimeters or less, or another distance. Alternatively, the thickness dimension704may be a larger distance. The device700also includes a ferrite body710that may be entirely disposed within the thickness dimension704of the substrate702. In one embodiment, the substrate702may include an interior cavity, such as the cavity120(shown inFIG. 1) of the substrate102(shown inFIG. 1), with the ferrite body710disposed in the cavity.

The substrate702can be formed from a plurality of dielectric layers712that are vertically stacked on top of each other. While only twelve layers712are shown in the illustrated embodiment, alternatively, a larger or smaller number of the layers712may be provided. The layers712include or are formed from a dielectric material, such as FR-4, cured epoxy, polytetrafluoroethylene, FR-1, CEM-1, CEM-3, thermoplastics, spin-coated epoxies and the like. The layers712may be held together to form the substrate702by one or more adhesives, such as epoxy.

The ferrite body710is positioned within the substrate702such that the ferrite body710extends through several of the layers712. The ferrite body710may be located within axially-aligned through holes802(shown inFIG. 19) in the layers712, while remaining entirely disposed within the thickness dimension704of the substrate702. Alternatively, the ferrite body710may protrude outside of the thickness dimension704of the substrate702, such as by projecting above a plane defined by the upper surface708and/or below a plane defined by the lower surface706.

With continued reference toFIG. 24,FIG. 25is an exploded view of one embodiment of a subset800of the layers712in the substrate702. The subset800can include less than all of the layers712that are vertically stacked on each other in the substrate702. The layers712are collectively referred to inFIG. 25by the reference number712and are individually referred to by the reference numbers712A,712B,712C, and712D. While the description herein focuses on the subset800of layers712, alternatively, the description may be applied to more than the four layers712in the subset800. For example, the description of the layers712A-D may apply to all of the layers712through which the ferrite body710extends inside of the substrate702.

As shown inFIG. 25, the layers712A-D include holes802that are axially aligned with each other along a center axis810. The center axis810may be parallel to the direction in which the thickness dimension704of the substrate702is measured. The holes802are shaped to receive the ferrite body710. For example, the holes802may have a circular shape with a diameter that is sufficiently large such that a cylindrical ferrite body710can be disposed within the holes802. Alternatively, the holes802may have a different shape. The layers712A-D encircle the ferrite body710in the planes defined by the respective layers712A-D when the ferrite body710is disposed in the holes802.

The layers712A-D include conductors804,806that partially extend around the ferrite body710within the respective layer712A-D. The conductors804,806may be formed as conductive traces or layers disposed on or in the layers712A-D. As shown inFIG. 25, each of the conductors804,806encircles or extends around a portion of the hole802in the corresponding layer712A-D. The conductor804or806in each layer712can extend around less than the entire outer periphery of the hole802in the same layer712. In the illustrated embodiment, each of the conductors804,806has an approximate shape of an arc that subtends approximately 180 degrees of the circumference of the hole802. Alternatively, the conductors804,806may have a different shape and/or subtend a different angle or extend around a different fraction of the outer periphery or circumference of the hole802.

The conductors804,806are coupled with conductive microvias808. For example, each of the conductors804,806may extend from a first microvia808to a second microvia808in the same layer712as the conductor804,806. As shown inFIG. 24, the microvias808extend through the layers712. The microvias808provide vertically oriented conductive pathways that extend through one or more of the layers712while the conductors804,806provide horizontal conductive pathways within separate layers712. In the illustrated embodiment, each of the conductors804,806can provide a horizontal conductive pathway within a layer712while each of the microvias808provides a vertical conductive pathway or interconnect through the thickness of the layer712. The microvias808are shown as buried vias as the microvias808are not exposed at the upper surface708or the lower surface706of the substrate702. Alternatively, one or more of the microvias808may be exposed at the upper surface708or the lower surface706of the substrate702.

The microvias808in the layers712conductively couple the conductors804,806in different layers712with each other. For example, the microvias808in the layer712A extend through the layer712A to conductively couple the conductor804in the layer712A with the conductor806in the layer712B. Similarly, the microvias808in the layer712B extend through the layer712B to conductively couple the conductor806in the layer712B with the conductor804in the layer712C, and so on. In the illustrated embodiment, each of the microvias808conductively couples conductors804,806disposed on or in different and adjacent layers712. Alternatively, the microvias808may extend through more than one layer712to conductively couple conductors804,806in different, non-adjacent layers712, or layers712that are separated from each other by one or more other layers712.

FIG. 26is a schematic view of the inductor device700in accordance with one embodiment. The device700is shown inFIG. 26with the substrate702(shown inFIG. 24) removed to make the relative positions of the conductors804,806, the microvias808, and the ferrite body710more clear. The conductors804,806and the microvias808are conductively coupled with each other to form a multi-layer conductive coil900that helically wraps around the ferrite body710. As shown inFIG. 26, each of the conductors804,806forms a portion of a turn902of the coil900that extends around the ferrite body710. The term “turn” is meant to encompass a portion of the coil900that extends around the outer periphery of the ferrite body710a single time, or that subtends an arc or non-planar circle of 360 degrees. In the illustrated embodiment, each conductor804,806subtends an arc of approximately 180 degrees such that the microvias808in different layers712(shown inFIG. 24) are vertically aligned with each other in two sets904,906of microvias808, with the sets904,906located on opposite sides of the ferrite body710. Alternatively, the conductors804,806may subtend arcs of smaller or larger angles such that the microvias808are not vertically aligned with each other or are vertically aligned with each other in a single set or in multiple sets of microvias808.

Returning to the discussion of the device700as shown inFIG. 24, the device700may provide an inductive element to an electronic circuit712. The device700may be conductively coupled with conductive traces714and/or vias716that provide conductive pathways with the circuit712. While the traces714and vias716couple the circuit712with opposite ends of the coil900(shown inFIG. 26) formed by the conductors804,806and the microvias808, alternatively, the traces714and vias716couple the circuit712with different points or locations along the coil900. For example, the traces714and vias716may be conductively coupled with the conductors804,806and/or microvias808in layers712other than the layers712shown inFIG. 26. In operation, current from the circuit712flows through the coil900formed by the conductors804,806and the microvias808. At least some of the energy of the current is stored as magnetic energy in the ferrite body710. The coil900may be used to delay and/or reshape currents flowing through the circuit712, such as by filtering relatively high frequencies from the current.