SOLID-STATE IMAGING ELEMENT, METHOD OF MANUFACTURING SOLID-STATE IMAGING ELEMENT, AND ELECTRONIC EQUIPMENT

A solid-state imaging element according to the present disclosure includes a semiconductor layer and a separation region. The semiconductor layer includes a plurality of photoelectric conversion sections disposed in a matrix. The separation region separates the photoelectric conversion sections adjacent to each other in the semiconductor layer. The separation region includes a wall-like electrode and a low absorption member. The wall-like electrode is disposed in a wall shape, and a negative bias voltage is applied thereto. The low absorption member is disposed further on the light incident side than the wall-like electrode and has a light absorption rate smaller than that of the wall-like electrode.

FIELD

The present disclosure relates to a solid-state imaging element, a method of manufacturing a solid-state imaging element, and electronic equipment.

BACKGROUND

A solid-state imaging element includes, for example, a plurality of photoelectric conversion sections arrayed along a light incident side surface of a semiconductor layer. In such a solid-state imaging element, a technology for forming a conductive light blocking wall in a separation region located between adjacent photoelectric conversion sections has been known (see, for example, Patent Literature 1.).

CITATION LIST

Patent Literature

Patent Literature 1: JP 2009-88030 A

SUMMARY

Technical Problem

The present disclosure proposes a solid-state imaging element, a method of manufacturing a solid-state imaging element, and electronic equipment capable of suppressing deterioration in a condensing characteristic for a photoelectric conversion section.

Solution to Problem

According to the present disclosure, there is provided a solid-state imaging element. The solid-state imaging element includes a semiconductor layer and a separation region. The semiconductor layer includes a plurality of photoelectric conversion sections disposed in a matrix. The separation region separates the photoelectric conversion sections adjacent to each other in the semiconductor layer. The separation region includes a wall-like electrode and a low absorption member. The wall-like electrode is disposed in a wall shape, and a negative bias voltage is applied thereto. The low absorption member is disposed further on the light incident side than the wall-like electrode and has a light absorption rate smaller than that of the wall-like electrode.

DESCRIPTION OF EMBODIMENTS

Embodiments of the present disclosure are explained in detail below with reference to the drawings. Note that, in the embodiments explained below, redundant explanation is omitted by denoting the same parts with the same reference numerals and signs.

A solid-state imaging element includes, for example, a plurality of photoelectric conversion sections arrayed along a light incident side surface of a semiconductor layer. In such a solid-state imaging element, there has been known a technology for forming a conductive light blocking wall in a separation region located between adjacent photoelectric conversion sections.

Further, by applying a negative bias voltage to the light blocking wall, holes can be collected in the vicinity of an interface between the photoelectric conversion section and the separation region. Therefore, occurrence of a dark current and white spots in the photoelectric conversion section can be suppressed.

On the other hand, in the related art explained above, since light absorption occurs in a light incident side part of the light blocking wall more or less, it is likely that an amount of light made incident on the photoelectric conversion section decreases.

Therefore, it is expected to realize a technology that can overcome the problems described above and suppress deterioration in a condensing characteristic for the photoelectric conversion section.

[Configuration of a Solid-State Imaging Element]

FIG.1is a system configuration diagram illustrating a schematic configuration example of a solid-state imaging element1according to an embodiment of the present disclosure. As illustrated inFIG.1, a solid-state imaging element1, which is a CMOS image sensor, includes a pixel array section10, a system control section12, a vertical drive section13, a column read circuit section14, a column signal processing section15, a horizontal drive section16, and a signal processing section17.

The pixel array section10, the system control section12, the vertical drive section13, the column read circuit section14, the column signal processing section15, the horizontal drive section16, and the signal processing section17are provided on the same semiconductor substrate or on a plurality of electrically connected laminated semiconductor substrates.

In the pixel array section10, light receiving pixels11including photoelectric conversion elements (photodiodes PD (seeFIG.2)) capable of photoelectrically converting a charge amount corresponding to an incident light amount, accumulating the charge amount on the inside, and outputting the charge amount as a signal are two-dimensionally arranged in a matrix.

Besides the light receiving pixels11, the pixel array section10sometimes includes a region where dummy pixels having a structure not including the photodiodes PD, light blocking pixels in which light incidence from the outside is blocked by shielding light receiving surfaces from light, and the like are arranged in rows and/or columns.

Note that the light blocking pixels may have the same configuration as the configuration of the light receiving pixels11except that the light-receiving surfaces are shielded from light. In the following explanation, a photoelectric charge of a charge amount corresponding to an amount of incident light is sometimes simply referred to as “charge” as well and the light receiving pixel11is sometimes simply referred to as “pixel” as well.

In the pixel array section10, pixel drive lines LD are formed for each of the rows in the left-right direction in the drawing (an array direction of pixels in pixel rows) with respect to the pixel array in a matrix and vertical pixel wires LV are formed for each of the columns in the up-down direction in the drawing (an array direction of pixels in pixel columns). One ends of the pixel drive lines LD are connected to output ends corresponding to the rows of the vertical drive section13.

The column read circuit section14includes at least a circuit that supplies, for each of the columns, a constant current to the light receiving pixels11in a selected row in the pixel array section10, a current mirror circuit, and a changeover switch for the light receiving pixels11to be read.

The column read circuit section14configures an amplifier in conjunction with a transistor in the selected pixel in the pixel array section10, converts a photoelectric charge signal into a voltage signal, and outputs the voltage signal to the vertical pixel wires LV.

The vertical drive section13includes a shift register and an address decoder and drives the light receiving pixels11of the pixel array section10at the same time for all pixels or in sections of rows. Although a specific configuration of the vertical drive section13is not illustrated, the vertical drive section13has a configuration including a read scanning system and a sweep scanning system or a batch sweeping and batch transfer system.

The read scanning system sequentially selects and scans the light receiving pixels11of the pixel array section10in sections of rows in order to read the pixel signal from the light receiving pixels11. In the case of row driving (a rolling shutter operation), about sweeping, sweep scanning is performed on a read row on which read scanning is performed by the read scanning system prior to the read scanning by a time of a shutter speed.

In the case of global exposure (a global shutter operation), batch sweeping is performed prior to batch transfer by the time of the shutter speed. By such sweeping, unnecessary charges are swept (reset) from the photodiodes PD of the light receiving pixels11in the read row. Then, a so-called electronic shutter operation is performed by sweeping (resetting) the unnecessary charges.

Here, the electronic shutter operation means an operation for discarding unnecessary photoelectric charges accumulated in the photodiode PD until immediately before the electronic shutter operation and starting exposure anew (starting accumulation of photoelectric charges).

A signal read by the read operation by the read scanning system corresponds to an amount of light made incident after the immediately preceding read operation or electronic shutter operation. In the case of the row driving, a period from read timing by the immediately preceding read operation or sweep timing by the electronic shutter operation to read timing by the current read operation is a photoelectric charge accumulation time (an exposure time) in the light receiving pixels11. In the case of the global exposure, a time from the batch sweeping to the batch transfer is an accumulation time (an exposure time).

Pixel signals output from the light receiving pixels11of a pixel row selectively scanned by the vertical drive section13are supplied to the column signal processing section15through each of the vertical pixel wires LV. The column signal processing section15performs, for each of the pixel columns of the pixel array section10, predetermined signal processing on the pixel signals output from the light receiving pixels11of the selected row through the vertical pixel wire LV and temporarily holds the pixel signals after the signal processing.

Specifically, the column signal processing section15performs at least noise removal processing, for example, correlated double sampling (CDS) processing as the signal processing. By the CDS processing by the column signal processing section15, fixed pattern noise specific to pixels such as reset noise and threshold variation of an amplification transistor AMP is removed.

Note that the column signal processing section15can be imparted with, for example, an AD conversion function besides the noise removal processing and configured to output a pixel signal as a digital signal.

The horizontal drive section16includes a shift register and an address decoder and sequentially selects section circuits corresponding to the pixel columns of the column signal processing section15. By the selective scanning by the horizontal drive section16, the pixel signals subjected to the signal processing by the column signal processing section15are sequentially output to the signal processing section17.

The system control section12includes a timing generator that generates various timing signal and performs drive control for the vertical drive section13, the column signal processing section15, the horizontal drive section16, and the like based on various timing signals generated by the timing generator.

The solid-state imaging element1further includes a signal processing section17and a not-illustrated data storage section. The signal processing section17has at least an addition processing function and performs various kinds of signal processing such as addition processing on the pixel signal output from the column signal processing section15.

In signal processing in the signal processing section17, the data storage section temporarily stores data necessary for the processing. The signal processing section17and the data storage section may be an external signal processing section provided on a substrate different from a substrate on which the solid-state imaging element1is provided, may perform, for example, processing by a digital signal processor (DSP) or software, or may be mounted on the same substrate as the substrate on which the solid-state imaging element1is mounted.

Embodiment

Subsequently, a detailed configuration of the pixel array section10according to the embodiment is explained with reference toFIG.2.FIG.2is a sectional view schematically illustrating structure of the pixel array section10according to the embodiment of the present disclosure.

As illustrated inFIG.2, the pixel array section10according to the embodiment includes a semiconductor layer20, a wiring layer30, and an optical layer40. In the pixel array section10, an optical layer40, a semiconductor layer20, and a wiring layer30are laminated in order from a side on which light L from the outside is made incident (hereinafter also referred to as light incident side).

In the semiconductor layer20, a photodiode PD is formed by a first region21, which is a semiconductor region of a first conductivity type (for example, N-type), and a semiconductor region of a not-illustrated second conductivity type (for example, P-type) adjacent to the first region21. The photodiode PD is an example of a photoelectric conversion section.

A second region22, which is a semiconductor region of the second conductivity type, is provided in a part further on the light incident side than the first region21in the semiconductor layer20. That is, the second region22having impurity concentration lower than that of such a first region21is provided in a part further on the light incident side than the first region21in the semiconductor layer20.

In the semiconductor layer20, separation regions23are provided among the photodiodes PD adjacent to one another. Such separation regions23electrically and optically separate the adjacent photodiodes PD from one another. For example, the separation regions23are arranged in a lattice shape in plan view in the pixel array section10.

The separation region23according to the embodiment includes a wall-like electrode24, an insulating film25, and a low absorption member26. The wall-like electrode24is a wall-like electrode made of a conductive material and provided along the separation region23in plan view. The wall-like electrode24is configured using one selected out of, for example, polysilicon, tungsten, and aluminum as a main component.

The wall-like electrode24is disposed, in the semiconductor layer20, up to given depth X from a surface20bon the opposite side of the light incident side (hereinafter also referred to as opposite surface20b). The wall-like electrode24is disposed adjacent to the first region21. That is, the first region21is disposed up to the given depth X from the opposite surface20bin the semiconductor layer20.

The insulating film25is disposed between the wall-like electrode24and the first region21. The insulating film25is made of an insulative material (for example, silicon oxide (SiO2)).

A wire32alocated in the wiring layer30is connected to the wall-like electrode24and a negative bias voltage is applied to the wall-like electrode24via the wire32aand the like. The negative bias voltage is applied to the wall-like electrode24, whereby holes can be collected in the vicinity of the interface between the photodiode PD and the separation region23. Consequently, in the embodiment, occurrence of a dark current and white spots can be suppressed in the photodiode PD.

On the other hand, since the wall-like electrode24has a relatively large absorption rate for the light L, when the wall-like electrode24is disposed up to the vicinity of the surface20aon the light incident side of the semiconductor layer20(hereinafter also referred to as light incident surface20a), the wall-like electrode24is likely to absorb the light L in the vicinity of the light incident surface20a.

Therefore, in the embodiment, as illustrated inFIG.2, the low absorption member26is disposed in a part further on the light incident side than the wall-like electrode24in the separation region23. For example, the low absorption member26has thickness substantially equal to that of a wall-like part configured by the wall-like electrode24and the insulating film25.

The low absorption member26is made of a material having a lower absorption rate for the light L than that of the wall-like electrode24(for example, silicon oxide, hafnium oxide (HfO2), aluminum oxide (Al2O3), or titanium oxide (TiO2)).

Consequently, it is possible to prevent the light L from being absorbed in a part on the light incident side in the separation region23. Therefore, according to the embodiment, it is possible to suppress deterioration in a condensing characteristic for the photodiode PD.

In the embodiment, the second region22having impurity concentration lower than that of the first region21is preferably disposed adjacent to the low absorption member26. Consequently, even in the vicinity of the interface between the low absorption member26to which a negative bias voltage is not applied and the second region22, occurrence of abnormal charges due to a defect or the like of the semiconductor layer20can be suppressed.

Therefore, according to the embodiment, occurrence of white spots in the photodiode PD can be suppressed.

In the example illustrated inFIG.2, an example in which the second region22is the semiconductor region of the second conductivity type is illustrated. However, the second region22is not limited to the semiconductor region of the second conductivity type and may be configured by, for example, an impurity region of the first conductivity type having impurity concentration lower than that of the first region21.

In the embodiment, the wall-like electrode24is preferably configured using one selected out of polysilicon, tungsten, and aluminum as a main component. Consequently, holes can be stably collected in the vicinity of the interface between the photodiode PD and the separation region23.

Therefore, according to the embodiment, occurrence of a dark current and white spots in the photodiode PD can be further suppressed.

In the embodiment, the wall-like electrode24is preferably made of polysilicon. Consequently, it is possible to prevent the wall-like electrode24from being deteriorated even when the wall-like electrode24is exposed to a high-temperature environment in a manufacturing step for the pixel array section10explained below.

In the embodiment, the low absorption member26is preferably configured using one selected out of silicon oxide, hafnium oxide, aluminum oxide, and titanium oxide as a main component. For example, when the low absorption member26is made of silicon oxide, the low absorption member26can be easily formed.

When the low absorption member26is made of hafnium oxide, aluminum oxide, or titanium oxide, a refractive index difference between the low absorption member26and the second region22made of silicon can be reduced.

Therefore, according to the embodiment, since scattering of the light L can be suppressed at the end portion on the light incident side in the low absorption member26, it is possible to further suppress deterioration of the condensing characteristic for the photodiode PD.

Explanation of other parts in the pixel array section10is continued. The wiring layer30is disposed on the opposite surface20bof the semiconductor layer20. Such a wiring layer30is configured by forming a plurality of layers of wires32and a plurality of pixel transistors33in an interlayer insulating film31.

The wires32include a wire32aelectrically connected to the wall-like electrode24. The plurality of pixel transistors33perform, for example, reading of charges accumulated in the photodiode PD.

The optical layer40is disposed on the light incident surface20aof the semiconductor layer20. The optical layer40includes a planarization film41, a color filter42, a light blocking wall43, and an OCL (On-Chip Lens)44.

The planarization film41is provided in order to planarize the surface on which the color filter42and the OCL44are formed and avoid unevenness caused in a rotational coating step at the time when the color filter42and the OCL44are formed.

The planarization film41is formed of, for example, an organic material (for example, acrylic resin). Note that the planarization film41is not limited to be formed of the organic material and may be formed of silicon oxide, silicon nitride (SiN), or the like.

The color filter42is an optical filter that transmits light having a predetermined wavelength in the light L condensed by the OCL44. The color filter42is disposed on the surface on the light incident side of the planarization film41.

The color filter42includes, for example, a color filter that transmits red light, a color filter that transmits green light, and a color filter that transmits blue light.

The light blocking wall43is disposed, for example, between adjacent color filters42. The light blocking wall43is a wall-like film that blocks light obliquely made incident from the adjacent color filters42. The light blocking wall43is made of, for example, aluminum, tungsten, or the like.

The OCL44is a lens that is provided for each light receiving pixel11and condenses the light L on the photodiode PD of each of the light receiving pixels11. The OCL44is made of, for example, resin such as an acrylic resin.

[Manufacturing Step for the Pixel Array Section]

Subsequently, a manufacturing step for the pixel array section10according to the embodiment is explained with reference toFIG.3toFIG.8.FIG.3toFIG.8are diagrams for explaining the manufacturing step for the pixel array section10according to the embodiment of the present disclosure.

In the manufacturing step for the pixel array section10, as illustrated inFIG.3, first, impurities of the second conductivity type are ion-implanted with high energy from the opposite surface20bside of the semiconductor substrate120that includes impurities of the first conductivity type and finally becomes the semiconductor layer20. Consequently, the second region22is formed in a region deeper than the given depth X based on the opposite surface20b.

At this time, a region closer to the opposite surface20bthan the second region22in the semiconductor substrate120(the semiconductor layer20) becomes the first region21of the first conductivity type.

Further, a trench T1is formed on the opposite surface20bside of the semiconductor substrate120(the semiconductor layer20) by a method publicly known in the past. Note that the trench T1is formed to pierce through the first region21and reach halfway in the second region22and is formed in a part where the separation region23is provided in plan view.

Subsequently, as illustrated inFIG.4, the trench T1is filled with the low absorption member26up to the given depth X from the bottom thereof by a method publicly known in the past.

Subsequently, as illustrated inFIG.5, the insulating film25is formed on a side surface T1afrom the given depth X to an opening of the trench T1by a method publicly known in the past and the wall-like electrode24is further formed by a method publicly known in the past fill the remaining space of the trench T1.

Subsequently, as illustrated inFIG.6, the wiring layer30is formed on the surface of the opposite surface20bof the semiconductor substrate120(the semiconductor layer20). Such a wiring layer30is configured by providing the plurality of layers of wires32and the plurality of pixel transistors33in the interlayer insulating film31and is formed by a method publicly known in the past.

Subsequently, as illustrated inFIG.7, the surface on the opposite side of the opposite surface20bin the semiconductor substrate120is ground and is thinned such that the second region22and the low absorption member26are exposed. Consequently, the semiconductor layer20and the light incident surface20aare formed.

Subsequently, as illustrated inFIG.8, the planarization film41, a plurality of color filters42, a plurality of light blocking walls43, and a plurality of OCLs44are formed in order on the surface of the light incident surface20aof the semiconductor layer20.

As explained above, in the manufacturing step for the pixel array section10according to the embodiment, the separation region23is formed by filling the trench T1formed from the opposite surface20bof the semiconductor layer20with the low absorption member26, the insulating film25, and the wall-like electrode24.

Consequently, it is possible to form the low absorption member26, the insulating film25, and the wall-like electrode24in a simple step and it is possible to prevent positional deviation between the low absorption member26and the wall-like electrode24.

Subsequently, various modifications of the embodiment are explained with reference toFIG.9toFIG.24.

FIG.9is a sectional view schematically illustrating structure of the pixel array section10according to a modification 1 of the embodiment of the present disclosure. In the modification 1, a configuration of the low absorption member26and the periphery thereof is different from that in the embodiment explained above.

Specifically, as illustrated inFIG.9, in the modification 1, a fixed charge film27is disposed between the low absorption member26and the second region22and the wall-like electrode24. Such a fixed charge film27has a function of fixing charges (here, holes) to an interface between the separation region23and the second region22.

As the material of the fixed charge film27, it is preferable to use a high dielectric material having a lot of fixed charges. The fixed charge film27is made of, for example, hafnium oxide, aluminum oxide, tantalum oxide, zirconium oxide (ZrO2), titanium oxide, magnesium oxide (MgO2), lanthanum oxide (La2O3), or the like.

The fixed charge film27may be made of praseodymium oxide (Pr2O3), cerium oxide (CeO2), neodymium oxide (Nd2O3), promethium oxide (Pm2O3), samarium oxide (Sm2O3), europium oxide (Eu2O3), or the like.

The fixed charge film27may be made of gadolinium oxide (Gd2O3), terbium oxide (Tb2O3), dysprosium oxide (Dy2O3), holmium oxide (Ho2O3), erbium oxide (Er2O3), thulium oxide (Tm2O3), or the like.

The fixed charge film27may be made of ytterbium oxide (Yb2O3), lutetium oxide (Lu2O3), yttrium oxide (Y2O3), aluminum nitride (AlN), hafnium oxynitride (HfON), an aluminum oxynitride film (AlON), or the like.

By disposing such a fixed charge film27, in the modification 1, it is possible to further suppress occurrence of abnormal charges due to a defect or the like of the semiconductor layer20in the vicinity of the interface between the low absorption member26to which a negative bias voltage is not applied and the second region22.

Therefore, according to the modification 1, occurrence of white spots in the photodiode PD can be further suppressed.

FIG.10is a diagram illustrating a relation between depth D at which the low absorption member26is disposed and a saturation charge amount of the light receiving pixel11in the modification 1 of the embodiment of the present disclosure.

Note that results illustrated inFIG.10are data obtained from simulation and are data in the case in which the fixed charge film27is configured by a multilayer film of aluminum oxide and tantalum oxide and the low absorption member26is configured by silicon oxide. A reference example illustrated inFIG.10is data in the case in which the low absorption member26and the fixed charge film27are not disposed and the wall-like electrode24pierces through the entire separation region23.

As illustrated inFIG.10, in the modification 1, it is more preferable that the low absorption member26is disposed up to the depth D of 800 (nm) or more from the light incident surface20aof the semiconductor layer20. Consequently, the saturation charge amount can be greatly increased as compared with the reference example. That is, in the modification 1, by disposing the low absorption member26up to the depth D of 800 (nm) or more, the condensing characteristic can be further improved.

Note that the data illustrated inFIG.10is a result of simulating the configuration of the modification 1. However, a result of simulating the configuration of the embodiment explained above is the same as the result illustrated inFIG.10. That is, in the embodiment as well, the condensing characteristic can be further improved by disposing the low absorption member26up to the depth D of 800 (nm) or more.

<Manufacturing Step in the Modification 1>

Subsequently, a manufacturing step for the pixel array section10according to the modification 1 is explained with reference toFIG.11toFIG.17.FIG.11toFIG.17are diagrams for explaining a manufacturing step for the pixel array section10according to the modification 1 of the embodiment of the present disclosure.

In the manufacturing step in the modification 1, as illustrated inFIG.11, first, impurities of the second conductivity type are ion-implanted with high energy from the opposite surface20bside of the semiconductor substrate120that includes impurities of the first conductivity type and finally becomes the semiconductor layer20. Consequently, the second region22is formed in a region deeper than the given depth X based on the opposite surface20b.

At this time, a region closer to the opposite surface20bthan the second region22in the semiconductor substrate120(the semiconductor layer20) becomes the first region21of the first conductivity type.

Further, a trench T1is formed on the opposite surface20bside of the semiconductor substrate120(the semiconductor layer20) by a method publicly known in the past. Note that the trench T1is formed to pierce through the first region21and is formed in a part where the separation region23is provided in plan view.

Subsequently, as illustrated inFIG.12, the insulating film25is formed on the side surface T1afrom the bottom to the opening of the trench T1by a method publicly known in the past and the wall-like electrode24is further formed by a method publicly known in the past to fill the remaining space of the trench T i.

Subsequently, as illustrated inFIG.13, a wiring layer30is formed on the surface of the opposite surface20bof the semiconductor substrate120(the semiconductor layer20). Such a wiring layer30is configured by providing the plurality of layers of wires32and the plurality of pixel transistors33in the interlayer insulating film31and is formed by a method publicly known in the past.

Subsequently, as illustrated inFIG.14, the surface on the opposite side the opposite surface20bin the semiconductor substrate120is ground and is thinned such that the second region22is exposed. Consequently, the semiconductor layer20and the light incident surface20aare formed.

Subsequently, as illustrated inFIG.15, a trench T2is formed on the light incident surface20aside of the semiconductor layer20by a method publicly known in the past. Note that the trench T2is formed to pierce through the second region22and is formed in a part where the separation region23is provided in plan view. That is, the trench T2is formed to expose the wall-like electrode24and the insulating film25at the bottom.

Subsequently, as illustrated inFIG.16, the fixed charge film27is formed on a side surface T2aand a bottom surface T2bof the trench T2by a method publicly known in the past and the low absorption member26is further formed by a method publicly known in the past to fill the remaining space of the trench T2.

Subsequently, as illustrated inFIG.17, a planarization film41, the plurality of color filters42, the plurality of light blocking walls43, and the plurality of OCLs44are formed in order on the surface of the light incident surface20aof the semiconductor layer20.

As described above, in the manufacturing step in the modification 1, the separation region23is formed by filling the trench T1formed from the opposite surface20bwith the insulating film25and the wall-like electrode24and filling the trench T2formed from the light incident surface20awith the fixed charge film27and the low absorption member26.

Therefore, according to the modification 1, since the low absorption member26is not exposed to a high temperature environment in, for example, a step of forming the wiring layer30, it is possible to prevent such a low absorption member26from being deteriorated.

Note that, in the manufacturing steps in the embodiment and the modification 1 explained above, an example is explained in which the first region21and the second region22are formed by ion-implanting impurities of the second conductivity type with high energy into the semiconductor substrate120of the first conductivity type. However, the present disclosure is not limited to such an example.

For example, in the technology of the present disclosure, the first region21and the second region22may be formed by ion-implanting impurities of the first conductivity type with relatively low energy from the opposite surface20bside of the semiconductor substrate120of the second conductivity type.

FIG.18is a sectional view schematically illustrating structure of the pixel array section10according to a modification 2 of the embodiment of the present disclosure. Such a modification 2 is different from the modification 1 in a configuration of the second region22.

Specifically, as illustrated inFIG.18, in the modification 2, the second region22includes a first part22adisposed on the first region21side and a second part22bdisposed on the light incident surface20aside.

The first part22ais a region having impurity concentration lower than that of the first region21and is, for example, an impurity region of the first conductivity type having impurity concentration lower than that of the first region21. The second part22bis a region having impurity concentration lower than that of the first part22aand is, for example, an impurity region of the second conductivity type.

Consequently, it is possible to further suppress occurrence of abnormal charges due to a defect or the like of the semiconductor layer20in the vicinity of the interface between the low absorption member26to which a negative bias voltage is not applied and the second region22. Therefore, according to the modification 2, occurrence of white spots in the photodiode PD can be further suppressed.

FIG.19is a sectional view schematically illustrating structure of the pixel array section10according to a modification 3 of the embodiment of the present disclosure. In such a modification 3, a configuration around the low absorption member26is different from that in the modification 1.

Specifically, as illustrated inFIG.19, in the modification 3, a stopper film28is disposed between the low absorption member26and the fixed charge film27and the wall-like electrode24and the insulating film25. Such the stopper film28is formed to fill the bottom of the trench T1during the period until the insulating film25and the wall-like electrode24are formed after the trench T1is formed in the manufacturing step illustrated inFIG.12.

The stopper film28is made of a material (for example, silicon oxide or silicon nitride) having a high selection ratio of etching with respect to the material of the semiconductor layer20(for example, silicon).

In the modification 3, since such the stopper film28is disposed, the stopper film28can be used as an etching stopper in the step of forming the trench T2illustrated inFIG.15. Therefore, according to the modification 3, the trench T2can be accurately formed.

FIG.20is a sectional view schematically illustrating structure of the pixel array section10according to a modification 4 of the embodiment of the present disclosure. In such a modification 4, the sizes of the low absorption member26and the fixed charge film27are different from those in the modification 1.

Specifically, as illustrated inFIG.20, in the modification 4, a wall-like part configured by the low absorption member26and the fixed charge film27is thicker than a wall-like part including the wall-like electrode24and the insulating film25.

Consequently, even when the trench T2is displaced with respect to the trench T1in the step of forming the trench T2, the wall-like part configured by the low absorption member26and the fixed charge film27can be connected to a wall-like part configured by the wall-like electrode24and the insulating film25.

Therefore, according to the modification 4, even when the trench T2is displaced with respect to the trench T1, the adjacent photodiodes PD can be reliably separated in the separation region23.

FIG.21is a sectional view schematically illustrating structure of the pixel array section10according to a modification 5 of the embodiment of the present disclosure. In the modification 5, configurations of the low absorption member26and the fixed charge film27are different from those in the modification 1.

Specifically, as illustrated inFIG.21, in the modification 5, a low absorption member26A is made of a conductive material (for example, tungsten or aluminum) and a fixed charge film27A is made of an insulating material (for example, silicon oxide). In the modification 5, the low absorption member26A and the wall-like electrode24are electrically connected to each other.

Consequently, since a negative bias voltage is applied to the low absorption member26A as well via the wall-like electrode24, holes can be collected in the vicinity of the interface between the second region22and the separation region23as well. Therefore, according to the modification 5, occurrence of a dark current and white spots in the photodiode PD can be further suppressed.

FIG.22is a diagram illustrating a planar configuration of the pixel array section10according to a modification 6 of the embodiment of the present disclosure.FIG.23is an arrow sectional view taken along line A-A illustrated inFIG.22.FIG.24is an arrow sectional view taken along line B-B illustrated inFIG.22.

As illustrated inFIG.22and the like, in the pixel array section10in the modification 6, a pair of photodiodes PD (hereinafter also referred to as photodiodes PD1and PD2) are provided in one light receiving pixel11. For example, the light receiving pixel11has a substantially square shape in plan view and the photodiode PD has a substantially rectangular shape in plan view.

The light receiving pixel11includes, as the separation region23, a first separation region23a, a second separation region23b, and an impurity region23c. As illustrated inFIG.22, the first separation region23ais disposed to surround a pair of photodiodes PD1and PD2in one light receiving pixel11.

The second separation region23bis disposed between the pair of photodiodes PD1and PD2adjacent to each other in one light receiving pixel11. The second separation region23boptically and electrically separates the pair of photodiodes PD1and PD2adjacent to each other.

That is, in the light receiving pixel11in the modification 6, the first separation region23aseparates the plurality of photodiodes PD on which the light L is made incident via different OCLs44. The second separation region23bseparates the pair of photodiodes PD1and PD2on which the light L is made incident via the same OCL44.

As explained above, in the modification 6, since the pair of photodiodes PD1and PD2can be separated from each other using the second separation region23b, a phase difference of the incident light L can be detected using the pair of photodiodes PD1and PD2.

The impurity region23cis disposed in a position different from the second separation region23bin plan view between the pair of photodiodes PD1and PD2and includes impurities of the second conductivity type.

The impurity region23cfunctions as an overflow path between the photodiode PD1and the photodiode PD2. Consequently, in the modification 6, charge amounts accumulated in both of the photodiodes PD1and PD2can be equalized.

Here, in the modification 6, as illustrated inFIG.23, as in the modification 1 explained above, the first separation region23aand the second separation region23binclude the wall-like electrode24, the insulating film25, the low absorption member26, and the fixed charge film27.

Consequently, in the modification 6, it is possible to impart satisfactory separation characteristics to the first separation region23aand the second separation region23band it is possible to prevent the light L from being absorbed in parts on the light incident side in the first separation region23aand the second separation region23b.

Therefore, according to the modification 6, in the light receiving pixel11that can detect a phase difference of the light L, it is possible to suppress deterioration in a condensing characteristic for the pair of photodiodes PD1and PD2.

In the modification 6, as illustrated inFIG.23, depth D2at which the low absorption member26and the fixed charge film27are disposed in the second separation region23bis preferably larger than depth D1at which the low absorption member26and the fixed charge film27are disposed in the first separation region23a.

Consequently, the light L can be effectively prevented from being absorbed in a part further on the light incident side in the second separation region23bwhere more light L is condensed than in the first separation region23abecause the second separation region23bis disposed near the optical axis of the OCL44.

Therefore, according to the modification 6, in the light receiving pixel11that can detect a phase difference of the light L, it is possible to further suppress deterioration of the condensing characteristic for the pair of photodiodes PD1and PD2.

Note that, in an example illustrated inFIG.22toFIG.24, the phase difference pixel in which the overflow path (the impurity region23c) is disposed between the pair of photodiodes PD1and PD2are illustrated. However, the present disclosure is not limited to such an example.

For example, in the phase difference pixel in which the pair of photodiodes PD1and PD2is completely separated by the second separation region23b, the first separation region23aand the second separation region23bmay include the wall-like electrode24, the insulating film25, the low absorption member26, and the fixed charge film27.

Consequently, in the light receiving pixel11that can detect a phase difference of the light L, it is possible to suppress deterioration in the condensing characteristic for the pair of photodiodes PD1and PD2.

In this phase difference pixel, the depth D2at which the low absorption member26and the fixed charge film27are disposed in the second separation region23bmay be larger than the depth D1at which the low absorption member26and the fixed charge film27are disposed in the first separation region23a. Consequently, it is possible to further suppress deterioration in the condensing characteristic for the pair of photodiodes PD1and PD2.

The solid-state imaging element1according to the embodiment includes the semiconductor layer20and the separation region23. The semiconductor layer20includes a plurality of photoelectric conversion sections (photodiodes PD) disposed in a matrix. The separation region23separates adjacent photoelectric conversion sections (photodiodes PD) in the semiconductor layer20. The separation region23includes the wall-like electrode24and the low absorption member26. The wall-like electrode24is disposed in a wall shape and a negative bias voltage is applied thereto. The low absorption member26is disposed further on the light incident side than the wall-like electrode24and has a light absorption rate smaller than that of the wall-like electrode24.

Consequently, it is possible to suppress deterioration in the condensing characteristic for the photodiode PD.

In the solid-state imaging element1according to the embodiment, the photoelectric conversion section (the photodiode PD) includes the first region21adjacent to the wall-like electrode24and the second region22adjacent to the low absorption member26. The impurity concentration of the second region22is lower than the impurity concentration of the first region21.

Consequently, occurrence of white spots in the photodiode PD can be suppressed.

In the solid-state imaging element1according to the embodiment, the low absorption member26is disposed up to the depth D of 800 (nm) or more from the surface20aon the light incident side of the semiconductor layer20.

Consequently, it is possible to further improve the condensing characteristic for the photodiode PD.

In the solid-state imaging element1according to the embodiment, the wall-like electrode24is mainly configured using one selected out of polysilicon, tungsten, and aluminum as a main component.

Consequently, occurrence of a dark current and white spots in the photodiode PD can be further suppressed.

In the solid-state imaging element1according to the embodiment, the low absorption member26is configured using one selected out of silicon oxide, hafnium oxide, aluminum oxide, and titanium oxide as a main component.

Consequently, the low absorption member26can be easily formed or scattering of the light L can be suppressed at the end portion on the light incident side in the low absorption member26.

The solid-state imaging element1according to the embodiment further includes a plurality of on-chip lenses (OCLs44) that make the light L incident on photoelectric conversion sections (photodiode PDs) corresponding thereto. The separation region23includes the first separation region23aand the second separation region23b. The first separation region23aseparates a plurality of photoelectric conversion sections (photodiodes PD) on which the light L is made incident via different on-chip lenses (OCLs44). The second separation region23bseparates a plurality of photoelectric conversion sections (photodiodes PD) on which the light L is made incident via the same on-chip lens (OCL44). The low absorption member26located in the second separation region23bis disposed up to a position deeper than the low absorption member26located in the first separation region23a.

Consequently, in the light receiving pixel11that can detect a phase difference of the light L, it is possible to further suppress deterioration in the condensing characteristic for the pair of photodiodes PD1and PD2.

The method of manufacturing the solid-state imaging element1according to the embodiment includes a step of forming the trench T1, a step of filling the trench T1with the low absorption member26, a step of forming the insulating film25, and a step of filling the trench T1with the wall-like electrode24. In the step of forming the trench T1, the trench T1is formed on the surface20bof the semiconductor substrate120on the opposite side of the light incident side. In the step of filling the trench T1with the low absorption member26, the trench T1is filled with the low absorption member26up to the given depth X from the bottom of the trench T1. In the step of forming the insulating film25, the insulating film25is formed on the side surface T1afrom the given depth X of the trench T1to the opening. In the step of filling the trench T1with the wall-like electrode24, the remaining part of the trench T1is filled with the conductive wall-like electrode24. The wire32aformed in the wiring layer30is connected to the wall-like electrode24. The low absorption member26has a light absorption rate smaller than that of the wall-like electrode24.

Consequently, it is possible to easily form the solid-state imaging element1in which deterioration in the condensing characteristic for the photodiode PD is suppressed and it is possible to prevent positional deviation between the low absorption member26and the wall-like electrode24.

The method of manufacturing the solid-state imaging element1according to the embodiment further includes a step of reducing impurity concentration. In the step of reducing impurity concentration, impurity concentration of a region from depth corresponding to the bottom of the trench T1to the given depth X is reduced to be smaller impurity concentration of a region from the given depth X to the surface20bon the opposite side of the light incident side of the semiconductor substrate120.

Consequently, it is possible to form the solid-state imaging element1in which occurrence of white spots in the photodiode PD is suppressed.

Note that the present disclosure is not limited to application to the solid-state imaging element. That is, the present disclosure is applicable to, besides the solid-state imaging element, all kinds of electronic equipment including the solid-state imaging element such as a camera module, an imaging device, a mobile terminal device having an imaging function, or a copying machine using the solid-state imaging element in an image reading section.

Examples of such an imaging device include a digital still camera and a video camera. Examples of such a portable terminal device having the imaging function include a smartphone and a tablet terminal.

FIG.25is a block diagram illustrating a configuration example of an imaging device functioning as electronic equipment1000to which the technology according to the present disclosure is applied. The electronic equipment1000inFIG.25is, for example, electronic equipment such as an imaging device such as a digital still camera or a video camera or a mobile terminal device such as a smartphone or a tablet terminal.

InFIG.25, the electronic equipment1000is configured from a lens group1001, a solid-state imaging element1002, a DSP circuit1003, a frame memory1004, a display section1005, a recording section1006, an operation section1007, and a power supply section1008.

In the electronic equipment1000, the DSP circuit1003, the frame memory1004, the display section1005, the recording section1006, the operation section1007, and the power supply section1008are mutually connected via a bus line1009.

The lens group1001captures incident light (image light) from a subject and forms an image on an imaging surface of the solid-state imaging element1002. The solid-state imaging element1002corresponds to the solid-state imaging element1according to the embodiment explained above and converts an amount of the incident light imaged on the imaging surface by the lens group1001into an electric signal in sections of pixels and outputs the electric signal as a pixel signal.

The DSP circuit1003is a camera signal processing circuit that processes a signal supplied from the solid-state imaging element1002. The frame memory1004temporarily holds image data processed by the DSP circuit1003in sections of frames.

The display section1005is configured from, for example, a panel type display device such as a liquid crystal panel or an organic electro luminescence (EL) panel and displays a moving image or a still image captured by the solid-state imaging element1002. The recording section1006records image data of a moving image or a still image captured by the solid-state imaging element1002in a recording medium such as a semiconductor memory or a hard disk.

The operation section1007issues operation commands for various functions of the electronic equipment1000according to an operation by a user. The power supply section1008appropriately supplies various kinds of electric power serving as operation power for the DSP circuit1003, the frame memory1004, the display section1005, the recording section1006, and the operation section1007to these supply targets.

In the electronic equipment1000configured as explained above, by applying, as the solid-state imaging element1002, the solid-state imaging element1in the embodiments explained above, it is possible to suppress deterioration in the condensing characteristic for the photodiode PD.

[Application Example to a Mobile Body]

The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be implemented as a device mounted on a mobile body of any type such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility, an airplane, a drone, a ship, and a robot.

The example of the vehicle control system to which the technology according to the present disclosure can be applied is explained above. The technology according to the present disclosure can be applied to the imaging section12031among the configurations explained above. Specifically, the solid-state imaging element1inFIG.1can be applied to the imaging section12031. By applying the technology according to the present disclosure to the imaging section12031, a high-quality image can be acquired from the imaging section12031.

Although the embodiments of the present disclosure are explained above, the technical scope of the present disclosure is not limited to the embodiments explained above per se. Various changes are possible without departing from the gist of the present disclosure. Components in different embodiments and modifications may be combined as appropriate.

The effects described in the present specification are only examples and are not limited. There may be other effects.

Note that the present technology can also take the following configurations.

A solid-state imaging element comprising:a semiconductor layer including a plurality of photoelectric conversion sections disposed in a matrix; anda separation region that separates the photoelectric conversion sections adjacent to each other in the semiconductor layer, whereinthe separation region includes:a wall-like electrode disposed in a wall shape, a negative bias voltage being applied to the wall-like electrode; anda low absorption member disposed further on a light incident side than the wall-like electrode and having a light absorption rate smaller than a light absorption rate of the wall-like electrode.

The solid-state imaging element according to the above (1), whereinthe photoelectric conversion sections include a first region adjacent to the wall-like electrode and a second region adjacent to the low absorption member, andimpurity concentration of the second region is lower than impurity concentration of the first region.

(3) The solid-state imaging element according to the above (1) or (2), whereinthe low absorption member is disposed up to a depth of 800 (nm) or more from a light incident surface of the semiconductor layer.

The solid-state imaging element according to any one of the above (1) to (3), wherein the wall-like electrode is configured using one selected out of polysilicon, tungsten, and aluminum as a main component.

The solid-state imaging element according to any one of the above (1) to (4), whereinthe low absorption member is configured using one selected out of silicon oxide, hafnium oxide, aluminum oxide, and titanium oxide as a main component.

The solid-state imaging element according to any one of the above (1) to (5), further comprisinga plurality of on-chip lenses that make light incident on the photoelectric conversion sections corresponding thereto, whereinthe separation region includes:a first separation region that separates the plurality of photoelectric conversion sections on which light is made incident via different pieces of the on-chip lenses; anda second separation region that separates the plurality of photoelectric conversion sections on which light is made incident via a same piece of the on-chip lenses, andthe low absorption member located in the second separation region is disposed to a position deeper than the low absorption member located in the first separation region.

A method of manufacturing a solid-state imaging element, comprising:a step of forming a trench on a surface on an opposite side of a light incident side of a semiconductor substrate;a step of filling the trench with a low absorption member up to given depth from a bottom of the trench;a step of forming an insulating film on a side surface of the trench from the given depth to an opening of the trench;a step of filling a remaining part of the trench with a conductive wall-like electrode; anda step of forming a wiring layer on a surface on the light incident side of the semiconductor substrate, whereina wire formed in the wiring layer is connected to the wall-like electrode, andthe low absorption member has a light absorption rate smaller than a light absorption rate of the wall-like electrode.

The method of manufacturing a solid-state imaging element according to the above (7), further comprisinga step of reducing impurity concentration of in a region from depth corresponding to the bottom of the trench to the given depth to be lower than impurity concentration in a region from the given depth to the surface on the opposite side of the light incident side of the semiconductor substrate.

Electronic equipment comprising:a solid-state imaging element;an optical system that captures incident light from a subject and forms an image on an imaging surface of the solid-state imaging element; anda signal processing circuit that performs processing on an output signal from the solid-state imaging element, whereinthe solid-state imaging element includes:a semiconductor layer including a plurality of photoelectric conversion sections disposed in a matrix; anda separation region that separates the photoelectric conversion sections adjacent to each other in the semiconductor layer, andthe separation region includes:a wall-like electrode disposed in a wall shape, a negative bias voltage being applied to the wall-like electrode; anda low absorption member disposed further on a light incident side than the wall-like electrode, the low absorption member having a light absorption rate smaller than a light absorption rate of the wall-like electrode.

The electronic equipment according to the above (9), whereinthe photoelectric conversion section has a first region adjacent to the wall-like electrode and a second region adjacent to the low absorption member, andimpurity concentration of the second region is lower than impurity concentration of the first region.

The electronic equipment according to the above (9) or (10), whereinthe low absorption member is disposed up to depth of 800 (nm) or more from a light incident surface of the semiconductor layer.

The electronic equipment according to any one of the above (9) to (11), whereinthe wall-like electrode is configured using one selected out of polysilicon, tungsten, and aluminum as a main component.

The electronic equipment according to any one of the above (9) to (12), whereinthe low absorption member is configured using one selected out of silicon oxide, hafnium oxide, aluminum oxide, and titanium oxide as a main component.

The electronic equipment according to any one of the above (9) to (13), further comprisinga plurality of on-chip lenses that make light incident on the photoelectric conversion section corresponding thereto, whereinthe separation region includes:a first separation region that separates a plurality of the photoelectric conversion sections on which light is made incident via different pieces of the on-chip lenses; anda second separation region that separates the plurality of photoelectric conversion sections on which light is incident via a same piece of the on-chip lenses, andthe low absorption member located in the second separation region is disposed up to a position deeper than the low absorption member located in the first separation region.

REFERENCE SIGNS LIST