Signal processing system having an ADC delta-sigma modulator with single-ended input and feedback signal inputs

Signal processing systems described herein include an analog-to-digital delta sigma modulator to process a single-ended input signal using a single-ended analog feedback reference signal. The delta sigma modulator includes a switched capacitor circuit that integrates a difference between the single-ended input signal and the single-ended analog feedback signal derived from a quantization output of the delta sigma modulator. Embodiments of the switched capacitor circuit allow the delta sigma modulator to be implemented with fewer switches, less complicated reference signal generators, and smaller capacitors relative to conventional counterparts. Thus, embodiments of the delta sigma modulator described herein can cost less to build and use less power. Embodiments of the signal processing systems can be implemented in single and multi-bit delta sigma modulators and various sampling topologies, including single and double sampling topologies.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates in general to the field of signal processing, and more specifically to an analog-to-digital system having a switched capacitor delta-sigma modulator for processing a single-ended input signal and a single-ended analog feedback signal.

2. Description of the Related Art

Many signal processing systems implement look-ahead delta-sigma modulators to process analog and digital signals. “Delta-sigma modulators” are also commonly referred to using other interchangeable terms such as “sigma-delta modulators”, “delta-sigma converters”, “sigma delta converters”, and “noise shapers”.

FIG. 1depicts a conventional topology of an analog-to-digital converter (“ADC”) delta sigma modulator100that converts a single-ended input signal, Vin, into a binary digital output signal, D. The delta sigma modulator100includes an adder102that adds the input signal Vinto a negative of an analog feedback signal (“Vfb”) from digital-to-analog converter (“DAC”)104to determine a difference signal, Vdiff, i.e. Vdiff=Vin−Vfb. Noise shaping filter106with a transfer function H(z) filters difference signal, Vdiff, to shift noise signals out of the baseband, e.g. 0 Hz to 20 kHz for audio applications, and integrate Vdiff. The quantizer108quantizes the output signal of filter106. In a one-bit delta sigma modulator, the quantizer108quantizes the output signal of filter106as either a logical +1 or −1, and multi-bit quantizers use multiple bits to quantize the output signal of filter106. Signal D represents the output signal of delta sigma modulator100. Delta sigma modulator100includes a feedback loop to feedback signal D to DAC104. Multi-bit delta sigma modulators include dynamic element matching components110in the feedback path between the output of quantizer108and the input of DAC104. The DAC104converts the quantizer output signal D into an analog feedback signal Vref. The analog feedback signal Vref=Vref+ when the output D of quantizer108=+1, and signal Vref=Vref− when the output signal D of quantizer108=−1. Generally, DAC104converts a one-bit delta sigma modulator logical +1 output to a predetermined voltage and converts a logical −1 to a lower voltage.

FIG. 2depicts delta sigma modulator100with a third order, feed forward filter106. Filter106includes three integration stages, I1, I2, and I3, and a local resonator feedback gi. The output signals of each integration stage are scaled by factors k1, k2, and k3. The particular design of filter106is a matter of design choice using well-known filter design principles.

FIG. 3Adepicts a switched capacitor circuit300that implements adder102, integrator I1, and DAC104. In general, switched capacitor circuit300uses a sampling circuit, sampling capacitors Csp1and Csp2, reference capacitors Crp and Crs, and positive and negative feedback capacitors Copp and Copn, to sample Vref, determine Vin+(−Vref), and integrate Vin+(−Vref). Input signal Vinis a single-ended input and is referenced against signal Vcm1when sampling at time t.

A sampling circuit of switched capacitor circuit300includes a set of switches301–306that conduct in accordance with switch control signal (P1, switches307and308conduct in accordance with switch control signal φ1when D equals logical +1. Switches309and310conduct in accordance with switch control signal φ2when {overscore (D)} equals a logical +1, and switches312–319that conduct in accordance with switch control signal φ2. Each bit of output signal D is an element of the set {+1, −1}, and D is the complement of {overscore (D)} on a bit-by-bit basis.

As depicted inFIG. 3B, switch control signals φ1and φ2are non-overlapping. Control signals φ1and φ2can be generated using a clock signal generator. φ1+ and φ2+indicate logical +1 signals, and φ1− and φ2− indicate logical −1 signals. The description assumes that switches under the control of signals φ1and φ2conduct for logical +1 and do not conduct for logical −1, and the actual voltage or current values of logical +1 and logical −1 are switch dependent. The frequency and shape of control signals φ1and φ2is a matter of design choice. When φ1is a logical +1, φ2is a logical −1, and assuming that Vcm1=Vcm2=0, the switched capacitor circuit300samples Vin(k) across capacitor Csp1, Vcm across capacitor Csp2, and Vref across capacitors Crp and Crs. When φ1is a logical −1, φ2is a logical +1, and assuming Vcm1=Vcm2=0, switched capacitor circuit300differentially applies Vin(k−1)−Vref(k−1) and Vcm-Vref across the input terminals of a differential output operational-amplifier320. Charge in proportion to Vin−Vref and Vcm1−Vref is integrated by switched capacitor circuit300. Vref=Vref+ if D=+1, and Vref=Vref− if D=−1.

Reference voltage Vcm1can be any reasonable reference voltage that allows switched capacitor circuit300to sample input signal Vin.

FIG. 4depicts a double sampling switched capacitor circuit400. Switched capacitor circuit400double samples the input signal Vin, using sampling circuit402, and differentially double samples reference analog feedback signal Vref using sampling circuit404. Using the assumptions of Table 1 and since feedback signal Vref is differentially double sampled and single ended input signal Vinis double sampled:
Vout(k)=Vout(k−1)+2·Vin(k−1)·Cs/Cop−4·Vref·D(k−1)·Cr/Cop.

One of the drawbacks of switched capacitor circuits300and301is that Vcm1becomes part of the input signal Vin. Accordingly, buffer322is designed to provide a low-noise reference voltage Vcm. For example, buffer322can be designed as an operational-amplifier configured as a unity gain voltage follower. Buffer322can increase the cost of generating voltage Vcm due to, for example, increased part costs and power consumption.

Another drawback of switched capacitor circuits300and400is the complexity of the sampling circuits and the number of switches involved. Increasing the number of switches increases costs and potentially increases noise within delta sigma modulator100. Additionally, the sampling capacitors Csp1and Csp2and reference capacitors Crp and Crs are generally large, and, thus, expensive.

SUMMARY OF THE INVENTION

In one embodiment of the present invention, a signal processing system includes a single-ended input analog-to-digital delta sigma modulator. the analog-to-digital delta-sigma modulator further includes a switched capacitor circuit having a differential integrator. The differential integrator includes a first input terminal to receive a first input signal derived from a sampled, single-ended input signal relative to a first reference voltage, a second input terminal to receive a second input signal derived from a sampled, single-ended analog feedback signal relative to a second reference voltage, and integration circuitry to provide a differential output representing an integration of a difference between the first and second input signals.

In another embodiment of the present invention, a method of converting an analog signal into a digital signal using a single-ended delta-sigma modulator having a switched capacitor circuit includes deriving a first input signal from a sampled, single-ended input signal relative to a first reference voltage. The method further includes applying the first input signal to a first terminal of a differential integrator of the switched capacitor circuit, deriving a second input signal from a sampled, single-ended analog feedback signal relative to a second reference voltage, and applying the second input signal to a second terminal of the differential integrator concurrently with the application of the first input signal to the first terminal. The method also includes generating a differential output signal from a difference between the first and second input signals and converting the output signal into a digital signal.

In a further embodiment of the invention, a method of converting an analog signal using a single-ended delta-sigma modulator having a switched capacitor circuit includes sampling a single-ended input signal, and sampling a single-ended analog feedback signal, wherein the input signal and analog feedback signal are referenced to at least one common mode reference voltage. The method also includes applying the sampled, single-ended input signal and sampled, single-ended analog feedback signal to respective input terminals of a differential integrator, integrating a difference between the sampled single-ended input signal and the sampled analog feedback signal, and providing a differential output representing the integrated difference between the sampled single-ended input signal and the sampled analog feedback signal.

In another embodiment of the present invention, a signal processing system includes an analog-to-digital delta sigma modulator. The analog-to-digital delta sigma modulator includes a switched capacitor circuit having components to implement a summer, integrator, and digital-to-analog converter, a quantizer coupled to an output of the switched capacitor circuit to quantize an input signal to the quantizer and generate a quantization output signal, and a feedback loop to provide the quantization output signal to an input of the switched capacitor circuit. The switched capacitor circuit further includes a sampling circuit to sample a single-ended input signal, a sampling circuit to sample a single-ended analog feedback signal derived from the quantization output signal, and a differential output operational-amplifier configured as an integrator, the operational-amplifier having respective input terminals to receive the sampled single-ended input signal and sampled single-ended analog feedback signal and a differential output to provide an integration of a difference between the sampled single-ended input signal and sampled single-ended analog feedback signal.

DETAILED DESCRIPTION

Signal processing systems described herein include an analog-to-digital delta sigma modulator to process a single-ended input signal using a single-ended analog feedback reference signal. The delta sigma modulator includes a switched capacitor circuit that integrates a difference between the single-ended input signal and the single-ended analog feedback signal derived from a quantization output of the delta sigma modulator. Embodiments of the switched capacitor circuit allow the delta sigma modulator to be implemented with fewer switches, cheaper reference signal generators, less noise, and, thus, smaller capacitors relative to conventional counterparts. Thus, embodiments of the delta sigma modulator described herein can cost less to build and use less power during operation.

FIG. 5depicts a signal processing system500for processing the analog input signal Vin. An analog signal source502, such as a microphone amplifier, generates analog input signal Vin. The signal processing system500also often includes anti-aliasing filters to preprocess input signal Vinprior to applying input signal Vinto delta sigma modulator504. The analog-to-digital delta sigma modulator504converts input signal Vininto a quantized output signal D. Subsequent signal processing components process quantized output signal D in a well-known manner to generate output signal Vout. The signal client508uses the output signal Voutin any number of ways. For example, in one embodiment, signal client508encodes output signal Vouton a signal storage medium, such as a digital versatile disk, a compact disk, or super audio compact disk. In another embodiment, signal client508represents audio speakers that convert output signal Voutinto sound.

FIG. 6depicts delta sigma modulator600, which represents one embodiment of delta sigma modulator504. The delta sigma modulator600includes an adder601that adds single-ended analog input signal Vinto the negative of a single-ended, analog feedback signal Vref. The delta sigma modulator600also includes a filter602having a transfer function H(z). The filter602includes a first integrator I1and, for an N-order filter, includes N−1 additional integrators and other filter elements603. Quantizer604quantizes an output signal of filter602using an M-bit quantizer, and M is greater than or equal to one. For a multibit quantizer604, i.e. M>1, delta-sigma modulator600generally includes dynamic element matching components606in the feedback path between the output of quantizer604and the input of DAC608. Adder601, integrator I1, and DAC608are implemented by a switching capacitor circuit610.

FIG. 7depicts switching capacitor circuit700, which represents one embodiment of switching capacitor circuit610. The switching capacitor circuit700includes a differential integrator711to integrate a difference between signals respectively derived from the input signal Vinand the analog feedback signal Vref. Input signal Vinand analog feedback signal Vref are both single-ended input signals applied to respective input terminals of switching capacitor circuit700. Equation 1 defines the relationship between Vref and the quantization output signal D for an M-bit delta sigma modulator: For a single bit delta sigma modulator, the i subscript is omitted.Vrefi={Vref+;Di=+1Vref-;Di=-1⁢⁢i∈{0,1,2,…⁢,M-1}.Equation⁢⁢1
The sampling circuit switches of switching capacitor circuit700are controlled by control signals φ1and φ2. One embodiment of control signals φ1and φ2is depicted inFIG. 3B. Control signal φ1+causes switches701–703to conduct, and control signal φ2− causes switches704–706to not conduct. Control signal (P1+causes switch708to conduct if D=1, thus sampling signal Vref+(k) across reference capacitor Cr. Otherwise, switch709conducts, thus causing signal Vref−(k) to be sampled across reference capacitor Cr. Input signal Vin(k) is sampled across sampling capacitor Cs when φ1=φ1+ and φ2=φ2−. Both signals Vinand Vref are sampled relative to a common mode reference voltage Vcm1and applied to differential inputs of operational-amplifier710.

Control signal φ2+causes switches to704–706to conduct, and control signal φ1− causes switches701–703and707–708to not conduct, thus causing charge from input signal Vin(k−1) and feedback signal Vref(k−1) to be transferred to respective operational-amplifier feedback capacitors Copp and Copn. (Vin(k) at time t=Vin(k−1) at time t+1). Using the relationships set forth in Table 1 and halving sampling capacitor Cs and reference capacitor Cr relative to corresponding values for delta sigma modulator100:
Vout(k)=Vout(k−1)+Vin(k−1)·Cs/Cop−Vref·D(k−1)·Cr/Cop.

Thus, the architecture of switching capacitor circuit700is greatly reduced relative to conventional ADC delta sigma modulators. For example, the relatively expensive, low noise common mode voltage reference buffer for Vcm1is greatly simplified or eliminated, components of the sampling circuit are eliminated thus reducing part count and simplifying operation. The size and number of sampling and reference capacitors are reduced saves chip layout real estate, reduces costs, and better facilitates use of switching capacitor circuit700in a low power design.

FIG. 8depicts switched capacitor circuit800, which is one embodiment of a double sampling version of switching capacitor circuit700. The switched capacitor circuit800functions identically to switching capacitor circuit700except that sampling circuit802alternates in time the input terminals to which single-ended input signal Vinand single-ended analog feedback signal Vref are applied. In other words, switching capacitor circuit700alternately couples input signal Vinto input terminals804and806and alternately couples analog feedback signal Vref to input terminals806and804without overlapping input signal Vinand feedback signal Vref. Additionally, by alternating input signal Vinand feedback signal Vref between input terminals of switched capacitor circuit800, the reference voltage Vcm1is eliminated altogether. The natural common mode rejection of operational-amplifier710permits conditioning of reference voltage Vcm1by a less expensive, signal path reference voltage buffer or complete elimination of the signal path reference voltage buffer Using the settings set forth in Table 1 and halving sampling capacitor Cs and reference capacitor Cr relative to corresponding values for delta sigma modulator100:
Vout(k)=Voutp(k−1)+2·Vin(k−1)·Cs/Cop−2·Vref·D(k−1)·Cr/CopEquation 2

The doubling term “2” in Equation 2 occurs because I+Vin(k−½) is approximately 2 when the sampling frequency, Fs, of switching capacitor circuit700is several times, e.g. 64 or 128, higher than the Nyquist frequency relative to the upper frequency of the baseband. For example, in an audio signal processing application, the baseband extends from 0 Hz to approximately 20 kHz, the Nyquist frequency is 48 kHz, and Fsis, for example, 3.072 MHz.

FIG. 9depicts multi-bit switched capacitor circuit900, which is a multi-bit version of switched capacitor circuit800. For an n-bit quantizer604, the multi-bit switched capacitor circuit900replicates sampling circuit802, sampling capacitor Cs, reference capacitor Cr, and input terminals804and806n times. Thus, multi-bit switched capacitor circuit900achieves the advantages of switching capacitor circuit700and switched capacitor circuit800in a multi-bit implementation.

Although the present invention has been described in detail, it should be understood that various changes, substitutions and alterations can be made hereto without departing from the spirit and scope of the invention as defined by the appended claims. For example, delta sigma modulator504can include a filter602can be any order.