Temperature-compensation network embodiments are provided to generate compensation signals which may be useful in improving the performance of a variety of important systems. An embodiment includes a limit current mirror configured to provide a limit current, a current generator to provide a slope current whose magnitude varies with temperature, and an output current mirror positioned to receive the limit current and the slope current and configured to provide a compensation current. In addition, a floating voltage reference is provided for use in various networks which include the temperature-compensation networks. The temperature-compensation networks may be used to improve performance in systems such as a panel driver which provides turn-on and turn-off gate voltages to transistors in liquid crystal displays.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates generally to temperature-compensation structures.

2. Description of the Related Art

Efficient temperature-compensation networks can provide considerable value by improving the performance of a variety of important systems. One system example is a liquid crystal display that is formed with active arrays of thin film transistors. Display panels for this type of display are typically referred to as thin film transistor, liquid crystal display panels or TFT LCD panels. These panels include a large number of display pixels that are generally arranged in rows and columns between a pair of glass substrates which are each covered with a sheet of polarizer film.

Each pixel actually comprises three color subpixels which are each formed by positioning a color filter (either red, green or blue) and a transparent pixel electrode on opposite inner faces of the glass substrates, filling the space between with a liquid crystal, and coupling the drain of a TFT to a storage capacitor via the pixel electrode. At an operational refresh rate (e.g., 60 Hz), an activation voltage is applied to the gate of the TFT while an image signal is applied to its source.

An image voltage is thus applied to the liquid crystal and momentarily held by the storage capacitor. In response to the image voltage, the liquid crystal rotates the polarization of passing light (originating, for example, in a backlight) which, in combination with the polarization of the polarizer films, adjusts the brightness of the light emanating from the respective subpixel. An exemplary TFT LCD panel may be arranged with 768 rows and 1024 columns so that it comprises 2,359,296 subpixels and an equal number of TFT's.

Unfortunately, the performance of TFT LCD panels degrades at temperature extremes because important display parameters (e.g., TFT threshold voltage and liquid crystal viscosity) vary over temperature. This temperature degradation can be significantly reduced with the information provided by temperature-compensation networks whose configuration preferably facilitates their inclusion within panel integrated circuits.

BRIEF SUMMARY OF THE INVENTION

The present disclosure is generally directed to temperature-compensation networks. The drawings and the following description provide an enabling disclosure and the appended claims particularly point out and distinctly claim disclosed subject matter and equivalents thereof.

DETAILED DESCRIPTION OF THE INVENTION

FIGS. 1,2and4illustrate structure and performance of temperature-compensation network embodiments that generate compensation signals which may be useful in improving the performance of a variety of important systems.FIG. 3illustrates a floating voltage reference which may be used in a variety of networks such as those ofFIGS. 1 and 4. The temperature-compensation network ofFIG. 4may be used to improve temperature performance in a panel driver ofFIG. 5which provides turn-on and turn-off gate voltages to transistors in liquid crystal displays. The transfer function of the temperature-compensation networks can be easily modified by selection of a minimal set of elements (e.g., a temperature transducer and two resistors).

In particular,FIG. 1illustrates a temperature-compensation network20that can generate a compensation current22(at an output port23) with an amplitude that responds in a selectable way to temperature. For example, the graph24ofFIG. 2illustrates a plot25of the compensation current22that is substantially zero for temperatures above a “hot point” temperature, increases at a selected slope as the temperature drops below the hot point, and then remains substantially fixed as the temperature drops below a “cold point” temperature. As subsequently described, the hot point, the slope and the cold point can be selectively adjusted.

In detail, the network20ofFIG. 1includes a limit current mirror26, a current generator28, and an output current mirror30. The limit current mirror has a transistor31that can be diode-coupled to thereby set a current through a limit resistor33. A mirror transistor34is then gate-coupled to the diode-coupled transistor31to thereby mirror a limit current32to the output current mirror30.

In another network embodiment, a differential amplifier36can be inserted between the drain and gate of the transistor31with the non-inverting input of the amplifier biased with an input voltage Vifrom a voltage reference37. The high gain of the differential amplifier forces the voltage at the top side of the limit resistor33to substantially be the input voltage Vi. To enhance efficiency of the network20, the gate width of the transistor31is preferably reduced from that of the mirror transistor34to thereby reduce the amplitude of the current through the limit resistor33.

The current generator28is formed with a floating voltage reference40and a slope transistor41that are both coupled to the top of a slope resistor43. The slope transistor41is driven by a differential amplifier44that responds to the difference between a reference voltage Vrof the voltage reference40and a temperature-sensitive voltage Vt. When the temperature-sensitive voltage Vtis less that the voltage reference Vt, the differential amplifier cannot generate a gate voltage sufficient to turn on the slope transistor41. When the temperature-sensitive voltage Vtexceeds the threshold voltage of the slope transistor41, however, this transistor turns on and drives a slope current42through the slope resistor43. Because of the high gain of the differential amplifier41, its input terminals can be considered to have equal potentials so that a slope voltage Vsacross the slope resistor43closely approximates Vt+Vt.

The temperature-sensitive voltage Vtcan be generated with any of a variety of temperature transducers50. An exemplary transducer is formed by passing the current (e.g., a current on the order of 10 microamperes) of a current source45through a temperature-sensitive impedance46. Although the impedance46can simply be a suitably-chosen thermistor, example arrow47indicates it may also be formed with a thermistor Rthmtrand at least one resistor coupled in a selected one of series and parallel arrangements with the thermistor. For example, a resistor48can be inserted in series with the thermistor and/or a resistor49can be inserted in parallel with the thermistor. Accordingly, desired shifting and/or linearizing effects may be applied to the temperature response of the thermistor.

The output current mirror30is arranged to receive the limit current32from the mirror transistor34of the limit current mirror26. The mirror30is formed with a diode-coupled transistor51that receives the slope current42from the current generator28and a mirror transistor52that is gate-coupled to the diode-coupled transistor. As shown inFIG. 1, the mirror transistor52has a first current terminal coupled to receive the limit current32from the limit current mirror26and a second current terminal coupled to provide the compensation current22at the output port23. To enhance efficiency of the network20, the gate width of the diode-coupled transistor51is preferably reduced from that of the mirror transistor52to thereby reduce the amplitude of the slope current42through the slope resistor43.

In operation, of the output current mirror30, the diode-coupled transistor51receives the slope current42and, in response, the mirror transistor52mirrors the compensation current22to the output port23. As temperature drops, the temperature-sensitive voltage Vtincreases which causes the slope transistor41to increase the slope current42. In response, the output current mirror30mirrors an increasing compensation current22to the output port23.

The amplitude of the compensation current22cannot, however, exceed that of the limit current32that is provided to the output current mirror30by the current generator26. Accordingly, the amplitude of the compensation current will increase with falling temperature until it substantially reaches the amplitude of the limit current after which the compensation current amplitude will remain constant.

FIG. 2, for example, shows an exemplary resistance versus temperature curve54that might be generated by suitable selection of elements of the temperature-sensitive circuit46ofFIG. 1. At high temperatures, the resistance of the curve54will not be sufficient to cause the temperature-sensitive voltage VtofFIG. 1to exceed the reference voltage Vrso that the slope current42and the compensation current are both zero. As the temperature drops, the resistance of the curve54rises so that the temperature-sensitive voltage Vtexceeds the reference voltage Vrsufficiently to generate an increasing slope current42which causes the output current mirror30to mirror an increasing compensation current as indicated by the compensation current plot25inFIG. 2. When the amplitude of the compensation current reaches that of the limit current, (32inFIG. 1), the output current mirror30can no longer support an increasing current so that compensation current plot25remains flat with further reduction in the temperature as shown inFIG. 2.

FIG. 1indicates that a particular temperature-compensation network embodiment may be formed by carrying the limit resistor33, the slope resistor43, and the temperature-sensitive circuit46on a printed-circuit board (not shown) and housing the remaining network elements in an integrated circuit that may be carried on the printed-circuit board and that is represented inFIG. 1by the rectangle55. This arrangement facilitates selection and installation of a temperature-sensitive circuit46that has been selected to position the hot point inFIG. 2at a desired temperature. The slope resistor43can then be selected and installed to obtain a desired slope of the compensation current plot25ofFIG. 2between the hot point and the cold point. Finally, the limit resistor33can be selected and installed to position the cold point at a desired temperature.

Before describing an exemplary temperature-compensation application of the network20, attention is directed toFIG. 3which illustrates an embodiment60of the floating voltage reference40ofFIG. 1. This embodiment includes an input diode-coupled transistor62and an input transistor63that is coupled to drive a input current64through the input diode-coupled transistor in response to the reference voltage Vrof a voltage reference61that is applied to the input transistor's gate.

A current mirror68is formed with a diode-coupled transistor65and an output transistor66that is gate-coupled to the diode-coupled transistor. The diode-coupled transistor carries the input current64and mirrors an output current70through an output diode-coupled transistor72and an output transistor73. Input transistor62and output transistor73are transistors of a first polarity and the input diode-coupled transistor63and the output diode-coupled transistor72are transistors of a second different polarity. The gates of the output diode-coupled transistor72and the output transistor73are available to provide a floating voltage reference Vr.

In an embodiment of the voltage reference60, each of the transistors62,63and64is matched (i.e., identical construction) to a respective one of the transistors72,73and74. The input current64is generated because the input reference voltage Vris configured to be greater than the sum of the threshold voltages of transistors62and63. The mirrored output current70then lifts the source of the output transistor73which turns it on to thereby establish the output current70that substantially equals the input current64.

The gate of the output transistor73is a high-impedance port whose voltage level can be set with any input voltage Vinthat is above ground but is less than the sum of the threshold voltages of transistors66,72and73. Because of the transistor match mentioned above, the voltage difference between the gates of transistors72and73will be the same as the reference voltage Vrthat exists between the gates of transistors62and63so that the voltage at the gate of transistor72is Vin+Vr. It is noted that sizing of the transistors may be altered to realize various other embodiments of the floating voltage reference60.

When the embodiment60ofFIG. 3is used inFIG. 1, the gate of the output transistor73is coupled to the source of the slope transistor41. The gate of the output diode-coupled transistor72is then coupled to the high-impedance inverting input of the differential amplifier44to establish the reference voltage between the source of the slope transistor41and the inverting input. In an embodiment of the voltage reference60ofFIG. 3, the voltage reference61may be configured as a band-gap reference so that the voltage of the voltage reference40inFIG. 1is on the order of 1.2 volts. The voltage reference37may also be configured as a band-gap reference so that the input voltage Viis also on the order of 1.2 volts.

Another temperature-compensation network80is shown inFIG. 4. This network includes elements of the network20ofFIG. 1with like elements indicated by like reference numbers. In addition, however, the network80adds another mirror transistor81(similar to the mirror transistor52) to the current mirror30and also adds a current mirror82that is driven by the mirror transistor81to thereby supply a second compensation current at a second output port86.

The current mirror82includes a diode-coupled transistor83that is driven by the mirror transistor81and further includes a mirror transistor84that is gate-coupled to the diode-coupled transistor83to mirror its current into the second compensation current85at the output port86. To enhance efficiency of the current mirror82, the gate widths of the transistors81and83are preferably reduced from that of the mirror transistor84to thereby reduce the current needed to generate the second compensation current.

The graph24ofFIG. 2also includes a plot87of the second compensation current85. The plot87is substantially the inverse of the plot25which represented the first compensation current22ofFIG. 4. Although the amplitude of the two plots are shown to be equal, they may be adjusted to differ as described above. It is noted that the absolute size of transistors (e.g., transistors34,51,5281,83and84) in the networks20and80ofFIGS. 1 and 4may be selected in accordance with their currents and voltages and that their relative size may be adjusted to reduce current drain and enhance accuracy and matching.

The temperature-compensation networks of the disclosure find use in a variety of systems. An exemplary system is that of a TFT-LCD panel which arranges display pixels in rows and columns of a panel matrix. At each row-column intersection, three thin film transistors are arranged to drive respective liquid crystal elements to respectively determine the brightness of red, green and blue pixel components at that intersection. Each of the three components can thus be considered to be generated at a sub-pixel.

In an exemplary active matrix display operation, the transistor gates in a selected matrix row are briefly biased on with a high gate voltage (e.g., 25 volts) while the transistor gates of all other matrix rows are biased off with a low gate voltage (e.g., −10 volts). With the gates of that row biased on, column image drivers each apply a respective analog image voltage to the drain of a corresponding transistor in the selected row to thereby establish the color brightness of an associated sub-pixel.

The analog drain voltage is typically derived from an eight-bit signal so that the color at the associated pixel is selectable over a 24-bit range. This process is repeated for all rows of the display in order to complete a refresh cycle for the total display. Each transistor generally drives a capacitor which holds the applied data voltage until the next refresh cycle. Several refresh cycles (e.g., 60) are completed each minute.

As the temperature decreases, the threshold voltage of the thin film transistors changes which degrades the accuracy of their response to the column image signals. In addition, crystal viscosity increases so that subpixel response time degrades. These effects may substantially degrade the visual quality of the display. It has been found that this degradation can be substantially reduced by properly varying the amplitudes of high and low gate voltages that are used to bias on and off the transistor gates in a selected matrix row.

This process is accomplished in the panel driver90ofFIG. 5that provides high gate voltage Vhighand a low gate voltage Vlowto the row driver logic91of a liquid crystal display. The display includes panel pixels92that are formed with rows of sub-pixel thin film transistors. The row driver logic is configured to apply the high gate voltage Vhigto turn on transistors in sequentially-selected ones of the rows while applying the low gate voltage Vlowto turn off the transistors in others of the rows.

In the panel driver90, the high and low gate voltages are respectively provided to the row driver logic by first and second switching regulators93and94which may be realized with various conventional switching regulator structures (e.g., charge pump regulator and buck-boost switching regulator) that provide selectable output voltages in response to an input voltage Vin.

The first switching regulator93includes a differencer95that provides a feedback error signal as the difference between the high gate voltage Vhighand a first reference voltage Vr1. The feedback error signal enables the first switching regulator to generate the desired high gate voltage Vhighfrom the regulator's input voltage Vin. The high gate voltage Vhighis generally provided to the differencer through an impedance which is represented inFIG. 5with a resistor96. In a similar arrangement, the second switching regulator94includes a differencer97that provides a feedback error signal as the difference between the low gate voltage Vlowand a second reference voltage Vr2wherein the low gate voltage Vlowis provided to the differencer through a resistor98.

The temperature-compensation network80ofFIG. 4is arranged inFIG. 5to pull its second compensation current85out of the differencer95which essentially acts as a current summing point. The feedback control of the first switching regulator will maintain the voltage at the bottom of the resistor96substantially equal to the reference voltage Vr1. To do this it inserts a current through the resistor96that substantially nulls out the effect of the second compensation current85.

The temperature-compensation network80is also arranged inFIG. 5to push its first compensation current22into the differencer95. In order to maintain the voltage at the top of the resistor98substantially equal to the reference voltage Vr1, the network80pulls a current through the resistor98that substantially nulls out the effect of the first compensation current22.

Because of the current through the resistor96, the amplitude of the high gate voltage Vhighincreases (e.g, from +25V to +35V) with decreases in temperature. Because of the current through the resistor98, the amplitude of the low gate voltage Vlowalso increases (e.g, from −10V to −20V) with decreases in temperature. These increased gate voltages are structured to substantially track the shift of threshold voltages in the thin film transistors and thereby reduce display degradation of the visual quality of the display.