Photodetector device and optical encoder device

A photodetector device and an optical encoder device that can suppress level variation of a detection signal are provided. A photodetector device of one embodiment includes: a light receiving unit including a plurality of photoelectric conversion elements; a selector circuit that selects a first photoelectric conversion element group and a second photoelectric conversion element group, in the light receiving unit; a differential amplifier that outputs a detection signal in accordance with a difference between a first output signal of the first photoelectric conversion element group and a second output signal of the second photoelectric conversion element group; and a correction unit that corrects the detection signal based on the first output signal and the second output signal.

BACKGROUND OF THE INVENTION

Field of the Invention

The present invention relates to a photodetector device and an optical encoder device.

Description of the Related Art

An optical encoder device includes a photodetector device that detects a reflected light from a scale and outputs a detection signal based on the reflected light. The optical encoder device can further use a detection signal from the photodetector device to perform position detection of the scale. When the level of a detection signal from the photodetector device varies and the detection signal becomes unstable, position accuracy may decrease. An optical encoder device disclosed in Japanese Patent Application Laid-Open No. 2005-265512 controls a light source so that the light amount at a light receiving unit becomes constant and obtains a stable detection signal.

SUMMARY OF THE INVENTION

When a stray light other than a reflected light from a scale enters a light receiving unit, the device in Japanese Patent Application Laid-Open No. 2005-265512 is unable to obtain a stable detection signal.

The present disclosure intends to provide a photodetector device and an optical encoder device that can obtain a stable detection signal even when a stray light enters a light receiving unit.

A photodetector device of one embodiment of the present disclosure includes: a light receiving unit including a plurality of photoelectric conversion elements; a selector circuit that selects a first photoelectric conversion element group and a second photoelectric conversion element group, respectively, in the light receiving unit; a differential amplifier that outputs a detection signal in accordance with a difference between a first output signal of the first photoelectric conversion element group and a second output signal of the second photoelectric conversion element group; and a correction unit that corrects the detection signal based on the first output signal and the second output signal.

According to the present disclosure, a stable detection signal can be obtained even when a stray light enters a light receiving unit.

DESCRIPTION OF THE EMBODIMENTS

First Embodiment

FIG. 1andFIG. 2are external views of a photodetector device of the present embodiment.FIG. 1is a perspective view of the photodetector device of the present embodiment, andFIG. 2is a side view of the photodetector device of the present embodiment.

The photodetector device in the present embodiment is applicable to an optical encoder device, for example, includes a light receiving unit1, a signal processing unit2, a light source3, and a substrate4and can detect a reflected light from a scale5. The light receiving unit1, the signal processing unit2, and the light source3are mounted on the upper face in the z direction of the substrate4and formed inside a package40such as a transparent resin.

The light source3is formed of a light emitting diode, for example, and emits a light to the scale5. The scale5is provided to face the substrate4and is configured to be relatively movable in the x direction with respect to the substrate4. The scale5has a predetermined pattern in which reflection portions and non-reflection portions are repeated, and the reflection portions may be formed of a metal film or the like formed on a glass substrate, for example. A plurality of reflection portions are arranged at a certain cycle in the x direction to form a scale track. Note that multiple lines of scale tracks may be formed, and multiple lines of scale tracks may have reflection portions arranged in different cycles, respectively.

The light receiving unit1has a plurality of photodiodes (photoelectric conversion elements), and the plurality of photodiodes are arranged at a certain cycle in the x direction. The light receiving unit1is irradiated with a reflected light7from the scale5. The luminance distribution (brightness and darkness) of the reflected light7at the light receiving unit1corresponds to the pattern of the scale5. When the scale5moves in the x direction, the luminance distribution of the reflected light7at the light receiving unit1also moves in the x direction, and the signal of a photodiode of the light receiving unit1repeatedly changes.

The signal processing unit2includes an amplifier circuit, a comparator circuit, or the like and processes a signal output from the light receiving unit1to output a detection signal in accordance with the position of the scale5. The detection signal changes in accordance with the position of the scale5and can be used as an encoder signal. That is, when the photodetector device of the present embodiment is applied to an optical encoder device, position detection is enabled.

In addition to the reflected light7from the scale5, a stray light8reflected by the package40may reach the light receiving unit1, for example. As described later, the photodetector device of the present embodiment can obtain a stable detection signal even when the stray light8enters the light receiving unit1, and this enables accurate position detection.

Furthermore, in the photodetector device in the present embodiment, the light receiving unit1, the signal processing unit2, and the light source3are provided on the common substrate4. In such a way, the light receiving unit1, the signal processing unit2, and the light source3are formed in a single package, and thereby the relative position of the light receiving unit1and the light source3can be determined at high accuracy, which enables accurate position detection.

FIG. 3is a block diagram of the light receiving unit and the signal processing unit of the present embodiment. The signal processing unit2includes selector circuits20, a detection signal generation unit21, and a correction unit22.

The selector circuit20selects a first photodiode group10A or a second photodiode group10B, which are photoelectric conversion element groups, in the light receiving unit1. The first photodiode group10A includes one or a plurality of photodiodes10, and the second photodiode group10B includes one or a plurality of photodiodes10.

The detection signal generation unit21further includes current-to-voltage conversion amplifiers (hereafter, referred to as “I-V converter circuit”)210aand210b, a reference voltage circuit211, and a differential amplifier circuit212. The I-V converter circuit210aconverts a current of the photodiode10in the first photodiode group10A into a voltage to generate an output signal Vs1. Similarly, the I-V converter circuit210bconverts a current of the photodiode10in the second photodiode group10B into a voltage to generate an output signal Vs2.

The reference voltage circuit211includes a voltage divider circuit, a voltage follower circuit, and the like and outputs a reference voltage Vref. The differential amplifier circuit212includes an operational amplifier, the output signal Vs1is input to the first input terminal of the differential amplifier circuit212, and the output signal Vs2is input to the second input terminal. The differential amplifier circuit212is further supplied with the reference voltage Vref as a bias voltage and generates a detection signal Vd that changes based on the reference voltage Vref as a reference. The detection signal Vd is expressed by the following equation, where the amplification factor of the differential amplifier circuit212is denoted as “A”.
Vd=(Vs1−Vs2)×A(Equation 1)

The correction unit22includes a correction circuit220and an averaging circuit221and generates a correction value Voff based on the output signals Vs1and Vs2. The averaging circuit221uses the maximum voltage Vdmax and the minimum voltage Vdmin of the detection signal Vd to generate an average voltage Vdave of the detection signal Vd. The average voltage Vdave is expressed by the following equation.
Vdave=(Vdmax+Vdmin)/2  (Equation 2)

The correction circuit220generates the correction value Voff based on the average voltage Vdave. The correction value Voff is fed back to the reference voltage circuit211. The relationship between the correction value Voff and reference voltages Vref1and Vref2is as follows, where a reference voltage to be corrected is denoted as “Vref1” and a corrected reference voltage is denoted as “Vref2”.
Voff=Vdave−Vref1  (Equation 3)
Vref2=Vref1−Voff  (Equation 4)

Since the detection signal Vd is a signal in accordance with a difference between the output signals Vs1and Vs2, the correction value Voff obtained from the detection signal Vd is also a signal based on the difference between the output signals Vs1and Vs2. The reference voltage circuit211changes the reference voltage Vref based on the output signals Vs1and Vs2and thereby corrects the detection signal Vd.

FIG. 4is a diagram illustrating the light receiving unit1and the selector circuit20of the present embodiment. As described above, the plurality of photodiodes10of the light receiving unit1are aligned in the x direction. The selector circuit20includes a matrix circuit, and the matrix circuit connects or disconnects a plurality of wirings201, which are connected to the photodiodes10, to or from wirings202aand202bintersecting the plurality of wirings201. The wiring202ais connected to the first photodiode group10A, and the wiring202bis connected to the second photodiode group10B. The selector circuit20can cause any wiring201to be connected to any of the wirings202aand202band select the first photodiode group10A or the second photodiode group10B as appropriate. In such a way, the current signal of the first photodiode group10A is output to the I-V converter circuit210avia the wiring202a, and the current signal of the second photodiode group10B is output to the I-V converter circuit210bvia the wiring202b.

InFIG. 4, the first photodiode group10A is selected in a cycle of every distance d1in the x direction. The second photodiode group10B is similarly selected in a cycle of every distance d1in the x direction. However, the second photodiode group10B is located between the first photodiode groups10A, and the phase of the alignment cycle of the second photodiode groups10B is opposite to the phase of the alignment cycle of the first photodiode groups10A. Thereby, the output signals Vs1and Vs2change with time in a complementary manner.

The reflected light7is emitted to the light receiving unit1in a cycle of every distance d2in the x direction. Here, the distance d2corresponds to the distance between reflection portions of the scale5. To efficiently detect the reflected light7, it is desirable that the distance d2between the reflection portions of the scale5be the same as the distance d1of each of the photodiode groups10A and10B. Further, to have symmetrical waveforms of the output signals Vs1and Vs2, it is desirable that the first photodiode group10A and the second photodiode group10B include the same number of photodiodes10, respectively. Note that the distances d1and d2and the number of photodiodes10of the photodiode groups10A and10B are not necessarily limited to the example described above. Further, any shape of the photodiode10may be defined.

FIG. 5is a circuit example of the detection signal generation unit21of the present embodiment. As described above, the detection signal generation unit21includes the I-V converter circuits210aand210b, the reference voltage circuit211, and the differential amplifier circuit212.

The I-V converter circuit210aincludes a differential amplifier A10, a resistor R10, and a capacitor C10. The inverting input terminal of the differential amplifier A10is connected to the anodes of the plurality of photodiodes10forming the first photodiode group10A, and a reference voltage Vref1is applied to the non-inverting input terminal of the differential amplifier A10. The resistor R10and the capacitor C10are connected in parallel between the inverting input terminal and the output terminal of the differential amplifier A10. The differential amplifier A10forms a current-to-voltage circuit and converts the current of the photodiodes10into a voltage to generate the output signal Vs1. Similarly, the I-V converter circuit210bincludes a differential amplifier A11, a resistor R11, and a capacitor C11and converts the current of the plurality of photodiodes10forming the second photodiode group10B into a voltage to generate the output signal Vs2. Note that, since the I-V converter circuits210aand210binFIG. 5form an inverting amplifier circuit, the voltages of the output signals Vs1and Vs2decrease with respect to the reference voltage Vref1as the current of the photodiodes10increases. In the following description, for simplified illustration, each amplitude of the output signals Vs1and Vs2may be represented as a positive voltage change.

The reference voltage circuit211includes a differential amplifier A12, resistors R16, R17, R18, and R19, and a capacitor C12. The reference voltage circuit211inFIG. 5also functions as the correction circuit220. The resistors R16and R17divide the voltage between the power source voltage (first power source voltage) Vcc and the ground voltage (second power source voltage) to generate the reference voltage Vref1. It is desirable that the resistors R16and R17have the same value and the reference voltage Vref1be an intermediate voltage Vcc/2 between the power source voltage Vcc and the ground voltage. The reference voltage Vref1is applied to the non-inverting input terminal of the differential amplifier A12. Furthermore, the reference voltage Vref1is applied to non-inverting input terminals of the differential amplifiers A10and A11of the I-V converter circuits210aand210b. When the reference voltage Vref1is Vcc/2, the dynamic range of the output signals Vs1and Vs2and the detection signal Vd can be maximized. The resistor R18and the capacitor C12are connected in parallel between the inverting input terminal and the output terminal of the differential amplifier A12of the reference voltage circuit211. Further, the average voltage Vdave from the correction unit22is applied to the inverting input terminal of the differential amplifier A12via the resistor R19as an offset voltage. The differential amplifier A12generates the reference voltage Vref2obtained by correcting the reference voltage Vref1by using the correction value Voff. By selecting the values of the capacitor C12and the resistor R18as appropriate, it is possible to set a gain and a time constant of the feedback loop. For example, to increase the response of the reference voltage Vref to the correction value Voff, the value of the capacitor C12may be reduced.

The differential amplifier circuit212includes a differential amplifier A13and resistors R12, R13, R14, and R15. The output signal Vs1is input to the non-inverting input terminal of the differential amplifier A13via the resistor R12, and the output signal Vs2is input to the inverting input terminal via the resistor R13. The resistor R15is connected between the inverting input terminal and the output terminal of the differential amplifier A13, a signal based on the difference between the output signal Vs1and the output signal Vs2is amplified to output the detection signal Vd. The differential amplifier A13is driven on the power source voltage Vcc and the ground voltage, the detection signal Vd may have a dynamic range from the ground voltage to the power source voltage Vcc. The corrected reference voltage Vref2is applied to the non-inverting input terminal of the differential amplifier A13via the resistor R14as an offset voltage. Thereby, the differential amplifier A13can output the corrected detection signal Vd.

FIG. 6is a circuit example of the averaging circuit221of the present embodiment. The averaging circuit221includes a peak-hold circuit221a, a bottom-hold circuit221b, and an adder circuit221c.

The peak-hold circuit221aincludes differential amplifiers A21and A22, a resistor R23, a capacitor C21, and a diode D21. The detection signal Vd is input to the non-inverting input terminal of the differential amplifier A21. The output terminal of the differential amplifier A21is connected to the anode of the diode D21, and the cathode of the diode D21is connected to the capacitor C21, the resistor R23, and the non-inverting input terminal of the differential amplifier A22. The capacitor C21and the resistor R23are connected in parallel between the cathode of the diode D21and the ground voltage. The output terminal of the differential amplifier A22is connected to the inverting input terminal of the differential amplifier A22and the inverting terminal of the differential amplifier A21.

In the peak-hold circuit221aconfigured as described above, the detection signal Vd is output to the capacitor C21via the diode D21, and the maximum voltage (peak voltage) Vdmax of the detection signal Vd is held in the capacitor C21. The resistor R23discharges charges accumulated in the capacitor C21to the ground voltage at a time constant defined by the resistor R23and the capacitor C21. In order for the capacitor C21to hold the maximum voltage Vdmax for a sufficiently long period, a large time constant of the resistor R23and the capacitor C21is preferable. On the other hand, an excessively large time constant may reduce the response of the peak-hold circuit221a. Thus, it is desirable to define the time constant of the resistor R23and the capacitor C21also taking the response into consideration. Note that, instead of the resistor R23, a discharging transistor switch may be provided in parallel to the capacitor C21, and charges of the capacitor C21may be discharged at a desired timing. In the present embodiment, the maximum voltage Vdmax output from the differential amplifier A22is fed back to the inverting input terminal of the differential amplifier A21. Thus, the maximum voltage Vdmax is not affected by a forward voltage drop in the diode D21, and no level shift occurs in the peak-hold circuit221a.

The bottom-hold circuit221bincludes differential amplifiers A23and A24, a resistor R24, a capacitor C22, and a diode D22. Unlike the peak-hold circuit221adescribed above, the polarity of the diode D22is opposite. That is, the output terminal of the differential amplifier A23is connected to the cathode of the diode D22, the anode of the diode D22is connected to the capacitor C22and the resistor R24. The minimum voltage (bottom voltage) Vdmin of the detection signal is held in the capacitor C22. It is preferable that the values of the capacitor C22and the resistor R24be the same as the values of the capacitor C21and the resistor R23of the peak-hold circuit221a, respectively. The minimum voltage Vdmin in which a voltage drop of the diode D22has been cancelled is output from the output terminal of the differential amplifier A24.

The adder circuit221cincludes a differential amplifier A25and resistors R25and R26. The non-inverting input terminal of the differential amplifier A25is connected to the output terminal of the differential amplifier A22via the resistor R25and connected to the output terminal of the differential amplifier A24via the resistor R26. Further, the output terminal of the differential amplifier A25is connected to the inverting input terminal. The values of the resistors R25and R26are the same, and the adder circuit221cgenerates the average voltage Vdave of the maximum voltage Vdmax and the minimum voltage Vdmin. InFIG. 5, the average voltage Vdave is applied to the inverting input terminal of the differential amplifier A12via the resistor R19. The differential amplifier A12outputs the reference voltage Vref2in accordance with the correction value Voff that is the difference between the average voltage Vdave and the reference voltage Vref1. With the reference voltage Vref being changed based on the average voltage Vdave, the average voltage Vdave of the detection signal Vd is controlled to be the reference voltage Vref1, that is, the intermediate voltage Vcc/2. In this example, the reference voltage circuit211also has the function of the correction circuit220.

FIG. 7is a diagram illustrating one example of output signals of the photodiodes of the present embodiment. The upper graph inFIG. 7represents a temporal change of the output signal Vs1of the first photodiode group10A, and the lower graph inFIG. 7represents a temporal change of the output signal Vs2of the second photodiode group10B. The output signals Vs1and Vs2repeat an increase and a decrease with the positive value as time elapses, respectively.

At time t10, as illustrated inFIG. 4, the scale5relatively moves with respect to the light receiving unit1, and the reflected light7emitted to the light receiving unit1starts moving in the x direction. During time t10to t20, as the reflected light7traverses the first photodiode group10A, the output signal Vs1changes. During time t10to t11, as a portion which is a part of the reflected light7and is emitted to the first photodiode group10A increases, the output signal Vs1increases. At time t11, when the reflected light7and the first photodiode group10A have the same phase in the x direction, the output signal Vs1is the maximum. During t11to t20, as a portion which is a part of the reflected light7and is emitted to the first photodiode group10A decreases, the output signal Vs1decreases. During time t10to t20, since the reflected light7is not emitted to the second photodiode group10B, the output signal Vs2remains at the reference voltage.

During time t20to t30, as the reflected light7traverses the second photodiode group10B, the output signal Vs2increases toward the peak voltage. At time t21, when the reflected light7and the second photodiode group10B have the same phase in the x direction, the output signal Vs2is the maximum. During t21to t30, as a portion which is a part of the reflected light7and is emitted to the second photodiode group10B decreases, the output signal Vs2decreases. During time t20to t30, since the reflected light7is not emitted to the first photodiode group10A, the output signal Vs1remains at the reference voltage. During time t30to t40, as the reflected light7traverses the first photodiode group10A, the output signal Vs1changes. Subsequently, the output signals Vs1and Vs2change alternatingly in the same manner.

FIG. 8is a diagram illustrating one example of the detection signal Vd in the present embodiment. The output signals Vs1and Vs2illustrated inFIG. 7are input to the differential amplifier circuit212. As illustrated inFIG. 5, the differential amplifier circuit212operates by using the reference voltage Vref1as a bias voltage, and the detection signal Vd repeats an increase and a decrease with respect to the reference voltage Vref1. When the reflected light7does not enter the photodiode groups10A and10B, the detection signal Vd is the reference voltage Vref1.

During time t10to t20, as the reflected light7traverses the first photodiode group10A, the output signal Vs1changes with an amplitude Va with respect to the reference voltage Vref1as a reference. At this time, since the output signal Vs2of the second photodiode group10B remains to be the reference voltage Vref1, the detection signal Vd from the differential amplifier circuit212changes in accordance with the output signal Vs1. Further, at time t11, the detection signal Vd is the maximum voltage Vdmax.

During time t20to t30, as the reflected light7traverses the second photodiode group10B, the output signal Vs2changes with the amplitude Va with respect to the reference voltage Vref1as a reference. At this time, since the output signal Vs1of the first photodiode group10A remains to be the reference voltage Vref1, the detection signal Vd from the differential amplifier circuit212changes in accordance with the output signal Vs2. Further, at time t21, the detection signal Vd is the minimum voltage Vdmin.

As illustrated inFIG. 8, the reference voltage Vref1is set to half the voltage between the power source voltage Vcc and the ground voltage. Further, as described inFIG. 4, the number of photodiodes forming the first photodiode group10A and the number of photodiodes forming the second photodiode group10B are the same. Thus, the waveforms of the output signals Vs1and Vs2are symmetrical to each other, and the detection signal Vd may have a wide dynamic range. The average voltage Vdave of the detection signal Vd becomes the same as the reference voltage Vref1, and the corrected reference voltage Vref2is the same as the reference voltage to be corrected Vref1.

FIG. 9andFIG. 10are diagrams illustrating the operation of the photodetector device of the present embodiment.FIG. 9represents a state where the light receiving unit1is irradiated with the stray light8, andFIG. 10represents the detection signal Vd when irradiated with the stray light8.

As described above, the light receiving unit1may be irradiated with the stray light8in addition to the reflected light7in the scale5. The stray light8is a reflected light from a member such as a housing, a package, or the like or a disturbance light and is not necessarily emitted evenly to the photodiode groups10A and10B as with the reflected light7. For example, as illustrated inFIG. 9, when the stray light8enters only the first photodiode group10A, the output signal Vs1of the first photodiode group10A is larger than the output signal Vs2of the second photodiode group10B, and the output signal Vs1and the output signal Vs2are no longer symmetrical. For example, as illustrated inFIG. 10, in the detection signal Vd, the voltage of a signal portion corresponding to the output signal Vs1increases, and saturation occurs at the power source voltage Vcc. When the optical encoder performs position detection by using such a detection signal Vd, it will be difficult to accurately detect the phase in particular in the saturated signal portion. Further, in the detection signal Vd, when the symmetry between a signal portion corresponding to the output signal Vs1and a signal portion corresponding to the output signal Vs2is impaired, position detection accuracy may deteriorate. The photodetector device of the present embodiment outputs a stable detection signal Vd by feeding back the average voltage Vdave of the detection signal Vd to the reference voltage circuit211. The operation of the photodetector device of the present embodiment will be described below in detail.

InFIG. 10, the maximum voltage Vdmax of the detection signal Vd is affected by the stray light8, and the maximum voltage Vdmax is saturated at the power source voltage Vcc. On the other hand, since the minimum voltage Vdmin of the detection signal Vd is not affected by the stray light8, there is a sufficient margin to the ground voltage. In such a case, the average voltage Vdave of the maximum voltage Vdmax and the minimum voltage Vdmin is higher than the power source voltage Vcc/2, that is, the reference voltage Vref1. The reference voltage circuit211generates the corrected reference voltage Vref2based on the correction value Voff that is the difference between the average voltage Vdave and the reference voltage Vref1. The reference voltage Vref2is represented by a voltage obtained by subtracting the correction value Voff from the reference voltage Vref1as expressed by Equation (4). In the example ofFIG. 10, the corrected reference voltage Vref2is lower than the reference voltage Vref1. The differential amplifier circuit212outputs the detection signal Vd by using the reduced reference voltage Vref2as a bias voltage, and the signal waveform of the detection signal Vd is shifted to the lower voltage side. Thus, the maximum voltage Vdmax also becomes lower and is less likely to be saturated at the power source voltage Vcc. Furthermore, the average voltage Vdave gradually approaches the reference voltage Vref1, and the voltage amplitudes of the maximum voltage Vdmax and the minimum voltage Vdmin are symmetrical with respect to the reference voltage Vref1.

Even when the stray light8enters the second photodiode group10B, an advantageous effect of the present embodiment is obtained in the same manner. In such a case, the minimum voltage Vdmin decreases and may be clipped at the ground voltage. The average voltage Vdave decreases in contrast to the case ofFIG. 10, and the corrected reference voltage Vref2is higher than the reference voltage Vref1. The voltage level of the detection signal Vd output from the differential amplifier circuit212is shifted to the power source voltage side, and the average voltage Vdave approaches the reference voltage Vref1. The voltage amplitudes of the maximum voltage Vdmax and the minimum voltage Vdmin are symmetrical with respect to the reference voltage Vref1. Further, because the signal waveform of the detection signal Vd is shifted to the power source voltage side, saturation of the minimum voltage Vdmin at the ground voltage is eliminated or reduced.

As described above, according to the present embodiment, when the stray light8enters the light receiving unit1, it is possible to output a stable detection signal by controlling the bias voltage of the detection signal Vd. Further, it is possible to perform more accurate position detection by applying the photodetector device of the present embodiment to the optical encoder.

In particular, when a photodetector device is used for an optical encoder and a light source and a light receiving unit are arranged in the same package, a stray light is likely to occur inside the package. The photodetector device of the present embodiment is particularly useful when arranged inside a package together with a light source.

Further, in the photodetector device of the present embodiment, the light receiving unit1, the signal processing unit2, and the light source3are provided in the common substrate4. In such a way, the light receiving unit1, the signal processing unit2, and the light source3are formed in the same package, and thereby the relative position of the light receiving unit1and the light source3can be defined at high accuracy, and accurate position detection is enabled.

Note that, although the photodetector device of the present embodiment controls the bias voltage of the detection signal Vd by correcting the reference voltage Vref of the differential amplifier circuit212, a signal or a circuit targeted for correction is not limited to the example described above. For example, the gain or the offset voltage of the I-V converter circuit210aor210bmay be corrected. That is, it is also possible to improve symmetry of the output signals Vs1and Vs2input to the differential amplifier circuit212by correcting and reducing the gain or the offset voltage of one of the output signals Vs1and Vs2which is affected by the stray light8.

Second Embodiment

Next, a photodetector device of the present embodiment will be described mainly for the configuration different from the first embodiment.FIG. 11is a block diagram of a light receiving unit and a signal processing unit of the present embodiment. The signal processing unit2includes the selector circuits20, the detection signal generation unit21, and the correction unit22.

The first photodiode group10A, the second photodiode group10B, the selector circuit20, and the detection signal generation unit21are configured in substantially the same manner as in the first embodiment. The detection signal generation unit21includes the I-V converter circuits210aand210b, the reference voltage circuit211, and the differential amplifier circuit212. The I-V converter circuit210aconverts a current of the photodiodes10of the first photodiode group10A into a voltage to generate the output signal Vs1. Similarly, the I-V converter circuit210bconverts a current of the photodiodes10of the second photodiode group10B into a voltage to generate the output signal Vs2.

The correction unit22includes the correction circuit220and a peak-hold circuit222. In the present embodiment, the peak-hold circuit222is provided instead of the averaging circuit221of the first embodiment. The peak-hold circuit222detects the maximum voltages Vsmax1and Vsmax2of respective output signals Vs1and Vs2. The correction circuit220includes a differential amplifier circuit and generates the correction value Voff based on the difference between the maximum voltage Vsmax1and Vsmax2. The correction value Voff is expressed by the following equation, where the gain of the correction circuit220is denoted as “A”.
Voff=A×(Vsmax1−Vsmax2)/2  (Equation 5)

The correction value Voff is fed back to the reference voltage circuit211. The corrected reference voltage Vref2is expressed by the following equation, where a reference voltage to be corrected is denoted as “Vref1” and the corrected reference voltage is denoted as “Vref2”.
Vref2=Vref1−Voff  (Equation 6)

The reference voltage circuit211corrects the detection signal Vd by changing the reference voltage Vref based on the correction value Voff.

FIG. 12is a circuit example of the correction unit22of the present embodiment. The correction unit22includes peak-hold circuits222aand222band the correction circuit220. Note that, although the output signals Vs1and Vs2in the detection signal generation unit21ofFIG. 5have a voltage change inversed from the photocurrent change of the photodiodes10, it is assumed in the following description that the output signals Vs1and Vs2have a positive amplitude in the same manner as the photocurrent change.

The peak-hold circuit222aincludes differential amplifiers A30and A31, a resistor R31, a capacitor C31, and a diode D31. The output signal Vs1of the first photodiode group10A is input to the non-inverting input terminal of the differential amplifier A30. The output terminal of the differential amplifier A30is connected to the anode of the diode D31, and the cathode of the diode D31is connected to the non-inverting input terminal of the capacitor C31, the resistor R31, and the differential amplifier A31. The capacitor C31and the resistor R31are connected in parallel between the cathode of the diode D31and the ground voltage. The output terminal of the differential amplifier A31is connected to the inverting input terminal of the differential amplifier A30and the inverting input terminal of the differential amplifier A31.

In the peak-hold circuit222aconfigured as described above, the output signal Vs1is output to the capacitor C31via the diode D31, and the maximum voltage Vsmax1of the output signal Vs1is held in the capacitor C31. The resistor R31discharges charges accumulated in the capacitor C31to the ground voltage at a time constant defined by the resistor R31and the capacitor C31. It is desirable that the time constant of the resistor R31and the capacitor C31be longer than a period of one cycle of the output signal Vs1. Note that, instead of the resistor R31, a discharging transistor switch may be provided in parallel to the capacitor C31.

Similarly, the peak-hold circuit222bincludes differential amplifiers A32and A33, a resistor R32, a capacitor C32, and a diode D32and outputs the maximum voltage Vsmax2of the output signal Vs2.

The correction circuit220includes a differential amplifier A34and resistors R33, R34, and R35. The maximum voltage Vsmax1is input to the non-inverting input terminal of the differential amplifier A34via the resistor R33, and the maximum voltage Vsmax2is input to the inverting input terminal via the resistor R34. The resistor R35is connected to the output terminal and the inverting input terminal of the differential amplifier A34. The differential amplifier A34outputs the correction value Voff in accordance with the difference between the maximum voltages Vsmax1and Vsmax2.

The correction value Voff is input to the reference voltage circuit211. InFIG. 5, the correction value Voff is applied to the inverting input terminal of the differential amplifier A12via the resistor R19. The differential amplifier A12outputs the reference voltage Vref2in accordance with the correction value Voff, and the differential amplifier circuit212generates the detection signal Vd by using the corrected reference voltage Vref2.

Also in the present embodiment, an advantageous effect can be obtained in the same manner as the first embodiment. That is, when the stray light8enters the light receiving unit1, it is possible to output a stable detection signal Vd by controlling the bias voltage of the detection signal Vd. Further, it is possible to perform more accurate position detection by applying the photodetector device of the present embodiment to the optical encoder.

In the photodetector device of the present embodiment, the light receiving unit1, the signal processing unit2, and the light source3are provided in the common substrate4. In such a way, the light receiving unit1, the signal processing unit2, and the light source3are formed in the same package, and thereby the relative position of the light receiving unit1and the light source3can be defined at high accuracy, and accurate position detection is enabled.

The correction unit22of the present embodiment generates the correction value Voff by using the output signals Vs1and Vs2obtained before input to the differential amplifier circuit212. Thus, when the detection signal Vd is saturated, it is possible to reduce the time required for correction compared to the first embodiment in which the correction value Voff is generated by using the detection signal Vd output from the differential amplifier circuit212.

Third Embodiment

Next, a photodetector device of the present embodiment will be described.

The photodetector device of the present embodiment can correct the light amount of the light source3in addition to correction of the detection signal Vd.FIG. 13is a diagram of a light source control circuit of the present embodiment. A light source control circuit30includes a differential amplifier A301, a transistor T301, a capacitor C301, resistors R301, R302, R303, R304, R305, and R306and can control the light amount of the light source3.

To the non-inverting input terminal of the differential amplifier A301, the output signal Vs1of the first photodiode group10A is input via the resistor R301, and the output signal Vs2of the second photodiode group10B is input via the resistor R302. Further, a reference voltage obtained by dividing a voltage by the resistors R304and R305is input to the inverting input terminal of the differential amplifier A301. The resistor R303and the capacitor C301are connected in parallel between the output terminal and the inverting input terminal of the differential amplifier A301. The output terminal of the differential amplifier A301is connected to the base of the transistor T301, and the emitter of the transistor T301is grounded via the resistor R306. The light source3is connected between the corrector of the transistor and the power source voltage.

The differential amplifier A301integrates the addition value of the output signals Vs1and Vs2at a time constant of the resistor R303and the capacitor C301to change the base voltage of the transistor T301. The transistor T301conducts a current in accordance with the base voltage to the light source3to control the light amount of the light source3. When the output signals Vs1and Vs2are inverted with respect to the detection light amount, the base voltage decreases and the light amount of the light source3is reduced as the amplitude of the output signals Vs1and Vs2increases. For example, as illustrated inFIG. 10, when the detection signal Vd is saturated, the light amount of the light source3is reduced. The intensity of the reflected light7from the scale5decreases, and the amplitude of the detection signal Vd also decreases. Thus, saturation of the detection signal Vd is eliminated or reduced, a stable detection signal Vd can be output. By correcting the light amount of the light source3in addition to the correction of the detection signal Vd in the first and second embodiments, it is possible to effectively improve the dynamic range of the detection signal Vd.

Note that the light amount of the light source3may be changed gradually from a smaller value to a larger value, and the light amount obtained immediately before the detection signal Vd is saturated may be maintained. Thereby, it is possible to maximize the dynamic range while avoiding saturation of the detection signal Vd. Herein, whether or not the detection signal Vd is saturated may be determined by the voltage difference between the average voltage Vdave and the reference voltage Vref1. For example, when either the maximum voltage Vdmax or the minimum voltage Vdmin is saturated, the average voltage Vdave is shifted away from the reference voltage Vref1. Accordingly, the photodetector device can detect saturation of the detection signal Vd by monitoring the average voltage Vdave.

Therefore, according to the present embodiment, by controlling the light amount of a light source in addition to correction of a bias voltage of a detection signal, it is possible to more effectively generate a stable detection signal.

Other Embodiments

The photodetector devices of the disclosed embodiments are applicable to various apparatuses and devices. The photodetector device is preferably applicable to an optical encoder device in particular, and the optical encoder device may be of any type such as a linear encoder, a rotary encoder, or the like. Furthermore, the optical encoder device is applicable to the device having a movable mechanism, such as an optical lens of an imaging device, an electrophotographic device, a transport device, or the like.

While the average voltage Vdave is generated based on the maximum voltage Vdmax and the minimum voltage Vdmin of the detection signal Vd in the first embodiment, an integration circuit including a resistor element and a capacitor element may be used to generate the average voltage Vdave of the detection signal Vd. Further, the average voltage Vdave may be generated by sampling the detection signal Vd for a predetermined period and a predetermined number of times and dividing the integrated detection signal Vd by the number of sampling times. Furthermore, the detection signal Vd, the average voltage Vdave, and the correction value Voff may be calculated by calculating digital data after analog-to-digital conversion of the output signals Vs1and Vs2.

Further, the photodetector device and the optical encoder device of the embodiments described above may be a semiconductor device formed on the semiconductor substrate. That is, an element such as a photodiode, a transistor, a resistor, a capacitor, or the like is formed on a semiconductor wafer, and a photodetector device may be formed as a semiconductor device.

This application claims the benefit of Japanese Patent Application No. 2019-045068, filed Mar. 12, 2019, which is hereby incorporated by reference herein in its entirety.