Signal switching circuit

A signal switching circuit in which distortion caused by non-linearity of a signal path between a control electrode of an output transistor and a common junction output terminal is eliminated. The switching circuit includes plural amplifiers with outputs of the amplifiers being coupled to a common junction point and with a control signal coupled to each amplifier for enabling or disabling the amplifier. A by-pass impedance element having a linear voltage-current characteristic is coupled between the control electrode of each transistor and the common output junction point.

BACKGROUND OF THE INVENTION 
The present invention relates to a signal switching circuit, and more 
particularly to a signal switching circuit provided with an amplifying 
function. 
In a prior art signal switching circuit, a plurality of amplifiers are 
provided, corresponding in number to the number of input signals. Outputs 
of these amplifiers are commonly connected. A particular input signal is 
amplified by the associated amplifiers thereby providing an amplified 
output. In actual operation, all amplifiers except one are disabled. 
FIG. 1 is a circuit diagram showing such a signal switching circuit in 
which amplifiers 1 and 2 corresponding respectively to input signals on 
terminals IN-1 and IN-2 are provided with the outputs of the two 
amplifiers coupled to a common output terminal OUT. In response to control 
signals on terminals CONT-1 and CONT-2 applied respectively to the 
amplifiers 1 and 2, one of the two input signals is selectively amplified 
by the associated amplifier and the resultant output is obtained at the 
common output terminal OUT. Since the circuit arrangement of the amplifier 
2 is similar to that of the amplifer 1, only the circuit arrangement of 
the amplifier 1 is shown in FIG. 1. 
In the amplifier 1, the input signal on the terminal IN-1 is applied as a 
differential input to the first differential amplifier including a pair of 
differential transistors Q.sub.1 and Q.sub.2. Voltages developed across 
collector resistors R.sub.1 and R.sub.2 of the transistors Q.sub.1 and 
Q.sub.2 are applied as differential inputs to the second differential 
amplifier. A current source for the first differential amplifier is 
provided which includes a transistor Q.sub.3, a resistor R.sub.3, and a 
bias supplying source E. The base potential of the transistor Q.sub.3 is 
controlled by a switching transistor Q.sub.4 to thereby cause the 
differential amplifier to be either enabled or disabled. To this effect, a 
control signal is applied to the base of the transistor Q.sub.4. Resistor 
R.sub.4 is provided for restricting the current applied to the base of the 
transistor Q.sub.3. 
The second differential amplifier including a pair of transistors Q.sub.5 
and Q.sub.6, emitter resistors R.sub.5 and R.sub.6, and a current mirror 
circuit, operates as an active load for the transistors Q.sub.5 and 
Q.sub.6. The current mirror circuit includes a transistor Q.sub.7, a diode 
D.sub.1, and resistors R.sub.7 and R.sub.8. Between the collectors of the 
transistors Q.sub.6 and Q.sub.7, series-connected diodes D.sub.2 and 
D.sub.3 are arranged. The voltage developed across the series-connected 
diodes D.sub.2 and D.sub.3 provides base driving signals for output 
push-pull transistors Q.sub.8 and Q.sub.9. The output transistors Q.sub.8 
and Q.sub.9 are connected as complementary transistors with emitters being 
commonly connected to each other in an emitter follower configuration. The 
common emitter junction point is coupled to the output terminal OUT to 
which the output of the other amplifier is also coupled. 
In the circuit arrangement shown in FIG. 1, when the control signal on the 
terminal CONT-1 is at a high level and the control signal on the terminal 
CONT-2 is a low level, the amplifier 1 is disabled. Therefore, only the 
input signal on the terminal IN-2 is amplified by the amplifier 2 and the 
output thereof provided at the output terminal OUT. In this operation, the 
circuit of the amplifier 1 forms a part of a load for the amplifier 2. 
Here, the impedance of the amplifier 1 from the output terminal OUT is 
extremely large in the low frequency range. Thus, the amplifier 1 has 
substantially no effect upon the amplifying operation of the amplifier 2. 
In the high frequency range, however, stray capacitances existing between 
the base of the transistor Q.sub.8 and ground and between the base of the 
transistor Q.sub.9 and ground are not negligible. The impedance Z of the 
amplifier 2 is equivalent to that obtained from the circuit shown in FIG. 
2. In the circuit of FIG. 2, D.sub.8 and D.sub.9 are base-emitter PN 
junction diodes of the emitter follower transistors Q.sub.8 and Q.sub.9, 
respectively. Specifically, in the high frequency range, the impedance Z 
of the amplifier 2 causes distorion of the signal on the output terminal 
OUT due to the non-linearity of the diodes D.sub.8 and D.sub.9. 
SUMMARY OF THE INVENTION 
Accordingly, an object of the invention is to eliminate distortion caused 
by the non-linearity of a signal path between control electrodes of an 
output transistor and a common junction output terminal. 
In accordance with the invention, an improvement is made to a signal 
switching circuit including a plurality of amplifiers provided in a number 
corresponding to the number of input signals. Output transistors connected 
in an emitter follower configuration are provided in the output stage of 
each amplifier and the outputs of the amplifiers are commonly coupled to a 
common junction point so that the outputs of the amplifiers can be 
selectively obtained at the common junction point. Control signals are 
applied to the amplifiers so that all the amplifiers except the one to be 
operated are disabled and the output of the operating amplifier provides 
an output to the common junction point. A by-pass impedance element having 
a linear voltage-current characterisitic is provided in the path between 
the control electrode of the output transistor and the common junction 
point.

DESCRIPTION OF THE PREFERRED EMBODIMENTS 
The invention will be described with reference to the accompanying 
drawings. FIG. 3 is a circuit diagram showing a preferred embodiment of a 
signal switching circuit according to the invention where like numerals or 
like symbols denote like parts or like components in FIG. 1. Although only 
the specific circuit arrangement of the amplifier 1 is shown therein, the 
circuit arrangement of the amplifier 2 is the same as that of the 
amplifier 1. In the figure, impedance elements having linear 
characteristics, specifically resistors R.sub.9 and R.sub.10, are employed 
in the illustrated embodiment, and are respectively connected between the 
bases and the emitters of the emitter follower-connected transistors 
Q.sub.8 and Q.sub.9, in other words, between the control electrodes of the 
output transistors and the output terminal OUT. In this circuit, charge 
stored in the capacitors C.sub.1 and C.sub.2 flows through the resistors 
R.sub.9 and R.sub.10, respectively, provided as by-passes for the 
base-emitter junctions of the output transistors Q.sub.8 and Q.sub.9. 
In the case where the amplifier 1 is disabled and the amplifier 2 is 
enabled so that the input signal on the terminal IN-2 is selectively 
outputted, the high frequency range impedance Z of the amplifier 1 from 
the output terminal OUT is equivalent to the impedance of the circuit 
shown in FIG. 4A. Accordingly, provided that the impedances of the 
resistors R.sub.9 and R.sub.10 are sufficiently small relative to the 
impedances of the parasitic capacitors C.sub.1 and C.sub.2, the diodes 
D.sub.8 and D.sub.9 are not rendered conductive and provide infinite 
impedances. 
Under this condition, the equivalent circuit can be depicted as shown in 
FIG. 4B. Specifically, due to the provision of the by-pass circuits of the 
resistors R.sub.9 and R.sub.10, distortion caused by the non-linearity of 
the base-emitter diodes of the output transistors is substantially 
eliminated. Since the circuit shown in FIG. 4B is a linear circuit, no 
signal distortion is caused by the provision of the by-pass resistors. 
Although in the preferred embodiment, resistors are employed as by-pass 
impedance elements, any linear impedance element having an appropriate 
value can be used. 
According to the invention, signal distortion is suppressed with an 
extremely simple circuit arrangement. Moreover, although the invention has 
been described with respect to a preferred embodiment, it will be 
appreciated by one skilled in the art that a variety of changes and 
modifications may be made without departing from the scope of the 
invention. For example, a source follower configuration employing junction 
type FETs is usable in place of the emitter follower configuration 
employing bipolar transistors. Furthermore, it is apparent that the 
invention is applicable not only for switching between two input signals 
but also for switching among a plurality of input signals.