Waveform converting circuit

Waveform converting circuits are disclosed which eliminate errors in data reproduction due to the transitional response of low or high pass filters even if the data signal contains a D.C. component. The converting circuits have a comparator with first and second input terminals. The comparator produces a "1" or "0" output depending on the comparison of the voltages of input signals fed to these first and second input terminals. In one type of converting circuit, a low pass filter is connected between the signal input terminal and the second input terminal of the comparator, while the signal input terminal is directly connected to the first input terminal of the comparator. A feedback circuit including a low pass filter is connected between the output and the second input terminals of the comparator. In another type of converting circuit, a high pass filter is connected between the signal input terminal and the first input terminal of the comparator, and a limiter is connected to the output of the high pass filter. A feedback circuit is provided between the output and either the first or second input terminals of the comparator.

BACKGROUND OF THE INVENTION 
This invention relates to waveform converting circuits, and particularly to 
an improvement of waveform converting circuits involving comparators. 
In a transmission/reception system of data signals, because of the presence 
of transformers and coupling capacitors inserted into the transmission 
path, it is generally difficult to faithfully convey the D.C. or 
low-frequency components of data signals. As a consequence, data are 
reproduced on the receiving side by using the average voltage of data 
signals, obtained with a low pass filter (LPF), as the comparator's 
threshold value (hereinafter called the comparison reference value) for 
"1"-"0" determination of data signals (see U.S. Pat. No. 3,845,412, 
especially FIG. 13 thereof). 
Where, conversely, NRZ (Non-Return to Zero) signals are used as data 
signals or where D.C. components are contained in data signals for some 
reason or another, data are reproduced on the receiving side by removing 
the D.C. components with a high pass filter (HPF) or the like and 
comparing the signal voltages with the reference voltage (ground 
potential). 
Since capacitors, which are transitional response elements, are used for 
reproduction or removal or D.C. components in such systems, if data 
signals retain a continuously high or low level, there will arise a 
discrepancy in comparison reference value reproduced or a drop of data 
signals to the ground potential, resulting in an error in data 
reproduction. These shortcomings have been avoided by, for instance, using 
a large-capacity capacitor to pass even low-frequency components of data 
signals, or employing split-phase signals so that the data signals 
themselves may not contain low-frequency components. However, these 
remedies lead to new problems; a large-capacity capacitor retards the 
responses of the converting circuit, or special treatment of data signals 
entails greater complexity of the system. 
SUMMARY OF THE INVENTION 
The object of the present invention is to provide a waveform converting 
circuit representing a solution of these problems. 
In accordance with this invention, there is provided a waveform converting 
circuit primarily comprising: a comparator having a first input terminal 
and a second input terminal for comparing the voltages of input signals 
fed to these first and second input terminals; a signal input terminal 
connected to the first input terminal; a LPF coupled between this signal 
input terminal and the second input terminal; and a feedback means coupled 
between the output of the comparator and the second input terminal for 
maintaining the output of said first low pass filter at a predetermined 
level.

DESCRIPTION OF THE PRIOR ART 
In the circuit illustrated in FIG. 1, a data signal S.sub.i fed to an input 
terminal 1 is compared in a comparator 12 with a comparison reference 
voltage V.sub.R1 obtained by smoothing the input data signal S.sub.i, to 
produce a reproduced data S.sub.O1 at an output terminal 2. Hereupon, when 
the receiver's center frequency has a discrepancy by .DELTA.f from the 
transmitter's center frequency f.sub.o in an FM communication system, a 
D.C. voltage corresponding to this .DELTA.f is generated at the output of 
the frequency discriminating circuit in an FM receiver and superposed on 
the input data signal. When such data signal is entered into the circuit 
of FIG. 1, the comparison reference voltage V.sub.R1 is brought closer to 
the average voltage V.sub.a of the input data signal S.sub.i by a low pass 
filter (LPF) 11 consisting of a capacitor 101 (having a capacitance of 
C.sub.1) and a resistor 102 (having a resistance of R.sub.1). If the time 
constant R.sub.1 C.sub.1 of the filter 11 is made greater, the approach of 
the comparison reference voltage V.sub.R1 to the average voltage V.sub.a 
of the signal will be delayed, so that a longer time is required for 
putting the comparator circuit 12 in a normal comparison operation. If, 
conversely, the time constant R.sub.1 C.sub.1 is made smaller, when the 
signal level continues to be high as in section T.sub.1 of FIG. 2A, the 
comparison reference voltage V.sub.R1 will approach the high level of the 
input signal because of the presence of the LPF 11. This might cause 
erroneous comparison with noise contained in the signal S.sub.i. Thus the 
waveform converting circuit of FIG. 1 has a disadvantage that it does not 
permit the use of a signal pattern in which a high or low level is 
retained for a long period. Reference letters V.sub.c in FIG. 2A 
represents the ideal value of the comparison reference voltage, and FIG. 
2B illustrates the reproduced data S.sub.O1. 
In the circuit illustrated in FIG. 3, when a data signal S.sub.i which 
contains the D.C. voltage as referred to above is entered from an input 
terminal 1, this data signal S.sub.i, after elimination of its D.C. 
component by a high pass filter (HPF) 13, undergoes waveform conversion in 
a comparator 14, whose comparison reference voltage is the ground 
potential, to produce a reproduced data S.sub.O2 at a terminal 2. When, in 
this process of data reproduction, the data signal S.sub.i passes the HPF 
13 which consists of a capacitor 104 (having a capacitance of C.sub.2) and 
a resistor 105 (having a resistance of R.sub.2), the output signal 
S.sub.i1 of the HPF 13 momentarily reaches the average voltage V.sub.a of 
the data signal S.sub.i, but it thereafter gradually decreases to approach 
the zero level. Hereupon the time constant C.sub.2 R.sub.2 of the HPF 13 
requires a certain magnitude because the HPF 13 has to remove the D.C. 
voltage V.sub.a and at the same time pass the low-frequency components of 
the data signal, with the result that, during the period of time in which 
the comparison reference voltage returns to the zero level (section 
T.sub.2 in FIG. 4A), errors arise in the reproduced data from the 
comparator 14. If the time constant R.sub.2 C.sub.2 is made too small in 
an attempt to avoid such errors, the voltage V.sub.a1 of the input signal 
S.sub.i1 to the comparator 14 will drop to a low level as shown in FIG. 4A 
where the data signal retains a continuously high level (section T.sub.3 
in FIG. 4A), so that faithful reproduction of data is not possible. FIG. 
4B illustrates the data S.sub.O2 reproduced by the waveform converting 
circuit of FIG. 3. 
DESCRIPTION OF THE PREFERRED EMBODIMENTS 
The comparison reference voltage V.sub.R2 in the circuit of FIG. 5 is the 
voltage sum of the signal resulting from the passage of an input data 
signal S.sub.i (having an average voltage of V.sub.a) through a LPF 15, 
consisting of a capacitor 105 (having a capacitance of C.sub.3) and a 
resistor 106 (having a resistance of R.sub.3) and of the signal resulting 
from the passage of the output S.sub.O3 (having an average voltage of 
V.sub.O3) of an inverter 17 through another LPF, consisting of the 
capacitor 105 and another resistor 18 (having a resistance of R.sub.4). 
Thus, after the data signal S.sub.i is received and reaches a constant 
stage, the comparison reference voltage V.sub.R2 will become 
EQU V.sub.R2 =(V.sub.a R.sub.4 +V.sub.O3 R.sub.3)/(R.sub.3 +R.sub.4) 
Now suppose that a certain period of time has elapsed with the data signal 
S.sub.i remaining at a high level as in section T.sub.5 of FIG. 6A. If, 
then, the ideal comparison reference voltage is represented by V.sub.c and 
the amplitude of the data signal S.sub.i by V.sub.s, the average voltage 
of the data signal S.sub.i will be V.sub.c +V.sub.s, and therefore the 
comparison reference voltage V.sub.R2 will be 
EQU V.sub.R2 ={V.sub.c R.sub.4 /(R.sub.3 +R.sub.4)}+{(V.sub.s R.sub.4 +V.sub.O3 
R.sub.3)/(R.sub.3 +R.sub.4)} 
Here, if the pertinent values are so selected as to make R.sub.3 &lt;&lt;R.sub.4 
and V.sub.O3 =-V.sub.s R.sub.4 /R.sub.3, a relationship of V.sub.R2 
.perspectiveto.V.sub.c will be given, with the result that the comparison 
reference voltage V.sub.R2 will not deviate from the ideal comparison 
reference voltage V.sub.c even if the signal retains a continuously high 
level. While what has been said so far concerns an instance in which the 
signal retains a high level, the same holds true where the signal remains 
at a low level. Furthermore, this condition also satisfies the requirement 
of a case in which the signal level is alternately high and low as in 
section T.sub.4 of FIG. 6A or of the initial transitional state of section 
T.sub.5 of same. Thus, whereas the time constant of the LPF including the 
capacitor C.sub.3 in the transitional state of sections T.sub.4 and 
T.sub.5 is represented by C.sub.3 R.sub.3 R.sub.4 /(R.sub.3 +R.sub.4), as 
there is a condition to make R.sub.3 &lt;&lt;R.sub.4, the capacitor 105 does not 
have sufficient time to be charged by the voltage V.sub.O3 when the input 
signal level is alternately high and low or in the transitional state of 
section T.sub.5, with the result that the time constant (C.sub.3 R.sub.3 
R.sub.4 /(R.sub.3 +R.sub.4).perspectiveto.C.sub.3 R.sub.3. This means that 
the capacitor 105 is charged solely by the voltage V.sub.a, and that 
V.sub.R2 .perspectiveto.V.sub.c. 
In FIG. 7, an input signal S.sub.i is supplied to a LPF 20, and the output 
of a comparator 19 is supplied to another LPF 21. The LPF 20 here consists 
of an amplifier 107, resistors 109 and 110 (having resistances of R.sub.5 
and R.sub.6, respectively) and a capacitor 108 (having a capacitance of 
C.sub.4). The LPF 21 is composed of an amplifier 111, resistors 113 to 115 
(having resistances of R.sub.7 to R.sub.9, respectively) and a capacitor 
112 (having a capacitance of C.sub.5). The comparison reference voltage 
V.sub.R3 is the composite of the output voltages of the LPFs 20 and 21. 
Accordingly, the reference voltage V.sub.R3 has a relationship of V.sub.R3 
=(V.sub.11 R.sub.6 +V.sub.12 R.sub.7)/(R.sub.6 +R.sub.7) to the voltages 
V.sub.11 and V.sub.12 of the outputs X.sub.11 and X.sub.12 of the 
amplifiers 107 and 111, respectively. Thus, if the resistances R.sub.6 and 
R.sub.7 and the voltage V.sub.11 are so selected that a relationship of 
R.sub.6 V.sub.11 =-R.sub.7 V.sub.s may hold in a constant state and the 
time constant R.sub.5 C.sub.4 is set to be equal to C.sub.5 R.sub.8 
R.sub.9 /(R.sub.8 +R.sub.9), the reference voltage V.sub.R3 can be 
maintained at its ideal level like in the first embodiment of this 
invention illustrated in FIG. 5. Since a small time constant R.sub.5 
C.sub.4 can be selected in this instance as well, it is possible, at the 
beginning of signal reception, to make the comparison reference voltage 
V.sub.R3 quickly reach its ideal level. 
FIG. 8 illustrates a modification of the circuit of FIG. 5, to which diodes 
118 and 119 are added here. The saturation voltages of the diodes 118 and 
119 are set slightly higher than the amplitude voltage V.sub.s of the 
input data signal S.sub.i. The saturation voltages being so set, while 
this circuit will come to have similar characteristics to the embodiment 
illustrated in FIG. 5 some time after the start of signal reception, if, 
in the initiation of signal reception, the amplitude of the input data 
signal S.sub.i rises or falls beyond the voltage V.sub.s, either one of 
the diodes 118 and 119 will be actuated. Therefore the comparison 
reference voltage V.sub.R4 can reach its ideal level V.sub.c in a very 
short period of time as illustrated in FIG. 9A. This quick rise of the 
comparison reference voltage V.sub.R4 makes possible faithful data 
reproduction from the very beginning, as illustrated in FIG. 9B, which 
shows the inverted signal of a reproduced data S.sub.O4 from the input 
data S.sub.i. 
As can be understood from the embodiments described above, a waveform 
converting circuit constructed in accordance with this invention is able 
to maintain, after the start of data signal reception, the comparison 
reference voltage at its ideal level without requiring a large time 
constant for the LPF even if the data signal retains a continuously high 
or low level. A small time constant of the LPF further means that the 
comparison reference voltage can quickly reach its ideal level in the 
early phase of data signal reception. 
Next will be described the circuit illustrated in FIG. 10, a fourth 
embodiment of the present invention. An input data signal S.sub.i (having 
an average voltage of V.sub.a) having an amplitude voltage of V.sub.s 
passes a HPF 25 consisting of a capacitor 120 (having a capacitance of 
C.sub.7) and a resistor 121 (having a resistance of R.sub.11), where its 
D.C. components is eliminated. The output of the HPF 25 is limited by a 
limiter 26 (comprising diodes 122 and 123) not to exceed the forward 
voltage V.sub.D of the diodes. The voltage V.sub.D is selected to be 
somewhat higher than the voltage amplitude V.sub.s of the data signal. 
Having passed the limiter 26, the signal is compared by a comparator 28 
with a comparison reference voltage (zero level). The voltage V.sub.05 of 
the output S.sub.05 of the comparator 28 is fed back by way of a resistor 
27 (having a resistance of R.sub.12) to the uninverted input terminal of 
the comparator 28. The transitional response characteristic of the voltage 
at this time is determined by the resistances R.sub.11 and R.sub.12 and 
the capacity C.sub.7, and the time constant then is C.sub.7 (R.sub.0 
+R.sub.11 R.sub.12 /(R.sub.11 +R.sub.12)), where R.sub.0 is the resistance 
of a circuit immediately preceding the converting circuit as viewed from 
the input point of the converting circuit. The voltage V.sub.a2 of the 
input signal S.sub.i2 to the comparator ultimately reaches V.sub.05 
R.sub.11 /(R.sub.11 +R.sub.12). On the other hand, the transitional 
response of the input signal S.sub.i has the same time constant. That is 
to say, when the input signal S.sub.i retains a continuously high level as 
in section T.sub.8 of FIG. 11A, the time constant of the voltage decrease 
of the data signal having passed the capacitor 120 is equal to the time 
constant of the voltage increase of the signal resulting from the feedback 
of the output S.sub.05 of the comparator 28 by way of the resistor 27. 
Thereby there is prevented the voltage drop to the zero level in the data 
signal input part of the comparator, an inevitable shortcoming of any 
waveform converting circuit of the prior art. This waveform converting 
circuit further prevents erroneous comparison owing to transitional 
response at the time of signal input by intercepting the D.C. component 
V.sub.a with the diodes 122 and 123 which constitute the limiter 26. When, 
for instance, a postive voltage V.sub.a is applied to the signal, the 
diode 122 is actuated to prevent the input voltage V.sub.a2 to the 
comparator 28 from rising above the voltage V.sub.D. Since, at this time, 
the time constant determined by the product of the resistance of the 
actuated diode and the capacity of the capacitor 120 is very small, the 
input voltage V.sub.a2 to the comparator 28 is quickly drawn within the 
voltage V.sub.D. When a negative voltage is applied to the signal, the 
diode 123 is actuated to give a similar result. FIG. 11B illustrates the 
reproduced data S.sub.05. 
The embodiment illustrated in FIG. 12 will be described below with 
reference to FIGS. 13A and 13B. The D.C. component of an input data signal 
S.sub.i is eliminated by a circuit 6 which includes a HPF consisting of a 
capacitor 124 (having a capacitance of C.sub.8) and a resistor 125 (having 
a resistance of R.sub.13) comprising diodes 126 and 127. The input signal 
S.sub.i3 to a comparator 30 has the waveform illustrated in FIG. 13A. Up 
to this point, if the data signal retains a continuously high or low 
level, the HPF would reduce the voltage V.sub.a3 of the signal S.sub.i3 to 
the zero level as in a waveform converting circuit of the prior art. This 
action is compensated for by negatively feeding back the output S.sub.06 
of the comparator 30 to the inverted input terminal of the comparator 30 
by way of a code inverter 31 and a LPF 32 (consisting of a capacitor 128 
and resistors 129 and 130). Thus, as the output S.sub.i3 of the HPF 
approaches the zero level, the comparison reference voltage V.sub.R5 of 
the fed-back signal transitionally responds so as to maintain a certain 
potential difference from the output S.sub.i3 of the HPF (as illustrated 
in FIG. 13A). It has to be noted that, as is obvious from FIG. 13A, the 
maximum amplitude of the output signal S.sub.06 is so set as not to exceed 
the voltage V.sub.D because, if the input data signal S.sub.i is inverted 
after it has retained a continuously high or low level, its D.C. component 
is intercepted by the diode 126 or 127. 
As described above, in accordance with this invention there is provided a 
waveform converting circuit which is free from erroneous determination due 
to a transitional response by the LPF or HPF even if a data signal 
contains a D.C. component, and from erroneous determination owing to the 
retention of a continuously high or low level by the data signal, and 
accordingly is capable of faithful data reproduction.