Systems and methods for determining refresh rate of memory based on RF activities

Systems and methods for determining a refresh rate of volatile memory are provided. In this regard, a representative system, among others, includes a radio frequency (RF) device; a computing device that communicates with the RF device, the computing device including a refresh manager that monitors activities of the RF device; and volatile memory that communicates with the refresh manager of the computing device, wherein the refresh manager determines a refresh rate of the volatile memory based on the monitored activities of the RF device. A representative method, among others, for determining the refresh rate of volatile memory, includes monitoring activities of a radio frequency (RF) device; and adjusting a refresh rate of volatile memory based on the monitored activities of the RF device.

TECHNICAL FIELD

The present disclosure relates to volatile memory of a computer device, and more particularly, the disclosure relates to systems and methods for determining a refresh rate of volatile memory based on radio frequency (RF) activities.

BACKGROUND

Refreshing a volatile memory involves applying memory refresh signals to each storage element within that volatile memory. The volatile memory can use a capacitor to store one bit of data. If the capacitor is electrically charged, then that bit generally represents a logic “1.” If the capacitor is not charged, then that bit generally represents a logic “0.” The reason for refreshing the memory storage elements periodically is that electric charge slowly drains from the charged capacitors over time. If an uncharged capacitor (representing a logic “0”) receives the refresh signal, then that capacitor stays uncharged. If a charged capacitor (representing a logic “1”) receives the refresh signal before the capacitor completely discharges, however, that charged capacitor recharges to full capacity. Thus, the memory contents are maintained by refreshing each memory storage location often enough to ensure that the charged capacitors do not completely discharge. However, a local RF field can cause some noise during the read of the volatile memory, resulting in an unsuccessful read.

SUMMARY

Systems and methods for determining a refresh rate of volatile memory are provided. In this regard, a representative system, among others, includes a radio frequency (RF) device; a computing device that communicates with the RF device, the computing device including a refresh manager that monitors activities of the RF device; and volatile memory that communicates with the refresh manager of the computing device, wherein the refresh manager determines a refresh rate of the volatile memory based on the monitored activities of the RF device.

A representative method, among others, for determining the refresh rate of volatile memory, includes monitoring activities of a radio frequency (RF) device; and adjusting a refresh rate of volatile memory based on the monitored activities of the RF device.

DETAILED DESCRIPTION

Exemplary systems are first discussed with reference to the figures. Although these systems are described in detail, they are provided for purposes of illustration only and various modifications are feasible. After the exemplary systems are described, examples of flow diagrams of the systems are provided to explain the manner in which a refresh rate of volatile memory can be determined based on activities of a radio frequency (RF) device.

FIG. 1is a system overview that determines the refresh rate of the volatile memory135associated with a computing device105. The system100includes an electronic device103that includes the computing device105, a radio frequency (RF) device125and the volatile memory135. The RF device125and the volatile memory135are electrically coupled to the computing device105via lines120,130, respectively. The electronic device103communicates with a wireless communication device140via the radio frequency device125. The electronic device can be, but not limited to, a camera, cell phone and computer, among others. The wireless communication device can be, but not limited to, an RF transmitter, RF receiver, RF transceiver, RF tower and a wireless network router, among others. Although the RF device125and the volatile memory135are shown to be separate components from the computing device105, the RF device125and the volatile memory135can be integrated as part of the computing device105, which is illustrated and further described inFIG. 2.

The computing device105includes a refresh manager110, which can be implemented in software (e.g., firmware), hardware, or a combination thereof. In one embodiment, the refresh manager110is implemented in software, as an executable program, and is executed by a special or general purpose digital computer, such as a personal computer (PC; IBM-compatible, Apple-compatible, or otherwise), workstation, minicomputer, or mainframe computer. An example of the computing device105that can implement the refresh manager110is shown inFIG. 2. In general, the refresh manager110monitors activities of the RF devices125and determines a refresh rate of the volatile memory135based on the monitored activities of the RF devices125.

Generally, in terms of hardware architecture, as shown inFIG. 2, the computing device105includes a processor212, memory214, timer/counter215, and one or more input and/or output (I/O) devices216(or peripherals) that are communicatively coupled via a local interface218. The local interface218can be, for example but not limited to, one or more buses or other wired or wireless connections, as is known in the art. The local interface218may have additional elements, which are omitted for simplicity, such as controllers, buffers (caches), drivers, repeaters, and receivers, to enable communications. Further, the local interface218may include addresses, controls, and/or data connections to enable appropriate communications among the aforementioned components.

The processor212is a hardware device for executing software, particularly that stored in memory214. The processor212can be any custom made or commercially available processor, a central processing unit (CPU), an auxiliary processor among several processors associated with the computing device105, a semiconductor based microprocessor (in the form of a microchip or chip set), a macroprocessor, or generally any device for executing software instructions. Examples of suitable commercially available microprocessors are as follows: a PA-RISC series microprocessor from Hewlett-Packard Company, an 80x86 or Pentium series microprocessor from Intel Corporation, a PowerPC microprocessor from IBM, a Sparc microprocessor from Sun Microsystems, Inc, or a 68xxx series microprocessor from Motorola Corporation.

The I/O devices216may include input devices, for example but not limited to, a keyboard, mouse, scanner, microphone, etc. Furthermore, the I/O devices216may also include output devices, for example but not limited to, a printer, display, etc. Finally, the I/O devices216may further include devices that communicate both inputs and outputs, for instance but not limited to, a modulator/demodulator (modem; for accessing another device, system, or network), a radio frequency (RF) device125or other transceiver, a telephonic interface, a bridge, a router, etc. The RF device125receives and transmits RF signals, such activities of which are monitored by the refresh manager110. The refresh manager110can further monitor the signal strengths of the received RF signals to determine the refreshing rate of the volatile memory135.

The memory214can include any one or combination of volatile memory elements135(e.g., random access memory (RAM, such as DRAM, SRAM, SDRAM, etc.)) and nonvolatile memory elements (e.g., ROM, hard drive, tape, CDROM, etc.). Moreover, the memory214may incorporate electronic, magnetic, optical, and/or other types of storage media. Note that the memory214can have a distributed architecture, where various components are situated remote from one another, but can be accessed by the processor212.

The software in memory214may include one or more separate programs, each of which comprises an ordered listing of executable instructions for implementing logical functions. In the example ofFIG. 2, the software in the memory214includes the refresh manager110and an error-rate manager217and a suitable operating system (O/S)222.

The refresh manager110can communicate with the timer/counter215and/or the volatile memory135to determine the refresh rate of the volatile memory135. The refresh manager110can refresh the volatile memory135by reading a row of data bits. The rate of reading the row of data bits is generally referred to as the “refresh rate” of the volatile memory. In one embodiment, the refresh manager110uses the timer215to facilitate reading the row of data bits. The timer215is electrically coupled to the volatile memory135. The timer215includes a timer rate that determines the rate of reading the row of data bits. The refresh manager110determines the refresh rate by instructing the timer215to adjust the timer rate based on the monitored activities of the RF device125.

In another embodiment, the volatile memory135includes a clock236and a refresh control logic237that controls the refresh rate of the volatile memory135. The refresh control logic237is configured to adjust a clock rate that facilitates determining the refresh rate of the volatile memory. The refresh manager110can instruct the refresh control logic237to adjust the clock rate based on the monitored activities of the RF device125.

In one embodiment, the error-rate manager217monitors and transmits a bit error rate of the volatile memory135to the refresh manager110. The “bit error rate” (BER) generally refers to the ratio of the number of bits incorrectly received to the total number of bits sent to the volatile memory135. Examples of bit error ratio, among others, are (a) transmission BER, which is generally referred to as the number of erroneous bits received divided by the total number of bits transmitted; and (b) information BER, which is generally referred to as the number of erroneous decoded (corrected) bits divided by the total number of decoded (corrected) bits. The refresh manager110determines the refresh rate of the volatile memory135based on the monitored bit error rate and the monitored activities of the RF device125.

A non-exhaustive list of examples of suitable commercially available operating systems222is as follows: (a) a Windows operating system available from Microsoft Corporation; (b) a Netware operating system available from Novell, Inc.; (c) a Macintosh operating system available from Apple Computer, Inc.; (e) a UNIX operating system, which is available for purchase from many vendors, such as the Hewlett-Packard Company, Sun Microsystems, Inc., and AT&T Corporation; (d) a LINUX operating system, which is freeware that is readily available on the Internet; (e) a run time Vxworks operating system from WindRiver Systems, Inc.; or (f) an appliance-based operating system, such as that implemented in handheld computers or personal data assistants (PDAs) (e.g., PalmOS available from Palm Computing, Inc., and Windows CE available from Microsoft Corporation). The operating system222essentially controls the execution of other computer programs, such as the refresh manager110, and provides scheduling, input-output control, file and data management, memory management, and communication control and related services.

Each of the refresh manager110and the error-rate manager217is a source program, executable program (object code), script, or any other entity comprising a set of instructions to be performed. When it is a source program, then the program needs to be translated via a compiler, assembler, interpreter, or the like, which may or may not be included within the memory214, so as to operate properly in connection with the O/S222. Furthermore, the refresh manager110and the error-rate manager217can be written as (a) an object oriented programming language, which has classes of data and methods, or (b) a procedure programming language, which has routines, subroutines, and/or functions, for example but not limited to, C, C++, Pascal, Basic, Fortran, Cobol, Perl, Java, and Ada.

If the computing device105is a PC, workstation, or the like, the software in the memory214may further include a basic input output system (BIOS) (omitted for simplicity). The BIOS is a set of essential software routines that initialize and test hardware at startup, start the O/S222, and support the transfer of data among the hardware devices. The BIOS is stored in ROM so that the BIOS can be executed when the computing device105is activated.

When the computing device105is in operation, the processor212is configured to execute software stored within the memory214, to communicate data to and from the memory214, and to generally control operations of the computing device105pursuant to the software. The refresh manager110and the O/S222, in whole or in part, but typically the latter, are read by the processor212, perhaps buffered within the processor212, and then executed.

When the refresh manager110and the error-rate manager217are implemented in software, as is shown inFIG. 2, it should be noted that the refresh manager110and the error-rate manager217can be stored on any computer readable medium for use by or in connection with any computer related system or method. In the context of this document, a computer readable medium is an electronic, magnetic, optical, or other physical device or means that can contain or store a computer program for use by or in connection with a computer related system or method. The refresh manager110can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. In the context of this document, a “computer-readable medium” can be any means that can store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. The computer readable medium can be, for example but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, device, or propagation medium. More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection (electronic) having one or more wires, a portable computer diskette (magnetic), a random access memory (RAM) (electronic), a read-only memory (ROM) (electronic), an erasable programmable read-only memory (EPROM, EEPROM, or Flash memory) (electronic), an optical fiber (optical), and a portable compact disc read-only memory (CDROM) (optical). Note that the computer-readable medium could even be paper or another suitable medium upon which the program is printed, as the program can be electronically captured, via for instance optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner if necessary, and then stored in a computer memory.

In an alternative embodiment, where the refresh manager110and the error-rate manager217are implemented in hardware, the refresh manager110and the error-rate manager217can implemented with any or a combination of the following technologies, which are each well known in the art: a discrete logic circuit(s) having logic gates for implementing logic functions upon data signals, an application specific integrated circuit (ASIC) having appropriate combinational logic gates, a programmable gate array(s) (PGA), a field programmable gate array (FPGA), etc.

FIG. 3is a high-level block diagram that illustrates an embodiment of the architecture, functionality, and/or operation of the refresh manager110, such as that shown inFIG. 2. Beginning with block305, the refresh manager110(FIG. 2) monitors activities of a radio frequency (RF) device125. In step310, the refresh manager110determines whether to adjust a refresh rate of volatile memory135based on the monitored activities of the RF device125. In step315, responsive to determining that the refresh rate is to be adjusted, the refresh manager110adjusts the refresh rate of the volatile memory135based on the monitored activities of the RF device125. The activities of the RF device125include, but are not limited to, the number of times the RF device125is receiving and transmitting RF signals and the signal strengths of the received RF signals.

FIG. 4is a detailed block diagram that illustrates an embodiment of the architecture, functionality, and/or operation of the refresh manager110and an error-rate manager217, such as that shown inFIG. 2. Beginning with step405, the refresh manager110monitors activities of the RF device125. In step410, the refresh manager110determines whether the monitored activities of the RF device125pass a threshold to adjust the refresh rate of the volatile memory135. In step415, responsive to determining that the activities of the RF device125did not pass the threshold, the refresh manager110maintains (or decreases) the refresh rate.

In step420, if the monitored activities of the RF device125pass the threshold, the refresh manager110adjusts the refresh rate of the volatile memory135. The refresh rate of the volatile memory135can be adjusted by decreasing and increasing the refresh rate of the volatile memory135based on the decreased and increased activities of the RF device125, respectively. In one embodiment, step425instructs a timer215to increase a time rate based on the monitored activities of the RF device125, resulting in increasing the refresh rate of the volatile memory135. In another embodiment, step430instructs a refresh control logic237to increase a clock rate of the volatile memory135, resulting in increasing the refresh rate of the volatile memory135.

In another embodiment, the error-rate manager217monitors a bit error rate at step435. In step440, the error-rate manager217determines whether the bit error rate passes an error threshold. If the bit error rate passes the error threshold, the operation is returned to step420, which increases the refresh rate of the volatile memory135. Responsive to determining that the monitored bit error rate did not pass the error threshold, the operation is returned to step405, which monitors the activities of the RF device125.

It should be noted that any process descriptions or blocks in flowcharts should be understood as representing modules, segments, or portions of code which include one or more executable instructions for implementing specific logical functions or steps in the process. As would be understood by those of ordinary skill in the art of the software development, alternate embodiments are also included within the scope of the disclosure. In these alternate embodiments, functions may be executed out of order from that shown or discussed, including substantially concurrently or in reverse order, depending on the functionality involved.

This description has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the disclosure to the precise forms disclosed. Obvious modifications or variations are possible in light of the above teachings. The embodiments discussed, however, were chosen to illustrate the principles of the disclosure, and its practical application. The disclosure is thus intended to enable one of ordinary skill in the art to use the disclosure, in various embodiments and with various modifications, are suited to the particular use contemplated. All such modifications and variation are within the scope of this disclosure, as determined by the appended claims when interpreted in accordance with the breadth to which they are fairly and legally entitled.