High electron mobility transistor (HEMT)

A high electron mobility transistor (HEMT) device with a highly resistive layer co-doped with carbon (C) and a donor-type impurity and a method for making the HEMT device is disclosed. In one embodiment, the HEMT device includes a substrate, the highly resistive layer co-doped with C and the donor-type impurity formed above the substrate, a channel layer formed above the highly resistive layer, and a barrier layer formed above the channel layer. In one embodiment, the highly resistive layer comprises gallium nitride (GaN). In one embodiment, the donor-type impurity is silicon (Si). In another embodiment, the donor-type impurity is oxygen (O).

FIELD OF THE INVENTION

The invention relates generally to high electron mobility transistors (HEMTs), and particularly to HEMTs with a high-resistivity gallium nitride layer co-doped with carbon and a donor-type impurity.

BACKGROUND OF THE INVENTION

The high electron mobility transistor (HEMT) is a type of field effect transistor (FET) in which a hetero-junction between a channel layer and a barrier layer whose electron affinity is smaller than that of the channel layer. A two-dimensional electron gas (2DEG) forms in the channel layer of a group III-V HEMT device due to the mismatch in polarization field at the channel-barrier layer interface. The 2DEG has a high electron mobility that facilitates high-speed switching during device operation. In typical depletion-mode HEMT devices (also known as normally-on devices), a negatively-biased voltage may be applied to the gate electrode to deplete the 2DEG and thereby turn off the device. A group III-V HEMT device is one made of materials in column III of the periodic table, such as aluminum (Al), gallium (Ga), and indium (In), and materials in column V of the periodic table, such as nitrogen (N), phosphorus (P), and arsenic (As).

Group III-Nitride HEMT devices are especially suited for power electronics end-applications operating under voltage and current conditions that cannot be achieved with conventional silicon (Si)-based transistor devices. In order to suppress leakage current and to sustain high voltages without breaking down, group III-Nitride HEMT devices typical employ a highly resistive layer underlying the channel layer. The highly resistive layer commonly comprises a layer of gallium nitride (GaN) doped with carbon (C) or iron (Fe), with C doping being the most typical approach. However, doping GaN with C or Fe introduces defects in the material, which results in an increase in the on-resistance of the HEMT device when stressed at a high voltage. This changing on-resistance is known as current collapse, and it is one problem hindering the widespread adoption of group III-Nitride HEMT devices today.

FIG. 1shows a plot of the current collapse ratio of an HEMT device containing a highly resistive C-doped GaN layer as a function of the thickness of the highly resistive layer. The current collapse ratio is the ratio of the measured on-resistance of the HEMT device after applying a high voltage compared to the measured on-resistance of the HEMT device before applying a high voltage. 200V is applied to the gate of the HEMT device ofFIG. 1to measure the current collapse ratio. As shown inFIG. 1, the current collapse ratio in the HEMT device is directly proportional to the amount of C-doped GaN incorporated into the HEMT device.

When there is no C-doped GaN in the HEMT device, the current collapse ratio is about 1, or in other words, the on-resistance of the HEMT device changed little, if at all, after 200V was applied to the gate of the HEMT device. Conversely, when the HEMT device has a C-doped GaN layer having a thickness of 3 μm, the measured current collapse ratio increases to about 1.2 to 1.3, or a 20% to 30% increase in the on-resistance of the HEMT device after 200V was applied to the gate.

There is, therefore, an unmet demand for HEMT devices that suppress the current collapse caused by C doping in the highly resistive layer while maintaining low leakage current and high breakdown voltage characteristics.

BRIEF DESCRIPTION OF THE INVENTION

In one embodiment, a high electron mobility transistor (HEMT) device includes a substrate and a highly resistive layer formed above the substrate. The HEMT device further includes a channel layer formed above the highly resistive layer and a barrier layer formed above the channel layer. The highly resistive layer is co-doped with carbon (C) and a donor-type impurity. In one embodiment, the highly resistive layer has an average concentration of the donor-type impurity that is 5×1015atoms/cm3or more throughout the highly resistive layer. The ratio of the average concentration of the donor-type impurity compared to an average concentration of C throughout the highly resistive layer is greater than 1:1000, and less than 1:1. In one embodiment, the highly resistive layer has a sheet resistance greater than 2300 Ohms/sq.

The HEMT device is a group III-V device. In one embodiment, the highly resistive layer comprises gallium nitride (GaN). In one embodiment, the channel layer comprises GaN. In one embodiment, the barrier layer comprises aluminum gallium nitride (AlGaN). In one embodiment, the highly resistive layer has a thickness between 0.25 μm and 6 μm. In one embodiment, the channel layer has a thickness between 120 nm and 4 μm. In the embodiment where the barrier layer comprises AlGaN, the barrier layer may have a thickness and a concentration of aluminum (Al) corresponding to a charge density in the channel layer between 5.5×1012C/cm2to 8×1012C/cm2.

In one embodiment, the donor-type impurity is silicon (Si). In another embodiment, the donor-type impurity is oxygen (O). In one embodiment, the highly resistive layer has a substantially uniform concentration of the donor-type impurity throughout the highly resistive layer, with a variance of the concentration of the donor-type impurity being less than 15% throughout the highly resistive layer. In another embodiment, the highly resistive layer has a concentration of the donor-type impurity that is higher at an upper surface of the highly resistive layer facing the channel layer than the average concentration of the donor-type impurity throughout the highly resistive layer. In yet another embodiment, the highly resistive layer has a concentration of the donor-type impurity that is higher at a lower surface of the highly resistive layer facing the substrate than the average concentration of the donor-type impurity throughout the highly resistive layer.

In one embodiment, the HEMT device further includes a buffer layer between the substrate and the highly resistive layer. In this embodiment, the buffer layer may comprise AlGaN, aluminum nitride (AlN), or any other suitable material for growing high quality layers of group III-V materials, or combinations thereof. In one embodiment, the buffer layer has a thickness between 150 Å and 40,000 Å. In yet another embodiment, the HEMT device further includes a layer of GaN between the substrate and the highly resistive layer. In one embodiment, the layer of GaN has a thickness up to 1 μm.

In one embodiment, the HEMT device further includes a source electrode electrically coupled to the barrier layer, a drain electrode electrically coupled to the barrier layer, and a gate electrode electrically coupled to the barrier layer between the source and drain electrodes. The source and drain electrodes may comprise any material suitable to form an ohmic contact with the barrier layer, such as aluminum (Al), Si, titanium (Ti), nickel (Ni), tungsten (W), or any combination or alloy thereof. The gate electrode forms a non-ohmic contact with the barrier layer, and may comprise any suitable material, including Ti. Ni, Al, W, molybdenum (Mo), or any combination or alloy thereof.

In one embodiment, a method of forming a HEMT device includes forming a highly resistive layer co-doped with C and a donor-type impurity above a substrate. The method further includes forming a channel layer above the highly resistive layer and forming a barrier layer above the channel layer. In one embodiment, the donor-type impurity has an average concentration of 5×1015atoms/cm3or more throughout the highly resistive layer. The ratio of the average concentration of the donor-type impurity compared to an average concentration of C throughout the highly resistive layer is greater than 1:1000, and less than 1:1. In one embodiment, the highly resistive layer has a sheet resistance greater than 2300 Ohms/sq.

The highly resistive layer, channel layer, and barrier layer may be formed by any suitable method, including metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE). In one embodiment, the highly resistive layer comprises GaN. In one embodiment, the channel layer comprises GaN. In one embodiment, the barrier layer comprises AlGaN. In one embodiment, the highly resistive layer is grown to a thickness between 0.25 μm and 6 μm. In one embodiment, the channel layer is grown to a thickness between 120 nm and 4 μm. In the embodiment where the barrier layer comprises AlGaN, the barrier layer may be grown to a thickness and have a concentration of Al corresponding to a charge density in the channel layer between 5.5×1012C/cm2to 8×1012C/cm2.

In one embodiment, the highly resistive layer is grown in conditions such that C incorporation in the highly resistive layer is promoted while simultaneously introducing the donor-type impurity. The growth conditions include a low ratio of group V precursors to group III precursors, low temperature and pressure, and a high growth rate. In one embodiment, the highly resistive layer is grown using a ratio of group V precursors to group III precursors between 200 to 1400. In one embodiment, the highly resistive layer is grown at a pressure between 25 torr and 150 torr. In one embodiment, the highly resistive layer is grown at a temperature (measured at the wafer) between 900° C. and 1100° C. In one embodiment, the highly resistive layer is grown at a rate between 5 μm/hr and 91 μm/hr. In one embodiment, the donor-type impurity is Si and is introduced into the highly resistive layer by injecting silane (SiH4) while growing the highly resistive layer. In another embodiment, the donor-type impurity is O.

In one embodiment, the highly resistive layer is formed to have a variance of a concentration of the donor-type impurity less than 15% throughout the highly resistive layer. In another embodiment, the highly resistive layer is formed to have a concentration of the donor-type impurity that is higher at an upper surface of the highly resistive layer facing the channel layer than the average concentration of the donor-type impurity throughout the highly resistive layer. In yet another embodiment, the highly resistive layer is formed to have a concentration of the donor-type impurity that is higher at a lower surface of the highly resistive layer facing the substrate than the average concentration of the donor-type impurity throughout the highly resistive layer.

In one embodiment, the method further includes forming a buffer layer between the substrate and the highly resistive layer. In this embodiment, the buffer layer may comprise AlGaN, AlN, or any other suitable material for growing high quality layers of group III-V materials, or combinations thereof. In one embodiment, the buffer layer is grown to a thickness between 150 Å and 40,000 Å. In yet another embodiment, the method further includes growing a layer of GaN between the substrate and the highly resistive layer. In one embodiment, the layer of GaN is grown to a thickness up to 1 μm.

In one embodiment, the method further includes forming a source electrode electrically coupled to the barrier layer, forming a drain electrode electrically coupled to the barrier layer, and forming a gate electrode electrically coupled to the barrier layer between the source and drain electrodes. The source and drain electrodes may comprise any material suitable to form an ohmic contact with the barrier layer, such as Al, Si, Ti, Ni, W, or any combination or alloy thereof. The gate electrode forms a non-ohmic contact with the barrier layer, and may comprise any suitable material, including Ti, Ni, Al, W, Mo, or any combination or alloy thereof.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 2shows a cross-sectional view of an HEMT device containing a highly resistive layer co-doped with C and a donor-type impurity, according to one embodiment of the invention. InFIG. 2, HEMT device200begins with a substrate202. Substrate202can be silicon (Si), silicon carbide (SiC), sapphire (Al2O3), bulk GaN, or any other suitable substrate for epitaxially growing a group III-V material. A buffer layer204is formed on substrate202to provide a surface suitable for growing high-quality layers of group III-V materials. Buffer layer204can be GaN, aluminum gallium nitride (AlGaN), aluminum nitride (AlN), or any other suitable material for growing high-quality layers of group III-V materials, or combinations thereof. In one embodiment, the buffer layer204has a thickness between 150 Å and 40,000 Å.

A GaN layer206is formed on the buffer layer204. In one embodiment, the GaN layer206is un-doped. The GaN layer206is optional (it provides a high-quality surface to form subsequent layers of the HEMT device200), and in one embodiment, subsequent layers of the HEMT device200are formed directly on the buffer layer204. In one embodiment, the GaN layer206has a thickness up to 1 μm.

A highly resistive layer208is formed on the GaN layer206. The highly resistive layer208is co-doped with C and a donor-type impurity. In one embodiment, the donor-type impurity comprises Si. In another embodiment, the donor type impurity comprises oxygen (O). The highly resistive layer208comprises a group III-V material. In one embodiment, the highly resistive layer208comprises GaN. By co-doping the highly resistive layer208with C and a donor-type impurity, such as Si or O, the donor-type impurity changes the nature of the highly resistive layer208by suppressing the formation of undesirable defects introduced by C doping in the highly resistive layer208that lead to current collapse. This is because C can incorporate in a group III-V material as either a desirable acceptor-type defect or as an undesirable donor-type defect.

For example, C can incorporate in GaN either as an acceptor-type on an N site (CN) or as a donor-type on a Ga (CGa). Incorporation of C as an acceptor-type defect is desired to produce highly resistive material. However, the more CNthat is formed, the closer the Fermi level (EF) in the material moves closer to the valence band maximum, and increases the likelihood that undesirable Cc, is formed. The incorporation of a donor-type impurity, such as Si or O, by co-doping the highly resistive layer208can hold the EFfurther from the valence band, thus decreasing the formation energy required to form CN. In other words, co-doping with a donor-type impurity, such as Si or O, suppresses formation of other donor-type defects, such as CGa. This increases the amount of desirable CNformed, and correspondingly reduces the amount of undesirable CGaformed, for a given concentration of C doping in the highly resistive layer208.

Because a donor-type impurity incorporates as a defect that is positively charged, and C desirably incorporates as a defect that is negatively charged in the highly resistive layer208, there is a trade-off between the amount of the donor-type impurity that can be incorporated and the amount of C that can be incorporated in the highly resistive layer208. If the concentration of the donor-type impurity is too high in the highly resistive layer208compared to the concentration of C, the highly resistive layer208will become conductive, increasing the leakage current and reducing the breakdown voltage of the HEMT device200, and defeating the purpose of incorporating the highly resistive layer208in the HEMT device200.

For example,FIG. 3shows a plot of the I-V characteristics of a GaN layer co-doped with an average concentration of C equal to an average concentration of a donor-type impurity. InFIG. 3, the co-doped GaN layer has an average C concentration of 1×1018atoms/cm3and an average Si concentration of 1×108atoms/cm3. As shown inFIG. 3, the I-V plot is linear, indicating that the co-doped GaN layer is conductive. In contrast,FIG. 4shows a plot of the I-V characteristics of a highly resistive GaN layer co-doped with an average concentration of C greater than an average concentration of a donor-type impurity, according to one embodiment of the invention. InFIG. 4, the co-doped GaN layer has an average C concentration of 1×1018atoms/cm3and an average Si concentration of 1×1017atoms/cm3. As shown inFIG. 4, the I-V plot resembles a step function, indicating that co-doped GaN layer is highly resistive.

To evaluate the effect on the electrical characteristics of the GaN layer as a result of co-doping with C and Si, a Hall measurement was taken to measure the sheet resistance (Ohms/sq) and carrier concentration (C/cm3) of the GaN layer at various concentrations of C and Si:

As shown in Table 2-1, when the average concentration of Si is equal to, or greater than, the average concentration of C in the GaN layer, the GaN layer has a measureable concentration of carriers, indicating the GaN layer is conductive. In contrast, when the average concentration of C is greater than the average concentration of Si, the GaN layer is devoid of any material concentration of carriers, and as a result, the sheet resistance of the GaN layer is too high for the Hall measurement.

Referring back toFIG. 2, in one embodiment, the highly resistive layer208has an average concentration of C that is 5×1016atoms/cm3or more throughout the highly resistive layer208. In one embodiment, the highly resistive layer208has an average concentration of the donor-type impurity that is 5×1015atoms/cm3or more throughout the highly resistive layer208. The ratio of the average concentration of the donor-type impurity compared to an average concentration of C throughout the highly resistive layer208is greater than 1:100, and less than 1:1. In one embodiment, the highly resistive layer208has a sheet resistance greater than 2300 Ohms/sq.

In one embodiment, the concentration of the donor-type impurity is substantially uniform throughout the highly resistive layer208. In one embodiment, the variance of the concentration of the donor-type impurity is less than 15% throughout the highly resistive layer208. In one embodiment, the concentration of the donor-type impurity is higher at the upper surface of the highly resistive layer208than the average concentration of the donor-type impurity throughout the highly resistive layer208. In another embodiment, the concentration of the donor-type impurity is higher at the lower surface of the highly resistive layer208than the average concentration of the donor-type impurity throughout the highly resistive layer208. In one embodiment, the highly resistive layer208has a thickness between 0.25 μm and 6 μm.

A channel layer210is formed on the highly resistive layer208. The channel layer210comprises a group III-V material. In one embodiment, the channel layer210comprises GaN. In one embodiment, the channel layer210is un-doped. In one embodiment, the channel layer210has a thickness between 120 nm and 4 μm. A barrier layer212is formed on the channel layer210. The barrier layer212comprises a material suitable for forming a heterojunction with the channel layer210. The resulting difference in the polar properties between the semiconductor material of the channel layer210and the barrier layer212give rise to a fixed charged at their interface, or heterojunction. The fixed charge attracts mobile electrons in the HEMT device200resulting in a 2DEG214at the heterojunction.

The material and thickness of the barrier layer212is preferably selected to achieve a charge density in the 2DEG214between 5.5×1012C/cm2to 8×1012C/cm2. For example, in one embodiment, the channel layer210comprises GaN and the barrier layer212comprises AlGaN. The barrier layer212has an Al composition of 21%, and a thickness of 300 Å. In other embodiments, the Al composition of the barrier layer212may be greater than 21%, in which case the thickness of the barrier layer212may be made thinner than 300 Å to achieve a charge density in the 2DEG214between 5.5×1012C/cm2to 8×1012C/cm2. And conversely, when the Al composition of the barrier layer212is lower than 21%, the thickness of the barrier layer212may be made thicker than 300 Å to achieve the desired charge density in the 2DEG214.

A source electrode216and drain electrode218are formed on top of the barrier layer212and electrically coupled to the barrier layer212. A gate electrode220is formed between the source electrode216and the drain electrode218. The gate electrode220is also electrically coupled to the barrier layer212. Source electrode216and drain electrode218may comprise any material suitable to form an ohmic contact with the barrier layer212, such as Al, Si, titanium (Ti), nickel (Ni), tungsten (W), or any combination or alloy thereof. The gate electrode220forms a non-ohmic contact (a contact which does not exhibit linear I-V characteristics) with the barrier layer212. The gate electrode220may comprise any suitable material, including Ti, Ni, Al, W, molybdenum (Mo), or any combination or alloy thereof.

During device operation of the HEMT device200, a 2DEG214forms in the channel layer210, allowing current to flow between the source electrode216and the drain electrode218.

Co-doping the highly resistive layer208with C and a donor-type impurity provides an additional degree of control over the electrical properties of the highly resistive layer208that is not available with the standard C doping alone. The ability to force a higher percentage of C to incorporate in the desired fashion (as an acceptor-type defect) within the highly resistive layer208by co-doping with the highly resistive layer208with a donor-type impurity opens up a wider process window for the epitaxial growth of the highly resistive layer208. C is typically incorporated into the highly resistive layer208under conditions that yield a low-quality material. Co-doping the highly resistive layer208, however, improves the efficiency of the C that is incorporated (i.e. more C is incorporated as a desired acceptor-type), so less overall C is required to form the highly resistive layer208. Thus, co-doping with C and a donor-type impurity allows the epitaxial growth of the highly resistive layer208to be done under conditions that result in a higher quality material, improving the quality of the highly resistive layer208.

The improved quality of the highly resistive layer208and the suppression of undesirable defects in the highly resistive layer208results in an HEMT device200that has substantially improved current collapse ratios compared to conventional HEMT devices without a highly resistive layer208co-doped with C and a donor-type impurity.

This is illustrated inFIG. 5, which shows a plot of the current collapse ratio of a plurality of HEMT devices containing a highly resistive GaN layer co-doped with C and varying concentrations of a donor-type impurity, according to one embodiment of the invention. InFIG. 5, the plurality of HEMT devices each contain a highly resistive GaN layer with an average concentration of C of 1×1018Atoms/cm3and average concentrations of a donor-type co-dopant, Si, of zero (no intentional donor-type co-doping), 5×1016Atoms/cm3, 1×1017Atoms/cm3, and 2.5×1017Atoms/cm3. Of course, it is understood that even if the highly resistive GaN layer is not intentionally doped with Si, some Si may be incorporated into the highly resistive GaN layer from the manufacturing environment.

As shown inFIG. 5, the HEMT devices that have no intentional Si co-doping in the highly resistive layer have varying current-collapse ratios, some of which are as high as 2.0, meaning the on-resistance of the HEMT device is doubled after applying a high voltage to the gate of the HEMT device. The average current-collapse ratio of the HEMT devices that have no intentional Si co-doping in the highly resistive layer is about 1.65, with the 25thpercentile at about 1.85 and the 25thpercentile at about 1.5. The wide disparity between the current collapse ratios of the HEMT devices that have no concentration of Si in the highly resistive layer makes these devices particularly unsuitable for use in commercial products which requires consistency across the HEMT devices utilized in a device in order to function, not to mention the greatly increased on-resistance of the HEMT devices reduces the operating efficiency of the device.

The HEMT devices that have an average Si co-doping concentration of 5×1016Atoms/cm3, 1×1017Atoms/cm3, and 2.5×1017Atoms/cm3in the highly resistive layer, all show a dramatic improvement in both the average current collapse ratio (about 1.16, 1.1, and 1.15, respectively) and the variation of the current collapse ratio across the plurality of HEMT devices as compared to the HEMT devices that have no concentration of Si in the highly resistive layer. As shown inFIG. 5, the HEMT devices with an average Si co-doping concentration of 1×1017Atoms/cm3in the high-resistivity layer best suppresses current collapse when the average concentration of C in the high resistivity layer is 1×1018Atoms/cm3, with an average current collapse ratio of 1.1, and a variation of about 0.1 between the lowest and highest current collapse ratio. The relatively low current collapse ratio and small variation between the current collapse ratio indicates that HEMT devices with Si co-doping in the highly resistive layer may be consistently manufactured, with the devices having similar electrical properties, making them suitable for mass manufacturing and incorporation into commercial end products, and may replace traditional Si-based transistor devices.

FIG. 6shows a plot of the current-collapse ratio of an HEMT device containing a highly resistive GaN layer co-doped with C and a donor-type impurity as a function of the concentration of a donor-type impurity. The data points illustrated inFIG. 6represent a wafer median measurement of current collapse for a couple dozen HEMT devices formed across a wafer. As withFIG. 5, the HEMT devices each contain a highly resistive layer doped with an average concentration of C of 1×1018atoms/cm3, and varying average concentrations of a donor-type impurity, Si, of 5×1016atoms/cm3, 1×1017atoms/cm3, and 2.5×107atoms/cm3.

As shown inFIG. 6, as the average concentration of co-doping with the donor-type impurity increased in the highly resistive layer, the median current collapse ratio decreased for the HEMT devices formed across the wafer—falling from a current collapse ratio of 1.525 for the HEMT devices with no donor-type impurity in the highly resistive layer down to 1.15 for HEMT devices with an average donor-type impurity concentration of 2.5×1017atoms/cm3. Of course, as previously discussed in connection withFIGS. 3 and 4, the average concentration of the donor-type impurity should not exceed the average concentration of C in the highly resistive layer of the HEMT devices in order to maintain the highly resistive nature of the layer.

FIG. 7shows a plot of the vertical leakage current and breakdown voltage characteristics of a plurality of HEMT devices containing a highly resistive GaN layer co-doped with C and varying concentrations of a donor-type impurity, according to one embodiment of the invention.FIG. 8shows a plot of the lateral leakage current and breakdown voltage characteristics of a plurality of HEMT devices containing a highly resistive GaN layer co-doped with C and varying concentrations of a donor-type impurity, according to one embodiment of the invention. Again, as withFIGS. 5 and 6, the HEMT devices each contain a highly resistive layer doped with an average concentration of C of 1×1018atoms/cm3, and varying average concentrations of a donor-type impurity, Si, of 5×1016atoms/cm3, 1×1017atoms/cm3, and 2.5×1017atoms/cm3.

As shown inFIGS. 7 and 8, the vertical leakage current, vertical breakdown voltage, lateral leakage current, and lateral breakdown voltage characteristics are not substantially affected by co-doping the highly resistive layer with a donor-type impurity. In fact, each of the HEMT devices with Si co-doping in the highly resistive layer exhibits nearly identical vertical and lateral electrical characteristics as compared to the HEMT device with no intentional Si co-doping in the highly resistive layer. Taken together,FIGS. 4-7indicate that co-doping the highly resistive layer of HEMT devices with sufficient average concentrations of C and a donor-type impurity successfully suppresses the current collapse caused by the C doping in the highly resistive layer, while maintaining the desired low leakage current and high breakdown voltage characteristics HEMT devices are known for.

FIGS. 9A-9Gshows cross-sectional views of the manufacturing steps for producing an HEMT device containing a highly resistive layer co-doped with C and a donor-type impurity, according to one embodiment of the invention. InFIG. 9A, the formation of HEMT device900begins by providing a substrate902. Substrate902can be Si, SiC, Al2O3, bulk GaN, or any other suitable substrate material for epitaxially growing a group III-V material. InFIG. 9B, a buffer layer904is grown on the substrate902. Buffer layer904can be GaN, AlGaN, AlN, or any other suitable material for growing high-quality layers of group III-V materials, or combinations thereof. Buffer layer904may be grown by any conventional means, such as placing substrate302in a MOCVD reactor and epitaxially growing the buffer layer904on the top surface of the substrate902. Alternatively, the buffer layer904may be grown using MBE, or any other suitable growth technique. In one embodiment, the buffer layer904is grown to a thickness between 150 Å and 40,000 Å.

InFIG. 9C, a GaN layer906is epitaxially grown on the buffer layer904. Like the buffer layer904, the GaN layer906may be grown using any suitable process, including MOCVD or MBE. In one embodiment, the GaN layer906is un-doped. In this embodiment, the GaN layer906is grown in conditions that suppress the incorporation of impurities in the GaN layer906. These growth conditions include a high ratio of group V precursors to group III precursors, high temperature and pressure, and a low growth rate. In one embodiment, the GaN layer906is grown with a ratio of group V precursors to group III precursors between 1500 and 4000. In one embodiment, the GaN layer906is grown at temperature (measured at the wafer) between 1000° C. and 1100° C. In one embodiment, the GaN layer906is grown at a pressure between 100 torr and 400 torr. In one embodiment, the GaN layer906is grown at a rate not more than 4 μm/hr.

The GaN layer906is optional (it provides a high-quality surface to form subsequent layers of the HEMT device900), and in one embodiment, subsequent layers of the HEMT device900are grown directly on the buffer layer904. In one embodiment, the GaN layer906has a thickness up to 1 μm.

InFIG. 9D, a highly resistive layer908is epitaxially grown on the GaN layer906. The highly resistive layer908comprises a group III-V material. In one embodiment, the highly resistive layer908comprises GaN. The highly resistive layer908may be grown using any suitable process, including MOCVD or MBE. The highly resistive layer908is grown under conditions that promote the incorporation of C into the highly resistive layer908. These growth conditions include a low ratio of group V precursors to group III precursors, low temperature and pressure, and a high growth rate. In the embodiment where the highly resistive layer908comprises GaN, growing the highly resistive layer908may be accomplished simply by modifying one or more of the growth conditions following the epitaxial growth of the GaN layer906. For example, the ratio of the group V precursors to group III precursors may be lowered, the temperature and pressure may be lowered, the growth rate may be increased, or any combination of the foregoing.

In order to co-dope the highly resistive layer908with a donor-type impurity, the donor-type impurity is introduced during the growth of the highly resistive layer908. For example, in one embodiment, the donor-type impurity is Si. During the epitaxial growth of the highly resistive layer908under conditions that promote the incorporation of C into the highly resistive layer908, 100 ppm of silane (SiH4) diluted in N is injected into the MOCVD chamber, resulting in the highly resistive layer908being co-doped with C and Si. A similar approach may be taken to introduce any other suitable donor-type impurity, such as O.

In one embodiment, the highly resistive layer908has an average concentration of C that is 5×1016atoms/cm3or more throughout the highly resistive layer908. In one embodiment, the highly resistive layer908has an average concentration of the donor-type impurity that is 5×1015atoms/cm3or more throughout the highly resistive layer908. The ratio of the average concentration of the donor-type impurity compared to an average concentration of C throughout the highly resistive layer908is greater than 1:100, and less than 1:1. In one embodiment, the highly resistive layer908has a sheet resistance greater than 2300 Ohms/sq. In one embodiment, the highly resistive layer908is grown to a thickness between 0.25 μm and 6 μm.

In one embodiment, donor-type impurity is incorporated into the highly resistive layer908such that the concentration of the donor-type impurity is substantially uniform throughout the highly resistive layer908. In one embodiment, the variance of the concentration of the donor-type impurity is less than 15% throughout the highly resistive layer908. In one embodiment, the concentration of the donor-type impurity is higher at the upper surface of the highly resistive layer908than the average concentration of the donor-type impurity throughout the highly resistive layer908. In order to accomplish this, more of the donor-type impurity is introduced during the epitaxial growth of the upper region of the highly resistive layer908. In another embodiment, the concentration of the donor-type impurity is higher at the lower surface of the highly resistive layer908than the average concentration of the donor-type impurity throughout the highly resistive layer908. In this embodiment, more of the donor-type impurity is introduced at the start of the epitaxial growth of the highly resistive layer908.

By varying the amount of the donor-type impurity introduced during the epitaxial growth of the highly resistive layer908, the concentration of the donor-type impurity can be correspondingly varied throughout the highly resistive layer908. Similarly, the growth conditions of the highly resistive layer908may also be varied to vary the concentration of the C throughout the highly resistive layer.

As previously discussed in connection withFIG. 2, co-doping the highly resistive layer908with a donor-type impurity improves the efficiency of the C that is incorporated (i.e. more C is incorporated as a desired acceptor-type), so less overall C is required to form the highly resistive layer908. Thus, co-doping with C and a donor-type impurity allows the epitaxial growth of the highly resistive layer908to be done under growth conditions that result in a higher quality material. In one embodiment, the highly resistive layer908is grown using a ratio of group V to group III precursors between 200 and 1400. In one embodiment, the highly resistive layer908is grown at a pressure between 25 torr and 150 torr. In one embodiment, the highly resistive layer908is grown at a temperature (measured at the wafer) between 900° C. and 1000° C. In one embodiment, the highly resistive layer908is grown at a rate between 5 μm/hr and 9 μm/hr.

InFIG. 9E, a channel layer910is epitaxially grown on the highly resistive layer908. The channel layer910comprises a group III-V material. In one embodiment, the channel layer910comprises GaN. The channel layer910may be grown using any suitable process, including MOCVD or MBE. In one embodiment, the channel layer910is un-doped. In this embodiment, the channel layer910is epitaxially grown in conditions that suppress the incorporation of impurities in the channel layer910. These growth conditions include a high ratio of group V precursors to group III precursors, high temperature and pressure, and a low growth rate. In one embodiment, the channel layer910is grown using a ratio of group V precursors to group III precursors between 1500 and 4000. In one embodiment, the channel layer910is grown at a temperature (measured at the wafer) between 1000° C. and 1100° C. In one embodiment, the channel layer910is grown at a pressure between 100 torr and 400 torr. In one embodiment, the channel layer910is grown at a rate not more than 4 μm/hr. In one embodiment, the channel layer is grown to a thickness between 120 nm and 4 μm.

InFIG. 9F, a barrier layer912is epitaxially grown on the channel layer910. The barrier layer912comprises a material suitable for forming a heterojunction with the channel layer910, resulting in a 2DEG914at the heterojunction. The material and thickness of the barrier layer912is preferably selected to achieve a charge density in the 2DEG914between 5.5×1012C/cm2to 8×1012C/cm2. For example, in one embodiment, the channel layer910comprises GaN and the barrier layer912comprises AlGaN. The barrier layer912has an Al composition of 21%, and is grown to a thickness of 300 Å. In other embodiments, the Al composition of the barrier layer912may be greater than 21%, in which case the barrier layer912may be thinner than 300 Å to achieve a charge density in the 2DEG914between 5.5×1012C/cm2to 8×1012C/cm2. And conversely, when the Al composition of the barrier layer912is lower than 21%, the barrier layer912may be made thicker than 300 Å to achieve the desired charge density in the 2DEG914.

InFIG. 9G, a source electrode916, a drain electrode918, and a gate electrode920are formed on top of the barrier layer912using known deposition, photolithography, and etching processes. The gate electrode920is formed between the source electrode916and the drain electrode918. The source electrode916, drain electrode918, and gate electrode920are electrically coupled to the barrier layer912. Source electrode916and drain electrode918may comprise any material suitable to form an ohmic contact with the barrier layer912, such as Al, Si, Ti, Ni, W, or any combination or alloy thereof. The gate electrode920forms a non-ohmic contact with the barrier layer912. The gate electrode920may comprise any suitable material, including Ti, Ni, Al, W, Mo, or any combination or alloy thereof.

Similar to the HEMT device200shown inFIG. 2, the HEMT device900manufactured by the process described inFIGS. 9A-Gwill have an improved current collapse ratio while maintaining similar vertical leakage and breakdown and lateral leakage and breakdown characteristics compared to conventional HEMT devices without a highly resistive layer908co-doped with C and a donor-type impurity. Moreover, the current-collapse ratio of the HEMT devices 900 μmanufactured by the process described inFIGS. 9A-Gwill also have reduced variation between the current collapse ratio, making them suitable for commercial end products, and may replace traditional Si-based transistor devices.

Other objects, advantages and embodiments of the various aspects of the present invention will be apparent to those who are skilled in the field of the invention and are within the scope of the description and the accompanying Figures. For example, but without limitation, structural or functional elements might be rearranged, or method steps reordered, consistent with the present invention. Similarly, principles according to the present invention could be applied to other examples, which, even if not specifically described here in detail, would nevertheless be within the scope of the present invention.