Semiconductor device

A semiconductor device includes: a base plate having a heat dissipation surface and a mounting surface opposite to each other; a semiconductor chip mounted on the mounting surface of the base plate; a sealing material sealing the semiconductor chip; a first sheet adhering to the heat dissipation surface of the base plate and having plural openings; and a second sheet covering the first sheet.

BACKGROUND OF THE INVENTION

Field

The present disclosure relates to a semiconductor device.

Background

In semiconductor devices in related art, a little corrosion or rust of a base plate has not been a problem. A current capacity has been increased as generations of semiconductor devices advance. Along with this, the problem of corrosion or rust of the base plate has been unignorable. Corrosion or rust generated in the base plate acts as an obstacle to dissipation of heat generated in energization, which leads to abnormal heat generation of a semiconductor device, and possibly impairs reliability. It is possible to restore a main terminal and an auxiliary terminal by polishing even if corrosion or rust occurs; however, the base plate may not be restored by polishing because its flatness is under control. In particular, in a semiconductor device using a wide bandgap semiconductor, the current capacity of which is significantly increased compared to devices in related art, a slight difference in the amount of corrosion or rust has a large impact on reliability. Another problem is that a plating process is costly. In this connection, it has been proposed to apply grease to a base plate in order to prevent corrosion and rust before shipment (for example, see JP H11-168161 A).

SUMMARY

However, because grease degrades over time in general, the grease loses original heat dissipation performance while a semiconductor device is stored in a warehouse or the like of a user for a long period of time after shipment. The thickness of the grease becomes uneven due to shocks or vibration in transportation, and reliability is impaired.

An object of the present disclosure, which has been made to solve the above-described problem, is to provide a semiconductor device that can withstand long term storage and retain reliability.

A semiconductor device according to the present disclosure includes: a base plate having a heat dissipation surface and a mounting surface opposite to each other; a semiconductor chip mounted on the mounting surface of the base plate; a sealing material sealing the semiconductor chip; a first sheet adhering to the heat dissipation surface of the base plate and having plural openings; and a second sheet covering the first sheet.

In the present disclosure, the first sheet having the plural openings adheres to the heat dissipation surface of the base plate, and the second sheet covers the first sheet. The second sheet is peeled off immediately before mounting the semiconductor device, and the grease is applied to the base plate by using the first sheet as a mask. Because the grease is applied immediately before use, a concern for degradation of the grease over time may be avoided. Because the second sheet covers the first sheet, the heat dissipation surface of the base plate may be prevented from contacting with outside air. Accordingly, the base plate may be prevented from being corroded or rusted due to outside air environments other than a temperature during transportation or use. Thus, long term storage is possible, and reliability may be retained.

DESCRIPTION OF EMBODIMENTS

FIG. 1is a side view that illustrates a semiconductor device according to an embodiment.FIG. 2is a top view that illustrates the semiconductor device according to the embodiment.FIG. 3is a bottom view that illustrates the semiconductor device according to the embodiment. A base plate2is provided on a lower surface of a casing1. A material of the casing1is PET/PBT or PPS. A material of the base plate2is AlSiC, Cu, Al, or the like. Main current terminals3and4, drive terminals5and a sensor terminal6are provided on an upper surface of the casing1.

The base plate2has a heat dissipation surface2aand a mounting surface2bopposite to each other. A first sheet7adheres to the heat dissipation surface2aof the base plate2. A second sheet8covers the first sheet7. A material of the first sheet7is plastic, a graphite sheet, or the like. A material and a film thickness of the second sheet8are not limited. As materials of the first sheet7and the second sheet8, the materials are preferable which do not degrade over time, that is, whose material quality, weight, insulation, or conductivity do not change.

FIG. 4is a cross-sectional view that illustrates an inner structure of the semiconductor device according to the embodiment. A semiconductor chip9is mounted on the mounting surface2bof the base plate2. An insulation substrate10is provided between the base plate2and the semiconductor chip9. A lower surface electrode11of the insulation substrate10is joined to the mounting surface2bof the base plate2by solder12. An upper surface electrode13of the insulation substrate10is joined to a lower surface electrode of the semiconductor chip9by solder14. An upper surface electrode of the semiconductor chip9is connected with an upper surface electrode16of the insulation substrate10by a wire15. An electrode plate may be used instead of the wire15.

The casing1surrounds the semiconductor chip9and the insulation substrate10on the mounting surface2bof the base plate2. The main current terminals3are connected with the upper surface electrode13. The main current terminals4are connected with the upper surface electrode16. A sealing material17seals the semiconductor chip9, the insulation substrate10, the wire15, and so forth in an inner portion of the casing1. The sealing material17is gel or resin. A lid18covers an upper portion of the casing1.

FIG. 5is a bottom view that illustrates a state where the second sheet of the semiconductor device according to the embodiment is peeled off. The first sheet7has plural openings19. The second sheet8has no opening and is provided throughout the whole surface of the heat dissipation surface of the base plate2. Inner portions of the plural openings19of the first sheet7covered by the second sheet8are hollow and are not filled with grease or the like.

Next, a description will be made about work processes in a case where the semiconductor device according to this embodiment is mounted. First, the second sheet8is peeled off immediately before mounting the semiconductor device. Next, grease20as a heat dissipation material is applied to the plural openings19. Next, the first sheet7is peeled off.FIG. 6is a bottom view that illustrates a state where the first sheet of the semiconductor device according to the embodiment is peeled off. On the heat dissipation surface2aof the base plate2, the applied grease20remains in each of the positions in which the plural openings19are present. As described above, the first sheet7is used as a mask in application of the grease20. Then, the semiconductor device is mounted by causing the base plate2to contact with a target object via the grease20.

As described above, in this embodiment, the first sheet7having the plural openings19adheres to the heat dissipation surface2aof the base plate2, and the second sheet8covers the first sheet7. The second sheet8is peeled off immediately before mounting the semiconductor device, and the grease20is applied to the base plate2by using the first sheet7as a mask. Because the grease20is applied immediately before use, a concern for degradation of the grease20over time may be avoided. Because the second sheet8covers the first sheet7, the heat dissipation surface of the base plate2may be prevented from contacting with outside air. Accordingly, the base plate2may be prevented from being corroded or rusted due to outside air environments other than a temperature during transportation or use. Thus, long term storage is possible, and reliability may be retained.

The second sheet8is more easily peeled off than the first sheet7. That is, the adhesive force between the base plate2and the first sheet7is stronger than the adhesive force between the first sheet7and the second sheet8. Accordingly, the second sheet8may be peeled off with the first sheet7remaining. As methods of adhering the sheets, various methods such as an adhesive and pressure welding are possible. In particular, when an adhesive is used, the adhesive forces of the sheets are easily controlled. A sheet shape is devised, or a component such as a sticky note is interposed between both of the sheets, and only the second sheet8may thereby be peeled off with the first sheet7remaining.

The thickness of the first sheet7is preferably 70 μm to 100 μm, which is the same as the thickness of the grease20recommended by a maker. Accordingly, because the thickness of the grease20may appropriately be managed, reliability in actual use is improved.

The main current terminals3and4on an upper surface of the device may be protected by pasting sheets. However, because the grease is not applied to those terminals, the sheet does not have to have a two-layer structure as described above.

FIG. 7is a top view that illustrates a first modification example of the semiconductor device according to the embodiment.FIG. 8is a bottom view that illustrates the first modification example of the semiconductor device according to the embodiment.FIG. 9is a bottom view that illustrates a state where a second sheet of the first modification example of the semiconductor device according to the embodiment is peeled off.FIG. 10is a bottom view that illustrates a state where the first sheet of the first modification example of the semiconductor device according to the embodiment is peeled off. The first modification example corresponds to a next generation 2-in-1 product. Because the next generation 2-in-1 product has a high current density, a configuration of this embodiment is particularly effective.

FIG. 11is a cross-sectional view that illustrates an inner structure of a second modification example of the semiconductor device according to the embodiment. An insulation film21is provided on the mounting surface2bof the base plate2formed of Cu or the like. Electrodes22and23formed of Cu or the like are provided on the insulation film21. The electrode22is joined to a lower surface electrode of the semiconductor chip9by the solder14. An upper surface electrode of the semiconductor chip9is connected with the electrode23by the wire15. The main current terminals3are connected with the electrode22. The main current terminals4are connected with the electrode23. The other configurations are the same as the configuration illustrated inFIG. 4. Such a configuration in which the insulation film21is provided on the mounting surface2bof the base plate2may obtain similar effects to the above.

The semiconductor chip9is not limited to a device formed of silicon, but instead may be formed of a wide-bandgap semiconductor having a bandgap wider than that of silicon. The wide-bandgap semiconductor is, for example, a silicon carbide, a gallium-nitride-based material, or diamond. A semiconductor chip formed of such a wide-bandgap semiconductor has a high voltage resistance and a high allowable current density, and thus can be miniaturized. The use of such a miniaturized semiconductor chip enables the miniaturization and high integration of the semiconductor device in which the semiconductor chip is incorporated. Further, since the semiconductor chip has a high heat resistance, a radiation fin of a heatsink can be miniaturized and a water-cooled part can be air-cooled, which leads to further miniaturization of the semiconductor device. Further, since the semiconductor chip has a low power loss and a high efficiency, a highly efficient semiconductor device can be achieved.

A semiconductor device using a wide bandgap semiconductor is often used for an important usage such as a railroad that needs high efficiency. Consequently, the configuration of this embodiment is particularly effective because prevention of loss of reliability due to an outside air environment is highly necessary.

The entire disclosure of Japanese Patent Application No. 2020-027407, filed on Feb. 20, 2020 including specification, claims, drawings and summary, on which the convention priority of the present application is based, is incorporated herein by reference in its entirety.