A two-state modulation system includes a hysteretic comparator with variable thresholds, a two-state processor and an integrating element. A summing circuit combines a signal coupled from the output of the two-state processor, the signal output, the signal input and a delay compensating signal feedback input and a feedback input from an integrating element at the output of the two-state processor. The hysteretic comparator receives a hysteresis control signal that varies the threshold. The hysteresis control signal may be provided by analog switches switched by the switching signal to provide the switched two-state levels to a low pass filter. Rectifying circuitry may also be used for supplying the hysteresis control signal. Limiters and compressors may be connected to the input with the limiter limiting levels tracking the two-state levels, and the compression proportional to the switching frequency.

The present invention relates in general to two-state modulation (TSM) and 
more particularly concerns novel apparatus and techniques for maintaining 
the switching frequency of a two-state modulation system substantially 
constant. 
Two-state modulation has a number of advantages, especially for processing 
power at high levels with great efficiency. The basic patent on two-state 
modulation is U.S. Pat. No. 3,294,981 of Amar B. Bose, granted Dec. 27, 
1966, for SIGNAL TRANSLATION EMPLOYING TWO-STATE TECHNIQUES. An 
improvement over this patented system is current-controlled two-state 
modulation (CCTSM) disclosed in U.S. Pat. No. 4,456,872, granted Jun. 26, 
1984. In typical two-state modulation systems output power semiconductor 
switches turn on and off at a rate significantly higher than the highest 
frequencies of interest in a desired output signal with a ratio of on time 
to off time establishing an average value over a switching cycle 
representative of the amplitude of the desired output signal at that time. 
The instants of switching are related to a feedback signal derived from 
the output. Typically, the switching frequency may vary with duty cycle, 
especially at high levels of modulation. While fixed frequency pulses may 
be injected into the feedback loop to maintain the switching frequency 
nearly constant, a demand for high level modulation, such as a sudden 
shift in the level of the desired output signal, may cause switching 
frequency to change, even in the presence of clock pulses. 
In some applications it is desirable to have a switching frequency 
substantially constant. For example, it may be easier to reduce radio 
frequency interference if the switching frequency remains constant. 
Another advantage of keeping the switching frequency constant is that the 
spectrum of alias signal s due to frequency modulation can be confined to 
higher frequencies. In audio amplifiers this characteristic is especially 
advantageous because otherwise high ripple voltages are developed on the 
load and audible alias signals develop at high modulation levels. 
The stabilized systems can operate at a lower switching frequency without 
producing alias signals. Normally alias signals limit the allowable 
feedback loop gain because these signals overload the system if gain is 
excessive. The stabilized frequency permits the use of higher feedback 
loop gain. Consequently, performance is improved with respect to output 
impedance, distortion and frequency response. The stabilized frequency 
modulation system is optimum, allowing the highest loop gain due to the 
property of TSM and CCTSM (feedback of switching signals with little 
attenuation) and due to the frequency stabilization (prevention of 
interference by alias signals). 
Frequency stabilization allows switching systems to operate in close 
proximity without mutual interference. Frequency stabilized systems may 
operate near digital circuits without interaction. The frequency 
stabilized system is much easier to synchronize to an external frequency 
reference. 
Accordingly, it is an important object of this invention to provide an 
improved frequency-stabilized two-state modulation system. 
According to the invention, in a two-state modulation system the 
improvement resides in means for establishing variable switching 
thresholds in dependence on signals obtained by processing other signals 
in the two-state modulation system. According to one aspect of the 
invention there is delay compensation means for providing a signal for 
compensating for delay in the signal processing.

The same reference symbols identify corresponding elements throughout the 
drawing where appropriate. 
With reference now to the drawing and more particularly FIG. 1 thereof, 
there is shown a frequency-stabilized two-state modulation system 
according to the invention. The system includes a two-state processor 11 
that receives two-state amplitude inputs S.sub.4 and S.sub.5 on lines 12 
and 13, respectively, typically D.C. potentials corresponding to E.sub.a 
and E.sub.b in the system described in U.S. Pat. No. 3,294,981. Two-state 
processor 11 provides an output signal S.sub.17 on output terminal 14, and 
delivers a signal of rectangular waveform S.sub.6 on line 15 to 
integrating element 16 that provides an integrated signal S.sub.7 on line 
17 that is fed back to two-state processor 11. Two-state processor 11 also 
receives a signal S.sub.18 on input line 18. 
Coupling means 21 couples a signal S.sub.8 derived from line 17 to input 
line 22 of signal combiner 23. 
Coupling network 24 couples the signal on line 15 to input 25 of combiner 
23 to provide a signal S.sub.9 related to signal S.sub.6. Input line 26 of 
combiner 23 receives a signal S.sub.1, and input line 27 receives a signal 
S.sub.10, typically an external synchronizing signal for combination with 
the other signals in the inputs of combiner 23, to provide a combined 
signal S.sub.2 on output line 28 applied as a switching signal to 
hysteretic element 31 that provides an output signal S.sub.3 on output 
line 32 that receives a delay of T.sub.d represented by delay means 33 
before effecting switching of two-state processor 11 on input line 34. 
Hysteretic element 31 may also receive an external hysteresis control 
signal S.sub.12 on input line 35. A signal combining network 36 combines 
signals S.sub.1, S.sub.4, S.sub.5, S.sub.6, S.sub.17 and S.sub.18 on the 
indicated input lines to provide a signal on output line 37 that is the 
ratio of the product of signals S.sub.14 and S.sub.15 to signal S.sub.16 
with these signals related by the following matrix equation 
##EQU1## 
The threshold levels for switching d.sub.1 +d.sub.2 vary according to the 
sum of the signals on lines 35 and 37. If the signal on line 35, S.sub.12, 
is zero, then this threshold control is a function of the input signal 
S.sub.1 on line 26, the two-state amplitude inputs S.sub.4 and S.sub.5, 
the signal on line 15, S.sub.6, the output signal S.sub.17 and the input 
signal S.sub.18 to two-state processor 18. 
Referring to FIG. 2, there is shown a modification of the embodiment of 
FIG. 1 using additional feedback from the output together with amplifying, 
limiting and filtering means that provides input signal S.sub.1 on line 
26. This embodiment includes sensing and coupling means 41 that provides a 
feedback signal S.sub.20 on line 42 representative of the output signal on 
terminal 14 that is delivered to the - input of summing network 43. The + 
input of summing network 43 receives a signal S.sub.19 on input terminal 
44 to provide a combined signal on its output that is applied to 
amplifying, limiting and filtering means 45 to provide signal S.sub.1 on 
line 26. Amplifying, limiting and filtering means 45 may be used, for 
example, to restrict the maximum modulation that the system will exhibit. 
Output signal S.sub.17 varies as a function of feedback signal S.sub.20 
which is nearly the same as signal S.sub.19. 
Referring to FIG. 3, there is shown a combined block-schematic circuit 
diagram illustrating the logical arrangement of a system according to the 
invention having a direct power stage with switched devices T.sub.1 and 
T.sub.2 and an inductor L in series with output terminal 14 and the 
junction of switching devices T.sub.1 and T.sub.2. A capacitor C is 
connected between output terminal 14 and ground. 
Digital buffer 51 and inverting digital buffer 52 drive switching devices 
T.sub.1 and T.sub.2 so that the two devices are alternately conductive 
during mutually exclusive time intervals. A feedback signal is derived 
from the junction of switching devices T.sub.1 and T.sub.2 and attenuated 
by attenuator 53 to provide a signal on one - input of summer 54 that 
receives an input signal S.sub.18 on the + input of summer 54 to provide a 
combined signal S.sub.6 delivered to integrating element 16' that provides 
signal S.sub.7 at its output delivered to one + input of summer 55. Summer 
55 also receives a signal on a second + input that provides delay 
compensating signal feedback through the feed forward path including 
network 56 that furnishes attenuation T.sub.D /.pi.. An external sync 
signal S.sub.10 may be coupled to the third + input of summer 55. In this 
embodiment integration occurs in the loop including the feedback path 
before the hysteretic switch. 
Referring to FIG. 4 there is shown another embodiment of the invention with 
a direct power stage having both integrated signal feedback and output 
signal feedback using current-controlled two-state modulation system. 
Current sensor 61, typically a resistor of small value, provides a 
feedback signal representative of the current through the winding of 
inductor L' having N.sub.1 turns coupled to the other winding having 
N.sub.2 turns and providing a delay compensating signal through network 62 
to provide signal S.sub.9 at one - input of combiner 63. Current feedback 
signal S.sub.8 is applied to a second - input of summer 63. Output signal 
feedback is coupled through attenuator 64 to the - input of summer 65. The 
+ input of summer 65 receives an input signal S.sub.19 to provide a 
combined signal that is delivered to amplifying, limiting and filtering 
means 45 to provide the signal S.sub.1 at a + input of summer 63. The 
equations relating the different signals to establish the variable 
threshold between d.sub.1 and d.sub.2 are: 
##EQU2## 
Referring to FIG. 5, there is shown a block-schematic circuit diagram of 
another embodiment of the invention of a current-controlled two-state 
modulation system with a flyback power stage with frequency stabilization 
according to the invention. This embodiment of the invention includes an 
inductor L" having a winding with N.sub.1 turns connected in series with 
switching device T.sub.1 and a winding of N.sub.3 turns connected in 
series between switching device T.sub.2 and output terminal 14. Inductor 
L" has a third feedback winding of N.sub.2 turns providing a signal 
through network 71 that furnishes delay compensating feedback signal 
S.sub.9 to a - terminal on summer 63. Current sensors 72 and 73 provide 
signals related to the current flowing through switching devices T.sub.2 
and T.sub.1, respectively, to furnish signals on respective + inputs of 
summer 74 that provides an integrated feedback signal S.sub.8 on a second 
- input of summer 63. 
The equations relating the various signals with the variable threshold span 
d.sub.1 -d.sub.2 are given by: 
##EQU3## 
For determining .pi., the inductance L is the inductance presented at the 
input of the winding with N.sub.1 turns, and the resistance R.sub.c is 
that in series with switching device T.sub.1. The resistance in series 
with switching device T.sub.2 is N.sub.3 /N.sub.1 R.sub.c. 
Referring to FIG. 6, there is shown a block diagram illustrating the 
logical arrangement of a system for creating variable hysteresis. A 
comparator 81 receives the output v.sub.c from summer 82 that combines an 
input signal v.sub.a with a feedback signal provided through multiplier 83 
representing the product of a signal fed back from the output of 
comparator 81 through attenuating network 84 with a hysteresis controlling 
signal v.sub.H on line 85. Comparator 81 provides a two-state output 
signal v.sub.b moving between levels v.sub.s and -v.sub.s. 
The polarity of the feedback path through attenuator 84 and multiplier 83 
is arranged so that the signal component reaching the input of the 
comparator through summer 82 reinforces the state present at the output of 
comparator 81. When the comparator is in the positive state at output 
terminal 86, the input signal at input terminal 87 must become 
sufficiently negative to overcome the effect of positive feedback through 
network 84 and multiplier 83 before comparator 81 will switch to the 
negative state at output terminal 86. Conversely, if the comparator output 
signal is in the negative state, the input signal on terminal 87 must 
become sufficiently positive to overcome the negative feedback passing 
through coupling network 84 and multiplier 83. The hysteresis area created 
through the use of positive feedback when the hysteresis control signal 
v.sub.H is unity is proportional to the attenuation factor H of 
attenuating network 84. Multiplier 83 provides a feedback signal dependent 
on the signal v.sub.H at hysteresis control input 85. 
Referring to FIG. 7, there is shown the hysteresis characteristic created 
with the system of FIG. 6 in which the magnitude of the threshold levels 
d.sub.1 and d.sub.2 are directly proportional to the amplitude of signal 
v.sub.H and inversely proportional to H. 
Referring to FIG. 8, there is shown a system using analog switches to 
provide variable hysteresis. The output signal on line 86 controls analog 
switches 91 and 92 through buffer 93 and inverting buffer 94, 
respectively. When the output signal v.sub.b of comparator 81 is positive, 
switch 91 is closed, connecting the control signal v.sub.H on line 85 to 
summer 82. When the output signal v.sub.b from comparator 81 is negative, 
switch 91 is open and switch 92 closes, connecting the inverse of 
hysteresis control signal v.sub.H on line 85 through inverting amplifier 
95 to summer 82. The resulting hysteretic transfer characteristic is shown 
in FIG. 9. The threshold levels d.sub.1 and d.sub.2 are dependent solely 
upon the magnitude of control signal v.sub.H. 
Having discussed a number of systems and some specific techniques for 
controlling the threshold voltage span d.sub.2 +d.sub.1, it is appropriate 
to consider the mode of operation of a system. Referring to FIG. 1, a 
signal input S.sub.1 may be applied to line 26 or a signal S.sub.18 
applied to line 18. As a result an output signal S.sub.17 related to the 
signal input is provided at output terminal 102. Combining means 23 
provides a signal to operate hysteretic comparator 31. The two-state 
signal produced at the output of hysteretic comparator 31 controls 
operation of two-state processor 11. 
Two-state processor 11 receives two amplitude defining inputs S.sub.4 and 
S.sub.5 at terminals 12 and 13, respectively, and provides a signal 
S.sub.6 on line 15 that is delivered to integrating element 16. In TSM, 
S.sub.6 is the output of the combining means summing the input signal with 
the two-state signal. S.sub.17 is the output of L-C filter connected to 
the two-state signal. In CCTSM, S.sub.6 is the two-state voltage applied 
to the L-C filter. S.sub.17 is the output of L-C filter. S.sub.7 is the 
current flowing from the two-state switch into the inductor, L, of the L-C 
filter. In CCTSM, the two-state processor includes the L-C filter 
elements. Therefore, the sawtooth signal on S.sub.7 feedback is the 
current flow to the inductor, L. In TSM, S.sub.7 the signal feedback to 
the two-state processor 11 is not used. The signal, S.sub.7, provided by 
integrating element 16 on line 17 includes a sawtooth component fed back 
to two-state processor 11. Sensing and coupling means 21 provides an 
integrated feedback signal S.sub.8 on line 22 on a - input of combining 
means 23. This feedback signal is connected to combining means 23 with a 
polarity to create high frequency two-state oscillation at the hysteretic 
comparator output line 32. Unavoidable delays present in the processing 
represented by delay element 33 are compensated by action of a secondary 
feedback path comprising coupling network 24 and line 25 connected to 
combining means 23. 
The signals provided on line 35, that receives an external hysteresis 
control signal S.sub.12, and line 37, at the output of signal combining 
network 36, control the width of the hysteresis loop; that is, the span 
between threshold levels d.sub.1 and d.sub.2. These signals may not only 
control error signals in the two-state modulation system, but also modify 
the switching frequency. 
An external synchronizing input signal S.sub.10 may also be applied on line 
27 to combining means 23. Typically synchronizing signal S.sub.10 may be a 
sawtooth signal synchronizing the switching frequency of the two-state 
modulation system to an external clock. 
Referring to FIG. 2, operation of this system that includes the addition of 
output signal feedback will be described. A signal input S.sub.19 is 
applied on line 44 to combining means 43. Combining means 43 also receives 
an output feedback signal S.sub.2O on line 42 from sensing and coupling 
means 41. This output feedback signal causes the signal at output terminal 
14 to accurately track the signal present on input 44. The addition of 
this output feedback signal also provides additional advantages. There is 
a lower output impedance characteristic at output terminal 14, and 
internal signal limiting protects lower semiconductor devices within 
two-state processor 11. 
Amplifying, limiting and filtering means 45 responds to the output signal 
from combiner 43 to provide an error signal on line 26 to combining means 
23. Amplifying, limiting and filtering means 45 includes limiting levels 
which prevent excessive signals from occurring within the modulation 
system and filtering means for significantly attenuating spectral 
components at the switching frequency and above. 
Referring to FIG. 3, the operation of the system including the direct power 
stage will be described. Delay element 33 represents the delays which 
would occur in power switches T.sub.1 and T.sub.2. Power switches T.sub.1 
and T.sub.2 alternately connect voltages S.sub.4 and S.sub.5 to their 
junction. The two-state voltage signal at this junction is connected 
through attenuator 53 to combining means 54 that combines the input signal 
S.sub.18 with this feedback signal to provide signal S.sub.6 applied to 
the input of integrator 16' and delay compensation means 56 to provide the 
integrated feedback signal S.sub.7 (equal to S.sub.8), the compensating 
signal S.sub.9 and an external sync signal S.sub.10, if present, combined 
by combining means 55 to provide switching signal S.sub.2 to hysteretic 
comparator 31. 
In a two-state modulation system the input signal S.sub.18 is slowly 
varying relative to the rate of two-state switching by hysteretic 
comparator 31 and following circuitry. The period, T, of two-state 
operation can then be expressed as: 
##EQU4## 
Typically, signal S.sub.18 is an input voltage, v.sub.i ; and signals 
S.sub.4 and S.sub.5 are dc supply voltages where S.sub.4 =-S.sub.5 
-v.sub.s. The hysteresis is, generally, a voltage h=v.sub.s 20. Under 
these conditions, the switching period can be expressed as: 
##EQU5## 
and G is the attenuation imparted by attenuator 53. The switching period 
is a function of two signal conditions S.sub.a and S.sub.b defined at the 
output of combining means 54. The switching frequency is variable 
dependent upon these conditions and is also influenced by the time delay 
represented by delay means 33. 
The effect of time delay may be eliminated for certain signal ranges with 
delay compensation with the feed forward comprising feed forward 
attenuation network 56 and associated lines. The feed-forward signal 
shifts the apparent thresholds of the hysteretic comparator 31 to advance 
the switching of the comparator to compensate for the time delay. The 
period with delay compensation may be expressed as: 
##EQU6## 
Referring to FIG. 4, in this current-controlled two-state modulation system 
high frequency operation at switching frequency occurs through current 
feedback signal S.sub.8 and delay compensating feedback signal S.sub.9. 
Voltage feedback signal S.sub.20 maintains substantial conformity between 
the output signal on output terminal 14 and the input signal S.sub.19. 
Equation 3 is an expression for the switching period with feedback from 
the junction of switching devices T1 and T2 to combining means 63: 
##EQU7## 
Typically, S.sub.1 is the average value of a voltage v.sub.a 
.apprxeq.R.sub.c i.sub.L where i.sub.L is the local average current in 
inductor, L', and R.sub.c is the gain resistance of current sensor 61. In 
this case n=v.sub.s /2. Therefore, equation (3) becomes: 
##EQU8## 
The switching period is dependent upon the voltages existing within the 
system and upon the time delay without delay compensation. It is possible 
to compensate for the time delay through the use of additional feedback 
compensation as shown in FIG. 4. A delay compensation feedback signal 
S.sub.9 is derived from the winding having N.sub.2 turns of inductor L'. 
Inductor L'corresponds to an integrating element, such as 16. The signal 
from the winding of N.sub.2 turns is coupled through attenuating network 
62 to a - input of combining means 63. In this embodiment delay 
compensation is achieved with feedback in contrast to FIG. 3 where delay 
compensation is achieved using feedforward. In both cases the delay 
compensation is effected by coupling an attenuated portion of the signal 
applied to an integrating element to combining means that drives the 
hysteretic comparator. The switching period with delay compensation may be 
expressed as: 
##EQU9## 
The following equations give the derivation of the switching period T. The 
voltage S.sub.1 is the output voltage from the integrating element, such 
as 16. The voltage S.sub.a is the signal applied to the integrator, such 
as element 16, during time interval T.sub.1. The voltage S.sub.b is the 
voltage applied to the integrator such as element 16, during interval 
T.sub.2. The expression for switching T shown in equation 9 is valid in 
instances where time delays are negligible. By providing a hysteresis 
control voltage reciprocally dependent upon S.sub.a, S.sub.b and S.sub.1, 
the switching period T becomes constant. Using 
##EQU10## 
using S.sub.a and S.sub.b as defined in equation 3 above, 
##EQU11## 
Using the hysteresis control signal 
##EQU12## 
the switching period is stabilized as 
##EQU13## 
Equations (5)-(12) apply where output signal feedback is utilized. When 
only a single feedback loop is used, the following equations apply: 
##EQU14## 
In the foregoing analysis, the effects of time delay have been neglected. 
The effect of time delay is to shift the apparent thresholds of the 
hysteresis. As a result, the apparent hysteresis at the input to a 
hysteretic comparator is greater than that simply caused by hysteresis 
feedback. To compensate for this delay-induced hysteresis, an additional 
feedback signal may be applied to the combining means at the input to the 
hysteretic comparator, as shown in FIG. 4. The appropriate modified 
feedback signals may be expressed as: 
##EQU15## 
This delay compensation cannot maintain constant frequency operation over 
the total modulation range. The minimum duration of a particular state is 
two times the time delay. In this situation the expressions for switching 
period are given as: 
##EQU16## 
Referring to FIG. 10, there is shown a combined block-schematic circuit 
diagram of a specific form of the two-state modulation system shown in 
FIG. 3 using analog switches of the type shown in FIG. 8. The hysteresis 
control voltage v.sub.H is given by equation 20. 
##EQU17## 
Referring to FIG. 11, there is shown a specific frequency stabilized 
current-controlled two-state modulation system representing a specific 
form of the embodiment shown in FIG. 4. The hysteresis control voltage 
v.sub.H is given by: 
##EQU18## 
Referring to FIG. 12 there is shown a specific form of a current-controlled 
two-state modulation system with a flyback power stage representing a 
specific form of the embodiment of FIG. 5. The hysteresis control voltage 
v.sub.H is given by: 
##EQU19## 
Referring to FIG. 13, there is shown a combined block-schematic circuit 
diagram of a specific form of current-controlled two-state modulation with 
a boost power state. The hysteresis control voltage v.sub.H is given by: 
##EQU20## 
The systems illustrated in FIGS. 10-13 are summarized in the following 
table: 
TABLE 1 
______________________________________ 
MODU- LATION METH- OD 
STAGEPOWER 
S.sub.a = v.sub.1 
S.sub.b = v.sub.2 
##STR1## 
______________________________________ 
TSM DIRECT 
##STR2## 
##STR3## 
0 
CCTSM DIRECT v.sub.S1 - v.sub.o 
v.sub.S2 - v.sub.o 
##STR4## 
CCTSM FLY- BACK 
v.sub.S1 
##STR5## 
##STR6## 
CCTSM BOOST v.sub.S1 v.sub.S1 - v.sub.o 
##STR7## 
______________________________________ 
Referring to FIG. 14, there is shown a block diagram illustrating the 
logical arrangement of a system for providing a hysteretic control voltage 
v.sub.H. This system comprises analog switches 181 and 182. Line 183 
receives a duty cycle signal that may, for example, be derived from 
hysteretic comparator 31. This duty cycle control signal is connected 
through buffer 184 to control analog switch 81 to be on when inverting 
buffer 185 couples the signal to analog switch 182 to control it to be off 
and vice versa. Switches 181 and 182 receive output signals from combining 
means 186 and 187, respectively. 
S.sub.1 is FIG. A, signal, such as is applied on line 200' to 
differentiator 188 to provide an output signal to the - input of combining 
means 186 and the + input of combining means 187. The + and - inputs of 
combining means 186 and 187 receive signals on lines 191 and 192, 
respectively, corresponding to the voltages v.sub.1 and v.sub.2, 
respectively. The signal on the junction of analog switches 181 and 182 is 
coupled through low pass filter 193 to provide on line 194 the hysteresis 
control signal v.sub.H. This embodiment may be implemented with a single 
analog switch integrated circuit, such as an RCA CD 4066. 
Referring to FIG. 15, there is shown a block diagram illustrating the 
logical arrangement of another form of apparatus for providing the 
hysteresis control voltage v.sub.H using rectifiers 101 and 102. Combining 
means 103 receives an input signal v.sub.L related to the signal applied 
to the integrating element, such as signal S.sub.6 in FIG. 4, on input 
line 104. Combining means 103 also receives a signal related to the 
derivative of the output of the integrator provided by differentiator 105 
that receives a signal on line 106 representative of the output of the 
integrator, such as signal S.sub.7. This signal may be derived, for 
example, from the output of amplifying and filtering means 45 in FIG. 4. 
The output signal from combining means 103 is inverted by inverting 
amplifier 107 to provide substantially the same signal but in phase 
opposition to rectifiers 101 and 102, which may be simple rectifiers or 
synchronously operated switches. The resulting combined rectified signal 
at their junction is coupled by low pass filter 193 to output 194 to 
provide a hysteresis control voltage. 
Referring to FIG. 16, there is shown another embodiment of the invention 
for providing the hysteresis control voltage v.sub.H where slowly varying 
signals are present. This embodiment of the invention is especially 
advantageous when the integrating element comprises an inductor, such as 
inductor L" shown in FIG. 5. An inductor 111, which may be inductor L", 
comprises a primary winding 112 having a secondary winding 113 with the 
center tap grounded and rectifiers 114 and 115 connected to respective 
ends poled oppositely to rectifiers 116 and 117 connected to the same 
ends. The signals provided across resistors 118 and 119 are coupled by 
low-pass filters 121 and 122, respectively, to provide on lines 123 and 
124, respectively, +v.sub.H and -v.sub.H, respectively. 
Referring to FIG. 17, there is shown a block diagram illustrating the 
logical arrangement of still another system for producing the control 
voltage v.sub.H. This system includes combining means 186 and 187 and 
differentiating means 188 of FIG. 14. This system includes an additional 
combining means 131 having its + input coupled to line 191 for receiving 
the signal v.sub.1 and its - input connected to line 192 for receiving the 
signal v.sub.2 and providing an output the combined signal v.sub.1 
-v.sub.2 that is applied to the divisor input of divider 132. The dividend 
input receives a product signal from the output of multiplier 133 that 
multiplies the output signal provided by combining means 186 and 187. 
The hysteresis control voltage generated as shown in FIGS. 14-17 may be 
used to stabilize the switching period of the two-state modulation system. 
Although these embodiments will maintain frequency stability within 
acceptable limits for many applications, it may be desirable to attain 
still greater stability. 
Referring to FIG. 18, there is shown still another embodiment of the 
invention for providing the control voltage v.sub.H incorporating 
frequency locking feedback. This embodiment incorporates the system of 
FIG. 14 to effectively compare the instantaneous switching frequency of 
the two-state modulation system available of line 183 with a reference or 
clock signal on line 135. A frequency comparator element 136 compares the 
signal of frequency f on line 183 with the clock signal of frequency 
f.sub.c on line 135 to provide a signal v.sub.d at the output 
representative of this difference that is applied to low pass filter 137 
to provide a signal to combining means 138 that is combined with the 
signal on line 194 to provide an output signal v.sub.H on line 141 that 
maintains the frequency constant. While it is preferred to use both inputs 
to combining means 138, either input may be used for providing the voltage 
v.sub.H. 
The duty cycle of switching within a two-state modulation system is 
dependent upon the signals applied to the system. It is always possible to 
apply signals to the system which cause duty cycles to occur at 100% or 
conversely, near 0%. Since time delays are inevitably present in any 
practical two-state modulation system, these limiting duty-cycle 
conditions always lead to operation at frequency away from the normal 
frequency range for switching. Such loss of frequency control occurs at 
limiting duty cycles that tend to occur at input signal extremes. One 
approach for preventing the loss of frequency control is to bound, or 
prelimit, the input signal. 
Referring to FIG. 19, there is shown a block diagram illustrating the 
logical arrangement of a preferred form of limiter. While it is possible 
to limit the input signal at fixed levels sufficiently low to avoid 
overloading under any condition, it is preferred to have the limiting 
levels track supply level conditions. Limiter 142 receives an input signal 
on line 143 and provides an output signal on line 144 that does not exceed 
a limiting level v.sub.S1 /K and a negative limit level v.sub.S2 /K, 
typically the supply voltages S.sub.4 and S.sub.5 applied to the output 
processing stage. 
Referring to FIG. 20, there is shown a block diagram illustrating the 
logical arrangement of another technique for controlling high level signal 
conditions in an input signal applied to the two-state modulation system. 
An input compressor is used to prevent saturation level of this amplifier 
is proportional to the available supply voltage. An integrating function 
is provided by the amplifier 232 with inputs at Pins 2 and 3 and output at 
Pin 1. 
Internally generated, variable hysteresis is used to stabilize the 
switching frequency. A piecewise linear circuit 235 provides the 
stabilization function which approximately maintains a constant switching 
frequency. The stabilization function is generated based upon the supply 
voltage and the input signal. 
The spectrum spreading function shown as an additional control circuit 234 
connected to Pin 10 is used to avoid narrow band spectral emissions which 
would be caused if the switching frequency is exactly constant. This 
function provides a slight amount of frequency modulation in the switching 
frequency in order to avoid the narrow band conditions. 
The frequency stabilization circuit 235 and the spectrum spreading circuit 
234 provide output signals which are multiplied together to yield a signal 
of the form: 
##EQU21## 
where G=constant, and (1+v.sub.d) is the signal produced by the spectrum 
spreading circuit. 
This signal is applied to .+-.1 multiplier 239 producing a hysteretic 
behavior at the input of comparator 233. This sign corresponds to the 
polarity at the two-state output. 
Additional circuits included in integrated circuit 230 are: mute and 
short-circuit protection circuits 237, power transistor drive circuits 
236, and internal 5 vdc and 10 vdc regulator circuits 238. 
FIG. 24 shows the L472 integrated circuit 230 connected into a circuit to 
achieve a complete amplifier function. This is a low voltage amplifier 
operating from a single 14.4 vdc supply. Consequently, two half-bridge 
outputs, comprised of transistors 240, 241 and transistors 242, 243, are 
used to produce a bridge output circuit. Transistors 240 and 243 are 
switched with a common phase. Transistors 241 and 242 are switched with a 
common phase which is the inverse of the phase of transistors 240 and 243. 
The LC output filter, inductors 244, 245 and capacitors 247, 248, 
attenuate high frequency switching signals so that the load, typically a 
loudspeaker, receives an audio signal proportional to the input voltage, 
v.sub.i. Voltages are fed back and summed at the input to the integrator 
by resistors 250-253, and integration is controlled by capacitors 254, 
255. The signal, v.sub.i, provided at terminal 4 of integrated circuit 230 
is limited in amplitude by the limiting amplifier 231. The gain of the 
limiting amplifier 231 is configured to be unity by the 10.0K ohm resistor 
network 256-259. The limiting level of amplifier 231 is proportional to 
the dc supply voltage, v.sub.s, applied to pin 19. 
Frequency stabilization is accomplished without the use of external 
components. However, the frequency spectrum produced by the two-state 
amplifier is spread by maintaining a small frequency modulation, "dither," 
of the switching frequency. In the circuit of FIG. 24, the switching 
frequency is frequency modulated between 90 KHz and 110 KHz. The 
modulation frequency is approximately 10 MHz, and the modulation wave 
shape is a triangular wave. Capacitor 260 determines the "dither" 
frequency. The triangular "dither" wave shape is determined by circuits 
within integrated circuit 230. 
A schematic diagram, FIG. 25, shows the circuits internal to integrated 
circuit 230. Table 2 identifies the transistors and diodes associated with 
the elements of the block diagram of integrated circuit 230 shown in FIG. 
23. 
TABLE 2 
______________________________________ 
Transistors and 
Element of I.C. 230 Diodes in FIG. 25 
______________________________________ 
Limiting Amplifier 231 T33-T72 
Integrating Amplifier 232 
T73-T82 
Comparator 233 T83-T106 
Multiplier 239 T253-T256 
Frequency Stabilization Circuit 235 
T200-T236 
Spectrum Spreading Circuit 234 
T237-T252 
Drive Circuits 236 T107-T117 
T119-T129 
T257-T266 
T269-T280 
5 vdc & 10 vdc Regulators 238 
T1-T32 
Mute & Short-Circuit Protection 237 
T132-T199 -- 
______________________________________ 
While to the best of our knowledge the piecewise linear approach used in 
the L472 to provide frequency stabilized operation of the two-state 
modulation process has not been used previously, the concepts involved in 
achieving this approach are not considered to be new. However, the 
piecewise linear function combined with the prelimiting function in a 
single system realization may be novel. 
FIG. 26 shows a 450-watt amplifier in accordance with the system approach 
of FIG. 11. Integrated signal feedback is related to the current flow 
through filter inductor T108. Output signal feedback is derived from the 
output voltage applied to the loudspeaker. 
The hysteresis control voltage is obtained by rectification of the signal 
voltage on T108 using the method illustrated in FIG. 16. of the two-state 
modulation system. This compressor system may comprise an analog 
multiplier 145 that receives an input signal on line 146 that is 
multiplied by a signal provided by low pass filter 147 representative of 
the two-state system switching frequency. Low frequency detector 151 
receives a signal on line 184 representative of the switching frequency to 
provide a representative signal that is applied to low pass filter 147 to 
provide a multiplier signal that is proportional to switching frequency. 
Referring to FIGS. 21 and 22, there is shown a schematic circuit diagrams 
of exemplary embodiments of current-controlled two-state modulated 
amplifiers according to the invention with representative parameter 
values. Since those skilled in the art will be able to build a working 
model of the invention from this schematic circuit diagram, especially in 
the light of the principles of operation described above, the schematic 
circuit diagrams will only be discussed briefly. 
In FIG. 22 switches IC6, IC7, IC8 and IC9 produce the desired variable 
amplitude hysteresis feedback signal. In FIG. 23 switches IC8, IC9, IC10 
and IC11 produce hysteresis feedback signal v.sub.H. A signal proportional 
to the output voltage, v.sub.o, is obtained by low pass filtering the 
two-state signal existing at the output of integrated circuit IC4. While 
convenient and sufficiently accurate for most purposes, a more accurate 
approach resides in deriving the signals from the input and from the 
two-state output signal s at transistor Q1-Q4. 
FIG. 23 shows the block diagram of an integrated circuit 230, L472, which 
is used to realize stabilized frequency operation in accordance with the 
principles embodied in the block diagram of FIG. 10. The limiting 
amplifier 231 which prevents overload of the modulation process is 
connected to Pins 5 and 6 for input signal. The output of the limiting 
amplifier is provided at Pin 4. The limiting 
Rate compensation is developed by differentiating the error signal using 
C125 and R153. 
Prelimiting of the input signal prevents overloading. Transistors Q104 and 
Q105 provide the prelimiting function proportional to the available supply 
voltage. 
Since current feedback is used, current limiting can be provided by 
limiting the error signal developed at resistor R144. Limiting the error 
signal absolutely limits the current levels which can be achieved in the 
power stage so that the amplified can work into short circuits or 
overloads with safe current levels. 
The invention has a number of advantages. Relatively stable frequency may 
be obtained for a wide range of operating conditions to help avoid 
overloading. Very precise frequency control may be obtained where desired. 
Maintaining frequency stability helps facilitate reducing undesired radio 
frequency interference. 
There has been described novel apparatus and techniques for improving a 
two-state modulation system. It is evident that those skilled in the art 
may now make numerous uses and modifications of and departures from the 
specific apparatus and techniques disclosed herein without departing from 
the inventive concepts. Consequently, the invention is to be construed as 
embracing each and every novel feature and novel combination of features 
present in or possessed by the apparatus and techniques herein disclosed 
and limited solely by the spirit and scope of the appended claims.