IMAGE SENSOR AND IMAGE CAPTURING APPARATUS

An image sensor includes a plurality of pixels, and each pixel comprises: a microlens; a plurality of photoelectric conversion units that convert incident light into charge and accumulate the charge; a plurality of holding units that hold signals corresponding to the charge; a controller that controls timings of accumulating the charge converted by the plurality of photoelectric conversion units and timings of causing the plurality of holding units to hold the signals corresponding to the charge; and an output unit that outputs the signals held in the plurality of holding units in units of one row. The plurality of pixels include a plurality of first pixels having the plurality of photoelectric conversion units arranged in a first direction and a plurality of second pixels having the plurality of photoelectric conversion units arranged in a second direction which is perpendicular to the first direction.

BACKGROUND OF THE INVENTION

Field of the Invention

The present invention relates to an image sensor in which pixel units each having a plurality of photoelectric conversion units are two-dimensionally arranged, and an image capturing apparatus equipped with the image sensor.

Description of the Related Art

As one of focus detection methods performed in an image capturing apparatus, a so-called on-imaging plane phase difference method in which a pair of pupil division signals are obtained using focus detection pixels formed in an image sensor and phase difference focus detection is performed using the pair of pupil division signals is known.

As an example of such an on-imaging plane phase difference method, an image capturing apparatus using a two-dimensional image sensor in which one microlens and a plurality of divided photoelectric conversion units are formed for each pixel is disclosed in Japanese Patent Laid-Open No. 58-24105. The plurality of photoelectric conversion units are configured to receive light transmitted through different regions of the exit pupil of an imaging lens via one microlens to realize pupil division. By calculating the image shift amount using the phase difference signals, which are the signals of the respective photoelectric conversion units, phase difference focus detection can be performed. Further, an image can be acquired from an image signal obtained by adding the signals from the individual photoelectric conversion units for each pixel.

In such an image sensor, in a configuration in which a plurality of photoelectric conversion units are arranged in the horizontal direction within a pixel and thus the pupil division direction is the horizontal direction, in a case where a subject has horizontal stripes, for example, parallax is less likely to appear, which may cause a decrease in focus detection accuracy.

To address this problem, Japanese Patent Laid-Open No. 2011-53519 discloses a technique for improving focus detection accuracy by arranging pairs of the photoelectric conversion units arranged under respective microlenses of the focus detection pixels in two directions to make the pupil division directions to two.

On the other hand, in technical field of a CMOS image sensor, a backside illumination technology that receives light on the side opposite to the side on which the pixel circuit is formed, and a technology that laminates semiconductor substrates to form a laminated structure in the backside illumination type CMOS image sensor are in progress. Japanese Patent Laid-Open No. 2021-68758 discloses an example in which capacitors for accumulating pixel signals are provided, using this laminated structure, on a semiconductor substrate different from the semiconductor substrate on which the pixel circuit is formed, thereby providing a global shutter function.

Further, Japanese Patent Laid-Open No. 2021-68758 discloses phase difference detection pixels whose division directions are vertical and phase difference detection pixels whose division directions are horizontal.

However, in Japanese Patent Laid-Open No. 2021-68758, there is no disclosure about arranging both the phase difference detection pixels whose division direction is vertical and the phase difference detection pixels whose division direction is horizontal in the same solid-state imaging device. In the case of an object having luminance fluctuation in the division direction, focus detection accuracy will be degraded. Further, even if the pupil division directions are two as in Japanese Patent Laid-Open No. 2011-53519, in the pixel configuration of Japanese Patent Laid-Open No. 2021-68758, the isolation region in each pixel is large, so sufficient light reception area cannot be secured, and if the object is dark, it is conceivable that the accuracy of focus detection will decrease.

SUMMARY OF THE INVENTION

The present invention has been made in consideration of the above situation, and further enhances focus detection accuracy in different pupil division directions.

According to the present invention, provided is an image sensor including a plurality of pixels, wherein each pixel comprises: a microlens; a plurality of photoelectric conversion units that convert incident light into charge and accumulate the charge; a plurality of holding units that hold signals corresponding to the charge accumulated in the plurality of photoelectric conversion units; a controller that controls timings of accumulating the charge converted by the plurality of photoelectric conversion units and timings of causing the plurality of holding units to hold the signals corresponding to the charge accumulated in the plurality of photoelectric conversion units; and an output unit that outputs the signals held in the plurality of holding units in units of one row, wherein the plurality of pixels include a plurality of first pixels having the plurality of photoelectric conversion units arranged in a first direction and a plurality of second pixels having the plurality of photoelectric conversion units arranged in a second direction which is perpendicular to the first direction.

According to the present invention, provided is an image capturing apparatus comprising: the image sensor including a plurality of pixels, wherein each pixel comprises: a microlens; a plurality of photoelectric conversion units that convert incident light into charge and accumulate the charge; a plurality of holding units that hold signals corresponding to the charge accumulated in the plurality of photoelectric conversion units; a controller that controls timings of accumulating the charge converted by the plurality of photoelectric conversion units and timings of causing the plurality of holding units to hold the signals corresponding to the charge accumulated in the plurality of photoelectric conversion units; and an output unit that outputs the signals held in the plurality of holding units in units of one row; and a focus detection unit that performs phase difference focus detection based on the signals output from the plurality of holding units, wherein the plurality of pixels include a plurality of first pixels having the plurality of photoelectric conversion units arranged in a first direction and a plurality of second pixels having the plurality of photoelectric conversion units arranged in a second direction which is perpendicular to the first direction.

DESCRIPTION OF THE EMBODIMENTS

First Embodiment

[Overall Configuration of Image Sensor]

FIG.1is a diagram schematically showing the overall configuration of an image sensor100according to a first embodiment of the present invention. The image sensor100includes a pixel array portion101(pixel section), a vertical selection circuit102, a column circuit103and a horizontal selection circuit104.

A plurality of pixels105are arranged in a matrix in the pixel array portion101. By inputting the output of the vertical selection circuit102to the pixels105via pixel actuation wirings107, the pixel signals of the pixels105in the row selected by the vertical selection circuit102are read out to the column circuit103via output signal lines106. One output signal line106may be provided for each pixel column or for a plurality of pixel columns, or a plurality of output signal lines may be provided for each pixel column. A column circuit103receives signals read out in parallel via the plurality of output signal lines106, performs processing such as signal amplification, noise reduction, and A/D conversion, and holds the processed signals. The horizontal selection circuit104sequentially, randomly, or simultaneously selects the signals held in the column circuit103, so that the selected signals are output to the outside of the image sensor100via a horizontal output line and an output unit (both not shown).

By sequentially performing the operation of outputting the pixel signals of the row selected by the vertical selection circuit102to the outside of the image sensor100while changing the row selected by the vertical selection circuit102, two-dimensional image signal or focus detection signals can be read out.

FIG.2is a diagram schematically showing an arrangement of pixels when the image sensor100according to this embodiment has a stacked structure. The image sensor100includes a semiconductor substrate201(referred to as “PDIC”, hereinafter) disposed on the light incident side and a semiconductor substrate202(referred to as “MEMIC”, hereinafter) disposed on the opposite side of the light incident side, and of the pixel array portion101, the portion arranged on the PDIC201is called a PDIC-side pixel region203, and the portion arranged on the MEMIC202is called a MEMIC-side pixel region204. The PDIC-side pixel region203and the MEMIC-side pixel region204are connected by electrical contacts (HB)205arranged for every 2×2 pixels. Note that the HB205may be arranged, for example, for each pixel, or may be arranged for every 4×4 pixels, and the present invention is not limited to the manner of arrangement. InFIG.2, the PDIC201and the MEMIC202are shown separated from each other for easy understanding of the configuration, but in reality, the semiconductor substrates are configured to be in contact with each other.

[Circuit Configuration of Pixel]

FIG.3is an equivalent circuit diagram of the pixels105included in the range of 2×2 pixels in this embodiment.

Of the pixels105included in the range of 2×2 pixels, reference numeral301indicates the portion included in the PDIC-side pixel region203and reference numeral302indicates the portion included in the MEMIC-side pixel region204. Moreover, each set of a PDIC-side pixel311and a MEMIC-side pixel321, a PDIC-side pixel312and a MEMIC-side pixel322, a PDIC-side pixel313and a MEMIC-side pixel323, and a PDIC-side pixel314and a MEMIC-side pixel324constitutes each pixel105.

Next, the configuration of the pixel105will be described by taking the PDIC-side pixel311and the MEMIC-side pixel321as representative examples. The PDIC-side pixels312to314and the MEMIC-side pixels322to324also have the same circuit configuration as that of the PDIC-side pixel311and the MEMIC-side pixel321.

The PDIC-side pixel311has a photodiode (PDA)331and a photodiode (PDB)332, which are two photoelectric conversion units. The signal charge photoelectrically converted by the PDA331according to the amount of incident light and accumulated is transferred via a transfer transistor (TXA)333to a charge-voltage converter (FD)335for conversion into voltage. Further, the signal charge photoelectrically converted and accumulated by the PDB332is transferred to the FD335via the transfer transistor (TXB)334. When the reset transistor (RES)336is turned on, the FD335is reset to the voltage of a constant voltage source VDD. Also, by turning on the RES336and the TXA333and TXB334at the same time, the PDA331and PDB332can be reset.

When a selection switch (SEL)337that selects the PDIC-side pixel311is turned ON, an amplification transistor (SF)338converts the signal charge accumulated in the FD335into voltage, and outputs the converted signal voltage from the PDIC-side pixel311to the MEMIC-side pixel321. The gates of the TXA333, TXB334, RES336and SEL337are connected to corresponding pixel actuation wirings107and controlled by the vertical selection circuit102.

In the following description, in this embodiment, the signal charge accumulated in the photoelectric conversion unit is assumed to be electrons, and the photoelectric conversion unit is formed of an N-type semiconductor and separated by a P-type semiconductor. Alternatively, the signal charge to be accumulated may be holes, and the photoelectric conversion unit may be formed of a P-type semiconductor and separated by an N-type semiconductor.

In the MEMIC-side pixel321, a constant current source (CS)361supplies a constant current when outputting a signal from the SF338. The MEMIC-side pixel321also has a signal holding capacitor (MEMN)341, a signal holding capacitor (MEMA)342, and a signal holding capacitor (MEMB)343for holding the output signal voltages of the PDIC-side pixel311. The MEMIC-side pixel321is further provided with a selection switch (GSN)344, a selection switch (GSA)345, and a selection switch (GSB)346for selecting the MEMN341, MEMA342, and MEMB343, respectively.

Then, when a signal holding capacitor selection transistor (MSELN)350is turned on, the voltage signal of the MEMN341is output to an output signal line353via an amplification transistor (MSFN)347. Similarly, when a signal holding capacitor selection transistor (MSELA)351is turned on, the voltage signal of the MEMA342is output to an output signal line354via an amplification transistor (MSFA)348. Further, when a signal holding capacitor selection transistor (MSELB)352is turned on, the voltage signal of the MEMB343is output to an output signal line355via an amplification transistor (MSFB)349. Note that the output signal lines353to355correspond to the output signal line106shown inFIG.1.

[Readout Operation of Pixel Signal]

The readout operation of pixel signals in this embodiment includes a signal readout operation from the PDIC-side pixels to the MEMIC-side pixels performed simultaneously in the entire pixel array portion101, and a signal readout operation from the MEMIC-side pixels in the selected row to the column circuit103which is sequentially performed while changing the row selected by the vertical selection circuit102.

Signal Readout Operation from PDIC-Side Pixels to MEMIC-Side Pixels

FIGS.4A and4Billustrate a timing chart of the reset operation of the PDA331and PDB332, the accumulation period, and the signal readout timing from the PDIC-side pixels to the MEMIC-side pixels. In this specification, each timing is shown as (t401). InFIG.4A, ϕSEL indicates ON/OFF of the control signal applied to the SEL337, with the upper side indicating ON and the lower side indicating OFF. For other control signals, similarly, ϕ is attached before each component to which the control signal is applied. In addition, in order to distinguish the control signals applied to the PDIC-side pixels311to314and the MEMIC-side pixels321to324, “1” is attached to the control signals applied to the pixel105consisting of the PDIC-side pixel311and the MEMIC-side pixel321. Similarly, “2” is attached to the control signals applied to the pixel105consisting of the PDIC-side pixel312and the MEMIC-side pixel322, and “3” is attached to the control signals applied to the pixel105consisting of the PDIC-side pixel313and the MEMIC-side pixel323, and “4” is attached to the control signal applied to the pixel105consisting of the PDIC-side pixel314and the MEMIC-side pixel324. VHBindicates how the voltage of the HB205changes.

The reset operation of the PDA331and PDB332is performed by sequentially resetting the PDIC-side pixel311(t401˜t402), PDIC-side pixel312(t403˜t404), PDIC-side pixel313(t405to t406), PDIC-side pixel314(t407to t408) so that the time difference between the PDIC-side pixel311, PDIC-side pixel312, PDIC-side pixel313, and PDIC-side pixel312in the reset operation is the same as that in the signal read operation from the PDIC201side to the MEMIC202side, which will be described later. In the reset operation of each PDIC-side pixel, the RES336, TXA333, and TXB334are turned on/off at the same time to discharge charges in the PDA331and PDB332.

The period from the completion of the reset operation of the PDA331and PDB332to the start of the readout operation from the PDIC-side pixels to the MEMIC-side pixels is the exposure period.

The signal readout period from the PDIC-side pixels to the MEMIC-side pixels is comprised of a signal readout period of the PDIC-side pixel311(t411to t421), a signal readout period of the PDIC-side pixel312(t431to t441), a signal readout period of the PDIC-side pixel313(t451to t461) and a signal readout period of the PDIC-side pixel314(t471to t481), which are successively performed. Since the signal readout operation from each PDIC-side pixel is the same, the operation during the signal readout period of the PDIC-side pixel311will be described below.

First, the SEL337is turned on (t411), the SF338and CS361are connected to operate the SF338as a source follower, so that the node of the HB205becomes a voltage corresponding to the voltage of the FD335. Subsequently, the RES336and GSN344are turned on to reset the FD335, and the MEMN341and HB205are connected (t412). After that, the RES336is turned off (t413), and the GSN344is turned off (t414) after the potential of the MEMN341is settled. Thereby, the MEMN341holds a voltage (FD reset voltage) corresponding to the voltage of the FD335before the charges accumulated in the PDA331and PDB332are transferred.

Subsequently, the TXA333and GSA345are turned on, and when the charge accumulated in the PDA331during the accumulation period is transferred to the FD335(t415), the voltage across the FD335drops by an amount corresponding to the transferred charge. After that, the TXA333is turned off (t416), and the GSA345is turned off (t417) after the potential of the MEMA342is settled. As a result, the MEMA342holds a voltage lower than the reset voltage of the FD335by the amount corresponding to the charge accumulated in the PDA331during the accumulation period.

Subsequently, the TXB334and GSB346are turned on, and when the charge accumulated in the PDB332during the accumulation period is transferred to the FD335(t418), the voltage across the FD335drops by an amount corresponding to the transferred charge. After that, the TXB334is turned off (t419), and the GSB346is turned off (t420) after the potential of the MEMB343is settled. As a result, the MEMB343holds a voltage lower than the reset voltage of the FD335by the amount corresponding to the charge accumulated in the PDA331and PDB332during the accumulation period.

After that, by turning off the SEL337(t421), the readout operation of the PDIC-side pixel311is completed.

Signal Readout Operation from MEMIC-Side Pixels to Column Circuit

Signal readout from the MEMIC-side pixels is performed sequentially in units of one row.FIG.5is a timing chart of the readout operation for the 2Nth row and the readout operation for the 2N+1th row. Note that N is an integer of 0 or more. ϕMSELN<2N> indicates ON/OFF of the MSELs of the pixels in the 2Nth row. During the readout operation of the MEMIC-side pixels, the constant current source CS361for PDIC readout is turned off. Also, since the read operation of the 2Nth row and the readout operation of the 2N+1 row are substantially the same, the readout operation of the 2Nth row will be described.

First, the MSELN350, MSELA351and MSELB352are turned on (t501). The output signal lines353,354,355are connected to column constant current sources (not shown). Therefore, the MSFN347, MSFA348, and MSFB349operate as source followers, and the output signal lines353,354, and355become to have voltages corresponding to the voltages of the MEMN341, MEMA342, and MEMB343, respectively. After the output signal lines353,354and355are settled, the voltages of the output signal lines353,354and355are respectively AD-converted by the column circuit103. The signal corresponding to the voltage of the output signal line353at this time is expressed as N1, the signal corresponding to the voltage of the output signal line354is expressed as A1, and the signal corresponding to the voltage of the output signal line355is expressed as B1.

After AD conversion is completed, the MSELN350, MSELA351and MSELB352are turned off and the MRES362, GSN344, GSA345and GSB346are turned on to reset the MEMN341, MEMA342and MEMB343(t502). Then, after the output signal lines353,354, and355are settled to voltages corresponding to the respective reset levels of the MEMN341, MEMA342, and MEMB343, the voltages of the output signal lines353,354, and355are AD-converted by the column circuit103. The signal corresponding to the voltage of the output signal line353at this time is expressed as N2, the signal corresponding to the voltage of the output signal line354is expressed as A2, and the signal corresponding to the voltage of the output signal line355is expressed as B2. From the signals obtained in this way, by calculating

it is possible to obtain the amount of charge accumulated in the PDA331during the accumulation period. Further, by calculating

it is possible to obtain the amount of charge accumulated in the PDB332during the accumulation period.

The reason for subtracting the voltages corresponding to the reset levels of the MEMN341, MEMA342, and MEMB343as shown by (N1-N2), (A1-A2), and (B1-B2) is to cancel variations in the threshold values of the the MSFN347, MSFA348and MSFB349and to cancel the voltage drop corresponding to the length of the output signal line from the pixel to the column circuit. In addition, by holding the signals corresponding to N2, A2, and B2as adjustment values for one frame outside the image sensor100, t502to t503can be omitted. Further, in the present embodiment, for signal readout of one pixel, AD conversion is performed twice for each of the output signal lines353,354, and355. However, the difference between the voltage immediately before t502and the voltage immediately before t503may be AD-converted.

FIG.6is a timing chart showing the row numbers of pixels and the schematic timing of each operation. The PD reset operation, the accumulation period, and the readout of signals from the PDIC-side pixels to the MEMIC-side pixels are sequentially performed in units of four pixels in all rows, and the readout of signals from the MEMIC-side pixels to the column circuits is sequentially performed in units of one row. Therefore, although the timings of the accumulation periods are different among the four pixels, the timings of the accumulation periods of the pixel array portion101as a whole are almost the same, resulting in an operation close to that of a global shutter.

As described above with reference toFIG.2, by arranging the HB205for each pixel, it is possible to perform a global shutter operation in which the timing of the accumulation period is the same over all rows.

[Structure of Light Receiving Portion]

Basic Structure of Light Receiving Portion

Next, the basic configuration of the PDIC-side pixels in this embodiment will be described with reference toFIGS.7to10.

FIG.7is a schematic diagram showing a basic layout of elements constituting the PDIC-side pixel according to this embodiment. InFIG.7, the horizontal direction of the drawing is the x direction, the vertical direction of the drawing is the y direction, and the direction protruding from the drawing is the z direction. Further, in the present embodiment, “plan view” refers to a view seen from the z direction or −z direction with respect to a plane (x-y plane) substantially parallel to the surface of the semiconductor substrate on which the gates of the transistors are arranged. Also, in this embodiment, the “horizontal” direction refers to the x direction, the “vertical” direction refers to the y direction, and the “depth” direction refers to the z direction.

InFIG.7, reference numeral701indicates a microlens (ML);703, a gate electrode of the TXA333;704, a gate electrode of the TXB334;706, a gate electrode of the RES336;707, a gate electrode of the SEL337;708, a gate of the SF338;709, a signal transfer line; and710, a voltage supply line. The same reference numerals are assigned to the same configurations as inFIG.3, and detailed description thereof will be omitted.

The PDA331includes a storage region711, a sensitivity region713, and an N-type connection region715, and the PDB332includes a storage region712, a sensitivity region714, and an N-type connection region716. These storage regions711and712, sensitive regions713and714, and N-type connection regions715and716are made of N-type semiconductors. The sensitive regions713and714are larger in area than the storage regions711and712. Further, as will be described in detail below with reference toFIGS.8A to8C, the storage regions711and712are formed at a first depth and the sensitivity regions713and714are formed at a second depth different from the first depth. In order to make the explanation easier to understand, a region where charges are mainly generated in response to incident light is called a “sensitivity region”, and a region where the generated charges are mainly accumulated is called an “storage region”. However, there is no clear division between the charge generation region and the charge storage region. Charges are also generated in the storage regions711and712according to the light that reaches there, and some of the generated charges remain in the sensitivity regions713and714.

FIGS.8A to8Care diagrams schematically showing the basic cross-sectional structure of the PDIC-side pixel.FIG.8Ais a cross sectional schematic diagram taken along an A-A′ line ofFIG.7,FIG.8Bis a cross sectional schematic diagram taken along a B-B′ line ofFIG.7, andFIG.8Cis a cross sectional schematic diagram taken along a C-C′ line ofFIG.7. The PDIC201has a first surface and a second surface opposite the first surface. The first surface is the front surface of the PDIC201and the second surface is the back surface of the PDIC201. The direction from the first surface to the second surface is the positive direction of the Z direction. On the first surface (front surface) side of the PDIC201, gate electrodes of transistors, a multilayer wiring structure, and the like are arranged. In addition, on the second surface (back surface) side of the PDIC201, an optical structure such as a color filter806and the ML701that collectively cover the two photodiodes of each pixel is arranged, and light enters from the second surface (back surface) side.

As shown inFIG.8A, the PDIC201includes a P-type semiconductor region800, the storage regions711and712and the sensitivity regions713and714surrounded by the P-type semiconductor region800. The storage region711and sensitivity region713have different shapes in plan view, and so as the storage region712and sensitivity region714, and partially overlap each other in plan view. Further, as described above, the storage regions711and712and the sensitivity regions713and714are arranged at different positions in the depth direction, and the storage regions711and712are located in the depth closer to the first surface side (first depth), and the sensitivity regions713and714are located in the depth closer to the second surface side (second depth). In the P-type semiconductor region800, a storage isolation region802separates the storage regions711and712, and a sensitivity isolation region803separates the sensitivity regions713and714.

As shown inFIG.8B, the storage region711and the sensitivity region713are connected in the depth direction via the N-type connection region715. Further, as shown inFIG.8C, the storage region712and the sensitivity region714are connected in depth direction via an N-type connection region716.

InFIG.8B, a region804is recessed in the Z direction by the P-type semiconductor in the storage region711. This recessed region804suppresses charge being accumulated in an area, that overlaps with the N-type connection region715in plan view, on the first surface side of the storage region711. As a result, when the signal charge accumulated in the storage region711of the PDA331is transferred to the FD335, an amount of signal charge left in the storage region711after the transfer operation is suppressed. It should be noted that other methods such as lowering the impurity concentration of a portion of the storage region711may be used instead of the recessed region804as long as an amount of signal charge left in the storage region711can be suppressed.

Also, as shown inFIG.8C, the lengths in the Z-direction of the storage regions711and712are shorter than the lengths in the Z-direction of the storage regions711and712in the cross sections shown inFIGS.8A and8B, and a portion805by which the lengths of the storage regions711and712are shortened is formed of a P-type semiconductor. As a result, when the signal charge accumulated in the storage regions711and712are transferred to the FD335, an amount of signal charge left in the storage regions711and712is suppressed.

FIGS.9A-9Dare diagrams schematically showing x-y cross sections of the PDA331and PDB332in different depths in the z direction.FIG.9Ais a cross-sectional diagram taken along an E-E′ line ofFIGS.8A to8C,FIG.9Bis a cross-sectional diagram taken along an F-F′ line ofFIGS.8A to8C,FIG.9Cis a cross-sectional diagram taken along a G-G′ line ofFIGS.8A to8C, andFIG.9Dis a cross-sectional diagram taken along an H-H′ line ofFIGS.8A to8C. As shown inFIG.9D, in the partial regions of the storage regions711and712located away from the gate electrodes703and704, as described with reference toFIG.8C, the storage regions711and712are replaced by cutout areas805made of P-type semiconductor.

FIG.10is a diagram schematically showing a cross section taken along a D-D′ line ofFIG.7. The storage regions711and712, the sensitivity regions713and714, and the N-type connection regions715and716are shown in the same drawing along the D-D′ polygonal line ofFIG.7on the x-y plane. During the accumulation period, when light is incident on the second surface of the semiconductor substrate801through the ML701, electrons (signal charge) are generated mainly in the sensitivity regions713and714by photoelectric conversion. Most of the signal charge generated in the sensitivity region713moves to the storage region711through the N-type connection region715and is accumulated there. Also, most of the signal charge generated in the sensitivity region714moves to the storage region712through the N-type connection region716and is accumulated there. In order to realize signal charge transfer from the sensitivity region to the storage region, it is desirable that the potential that affects electrons monotonously decrease on the charge transfer path from the sensitivity region to the storage region.

Horizontal Division Layout and Vertical Division Layout

Since the storage regions and the sensitivity regions are arranged at different depths, the layout direction of the sensitivity regions713and714of the PDA331can be made different from that of the PDB332while keeping the positions of the readout transistors of the PDIC-side pixel. The layout directions of the sensitivity regions of the PDA331and PDB332may be differed with the positions of the readout transistors of the PDIC-side pixel being changed.

FIGS.11A to11Cshow the layout of the PDIC-side pixels311,312,314, in which the sensitivity regions713,714are horizontally divided (referred to as “horizontal division layout”, hereinafter).

FIG.11Ais an exploded perspective view of the storage regions711and712, sensitivity regions713and714, N-type connection regions715and716, gate electrode703of the TXA333, gate electrode704of the TXB334, and FD335of the pixel105having the horizontal division layout. In the horizontal division layout, the storage regions711and712and the sensitivity regions713and714all extend in the y-direction, i.e., the same direction.

FIG.11Bis a schematic plan view showing the positional relationship between the storage regions711and712, sensitivity regions713and714, N-type connection regions715and716, gate electrode703of the TXA333, gate electrode704of the TXB334, and FD335of the pixel105having the horizontal division layout in a plan view. In the horizontal division layout, since the sensitivity regions713and714in which charge is generated by photoelectric conversion are arranged in the x direction, it is possible to obtain phase difference signals in which the pupil division direction is the x direction. Reference numeral1101indicates the division direction of the phase difference signals.

FIG.11Cis a schematic plan view showing the positional relationship between the storage isolation region802and the sensitivity isolation region803in the pixel105having the horizontal division layout. In the horizontal division layout, both the storage isolation region802and the sensitivity isolation region803extend in the y-direction.

FIGS.12A to12Cshow the layout of the PDIC-side pixel313, in which the sensitivity regions713and714are divided in the vertical direction (referred to as “vertical division layout”, hereinafter).

FIG.12Ais an exploded perspective view of the storage regions711and712, sensitivity regions713and714, N-type connection regions715and716, gate electrode703of the TXA333, gate electrode704of the TXB334, and FD335of the pixel105having the vertical division layout. In the vertical division layout, the storage regions711and712extend in the y-direction and the sensitivity regions713and714extend in the x-direction, which are orthogonal in plan view, i.e., in different directions.

FIG.12Bis a schematic plan view showing the positional relationship between the storage regions711and712, sensitivity regions713and714, N-type connection regions715and716, gate electrode703of the TXA333, gate electrode704of the TXB334, and FD335of the pixel105having the vertical division layout in plan view. In the vertical division layout, since the sensitivity regions713and714in which charge is generated by photoelectric conversion are arranged in the y direction, it is possible to obtain phase difference signals in which the pupil division direction is the y direction. Reference numeral1201indicates the division direction of the phase difference signals.

FIG.12Cis a schematic plan view showing the positional relationship between the storage isolation region802and the sensitivity isolation region803in the pixel105having the vertical division layout. In the vertical division layout, the storage isolation region802extends in the y direction and the sensitivity isolation region803extends in the x direction.

[Arrangement of Horizontally Divided Pixels, Vertically Divided Pixels, and Color Filters]

FIG.13is a diagram schematically showing an arrangement of the PDIC-side pixels311,312, and314having the horizontal division layout (referred to as “horizontally divided pixels”, hereinafter) and the PDIC-side pixel313having the vertical division layout (referred to as “vertically divided pixels”, hereinafter) and the arrangement of the color filter806in this embodiment in a range of 2×2 pixels.

The horizontally divided pixel311with a color filter806having R (red) spectral sensitivity is arranged on the upper left, the horizontally divided pixel312with the color filter806having G (green) spectral sensitivity is arranged on the upper right, the vertically divided pixel313with the color filter806having G (green) spectral sensitivity is arranged on the lower left, and the horizontally divided pixel314with the color filter806having B (blue) spectral sensitivity is arranged on the lower right, and thus the arrangement of the color filters806is Bayer arrangement.

The arrangement of 2×2 pixels shown inFIG.13is extended over the entire pixel array portion101, thereby the phase difference signals with the pupil division direction in the horizontal direction and the phase difference signals with the pupil division direction in the vertical direction can be obtained in the entire area of the pixel array portion101.

Further, since horizontal phase difference signals are obtained for each of the pixels with R, G, and B color filters, horizontal phase difference signals can be obtained regardless of the color of the object. In addition, the phase difference signals in the vertical direction are obtained from the pixels with a G color filter, which has the highest transmittance among R, G, and B color filters, so the accuracy of the obtained phase difference signals is higher comparing to a case where the phase difference signals are obtained from the pixels with an R color filter or a B color filter.

Next, the structure of the MEMIC-side pixel will be described.

FIG.14is a diagram schematically showing the basic layout of the elements forming the MEMIC-side pixel321according to this embodiment. InFIG.14, reference numeral1444indicates a gate electrode of the GSN344;1445, a gate electrode of the GSA345;1446, a gate electrode of the GSB346;1447, a gate electrode of the MSFN347;1451, a gate electrode of the MSFA348,1449, a gate electrode of the MSFB349;1450, a gate electrode of the MSELN350;1448, a gate electrode of the MSELA351;1452, a gate electrode of the MSELB352;1441, a gate electrode of the MEMN341;1442, a gate electrode of the MEMA342; and1443, a gate electrode of the MEMB343. In this embodiment, the signal holding capacitors MEMN341, MEMA342and MEMB343are trench MOS type.

FIG.15is a cross sectional schematic diagram taken along an I-I′ line ofFIG.14. Within a P-type region1504is an N-type region1501, and within the N-type region1501are gate electrodes1443of the MEMB343. Further, an insulating film layer1502is arranged between the gate electrodes1443and the N-type region1501, and capacitances (MEMB343) are formed between the gate electrodes1443and the N-type region1501through this insulating film. Since the capacitances can be formed in the depth direction in this way, the capacitance per unit area in the X-Y plane can be made larger than that of a normal MOS capacitance. Gate electrodes other than the signal holding capacitors have a planar MOSFET structure and are arranged so as to control the potential of the Si surface separated by an STI1503.

FIG.16is a block diagram showing a schematic configuration of an image capturing apparatus according to the embodiment of the present invention. The image capturing apparatus of the present embodiment includes an image sensor100having the configuration as described above, an overall control/arithmetic unit2, an instruction unit3, a timing generation unit4, an imaging lens unit5, a lens actuation unit6, a signal processing unit7, a display unit8and a recording unit9.

The imaging lens unit5forms an optical image of a subject on the image sensor100. Although it is represented by one lens in the figure, the imaging lens unit5may include a plurality of lenses including a focus lens, a zoom lens, and so on, and a diaphragm, and may be detachable from the main body of the image capturing apparatus or may be integrally configured with the main body.

The image sensor100has the configuration as described in the above embodiment, converts the light incident through the imaging lens unit5into electric signals and outputs them. Signals are read out from each pixel of the image sensor100so that pupil division signals that can be used in phase difference focus detection and an image signal that is a signal of each pixel can be acquired.

The signal processing unit7performs predetermined signal processing such as correction processing on the signals output from the image sensor100, and outputs the pupil division signals used for focus detection and the image signal used for recording.

The overall control/arithmetic unit2comprehensively actuates and controls the entire image capturing apparatus. In addition, the overall control/arithmetic unit2also performs calculations for focus detection using the pupil division signals processed by signal processing unit7, and performs arithmetic processing for exposure control, and predetermined signal processing, such as development for generating images for recording/playback and compression, on the image signal.

The lens actuation unit6actuates the imaging lens unit5, and performs focus control, zoom control, aperture control, and the like on the imaging lens unit5according to control signals from the overall control/arithmetic unit2.

The instruction unit3receives inputs such as shooting execution instructions, actuation mode settings for the image capturing apparatus, and other various settings and selections that are input from outside by the operation of the user, for example, and sends them to the overall control/arithmetic unit2.

The timing generation unit4generates a timing signal for actuating the image sensor100and the signal processing unit7according to a control signal from the overall control/arithmetic unit2.

The display unit8displays a preview image, a playback image, and information such as the actuation mode settings of the image capturing apparatus.

The recording unit9is provided with a recording medium (not shown), and records an image signal for recording. Examples of the recording medium include semiconductor memories such as flash memory. The recording medium may be detachable from the recording unit9or may be built-in.

Next, a calculation method for calculating a defocus amount from the pupil division signals in the overall control/arithmetic unit2will be described with reference toFIGS.17to20. Since the calculation method for calculating the defocus amount from the horizontal phase difference signals and the calculation method for calculating the defocus amount from the vertical phase difference signals are the same in principle, a calculation method for calculating the defocus amount from the horizontal phase difference signals will be explained.

FIG.17is a horizontal cross-sectional view of the horizontally divided pixels311,312and314whose pupil division direction is horizontal and a pupil plane at the position separated from an imaging plane1700of the image sensor100by a distance Ds in the negative direction of the z-axis. InFIG.17, x, y, and z indicate the coordinate axes on the imaging plane1700, and xp, yp, and zpindicate the coordinate axes on the pupil plane.

The pupil plane and the light receiving surface (second surface) of the image sensor100have substantially conjugated relationship via the ML701. Therefore, the luminous flux that has passed through a partial pupil region1701is mostly received in the sensitivity region713(PDA). Further, the luminous flux that has passed through a partial pupil region1702is mostly received in the sensitivity region714(PDB). Signal charges photoelectrically converted near the boundary between the sensitivity regions713and714are stochastically transported to the storage region711or the storage region712. Accordingly, at the boundary between the partial pupil region1701and the partial pupil region1702, the signal gradually switches as the x coordinate increases, and the x-direction dependency of the pupil intensity distribution has a shape as illustrated inFIG.18. Here, the pupil intensity distribution corresponding to the PDA331is referred to as a first pupil intensity distribution1801, and the pupil intensity distribution corresponding to the PDB332is referred to as a second pupil intensity distribution1802.

Next, with reference toFIG.19, a sensor entrance pupil of the image sensor100will be described. In the image sensor100of the present embodiment, the MLs701of respective pixels105are continuously shifted toward the center of the image sensor100depending on the image height coordinates of the pixels on the two-dimensional plane. That is, each ML701is arranged so as to be more eccentric toward the center as the image height of the pixel105becomes higher. The center of the image sensor100and the optical axis of the imaging optical system are shifted by the mechanism that reduces the influence of blurring due to camera shake or the like by moving the imaging optical system or the image sensor100, but they are substantially the same. As a result, in the pupil plane located at a distance Ds from the image sensor100, the first pupil intensity distribution1801and the second pupil intensity distribution1802of horizontally divided pixels arranged at different image height of the image sensor100substantially match.

Hereinafter, the first pupil intensity distribution1801and the second pupil intensity distribution1802are called the “sensor entrance pupil” of the image sensor100, and the distance Ds is called the “sensor pupil distance” of the image sensor100. It should be noted that it is not necessary to configure all pixels to have a single entrance pupil distance. For example, the pixels located at up to 80% of image height may have substantially the same entrance pupil distance, or the pixels in different rows or in different detection areas may be configured to have different entrance pupil distances.

FIG.20shows a schematic relationship diagram between an image shift amount and a defocus amount between parallax images. The image sensor100(not shown) of the present embodiment is aligned on the imaging plane1700, and the exit pupil of the imaging optical system is divided into the partial pupil region1701and the partial pupil region1702as inFIG.17.

For a defocus amount d, the magnitude of the distance from the imaging position of the subject to the imaging plane is given by |d|, the front focused state in which the in-focus position of the subject is on the subject side with respect to the imaging plane is expressed by negative (d<0), and the rear focused state in which the in-focus position of the subject is on the opposite side of the subject with respect to the imaging plane is expressed by positive (d>0). The in-focus state in which the in-focus position of the subject is on the imaging plane is expressed as d=0.FIG.20shows an example in which a subject on an object plane2001is in the in-focus state (d=0) and a subject on an object plane902is in the front focused state (d<0). The front focused state (d<0) and the rear focused state (d>0) are both referred to as a defocus state (|d|>0).

In the front focused state (d<0), among the luminous fluxes from the subject on the object plane2002, the luminous flux that has passed through the partial pupil region1701converges once and then diverges to have the radius Γ1(Γ2) about the position G1(G2) as the center of gravity of the luminous flux, and formed as a blurred image on the imaging plane1700. The blurred image is received by the sensitivity region713(PDA331) and the sensitivity region714(PDB332), and parallax images are generated. Therefore, the generated parallax images are of a blurred image of the subject with the image of the subject on the object plane2002being spread to have the radius Γ1(Γ2) about the position G1(G2) of the center of gravity.

The radius Γ1(Γ2) of blur of the subject image generally increases proportionally as the magnitude |d| of the defocus amount d increases. Similarly, the magnitude |p| of an image shift amount p (=G2−G1) between the subject images of the parallax images also increases approximately proportionally as the magnitude |d| of the defocus amount d increases. The same relationship holds in the rear focused state (d>0), although the image shift direction of the subject images between the parallax images is opposite to that in the front focused state. In the in-focus state (d=0), the positions of the centers of gravity of the subject images in the parallax images are the same (p=0), and no image shift occurs.

Therefore, with regard to the two phase difference signals obtained by using the signals from the sensitivity region713(PDA331) and the sensitivity region714(PDB332), as the magnitude of the defocus amount of the parallax images increases, the magnitude of the image shift amount between the two phase difference signals in the x direction increases. Based on this relationship, the phase difference focus detection is performed by converting the image shift amount calculated by performing correlation operation on the image shift amount between the parallax images in the x-direction into the defocus amount.

[Vertically Divided Pixels and Horizontally Divided Pixels in Calculating Defocus Amount]

In the calculation of the defocus amount described above, it is necessary to calculate an image shift amount. To calculate the image shift amount, two phase difference signals (signal obtained from the PDA331and signal obtained from PDB332) should be compared. Therefore, in order to calculate the image shift amount in the vertical direction, it is necessary to compare two phase difference signals obtained from different rows. Therefore, in an image sensor that does not have a global shutter function, different rows have phase difference signals corresponding to charges accumulated during accumulation periods at different timings, and there is a possibility that the accuracy of the phase difference detection in the vertical direction may be lower than that of the phase difference detection in the horizontal direction.

On the other hand, in the present embodiment, by sequentially controlling the accumulation time and signal readout of the PDIC-side pixels by four pixels over the entire pixel array portion101, an operation close to that of a global shutter can be achieved. In addition, since the timing of the accumulation time in the vertically divided pixels313is the same over the entire pixel array portion101, it is possible to suppress deterioration in accuracy of phase difference detection in the vertical direction due to the time difference in the timing of the accumulation period.

Second Embodiment

In the first embodiment described above, the case where the number of pupil divisions is 2 has been described. However, the present invention is not limited to this, and a configuration in which the number of pupil divisions is greater than two may be employed. In the second embodiment, differences from the first embodiment will be described for the case where the number of pupil divisions is four.

FIG.21is an equivalent circuit diagram of the pixel105according to this embodiment. Compared to the first embodiment, two photodiodes of a photodiode (PDC)2131and a photodiode (PDD)2132, which are photoelectric conversion units configured in the PDIC-side pixel, are added, and a transfer transistor (TXC)2133and a transfer transistor (TXD)2134is added. Accordingly, in the MEMIC-side pixel, a signal holding capacitor (MEMC)2142, a signal holding capacitor (MEMD)2143, a selection switch (GSC)2145, a selection switch (GSD)2146, an amplification transistor (MSFC)2148, an amplification transistor (MSFD)2149, a signal holding capacitor selection transistor (MSELC)2151, a signal holding capacitor selection transistor (MSELD)2152, and output signal lines2154and2155are added.

Further, although the HB205shared by 2×2 pixels in the first embodiment is arranged in each pixel, it may be shared by 2×2 pixels as in the first embodiment.

FIG.22is a diagram schematically showing the arrangement of the horizontally divided pixels311,312,314and the vertically divided pixel313and the arrangement of the color filter806in the range of 2×2 pixels in this embodiment. Except for the above, the configuration and control method described in the above-described first embodiment can be used, so the description thereof is omitted.

As described above, according to the second embodiment, regardless of the number of the plurality of photoelectric conversion units formed in each pixel, it is possible to suppress deterioration in accuracy of phase difference detection in the vertical direction due to the time difference in the timing of the accumulation period.

Third Embodiment

In the first embodiment described above, the case where the repetition pattern of the color filters corresponds to that of the vertically divided pixels and horizontally divided pixels has been described. However, the present invention is not limited to this, and the arrangement of color filters may be repeated by a multiple of the repetition pattern of the vertically divided pixels and horizontally divided pixels. As the third embodiment, a case where the repetition pattern of the color filters is set to twice that of the repetition pattern of the vertically divided pixels and horizontally divided pixels will be described.

FIG.23is a diagram schematically showing the arrangement of the horizontally divided pixels and vertically divided pixels and the arrangement of color filters in a range of 4×4 pixels according to this embodiment. In this embodiment, adjacent 2×2 pixels have the same color filter, and color filters of 4×4 pixels form a Bayer array. Other than the above, it is the same as the first embodiment described above, so the description thereof is omitted.

As described above, according to the third embodiment, the same effects as those of the first embodiment can be obtained.

This application claims the benefit of Japanese Patent Application No. 2022-184971, filed Nov. 18, 2022 which is hereby incorporated by reference herein in its entirety.