Depositing titanium silicon nitride films for forming phase change memories

Organometallic precursors may be utilized to form titanium silicon nitride films that act as heaters for phase change memories. By using a combination of TDMAT and TrDMASi, for example in a metal organic chemical vapor deposition chamber, a relatively high percentage of silicon may be achieved in reasonable deposition times, in some embodiments. In one embodiment, two separate bubblers may be utilized to feed the two organometallic compounds in gaseous form to the deposition chamber so that the relative proportions of the precursors can be readily controlled.

BACKGROUND

This invention relates generally to phase change memories.

Phase change memory devices use phase change materials, i.e., materials that may be electrically switched between a generally amorphous and a generally crystalline state, as an electronic memory. One type of memory element utilizes a phase change material that may be, in one application, electrically switched between generally amorphous and generally crystalline local orders or between different detectable states of local order across the entire spectrum between completely amorphous and completely crystalline states.

Typical materials suitable for such an application include various chalcogenide elements. The state of the phase change materials is also non-volatile. When the memory is set in either a crystalline, semi-crystalline, amorphous, or semi-amorphous state representing a resistance value, that value is retained until reprogrammed, even if power is removed. This is because the programmed value represents a phase or physical state of the material (e.g., crystalline or amorphous).

In order to induce a phase change, a chalcogenide material may be subjected to heating by a heater. One desirable material for forming such heaters is titanium silicon nitride. Existing technology for forming titanium silicon nitride films generally involves first forming a thin titanium nitride film using tetrakis-dimethylamino) titanium (TDMAT). Then, a silane treatment follows to add silicon to the titanium and nitride provided from the TDMAT. However, such techniques have generally provided relatively low amounts of silicon and relatively low electrical resistivity. Other techniques are also known, all of which have various problems.

Thus, there is a need for other ways for making phase change memories.

DETAILED DESCRIPTION

Turning toFIG. 1, an embodiment of a memory100is illustrated. Memory100may include a 3×3 array of memory cells111-119, wherein memory cells111-119each include a select device120and a memory element130. Although a 3×3 array is illustrated inFIG. 1, the scope of the present invention is not limited in this respect. Memory100may have a larger array of memory cells.

In one embodiment, memory elements130may comprise a phase change material. In this embodiment, memory100may be referred to as a phase change memory. A phase change material may be a material having electrical properties (e.g. resistance, capacitance, etc.) that may be changed through the application of energy such as, for example, heat, light, voltage potential, or electrical current. Examples of a phase change material may include a chalcogenide material.

A chalcogenide alloy may be used in a memory element or in an electronic switch. A chalcogenide material may be a material that includes at least one element from column VI of the periodic table or may be a material that includes one or more of the chalcogen elements, e.g., any of the elements of tellurium, sulfur, or selenium.

Memory100may include column lines141-143and row lines151-153to select a particular memory cell of the array during a write or read operation. Column lines141-143and row lines151-153may also be referred to as address lines since these lines may be used to address memory cells111-119during programming or reading. Column lines141-143may also be referred to as bit lines and row lines151-153may also be referred to as word lines.

Memory elements130may be connected to row lines151-153and may be coupled to column lines141-143via select device120. While one select device120is depicted, more select devices may also be used. Therefore, when a particular memory cell (e.g., memory cell115) is selected, voltage potentials may be applied to the memory cell's associated column line (e.g.,142) and row line (e.g.,152) to apply a voltage potential across the memory cell.

Series connected select device120may be used to access memory element130during programming or reading of memory element130. The select device120may be an ovonic threshold switch that can be made of a chalcogenide alloy that does not exhibit an amorphous to crystalline phase change and which undergoes rapid, electric field initiated change in electrical conductivity that persists only so long as a holding voltage is present. Select device120may operate as a switch that is either “off” or “on” depending on the amount of voltage potential applied across the memory cell, and more particularly whether the current through the select device exceeds its threshold current or voltage, which then triggers the device into the on state. The off state may be a substantially electrically nonconductive state and the on state may be a substantially conductive state, with less resistance than the off state. In the on state, the voltage across the select device is equal to its holding voltage VHplus IxRon, where Ron is the dynamic resistance from VH. For example, select device120may have threshold voltage and, if a voltage potential less than the threshold voltage of a select device120is applied across select device120, then at least one select device120may remain “off” or in a relatively high resistive state so that little or no electrical current passes through the memory cell and most of the voltage drop from selected row to selected column is across the select device. Alternatively, if a voltage potential greater than the threshold voltage of select device120is applied across select device120, then the select device120may “turn on,” i.e., operate in a relatively low resistive state so that electrical current passes through the memory cell. In other words, select device120may be in a substantially electrically nonconductive state if less than a predetermined voltage potential, e.g., the threshold voltage, is applied across select device120. Select device120may be in a substantially conductive state if greater than the predetermined voltage potential is applied across select device120. Select device120may also be referred to as an access device, an isolation device, or a switch.

In one embodiment, each select device120may comprise a switching material such as, for example, a chalcogenide alloy, and may be referred to as an ovonic threshold switch, or simply an ovonic switch. The switching material of select device120may be a material in a substantially amorphous state positioned between two electrodes that may be repeatedly and reversibly switched between a higher resistance “off” state (e.g., greater than about ten megaOhms) and a relatively lower resistance “on” state (e.g., about one thousand Ohms in series with VH) by application of a predetermined electrical current or voltage potential. In this embodiment, each select device120may be a two terminal device that may have a current-voltage (I-V) characteristic similar to a phase change memory element that is in the amorphous state. However, unlike a phase change memory element, the switching material of select device120may not change phase. That is, the switching material of select device120may not be a programmable material, and, as a result, select device120may not be a memory device capable of storing information. For example, the switching material of select device120may remain permanently amorphous and the I-V characteristic may remain the same throughout the operating life. A representative example of I-V characteristics of select device120is shown inFIG. 2.

Turning toFIG. 2, in the low voltage or low electric field mode, i.e., where the voltage applied across select device120is less than a threshold voltage (labeled VTH), select device120may be “off” or nonconducting, and exhibit a relatively high resistance, e.g., greater than about 10 megaOhms. Select device120may remain in the off state until a sufficient voltage, e.g., VTH, is applied, or a sufficient current is applied, e.g., ITH, that may switch select device120to a conductive, relatively low resistance on state. After a voltage potential of greater than about VTHis applied across select device120, the voltage potential across select device120may drop (“snapback”) to a holding voltage potential, labeled VH. Snapback may refer to the voltage difference between VTHand VHof a select device.

In the on state, the voltage potential across select device120may remain close to the holding voltage of VHas current passing through select device120is increased. Select device120may remain on until the current through select device120drops below a holding current, labeled IH. Below this value, select device120may turn off and return to a relatively high resistance, nonconductive off state until the VTHand ITHare exceeded again.

Referring toFIG. 3, a substrate10may include a semiconductor substrate and one or more layers thereover. Over the substrate10is a silicon dioxide layer12having a conductor18formed therein. In one embodiment, the conductor18is a row line151-153(FIG. 1). The oxide layer12may be a nitride layer14and another oxide layer16in accordance with conventional damascene processing.

A wall trench20may be formed through the layers14and16as shown inFIG. 4. The trench20may first be covered with a heater layer22, for example of titanium silicon nitride, as shown inFIG. 5.

According to one embodiment of the present invention, tetrakis-(dimethylamino) titanium (TDMAT), whose chemical structure is shown inFIG. 7, may be utilized as a precursor to form the titanium silicon nitride film for phase change memory heater layer22. A combination of TDMAT and tris-(dimethylamino) silane (TrDMASi) (whose chemical structure is shown inFIG. 8) may be utilized to form titanium silicon nitride films with relatively higher resistivity and relatively higher percentages of silicon. For example, titanium silicon nitride films with greater than 10 atomic percent silicon may be formed. The higher the silicon content, the higher the resistivity of the film. The higher the film's resistivity, the better it functions to heat a phase change material in response to current flow.

The two amine or organometallic precursors can be premixed or mixed in situ to form the titanium silicon nitride film, effectively, in a one-step process in some embodiments. In other words, a film of TDMAT need not be applied, followed by deposition of silane.

In some embodiments, conventional metal-organic chemical vapor deposition (MOCVD), plasma enhanced chemical vapor deposition (PECVD), laser assisted chemical vapor deposition, or atomic layer deposition (ALD) may be utilized. The ratio of those precursors can range from 5 to 95 atomic percent TDMAT and from 5 to 95 atomic percent TrDMASi. In one embodiment, the ratio of TDMAT to TrDMASi is about one to ten.

A variety of different deposition chamber configurations may be utilized. InFIG. 6, a MOCVD apparatus50includes a chamber52. A pedestal54supports the wafer W. A gas box56with a showerhead70, having apertures therein, may be provided within the chamber52. The gas box56receives TrDMASi vapor from the bubbler58band TDMAT vapor from the bubbler58a. Each bubbler chamber62may be surrounded by a heater60. A source of pressurized helium64may act as a diluent gas to the bubblers58.

The amount of heat supplied by each heater60may be controlled to control the proportion of liquid organometallic precursor which is converted to vapor and conveyed by a line66or68to the gas box56. In other words, depending on the rate of vaporization, and the heat and pressure applied, one can control the amount of vapor from each bubbler58. Thus, the operator can control the ratio of TDMAT to TrDMASi vapor that is supplied to form the titanium silicon nitride layer on the wafer W.

One reason for using two bubblers58in one embodiment of the present invention is that it has been determined that the vaporization rates of the two organometallic precursors are different. Thus, if they were bubbled in one bubbler, the ratio of the precursors in the resulting titanium silicon nitride film would be fixed by their vaporization rates. Using separate bubblers58enables tailoring of the ratio of the precursors in the final film.

In one embodiment, the bubblers58may be operated at around 50° C., while the chamber52may be maintained between 400° and 500° C. Excess gas within the chamber52may be withdrawn by a pump as indicated inFIG. 6.

Generally, the more silicon in the titanium silicon nitride films, the higher resistivity of the resulting compound. In one advantageous embodiment, a ratio of TDMAT to TrDMASi of one to ten may be utilized to achieve about 20 atomic percent silicon.

However, in other embodiments, a single bubbler may be utilized. In addition, direct liquid injection (DLI) may be utilized. In direct liquid injection, a deposition chamber may be maintained at a temperature of from 400° to 500° C. In one embodiment, a mixture of the two organometallic precursors, in liquid form, may be directly injected into the chamber for in situ vaporization and deposition.

In one embodiment, the layer22may be approximately 50 Angstroms thick. Over the layer22is a layer of nitride23(FIG. 5) that, in one embodiment, may be about 200 Angstroms thick. Finally, over the layer23may be a layer of deposited oxide which, in one embodiment, may be about 900 Angstroms thick.

As shown inFIGS. 9 and 10, the trench20may be situated with its center over the right edge of the conductor18in one embodiment of the present invention. As shown inFIG. 9, the structure ofFIG. 5may be masked to form a via down to the conductor18. In the course of that etch process, the horizontal surface of the layer23may be substantially removed as well as the upper portion of the vertical surface thereof. Then as shown inFIG. 10the structure may be covered with an insulating layer24.

Referring toFIG. 11, the structure shown inFIG. 10may be planarized. As a result, the layer22that will act as a heater to change the phase of an overlying phase change material is U-shaped. Its offset positioning will enable the left upstanding arm of the layer22to act as a wall heater22a, aligned under an overlying phase change material. The thickness of the wall heater22amay be adjusted by adjusting the thickness of the deposited layer22. Then, the wall heater22aacts as a thin heating plate arranged on edge.

Then, another nitride layer16and oxide layer28may be formed as indicated inFIG. 12. Next, a trench52is formed through the layers26and28and sidewall spacers30are formed thereon. A sidewall spacer30may be formed of nitride in one embodiment of the present invention. As indicated, the trench52, lined with the spacer30, may be aligned with the conductor18, in one embodiment of the present invention, but because the trench52is wider than the conductor18, the trench52extends laterally to either side of the conductor18as depicted inFIG. 13.

Then, as shown inFIG. 14, the trench52may be filled with a phase change memory material32that is subsequently planarized to achieved the structure shown inFIG. 14. At this point the heater22ais aligned centrally below the material32. The material32forms a damascene memory element130, defined within a trench in dielectric layers.

Thereafter, as shown inFIG. 15, a select device or ovonic threshold device120(FIG. 1) is formed over the memory material32, that forms the memory element120(FIG. 1). The select device120may include an L-shaped nitride layer34, an oxide layer36, and a conductor38that may be a column line141-143(FIG. 1). A memory material42is formed between upper electrode44and lower electrode40. The nitride layer34may be formed by depositing the layer34over the stack of the memory material42and electrodes44and40and then filling with the oxide layer36to follow by planarizing the entire structure. This sequence is followed by the formation of the upper conductor38.

Thus, referring toFIG. 16, the conductor18may be transverse to two column conductors38in this embodiment. A via (not shown) may connect the upper conductor38ato the underlying lower conductor18. On the right inFIG. 14, the wall heater layer22is adjacent the memory material32. The heater22ais aligned centrally under the material32and centrally over the conductor18. Current flow between conductors18and38results in electrical resistance heat developed by the heater22awhich heats the material32.

The material32has an oval shape as a result of forming the trench52in an oval shape inFIG. 13, also causing the spacer30to have a corresponding oval shape. Thus, the elongate shape of the phase change material32in the column or upper electrode direction provides alignment tolerances between that material32and the overlying threshold device120, as well as the underlying wall heater22a. Other elongate shapes, including rectangles and ellipses, may also be used.

Because the wall heater22ais U-shaped, its area may be reduced to a value below two-dimensional lithographic capabilities and the bulk of the heater22can be annealed or treated post deposition in some embodiments of the present invention.

Switching material32may be a phase change, programmable material capable of being programmed into one of at least two memory states by applying a current to switching material32to alter the phase of switching material32between a substantially crystalline state and a substantially amorphous state, wherein a resistance of switching material32in the substantially amorphous state is greater than the resistance of switching material32in the substantially crystalline state.

Programming of switching material32to alter the state or phase of the material may be accomplished by applying voltage potentials to conductors14and38, thereby generating a voltage potential across select device120and memory element130. When the voltage potential is greater than the threshold voltage of select device120and memory element130, then an electrical current may flow through memory material32in response to the applied voltage potential, and may result in heating of memory material32.

This heating may alter the memory state or phase of memory material32. Altering the phase or state of memory material32may alter the electrical characteristic of memory material32, e.g., the resistance of the material may be altered by altering the phase of the memory material32. Memory material32may also be referred to as a programmable resistive material.

In the “reset” state, memory material32may be in an amorphous or semi-amorphous state and in the “set” state, memory material32may be in an a crystalline or semi-crystalline state. The resistance of memory material32in the amorphous or semi-amorphous state may be greater than the resistance of memory material32in the crystalline or semi-crystalline state. It is to be appreciated that the association of reset and set with amorphous and crystalline states, respectively, is a convention and that at least an opposite convention may be adopted.

Using electrical current, memory material32may be heated to a relatively higher temperature to amorphosize memory material32and “reset” memory material32(e.g., program memory material32to a logic “0” value). Heating the volume of memory material32to a relatively lower crystallization temperature may crystallize memory material32and “set” memory material32(e.g., program memory material32to a logic “1” value). Various resistances of memory material32may be achieved to store information by varying the amount of current flow and duration through the volume of memory material32.

Although the scope of the present invention is not limited in this respect, the heater22amay be titanium (Ti), titanium nitride (TiN), titanium tungsten (TiW), carbon (C), silicon carbide (SiC), titanium aluminum nitride (TiAlN), titanium silicon nitride (TiSiN), polycrystalline silicon, tantalum nitride (TaN), some combination of these films, or other suitable conductors or resistive conductors compatible with switching material32.

Although the scope of the present invention is not limited in this respect, in one example, the composition of switching material42may comprise a Si concentration of about 14%, a Te concentration of about 39%, an As concentration of about 37%, a Ge concentration of about 9%, and an In concentration of about 1%. In another example, the composition of switching material24may comprise a Si concentration of about 14%, a Te concentration of about 39%, an As concentration of about 37%, a Ge concentration of about 9%, and a P concentration of about 1%. In these examples, the percentages are atomic percentages which total 100% of the atoms of the constituent elements.

In another embodiment, a composition for switching material42may include an alloy of arsenic (As), tellurium (Te), sulfur (S), germanium (Ge), selenium (Se), and antimony (Sb) with respective atomic percentages of 10%, 21%, 2%, 15%, 50%, and 2%.

Although the scope of the present invention is not limited in this respect, in other embodiments, switching material42may include Si, Te, As, Ge, sulfur (S), and selenium (Se). As an example, the composition of switching material42may comprise a Si concentration of about 5%, a Te concentration of about 34%, an As concentration of about 28%, a Ge concentration of about 11%, a S concentration of about 21%, and a Se concentration of about 1%.

Conductive material42,44may be a thin film material having a thickness ranging from about 20 Å to about 2000 Å. In one embodiment, the thickness of the material28may range from about 100 Å to about 1000 Å. In another embodiment, the thickness of the conductive material42,44may be about 300 Å. Suitable materials may include a thin film of titanium (Ti), titanium nitride (TiN), titanium tungsten (TiW), carbon (C), silicon carbide (SiC), titanium aluminum nitride (TiAlN), titanium silicon nitride (TiSiN), polycrystalline silicon, tantalum nitride (TaN), some combination of these films, or other suitable conductors or resistive conductors compatible with switching material42.

Turning toFIG. 15, a portion of a system500in accordance with an embodiment of the present invention is described. System500may be used in wireless devices such as, for example, a personal digital assistant (PDA), a laptop or portable computer with wireless capability, a web tablet, a wireless telephone, a pager, an instant messaging device, a digital music player, a digital camera, or other devices that may be adapted to transmit and/or receive information wirelessly. System500may be used in any of the following systems: a wireless local area network (WLAN) system, a wireless personal area network (WPAN) system, a cellular network, although the scope of the present invention is not limited in this respect.

System500may include a controller510, an input/output (I/O) device520(e.g. a keypad, display), a memory530, and a wireless interface540coupled to each other via a bus550. It should be noted that the scope of the present invention is not limited to embodiments having any or all of these components.

Controller510may comprise, for example, one or more microprocessors, digital signal processors, microcontrollers, or the like. Memory530may be used to store messages transmitted to or by system500. Memory530may also optionally be used to store instructions that are executed by controller510during the operation of system500, and may be used to store user data. Memory530may be provided by one or more different types of memory. For example, memory530may comprise any type of random access memory, a volatile memory, a non-volatile memory such as a flash memory and/or a memory such as memory100discussed herein.

I/O device520may be used by a user to generate a message. System500may use wireless interface540to transmit and receive messages to and from a wireless communication network with a radio frequency (RF) signal. Examples of wireless interface540may include an antenna or a wireless transceiver, although the scope of the present invention is not limited in this respect.