Integrated circuit package system having cavity

An integrated circuit package system includes providing a carrier having a first side and a second side; mounting an integrated circuit over the carrier with the first side facing the integrated circuit; attaching an external interconnect to the second side; and forming an encapsulation over the integrated circuit and around the external interconnect with the external interconnect exposed from the encapsulation and with the encapsulation and the second side forming a cavity.

CROSS-REFERENCE TO RELATED APPLICATION

The present application contains subject matter related to U.S. patent application Ser. No. 12/192,052, now U.S. Pat. No. 7,989,950. The related application is assigned to STATS ChipPAC Ltd.

TECHNICAL FIELD

The present invention relates generally to an integrated circuit package system and more particularly to an integrated circuit package system with an encapsulation.

BACKGROUND ART

Increased miniaturization of components, greater packaging density of integrated circuits (“ICs”), higher performance, and lower cost are ongoing goals of the computer industry. Semiconductor package structures continue to advance toward miniaturization, to increase the density of the components that are packaged therein while decreasing the sizes of the products that are made therefrom. This is in response to continually increasing demands on information and communication products for ever-reduced sizes, thicknesses, and costs, along with ever-increasing performance.

These increasing requirements for miniaturization are particularly noteworthy, for example, in portable information and communication devices such as cellular phones, hands-free cellular phone headsets, personal data assistants (“PDA's”), camcorders, notebook computers, and so forth. All of these devices continue to be made smaller and thinner to improve their portability. Accordingly, large-scale IC (“LSI”) packages that are incorporated into these devices are required to be made smaller and thinner. The package configurations that house and protect LSI require them to be made smaller and thinner as well.

Many conventional semiconductor (or “chip”) packages are of the type where a semiconductor die is molded into a package with a resin, such as an epoxy molding compound. Numerous package approaches stack multiple integrated circuit dice or package in package (PIP) or a combination. Other approaches include package level stacking or package on package (POP).

Both PIP and POP designs have their own challenges. For example, PIP designs have yield fallout due to final testing of the PIP device. POP designs have large height and space requirements to accommodate for the stacked devices.

Thus, a need still remains for an integrated circuit package system providing low cost manufacturing, improved yield, and improved reliability. In view of the ever-increasing need to save costs and improve efficiencies, it is more and more critical that answers be found to these problems.

DISCLOSURE OF THE INVENTION

The present invention provides an integrated circuit package system including providing a carrier having a first side and a second side; mounting an integrated circuit over the carrier with the first side facing the integrated circuit; attaching an external interconnect to the second side; and forming an encapsulation over the integrated circuit and around the external interconnect with the external interconnect exposed from the encapsulation and with the encapsulation and the second side forming a cavity.

BEST MODE FOR CARRYING OUT THE INVENTION

In the following description, numerous specific details are given to provide a thorough understanding of the invention. However, it will be apparent that the invention may be practiced without these specific details. In order to avoid obscuring the present invention, some well-known circuits, system configurations, and process steps are not disclosed in detail. Likewise, the drawings showing embodiments of the system are semi-diagrammatic and not to scale and, particularly, some of the dimensions are for the clarity of presentation and are shown greatly exaggerated in the drawing FIGs. Generally, the invention can be operated in any orientation.

The term “on” means there is direct contact among elements. The term “processing” as used herein includes deposition of material, patterning, exposure, development, etching, cleaning, molding, and/or removal of the material or as required in forming a described structure. The term “system” as used herein means and refers to the method and to the apparatus of the present invention in accordance with the context in which the term is used.

Referring now toFIG. 1, therein is shown a top view of an integrated circuit package system100in a first embodiment of the present invention. The top view depicts an encapsulation102, such as a cover including an epoxy molding compound. For illustrative purposes, the integrated circuit package system100is shown with the encapsulation102having a square geometric configuration, although it is understood that the encapsulation can have a different geometric configuration. For example, the integrated circuit package system100can have a rectangular configuration.

Referring now toFIG. 2, therein is showing a cross-sectional view of the integrated circuit package system100along line2-2ofFIG. 1. A first integrated circuit204, such as an integrated circuit die, can be mounted over and connected to a first side206of a carrier208, such as a laminated substrate. A second integrated circuit210, such as an integrated circuit die, can mount over the first integrated circuit204and can connect with the first side206.

A first internal interconnect212, such as a bond wire, can connect the first integrated circuit204to the first side206. A second internal interconnect214, such as a bond wire, can connect the second integrated circuit210and the first side206.

An external interconnect216, such as a solder ball, can be attached to a second side218of the carrier208. For illustrative purposes, the integrated circuit package system100is shown with two rows of the external interconnect216connected along a periphery region of the carrier208, although it is understood that the integrated circuit package system100can have different number of rows of the external interconnect216. For example, the integrated circuit package system100can have one row of the external interconnect216, different number of rows of the external interconnect216along each of carrier edges217of the carrier208, or more than two rows of the external interconnect216.

The encapsulation102can be over the first side206covering the first integrated circuit204, the second integrated circuit210, the first internal interconnect212, and the second internal interconnect214. The encapsulation102can also surround the external interconnect216along the second side218forming an embedded external interconnect220. A bottom side222of the embedded external interconnect220is the side of the embedded external interconnect220facing away from the carrier208.

The encapsulation102can expose a portion of the external interconnect216facing away from the carrier208. The exposed portion of the external interconnect216is exposed from the bottom side222of the embedded external interconnect220. The bottom side222can be planar such that the encapsulation102and the external interconnect216are planar to each other.

An embedded external interconnect height224is the distance between the second side218and the bottom side222. A cavity226can be formed by the second side218and an inner vertical side228of the embedded external interconnect220. A portion of the second side218can be exposed in the cavity226.

Referring now toFIG. 3, therein is shown a cross-sectional view of an integrated circuit package system300exemplified by the top view along line2-2ofFIG. 1in a second embodiment of the present invention. A first integrated circuit302, such as an integrated circuit die, can be mounted over and connected to a first side304of a carrier306, such as a laminated substrate. A second integrated circuit308, such as an integrated circuit die, can mount over the first integrated circuit302and can connect with the first side304.

A first internal interconnect310, such as a bond wire, can connect the first integrated circuit302to the first side304. A second internal interconnect312, such as a bond wire, can connect the second integrated circuit308and the first side304.

An external interconnect314, such as a solder ball, can be attached to a second side318of the carrier306. For illustrative purposes, the integrated circuit package system300is shown with two rows of the external interconnect314connected along a periphery region of the carrier306, although it is understood that the integrated circuit package system300can have different number of rows of the external interconnect314. For example, the integrated circuit package system300can have one row of the external interconnect314, different number of rows of the external interconnect314along each of carrier edges315of the carrier306, or more than two rows of the external interconnect314.

An encapsulation316can be over the first side304covering the first integrated circuit302, the second integrated circuit308, the first internal interconnect310, and the second internal interconnect312. The encapsulation316can also surround the external interconnect314along the second side318forming an embedded external interconnect320. A bottom side322of the embedded external interconnect320is the side of the embedded external interconnect320facing away from the carrier306.

A groove324can be formed in the embedded external interconnect320from the bottom side322. The groove324can expose a portion of the external interconnect314facing away from the carrier306. A groove height326is the distance from the bottom side322to the exposed portion of the external interconnect314in the groove324. For illustrative purposes, the groove324is shown with vertical sides, although it is understood that the sides of the groove324can be in other configurations. For example, the groove324can be rounded or at an obtuse angle.

An embedded external interconnect height328is the distance between the second side318and the bottom side322. A cavity329can be formed by the second side318and an inner vertical side330of the embedded external interconnect320.

Referring now toFIG. 4, therein is shown a cross sectional view of an integrated circuit package-on-package system400with a first example application of the integrated circuit package system100ofFIG. 2in a third embodiment of the present invention. The cross-sectional view depicts a device432, such as an encapsulated integrated circuit, mounted over and connected to a mountable structure434, such as an interposer, printed circuit board, or a laminated substrate. The integrated circuit package system100mounts over the mountable structure434with the device432nested in the cavity226. A conductive structure436, such as a conductive structure, can connect the embedded external interconnect220and the mountable structure434.

It has been discovered that the present invention provides an integrated circuit package system having an embedded external interconnect improves reliability, stacking, and connectivity of integrated circuit package systems by providing structural support for the external interconnects. The embedded external interconnect provides rigid support when mounting the integrated circuit package over other mountable structures. The embedded external interconnects allows manufactures to decrease the pitch and increase the density of the external interconnects. The embedded external interconnects also provide planar rigidity preventing warpage of the integrated circuit package system. The cavity of the integrated circuit package system also reduces the height of the integrated circuit package-on-package system by providing space for nesting the device therein.

For illustrative purposes, the integrated circuit package-on-package system400is described with the mountable structure434and the device432thereover as discrete elements. Although it is understood that the integrated circuit package-on-package system400can include the mountable structure434and the device432can be included in another integrated circuit package system.

Referring now toFIG. 5, therein is shown a cross sectional view of an integrated circuit package-on-package system500with a second example application of the integrated circuit package system100ofFIG. 2in a fourth embodiment of the present invention. The cross-sectional view depicts a device532, such as an encapsulated integrated circuit, mounted over and connected to a mountable structure534, such as an interposer, printed circuit board or laminated substrate. The integrated circuit package system100mounts over the mountable structure534with the device532nested in the cavity226.

The embedded external interconnect height224can have a reduced dimension, although it is understood that the embedded external interconnect height224may not be altered. An intra-stack interconnect536, such as a solder ball, can connect the integrated circuit package system100and the mountable structure534. An electrical interconnect538, such as a solder ball, can be attached under and to the mountable structure534.

Referring now toFIG. 6, there in is shown a cross sectional view of an integrated circuit package-on-package system600with a first example application of the integrated circuit package system300ofFIG. 3in a fifth embodiment of the present invention. The cross-sectional view depicts a device632, such as an encapsulated integrated circuit, mounted over and connected to a mountable structure634, such as an interposer, printed circuit board or a laminated substrate. The integrated circuit package system100mounts over the mountable structure634with the device632nested in the cavity329. An intra-stack interconnect636, such as a solder ball, can connect the integrated circuit package system100and the mountable structure634within the groove324.

Referring now toFIG. 7, therein is shown a flow chart of an integrated circuit package system700for manufacture of the integrated circuit package system100in an embodiment of the present invention. The system700includes providing a carrier having a first side and a second side in a block702; mounting an integrated circuit over the carrier with the first side facing the integrated circuit in a block704; attaching an external interconnect to the second side in a block706; and forming an encapsulation over the integrated circuit and around the external interconnect with the external interconnect exposed from the encapsulation and with the encapsulation and the second side forming a cavity in a block708.

Yet other important aspects of the embodiments include that it valuably supports and services the historical trend of reducing costs, simplifying systems, and increasing performance.

These and other valuable aspects of the embodiments consequently further the state of the technology to at least the next level.

Thus, it has been discovered that the integrated circuit package system of the present invention furnishes important and heretofore unknown and unavailable solutions, capabilities, and functional aspects for improving reliability in systems. The resulting processes and configurations are straightforward, cost-effective, uncomplicated, highly versatile, and effective, can be implemented by adapting known technologies, and are thus readily suited for efficiently and economically manufacturing integrated circuit package devices.