Organic light-emitting diode display device

Disclosed an organic light-emitting diode display device in which the number of signal lines is minimized by sharing a predetermined signal line between adjacent pixels in a display panel having a plurality of signal lines formed therein, thereby improving an aperture ratio. The organic light-emitting diode display device includes a display panel defining pixels, a gate driver, a data driver, a multiplexer (MUX) electrically connecting an output terminal of the data driver and the pixels into a 1:1, 1:N (N is a natural number) or N:N structure, and a timing controller. Accordingly, the MUX is provided between the data driver and the pixels, and each pixel and signal lines are selectively connected through the MUX, so that it is possible to reduce the number of Integrated chips (ICs) provided by allowing a compensation circuit built in the data driver.

CROSS-REFERENCE TO RELATED APPLICATIONS

Pursuant to 35 U.S.C. §119(a), this application claims the benefit of earlier filing date and right of priority to Korean Application No. 10-2012-0109252, filed on Sep. 28, 2012, the contents of which is incorporated by reference herein in its entirety.

BACKGROUND

1. Field of the Disclosure

The present disclosure relates to an organic light-emitting diode display device, and particularly, to an organic light-emitting diode display device in which the number of signal lines is minimized by sharing a predetermined signal line between adjacent pixels in a display panel having a plurality of signal lines formed therein, thereby improving an aperture ratio.

2. Description of the Conventional Art

Flat panel displays as substitutes for existing cathode ray tubes are a liquid crystal display device, a field emission display device, a plasma display panel device, an organic light-emitting diode display device, etc.

Among these flat panel displays, the organic light-emitting diode display device has characteristics of high-luminance and low operating voltage. Since the organic light-emitting diode display device is a self-luminescent display device that emits light by itself, its contrast ratio is high, and the implementation of an ultra-thin display is possible. Since the organic light-emitting diode display device has a response time of about a few microseconds (μm), the implementation of moving images is easier than that in the liquid crystal display device. Further, the organic light-emitting diode display device has no limitation of viewing angle, and is stable even at a low temperature.

In a typical organic light-emitting diode display device, one pixel includes at least two switching and driving transistors, a capacitor and a light-emitting diode. The switching transistor applies a data voltage corresponding to the gray scale of an image to a gate of the driving transistor, and the driving transistor supplies current to the light-emitting diode according to the data voltage, thereby displaying the image. In this case, there may occur a difference in threshold voltage between the driving transistors of each pixel, which results in MURA of an image.

In order to solve such a problem, an internal compensation method and an external compensation method have been proposed. In the internal compensation method, a plurality of auxiliary transistors are further formed in each pixel so as to sample the threshold voltage of a driving transistor in the pixel and to compensate for the sampled threshold voltage. In the external compensation method, a second switching transistor applying a reference voltage is further provided, and a variation in the reference voltage applied by the second switching transistor is sensed, so as to compute a difference in threshold voltage between driving transistors through the sensed variation and to compensate for a data voltage.

In the internal compensation method, six thin film transistors including switching and driving transistors are provided in each pixel. Therefore, the configuration of a circuit is complicated, and an aperture ratio is decreased. On the other hand, in the external compensation method, each pixel can be implemented with no more than three thin film transistors, and it is possible to sense not only a difference in threshold voltage between driving transistors but also the amount of current flowing through the driving transistor. Thus, a variation in carrier mobility can also be computed, thereby maximizing compensation capability for a variation in element characteristic.

FIG. 1Ais an equivalent circuit diagram of one pixel in a conventional organic light-emitting diode display device using an external compensation method.FIG. 1Bis a waveform diagram illustrating waveforms of signals applied in driving of the pixel shown inFIG. 1A.FIG. 1Cis a schematic diagram of the organic light-emitting diode display device using the external compensation method.

ReferringFIG. 1A, the conventional organic light-emitting diode display device using the external compensation method includes an organic light-emitting diode D1, a driving transistor DR-T supplying current to the organic light-emitting diode D1, a first switching transistor SW-T1connected between a data line and the driving transistor DR-T so as to apply a data voltage to a gate of the driving transistor DR-T according to a first scan signal Vscan, a second switching transistor SW-T2connected between a reference voltage supply (not shown) and the driving transistor DR-T so as to apply a reference voltage to a source of the driving transistor DR-T according to a second scan signal Vscan2, and a capacitor C1connected between the gate and source of the driving transistor DR-T.

According to the structure described above, if high-level first and second scan signals Vscan1and Vscan2are applied to each pixel, current flows through the first and second switching transistors SW-T1and SW-T2so that a data voltage Vdata is applied to the gate of the driving transistor DR-T, and a reference voltage Vref is applied to the source of the driving transistor DR-T, and a voltage of“VDD-|Vth|” and “Vdata” to both ends of the capacitor C1. Subsequently, if the voltage level of the first scan signal Vscan1is changed into a low level and thus the first switching transistor SW-T1is turned off, a voltage of “VDD−|Vth|−Vdata+Vref” is applied to the gate of the driving transistor DR-T, and as a result, the Ids of the driving transistor DR-T becomes “k(Vdata-Vref)2.” That is, a threshold voltage component is removed in the current flowing through the driving transistor DR-T, so that the current flowing through the driving transistor DR-T is controlled by the reference voltage Vref. Thus, a variation in element characteristic between pixels can be compensated by sensing current flowing through the driving transistor DR-T according to the variation (V0-V1) of the reference voltage Vref for a predetermined time t, computing a compensation value through the sensed current and reflecting the computed compensation value to the data voltage.

However, in the organic light-emitting diode display device using the external compensation method described above, as shown inFIG. 1C, a compensation circuit40for supplying and sensing the reference voltage Vref is further required in addition to a data driver30supplying the data voltage Vdata. Therefore, separate Integrated chips (ICs) are respectively provided to upper and lower portions of a display panel10, which results in an increase in cost.

Although the external compensation method is applied to the organic light-emitting diode display device, the organic light-emitting diode display device is identical to that using the internal compensation method in that a plurality of signal lines such as a line for supplying the reference voltage Vref and a line for supplying power and ground voltages VDD and VSS are formed in the display panel10. Accordingly, there is a limitation in improving an aperture ratio.

SUMMARY

An organic light-emitting diode display device includes a display panel having a plurality of signal lines formed thereon, and including a plurality of pixels each having first and second switching transistors, a driving transistor and a light-emitting diode; a gate driver allowing current to flow through the first and second switching transistors through a gate line; a data driver computing a variation in threshold voltage of the driving transistor by sensing a change in reference voltage applied through the signal lines, and compensating for a data voltage applied to the driving transistor and supplying the compensated data voltage to the pixel; a multiplexer (MUX) electrically connecting output terminals of the data driver and the pixels into a 1:1, 1:N (N is a natural number) or N:N structure; and a timing controller controlling the gate driver, the data driver and the MUX.

DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS

FIG. 2is a block diagram illustrating the entire structure of an organic light-emitting diode display device according to an exemplary embodiment.

As shown in this figure, the organic light-emitting diode display device according to the exemplary embodiment includes a display panel100implementing an image divided into a display area in which the image is displayed and a non-display area positioned at the outside of the display area, a timing controller110generating a control signal by receiving a timing signal from an external system, and aligning and changing image signals, a gate driver120connected to one side of the display panel100so as to apply a scan signal to gate lines GL, a data driver130applying a data voltage to each pixel, and a multiplexer (MUX)140connected to the one side of the display panel100so as to select reference supply and sensing lines RL and SL for supplying and sensing a reference voltage Vref and signal lines DL through which the data voltage is output.

In the display panel100, a plurality of gate lines GL and a plurality of data lines DL are formed to intersect each other in a matrix on a transparent substrate. The gate lines GL are connected to output terminals of the gate driver120, and the reference voltage supply and sensing lines RL and SL and the data lines DL are connected to output terminals of the data driver130through the MUX140. Pixels PX are defined at intersection portions of the gate and data lines GL and DL. Although not shown in this figure, each pixel PX is connected to a power voltage (VDD) line and a ground voltage (VSS) line.

The pixel PX may include at least two switching and driving transistors SW-T1, SW-T2and DR-T, an organic light-emitting diode D1and a capacitor C1.

The pixel PX of the organic light-emitting diode display device according to the exemplary embodiment will be described with reference toFIG. 1A. Current flows through the first switching transistor SW-T1according to a first scan signal Vscan1input to a gate line GL, a data voltage VDATA according to a gray scale is applied to a gate of the driving transistor DR-T for each pixel so that current corresponding to the data voltage Vdata flows through the organic light-emitting diode D1, thereby displaying an image. In this case, current flows through the second switching transistor SW-T2according to a second scan signal Vscan2so that a reference voltage Vref is applied to the driving transistor DR-T and the capacitor C1, and a change in the reference voltage Vref is sensed through a sensing line SL for a predetermined time. The sensed result is reflected to the data voltage Vdata.

The timing controller110receives a digital image signal (RGB) transmitted from the external system and timing signals such as a horizontal synchronization signal (Hsync), a vertical synchronization signal (Vsync) and a data enable signal (DE), so as to generate control signals of the gate and data drivers120and130and a control signal of the MUX140.

The gate control signal GCS with which the timing controller110provides the gate driver120includes a gate start pulse (GSP), a gate shift clock (GSC), a gate output enable (GOE), etc.

The data control signal DCS with which the timing controller provides the data driver130includes a source start pulse (SSP), a source shift clock (SSC), a source output enable (SOE), etc.

The timing controller110generates a MUX control signal (MCS) for controlling a selection of the MUX140through a MUX control circuit114built therein. The MUX control circuit114is not built in the timing controller110but may be implemented as a separate Integrated chip (IC). The MUX140is configured with a plurality of transistors, and functions to electrically connect the output terminals of the data driver130and the pixels PX into a 1:1, 1:N (N is a natural number) or N:N structure. That is, the MUX140electrically connects the data driver130and the pixels PX at a corresponding timing by allowing current to selectively flow in any one of the reference voltage supply and sensing lines RL and SL and the data line DL.

The timing controller110receives image signals (RGB) input from the external system through an ordinary interface, and the input image signal (RGB) is aligned in the form capable of being processed by the data driver130and then supplied to the data driver130.

The gate driver120is a shift register configured with a plurality of transistors at one side of the display panel100, and a gate-in-panel structure in which the gate driver120is configured with the plurality of transistors on the display panel100may be applied to the organic light-emitting diode display device. The gate driver120outputs the first and second scan signals Vscan1and Vscan2through the gate lines GL formed on the display panel100in response to the gate control signal GCS input from the timing controller110, and turns on the switching transistors SW-T1and SW-T2provided in each pixel PX. Thus, the data voltage Vdata output from the data driver130is applied to the driving transistor DR-T of each pixel PX, and the reference voltage Vref is sensed in a predetermined time after the reference voltage Vref is applied to the pixel PX from the reference voltage supply and sensing lines RL and SL.

The data driver130applies the data voltage of an analog waveform to the pixels PX through the data lines DL, in synchronization with the output first scan signal Vscan1.

The data driver130converts the aligned digital image signals (RGB) input corresponding to the data control signal DCS input from the timing controller110into the analog data voltage Vdata according to the reference voltage Vref. In this case, the data driver130receives a data compensation value according to the sensed result of the reference voltage from a sensing circuit135built therein, and reflects the received data compensation value to the data voltage Vdata. The data driver130is configured with a separate Integrated chip (IC) to be attached on one non-display region of the display panel100using a TAB or OOG method. The data driver130is electrically connected to the data lines DL through the MUX140described later. The output terminals may be further connected to a plurality of signal lines, as well as the data lines DL.

The MUX140is configured with a plurality of thin film transistors formed between a pixel region of the display panel100and the data driver130. The MUX140functions to connect one output terminal of the data driver130and a plurality of signal lines to the pixels PX into a 1:1, 1:N (N is a natural number) or N:N structure according to the MUX control signal MCS.

Thus, the MUX140enables the data driver130to supply the reference voltage to the pixel PX, to sense the reference voltage and to supply the data voltage, through the one output terminal of the data driver130.

Hereinafter, an example in which the pixels and the output terminals of the data driver are connected into a 1:1, 1:N (N is a natural number) or N:N structure in the organic light-emitting diode display device according to the exemplary embodiment will be described with reference to the accompanying drawings.

FIGS. 3A to 3Care equivalent circuit diagrams illustrating structures of MUXs in the organic light-emitting diode display device according to the exemplary embodiment.

FIG. 3Ashows an example in which the pixels and the output terminals of the data driver are connected into a 1:1 structure. In the figure, six pixels PX1to PX6and six output terminals CH1to CH6are connected to each other.

The structure in which one pixel PX1and one output terminal CH1are connected to each other will be described with reference to this figure. The one pixel PX1is connected to one reference voltage supply line RL, one reference voltage sensing line SL and one data line DL, and the lines are connected to the one output terminal CH1.

The MUX140includes an RT transistor RT connected between the reference voltage supply line RL and the reference voltage supply (not shown), and supplying a reference voltage Vref to the pixel PX1, corresponding to a reference control signal Vsw; an SST transistor SST connected between the output terminal CH1and the reference voltage sensing line SL, and supplying the reference voltage Vref applied to the pixel PX1to the output terminal CH1of the data driver according to a sensing control signal Vsen; and an SDT transistor SDT connected between the output terminal CH1and the data line DL, and supplying a data voltage Vdata to the pixel PX1according to a driving control signal Vdr.

According to the structure described above, the reference voltage Vref is applied to the pixel PX1when the reference control signal Vsw is applied to the MUX140, and the sensing control signal Vsen is applied to the MUX140when the application of the reference voltage Vref is finished, so that the reference voltage Vref applied to the pixel PX1is sensed through the output terminal CH1. Subsequently, when the application of the sensing control signal Vsen is finished, the driving control signal Vdr is applied to the MUX140so that the data voltage Vdata is applied to the pixel PX1.

The other pixels PX2to PX6and output terminals CH2to CH6are connected into the same structure.

FIG. 3Bshows an example in which the pixels and the output terminals of the data driver are connected into a 1:2 structure. In this figure, six pixels PX1to PX6and three output terminals CH1to CH3are connected to each other.

The 1:2 structure is a structure in which adjacent first and second pixels and SST and SDT transistors SST and SDT respectively corresponding to the first and second pixels in a MUX240are connected to one output terminal.

The structure in which first and second pixels PX1and PX2are connected to one output terminal CH1will be described with reference to this figure. The first pixel PX1is connected to a first reference voltage supply line RL1, a first reference voltage sensing line SL1and a first data line DL1, and the lines are connected to the one output terminal CH1. The second pixel PX2is connected to a second reference voltage supply line RL2, a second reference voltage sensing line SL2and a second data line DL2, and the lines are connected to the one output terminal CH1.

The MUX240includes first and second RT transistors RT1and RT2connected between the reference voltage supply (not shown) and the first and second reference voltage supply lines RL1and RL2, and supplying a reference voltage Vref to the first and second pixels PX1and PX2, corresponding to a reference control signal Vsw; first and second SST transistors SST1and SST2connected between the output terminal CH1and the first and second reference voltage sensing lines SL1and SL2, and supplying the reference voltage Vref applied to the first and second pixels PX1and PX2to the output terminal CH1of the data driver according to a sensing control signal Vsen; and first and second SDT transistors SDT1and SDT2connected between the output terminal CH1and the first and second data lines DL1and DL2, and respectively supplying different data voltages Vdata to the first and second pixels PX1and PX2according to first and second driving control signals Vdr1and Vdr2.

According to the structure described above, the reference voltage Vref is applied to the first and second pixels PX1and PX2when the reference control signal Vsw is applied to the MUX240, and the sensing control signal Vsen is applied to the MUX240when the application of the reference voltage Vref is finished, so that the reference voltage Vref applied to the first and second pixels PX1and PX2is sensed through the output terminal C1.

Subsequently, when the application of the sensing control signal Vsen is finished, the first and second driving control signals Vdr1and Vdr2are applied to the MUX240so that the different data voltages are applied to the respective first and second pixel PX1and PX2.

The other pixels PX2to PX6and output terminals CH2and CH3are connected into the same structure.

FIG. 3Cshows an example in which the pixels and the output terminals of the data driver are connected into a 1:3 structure. In this figure, six pixels PX1to PX6and two output terminals CH1and CH2are connected to each other.

The 1:3 structure is a structure in which adjacent first to third pixels and SST and SDT transistors SST and SDT respectively corresponding to the first to third pixels in a MUX340are connected to one output terminal.

The structure in which first and third pixels PX1to PX3are connected to one output terminal CH1will be described with reference to this figure. The first pixel PX1is connected to a first reference voltage supply line RL1, a first reference voltage sensing line SL1and a first data line DL1, and the lines are connected to the one output terminal CH1. The second pixel PX2is connected to a second reference voltage supply line RL2, a second reference voltage sensing line SL2and a second data line DL2. The third pixel PX3is connected to a third reference voltage supply line RL3, a third reference voltage sensing line SL3and a third data line DL3. The pixels PX1to PX3are connected to the one output terminal CH1.

The MUX340includes first to third RT transistors RT1to RT3connected between the reference voltage supply (not shown) and the first to third reference voltage supply lines RL1to RL3, and supplying a reference voltage to the first to third pixels PX1to PX3, corresponding to a reference control signal Vsw; first to third SST transistors SST1to SST3connected between the output terminal CH1and the first to third reference voltage sensing lines SL1to SL3, and supplying the reference voltage Vref applied to the first to third pixels PX1to PX3to the output terminal CH1of the data driver according to a sensing control signal Vsen; and first to third SDT transistors SDT1to SDT3connected between the output terminal CH1and the first to third data lines DL1to DL3, and respectively supplying different data voltages to the first to third pixels PX1to PX3according to first to third driving control signals Vdr1to Vdr3.

According to the structure described above, the reference voltage Vref is applied to the first to third pixels PX1to PX3when the reference control signal Vsw is applied to the MUX340, and the sensing control signal Vsen is applied to the MUX340when the application of the reference voltage Vref is finished, so that the reference voltage Vref applied to the first to third pixels PX1to PX3is sensed through the output terminal CH1. Here, the sensing control signal Vsen is simultaneously applied to the first to third SST transistors SST1to SST3, and thus the reference voltage Vref applied to the first to third pixels PX1to PX3is simultaneously applied to the output terminal CH1.

Subsequently, when the application of the sensing control signal Vsen is finished, the first to third driving control signals Vdr1to Vdr3are applied to the MUX340so that the different data voltages Vdata are applied to the respective first to third pixels PX1to PX3.

The other pixels PX4to PX6and output terminal CH2are connected into the same structure.

Meanwhile, in the exemplary embodiment described above, at least one reference voltage supply line, at least one reference voltage sensing line and at least one data line are formed in one pixel. That is, a plurality of signal lines are arranged in the one pixel. Hereinafter, another exemplary embodiment in which two pixels share any one of a plurality of signal lines with each other, thereby improving an aperture ratio will be described with reference to the accompanying drawings.

FIG. 4is an equivalent circuit diagram illustrating the structure of a MUX in an organic light-emitting diode display device according to another exemplary embodiment.FIGS. 5A and 5Bare circuit diagrams illustrating electrical connections of the MUX shown inFIG. 4.

FIG. 4shows an example in which the pixels and the output terminals of the data driver are connected into the 1:2 structure. In this figure, six pixels PX1to PX6and three output terminals CH1to CH3are connected to each other. Here, each of the pixels PX1to PX6shares reference voltage supply and sensing lines between adjacent two pixels {(PX1and PX2), (PX3and PX4), (PX5and PX6)}.

The structure in which first and second pixels PX1and PX2are connected to one output terminal CH1will be described with reference to this figure. The first and second pixels PX1and PX2are connected to one reference voltage supply line RL and one reference voltage sensing line SL and first and second data lines DL1and DL2, and the lines are connected to the one output terminal CH1.

A MUX440includes an RT transistor RT connected between the reference voltage supply line RL and the reference voltage supply (not shown), and supplying a reference voltage Vref to the first and second pixels PX1and PX2, corresponding to a reference control signal Vsw; and an SST transistor SST connected between the output terminal CH1and the reference voltage sensing line SL, and supplying the reference voltage Vref applied to the first and second pixels PX1and PX2to the output terminal CH1of the data driver according to a sensing control signal Vsen.

The MUX440includes a first SDT transistor SDT1connected between the output terminal CH1and the first data line DL1, and supplying a data voltage Vdata to the first pixel PX1according to a first driving control signal Vdr1; and a second SDT transistor SDT2connected between the output terminal CH1and the second data line DL2, and supplying a data voltage to the second pixel PX2according to a second driving control signal Vdr2.

According to the structure described above, the reference voltage Vref is applied to the first and second pixels PX1and PX2when the reference control signal Vsw is applied to the MUX440, and the sensing control signal Vsen is applied to the MUX440when the application of the reference voltage Vref is finished, so that the reference voltage Vref applied to the first and second pixels PX1and PX2is sensed through the output terminal CH1. Subsequently, when the application of the sensing control signal Vsen is finished, the first and second driving control signals Vdr1and Vdr2are applied to the MUX440at different times, so that the different data voltage Vdata are applied to the respective first and second pixels PX1and PX2.

The other pixels PX3to PX6and output terminals CH2and CH3are connected into the same structure.

FIG. 5Ais a circuit diagram illustrating a connection form of signal lines at the time when the reference voltage is supplied to the pixels. In this figure, if high-level first and second scan signals Vscan1and Vscan2are applied, current flows through the first and second switching transistors SW-T1and SW-T2, and the reference voltage control signal Vsw is applied to the MUX440, so that the reference voltage Vref is applied to one electrode of the capacitor C1in each of the first and second pixels PX1and PX2.

Simultaneously, the data voltage Vdata of an analog waveform is applied to the data line from the output terminal CH through a DAC (D/A). Here, a predetermined data voltage Vdata for sensing the reference voltage is applied to the other electrode of the capacitor C1in each of the first and second pixels PX1and PX2through the first and second data lines DL1and DL2. In this case, high-level first and second driving signals Vdr1and Vdr2are simultaneously applied to the respective first and second SDT transistors SDT1and SDT2so as to electrically connect the output terminal CH to the first and second data lines DL1and DL2. Subsequently, although not shown in this figure, if the compensation of the data voltage is completed, the voltage levels of the first and second driving control signals Vdr1and Vdr2are changed into a high level at different times, so that data voltages Vdata according to gray scales are applied to the first and second pixels PX1and PX2, respectively.

The sensing control signal Vsen has a low level, and the SST transistor SST maintains a turn-off state.

FIG. 5Bis a circuit diagram illustrating a connection form of signal lines at the time when the reference voltage applied to the pixels is sensed. In this figure, the voltage level of the first scan signal Vscan1is changed into a low level, and the second scan signal Vscan2maintains the high level. Therefore, the first switching transistor SW-T1is turned off, and the second switching transistor SW-T2maintains a turn-on state. The voltage level of the reference voltage control signal Vsw is changed into the low level so that the reference voltage supply line RL is not connected to the first and second pixels PX1and PX2.

Simultaneously, the voltage level of the sensing control signal Vsen is changed into the high level so that the reference voltage Vref of the analog waveform from the first and second pixels PX1and PX2is applied to the reference voltage sensing line SL from the output terminal CH through an ADC (A/D). Here, the reference voltage Vref becomes a reference voltage Vref changed by a difference in voltage between the driving transistors DR-T.

The voltage levels of the reference voltage control signal Vsw and the first and second driving control signals Vdr1and Vdr2are all changed into the low level, so that the reference voltage supply line RL and the first and second data lines DL1and DL2are disconnected from the output terminal CH. Thus, the data driver stably senses the reference voltage Vref.

Hereinafter, another exemplary embodiment in which two pixels share any one of a plurality of signal lines with each other, thereby improving an aperture ratio will be described with reference to the accompanying drawing.

FIG. 6is an equivalent circuit diagram illustrating the structure of a MUX in an organic light-emitting diode display device according to still another exemplary embodiment.

FIG. 6shows an example in which the pixels and the output terminals of the data driver are connected into a 6:2 structure. In this figure, six pixels PX1to PX6and two output terminals CH1and CH2are connected to each other. Here, each of the pixels PX1to PX6shares reference voltage supply lines RL1to RL3and reference voltage sensing lines SL1to SL3between adjacent two pixels {(PX1and PX2), (PX3and PX4), (PX5and PX6)}. Each of the reference voltage sensing lines SL1to SL3is divided into two lines, and the divided lines are connected to first to six SST transistors SST1to SST6, respectively

Referring to this figure, the first and second pixels PX1and PX2are connected to a first reference voltage supply line RL1, first and second reference voltage sensing lines SL1and SL2, and first and second data lines DL1and DL2, and the lines are connected to the first output terminal CH1.

The third and fourth pixels PX3and PX4are connected to a second reference voltage supply line RL2, third and fourth reference voltage sensing lines SL3and SL4, and third and fourth data lines DL3and DL4, and the lines are connected to the first and second output terminals CH1and CH2.

The fifth and sixth pixels PX5and PX6are connected to a third reference voltage supply line RL3, fifth and sixth reference voltage sensing lines SL5and SL5, and fifth and sixth data lines DL5and DL5, and the lines are connected to the second output terminal CH2.

A MUX540includes a first RT transistor RT1connected between the first reference voltage supply line RL1and the reference voltage supply (not shown), and supplying a reference voltage Vref to the first and second pixels PX1and PX2, corresponding to a reference control signal Vsw; a second RT transistor RT2connected between the second reference voltage supply line SL2and the reference voltage supply (not shown), and supplying a reference voltage signal Vref to the third and fourth pixels PX3and PX4, corresponding to the reference control signal Vsw; and a third RT transistor RT3connected between the third reference voltage supply line RL3and the reference voltage supply (not shown), and supplying a reference voltage Vref to the fifth and sixth pixels PX5and PX6, corresponding to the reference control signal Vsw.

The MUX540includes a first SST transistor SST1connected between the first output terminal CH1of the data driver and the first reference voltage sensing line SL1, and supplying the reference voltage Vref applied to the first pixel PX1to the first output terminal CH1according to a first sensing control signal Vsen1; a second SST transistor SST2connected between the first output terminal CH1and the second reference voltage sensing line SL2, and supplying the reference voltage Vref applied to the second pixel PX2to the first output terminal CH1according to a second sensing control signal Vsen2; a third SST transistor SST3connected between the first output terminal CH1and the second reference voltage sensing line SL2, and supplying the reference voltage Vref applied to the third pixel PX3to the first output terminal CH1according to a third sensing control signal Vsen3; a fourth SST transistor SST4connected between the second output terminal CH2of the data driver and the second reference voltage sensing line SL2, and supplying the reference voltage applied to the fourth pixel PX4to the second output terminal CH2according to the second sensing control signal Vsen2; a fifth SST transistor SST5connected between the second output terminal CH2and the third reference voltage sensing line SL3, and supplying the reference voltage applied to the fifth pixel PX5to the second output terminal CH2according to the third sensing control signal Vsen3; and a sixth SST transistor SST6connected between the second output terminal CH2and the third reference voltage sensing line SL3, and supplying the reference voltage applied to the fifth pixel PX5to the second output terminal CH2according to the first sensing control signal Vsen1.

The MUX540includes a first SDT transistor SDT1connected between the first output terminal CH1and the first data line DL1, and supplying a data voltage Vdata to the first pixel PX1according to a first driving control signal Vdr1; a second SDT transistor SDT2connected between the first output terminal CH1and the second data line DL2, and supplying a data voltage Vdata to the second pixel PX2according to a second driving control signal Vdr2; a third SDT transistor SDT3connected between the first output terminal CH1and the third data line DL3, and supplying a data voltage Vdata to the third pixel PX3according to a third driving control signal Vdr3; a fourth SDT transistor SDT4connected between the second output terminal CH2and the fourth data line DL4, and supplying a data voltage Vdata to the fourth pixel PX4according to a fourth driving control signal Vdr4; a fifth SDT transistor SDT5connected between the second output terminal CH2and the fifth data line DL5, and supplying a data voltage Vdata to the fifth pixel PX5according to a fifth driving control signal Vdr5; and a sixth SDT transistor SDT6connected between the second output terminal CH2and the sixth data line DL6, and supplying a data voltage Vdata to the sixth pixel PX6according to a sixth driving control signal Vdr6.

According to the structure described above, the reference voltage Vref is applied to all the pixels PX1to PX6when the reference control signal Vsw is applied to the MUX540, and the sensing control signals Vsen1to Vsen3are sequentially applied to the MUX540when the application of the reference voltage Vref is finished. Therefore, the reference voltages Vref applied to the first and second pixels PX1and PX2and the fifth and sixth pixels PX5and PX6are first sensed through the first and second output terminals CH1and CH2, respectively, and the reference voltages Vref applied to the first and second pixels PX1and PX2and the third and fourth pixels PX3and PX4are then sensed through the first and second output terminals CH1and CH2, respectively. Subsequently, the reference voltages applied to the third and fourth pixels PX3and PX4and the fifth and sixth pixels PX5and PX6are sensed through the first and second output terminals CH1and CH2, respectively.

Subsequently, when the application of the first to third sensing control signals Vsen1to Vsen3is finished, the first to third driving control signals Vdr1to Vdr3are sequentially applied to the MUX540at different times, so that different data voltages Vdata are sequentially applied to the first and fourth pixels PX1and PX4, the second and fifth pixels PX2and PX5and the third and sixth pixels PX3and PX6, respectively.

In the organic light-emitting diode display device according to exemplary embodiments, the MUX is provided between the data driver and the pixels, and each pixel and signal lines are selectively connected through the MUX, so that it is possible to reduce the number of Integrated chips (ICs) provided by allowing a compensation circuit built in the data driver.

Further, a signal line is formed between adjacent pixels, and the two pixels share the signal line with each other, thereby improving an aperture ratio.