Method and apparatus for providing a sidetone in a wireless communication device

A wireless communication device is disclosed that provides a sidetone to the device user. The device converts an outbound analog audio signal to an outbound audio bitstream from which a sidetone bitstream is extracted. The device also converts an inbound digital audio signal to an inbound audio bitstream. A filter in the device both adds the sidetone bitstream to the inbound audio bitstream and filters the resultant added bitstreams to provide an analog audio signal with sidetone.

CROSS REFERENCE TO RELATED PATENT APPLICATIONS

This patent application is related to the U.S. patent application entitled “Highly Integrated Radio-Frequency Apparatus and Associated Methods”, inventors Navdeep S. Sooch and G. Tyson Tuttle, Ser. No. 10/426,042 filed Apr. 29, 2003, the disclosure of which is incorporated herein by reference in its entirety.

This patent application is also related to the U.S. patent application entitled “Wireless Communication System and Method With Hardware-Based Frequency Burst Detection”, inventors Gong et al., (Ser. No. 10/955,569, filed Sep. 30, 2004) the disclosure of which is incorporated herein by reference in its entirety.

TECHNICAL FIELD OF THE INVENTION

The disclosures herein relate generally to wireless communication systems, and more particularly, to wireless communication systems that employ sidetones.

BACKGROUND

Conventional wired or wireless telephones typically employ a sidetone feedback mechanism between the microphone and the headphone/speaker of a user's telephone. This sidetone feedback mechanism allows the user to hear his or her own voice at an attenuated level while speaking into the phone. This gives the user comfort and assurance that the user's speech is being transmitted through a connection to another phone. Simply speaking, the “sidetone” refers to the sound of the user's own voice as heard in the user's telephone receiver at an attenuated level.

Sidetones may be employed in modern digital wireless telephones such as those employing the GSM standard. Digital wireless telephones include a transmit or outbound path having a microphone, microphone preamplifier, gain stage and an analog to digital converter (ADC). The output signal of the ADC is filtered and decimated to produce a pulse code modulated (PCM) signal that is transmitted to another phone. PCM is a commonly used digital representation of an analog signal. Digital wireless telephones also include a receive or inbound path that drives the headphone/speaker of the telephone with audio received from another telephone. The receive path includes a receiver that provides received PCM data to a digital to analog converter (DAC) that converts the received digital audio signal to analog. The output of the DAC is filtered and amplified to provide a received analog audio signal that drives the headphone/speaker. To provide the desired sidetone, an attenuated version of the PCM signal from the transmit path is simply digitally added to the PCM signal in the receive path. In this digital sidetone approach, the audio signal that the user hears in the headphone/speaker includes both the received audio signal and a sidetone of smaller amplitude. This digital sidetone approach employing digital addition works well in many applications. However, latency problems may occur when the digital sidetone signal is delayed in the wireless telephone before being supplied to the earphone. In this case the local sidetone heard by the user may appear to be out of sync, or delayed in time, with respect to the user's speech. This can be very annoying to the wireless telephone user.

What is needed is a wireless communication apparatus and method that provides a sidetone to the user without the problems described above.

SUMMARY

Accordingly, in one embodiment, a method is disclosed for operating a wireless communication device including a transmitter and a receiver. The method includes converting an outbound analog audio signal to an outbound audio bitstream in a first path. The first path includes a transmitter that transmits the outbound audio bitstream. The method also includes converting an inbound digital audio signal to an inbound audio bitstream in a second path. The second path includes a receiver that receives the inbound digital audio signal. The method also includes extracting a sidetone bitstream from the outbound audio bitstream. The method further includes supplying the inbound audio bitstream and the sidetone bitstream to a filter in the second path. The filter adds the sidetone bitstream to the inbound audio bitstream to produce a resultant signal. The filter also filters the resultant signal to provide an analog audio signal with sidetone.

In another embodiment, a wireless communication device is disclosed that includes a transmitter and a receiver. The transmitter is situated in an outbound path and the receiver is situated in an inbound path. The device includes an analog to digital converter (ADC) that is situated in the outbound path. The ADC converts an outbound analog audio signal to an outbound audio bitstream that is supplied to the transmitter. The device also includes a digital to analog converter (DAC) that is situated in the inbound path. The DAC converts an inbound digital audio signal, supplied by the receiver, to an inbound audio bitstream. The device further includes a filter that is situated in the inbound path. The filter is coupled to the DAC to receive the inbound audio bitstream. The filter is also coupled to the outbound path to receive the outbound audio bitstream. The filter adds the outbound bitstream as a sidetone to the inbound audio bitstream to produce a resultant signal. The filter filters the resultant signal to provide an analog audio signal with sidetone.

In yet another embodiment, an integrated circuit (IC) device is disclosed that includes a transmitter and a receiver. The transmitter is situated in an outbound path and the receiver is situated in an inbound path. The device includes an analog to digital converter (ADC) that is situated in the outbound path. The ADC converts an outbound analog audio signal to an outbound audio bitstream that is supplied to the transmitter. The device also includes a digital to analog converter (DAC) that is situated in the inbound path. The DAC converts an inbound digital audio signal, supplied by the receiver, to an inbound audio bitstream. The device further includes a filter that is situated in the inbound path. The filter is coupled to the DAC to receive the inbound audio bitstream. The filter is also coupled to the outbound path to receive the outbound audio bitstream. The filter adds the outbound bitstream as a sidetone to the inbound audio bitstream to produce a resultant signal. The filter filters the resultant signal to provide an analog audio signal with sidetone.

DETAILED DESCRIPTION

FIG. 1shows a wireless communication device100employing conventional sidetone technology wherein a digital sidetone is added to a received digital audio signal before the received digital audio signal is supplied to an earphone or loudspeaker102. More particularly, wireless communication device100includes a microphone105coupled by a preamp110and a subsequent gain stage115to the input of an analog to digital converter (ADC)120. ADC120digitizes the user's speech and PCM stage125converts the resultant digitized audio signal to a 16-bit (16B) PCM digital audio signal. This PCM digital audio signal is supplied to transmitter130for transmission to other wireless communication devices. Receiver135receives transmissions from other wireless communication devices and processes incoming radio frequency signals down to baseband. Receiver135provides the received digital audio signals to adder140. A variable attenuator142couples PCM stage125to adder140thus providing an attenuated version of the outgoing digital audio signal to adder140as a digital sidetone signal. Adder140sums this digital sidetone signal with the received incoming digital audio signal. The resultant summed signal is provided by a PCM stage145to digital to analog converter (DAC)150. PCM is a commonly used digital representation of an analog signal. PCM stage145performs backend processing such as gain control, noise suppression and filtering in a conventional manner. DAC150converts the digital signal it receives to a corresponding analog signal that is filtered by a filter155coupled to the output of DAC150. The resultant audio signal thus appearing at the output of filter155includes both an analog version of the received audio signal and an analog version of the sidetone signal. Driver160amplifies the received audio signal and sidetone and then supplies these analog signals to an earphone or loudspeaker102.

While the all-digital sidetone approach ofFIG. 1performs well in some applications, problems can result in other applications such as described below. For example, latency of the sidetone signal with respect to the received audio signal may be observed in wireless communication systems employing time domain isolation (TDI) technology. More information with respect to TDI technology is provided in the U.S. patent application entitled “Highly Integrated Radio-Frequency Apparatus and Associated Methods”, inventors Navdeep S. Sooch and G. Tyson Tuttle, Ser. No. 10/426,042 filed Apr. 29, 2003, the disclosure of which is incorporated herein by reference in its entirety, and also in U.S. patent application entitled “Wireless Communication System and Method With Hardware-Based Frequency Burst Detection”, inventors Gong et al., (Ser. No. 10/955,569, filed Sep. 30, 2004) the disclosure of which is incorporated herein by reference in its entirety.

FIG. 2illustrates a portion of a wireless communication device200that exhibits the above referenced latency problem. Wireless communication device200ofFIG. 2includes several elements in common with wireless communication device100ofFIG. 1. Like numbers indicate like elements when comparingFIG. 2withFIG. 1. ADC120converts the analog speech signal into a one bit digitized audio signal that is supplied to a first-in first-out (FIFO1) circuit205. Thus, the one bit digitized speech signal is initially stored by FIFO1circuit205. A communication device that employs TDI such as device200includes both digital processing circuits and radio-frequency circuits. To reduce digitally generated noise, when the radio frequency circuits are activated, the digital processing circuits are inactivated. Conversely, when the digital processing circuits are activated, the radio frequency circuits are inactivated. In device200, when the digital processing circuits are activated, FIFO1(205) is cleared to FIFO2(210) and the one bit data supplied thereto by ADC120is decimated/filtered and converted to a 16 bit PCM audio signal by PCM stage125. The 16 bit PCM digital audio signal at PCM stage125can then be added as a sidetone to the incoming digital data from receiver135as shown in wireless communication device100ofFIG. 1.

In this TDI implementation, when the digital circuits are inactivated and the RF circuits are activated, the FIFOs hold the digitized speech signal of the user speaking into microphone105. However, the delay that occurs while the digitized speech is stored in the FIFOs when the digital circuitry is inactivated and the RF circuitry is activated, causes the digital sidetone signal to be delayed with respect to the user's actual voice and the incoming received digital audio signal. This delay can be 5 ms or more and can be annoying to the user of device200. Thus, a wireless communication system employing a totally digital sidetone approach may exhibit delay problems in a time domain isolation (TDI) implementation such as that discussed above.

An alternative to the two digitally generated sidetone approaches discussed above is illustrated in the block diagram ofFIG. 3which shows a wireless communication device300employing an analog generated sidetone. Wireless communication device300includes elements in common with wireless communication device100ofFIG. 1. Like numbers are used to indicate like elements when comparing the wireless devices ofFIG. 3andFIG. 1. Wireless communication device300is considered to be a near-end device in that it communicates with another device referred to as the far-end device. The user of near-end device300speaks into microphone105. Preamplifier110and gain stage115amplify the audio signal from microphone105. Gain stage115is coupled to ADC305which converts the analog audio signal at its input to a digital audio signal at its output. The output of ADC305is coupled to transmitter310which transmits the digital audio signal to another wireless communication device, namely the far-end communication device. Receiver315receives radio frequency signals that carry a digital audio signal from the far-end communication device. The output of receiver315is coupled to DAC/filter320that converts the digital audio signal provided by receiver315to an analog audio signal that is supplied to one input of a two input adder or summer325. The remaining input of adder325is coupled to the output of gain stage115. Adder325adds the analog audio signal from gain stage315as a sidetone to the far end analog audio signal. Adder325provides the resultant analog audio signal with sidetone to driver amplifier160which drives speaker102.

While this wireless communication device300which employs analog sidetone does not suffer from the latency problems experienced by device200, device300experiences a problem wherein the sidetone audio sounds richer than the audio received from the far-end. This occurs because the far-end audio signal is bandwidth limited, typically to 4 KHz, whereas the sidetone is essentially bandwidth unlimited. Thus, the sidetone generated locally at the near-end device300sounds richer than the audio received from the far end. Since speaker102typically exhibits peaking at higher frequencies, the local sidetone can sound annoyingly louder than the received far-end audio signal.

FIG. 4is a schematic diagram of one embodiment of the disclosed wireless communication device400. Communication device400includes a microphone405into which the user of device400speaks. In this example, communication device400is referred to as the near-end device. The user of communication device400desires to communicate with the user of another communication device (not shown) referred to as the far-end device. The audio signal produced by microphone405is referred to as the outbound audio signal. The signal that communication device400receives from the far-end communication device (not shown) is referred to as the inbound audio signal.

Microphone405is coupled to a preamplifier410that amplifies the outbound audio signal. Preamplifier410is coupled to a variable gain stage415that provides additional gain to the outbound audio signal. It is noted that, up until this point, the outbound audio signal is an analog outbound audio signal. Gain stage415is coupled by adder420and analog to digital converter (ADC)425. The function of adder420will be discussed in more detail below. The analog outbound audio signal is thus provided to ADC425. In this particular embodiment, a delta sigma modulator is employed as ADC425. ADC425converts the analog outbound audio signal to an outbound audio bitstream. ADC425includes a one bit output that is coupled via FIFO circuit430to a decimator435. The function of a FIFO430as it relates to TDI will be discussed in more detail below. Decimator435and high pass filter440respectively decimate and filter the one bit audio bitstream to provide a 13 bit PCM digital outbound audio signal at the output of filter440. The input of transmitter445is coupled to the output of filter440so that transmitter445transmits the PCM digital outbound audio signal to a far-end communication device (not shown). The communication path formed above from microphone405to transmitter445may be referred to as the outbound path or ADC path401. The communication path discussed below from receiver450to earphone/loudspeaker455may be referred to as the inbound path or the DAC path402.

As discussed above, receiver450of near-and communication device400receives far-end radio frequency signals from another communication device (not shown). The received radio frequency signals include inbound audio signals. Receiver450receives these radio frequency signals and generates inbound digital audio signals. An interpolator460is coupled to receiver450to interpolate the inbound digital audio signals provided thereto. In one embodiment, the data rate at which receiver450provides data to interpolator460is 8 kHz or 8 ksps. The 8 ksps data rate repeats itself at all integer multiples of 8 ksps. To filter out these images, a very low frequency high order analog filter can be employed. However, by oversampling the received data with, for example a 1 MHz signal, image filtering can be performed in digital, i.e digitally. Interpolator460performs this filtering and up-conversion. The output of interpolator460is coupled via an adder465to digital to analog converter (DAC)470. The operation of adder465will be discussed later in more detail below. In this particular embodiment, DAC470is a delta sigma modulator. DAC470converts the 13 bit PCM signal provided thereto to a one bit inbound bitstream audio signal, dac_data. This inbound bitstream audio signal is provided via FIFO475as data to one input of an adder480. Another input of adder480is coupled via a gain stage485to the output of ADC425in the side tone path. Gain stage485exhibits a gain, Stgain_ana (sidetone gain). Gain stage485extracts some of outbound audio bitstream at ADC425to use as a sidetone. The extracted bitstream audio signal that is supplied by gain stage485to adder480is referred to as the sidetone signal (st_data). The inbound digital audio signal coupled by FIFO475to adder480is referred to as the DAC signal (dac_data) or inbound bitstream audio signal.

Adder480adds the sidetone signal, st_data, to the inbound bitstream audio signal, dac_data, and filter490filters the resultant signal. In one embodiment, filter490is a switched capacitor filter (SCF). In another embodiment, filter490is a continuous time filter (CTF). The sidetone signal from the ADC path401is thus combined with the inbound bitstream audio signal in the inbound path402through the action of adder480and filter490. Together, adder480and filter490form a filter block500that is shown in more detail inFIGS. 5A and 5Bthat are discussed below. The signal at the output of filter490is an analog signal that includes both the inbound audio signal and a sidetone component. This analog signal is amplified by variable gain stage495which drives earphone/loudspeaker455. Both the inbound audio signal and the sidetone component experience the same filtering, band-limiting action of filter490and thus the sidetone does not sound richer or louder than the inbound audio signal when reproduced by earphone/speaker455. In one embodiment, device400(exclusive of microphone405and earphone/loudspeaker455) is fabricated on a single integrated circuit (IC). Device400may also be segmented into multiple ICs as desired depending on the particular application.

FIG. 5A-5Btogether form a schematic diagram of a switched capacitor filter/adder that may be employed as filter block500in one embodiment of the disclosed wireless communication device. Filter block500performs two functions. Filter block500adds the sidetone signal, st_data, from ADC path401to the dac_data signal in DAC path402. Filter block500also filters the analog signal that results from the combination or addition of the st_data signal to the dac_data signal. Filter block500is a biquadratic switched capacitor filter (SCF) in this particular embodiment of wireless communication system400. A continuous time filter and adder may also be employed as filter block500.

Filter block500includes a dac_data SCF input sampling circuit510that is coupled to FIFO475in DAC path402to receive and process the 1 bit dac_data signal, namely the inbound audio bitstream. Input sampling circuit510includes FET switches511,512,513,514,515,516,517,518and capacitors C1P and C1N that are configured as shown inFIG. 5A. FET switches511and512are coupled to reference voltages vrefp and vrefn, respectively. Clock signal, ph1d, and its complement, ph1db, drive FET switches514and511, respectively. Clock signal ph2ddrives FET switches512and513. A voltage, vcm, is supplied to the common node between FET switches512and513. Amplifiers540and550, discussed later in more detail, have a limited range of operation dictated by the supply voltage. The vcm voltage is used to center the signal swing of amplifiers540and550such that they are linear in a normal mode of operation. The data signal, dac_data, is supplied to the node between FET switches516and517as shown. The dac_data signal is the inbound audio bitstream that is supplied by DAC470and FIFO475in DAC path402ofFIG. 4. The complement of the dac_data signal, namely dac_datab, is supplied to FET switches515and518as shown.

Filter block500also includes an st_data SCF input sampling circuit520that exhibits a topology similar to the dac_data LCF input sampling circuit510discussed above. St_data SCF input sampling circuit520is coupled to st_gain amplifier485of ADC path401to receive a 1 bit gained-up sidetone signal, st_data, therefrom. Sampling circuit520includes FET switches521,522,523,524,525,526,527,528and variable capacitors C3P and C3N that are configured as shown inFIG. 5A. FET switches521and522are coupled to reference voltages vrefp and vrefn, respectively. Clock signal ph1dand its complement ph1dbdrive FET switches524and521, respectively. Clock signal ph2ddrives FET switches522and523. Voltage vcm is supplied to the common node between FET switches522and523. The sidetone audio signal, st_data, is supplied to the node between FET switches526and527. The st_data signal is the 1 bit sidetone audio signal extracted or derived from the outbound audio bitstream in ADC path401. The st_data signal is supplied by stgain amplifier485in ADC path401ofFIG. 4. The complement of the st_data signal, namely st_datab, is supplied to FET switches525and528as shown.

Dac_data SCF input sampling circuit510and st_data input sampling circuit520are coupled together and to biquadratic switched capacitor (SCF)530as shown inFIG. 5Asuch that sidetone st_data signal from circuit520is effectively added to the inbound dac_data signal from DAC470and FIFO475. Biquadratic SCF530filters the resultant signal to provide an analog audio output signal at its output535ofFIG. 5B. This analog audio output signal at filter output535includes both an analog version of the inbound audio signal received from the far-end communication device and an analog version of the sidetone signal from the ADC path of near-end communication device400.

In this embodiment, filter490of filter block500is a biquadratic SCF530. Biquadratic SCF530is a two stage filter including a first stage integrating amplifier540and a second stage integrating amplifier550. Integrating capacitors541(cmfbP1) and542(cmfbN1) are situated in feedback paths associated with integrating amplifier540as shown. FET switches543,544,545, and546switchably couple dac_data SCF input sampling circuit510and st_data SCF input sampling circuit520to integrating amplifier540as shown. Clock signal ph1is supplied to FET switches544and545, and clock signal ph2is supplied to FET switches543and546to control the switching thereof. The voltage vcm is supplied to the node between FET switches544and545. Integrating amplifier540includes inputs ph1d, ph1db, ph2dto which clock signals by the same names are supplied. Integrating amplifier540also includes two outputs, voutm and voutp, which are coupled via feedback paths including integrating capacitors541and542, respectively, back to the inputs of integrating amplifier540.

The outputs voutm1an voutp1of first integrating amplifier540are coupled to second integrating amplifier550as shown inFIG. 5B.FIG. 5Bdepicts the second stage of biquadratic SCF530which includes the second integrating amplifier550. An array of FET switching transistors and tri-state device control the application of the voutm1and voutp1signals in the second stage of biquadratic filter depicted inFIG. 5B. More specifically, the second stage includes tri-state devices551,552,553and554to which the ph1dand ph1dbclock signals are applied to control the switching thereof. The second stage also includes tri-state device555,556,557and558configured as shown and to which the ph2dand ph2dbclock signals are applied to control the switching thereof.

Integrating capacitors561(cmfbP2) and562(cmfbN2) are coupled from the respective outputs voutm2and voutp2of integrating amplifier550to the respective inputs thereof. Capacitors565(C4P) and566(C4N) are situated in the respective input lines leading to the inputs of integrating amplifier550. Switching FETs571,572,573,574,575and576are coupled together and to capacitors565and566to form a switching array between the outputs, voutm1and voutp1, of first integrating amplifier540and the inputs of second integrating amplifier550as shown. Switching FETs581and582are coupled respectively to tri-state devices551and552which handle full voltage supply range signals. The ph2d, ph1dband ph1dsignals are supplied to respective inputs of second integrating amplifier550having the same names.

The second integrating amplifier550includes outputs voutm2and voutp2which form the overall output535of filter block500. In this switched capacitor implementation, filter block500receives the 1 bit dac_data inbound audio bitstream from the far-end device and effectively adds thereto the one bit st_data audio bitstream sidetone that was extracted from the outbound path of the near-end device400. Moreover, filter block500filters the resultant signal to produce an analog audio signal including sidetone at output535.

A DC offset exists in the ADC path401of the communication device400that is depicted inFIG. 4. It is desirable that this DC offset of the sidetone be removed. In the methodology now described, the DC offset in the ADC path is extracted and fed to the DAC470in the DAC path402such that when the sidetone is summed with the inbound audio signal at adder480, the sidetone's DC offset is cancelled out.

When a one bit delta sigma modulator is employed as ADC425in the ADC path401, the delta sigma modulator/ADC exhibits pattern noise at frequencies directionally proportional to the input voltage of the delta sigma modulator/ADC425. The ADC should be guaranteed some DC input level such that at low signal levels, the idle tones of the ADC are out-of-band for communication device400. On power-up of device400, a digital calibration is performed to measure the analog offset in the ADC path401in which ADC425is located. If this offset is not larger than |4%| of full scale, a plus or minus offset is added to ADC425in analog by adder420. Delta sigma modulator/DAC470in DAC path402is offset for the same reason. This offset can be either positive or negative. Since this offset is a known quantity it can be removed in switched capacitor filter (SCF)490of DAC path402. The remaining offset in DAC path402is due to the SCF and driver amplifier495. Since the sidetone is added to the inbound audio signal in filter block500, the inbound audio signal will have the DC offset of the ADC path unless corrective action is taken.

Communication device400ofFIG. 4cancels the DC offset that the sidetone would otherwise introduce in DAC path402. This cancellation occurs in filter block500. More specifically, when communication device400is powered up, ADC425is calibrated and the DC offset of the ADC path, Voffadc, is determined in digital. Voffadc is then added by adder420to the signal in DAC path401. Once Voffadc is determined, the offset that needs to be added to DAC path402is defined as [sign of Voffadc]*Voffdac wherein Voffdac is the desired offset of the DAC path402. In an example wherein Voffadc is positive, then the following signal appears at the output of filter block500: Voffdac+Voffadc*Stgain_dig−Voffdac−Voffadc*Stgain_ana. Gain stage485adds gain control to the sidetone path. Stgain_ana is the gain provided by gain stage485. The offset in the sidetone path also sees this gain. Hence the offset compensation path also needs to be scaled by the same amount. Stgain_dig is the gain provided digitally in response to a device user request.

In summary, the signal path from pre-amplifier410exhibits a DC offset due to process mismatch or deliberate addition in adder420. This offset will be coupled to filter block500in the DAC path402through sidetone insertion. To cancel this offset, the offset is first determined in digital in high pass filter440and subtractor492. The output of subtractor492is the offset of the ADC path401. This offset is then scaled by a factor stgain_dig and subtracted from the digital input signal at adder465. Delta sigma modulator470also requires a DC offset to move its idle tones out of the audio band. To assure that the summation of the voffadc and voffdac does not result in a zero, the sign of voffadc is extracted and used as the sign of voffdac. The offset from the analog is hence added to the extracted offset from the digital in adder480and will be cancelled out to the first order. The offset from the analog refers to the path from preamplifier410to ADC425. The extracted offset from the digital refers to the output of subtractor492.

In wireless communication device400ofFIG. 4, a controller494effects time domain isolation (TDI) by inactivating noise producing digital circuits such as digital signal processor (DSP)496when radio frequency (RF) circuits such as transmitter445and receiver450are activated. Conversely, controller494inactivates these radio frequency circuits when digital circuits in communication device400are activated. Controller494thus controls the time periods when the radio frequency circuits and the digital circuits are alternatingly activated. The RF circuitry is activated during predetermined periods of time and the digital processing circuitry is activated during other predetermined periods of time. In this manner, the noise producing digital circuits do not negatively impact radio frequency reception and transmission by the radiofrequency circuits. Controller494includes a control output494A that is coupled to transmitter445and receiver450to control the time periods during which these radio frequency circuits are activated and inactivated. Controller494further includes an output494B that is coupled to digital circuits in communication device400such as digital signal processor (DSP)496. Other digital circuits that controller494may deactivate include, decimator435, high pass filter440, subtractor492, interpolator460, adder465and delta sigma DAC470, although specific connections between these circuits and controller494are not shown. DSP496is coupled to both transmitter445and receiver450by a connection (not shown) to process signals associated with transmission and reception. DSP496performs noise producing digital operations on the signals received and transmitted by communication device400. For example, DSP496locates the frequency burst (FB) in received radio signals. Communication device400avoids latency problem associated with FIFO430and FIFO475by extracting the sidetone from ADC425before the outbound audio signal reaches FIFO430. Communication device400further avoids latency problems associated with the FIFOs by summing the extracted sidetone with the inbound audio bitstream in filter block500. Thus the sidetone does not reach the digital circuits between FIFO430and transmitter445and between receiver450and FIFO475that are inactivated by controller494to avoid digital noise during RF activities. For these reasons, the extracted sidetone does not experience the latency or delay problems that it otherwise may have experienced if it were fed through the FIFOs.

A wireless communication device is thus disclosed that, in one embodiment, extracts a 1 bit sidetone signal from a delta sigma modulator ADC in the ADC path that processes the outbound audio signal. A delta sigma modulator DAC in the DAC path converts the inbound digital audio signal to a one bit inbound audio signal. The 1 bit sidetone signal is added to or combined with the one bit inbound audio signal in filter block500in the DAC path. Filter block500performs two functions. First, filter block500filters both the one bit sidetone signal and the one bit inbound audio signal. Secondly, filter block500also adds or combines the one bit sidetone signal with the one bit inbound audio signal to product the resultant analog audio signal that includes both sidetone and inbound audio at earphone/loudspeaker455.

Modifications and alternative embodiments of this invention will be apparent to those skilled in the art in view of this description of the invention. Accordingly, this description teaches those skilled in the art the manner of carrying out the invention and is to be construed as illustrative only. The forms of the invention shown and described constitute the present embodiments. Persons skilled in the art may make various changes in the shape, size and arrangement of parts. For example, persons skilled in the art may substitute equivalent elements for the elements illustrated and described here. Moreover, persons skilled in the art after having the benefit of this description of the invention may use certain features of the invention independently of the use of other features, without departing from the scope of the invention.