Semiconductor device and manufacturing method thereof

A semiconductor device includes a capacitor. The capacitor includes a first electrode and a second electrode disposed in a first metal layer. The first electrode has a first end and a second end, and the first electrode has a spiral pattern extending outwards from the first end to the second end. The first electrode and the second electrode have a substantially equal spacing therebetween.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority to Chinese Application Serial Number 202010392643.0, filed May 11, 2020, which is herein incorporated by reference in its entirety.

BACKGROUND

Integrated chips are formed on semiconductor die including millions or billions of transistor devices. The transistor devices are configured to act as switches and/or to produce power gains so as to enable logical functionality for an integrated chip (e.g., form a processor configured to perform logic functions). Integrated chips often also include passive devices, such as capacitors, resistors, inductors, transistors, etc. Passive devices are widely used to control integrated chip characteristics (e.g., gain, time constants, etc.) and to provide an integrated chip with a wide range of different functionalities (e.g., manufacturing analog and digital circuitry on the same die).

DETAILED DESCRIPTION

Throughout the description, the term “MOM capacitor” is used to refer to a capacitor that has an insulator between two conductive plates, in which the insulator may include dielectric materials such as oxides. A single layer MOM capacitor may comprise a first metal plate, a second metal plate and an insulation layer deposited between the first metal plate and the second metal plate. The capacitance of the single layer MOM capacitor is proportional to the area of the metal plates and the dielectric constant of the insulation layer.

Reference is made toFIG. 1, which is a plan view of a semiconductor device according to some embodiments of the disclosure. The semiconductor device includes a capacitor100, which includes a first electrode110and a second electrode120, in which the first electrode110and the second electrode120are disposed in a plane, such as in the same metal layer. Dielectric material (not shown) is filled between the first electrode110and the second electrode120. In some embodiments, the capacitor100may extend into other layers (e.g., interconnected by conductive vias). The capacitor100ofFIG. 1may be repeated in other layers above and/or below the given layer shown inFIG. 1. Accordingly, the first electrode110and the second electrode120may be repeated in multiple metal layers, and the electrodes in different metal layers are interconnected.

The capacitor100is a double surround structure. The first electrode110and the second electrode120are not directly connected to each other, and the first electrode110and the second electrode120surround each other from a center C of the capacitor100to an outer portion of the capacitor100. For example, the capacitor100can be a double spiral structure, in which the first electrode110and the second electrode120both are spiral patterns.

In some embodiments, the first electrode110has a first end112and a second end114. The first end112is substantially located adjacent the center C of the capacitor100, and the first electrode110spirally extends outwards from the first end112to the second end114. The first electrode110is a continuous line and does not have any branch between the first end112and the second end114. In some embodiments, the first electrode110includes a plurality of curve portions, and the curve portions are connected to each other. The width of the first electrode110is uniform from the first end112to the second end114. The first electrode110may include any suitable conductive material. In some embodiments, the first electrode110may include polysilicon. In some other embodiments, the first electrode110may include metal.

In some embodiments, the second electrode120has a first end122and a second end124. The first end122of the second electrode120is substantially located adjacent the center C of the capacitor100, and the second electrode120spirally extends outwards from the first end122to the second end124. The second electrode120is a continuous line and does not have any branch between the first end122and the second end124. In some embodiments, the second electrode120includes a plurality of curve portions, and the curve portions are connected to each other. The width of the second electrode120is uniform from the first end122to the second end124. The second electrode120may include any suitable conductive material. In some embodiments, the second electrode120may include polysilicon. In some other embodiments, the second electrode120may include metal.

In some embodiments, the first electrode110and the second electrode120have a substantially equal spacing therebetween. The first electrode110is substantially equally spaced from the second electrode120. The space can be regarded as the distance between the first electrode110and the second electrode120. Alternatively, the space can be regarded as the width of the dielectric material between the first electrode110and the second electrode120. The size of the space between the first electrode110and the second electrode120is designed depending on the capacitor breakdown voltage requirement.

In some embodiments, the double spiral structure including the first electrode110and the second electrode120is a multi-turns structure. That is, the angle from the first end112of the first electrode110to the second end114of the first electrode110is greater than about 720 degrees, and the angle from the first end122of the second electrode120to the second end124of the second electrode120is greater than about 720 degrees.

The first electrode110and the second electrode120extend in the same direction. For example, the first electrode110and the second electrode120both extend counterclockwise or clockwise from the center C of the capacitor100. For better space utilization, the first end112of the first electrode110and the second end114of the first electrode110face the same direction, and the first end122of the second electrode120and the second end124of the second electrode120face the same direction. Moreover, the first end112of the first electrode110and the first end122of the second electrode120do not face the same direction, and the second end114of the first electrode110and the second end124of the second electrode120do not face the same direction. In some embodiments, the first end112of the first electrode110and the first end122of the second electrode120face opposite directions. In some embodiments, the second end114of the first electrode110and the second end124of the second electrode120face opposite directions.

In some embodiments, the spiral pattern of the first electrode110and the second electrode120is a spiral of Archimedes. The first electrode110and the second electrode120can be connected to power lines or other metal layers through vias130. In some embodiments, the vias130are disposed adjacent the second ends114,124of the first and second electrodes110,120.

The capacitor100as shown inFIG. 1can increase the effective area within the same layout area, thereby resulting in a larger capacitance value with the same layout area. The pattern of the double surround capacitor is not limited to the spiral pattern, and other suitable patterns can be utilized in the double surround capacitor. Variations of the double surround capacitor are discussed in the following embodiments.

Reference is made toFIG. 2, which is a plan view of an integrated circuit having a semiconductor device according to some embodiments of the disclosure. In some embodiments, the capacitor200of the semiconductor device is a quadrilateral double surround structure. The capacitor200includes a first electrode210and a second electrode220. The first electrode210and the second electrode220are disposed in a plane, such as in the same metal layer. The first electrode210and the second electrode220are not directly connected to each other, and the first electrode210and the second electrode220surround each other and extend from a center C of the capacitor200to an outer portion of the capacitor200.

The first electrode210of the capacitor200includes a plurality of turns. The first electrode210extends outwards from a first end212to a second end214, in which the first end212of the first electrode210is disposed adjacent the center C of the capacitor200. The first electrode210is a continuous line and does not have any branch between the first end212and the second end214. The first electrode210includes a plurality of first portions216and a plurality of second portions218. The first portions216and the second portions218are coplanarly arranged. The first portions216and the second portions218are alternately arranged and connected to each other from the first end212to the second end214of the first electrode210. Each of the first portions216extends longitudinally in a first direction D1a. The first portions216are substantially parallel to each other. Each of the second portions218extends from the adjacent first portion216in a second direction D2a, in which the second direction D2ais non co-linear with the first direction D1a. The second portions218are substantially parallel to each other.

In some embodiments, the lengths of the first portions216are not the same. In some embodiments, the lengths of the first portions216are gradually increased from the center C of the capacitor200. For example, the first portion216adjacent the center C has the first end212and has the shortest length among the first portions216. Similarly, the lengths of the second portions218are not the same. In some embodiments, the lengths of the second portions218are gradually increased from the center C of the capacitor200. For example, the second portion218farthest away from the center C has the second end214and has the longest length among the second portions218.

The second electrode220of the capacitor200includes a plurality of turns. The second electrode220extends outwards from a first end222to a second end224, in which the first end222of the second electrode220is disposed adjacent the center C of the capacitor200. The second electrode220is a continuous line and does not have any branch between the first end222and the second end224. The second electrode220includes a plurality of first portions226and a plurality of second portions228. The first portions226and the second portions228are coplanarly arranged. The first portions226and the second portions228are alternately arranged and connected to each other from the first end222to the second end224of the second electrode220. Each of the first portions226extends longitudinally in the third direction D3a. The first portions226are substantially parallel to each other. Each of the second portions228extends from the adjacent first portion226in a fourth direction D4a, in which the fourth direction D4ais non co-linear with the third direction D3a. The second portions228are substantially parallel to each other.

In some embodiments, the first direction D1ais substantially parallel to the third direction D3a, and the second direction D2ais substantially parallel to the fourth direction D4a. In some embodiments, an angle θ1abetween the first direction D1aand the second direction D2ais greater than or approximately equal to 90 degrees, and an angle between each of the first portions216and each of the second portions218is greater than or approximately equal to 90 degrees. In some embodiments, an angle θ2abetween the third direction D3aand the fourth direction D4ais greater than or approximately equal to 90 degrees, and an angle between each of the first portions226and each of the second portions228is greater than or approximately equal to 90 degrees.

In some embodiments, the first portions226of the second electrode220are substantially parallel to the first portions216of the first electrode210, and the second portions228of the second electrode220are substantially parallel to the second portions218of the first electrode210.

In some embodiments, the lengths of the first portions226are not the same. In some embodiments, the lengths of the first portions226are gradually increased from the center C of the capacitor200. For example, the first portion226adjacent the center C has the first end222and has the shortest length among the first portions226. Similarly, the lengths of the second portions228are not the same. In some embodiments, the lengths of the second portions228are gradually increased from the center C of the capacitor200. For example, the second portion228farthest away from the center C has the second end224and has the longest length among the second portions228.

The first electrode210and the second electrode220can be connected to power lines or other metal layers through vias230. In some embodiments, the vias230are disposed adjacent the second ends214,224of the first and second electrodes210,220.

Reference is made toFIG. 3, which is a plan view of a semiconductor device according to some embodiments of the disclosure. In some embodiments, the capacitor300of the semiconductor device is a hexagonal double surround structure. The capacitor300includes a first electrode310and a second electrode320. The first electrode310and the second electrode320are disposed in a plane, such as in the same metal layer. The first electrode310and the second electrode320are not directly connected to each other, and the first electrode310and the second electrode320surround each other and extend from a center C of the capacitor300to an outer portion of the capacitor300.

The first electrode310of the capacitor300includes a plurality of turns. The first electrode310extends outwards from a first end312to a second end314, in which the first end312of the first electrode310is disposed adjacent the center C of the capacitor300. The first electrode310is a continuous line and does not have any branch between the first end312and the second end314. The first electrode310includes a plurality of first portions316, a plurality of second portions317, and a plurality of third portions318. The first portions316, the second portions317, and the third portions318are coplanarly arranged. The first portions316, the second portions317, and the third portions318are sequentially arranged and are connected to each other from the first end312to the second end314of the first electrode310.

Each of the first portions316extends longitudinally in a first direction D1b. The first portions316are substantially parallel to each other. Each of the second portions317extends longitudinally in a second direction D2b. Each of the second portions317extends from the adjacent first portion316in the second direction D2b, in which the second direction D2bis non co-linear with the first direction D1b. The second portions317are substantially parallel to each other.

Each of the third portions318extends longitudinally in a third direction D3b. The third portions318are substantially parallel to each other. Each of the third portions318extends from the adjacent second portion317in the third direction D3b, in which the third direction D3bis non co-linear with the second direction D2b. The third portions318are substantially parallel to each other. Moreover, each of the first portions316extends from the adjacent third portion318in the first direction D1b, in which the first direction D1bis non co-linear with the third direction D3b.

In some embodiments, the lengths of the first portions316are not the same. For example, the lengths of the first portions316are gradually increased from the center C of the capacitor300. For example, the first portion316adjacent the center C has the first end312and has the shortest length among the first portions316. The third portion318farthest away from the center C has the second end314and has the longest length among the third portions318. Similarly, the lengths of the second portions317are not the same, and the lengths of the second portions317are gradually increased from the center C of the capacitor300. For example, the second portion317closer to the center C has a shorter length than the second portion317away from the center C.

The second electrode320of the capacitor300includes a plurality of turns. The second electrode320extends outwards from a first end322to a second end324, in which the first end322of the second electrode320is disposed adjacent the center C of the capacitor300. The second electrode320is a continuous line and does not have any branch between the first end322and the second end324. The second electrode320includes a plurality of first portions326, a plurality of second portions327, and a plurality of third portions328. The first portions326, the second portions327, and the third portions328are coplanarly arranged. The first portions326, the second portions327, and the third portions328are sequentially arranged and connected to each other from the first end322to the second end324of the second electrode320.

Each of the first portions326extends longitudinally in a fourth direction D4b. The first portions326are substantially parallel to each other. Each of the second portions327extends longitudinally in a fifth direction D5b. Each of the second portions327extends from the adjacent first portion326in the fifth direction D5b, in which the fifth direction D5bis non co-linear with the fourth direction D4b. The second portions327are substantially parallel to each other.

Each of the third portions328extends longitudinally in a sixth direction D6b. The third portions328are substantially parallel to each other. Each of the third portions328extends from the adjacent second portion327in the sixth direction D6b, in which the sixth direction D6bis non co-linear with the fifth direction D5b. The third portions328are substantially parallel to each other. Moreover, each of the first portions326extends from the adjacent third portion328in the fourth direction D4b, in which the fourth direction D4bis non co-linear with the sixth direction D6b.

In some embodiments, the lengths of the first portions326are not the same. For example, the lengths of the first portions326are gradually increased from the center C of the capacitor300. For example, the first portion326adjacent the center C has the first end322and has the shortest length among the first portions326. The third portion328farthest away from the center C has the second end314and has the longest length among the third portions328. Similarly, the lengths of the second portions327are not the same, and the lengths of the second portions327are gradually increased from the center C of the capacitor300. For example, the second portion327closer to the center C has a shorter length than the second portion327away from the center C.

In some embodiments, the first direction D1bis substantially parallel to the fourth direction D4b, the second direction D2bis substantially parallel to the fifth direction D5b, and the third direction D3bis substantially parallel to the sixth direction D6b. In some embodiments, an angle θ1bbetween the first direction D1band the second direction D2bis greater than or approximately equal to 120 degrees, and an angle between the first portions316,326and the second portions317,327is greater than or approximately equal to 120 degrees. In some embodiments, an angle θ2bbetween the second direction D2band the third direction D3bis greater than or approximately equal to 120 degrees, and an angle between the second portions317,327and the third portions318,328is greater than or approximately equal to 120 degrees. In some embodiments, an angle θ3bbetween the first direction D1band the third direction D3bis greater than or approximately equal to 120 degrees, and an angle between the first portions316,326and the third portions318,328is greater than or approximately equal to 120 degrees.

For better space utilization, the first end312of the first electrode310and the second end314of the first electrode310do not face the same direction, and the first end322of the second electrode320and the second end324of the second electrode320do not face the same direction. Moreover, the first end312of the first electrode310and the first end322of the second electrode320do not face the same direction, and the second end314of the first electrode310and the second end324of the second electrode320do not face the same direction. In some embodiments, the first end312of the first electrode310and the first end322of the second electrode320face opposite directions. In some embodiments, the second end314of the first electrode310and the second end324of the second electrode320face opposite directions.

The first electrode310and the second electrode320can be connected to power lines or other metal layers through vias330. In some embodiments, the vias330are disposed adjacent the second ends314,324of the first and second electrodes310,320.

Reference is made toFIG. 4, which is a plan view of a semiconductor device according to some embodiments of the disclosure. In some embodiments, the capacitor400of the semiconductor device is an octagonal double surround structure. The capacitor400includes a first electrode410and a second electrode420. The first electrode410and the second electrode420are disposed in a plane, such as in the same metal layer. The first electrode410and the second electrode420are not directly connected to each other, and the first electrode410and the second electrode420surround each other and extend from a center C of the capacitor400to an outer portion of the capacitor400.

The first electrode410of the capacitor400includes a plurality of turns. The first electrode410extends outwards from a first end412to a second end414, in which the first end412of the first electrode410is disposed adjacent the center C of the capacitor400. The first electrode410is a continuous line and does not have any branch between the first end412and the second end414. The first electrode410includes a plurality of first portions416, a plurality of second portions417, a plurality of third portions418, and a plurality of fourth portions419. The first portions416, the second portions417, the third portions418, and the fourth portions419are coplanar arranged. The first portions416, the second portions417, the third portions418, and the fourth portions419are sequentially arranged and are connected to each other from the first end412to the second end414of the first electrode410.

Each of the first portions416extends longitudinally in a first direction D1c. The first portions416are substantially parallel to each other. Each of the second portions417extends longitudinally in a second direction D2c. Each of the second portions417extends from the adjacent first portion416in the second direction D2c, in which the second direction D2cis non co-linear with the first direction D1c. The second portions417are substantially parallel to each other.

Each of the third portions418extends longitudinally in a third direction D3c. The third portions418are substantially parallel to each other. Each of the third portions418extends from the adjacent second portion417in the third direction D3c, in which the third direction D3cis non co-linear with the second direction D2c. The third portions418are substantially parallel to each other.

Each of the fourth portions419extends longitudinally in a fourth direction D4c. The fourth portions419are substantially parallel to each other. Each of the fourth portions419extends from the adjacent third portion418in the fourth direction D4c, in which the fourth direction D4cis non co-linear with the third direction D3c. The fourth portions419are substantially parallel to each other. Moreover, each of the first portions416extends from the adjacent fourth portion419in the first direction D1c, in which the first direction D1cis non co-linear with the fourth direction D4c.

In some embodiments, the lengths of the first portions416, the second portions417, the third portions418, and the fourth portions419are not the same and are gradually increased from the center C of the capacitor400. For example, the first portion416adjacent the center C has the first end412and has the shortest length among the first portions316. The first portion416farthest away from the center C has the second end414and has the longest length among the first portions416.

The second electrode420of the capacitor400includes a plurality of turns. The second electrode420extends outwards from a first end422to a second end424, in which the first end422of the second electrode420is disposed adjacent the center C of the capacitor400. The second electrode420is a continuous line and does not have any branch between the first end422and the second end424. The second electrode420includes a plurality of first portions426, a plurality of second portions427, a plurality of third portions428, and a plurality of fourth portions429. The first portions426, the second portions427, the third portions428, and the fourth portions429are coplanar arranged. The first portions426, the second portions427, the third portions428, and the fourth portions429are sequentially arranged and connected to each other from the first end422to the second end424of the second electrode420.

Each of the first portions426extends longitudinally in a fifth direction D5c. The first portions426are substantially parallel to each other. Each of the second portions427extends longitudinally in a sixth direction D6c. Each of the second portions427extends from the adjacent first portion426in the sixth direction D6c, in which the sixth direction D6cis non co-linear with the fifth direction D5c. The second portions427are substantially parallel to each other.

Each of the third portions428extends longitudinally in a seventh direction D7c. The third portions428are substantially parallel to each other. Each of the third portions428extends from the adjacent second portion427in the seventh direction D7c, in which the seventh direction D7cis non co-linear with the sixth direction D6c. The third portions428are substantially parallel to each other.

Each of the fourth portions429extends longitudinally in an eighth direction D8c. The fourth portions429are substantially parallel to each other. Each of the fourth portions429extends from the adjacent third portion428in the eighth direction D8c, in which the eighth direction D8cis non co-linear with the seventh direction D7c. The fourth portions429are substantially parallel to each other. Moreover, each of the first portions426extends from the adjacent fourth portion429in the fifth direction D5c, in which the fifth direction D5cis non co-linear with the eighth direction D8c.

In some embodiments, the first direction D1cis substantially parallel to the fifth direction D5c, the second direction D2cis substantially parallel to the sixth direction D6c, the third direction D3cis substantially parallel to the seventh direction D7c, and the fourth direction D4cis substantially parallel to the eighth direction D8c. In some embodiments, an angle θ1cbetween the first direction D1cand the second direction D2cis greater than or approximately equal to 45 degrees, and an angle between the first portions416,426and the second portions417,427is greater than or approximately equal to 135 degrees. In some embodiments, an angle θ2cbetween the second direction D2cand the third direction D3cis greater than or approximately equal to 45 degrees, and an angle between the second portions417,427and the third portions418,428is greater than or approximately equal to 135 degrees. In some embodiments, an angle θ3cbetween the first direction D1cand the fourth direction D4cis greater than or approximately equal to 45 degrees, and an angle between the first portions416,426and the fourth portions419,429is greater than or approximately equal to 135 degrees.

In some embodiments, the lengths of the first portions426, the second portions427, the third portions428, and the fourth portions429are not the same and are gradually increased from the center C of the capacitor400. For example, the first portion426adjacent the center C has the first end422and has the shortest length among the first portions426. The first portion426farthest away from the center C has the second end424and has the longest length among the first portions426.

For better space utilization, the first end412of the first electrode410and the second end414of the first electrode410face the same direction, and the first end422of the second electrode420and the second end424of the second electrode420face the same direction. Moreover, the first end412of the first electrode410and the first end422of the second electrode420do not face the same direction, and the second end414of the first electrode410and the second end424of the second electrode420do not face the same direction. In some embodiments, the first end412of the first electrode410and the first end422of the second electrode420face opposite directions. In some embodiments, the second end414of the first electrode410and the second end424of the second electrode420face opposite directions.

The first electrode410and the second electrode420can be connected to power lines or other metal layers through vias430. In some embodiments, the vias430are disposed adjacent the second ends414,424of the first and second electrodes410,420.

Reference is made toFIG. 5, which is a cross-sectional view of a semiconductor device according to some embodiments of the disclosure. The semiconductor device500includes a plurality of metal layers. For example, the semiconductor device500includes a first metal layer M1, a second metal layer M2, a third metal layer M3, and a fourth metal layer M4. The second metal layer M2and the third metal layer M3are formed between the first metal layer M1and the fourth metal layer M4and have a first capacitor510and a second capacitor520, respectively. The first metal layer M1and the fourth metal layer M4can be interconnected through vias530.

In some embodiments, the first metal layer M1includes a bottom metal plate540, and the fourth metal layer M4includes a top metal plate542. The bottom metal plate540and the top metal plate542may serve as shield metal plates, and the first capacitor510and the second capacitor520are disposed between the bottom metal plate540and the top metal plate542.

The first capacitor510and the second capacitor520can be a MOM capacitor, such as the capacitor100,200,300,400discussed above. The first capacitor510is disposed in the second metal layer M2and includes a first electrode512and a second electrode514. The second capacitor520is disposed in the third metal layer M3and includes a first electrode522and a second electrode524.

In some embodiments, the first electrode512of the first capacitor510completely overlaps the first electrode522of the second capacitor520, and the second electrode514of the first capacitor510completely overlaps the second electrode524of the second capacitor520. In some embodiments, the first electrode512of the first capacitor510and the first electrode522of the second capacitor520are oppositely charged, and the second electrode514of the first capacitor510and the second electrode524of the second capacitor520are oppositely charged.

For example, the first electrode512is a cathode of the first capacitor510, the second electrode514is an anode of the first capacitor510, the first electrode522is an anode of the second capacitor520, and the second electrode524is a cathode of the second capacitor520. By such an arrangement, the capacitance is not only laterally introduced between the first electrode512and the second electrode514of the first capacitor510and between the first electrode522and the second electrode524of the second capacitor520, but also vertically introduced between the first electrode512of the first capacitor510and the first electrode522of the second capacitor520and the second electrode514of the first capacitor510and the second electrode524of the second capacitor520, such that the capacitance value of the semiconductor device500can be further increased.

Reference is made toFIG. 6, which is a plan view of a semiconductor device according to some embodiments of the disclosure. The semiconductor device600includes a first capacitor C1and a second capacitor C2, in which the first capacitor C1and the second capacitor C2are disposed in a plane, such as the same metal layer. In some embodiments, the first capacitor C1and the second capacitor C2are quadrilateral double surround structures. In some other embodiments, the first capacitor C1and the second capacitor C2can be spiral double surround structures, hexagonal double surround structures, octagonal double surround structures, or other polygonal double surround structures.

The semiconductor device600includes a first electrode610of the first capacitor C1, a second electrode620of the second capacitor C2, and a common electrode630shared by the first capacitor C1and the second capacitor C2. The common electrode630is disposed between the first electrode610of the first capacitor C1and the second electrode620of the second capacitor C2. The common electrode630and the first electrode610form the first capacitor C1, and the common electrode630and the second electrode620form the second capacitor C2. In some embodiments, the first electrode610is an anode of the first capacitor C1, the second electrode620is an anode of the second capacitor C2, and the common electrode630is a common cathode of the first capacitor C1and the second capacitor C2. In some other embodiments, the first electrode610is a cathode of the first capacitor C1, the second electrode620is a cathode of the second capacitor C2, and the common electrode630is a common anode of the first capacitor C1and the second capacitor C2.

In some embodiments, the structure ofFIG. 6can be stacked on an identical or similar structure, as illustrated inFIG. 7, such that the capacitance can be laterally introduced between the first capacitor C1and the second capacitor C2in the plane and vertically introduced between the first capacitor C1and the second capacitor C2in different planes.

Reference is made toFIGS. 8A to 8F, which are cross-sectional views of the various stages of fabricating a semiconductor device according to some embodiments of the disclosure. As shown inFIG. 8A, a dielectric layer810is formed on a substrate800. The substrate800can include an elementary semiconductor (e.g., silicon or germanium) and/or a compound semiconductor (e.g., silicon germanium, silicon carbide, gallium arsenic, indium arsenide, gallium nitride, or indium phosphide). The substrate800may include one or more doped regions. For example, a region of the substrate800may be doped with a p-type dopant. Suitable p-type dopants include boron, gallium, indium, other suitable p-type dopants, and/or combinations thereof. The substrate may also include one or more regions doped with an n-type dopant such as phosphorus, arsenic, other suitable n-type dopants, and/or combinations thereof. Doping may be implemented using a process such as ion implantation or diffusion in various steps and techniques. In some embodiments, the substrate800includes one or more active devices (not shown) formed on the substrate. Examples of such active devices include P-channel field effect transistors (PFETs), N-channel FETs (NFETs), metal-oxide semiconductor field effect transistors (MOSFETs), complementary metal-oxide semiconductor (CMOS) transistors, FinFETs, high voltage transistors, high frequency transistors, bipolar junction transistors, other suitable devices, and/or combinations thereof.

The dielectric layer810may include a semiconductor oxide, a semiconductor nitride, a semiconductor oxynitride, TEOS oxide, or other suitable materials. In some embodiments, the dielectric layer810includes one or more sub-layers such as an etch stop layer and/or a contact etch stop layer (CESL).

Referring toFIG. 8B, a patterning process is performed to pattern the dielectric layer810, thereby forming a plurality of trenches820in the dielectric layer810. In some embodiments, the number of the trenches820can be two or three. The top view of the trenches820can be spiral, quadrilateral, hexagonal, octagonal, or other polygonal in shape.

Referring toFIG. 8C, a filling layer830is deposited in the trenches820and on the dielectric layer810. The filling layer830includes a conductive material, such as tungsten, copper, aluminum, aluminum/silicon/copper alloy, titanium, titanium nitride, tungsten nitride, metal silicide, combinations thereof, or another suitable conductive material.

Referring toFIG. 8D, a planarization process is performed to expose the top surface of the dielectric layer810, and the conductive material that remains is filled in the trenches820(as shown inFIG. 8C), and functions as electrodes840of the capacitor. In some embodiments, the electrodes840of the capacitor include a cathode and an anode, and the structure and dimensions thereof are similar to those discussed inFIGS. 1-4. In some other embodiments, the electrodes840of the capacitor include a cathode, an anode, and a common electrode, and the structure and dimensions thereof are similar to those discussed inFIGS. 1-4 and 6. In some embodiments, a combination of the electrodes840and the dielectric layer810can be referred to as a metal layer, and the electrodes840are the conductive lines in the metal layer.

Referring toFIG. 8E, an additional metal layer including electrodes850and the dielectric layer814is formed over the metal layer including the electrodes840and the dielectric layer810, and the metal layers are spaced by the dielectric layer812therebetween. The electrodes850are formed in the dielectric layer814and have similar patterns as that of the electrodes840.

Referring toFIG. 8F, an interlayer dielectric layer816is formed on the electrodes850and the dielectric layer814, and a plurality of vias860are formed penetrating the interlayer dielectric layer816to connect to the corresponding electrodes850. In some embodiments, the electrodes840in the dielectric layer810includes a first anode840aand a first cathode840b, in which the first anode840aspirally or polygonally extends outwards from a first end to a second end of the first anode840a, and the first anode840aand the first cathode840bhave a substantially equal spacing therebetween. The electrodes850in the dielectric layer814includes a second anode850band a second cathode850a, in which the second anode850bspirally or polygonally extends outwards from a first end to a second end of the second anode850b, and the second anode850band the second cathode850ahave a substantially equal spacing therebetween. The second anode850boverlaps the first cathode840bto generate extra capacitance therebetween. The second cathode850aoverlaps the first anode840ato generate extra capacitance therebetween.

According to some embodiments, the electrodes of the capacitor surround each other and are spaced apart by a consistent distance. The electrodes of the capacitors spirally or polygonally extend from a first end to a second end without any branch, such that the capacitance value of the capacitor can be increased.

According to some embodiments, a semiconductor device includes a capacitor. The capacitor includes a first electrode and a second electrode disposed in a first metal layer. The first electrode has a first end and a second end, and the first electrode has a spiral pattern extending outwards from the first end to the second end. The first electrode and the second electrode have a substantially equal spacing therebetween.

According to some embodiments, a semiconductor device includes a first electrode and a second electrode disposed in a metal layer. The first electrode has a first end and a second end. The first electrode has a plurality turns and extends outwards from the first end to the second end. The first electrode includes a first portion extending longitudinally in a first direction, in a plane, and a second portion coplanar with the first portion in the plane and extending from the first portion in a second direction that is non co-linear with the first direction. The first electrode and the second electrode have a substantially equal spacing therebetween.

According to some embodiments, a method includes forming a first dielectric layer on a substrate, and a first anode and a first cathode are formed in the first dielectric layer, in which the first anode spirally or polygonally extends outwards from a first end to a second end of the first anode, and the first anode and the first cathode have a substantially equal spacing therebetween. A second dielectric layer is formed on the first dielectric layer. A second anode and a second cathode are formed in the second dielectric layer, in which the second anode spirally or polygonally extends outwards from a first end to a second end of the second anode, and the second anode and the second cathode have a substantially equal spacing therebetween.