Display device and electronic device

To suppress enlargement of pixel area even in the case of reducing current supplied to an electroluminescent element. A switch transistor, a first driving transistor, an electroluminescent element, and a second driving transistor provided between the first driving transistor and the electroluminescent element are included. A power supply potential is supplied to a gate of the second driving transistor. Drain current of the second driving transistor is controlled by the first driving transistor and the second driving transistor, so that a value of current supplied to the electroluminescent element is controlled.

BACKGROUND OF THE INVENTION

1. Field of the Invention

An embodiment of the present invention relates to a display device. An embodiment of the present invention relates to an electronic device.

2. Description of the Related Art

In recent years, technological development of display devices with higher definition has been advanced.

An example of the display device is an electroluminescent display device (also referred to as an EL display device), or the like (e.g., Patent Document 1). The EL display device has an electroluminescent element (also referred to as an EL element) and a driving transistor for controlling the amount of current supplied to the EL element.

In order that the EL display device may have higher definition, the number of pixels may be increased for higher resolution. In this case, the EL display device needs a reduction in luminance variation among pixels and higher operation speed of a driver circuit. Accordingly, field-effect transistors in the EL display device preferably have high field-effect mobility and small variations in electrical characteristics; for example, a field-effect transistor where a single crystal silicon layer is used for a channel formation region is preferably used.

On the other hand, when the number of pixels is increased while the size of a panel is fixed, the area per pixel is decreased. In addition, pixel area determines the amount of current needed for an EL element. Since the area of an EL element is decreased as a pixel area is decreased, the amount of current supplied to the EL element is required to be reduced. In order to decrease the amount of current supplied to an EL element, current flowing between a source and a drain of a driving transistor (also referred to as drain current) may be reduced, for example.

REFERENCE

SUMMARY OF THE INVENTION

A conventional display device has a problem in that when the amount of current supplied to an EL element is decreased as definition becomes higher, pixel area is increased, which prevents the definition of the display device from being higher. The reason is shown below.

A conventional display device needs a driving transistor with longer channel length and smaller channel width in order to reduce the drain current of the driving transistor without an increase in manufacturing steps and degradation in characteristics (e.g., field-effect mobility, threshold voltage, and variations in electrical characteristics) of the other field-effect transistors. Since the channel width has a limit on processing accuracy and cannot be smaller than a certain value, the channel length of the driving transistor should be lengthened to decrease the drain current of the driving transistor. Lengthening the channel length of the driving transistor naturally leads to enlargement of pixel area. Therefore, it is difficult to lengthen the channel length of a driving transistor while the area per pixel becomes smaller for higher definition.

In view of the above problem, an object of one embodiment of the present invention is to prevent enlargement of pixel area even when the amount of current supplied to an EL element is reduced.

In one embodiment of the present invention, a pixel circuit of a display device includes a switch transistor, a first driving transistor, an EL element, and a second driving transistor provided between the first driving transistor and the EL element.

The potential of a data signal is applied to a gate of the first driving transistor through the switch transistor and a value of drain current is controlled in accordance with the potential of the data signal.

The second driving transistor and the first driving transistor are formed in the same manufacturing step and have the same conductivity type. A power supply potential is applied to a gate of the second driving transistor. The power supply potential is preferably a constant potential.

The first driving transistor and the second driving transistor each have a function of controlling a value of current supplied to the EL element.

In one embodiment of the present invention, when the first driving transistor operates in a linear region, and the maximum value of the drain current of the second driving transistor in a saturation region is Idmax, the drain current of the second driving transistor is controlled by the first driving transistor and the second driving transistor so that Idmaxsatisfies the following formula (1).

Note that in the formula (1), L1is a channel length of the first driving transistor, L2is a channel length of the second driving transistor, W is a channel width of the first driving transistor, μ is a field-effect mobility of the first driving transistor, Vgis a voltage between a gate and a source of the first driving transistor, Vthis a threshold voltage of the first driving transistor, and Cox is the sum of gate capacitances of the first driving transistor and the second driving transistor.

As described above, in one embodiment of the present invention, a value of drain current of the second driving transistor in a saturation region is controlled by the first and second driving transistors so as to satisfy the formula (1), whereby a value of current supplied to the EL element is decreased.

In another embodiment of the present invention, a panel provided for a housing of an electronic device is formed using a display device including the pixel circuit.

In one embodiment of the present invention, even when drain current of a second driving transistor and current supplied to an EL element are reduced by a first driving transistor and the second driving transistor, the sum of channel lengths of the first and second driving transistors can be smaller than or equal to the channel length of a conventional driving transistor. Thus, an increase in pixel area can be suppressed.

DETAILED DESCRIPTION OF THE INVENTION

An example of the embodiment of the present invention will be described below. Note that it will be readily appreciated by those skilled in the art that details of the embodiments can be modified in various ways without departing from the spirit and scope of the present invention. Thus, the present invention should not be limited to, for example, the description of the following embodiments.

Note that the contents in different embodiments can be combined with one another as appropriate. In addition, the contents of the embodiments can be replaced with each other as appropriate.

Further, the ordinal numbers such as “first” and “second” are used to avoid confusion between components and do not limit the number of each component.

In this embodiment, an example of a display device that is one embodiment of the present invention will be described with reference toFIG. 1,FIG. 2,FIGS. 3A and 3B,FIGS. 4A and 4B,FIGS. 5A and 5B,FIG. 6, andFIG. 7.

First, a circuit configuration of a pixel circuit of the display device of this embodiment will be described with reference toFIG. 1.FIG. 1is a circuit diagram illustrating the circuit configuration of a pixel circuit.

As shown inFIG. 1, the display device of this embodiment has a switch transistor110that is a field-effect transistor, a first driving transistor111that is a field-effect transistor, a capacitor130, an EL element (electroluminescent element)120, and a second driving transistor112that is a field-effect transistor.

The potential of a data signal is applied to one of a source and a drain of the switch transistor110through a data signal line DL. The potential of a gate signal is applied to a gate of the switch transistor110through a gate signal line GL. When the switch transistor110has a double-gate structure, off-state current of the transistor can be reduced; however, the structure of the transistor is not limited thereto. The switch transistor110is an n-channel transistor inFIG. 1, but it is not limited thereto. The switch transistor110may be a p-channel transistor. The switch transistor110has a function of determining whether or not data of a data signal held by the pixel circuit is rewritten.

A first power supply potential VP1is applied to one of a source and a drain of the first driving transistor111through a first power supply line PSL1. A gate of the first driving transistor111is connected to the other of the source and the drain of the switch transistor110. The gate of the first driving transistor111is not necessarily directly connected to the other of the source and the drain of the switch transistor110as long as the potential of the gate of the first driving transistor111is controlled by a data signal. The first driving transistor111is not limited to be a p-channel transistor, and may be an n-channel transistor. The first driving transistor111has a function of controlling the amount of current supplied to the EL element120.

A capacitor potential is applied to one of a pair of electrodes of the capacitor130through a capacitor line CsL. The other of the pair of electrodes of the capacitor130is connected to the gate of the first driving transistor111. Note that the capacitor130can have a structure other than the following one: the capacitor130is a MOS capacitor, and the capacitor line CsL is connected to the first power supply line PSL1to supply the first power supply potential VP1as a capacitor potential. However, the structure is not limited thereto. For example, the potential different from the first power supply potential VP1may be supplied as a capacitor potential without a connection between the capacitor line CsL and the first power supply line PSL1. Note that the capacitor130is not necessarily provided. The capacitor130functions as a storage capacitor that holds electric charges accumulated in the gate of the first driving transistor111at the time when data of a data signal is written to the pixel circuit.

A second power supply potential VP2is applied to one of an anode and a cathode of the EL element120through a second power supply line PSL2. The EL element120may be a stacked EL element; however, the EL element is not limited thereto, and may be an inversely stacked EL element. The EL element120has a function of emitting light at a luminance that corresponds to drain current of the second driving transistor112.

The second driving transistor112and the first driving transistor111are formed in the same manufacturing step and have the same conductivity type. One of a source and a drain of the second driving transistor112is connected to the other of the source and the drain of the first driving transistor111. The other of the source and the drain of the second driving transistor112is connected to the other of the anode and the cathode of the EL element120. A third power supply potential VP3is applied to a gate of the second driving transistor112through a third power supply line PSL3. The third power supply potential VP3is preferably a constant potential. Note that a potential within a predetermined amplitude range can be regarded as a constant potential. The second driving transistor112is not limited to a p-channel transistor and may be an n-channel transistor. The channel length of the first driving transistor111may be longer than the channel length of the second driving transistor112; however the channel lengths are not limited thereto. The channel length of the first driving transistor111may be shorter than the channel length of the second driving transistor112. The second driving transistor112has a function of controlling the amount of current supplied to the EL element120.

Next, an example of a method for driving the display device shown inFIG. 1is described. In this case, a first power supply potential and a second power supply potential are a high power supply potential and a low power supply potential, respectively.

First, the potential of the gate signal line GL is set by the potential of a gate signal to turn on the switch transistor110. In addition, the potential of the data signal line DL is set by the potential of a data signal.

In this case, the potential of the gate of the first driving transistor111is substantially equal to the potential of a data signal. In this case, drain current of the first driving transistor111is Id111.

The second driving transistor112operates in a saturation region in accordance with the drain current of the first driving transistor111. In this case, drain current of the second driving transistor112is Id112.

The drain current of the second driving transistor112in a saturation region (Id112) is obtained by the following formula (2).

In the formula (2), L112is the channel length of the second driving transistor112, W112is a channel width of the second driving transistor112, μ112is a field-effect mobility of the second driving transistor112, Vg112is a voltage between the gate and the source of the second driving transistor112, Vth112is a threshold voltage of the second driving transistor112, and Cox112is a gate capacitance of the second driving transistor112.

The drain current of the second driving transistor112in a saturation region can be regarded as being equivalent to the drain current of the first driving transistor111. That is, the luminance of the EL element120corresponds to the potential of a data signal.

Even when the EL element120deteriorates, a change in the value of current supplied to the EL element120can be prevented by driving the second driving transistor112in a saturation region.

Further, in the display device of this embodiment, when the first driving transistor111operates in a linear region and the maximum drain current of the second driving transistor112in a saturation region is Id112max, the drain current of the second driving transistor112is controlled by the first and second driving transistors111and112so that Id112maxsatisfies the following formula (3).

In the formula (3), L111is the channel length of the first driving transistor111, L112is the channel length of the second driving transistor112, W111is a channel width of the first driving transistor111, μ111is a field-effect mobility of the first driving transistor111, Vg111is a voltage between the gate and the source of the first driving transistor111, Vth111is a threshold voltage of the first driving transistor111, and Coxzis the sum of gate capacitances of the first and second driving transistors111and112.

The right side of the formula (3) is equivalent to a formula for obtaining the drain current of a third driving transistor in a saturation region in the case where the first and second driving transistor111and112inFIG. 1are correctively referred to as the third driving transistor, one of a source and a drain of the third driving transistor is connected to the first power supply line PSL1and the other of the source and the drain of the third transistor is connected to the other of the anode and the cathode of the EL element120, and the channel length of the third driving transistor is equal to the sum of the channel lengths of the first driving transistor111inFIG. 1and the second driving transistor112inFIG. 1.

In the display device of this embodiment, the first and second driving transistors111and112are formed in the same manufacturing step and have the same conductivity type. Accordingly, when the first and second driving transistors111and112have the same field-effect mobility and threshold voltage, the drain current of the second driving transistor112can be controlled to satisfy the formula (3) by appropriately setting the channel length of the first driving transistor111, the channel length of the second driving transistor112, the amplitude of a data signal, the values of the first to third power supply potentials VP1to VP3, and the like. For example, the drain current of the second driving transistor112is preferably controlled to satisfy the formula (3) by setting the value of the power supply potential VP3in accordance with the values of the channel length of the first driving transistor111, the channel length of the second driving transistor112, the amplitude of the data signal, and the first and second power supply potentials VP1and VP2. Note that the first driving transistor111may operate in a saturation region as long as the formula (3) is satisfied.

The EL element120emits light at luminance corresponding to the drain current of the second driving transistor112. In this case, the pixel circuit is in a light-emitting state (display state). By turning off the switch transistor110after that, the potential of the gate of the first driving transistor111can be retained; accordingly, the light-emitting state can be maintained.

The channel lengths of the first and second driving transistors111and112in the case where the formula (3) is satisfied are described. For the description, the display device of this embodiment is compared to a display device that is a comparison example.

First, a circuit configuration of a pixel circuit of the display device that is a comparison example is described with reference toFIG. 2.FIG. 2illustrates the circuit configuration of the pixel circuit.

As illustrated inFIG. 2, the display device that is a comparison example has a driving transistor211instead of the first and second driving transistors111and112inFIG. 1. In this case, the first power supply potential VP1is applied to one of a source and a drain of the driving transistor211. The other of the source and the drain of the driving transistor211is connected to the other of the anode and the cathode of the EL element120. A gate of the driving transistor211is connected to the other of the source and the drain of the switch transistor110.

Next, a change in drain current of the second driving transistor112inFIG. 1in the case of changing a voltage between the source and the drain (also referred to as drain voltage) and a change in drain current of the driving transistor211inFIG. 2in the case of changing a drain voltage are described with reference toFIGS. 3A and 3BandFIGS. 4A and 4B.FIGS. 3A and 3BandFIGS. 4A and 4Bshow calculation results of a change in drain current of the second driving transistor112inFIG. 1in the case of changing a drain voltage and a change in drain current of the driving transistor211inFIG. 2in the case of changing a drain voltage. InFIGS. 3A and 3BandFIGS. 4A and 4B, the horizontal axis and the vertical axis represent drain voltage and drain current, respectively. Note that the calculation is performed with SmartSpice ver. 3.16.12.R developed by Silvaco Data Systems Inc and the calculation model is a LEVEL=36 RPI model. The driving transistor211, the first driving transistor111, and the second driving transistor112in a saturation region have the same values of μ, Vth, and Cox in a formula to obtain current that are separately set on the basis of parameter conditions of calculation software. Each channel width of the driving transistor211, the first driving transistor111, and the second driving transistor112is 1 μm. InFIGS. 3A and 3BandFIGS. 4A and 4B, the drain voltage is in the range from −10 V to 2 V and the potential of the data signal is in the range from −0.6 V to 2 V. The drain currents of the driving transistor211and the second driving transistor112plotted in increments of 0.2 V are shown.

FIG. 3Ashows the drain current of the driving transistor211in the case where the channel length of the driving transistor211is 46.9 μm.FIG. 3Bshows the drain current of the second driving transistor112in the case where the channel lengths of the first driving transistor111and the second driving transistor112are 30.9 μm and 16 μm, respectively, and where the channel length of the driving transistor211is equal to the sum of the channel length of the first driving transistor111(L1) and the channel length of the second driving transistor112(L2). Other than the above, the driving transistor211has the same structure as the first driving transistor111. In calculations described with reference toFIGS. 3A and 3B, a value of the first power supply potential VP1and a value of the third power supply potential VP3are 2.1 V and 0.6 V, respectively. A value of the second power supply potential VP2is not changed in the calculations. In this case, for example, the top curve inFIG. 3Bat a drain voltage of 0.1 V or lower indicates a saturation region.

As shown inFIGS. 3A and 3B, when the channel length of the driving transistor211is equal to the sum of the channel lengths of the first and second driving transistors111and112, Id112max, which is the maximum value of the drain current of the second driving transistor112, is lower than Id211max, which is the maximum value of the drain current of the driving transistor211, in a saturation region. The reason is that the first driving transistor111operates in a linear region and the drain current of the first driving transistor111is lowered by the second driving transistor112. Therefore, even when the drain current of the second driving transistor112is reduced, the channel length is prevented from being lengthened.

FIG. 4Ashows the drain current of the second driving transistor112in the case where only a value of the third power supply potential VP3is changed, which differs from the calculation described with reference toFIG. 3B. In this case, the value of the third power supply potential VP3is 0.4 V.

As shown inFIG. 4A, even when the third power supply potential is changed, Id112max, which is the maximum value of the drain current of the second driving transistor112, is lower than Id211max, which is the maximum value of the drain current of the driving transistor211.

FIG. 4Bshows the drain current of the second driving transistor112in the case where the channel length of the second driving transistor112is longer than the channel length of the first driving transistor111, which differs from the calculation described with reference toFIG. 3B. In this case, the channel lengths of the first driving transistor111and the second driving transistor112are 16 μm and 30.9 μm, respectively. Accordingly, the channel length of the driving transistor211is equal to the sum of the channel lengths of the first and second driving transistors111and112.

As shown inFIG. 4B, Id112max, which is the maximum value of the drain current of the second driving transistor112inFIG. 1, is lower than Id211max, which is the maximum value of the drain current of the driving transistor211inFIG. 2, even when the channel length of the second driving transistor112is longer than the channel length of the first driving transistor111, and the channel length of the driving transistor211is equal to the sum of the channel lengths of the first and second driving transistors111and112. Therefore, even when the drain current of the second driving transistor112is lowered, the channel length is prevented from being lengthened.

FIGS. 3A and 3BandFIGS. 4A and 4Bprove that the channel length is prevented from being lengthened in the case where the maximum value of the drain current of the second driving transistor112in a saturation region satisfies the formula (3).

As described with reference toFIGS. 3A and 3BandFIGS. 4A and 4B, the drain current of the second driving transistor112is controlled by the first and second driving transistors111and112so that the maximum value of the drain current of the second driving transistor112in a saturation region satisfies the formula (3); as a result, the channel lengths of the first and second driving transistors111and112can be prevented from being lengthened even when the drain current of the second driving transistor112is reduced.

Next, a structural example of the display device in this embodiment will be described.

The display device of this embodiment includes a first substrate, a second substrate, and an electroluminescent element provided between the first and second substrates. The first substrate is provided with semiconductor elements such as the switch transistor110, the first driving transistor111, the capacitor130, and the second driving transistor112, and is also referred to as an active matrix substrate.

First, a structural example of an active matrix substrate of the display device of this embodiment is described with reference toFIGS. 5A and 5B.FIG. 5Ais a schematic plan view of a structural example of the active matrix substrate, andFIG. 5Bis a schematic cross sectional view thereof.FIG. 5Bis a schematic cross sectional view taken along line A-B inFIG. 5A. Note that the components illustrated inFIGS. 5A and 5Binclude those having sizes different from the actual sizes. For convenience,FIG. 5Bdoes not shows part of the active matrix substrate illustrated inFIG. 5A. A double wave line is a double break line.

The active matrix substrate illustrated inFIG. 5Aincludes a substrate510, an insulating layer511, semiconductor layers513aand513b, an insulating layer517, conductive layers518ato518d, an insulating layer519, and conductive layers520ato520d.

The insulating layer511is provided over one surface of the substrate510.

The insulating layer511functions as a base layer, for example.

The semiconductor layers513aand513bare provided over part of the insulating layer511.

The semiconductor layer513aincludes impurity regions514ato514dand an impurity region515. A channel formation region516aof the switch transistor110is provided between the impurity region514aand the impurity region514b. A channel formation region516bof the switch transistor110is provided between the impurity region514band the impurity region514c. The impurity region515is provided between the impurity region514cand the impurity region514d.

The semiconductor layer513bincludes impurity regions514eto514g. A channel formation region516cof the first driving transistor111is provided between the impurity region514eand the impurity region514f. A channel formation region516dof the second driving transistor112is provided between the impurity region514fand the impurity region514g. The channel length of the channel formation region516cis longer than that of the channel formation region516d.

The impurity regions514ato514gand the impurity region515are regions to which an impurity element imparting p-type conductivity is added. The impurity concentration of the impurity region515is higher than that of the impurity regions514ato514g. When a potential different from the first power supply potential VP1is supplied as a capacitor potential without a connection between the capacitor line CsL and the first power supply line PSL1, doping of the semiconductor layer513awith an impurity element can be omitted, and the capacitor130can be formed without the impurity region515. The semiconductor layer513afunctions as a channel formation layer of the switch transistor110and one of the pair of electrodes of the capacitor130. The semiconductor layer513bfunctions as a channel formation layer of the first driving transistor111and a channel formation layer of the second driving transistor112.

The insulating layer517is provided over the semiconductor layers513aand513b. The insulating layer517functions as a gate insulating layer of the switch transistor110, a gate insulating layer of the first driving transistor111, a gate insulating layer of the second driving transistor112, and a dielectric layer of the capacitor130.

The conductive layers518ato518dare provided over part of the insulating layer517.

The conductive layer518aoverlaps the channel formation regions516aand516bwith the insulating layer517laid therebetween. The conductive layer518afunctions as the gate of the switch transistor110.

The conductive layer518boverlaps the impurity region515with the insulating layer517laid therebetween. The conductive layer518bfunctions as the other of the pair of electrodes of the capacitor130.

The conductive layer518coverlaps the channel formation region516cwith the insulating layer517laid therebetween. The conductive layer518cfunctions as the gate of the first driving transistor111.

The conductive layer518doverlaps the channel formation region516dwith the insulating layer517laid therebetween. The conductive layer518dfunctions as the gate of the second driving transistor112.

The insulating layer519is provided over the insulating layer517with the conductive layers518ato518dlaid therebetween. The insulating layer519functions as a planarization layer.

The conductive layers520ato520dare provided over part of the insulating layer519.

The conductive layer520ais in contact with the impurity region514athrough a first opening penetrating the insulating layers517and519.

The conductive layer520bis in contact with the conductive layer518bthrough a second opening penetrating the insulating layer519. The conductive layer520bis in contact with the impurity region514ethrough a third opening penetrating the insulating layers517and519.

The conductive layer520cis in contact with the impurity region514dthrough a fourth opening penetrating the insulating layers517and519. The conductive layer520cis in contact with the conductive layer518cthrough a fifth opening penetrating the insulating layer519.

The conductive layer520dis in contact with the impurity region514gthrough a sixth opening penetrating the insulating layers517and519.

Further, a structural example of the display device of this embodiment is described with reference toFIG. 6.FIG. 6is a schematic cross sectional view showing a structural example of the display device of this embodiment. Note that the EL element120may emit light toward the top surface side of the display device; however, the EL element is not limited thereto, and may emit light toward the bottom surface side of the display device.

The display device illustrated inFIG. 6includes an insulating layer521, a conductive layer522, an insulating layer523, a light-emitting layer524, a conductive layer525, a substrate530, a coloring layer531, an insulating layer532, and an insulating layer540, in addition to the active matrix substrate illustrated inFIGS. 5A and 5B.

The insulating layer521is provided over the insulating layer519and the conductive layers520ato520d.

The conductive layer522is provided over the insulating layer521. The conductive layer522is in contact with the conductive layer520dthrough a seventh opening penetrating the insulating layer521. The conductive layer522functions as the anode of the EL element120. In the display device illustrated inFIG. 6, a capacitor can be formed using the conductive layer522, the insulating layer521, and the conductive layers520ato520d. In that case, a change in the first power supply potential VP1can be suppressed, for example.

The insulating layer523is provided over the conductive layer522.

The light-emitting layer524is in contact with the conductive layer522in an eighth opening provided for the insulating layer523. The light-emitting layer524functions as a light-emitting layer of the EL element120.

The conductive layer525is provided over a surface of the light-emitting layer524. The conductive layer525functions as the cathode of the EL element120.

The coloring layer531is provided on one plane of the substrate530. The coloring layer531functions as a color filter that transmits light with a particular wavelength of light emitted from the light-emitting layer524.

The insulating layer532is provided over the one plane of the substrate530with the coloring layer531laid therebetween.

The insulating layer540is provided between the insulating layer532and the conductive layer525.

Next, components will be described below.

Examples of the substrate510and the substrate530are a glass substrate, a silicon substrate, and a plastic substrate.

The insulating layer511can be, for example, a layer including an oxide insulating material or a layer including a material such as silicon oxide, silicon oxynitride, or silicon nitride oxide. The insulating layer511can be a stack of layers formed using materials that can be used for the insulating layer511.

The semiconductor layers513aand513bcan be, for example, a single crystal semiconductor layer or a single crystal silicon layer.

An example of a method for fabricating the semiconductor layers513aand513bis described below.

For example, a first semiconductor substrate and a second semiconductor substrate whose top surface is provided with the insulating layer are prepared. Note that an impurity element imparting n-type or p-type conductivity may be added to the first semiconductor substrate in advance. An oxide insulating layer or a nitride insulating layer may be formed over the first semiconductor substrate in advance.

For example, the insulating layer can be formed over the second semiconductor substrate by formation of an oxide insulating film by thermal oxidation, CVD, sputtering, or the like.

In addition, an ion beam including ions which are accelerated by an electric field enters the second semiconductor substrate, and a fragile region is formed in a region at a certain depth from a surface of the second semiconductor substrate. Note that the depth at which the fragile region is formed is adjusted by the kinetic energy, mass, electrical charge, or incidence angle of the ions, or the like.

For example, ions can be introduced into the semiconductor substrate with the use of an ion doping apparatus or an ion implantation apparatus.

As ions used for irradiation, for example, hydrogen and/or helium can be used. For example, in the case where irradiation is performed with hydrogen ions using an ion doping apparatus, the efficiency of irradiation of ions can be improved by increasing the proportion of H3+in the ions used for irradiation. Specifically, it is preferable that the proportion of H3+is higher than or equal to 50% (more preferably, higher than or equal to 80%) with respect to the total amount of H+, H2+, and H3+.

Further, the first semiconductor substrate and the second semiconductor substrate are attached to each other with the insulating layer which is provided on the second semiconductor substrate laid therebetween. Note that in the case where the first semiconductor substrate is also provided with an insulating layer, the first semiconductor substrate and the second semiconductor substrate are attached to each other with the insulating layer on the second semiconductor substrate and the insulating layer on the first semiconductor substrate laid therebetween. In that case, the insulating layers provided between the first semiconductor substrate and the second semiconductor substrate correspond to the insulating layer511.

Furthermore, heat treatment is performed so that the second semiconductor substrate is separated with the fragile region used as a cleavage plane. Thus, the semiconductor layer can be formed over the insulating layer511. Note that when a surface of the semiconductor layer is irradiated with laser light, the flatness of the surface of the semiconductor layer can be improved. Further, part of the semiconductor layer is etched, and accordingly, the semiconductor layers513aand513bcan be formed.

However, this embodiment is not limited thereto, and for example, a Smart Cut (registered trademark) method or a SIMOX method can be used to form the semiconductor layers513aand513b. Alternatively, the semiconductor layers513aand513bcan be semiconductor regions formed by provision of an insulating separation region in a single crystal semiconductor substrate.

The impurity regions514ato514gand the impurity region515are formed by, for example, addition of an impurity element imparting a conductivity type to the semiconductor layers513aand513b. For example, an impurity element imparting n-type conductivity (e.g., phosphorus) is added in the case of an n-channel transistor, and an impurity element imparting p-type conductivity (e.g., boron) is added in the case of a p-channel transistor.

The insulating layer517can be, for example, a layer including a material such as silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, aluminum oxide, aluminum nitride, aluminum oxynitride, aluminum nitride oxide, or hafnium oxide. The insulating layer517can be a stack of layers formed using materials that can be used for the insulating layer517.

Each of the conductive layers518ato518dcan be a layer containing a metal material such as molybdenum, titanium, chromium, tantalum, magnesium, silver, tungsten, aluminum, copper, neodymium, or scandium. Alternatively, each of the conductive layers518ato518dcan be a layer containing a conductive metal oxide. The conductive metal oxide can be, for example, a metal oxide such as indium oxide (In2O3), tin oxide (SnO2), zinc oxide (ZnO), indium tin oxide (In2O3—SnO2, which is abbreviated to ITO in some cases), or indium zinc oxide (In2O3—ZnO); or the metal oxide containing silicon, silicon oxide, or nitrogen. Alternatively, the conductive layers518ato518dcan be a stack of layers formed using materials that can be used for the conductive layers518ato518d.

The insulating layer519can be, for example, a layer containing a material such as silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, aluminum oxide, aluminum nitride, aluminum oxynitride, aluminum nitride oxide, or hafnium oxide. The insulating layer519can be a stack of layers formed using materials that can be used for the insulating layer519.

Each of the conductive layers520ato520dcan be a layer containing a metal material such as molybdenum, titanium, chromium, tantalum, magnesium, silver, tungsten, aluminum, copper, neodymium, ruthenium, or scandium. Alternatively, each of the conductive layers520ato520dcan be a layer containing a conductive metal oxide. The conductive metal oxide can be, for example, a metal oxide such as indium oxide (In2O3), tin oxide (SnO2), zinc oxide (ZnO), indium tin oxide (In2O3—SnO2, which is abbreviated to ITO in some cases), or indium zinc oxide (In2O3—ZnO); or the metal oxide containing silicon, silicon oxide, or nitrogen. Alternatively, the conductive layers520ato520dcan be a stack of layers formed using materials that can be used for the conductive layers520ato520d.

The insulating layer521can be an organic insulating layer or an inorganic insulating layer, for example.

The conductive layer522can be a layer containing a metal material such as molybdenum, titanium, chromium, tantalum, magnesium, silver, tungsten, aluminum, copper, neodymium, ruthenium, or scandium. Alternatively, the conductive layer522can be a stack of layers formed using materials that can be used for the conductive layer522.

The insulating layer523can be an organic insulating layer or an inorganic insulating layer, for example.

The light-emitting layer524can be, for example, a light-emitting layer using a light-emitting material which emits light of a specific color. The light-emitting layer524can also be formed using a stack of light-emitting layers which emit light of different colors. The light-emitting material can be an electroluminescent material such as a fluorescent material or a phosphorescent material. Alternatively, the light-emitting material can be formed by a material containing a plurality of electroluminescent materials. For example, a light-emitting layer emitting white light may be formed by a stack of a layer of a fluorescent material emitting blue light, a layer of a first phosphorescent material emitting orange color, and a layer of a second phosphorescent material emitting orange color. Alternatively, the electroluminescent material can be an organic electroluminescent material or an inorganic electroluminescent material. Further, in addition to the light-emitting layer, the electroluminescent layer may include one or more of a hole injection layer, a hole transport layer, an electron injection layer, and an electron transport layer.

The conductive layer525can be, for example, a light-transmitting layer that contains a metal oxide. The metal oxide can be, for example, a metal oxide such as indium oxide (In2O3), tin oxide (SnO2), zinc oxide (ZnO), indium tin oxide (In2O3—SnO2, which is abbreviated to ITO in some cases), or indium zinc oxide (In2O3—ZnO); or the metal oxide containing silicon, silicon oxide, or nitrogen. Alternatively, the conductive layer525can be a stack of layers formed using materials that can be used for the conductive layer525.

The coloring layer531can be, for example, a layer which contains dye or pigment and which transmits light with the wavelength range of red, light with the wavelength range of green, or light with the wavelength range of blue. Alternatively, the coloring layer531can be formed using a layer which transmits cyan light, magenta light, or yellow light and which contains dye or pigment. When containing dye, the coloring layer531is formed by a photolithography method, a printing method, or an inkjet method, for example. When containing pigment, the coloring layer531is formed by a photolithography method, a printing method, an electrodeposition method, an electrophotographic method, or the like. By using the inkjet method, for example, the coloring layer can be manufactured at room temperature, manufactured at a low vacuum, or formed over a large substrate. Since the coloring layer can be manufactured without a resist mask, manufacturing cost and the number of steps can be reduced.

The insulating layer532can be a layer of a material which can be used for the insulating layer517, for example. Alternatively, the insulating layer532can be a stack of layers formed using materials which can be used for the insulating layer532. Note that the insulating layer532is not necessarily provided, but providing the insulating layer532can suppress the entry of an impurity from the coloring layer531to the EL element120.

The insulating layer540can be a layer of a resin material, for example. Alternatively, the insulating layer540can be a stack of layers formed using materials that can be used for the insulating layer540.

As shown inFIGS. 5A, 5B, and 6, the display device of this embodiment includes the EL element120that emits monochromatic light with a predetermined color as the EL element120and the coloring layer that transmits light with a particular wavelength of light emitted from the EL element120. With this structure, a full-color image can be displayed without the plurality of EL elements120emitting light of different colors, which facilitates the manufacturing process and enhances yield. For example, the EL elements120can be formed without a metal mask, and therefore, a manufacturing process can be simple. Further, contrast of an image can be improved. Further, the quality and reliability of the EL elements120can be improved.

In the display device in this embodiment, the EL element120has a structure in which light is extracted through a substrate provided with no element such as a transistor, so that a region above a region provided with the element can be used as a light-emitting region; therefore, an aperture ratio can be improved.

The structural example of the display device of this embodiment is described usingFIG. 7.FIG. 7is a block diagram illustrating the structural example of the display device of this embodiment.

A display device illustrated inFIG. 7has a plurality of pixel circuits910arranged in X rows and Y columns (X and Y are natural numbers greater than or equal to 2), first to Y-th data signal lines DL_1to DL_Y, first to X-th gate signal lines GL_1to GL_X, a first power supply line PSL1, a second power supply line PSL2, and a third power supply line PSL3.

Each of the plurality of pixel circuits910employs the circuit configuration illustrated inFIG. 1here, as an example. For example, one pixel is composed of three pixel circuits910for displaying red (R), green (G), and blue (B). The horizontal resolution of the display device of this embodiment is preferably 800 ppi or more, preferably 800 ppi or more and 1000 ppi or less, for example.

In this case, in each of the plurality of pixel circuits910, one of the source and the drain of the switch transistor110is connected to one of the first to Y-th data signal lines DL_1to DL_Y. The gate of the switch transistor110is connected to one of the first to X-th gate signal lines GL_1to GL_X.

One of the source and the drain of the first driving transistor111is connected to the first power supply line PSL1.

The other of the pair of electrodes of the capacitor130is connected to the first power supply line PSL1through the capacitor line CsL.

One of the anode and the cathode of the EL element120is connected to the second power supply line PSL2.

The gate of the second driving transistor112is connected to the third power supply line PSL3.

The potentials of the first to Y-th data signal lines DL_1to DL_Y are controlled by a driver circuit901. The driver circuit901can be formed using an analog switch, a latch circuit, and an operation amplifier, for example.

The potentials of the first to X-th gate signal lines GL_1to GL_X are controlled by a driver circuit902. Note that the driver circuit902and the pixel circuit910may be formed over one substrate in the same manufacturing step. The driver circuit902can be formed using a shift register, for example.

The first power supply potential VP1applied to the first power supply line PSL1, the second power supply potential VP2applied to the second power supply line PSL2, and the third power supply potential VP3applied to the third power supply line PSL3can be generated in a power supply circuit903. A power supply voltage is supplied to the driver circuits901and902with the power supply circuit903. Note that the power supply circuit903may be formed over a substrate different from that of the pixel circuit910and connected by a wiring or the like.

An electrical connection of each of the plurality of pixel circuits910to the third power supply line PSL3removes the necessity of an additional driver circuit and the like; accordingly, the circuit configuration can be simple.

As described with reference toFIG. 7, each of the plurality of pixel circuits910is electrically connected to the third power supply line to supply the common third power supply potential in the display device of this embodiment. With this configuration, the value of current supplied to the EL element120can be controlled by the second driving transistor112in each pixel circuit910without an additional driver circuit and the like.

In this embodiment, examples of an electronic device in which a housing is provided with a panel formed using the display device described in Embodiment 1 will be described with reference toFIGS. 8A to 8D.

An electronic device illustrated inFIG. 8Ais an example of a personal digital assistant.

The electronic device illustrated inFIG. 8Ahas a housing1011and a panel1012, a button1013, and a speaker1014that are provided for the housing1011.

Note that the housing1011may be provided with a connection terminal for connecting the electronic device illustrated inFIG. 8Ato an external device and/or a button used to operate the electronic device illustrated inFIG. 8A.

The panel1012functions as a display panel and a touch panel. The panel1012can be a panel formed by superposing a touch panel on the display device described in Embodiment 1.

The button1013is provided for the housing1011. For example, when a power button functions as the button1013, the electronic device can be turned on or off by pressing the button1013.

The speaker1014is provided for the housing1011. The speaker1014has a function of outputting sound.

Note that the housing1011may be provided with a microphone, in which case the electronic device illustrated inFIG. 8Acan function as a telephone.

The electronic device illustrated inFIG. 8Afunctions as one or more of a telephone set, an e-book reader, a personal computer, and a game machine, for example.

An electronic device illustrated inFIG. 8Bis an example of a folding digital assistant.

The electronic device illustrated inFIG. 8Bhas a housing1021a, a housing1021b, a panel1022aprovided for the housing1021a, a panel1022bprovided for the housing1021b, a hinge1023, a button1024, a connection terminal1025, a storage media inserting portion1026, and a speaker1027.

The housing1021aand the housing1021bare connected by the hinge1023.

The panels1022aand1022beach function as a display panel and a touch panel. Each of the panels1022aand1022bcan be a panel formed by superposing a touch panel on the display device described in Embodiment 1.

Since the electronic device illustrated inFIG. 8Bhas the hinge1023, the housing1021aor the housing1021bcan be moved to overlap the housing1021awith the housing1021b, for example; that is, the electronic device can fold.

The button1024is provided for the housing1021b. Note that the housing1021amay be provided with the button1024. For example, when the button1024which functions as a power button is provided and pushed, whether power is supplied to circuits in the electronic device can be controlled.

The connection terminal1025is provided for the housing1021a. Note that the housing1021bmay be provided with the connection terminal1025. Alternatively, a plurality of connection terminals1025may be provided for one or both of the housings1021aand the housing1021b. The connection terminal1025is a terminal for connecting the electronic device illustrated inFIG. 8Bto another device.

The storage media inserting portion1026is provided for the housing1021a. Note that the storage medium insertion portion1026may be provided for the housing1021b. Alternatively, the plurality of recording medium insertion portions1026may be provided for one or both of the housings1021aand1021b. For example, a card-type recording medium is inserted into the storage media inserting portion so that data can be read to the electronic device from the card-type recording medium or data stored in the electronic device can be written to the card-type recording medium.

The speaker1027is provided for the housing1021b. The speaker1027has a function of outputting sound. Note that the speaker1027may be provided for the housing1021ainstead of the housing1021b.

Note that the housing1021aor1021bmay be provided with a microphone, in which case the electronic device illustrated inFIG. 8Bcan function as a telephone.

The electronic device illustrated inFIG. 8Bfunctions as one or more of a telephone set, an e-book reader, a personal computer, and a game machine, for example.

An electronic device illustrated inFIG. 8Cis an example of a stationary information terminal. The stationary information terminal illustrated inFIG. 8Chas a housing1031, and a panel1032, a button1033, and a speaker1034that are provided for the housing1031.

The panel1032functions as a display panel and a touch panel. The panel1032can be a panel formed by superposing a touch panel on the display device described in Embodiment 1.

Note that the panel1032can be provided for a deck portion1035of the housing1031.

The housing1031may be provided with one or more of a ticket slot from which a ticket or the like is dispensed, a coin slot, and a bill slot.

The button1033is provided for the housing1031. For example, when the button1033which functions as a power button is provided and pushed, whether power is supplied to circuits in the electronic device can be controlled.

The speaker1034is provided for the housing1031. The speaker1034has a function of outputting sound.

The electronic device illustrated inFIG. 8Cfunctions as, for example, an automated teller machine, an information communication terminal for buying tickets or the like (also referred to as a multi-media station), or a game machine.

FIG. 8Dillustrates an example of a stationary information terminal. The electronic device illustrated inFIG. 8Dhas a housing1041, and a panel1042, a button1044, a connection terminal1045, and a speaker1046that are provided for the housing1041, and a support base1043supporting the housing1041.

Note that a connection terminal for connecting the housing1041to an external device and/or a button used to operate the electronic device illustrated inFIG. 8Dmay be provided.

The panel1042functions as a display panel. The panel1042can be the display device in Embodiment 1. The panel1042may also function as a touch panel by superposing a touch panel on the display device described in Embodiment 1.

The button1044is provided for the housing1041. For example, when the button1044which functions as a power button is provided and pushed, whether power is supplied to circuits in the electronic device can be controlled.

The connection terminal1045is provided for the housing1041. The connection terminal1045is a terminal for connecting the electronic device illustrated inFIG. 8Dto another device. For example, connecting the electronic device illustrated inFIG. 8Dand a personal computer with the connection terminal1045enables the panel1042to display an image corresponding to a data signal input from the personal computer. For example, when the panel1042of the electronic device illustrated inFIG. 8Dis larger than a panel of an electronic device connected thereto, a displayed image of the electronic device can be enlarged, in which case a plurality of viewers can recognize the image at the same time with ease.

The speaker1046is provided for the housing1041. The speaker1046has a function of outputting sound.

The electronic device illustrated inFIG. 8Dfunctions as, for example, an output monitor, a personal computer, or a television set.

As described with reference toFIGS. 8A to 8D, a panel of an electronic device can have high definition by employing the display device in Embodiment 1.

This application is based on Japanese Patent Application serial no. 2011-260573 filed with Japan Patent Office on Nov. 29, 2011, the entire contents of which are hereby incorporated by reference.