Switched current temperature sensing circuit and method to correct errors due to beta and series resistance

A switched current temperature sensing circuit comprises a BJT arranged to conduct a forced emitter current IE of the form Ifixed+(Ifixed/β), such that the base current is given by Ifixed/β and the collector current is given by Ifixed+(Ifixed/β)−(Ifixed/β)=Ifixed. Base current Ifixed/β is mirrored to the emitter, and a current source provides current Ifixed, which is switched between at least a first value I and a second value N*I such that the BJT's base-emitter voltage has a first value Vbe1 when Ifixed=I and a second value Vbe2 when Ifixed=N*I, such that:ΔVbe12=Vbe1−Vbe2=(nFkT/q)(ln N),where nF is the BJT's emission coefficient, k is Boltzmann's constant, T is absolute temperature, and q is the electron charge.

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates to the field of temperature sensing circuits, and particularly to circuits which force multiple emitter currents through a bipolar transistor to sense temperature.

2. Description of the Related Art

Bipolar transistors (BJTs) are frequently used as thermal sensing devices, since a BJT's base-emitter voltage (Vbe) varies with temperature in accordance with:
Vbe=nFkT/q*ln(IC/IS)
where nFis the BJT's emission coefficient, k is Boltzmann's constant, T is absolute temperature, q is the electron charge, ICis the collector current, and ISis the saturation current. For integrated circuits (ICs) fabricated using standard bulk CMOS processes, it is particularly convenient to use substrate PNP (SPNP) transistors to sense temperature. These SPNP devices can be located, for example, on a remote die (e.g., a CPU) which is intended to have its temperature measured by another circuit located on a separate die (e.g., an ASIC).

Methods of employing BJTs to sense temperature are described, for example, in U.S. Pat. Nos. 5,195,827, 5,982,221, and 6,097,239. These references, which employ one or more PNP transistors as thermal sensors, force two or more emitter currents which are in a fixed ratio (N) to each other (I, N*I) to create two ratioed collector currents (IC, ICN). When so doing, the above non-linear equation is simplified such that the temperature of the BJT is a linear function of absolute temperature (T). Assuming N=ICN/IC:
VBEN−VBE1=ΔVBE=(nFkT/q)ln(ICN/IC), and
VBEN−VBE1=ΔVBE=(nFkT/q)ln(N),
where VBENand VBE1are the BJT's base-emitter voltages for emitter currents of N*I and I, respectively.

However, though the ratio of emitter currents may be fixed, the ratio of the resulting collector currents depends on the BJT's beta value (β)—which varies with collector current and temperature. Thus, the accuracy of the measured temperature using this method depends on the ratio of the emitter currents, and the β value of the BJT and its variation. Assuming that two currents (I and N*I) are forced into the emitter of a SPNP transistor:

for emitter current I, collector current IC=βI/(β+1);

for emitter current N*I, ICN=N*βNI/(βN+1).

If βN=β+Δβ=β(1±ε), and ε=Δβ/β, and assuming βN=β(1+ε):
ΔVBE=(nFkT/q)[ln(ICN/IC)]  [Eq. 1a]
and
ΔVBE=(nFkT/q){ln[[((1+ε)(β+1))/(1+ε)β+1)]*N]}, where ε=Δβ/β.  [Eq. 1b]
From equation 1, it is clear that β errors affect the ratio of collector currents and therefore the measured ΔVBEvoltage used to compute the device temperature. In addition, the accuracy of the temperature measurement may be reduced by ohmic resistances associated with the BJT, specifically its base and emitter resistances.

One method to solve equation 1a is to measure ICNand ICby simply subtracting the return base current from the forced emitter current, with IC=IE−IBand ICN=IEN−IBN. Once the two collector currents are measured, their ratios can be calculated. Another method is to force IEand measure IC=IE−IB. Then, force IENuntil ICN=N*ICwhere ICNis measured as ICN=IEN−IBN. These methods are considered indirect methods, as the multiplied version of IC(i.e., ICN=N*IC) is obtained by forcing an emitter current and measuring the collector current indirectly as IC=IE−IBusing a separate circuit.

SUMMARY OF THE INVENTION

A switched current temperature sensing circuit is presented which overcomes the problems noted above, largely eliminating β and series resistance-related temperature measurement errors.

The present temperature sensing circuit comprises a single BJT, suitably a SPNP, arranged to conduct a forced emitter current IEof the form Ifixed+(Ifixed/β), where β is the BJT's β value, such that the BJT's base current is given by Ifixed/β and its collector current is given by Ifixed+(Ifixed/β)−(Ifixed/β)=Ifixed. A current mirror circuit is arranged to mirror the base current Ifixed/β to the emitter, and a current source provides current Ifixed. In operation, current Ifixedis switched between a first value I and a second value N*I, such that the BJT's base-emitter voltage Vbehas a first value Vbe1when Ifixed=I and a second value Vbe2when Ifixed=N*I, such that:
ΔVbe21=Vbe2−Vbe1=(nFkT/q)(ln N),
where nFis the BJT's emission coefficient, k is Boltzmann's constant, T is absolute temperature, and q is the electron charge. In this way, errors due to variations in the BJT's β value are eliminated. The present invention can also be implemented so as to eliminate temperature measurement errors that might otherwise arise due to base and/or emitter resistances associated with the BJT.

Further features and advantages of the invention will be apparent to those skilled in the art from the following detailed description, taken together with the accompanying drawings.

DETAILED DESCRIPTION OF THE INVENTION

The present invention provides a switched current temperature sensing circuit and method which operates by forcing multiple emitter currents through a BJT to sense temperature. The invention largely eliminates measurement errors that might otherwise arise due to β variations, and can also be configured to eliminate temperature measurement errors that might otherwise arise due to base and/or emitter resistances associated with the BJT.

The basic principles of the invention are illustrated inFIG. 1. A single BJT10serves as the temperature sensing transistor. BJT10is shown here as a PNP, although the invention could alternatively be configured to employ an NPN. BJT10is suitably a SPNP, though this is not essential. The temperature sensing circuit also includes current forcing circuitry12, which is arranged to sequentially force at least two emitter currents, each of which results in a collector current that is independent of the BJT's β value. This is accomplished by providing an emitter current IEwhich is not necessarily fixed, but rather is of the form IE=Ifixed+Ifixed/β, where Ifixedcan be set to one of at least two different fixed current values, and β is the β value of BJT10at each Ifixedvalue; thus, IEwill vary with β. Due to the inherent properties of a BJT, providing a forced emitter current of this form results in a base current IBgiven by Ifixed/β, and a collector current ICbeing given by Ifixed+Ifixed/β−Ifixed/β=Ifixed.

Current forcing circuitry12is arranged to sequentially provide at least two values of Ifixed. At a minimum, Ifixedvalues of I and N*I are provided. A BJT's β value varies with collector current, so the β of BJT10has a first value (β1) when Ifixed=I and a second value (β2) when Ifixed=N*I. When Ifixedis set equal to I,
IE=I+I/β1,
IB=I/β1, and
IC=I+I/β1−I/β1=I. Under these conditions, the BJT has a Vbevoltage identified as Vbe1. When Ifixedis set equal to N*I,
IE=(N*I)+(N*I)/β2,
IB=(N*I)/β2,
IC=(N*I)+(N*I)/β2−(N*I)/β2=I, and
Vbe=Vbe2. Thus, for both forced emitter currents, collector current ICis independent of β, and thus is immune to any variations in the BJT's β value. Sequentially occurring currents are denoted on the figures using the form “A,B”; note that currents B could follow currents A, or vice versa.

When so arranged, a ΔVbe21value can be calculated from Vbe1and Vbe2, as follows:
ΔVbe21=Vbe2−Vbe1=(nFkT/q)(ln N),  [Eq. 2]
where nFis the BJT's emission coefficient, k is Boltzmann's constant, T is absolute temperature in degrees Kelvin, and q is the electron charge. Thus, by measuring ΔVbe21and knowing N, a value for T can be calculated which is immune from error that might otherwise arise as a result of variations in the BJT's β value.

One way in which an emitter current of the form IE=Ifixed+Ifixed/β can be forced is shown inFIG. 2. Here, current forcing circuitry12comprises a current mirror circuit which mirrors the BJT's base current IBback to its emitter, and a current source13which provides the at least two Ifixedvalues. In this exemplary embodiment, the current mirror circuit comprises a lower mirror14and an upper mirror16. Lower mirror14receives IBat its input18and mirrors it via its output20to the input22of upper mirror16. Upper mirror16mirrors the current received from lower mirror14via its output24to the BJT's emitter.

In this illustration, current source13is arranged to provide two values of Ifixed: I and N*I. These currents are summed with the output of upper mirror16to provide the required forced emitter currents of the form IE=Ifixed+Ifixed/β. Thus, when Ifixed=I, base current IB=I/β1, which is mirrored by the lower and upper mirrors to provide the I/β1portion of the forced current, such that IE=I+I/β1. Then when Ifixed=N*I, base current IB=(N*I)/β2, which is mirrored by the lower and upper mirrors to provide the (N*I)/β2portion of the forced current, such that IE=(N*I)+(N*I)/β2.

FIG. 3depicts one possible implementation of the embodiment shown inFIG. 2. Here, current source13is made from two fixed current sources, each of which provides a different output current, and a switch which is operated to select one or the other of the fixed output currents as the current source's output Ifixed. In this example, one of the fixed current sources would output current I and the other would output current N*I. Lower mirror14is made from a diode-connected FET26and a FET28, and upper mirror16comprises diode-connected FET30and a FET32. The mirrors should be arranged such that the ratio of the current at upper mirror output24to the current at lower mirror input18is 1:1.

As noted above, the invention requires that current source13provide at least two values of Ifixed. Note that more than two currents will be preferred in some applications (discussed below). Further note that the implementation of current source13shown inFIG. 3is merely exemplary; there are numerous methods by which two or more currents could be produced as required by the present invention.

An alternative arrangement for current forcing circuitry12is shown inFIG. 4. Here, the output of current source13is connected to the base of BJT10rather than the emitter. As before, current source13provides at least two values of Ifixed, shown in this example as I and N*I. For this arrangement, the current that gets mirrored by the lower and upper mirrors is the sum of the Ifixedand Ibcurrents, such that the forced emitter currents are exactly as before: I+I/β1when Ifixed=I and (N*I)+(N*I)/β2when Ifixed=N*I.

Another possible implementation for current forcing circuitry12is shown inFIG. 5a. Here, the current mirror circuit includes an operational amplifier40having differential inputs connected to nodes42and44, respectively. Nodes42and44are coupled to a circuit common point45, typically ground, via elements46and48, respectively; elements46and48may be diodes, diode-connected transistors, or resistors. The base of BJT10is connected to node42. The output of amplifier40is provided to the input of a current mirror50, which includes an input FET51, one output FET52connected to mirror the current from amplifier40to the emitter of BJT10, and another output FET54connected to mirror the current from amplifier40to node44.

In operation, element46conducts the base current of BJT10, with the resulting voltage at node42applied to one input of amplifier40. Amplifier40operates such that its output causes the current provided by output FET54and conducted by element48to develop a voltage at node44equal to that at node42. If elements46and48are matched, the current provided by output FET54—as well as the current provided by output FET52to the emitter of BJT10—will be equal to the BJT's base current.

A chopping network60might be employed between nodes42and44and elements46and48, to eliminate errors that might arise due to mismatches between elements46and48. Amplifier40might also be chopped in order to reduce its offset voltage and errors on the mirror, and mirror50might be chopped to further reduce mismatch errors.

An alternate version of the embodiment shown inFIG. 5ais shown inFIG. 5b. This implementation is similar to that ofFIG. 5a, except here the output of amplifier40is provided to the gate of a FET55, which has its drain connected to the input FET56of a mirror57, and its source connected to node44. Mirror57includes an output FET58connected to mirror the current in FET56to the emitter of BJT10. Amplifier40operates such that its output causes the current conducted by FET55and element48to develop a voltage at node44equal to that at node42; the current conducted by FET55is mirrored by mirror57to the emitter of BJT10. If elements46and48are matched, the current conducted by FET55—as well as the current provided by output FET58to the emitter of BJT10—will be equal to the BJT's base current. As inFIG. 5a, a chopping network60might be employed between nodes42and44and elements46and48, to eliminate errors that might arise due to mismatches between elements46and48, and amplifier40and mirror57might also be chopped.

As shown inFIG. 6, the present invention would typically be connected to circuitry70capable of receiving Vbe1and Vbe2and producing an output (Vout) which varies with ΔVbe21. A basic implementation of circuitry70is shown inFIG. 6; other examples are found, for example, in U.S. Pat. No. 5,982,221 and U.S. Pat. No. 6,097,239.

The present invention is preferably arranged such that the collector currents resulting from the emitter currents forced into the device follow Shockley's equation (VBE=nFkT/q*ln(IC/IS)). At high level injection, emission coefficient nFmay differ from its value in the low level injection region. The forced currents should be selected to ensure that nFremains relatively unchanged as the currents are scaled.

As noted above, the accuracy of the temperature measurement may be reduced by ohmic resistances associated with the BJT, specifically its base and emitter resistances RBand RE, respectively. These resistances may be considered to include both the internal resistances inherent in the device, and the resistances associated with connecting lines. Resistances RBand REaffect the BJT's Vbeas follows:
VBE=nFkT/q*ln(IC/IS)+RE*IE+RB*IB.  [Eq. 3]
When Ifixedis set equal to I and N*I as described above, the effect of the resistances on ΔVbe21is as follows:
ΔVbe21=nFkT/q*ln(IC2/IC1)+{(RE2IE2−RE1IE1)++(RB2IB2−RB1IB1)}  [Eq. 4],
where IC1=I, IC2=N*I, IE1=I+I/β1, IE2=(N*I)+(N*I)/β2, IB1=I/β1and IB2=(N*I)/β2, and where all terms with subscripts “1” or “2” refer to values when Ifixed=I or Ifixed=N*I, respectively. Since implementing the invention as described above forces the collector currents to scale without β errors, the nFkT/q*ln(IC2/IC1) term in equation 4 is independent of β and series resistance; however the remainder of the equation is not.

Assuming the series resistances are largely independent of current densities, RE==RE2==RE1and RB==RB2==RB1; the β terms, however, are still dependent on current densities and temperature. Substituting:
ΔVbe21=nFKT/q*ln N+{RE(IE2−IE1)+RB(IB2IB1)},  [Eq. 5]
and
ΔVbe21=nFKT/q*ln N+{RE[(N*I+N*I/β2)−(I+I/β1)]++RB(N*I/β2−I/β1)}.  [Eq. 6]

‘I’ is a common multiplier, so that equation 6 can be rewritten as follows:
ΔVbe21=nFKT/q*ln N+{RE[(N+N/β2)−(1+1/β1)]++RB(N/β2−1/β1)}*I.[Eq. 7]

If ‘I’ is scaled again by setting Ifixedequal to two more currents I3=a*I and I4=a*N*I in accordance with the method described above (yielding base-emitter voltages Vbe3and Vbe4, respectively), where ‘a’ causes a small enough change such that β3≈β1and β4≈β2(e.g., 1<a<2), then:
ΔVbe43=Vbe4−Vbe3=nFKT/q*ln N+{RE[(N+N/β2)−(1+1/β1)]++RB(N/β2−1/β1)}*a*I.[Eq. 8]
If ΔVbe21is subtracted from ΔVbe12:
ΔVbe43−ΔVbe21={RE[(N+N/β2)−(1+1/β1)]++RB(N/β2−1/β1)}*(a−1)*I.[Eq. 9]
Equation 9 is a multiple of the second term of equation 7, with the multiple being (a−1).

If equation 10 is subtracted from equation 7.1, then:
ΔVbe21−{b*(ΔVbe43−ΔVbe21)}=nFKT/q*ln N.  [Eq. 11]
Thus, to make a temperature determination which is independent of β and series resistance:

a first set of emitter currents are sequentially forced, with Ifixedset equal to I and N*I, to produce Vbe1, Vbe2, and ΔVbe21=Vbe2−Vbe1values;

a second set of emitter currents are sequentially forced, with Ifixedset equal to a*I and a*N*I, to produce Vbe3, Vbe4, and ΔVbe43=Vbe4−Vbe3values;

value b=1/(a−1) is computed; and

Equation 11 is solved for T.

One possible circuit implementation for performing this method is shown inFIG. 7. The configuration is similar to those described above, except here current source13is capable of sequentially providing four Ifixedvalues: I, N*I, a*I and a*N*I in this example.

For eliminating errors due to large series resistance values, a six current technique may be employed. Assume Ifixedis set to a first set of three currents (I, N*I, M*I), which give rise to respective β values (β1, β2, β3) when applied to a BJT. Then:
ΔVBE21=nFKT/q*ln(IC2/IC1)+{(RE2IE2−RE1IE1)++(RB2IB2−RB1IB1)}, and
ΔVBE31=nFKT/q*ln(IC3/IC1)+{(RE3IE3−RE1IE1)++(RB3IB3−RB1IB1)}
where IC1=I, IC2=N*I, IC3=M*I, IE1=I+I/β1, IE2=(N*I)+(N*I)/β2, IE3=(M*I)+(M*I)/β3, IB1=I/β1, IB2=(N*I)/β2, IB3=(M*I)/β3, ΔVBE21=VBE2−VBE1, ΔVBE31=VBE3−VBE1, and where all terms with subscripts “1”, “2”, or “3” refer to values when Ifixed=I, Ifixed=N*I, or Ifixed=M*I, respectively.

In general:
IC2/IC1={[β2/(β2+1)]/[β1/(β1+1)]}*N, and
IC3/IC1={[β3/(β3+1)]/[β1/(β1+1)]}*M.
However, if β is not constant due to the characteristics of the BJT, the present invention can be used to ensure that (IC3/IC1)=M and (IC2/IC1)=N, which would result in the following:
ΔVBE21=nFKT/q*ln N+{RE(IE2−IE1)+RB(IB2−IB1)}, and
ΔVBE31=nFKT/q*ln M+{RE(IE3−IE1)+RB(IB3−IB1)}.
The ratios of IE2/IE1, IE3/IE1and respectively IB2/IB1, IB3/IB1are unknown because β is not constant. In accordance with the invention, the BJT's emitter and base currents are modified automatically by the mirror circuitry in order to guarantee that the collector current is a replica of the forced currents I, N*I and M*I. Assuming RE3==RE2==RE1and RB3==RB2==RB1and rewriting:
ΔVBE21=nFKT/q*ln N+{RE[(N+N/β2)−(1+1/β1)]++RB(N/β2−1/β1)}*I,[Eq. 12.1]
ΔVBE31=nFKT/q*ln M+{RE[(M+M/β3)−(1+1/β1)]++RB(M/β3−1/β1)}*I.[Eq. 12.2]
Subtracting Eq. 12.1 from Eq. 12.2, we have:
ΔVBE31−ΔVBE21=nFKT/q*(ln M−ln N)+{RE[(M+M/β3)−(N+N/β2)]++RB(M/β3−N/β2)}*I.[Eq. 12.3]

Thus, to make a temperature determination which is independent of β and series resistance when there is a large series resistance:

a first set of three emitter currents are sequentially forced, with Ifixedset equal to I, N*I, and M*I, to produce Vbe1, Vbe2, Vbe3, ΔVbe21=Vbe2−Vbe1and ΔVbe31=Vbe3−Vbe1values;

a second set of three emitter currents are sequentially forced, with Ifixedset equal to a*I, a*N*I, and a*M*I to produce Vbe4, Vbe5, Vbe6, ΔVbe54=Vbe5−Vbe4and ΔVbe64=Vbe6−Vbe4values;

value b=1/(a−1) is computed; and

Equation 12.7 is solved for T.

Note that the embodiments shown inFIGS. 1–8are merely exemplary. There are many ways in which current forcing circuitry12could be implemented to provide a forced emitter current IEof the form Ifixed+Ifixed/β, thereby enabling β-related temperature measurement errors to be largely eliminated as described herein.