METHOD FOR MANUFACTURING SEMICONDUCTOR LIGHT-EMITTING DEVICE PACKAGE, SEMICONDUCTOR LIGHT-EMITTING DEVICE PACKAGE MANUFACTURED THEREBY, AND DISPLAY DEVICE COMPRISING SAME

Embodiments relate to a method for manufacturing a semiconductor light emitting device package, a semiconductor light emitting device package manufactured by the method, and a display device including the same. The semiconductor light emitting device package according to the embodiment can include a first semiconductor layer on a growth substrate, a tether layer on the first semiconductor layer, a light emitting structure on the tether layer, a light-transmitting electrode layer on the light-emitting structure, and a post structure on the light-transmitting electrode layer.

TECHNICAL FIELD

Embodiment relates to a method for manufacturing a semiconductor light emitting device package, a semiconductor light emitting device package manufactured by the method, and a display device including the same.

BACKGROUND ART

Technologies for implementing large-area displays include liquid crystal displays (LCD), OLED displays, and Micro-LED displays.

A micro-LED display is a display using a micro-LED, which is a semiconductor light emitting device having a diameter or cross-sectional area of 100 μm or less, as a display device.

Since the micro-LED display uses micro-LED, which is a semiconductor light emitting device, as a display device, micro-LED displays have excellent performance in many characteristics, such as contrast ratio, response speed, color reproduction rate, viewing angle, brightness, resolution, lifespan, luminous efficiency or luminance.

In particular, the micro-LED display has the advantage of being able to freely adjust the size or resolution as the screen can be separated and combined in a modular manner, and can implement a flexible display.

However, since a large-scale micro-LED display requires millions of micro-LEDs, there is a technical problem in that it is difficult to quickly and accurately transfer micro-LEDs to a display panel.

Recently developed transfer technology includes a pick and place process, a laser lift-off method (LLD), or a self-assembly method.

On the other hand, LED chips applied to high-resolution displays such as AR and VR are being miniaturized in size, and conventional pick-and-place techniques have problems with transfer and transmission, there is a need for a technology to efficiently transfer and transmit a subminiature LED chip.

Also, in the prior art, a metal process for forming an electrode layer is in progress for a subminiature LED chip, since the size of the LED chip is very small, it is difficult to perform a precise metal process, and there is a problem in that an electrical short occurs due to contact between metal layers deposited on the LED chip.

On the other hand, in the prior art, when a thin metal layer is formed to prevent metal-to-metal contact on a subminiature LED chip, a contradiction arises in that electrical characteristics are deteriorated.

DISCLOSURE

Technical Problem

One of the technical objects of the embodiment is to provide a method for manufacturing a semiconductor light emitting device package, a semiconductor light emitting device package manufactured by the method, and a display device including the same capable of efficiently transferring and transmitting in a subminiature LED chip applied to high resolution displays such as AR and VR.

Also, one of the technical objects of the embodiment is to provide a method for manufacturing a semiconductor light emitting device package, a semiconductor light emitting device package manufactured by the method, and a display device including the same in which a metal layer is formed to have excellent electrical characteristics without an electrical short on the LED chip even if it is a subminiature LED chip.

The technical objects of the embodiment are not limited to those described in this section, and include those that can be grasped through the description of the invention.

Technical Solution

The manufacturing method of the semiconductor light emitting device package according to the embodiment can include a step of manufacturing a first semiconductor light emitting device including a post structure on a light emitting structure and a step of transferring the first semiconductor light emitting device including the post structure onto a donor substrate and removing the growth substrate by breaking the tether layer of the first semiconductor light emitting device including the post structure.

In the step of manufacturing the first semiconductor light emitting device including the post structure,

A step of sequentially forming a first semiconductor layer on the growth substrate, a second semiconductor layer on the first semiconductor layer, a light emitting structure on the second semiconductor layer, and a light-transmitting electrode layer on the light emitting structure, a step of forming a mask pattern on the light-transmitting electrode layer, a step of etching portions of the light-transmitting electrode, the light-emitting structure, the second semiconductor layer, and the first semiconductor layer and forming the mask pattern into a post structure, a step of forming an etching electrode on the light-transmitting electrode layer without the post structure; and a step of selectively partially etching the second semiconductor layer by performing EC (Electrical Chemical) etching to form a tether layer can be included.

The first semiconductor layer and the second semiconductor layer are each doped with a first conductivity type dopant, and a doping concentration of the first conductivity type dopant of the second semiconductor layer can be higher than that of the first conductivity type dopant of the first semiconductor layer.

In the step of removing the growth substrate by damaging the tether layer of the first semiconductor light emitting device including the post structure, after the first semiconductor light emitting device including the post structure is disposed on the donor substrate, as a predetermined pressure is applied to the donor substrate, a first semiconductor light emitting device chip structure including the post structure can remain on the donor substrate by removing the growth substrate due to damage to the tether layer of the first semiconductor light emitting device.

The embodiment can further include forming a first-A electrode layer on the light emitting structure exposed after removing the growth substrate.

In the step of forming the first-A electrode layer on the light emitting structure, the light emitting structure includes a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer, a horizontal width of the first conductivity type semiconductor layer of the light emitting structure can be greater than a horizontal width of the second conductivity type semiconductor layer, and the first-A electrode layer can be formed on the first conductivity type semiconductor layer.

In the embodiment, the first conductivity type semiconductor layer exposed after the tether layer is removed can have roughness on an exposed surface.

The embodiment can further include bonding the first semiconductor light emitting device chip structure including the first-A electrode layer onto the panel substrate including the first-B electrode layer.

The embodiment can further include separating the post structure from the light emitting structure.

The embodiment can further include a coating layer on the donor substrate.

The embodiment can further include a coating layer pattern on the donor substrate.

The semiconductor light emitting device package according to the embodiment can include a first semiconductor layer on a growth substrate, a tether layer on the first semiconductor layer, a light emitting structure on the tether layer, a light-transmitting electrode layer on the light-emitting structure, and a post structure on the light-transmitting electrode layer.

The semiconductor light emitting device package can be manufactured by any one of the above manufacturing methods.

The display device according to the embodiment can include a panel substrate including one or more wiring electrodes and any one of the semiconductor light emitting device packages disposed on the panel substrate.

Effects of the Invention

According to the manufacturing method of the semiconductor light emitting device package according to the embodiment, the semiconductor light emitting device package manufactured by the method, and a display device including the same, there is a technical effect that enables efficient transcription and transmission in ultra-small LED chips applied to high-resolution displays such as AR and VR.

Also, according to the embodiment, there is no need to manufacture a dedicated transfer head and a dedicated stamp due to the smaller chip size of the semiconductor light emitting device.

Also, according to the embodiment, all R, G, and B chips can be transferred to the donor substrate, and R, G, and B chips can be simultaneously metal bonded to the panel substrate, so there is a technical effect of improving the uniformity of the display.

Also, according to the embodiment, there is a technical effect capable of implement a small full-color display with high resolution by reducing the size and pitch of a semiconductor light emitting device chip.

Also, according to the embodiment, there is a technical effect in which a metal layer can be formed on the LED chip to have excellent electrical characteristics without an electrical short on the LED chip, even on a subminiature LED chip.

The technical effects of the embodiments are not limited to those described in this section, but include those that can be grasped from the description of the invention.

MODE FOR INVENTION

Hereinafter, the embodiments disclosed in the present specification will be described in detail with reference to the accompanying drawings, but the same or similar components are given the same reference sign regardless of the reference numerals, and the redundant description thereof will be omitted. The suffixes “module” and “part” for components used in the following description are given or mixed in consideration of only the ease of writing the specification, and do not have a meaning or role distinct from each other by themselves. Also, the accompanying drawings are for easy understanding of the embodiments disclosed in the present specification, and the technical spirit disclosed in the present specification is not limited by the accompanying drawings. Also, when an element, such as a layer, area, or substrate, is referred to as being ‘on’ another component, this includes that it is directly on the other element or there can be other intermediate elements in between.

The display device described in this specification can include a mobile phone, a smart phone, a laptop computer, a digital broadcasting terminals, a personal digital assistants (PDA), a portable multimedia player (PMP), a navigation, a slate PC, a tablet PC, an ultra-book, a digital TV, a desktop computer, etc. However, the configuration according to the embodiment described in the present specification can be applied to a device capable of displaying even a new product form to be developed later.

Hereinafter, a method for manufacturing a semiconductor light emitting device package according to an embodiment, a semiconductor light emitting device package manufactured by the method, and a display device including the same will be described.

FIG.1is an exemplary view in which a display device100according to an embodiment is disposed in a living room together with a washing machine10, a robot cleaner20, and an air purifier30.

The display device100of the embodiment can display the status of various electronic products such as the washing machine10, the robot cleaner20, and the air purifier30, and can communicate with each electronic product based on IOT and can control each electronic product based on user's setting data.

The display device100according to the embodiment can include a flexible display fabricated on a thin and flexible substrate. The flexible display can be bent or rolled like paper while maintaining characteristics of a conventional flat panel display.

In the flexible display, visual information can be implemented by independently controlling light emission of unit pixels arranged in a matrix form. The unit pixel means a minimum unit for implementing one color. A unit pixel of the flexible display can be implemented by a semiconductor light emitting device. In the embodiment, the semiconductor light emitting device can be a Micro-LED, but is not limited thereto.

Next,FIG.2is an enlarged view of the first panel area Al in the display device100ofFIG.1.

Referring toFIG.2, the display device100of the embodiment can be manufactured by mechanically and electrically connecting a plurality of panel areas such as the first panel area Al by tiling.

The first panel area Al can include a plurality of unit pixels150L, and each unit pixel150L can include a first semiconductor light emitting device150R, a second semiconductor light emitting device150G, and a third semiconductor light emitting device150B as sub-pixels. The first, second, and third semiconductor light emitting elements150R,150G, and150B can be a red light emitting element R, a green light emitting element G, and a blue light emitting element B, respectively, but are not limited thereto.

In an embodiment, each semiconductor light emitting device can be driven in an active matrix (AM) method or a passive matrix (PM) method.

Next,FIG.3is a cross-sectional view taken along line B1-B2of the first semiconductor pixel region150L1that is one unit pixel inFIG.2.

Referring toFIG.3, in the display device100according to the embodiment, the first semiconductor pixel region150L1can include the panel substrate110, the first wiring electrode121, the second wiring electrode122, the third wiring electrode123, the first to third semiconductor light emitting devices150R,150G, and150B disposed on the first to third wiring electrodes121,122, and123, respectively, and the insulating layer130disposed between the semiconductor light emitting devices. The panel substrate110, the first to third wiring electrodes121,122, and123, and the first to third semiconductor light emitting devices150R,150G, and150B can be referred to as a back plane, but is not limited thereto.

The panel substrate110can be formed of glass or polyimide. Also, the panel substrate110can include a flexible material such as polyethylene naphthalate (PEN) or polyethylene terephthalate (PET). Also, the panel substrate110can be a transparent material, but is not limited thereto.

A single or a plurality of wiring electrodes can be disposed on the panel substrate110, and for example, first to third wiring electrodes121,122, and123can be disposed. The first to third wire electrodes121,122, and123can include a metal material having excellent electrical conductivity. For example, the first to third wiring electrodes121,122, and123can be formed of at least one of Titanium (Ti), Chromium (Cr), Nickel (Ni), Aluminum (Al), Platinum (Pt), Gold (Au), Tungsten (W) and Molybdenum (Mo) or an alloy thereof.

In the embodiment, the first wiring electrode121can include a first electrode layer121A and a first electrode layer121B. Also, the second wiring electrode122can include a second-A electrode layer122A and a second-B electrode layer122B. Also, the third wiring electrode123can include a third-A electrode layer123A and a third-B electrode layer123B.

An insulating layer130can be disposed between the first to third semiconductor light emitting devices150R,150G, and150B on the panel substrate110. The insulating layer130can include an insulating and flexible material such as polyimide, PEN, or PET, and can be integrated with the panel substrate110to form a single substrate.

The insulating layer130may be an adhesive insulating layer or a conductive adhesive layer having conductivity. Since the insulating layer130is ductile, the insulating layer can enable a flexible function of the display device.

Next, each of the semiconductor light emitting elements150R,150G, and150B can be red, green, and blue semiconductor light emitting elements to form a unit-pixel, but are not limited thereto, and can implement red and green colors by including a red phosphor and a green phosphor, respectively.

Hereinafter, the first semiconductor light emitting device150R will be mainly described, and the remaining second to third semiconductor light emitting devices150G and150B can also adopt the technical features of the first semiconductor light emitting device150R.

The semiconductor light emitting devices150R,150G, and150B that can be employed in the embodiment can be vertical type semiconductor light emitting devices as shown inFIG.3, but are not limited thereto and can include a lateral type semiconductor light emitting device or a flip type semiconductor light emitting device.

In the embodiment, the semiconductor light emitting devices150R,150G, and150B are p-n junction diodes in which electrical energy is converted into light energy, and can be made of compound semiconductors containing elements of groups III and V on the periodic table and can implement various colors such as red, green, and blue by controlling band gap energy by adjusting the composition ratio of compound semiconductors.

Next,FIGS.4A to4Gare process cross-sectional views for manufacturing the first semiconductor light emitting device150R in the embodiment, andFIG.5is an enlarged cross-sectional view of the first semiconductor light emitting device150RS including the post structure201P on the growth substrate manufactured by the above manufacturing method inFIG.4G.

First, referring toFIG.5, the first semiconductor light emitting device150RS including the post structure201P on the growth substrate can include a first semiconductor layer153on a growth substrate151, a tether layer154bon the first semiconductor layer153, a light emitting structure155on the tether layer154b,a light-transmitting electrode layer156on the light emitting structure155and a post structure201P on the light-transmitting electrode layer156.

The light emitting structure155can include a first conductivity type semiconductor layer155a,an active layer155b,and a second conductivity type semiconductor layer155c.

The first conductivity type semiconductor layer155acan be implemented as a group 3-group 5 compound semiconductor doped with a first conductivity type dopant. The active layer155bis a layer in which electrons injected through the first conductivity type semiconductor layer155aand holes injected through the second conductivity type semiconductor layer113meet each other to emit light having energy determined by the bandgap energy inherent to the active layer material. The second conductivity type semiconductor layer155ccan include a group III-group V compound semiconductor material doped with a second conductivity type dopant.

The first semiconductor layer153can be doped with a first conductivity type dopant.

The tether layer154bcan be a friable layer easily broken by a predetermined pressure, and can be referred to as a separating layer or an etched layer, but is not limited thereto.

The post structure201P can be formed of a PR material and can be referred to as a contact layer, a support layer, or an anchor layer, but is not limited thereto.

Hereinafter, a method of manufacturing the first semiconductor light emitting device150RS including the post structure201P on the growth substrate shown inFIG.5will be described with reference toFIGS.4A to4G.

First, as shown inFIG.4A, sequentially, a first semiconductor layer153is formed on the growth substrate151, a second semiconductor layer154ais formed on the first semiconductor layer153, a light emitting structure155is formed on the second semiconductor layer154a,and a light-transmitting electrode layer156is formed on the light emitting structure155.

The growth substrate151is a substrate for growing an epitaxial layer, which is a light emitting structure, and can be a sapphire substrate or a silicon (Si) wafer, but is not limited thereto.

Each of the first semiconductor layer153and the second semiconductor layer154acan be doped with a first conductivity type dopant. In this case, the doping concentration of the first conductivity type dopant of the second semiconductor layer154acan be higher than that of the first conductivity type dopant of the first semiconductor layer153.

Also, the doping concentration of the first conductivity type dopant of the second semiconductor layer154acan be higher than that of the first conductivity type dopant of the first conductivity type semiconductor layer155a.

Accordingly, in the subsequent etching process, the etching rate for the second semiconductor layer154ais high, so that the tether layer154bcan be formed (refer toFIG.4F).

The light emitting structure155can include a first conductivity type semiconductor layer155a,an active layer155b,and a second conductivity type semiconductor layer155c.

The first conductivity type semiconductor layer155acan be implemented as a group III-V compound semiconductor doped with a first conductivity type dopant, and when the first conductivity type semiconductor layer155ais an n-type semiconductor layer, the first conductivity type dopant is an n-type dopant and can include Si, Ge, Sn, Se, or Te, but is not limited thereto.

The active layer155bis a layer in which electrons injected through the first conductivity type semiconductor layer155aand holes injected through the second conductivity type semiconductor layer113meet each other to emit light having energy determined by the bandgap energy inherent to the active layer material.

The active layer155bcan be formed of at least one of a single quantum well structure, a multi quantum well (MQW) structure, a quantum wire structure, or a quantum dot structure.

The well layer/barrier layer of the active layer155bcan have a pair structure of one or more of InGaN/GaN, InGaN/InGaN, GaN/AlGaN, InAlGaN/GaN, GaAs(InGaAs)/AlGaAs, GaInP/AlGaInP, GaP/AlGaP and InGaP/AlGaP, but is not limited thereto.

The second conductivity type semiconductor layer155ccan include a group III-group V compound semiconductor, for example, a semiconductor material having a composition formula of InxAlyGa1-x-yN (0≤x≤1, 0≤y≤1, 0≤x+y≤1) doped with a second conductivity type dopant. When the second conductivity type semiconductor layer155cis a p-type semiconductor layer, the second conductivity type dopant is a p-type dopant and can include Mg, Zn, Ca, Sr, Ba, or the like.

The light-transmitting electrode layer156can include an ohmic layer in which a single metal, a metal alloy, or a metal oxide is multi-layered so as to efficiently inject carriers. For example, the light-transmitting electrode layer156can include at least one of Ni/IrOx/Au and Ni/IrOx/Au/ITO, but is not limited to these materials. For example, the light-transmitting electrode layer156can include at least one of ITO(indium tin oxide), IZO(indium zinc oxide), IZTO(indium zinc tin oxide), IAZO(indium aluminum zinc oxide), IGZO(indium gallium zinc oxide), IGTO (indium gallium tin oxide), AZO (aluminum zinc oxide), ATO (antimony tin oxide), GZO (gallium zinc oxide), IZON (IZO Nitride), AGZO (Al—Ga ZnO), In—Ga ZnO (IGZO), ZnO, IrOx, RuOx, NiO, RuOx/ITO, Ni/IrOx/Au or Ni/IrOx/Au/ITO, but is not limited to these materials.

Next, a mask material201acan be formed on the light-transmitting electrode layer156as shown inFIG.4B, and a mask pattern201bfor etching the epitaxial layer can be formed as shown inFIG.4C.

For example, the mask pattern201bcan be formed by a process such as photolithography, polymer transfer, or nanoimprint.

Accordingly, the mask pattern201bcan be an imprint material including a photosensitive material, a polymer material, or a metal-based or oxide-based material, but is not limited thereto.

Next, as shown inFIG.4D, Portions of the light-transmitting electrode156, the light emitting structure155, the second semiconductor layer154a,and the first semiconductor layer153can be etched using the mask pattern201b.The etching process can be chemically or physically etched through ICP, RIE equipment, and the like.

At this time, the side surface of the second semiconductor layer154ais exposed, and the mask pattern201bcan become a post structure201P. The post structure201P can be referred to as a contact layer, a support layer, or an anchor layer, but is not limited thereto.

Next, as shown inFIG.4E, an etching electrode201E is formed using a conductive material on the light-transmitting electrode layer156without the post structure201P.

Next, as shown inFIG.4F, electrical chemical (EC) etching can be performed while applying positive (+) power to the etching electrode and applying negative (−) power to the oxalic acid solution in the oxalic acid solution.

Through this, the tether layer154bcan be formed by selectively etching the second semiconductor layer154ahaving a high dopant concentration as shown inFIG.4G. The tether layer154bcan be a friable layer easily broken by a predetermined pressure, and can be referred to as a separating layer or an etched layer, but is not limited thereto.

First Embodiment

Next,FIGS.6A to6Dare diagrams illustrating a process according to the first embodiment of transferring the first semiconductor light emitting device150RS including the post structure201P shown inFIG.5to the donor substrate310. Hereinafter, ‘first embodiment’ is referred to as ‘embodiment’.

In the embodiment, a process in which the semiconductor light emitting device is firstly transferred to a predetermined donor substrate310or a transfer substrate and then secondarily transferred to the panel substrate110will be described, but is not limited thereto.

Referring toFIG.6A, as a predetermined pressure is applied to the donor substrate310after the first semiconductor light emitting device150RS including the post structure201P is disposed on the donor substrate310, as shown inFIG.6B, the first semiconductor light emitting device chip structure150RC having the post structure201P remains on the donor substrate310.

FIG.6Dis a photograph of the first semiconductor light emitting device chip structure150RC in which the post structure201P is coupled to the donor substrate310as shown inFIG.6B.

FIG.6Cis a diagram explaining the principle of removing the first semiconductor layer153and the growth substrate151while the tether layer154bis damaged inFIGS.6A and6B.

For example, referring toFIG.6C(a), when pressure is applied after the first semiconductor light emitting device150RS including the post structure201P is disposed on the donor substrate310, as shown inFIG.6C(b), when the tether layer154bis damaged, the first semiconductor layer153and the growth substrate151can be physically separated and removed.

The tether layer154bdamaged by the pressure loses adhesive strength, and the post structure201P can be more strongly adhered to the donor substrate310due to adhesive strength and bonded thereto.

Next,FIGS.7A to7Dare process diagrams in which the second semiconductor light emitting device chip structure150GC including the post structure201P and the third semiconductor light emitting device chip structure150BC including the post structure201P are transferred onto the donor substrate310.

Also,FIG.8is a photograph of the first to third semiconductor light emitting device chip structures150RC,150GC, and150BC including the post structure201P coupled to the donor substrate310as shown inFIG.7D.

The second semiconductor light emitting device chip structure150GC and the third semiconductor light emitting device chip structure150BC can be a semiconductor light emitting device chip structure emitting green light and a semiconductor light emitting device chip structure emitting blue light, respectively, but are not limited thereto.

First, referring toFIGS.7A and7B, as a predetermined pressure is applied to the donor substrate310after the second semiconductor light emitting device150GS including the post structure201P is disposed on the donor substrate310, the tether layer154bis damaged, and the growth substrate151is physically separated and removed. Accordingly, the second semiconductor light emitting device chip structure150GC including the post structure201P remains on the donor substrate310.

At this time, since the height of the second semiconductor light emitting device150GS including the post structure201P is higher than that of the first semiconductor light emitting device chip structure150RC bonded to the donor substrate310, there is a special technical effect that the transfer process can stably proceed while the second semiconductor light emitting device150GS including the post structure201P contacts the donor substrate310due to the height difference.

Referring toFIGS.7C and7D, after the third semiconductor light emitting device150BS including the post structure201P is disposed on the donor substrate310, as a predetermined pressure is applied to the donor substrate310, the tether layer154bis damaged and the growth substrate151is physically separated and removed. The third semiconductor light emitting device chip structure150BC including the post structure201P remains on the donor substrate310.

Next,FIGS.9A to9Eare process diagram of transferring electrode layers to the panel substrate110after forming electrode layers for the first to third semiconductor light emitting device chip structures150RC,150GC,150BC having the post structure201P coupled to the donor substrate310shown inFIG.7D.

First, referring toFIG.9A, an electrode material is formed on the first to third semiconductor light emitting device chip structures bonded to the donor substrate, the first-A electrode layer121A, the second-A electrode layer122A, and the third-A electrode layer123A can be respectively formed.

For example, on the first to third semiconductor light emitting device chip structures150RC,150GC, and150BC coupled to the donor substrate310, a first-A electrode layer121A, a second-A electrode layer122A, and a third-A electrode layer123A can be respectively formed by performing a deposition process of the at least one metal material among copper (Cu), titanium (Ti), chromium (Cr), nickel (Ni), aluminum (Al), platinum (Pt), gold (Au), tungsten (W), or molybdenum (Mo).

At this time, in the first to third semiconductor light emitting device chip structures150RC,150GC, and150BC of the embodiment, as the horizontal width of the first conductivity type semiconductor layer155ais designed to be larger than the horizontal width of the second conductivity type semiconductor layer155c,in the process of forming the electrode material, the first-A electrode layer121A, the second-A electrode layer122A, and the third-A electrode layer123A can be formed as a single layer or a plurality of layers without a separate mask process.

That is, in the first to third semiconductor light emitting device chip structures150RC,150GC, and150BC of the embodiment, since the horizontal width of the first conductivity type semiconductor layer155ais designed to be larger than the horizontal width of the second conductivity type semiconductor layer155c,in the deposition process of metal materials, as the metal material is formed on the first conductivity type semiconductor layer155aof the first to third semiconductor light emitting device chip structures150RC,150GC, and150BC and not being formed on the second conductivity type semiconductor layer155c,an electrical short may not occur.

Also, a metal material can be formed on the donor substrate310exposed between the first to third semiconductor light emitting device chip structures150RC,150GC, and150BC.

In particular, according to the embodiment, the first conductivity type semiconductor layer155aexposed after the tether layer154bis removed as shown inFIG.6Dhas a surface roughness as shown inFIG.6D, and since the deposition of the metal layer is effectively progressed by such roughness, the contact force of the metal layer is excellent, and the contact area is increased, so that there is a technical effect that electrical characteristics are remarkably improved.

As shown inFIG.6D, the roughness of the exposed first conductivity type semiconductor layer155aof the first semiconductor light emitting device chip structure150RC can have a growth ring shape, but is not limited thereto.

Also, according to the embodiment, bonding between the first-A electrode layer121A, the second-A electrode layer122A, and the third-A electrode layer123A and the first-B electrode layer121B, the second-B electrode layer122B, and the third-B electrode layer123B formed later proceeds efficiently, when removing the donor substrate, there is a special technical effect that the post structure201P portion can be removed by maximizing the bonding force of the first wiring electrode121, the second wiring electrode122, and the third wiring electrode123.

Next, referring toFIG.9B, the first-B electrode layer121B, the second-B electrode layer122B, and the third-B electrode layer123B can be formed as a single layer or a plurality of layers on the panel substrate110.

The first-B electrode layer121B, the second-B electrode layer122B, and the third-B electrode layer123B can include one or more metal materials selected from Copper (Cu), Titanium (Ti), Chromium (Cr), Nickel (Ni), Aluminum (Al), Platinum (Pt), Gold (Au), Tungsten (W) or Molybdenum (Mo).

Thereafter, a bonding process is performed by pressing the first to third semiconductor light emitting device chip structures150RC,150GC, and150BC on which the first-A electrode layer121A, the second-A electrode layer122A, and the third-A electrode layer123A are formed onto the first-B electrode layer121B, second-B electrode layer122B, and third-B electrode layer123B on the panel substrate110, as shown inFIG.9C, a first wiring electrode121, a second wiring electrode122, and a third wiring electrode123are formed, and the first to third semiconductor light emitting device chip structures150RC,150GC, and150BC can be coupled to the panel substrate110by the first to third wiring electrodes121,122, and123.

Next, as shown inFIG.9d, when the donor substrate310is moved in the opposite direction to the panel substrate110, the post structure201P and the first to third semiconductor light emitting device chip structures150RC,150GC, and150BC are separated, so that as shown inFIG.9E, the first to third semiconductor light emitting device chip structures150RC,150GC, and150BC remain on the panel substrate110.

According to the embodiment, due to the strong bonding strength between the first wiring electrode121, the second wiring electrode122, and the third wiring electrode123formed by a bonding process by pressing on the first-B electrode layer121B, the second-B electrode layer122B, and the third-B electrode layer123B, the metal layer, when the donor substrate310is removed, as the post structure201P and the first to third semiconductor light emitting device chip structures150RC,150GC, and150BC are separated from each other, as shown inFIG.9E, the transferred first to third semiconductor light emitting device chip structures150RC,150GC, and150BC can be formed on the panel substrate110.

In particular, in the embodiment, by providing roughness on the exposed first conductivity type semiconductor layer155aof the first to third semiconductor light emitting device chip structures150RC,150GC, and150BC, bonding between the first-A electrode layer121A, the second-A electrode layer122A, and the third-A electrode layer123A and the first-B electrode layer121B, the second-B electrode layer122B, and the third-B electrode layer123B formed later can be efficiently performed.

Also, according to the embodiment, as roughness is provided on the exposed first conductivity type semiconductor layer155aof the first to third semiconductor light emitting device chip structures150RC,150GC, and150BC and the deposition of the metal layer proceeds effectively by this roughness, the contact force of the metal layer is excellent, and the contact area is increased, so that there is a technical effect of significantly improving electrical characteristics.

Next, referring toFIG.3, the first to third semiconductor light emitting devices150R,150G, and150B can be formed by forming an insulating layer130between the first to third semiconductor light emitting device chip structures150RC,150GC, and150BC.

Meanwhile, in the embodiment, the bonding process can be performed while the insulating layer130is previously formed on the panel substrate110ofFIG.9B, but is not limited thereto.

According to the manufacturing method of the semiconductor light emitting device package according to the embodiment, the semiconductor light emitting device package manufactured by the method, and a display device including the same, there is a technical effect that enables efficient transcription and transmission in ultra-small LED chips applied to high-resolution displays such as AR and VR.

Also, according to the embodiment, there is no need to manufacture a dedicated transfer head and a dedicated stamp due to the smaller chip size of the semiconductor light emitting device.

Also, according to the embodiment, there is a technical effects capable of transferring all R, G, and B chips to the donor substrate and improving the uniformity of the display by metal bonding R, G, and B chips to the panel substrate at the same time.

Also, according to the embodiment, there is a technical effect capable of implement a full-color small display with high resolution by reducing the size and pitch of a semiconductor light emitting device chip.

Also, according to the embodiment, there is a technical effect in which a metal layer can be formed on the LED chip so as to have excellent electrical characteristics without an electrical short on the LED chip, even on a subminiature LED chip.

Second Embodiment

FIGS.10A to10Cshow a transfer method according to the second embodiment, are a process diagram in which the first semiconductor light emitting device chip structure150RC including the post structure201P is transferred onto the donor substrate310having the coating layer320thereon.

Referring toFIG.10A, a coating layer320can be further formed on the donor substrate310. The coating layer320can be formed of a photosensitive material or a resin or polymer material.

The coating layer320can be thermally deformed, and can be integrated with the post structure201P on the first semiconductor light emitting device chip structure150RC.

Referring toFIG.10A, by forming the coating layer320on the donor substrate310, it can be combined with and integrated with the post structure201P on the first semiconductor light emitting device chip structure150RC.

FIG.10Dis a photograph in which the post structure201P of the first semiconductor light emitting device chip structure150RC is inserted into the coating layer320on the donor substrate and combined.

According to the embodiment, as the post structure201P digs into the coating layer320and is inserted, when the tether layer154bis damaged, the first semiconductor light emitting device chip structure150RC can be efficiently transferred to the donor substrate310by strong bonding force between the coating layer320and the post structure201P.

According to the embodiment, when pressure is applied to break the tether layer154b,as the post structure201P digs into the coating layer320and is inserted, the effect of the pressure on the structure of the light emitting device is minimized, thereby improving reliability of the light emitting device chip.

Next, referring toFIG.10B, a coating layer pattern320P can be further formed on the donor substrate310. The coating layer pattern320P can be formed of a photosensitive material or a resin or polymer material.

The coating layer pattern320P can be thermally deformed, and can be combined and integrated with the post structure201P on the first semiconductor light emitting device chip structure150RC.

Referring toFIG.10B, by forming a thick second coating layer pattern320P2on the donor substrate310, there is a technical effect that allows selective transcription of transferring the first chip structure150RC1of the first semiconductor light emitting device corresponding to the coating layer pattern320P among the first semiconductor light emitting device chip structures150RC, but the second chip structure150RC2of the first semiconductor light emitting device that does not correspond to the coating layer pattern320P is not transferred.

Next, referring toFIG.10C, a thick second coating layer pattern320P2can be further formed on the donor substrate310. The second coating layer pattern320P2can be formed of a photosensitive material or a resin or polymer material.

The thickness of the second coating layer pattern320P2may be in the range of 0.5 to 1.0 of the thickness of the post structure201P.

Referring toFIG.10C, by forming a thick second coating layer pattern320P2on the donor substrate310, there is a technical effect that allows selective transcription of transferring the first chip structure150RC1of the first semiconductor light emitting device corresponding to the coating layer pattern320P among the first semiconductor light emitting device chip structures150RC, but the second chip structure150RC2of the first semiconductor light emitting device that does not correspond to the coating layer pattern320P is not transferred.

Also, according to the embodiment, when there is bowing in the panel substrate or the donor substrate, there is a special technical effect of improving the transfer yield.

According to the manufacturing method of the semiconductor light emitting device package according to the embodiment, the semiconductor light emitting device package manufactured by the method, and a display device including the same, there is a technical effect that enables efficient transcription and transmission in ultra-small LED chips applied to high-resolution displays such as AR and VR.

Also, according to the embodiment, there is no need to manufacture a dedicated transfer head and a dedicated stamp due to the smaller chip size of the semiconductor light emitting device.

Also, according to the embodiment, all R, G, and B chips can be transferred to the donor substrate, and R, G, and B chips can be simultaneously metal bonded to the panel substrate, so there is a technical effect of improving the uniformity of the display.

Also, according to the embodiment, there is a technical effect capable of implement a small full-color display with high resolution by reducing the size and pitch of a semiconductor light emitting device chip.

Also, according to the embodiment, there is a technical effect in which a metal layer can be formed on the LED chip so as to have excellent electrical characteristics without an electrical short on the LED chip even for a subminiature LED chip.

INDUSTRIAL APPLICABILITY

The semiconductor light emitting device according to the embodiment is not limited to the micro LED, and includes mini LED.

The semiconductor light emitting device according to the embodiment can be applied to an LED having a relatively large area for illumination and signage also to the micro LED display.

Also, a method for manufacturing a semiconductor light emitting device package according to an embodiment, a semiconductor light emitting device package manufactured by the method, and a display device including the same can include Digital TVs, mobile phones, smart phones, laptop computers, digital broadcasting terminals, PDAs (personal digital assistants), a PMP (portable multimedia player), a navigation, a slate PC, a tablet PC, an ultra-book, a desktop computer, etc.

The above description is merely an example of the technical idea of the embodiment, and various modifications and variations can be made to those skilled in the art without departing from the essential characteristics of the embodiment.

Therefore, the embodiments disclosed in the embodiments are not intended to limit the technical idea of the embodiment but to explain, and the scope of the technical idea of the embodiment is not limited by these examples.

The protection scope of the embodiment should be interpreted according to the claims below, and all technical ideas within the scope equivalent thereto should be construed as being included in the scope of rights of the embodiment.