DISPLAY PANEL, DISPLAY APPARATUS, AND METHOD FOR MANUFACTURING DISPLAY PANEL

A technical field of display, and in particular, to a display panel, a display apparatus, and a method for manufacturing a display panel. The display panel, includes a substrate, a pixel defining layer, and an encapsulation layer. The pixel defining layer is arranged on the substrate. The encapsulation layer is located on a side of the pixel defining layer facing away from the substrate. The encapsulation layer includes a first encapsulation layer. The first encapsulation layer is provided with a first opening penetrating through the first encapsulation layer along a thickness direction. A display apparatus further including the above display panel. A method for manufacturing a display panel, applied to the display panel as above.

TECHNICAL FIELD

The present application relates to the technical field of display, and in particular, to a display panel, a display apparatus, and a method for manufacturing a display panel.

BACKGROUND

An organic light emitting diode (OLED) and a flat panel display apparatus based on a light emitting diode (LED) technology and the like are widely used in various consumer electronic products such as mobile phones, TVs, notebook computers, and desktop computers due to advantages such as high image quality, power saving, a thin body, and a wide range of applications, becoming the mainstream in display apparatuses.

However, performance of current OLED display products needs to be improved.

SUMMARY

Embodiments of the present application provide a display panel and a display apparatus.

An embodiment of a first aspect of the present application provides a display panel, including a substrate, a pixel defining layer, and an encapsulation layer. The pixel defining layer is arranged on the substrate. The encapsulation layer is located on a side of the pixel defining layer facing away from the substrate. The encapsulation layer includes a first encapsulation layer. The first encapsulation layer is provided with a first opening penetrating through the first encapsulation layer along a thickness direction.

In another aspect, an embodiment of a second aspect of the present application further provides a display panel, including a substrate, a pixel defining layer, a first electrode layer, and a first conductive line. The pixel defining layer is arranged on the substrate. The pixel defining layer includes a pixel defining portion and a pixel opening surrounded by the pixel defining portion. A light-emitting layer is provided in the pixel opening. The first electrode layer is located on a side of the light-emitting layer facing away from the substrate. The first conductive line includes a first conductive portion. The first conductive portion is located between the substrate and the pixel defining layer, and the first conductive portion is electrically connected to the first electrode layer.

In another aspect, an embodiment of a third aspect of the present application further provides a display panel, including a substrate, a pixel defining layer, a first electrode layer, and a first conductive line. The pixel defining layer is arranged on the substrate. The pixel defining layer includes a pixel defining portion and a pixel opening surrounded by the pixel defining portion. A light-emitting layer is provided in the pixel opening. The first electrode layer is located on a side of the light-emitting layer facing away from the substrate. The first conductive line is located on a side of the pixel defining layer away from the substrate. The first conductive line is connected with the first electrode layer in an overlap manner.

In another aspect, an embodiment of a fourth aspect of the present application further provides a display panel, including a substrate, a pixel defining layer, and an encapsulation layer. The pixel defining layer is arranged on the substrate. The pixel defining layer includes a pixel opening, and a light-emitting layer is provided in the pixel opening. The encapsulation layer is located on a side of the pixel defining layer facing away from the substrate. The encapsulation layer includes a first encapsulation portion and a second encapsulation portion. An orthographic projection of the pixel opening on the substrate is within an orthographic projection of the first encapsulation portion on the substrate. An orthographic projection of the second encapsulation portion on the substrate is located between orthographic projections of adjacent pixel openings on the substrate. A thickness of the second encapsulation portion is less than that of the first encapsulation portion.

In another aspect, an embodiment of a fifth aspect of the present application further provides a display apparatus, including the display panel in any one of the above embodiments.

In another aspect, an embodiment of a sixth aspect of the present application further provides a method for manufacturing a display panel, applied to the display panel in any one of the above embodiments. The method includes: providing a substrate; forming a second electrode layer and a pixel defining layer on the substrate; manufacturing a patterned isolation structure on a side of the pixel defining layer facing away from the substrate, an opening being surrounded by the isolation structure; sequentially evaporating-and-depositing a light-emitting layer and a first electrode layer in the opening; forming a first encapsulation layer on a side of the first electrode layer facing away from the substrate; and etching away the isolation structure to form a first opening.

REFERENCE SIGNS

DETAILED DESCRIPTION

Features and exemplary embodiments in various aspects of the present application will be described in detail below. In order to make the objective, technical solutions, and advantages of the present application clearer, the present application will be described in further detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, but not to limit the present application. For those skilled in the art, the present application can be implemented without some of these specific details. The following description of the embodiments is merely to provide a better understanding of the present application by illustrating the examples of the present application.

It should be noted that relational terms such as first and second herein are merely intended to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or sequence among these entities or operations. Moreover, terms “include”, “comprise” or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article, or device including a series of elements not only include those elements, but also include other elements that are not explicitly listed, or further include elements inherent to the process, method, article or, device. In the absence of more limitations, an element defined by the statement “including . . . ” does not exclude the presence of additional identical elements in a process, method, article, or device that includes the element.

In order to better understand the present application, a display panel and a display apparatus of embodiments of the present application are described in detail below with reference toFIG.1toFIG.8. It is noted that a direction z in the drawings is a thickness direction of the display panel. In the drawings, for the convenience of the drawings, dimensions in the figures are not necessarily proportional to actual dimensions, and some hierarchical structures in a display module are not shown.

Referring toFIG.1,FIG.1is a partial sectional view of a display panel according to an embodiment of the present application.

As shown inFIG.1, an embodiment of a first aspect of the present application provides a display panel, including a substrate10, a pixel defining layer20, and an encapsulation layer30. The pixel defining layer20is arranged on the substrate10. The encapsulation layer30is located on a side of the pixel defining layer20facing away from the substrate10, and the encapsulation layer30includes a first encapsulation layer31. The first encapsulation layer31is provided with a first opening311penetrating through the first encapsulation layer31along the thickness direction (the direction z in the figure).

In the display panel provided in this embodiment of the present application, the display panel includes the substrate10, the pixel defining layer20, and the encapsulation layer30. The pixel defining layer20is arranged on the substrate10. The encapsulation layer30is located on the side of the pixel defining layer20facing away from the substrate10, and the encapsulation layer30includes a first encapsulation layer31. The first encapsulation layer31is provided with the first opening311penetrating through the first encapsulation layer31along the thickness direction z, and the first encapsulation layer31is not a continuous entirety, so that in an encapsulation process of the display panel, independent encapsulation in partitions can be achieved, improving an encapsulation effect and applicability of the encapsulation process.

In some optional embodiments, the pixel defining layer20includes a pixel defining portion21and a pixel opening22surrounded by the pixel defining portion21, and a light-emitting layer40is provided in the pixel opening22. An orthographic projection of the first opening311on the substrate10is located between orthographic projections of adjacent pixel openings22on the substrate10.

Optionally, a plurality of pixel openings22are distributed at intervals, and the light-emitting layer40is provided in each pixel opening22.

Optionally, the first opening311divides the first encapsulation layer31into a plurality of encapsulation sections, and the plurality of encapsulation sections may be encapsulated sequentially in the encapsulation process, so that the light-emitting layers40corresponding to the plurality of encapsulation sections can also be sequentially manufactured in multiple processes to achieve functions such as partition control over the light-emitting layers40. A plurality of first openings311may be spaced apart from each other, or may be connected to each other to form a shape of a grid. When the orthographic projections of the first openings311on the substrate10are in a shape of a grid, the first openings311divide the first encapsulation layer31into a plurality of encapsulation sections arranged at intervals.

In some optional embodiments, the orthographic projections of the first openings311on the substrate10are in a shape of a grid.

In some optional embodiments, the first encapsulation layer31includes a plurality of encapsulation blocks312arranged at intervals, and an orthographic projection of the pixel opening22on the substrate10is located within an orthographic projection of the encapsulation block312on the substrate10.

Optionally, an orthographic projection of the light-emitting layer40on the substrate10is located within the orthographic projection of the encapsulation block312on the substrate10.

Optionally, the first openings311in the shape of a grid divide the first encapsulation layer31into a plurality of encapsulation blocks312arranged at intervals.

In the display panel provided in this embodiment of the present application, the orthographic projection of the pixel opening22on the substrate10is located within the orthographic projection of the encapsulation block312on the substrate10, so that the first encapsulation layer31ensures an encapsulation effect on the pixel opening22and can also achieve independent encapsulation of a plurality of sections.

Referring toFIG.1,FIG.7, andFIG.8,FIG.7is a top view of a display panel according to an embodiment of the present application; andFIG.8is a partial enlarged view of the display panel inFIG.7at a position A with an encapsulation layer hidden according to an example. The display panel includes a non-display area NA and a display area AA surrounded by the non-display area NA. The position A is located in the display area AA.

As shown inFIG.1,FIG.7, andFIG.8, in some optional embodiments, the display panel may further include a first electrode layer50and a first conductive line60. The first electrode layer50is located on a side of the light-emitting layer40facing away from the substrate10. The first conductive line60is connected with the first electrode layer50in an overlap manner. An orthographic projection of the first conductive line60on the substrate10at least partially overlaps with the orthographic projection of the first opening311on the substrate10.

Optionally, the first electrode layer50includes a plurality of first sub-electrodes (not marked), and each first sub-electrode is located on the side of the respective light-emitting layer40facing away from the substrate10.

Optionally, the first conductive line60is connected with the first electrode layer50in an overlap manner, so that the plurality of first sub-electrodes connectable to the same power voltage through the first conductive line60.

Optionally, the first conductive line60and the first electrode layer50are arranged in different layers.

In some optional embodiments, the encapsulation layer30may further include a second encapsulation layer32. The second encapsulation layer32is located on a side of the first encapsulation layer31facing away from the substrate10, and at least part of the second encapsulation layer32is located within the first opening311.

Optionally, the second encapsulation layer32is provided with an entire surface.

Optionally, the orthographic projection of the first opening311on the substrate10is within an orthographic projection of the second encapsulation layer32on the substrate10.

In the display panel provided in this embodiment of the present application, with the arrangement of the second encapsulation layer32on the side of the first encapsulation layer31facing away from the substrate10, the second encapsulation layer32is configured to encapsulate the first conductive line60below the first opening311to improve an encapsulation effect of the display panel.

In some optional embodiments, the first conductive line60is located on the side of the pixel defining layer20facing away from the substrate10.

Optionally, the orthographic projection of the first conductive line60on the substrate10is in a shape of a grid. The orthographic projection of the first conductive line60on the substrate10at least partially overlaps with the orthographic projection of the first opening311on the substrate10.

Referring toFIG.2,FIG.2is a partial sectional view of a display panel according to another embodiment of the present application.

Optionally, as shown inFIG.2, a side of the pixel defining portion21facing away from the substrate10is provided with a first groove (not marked), and at least part of the first conductive line60is located in the first groove.

In the display panel provided in this embodiment of the present application, the side of the pixel defining portion21facing away from the substrate10is provided with the first groove accommodating the first conductive line60, which reduces an overall thickness of the display panel, thereby increasing application scenarios of the display panel.

Referring toFIG.3,FIG.3is a partial sectional view of a display panel according to yet another embodiment of the present application.

As shown inFIG.3, in some optional embodiments, the first conductive line60includes a first conductive portion61and a connecting portion62. The connecting portion62connects the first conductive portion61with the first electrode layer50.

Optionally, the display panel may further include a second electrode layer70. The second electrode layer70is located between the substrate10and the pixel defining layer20. The first conductive portion61and the second electrode layer70are arranged in the same layer.

Optionally, the first conductive portion61is insulated from the second electrode layer70. The second electrode layer70and the first electrode layer50interact with each other to drive the light-emitting layer40to emit light. One of the first electrode layer50and the second electrode layer70is an anode, and the other is a cathode. In this embodiment of the present application, the second electrode layer70is an anode, and the first electrode layer50is a cathode.

Optionally, the substrate10may include a base and a circuit layer. The circuit layer may include a driving circuit. For example, the circuit layer may include a first conductive layer, a second conductive layer, and a third conductive layer that are arranged on one side of the base and stacked. Insulating layers are arranged between adjacent conductive layers. Exemplarily, a pixel driving circuit arranged on the circuit layer includes a transistor and a storage capacitor. The transistor includes a semiconductor, a gate, a source, and a drain. The storage capacitor includes a first plate and a second plate. As an example, the gate and the first plate may be located on the first conductive layer, the second plate may be located on the second conductive layer, and the source and the drain may be located on the third conductive layer.

In the display panel provided in this embodiment of the present application, with the arrangement of the first conductive portion61and the second electrode layer70in the same layer, the overall thickness of the display panel is further reduced.

In some other optional embodiments, the first conductive portion61and the second electrode layer70are arranged in different layers, and the first conductive portion61is located within the substrate10. The first conductive portion61may be arranged in the same layer as another conductive layer in the display panel. Exemplarily, the first conductive portion61may be arranged in the same layer as one of the first conductive layer, the second conductive layer, and the third conductive layer in the circuit layer.

In some optional embodiments, the pixel defining portion21is provided with a second opening (not marked) penetrating through the pixel defining portion21along the thickness direction z, and the connecting portion62connects the first conductive portion61with the first electrode layer50through the second opening.

Optionally, an orthographic projection of the connecting portion62on the substrate10is located outside the orthographic projection of the first opening311on the substrate10.

In the display panel provided in this embodiment of the present application, the orthographic projection of the connecting portion62on the substrate10is located outside the orthographic projection of the first opening311on the substrate10, so that the first electrode layer50is connectable to the connecting portion62in an overlap manner without extending below the first opening311, ensuring an encapsulation effect of the encapsulation block312on the first electrode layer50. The orthographic projection of the connecting portion62on the substrate10is located outside the orthographic projection of the first opening311on the substrate10, so that the connecting portion62is sealed by the encapsulation block312. Moreover, the first conductive portion61is located between the pixel defining layer20and the substrate10, which means that the first conductive portion61is encapsulated by the pixel defining portion21, the first conductive line60is encapsulated jointly by the encapsulation block312and the pixel defining portion21, and there is no need to fill the first opening311with an encapsulation material, thereby reducing manufacturing processes, improving production efficiency, reducing a number of encapsulation layers, and also reducing the overall thickness of the display panel.

In some optional embodiments, the display panel further includes a power line (not shown). The power line is configured to provide a power voltage for the first electrode layer50. The power line includes a first power line and a second power line insulated from each other. The first electrode layer50corresponding to adjacent pixel openings22is electrically connected to the first power line and the second power line respectively through two first conductive lines60.

Optionally, the first power line and the second power line may provide different power voltages for the first electrode layer50, and by electrically connecting the first electrode layer50corresponding to adjacent pixel openings22to the first power line and the second power line respectively through the two first conductive lines60, partition control over the light-emitting layer40is realized.

In some optional embodiments, a material of the first encapsulation layer31includes an inorganic material, that is, the first encapsulation layer31is an inorganic encapsulation layer. The inorganic encapsulation layer may be manufactured by chemical vapor deposition, which can improve compactness of the first encapsulation layer31, thereby improving an encapsulation effect of the encapsulation layer30.

Referring toFIG.4,FIG.4is a partial sectional view of a display panel according to still another embodiment of the present application.

Optionally, as shown inFIG.4, the encapsulation layer30further includes a second encapsulation layer32located on the side of the first encapsulation layer31facing away from the substrate10. A material of the second encapsulation layer32includes an organic material. That is, the second encapsulation layer32is an organic encapsulation layer. The organic encapsulation layer may be manufactured by inkjet printing, so that the encapsulation layer30has an appropriate thickness.

Optionally, at least part of the second encapsulation layer32is located within the first opening311.

Optionally, the encapsulation layer30may further include a third encapsulation layer33located on a side of the second encapsulation layer32facing away from the substrate10. A material of the third encapsulation layer33includes an inorganic material. That is, the third encapsulation layer33is an inorganic encapsulation layer. Adding an inorganic encapsulation layer outside the organic encapsulation layer can further improve the encapsulation effect of the encapsulation layer30.

Optionally, the encapsulation layer may further include a fourth encapsulation layer (not shown) located between the first encapsulation layer31and the second encapsulation layer32. A material of the fourth encapsulation layer includes an inorganic material, further improving the encapsulation effect of the encapsulation layer30.

Optionally, the material of the first encapsulation layer31is the same as that of the third encapsulation layer33. Therefore, the first encapsulation layer31and the third encapsulation layer33can be manufactured with a same device, which can simplify a manufacturing process of the display panel.

Referring toFIG.5,FIG.5is a partial sectional view of a display panel according to a further embodiment of the present application.FIG.1may be understood as a state of the display panel inFIG.5after an isolation structure is removed.

In some optional embodiments, during the manufacturing of the display panel, firstly, the second electrode layer70, the pixel defining layer20, and the first conductive line60are manufactured on the substrate10, and then a patterned isolation structure80is manufactured on the side of the pixel defining layer20facing away from the substrate10. Then, the light-emitting layer40and the first electrode layer50are sequentially formed via evaporation-deposition in an opening surrounded by the isolation structure80, and a first encapsulation layer31is then manufactured for encapsulation. The first encapsulation layer31does not completely cover the isolation structure80, and the isolation structure80divides the first encapsulation layer31, the light-emitting layer40, and the first electrode layer50into a plurality of independent sections. Then, the isolation structure80is removed by an etching process. A space left after the isolation structure80is removed is the first opening311. Finally, another encapsulation layer is manufactured on the side of the first encapsulation layer31facing away from the substrate10as required.

Optionally, a material of the isolation structure80includes a metal material. In the display panel provided in this embodiment of the present application, the opening is surrounded by the isolation structure, and the light-emitting layer40is formed via evaporation-deposition in the opening, so that there is no need to use a precision mask to form the light-emitting layer40via evaporation-deposition, which can simplify the manufacturing process of the display panel and can also improve resolution of the display panel without process limitations of the precision mask. In the display panel manufactured with the precision mask, lateral leakage is prone to occur between adjacent pixels, and the first electrode layer is manufactured by entire-surface evaporation-deposition, resulting in a small thickness and high impedance. However, in the display panel provided in this embodiment of the present application, the first conductive line60is thicker, which reduces the impedance, thereby reducing power consumption of the display panel. Secondly, by removing the isolation structure after the evaporation-deposition of the light-emitting layer40, the overall thickness of the display panel is reduced.

As shown inFIG.3andFIG.4, a further embodiment of the present application further provides a display panel. The display panel includes the substrate10, the pixel defining layer20, the first electrode layer50, and the first conductive line60. The pixel defining layer20is arranged on the substrate10, the pixel defining layer20includes the pixel defining portion21and the pixel opening22surrounded by the pixel defining portion21, and the light-emitting layer40is provided in the pixel opening22. The first electrode layer50is located on the side of the light-emitting layer40facing away from the substrate10. The first conductive line60includes the first conductive portion61which is located between the substrate10and the pixel defining layer20. The first conductive portion61is electrically connected to the first electrode layer50.

In the display panel provided in this embodiment of the present application, the display panel includes the substrate10, the pixel defining layer20, the first electrode layer50, and the first conductive line60. The pixel defining layer20is arranged on the substrate10, the pixel defining layer20includes the pixel defining portion21and the pixel opening22surrounded by the pixel defining portion21, and the light-emitting layer40is provided in the pixel opening22. The first electrode layer50is located on the side of the light-emitting layer40facing away from the substrate10. The first conductive line60includes a first conductive portion61, and the first conductive portion61is electrically connected to the first electrode layer50. By locating the first conductive portion61between the substrate10and the pixel defining layer20, a space between the pixel defining layer20and the substrate10is fully utilized to arrange the first conductive portion61, thereby reducing the overall thickness of the display panel. By locating the first conductive portion61between the substrate10and the pixel defining layer20, the first conductive portion61is encapsulated by the pixel defining layer20, thereby reducing the encapsulating process and improving production efficiency.

In some optional embodiments, the display panel may further include the encapsulation layer30. The encapsulation layer30is located on the side of the pixel defining layer20facing away from the substrate10. The encapsulation layer30includes a first encapsulation layer31. The first encapsulation layer31is provided with the first opening311penetrating through the first encapsulation layer31along the thickness direction z.

Optionally, the orthographic projection of the first opening311on the substrate10is located between orthographic projections of adjacent pixel openings22on the substrate10. The first encapsulation layer31includes a plurality of encapsulation blocks312arranged at intervals. The orthographic projection of the pixel opening22on the substrate10is located within the orthographic projection of the encapsulation block312on the substrate10. In some optional embodiments, the display panel may further include a second electrode layer70. The second electrode layer70is located between the substrate10and the pixel defining layer20. The first conductive portion61and the second electrode layer70are arranged in the same layer.

In the display panel provided in this embodiment of the present application, by arranging the first conductive portion61and the second electrode layer70in the same layer, an internal space is fully utilized, and the overall thickness of the display panel is further reduced.

In some optional embodiments, the first conductive line60further includes a connecting portion62, and the connecting portion62connects the first conductive portion61with the first electrode layer50.

Optionally, the pixel defining portion21is provided with the second opening penetrating through the pixel defining portion21along the thickness direction z, and the connecting portion62connects the first conductive portion61with the first electrode layer50through the second opening.

Optionally, the orthographic projection of the connecting portion62on the substrate10is located outside the orthographic projection of the first opening311on the substrate10.

In the display panel provided in this embodiment of the present application, the orthographic projection of the connecting portion62on the substrate10is located outside the orthographic projection of the first opening311on the substrate10, so that the first electrode layer50is connectable with the connecting portion62in an overlap manner without extending below the first opening311, ensuring an encapsulation effect of the encapsulation block312on the first electrode layer50.

In some optional embodiments, an orthographic projection of the first conductive portion61on the substrate10is located between orthographic projections of adjacent pixel openings22on the substrate10.

In some optional embodiments, the display panel further includes a power line, the power line is configured to provide a power voltage for the first electrode layer50, and the power line includes a first power line and a second power line insulated from each other. The first electrode layer50corresponding to adjacent pixel openings22is electrically connected to the first power line and the second power line respectively through two first conductive lines60.

Optionally, the first power line and the second power line may provide different power voltages for the first electrode layer50, and by electrically connecting the first electrode layer50corresponding to adjacent pixel openings22to the first power line and the second power line respectively through the two first conductive lines60, independent partition control over the light-emitting layer40is realized.

As shown inFIG.1andFIG.2, a further embodiment of the present application further provides a display panel. The display panel includes the substrate10, the pixel defining layer20, the first electrode layer50, and the first conductive line60. The pixel defining layer20is arranged on the substrate10. The pixel defining layer20includes the pixel defining portion21and the pixel opening22surrounded by the pixel defining portion21. The light-emitting layer40is provided in the pixel opening22. The first electrode layer50is located on the side of the light-emitting layer40facing away from the substrate10. The first conductive line60is located on the side of the pixel defining layer20away from the substrate10, and the first conductive line60is connected with the first electrode layer50in an overlap manner.

In some optional embodiments, the display panel may further include the encapsulation layer30. The encapsulation layer30is located on the side of the pixel defining layer20facing away from the substrate10, and the encapsulation layer30includes the first encapsulation layer31. The first encapsulation layer31is provided with the first opening311penetrating through the first encapsulation layer31along the thickness direction z.

Optionally, the orthographic projection of the first opening311on the substrate10is located between orthographic projections of adjacent pixel openings22on the substrate10. The first encapsulation layer31includes a plurality of encapsulation blocks312arranged at intervals, and the orthographic projection of the pixel opening22on the substrate10is located within the orthographic projection of the encapsulation block312on the substrate10.

In some optional embodiments, the orthographic projection of the first conductive line60on the substrate10is located between orthographic projections of adjacent pixel openings22on the substrate10.

In some optional embodiments, the orthographic projection of the first conductive line60on the substrate10is in a shape of a grid.

Optionally, the side of the pixel defining portion21facing away from the substrate10is provided with the first groove (not marked), and at least part of the first conductive line60is located in the first groove.

In the display panel provided in this embodiment of the present application, the side of the pixel defining portion21facing away from the substrate10is provided with the first groove accommodating the first conductive line60, which reduces an overall thickness of the display panel, thereby increasing application scenarios of the display panel.

Referring toFIG.6,FIG.6is a partial sectional view of a display panel according to a further embodiment of the present application.

As shown inFIG.6, a further embodiment of the present application further provides a display panel. The display panel includes the substrate10, the pixel defining layer20, and the encapsulation layer30. The pixel defining layer20is arranged on the substrate10. The pixel defining layer20includes the pixel opening22. The light-emitting layer40is provided in the pixel opening22. The encapsulation layer30is located on the side of the pixel defining layer20facing away from the substrate10. The encapsulation layer30includes a first encapsulation portion301and a second encapsulation portion302. The orthographic projection of the pixel opening22on the substrate10is within an orthographic projection of the first encapsulation portion301on the substrate10. An orthographic projection of the second encapsulation portion302on the substrate10is located between orthographic projections of adjacent pixel openings22on the substrate10. A thickness of the second encapsulation portion302is less than that of the first encapsulation portion301.

In some optional embodiments, the pixel defining layer20may further include the pixel defining portion21, and the pixel opening22is surrounded by the pixel defining portion21.

In some optional embodiments, the encapsulation layer30includes the first encapsulation layer31and the second encapsulation layer32, the first encapsulation layer31is located between the second encapsulation layer32and the pixel defining layer20. The first encapsulation layer31is provided with the first opening311penetrating through the first encapsulation layer31along the thickness direction z. The orthographic projection of the first opening311on the substrate10is located between the orthographic projections of the adjacent pixel openings22on the substrate10.

Optionally, the first encapsulation layer31includes a plurality of encapsulation blocks312arranged at intervals, and the orthographic projection of the pixel opening22on the substrate10is located within the orthographic projection of the encapsulation block312on the substrate10. The first opening311in the shape of a grid divides the first encapsulation layer31into a plurality of encapsulation blocks312arranged at intervals.

Optionally, at least part of the second encapsulation layer32is located in the first opening311, so that a second groove321is formed on the side of the encapsulation layer30facing away from the pixel defining layer20. An orthographic projection of the second groove321on the substrate10at least partially overlaps with the orthographic projection of the first opening311on the substrate10, and the orthographic projection of the second groove321on the substrate10overlaps with the orthographic projection of the second encapsulation portion302on the substrate10.

Optionally, the first encapsulation portion301corresponds to an area where the encapsulation block312and the second encapsulation layer32are stacked, and the second encapsulation portion302corresponds to an area where the second groove321is located, that is, an area where the second encapsulation layer32fills the first opening311. Therefore, a thickness of the first encapsulation portion301is a sum of the thickness of the encapsulation block312and the thickness of the second encapsulation layer32(a dimension H1in the figure). A thickness of the second encapsulation portion302is the thickness of the second encapsulation layer32(a dimension H2in the figure). The dimension H2is less than the dimension H1, and the thickness of the second encapsulation portion302is less than the thickness of the first encapsulation portion301.

An embodiment of a second aspect of the present application further provides a display apparatus, including the display panel in any one of the above embodiments in the first aspect. Since the display apparatus provided in the embodiment of the second aspect of the present application includes the display panel in any one of the above embodiments in the first aspect, the display apparatus provided in the embodiment of the second aspect of the present application has the beneficial effects of the display panel in any one of the above embodiments in the first aspect. Details are not described herein again.

The display apparatus in the embodiments of the present application includes, but is not limited to, a mobile phone, a personal digital assistant (PDA), a tablet computer, an e-book, a television, an access control, a smart fixed phone, a console, and other devices with a display function.

Referring toFIG.1toFIG.6, another embodiment of the present application further provides a method for manufacturing a display panel, applied to the display panel in any one of the above embodiments in the first aspect. The method includes: providing the substrate10; forming the second electrode layer70and the pixel defining layer20on the substrate10; manufacturing the patterned isolation structure80on the side of the pixel defining layer20facing away from the substrate10, the opening being surrounded by the isolation structure80; sequentially evaporating-and-depositing the light-emitting layer40and the first electrode layer50in the opening; forming the first encapsulation layer31on the side of the first electrode layer50facing away from the substrate10; and etching away the isolation structure80to form the first opening311.

The above are merely specific implementations of the present application. It may be clearly understood by those skilled in the art that, for the purpose of convenient and brief description, detailed working processes of the systems, modules, and units described above may be obtained with reference to the corresponding processes in the foregoing method embodiments, which are not described herein again. It should be understood that the protection scope of the present application is not limited thereto. Any person skilled in the art can readily figure out various equivalent modifications or replacements within the technical scope disclosed in the present application, and such modifications or replacements shall fall within the protection scope of the present application.