Wafer scale heat slug system

A wafer scale heat slug system is presented providing dicing an integrated circuit from a semiconductor wafer, forming a heat slug blank equivalent in size to the semiconductor wafer, dicing the heat slug blank to produce a heat slug equivalent in size to the integrated circuit, attaching the integrated circuit to a substrate, attaching the heat slug to the integrated circuit and encapsulating the integrated circuit.

TECHNICAL FIELD

The present invention relates generally to integrated circuit package systems, and more particularly to a system for wafer scale heat slug.

BACKGROUND ART

An integrated circuit (IC) die is often fabricated into a microelectronic device such as a microprocessor. The increasing power consumption of microprocessors results in tighter thermal constraints for a thermal solution design when the microprocessor is employed in the field. If the transistors of the integrated circuit get too hot they can be damaged. Accordingly, a thermal interface is often needed to allow the integrated circuit to release heat more efficiently. A thermal interface can include such things as a heat sink or fan.

Various techniques have been employed to transfer heat away from a die. These techniques include passive and active configurations. One passive configuration involves a conductive material in thermal contact with the backside of a packaged die. This conductive material is often a slug, a heat spreader, or an integrated heat spreader (IHS).

A heat spreader is employed to spread and dissipate the heat generated by a die, which minimizes concentrated high-heat locations within the die. A heat spreader is attached proximately to the back side of a microelectronic die with a thermally conductive material, such as a thermal interface material (TIM). A TIM can include, for example, thermally conductive gels, thermal greases, or solders. Heat spreaders include materials such as aluminum, copper, copper alloy, or ceramic, among others.

With conventional technology, a packaged microelectronic device includes a die which is bonded from the back side to an integrated heat spreader (IHS). An IHS adhesive layer acts as a TIM to bond the die to the IHS. The conventional IHS includes a lip portion that is formed by a bending process which gives rise to less than complete filling into the corner of the bend. Additionally to form the lip portion of the IHS from a rectangular blank, several stamping processes are required to deliver sufficiently flat upper and lower surfaces to achieve quality bonds with other structures such as heat sinks and dies, respectively. These stamping processes result in a relatively low yield in the production of heat spreaders, due, at least in part, to the processes used for forming heat spreaders. Additionally, the stamping processes result in a significant variation in flatness of the top surface of the IHS, as well as the bottom surface. The surface flatness can detrimentally affect adhesion to either side of the IHS.

The current IHS, typically manufactured from a high purity copper alloy, is difficult to form with existing stamping equipment limitations, especially with respect to maintaining high raw material yield metrics and fully-filled corner geometries that are achieved with the stamping process. In order to completely fill the corner locations of the IHS, typical industry raw material yields range as low as 35%, yet utilize multi-stage manufacturing with high-tonnage machinery. The surface flatness is a large contributor to the fall-out and yield problems. Thus far the manufacture of finished packages with heat spreaders has been expensive and time consuming.

Thus, a need still remains for a wafer scale heat slug system that can deliver good thermal performance, package integrity and can use existing assembly tools. In view of the ever increasing performance and shrinking space for integrated circuits, it is increasingly critical that answers be found to these problems.

DISCLOSURE OF THE INVENTION

The present invention provides a wafer scale heat slug system comprising dicing an integrated circuit from a semiconductor wafer, forming a heat slug blank equivalent in size to the semiconductor wafer, dicing the heat slug blank to produce a heat slug equivalent in size to the integrated circuit, attaching the integrated circuit to a substrate, attaching the heat slug to the integrated circuit and encapsulating the integrated circuit.

BEST MODE FOR CARRYING OUT THE INVENTION

Likewise, the drawings showing embodiments of the apparatus are semi-diagrammatic and not to scale and, particularly, some of the dimensions are for the clarity of presentation and are shown greatly exaggerated in the drawing FIGs. Also, where multiple embodiments are disclosed and described, having some features in common, for clarity and ease of illustration, description, and comprehension thereof, similar and like features one to another will ordinarily be described with like reference numerals.

The term “horizontal” as used herein is defined as a plane parallel to the conventional plane or surface of the heat slug, regardless of its orientation. The term “vertical” refers to a direction perpendicular to the horizontal as just defined. Terms, such as “on”, “above”, “below”, “bottom”, “top”, “side” (as in “sidewall”), “higher”, “lower”, “upper”, “over”, and “under”, are defined with respect to the horizontal plane. The term “processing” as used herein includes deposition of material or photoresist, patterning, exposure, development, etching, cleaning, and/or removal of the material or photoresist as required in forming a described structure.

Referring now toFIG. 1, therein is shown a top view of a wafer scale heat slug system100, in a wafer scale mounting process, in an embodiment of the present invention. The top view depicts a wafer frame102, a dicing tape104and a heat slug blank106.

The heat slug blank106is bonded on to the dicing tape104. The dicing tape104may be of a type used with semiconductor wafers and maintains the substantially fixed position of the heat slug blank106during the dicing with a saw (not shown). At the completion of the dicing process, the dicing tape104is exposed to one of several release processes, such as ultra-violet (UV) release, though it is understood that several other removal processes could be used on the dicing tape104. In the UV release process the dicing tape104is exposed to UV light for a period of time causing the adhesive of the dicing tape104to release the singulated parts of the heat slug blank106.

Referring now toFIG. 2A, therein are shown a top view of the heat slug blank106, in an embodiment of the present invention. The top view of the heat slug blank106depicts a heat slug top202having a heat slug pedestal204arranged in an array on the heat slug top202. The heat slug blank106is fabricated by stamping and cold forging or chemically etching a blank sheet of thermally conductive material, such as aluminum, copper, copper alloy or other thermally conductive material.

The heat slug pedestal204is specially designed with dimensions for predetermined integrated circuits. The dimensions and position of the heat slug pedestal204are tightly controlled during the cold forging process then may be etched to substantially equivalent dimensions of chip scale precision. This provides maximum area interface between the heat slug pedestal204and the surface of the integrated circuit for maximum heat transfer.

A saw guide208is pressed in, during the cold forging process, or chemically etched into the heat slug top202. The thickness of the heat slug top202within the area of the saw guide208is thinner than the surrounding area of the heat slug top202. The saw guide208is used as an aid during the dicing process for a laser or dicing saw alignment and to reduce the dicing saw wear, during the singulation process.

Referring now toFIG. 2B, therein is shown a bottom view of the heat slug blank106, in an embodiment of the present invention. The bottom view of the heat slug blank106depicts a heat slug back206that is substantially planar. The heat slug blank106is fabricated by stamping and cold forging or chemically etching a blank sheet of thermally conductive material, such as aluminum, copper, copper alloy or other thermally conductive material.

Referring now toFIG. 3, therein is a cross-sectional view of a heat slug300. The heat slug300is one part of the heat slug blank106ofFIG. 1in a singulated state. The cross-sectional view depicts the heat slug300having a heat spreader302on the heat slug pedestal204. The heat spreader302has two sides, a spreader top side304and a spreader pedestal side306. The relative sizes of the heat spreader302and the heat slug pedestal204are exemplary, and it is understood that the size and thickness of the heat spreader302and the precise dimensions of the heat slug pedestal204are independent of each other. The dimensions of the heat slug pedestal204are determined by the dimensions of a target integrated circuit. In general the heat spreader302may be wider than the heat slug pedestal204.

The larger surface area of the spreader top side304and the exposure to the ambient air establishes a heat gradient in the heat slug300. Heat generated by a chip in contact with the heat slug pedestal204is drawn into the heat slug pedestal204and moves to the heat spreader302for transfer to the ambient air. The precise dimensions of the heat slug pedestal are set to provide as much surface contact as possible with the target integrated circuit.

Referring now toFIG. 4therein is shown a cross-sectional view of the heat slug300, mounted in an integrated circuit package assembly400, in an embodiment of the present invention. The cross-sectional view depicts an integrated circuit402mounted on a substrate404, having a substrate top406and a substrate bottom408, and bond wires410electrically attaching the integrated circuit402to the substrate top406. A thermal interface material412(TIM), such as a die attach adhesive or thermal epoxy, is used to attach the heat slug300to the integrated circuit402. A molding compound414is injected into the space between the substrate top406and the spreader pedestal side306to encapsulate and protect the integrated circuit402and the bond wires410. The molding compound414establishes structural integrity for the integrated circuit package assembly400as well. Electrical interface structures416, such as solder balls, are attached to the substrate bottom408for connection to the next level of system (not shown).

The heat slug300provides a direct thermal path from the integrated circuit402to the ambient air. By attaching directly to the integrated circuit402, the heat slug300allows for maximum heat transfer out of the integrated circuit402. During the assembly process the heat slug300is mounted in a manner similar to the first integrated circuit. The die attach machine used to attach the integrated circuit402is also used to apply the thermal interface material412and attach the heat slug300.

Referring now toFIG. 5, therein is shown a cross-sectional view of an integrated circuit package assembly500with a heat spreader502in an alternative embodiment of the present invention. The heat spreader502is a flat, wafer scale heat slug. The cross-sectional view depicts the integrated circuit package assembly500, such as a QFN package, having the heat spreader502mounted on an integrated circuit504, having an active side506and an inactive side508. The integrated circuit504is flip chip mounted and electrically connected to a QFN substrate510. Electrical interconnects512, such as solder balls, physically and thermally connect the active side506of the integrated circuit504to the QFN substrate510. An under-fill material514is injected between the QFN substrate510and the active side506of the integrated circuit504. The thermal interface material412is used to attach the heat spreader502to the inactive side508of the integrated circuit504.

The heat spreader502is fabricated by stamping and cold forging or chemically etching a blank sheet of thermally conductive material, such as aluminum, copper, copper alloy or other thermally conductive material. The saw guide208is pressed in, during the cold forging process, or chemically etched into the heat slug top202. The heat spreader502is singulated from the wafer scale heat slug system100by the dicing process.

One side of the heat spreader502is exposed to the ambient air while the other side is attached to the integrated circuit504. The molding compound414is injected into the space between the QFN substrate510and the heat spreader502, giving the integrated circuit package assembly500, structural integrity and protecting the integrated circuit504.

Referring now toFIG. 6, therein is shown a flow chart of a heat slug system600for manufacturing the integrated circuit package assembly400in an embodiment of the present invention. The system600includes dicing an integrated circuit from a semiconductor wafer in a block602; forming a heat slug blank equivalent in size to the semiconductor wafer in a block604; dicing the heat slug blank to produce a heat slug equivalent in size to the integrated circuit in a block606; attaching the integrated circuit to a substrate in a block608; attaching the heat slug to the integrated circuit in a block610; and encapsulating the integrated circuit in a block612.

In greater detail, a method to fabricate the wafer scale heat slug system100, according to an embodiment of the present invention, is performed as follows:1. Dicing the integrated circuit402from a semiconductor wafer, wherein the dicing tool is a laser or a dicing saw. (FIG. 4)2. Forming the heat slug blank106about the same size as the semiconductor wafer, wherein the heat slug blank106comprises a thermally conductive material. (FIG. 4)3. Dicing the heat slug blank106into the heat slug300of equivalent size to the integrated circuit402, wherein the dicing tool is a laser or a dicing saw. (FIG. 4)4. Attaching the integrated circuit402to the substrate404; (FIG. 4)5. Attaching the heat slug300to the integrated circuit402with the thermal interface material412; (FIG. 4)6. Encapsulating the integrated circuit with the molding compound, wherein the molding compound providing structural integrity and protects the integrated circuit. (FIG. 4)

It has been discovered that the addition of a wafer scale heat slug attached to the integrated circuit has a significant impact on the reduction of junction temperature of the integrated circuit. This reduction in junction temperature translates into an increase in reliability of the integrated circuit.

It has been discovered that the present invention thus has numerous aspects.

An aspect is that the present invention significantly reduces the junction temperature of the integrated circuit attached to the heat slug. This aspect of the invention is achieved without developing any new tooling or fabrication materials. This invention also extends the useful application of existing integrated circuit manufacturing tools for adhesive application and chip attach.

Another aspect is that more densely packed circuitry can be packaged without trading off reliability of the integrated circuit.

Another aspect of the invention is that the same tools used in processing the semiconductor wafers can be used in processing the heat slug wafer.

Thus, it has been discovered that the wafer scale heat slug system method and apparatus of the present invention furnish important and heretofore unknown and unavailable solutions, capabilities, and functional aspects for packaging and operating integrated circuits with reduced junction temperatures. The resulting processes and configurations are straightforward, cost-effective, uncomplicated, highly versatile and effective, can be implemented by adapting known technologies, and are thus readily suited for efficiently and economically manufacturing high power integrated circuit devices that are fully compatible with conventional manufacturing processes and technologies. The resulting processes and configurations are straightforward, cost-effective, uncomplicated, highly versatile and effective, and can be implemented by adapting known components for ready, efficient, and economical manufacturing, application, and utilization.