Device having an optical element and an ambient light sensor integrated on a single substrate and a process for making same

A device having one or more optical elements and an ambient light sensor integrated on a single substrate (e.g., wafer) and a method (e.g., process) for making same is described herein. The process includes the step of forming the ambient light sensor on a first surface of the substrate. The process further includes the step of forming a plurality of recesses in a second surface of the substrate, the second surface being located opposite the first surface. The process further includes depositing silicon dioxide into the plurality of recesses. The process further includes etching a pattern into the silicon dioxide (e.g., glass) to form the optical elements.

BACKGROUND

Ambient light sensors are currently implemented in a variety of electronic devices. For example, ambient light sensors are implemented in hand-held electronic devices, such as personal digital assistants (PDAs), mobile phones and notebook computers, for automatically adjusting the brightness of the backlight of the display (e.g., liquid crystal display (LCD) panel) of the device based upon the surrounding light level. For instance, the ambient light sensor (ALS) increases the brightness of the display's backlight when the device is being used in a brightly lit area and decreases the brightness of the display's backlight when the device is being used in a dimly lit area. This improves the user experience by making the display easier to see. Further, the ALS may automatically adjust the brightness of the display's backlight based upon the proximity of a user to the device. This promotes power savings for the device, thereby extending the life of the battery of the device.

SUMMARY

A device having one or more optical elements and an ambient light sensor integrated on a single substrate (e.g., wafer) and a method (e.g., process) for making same is described herein. The process includes the step of forming the ambient light sensor on a first surface of the substrate. The process further includes the step of forming a plurality of recesses in a second surface of the substrate, the second surface being located opposite the first surface. The process further includes depositing silicon dioxide into the plurality of recesses. The process further includes etching a pattern into the silicon dioxide (e.g., glass) to form the optical elements.

DETAILED DESCRIPTION

Overview

A number of currently available products integrate an ambient light sensor (ALS) and an optical element. Fabrication processes for making these currently available products include the steps of fabricating a first wafer (which includes the ALS), fabricating a second wafer (which includes the optical element) and bonding the first and second wafers together to form the final product. There are numerous drawbacks to these currently available products and the fabrication processes for making them.

Described herein is a device having an integrated optical element and ambient light sensor and a method for producing the device which obviates at least some of the above-referenced drawbacks associated with the currently available integrated ALS and optical element products and the processes for making the currently available integrated ALS and optical element products.

Example Fabrication Processes and Implementations

FIG. 1(FIG. 1) depicts a flowchart illustrating an example process (e.g., method) for fabricating a device having an optical element and an ambient light sensor integrated on a single substrate in accordance with an exemplary embodiment of the present disclosure. In embodiments, the method100includes the step of forming an ambient light sensor (ALS) on a first surface of the substrate (Step102).FIG. 2(FIG. 2) is a depiction of the substrate202and the ALS204formed on the substrate202in accordance with an exemplary embodiment of the present disclosure. In embodiments, the substrate202is a wafer (e.g., integrated circuit chip). For example, the wafer202is formed of semiconductor material (e.g., silicon, gallium arsenide) and is suitable for use in the fabrication of integrated circuits and/or other microelectronic devices. In embodiments, the substrate202(e.g., wafer) can have one or more integrated circuits formed therein. In various implementations, the integrated circuits can comprise digital integrated circuits, analog integrated circuits, mixed signal integrated circuits, combinations thereof, and so forth. The integrated circuits can be formed through suitable front-end-of-line (FEOL) fabrication techniques. In embodiments, the substrate202includes FEOL and necessary interconnect circuitry for configuring the device for use within electronic devices, (e.g., mobile phones, notebook computers, personal digital assistants (PDAs), etc.), such that the device is communicatively coupled with other components of the electronic device(s).

In embodiments, the ALS204is a photo detector (e.g., a photodiode) which is configured for sensing (e.g., detecting) light and converting the detected light into a voltage or current (depending on the mode of operation). In embodiments, the ALS204is a p-n junction (e.g., a p-n photodiode). In other embodiments, the ALS204is a PIN structure (e.g., a PIN photodiode). In embodiments, the ALS204has a spectral response ranging from four hundred nanometers (400 nm) to seven hundred nanometers (700 nm), with a peak sensitivity at about five hundred-sixty nanometers (560 nm). In embodiments, the ALS204is formed on a first surface (e.g., a front or top surface)206of the substrate202. In embodiments, the ALS204formed on the substrate202includes active circuitry for providing an active surface for the substrate202. For example, the active surface can be defined as a surface where electronic action of the device having the integrated optical element and ambient light sensor device occurs.

In embodiments, the method100includes a step of reducing a thickness of the substrate (Step104). In embodiments, the substrate (e.g., wafer)202is subjected to a grinding process for reducing the thickness of (e.g., removing layers of) the substrate. In embodiments, the grinding process includes mechanical backgrinding and polishing of the substrate202. For instance, a 2-step grinding process (e.g., a coarse grind, followed by a fine grind) can be implemented for reducing the thickness of (e.g., thinning) the substrate202.FIG. 3(FIG. 3) is a depiction of the substrate202including the ALS204, after the substrate202has been subjected to the thickness reduction step. In other embodiments, etching processes, such as those used in microfabrication for chemically removing layers from the surface of a semiconductor wafer during manufacturing, are implemented for reducing the thickness of the substrate202. For example, chemical etching processes, such as liquid (e.g., wet) or plasma (e.g., dry) etching processes can be implemented for reducing the thickness of the substrate202when an ultra-thin (e.g., approximately fifty micrometers thick) substrate is desired. In further embodiments, a combination of mechanical backgrinding and chemical etching processes are implemented for reducing the thickness of the substrate202. In embodiments, when reducing the thickness of the substrate202, such as via the grinding or etching processes discussed above, the process(es) is/are applied to a second surface (e.g., a back or bottom surface)208of the substrate202, the second surface208being located generally opposite (e.g., on an opposite side of the substrate from) the first surface206. In embodiments, prior to the thickness reducing step, the thickness of the substrate202can be approximately seven hundred-fifty micrometers (750 um). In embodiments, after the thickness reducing step, the thickness of the substrate202can range from about fifty micrometers (50 um) to about seventy-five micrometers (75 um). In embodiments where a backgrinding process is implemented for reducing the thickness of the substrate (e.g., wafer)202, prior to grinding, the substrate (e.g., wafer)202can be laminated with an ultraviolet (UV) curable backgrinding tape to ensure against wafer surface damage (due to backgrinding) and to prevent wafer surface contamination (due to infiltration of grinding fluid and/or debris).

In embodiments, the method100includes a step of forming a plurality of recesses (e.g., indents, cavities) in a second surface of the substrate (Step106). In embodiments, the plurality of recesses are formed in accordance with a pre-determined pattern.FIG. 4(FIG. 4) is a depiction of the substrate202after the pattern of recesses210has been formed in the substrate202. In embodiments, the recesses210are formed in the second surface (e.g., back surface)208of the substrate202and extend in a generally vertical direction within the substrate202towards the first surface206of the substrate202. In embodiments, each of the recesses210is bounded by one or more sidewalls212and a floor214. In embodiments, the plurality of recesses is formed via photolithography and chemical etching processes. For example, a photoresist can be applied to the second surface208of the substrate202, the photoresist having the pre-determined pattern formed on it. The pattern is then exposed to light (e.g., UV light), followed by the second surface208of the substrate202being etched to form the plurality of recesses210. In embodiments, the recesses210are formed by a chemical etching process, such as a liquid (wet) or plasma (dry) etching process. For example, etching processes such as a deep reactive-ion etching (DRIE) process or a potassium hydroxide (KOH) etching process can be implemented. In embodiments, the etching process for forming the plurality of recesses210is selected based upon the desired shape of the recesses. For example, the DRIE process can be implemented when rectangular recesses (e.g., recesses with truly vertical sidewalls) are desired (such as the sidewalls212shown inFIG. 4), or the KOH etching process can be implemented when recesses with sloped (e.g., angled) sidewalls (e.g., trapezoidal recesses) are desired. In embodiments, the DRIE process and the KOH etching process are implemented in combination for providing recesses210having shapes which are a combination of a rectangular and trapezoidal shapes. As mentioned above, the recesses210extend towards the first surface206of the substrate202. In embodiments, the recesses210are formed so that they approach, but do not physically contact, the ALS204(e.g., the active surface), as shown inFIG. 4. In alternative embodiments, if the substrate (e.g., wafer)202is a silicon on insulator (SOI) wafer, the recesses210would be formed such that the floors (e.g., bottoms)214of the recesses would stop at the oxide interface.

In embodiments, the method100includes a step of depositing silicon dioxide (SiO2) into the recesses (Step108). In embodiments, the deposited silicon dioxide forms glass216.FIG. 5(FIG. 5) is a depiction of the substrate202after the silicon dioxide216has been deposited within the recesses210and has formed glass216. In embodiments, the silicon dioxide216is deposited into the recesses210via a chemical vapor deposition (CVD) process. For example, the recesses can be completely filled such that a surface (e.g., top surface)218of the silicon dioxide (e.g., glass)216is co-planar with (e.g. located at) the second (e.g., bottom, back) surface208of the substrate202.

In embodiments, the method100includes a step of etching a pattern(s) into the silicon dioxide to form a plurality of optical elements (Step110).FIG. 6(FIG. 6) is a close-up depiction of one of the recesses210of the substrate202, the depiction showing the pattern218etched into a surface (e.g., top surface)220of the silicon dioxide (e.g., glass) in the recess210to form an optical element222. In embodiments, a pattern can be etched into the surface (e.g., top surface)220of the silicon dioxide (e.g., glass)216in each of the recesses210to form the optical elements222. In embodiments, the pattern can be etched into the glass216to form the optical elements222using photolithography and chemical etching processes, such as those described above. In embodiments, the optical elements222are diffractive optical elements. In embodiments, the optical elements222are lenses. For example, the lenses222can be Fresnel lenses, ball lenses, micro lenses or other similar optical elements. In one or more embodiments, the pattern(s)218etched into the surface220of the silicon dioxide (e.g., glass)216is a Fresnel lens pattern (e.g., a pattern for creating a Fresnel lens).

In at least one embodiment, the method100can include a step of depositing a reflective coating layer upon the second surface of the substrate in a non-overlapping (e.g., non-obstructing) orientation relative to the plurality of optical elements (Step112).FIG. 7is a depiction of the substrate202after the reflective coating layer224has been deposited upon the second surface208of the substrate202. In embodiments, the reflective coating layer224is deposited upon the second surface208, such that it is adjacent to (e.g., is formed around, is located proximate to, does not overlap, does not cover, does not totally or partially obscure) any of the optical elements222. In embodiments, the reflective coating layer224is configured for providing at least some shielding for underlying circuitry of the device200from light (e.g., incident light). In embodiments, the reflective coating of the reflecting coating layer224can be an opaque material or a metal. In embodiments, the above-described configuration of the device200allows for light (e.g., incident light) to enter the device200from the second (e.g., bottom, back) surface208of the substrate202.

In embodiments, the device200resulting from (e.g., fabricated by) the steps of the method100described above is shown inFIG. 7. The above-described method100results in the formation of device200in which the ALS204and the optical elements222are integrated on a single substrate (e.g., wafer)202. Because of this, the fabrication processes described herein for producing the device200do not include a step of fabricating two separate wafers, or a wafer-to-wafer bonding step, thereby promoting low manufacturing costs, low reject rates, reliability, robustness and excellent performance. Further, because the device200includes a single substrate (e.g., wafer)202rather than multiple substrates (e.g., wafers), when the device200is implemented within electronic devices (e.g., mobile phones, notebook computers, personal digital assistants (PDAs), etc.), the device200allows those electronic devices to be configured as thin (e.g., low-profile) electronic devices.

FIG. 8(FIG. 8) depicts an embodiment of the device200in which the sidewalls212formed by the recesses210are sloped sidewalls. In embodiments where the sidewalls212formed by the recesses210are sloped, the method100can include a step of, prior to depositing silicon dioxide into the recesses, depositing a reflective coating layer onto sidewalls formed by the recesses (Step114). In embodiments, the additional reflective coating layer226is configured for providing a further degree of protection (e.g., shielding) for underlying circuitry of the device200from light (e.g., incident light). In embodiments, the reflective coating of the additional reflecting coating layer226can be an opaque material or a metal. As mentioned above, an etching process, such as a KOH etching process, can be implemented during the recess formation step to form recesses which have sloping sidewalls.

FIG. 9(FIG. 9) depicts a flowchart illustrating an example process (e.g., method) for fabricating a device having an optical element and an ambient light sensor integrated on a single substrate in accordance with a further exemplary embodiment of the present disclosure.FIG. 10(FIG. 10) is a depiction of the device300resulting from the fabrication process illustrated inFIG. 10and described below.

In embodiments, the method900includes a step of forming a metal layer on a first surface of the substrate (Step902). In embodiments, the metal layer250is formed on the first surface206of the substrate202. For example, the metal layer250can be configured as a sheet of metal (e.g., metal 1 (M1)), such that the metal layer250forms a mirror (e.g., an M1 mirror, an M1 mirror interface)250.

In embodiments, the method900includes a step of forming an ambient light sensor (ALS) on the metal layer formed on the first surface of the substrate (Step904). In embodiments, the ALS204is formed on the metal layer250.

In embodiments, the method900includes a step of reducing a thickness of the substrate (Step906). In embodiments, any one of a number of various processes (e.g., grinding processes, etching processes) as described above can be implemented for reducing the thickness of the substrate202. In embodiments, the processes implemented for reducing the thickness of the substrate are applied to the second surface208of the substrate202.

In embodiments, the method900includes a step of forming a plurality of recesses in a second surface of the substrate (Step908). In embodiments, the recesses210are formed in the second surface208of the substrate202as described above.

In embodiments, the method900includes a step of depositing silicon dioxide into the recesses (Step910). In embodiments, the silicon dioxide216is deposited into the recesses210as described above and forms glass216.

In embodiments, the method900includes a step of etching a pattern(s) into the silicon dioxide to form a plurality of optical elements (Step912). In embodiments, a pattern is etched into the top surface220of the silicon dioxide (e.g., glass)216in each of the recesses to form the optical elements220, as described above.

In at least one embodiment, the method900includes a step of depositing a reflective coating layer upon the second surface of the substrate in a non-overlapping (e.g., non-obstructing) orientation relative to the plurality of optical elements (Step914). In embodiments, the reflective coating layer224is deposited upon the second surface208, such that it is adjacent to (e.g., is formed around, is located or formed proximate to, does not overlap, does not cover, does not totally or partially obscure) any of the optical elements222. In embodiments, the reflective coating layer224is configured for providing at least some shielding for underlying circuitry of the device300from light (e.g., incident light).

FIG. 11(FIG. 11) is a partial sectional view of the device300shown inFIG. 10, the partial sectional view showing the path of incident light350within the device300. In embodiments, the device300allows for light (e.g., incident light)350to enter the device300from the second (e.g., bottom, back) surface208of the substrate202, as shown inFIG. 11. In embodiments, the light350passes through the optical elements222and is received by the ALS204. Further, the light350passes through the ALS204to the metal layer (e.g., M1 mirror)250. In embodiments, when incident light350enters the metal layer (e.g., the M1 mirror)250, the incident light creates electron-hole (e-h) pairs. In further embodiments, when incident light350reflects from the metal layer (e.g., the M1 mirror), the incident light creates electron-hole pairs. Thus, implementation of the mirror250allows for doubling of e-h pair generation and promotes increased sensitivity of the device300.

In embodiments where the sidewalls212formed by the recesses210are sloped, the method900can include a step of, prior to depositing silicon dioxide into the recesses, depositing a reflective coating layer onto sidewalls formed by the recesses (Step916). In embodiments, the additional reflective coating layer is configured for providing a further degree of protection (e.g., shielding) for underlying circuitry of the device300from light (e.g., incident light).

CONCLUSION