Different methods applied for archiving data according to their desired lifetime

A method and system for archiving data. The data are classified according to their desired lifetime and then archived in a memory using a storage method whose reliability is in accordance with the desired lifetime. For example, when storing data in the cells of an EPROM, short-term data could be archived using larger programming voltage pulse increments than for long-term data, using a lower target threshold voltage than for long-term data, using wider programming voltage pulses than for long-term data, using higher starting programming voltages than for long-term data, using fewer programming voltage pulses than for long term data, using lower maximum programming voltages than for long term data, or using more levels per cell than for long-term data.

FIELD AND BACKGROUND OF THE INVENTION

The present invention relates to data storage and, more particularly, to a method of archiving data in accordance with an expected lifetime of the data.

FIGS. 1 and 2illustrates the storage of a bit, either a zero bit or a one bit, in a cell of an electronically programmable memory (EPROM) such as a flash memory. For historical reasons, this process of storing data in a EPROM is called “programming” the EPROM. Nominally, a zero bit is represented by a cell threshold voltage V0and a one bit is represented by a cell threshold voltage V1. Initially, the cell has a nominal threshold voltage V1. For example, after a block of a flash memory has been erased, all the cells have nominal threshold voltages V1. Because of unavoidable inaccuracies in the initializations of the cells, the actual threshold voltages are distributed around the nominal threshold voltage V1according to a distribution curve10. Then, to each cell that is to store a zero bit, a train12of programming voltage pulses14is applied, in order to inject electrons from the cell's silicon substrate through the cell's oxide layer into the cell's floating gate. Because the electrons move through the oxide layer by quantum mechanical tunneling or by hot injection, and because of non-uniformities in the cells' structures, the voltage required to inject enough electrons to increase the threshold voltage from V1to V0cannot be predicted accurately in advance. The voltage of the first pulse14is a starting voltage Vs+a programming voltage increment ΔV. Every subsequent pulse14is higher than its predecessor by ΔV. After each pulse14is applied, the cell is tested to see if its threshold voltage is sufficiently close to V0. If the threshold voltage is sufficiently close to V0then the programming of cell is complete. Otherwise, the next pulse14is applied to the cell and the threshold voltage of the cell again is tested. Because the initial threshold voltages are distributed about the nominal voltage V1, and because of inaccuracies in the programming, the threshold voltages of the cells that store zero bits also are distributed about the nominal threshold voltage V0, according to a distribution curve16.

Data are read from the EPROM cells by sensing the cells' threshold voltages. A threshold voltage greater than a transition threshold voltage VThalfway between V0and V1is interpreted as a zero bit. A threshold voltage less than VTis interpreted as a one bit. Over time, primarily because of the tunneling of electrons from the floating gates back to the substrate, the distributions10and16tend to become broader. The difference between threshold voltages V0and V1is selected to be great enough so that, over the lifetime of the EPROM, the likelihoods that the lower end18of distribution16will descend below VTand that the upper end20of distribution10will ascend above VTare negligible.

SUMMARY OF THE INVENTION

As noted above, an EPROM cell is programmed by applying successive voltage pulses14to the cell and testing the cell after each pulse14to see if the cell's threshold voltage is sufficiently close to the desired nominal threshold voltage V0. This is a relatively lengthy process. A zero bit that is part of a dataset that needs to reside in the EPROM for much less than the full lifetime of the EPROM (e.g. months instead of decades) could be programmed by setting the threshold voltage of a cell to less than V0, using fewer voltage pulses14, in a shorter programming time, but with no impact on effective reliability because the voltages so programmed nevertheless would be almost certain not to drift below VTfor the useable lifetime of the dataset.

Therefore, according to the present invention there is provided a method of archiving data in a memory, including the steps of: (a) classifying the data according to a desired lifetime thereof; and (b) archiving the data in the memory using a storage method having a reliability in accordance with the desired lifetime.

Furthermore, according to the present invention there is provided a system for archiving data, including: (a) a mechanism for classifying the data according to a desired lifetime thereof; and (b) a memory having a controller operative to archive the data in the memory using a storage method having a reliability in accordance with the desired lifetime.

The present invention is a method and system for archiving data. “Archiving” is understood herein to mean storage of data in a memory device in which the data are intended to reside and be retrievable for a relatively long time. So, for example, the caching of frequently accessed data and code in a cache memory during the execution of the code is specifically excluded from the scope of the term “archiving” as understood herein. Similarly, temporary storage of data in a memory device, with the intention of copying the data to a different memory device or (subject to the caveats below) to a different location in the same memory device, is specifically excluded from the scope of the term “archiving” as understood herein. For example, Lee et al., in U.S. Pat. No. 5,930,167, teach temporary storage of data in two-level flash cells, pending the transfer of the data to multi-level flash cells for long-term storage. The temporary storage of the data in the two-level cells does not fall within the scope of the term “archiving” as understood herein, whereas the subsequent storage of the data in the multi-level cells may fall within the scope of the term “archiving” as understood herein.

Being “retrievable” means that the addresses at which the data are stored and by which the data are referenced from outside the memory device remain stable over the desired lifetime of the data. In the case of a flash memory device whose data are referenced from outside the device via logical addresses that are different from the physical addresses at which the data actually reside, the relevant addresses for defining “retrievable” are the logical addresses. Therefore, data that are stored in a certain physical location in a flash memory device and that then are copied to a different location in the flash memory device, so that the first location can be erased and recycled for housekeeping purposes such as wear leveling, may be considered to be “archived” in the flash memory device as the term “archived” is understood herein, because typically the logical addresses of those data are preserved by such a procedure even though the physical location of the data changes. Because the data are recognized from outside the flash memory device by their logical addresses, not by their physical addresses, the data are considered herein to effectively always be in the same location for retrieval even though the physical location of the data in the flash memory device changes.

Furthermore, some operations that are commonly called “caching” are considered herein to be instances of “archiving”. For example, a Web browser often “caches” some of the pages that it has found on the Internet and that are stable over time. If a user of the Web browser, while surfing the Internet, attempts to access a page that the Web browser recognizes as having been “cached”, the Web browser retrieves the page from the cache rather than downloading the page from the Internet. Typically, such pages are saved for a length of time, such as a week or a month, that is much longer than a typical Web surfing session but is much shorter than the lifetime of the memory device in which the Web browser stores the pages. Such storage is considered herein to be “archiving”. Indeed, such storage is an important application of the present invention.

According to the method of the present invention, first the data are classified according to the desired lifetime of the data. The “desired lifetime” of the data is the amount of time that the data should be accurately retrievable from the data storage medium, or memory, in which they are stored. Then the data are stored in that data storage medium using a storage method whose reliability is in accordance with the desired lifetime of the data. The “reliability” of a storage method is the length of time that data stored using the method can be retrieved from storage without significant errors. Data with a relatively long desired lifetime are stored using a relatively more reliable method. Data with a relatively short desired lifetime are stored using a relatively less reliable method.

A system of the present invention includes a mechanism for classifying the data according to the data's desired lifetime and a memory that has a controller that archives the data in the memory using a storage method whose reliability is in accordance with the desired lifetime of the data.

Examples of suitable mechanisms include a processor that runs an application that produces and classifies the data, and an input device with which a user classifies the data.

Preferably, the memory is non-volatile.

Preferably, in both the method of the present invention and the system of the present invention, the reliability of the storage method is adjustable, and is controlled by a parameter whose value is set, in accordance with how the data were classified, to achieve the desired reliability. Examples of such parameters in the context of storage in the cells of an EPROM include the programming voltage pulse increment used, the target threshold voltage, the programming voltage pulse widths used, the starting programming voltage and the number of levels per cell.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

The present invention is of a method and system for archiving data. Specifically, the present invention can be used to trade off storage reliability against storage speed, depending on the desired lifetime of the data.

The principles and operation of data archiving according to the present invention may be better understood with reference to the drawings and the accompanying description.

Returning now to the drawings,FIGS. 3 and 4illustrate the programming of a zero bit in a cell of an EPROM according to a first embodiment of the present invention, in which the storage method parameter is the programming voltage increment. A train22of programming voltage pulses with a programming voltage increment twice as large as the programming voltage increment ΔV ofFIG. 1is applied to the cell until the threshold voltage of the cell is sufficiently close to V0. The cell ofFIGS. 3 and 4is programmed in less time than the cell ofFIGS. 1 and 2, at the expense of the distribution24of the resulting threshold voltages around V0being wider than distribution16, which is shown inFIG. 3in phantom for reference. It follows that the lower end26of distribution24drifts down to VTsooner than lower end18of distribution16; but if it takes much longer than e.g. one month for lower end26to drift down to VT, this embodiment of the present invention is suitable for storing data, such as “cached” Web pages, that need to be archived for only one month. Data that need to be archived for many years are programmed as illustrated inFIGS. 1 and 2.

FIGS. 2 and 5illustrate the programming of a zero bit in a cell of an EPROM according to a second embodiment of the present invention, in which the storage method parameter is the target threshold voltage. Programming voltage pulse train12ofFIG. 2is applied to the cell, as in the prior art, but only until the threshold voltage reaches a target value that is sufficiently close to a voltage V0′ that is less than V0. Because V0′ is less than V0, the cell ofFIG. 5is programmed in less time than the cell ofFIGS. 1 and 2, at the expense of the distribution30of the resulting floating gate voltages being closer to VTthan distribution16, which is shown inFIG. 5in phantom for reference. It follows that the lower end32of distribution30drifts down to VTsooner than lower end18of distribution16; but if it takes much longer than e.g. one month for lower end32to drift down to VT, this embodiment of the present invention is suitable for storing data, such as “cached” Web pages, that need to be archived for only one month. Data that need to be archived for many years are programmed as illustrated in FIG.1.

FIGS. 3 and 6illustrate the programming of a zero bit in a cell of an EPROM according to a third embodiment of the present invention, in which the storage method parameter is the width of the programming pulses. A train28of programming pulses29having twice the width of pulses14but the same programming voltage increment ΔV is applied to the cell, until the threshold voltage of the cell is sufficiently close to V0. As in the first embodiment of the present invention, the cell ofFIG. 6is programmed in less time than the cell ofFIGS. 1 and 2, at the expense of distribution24of the resulting threshold voltages around V0being wider than distribution16. As in the first embodiment of the present invention, lower end26of distribution24drifts down to VTsooner than lower end18of distribution16; but if it takes much longer than e.g. one month for lower end26to drift down to VT, this embodiment of the present invention is suitable for storing data, such as “cached” Web pages, that need to be archived for only one month. Data that need to be archived for many years are programmed as illustrated inFIGS. 1 and 2.

FIGS. 3 and 7illustrate the programming of a zero bit in a cell of an EPROM according to a fourth embodiment of the present invention, in which the storage method parameter is the starting programming voltage. A train34, of programming pulses36, that has a higher starting voltage Vs′ than the starting voltage Vsof programming voltage pulse train12but the same programming voltage increment ΔV is applied to the cell, until the threshold voltage of the cell is sufficiently close to V0. For reference, programming voltage pulse train12also is shown inFIG. 7in phantom. As in the first three embodiments of the present invention, the cell ofFIG. 7is programmed in less time than the cell ofFIGS. 1 and 2, because starting from a higher starting voltage makes it likely that the desired threshold voltage will be reached after fewer pulses36of programming voltage pulse train34than pulses14of programming voltage pulse train12. In the illustrated example, nine pulses14of programming voltage pulse train12are needed to reach the final programming voltage pulse height Vfthat achieves the desired threshold voltage starting from starting voltage Vs, but only five pulses36of programming voltage pulse train34are needed to reach the final programming voltage pulse height Vf′ that achieves the desired threshold voltage starting from starting voltage Vs′. (Note that because of the stochastic nature of the programming process Vf′ is not necessarily equal to Vf: usually, as illustrated, Vf′ is greater than Vf, but fewer pulses36than pulses14nevertheless are needed to achieve the desired threshold voltage because programming voltage pulse train34starts from a higher starting voltage than programming voltage pulse train12.) As in the first and third embodiments of the present invention, this speed is achieved at the expense of distribution24of the resulting threshold voltages around V0being wider than distribution16. Also as in the first and third embodiments of the present invention, lower end26of distribution24drifts down to VTsooner than lower end18of distribution16; but if it takes much longer than e.g. one month for lower end26to drift down to VT, this embodiment of the present invention is suitable for storing data, such as “cached” Web pages, that need to be archived for only one month. Data that need to be archived for many years are programmed as illustrated inFIGS. 1 and 2.

FIGS. 3 and 7also illustrate the programming of a zero bit in a cell of an EPROM according to a fifth embodiment of the present invention, in which the storage method parameter is the maximum allowed number of programming voltage pulses. According to the prior art, pulses14of programming voltage pulse train12are applied to the cell only until the programming voltage pulse height reaches a preselected maximum Vmax. If the desired threshold voltage is not achieved, even using a programming voltage pulse14whose height is Vmax, the cell is deemed defective. Programming voltage pulse train12reaches Vmaxafter sixteen pulses14. Programming voltage pulse train34reaches Vmaxafter only eight pulses36.

In a sixth embodiment of the present invention, the storage method parameter is the maximum programming voltage. Programming voltage pulse train12is used, but up to a maximum programming voltage pulse height of Vmax′ that is lower than Vmax. This saves time, at the expense of a higher probability that the cell will be deemed defective.

FIG. 8illustrates the programming of a zero bit in a cell of an EPROM according to a seventh embodiment of the present invention, in which the storage method parameter is the number of voltage levels used to encode bits in each cell. Specifically,FIG. 8illustrates the programming of two bits per cell. The bit pair (1,1) is represented by a threshold voltage V11. The bit pair (1,0) is represented by a threshold voltage V10. The bit pair (0,0) is represented by a threshold voltage V00. The bit pair (0,1) is represented by a threshold voltage V01. Initially, the cell has a nominal threshold voltage V11. As in a two-level cell, the cells' actual initial threshold voltages are distributed around the nominal voltage V11, according to a distribution curve42. Then, to each cell that is to store a bit pair other than (1,1), train12of programming voltage pulses14is applied. To store the bit pair (1,0) in the cell, pulses14are applied to the cell until the cell's threshold voltage is sufficiently close to V10. To store the bit pair (0,0) in the cell, pulses14are applied to the cell until the cell's threshold voltage is sufficiently close to V00. To store the bit pair (0,1) in the cell, pulses14are applied to the cell until the cell's threshold voltage is sufficiently close to V01. Because the initial voltages on the floating gates are distributed about the nominal voltage V11, and because of inaccuracies in the programming, the threshold voltages that represent the bit pair (1,0) are distributed about the nominal voltage V10according to a distribution curve44, the threshold voltages that represent the bit pair (0,0) are distributed about the nominal voltage V00according to a distribution curve46and the threshold voltages that represent the bit pair (0,1) are distributed about the nominal voltage V01according to a distribution curve48.

When such a four-level cell is read, a threshold voltage less than a transition voltage VT1halfway between V10and V11is interpreted as the bit pair (1,1), a threshold voltage greater than VT1but less than a transition voltage VT2halfway between V00and V10is interpreted as the bit pair (1,0), a threshold voltage greater than VT2but less than a transition voltage VT3halfway between V01and V00is interpreted as the bit pair (0,0), and a threshold voltage greater than VT3is interpreted as the bit pair (0,1). In this example, V11=V1ofFIG. 1, VT2=VTofFIG. 1 and V0l=V2ofFIG. 1, so that as distributions42,44,46and48become broader over time, eventually the upper end52of distribution42drifts above VT1, the lower end54of distribution44drifts below VT1, the upper end56of distribution44drifts above VT2, the lower end58of distribution46drifts below VT2, the upper end60of distribution46drifts above VT3and the lower end62of distribution48drifts below VT3. The bit pair values then read from cells programmed as illustrated inFIG. 8are unreliable. But typically this drift, while faster than the total life of the EPROM, is slow enough to allow data to be archived for weeks or months. Therefore, according to the seventh embodiment of the present invention, data to be archived for a relatively short time are archived as illustrated inFIG. 8, and data to be archived for a relatively long time are archived as illustrated inFIGS. 1 and 2.

Chen et al., in U.S. Pat. No. 6,456,528, also teach alternate storage of data in two-level cells and multi-level cells. However, Chen et al. advocate storing data that are rewritten or refreshed frequently in two-level cells while storing more permanent data in multi-level cells because of the longer time needed to write to multi-level cells than to two-level cells. This is the opposite of what is advocated in the seventh embodiment of the present invention.

FIG. 9is a partial high-level block diagram of a system70of the present invention. System70includes a memory72(specifically a flash memory) controlled by a controller74, a processor76and standard input-output devices such as a keyboard, a mouse and a video display, represented collectively by an I/O block78. Memory72, processor74and I/O block78communicate via a common bus80. Processor74runs applications by executing the code of the applications; this executable code typically also is stored in memory72. These applications generate data that are to be archived in memory72. Some of these applications generate, along with the data, flags that are interpreted by controller74as indications as to whether the data are to be archived as short-term archival data or long-term archival data using one of the methods described above. For example, a Web browser would flag pages to be “cached” as short-term archival data. The executable application code generally is stored by the compiler that generates the code as long-term archival data. Some applications give a user the option, via I/O devices78, to select long-term archiving or short-term archiving for the data generated by these applications. The user then indicates, via I/O devices78, whether the data are to be archived as short-term archival data or long-term archival data. For example, a user of a digital camera may wish to archive some pictures “permanently” while saving other pictures only “temporarily”.