Pattern plating method for fabricating printed circuit boards

A pattern plating method for fabricating printed circuit boards begins by bonding a thin layer of copper (e.g., copper foil) to the surface of the board. A photoresist layer is laminated over the copper layer, and then selectively exposed and developed to define a desired pattern of traces. A thick, second layer of copper is deposited on the traces by electrolytic deposition, and the photoresist is then removed. The board is etched with a solution containing cupric chloride (or an ammoniacal etchant) to remove those portions of the first copper layer that are not covered by the second copper layer. The present invention also allows through-holes to be drilled at selected locations after the first layer of copper foil has been bonded to the board. A thin layer of copper is then deposited by electroless deposition to create a conductive surface in the through-holes necessary for the subsequent step of electrolytic deposition in the process above.

BACKGROUND OF THE INVENTION 
1. Field of the Invention 
The present invention relates generally to the field of printed circuit 
board fabrication. More specifically, the present invention discloses a 
pattern plating method for fabricating printed circuit boards. 
2. Statement of the Problem 
A variety of pattern plating methods have been used in the past to make 
printed circuit boards. The conventional approach that is most widely used 
in the industry starts with a board having a relatively thick layer of 
copper laminate (e.g., 1/2 to 1 oz. per square foot). If necessary, holes 
are drilled through the board and a thin layer of copper is deposited 
using electroless plating. A layer of photoresist material is deposited on 
the copper laminate to define a desired pattern of traces. Copper traces 
are deposited on the exposed portions of the copper laminate by 
electroplating. In the conventional process, a layer of tin or solder is 
deposited on top of the copper traces, and an etchant is then used to 
remove the exposed portions of the copper. The photoresist layer is then 
stripped. 
This conventional approach has several shortcomings. The etchant must 
remove an unnecessary large amount of copper, which increases 
manufacturing costs and waste treatment costs. Conventional etching 
solutions also create environmental pollution concerns. Finally, the 
etching process tends to undercut the traces. 
The prior art also includes the following patents relating to processes for 
manufacturing printed circuit boards: 
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Inventor Patent No. Issue Date 
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Kajiwara et al. 
5,262,247 Nov. 16, 1993 
van der Putten 
5,246,732 Sep. 21, 1993 
Maniwa et al. 
5,218,761 June 15, 1993 
Ahmad et al. 
5,209,817 May 11, 1993 
Konicek 3,990,926 Nov. 9, 1976 
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Kajiwara et al. disclose a thin copper foil for printed circuit boards 
having a multi-layer structure. 
Van der Putten discloses a method for electroless deposition of copper on a 
dielectric substrate to form a conductor pattern. A SiO.sub.2 layer is 
applied to the substrate. A thin metal pattern (e.g., TiW) is created on 
the SiO.sub.2 layer. Anchors are formed on the surface by subjecting the 
SiO.sub.2 layer to an under-etch treatment. Electroless copper grows 
around these anchors and thereby adheres to the substrate. 
Maniwa et al. disclose a process for manufacturing printed circuit boards. 
FIGS. 1A through 1H show the process for plating a through hole 6. A thin 
copper plating layer 7 is formed on the surfaces of the board (including 
the walls of any through holes 6) by electroless plating as shown in FIG. 
1C. An alkali-soluble photoresist film 8 is selectively applied over the 
thin copper plating layer (FIG. 1D) and a thick copper plating layer 9 is 
then deposited on the exposed portions of the thin copper plating layer 
(FIG. 1E). The photoresist 8 is stripped (FIG. 1F) using a sodium 
hydroxide solution, and those portions of the thin copper plating layer 7 
that are not masked by the thick copper plating layer 9 are etched away 
(FIG. 1G) using an etching solution that is a mixture of sulfuric acid and 
hydrogen peroxide. Maniwa et al. discuss this process primarily in the 
context of plating through holes. However, the patent also mentions that 
this process can be employed to create wiring traces on the board. 
Ahmad et al. disclose a selective plating method for forming conductive 
traces and vias on multi-level wiring structures (e.g., printed circuit 
boards) by isotropic deposition of a conductive material (e.g., copper) on 
a dielectric base. 
Konicek discloses a method for the production of a material for printed 
circuit boards in which a temporary base is coated by electroplating with 
a thin, unpatterned metallic layer. Next, the free surface of the metallic 
layer is bonded to a final base. The temporary base is then removed and 
the desired wiring pattern is produced by etching the metallic layer on 
the final base. 
3. Solution to the Problem 
None of the prior art references uncovered in the search show a method for 
fabricating printed circuit boards in accordance with the sequence of 
steps in the present invention. In particular, the present invention 
eliminates many of the shortcomings associated with conventional pattern 
plating processes for printed circuit boards. For example, the thinness of 
the initial layer of copper (e.g., copper foil) greatly reduces the amount 
of etching required, and in turn reduces manufacturing costs and 
environmental concerns. The need to overplate traces with a dissimilar 
metal (e.g., tin, tin-lead, or nickel-gold) as an intermediate step prior 
to etching is completely eliminated. In addition, the present process 
employs a cupric chloride solution as the etchant, which is less expensive 
than conventional etchants and can be easily refortified for reuse to 
reduce the environmental impact. An ammoniacal etchant could also be used. 
SUMMARY OF THE INVENTION 
This invention provides a pattern plating method for fabricating printed 
circuit boards beginning with a thin layer of copper (e.g., copper foil) 
bonded to the surface of the board. A photoresist layer is laminated over 
the copper layer, and then selectively exposed and developed to define a 
desired pattern of traces. A thick, second layer of copper is deposited on 
the traces by electrolytic deposition, and the photoresist is then 
removed. The board is etched with a solution containing cupric chloride 
(or an ammoniacal etchant) to remove those portions of the first copper 
layer that are not covered by the second copper layer. The present 
invention also allows through-holes to be drilled at selected locations 
after the first layer of copper foil has been bonded to the board. A thin 
layer of copper is then deposited by electroless deposition to provide a 
conductive surface in the through-holes necessary for the subsequent step 
of electrolytic deposition in the process above. 
A primary object of the present invention is to provide a method for 
fabricating printed circuit boards that substantially reduces 
manufacturing costs. 
Another object of the present invention is to provide a method for 
fabricating printed circuit boards that reduces waste and environmental 
hazards associated with conventional pattern plating techniques by 
eliminating the intermediate step of overplating traces with a dissimilar 
metal (e.g., tin, tin-lead, or nickel-gold). 
Yet another object of the present invention is to provide a method for 
fabricating printed circuit boards that can use an etching solution that 
is less expensive, and that can be refortified and reused to minimize 
environmental concerns. 
These and other advantages, features, and objects of the present invention 
will be more readily understood in view of the following detailed 
description and the drawings.

DETAILED DESCRIPTION OF THE INVENTION 
Turning to FIG. 1, a flowchart is provided for the present process. 
Beginning with step 101, a copper-clad material 12 is applied to the 
surface of the board 10 as shown in FIG. 2. Typically a copper foil is 
used having a thickness of approximately 1/4 oz. per square foot or less. 
As an alternative to step 101, the process can begin by bonding copper foil 
having a thickness of approximately 1/2 oz. per square foot to the surface 
of the board 10. The foil is then pre-etched to a thickness of 
approximately 0.00035 inches. The thicker foil helps to ensure a 
relatively uniform thickness over the entire board without holes or voids. 
The pre-etching step results in a copper layer that is generally 
equivalent to 1/4 oz. copper foil. After completing either alternative for 
step 101, the remaining steps are the same, as will be described below. 
At step 102, through-holes 11 are drilled to provide electrical connections 
from one side of the board 10 to the other side, or in the case of a 
multi-layer board, to provide electrical connections between layers. 
Drilling is done in the conventional manner and results in the board 10 as 
shown in FIG. 3. At step 103, a thin layer of copper 13 is deposited over 
the entire surface of the board 10 by electroless deposition a shown in 
FIG. 4. This step is necessary to create a conductive layer on the 
interior surfaces of the through-holes 11 for subsequent plating, as 
discussed below. It should be understood that steps 102 and 103 are 
optional and can be omitted unless conductive through-holes 11 are 
required. In either case, the combined thickness of the copper foil 12 and 
electroless copper 13 is very small relative to the thickness of the final 
trace. 
At step 104, the board is laminated with a photoresist layer 14, which is 
then exposed and developed in the conventional manner to define a negative 
mask for a desired pattern of signal traces on the board 10. In step 105, 
electrolytic copper pattern plating is used to deposit a relatively thick 
layer of copper 15, 16 on the exposed conductive surfaces of the board (as 
defined by the photoresist layer 14). In the case of signal traces, 
electrolytic plating deposits a thick horizontal layer of copper 15 over 
the exposed portions of the board. In the case of a through-hole 11, 
electrolytic plating deposits a thick layer of copper 16 extending through 
the hole 11 and also forms a collar about the opening of the through-hole 
11 as shown in FIG. 6. The photoresist layer 14 is then removed in step 
106, leaving the configuration shown in FIG. 7. 
In step 107, the board is etched using a cupric chloride solution to remove 
copper from all exposed surfaces on the board. This is another point where 
the present process diverges from the conventional process by not applying 
a layer of a dissimilar metal (e.g., tin, tin-lead, or nickel-gold) prior 
to the etching step. The etchant slightly reduces the thickness of traces 
15, 16 and rounds their corners as depicted in FIG. 8. However, due to the 
much greater thickness of the traces 15 and 16, the exposed copper in 
layers 12 and 13 will be completely removed by the etchant before the 
traces 15, 16 are significantly effected. Alternatively, an ammoniacal 
etchant could be substituted, although environmental costs are greater 
with these types of etchants. 
The board is then cleaned and a soldermask is applied in step 108. At step 
109, a thin layer of solder 18 is deposited on selected areas of the 
traces and through-holes, as shown in FIG. 9 to facilitate external 
connects to the printed circuit board. 
The finishing steps noted in step 110 complete the printed circuit board. 
For example, a legend is often imprinted on the board and cured. It may be 
necessary to apply nickel-gold tab plating for edge connectors on the 
board. Additional holes may be drilled and routing may be necessary. The 
board is also slotted, beveled, and cleaned before being delivered to the 
customer. 
The above disclosure sets forth a number of embodiments of the present 
invention. Other arrangements or embodiments, not precisely set forth, 
could be practiced under the teachings of the present invention and as set 
forth in the following claims.