IN-SITU ATOMIC LAYER DEPOSITION PROCESS

Embodiments of the present disclosure provide methods and apparatus for forming a desired material layer on a substrate between, during, prior to or after a patterning process. In one embodiment, a method for forming a material layer on the substrate includes pulsing a first gas precursor comprising an organic silicon compound onto a surface of the substrate. The method also includes disposing a first element from the first gas precursor onto the surface of the substrate. The method further includes maintaining a substrate temperature less than about 110 degrees Celsius while disposing the first element. A second gas precursor is pulsed onto the surface of the substrate. Additionally, the method includes disposing a second element from the second gas precursor to the first element on the surface of the substrate.

BACKGROUND

Field

Examples of the present disclosure generally relate to a deposition process. Particularly, embodiments of the present disclosure provide methods for forming a material layer on a substrate using an in-situ atomic layer deposition process in an etching chamber.

Description of the Related Art

In the manufacture of integrated circuits (IC), or chips, patterns representing different layers of the chip are created by a chip designer. A series of reusable masks, or photomasks, are created from these patterns in order to transfer the design of each chip layer onto a semiconductor substrate during the manufacturing process. Mask pattern generation systems use precision lasers or electron beams to image the design of each layer of the chip onto a respective mask. The masks are then used much like photographic negatives to transfer the circuit patterns for each layer onto a semiconductor substrate. These layers are built up using a sequence of processes and translate into the tiny transistors and electrical circuits that include each completed chip. Thus, any defects in the mask may be transferred to the chip, potentially adversely affecting performance. Defects that are severe enough may render the mask completely useless. Typically, a set of 15 to 100 masks is used to construct a chip and can be used repeatedly.

With the shrinking of critical dimensions (CD), present optical lithography is approaching a technological limit at the 45 nanometer (nm) technology node. Next generation lithography (NGL) is expected to replace the conventional optical lithography method, for example, in the 20 nm technology node and beyond. The images of the patterned mask are projected through the high-precision optical system onto the substrate surface, which is coated with a layer of photoresist. The patterns are then formed on the substrate surface after complex chemical reactions and follow-on manufacturing steps, such as development, post-exposure bake and wet or dry etching.

Multiple patterning technique is a technology developed for photolithography to enhance the feature density and accuracy. This technique is commonly used for patterns in the same layer which look different or have incompatible densities or pitches. Furthermore, between each patterning process, additional layers or structures may be formed, added or replenished in order to enable the next patterning process. Furthermore, as feature sizes have become smaller, the demand for higher aspect ratios, defined as the ratio between the depth of the feature and the width of the feature, has steadily increased to 20:1 and even greater. Developing etch processes and deposition processes that are capable of reliably forming features with such high aspect ratios or deposition material layers into such high aspect ratio features presents a significant challenge.

Therefore, there is a need for an apparatus for performing a patterning process, as well as a deposition process, with a desired material for features having high aspect ratios or other desired profiles.

SUMMARY

Embodiments of the present disclosure provide methods and apparatus for forming a desired material layer on a substrate. In one embodiment, a method for forming a material layer on a substrate includes pulsing a first gas precursor including an organic silicon compound onto a surface of a substrate. The method includes disposing a first element from the first gas precursor onto the surface of the substrate. The method further includes maintaining a substrate temperature less than about 110 degrees Celsius while disposing the first element. Additionally, the method includes pulsing a second gas precursor onto the surface of the substrate. The method includes disposing a second element from the second gas precursor to the first element on the surface of the substrate.

In another embodiment, a method for forming a material layer on a substrate includes pulsing a first gas precursor including an organic silicon compound including a first element to a substrate disposed in an etching processing chamber. The method includes pulsing a second gas precursor including a second element to the substrate disposed in the etching processing chamber. Further, the method includes forming a material layer on a surface of the substrate in the etching processing chamber. The material layer includes the first and the second elements.

In yet another embodiment, a method for forming a material layer on a substrate includes sequentially pulsing a first and a second gas precursor to a surface of a substrate disposed in an etching process chamber. The first gas precursor includes an organic silicon compound. A substrate temperature is maintained at less than 110 degrees Celsius. The method includes selectively forming a material layer on the surface of the substrate.

It is to be noted, however, that the appended drawings illustrate only exemplary embodiments of this disclosure and are therefore not to be considered limiting of its scope, for the disclosure may admit to other equally effective embodiments.

DETAILED DESCRIPTION

Methods for forming a material layer on or in nanostructures with desired small dimensions are provided. The methods utilize an atomic layer deposition process at relatively low temperature, such as less than 110 degrees Celsius, in a processing chamber, such as an etching chamber. By a proper selection of a precursor as well as controlled process parameters, a material layer may be formed on a substrate or filled in a feature with high aspect ratios, such as greater than 20:1, formed on a substrate. The material layer may also be formed under a process temperature less than 110 degrees Celsius, so as to enable the deposition process to be formed in an etching processing chamber, which has a substrate support assembly operated under a room temperature, such as less than 110 degrees Celsius.

The term “substrate” as used herein refers to a layer of material that serves as a basis for subsequent processing operations and includes a surface to be cleaned. For example, the substrate can include one or more material containing silicon containing materials, group IV or group III-V containing compounds, such as Si, polysilicon, amorphous silicon, Ge, SiGe, GaAs, InP, InAs, GaAs, GaP, InGaAs, InGaAsP, GaSb, InSb and the like, or combinations thereof. Furthermore, the substrate can also include dielectric materials such as silicon dioxide, organosilicates, and carbon doped silicon oxides. The substrate may also include one or more conductive metals, such as nickel, titanium, platinum, molybdenum, rhenium, osmium, chromium, iron, aluminum, copper, tungsten, or combinations thereof. Further, the substrate can include any other materials such as metal nitrides, metal oxides and metal alloys, depending on the application. In one or more embodiments, the substrate can form a contact structure, a metal silicide layer, or a gate structure including a gate dielectric layer and a gate electrode layer to facilitate connecting with an interconnect feature, such as a plug, via, contact, line, and wire, subsequently formed thereon, or suitable structures utilized in semiconductor devices.

Moreover, the substrate is not limited to any particular size or shape. The substrate can be a round wafer having a 200 mm diameter, a 300 mm diameter, a 450 mm diameter or other diameters. The substrate can also be any polygonal, square, rectangular, curved or otherwise non-circular workpiece, such as a polygonal glass, plastic substrate used in the fabrication of flat panel displays.

FIG. 1is a simplified cutaway view for an exemplary plasma processing chamber100suitable for patterning a material layer as well as forming a material layer disposed on a substrate302in the plasma processing chamber100. The exemplary plasma processing chamber100is suitable for performing a deposition process. One example of the plasma processing chamber100that may be adapted to benefit from the disclosure is an CENTRIS® Sym3™ etching processing chamber, available from Applied Materials, Inc., located in Santa Clara, Calif. It is contemplated that other process chambers, including those from other manufactures, may be adapted to practice embodiments of the disclosure.

The plasma processing chamber100includes a chamber body105having a chamber volume101defined therein. The chamber body105has sidewalls112and a bottom118which are coupled to ground126. The sidewalls112have a liner115to protect the sidewalls112and extend the time between maintenance cycles of the plasma processing chamber100. The dimensions of the chamber body105and related components of the plasma processing chamber100are not limited and may be are proportionally larger than the size of the substrate302to be processed therein. Examples of substrate sizes include 200 mm diameter, 250 mm diameter, 300 mm diameter and 450 mm diameter, among others.

The chamber body105supports a chamber lid assembly110to enclose the chamber volume101. The chamber body105may be fabricated from aluminum or other suitable materials. A substrate access port113is formed through the sidewall112of the chamber body105, facilitating the transfer of the substrate302into and out of the plasma processing chamber100. The substrate access port113may be coupled to a transfer chamber and/or other chambers of a substrate processing system (not shown).

A pumping port145is formed through the sidewall112of the chamber body105and connected to the chamber volume101. A pumping device (not shown) is coupled through the pumping port145to the chamber volume101to evacuate and control the pressure therein. The pumping device may include one or more pumps and throttle valves.

A gas panel160is coupled by a gas line167to the chamber body105to supply process gases into the chamber volume101. The gas panel160may include one or more process gas sources161,162,163,164and may additionally include inert gases, non-reactive gases, and reactive gases, if desired. Examples of process gases that may be provided by the gas panel160include, but are not limited to, hydrocarbon containing gas including methane (CH4), silicon containing gas, such as sulfur hexafluoride (SF6), silicon chloride (SiCl4), or organic silicon containing gas, such as bis(diethylamido)Silane (BDEAS), tris(dimethylamino)silane (TDMAS), bis(tertiary-butylamino)silane (BTBAS), and the like, carbon tetrafluoride (CF4), hydrogen bromide (HBr), hydrocarbon containing gas, argon gas (Ar), chlorine (Cl2), nitrogen (N2), helium (He) and oxygen gas (O2). Additionally, process gasses may include nitrogen, chlorine, fluorine, oxygen and hydrogen containing gases such as BCl3, C2F4, C4F8, C4F6, CHF3, CH2F2, CH3F, NF3, NH3, CO2, SO2, CO, N2, NO2, N2O and H2among others.

Valves166control the flow of the process gases from the sources161,162,163,164from the gas panel160and are managed by a controller165. The flow of the gases supplied to the chamber body105from the gas panel160may include combinations of the gases.

The chamber lid assembly110may include a nozzle114. The nozzle114has one or more ports for introducing the process gases from the sources161,162,164,163of the gas panel160into the chamber volume101. After the process gases are introduced into the plasma processing chamber100, the gases are energized to form plasma. An antenna148, such as one or more inductor coils, may be provided adjacent to the plasma processing chamber100. An antenna power supply142may power the antenna148through a match circuit141to inductively couple energy, such as RF energy, to the process gas to maintain a plasma formed from the process gas in the chamber volume101of the plasma processing chamber100. Alternatively, or in addition to the antenna power supply142, process electrodes below the substrate302and/or above the substrate302may be used to capacitively couple RF power to the process gases to maintain the plasma within the chamber volume101. The operation of the antenna power supply142may be controlled by a controller, such as controller165, that also controls the operation of other components in the plasma processing chamber100.

A substrate support pedestal135is disposed in the chamber volume101to support the substrate302during processing. The substrate support pedestal135may include an electrostatic chuck (ESC)122for holding the substrate302during processing. The ESC122uses the electrostatic attraction to hold the substrate302to the substrate support pedestal135. The ESC122is powered by an RF power supply125integrated with a match circuit124. The ESC122includes an electrode121embedded within a dielectric body. The electrode121is coupled to the RF power supply125and provides a bias which attracts plasma ions, formed by the process gases in the chamber volume101, to the ESC122and substrate302positioned thereon. The RF power supply125may cycle on and off, or pulse, during processing of the substrate302. The ESC122has an isolator128for the purpose of making the sidewall of the ESC122less attractive to the plasma to prolong the maintenance life cycle of the ESC122. Additionally, the substrate support pedestal135may have a cathode liner136to protect the sidewalls of the substrate support pedestal135from the plasma gases and to extend the time between maintenance of the plasma processing chamber100.

Furthermore, the electrode121is coupled to a power source150. The power source150provides a chucking voltage of about 200 volts to about 2000 volts to the electrode121. The power source150may also include a system controller for controlling the operation of the electrode121by directing a DC current to the electrode121for chucking and de-chucking the substrate302.

The ESC122may include heaters disposed therein and connected to a power source (not shown), for heating the substrate, while a cooling base129supporting the ESC122may include conduits for circulating a heat transfer fluid to maintain a temperature of the ESC122and substrate302disposed thereon. The ESC122is configured to perform in the temperature range desired by the thermal budget of the device being fabricated on the substrate302. For example, the ESC122may be configured to maintain the substrate302at a temperature of about minus about 25 degrees Celsius to about 150 degrees Celsius for certain embodiments.

The cooling base129is provided to assist in controlling the temperature of the substrate302. To mitigate process drift and time, the temperature of the substrate302may be maintained substantially constant by the cooling base129throughout the time the substrate302is in the cleaning chamber. In one embodiment, the temperature of the substrate302is maintained throughout subsequent cleaning processes at about 30 to 120 degrees Celsius.

A cover ring130is disposed on the ESC122and along the periphery of the substrate support pedestal135. The cover ring130is configured to confine etching gases to a desired portion of the exposed top surface of the substrate302, while shielding the top surface of the substrate support pedestal135from the plasma environment inside the plasma processing chamber100. Lift pins (not shown) are selectively moved through the substrate support pedestal135to lift the substrate302above the substrate support pedestal135to facilitate access to the substrate302by a transfer robot (not shown) or other suitable transfer mechanism.

The controller165may be utilized to control the process sequence, regulating the gas flows from the gas panel160into the plasma processing chamber100and other process parameters. Software routines, when executed by the CPU, transform the CPU into a specific purpose computer (controller) that controls the plasma processing chamber100such that the processes are performed in accordance with the present disclosure. The software routines may also be stored and/or executed by a second controller (not shown) that is collocated with the plasma processing chamber100.

FIG. 2is a flow diagram of one example of a method200for in-situ deposition process for depositing a material layer on a substrate in an etching or patterning processing chamber. The material layer may be later utilized to serve as a mask layer, a liner layer, a barrier layer, a spacer layer, a filling layer or a passivation layer to further alter dimensions or profiles of the features on the substrate for further feature transfer to the underlying layers disposed under the material layer.FIGS. 3A-3Eare cross-sectional views of a portion of a substrate302with a structure304formed thereon corresponding to various stages of the method200.

The method200may be utilized to deposit material layers onto structures304formed on the substrate302with different material requirements so as to form different structures. Suitable materials for the underlying layers (not shown) may include an interlayer dielectric layer, contact dielectric layer, a gate electrode layer, a gate dielectric layer, a STI insulating layer, inter-metal layer (IML), or any suitable layers. The structure304may be a material such as crystalline silicon (e.g., Si<100> or Si<111>), silicon oxide, strained silicon, silicon germanium, germanium, doped or undoped polysilicon, doped or undoped silicon wafers and patterned or non-patterned wafers silicon on insulator (SOI), carbon doped silicon oxides, silicon nitride, doped silicon, germanium, gallium arsenide, glass, or sapphire. The structure304may have various dimensions, such as 200 mm, 300 mm, 450 mm or other diameter, as well as, being a rectangular or square panel. Unless otherwise noted, examples described herein are conducted on substrates with a 200 mm diameter, a 300 mm diameter, or a 450 mm diameter substrate.

Alternatively, the method200may be beneficially utilized to form materials on suitable types of structures as needed.

The method200begins at operation202by providing the substrate302having the structure304formed thereon, as shown inFIG. 3A. The substrate302is placed in a processing chamber, such as the plasma processing chamber100depicted inFIG. 1to perform a deposition process. In one example, the plasma processing chamber100is an etching chamber or a patterning chamber that allows the substrate302to be disposed therein to perform a deposition process. The structure304includes patterned features formed in a desired distance away from each other. In one embodiment, the structure304may be fabricated from a dielectric layer or a photoresist layer utilized to form a layer in a semiconductor device. Suitable examples of the dielectric layer include carbon-containing silicon oxides (SiOC), polymer materials, such as polyamides, SOG, USG, silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, silicon oxycarbide, or the like.

In the example depicted inFIGS. 3A-3E, the structure304includes a silicon containing material or a dielectric layer. Suitable examples for the silicon containing material include crystalline silicon, silicon oxide, strained silicon, silicon germanium, germanium, doped or undoped polysilicon and other doped or undoped silicon containing materials as needed. Suitable examples of the dielectric layer may be a silicon oxide, silicon nitride, silicon oxynitride (SiON), silicon oxycarbide (SiOC), or amorphous carbon materials as needed.

At operation204, a first gas precursor306is supplied into the plasma processing chamber100into the surface of the substrate302, as shown inFIG. 3B. In one example, the first gas precursor306includes a first element, such as silicon element350, which may have high absorption capability to the substrate302as well as to the structure304. For example, when the substrate302and/or the structure304includes atoms or elements that are the same as or similar to the atoms or elements in the first gas precursor306, the atoms or elements from the first gas precursor306may be successfully adhered, absorbed or attached to the atoms or elements from the substrate302and/or from the structure304to enhance the attachment and bonding therebetween. For example, when the substrate302and/or the structure304include silicon elements350, the first element from the first gas precursor306as selected also includes a silicon element so that the silicon element from the first gas precursor306may be successfully adhered, absorbed or attached to the silicon elements from the substrate302and/or the structure304. Suitable examples of the first gas precursor306are a silicon containing gas, such as an organic silicon compounds. The organic silicon compound is desired to be maintained in as liquid state at room temperature, such as between −10 degrees Celsius and about 50 degrees Celsius. Furthermore, the organic silicon compound is also maintained at a relatively stable status when placing at the room temperature environment. In one example, the organic silicon compound includes aminosilane precursors. The amino ligands from the aminosilane precursors are configured to be easily dissociated from silicon and then dangling bonds of silicon can form chemisorption with the surface. At the same time, the other ligands are preventing further reactions with other precursors and thus self-limiting characteristic could be achieved.

Suitable examples of the organic silicon compounds include bis(diethylAmido)silane (BDEAS), tris(dimethylamino)silane (TDMAS), bis(tertiary-butylamino)silane (BTBAS) and trisilylamine (TSA). In one particular example, the organic silicon compound selected for the first gas precursor306is bis(diethylAmido)silane (BDEAS) or bis(tertiary-butylamino)silane (BTBAS).

The silicon elements350is served as the first element from the first gas precursor306to be absorbed onto the surfaces of the substrate302and/or the structure304.

The first gas precursor306is pulsed into the plasma processing chamber100to perform an atomic layer deposition (ALD) process. For example, each pulse of an ALD process enables the growth and deposition of a monolayer of a material layer. The atomic layer deposition (ALD) process is a chemical vapor deposition (CVD) process with self-terminating/limiting growth. The ALD process yields a thickness of only a few angstroms or in a monolayer level. The ALD process is controlled by distribution of a chemical reaction into two separate half reactions which are repeated in cycles, which are included in operations204and208in method200described herein. The thickness of the material layer formed by the ALD process depends on the number of reaction cycles. The first gas precursor306pulse lasts for a predetermined time interval. The term pulse as used herein refers to a dose of material injected into the process chamber.

The first reaction from the first gas precursor306at operation204provides a first atomic layer of molecular layer (e.g., sourced from the first element from the first gas precursor) that is absorbed on the substrate and a second reaction of a second element from a second gas precursor, which will be described later at operation208, provides a second atomic layer of molecular layer that is absorbed on the first atomic layer. In the example depicted inFIG. 3B, the first gas precursor306(e.g., bis(diethylAmido)silane (BDEAS) precursor) includes multiple elements, such as silicon and hydrogen, as well as ligands, such as N—(C2H5)2ligands. Below please find the chemical structure of the bis(diethylAmido)silane (BDEAS) precursor used for the first gas precursor306as one example.

When the first gas precursor306is supplied to the substrate, the silicon elements350tend to be absorbed and adhered onto the top surface and sidewalls of the structure304as well as an upper surface308of the substrate302, which also have silicon elements. Other elements, such as hydrogen elements305and ligands307(e.g., N—(C2H5)2ligands), which do not share the same elements from the substrate302and/or the structure304, are then dangling adjacent to the structure304, with loose bonds or no bonds, to the structure304and/or the substrate302, as shown inFIG. 3B. Thus, a selective deposition process is also obtained by forming the first monolayer on certain surface of the substrate that provides similar or the same elements from the first element from the first gas precursor306.

Several process parameters are also regulated during pulsing of the first gas precursor306. In one embodiment, the process pressure is controlled at between about 1 mTorr and about 100 mTorr. The processing temperature is maintained at less than about 110 degrees Celsius, such as between about −10 degrees Celsius and about 110 degrees Celsius, such as between about 20 degrees Celsius and about 90 degrees Celsius. While supplying the first gas precursor306, the RF powers, such as RF bias power or RF source power, may be eliminated as needed. It is believed that a plasma free environment may allow the elements to gently and slowly fall on the substrate surface, thus enhancing conformal deposition of the material layer on the substrate surface. In some embodiment, the RF source or bias power may be, alternatively or simultaneously, applied as needed to generate a plasma while supplying the first gas precursor306as needed. The first gas precursor306may be supplied at between about 5 sccm and about 150 sccm. Each pulse of the first precursor gas may deposit the first monolayer of a material layer360(as shown inFIG. 3E) having a thickness between about 3 Å and about 5 Å.

At operation206, a purge gas is then supplied to the plasma processing chamber100to purge out the atoms and/or elements (e.g., the hydrogen elements305and the ligands307(e.g., N—(C2H5)2ligands)) not attached to the substrate302and/or the structure304, as shown inFIG. 3C. Suitable examples of the purge gas include an insert gas, such as Ar or He, a nitrogen containing gas, or other suitable gases.

Several process parameters are also regulated during pulsing of the purge gas mixture. In one embodiment, the process pressure is controlled at between about 1 mTorr and about 100 mTorr. The processing temperature is maintained at less than about 110 degrees Celsius, such as between about −10 degrees Celsius and about 110 degrees Celsius, such as between about 20 degrees Celsius and about 100 degrees Celsius. The RF source power may be controlled at between about 100 watts and about 1200 watts, such as between about 500 watts and about 1000 watts. The RF bias power may be controlled at between about 10 watts and about 200 watts, such as between about 50 watts and about 100 watts. The purge gas may be supplied at between about 5 sccm and about 150 sccm.

At operation208, a second gas precursor310is supplied into the plasma processing chamber100into the surface of the substrate302, as shown inFIG. 3D. In one example, the second gas precursor310includes a second element which can react with the first element, such as the silicon element350, on the substrate302and/or the structure304provided from the first gas precursor306. The second element as pulsed reacts and bonds with the first element, such as the silicon element350on the surfaces313,314and a sidewall312of the substrate302and/or the structure304. In the example disposed inFIG. 3D, the second gas precursor310includes an oxygen or a nitrogen containing gas, providing an oxygen or a nitrogen element311. It is noted that other suitable second gas precursor310that is capable of providing elements or atoms to react with the elements from the first gas precursor may also be utilized as needed. The oxygen or nitrogen element311reacts with the silicon element350. The oxygen or nitrogen element311is then absorbed by the silicon element350on the substrate302and/or the structure304, forming a material layer360(as shown inFIG. 3E) on the surfaces and the sidewall of the substrate302and/or the structure304. In the example wherein the second element is an oxygen element311, the material layer360as formed on the substrate302is a silicon oxide layer. In another example wherein the second element is a nitrogen element311, the material layer360as formed on the substrate302is a silicon nitride layer.

Suitable examples of the oxygen containing gas include O2, CO2, H2O and the like. Suitable examples of the nitrogen containing gas include N2, NO2, N2O, NH3, and the like. In one example, the oxygen containing gas is O2and the nitrogen containing gas is NH3or N2.

Based on different process requirements, process parameters may be controlled differently at operation208. In the example wherein the material layer360is desired to be formed conformally across the substrate302and/or the structure304, as shown inFIGS. 3D and 3E, a suitable range of RF bias power and/or source power may be applied to activate the elements as well as provide directionality of the elements or atoms toward the surfaces and the sidewall of the substrate302and/or the structure304. With the assistance from the RF bias power and/or the RF source power, the elements or atoms from the second gas precursor310may stay on the top surface of the structure304as well as accelerated toward the sidewall of the structure304and the upper surface308of the substrate302.

Several process parameters are also regulated during pulsing of the second gas precursor310. In one embodiment, the process pressure is controlled at between about 1 mTorr and about 100 mTorr. The processing temperature is maintained at less than about 110 degrees Celsius, such as between about −10 degrees Celsius and about 110 degrees Celsius, such as between about 20 degrees Celsius and about 100 degrees Celsius. The RF source power may be controlled at between about 100 watts and about 2500 watts, such as about 500 watts and about 1000 watts. The RF bias power may be optionally supplied while supplying the second gas precursor. It is believed that the RF source and bias powers as applied may assist activating the oxygen or nitrogen elements311as well as the silicon elements350from the substrate302in an activated/excited state, so as to enhance the absorption of the oxygen or nitrogen elements311to the silicon elements350. Each pulse of the second precursor gas may deposit the first monolayer of the material layer360having a thickness between about 3 Å and about 15 Å.

At operation210, a purge gas is then supplied to the plasma processing chamber100to purge out the atoms and/or elements not attached to the substrate302and/or the structure304, as shown inFIG. 3E, similar to the purge gas supply at operation206. Suitable examples of the purge gas include an insert gas, such as Ar or He, a nitrogen containing gas, or other suitable gases.

Several process parameters are also regulated during pulsing of the purge gas mixture. In one embodiment, the process pressure is controlled at between about 1 mTorr and about 100 mTorr. The processing temperature is maintained at less than about 110 degrees Celsius, such as between about −10 degrees Celsius and about 120 degrees Celsius, such as between about 20 degrees Celsius and about 100 degrees Celsius. The RF source power may be controlled at between about 100 watts and about 2500 watts, such as between about 500 watts and about 1000 watts. The RF bias power may be controlled at between about 10 watts and about 500 watts, such as between about 50 watts and about 100 watts. The purge gas may be supplied at between about 5 sccm and about 150 sccm.

As such, the ordered structure of the monolayers composed from the first elements and the second elements from the operations204and208is then formed on the structured material layer360at desired locations of the substrate302. The first monolayer from the first gas precursor306at operation204is absorbed onto the desired locations of the substrate302and the structure304by a chemical reaction that allows the atoms from the first monolayer to be securely adhered on the atoms the substrate302and the structure304. The subsequently formed second monolayer from the second gas precursor310at operation208is then selectively formed at desired locations of the substrate302and the structure304, thus enabling a deposition of an ALD process at a low temperature, such as less than 110 degrees Celsius, in a processing chamber, such as an etching chamber.

Between each pulse of the first gas precursor306or the second gas precursor310at operations204and208, the purge gas at operation206may be pulsed into the processing chamber in between each or multiple pulses of the first and/or second gas precursors306,310to remove the impurities or residual precursor gas mixture which is unreacted/non-absorbed by the substrate surface (e.g., unreacted impurities from the reactant gas mixture or others) so they can be pumped out of the processing chamber.

In the example wherein the second gas precursor310is an oxygen containing gas, the resultant material layer360is a silicon oxide layer. In the example wherein the second gas precursor310is a nitrogen containing gas, the resultant material layer360is a silicon nitride layer.

It is noted that additional cycles starting from the pulsing of the first gas precursor306at operation204, the purge gas supply at operation206and the second gas precursor310at operation208can then be repeatedly performed until a desired thickness of the material layer360is obtained. When a subsequent cycle of pulsing the first gas precursor306starts, the process pressure and other process parameters may be regulated to the predetermined level to assist depositing a subsequent monolayer of the material layer360.

Thus, deposition methods for forming a material layer on a structure of a substrate are provided. The deposition methods utilize an ALD-like deposition process performed at a temperature less than 110 degrees Celsius to form the material layer in an etching processing chamber so that an etching process may immediately follow after the deposition process of the material layer as needed. Furthermore, the low temperature deposition process also enables the material layer to be formed in any substrate with suitable features, such as high aspect ratios greater than 20:1, which requires slow and conformal deposition profiles. Thus, process cycle time and manufacturing throughput may be improved and well managed.