Disconnectable power semiconductor component

A field-controlled thyristor having a sequence of layers consisting of anode layer, channel layer and gate regions and cathode regions, which regions are alternately arranged at the cathode side, wherein an improvement in the turn-off gain is achieved by a p-type doping of the side walls of the troughs which separate the cathode regions from each other, and/or by an additional intermediate layer which has low p-type doping and which is arranged between adjacent gate regions.

BACKGROUND OF THE INVENTION 
1. Field of the Invention 
This invention relates to a disconnectable power semiconductor component, 
and more particularly to a field-controlled thyristor of the type which is 
described, for example, in publication DE-A No. 2,855,546. 
2. Discussion of Background 
Field-controlled power semiconductor components are known as having 
different structures and by various names. Within these known components, 
two functional types are mainly distinguished, which are unipolar 
structures such as, for example field-effect transistors of the MOSFET or 
JFET type having majority carrier conduction, and components having 
bipolar carrier injection such as, for example the FCT (Field Controlled 
Thyristor) or the SITh (Static Induction Thyristor). 
For applications in the high performance field, especially the 
last-mentioned bipolar structures, the action of which is explained in 
greater details in the above-mentioned publication and in DE-A No. 
3,002,526, are of interest for physical reasons. 
DE-A No. 2,932,043, DE-A No. 2,824,133, or IEEE Transactions ED-29 (1982) 
1560, or IEDM Technical Digest 1984, 439, and EP-A No. 0,121,068 are also 
relevant publications. 
As a rule, the action of the conventional structures is based on applying 
the JFET principle for control: in finely distributed gate or control 
zones, application of a negative gate voltage generates areas with charge 
carrier depletion, which, with rising gate voltage, extend into a channel 
region which conducts the current and finally interrupt the current flow 
by pinching off the channel region. 
The pinching-off process is counteracted by the anode voltage present at 
the component so that with increasing anode voltage, an increasing gate 
voltage is also required for blocking or switching-off the component. The 
ratio between the anode voltage and the gate voltage needed for blocking 
is called turn-off gain. 
There is a close connection between the turn-off gain and the geometric 
arrangement and design of the gate zones, which results from the fact that 
for blocking a certain voltage by means of the gate voltage applied, a 
"penetration" through the field-controlled channel must be prevented. 
In the blocking state, the positive space charge in a JFET structure with 
n-doped channel produces a positive curvature of the associated potential 
surfaces. However, to prevent an injection of electrons from the 
cathode-side n.sup.+ emitter into the channel, the potential must not 
become greater than zero at this point. This can be achieved if it is 
possible to make the curvature of the potential surface negative in the 
axial direction in the channel. 
For this purpose, a correspondingly large positive curvature component must 
be generated in the lateral direction by the negative gate voltage at the 
p.sup.+ gate regions in the known components. But the amount of this 
component is essentially determined, in addition to the gate voltage, by 
the difference of the adjacent gate regions. It follows from this that in 
a structure of the known type an increase in the turn-off gain can be 
achieved in principle only by reducing the distances between the gate 
regions, that is to say by an even finer subdivision of the gate-cathode 
structure. 
SUMMARY OF THE INVENTION 
Accordingly, one object of this invention is to provide a novel 
field-controlled thyristor which, in comparison with a field-controlled 
thyristor of the coventional type, has significantly higher turn-off gain, 
assuming the same gate-cathode geometry. 
The object of the present invention is achieved by rpoviding a novel 
disconnectable power semiconductor component having a p-type anode layer 
above which a n-type channel layer is located, and a plurality of n-type 
cathode regions and p-type gate regions, which are alternately arranged at 
the cathode side, wherein the cathode regions are separated from each 
other by troughs and the gate regions extend both over the bottoms and 
over the side walls of the troughs, and/or a continuous intermediate layer 
with low p-type doping is provided between adjacent gate regions. 
The main feature of the invention consists in generating the required 
negative curvature of the potential surfaces in the n channel by the fact 
that in a field controlled thyristor with a vertically structured cathode 
surface in accordance with European Auslegeschrift No. 0,121,068, the gate 
regions also extend over the side walls of the troughs and, additionally 
or as an alternative to this, an intermediate layer with low p-type doping 
is provided in the channel region between two gate regions. 
The pn junctions produced between the n-type cathode regions and the p-type 
gate regions at the side walls of the troughs must be designed in such a 
manner that they can block the gate-cathode voltage. When the negative 
blocking voltage is then applied, the load count is blocked and the anode 
voltage is cut off. Thickness and doping concentration of the p-type 
intermediate layer are selected in such a manner that the corresponding 
space charge zone contacts the n.sup.+ emitter even with comparatively 
small anode voltages and an open gate contact, and thus switches on the 
thyristor.

DESCRIPTION OF THE PREFERRED EMBODIMENTS 
Referring now to the drawings, wherein like reference numerals designate 
identical or corresponding parts throughout the several views, and more 
particularly to FIG. 1 thereof a thyristor having a vertically, structured 
cathode surface is shown. The thyristor includes an anode layer 6 with 
p.sup.+ -type doping on which a channel layer 5 with n.sup..+-. -type 
doping is located, and on the cathode side a finely subdivided 
gate-cathode structure which is composed of alternately arranged gate 
regions 8 with p-type doping and cathode regions 3 with n.sup.+ -type 
doping. Cathode contacts 1 and anode contacts 7, which are usually 
constructed as vapor-deposited metal layers are provided for supplying the 
load current. 
The individual cathode regions 3 are separated from each other by deep 
troughs 10. The gate contacts 2 are arranged at the bottoms of the troughs 
10 and the gate regions 8 with p-type doping extend both over the trough 
bottoms and over the trough walls. 
By applying a negative gate voltage U.sub.GK to the gate contacts 2, 
depletion regions are produced at the pn junction between the gate regions 
8 and the channel layer 5, which depletion regions extend into the channel 
region between the gate regions 8 and pinch off the current flowing 
between the anode layer 6 and the cathode region 3 until it is cut off. 
The total anode voltage U.sub.AK is then dropped across the element. The 
ratio U.sub.AK /U.sub.GK =.beta. is called turn-off gain. .beta. is in a 
complicated manner dependent on various parameters such as component 
thickness, doping in the channel layer 5, width X.sub.E of the cathode 
region 3 and the ratio L/B. In this, L is the perpendicular distance of 
the junction between the cathode areas 3 and the channel layer 5 from the 
junction between the gate region 8 at the bottom of the troughs 10 and the 
channel layer 5. B is the distance between the adjacent junctions of the 
gate areas 8 at the walls of the troughs 10 and the channel layer 5. 
The structure according to the invention according to FIG. 1 can be used 
for achieving extraordinarily high turn-off gains without the gate-cathode 
geometry having to be significantly changed as compared with the 
conventional thyristors: 
Thus, according to FIG. 8 and a structure according to FIG. 1, a turn-off 
gain of greater than one hundred is achieved for a width X.sub.E of the 
cathode regions 3 of 30 .mu., a thickness of the component of 300 .mu. 
and an n-type doping concentration in the channel layer 5 of 
3.5.times.10.sup.13 cm.sup.-3 (=150.OMEGA.cm) with an anode voltage 
U.sub.AK of 1600 V. A determining role in this is played by the trough 
depth Y.sub.G, on the one hand, and the depth X.sub.P of the pn junction 
between gate region 8 and channel layer 5, on the other hand. 
FIG. 8 shows the dependence of the turn-off gain .beta. on the trough depth 
Y.sub.G for parameter X.sub.P for the values of X.sub.P =8 .mu. and 
X.sub.P =10 .mu.. As can be seen, higher turn-off gains .beta. are 
achieved for greater values of X.sub.P, that is to say narrower n-type 
channels under the cathode regions 3, than for smaller values of X.sub.P. 
For example, .beta.=55 for Y.sub.G =20 .mu. and X.sub.P =8 .mu. and 
.beta.=90 for Y.sub.G.notident.= 20 .mu. and X.sub.P =10 .mu.. 
The conditions of potentials in the blocking state for a gate voltage 
U.sub.GK =-30 V are shown in FIG. 5. As can be seen, the anode potential 
U.sub.K in the channel layer 5 under the cathode regions 3 is modified in 
such a manner that a potential barrier is produced which interrupts the 
electron emission from the cathode region 3. FIG. 6 shows that in the case 
of a p.sup.- -type channel layer 9, the blocking state is already reached 
with an applied gate voltage of U.sub.GK =-15 V, the geometry being 
otherwise identical to those in FIG. 5. 
These examples explain how the blocking characteristic of a field-control 
thyristor is very advantageously influenced by the structure according to 
the invention. The greater the L/B ratio, the greater X.sub.P, the greater 
the turn-off gain. The invention can be successfully implemented for 
values of Y.sub.G =10 . . . 30 .mu., X.sub.E =6 . . . 40 .mu., X.sub.P =2 
. . . 10 .mu. and an edge concentration of the doping of 2.times.10.sup.16 
cm.sup.-3 maximum in the gate regions 8. This last-mentioned limit value 
is of importance for the pn junction between the cathode region 3 and the 
gate region 8 to be able to accept, that is to say block, a negative gate 
voltage U.sub.GK of up to 50 volts. 
In FIG. 2, the structure of FIG. 1 is shown diagrammatically as a complete 
component with edge contouring and passivation. The troughs 10 are filled 
up with an insulating layer 11 which covers the gate electrodes and the 
side walls. The insulating layer consists preferably of a material, for 
example polyamide, which is resistant with respect to soldering 
temperatures, at least 300.degree. C. Over the cathode contacts 1 and the 
insulating layer 11, a continuous metal layer 12 extends which preferably 
consists of a sequence of layers of Cr, Ni and Ag so that it can be easily 
soldered. The metal layer 12 is surface-connected to the metallic external 
contact 13 which can be inserted into the load circuit, for example by 
forming a pressure contact. The gate contacts 2 form a clearer metal layer 
which encloses the finger-like cathode regions 3 to which an electrical 
voltage can be applied from the outside via the gate connection 14. 
A structure according to FIGS. 1 and 2 can be advantageously produced by 
process steps indicated in FIG. 7: 
A silicone substrate with weak n-type doping (approximately 150.OMEGA.cm), 
which is provided at its end face with a diffused n.sup.+ -type layer, is 
first provided with a SiO.sub.2 cover layer of approximately 1 .mu. 
thermal oxidation. Using a first mask, a window is etched into this 
SiO.sub.2 layer in known manner over the later cathode regions 3 (FIG. 
7a). After that, an Al layer of a thickness of approximately 2 = is vapor 
deposited and this Al layer is photo-lithographically structured by means 
of a second mask in such a manner that the later cathode regions 3 sway 
themselves and, beyond, an edge land extending into the area of the later 
troughs 10 are left standing (FIG. 7b). After that, the troughs 10 are 
created by means of an isotropic reactive ion etching, during which 
process the remaining Al regions act as etching masks (FIG. 7c). The ion 
etching removes, for example, 20 .mu.. After that, the Al regions are 
etched away and the gate regions 8 are generated by boron diffusion with 
an edge concentration of approximately 10.sup.16 cm.sup.-3 and a depth 
X.sub.P of approximately 5 .mu. (FIG. 7d). Finally, Al is selectively 
vapour deposited to generate the cathode contacts 1 and the gate contacts 
2 (FIG. 7e). The edge of the SiO.sub.2 layer projecting into the trough 10 
now plays an important role: it prevents a conductive Al layer, which 
would lead to a short circuit, from being able to precipitate on the side 
walls of the troughs 10 during the vapour deposition process. 
In the structure shown in FIG. 7, the gate region 8 directly adjoins the 
cathode region 3. This is then the preferred embodiment. However, it is 
also possible to seperate the two regions 3, 8 from each other, for 
example by ensureing at the start that the n-type doping is diffused in 
through the window in the SiO.sub.2 layer only in the space of the later 
cathode region 3. Instead, the cathode region 3 can also be generated by 
ion implantations after creation of the gate regions 8 by diffusion of 
boron, Al, Ga or similar. 
In this connection, it is also of importance that the walls of the troughs 
10 are perpendicular to their bottoms: as a result, the shading effect by 
the overhanging SiO.sub.2 edge is achieved in the selective Al vapour 
deposition process in the step according to FIG. 7e. 
The distances L and B in FIG. 1 are a measure of the length and the width 
of the n-type channels under the cathode regions 3. They can be adjusted 
by means of adjusting the depth of the p-type diffusion in producing the 
gate regions 8. The deeper the p-type doping profile diffused in, that is 
to say the deeper the pn junction gate region 8/channel layer 5 or the 
greater X.sub.P, the greater the L/B ratio will be which, as mentioned, is 
a measure of the blocking capability of the structure. 
According to the invention, an intermediate layer 9 with low p-type doping 
is provided in the channel layer 5 between the gate regions 4, 8 in FIGS. 
3 and 4. 
The intermediate layer 9 in FIG. 3 extends not only between the adjacent 
gate regions 4 but continuously also under the complete gate-cathode 
structure and thus completely separates not only the cathode regions 3 but 
also the gate regions 4 from the base layer 5 with n.sup.- -type doping. 
The intermediate layer 9 preferably has a p-type doping with a 
concentration of less than 1.times.10.sup.15 cm.sup.-3. It is of 
particular advantage for switching on at low voltage to provide doping 
within a range of only 1.times.10.sup.14 cm.sup.-3. 
The depth of the intermediate layer 9 below the surface defined by gate 
contacts 2 and cathode contacts 1 is advantageously selected in such a 
manner that it approximately corresponds to twice the depth of the gate 
regions 4. If, therefore, for example gate regions 4 are provided which 
project approximately 15 .mu. into the component, the thickness of the 
intermediate layer is correspondingly 30 .mu. at its thickest point. 
Analogously, the turn-off gain of a structure according to FIG. 1, 2 is 
increased by an intermediate layer with low p-type doping according to the 
illustrative embodiment of FIG. 4. The preferred doping concentrations of 
the intermediate layer 9 are, in this case, the same as in the 
illustrative embodiment of FIG. 3. The depth of the intermediate layer 9 
in this case depends on the depth of the troughs 10 and is preferably 
twice the depth of this trough depth. 
The influence of the intermediate low p-type doping layer 9 according to 
the invention, on the turn-off gain is to be explained by means of 
calculated equipotential lines for a vertically offset gate-cathode 
structure according to FIG. 6. For the calculation, the following 
parameters were assumed which are typical of a structure of the 
above-mentioned type: 
______________________________________ 
Width of cathode regions (X.sub.E) 
30 .mu.m 
Width of troughs 10 20 .mu.m 
Depth of troughs 10 (Y.sub.G) 
15 .mu.m 
Thickness of total structure 
250 .mu.m 
Depth of intermediate layer 9 
30 .mu.m 
Depth of anode layer 6 
10 .mu.m 
Depth of cathode regions 3 
5 .mu.m 
Depth of gate regions 8 (X.sub.p) 
5 .mu.m 
Edge doping concentration of 
1 .times. 10.sup.19 
cm.sup.-3 
cathode regions 3 
Edge doping concentration of 
5 .times. 10.sup.18 
cm.sup.-3 
the anode layer 6 
Edge doping concentration of 
1 .times. 10.sup.16 
cm.sup.-3 
gate regions 8 
Edge doping concentration of 
8 .times. 10.sup.14 
cm.sup.-3 
intermediate layer 9 
Background doping concentration 
7 .times. 10.sup.13 
cm.sup.-3 
of channel layer 5 
______________________________________ 
From these parameters, the equipotential lines within the structure were 
calculated by the usual methods. 
This results in the equipotential lines, shown in a section in FIG. 6, for 
the potential values of -15 V, 0 V, +15 V and +150 V with a gate voltage 
U.sub.gk =-15 V and an anode voltage of U.sub.ak =1600 V. The structure 
according to the invention has a blocking capability of approximately 950 
V with open gate contact. 
Overall, the invention provides a component which has a clearly improved 
turn-off gain without change in the gate-cathode geometry and can be 
easily implemented with the usual methods familiar to the specialist in 
semiconductor technology. 
Obviously, numerous modifications and variations of the present invention 
are possible in light of the above teachings. It is therefore to be 
understood that within the scope of the appended claims, the invention may 
be practiced otherwise than as specifically described herein.