RADIO FREQUENCY CIRCUIT AND COMMUNICATION DEVICE

Reduction of reception sensitivity, which is caused by inter-modulation distortion occurring between a first transmit signal and a second transmit signal, is suppressed. A first filter has a passband including the transmit band of a first communication band. A second filter has a passband including the transmit band of a second communication band. A third filter has a passband including the receive band of the first communication band. The first communication band and the second communication band are communication bands available for simultaneous transmission. At least a part of the frequency range of the inter-modulation distortion, which occurs between the first transmit signal in the first communication band and the second transmit signal in the second communication band, overlaps at least a part of the receive band of the first communication band.

TECHNICAL FIELD

The present disclosure generally relates to a radio frequency circuit and a communication device, and more particularly to a radio frequency circuit, which includes multiple filters, and a communication device, which includes the radio frequency circuit.

BACKGROUND ART

Advances in multiband technology of mobile communication devices such as a cellular phone have demanded a radio frequency circuit which is capable of simultaneous transmission of multiple radio frequency signals having different frequencies. For example, Patent Document 1 discloses an electronic system including two transmit circuits and two receive circuits.

CITATION LIST

Patent Document

SUMMARY OF DISCLOSURE

Technical Problem

The electronic system (radio frequency circuit) described in Patent Document 1 may cause the state in which, in simultaneous transmission of multiple radio frequency signals having different frequencies, the frequency of an inter-modulation distortion (IMD) between the radio frequency signals overlaps the receive band of a receive circuit, resulting in reduction of the reception sensitivity.

An object of the present disclosure is to provide a radio frequency circuit and a communication device which are capable of suppressing reduction of the reception sensitivity, which is caused by an inter-modulation distortion occurring between a first transmit signal and a second transmit signal.

Solution to Problem

A radio frequency circuit according to an aspect of the present disclosure includes a first filter, a second filter, a third filter, a first power amplifier, a second power amplifier, and a switch. The first filter has a passband including the transmit band of a first communication band. The second filter has a passband including the transmit band of a second communication band which is different from the first communication band. The third filter has a passband including the receive band of the first communication band. The first power amplifier is connected to the first filter. The second power amplifier is connected to the second filter. The switch has a first terminal, a second terminal, a third terminal, a fourth terminal, and a fifth terminal. The first communication band and the second communication band are communication bands available for simultaneous transmission. At least a part of the frequency range of inter-modulation distortion overlaps at least a part of the receive band of the first communication band. The inter-modulation distortion occurs between a first transmit signal in the first communication band and a second transmit signal in the second communication band. In the radio frequency circuit, the first terminal is connected to the first power amplifier; the second terminal is connected to the second power amplifier; the fourth terminal is connected to the first filter; the fifth terminal is connected to the second filter. The radio frequency circuit further includes a circuit connected to the third terminal. The circuit includes either one or both of an inductor and a capacitor.

A radio frequency circuit according to an aspect of the present disclosure includes a first filter, a second filter, a third filter, a low-noise amplifier, and a switch. The first filter has a passband including the transmit band of a first communication band. The second filter has a passband including the transmit band of a second communication band which is different from the first communication band. The third filter has a passband including the receive band of the first communication band. The low-noise amplifier is connected to the third filter. The switch has a first terminal, a second terminal, and a third terminal. The first communication band and the second communication band are communication bands available for simultaneous transmission. At least a part of the frequency range of inter-modulation distortion overlaps at least a part of the receive band of the first communication band. The inter-modulation distortion occurs between a first transmit signal in the first communication band and a second transmit signal in the second communication band. In the radio frequency circuit, the first terminal is connected to the low-noise amplifier, and the third terminal is connected to the third filter. The radio frequency circuit further includes a circuit connected to the second terminal. The circuit includes either one or both of an inductor and a capacitor.

A communication device according to an aspect of the present disclosure includes the radio frequency circuit and a signal processing circuit. The signal processing circuit is connected to the radio frequency circuit.

Advantageous Effects of Disclosure

The radio frequency circuit and the communication device according to an aspect of the present disclosure enable suppression of reduction of the reception sensitivity. The reduction is caused by an inter-modulation distortion which occurs between a first transmit signal and a second transmit signal.

DESCRIPTION OF EMBODIMENTS

A radio frequency circuit and a communication device according to each of first to fifth embodiments will be described below by referring to the drawings.FIGS.2to4,6, and7referred to in the embodiments and the like are schematic views. The sizes, the thicknesses, and their ratios of components in the figures do not necessarily reflect the actual dimensional ratios.

First Embodiment

(1) Radio Frequency Circuit

The configuration of a radio frequency circuit1according to the first embodiment will be described by referring to drawings.

As illustrated inFIG.1, the radio frequency circuit1is used, for example, in a communication device9. The communication device9is, for example, a cellular phone such as a smartphone. The communication device9is not limited to a cellular phone, and may be, for example, a wearable terminal such as a smartwatch. The radio frequency circuit1is compatible, for example, with a 4G (fourth generation mobile communication) standard or a 5G (fifth generation mobile communication) standard. The 4G standard is, for example, a 3GPP™ (Third Generation Partnership Project) LTE™ (Long Term Evolution) standard. The 5G standard is compatible, for example, with 5G NR (New Radio). The radio frequency circuit1is compatible, for example, with carrier aggregation and dual connectivity. The radio frequency circuit1is also compatible with two-uplink carrier aggregation in which two frequency bands are simultaneously used as uplink. The carrier aggregation and the dual connectivity refer to a technology used in communication of simultaneous use of radio waves in multiple frequency bands. Hereinafter, signal transmission using the carrier aggregation or the dual connectivity is also referred to as simultaneous transmission. The state in which simultaneous transmission is allowed means that signals are allowed to be transmitted by using the carrier aggregation or the dual connectivity.

The radio frequency circuit1according to the first embodiment is capable of simultaneous transmission of a first transmit signal S1(seeFIG.5) in a first communication band described below and a second transmit signal S2(seeFIG.5) in a second communication band described below. The combination of the first communication band and the second communication band, for which simultaneous transmission is available, is a combination of frequency bands, which partially overlap each other or do not overlap at all, from among the frequency bands of the communication bands defined in the 3GPP LTE standard and the frequency bands of the communication bands defined in the 5G NR standard. The frequency bands are uplink frequency bands.

The communication device9performs communication in multiple communication bands. More specifically, the communication device9transmits transmit signals in the respective communication bands, and receives receive signals in the respective communication bands. Specifically, the radio frequency circuit1transmits transmit signals in the first communication band and receives receive signals in the first communication band. The radio frequency circuit1transmits transmit signals in the second communication band and receives receive signals in the second communication band. The radio frequency circuit1transmits transmit signals in a third communication band and receives receive signals in the third communication band. The radio frequency circuit1transmits transmit signals in a fourth communication band and receives receive signals in the fourth communication band. The radio frequency circuit1transmits transmit signals in a fifth communication band and receives receive signals in the fifth communication band. The radio frequency circuit1transmits transmit signals in a sixth communication band and receives receive signals in the sixth communication band. The radio frequency circuit1transmits transmit signals in a seventh communication band and receives receive signals in the seventh communication band. The radio frequency circuit1transmits transmit signals in an eighth communication band and receives receive signals in the eighth communication band. The radio frequency circuit1transmits transmit signals in a ninth communication band and receives receive signals in the ninth communication band.

Some of the transmit signals and the receive signals in multiple communication bands are FDD (Frequency Division Duplex) signals. Transmit signals and receive signals in multiple communication bands are not limited to FDD signals, and may be TDD (Time Division Duplex) signals. FDD is a wireless communication technology in which different frequency bands are assigned to transmission and reception in wireless communication and in which transmission and reception are performed. TDD is a wireless communication technology in which the same frequency band is assigned to transmission and reception in wireless communication and in which transmission and reception are switched on a time basis.

(2) The Circuit Configuration of the Radio Frequency Circuit

The circuit configuration of the radio frequency circuit1according to the first embodiment will be described by referring toFIG.1.

As illustrated inFIG.1, the radio frequency circuit1according to the first embodiment includes multiple (in the illustrated example, two) power amplifiers (a first power amplifier111and a second power amplifier112), multiple (in the illustrated example, nine) transmit filters121to129, multiple (in the illustrated example, nine) receive filters131to139, and multiple (in the illustrated example, two) low-noise amplifiers (a first low-noise amplifier141and a second low-noise amplifier142). The radio frequency circuit1according to the first embodiment further includes multiple (in the illustrated example, two) output matching circuits (a first output matching circuit151and a second output matching circuit152), multiple (in the illustrated example, four) input matching circuits161,162,241, and242, and multiple (in the illustrated example, nine) matching circuits231to239. The radio frequency circuit1according to the first embodiment further includes a first switch17, a second switch18, a third switch19, a fourth switch20, a controller23, and a phase circuit25. The radio frequency circuit1further includes multiple (in the illustrated example, seven) external connection terminals10.

(2.1) Power Amplifier

Each of the first power amplifier111and the second power amplifier112illustrated inFIG.1amplifies transmit signals. The first power amplifier111is disposed between a signal input terminal103, which is described below, and the transmit filters121to129. The second power amplifier112is disposed between a signal input terminal104, which is described below, and the transmit filters121to129. Each of the first power amplifier111and the second power amplifier112has an input terminal (not illustrated) and an output terminal (not illustrated). The first power amplifier111is connected, at its input terminal, to an external circuit (for example, a signal processing circuit92) through the signal input terminal103. The first power amplifier111is connected, at its output terminal, to a common terminal18A of the second switch18, and is connectable to the transmit filters121to129through the second switch18. That is, the first power amplifier111is connectable to the transmit filter122(first filter). The second power amplifier112is connected, at its input terminal, to an external circuit (for example, the signal processing circuit92) through the signal input terminal104. The second power amplifier112is connected, at its output terminal, to a common terminal18B of the second switch18, and is connectable to the transmit filters121to129through the second switch18. That is, the second power amplifier112is connectable to the transmit filter125(second filter). The first power amplifier111and the second power amplifier112are controlled, for example, by the controller23.

The first power amplifier111and the second power amplifier112support power classes different from each other. “Power class” refers to a classification (User Equipment Power Class) of output power of a terminal (the communication device9) defined, for example, by using maximum output power. A smaller number described next to “power class” indicates higher output power. For example, the maximum output power (29 dBm) of power class 1 is larger than the maximum output power (26 dBm) of power class 2; the maximum output power (26 dBm) of power class 2 is larger than the maximum output power (23 dBm) of power class 3. The maximum output power is measured, for example, by using a method defined, for example, in 3GPP. The first power amplifier111supports a first power class (for example, power class 2); the second power amplifier112supports a second power class (for example, power class 3) whose maximum output power is smaller than that of the first power class. That is, in the radio frequency circuit1according to the first embodiment, the maximum output power of the first power class is larger than that of the second power class.

The transmit filters121to129illustrated inFIG.1pass transmit signals in communication bands different from each other. More specifically, the transmit filter121passes transmit signals in the third communication band. The transmit filter122passes transmit signals in the first communication band. The transmit filter123passes transmit signals in the fifth communication band. The transmit filter124passes transmit signals in the fourth communication band. The transmit filter125passes transmit signals in the second communication band. The transmit filter126passes transmit signals in the sixth communication band. The transmit filter127passes transmit signals in the seventh communication band. The transmit filter128passes transmit signals in the eighth communication band. The transmit filter129passes transmit signals in the ninth communication band. In the present embodiment, the transmit filter122is the first filter; the transmit filter125is the second filter.

The first communication band is, for example, Band 8 according to the 3GPP LTE standard, and the transmit band of the first communication band is 880 MHz to 915 MHZ. The second communication band is, for example, Band 20 according to the 3GPP LTE standard, and the transmit band of the second communication band is 832 MHz to 862 MHz. The third communication band is, for example, Band 5 according to the 3GPP LTE standard, and the transmit band of the third communication band is 824 MHz to 849 MHz. The fourth communication band is, for example, Band 13 according to the 3GPP LTE standard, and the transmit band of the fourth communication band is 777 MHz to 787 MHz. The fifth communication band is, for example, Band 12 according to the 3GPP LTE standard, and the transmit band of the fifth communication band is 699 MHz to 716 MHz. The sixth communication band is, for example, Band 28B according to the 3GPP LTE standard, and the transmit band of the sixth communication band is 718 MHz to 748 MHz. The seventh communication band is, for example, Band 28A according to the 3GPP LTE standard, and the transmit band of the seventh communication band is 703 MHz to 733 MHZ. The eighth communication band is, for example, Band 14 according to the 3GPP LTE standard, and the transmit band of the eighth communication band is 788 MHz to 798 MHz. The ninth communication band is, for example, Band 71 according to the 3GPP LTE standard, and the transmit band of the ninth communication band is 663 MHz to 698 MHZ.

The transmit filters121to129are disposed between the first power amplifier111and the first switch17. The transmit filters121to129are disposed between the second power amplifier112and the first switch17. Each of the transmit filters121to129passes transmit signals in the transmit band of the corresponding communication band from among radio frequency signals having been amplified by either the first power amplifier111or the second power amplifier112. That is, each of the transmit filters121to129has a passband including the transmit band of the corresponding communication band.

(2.3) Receive Filter

The receive filters131to139illustrated inFIG.1pass receive signals in communication bands different from each other. More specifically, the receive filter131passes receive signals in the third communication band. The receive filter132passes receive signals in the first communication band. The receive filter133passes receive signals in the fifth communication band. The receive filter134passes receive signals in the fourth communication band. The receive filter135passes receive signals in the second communication band. The receive filter136passes receive signals in the sixth communication band. The receive filter137passes receive signals in the seventh communication band. The receive filter138passes receive signals in the eighth communication band. The receive filter139passes receive signals in the ninth communication band. In the present embodiment, the receive filter132is a third filter.

The receive band of the first communication band is 925 MHz to 960 MHz. The receive band of the second communication band is 791 MHz to 821 MHz. The receive band of the third communication band is 869 MHz to 894 MHZ. The receive band of the fourth communication band is 746 MHz to 756 MHz. The receive band of the fifth communication band is 729 MHz to 746 MHz. The receive band of the sixth communication band is 773 MHz to 803 MHz. The receive band of the seventh communication band is 758 MHz to 788 MHz. The receive band of the eighth communication band is 758 MHz to 768 MHz. The receive band of the ninth communication band is 617 MHz to 652 MHz.

The receive filters131to139are disposed between the first low-noise amplifier141and the first switch17. The receive filters131to139are disposed between the second low-noise amplifier142and the first switch17. Each of the receive filters131to139passes receive signals in the receive band of the corresponding communication band from among radio frequency signals which are input from antenna terminals101and102described below. That is, each of the receive filters131to139has a passband including the receive band of the corresponding communication band.

In the present embodiment, the transmit filter121and the receive filter131form a duplexer31; the transmit filter122and the receive filter132form a duplexer32; the transmit filter123and the receive filter133form a duplexer33. In the present embodiment, the transmit filter124and the receive filter134form a duplexer34; the transmit filter125and the receive filter135form a duplexer35; the transmit filter126and the receive filter136form a duplexer36. In the present embodiment, the transmit filter127and the receive filter137form a duplexer37; the transmit filter128and the receive filter138form a duplexer38; the transmit filter129and the receive filter139form a duplexer39.

Each of the first low-noise amplifier141and the second low-noise amplifier142illustrated inFIG.1amplifies receive signals with low noise. The first low-noise amplifier141is disposed between a signal output terminal105, which is described below, and the receive filters131to139. The second low-noise amplifier142is disposed between a signal output terminal106, which is described below, and the receive filters131to139. Each of the first low-noise amplifier141and the second low-noise amplifier142has an input terminal (not illustrated) and an output terminal (not illustrated). The first low-noise amplifier141is connected, at its input terminal, to the input matching circuit161. The first low-noise amplifier141is connected, at its output terminal, to an external circuit (for example, the signal processing circuit92) through the signal output terminal105. The second low-noise amplifier142is connected, at its input terminal, to the input matching circuit162. The second low-noise amplifier142is connected, at its output terminal, to an external circuit (for example, the signal processing circuit92) through the signal output terminal106.

(2.5) Output Matching Circuit

As illustrated inFIG.1, the first output matching circuit151is disposed between the first power amplifier111and the transmit filters121to129. More specifically, the first output matching circuit151is connected between the first power amplifier111and the common terminal18A (first terminal) of the second switch18. The first output matching circuit151is a circuit for impedance matching between the first power amplifier111and the transmit filters121to129.

The first output matching circuit151includes, for example, a single inductor150(seeFIG.6). The inductor150of the first output matching circuit151is disposed on the output side of the first power amplifier111. The first output matching circuit151is not limited to the configuration including a single inductor150. For example, the first output matching circuit151may have a configuration including multiple inductors, or may have a configuration including multiple inductors and multiple capacitors.

As illustrated inFIG.1, the second output matching circuit152is disposed between the second power amplifier112and the transmit filters121to129. More specifically, the second output matching circuit152is connected between the second power amplifier112and the common terminal18B (second terminal) of the second switch18. The second output matching circuit152is a circuit for impedance matching between the second power amplifier112and the transmit filters121to129.

Like the first output matching circuit151, the second output matching circuit152includes a single inductor150(seeFIG.6). The inductor150of the second output matching circuit152is disposed on the output side of the second power amplifier112. The second output matching circuit152is not limited to the configuration including a single inductor150. For example, the second output matching circuit152may have a configuration including multiple inductors, or may have a configuration including multiple inductors and multiple capacitors.

(2.6) Input Matching Circuit

As illustrated inFIG.1, the input matching circuit161is disposed between the receive filters131and132and the first low-noise amplifier141. The input matching circuit161is a circuit for impedance matching between the receive filters131and132and the first low-noise amplifier141.

The input matching circuit161includes an inductor. The inductor of the input matching circuit161is disposed on the input side of the first low-noise amplifier141. The input matching circuit161is not limited to the configuration including a single inductor. For example, the input matching circuit161may have a configuration including multiple inductors, or may have a configuration including multiple inductors and multiple capacitors.

As illustrated inFIG.1, the input matching circuit162is disposed between the receive filters133to139and the second low-noise amplifier142. The input matching circuit162is a circuit for impedance matching between the receive filters133to139and the second low-noise amplifier142.

The input matching circuit162includes an inductor. The inductor of the input matching circuit162is disposed on the input side of the second low-noise amplifier142. The input matching circuit162is not limited to the configuration including a single inductor. For example, the input matching circuit162may have a configuration including multiple inductors, or may have a configuration including multiple inductors and multiple capacitors.

As illustrated inFIG.1, the input matching circuit241is disposed between the signal input terminal103and the first power amplifier111. The input matching circuit241is a circuit for impedance matching between the signal processing circuit92and the first power amplifier111.

The input matching circuit241includes an inductor. The inductor of the input matching circuit241is disposed on the input side of the first power amplifier111. The input matching circuit241is not limited to the configuration including a single inductor. For example, the input matching circuit241may have a configuration including multiple inductors, or may have a configuration including multiple inductors and multiple capacitors.

As illustrated inFIG.1, the input matching circuit242is disposed between the signal input terminal104and the second power amplifier112. The input matching circuit242is a circuit for impedance matching between the signal processing circuit92and the second power amplifier112.

The input matching circuit242includes an inductor. The inductor of the input matching circuit242is disposed on the input side of the second power amplifier112. The input matching circuit242is not limited to the configuration including a single inductor. For example, the input matching circuit242may have a configuration including multiple inductors, or may have a configuration including multiple inductors and multiple capacitors.

(2.7) Matching Circuit

As illustrated inFIG.1, the matching circuits231to239correspond to the duplexers31to39. Each of the matching circuits231to239is disposed between the corresponding duplexer and the first switch17. Each of the matching circuits231to239is a circuit for impedance matching between the corresponding duplexer and the first switch17. Each of the matching circuits231to239is, for example, an inductor. More specifically, each of the matching circuits231to239is a chip inductor.

(2.8) First Switch

The first switch17illustrated inFIG.1switches to transmit filters, which are to be connected to the antenna terminals101and102, from among the transmit filters121to129. The first switch17switches to receive filters, which are to be connected to the antenna terminals101and102, from among the receive filters131to139. That is, the first switch17is a switch for switching paths connecting to multiple antennas911and912. The first switch17has multiple (in the illustrated example, two) common terminals17A and17B and multiple (in the illustrated example, nine) selection terminals171to179. The common terminal17A is connected to the antenna terminal101. The common terminal17B is connected to the antenna terminal102.

The selection terminal171is connected to the duplexer31(the transmit filter121and the receive filter131). The selection terminal172is connected to the duplexer32(the transmit filter122and the receive filter132). The selection terminal173is connected to the duplexer33(the transmit filter123and the receive filter133). The selection terminal174is connected to the duplexer34(the transmit filter124and the receive filter134). The selection terminal175is connected to the duplexer35(the transmit filter125and the receive filter135). The selection terminal176is connected to the duplexer36(the transmit filter126and the receive filter136). The selection terminal177is connected to the duplexer37(the transmit filter127and the receive filter137). The selection terminal178is connected to the duplexer38(the transmit filter128and the receive filter138). The selection terminal179is connected to the duplexer39(the transmit filter129and the receive filter139).

The first switch17switches the connection state between the common terminals17A and17B and the selection terminals171to179. The first switch17is controlled, for example, by the signal processing circuit92. The first switch17electrically connects the common terminal17A to at least one of the selection terminals171to179in accordance with a control signal from an RF signal processing circuit93of the signal processing circuit92. The first switch17electrically connects the common terminal17B to at least one of the selection terminals171to179in accordance with a control signal from the RF signal processing circuit93of the signal processing circuit92.

(2.9) Second Switch

The second switch (switch)18illustrated inFIG.1switches to transmit filters, which are to be connected to the first power amplifier111and the second power amplifier112, from among the transmit filters121to129. That is, the second switch18is a switch for switching paths connecting to the first power amplifier111and the second power amplifier112. The second switch18has the multiple (in the illustrated example, two) common terminals18A and18B and multiple (in the illustrated example, ten) selection terminals180to189. The common terminal18A is connected to the first power amplifier111. The common terminal18B is connected to the second power amplifier112. In the present embodiment, the common terminal18A is the first terminal; the common terminal18B is the second terminal.

The selection terminal180is connected to the phase circuit25. The selection terminal181is connected to the transmit filter121. The selection terminal182is connected to the transmit filter122. The selection terminal183is connected to the transmit filter123. The selection terminal184is connected to the transmit filter124. The selection terminal185is connected to the transmit filter125. The selection terminal186is connected to the transmit filter126. The selection terminal187is connected to the transmit filter127. The selection terminal188is connected to the transmit filter128. The selection terminal189is connected to the transmit filter129. In the present embodiment, the selection terminal180is a third terminal; the selection terminal182is a fourth terminal; the selection terminal185is a fifth terminal. That is, the second switch18has the first terminal (common terminal18A), the second terminal (common terminal18B), the third terminal (selection terminal180), the fourth terminal (selection terminal182), and the fifth terminal (selection terminal185).

The second switch18switches the connection state between the common terminals18A and18B and the selection terminals180to189. The second switch18is controlled, for example, by the signal processing circuit92. The second switch18electrically connects the common terminal18A to at least one of the selection terminals180to189in accordance with a control signal from the RF signal processing circuit93of the signal processing circuit92. The second switch18electrically connects the common terminal18B to at least one of the selection terminals180to189in accordance with a control signal from the RF signal processing circuit93of the signal processing circuit92.

(2.10) Third Switch

The third switch19illustrated inFIG.1switches to at least one receive filter, which is to be connected to the first low-noise amplifier141, from among the receive filters131and132. That is, the third switch19is a switch for switching at least one path connecting to the first low-noise amplifier141. The third switch19has a common terminal190and multiple (in the illustrated example, three) selection terminals191to193. The common terminal190is connected to the first low-noise amplifier141. The selection terminal191is connected to the receive filter131. The selection terminal192is connected to the receive filter132.

The third switch19switches the connection state between the common terminal190and the selection terminals191to193. The third switch19is controlled, for example, by the signal processing circuit92. The third switch19electrically connects the common terminal190to at least one of the selection terminals191to193in accordance with a control signal from the RF signal processing circuit93of the signal processing circuit92.

(2.11) Fourth Switch

The fourth switch20illustrated inFIG.1switches to at least one receive filter, which is to be connected to the second low-noise amplifier142, from among the receive filters133to139. That is, the fourth switch20is a switch for switching at least one path connecting to the second low-noise amplifier142. The fourth switch20has a common terminal200and multiple (in the illustrated example, seven) selection terminals201to207. The common terminal200is connected to the second low-noise amplifier142.

The selection terminal201is connected to the receive filter133. The selection terminal202is connected to the receive filter134. The selection terminal203is connected to the receive filter135. The selection terminal204is connected to the receive filter136. The selection terminal205is connected to the receive filter137. The selection terminal206is connected to the receive filter138. The selection terminal207is connected to the receive filter139.

The fourth switch20switches the connection state between the common terminal200and the selection terminals201to207. The fourth switch20is controlled, for example, by the signal processing circuit92. The fourth switch20electrically connects the common terminal200to at least one of the selection terminals201to207in accordance with a control signal from the RF signal processing circuit93of the signal processing circuit92.

The controller23controls the first power amplifier111and the second power amplifier112, for example, in accordance with control signals from the signal processing circuit92. The controller23is connected to the first power amplifier111and the second power amplifier112. The controller23is connected to the signal processing circuit92through multiple (for example, four) control terminals107. The control terminals107are terminals for inputting control signals from an external circuit (for example, the signal processing circuit92) to the controller23. The controller23controls the first power amplifier111and the second power amplifier112on the basis of the control signals obtained through the control terminals107. The control signals obtained by the controller23through the control terminals107are digital signals. The number of control terminals107is, for example, four.FIG.1illustrates one control terminal107.

(2.13) Phase Circuit

The phase circuit (circuit)25is a circuit for changing the phase of one of the following transmit signals: the first transmit signal S1(seeFIG.5) which passes through the first power amplifier111; the second transmit signal S2(seeFIG.5) which passes through the second power amplifier112. In the radio frequency circuit1according to the first embodiment, the phase circuit25is connected to the selection terminal180of the second switch18. Therefore, in the radio frequency circuit1according to the first embodiment, the common terminal18B of the second switch18is connected to the selection terminal180so that the phase circuit25changes the phase of the second transmit signal S2which passes through the second power amplifier112. The phase circuit25changes the phase of the second transmit signal S2, which passes through the second power amplifier112, so that the leakage signal of the second transmit signal S2, which leaks to the signal path through which the first transmit signal S1flows, is made small. More specifically, the phase circuit25changes the phase of the second transmit signal S2so that the absolute value of the phase difference between an input-side leakage signal and an output-side leakage signal of the second transmit signal S2, which leak to the signal path through which the first transmit signal S1flows, is greater than or equal to 90° and less than or equal to 180°. More preferably, the phase circuit25may change the phase of the second transmit signal S2so that the absolute value of the phase difference between an input-side leakage signal and an output-side leakage signal of the second transmit signal S2, which are applied to the first power amplifier111, is greater than or equal to 135° and less than or equal to 180°. An input-side leakage signal of the second transmit signal S2is a leakage signal which flows to the input side of the first power amplifier111in the signal path through which the first transmit signal S1flows. An output-side leakage signal of the second transmit signal S2is a leakage signal which flows to the output side of the first power amplifier111in the signal path through which the first transmit signal S1flows.

As illustrated inFIG.5, the phase circuit25includes an inductor251. The inductor251of the phase circuit25is connected between the selection terminal180of the second switch18and the ground. In the second switch18, for example, when two-uplink carrier aggregation is performed by using the transmit filter122and the transmit filter125, the common terminal18B is connected to the selection terminal180and the selection terminal185. In this case, the inductor251of the phase circuit25is connected (shunt-connected) between the ground and the signal path between the second power amplifier112and the transmit filter125(seeFIG.1).

In the radio frequency circuit1according to the first embodiment, when only the second transmit signal S2is transmitted, the common terminal18B of the second switch18is not connected to the selection terminal180. That is, in this case, the phase circuit25is detached from the signal path including the second power amplifier112. This enables suppression of signal loss (loss) of the second transmit signal S2.

(2.14) External Connection Terminal

As illustrated inFIG.1, the external connection terminals10are terminals for electrically connecting the radio frequency circuit1to external circuits (for example, the signal processing circuit92). The external connection terminals10include the multiple (in the illustrated example, two) antenna terminals101and102, the multiple (in the illustrated example, two) signal input terminals103and104, the multiple (in the illustrated example, two) signal output terminals105and106, the multiple (only one inFIG.1) control terminals107, and multiple ground terminals108(seeFIG.3).

The antenna terminal101is connected to the antenna911. The antenna terminal102is connected to the antenna912. In the radio frequency circuit1, the antenna terminals101and102are connected to the first switch17. The antenna terminals101and102are connected to the transmit filters121to129and the receive filters131to139through the first switch17.

The signal input terminals103and104are terminals for inputting transmit signals (for example, the first transmit signal S1and the second transmit signal S2), which are from an external circuit (for example, the signal processing circuit92), to the radio frequency circuit1. In the radio frequency circuit1, the signal input terminal103is connected to the first power amplifier111through the input matching circuit241. In the radio frequency circuit1, the signal input terminal104is connected to the second power amplifier112through the input matching circuit242.

The signal output terminal105is a terminal for outputting receive signals, which are from the first low-noise amplifier141, to an external circuit (for example, the signal processing circuit92). The signal output terminal106is a terminal for outputting receive signals, which are from the second low-noise amplifier142, to an external circuit (for example, the signal processing circuit92). In the radio frequency circuit1, the signal output terminal105is connected to the first low-noise amplifier141. In the radio frequency circuit1, the signal output terminal106is connected to the second low-noise amplifier142.

The control terminals107are terminals for inputting control signals, which are from an external circuit (for example, the signal processing circuit92), to the radio frequency circuit1. In the radio frequency circuit1, the control terminals107are connected to the controller23.

The ground terminals108(seeFIG.3) are terminals which are electrically connected to ground electrodes of an external substrate (not illustrated), which is included in the communication device9, so as to be supplied with the ground potential. In the radio frequency circuit1, the ground terminals108are connected to a ground layer (not illustrated) of a mount substrate2described below.

(3) The Structure of the Radio Frequency Circuit (Radio Frequency Module)

As illustrated inFIGS.2to4, the radio frequency circuit1according to the first embodiment includes the mount substrate2. In the description below, the radio frequency circuit1including the mount substrate2may be referred to as the “radio frequency module1”. The structure of the radio frequency module1according to the first embodiment will be described below by referring toFIGS.2to4.

As illustrated inFIGS.2to4, the radio frequency module1includes the mount substrate2, multiple (in the illustrated example, 25) first electronic components3, multiple (in the illustrated example, four) second electronic components4, and the external connection terminals10. The radio frequency module1further includes a first resin layer5, a second resin layer6, and a metal layer7.

The radio frequency module1is electrically connectable to an external substrate (not illustrated). The external substrate corresponds to, for example, a mother board of the communication device9(seeFIG.1), such as a cellular phone or a communication device. The state in which the radio frequency module1is electrically connectable to an external substrate encompasses, not only the case in which the radio frequency module1is mounted directly on the external substrate, but also the case in which the radio frequency module1is mounted indirectly on the external substrate. The case in which the radio frequency module1is mounted indirectly on the external substrate is, for example, the case in which the radio frequency module1is mounted on a different radio frequency module mounted on the external substrate.

As illustrated inFIGS.2to4, the mount substrate2has a first principal surface21and a second principal surface22. The first principal surface21and the second principal surface22are opposite each other in the thickness direction D1of the mount substrate2. When the radio frequency module1is disposed on an external substrate, the second principal surface22is opposite the external substrate's principal surface located on the mount substrate2side. The mount substrate2is a double-sided mount substrate, on which the first electronic components3are mounted on the first principal surface21and the second electronic components4are mounted on the second principal surface22. In the present embodiment, the thickness direction D1of the mount substrate2is a first direction (hereinafter also referred to as a “first direction D1”).

The mount substrate2is a multilayer substrate having multiple laminated dielectric layers. The mount substrate2has multiple conductive layers and multiple via conductors (including through electrodes). The conductive layers include a ground layer having the ground potential. The via conductors are used for electrical connection between conductive layers of the mount substrate2and devices (including the first electronic components3and the second electronic components4described above) mounted on the first principal surface21and the second principal surface22. The via conductors are used for electrical connection between devices, which are mounted on the first principal surface21, and devices, which are mounted on the second principal surface22, and for electrical connection between the conductive layers of the mount substrate2and the external connection terminals10.

The first electronic components3are disposed on the first principal surface21of the mount substrate2. The second electronic components4and the external connection terminals10are disposed on the second principal surface22of the mount substrate2.

(3.2) First Electronic Component

As illustrated inFIG.2, the first electronic components3are disposed on the first principal surface21of the mount substrate2. In the example inFIG.2, the first electronic components3are mounted on the first principal surface21of the mount substrate2. A part of each first electronic component3may be mounted on the first principal surface21of the mount substrate2, and the remainder may be embedded in the mount substrate2. In short, each of the first electronic components3is positioned closer to the first principal surface21side than the second principal surface22of the mount substrate2, and has at least a part mounted on the first principal surface21. As illustrated inFIG.2, each of the first electronic components3is any of the following components: the duplexers31to39; the matching circuits231to239; the power amplifiers (the first power amplifier111and the second power amplifier112); the output matching circuits (the first output matching circuit151and the second output matching circuit152); the input matching circuits241and242; and the phase circuit25.

Each of the transmit filters121to129and the receive filters131to139is, for example, an acoustic-wave filter including multiple serial arm resonators and multiple parallel arm resonators. The acoustic-wave filter is, for example, a SAW (Surface Acoustic Wave) filter using surface acoustic waves. Each of the transmit filters121to129and the receive filters131to139may include either one or both of an inductor and a capacitor which are connected in series to any of the serial arm resonators, or may include an inductor or a capacitor which is connected in series to any of the parallel arm resonators.

(3.3) Second Electronic Component

As illustrated inFIG.3, the second electronic components4are disposed on the second principal surface22of the mount substrate2. In the example inFIG.3, the second electronic components4are mounted on the second principal surface22of the mount substrate2. A part of each second electronic component4may be mounted on the second principal surface22of the mount substrate2, and the remainder may be embedded in the mount substrate2. In short, each of the second electronic component4is positioned closer to the second principal surface22side than the first principal surface21of the mount substrate2, and has at least a part mounted on the second principal surface22. Each of the second electronic components4is any of the following devices: the first switch17; the controller23; a first IC chip26; and a second IC chip27.

(3.4) External Connection Terminal

The external connection terminals10are terminals for electrically connecting the mount substrate2to an external substrate (not illustrated).

As illustrated inFIGS.3and4, the external connection terminals10are disposed on the second principal surface22of the mount substrate2. The external connection terminals10are columnar (for example, cylindrical) electrodes disposed on the second principal surface22of the mount substrate2. The material of the external connection terminals10is, for example, metal (for example, copper or copper alloy).

(3.5) First Resin Layer

As illustrated inFIG.4, the first resin layer5is disposed on the first principal surface21of the mount substrate2. The first resin layer5covers the first electronic components3. More specifically, the first resin layer5covers the periphery of each of the first electronic components3. The first resin layer5covers the principal surface which is on the side opposite to the mount substrate2side of each of the first electronic components3. In the present embodiment, the periphery of each of the first electronic components3includes four side surfaces which connect the principal surface, which is on the side opposite to the mount substrate2side, of the first electronic component3to the principal surface on the mount substrate2side. The first resin layer5contains resin (for example, epoxy resin). The first resin layer5may contain a filler in addition to resin.

(3.6) Second Resin Layer

As illustrated inFIG.4, the second resin layer6is disposed on the second principal surface22of the mount substrate2. The second resin layer6covers the second electronic components4and the external connection terminals10. More specifically, the second resin layer6covers the periphery of each of the second electronic components4and the periphery of each of the external connection terminals10. The second resin layer6covers the principal surface which is on the side opposite to the mount substrate2side of each of the second electronic components4. In the present embodiment, the periphery of each of the second electronic components4includes four side surfaces which connect the principal surface, which is on the side opposite to the mount substrate2side, of the second electronic component4to the principal surface on the mount substrate2side. The second resin layer6contains resin (for example, epoxy resin). The second resin layer6may contain a filler in addition to resin. The material of the second resin layer6may be the same as that of the first resin layer5, or may be a different material.

(3.7) Metal Layer

As illustrated inFIG.4, the metal layer7covers the first resin layer5. The metal layer7is conductive. In the radio frequency module1, the metal layer7is a shield layer disposed in order to achieve electromagnetic shielding between the inside and the outside the radio frequency module1. The metal layer7has a multilayer structure of multiple laminated metal layers. However, the structure of the metal layer7is not limited to a multilayer structure, and may be a single metal layer. The single metal layer contains one or more types of metal. The metal layer7covers the principal surface, which is on the side opposite to the mount substrate2side, of the first resin layer5, the periphery of the first resin layer5, the periphery of the mount substrate2, and the periphery of the second resin layer6. The metal layer7is in contact with at least a part of the periphery of the ground layer of the mount substrate2. This enables the potential of the metal layer7to be the same as that of the ground layer.

(4) The Detailed Structure of Each Component of the Radio Frequency Circuit (Radio Frequency Module)

The mount substrate2illustrated inFIGS.2to4is, for example, a multilayer substrate including multiple dielectric layers and multiple conductive layers. The dielectric layers and the conductive layers are laminated in the thickness direction D1of the mount substrate2. The conductive layers are formed in predetermined patterns defined for the respective layers. Each of the conductive layers includes one or more conductor units in a plane orthogonal to the thickness direction D1of the mount substrate2. The material of the conductive layers is, for example, copper. The conductive layers include a ground layer. In the radio frequency module1, multiple ground terminals are electrically connected to the ground layer, for example, through via conductors of the mount substrate2. The mount substrate2is, for example, an LTCC (LOW Temperature Co-fired Ceramics) substrate. The mount substrate2is not limited to an LTCC substrate, and may be, for example, a printed wiring board, an HTCC (High Temperature Co-fired Ceramics) substrate, or a resin multilayer substrate.

The mount substrate2is not limited to an LTCC substrate, and may be, for example, a wiring structure. The wiring structure is, for example, a multilayer structure. The multilayer structure includes at least one insulating layer and at least one conductive layer. The insulating layer is formed in a predetermined pattern. In the case of multiple insulating layers, the insulating layers are formed in predetermined patterns defined for the respective layers. The conductive layer is formed in a predetermined pattern different from that of the insulating layer. In the case of multiple conductive layers, the conductive layers are formed in predetermined patterns defined for the respective layers. The conductive layer may include one or more redistribution units. In the wiring structure, a first surface among the two surfaces which are opposite each other in the thickness direction of the multilayer structure is the first principal surface21of the mount substrate2; a second surface is the second principal surface22of the mount substrate2. The wiring structure may be, for example, an interposer. The interposer may be an interposer using a silicon substrate or may be a substrate having multiple layers.

The first principal surface21and the second principal surface22of the mount substrate2are separated from each other in the thickness direction D1of the mount substrate2, and intersect the thickness direction D1of the mount substrate2. The first principal surface21of the mount substrate2is orthogonal, for example, to the thickness direction D1of the mount substrate2. Alternatively, the first principal surface21may include, for example, a side surface of a conductor unit as a surface which is not orthogonal to the thickness direction D1of the mount substrate2. The second principal surface22of the mount substrate2is orthogonal, for example, to the thickness direction D1of the mount substrate2. Alternatively, the second principal surface22may include, for example, a side surface of a conductor unit as a surface which is not orthogonal to the thickness direction D1of the mount substrate2. The first principal surface21and the second principal surface22of the mount substrate2may have minute unevenness, projections, or depressions formed thereon.

The detailed structure of the duplexers31to39illustrated inFIG.2will be described. In the description below, the duplexers31to39are not distinguished from each other and are referred to as duplexers.

The first electronic components3, which form the respective duplexers, each include, for example, a substrate and a circuit unit formed on the substrate. The substrate has a first surface and a second surface which are opposite each other in the thickness direction of the substrate. The substrate is, for example, a piezoelectric substrate. The piezoelectric substrate is, for example, a lithium niobate substrate, a lithium tantalate substrate, or a quartz substrate. The circuit unit has multiple IDT (Interdigital Transducer) electrodes corresponding one to one to the serial arm resonators, and multiple IDT electrodes corresponding one to one to the parallel arm resonators. For example, the first electronic components3, which form the respective duplexers, are flip-chip mounted on the first principal surface21of the mount substrate2so that the first surfaces of the substrates are positioned on the first principal surface21side of the mount substrate2. In plan view in the thickness direction D1of the mount substrate2, the outer edges of each of the first electronic component3, which form the respective duplexers, have a rectangular shape.

(4.3) Power Amplifier

The first electronic components3, which form the first power amplifier111and the second power amplifier112respectively, are, for example, single-chip ICs each including a substrate and a circuit unit. The substrate has a first surface and a second surface which are opposite each other in the thickness direction of the substrate. The substrate is, for example, a gallium arsenide substrate. The circuit unit includes at least one transistor formed on the first surface of the substrate. The circuit unit has a function of amplifying transmit signals received by the first power amplifier111or the second power amplifier112. The transistor is, for example, an HBT (Heterojunction Bipolar Transistor). Each of the first power amplifier111and the second power amplifier112may include, for example, a capacitor for cutting direct current. For example, the IC chips, which form the first power amplifier111and the second power amplifier112respectively, are flip-chip mounted on the first principal surface21of the mount substrate2so that the first surfaces of the substrates are positioned on the first principal surface21side of the mount substrate2. In plan view in the thickness direction D1of the mount substrate2, the outer edges of each of the IC chips, which form the first power amplifier111and the second power amplifier112respectively, have a rectangular shape.

(4.4) Output Matching Circuit

The first electronic components3, which form the first output matching circuit151and the second output matching circuit152respectively, are, for example, chip inductors. The first electronic components3, which form the first output matching circuit151and the second output matching circuit152respectively, are mounted, for example, on the first principal surface21of the mount substrate2. In plan view in the thickness direction D1of the mount substrate2, the outer edges of each of the first electronic components3, which form the first output matching circuit151and the second output matching circuit152respectively, have a rectangular shape.

(4.5) Input Matching Circuit

The first electronic components3, which form the respective input matching circuits241and242, are, for example, chip inductors. The first electronic components3, which form the respective input matching circuits241and242, are mounted, for example, on the first principal surface21of the mount substrate2. In plan view in the thickness direction D1of the mount substrate2, the outer edges of each of the first electronic components3, which form the respective input matching circuits241and242, have a rectangular shape.

(4.6) Matching Circuit

The first electronic components3, which form the respective matching circuits231to239, are, for example, chip inductors. The first electronic components3, which form the respective matching circuits231to239, are mounted, for example, on the first principal surface21of the mount substrate2. In plan view in the thickness direction D1of the mount substrate2, the outer edges of each of the first electronic components3, which form the respective matching circuits231to239, have a rectangular shape.

(4.7) Phase Circuit

The first electronic component3, which forms the phase circuit25, is, for example, a chip inductor. The first electronic component3, which forms the phase circuit25, is mounted, for example, on the first principal surface21of the mount substrate2. In plan view in the thickness direction D1of the mount substrate2, the outer edges of the first electronic component3, which forms the phase circuit25, have a rectangular shape.

(4.8) First Switch

The first electronic component3, which forms the first switch17, is, for example, a single-chip IC including a substrate and a circuit unit. The substrate has a first surface and a second surface which are opposite each other in the thickness direction of the substrate. The substrate is, for example, a silicon substrate. The circuit unit includes multiple FETs as multiple switching devices. Each of the switching devices is not limited to a FET, and, for example, may be a bipolar transistor. The first electronic component3, which forms the first switch17, is flip-chip mounted on the second principal surface22of the mount substrate2so that the first surface of the substrate is positioned on the second principal surface22side of the mount substrate2. In plan view in the thickness direction D1of the mount substrate2, the outer edges of the first electronic component3, which forms the first switch17, have a rectangular shape.

(4.9) First IC Chip

The first IC chip26includes the third switch19, the fourth switch20, the first low-noise amplifier141, and the second low-noise amplifier142. The first IC chip26is flip-chip mounted on the second principal surface22of the mount substrate2. In plan view in the thickness direction D1of the mount substrate2, the outer edges of the first IC chip26have a rectangular shape.

(4.10) Second IC Chip

The second IC chip27includes the second switch18. The second IC chip27is flip-chip mounted on the second principal surface22of the mount substrate2. In plan view in the thickness direction D1of the mount substrate2, the outer edges of the second IC chip27have a rectangular shape.

The second electronic component4, which forms the controller23, is, for example, a single-chip IC including a substrate and a circuit unit. The substrate has a first surface and a second surface which are opposite each other. The substrate is, for example, a silicon substrate. The circuit unit includes a control circuit which controls the first power amplifier111and the second power amplifier112in accordance with the control signals from the signal processing circuit92. The controller23is flip-chip mounted on the second principal surface22of the mount substrate2, for example, so that the first surface of the substrate is positioned on the second principal surface22side of the mount substrate2. In plan view in the thickness direction D1of the mount substrate2, the outer edges of the second electronic component4, which forms the controller23, have a rectangular shape.

(5) Communication Device

As illustrated inFIG.1, the communication device9includes the radio frequency circuit1, the antennas911and912, and the signal processing circuit92.

The antenna911is connected to the antenna terminal101of the radio frequency circuit1. The antenna912is connected to the antenna terminal102of the radio frequency circuit1. Each of the antennas911and912has a transmission function of radiating, as radio waves, transmit signals which are output from the radio frequency circuit1, and a reception function of receiving, as radio waves, receive signals from the outside and outputting the received receive signals to the radio frequency circuit1.

(5.2) Signal Processing Circuit

The signal processing circuit92includes the RF signal processing circuit93and a baseband signal processing circuit94. The signal processing circuit92processes signals passing through the radio frequency circuit1. More specifically, the signal processing circuit92processes transmit signals and receive signals.

The RF signal processing circuit93is, for example, an RFIC (Radio Frequency Integrated Circuit). The RF signal processing circuit93performs signal processing on radio frequency signals.

The RF signal processing circuit93performs signal processing such as upconverting on transmit signals which are output from the baseband signal processing circuit94, and outputs the transmit signals, which have been subjected to the signal processing, to the radio frequency circuit1. The RF signal processing circuit93performs signal processing such as down-converting on receive signals which are output from the radio frequency circuit1, and outputs the receive signals, which have been subjected to the signal processing, to the baseband signal processing circuit94.

The baseband signal processing circuit94is, for example, a BBIC (Baseband Integrated Circuit). The baseband signal processing circuit94performs predetermined signal processing on transmit signals from the outside of the signal processing circuit92. For example, receive signals, which have been processed by the baseband signal processing circuit94, are used as image signals for image display, or are used as audio signals for telephone calls.

The RF signal processing circuit93also has a function as a controller which controls connections of the first switch17, the second switch18, the third switch19, and the fourth switch20, which are included in the radio frequency circuit1, on the basis of transmission/reception of radio frequency signals (transmit signals, receive signals). Specifically, the RF signal processing circuit93switches connections of the first switch17, the second switch18, the third switch19, and the fourth switch20of the radio frequency circuit1through control signals (not illustrated). The controller may be disposed outside the RF signal processing circuit93, and, for example, may be disposed in the radio frequency circuit1or the baseband signal processing circuit94.

(6) Operations of the Phase Circuit

Operations of the phase circuit25will be described by referring toFIG.5.

In the case of simultaneous transmission of the first transmit signal S1in the first communication band and the second transmit signal S2in the second communication band, as illustrated inFIG.5, the common terminal18A (first terminal) of the second switch18is connected to the selection terminal182, and the common terminal18B (second terminal) of the second switch18is connected to the selection terminal180(third terminal) and the selection terminal185(fifth terminal). That is, in the case of simultaneous transmission of the first transmit signal S1and the second transmit signal S2, the selection terminal180is connected to the common terminal18B. At that time, the first power amplifier111is connected to the transmit filter122(seeFIG.1), and the second power amplifier112is connected to the transmit filter125(seeFIG.1). The inductor251of the phase circuit25is shunt-connected to the signal path between the second power amplifier112and the transmit filter125.

As described above, the transmit filter122has a passband including the transmit band of Band 8 (first communication band) according to the 3GPP LTE standard, and the transmit band of Band 8 is 880 MHz to 915 MHZ. As described above, the transmit filter125has a passband including the transmit band of Band 20 (second communication band) according to the 3GPP LTE standard, and the transmit band of Band 20 is 832 MHz to 862 MHz. Thus, the transmit band of Band 8 does not overlap the transmit band of Band 20 at all. Thus, the radio frequency circuit1according to the first embodiment is capable of performing two-uplink carrier aggregation using Band 8 and Band 20. That is, the first communication band and the second communication band are communication bands available for simultaneous transmission.

When the transmit filter122and the transmit filter125perform two-uplink carrier aggregation, the first power amplifier111receives the first transmit signal S1, and the second power amplifier112receives the second transmit signal S2(seeFIG.5). In this case, inter-modulation distortion (IMD) occurs between the first transmit signal S1and the second transmit signal S2. In particular, the third-order inter-modulation distortion (hereinafter also referred to as “IMD3”) which occurs between the fundamental waves of one of the transmit signals and the second harmonic of the other transmit signal may affect the reception sensitivity.

For example, assume the case in which the frequency of the first transmit signal S1is 897.5 MHz and the frequency of the second transmit signal S2is 847 MHz. In this case, the frequency of the IMD3, which occurs on the first power amplifier111side, is 948 MHZ (=2×897.5 MHZ-847 MHz). As described above, the receive filter132has a passband including the receive band of Band 8 (first communication band) according to the 3GPP LTE standard, and the receive band of Band 8 is 925 MHz to 960 MHz. In this case, the frequency (948 MHz) of the IMD3, which occurs on the first power amplifier111side, is included in the receive band of Band 8. That is, at least a part of the frequency range of the inter-modulation distortion, which occurs between the first transmit signal S1in the first communication band and the second transmit signal S2in the second communication band, overlaps at least a part of the receive band of the first communication band. Therefore, the IMD3, which occurs on the first power amplifier111side, may reduce the reception sensitivity.

Similarly, assume the case in which the frequency of the first transmit signal S1is 897.5 MHz and the frequency of the second transmit signal S2is 847 MHz. In this case, the frequency of the IMD3, which occurs on the second power amplifier112side, is 796.5 MHZ (=2×847 MHZ-897.5 MHz). As described above, the receive filter135has a passband including the receive band of Band 20 (second communication band) according to the 3GPP LTE standard, and the receive band of Band 20 is 791 MHz to 821 MHz. In this case, the frequency (796.5 MHz) of the IMD3, which occurs on the second power amplifier112side, is included in the receive band of Band 20. Therefore, the IMD3, which occurs on the second power amplifier112side, may reduce the reception sensitivity.

As described above, in the radio frequency circuit1according to the first embodiment, the inductor251of the phase circuit25is shunt-connected to the signal path between the second power amplifier112and the transmit filter125. Therefore, the phase of the second transmit signal S2, which is output from the second power amplifier112, may be changed. This enables the input-side leakage signal of the second transmit signal S2and the output-side leakage signal of the second transmit signal S2to be cancelled each other, and enables the leakage signal of the second transmit signal S2to be made small. Thus, the amplitude of the IMD3, which occurs between the first transmit signal S1and the second transmit signal S2, may be made small. As a result, influence of the IMD3 on the receive filter132may be reduced. In short, the radio frequency circuit1according to the first embodiment enables reduction of the reception sensitivity, which is caused by the IMD3, to be suppressed.

As described above, the first power amplifier111supports the first power class, and the second power amplifier112supports the second power class. The maximum output power of the first power class is larger than that of the second power class. That is, the first power amplifier111needs larger maximum output power than the second power amplifier112. Therefore, in the case of simultaneous transmission of the first transmit signal S1and the second transmit signal S2, in the radio frequency circuit1according to the first embodiment, the phase circuit25is connected to the signal path on the second power amplifier112side whose maximum output power is smaller. This enables suppression of the signal loss (loss), which is caused by the phase circuit25, in the signal path on the first power amplifier111side whose maximum output power is larger.

(7) The Layout of the Radio Frequency Circuit

(7.1) The Layout of the Output Matching Circuits and the Phase Circuit

The layout of the output matching circuits (the first output matching circuit151and the second output matching circuit152) and the phase circuit25will be described by referring toFIG.6.

As described above, in the radio frequency circuit1according to the first embodiment, each of the first output matching circuit151and the second output matching circuit152includes an inductor (second inductor)150. As described above, in the radio frequency circuit1, the phase circuit25includes the inductor (first inductor)251. As illustrated inFIG.6, an inductor150has a winding unit (second winding unit)1501. As illustrated inFIG.6, the inductor251has a winding unit (first winding unit)2511.

The winding axis (first winding axis) Ax1of the winding unit2511in the phase circuit25is parallel to the first principal surface21of the mount substrate2, and extends in the second direction D2orthogonal to the first direction D1(seeFIG.4) which is the thickness direction of the mount substrate2. The “winding axis Ax1” is the virtual central axis of the winding unit2511.

In each of the first output matching circuit151and the second output matching circuit152, the winding axis (second winding axis) Ax2of the winding unit1501is parallel to the first principal surface21of the mount substrate2and extends in the third direction D3orthogonal to both the first direction D1, which is the thickness direction of the mount substrate2, and the second direction D2. The winding axis Ax2of the winding unit1501in the first output matching circuit151is parallel to that in the second output matching circuit152. The “winding axis Ax2” is the virtual central axis of the winding unit1501.

That is, as illustrated inFIG.6, the winding axis Ax1of the winding unit2511in the phase circuit25is orthogonal to the winding axis Ax2of the winding unit1501in each of the first output matching circuit151and the second output matching circuit152. This enables suppression of influence of the magnetic flux of each of the output matching circuits151and152on the phase circuit25and influence of the magnetic flux of the phase circuit25on each of the output matching circuits151and152.

(7.2) The Layout of the Phase Circuit and the Second Switch

The layout of the phase circuit25and the second switch18will be described by referring toFIGS.2to4.

As illustrated inFIG.2, the phase circuit25is disposed on the first principal surface21of the mount substrate2. As illustrated inFIG.3, the second switch18is disposed on the second principal surface22of the mount substrate2. As illustrated inFIG.4, in plan view in the thickness direction D1of the mount substrate2, the phase circuit25overlaps the second switch18. More specifically, in plan view in the thickness direction D1of the mount substrate2, the inductor251of the phase circuit25overlaps the second switch18. In the radio frequency circuit1according to the present embodiment, in plan view in the thickness direction D1of the mount substrate2, the entire inductor251overlies a part of the second switch18. In contrast, for example, in plan view in the thickness direction D1of the mount substrate2, a part of the inductor251may overlie the entire second switch18; a part of the inductor251may overlie a part of the second switch18; the entire inductor251may overlie the entire second switch18. In short, the expression, “In plan view in the thickness direction D1of the mount substrate2, the inductor251overlaps the second switch18”, refers to the state in which, in plan view in the thickness direction D1of the mount substrate2, at least a part of the inductor251overlies at least a part of the second switch18.

In the radio frequency circuit1according to the first embodiment, as described above, in plan view in the thickness direction D1of the mount substrate2, the inductor251overlaps the second switch18. This enables the wiring length between the inductor251and the second switch18to be made short.

In the second switch18of the radio frequency circuit1according to the first embodiment, the common terminal18A is connected to the first power amplifier111; the common terminal18B is connected to the second power amplifier112; the selection terminal182is connected to the transmit filter122; the selection terminal185is connected to the transmit filter125; the selection terminal180is connected to the phase circuit25. Therefore, for example, when the common terminal18B is connected to the selection terminal180, the phase of the second transmit signal S2, which is output from the second power amplifier112, may be changed. Thus, the amplitude of the inter-modulation distortion, which occurs between the first transmit signal S1and the second transmit signal S2, may be made small. As a result, reduction of the reception sensitivity, which is caused by the inter-modulation distortion, may be suppressed.

In the radio frequency circuit1according to the first embodiment, as described above, the winding axis (first winding axis) Ax1of the winding unit (first winding unit)2511in the phase circuit25is orthogonal to the winding axis (second winding axis) Ax2of the winding unit (second winding unit)1501in each of the first output matching circuit151and the second output matching circuit152. This enables suppression of influence of the magnetic flux of each of the output matching circuits151and152on the phase circuit25and influence of the magnetic flux of the phase circuit25on each of the output matching circuits151and152.

In the radio frequency circuit1according to the first embodiment, in plan view in the thickness direction D1of the mount substrate2, the inductor251of the phase circuit25overlaps the second switch18. This enables the wiring length between the inductor251and the second switch18to be made short.

(9) Modified Examples

The radio frequency circuit1according to a first modified example of the first embodiment will be described by referring toFIG.7. In the description about the radio frequency circuit1according to the first modified example, substantially the same configurations as those of the radio frequency circuit1according to the first embodiment are designated with the same reference numerals, and will not be described.

The radio frequency circuit1according to the first modified example is different from the radio frequency circuit1(seeFIG.6) according to the first embodiment in that the winding axis Ax2of the winding unit1501in each of the first output matching circuit151and the second output matching circuit152extends in the thickness direction D1(seeFIG.4) of the mount substrate2.

In the radio frequency circuit1according to the first modified example, as illustrated inFIG.7, the first electronic component3, which forms the phase circuit25, and the first electronic components3, which form the first output matching circuit151and the second output matching circuit152respectively, are disposed on the first principal surface21of the mount substrate2.

In the radio frequency circuit1according to the first modified example, like the radio frequency circuit1according to the first embodiment, each of the first output matching circuit151and the second output matching circuit152includes an inductor (second inductor)150, and the phase circuit25includes the inductor (first inductor)251. As illustrated inFIG.7, an inductor150has a winding unit (second winding unit)1501. As illustrated inFIG.7, the inductor251has the winding unit (first winding unit)2511.

The winding axis (first winding axis) Ax1of the winding unit2511in the phase circuit25is parallel to the first principal surface21of the mount substrate2, and extends in the second direction D2orthogonal to the first direction D1which is the thickness direction of the mount substrate2.

In each of the first output matching circuit151and the second output matching circuit152, the winding axis (second winding axis) Ax2of the winding unit1501is orthogonal to the first principal surface21of the mount substrate2. That is, the winding axis Ax2of the winding unit1501extends in the thickness direction D1of the mount substrate2. The winding axis Ax2of the winding unit1501in the first output matching circuit151is parallel to that in the second output matching circuit152.

That is, as illustratedFIG.7, the winding axis Ax1of the winding unit2511in the phase circuit25is orthogonal to the winding axis Ax2of the winding unit1501in each of the first output matching circuit151and the second output matching circuit152. Like the radio frequency circuit1according to the first embodiment, this enables suppression of influence of the magnetic flux of each of the output matching circuits151and152on the phase circuit25and influence of the magnetic flux of the phase circuit25on each of the output matching circuits151and152.

Second Embodiment

The radio frequency circuit1according to the second embodiment will be described by referring toFIG.8. In the description of the radio frequency circuit1according to the second embodiment, substantially the same configurations as those of the radio frequency circuit1according to the first embodiment are designated with the same reference numerals, and will not be described.

As illustrated inFIG.8, the radio frequency circuit1according to the second embodiment is different from the radio frequency circuit1(seeFIG.5) according to the first embodiment in that a phase circuit25A includes an inductor252and a capacitor253.

In the radio frequency circuit1according to the second embodiment, as illustrated inFIG.8, the phase circuit (circuit)25A includes the inductor252and the capacitor253. The capacitor253is connected, at its first end, to the selection terminal180of the second switch18, and is connected, at its second end, to a first end of the inductor252. The inductor252is connected, at its second end, to the ground. That is, in the radio frequency circuit1according to the second embodiment, the inductor252and the capacitor253are connected in series between the selection terminal180(third terminal) and the ground. In the radio frequency circuit1according to the second embodiment, as illustrated inFIG.8, in the case of simultaneous transmission of the first transmit signal S1and the second transmit signal S2, the selection terminal180is connected to the common terminal (second terminal)18B.

Like the radio frequency circuit1according to the first embodiment, in the second switch18of the radio frequency circuit1according to the second embodiment, the common terminal18A is connected to the first power amplifier111; the common terminal18B is connected to the second power amplifier112; the selection terminal180is connected to the phase circuit25A. Therefore, for example, when the common terminal18B is connected to the selection terminal180, the phase of the second transmit signal S2, which is output from the second power amplifier112, may be changed. This enables the amplitude of the inter-modulation distortion, which occurs between the first transmit signal S1and the second transmit signal S2, to be made small. As a result, reduction of the reception sensitivity, which is caused by the inter-modulation distortion, may be suppressed.

In the radio frequency circuit1according to the second embodiment, the selection terminal (third terminal)180is connected to the common terminal (second terminal)18B, and the phase circuit25A changes the phase of the second transmit signal S2. In contrast, for example, the selection terminal180may be connected to the common terminal (first terminal)18A, and the phase circuit25A may change the phase of the first transmit signal S1. Also in this case, reduction of the reception sensitivity, which is caused by the inter-modulation distortion, may be suppressed.

The capacitor253included in the phase circuit25A may be included in the second IC chip27(seeFIG.3) which also includes the second switch18described above. That is, the capacitor253, which is at least a part of the phase circuit25A, and the second switch18may form a single chip. Compared with the case in which the capacitor253of the phase circuit25A and the second switch18are disposed separately, this enables the footprint of the mount substrate2to be made small.

Third Embodiment

The radio frequency circuit1according to the third embodiment will be described by referring toFIG.9. In the description about the radio frequency circuit1according to the third embodiment, substantially the same configurations as those of the radio frequency circuit1according to the first embodiment are designated with the same reference numerals, and will not be described.

As illustrated inFIG.9, the radio frequency circuit1according to the third embodiment is different from the radio frequency circuit1(seeFIG.5) according to the first embodiment in that a phase circuit25B includes two inductors254and255. As illustrated inFIG.9, the radio frequency circuit1according to the third embodiment is different from the radio frequency circuit1according to the first embodiment in that the second switch18further includes a selection terminal (sixth terminal)180B as well as the common terminal (first terminal)18A, the common terminal (second terminal)18B, a selection terminal (third terminal)180A, the selection terminal182(fourth terminal), and the selection terminal185(fifth terminal).

In the radio frequency circuit1according to the third embodiment, as illustrated inFIG.9, the phase circuit (circuit)25B includes the two inductors254and255. The inductor254is connected between the selection terminal180A of the second switch18and the ground. The inductor255is connected between the selection terminal180B of the second switch18and the ground. That is, in the radio frequency circuit1according to the third embodiment, the second switch18further has the selection terminal (sixth terminal)180B as well as the common terminal (first terminal)18A, the common terminal (second terminal)18B, a selection terminal (third terminal)180A, the selection terminal182(fourth terminal), and the selection terminal185(fifth terminal). In the radio frequency circuit1according to the third embodiment, the inductor254is a first inductor, and the inductor255is a second inductor.

In the radio frequency circuit1according to the third embodiment, for example, in the case of two-uplink carrier aggregation using the transmit filter122(seeFIG.1) and the transmit filter125(seeFIG.1), the common terminal18A is connected to the selection terminal182; the common terminal18B is connected to the selection terminal180A and the selection terminal185. In this case, the inductor254of the phase circuit25B is capable of changing the phase of the second transmit signal S2which is output from the second power amplifier112. In this case, Band 8 according to the 3GPP LTE standard is the first communication band; Band 20 according to the 3GPP LTE standard is the second communication band. That is, when the combination of the first communication band and the second communication band is a first combination, the common terminal18B is connected to the selection terminal180A.

In the radio frequency circuit1according to the third embodiment, for example, in the case of two-uplink carrier aggregation using the transmit filter121(seeFIG.1) and the transmit filter124(seeFIG.1), the common terminal18A is connected to the selection terminal181; the common terminal18B is connected to the selection terminal180B and the selection terminal184. In this case, the inductor255of the phase circuit25B is capable of changing the phase of the second transmit signal S2which is output from the second power amplifier112. In this case, Band 5 according to the 3GPP LTE standard is the first communication band; Band 13 according to the 3GPP LTE standard is the second communication band. That is, when the combination of the first communication band and the second communication band is a second combination, the common terminal18B is connected to the selection terminal180B.

Like the radio frequency circuit1according to the first embodiment, in the second switch18in the radio frequency circuit1according to the third embodiment, the common terminal18A is connected to the first power amplifier111; the common terminal18B is connected to the second power amplifier112; the selection terminals180A and180B are connected to the phase circuit25B. Therefore, for example, when the common terminal18B is connected to the selection terminal180A or the selection terminal180B, the phase of the second transmit signal S2, which is output from the second power amplifier112, may be changed. This enables the amplitude of the inter-modulation distortion, which occurs between the first transmit signal S1and the second transmit signal S2, to be made small. As a result, reduction of the reception sensitivity, which is caused by the inter-modulation distortion, may be suppressed.

In the radio frequency circuit1according to the third embodiment, the selection terminal (third terminal)180A or the selection terminal (fourth terminal)180B is connected to the common terminal (second terminal)18B, and the phase circuit25B changes the phase of the second transmit signal S2. In contrast, for example, the selection terminal180A or the selection terminal180B may be connected to the common terminal (first terminal)18A, and the phase circuit25B may change the phase of the first transmit signal S1. Also in this case, reduction of the reception sensitivity, which is caused by the inter-modulation distortion, may be suppressed.

In the radio frequency circuit1according to the third embodiment, for example, Band 1 according to the 3GPP LTE standard may be the first communication band, and Band 3 according to the 3GPP LTE standard may be the second communication band.

Fourth Embodiment

The radio frequency circuit1according to the fourth embodiment will be described by referring toFIG.10. In the description about the radio frequency circuit1according to the fourth embodiment, substantially the same configurations as those of the radio frequency circuit1according to the first embodiment are designated with the same reference numerals, and will not be described.

The radio frequency circuit1according to the fourth embodiment is different from the radio frequency circuit1(seeFIG.5) according to the first embodiment in that a capacitor257, which is a part of a phase circuit25C, is connected in series between the second power amplifier112and the transmit filters121to129(seeFIG.1).

In the radio frequency circuit1according to the fourth embodiment, as illustrated inFIG.10, the phase circuit (circuit)25C includes an inductor256and the capacitor257. The inductor256is connected between the selection terminal (third terminal)180of the second switch18and the ground. The capacitor257is connected between the common terminal (second terminal)18B of the second switch18and the second output matching circuit (output matching circuit)152.

In the radio frequency circuit1according to the fourth embodiment, for example, in the case of two-uplink carrier aggregation using the transmit filter122(seeFIG.1) and the transmit filter125(seeFIG.1), the common terminal18A is connected to the selection terminal182, and the common terminal18B is connected to the selection terminal180and the selection terminal185. That is, in the case of simultaneous transmission using the first transmit signal S1and the second transmit signal S2, the common terminal18B is connected to the selection terminal180. In this case, the capacitor257is connected in series between the second output matching circuit152and the transmit filter125. The inductor256is shunt-connected to the signal path connecting the second output matching circuit152to the transmit filter125. In the radio frequency circuit1according to the fourth embodiment, Band 8 according to the 3GPP LTE standard is the first communication band; Band 20 according to the 3GPP LTE standard is the second communication band.

Like the radio frequency circuit1according to the first embodiment, in the second switch18in the radio frequency circuit1according to the fourth embodiment, the common terminal18A is connected to the first power amplifier111; the common terminal18B is connected to the second power amplifier112; the selection terminal180is connected to the phase circuit25C. Therefore, for example, when the common terminal18B is connected to the selection terminal180, the phase of the second transmit signal S2, which is output from the second power amplifier112, may be changed. This enables the amplitude of the inter-modulation distortion, which occurs between the first transmit signal S1and the second transmit signal S2, to be made small. As a result, reduction of the reception sensitivity, which is caused by the inter-modulation distortion, may be suppressed.

In the radio frequency circuit1according to the fourth embodiment, the selection terminal (third terminal)180is connected to the common terminal (second terminal)18B, and the phase circuit25C changes the phase of the second transmit signal S2. In contrast, for example, the selection terminal180may be connected to the common terminal (first terminal)18A, and the phase circuit25C may change the phase of the first transmit signal S1. Also in this case, reduction of the reception sensitivity, which is caused by the inter-modulation distortion, may be suppressed.

Fifth Embodiment

The radio frequency circuit1according to the fifth embodiment will be described by referring toFIG.11. In the description about the radio frequency circuit1according to the fifth embodiment, substantially the same configurations as those of the radio frequency circuit1according to the first embodiment are designated with the same reference numerals, and will not be described.

The radio frequency circuit1according to the fifth embodiment is different from the radio frequency circuit1(seeFIG.5) according to the first embodiment in that a phase circuit25D is connected to a selection terminal194(second terminal) of the third switch19connected to the first low-noise amplifier141.

As illustrated inFIG.11, in the radio frequency circuit1according to the fifth embodiment, the phase circuit (circuit)25D is connected to the selection terminal194(second terminal) of the third switch19. The phase circuit25D includes an inductor258. In the radio frequency circuit1according to the fifth embodiment, for example, in the case of two-uplink carrier aggregation using the transmit filter122(seeFIG.1) and the transmit filter125(seeFIG.1), the common terminal190(first terminal) of the third switch19is connected to the selection terminal192(third terminal) and the selection terminal194. Thus, the inductor258of the phase circuit25D is shunt-connected to the signal path between the first low-noise amplifier141and the receive filter132.

In the radio frequency circuit1according to the fifth embodiment, the phase circuit25D is capable of changing the phase of a receive signal S3received by the first low-noise amplifier141. As a result, a receive filter (for example, the receive filter132) is difficult to receive influence of the IMD3, enabling suppression of reduction of the reception sensitivity.

In the radio frequency circuit1according to the fifth embodiment, unlike the first to fourth embodiments, the phase circuit25D is disposed on the reception path side, enabling suppression of signal loss (loss) of the first transmit signal S1and the second transmit signal S2.

In the radio frequency circuit1according to the fifth embodiment, the phase circuit22D includes the inductor258. Alternatively, the phase circuit22D may include a capacitor, or may include an inductor and a capacitor.

Modified Examples

Modified examples of the first to fifth embodiments will be described below.

Each of the transmit filters121to129and the receive filters131to139according to the first to fifth embodiments is not limited to a surface acoustic wave filter, and may be, for example, a BAW (Bulk Acoustic Wave) filter. The resonator in the BAW filter is, for example, a FBAR (Film Bulk Acoustic Resonator) or a SMR (Solidly Mounted Resonator). The BAW filter has a substrate. The substrate is, for example, a silicon substrate.

Each of the transmit filters121to129and the receive filters131to139according to the first to fifth embodiments is not limited to a ladder filter, and may be, for example, a longitudinally coupled resonator-type surface acoustic wave filter.

The acoustic-wave filter described above is an acoustic-wave filter using surface acoustic waves or bulk acoustic waves. However, the acoustic-wave filter is not limited to this, and may be, for example, an acoustic-wave filter using boundary acoustic waves, plate waves, or the like.

The combination of the first communication band and the second communication band is not limited to the combination described above. For example, the first communication band may be Band 25 according to the 3GPP LTE standard, and the second communication band may be Band 66 according to the 3GPP LTE standard. Alternatively, the first communication band may be Band 1 according to the 3GPP LTE standard, and the second communication band may be Band 3 according to the 3GPP LTE standard.

The circuit connected to the selection terminals180,180A, and180B of the second switch18is not limited to any of the phase circuits25and25A to25C, and may be a circuit other than a phase circuit. The circuit connected to the selection terminal194of the third switch19is not limited to the phase circuit25D, and may be a circuit other than a phase circuit.

In the present specification, an expression, “A component is disposed on a first principal surface of a substrate”, encompasses, not only the case in which the component is mounted directly on the first principal surface of the substrate, but also the case in which the component is disposed in the first-principal-surface-side space from among the first-principal-surface-side space and the second-principal-surface-side space which are separated by the substrate. That is, the expression, “A component is disposed on a first principal surface of a substrate”, encompasses the case in which the component is mounted on the first principal surface of the substrate, for example, with a different circuit device or electrode interposed in between. The component is, for example, a first electronic component3, but is not limited to a first electronic component3. The substrate is, for example, the mount substrate2. When the substrate is the mount substrate2, the first principal surface is the first principal surface21, and the second principal surface is the second principal surface22.

In the present specification, an expression, “A component is disposed on a second principal surface of a substrate”, encompasses, not only the case in which the component is mounted directly on the second principal surface of the substrate, but also the case in which the component is disposed in the second-principal-surface-side space from among the first-principal-surface-side space and the second-principal-surface-side space which are separated by the substrate. That is, the expression, “A component is disposed on a second principal surface of a substrate”, encompasses the case in which the component is mounted on the second principal surface of the substrate, for example, with a different circuit device or electrode interposed in between. The component is, for example, a second electronic component4, but is not limited to a second electronic component4. The substrate is, for example, the mount substrate2. When the substrate is the mount substrate2, the first principal surface is the first principal surface21, and the second principal surface is the second principal surface22.

In the present specification, an expression, “A is orthogonal to B”, encompasses, not only the state in which the angle of A to B is strictly 90°, but also the case in which the angle of A to B is in the intersection range (for example, +5 degrees) in which the effects are substantially obtained. In the present specification, an expression, “A is parallel to B”, encompasses, not only the state in which the angle of A to B is strictly 0 degree, but also the case in which the angle of A to B is in the intersection range (for example, +5 degrees) in which the effects are substantially obtained.

In the present specification, an expression, “A and B form a single chip”, refers to the state in which a circuit, which forms A, and a circuit, which forms B, are formed on the common (single) substrate. A is, for example, the capacitor253, but is not limited to the capacitor253. B is, for example, the second switch18, but is not limited to the second switch18.

In the present specification, an expression, “A and B are connectable to C simultaneously”, refers to the case in which A and B may be connected to C simultaneously. A is, for example, the selection terminal184of the second switch18, but is not limited to the selection terminal184. B is, for example, the selection terminal180of the second switch18, but is not limited to the selection terminal180. C is, for example, the common terminal18B, but is not limited to the common terminal18B.

Aspects

In the present specification, the aspects described below are disclosed.

A radio frequency circuit (1) according to a first aspect includes a first filter (122), a second filter (125), a third filter (132), a first power amplifier (111), a second power amplifier (112), and a switch (18). The first filter (122) has a passband including the transmit band of a first communication band. The second filter (125) has a passband including the transmit band of a second communication band which is different from the first communication band. The third filter (132) has a passband including the receive band of the first communication band. The first power amplifier (111) is connected to the first filter (122). The second power amplifier (112) is connected to the second filter (125). The switch (18) has a first terminal (18A), a second terminal (18B), a third terminal (180;180A), a fourth terminal (182), and a fifth terminal (185). The first communication band and the second communication band are communication bands available for simultaneous transmission. At least a part of the frequency range of inter-modulation distortion, which occurs between a first transmit signal (S1) in the first communication band and a second transmit signal (S2) in the second communication band, overlaps at least a part of the receive band of the first communication band. In the radio frequency circuit (1), the first terminal (18A) is connected to the first power amplifier (111); the second terminal (18B) is connected to the second power amplifier (112); the fourth terminal (182) is connected to the first filter (122); the fifth terminal (185) is connected to the second filter (125). The radio frequency circuit (1) further includes a circuit (25;25A;25B;25C). The circuit (25;25A;25B;25C) is connected to the third terminal (180;180A). The circuit (25;25A;25B;25C) includes either one or both of an inductor (251;252;254,255;256) and a capacitor (253;257).

This aspect enables suppression of reduction of the reception sensitivity. The reduction is caused by the inter-modulation distortion which occurs between the first transmit signal and the second transmit signal.

A radio frequency circuit (1) according to a second aspect is such that, in the first aspect, when the first transmit signal (S1) and the second transmit signal (S2) are transmitted simultaneously, the third terminal (180;180A) is connected to the first terminal (18A) or the second terminal (18B).

This aspect enables reduction of the reception sensitivity, which is caused by the inter-modulation distortion, to be suppressed.

A radio frequency circuit (1) according to a third aspect is such that, in the first aspect, the first power amplifier (111) supports a first power class, and the second power amplifier (112) supports a second power class. The maximum output power of the first power class is larger than that of the second power class. When the first transmit signal (S1) and the second transmit signal (S2) are transmitted simultaneously, the third terminal (180;180A) is connected to the second terminal (18B).

This aspect enables suppression of signal loss of the first transmit signal (S1) which passes through the first power amplifier (111) supporting the first power class.

A radio frequency circuit (1) according to a fourth aspect is such that, in any one of the first to third aspects, at least a part (for example, the capacitor253,257) of the circuit (25A;25C) and the switch (18) form a single chip.

This aspect enables the footprint of the mount substrate (2) to be made small compared with the case in which the at least a part of the circuit (25A;25C) and the switch (18) are disposed separately.

A radio frequency circuit (1) according to a fifth aspect is such that, in the fourth aspect, the at least a part of the circuit (25A;25C) includes the capacitor (253;257).

This aspect enables the footprint of the mount substrate (2) to be made small compared with the case in which the capacitor (253;257) and the switch (18) are disposed separately.

In any one of the first to fifth aspects, a radio frequency circuit (1) according to a sixth aspect further includes a first output matching circuit (151) and a second output matching circuit (152). The first output matching circuit (151) is connected between the first power amplifier (111) and the first terminal (18A). The second output matching circuit (152) is connected between the second power amplifier (112) and the second terminal (18B). The circuit (25) includes, as the inductor (251), a first inductor (251) having a first winding unit (2511). Each of the first output matching circuit (151) and the second output matching circuit (152) includes a second inductor (150) having a second winding unit (1501). The first winding unit (2511) has a winding axis (Ax1) orthogonal to the winding axis (Ax2) of the second winding unit (1501).

This aspect enables suppression of influence of the magnetic fluxes of the first output matching circuit (151) and the second output matching circuit (152) on the circuit (25) and influence of the magnetic flux of the circuit (25) on the first output matching circuit (151) and the second output matching circuit (152).

In any one of the first to sixth aspects, a radio frequency circuit (1) according to a seventh aspect further includes a mount substrate (2). The mount substrate (2) has a first principal surface (21) and a second principal surface (22) which are opposite each other. The circuit (25) includes the inductor (251). The inductor (251) is disposed on the first principal surface (21) of the mount substrate (2). The switch (18) is disposed on the second principal surface (22) of the mount substrate (2). In plan view in the thickness direction (D1) of the mount substrate (2), the inductor (251) overlaps the switch (18).

This aspect enables the wiring length between the inductor (251) and the switch (18) to be made short.

A radio frequency circuit (1) according to an eighth aspect is such that, in any one of the first to seventh aspects, the circuit (25A) includes the inductor (252) and the capacitor (253). The inductor (252) and the capacitor (253) are connected in series to each other between the third terminal (180) and the ground. When the first transmit signal (S1) and the second transmit signal (S2) are transmitted simultaneously, the third terminal (180) is connected to the first terminal (18A) or the second terminal (18B).

This aspect enables reduction of the reception sensitivity, which is caused by the inter-modulation distortion, to be suppressed.

A radio frequency circuit (1) according to a ninth aspect is such that, in any one of the first to seventh aspects, the switch (18) further has a sixth terminal (180B). The circuit (25B) includes, as the inductor, a first inductor (254) and a second inductor (255). The first inductor (254) is connected between the third terminal (180A) and the ground. The second inductor (255) is connected between the sixth terminal (180B) and the ground. When a combination of the first communication band and the second communication band is a first combination, the first terminal (18A) or the second terminal (18B) is connected to the third terminal (180A). When the combination of the first communication band and the second communication band is a second combination, the first terminal (18A) or the second terminal (18B) is connected to the fourth terminal (180B).

This aspect enables reduction of the reception sensitivity, which is caused by the inter-modulation distortion, to be suppressed in accordance with the combination of the first communication band and the second communication band.

In any one of the first to seventh aspects, a radio frequency circuit (1) according to a tenth aspect further includes an output matching circuit (152). The output matching circuit (152) is connected between the second power amplifier (112) and the switch (18). The circuit (25C) includes the inductor (256) and the capacitor (257). The inductor (256) is connected between the third terminal (180) and the ground. The capacitor (257) is connected between the first terminal (18A) or the second terminal (18B) and the output matching circuit (152). When the first transmit signal (S1) and the second transmit signal (S2) are transmitted simultaneously, the first terminal (18A) or the second terminal (18B) is connected to the third terminal (180).

This aspect enables reduction of the reception sensitivity, which is caused by the inter-modulation distortion, to be suppressed.

A radio frequency circuit (1) according to an eleventh aspect includes a first filter (122), a second filter (125), a third filter (132), a low-noise amplifier (141), and a switch (19). The first filter (122) has a passband including the transmit band of a first communication band. The second filter (125) has a passband including the transmit band of a second communication band which is different from the first communication band. The third filter (132) has a passband including the receive band of the first communication band. The low-noise amplifier (141) is connected to the third filter (132). The switch (19) has a first terminal (190), a second terminal (194), and a third terminal (192). The first communication band and the second communication band are communication bands available for simultaneous transmission. At least a part of the frequency range of inter-modulation distortion, which occurs between a first transmit signal (S1) in the first communication band and a second transmit signal (S2) in the second communication band, overlaps at least a part of the receive band of the first communication band. In the radio frequency circuit (1), the first terminal (190) is connected to the low-noise amplifier (141); the third terminal (192) is connected to the third filter (132). The radio frequency circuit (1) further includes a circuit (25D). The circuit (25D) is connected to the second terminal (194). The circuit (25D) includes either one or both of an inductor (258) and a capacitor.

This aspect enables suppression of reduction of the reception sensitivity. The reduction is caused by the inter-modulation distortion which occurs between the first transmit signal and the second transmit signal.

A communication device (9) according to a twelfth aspect includes the radio frequency circuit (1) according to any one of the first to eleventh aspects, and a signal processing circuit (92). The signal processing circuit (92) is connected to the radio frequency circuit (1).

This aspect enables reduction of the reception sensitivity, which is caused by the inter-modulation distortion, to be suppressed.

REFERENCE SIGNS LIST