System and method for reducing reactive current on a common DC bus with multiple inverters

A system configured to reduce the amplitude of reactive current present on a DC bus shared by multiple inverters is disclosed. The start of the switching period for the modulation routines of each inverter is synchronized, and a carrier phase angle is determined for a carrier signal within each of the inverters. The modulation routine of each inverter generates a reactive current on the shared DC bus. By controlling the carrier phase angle for each inverter, the reactive current of a first inverter may be generated at a phase angle that is offset from the phase angle of the reactive current generated by a second inverter. As a result, the reactive current from the first inverter cancels at least a portion of the reactive current from the second inverter, reducing the total reactive current present on the DC bus.

BACKGROUND OF THE INVENTION

The subject matter disclosed herein relates generally to a system having a direct current (DC) bus which is shared by multiple inverters and, more specifically, to a system for reducing the amplitude of reactive current present on the DC bus as a result of the multiple inverters.

As is known to those skilled in the art, a motor drive receives an input voltage and converts the input voltage to a suitable output voltage for controlling operation of a motor. In an Alternating Current (AC) motor drive, a three phase AC voltage is typically available at, for example, 230 V or 460 V as the input voltage. The motor drive includes a converter section that rectifies the AC input voltage into a Direct Current (DC) voltage. The DC voltage is present across a first rail and a second rail of a DC bus in the motor drive. An inverter section includes switches, such as transistors, thyristors, or silicon-controlled rectifiers to convert the DC voltage on the DC bus into an AC voltage output at the desired magnitude and frequency to control operation of the motor. It is also known that the converter, DC bus, and inverter sections may be enclosed in a single housing as a centralized motor drive configured to be mounted in a control cabinet. Alternately, a portion of the motor drive, such as the inverter section, may be included in a separate housing or integrated into the motor housing and located by the motor to be controlled. The converter section may be included a housing configured to be mounted in the control cabinet. A DC link including a DC bus cable, as well as, inductive or capacitive elements connects the converter section to one or more distributed inverter sections.

The motor drive often utilizes a pulse-width modulation (PWM) routine to control the switches in the inverter section. The switches alternately connect and disconnect either the first or second rail of the DC bus to the AC output. The resulting output is, therefore, either zero volts or fully on at the voltage level present on the DC bus. In order to vary the magnitude of the output voltage, the PWM routine repeatedly executes at a predetermined interval, sometimes referred to as a carrier period, where the inverse of the carrier period is the carrier frequency. The PWM routine receives a reference signal corresponding to the desired output voltage magnitude and controls the switches such that the DC bus is connected to the output for a portion of the carrier period. Thus, during each carrier period, the output is on for a percentage of the carrier period and off for the remaining percentage of the carrier period and an average voltage magnitude for each carrier period results. By varying the percentage of the carrier period that each switch is on or off, the average voltage magnitude varies such that it corresponds to the reference signal input to the PWM routine. If the fundamental frequency of the desired AC voltage is much less than the carrier frequency, the resulting output voltage waveform approximates the desired AC voltage.

However, the high frequency switching generates undesirable reactive currents at the carrier frequency and harmonics, or multiples, thereof, which may be present, for example, on the DC bus. The reactive current present on the DC bus is of particular concern in a distributed motor drive. The inverter sections may be a significant distance from the converter section, and the DC bus cable and other reactive DC link components such as inductors and capacitors present a significant impedance to the high frequency reactive currents. The reactive currents are dissipated, at least in part, as power losses in the DC link components as a result of these impedances. In addition, if multiple inverter sections are connected to a single converter, each generates reactive currents which are transferred to the DC bus, increasing the potential maximum amplitude of the reactive currents.

Historically, it has been known to increase the size of the DC link components for the DC bus between the converter section and the inverter sections to accommodate the increased current. However, in some applications the inverter sections are mounted on the machines that they control and distributed about a controlled machine or process. Thus, tens or hundreds of feet of cabling may be required to connect each inverter section to the converter section. An increase in the wire gauge or other DC link components results in a significant increase in cost and potentially undesirable weight to the controlled system.

Thus, it would be desirable to control the switching of each inverter on a shared DC bus to reduce the overall reactive current present on the DC bus.

BRIEF DESCRIPTION OF THE INVENTION

The subject matter disclosed herein describes a system configured to reduce the amplitude of reactive current present on a DC bus shared by multiple inverters. The system may include one processor configured to control multiple inverters or multiple processors each configured to control a respective inverter. A synchronizing signal is generated by one of the processors to coordinate the start of each switching period for the modulation routines of each inverter. A carrier phase angle is determined for each of the inverters which defines the point within a carrier signal used by the modulation routine of each inverter that corresponds to the start of the switching period. The modulation routine of each inverter generates a reactive current, one component of which is known as a ripple current, on the shared DC bus. By controlling the carrier phase angle for each inverter, the reactive current of a first inverter may be generated at a phase angle that is offset from the phase angle of the reactive current generated by a second inverter. As a result, the reactive current from the first inverter cancels at least a portion of the reactive current from the second inverter, reducing the total reactive current present on the DC bus.

According to one embodiment of the invention, a system for reducing a reactive current present on a DC bus is disclosed. The DC bus has a first voltage rail and a second voltage rail and is configured to have a DC voltage potential present between the first voltage rail and the second voltage rail. The system includes a plurality of inverters, and each inverter includes an input configured to connect to the first and second voltage rails of the DC bus, an output configured to connect to an alternating current (AC) load, and a plurality of switching devices. Each switching device is controlled by a switching signal to alternately connect and disconnect the input to the output.

A modulation module is configured to execute at a periodic interval. During each periodic interval the modulation module determines each of the switching signals as a function of a carrier signal that repeats within the periodic interval and at least one voltage reference signal. Each carrier signal is defined at least in part by a carrier phase angle, and each voltage reference signal corresponds to a desired output voltage for each phase of the AC load. A synchronizing signal is in communication with each of the modulation modules and is used by each modulation module to start its corresponding periodic interval at substantially the same time.

A controller generates the carrier phase angle for each inverter. The carrier phase angle for each inverter is determined such that a first reactive current generated by the plurality of switching devices which alternately connect and disconnect the input to the output in a first inverter is at least partially cancelled by a second reactive current generated by the plurality of switching devices which alternately connect and disconnect the input to the output in a second inverter.

According to another embodiment of the invention, an inverter for connection to a common DC bus is disclosed. The common DC bus has a first voltage rail, a second voltage rail, a DC voltage potential present between the first voltage rail and the second voltage rail, and at least one additional inverter connected to the common DC bus. The inverter includes a first input configured to receive a synchronizing signal, a second input configured to receive an indication of the number of additional inverters connected to the common DC bus, a DC bus input configured to connect to the first and second voltage rails of the common DC bus, an output configured to connect to an AC load, a memory device configured to store an identifier corresponding to each inverter, a controller configured to generate a carrier phase angle, and a plurality of switching devices controlled by a switching signal to alternately connect and disconnect the DC bus input to the output. The carrier phase angle is determined as a function of the number of additional inverters connected to the common DC bus and of the identifier.

A modulation module is configured to execute at a periodic interval. A start time of each periodic interval is defined, at least in part, by the synchronizing signal, and during each periodic interval, the modulation module determines each of the switching signals as a function of a carrier signal that repeats within the periodic interval and at least one voltage reference signal. Each carrier signal is defined at least in part by the carrier phase angle and corresponds to a desired output voltage for each phase of the AC load.

According to yet another embodiment of the invention, a method of controlling a plurality of inverters, where each inverter converts a DC voltage from a shared DC bus to an AC voltage, is disclosed. According to the method, a synchronizing signal is generated with a controller, and the synchronizing signal defines a start of a periodic interval for a modulation routine for each of the inverters. A carrier phase angle is determined for each of the inverters with the controller such that a first reactive current generated by a first inverter is at least partially cancelled by a second reactive current generated by a second inverter. A carrier signal is generated for the modulation routine for each of the inverters with the controller as a function of the carrier phase angle. The modulation module is executing for each inverter to determine a plurality of switching signals as a function of the carrier signal and of at least one voltage reference signal. Each voltage reference signal corresponds to a desired output voltage for each phase of the AC voltage and each switching signal controls a switching device to alternately connect and disconnect the DC bus to an output of the inverter.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Turning initially toFIG. 1, a block diagram representation of a system including multiple inverters15connected to a single DC bus13is illustrated. According to the illustrated embodiment, a converter11receives power in a first form and provides it to the DC bus13. The input may be a DC voltage or an AC voltage, where the AC voltage is either single phase or multi-phase. The converter11is configured to supply a regulated DC voltage on the DC bus13. The system includes at least a first inverter15and a second inverter15, but may include any number of additional inverters15. Each inverter15converts the DC voltage present on the DC bus13to an AC voltage for use by an electrical load. Communication media17extends between the converter11and each inverter15. The communication media17may be a single electrical conductor, multiple electrical conductors, a network cable configured to transmit data packets, or any other suitable communication media17configured to transmit data between the devices according to application requirements. Optionally, the communication media17may extend only between the inverters15.

Turning next toFIG. 2, one embodiment of the present invention includes a motor drive9connected to a three phase AC input voltage12. The motor drive9is configured with multiple inverter sections32and42to provide multiple outputs14and18, respectively. The motor drive9generates a first output14, illustrated as a three phase AC output voltage, to control a first motor16, and a second output18, also illustrated as a three phase AC output voltage, to control a second motor20. It is contemplated that the output voltage,14or18, could be a single phase AC output voltage, a multi-phase AC output voltage, or a DC voltage, as required by the motor connected to the drive without deviating from the scope of the invention.

The AC input voltage12is converted to a DC voltage present on the DC bus24by a converter section22. The DC voltage potential is present between a first rail28and a second rail30of the DC bus24. A DC bus capacitor26is connected between the first and second rails,28and30, to reduce the magnitude of the reactive voltage resulting from converting the AC voltage to a DC voltage. It is understood that the DC bus capacitor26may be a single capacitor or multiple capacitors connected in parallel, in series, or a combination thereof. The magnitude of the voltage potential between the first and second rails,28and30, is generally about equal to or greater than the magnitude of the peak of the AC input voltage. It is further contemplated that the DC bus may include more than two rails including, but not limited to multiple positive rails, multiple negative rails, a neutral rail, or combinations thereof as would be present, for example, in a multi-level converter.

A single converter section22is provided between the input voltage12and the DC bus24while two inverter sections32and42are provided between the common DC bus24and their respective output14and18. It is contemplated that other numbers of inverter sections could be included without deviating from the scope of the invention. The converter section22may be either passive or active, where a passive rectifier utilizes electronic devices such as diodes, which require no control signals, to convert the AC voltage to a DC voltage and an active converter utilizes, for example, transistors, which receive switching signals25to turn on and off, to convert the input voltage12to the desired DC voltage. Referring also toFIG. 4, each inverter section32,42includes multiple switches31which selectively connect one phase of each output14,18to either the first rail28or the second rail30. Each switch31may be a transistor and further include a diode33connected in parallel to the transistor. Each switch31receives a switching signal35,45to enable or disable conduction through the transistor to selectively connect each phase of the output14,18to the first rail28or the second rail30of the DC bus24.

The processor38executes a program stored on a memory device40, where the program includes a series of instructions executable on the processor38to control operation of the motor drive9. Each program receives a reference signal identifying desired operation of the motor16connected to the motor drive9. The processor38also receives feedback signals from voltage and/or current sensors positioned within the motor drive9. Sensors34may be provided to measure the voltage and/or current on the DC bus24, and additional sensors36,46may be provided to measure voltage and/or current on one, two, or all three phases of the outputs,14or18. The program executes a control routine responsive to the reference signal and to the feedback signals and generates a desired voltage reference signal102,112, see alsoFIGS. 7-10. The processor38also executes a modulation routine, such as pulse width modulation (PWM), to generate switching signals,35or45, to control the switches31of each inverter section32or42responsive to the desired voltage reference signal102,112.

Turning next toFIG. 3, another embodiment of the present invention includes a converter27, connected to the three phase AC input voltage12. A DC bus24distributes the DC voltage from the converter27to a first remote device8and a second remote device10. The first and second remote devices,8and10, may be, for example, distributed motor drives. The first remote device8generates a first output14, illustrated as a three phase AC output voltage, to control a first motor16, and the second remote device10generates a second output18, also illustrated as a three phase AC output voltage, to control a second motor20. It is contemplated that still other embodiments of the invention may include various configurations of converters, inverters, and/or multiple axis motor drives connected to a common DC bus without deviating from the scope of the invention. It is further contemplated that the output voltage,14or18, for the first or second remote device,8or10respectively, could be a single phase AC output voltage, a multi-phase AC output voltage, or a DC voltage, as required by the motor connected to the drive without deviating from the scope of the invention.

A converter section22converts the AC input voltage12to a DC voltage potential present on the DC bus24. The converter section22may be either passive or active, where a passive converter utilizes electronic devices such as diodes, which require no control signals, to convert the AC voltage to a DC voltage and an active converter utilizes, for example, transistors, which receive switching signals25to turn on and off, to convert the AC voltage to a DC voltage. The DC voltage potential is present between a first rail28and a second rail30of the DC bus24. A DC bus capacitor26is connected between the first and second rails,28and30, to reduce the magnitude of the reactive voltage resulting from converting the AC voltage to a DC voltage. It is understood that the DC bus capacitor26may be a single capacitor or multiple capacitors connected in parallel, in series, or a combination thereof. The converter section22includes a processor21configured to execute a program stored on a memory device23. If the converter section22is active, the processor may be configured to generate the switching signals25. The processor may also be configured to generate a synchronizing signal to be output to each of the remote devices via, for example, the communication media17.

Each of the remote devices8,10includes a DC bus24electrically connected to the DC bus24of the converter27. Referring also toFIG. 4, each inverter section32,42includes multiple switches31which selectively connect one of the output phases14to either the first rail28or the second rail30. Each switch31may be a transistor and further include a diode33connected in parallel to the transistor. Each switch31receives a switching signal35,45to enable or disable conduction through the transistor to selectively connect each phase of the output14,18to the first rail28or the second rail30of the DC bus24. Each remote device8,10also includes a processor38,48configured to execute a program stored on a memory device40,50. The program includes a series of instructions executable on the processor38,48to control operation of the remote device8,10. Each program receives a reference signal identifying desired operation of the motor16,20connected to the remote device8,10. The reference signal may be, for example, a desired speed or torque and may be transmitted via communication media17from the converter27or from another controller. Each processor38,48also receives feedback signals from voltage and/or current sensors. Sensors34,44may be provided to measure the voltage and/or current on the DC bus24, and additional sensors36,46may be provided to measure voltage and/or current on one, two, or all three phases of the outputs14,18. The program executes a control routine responsive to the reference signal and to the feedback signals and generates a desired voltage reference signal102,112, see alsoFIGS. 7-10. The processor38,48also executes a modulation routine, such as pulse width modulation (PWM), to generate the switching signals35,45to control the switches of each inverter section32,42responsive to the desired voltage reference signal102,112.

In operation, a controller executes to coordinate the modulation routines of each inverter section32,42to reduce the magnitude of reactive current present on the DC bus24. According to one embodiment of the invention, as illustrated inFIG. 2, a single processor38may be used. The processor38may be configured to execute the modulation routines and generate switching signals35,45to each inverter section32,42or optionally, dedicated hardware, such as an FPGA, ASIC, or motor controller may be configured to execute each modulation routine and the processor38may be configured to coordinate operation of the modulation routines. According to another embodiment of the invention, as illustrated inFIG. 2, the converter27and each remote device8,10may each include a processor21,38, and48respectively. One of the processors21,38, and48may be configured to coordinate operation of each of the other processors21,38, and48or, optionally, still another control device may coordinate operation of each of the processors21,38, and48. There are, therefore, various configurations and arrangements of controllers. The present invention will be discussed with respect toFIG. 3; however, the illustrated embodiment is not meant to be limiting.

One of the processors in the system is configured to be a master processor. For illustration, the processor21in the converter27will be designated as the master processor. Optionally, one of the processors38,48in the remote devices may be designated as the master processor. The master processor21generates a synchronizing signal, which is transmitted to each of the remote devices8,10. The synchronizing signal is used by each of the remote devices8,10to coordinate their respective modulation routines. The synchronizing signal may be any suitable signal, such as a single pulse or a counter preset value. The synchronizing signal may be sent initially upon power up, at the start of operation of a remote device8,10, at a periodic interval or any combination thereof.

Referring also toFIG. 5, modulation routines repeatedly execute at a predefined interval known as a switching period, T, which is the inverse of the switching frequency. Each remote device8,10uses the synchronizing signal to coordinate the start of the switching period T, of its respective modulation routine with the other remote devices8,10. As a result, the start of the switching period, T, for each remote device8,10begins at substantially the same time. Once coordinated, each processor38,48executes the modulation routine at substantially the same switching frequency such that the duration of the switching period, T, for each remote device8,10is substantially the same. Once execution has begun, the modulation routines for each remote device8,10continue to operation in tandem. However, slight variations in clock frequencies or component tolerances may cause variations in the actual duration of the switching period, T, for each of the remote devices8,10. Periodically transmitting the synchronizing signal from the master processor21allows the processors38,48of each remote device8,10to resynchronize the start of their respective switching period, T, with the other remote devices8,10. Optionally, each processor38,48may be configured to execute the modulation routine at switching frequencies that are multiples of each other, such as 2 kHz and 4 kHz. Because the largest components of the reactive currents typically occur at multiples of the switching frequency, processors38,48having switching frequencies executing at multiples of each other generate at least a portion of their harmonic components of reactive current at like frequencies.

Referring next toFIGS. 5 and 6, each processor38,48in each remote device8,10generates a carrier signal100,110for use by a modulation routine. The modulation routine of the first inverter section32generates a first carrier signal100, and the modulation routine of the second inverter section42generates a second carrier signal110. Each reference signal100,110is repeated within each switching period, T. According to the illustrated embodiment, each carrier signal100,110is a triangular waveform, having a maximum value and a minimum value symmetrical about zero. The period, T, is defined as having three hundred sixty degrees, similar to a sinusoidal waveform with zero degrees defining the start of a period and 360 degrees defining the end of a period. The start of the next period, T, overlaps the end of the prior period. According toFIG. 5, each of the carrier signals100,110have a carrier phase angle of zero degrees. Setting the carrier phase angle to a value other zero degrees, shifts the carrier signal100,110within the period, T. For example, inFIG. 6, the carrier phase angle of the first carrier signal100remains at zero degrees but the carrier phase angle of the second carrier signal110is set to ninety degrees. As a result, the periodic waveform is shifted by one quarter of the period, T.

Referring next toFIGS. 7-10, the processor38,48in each remote device8,10executes the modulation routine to generate switching signals35,45to control the switches in the respective inverter section32,42as a function of the carrier signals100,110. In each of the figures, execution of two periods of a modulation routine is illustrated. A control module executing on the first processor38generates a first voltage reference signal102a-cfor each phase of the output14of the first remote device8, and a control module executing on the second processor48generates a second voltage reference signal112a-cfor each phase of the output18of the second remote device10. Each of the voltage reference signals102a-c,112a-cis compared against the respective carrier signal100,110. When the voltage reference signal102a-c,112a-cfor one of the phases is greater than the respective carrier signal100,110, the modulation routine generates switching signals35,45to connect the corresponding phase of the output14,18to the DC bus24. During the periods when each phase of the output14,18is connected to the DC bus24, that phase conducts current104,114to the respective motor16,20connected to the remote device8,10. Exemplary waveforms for the currents104a-c,114a-cpresent on each phase of the output14,18are illustrated below the corresponding waveform illustrating the comparison of the voltage reference signals102a-c,112a-cto the carrier signals100,110. The final waveform illustrates the DC bus current120, IDC, present on the DC bus24as a result of the high frequency switching by each of the inverter sections32,42in the remote devices8,10.

Each of the graphs inFIGS. 7-10illustrates a different set of operating conditions for the two remote devices8,10. For each of the exemplary operating conditions illustrated, the inverter sections32,42of each remote device8,10use the synchronizing signal to coordinate the start of the switching period, T, of its respective modulation routine, and the switching period, T, for each inverter section32,42is set to the same duration. InFIG. 7, each of the motors16,20controlled by the remote devices8,10are operating in a motoring mode, and the carrier phase angle for the carrier signals100,110generated by each processor38,48is set to zero degrees. As a result, each carrier signal100,110is in phase with the other. Further, the voltage references102a-c,112a-cfor each of the respective inverter sections32,42are substantially the same resulting in output currents104a-c,114a-cfor each remote device8,10that are substantially the same. As a result, the reactive current generated by each inverter section32,42is substantially in phase and has similar magnitudes. The DC bus current120, therefore, has an increase in the total reactive current present compared to the reactive current that would be generated by either inverter section32,42operating alone.

In contrast, each of the motors16,20controlled by the remote devices8,10are still operating in a motoring mode inFIG. 8; however, the carrier phase angle of the first carrier signal100is set to zero degrees and the carrier phase angle of the second carrier signal110is set to ninety degrees. The currents104a-cgenerated by the first inverter section32are the same as illustrated inFIG. 7. However, the output currents114a-cgenerated by the second inverter section42are shifted in phase as a result of the carrier phase angle offset. As a result, the reactive currents generated by each inverter section32,42are out of phase with each other, and the reactive current generated by the second inverter section42at least partially cancels the reactive current generated by the first inverter section32. The DC bus current120, therefore, has a lower total reactive current present compared to the reactive current that would be generated by either inverter section32,42operating alone.

InFIGS. 9 and 10, the motor16controlled by the first remote device8is operating in a motoring mode; however, the motor20controlled by the second remote device10is operating in a regenerative mode. The inventors observed that the effects on reactive current are reversed when compared toFIGS. 7 and 8in which both motors16,20are in a motoring mode. InFIG. 9, the carrier phase angle for the carrier signals100,110generated by each processor38,48is set to zero degrees. However, the reactive current generated by the second inverter section42is out of phase with the reactive current generated by the first inverter section32and, therefore, the reactive current generated by the second inverter section42at least partially cancels the reactive current generated by the first inverter section32. The DC bus current120, therefore, has a lower total reactive current present compared to the reactive current that would be generated by either inverter section32,42operating alone.

InFIG. 10, the carrier phase angle of the first carrier signal100is set to zero degrees and the carrier phase angle of the second carrier signal110is set to ninety degrees. Although the output currents114a-cgenerated by the second inverter section42are still shifted as a result of the carrier phase angle offset, the reactive current generated by each inverter section32,42is substantially in phase. The DC bus current120, therefore, has an increase in the total reactive current present compared to the reactive current that would be generated by either inverter section32,42operating alone. Consequently, selection of a carrier phase angle for each of the carrier signals100,110in a remote device8,10is a function of whether the corresponding motor16,20controlled by the remote device8,10is operating in a motoring mode or in a regenerating mode. In addition, each motor16,20may transition between the motoring mode and the regenerating mode while continuing to rotate due, for example, to a change in the load on the motor16,20or to a change in the commanded speed of the motor16,20. The carrier phase angle for the carrier signals100,110generated by each processor38,48, therefore, may also be modified during operation such that the reactive currents generated by each remote device8,10continue to cancel each other regardless of the operating mode of the motors16,20.

The carrier phase angle selected for each of the carrier signals100,110is also a function of the number of inverter sections connected to the common DC bus. Referring again toFIG. 1, any number of inverters15may be connected to the DC bus13. The total current, IDC, present on the shared DC bus13is equal to the sum of the currents (e.g., I1+I2+ . . . +In) required by each of the inverters15. Similarly, the reactive current generated by each of the inverters15is also present on the DC bus13and the total reactive current present on the shared DC bus13is the sum of the reactive currents generated by each of the inverters15. The effect of the reactive current from varying numbers of inverters15is illustrated, for example inFIGS. 11 and 13. It is known that an alternating current may be represented as a phasor quantity having an amplitude and an angle. InFIG. 11, two inverters15are connected to the DC bus and the reactive current generated by each of the inverters15is represented as a current having a magnitude equal to “A” and an angle of zero degrees. The resulting reactive current at the output of the converter11has a magnitude equal to “2A” or twice the magnitude of each of the inverters15at an angle of zero degrees. InFIG. 13, three inverters15are connected to the DC bus and the reactive current generated by each of the inverters15is represented as a current having a magnitude equal to “A” and an angle of zero degrees. The resulting reactive current at the output of the converter11has a magnitude equal to “3A” or three times the magnitude of each of the inverters15at an angle of zero degrees.

By controlling the carrier phase angle of each of the carrier signals in the inverters15, the phase angle of the reactive current generated from each of the inverters15is controlled such that the total reactive current on the shared DC bus13is reduced. Referring next toFIGS. 12 and 14, the effect of controlling the phase angle of the reactive current on the total reactive current is illustrated. InFIG. 12, two inverters15are connected to the DC bus. The carrier phase angle of the first inverter15is set to zero degrees, and the reactive current generated by a first inverter15has a magnitude equal to “A” and an angle of zero degrees. The carrier phase angle of the second inverter15is set to ninety degrees, and the reactive current generated by the second inverter15has a magnitude equal to “A” and an angle of one hundred eighty degrees. Consequently, the reactive current generated by the second inverter cancels the reactive current generated by the first inverter and the resulting reactive current on the shared DC bus13is zero. InFIG. 14, three inverters15are connected to the DC bus. The carrier phase angle of the first inverter is set to zero degrees, and the reactive current generated by the first inverter15has a magnitude equal to “A” and an angle of zero degrees. The carrier phase angle of the second inverter is set to sixty degrees, and the reactive current generated by the first inverter15has a magnitude equal to “A” and an angle of one hundred twenty degrees. The carrier phase angle of the third inverter is set to one hundred twenty degrees, and the reactive current generated by the third inverter15has a magnitude equal to “A” and an angle of two hundred forty degrees. Consequently, the reactive currents generated by the three inverters cancel each other and the resulting reactive current on the shared DC bus13is zero.FIGS. 12 and 14represent idealized cancellation of reactive current and actual magnitudes and phases of the reactive currents generated by the inverters may vary. By controlling the carrier phase angle and, in turn, controlling the phase angle of the reactive current, at least a portion of the reactive current from the first inverter15is cancelled by the reactive current from the second inverter15. Thus, the magnitude of the resulting reactive current on the shared DC bus13is less than magnitude of the reactive current that would be present if any one of the inverters15is operating by itself.

According to one embodiment of the invention, a preset value of the carrier phase angle may be assigned to each inverter15connected to the DC bus13. Referring again toFIG. 3, the memory device40,50in each of the remote devices8,10may store the assigned carrier phase angle and the respective processor38,48may retrieve the stored value for generation of the carrier signal. The value of the carrier phase angle may be selected as a function of the switching frequency or multiples thereof, the output frequency or multiples thereof, the number of remote devices8,10connected to the common DC bus24, the operating mode of a motor16,20controlled by one of the remote devices8,10, or a combination thereof.

According to another embodiment of the invention, the value of the carrier phase angle may be dynamically determined for each of the remote devices8,10. The memory device40,50in each of the remote devices8,10may have, for example, a look-up table in which multiple carrier phase angle values are stored. The carrier phase angle for each of the remote devices8,10may be a first value if two inverter sections32,42are connected to the DC bus24and a different value for each additional inverter section that is connected to the DC bus24. Similarly, three or more inverter sections may be connected but not all enabled at the same time to control their respective AC motor. The communication media17between processors may transmit data indicating the number of inverter sections that are currently enabled. Thus, the carrier phase angle for each device may be dynamically updated as different inverter sections are enabled and disabled. Further, the switching frequency of different inverter sections32,42may be set to different values. The communication media17may also transmit data indicating the switching frequency of each inverter section. The inverter sections32,42may then determine a carrier phase angle for each inverter section as a function of the number of inverter sections32,42having either the same switching frequency or switching frequencies at multiples of each other. According to one embodiment of the invention, the processor38,48in each remote device8,10determines the carrier phase angle for the respective device. According to another embodiment of the invention, each of the processors38,48transmit the operating status of the device to a master processor, which may be, for example, the processor21in the converter27, and the master processor determines the carrier phase angle for each device and transmits the carrier phase angle to the respective devices.

According to yet another embodiment of the invention, the processor38,48may measure the current present on the DC bus24and determine the carrier phase angle of each of the devices. The processor38,48receives a feedback signal corresponding to the current present on the DC bus24. The processor38,48determines the spectral content of the feedback signal which contains amplitude information for varying frequencies present on the DC bus24. The spectral content may be determined, for example, using a fourier transform, which may be a function of the output frequency and/or the switching frequency. A high frequency component of the current may be identified from the spectral content, for example, according to the component having the greatest amplitude. The phase of the identified frequency component may then be determined. Multiple processors38,48communicate between each other the respective amplitude and/or phase of the identified frequency component to be compensated.

It is further contemplated that the magnitude of the reactive current may be estimated as a function of the operating parameters conditions of each inverter section32,42. As discussed above, the processor38,42receives a reference signal identifying desired operation of the motor16which is used to control operation of the motor drive9. The reference signal may be, for example, a desired torque, speed, or angular position of the motor. The program generates, for example, an internal torque or current reference which is provided to a current regulator. The current regulator generates the desired voltage reference signal102,112provided to the PWM module. Based on these desired operating conditions, the generated reference signals, the motor parameters, or a combination thereof, each processor38,42may be configured to determine an expected magnitude of reactive current. The carrier phase angle for each inverter section32,42may then be determined to provide the best reduction of total reactive current on the DC bus24as a function of the measured current, estimated current, or a combination thereof. With reference toFIGS. 1, 15, and 16, three inverters15are connected to the DC bus13. Each of the inverters15determine that they are generating a reactive current at substantially the same frequency with magnitudes of “A”, “B”, and “C”. If the carrier phase angles of the inverters are set such that the phase angle of the respective reactive currents are zero degrees, one hundred twenty degrees, or two hundred forty degrees, as discussed above with respect toFIG. 14, the resulting reactive current may have, for example, a magnitude equal to “D” at zero degrees as shown inFIG. 15. Although the magnitude of “D” is less than the largest magnitude of the reactive current generated by any one of the inverters15, it may not be the best obtainable reduction in reactive current. For instance, with reference toFIG. 16, the carrier phase angle of the inverters15may be set such that the phase angle of each reactive current is zero degrees, ninety degrees, and two hundred thirty degrees. The resulting reactive current on the DC bus has a magnitude of “E” at zero degrees, where the magnitude of “E” is less than the magnitude of “D”. Thus, the carrier phase angle may also be determined as a function of the magnitude of the reactive current generated by the inverters15.

It is further contemplated that one of the processors may be configured to generate carrier phase angles for each inverter15. A control routine receives a reference corresponding, for example, to a desired magnitude of reactive current or a desired percentage reduction in the reactive current. The reactive current either measured or estimated at each inverter15is transmitted to the processor generating carrier phase angles. The control routine then generates carrier phase angles at which each inverter is to operate as a function or the reactive current and the reference signal.

According to yet another embodiment of the invention, the carrier phase angle may be utilized to reduce conducted emissions generated by the inverters15. The high frequency content of the reactive current may result in radiated and/or conducted emissions that are coupled back to the AC input voltage. For example, leakage currents may be established through capacitive coupling between leads and the ground connections. If left unmitigated, these conducted emissions could interfere with other electrical devices receiving the same input voltage or connected elsewhere within the facility. If the carrier phase angles of two inverters15operating under substantially identical operating conditions are set one hundred eighty degrees apart from each other, the emissions generated by the first inverter will offset the emissions generated by the second inverter. If more than two inverters15exist in the system, the carrier phase angle of a portion of the inverters15may be set to zero degrees and the carrier phase angle of the remaining inverters15may be set to one hundred eighty degrees.

However, as previously discussed reactive currents are best reduced by carrier phase angles other than zero and one hundred eighty degrees. In fact, the reactive current may be amplified by setting the carrier phase angle of a first inverter15to zero degrees and a second inverter15to one hundred eighty degrees. Thus, the processor configured to generate carrier phase angles for each inverter15, may further monitor the magnitude of current supplied by each inverter15to its corresponding motor to determine a desired operating mode. If for example, the current output to the motor is below a threshold, such as fifty percent of rated current for the inverter15, the carrier phase angle may be controlled to minimize the conducted emissions generated by the inverter15. If, however, the current output to the motor is above the threshold, the carrier phase angle may be controlled to minimize the reactive current on the DC bus13. When the carrier phase angle of an inverter15is updated dynamically, it may result in an undesirable step change in the output of the inverter15. Referring next toFIG. 17, the processor may generate a transitional carrier signal during a transition between carrier phase angles. During the first period200, the inverter15is in a first operating mode and has determined a first carrier phase angle at which the carrier signal is to be generated. The operating conditions of the system change, for example, due to the motor controlled by an inverter15switching between motoring and regenerative operation or by the addition or subtraction of an enabled inverter15connected to the DC bus13. A new carrier phase angle is determined for operation in a second operating mode. At the end of the first period200, the carrier signal is changed from a triangle waveform to a ramp waveform. The carrier signal preferably remains a ramp waveform for one period210and then reverts to a triangle waveform having the new carrier phase angle during the third period220. This transition between operating modes reduces undesirable step changes in the output of the inverter15.