Method of enhancing the adhesion between photoresist layer and substrate and bumping process

A method of enhancing the adhesion between photoresist material and a substrate that can be applied to fabricate bumps on the substrate is provided. The bump fabrication process uses at least photoresist materials each having a different viscosity. A photoresist material having a smaller viscosity, that is, a higher fluidity, is permitted to contact a passivation layer so that all the gaps on the surface of the passivation layer are completely filled and a strong bond is formed between the photoresist layer and the passivation layer. With all the gaps on the substrate completely filled, solder material is prevented from filling the gaps to form a conductive bridge between neighboring bonding pads in a subsequent bump fabrication process.

CROSS REFERENCE TO RELATED APPLICATIONS

This application claims the priority benefit of Taiwan application serial no. 92122955, filed Aug. 21, 2003.

BACKGROUND OF INVENTION

1. Field of the Invention

The present invention relates to a method of enhancing the adhesion between photoresist layer and a substrate and a bumping process. More particularly, the present invention relates to a method of enhancing the adhesion between photoresist layer and a substrate and a bumping process that utilizes at least two photoresist layers having different viscosity.

2. Description of the Related Art

In this information technology society, the use of multimedia systems is expanding at an ever increasing rate. As a result, integrated circuit manufacturers have produced countless new digital electronic devices capable of networking and catering for a variety of personal tastes. To meet the demands of most customers, the electronic device must have a high processing speed, many powerful functions, highly integrated circuits, a miniaturized body having very little weight and a low selling price. Following this trend, the circuit density inside many integrated circuit packages are increased to produce high package density packages such as the ball grid array (BGA) packages, the chip scale packages (CSP), the flip-chip (F/C) packages and the multi-chip modules (MCM). The quality of a package is often assessed according to its integrated circuit package density, which is the number of pins per unit area. For a high-density integrated circuit package, a shorter average wiring length is often translated into a higher signaling speed. Since bump connection is able to shorten transmission length considerably, its application is widespread in high-density packages.

FIGS. 1A through 1Fare schematic cross-sectional views showing the steps in a conventional bumping process. As shown inFIG. 1A, a wafer100having a plurality of bonding pads102thereon is provided. A passivation layer106is formed over an active surface of the wafer100. The passivation layer106exposes the bonding pads102. The wafer further has an under-bump metallurgy (UBM) layer104disposed over the exposed active surface and a portion of the passivation layer106around the bonding pad102.

As shown inFIG. 1B, a photoresist layer108is formed over the wafer100. Thereafter, as shown inFIG. 1C, a photolithography and development process is performed to form a plurality of openings108ain the photoresist layer108above the bonding pads102. Through the openings108a,a portion of the under-bump metallurgy (UBM) layer104is exposed.

As shown inFIG. 1D, a solder material is deposited to fill the openings108aby stencil printing process so that a plurality of solder posts110is formed over the UBM layer104. As shown inFIG. 1E, the photoresist layer108is removed to expose the solder posts110.

As shown inFIG. 1F, a reflow process is then performed to heat the solder posts110into a partially melted state so that a spherical-like solder posts110is formed due to the cohesion thereof. Then, the spherical-like solder posts110are cooled and form a plurality of spherical bumps110a.

In the aforementioned bumping process, the top surface of the passivation layer is typically rough so that the photoresist layer can not adhere entirely on the top surface of the passivation layer. Thus, gaps are often formed between the photoresist layer and the passivation layer. However, with the ever-increasing density in the integrated circuit package, the pitch between neighboring bonding pads is getting smaller and smaller. When the solder material are filled into the openings to form the solder posts, some of the gaps may also be filled by the solder material so that two neighboring bonding pads will electrically bridge through the solder material.

FIG. 1Gis a schematic cross-sectional view showing a portion of the region between neighboring bumps fabricated according to a conventional bumping process. As shown inFIG. 1G, the aforementioned steps of performing a photolithography and development process to form openings in the photoresist layer108and filling the openings by a stencil printing process to form solder posts110are similarly applied. However, due to the gaps112formed between the passivation layer106and the photoresist layer108, some of the solder material may be filled into the gaps112so that the bonding pads102on each side of the gaps112will electrically bridge through the solder material.

SUMMARY OF INVENTION

Accordingly, the present invention is to provide a bumping process capable of preventing the electrical bridging phenomenon occurring between two neighboring bonding pads.

As embodied and broadly described herein, the invention provides a bumping process comprising the following steps. First, a wafer having a plurality of bonding pads and a passivation layer that exposes the bonding pads is provided. A metallic layer is formed over the wafer to cover at least the bonding pads. Thereafter, a first photoresist layer is formed over the wafer and then a second photoresist layer is formed over the first photoresist layer. The first photoresist layer has a viscosity smaller than the second photoresist layer. After that, a photolithography process is performed to form a plurality of openings in the first photoresist layer and the second photoresist layer. The openings expose the metallic layer above the bonding pads. A solder material is filled into the openings to form a plurality of solder posts. Finally, the first photoresist layer and the second photoresist layer are removed.

In the bumping process of the present embodiment, the solder material is filled into the openings by electroplating or stencil printing. Furthermore, after removing the first photoresist layer and the second photoresist layer, a reflow process is performed to form a plurality of bumps over the metallic layer. In addition, the first photoresist layer and the second photoresist layer are dry films, for example.

The bumping process of the present invention utilizes two types of photoresist layer having different viscosity. The photoresist layer adhered with the passivation layer has a smaller viscosity or higher fluidity so that the photoresist layer is able to adhere tightly with the passivation layer. Hence, there is no gaps and electrical bridging phenomenon between the photoresist layer and the passivation layer, thereby providing an effective isolation between two neighboring bonding pads.

The present invention also provides a method for enhancing the adhesion between a photoresist layer and a substrate. First, a first photoresist layer having a lower viscosity is formed over the substrate. Thereafter, a second photoresist layer having a higher viscosity is formed over the first photoresist layer. The first photoresist layer and the second photoresist layer are dry films, for example.

The method of enhancing the adhesion between a photoresist layer and a substrate can be applied to join together various types of photoresist layers and substrates beside the aforementioned bumping process.

DETAILED DESCRIPTION

FIGS. 2A through 2Gare schematic cross-sectional views showing the steps in a bumping process according to one embodiment of the present invention. As shown inFIG. 2A, a wafer200having a plurality of bonding pads202and a passivation layer206that exposes the bonding pads202is provided. A patterned under-bump metallurgy (UBM) layer204is further disposed over each bonding pad202. It should be noted that the top surface of the passivation layer206is not always a smooth flat surface so that a photoresist layer formed over the passivation layer206may not tightly adhere with each other resulting in the formation of gaps206a.In a subsequent printing process, some of the solder material may be filled into these gaps206ato form an unwanted solder bridge that electrically connects two neighboring bonding pads202on each side of the gaps206a.In the prevent invention, two types of photoresist layer having different viscosity are used to mitigate this problem.

As shown inFIGS. 2B and 2C, dry films or other types of photoresist layers are sequentially applied over the wafer200to form a first photoresist layer208and a second photoresist layer210that cover the bonding pads202, the UBM layer204and the passivation layer206. It should be noted that the first photoresist layer208must have a viscosity lower than the second photoresist layer210. With a smaller viscosity, the photoresist material can fill into tiny gaps206aeasily so that the first photoresist layer208and the passivation layer206are tightly adhered to each other.

As shown inFIG. 2D, an exposure and development process is performed on the first photoresist layer208and the second photoresist layer210to form a plurality of openings212that exposes the UBM layer204above the bonding pads202.

As shown inFIGS. 2E and 2F, a solder material is filled into the openings204and form a plurality of solder posts214by a stencil printing process, for example. Thereafter, the first photoresist layer208and the second photoresist layer210are removed.

As shown inFIG. 2G, a reflow process is performed to melt the solder posts214and transform the solder posts214into spherical shape through cohesion. After the solder material is cooled, a plurality of bumps214ais formed over the under-bump metallurgy (UBM) layer.

In summary, the bumping process of the present invention utilizes two photoresist layer having different viscosity to enhance the adhesion between the photoresist layer and the passivation layer. With a lower viscosity, the photoresist material can fill the gaps on the surface of the passivation more readily. With all gaps filled, the solder material can no longer be filled into the gaps to form a solder bridge between neighboring bonding pads and result in an abnormal connection.

Although a bumping process is provided in the aforementioned embodiment to illustrate a method for enhancing the adhesion between a photoresist layer and a substrate, the method can be applied to various types of substrates. Furthermore, a variety of photoresist materials can be used and combined to fit a diversity of application environments.