Etching process, method of manufacturing electronic device, and method of manufacturing polarizing plate

An etching process includes: forming a metal film on a substrate having a pattern formation region; forming a mask having a predetermined pattern on the metal film in the pattern formation region, and forming a resist film in part or all of a periphery of the pattern formation region; and dry-etching the metal film in the pattern formation region.

CROSS REFERENCE TO RELATED APPLICATIONS

This application claims the benefit of Japanese Priority Patent Application JP 2013-176347 filed Aug. 28, 2013, the entire contents of which are incorporated herein by reference.

BACKGROUND

The present technology relates to an etching process using dry etching, a method of manufacturing an electronic device using the etching process, and a method of manufacturing a polarizing plate using the etching process.

In a manufacturing process of an electronic device such as a display unit and an image pickup device, a metal film is patterned to form a wiring pattern. For example, the wiring pattern may be formed as follows. First, a metal film is formed on an entire surface of a substrate, and then a resist film pattern is formed on the metal film using a photolithography technique. Subsequently, the metal film is dry-etched using the resist film as a mask. Subsequently, the resist film is removed to produce a desired wiring pattern. In such a formation method of the wiring pattern, the surface of the metal film is covered by a mask, and the metal film exposed from the mask is scraped in a direction perpendicular to a substrate surface. However, a sidewall of the wiring pattern is exposed to an etching gas atmosphere during the etching. This may easily cause occurrence of so-called side etching in which the sidewall is excessively etched in a horizontal direction with respect to the substrate surface. In particular, a sidewall of a wiring pattern of a corrosion-prone aluminum material may be greatly scraped.

A carbon inclusion generated from the resist film is used as a protective material so that such side etching is suppressed. In a dry etching step using high-density plasma, a carbon inclusion generated from a polymer configuring the resist film is decomposed in the plasma, and adheres to the sidewall of the wiring pattern. Such a carbon inclusion acts as a protective material, so that it is possible to prevent side etching (for example, see Japanese Unexamined Patent Application Publication No. 2009-188224).

SUMMARY

However, when thickness of the resist film is increased with respect to a wiring pattern having a small line width, the resist film becomes unstable, and may fall down. Hence, if a wiring pattern is made finer, a resist film becomes thinner, so that a protective material in an amount sufficient for preventing side etching is less likely to be generated.

It is desirable to provide an etching process that allows side etching to be suppressed even if a metal film is formed into a fine pattern, a method of manufacturing an electronic device using the etching process, and a method of manufacturing a polarizing plate using the etching process.

According to an embodiment of the present technology, there is provided an etching process, including: forming a metal film on a substrate having a pattern formation region; forming a mask having a predetermined pattern on the metal film in the pattern formation region, and forming a resist film in part or all of a periphery of the pattern formation region; and dry-etching the metal film in the pattern formation region.

According to an embodiment of the present technology, there is provided a method of manufacturing an electronic device, including: forming a metal film on a substrate having a wiring formation region; forming a mask having a predetermined pattern on the metal film in the wiring formation region, and forming a resist film in part or all of a periphery of the wiring formation region; and dry-etching the metal film in the wiring formation region to form a wiring pattern.

According to an embodiment of the present technology, there is provided a method of manufacturing a polarizing plate, including: forming a metal film on a substrate having a light entrance region; forming a mask having a predetermined pattern on the metal film in the light entrance region, and forming a resist film in part or all of a periphery of the light entrance region; and dry-etching the metal film in the light entrance region to form a polarization pattern.

In the etching process, the method of manufacturing the electronic device, or the method of manufacturing the polarizing plate according to the above-described embodiment of the present technology, since the resist film is provided in the periphery of the pattern formation region, a carbon inclusion is generated from the resist film, and the metal film pattern is covered by the carbon inclusion.

According to the etching process, the method of manufacturing the electronic device, and the method of manufacturing the polarizing plate of the above-described respective embodiments of the present technology, since the resist film is provided in the periphery of the pattern formation region, it is possible to protect the sidewall of the metal film pattern by the carbon inclusion generated from the peripheral resist film. Consequently, even if a fine pattern is provided in the pattern formation region, a sufficient amount of protective material is easily provided, and it is possible to suppress side etching. It is to be noted that the effect described herein is not necessarily limitative, and any of other effects described in this disclosure may be shown.

DETAILED DESCRIPTION

Hereinafter, some embodiments of the present technology will be described in detail with reference to the accompanying drawings. It is to be noted that description is made in the following order.

1. First embodiment (etching process: an example of using a hard mask).

2. Modification 1 (an example of using a resist mask).

3. Second embodiment (etching process: an example where a pattern formation region is provided in each of some unit regions, and a resist supply region is provided in each of other unit regions).

4. Modification 2 (an example where a resist supply region is further provided in a unit region in which a pattern formation region is provided).

5. Third embodiment (etching process: an example where a resist supply region is provided around unit regions in a central portion).

6. Modification 3 (an example where a resist supply region is further provided in a unit region in which a pattern formation region is provided).

InFIG. 1, (A) illustrates a planar configuration of a pattern of a wiring12formed using an etching process according to a first embodiment of the present technology, and (B) illustrates a sectional configuration along a line B-B in (A). The wiring12may be provided in a pattern formation region11A in a central portion of a surface of a substrate11with, for example, a line width W12of 75 nm and a line interval I12of 75 nm between lines adjacent to each other of the wiring12. For example, the wiring12may be used as a wiring of an electronic device such as a display unit and an image pickup device. For example, the pattern formation region11A may correspond to a region (pixel section), in which a plurality of pixels are disposed, of a display unit, an image pickup device, or the like.

As illustrated inFIG. 2, an insulating film I may be provided between the wiring12and the substrate11. For example, a silicon oxide (SiO2) film, etc. may be used for the insulating film I. For example, the substrate11may be configured of a plate member such as a quartz plate, a glass plate, a silicon plate, a plastic film, or the like. The constituent material of the substrate11may be selected in accordance with a type of a device to be manufactured using this etching process. The wiring12may be configured of a metal material such as aluminum (Al), titanium (Ti), tantalum (Ta), tungsten (W), and the like. The wiring12may each have a stacked structure including, for example, aluminum, titanium (Ti), and titanium nitride (TiN) stacked in this order (Ti/TiN/A1). Alternatively, tungsten silicide (WSi) may be stacked on aluminum to configure WSi/Al wiring12.

For example, such a pattern of the wiring12may be formed by the following etching process (FIGS. 3 to 8). In the following description withFIGS. 3, 4, and 6 to 8, (A) of each ofFIGS. 3, 4, 6, 7, and 8corresponds to the planar configuration of (A) ofFIG. 1, and (B) of each ofFIGS. 3, 4, 6, 7, and 8illustrates a sectional configuration along a line B-B in (A) of each ofFIGS. 3, 4, 6, 7, and 8.

First, an insulating film (the insulating film I inFIG. 2) is provided over the entire surface of the substrate11. Subsequently, a metal film12A including, for example, aluminum is formed on the insulating film by a physical vapor deposition (PVD) process such as a sputtering process ((A) and (B) ofFIG. 3). Subsequently, as illustrated in (A) and (B) ofFIG. 4, a hard mask13having a predetermined pattern is provided in the pattern formation region11A of the substrate11, and a resist film14is provided so as to circumferentially enclose the pattern formation region11A (a resist supply region11B). As will be described in detail later, in the first embodiment, such a resist supply region11B is provided, thereby even if the wiring12has a fine pattern, a desired amount of protective material (a sidewall protective film14P inFIG. 5described later) is generated, and therefore it is possible to suppress side etching of the wiring12. For example, the resist supply region11B may be a portion corresponding to a portion outside a pixel section of a display unit, an image pickup device, or the like.

For example, the hard mask13and the resist supply region11B may be formed as follows. First, for example, a silicon oxide film may be formed on the entire surface of the substrate11, and then the silicon oxide film may be processed with lithography and dry etching to form the hard mask13in the pattern formation region11A. For example, the silicon oxide film may be patterned using a mask formed by patterning an undepicted resist film. Subsequently, for example, the resist film14may be formed in the periphery of the pattern formation region11A using a photolithography technique. Consequently, the resist supply region11B may be formed. For example, a photosensitive polymer material may be used for the resist film14. For example, not only the silicon oxide film but also a silicon nitride (SiN) film may be used for the hard mask13. For example, respective values of a line width W13and a line interval I13of the hard mask13may be set to the same as respective values of the line width W12and the line interval I12of the wiring12(FIG. 1) to be intended to be formed. The line width W13of the hard mask13may be larger than the line width W12of the wiring12. This makes it possible to suppress side etching of the wiring12.

After the hard mask13and the resist film14are provided, the metal film12A is dry-etched using the hard mask13. For example, the dry etching may be performed with the etching gas ionized or radicalized by plasma. For example, a chlorine-based gas such as Cl2or BCl3may be used as the etching gas. A hydrocarbon-based gas such as methane may be used as the etching gas. During such dry etching, the polymer material configuring the resist film14is decomposed, and a carbon inclusion is generated. In the case of using the hydrocarbon-based gas as the etching gas, a carbon inclusion is also generated from the etching gas.

As illustrated inFIG. 5, such a carbon inclusion adheres to the metal film12A during the etching, and is formed as the sidewall protective film14P that prevents excessive etching in a horizontal direction with respect to a surface of the substrate11. Specifically, while a side face in a thickness direction of the metal film12A is exposed from the hard mask13, since the side face is covered by the sidewall protective film14P, side etching of the wiring12(metal film12A) is suppressed. The insulating film I (FIG. 2) between the substrate11and the metal film12A may serve as, for example, an etching stopper.

In this way, the metal film12A is processed by dry etching, so that the metal film12A is removed except for a portion covered with the hard mask13, and the wiring12having the same pattern as that of the hard mask13is formed in the pattern formation region11A (FIG. 6). Subsequently, the metal film12A left in the resist supply region11B is removed. Specifically, as illustrated inFIG. 7, the pattern formation region11A is covered by a mask15configured of, for example, a resist film, and then the metal film12A exposed form the mask15is removed by etching (FIG. 8). Each of dry etching and wet etching may be used as the etching. In the case where the metal film12A in the resist supply region11B does not affect the wiring12, other components, and the like, the metal film12A may be left without being removed. Finally, the hard mask13is removed as necessary, so that the wiring12as illustrated inFIG. 1is completed.

In this way, in the etching process of the first embodiment, the resist film14is provided in the periphery of the pattern formation region11A to form the resist supply region11B. Consequently, it is possible to prevent side etching during dry etching of the metal film12A. This will be described below.

FIG. 9Aillustrates a sectional configuration of one step of an etching process according to a comparative example. In this etching process, dry etching of a metal film112A is performed without providing the resist supply region. A mask114having a predetermined pattern configured of a resist film is provided on the metal film112A, and a pattern of the metal film112A is formed in correspondence to a shape of the mask114. For example, a line width W114of the mask114is 100 nm. To form such a fine pattern, for example, exposure using KrF (248 nm), ArF (198 nm), or the like may be performed. The mask114used for such an exposure step has a small thickness T114. For example, the mask114having a thickness T114of 300 nm to 500 nm both inclusive may be used for KrF, and the mask114having a thickness T114of 200 nm to 300 nm both inclusive may be used for ArF. A sufficient amount of sidewall protective film (the sidewall protective film14P inFIG. 5) is not allowed to be supplied from such a thin mask114, and side etching of the metal film112A proceeds. Hence, a line width W112of wiring formed from the metal film112A is not constant along a thickness direction of the wiring, resulting in formation of a portion narrower than a line width W114of the mask114(W114>W112). In particular, when the metal film112A is configured of a corrosion-prone material such as, for example, aluminum, side etching may easily occur.

When the metal film112A has a large thickness, etching selectivity may be difficult to be secured only by the mask114configured of the resist film. When the metal film112A has a stacked structure, a similar problem may occur.

In such a case, as illustrated inFIG. 9B, a hard mask113configured of, for example, a silicon oxide film may be used. In etching using the hard mask113, first, a silicon oxide film is formed on the metal film112A, and then an undepicted resist film having a predetermined pattern is formed on the silicon oxide film. Subsequently, the resist film is patterned to form a mask, and then the silicon oxide film is processed by dry etching using the mask. Consequently, the hard mask113is formed. Subsequently, the metal film112A is processed by dry etching using the hard mask113. In this dry etching, while a carbon inclusion is generated from the resist film used for forming the hard mask113, an amount of resist is small and therefore side etching easily proceeds compared with the process illustrated inFIG. 9A. Consequently, a line width W112of wiring formed from the metal film112A may be significantly different from a line width W113of the hard mask113(W113>>W112).

In contrast, in the etching process of the first embodiment, since the resist supply region11B is provided in the periphery of the pattern formation region11A, even if the amount of the resist existing in the pattern formation region11A is limited, the sidewall protective film14P (FIG. 5) is allowed to be complementarily supplied from the resist supply region11B. Consequently, even if the line width W12of the wiring12is small, it is possible to prevent side etching of the wiring12. Specifically, it is possible to make a sectional shape of each line of the wiring12to be close to a rectangular shape while the line width W12of the wiring12is constant in a thickness direction. Consequently, it is possible to improve properties of an electronic device, a polarizing plate, or the like formed using this etching process.

Moreover, since the hard mask13is allowed to be used in the pattern formation region11A, it is possible to prevent side etching of the wiring12while etching selectivity is secured.

Furthermore, since the resist supply region11B is provided outside the pattern formation region11A, the resist film14may not affect the pattern of the wiring12(metal film12A).

In this way, in the first embodiment, since the resist film14is disposed around the pattern formation region11A, the sidewall protective film14P is allowed to be generated from the resist film14during the dry etching step of the metal film12A. Consequently, even if the wiring12has a fine pattern, it is possible to supply a sufficient amount of sidewall protective film14P, and suppress side etching of the wiring12.

Although a modification of the first embodiment and other embodiments are now described, the same constitutional portions as those in the first embodiment are designated by the same numerals in the following description, and description of them is appropriately omitted.

As illustrated inFIG. 10, the metal film12A may be patterned using a resist mask23in place of the hard mask (the hard mask13inFIG. 4). Alternatively, as illustrated inFIGS. 11A and 11B, the hard mask13and the resist mask23may be used together. The resist mask23and the hard mask13may be formed in this order on the substrate11(FIG. 11A), or the hard mask13and the resist mask23may be formed in this order on the substrate11(FIG. 11B).

FIG. 12Aillustrates, in a plan view, one step of an etching process according to a second embodiment of the present technology. In this etching process, the pattern formation region11A is formed in each of some unit regions P out of a plurality of unit regions P on the substrate11, and the resist supply region11B is formed in each of other unit regions P. Except for this, this etching process is performed in the same way as in the first embodiment, and the functions and the effects of the etching process are similar to those in the first embodiment.

For example, each of the unit regions P may be a region corresponding to one panel of a display unit or one chip of a semiconductor device. A plurality of pattern formation regions11A may be provided for the individual unit regions P on the substrate11. It is to be noted thatFIG. 1illustrates a portion corresponding to one unit region P. For example, the unit regions P for the pattern formation regions11A and the unit regions P for the resist supply regions11B may be alternately disposed (FIG. 12A). The pattern formation regions11A and the resist supply regions11B may be arranged in any configuration. For example, the number of the unit regions P for the resist supply regions11B may be adjusted in accordance with the amount of sidewall protective film14P (FIG. 5) necessary for uniformly etching a wafer surface.

FIG. 12Billustrates a planar configuration of the unit region P in which the pattern formation region11A is provided. Thus, in this unit region P, the hard mask13is provided on the metal film12A to perform dry etching of the metal film12A. Any of the unit regions P around the unit region P, in which the pattern formation11A region is provided, is formed to be the resist supply region11B. All the unit regions P around that unit region P, in which the pattern formation region11A is provided, may each be the resist supply region11B.

FIG. 12Cillustrates a planar configuration of the unit region P formed as the resist supply region11B. In the unit region P, the resist film14is provided over the entire surface. Specifically, there is provided the resist film14having the same planar shape and the same area as those of the pattern formation region11A illustrated inFIG. 12B. It is therefore possible to supply a larger amount of the sidewall protective film14P during dry etching of the metal film12A than in the case of providing the resist supply region11B together with the pattern formation region11A in one unit region P (for example,FIG. 4). Consequently, it is possible to securely prevent side etching of the wiring12compared with the etching process of the first embodiment. Moreover, since the resist supply region11B is formed separately from the unit region P in which the pattern formation region11A is provided, even if the metal film12A remains in the resist supply region11B, the pattern formation region11A may not be affected thereby. Consequently, it is unnecessary to perform a step of removing the metal film12A in the resist supply region11B after patterning of the metal film12A in the pattern formation region11A.

As illustrated inFIG. 13, the resist supply region11B (resist film14) may be further provided in the unit region P in which the pattern formation region11A is provided. In this unit region P, for example, as described in the first embodiment, the pattern formation region11A is provided in a central portion, and the resist supply region11B is provided in the periphery of the pattern formation region11A. This makes it possible to further supply the sidewall protective film14P at a position closer to the pattern formation region11A in addition to supply from the resist supply region11B (FIG. 12C) including the resist film14provided on the entire surface of the unit region P so that side etching is prevented.

FIG. 14Aillustrates, in a plan view, one step of an etching process according to a third embodiment of the present technology. In this etching process, a plurality of unit regions P, in each of which the pattern formation region11A is provided, are provided in a central portion of the substrate11, and the resist supply region11B is provided outside the plurality of unit regions P. Except for this, this etching process is performed in the same way as in the first embodiment, and the functions and the effects of the etching process are similar to those in the first embodiment.

FIG. 14Billustrates a planar configuration of the unit region P in which the pattern formation region11A is provided. In this unit region P, the hard mask13is provided on the metal film12A to perform dry etching of the metal film12A. Such a pattern formation region11A is provided in all of the unit regions P on the substrate11.

The resist supply region11B (resist film14) is formed so as to enclose the plurality of unit regions P as a whole. While dry etching of the metal film12A is performed, the sidewall protective film14P (FIG. 5) is generated from the resist supply region11B. Consequently, side etching of the wiring12is suppressed. Moreover, as in the second embodiment, the resist supply region11B is provided outside the unit regions P in each of which the pattern formation region11A is provided. Hence, it is unnecessary to perform a step of removing the metal film12A in the resist supply region11B.

As illustrated inFIG. 15, the resist supply region11B (resist film14) may be further provided in the unit region P in which the pattern formation region11A is provided. In this unit region P, for example, as described in the first embodiment, the pattern formation region11A may be provided in a central portion, and the resist supply region11B may be provided in the periphery of the pattern formation region11A. This makes it possible to further supply the sidewall protective film14P at a position closer to the pattern formation region11A in addition to supply from the resist supply region11B (FIG. 14A) outside the unit region P so that side etching is prevented.

The etching process according to an embodiment of the present technology is applicable for manufacturing of a wiring substrate such as, for example, a thin film transistor (TFT) substrate and a complementary metal oxide semiconductor (CMOS) substrate. In a wiring region (pattern formation region) of the wiring substrate, a wiring pattern may be formed by, for example, the etching process according to an embodiment of the present technology. The wiring substrate may be used to manufacture an electronic device such as, for example, a display unit and an image pickup device. In addition, the etching process according to an embodiment of the present technology may be used for, for example, formation of a polarization pattern of a polarizing plate.

FIG. 16illustrates an example of overall configuration of a display unit (display unit1) manufactured using the etching process according to an embodiment of the present technology. The display unit1may include a display layer such as, for example, a liquid crystal layer or an organic electroluminescence (EL) layer between the substrate11and an undepicted counter substrate. The display layer is driven for every pixel100. In a display region110, the pixels100are two-dimensionally disposed in a matrix, and a pixel drive circuit140for driving the pixels100is provided. In the pixel drive circuit140, a plurality of signal lines120A (120A1,120A2, . . . ,120Am, . . . ) are disposed in a column direction (a Y direction), and a plurality of scan lines130A (130A1, . . . ,130An, . . . ) are disposed in a row direction (an X direction). One pixel100is provided at an intersection of each signal line120A and each scan line130A. The signal line120A has two ends connected to a signal line drive circuit120. The scan line130A has two ends connected to a scan line drive circuit130.

The signal line drive circuit120supplies a signal voltage of an image signal corresponding to luminance information supplied from an undepicted signal supply source to a selected pixel100through the signal line120A. The scan line drive circuit130is configured of components such as a shift register that sequentially shifts (transfers) a start pulse in synchronization with a received clock pulse. In write of the image signal to each pixel100, the scan line drive circuit130scans the pixels100on a row basis to sequentially supply a scan signal to each scan line130A. The signal line120A receives a signal voltage from the signal line drive circuit120, and the scan line130A receives the scan signal from the scan line drive circuit130. For example, wiring of such a pixel drive circuit140may be formed using the etching process according to an embodiment of the present technology.

FIG. 17illustrates an overall configuration of a solid image pickup device (an image pickup device2) manufactured using the etching process according to an embodiment of the present technology. The image pickup device2is a CMOS image sensor, and has a pixel section1aas an imaging area in a central portion of a surface of a semiconductor substrate11. In a peripheral region of the pixel section1a, for example, there may be provided a peripheral circuit section230including a row scan section231, a system control section232, a horizontal selection section233, and a column scan section234.

For example, the pixel section1amay have a plurality of unit pixels200that are two-dimensionally arranged in a matrix. In each unit pixel200, for example, a pixel drive line Lread (specifically, a row selection line and a reset control line) is provided for each pixel row, and a vertical signal line Lsig is provided for each pixel column. The pixel drive line Lread transmits a drive signal for signal read from a pixel, and has one end connected to an output end corresponding to each row of the row scan section231. For example, wiring of the pixel drive lines Lread, the vertical signal lines Lsig, and the like may be formed using the etching process according to an embodiment of the present technology.

EXAMPLES

Examples of the present technology are now described.

Experimental Example 1

As described in the second embodiment, a pattern formation region was formed in each of predetermined unit regions, and a resist supply region was formed in each of other unit regions (FIG. 12A), so that a polarizing plate was fabricated. The pattern formation region corresponds to a light entrance region. Specifically, a metal film12A configured of aluminum was formed on a substrate11, and then a hard mask13was formed in the pattern formation region on the metal film12A to perform a dry etching process. Glass was used for the substrate11. A resist film was provided on the entire surface of each of some unit regions around each unit region in which the pattern formation region was formed, so that a resist supply region was formed. The line width W13of the hard mask13in the pattern formation region was 78 nm, and the line interval I13between lines adjacent to each other of the hard mask13was 72 nm (FIG. 18).

Experimental Example 2

A polarizing plate was fabricated in the same way as in the experimental example 1 except that no resist supply region is provided (FIG. 9B). The line width W13of the hard mask13was 73 nm, and the line interval I13between lines adjacent to each other of the hard mask13was 77 nm (FIG. 18).

FIG. 19Aillustrates an SEM photograph of the polarizing plate of the experimental example 1, andFIG. 19Billustrates an SEM photograph of the polarizing plate of the experimental example 2. A line width of the metal film (the wiring12inFIG. 1) after the dry etching was 59 nm in the experimental example 1 and 32 nm in the experimental example 2. Specifically, the amount of side etching was 19 nm in the experimental example 1 and 41 nm in the experimental example 2. In this way, it was possible to suppress side etching in the polarizing plate (the experimental example 1) fabricated while the resist supply regions were provided.

FIG. 20illustrates an extinction ratio of each of the polarizing plates of the experimental examples 1 and 2. The horizontal axis indicates a wavelength, and a vertical axis indicates an extinction ratio. The polarizing plate of the experimental example 1 is extremely improved in extinction ratio compared with the polarizing plate of the experimental example 2. This reveals that it is possible to improve functions of the polarizing plate by accurately patterning the metal film to have a desired width while suppressing side etching.

Although the present technology has been described with the embodiments and the modifications hereinbefore, the technology is not limited thereto, and various modifications or alterations thereof may be made. For example, while the material and the thickness of each layer, and the formation process and the formation condition of each layer have been described in the embodiments and the modifications, these are not limitative. In other words, other materials and thicknesses may be used, or other film formation processes and film formation conditions may be used.

It is to be noted that the effects described in this specification are merely exemplified and not limitative, and other effects may be shown.

It is possible to achieve at least the following configurations from the above-described example embodiments of the disclosure.(1) An etching process, including:forming a metal film on a substrate having a pattern formation region;forming a mask having a predetermined pattern on the metal film in the pattern formation region, and forming a resist film in part or all of a periphery of the pattern formation region; anddry-etching the metal film in the pattern formation region.(2) The etching process according to (1), wherein the dry etching is performed to allow a sidewall protective film generated from the resist film to adhere to a surface of the metal film, the surface being exposed from the mask.(3) The etching process according to (1) or (2), wherein a hard mask is used as the mask.(4) The etching process according to any one of (1) to (3), wherein the metal film is formed of a material including one of aluminum, titanium, tantalum, and tungsten.(5) The etching process according to any one of (1) to (4), wherein a stacked film including an aluminum film is formed as the metal film.(6) The etching process according to (1) or (2), wherein the mask is formed of a resist material.(7) The etching process according to any one of (1) to (6), wherein the pattern formation region is formed in each of a plurality of unit regions provided on the substrate, andthe resist film is formed outside the plurality of unit regions.(8) The etching process according to (7), further including the resist film in the unit region having the pattern formation region formed therein.(9) The etching process according to any one of (1) to (8), wherein the pattern formation region is formed in each of some unit regions out of a plurality of unit regions provided on the substrate, and the resist film is formed in each of other unit regions.(10) The etching process according to (9), further including the resist film in each of the unit regions each having the pattern formation region formed therein.(11) A method of manufacturing an electronic device, including:forming a metal film on a substrate having a wiring formation region;forming a mask having a predetermined pattern on the metal film in the wiring formation region, and forming a resist film in part or all of a periphery of the wiring formation region; anddry-etching the metal film in the wiring formation region to form a wiring pattern.(12) A method of manufacturing a polarizing plate, including:forming a metal film on a substrate having a light entrance region;forming a mask having a predetermined pattern on the metal film in the light entrance region, and forming a resist film in part or all of a periphery of the light entrance region; anddry-etching the metal film in the light entrance region to form a polarization pattern.