Multi-domain vertical alignment liquid crystal display

A liquid crystal display includes an insulating substrate, a plurality of parallel gate lines disposed on the insulating substrate, and a plurality of data lines disposed on the insulating substrate. The data lines insulatingly intercross the gate lines. An intersection between two of the plurality of gate lines and a corresponding two of the plurality of data lines defines a pixel region. Each pixel region includes a first thin film transistor (TFT), a first pixel electrode, and a second pixel electrode. The first TFT includes a first gate electrode connected with the gate line, a first source electrode connected with the first pixel electrode, and a first drain electrode connected with the first pixel electrode. A voltage of the first pixel electrode is different from a voltage of the second pixel electrode.

CROSS-REFERENCE TO RELATED APPLICATION

This application is related to, and claims the benefit of, a foreign priority application filed in China as Serial No. 200710123709.0 on Sep. 28, 2007. The related application is incorporated herein by reference.

FIELD OF THE INVENTION

The present disclosure relates to liquid crystal displays, and more particularly to multi-domain vertical alignment (MVA) liquid crystal displays.

GENERAL BACKGROUND

LCDs have the advantages of portability, low power consumption, and low radiation, and have been widely used in various portable information products such as notebooks, personal digital assistants (PDAs), video cameras and the like. A conventional LCD such as a twisted nematic (TN) LCD provides a limited viewing angle of the LCD. Thus, MVA LCDs were developed to improve the viewing angle of the LCD.

Referring toFIG. 9, one such MVA liquid crystal display is shown. The liquid crystal display1includes a first substrate assembly (not shown), a second substrate assembly generally facing the first substrate assembly, and a liquid crystal layer (not labeled) sandwiched between the first substrate assembly and the second substrate assembly. The liquid crystal layer includes a plurality of liquid crystal molecules131.

The first substrate assembly includes a color filter (not shown), a common electrode (not shown), and a plurality of first protrusions119, arranged in that order. The color filter includes a plurality of red filter units (not shown), a plurality of green filter units (not shown), and a plurality of blue filter units (not shown). The first protrusions119each are triangular in cross-section, and are arranged along a plurality of V-shaped paths.

The second substrate assembly includes a plurality of parallel gate lines121that each extend parallel to a first axis, a plurality of first parallel data lines122that each extend parallel to a second axis orthogonal to the first axis, a plurality of parallel second data lines124each extending parallel to the second axis, a plurality of first thin film transistors (TFTs)161, a plurality of second TFTs162, a plurality of first pixel electrodes171, a plurality of second pixel electrodes172, and a plurality of second protrusions129.

The first data lines122and the second data lines124are arranged alternately. Every two adjacent first data lines122, together with every two adjacent gate lines121, form a rectangular area, defined as a pixel region150. Each pixel region150corresponds to a filter unit of the color filter. Each second data line124is disposed across the middle of a corresponding pixel region150, and divides the pixel region150into a first sub-pixel region151and a second sub-pixel region152.

In each pixel region150, the first TFT161is located in the vicinity of an intersection of the first data line122and the gate line121. The second TFT162is located in the vicinity of an intersection of the second data line124and the gate line121. Gate electrodes (not labeled) of the first TFT161and the second TFT162are connected to the same gate line121. A source electrode (not labeled) of the first TFT161is connected to the first data line122. A source electrode (not labeled) of the second TFT162is connected to the second data line124. The first pixel electrode171is located in the first sub-pixel region151, connected with a drain electrode (not labeled) of the first TFT161. The second pixel electrode172is located in the second sub-pixel region152, connected with a drain electrode (not labeled) of the second TFT162. The first data line122provides a plurality of first gray-scale voltages to the corresponding first pixel electrode171via the first TFT161. The second data line124provides a plurality of second gray-scale voltages to the corresponding second pixel electrode172via the second TFT162. The first gray-scale voltages and the second gray-scale voltages are applied thereto independently.

The second protrusions129each are triangular in cross-section, arranged along a plurality of V-shaped paths. The second protrusions129and the first protrusions119are arranged alternately.

Referring also toFIG. 10, a top-down view of orientations of four of the liquid crystal molecules131, according to the first protrusions119and the second protrusions129, is shown. In each frame, when a first gray-scale voltage is applied to the first pixel electrode171, and a common voltage is applied to the common electrode, an electric field is generated therebetween. The liquid crystal molecules131in the first sub-pixel region151re-orient according to the electric field. The liquid crystal molecules131are guided by the protrusions119,129and thereby become aligned along four different axes. Thus four domains are defined according to the protrusions119,129.

Similarly, in the same frame, when a second gray-scale voltage is applied to the second pixel electrode172, and a common voltage is applied to the common electrode, an electric field is generated therebetween. The liquid crystal molecules131in the second sub-pixel region152re-orient according to the electric field. The liquid crystal molecules131are guided by the protrusions119,129and thereby align along four different axes. Thus four domains are defined according to the protrusions119,129. Referring also toFIG. 11, because the voltages of the first pixel electrode171differ from the voltage of the second pixel electrode172in each frame, a tilt angle θ1of the liquid crystal molecules131in the first sub-pixel region151differs from a tilt angle θ2of the liquid crystal molecules131in the second sub-pixel region152. Thus, a total of eight domains are defined in each pixel region150. The liquid crystal display1achieves 8-domain vertical alignment.

However, each pixel region150requires a first data line122and a second data line124for the liquid crystal display1to perform the 8-domain vertical alignment. The layout of the first data line122and the second data line124is complicated, resulting in an increase of cost thereof.

It is desired to provide an improved liquid crystal display which can overcome the limitations described.

SUMMARY

In one embodiment, a liquid crystal display includes an insulating substrate, a plurality of parallel gate lines on the insulating substrate, and a plurality of data lines on the insulating substrate. The data lines insulatingly intercross the gate lines. An intersection between two of the plurality of gate lines and a corresponding two of the plurality of data lines defines a pixel region. Each pixel region includes a first thin film transistor (TFT), a first pixel electrode, and a second pixel electrode. The first TFT includes a first gate electrode connected with the gate line, a first source electrode connected with the first pixel electrode, and a first drain electrode connected with the first pixel electrode. A voltage of the first pixel electrode is different from a voltage of the second pixel electrode.

Other novel features and advantages will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings. In the drawings, all the views are schematic.

DETAILED DESCRIPTION

Reference will now be made to the drawings to describe certain inventive embodiments of the present disclosure in detail.

Referring toFIG. 1, a liquid crystal display4according to a first embodiment of the present disclosure includes a first substrate assembly (not labeled), a second substrate assembly (not labeled) parallel to the first substrate assembly, and a liquid crystal layer (not labeled) sandwiched between the two substrate assemblies. The liquid crystal layer includes a plurality of liquid crystal molecules431.

The first substrate assembly includes a color filter (not shown), a common electrode (not shown), and a plurality of first protrusions419, arranged in that order from top to bottom. The color filter includes a plurality of red filter units (not shown), a plurality of green filter units (not shown), and a plurality of blue filter units (not shown). The first protrusions419are parallel, each having a triangular cross-section and arranged along a plurality of V-shaped paths.

The second substrate assembly includes a plurality of parallel gate lines411, each extending along a first axis, a plurality of parallel data lines412, each extending along a second axis orthogonal to the first axis, a plurality of first TFTs461, a plurality of second TFTs462, a plurality of first pixel electrodes471, a plurality of second pixel electrodes472, and a plurality of second protrusions429.

Every two adjacent gate lines411and every two adjacent data lines412cooperatively form a rectangular area defined as a pixel region450. Each pixel region450corresponds to a filter unit of the color filter. Each pixel region450includes a first sub-pixel region451and a second sub-pixel region452. Each first sub-pixel region451includes one of the first TFTs461and one of the first pixel electrodes462. The first TFT461is disposed in the vicinity of an intersection of the gate line411and the data line412. Each second sub-pixel region452includes one second TFT462, one second pixel electrode472.

Referring also toFIG. 2andFIG. 3, the first TFT461includes a gate insulating layer52, an amorphous silicon (a-Si) layer53, a heavily doped a-Si layer54, a first source electrode4611, a first drain electrode4612, a passivation layer55, and a first gate electrode4613. The gate insulating layer52covers an insulating substrate51. The amorphous silicon (a-Si) layer53covers the gate insulating layer52. The heavily doped a-Si layer54covers the a-Si layer53. The a-Si layer53and the heavily doped a-Si layer54cooperatively define a concave (not labeled). The first source electrode4611and the first drain electrode4612are disposed on the heavily doped a-Si layer54and adjacent the concave. The passivation layer55covers the first source electrode4611, the first drain electrode4612, and a part of the a-Si layer53exposed by the concave. The first gate electrode4613covers the passivation layer55corresponding to the concave. Thus, the first TFT461is a top-gate TFT.

The first gate electrode4613is connected to a corresponding one of the gate lines411. The first source electrode4611is connected to a corresponding one of the data lines412. The first drain electrode4612is connected to a corresponding one of the pixel electrodes471. The first gate electrode4613, the first pixel electrode471, and the second pixel electrode472can be made by a same photo-mask process, and can be made from a same material such as indium-zinc oxide (IZO) or indium tin oxide (ITO), for example. A thickness of the passivation layer55is less than a thickness of the gate insulating layer52.

Referring toFIG. 4andFIG. 5, the second TFT462includes a second gate electrode4623, the gate insulating layer52, the amorphous silicon (a-Si) layer53, the heavily doped a-Si layer54, a second source electrode4621, a second drain electrode4622, and the passivation layer55. The second gate electrode4623is disposed on an inner surface of the insulating substrate51. The gate insulating layer52covers the insulating substrate51and the second gate electrode4623. The a-Si layer53covers the gate insulating layer52. The heavily doped a-Si layer54covers the a-Si layer53. The a-Si layer53and the heavily doped a-Si layer54cooperatively define a concave (not labeled). The second source electrode4621and the second drain electrode4622are disposed on the heavily doped a-Si layer54adjacent the concave, respectively. The passivation layer55covers the second source electrode4621, the second drain electrode4622, and a part of the a-Si layer53exposed by the concave. Thus the second TFT462is a bottom-gate TFT.

The second gate electrode4623is connected to a corresponding gate line411. The second source electrode4621is connected to the first pixel electrode471. The second drain electrode4622is connected to the second pixel electrode472.

Because the first TFT461is a top-gate TFT and the second TFT is a bottom-gate TFT and the thickness of the passsivation layer55is less than the thickness of the gate insulating layer52, a switch-on voltage of the first TFT461is less than a switch-on voltage of the second TFT462.

Scanning voltages of the gate lines411are substantially equal to the switch-on voltage of the first TFT461. When the scanning voltage is applied to the first sub-pixel region451, the first TFT471is completely switched on. Thus, a voltage of the first pixel electrode471is substantially equal to a voltage of the corresponding data line412. The second TFT472is partly switched on. Thus, a voltage of the second pixel electrode472is lower than a voltage of the corresponding first pixel electrode471.

When the corresponding voltages are applied to the first pixel electrode471and the common electrode, electric fields are generated. Referring toFIG. 6, the liquid crystal molecules431re-orient according to the electric fields. The liquid crystal molecules431are guided by the first protrusions419and the second protrusions429, thereby aligning along four different axes. Thus, four domains are defined accordingly.

Similarly, the liquid crystal molecules431in the second sub-pixel region452are guided by the first protrusions419and the second protrusions429, thereby aligning along four different axes. Referring also toFIG. 7, because the voltage of the first pixel electrode471is higher than that of the second pixel electrode472, tilt angles θ3of the liquid crystal molecules431corresponding to the first pixel electrode471differ from tilt angles θ4of the liquid crystal molecules431corresponding to the second pixel electrode472. Thus, a total of eight domains are defined in the pixel region450. The liquid crystal display4achieves 8-domain vertical alignment.

Each pixel region450of the liquid crystal display4includes the top-gate first TFT461and the bottom-gate second TFT462. The second TFT462is partly switched on when applied with a scanning voltage by the gate line411. That is, a voltage difference generates between the first pixel electrode471and the second pixel electrode472to make the liquid crystal display4achieve 8-domain vertical alignment. No auxiliary data line is needed to apply a different voltage to the second pixel electrode472. That is, each pixel region450of the liquid crystal display4needs only one data line412to achieve 8-domain vertical alignment. Layout of the data lines412is simplified, and the cost of the liquid crystal display4is reduced correspondingly.

Referring toFIG. 8, a side view of a part of a first TFT661according to a second embodiment of the present disclosure is shown. The first TFT661of the second embodiment is similar to the first TFT461of the first embodiment. However, the first TFT661is a double-gate TFT including a first gate electrode6613and a second gate electrode6614. A switch-on voltage of the double-gate first TFT661is less than the switch-on voltage of the top-gate first TFT461of the first embodiment.

Because the switch-on voltage of the first TFT661is reduced, the liquid crystal display thereof has less power consuming and also achieves 8-domain vertical alignment.

Further or alternative embodiments may include, in a first example, the second source electrodes of the second TFTs462may be connected with the same data lines as the first source electrodes of the first TFTs461. In a second example, the second source electrodes of the second TFTs462may be connected with the corresponding first drain electrodes of the first TFTs461. In a third example, a capacitor may be placed to connect the first pixel electrodes and the second pixel electrodes to generate a voltage difference therebetween.