Voltage adjusting circuit, contactless card and contactless card system having the same, and methods of operating the voltage adjusting circuit and the contactless card

A voltage adjusting circuit is provided includes an inducing circuit configured to induce a voltage from electromagnetic waves, a first rectifying circuit configured to rectify an output voltage of the inducing circuit, a control circuit configured to control an output voltage of the first rectifying circuit in response to the output voltage of the first rectifying circuit, and a second rectifying circuit configured to simultaneously rectify and regulate the output voltage of the inducing circuit in response to the output voltage of the first rectifying circuit.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims priority under 35 U.S.C. §119 from Korean Patent Application No 10-2011-0030373, filed on Apr. 1, 2011, in the Korean Intellectual Property Office, the disclosure of which is incorporated by reference herein in its entirety.

BACKGROUND

1. Field of the Invention

Embodiments relates to voltage adjusting technology, and more particularly, to a voltage adjusting circuit to generate constant power in an external environment such as a distance between a card reader and a contactless card, a contactless card and a contactless card system which include the same, and methods of operating the voltage adjusting circuit and the contactless card.

2. Description of the Related Art

Contactless card systems, for example, smart card systems, use contactless information detection technology in which a card reader detects a smart card, which is disposed away from the card reader by a distance, and transmits and receives information to and from the smart card using a radio frequency.

A contactless card is supplied with power by inducing voltage from electromagnetic waves emitted by a card reader. Accordingly, the power induced in the contactless card changes depending on a distance between the contactless card and the card reader or the like. When the power exceeding what is needed for driving the contactless card is induced in the contactless card, an internal logic circuit in the contactless card may malfunction or break down due to the excessive power.

To overcome this problem, constant power needs to be supplied to the internal logic circuit regardless of external environments.

SUMMARY OF THE INVENTION

Some embodiments of the present general inventive concept provide a voltage adjusting circuit to supply constant power to an internal logic circuit regardless of an external environment, a contactless card and a contactless card system which include the same, and methods of rectifying and regulating induced voltage using the voltage adjusting circuit.

The foregoing and/or other features and utilities of the present general inventive concept may be achieved by providing a voltage adjusting circuit including an inducing circuit configured to induce a voltage from electromagnetic waves, a first rectifying circuit configured to rectify an output voltage of the inducing circuit, a control circuit configured to control an output voltage of the first rectifying circuit in response to the output voltage of the first rectifying circuit, and a second rectifying circuit configured to simultaneously rectify and regulate the output voltage of the inducing circuit in response to the output voltage of the first rectifying circuit. The second rectifying circuit may include a plurality of diode-connected P-type metal oxide semiconductor (PMOS) transistors connected in series with each other. A bulk of each of the PMOS transistors may be connected with an output terminal of the first rectifying circuit.

The control circuit may include at least one diode connected in series between the output terminal of the first rectifying circuit and a ground. As an alternative, the control circuit may include a diode backward connected between the output terminal of the first rectifying circuit and the ground. Alternatively, the control circuit may include a comparator configured to compare the output voltage of the first rectifying circuit with a reference voltage and a switching circuit configured to control the output voltage of the first rectifying circuit in response to an output signal of the comparator.

The control circuit may further include a voltage divider connected between the output terminal of the first rectifying circuit and an input terminal of the comparator. The switching circuit may be a MOS transistor functioning as a shunt.

The control circuit may further include a first capacitor connected between an output terminal of the comparator and the ground. The voltage adjusting circuit may further include a second capacitor connected between the output terminal of the first rectifying circuit and the ground and a third capacitor connected between an output terminal of the second rectifying circuit and the ground. The voltage adjusting circuit may further include a regulator configured to regulate an output signal of the second rectifying circuit.

The foregoing and/or other features and utilities of the present general inventive concept may also be achieved by providing a method of operating a voltage adjusting circuit. The method includes the operations of inducing an alternating current (AC) voltage from electromagnetic waves using an inducing circuit; and simultaneously rectifying and regulating the AC voltage using a diode-connected PMOS transistor when the AC voltage is higher than a reference voltage.

The simultaneously rectifying and regulating the AC voltage may include regulating the AC voltage by flowing a current generated by an excessive portion of the AC voltage exceeding the reference voltage to a bulk of the diode-connected PMOS transistor.

Alternatively, the simultaneously rectifying and regulating the AC voltage may include rectifying the AC voltage using a rectifying circuit, decreasing an output voltage of the rectifying circuit by forming a current path from an output terminal of the rectifying circuit to a ground using a control circuit, and providing a decreased output voltage to a bulk of the diode-connected PMOS transistor.

The decreasing the output voltage of the rectifying circuit may include forming the current path when the output voltage of the rectifying circuit exceeds a threshold voltage of at least one diode connected in series between the output terminal of the rectifying circuit and the ground. As an alternative, the decreasing the output voltage of the rectifying circuit may include forming the current path when the output voltage of the rectifying circuit exceeds a breakdown voltage of a diode backward connected between the output terminal of the rectifying circuit and the ground.

Alternatively, the decreasing the output voltage of the rectifying circuit may include comparing the output voltage of the rectifying circuit with a reference voltage and outputting a comparison signal, and forming the current path from the output terminal of the rectifying circuit to the ground in response to the comparison signal when the output voltage of the rectifying circuit exceeds the reference voltage. The method may further include regulating an output voltage of the diode-connected PMOS transistor using a regulator and providing a regulated output voltage to a logic circuit.

The foregoing and/or other features and utilities of the present general inventive concept may also be achieved by providing a contactless card including the above-described voltage adjusting circuit and a logic circuit configured to receive a direct current (DC) voltage from the voltage adjusting circuit and process data received or transmitted through the inducing circuit. The second rectifying circuit may include a plurality of diode-connected PMOS transistors connected in series with each other. A bulk of each of the PMOS transistors may be connected with an output terminal of the first rectifying circuit.

The control circuit may include at least one diode connected in series between the output terminal of the first rectifying circuit and a ground. As an alternative, the control circuit may include a diode backward connected between the output terminal of the first rectifying circuit and the ground. Alternatively, the control circuit may include a comparator configured to compare the output voltage of the first rectifying circuit with a reference voltage and a switching circuit configured to control the output voltage of the first rectifying circuit in response to an output signal of the comparator. The switching circuit may be a MOS transistor functioning as a shunt.

The foregoing and/or other features and utilities of the present general inventive concept may also be achieved by providing a contactless card system includes the above-described contactless card and a card reader configured to supply power to the contactless card using a radio system and communicate with the contactless card. The second rectifying circuit may include a plurality of diode-connected PMOS transistors connected in series with each other. A bulk of each of the PMOS transistors may be connected with an output terminal of the first rectifying circuit.

The control circuit may include at least one diode connected in series between the output terminal of the first rectifying circuit and a ground. As an alternative, the control circuit may include a diode backward connected between the output terminal of the first rectifying circuit and the ground. Alternatively, the control circuit may include a comparator configured to compare the output voltage of the first rectifying circuit with a reference voltage and a switching circuit configured to control the output voltage of the first rectifying circuit in response to an output signal of the comparator. The switching circuit may be a MOS transistor functioning as a shunt.

The foregoing and/or other features and utilities of the present general inventive concept may also be achieved by providing a method of operating a contactless card includes the operations of inducing an AC voltage from electromagnetic waves using an inducing circuit, outputting a DC voltage by simultaneously rectifying and regulating the AC voltage using a diode-connected PMOS transistor when the AC voltage is higher than a reference voltage, and communicating with a card reader using the DC voltage as a driving voltage.

The operation of outputting the DC voltage may include regulating the AC voltage by flowing a current generated by an excessive portion of the AC voltage exceeding the reference voltage to a bulk of the diode-connected PMOS transistor. Alternatively, the operation of outputting the DC voltage may include rectifying the AC voltage using a rectifying circuit; decreasing an output voltage of the rectifying circuit by forming a current path from an output terminal of the rectifying circuit to a ground using a control circuit; and providing a decreased output voltage to a bulk of the diode-connected PMOS transistor.

The foregoing and/or other features and utilities of the present general inventive concept may also be achieved by providing a voltage adjusting circuit usable with a contactless card, the voltage adjusting circuit including an inducing circuit configured to receive a radio signal, and having one or more terminals to output a first voltage signal according to the received radio signal, a circuit unit connected to the terminals of the inducing circuit to rectify and control the voltage signal of the inducing circuit, and having another terminal to generate a second voltage signal, and a second circuit unit connected to the terminals of the inducing circuit to receive the first voltage signal and connected to the another terminal to receive the second voltage signals, and to rectify and regulate the first voltage signal according to the second voltage signal to generate a third voltage signal.

The contactless card may include a logic circuit connected to the second circuit unit to receive the third voltage signal.

The first voltage signal may be variable, the second voltage signal may also be variable, and the third voltage signal may be constant.

DETAILED DESCRIPTION OF THE EXEMPLARY EMBODIMENTS

In the drawing figures, the dimensions of regions may be exaggerated for clarity of illustration. It will also be understood when an element is referred to as being “between” two elements, it can be the only element between the two elements, or one or more intervening elements may also be present. Like reference numerals refer to like elements throughout.

FIG. 1is a diagram illustrating a contactless card system10according to an exemplary embodiment of the present general inventive concept. Referring toFIG. 1, the contactless card system10includes a card reader30and a contactless card50. The card reader30and the contactless card50communicate with each other to transmit and receive data using a radio system. The data may be stored in a memory unit of the contactless card50as information on the contactless card50, the card reader30, a card user, etc. The stored data may be transmitted to the card reader30. The contactless card50may have a power storage unit to store power supplied from the card reader30. The contactless card50may also have a controller to control operations of components of the contactless card50.

The card reader30supplies energy to the contactless card50by emitting electromagnetic waves and communicates with the contactless card50. The contactless card50is disposed within a range to receive the electromagnetic waves emitted from the card reader30. The card reader30includes a power supply32, a logic circuit34, and a resonant circuit36.

The power supply32supplies operating power to the card reader30. The power supply32may be an alternating current (AC) power supply unit. The power supply32may be a DC power supply unit to generate a direct current and/or a converter unit to convert the direct current to an alternating current, so that the operating power is supplied to the card reader30. The logic circuit34processes data to be transmitted to the contactless card50and data received from the contactless card50. The resonant circuit36emits energy necessary to drive the contactless card50and data to be transmitted to the contactless card50in a form of electromagnetic waves. The resonant circuit36may also receive electromagnetic waves from the contactless card50. The resonant circuit36may include a capacitor C0and an inductor L0which are connected in parallel with each other. The resonant circuit36may function as an antenna.

The contactless card50receives electromagnetic waves from the card reader30and outputs electromagnetic waves to the card reader30after processing data. The contactless card50includes a voltage adjusting circuit100and a logic circuit52.

The voltage adjusting (or regulating) circuit100receives electromagnetic waves from the card reader30, and rectifies and regulates the electromagnetic waves. The voltage adjusting circuit unit100may simultaneously rectify and regulate the electromagnetic waves. The voltage adjusting circuit100provides a regulated output voltage to the logic circuit52. The logic circuit52is provided with a direct current (DC) voltage by the voltage adjusting circuit100and processes data which has been received or will be transmitted through the voltage adjusting circuit100.

FIG. 2is a schematic block diagram illustrating the voltage adjusting circuit100ofFIG. 1. Referring toFIGS. 1 and 2, the voltage adjusting circuit100includes an inducing circuit110, a first rectifying circuit120, a control circuit140, and a second rectifying circuit160.

The inducing circuit110may receive electromagnetic waves from the card reader30or emit electromagnetic waves to the card reader30. The inducing circuit110may induce an AC voltage from the electromagnetic waves received from the card reader30. The inducing circuit110may include a resonant circuit, for example, in which an inductor L and a capacitor C are connected in parallel with each other. The inducing circuit110may function as an antenna.

The first rectifying circuit120rectifies an output signal (or an output voltage) of the inducing circuit110and provides a rectified output signal (or output voltage) to the control circuit140and the second rectifying circuit160. In other words, the first rectifying circuit120rectifies an AC voltage corresponding to the output signal of the inducing circuit110to a DC voltage and provides the rectified DC voltage to the control circuit140and the second rectifying circuit160.

Terminals11and12may be input terminals of the first rectifying circuit120and may be output terminals of the inducing circuit110which are respectively connected to the input terminals of the first rectifying circuit120. A terminal14may be an output terminal of the first rectifying circuit120and may be an input terminal of the control circuit140which is connected to the output terminal of the first rectifying circuit120.

The control circuit140controls an output voltage of the first rectifying circuit120in response to an output signal (or voltage) of the first rectifying circuit120. The control circuit140may lower the output voltage of the first rectifying circuit120when the output voltage of the first rectifying circuit120is higher than a reference voltage (Vref). The input terminal14of the control circuit140is connected with the output terminal14of the first rectifying circuit120.

The second rectifying circuit160rectifies and regulates the output signal of the inducing circuit110in response to the output signal of the first rectifying circuit120. The second rectifying circuit160may simultaneously rectify and regulate the output signal of the inducing circuit110in response to the output signal of the first rectifying circuit120. The second rectifying circuit160rectifies an AC voltage corresponding to the output signal of the inducing circuit110to a DC voltage in response to an output voltage corresponding to the output signal of the first rectifying circuit120. In addition, when power exceeding what is necessary to drive the logic circuit52is generated by the inducing circuit110, the second rectifying circuit160regulates the output voltage of the inducing circuit110by consuming the excessive power.

The terminals11and12may be input terminals of the second rectifying circuit160respectively connected with the output terminals of the inducing circuit110. A terminal16may be an output terminal of the second rectifying circuit160connected with an input terminal18of the logic circuit52.

The voltage adjusting circuit100may further include a regulator180. The regulator180is disposed between the second rectifying circuit160and the logic circuit52. The output terminal16of the second rectifying circuit160is connected with an input terminal16of the regulator180. The output terminal18of the regulator180is connected with an input terminal18of the logic circuit52.

The regulator180receives and regulates an output signal of the second rectifying circuit160and provides a regulated output signal to the logic circuit52. In other words, the regulator180regulates the output voltage of the second rectifying circuit160to a driving voltage necessary to drive the logic circuit52and provides the driving voltage to the logic circuit52.

The voltage adjusting circuit100may also include a first capacitor C1connected between the output terminal14of the first rectifying circuit120and a potential, for example, a ground, a second capacitor C2connected between the output terminal16of the second rectifying circuit160and a potential, for example, the ground, and a third capacitor C3connected between the output terminal18of the regulator180and a potential, for example, the ground.

The first capacitor C1may remove ripples from the output voltage of the first rectifying circuit120. The second capacitor C2may remove ripples from the output voltage of the second rectifying circuit160. The third capacitor C3may remove ripples from an output voltage of the regulator180. In other words, the first through third capacitors C1through C3function as a low pass filter.

The first rectifying circuit120and the control circuit140may be formed as a circuit unit having the terminal14to output the voltage to the second rectifying circuit160. The circuit unit may rectify and control the voltage received from the inducing circuit110to output the rectified and controlled voltage to the second rectifying circuit160. Thus, the second rectifying circuit160may output a voltage according to the voltage received through the terminal14from the circuit unit and the voltage received through terminals11and12from the inducing circuit110.

FIG. 3Ais a diagram illustrating a first rectifying circuit122usable in the voltage adjusting circuit100ofFIG. 2according to an exemplary embodiment of the present general inventive concept. Referring toFIGS. 2 and 3A, the first rectifying circuit122is an example of the first rectifying circuit120ofFIG. 2. The first rectifying circuit122includes a plurality of diodes Da and Db respectively connected with the output terminals11and12of the inducing circuit110. The plurality of diodes Da and Db rectify the output signal of the inducing circuit110. Consequently, the first rectifying circuit122rectifies an AC voltage, i.e., the output voltage of the inducing circuit110to a DC voltage and outputs the rectified DC voltage.

FIG. 3Bis a diagram illustrating a first rectifying circuit124usable in the voltage adjusting circuit100ofFIG. 2according to an exemplary embodiment of the present general inventive concept. Referring toFIGS. 2 and 3B, the first rectifying circuit124is an example of the first rectifying circuit120ofFIG. 2. The first rectifying circuit124includes a plurality of diodes Dc and Dd connected with the output terminal11of the inducing circuit110and a plurality of diodes De and Df connected with the output terminal12of the inducing circuit110. The diodes Dc, Dd, De, and Df included in the first rectifying circuit124rectify the output signal of the inducing circuit110. Consequently, the first rectifying circuit124rectifies an AC voltage, i.e., the output voltage of the inducing circuit110to a DC voltage and outputs the rectified DC voltage.

FIG. 4is a diagram illustrating a control circuit142usable in the voltage adjusting circuit100ofFIG. 2according to an exemplary embodiment of the present general inventive concept. Referring toFIGS. 2 through 4, the control circuit142is an example of the control circuit140ofFIG. 2. The control circuit142includes at least one diode connected in series between the output terminal14of the first rectifying circuit120and a potential, for example, the ground. The control circuit142includes three diodes D1, D2, and D3as illustrated inFIG. 4, but the present invention is not limited thereto. The number of diodes usable in the control circuit142may be determined according to a user preference or a design preference thereof.

The inducing circuit110induces an AC voltage from electromagnetic waves and the first rectifying circuit120rectifies the AC voltage to a DC voltage. The DC voltage is divided to the diodes D1, D2, and D3. The diodes D1, D2, and D3may have the same threshold voltage. However, the threshold voltage of diodes or MOS transistors included in the first rectifying circuit120may not be considered in operating the first rectifying circuit120.

When a divided voltage in each diode D1, D2, or D3exceeds the threshold voltage of the diode D1, D2, or D3, the diode D1, D2, or D3is turned on. When all of the diodes D1, D2, and D3included in the control circuit142are turned on, the control circuit142forms a current path from the output terminal14of the first rectifying circuit120to the ground.

When current flows to the ground through the current path, the output voltage of the first rectifying circuit120decreases. The current path is formed only when the output voltage of the inducing circuit110or the output voltage of the first rectifying circuit120exceeds a reference voltage (Vref). When the output voltage of the inducing circuit110or the output voltage of the first rectifying circuit120does not exceed the reference voltage (Vref), the current path is not formed. When the current path is not formed, the output voltage of the first rectifying circuit120is maintained at it is.

The reference voltage (Vref) is determined based on the driving voltage of the logic circuit52. Consequently, the reference voltage (Vref) may be the driving voltage of the logic circuit52. When the threshold voltage of diodes or MOS transistors included in the first rectifying circuit120is considered, the reference voltage (Vref) may be higher than the driving voltage of the logic circuit52.

The number of diodes included in the control circuit142may be determined considering the reference voltage (Vref) and the threshold voltage of a diode. Consequently, the control circuit142controls the output voltage of the first rectifying circuit120in response to the output signal, i.e. voltage of the first rectifying circuit120.

FIG. 5is a diagram illustrating a control circuit144usable in the voltage adjusting circuit100ofFIG. 2according to an exemplary embodiment of the present general inventive concept. Referring toFIGS. 2 and 5, the control circuit144is an example of the control circuit140ofFIG. 2. The control circuit144may include a diode D4connected backward between the output terminal14of the first rectifying circuit120and a potential, for example, the ground. The control circuit144includes only one diode D4in the embodiments illustrated inFIG. 5, but the present general inventive concept is not limited thereto. The number of diodes of the control circuit may be two or more. It is possible that the diode D4of the control circuit144may be a Zener diode.

The inducing circuit110induces an AC voltage from electromagnetic waves and the first rectifying circuit120rectifies the AC voltage to a DC voltage. The DC voltage is provided to the diode D4. The threshold voltage of diodes or MOS transistors included in the first rectifying circuit120may not be considered in operating the first rectifying circuit120.

When the DC voltage provided to the diode D4exceeds the breakdown voltage of the diode D4, the diode D4is turned on. When the diode D4included in the control circuit144is turned on, the control circuit144forms a current path from the output terminal14of the first rectifying circuit120to the ground.

When current flows to the ground through the current path, the output voltage of the first rectifying circuit120decreases. The current path is formed only when the output voltage of the inducing circuit110or the output voltage of the first rectifying circuit120exceeds a reference voltage (Vref). When the output voltage of the inducing circuit110or the output voltage of the first rectifying circuit120does not exceed the reference voltage (Vref), the current path is not formed. When the current path is not formed, the output voltage of the first rectifying circuit120is maintained at it is.

The reference voltage (Vref) is determined based on a driving voltage of the logic circuit52. The reference voltage (Vref) may be the driving voltage of the logic circuit52. When the threshold voltage of at least one diode or MOS transistor included in the first rectifying circuit120is considered, the reference voltage (Vref) may be higher than the driving voltage of the logic circuit52.

The number of diodes included in the control circuit144may be determined considering the reference voltage (Vref) and the breakdown voltage of a diode. The control circuit144may control the output voltage of the first rectifying circuit120in response to the output signal, i.e. the output voltage of the first rectifying circuit120.

FIG. 6is a diagram illustrating a control circuit146usable in the voltage adjusting circuit100ofFIG. 2according to an exemplary embodiment of the present general inventive concept. Referring toFIGS. 2 and 6, the control circuit146is an example of the control circuit140ofFIG. 2. The control circuit146includes a comparator147and a switching circuit148. The control circuit146may also include a voltage divider149and a fourth capacitor C4.

The comparator147compares an input signal, i.e. the output voltage of the first rectifying circuit120, with a reference voltage (Vref) and outputs a comparison signal. The comparator147receives the output voltage of the first rectifying circuit120or a divided voltage from the voltage divider149. The comparator147compares the output voltage of the first rectifying circuit120or the divided voltage from the voltage divider149with the reference voltage (Vref) and outputs the comparison signal according to a comparison result. When the voltage input to the comparator147is higher than the reference voltage (Vref), the comparator147outputs the comparison signal to turn on the switching circuit148. When the voltage input to the comparator147is lower than the reference voltage (Vref), the comparator147outputs the comparison signal to turn off the switching circuit148.

The switching circuit148controls the output voltage of the first rectifying circuit120in response to the comparison signal of the comparator147. The switching circuit148may be implemented by a MOS transistor N3. The MOS transistor N3is illustrated as an N-type MOS (NMOS) transistor, but it is possible that a PMOS transistor can be used as the MOS transistor N3.

The MOS transistor N3is connected between the output terminal14of the first rectifying circuit120and the ground. A gate of the MOS transistor N3is connected to an output terminal of the comparator147.

When the MOS transistor N3is turned on in response to the comparison signal of the comparator147, the MOS transistor N3makes current flow from the output terminal14of the first rectifying circuit120to a potential, for example, the ground, thereby decreasing the output voltage of the first rectifying circuit120. In other words, the MOS transistor N3functions as a shunt. When the MOS transistor N3is turned off in response to the comparison signal of the comparator147, the MOS transistor N3cuts off the current flowing from the output terminal14of the first rectifying circuit120to the ground. Since current does not flow from the output terminal14of the first rectifying circuit120to the ground, the output voltage of the first rectifying circuit120is maintained without dropping.

The voltage divider149divides the output voltage of the first rectifying circuit120and outputs a divided voltage as an input voltage of the comparator147. The voltage divider149includes a plurality of resistors R1and R2connected in series between the output terminal14of the first rectifying circuit120and a potential, for example, the ground. The number of resistors included in the voltage divider149may be changed. The voltage divider149outputs the divided voltage according to a resistance ratio between the resistors R1and R2. The fourth capacitor C4may remove ripples from an output signal of the comparator147. In other words, the fourth capacitor C4functions as a low pass filter. The operations of the control circuit146will be described below.

The inducing circuit110induces an AC voltage from electromagnetic waves and the first rectifying circuit120rectifies the AC voltage to a DC voltage. The DC voltage or the divided voltage of the voltage divider149is provided to the comparator147. The threshold voltage of at least one diode or MOS transistor included in the first rectifying circuit120may not be considered in operating the first rectifying circuit120.

When the voltage input to the comparator147exceeds the reference voltage (Vref), the comparator147outputs the comparison signal to turn on the switching circuit148. When the switching circuit148is turned on, current flows from the output terminal14of the first rectifying circuit120to the ground, and therefore, the output voltage of the first rectifying circuit120drops.

When the voltage input to the comparator147does not exceed the reference voltage (Vref), the comparator147outputs the comparison signal to turn off the switching circuit148. When the switching circuit148is turned off, current does not flow from the output terminal14of the first rectifying circuit120to the ground, and therefore, the output voltage of the first rectifying circuit120does not drop down to the potential.

The reference voltage (Vref) is determined based on the driving voltage of the logic circuit52. Consequently, the reference voltage (Vref) may be the driving voltage of the logic circuit52. When the threshold voltage of at least one diode or MOS transistor included in the first rectifying circuit120is considered, the reference voltage (Vref) may be higher than the driving voltage of the logic circuit52. In addition, since the output voltage of the first rectifying circuit120is divided by the voltage divider149, the reference voltage (Vref) may be lower than the driving voltage.

FIG. 7is a circuit diagram illustrating the second rectifying circuit160ofFIG. 2. Referring toFIGS. 2 and 7, the second rectifying circuit160includes a plurality of diode-connected PMOS transistors P1and P2connected in series with each other. A bulk B of each of the PMOS transistors P1and P2is connected with the output terminal14of the first rectifying circuit120.

The PMOS transistors P1and P2rectify and regulate the output signal of the inducing circuit110in response to the output signal of the first rectifying circuit120. The PMOS transistors P1and P2may simultaneously rectify and regulate the output signal of the inducing circuit110in response to the output signal of the first rectifying circuit120. A reference voltage (Vref) is determined based on the driving voltage of the logic circuit52. The reference voltage (Vref) may be the same as the driving voltage.

The second rectifying circuit160may further include a current return circuit162. The current return circuit162forms a current loop in response to the output voltage, i.e., the AC voltage of the inductive circuit110.

The current return circuit162includes NMOS transistors N1and N2connected in series between the output terminals11and12of the inducing circuit110. A common node of the NMOS transistors N1and N2is connected to a potential, for example, the ground. A gate of the NMOS transistor N1having a terminal connected with a first output terminal (e.g.,11) among the output terminals11and12of the inducing circuit110is connected with a second output terminal (e.g.,12) among the output terminals11and12of the inducing circuit110. A gate of the NMOS transistor N2having a terminal connected with the second output terminal (i.e.,12) among the output terminals11and12of the inducing circuit110is connected with the first output terminal (i.e.,11) among the output terminals11and12of the inducing circuit110.

When a positive voltage is induced at the output terminal11of the inducing circuit110, that is, when a negative voltage is induced at the output terminal12of the inducing circuit110, the NMOS transistor N1is turned off and the NMOS transistor N2is turned on. As a result, current flowing in the output terminal11of the inducing circuit110is provided to the PMOS transistor P1and current flowing in the output terminal12of the inducing circuit110is provided to the ground.

When a negative voltage is induced at the output terminal11of the inducing circuit110, that is, when a positive voltage is induced at the output terminal12of the inducing circuit110, the current return circuit162operates in opposite manner.

FIG. 8is a diagram illustrating the PMOS transistor P1ofFIG. 7.FIG. 9is a graph illustrating current characteristic curves with respect to a bulk voltage V_B of the bulk B of the PMOS transistor P1ofFIG. 8. The characteristics of the PMOS transistor P1will be described with reference toFIGS. 8 and 9. A gate G of the PMOS transistor P1is connected to a source S of the PMOS transistor P1, so that the PMOS transistor P1may function as a diode.

FIG. 9illustrates the changes in a current flowing in drain D, source S, and bulk B of the PMOS transistor P1when a voltage is swept on the bulk B of the PMOS transistor P1after a voltage of 5 V is applied to the drain D of the PMOS transistor P1and a voltage of 4.3 V is applied to the source S of the PMOS transistor P1. When the bulk voltage V_B is lower than 4.3 V, a source current I_S is similar to a bulk current I_B, that is, a drain current I_D flows to both of the source S and the bulk B.

When the bulk voltage V_B is higher than 4.3 V, the bulk current I_B decreases and the source current I_S is similar to the drain current I_D, that is, the drain current I_D mostly flows to the source S and rarely flows to the bulk B.

The above-described characteristics of the PMOS transistor P1are caused by a voltage difference between the source S and the bulk B. The threshold voltage of a MOS transistor is determined not only by an intrinsic threshold voltage but by a voltage difference between source and bulk. Accordingly, the threshold voltage of the MOS transistor increases. As a result, when an AC voltage is rectified to a DC voltage, efficiency decreases.

However, the present general inventive concept may use the above-described characteristics of a PMOS transistor, thereby providing the voltage adjusting circuit100that rectifies and regulates the output signal of the inducing circuit110at a time. In addition, the PMOS transistor has a small voltage difference between bulk and source, and therefore, it is easy to control the operation of the PMOS transistor by adjusting a bulk voltage.

The operations of the second rectifying circuit160will be described in detail with reference toFIGS. 2 and 7. When a positive AC voltage output to the output terminal11of the inducing circuit110exceeds the reference voltage (Vref), the control circuit140decreases the output voltage of the first rectifying circuit120. When the decreased output voltage is provided to the bulk of the PMOS transistor P1, the PMOS transistor P1rectifies and regulates the AC voltage at a time.

A current provided to the PMOS transistor P1may flow to the output terminal16of the second rectifying circuit160in a CASE I and also may flow to the bulk of the PMOS transistor P1in a CASE II. The current flowing to the bulk is generated by an excessive portion of the AC voltage exceeding the reference voltage (Vref) because the decreased output voltage is provided to the bulk and the bulk voltage is lower than the source voltage in the PMOS transistor P1. Therefore, the second rectifying circuit160simultaneously rectifies and regulates the AC voltage.

When a positive AC voltage output to the output terminal11of the inducing circuit110does not exceed the reference voltage (Vref), the control circuit140does not decrease the output voltage of the first rectifying circuit120. Accordingly, the output voltage of the first rectifying circuit120, which has the same value as the AC voltage, is provided to the bulk B of the PMOS transistor P1. At this time, since the bulk voltage is the same as the AC voltage, a difference between the bulk voltage and the source voltage does not exist or is ignorable. Accordingly, the current flowing to the PMOS transistor P1does not flow to the bulk of the PMOS transistor P1or the current flowing to the bulk of the PMOS transistor P1is ignorable. Consequently, the second rectifying circuit160rectifies the AC voltage. When a negative AC voltage is output to the output terminal11of the inducing circuit110, the PMOS transistor P2operates in the same manner as described above.

FIG. 10is a flowchart illustrating a method of operating a voltage adjusting circuit according to an exemplary embodiment of the present general inventive concept. The method includes inducing an AC voltage from electromagnetic waves using an inducing circuit (e.g.,110ofFIG. 2) in operation S100and rectifying and regulating the AC voltage at a time using a diode-connected PMOS transistor when the AC voltage exceeds a reference voltage (Vref) in operation S140.

The method may further include comparing the AC voltage with the reference voltage (Vref) in operation S120to simultaneously rectifying and regulating the AC voltage.

In simultaneously rectifying and regulating the AC voltage in operation S140, a current generated by an excessive portion of the AC voltage exceeding the reference voltage (Vref) may be made to flow to a bulk of the diode-connected PMOS transistor to regulate the AC voltage.

Alternatively, the operation S140of simultaneously rectifying and regulating the AC voltage may comprises rectifying the AC voltage using a rectifying circuit, decreasing an output voltage of the rectifying circuit by forming a current path from an output terminal of the rectifying circuit to the ground using a control circuit, and providing the decreased output voltage to a bulk of the diode-connected PMOS transistor.

In decreasing the output voltage of the rectifying circuit, the current path may be formed when the output voltage of the rectifying circuit exceeds a threshold voltage of at least one diode (e.g., D1, D2, and/or D3ofFIG. 4) connected in series between the output terminal of the rectifying circuit and the ground.

As an alternative, in decreasing the output voltage of the rectifying circuit, the current path may be formed when the output voltage of the rectifying circuit exceeds a breakdown voltage of a diode (e.g., D4ofFIG. 5) connected backward between the output terminal of the rectifying circuit and the ground. Alternatively, the decreasing the output voltage of the rectifying circuit may comprises outputting a comparison signal as a result of comparing the output voltage of the rectifying circuit with the reference voltage (Vref), and decreasing the output voltage of the rectifying circuit by forming the current path from the output terminal of the rectifying circuit to the ground when the output voltage of the rectifying circuit exceeds the reference voltage (Vref) in response to the comparison signal.

The method may further include regulating the output voltage of the diode-connected PMOS transistor using a regulator and providing a regulated output voltage to a logic circuit.

FIG. 11is a flowchart illustrating a method of operating a contactless card according to an exemplary embodiment of the present general inventive concept. The method includes inducing an AC voltage from electromagnetic waves using an inducing circuit in operation S200, outputting a DC voltage by rectifying and regulating the AC voltage at a time using a diode-connected PMOS transistor when the AC voltage exceeds a reference voltage (Vref) in operation S240, and communicating with a card reader using the DC voltage as a driving voltage in operation S260.

The method may further include comparing the AC voltage with the reference voltage (Vref) in operation S220to simultaneously rectifying and regulating the AC voltage. In outputting the DC voltage in operation S240, a current generated by an excessive portion of the AC voltage exceeding the reference voltage (Vref) may be made to flow to a bulk of the diode-connected PMOS transistor to regulate the AC voltage.

Alternatively, the operation S240of outputting the DC voltage may also comprise rectifying the AC voltage using a rectifying circuit, decreasing an output voltage of the rectifying circuit by forming a current path from an output terminal of the rectifying circuit to the ground using a control circuit, and providing the decreased output voltage to a bulk of the diode-connected PMOS transistor.

As described above, according to an embodiment of the present general inventive concept, a voltage adjusting circuit consumes an excessive portion of power exceeding what is needed to drive a contactless card, thereby preventing excessive power from being provided to an internal logic circuit. As a result, the voltage adjusting circuit prevents malfunction and breakdown of the contactless card. In addition, the voltage adjusting circuit adjusts the bulk voltage of a diode-connected PMOS transistor, thereby simultaneously rectifying and regulating an induced voltage.