RF circuit with control unit to reduce signal power under appropriate conditions

A disclosed RF circuit includes a power amplifier that produces an RF output signal, a detector to generate a detector signal indicative of a power of the RF output signal, and an offset unit to produce an offset signal that indicates low supply voltage conditions. The power of the RF output signal is reduced, at least in part, by a control signal reflecting a combination of the detector signal and the offset signal. The circuit may include a transmitter to provide an RF input signal to the power amplifier. The transmitter may receive the control signal and adjust a power of the RF input signal based on the control signal. The detector may produce a control current indicative of the RF output signal power. The offset unit produces the offset signal based on a difference between the supply voltage and a nominal supply voltage value.

BACKGROUND

The disclosed subject matter is in the field of radio frequency (RF) circuits and, more particularly, battery-powered RF circuits for use in applications requiring linear power amplifier performance.

2. Related Art

RF circuits are prevalent in a larger number of applications including wireless or mobile telecommunications where one or more rechargeable batteries frequently provide the source of power for the RF circuit. RF circuits are well known to include transmitter units that produce an RF signal that is provided as an input to a power amplifier. The power amplifier amplifies and/or modulates the received signal to generate an RF output signal that is converted into electromagnetic waves and propagated into space via an antenna. Generally, a battery powered RF device includes a voltage regulator or power supply circuit that receives the voltage produced by the battery as its input and generates one or more supply voltages and/or reference voltages for the RF circuit.

A significant component of any RF transmitter is the power amplifier. The power amplifier produces the RF output signal that is propagated into space by means of an antenna. Linear power amplifier performance is important in conjunction with certain types of modulation schemes, including modulation schemes designed to provide high rates of data transfer including, as a popular example, the Global System for Mobile communication (GSM) Enhanced Data rates for GSM Evolution (EDGE) modulation, referred to herein as GSM-EDGE or simply EDGE.

When the amplitude of an RF output signal produced by a power amplifier approaches the power amplifier's supply voltage, the output signal may begin to compress. When signal compression occurs, the spectral purity of the signal begins to degrade and the linear operation of the power amplifier may degrade simultaneously. Even marginally non-linear power amplifiers may produce signals having characteristics that fail to meet certain specified requirements. Parameters most at risk of becoming non-compliant during a low battery condition in an EDGE modulation implementation are the Alternate Channel Power Ratio (ACPR) and the Error Vector Magnitude (EVM).

DETAILED DESCRIPTION

In one aspect, a disclosed RF circuit is operable to be powered by a supply voltage. The supply voltage may be provided by a battery that outputs a battery voltage. In some implementations, the battery voltage is applied to the RF circuit so that the supply voltage equals the battery voltage. The RF circuit includes a power amplifier that is powered by the supply voltage The power amplifier receives an RF input signal and produces an RF output signal. The RF circuit further includes a detector that generates a detector output signal. The detector output signal is indicative of the RF output signal power. An offset unit adjusts the detector output signal when a low battery voltage condition is encountered. The low battery voltage condition occurs when the supply voltage is below a specified threshold. In this manner, the RF output signal power is controlled at least in part by the adjusted detector signal. Moreover, because the adjusted detector output signal is influenced by the RF output signal power and the battery voltage, the RF output signal power is adjusted based at least in part on the current signal power and the battery voltage.

The disclosed RF circuit may include a transmitter operable to generate the RF input signal. The transmitter may be implemented as a transceiver that is operable as a receiver as well. In some embodiments, the adjusted control signal is provided to and received by the transmitter. In these embodiments, the transmitter may adjust the power level of the transmitter output signal, which is provided to the power amplifier as the RF input signal, based on the value of the adjusted control signal.

The disclosed RF circuit may include a coupler that receives the RF output signal. In some embodiments, the coupler produces a first coupled signal, which is provided to an antenna, and a second coupled signal, which is provided to an input of the detector. The detector may be an I/V converter that produces a control current indicative of the RF output signal power and, in some embodiments, a control current that is proportional to the logarithmic RF output signal power (expressed in dBm).

The control unit is operable to supplement the control current based at least in part on a difference between the battery voltage and a nominal value of the battery voltage. The supply voltage is generated from and/or determined by the battery voltage. The control circuit is operable to supplement the control current based on a difference between an actual battery voltage and a nominal battery voltage. The offset unit may be operable to adjust the control signal to reduce the RF output signal power sufficiently to ensure linear operation of the power amplifier despite the low supply voltage condition. In some embodiments, for example, the offset unit is operable to adjust the adjusted detector output signal to reduce the RF output signal power sufficiently to ensure compliance with ACPR and EVM requirements as specified under EDGE.

The disclosed RF circuit thus monitors the battery voltage and reduces the power of the RF output signal during low battery voltage conditions. A low battery voltage condition occurs when the battery voltage drops below a specified value. In some embodiments, the power of the RF output signal is decreased, in dBm, by an amount proportional to the amount by which the battery voltage is below nominal.

In some embodiments, empirical data indicates that the RF output signal power needs just 1.5 dB of attenuation when the battery voltage drops from 3.5 V to 3.0 V. The decrease in RF output signal power in exchange for improved linear performance of the power amplifier may be acceptable in certain environments. Accounting for reference voltage variation and circuit tolerances, it may be desirable to achieve 2 dB of power attenuation when the battery voltage drops from 3.5 to 3.0 V.

In another aspect, a disclosed transceiver or transmitter system suitable for use in an RF application includes a power amplifier that receives an RF input signal and produces an RF output signal having an RF output signal power. A battery provides a supply voltage to the power amplifier. A transmitter provides the RF input signal to the power amplifier. The system reduces the RF output signal power when it detects a battery voltage below a nominal voltage.

The system may determine a difference between the battery voltage and a nominal voltage. The RF output signal power reduction, in dBm, may be a linear or nonlinear function of the difference. In embodiments where the nominal voltage is approximately 3.5 V, the RF output signal power reduction may be in the range of approximately 3 db/V to approximately 4 db/V.

The disclosed system may include a control unit that receives an input signal that indicates the RF output signal power. The system may generate a control signal based on the RF output signal power and the battery voltage. The system may be operable to reduce the RF output signal power by providing the control signal to the transmitter. The transmitter is operable to reduce a power level of the RF input signal when the cut back circuit supplements the detector output signal. The control unit includes a detector that produces a detector signal based on the RF output signal power and an offset unit that supplements the detector signal when the battery voltage is below the nominal voltage.

The detector may generate a detector current indicative of the RF output signal power. The offset circuit sinks an offset current proportional to a difference between the battery voltage and the nominal voltage. The offset current supplements the detector current. The supplemental detection current is drawn through a feedback resistor of an operational amplifier of the detector to produce the control signal.

In still another aspect, a disclosed RF circuit includes a power amplifier that receives a supply voltage equal to or otherwise derived from a battery voltage. The RF circuit is further operable to produce an RF output signal. A control unit determines the battery voltage and the RF output signal power. The control unit may reduce the RF output signal power when a combination of the battery voltage and the RF output signal power are indicative of nonlinear power amplifier operation, for example, when the battery voltage drops below a nominal value or specified threshold and the power of the RF output power is high. The RF circuit further includes a transceiver that provides an RF input signal to the power amplifier. The control signal may be provided to the transceiver, in which case, reducing the RF output signal power may be achieved by adjusting the power of the RF input signal.

Referring now toFIG. 1, selected elements of an embodiment of an RF system100are depicted to emphasize the use of a control unit121to reduce or otherwise regulate the power of the RF output signal106when the system100is in an operational state that jeopardizes the linear operation of the system100. For example the RF output signal power is reduced when a supply voltage drops below a specified threshold to avoid non-linear operation that may occur when the RF output signal amplitude approaches or exceeds the supply voltage. In cases where the supply voltage is provided by or derived from a battery, the power reduction may occur when the battery voltage drops below a specified threshold, e.g., a nominal value of the battery voltage. By reducing the power of RF output signal106when the battery voltage drops below a nominal value, the disclosed RF circuit preserves linear operation in exchange for a modest decrease in RF output signal power.

The power tradeoff is especially desirable in EDGE and other digital wireless technologies that enable high data transmission rates. EDGE modulation, for example, employs 8 phase shift keying (8 PSK) for the upper five of its nine modulation and coding schemes. Faithful EDGE operation requires a spectrally pure RF output signal. When the RF output signal amplitude approaches the supply voltage, signal compression degrades the spectral purity and jeopardizes compliance with at least two linearity specifications, namely, ACPR and EVM.

The elements of RF system100shown inFIG. 1include a power amplifier102that receives an RF input signal104from a transmitter140and produces an RF output signal106. Although labeled as a transmitter, transmitter140may be implemented as an integrated transmitter/receiver, i.e., a transceiver. RF system100as depicted further includes a battery150that generates a battery voltage (VBAT). In the depicted embodiment, the battery160is connected directly to the power terminals of power amplifier102so that the supply voltage for power amplifier102is VBAT.

RF output signal106as shown inFIG. 1is delivered to a coupler108, which couples a first portion109of RF output signal106to antenna110for transmission. Coupler108also couples a second portion of RF output signal106, referred to herein as RF sample signal112, to a detector unit120of the control unit121.

Control unit121produces a control signal136that RF system100uses to regulate the power of RF output signal106. In the depicted embodiment, control of RF output signal power is achieved pre-amplification, by controlling the power of the RF input signal104generated by transmitter140. In this embodiment, control signal135is delivered to transmitter140. Transmitter140controls the power of RF input signal104based, at least in part, on the magnitude or other characteristic of control signal135.

In the embodiment depicted inFIG. 1, the detector unit120of control unit121includes a log detector119that produces a detector current (IDET)123based on the power of RF output signal106. Control unit121also includes an offset unit130that produces an offset current (IOS)131based on the battery voltage VBAT. The two currents are added together to obtain a control current ICON124. ICON124is converted to control signal135, a voltage, by a current-to-voltage block125.

When VBATis equal to or greater than its nominal value, IOS131is zero. When IOS131is zero, control signal135is determined solely by IDET123, i.e., ICON=IDET. RF system100preserves linear operation in certain operational states by supplementing the IDET123with a non-zero value of IOS131to increase the magnitude of ICON124. The larger magnitude of ICON124results in an increased value of control signal135. Transmitter140interprets increases in the magnitude control signal135as representing an increase in the power of RF output signal106. Transmitter140will respond by attenuating the power of RF input signal104. Increasing the magnitude of control signal135when VBATdrops below a nominal value or below another specified threshold enables control unit121to preserve linear operation by causing a reduction in the power of RF output signal106during lower battery voltage states.

Offset unit130as shown inFIG. 1receives the battery voltage VBATand a regulated voltage VREGas its inputs. VREGmay be produced from VBATby a conventional switch-mode or linear regulator115. As suggested by its name, VREGis a relatively stable voltage that provides a reference signal. In some embodiments, the ratio of VREGvariation to VBATvariation is 10% or less. Offset unit130produces the offset current IOS131based on the values of VBATand VREG. Under the assumption that VREGis relatively invariant, IOS131is largely a function of the battery voltage VBAT. Specifically, as described in greater detail with respect toFIG. 2, the magnitude of IOS131increases as VBATdrops below a specified threshold. Offset unit130controls the magnitude of IOS131to cause an RF signal power reduction during low battery voltage operation. In some embodiments, the reduction in power of RF output signal106caused by IOS131is sufficient to preserve the linearity of power amplifier102and the spectral purity of RF output signal106during low battery voltage operation so that linearity parameters including ACPR and EVM remain compliant with the applicable specifications during low battery voltage operation.

Referring now toFIG. 2, selected components of an embodiment of control unit121are illustrated. In the depicted embodiment of control unit121, detector unit120includes a detector119that produces detector current (IDET) based on the power of sample signal112. Detector119is referred as log detector119in embodiments where IDETis logarithmically related to power of sample signal112. Because the power of sample signal112reflects the power of RF output signal106the magnitude of IDET123is indicative of the power of output signal106.

In the implementation of detector unit120shown inFIG. 2, I/V converter125includes an operational amplifier (op amp)206and a feedback resistor Rf204connected between the output of op amp206and an inverting input of op amp206. The non-inverting input of op amp206is grounded through a connection to an analog ground (VAG). Assuming an ideal or nearly ideal op amp206, those of ordinary skill in the field of circuit design will appreciate that the current through resistor Rf204is the control current ICONand that the voltage of control signal135is equal to ICON*Rf.

Applying Kirchoff's current law to node201, assuming an idealized op amp206, ICON=IDET+IOS. In the absence of offset unit130, IOSis equal to 0 and the voltage across feedback resistor Rf204and, therefore, the voltage of control signal135is determined solely by IDET123. In other words, control signal135is determined solely by the RF output signal power in the absence of offset unit130. Offset unit130as shown supplements ICON124based at least in part on the voltage (VBAT) of battery150. In the depicted embodiment the offset current IOS131generated by offset unit130flows into node201and through feedback resistor Rf204. IOS131therefore increases the voltage of control signal135according to Ohm's law.

In the depicted embodiment of offset unit130, the value of offset current IOS131is indicative of a difference between the battery voltage VBATand the regulated voltage VREG. As a regulated voltage, VREGis relatively stable across a wide range of VBATvalues. In an exemplary embodiment, for example, the variation in VREGmay be approximately 3% or less. VBATmay vary much more significantly, but it is desirable to maintain operation across the widest possible range of VBAT. By supplementing the detector output signal, i.e., IDET123during low battery voltage operation, offset unit130facilitates linear operation of RF system100even when VBATfalls well below a nominal value.

The depicted embodiment of offset unit130includes PMOS transistors231through234, NMOS transistors241through244, npn bipolar transistors251and252, constant current sources261and262, voltage dividers271and272, and a bias resistor281having a resistance of RBIAS, all connected as shown.

Voltage divider271, which has a ratio of K1, produces a voltage K1*VREGat the base terminal of transistor251. Voltage divider272, which has a ratio of K2, produces a voltage K2*VBATat the base terminal of npn transistor252. Assuming that the base-emitter voltages for transistors251and252are approximately equal during normal operation, the difference in voltage between the base terminals of transistors251and252is effectively applied across the bias resistor281. Thus, the current (IBIAS) through bias resistor RBIAS281is:
IBIAS=[(K1*VREG)−(K2*VBAT)]/RBIAS

It can also be shown that the offset current IOS=2*IBIASin the following description where TXYZrefers to transistor XYZ inFIG. 2and IXYZrefers to the collector current for transistors251and252and to the source/drain current for MOS transistors231-234and241-244.

T252is in series with T232so that the collector current I252of T252equals source/drain current I232. T231and T232are configured as a current mirror in which I232is mirrored in T231so that I231equals I232, assuming transistors T232and T231are both saturated. T241is in series with T231so that I241equals I231. T241and T242are configured as a current mirror so that I241is mirrored in T242as I242. Thus, I242is equal to I252, the collector current of T252.

Similarly, T251is in series with T233so that the collector current I251of T251equals I233, the source/drain current of T233. I233is mirrored in T234so that I234equals I233, assuming T233and T234are both saturated. T234is in series with the parallel combination of T242and T243so that I234equals the sum of I242and I243. Thus, I234is equal to the sum of I242and I243.

T241and T242are, however, configured as a current mirror so that I242equals I241. I234, therefore, represents the collector current of T252, I242represents the collector current of T251, and I243represents the difference between the two collector currents. T243and T244are configured as a current mirror so that IOS, the source/drain current of T244, is the mirror of I243. Thus IOSis equal in magnitude to the difference in the collector currents of T252and T253.

Assuming sufficiently large values of BETA, the emitter currents of T251and T252are approximately equal to their respective collector currents. Assuming further that the current sources261and262are approximately equal, it can be shown trivially that the difference between the emitter currents of T251and T252is twice the bias current IBIAS. Therefore, the offset current IOSis substantially equal to twice the bias current IBIASand, therefore:
IOS=[(K1*VREG)−(K2*VBAT)]/(RBIAS/2)

In some embodiments, K1and K2are implemented such that K1*VREG=K2*VBAT, when VBATis equal to its nominal voltage. In these embodiments, offset unit130sinks IOSwhen VBATis below its nominal value and the magnitude of IOSis proportional to the difference between VBATand its nominal value. IOSincreases ICON, which flows through feedback resistor Rf204and increases the voltage of output signal136(IOS*Rf). When VBATequals or exceeds the nominal value, IOSdrops to zero since negative drain current cannot flow through NMOS transistor244. When IOSis zero, the voltage of control signal135is determined solely by IDET123. In this manner, offset unit130increases the voltage of control signal135to reduce RF signal power when battery voltage is low. When VBATis nominal, the control unit prohibits non-zero values of IOSand the detector circuit is solely responsible for generating control signal135. Since higher values of control signal135produce lower RF signal power, the RF signal power will be attenuated based on VBATwhen VBATis low.

Offset unit130as shown does not illustrate a disable mechanism. In some cases, it may be desirable to disable offset unit130so that it does not sink any offset current even when VBATis low. If, for example, the RF output signal power were not sufficiently high to jeopardize the linearity of the RF signal, it may be desirable to disable offset unit130to prevent it from reducing the RF signal power when doing so is not necessary. In some cases, this objective may be achieved via software control that is not visible inFIG. 2. In other cases, RF system100may include hardware not shown in FIG,2to prevent offset unit130from drawing current during low power operation of the power amplifier. For example, control unit121as shown inFIG. 2might include a comparator and a pass transistor where the comparator is configured to compare output signal135to a threshold value to produce an output that controls the gating of the offset current IOS. In this embodiment, offset unit130may be effectively disabled when RF signal power is low.

Although the invention is described herein with reference to specific embodiments, various modifications and changes can be made without departing from the scope of the present invention as set forth in the claims below. For example, although an RF circuit is described as having a transceiver, a transmitter and receiver may be used instead. Accordingly, the specification and figures are to be regarded in an illustrative rather than a restrictive sense, and all such modifications are intended to be included within the scope of the present invention. Any benefits, advantages, or solutions to problems that are described herein with regard to specific embodiments are not intended to be construed as a critical, required, or essential feature or element of any or all the claims.