Device for transferring power from a first circuit to a second circuit

A power transfer system for transferring power from a first circuit to a second circuit by a differential signal generated in the first circuit includes a first isolation element for transmitting a first component of the differential signal between the first and second circuits. The system also includes a second isolation element for transmitting a second component of the differential signal between the first and second circuits. A digital rectifier is coupled to the first and second isolation elements for generating a rectified voltage in response to the first and second components of the differential signal. The system includes circuitry for monitoring the rectified voltage and generating a signal representative of the rectified voltage. The system also includes a controller for changing the rectified voltage in response to the signal representative of the rectified voltage.

BACKGROUND

Some processing circuits use data from sensors to measure parameters, such as temperature. These processing circuits typically operate at low voltages, such as 3.3 volts or 5.0 volts, but some of the sensors can operate at much higher voltages. Also, some circuits that drive the sensors and/or process data therefrom can operate at the higher voltages.

Some of those systems are subject to common mode transient immunity (CMTI) problems. More specifically, some high voltage transients on one circuit may cause data errors between the high voltage circuits and the low voltage circuits. For example, a high voltage transient on a ground plane may cause a logic high data signal to become a logic low data signal or vice versa. Electrical isolation barriers can be used between the high voltage circuits and the low voltage circuits to increase the CMTI. However, those barriers do not always prevent the CMTI issues.

SUMMARY

A power transfer system for transferring power from a first circuit to a second circuit by a differential signal generated in the first circuit includes a first isolation element for transmitting a first component of the differential signal between the first and second circuits. The system includes a second isolation element for transmitting a second component of the differential signal between the first and second circuits. The second component is a complement of the first component. A digital rectifier is coupled to the first and second isolation elements for generating a rectified voltage in response to the first and second components of the differential signal. The system includes circuitry for monitoring the rectified voltage and generating a signal representative of the rectified voltage. The system also includes a controller for changing the rectified voltage in response to the signal representative of the rectified voltage.

DETAILED DESCRIPTION

FIG. 1is a block diagram of an example power transfer system100for transferring power between a first circuit102and a second circuit104. In this example, the first circuit102operates as a low side, and the second circuit104operates as a high side. Accordingly, the first circuit102operates at relatively low voltages (such as 3.3 or 5.0 volts in some embodiments), and the second circuit104operates at voltages higher than such voltages of the first circuit102. For example, in some embodiments, the second circuit104operates at voltages that are approximately 1 kV, or that are 1 kV higher than the voltages on the first circuit102. In some examples, a ground reference of the second circuit104is at a much higher potential than a ground reference of the first circuit102. Isolation elements108electrically separate or isolate the first circuit102from the second circuit104. In the example ofFIG. 1, the isolation elements108include capacitors C1, C2and C3.

As shown inFIG. 1, the system100includes circuitry to operate a sensor110and to analyze data generated by the sensor110. In the example ofFIG. 1, the sensor110generates analog signals or voltages indicative of the parameter being sensed or measured. The sensor110operates at high voltage, which in the embodiments described herein, is high enough to possibly damage electronic components located in the first circuit102. In order to prevent damage, the sensor110is electrically isolated from the first circuit102.

FIG. 2is an example timing diagram of clock signals CLK andCLKgenerated by a clock generator112. As shown inFIG. 2, the clock signal CLK is a complement (e.g., opposite) of the clock signalCLK. In ideal conditions, the edges of the clock signals CLK andCLKare vertical, indicating that they rise and fall in zero time. Also, one clock signal rises at the same time that the other clock signal falls and vice versa. The CLK and theCLKsignals are example components of a differential signal. The clock signals CLK andCLKare output to (and received by) drivers116and118, which increase the power of the clock signals CLK andCLKfor transmission through the isolation elements108and to the second circuit104. In some embodiments, the drivers116and118are incorporated into the clock generator112and are not discrete components as shown inFIG. 1. In other embodiments, the clock signals CLK andCLKare not amplified by drivers. The first circuit102further includes a digital to analog converter (DAC)120, whose timing is controlled by signals that are generated by the clock generator112.

The devices in the first circuit102operate on voltages referenced to a first ground122. As an example, the clock signals CLK andCLKare referenced to the first ground122, and many of the components (such as the clock generator112and the DAC120) are coupled (e.g., connected) to the first ground122. In some embodiments, the first ground122is representative of a ground plane proximate many of the devices on the first circuit102. The system100transfers energy from the first circuit102to the second circuit104through the clock signals CLK andCLK, even if the system100is subjected to a transient, such as transients occurring on the first ground122.

In the example ofFIG. 1, the clock signals CLK andCLKare relatively low voltage signals (such as 3.3 or 5.0 volts in some embodiments) as referenced to the first ground122. The clock signals CLK andCLKsupply power to devices on the second circuit104, which benefits from the isolation elements108between the first circuit102and the second circuit104. In the example ofFIG. 1, the isolation elements108are capacitors C1and C2. The capacitors C1and C2pass AC signals, so the clock signals CLK andCLKpass through the isolation elements108. Accordingly, in this example, the isolation elements108operate as barriers to prevent DC voltages on the second circuit104from interfering with devices operating on the first circuit102and vice versa.

The clock signals CLK andCLKare output to (and received by) a power conversion device130, which converts the clock signals CLK andCLKto power for operating devices on the second circuit104. For example, the power conversion device130converts the AC clock signals CLK andCLKinto DC operating voltages for the devices in the second circuit104. In the example ofFIG. 1, the devices in the second circuit104include a filter132and an analog to digital converter (ADC)134. In some embodiments, devices (not shown) in the second circuit104convert the clock signals CLK andCLKinto signals that are suitable for the ADC134operations. The devices and signals in the second circuit104operate in reference to a second ground138, which is electrically isolated or separate from the first ground122in the first circuit102.

As described above, the system100is coupled to the sensor110, which is electrically isolated from the first circuit102. The sensor110measures a parameter, such as temperature, and outputs an analog signal representative of the measured parameter. The ADC134receives the analog signal generated by the sensor110and converts the analog signal to a digital signal. The ADC134outputs the digital signal, which is transmitted to the DAC120on the first circuit102. In the example ofFIG. 1, the digital signal is passed through the capacitor C3of the isolation elements108, because the DAC120is part of the first circuit102, and the ADC134is part of the second circuit104. Other embodiments include different isolation devices. The analog signal generated by the DAC120is processed according to specifications of the system100implementation.

The power conversion device130converts the clock signals CLK andCLKinto voltages that drive devices on the second circuit104, while substantially preserving common-mode transient immunity (CMTI) between the first circuit102and the second circuit104. The CMTI is a measure of rate and magnitude that the transient can achieve before causing data errors on the second circuit104. In an example of testing the CMTI, a high voltage/high speed transient is introduced on the ground of one of the circuits, and errors are detected in data transfer between the two circuits. In some examples, the clock signals CLK andCLKare fixed at specific logic levels, and a high voltage transient (such as one rising at a rate of 50 kV/μs) is induced on the first ground122. CMTI issues arise when the transient causes those logic levels to change.

FIG. 3is a schematic diagram of example circuitry300of the power conversion device130ofFIG. 1. The schematic diagram of the power conversion device130ofFIG. 3shows the portion of the power conversion device130that generates a supply voltage VSfrom the clock signals CLK andCLK. Other embodiments of the power conversion device130are described below.

The clock signals CLK andCLKare output to (and received by) the second circuit104at nodes N1and N2, respectively, which are coupled to the isolation elements108. The nodes N1and N2are coupled to a digital rectifier304, which converts the clock signals CLK andCLKto the voltage VS. The digital rectifier304has a first circuit306that converts the CLK signals to a DC voltage and a second circuit308that converts theCLKsignals to a DC voltage. The first circuit306has a resistor R1that is coupled to the drain of a field effect transistor (FET) Q1. The FETs in the digital rectifier304perform switching operations. Other embodiments include other types of electronic switches, such as bipolar junction transistors. A second resistor R2is coupled to the drain of a FET Q2. The resistors R1and R2are coupled to the nodes and N2, respectively. The gate of the FET Q1is coupled to theCLKsignal, and the gate of the FET Q2is coupled to the CLK signal.

The resistors R1and R2shield the input capacitors C1and C2from the device capacitances, such as the capacitances in the FETs Q1and Q2, which reduces the charge sharing loss, and boosts the power transfer efficiency. If the values of the resistors R1and R2are too large, they reduce the output voltage VSbecause of the voltage drop across the resistors R1and R2. If the values of the resistors R1and R2are too small, they do not shield the capacitors C1and C2from device capacitances effectively. In some embodiments, the values of the resistors R1and R2are equal to four times the input voltage divided by the maximum input current. In other embodiments, the resistors R1and R2are replaced by other types of resistive elements.

The second circuit308is similar to the first circuit306. The second circuit308has a resistor R3coupled to the drain of a FET Q3. The source of the FET Q3is coupled to the second ground138. A resistor R4is coupled to the drain of a FET Q4. The source of the FET Q4is also connected to the second ground138. The resistor R3is coupled to the node N1, and the resistor R4is coupled to the node N2. The resistors R3and R4serve the same purposes as the resistors R1and R2as described above.

The first circuit306and the second circuit308operate to convert the differential clock signals ofFIG. 2to a DC voltage or a rectified voltage. Together, the first and second circuits306and308generate and control an output voltage VSat node N3, which is coupled to the sources of the FETs Q1and Q2. The voltage VSat the node N3relative to the second ground138remains positive, irrespective of the differential clock signals on the nodes N1and N2. In some embodiments, the node N3is coupled to a capacitor CLand a resistance RL, which is characteristic of the load resistance coupled to the node N3. In some embodiments, the node N3is also coupled to a voltage regulator (not shown inFIG. 3) that regulates an output voltage VOUT.

An example operation of the system300begins with the CLK signal in a high state and theCLKsignal in a low state, so the node N1voltage is greater than the node N2voltage. In this first state of the differential signal: the FETs Q1and Q4are turned on, so they conduct; and the FETs Q2and Q3are turned off, so they have high impedance and do not conduct. Accordingly, current flows from the node N1, through the resistor R1and the FET Q1and continuing through a load represented by the resistor RL. The second ground138floats, so the node N2voltage is lower than the second ground138voltage, and the return path for the current is through the FET Q4and the resistor R4and continuing to the node N2. In that case, the node N3has a positive voltage relative to the second ground138.

The first circuit306and the second circuit308change states of their respective FETs in response to the CLK signal switching low and theCLKsignal switching high. When the node N2voltage is greater than the node N1voltage, the FETs Q1and Q4turn off, and the FETs Q2and Q3turn on in this second state of the differential signal. Because the second ground138floats, the node N1voltage is lower than the second ground138voltage. The current in the system300flows from the node N2, through the resistor R2and the FET Q2, and continuing to the node N3. The current then flows through the load resistance RL, the FET Q3, the resistor R3and continuing to the node N1. Accordingly, the potential at the node N3is the same in both states of the signals CLK andCLK.

As described above, the voltage polarity at the node N3stays the same regardless of the voltages on the nodes N1and N2. In some instances, the nodes N1and N2may switch between high and low voltages at slightly different times, which causes voltage fluctuations at the node N3. The capacitor CLmaintains a relatively constant voltage at the node N3. The voltage VSpowers devices of the second circuit104, such as the ADC134.

Referring also toFIG. 1, the second circuit104has a filter132to filter the voltage VS. Some embodiments of the second circuit104do not include the additional filter132. One of the benefits of the system100is that the second circuit104generates the predetermined and accurate voltages VSand VOUT, without requiring communications or feedback to the first circuit102. Accordingly, isolation between the first circuit102and the second circuit104is improved relative to conventional systems.

FIG. 4is a block diagram of example circuitry400that monitors and regulates the voltage generated by the power conversion device130ofFIG. 1. The circuitry400includes a power-on-reset (POR) device404, which is coupled to the power conversion device130and monitors the voltage VS. In response to the voltage VSreaching a predetermined value, the POR device404generates signals to enable other components in the circuitry400. A bandgap generator406is also coupled to the power conversion device130and generates a bandgap voltage VBGin response to the voltage VS.

In the example ofFIG. 4, the bandgap generator406is enabled by a signal generated by the POR device404. A comparator410compares the voltage generated by the bandgap generator406to the voltage VSand outputs a signal to a controller412. In this example, the comparator410is enabled by the POR device404. The controller412monitors the output of the comparator410and adjusts the power conversion device130to raise or lower the voltage VS. Also, in this example, the controller412controls a switch SW1that couples the power conversion device130to other components on the second circuit104when the value of the voltage VSis within predetermined limits. In some embodiments, the circuitry400monitors the output voltage VOUT(FIG. 1) instead of the voltage VS, and performs the same operations to regulate the voltage VOUTwith the power conversion device130.

When the second circuit104receives power, the power conversion device130starts generating the voltage VSas described above. In some embodiments, the voltage VSis filtered to remove AC components. At least some time may elapse while the power conversion device130finishes its adjustment of the voltage VSto be within predetermined limits that are suitable for operation of devices on the second circuit104.

In response to the voltage VSreaching a predetermined value, the POR device404initializes and generates signals to enable the bandgap generator406, the comparator410, and the controller412. In some embodiments, the devices are enabled simultaneously. In other embodiments, the devices are enabled sequentially (e.g., one at a time). For example, in at least one embodiment, the bandgap generator406is enabled first, followed by the comparator410, and then the controller412. In some embodiments, the POR device404draws current that is equivalent to the current drawn by devices on the second circuit104, so that the voltage VSmeasured during initialization is representative of the voltage under normal load conditions.

The bandgap generator406generates a precise reference bandgap voltage VBGthat is equal to or proportional to the ideal value of the voltage VS. The comparator410compares the bandgap voltage VBGor a scaled version of the bandgap voltage VBGto the voltage VSand generates an output signal (e.g., voltage) that indicates the difference between the bandgap voltage VBGand the voltage VS. In this example, the output signal is representative of the rectified voltage. The controller412analyzes the output signal to determine whether the voltage VSis too high, too low, or within a predetermined range. If the voltage VSis too high or too low, the controller causes the power conversion device130to change the voltage VS. If the voltage VSis within the predetermined range, the controller412closes the switch SW1, so the power conversion device130provides power to devices on the second circuit104. In embodiments where the POR device404draws current that is equivalent to current drawn by devices on the second circuit104, the current draw by the POR device404is disabled when the switch SW1is closed.

Different embodiments exist for controlling the voltage VS.FIG. 5is a schematic diagram of another example circuitry500of the power conversion device130ofFIG. 1. The circuitry500is similar to the circuitry300ofFIG. 3, but the circuitry500includes extra rectification circuits506and508. The rectification circuits506and508add or subtract parallel resistance, which increases or decreases the voltage VS. The rectification circuits506and508are electrically coupled to a remainder of the circuitry500through switches SW2, SW3, SW4and SW5. For example, if the voltage VSis too high, the controller412(FIG. 4) opens the switches SW2, SW3, SW4and SW5to disconnect the rectification circuits506and508from the remainder of the circuitry500, and thereby increase the resistance and lower the voltage VS. Conversely, if the voltage VSis too low, the controller412closes the switches SW2, SW3, SW4and SW5to connect the rectification circuits506and508to the remainder of the circuitry500, and thereby lower the resistance and increase the voltage VS. In other embodiments, more rectification circuits are connected in parallel to achieve a higher degree of voltage control.

FIG. 6is a schematic diagram of another example circuitry600of the power conversion device130ofFIG. 1. The circuitry600is similar to the circuitry300ofFIG. 3, but the circuitry600includes a variable resistor602coupled to the node N3. The variable resistor602is controlled by the controller412(FIG. 4) to increase or decrease the voltage VS.

The system100ofFIG. 1and the related embodiments achieve many benefits over conventional systems. For example, the system100transfers power from the first circuit102to the second circuit104without requiring feedback from the second circuit104to the first circuit102. Accordingly, the system100has fewer data lines or communications that are susceptible to transients between the first circuit102and the second circuit104. With capacitors as the isolation elements108, the power transfer across the isolation elements108is improved over other devices, such as silicon transformers.