FABRICATION METHOD FOR SEMICONDUCTOR DEVICE

A fabrication method for a semiconductor device is provided. The fabrication method for a semiconductor device includes a semiconductor chip arraying step of arraying a plurality of semiconductor chips at given distances on a first face of a substrate that serves as a supporting body, a substrate thinning step of grinding a second face of the substrate at the side opposite to the first face to thin the substrate to a given thickness, a through electrode formation step of forming a through-hole that extends from the second face side to the semiconductor chip at a given position of the thinned substrate and embedding metal into the through-hole to form a through electrode, and a wiring layer formation step of forming a wiring layer at the second face side of the substrate.

BACKGROUND OF THE INVENTION

Field of the Invention

The present invention relates to a fabrication method for a semiconductor device in which a plurality of semiconductor chips are coupled with a substrate that serves as a supporting body.

Description of the Related Art

In order to implement further downsizing and higher integration of a semiconductor device, a three-dimensional mounting technology in which semiconductor chips are placed one on another in a thicknesswise direction and are coupled with each other by a through electrode (TSV: Through Silicon Via) has been put into practical use. However, in the three-dimensional mounting technology, a plurality of semiconductor chips are placed one on another in the thicknesswise direction, and therefore, the heat radiation characteristic is likely to degrade and semiconductor chips having different sizes cannot be used. Further, also there is a problem that the fabrication cost is likely to increase together with formation of through electrodes extending through the semiconductor chip.

In recent years, also a mounting technology in which a plurality of semiconductor chips are mounted on a substrate that functions as an interposer has been proposed (for example, refer to Japanese Translations of PCT for Patent No.2003-503855). This mounting technology is also called 2.5-dimensional mounting technology or the like, and, for example, a semiconductor chip having a memory function and another semiconductor chip having an arithmetic operation function are coupled with a substrate so as not to overlap with each other. In the 2.5-dimensional mounting technology, since at least part of semiconductor chips are not placed one on another in the thicknesswise direction, the problems of the three-dimensional mounting technology described above are likely to be solved.

SUMMARY OF THE INVENTION

However, in the conventional 2.5-dimensional mounting technology, in order to couple an electrode and so forth provided on a substrate and a semiconductor chip with each other, a projecting terminal called micro bump must be formed on the semiconductor chip. Therefore, improvement is demanded in terms of the fabrication cost.

Therefore, it is an object of the present invention to provide a fabrication method for a semiconductor device in which there is no necessity to form a micro bump on a semiconductor chip.

In accordance with an aspect of the present invention, there is provided a fabrication method for a semiconductor device, including a semiconductor chip arraying step of arraying a plurality of semiconductor chips at given distances on a first face of a substrate that serves as a supporting body, a substrate thinning step of grinding a second face of the substrate at the side opposite to the first face to thin the substrate to a given thickness, a through electrode formation step of forming a through-hole that extends from the second face side to the semiconductor chip at a given position of the thinned substrate and embedding metal into the through-hole to form a through electrode, and a wiring layer formation step of forming a wiring layer at the second face side of the substrate.

In an embodiment of the present invention, preferably, at the through electrode formation step, a through electrode contacting with a coupling terminal formed on each of the semiconductor chips is formed.

In the fabrication method for a semiconductor device according to the present invention, different from the conventional technology, a through electrode is not formed in advance on a substrate but is formed after semiconductor chips are arrayed on a substrate. Therefore, even if a projecting terminal such as a micro bump is not provided, the through electrode can be coupled with the semiconductor chip. In short, with the fabrication method for a semiconductor device according to the present invention, since there is no necessity to form a micro bump on a semiconductor chip, the fabrication cost can be suppressed low.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

In the following, an embodiment of the present invention is described with reference to the accompanying drawings. A fabrication method for a semiconductor device according to the present embodiment includes a semiconductor chip arraying step (refer toFIGS. 1A and 1B), a sealing step (refer toFIGS. 2A and 2B), a substrate thinning step (refer toFIGS. 3A and 3B), a through electrode formation step (refer toFIGS. 4A and 4B), and a wiring layer formation step (refer toFIG. 5). At the semiconductor chip arraying step, a plurality of semiconductor chips are arrayed at given distances on a first face of a substrate that serves as a supporting body. At the sealing step, the first face side of the substrate on which the plurality of semiconductor chips are arrayed is sealed. At the substrate thinning step, a second face of the substrate at the side opposite to the first face is ground to thin the substrate to a given thickness. At the through electrode formation step, a through-hole extending from the second face side to the semiconductor chips is formed at a given position of the substrate, and metal is embedded into the through-hole to form a through electrode. At the wiring layer formation step, a wiring layer including a wiring line coupled with the through electrode is formed at the second face side of the substrate. The fabrication method for a semiconductor device according to the present embodiment is described below in detail.

In the fabrication method for a semiconductor device according to the present embodiment, the semiconductor chip arraying step of arraying a plurality of semiconductor chips on a substrate to be used as a supporting body is performed.FIG. 1Ais a perspective view schematically depicting a manner in which a plurality of semiconductor chips13are arrayed on a substrate11, andFIG. 1Bis a sectional view schematically depicting the substrate11on which the plurality of semiconductor chips13are arrayed.

As depicted inFIG. 1A, the substrate11used in the present embodiment is formed in the form of a disk from a material such as silicon, and has a first face11aand a second face11bthat are substantially flat. The substrate11becomes an interposer for coupling the plurality of semiconductor chips13and a wiring substrate (not depicted) or the like by forming through electrodes, a wiring layer and so forth later. It is to be noted that the material, shape and so forth of the substrate11are not limited specifically, and a substrate configured from a material such as, for example, ceramic (including glass or the like) or resin can be used. The plurality of semiconductor chips13individually include a memory function, an arithmetic operation function and so forth, and a coupling terminal (not depicted) for external coupling is provided at a first face13aside of the semiconductor chips13. In the present embodiment, the plurality of semiconductor chips13are arrayed on the substrate11such that the first face13aeach of the plurality of semiconductor chips13opposes to the first face11aof the substrate11.

Arraying of the semiconductor chips13on the substrate11is performed using an arbitrary chip arraying apparatus (not depicted). For example, at the first face11aside of the substrate11, a plurality of marks for defining the position of the semiconductor chips13are formed at given distances. The chip arraying apparatus arrays a plurality of semiconductor chips13at the given distances on the basis of the plurality of marks. For fixation of the semiconductor chips13to the substrate11, for example, adhesive (not depicted) of the thermosetting type having heat resistance sufficient to withstand succeeding steps is used. The adhesive is shaped, for example, in the form of a semi-cured film, and is provided at the first face11aside of the substrate11or the first face13aside of the semiconductor chips13. However, liquid adhesive or the like may be used. As depicted inFIGS. 1A and 1B, if all of the semiconductor chips13are arrayed at given distances on the first face11aof the substrate11and the adhesive is hardened, then the semiconductor chip arraying step is ended. Since the first faces13aof the semiconductor chips13oppose to the first face11aof the substrate11as described above, a second face13beach of the semiconductor chips13is exposed to the outside.

After the semiconductor chip arraying step, the sealing step of sealing the first face11aside of the substrate11on which the plurality of semiconductor chips13are arrayed is performed.FIG. 2Ais a side elevational view, partly in section, schematically depicting a manner in which a sealing member15is applied to the first face11aside of the substrate11, andFIG. 2Bis a sectional view schematically depicting the substrate11on which the first face11aside is sealed by a sealing layer17.

At the sealing step, liquid sealing material15is applied to the first face11aof the substrate11first. The application of the sealing material15is performed, for example, by a spin application apparatus2depicted inFIG. 2A. The spin application apparatus2includes a chuck table4for holding the second face11bside of the substrate11. The chuck table4is coupled with a rotational driving source (not depicted) such as a motor and rotates around a rotational axis extending substantially in parallel to the vertical direction. A top face of the chuck table4serves as a holding face4athat sucks and holds the second face11bside of the substrate11. The holding face4ais coupled with a suction source (not depicted) through a suction path (not depicted) or the like formed in the inside of the chuck table4. The substrate11can be held on the chuck table4by causing a negative pressure of the suction source to act on the holding face4a. A nozzle6which is configured from resin or the like having a heat resistance sufficient to withstand succeeding steps and allows dripping of the liquid sealing material15is disposed above the chuck table4.

When the sealing material15is to be applied, the second face11bside of the substrate11is contacted first with the holding face4aof the chuck table4and a negative pressure of the suction source is caused to act upon the holding face4a. Consequently, the substrate11is held on the chuck table4in a state in which the first face11aside on which the plurality of semiconductor chips13are arrayed is exposed upwardly. It is to be noted that a protective tape or the like may be pasted on the second face11bof the substrate11. Then, the chuck table4is rotated and the liquid sealing material15is dripped from the nozzle6. While, in the present embodiment, the sealing material15configured from epoxy-based resin is used, there is no limitation to the material of the sealing material15. Consequently, the sealing material15can be applied to the first face11aside of the substrate11on which the plurality of semiconductor chips13are arrayed. It is to be noted that it is desirable to apply the sealing material15so thick that the second faces13bof the semiconductor chips13are covered. After the sealing material15is applied, a process such as drying or heating is performed to harden the sealing material15. Consequently, the sealing layer17which seals the first face11aside of the substrate11together with the plurality of semiconductor chips13is completed. It is to be noted that, after the sealing layer17is formed, it is desirable to flatten a surface17aside of the sealing layer17by such a method as grinding or cutting. If the surface17aof the sealing layer17is flat, then the second face11bof the substrate11can be easily processed into a flat state at the succeeding substrate thinning step.

After the sealing step, the substrate thinning step of grinding the second face11bof the substrate11to decrease the thickness of the substrate11to a given thickness is performed.FIG. 3Ais a side elevational view, partly in section, schematically depicting a manner in which the second face11bof the substrate11is ground, andFIG. 3Bis a sectional view schematically depicting the substrate11after it is thinned.

The substrate thinning step is performed, for example, by a grinding apparatus12depicted inFIG. 3A. The grinding apparatus12includes a chuck table14for holding the surface17aside of the sealing layer17formed on the substrate11. The chuck table14is coupled with a rotational driving source (not depicted) such as a motor and rotates around a rotational axis extending substantially in parallel to the vertical direction. Further, a table movement mechanism (not depicted) is provided below the chuck table14, and the chuck table14is moved in a horizontal direction by the table movement mechanism. The upper face of the chuck table14serves as a holding face14afor sucking and holding the surface17aof the sealing layer17formed on the substrate11.

The holding face14ais coupled with a suction source (not depicted) through a suction path (not depicted) or the like formed in the inside of the chuck table14. The substrate11can be held on the chuck table14by causing the negative pressure of the suction source to act on the holding face14a.

A grinding unit16is disposed above the chuck table14. The grinding unit16includes a spindle housing18supported on a grinding unit lifting mechanism (not depicted). A spindle20is accommodated in the spindle housing18, and a mount22in the form of a disk is fixed at a lower end portion of the spindle20. A grinding wheel24having a diameter substantially equal to that of the mount22is mounted on a lower face of the mount22. The grinding wheel24includes a wheel base26formed from a metal material such as stainless steel or aluminum. A plurality of grinding stones28are arrayed annularly on the lower face of the wheel base26. A rotational driving source (not depicted) such as a motor is coupled with an upper end side (base end side) of the spindle20. The grinding wheel24is rotated around a rotational axis extending substantially in parallel to the vertical direction by the rotational force transmitted from the rotational driving source.

At the substrate thinning step, the surface17aside of the sealing layer17formed on the substrate11is contacted with the holding face14aof the chuck table14so as to cause a negative pressure of the suction source to act on the substrate11. Consequently, the substrate11is held on the chuck table14in a state in which the second face11bside thereof is exposed upwardly. It is to be noted that a protective tape or the like may be pasted in advance on the surface17aof the sealing layer17. Then, the chuck table14is moved to a position below the grinding wheel24. Then, as depicted inFIG. 3A, the chuck table14and the grinding wheel24are rotated to move down the spindle housing18while grinding fluid such as pure water is supplied. The downward movement amount of the spindle housing18is adjusted to such a degree that the lower face of the grinding stones28is pressed against the second face11bof the substrate11. Consequently, the second face11bside of the substrate11can be ground. This grinding is performed, for example, while the thickness of the substrate11is measured. If the substrate11is thinned to a finish thickness as depicted inFIG. 3B, then the substrate thinning step is ended.

After the substrate thinning step, the through electrode formation step of forming a through electrode at a given position of the substrate11is performed.FIG. 4Ais a sectional view schematically depicting a manner in which through-holes11care formed at given positions of the substrate11, andFIG. 4Bis a sectional view schematically depicting the substrate11on which through electrodes23are formed.

At the through electrode formation step according to the present embodiment, a resist film19that covers the second face11bof the substrate11is formed first. The resist film19is formed by such a method as, for example, photolithography such that regions at the second face11bside in which the through-holes11care to be formed are exposed, and has a withstanding property against later plasma etching. After the resist film19is formed, as depicted inFIG. 4A, the exposed regions of the substrate11at the second face11bside are worked by plasma etching to form through-holes11c. In particular, for example, a processing space of a vacuum chamber (not depicted) into which the substrate11is carried is decompressed to supply raw material gas for plasma etching at a predetermined flow rate. If, in this state, predetermined high frequency power is supplied to electrodes (not depicted) in the processing space, then plasma21including radicals and ions is generated. If the plasma21is caused to act upon the exposed region of the substrate11, then the substrate11in the regions (and the adhesive) is removed. Consequently, through-holes11ccan be formed which extend from the second face11bside of the substrate11to the first face13aof the semiconductor chips13. It is to be noted that the through-holes11care formed at positions corresponding to coupling terminals of the semiconductor chips13. The conditions such as the type and the supply amount of the raw material gas for plasma etching, high frequency power to be supplied to the electrodes and so forth are set appropriately in response to the material of the substrate11, the size of the through-holes11cand so forth. For example, when through-holes11care to be formed in a substrate11made of silicon, mixture gas of SF6, O2, inertia gas and so forth may be used as the raw material gas.

After the through-holes11care formed, the resist film19is removed by such a method as asking, and metal is embedded into the through-holes11cto form through electrodes23as depicted inFIG. 4B. In particular, for example, an insulating film (not depicted) that covers a side wall (inner wall) of the through-holes11cis formed, and then through electrodes23contacting with the coupling terminals of the semiconductor chips13are provided. Although there is no limitation to the formation method of the insulating film and the through electrodes23, for example, a chemical vapor deposition (CVD) method, a sputtering method, a vacuum vapor deposition method and so forth can be used. The insulating film is formed using, for example, silicon dioxide (SiO2), silicon nitride (Si3N4), silicon oxynitride (SiOxNy), oxides or nitrides (including oxynitrides) of various metals and so forth. Meanwhile, the through electrodes23are formed using titanium (Ti), tantalum (Ta), tungsten (W), aluminum (Al), copper (Cu) or the like. It is to be noted, however, that there is no limitation to the material of the insulating film and the through electrodes23, and the material can be changed arbitrarily in response to specifications and so forth.

After the through electrode formation step, the wiring layer formation step of forming a wiring layer including wiring lines coupled to the through electrodes23on the second face11bside of the substrate11is performed.FIG. 5is a sectional view schematically depicting the substrate11on which a wiring layer25is formed. The wiring layer25includes an insulating film (not depicted), wiring lines (not depicted) and so forth that are formed by such a method as, for example, a CVD method, a sputtering method, a vacuum vapor deposition method and so forth. By the wiring layer25, the through electrodes23and an external wiring substrate (not depicted) or the like can be electrically coupled with each other. It is to be noted that there is no limitation to the formation method, formation conditions and so forth of the wiring layer25, and an appropriate method and conditions can be suitably used in combination. After the wiring layer25is formed, the wiring layer formation step is ended, and a semiconductor device1according to the present embodiment is completed. It is to be noted that the semiconductor device1after the completion may be divided into arbitrary units by dicing or the like.

As described above, with the fabrication method for a semiconductor device according to the present embodiment, different from the conventional technology, the through electrodes23are not formed in advance on the substrate11, but the through electrodes23are formed after the semiconductor chips13are arrayed on the substrate11. Therefore, even if a projecting terminal such as a micro bump is not provided, the through electrodes23can be connected to the semiconductor chips13. In short, with the fabrication method for a semiconductor device according to the present embodiment, since there is no necessity to form a micro bump on the semiconductor chips13, the fabrication cost can be suppressed low.

It is to be noted that the present invention is not limited to the description of the embodiment described hereinabove but can be carried out in various modified forms. For example, while, in the embodiment described above, the sealing step is performed after the semiconductor chip arraying step, also it is possible to omit the sealing step. Where the sealing step is omitted, preferably a protective tape or the like is pasted in advance to the second face13bside of the semiconductor chips13such that the semiconductor chips13and so forth may not be damaged at the substrate thinning step and so forth. Further, although, at the through electrode formation step in the embodiment described above, the through-holes11care formed in the substrate11using plasma etching, also it is possible to form the through-holes11cin the substrate11by such a method as laser processing or drilling.