Group III nitride semiconductor light-emitting device and production method therefor

The present invention provides a Group III nitride semiconductor light-emitting device in which the production method is simplified while migration of at least one of Ag atoms and Al atoms is suppressed, and a production method therefor. The production method comprises steps of forming a first electrode, forming a second electrode, and forming a second electrode side barrier metal layer on the second electrode. Moreover, the second electrode has an electrode layer containing at least one of Ag and Al. In forming the first electrode and the second electrode side barrier metal layer, the second electrode side barrier metal layer is formed on the second electrode while the first electrode to be electrically connected to the first semiconductor layer is formed. The first electrode and the second electrode side barrier metal layer are deposited are deposited in the same layered structure.

BACKGROUND OF THE INVENTION

Field of the Invention

The technical field of the present invention relates to a Group III nitride semiconductor light-emitting device and a production method therefor. More specifically, it relates to a Group III nitride semiconductor light-emitting device exhibiting suppression of metal migration and a production method therefor.

Background Art

In the Group III nitride semiconductor light-emitting device, a p-electrode or an n-electrode is formed of a metal. Metal includes, for example, Ag or Al which causes migration. Migration refers to a phenomenon in which metal atoms contained in a metal material transfer to the surface or the inside of other material such as insulating member when an electric field is applied to a metal material. Therefore, techniques of suppressing metal migration have been developed.

Japanese Patent Application Laid-Open (kokai) No. 2006-24750 discloses a light-emitting device 8 having an n-type layer 2, a light-emitting layer 3, a p-type layer 4, a thin film 7a formed of Pt on the p-type layer 4, an Ag alloy layer 7b on the thin film 7a, a barrier metal layer 7c on the Ag alloy layer 7b, and a p-side bonding layer 7d on the barrier metal layer 7c (refer to paragraphs [0029]-[0078] and FIG. 1). Thereby, Ag migration can be suppressed (refer to paragraphs [0021]-[0023]).

When the barrier metal layer is formed in this way, the method for producing a semiconductor light-emitting device has a step of forming a barrier metal layer. Therefore, a number of steps are required for that step.

On the other hand, the number of steps of the production method is preferably as small as possible. The smaller the number of steps, the shorter the cycle time. That is, the cost can be reduced by reducing the number of steps.

However, a light-emitting device in which migration of Ag atoms or Al atoms is not suppressed, has a short lifetime. Therefore, it is preferable to simplify the production process while suppressing migration of metal atoms.

SUMMARY OF THE INVENTION

The present invention has been conceived in order to solve the aforementioned technical problems involved in the conventional techniques. Thus, an object of the present invention is to provide a Group III nitride semiconductor light-emitting device in which the production process is simplified while migration of at least one of Ag atoms and Al atoms is suppressed, and a method therefor.

In a first aspect of the present technique, there is provided a method for producing a Group III nitride semiconductor light-emitting device comprising a first conduction type first semiconductor layer, a light-emitting layer, and a second conduction type second semiconductor layer, the method comprising:

a first electrode formation step of forming a first electrode to be electrically connected to the first semiconductor layer;

a second electrode formation step of forming a first electrode to be electrically connected to the second semiconductor layer; and

a second electrode side barrier metal formation step of forming a second electrode side barrier metal on the second electrode.

The second electrode has an electrode layer containing at least one of Ag and Al. In the first electrode formation step and the second electrode side barrier metal formation step, the second electrode side barrier metal layer is formed on the second electrode while the first electrode to be electrically connected to the first semiconductor layer is formed. The first electrode and the second electrode side barrier metal layer are deposited in the same layered structure.

In the method for producing the Group III nitride semiconductor light-emitting device, the first electrode formation step and the second electrode side barrier metal layer formation step are combined into one step. That is, both the first electrode and the second electrode side barrier metal layer can be formed by performing the same step once. Therefore, the number of steps is smaller than that when the first electrode and the second electrode side barrier metal layer are formed separately. The cycle time of producing a semiconductor light-emitting device is short. Thus-produced semiconductor light-emitting device has a second electrode with a reflective film. Therefore, the second electrode suitably reflects the light emitted from the light-emitting layer toward the semiconductor layer. Thus, the light is hardly absorbed by the other layers of the second electrode or the second electrode side barrier metal layer. That is, the semiconductor light-emitting device has high extraction efficiency.

A second aspect of the technique is drawn to a specific mode of the method for producing the Group III nitride semiconductor light-emitting device, the method comprising a first metal layer formation step of forming a first metal layer between the first semiconductor layer and the first electrode. In the first metal layer formation step and the second electrode formation step, the second electrode is formed while the first metal layer is formed, and the first metal layer and the second electrode are deposited in the same layered structure.

A third aspect of the technique is drawn to a specific mode of the method for producing the Group III nitride semiconductor light-emitting device, wherein the first semiconductor layer is an n-type semiconductor layer, and the second semiconductor layer is a p-type semiconductor layer. The first electrode is an n-electrode, and the second electrode is a p-electrode. The first electrode formation step is the n-electrode formation step. The second electrode side barrier metal layer formation step is a p-side barrier metal layer formation step. The n-electrode formation step includes a p-side barrier metal layer formation step of forming a p-side barrier metal layer on a p-electrode. The p-electrode has an electrode layer containing at least one of Ag and Al. In the n-electrode formation step and the p-side barrier metal layer formation step, the p-side barrier metal layer is formed on the p-electrode while the n-electrode is formed on the n-type semiconductor layer. The n-electrode and the p-side barrier metal layer are deposited in the same layered structure.

A fourth aspect of the technique is drawn to a specific mode of the method for producing the Group III nitride semiconductor light-emitting device, wherein the first semiconductor layer is a p-type semiconductor layer, and the second semiconductor layer is an n-type semiconductor layer. The first electrode is a p-electrode, and the second electrode is an n-electrode. The first electrode formation step is the p-electrode formation step. The second electrode side barrier metal layer formation step is an n-side barrier metal layer formation step. The p-electrode formation step includes an n-side barrier metal layer formation step of forming an n-side barrier metal layer on an n-electrode. The n-electrode has an electrode layer containing at least one of Ag and Al. In the p-electrode formation step and the n-side barrier metal layer formation step, the n-side barrier metal layer is formed on the n-electrode while the p-electrode is formed on the p-type semiconductor layer or the transparent electrode on the p-type semiconductor layer. The p-electrode and the n-side barrier metal layer are deposited in the same layered structure.

A fifth aspect of the technique is drawn to a specific mode of the method for producing the Group III nitride semiconductor light-emitting device, the method comprising a transparent electrode formation step of forming a transparent electrode on the p-type semiconductor layer.

A sixth aspect of the technique is drawn to a specific mode of the method for producing the Group III nitride semiconductor light-emitting device, the method comprising an insulating layer formation step of forming an insulating layer on the transparent electrode, and a current blocking layer formation step of forming at least one current blocking layer on a portion of the p-type semiconductor layer, wherein the p-electrode is formed on the insulating layer and contacts with the transparent electrode through the contact space, and the portion in which the current blocking layer is formed is under the contact space.

A seventh aspect of the technique is drawn to a specific mode of the method for producing the Group III nitride semiconductor light-emitting device, the method comprising forming another insulating layer with another contact space on the n-type semiconductor layer, wherein the n-electrode is formed on the insulating layer and contacts with the n-type semiconductor layer through the contact space.

An eighth aspect of the technique is drawn to a specific mode of the method for producing the Group III nitride semiconductor light-emitting device, wherein the insulating layer formation step is a step of forming a distributed Bragg reflector as an insulating layer.

A ninth aspect of the technique is drawn to a specific mode of the method for producing the Group III nitride semiconductor light-emitting device, wherein the second electrode side barrier metal layer comprises at least one set selected from a group consisting of a set of Ti, Al alloy, Ta, Ti, Pt, Au, and Al and a set of Ti, Rh, Ti, Au, and Al, deposited in this order on the p-electrode.

A tenth aspect of the technique is drawn to a specific mode of the method for producing the Group III nitride semiconductor light-emitting device, wherein the second electrode side barrier metal layer comprises a set of Ti, Rh, Ti, Au, Al deposited in this order on the n-electrode.

In an eleventh aspect of the present technique, there is provided a Group III nitride semiconductor light-emitting device comprising:

a first conduction type first semiconductor layer;

a light-emitting layer on the first semiconductor layer;

a second conduction type second semiconductor layer on the light-emitting layer;

a first electrode electrically connected to the first semiconductor layer; and

a second electrode electrically connected to the second semiconductor layer.

The light-emitting device has a second electrode side barrier metal layer on the second electrode. The second electrode has an electrode layer containing at least one of Ag and Al. The second electrode side barrier metal layer has the same layered structure as that of the first electrode.

In a twelfth aspect of the present technique, there is provided a Group III nitride semiconductor light-emitting device, wherein the first electrode has a first pad electrode, and the second electrode side barrier metal layer has a second pad electrode.

The present specification provides a Group III nitride semiconductor light-emitting device in which the production method is simplified while migration of at least one of Ag atoms and Al atoms is suppressed, and a production method therefor.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

Specific embodiments of the semiconductor light-emitting device and the production method therefor will next be described, with reference to the drawings. However, the embodiments should not be construed as limiting the techniques thereto. The layered structure of the below-described semiconductor light-emitting device and the electrode structure thereof are merely examples, and a layered structure other than those of the embodiments may also be employed. The thickness of each of the layers shown in the drawings is a conceptual thickness, which is not an actual thickness.

FIG. 1is a plan view showing the structure of a light-emitting device100according to Embodiment 1.FIG. 2is a cross-sectional view showing an II-II cross section ofFIG. 1. The light-emitting device100is a face-up type semiconductor light-emitting device. The light-emitting device100has a plurality of semiconductor layers. As shown inFIGS. 1 and 2, the light-emitting device100has a substrate110, an n-type semiconductor layer120, a light-emitting layer130, a p-type semiconductor layer140, an insulating layer IN1, an n-electrode N1, a current blocking layer CB1, a transparent electrode TE1, an insulating layer IP1, a p-electrode P1, a p-side barrier metal layer BM1, and a protective film F1.

As shown inFIG. 2, the main surface of the substrate110, the n-type semiconductor layer120, the light-emitting layer130, and the p-type semiconductor layer140are formed in this order. The transparent electrode TE1is formed on the p-type semiconductor layer140. The p-electrode P1is formed on the transparent electrode TE1. The n-electrode N1is formed on the n-type semiconductor layer120.

The n-electrode N1is electrically connected to the n-type semiconductor layer120. The n-electrode N1has an re-contact electrode N1a, an n-wiring electrode N1b, and an n-pad electrode N1c. The n-contact electrode N1aof the n-electrode N1is in contact with a portion of a first surface120aof the n-type semiconductor layer120. The insulating layer IN1is in contact with the remaining portion of the first surface120aof the n-type semiconductor layer120. The n-wiring electrode N1bis a comb-shaped electrode. The n-pad electrode N1cis a first pad electrode which is electrically connected to an external electrode of the device. The n-pad electrode N1cis exposed without being covered with a protective film F1.

The p-electrode P1is electrically connected to the p-type semiconductor layer140. The p-electrode P1has a p-contact electrode P1aand a p-wiring electrode P1b. The p-contact electrode P1aof the p-electrode P1is in contact with a portion of a first surface TE1aof the transparent electrode TE1. The insulating layer IP1is in contact with the remaining portion of the first surface TE1aof the transparent electrode TE1. The p-wiring electrode P1bis a comb-shaped electrode.

The substrate110is a growth substrate. On the main surface of the substrate110, the aforementioned semiconductor layers are formed through MOCVD. The main surface of the substrate110is preferably roughened. The substrate110is made of sapphire. Other than sapphire, materials such as SiC, ZnO, Si, GaN, and AlN may be employed.

The n-type semiconductor layer120is formed on the substrate110. A buffer layer may be formed between the substrate110and the n-type semiconductor layer120. The n-type semiconductor layer120is in contact with the n-electrode N1. Thus, the n-type semiconductor layer120is electrically connected to the n-electrode N1.

The light-emitting layer130emits light through recombination of an electron with a hole. The light-emitting layer130is formed on the n-type semiconductor layer120. The light-emitting layer130has at least a well layer and a barrier layer. The well layer may be, for example, an InGaN layer or a GaN layer. The barrier layer may be, for example, a GaN layer or an AlGaN layer. These layers are examples, and other layers such as an AlInGaN layer may be employed.

The p-type semiconductor layer140is formed on the light-emitting layer130. The p-type semiconductor layer140is in contact with the transparent electrode TE1. That is, the p-type semiconductor layer140is electrically connected to the p-electrode P1through the transparent electrode TE1.

The transparent electrode TE1is an electrode layer which is electrically connected to the p-type semiconductor layer140, and transmits light. The transparent electrode TE1is formed of IZO.

The p-electrode P1serves as both a contact electrode and a reflective film. The p-electrode P1has an electrode layer containing at least one of Ag and Al. The electrode layer is a reflective electrode layer having a thickness of 50 nm or more, and formed of Ag or Al, or an alloy of these materials. The reflective electrode layer is a layer to reflect light. The thickness of the reflective electrode layer is preferably 50 nm to suitably reflect light.

The p-side barrier metal layer BM1suppresses migration of Ag or Al in the electrode layer having a thickness of 50 nm or more and formed of Ag or Al, or an alloy of these materials of the p-electrode P1. For that purpose, the p-type barrier metal layer BM1and the transparent electrode TE1cover the p-electrode P1. The p-side barrier metal layer BM1has a p-pad electrode BM1c. The p-pad electrode BM1cis a second pad electrode to be electrically connected to an external electrode of the device. The p-pad electrode BM1cis exposed without being covered with the protective film F1.

2. Structure in the Vicinity of Electrode

2-1. Structure in the Vicinity of n-Electrode

FIG. 3is a cross-sectional view showing an III-III cross section ofFIG. 1. As shown inFIG. 3, the n-electrode N1is formed on a portion120aof the n-type semiconductor layer120. The protective film F1is formed on the n-electrode N1and the remaining portion120bof the n-type semiconductor layer120. The material of the n-electrode N1will be described later. The protective film F1is formed of, for example, SiO2. The protective film F1may be formed of any insulating transparent film other than the SiO2film.

FIG. 4is a cross-sectional view showing an IV-IV cross section ofFIG. 1. As shown inFIG. 4, the insulating layer IN1is formed on the n-type semiconductor layer120. The n-electrode N1is formed on the insulating layer IN1.

2-2. Structure in the Vicinity of p-Electrode

FIG. 5is a cross-sectional view showing a V-V cross section ofFIG. 1. As shown inFIG. 5, the current blocking layer CB1is disposed on a portion140aof the p-type semiconductor layer140. The transparent electrode TE1is disposed on the current blocking layer CB1and the remaining portion140bof the p-type semiconductor layer140. The p-electrode P1is disposed on the transparent electrode TE1. When the p-electrode P1is projected to the surface of the p-type semiconductor layer140, its projection region is included in an area where the current blocking layer CB1is formed.

The p-side barrier metal layer BM1is disposed on the p-electrode P1. The p-side barrier metal layer BM1completely covers the surface of the p-electrode P1. That is, the p-side barrier metal layer BM1and the transparent electrode TE1completely cover the p-electrode P1. The protective film F1covers the entire part on the p-type semiconductor layer140side. The protective film F1covers the transparent electrode TE1and the p-side barrier metal layer BM1.

FIG. 6is a cross-sectional view showing a VI-VI cross section ofFIG. 1. As shown inFIG. 6, in this cross section, the insulating layer IP1is formed on the transparent electrode TE1. Therefore, in this cross section, the p-electrode P1is not in contact with the transparent electrode TE1.

FIG. 7is a cross-sectional view showing a VII-VII cross section ofFIG. 1. This cross section includes the p-pad electrode BM1c. As shown inFIG. 7, in this cross section, the insulating layer IP1is formed on the transparent electrode TE1. Therefore, in this cross section, the p-electrode P1is not in contact with the transparent electrode TE1. Current does not flow from the p-pad electrode BM1cdirectly to the transparent electrode TE1, but flows to the p-wiring electrode P1band through the p-contact electrode P1ato the transparent electrode TE1.

FIG. 8is a cross-sectional view showing a VIII-VIII cross section ofFIG. 1. As shown inFIG. 8, the insulating layer IN1is formed on the n-type semiconductor layer120. The n-electrode N1is formed on the insulating layer IN1.

3. p-Side Barrier Metal Layer and n-Electrode

3-1. Layered Structure of p-Side Barrier Metal Layer and n-Electrode

As shown by the hatched area ofFIG. 5, the layered structure of the p-side barrier metal layer BM1inFIG. 5is the same as the layered structure of the n-electrode N1inFIG. 3. As described later, the p-side barrier metal layer BM1and the n-electrode N1are formed in the same step. In the p-side barrier metal layer BM1and the n-electrode N1, the layers are formed in the same order sequentially from the lower layer, and the thickness of each of the layers deposited is also the same within the film formation error range. That is, the p-side barrier metal layer BM1and the n-electrode N1have the same layered structure.

3-2. Materials of p-Side Barrier Metal Layer and n-Electrode

Next will be described materials of the p-electrode P1, the p-side barrier metal layer BM1, and the n-electrode N1. In Example 1 of Table 1, the p-electrode P1is formed of α-IZO, Ag alloy, Ta, and Ti deposited in this order on the transparent electrode TE1. The thickness of α-IZO is 5 nm. The thickness of Ag alloy is 100 nm. The thickness of Ta is 100 nm. The thickness of Ti is 50 nm. The thicknesses of these layers are merely examples. The thicknesses are not limited to these. Ag alloy is, for example, an alloy containing Ag, Pd, and Cu. Needless to say, any alloy having other composition may also be employed.

The p-side barrier metal layer BM1is formed of Ti, Al alloy, Ta, Ti, Pt, Au, and Al deposited in this order on the p-electrode P1. The thickness of Ti is 2 nm. The thickness of Al alloy is 100 nm. The thickness of Ta is 100 nm. The thickness of Ti is 300 nm. The thickness of Pt is 100 nm. The thickness of Au is 1,500 nm. The thickness of Al is 10 nm. The thicknesses of these layers are merely examples. The thicknesses are not limited to these. Al alloy is, for example, an alloy containing Al and Nd. Needless to say, any alloy having other composition may also be employed.

The n-electrode N1of Example 1 is deposited in the same order as that of the p-side barrier metal layer BM1of Example 1. The n-electrode N1is formed of Ti, Al alloy, Ta, Ti, Pt, Au, and Al deposited in this order on the n-type semiconductor layer120. The thickness of Ti is 2 nm. The thickness of Al alloy is 100 nm. The thickness of Ta is 100 nm. The thickness of Ti is 300 nm. The thickness of Pt is 100 nm. The thickness of Au is 1,500 nm. The thickness of Al is 10 nm. The thicknesses of these layers are merely examples. The thicknesses are not limited to these.

In Example 2 of Table 1, the p-electrode P1is the same as in Example 1.

The p-side barrier metal layer BM1is formed of Ti, Rh, Ti, Au, and Al deposited in this order on the p-electrode P1. The thickness of Ti is 2 nm. The thickness of Rh is 100 nm. The thickness of Ti is 50 nm. The thickness of Au is 1,500 nm. The thickness of Al is 10 nm. The thicknesses of these layers are merely examples. The thicknesses are not limited to these.

The n-electrode N1of Example 2 is deposited in the same order as that of the p-side barrier metal layer BM1of Example 2.

In Example 3 of Table 1, the p-electrode P1is formed of Cr, Al alloy, Cr, and Ti deposited in this order on the transparent electrode TE1. The thickness of Cr in contact with the transparent electrode TE1is 2 nm. The thickness of Al alloy is 100 nm. The thickness of Cr is 10 nm. The thickness of Ti is 50 nm. The thicknesses are merely examples. The thicknesses are not limited to these.

The p-side barrier metal layer BM1of Example 3 is the same as the p-side barrier metal layer BM1of Example 3.

The n-electrode N1of Example 3 is deposited in the same order as that of the p-side barrier metal layer BM1of Example 3.

4. Effect of p-Side Barrier Metal Layer and n-Electrode

Migration of Ag alloy or Al alloy in the p-electrode P1is suppressed because it is covered with the p-side barrier metal layer BM1. Ag alloy or Al alloy reflects the light emitted from the light-emitting layer130toward the semiconductor layer.

In these examples, there is no possibility of migration of Al in contact with Au. Al is in contact with Au having a lower electric resistivity than that of Al. Therefore, no current flows through Al in contact with Au. This hardly causes migration. Al in contact with Au is thin enough not to cause migration.

5. Method for Producing Semiconductor Light-Emitting Device

Next will be described a method for producing a light-emitting device100according to Embodiment 1. In Embodiment 1, the light-emitting device100comprises a first conduction type first semiconductor layer, a light-emitting layer, and a second conduction type second semiconductor layer, wherein the semiconductor crystal layers are formed through epitaxial growth based on metalorganic chemical vapor deposition (MOCVD). Accordingly, the production method comprises a first electrode formation step of forming a first electrode to be electrically connected to the first semiconductor layer, and a second electrode formation step of forming a second electrode to be electrically connected to the second semiconductor layer.

The production method also comprises a second electrode side barrier metal layer formation step of forming a second electrode side barrier metal layer on the second electrode. The second electrode has an electrode layer containing at least one of Ag and Al. In the first electrode formation step and the second electrode side barrier metal layer formation step, the second electrode side barrier metal layer is formed on the second electrode while the first electrode to be electrically connected to the first semiconductor layer is formed. The first electrode and the second electrode side barrier metal layer are deposited in the same layered structure.

Examples of the carrier gas employed in the growth of semiconductor layers include hydrogen (H2), nitrogen (N2), and a mixture of hydrogen and nitrogen (H2+N2). In the steps described later, unless otherwise specified, any carrier gas may be employed. Ammonia gas (NH3) is used as a nitrogen source, and trimethylgallium (Ga(CH3)3: “TMG”) is used as a gallium source. Trimethylindium (In(CH3)3: “TMI”) is used as an indium source, and trimethylaluminum (Al(CH3)3: “TMA”) is used as an aluminum source. Silane (SiH4) is used as an n-type dopant gas, and bis(cyclopentadienyl)magnesium (Mg(C5H5)2) is used as a p-type dopant gas.

5-1. n-Type Semiconductor Layer Formation Step

Firstly, a substrate110is cleaned with hydrogen gas. Then, an n-type semiconductor layer120is formed on the substrate110. A buffer layer may be formed before the formation of the n-type semiconductor layer120. In this procedure, the substrate temperature is 700° C. to 1,200° C.

Subsequently, a light-emitting layer130is formed on the n-type semiconductor layer120. For example, an InGaN layer, a GaN layer, and an AlGaN layer are repeatedly deposited. In this procedure, the substrate temperature is 700° C. to 900° C.

5-3. p-Type Semiconductor Layer Formation Step

Then, a p-type semiconductor layer140is formed on the light-emitting layer130. In this procedure, the substrate temperature is 800° C. to 1,200° C. The uppermost surface of the p-type semiconductor layer140is a p-type contact layer.

5-4. Current Blocking Layer Formation Step

Next, as shown inFIG. 9, at least one current blocking layer CB1is formed on a portion140aof the p-type semiconductor layer140. The portion140ahas a dot shape, and is disposed directly under the area where the p-electrode P1is in contact with the transparent electrode TE1. For this purpose, a mask is formed by photolithography on a region except for the region where the current blocking layer CB1is formed. The current blocking layer CB1is formed through vapor deposition. Then, the mask is removed. Thus, the current blocking layer CB1is formed as shown inFIG. 9.

5-5. Transparent Electrode Formation Step

As shown inFIG. 10, a transparent electrode TE1is formed in a planar shape on a remaining portion140bof the p-type semiconductor layer140and the current blocking layer CB1. Firstly, a transparent electrode TE1made of IZO is uniformly formed by sputtering IZO on the exposed portion of the p-type semiconductor layer140and the current blocking layer CB1. Subsequently, patterning is performed by photolithography. A region for exposing the n-type semiconductor layer120of the transparent electrode is removed by wet etching. Thereafter, heat treatment is preferably performed. Thus, as shown inFIG. 10, the transparent electrode TE1is formed on the remaining portion140bof the p-type semiconductor layer140and the current blocking layer CB1.

5-6. n-Type Semiconductor Layer Exposure Step

As shown inFIG. 11, a portion120aof the n-type semiconductor layer120is exposed by removing a portion of the semiconductor layer from the p-type semiconductor layer140. Laser may be employed instead of dry etching. Thus, as shown inFIG. 11, the portion120aof n-type semiconductor layer120is exposed.

5-7. Insulating Layer Formation Step

As shown inFIG. 12, photo resist patterns are formed on a portion of the transparent electrode TE1and a portion of the n-type semiconductor layer120. An insulating layer IP1and an insulating layer IN1are formed through vapor deposition on the region which is not covered with the photo resist. Then, the photo resist is removed. The insulating layers IP1and IN1are formed in a set of a plurality of short strip forms, thereby creating contact spaces10and11with no insulating layer formed between adjacent short strips. Thus, the insulating layer IP1is formed on the transparent electrode TE1, and the insulating layer IN1is formed on the n-type semiconductor layer120.

As shown inFIG. 13, a p-electrode P1is formed in strip forms on the transparent electrode TE1and the insulating layer IP1. For this purpose, photo resist is disposed. The p-electrode P1is formed by sputtering. For example, on the transparent electrode TE1, α-IZO having a thickness of 5 nm, Ag alloy having a thickness of 100 nm, Ta having a thickness of 100 nm, Ti having a thickness of 50 nm are formed in this order. The p-electrode P1extends in a strip form on the insulating layer IP1. The p-electrode P1is electrically connected to the transparent electrode TE1through the contact spaces10.

5-9. n-Electrode Formation Step and p-Side Barrier Metal Layer Formation Step

As shown inFIG. 14, the n-electrode formation step and the p-side barrier metal layer formation step are performed in the same step. That is, in the n-electrode formation step and the p-side barrier metal layer formation step, the p-side barrier metal layer BM1is formed on the p-electrode P1while the n-electrode N1is formed on the n-type semiconductor layer120. The n-electrode N1extends in a strip form on the insulating layer IN1. The n-electrode N1is electrically connected to the n-type semiconductor layer120through the contact spaces11. The n-electrode N1and the p-side barrier metal layer BM1are deposited in the same layered structure. Therefore, the n-electrode N1and the A-side barrier metal layer BM1after the formation has the same layered structure. The same layered structure means a structure in which a plurality of layers is deposited in the same order, and the thickness of each of the layers is the same.

For this purpose, firstly, a photo resist is formed on a region except for the region where the n-electrode N1and the p-side barrier metal layer BM1are formed. A film corresponding to the n-electrode N1and the p-side barrier metal layer BM1is formed by sputtering. For example, Ti having a thickness of 2 nm, Al alloy having a thickness of 100 nm, Ta having a thickness of 100 nm, Ti having a thickness of 300 nm, Pt having a thickness of 100 nm, Au having a thickness of 1,500 nm, and Al having a thickness of 10 nm are deposited in this order. Then, the photo resist is removed. Thus, the n-electrode N1and the p-side barrier metal layer BM1are formed as shown inFIG. 14.

5-10. Protective Film Formation Step

Next, a protective film F1is formed. A uniform film is formed through CVD on the n-electrode N1, the p-side barrier metal layer BM1, and other layers. The p-pad electrode BM1cand the n-pad electrode N1care exposed by dry etching. Thus, the protective film F1is formed.

5-11. Other Steps

In addition to the aforementioned steps, additional steps such as a heat treatment may be carried out. In this way, the light-emitting device100inFIG. 1is produced.

6. Effect of Embodiment 1

In the method for producing the light-emitting device100according to Embodiment 1, the n-electrode formation step and the p-side barrier metal layer formation step are combined into one step. That is, both the n-electrode N1and the p-side barrier metal layer BM1can be formed by performing the same step once. Therefore, the number of steps is smaller than that when the n-electrode N1and the p-side barrier metal layer BM1are formed separately. That is, the cycle time of producing the light-emitting device100is short.

Moreover, the light-emitting device100produced by the method for producing the semiconductor light-emitting device according to Embodiment 1 has the p-electrode P1also serving as a reflective film. Therefore, the p-electrode P1reflects the light from the light-emitting layer130toward the semiconductor layer. Thus, the light is hardly absorbed by the p-side barrier metal layer BM1.

At least one of the insulating layer IP1and the insulating layer IN1according to Embodiment 1 may be a Distributed Bragg Reflector (DBR). In that case, at least one of the insulating layer IP1and the insulating layer IN1reflects the light advancing toward at least one of the p-electrode P1and the n-electrode N1. Needless to say, both the insulating layer IP1and the insulating layer IN1may be a Distributed Bragg Reflector (DBR). For this purpose, for example, a SiO2film and a TiO2film are alternately formed. Needless to say, other materials may be employed.

Embodiment 1 is applied to the face-up type light-emitting device100. However, it can also be applied to other semiconductor light-emitting device. Needless to say, it can also be applied to, for example, a flip-chip type semiconductor light-emitting device having a light extraction surface on the substrate side or a semiconductor light-emitting device in which the growth substrate is removed through lift-off process.

7-3. Material of Transparent Electrode

In Embodiment 1, the transparent electrode TE1is formed of IZO. However, transparent conductive oxide such as ITO, ICO, ZnO, TiO2, NbTiO2, and TaTiO2may be employed in place of IZO.

In Embodiment 1, the first conduction type is n-type, and the second conduction type is p-type. However, the conduction type may be reversed. The case when the first conduction type is p-type and the second conduction type is n-type will be described in Embodiment 2.

8. Summary of Embodiment 1

As described hereinabove, in the method for producing the light-emitting device100, the n-electrode formation step and the p-side barrier metal layer formation step are combined into one step. That is, both the n-electrode N1and the p-side barrier metal layer BM1are formed by performing the same step once. Therefore, the number of steps is smaller than that when the n-electrode N1and the p-side barrier metal layer BM1are formed separately. The cycle time of producing the light-emitting device100is short.

The light-emitting device100produced by the method for producing the semiconductor light-emitting device according to Embodiment 1 has the p-electrode P1also serving as a reflective film. Therefore, the p-electrode P1reflects the light from the light-emitting layer130toward the semiconductor layer. Thus, the light is hardly absorbed by the p-side barrier metal layer BM1. That is, the semiconductor light-emitting device has high extraction efficiency.

The aforementioned embodiment is merely examples. It is therefore understood that those skilled in the art can provide various modifications and variations of the technique, so long as those fall within the scope of the present technique. The layered structure of the layered body should not be limited to those as illustrated, and the layered structure, thickness, and other factors may be arbitrarily chosen. The semiconductor layer growth technique is not limited to metalorganic chemical vapor deposition (MOCVD), and other vapor phase epitaxy techniques and other liquid-phase epitaxy techniques may also be employed.

Embodiment 2 will next be described. In Embodiment 1, the n-electrode N1and the p-side barrier metal layer BM1are formed in the same step. On the other hand, in Embodiment 2, the p-electrode P1and the n-side barrier metal layer BM2are formed in the same step.

FIG. 15is a plan view showing a light-emitting device200according to Embodiment 2. The light-emitting device200comprises an n-electrode N2(refer toFIG. 16), an n-side barrier metal layer BM2(refer toFIG. 16), and a p-electrode P2(refer toFIG. 17) which will be described later, in addition to a substrate110, an n-type semiconductor layer120, a light-emitting layer130, a p-type semiconductor layer140, an insulating layer IN1, a current blocking layer CB1, a transparent electrode TE1, an insulating layer IP1, a protective film F1as shown inFIG. 2.

2. Structure in the Vicinity of Electrode

2-1. Structure in the Vicinity of n-Electrode

FIG. 16is a cross-sectional view showing a XVI-XVI cross section ofFIG. 15. As shown inFIG. 16, the n-electrode N2is formed on a portion120aof the n-type semiconductor layer120. The n-side barrier metal layer BM2is formed on the n-electrode N2. The n-side barrier metal layer BM2completely covers the surface of the n-electrode N2. That is, the n-side barrier metal layer BM2and the n-type semiconductor layer120completely cover the n-electrode N2. The protective film F1is formed on the n-side barrier metal layer BM2and a remaining portion120bof the n-type semiconductor layer120. The material of the n-electrode N2will be described later. The protective film F1is formed of, for example, SiO2. The protective film F1may be formed of other insulating transparent film in place of SiO2.

The n-electrode N2has an electrode layer containing at least one of Ag and Al. The electrode layer is a reflective electrode layer having a thickness of 50 nm or more, and formed of Ag or Al, or an alloy of these materials. The reflective electrode layer is a layer to reflect light. The thickness of the reflective electrode layer is preferably 50 nm to suitably reflect light.

2-2. Structure in the Vicinity of p-Electrode

FIG. 17is a cross-sectional view showing a XVII-XVII cross section ofFIG. 15. As shown inFIG. 17, the current blocking layer CB1is disposed on a portion140aof the p-type semiconductor layer140. The transparent electrode TE1is disposed on the current blocking layer CB1and the remaining portion140bof the p-type semiconductor layer140. The p-electrode P2is disposed on the transparent electrode TE1. When the p-electrode P2is projected on the surface of the p-type semiconductor layer140, its projection area is included in an area where the current blocking layer CB1is formed.

3. n-Side Barrier Metal Layer and p-Electrode

3-1. Layered Structure of n-Side Barrier Metal Layer and p-Electrode

As shown by the hatched area ofFIGS. 16 and 17, the layered structure of the n-side barrier metal layer BM2ofFIG. 16is the same as the layered structure of the p-electrode P2ofFIG. 17. As described later, the n-side barrier metal layer BM2and the p-electrode P2are formed in the same step. Therefore, in the n-side barrier metal layer BM2and the p-electrode P2, the layers are formed in the same order sequentially from the lower layer, and the thickness of each of the layers deposited is also the same within the film formation error range.

3-2. Materials of n-Side Barrier Metal Layer and p-Electrode

Next will be described the materials of the n-electrode N2, the n-side barrier metal layer BM2, and the p-electrode P2. In Example 4 of Table 2, the n-electrode N2is formed of Ti, Ag alloy, Ta, and Ti deposited in this order on the n-type semiconductor layer120. The thickness of Ti in contact with the n-type semiconductor layer120is 2 nm. The thickness of Ag alloy is 100 nm. The thickness of Ta is 100 nm. The thickness of Ti is 50 nm. The thicknesses of these layers are merely examples, and other thickness may be used.

The n-side barrier metal layer BM2is formed of Ti, Rh, Ti, Au, Al deposited in this order on the n-electrode N2. The thickness of Ti is 2 nm. The thickness of Rh is 100 nm. The thickness of Ti is 50 nm. The thickness of Au is 1500 nm. The thickness of Al is 10 nm. The thicknesses of these layers are merely examples, and other thickness may be used.

The layers of the p-electrode P2of Example 4 are deposited in the same order as that of the layers of the n-side barrier metal layer BM2of Example 4. The p-electrode P2is formed of Ti, Rh, Ti, Au, and Al deposited in this order on the transparent electrode TE1. The thickness of Ti is 2 nm. The thickness of Rh is 100 nm. The thickness of Ti is 50 nm. The thickness of Au is 1,500 nm. The thickness of Al is 10 nm. The thicknesses of these layers are merely examples, and other thickness may be used.

In Example 5 of Table 2, the n-electrode N2is formed of Ti, Al, Ta, and Ti deposited in this order on the n-type semiconductor layer120. The thickness of Ti in contact with the n-type semiconductor layer120is 2 nm. The thickness of Al is 100 nm. The thickness of Ta is 100 nm. The thickness of Ti is 50 nm. The thicknesses of these layers are merely examples, and other thickness may be used.

The n-side barrier metal layer BM2of Example 5 is the same as the n-side barrier metal layer BM2of Example 4.

The layers of the p-electrode P2of Example 5 are deposited in the same order as that of the layers of the n-side barrier metal layer BM2of Example 5.

4. Method for Producing Semiconductor Light-Emitting Device

In Embodiment 2, the n-electrode formation step, the p-electrode formation step, and the n-side barrier metal layer formation step are different from Embodiment 1. Therefore, only the different steps are described. The steps up to the insulating layer formation step ofFIG. 12are the same as those of Embodiment 1.

As shown inFIG. 18, an n-electrode N2is formed on the n-type semiconductor layer120and the insulating layer IN1. For example, on the n-type semiconductor layer120, Ti having a thickness of 2 nm, Al having a thickness of 100 nm, Ta having a thickness of 100 nm, and Ti having a thickness of 50 nm are deposited in this order shown as Example 5.

4-2. p-Electrode Formation Step and n-Side Barrier Metal Layer Formation Step

Subsequently, as shown inFIG. 19, the p-electrode formation step and the n-side barrier metal layer formation step are performed in the same step. That is, in the p-electrode formation step and the n-side barrier metal layer formation step, the n-side barrier metal layer BM2is formed on the n-electrode N2while the p-electrode P2is formed on the transparent electrode TE1. When the p-electrode P2and the n-side barrier metal layer BM2are deposited, each of the layers of the p-electrode P2and the n-side barrier metal layer BM2is formed in the same order and in the same thickness. Therefore, the p-electrode P2and the n-side barrier metal layer BM2after the film formation have the same layered structure.

Embodiment 3 will next be described, focusing on the differences from Examples 1 and 2.

FIG. 20is a plan view showing the structure of a light-emitting device300according to Embodiment 3.FIG. 21is a cross-sectional view showing a XXI-XXI cross section ofFIG. 20. As shown inFIG. 21, the light-emitting device300has a substrate110, an n-type semiconductor layer120, a light-emitting layer130, a p-type semiconductor layer140, an insulating layer IN1, a current blocking layer CB1, a transparent electrode TE1, an insulating layer IP1, an n-side metal layer N3, an n-electrode N1, a p-electrode P1, a p-side barrier metal layer BM1, and a protective film F1.

2. Structure in the Vicinity of Electrode

FIG. 22is a cross-sectional view showing a XXII-XXII cross section ofFIG. 20. As shown inFIG. 22, the insulating layer IN1is formed on the n-type semiconductor layer120. The n-side metal layer N3is formed on the insulating layer IN1. The n-electrode N1is formed on the n-side metal layer N3with covering the surface thereof. The protective film F1is formed on the n-electrode N1. That is, the n-side metal layer N3is covered with the insulating layer IN1and the n-electrode N1.

FIG. 23is a cross-sectional view showing a XXIII-XXIII cross section ofFIG. 20. As shown inFIG. 22, the insulating layer IN1is formed on the n-type semiconductor layer120. The n-side metal layer N3is formed on the insulating layer IN1. The n-electrode N1is formed on the n-side metal layer N3. An n-pad electrode N1cof the n-electrode N1is exposed without being covered with the protective film F1.

3. Method for Producing Semiconductor Light-Emitting Device

In Example 3, the p-electrode formation step, the n-side metal layer formation step, the n-electrode formation step, and the p-side barrier metal layer formation step are different from Embodiment 1. Therefore, only the different steps will be described. The steps up to the insulating layer formation step ofFIG. 12are the same as those of Embodiment 1.

3-1. p-Electrode Formation Step and n-Side Metal Layer Formation Step

Subsequently, as shown inFIG. 24, the p-electrode formation step and the n-side metal layer formation step are performed in the same step. That is, in the p-electrode formation step and the n-side metal layer formation step, the n-side metal layer N3is formed don the insulating layer IN1while the p-electrode P1is formed on the transparent electrode TE1and the insulating layer IP1. When the p-electrode P1and the n-side metal layer N3are deposited, each of the layers of p-electrode P1and the n-side metal layer N3is formed in the same order and in the same thickness. Therefore, the p-electrode P1and the n-side metal layer N3after the film formation have the same layered structure.

3-2. n-Electrode Formation Step and p-Side Barrier Metal Layer Formation Step

Then, as shown inFIG. 25, the n-electrode formation step and the p-side barrier metal layer formation step are performed in the same step. In the n-electrode formation step and the p-side barrier metal layer formation step, the p-side barrier metal layer BM1is formed on the p-electrode P1while the n-electrode N1is formed on the n-side metal layer N3. When the n-electrode N1and the p-side barrier metal layer BM1are deposited, each of the layers of the n-electrode N1and the p-side barrier metal layer BM1is formed in the same order and in the same thickness. The n-electrode N1and the p-side barrier metal layer BM1after the film formation have the same layered structure.

Embodiment 4 will next be described, focusing on the differences from Examples 1 and 2.

FIG. 26is a plan view showing the structure of a light-emitting device according400to Embodiment 4.FIG. 27is a cross-sectional view showing a XXVII-XXVII cross section ofFIG. 26. As shown inFIG. 27, the light-emitting device400has a substrate110, an n-type semiconductor layer120, a light-emitting layer130, a p-type semiconductor layer140, a transparent electrode TE1, an insulating layer IP1, a protective film F1, a p-side metal layer P3, and a p-electrode P2. The light-emitting device400has an insulating layer IN1, a current blocking layer CB1, and an n-electrode N1as shown inFIG. 2.

2. Structure in the Vicinity of Electrode

As shown inFIG. 27, the insulating layer IP1is formed on the transparent electrode TE1. The p-side metal layer P3is formed on the insulating layer IP1. The p-electrode P2is formed on the p-side metal layer P3. The protective film F1is formed on the p-electrode P2. That is, the p-side metal layer P3is covered with the insulating layer IP1and the p-electrode P2.

3. Method for Producing Semiconductor Light-Emitting Device

In Embodiment 4, the n-electrode formation step, the A-side metal layer formation step, the p-electrode formation step, and the n-side barrier metal layer formation step are different from Embodiment 1. Therefore, only the different steps will be described. The steps up to the insulating layer formation step ofFIG. 12are the same as those of Embodiment 1.

3-1. n-Electrode Formation Step and p-Side Metal Layer Formation Step

Subsequently, as shown inFIG. 28, the n-electrode formation step and the p-side metal layer formation step are performed in the same step. That is, in the n-electrode formation step and the p-side metal layer formation step, the p-side metal layer P3is formed on the insulating layer IP1while the n-electrode N2is formed on the n-type semiconductor layer120and the insulating layer IN1. Each of the layers of the n-electrode N2and the p-side metal layer P3is formed in the same order and in the same thickness. Therefore, the n-electrode N2and the p-side metal layer P3after the film formation have the same layered structure.

3-2. p-Electrode Formation Step and n-Side Barrier Metal Layer Formation Step

Then, as shown inFIG. 29, the p-electrode formation step and the n-side barrier metal layer formation step are performed in the same step. That is, in the p-electrode formation step and the n-side barrier metal layer formation step, the n-side barrier metal layer BM2is formed on the n-electrode N2while the p-electrode P2is formed on the A-side metal layer P3. When the p-electrode P2and the n-side barrier metal layer BM2are deposited, each of the layers of the p-electrode P2and the n-side barrier metal layer BM2is formed in the same order and in the same thickness. Therefore, the p-electrode P2and the n-side barrier metal layer BM2after the film formation have the same layered structure.