Display panel

A display panel including a fan-out wire, an electrostatic discharge device, a signal wire, and a first conductive via structure is provided. The electrostatic discharge device has a first electrode and a second electrode. The first conductive via structure is electrically connected to the fan-out wire, the first electrode of the electrostatic discharge device, and the signal wire.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims the priority benefit of Taiwan application serial no. 108134557, filed on Sep. 25, 2019. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification.

BACKGROUND

Technical Field

The disclosure relates to a panel, and more particularly, to a display panel.

Description of Related Art

With the popularity of multimedia applications, displays with high resolution and large viewing range have become the mainstream of technological development. As the display resolution increases, the number of wires in the peripheral area (e.g., the area outside the display area) of the display also increases. In addition, in order to prevent the display from being easily damaged by static electricity, an electrostatic discharge (ESD) circuit needs to be set around the pixel array substrate of the display. Therefore, a certain space needs to be reserved around the conventional pixel array substrate to arrange a large number of wires and various electrostatic discharge (ESD) circuits. As a result, the bezel area (e.g., for covering the peripheral area) of the display could not be further reduced.

SUMMARY

The disclosure provides a display panel with better electrostatic discharge effect.

A display panel of the disclosure includes a fan-out wire, an electrostatic discharge device, a signal wire, and a first conductive via structure. The electrostatic discharge device has a first electrode and a second electrode. The first conductive via structure is electrically connected to the fan-out wire, the first electrode of the electrostatic discharge device, and the signal wire.

DESCRIPTION OF THE EMBODIMENTS

To make the aforementioned more comprehensible, several embodiments accompanied with drawings are described in detail as follows. The described embodiments may be modified in various different ways, without departing from the spirit or scope of the invention.

In the accompanying drawings, thicknesses of layers, films, panels, regions, areas and so on are exaggerated for clarity. Throughout the specification, the same reference numerals in the accompanying drawings denote the same devices/components/elements.

It should be understood that when an element such as a layer, film, region, area or substrate is referred to as being “on another element” or “connected to another element” it can be directly on or connected to the other element, or intervening elements may also be present. In contrast, when an element is referred to as being “physically connected to” another element, there are no intervening elements present. As not specifically stated, as used herein, “connected” may refer to a physical and/or electrical connection. Furthermore, the “electrical connection” of the two devices may indicate that there are other devices therebetween.

It should be understood that the terms “first”, “second”, “third”, “fourth”, “fifth”, “sixth”, “seventh”, “eighth”, “ninth”, “tenth”, “eleventh”, “twelfth”, and “thirteenth” or “a/an”, “another”, and “still another” may be used to describe different elements/portions in the disclosure, but these elements/portions should not be limited by these terms. These terms are only used to distinguish the elements/portions from one another. For instance, a first element/portion may be referred to as a second element/portion; similarly, a second element/portion may be referred to as a first element/portion without departing from the scope of the inventive concept. For instance, an element may also be referred to as another element; similarly, another element may be referred to as still another element without departing from the scope of the inventive concept.

The term used herein is for the purpose of describing particular embodiments and is not particularly limited. The articles “a/an”, “another”, “still another”, and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. Unless otherwise indicated, “or” means “and/or”. As used herein, the term “and/or” includes any one and any combination of any two or more of the associated listed items. It is also to be understood that the terms “comprises”, “includes”, and “has” specify the presence of stated features, regions, areas, steps, operations, elements, components, and/or combinations thereof, but the existence or addition of one or more other features, regions, areas, steps, operations, elements, components, and/or combinations thereof are not excluded.

Further, relative terms such as “lower” or “bottom” and “upper” or “top” may be used herein for ease of description to describe one element's relationship to another element as shown in the figures. It will be understood that relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, an element described as being “above” or “upper” relative to another element will then be “below” or “lower” relative to the other element. Thus, the term “above” encompasses both the above and below orientations depending on the spatial orientation of the device. Similarly, if the device in the figures is turned over, an element described as being “below” or “lower” relative to another element will then be “above” or “upper” relative to the other element. Thus, the term “below” encompasses both the below and above orientations depending on the spatial orientation of the device.

Exemplary embodiments of the invention are described with reference of schematic cross-sectional views of the idealized embodiments. Therefore, a shape variation of the drawings as a result of a manufacturing technique and/or manufacturing tolerance, for example, is expected. Therefore, the embodiments of the invention should not be interpreted as being limited to specific shapes of the regions shown in the drawings but may include a shape deviation caused during manufacture, for example. For example, a flat area shown in the figures or described herein may practically have rough and/or non-linear characteristics. Moreover, an acute angle shown in the drawings can practically be rounded. Therefore, the shapes shown in the figures are substantially schematic, and the shapes therein are not intended to represent accurate shapes, and are not intended to serve as limitations of the claims.

FIG. 1is a top view of a display panel of a first embodiment of the disclosure. In addition, a portion of the film layer or device may be omitted inFIG. 1for clarity. For example, a portion of the fan-out wires or a portion of the pixel units are omitted inFIG. 1.

Referring toFIG. 1, the display panel100may include a substrate110, a driving device191, a fan-out wire120, a signal wire150, and a plurality of pixel units PU. The substrate110may include a circuit area111and a display area119. The driving device191and the fan-out wire120may be disposed on the circuit area111of the substrate110. The pixel units PU may be disposed on the display area119of the substrate110. The signal wire150may extend from the display area119to the circuit area111. The pixel unit PU may be electrically connected to the corresponding driving device191through the corresponding signal wire150and the corresponding fan-out wire120.

In the embodiment, the driving device191is, for example, a driver IC, but the disclosure is not limited thereto.

For example, the signal wire150may include a first signal wire151, a second signal wire152, and a third signal wire153; and the pixel unit PU may include a first pixel unit PU1, a second pixel unit PU2, and a third pixel unit PU3. The first pixel unit PU1may be electrically connected to the corresponding driving device191through the first signal wire151and the corresponding fan-out wire120. The second pixel unit PU2may be electrically connected to the corresponding driving device191through the second signal wire152and the corresponding fan-out wire120. The third pixel unit PU3may be electrically connected to the corresponding driving device191through the third signal wire153and the corresponding fan-out wire120.

In the embodiment, the first signal wire151, the second signal wire152, and the third signal wire153may be physically isolated from each other. In other words, the first pixel unit PU1, the second pixel unit PU2, and the third pixel unit PU3may be driven by different electronic signals.

In the embodiment, the first pixel unit PU1, the second pixel unit PU2, and the third pixel unit PU3may have different light emitting colors, but the disclosure is not limited thereto. For example, the first pixel unit PU1may be a red pixel, the second pixel unit PU2may be a green pixel, and the third pixel unit PU3may be a blue pixel, but the disclosure is not limited thereto.

In the embodiment, the number of the first pixel unit PU1, the number of the second pixel unit PU2, and the number of the third pixel unit PU3may be adjusted according to design requirements, which are not limited in the disclosure.

The layout and corresponding structure of the pixel unit PU may be adjusted according to design requirements, which are not limited in the disclosure. For example, in the embodiment, the display panel100is, for example, a liquid crystal display panel, and a sealant192may surround the display area119of the substrate110, and the pixel unit PU may have a corresponding color filter (CF) and have different colors. In an embodiment not shown, the display panel (e.g., similar to the display panel100) is, for example, a light emitting diode display panel, and the pixel unit (e.g., similar to the pixel unit PU) may have a corresponding color light emitting diode (color LED) and have different colors.

FIG. 2Ais a partial top view of a display panel of a second embodiment of the disclosure.FIG. 2Bis a partial top view of a display panel of a second embodiment of the disclosure.FIG. 2Cis a partial top view of a display panel of a second embodiment of the disclosure.FIG. 2Dis a partial top view of a display panel of a second embodiment of the disclosure.FIG. 2Eis a partial cross section view of a display panel of a second embodiment of the disclosure.

A display panel200of the second embodiment is similar to the display panel100of the first embodiment. InFIGS. 2A to 2E, the same or similar reference numerals represent the same or similar components, and therefore the components that have been described are not described herein.

For example, the display panel200ofFIG. 2Amay be a schematic top view similar to the region R2in the display panel100ofFIG. 1A. In addition, a portion of the film layer or device may be omitted inFIGS. 2A to 2Efor clarity.FIG. 2Bmay be a schematic top view of the first conductive layer810inFIG. 2A.FIG. 2Cmay be a schematic top view of the semiconductor layer830inFIG. 2A.FIG. 2Dmay be a schematic top view of the second conductive layer840inFIG. 2A.FIG. 2Eis a schematic cross-sectional view taken along the line A-A′ inFIG. 2A.

Referring toFIG. 1andFIGS. 2A to 2E, the display panel200may include a fan-out wire120, an electrostatic discharge device (ESD device)240, a signal wire150, and a first conductive via structure230. The ESD device240includes a first electrode240aand a second electrode240b. The first conductive via structure230is electrically connected to the fan-out wire120, the first electrode240aof the ESD device240, and the signal wire150.

In the embodiment, the circuit area111of the substrate110may include a fan-out area112, a conduction area113, and an electrostatic discharge area (ESD area)114. The conduction area113is located between the fan-out area112and the ESD area114. The ESD area114is located between the conduction area113and the display area119. The fan-out wire120is disposed on the fan-out area112of the substrate110. The first conductive via structure230is disposed on the conduction area113of the substrate110. The ESD device240is disposed on the ESD area114of the substrate110. The signal wire150is disposed on the substrate110and extends from the display area119to the conduction area113through the ESD area114.

In the embodiment, the display panel200may include a first conductive layer810, a first insulating layer820, a semiconductor layer830, and a second conductive layer840. In an embodiment, the first conductive layer810may be disposed between the substrate110and the second conductive layer840, but the disclosure is not limited thereto.

In the embodiment, a portion of the first conductive layer812(may be referred as a first conductive portion) located in the fan-out area112(e.g., a portion of the first conductive layer810) and a portion of the second conductive layer842(may be referred as a seventh conductive portion) located in the fan-out area112(e.g., a portion of the second conductive layer840) may be constituted a fan-out wire120. In other words, the fan-out wire120may include a first conductive layer812and a second conductive layer842.

In the embodiment, a portion of the first conductive layer814a(may be referred as a third conductive portion) and a portion of the first conductive layer814b(may be referred as a fourth conductive portion) located in the ESD area114(e.g., a portion of the first conductive layer810), a semiconductor layer834(e.g., a portion of the semiconductor layer830) located in the ESD area114, and a portion of the second conductive layer844a(may be referred as a ninth conductive portion) and a portion of the second conductive layer844b(may be referred as a tenth conductive portion) located in the ESD area114(e.g., a portion of the second conductive layer840) may be constituted the ESD device240. In other words, the ESD device240may include the first conductive layers814a,814b, the semiconductor layer834, and the second conductive layers844a,844b. The first electrode240aof the ESD device240may include the first conductive layer814aand the second conductive layer844a. The second electrode240bof the ESD device240may include the first conductive layer814band the second conductive layer844b.

In the embodiment, a portion of the second conductive layer845(may be referred as an eleventh conductive portion) extending from the display area119to the conduction area113through the ESD area114(e.g., a portion of the second conductive layer840) may be constituted the signal wire150. In other words, the signal wire150may include the second conductive layer845.

In the embodiment, a portion of the first conductive layer813(may be referred as a second conductive portion) located in the conduction area113(e.g., a portion of the first conductive layer810) and a portion of the second conductive layer843(may be referred as an eighth conductive portion) located in the conduction area113(e.g., a portion of the second conductive layer840) may be constituted the first conductive via structure230. In other words, the first conductive structure230may include the first conductive layer813and the second conductive layer843.

In the embodiment, the first conductive layer813of the first conductive via structure230is physically connected to the first conductive layer812of the fan-out wire120and the first conductive layer814aof the first electrode240aof the ESD device240; and the second conductive layer843of the first conductive via structure230is physically connected to the second conductive layer842of the fan-out wire120, the second conductive layer844aof the first electrode240aof the ESD device240, and the second conductive layer845of the signal wire150. As such, the space utilization ratio of the display panel200on the layout design may be improved.

In the embodiment, the second conductive layer843of the first conductive via structure230penetrates the first insulating layer820to contact the first conductive layer813of the first conductive via structure230, but the disclosure is not limited thereto.

In the embodiment, the display panel200may further include a second conductive via structure293. The first conductive layer814bof the second electrode240bof the ESD device240and the second conductive layer844bof the second electrode240bof the ESD device240may be electrically connected to each other via the second conductive via structure293. The second conductive via structure293may be the same as or similar to the first conductive via structure230, but the disclosure is not limited thereto.

In the embodiment, the circuit area111of the substrate110may further include an electrode area115. The electrode area115is located between the ESD area114and the display area119. The display panel200may further include a discharge electrode260. The discharge electrode260is disposed on the electrode area115of the substrate110and is electrically connected to the second electrode240bof the ESD device240.

In the embodiment, a portion of the first conductive layer816(may be referred as a fifth conductive portion) located in the electrode area115(e.g., a portion of the first conductive layer810) may be constituted the discharge electrode260. In other words, the discharge electrode260may include the first conductive layer816.

In the embodiment, the display panel200may further include a connection electrode270. The discharge electrode260and the second electrode240bof the ESD device240may be electrically connected to each other via the connection electrode270. The second conductive layer847(may be referred as a twelfth conductive portion) located in the electrode area115(e.g., a portion of the second conductive layer840) may be constituted the connection electrode270. In other words, the connection electrode270may include the second conductive layer847.

In the embodiment, the second conductive layer844bof the second electrode240bis physically connected to the second conductive layer847of the connection electrode270, but the disclosure is not limited thereto.

In the embodiment, the display panel200may further include a third conductive via structure295. The second conductive layer847of the connection electrode270and the first conductive layer816of the discharge electrode260may be electrically connected to each other via the third conductive structure295. The third conductive structure295may be the same as or similar to the first conductive structure230, but the disclosure is not limited thereto.

FIG. 3is a partial top view of a display panel of a third embodiment of the disclosure. In addition, a portion of the film layer or device may be omitted inFIG. 3for clarity.

A display panel300of the third embodiment is similar to the display panel200of the second embodiment. InFIG. 3, the same or similar reference numerals represent the same or similar components, and therefore the components that have been described are not described herein. For example, the patterns of the first conductive layer810, the first insulating layer820, the semiconductor layer830, and the second conductive layer840of the display panel300located in the fan-out area112, the conduction area113, and the ESD area114may be the same or similar to the patterns of the first conductive layer810, the first insulating layer820, the semiconductor layer830, and the second conductive layer840of the display panel200located in the fan-out area112, the conduction area113, and the ESD area114.

In the embodiment, the discharge electrode260may include a first discharge electrode361, a second discharge electrode362, and a third discharge electrode363. In an embodiment, the first discharge electrode361, the second discharge electrode362, and the third discharge electrode363may be physically isolated from each other.

In the embodiment, among the ESD device240electrically connected to pixels having the same color, two of them adjacent to each other may be electrically connected to different discharge electrodes260.

For example, the ESD device240may include a first ESD device341, a second ESD device342, a third ESD device343, a fourth ESD device344, a fifth ESD device345, and a sixth ESD device.346, a seventh ESD device347, an eighth ESD device348, and a ninth ESD device349. The first ESD device341may be electrically connected to the first discharge electrode361, and the first ESD device341may be electrically connected to a first pixel unit PU1via first signal wire151. The second ESD device342may be electrically connected to the second discharge electrode362, and the second ESD device342may be electrically connected to a second pixel unit PU2via second signal wire152. The third ESD device343may be electrically connected to the third discharge electrode363, and the third ESD device343may be electrically connected to a third pixel unit PU3via third signal wire153. The fourth ESD device344may be electrically connected to the second discharge electrode362, and the fourth ESD device344may be electrically connected to another first pixel unit PU1via another first signal wire151. The fifth ESD device345may be electrically connected to the third discharge electrode363, and the fifth ESD device345may be electrically connected to another second pixel unit PU2via another second signal wire152. The sixth ESD device346may be electrically connected to the first discharge electrode361, and the sixth ESD device346may be electrically connected to another third pixel unit PU3via another third signal wire153. The seventh ESD device347may be electrically connected to the third discharge electrode363, and the seventh ESD device347may be electrically connected to still another first pixel unit PU1via still another first signal wire151. The eighth ESD device348may be electrically connected to the first discharge electrode361, and the eighth ESD device348may be electrically connected to still another second pixel unit PU2via still another second signal wire152. The ninth ESD device349may be electrically connected to the second discharge electrode362, and the ninth ESD device349may be electrically connected to still another third pixel unit PU3via still another third signal wire153.

FIG. 4is a partial top view of a display panel of a fourth embodiment of the disclosure. In addition, a portion of the film layer or device may be omitted inFIG. 4for clarity.

A display panel400of the fourth embodiment is similar to the display panel300of the third embodiment. InFIG. 4, the same or similar reference numerals represent the same or similar components, and therefore the components that have been described are not described herein. For example, the patterns of the first conductive layer810, the first insulating layer820, the semiconductor layer830, and the second conductive layer840of the display panel400located in the fan-out area112, the conduction area113, and the ESD area114may be the same or similar to the patterns of the first conductive layer810, the first insulating layer820, the semiconductor layer830, and the second conductive layer840of the display panel300located in the fan-out area112, the conduction area113, and the ESD area114.

In the embodiment, the discharge electrode260may include a first discharge electrode361, a second discharge electrode362, and a third discharge electrode363. In an embodiment, the first discharge electrode361, the second discharge electrode362, and the third discharge electrode363may be physically isolated from each other.

In the embodiment, among the ESD device240electrically connected to pixels having the same color, two of them adjacent to each other may be electrically connected to the same discharge electrode260.

For example, the first ESD device341, the fourth ESD device344, and the seventh ESD device347may be electrically connected to the third discharge electrode363. The second ESD device342, the fifth ESD device345, and the eighth ESD device348may be electrically connected to the second discharge electrode362. The third ESD device343, the sixth ESD device346, and the ninth ESD device349may be electrically connected to the first discharge electrode361.

FIG. 5Ais a partial top view of a display panel of a fifth embodiment of the disclosure.FIG. 5Bis a partial top view of a display panel of a fifth embodiment of the disclosure.FIG. 5Cis a partial top view of a display panel of a fifth embodiment of the disclosure.FIG. 5Dis a partial top view of a display panel of a fifth embodiment of the disclosure.FIG. 5Eis a partial top view of a display panel of a fifth embodiment of the disclosure.FIG. 5Fis a partial top view of a display panel of a fifth embodiment of the disclosure.

For example, the display panel500ofFIG. 5Amay be a schematic top view similar to the region R5in the display panel100ofFIG. 1A. In addition, a portion of the film layer or device may be omitted inFIGS. 5A to 5Ffor clarity.FIG. 5Bmay be a schematic top view of the first conductive layer810inFIG. 5A.FIG. 5Cmay be a schematic top view of the semiconductor layer830inFIG. 5A.FIG. 5Dmay be a schematic top view of the second conductive layer840inFIG. 5A.FIG. 5Emay be a schematic top view of the third conductive layer860inFIG. 5A.FIG. 5Eis a schematic cross-sectional view taken along the line B-B′ inFIG. 2A.

Referring toFIG. 1andFIGS. 5A to 5F, the display panel500may include a fan-out wire120, an electrostatic discharge device (ESD device)540, a signal wire150, and a first conductive via structure530. The ESD device540includes a first electrode540aand a second electrode540b. The first conductive via structure530is electrically connected to the fan-out wire120, the first electrode540aof the ESD device540, and the signal wire150. The first conductive via structure530is disposed on the conduction area113of the substrate110. The ESD device540is disposed on the ESD area114of the substrate110.

The first electrode540aof the ESD device540may include the first conductive layer814aand the second conductive layer844a. The second electrode540bof the ESD device540may include the first conductive layer814band the second conductive layer844b.

In the embodiment, the display panel500may further include a second insulating layer850and a third conductive layer860. The second insulating layer850and the third conductive layer860may be disposed on the substrate110. The second insulating layer850may be disposed between the second conductive layer840and the third conductive layer860.

In the embodiment, a portion of the first conductive layer813located in the conduction area113(e.g., a portion of the first conductive layer810), a portion of the second conductive layer843located in the conduction area113(e.g., a portion of the second conductive layer840), and a portion of the third conductive layer863(may be referred as a thirteenth conductive portion) located in the conduction area113(e.g., a portion of the third conductive layer860) may be constituted a first conductive via structure530. In other words, the first conductive structure530may include the first conductive layer813, the second conductive layer843, and the third conductive layer863.

In the embodiment, the third conductive layer860of the first conductive via structure530penetrates the first insulating layer820and the second insulating layer850to contact the first conductive layer813of the first conductive via structure530; and the third conductive layer863of the first conductive via structure530penetrates the second insulating layer850to contact the second conductive layer843of the first conductive via structure530.

In the embodiment, the material of the third conductive layer860may be different from the material of the first conductive layer810and the material of the second conductive layer840. For example, the material of the first conductive layer810and/or the material of the second conductive layer840includes a metal, a metal alloy, or a stack of two or more metals; and the material of the third conductive layer860includes zinc oxide (ZnO), tin oxide (SnO), indium-zinc oxide (IZO), gallium-zinc oxide (GZO), zinc-tin oxide (ZTO), indium-tin oxide (ITO), other suitable metal oxide, or a stack of at least two of the foregoing.

In the embodiment, the first conductive layer813of the first conductive via structure530is physically connected to the first conductive layer812of the fan-out wire120and the first conductive layer814aof the first electrode540aof the ESD device540. The second conductive layer843of the first conductive via structure530is physically connected to the second conductive layer842of the fan-out wire120, the second conductive layer844aof the first electrode540aof the ESD device540, and the second conductive layer845of the signal wire150. As such, the space utilization ratio of the display panel500on the layout design may be improved.

In the embodiment, a portion of the first conductive layer814bwhich is constituted the second electrode540bof the ESD device540may be physically connected to portion of the first conductive layer816(e.g., a portion of the first conductive layer810) which is constituted the discharge electrode260.

In the embodiment, the display panel500may further include a common electrode580. The common electrode580is disposed on the electrode area115of the substrate110. In an embodiment, each pixel unit PU may be electrically connected to a common voltage source via the common electrode580.

In the embodiment, a portion of the first conductive layer818(may be referred as a sixth conductive portion) located in the electrode area115(e.g., a portion of the first conductive layer810) may be constituted a common electrode580. In other words, the common electrode580may include a first conductive layer818.

In the embodiment, the discharge electrode260is disposed between the ESD device540and the common electrode580. In other words, compared to the discharge electrode260, the common electrode580is closer to the pixel unit PU; or, compared to the common electrode580, the discharge electrode260is closer to the ESD device540. As such, the space utilization ratio of the display panel500on the layout design may be improved.

FIG. 6is a partial top view of a display panel of a sixth embodiment of the disclosure. In addition, a portion of the film layer or device may be omitted inFIG. 6for clarity.

The display panel600of the sixth embodiment is similar to the display panel500of the fifth embodiment. InFIG. 6, the same or similar reference numerals represent the same or similar components, and therefore the components that have been described are not described herein. For example, the patterns of the first conductive layer810, the first insulating layer820, the semiconductor layer830, and the second conductive layer840of the display panel600located in the fan-out area112, the conduction area113, and the ESD area114may be the same or similar to the patterns of the first conductive layer810, the first insulating layer820, the semiconductor layer830, and the second conductive layer840of the display panel500located in the fan-out area112, the conduction area113, and the ESD area114.

In the embodiment, the display panel600may further include a repair electrode690. The repair electrode690is disposed on the electrode area115of the substrate110. The signal wire150has a repair section659. The repair electrode690overlaps the repair section659of the signal wire150.

In an embodiment, the repair electrode690and the repair section659of the signal wire150may be electrically connected to each other by laser repair technology (LRT).

In the embodiment, the discharge electrode260is disposed between the ESD device540and the repair electrode690. In other words, compared to the discharge electrode260, the repair electrode690is closer to the pixel unit PU; or, compared to the repair electrode690, the discharge electrode260is closer to the ESD device540. As such, the space utilization ratio of the display panel600on the layout design may be improved.

In the embodiment of the disclosure, the conductive layer may be a single-layer or multi-layer conductive structure. If the conductive layer is a multi-layer conductive structure, there may be no insulating material between foregoing multi-layer conductive structure.

In the embodiment of the disclosure, the insulating layer may be a single-layer or multi-layer insulating structure. If the insulating layer is a multi-layer insulating structure, there may be no conductive material between foregoing multi-layer insulating structure.