Display device, control device for driving the display device, and control method thereof

Provided is a display device, including: a display unit including a plurality of pixels that emit light according to a plurality of data signals supplied through a plurality of data lines; a power voltage supplier configured to supply a power voltage to the plurality of pixels; a current detector configured to detect a total current flowing in the plurality of pixels; and a controller configured to receive image information of one frame unit and generate a reference voltage signal corresponding to the image information of one frame unit. The current detector compares the total current and the reference voltage signal and controls driving of the power voltage supplier according to the comparison.

CROSS-REFERENCE TO RELATED APPLICATION

Korean Patent Application No. 10-2013-0053219, filed on May 15, 2013, in the Korean Intellectual Property Office, and entitled: “Display Device, Control Device For Driving the Display Device, and Control Method Thereof,” is incorporated by reference herein in its entirety.

BACKGROUND

Embodiments relate to a display device, a control device for driving a display device, and a control method thereof.

2. Description of the Related Art

An organic light emitting diode display among flat panel displays uses an organic light emitting diode, which generates light by recoupling electrons and holes to display an image. Since the organic light emitting diode display has a fast response speed, low power consumption, excellent luminous efficiency, excellent luminance, and a wide viewing angle, the organic light emitting diode display has received attention.

In general, the organic light emitting diode display is classified into a passive matrix organic light emitting diode (PMOLED) display and an active matrix organic light emitting diode (AMOLED) display according to a driving mode of the organic light emitting diode.

The passive matrix type is a driving mode in which an anode and a cathode are perpendicular to each other and a cathode line and an anode line are selected. The active matrix type is a driving mode in which a thin film transistor and a capacitor are in each pixel and a voltage is maintained by capacitance. The passive matrix type has a simple structure and a low price, but it is difficult to implement a large or high-precision panel. On the other hand, the active matrix type may be used in a large and/or high-precision panel, but a control method thereof is technically difficult and relatively expensive.

From the viewpoint of resolution, contrast, and operation speed, the AMOLED display which emits light selected for each unit pixel has become mainstream. In one pixel of the active matrix OLED display (hereinafter, referred to as an organic light emitting diode display), a light emission degree of the organic light emitting diode is controlled by controlling a driving transistor which supplies a driving current according to a data voltage to the organic light emitting diode. A value of the current flowing in the pixel is changed depending on a characteristic of an element configuring a pixel and a voltage applied to the pixel. In addition, when the value of the current flowing in the pixel exceeds a limiting current value, the application of the voltage supplied to the pixel stops and thus the display device is protected.

However, when the pixel has a defect or a fault, an abnormal current having a current value of the limiting current value or less flows and thus there is a problem in that the display device may not be protected.

SUMMARY

An exemplary embodiment provides a display device, including: a display unit including a plurality of pixels which emits light according to a plurality of data signals supplied through a plurality of data lines, a power voltage supplier configured to supply a power voltage to the plurality of pixels, a current detector configured to detect a total current flowing in the plurality of pixels, and a controller configured to receive image information of one frame unit and generate a reference voltage signal corresponding to the image information of one frame unit, in which the current detector compares the total current and the reference voltage signal and controls driving of the power voltage supplier according to the comparison.

The controller may determine a data load ratio of the image information of one frame unit by a ratio of a sum of maximum currents flowing in the plurality of pixels and a sum of currents flowing in the plurality of pixels by the image information of one frame unit, and generate the reference voltage signal according to the determined data load ratio.

The current detector may include a current-voltage converter configured to convert the total current into a first voltage, a signal converter configured to convert a digital signal of the reference voltage signal into an analog signal having a second voltage value, and a comparator configured to compare the first voltage value and the second voltage value and to output a signal stopping driving of the power voltage supplier when the first voltage exceeds the second voltage.

The current detector may include a current-voltage converter configured to convert the total current into a first voltage, a filter configured to output the reference voltage signal in a predetermined frequency section to a second voltage, and a comparator configured to compare the first voltage value and the output second voltage value and to output a signal stopping driving of the power voltage supplier when the first voltage exceeds the second voltage.

The controller may generate the reference voltage signal having a duty ratio changed according to the data load ratio.

The controller may determine the data load ratio as a plurality of sections, and when the determined data load ratio corresponds to a first section, the controller may generate the reference voltage signal so that the second voltage corresponding to the first section is output to the comparator

The currents flowing in the plurality of pixels may be a sum of currents flowing in the plurality of pixels.

Another exemplary embodiment provides a driving control device for controlling driving of a power voltage supplier which supplies a power voltage to a plurality of pixels through a power wire connected to the plurality of pixels emitting light according to a plurality of data signals supplied through a plurality of data lines, the device including: a current detector configured to detect a total current flowing in the plurality of pixels, and control driving of the power voltage supplier according to a result acquired by comparing the total current and a reference voltage signal corresponding to image information of one frame.

Yet another exemplary embodiment provides a control method of a display device, including: detecting a total current flowing in a plurality of pixels, receiving image information of one frame unit; generating a reference voltage signal corresponding to the image information of one frame unit; and stopping driving of a power voltage supplier which supplies a power voltage to the plurality of pixels according to a result acquired by comparing the total current and the generated reference voltage signal.

DETAILED DESCRIPTION

FIG. 1illustrates a block diagram of a schematic configuration of a display device according to an exemplary embodiment. Referring toFIG. 1, the display device includes a display unit10including a plurality of pixels70, a scan driver20, a data driver30, a controller40, a power voltage supplier50, and a current detector60.

The display unit10is a display panel including a plurality of pixels70connected to corresponding scan lines among a plurality of scan lines S1-Sn and corresponding data lines among a plurality of data lines D1-Dm. Each of the plurality of pixels responds to an image data signal transferred to the corresponding pixel to display an image.

Each of the plurality of pixels included in the display unit10is connected to the plurality of scan lines S1-Sn and the plurality of data lines D1-Dm to be arranged substantially in a matrix. The plurality of scan lines S1-Sn extends substantially in a row direction to be almost parallel to each other. The plurality of data lines D1-Dm extends in a substantially column direction to be almost parallel to each other. Each of the plurality of pixels of the display unit10receives a power voltage from the power voltage supplier50to receive a first driving voltage ELVDD and a second driving voltage ELVSS.

The scan driver20is connected to the display unit10through the plurality of scan lines S1-Sn. The scan driver20generates a plurality of scan signals capable of activating each pixel of the display unit10according to a scan control signal CONT2to transfer the generated scan signal to the corresponding scan line among the plurality of scan lines S1-Sn.

The scan control signal CONT2is an operation control signal of the scan driver20which is generated and transferred from the controller40. The scan control signal CONT2may include a scan start signal SSP, a clock signal CLK, and the like. The scan start signal SSP is a signal generating a first scan signal for displaying an image for one frame. The clock signal CLK is a synchronization signal for sequentially applying a scan signal to the plurality of scan lines S1-Sn.

The data driver30is connected with each pixel of the display unit10through the plurality of data lines D1-Dm. The data driver30receives an image data signal DATA1to transfer the received image data signal DATA1to a corresponding data line among the plurality of data lines D1-Dm according to a data control signal CONT1.

The data control signal CONT1is an operation control signal of the data driver30which is generated and transferred from the controller40.

The data driver30selects a gray voltage according to the image data signal DATA1to transfer the selected gray voltage to the plurality of data lines D1-Dm as a data signal.

The controller40receives image information IS input from the outside, and an input control signal controlling a display of the image information IS. The image information IS stores luminance information of each pixel PX of the display unit10. Luminance information may be classified into a predetermined number of gray levels, for example, 1024 (=210), 256 (=28), or 64 (=26) gray levels.

An example of the input control signal transferred to the controller40includes a vertical synchronization signal Vsync, a horizontal synchronizing signal Hsync, a main clock MCLK, a data enable signal DE, and the like.

The controller40appropriately image-processes the input image information IS based on the input image information IS and the input control signal in accordance with an operation condition of the display unit10and the data driver30. In detail, the controller40generates the image data signal DATA1through image processing processes, e.g., gamma correction, luminance compensation, and the like, with respect to the image information IS.

Further, the controller40transfers a scan control signal CONT2controlling an operation of the scan driver20to the scan driver20. The controller40generates the data control signal CONT1controlling an operation of the data driver30and transfers, to the data driver30, the generated data control signal CONT1together with the image data signal DATA1through the image processing process.

In addition, the controller40may store the input image information IS in a frame memory45. The frame memory45may output the stored image information to the controller40again, and the controller40may determine a data load ratio of the output image information of one frame unit. In this case, the frame memory45may be included in the controller40.

The data load ratio may be determined depending on the number of pixels emitting light and a gray level of each pixel emitting light according to the image information of one frame unit.

For example, the data load ratio may be a ratio of the number of pixels emitting light and the gray level of each pixel emitting light according to image information of one frame unit which is currently received based on a load when all of the plurality of pixels emits light at a maximum gray level.

As another example, the data load ratio may be a ratio of the sum of a total current flowing when all of the pixels of the display unit10emit light by the image information of one frame unit based on the sum of a total current flowing in the display unit10when all of the pixels of the display unit10emit light at a maximum gray level.

The controller40may generate a reference voltage signal DATA2corresponding to the data load ratio of the determined image information of one frame unit. In this case, the reference voltage signal DATA2generated according to the data load ratio will be described below with reference toFIGS. 4 and 6.

Next, the controller40may control driving of the power voltage supplier50. The power voltage supplier50supplies a power voltage for driving each pixel of the display unit10.

For example, the controller40is connected with the power voltage supplier50and a driving terminal EN1to transfer a driving signal P1to the power voltage supplier50and drive the power voltage supplier50.

Next, the power voltage supplier50is electrically connected with each pixel through a power wire supplying the power voltage to each pixel of the display unit10. The power voltage may be the first power voltage ELVDD and the second power voltage ELVSS at a high level.

The current detector60may detect a current flowing in the power wire52which transfers the first power voltage ELVDD to the display unit10from the power voltage supplier50.

As an example, the current detector60may directly measure a current flowing in the power wire52by using a resistor formed in the power wire52. As another example, the current detector60may measure a current flowing in the power wire52by using a hall sensor. A mechanism by which the current detector60detects the current flowing in the power wire52is not limited to the above examples.

The current detector60determines a total sum (hereinafter, a total current) of currents flowing in the plurality of pixels through the power wire.

When a defect is generated in the pixel, the current flowing in the pixel having the defect may be larger than a current flowing in a pixel operating normally. Since the current detector60detects the current flowing in the power wire52, the current detector60may detect the total current flowing in the pixel operating normally and the pixel having the defect.

In addition, the current detector60may generate a driving signal P2controlling driving of the power voltage supplier50, according to a result acquired by comparing the detected current and the reference voltage signal DATA2received from the controller40. The current detector60outputs the generated driving signal P2to the power voltage supplier50to control driving of the power voltage supplier50.

For example, the current detector60is connected with a driving terminal EN2of the power voltage supplier50to transfer the driving signal P2to the power voltage supplier50and drive the power voltage supplier50. In this case, the power voltage supplier50may be driven only when both the driving signal P1and the driving signal P2are received.

A detailed configuration of the current detector60according to the exemplary embodiment will be described below in the drawings.

FIG. 2illustrates a circuit diagram of an example of a pixel structure included in a display unit10of the display device according to the exemplary embodiment ofFIG. 1. In detail, as a pixel illustrated in an area where an i-th scan line Si and a j-th data line Dj cross each other among the plurality of pixels included in the display unit10ofFIG. 1, a structure of a pixel PXij70connected to the i-th scan line Si and the j-th data line Dj is illustrated.

Referring toFIG. 2, the pixel70includes an organic light emitting diode (OLED) as an organic light emitting element and a pixel driving circuit for controlling the organic light emitting diode (OLED. The pixel driving circuit includes a driving transistor M1, a switching transistor M2, and a storage capacitor Cst.

FIG. 2representatively illustrates the pixel structure which is configured by two transistors and one capacitor, but the pixel circuit structure of the display device is not limited to this structure and may be variously configured.

In the pixel70ofFIG. 2, the driving transistor M1includes a gate electrode connected to a drain electrode of a switching transistor M2, a source electrode receiving a first power voltage ELVDD, and a drain electrode connected to an anode of the organic light emitting diode (OLED).

The first power voltage ELVDD is supplied to the source electrode of the driving transistor M1through the power wire52connected to the power voltage supplier50as described inFIG. 1.

The switching transistor M2includes a gate electrode connected to the scan line Si, a source electrode connected to the data line Dj, and a drain electrode connected to the gate electrode of the driving transistor M1.

The storage capacitor Cst includes a first electrode connected to the gate electrode of the driving transistor M1, and a second electrode connected to a contact point of the first power voltage ELVDD and the source electrode of the driving transistor M1. The storage capacitor Cst is charged by a data voltage according to a data signal applied to the gate electrode of the driving transistor M1. The voltage charged in the storage capacitor Cst is maintained until the switching transistor M2is turned on again and then a new data signal is transferred.

The organic light emitting diode (OLED) includes an anode connected to the drain electrode of the driving transistor M1and a cathode connected to the second power voltage ELVSS. The second power voltage ELVSS is supplied to the cathode of the organic light emitting diode (OLED) through the power wire52connected to the power voltage supplier50as described inFIG. 1.

The driving transistor M1and the switching transistor M2configuring the pixel ofFIG. 2may be p-channel type transistors. Accordingly, a gate on voltage turning on the driving transistor M1and the switching transistor M2is a low level voltage, and a gate off voltage turning off the driving transistor M1and the switching transistor M2is a high level voltage. The pixel illustrated inFIG. 2includes a p-channel type thin film transistor, but the exemplary embodiment is not limited thereto. At least one of the driving transistor and the switching transistor may be an n-channel transistor.

The organic light emitting diode (OLED) emits light according to a driving current IEL.

Describing the operation of the pixel circuit ofFIG. 2, first, when a scan signal corresponding to the gate on voltage is transferred to the scan line Si, the switching transistor M2is turned on, and a voltage (hereinafter, a data voltage) according to a corresponding data signal is transferred to the first node N1through the data line Dj.

Then, the data voltage is applied to one electrode of the storage capacitor Cst connected to the first node N1, the first power voltage ELVDD is applied to the other electrode of the storage capacitor Cst, and the storage capacitor Cst is charged with a voltage corresponding to a difference of the voltages between both electrodes.

That is, since the difference between the voltages applied to both electrodes of the storage capacitor Cst corresponds to a difference between the voltages applied to the gate electrode and the source electrode of the driving transistor M1, the storage capacitor Cst stores a voltage Vgs between the gate electrode and the source electrode of the driving transistor M1.

The driving transistor M1controls the driving current IEL according to the voltage Vgs between the gate electrode and the source electrode. Next, the current detector60controlling the reference voltage signal DATA2and driving of the power voltage supplier50will be described in detail with reference toFIGS. 3 to 5. In this case, the current detector60and the controller40may operate as a driving control device of the power voltage supplier50.

The current detector60and the display device are not limited to the configuration illustrated inFIGS. 3 and 5, and each configuration may be easily replaced by those skilled in the art.

FIG. 3illustrates a block diagram of a driving control device of the display device according to a first exemplary embodiment in detail. As illustrated therein, a current detector60amay include a current detecting sensor601, a current voltage converter602, a signal converter604, a comparator606, and logic gates608and610.

First, the current detecting sensor601may detect a current flowing in the power wire52which transfers the first power voltage ELVDD to the display unit10from the power voltage supplier50. In this case, the measured current is a total current flowing in a pixel operating normally in the display unit10and a pixel having a defect.

Then, the current voltage converter602may convert the measured current into a voltage. For example, the voltage may be converted in proportion to a measured voltage value.

In addition, the current voltage converter602is connected to a non-inversion terminal (+) of the comparator606to transfer the converted voltage to the comparator606. The voltage converted by the current voltage converter602is assumed as a first voltage V1to be described.

Meanwhile, the signal converter604receives the reference voltage signal DATA2output from the controller40to convert the received reference voltage signal DATA2into a voltage. In this case, when the reference voltage signal DATA2is input as a digital signal, the signal converter604converts the digital signal into an analog voltage signal to generate a second voltage Vref.

Since the second voltage Vref is converted according to the reference voltage signal DATA2generated by the data load ratio, the second voltage Vref may depend on the data load ratio of the image information. The second voltage Vref output according to the data load ratio is illustrated in a table ofFIG. 4.

FIG. 4illustrates a table of a relationship between a data load ratio of image information and a second voltage Vref depending on a control method according to an exemplary embodiment. Referring toFIG. 4, the second voltage Vref output from the signal converter604is changed according to the data load ratio of the image information determined in the controller40.

For example, when the data load ratio of the image information is 12%, the controller40determines that the data load ratio of 12% corresponds to a section of a data load ratio of 10%, and may output the corresponding reference voltage signal DATA2to the signal converter604. Then, the signal converter604converts the input reference voltage signal DATA2into a second voltage Vref of 0.5 V to transfer the converted second voltage Vref to the comparator606.

When the data load ratio of the image information is 20%, the controller40may output the reference voltage signal DATA2corresponding to the data load ratio of 20% to the signal converter604. Then, the signal converter604transfers a voltage Vref having a value of 0.7 V to the comparator606according to the input reference voltage signal DATA2.

When the data load ratio of the image information is 30% or more, the controller40may output a predetermined reference voltage signal DATA2to the signal converter604. The signal converter604transfers a voltage Vref having a value of 1V to the comparator606according to the input reference voltage signal DATA2.

The second voltage Vref is applied to an inversion terminal (−) of the comparator606, and the comparator606compares the first voltage V1and the second voltage Vref. When the first voltage V1is larger than the second voltage Vref, the comparator606outputs a high signal. When the second voltage Vref is larger than the first voltage V1, the comparator606outputs a low signal. The output of the comparator606is inverted by an inverter608to be output to an AND gate610.

The AND gate610receives the output of the inverter608and a driving signal P3of the controller40, and generates an output according to a result acquired by performing an AND operation of two inputs. The output of the AND gate610may be connected with a driving terminal EN of the power voltage supplier50. Only when two input signals are high signals does the AND gate610output a high signal to the power voltage supplier50.

Even if a high signal is received from the controller40, when a low signal is received from the inverter608, the AND gate610outputs a low signal to the power voltage supplier50. In response to a low signal, driving of the power voltage supplier50may stop.

FIG. 5illustrates a block diagram of a control device for driving a display device according to a second exemplary embodiment in detail. As illustrated inFIG. 5, a current detector60bmay include the current detecting sensor601, the current voltage converter602, a filter612, the comparator606, and logic gates608and610.

The current detecting sensor601, the current voltage converter602, comparator606, and the logic gates608and610are the same as described inFIG. 3.

In this case, the controller40may generate reference voltage signals DATA2of PWM waveforms which have different duty ratios according to a data load ratio of image information.

Meanwhile, when the reference voltage signal DATA2is input from the controller40, the filter612may output the reference voltage signal DATA2in a predetermined frequency section as a voltage. The voltage output by the filter612according to the reference voltage signal DATA2is assumed as a second voltage Vref to be described.

Since the second voltage Vref is output according to the reference voltage signal DATA2generated by the data load ratio, the second voltage Vref may be in proportion to the data load ratio of the image information. The second voltage Vref output depending on the data load ratio is illustrated in a table ofFIG. 6.

FIG. 6illustrates a table of a relationship between a data load ratio of image information, a duty ratio of a reference voltage signal DATA2, and a second voltage Vref depending on a control method according to the exemplary embodiment.

Referring toFIG. 6, the controller40generates the reference voltage signal DATA2so as to vary a duty ratio of the reference voltage signal DATA2so that the second voltage Vref output from the filter612is changed according to the determined data load ratio of the image information.

For example, when the data load ratio of the image information is 12%, the controller40determines that the data load ratio of 12% corresponds to a section of a data load ratio of 10%, and may output the corresponding reference voltage signal DATA2having a duty ratio of 12% to the filter612. Then, the filter612transfers a second voltage Vref having a value of 0.5 V to the comparator606according to the input reference voltage signal DATA2.

When the data load ratio of the image information is 20%, the controller40may output a reference voltage signal DATA2having a duty ratio of 20% corresponding to the data load ratio of 20% to the filter612. Then, the filter612transfers a second voltage Vref having a value of 0.7 V to the comparator606according to the input reference voltage signal DATA2.

Since those skilled in the art easily understands that the value of the second voltage Vref output from the filter612is changed as the duty ratio of the input reference voltage signal DATA2is changed, the description is omitted.

A method of controlling the power voltage supplier50by the second voltage Vref output from the filter612and the first voltage V1output from the current voltage converter602is the same as described inFIG. 3.

Accordingly, the display device according to the exemplary embodiments illustrated inFIGS. 3 and 5may control driving of the power voltage supplier50by comparing the first voltage V1converted from the current flowing in the plurality of pixels and the second voltage Vref determined from the image information of one frame unit.

Next, a total current flowing in a defective pixel of the display unit10will be described with reference toFIGS. 7 and 8.

FIGS. 7 and 8illustrate exemplary schematic diagrams of a total current IPANEL flowing in a display unit10when a defect is generated in a pixel of the display device according to an exemplary embodiment. Here, IR3may be a minimum limiting current value of the total current.

First,FIG. 7illustrates a diagram of a limiting current IR1and a total current IPANEL. The limiting current IR1is a limiting value of a current flowing in a plurality of pixels when all the pixels normally emit light.

The total current IPANEL exceeding the limiting current IR1may flow in the plurality of pixels. When the total current IPANEL exceeds the limiting current IR1by a defective pixel72, the supply of the power voltage may stop to the plurality of pixels.

However, as illustrated inFIG. 8, when the number of pixels emitting light by the image information is reduced, the pixels emit light at a low gray level, or only the pixels positioned in a partial area74of the display unit10emit light, an overcurrent of the limiting current IR1or less may be generated by the defective pixel72.

Even when the overcurrent of a predetermined limiting current IR1or less flows, the display unit10needs to be protected. When the limiting current is changed to IR2and the total current IPANEL exceeds the limiting current IR2, the supply of the power voltage needs to stop to the plurality of pixels.

The limiting current IR2is a virtual value which is a comparison reference of the total current IPANEL, and is a limiting value of a current which can flow in the plurality of pixels according to a data load ratio.

The display device described above determines the first voltage V1into which the total current IPANEL is converted based on the second voltage Vref according to the data load ratio to stop driving of the power voltage supplier50and protect the display unit10.

The display device does not directly compare the total current IPANEL and the limiting current IR2, but may compare the first voltage V1and the second voltage Vref.

Accordingly, when the total current IPANEL exceeding the limiting current IR2by the defect pixel72flows in the plurality of pixels, the driving control device and the display device including the driving control device may stop driving of the power voltage supplier50, thereby preventing the exceeding current IPANEL from flowing in the pixels.

The display device according to the exemplary embodiment stops driving of the power voltage supplier50when the current flowing in the plurality of pixels exceeds the limiting current IR2determined by the image information which is currently displayed, and as a result, the display device may be safely driven.

Embodiments have been made in an effort to provide a display device, a control device for driving a display device, and a control method thereof having advantages of limiting an abnormal current flowing in a pixel. Further, embodiments have been made in an effort to provide a display device, a control device for driving a display device, and a control method thereof having advantages of ensuring stability of the display device and easily detecting a defect pixel, by controlling power voltage supply by using image information due to a change of a current flowing in a pixel.

Effects of the display device according are as follows. According to at least one of the exemplary embodiments, safety of a display device may be improved by limiting an abnormal current flowing in a pixel.

In addition, according to at least one of the exemplary embodiments, supply of a power voltage to the pixel may be controlled according to image information.

Further, according to at least one of the exemplary embodiments, existence of a defective pixel may readily determined by stopping the power voltage supply.