Diversity receiver with shared local oscillator signal in diversity mode

A multi-mode receiver is disclosed that is reconfigurable to share a local oscillator signal in diversity mode to save power consumption. In an exemplary embodiment, an apparatus includes a primary receiver having a primary mixer configured to down-convert a primary signal and a secondary mixer configured to down-convert a secondary signal in carrier aggregation mode. The apparatus also includes a supplemental mixer that uses a shared primary local oscillator (LO) signal generated by a shared primary frequency synthesizer in diversity mode to reduce power consumption. The apparatus further includes a controller configured to disable the secondary mixer and to enable the supplemental mixer to down-convert the secondary signal when operating in the diversity mode.

BACKGROUND

The present application relates generally to the operation and design of analog front ends, and more particularly, to the operation and design of diversity receivers.

A conventional diversity receiver comprises a primary receiver and a secondary receiver. The primary and second receivers can be operated in one of several operating modes. In a diversity mode of operation, an oscillator signal generated by the primary receiver's frequency synthesizer is transmitted to the secondary receiver to drive the secondary receiver's mixer. Thus, both the primary and secondary mixers utilize the oscillator signal generated by the primary receiver's frequency synthesizer. Substantial power is utilized to transmit or distribute the primary receiver's oscillator signal over a long transmission path to the secondary receiver. It is therefore desirable to have a mechanism to utilize the primary oscillator signal to down-convert a signal received by the secondary receiver while reducing any increase in power consumption resulting from distribution of the primary oscillator signal.

Accordingly, a diversity receiver is provided that utilizes a shared primary local oscillator (LO) signal to reduce power consumption when operating in diversity mode.

DETAILED DESCRIPTION

FIG. 1shows an exemplary embodiment of a novel diversity receiver100for use in a wireless device. The diversity receiver100comprises a primary receiver102to receive a primary receive signal106and a secondary receiver104to receive a secondary receive signal108. The primary receiver102comprises a primary downconverter110and a primary LO generator112that generates a primary LOPsignal114. During operation, the primary downconverter110down-converts the primary receive signal106using the primary LOP114to generate a primary baseband signal116that is input to a baseband processor118.

The secondary receiver104comprises a secondary downconverter120and a secondary LO generator122that generates a secondary LOSsignal124. During operation, the secondary downconverter120down-converts the secondary received signal108using the secondary LOSsignal124to generate a secondary baseband signal126that is input to a selector128.

The primary receiver102also comprises a supplemental downconverter130. The supplemental downconverter130receives the secondary receive signal108and down-converts this signal using the primary LOPsignal114to generate a supplemental secondary baseband signal132that also is input to the selector128. A controller134receives a mode control signal136from the baseband processor118and generates a select signal138that controls the selector128to select one of its inputs to pass to its output as a selected secondary baseband signal140. For example, the selector128may pass the secondary baseband signal126or the supplemental secondary baseband signal132to its output as the selected secondary baseband signal140based on the state of the select signal138.

The diversity receiver100provides multiple operating modes to allow a variety of signals to be received and processed. For example, at least the following three operating modes are supported by the diversity receiver100.1. Single receive mode—Only primary receiver102is activated to generate the primary baseband signal116using the primary LOPsignal114.2. Carrier aggregation mode—The primary receiver102is activated to generate the primary baseband signal116using the primary LOPsignal114and the secondary receiver104is activated to generate the secondary base band signal126using the secondary LOSsignal124. The secondary baseband signal126is passed to the baseband processor118as the selected secondary baseband signal140.3. Diversity mode—The primary receiver102is activated to generate the primary baseband signal116using the primary LOPsignal114and supplemental downconverter130is activated to generate the supplemental secondary baseband signal132using the primary LOPsignal114. The supplemental secondary baseband signal132is passed to the baseband processor118as the selected secondary baseband signal140.

When operating in diversity mode (mode 3 above), the primary LOPsignal114is shared between the primary downconverter110and the supplemental downconverter130. The supplemental downconverter130then generates the supplemental secondary baseband signal132that is input to the baseband processor118. This configuration results in reduce power consumption when compared to conventional receivers that transmit the primary LOPsignal114to the secondary receiver104for use by the secondary downconverter120. Thus, the novel diversity receiver100provides at least the following advantages over conventional receivers.1. Power savings from sharing the primary LOPsignal114with the supplemental downconverter130during diversity mode.2. Power savings from disabling selected functions of the secondary receiver not utilized during diversity mode.3. Improved noise performance by reducing the signal path of primary LOPsignal114during diversity mode.

Accordingly, in various exemplary embodiments described in greater detail below, a novel diversity receiver is disclosed herein that is configured to address the problems associated with conventional diversity receivers to reduce power consumption and improve performance.

FIG. 2shows a detailed exemplary embodiment of a novel diversity receiver200for use in a wireless device. The receiver200comprises a primary receiver202to receive a primary signal220and a secondary receiver204to receive a secondary signal228. The primary receiver202comprises a primary low noise amplifier (LNA)206, primary mixer208, primary baseband filter (BBF)210, primary frequency synthesizer212and primary frequency divider214. During operation, the primary LNA206receives the primary receive signal220and provides an amplified version of the primary receive signal to the primary mixer208. The primary frequency synthesizer212outputs a primary oscillator signal216that is used by the primary divider214to generate a primary LOPsignal218that is input to the primary mixer208. The primary mixer208down-converts the amplified primary receive signal to generate a primary down-converted signal that is input to the primary BBF210. The primary BBF210filters the down-converted signal to generate a primary baseband (BB) signal222that is input to other circuitry at the device, such as a baseband processor.

The secondary receiver204comprises a secondary low noise amplifier (LNA)230, secondary mixer232, secondary BBF234, secondary frequency synthesizer236, and second frequency divider238. During operation, the secondary LNA230receives the secondary receive signal228and provides an amplified version of the secondary receive signal to the secondary mixer232. The secondary frequency synthesizer236output a secondary oscillator signal240that is used by the secondary divider238to generate a secondary LOSsignal242that is input to the secondary mixer232. The secondary mixer232down-converts the amplified secondary receive signal to generate a secondary baseband signal254that is input to a selector252. The output of the selector252is input to the secondary BBF234, which filters the down-converted signal to generate a secondary BB signal246that is input to other circuitry at the device, such as a baseband processor.

The primary receiver202also comprises a supplemental mixer224. When operating in diversity mode (mode 3 above), the supplemental mixer224receives the amplified secondary receive signal244and the primary LOPsignal218and generates a supplemental secondary baseband signal226. For example, the primary LOPsignal218is shared between the primary208and supplemental224mixers, and thus the primary divider216is shared between the primary208and supplemental224mixers. The supplemental mixer224utilizes the primary LOPsignal218to down-convert the amplified secondary receive signal244to produce the supplemental secondary baseband signal226.

The supplemental secondary baseband signal226is input to the selector252located at the secondary receiver204. The selector252selects either the secondary baseband signal254or the supplemental secondary baseband signal226as input to the secondary BBF234based on a selection signal (S) generated from a controller248. Thus, the addition of the supplemental mixer224allows the use of a short transmission path for the primary LOPsignal218when operating in a diversity mode where the primary LOPsignal218is used to down-convert the amplified secondary receive signal244. The short signal path used to provide the LOPsignal218to the supplemental mixer224results in reduced power consumption in the diversity mode when compared to conventional diversity receivers.

Furthermore, additional power savings are achieved as a result of sharing the primary frequency divider214between the primary202and secondary receivers204. For example, in the exemplary receiver200the primary divider214outputs the shared LOPsignal218and therefore the secondary divider238and secondary mixer232can be placed in a low power standby mode for added power savings.

The controller248comprises hardware and/or hardware executing software and is configured to receive a mode control signal250from another entity at the device, such as a baseband processor. The controller248uses the mode control signal250to generate a select signal (S) and enable signals (en) that are configured to control various functional modules of the diversity receiver200. For example, a seventh enable signal (e7) enables or disables the supplemental mixer224. A second enable signal (e2) enables or disables the secondary mixer232. A fifth enable signal (e5) enables or disables the secondary frequency synthesizer236. The connection of other enable signals is further illustrated inFIG. 2. The select signal (S) is connected to the selector252and controls the selector252to select either the supplemental secondary baseband signal226from a supplemental mixer224or the secondary baseband signal254from the secondary mixer232as input to the BBF234.

During operation, the controller248determines which modules to enable and disable based on the mode control signal250. A module that is disabled is either turned off or placed in a low power mode thereby reducing power consumption of the diversity receiver200. The following enable (en) and select signal (S) settings are output from the controller248in each of the following modes.1. Single receive mode (Primary receiver202only)S—set to select either secondary mixer output254or supplemental mixer output226.(e1-e7)—set to disable associated functions2. Carrier Aggregation modeS—set to select secondary mixer output254(e1-e6)—set to enable associated functions(e7)—set to disable supplemental mixer2243. Diversity modeS—set to select supplemental mixer output226(e1, e4, e6, e7)—set to enable associated functions(e2, e3, e5)—set to disable associated functions

Therefore, in various exemplary embodiments, a novel diversity receiver200is provided to address the problems of power consumption associated with selected operating modes. In an exemplary embodiment, the diversity receiver200comprises the supplemental mixer224that is utilized during operation in diversity mode. The supplemental mixer224is located close to the primary receiver's frequency divider214to share the primary LOPsignal218with the primary mixer208. The close proximity of the supplemental mixer224to the primary divider216minimizes the transmission path of the primary LOPsignal218during diversity mode operation. By reducing the transmission path of the primary LOPsignal218, substantial power savings can be realized during diversity mode operation. For example, power savings are achieved as a result of sharing the primary divider214between the primary208and supplemental224mixers. Furthermore, the use of the supplemental mixer224allows unneeded modules (i.e., secondary divider238) at the secondary receiver204to be powered down to save additional power.

FIG. 3shows a detailed view300of the novel diversity receiver200shown inFIG. 2. The output of the primary frequency synthesizer (PRx Synth)212is the primary oscillator signal216that is input to the primary frequency divider214. The output of the primary divider214is the LOPsignal218that is shared between the primary mixer208and the supplemental mixer224. The output226of the supplemental mixer224is input to the selector252. Thus, the shared LOPsignal218of the novel diversity receiver200provides reduced power consumption over the conventional receivers since this signal travels over a very short signal path. Furthermore, additional power savings are achieved as a result of sharing the primary divider214between the primary208and supplemental224mixers so that the secondary divider238can be powered down.

FIG. 4shows an exemplary embodiment of a controller400. For example, the controller400is suitable for use as the controller248shown inFIG. 2. The controller400comprises processor402, selector interface404, and enabler406all coupled to communicate over bus408. It should be noted that the controller400is just one implementation and that other implementations are possible.

The selector interface404comprises hardware and/or hardware executing software that operates to allow the controller400to control the operation of the selector252. For example, the selector interface404outputs the selection signal (S) to comprise one or more bits which indicate which input to the selector252is to be output to the secondary BBF234. The selector interface404is controlled by communicating with the processor402using bus408.

The enabler406comprises hardware and/or hardware executing software that operates to allow the controller400to enable selected modules of the diversity receiver200. For example, the enabler406outputs “n” enable signals (e1-en) which enable or disable corresponding functional modules of the diversity receiver200. The enabler406is controlled by operation of the processor402using bus408.

The processor402comprises at least one of a CPU, processor, gate array, hardware logic, memory elements, and/or hardware executing software. The processor402operates to control the selector interface404and the enabler406to perform the functions described herein. For example, the processor402comprises an internal memory and executes instructions or codes stored or embodied in the internal memory to perform the functions described herein.

In an exemplary embodiment, the processor402receives the mode control signal250from a baseband processor or other entity and operates to control the selection interface404and enabler406based on the mode control signal250to generate the selection signal (S) and the enable signals (e1-en). For example, in an exemplary embodiment, the mode control signal250comprises two bits that are set to indicate one of four possible states and each state is associated with an operating mode. For example, the first three states (0, 1, 2) indicate the three modes described above, respectively. The fourth state (3) can be unused or indicate any desired fourth operating mode. In other exemplary embodiments, the mode control signal may have more or less bits to indicate more or less operating modes. In an exemplary embodiment, the mode control signal250is generated by a baseband processor at the device, but may also be generated by another controller or processor at the device that desires to set operation of the receiver200to a desired operating mode

FIG. 5shows an exemplary method500for operating a diversity receiver comprising a shared primary LO signal path in a diversity mode. For example, the method500is suitable for use by the receiver200shown inFIG. 2in conjunction with the controller500shown inFIG. 5. In an exemplary embodiment, the processor502executes one or more sets of codes or instructions stored or embodied in a memory to perform the functions described below.

At block502, a mode control signal is received. In an exemplary embodiment, the mode control signal250is received by the processor402of the controller400. The mode control signal250is received from an entity at a device, such as a baseband processor. The mode control signal250indicates an operating mode for the diversity receiver200.

At block504, a primary mixer is enabled to down-convert a primary receive signal using a primary local oscillator. In an exemplary embodiment, the primary mixer208down-converts the primary receive signal220using the LOPsignal218.

At block506, an operating mode determination is made. For example, the processor402processes the mode control signal250to determine the operating mode for the diversity receiver200. A first operating mode is a single receive mode, a second operating mode is a carrier aggregation mode, and a third operating mode is a diversity mode. In an exemplary embodiment, if the mode control signal250indicates the single receive mode, the method proceeds to block508. If the mode control signal250indicates the carrier aggregation mode the method proceeds to block512, and if the mode control signal250indicated the diversity mode, the method proceeds to block518.

Single Receive Mode

If the determination at block506is to enable single receive mode the method continues at block508. At block508, the supplemental mixer224is disabled. In an exemplary embodiment, the processor402controls the enabler406to output the e7enable signal to disable the supplemental mixer224.

At block510, selected secondary receiver functions are disabled to save power. In an exemplary embodiment, the processor402controls the enabler406to output the following enable (en) signals to disable the following functional modules of the receiver200.1. e1set to disable secondary LNA2302. e2set to disable secondary mixer2323. e3set to disable secondary divider2384. e4set to disable secondary BBF2345. e5set to disable secondary frequency synthesizer2366. e6set to disable the selector252

The above settings enable only the primary receiver202to operate in single receive mode. The method500then ends.

Carrier Aggregation Mode

If the determination at block506is to enable carrier aggregation mode the method continues at block512. At block512, the secondary mixer232is enabled to down-convert the amplified secondary receive signal244using the secondary local oscillator signal LOS242. For example, the processor402controls the enabler406to output the following enable (en) signals to enable the following functional modules of the receiver200.1. e1set to enable secondary LNA2302. e2set to enable secondary mixer2323. e3set to enable secondary divider2384. e4set to enable secondary BBF2345. e5set to enable secondary frequency synthesizer236

At block514, the selector252is set to select the secondary baseband signal254as input to the secondary BBF234. For example, the processor402controls the selector interface404to output the selection signal (S) to control the selector252to select the secondary baseband signal254as input to the secondary BBF234. The processor402also controls the enabler406to output e6enable signal to enable the selector252.

At block516, the supplemental mixer224is disabled. In an exemplary embodiment, the processor402controls the enabler406to set the enable signal e7to disable the supplemental mixer224. The method500then ends.

Diversity Mode

If the determination at block506is to enable diversity mode the method continues at block518. At block518, the supplemental mixer224is enabled to down-convert the amplified secondary receive signal244using the primary local oscillator LOP218. For example, the processor402controls the enabler406to output the e7enable signal to enable the supplemental mixer224.

At block520, the selector252is set to select the supplemental secondary baseband signal226as input to the secondary BBF234. For example, the processor402controls the selector interface404to output the selection signal (S) to control the selector252to select the output226of the supplemental down-converter224as input to the secondary BBF234. The processor402also controls the enabler406to output e6enable signal to enable the selector252.

At block522, selected secondary receiver functions are disabled to save power. In an exemplary embodiment, the processor402controls the enabler406to output the following enable (en) signals to enable/disable the following functional modules of the receiver200.1. e1set to enable secondary LNA2302. e2set to disable secondary mixer2323. e3set to disable secondary divider2384. e4set to enable secondary BBF2345. e5set to disable secondary frequency synthesizer236

The above settings enable the primary receiver202and the secondary receiver204to operate in diversity mode. The method500then ends.

Therefore, the method500provides operation of a diversity receiver to share the primary LOPsignal218when operating in a diversity mode thereby saving power when compared to conventional diversity receivers. It should be noted that the method500is just one implementation and that the operations of the method500may be rearranged or otherwise modified such that other implementations are possible.

FIG. 6shows an exemplary embodiment of a novel diversity receiver600having secondary202and tertiary602receivers that share a primary oscillator signal for reduced power consumption. The receiver600illustrates how the diversity receiver200shown inFIG. 2can be expanded to include a plurality of additional receivers that are configured to share the primary LOPsignal218.

The tertiary receiver602is configured similarly to the secondary receiver202. Thus, tertiary receiver602operates to receive a tertiary receive signal and amplify this signal using an LNA604. The LNA604outputs an amplified tertiary receive signal RxT606that is input to a second supplemental mixer610located at the primary receiver202. The second supplemental mixer610is configured to share the primary LOPsignal218with the primary mixer208and the first supplemental mixer224. The second supplemental mixer610receives the amplified tertiary receive signal RxT606and down-converts this signal using the shared primary LOPsignal218to generate a tertiary BB signal (BBT)608. The BBTsignal608is input to a tertiary selector612.

The controller248is configured to output a selector signal SSto the secondary receiver204and to output selector signal STto the tertiary receiver602. The controller248is also configured to output enable signals eP, eS, and eT, which are used to enable and disable various functional modules of each receiver depending of the state of the mode signal250to reduce power consumption. For clarity, the connections of the eP, eS, and eTsignals to each receiver are shown generally, however, the connections are in accordance with previously described embodiments shown above.

During operation, the controller248determines a particular operating mode from the mode signal250, and based on this mode the secondary204and tertiary602receivers are configured for operation by the controller248using the enable and selection signals. For example, the controller248outputs the enable signals eP, eS, and eTand the selection signals SSand STin accordance with the selected operating mode. For example, in an exemplary embodiment, the diversity mode describe with respect to the method600shown inFIG. 6can be modified to utilize the tertiary receiver602instead of the secondary receiver204. In this configuration, the functional modules of the secondary receiver may be disabled to save power.

In an exemplary embodiment, the receiver600comprising one or more receivers (i.e., similar to receiver602) having one or more additional mixers and configured to down-convert one or more additional received signals, respectively. The primary receiver is further configured to have one or more additional supplemental mixers (i.e., similar to mixer610) configured to down-convert the one or more additional received signals, respectively, the primary mixer and the one or more additional supplemental mixers configured to share the primary local oscillator (LO) signal (i.e., LOP218). The controller is further configured to disable selected additional mixers and to enable corresponding selected additional supplemental mixers to down-convert selected additional received signals based on a selected operating mode determined from the mode control signal250.

Thus, as illustrated byFIG. 6, the diversity receiver200can be expanded to include any number of additional receivers and these receivers can share the primary LOP218to reduce power consumption.

FIG. 7shows an exemplary embodiment of a diversity receiver apparatus700. For example, the apparatus700is suitable for use as the diversity receiver200shown inFIG. 2. In an aspect, the apparatus700is implemented by one or more modules configured to provide the functions as described herein. For example, in an aspect, each module comprises hardware and/or hardware executing software.

The apparatus700comprises a first module comprising means (702) for down-converting a primary signal using a primary local oscillator, the primary signal received by a primary receiver, which in an aspect comprises the primary mixer208.

The apparatus700also comprises a second module comprising means (704) for down-converting a secondary signal using the primary local oscillator to produce a supplemental down-converted signal, the secondary signal received by a secondary receiver, which in an aspect comprises the supplemental mixer224.

The apparatus700also comprises a third module comprising means (706) for disabling a secondary mixer that is associated with the secondary receiver, which in an aspect comprises the controller248.

Those of skill in the art would understand that information and signals may be represented or processed using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the above description may be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof. It is further noted that transistor types and technologies may be substituted, rearranged or otherwise modified to achieve the same results. For example, circuits shown utilizing PMOS transistors may be modified to use NMOS transistors and vice versa. Thus, the amplifiers disclosed herein may be realized using a variety of transistor types and technologies and are not limited to those transistor types and technologies illustrated in the Drawings. For example, transistors types such as BJT, GaAs, MOSFET or any other transistor technology may be used.