Managing the operation of a semiconductor device under varying load conditions

A system for managing the operation of a semiconductor device in accordance with varying load conditions that affect the power being dissipated by the semiconductor device, includes a sensor for measuring a temperature related to the junction temperature of an operating semiconductor device; electronic components for measuring the real-time operating load conditions of the operating semiconductor device; and a computer that is adapted by computer executable program instructions to perform the steps of:

BACKGROUND OF THE INVENTION

The present invention pertains to managing the operation of a semiconductor device under varying load conditions that affect the power being dissipated by the semiconductor device.

The power dissipated by a semiconductor device is dissipated as heat, which causes the temperature of the semiconductor device to rise. After prolonged continuous usage, the temperature of an operating semiconductor device, such as a power amplifier, may rise to such an extent that the semiconductor device overheats and fails. In order to prevent such failure, the operation of the semiconductor device is managed by determining the junction temperature of the semiconductor device and cutting back or interrupting the operation of the semiconductor device when the junction temperature reaches a specified maximum attainable junction temperature (TJMAX) for the semiconductor device. The junction temperature is the temperature at the junction of the output transistor of the semiconductor device.

Typically a temperature related to the junction temperature of the semiconductor device is measured by a temperature sensor disposed on the case of the semiconductor device. While such a measurement provides an approximate measurement of the junction temperature, the difference between the temperature of the case at the location of the temperature sensor and the actual junction temperature varies under varying operating conditions of the semiconductor device because such difference is affected by the power dissipation of the semiconductor device.

For semiconductor devices, such as radio frequency (RF) power amplifiers that experience varying load (antenna) conditions, it is desirable to use a semiconductor device that has a specified maximum attainable junction temperature (TJMAX) that guarantees safe operating temperatures for high power-dissipation loads. However, because TJMAXis specified as an absolute maximum by the semiconductor manufacturer, the sensor temperature cutback threshold (TCB) must be overly conservative to account for the worst case power dissipation conditions which vary as the load changes for static thermal management implementations.

Also, since power dissipation is estimated to be the difference between the power supplied to the semiconductor device and the power delivered by the semiconductor device to the load, it is difficult to quantify power dissipation for non-sinusoidal time-varying signals, modulated signals, and loads that cause reflected power at high frequencies.

SUMMARY OF THE INVENTION

The present invention provides a method of managing the operation of a semiconductor device in accordance with varying load conditions that affect the power being dissipated by the semiconductor device, comprising the steps of:

(a) measuring a temperature related to the junction temperature of an operating semiconductor device;

(b) measuring the real-time operating load conditions of the operating semiconductor device;

(c) determining the power being dissipated by the operating semiconductor device in accordance with the measured real-time operating load conditions of the semiconductor device;

(d) determining a dynamic temperature cutback threshold for the operating semiconductor device in accordance with the determination of the power being dissipated; and

(e) managing the operation of the semiconductor device in accordance with the measured temperature and the dynamic temperature cutback threshold.

The present invention additionally provides a system for performing the above-described method and computer readable storage media including computer executable program instructions for causing one or more computers to perform and/or enable the steps of the respective above-described method.

Additional features of the present invention are described with reference to the detailed description of the preferred embodiments.

DETAILED DESCRIPTION

Referring toFIG. 1, an exemplary embodiment of a system according to the present invention includes a temperature sensor10, a DC voltage sensor11, an input current sensor12, a directional coupler14, a first envelope detector15, a second envelope detector16, a first RMS converter17, a second RMS converter19, a set of analog-to-digital converters (ADC)20,21,22,24,25,26and a computer27. This exemplary embodiment manages the operation of a semiconductor device30, such as an RF power amplifier, that is providing power to a load31, such as an antenna.

The temperature sensor10is coupled to the case of the semiconductor device30for measuring a temperature related to the junction temperature of the semiconductor device30. In some embodiments, the temperature sensor10is mounted on the case of semiconductor device. In other embodiments the temperature sensor10is mounted adjacent the case of the semiconductor device30on a common heatsink.

The DC voltage sensor11and the input current sensor12are coupled to a circuit that supplies power to the semiconductor device30.

The directional coupler14is connected between the output of the semiconductor device30and the input of the load31for providing scaled samples of the forward and reflected power.

The first envelope detector15is coupled between the output of the directional coupler14and the input of the load31for measuring the peak power reflected back to the semiconductor device30from the load31.

The second envelope detector16is coupled between the output of the directional coupler14and the input of the load31for measuring the peak forward power from the semiconductor device30to the load31.

The first RMS converter17is coupled to the output of the second peak power detector16for measuring the average forward power from the semiconductor device30to the load31. Some of the available integrated circuit technologies enable the peak forward power and average forward power measurements to be combined into one function.

The second RMS converter19is coupled to the output of the input current sensor12for measuring the RMS current supplied to the semiconductor device30.

A first ADC20is connected to the first envelope detector15for converting an analog output signal from the first envelope detector15to a digital signal PPK-RFLrepresentative of the peak power reflected back to the semiconductor device30from the load31.

A second ADC21is connected to the second envelope detector16for converting an analog output signal from the second envelope detector16to a digital signal PPK-FWDrepresentative of the peak forward power from the semiconductor device30to the load31.

A third ADC22is connected to the first RMS converter17for converting an analog output signal from the first RMS converter17to a digital signal PAV-FWDrepresentative of the average forward power from the semiconductor device30to the load31.

A fourth ADC24is connected to the second RMS converter19for converting an analog output signal from the second RMS converter19to a digital signal IDCrepresentative of the RMS current supplied to the semiconductor device30.

A fifth ADC25is connected to the DC voltage sensor11for converting an analog output signal from the DC voltage sensor11to a digital signal VDCrepresentative of the DC voltage supplied to the semiconductor device30.

A sixth ADC26is connected to the temperature sensor10for converting an analog output signal from the temperature sensor10to a digital signal TMEASrepresentative of the measured junction temperature of the semiconductor device30.

The computer27contains computer readable storage media that includes computer executable program instructions for causing the computer27to execute the routines (processing functions) of the computer27that are described herein. These instructions are stored in computer readable storage media of the computer when the computer is manufactured and/or upon being downloaded via the Internet or from portable computer readable storage media containing such instructions. The computer27may be embodied in a combination of physically discrete computers, with the routines described herein being executed by the combination of discrete computers.

The computer27processes the digital signals PPK-RFL, PPK-FWD, PAV-FWD, IDC, VDC, TMEAS, which are representative of the operating load conditions and the measured junction temperature of the semiconductor device30, to manage the operation of the semiconductor device30, as shown in more detail inFIGS. 2,3,4and5.

Referring toFIG. 2, the computer27processes the digital signals PPK-RFL, PPK-FWD, PAV-FWD, IDC, VDC, to determine the power being dissipated PDISPby the operating semiconductor device30, as shown at34.

The computer27then processes a signal representative of the dissipated power PDISPto determine a dynamic temperature cutback threshold TCBfor the operating semiconductor device30, as shown at35.

The computer27processes the digital signal TMEASand the dynamic temperature cutback threshold TCBto manage the operation of the operating semiconductor device30, as shown at36.

Referring toFIG. 3, the computer27processes the digital signal PPK-FWDrepresentative of the measured peak forward power from the semiconductor device30to the load31with the digital signal PAV-FWDrepresentative of the measured average forward power from the semiconductor device30to the load31to determine the peak-to-average forward power ratio (PPK-FWD)/(PAV-FWD), as shown at38.

The computer27then processes the peak-to-average forward power ratio (PPK-FWD)/(PAV-FWD) with the digital signal PPK-RFLrepresentative of the peak power reflected back to the semiconductor device30from the load31to determine the average reflected power PRFL, as shown at39.

The computer27then processes the average reflected power PRFLwith the digital signal PAV-FWDrepresentative of the measured average forward power from the semiconductor device30to the load31to determine the output power (PFWD-PRFL)/ILFACTORbeing delivered from the semiconductor device30, as shown at40. ILFACTORis the insertion loss from the semiconductor device30to the load31.

The computer27processes the digital signal IDCrepresentative of the RMS current being supplied to the semiconductor device30together with the signal VDCrepresentative of the voltage being supplied to the semiconductor device30to measure the power (VDC)/(IDC) being supplied to the semiconductor device30, as shown at41.

The computer27processes a signal (PFWD-PRFL)/ILFACTORrepresentative of the output power being delivered from the semiconductor device with a signal (VDC)/(IDC) representative of the measured power (VDC)/(IDC) being supplied to the semiconductor device to determine the power being dissipated by the semiconductor device30, in accordance with the equation,
PDISP=(VDC)(IDC)−{(PFWD−PRFL)/ILFACTOR}  [Eq. 1]
as shown at42.

Referring toFIG. 4, the computer27then processes a signal PDISPrepresentative of the power being dissipated by the semiconductor device30with a signal representative of the specified thermal resistance Rθ(J-C)from the semiconductor junction to the case of the semiconductor device30, a signal representative of the specified thermal resistance Rθ(C-S)from the case of the semiconductor device30to the temperature sensor10, and a signal TJMAXrepresentative of the specified maximum attainable junction temperature of the semiconductor device30to determine the dynamic temperature cutback threshold TCBin accordance with:
TCB=TJMAX−{PDISP}{Rθ(J-C)}−{PDISP}{Rθ(C-S)}  [Eq. 2]

This determination of the dynamic temperature cutback threshold TCBcompensates for variations in the difference between the temperature measured by the temperature sensor10and the actual junction temperature that are caused by the physical separation of the junction from the temperature sensor10, the particular temperature sensor mounting technique and variations in the power dissipation of the semiconductor device30under varying operating conditions, such as waveform, frequency and load variations.

This temperature difference is a function of the power currently being dissipated PDISPby the semiconductor device and both a thermal resistance Rθ(J-C)that exists between the junction of the semiconductor device30and the case of the semiconductor device30and a thermal resistance Rθ(C-S)that exists between the case of the semiconductor device30and the temperature sensor10. As the dissipated power increases the difference between the measured junction temperature and the actual junction temperature also increases.

The thermal resistance Rθ(C-S)is a constant specified by the manufacturer of the semiconductor device30.

The thermal resistance Rθ(C-S)is a constant specified for the particular mounting of the temperature sensor10in relation to the semiconductor device30. In some embodiments the temperature sensor10is mounted on the semiconductor device and in other embodiments the temperature sensor10is mounted adjacent the case of the semiconductor device30on a common heatsink.

FIG. 5is a flow diagram for management of the semiconductor operation by the computer27in accordance with the measured temperature TMEASof the semiconductor device30and the dynamic temperature cutback threshold TCB.

There are five modes of operation, as shown in the flow diagram. These modes of operation are described in a generic sense, because the semiconductor management operation described herein can be used for semiconductor devices other than those included in a power amplifier.

In the Idle mode, no power is applied to the semiconductor device30. During this mode, measurements of the following six variables are taken as described above, but not processed by the computer27: (1) the peak power reflected back to the semiconductor device30from the load31, (2) the peak forward power from the semiconductor device30to the load31, (3) the average forward power from the semiconductor device30to the load31, (4) the RMS current supplied to the semiconductor device30, (5) the DC voltage supplied to the semiconductor device30, and (6) the junction temperature of the semiconductor device30.

In the Full Power mode, maximum power is applied to the semiconductor device30; measurements of the above described six variables are taken periodically; and the digital signals PPK-RFL, PPK-FWD, PAV-FWD, IDC, TMEASprovided by the set of ADC's20,21,22,24,25,26are processed by the computer27.

In the Set Cutback mode, maximum power is applied to the semiconductor device30, and the dynamic temperature cutback threshold TCBis updated by the computer27in accordance with Equation 2.

In the Cutback mode, which is initiated when the measured junction temperature TMEASexceeds the dynamic temperature cutback threshold TCB, the power supplied to the semiconductor device30is reduced, and the dynamic temperature cutback threshold TCBis updated by the computer27in accordance with Equation 2.

In the Failsafe mode, power is not supplied to the semiconductor device30.

With reference to the flow diagram, TCBis the current dynamic cutback temperature threshold; Tnormis the temperature threshold to return to the normal Full Power mode of operation; Tfaultis the temperature threshold for cutting off the power supplied to the semiconductor device30; TΔrecis a temperature change (decrease) required to return to the normal Full Power mode of operation; and tsettleis the settling time allowed after a power level adjustment.

In the flow diagram, temperature thresholds are denoted by Tsub(default), where T represents a temperature value,subis the subscript defining the specific threshold, and the(default)field represents a qualifier that denotes an initialization value. Variables without the(default)qualifier represent current values instead of initialization values. For example, Twarn(default)denotes the initialization value of the warning temperature threshold, while Twarndenotes the current value of the warning temperature threshold. The delay value tsettleis used to allow for a settling time after a power level is changed in order to ignore any small transients caused by the power level changing.

Referring to the flow diagram, the management operation starts running in the Idle mode. In this mode the default settings are entered for the warning Twarn, fault Tfault, and normal Tnormtemperature thresholds. At this time the settling time tsettleis initialized as well as the mode of operation. When power is initially applied to the semiconductor device30, the Full Power mode commences and the temperature thresholds and the settling time are reinitialized. All possible modes can return to the Idle mode by user intervention (not shown).

During the Full Power mode, the computer27ignores the digital signals PPK-RFL, PPK-FWD, PAV-FWD, IDC, VDC, TMEASprovided by the set of ADC's until a settling time has passed tsettle. After the system has stabilized, the dynamic cutback temperature threshold TCBis determined in accordance with Equation 2. If the current dynamic cutback temperature threshold TCBis less than the warning cutback temperature Twarn, the warning cutback temperature is set to the newly calculated dynamic cutback temperature threshold TCB. The computer27then determines if the measured sensor temperature TMEASexceeds the warning cutback temperature Twarn. If this is the case, the power supplied to the semiconductor device30is reduced, and the management operation enters the Cutback mode. If the measured sensor temperature TMEAShas not exceeded the warning temperature the warning threshold is updated until the management operation either returns to the Idle mode or enters the In Cutback mode. It is important to note that the dynamic cutback temperature threshold TCBis degraded during an iteration of the management operation only when it is necessary to do so in order to prevent thermal runaway or repetitive stresses from incrementally damaging the semiconductor device30.

Upon entering the Cutback mode the settling time is reinitialized to allow any transients from the power cutback to pass prior to beginning to update the fault threshold. The Cutback mode of management operation is similar to that of the Full Power mode, with the exception that the fault threshold Tfaultis updated with the current dynamic cutback temperature threshold TCB. Should the measured sensor temperature TMEASexceed the fault threshold, the management operation will enter the Failsafe mode in which power is removed from the semiconductor device30and then return to the Idle mode.

Although not shown in the flow diagram, the management operation returns to a previous Full Power mode when the normal temperature threshold (Tnorm) is reached. The normal temperature threshold is based on the current dynamic cutback temperature threshold TCBminus an offset TΔrec. Accordingly, if a transient event causes the semiconductor device30to dissipate such an amount of power in a short period of time as to cause a cutback, the management operation can recover should the measured junction temperature TMEASdecrease below the normal threshold Tnorm. In this situation the management operation can begin to provide full power to the semiconductor device30, but the lower temperature cutback threshold TCBis retained.

Regarding the method claims, except for those steps that can only occur in the sequence in which they are recited, and except for those steps for which the occurrence of a given sequence is specifically recited or must be inferred, the steps of the method claims do not have to occur in the sequence in which they are recited.

The benefits specifically stated herein do not necessarily apply to every conceivable embodiment of the present invention. Further, such stated benefits of the present invention are only examples and should not be construed as the only benefits of the present invention.

While the above description contains many specificities, these should not be construed as limitations on the scope of the present invention, but rather as examples of the preferred embodiments described herein. Other variations are possible and the scope of the present invention should be determined not by the embodiments described herein but rather by the claims and their legal equivalents.