Hysteresis comparator circuit

An input voltage is applied to an inverting input terminal of a comparator having no hysteresis. A first constant voltage is divided by resistors to create a reference voltage. The reference voltage is applied to a non-inverting input terminal of the comparator through a resistor. Only while an output voltage of the comparator is a low level, a predetermined constant current is supplied to a supply point of the reference voltage and a constant current of the same magnitude is absorbed from the non-inverting input terminal of the comparator.

CROSS REFERENCE TO RELATED APPLICATION

This application is based on and incorporates herein by reference Japanese Patent Application No. 2004-18393 filed on Jan. 27, 2004.

FIELD OF THE INVENTION

The present invention relates to a comparator circuit having hysteresis, and more specifically, to a circuit that is configured to allow independent and easy setting of a threshold voltage for an input voltage at which its output is reversed and a hysteresis width.

BACKGROUND OF THE INVENTION

A comparator circuit compares an input voltage applied to its one input terminal with a reference voltage applied to its other input terminal and outputs a signal that depends on the comparison result.

In this comparator circuit, when a noise is mixed in the input voltage and the noise brings the input voltage to reach the reference voltage, the output will change frequently by that noise. In order to avoid such an unsatisfactory operation, the comparator is often provided with a hysteresis characteristic in its input and output characteristics, as disclosed in JP 2003-179468A or JP 2003-8408A.

FIG. 13is an example of a comparator circuit (hysteresis comparator circuit)1that is provided with a hysteresis characteristic by adding resistors R1, R2and R3and a transistor Tr1to the comparator Q1having no hysteresis. In this hysteresis comparator circuit1, in the case where the input voltage Vin is increased from 0V, equal to a reference potential GND, while the value of the input voltage Vin is lower than a reference voltage Vref that is set by dividing a constant voltage Vd with resistors R1and R2, the output voltage Vout remains at a “Low” level (for example, 0V). During this period, the transistor Tr1is in an OFF state; the input voltage of an inverting input terminal of the comparator Q1is equal to the reference voltage Vref, whose value is given by Vd×R2/(R1+R2).

When the value of the input voltage Vin increases to the reference voltage Vref, the output voltage Vout will turn from the “Low” (L) level to the “High” (H) level (for example, 5V). The value of the input voltage when the output of the comparator turns from the L level to the H level with increasing input voltage in this way is designated as a H-side threshold VthH. The value of the H-side threshold VthH of the hysteresis comparator circuit1is Vd×R2/(R1+R2).

When the transistor Tr1becomes an ON state, the value of the reference voltage Vref will be Vd×R2×R3/(R1×R2+R2×R3+R3×R1), assuming that an ON resistance of the transistor Tr1is low. Conversely, in the case where the value of the input voltage Vin is decreased from a sufficiently high value, when the input voltage Vin becomes lower than the reference voltage Vref at the time of the ON state of this transistor Tr1, the output voltage Vout of the comparator Q1will turn from the H level to the L level.

The value of the input voltage when the output of the comparator turns from the H level to the L level in the case where the input voltage Vin is decreased from a sufficiently high voltage in this way is designated as a L-side threshold VthL. The value of the L-side threshold VthL of the hysteresis comparator circuit1is equal to the reference voltage Vref when the transistor Tr1described above is in the ON state and the value is smaller than the H-side threshold VthH.

From the above operations, the input-output characteristic of the hysteresis comparator circuit1becomes the one shown inFIG. 15. The difference [VthH−VthL] between the two input voltages at which the output turns from the H level to the L level and vice versa, respectively, is the hysteresis width.

Since the hysteresis comparator circuit1shown inFIG. 13performs operations described above, the H-side threshold VthH, the L-side threshold VthL, and the hysteresis width that is a difference between the two thresholds can be set to desired values by adjusting the resistances of the resistors R1, R2and R3, provided that the value of the constant voltage Vd is determined in advance.

The hysteresis comparator circuit1is a circuit used in the case where the input voltage Vin is designed to be converted to a binary signal by comparing it with the reference voltage Vref. However, there is a case where the magnitude of the input voltage Vin is designed to be determined by comparing it with two or more reference voltages Vref2, Vref3and the like. In such a case, it is possible to perform the determination by providing a necessary number of the hysteresis comparator circuits1shown inFIG. 13independently and adjusting the reference voltages of the circuits to be Vref2, Vref3and the like.

However, as many voltage divider circuits, each including the resistors R1and R2, as the number of circuits are needed in such a case. As a result, a load current of a constant voltage source for supplying the constant voltage Vd increases. In order to prevent it, enlarging the resistances of the resistors R1and R2is conceivable. However, in that case, the area of a pattern increases in implementing the circuit in an IC, and further introduces inconvenience that the accuracy of each resistance becomes worse.

As another measure, for example in the case of converting the input voltage into three values, it is also possible to create two reference voltages Vref2and Vref3with one voltage divider circuit including three resistors R4, R5and R6as shown inFIG. 14, prepare two hysteresis comparator circuits2and3that use them as reference voltages, and make determination. When such a configuration is adopted, only one voltage divider circuit can do even in the case where further more reference voltages are required; therefore, it is not necessary to increase the load current of the voltage source for supplying the constant voltage Vd.

However, in the case of the two hysteresis comparator circuits shown in thisFIG. 14, when the input voltage Vin increases from 0V to exceed the reference voltage Vref2that is the H-side threshold VthH of the hysteresis comparator circuit2, the transistor Tr2will turn to the ON state, and a current will flow in the resistor R7. Then, the value of the reference voltage Vref3will change from the value determined by a voltage division ratio by the resistors R4, R5and R6.

This indicates that, in the case where the value of the H-side threshold VthH of the hysteresis comparator circuit3is designed to be set to a desired value, it is insufficient to consider only the resistances of the resistors R4, R5and R6, and the resistance of the resistor R7used in the hysteresis comparator circuit2connected in parallel must be considered as well. The same applies to setting of the L-side threshold VthL of the hysteresis comparator circuit3and setting of the L-side threshold VthL of the hysteresis comparator circuit2.

Thus, assuming that the resistances of resistors in other hysteresis comparator circuit connected to a common voltage divider circuit must also be considered when setting the values of the H-side threshold VthH and the L-side threshold VthL, adjustment of the resistances of voltage dividing resistors will be extremely complicated. Its complexity increases remarkably as hysteresis comparator circuits connected to the common voltage divider circuit increase in number.

Moreover, according to this method, when there occurs a need to alter a threshold voltage of any one of hysteresis comparator circuits after the resistances of the voltage dividing resistors are determined, the resistances of all the voltage dividing resistors need be adjusted again.

SUMMARY OF THE INVENTION

The present invention is made in order to solve such technical insufficiency of the prior art. The object of the present invention is to provide a hysteresis comparator circuit that can create a plurality of reference voltages necessary for a plurality of hysteresis comparator circuits and allow independent and easy setting of a H-side threshold VthH and a L-side threshold VthH and a hysteresis width that is a difference of these thresholds, even in a case where a plurality of hysteresis comparator circuits are needed in order to convert an input voltage into a multi-level value.

The hysteresis comparator of this invention is constructed so that an input impedance of a comparator when considered from the side of an interconnection point of two resistors for voltage division may become infinite. For this reason, when the value of a constant voltage applied to the voltage dividing resistors is determined in advance, a value of a H-side threshold VthH can be set to a desired value only by adjusting resistances of the voltage dividing resistors without considering circuit constants other than the resistances of these voltage dividing resistors.

Moreover, the hysteresis width can be set to a desired value only by adjusting the resistance of another resistor and current values of first and second constant current source circuits without considering the resistances of the voltage dividing resistors. Thus, the H-side threshold VthH, the hysteresis width, and accordingly the L-side threshold VthL can easily be set independently.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

As shown inFIG. 1, a hysteresis comparator circuit4of a first embodiment is constructed with a comparator Q4, a resistor (first resistor) R11, a resistor (second resistor) R12, a resistor (third resistor) R13, a first constant current circuit9and a second constant current circuit10.

The resistors R11and R12are connected in series between a potential reference line5connected to the reference potential GND (ground) and a first power line6for supplying a first constant voltage Vd applied from the outside, with the resistor R11connected to the first power line6. The resistor R13is connected between the interconnection point7of the resistors R11and R12and a non-inverting input terminal (+) of the comparator Q4. An input voltage Vin is applied to the inverting input terminal (−) of the comparator Q4.

The comparator Q4outputs a H-level voltage (for example, 5V) when a voltage applied to the non-inverting input terminal is equal to or more than a voltage applied to the inverting input terminal, and outputs a L-level voltage (for example, 0V) when the above condition is not satisfied. The comparator Q4is a comparator having no hysteresis and very high input impedance. In the description below, the comparator Q4will be treated as a comparator with infinite input impedance.

The first constant current source circuit9is connected between the interconnection point7and a second power line8for supplying a second constant voltage Vdd. The first constant current source circuit9includes a constant current source CS1and an analog switch SW1. Only while the output voltage Vout of the comparator Q4is the L level, the analog switch SW1becomes conductive, which enables a constant current Ia outputted by the constant current source CS1to be supplied to the interconnection point7.

A second constant current source circuit10is connected between the non-inverting input terminal of the comparator Q4and the potential reference line5. The second constant current source circuit10includes a series circuit of a constant current source CS2and an analog switch SW2. Only while the output voltage Vout of the comparator Q4is the L level, the analog switch SW2becomes conductive, which allows the constant current source CS2to absorb the constant current Ia from the non-inverting input terminal. The constant currents supplied (or absorbed) by the constant current source CS1and the constant current source CS2are an equal value Ia.

Next, operations of the hysteresis comparator circuit4ofFIG. 1configured in this way will be described. First, a case where the value of an input voltage Vin is increased from 0V equal to the reference potential GND will be described. When the input voltage Vin is sufficiently low, the output voltage Vout of the comparator Q4is the H level. At this time, since both of the analog switches SW1and SW2are in the OFF state, no current is supplied to the interconnection point7and no current is absorbed from the non-inverting input terminal either. A current flowing in the resistor R13is zero, and the input impedance of the comparator Q4when considered from the side of the interconnection point7is infinite.

In this state, the input voltage Vin supplied to the non-inverting input terminal of the comparator Q4is equal to the voltage of the interconnection point7. The voltage value is a constant value calculated by dividing the first constant voltage Vd by the resistors R11and R12, i.e., Vd×R12/(R11+R12). Hereinafter, this voltage value will be defined as a reference voltage Vref. The above operation state continues immediately before the value of the input voltage increases to reach the reference voltage Vref.

When the input voltage Vin increases to exceed the reference voltage Vref even slightly, the output voltage Vout of the comparator Q4will turn from the H level to the L level. Then, both of the analog switches SW1and SW2will turn to the ON state. The constant current Ia will be supplied to the interconnection point7from the first constant current source circuit9. The constant current Ia will be absorbed by the second constant current source circuit10from the non-inverting input terminal of the comparator Q4. The constant current Ia flows in the resistor R13toward the non-inverting input terminal.

In this state, since all of the constant current Ia supplied from the first constant current source circuit9will be absorbed by the second constant current source circuit10through the resistor R13, no change will occur in the current flowing in the resistors R11and R12. Therefore, no change occurs in the voltage of the interconnection point7, the voltage remaining at the reference voltage Vref. The input impedance of the comparator Q4when considered from the side of the interconnection point7remains infinite.

While the output voltage Vout of the comparator Q4is the L level, the applied voltage to the non-inverting input terminal is a constant value, [Vref−R13×Ia]. When the value of the input voltage Vin exceeds the reference voltage Vref and after that, as long as the input voltage Vin exceeds this constant value [Vref−R13×Ia] even slightly, the output voltage Vout remains at the L level.

Next, operations in the case where the input voltage Vin is decreased from a high voltage will be described. When the input voltage Vin is sufficiently high, the output voltage Vout is the L level, the analog switches SW1and SW2are in the ON state. Accordingly the input voltage supplied to the non-inverting input terminal has become [Vref−R13×Ia]. When the input voltage Vin decreases to be lower than [Vref−R13×Ia] even slightly, the output voltage Vout will turn from the L level to the H level. Then, the analog switches SW1and SW2will turn to the OFF state, and the input voltage supplied to the non-inverting input terminal will return to the reference voltage Vref. After that, as long as the voltage Vin is lower than this reference voltage Vref even slightly, the output voltage Vout remains at the H level.

Summarizing the above operations, a relationship between the input voltage Vin and the output voltage Vout of the hysteresis comparator circuit4shown inFIG. 1becomes the one shown inFIG. 15, which indicates that it operates as a comparator having hysteresis. The voltage at the interconnection point7remains at the reference voltage Vref, regardless of whether the output voltage Vout of the comparator Q4is the H level or the L level. The input impedance of the comparator Q4when considered from the side of the interconnection point7is always infinite, regardless of the level of the output voltage Vout. The value of the H-side threshold VthH is equal to Vd×R12/(R11+R12) that is the reference voltage Vref, and the value of the L-side threshold VthL is [Vref−R13×Ia]. The hysteresis width is R13×Ia.

Since the H-side threshold VthH becomes the reference voltage Vref, in the case where the value of the first constant voltage Vd is determined in advance, the value of the H-side threshold VthH can be set to a desired value only by adjusting the resistances of the resistors R11and R12without considering circuit constants other than the resistors R11and R12.

Since the hysteresis width can be calculated by an expression of R13×Ia, it can be set to a desired value only by adjusting the resistance of the resistor R13and the current values Ia of the first and second constant current source circuits9and10without considering the resistances of the resistors R11and R12. Thus, the hysteresis comparator circuit4of this embodiment achieves an advantage that the H-side threshold VthH and the hysteresis width. Accordingly the value of the L-side threshold VthL can easily be set independently.

Moreover, since the input impedance of the comparator Q4when considered from the side of the interconnection point7becomes always infinite, construction of a circuit using a plurality of comparators as inFIG. 14. That is, assuming that a circuit part of the comparator Q4side from the interconnection point7inFIG. 1is used for a circuit part of the comparator side from the interconnection point that gives the reference voltages Vref2and Vref3inFIG. 14, the values of the reference voltages Vref2and Vref3, namely the H-side thresholds VthH of the hysteresis comparator circuits2and3can easily be set to a desired value only by adjusting the resistors R4, R5, and R6. Furthermore, this embodiment has an advantage that each hysteresis width can also be set without considering the resistances of the resistors R4, R5and R6.

A hysteresis comparator circuit4aof a second embodiment realizes a hysteresis comparator circuit having an input-output characteristic as shown inFIG. 16.

The circuit configuration ofFIG. 2differs from the circuit configuration ofFIG. 1in the following respects. A connection of one end of the resistor (third resistor)13is changed from a connection with the non-inverting input terminal of the comparator Q4to a connection with the inverting input terminal. The input voltage Vin is applied to the non-inverting input terminal of the comparator Q4, not to the inverting input terminal. The constant current Ia supplied by the first constant current source circuit9is supplied to the inverting input terminal of the comparator Q4, not to the interconnection point7.

A connection of the second constant current source circuit10is changed so as to allow the second constant current source circuit10to absorb the constant current Ia from the interconnection point7. The values of the constant currents outputted by the constant current source CS1and by the constant current source CS2are equal. Points at which the analog switches SW1and SW2turn to the ON state when the output voltage Vout of the comparator Q4is the L level are the same as in the case ofFIG. 1.

In this configuration, a case where the value of the input voltage Vin is increased from 0V that is equal to the reference potential GND will be described. When the input voltage Vin is sufficiently low, the output voltage Vout of the comparator Q4becomes the L level, and both of the analog switches SW1and SW2are in the ON state. In this state, the constant current Ia supplied from the first constant current source circuit9is absorbed by the constant current source circuit10after flowing in the resistor R13. At this time, the input voltage supplied to the inverting input terminal of the comparator Q4has become [Vref+R13×Ia]. Moreover, the input impedance of the comparator Q4when considered from the side of the interconnection point7is infinite.

While the input voltage Vin is equal to or lower than [Vref+R13×Ia], the output voltage Vout remains at the L level. When the input voltage Vin exceeds [Vref+R13×Ia] even slightly, the output voltage Vout will turn from the L level to the H level. Then, the analog switches SW1and SW2will turn to the OFF state, and the input voltage supplied to the inverting input terminal will decrease to the reference voltage Vref. After that, as long as the input voltage Vin exceeds the reference voltage Vref even slightly, the output voltage Vout remains at the H level. In this state, the input impedance of the comparator Q4when considered from the side of the interconnection point7is also infinite.

When the input voltage Vin is decreased from the value at which the output voltage Vout is maintained at the H level, at a point when the input voltage Vin becomes lower than the reference voltage even slightly, the output voltage Vout will turn from the H level to the L level. The analog switches SW1and SW2are turned to the ON state, and the input voltage supplied to the inverting input terminal increases to [Vref+R13×Ia].

Summarizing these operations, the input-output characteristic of the hysteresis comparator circuit4aof this embodiment becomes the one shown inFIG. 16. The voltage of the interconnection point7remains at the reference voltage Vref regardless of whether the output voltage Vout of the comparator Q4is the H level or the L level. The input impedance of the comparator Q4when considered from the side of the interconnection point7is always infinite, regardless of the level of the output voltage Vout. The value of the H-side threshold VthH is equal to [Vref+R13×Ia], and the value of the L-side threshold VthL is equal to the reference voltage Vref. The hysteresis width becomes R13×Ia, as in the case ofFIG. 1.

Thus, in the case of this embodiment, the L-side threshold VthL is determined only by the resistors R11and R12and the voltage Vd, and the hysteresis width is determined only by the resistor R13and the constant current Ia. Therefore, these values can easily be set independently as in the case of the first embodiment.

Moreover, as in the case of the circuit configuration of the first embodiment, this embodiment achieves an advantage that the construction of a circuit using a plurality of comparators as inFIG. 14is simplified.

A hysteresis comparator circuit4bof a third embodiment is a circuit such that the first constant current source circuit9and the second constant current source circuit10inFIG. 1(first embodiment) are replaced with constant current source circuits9aand10ashown inFIG. 3, respectively.

The constant current source circuit9ais constructed with a first constant current source CS3, a diode D1and a transistor (first NPN transistor) Tr4. The first constant current source CS3and the diode D1are connected in series between the second power line8and the interconnection point7, with the first constant current source CS3connected to the second power line, and with a cathode of the diode D1connected to the interconnection point7. The transistor Tr4is connected between an anode of the diode D1and the potential reference line5.

A resistor R15is connected between a base of the transistor Tr4and an output terminal of the comparator Q4. While the output voltage Vout of the comparator Q4is the H level, the transistors Tr4is being turned to the ON state by a current flowing in the resistor R15. All of the constant current Ia outputted from the first constant current source CS3flows in the potential reference line5through the transistor Tr4. Therefore, no current is supplied to the interconnection point7.

When the output voltage Vout of the comparator Q4turns to the L level, the transistor Tr4will turn to the OFF state. Consequently the constant current Ia outputted from the first constant current source CS3will be supplied to the interconnection point7through the diode D1. That is, only while the output voltage Vout-of the comparator Q4is the L level, the constant current Ia is supplied to the interconnection point7by the first constant current source CS3. Thus, the constant current source circuit9aperforms the same operations as those of the first constant current source circuit9inFIG. 1.

The other constant current source circuit10ais constructed with a second constant current source CS4, a transistor (second NPN transistor) Tr5, a transistor (third NPN transistor) Tr6and a transistor (fourth NPN transistor) Tr7. The second constant current source CS4and the transistor Tr6are connected in series between the second power line8and the potential reference line5, with the second constant current source CS4connected to the second power line8. The transistor Tr5is connected between the non-inverting input terminal of the comparator Q4and the potential reference line5.

Both bases of the transistors Tr5and Tr6are connected to a collector of the transistor Tr6to constitute a current mirror circuit. The transistors Tr5and Tr6are formed so that their electric characteristics are identical and the current amplification factor may become a large value. Therefore, equal currents flow into their collectors. The transistor Tr7is connected in parallel with the transistor Tr6, and a resistor R14is connected between its base and the output terminal of the comparator Q4.

While the output voltage Vout of the comparator Q4is the H level, a current flowing in the resistor R14is keeping the transistor Tr7in the ON state. At this time, all of the constant current Ia outputted by the second constant current source CS4flows in the potential reference line5through the transistor Tr7. Since no current flows in the transistor Tr6, the collector current of the transistor Tr5also becomes zero. No current is absorbed from the non-inverting input terminal of the comparator Q4.

When the output voltage Vout of the comparator Q4turns to the L level, the transistor Tr7will turn to the OFF state. Consequently the constant current Ia outputted from the second constant current source CS4will flow in the potential reference line5through the transistor Tr6. At this time, the constant current Ia equal to the collector current of the transistor Tr6flows in the transistor Tr5by the current mirror operation.

The constant current Ia is absorbed from the non-inverting input terminal of the comparator Q4. That is, only while the output voltage Vout of the comparator Q4is the L level, the constant current Ia is absorbed from the non-inverting input terminal of the comparator Q4by the second constant current source CS4. Thus, the constant current source circuit10aperforms the same operations as those of the second constant current source circuit10inFIG. 1.

As described above, the constant current source circuits9aand10ainFIG. 3perform the same operations as those of the first constant current source circuit9and the second constant current source circuit10inFIG. 1, respectively. Therefore, the operations of the hysteresis comparator circuit4bshown inFIG. 3become the same as those of the hysteresis comparator circuit4inFIG. 1. The input-output characteristic becomes the one shown inFIG. 15, and this embodiment achieves the same advantage as the first embodiment.

A hysteresis comparator circuit4cof a fourth embodiment is one such that the first constant current source circuit9and the second constant current source circuit10inFIG. 2(second embodiment) are replaced with the constant current source circuits9aand10ainFIG. 4, respectively.

When the output voltage Vout of the comparator Q4is the H level, the transistors Tr4and Tr7are in the ON state, and both constant currents Ia outputted by the first and second constant current sources CS3and CS4flow in the potential reference line5. No current is supplied to the inverting input terminal of the comparator Q4, and no current is absorbed from the interconnection point7.

When the output voltage Vout of the comparator Q4changes to the L level, both of the transistors Tr4and Tr7will turn to the OFF state. The constant current Ia outputted by the first constant current source CS3will be supplied to the inverting input terminal of the comparator Q4through the diode D1.

On the other hand, the constant current Ia outputted by the second constant current source CS4will flow in the potential reference line5through the transistor Tr6. At this time, the transistor Tr5absorbs the same current Ia from the interconnection point7by the current mirror action.

Since the circuit operates as stated above, the operations of the hysteresis comparator circuit4cshown inFIG. 4become the same as those of the hysteresis comparator circuit4ashown inFIG. 2. The input-output characteristic becomes the one shown inFIG. 16, and the circuit achieves the same advantage as was described in the second embodiment.

A hysteresis comparator circuit4dof a fifth embodiment is an embodiment such that examples of concrete circuits realizing the first and second constant current sources CS3and CS4inFIG. 3(third embodiment) are incorporated in the hysteresis comparator circuit of the third embodiment.

The first and second constant current sources CS3and CS4are replaced with the current mirror circuits12shown inFIG. 5. The current mirror circuit12is constructed with a transistor (first PNP transistor) Tr8, a transistor (second PNP transistor) Tr9, a transistor (third PNP transistor) Tr10and a resistor (fourth resistor) R16.

All of emitters of the transistors Tr8, Tr9and Tr10are connected to the second power line8, and their bases are connected together and connected to a collector of the transistor Tr10. A collector of the transistor Tr8is connected to the anode of the diode D1, a collector of the transistor Tr9is connected to the collector of the transistor Tr6, and the collector of the transistor Tr10is connected to the potential reference line5through the resistor R16.

In this current mirror circuit12, the transistors Tr8, Tr9and Tr10are formed so that their electric characteristics are identical and the current amplification factor may become a large value. Therefore, currents of the same magnitude flow in the collectors of the respective transistors by the current mirror action.

A collector current of the transistor Tr10becomes a constant value Ia obtained by the following calculation: a residual of subtraction of the base-emitter voltage of the transistor Tr10from the value of the second constant voltage Vdd is divided by the resistance of the resistor R16. Therefore, the collector currents of the transistors Tr8and Tr9also become the constant current Ia.

Thus, the constant current Ia is always supplied to the anode of the diode D1and the collector of the transistor Tr6. Therefore, the operations of the hysteresis comparator circuit4dshown inFIG. 5of this embodiment become the same as those of the hysteresis comparator circuit3dinFIG. 3(third embodiment). An input-output characteristic becomes the one shown inFIG. 15, as in the third embodiment, and the advantage becomes the same.

It is noted that, although the description was given assuming that the transistors Tr8, Tr9and Tr10have identical electric characteristics in this embodiment, as long as the Tr8and Tr9have the identical electric characteristics, the transistor Tr10may differ from these transistors in cell area. In that case, the ratio of the collector currents of these transistors becomes the same as the ratio of the cell areas.

A hysteresis comparator circuit4eof a sixth embodiment is a circuit such that the first and second constant current sources CS3and CS4inFIG. 4(fourth embodiment) are replaced with the same current mirror circuits as the current mirror circuit12shown inFIG. 5(fifth embodiment). The same part or a corresponding part inFIG. 6as that inFIG. 5is designated with the similar reference numeral and its description is not repeated.

As described in the fifth embodiment, the collectors of the transistors Tr8and Tr9always output the same constant currents Ia as the current flowing in the resistor R16. Therefore, the constant current Ia is always supplied to both the anode of the diode D1and the collector of the transistor Tr6. By this operation, the operations of the hysteresis comparator circuit4einFIG. 6of this embodiment become the same as those of the hysteresis comparator circuit4cinFIG. 4of the fourth embodiment, exhibiting the same input-output characteristic; the circuit achieves the same advantage.

A hysteresis comparator circuit4fof a seventh embodiment is a circuit such that the resistor (fourth resistor) R16inFIG. 5(fifth embodiment) is replaced with a constant current source circuit13shown inFIG. 7.

The constant current source circuit13is constructed with a transistor (fifth NPN transistor) Tr11, a transistor (fourth PNP transistor) Tr12, a resistor (fifth resistor) R17and a resistor (sixth resistor) R18. A third constant voltage E is applied to a base of the transistor Tr12by an unillustrated constant voltage source.

The transistor Tr11and the resistor R17are connected in series between the collector of the transistor Tr10and the potential reference line5, with the resistor R17connected to the potential reference line5. The resistor R18is connected between the second power line8and the transistor Tr12. The transistor Tr12is connected between the base of the transistor Tr12and the potential reference line5.

A current having flowed through the resistor R18gives a base current of the transistor Tr11and an emitter current of the transistor Tr12. In the case where the transistors Tr11and Tr12are formed so that the base-emitter voltages of the transistors Tr11and Tr12may become almost equal, an emitter voltage of the transistor Tr11becomes equal to the third constant voltage E applied to the base of the transistor Tr12.

Therefore, the current flowing in the resistor R17becomes a constant current Ie (=E/R17) given by dividing the third constant voltage E by the resistance of the resistor R17. Assuming that the current amplification factor of the transistor Tr11is sufficiently high, the same constant current Ie also flows into its collector. That is, the constant current Ie(=E/R17) is absorbed from the interconnection point of the collector and the base of the transistor Tr10. When the current amplification factors of the transistors Tr8, Tr9and Tr10are sufficiently high, the values of the collector currents Ia of these transistors become equal to the constant current Ie (=E/R17).

Thus, since the collector currents of the transistors Tr8, Tr9and Tr10become constant, the operations of the hysteresis comparator circuit4fshown inFIG. 7of this embodiment become the same as those of the hysteresis comparator circuit4dinFIG. 5(fifth embodiment), exhibiting the same input-output characteristic; the circuit achieves the same advantage.

Moreover, in the case of the circuit configuration of this embodiment, an advantage that will be described below can be obtained as well. Representing absolute values of the base-emitter voltages of the transistors Tr11and Tr12by V11beand V12be,respectively, the hysteresis width of this embodiment is expressed as follows.
Hysteresis width=Ia×R13=(E+V12be−V11be)×R13/R17

This formula indicates that, when the temperature coefficients of the base-emitter voltages of the transistors Tr11and Tr12are equal and the temperature coefficients of the resistors R13and R17are equal, the hysteresis width becomes a constant value that is not temperature-dependent.

Although the transistor Tr11is a NPN transistor and the transistor Tr12is a PNP transistor, differing in the type, it is not difficult to form the transistors having almost equal temperature coefficients of base-emitter voltage. The resistors R13and R17can also be given the same temperature coefficient by forming them on the same IC using the identical process.

In addition, the error ratios of formed resistances become almost the same in this case. Therefore, the value of R13/R17can be made a constant value that is hardly susceptible to both a temperature change in resistances and manufacturing errors. From these reasons, in the case where the hysteresis comparator circuits4dinFIG. 7are formed on the same IC, it becomes easy to maintain correctly the hysteresis width calculated by the above Formula (1) to a certain value.

The same can be true about the reference voltage Vref of the interconnection point7. That is, the value of the reference voltage Vref is also determined by the ratio of the resistors R11and R12. Therefore, it becomes possible to maintain correctly the value of the reference voltage Vref to a certain value that is hardly susceptible to both a temperature change in the resistances of the resistors R11and R12and manufacturing errors by forming the resistors R11and R12on the same IC using the identical process.

Thus, the hysteresis comparator circuit4fshown inFIG. 7of this embodiment achieves an advantage that the H-side threshold VthH, the L-side threshold VthL, and the hysteresis width between them becomes hardly affected by the temperature change and becomes hardly affected by the manufacturing errors of resistors.

A hysteresis comparator circuit4gof an eighth embodiment is a circuit such that the resistor (fourth resistor) R16inFIG. 6(sixth embodiment) is replaced with the constant current source circuit13shown inFIG. 8as in the case of the seventh embodiment.

The operation of the constant current source circuit13was described in respect of the seventh embodiment. Therefore, the hysteresis comparator circuit4gof this embodiment performs the same operations as those of the hysteresis comparator circuit4eshown inFIG. 6(sixth embodiment). Its input-output characteristic and effect are the same as in the case of the seventh embodiment.

A hysteresis comparator circuit4hof a ninth embodiment is constructed with a comparator Q5, a first constant current source circuit15, a second constant current source circuit16, a resistor (first resistor) R21, a resistor (second resistor) R22and a resistor (third resistor) R23.

The comparator Q5, having a non-inverting input terminal (+ symbol input terminal) and an inverting input terminal (− symbol input terminal), outputs a H-level voltage (for example, 5V) when a voltage applied to the non-inverting input terminal is equal to or more than a voltage applied to the inverting input terminal. It outputs a L-level voltage (for example, 0V) when the above condition is not satisfied. This circuit is a comparator that has no hysteresis and very high input impedance. In the description below, the comparator is treated as a comparator with infinite input impedance.

The resistors R21and R22are connected in series between the first power line6for supplying the first constant voltage Vd and the potential reference line5, with the resistor R21connected to the first power line6. The resistor R23is connected between an interconnection point17of the resistors R21and R22and the non-inverting input terminal of the comparator Q5. The input voltage Vin is applied to the inverting input terminal of the comparator Q5.

The first constant current source circuit15is connected between the second power line8for supplying the second constant voltage Vdd and the non-inverting input terminal of the comparator Q5. This first constant current source circuit15includes a series circuit of a constant current source CS5and an analog switch SW3. Only while the output voltage Vout of the comparator Q5is the H level, the analog switch SW3becomes conductive and supplies the constant current Ia outputted by the constant current source CS5to the non-inverting input terminal of the comparator Q5.

The second constant current source circuit16is connected between the interconnection point17and the potential reference line5. This second constant current source circuit16is constructed with a series circuit of a constant current source CS6and an analog switch SW4. Only while the output voltage Vout is H level, the analog switch SW4becomes conductive, which allows the constant current source CS6to absorb the constant current Ia from the interconnection point17. The value of the constant current that the constant current source CS5flows and the value of the constant current that the constant current source CS6absorbs are the equal value Ia.

In this circuit configuration, in the case where the value of the input voltage Vin is increased from 0V, when the input voltage Vin is sufficiently low, the output voltage Vout of the comparator Q5is the H level; both of the analog switches SW3and SW4are in the ON state. In this state, the constant current Ia is supplied to the non-inverting input terminal of the comparator Q5, and the same constant current Ia is absorbed from the interconnection point17.

Although the constant current Ia flows in the resistor R23toward the interconnection point17, there occurs neither a current flowing in the resistor R23from the interconnection point17nor a current flowing out of the resistor R23, because all of the current is absorbed by the fourth constant current source circuit16. That is, the input impedance of the resistor R23plus the comparator Q5when considered from the side of the interconnection point17has become infinite.

A voltage of the interconnection point17at this time becomes Vd×R22/(R21+R22). This voltage is called a reference voltage Vref1. The applied voltage to the non-inverting input terminal of the comparator Q5has become [Vref1+Ia×R23]. This state continues until just before the value of the input voltage Vin reaches [Vref1+Ia×R13]. When the value of the input voltage Vin increases to exceed [Vref1+Ia×R23] even slightly, the output voltage Vout of the comparator Q5will turn from the H level to the L level.

Then, both of the analog switches SW3and SW4will turn to the OFF state, and current supply to the non-inverting input terminal of the comparator Q5and current absorbance from the interconnection point17will stop. The-applied voltage to the non-inverting input terminal of the comparator Q5will decrease to the reference voltage Vref1. This state continues as long as the value of the input voltage Vin exceeds the reference voltage Vref.

In the case where the input voltage decreases from a high value, when it becomes lower than the reference voltage Vref1even slightly, the output voltage Vout of the comparator Q5will turn from the L level to the H level. By such operations, the input-output characteristic of the hysteresis comparator circuit4hof this embodiment becomes the one shown inFIG. 15. In the diagram, the L-side threshold VthL is equal to Vd×R22/(R21+R22) that is the reference voltage Vref1, and the H-side threshold VthH becomes [Vref1+Ia×R23], so the hysteresis width becomes Ia×R23.

Thus, the L-side threshold VthL is determined only by the first constant voltage Vd and the resistances of the resistors R21and R22, regardless of the constant current Ia and the resistor R23. The hysteresis width is determined by the value of the constant current Ia and the resistance of the resistor R23, regardless of the first constant voltage Vd and the resistors R21and R22. Therefore, this embodiment achieves an advantage that the value of the H-side threshold VthH and the hysteresis width, and accordingly the L-side threshold VthL can be set easily as compared to the conventional circuit as inFIG. 13.

Moreover, since the input impedance of the comparator Q5when considered from the side of the interconnection point17has become always infinite as in the case of the first embodiment, construction of a circuit that uses a plurality of comparators as inFIG. 14becomes easy.

A hysteresis comparator circuit4iof a tenth embodiment is designed to realize a hysteresis comparator circuit having an input-output characteristic as shown inFIG. 16.

The circuit configuration ofFIG. 10differs from the circuit configuration ofFIG. 9in the following respects. A connection of one end of the resistor (third resistor) R23is changed from that with the non-inverting input terminal of the comparator Q5to that with the inverting input terminal. The input voltage Vin is inputted into the non-inverting input terminal of the comparator5, not to the inverting input terminal. The output current of the first constant current source circuit15is supplied to the interconnection point17, not to the non-inverting input terminal of the comparator Q5.

A connection of the second constant current source circuit16is changed so as to allow the second constant current source circuit16to absorb the constant current Ia from the inverting input terminal of the comparator Q5. The values of the constant currents outputted by the constant current source CS5and by the constant current source CS6are equal. Points at which both of the analog switches SW3and SW4turn to the ON state when the output voltage Vout of the comparator Q5is the H level are the same as those in the case ofFIG. 9.

When increasing the value of the input voltage Vin from 0V in this configuration, while the input voltage Vin is sufficiently low, the output voltage Vout of the comparator Q5is the L level; both of the analog switches SW3and SW4are in the OFF state. The voltage of the inverting input terminal of the comparator Q5has become the reference voltage Vref1described in the ninth embodiment.

When the input voltage Vin exceeds the reference voltage Vref1even slightly, the output voltage Vout will turn from the L level to the H level. The analog switches SW3and SW4will turn to the ON state; the constant current Ia supplied from the first constant current source circuit15will flow in the resistor R23, and will be absorbed by the second constant current source circuit16.

By this operation, the input voltage supplied to the inverting input terminal of the comparator Q5reduces to [Vref1−R23×Ia]. The input impedance of the resistor R23plus the comparator Q5when considered from the side of the interconnection point17remains infinite. While the input voltage Vin exceeds [Vref−R23×Ia], the output voltage Vout is maintained at the H level.

When the input voltage Vin decreases from a high voltage to be lower than [Vref1−R23×Ia] even slightly, the output voltage Vout will turn from the H level to the L level. The analog switches SW3and SW4will turn to the OFF state; the input voltage supplied to the inverting input terminal will increase to the reference voltage Vref1.

By such operations, the input-output characteristic of the hysteresis comparator circuit4iof this embodiment becomes the one shown inFIG. 16. The value of H-side threshold VthH becomes equal to the reference voltage Vref1and the value of L-side threshold VthL becomes equal to (Vref1−R23×Ia). The hysteresis width becomes R23×Ia, as in the case ofFIG. 9.

Thus, in the case of this embodiment, the H-side threshold VthH is determined only depending on the resistors R21and R22and the voltage Vd. The hysteresis width is determined only by the resistor R23and the constant current Ia. Therefore, as in the case of the ninth embodiment, this embodiment achieves an advantage that the H-side threshold VthH and the hysteresis width, and accordingly the L-side threshold VthL, can be set easily compared to the conventional circuit as inFIG. 13. Moreover, since the input impedance of the comparator Q5when considered from the side of the interconnection point17has become always infinite, this embodiment achieves an advantage that the construction of a circuit using a plurality of comparators as inFIG. 14is simplified, similarly as in the ninth embodiment.

A hysteresis comparator circuit4jof an eleventh embodiment is an embodiment such that examples of concrete circuits realizing the third constant current source circuit15and the fourth constant current source circuit16inFIG. 9that is the ninth embodiment are incorporated in the hysteresis comparator circuit.

The first constant current source circuit15inFIG. 9is replaced with a constant current source circuit15aof a current mirror circuit configuration that includes a transistor (first PNP transistor) Tr13and a transistor (second transistor) Tr14in the circuit of this embodiment shown inFIG. 11. The emitters of the transistor Tr13and the transistor Tr14are connected together and connected to the second power line8, and the bases thereof are connected together and connected to a collector of the transistor Tr13. A collector of the transistor Tr14is connected to the non-inverting input terminal of the comparator Q5.

The transistor Tr13and the transistor Tr14are formed in such a manner that their electric characteristics are identical and the value of the current amplification factor may become large. Therefore, a current equal to the collector current of the transistor Tr13flows out of the collector of the transistor Tr14by the current mirror action.

The second constant current source circuit16inFIG. 9is replaced with a constant current source circuit16aconstructed with a transistor (first PNP transistor) Tr13, a transistor (third PNP transistor) Tr15, a transistor (fourth NPN transistor) Tr16and a transistor (fifth NPN transistor) Tr17in the circuit of this embodiment shown inFIG. 11.

The transistor Tr15, together with the transistor Tr13, constitutes a current mirror circuit. The emitters of the transistor Tr15and the transistor Tr13are connected together and connected to the second power line8, and the bases thereof are connected together and connected to the collector of the transistor Tr13. The collector of the transistor Tr15is connected to a collector of the transistor Tr17.

The transistor Tr15and the transistor Tr13are formed in such a manner that their electric characteristics are identical and the value of the current amplification factor may become large. Therefore, a current equal to the collector current of the transistor Tr13flows out of the collector of the transistor Tr15by the current mirror action.

Moreover, the transistor Tr16and the transistor Tr17also form a current mirror circuit. Emitters of the transistor Tr16and the transistor Tr17are connected together and connected to the potential reference line5, and the bases thereof are connected together and connected to the collector of the transistor Tr17. A collector of the transistor Tr16is connected to the interconnection point17, and the collector of the transistor Tr17is connected to the collector of the transistor Tr15.

The transistor Tr16and the transistor Tr17are formed in such a manner that their electric characteristics are identical and the current amplification factor may become a large value. Therefore, a current equal to a collector current of the transistor Tr17flows out of the collector of the transistor Tr16by the current mirror action.

The current that flows into the collector of the transistor Tr17is equal to a collector current of the transistor Tr15, and that current is equal to the collector current of the transistor Tr13. From this fact, the collector current of the transistor Tr16becomes equal to the collector current of the transistor Tr13.

By these operations, a current supplied to the non-inverting input terminal of the comparator Q5from the collector of the transistor Tr14and a current that is absorbed by the collector of the transistor Tr16from the interconnection point17become equal to the collector current Ia of the transistor Tr13.

The value of a collector current Ia of the transistor Tr13is controlled by the resistor (fourth resistor) R24connected in series between the collector of the transistor Tr13and the potential reference line5, and a transistor (eighth NPN transistor) Tr18. The emitter of the transistor Tr18is connected to the potential reference line5, and a resistor R25is connected between the base thereof and the output terminal of the comparator Q5.

When the output voltage Vout of the comparator Q5is the L level, the transistor Tr18turns to the OFF state and the collector current of the transistor Tr13becomes zero. At this time, collector currents of the transistors Tr14and Tr16are also zero; no current is supplied to the non-inverting input terminal of the comparator Q5and no current is absorbed from the interconnection point17. This state corresponds to the state where the output voltage Vout of the comparator Q5is the L level inFIG. 9of the ninth embodiment.

When the output voltage Vout of the comparator Q5becomes the H level, the transistor Tr18will turn to the ON state and the collector current Ia will flow in the transistor Tr13. The value of the collector current Ia becomes a constant value Ia obtained by the following calculation: a residual of subtraction of a base-emitter voltage of the transistor Tr13from the value of the second constant voltage Vdd is divided by the resistance of the resistor R24.

At this time, the collector currents of the transistors Tr14and Tr16will also become the same constant current Ia; the current Ia will be supplied to the non-inverting input terminal of the comparator Q5and the current Ia will be absorbed from the interconnection point17. This state corresponds to the state where the output voltage Vout of the comparator Q5is the H level inFIG. 9of the ninth embodiment.

Thus, since the circuit operates in this way, the operations of the hysteresis comparator circuit4jshown inFIG. 11become the same as those of the hysteresis comparator circuit4hshown inFIG. 9. The input-output characteristic becomes the one shown inFIG. 15, and this embodiment achieves the same advantage as was described in the ninth embodiment.

It is noted that, although the description was given assuming that the transistors Tr13, Tr14, and Tr15have identical electric characteristics in this embodiment, as long as the Tr14and Tr15have the identical electric characteristics, the transistor Tr13may differ from these transistors in cell area. In that case, the ratio of the collector currents of the transistors becomes the same as the ratio of the cell areas.

A hysteresis comparator circuit4kof a twelfth embodiment is an embodiment such that the first constant current source circuit15and the second constant current source circuit16of the hysteresis comparator circuit4iinFIG. 10that is the tenth embodiment are replaced with the constant current source circuit15aand the constant current source circuit16aadopted inFIG. 11of the eleventh embodiment.

When the output voltage Vout of the comparator Q5is the L level, the transistor Tr18turns to the OFF state; the collector current of the transistor Tr13becomes zero. At this time, the collector currents of the transistors Tr14and Tr16are also zero; no current is supplied to the interconnection point17, and no current is absorbed from the non-inverting input terminal of the comparator Q5. This state corresponds to a state where the output voltage Vout of the comparator Q5is the L level inFIG. 10of the tenth embodiment.

When the output voltage Vout of the comparator Q5becomes the H level, the transistor Tr18will turn to the ON state and the collector current Ia will flow in the transistor Tr13. The value of the collector current Ia becomes a constant value Ia obtained by the following calculation: a residual of subtraction of the base-emitter voltage of the transistor Tr13from the value of the second constant voltage Vdd is divided by the resistance of the resistor R24.

At this time, the collector currents of the transistors Tr14and Tr6will become the same constant value Ia; the current Ia will be supplied to the interconnection point17and the current Ia will be absorbed from the non-inverting input terminal of the comparator Q5. This state corresponds to a state where the output voltage Vout of the comparator Q5is the H level inFIG. 10of the tenth embodiment.

Since the circuit operates in this way, the operations of the hysteresis comparator circuit4kshown inFIG. 12become the same as those of the hysteresis comparator circuit4jshown inFIG. 10. Its input-output characteristic becomes the one shown inFIG. 16. This circuit achieves the same advantage as that of the hysteresis comparator circuit4jof the tenth embodiment.

The present invention is not limited to the disclosed embodiments, but may be implemented in many other ways without departing from the spirit of the invention.