Fluidic die with monitoring circuit fault protection structure

A fluidic die includes fluid chambers, each including an electrode exposed to an interior of the fluid chamber and each having a corresponding fluid actuator operating at a high voltage. The fluidic die further includes monitoring circuitry, operating at a low voltage relative to the fluid actuator, to monitor a condition of each fluid chamber, for each chamber the monitoring circuitry including a connection structure and a select transistor and a pulldown transistor connected to the electrode via the connection structure. The connection structure and select and pulldown transistors together structured to form electrically conductive paths with electrical resistances to protect at least the select transistor from fault damage if the high voltage fluid actuator short-circuits to the electrode.

BACKGROUND

Fluidic dies may include an array of nozzles and/or pumps each including a fluid chamber and a fluid actuator, where the fluid actuator may be actuated to cause displacement of fluid within the chamber. Some example fluidic dies may be printheads, where the fluid may correspond to ink.

DETAILED DESCRIPTION

Examples of fluidic dies may include fluid actuators. The fluid actuators may include thermal resistor based actuators, piezoelectric membrane based actuators, electrostatic membrane actuators, mechanical/impact driven membrane actuators, magneto-strictive drive actuators, or other suitable devices that may cause displacement of fluid in response to electrical actuation. Fluidic dies described herein may include a plurality of fluid actuators, which may be referred to as an array of fluid actuators. An actuation event or firing event, as used herein, may refer to singular or concurrent actuation of fluid actuators of the fluidic die to cause fluid displacement.

In example fluidic dies, the array of fluid actuators may be arranged in sets of fluid actuators, where each such set of fluid actuators may be referred to as a “primitive” or a “firing primitive.” The number of fluid actuators in a primitive may be referred to as a size of the primitive. The set of fluid actuators of a primitive generally have a set of actuation addresses with each fluid actuator corresponding to a different actuation address of the set of actuation addresses. In some examples, electrical and fluidic constraints of a fluidic die may limit which fluid actuators of each primitive may be actuated concurrently for a given actuation event. Primitives facilitate addressing and subsequent actuation of fluid actuator subsets that may be concurrently actuated for a given actuation event to conform to such constraints.

To illustrate by way of example, if a fluidic die comprises four primitives, with each primitive including eight fluid actuators (with each fluid actuator corresponding to different one of the addresses0to7), and where electrical and fluidic constraints limit actuation to one fluid actuator per primitive, a total of four fluid actuators (one from each primitive) may be concurrently actuated for a given actuation event. For example, for a first actuation event, the respective fluid actuator of each primitive corresponding to address “0” may be actuated. For a second actuation event, the respective fluid actuator of each primitive corresponding to address “5” may be actuated. As will be appreciated, the example is provided merely for illustration purposes, such that fluidic dies contemplated herein may comprise more or fewer fluid actuators per primitive and more or fewer primitives per die.

Example fluidic dies may include fluid chambers, orifices, and/or other features which may be defined by surfaces fabricated in a substrate of the fluidic die by etching, microfabrication (e.g., photolithography), micromachining processes, or other suitable processes or combinations thereof. Some example substrates may include silicon based substrates, glass based substrates, gallium arsenide based substrates, and/or other such suitable types of substrates for microfabricated devices and structures. As used herein, fluid chambers may include ejection chambers in fluidic communication with nozzle orifices from which fluid may be ejected, and fluidic channels through which fluid may be conveyed. In some examples, fluidic channels may be microfluidic channels where, as used herein, a microfluidic channel may correspond to a channel of sufficiently small size (e.g., of nanometer sized scale, micrometer sized scale, millimeter sized scale, etc.) to facilitate conveyance of small volumes of fluid (e.g., picoliter scale, nanoliter scale, microliter scale, milliliter scale, etc.).

In some examples, a fluid actuator may be arranged as part of a nozzle where, in addition to the fluid actuator, the nozzle includes an ejection chamber in fluidic communication with a nozzle orifice. The fluid actuator is positioned relative to the fluid chamber such that actuation of the fluid actuator causes displacement of fluid within the fluid chamber that may cause ejection of a fluid drop from the fluid chamber via the nozzle orifice. Accordingly, a fluid actuator arranged as part of a nozzle may sometimes be referred to as a fluid ejector or an ejecting actuator.

In one example nozzle, the fluid actuator comprises a thermal actuator which is spaced from the fluid chamber by an insulating layer, where actuation (sometimes referred to as “firing”) of the fluid actuator heats the fluid to form a gaseous drive bubble within the fluid chamber that may cause a fluid drop to be ejected from the nozzle orifice, after which the drive bubble collapses. In some examples, a cavitation plate is disposed within the fluid chamber so as to be above the fluid actuator and in contact with the fluid within the chamber, where the cavitation plate protects material underlying the fluid chamber, including the underlying insulating material and fluid actuator, from cavitation forces resulting from generation and collapse of the drive bubble. In examples, the cavitation plate may be metal (e.g., tantalum).

In some examples, a fluid actuator may be arranged as part of a pump where, in addition to the fluidic actuator, the pump includes a fluidic channel. The fluidic actuator is positioned relative to a fluidic channel such that actuation of the fluid actuator generates fluid displacement in the fluid channel (e.g., a microfluidic channel) to convey fluid within the fluidic die, such as between a fluid supply (e.g., fluid slot) and a nozzle, for instance. A fluid actuator arranged to convey fluid within a fluidic channel may sometimes be referred to as a non-ejecting actuator. In some examples, similar to that described above with respect to a nozzle, a metal cavitation plate may be disposed within the fluidic channel above the fluid actuator to protect the fluidic actuator and underlying materials from cavitation forces resulting from generation and collapse of drive bubbles within the fluidic channel.

Fluidic dies may include an array of fluid actuators (such as columns of fluid actuators), where the fluid actuators of the array may be arranged as fluid ejectors (i.e., having corresponding fluid ejection chambers with nozzle orifices) and/or pumps (having corresponding fluid channels), with selective operation of fluid ejectors causing fluid drop ejection and selective operation of pumps causing fluid displacement within the fluidic die. In some examples, the array of fluid actuators may be arranged into primitives.

During operation of the fluidic die, conditions may arise that adversely affect the ability of nozzles to properly eject fluid drops and pumps to properly convey fluid within the die. For example, a blockage may occur in a nozzle orifice, ejection chamber, or fluidic channel, fluid (or components thereof) may become solidified on surfaces within a fluid chamber, such as on a cavitation plate, or a fluid actuator may not be functioning properly.

To determine when such conditions are present, techniques have been developed to measure various operating parameters (e.g., impedance, resistance, current, voltage) of nozzles and pumps using a sense electrode which is disposed so as to be exposed to an interior of the fluid chamber. In one case, in addition to protecting fluid actuators and other elements from cavitation forces, cavitation plates may also serve as sense electrodes. In one example, the sense electrode may be used to measure an impedance of fluid within the chamber when the nozzle and/or pump is inactive (i.e., not being fired), where such impedance may be correlated to a temperature of the fluid, fluid composition, particle concentration, and a presence of air, among others, for instance.

Drive bubble detect (DBD) is one technique which measures parameters indicative of the formation of a drive bubble within a fluid chamber to determine whether a nozzle or pump is defective (i.e. not operating properly). In one example, for a given fluid chamber, during an actuation event, a high-voltage (e.g., 32 V) is applied to the corresponding fluid actuator to vaporize at least one component of a fluid (e.g., water) to form a drive bubble within the fluid chamber. In one example, at one or more selected times after a fluid actuator has been fired (e.g., after expected formation but before collapse of the drive bubble), low-voltage (e.g., 5 V) DBD monitoring circuitry on the fluidic die selectively couples to the cavitation plate within the fluid chamber. In one example, the DBD monitoring circuitry provides a current pulse to the electrically conductive cavitation plate which flows through an impedance path formed by fluid and/or gaseous material of the drive bubble within the ejection chamber to a ground point. Based on the current pulse (e.g. based on a resulting voltage across the chamber), the DBD monitoring circuitry measures an impedance of the fluid chamber which indicative of the operating condition of the nozzle or pump (e.g., the nozzle/pump is operating properly, a nozzle orifice is plugged, etc.).

The impedance measured by fluid chamber monitoring circuitry (such as DBD monitoring circuitry) includes several fixed impedance components and a variable impedance component in the form of fluid within the fluid chamber. According to one example, the fixed impedance components include, among others, a parasitic resistance formed by the electrode (e.g., the cavitation plate) and connections between the monitoring circuit and the electrode, and a capacitance between circuit elements (e.g., conductors) connecting the monitoring circuit and a substrate or conductive layers adjacent to such circuit elements, and a capacitance between the cavitation plate and the fluid actuator. To improve an effectiveness of the impedance measurements by the monitoring circuitry and more accurately identify operating conditions of fluid chambers, it is desirable to minimize an amount of a measured impedance value represented by the fixed impedance components.

FIG.1is a block and schematic diagram generally illustrating a fluidic die30, according to one example of the present disclosure, having monitoring circuitry operating at a low-voltage for monitoring a condition of one or more fluid chambers via a sense electrode disposed, at least partially, within an interior of each fluid chamber. In one example, such monitoring circuitry may comprise DBD monitoring circuitry. In one example, for each fluid chamber, the monitoring circuit includes a select transistor and a pulldown transistor to selectively connect to the electrode via a connection structure, with the connection structure and select and pulldown transistors together forming electrically conductive paths structured with impedances to prevent damage to the low-voltage monitoring circuitry if the high-voltage fluid actuator short-circuits to the electrode.

In one example, fluidic die30includes a plurality of fluid chambers40(illustrated as fluid chambers40-1to40-n), with each chamber including an electrode42(illustrated as electrodes42-1to42-n) disposed therein. In one example, electrode42comprises a cavitation plate42disposed at a bottom of fluid chamber40. Each fluid chamber42has a corresponding fluid actuator44(illustrated as fluid actuators44-1to44-n) which is separated from the fluid chamber40and electrode42, such as by an insulating material46(e.g., an oxide layer). In one example, fluid actuators44operate at a high voltage48(e.g., 15 volts) and, when actuated, may cause vaporization of fluid within fluid chamber40to form a drive bubble therein. In the case of a nozzle, where fluid chamber40is in fluidic communication with a nozzle orifice, formation of a drive bubble via actuation of fluid actuator44may cause ejection of a fluid drop (e.g., ink) from fluid chamber40via the nozzle orifice. In a case where fluid chamber40is a pump, formation of a drive bubble by actuation of fluid actuator44may cause conveyance of fluid within fluidic die30(e.g., to/from a nozzle).

In one example, fluidic die30includes monitoring circuitry50for monitoring an operating condition of each of the plurality of fluid chambers40, where monitoring circuitry50operates at a low voltage52(e.g., 5 V) relative to the high voltage48at which fluid actuators44operate. In one case, monitoring circuitry50may comprise DBD monitoring circuitry. According to one example, for each fluid chamber40, monitoring circuitry50includes a select transistor60(illustrated as select transistors60-1to60-n) and a pulldown transistor62(illustrated at pulldown transistors62-1to62-n) which operate to selectively connect to the corresponding cavitation plate42via connection structure70(illustrated as connection structures70-1to70-n), with cavitation structure70electrically connected to the corresponding cavitation plate42via a connection80(illustrated as connections80-1to80-n).

In one example, select and pulldown transistors60and62comprise low-voltage rated devices suitable for use at operating voltage52. In one example, select and pulldown switches60and62include a gate (G), a source region (S), and a drain region (D), where one of the source regions (S) and drain regions (D) is electrically connected to connection structure70. In one example, as illustrated, the drain region (D) of each select and pulldown transistor60and62is connected to connection structure70. In other examples, source regions (S) of select and pulldown transistors60and62may be coupled to connection structure70in lieu of drain regions (D).

As will be described in greater detail herein, according to examples, for each fluid chamber40, the connection structure70and select and pulldown transistors60and62together form electrically conductive paths structured with impedances to prevent damage to low-voltage monitoring circuitry50, including at least to select switches60, that might otherwise occur from exposure to high voltage48should a fluid actuator44short-circuit to cavitation plate42.

FIG.2is a block and schematic diagram generally illustrating portions of fluidic die30, according to one example. In one example, the plurality of fluid actuators44is arranged to form a primitive41, where a portion of the fluid actuators44may be arranged as part of a nozzle where the corresponding fluid chamber40is in fluidic communication with a nozzle orifice43(such as illustrated by fluid chambers40-2and40-n, for instance), and a portion may be arranged as part of a pump (such illustrated by fluid chamber40-1, for instance). In one example, each cavitation plate42is disposed within the corresponding fluid chamber40so as to be exposed to an interior thereof and which may be in contact with a fluid45if present therein (e.g., ink).

In one example, each select and pulldown transistor60and62is a MOS FET (e.g., NMOS, PMOS) having a source region (S) and a drain region (D) connected to the corresponding sense node54. Space may be limited on fluidic die30, particularly in regions of fluidic die30proximate to fluid chambers40. In one example, as illustrated, to conserve space, select and pulldown transistors60and62for a fluid chamber40may share a drain region (D), as indicated by shared drain regions64-1to64-ninFIG.2. In other examples, the source region (S) may be shared.

In one example, as illustrated, for each fluid chamber40, connection structure70includes a sense node72(illustrated as sense nodes72-1to72-n) and a drain contact74(illustrated as drain contacts74-1to74-n) electrically connected to shared drain region64, with sense node72, in-turn, being electrically connected to the corresponding cavitation plate42(or other electrode) via conductor80.

In one example arrangement, as illustrated, the source region (S) of each select FET60is coupled to sense circuitry90via a sense line92, and the source region (S) of each pulldown FET62coupled to a reference voltage (e.g., a 0V reference, or ground). Monitoring circuitry50further includes a sense select signal (Sense_Sel) to the gate of each select FET60(illustrated as sense select signals Sense_Sel-1to Sense_Sel-n), a plate pulldown signal (Plate_PD) to the gate of each pulldown FET62(illustrated as plate pulldown signals Plate_PD-1to Plate_PD-n). In one example, as described below, to further conserve space on fluidic die30, select FETs60of adjacent fluid chambers40may share a source region (S), and pulldown FETs62of adjacent fluid chambers40may share a source region (S).

During normal firing events of fluid actuators44(e.g., to eject fluid via nozzles and convey fluid within fluidic die30via pumps), according to examples, monitoring circuitry50, via the Plate_PD signals, maintains pulldown FETs62in an enabled state (e.g., a closed position) so as to maintain cavitation plates42at a “safe” voltage (e.g., ground), and maintains select FETs60in a disabled state (e.g., an open position) to as to isolate sense circuitry90, from cavitation plates42.

During a sensing operation, such as a DBD sense operation, monitoring circuitry50connects a cavitation plate42of only one fluid chamber40at a time to sense circuitry90by enabling the select FET60of the selected fluid chamber40via the Sense_Sel signals, and by disabling the corresponding pulldown FET62. As described above, in one example, sense circuitry90provides a sense current (e.g., a current pulse) through fluid45and/or vaporized portions thereof within the selected fluid chamber40via cavitation plate42and monitors a resulting voltage on sense node72to evaluate an operating condition of the selected fluid chamber40.

FIG.3is a plan view illustrating a simplified wiring and device layout of a portion of fluidic die30ofFIG.2, according to one example. Gates of select and pulldown FETs60(e.g., polysilicon material) are illustrated at60-1to60-3and62-1to62-3as being disposed over active source and drain regions100(implant regions) in a substrate102of fluidic die30, with the active regions alternating as source and drain regions (indicated as “S” and “D”). In a case of select and pulldown FETs60and62being NMOS FETs, source and drain regions100comprise n-doped regions within a p-type substrate102. Conventionally, source and drain regions80are arranged in a column having a width (Cw) which defines a gate width of select and pulldown FETs60and62(with a gate defined as an overlapping or intersecting region between polysilicon material and active regions).

With area on fluidic die30being limited, to save space, monitoring circuitry50, including sense circuitry90, is shared between fluid chambers40of primitive41, with only one cavitation plate42of a selected fluid chamber40being coupled to sense circuitry90at a time via control of select and pulldown FETs60and62. Additionally, as described above, with sense and pulldown FETs60and62being instantiated in a region of high circuit density on fluidic die30, in some example arrangements, adjacent sense and pulldown FETs60and62may share drain and source regions100and corresponding drain and source contacts to minimize required circuit space.

For instance, as described above, the pair of sense and pulldown FETs60and62for each fluid chamber40share a drain region (D)64and drain contact74, with the shared drain contact74being connected to the corresponding sense node72, such as illustrated by select and pulldown FETs60-1and62-1sharing source region (D)64-1which is electrically connected by shared drain contact74-1to sense node72-1.

In another example, pairs of select FETs60of adjacent fluid chambers40may share a source region “S” and a source contact66, such as illustrated by select FETs60-1and60-2sharing source region “S” and a shared source contact66-1. In one example, the shared contact66is connected to a corresponding source node68which, in-turn, is connected to sense line92by a via69, such as illustrated by shared contact66-1of select FETs60-1and60-2being connected to a corresponding source node68-1and, in-turn, to sense line92by a via69-1.

In another example, pairs of pulldown FETs62of adjacent fluid chambers40share a source region “S” and a source contact76, such as illustrated by pulldown FETs62-3and62-3sharing source region (S). In one example, shared source contact76to a corresponding reference voltage node77which, in-turn, is connected to a reference voltage line (e.g., a ground line)79by a via78, such as illustrated by shared source contact76-2of pulldown FETs62-2and62-3being connected to a corresponding reference node77-2and, in-turn, to reference voltage line79by via78-2.

In some examples, to further minimize space requirements and to also minimize impedance between source/drain contacts and a corresponding gate, a dimension “x” between a gate and contact, such as between gate62-1and source contact74-1, for example, is minimized according to process limitations. It is noted that, according to convention, horizontally and vertically extending conductive traces are arranged in alternating metal layers. For instance, according to one example, horizontally extending conductive traces are arranged in a Metal1 layer (e.g., sense node72, source node68, and ground node77) and vertically extending conductive traces are arranged in a Metal 2 layer (e.g., ground line79and sense line92), and so on.

FIG.4is a cross-sectional view generally illustrating a simplified layout of a portion of fluidic die30ofFIG.3, according to one example. Polysilicon gates of select switches60-1and60-2, and pulldown switches62-2and62-3are illustrated as being disposed on corresponding gate oxide layers104on a surface of substrate102. Select FETs60-1and60-2share a source region “S” and source contact66-1, with source contact66-1connecting the shared source region “S” to source node68-1which, in-turn, is connected to sense line92by via69-1. Pulldown FETs62-2and62-3share a source region “S” and source contact76-2, with source contact76-2connecting the shared source region “S” to ground node77-2which, in-turn, is connected to ground line79by via78-2.

In one example, as illustrated, select FET60-2and pulldown FET62-2share a drain region “D” (64-1) and drain contact74-2, with drain contact74-2connecting the shared drain region “D” to sense node72-2. Sense node72-2is connected to conductor80-2disposed in metal3 through metal2 by vias84-1and84-2, with conductor80-2, in-turn, being connected to cavitation plate42-2of fluid chamber40-2.

As illustrated byFIGS.3and4, space requirements for monitoring circuitry50may be minimized by sharing source “S” and drain “D” contacts between adjacent select and pulldowns FETs60and62, and by minimizing a spacing between gate poly and source/drain contacts to a minimum distance “x” according to process limitations. While a compact arrangement of sense and pulldown FETs60and62reduces required circuit area for monitoring circuitry50on fluidic die30, such a compact arrangement may be susceptible to damage from an overvoltage condition resulting from a short circuit of a fluid actuator44to a cavitation plate42, even when monitoring circuitry50is decoupled from sense nodes72(i.e., when select and pulldown FETs60and62are “disabled”).

For example, with select FETs60and pulldown FETs62sharing a drain region and drain contact74, a high voltage on a sense node54resulting from a short circuit of a fluid actuator44to a cavitation plate42may result in a high voltage (a fault voltage) at the shared drain contact74. If the fault voltage exceeds a breakdown voltage of a pn-junction between the drain region and substrate, a fault current could flow into the drain region via the drain contact74(seeFIG.7, for example) that could potentially damage the drain contact74, the shared drain region, and the gate poly of both the select FET60and the pulldown FET62. For instance, select FET60-2and pulldown FET62-2corresponding to fluid chamber40-2may be damaged if fluid actuator44-2shorts to cavitation plate42-2and places a high voltage on shared drain contact74-2via conductor80-2and sense node72-2. If select FET60-1is damaged and unable to isolate sense circuitry90from sense node72-2, monitoring circuitry50will be unable to perform monitoring of remaining operational fluid chambers40of primitive41. However, if pulldown FET62-2is damaged and rendered inoperable, monitoring circuitry50may be able to continue monitoring remaining operational fluid chambers40if select FET60-1remain operational and is able to isolate sense circuitry90from sense node72-2.

In addition to potential damage to the select and pulldown FETs themselves, damage to the gate structures of select and pulldown FETs60and62could potentially result in a fault current propagating to and damaging other portions of monitoring circuitry50, such as via the Sense_Sel and Plate_PD signal lines. Compromised gate structures could also potentially lead to damage of a source region shared by adjacent select FETs60, including the shared source contact66and source node68, and which could potentially lead to damage of sense circuitry90via sense line92. Again, such damage may result in monitoring circuit50being unable to perform monitoring of any of the fluid chambers40of primitive41.

Furthermore, a fault current flowing through a drain region and into the underlying substrate, such as a fault current flowing into substrate102through the shared drain region “D” of select FET60-2and pulldown FET64-2from shared drain contact74-2, may potentially damage the substrate and adjacent devices.

According to examples of the present disclosure, as will be described in greater detail herein, select and pulldown FETs60and62together with connection structures70are structured to form electrically conductive paths structured with electrical resistances to prevent damage to at least the select transistor from a high voltage if fluid actuators44short-circuit to cavitation plates44(or other electrodes) within fluid chambers40so that monitoring circuitry50is able to remain operational and continue monitoring operating conditions of fluid chambers40which remain operational.

FIG.5is a plan view illustrating a simplified wiring and device layout of a portion of fluidic die30ofFIG.2, according to one example, where connection structure70and select and pulldown FETs60and62together form electrically conductive paths structured with resistances to prevent damage to select and pulldown FETs60and62, and other elements of monitoring circuitry50upstream thereof, from a high voltage fault resulting from a fluid actuator44short-circuiting to a cavitation plate42.

In one example, the shared drain region (D) of the pair of select and pulldown FETs60and62for each fluid chamber40includes a lateral extension110from the column100of source (S) and drain (D) regions. The shared drain contacts74of connection structure70are disposed on lateral extension110so as to be laterally spaced from the column of source (S) and drain (D) regions100by a distance dL. Laterally spacing the shared drain contact74beyond the width, Cw, of the column100of source (S) and drain (D) regions, increases a distance between shared drain contact74and the gate poly of corresponding select and pulldown FETs60and62so as to be greater than the minimum process distance, x, which increases an electrical resistance between shared drain contacts74and the gate poly of the corresponding select and pulldown FETs60and62. Such arrangement of connection structure70and select and pulldown FETs60and62increases the electrical resistance in fashion such that a fault current resulting from a short-circuit of a fluid actuator44to a cavitation plate42is reduced in the gate regions of the corresponding select and pulldown FETs60and62and increases a resistive voltage drop across the drain region (D) between the shared drain contacts74and the gate regions such that a fault voltage at the gate region of the select and pulldown FETs60and62may be reduced to a level that prevents damage to the gate regions.

While such an arrangement may increase an amount of lateral (horizontal) space for monitoring circuitry50on fluidic die30, a potential for fault damage to monitoring circuit50in the case of a fluidic actuator44short-circuiting to a cavitation plate42is reduced or eliminated. If damage can be reduced or eliminated so that the select FET60corresponding to the fluid chamber40in which such a fault occurs remains operable to disconnect sense circuitry90from the faulted cavitation plate42, circuitry50may continue to monitor remaining fluid chambers40of primitive41which are operable.

In one example, as illustrated, the source regions (S) of select FETs60are also extended laterally beyond the conventional width, Cw, of the column of source (S) and drain (D) regions100, with source contacts66being spaced laterally therefrom by a distance, ds. By laterally spacing source contacts66of select FETs60from the column100of source (S) and drain (D) regions, an electrical resistance between the gates of FETs60and corresponding source contacts66is increased, thereby reducing a likelihood that fault damage from a short circuit between a fluid ejector44and cavitation plate42will cascade from drain contacts74to source contacts66.

FIG.6is a plan view illustrating a simplified wiring and device layout of a portion of fluidic die30ofFIG.2, according to one example, where connection structure70and select and pulldown FETs60and62together form electrically conductive paths structured with resistances to prevent damage to at least select FET60from a high voltage fault if a fluid actuator44short-circuits to cavitation plate42.

In one example, the shared drain region (D) of the pair of select and pulldown FETs60and62of each fluid chamber40is extended vertically so that a distance, x′, between shared drain contact74and the gate poly of select FET60is greater than the minimum process distance, x, between shared drain contact74and the gate poly of pulldown FET62, such as indicated with respect to select and pulldown FETs60-1and62-1. By having an asymmetrical spacing between the shared drain contact74and the gate poly of select and pulldown FETs60and62, an electrical resistance of a current path through the shared drain region (D) from shared drain contact74to the gate region of select FET60is greater than the electrical resistance of a current path through the shared drain region (D) from shared drain contact74to the gate region of pulldown FET62. As a result, a fault current from a short-circuit of a fluid actuator44to a cavitation plate42is directed away from at least the gate region of the corresponding select FET60, with a resistive voltage drop across the drain region (D) from the shared drain contact74to the gate region reducing a fault voltage to a level that prevents damage to the gate region.

If damage can be reduced or eliminated to at least select FET60so that select FET60remains operable to disconnect sense circuitry90from a faulted cavitation plate42, monitoring circuitry50may be able to continue monitoring remaining fluid chambers40of primitive41which are operable. While the arrangement ofFIG.6, reduces an amount of space required on fluidic die30relative to the arrangement ofFIG.5, and reduces a likelihood of damage to select FET60, pulldown FET62may be exposed to damage which could compromise the gate poly such that a fault current, via the Plate_PD line, could cause additional damage and render monitoring circuitry50inoperable.

FIG.7is a schematic diagram generally illustrating a select FET60and portions of connection structure70which together form an electrically conductive path for shunting a fault current away from at least select FET60to prevent damage thereto, according to one example. As described above, select and pulldown FETs60and62together with connection structures70may be arranged to form electrically conductive paths structured with electrical resistances to prevent damage to select and pulldown FETs60and62from fault currents caused by a short-circuit between fluid actuators44and cavitation plates44. However, if one of the source and drain regions of the select and pulldown FETs60and62is driven to a voltage high enough to breakdown the reverse biased diode formed by the junction between the source/drain implant region and the substrate, such as when a fluid actuator44short-circuits to a cavitation plate42, a fault current will flow through the implant region and into the substrate, such as fault current IF (illustrated by the dashed line) flowing from drain contact74through the n+ drain region of select FET60and into p+ substrate102inFIG.7. Such a fault current can damage that region of the substrate and potentially damage other nearby devices, such as by producing what is referred to as a runaway latch-up current event.

According to one example, a shunt implant region is disposed adjacent to the one of the source and drain regions of the select FET which may be exposed to a high voltage condition, with the shunt implant region having a conductivity type which is complementary to the adjacent one of the source and drain regions and which is same as that of the substrate, but at higher doping concentration, such as illustrated by p++ shunt implant region120inFIG.7which is adjacent to the n+ drain region of select FET60and which has a higher doping concentration than p+ substrate102. In one example, p++ shunt region120is connected to ground line79(seeFIG.3) via a ground contact122. Together, n+ drain region (D) and shunt implant region120form a shunt diode121.

In one example, a breakdown voltage of the p-n junction between n+ drain region (D) and p++ shunt region120is less than that of the breakdown voltage between the n+ drain region (D) and p+ substrate104. In one example, a breakdown voltage of the p-n junction between n+ drain region (D) and p++ shunt region120may be modified by adjusting a distance of a shunt gap, Sg, between shunt region120and n+ drain region (D). In one example, if the fluid actuator44of the corresponding fluid chamber40short-circuits to the cavitation plate and the high voltage of the fluid actuator44is present on drain contact74, the p-n junction between n+ drain region (D) and shunt region120will conduct before the p-n junction between n+ drain region (D) and p+ substrate102, so that at least a portion, IF′ (illustrated by the solid line) of the fault current IFis shunted away from p+ substrate102and to ground via shunt region120and ground contact122.

In examples, as illustrated below, shunt region120can be employed with or without extended drain regions (D). It is noted that for ease of illustration, a pulldown FET62sharing drain region (D) with select FET60is not shown inFIG.7.

FIG.8is a plan view illustrating a simplified wiring and device layout of a portion of fluidic die30ofFIG.3, where a shunt region120is disposed adjacent to the shared drain region (D) of select and pulldown FETs60-1and62-1. According to one example, shunt region120is connected to ground line79by a ground node124, with ground node124connected to shunt region114by a pair of ground contacts122and to ground line79by a via126, where the pair of ground contacts122reduces an electrical resistance and increases an ampacity of the connection between shunt region120and ground node124.

FIG.9is a plan view illustrating a simplified wiring and device layout of a portion of fluidic die30ofFIG.5, where a shunt region120is disposed adjacent share drain contact74-1disposed on the lateral extension110of the shared drain region (D) of select and pulldown FETs60-1and62-1. According to one example, shunt region120is connected to ground line79by a pair of ground nodes124, with ground nodes124connected to shunt region114by a pair of ground contacts122and to ground line79by via126.