Magnetic memory device including upper structure having first portion and second portion surrounding first portion and formed of material different from that of first portion, and method of manufacturing the same

According to one embodiment, a magnetic memory device includes a stacked structure including a magnetic layer, and an upper structure provided on the stacked structure, and including a first portion and a second portion surrounding the first portion and formed of material different from that of the first portion.

FIELD

Embodiments described herein relate generally to a magnetic memory device and a method of manufacturing the same.

BACKGROUND

A magnetic memory device is proposed into which transistors and magnetoresistive effect elements are integrated on a semiconductor substrate. In general, a pattern of the magnetoresistive effect element is formed by performing ion beam etching (IBE) using a hard mask as a mask.

However, if the element is made more minute, there is a risk that the hard mask could not sufficiently satisfactorily function as a mask, and thus a desired magnetoresistive effect element could not be obtained.

Therefore, it is hoped that a magnetic memory device including a hard mask which can sufficiently satisfactorily function as a mark and a method of manufacturing the same will be provided.

DETAILED DESCRIPTION

In general, according to one embodiment, a magnetic memory device includes: a stacked structure including a magnetic layer; and an upper structure provided on the stacked structure, and including a first portion and a second portion surrounding the first portion and formed of material different from that of the first portion.

Embodiments will be hereinafter described with reference to the accompanying drawings.

FIG. 1is a cross-sectional view schematically showing the structure of a magnetic memory device (semiconductor integrated circuit device) according to an embodiment.

As shown inFIG. 1, an interlayer insulating film11and a bottom electrode12are formed on a semiconductor substrate (not shown) where a transistor (not shown) is provided. On the interlayer insulating film11and the bottom electrode12, an under layer13is provided.

On the under layer13, a stacked structure20including a magnetic layer is provided. The stacked structure20functions as a magnetoresistive effect element. It should be noted that the magnetoresistive effect element is also referred to as a magnetic tunnel junction (MTJ) element.

The stacked structure20includes a storage layer (first magnetic layer)21having a variable magnetization direction, a reference layer (second magnetic layer)22having a fixed magnetization direction, a tunnel barrier layer (nonmagnetic layer)23provided between the storage layer21and the reference layer22, and a cap layer24provided on the reference layer22. It should be noted that in an example shown inFIG. 1, the storage layer21is provided on a lower layer side, and the reference layer22is provided on an upper layer side; however, the storage layer21may be provided on the upper layer side, and the reference layer22be provided on the lower layer side.

The storage layer21and the reference layer22are formed of magnetic material containing at least one of Co, Fe and Ni. For example, the storage layer21and the reference layer22are formed of CoFeB. The tunnel barrier layer23is formed of MgO. The cap layer24is formed of Ru.

If the direction of magnetization of the storage layer21is parallel to that of the reference layer22, the above magnetoresistive effect element exhibits a low resistive state. If the direction of magnetization of the storage layer21is antiparallel to that of the reference layer22, the above magnetoresistive effect element exhibits a high resistive state. Therefore, the magnetoresistive effect element can store binary information (0 or 1) in accordance with the resistive state (low resistive state and high resistive state). Furthermore, the resistive state (low resistive state and high resistive state) can be set in accordance with the direction of write current flowing in the magnetoresistive effect element.

On the stacked structure20, an upper structure30is provided.FIG. 2is a plan view schematically showing the structure of the upper structure30.

As shown inFIGS. 1 and 2, the upper structure30includes a first portion31and a second portion32surrounding the first portion31. That is, the second portion32is provided on the entire side surface of the first portion31. The second portion32is formed of material different from that of the first portion31.

The upper structure30functions as a hard mask for forming the stacked structure20. To be more specific, in the case where a pattern of the stacked structure20is formed by etching, the upper structure30is used as a hard mask. Therefore, the side surface of the stacked structure20is aligned with that of the upper structure30. Also, since an upper corner of the hard mask is easily etched at the time of forming the pattern of the stacked structure20, the upper corner of the upper structure30is rounded.

The stacked structure20and the upper structure30are covered by a protective insulating film41. The protective insulating film41is covered by an interlayer insulating film42. In a hole formed in the protective insulating film41and the interlayer insulating film42, a top electrode43is provided, which is connected to the upper structure30.

Next, the upper structure30will be explained in detail.

The second portion32of the upper structure30is harder than the first portion31thereof. That is, the second portion32is formed of material having higher hardness than that of the first portion31.

The first portion31of the upper structure30is formed of an electric conductor. For example, the first portion31is formed of metal or metal nitride. To be more specific, the first portion31is formed of tungsten (W), titanium (Ti), tungsten nitride (WN) or titanium nitride (TiN).

The second portion32of the upper structure30may be formed of an electric conductor or may be formed of an insulator or a semiconductor. For example, the second portion32is formed of carbon or carbide. To be more specific, the second portion32is formed of tungsten carbide (WC), titanium carbide (TiC), silicon carbide (SiC), nitrogen carbide (CN) or diamond-like carbon (DLC).

In the present embodiment, by virtue of the above structure, it is possible to obtain a magnetic memory device having a hard mask which can sufficiently satisfactorily function as a mask. The following explanation is further added.

As described above, the upper structure30is used as a hard mask for forming a pattern of the stacked structure20. More specifically, the pattern of the stacked structure20is formed by etching a stacked film with ion beam etching (IBE) using the upper structure30as a hard mark. Ordinarily, while rotating a substrate provided with a stacked film, an ion beam is radiated onto the stacked film in an oblique direction.

However, since IBE has a physically strong etching function, it also etches even the hard mask when etching the stacked film. As a result, there is a risk that during etching, the hard mask may be shrunk, and thus could not sufficiently function as a mark.

In the embodiment, the second portion32of the upper structure30is formed of material different from that of the first portion31, and harder than the first portion31. Thus, the etching tolerance of the second portion32, especially, the IBE tolerance, can be enhanced. In particular, the first portion31can be more reliably protected by the second portion32from the ion beam radiated in the oblique direction. It is therefore possible to obtain a magnetic memory device having a hard mask which can sufficiently satisfactorily function as a mask, and also magnetoresistive effect elements having a desired function.

Furthermore, since the first portion31is formed of an electric conductor, it is ensured that the upper structure30has conductivity. That is, an electrical connection between the stacked structure (magnetoresistive effect element)20and the top electrode43can be reliably ensured by the first portion31of the upper structure30. Furthermore, in etching, the first portion31is protected by the second portion32. Thus, an appropriate electric conductor can be selected as that forming the first portion31.

In addition, because of provision of the second portion32, the etching tolerance of the entire upper structure30can be substantially enhanced. Thus, the upper structure30can be made thinner.

Next, the method of manufacturing the magnetic memory device according to the embodiment will be explained.FIGS. 3-5are cross-sectional views schematically showing the manufacturing method of the magnetic memory device according to the embodiment.

First, as shown inFIG. 3, an interlayer insulating film11and a bottom electrode12are formed on a semiconductor substrate (now shown) where a transistor (not shown) is provided. Then, on the interlayer insulating film11and the bottom electrode12, an under layer13is formed.

Next, on the under layer13, a stacked film20aincluding a magnetic layer is formed. Specifically, a stacked film20aincluding a storage layer (first magnetic layer)21, a tunnel barrier layer (nonmagnetic layer)23, a reference layer (second magnetic layer)22and a cap layer24is formed.

Next, as shown inFIG. 4, on the stacked film20a, an upper structure30is formed. As described above, the upper structure30includes a first portion31and a second portion32which surrounds the first portion31, and which is formed of material different from that of the first portion31.

Next, the stacked film20ais etched with IBE using the upper structure30as a hard mask. Specifically, while rotating a substrate provided with the stacked film20a, an ion beam51using Ar ions or the like is radiated onto the stacked film20ain an oblique direction.

As a result, as shown inFIG. 5, a stacked structure20is formed. On the stacked structure20, the upper structure30remains. Since the upper structure30is also etched with IBE, the thickness of the upper structure30is smaller than that before etching. However, etching is restricted in the lateral direction of the upper structure30, since the second portion32, which has a high etching tolerance (IBE tolerance), is formed at an outer peripheral portion of the upper structure30. Thus, the shrinkage of the upper structure30in the lateral direction is smaller than that in a vertical direction (thickness direction). Furthermore, in this etching step, an upper corner of the upper structure30is rounded.

Next, as shown inFIG. 1, a protective insulating film41is formed to cover the stacked structure20and the upper structure30, and an interlayer insulating film42is also formed to cover the protective insulating film41. Then, a hole is formed in the protective insulating film41and the interlayer insulating film42to reach the upper structure30. Furthermore, a top electrode43is formed in the hole to contact the upper structure30. By the above way, such a magnetic memory device as shown inFIG. 1is formed.

As described above, according to the manufacturing method of the embodiment, the upper structure30is made up of the first portion31and the second portion32surrounding the first portion31. As a result, it is formed as an upper structure (hard mask)30having a high etching tolerance. Thus, the upper structure30can sufficiently function as a hard mask, and a magnetoresistive effect element having a desired function can be obtained.

It should be noted that in the above manufacturing method, although in the step as shown inFIG. 4, the stacked film20ais etched with IBE, the stacked film20amay be etched with reactive ion etching (RIE), instead of with IBE. Also, in the case of applying RIE, the same advantage as described above can be obtained.

Next, a method of forming the upper structure30will be explained.

FIGS. 6-12are cross-sectional views schematically showing a first forming method of the upper structure30. It should be noted that inFIGS. 6-12, the interlayer insulating film11and the bottom electrode12as shown inFIGS. 1 and 3-5are omitted.

First, as shown inFIG. 6, an upper layer film61is formed on a stacked film20a. The upper layer film61is formed of, for example, a silicon oxide film.

Then, as shown inFIG. 7, a hole61ais formed in the upper layer film61as a hole for formation of the upper structure30.

Next, as shown inFIG. 8, a carbide film32ais formed on an inner surface of the hole61aand the upper layer film61. In this example, as the carbide film32a, a tungsten carbide film (WC film) is applied.

Subsequently, as shown inFIG. 9, the carbide film32ais etched back. As a result, the carbide film32aremains only on the inner surface of the hole61a. The carbide film32aremaining only the inner side surface of the hole61aforms a second portion32of the upper structure30.

Next, as shown inFIG. 10, a metal film31ais formed on the upper layer film61and in the hole32awhere the second portion32is provided. The metal film31ais formed of, for example, a tungsten film (W film).

Then, as shown inFIG. 11, the metal film31ais subjected to chemical mechanical polishing (CMP) or etched back. As a result, the metal film31aremains only in the hole61awhere the second portion32is provided. The metal film31aremaining in the hole61aforms a first portion31of the upper structure30.

Thereafter, as shown inFIG. 12, the upper layer film61is removed. Thereby, an upper structure30including the first portion31and the second portion32is obtained.

FIGS. 13-18are cross-sectional views schematically showing a second forming method of the upper structure30. It should be noted that inFIGS. 13-18, the interlayer insulating film11and the bottom electrode12as shown inFIGS. 1 and 3-5are omitted.

First, as shown inFIG. 13, a carbon-contained film.71is formed on a stacked film20a. As the carbon-contained film71, for example, a carbon film is applied.

Then, as shown inFIG. 14, a hole71ais formed in the carbon-contained film71as a hole for formation of the upper structure30.

Next, as shown inFIG. 15, a metal film31ais formed on the carbon-contained film71and in the hole71a. In this embodiment, as the metal film31a, a tungsten film (W film) is applied.

Next, as shown inFIG. 16, the metal film31ais subjected to CMP. As a result, the metal film31aremains only in the hole71a.

Subsequently, as shown inFIG. 17, heat treatment (annealing treatment) is performed on the carbon-contained film71and the metal film31a. Due to this heat treatment, carbon contained in the carbon-contained film71and a metal element (tungsten in this example) contained in the metal film31areact to interdiffuse. As a result, a carbide film (a tungsten carbide film [WC film])32is formed which contains the carbon and metal element (tungsten in the example). The tungsten carbide film32forms a second portion32of the upper structure30. Furthermore, a remaining portion which remains without reacting with the carbon contained in the carbon-contained film71of the metal film31aforms a first portion31of the upper structure30.

Next, as shown inFIG. 18, the carbon-contained film71is removed. Thereby, an upper structure30including the first portion31and the second portion32is obtained. That is, the upper structure30is obtained which includes the first portion formed of a predetermined metal element (tungsten [W] in the example) and the second portion formed of carbide of the predetermined metal element (tungsten carbide [WC] in the example).

FIGS. 19-21are cross-sectional views schematically showing a third forming method of the upper structure30. It should be noted that inFIGS. 19-21, the interlayer insulating film11and the bottom electrode12as shown inFIGS. 1 and 3-5are omitted.

First, as shown inFIG. 19, a metal film is formed on a stacked film20a. In this example, as the metal film, a tungsten film (W film) is applied. Furthermore, the metal film is patterned to form a first portion31of the upper structure30.

Then, as shown inFIG. 20, on the stacked film20a, a carbide film32ais formed to cover the first portion31. In the example, as the carbide film32a, a tungsten carbide film (WC film) is applied.

Next, as shown inFIG. 21, the carbide film.32ais etched back. As a result, the carbide film32aremains only on a side surface of the first portion31. The carbide film32aremaining on the side surface of the first portion31forms a second portion32of the upper structure30. Thereby, an upper structure30including the first portion31and the second portion32is obtained.

Using the upper structure30formed by each of the first to third forming methods as a hard mark, the stacked film20ais etched, to thereby form such a magnetic memory device as shown inFIG. 1.

Next, the structure of a magnetic memory device according to a modification of the embodiment and a method of manufacturing the magnetic memory device will be explained. It should be noted that a basic structure and a basic manufacturing method of the magnetic memory device according to the modification are similar to those according to the embodiment, and explanations of matters explained with respect to the embodiment will be omitted.

FIGS. 22-26are cross-sectional views schematically showing the manufacturing method of the modification.

First, as shown inFIG. 22, as in the step as shown inFIG. 3in the above embodiment, an under layer13is formed on an interlayer insulating film11and a bottom electrode12, and a stacked film20aincluding magnetic layers is formed on the under layer13. Next, as in the step as shown inFIG. 4in the embodiment, on the stacked film20a, an upper structure30is formed. As in the above embodiment, the upper structure30includes a first portion31and a second portion32surrounding the first portion31.

Then, as in the step as shown inFIG. 4in the embodiment, the stacked film20ais etched with IBE using the upper structure30as a hard mask. Specifically, while rotating a substrate provided with the stacked film20a, an ion beam51is radiated onto the stacked film20ain an oblique direction. As a result, as shown inFIG. 23, a stacked structure20is formed.

Subsequently, as shown inFIG. 24, a first protective insulating film41ais formed to cover the stacked structure20and the upper structure30.

Then, as shown inFIG. 25, etching-hack processing is executed. In the etching-hack processing, IBE or RIE is applied. By the etching-back processing, the height of the first protective insulating film41ais decreased and part of the under layer13is removed. Also, by the etching-back processing, the thickness of the upper structure30is decreased.

Next, as shown inFIG. 26, a second protective insulating film41bis formed to cover the structure obtained in the step as shown inFIG. 25. Then, an interlayer insulating film42is formed to cover the second protective insulating film41b. Subsequently, a hole is formed in the second protective insulating film41band the interlayer insulating film42to reach the upper structure30. Furthermore, a top electrode43is formed in the hole to contact the upper structure30.

By the above way, such a magnetic memory device as shown inFIG. 26is formed.

In the modification, as in the above embodiment, the upper structure30is made up of the first portion31and the second portion32surrounding the first portion31. Therefore, the modification can also obtain the same advantage as the embodiment.

FIG. 27is a view showing a general structure of a magnetic memory device (semiconductor integrated circuit device) using magnetoresistive effect elements (MTJ elements).

In a semiconductor substrate SUB, buried gate type MOS transistors TR are formed. To be more specific, a gate electrode of a MOS transistor is used as a word line WL. To one of source/drain, regions S/D of the MOS transistor TR, a bottom electrode BEC is connected, and to the other of the source/drain regions, a source-line contact SC is connected.

On the bottom electrode BEC, a magnetoresistive effect element MTJ is formed, and on the magnetoresistive effect element MTJ, a top electrode TEC is formed. To the top electrode TEC, a bit line BL is connected. To the source-line contact SC, a source line SL is connected.

It is possible to obtain a superior semiconductor integrated circuit device by applying the structure and method explained with reference to each of the embodiment and the modification to such a semiconductor integrated circuit device as shown inFIG. 27.