In-situ photoresist strip during plasma etching of active hard mask

A method for etching features in a silicon layer is provided. A hard mask layer is formed over the silicon layer. A photoresist layer is formed over the hard mask layer. The hard mask layer is opened. The photoresist layer is stripped by providing a stripping gas; forming a plasma with the stripping gas by providing a high frequency RF power and a low frequency RF power, wherein the low frequency RF power has a power less than 50 watts; and stopping the stripping gas when the photoresist layer is stripped. The opening the hard mask layer and the stripping the photoresist layer are performed in a same chamber.

BACKGROUND OF THE INVENTION

The present invention relates to etching a silicon layer through a hard mask during the production of a semiconductor device. More specifically, the present invention relates to in-situ stripping of the photoresist after opening the hard mask.

During semiconductor wafer processing, features of the semiconductor device may be defined by a patterned hard mask. The semiconductor device features may be transferred into the hard mask using a photoresist and by plasma etching of the hard mask. After the features are transferred into the hard mask, the remaining photoresist on the hard mask may be removed.

Traditionally, separate equipments are used to open the hard mask and remove the photoresist. After the opening of the hard mask, wafers are removed from the plasma reactor and placed into a separate ashing equipment for stripping the remaining photoresist. In this case, another expensive equipment is needed solely for the stripping of the photoresist, which requires additional fabrication space and wafer processing time. Removing the wafers from the plasma chamber may cause wafers to come in contact with the environment, which may lead to modification of the etched surfaces and cause inconsistent wafer surface conditions before the stripping process.

SUMMARY OF THE INVENTION

To achieve the foregoing and in accordance with the purpose of the present invention a method for etching features in a silicon layer is provided. A hard mask layer is formed over the silicon layer. A photoresist layer is formed over the hard mask layer. The hard mask layer is opened. The photoresist layer is stripped by providing a stripping gas; forming a plasma with the stripping gas by providing a high frequency RF power and a low frequency RF power, wherein the low frequency RF power has a power less than 50 watts; and stopping the stripping gas when the photoresist layer is stripped.

In another embodiment of the invention, a method for etching features in a silicon layer is provided. A hard mask layer is formed over the silicon layer. A bottom anti-reflection coating layer is formed over the hard mask layer. A photoresist layer is formed over the bottom anti-reflection coating layer. The bottom anti-reflection coating layer is opened. The hard mask layer is opened. The bottom anti-reflection coating layer and the photoresist layer are stripped by providing a stripping gas; forming a plasma with the stripping gas by providing a high frequency RF power and a low frequency RF power, wherein the low frequency RF power has a power less than 50 watts; and stopping the stripping gas when the photoresist layer is stripped.

In yet another embodiment of the invention, an apparatus for etching features in a silicon layer, wherein the silicon layer is under a hard mask layer, which in turn is under a photoresist layer, is provided. The apparatus comprises a plasma processing chamber, a gas source, and a controller.

The plasma processing chamber comprises a chamber wall forming a plasma processing chamber enclosure; a substrate support for supporting a substrate within the plasma processing chamber enclosure; a pressure regulator for regulating the pressure in the plasma processing chamber enclosure; at least one electrode for providing power to the plasma processing chamber enclosure for sustaining a plasma; at least one RF power source electrically connected to the at least one electrode; a gas inlet for providing gas into the plasma processing chamber enclosure; and a gas outlet for exhausting gas from the plasma processing chamber enclosure.

The gas source is in fluid connection with the gas inlet of the plasma processing chamber, and comprises an opening gas source; and a stripping gas source.

The controller is controllably connected to the gas source and the at least one RF power source of the plasma processing chamber, and comprises at least one processor; and computer readable media, which comprises computer readable code for opening the hard mask layer; and computer readable code for stripping the photoresist layer, which comprises computer readable code for providing a stripping gas; computer readable code for forming a plasma with the stripping gas by providing a high frequency RF power and a low frequency RF power, wherein the low frequency RF power has a power less than 50 watts; and computer readable code for stopping the stripping gas when the photoresist layer is stripped.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

To facilitate understanding,FIG. 1is a high level flow chart of a process used in an embodiment of the invention. A hard mask layer is formed over a silicon layer (step100). The silicon layer may be polysilicon, crystalline silicon, such as a silicon wafer, amorphous silicon, or any other types of silicon. The silicon layer is generally a pure silicon, which may have a dopant.

A bottom anti-reflection coating (BARC) layer is formed over the hard mask layer (step110). The bottom anti-reflection coating layer is optional. In another embodiment, the bottom anti-reflection coating layer may not be used. A photoresist layer is formed over the bottom anti-reflection coating layer (step120). The photoresist layer consists of features, which will eventually be etched into the silicon layer.

The stack that includes the silicon layer, the hard mask layer, the bottom anti-reflection coating layer, and the photoresist layer is placed in a processing chamber (step130). The bottom anti-reflection coating layer is opened using an opening gas (step140). This process involves plasma etching the bottom anti-reflection coating layer to transfer the features defined in the photoresist layer into the bottom anti-reflection coating layer. The hard mask layer is then opened using an opening gas (step150). This process involves plasma etching the hard mask layer to transfer the features defined in the photoresist layer into the hard mask layer.

The remaining photoresist layer and bottom anti-reflection coating layer are removed or stripped (step140). In one embodiment, a low bias power process with oxidation chemistry is used to strip the remaining photoresist and bottom anti-reflection coating layers immediately or shortly after the opening of the hard mask. The stripping gas may comprise O2, N2, or H2, and may have a halogen addition.

The opening of the bottom anti-reflection coating layer and the hard mask layer (steps140and150) and the stripping of the photoresist layer and the bottom anti-reflection coating layer (step160) are performed in-situ, in the same plasma chamber. Thereafter, the stack with the silicon layer and the opened hard mask layer are removed from the chamber (step170). Now the silicon layer is ready to be patterned using the hard mask layer. In one embodiment, the stack with the silicon layer and the opened hard mask layer is placed in another plasma processing chamber. The features are then etched into the silicon layer to define active areas (step180). The hard mask is then completely removed (step190).

FIG. 2is a schematic view of a plasma reactor that may be used in practicing the invention. In one or more embodiments of the invention, a plasma reactor200comprises a top central electrode206, top outer electrode204, bottom central electrode208, and a bottom outer electrode210, within a chamber wall250. A top insulator ring207insulates the top central electrode206from the top outer electrode204. A bottom insulator ring212insulates the bottom central electrode208from the bottom outer electrode210. Also within the plasma reactor200, a substrate280is positioned on top of the bottom central electrode208. Optionally, the bottom central electrode208incorporates a suitable substrate chucking mechanism (e.g., electrostatic, mechanical clamping, or the like) for holding the substrate280.

A gas source224is connected to the plasma reactor200and supplies opening and stripping gas into a plasma region240of the plasma reactor200. In this example, the gas source224comprises an opening gas source264and a stripping gas source268. The opening gas source264supplies gas for opening the hard mask layer. The stripping gas source268supplies gas for stripping or removing the remaining photoresist layer on the hard mask layer after the hard mask is opened.

A high frequency RF source252and a low frequency RF source254are electrically connected to the plasma reactor200through a controller235to provide power to the electrodes204,206,208, and210. The high frequency RF source252generates high frequency RF power and supplies the high frequency RF power to the plasma reactor200. Preferably, the high frequency RF power has a frequency greater than or equal to 20 mega Hertz (MHz). More preferably, the high frequency RF power has a frequency greater than or equal to 27 MHz. Even more preferably, the high frequency RF power has a frequency greater than or equal to 60 MHz.

The low frequency RF source254generates low frequency RF power and supplies the low frequency RF power to the plasma reactor200. Preferably, the low frequency RF power has a frequency less than or equal to 20 mega Hertz (MHz). More preferably, the low frequency RF power has a frequency less than or equal to 10 MHz. Even more preferably, the low frequency RF power has a frequency less than or equal to 2 MHz.

The controller235is connected to the gas source224, the high frequency RF source252, and the low frequency RF source254. The controller235controls the flow of the opening and stripping gas into the plasma reactor200, as well as the generation of the RF power from the high frequency RF source252, the low frequency RF source254, the electrodes204,206,208, and210, and the exhaust pump220.

In this example, confinement rings202are provided to provide confinement of the plasma and gas, which pass between the confinement rings and are exhausted by the exhaust pump220.

FIGS. 3A and 3Billustrate a computer system, which is suitable for implementing the controller235used in one or more embodiments of the present invention.FIG. 3Ashows one possible physical form of the computer system300. Of course, the computer system may have many physical forms ranging from an integrated circuit, a printed circuit board, and a small handheld device up to a huge super computer. Computer system300includes a monitor302, a display304, a housing306, a disk drive308, a keyboard310, and a mouse312. Disk314is a computer-readable medium used to transfer data to and from computer system300.

FIG. 3Bis an example of a block diagram for computer system300. Attached to system bus320is a wide variety of subsystems. Processor(s)322(also referred to as central processing units, or CPUs) are coupled to storage devices, including memory324. Memory324includes random access memory (RAM) and read-only memory (ROM). As is well known in the art, ROM acts to transfer data and instructions uni-directionally to the CPU and RAM is used typically to transfer data and instructions in a bi-directional manner. Both of these types of memories may include any suitable of the computer-readable media described below. A fixed disk326is also coupled bi-directionally to CPU322; it provides additional data storage capacity and may also include any of the computer-readable media described below. Fixed disk326may be used to store programs, data, and the like and is typically a secondary storage medium (such as a hard disk) that is slower than primary storage. It will be appreciated that the information retained within fixed disk326may, in appropriate cases, be incorporated in standard fashion as virtual memory in memory324. Removable disk314may take the form of any of the computer-readable media described below.

CPU322is also coupled to a variety of input/output devices, such as display304, keyboard310, mouse312, and speakers330. In general, an input/output device may be any of: video displays, track balls, mice, keyboards, microphones, touch-sensitive displays, transducer card readers, magnetic or paper tape readers, tablets, styluses, voice or handwriting recognizers, biometrics readers, or other computers. CPU322optionally may be coupled to another computer or telecommunications network using network interface340. With such a network interface, it is contemplated that the CPU might receive information from the network, or might output information to the network in the course of performing the above-described method steps. Furthermore, method embodiments of the present invention may execute solely upon CPU322or may execute over a network such as the Internet in conjunction with a remote CPU that shares a portion of the processing.

To facilitate understanding of the invention,FIG. 4Ais a schematic cross-sectional illustration of a stack400with a silicon layer410. Eventually, features will be etched into this silicon layer to define active areas. The silicon layer410is generally pure silicon, not silicon oxide or silicon nitride. In this example, the silicon layer410is a silicon wafer or silicon substrate. A hard mask layer420is formed over the silicon substrate410(step100). In this embodiment, the hard mask layer420may be silicon-based. For example, the hard mask layer420may be dielectric materials, such as SiO2, SiON, or Si3N4. The hard mask layer420may comprise a single layer of a particular material or multiple layers of different materials and has a thickness. For example, in the embodiment shown inFIG. 4A, the hard mask layer420comprises a layer of SiO2422of approximately 1000 Angstrom in thickness over a layer of Si3N4421of approximately 1000 Angstrom in thickness.

A bottom anti-reflection coating layer430is formed over the hard mask layer420(step110), as shown inFIG. 4B. Typically, a bottom anti-reflection coating layer430is formed between a material layer (in this case, the hard mask layer420) that is to be patterned on a semiconductor structure using photolithography and an overlying photoresist layer (see step120andFIG. 4Cbelow) in order to suppress the reflections from the material layer surface into the photoresist layer that may degrade the patterning. The bottom anti-reflection coating layer430is optional. In another embodiment, the bottom anti-reflection coating may not be used. The bottom anti-reflection coating layer430, is present, has a thickness. For example, in the embodiment shown inFIG. 4B, the bottom anti-reflection coating layer430has a thickness of approximately 900 Angstrom.

A photoresist layer440with features is formed over the bottom anti-reflection coating layer430(step120), as shown inFIG. 4C. Photoresist is a light-sensitive material. Features or patterns are transferred to the photoresist from a photomask using light. In one embodiment, the photoresist is a polymeric material.

The stack400that includes the silicon substrate410, the hard mask layer420, the bottom anti-reflection coating layer430, and the photoresist layer440is placed in the plasma reactor200(step130). First, the bottom anti-reflection coating layer430is opened (step140), as shown inFIG. 4D. The features or patterns defined in the photoresist layer440are transferred to the bottom anti-reflection coating layer430. In the embodiment shown inFIG. 4D, after the bottom anti-reflection coating layer430is opened, slight recesses423are formed into the SiO2underlying layer422, which is a part of the hard mask layer420, at the bottom of the features. Next, the hard mask layer420is opened (step150), as shown inFIG. 4E. The features defined in the photoresist layer440are continued to be transferred to the hard mask layer420. If the hard mask layer420comprises multiple layers421,422of different materials, as in the embodiment shown inFIG. 4E, then the features are transferred to all layers421,422of the hard mask layer420.

In this embodiment, to open the hard mask layer420(step150), an opening gas is flowed into the plasma reactor200. The opening gas may comprise CF4, CHF3, O2, or Ar. A high frequency RF source252supplies RF power to the plasma reactor200at a frequency greater than or equal to 20 MHz. Preferably, the high frequency RF power has a frequency greater than or equal to 27 MHz. Preferably, the high frequency RF power supplies RF power between approximately 150 watts and 800 watts. A low frequency RF source254supplies RF power to the plasma reactor200at a frequency less than or equal to 20 MHz. Preferably, the low frequency RF power has a frequency of approximately 2 MHz. Preferably, the low frequency RF power supplies RF power between approximately 300 watts and 1200 watts. The opening gas is formed into a plasma. The plasma is used to open the hard mask430. Once the features are opened in the hard mask layer430, the flow of the opening gas is stopped.

For example, the following is a specific recipe that may be used for the opening of the hard mask layer420(step150) in the embodiment shown inFIG. 4E: pressure at 120 miliTorr; the high frequency RF power source252supplying 150 watts of RF power at 27 MHz frequency; the low frequency RF power source254supplying 750 watts of RF power at 2 MHz frequency; and the opening gas flow comprises 600 sccm of Ar, 110 sccm of CF4, 20 sccm of CHF3, and 16 sccm of O2.

The remaining photoresist layer440and bottom anti-reflection coating layer430over the hard mask layer420are stripped (step160).FIG. 4Fis a schematic cross sectional view of the stack400after the photoresist layer440and the bottom anti-reflection coating layer430are removed. Thus, only the silicon substrate410and the hard mask layer420remain. In this embodiment, a stripping gas is flowed into the plasma reactor200. In one embodiment, the stripping gas comprises at least O2, N2, or H2. For example, the stripping may gas comprise at least NH3, O2, and CO or CO2. A high frequency RF source252supplies high frequency RF power to the plasma reactor200. Preferably, the high frequency RF power has a frequency greater than or equal to 20 MHz. More preferably, the high frequency RF power has a frequency greater than or equal to 27 MHz. Even more preferably, the high frequency RF power has a frequency greater than or equal to 60 MHz. Preferably, the high frequency RF power supplies RF power between approximately 200 watts and 800 watts. More preferably, the high frequency RF power supplies RF power at approximately 300 watts. A low frequency RF source254supplies low frequency RF power to the plasma reactor200. Preferably, the low frequency RF power supplies RF power between 0 to 600 watts. More preferably, only a small amount, such as less than or equal to 50 watts, of low frequency RF power is supplied to the plasma reactor200. More preferably, no low frequency RF power is supplied to the plasma reactor200.

The stripping gas is formed into a plasma, which is used to strip away the remaining photoresist layer440and bottom anti-reflection coating layer430. The stripping of the photoresist layer440and the bottom anti-reflection coating layer430is done in-situ. The photoresist layer440and the bottom anti-reflection coating layer430are stripped away while the wafer remains in the same plasma chamber where the bottom anti-reflection coating layer430and the hard mask layer420are opened and shortly after the hard mask layer420is opened. Once the photoresist layer440and bottom anti-reflection coating layer430are completely removed, the flow of the stripping gas is stopped.

For example, the following is a specific recipe that may be used for the stripping of the photoresist layer440and the bottom anti-reflection coating layer430(step160) in the embodiment shown inFIG. 4F: pressure at 300 miliTorr; the high frequency RF power source252supplying 300 watts of RF power at 27 MHz frequency; and the stripping gas flow comprises 1000 sccm of O2and 50% center weighting of gas feeding (gases are normally fed into the processing chamber via two different paths: center and edge).

The stack400that includes the silicon substrate410and the opened hard mask layer420is removed from the plasma reactor200(step170). Features411are etched into the silicon substrate410through the opened hard mask layer420(step180). The recipe used for etching depends on the type of material that has to be etched. In this embodiment, because the substrate410is silicon, an appropriate recipe suitable for etching silicon material should be chosen. An etch gas is flowed into the etch chamber and one or more types of RF powers are supplied to the etch chamber to form the etch gas into a plasma, which is used to etch the silicon substrate410. Once the etching is complete, the flow of the etch gas is stopped.FIG. 4Gis a schematic cross-sectional view of the stack400after the features411have been etched into the silicon substrate410to define active areas.

The remaining hard mask layer420is removed (step190). A normal organic layer stripping process, such as phosphoric acid (H3PO4) may be used.FIG. 4His a schematic cross-sectional view of the stack400after the hard mask layer420has been stripped. Only the silicon substrate410with features remains.

In the above example, the opening of the bottom anti-reflection coating layer430and the hard mask layer420and the stripping of the photoresist layer440and the bottom anti-reflection coating layer430after the hard mask layer420is opened are performed in-situ, i.e., in the same plasma processing chamber. The etching of the silicon substrate410and the stripping of the hard mask layer420after the silicon substrate410is etched are performed elsewhere in separate equipments. Alternatively, in another example, all five steps, the opening of the bottom anti-reflection coating layer430(step140), the opening of the hard mask layer420(step150), the stripping of the remaining photoresist layer440and bottom anti-reflection coating layer430(step160), the etching of the silicon substrate410(step180), and the stripping of the hard mask layer420(step190), may be done in-situ.

The present invention applies to various types of etching processes, such as via etching and trench etching. The present invention has many benefits. For example, it has been found that not using a low frequency RF power or using only a small amount of the low frequency RF power during the stripping of the photoresist layer after opening the hard mask prevents the hard mask from top corner rounding or faceting. The reduction of faceting of the hard mask has been found to reduce faceting of the etched features. Higher frequency RF plasma ashing provides higher efficiency in removing polymer deposits from the sidewall of the etched features in the hard mask layer.

It has also been found that this example extends mean time between cleanings. After each hard mask open process, waferless cleaning of chamber with oxidation chemistry is performed to keep the inside of reactor clean. During the cleaning, fluorine-containing polymer deposits accumulated on reactor wall after HMO processes are removed. Although waferless cleaning is performed after every wafer, wet cleaning is required periodically by dissembling the reactor parts and scrubbing the contaminants from the surfaces of reactor parts using liquid solvents. In-situ stripping of the photoresist layer extends the mean time between wet cleaning because both stripping and cleaning use the same oxidation chemistry. Consequently, the possibility of particle issues caused by polymer flakes peeled off from reactor wall surfaces is reduced.