A novel parallel optical module having combined optical signal transmit and receive function for high-speed performance. The optical module includes a plurality, e.g., sixteen 10-Gb/s transmitter and receiver channels for a 160-Gb/s bidirectional aggregate data rate. The module utilizes a single-chip CMOS optical transceiver containing both transmitter and receiver circuits. 16-channel high-speed photodiode (PD) and VCSEL arrays are flip-chip attached to the low-power CMOS IC. The substrate emitting/illuminated VCSEL and PD arrays operate at 985 nm and include collimating lenses integrated into the backside of the substrate. The IC-OE assembly is then flip-chip attached to a high density organic package forming the transceiver optical module. The exclusive use of flip-chip packaging for both the IC-to-optoelectronic (OE) devices and for the IC-to-organic package minimizes the module footprint and associated packaging parasitics.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates generally to optical transceiver devices, and particularly, an optical transceiver device exhibiting improved frequency and power consumption characteristics for board-level, high-bandwidth interconnects for high-end computing systems.

2. Description of the Prior Art

Interconnect bandwidth requirements within high-performance computing and switch/router systems continue to increase, driven by increasing processor speeds, more processors per system, and wider high-speed data buses. Parallel optical links between modules on the same circuit board or between boards through a backplane hold the promise of simultaneously optimizing critical interconnect parameters: data throughput, density, power consumption, and latency. Optics can also potentially support longer link lengths than electrical interconnects.

As described in L. Schares et al., “Terabus: Tb/s-class card-level optical interconnect technologies,” IEEE J. Select. Topics Quantum Electron, Special Issue on Optoelectronic Packaging, Vol. 12, No. 5, September/October 2006, there currently exists the Terabus program that aims in developing technologies for high-speed, dense, low-power inter-chip optical interconnects using printed circuit boards with integrated optical waveguides.

One current implementation of the Terabus architecture particularly incorporates 985 nm optoelectronic components (OEs), with the OE being flip-chip attached to the IC, and the ICs being “flip-chip” attached to an underlying Silicon carrier (SC).FIG. 1illustrates the Silicon carrier performing multiple functions including: 1) a packaging platform for connecting the IC-OE assembly to an underlying printed circuit board (PCB), 2) a function for routing the high-speed inputs/outputs of the transmitters/receivers from the top of the carrier through vias to the bottom surface for connection to the host circuit board; and, 3) a function for providing an optical through hole that allow low-loss optical coupling to waveguides fabricated on an underlying printed circuit board (PCB). The actual link10depicted inFIG. 1, is shown in demonstrate key points including: the capability of the SC technology to connect OEs to ICs through relatively long transmission lines with relatively no or minimal impact on their high-speed operating performance; and, 2) the ability of CMOS analog front-end circuits to enable low-cost and low-power fiber-optic data interconnects.

In the architecture described in the above-mentioned L. Schares et al. reference, as shown inFIG. 1, the link10consists of a separate transmitter assembly15comprising silicon carrier (SC)17attached to CMOS laser diode driver (LDD)18. An open cavity fabricated in the silicon carrier accommodates the direct attachment of a 985 nm Vertical-Cavity Surface-Emitting Laser (VCSEL)19to the CMOS laser diode driver (LDD). The light output of VCSEL19is launched into optical waveguides20fabricated on printed circuit board (PCB), the output of which is coupled to a photodiode (PD)25within a separate receiver assembly30. The receiver assembly30comprises a silicon carrier (SC)23, similar to the transmitter SC17, however, attached to CMOS receiver IC24, which is attached to PD25.

In the architecture depicted inFIG. 1, the separated transmitter IC18and receiver IC24were fabricated in the IBM CMOS 8RF-LM technology, an industrial 0.13 μm process such as described in the reference to Kucharski et al. entitled “A 20 Gb/s VCSEL driver with pre-emphasis and regulated output impedance in 0.13 um CMOS,”IEEE ISSCC, pp. 222-223, February 2005. The core circuitry of both ICs occupies an area of 250 μm×350 μm. The laser diode driver (LDD) consumes 100 mW from 3.3 V (used to supply the VCSEL bias) and 2 V (used for the core circuitry) power supplies. The receiver IC consists of a TIA with a 5-stage post amplifier (PA) followed by a buffer as is fully described in the reference to C. L. Schow et al. entitled “A 15-Gb/s, 2.4-V Optical Receiver Using a Ge-on-SOI Photodiode and a CMOS IC,”IEEE Photon. Technol. Lett., in press. With a supply voltage of 2.2 V, the 3 dB bandwidth is 6.6 GHz and it consumes 70 mW at 10 Gb/s.

However, notwithstanding the efforts of the Terabus program, it would be highly desirable to provide a single-chip version of the optical interconnect that includes a single optical transceiver device capable of providing a plurality of transmitter channels and a plurality of receiver channels with each channel achieving data rates in excess of 10 Gb/s and, further, achieves extremely high area efficiency as compared with any parallel optical transmitter, receiver, or transceiver currently available.

SUMMARY OF THE INVENTION

The present invention is directed to a single-chip, optical transceiver component for high-bandwidth applications.

More particularly, the invention is directed to a single-chip CMOS transceiver module that supports an aggregate data rate in excess of about 160 Gb/s with sixteen receiver and sixteen transmitter channels that each operate at about 10 Gb/s with significant margin. The transceiver assembly occupies an area of about 17 mm2and consumes a total of about 2.5 W. At 10 Gb/s/channel, the power consumption per complete link (transmitter and receiver combined) is about 15 mW/Gb/s.

Thus, according to one aspect of the present invention, there is provided a single-chip transceiver device capable of channel rates in excess of 10 Gb/s and achieving the highest area efficiency (about 9.4 Gb/s/mm2) of any parallel optical transmitter, receiver, or transceiver reported to-date.

More particularly, there is provided an optical transceiver apparatus for processing high speed optical signals. The apparatus comprises:

an optoelectronic (OE) module comprising a first array of optical signal detector devices for receiving optical signals from an optical signal carrying device, and a second array of optical signal emitting devices for generating optical signals for output to an optical signal carrying device; and,

a single integrated circuit (IC) including a transceiver having a first array of receiver/amplifier circuits adapted for receiving and amplifying the detected optical signals, and a second array of driver circuits for use in generating optical signals for output transmission, the optoelectronic module flip-chip attached to the single integrated circuit to form an IC-OE assembly having combined optical signal transmit and receive function,

wherein the optical transceiver apparatus is of reduced footprint and exhibits enhanced bidirectional data rates.

Further to this embodiment, the optical transceiver apparatus further comprises: a chip carrier assembly for flip-chip mounting the IC-OE assembly to form the optical transceiver apparatus, the flip-chip mounting providing electrical contacts from the IC to the chip carrier.

Further to this embodiment, the first array of optical signal detector devices comprises an array of photodetector (PD) elements for receiving the optical signals. Preferably, the PD element is formed on a substrate that is transparent to the signal wavelength.

Further to this embodiment, the second array of optical signal emitting devices comprises an array of Vertical-Cavity Surface-Emitting Laser (VCSEL) elements for generating the optical signals. Preferably, the VCSEL elements are formed on a substrate that is transparent to the signal wavelength.

In one embodiment, a lens array is integrated into the transparent substrate of the VCSEL on the surface opposite the VCSEL devices, and with lens elements corresponding to each VCSEL device.

Likewise, in another embodiment, a lens array is integrated into the transparent substrate of the photodiode, with lens elements corresponding to each photodiode device.

In one embodiment, the substrate emitting/illuminated VCSEL and PD arrays operate at 985 nm, however, dependent upon the substrate materials may operate at a range of light frequencies from infrared (IR) to ultraviolet (UV) range.

Advantageously, the optical transceiver device of the invention may be utilized with a chip carrier assembly configured for coupling light signals to/from an optical signal carrying device such as a circuit card having optical waveguides or, having an optical fiber array. Moreover, the single IC transceiver architecture having both optical transmit and optical channels receivers provides more functionality and higher level of integration. The carrier is lower cost and packaging is also less costly due to relaxed alignment tolerances.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

The present invention is directed to a single-chip, CMOS optical transceiver that utilizes technology including: 1) high-speed, low-power CMOS analog amplifier circuits, 2) efficient, high-speed substrate illuminated/emitting photodiode (PD) and VCSEL arrays that operate at 985 nm; and, 3) exclusive use of flip-chip packaging to minimize both the module footprint and associated packaging parasitics.

FIG. 2depicts a side plan view of the complete transceiver package including the assembled CMOS optical transceiver module110of the invention and a flip-chip attached OE module120comprising both PD and VCSEL arrays with integrated backside lenses (as well as assembly alignment features). The OE module120flip-chip attached to the optical transceiver module110is assembled using conventional chip attachment processes as described in E. M. Davis, W. E. Harding, R. S. Schwartz, J. J. Corning, “Solid Logic Technology: Versatile High Performance Microelectronics,” IBM Journal of Research and Development, p. 102, 1964, incorporated by reference as if fully set forth herein. As shown inFIG. 2, the optical transceiver module110having the flip-chip attached OE module120is mounted directly onto an organic chip carrier150to form the transceiver optical module “optomodule”100that is subsequently attached to a circuit board200(alternately referred to as “Optocard”) with integrated optical waveguides.

More particularly, the OE arrays are flip-chip attached to the CMOS IC, which is then flip-chip attached to the organic laminated high density circuit card or “carrier”150to form the optomodule100which can then be directly surface mounted to an FR4 circuit board200with integrated waveguides117to simultaneously provide the electrical and optical interconnection. A ball grid array (BGA) solder process similar to that used for conventional chip-carriers provides the electrical contacts while a lens array incorporated onto the waveguides provides the optical connectivity.

In one embodiment, the optomodule carrier150is assembled directly onto an organic circuit board200having integrated waveguides (Optocard), that, in one embodiment, incorporates 32-channel polymer waveguides117on a 62.5-μm pitch, for example, with core dimensions 35 μm×35 μm, for example. It is understood that the invention is not so limited to 16 transmit/16 receive channels, thus, the Optocard200may incorporate less than or more than 32-channel polymer waveguides. Moreover, as will be described in greater detail herein with respect toFIG. 7, the Optocard200may incorporate a 32-channel fiber optic array with corresponding focusing lenses.

FIGS. 3A and 3Bdepict respective edge and top views of the transceiver IC110with flip-chip attached OE module120. As shown inFIGS. 3A and 3B, the OE module120comprises two separate arrays of optoelectronic components, a laser diode array, e.g., VCSEL array120a, comprising a two-dimensional (2-D) array of VCSEL elements122each configured to have a respective focusing lens124of a lens array130afor coupling optical signals to a waveguide array, and, an array of photodetectors, e.g., photodiode array120b, comprising a two-dimensional (2-D) array of photodiode elements126each configured to have a respective focusing lens128of a lens array130bfor receiving optical signals from a waveguide array. The photodetector device, e.g., photodiode126, of the photodiode array120bis formed on a substrate that is transparent to the signal wavelength, and in one non-limiting example, may include InP or GaAs or like transparent semiconductor material. Similarly, the laser diode device, e.g., VCSEL122of the laser diode driver array120ais formed on a substrate that is transparent to the signal wavelength, and in one non-limiting example, may include InP or GaAs or like transparent semiconductor material.

Furthermore, the transparent substrate may be glass or plastic material. In one embodiment, laser diode devices on thinned semiconductor substrates or photodiode devices on thinned semiconductor substrates, are attached to the glass or plastic substrate. In this embodiment, the VCSEL or photodiode devices are transferred to the glass or plastic substrate following their fabrication on a semiconductor substrate. The fabrication process involves, first the fabrication of the VCSEL devices on the typical semiconductor substrate, such as GaAs or InP. As in typical semiconductor fabrication processes, the VCSEL active devices are formed within a thin epitaxial layer on the semiconductor substrate. The device layer is then attached to the glass or plastic substrate, and the semiconductor substrate is removed by a polishing or chemical means. This fabrication process produces a thin layer of active VCSEL devices on the glass or plastic substrate. Photodiode devices on glass or plastic substrates can also be fabricated in a similar process. In this embodiment, the signal wavelength is not limited to wavelengths where the semiconductor substrate is transparent. For example, a glass substrate, including fused silica, can be transparent to wavelengths from infrared (IR) to the ultraviolet (LTV).

As shown inFIG. 4A, each focusing lens128of a lens array130bis integrated into the backside of the transparent OE substrate129and is dimensioned for focusing received optical signals (light)141onto the OE component, in this case, the photodiode126of the OE array120b. Similarly, as shown inFIG. 4B, each focusing lens128of a lens array130ais integrated into the backside of the transparent OE substrate129and is dimensioned for collimating light output146from the OE laser diode126of the OE array120a.

Returning back toFIG. 3B, the lens arrays130a,130beach comprise a 4×4 array in a staggered 2-D lens array configuration and array pitch compatible for coupling to a waveguide array, or alternately to optical fiber. Thus, the optomodule provides sixteen (16) optical signal receive channels and sixteen optical signal transmit channels for communication. However, it is understood that the invention is not so limited. For example, the arrays may be configured in a uniform (non-staggered) configuration and may comprise more or less array elements depending upon the application or intended use and/or design considerations. Additionally shown inFIG. 3B, formed on the transceiver IC110are a plurality140of electrical bonding pads142, e.g., comprising individual solder connections for electrically coupling I/O, power and control signals to the carrier150and optoelectronic arrays120a,120b. For instance, the following voltages may be applied to the core circuits including, but not limited to: 1.8 V for the LDDs, 2.0 V RX circuits, and 2.8 V for the LDD output stages, for example, to accommodate the approximately 1.5V built-in voltage drop across the VCSELs. The total core power consumption, including both transmitter and receiver, is 2.5 W, in the exemplary embodiment depicted.

As will be explained in greater detail hereinbelow, the flip-chip mounting of the IC-OE assembly to the carrier provides electrical contacts for enabling signal communication between the IC to the carrier.

FIG. 5depicts a conceptual block diagram of the transceiver IC110of the optomodule100. As shown inFIG. 5, the IC110includes a two-dimensional laser driver array160and a proximately located two-dimensional receiver/amplifier array180.FIG. 5further illustrates a detailed view of an individual laser diode driver circuit161of the laser driver array160that includes a laser diode driver having outputs electrically connected to an individual laser diode element, e.g., VCSEL element122of the VCSEL array120a, for generating an optical signal for transmission therefrom. Likewise,FIG. 4illustrates a detailed view of an amplifier circuit181of the receiver/amplifier array180that includes a trans-impedance/limiting amplifier circuit185having inputs electrically connected to an individual photodetector element, e.g., photodiode126of the PD array120b, for receiving/amplifying signals as detected by the photodiode.

As further shown inFIG. 5, formed on the opposing edges of transceiver IC110are respective pluralities190a,190bof electrical bonding pads142, e.g., comprising individual solder connections for electrically coupling signals between the IC and carrier150(FIG. 2). For example, with respect to each laser diode driver circuit161of the laser driver array160shown inFIG. 5, two bonding pads192are conductively coupled to the input of each driver circuit161for providing laser diode driving signals166. These input drive signals166may be generated off chip, and may be received at the laser driver array160via the carrier by virtue of the flip-chip connection between the IC-OE assembly and the carrier (FIG. 2). In a similar manner, with respect to each receiver/amplifier circuit181of the receiver/amplifier array180shown inFIG. 5, two bonding pads194are conductively coupled to the output of each amplifier circuit181for providing the electronic signals186corresponding to the received optical signals at the photodetector (e.g., photodiode126). These output signals186may be communicated from the receiver/amplifier array180to the carrier by virtue of the flip-chip connection between the IC-OE assembly and the carrier (FIG. 2). It is understood that while input drive signals166and detected output signals186are differential, e.g., may be opposite polarity signals, they may be only one signal input or output dependent upon the applications and configuration of the arrayed elements in respective OE arrays120a,120b.

FIG. 6depicts an internal, micrographic view showing an example embodiment of a 16+16 channel transceiver IC110of the optomodule100including flip-chip connected OE laser diode array120a, photodiode array120b.FIG. 6particularly depicts the provision of transmission lines198leading from the respective 2-D driver array160to peripheral bond pads190a,190band, transmission lines199leading from respective 2-D receiver/amplifier array180to the peripheral bond pads190a,190b.

Architecture of CMOS Transceiver Chip

An example transceiver IC110was fabricated by IBM Corporation using 0.13-μm CMOS technology, and included sixteen independent laser-diode driver (LDD) circuits and sixteen receiver/amplifier (RX) circuits arrayed in two separate 4×4 blocks with a 250-μm×350-μm pitch. Differential 100-Ω microstrip transmission lines are provided that connect the inputs (outputs) of the LDD (RX) circuits to bond pads arranged on the long sides of the transceiver chip in a GSSG configuration. The 100-μm diameter pads on a 200-μm pitch are compatible with current high-volume industrial flip-chip attachment such as the IBM C-4 process, as described in E. M. Davis, et al. This pad configuration additionally allows all channels to be characterized using standard co-planar microwave probes at the IC level. In one embodiment, power and control signals for the transmitter and receiver sections of the chip are connected to bond pads at the short edges of the chip. In one embodiment, the transceiver chip measures 5.25 mm by 3.25 mm. The optical transceiver110in the described embodiment is designed for use in conjunction with the 985-nm OE elements, however this is dependent upon the transparent substrate material (optical response) upon which the OE elements are formed. The TX or RX portion of the transceivers utilize 16 channels: 4×4 OE arrays. It is understood that a 500-μm separation between the TX and RX portions of the transceiver is sufficient to minimize TX-RX crosstalk and allow for dicing tolerance, however, this degree of separation is configurable.

Although not explicitly shown in the figures, a multi-step assembly process of the Optomodule110is now described: In an example embodiment, the OEs are provided with Au pads that are bonded to the IC bond pads using Eutectic AuSn (e.g., 80% Au, 20% Sn) solder deposited on the IC pads. The melting temperature of eutectic AuSn is about 278° C. during reflow and >400° C. after reflow. This enabled the sequential flip-chip attachment of the OEs to the IC. The IC110was subsequently flip-chip attached to the carrier150using eutectic SnPb (e.g., 63% Sn, 37% Pb) solder with a melting temperature of 183° C. As known to skilled artisans, underfill may be applied to the IC-carrier solder interface to enable future BGA attachment of the Optomodule100to the Optocard200using eutectic SnPb solder.

Referring back toFIG. 6particularly, the OE-IC assembly comprising the 4×4 PD and VCSEL arrays120a,120bis flip-chip attached to the center of IC. The configuration of lenses124,128in respective arrays130a,130bthat are integrated into the backside of the respective InP (PD) and GaAs (VCSEL) substrates have a lens pitch that is the same 250-μm×350-μm pitch as in the IC. A small offset, e.g., 62.5-μm, may be applied to each row in the 350-μm direction to allow the 2-dimensional array of OE devices to be coupled to a 1-dimensional array of waveguides on a 62.5-μm pitch, for example.

Returning toFIG. 2, the carrier150is designed to provide high density bond pads153on the top surface151for attachment to the IC (e.g., 100-μm pads on a 200-μm pitch) and standard BGA pads154on the bottom surface152(e.g., 0.5-rum pads on 1.0-mm pitch). The overall thickness of this high density carrier is about 0.8 mm in an example embodiment. The signals are routed to the bottom layers and escape the module100through BGA pads154(typically 0.5-mm pads on 1.0-mm centers). In the example embodiment of the invention, the dimension of the carrier module is 35 mm×35 mm, similar to typical chip carrier modules. Although these dimensions are significantly larger than required for operation of the transceiver, it demonstrates the potential for using this carrier as a multi-chip module with additional functionality. As further shown inFIG. 2, the carrier150incorporates a cutout159in the center of the module in the position of the OE array. The cutout enables the optical coupling from the OE array120to the waveguides on the Optocard200.

Optical Coupling Characterization

As further depicted inFIG. 2, the optical system for coupling light from the OE array devices to the waveguides117built into the Optocard (or circuit board)200is based on a dual-lens optical relay system101. As described herein, the first lenses are integrated into the backside of the OE devices, while as shown inFIG. 2, the second lens300are incorporated with the waveguides117and turning mirrors118fabricated on the Optocard200. It is understood that the second lens system300are additionally fabricated on the back of a glass, plastic or transparent semiconductor material substrate. By designing these lenses to provide nearly collimated light between the two lenses, greatly relaxed alignment tolerances and enhanced coupling efficiency are provided between the Optomodule100and the Optocard200. The relaxed tolerances can provide greater compatibility with typical board-level package manufacturing tooling. Thus, the lenses radii of curvature are optimized to provide nearly collimated light between the two lenses.

FIG. 7depicts an alternative embodiment where the Optomodule100of the invention is a fiber-coupled transceiver100′ where lenses transfer light from the OE devices to fibers. Specifically, as shown inFIG. 7, in this embodiment, Optocard200′ comprises an optic fiber connector220having a fiber array217that receive/transmit light signals from/to the OE arrays120a,120b. In the embodiment shown inFIG. 7, the fiber connector does not include a second lens array. In this single-lens optical relay system, the OE lens is designed to image the OE devices onto the optical fibers. In another embodiment, although not shown, the fiber connector220includes the lens array300completing the dual lens system.

In sum, the optical transceiver module100of the example embodiment of the present invention uses a single-chip CMOS transceiver supporting an aggregate data rate of 160 Gb/s with sixteen receiver and sixteen transmitter channels that each operate at 10 Gb/s with significant margin. On the carrier150, transmission lines connecting the inputs (outputs) of the IC circuits to the carrier probe pads allow access to all channels. All 16 transmitter channels and all 16 receiver channels of the transceiver operated error-free. The total core power consumption for both transmitter and is 2.5 W, equivalent to a per-link power dissipation of 15 mW/Gb/s. Thus, the invention provides the first single-chip transceiver capable of channel rates in excess of 10 Gb/s and achieves the highest area efficiency (9.4 Gb/s/mm2) of any parallel optical transmitter, receiver, or transceiver currently available.

The invention has been described herein with reference to particular exemplary embodiments. Certain alterations and modifications may be apparent to those skilled in the art, without departing from the scope of the invention. The exemplary embodiments are meant to be illustrative, not limiting of the scope of the invention.