Nestable single cell structure for use in a power conversion system

Provided is an apparatus, including a capacitor module having a plurality of connecting terminals and a plurality of switch elements. Each switch element has at least one switch terminal coupled to a corresponding connecting terminal, wherein the switch elements are configured for mutually exclusive operation via a control device.

I. FIELD OF THE INVENTION

The present invention relates generally to multi-level topologies for power conversion devices. In particular, the present invention relates to more effective multi-level topologies in high power applications.

In power electronics, power quality, power density, and efficiency are among the most significant considerations when optimizing the conversion of power from one form to another. For example, power quality is a significant factor when interfacing with the electric grid and electric machines. Maintaining high power quality can be important to avoid issues, such as electromagnetic interference (EMI) pollution, flicker, and shortened life of electric machines due to high current harmonics and dv/dt stresses. Power converters play an important role in this process.

There are generally two methods to achieve high power quality and density in power electronics: increasing switching frequency and multi-level topology. Increasing the switching frequency has limitation, especially for high power and/or medium voltage converters, due to higher losses of power semiconductors associated with higher switching frequency and intrinsic limit of switching speed for high voltage and high power semiconductor devices. Thus, for high voltage and high power applications, multi-level topology is a more effective approach than increasing switching frequency.

Multi-level converter topologies more easily achieve high power quality, high density at higher efficiency. Interfacing with AC electric source and/or load, such as utility grid and electric machines, multi-level converters emulate alternating current (AC) output waveforms by providing multiple voltage levels at the output of the converter. Consequently, switching frequency can be reduced due to lowered output harmonics as result of the multi-level output. Several conventional multi-level topologies and control solutions are widely used in the industry.

One conventional multi-level topology is a three-level neutral point clamped (NPC) topology, which has been the industry's workhorse for over a decade, especially for output voltage below 3.3 kV. However, expanding NPC technology beyond three-levels, in order to achieve higher power quality or for higher voltage applications, represents a significantly increased complexity, thus impractical for wide industry use.

In order to achieve higher than three multi-level output, one has to find ways to couple multiple converters. There are fundamentally two ways for coupling multiple converters—(a) coupling through magnetic components, or (b) coupling through (flying) capacitors.

There are two approaches (i.e., topologies) for coupling multiple converters through magnetic components to realize multi-level converters. A first approach includes multiple converters, generally connected in parallel (or shunt), and coupled with interphase reactors or transformers. This first approach is controlled with interleaved pulse width modulation (PWM) and produces multiple output voltage levels. Drawbacks of this approach include circulating current among the parallel coupled converters, ultimately leading to higher losses, lower semiconductor utilization, and increased control complexity.

A second approach includes multiple single-phase H-bridges (either two-level or three-level H-bridges) connected in series (or cascaded), where each of those single-phase H-bridges are connected to isolated DC links. Due to galvanic isolation provided by a multi-winding transformer, the H-bridges can be coupled together directly with cascaded connection to produce multi-level output voltages correspondingly. Multi-winding transformers, however, are complex and bulky. Also, this approach is difficult and costly to be tailored for four-quadrant operation.

Generally, to process same amount of power, capacitors and power semiconductors tend to have higher density and lower cost than that of magnetic components. Therefore, in comparison to coupling multiple converters with magnetic components, coupling multiple converters with (flying) capacitors provides better power density and efficiency at a lower cost.

Modular multi-level converters (MMC) are yet an additional and widely used capacitor based topology. A number of modular H-bridges are cascaded directly to provide multiple output voltage levels, each one having its own floating DC link capacitors. The voltage levels of these DC links are tightly regulated, using the load current among multi-phases of the cascaded bridge legs. The size of the DC-link capacitors is inversely proportional to the fundamental frequency of the corresponding AC terminal. This solution, therefore, is not optimal for low and variable frequency applications, such as motor drives, due to fairly large floating DC link capacitors.

A better approach than the conventional approaches described above includes coupling multiple converters together through flying capacitors to provide multiple output voltage levels. Voltages across the flying capacitors are regulated every switching cycle. As such, the capacitor size is inversely proportional to switching frequency, instead of the fundamental frequency of the AC source or load. Since the switching frequency is typically more than 30-50 times higher than fundamental frequency, floating or flying capacitor size can be effectively reduced. A further increase of power density, and a reduction in cost, can be thus achieved.

III. SUMMARY OF THE EMBODIMENTS

Given the aforementioned deficiencies, improved methods and systems are needed for providing power conversion multi-level outputs. More particularly, a need exists for improved capacitor based methods and systems to convert power from one form to another.

Under certain circumstances, a power conversion module includes a capacitor module having a plurality of connecting terminals and a plurality of switch elements. Each switch element has at least one switch terminal coupled to a corresponding connecting terminal, wherein the switch elements are configured for mutually exclusive operation via a control device.

Embodiments of the present invention provide efficient multi-level voltage outputs with at least one nested neutral point piloted (NPP) cell. Additionally, systems constructed in accordance with the embodiments include at least one relatively simple three-level NPP structure, along with a unique control system. These NPP structures are scalable to higher voltage applications requiring outputs of more than three levels by simply duplicating the structure in a nested manner.

Flying capacitors, within the nested NPP structures, are actively controlled and balanced within one or more switching cycles to maintain their voltage levels. In this manner, the size of the capacitors is inversely proportional to switching frequency, not the fundamental frequency of the AC terminal. Using this approach, increased power quality and power density can be achieved. The embodiments include other advantages, such as fault redundancy with series devices, flying capacitor balancing, and more robust/faster short circuit and device overvoltage detection. Some embodiments use redundant switching states to achieve additional control features, such as regulation of the flying capacitor voltages and/or balance of thermal stress of power semiconductor switches in different switch positions.

Other embodiments include three-level NPP cells, along with highly precise cell control. For example, a cell can include three switch elements formed of a combination unidirectional and bi-directional switching devices, DC link capacitors in these cells are provided, along with six or more connection terminals to facilitate nested arrangements having an inner cell and outer cell.

Each switch element can be formed of multiple power semiconductor devices connected in series. The series connection can extend the voltage rating of each switch element and enhance reliability by reducing the voltage stress of each power semiconductor device. Fault tolerant operation is provided by simply bypassing faulty semiconductor devices. A byproduct of the disclosed control techniques is faster detection of faults, such as de-saturation and overvoltage of power semiconductor switches.

In another embodiment, the nested structure of the NPP modules can be implemented in a hybrid arrangement, where at least one of the outer cells is a nested NPP cell, while the inner cell may have different topology and/or output levels, such as a 3-level NPC cell or a 2-level cell. A hybrid arrangement may also include the inner and outer cells with different types and/or sizes of power switches. In another embodiment, the nested structure of the NPP cell can be implemented in a multi-phase power conversion system. A multi-phase (e.g. three-phase) converter with nested NPP cells, for example, can share one DC link to provide three-phase DC-AC, AC-DC, or DC-DC conversion. Further features and advantages, as well as the structure and operation of various embodiments, are described in detail below with reference to the accompanying drawings. It is noted that the invention is not limited to the specific embodiments described herein. Such embodiments are presented herein for illustrative purposes only. Additional embodiments will be apparent to persons skilled in the relevant art(s) based on the teachings contained herein.

V. DETAILED DESCRIPTION OF VARIOUS EMBODIMENTS

Unless defined otherwise, technical and scientific terms used herein have the same meaning as is commonly understood by one of ordinary skill in the art to which this invention belongs. The terms “first,” “second,” and the like, as used herein do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. Also, the terms “a” and “an” do not denote a limitation of quantity, but rather denote the presence of at least one of the referenced items. The term “or” is meant to be inclusive and to mean, any, several, or all of the listed items.

The use of “including,” “comprising,” or “having” and variations thereof herein are meant to encompass the items listed thereafter and equivalents thereof as well as additional items. The terms “connected” and “coupled” are not restricted to physical or mechanical connections or couplings, and can include electrical connections or couplings, whether direct or indirect. The terms “circuit,” “circuitry,” and “controller” may include either a single component or a plurality of components, which are either active and/or passive components and may be optionally connected or otherwise coupled together to provide the described function.

In the various embodiments, multi-level power conversion is achieved in a manner that provides higher power quality and density than conventional approaches at lower costs. In one embodiment, a multilevel (e.g., three levels) NPP nested cell topology is provided to achieve the multiple output voltage levels. Control signals, output from a controller, selectively activate/deactivate internal converter components to control the voltage output levels—increasing the levels to five, seven, nine, eleven, or more.

The nested cell topology is created by replicating individual cell structures, wrapping one cell around the other, forming an inner cell nested within an outer cell. In these nested cell structures, switches devices, DC link capacitors, and other internal components, can be configured to operate in a cascading manner to produce the required multiple output levels.

The controller can be configured to control operation of the switch elements—activating (turning on) and deactivating (turning off) power switches within the switch elements, one at a time. Each time a power switch is activated, an output voltage level is expressed on one of the cells. Activating and deactivating the power switches enables precise control of the voltage levels output from the converter.

Cell Structure Overview

FIG. 1Ais a block diagram illustration of an exemplary basic 3-level cell200(e.g., NPP) configured for operation within one of the converters in an exemplary power conversion system. For purposes of illustration, the embodiments, and the figures representative thereof, will be explained within the context of NPP cells. Thus,FIG. 1Aprovides basic operational principles of NPP cells, in accordance with the embodiments.

In the example ofFIG. 1A, the 3-level NPP cell200includes switch elements205,228, and232, which are controllable via a control device140. The control device140controls operation of the NPP cell200via control signals106. As understood by those of skill in the art, the control device140can be coupled to the NPP cell200through wireless, optical, or other similar communication links.

Flying capacitors261and263form a capacitor module (e.g., DC link226). In the embodiments, the NPP cell200is nestable, or connectable, in a cascading arrangement with other cells with 2 or 3 connecting terminals, such as identical NPP cells. As would be appreciated by one of skill in the art, embodiments of the present invention are not limited to three switch elements nor to two flying capacitors.

The switch element228includes connecting terminals225(having an interior orientation with respect to the cell200) and235(e.g., exterior orientation with respect to the cell200and the direction of the element228) at respective ends. Similarly, the switch element232includes connecting terminals229(e.g., interior) and241(e.g., exterior) at respective ends.

The switch element205includes connecting terminals227(interior) and239(exterior) at respective ends. The connecting terminal239is formed via the connection of the flying capacitors261and263. One such connection is along the path formed by the serial connection of the flying capacitors261and263. The other terminal of the flying capacitor261is coupled to the connecting terminals235. Similarly, the other terminal of the flying capacitor263is coupled to the connecting terminal241. The terms “interior” and “exterior” used herein are for purposes of illustration only and do not limit the scope of the various embodiments.

Control of the cell NPP200, is achieved through manipulation of the switch elements205,228, and232in response to the control signals106. The switching states of the switch elements205,228, and232occur mutually exclusively. That is, when one switch element within a cell is activated (ON), the other switch elements within that cell are deactivated (OFF), with substantially zero overlap between the various switching states. This mutually exclusive switching facilitates the efficient production of output voltages different levels.

For example, when the switch element228is ON, the switch elements205, and232are OFF, and the first output-cascading terminal225producers a first level output voltage of Vp. When the switch element232is ON, the switch elements205and228are OFF, and the output-cascading terminal229produces a second level output voltage Vn.

Similarly, when the switch element205is ON, the switch elements228and232are OFF, and the output-cascading terminal227provides a third level output voltage of Vmid, wherein the output levels are different from one another. More specifically, each of the different level output voltages (Vp, Vu, and Vmid) is exclusively associated with a respective ON switch element. This control process is explained in much greater detail below. In this manner, the NPP cell200represents a 3-level NPP cell topology.

By way of example only, and not limitation, each of the switch elements205,228, and232can each be implemented as a power switch, each being controllable to permit bidirectional current flow. Switch elements228and232can block unidirectional voltage, while switch element205can block bidirectional voltage. Alternatively, as illustrated in the example ofFIG. 2Abelow, one or more of the switch elements228, and232can be implemented as two or more unidirectional power switches connected in series. Switch element205can be implemented with two or more unidirectional power switches connected in series in reverse polarity. As can be appreciated by those of skill in the art, multiple low-voltage devices connected in series generally provide a higher total voltage withstanding capability suitable for the application needs.

In the embodiments, the number of power switches within each switch element is an economic factor considered in the production cost and capacity of an individual converter. As such, the present invention is not limited to switch elements that include only one or two power switches.

FIG. 1Bis a graphical illustration of an exemplary timing diagram190of timing signals generated to control the inner cell200, depicted inFIG. 4below. InFIG. 1B, for example, at a time instance t0power switch205is activated (ON state), going from “0” to “1” and power switch228is deactivated (OFF state), goes from “1” to “0,” At time instance t1, the power switch205is deactivated, going from “1” to “0,” and a power switch232is activated, going from “0” to “1.” Activation and deactivation are controlled via drive signals (discussed in greater detail below) that can be generated by a single control device, such as the control device140. Embodiments of the present invention can also produce a floating state in which all power switches are off, or disconnected from all other connecting terminals.

FIG. 2Ais a detailed block diagram illustration of an implementation of the inner cell200depicted inFIG. 1A.FIG. 2Aalso depicts gate drivers associated with the switch elements228,232, and205. The multiple power switches in the inner cell200are also controlled to perform switching operations in a mutually exclusive manner. As shown inFIG. 2A, the switch element228is configured to be switched on/off according to drive signals309provided from a gate driver301. The switch element232is configured to be switched on/off according to drive signals315provided from a gate driver307.

The power switch234(also referred to as sub-switch) is configured to be switched on/off according to switching drive signals311provided from a third gate driver303. The power switch236(also referred to as second sub-switch) is configured to be switched on/off according to switching drive signals313provided from a gate driver305. In some embodiments, as illustrated inFIG. 2B, the drive signals311and313supplied to the power switches234and236operate synchronously.

InFIG. 2B, at a time instant t0, a first a drive signal309has a falling edge which indicates that the switch element228(S1) is changing from the ON state to the OFF state. At a time instant of t0−y0, where “y0-y7” are finite time quanta occurring before or after time instant “t.” For example, t0−y0occurs prior to t0, in which a first portion of the switch element205(S2) (e.g., power switch236) is activated via a second drive signal313.

In actuality, as can be appreciated by one of skill in the art that the time instant t0−y0, the switch element205is still controlled in an OFF state. The switch element205is controlled in an ON state only when both sub-switches234and236are turned on. At a finite amount of time after t0, for example at t0−y1, a second portion (e.g., the power switch234) of the switch element205is turned on via a third drive signal311. At the time instant t0+y1, the switch element205formally changes to the ON state.

Similarly, at a time instant of t1−y2, prior to t1, the first portion of the switch element205(S2) (power switch236) is deactivated during an OFF state via the second drive signal313. At a time instant t1, a fourth drive signal315turns the switch element232(S4) to an ON state. At a time instant t1+y3, the second portion of the switch element205(83) (power switch234) is formally turned to an OFF state via the third drive signal311. In the embodiments, it can be appreciated by those skilled in the art that time quanta y0-y7can all be different values. The process described above is repeated for remaining states t2˜t3. In this manner, the rising and falling edges of 228, 205, and 232 are substantially non-overlapping.

FIG. 2Cis a block diagram illustration of a power switch228ofFIG. 2Ain accordance with the embodiments. In one embodiment, the switch element228can be configured to include any type of the power switches (internal to switch elements). For example, the switch elements238,228,232,242(seeFIG. 4discussed below) can be configured to precisely match the configuration of the switch element228.

More specifically, in one embodiment, the switch element228includes a power switch316, a power switch318, and an nth power switch322, where n is equal to or larger than two. By way of example, the power switches316and318are connected in parallel with respective anti-parallel diodes324, and326. The n-th power switch322is connected in parallel with an n-th anti-parallel diode328. In some conditions, each power switch can be integrated with its corresponding anti-parallel diode to form a single switch.

Since the power switches316,318, and the n-th power switch322are connected in series between the DC lines206and208, each of the switches is applied with a portion of the DC voltage. Thus, low nominal voltage switches can be used to replace a single power switch312, which has a high nominal voltage. As shown inFIG. 2C, the single power switch312is also integrated with an anti-parallel diode314. Additionally, a higher number of power switches provides a greater level of redundancy.

By way of example only, and not limitation, power switches described in the embodiments can be formed of metal oxide semiconductor field effect transistor (MOSFET), insulated gate bipolar transistor (IGBT), and integrated gate commutated thyristor (IGCT), to name a few.

FIG. 3is a block diagram illustration of the outer cell201discussed above, according to the embodiments.FIG. 3also depicts gate drivers associated with power switches within each of the switch elements238,242, and271. As noted earlier, the multiple devices in the outer cell201are controlled to perform switching operations in a mutually exclusive manner.

More specifically, the switch element238is configured to be switched on/off according to switching drive signals325provided from a gate driver317. The switch element242is configured to be switched on/off according to switching drive signals327provided from a gate driver319. The power switch244, within the switch element271, is configured to be switched on/off according to switching drive signals329provided from a gate driver321. The power switch246is configured to be switched on/off according to drive signals331provided from a gate driver323.

In some embodiments, the switching drive signals329and331operate synchronously and are generated from a single controller. To ensure the proper commutation of the switch elements238or242, and to ensure dead time in order to avoid short-circuits of the flying capacitors, the switching instants of the drive signals329and331are adjusted. For example, the drive signals329and331may be adjusted accordingly in a manner to advance switching or delay switching of the sub-switches246and/or244in switch element271in a substantially small time quanta relative to the drive signals supplied to the switch element238or242.

FIG. 4is a more detailed block diagram illustration of a single 5-level nested NPP single phase cell220constructed from a nested combination ofFIGS. 2A and 3. The components, structure and operation behavior within the inner cell200and the outer cell201are virtually identical. This technique enables the expansion of the 3-level topology of a basic NPP cell to achieve outputs having five levels (as in the case of the single phase cell220), or seven, nine, eleven, or more levels.

By way of example, in another embodiment of the present invention, nested structures can be hybrid, for example, having a 2-level cell or 3-level NPC cell being wrapped within the 3-level NPP cell. Many other hybrid nested structures are possible and are within the spirit and scope of the present invention.

InFIG. 4, the outer cell201includes capacitors212and214. In the illustration ofFIG. 4, the capacitors212and214form a DC link210. In other embodiments, the capacitors212and214need not be configured to form a DC link. The capacitors212and214are essentially identical to the capacitors261and263of the inner cell200as “flying” capacitors. Similarly, the power switches238,242,244, and246of the outer cell201are essentially equivalent or identical to the power switches228,232,234, and236of the inner cell200.

InFIG. 4, the switch element205is a bi-directional switch which conducts bidirectional current and blocks bidirectional voltage. It can be implemented as two reversely coupled unidirectional power switches234and236. However, the present invention is not limited to this particular power switch implementation. In the example ofFIG. 4, the power switches234and236are controllable via the control device140to allow electrical currents having opposite directions to flow therethrough. The switch elements228and232can conduct bidirectional current and block unidirectional voltage.

One of the terminals235of the switch element228is coupled to a terminal of the capacitor module226, or more specifically, to a terminal of the flying capacitor261. This coupling permits the terminal235to function as a first input-cascading terminal. The other terminal225of the switch element228functions as a first output-cascading terminal and is able to be coupled to the output terminal260.

One terminal of the switch element232is coupled to another terminal of the capacitor module226, more specifically to one terminal of the flying capacitor263, permitting the terminal241to function as a second input-cascading terminal. The connecting terminal229functions as a second output-cascading terminal and is also able to be coupled to the output terminal260.

A terminal239of the switch element205is coupled to a connection point239of the DC link226and functions as a third input-cascading terminal. Another terminal227of the switch element205functions as a third output-cascading terminal and is also couplable to the output terminal260.

In a first exemplary scenario, the input-cascading terminals235,239, and241can be respectively coupled to three output-cascading terminals of another NPP cell (e.g., the cell201). In this first exemplary scenario, the cell200is the inner cell, and the cell201is the outer cell, as noted earlier.

In a second exemplary scenario, the output-cascading terminals225,227, and229can be respectively coupled to three input-cascading terminals of another cell. In this second scenario, however, the cell200functions as the outer cell and the other cell functions as the inner cell. The cell201could similarly function as an inner cell. Nesting NPP cells in cascading arrangements allows expansion of the number of achievable voltage output levels.

During operation and control of the inner cell200, when a switch element is activated, a voltage is output therefrom. For example, when the switch element228(oriented in the same direction as the switch element232) is activated, the terminals235and225connect together. When the switch element205is activated, the terminals239and227connect together. Similarly, when the switch element232is activated, the terminals229and241connect together.

In the embodiments, cell control is achieved by activating and deactivating the switch elements one at a time. For purposes of illustration, components within the inner cell200have an S-level designation, and components within the outer cell201have a T-level designation. Transitioning from one switching state to the next switching state, within respective S and T levels, is accomplished through coordination of the control signals106provided to each cell from the control device140.

By way of example, each of the control signals106can include multiple control signals sent simultaneously to gate drivers within individual power switches of each switch element, for all power switches in a particular level. For example, one signal to power switches within the switch element228(S1), another signal to232(S4), and a third signal to switch element205, including power switches236/234(S2/S3). Also, one signal to238(T1), another signal to242(T4), and a third signal to244/246(T2/T3).

This coordinated signal control ensures that no more than one switch element in the S-level inner cell200is ON at a given time. Similarly, no more than one switch element in the T-level outer cell201is ON at a given time

The nested cell structures within the phase leg220, combined with use of the control device140, produces multi-level output voltages of higher power quality and power density. The structure of these nested cells can be replicated, with, each cell producing a predetermined number of outputs, to expand the number of voltage output levels.

For example, and as an expansion of the discussion above in relation toFIG. 1A, the inner cell200can be configured and controlled to provide an output voltage having three levels. Similarly, the outer cell201can be configured and controlled to provide an output voltage having three levels. Output voltage level of the phase leg with nested cells would be 2*cell number+1, when both inner and outer cells are 3-level cells.

In the exemplary illustration ofFIG. 4, the inner cell200and the outer cell201provide 5-level output voltages. More specifically, and by way of example only, and not limitation, capacitors and switch elements within each of the cells200and201are structured to have six connecting terminals. The connecting terminals of one cell structure connect with corresponding connecting terminals of the other cell structure.

Similar to the arrangement of the inner cell200, the outer NPP cell201includes switch elements238,242, and271. The switch element238has a connecting terminal237(e.g., interior) at one end and a connecting terminal211(e.g., exterior) at its other end. By way of example, the switch element242is oriented in the same direction as the switch element238. The switch element242has a connecting terminal221(interior) at one end and215(exterior) at its other end. The switch element271includes power switches244and246that are reversely coupled in series.

Additionally, the switch element271has a connecting terminal219(interior) at one end. A connecting terminal (exterior) of the switch element271is coupled to a connecting terminal216defined between the capacitors212and214of the capacitor module210. In addition, the ends of the capacitor212are coupled to the two connecting terminals211and216respectively. Similarly, two ends of the second capacitor214are coupled to the two connecting terminals216and215, respectively.

By way of review, nested NPP cell structures are formed by coupling the connecting terminals237and235together, coupling the connecting terminals219and239together, and coupling the connecting terminals241and221, together. In other embodiments, similar connections can be made to form a higher level converter topology by connecting more than three six-terminal converter modules.

InFIG. 4, the connecting terminals225,227,229(i.e., interior terminals) of the inner cell200, are connected to the AC port260for receiving or providing AC voltage. Additionally, connecting terminal211is coupled to the DC port202through the first DC line206. The connecting terminal215is coupled to the DC port204through the DC line208. In this manner, the connecting terminals211and215are configured to receive or provide DC voltages.

FIG. 5Ais an illustration of an exemplary state machine voltage level diagram for two nested cells structure (inner cell200and outer cell201). InFIG. 5A, a first digit within each oval560represents a state of the outer cell201. A second digit within the oval560represents a state of the inner cell200. As depicted in5A, for example, two equally valid states can occur to produce the same output voltage levels of 1 and −1, respectively, as illustrated in greater detail below with reference toFIGS. 5B and 5C.

FIG. 5Bis a tabular illustration of exemplary switching states for controlling the inner and outer cell structures200and201ofFIGS. 5A and 5Bconfigured in the phase leg220ofFIG. 4. The first phase leg220can be controlled to provide an output voltage having five different voltage levels501. The voltage levels501are produced by selectively controlling the outer cell201switches (T-level switches) via switching states502and the inner cell200switches (S-level switches) via switching states504.

FIG. 5Cis a graphical illustration including exemplary timing signals512and514and the resultant output voltage waveform511. InFIG. 5C, for example, timing signals512are representative of switching states502(seeFIG. 5B) for the components (FIG. 3) within the outer cell201. Similarly, timing signals514are representative of switching states504for components (FIG. 2A) within the inner cell200.

The sequential application of the timing signals512and514to the outer and inner cells201and200produces the output voltage having multiple levels and a selectable pattern. More specifically, the pattern of the output voltage511can resemble the sinusoidal pattern. The waveform511is produced as a multi-level output of the first phase leg220of the multi-phase converter700ofFIG. 7(or122ofFIG. 9), depicted inFIG. 5C. Other non-sinusoidal waveform patterns are achievable and are within the spirit and scope of the present invention.

By way of example, in the exemplary illustration ofFIG. 5C, the timing signals512are applied via the respective control signals325,327,329, and331, as described above. Similarly, the timing signals514are applied via the respective control signals309,315,311, and313. The control signals, shown inFIGS. 5A and 5B, can be sub-signals of the control signals106, generated by the single control device140. Alternatively, the control signals, shown inFIGS. 5A and 5B, can be generated by multiple control devices.

FIG. 5Dis a illustration of a output voltage waveform550of the multi-phase converter in accordance with the embodiments. As shown inFIG. 5D, through the use of a converter having a nested cell structure and multiple phase legs, one phase leg of the converter can provide an output voltage having five or more levels in the form of substantial resemblance of desired alternate current waveform.

In the embodiments, flying capacitor voltage is maintained using redundant switching states. As used herein, the expression “redundant switching states” means that the same commanded level output may be provided by supplying switching signals having different combinations of switching states to the plurality of the power switches within the convert. Use of redundant switching states enables the pulse pattern of the individual pulse signals to be selected such hat additional control objectives are achieved in addition to the desired output voltage waveforms. Those additional control objectives may include (a) regulation of flying capacitor voltage to a pre-determine value; and (b) balance of thermal stress of power switches in different switch positions.

In the illustrative embodiments, the output voltage of the nested cell structures is dependent upon the degree to which the voltage of the flying capacitors, such as the voltages cross flying capacitors261/263can be regulated to a pre-de mined value. By way of example, this regulation is achieved by actively controlling the current flowing through the flying capacitors through use of redundant switching states to charge and discharge the flying capacitor.

More specifically,FIG. 6Ais ea illustration of a first stage current flow path through a generic power converter phase leg600, similar to due phase leg220, ofFIG. 4, in accordance with another embodiment.FIG. 6Bis an illustration of a second stage flow path through the generic power converter phase leg600ofFIG. 6A.

By way of background, the final voltage output of a nested cell structure, such as the nested structure220ofFIG. 4, is the sum of the output from the outer three-level cell201and the inner three-level cell200. That is, the final voltage output is the sum of the states of the two three-level NPP cells. Use of redundant switching states leverages due internal structure of the nested cells to achieve additional control and operation objectives, such as regulation of flying capacitor voltage and/or balance of thermal stress an power switches.

For example, in the structure220to generate a “1” as the voltage at the output260, the output float the outer cell201and the inner cell200can be “1” and “0,” respectively. Alternatively, the output can be “0” and “1,” producing an identical output voltage level. However, the current paths going to the corresponding flying capacitors would be opposite, causing one to change, the other to discharge the flying capacitor602.

InFIG. 6A, flying capacitor602is a capacitor through which a need exists for regulating operational characteristics therein, such as voltage. A first current path604depicts current flowing into the flying capacitor602and to an output606. That is, in FIG.6A, when an output voltage level of “1” is required at the output port606, either the first current path604or a second current path608can be selected. Due to the switching states redundancy for operating the plurality of switch elements, either of the first or second current paths604and608(seeFIG. 6B) can be formed such that the flying capacitor602can be charged and/or discharged for regulation of its voltage.

For example, flying capacitor voltage information signals received by a controller140′ (described below) can indicate that the flying capacitor602is in an overvoltage condition or having a voltage greater than a pre-determined voltage level. As a result, the controller is configured to generate the individual pulse signals having a first combination of switching states, depicted inFIG. 6B, to allow the flying capacitor602to be discharged.

Alternatively if the flying capacitor voltage information signals received by the controller could indicate that the flying capacitor602is in an under-voltage condition or having a voltage less than a pre-determined value. Here, the pulse pattern generator is configured to generate the individual pulse signals having a second combination of switching states, as depicted inFIG. 6A, to allow the flying capacitor602to be charged. Consequently, the voltages at the flying capacitor602and the flying capacitor610can be dynamically regulated in every switching cycle.

FIG. 7is an exemplary block diagram illustration of a multiphase converter700formed by three separate phase legs220,250, and280, in accordance with the embodiments. The phase leg220includes the single 3-level NPP cell200ofFIG. 1Aconfigured as an inner cell wrapped within an outer cell201. Each of the phase legs220,250, and280is a single phase (e.g., 120° phase shift from each other) of a multiphase converter. For purposes of illustration and simplification,FIG. 7is discussed within the context of the converter700. Greater details of nested cell structures were provided in the discussion above, particularly in the discussion ofFIG. 4above.

InFIG. 7, each of the phase legs220,250,280is coupled between first and second DC lines206and208for receiving a DC voltage from a DC link210and providing an output voltage at corresponding output ports260,265, and285. Although the detailed discussion below primarily addresses the first phase leg220, the discussion equally pertains to phase legs250and280. As such, a detailed discussion of the phase legs250and280will not be provided herein.

The phase legs220,250, and280provide corresponding first, second, and third phase AC voltages through output ports260,265, and285, respectively. By way of example, the first, second, and third phase AC voltages can be offset from one another by 120 degrees.

When the converter700is implemented as an AC-DC converter, the output ports260,265, and285can be alternatively configured as AC input ports to receive input AC voltages. Similarly, first and second ports202and204can be configured as DC output ports to output DC voltages. For DC-AC and DC-DC conversions, those ports can be configured and connected accordingly in a similar fashion.

FIG. 8, for example, is an illustration of an exemplary 7-level nested NW structure800in accordance with an alternative embodiment of the present invention. That is, the NPP structure (e.g., phase leg)800is capable of producing a 7-level output voltage. The NPP structure800, in accordance with the NPP cell structures described above, includes the cells200and201, described above. However, the structure800also includes a third cell—an exterior cell203. Thus, the structure800includes three basic 3-level NPP cells in a nested arrangement.

FIG. 9is a block diagram illustration of an exemplary power conversion system900in which embodiments of the present invention can be practiced. By way of example, and not limitation, the system900includes a nested NPP topology. InFIG. 9, the system900is a multi-level conversion system for achieving higher power quality and power density. The system900includes a power converter module120coupled to the control device140.

The exemplary power converter module120includes a first converter122, a DC link/energy storage device124, and a second converter700. By way of example only, the first converter122converts a first AC power102from a first power device, such as a power source110(e.g., power grid) into DC power123(e.g., DC voltage). The converters122and700can include at least one basic 3-level NPP cell configured in a nested topology as discussed above, with reference toFIGS. 1A-2B.

A DC-link component within the device124can include one or more capacitors for filtering the DC voltage123output from the first converter122to supply a filtered DC voltage to the second converter700. In the exemplary power converter module120, the second converter700converts the filtered DC voltage into a second AC voltage104(discussed in greater detail below). The second AC voltage104is output to a second power device, such as a power load130(e.g., an AC electric motor).

More specifically, the power conversion system900includes at least one 3-level NPP cell configured in a nested structure that provides more efficient multi-level power conversion for high power and, as well as for low and variable frequency applications. In the example ofFIG. 9, fixed-frequency electric power102(e.g., 50 or 60 hertz AC) is converted into variable-frequency electrical power104. The variable-frequency electrical power104is supplied to the power load130(e.g., such as a motor). The power conversion system900can also include an energy storage component within the device124, for storing the DC power provided from the first converter122.

FIG. 10is a block diagram illustration1000of a control device140′ and a nested cell structure220constructed to implement the redundant switching state technique noted above. The system ofFIG. 10is configured to balance fly capacitor voltages by actively regulating the current flowing through the flying capacitors261/263of the capacitor module226through use of redundant switching states.

InFIG. 10, the control device140′ is similar to the control device140ofFIGS. 1A and 9. The control device140′, however, includes additional functionality for implementing the redundant states process discussed above.

The control device140′ includes a high-order modulator1002configured to generate initial multi-level pulse signals1003by one or more modulation methods. The initial multi-level pulse signals1003are not directly transmitted for driving the nested phase leg220. Instead, the initial multi-level pulse signals1003are used for generating individual pulse signals which in turn are used for driving a plurality of switch elements of the phase leg220.

In this manner, the phase leg220can provide an output voltage and/or current having a waveform corresponding to the waveform of the initial multilevel pulse signals1003. For example, the high-order modulator1002can be configured to generate the initial multilevel pulse signals1003having five, seven, nine, eleven or more levels, corresponding to the output of the phase leg220.

In one embodiment, the modulator1002is configured to generate the initial multilevel pulse signals1003by a multi-carrier modulation method such as, for example, a level-shifted pulse width modulation (LSPWM) method. In other embodiments, the high-order modulator1002may be configured to generate the initial multilevel pulse signals1003using other modulation methods well known in the art.

InFIG. 10, the modulator1002can receive a command signal106′ provided from a command signal generator1004. The command signal106′ may include a voltage command signal having a waveform corresponding to that of a desired voltage. For example, the voltage command signal106′ can have a sine waveform corresponding to a desired AC output voltage of the nested cell220. The command signal106′ can also include a frequency command signal indicative of a desired output frequency.

In the embodiments, the high-order modulator1002can also receive multiple carrier signals1008provided from a carrier signal generator1006. For example, the carrier signal generator1006can generate multiple carrier signals, each carrier signal having a specific waveform shape (e.g., triangular, sawtooth, etc.). In the case of LSPWM method, the carrier signals1008are shifted apart from each other to define a linear modulation range for the command signal106′.

In the exemplary system ofFIG. 10, voltages (Vfc212, Vfc214, Vfc261, and Vfc263) of flying capacitors261/263can be directly obtained in real-time using one or more voltage sensors (not shown) in association with the flying capacitors. These real-time voltages are provided to the controller140′ via voltage information signals1010and1012. In other embodiments, the flying capacitor voltages (Vfc212, Vfc214, Vfc261, and Vfc263) can be indirectly obtained through calculation or prediction. The pulse generator1000provides first and second level control signals control signals1014and1016, respectively, to control operation of the nested cells200and201to synthesize the desired output voltage, while achieving additional control objectives, such as regulation of voltages cross flying capacitors (Vfc212, Vfc214, Vfc261, and Vfc263), and/or balance thermal stress of power switches.

In the nested structure219ofFIG. 10, when a number of output voltage levels, such as the voltage levels501ofFIG. 5Care desired, the redundant switching states technique discussed above can be applied. For example, due to the switching states redundancy for operating the power switches within the inner cell200and the outer cell201, a plurality of current paths can be formed. These current paths allow the current to pass through selected circuit switches such that the flying capacitor261/263can be charged and/or discharged to maintain their voltages at pre-determined levels. This operation can occur within the operational principles of the Bilevel and L-level switching devices discussed above, for example, with respect toFIGS. 5A and 5B.

FIG. 11is a flow chart of an exemplary method1100of practicing an embodiment of the present invention. InFIG. 11, the method1100is provided for controlling an output of a power conversion system including two or more cells. Each of the two or more cells contains a plurality of switch elements, wherein at least one of the cells is a 3-level NPP cell.

For ease of description, one or more steps or operations included in method1100are grouped in blocks. Nevertheless, one of ordinary skill in the art will readily understand that operations described in each block may be performed independently, sequentially, or asynchronously, without departing from the spirit and scope of the present invention.

Method1100includes a first block1102that comprises sequentially controlling each of the plurality of switch elements in a first of the cells via first control signals, the step of sequentially controlling being responsive to a first switching state. Method1100further includes a second block1104comprising sequentially controlling each of the plurality of switch elements in the second cell via second control signals, the second cell controlling being responsive to a second switching state. The method1100further includes a block1106, when one of the switch elements of the first or second cells is ON, all of the other of the switch elements within the respective cell are OFF.

FIG. 12is a block diagram illustration of an exemplary computer system1200upon which aspects of the present invention can be implemented. The computer system1200includes one or more processors, such as processor1204. Processor1204may be a general purpose processor, such as a central processing unit (CPU) or a special purpose processor, such as a graphics processor unit (GPU). The processor1204is connected to a communication infrastructure1206(e.g., a communications bus, cross-over bar, or network). Various software embodiments are described in terms of this exemplary computer system. After reading this description, it will become apparent to a person skilled in the relevant art(s) how to implement the invention using other computer systems and/or architectures.

Computer system1200can include a graphics processing system1202which performs physics simulation and graphics processing tasks for rendering images to an associated display1230. The computer system1200also includes a main memory1208, preferably random access memory (RAM), and may also include a secondary memory1210.

The secondary memory1210may include, for example, a hard disk drive1212and/or a removable storage drive1214, representing a floppy disk drive, a magnetic tape drive, an optical disk drive, etc. The removable storage drive1214reads from and/or writes to a removable storage unit1216. Removable storage unit1216represents a universal serial bus (USB) drive, flash drive, magnetic tape, optical disk, etc. which is read by and written to by removable storage drive1214. As will be appreciated, the removable storage unit1216includes a computer usable storage medium having stored therein computer software and/or data.

In alternative embodiments, secondary memory1210may include other similar devices for allowing computer programs or other instructions to be loaded into computer system1200. Such devices may include, for example, a removable storage unit1222and an interface1220. Examples of such may include a program cartridge and cartridge interface, a removable memory chip (such as an erasable programmable read only memory (EPROM), or programmable read only memory (PROM)) and associated socket, and other removable storage units1222and interfaces1220, which allow software and data to be transferred from the removable storage unit1222to computer system1200.

Computer system1200may also include a communications interface1224. Communications interface1224allows software and data to be transferred between computer system1200and external devices. Examples of communications interface1224may include a modem, a network interface (such as an Ethernet card), a communications port, a personal computer memory card International Association (PCMCIA) slot and card, etc.

Software and data transferred via communications interface1224are in the form of signals1228which may be electronic, electromagnetic, optical, or other signals capable of being received by communications interface1224. These signals1228are provided to communications interface1224via a communications path (e.g., channel)1226. This channel1226carries signals1228and may be implemented using wire or cable, fiber optics, a telephone line, a cellular link, an radio frequency (RF) link and other communications channels.

In this document, the terms “computer program medium” and “computer usable medium” are used to generally refer to media such as removable storage drive1214, a hard disk installed in hard disk drive1212, and signals1228. These computer program products provide software to computer system1200.

Computer programs (also referred to as computer control logic) are stored in main memory1208and/or secondary memory1210. Computer programs may also be received via communications interface1224. Such computer programs, when executed, enable the computer system1200to perform features of the present invention, as discussed herein. Accordingly, such computer programs represent controllers of the computer system1200.

In an embodiment where the invention is implemented using software, the software may be stored in a computer program product and loaded into computer system1200using removable storage drive1214, hard drive1212or communications interface1224. The control logic (software), when executed by the processor1204, causes the processor1204to perform the functions of the invention as described herein.

CONCLUSION

Alternative embodiments, examples, and modifications which would still be encompassed by the teachings presented herein may be made by those skilled in the art, particularly in light of the foregoing detailed description. Further, it should be understood that the terminology used herein is intended to be in the nature of words of description rather than of limitation.

Those skilled in the art will also appreciate that various adaptations and modifications of the preferred and alternative embodiments described above can be configured without departing from the scope and spirit of the invention. Therefore, it is to be understood that, within the scope of the appended claims, the invention may be practiced other than as specifically described herein.