Substrate structure and fabrication method thereof

A method for fabricating a substrate structure is provided, which includes the steps of: disposing at least a strengthening member on a carrier; sequentially forming a first circuit layer and a dielectric layer on the carrier, wherein the strengthening member is embedded in the dielectric layer; forming a second circuit layer on the dielectric layer; removing the carrier; and forming an insulating layer on the first circuit layer and the second circuit layer. The strengthening member facilitates to reduce thermal warping of the substrate structure.

CROSS-REFERENCES TO RELATED APPLICATIONS

This application claims under 35 U.S.C. § 119(a) the benefit of Taiwanese Application No. 103137357, filed Oct. 29, 2014 the entire contents of which are incorporated herein by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to substrate structures and fabrication methods thereof, and more particularly, to a substrate structure and a fabrication method thereof for reducing thermal warping.

2. Description of Related Art

Along with the rapid development of electronic industries, electronic products are required to be reduced in thickness, and accordingly thin type substrates are needed.

FIGS. 1A to 1Gare schematic cross-sectional views showing a method for fabricating a substrate structure according to the prior art.

Referring toFIG. 1A, a carrier10is provided and a seed layer11is formed on opposite surfaces of the carrier10.

Referring toFIG. 1B, a patterned resist layer12having a plurality of openings is formed on the seed layer11. Thereafter, a first circuit layer13is formed in the openings of the patterned resist layer12by electroplating.

Referring toFIG. 1D, a dielectric layer14is formed on the carrier10and the first circuit layer13.

Referring toFIG. 1E, a plurality of openings are formed in the dielectric layer14. Then, a second circuit layer15is formed on the dielectric layer14, and a plurality of conductive vias15aare formed in the openings of the dielectric layer14and electrically connecting the first circuit layer13and the second circuit layer15.

Referring toFIG. 1F, the carrier10and the seed layer11are removed to expose the first circuit layer13.

Referring toFIG. 1Gan insulating layer16made of, for example, solder mask is formed on opposite surfaces of the dielectric layer14. As such, a substrate structure1is obtained.

Through the above-described method, a thin type substrate structure is obtained. However, when the substrate structure is bonded with a chip and subjected to a molding process for forming a package structure, thermal warping easily occurs to the substrate structure. On the other hand, the molding compound generally has a thickness too small (for example, less than 0.5 mm) to overcome or balance thermal warping stresses, thus leading to warping of the overall package structure.

Therefore, there is a need to provide a substrate structure and a fabrication method thereof so as to overcome the above-described drawbacks.

SUMMARY OF THE INVENTION

In view of the above-described drawbacks, the present invention provides a method for fabricating a substrate structure, which comprises the steps of: disposing at least a strengthening member on a carrier and forming a first circuit layer on the carrier; forming a dielectric layer on the carrier, the strengthening member and the first circuit layer; forming a second circuit layer on the dielectric layer, wherein the second circuit layer is electrically connected to the first circuit layer; removing the carrier to expose the first circuit layer; and forming an insulating layer on the first circuit layer and the second circuit layer, wherein the insulating layer has a plurality of openings exposing portions of the first circuit layer and the second circuit layer.

The present invention further provides a substrate structure, which comprises: a dielectric layer having opposite first and second surfaces; a first circuit layer formed on the first surface of the dielectric layer; a second circuit layer formed on the second surface of the dielectric layer and electrically connected to the first circuit layer; at least a strengthening member embedded in the dielectric layer; and an insulating layer formed on the dielectric layer, the first circuit layer and the second circuit layer and having a plurality of openings exposing portions of the first circuit layer and the second circuit layer.

Therefore, by embedding the strengthening member in the dielectric layer, the present invention strengthens the substrate structure and also reduces variation in size of the dielectric layer per unit of temperature variation. As such, the present invention reduces thermal warping of the substrate structure.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

The following illustrative embodiments are provided to illustrate the disclosure of the present invention, these and other advantages and effects can be apparent to those in the art after reading this specification.

It should be noted that all the drawings are not intended to limit the present invention. Various modifications and variations can be made without departing from the spirit of the present invention. Further, terms such as “first”, “second”, “on”, “a” etc. are merely for illustrative purposes and should not be construed to limit the scope of the present invention.

FIGS. 2A to 2Hare schematic cross-sectional views showing a method for fabricating a substrate structure according to the present invention.

Referring toFIG. 2A, a carrier20having opposite first and second surfaces is provided and at least a strengthening member27is disposed on the first and second surfaces of the carrier20. The strengthening member27can be made of a laminating compound or an injection molding compound. Alternatively, the strengthening member27can be made of a metal material such as copper, or an organic material having high strength, for example, an ABS (acrylonitrile-butadiene-styrene) resin. The organic material has a tensile strength greater than 3200 kg/mm2and a coefficient of thermal expansion less than 5 ppm/deg.

Referring toFIG. 2B, a seed layer21is formed on the first and second surfaces of the carrier20. Then, a patterned resist layer22is formed on the seed layer21and covers the strengthening member27. The patterned resist layer22has a plurality of openings exposing portions of the seed layer21. In the present embodiment, the seed layer21is made of, for example, copper and formed by electroless plating or sputtering.

Referring toFIG. 2C, a first circuit layer23is formed on the exposed portions of the seed layer21by, for example, electroplating.

Referring toFIG. 2E, a dielectric layer24is formed to cover the first circuit layer23, the strengthening member27and the seed layer21. Further, a plurality of openings24aare formed in the dielectric layer24, exposing portions of the first circuit layer23. In the present embodiment, the openings24aare formed by laser drilling or mechanical drilling. The strengthening member27has higher strength than the dielectric layer24, and the strengthening member27is embedded in the dielectric layer24.

Referring toFIG. 2F, a second circuit layer25is formed on the dielectric layer24, and a plurality of conductive vias25aare formed in the openings24aof the dielectric layer24and electrically connecting the second circuit layer25and the first circuit layer23.

Referring toFIG. 20, the carrier20and the seed layer21on the first and second surfaces of the carrier20are removed, thus exposing the first circuit layer23and the strengthening member27.

Referring toFIG. 2H, an insulating layer26is formed on the dielectric layer24, the strengthening member27, the first circuit layer23and the second circuit layer25, and has a plurality of openings exposing portions of the first circuit layer23and the second circuit layer25. As such, a substrate structure2is obtained. In the present embodiment, the insulating layer26is made of, for example, solder mask.

The substrate structure2of the present invention has: a dielectric layer24having opposite first and second surfaces; a first circuit layer23formed on the first surface of the dielectric layer24; a second circuit layer25formed on the second surface of the dielectric layer24; a plurality of conductive vias25aformed in the dielectric layer24and electrically connecting the second circuit layer25and the first circuit layer23; at least a strengthening member27embedded in the dielectric layer24; and an insulating layer26formed on the dielectric layer24, the first circuit layer23and the second circuit layer25and having a plurality of openings exposing portions of the first circuit layer23and the second circuit layer25.

The insulating layer26can be made of solder mask.

The strengthening member27can be made of a laminating compound, an injection molding compound, a metal material, or an organic material having high strength, for example, an ABS (acrylonitrile-butadiene-styrene) resin.

The strengthening member27can have higher strength than the dielectric layer24. The strengthening member27facilitates to strengthen the substrate structure so as to reduce thermal warping of the substrate structure.

FIGS. 3A and 3Bare schematic planar views of a substrate structure3according to an embodiment of the present invention;

Referring toFIGS. 3A and 3B, the strengthening member37of the substrate structure3has a frame structure that can be arranged inside the substrate structure3, as shown inFIG. 3A, or arranged along an edge of the substrate structure3, as shown inFIG. 3B. The frame structure can have, but not limited to, a rectangular shape, a circular shape or the like.

FIG. 4is a schematic planar view of a substrate structure4according to another embodiment of the present invention.

Referring toFIG. 4, the strengthening member47of the substrate structure4is a copper pour that covers the dielectric layer of the substrate structure4except for the circuit layer.

FIG. 5is a schematic planar view of a substrate structure5according to a further embodiment of the present invention.

Referring toFIG. 5, the strengthening member57of the substrate structure5consists of a plurality of columns that are distributed in the dielectric layer of the substrate structure5to thereby reduce variation in size of the dielectric layer per unit of temperature variation.

FIG. 6is a schematic cross-sectional view of a substrate structure6according to still another embodiment of the present invention.

Referring toFIG. 6, the substrate structure6further has at least a dielectric layer and a third circuit layer formed on the second circuit layer. The third circuit layer is electrically connected to the second circuit layer. The strengthening member67can be optionally located in a single dielectric layer or penetrate through multiple dielectric layers.

Therefore, by embedding the strengthening member in the dielectric layer, the present invention strengthens the substrate structure and also reduces variation in size of the dielectric layer per unit of temperature variation. As such, the present invention reduces thermal warping of the substrate structure.

The above-described descriptions of the detailed embodiments are only to illustrate the preferred implementation according to the present invention, and it is not to limit the scope of the present invention. Accordingly, all modifications and variations completed by those with ordinary skill in the art should fall within the scope of present invention defined by the appended claims.