Adjacent terminal fault detection

This relates to detecting unwanted couplings between a protected terminal and other terminals in an integrated controller of a power supply. Offset and clamp circuitry may apply a positive or negative offset voltage and clamp current to one or more terminals of the controller. In the event that a terminal having the offset voltage and clamp current is accidentally coupled to the protected terminal, the offset voltage and clamp current may be applied to the protected terminal. The protected terminal may be coupled to a fault detection circuitry operable to detect a fault signal at the protected terminal. The fault detection circuitry of the controller may cause the power supply to shut down in response to a detection of the fault signal at the protected terminal or may cause the power supply to shut down in response to a detection of a predefined threshold number of cycles in which the fault signal is detected.

BACKGROUND

The present disclosure relates generally to power supplies, and, more specifically, the present disclosure relates to controllers for power supplies.

2. Background Information

Many electronic devices include a power supply to provide the device with a regulated direct current (DC) power source. One type of power supply that may be used to provide the regulated DC source is a switched mode power supply, which is popular due to its small size, good output regulation, high efficiency, and safety features. Switched mode power supplies may be used to convert an alternating current (AC) source or a high voltage DC source into a regulated DC source having a desired voltage. Based on the specific application, different types of switched mode power supplies with different control methods and different features may be used.

Typically, a switched mode power supply includes a switching element coupled to an energy transfer element. The energy transfer element provides galvanic isolation, preventing direct current from flowing between the input and the output of the power supply. Common examples of energy transfer elements include a transformer and coupled inductor, where electrical energy received by an input winding on the input side is stored as magnetic energy that may be converted back to electrical energy at the output side across an output winding.

Switched mode power supplies typically include a controller for causing the switching element to be switched between an ON state and an OFF state to regulate the amount of power transmitted across the energy transfer element and delivered to a load. The output of the energy transfer element may then be rectified and filtered to provide a regulated DC output.

Some switched mode power supplies include a controller for output regulation to maintain properties of the output between predefined threshold values. For instance, the controller may be implemented in an integrated circuit (IC) having multiple input and output terminals and configured to receive signals representative of the parameters of the switch mode power supply, process the sensed signals, and generate control signals to control the switching element to regulate the output of the power supply. For example, the controller may receive a feedback signal representative of the output of the power supply. Based on this signal, the controller may adjust the switching characteristics of the switching element to vary the amount of power transferred to the output of the energy transfer element, and thus, the output of the power supply.

Since the operation of the controller is based at least in part on the feedback signal, it is important that the feedback signal accurately reflects the output voltage. Errors in the feedback signal, for example, caused by a short, or unwanted coupling, between the feedback terminal of the controller and an adjacent terminal may result in improper output regulation, thereby causing the power supply to generate an output having an incorrect voltage.

Thus, circuitry for detecting unwanted couplings between terminals of a controller are desired.

BRIEF SUMMARY

Methods and apparatuses are disclosed for detecting unwanted couplings between a protected terminal and other terminals in an integrated controller of a power supply. In some embodiments, offset and clamp circuitry may apply a positive or negative offset voltage and clamp current to one or more terminals of the controller. In the event that a terminal having the offset voltage and clamp current is accidentally coupled to the protected terminal, the offset voltage and clamp current may be applied to the protected terminal. The protected terminal may be coupled to a fault detection circuitry operable to detect a fault signal at the protected terminal. In some embodiments, the controller may cause the power supply to shut down in response to a detection of the fault signal. In other embodiments, the controller may cause the power supply to shut down in response to a detection of a threshold number of cycles in which the fault signal is detected. Additional features of the present disclosure will become apparent from the detailed description, figures, and claims set forth below.

DETAILED DESCRIPTION

In order to provide a thorough understanding of the present invention, in some embodiments, numerous specific details are set forth and, in some cases, simplified equivalent implementation circuits have been described. However, it will be apparent to one having ordinary skill in the art that the equivalent simplified circuits may differ from the actual implementations and that all specific details need not be employed to practice the various embodiments.

Additionally, it should be appreciated that in the description below and in all described examples, a switched mode power supply may include a controller incorporated into an integrated circuit (IC) having some or none of the switching and power components in a monolithic or hybrid structure.

Various embodiments are described below for detecting unwanted couplings between a protected terminal and another terminal (e.g., a terminal adjacent to the protected terminal) of an integrated controller of a power supply. In some examples, offset and clamp circuitry is used to apply a positive or negative offset voltage and clamp current to one or more terminals of the controller (e.g., applying an offset voltage and clamp current to a terminal adjacent to the protected terminal). In the event that a terminal having an offset voltage and clamp current is accidentally coupled to the protected terminal, the offset voltage and clamp current are applied to the protected terminal. Fault detection circuitry coupled to the protected terminal is used to detect a fault condition when the offset voltage and clamp current are applied to the protected terminal.

FIG. 1illustrates a circuit diagram of an exemplary switched mode power supply100that may be controlled using a controller160having circuitry to detect an electrical coupling between two terminals of the controller, such as an electrical short between the feedback terminal and an adjacent terminal of the controller. Power converter100, also referred to herein as a “power supply,” is provided as a general example of a converter that may be controlled using controller160, which, in some examples, is included within an integrated circuit. In other examples, controller160and switch150are included in a single integrated circuit.

In operation, power converter100provides output power to load134from an unregulated AC input voltage102, also referred to herein as an “input voltage.” In some examples, power supply100includes a bridge rectifier104for rectifying the AC input voltage102to generate unregulated rectified DC voltage VRECT106having a half sine wave108. Bridge rectifier104may include four diodes arranged as shown inFIG. 1. In some examples, DC voltage VRECT106is filtered through capacitance CF110and applied at the input of the magnetic energy transfer element T1120, which is coupled to the switching element150.

In the example shown inFIG. 1, the energy transfer element120includes a coupled inductor, having an input winding122and an output winding124. The input winding may also be referred to herein as a “primary winding,” and the output winding may also be referred to herein as a “secondary winding.” Energy transfer element120provides galvanic isolation between the input side and the output side of power converter100to prevent direct current from flowing between the input side and the output side of the converter. As shown, a primary ground101is electrically coupled to circuitry referred to as being on the input side of power converter100. Similarly, a secondary ground111is electrically coupled to circuitry referred to as being on the output side of power converter100. In some examples, the primary ground101and the secondary ground111are isolated, while in other examples, the primary ground101and the secondary ground111are coupled together.

As shown in the illustrated example ofFIG. 1, the energy transfer element120further includes an auxiliary or bias winding126that provides an AC bidirectional sensed voltage VSENSEthat is used to provide feedback signal FB to controller160through the resistive divider formed by resistors R1146and R2148. The AC bidirectional sensed voltage VSENSEis representative of input voltage VRECT106when switch current151is flowing through input winding122, and is representative of output voltage VO132when a secondary current ISEC131is flowing through output winding124. In some examples, sensed voltage VSENSEis representative of an input voltage VRECT106during at least a portion of the time when switching element150is in the ON state, and representative of output voltage VO132during at least a portion of the time when switching element150is in the OFF state. In operation, when the switching element150is in the ON state, switch current151is allowed to flow through the input winding122, causing the sensed voltage VSENSEto be representative of a voltage that is proportional to the input voltage VRECT106. The ratio between the reflected voltage VSENSEand the input line voltage VRECT106is the same as the ratio between the number of turns in bias winding126and the number of turns in the input winding122. An example relationship that exists between the turns ratio and voltage ratio is shown below:

VSENSEVRECT=N3NI(1)
where N3is the number of turns on bias winding126and NIis the number of turns on primary winding122. When switching element150transitions from an ON state to an OFF state, switch current151is substantially prevented from flowing through switching element150and the energy stored in input winding122is transferred to secondary winding124, causing the sensed voltage VSENSEto be representative of a voltage that is proportional to the output voltage VO132. The ratio between the sensed voltage VSENSEand the output voltage VO132is the same as the ratio between the number of turns in bias winding126and the number of turns in secondary winding124. An example relationship that exists between the turns ratio and the voltage ratio is shown below:

VSENSEVO+VF=N3N2(2)
where N3is the number of turns on bias winding126, N2is the number of turns on secondary winding124, and VFis the voltage across the rectifier130when it is forward biased. When VFis negligible with respect to VO, the expression may be simplified to

In some examples, power converter100further includes clamp circuit118coupled across primary winding122of energy transfer element120. Clamp circuit118is used to limit the maximum voltage across switching element150due to the inductance of primary winding122and caused by the abrupt change in current when switching element150is switched to the OFF state. In some examples, primary winding122is coupled to switching element150such that, in operation, energy transfer element120receives energy with an input current151when switching element150is in an ON state, and energy transfer element120delivers energy to the output of power converter100after switching element150is switched to an OFF state. In some examples, the clamp circuit118includes a resistor, capacitor, and rectifier.

Switching element150may be used to control the transfer of energy through the energy transfer element120from the input terminals of power converter100to the output terminals of power converter100. Switching element150may be used to regulate an output of power supply100by switching between an ON state and an OFF state. More specifically, switching element150may be configured to be driven to an ON state, allowing current to be conducted through the switch while operating in its saturation region, and an OFF state, substantially preventing current from being conducted through the switch.

As shown in the illustrated example, switching element150is coupled between a primary terminal of the energy transfer element120and primary ground101. In some examples, switching element150includes a transistor, such as a metal oxide semiconductor field effect transistor (MOSFET), bipolar junction transistor (BJT), or any other transistor, or any other switch.

As mentioned above, power converter100includes controller160coupled to switching element150. Controller160is configured to control switching element150using a switching or drive signal, noted as “DRIVE SIGNAL”155inFIG. 1. The drive signal output of controller160is electrically coupled to the gate or control terminal of switching element150and is operable to drive switching element150between an ON state and an OFF state.

Controller160is configured to regulate the output voltage of power converter100by switching element150between an ON state and an OFF state to control the amount of power delivered to the output. During a switching event, when switching element150is in an ON state, switch current151flows through energy transfer element120. The amount of current151conducted when switching element150is ON is determined based in part on the input voltage, the inductance of the primary winding, and the time that switching element150remains in the ON state. The switch current151is zero, or at least close to zero, when switching element150is in the OFF state. When switching element150is transitioned from the ON state to the OFF state, current flows through secondary winding124. The current is then rectified by diode D1130and filtered by capacitor Co135to produce output voltage VO132and output current ISEC131. Thus, in operation, controller160causes switching element150to produce pulsating currents in the rectifier130, which, in the illustrated example, includes a diode130that is filtered by output capacitor Co135to produce the substantially constant output voltage VO132.

In some examples, controller160receives the feedback signal FB on feedback terminal FB156, information relating to the switch current151through the current sense152, and additional control signals on terminals154. Based on these inputs, controller160generates the output DRIVE SIGNAL155to control switching of the switching element150, thereby controlling the transfer of energy to the output. For example, controller160uses feedback signal FB, which is indirectly representative of the output voltage, to adjust the rate, magnitude, and/or duration of the pulsating current in primary winding122to provide the power required to maintain the desired output voltage. As shown inFIG. 1, feedback circuitry sends a feedback signal FB to controller160, which allows indirect sensing of the output voltage from the input side of the power supply. Feedback signal FB is equivalent to, or a scaled version of, bias voltage VSENSE. As described above, due to the magnetic coupling in energy transfer element120, energy is delivered to output winding124and to bias winding126after switching element150is switched to an OFF state. The magnetic coupling further causes the voltage induced across output winding124to be substantially proportional to the voltage across bias winding126. In this manner, bias voltage VSENSEincreases to a voltage representative of the output voltage when energy is transferred during the OFF state. In some instances, controller160uses feedback signal FB to directly regulate bias voltage VSENSEto a desired voltage that is representative of a desired output voltage. For example, bias voltage VSENSEmay be regulated to 20 V in order to indirectly regulate the output voltage to 5 V.

In some examples, bias winding voltage VSENSEincludes an AC voltage that, when the switching element is in an OFF state and energy is being transferred to the output, is positive due to the same winding direction of the bias126and secondary124windings. This positive signal is representative of the output and is utilized as the feedback signal FB for the controller. When the switching element is in an ON state, the energy transfer between the input and the output is blocked and the bias winding voltage VSENSEis negative due to the opposite direction of the bias126and primary122windings. This negative signal is representative of the input line and is utilized for the line over/under voltage fault detection. The AC bias voltage VSENSEis rectified (by diode140), filtered (by capacitor C1,145), and provides the BP supply144for the controller.

In some examples, power converter100further includes two or more resistors R1146and R2148forming a resistive divider for setting the bias voltage level. Specifically, resistors R1146and R2148may be coupled to bias winding126to provide a divided-down or scaled bias winding voltage VSENSEas the feedback signal FB to controller160. Values for resistors R1146and R2148may be selected based at least in part on the bias winding voltage VSENSEand the internal feedback reference of the controller. As mentioned above, the feedback signal FB is received by controller160and is representative of the sensed input voltage when switching element150is in the ON state, and representative of the sensed output voltage when switching element150is in the OFF state.

In some examples, the bias winding126further provides a supply voltage BP144to controller160through rectifier140and filter capacitance C1145. Additionally, in some examples, controller160includes features to employ any of a variety of control methods including, but not limited to, ON/OFF control, ON/OFF control with varying current limit levels, pulse width modulation (PWM), and the like.

It should be appreciated that in some examples, controller160(and its individual components) and switching element150may be implemented as a monolithic integrated circuit, may be implemented with discrete electrical components, or may be implemented in a combination of discrete components and integrated circuits. For example, switching element150may be included within controller160with its “drain terminal” coupled to the energy transfer element120and its “source terminal” coupled to primary ground101. In other examples, switching element150may not be included as part of the integrated circuit, and controller160may be used to control a switching element150that is manufactured as a device separate from controller160.

FIG. 2Aillustrates a circuit diagram200showing couplings for an exemplary controller260that may be similar or identical to controller160having an integrated switching element150and that may utilize a monolithic or hybrid silicon structure. In some examples, the illustrated couplings of exemplary controller260and the sample packages shown inFIGS. 2B,2C, and2D are used with a switched mode power supply similar or identical to switched mode power supply100ofFIG. 1. For example, controller260may be used with a switched mode power supply that implements peak current limit ON-OFF primary control and that is configured to provide input and output information to the controller260through a magnetic coupling element.

Controller260includes feedback terminal FB218for sensing the input and output voltages of the power supply. In some examples, feedback terminal FB218is coupled to the bias winding126of energy transfer element120through a resistive divider formed by resistors R1146and R2148. The bias winding126is magnetically coupled to the core of the energy transfer element120in reference to the primary ground101.

In the example shown inFIG. 2A, controller260includes an integrated switching element150. In some examples, switching element150includes a MOSFET integrated on the controller package either monolithically on the same silicon or as hybrid dies in the same package.

In some examples, controller260further includes drain terminal D202and source terminal S201for coupling to the drain and source of the integrated switching element150. Controller260further includes a supply or bypass terminal BP210for receiving a DC power supply to power the controller. As mentioned above, the controller power supply coupled to BP terminal210is provided by the bias winding126through the rectifier140and the coupling capacitors C1145and CBP211. Controller260further includes a programming terminal PD212for programming the characteristics of the controller, such as current limit thresholds, shut down or auto restart time delays, and the like. In some examples, the programming terminal PD212is coupled to the programming components, such as capacitor CPD216and resistor RPD214. In some examples, controller260further includes a compensation terminal CP206that may be coupled to the compensation components, such as resistor Rcp208, capacitor C1cp207, and capacitor C2cp209.

FIGS. 2B-Dillustrate exemplary packages that may be used for controllers160or260. For example,FIG. 2Billustrates a package220designed with an exposed pad231for improved heat transfer and noise immunity. Terminals7-12on the left side of package220are coupled to the source221of switching element150and act as a heat sink to dissipate heat in switching element150. In some examples, a double spacing is included between the drain that is coupled to terminal6, D222and bypass terminal4, BP224as a safety measure for the high voltage and electric field of the drain terminal6, D222. In some examples, feedback terminal2, FB228is located between programming terminal1, PD230and compensation terminal3, CP226. The clearance space between terminals1and2or between terminals2and3in different package types may be about 0.05″ (1.27 mm) to 0.1″ (2.54 mm). However, it should be appreciated that other clearance space values may also be used.

FIG. 2Cillustrates another exemplary package240that may be used for controllers160or260. In some examples, the terminals located on the right side of package240are coupled to the source241of switching element150and act as a heat sink to dissipate heat in switching element150. In some examples, instead of including a double clearance spacing for the drain terminal6, D242, terminal5, NC243is included next to terminal6, D242. However, terminal5, NC243is designated as a no connect NC to provide separation (more clearance space) between the high voltage on drain terminal6, D242and bypass terminal4, BP244. Similar to package220shown inFIG. 2B, programming terminal1, PD250, feedback terminal2, FB248, compensation terminal3, CP246, and bypass terminal4, BP244are placed adjacent to each other and are separated by a clearance of about 0.05″ (1.27 mm) to 0.1″ (2.54 mm).

FIG. 2Dillustrates yet another exemplary package250that may be used for controller260. Package250is a vertical Single Inline Pins (SIP) package in which the drain terminal7, D262is located with double clearance spacing to source terminal5, S261. Additionally, similar to packages220and240, the feedback terminal2, FB268is located adjacent to the programming terminal1, PD270and the compensation terminal3, CP266and is separated by a clearance of about 0.05″ (1.27 mm) to 0.1″ (2.54 mm). In the illustrated example the bypass terminal4, BP264is located between the compensation terminal3, CP266and source terminal5, S261.

Due to the small clearance spacing between terminals of most IC packages and the small spacing between terminal footprints on printed circuit boards (PCBs), it is possible that an unwanted coupling, or shorting, may accidentally be formed between the feedback FB terminal and an adjacent terminal. This may be problematic as the feedback terminal provides the output and input data to the controller that is used for regulation and stability of the power supply operation. Errors on the feedback terminal due to shorting to another terminal may result in inaccurate data being provided to the controller, causing output instability.

To detect the unwanted coupling between the feedback terminal and another terminal, such as an adjacent terminal, offset and clamp circuitry and fault detection circuitry may be used. Specifically, various embodiments are described below for detecting unwanted coupling between a terminal, such as the feedback terminal FB of a controller, and an adjacent terminal, such as the programming terminal PD and compensation terminal CP. In some embodiments, an offset voltage and clamp current are applied to the adjacent terminals such that a fault signal may be detected by circuitry coupled to the feedback FB terminal in the event that the feedback terminal FB shorts or couples to one or more of the adjacent terminals.

To illustrate,FIG. 3shows exemplary waveforms relating to feedback terminal sampling when there is no short or coupling between the feedback terminal FB and an adjacent terminal. As shown inFIG. 3, for each period T316of a switching cycle, the drive signal310is at a high voltage level to drive a switching element to an ON state for duration312and at a low voltage level to drive a switching element to an OFF state for duration314.

VSENSE320represents the sensed AC voltage induced in the bias (auxiliary) winding126of the energy transfer element120ofFIG. 1. During the ON time312of drive signal310, current flows through the switching element; however, because of the opposite direction of the primary122and secondary windings124and due to the coupling direction of diode D1,130no current flows in the secondary winding of the energy transfer element. Additionally, due to opposite winding directions of primary winding122and the bias winding126ofFIG. 1, the induced AC voltage VSENSE320goes negative322during switch ON time312. During the OFF time314of drive signal310, current begins to flow in the secondary winding. Due to the same winding directions of secondary winding124and the bias winding126ofFIG. 1, the induced AC voltage VSENSE320is positive324during at least a portion of switch OFF time314. In discontinuous conduction mode operation, after the transfer of energy to the secondary winding is complete and before the drive signal310drives the switching element to the ON state, some oscillations326may occur due to parasitic capacitance and inductance of the primary circuit.

While the switching element is in the OFF state, the feedback voltage VFB330appearing on the feedback terminal FB is a scaled down voltage of sensed voltage VSENSE320on the bias winding. The voltage330is determined based on the ratio of the resistive voltage divider formed by resistors R1146and R2148. However, as will be discussed in greater detail below with respect toFIGS. 4 and 5, when the switching element is in the ON state, the voltage330appearing on the feedback terminal FB is prevented from going negative due to circuitry clamping the voltage to zero. Instead, during the time that the switch is in the ON state, a current may be sourced out of the feedback terminal and represents the input voltage level.

During the time that the switching element is in the OFF state, the energy stored in the energy transfer element120ofFIG. 1is transferred to the secondary winding, resulting in the feedback voltage VFB330appearing on the feedback terminal being a scaled down voltage of the sensed voltage VSENSE320representative of the output voltage of the power converter. This scaled down voltage is utilized to control switching events of the switching element to regulate the output of the converter. In discontinuous conduction mode operation, after the transfer of energy to the secondary winding is complete and before the drive signal310drives the switching element to the ON state, some oscillations326may occur due to parasitic capacitance and inductance of the primary circuit. However, portions of the oscillation below zero may also be clamped to zero.

Input sampling clock340includes pulses342that are used to trigger retrieval of information from the input line during the time that the switching element is in the ON state and after an appropriate delay t1344from the switching element transitioning to the ON state. Similarly, the output sampling clock350includes pulses352that are used to trigger retrieval of information from the output during the time that the switching element is in the OFF state and after an appropriate delay t2354from the switching element transitioning to the OFF state.

FIG. 4illustrates a circuit diagram of exemplary fault detection circuitry402that may be used to detect shorts or couplings between a feedback terminal and an adjacent terminal of a controller. In some examples, fault detection circuitry402is coupled to feedback sensing circuitry401having components similar or identical to those shown inFIGS. 1 and 2. In other examples, fault detection circuitry402is at least partially included within controller160or260. In some examples, the sensed voltage VSENSE320of the bias winding126is coupled to fault detection circuitry402at node FB456through the resistive divider formed by resistors R1146and R2148.

As discussed above, input and output voltage information is retrieved through the voltage induced in the bias winding126on the magnetic core of energy transfer element120. When switching element150is in the ON state, a switch current151passes through the primary winding122and the generated flux induces a voltage having the opposite polarity at secondary winding124and bias winding126. Due to the coupling direction of rectifier140at the secondary side, no energy is transferred to the output. The negative voltage at the bias winding126is applied through the resistive divider formed by resistors R1146and R2148on the feedback terminal FB that is coupled to node FB456of the fault detection circuitry402.

However, fault detection circuitry402clamps the voltage at node FB456to the zero potential of ground during negative intervals of VSENSE320by sourcing a current to the feedback terminal FB/node FB456that is proportional to the negative voltage value induced in the bias winding126. Specifically, from the supply bus VDD405, current is supplied through the current mirror coupling of FET transistors M1410, M2420, and M3430. In some examples, the channel size of the diode connected FET transistor M1410is larger than the channels of FET transistors M2420and M3430, thereby providing “n” times more current capability (n×I) in comparison to FET transistors M2420and M3430. This allows scaling down of the mirrored currents427(1×I) and437(1×I) in comparison to the current407(n×I) that results in power saving in the protection circuitry.

In some examples, the base terminals of transistors412and414are coupled together and a bias current source Ibias1417supplies a bias current to the diode connected transistor412and to the transistor414. The current source Ibias1417also biases transistor416with its base terminal coupled to the emitter of transistor412. A current407(n×I), also referred to herein as a “fault detection current,” is sourced from VDD supply405through the diode connected FET410and the biased transistors414and416to the feedback terminal/node FB456to clamp the voltage at this node to zero, preventing it from going negative. Each of transistors416and418has its base coupled to the collector of the other transistor that results in a cross coupling of the transistors. In some examples, as shown inFIG. 4, transistors of412,414,416, and418are shown as BJT (Bipolar Junction Transistors); however it should be appreciated by those of ordinary skill in the art that MOSFET transistors may alternatively be used.

In some examples, since transistors416and418are of the same type/structure and cross coupled, it is ensured that the voltage drop across the transistors416and418remains the same. As a result, the voltage on node FB456would be clamped to the ground zero potential, regardless of the different current values passing through the transistors416and418. Thus, as the voltage on the FB terminal attempts to become more negative, more current from VDD supply405is supplied through transistors410,414, and416to the node FB456to clamp it at zero voltage.

The current through diode connected transistor M1410is mirrored on M2420and M3430with a scale down current ratio of 1/n. As long as the current437through M3430is below the reference current threshold of line over voltage IOV438, the output signal LOV435of the buffer432remains low. However, as the current437begins to exceed the line over voltage threshold IOV438, node431at input of buffer432is pulled high and the line over voltage signal LOV435at the output of buffer432goes high and Line Over Voltage (LOV) protection circuitry is activated.

Similarly, as in the example ofFIG. 4, because the buffer422is an inverting output buffer, as soon as the current427through M2420goes below the reference current threshold of line under voltage IUV428, node421is pulled low to ground and the output signal LUV425of the buffer422goes high and Line Under Voltage (LUV) protection circuitry is activated. In this way, fault detection circuitry402is capable of detecting voltages above an upper threshold and voltages below a lower threshold applied at feedback terminal FB/node FB456during negative intervals of VSENSE320induced on bias winding126.

FIG. 5illustrates exemplary offset and clamp circuitry500for applying an offset voltage Voffset520and clamp current to the terminals adjacent to the feedback terminal FB according to various embodiments of the present disclosure. In some examples, adjacent terminal #1includes compensation terminal CP530and adjacent terminal #2includes the programming terminal PD540. However, it should be appreciated that terminal #1and terminal #2may include any terminal of the controller. Additionally, it should be appreciated that terminal #1and terminal #2need not be adjacent to the protected terminal (e.g., feedback terminal FB) and that the principals described herein may also be applied to terminals that are not adjacent to the protected terminal.

As shown inFIG. 5, from the supply VDD505, a bias current source Ibias2510causes a clamping current Ibias2to pass through the diode connected transistor525, thereby biasing the transistors535and545. In some examples, transistors525,535, and545are of the same type/structure, causing an equal, or at least substantially equal, voltage drop across the transistors when a current similar to Ibias2is drawn from their emitters. As a result, the same voltage appears on the emitter terminals of transistors535and545relative to ground. In other words, the same offset voltage Voffset520applied to the emitter of transistor525appears on the emitter of transistor535coupled to the adjacent terminal #1530(e.g., the CP terminal) as well as the emitter of transistor545coupled to the adjacent terminal #2540(e.g., the PD terminal). As will be described in greater detail below, the value of offset voltage Voffset520and clamping current Ibias2may be selected to cause the Line Under Voltage425or Line Over Voltage435to be triggered when the feedback terminal FB is accidentally coupled to an adjacent terminal, such as adjacent terminal #1530or adjacent terminal #2540. Voffset520and clamping current Ibias2may be positive or negative. In some examples, offset voltage Voffset520is about 200 mV; however, it should be appreciated that other voltages may be used depending on the system configuration.

In the event that feedback terminal FB (156inFIG. 1,218inFIG. 2A,228inFIG. 2B,248inFIG. 2C, and268inFIG. 2D) couples to any of adjacent terminal #1or adjacent terminal #2(e.g., PD230or CP226inFIG. 2B, PD250or CP246inFIG. 2C, or PD270or CP266inFIG. 2D), for example, during soldering on the PCB board or by any other error, the clamped offset voltage Voffset520applied to adjacent terminal #1530or adjacent terminal #2540appears on the feedback terminal FB and sources to the FB terminal an additional clamping current Ibias2512that is mirrored from transistor525on transistors535and545. Specifically, as discussed above with respect toFIG. 4, when switching element150is in the ON state and a negative voltage is induced in the bias winding126, the fault detection circuitry402clamps the voltage at the feedback node FB456to zero. However, when the feedback terminal FB is coupled to adjacent terminal #1or adjacent terminal #2, the offset voltage (that in some examples is around200mV) instead appears on the feedback terminal FB.

Referring back toFIG. 4, during switch ON time, the fault detection circuitry402is active and expects a negative voltage at node FB456representing an input voltage level that, in normal operation, is above the line under voltage threshold. A current407(n×I) is sourced from the VDD bus405through M1410and a fraction (1×I) of it (current427) is mirrored on M2420. During normal operation, current427is higher than the reference current source of under voltage threshold tuv428. As a result, node421is pulled high and output signal LUV425of the inverted output buffer422remains low, preventing the activation of line under voltage fault detection. However, when there is an unwanted coupling from an adjacent terminal, for example, terminal530or540(FIG. 5), a positive clamped offset voltage Voffset520appears at FB terminal (node456) during the power switch ON time. The presence of the positive offset voltage Voffset520sources the additional clamping current Ibias2512mirrored from transistor525on transistors535and545(FIG. 5) and causes a lower current to flow through M1410, thereby causing a scaled down mirrored current427in M2420that may be lower than the reference current source of under voltage threshold tuv428. This may result in node421being pulled low to ground and output signal LUV425of the inverted output buffer422going high to activate the line under voltage fault protection circuitry. Thus, the line under voltage fault protection may serve a double functionality of line under voltage protection as well as detecting a coupling between the FB terminal and any of its adjacent terminals.

Similarly, during switch ON time, the fault detection circuitry402is active and expects a negative voltage at node FB456representing an input voltage level that, in normal operation, is below the line over voltage threshold so that a current407(n×I) sourced from the VDD bus405through M1410provides a mirrored current437in M3430having a value that is fraction (1×I) of the current407and that is lower than the reference current source of over voltage threshold IOV438. As a result, node431at the input of buffer432is pulled low and its non-inverted output signal LOV435remains low, preventing activation of line over voltage fault detection. However, in some examples where the offset voltage Voffset520may be negative and offset clamping current may be sinked out of FB terminal instead of sourcing to the FB terminal, any unwanted coupling to the feedback terminal causes a greater amount of current to be sourced from the VDD bus405through M1410. As a result, a greater amount of current is mirrored on M3430that may be larger than the reference current source of the over voltage threshold IOV438. This may cause the voltage at node431to be pulled high and output signal LOV435of buffer435going high to activate the line over voltage protection circuitry. Thus, the line over voltage fault protection may serve a double functionality of line over voltage protection as well as detecting an accidental coupling between the FB terminal and any of its adjacent terminals.

To illustrate the effect of a short or a coupling between the feedback terminal FB and an adjacent terminal having an offset voltage,FIG. 6illustrates an exemplary voltage waveform for the feedback voltage VFB620on the feedback terminal FB (156inFIG. 1,218inFIG. 2A,228inFIG. 2B,248inFIG. 2C,268inFIG. 2D, and456inFIG. 4) during normal operation (interval640) and after an unwanted coupling between the feedback terminal FB to one of either the adjacent terminal #1(e.g., compensation terminal CP226,246, or266shown inFIG. 2B,FIG. 2C, andFIG. 2D, respectively) or the adjacent terminal #2(e.g., programming terminal PD230,250, or270shown inFIG. 2B,FIG. 2C, andFIG. 2D, respectively) (interval660).

Specifically, during normal operation640and at each switching period T646, whenever the switching element150is in the ON state642, the voltage VFB620on the feedback terminal FB is clamped to zero622by the fault detection circuitry402. When the switching element150is in the OFF state644, the voltage VFB620on the feedback terminal FB is representative of the output voltage and may be used for output regulation. During this time, the voltage VFB620goes high to VFB-Reg624. The sensed and sampled voltage level VFB-Reg624may be used through regulation circuitry (not shown) to control switching and transfer of energy to the output.

In the event that the FB terminal accidentally shorts or couples to an adjacent terminal, the offset voltage Voffset666(in some examples around200mV) and clamp current is applied from the adjacent terminal to the feedback terminal, shifting VFB620by the offset value Voffset666, as shown by the VFB620waveform during the duration identified as “FB Terminal Short to Adjacent Terminal”660. The offset value Voffset666and clamp current during the ON time of power switch has a dominant effect on operation of the zero clamping circuit described inFIG. 4.

During the time that the switching element150is in the ON state, the feedback terminal FB retrieves information to detect LUV or LOV faults. Specifically, the offset voltage and clamp current, if applied to feedback terminal FB due to accidental coupling to either of the adjacent terminals, may cause triggering of the LUV or LOV fault detection circuitry as described above with respect toFIG. 4.

In some examples, to avoid false shutdowns and to ensure that an actual coupling between the FB terminal and an adjacent terminal has occurred, a counter may be used to identify a threshold number of switching cycles k668in which the offset voltage Voffset666and clamp current persistently exists at the feedback terminal FB. Specifically, a counter may be activated in response to the first occurrence of the offset voltage Voffset666and clamp current during an ON state662that triggers the LUV of LOV fault signal (e.g., LUV fault signal425or LOV fault signal435inFIG. 4). The counter may be configured to count for a threshold number of successive switching cycles k668in which the offset voltage Voffset666and clamp current causes the LUV or LOV fault signal to be triggered. In response to the threshold number of successive switching cycles k668being identified by the counter, the controller may shut down the power converter, resulting in the feedback voltage VFBto drop to zero670. In some examples the threshold number of successive switching cycles k may be 8. However, it should be appreciated that other values may be used depending on the system configuration and desired confidence that an actual coupling has occurred.

In some examples, after shutdown, the controller enters an auto-restart mode in which it repeats intervals of shutdown and restart. Specifically, after each fault detection, the controller enters the shutdown interval after which it restarts to check for a fault condition. If the fault condition still exists, then the controller again enters the shutdown interval. The controller cycles between the shutdown and restart intervals for any number of times until the fault condition no longer exists.

FIG. 7shows a flow chart for an exemplary process700for detecting an unwanted coupling between a protected terminal and another terminal of a controller. At block701, an offset voltage and clamp current may be applied to one or more terminals of a controller. In some examples, the offset voltage and clamp current may be applied to one or more terminals that are adjacent to the protected terminal, while in other examples, the offset voltage and clamp current may be applied to one or more terminals that are not adjacent to the protected terminal. The positive or negative offset voltage and clamp current may be applied using circuitry similar or identical to offset and clamp circuitry500discussed above. In some examples, this circuitry may be used to apply an offset voltage and clamp current to terminals (in some examples, applied to a programming terminal and a compensation terminal) that are adjacent to a protected terminal (in some examples, the feedback terminal) of the controller. The offset voltage and clamp current may be positive or negative and may have any value depending on the particular system implementation.

At block703, a fault detection signal (e.g., a fault detection current) level may be monitored by fault detection circuitry coupled to the protected terminal. For example, circuitry similar or identical to fault detection circuitry402may be used to monitor the presence of an offset voltage and clamp current at the protected terminal (e.g., the feedback terminal FB) of a controller by monitoring the amount of fault detection current caused to flow in the protected terminal by the offset voltage and clamp current at that terminal.

At block705, the monitored fault detection signal level (in one example, the fault detection current) can be compared to a fault threshold (e.g., an upper threshold or a lower threshold). In some examples, circuitry similar or identical to fault detection circuitry402may be used to compare the monitored fault detection signal (e.g., fault detection current) to a reference current representative of the upper threshold or the lower threshold. If, during the ON state of a switching element of the power supply, the signal is beyond the threshold (e.g., above the upper threshold or below the lower threshold), the process may move to block707. However, if the signal is within the threshold (e.g., below the upper threshold or above the lower threshold), the signal may continue to be monitored by having the process return to block703.

In some examples, at block705, a counter may be used to determine if a predefined threshold number of consecutive cycles have occurred in which the fault detection signal (e.g., fault detection current) exceeds the threshold values. If the threshold number of cycles is reached, then the process may proceed to block707. However, if the value of the signal returns to within the threshold values before the threshold number of cycles is reached, then the process may return to block703

At block707, the power supply may be shut down. In some examples, a controller similar or identical to controllers160or260may be used to shut down the power supply. In some examples, at block707, the controller may enter an auto-restart mode after shutting down the power supply.