System and method for reducing phase noise

Systems and methods that reduce phase noise are provided. In one embodiment, a method may include one or more of the following: generating a signal at a particular frequency in which the signal may be associated with a harmonic frequency signal disposed at a harmonic frequency; and selectively attenuating frequency content disposed in a region around the harmonic frequency. The signal may be associated with a second harmonic frequency signal disposed at a second harmonic frequency. Frequency content disposed in a second region around the second harmonic frequency may be selectively attenuated. One or more non-linear operations may be applied to the signal and the applied signal may be transmitted.

BACKGROUND OF THE INVENTION

Modern telecommunication systems are increasingly built using compact and cost efficient circuits. In particular, the family of low-cost, low-power transceivers has substantially matured in the past two decades. Because of cost issues, high performance semiconductor processes are not normally used for such transceivers. Therefore, high performance is generally achieved through optimum circuit design and innovative techniques.

One of the specifications of a transceiver is the transmitted spectrum phase noise. Often, a transmitted signal is directly or indirectly generated using a local oscillator. Therefore, the transmitted spectrum phase noise performance is tied to the performance of the local oscillator. Phase noise in the local oscillator of a transceiver can overwhelm nearby channels because the phase noise spectral density can grow directly with the transmitted signal power and, at a certain threshold, the phase noise in the signal generated by the local oscillator can be greater than another attenuated signal occupying the same frequency.

FIG. 1is a block diagram illustrating a conventional transmitter100. The transmitter100consists of a local oscillator102, a divider104, a mixer106, a power amplifier108, and an antenna110. The oscillator102is a voltage controlled oscillator (VCO). The oscillator102is connected to the divider104which, in turn, is connected to the mixer106. The mixer106is connected to the power amplifier108which, in turn, is connected to the antenna110.

In operation, after the oscillator102generates a signal, various non-linear operations are applied to the generated signal. For example, the signal generated by the oscillator102is divided by the divider104. The divided signal is then mixed with an outside signal107by the mixer106. The mixed signal is then amplified by the amplifier108before being transmitted out via the antenna110.

In some low-end applications, the transmitter100is implemented with the oscillator102connected directly to the antenna110. However, in most typical applications, the divider104, the mixer106and the power amplifier108are present. In addition, any number of linear buffers or non-linear buffers can be connected between the operational blocks. After the oscillator102, however, each operational block can add to the noise profile of the signal generated by the oscillator102, even if the operational blocks following the oscillator102are ideally noiseless.

FIG. 2is a graphical depiction showing a typical phase noise curve of a conventional signal source. The phase noise curve200is drawn according to a logarithmic scale and, therefore, the 1/f3region202and the 1/f2region204appear linear with −30 dB/dec and −20 dB/dec slopes, respectively. Depending on the type of the conventional signal source, the 1/f3region202may be substantially large or negligibly small. Due to subsequent buffers or a resistance from non-linear operators immediately after the signal source output, the phase noise profile curve200flattens to a minimum thermal noise floor level206.

For example, a resistor can be coupled to an output of a signal source. The noise from the resistor propagates through the non-linear function of the signal source and increases the noise profile of the signal source. Referring toFIG. 2, the thermal noise floor206extends up into a number of the harmonics of the generated signal. Every time a signal with a corresponding phase noise profile goes through a non-linear operation (e.g., division, mixing, non-linear amplification, etc.), frequency components are translated. The translation of the frequency components is accomplished through, for example, an offset equal to the frequency of oscillation or its harmonic frequencies.

FIG. 3is a functional diagram showing a translation of frequency components during a power amplification process300utilizing a conventional Class B power amplifier. The graph302is representative of a sample oscillating frequency such as, for example, a frequency generated by a VCO. The power amplifier304amplifies the signal302, passes the portion of the oscillation in the positive input half cycles and zeroes the portion of the oscillation in the negative input half cycles. The resultant output of the power amplifier304is represented by the graph306. The voltage gain during the positive half cycle of the power amplifier304illustrated inFIG. 3can be assumed to be equal to one.

Mathematically, the process reflected onFIG. 3corresponds to multiplying a cosine wave and a square wave in the time domain. In the frequency domain, the process is represented as a convolution of the impulses of a cosine wave and a series of diminishing impulses of a square wave. Referring toFIG. 4, a graphical depiction400of a frequency domain convolution of a sine wave and a square wave is shown.FIG. 4is representative of the power amplification effect of the power amplifier ofFIG. 3in the frequency domain. The input cosine wave402is representative of a signal generated by an oscillator, prior to the application of a non-linear operation (e.g., a power amplification) to the signal. The input cosine signal can be characterized by a thermal noise floor level403. In this case, the non-linear operations consist of a convolution of the oscillation spectrum with a series of evenly spaced impulses. The square wave404is also characterized by a noise profile, which is not reflected inFIG. 4because the square wave404is assumed to be an ideal square wave. The square wave404is shown with a DC component, a main impulse at a frequency f0and additional harmonic impulses with declining amplitudes at respective frequencies 2f0, 3f0, 4f0, etc.

As a result of the convolution process, replicas of the oscillation spectrum are generated and added together. Referring toFIGS. 5A and 5B, there are illustrated graphical depictions502and504showing a convolution of a cosine wave and an impulse at f0of a square wave and a convolution of a cosine wave and an impulse at 2f0of a square wave, respectively. Assuming that the thermal noise floor of the oscillation spectrum in graphical depictions502and504is a relatively wide band, an accumulation of the thermal noise floor occurs because of the folding of the spectrum onto itself. Therefore, the thermal noise at approximately 2f0will fold down to approximately f0due to the convolution of the input cosine with the square impulse at f0(represented by the graphical depiction502). Similarly, the thermal noise at approximately 3f0will fold down to approximately f0due to the convolution of the input cosine with the square impulse at 2f0(represented by the graphical depiction504). The thermal noise level close to the oscillation frequency will, therefore, grow due to the non-linear operation. This characteristic is common to non-linear blocks.

In general, an increase in the thermal noise floor of a generated signal (e.g., an oscillator generated signal) is present even if noiseless blocks (e.g., ideal non-linear operators) follow the signal generator. One of the reasons for this is that the generated signal preserves its thermal noise floor characteristic after it has been generated and even preserves its thermal noise floor characteristic throughout any subsequent non-linear operations since the resulting convolution does not eliminate the thermal noise floor profile.

Further limitations and disadvantages of conventional and traditional approaches will become apparent through comparison of such systems with some aspects of the present invention as set forth in the remainder of the present application with reference to the drawings.

BRIEF SUMMARY OF THE INVENTION

Certain aspects of the present invention may be found in, for example, systems and methods that reduce phase noise. In one embodiment according to aspects of the present invention, a method that reduces phase noise may include, for example, one or more of the following: generating a signal at a particular frequency, the signal being associated with a harmonic frequency signal disposed at a harmonic frequency; and selectively attenuating frequency content disposed in a region around the harmonic frequency. The signal may be associated with a second harmonic frequency signal disposed at a second harmonic frequency. Frequency content disposed in a region around the second harmonic frequency may be selectively attenuated. One or more non-linear operations may be applied to the signal and the applied signal may be transmitted. For example, the signal may be divided, may be mixed with a reference signal, and/or may be amplified. The signal may be generated, for example, by a fixed frequency oscillator, a voltage controlled oscillator, and/or a current controlled oscillator. The frequency content may be selectively attenuated by at least one attenuating circuit. Each attenuating circuit may comprise, for example, an integrated component and/or a discrete component. Each attenuating circuit may also comprise one or more harmonic traps. The signal may be buffered prior to selectively attenuating the frequency content. The buffering may be performed by a buffer. The selective attenuating of the frequency content may be performed within the buffer. The signal may be, for example, a single-ended signal, a differential signal and/or a set of signals in quadrature. The selective attenuating may comprise, for example, reducing, canceling, notching and/or band stopping frequency content disposed in a region around one or more harmonic frequencies.

In another embodiment according to aspects of the present invention, a circuit that reduces phase noise may be provided. The circuit may comprise, for example, a signal generator that generates a signal at a particular frequency in which the signal may be associated with a harmonic frequency signal disposed at a harmonic frequency, and an attenuating circuit that selectively attenuates frequency content disposed in a region around the harmonic frequency. A buffer that buffers the signal may be provided in which the buffer may be coupled to the signal generator. The attenuating circuit may be disposed, for example, within the buffer. A non-linear operation circuit may apply at least one non-linear operation to the signal to obtain an outgoing signal. A transmitting circuit may transmit the outgoing signal. An antenna may be provided in the transmitting circuit, for example, to transmit the outgoing signal. A divider may be provided that divides the signal. A mixer may be provided that mixes the signal with a reference signal. An amplifier may be provided that amplifies the signal. The signal generator may comprise, for example, a fixed frequency oscillator, a voltage controlled oscillator, and/or a current controlled oscillator. The attenuating circuit may comprise one or more integrated components and/or discrete components. The attenuating circuit may comprise at least one harmonic trap.

In yet another embodiment according to aspects of the present invention, a system that reduces phase noise may comprise, for example, a signal generator that generates a signal at a particular frequency in which the signal may be associated with a harmonic frequency signal disposed at a harmonic frequency, and a buffer that buffers the signal in which the buffer may be adapted to selectively attenuate frequency content disposed in a region around the harmonic frequency. The signal may be, for example, a single-ended signal, a differential signal and/or a set of signals in quadrature. The signal generator may comprise, for example, a differential output signal generator. The buffer may comprise, for example, a differential pair of transistors in which the differential pair of transistors may be adapted to receive the signal. The buffer may also comprise, for example, a harmonic trap that may be adapted to attenuate frequency content disposed in a region around the harmonic frequency signal. The harmonic trap may be disposed, for example, across a differential output of the buffer.

DETAILED DESCRIPTION OF THE INVENTION

Certain aspects of the present invention may be found in, for example, systems and methods that reduce phase noise. In one embodiment according to aspects of the present invention, a method that reduces phase noise may include, for example, one or more of the following: generating a signal at a particular frequency, the signal being associated with a harmonic frequency signal disposed at a harmonic frequency; and selectively attenuating frequency content disposed in a region around the harmonic frequency. The signal may be, for example, a single-ended signal, a differential signal and/or a quadrature signal. The signal may be associated with other harmonic frequency signals disposed at respective harmonic frequencies. Frequency content disposed in a region around the respective harmonic frequencies may be selectively attenuated. One or more non-linear operations may be applied to the signal and the applied signal may be transmitted, for example, as a wireless signal (e.g., a radio frequency signal) via an antenna.

Some embodiments according to the present invention may provide that frequency content may be selectively attenuated by one or more attenuating circuits. An attenuating circuit may comprise, for example, one or more integrated components, discrete components, active components and/or passive components. An attenuating circuit may comprise one or more harmonic traps. The selective attenuating may comprise, for example, reducing, canceling, notching and/or band stopping frequency content disposed in a region around one or more harmonic frequencies.

FIG. 6is a block diagram illustrating a circuit600implementing a noise attenuator in accordance with an embodiment of the present invention. The circuit600may comprise, for example, a signal source602, a noise attenuator604, and a non-linear operator606. The signal source602may be coupled to the noise attenuator604which, in turn, may be coupled to the non-linear operator606. The signal source602may comprise, for example, an oscillator (e.g., a voltage controlled oscillator). The noise attenuator604may comprise, for example, circuitry adapted to attenuate one or more specific harmonics of the generated signal from the signal source602. The non-linear operator606may be adapted to perform one or more non-linear operations with a signal received from the noise attenuator604.

In operation, the signal source602may generate a signal and the generated signal may be characterized with a particular thermal noise profile. The signal may include, for example, one or more single-ended signals, differential signals, quadrature signals or other types of signals. After the generated signal is communicated to the noise attenuator604, the noise attenuator604may attenuate, for example, one or more harmonics from the generated signal. The attenuation may occur, for example, in a designed frequency range around each selected harmonic. The attenuation may include, for example, reducing, canceling, notching, band stopping frequency content at the selected harmonic frequencies, at approximately the selected harmonic frequencies or at a frequency range (e.g., a region) around or including the selected harmonic frequencies. In one embodiment of the present invention, the noise attenuator604may be adapted to attenuate, for example, the second harmonic of the signal generated by the signal source602. Subsequently, one or more non-linear operators606may be applied to the attenuated signal received from the noise attenuator604. In this way, any subsequent convolution of the signal cosine characteristic of the generated signal with any subsequent non-linear operation (e.g., an impulse train) will result in a signal with a substantially reduced thermal noise floor profile.

FIG. 7is a block diagram illustrating a transmitter700implementing a noise attenuator in accordance with an embodiment of the present invention. The transmitter700may comprise, for example, an oscillator702, a buffer704, a noise attenuator706, one or more non-linear operators708, and an antenna710. The oscillator702may be coupled to the buffer704which, in turn, may be coupled to the noise attenuator706. The noise attenuator706may be coupled to the one or more non-linear operators708which, in turn, may be coupled to the antenna710. The oscillator702may comprise, for example, a voltage controlled oscillator. The oscillator702may generate a signal with a predetermined frequency characteristic such as, for example, a frequency f0. The buffer704may be adapted to buffer the signal received from the oscillator702. Although illustrated as between the oscillator702and the noise attenuator706, the buffer704can be disposed in addition or different locations. For example, an additional buffer may be disposed between the noise attenuator706and the non-linear operators708. The noise attenuator706may comprise, for example, circuitry adapted to attenuate one or more selected harmonics of the incoming signal. In addition, although illustrated as separate components, the various components may demonstrate different levels of integration. For example, the buffer704may be integrated with the noise attenuator706. In fact, the entire transmitter700may be part of an integrated radio transceiver which may be disposed on one or more integrated circuit chips.

In operation, the oscillator702may generate a signal with a specific thermal noise profile characteristic. The generated signal may then be buffered within the buffer704. The buffered signal may then be communicated to the noise attenuator706. The noise attenuator706may be adapted to attenuate one or more harmonics of the generated signal with frequency f0. In one embodiment of the present invention, the noise attenuator706may be adapted to attenuate the second harmonic 2f0of the generated signal. After the signal has been processed by the noise attenuator706, one or more non-linear operators708may be applied. The non-linear operator708may comprise, for example, one or more dividers, mixers and/or power amplifiers (e.g., non-linear power amplifiers). After the non-linear operators708have been applied, the resulting signal may be transmitted as a wireless signal (e.g., a radio frequency signal) via the antenna710. In another embodiment according to the present invention, the resulting signal may be transmitted as a wired signal to a network (e.g., a local area network, a wide area network, the Internet, an Ethernet, etc.)

FIG. 8is a flow diagram illustrating a method800that reduces signal noise in accordance with an embodiment of the present invention. In step804, a signal may be generated. For example, the signal may be generated by an oscillator or a different type of signal generator. In step806, the noise at one or more selected harmonic frequencies of the generated signal may be reduced (e.g., cancelled, notched, band stopped, etc.) Any subsequent non-linear operations may be applied to the resulting signal in step808.

FIG. 9Ais a block diagram of a noise attenuator913implementing a harmonic trap in accordance with an embodiment of the present invention. The noise attenuator913may comprise, for example, a harmonic trap914. The harmonic trap914may be adapted to attenuate a particular harmonic of an incoming signal. For example, the incoming signal911may be characterized by a main frequency f0and multiple harmonic frequencies of the main frequency f0. The harmonic trap914may attenuate one or more harmonics.FIG. 9Aillustrates an embodiment of a harmonic trap that may attenuate the n-th harmonic of the incoming signal911at a frequency nf0. An output signal912may be generated from the harmonic trap914or the noise attenuator913. Although illustrated as a series trap, the present invention also contemplates parallel traps such as, for example, shunt traps.

FIG. 9Bis a block diagram of a noise attenuator923implementing two harmonic traps in accordance with an embodiment of the present invention. The noise attenuator923may comprise, for example, two harmonic traps: harmonic trap924and harmonic trap925. The harmonic traps924and925may each be adapted to attenuate a particular harmonic frequency of the incoming signal. For example, the incoming signal921may be characterized by a main frequency at frequency f0and multiple harmonics of frequency f0. After receiving the incoming signal921, the noise attenuator923may attenuate specific harmonics of frequency f0from the incoming signal921. For example, the harmonic trap924may attenuate the n-th harmonic and the (n+1)-th harmonic of frequency f0of the incoming signal921. In this way, the noise attenuator923attenuates the harmonic frequencies nf0and (n+1)f0of the incoming signal921and generates the output signal922. Although illustrated as consecutive harmonics, the present invention also contemplates attenuating any two or more harmonic frequencies (e.g., selected non-consecutive harmonic frequencies).

FIG. 9Cis a block diagram of a noise attenuator933implementing a plurality of harmonic traps in accordance with an embodiment of the present invention. The noise attenuator933may comprise, for example, a plurality of harmonic traps934,935and936. One or more of the harmonic traps934,935and936may be adapted to attenuate a particular harmonic frequency of the incoming frequency. For example, the incoming signal931may be characterized by a frequency f0and corresponding plurality of harmonics of frequency f0. After the incoming signal931is received by the noise attenuator933, the harmonic trap934may attenuate the n-th harmonic frequency of the incoming signal. Similarly, the harmonic trap935may attenuate the (n+1)-th harmonic of the incoming signal. In accordance with an embodiment of the present invention, the noise attenuator933may comprise a specific number of harmonic traps so that only specific harmonics from an incoming signal931are attenuated. For example, the noise attenuator933may also be adapted to attenuate all the harmonics starting from the n-th harmonic up to the (n+i)-th harmonic of the incoming signal931. Attenuation of the (n+i)-th harmonic may be preformed by the harmonic trap936. In effect, the noise attenuator933may attenuate all the harmonics of the incoming signal931starting from the n-th harmonic to the (n+i)-th harmonic. After all the harmonics have been attenuated by the noise attenuator933, an output signal932may be generated.

Although illustrated as harmonic traps trapping consecutive harmonic frequencies, the present invention contemplates that each harmonic trap may trap any selected harmonic frequency. The present invention also contemplates that the trapping may occur in any order and that any selected harmonic frequency may be trapped. Various embodiments according to the present invention may use series harmonic traps, parallel harmonic traps or some combination thereof. Although illustrated as separate blocks, the harmonic traps may be integrated with each other as well as with other components in noise attenuator or other transceiver components.

Some embodiments according to the present invention may provide harmonic traps that may be adjustable for trapping a selected harmonic frequency. In fact, the harmonic traps may also be programmable for particular harmonic frequencies. The control of the harmonic traps may also provide switchable harmonic traps. For example, some embodiments according to the present invention may provide switching means that allow for the switching of one or more harmonic traps in or out of the circuitry of the noise attenuator. For example, a switch coupled to a particular harmonic trap may provide a means by which a signal can bypass the particular harmonic trap.

Although the some embodiments according to the present invention may relate to trapping harmonic frequencies, the present invention need not be so limited. Thus, frequency traps may be designed that trap selected frequencies which may not be harmonic frequencies.

FIG. 9Dis a block diagram illustrating a harmonic trap950that may be connected in parallel or in series or in some combination thereof in accordance with an embodiment of the present invention. The harmonic trap950may comprise, for example, a trap that traps the n-th harmonic frequency of a signal with main frequency f0. The harmonic trap950may comprise, for example, a parallel harmonic trap952or a series harmonic trap954or some combination thereof. The harmonic trap952may comprise, for example, a capacitor and an inductor coupled to ground. The parallel harmonic trap952may be connected in parallel to an incoming signal path. The parallel harmonic trap952may be adapted to attenuate the n-th harmonic of an incoming signal by shunting the n-th harmonic to ground. In an embodiment of the present invention, the harmonic trap950may comprise a series harmonic trap954. The series harmonic trap954may comprise, for example, a plurality of variable capacitors and an inductor. The harmonic trap954may be connected in series to a signal path.

In accordance with another embodiment of the present invention, a harmonic trap, such as the harmonic trap950, may be adapted to attenuate the n-th harmonic of an incoming signal with a main frequency f0as well as a region around the n-th harmonic of the incoming signal f0. For example, the harmonic trap950may act as a band stop filter and may be adapted to filter out the n-th harmonic as well as a region in frequency space around the n-th harmonic of an incoming signal with main frequency f0. The region may include the n-th harmonic frequency, although the selected harmonic frequency need not be centered in the designed region.

FIG. 10is an electrical diagram of a circuit1000implementing a signal generator in combination with a harmonic trap in accordance with an embodiment of the present invention. The circuit1000may comprise, for example, a single-ended oscillator1020, a buffer1022, a harmonic trap1024, a voltage source1028, and a non-linear operator1026. The single-ended oscillator1020may be coupled to the buffer1022which, in turn, may be coupled to the harmonic trap1024. The harmonic trap1024may be coupled to the non-linear operator1026.

The single-ended oscillator1020may comprise, for example, an inductor1012, capacitors1014and1016, resistors1010and1018, a transistor1008, voltage sources1004and1002, and a current source1006. Although illustrated as a FET, the transistor1008may comprise, for example, a MOS transistor, a CMOS transistor, a bipolar junction transistor, a hybrid bipolar junction transistor, a semiconductor transistor, a compound semiconductor transistor, another types of transistor or any other amplifying device. The gate terminal of the transistor1008may be connected to the voltage source1002which, in turn, may be connected to ground (e.g., electrical ground). The source terminal of the transistor1008may be connected to the current source1006which, in turn, is connect to ground. The body terminal of the transistor1008may also be grounded via an optional connection1009. The inductor1012, the resistors1010and1018and the capacitors1014and1016may be appropriately selected so that an output signal at a particular main frequency may be generated at the drain terminal of the transistor1008. The output of the transistor1008, which may be disposed at the drain terminal of the transistor1008, may be connected to the single-ended output of the oscillator1020. The voltage source1004may be connected to ground at its negative terminal and, at its positive terminal, may be connected to the inductor1012, the capacitor1014and the resistor1018. The voltage source1002may be connected to ground at is negative terminal and, at its positive terminal, may be connected to the gate terminal of the transistor1008.

The harmonic trap1024may comprise, for example, one or more harmonic traps adapted to attenuate one or more harmonics of an incoming signal. In addition, the harmonic trap1024may comprise, for example, one or more harmonic traps that are connected in series, in parallel, or in some combination thereof to the incoming signal. The non-linear operator1026may be connected to the voltage source1028which, in turn, may be connected to ground. The non-linear operator1026may comprise, for example, one or more non-linear operators. The non-linear operator1026may comprise, for example, one or more dividers, mixers, and/or power amplifiers (e.g., non-linear power amplifiers).

In operation, a specific frequency signal may be generated at the single-end output of the oscillator1020. The main frequency at which the generated signal oscillates may be determined, for example, by the component values of the inductor1012, the resistors1010and1018and the capacitors1014and1016. The generated signal may then be buffered by the buffer1022. The buffered signal may then be sent to the harmonic trap1024. The harmonic trap1024may attenuate one or more harmonics of the signal generated by the single ended oscillator1020. In accordance with an embodiment of the present invention, the harmonic trap1024may selectively attenuate one or more harmonics of the generated signal. In accordance with another embodiment of the present invention, the harmonic trap1024may attenuate the generated signal within a region around the harmonics. One or more non-linear operators1026may be applied at the output of the harmonic trap1024.

In yet another embodiment of the present invention, the circuit1000may utilize no buffers. For example, the circuit1000may comprise a signal generator1020that may be coupled to a harmonic trap1024without utilizing a buffer. The harmonic trap1024may then be coupled to one or more non-linear operators1026. In yet another embodiment of the present invention, the harmonic trap1024may be implemented within the buffer1022.

FIG. 11is an electrical diagram of exemplary harmonic traps that may be utilized in accordance with various embodiments of the present invention. The harmonic trap1110may comprise, for example, a capacitor1112and an inductor1114. The values of the capacitor1112and the inductor1114may be selected so that the harmonic trap1110attenuates a specific harmonic and/or a region around the specific harmonic of an incoming signal. In one embodiment, the capacitor1112is a variable capacitor or the inductor1114is a variable inductor. In addition, the harmonic trap1110may be connected in parallel so that the specific harmonic or a frequency range (e.g., a region) including the specific harmonic of an incoming signal may be shunted to ground. By attenuating one or more harmonics, and/or regions around the one or more harmonics, a harmonic trap, in accordance with an embodiment of the present invention, may reduce the phase noise profile of a generated signal prior to the execution of a non-linear operation. In one embodiment, by reducing the frequency content around one or more harmonic frequencies of a main frequency, the phase noise profile might not substantially grow or may be substantially reduced at or around the main frequency even during a non-linear operation (e.g., a convolution operation) in which the incoming signal spectrum is folded back onto itself.

The harmonic trap1122may comprise, for example, an inductor1124and a capacitor1126connected in parallel. The inductor1124may have an inductance L and the capacitor may have a capacitance C. The harmonic trap1122may be tuned to attenuate the n-th harmonic of a signal with main frequency f0by changing L and C so that

12⁢π⁢LC=nf0.
The harmonic trap1122may be connected in series with a signal path of an incoming signal. In another embodiment, the harmonic trap1122may be connected to ground to provide a shunt path to ground for the n-th harmonic of the signal.

Multiple harmonic traps such as, for example, a plurality of harmonic traps1122may be utilized in a specific circuit in accordance with an embodiment of the present invention. For example, a multi-harmonic trap1128may be utilized. The multi-harmonic trap1128may comprise n multiple traps such as, for example, Traps1to n. Each of the n harmonic traps may comprise, for example, an inductor (e.g., the inductors1130,1134, and1138) and a capacitor (e.g., the capacitors1132,1136, and1140) connected in parallel. Each of the n traps may be characterized by inductance Lnand capacitance Cn. The capacitor and the inductor in each of the n traps may be tuned so that each trap attenuates a specific harmonic of an incoming signal. For example, Trap n may be tuned to attenuate the n-th harmonic of a signal f by changing Lnand Cnso that

12⁢π⁢⁢L⁢⁢n⁢⁢C⁢⁢n⁢=n⁢⁢f0.
In another embodiment, the capacitors, the inductors and their interactions between individual traps may be considered in setting the trapping harmonic frequency values of the composite harmonic trap.

If multiple traps are utilized, then there might be no need for a buffer between them. In one embodiment according to the present invention, a transmission line configuration is utilized to attenuate selected harmonics of an incoming signal. The transmission line configuration1116of the harmonic trap may comprise, for example, a transmission line1118connected to a grounded load1120. The transmission line1118may be characterized by an impedance Z0and the grounded load1120may be characterized by an impedance ZL. By selecting the impedances Z0and ZLand transmission line length, the transmission line1118may be utilized to attenuate selected harmonics of the incoming signal (e.g., the odd harmonics of an incoming signal, the even harmonics or all of the harmonics of an incoming signal). If, for example, the transmission line1118is open only for even harmonics and closed to odd number harmonics, the transmission line1118may act as a series of harmonic traps for the odd harmonics. Since the trapping action is a characteristic of the transmission line, it might not be necessary to utilize additional filters in a harmonic trap implementing a transmission line. A harmonic trap in accordance with an embodiment of the present invention may comprise, for example, one or more passive components that attenuate specific harmonic. For example, a harmonic trap may be designed utilizing, for example, one or more LC sections, RC sections or RL sections. Inductors, resistors and capacitors may also be formed from active components such as, for example, transistors. The use of active components may provide for the miniaturization of components, thereby promoting integration onto one or more integrated circuit chips.

FIG. 12is a block diagram illustrating a circuit1200implementing a differential signal source in combination with a noise attenuator in accordance with an embodiment of the present invention. The circuit1200may comprise, for example, a differential signal source1202, a differential buffer1204, and a differential operator1206(e.g., a differential, non-linear operator). The buffer1204may comprise, for example, a noise attenuator1205, which may be implemented, at least in part, within the buffer1204. The differential signal source1202may comprise, for example, a differential oscillator. In operation, the differential signal source1202may generate a signal which can be buffered within the buffer1204. While the generated signal is buffered within the buffer1204, it may also be attenuated by the noise attenuator1205. For example, the noise attenuator1205may selectively attenuate one or more harmonics of the generated signal. After the signal is buffered and attenuated, it may be communicated to a non-linear operator1206.

Although illustrated as a differential signal, the present invention also contemplates other types of multiple-ended signals such as, for example, quadrature signals. The multiple-ended signal generator may also support a variety of different modulation schemes.

FIG. 13is an electrical diagram of a circuit1300implementing a differential output signal generator in combination with a buffer with noise reducing functionality in accordance with an embodiment of the present invention. The circuit1300may comprise, for example, a differential signal generator1302coupled to a buffer1304.

The differential signal generator1302may comprise, for example, a voltage source1306(e.g., a DC voltage supply), inductors1310and1312, a variable capacitor1314, transistors1316and1318, and a current source1308. The transistors1316and1318may form a differential pair of transistors. Although the transistors inFIG. 13are illustrated as FETs, the present invention contemplates using any type of transistor or amplifier. The transistors1316and1318may be connected in a feedback configuration. An output (e.g., a drain terminal) of transistor1316may be connected to an input (e.g., a gate terminal) of transistor1318. An output (e.g., a drain terminal) of transistor1318may be connected to an input (e.g., a gate terminal) of transistor1316. The inductors1310and1312, and the variable capacitor1314may act as a tuning circuit for the positive feedback loop created by the transistors1316and1318. The inductors1310and1312and the variable capacitor1314may be selected so as to tune the positive feedback loop created by the transistors1316and1318and to generate a differential signal with a selected main frequency f0at the differential output (e.g., drain terminals of transistors1316and1318). Thus, the differential signal generated at the differential output of the transistors1316and1318may be further tuned by the tuning circuit and, in particular, by adjusting the variable capacitor1314.

The differential output of the transistors1316and1318may also form the differential output1337of the differential signal generator1302. Tuned at a selected main frequency f0and generated at the drain terminals of the transistors1316and1318, the differential signal may also be generated at the differential output1337of the differential signal generator1302. The differential output1337of the differential signal generator1302may be connected to a differential input of the buffer1304. The buffer1304may comprise, for example, inductors1320and1322; a variable capacitor1324; a harmonic trap comprising, for example, variable capacitors1326and1330and an inductor1328; and transistors1332and1334connected to a current source1326. The transistors1332and1334may form a differential pair of transistors.

The differential output signal from the differential output1337may be received by the buffer1304via a differential input comprising, for example, gate terminals of the transistors1332and1334. A tuning circuit within the buffer1304may comprise the inductors1320and1322and the variable capacitor1324. The variable capacitor1324may be tuned so that the buffer1304passes and optionally amplifies the signal with a main frequency f0generated by the differential signal generator1302. A harmonic trap may be implemented within the buffer1304so that the buffer1304further reduces the noise characteristics of the incoming signal by attenuating a selected harmonic frequency or selected harmonic frequencies of the generated signal. For example, the buffer1304may comprise a series trap1325which comprises variable capacitors1326and1330and inductor1328. The series trap1325may be connected across the drains of the transistors1332and1334(e.g., the differential output1338of the buffer1304).

The differential signal generator1302may be tuned to generate a signal at a particular main frequency f0. The tuning of the differential signal generator1302may be accomplished by choosing appropriate component values for inductors1310and1312and capacitor1314and adjusting the value of the variable capacitor1314. The series harmonic trap1325may be tuned by adjusting the value of the variable capacitors1326and1330so that the series harmonic trap1325attenuates the selected harmonic frequency or harmonic frequencies of the main frequency f0. For example, the series harmonic trap1325may be designed to attenuate the second harmonic frequency 2f0. The variable capacitor1324of the buffer stage tuning circuit may be tuned by taking into account any load that may be contributed from the series harmonic trap1324as well as any load contributed by any external load connected to the differential output1338of the buffer1304. When properly tuned, the buffer1304may effectively pass and optionally amplify any input signal at the main frequency f0to the differential output1338of the buffer1304, thereby buffering the input signal.

Noise attenuating techniques in accordance with embodiments of the present invention may be applied at different stages within a circuit. Thus, a noise attenuator comprising one or more harmonic traps may be applied prior to, between and/or after any non-linear operations. In one embodiment according to the present invention, a noise attenuator may be repeated anywhere within a circuit after an element that contributes a noise floor to a received signal. Additionally, noise attenuating techniques in accordance with the invention may be utilized by various circuits comprising an oscillator. Such circuits comprising an oscillator may be utilized by a transmitter, a receiver, a transceiver, a synthesizer, and a data acquisition system, for example.

Some embodiments according to the present invention may relate to reducing phase noise in RF transceivers, for example. However, the present invention need not be so limited. For example, systems (e.g., devices, circuits, integrated chips, etc.) that would benefit from reduced phase noise and/or other types of noise (e.g., thermal noise), may utilize an embodiment of the present invention.