Receiver and receiving method

When a correlation judging circuit judges that the correlation degree between r pulses in a reception signal and a generated substantially the same template as the r pulses is small, a pulse number adjusting circuit outputs a pulse number signal representing s pulses in place of the r pulses, and a template generating circuit generates the substantially the same template as the s pulses, whereby the correlation judging circuit judges the correlation degree between the r pulses in the reception signal and the generated substantially the same template as the s pulses. Accordingly, even when a confronted transmitter changes the number of pulses contained in a reception signal, synchronization capture of the reception signal can be established.

BACKGROUND

1. Technical Field

This invention relates to a receiver and a receiving method.

2. Related Art

In connection with a communication device using a pulse train (described in JP-T-10-508725), a communication device for suppressing interference to another transmission/reception system (described in JP-A-2004-336764) and a communication device for generating a template (pulse train) for synchronization capture (described in JP-A-2004-241927), a transmitter located so as to confront a related-art receiver transmits to the receiver a reception signal containing a fixed number (for example 5) of pulses used for synchronization capture and information which is superposed on the pulses concerned and is to be received by the receiver. Therefore, the receiver performs the synchronization capture by using a template having the same shape as the waveforms of the five pulses.

In the transmitter, the number of pulses may be changed in accordance with the environment under which the transmitter is disposed. For example, when the propagation path between the transmitter and the receiver is not excellent, the number of pulses is increased so that the receiver can surely perform the synchronization capture, and for example, the number of pulses is increased to ten. In other words, when the power of a signal transmitted by another transmitter is faint, in order to avoid the signal transmitted by the transmitter from adversely affecting, that is, interfering in the faint signal transmitted by the other transmitter, the number of pulses is reduced, for example, it is reduced to three.

However, the receiver described above has only the template having the same waveforms as the five pulses, and does not have any other template, and thus there is a problem that when the transmitter transmits a signal containing ten pulses described above or a signal containing three pulses described above, it is impossible to perform synchronization capture on the signal concerned.

SUMMARY

A receiver according to a first aspect of the invention includes:

a reception signal detecting circuit that detects whether reception of a reception signal in which data to be received is superposed on pulses of q (q represents an integer from 1 to p) out of pulses from 1 to p (p represents any integer of 2 or more) is started;

a pulse number adjusting circuit that outputs a pulse number signal representing “r” (r pulses) (r represents an integer from 1 to p) out of the pulses from 1 to p when the reception signal detecting circuit starts the reception of the reception signal;

a template generating circuit that generates substantially the same template as the r pulses represented by the pulse number signal out of the templates from the template having substantially the same waveform as the one pulse to the template having the same waveform as the p pulses when an input of the pulse number signal is received; and

a correlation judging circuit that judges the correlation degree between the q pulses in the reception signal and the generated substantially same template as the r pulses, wherein the correlation judging circuit recognizes that the synchronization of the reception signal has been enabled to be captured when it is judged that the correlation degree is large, and when the correlation judging circuit judges that the correlation degree is small, the pulse number adjusting circuit outputs a pulse number signal representing “s” (s pulses) (s represents an integer from 1 to p) out of the pulses from 1 top in place of the r pulses, and the template generating circuit generates substantially the same template as the s pulses.

According to the receiver of the first aspect, when the correlation judging circuit judges that the correlation degree between the r pulses in the reception signal and the generated substantially same template as the r pulses is small, the pulse number adjusting circuit outputs the pulse number signal representing the s pulses in place of the r pulses, and the template generating circuit generates the substantially same template as the s pulses, whereby the correlation judging circuit judges the correlation degree between the r pulses in the reception signal and the generated substantially same template as the s pulses. Accordingly, even when a confronted transmitter changes the number of pulses contained in the reception signal, synchronization capture of the reception signal can be established.

According to a receiver of a second aspect, in the receiver of the first aspect, the correlation judging circuit further contains a storage circuit that stores the s pulses when it is judged that the correlation degree between the q pulses in the reception signal and the s pulses in the generated template, and when the reception signal detecting circuit judges that reception of a different reception signal is started after the reception signal, the pulse number adjusting circuit outputs a pulse number signal representing “s” (s pulses) stored in the storage circuit in place of the output of the pulse number signal representing the r pulses.

According to the receiver of the second aspect, the storage circuit stores the s pulses when the correlation judging circuit judges that the correlation degree between the q pulses in the reception signal and the s pulses in the generated template is large, that is, when it is judged that synchronization capture is established, and when the reception signal detecting circuit judges that the reception of the other reception signal is started, the pulse number adjusting circuit outputs the pulse number signal representing “s” (s pulses), whereby the correlation judging circuit starts the judgment of the correlation by using substantially the same template as the s pulses. Therefore, a time required to complete the synchronization capture can be shortened as compared with a case where the judgment of the correlation is started by using substantially the same template as the r pulses.

According to a receiver of a third aspect, in the receiver of the first aspect, the pulses are based on a UWB (Ultra Wide Band) communication system.

A receiving method of a fourth aspect of the invention includes:

a reception signal detecting step that detects whether reception of a reception signal in which data to be received is superposed on pulses of q (q represents an integer from 1 to p) out of pulses from 1 to p (p represents any integer of 2 or more) is started;

a pulse number adjusting step that outputs a pulse number signal representing “r” (r pulses) (r represents an integer from 1 to p) out of the pulses from 1 to p when the reception signal detecting step starts the reception of the reception signal;

a template generating step that generates substantially the same template as the r pulses represented by the pulse number signal out of the templates from the template having substantially the same waveform as the one pulse to the template having the same waveform as the p pulses when an input of the pulse number signal is received; and

a correlation judging step that judges the correlation degree between the q pulses in the reception signal and the generated substantially same template as the r pulses, wherein the correlation judging step recognizes that the synchronization of the reception signal has been enabled to be captured when it is judged that the correlation degree is large, and when the correlation judging step judges that the correlation degree is small, the pulse number adjusting step outputs a pulse number signal representing “s” (s pulses) (s represents an integer from 1 to p) out of the pulses from 1 to p in place of the r pulses, and the template generating step generates substantially the same template as the s pulses.

A receiver according to a fifth aspect of the invention includes a template generating circuit for generating substantially the same template as r (r represents an integer from 1 to p) pulses from 1 to p (p represents any integer of two or more), and a correlation judging circuit for recognizes that synchronization of a reception signal has been enabled to be captured when it is judged that the correlation degree between q (q represents an integer from 1 to p) pulses in the reception signal and substantially the same template as the r pulses is large.

According to a receiver of a sixth aspect, in the receiver of the fifth aspect, when the correlation judging circuit judges that the correlation degree is small, the template generating circuit generates substantially the same template as s pulses in place of the r pulses.

A receiving method according to a seventh aspect of the invention includes a template generating step that generates substantially the same template as r (r represents an integer from 1 to p) pulses from 1 to p (p represents any integer of two or more), and a correlation judging step that recognizes that synchronization of a reception signal has been enabled to be captured when it is judged that the correlation degree between q (q represents an integer from 1 to p) pulses in the reception signal and substantially the same template as the r pulses is large.

According to a receiving method of an eighth aspect of the invention, in the receiving method of the seventh aspect, when the correlation judging step judges that the correlation degree is small, the template generating step generates substantially the same template as s pulses in place of the r pulses.

DESCRIPTION OF EXEMPLARY EMBODIMENTS

FIG. 1shows the construction of a receiver according to an embodiment of the invention. The receiver10according to this embodiment is implemented in the form of an IC chip (semiconductor device), for example. The receiver10is located at the front stage of a demodulator (not shown), and it contains an antenna11, a low noise amplifier (LNA)12, a template pulse generating circuit13, a multiplier14, an AD converter (ADC)15, a pulse number adjusting circuit16, a correlation judging circuit17and a reception signal detecting circuit18as shown inFIG. 1.

The antenna11receives a signal (reception signal) Sr which is transmitted from a confronted transmitter (not shown) and on which information to be received is superposed. For example, it receives a reception signal Sr1containing one pulse, a reception signal Sr2containing two pulses and a reception signal Sr3containing three pulses as shown inFIG. 2A.

LNA12amplifies the received reception signal Sr.

The multiplier14multiplies the reception signal Sr with a template Stp generated by the template pulse generating circuit12(for example, a template Stp1having substantially the same shape of one pulse, a template Stp2having substantially the same shape as two pulses, a template Stp3having substantially the same shape as three pulses shown inFIG. 2B).

The AD converter15converts the multiplied reception signal Sr from an analog style to a digital style.

The correlation judging circuit17is a so-called correlator, and it judges the correlation degree between the reception signal Sr and the template Stp and outputs a correlation signal Sco representing the correlation degree. As shown inFIG. 2C, the correlation signal Sco represents “the correlation between the reception signal Sr and the template Stp is strong (i.e., the correlation degree is large)”, “the correlation between the reception signal Sr and the template Stp is weak (the correlation degree is small)”, etc.

For example, on the basis of the presence or absence of a rising edge or falling edge representing existence of the reception signal Sr, the reception signal detecting circuit18detects whether the reception of the reception signal Sr is started or not, and outputs a detection signal Sdt representing detection or non-detection. The detection signal Sdt concerned represents, for example, “the reception signal Sr is not received”, “the reception of the reception signal Sr is started” as shown inFIG. 2D.

According to the correlation signal Sco output from the correlation judging circuit17, the pulse number adjusting circuit16outputs to the template pulse generating circuit13a pulse number signal Snu representing the number of pulses (for example, one, two, three) to be contained in the template Stp generated by the template pulse generating circuit13as shown inFIG. 2E.

More specifically, when receiving the detection signal Sdt, the pulse number adjusting circuit16outputs a pulse number signal Snu representing a predetermined number, that is, an initial number (for example, one).

When the correlation signal Sco represents “the correlation degree is small”, the pulse number adjusting circuit16changes the number to be represented by the pulse number signal Snu, and outputs the pulse number signal Snu representing “two” (two pulses) in place of the pulse number signal Snu representing “one” (one pulses) or outputs the pulse number signal Snu representing “one” (one pulse) in place of the pulse number signal Snu representing “three” (three pulses).

According to the pulse number signal Snu output from the pulse number adjusting circuit16, the template pulse generating circuit13generates a template containing pulses whose number is represented by the pulse number signal Snu concerned, for example, the templates Stp1, Stp2, Stp3described above (shown inFIG. 2B).

According to the receiver10of this embodiment of the invention, when it is judged that the correlation between the reception signal Sr and the template Stp (for example, the template Stp1) is small, the correlation judging circuit17outputs a pulse number signal Snu representing a number (for example, 2) different from the present number (for example, one), and the template pulse generating circuit13generates a template Stp2which is represented by the pulse number signal Snu and contains pulses whose number has been changed (for example, to two). Therefore, unlike the related art, even the confronting transmitter transmits signals Sr containing various numbers of pulses, the synchronization capture of the signals Sr concerned can be surely performed.

FIGS. 3A and 3Bare circuit diagrams showing a specific construction of the template pulse generating circuit13in the receiver10ofFIG. 1.FIG. 3Ashows a template pulse generating circuit13aapplied to the receiver of this invention, andFIG. 3Bis a diagram which is used as a reference to explain the circuit ofFIG. 3Aand shows a pulse generating circuit13bas a prototype of the template pulse generating circuit13aofFIG. 3A.

For convenience of description, the pulse generating circuit13bofFIG. 3Bas the prototype of the template pulse generating circuit13aofFIG. 3Awill be first described.

The outputs of inverters101to109at plural stages (nine stages in an example ofFIG. 4) are input to a logic circuit150described later as shown inFIG. 4, and a pulse signal which repetitively appears every predetermined period is output from the logic circuit150.

FIG. 4is a circuit diagram showing the pulse generating circuit13bwhich contains a detailed diagram of the logic circuit150inFIG. 3B.FIG. 5is a signal waveform diagram of each part in the pulse generating circuit13bofFIG. 4.

InFIG. 4, a delay circuit is constructed by cascade-connecting the inverters101to109of nine stages. A base band clock Do input to the terminal131propagates in the delay circuit while it is delayed every time td at each stage as shown in (b) to (k) ofFIG. 5and also the logic thereof is inverted, and then output from each stage.

That is, if the signal applied to the input terminal131is set to positive logic, the following value is output at an i-th stage when k represents a natural value and the negative logic of the signal is represented by disposing “X” before the name of the signal:

Each of N-channel MOS transistors113and112is conducted to connect a pulse output terminal130to a first potential level V1when the output XD1at the first stage of the delay circuit and the output D2of the second stage are high.

Subsequently, each of P-channel MOS transistors110and111is conducted to connect the pulse output terminal130to a second potential level V2when the output D2of the second stage of the delay circuit and the output XD3of the third stage of the delay circuit are low (that is, both the negative logic of D2and D3are high (the logical product is true)).

Likewise, each of N-channel MOS transistors116,117,120,121,124and125is conducted to connect the pulse output terminal130to the first potential level V1when the output XD2k−1 of the (2k−1)-th stage of the delay circuit and the output D2kof the 2k-th stage of the delay circuit are high, that is, the logical product between XD2k−1 and D2kis true.

Subsequently, when the output D2kof the 2k-th stage of the delay circuit and the output XD2k+1 of the (2k+1)-th stage of the delay circuit are low, that is, the logical product between XD2kcorresponding to negative D2kand D2k+1 corresponding to negative XD2k+1 is true, each of P-channel MOS transistors114,115,118,119,122and123is conducted to connect the pulse output terminal130to the second potential level V2.

Through the above operation, the pulse waveform as shown in (k) ofFIG. 5can be generated.

The pulse generating circuit13bofFIG. 3Bwhich is shown in detail inFIG. 4is constructed and operated as described above. However, the template pulse generating circuit13aofFIG. 3Awhich is applied to the receiver of the embodiment of the invention is constructed by replacing the inverters104to109out of the cascade-connected circuit portion based on the inverters101to109in the circuit construction of the pulse generating circuit13bofFIG. 3Bby NAND circuits104ato109a.

As shown inFIG. 3A, the inverters104to109are replaced by the NAND circuits104ato109aso as to establish the relationship that the respective one input terminals of the NAND circuits104ato109acorrespond to the respective input terminals of the inverters104to109and the respective output terminals thereof correspond to the respective output terminals of the inverters104to109, and also pulse number adjusting signals CTL1, CTL2, CTL3, . . . , CTL6are supplied to the other ends of the NAND circuits104a,105a,106a, . . . ,109a, respectively.

In accordance with supply or non-supply of these pulse number adjusting signals CTL1to CTL6(in accordance with whether the pulse signal level is high (H) or low (L)), it is selected whether the corresponding NAND circuits104ato109afunction as inverters. As a result, the wave number (pulse number) of carrier waves in the pulse at each time every predetermined period as shown in (k) ofFIG. 5is selected.

From the viewpoint of reduction of power consumption and miniaturization of the receiver based on the reduction of the power consumption, UWB communication is preferably used as the pulse communication.

FIG. 6is a diagram showing another embodiment of the template pulse generating circuit applied to the receiver of this invention.

In the template pulse generating circuit ofFIG. 6, any one of plural pulse generating devices1to n which are pulse generating devices as shown inFIG. 1Band are different from one another in the number of cascade-connection stages of the inverters is made to selectively effectively function by a pulse supply switching switch61and an output pulse switching switch62whose input and output are selectively switched in response to the pulse number adjusting signal CTL60, whereby the pulse width of the output signal is selectively switched.

That is, each of the pulse generating devices1to n continuously generates a template pulse having a fixed frequency over each different unit duration corresponding to the number of stages of the cascade-connection of the inverters, and some of these pulse generating devices functions selectively.

FIG. 7is a diagram showing another embodiment of the template pulse generating circuit applied to the receiver of the invention. A counter71is provided at the output side of an oscillator70which oscillates at a fixed frequency in accordance with a clock pulse CLK, for example, a programmable counter in which an upper limit count value (a count value just before it is reset) can be selectively set by a set signal CTL7ais applied as the counter71, and the oscillation operation of the oscillator70is stopped by a count-up output CTL7bwhich reaches the set value concerned. The set signal CTL7adescribed above corresponds to the pulse number adjusting signal of the template pulse generating circuit.

FIG. 8is a diagram showing another embodiment of the template pulse generating circuit applied to the receiver of the invention. A counter81is provided at the output side of an oscillator80which oscillates at a fixed frequency in accordance with a clock pulse CLK. For example, a programmable counter which can selectively set the upper limit value of the count (the count value just before it is reset) by a set signal CTL8ais applied as the counter81, and a switch82inserted in a passage for transmitting an output pulse train from the oscillator80to the outside is turned off by a count-up output CTL8breaching the upper limit value. The set signal CTL8adescribed above corresponds to the pulse number adjusting signal of the template pulse generating circuit.

FIG. 9is a diagram showing another embodiment of the template pulse generating circuit applied to the receiver of the invention. An AND circuit91is provided at the output side of an oscillator90oscillating at a fixed frequency in accordance with a clock pulse CLK, for example, the output of the oscillator90is supplied to one input terminal of the AND circuit91, and a pulse signal CTL90having a pulse width for defining a pulse number is supplied to the other input terminal.

The pulse signal CTL90corresponds to the pulse number adjusting signal, and an output pulse train from the oscillator90is output from the output terminal of the AND circuit91during the time defined by the pulse signal CTL90.

FIG. 10is a block diagram showing a receiver1000as an example belonging to the embodiment of the invention.

A pulse signal received by an antenna1001is amplified by a low noise amplifier (LNA)1002. The output of the LNA1002and a template pulse generated in a template pulse generating circuit1003are multiplied with each other in a multiplier1004to detect the pulse signal, and the output of the multiplier1004is converted to a digital signal in an AD converter (ADC)1005and supplied to a system controller1010which is mainly constructed by a microprocessor for collectively managing the operation of the receiver1000, for example.

This system controller1010has a pulse number adjusting function part1016functioning like the pulse number adjusting circuit16described above with reference toFIG. 1and a correlation detecting function part1017for calculating a correlation value associated with the detection of the reception pulse.

The template pulse generating circuit1003is controlled by the pulse number adjusting function part1016of the system controller1010, whereby the pulse number of the template pulse corresponding to the output of the template pulse generating circuit1003is adjusted, and the correlation detecting function part1017calculates a correlation value associated with the detection of the reception pulse in connection with each template having a pulse number as this adjustment value.

The correlation value calculated in the correlation detecting function part1017is stored as the record data of the corresponding relationship of the pulse number of the template pulse and the correlation value in RAM1011connected to the system controller1010.

RAM1011connected to the system controller1010is used not only to hold the record data as described above, but also to hold demodulated reception data and temporarily store data under signal processing, etc.

ROM1012is connected to the system controller1010, and holds information associated with a predetermined communication protocol, parameters used for calculation, etc.

In this receiver1000, the pulse number adjusting function part1016sets the pulse number on the basis of the record data of the corresponding relationship between the pulse number of the template pulse and the correlation value held in RAM1011. Therefore, an excellent reception state can be established with high probability without daringly waiting for a preliminary operation such as detection of the condition of a transmission pulse or the like when reception is started, and synchronization capture can be performed quickly in real communications, and also the power saving characteristic is also excellent.

FIG. 11is a block diagram showing a receiver1100of another example belonging to the embodiment of the invention.

The receiver1100ofFIG. 11is different from the receiver1000ofFIG. 10in that it is provided with a transmission pulse width detecting unit for detecting a pulse width corresponding to a duration at each time of intermittent carrier waves of a modulated pulse signal generated in a transmission system.

The pulse signal received by the antenna1101is amplified by a low noise amplifier (LNA)1102. The output of LNA1102is multiplied with the template pulse generated in the template pulse generating circuit1103in a multiplier1104to detect the pulse signal, and the output of the multiplier1104is converted to a digital signal in an AD converter (ADC)1105. The thus-converted digital signal is supplied to a system controller1110which is mainly constructed by a microprocessor for collectively managing the operation of the receiver1100, for example.

The system controller1110has a pulse number adjusting function part1116functioning like the pulse number adjusting circuit16described above with reference toFIG. 1, a correlation detecting function part1117for calculating a correlation value associated with the detection of the reception pulse, and a transmission pulse width detecting function part1118as a transmission pulse width detecting unit for calculating the transmission pulse width on the basis of the output data of ADC1105.

The transmission pulse width detecting function part1118calculates the pulse width corresponding to the duration at each time of the intermittent carrier waves of the modulated pulse signal generated in the transmission system on the basis of the output data of ADC1105.

The template pulse generating circuit1103is controlled by the pulse number adjusting function part1116of the system controller1110, whereby the pulse number of the template pulse corresponding to the output of the template pulse generating circuit1103is adjusted. The correlation detecting function part1117calculates the correlation value associated with the detection of the reception pulse in connection with each template having the pulse number as this adjusted value.

RAM1111is connected to the system controller1110, and it is used to hold demodulated reception data and temporarily store data under signal processing, etc.

Furthermore, ROM1112is connected to the system controller1110, and holds information concerning a predetermined communication protocol, parameters used for calculation, etc.

In this receiver1100, the pulse number adjusting function part1116can adaptively adjust the pulse number of the template pulse in conformity with the pulse width corresponding to the duration at each time of the intermittent carrier waves of the modulated pulse signal generated in the transmission system which is detected by the transmission pulse width detecting function part1118, and the excellently compatible communication can be implemented between the transmission system and the reception system.

FIG. 12is a block diagram showing a receiver1200as another example belonging to the embodiment of this invention.

The receiver1200ofFIG. 12is different from the receiver1000ofFIG. 10and the receiver1100ofFIG. 11in that it is provided with a transmission pulse width detecting unit for detecting the pulse width corresponding to the duration at each time of the intermittent carrier waves of the modulated pulse signal generated in the transmission system and also a reception filter band adjusting unit for adjusting the pass band of the reception filter so that the pass band conforms to the detected transmission pulse width.

The pulse signal received by the antenna1201is passed through BPF (bandpass filter)1220as a reception filter to suppress noises out of a predetermined band used for communications, and then amplified by a low noise amplifier (LNA)1202. The output of LNA1202is multiplied with the template pulse generated in the template pulse generating circuit1203by a multiplier1204to detect the pulse signal, and the output of the multiplier1204is converted to a digital signal in an AD converter (ADC)1205and then, for example, supplied to a system controller1210which is mainly constructed by a microprocessor for collectively managing the operation of the receiver1200.

The system controller1210is equipped with a pulse number adjusting function part1216functioning like the pulse number adjusting circuit16described above with reference toFIG. 1, a correlation detecting function part1217for calculating a correlation value associated with the detection of the reception pulse and a transmission pulse width detecting function part1218as a transmission pulse width detecting unit for calculating a transmission pulse width on the basis of the output data of ADC1205.

The transmission pulse width detecting function part1218calculates the pulse width corresponding to the duration at each time of the intermittent carrier waves of the modulated pulse signal generated in the transmission system on the basis of the output data of ADC1205.

The template pulse generating circuit1203is controlled by the pulse number adjusting function part1216of the system controller1210, and the pulse number of the template pulse as the output of the template pulse generating circuit1203is adjusted. The correlation detecting function part1217calculates the correlation value associated with the detection of the reception pulse in connection with each template having the pulse number as this adjusted value.

Furthermore, the system controller1210is equipped with a reception filter band adjusting function part1219as a reception filter band adjusting unit for adjusting the pass band of a band-width variable BPF1220so that the pass band conforms to the pulse width corresponding to the duration at each time of the intermittent carrier waves of the modulated pulse signal detected by the transmission pulse width detecting function part1218.

The pass band of BPF1220is adaptively adjusted so as to conform to the pulse width described above by the reception filter band adjusting function part1219.

RAM1211is connected to the system controller1210, and used to hold demodulated reception data and temporarily store data under signal processing, etc.

Furthermore, ROM1212is connected to the system controller1210to hold information concerning a predetermined communication protocol, parameters used for calculation, etc.

In this receiver1200, the pass band of BPF1220is adjusted so as to conform to the duration (transmission pulse width) at each time of the intermittent carrier waves of the modulated pulse signal by the reception filter band adjusting unit (reception filter band adjusting function part)1219, so that excellent reception can be performed.

FIG. 13is a block diagram showing a receiver1300as another example belonging to the embodiment of the invention.

The receiver1300ofFIG. 13is different from the receiver1200ofFIG. 12in that the pulse number of the template pulse is adjusted in accordance with the reception quality of the reception signal.

The pulse signal received by an antenna1301is passed through BPF (band pass filter)1320as a reception filter so that noises out of a predetermined band used for communications are suppressed, and then amplified by a low noise amplifier (LNA)1302. The output of LNA1302is multiplied with a template pulse generated in a template pulse generating circuit1303by a multiplier1304to detect the pulse signal, and the output of the multiplier1304is converted to a digital signal in an AD converter (ADC)1305and supplied to a system controller1310which is mainly constructed by a microprocessor for collectively managing the operation of this receiver1300, for example.

This system controller1310is equipped with a pulse number adjusting function part1316functioning like the pulse number adjusting circuit16described above with reference toFIG. 1, a correlation detecting function part1317for calculating a correlation value associated with the detection of the reception pulse, and a transmission pulse width detecting function part1318as a transmission pulse width detecting unit for calculating the transmission pulse width on the basis of the output data of ADC1305.

The transmission pulse width detecting function part1318calculates the pulse width corresponding to the duration at each time of the intermittent carrier waves of the modulated pulse signal generated in the transmission system on the basis of the output data of ADC1305.

In this receiver1300, the system controller1310is further equipped with a reception quality detecting function part1330for detecting the reception quality of the reception signal which is represented by BER, SNR, RSSI or an out-of-band noise.

The pulse number adjusting function part1316generates a control signal for adjusting the pulse number in accordance with the detection value of the reception quality in cooperation with the reception quality detecting function part1330, and forms the pulse number in the template generating circuit1303.

As described above, the template pulse generating circuit1303is controlled in accordance with the detection value of the reception quality by the pulse number adjusting function part1316, and the pulse number of the template pulse which corresponds to the output of the template pulse generating circuit1303is adjusted. The correlation detecting function part1317calculates the correlation value associated with the detection of the reception pulse in connection with each template having the pulse number as this adjusted value.

The system controller1310is equipped with a reception filter band adjusting function part1319as a reception filter band adjusting unit for adjusting the pass band of a band-width variable BPF1320so that the pass band conforms to the pulse width corresponding to the duration at each time of the intermittent carrier waves of the modulated pulse signal detected by the transmission pulse width detecting function part1318.

The pass band of BPF1320is adaptively adjusted so as to conform to the above pulse width by the reception filter band adjusting function part1319.

RAM1311is connected to the system controller1310and used to hold demodulated reception data and temporarily store data under signal processing, etc.

Furthermore, ROM1312is connected to the system controller1310, and holds information concerning a predetermined communication protocol, parameters used for calculation, etc.

In this receiver1300, the reception filter band adjusting unit (reception filter band adjusting function part)1319adjusts the pass band of BPF1320so that pass band conforms to the duration (transmission pulse width) at each time of the intermittent carrier waves of the modulated pulse signal, and further the pulse number of the template pulse is adjusted in accordance with the reception quality of the reception signal represented by BER, SNR, RSSI or an out-of-band noise, so that excellent reception can be performed.

FIG. 14is a diagram showing a construction example of the band-width variable BPFs1220and1320inFIGS. 12 and 13. InFIG. 14, a reference numeral1400is newly assigned to the band-width variable filter. As shown inFIG. 14, respective one ends of varactors (variable capacity capacitors)1402and1403are connected to input and output terminals of an inductor1401respectively, and the band-width variable filter1400, the other end sides of the varactors1402and1403are grounded. In addition, a control signal as a reception band control signal inFIGS. 12 and 13is supplied to the varactors1402and1403to adjust the capacitance values thereof, whereby the pass band of the band-width variable filter1400is changed.

FIG. 15is a diagram showing another construction of the band-width variable BPFs1220and1320inFIGS. 12 and 13. InFIG. 15, a reference numeral1500is newly assigned to the band-width variable filter. The band-width variable filter1500constitutes a so-called filter bank, and an input switching switch1501is provided at the input side of n filters1to n different in pass characteristic while an output switching switch1502is provided at the output side of the n filters. The switching switches1501,1502are supplied with the control signal as the reception band control signal inFIGS. 12 and 13, whereby the switching operation thereof is controlled.

FIGS. 16A to 16Care diagrams showing another construction of the band-width variable BPFs1220and1320inFIGS. 12 and 13. InFIGS. 16A to 16C, a reference numeral1600is newly assigned to the band-width variable filter. The band-width variable filter1600constitutes a so-called filter bank, and the circuit construction is shown inFIG. 16A. That is, totally four filters of two low pass filters (filter1and filter4) different in pass characteristic and two high pass filters (filter2and filter3) are provided, and respective switching switches (switch1, switch2, switch3and switch4) are successively interposed between the respective filters in this order, whereby the in-series connection state of these filters is switched by the four switches.

The characteristics of the filters1and4as the low pass filters and the filters2and3as the high pass filters are shown inFIG. 16B, and when the four switches described above are switched as shown in a table ofFIG. 16C, the characteristics represented by bands1to4in the table are obtained as shown inFIG. 16B.

The switching of the switches1,2,3and4is carried out by supplying substantially the same control signal as the reception band control signal from the reception filter band adjusting function parts1219,1319in the system controllers1210,1310ofFIGS. 12 and 13to the control signal input terminals of these switches, respectively.

The technical idea of the invention described above with reference to the drawings may be applied as a receiving method characterized by adaptively adjusting the pulse number of a template pulse used to detect the reception pulse in the pulse communication.

According to this receiving method, even in the synchronization capture at the initial stage of the communication, the optimum pulse number is set at this stage and rapid synchronization capture is implemented, so that the power consumption associated with the reception can be reduced. Furthermore, even when pulse signals different in transmission pulse width are received, these pulse signals can be surely detected.

Furthermore, according to the technical idea of the invention, the pulse number of the template pulse used to detect the reception pulse is adaptively adjusted, and thus there are implemented the receiver and the receiving method that are excellent adapted to the new communication method of adjusting the transmission pulse width in the pulse communication proposed by this applicant while sufficiently and actively using the feature of the pulse communication, particularly UWB communication.

The entire disclosure of Japanese Patent Application Nos. 2007-059580, filed Mar. 9, 2007 and 2008-004033, filed Jan. 11, 2008 are expressly incorporated by reference herein.