Laser-based termination of passive electronic components

Terminating the ends of passive electronic components entails applying a laser-ablative coating to each of the opposed major surfaces of a substrate. A UV laser beam having a spot size and an energy distribution sufficient to remove the laser-ablative coating from multiple selected regions of the major surfaces is directed for incidence on the substrate. Relative motion between the UV laser beam and substrate effects removal of sufficient amounts of laser-ablative coating to expose the multiple selected regions of the opposed major surfaces. The substrate is then broken into multiple rowbars, each of which includes side margins along which are positioned different spatially aligned pairs of the selected regions of the opposed major surfaces. An electrically conductive material is applied to the side margins to form electrically conductive interconnects between each spatially aligned pair of the selected regions.

TECHNICAL FIELD

The present invention relates to the efficient and accurate formation of passive electronic components, and more particularly to a method of accurately terminating the ends of next-generation, miniature passive electronic components.

BACKGROUND OF THE INVENTION

Miniature passive electronic circuit components are conventionally fabricated in an array on a substrate. Exemplary types of passive electronic components of interest with regard to the present invention are resistors and capacitors.FIGS. 1A and 1Bshow an array of resistors in which a substrate10includes a first (or upper) major surface14and a second (or lower) major surface16carrying, respectively, first spaced-apart segmented electrical conductor lines18and second spaced-apart segmented electrical conductor lines20(end portions of which shown in dashed lines inFIG. 1B). Segmented conductor lines18are in parallel alignment, and segmented conductor lines20are in parallel alignment.

Each segmented conductor line18is composed of multiple electrode pads22, adjacent ones of which are separated from each other by a small distance24and all of which are aligned along first major surface14. Except for the two terminal end segmented conductor lines18, each segmented conductor line18is positioned between two neighboring segmented conductor lines18and is separated from one of them by a relatively wide space26and from the other of them by a relatively narrow space or street28u. Similarly, each segmented conductor line20is composed of multiple electrode pads30, adjacent ones of which are separated from each other by a small distance24and all of which are aligned along second major surface16. Except for the two terminal end segmented conductor lines20, each segmented conductor line20is positioned between two neighboring segmented conductor lines20and is separated from one of them by a relatively wide space26and from the other one of them by a street281.

The electrical conductor lines are also arranged in spatially aligned pairs of one electrical conductor line18on first major surface14and one electrical conductor line20on second major surface16. First major surface14further includes multiple regions of resistive material32positioned in spaces26between electrode pads22of adjacent electrical conductor lines18, as shown inFIGS. 1A and 1B. Second major surface16may also include regions of resistive material32in spaces26between adjacent electrode pads30of electrical conductor lines20, which regions32are not shown in the drawing figures.

FIGS. 2 and 4show a substrate of dielectric material34that is used in the fabrication of capacitors. Substrate34includes a first (or upper) major surface36and a second (or lower) major surface38between which multiple spaced-apart sheet electrodes40are internally stacked in plane parallel arrangement.FIG. 4shows exposed side margins42of internal electrodes40. There is no electrical conductor line formed on either of major surfaces36and38.

Substrates10and34are cut, sometimes called diced, to singulate the passive electronic components.FIGS. 3A and 3Bshow first and second major surfaces14and16, respectively, of substrate10after it has been broken apart to form multiple rowbars48of resistors. Rowbars48are then cut into separate chip resistors52(shown inFIG. 5). Capacitors54(shown inFIG. 6) are formed by dicing substrate34without formation of rowbars. Each chip resistor52includes an electrically conductive interconnect56that extends between electrical conductor lines18and20in each spatially aligned pair of them. Capacitor54includes an electrically conductive interconnect58that bridges across side margins42of internal electrodes40. Conductive interconnects56are formed by applying a metal coating (e.g., a silver paste) to a side margin portion60of resistor substrate10. Great precision is needed when forming conductive interconnects56and58to ensure that none of the metal coating extends across a region of resistive material32or connects both conductive interconnects58across first or second major surfaces36and38, and thereby forms an electrically conductive bridge that would cause the resulting chip resistor52or capacitor54to become a short circuit.

Most prior art methods of forming conductive interconnects56between spatially aligned pairs of electrical conductor lines18and20entail applying a resist coating that covers and protects regions of resistive material32defined by spaces26between electrode pads22on major surface14while the metal coating is applied. However, recent technological advancements in component miniaturization have resulted in the formation of chip resistors52having respective length and width dimensions of about 0.6 mm×0.3 mm (0201 chip resistors) and a thickness of between about 90 microns and about 150 microns, as compared to prior art 0402 chip resistors having respective length and width dimensions of about 1.0 mm×0.5 mm. The small sizes of chip resistors52make accurate and efficient application of the resist coating exceedingly difficult to achieve. Consequently, chip manufacturers have begun to form conductive interconnects56on rowbars48rather than on discrete chip resistors52because rowbars48are significantly larger in size (typically having respective length and width dimensions of between about 36 mm and about 80 mm and between about 3.2 mm and about 0.6 mm) and are thus easier to handle during processing.

One prior art method of forming conductive interconnects56on chip resistors52entails cutting substrate10into multiple rowbars48and then dipping side margins60of each rowbar48into the metal coating. However, accurate application of the metal coating by dipping becomes virtually impossible as the size of rowbar48and chip resistor52decreases. Consequently, the metal coating bridges regions of resistive material32and causes the resulting chip resistor52to become a short circuit.

A second prior art method of forming conductive interconnects56on chip resistors52, described in U.S. Pat. No. 5,753,299 to Garcia et al., entails screen printing the resist coating onto rowbars48so that the resist coating covers only selected regions of resistive material32. The resist material-coated rowbars48are then sputter-coated with the metal coating to form conductive interconnects56. Lastly, the resist coating is removed from rowbars48to expose regions of resistive material32, and rowbar48is cut to form multiple individual chip resistors52. Screen printing is a mechanical process and thus has inherent size limitations that have been reached. Specifically, screen printing is becoming ineffective to form next-generation, miniature chip resistors because this method cannot provide sufficient electrical conductor line straightness or accuracy. Further, screen printing results in the formation of nonuniform lines, and the resulting ragged edges predominate in the next-generation, miniature chip resistors.

A third prior art method of forming conductive interconnects56entails assembling numerous rowbars48face-to-face in a tight stack to form a fixture that is then sprayed with the metal coating. The uppermost and lowermost (terminal) rowbars48in the fixture are sacrificed because regions of resistive material32on these terminal rowbars48are oversprayed with the metal coating. Conductive interconnects56are, however, formed on the other stacked rowbars48. Lastly, each rowbar48is cut to form multiple chip resistors52.

Regarding terminating the ends of capacitors, conventional termination systems terminate the ends when they are in singulated, discrete capacitor form. More specifically, the most common prior art method of forming conductive interconnect58on unterminated capacitors entails holding a discrete, unterminated capacitor by its end and dipping it into a viscous termination paste. Once the paste has dried, the discrete, partly terminated capacitor is repositioned for dipping the opposite end into the viscous termination paste. Accurate application of the termination paste by dipping becomes virtually impossible as the sizes of capacitors54decrease. Consequently, a metal coating bridging both conductive interconnects58would cause the resulting nominal capacitor54to become a short circuit.

Because they are approaching their physical limits, all of the prior art methods are inadequate for accurately terminating the ends of next-generation, miniature passive electronic components, including chip resistors and capacitors. Consequently, a need has arisen for a highly efficient and accurate method of terminating next-generation, miniature passive electronic components.

SUMMARY OF THE INVENTION

An object of the present invention is, therefore, to provide a method of forming conductive interconnects between electrically conductive regions formed on opposed surfaces of passive electronic components to terminate their ends.

A preferred method of the present invention entails applying a laser-ablative coating, preferably a nonphotosensitive coating, to each of first (upper) and second (lower) major surfaces of a substrate. The first and second major surfaces support respective first and second mutually spaced-apart electrical conductor lines arranged lengthwise in spatially aligned different pairs of one first electrical conductor line and one second electrical conductor line. A UV laser beam having a spot size and an energy distribution sufficient to remove the laser-ablative coating from selected regions of the first and second major surfaces is aligned with and directed for incidence on the substrate. The UV laser beam and substrate move relative to each other to remove sufficient amounts of the laser-ablative coating and thereby expose at least a portion of the lengths of the first and second electrical conductor lines. The substrate is then broken into multiple rowbars, each of which includes side margins along which run different spatially aligned pairs of first and second electrical conductor lines. An electrically conductive coating material is applied to the side margins of the rowbars to form electrically conductive interconnects between each spatially aligned pair of electrical conductor lines.

Certain types of substrates do not support electrical conductor lines on the second (lower) major surface, thereby leaving it vacant. To practice the preferred method on such substrates for resistors, the UV laser beam removes amounts of laser-ablative coating from the second major surface to expose the vacant locations where electrical conductor lines would have been supported to form the previously described spatially aligned pairs. Upon formation of the rowbars, the electrically conductive coating material is applied to form electrical conductor lines in the exposed vacant locations and to the rowbar side margins to interconnect the newly formed electrical conductor lines on the second major surface and the previously existing electrical conductor lines on the first major surface.

To practice the method on substrates having vacant first and second major surfaces for use in capacitors, the UV laser beam removes amounts of laser-ablative coating from the first and second major surfaces to expose thin stripes of dielectric material where electrically conductive regions are to be formed. Upon formation of the rowbars, the electrically conductive coating material is applied to bridge across and thereby connect the side margins of the internal electrodes and bond to the exposed dielectric material on the first and second major surfaces. These methods carried out on substrates not supporting electrical conductor lines can also be applied to other passive electronic components, including chip inductors and varistors.

A preferred option of the method includes removing from the rowbars residual amounts of the laser-ablative coating following formation of the conductive interconnects.

Although use of a UV laser beam to remove the laser-ablative coating is preferred, the method can be practiced using lasers emitting different wavelengths of light to remove amounts of a different, wavelength compatible laser-removable coating.

In a first preferred embodiment, the substrate includes ceramic material and supports a region of resistive material, and the type of passive electronic component formed is a resistor.

In a second preferred embodiment, the substrate includes dielectric material, and the type of passive electronic component formed is a capacitor.

Preferred implementations of the method entail forming multiple scribe lines in one or both of the major surfaces of the substrate. Each scribe line is positioned in an area called a “street,” which lies between and runs generally parallel or perpendicular to the lengths of adjacent electrical conductor lines. A breakage force applied to either side of the scribe line effects clean breakage of the substrate into separate passive electronic components having side margins defined by the scribe line. The scribe line is preferably formed by directing a UV laser beam along the substrate such that a portion of the thickness of the substrate is removed to form a shallow trench. The trench has a diminishing width that converges from the substrate surface to the bottom of the trench to define a sharp snap line. The UV laser beam is characterized by an energy distribution and a spot size sufficient to form the scribe line in the absence of appreciable substrate melting, so that the clearly defined, sharp snap line forms a region of high stress concentration extending into the thickness of the substrate and along the length of the snap line. Consequently, multiple depthwise fractures propagate into the thickness of the substrate in the region of high stress concentration in response to a breakage force applied to either side of the trench to effect clean breakage of the substrate into separate circuit components having side margins defined by the snap line.

Use of a UV laser to ablate the laser-ablative coating and to form a scribe line is preferred because switching between the two UV laser processing operations entails only introducing beam shaping optics and beam power adjustment. A laser beam of Gaussian shape is used to form scribe lines, and a laser beam of uniform shape formed by inserting a beam shaping objective lens is used to ablate the laser-ablative coating.

Additional aspects and advantages of this invention will be apparent from the following detailed description of preferred embodiments, which proceeds with reference to the accompanying drawings.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

As discussed above, prior art methods of forming a conductive interconnect between each electrical conductor in a spatially aligned pair of electrical conductors entailed successively applying to a rowbar a resist coating and then a metal coating. However, these prior art methods are quickly becoming inadequate in light of technological advancements that have led to the formation and use of miniature, next-generation passive electronic components.

A preferred method of the present invention, in contrast, entails applying a laser-ablative coating to the substrate while it is in plate form, directing a uniform-shaped laser beam emitted by a UV laser along the lengths of the electrical conductor lines to remove the laser-ablative coating in sufficient amounts to expose them, breaking the substrate plate into multiple rowbars having exposed side margins, and metallizing the side margins of the rowbars to form conductive interconnects. Because a laser-ablative coating is applied while the electronic circuit components are in their larger-sized substrate plate form, greater accuracy and efficiency can be achieved than when attempting to apply the resist coating to the smaller-sized rowbar form in accordance with prior art techniques. A UV laser is preferred because organic materials, of which the laser-ablative coating is made, are cleanly ablated by UV wavelengths of laser radiation.

Preferred methods of the present invention may be used to terminate the ends of various passive electronic components. The term “substrate” used in connection with passive electronic components herein refers to single layer structures as well as consolidated stack, multi-layer, and laminated multi-layer structures. Passive electronic component substrates are of different types including, but not limited to, preferred ceramic and ceramic-like materials described below.

A first type is a ceramic substrate constructed in either single layer or multi-layer plate form including green (soft) or fired (hard) plates of, for example, high temperature co-fired ceramic (HTCC) or low temperature co-fired ceramic (LTCC) materials.

A second type is a single layer fired ceramic substrate patterned with individual (chip) resistors, or resistor networks; piezoelectric, electro-optic, or optoelectronic devices; inductors; or other individual components built on the larger multielement ceramic substrate.

A third type is implemented with multi-layer ceramic technology, including, for either HTCC or LTCC materials, chip capacitors, networks composed of arrays of multiple component types (e.g., resistors, capacitors, and inductors), and HTCC and LTCC electronic packages containing passive components or electronic packages for use as interposers connecting semiconductor (e.g., silicon) devices to other electronic packages.

A fourth type is a specialized ceramic substrate, either fired or unfired, and of either single layer or multi-layer construction, such as, for example, a substrate of a varistor or a thermistor. Single layer construction of thermistor and varistor substrates is referred by skilled persons to any one of discs, rods, washers, slabs, plates, tubular shapes, and beads.

Exemplary preferred methods of the present invention will be described first with reference to the formation of discrete chip resistors and then with reference to the formation of discrete chip capacitors.

With respect to the formation of chip resistors52, a preferred method of the present invention entails applying a laser-ablative coating70to each of first major surface14and second major surface16of substrate10, as shown inFIG. 7for major surface14. Substrate10is preferably a ceramic material but could be an alternative material having the appropriate electrical and mechanical properties. A preferred laser-ablative coating70is a nonphotosensitive, laser-ablative resist, which is an organic material. Laser-ablative coating70can, but need not be, a polyimide; it can be any laser-ablative resist material that is compatible with the chosen substrate10. Laser-ablative coating70preferably entirely covers each of first and second major surfaces14and16of substrate10.

Next, a UV laser beam having a spot size and an energy distribution sufficient to remove the laser-ablative coating from selected regions of first and second major surfaces14and16is aligned and directed for incidence on substrate10. The UV laser beam is directed along at least a portion of the length of each of electrical conductor lines18and20that form a spatially aligned pair, thereby removing sufficient amounts of laser-ablative coating70to expose at least a portion of the length of each of first and second conductor lines18and20, as is shown inFIGS. 8A,8B, and8C.FIGS. 8A and 8Bshow laser-ablative coating70remaining on regions of resistive material32and small portions of electrode pads22on first major surface14of substrate plate10.FIG. 8Cshows laser-ablative coating70remaining on regions defined by spaces26between electrode pads30on second major surface16. Removal of laser-ablative coating70from at least a portion of first and second major surfaces14and16may be performed simultaneously or successively from one and then the other of first and second major surfaces14and16.

A preferred UV laser emits a uniform-shaped laser beam having a wavelength of less than 400 nm, more preferably 355 nm, 266 nm, or 213 nm. (A UV laser is defined as one that emits light having a wavelength shorter than 400 nm.) A preferred laser for use in the method of the present invention is a Q-switched, diode-pumped, solid-state UV laser that includes a solid-state lasant, such as Nd:YAG, Nd:YLF, Nd:YAP, or Nd:YVO4, or a YAG crystal doped with holmium or erbium. UV lasers are preferred because most laser-ablative resist coatings exhibit strong absorption in the UV range; however, any laser source that generates a laser beam having a wavelength that cleanly removes organic materials may be used. A preferred laser provides harmonically generated UV laser output of one or more laser pulses at a wavelength such as 355 nm (frequency tripled Nd:YAG), 266 nm (frequency quadrupled Nd:YAG), or 213 nm (frequency quintupled Nd:YAG) with primarily a TEM00 spatial mode profile. Laser output having a wavelength of 355 nm is especially preferred because the harmonic crystalline availability and intracavity doubling at this wavelength allow for the greatest available power and pulse repetition rate. The laser preferably has a round or square uniform beam, the bottom area of which has a diameter or side length of between about 30 microns and about 300 microns. The laser is preferably operated at a high repetition rate of between about 15 kHz and about 100 kHz and a power level of between about 0.5 W and about 10 W. The pulse length is preferably about 30 ns, but can be any appropriate pulse length. The UV laser beam preferably has an energy per pulse of between about 50 μJ and about 1000 μJ.

The UV laser pulses may be converted to expanded collimated pulses by a variety of well-known optical devices, including beam expander or upcollimator lens components (with, for example, a 2× beam expansion factor), that are positioned along a laser beam path. A beam positioning system typically directs collimated pulses through a beam shaping objective lens to a desired laser target position on the ceramic substrate. The beam positioning systems incorporated in Model Series Nos. 43xx and 44xx small-area micromachining systems manufactured by Electro Scientific Industries, Inc., Portland, Oreg., the assignee of this patent application, are suitable for implementing the present invention to ablate laser-ablative coatings on smaller (i.e., smaller than 10.2 cm×10.2 cm (4 in×4 in)) ceramic substrates. Some of these systems, which use an X-Y linear motor for moving the substrate and an X-Y stage for moving the beam shaping objective lens, are cost-effective positioning systems for making long, straight cuts. Skilled persons will appreciate that a system with a single X-Y stage for substrate positioning, with a fixed beam position and beam shaping optics, may alternatively be employed.

Next, substrate plate10is broken into multiple rowbars48, each of which includes side margins60along which run different spatially aligned pairs of first and second electrical conductor lines18and20. Rowbars48are shown inFIG. 9. Exemplary rowbars48are used in forming type 0402 chip resistors.

An electrically conductive material is applied to side margins60of rowbars48to form a conductive interconnect56between each of the electrical conductor lines18and20that comprise a spatially aligned pair.FIG. 10is a diagram of rowbar48having side margins60that have been coated with an electrically conductive material to form conductive interconnects56. The electrically conductive material is typically applied as a metallic paste to rowbar48. The paste is preferably spread onto side margins60in a continuous layer of substantially uniform thickness, because voids in the paste could result in conductive interconnect discontinuities. Further, if the applied paste layer is too thick, the width of the resulting conductive interconnect56and its uniformity could be adversely affected. Exemplary methods of applying the metallic paste include metering, spreading, and sputtering. The paste may optionally be subsequently dried by heating or at ambient temperature to set conductive interconnects56. Once laser-ablative coating70is in place, rowbars48can be completely covered with the electrically conductive material because laser-ablative coating70protects the entire rowbar48except for exposed electrical conductor lines18and20and their related side margins60. Thus the electrically conductive coating covers only these areas and thereby forms conductive interconnects56. Following application of the electrically conductive material and the formation of conductive interconnects56, rowbar48is broken into multiple chip resistors52.

Breakage of substrate10into multiple rowbars48may be effected in numerous ways. One exemplary preferred method entails forming scribe lines72(shown inFIGS. 7,8A,8B, and8C) in substrate10by directing a UV laser beam along the lengths of streets28uthat extend along major surface14of substrate10and that are substantially parallel to electrical conductor lines18. Substrate10absorbs at least a portion of the energy emitted by the laser beam, thereby effecting depthwise removal of a portion of substrate10to form shallow trenches along streets28ucreated by patterns formed on substrate10by electrical conductor lines18and regions of resistive material32. Upon application of a breakage force to substrate10on either side of each scribe line72of street28u, substrate plate10breaks into separate rowbar pieces48, each of which includes multiple chip resistors52. Preferred lasers for use in forming scribe line72are the same as the lasers described above for use in effecting removal of laser-ablative coating70from electrical conductor lines18, with the beam shaping objective lens removed to provide a beam of Gaussian shape. A preferred depth of the scribe line is about 10% of the depth of substrate10, which for a 250 micron thick substrate is 25 microns.

Breakage of rowbars48into multiple, discrete chip resistors52entails forming scribe lines72in substrate10by directing a UV laser beam along the lengths of streets86uthat extend along major surface14of substrate10and that are substantially perpendicular to electrical conductor lines18. Each scribe line72on a street86uis preferably formed as described above. Upon application of a breakage force to rowbar48on either side of scribe line72, rowbar48breaks into multiple, separate chip resistors52.

In a preferred embodiment, scribe lines72on streets28uthat are used to break substrate10into rowbars48and streets86uthat are used to break the rowbars48into multiple, separate chip resistors52are formed in substrate10either before substrate10is coated with laser-ablative coating70or before the UV laser effects removal of laser-ablative coating70along the lengths of electrical conductor lines18(“prescribing”). One advantage of prescribing is that it minimizes the handling of rowbars48following application of the laser-ablative coating.

In a further preferred embodiment, the scribe lines72formed along streets28uand used to break the substrate10into rowbars48are deeper than the scribe lines72formed along streets86uand used to singulate rowbar48into multiple, separate chip resistors52. The depths of scribe lines72on streets86udepends on whether a metal layer, e.g., an electrical conductor line, is present on lower major surface16with no scribe line. The depth of a scribe line72may be about 5%–8% of the substrate thickness in absence of a metal layer and equal to or greater than 10% in the presence of a metal layer.

The method of the present invention preferably further entails removing residual laser-ablative coating70from chip resistors52having conductive interconnects56. While removal of residual laser-ablative coating70may be effected by various methods, the chosen method must be compatible with the resistive material used. One exemplary removal method entails firing chip resistors52in an oven. Another exemplary method entails using a water-soluble laser-ablative coating that may be removed by washing with water or another solvent. This process may be accompanied by abrasive action. Alternatively, residual laser-ablative coating70could remain in place.

With respect to the formation of discrete capacitors54, a preferred method of the present invention entails applying laser-ablative coating70to both of prescribed first and second major surfaces36and38of substrate34, as shown inFIG. 11for major surface36. As stated above, substrate34includes a dielectric material and is preferably formed of multiple layers of ceramic material. The ceramic material is prescribed before the firing operation because the ablation threshold of soft ceramic material is lower. Laser-ablative coating70is applied after the firing process, which would eliminate coating70if it were present. Both of major surfaces36and38are prescribed to facilitate breakage of the relatively thick dielectric substrate34. Alternatively, all process steps can be done before firing, including adding the termination metal and firing the complete structure in one operation.

As is described above with reference to resistors, a UV laser beam having a spot size and an energy distribution sufficient to remove the laser-ablative coating from selected regions of first and second major surfaces36and38is then aligned and directed for incidence on substrate34. The UV laser beam is directed to remove amounts of laser-ablative coating70from first and second major surfaces36and38to expose stripes90of dielectric material where electrically conductive regions are to be formed, as is shown inFIG. 12. One of the major advantages of the laser process is its ability to compensate for shrinkage and warpage and thereby permit laser ablation along nonorthogonal or not perfectly straight lines. The lasers used to remove laser-ablative coating70and the parameters at which these lasers are preferably operated are the same as those described above with respect to chip resistors.

As is described above with reference to resistors, substrate34is then broken into multiple rowbars50, each of which includes side margins62. Rowbars50are shown inFIG. 13. Breakage of substrate34into multiple rowbars50may be effected in any of the ways described above with respect to chip resistors.

Next, the electrically conductive material is applied to bridge across side margins62of rowbars50to form a conductive interconnect58for internal electrodes40and bond to the exposed stripes90of dielectric material on major surfaces36and38.FIG. 14is a diagram of rowbar50including side margins62that have been coated with an electrically conductive material to form conductive interconnects58over the previously exposed stripes90. The electrically conductive material is preferably applied to rowbars50as is described above with reference to resistors.

Following application of the electrically conductive material and the formation of conductive interconnects58and electrical conductor lines, rowbar50is broken into multiple, discrete capacitors54. Breakage of rowbars50into-multiple, discrete capacitors54may be effected in any of the numerous ways described above with reference to chip resistors.

As indicated above for capacitors54, certain types of substrates do not carry electrical conductor lines and, therefore, present vacant major surfaces. Practice of the preferred methods on such types of substrates can be accomplished by forming electrical conductor lines during formation of conductive interconnects. A laser-ablative coating is applied to a major surface, and the UV laser beam removes the laser-ablative coating to expose the vacant locations where electrical conductor lines would have been present to form the spatially aligned pairs of upper and lower electrical conductors. After breaking apart the substrate to form rowbars, the electrically conductive coating material covers the exposed vacant locations to form electrical conductor lines and wraps around the side margins to form conductive interconnects with the electrical conductor lines.

The techniques described above can similarly be applied in the fabrication of other miniature electronic components, such as inductors and varistors.

One advantage of the present invention is that effecting removal of the laser-ablative coating while the substrate is in plate form facilitates maintenance of the alignment of the laser beam and the substrate. Alignment is effected by aligning the laser beam with a datum point. Thus alignment may be accomplished in various ways, including plate alignment and pattern alignment. An example of pattern alignment entails aligning the laser beam with one or both of the electrical conductor lines or with a scribe line. One advantage of implementing pattern alignment is that it minimizes or eliminates the need for the pattern to be accurately aligned with the substrate. An example of plate alignment entails aligning the laser beam with the ceramic plate itself or some portion thereof, such as its corners or alignment holes that have been drilled into the plate. By effecting the laser-ablative coating removal when the substrate is in plate form, alignment of the first and second opposed major surfaces may be maintained. This facilitates increased precision and cleaner rowbar side margins.

Another advantage of the present invention is that it creates a very accurate “wraparound” termination stripe on the chip resistor or capacitor. In the case of chip resistors, it creates a very straight line from the electrical conductor lines to the edge of the region of resistive material.