Phase-shift mask with assist phase regions

A phase-shift mask having a checkerboard array and a surrounding sub-resolution assist phase pattern. The checkerboard array comprises alternating phase-shift regions R that have a relative phase difference of 180 degrees. The sub-resolution assist phase regions R′ reside adjacent corresponding phase-shift regions R and have a relative phase difference of 180 degrees thereto. The sub-resolution assist phase regions R′ are configured to mitigate undesirable edge effects when photolithographically forming photoresist features. Method of forming LEDs using the phase-shift mask are also disclosed.

FIELD

The present disclosure relates generally to phase-shift masks used in photolithography, and in particular relates to phase-shift masks having assist phase regions.

BACKGROUND ART

Phase-shift masks are used in a variety of photolithographic applications to form semiconductor integrated circuits and light-emitting diodes (LEDs). Phase-shift masks differ from conventional chrome-on-glass masks in that the transparent regions in a phase-shift mask have a relative phase difference while in a chrome-on-glass mask, the transparent regions all have the same relative phase. The benefit of having select phase differences for the transparent regions in a phase-shift mask is that the transparent regions can be configured so that the electric field amplitudes add in a manner that result in a sharper image intensity (image contrast). This in turn results in an increased imaging resolution when printing features in photoresist.

An example phase-shift mask can include alternating phase-shift regions, i.e., a periodic pattern of 0 degree and 180 degree (π) phase regions. Such a phase-shift mask is useful for enhancing feature resolution of repeating patterns. However, the improved image contrast ceases at the edge (perimeter) of the lithography exposure field because the repeating pattern must terminate. As a result, the feature patterns formed adjacent to the field edge tend to be distorted by discontinuity in the otherwise beneficial phase interference. This issue has been addressed in the past by configuring the phase-shift mask and the imaging field such that the distorted features would print in a region on the wafer that ultimately would not be used to form the actual device. However, not all manufacturing applications have this flexibility, and therefore the conventional alternating-phase phase-shift mask cannot be employed.

One example manufacturing application where distorted features at the field edge can be problematic is in LED manufacturing. LEDs are becoming increasingly more efficient due to continuous improvements in LED fabrication and LED design. However, a general limitation on LED light emission efficiency is due to a total internal reflection of the light generated within the LED. For example, in a gallium-nitride-(GaN)-based LED, n-doped and p-doped GaN layers are supported by a semiconductor substrate (e.g., sapphire) having a surface. The n-doped and p-doped GaN layers sandwich an active layer, and one of the GaN layers has a surface that interfaces with air. Light is generated in the active layer and is emitted equally in all directions. However, GaN has a relatively high refractive index of about 3. As a result, there exists at the GaN-air interface a maximum-incident-angle cone (“exit cone”) within which the light exits the p-GaN-air interface, but outside of which light is reflected back into the GaN structure due to Snell's Law.

To improve LED light emission efficiency, certain LEDs have been fabricated with a roughened substrate surface. The roughened substrate surface scatters the internally reflected light, causing some of the light to fall within the exit cone and exit the LED, thereby improving the light emission efficiency of the LED.

In a manufacturing environment, it is desirable to have a controllable and consistent method of forming the roughened substrate surface so that the LEDs have an identical structure and identical performance. To this end, it is desirable that the roughened substrate surface be formed without the above-described feature pattern distortions.

SUMMARY

An aspect of the disclosure is a phase-shift mask for use in a photolithographic imaging system having a resolution limit. The phase-shift mask has a checkerboard array of phase-shift regions R sized to be at or above the resolution limit. Adjacent phase-shift regions R have a relative phase difference of 180 degrees, and the array has a perimeter. Assist phase regions R′ are arranged immediately adjacent at least a portion of the perimeter, with each assist phase regions R′ being sized below the resolution limit and having a relative phase-shift difference of 180 degrees relative to the adjacent phase-shift region R.

Another aspect of the disclosure is a phase-shift mask for use in a photolithographic imaging system having a resolution limit and a wavelength. The mask body has a surface, and the mask body is generally transparent to the photolithographic imaging system wavelength. The phase-shift mask includes a checkerboard array of phase-shift regions R supported by the mask body surface and sized to be at or above the resolution limit, with adjacent regions R have a phase difference of 180 degrees. The array has a perimeter that includes a plurality of edges and four corners. The phase-shift mask also includes a plurality of assist phase regions R′ supported by the substrate surface. Each assist phase region R′ is sized to be below the resolution limit. The assist phase regions R′ are arranged immediately adjacent the plurality of edges and the four corners so as to surround the perimeter, with each assist phase region R′ having a phase-shift difference of 180 degrees relative to the adjacent phase-shift region R and relative to the adjacent assist phase region R′.

Another aspect of the disclosure is a method of photolithographically patterning a semiconductor substrate. The method includes providing a semiconductor substrate having a surface that supports a layer of photoresist. The method also includes photolithographically imaging a phase-shift mask pattern onto the photoresist layer, the phase-shift mask pattern comprising a checkerboard array of phase-shift regions R, with adjacent regions R have a phase difference of 180 degrees, the array having a perimeter, and a plurality of assist phase regions R′ each sized to be below the resolution limit, with the assist phase regions R′ arranged immediately adjacent at least a portion of the perimeter, with each assist phase region R′ having a phase-shift difference of 180 degrees relative to the adjacent phase-shift region R. The method further includes processing the photoresist layer to form a periodic array of photoresist features.

Another aspect of the disclosure is a method of forming an LED. The method includes photolithographically exposing photoresist supported by a semiconductor substrate to form therein an array of photoresist posts, including passing illumination light through a phase-shift mask having a checkerboard phase-shift pattern having a perimeter surrounded by an array of sub-resolution assist phase regions. The method also includes processing the array of photoresist posts to form an array of substrate posts that defined a roughened substrate surface. The method additionally includes forming a p-n multilayer structure atop the roughened substrate surface to form the LED, wherein the roughened substrate surface acts to scatter light generated by the p-n multilayer structure to increase an amount of light emitted by the LED as compared to the LED having an unroughened substrate surface.

Additional features and advantages of the disclosure are set forth in the detailed description that follows, and in part will be readily apparent to those skilled in the art from that description or recognized by practicing the embodiments as described herein, including the detailed description which follows, the claims, as well as the appended drawings. The claims constitute part of this specification, and are hereby incorporated into the detailed description by reference.

It is to be understood that both the foregoing general description and the following detailed description presented below are intended to provide an overview or framework for understanding the nature and character of the disclosure as it is claimed. The accompanying drawings are included to provide a further understanding of the disclosure, and are incorporated into and constitute a part of this specification. The drawings illustrate various embodiments of the disclosure, and together with the description serve to explain the principles and operations of the disclosure.

DETAILED DESCRIPTION

Reference is now made in detail to various embodiments of the disclosure, examples of which are illustrated in the accompanying drawings. Whenever possible, the same or like reference numbers and symbols are used throughout the drawings to refer to the same or like parts. The drawings are not necessarily to scale, and one skilled in the art will recognize where the drawings have been simplified to illustrate the key aspects of the disclosure. For example, in connection with the phase-shift masks disclosed herein, such masks can contain many thousands of phase regions, and in certain Figures a limited number of the phase regions are shown by way of illustration.

Aspects of the phase-shift mask with assist phase regions of the disclosure are discussed in connection with the fabrication of LEDs by way of illustration. Thus, information relating to LED structure and fabrication using photolithography are set forth below.

Example LED structure

FIG. 1is a schematic cross-sectional diagram of an example GaN-based LED10. Example GaN-based LEDs are described in U.S. Pat. Nos. 6,455,877 and 7,259,399 and 7,436,001, which patents are incorporated by reference herein. The present disclosure is not limited to GaN-based LEDs, and is directed to any type of LED formed using photolithographic imaging and processing techniques and that could benefit from an increased light emission due to a roughened substrate surface formed by an array of posts as described herein.

LED10includes a substrate20having a surface22. Example materials for substrate20include sapphire, SiC, GaN, Si, etc. Disposed atop substrate20is a GaN multilayer structure30that includes an n-doped GaN layer (“n-GaN layer”)40and a p-doped GaN layer (“p-GaN layer”)50with a surface52. The n-GaN layer40and the p-GaN layer50sandwich an active layer60, with the n-GaN layer being adjacent substrate20. In other Ga-based LED embodiments, GaN multilayer structure30is reversed so that the p-GaN layer50is adjacent substrate20. Active layer60comprises, for example, a multiple quantum well (MQW) structure such as undoped GaInN/GaN superlattices. GaN multilayer structure30thus defines a p-n junction, and is also referred to herein more generally as a p-n junction multilayer structure. In examples, surface52can be roughened to increase the LED light emission therethrough.

Substrate surface22includes an array70of posts72that define a substrate surface roughness. In an example described in greater detail below, array70of posts72is etched into substrate surface22so that posts72are made of the substrate material. To increase LED light emission efficiency, posts72preferably have dimensions (e.g., a diameter or width D) that are 2× to 10× larger than the emitted LED wavelength λLED. It is important to note that while the emitted LED wavelength λLEDmight be, for example, between 400 and 700 nm, the LED wavelength in the GaN layers40and50is roughly 2.5× smaller because of the GaN index of refraction n, which makes the wavelength in the GaN layers approximately 150 nm to 250 nm (i.e., λLED/n). In an example, to efficiently scatter the light within n-GaN layer40, posts72have a dimension D of about 0.5 micron to about 3 microns. Also in an example, the edge-to-edge spacing S between posts72can vary from 0.5 micron to 3 microns, and the post height H can be up to about 3 microns (seeFIG. 3andFIG. 4).

LED10is shown inFIG. 1as having a sloped portion80formed in GaN multilayer structure30. Sloped portion80forms an exposed surface portion42of n-GaN layer40that acts as a ledge for supporting one of two electrical contacts90, namely n-contact90n. Example n-contact materials include Ti/Au, Ni/Au, Ti/Al, or combination thereof. The other electrical contact90is the p-contact90p, which is arranged on p-GaN surface52. Example p-contact materials include Ni/Au and Cr/Au. An example distance d1is about 4 microns, and an example distance d2is about 1.4 microns. An example LED10is typically 1 mm×1 mm square.

Increasing LED Light Emission Efficiency

FIG. 2is a schematic plot of a measured increase in LED (light) emission (%) versus post dimension (microns) for an LED such as shown inFIG. 1and having uniform array70of posts72that define roughened surface22in a sapphire substrate20.FIG. 3is a perspective view of a portion of an example uniform array70of posts72.FIG. 4is a close-up perspective view of three posts72in array70showing the edge-to-edge post spacing S, the post diameter D and the post height H. The LED light emission for an LED having an unroughened sapphire surface22is shown for reference at the “0” location, and the increase in LED light emission is measured relative to this reference value (0%). The post dimensions in the plot generally get taller and narrow to the right of the “0” or “unroughened” location.

From the plot ofFIG. 2, it is observed that the LED light emission generally increases for taller and narrower posts72. For a uniform array70, overlay requirements are not severe and occasional defects are not particularly problematic. However, the size of posts72is important, as is the repeatability and consistency of the high-volume process used to form the posts. It is noted that posts72can have any reasonable cross-sectional shape and are shown as cylindrical posts with a round cross-section by way of illustration. Posts72can be non-cylindrical (i.e., have sloped or non-straight sidewalls), can have rectangular or square cross-sectional shapes, a kidney-bean type shape, etc.FIG. 14Eintroduced and discussed below illustrates by way of example pyramidal posts72. In an example, photoresist posts72′ can be cylindrical but the corresponding posts72subsequently formed in the substrate surface22are non-cylindrical due to the process used to form the substrate posts72from the photoresist posts72′.

Generally speaking, example posts72formed at or near the resolution limit of the photolithographic imaging process used to form the posts (as discussed below) have a rounded cross-sectional shape rather than sharp edges. Thus, the post diameter or width D is meant herein as a representative or effective dimension of the cross-sectional size of the post and is not limited to any particular shape. For example, post diameter D may refer to the major axis diameter of a post having an elliptical cross-sectional shape.

As discussed above, posts72can have a sub-micron diameter D, e.g., D=0.5 micron. Forming such posts using present-day photolithographic techniques would typically require a photolithographic system capable of imaging 0.5 micron features. Such systems, however, are typically designed for traditional semiconductor integrated circuit manufacturing for forming the critical layers (i.e., the layers having the smallest dimensions) and are generally considered prohibitively expensive for LED manufacturing.

Aspects of the present disclosure include photolithographic systems and methods for forming an array70of posts72on substrate surface22to fabricate LEDs having increased LED light emission efficiency as compared to the same LEDs having a smooth substrate surface. However, the systems and methods described herein are suitable for being carried out using non-critical-layer photolithographic systems in combination with a select type of phase-shift mask. The phase-shift mask is matched to the photolithography system's numerical aperture and illumination (i.e., “sigma”) to form posts72having desired dimensions. This allows the photolithography system to print much smaller posts over a suitable depth of focus (DOF) than is possible using a traditional chrome-on-glass non-phase-shift mask.

It is well known that grating-like structures can be produced in photoresist using two intersecting coherent light beams. Under normal conditions, two coherent beams with incident angles θ and wavelength λ can interfere to produce a periodic grating-like structure in the photoresist whose period P is given by P=λ/(2*Sinθ). A two-dimensional grid-like (checkerboard) pattern in an x-y plane can be made by superimposing four coherent beams, namely two beams in the x direction and two beams in the y direction.

FIG. 5is a schematic diagram of a generalized photolithography system100, andFIG. 6is a more detailed schematic diagram of an example photolithography system100. Cartesian X-Y-Z coordinates are shown for reference. Photolithographic system100is configured to perform photolithographic imaging, which is also referred to herein as “photolithographic exposure” because the imaging results in the exposure of a photosensitive material, namely photoresist. Photolithographic imaging or photolithographic exposure generally means capturing light that passes through a mask and imaging the captured light at an image plane within a DOF, wherein a photosensitive material is arranged generally within the DOF to record the image.

With reference to bothFIG. 5andFIG. 6, photolithography system100includes, along a system axis A1, an illuminator106, a mask stage110, a projection lens120, and a moveable substrate stage130. Mask stage110supports a phase-shift mask112that is transparent to an exposure wavelength of light used by photolithographic system100. Phase mask112has a body111with a surface114that supports a phase-shift mask pattern115formed thereon.

The amount of phase shift generated by a layer of material of thickness d and refractive index n is given by Δφ=2π(n−1)d/λ where λ is the photolithographic imaging wavelength. An example material for phase mask112is quartz or fused silica. In an example, phase-shift mask pattern115is formed by selective etching mask surface114to create regions of different thickness, by selectively adding phase-shifting material to the mask surface to create region of different thickness, or by a combination of these methods.

Substrate stage130supports substrate20. Substrate20may be in the form of a wafer. In an example, photolithography system100is a 1:1 system (i.e., unit magnification system) that has a numerical aperture of about 0.3 and operates at mid-ultraviolet wavelengths such as the i-line (nominally 365 nm). In another example, a reduction photolithography system can be used. In an example, photolithography system100is suitable for use in processing non-critical layers in a semiconductor process. An example photolithography system100suitable for carrying out the systems and methods disclosed herein is the Sapphire™100photolithography system, available from Ultratech, Inc., San Jose, Calif.

An example projection lens120includes a variable aperture stop AS that defines a pupil P with a diameter DP and that defines a pupil plane PP. Illuminator106is configured to illuminate phase-shift mask112by providing a source image SI that fills a portion of pupil P. In an example, source image SI is a uniform circular disc with a diameter DSI. The partial coherence factor of photolithography system100is defined as σ=DSI/DP, where pupil P is assumed to be circular. For different source images SI other than a simple uniform disc, the definition of the partial coherence a becomes more complicated. In an example, the illumination of phase-shift mask112is Kohler illumination or a variant thereof.

Photolithography system100also includes an optical alignment system150, such as a through-the-lens alignment system as shown, which may utilize a machine-vision alignment system. Example optical alignment systems are disclosed in U.S. Pat. Nos. 5,402,205 and 5,621,813 and 6,898,306, and in U.S. patent application Ser. No. 12/592,735, which patents and patent application are incorporated by reference herein.

FIG. 7is a plan view of an example substrate20that has exposure fields EF as formed by photolithography system100, and also includes global alignment marks136G used for global alignment, as well as fine alignment marks136F for fine alignment (see Inset A). Note that in the example shown that both types of alignment marks136reside in scribe areas137between or adjacent exposure fields EF. Exposure fields EF are discussed in greater detail below in connection with their formation using phase-shift mask112in the photolithographic process of forming LEDs10.

With reference again toFIG. 6, an example optical alignment system150includes a light source152arranged along an axis A2and that emits alignment light153of wavelength λA. A beam splitter154is arranged at the intersection between axis A2and a perpendicular axis A3. A lens156and a fold mirror158are arranged along axis A3. Fold mirror158folds axis A3to form an axis A4that is parallel to lithography system axis A1. Axis A4travels through mask112, through projection lens120and to substrate20. Alignment system150also includes an image sensor160arranged along axis A3adjacent beam splitter154on the side opposite lens156and fold mirror158. Image sensor160is electrically connected to an image processing unit164configured to process digital images captured by image sensor160. Image processing unit164is electrically connected to a display unit170and also to moveable substrate stage130.

In the general operation of photolithography system100, light108from illuminator106illuminates mask112and pattern115thereon, and the pattern is imaged onto substrate surface22over a select exposure field EF (FIG. 7) via exposure light121from projection lens120. The alignment patterns115W form substrate alignment marks136. Substrate surface22is typically coated with a light-sensitive material such as photoresist layer135(FIG. 5) so that phase-shift mask pattern115can be recorded and transferred to substrate20.

Photolithography system100is used to form a relatively large number (e.g., thousands) of LEDs10on a single substrate20using photolithographic imaging (photolithographic exposure) in combination with photolithographic processing techniques. The layers making up LEDs10are formed, for example, in a step-and-repeat or step-and-scan fashion and then processed together. Thus, prior to imaging phase-shift mask pattern115onto photoresist layer135to form the array of exposure fields EF, the mask pattern must be properly aligned to the previously formed layer, and in particular to the previously formed exposure fields. This is accomplished by aligning substrate20relative to mask112using one or more of the aforementioned substrate alignment marks136and an alignment reference, which in alignment system150is one or more mask alignment marks116.

Thus, in the operation of alignment system150, alignment light153from light source152travels along axis A2and is reflected by beam splitter154along axis A3towards lens156. Light153passes through lens156and is reflected by fold mirror158to pass through mask112and projection lens120and to illuminate a portion of substrate surface22, including substrate alignment mark136. A portion153R of light153is reflected from substrate surface22and substrate alignment mark136and travels back through projection lens120and through mask112, and in particular through mask alignment mark116. In the case where substrate alignment mark136is diffractive, then the diffracted light from the substrate alignment mark is collected.

The combination of projection lens120and lens156forms from reflected light153R a superimposed image of the substrate alignment mark136and mask alignment mark116on image sensor160. Here, mask alignment mark116serves as an alignment reference. In other types of optical alignment systems such as off-axis systems, the alignment reference is the alignment system optical axis as calibrated based on lithography system fiducials.

Image sensor160generates an electrical signal Si representative of the captured digital image and sends it to image processing unit164. Image processing unit164is adapted (e.g., via image processing software embodied in a computer-readable medium such as a memory unit165), to perform image processing of the received digital image. In particular, image processing unit164is adapted to perform pattern recognition of the superimposed substrate and mask alignment mark images to measure their relative displacement and generate a corresponding stage control signal S2that is sent to substrate stage130. Image processing unit164also sends an image signal S3to display unit170to display the superimposed substrate and mask alignment mark images.

In response to stage control signal S2, substrate stage130moves in the X, Y plane (and also in the Z-plane, if necessary, for focusing purposes) until the images of mask and substrate alignment marks116and136are aligned (i.e., directly superimposed), indicating proper alignment of phase-shift mask112and substrate20.

With reference again toFIG. 5, the imaging of phase-shift mask pattern115can be viewed as a diffraction process whereby light108incident upon mask112is diffracted by phase-shift mask pattern115to form diffracted light121, with some of this diffracted light (i.e., the lowest diffraction orders, e.g., the zero order and the plus and minus first orders) being captured by projection lens120and imaged onto photoresist layer135. The quality of the image formed by projection lens120is directly related to the number of the diffracted orders it collects, as well as to the projection lens aberrations. Note that the zero-order diffracted beam is simply a straight-through component that contributes a “DC” background level of intensity to the image and as such is generally not desired.

Thus, when the photolithographic imaging process is viewed as a diffraction process, photolithography system100can be configured to optimize this diffraction process to form a desired image. In particular, with the proper design of phase-shift mask112and the phase-shift regions therein, the zero-order diffracted beam can be eliminated. Further, with a proper choice of the numerical aperture for projection lens120, one can select which diffracted orders will contribute to the photolithographic imaging process. Specifically, the numerical aperture can be adjusted so that only the two first-order diffracted beams are captured by projection lens120.

Moreover, the aforementioned grid-like or checkerboard pattern can be formed at substrate20by creating a two-dimensional periodic phase-shift mask pattern115on phase-shift mask112so that first-order beams are generated in both the x-direction and the y-direction. However, care must be taken to ensure that the zero-order beam is substantially eliminated, and to do so the electric field for the transmitted zero-order beam must be substantially zero in amplitude. This is accomplished in one embodiment by configuring phase-shift mask112so that the different phase-shift regions have the same area.

Example Phase-Shift Masks

FIG. 8Ais a schematic diagram of a portion of an example phase-shift mask112where phase-shift mask pattern115comprises transmissive phase-shift features or regions R, with transmissive phase-shift regions R0having a 0° phase shift and transmissive phase-shift regions Rπhaving a 180° (π) phase shift.

FIG. 8Bis a close-up view of four phase-shift regions R of phase-shift mask112ofFIG. 8A. Phase-shift regions R0and Rπare square with a dimension (side length) L, with the phase-shift regions R having equal area and configured in a checkerboard pattern or array. In an example embodiment, phase-shift regions R can have any reasonable shape, and in particular can have at least one of a circular shape, oval shape and a polygonal shape.

Photolithography system100, when configured with phase-shift mask112having a checkerboard phase-shift mask pattern115, can perform photolithographic imaging to form in photoresist layer135corresponding periodic (e.g., checkerboard) features with dimensions of about L/2, i.e., substantially half that of dimension L of the phase-shift regions R of the phase-shift mask. Specifically, there is a spatial-period doubling during the imaging process, whereby the spatial period of phase-shift mask pattern115is substantially doubled at substrate surface22, so that twice as many dark and light regions are created at the substrate20. This is because the zero-order diffraction beam has been eliminated, allowing for combination of the zero-order beam with each first-order beam that reproduces the original spatial period of the mask112. By eliminating the zero-order beam, only the two first-order beams are imaged. When these two first-order beams are combined, they produce a sinusoidal pattern with twice the spatial period of the original mask pattern. Thus, when L=1 micron, photoresist features having a dimension of L/2=0.5 micron can be formed.

A rule of thumb in photolithographic imaging is that the minimum feature size FS that can be printed (i.e., imaged into photoresist layer135with sharp features) with a photolithography system100having an imaging wavelength λIand a NA is FS=k1λI/NA, where k1is a constant typically assumed to be between 0.5 and 1, depending on the particular photolithographic process. The DOF is given by k2λI/NA2, where k2is another process-based constant that depends on the particular photolithographic process and is often approximately 1.0. Thus, there is a tradeoff between feature size FS and DOF.

Substrates20used for LED manufacture are traditionally not nearly as flat as substrates used in semiconductor chip manufacturing. In fact, most LED substrates20have a warpage (due to MOCVD processing) that exceeds many tens of microns (peak-to-valley) across the substrate surface22, and about 5 microns (peak-to-valley) over each exposure field. This degree of non-planarity has generally been considered highly problematic for using a photolithography imaging process to form LEDs10because of the attendant limited DOF relative to the amount of substrate non-flatness.

In a traditional photolithographic process that uses conventional photolithography photoresists, the minimum feature size (linewidth) that can be created in the photoresist is given by 0.7*λI/NA (i.e., k1is equal to 0.7). For the condition where it is desirable to print features that are 1 micron in size, the required NA is 0.255 when using an imaging wavelength of λI=365 nm. With this NA, the DOF for an unaberrated imaging system is 5.6 microns, which is on the order of the within-field substrate non-flatness of a typical LED substrate20. This means that it will be difficult to get an entire exposure field EF to reside within the DOF. Consequently, posts72that are formed outside of the DOF will not meet the necessary size and shape requirements.

However, when using a phase-shift mask112and conventional photolithography photoresists, the minimum feature size that can be printed is given by 0.3*λI/NA (i.e., k1is equal to 0.3). This has the practical effect of reducing the needed NA by about half and increasing the DOF by about 4× as compared to using a conventional mask. Thus, for a given post diameter D, NA=k1λI/D, and the DOF becomes:
DOF=k2λI/NA2=k2λI/[k1λI/D]2=k2D2/k12λI

By way of example, to photolithographically expose photoresists in order to obtain posts72that have a diameter D=1 micron using an imaging wavelength λI=365 nm, the required NA is now only 0.11, and the DOF is now over 30 microns so that each exposure field EF for non-flat LED substrates20will fall well within the DOF.

In an example, photolithography systems100used to carry out the methods described herein have a relatively low projection lens NA (e.g., of 0.5 or lower) as compared to present-day critical-level projection lens NAs (e.g., of 0.5 and greater), and also have a relatively large imaging wavelength (e.g., of about λI=365 nm, or any of the other mercury lines), as compared to present-day critical level imaging wavelengths (e.g., deep UV at a wavelength of 193 nm). Consequently, lower-NA, longer-wavelength photolithography systems100are preferred because they are generally much less expensive to purchase, operate and maintain than the higher-NA, shorter-wavelength advanced photolithography systems used for critical levels in semiconductor manufacturing of integrated circuits.

FIG. 9Ais a schematic diagram of another example phase-shift mask112that can be used to form an array70of posts72having a sub-micron dimension. The phase-shift mask112ofFIG. 9Ais similar to that ofFIG. 8AandFIG. 8B, except that there is an opaque background section117, and phase-shift regions R0and Rπhave dimensions L/2 and are spaced apart from one another. Phase-shift regions R0and Rπare shown as being octagonal by way of illustration of an example type of polygonal phase-shift regions.FIG. 9Bis similar toFIG. 9A, but illustrates an example phase-shift mask112wherein the phase-shift regions R are circular.

Opaque background section117can be coated with an absorber layer, such as chrome or aluminum. Phase-shift regions R0and Rπare printed in photoresist layer135with substantially the same dimension L/2, which is beyond the traditional resolution limit of a 1 micron design photolithography system100. An advantage of the configurations of phase-shift masks112ofFIG. 9AandFIG. 9Bis that it is easier to control the geometry and spacing of the final photolithographic image that forms array70of posts72.

FIG. 10is a scanning electron microscope (SEM) image of an example array70′ of photoresist posts72′ formed in a negative photoresist layer135having a 3 micron thickness and using a phase-shift mask112similar to that ofFIG. 8A, with phase-shift regions R0and Rπwith L/2=0.6. The diameter (width) D of each photoresist post72′ is about 0.6 microns. It is noted again that the shape of posts72′ can vary (e.g., be undercut, have sloped sidewalls, etc.) so that the two dashed circles73represent an estimation of the actual size and shape of the posts72′ for the sake of illustration.

Phase-Shift Mask with Assist Phase Regions

FIG. 11Ais top-down view of an example chrome-less phase-shift mask112similar to that shown inFIG. 8A.FIG. 11Bis a close-up view of the inset region ofFIG. 11Adenoted as AA. Phase-shift mask112ofFIG. 11Aincludes a pattern115supported by mask surface114and similar to that shown inFIG. 8A. Pattern115has a central (or interior or main) checkerboard array115C with alternating phase regions R0and Rπ. Checkerboard array115C has a perimeter115P that includes edges115E and four corners115PC. Note that regions R need only have their phase shifts differ by π (180 degrees) and that any combination of phase regions R that satisfy this condition can be used, e.g., Rπ/2and R3π/2, etc. Phase regions R generally are sized to be at or above the resolution limit of the particular photolithographic system in which phase-shift mask112is intended to be used, i.e., the phase regions are sized to form a suitable or usable feature in photoresist layer135or like medium.

Pattern115further includes an assist pattern or array115A surrounding the central checkerboard-pattern115C at edge115E. Assist pattern or array115A comprises sub-resolution assist phase regions (regions) R′ arranged immediately adjacent at least a portion of perimeter115P, such as at one or more edges115E. Here, sub-resolution means that the assist phase regions R′, when imaged by a photolithographic imaging system having a resolution limit, do not result in the formation of what would normally be considered a suitable or usable feature, such as, for example, a resist feature like a photoresist post72′. Each assist phase region R′ has a phase opposite that of the adjacent phase regions R of checkerboard array115C. Assist phase regions R′ define a perimeter118for assist pattern115A.

In one example, determining whether a given assist phase region R′ is sub-resolution can be determined by actually photolithographically imaging phase-shift mask112in a photosensitive medium such as a photoresist layer and seeing if any of the assist phase regions formed in the photoresist layer could be considered a suitable or usable feature based on what the phase-shift mask is being used to print.

In an example, at least some of the assist phase regions R′ have one dimension that is the same as the adjacent phase region R in checkerboard array115C, and another dimension that is substantially smaller (e.g., e.g., ½ the size or smaller) than that of the adjacent phase region R.

In an example, surface114outside of phase-shift mask pattern115(i.e., immediately adjacent perimeter118of assist phase regions R′) includes opaque layer117so that the exposure field EF has sharp edges (seeFIG. 11A).

In an example, assist phase regions R′ are located outside of the stepping area of phase-shift mask pattern115, i.e., only checkerboard array115C falls within the area that is actually imaged within the exposure field EF. When exposure fields EF are stitched, the unprinted areas associated with assist phase regions R′ overlap with the pattern in the next exposure field EF.

FIG. 11Cis similar toFIG. 11Bbut shows another example of the phase-mask pattern115but wherein the assist phase regions configuration further includes one or more assist phase region R′ respectively disposed at one or more of the corners. The corner assist phase region R′ shown inFIG. 11Bhas a π phase shift to maintain the checkerboard array pattern. Also, in an example, the corner assist phase region R′ is smaller than the non-corner phase regions arranged adjacent checkerboard array edges115E. Thus, in an example embodiment, assist phase regions R′ are configured to surround (e.g., immediately surround) checkerboard array perimeter115P. In another example embodiment, assist phase regions R′ are configured to at least partially surround checkerboard array perimeter115P.

Exposure fields EF can be stitched together to form a large array70′ of photoresist posts72′. This is because forming an LED includes forming an array70of posts72in substrate20as the first patterned layer in the LED process. Using a photolithographic system100that steps between exposure fields EF, it is possible to construct a process that incorporates scribe lines. However, this is not how the traditional LED fabrication process was developed using full wafer aligners. Presently, in LED manufacturing, there are no scribe areas (also called scribe lines)137anywhere on the wafer (substrate20). Rather, substantially the entire wafer is formed to include an array70′ of posts72′ without any substantial breaks, i.e., a substantially continuous array70′ and thus a substantially continuous array70.

This configuration of posts72is possible because the subsequent layers used in forming the LED do not need to align to array70. This allows for wafers with array70to be generic in that they can be used for any LED device regardless of die size. Since the array70so formed is not device specific, it can be formed by the wafer supplier instead of the device manufacturer. Since only one phase-mask112is needed for each type of array70(e.g., each post size for posts72), the cost of phase-shift mask112can be amortized over all devices that use the same array70.

In phase-shift mask112, checkerboard array115C effectively serves as an infinite array with respect to the interior portion of the exposure field EF. In practice, for example, phase-shift mask112is used to form thousands of LEDs, wherein each LED includes the formation of thousands of posts72(seeFIG. 1), so that there are many thousands of phase-shift regions R and R′ making up checkerboard array115C and assist pattern115A. However, when pattern115only includes checkerboard array115C so that its perimeter115P terminates at the boundary of the corresponding lithography exposure field, the features at the perimeter of the exposure field are distorted due to the lack of phase interference beyond the edge.

FIG. 12Aschematically illustrates the formation of a (negative) array70′ of photoresist posts72′ using a phase-shift mask112wherein pattern115only includes checkerboard array115C. Array70′ includes perimeter posts72′P formed at the perimeter of the exposure fields and interior or central posts72′C formed inside of the perimeter posts. Note that the perimeter posts72′P are distorted relative to the interior posts72′C. The perimeter posts72′P and the interior or central posts72′C are shows separated by a dashed line for ease of illustration to distinguish between these two types of posts.

FIG. 12Bis similar toFIG. 12Abut with phase-shift mask112further including assist phase regions R′ with the perimeter-surrounding configuration shown inFIG. 11B. The resulting array70′ of photoresist posts72′ includes perimeter posts72′P that have substantially the same shape as interior posts72′C by virtue of the assist phase regions R′. This configuration for phase-shift mask112reduces (and can be used to minimize) the exposure of adjacent photoresist areas, enabling subsequently exposed photoresist patterns of adjacent exposure fields to be stitched together without a gap.

FIG. 13is a cross-sectional view of a 2D modeled array70′ of (positive) photoresist posts72′ formed in a photoresist layer135as based on data generated using the PROLITH® photolithographic imaging simulation software, available from KLA-Tencor, Milpitas, Calif. The phase-shift mask112used in the photolithographic exposure simulation included a few 1.6 micron square phase-shift regions R arranged in a checkerboard (alternating) pattern with 0.4 micron wide assist phase regions R′ on only the left side of the phase-shift mask. The simulated photolithographic exposure used an i-line wavelength of 365 nm with a projection lens numerical aperture (NA) of 0.28 and a partial coherence factor σ=0.57, which gives the photolithographic projector a feature resolution limit of (0.7)λ/NA˜1 micron.

The shape of wall W72′ of the left-most resist wall W135L of photoresist layer135closely resembles that of the left-most post72′, which in turn closely resembles the adjacent post (denoted72′C for center or interior post), indicating good feature formation all the way to the left edge of the exposure field. On the other hand, the resist wall W135R of photoresist layer135associated with the unassisted right edge of phase-shift mask112is distorted relative to the other photoresist walls, indicating less-than-optimal feature formation on the right edge of the exposure field.

The number N of phase-shift regions R and the number N′ of assist phase regions R′ on a given phase-shift mask112depends on the size of exposure field EF and pitch of posts72in array70. For an exposure field dimension SEFand a pitch P72of posts72, the number N of phase-shift regions R is given by N=(SEF/P72)2. By way of example, for SEF=10 mm and P72=0.0016 mm, N=(10/0.0016)2=3.9×107. The number of assist phase regions N arranged at all four edges of the phase-shift mask is given by N′=4*(10/0.0016)=2.5×104. This number increases by 4 if assist phase regions are added at the four corners checkerboard array115C.

Example Method for Forming the Roughened Substrate Surface

Thus, an aspect of the disclosure includes a method of forming a roughed substrate surface22having an array70of posts72in the course of forming LEDs10using photolithographic imaging and photolithographic processing techniques using phase-shift mask112with assist phase regions R′ as described above. An example method of forming array70of posts72is now described with reference toFIG. 6and also toFIGS. 14A through 14E.

With reference first toFIG. 14A, the method includes providing a substrate20having photoresist layer135atop substrate surface22. The method then includes arranging the coated substrate20on substrate stage130of photolithography system100(FIG. 6). The phase-shift mask112as described above (see, e.g.,FIGS. 11A through 11C) that includes checkerboard array115C and assist pattern115A is arranged at mask stage110of photolithography system100. The method then includes operating photolithography system100to perform photolithographic imaging whereby phase-shift mask112is exposed with illumination light108, and the resultant diffracted light121from phase-shift mask pattern115is captured and imaged by projection lens120to expose photoresist layer135over an exposure field EF to form an array70′ of photoresist posts72′ over substantially the entire exposure field. This is illustrated inFIG. 14B.

With reference toFIG. 7, note that many LED regions10′ are formed in photoresist layer135for each exposure field EF. Thus, in an example where phase-shift mask pattern115has an area of 15 mm×30 mm, and where each LED10is 1 mm square, there are 450 LED regions10′ associated with each exposure field EF, which is also 15 mm×30 mm when photolithography system100operates at unit magnification. Inset B inFIG. 7shows an array10A′ of LED regions10′ associated with the formation of LEDs10. The LED regions10′ are separated by scribe areas11. However, array70′ of photoresist posts72′ is formed everywhere over exposure field EF (seeFIG. 7, Inset C), including in scribe areas137shown in Inset A. Field-to-field stitching may be required at the exposure field borders. Since phase-shift mask112is configured to mitigate the distortion of features formed at the perimeter of exposure field EF, this facilitates the stitching process and obviates the need to have a portion of the exposure field (e.g., the exposure field edges) reside in scribe areas137.

With reference now toFIG. 14C, the exposed photoresist layer135ofFIG. 14Bis processed to remove unexposed resist (negative photoresist) or to remove exposed resist (positive photoresist) to leave array70′ of photoresist posts72′ or its complementary feature, a hole. This photoresist array70′ is then etched using standard photolithographic etching techniques as indicated by arrows200to transfer the photoresist pattern into the substrate20, thereby forming array70of posts72in substrate surface22, as shown inFIG. 14D.

FIG. 14Eis similar toFIG. 14Dand illustrates an example where posts72in array70have a non-cylindrical shape, i.e., the pyramidal shape as shown. Such shapes for posts72formed in substrate surface22may be obtained from non-pyramidal photoresist posts72′ using the aforementioned etching techniques.

Now that substrate20is configured with a plurality of LED regions10′ having a suitably post-roughened substrate surface22, LEDs10are fabricated using standard photolithography-based LED fabrication techniques. This includes, for example, forming p-n multilayer structure30atop the roughened substrate surface22and then adding p-contact90pand n-contact90nto layers50and40, respectively, as shown inFIG. 1.