Probe assembly

A probe assembly, adapted to test high-speed signal transmission lines of printed circuit boards, includes two pogo pins for providing high-frequency differential test signals, and both sides of the pogo pin include no metal layer (grounding layer). Experiments have found that when the two pogo pins test a to-be-tested object, the test signal will be coupled to the metal layers on both sides of the pogo pins to generate a radiation resonance, resulting in a loss of the test signal on a specific frequency band, and further reducing the effective bandwidth of the probe assembly. The metal layers on both sides of the pogo pins of the probe assembly are reduced, so that the foregoing radiation resonance phenomenon can be avoided.

CROSS-REFERENCE TO RELATED APPLICATION

This non-provisional application claims priority under 35 U.S.C. § 119(a) to Patent Application No. 109131000 in Taiwan, R.O.C. on Sep. 9, 2020, the entire contents of which are hereby incorporated by reference.

BACKGROUND

Technical Field

The present invention relates to a probe assembly, and in particular, to a probe assembly applied to perform a high-speed differential signal test.

Related Art

A conventional probe structure for measuring a differential signal includes multiple probes disposed on a printed circuit board, and probe arrangement manners of the probe structure are GSS, SSG, SGS, GSSG and GSGSG, where G represents a grounding probe, and S represents a signal probe. Accompanied with more compact and diversified wiring and layout design of a printed circuit board, a form in which test contacts of a to-be-tested object include no grounding point may come out in the future, resulting in that the foregoing probe structure including grounding probes cannot be used. In other words, there is no design scheme for the probe based on an SS architecture in the prior art.

SUMMARY

In view of this, the present invention provides a probe assembly, including a dielectric layer, a first signal line, a second signal line, a first pogo pin, a second pogo pin, a first upper grounding layer, a second upper grounding layer, and a lower grounding layer.

The dielectric layer includes an upper surface, a lower surface, a first side, a second side, and a third side, where the first side and the second side are opposite to each other, and the third side is located between the first side and the second side. The upper surface of the dielectric layer includes a first upper blank region, a second upper blank region, a first upper grounding region, and a second upper grounding region, and the lower surface of the dielectric layer includes a first lower blank region and a second lower blank region. The first signal line is disposed on the upper surface of the dielectric layer, where the first signal line includes a first head section and a first tail section, one end of the first head section is connected to the first tail section, and an other end of the first head section points to the third side. The first upper blank region and the first lower blank region are located between the first head section and the first side. The first upper grounding region is located between the first tail section and the first side. The second signal line is disposed on the upper surface of the dielectric layer and is spaced apart from the first signal line. The second signal line includes a second head section and a second tail section, one end of the second head section is connected to the second tail section, and an other end of the second head section points to the third side. The second upper blank region and the second lower blank region are located between the second head section and the second side. The second upper grounding region is located between the second tail section and the second side. The first pogo pin is disposed at the first head section. The second pogo pin is disposed at the second head section. The first upper grounding layer is disposed in the first upper grounding region, the second upper grounding layer is disposed in the second upper grounding region, and the lower grounding layer is disposed on the lower surface of the dielectric layer without passing through the first lower blank region and the second lower blank region.

The present invention further provides a probe assembly, including a dielectric layer, a first signal line, a second signal line, a first pogo pin, a second pogo pin, an upper grounding layer, and a lower grounding layer. The dielectric layer includes a body portion and a protruding portion, where the protruding portion protrudes from one side of the body portion in a first direction toward a direction away from the side. The first signal line is disposed on the upper surface of the dielectric layer, and the first signal line includes a first head section and a first tail section, where the first head section is disposed at the protruding portion, the first tail section is disposed at the body portion. One end of the first head section is connected to the first tail section, and an other end of the first head section points to an end surface of the protruding portion. The second signal line is disposed on the upper surface of the dielectric layer and is spaced apart from the first signal line. The second signal line includes a second head section and a second tail section, where the second head section is disposed at the protruding portion of the dielectric layer, and the second tail section is disposed at the body portion of the dielectric layer. One end of the second head section is connected to the second tail section, and an other end of the second head section points to an end surface of the protruding portion. The first pogo pin is disposed at the first head section. The second pogo pin is disposed at the second head section. The upper grounding layer is disposed on the upper surface of the body portion of the dielectric layer, and the lower grounding layer is disposed on the lower surface of the body portion and the lower surface of the protruding portion of the dielectric layer.

One of the features of the present invention is including no grounding probe, thereby being applied to a to-be-tested device of which test contacts include no grounding point. Another feature of the present invention is that the grounding layers (metal layers) on both sides of the pogo pin are reduced, so that during the test, a test signal will not be coupled to the grounding layers on both sides and generate a radiation resonance to reduce an effective bandwidth of the probe assembly.

DETAILED DESCRIPTION

In the specification and the scope of the patent application of the present invention, “up” or “down” is merely used to illustrate an orientation shown in the drawings, and do not limit an actual orientation.

A relative size and a thickness of each assembly in the drawings are merely an example, and do not limit an actual relative size relationship of each assembly.

FIG.1andFIG.2are respectively a schematic perspective view (I) and a schematic perspective view (II) according to a first embodiment of the present invention, which illustrate a probe assembly100. The probe assembly100includes a dielectric layer11, a first signal line12, a second signal line13, a first pogo pin123, a second pogo pin133, a first upper grounding layer141, a second upper grounding layer142, and a lower grounding layer16. The probe assembly100is applicable to perform a differential signal test on high-speed signal transmission lines of a printed circuit board, and is particularly applicable to a printed circuit board of which test contacts include no grounding point.

The dielectric layer11includes an upper surface111, a lower surface112, a first side113, a second side114, and a third side115, where the first side113and the second side114are opposite to each other, the third side115is located between the first side113and the second side114. The upper surface111of the dielectric layer11includes a first upper blank region111A, a second upper blank region111B, a first upper grounding region111G1, and a second upper grounding region111G2. The lower surface112of the dielectric layer11includes a first lower blank region112A and a second lower blank region112B.

The first signal line12is disposed on the upper surface111of the dielectric layer11, where the first signal line12includes a first head section121and a first tail section122. One end of the first head section121is connected to the first tail section122, and an other end of the first head section121points to the third side115. The first upper blank region111A and the first lower blank region112A are located between the first head section121and the first side113. Further, the first lower blank region112A is disposed on the lower surface112and corresponds to the first upper blank region111A of the upper surface111, that is, the first lower blank region112A is disposed on the lower surface112and corresponds to a position between the first head section121and the first side113of the upper surface111. The first upper grounding region111G1is located between the first tail section122and the first side113of the dielectric layer11, and the first upper grounding layer141is disposed in the first upper grounding region111G1.

The second signal line13is disposed on the upper surface111of the dielectric layer11and is spaced apart from the first signal line12. The second signal line13includes a second head section131and a second tail section132, where one end of the second head section131is connected to the second tail section132, and an other end of the second head section131points to the third side115. The second upper blank region111B and the second lower blank region112B are located between the second head section131and the second side114. Further, the second lower blank region112B is disposed on the lower surface112and corresponds to the second upper blank region111B of the upper surface111, that is, the second lower blank region112B is disposed on the lower surface112and corresponds to a position between the second head section131and the second side114of the upper surface111. The second upper grounding region111G2is located between the second tail section132and the second side114, and the second upper grounding layer142is disposed in the second upper grounding region111G2.

The first pogo pin123is disposed at the first head section121of the first signal line12. In some embodiments, the first pogo pin123is disposed at the first head section121of the first signal line12in a manner of soldering and welding. The first pogo pin123includes a pin body portion123B and a telescopic portion123T, where the telescopic portion123T is located at one end of the pin body portion123B, and the telescopic portion123T protrudes from the third side115of the dielectric layer11in a free state. The second pogo pin133is disposed at the second head section131of the second signal line13. In some embodiments, the second pogo pin133is disposed at the second head section131of the second signal line13in the manner of soldering and welding. The second pogo pin133includes a pin body portion133B and a telescopic portion133T, where the telescopic portion133T is located at one end of the pin body portion133B, and the telescopic portion133T protrudes from the third side115of the dielectric layer11in the free state. During the test, the telescopic portion123T of the first pogo pin123and the telescopic portion133T of the second pogo pin133respectively contact two differential signal test contacts of a to-be-tested device, in which way a differential test signal is transmitted to the to-be-tested device to test the to-be-tested device. In some embodiments, the telescopic portion123T and the telescopic portion133T protrude from the third side115of the dielectric layer11in the free state. However, the telescopic portion123T is located at one end of the pin body portion123B, and the telescopic portion133T is located at a position where the pin body portion133B is disposed, which can be trimmed flush with the third side115of the dielectric layer11, or can be disposed on the upper surface111of the dielectric layer11without being trimmed flush with the third side115, or can be disposed outside of the third side115and protruding from the third side115, which is not limited thereto. That is, the telescopic portion123T is located at one end of the pin body portion123B, and the telescopic portion133T is located at a position where the disposed position of the pin body portion133B is opposite to the third side115, where one end of the pin body portion123B and the pin body portion133B are trimmed flush with the third side115, or positioned at one end of the third side115that is toward or away from the upper surface111of the dielectric layer11, which is not limited thereto.

The lower grounding layer16is disposed on the lower surface112of the dielectric layer11and may cover an area outside of the first lower blank region112A and the second lower blank region112B of the lower surface112. It should be particularly noted herein that the lower grounding layer16may cover lower portions of the pin body portion123B of the first pogo pin123and the pin body portion133B of the second pogo pin133, that is, may cover a portion between the first lower blank region112A and the second lower blank region112B. In this way, impedance matching of the entire first signal line12and the second signal line13can extend almost to the point that contacts with the to-be-tested device.

In this embodiment, the first upper grounding layer141, the second upper grounding layer142, and the lower grounding layer16do not cover the pin body portion123B of the first pogo pin123and both sides of the pin body portion133B of the second pogo pin133in a length direction. Therefore, when the probe assembly100of this embodiment is used to perform a differential signal test on the printed circuit board, the test signal will not be coupled to the grounding layers on both sides of the first pogo pin123and the second pogo pin133, so that the generation of a radiation resonance is effectively avoided.

In some embodiments, the first upper grounding layer141, the second upper grounding layer142, and the lower grounding layer16are commonly-grounded. In some embodiments, the upper surface111of the dielectric layer11further includes a third upper grounding region111G3that is located between the first tail section122and the second tail section132. The probe assembly100further includes a third upper grounding layer143that is disposed in the third upper grounding region111G3, and the first upper grounding layer141, the second upper grounding layer142, the third upper grounding layer143, and the lower grounding layer16are commonly-grounded.

In some embodiments, the dielectric layer11includes a plurality of conductive vias119, where at least one of the conductive vias119is electrically connected to the first upper grounding layer141and the lower grounding layer16, at least one of the conductive vias119is electrically connected to the second upper grounding layer142and the lower grounding layer16, and at least one of the conductive vias119is electrically connected to the third upper grounding layer143and the lower grounding layer16. In this way, the first upper grounding layer141, the second upper grounding layer142, the third upper grounding layer143, and the lower grounding layer16can be commonly-grounded through the conductive via119.

In some embodiments, the first head section121extends in a first direction (for example, an x-axis direction in the figure) and has a length L1. The first upper blank region111A has a width W1 in the first direction (the x-axis direction), and the first lower blank region112A has a width W2 in the first direction (the x-axis direction). In some embodiments, the width W1 is substantially equal to the width W2, and the width W1 and the width W2 are substantially equal to the length L1. In addition, in some embodiments, the second head section131extends in the first direction (the x-axis direction) and has a length L2. The second upper blank region111B has a width W3 in the first direction (the x-axis direction), and the second lower blank region112B has a width W4 in the first direction (the x-axis direction). In some embodiments, the width W3 is substantially equal to the width W4, and the width W3 and the width W4 are substantially equal to the length L2.

In some embodiments, a projection of the first upper blank region111A in a normal direction of the upper surface111fully overlaps with a projection of the first lower blank region112A in a normal direction of the lower surface112, and a projection of the second upper blank region111B in the normal direction of the upper surface111also overlaps with a projection of the second lower blank region112B in the normal direction of the lower surface112. It should be particularly noted that there is a degree of machining error in all machining procedures, and due to the machining error, the projection of the first upper blank region111A in the normal direction of the upper surface111may be slight-different from the projection of the first lower blank region112A in the normal direction of the lower surface112. The foregoing difference is merely due to the machining error rather than different designs, and therefore the projections are regarded as being overlapped for a person with ordinary knowledge in the art. Similarly, the projection of the second upper blank region111B in the normal direction of the upper surface111likewise overlaps with the projection of the second lower blank region112B in the normal direction of the lower surface112.

FIG.3andFIG.4are respectively a schematic perspective view (I) and a schematic perspective view (II) according to a second embodiment of the present invention, which illustrate a probe assembly200. In this embodiment, a length of the pin body portion123B of the first pogo pin123is equal to the length L1 of the first head section121in the x-axis direction, but the width W1 of the first upper blank region111A in the x-axis direction and the width W2 of the first lower blank region112A in the x-axis direction are less than the length L1. In addition, the length of the pin body portion133B of the second pogo pin133is equal to the length L2 of the second head section131in the x-axis direction, but the width W3 of the second upper blank region111B in the x-axis direction and the width W4 of the second lower blank region112B in the x-axis direction are less than the length L2.FIG.9toFIG.11are respectively curve diagrams of an insertion loss relative to a test frequency when W1=W2=W3=W4=0 mm, W1=W2=W3=W4=0.5 mm, and W1=W2=W3=W4=0.8 mm. As shown inFIG.9, when W1=W2=W3=W4=0 mm, which is equivalent to that both sides of the pin body portion123B of the first pogo pin123and the pin body portion133B of the second pogo pin133are grounding layers, at this time there will be an energy loss due to the foregoing radiation resonance near a specific frequency (15 GHz shown in the figure). As shown inFIG.10, when W1=W2=W3=W4=0.5 mm, the grounding layers on both sides of the pin body portion123B of the first pogo pin123and the pin body portion133B of the second pogo pin133are reduced, and the radiation resonance phenomenon is eliminated, so that the energy loss near the specific frequency is greatly reduced. Further, as shown inFIG.11, when W1, W2, W3, and W4 are further increased from 0.5 mm to 0.8 mm, the grounding layers on both sides of the pin body portion123B of the first pogo pin123and the pin body portion133B of the second pogo pin133are further reduced, at this time, the influence of the radiation resonance approaches to zero, and there is no obvious energy loss found in all test frequencies. Similarly, compared with the foregoing form in which W1=W2=W3=W4=0.8 mm, the grounding layers on both sides of the first pogo pin123and the second pogo pin133of the probe assembly100in the first embodiment are further reduced, and the influence of the radiation resonance also approaches to zero, so that there is no obvious energy loss in all test frequencies in the curve diagram of the insertion loss of the probe assembly100relative to the test frequency in the first embodiment, which is alternatively shown inFIG.11. It should be particularly noted that, in this embodiment, merely the influence of the widths W1, W2, W3, and W4 of the first upper blank region111A, the first lower blank region112A, the second upper blank region111B, and the second lower blank region112B on the radiation resonance should be particularly noted, and there is no need to particularly consider the length of the pin body portion123B of the first pogo pin123and the pin body portion133B of the second pogo pin133.

It should be particularly noted herein that, W1=W2=W3=W4 in the foregoing embodiment is merely a specific instance, and W1, W2, W3, and W4 may be different from each other. The effect of avoiding the radiation resonance can be achieved as long as W1≥0.8 mm, W2≥0.8 mm, W3≥0.8 mm, and W4≥0.8 mm.

FIG.5andFIG.6are respectively a schematic perspective view (I) and a schematic perspective view (II) according to a third embodiment of the present invention, which illustrate a probe assembly300. The probe assembly300includes a dielectric layer21, a first signal line22, a second signal line23, a first pogo pin223, a second pogo pin233, an upper grounding layer24, and lower grounding layer26. The probe assembly300is similarly applied to perform a differential signal test on high-speed signal transmission lines of a printed circuit board, and is particularly applied to a printed circuit board of which test contacts include no grounding point.

As shown in the figure, the dielectric layer21includes an upper surface211, a lower surface212, and the dielectric layer21may be divided into a body portion21A and a protruding portion21B. The body portion21A includes a side215. The protruding portion21B extends and protrudes from the side215of the body portion21A in the first direction (for example, the x-axis direction in the figure) toward the direction away from the side215. In some embodiments, the protruding portion21B extends and protrudes from a center of the side215of the body portion21A in the first direction (the x-axis direction) toward the direction away from the side215.

The first signal line22is disposed on the upper surface211of the dielectric layer21, where the first signal line22includes a first head section221and a first tail section222. The first head section221is disposed at the protruding portion21B of the dielectric layer21, and the first tail section222is disposed at the body portion21A of the dielectric layer21. One end of the first head section221is connected to the first tail section222, and an other end of the first head section221points to an end surface21B1of the protruding portion21B.

The second signal line23is disposed on the upper surface211of the dielectric layer21and is spaced apart from the first signal line22. The second signal line23includes a second head section231and a second tail section232, where the second head section231is disposed at the protruding portion21B of the dielectric layer21, and the second tail section232is disposed at the body portion21A of the dielectric layer21. One end of the second head section231is connected to the second tail section232, and an other end of the second head section231points to the end surface21B1of the protruding portion21B.

The first pogo pin223is disposed at the first head section221of the first signal line22. The first pogo pin223includes a pin body portion223B and a telescopic portion223T. The telescopic portion223T is located at one end of the pin body portion223B, and the telescopic portion223T protrudes from the end surface21B1of the protruding portion21B of the dielectric layer21in the free state. The second pogo pin233is disposed at the second head section231of the second signal line23. The second pogo pin233includes a pin body portion233B and a telescopic portion233T. The telescopic portion233T is located at one end of the pin body portion233B, and the telescopic portion233T protrudes from the end surface21B1of the protruding portion21B of the dielectric layer21in the free state.

The upper grounding layer24is disposed at the upper surface of the body portion21A of the dielectric layer21, and the lower grounding layer26is disposed on the lower surface of the body portion21A and the lower surface of the protruding portion21B of the dielectric layer21. In this embodiment, impedance matching of the entire first signal line22and the second signal line23can extend almost to the point that contacts with the to-be-tested device.

As shown inFIG.5, the probe assembly300includes three upper grounding layers24. The three upper grounding layers24are respectively located between the first tail section222of the first signal line22and an edge of the dielectric layer21that is adjacent to the first signal line22, between the first tail section222of the first signal line22and the second tail section232of the second signal line23, and between the second tail section232of the second signal line23and an edge of the dielectric layer21that is adjacent to the second signal line23. In some embodiments, the upper grounding layer24and the lower grounding layer26are commonly-grounded. In some embodiments, the dielectric layer21further includes at least one conductive via219, and the conductive via219is electrically connected to the upper grounding layer24and the lower grounding layer26. In this way, the upper grounding layer24and the lower grounding layer26can be commonly-grounded through the conductive via219.

In some embodiments, the pin body portion223B of the first pogo pin223and the pin body portion233B of the second pogo pin233respectively have a length L3 and a length L4 in the first direction (the x-axis direction). The upper grounding layer24includes a first edge241and a second edge242. The first edge241and the second edge242are respectively located on both sides of the protruding portion21B of the dielectric layer21and are adjacent to the side215of the body portion21A of the dielectric layer21. The lower grounding layer26includes a third edge261and a fourth edge262. The third edge261and the fourth edge262are respectively located on both sides of the protruding portion21B of the dielectric layer21and are adjacent to the side215of the body portion21A of the dielectric layer21. There is a first distance D1 in the first direction (the x-axis direction) between the first edge241and the end surface21B1of the protruding portion21B, there is a second distance D2 in the first direction (the x-axis direction) between the second edge242and the end surface21B1of the protruding portion21B, there is a third distance D3 in the first direction (the x-axis direction) between the third edge261and the end surface21B1of the protruding portion21B, and there is a fourth distance D4 in the first direction (the x-axis direction) between the fourth edge262and the end surface21B1of the protruding portion21B, where D1=D2=D3=D4. In some embodiments, L3=L4=D1=D2=D3=D4.

In some embodiments, the body portion21A and the protruding portion21B are formed by machining a single piece of the dielectric layer. For example, two corners of a same side of a rectangular dielectric layer are L-shaped cut. After the two corners are cut, the dielectric layer portion located between the two cut portions is the protruding portion21B, and the dielectric layer portion outside of the protruding portion21B is the body portion21A.

FIG.7andFIG.8are respectively a schematic perspective view (I) and a schematic perspective view (II) according to a fourth embodiment of the present invention, which illustrate a probe assembly400. The main difference between this embodiment and the third embodiment lies in that D1, D2, D3, and D4 are less than the length L3 of the pin body portion223B of the first pogo pin223and/or the length L4 of the pin body portion233B of the second pogo pin233.FIG.9toFIG.11are respectively curve diagrams of the insertion loss relative to the test frequency when D1=D2=D3=D4=0 mm, D1=D2=D3=D4=0.5 mm, and D1=D2=D3=D4=0.8 mm. As shown inFIG.9, when D1=D2=D3=D4=0 mm, both sides of the pin body portion223B of the first pogo pin223and the pin body portion233B of the second pogo pin233are grounding layers, at this time there will be an energy loss due to the foregoing radiation resonance near the specific frequency (15 GHz shown in the figure). As shown inFIG.10, when D1=D2=D3=D4=0.5 mm, the grounding layers on both sides of the pin body portion223B of the first pogo pin223and the pin body portion233B of the second pogo pin233are reduced, and the radiation resonance phenomenon is eliminated, so that the energy loss near the specific frequency greatly is reduced. Further, as shown inFIG.11, when D1, D2, D3, and D4 are further increased from 0.5 mm to 0.8 mm, the grounding layers on both sides of the pin body portion223B of the first pogo pin223and the pin body portion233B of the second pogo pin233are further reduced, at this time, the influence of the radiation resonance approaches to zero, and there is no obvious energy loss in all test frequencies. Similarly, compared with the foregoing form in which D1=D2=D3=D4=0.8 mm, the grounding layers on both sides of the pin body portion223B of the first pogo pin223and the pin body portion233B of the second pogo pin233of the probe assembly300in the third embodiment are further reduced, and the influence of the radiation resonance alternatively approaches to zero, so that there is no obvious energy loss found in all test frequencies in the curve diagram of the insertion loss of the probe assembly300in the third embodiment relative to the test frequency, which is alternatively shown inFIG.11. It should be particularly noted that, in this embodiment, merely a value of D1=D2=D3=D4 should be noted, and there is no need to particularly consider the length of the pin body portion223B of the first pogo pin223and the pin body portion233B of the second pogo pin233.

It should be particularly noted herein that, D1=D2=D3=D4 in the foregoing embodiment is merely a specific instance, D1, D2, D3, and D4 may be different from each other, and the effect of avoiding the radiation resonance can be achieved as long as D1≥0.8 mm, D2≥0.8 mm, D3≥0.8 mm, and D4≥0.8 mm. In addition, a distance of the dielectric layer21in the first direction (the x-axis direction) between the side215of the body portion21A and the end surface21B1of the protruding portion21B is not limited to being equal to D1, D2, D3, and D4. In some embodiments, the distance between the side215and the end surface21B1may be less than D1, D2, D3, and D4, and it still can be considered that the first edge241and the second edge242are adjacent to the side215of the body portion21A of the dielectric layer21, and the third edge261and the fourth edge262are adjacent to the side215of the body portion21A of the dielectric layer21.

Referring toFIG.5andFIG.7, in some embodiments, considering the convenience of machining and mechanical strength of the protruding portion21B, a local area21B7is reserved between the pin body portion223B of the first pogo pin223and a side edge of the protruding portion21B, and a local area21B9is further reserved between the pin body portion233B of the second pogo pin233and the side edge of the protruding portion21B. In some embodiments, provided that the machining accuracy permits and the mechanical strength meets the actual application requirements, the local area21B7and the local area21B9may not be reserved.

In some embodiments, the upper grounding layer and the lower grounding layer can be respectively formed on two surfaces of a rectangular dielectric layer, and the first signal line22, the second signal line23, the first pogo pin223, and the second pogo pin233are formed on one surface of the dielectric layer, and then the two corners of a same side of the dielectric layer can be L-shaped cut to remove the dielectric layer and the grounding layer at the two corners, so that the probe assembly200can be formed.

Again, it should be emphasized herein that the probe assembly of the present invention is completely a new design, that is, the probe assembly includes no grounding probe, so that the probe assembly is applicable for a to-be-tested device of which test contacts include no grounding point. In addition, the grounding layers (metal layer) on both sides of the first pogo pin and the second pogo pin that are used to provide a differential signal in the present invention is appropriately reduced, so that during the test, the test signal will not be coupled to the grounding layers on both sides and generate the radiation resonance. It should be particularly noted that the grounding layers (metal layer) on both sides of the first pogo pin and the second pogo pin only need to be appropriately reduced, so that the influence of the radiation resonance can be avoided, and there is no correlation between the radiation resonance and the length of the first pogo pin and the second pogo pin.