System for determining time between events using a voltage ramp generator

A system for determining the time between the receipt of two different sils, includes a voltage ramp generator which generates a time dependent voltage signal upon receipt of a timing pulse at a time T.sub.1, and provides the instantaneous value of the voltage signal when the voltage ramp generator receives an input signal having a predetermined threshold value at time T.sub.2. A data processor coupled to receive the voltage signal, generates the timing pulse, and determines a time difference .DELTA.T from the voltage signal, where .DELTA.T=T.sub.2 -T.sub.1.

BACKGROUND OF THE INVENTION 
The present invention generally relates to the field of signal processing, 
and more particularly, to a system for determining the time between the 
receipt of two different signals using a voltage ramp generator. 
In the acquisition of particular parameters, for example speed, position, 
distance or the characteristics of other time dependent functions, a 
direct measurement of the parameter is often times not feasible. 
Conventional methods of translating high resolution travel time 
information require a wide bandwidth and/or high power systems to maintain 
the required resolution for the time of signal detection. The bandwidth 
required for a given time resolution t, is 1/t, where t represents time. 
For example, one millisecond of time resolution generally requires 
approximately 1 KHz of bandwidth. There are many applications, however, in 
which the available bandwidth is not sufficient to transfer these signals, 
without substantial additional complexity and processing in the receiver. 
Therefore, a need exists for a system capable of determining the time 
between events that is more bandwidth efficient than conventional systems. 
SUMMARY OF THE INVENTION 
The invention provides a method and system for inferring time dependent 
functions by measuring a time difference, that is, the time between the 
event of interest and some known reference time. The time difference is 
translated into an analog voltage which is easily acquired by existing 
equipment. The system includes a voltage ramp generator which generates a 
time dependent voltage signal upon receipt of a timing pulse at a time 
T.sub.1, and provides the instantaneous value of the voltage signal when 
the voltage ramp generator receives an input signal having a predetermined 
threshold value at time T.sub.2. A data processor generates the timing 
pulse at T.sub.1 and is coupled to receive the instantaneous value of the 
voltage signal. T.sub.1 and the voltage signal allow the processor to 
compute .DELTA.T=T.sub.2 -T.sub.1. In a preferred embodiment, the time 
dependent voltage signal increases in a stair-step, incremental manner, 
generally referred to as a "ramp" voltage. 
Another embodiment of the system provides greater time resolution by 
generating two stair-step ramp voltage. This system includes a stair-step 
voltage ramp generator which initiates two time dependent voltage signals 
upon receipt of a timing pulse at a time T.sub.1. The first stair-step 
ramp voltage provides a coarse time resolution; the second stair-step ramp 
voltage provides a fine time resolution used to interpolate between 
stair-step transitions of the first stair-step ramp voltage. The ramp 
generator provides a voltage signal representing an instantaneous value of 
the first ramp voltage and a voltage signal representing the instantaneous 
value of the second ramp voltage when the voltage ramp generator receives 
an input signal having a predetermined threshold value at time T.sub.2. A 
data processor coupled to receive the voltage signals, generates the 
initializing timing pulse, and employs both voltage signals to determine a 
time difference .DELTA.T, where .DELTA.T=T.sub.2 -T.sub.1. Arrival of a 
series of input signals to the voltage ramp generator, having a 
predetermined threshold value would be received and transmitted the same 
way. The use of two different voltage ramp signals provides greater time 
resolution than would use of only one voltage ramp signal. 
An important advantage of the present invention is its simplicity, 
robustness, bandwidth efficiency, and low power requirements. The 
invention provides a low bandwidth system which is able to generate 
information that can be used to determine the time between events that is 
more bandwidth efficient than are prior art systems. These and other 
advantages of the present invention will become more apparent upon further 
examination of the following specification, claims, and drawings.

DESCRIPTION OF THE PREFERRED EMBODIMENT 
The present invention provides a system 10 for determining the time between 
the receipt of two different signals. The invention may be employed to 
generate a low bandwidth signal that can be used to determine the time 
between the receipt of two different signals compared to the bandwidth 
requirements of a system that determines elapsed time by conventional 
detection methods. A conventional detector requires a bandwidth of 1/t, 
whereas, the present invention requires just one (FIG. 1) or two (FIG. 2) 
DC voltages to provide excellent time difference resolution. 
Referring now to FIG. 1, there is shown system 10 comprising a ramp 
generator 32 which commences to internally generate a time dependent 
voltage ramp signal, V.sub.C, in response to receiving each one of a 
periodic series of timing pulses 34 from a processor 36. The purpose of 
system 10 is to determine the elapsed time, .DELTA.T, between the receipt 
by the ramp generator 32 of an input signal 30 having a predetermined 
threshold value at time T.sub.2, and the time, T.sub.1, of receipt of the 
immediately preceding timing pulse 34. Therefore, the relation between 
.DELTA.T and the instantaneous value of V.sub.C is a monotone 
nondecreasing function. 
Still referring to FIG. 1, the ramp generator 32 may increase voltage 
V.sub.C in stair step, discrete increments in synchronism with synchronous 
(synch) pulses 35, generated by processor 36. The output signal 29 
generated by ramp generator 32 is normally at some predetermined level, 
say for example, 0.0 volts, when the input signal 30 is below a 
predetermined threshold value. However, when the value of input signal 30 
meets or exceeds the threshold at time T.sub.2, the ramp generator stores 
and presents the instantaneous value of V.sub.C as the output signal 29. 
Data processor 36, which may be a PC clone, employs output signal 29 as an 
input variable to determine .DELTA.T, which is presented as output signal 
31 by the processor 36. 
Referring to FIG. 2, there is shown another embodiment of time 
determination system 10 which determines the time difference between the 
receipt of a data signal 30 having a predetermined level and receipt of 
the immediately preceding timing pulse 35. System 10 comprises a ramp 
generator 32 which generates time dependent voltage ramp signals V.sub.C 
and V.sub.F in response to receiving each one of a periodic series of 
timing pulses 34 provided by processor 36. The instantaneous voltage 
levels of signals V.sub.C and V.sub.F are used to determine "course" and 
"fine" time difference resolution, respectively. The values of signals 
V.sub.C and V.sub.F are ramped to higher voltage levels in synchronism 
with synchronous (synch) pulses 35, also generated by processor 36. 
The instantaneous values of V.sub.C (V.sub.Ci) and V.sub.F (V.sub.Fi) are 
stored by the ramp generator 32 and presented on signal lines 39 and 41, 
respectively, when the value of input signal 30 exceeds the threshold 
value. MUX 38 serially outputs the signals presented on signal lines 39 
and 41, as well as V.sub.B+ and V.sub.B-, to processor 36 in synchronism 
with receipt of the timing pulses 34. V.sub.B+ and V.sub.B- power ramp 
generator 32, and may for example, be provided by a battery, not shown. 
V.sub.B+ and V.sub.B- are used by data processor 36 to determine the 
slopes of V.sub.C and V.sub.F, which change as V.sub.B+ and V.sub.B- 
change. By way of example, particular implementations of the ramp 
generator 32 and MUX 38 are presented in FIG. 5. However, the values of 
the signals presented on signal lines 39 and 41 are zero when the value of 
input signal 30 is less than a predetermined threshold value, as for 
example, a logic high. 
Processor 36 receives and uses V.sub.Ci and V.sub.Fi to determine the time 
difference, .DELTA.T, between receipt of the input signal 30 and the 
immediately preceding timing pulse 34. System 10 determines .DELTA.T based 
simply on the value of one or more voltage levels, and is not required to 
process high bandwidth data or digital representations of the incoming 
signals. 
Referring now to FIG. 3, the voltage level V.sub.C preferably increases 
from 0 volts to a suitable voltage level V.sub.A in stair-step voltage 
increments of V.sub.A /n over a period T.sub.PER1. The duration of each 
voltage increment V.sub.A /n is T.sub.STEPC. V.sub.Ci is stored and 
presented by the ramp generator 32 when at time, T.sub.D, data input 
signal 30 meets or exceeds a threshold level, such as a logic high or "1". 
A course time difference, .DELTA.T.sub.C, represents the time difference 
between the time T.sub.D when the signal 30 equals or exceeds the 
threshold value and, by way of example, the falling edge 40 of the timing 
pulse 34 immediately preceding T.sub.D. More specifically, .DELTA.T.sub.C 
=V.sub.Ci /(V.sub.A /n)-1!.multidot.T.sub.STEPC, and .DELTA.T.sub.C 
.apprxeq.(T.sub.D -T.sub.L). However, it is to be understood that the 
invention could also be implemented where T.sub.L is represented by the 
rising edge 42 of the timing pulse 34. 
Voltage ramp signal V.sub.F is employed to provide enhanced time resolution 
beyond that afforded by V.sub.C alone. Referring now to FIG. 4, the 
voltage level V.sub.F generally increases from 0 volts to a suitable 
voltage level V.sub.B in a monotone nondecreasing functional relationship 
by discrete voltage increments V.sub.B /m in a stair-step pattern over a 
period T.sub.STEPC. The duration of each voltage increment V.sub.B /m is 
T.sub.STEPF, which corresponds to the period of the synchronous (synch) 
pulses 35. It should also be noted that m(T.sub.STEPF)=T.sub.STEPC. 
V.sub.Fi is the instantaneous voltage at the time, T.sub.D, when data 
input signal 30 attains or exceeds the threshold value. A fine time 
difference, .DELTA.T.sub.F, then is determined by the processor 36 in 
accordance with the relation: 
EQU .DELTA.T.sub.F =V.sub.Fi /(V.sub.B /m).multidot.T.sub.STEPF. 
Processor 36 employs V.sub.Ci and V.sub.Fi to determine .DELTA.T in 
accordance with the relation: .DELTA.T=.DELTA.T.sub.F +.DELTA.T.sub.C. 
Obviously, many modifications and variations of the present invention are 
possible in light of the above teachings. 
For example, V.sub.C and V.sub.F are described as being increased in 
stair-step increments. However, V.sub.C and V.sub.F could also be 
generated so as to increase linearly, or in a saw-tooth manner. It is 
therefore to be understood that within the scope of the appended claims, 
the invention may be practiced otherwise than as specifically described.