Light beam synchronization detector and printer

In this light beam synchronization detector, an enable circuit 34 outputs a first control signal Se1 to an output circuit 35 when at least one of the absolute values of a voltage signal V1 from a first amplifier 31 and a voltage signal V2 from a second amplifier 32 exceeds the absolute value of a threshold voltage −Vth, thereby putting the output circuit 35 into an operative state. The enable circuit 34 outputs a second control signal Se2 to the output circuit 35 when both the absolute values of the first output voltage V1 and the second output voltage V2 are equal to or lower than the absolute value of the threshold voltage −Vth, thereby putting the output circuit 35 into an inoperative state. This light beam synchronization detector can prevent the occurrence of an error in the detection timing of a light beam due to a change in the quantity of light of the light beam and preventing the occurrence of erroneous detection due to reflected light.

This Nonprovisional application claims priority under 35 U.S.C. §119(a) on Patent Application No. P2003-356436 filed in Japan on Oct. 16, 2003, the entire contents of which are hereby incorporated by reference.

BACKGROUND OF THE INVENTION

The present invention relates to a light beam synchronization detector for detecting the timing of a light beam spot passing through a prescribed position and a printer and relates to, for example, a light beam synchronization detector that constitutes a synchronization detection circuit used as a synchronization sensor for an optical scanning recorder.

Conventionally, a photodiode is employed as a photodetector for detecting the timing of the passing of a light beam spot in a laser beam printer or the like. That is, a photodiode is arranged in a position where the light beam spot passes, and printing start timing is detected by detecting a change in the photocurrent outputted from the photodiode.

According to this light beam detection method, the photocurrent outputted from the photodiode also changes when the intensity itself of the light beam changes, and the signal level due to this photocurrent also changes. Therefore, when comparing this signal level with a prescribed threshold value and detecting the timing of the passing of the light beam spot over the photodiode, a detection error of the timing occurs due to the change in the signal level.

In order to cancel this error, there is proposed a technique for detecting the aforementioned timing by employing a photodiode as a photodetector whose light-receiving surface is divided into two parts and taking an optical push-pull (refer to, for example, JP 04-247761 A). According to this, the detection timing can be kept constant even if the wave height of the photocurrent outputted from the photodiode changes.

It is sometimes a case where a beam spot is caused by reflected light in an optical path different from the designed prescribed optical path as a consequence of scanning the spot of a light source by means of a polygon mirror in an optical system in which the construction of the light beam synchronization detector is provided by the aforementioned technique and made incident on the photodiode. Although the quantity of light of the beam spot due to this reflected light is sufficiently smaller than the quantity of light of the light beam that should be detected, the quantity of light is disadvantageously detected by this light beam synchronization detector. When the light beam synchronization detector is built in a printer, the detection of the reflected light as described above causes the malfunction of the printer.

Accordingly, in order to prevent the erroneous detection attributed to the reflected light, there is proposed a light beam synchronization detector that does not output a detection signal when a light beam of a quantity of light being not greater than a prescribed threshold value is made incident on the photodiode.

As shown inFIG. 9, in this light beam synchronization detector, the output side of a first photodiode PD1is connected to a first amplifier11, and the output side of a second photodiode PD2is connected to a second amplifier12. This first amplifier11has an output terminal connected to an input terminal of a comparator13via a constant-voltage source14, while the second amplifier12has an output terminal connected directly to the other input terminal of the comparator13. On the other hand, the input side of the first and second photodiodes PD1and PD2are grounded via a constant-voltage source10. As shown inFig. 10A, the light-receiving surface of the first photodiode PD1and the light-receiving surface of the second photodiode PD2are arranged at a prescribed interval in the direction in which the light beam spot indicated by the arrow21advances.

In this light beam synchronization detector, the output signal of the first photodiode PD1is convened from a signal current into a signal voltage by the first amplifier11, inverted, amplified, further shifted in level by the constant-voltage source14and inputted to the comparator13. On the other hand, the output signal of the second photodiode PD2is converted from a signal current into a signal voltage by the second amplifier12, inverted, amplified and inputted to the comparator13.

The signal waveforms when the light beam spot passes in the direction indicated by the arrow21as shown inFIG. 10Aare shown inFIG. 10B. InFIG. 10B, the waveform of a signal current11due to the output signal of the first photodiode PD1is indicated by solid lines, and the waveform of a signal current12due to the output signal of the second photodiode PD2is indicated by dashed lines. The waveform of a signal voltage V1that is outputted from the first amplifier11and shifted in level by a threshold value Vth by the constant-voltage source14is indicated by solid lines. The waveform of a signal voltage V2outputted from the second amplifier12is indicated by dashed lines.

The signal voltages V1and V2are inputted to the comparator13, and this comparator13outputs an output pulse Vout1, which rises at a crossing point X1of the signal voltage V1and the signal voltage V2, to an output terminal OUT.

In this case, if a beam spot due to reflection is made incident on the second photodiode PD2and a protuberance BSIis caused by the beam spot due to the reflection in the waveform of the signal current I2as shown inFIG. 10B, then a protuberance BSVis generated in the waveform of the signal voltage V2. However, when the level of this protuberance BSVis lower than the threshold value Vth, a protuberance BSPis not generated in the waveform of the output pulse Vout1.

However, when the signal voltage outputted from the first amplifier11is shifted in level by the constant-voltage source14as in this light beam synchronization detector, another problem described as follows occurs.

That is, it is difficult to consistently keep the quantity of light of the beam spot constant, and it is required to consider a change to a certain extent. Therefore, if, for example, the light beam intensity of the light beam spot that advances in the direction indicated by the arrow21inFIG. 10Achanges, then the crest values of the waveforms of the signal currents I1and I2change, and the signal voltages V1and V2change as indicated by one example as shown inFIG. 10C. That is, the voltage V1changes like voltages V1a, V1band V1c, while the voltage V2changes like voltages V2a, V2band V2c. With the above voltage changes, the crossing point X1of the voltages V1and V2changes like crossing points X1a, X1band X1c. That is, the timing of the fall of the detection pulse Vout1is to change within a time range of ΔX1by the voltage changes. Therefore, a problem that an error occurs in the detection timing of the light beam spot occurs. Therefore, when this light beam synchronization detector is incorporated into, for example, a printer, the printing start timing shifts and the printed letters disadvantageously become blurred.

SUMMARY OF THE INVENTION

Accordingly, the object of the present invention is to provide a light beam synchronization detector capable of preventing the occurrence of an error in the detection timing of a light beam due to a change in the quantity of light of the light beam and preventing the occurrence of erroneous detection due to reflected light.

In order to achieve the above object, there is provided a light beam synchronization detector comprising:

a first photoelectric converter section and a second photoelectric converter section;

a comparison output section which receives inputs of a first output signal outputted from the first photoelectric convener section and a second output signal outputted from the second photoelectric converter section, compares the first output signal with the second output signal and generates and outputs a light beam detection signal on the basis of a result of the comparison; and

a control section which receives inputs of the first output signal outputted from the first photoelectric converter section and the second output signal outputted from the second photoelectric converter section, outputs a first control signal to the comparison output section when at least one of the first output signal and the second output signal exceeds a prescribed threshold value to put the comparison output section into an operative state and outputs a second control signal to the comparison output section when both the first output signal and the second output signal are equal to or lower than the threshold value to put the comparison output section into an inoperative state.

According to the light beam synchronization detector of this invention, the control section outputs the first control signal to the comparison output section when at least one of the first output signal from the first photoelectric converter section and the second output signal from the second photoelectric converter section exceeds the prescribed threshold value, thereby putting the comparison output section into an operative state. The control section outputs the second control signal to the comparison output section when both the first output signal and the second output signal are equal to or lower than the threshold value, thereby putting the comparison output section into an inoperative state.

Therefore, according to this light beam synchronization detector, when a light beam of a quantity of light being not greater than the prescribed quantity of light is incident on both the first photoelectric converter section and the second photoelectric converter section and thus both the first output signal and the second output signal are equal to or lower than the threshold value, the comparison output section does not operate, and no light beam detection signal is outputted.

Therefore, according to the this invention, the erroneous detection due to the reflected light can be prevented without shifting the level of the output signal of the photoelectric converter section dissimilarly to the conventional case, and therefore, the error of the detection timing of the light beam due to the level shift does not occur.

Therefore, according to this invention, there can be provided a light beam synchronization detector capable of preventing the occurrence of an error in the detection timing of the light beam due to the change in the quantity of light of the light beam and preventing the occurrence of the erroneous detection due to the reflected light.

In one embodiment of the present invention, the control section comprises:

a hysteresis setting section for setting hysteresis for the threshold value.

In the light beam synchronization detector of this embodiment, the hysteresis setting section provided for the control section sets hysteresis for the threshold value, and therefore, malfunction due to such a noise light that the first and second output signals become located in the vicinity of the threshold value can be prevented.

In one embodiment of the present invention, the first photoelectric converter section comprises:

a first photoelectric converter and a first voltage converter section that converts a first current signal outputted from the first photoelectric converter into a first voltage signal and outputs the first voltage signal as the first output signal, and

the second photoelectric converter section comprises:

a second photoelectric converter and a second voltage converter section that converts a second current signal outputted from the second photoelectric converter into a second voltage signal and outputs the second voltage signal as the second output signal.

According to the light beam synchronization detector of this embodiment, the first and second photoelectric converter sections convert the first and second current signals outputted from the first and second photoelectric converters into the first and second voltage signals and output the voltage signals as the first and second output signals. That is, according to this embodiment, since the first and second output signals are voltage signals, the first and second output signals in the comparison output section and the control section can easily be processed.

In one embodiment of the present invention, the control section comprises:

a first comparator which receives inputs of the first output signal outputted from the first voltage converter section and a threshold voltage as the prescribed threshold value, compares the first output signal with the threshold voltage and outputs a first comparison signal that represents a result of the comparison;

a second comparator which receives inputs of the second output signal outputted from the second voltage converter section and the threshold voltage, compares the second output signal with the threshold voltage and outputs a second comparison signal that represents a result of the comparison; and

a control signal generating section which receives inputs of the first comparison signal and the second comparison signal, outputs the first control signal to the comparison output section when the first comparison signal indicates that the first output signal exceeds the threshold voltage or when the second comparison signal indicates that the second output signal exceeds the threshold voltage and outputs the second control signal to the comparison output section when the first comparison signal indicates that the first output signal is not higher than the threshold voltage and the second comparison signal indicates that the second output signal is not higher than the threshold voltage.

In the light beam synchronization detector of this embodiment, the control section is constructed of the first and second comparators and the control signal generating section. The first and second comparators can each be constructed of a voltage comparator, and the control signal generating section can be constructed of, for example, a logic operation circuit.

In one embodiment of the present invention, the control signal generating section comprises:

a logic operation circuit which receives inputs of the first comparison signal and the second comparison signal.

In this embodiment, the control signal generating section can be constructed of a logic operation circuit (AND circuit), and the control signal generating section can be constructed of a simple circuit.

In one embodiment of the present invention, the control signal generating section comprises:

a signal adding section which receives inputs of the first comparison signal and the second comparison signal and outputs an addition signal obtained by adding the first comparison signal to the second comparison signal; and

a clamp section which clamps the addition signal outputted from the signal adding section.

According to the light beam synchronization detector of this embodiment, the control signal generating section can be constructed of the signal adding section and the clamp section. Moreover, the level of the addition signal can be limited by clamping the addition signal outputted from the signal adding section in the clamp section.

In one embodiment of the present invention, the comparison output section comprises:

a reference comparator which receives inputs of the first output signal and the second output signal, compares the first and second output signals with respective prescribed reference voltages and outputs first and second reference comparison signals that indicate results of the comparison; and

an output circuit which receives inputs of the first and second reference comparison signals from the reference comparator, compares the first reference comparison signal with the second reference comparison signal and generates and outputs a light beam detection signal on the basis of a result of the comparison.

According to the light beam synchronization detector of this embodiment, the comparison output section compares the first and second output signals with the reference voltage by means of the reference comparator and outputs the first and second reference comparison signals. Therefore, it becomes possible to make the first (or second) reference comparison signal have an active level only when, for example, the first (or second) output signal exceeds the reference voltage and make the first (or second) reference comparison signal have an inactive level when the first (or second) output signal is not higher than the reference voltage. Therefore, a fluctuation component not higher than the reference voltage can be removed from the first and second output signals, and the influence of the noise light can be restrained.

In one embodiment of the present invention, the output circuit comprises:

a first input terminal which receives an input of the first reference comparison signal; a second input terminal which receives an input of the second reference comparison signal; a control signal input terminal which receives inputs of the first and second control signals from the control section; an output terminal which outputs the light beam detection signal;

a first transistor having a base connected to the first input terminal and a collector connected to a power source; a second transistor having a base connected to the second input terminal and a collector connected to the power source;

a first resistor having one end connected to an emitter of the first transistor; a second resistor having one end connected to an emitter of the second transistor;

a third transistor having a collector connected to the other end of the first resistor and an emitter grounded; a fourth transistor having a collector connected to the other end of the second resistor, a base connected to a base of the third transistor and an emitter grounded;

a fifth transistor having a collector connected to the power source, a base connected to the other end of the first resistor and an emitter connected to the base of the third transistor;

a third resistor having one end connected to the base of the third transistor and the other end grounded; a fourth resistor having one end connected to the power source;

a sixth transistor having a collector connected to the other end of the fourth resistor and a base connected to the other end of the second resistor; a control signal input transistor having an emitter connected to a base of the sixth transistor, a base connected to the control signal input terminal and a collector grounded;

a fifth resistor having one end connected to an emitter of the sixth transistor and the other end grounded; a sixth resistor having one end connected to the power source and the other end connected to the output terminal; and

an output transistor having a collector connected to the output terminal, a base connected to the emitter of the sixth transistor and an emitter grounded,

the first through sixth transistors and the output transistor being npn transistors, and the control signal input transistor being a pnp transistor.

According to the light beam synchronization detector of this embodiment, the output circuit can be constructed of seven npn transistors, one pnp transistor and six resistors. Therefore, the response of the output of the light beam detection signal based on the first and second reference comparison signals can be made fast.

In one embodiment of the present invention, the output circuit comprises:

a first transistor having a base connected to the first input terminal and a collector connected to a power source; a second transistor having a base connected to the second input terminal and a collector connected to the power source;

a first resistor having one end connected to an emitter of the first transistor; a second resistor having one end connected to an emitter of the second transistor;

a third transistor having a collector connected to the other end of the first resistor and an emitter grounded; a fourth transistor having a collector connected to the other end of the second resistor, a base connected to a base of the third transistor and an emitter grounded;

a fifth transistor having a collector connected to the power source, a base connected to the other end of the first resistor and an emitter connected to the base of the third transistor;

a third resistor having one end connected to the base of the third transistor and the other end grounded; a fourth resistor having one end connected to the power source;

a sixth transistor having a collector connected to the other end of the fourth resistor and a base connected to the other end of the second resistor;

a control signal input transistor having a collector connected to the power source, a base connected to the control signal input terminal and an emitter connected to an emitter of the first transistor;

a fifth resistor having one end connected to an emitter of the sixth transistor and the other end grounded; a sixth resistor having one end connected to the power source and the other end connected to the output terminal; and an output transistor having a collector connected to the other end of the sixth resistor, a base connected to the emitter of the sixth transistor and an emitter grounded,

the first through sixth transistors, the output transistor and the control signal input transistor being npn transistors.

According to the light beam synchronization detector of this embodiment, the transistors that constitute the output circuit can be all provided by npn transistors, and the response to the input signal can be made faster.

In one embodiment of the present invention, an upper limit value of the first and second control signals outputted from the control section is higher than an upper limit value of the first and second reference comparison signals outputted from the reference comparator, and a lower limit value of the first and second control signals outputted from the control section is lower than a lower limit value of the first and second reference comparison signals outputted from the reference comparator.

According to the light beam synchronization detector of this embodiment, changeover between the operative state and the inoperative state of the control section can be effected by the first and second control signals regardless of the output state of the reference comparator.

In one embodiment of the present invention, the light beam synchronization detector further comprises a clamp section which clamps a collector voltage of the fourth transistor so that the collector voltage is prevented from being saturated.

According to the light beam synchronization detector of this embodiment, the collector voltage of the fourth transistor can be prevented from being saturated by the clamp section, and the response characteristic of the output circuit can be prevented from deteriorating.

Moreover, the printer of one embodiment is provided with the aforementioned light beam synchronization detector.

According to the printer of this embodiment, the occurrence of an error in the detection timing of the light beam due to the change in the quantity of light of the light beam can be prevented, and the occurrence of erroneous detection due to the reflected light can be prevented. Therefore, printing start timing during high-precision printing can easily be obtained.

According to the light beam synchronization detector of this invention, when a light beam of a quantity of light being not greater than the prescribed quantity of light is incident on both the first photoelectric converter section and the second photoelectric converter section and thus both the first output signal and the second output signal are equal to or lower than the threshold value, the comparison output section does not operate, and no light beam detection signal is outputted. Therefore, according to this invention, the erroneous detection due to the reflected light can be prevented without shifting the level of the output signal of the photoelectric converter section dissimilarly to the conventional case. Therefore, also the error of the detection timing of the light beam due to the level shift does not occur. Consequently, according to this invention, there can be provided a light beam synchronization detector capable of preventing the occurrence of an error in the detection timing of the light beam due to the change in the quantity of light of the light beam and preventing the occurrence of the erroneous detection due to the reflected light.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

The present invention will be described in detail below on the basis of the embodiments shown in the drawings.

The First Embodiment

FIG. 1AandFIG. 1Bshow the first embodiment of the light beam synchronization detector of the present invention. This first embodiment is provided with a first photodiode PD31that serves as a first photoelectric converter and a second photodiode PD32that serves as a second photoelectric converter. This first photodiode PD31has a cathode connected to the positive pole of a constant-voltage source30, and the first photodiode PD31has an anode connected to the input terminal of a first amplifier31that serves as a first signal converter. The second photodiode PD32has a cathode connected to the positive pole of the constant-voltage source30, while the second photodiode PD32has an anode connected to the input terminal of the second amplifier32that serves as a second signal convener. The negative pole of the constant-voltage source30is grounded.

The first photodiode PD31and the first amplifier31constitute a first photoelectric converter section, while the second photodiode PD32and the second amplifier32constitute a second photoelectric converter section.

The first amplifier31has an output terminal connected to one input terminal of two input terminals of a reference comparator33, while the second amplifier32has an output terminal connected to the other input terminal of the reference comparator33. The first amplifier31and the second amplifier32have output terminals connected to input terminals T1and T2, respectively, of an enable circuit34that serves as a control section. This enable circuit34has an output terminal T3connected to a control signal input terminal35C of an output circuit35. The reference comparator33and the output circuit35constitute a comparison output section.

The reference comparator33has a first output terminal33A connected to a first input terminal35A of the output circuit35, and the reference comparator33has a second output terminal33B connected to a second input terminal35B of the output circuit35. This output circuit35has an output terminal35D connected to an output terminal OUT of this light beam synchronization detector. A light beam detection signal is outputted from this output terminal OUT.

As shown inFIG. 3A, in this light beam synchronization detector, a light-receiving surface F1of the first photodiode PD1and a light-receiving surface F2of the second photodiode PD2are arranged at a prescribed interval along a direction36in which the light beam spot advances.

If this light beam spot is made incident on the light-receiving surface F1of the first photodiode PD1, then the first photodiode PD1generates a first current signal I31as shown inFIG. 3B. This first current signal I31is inputted to the first amplifier31, amplified by this first amplifier31, inverted and outputted as a first voltage signal V31. This first voltage signal V31serves as a first output signal Aout1.

When the light beam spot is made incident on the light-receiving surface F2of the second photodiode PD2, then the second photodiode PD2generates a second current signal I32as shown inFIG. 3B. This second current signal I32is inputted to the second amplifier32, amplified by this second amplifier32, inverted and outputted as a second voltage signal V32. This second voltage signal V32serves as a second output signal Aout2.

The first voltage signal V31(first output signal Aout1) outputted from the first amplifier31is inputted to the first input terminal T1of the enable circuit34, while the second voltage signal V32(second output signal Aout2) outputted from the second amplifier32is inputted to the second input terminal T2of the enable circuit34. As shown inFIG. 3B, if the first voltage signal V31falls below a threshold voltage −Vth, then the enable circuit34lowers an enable signal Se outputted from the output terminal T3and inputs a first control signal Se1to the control signal input terminal35C of the output circuit35. Then, the output circuit35enters an operative state.

Moreover, the first and second voltage signals V31and V32are inputted to the reference comparator33. This reference comparator33compares the absolute value of the first voltage signal V31with a prescribed threshold voltage, thereby makes a first reference comparison signal Pout1have L-level when the absolute value of the first voltage signal V31exceeds the above-mentioned threshold voltage and makes the first reference comparison signal Pout1have H-level when the absolute value does not exceed the threshold voltage. Moreover, the reference comparator33compares the absolute value of the second voltage signal V32with a prescribed threshold voltage, thereby makes a second reference comparison signal Pout2have L-level when the absolute value of the second voltage signal V32exceeds the above-mentioned threshold voltage and makes the second reference comparison signal Pout2have H-level when the absolute value does not exceed the threshold voltage.

Then, the first reference comparison signal Pout1outputted from this reference comparator33is inputted to the first input terminal35A of the output circuit35, while the second reference comparison signal Pout2is inputted to the second input terminal35B.

This output circuit35compares the first reference comparison signal Pout1with the second reference comparison signal Pout2and outputs a detection pulse DP that falls when the absolute value of the second reference comparison signal Pout2becomes greater than the absolute value of the first reference comparison signal Pout1(X33) as a light beam detection signal from the output terminal35D.

When the light beam spot passes over the light-receiving surface F2of the second photodiode PD2, then the second current signal I32falls, and the second voltage signal V32rises. When the second voltage signal V32becomes equal to or higher than the threshold voltage −Vth shown inFIG. 2B, then both the first voltage signal V31and the second voltage signal V32become equal to or higher than the threshold voltage −Vth. Therefore, the enable circuit34raises the enable signal Se to input a second control signal Se2to the control signal input terminal35C of the output circuit35. Then, the output circuit35enters an inoperative state. As a result, the output of the output circuit35is fixed to H-level (zero voltage).

As described above, according to the light beam synchronization detector of this embodiment, the enable circuit34, which constitutes the control section, outputs the first control signal Se1to the output circuit35when at least one of the absolute value of the first voltage signal V31from the first amplifier31and the absolute value of the second voltage signal V32from the second amplifier32exceeds the absolute value of the threshold voltage −Vth, thereby puffing the output circuit35into the operative state. The enable circuit34outputs the second control signal Se2to the output circuit35when the absolute values of both the first output voltage V31and the second output voltage V32are equal to or lower than the absolute value of the threshold voltage −Vth, thereby putting the output circuit35into the inoperative state.

Therefore, according to this light beam synchronization detector, when a light beam of a quantity of light being not greater than a prescribed value is incident on each of both the first photodiode PD1and the second photodiode PD2and thus both the absolute value of the first output voltage V31and the absolute value of the second output voltage V32are equal to or lower than the absolute value of the threshold voltage −Vth, then the output circuit35does not operate, and the detection pulse DP, which is the light beam detection signal, is not outputted.

Therefore, even if reflected light (noise light) is incident on the first photodiode PD1as shown inFIG. 3B, a protuberance BSIis generated in the first current signal I31and a protuberance BSVis generated in the first voltage waveform V31, the enable circuit34does not output the first control signal Se1to the output circuit35when the absolute value of this protuberance BSVis smaller than the absolute value of the threshold voltage −Vth, and the output circuit35is in the inoperative state. Therefore, according to this embodiment, the erroneous detection due to the reflected light can be prevented without shifting the level of the output signal of the photoelectric converter section dissimilarly to the conventional case.

Moreover, according to this embodiment, the level of the output signal of the photoelectric converter section is not shifted dissimilarly to the conventional case, and therefore, no error occurs in the detection timing of the light beam even if the change in the quantity of light of the light beam spot occurs. That is, as shown inFIG. 3C, even when the first voltage signal V31and the second voltage signal V32change like V31a, V31band V31cand V32a, V32band V32c, a time X22at the crossing point of the first voltage signals V31a, V31band V31cand the second voltage signals V32a, V32band V32cdoes not change.

Therefore, according to this embodiment, there can be provided a light beam synchronization detector capable of preventing the occurrence of an error in the detection timing of the light beam due to the change in the quantity of light of the light beam and preventing the occurrence of the erroneous detection due to the reflected light.

In the aforementioned embodiment, the absolute value of the threshold voltage Vth in the enable circuit34should preferably be made smaller than the absolute value of the output voltage of the first amplifier31(or the second amplifier32) when a quantity of light being not greater than a half of the quantity of light of the light beam spot is incident on the first photodiode PD1(or PD2). The above is because the output circuit35enters the inoperative state (enable state) at the time X22of the crossing point when the absolute value of this threshold voltage Vth is set equal to or greater than the absolute value of the output voltage, and a normal detection pulse cannot be obtained. The quantity of light of the beam spot due to actual reflection is not greater than a half of the quantity of light of the beam spot that should be detected, and therefore, the influence of the reflected beam spot can be eliminated even when the above-mentioned setting is done.

Next, one example of the construction of the enable circuit34as the control section is shown with reference toFIG. 2A. This enable circuit34has a first comparator43, a second comparator42, an AND circuit44that serves as a control signal generating section and a reference voltage source40. The first comparator43has a non-inverted input terminal connected to the output terminal of the first amplifier31, and the first comparator43has an inverted input terminal connected to the positive pole of the reference voltage source40. This first comparator43has an output terminal connected to an input terminal44A of the AND circuit44. The reference voltage source40has a negative pole grounded.

Moreover, the second comparator42has a non-inverted input terminal connected to the output terminal of the second amplifier32, and the second comparator42has an inverted input terminal connected to the positive pole of the reference voltage source40. This second comparator42has an output terminal connected to another input terminal44B of the AND circuit44. This AND circuit44has an output terminal connected to the control signal input terminal35C of the output circuit35.

In this enable circuit34, when the first and second voltage signals V31and V32are higher than −Vth obtained by inverting the threshold voltage Vth from the reference voltage source40, then the first and second comparators43and42output H-level signals as first and second comparison signals. That is, if there is no light during which no light beam spot is incident on both the first and second photodiodes PD1and PD2or when reflected light (noise light) is incident on the first and second photodiodes and the absolute values of the first and second voltage signals V31and V32are each smaller than the threshold voltage Vth, then the first and second comparators43and42output H-level signals as the first and second comparison signals.

Then, the AND circuit44outputs an H-level signal that serves as a second control signal to the output circuit35, thereby putting the output circuit35into the inoperative state.

When the first voltage signal V31becomes lower than −Vth, then the first comparator43outputs an L-level signal. When the second voltage signal V32becomes lower than −Vth, then the second comparator43outputs an L-level signal. Therefore, if at least one of the first and second voltage signals V31and V32becomes lower than −Vth, then the AND circuit44outputs an L-level signal that serves as a first control signal to the output circuit35, thereby putting the output circuit35into the operative state.

When a NAND circuit is provided in place of the AND circuit44, the enable circuit34outputs the H-level signal as the first control signal and outputs the L-level signal as the second control signal. Therefore, in this case, the output circuit35serves as an output circuit that enters the operative state when the H-level signal is inputted and enters the inoperative state when the L-level signal is inputted. As described above, it is acceptable to invert the logic values of the first control signal and the second control signal according to an output circuit enabling system.

Moreover, the enable circuit34that serves as the control section may be provided with a hysteresis setting section HS that sets hysteresis for the threshold voltage Vth. In this case, by setting hysteresis for the threshold voltage Vth by this hysteresis setting section HS, there can be prevented malfunction due to such a noise light that the first and second voltage signals V31and V32become located in the vicinity of the threshold voltage Vth.

Next, one example of the concrete circuit of the enable circuit34is shown inFIG. 2B. This enable circuit34has a first input terminal T1connected to the output terminal of the first amplifier31, a second input terminal T2connected to the output terminal of the second amplifier32and an output terminal T3connected to the control signal input terminal35C of the output circuit35.

The base of a pnp transistor Tr41is connected to the first input terminal T1, and the emitter of this pnp transistor Tr41is connected to a constant-current source47. The base of a pnp transistor Tr42is connected to the second input terminal T2, and the emitter of this pnp transistor Tr42is connected to the constant-current source47. This constant-current source47is connected to a terminal of the power source voltage.

Moreover, the collector of the pnp transistor Tr41and the collector of the pnp transistor Tr42are connected to each other at a junction point N1, and this junction point N1is grounded via a connection line L1. The emitter of a pnp transistor Tr43is connected to the lower voltage side of the constant-current source47, the collector of this pnp transistor Tr43is connected to a resistor R41at a junction point N2, and this resistor R41is connected to the connection line L1. The base of the pnp transistor Tr43is connected to the positive pole of the reference voltage source40of the voltage Vref41, and the negative pole of this reference voltage source40is grounded. The junction point N2is connected to the output terminal T3.

The transistors Tr41and Tr43produce the function of the first comparator43, and the transistors Tr42and Tr43produce the function of the second comparator42. The junction point N2of the resistor R41and the collector of the transistor Tr43constitutes the output terminal of the AND circuit44.

In the construction of this enable circuit34, the base voltage of the transistor Tr41is compared with the base voltage of the transistor Tr43, and a constant current I41flows through the transistor Tr41or Tr43of the lower base voltage. Likewise, the constant current I41flows through the transistor Tr42or Tr43of the lower base voltage.

In this case, the emitters of the transistors Tr41, Tr42and Tr43are common, and therefore, the constant current I41consequently flows from the constant-current source47through only the transistor of the lowest base voltage among the transistors Tr41through Tr43.

In this case, in the period during which light is not incident on both the photodiodes PD31and PD32, the voltage Vref41, which is the base voltage of the transistor Tr43among the base voltages of the transistors Tr41through Tr43, becomes the lowest, and the constant current I41flows through the transistor Tr43. As a result, the product of the constant current I41and the resistance R41is outputted as an H-level signal, i.e., the second control signal to the output terminal T3. This second control signal corresponds to the H-level signal of the AND circuit44.

When a light beam is made incident on either one of the photodiodes PD31and PD32and the base voltage of the transistor Tr41or Tr42becomes lower than the reference voltage Vref41, then the constant current I41flows through the transistor Tr41or Tr42, and no constant current flows through the transistor Tr43. At this time, no constant current flows through the resistor R41, and therefore, the junction point N2comes to have the ground level. Through this operation, an L-level signal is outputted as the first control signal to the output terminal T3.

The Second Embodiment

Next, the second embodiment of the light beam synchronization detector of the present invention is shown inFIG. 4AandFIG. 4B. This second embodiment differs from the aforementioned first embodiment only in that an enable circuit55is provided in place of the enable circuit34and an output circuit59is provided in place of the output circuit35. This enable circuit55differs from the enable circuit34only in that an adder56and a clamp circuit54are provided in place of the AND circuit44, a reference voltage source50is provided in place of the reference voltage source40, and comparators52and53are provided in place of the comparators42and43.

As shown inFIG. 4A, the output terminal of the first comparator53and the output terminal of the second comparator52are connected to the input terminal of the adder56, and the output terminal of this adder56is connected to the output terminal T13of the enable circuit55via a connection line L13. The clamp circuit54is connected to this connection line L13.

A reference voltage Vref51outputted from the reference voltage source50to the comparators53and52are set to a voltage such that the output signal of the comparator53(or the comparator52) is inverted when a quantity of light being not greater than a half of the quantity of light of a prescribed light beam spot is made incident on the first photodiode PD31(or the second photodiode PD32).

In this enable circuit55, the adder56adds first and second comparison signals outputted from the two of the first and second comparators53and52and outputs this addition signal.

In this enable circuit55, when both of the quantity of light incident on the first photodiode PD31and the quantity of light incident on the second photodiode PD32are each not greater than a half of the quantity of light of the prescribed quantity of light, the first comparator53outputs an H-level signal, and the second comparator52outputs an H-level signal. In this case, the adder56adds up the above-mentioned two H-level signals and outputs the resulting signal. In this case, the H-level signal is assumed to be the zero voltage. Therefore, the H-level signal is consequently inputted as the second control signal from the output terminal T13, and the output circuit59enters the inoperative state.

When the light beam spot is made incident on either one of the first photodiode PD1and the second photodiode PD2, then either one of the first comparator53and the second comparator52outputs an L-level signal, and the other one outputs an H-level signal. Then, the adder56adds up the H-level signal of the zero voltage to the L-level signal of the negative voltage and outputs the L-level signal as the first control signal. The L-level signal is inputted from the output terminal T13to the output circuit59, and the output circuit59enters the operative state.

When the light beam spot comes to a position intermediate between the first photodiode PD1and the second photodiode PD2, half the quantity of light of the light beam spot is incident on each of the two photodiodes PD1and PD2. At this time, the two comparators53and52try to output the L-level signal, and the adder56tries to output a signal obtained by doubling the negative voltage of one L-level signal. However, the output of the adder56is clamped by the clamp circuit54, and an L-level signal of which the absolute value is smaller than the value obtained by doubling the negative voltage is outputted as the first control signal to the output circuit59. As a result, the output circuit59enters the operative state.

Next, one example of the concrete circuit of the enable circuit55is shown inFIG. 4B. This enable circuit55has a first input terminal T11connected to the output terminal of the first amplifier31and has a second input terminal T12connected to the output terminal of the second amplifier32. This first input terminal T11is connected to the base of an npn transistor Tr51. The reference voltage source50is connected to the base of an npn transistor Tr52, and the emitter of the transistor Tr51is connected to the emitter of the transistor Tr52at a junction point N51. This junction point N51is connected to a constant-current source57. The transistors Tr51and Tr52constitute the first comparator53.

Moreover, the base of an npn transistor Tr54is connected to the second input terminal T12, and the base of an npn transistor Tr53is connected to the reference voltage source50. Then, the emitter of the transistor Tr54is connected to the emitter of the transistor Tr53at a junction point N52. This junction point N52is connected to a constant-current source58. The transistors Tr53and Tr54constitute the second comparator52.

Moreover, the collector of the transistor Tr52is connected to the collector of the transistor Tr53at a junction point N53, and one end of a resistor R51is connected to this junction point N53. This junction point N53is used as the output of the adder56. Further, the emitter of an npn transistor Tr55is connected to the collector of the transistor Tr52and the collector of the transistor Tr53, and the base of the transistor Tr55is connected to a reference voltage source52. This transistor Tr55constitutes the clamp circuit54.

When there is no light (i.e., in a state in which the light beam spot is not incident on the first and second photodiodes PD31and PD32), a voltage Aout1outputted from the first amplifier31and a voltage Aout2outputted from the second amplifier32are each higher than the reference voltage Vref51of the reference voltage source50. Therefore, constant currents I51and I52due to the constant-current sources57and58do not flow through the transistors Tr52and Tr53of this enable circuit55, and the output of the adder56comes to have H-level.

When the light beam spot is made incident on the first photodiode PD31, then the output voltage of the first amplifier31is lowered and becomes lower than the reference voltage Vref51. Therefore, a constant current I51flows through the transistor Tr52. Then, a voltage, which is lowered by a voltage expressed by the product of the constant current I51and the resistance R51from the power voltage Vref52, is produced as the output of the adder56at the junction point N53.

Likewise, when the light beam spot is made incident on the second photodiode PD32, then the output voltage of the second amplifier32is lowered and becomes lower than the reference voltage Vref51. Therefore, a constant current I52flows through the transistor TrS3. Then, a voltage, which is lowered by a voltage expressed by the product of the constant current I52and the resistance R51from the power voltage Vref52, is produced as the output of the adder56at the junction point N53.

Further, when the light beam spot comes to a position intermediate between the two photodiodes PD31and PD32, constant currents I51and I52flow through the collectors of the transistors Tr52and Tr53. Then, the output of the adder56is not made to have the voltage that is lowered by the voltage expressed by the product of the sum of the currents I51and I52and the resistance R51but clamped to the voltage that is lowered by Vbe (voltage across the base and the emitter) of the transistor Tr55from the reference voltage Vref52due to the connection of the emitter of the transistor Tr55to the junction point N53. That is, the output of the adder56is lowered in proportion to the current that flows through the resistor R51, whereas the voltage at the output terminal T13is fixed due to the occurrence of the voltage across the emitter and the base of the transistor Tr55and the consequent supply of a current from the transistor Tr55to the junction point N53.

When the adder56is employed as in this enable circuit55, an enable signal close to the two values of the first control signal and the second control signal can be obtained by employing the clamp circuit54.

(Circuit Configuration of Output Circuit)

Next, one example of the circuit configuration of the output circuit35of the first embodiment is shown inFIG. 5.

This output circuit35has a first input terminal35A connected to the first output terminal33A of the reference comparator33and a second input terminal35B connected to the second output terminal33B. There are further provided a control signal input terminal35C that receives an input of a control signal from the enable circuit34and an output terminal35D that outputs a light beam detection signal.

This output circuit35has a first transistor Tr61that has a base connected to the first input terminal35A and a collector connected to the power source and a second transistor Tr62that has a base connected to the second input terminal35B and a collector connected to the power source. Moreover, this output circuit35has a first resistor R61that has one end connected to the emitter of the first transistor Tr61and a second resistor R62that has one end connected to the emitter of the second transistor Tr62.

Moreover, this output circuit35has a third transistor Tr63that has a collector connected to the other end of the first resistor R61and an emitter grounded and a fourth transistor Tr64that has a collector connected to the other end of the second resistor R62, a base connected to the base of the third transistor Tr63and an emitter grounded.

Moreover, this output circuit35has a fifth transistor Tr65that has a collector connected to the power source, a base connected to the other end of the first resistor R61and an emitter connected to the base of the third transistor Tr63. Moreover, this output circuit35has a third resistor R63that has one end connected to the base of the third transistor Tr63and the other end grounded and a fourth resistor R64that has one end connected to the power source.

Moreover, this output circuit35has a sixth transistor Tr66that has a collector connected to the other end of the fourth resistor R64and a base connected to the other end of the second resistor R62and a control signal input transistor Tr67that has an emitter connected to the base of the sixth transistor Tr66, a base connected to the control signal input terminal35C and a collector grounded.

Moreover, this output circuit35has a fifth resistor R65that has one end connected to the emitter of the sixth transistor Tr66and the other end grounded and a sixth resistor R66that has one end connected to the power source and the other end connected to the output terminal35D. Moreover, this output circuit35has an output transistor Tr6out that has a collector connected to the output terminal35D, a base connected to the emitter of the sixth transistor Tr66and an emitter grounded.

The first through sixth transistors Tr61through Tr66and the output transistor Tr6out are npn transistors, and the control signal input transistor Tr67is a pnp transistor.

The operation of this output circuit35will be described next. The first reference comparison signal Pout1outputted from the first output terminal33A of the reference comparator33in the preceding stage is inputted to the base of the first transistor Tr61. The second reference comparison signal Pout2from the second output terminal33B of the reference comparator33is inputted to the base of the second transistor Tr62.

This first reference comparison signal Pout1is a signal that comes to have L-level when the quantity of light incident on the first photodiode PD31exceeds a prescribed value and comes to have H-level when the quantity of light does not exceed the prescribed value. The second reference comparison signal Pout2is a signal that comes to have L-level when the quantity of light incident on the second photodiode PD32exceeds a prescribed value and comes to have H-level when the quantity of light does not exceed the prescribed value.

In this case, assuming that the resistance values of the resistor R61and resistor R62are equal to each other, the voltage of the first reference comparison signal Pout1is V61, the voltage of the second reference comparison signal Pout2is V62, the base voltage of the transistor Tr66is V66b, a voltage across the base and the emitter of the transistors Tr63and a voltage across the base and the emitter of the transistors Tr65are Vbe63and Vbe65, respectively, then the following equation (1) holds.
V66b=Vbe63+Vbe65+(V62−V61)  (1)

With this arrangement, the output (light beam detection signal) of this output circuit35comes to have L-level as a consequence of the turning-on of the output transistor Tr6out when the voltage V62of the second reference comparison signal Pout2is greater than the voltage V61of the first reference comparison signal Pout1. When the voltage V62is smaller than the voltage V61, the output transistor Tr6out is turned off, and the light beam detection signal of the output circuit35comes to have H-level.

The enable control of this output circuit35will be described next. The enable control of the output circuit35is executed by a voltage inputted to the base of the control signal input transistor Tr67with a control signal (first control signal (L-level signal) and a second control signal (H-level signal)) inputted from the enable circuit34to the control signal input terminal35C.

That is, when the enable circuit34outputs the second control signal (H-level signal) in order to put the output circuit35into the inoperative state, then a voltage close to the ground voltage is inputted to the base of the transistor Tr67. Then, the transistor Tr67is turned on to compulsorily fix the base voltage V66bof the transistor Tr66to a voltage at which the output transistor Tr6out is not turned on, so that the output level of this output circuit35comes to have H-level. When the enable circuit34outputs the first control signal (L-level signal) to put the output circuit35into the operative state, then the transistor Tr67is turned off to put the output circuit35into the operative state. It is only required to set this L-level signal to at least two or more times the voltage Vbe across the base and the emitter as a voltage to be applied to the base of the transistor Tr67.

Next, the circuit configuration of an output circuit38that serves as a modification example of the output circuit35is shown inFIG. 6. This output circuit38has a first transistor Tr71that has a base connected to the first input terminal38A and a collector connected to the power source and a second transistor Tr72that has a base connected to the second input terminal38B and a collector connected to the power source.

The first reference comparison signal Pout1from the first output terminal33A of the reference comparator33is inputted to the first input terminal38A, while the second reference comparison signal Pout2from the second output terminal33B of the reference comparator33is inputted to the second input terminal38B.

Moreover, this output circuit38has a first resistor R71that has one end connected to the emitter of the first transistor Tr71and a second resistor R72that has one end connected to the emitter of the second transistor Tr72.

Moreover, this output circuit38has a third transistor Tr73that has a collector connected to the other end of the first resistor R71and an emitter grounded and a fourth transistor Tr74that has a collector connected to the other end of the second resistor R72, a base connected to the base of the third transistor Tr73and an emitter grounded.

Moreover, this output circuit38has a fifth transistor Tr75that has a collector connected to the power source, a base connected to the other end of the first resistor R71and an emitter connected to the base of the third transistor Tr73.

Moreover, this output circuit38has a third resistor R73that has one end connected to the base of the third transistor Tr73and the other end grounded and a fourth resistor R74that has one end connected to the power source.

Moreover, this output circuit38has a sixth transistor Tr76that has a collector connected to the other end of the fourth resistor R74and a base connected to the other end of the second resistor R72. Moreover, this output circuit38has a control signal input transistor Tr78that has a collector connected to the power source, a base connected to the control signal input terminal38C and an emitter connected to the emitter of the first transistor Tr71. A control signal from the enable circuit34is inputted to this control signal input terminal38C.

Moreover, this output circuit38has a fifth resistor R75that has one end connected to the emitter of the sixth transistor Tr76and the other end grounded and a sixth resistor R76that has one end connected to the power source and the other end connected to the output terminal38D. Moreover, this output circuit38has an output transistor Tr7out that has a collector connected to the other end of the sixth resistor R76, a base connected to the emitter of the sixth transistor Tr76and an emitter grounded.

The first through sixth transistors Tr71through Tr76, the output transistor Tr7out and the control signal input transistor Tr78are npn transistors.

The operation of this output circuit38will be described next. In this output circuit38, the control signal input transistor Tr78is connected parallel to the first transistor Tr71.

In this case, in order to put the output circuit38into the inoperative state, the second control signal inputted from the enable circuit34to the control signal input terminal38C is made to have a voltage higher than the zero voltage. With this arrangement, even if the light beam spot is incident on the first photodiode PD1and the first reference comparison signal Pout1inputted to the input terminal38A comes to have L-level, the emitter of the transistor Tr78is consistently fixed to a voltage equal to the emitter voltage of the transistor Tr72or a voltage higher than the emitter voltage of this transistor Tr72. The base voltage V76bof the transistor Tr76is given by the following equation (2).
V76b=Vbe73+Vbe75+(V72−V78)−α  (2)

In the equation (2), Vbe73represents the voltage across the base and the emitter of the transistor Tr73, and Vbe75represents the voltage across the base and the emitter of the transistor Tr75. Moreover, V72represents the voltage of the second reference comparison signal Pout2applied to the second input terminal38B, and V78represents the voltage of the control signal applied to the control signal input terminal38C.

By setting the resistance R71<R72when the voltage V72and the voltage V78are equal to each other, α comes to have a positive value. Therefore, it is required to prevent the output transistor Tr7out from being turned on when V72is equal to V78by adjusting the value of α with the resistance values of the resistors R71and R72.

On the other hand, when the output circuit38is put into the operative state, the transistor Tr78becomes inoperative by inputting the signal Se of a voltage being not greater than the L-level of the first reference comparison signal Pout1as the first control signal to the base of transistor Tr78, and the normal output circuit operation is achieved.

As shown inFIG. 7, it is acceptable to set the H-level (second control signal) of the control signal (enable signal) higher than the H-level of the first and second reference comparison signals Pout1and Pout2and set the L-level (first control signal) of the control signal (enable signal) lower than the L-level of the first and second reference comparison signals Pout1and Pout2. In this case, the enable control can be achieved without adjusting the resistances R71and R72of the output circuit. That is, when the enable input voltage (voltage of the second control signal) is set higher than the H-level of the voltage V72of the second reference comparison signal Pout2in the enabling stage in which the output circuit38is put into the inoperative state, then the voltage of the base voltage V76bof the transistor Tr76becomes equal to or lower than 2×Vbe in the aforementioned equation (2), and the output transistor Tr7out can be turned off. Accordingly, there is no need to adjust α to a positive value.

When the enable input voltage (voltage of the first control signal) is set lower than the L-level of the voltage V71of the first reference comparison signal Pout1in the enable canceling stage in which the output circuit38is put into the operative state, then the control signal input transistor Tr78is turned off regardless of the output state of the reference comparator33. Therefore, the output state of the reference comparator33does not influence the response characteristic of the output of the light beam detection signal of the output circuit38. Conversely speaking, unless the control signal input transistor Tr78is completely turned off in the enable canceling stage, the switching time of the first transistor Tr71is disadvantageously influenced, and a stable response characteristic cannot be obtained.

Next, another example of the circuit of the output circuit39as a modification example of the output circuit38is shown inFIG. 8. This output circuit39differs from the aforementioned output circuit38only in that an npn transistor Tr99that constitutes a clamp section for preventing the collector voltage of the fourth transistor Tr74from being saturated by clamping the collector voltage in the output circuit38. The npn transistor Tr99has a base connected to a junction point N91of the first resistor R71and the base of the fifth transistor Tr75, a collector connected to the power source and an emitter connected to the collector of the fourth transistor Tr74.

When the enable voltage due to the second control signal inputted to the control signal input terminal38C in the enabling stage in which the output circuit38is put into the inoperative state is excessively higher than a prescribed value in comparison with the voltage of the second reference comparison signal Pout2in the aforementioned output circuit38, it is sometimes a case where the absolute value of (V72−V78) is increased as expressed by the aforementioned equation (2) and the base voltage V76bof the sixth transistor Tr76becomes excessively low. At this time, it is sometimes a case where the transistor Tr74is disadvantageously saturated since the collector voltage of the transistor Tr74is lowered, and this possibly leads to a deteriorated response characteristic.

In contrast to this, in this output circuit39, when the collector voltage of the transistor Tr74tries to become equal to or lower than the voltage Vbe across the base and the emitter, then the transistor Tr99operates to supply a current to the transistor Tr74, by which the collector voltage of the transistor Tr74can be prevented from becoming equal to or lower than the voltage Vbe. This makes it possible to achieve an enable control of output circuit capable of obtaining a stable response characteristic.

According to printers and printing devices such as laser beam printers provided with the light beam synchronization detectors of the aforementioned embodiments, there can be provided printers and printing devices, which have no erroneous detection due to reflected light and in which the detection timing does not depend on the quantity of light of the beam.