Apparatus and method for amplifying power in transmission device

Disclosed is a 5G (5th generation) or pre-5G communication system for supporting a data transmission rate higher than that of a 4G (4th generation) communication system such as long-term evolution (LTE). A transmission device comprises: a first amplification unit having a common source structure, including cross coupled capacitors, and amplifying an input signal; a second amplification unit, having a common gate structure, for amplifying a signal output from the first amplification unit; and a first removal unit which is connected to output terminals of the first amplification unit and input terminals of the second amplification unit and which removes at least one portion of second harmonics. The first removal unit can offset, with respect to a fundamental frequency, at least some of parasitic capacitance generated from the output terminals of the first amplification unit and the input terminals of the second amplification unit, and can ground a signal having a secondary harmonic frequency with respect to the secondary harmonic frequency.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a 371 National Stage of International Application No. PCT/KR2019/011007, filed on Aug. 28, 2019, which claims priority to Korean Patent Application No. 10-2018-0103991, filed Aug. 31, 2018, the disclosures of which are herein incorporated by reference in their entirety.

BACKGROUND

The disclosure generally relates to a transmission device, and more particularly, to an apparatus and a method for amplifying power in a transmission device.

2. Description of Related Art

Efforts to develop enhanced 5thgeneration (5G) communication systems or pre-5G communication systems have been ongoing in order to meet the increasing demand for wireless data traffic since 4thgeneration (4G) communication systems were commercialized. For this reason, the 5G communication systems or pre-5G communication systems are called Beyond 4G network communication systems or post long term evolution (LTE) systems.

The 5G communication system is considered to be implemented in a superhigh frequency (mmWave) band (for example, 60 GHz band) to achieve a high data transmission rate. For the 5G communication systems, technologies for beamforming, massive multiple input multiple output (MIMO), full dimensional MIMO (FD-MIMO), array antenna, analog beam-forming, and large scale antenna are being discussed to mitigate a path loss of a radio wave and to increase a transmission distance of a radio wave in the superhigh frequency band.

In addition, technologies for evolved small cell, enhanced small cells, cloud ratio access network (RAN), ultra-dense network, device to device communication (D2D), wireless backhaul, moving network, cooperative communication, coordinated multi-points (CoMP), and interference cancellation in the 5G communication systems are developing to enhance networks of the systems.

In addition, hybrid frequency shift keying and quadrature amplitude modulation (FQAM) and sliding window superposition coding (SWSC), which are advanced coding modulation (ACM) methods, and filter bank multi carrier (FBMC), non-orthogonal multiple access (NOMA), and sparse code multiple access (SCMA) which are enhanced accessing technology in the 5G systems are developing.

The 5G system considers use of a higher frequency band than a conventional cellular communication system (for example, LTE). Accordingly, development of hardware showing excellent performance in a high frequency band is ongoing. For example, technology for preventing reduction of a gain of an amplifier, degradation of matching characteristics, reduction of linearity, etc. in a high frequency band is being researched.

SUMMARY

Based on the above-described discussions, the disclosure provides an apparatus and a method for effectively amplifying power of a transmission signal in a transmission device.

In addition, the disclosure provides an apparatus and a method for reducing a harmonic component generated in a process of processing a transmission signal in a wireless communication system.

In addition, the disclosure provides an apparatus and a method for reducing parasitic capacitance of a circuit for amplifying a transmission signal in a wireless communication system.

According to various embodiments of the disclosure, a transmission device includes: a first amplifier having a common source structure and comprising cross coupled capacitors, and configured to amplify an input signal; a second amplifier of a common gate structure configured to amplify a signal outputted from the first amplifier; and a first termination unit connected to output terminals of the first amplifier and input terminals of the second amplifier, and configured to terminate at least a portion of a second harmonic. The first termination unit may offset at least a portion of parasitic capacitance generated at the output terminals of the first amplifier and the input terminals of the second amplifier with respect to a fundamental frequency, and may ground a signal having a frequency of the second harmonic with respect to the frequency of the second harmonic.

According to various embodiments of the disclosure, an operating method of a transmission device includes: amplifying an input signal by using a first amplification circuit having a common source structure and comprising cross coupled capacitors; amplifying a signal outputted from the first amplification circuit by using a second amplification circuit of a common gate structure; terminating at least a portion of a second harmonic by using a first termination unit connected to output terminals of the first amplification circuit and input terminals of the second amplification circuit; and offsetting at least a portion of parasitic capacitance generated at the output terminals of the first amplification circuit and the input terminals of the second amplification circuit by using the first termination unit.

Various embodiments of the disclosure provide virtual short by using a shunt inductor between a common source (CS) amplifier and a common gate (CG) amplifier of a differential cascode power amplifier, and a finite capacitor performing a function of terminating a 2nd-order harmonic component, thereby enhancing overall performance of a gain, stability, matching, linearity of the power amplifier usable in millimeter waves.

The effect achieved in the disclosure is not limited to that mentioned above, and other effects that are not mentioned above may be clearly understood to those skilled in the art based on the description provided below.

DETAILED DESCRIPTION

Terms used in the disclosure are used to describe specified embodiments and are not intended to limit the scope of other embodiments. The terms of a singular form may include plural forms unless otherwise specified. All of the terms used herein, which include technical or scientific terms, may have the same meaning that is generally understood by a person skilled in the art. It will be further understood that terms, which are defined in a dictionary, may be interpreted as having the same or similar meanings as or to contextual meanings of the relevant related art and not in an idealized or overly formal way, unless expressly so defined herein in the disclosure. In some cases, even if the terms are terms which are defined in the specification, they should not be interpreted as excluding embodiments of the present disclosure.

In various embodiments of the disclosure described below, hardware-wise approach methods will be described by way of an example. However, various embodiments of the disclosure include technology using both hardware and software, and thus do not exclude software-based approach methods.

The disclosure relates to an apparatus for amplifying a signal in a transmission device. Specifically, the disclosure describes technology for reducing a harmonic component and parasitic capacitance generated in a signal processing process.

As used herein, terms indicating a signal, terms indicating an element of a device or a circuit are merely examples for convenience of explanation. Accordingly, the disclosure is not limited to the terms described below, and other terms having the same technical meanings may be used.

For a system using a high frequency, for example, millimeter waves (mmWave), like a 5thgeneration (5G) system, a phased array radio frequency integrated circuit (RFIC) is actively developing. There is a need for development of a power amplifier having high power, high efficiency, high linearity in the RFIC. To increase output power and a gain, a cascode or stacked structure may be applied, and in this case, overall performance of a power amplifier and a transmission device may be degraded due to reduction of a gain of the power amplifier, degradation of matching characteristics, reduction of linearity, which are caused by a capacitive parasitic component seen as a substrate in a common source (CS) drain and a common gate (CG) source. In addition, differential and capacitor neutralization (Cneu) technology may be applied to enhance a gain, stability, and power in a millimeter wave band (for example, 28/39/60 GHz), and the same technology may be applied to implementation of a cascode/stacked power amplifier. Accordingly, the disclosure suggests various embodiments for resonating a parasitic component between a common source amplifier and a common gate amplifier, and terminating a 2nd-order harmonic component.

FIG.1illustrates a transmission device according to various embodiments of the disclosure. The transmission device illustrated inFIG.1may be understood as devices of various types. For example, the transmission device ofFIG.1may be understood as a base station performing wireless communication or some component of a terminal (for example, user equipment (UE)).

Referring toFIG.1, the transmission device includes a communication unit110and a controller120.

The communication unit110performs functions for transmitting and receiving signals via a wireless channel. For example, the communication unit110may perform a function of converting between a baseband signal and a bit stream according to a physical layer standard of a system. For example, when transmitting data, the communication unit110may generate complex symbols by encoding and modulating a transmission bit stream. In addition, when receiving data, the communication unit110may restore a reception bit stream by demodulating and decoding a baseband signal.

In addition, the communication unit110may up-convert a baseband signal into a radio frequency (RF) band signal, and then may transmit the signal via an antenna, and may down-convert an RF band signal received via an antenna into a baseband signal. To achieve this, the communication unit110may include a transmission filter, a reception filter, an amplifier, a mixer, an oscillator, a digital to analog converter (DAC), an analog to digital converter (ADC), or the like. In addition, the communication unit110may include a plurality of transmission and reception paths. Furthermore, the communication unit110may include at least one antenna array including a plurality of antenna elements.

In the hardware aspect, the communication unit110may include a digital unit and an analog unit, and the analog unit may include a plurality of sub-units according to operating power, an operating frequency, or the like. The digital unit may be implemented by at least one processor (for example, a digital signal processor (DSP)).

The communication unit110may transmit and receive signals as described above. Accordingly, an entirety or a portion of the communication unit110may be referred to as a “transmitter,” “receiver,” or “transceiver.” In addition, in the following description, transmitting and receiving via a wireless channel may be used as a meaning including processing by the communication unit110as described above.

The controller120controls overall operations of the transmission device. For example, the controller120may transmit and receive signals via the communication unit110. To achieve this, the controller120may include at least one processor. According to various embodiments, the controller120may control the transmission device to perform operations according to various embodiments as will be described below.

FIG.2illustrates a configuration of a circuit for amplifying a signal in a transmission device according to various embodiments of the disclosure.FIG.2may be understood as a portion of the communication unit110.

Referring toFIG.2, the circuit may include a first amplifier210, a second amplifier220, a harmonic termination unit230, a harmonic termination unit240, a harmonic termination unit250. According to another embodiment, at least one of the harmonic termination unit240and the harmonic termination unit250may be excluded.

The first amplifier210amplifies an input signal and the second amplifier220amplifies a signal outputted from the first amplifier210. That is, the first amplifier210and the second amplifier220form a cascode or stacked amplifier. The first amplifier210is connected to an input terminal of a power amplifier, and the second amplifier220is connected to an output terminal of the power amplifier. The first amplifier210and the second amplifier220may be differential amplifiers. For example, the first amplifier210may have a common source (CS) structure, and the second amplifier220may have a common gate (CG) structure. In addition, the first amplifier210may have a structure according to capacitor neutralization (Cneu) technology, that is, cross-couple-capacitors. In this case, the first amplifier210may increase an overall gain of the amplification circuit.

The harmonic termination units230,240,250terminate or reduce a second-order harmonic signal of a fundamental frequency. Herein, the fundamental frequency may be a carrier frequency of a transmission signal. To achieve this, the harmonic termination units230,240,250may ground the 2nd-order harmonic signal. For example, the harmonic termination units230,240,250may have a structure of a filter allowing a signal of a frequency band of a 2nd-order harmonic to pass therethrough.

In addition, at least one of the harmonic termination units230,240,250may offset at least a portion of parasitic capacitance generated in circuits of the first amplifier210and the second amplifier220. To achieve this, at least one of the harmonic termination units230,240,250may include an element having inductance corresponding to the parasitic capacitance.

FIG.3illustrates an implementation example of a circuit for amplifying a signal in a transmission device according to various embodiments of the disclosure.

Referring toFIG.3, a first amplifier310is a differential amplifier of a common source structure, and includes cross-couple capacitors. Specifically, the first amplifier310includes a first transistor312-1and a second transistor312-2. Source terminals of the two transistors312-1and312-2are grounded, and gate terminals are connected with input terminals302-1and302-2. A drain terminal of the first transistor312-1is connected with one end of a first capacitor314-1, and the other end of the first capacitor314-1is connected with a gate terminal of the second transistor312-2. A drain terminal of the second transistor312-2is connected with one end of a second capacitor314-2, and the other end of the second capacitor314-2is connected with a gate terminal of the first transistor312-1. In addition, the drain terminals of the two transistors312-1and312-2are output terminals of the first amplifier310and are connected with input terminals of a second amplifier320.

The second amplifier320is a differential amplifier of a common gate structure. Specifically, the second amplifier320includes a first transistor322-1and a second transistor322-2, and gate terminals of the transistors322-1and322-2are connected with each other and are connected with one end of a capacitor324and one end of a resistor326. The other end of the capacitor324is grounded and a vias voltage is applied to the other end of the resistor326. Source terminals of the transistors322-1and322-2are input terminals of the second amplifier320and are connected with the first amplifier310, and the drain terminals are output terminals.

A harmonic termination unit330includes a first inductor332-1, a second inductor322-2, and a capacitor334. One end of the first inductor332-1is connected with one of the output terminals of the first amplifier310and one of the input terminals of the second amplifier320, and one end of the second inductor332-2is connected with the other one of the output terminals of the first amplifier310and the other one of the input terminals of the second amplifier320. The other ends of the first inductor332-1and the second inductor332-2are connected with each other, and are also connected with one end of the capacitor334. The other end of the capacitor334is grounded. The first inductor332-1, the second inductor333-2may be referred to as shunt inductors.

A harmonic termination unit340includes a first capacitor342-1, a second capacitor342-2, and an inductor344. One end of the first capacitor342-1is connected with one of the output terminals of the second amplifier320, and one end of the second capacitor342-2is connected with the other one of the output terminals of the second amplifier320. The other ends of the first capacitor342-1and the second capacitor342-2are connected with one another, and are also connected with one end of the inductor344. The other end of the inductor344is grounded.

A harmonic termination unit350includes a first capacitor352-1, a second capacitor352-2, and an inductor354. One end of the first capacitor352-1is connected to one of the input terminals of the first amplifier310, and one end of the second capacitor352-2is connected with the other one of the input terminals of the first amplifier310. The other ends of the first capacitor352-1and the second capacitor352-2are connected with each other, and are also connected with one end of the inductor354. The other end of the inductor354is grounded.

A transformer380converts a differential signal outputted from the second amplifier320into a single-ended signal. To achieve this, the transformer380includes a primary coil382and a secondary coil384.

In the embodiment ofFIG.3, one of the illustrated harmonic termination units330,340,350has a structure of a shunt inductor, and the other harmonic termination units have a structure of a shunt capacitor. However, according to other embodiments, two or three of the harmonic termination units330,340,350may have the structure of the shunt inductor.

As described above, various embodiments of the disclosure can enhance a gain and stability by using a differential shunt inductor which resonates a parasitic component between a common source amplifier and a common gate amplifier, and can enhance linearity of a power amplifier by arranging a finite capacitor performing a 2nd-order harmonic termination function in an inductor and a center tap. In addition, various embodiments of the disclosure can enhance performance of the power amplifier by reducing a secondary non-linearity feedback component generated by use of capacitor neutralization technology by using a circuit for terminating a 2nd-order harmonic.

The above-described technology using the shunt inductor may be substituted for normal 2nd-order harmonic termination technology, or may be additionally applied. In addition, the above-described technology using the shunt inductor may be applied to a differential cascode power amplifier or a differential stacked power amplifier without degrading performance.

FIGS.4A to4Cillustrate equivalent circuits showing operational principles of a circuit for amplifying a signal in a transmission device according to various embodiments of the disclosure.FIGS.4A to4Cillustrate equivalent circuits of each frequency regarding the implementation example ofFIG.3.

FIG.4Aillustrates an operation of a circuit with respect to a differential mode, that is, a fundamental frequency. In the case of a first equivalent circuit411regarding the first amplifier310, compared with those ofFIG.3, source terminals of two transistors are grounded and a drain terminal of each of the two transistors is connected with one end of each of capacitors, and the other end of each of the capacitors is connected with a gate of each of the two transistors. In the case of a second equivalent circuit421regarding the second amplifier320, gates of two transistors are grounded. In the case of a third equivalent circuit431regarding the harmonic termination unit330, one end of each of two inductors is connected to output terminals of the first equivalent circuit411and input terminals of the second equivalent circuit, and the other end of each of the two inductors is grounded. In the case of a fourth equivalent circuit441regarding the harmonic termination unit340, one end of each of two capacitors is connected to output terminals of the second equivalent circuit, and the other end of each of the two capacitors is grounded. In the case of a fifth equivalent circuit451regarding the harmonic termination unit350, one end of each of two capacitors is connected to input terminals of the first equivalent circuit and the other end of each of the two capacitors is grounded.

Referring toFIG.4A, in the first equivalent circuit411in the differential mode, a path having capacitance of —Cgdis formed by a capacitor-neutralized circuit. Since this path differs from a path having capacitance of Cgdin the transistor in the polarity of a current, a feedback current is offset. Accordingly, isolation of a core transistor circuit of a differential operation may increase. In addition, a center tap of a shunt inductor in the third equivalent circuit431positioned between the first equivalent circuit411and the second equivalent circuit421is a virtual ground. Accordingly, with respect to parasitic capacitance facing a substrate at drain terminals of the transistors in the first equivalent circuit411and at source terminals of the transistors in the second equivalent circuit421, inductors in the third equivalent circuit431may resonate, and accordingly, a leakage of a signal may be offset. In other words, parasitic capacitances generated at the drain terminals of the transistors in the first equivalent circuit411and at the source terminals of the transistors in the second equivalent circuit421are offset by the inductors in the third equivalent circuit431. That is, the inductors in the third equivalent circuit431terminate the parasitic capacitances generated in the transistors. To this end, a gain loss of the power amplifier can be prevented and performance can be enhanced. To terminate such parasitic capacitances, inductance of the inductor in the third equivalent circuit431may be set to a value to be able to resonate with the parasitic capacitance. For example, the inductance of the inductor in the third equivalent circuit431may be set as shown in Equation 1 presented below:

In Equation 1, LP1is an inductance of the inductor in the third equivalent circuit431, ffundis a fundamental frequency, Cpis parasitic capacitance. Cpmay be understood as a sum of parasitic capacitance generated at the drain terminal of the transistor in the first equivalent circuit411and parasitic capacitance generated at the source terminal in the second equivalent circuit421.

FIG.4Billustrates an operation of a circuit with respect to a common mode, that is, a 2nd-order harmonic frequency. In the case of a first equivalent circuit412regarding the first amplifier310, compared with those ofFIG.3, source terminals of two transistors are grounded, and a drain terminal of each of the two transistors is connected with one end of each of capacitors, and the other end of each of the capacitors is connected with a gate of each of the two transistors. In the case of a second equivalent circuit422regarding the second amplifier320, each of gates of two transistors is connected to one end of each of capacitors, and the other end of each of the capacitors is grounded. In the case of a third equivalent432regarding the harmonic termination unit330, one end of each of two inductors are connected with output terminals of the first equivalent circuit421and input terminals of the second equivalent circuit, and the other end of each of the two inductors is connected with one end of each of capacitors, and the other end of each of the capacitors is grounded. In the case of a fourth equivalent circuit442regarding the harmonic termination unit340, one end of each of two capacitors is connected to output terminals of the second equivalent circuit, and the other end of each of the two capacitors is connected to one end of each of inductors, and the other end of each of the inductors is grounded. In the case of a fifth equivalent circuit452regarding the harmonic termination unit350, one end of each of two capacitors is connected to input terminals of the first equivalent circuit, and the other end of each of the two capacitors is connected to one end of each of inductors, and the other end of each of the inductors is grounded.

Referring toFIG.4B, in the common mode, with respect to the 2nd-order harmonic frequency which is two times an existing frequency, capacitance of the cross-coupled capacitor neutralization circuit within the first equivalent circuit412overlaps Cgdin the transistor. Accordingly, a great feedback component of the 2nd-order harmonic frequency occurs between a drain and a source of the transistor. However, since the pair of the inductor and the capacitor within the third equivalent circuit432according to an embodiment operates as a series short circuit, the 2nd-order harmonic component is suppressed. Accordingly, linearity of the power amplifier can be greatly enhanced. Similarly, the pairs of the capacitors and the inductors within the fourth equivalent circuit442and the fifth equivalent circuit452also operate as the series short circuit, and accordingly, the 2nd-order harmonic component at the input terminals of the first equivalent circuit412and the output terminals of the second equivalent circuit422is suppressed. To suppress the 2nd-order harmonic component, the capacitance of the capacitor in the third equivalent circuit432may be set to resonate at the 2nd-order harmonic frequency when being coupled with the inductor. For example, the capacitance of the capacitor in the third equivalent circuit432may be set as shown in Equation 2 presented below:

In Equation 2, Cs1/2is capacitance of the capacitor in the third equivalent circuit432, f2ndis a 2nd-order harmonic frequency, and Lp1is an inductance of the inductor in the third equivalent circuit432. Herein, Cs1/2corresponds to half of the capacitance of the capacitor334of the harmonic termination unit330.

FIG.4Cmore schematically illustrates an operation of a circuit with respect to a common mode, that is, a 2nd-order harmonic frequency. In the case of a first equivalent circuit413regarding the first amplifier310, compared with those ofFIG.3, source terminals of two transistors are grounded and drain terminals of the transistors are connected with one end of a capacitor, and the other end of the capacitor is connected with gates of the transistors. In the case of a second equivalent circuit423regarding the second amplifier320, each of gates of the two transistors is connected to one end of a capacitor, and the other end of the capacitor is grounded. In the case of a third equivalent circuit433regarding the harmonic termination unit330, one end of each of two inductors is connected to output terminals of the first equivalent circuit413and input terminals of the second equivalent circuit, and the other end of the inductor is connected to one end of a capacitor and the other end of the capacitor is grounded. In the case of a fourth equivalent circuit443regarding the harmonic termination unit340, one end of two capacitors is connected to output terminals of the second equivalent circuit, and the other end of the two capacitors is connected to one end of an inductor and the other end of the inductor is grounded. In the case of a fifth equivalent circuit453regarding the harmonic termination unit350, one end of two capacitors is connected to input terminals of the first equivalent circuit, and the other end of the two capacitors is connected to one end of an inductor and the other end of the inductor is grounded.

Referring toFIG.4C, in the common mode, with respect to the 2nd-order harmonic frequency which is two times an existing frequency, capacitance of the cross-coupled capacitor neutralization circuit within the first equivalent circuit413overlaps Cgdin the transistor. Accordingly, a great feedback component of the 2nd-order harmonic frequency occurs between a drain and a source of the transistor. However, since the pair of the inductor and the capacitor within the third equivalent circuit433according to an embodiment operates as a series short circuit, the 2nd-order harmonic component is suppressed. Accordingly, linearity of the power amplifier can be greatly enhanced. Similarly, the pairs of the capacitors and the inductors within the fourth equivalent circuit443and the fifth equivalent circuit453also operate as the series short circuit, and accordingly, the 2nd-order harmonic component at the input terminals of the first equivalent circuit413and the output terminals of the third equivalent circuit433is suppressed.

FIG.5illustrates another implementation example of a circuit for amplifying a signal in a transmission device according to various embodiments of the disclosure.FIG.5illustrates a structure in which two power amplifiers are connected.

Referring toFIG.5, a transformer560is connected to input terminals, and after that, a harmonic termination unit550aof a low pass filter (LPF) type, an amplifier510aof a common source structure, a harmonic termination unit530aof a high pass filter (HPF) type, an amplifier520aof a common gate structure, a harmonic termination unit540aof an LPF type, a transformer570, a harmonic termination unit550bof an LPF type, an amplifier510bof a common source structure, a harmonic termination unit530bof an HPF type, an amplifier520bof a common gate structure, a harmonic termination unit540bof an LPF type, and a transformer580.

As shown inFIG.5, the plurality of harmonic termination units530a,540a,550a,530b,540b,550bfor terminating a 2nd-order harmonic component are disposed to enhance performance of the power amplifiers. That is, circuits for terminating the 2nd-order harmonic component, including shunt capacitors (for example, Cp1, Cp2, Cp3, Cp4, Cp5, Cp6, Cp7, Cp8and inductors (for example, Ls1, Ls2, Ls3, Ls4) connected to centers thereof, are formed at respective inputs and outputs of cascode/stacked amplifiers. Additionally, circuits for terminating the 2nd-order harmonic component, including shunt inductors (for example, Lp1, Lp2, Lp3, Lp4) and capacitors (for example, Cs1, Cs2) connected in centers thereof, are further formed between a common source amplifier and a common gate amplifier of each of the cascode/stacked amplifiers. Accordingly, the gain, stability, matching, linearity of all power amplifiers can be enhanced.

An entirety or a part of the parasitic capacitance generated between the common source amplifier and the common gate amplifier is offset by the shunt inductor, and accordingly, the gain, efficiency, stability of the cascode power amplifier can be enhanced. In addition, since impedance from the output terminal of the common source amplifier to the input terminal has a very low value (for example, 10-Ohm or less) at a 2nd-order harmonic frequency, a distortion component may be greatly fed back to the input terminal of the common source amplifier, but a 2nd-harmonic component generated at the output terminal of the common source amplifier and the input terminal of the common gate amplifier is suppressed by the circuit for terminating the 2nd-order harmonic. Accordingly, a phenomenon that the 2nd-order harmonic component is transmitted to the input terminal of the common source amplifier or the output of the common gate amplifier can be reduced, and as a result, secondary distortion caused by the 2nd-order harmonic component can be reduced.

FIG.6illustrates still another implementation example of a circuit for amplifying a signal in a transmission device according to various embodiments of the disclosure.FIG.6illustrates a structure in which a harmonic termination unit of a shunt inductor structure is applied to a stacked power amplifier.

Referring toFIG.6, a circuit includes a first amplifier610, a second amplifier620, a harmonic termination unit630, a harmonic termination unit640, a harmonic termination unit650. The first amplifier610, the harmonic termination unit630, the harmonic termination unit640, the harmonic termination unit650have the same configurations as the first amplifier310, the harmonic termination unit330, the harmonic termination unit340, the harmonic termination unit350ofFIG.3. The second amplifier620includes a first transistor622-1and a second transistor622-2. A gate terminal of the first transistor622-1is connected with one end of a first resistor624-1and one end of a first capacitor626-1, and the other end of the first capacitor626-1is grounded. A gate terminal of the second transistor622-2is connected with one end of a second resistor624-2and one end of a second capacitor626-2, and the other end of the second capacitor626-2is grounded.

FIG.7illustrates yet another embodiment of a circuit for amplifying a signal in a transmission device according to various embodiments of the disclosure.FIG.7illustrates a structure in which a transformer disposed at an input terminal of a power amplifier, and a harmonic termination unit of a shunt inductor structure are coupled to each other.

Referring toFIG.7, a circuit includes a first amplifier710, a second amplifier720, a harmonic termination unit730, a harmonic termination unit740, a harmonic termination unit750. The first amplifier710, the second amplifier720, the harmonic termination unit730, the harmonic termination unit740have the same configurations as the first amplifier310, the second amplifier320, the harmonic termination unit330, the harmonic termination unit340ofFIG.3. The harmonic termination unit750has a shunt inductor structure coupled with a transformer. Specifically, the harmonic termination unit750includes a primary coil752and a secondary coil754, and one end of a capacitor756is connected to a center of the secondary coil754and the other end of the capacitor756is grounded. Accordingly, the primary coil752and the secondary coil754operate as a transformer, and also, the secondary coil754operates as a shunt inductor.

In the circuits according to the above-described various embodiments, a circuit for terminating a harmonic (for example, a harmonic termination unit) includes at least one inductor and at least one capacitor. In this case, a frequency band of a signal that can be removed may vary according to an inductance of one inductor and capacitance of at least one capacitor. Accordingly, a variable capacitor may be installed as at least one capacitor in case that a frequency of a 2nd-order harmonic is changed, and the variable capacitor may be controlled according to the frequency of the 2nd-order harmonic.

FIG.8illustrates a layout of a power amplifier included in a transmission device according to various embodiments of the disclosure.FIG.8illustrates a layout of a circuit according to the implementation example ofFIG.3.

Referring toFIGS.3and8, the first transistor312-1and the second transistor312-2included in the first amplifier310ofFIG.3are disposed at a first part812-1and a second part812-2, and the first capacitor314-1and the second capacitor314-2included in the first amplifier310ofFIG.3are disposed at a third part814-1and a fourth part814-2. The first transistor322-1and the second transistor322-2included in the second amplifier320ofFIG.3are disposed at a fifth part822-1and a sixth part822-2. In addition, the inductors332-1and332-2included in the harmonic termination unit330ofFIG.3may be implemented as a seventh part832-1and an eighth part832-2by using a transmission line, and the capacitor334is disposed at a ninth part834. The first capacitor342-1and the second capacitor342-2of the harmonic termination unit340ofFIG.3are disposed at a tenth part842-1and an eleventh part842-2, and the inductor344may correspond to a twelfth part844. The output terminals ofFIG.3correspond to a thirteenth part802-1and a fourteenth part802-2. The transformer380ofFIG.3is implemented as a fifteenth part880.

FIG.9is a flowchart for amplifying a signal in a transmission device according to various embodiments of the disclosure.FIG.9illustrates an operating method of the transmission device ofFIG.1.

Referring toFIG.9, at step901, the transmission device amplifies an input signal by using a first amplification circuit. Herein, the first amplification circuit may have a common source structure, and may include cross-coupled capacitors.

At step903, the transmission device amplifies a signal outputted from the first amplification circuit by using a second amplification circuit. Herein, the second amplification circuit may have a common gate structure.

At step905, the transmission device terminates at least a portion of a 2ndorder harmonic by using at least one termination circuit. The at least one termination circuit includes at least one of a first termination unit connected to output terminals of the first amplification circuit and input terminals of the second amplification circuit, a second termination unit connected to output terminals of the second amplification circuit, or a third termination unit connected to input terminals of the first amplification circuit.

At step907, the transmission device offsets at least a portion of parasitic capacitance generated at the output terminals of the first amplification circuit and the input terminals of the second amplification circuit by using at least one termination circuit. For example, the transmission device may offset at least a portion of the parasitic capacitance by using at least one inductor having an inductance resonating with the parasitic capacitance.

FIG.10is a flowchart for adaptively terminating a harmonic in a transmission device according to various embodiments of the disclosure.FIG.10illustrates an operating method of the transmission device ofFIG.1.

Referring toFIG.10, at step1001, the transmission device identifies a frequency of a 2nd-order harmonic. The frequency of the 2nd-order harmonic is two times a fundamental frequency, and the fundamental frequency may be the same as a carrier frequency. Accordingly, the transmission device may identify the fundamental frequency by identifying a band in which current communication is performed, and may identify the frequency of the 2nd-order harmonic from the fundamental frequency. Herein, the band in which communication is performed may refer to an operating frequency band or a bandwidth part (BWP).

At step1003, the transmission device tunes a pass band of at least one harmonic termination circuit according to the frequency of the 2nd-order harmonic. That is, the at least one harmonic termination circuit has a structure of an HPF type or an LPF type, and includes at least one inductor and at least one capacitor. Herein, the at least one capacitor includes a variable capacitor. Accordingly, the transmission device may tune the pass band by tuning capacitance of the variable capacitor.

FIG.11illustrates performance of the circuit for amplifying a signal in the transmission device according to various embodiments of the disclosure.FIG.11illustrates an intermodulation distortion according to input radio frequency (RF) power in a first case1110where harmonic termination is not performed, a second case1120where harmonic termination is performed only at an output terminal, a third case1130where harmonic termination is performed only in a center, that is, in a center of a common source amplifier and a common gate amplifier, a fourth case1140where harmonic termination is performed at both an output terminal and a center. Referring toFIG.11, it is identified that the intermodulation distortion is reduced, that is, linearity is enhanced in the order of the first case1110, the second case1120, the third case1130, and the fourth case1140.

Methods based on the claims or the embodiments disclosed in the disclosure may be implemented in hardware, software, or a combination of both.

When implemented in software, a computer readable storage medium for storing one or more programs (software modules) may be provided. The one or more programs stored in the computer readable storage medium are configured for execution performed by one or more processors in an electronic device. The one or more programs include instructions for allowing the electronic device to execute the methods based on the claims or the embodiments disclosed in the disclosure.

The program (the software module or software) may be stored in a random access memory, a non-volatile memory including a flash memory, a read only memory (ROM), an electrically erasable programmable read only memory (EEPROM), a magnetic disc storage device, a compact disc-ROM (CD-ROM), digital versatile discs (DVDs) or other forms of optical storage devices, and a magnetic cassette. Alternatively, the program may be stored in a memory configured in combination of all or some of these storage media. In addition, the configured memory may be plural in number.

Further, the program may be stored in an attachable storage device capable of accessing the electronic device through a communication network such as the Internet, an Intranet, a local area network (LAN), a wide LAN (WLAN), or a storage area network (SAN) or a communication network configured by combining the networks. The storage device may access via an external port to a device which performs the embodiments of the disclosure. In addition, an additional storage device on a communication network may access to a device which performs the embodiments of the disclosure.

In the above-described specific embodiments of the disclosure, elements included in the disclosure are expressed in singular or plural forms according to specific embodiments. However, singular or plural forms are appropriately selected according to suggested situations for convenience of explanation, and the disclosure is not limited to a single element or plural elements. An element which is expressed in a plural form may be configured in a singular form or an element which is expressed in a singular form may be configured in plural number.