Semiconductor device

In a semiconductor device in which a diode and an IGBT are formed in a main region of a same semiconductor substrate, in order to obtain a sufficiently large sense IGBT current in a stable manner, a sense region is provided with a first region in which a distance from an end of a main cathode region on a side of the sense region in a plan view of the semiconductor substrate is equal to or longer than 615 μm. Alternatively, in order to obtain a sufficiently large sense diode current in a stable manner, the sense region is provided with a second region in which a distance from the main cathode region in a plan view of the semiconductor substrate is equal to or shorter than 298 μm. The sense region may be provided with both the first region and the second region.

This is a 371 national phase application of PCT/JP2010/057814 filed 7 May 2010, the contents of which are incorporated herein by reference.

TECHNICAL FIELD

The technique described in the present description relates to a semiconductor device in which a diode and an IGBT are formed in a same semiconductor substrate.

BACKGROUND ART

In order to prevent destruction due to an overcurrent, a semiconductor device is provided with a sense region for sensing a current that flows through the semiconductor device. Japanese Patent Application Publication No. H7-245394 (patent document 1) discloses a semiconductor device provided with a main region in which an IGBT is formed and a sense region for sensing a current that flows through the main region, wherein the main region and the sense region are formed on a same semiconductor substrate. An IGBT similar to that of the main region is built into the sense region, and the sense region and the main region are arranged separated from each other by 100 μm or more. Accordingly, carrier interference in a boundary region between the sense region and the main region is prevented, and a current ratio of a main current that flows through the main region to a sense current that flows through the sense region is kept approximately constant.Patent Document 1: Japanese Patent Application Publication No. H7-245394

SUMMARY OF INVENTION

Technical Problem

In a semiconductor device in which a diode and an IGBT are formed in a same semiconductor substrate, the diode comprises a first conductivity type anode region, a second conductivity type diode drift region, and a second conductivity type cathode region. The IGBT comprises a first conductivity type collector region, a second conductivity type drift region, a first conductivity type body region, a second conductivity type emitter region, and an insulated gate electrode. Since the diode and the IGBT are arranged adjacent to each other in the same semiconductor substrate, the second conductivity type cathode region and the first conductivity type collector region are formed adjacent to each other on a lower surface side of the semiconductor substrate.

The present inventor has discovered that, when further installing a sense region in a same semiconductor substrate of such a semiconductor device, depending on a distance between the sense region and a cathode region on a lower surface of the semiconductor substrate, there are cases where the sense region senses a diode current of a main region and cases where the sense region senses an IGBT current of the main region.

Solution to Technical Problem

A first semiconductor device disclosed in the present description comprises a semiconductor substrate including a main region and a sense region, the sense region being smaller than the main region in a plan view of the semiconductor substrate. In this semiconductor device, the main region comprises a main diode and a main IGBT, wherein the main diode comprises: a first conductivity type main anode region formed on an upper surface of the semiconductor substrate; a second conductivity type main diode drift region formed on a lower side of the main anode region; and a second conductivity type main cathode region formed on a lower side of the main diode drift region and on a lower surface of the semiconductor substrate, and the main IGBT comprises: a first conductivity type main collector region formed on a lower surface of the semiconductor substrate; a second conductivity type main drift region formed on an upper side of the main collector region; a first conductivity type main body region formed on an upper side of the main drift region and on an upper surface of the semiconductor substrate; a second conductivity type main emitter region formed on a part of an upper surface of the main body region; and a main insulated gate electrode formed from an upper surface of the main emitter region to a depth in which the main body region comes into contact with the main drift region. The sense region comprises: a first conductivity type sense collector region formed at least on a part of a lower surface of the semiconductor substrate; a second conductivity type sense drift region formed on an upper side of the sense collector region; a first conductivity type sense body region formed on an upper side of the sense drift region and on an upper surface of the semiconductor substrate; a second conductivity type sense emitter region formed on a part of an upper surface of the sense body region; and a sense insulated gate electrode formed from an upper surface of the sense emitter region to a depth in which the sense body region comes into contact with the sense drift region, wherein the sense region includes a first region, and a distance from the main cathode region to the sense emitter region of the first region in a plan view of the semiconductor substrate is equal to or longer than 615 μm.

According to the first semiconductor device, since the sense emitter region of the sense region includes a first region in which a distance from the main cathode region to the sense emitter region in a plan view of the semiconductor substrate is equal to or longer than 615 μm, an IGBT current that flows through the IGBT in the main region can be accurately sensed by the sense region.

The sense region may further comprise a second region, and a distance from the main cathode region to the sense emitter region of the first region in a plan view of the semiconductor substrate is equal to or shorter than 298 μm. A diode current that flows through the diode in the main region can also be accurately sensed by the sense region.

The sense drift region, the sense body region, the sense emitter region, and the sense insulated gate electrode may be formed continuously from the first region to the second region in the plan view of the semiconductor substrate.

A diffusion layer may be formed in at least a part of a region between the first region and the second region, the diffusion layer extending from the upper surface of the semiconductor substrate in a depth direction.

The diffusion layer may be formed in a region of which a distance from the main cathode region in the plan view of the semiconductor substrate is longer than 298 μm and shorter than 615 μm.

A second semiconductor device disclosed in the present description comprises a semiconductor substrate including a main region and a sense region, the sense region being smaller than the main region in a plan view of the semiconductor substrate. In this semiconductor device, the main region comprises a main diode and a main IGBT, wherein the main diode comprises: a first conductivity type main anode region formed on an upper surface of the semiconductor substrate; a second conductivity type main diode drift region formed on a lower side of the main anode region; and a second conductivity type main cathode region formed on a lower side of the main diode drift region and on a lower surface of the semiconductor substrate, and the main IGBT comprises: a first conductivity type main collector region formed on a lower surface of the semiconductor substrate; a second conductivity type main drift region formed on an upper side of the main collector region; a first conductivity type main body region formed on an upper side of the main drift region and on an upper surface of the semiconductor substrate; a second conductivity type main emitter region formed on a part of an upper surface of the main body region; and a main insulated gate electrode formed from an upper surface of the main emitter region to a depth in which the main body region comes into contact with the main drift region. The sense region comprises: a first conductivity type sense collector region formed on at least a part of a lower surface of the semiconductor substrate; a second conductivity type sense drift region formed on an upper side of the sense collector region; a first conductivity type sense body region formed on an upper side of the sense drift region and on an upper surface of the semiconductor substrate; a second conductivity type sense emitter region formed on a part of an upper surface of the sense body region; and a sense insulated gate electrode formed from an upper surface of the sense emitter region to a depth in which the sense body region comes into contact with the sense drift region, wherein the sense region includes a second region, and a distance from the main cathode region of the second region to the sense emitter region in a plan view of the semiconductor substrate is equal to or shorter than 298 μm.

According to the second semiconductor device, since the sense emitter region of the sense region includes the second region in which the distance from the main cathode region to the sense emitter region in the plan view of the semiconductor substrate is equal to or shorter than 298 μm, the IGBT current that flows through the IGBT in the main region can be accurately sensed by the sense region.

DESCRIPTION OF EMBODIMENTS

First Embodiment

Hereinafter, a first embodiment of the present invention will be described with reference to the drawings.FIG. 1is a plan view of a semiconductor device100. As shown inFIG. 1, the semiconductor device100comprises a main region5, a sense region3, and a termination region7that surrounds the main region5and the sense region3, all formed on a semiconductor substrate10. The sense region3is smaller than the main region5.

FIG. 2is an enlarged view of a vicinity of a boundary portion between the main region5and the sense region3of the semiconductor device100shown inFIG. 1, andFIG. 3is an enlarged view of a cross section taken along a line inFIG. 2.

As shown inFIGS. 2 and 3, the main region5comprises a main diode region1and a main IGBT region2. The semiconductor substrate10comprises a first N+layer11, a first P+layer12adjacent to the first N+layer11, an N−layer13formed on upper surfaces of the first N+layer11and the first P+layer12, and P−layers141a,141c,142a,142c,143a, and143cand P layers151,152, and153formed on an upper surface of the N−layer13. Second P+layers161aand161cand second N+layers171ato171dare provided on upper surfaces of the P−layers141aand141c. Second P+layers162aand162cand second N+layers172ato172dare provided on upper surfaces of the P−layers142aand142e. Second P+layers163aand163cand second N+layers173ato173dare provided on upper surfaces of the P−layers143aand143c. Moreover, the P−layers141a,141c,142a,142c,143a, and143chave similar structures. The second P+layers161a,161c,162a,162c,163a, and163chave similar structures. The second N+layers171ato171d,172ato172d, and173ato173dhave similar structures. Reference numerals141,161, and171are assigned to layers included in the main diode region1. Reference numerals142,162, and172are assigned to layers included in the main IGBT region2. Reference numerals143,163, and173are assigned to layers included in the sense region3. The P layers151,152, and153are formed to deeper positions in the semiconductor substrate10compared to the P−layers141a,141c,142a,142c,143a, and143c. The P layers151,152, and153are diffusion layers that do not contribute to electrical conduction. The sense region3is enclosed by the P layer152and the main region5is enclosed by the P layer153. The P layers152and153suppress migration of carriers between the sense region3and the main region5. In other words, the P layers152and153are element isolation layers.

A plurality of trench gates18is provided from an upper surface of the semiconductor substrate10towards the N−layer13. A depth of the trench gates18is deeper than the P−layers141a,141c,142a,142c,143a, and143cand shallower than the P layers151,152, and153. Each trench gate18comprises a gate insulating film192formed in a trench191and a gate electrode193filled into the trench191. The second N+layers171ato171d,172ato172d, and173ato173dare respectively in contact with the trench gates18. A longitudinal direction of the trench gates18is parallel to an x-axis direction shown inFIG. 2.

As shown inFIGS. 2 and 3, the main diode region1is a region in which the first N+layer11is formed on a lower surface side of the semiconductor substrate10among the main region5. The main diode region1comprises the first N+layer11as a main cathode region, the N−layer13as a main diode drift region, and the P−layers141aand141cand the second P+layers163aand163cas a main anode region.

The main IGBT region2is a region in which the first P+layer12is formed on a lower surface side of the semiconductor substrate10among the main region5. The main IGBT region2comprises the first P+layer12as a main collector region, the N−layer13as a main IGBT drift region, the P−layers142aand142cas a main IGBT body region, the second N+layers172ato172das a main emitter region, the second P3+layers162aand162cas a main body contact region, and the trench gates18as a main insulating gate.

In the present embodiment, a boundary between the main diode region1and the main IGBT region2is a boundary between the first N+layer11and the first P+layer12formed on the lower surface side of the semiconductor substrate10. The boundary between the first N+layer11and the first P+layer12is shown as a line segment AB inFIGS. 2 and 3. The boundary (the line segment AB) between the first N+layer11and the first P+layer12is parallel to the longitudinal direction of the trench gates18. In other words, the boundary (the line segment AB) between the first N+layer11and the first P+layer12is parallel to the x axis shown inFIG. 2. As shown inFIGS. 2 and 3, the main diode region1and the main IGBT region2have a same construction of the N−layer13of the semiconductor substrate10and a layer formed on an upper surface of the N−layer13(a layer on an upper surface side of the N−layer13), and only differ from each other in a layer on a lower surface side of the N−layer13(the first N+layer11or the first P+layer12). In other words, in the main region5of the semiconductor device100, setting the first N+layer11as the layer on the lower surface side of the semiconductor substrate10results in the main diode region1and setting the first P+layer12as the layer on the lower surface side of the semiconductor substrate10results in the main IGBT region2.

The sense region3is arranged on an upper surface side of the first P+layer12in a similar manner to the main IGBT region2. As shown inFIG. 2, the sense region3is longer in the x axis direction and shorter in a y axis direction. As shown inFIGS. 2 and 3, the sense region3is arranged adjacent to the main IGBT region2. A main collector region of the main IGBT region2and a sense collector region of the sense region3are formed as a same layer (the first P+layer12). A construction of a layer of the sense region3on an upper surface side of the N−layer13is similar to those in the main diode region1and the main IGBT region2. In other words, in the sense region3, the first P+layer12is used as a sense collector region, the N−layer13is used as a sense drift region, the P−layers143aand143care used as a sense body region, the second N+layers173ato173dare used as a sense emitter region, the second P+layers163aand163care used as a sense body contact region, and the trench gate18are used as sense insulating gates.

The boundary (the line segment AB) between the first P+layer12and the first N+layer11is outside the P layer152formed around the sense region3and exists between the main diode region1and the main IGBT region2. The boundary (the line segment AB) between the first P+layer12and the first N+layer11does not exist between the sense region3and the main IGBT region2. A distance D11shown inFIG. 3from the line segment AB to an end of the second N+layer173dthat is a sense emitter region on a side of the main region5is D11≧615 μm. The distance D11corresponds to a distance from an end of the main cathode region (the first N+layer11) on a side of the sense region3to an end of the second N+layer173dthat is a sense emitter region on a side of the main region5.

A diffusion layer region4is adjacent to the sense region3and is arranged on a circumferential edge side of the semiconductor substrate. The diffusion layer region4comprises the P layer151that is a deep diffusion layer. The P layer151is a diffusion layer that does not contribute to electrical conduction.

The first N+layer11and the first P+layer12of the semiconductor device100are connected to a lower surface electrode (not shown). The second N+layers171ato171dand172ato172d, and the second P+layers161a,161c,162a, and162care connected to a main upper surface electrode (not shown). The second N+layers173ato173dand the second P+layers163aand163care connected to a sense upper surface electrode (not shown).

If a potential Va of the lower surface electrode is set higher than a potential Vb of the main upper surface electrode and a potential Vc of the sense upper surface electrode (Va>Vb, Vc) and a positive voltage (positive bias) is applied to the gate electrode193, then a channel is formed in the main IGBT region2in the P−layers142aand142c(the main body region) in a vicinity of the trench gates18. Accordingly, a main IGBT current I2flows from the first P+layer12(the main collector region) to the second N+layers172ato172d(the main emitter region). A current does not flow in the main diode region1.

Meanwhile, if the potential Va of the lower surface electrode is set lower than the potential Vb of the main upper surface electrode and the potential Vc of the sense upper surface electrode (Va<Vb, Vc), a main diode current I1flows in the main diode region1from the second P+layers161aand161cand the P−layers141aand141c(the main anode region) to the first N+layer11(the main cathode region) via the N−layer13. A current does not flow in the main IGBT region2.

The present inventor has discovered that, depending on a distance between the sense region and the main cathode region on the lower surface of the semiconductor substrate, there are cases where the sense region senses a main diode current I1and cases where the sense region senses a main IGBT current I2.

FIGS. 4 and 5show results of a study on how a current flowing through the sense region3changes depending on a distance between the sense region3and the main cathode region (the first N+layer11) on the lower surface of the semiconductor substrate10. As shown inFIG. 6, the current flowing through the sense region3was measured by connecting a semiconductor device100mto a measuring circuit. The semiconductor device100mdiffers from the semiconductor device100in a pattern of a first N+layer11and a first P+layer12on a lower surface side of a semiconductor substrate10m. Since other components of the semiconductor device100mare similar to those of the semiconductor device100, overlapping descriptions will be omitted.

The semiconductor device100min which a distance D between the sense region3and a main cathode region (the first N+layer11) on the lower surface of the semiconductor substrate10has been changed was manufactured by translating a position of an end of a main cathode region on a side of the sense region on the lower surface side of the semiconductor substrate10m(in the present embodiment, corresponds to a position of a boundary (a line segment AB) between the first N+layer11and the first P+layer12) in a direction parallel to a longitudinal direction of a trench (the y axis direction shown inFIG. 2). Moreover, a thickness of the semiconductor substrate10mwas set to 160 μm. Electrodes91,93, and95were formed on each of the semiconductor devices100min which a position of an end of the main cathode region on a sense region side was changed. Specifically, a sense upper surface electrode93was formed on an upper surface side of the sense region3, a main upper surface electrode95was formed on an upper surface of the main region5, and a lower surface electrode91was formed on the lower surface side. The semiconductor device100mon which the electrodes91,93, and95were formed was connected to a measuring circuit90shown inFIG. 6. Specifically, a sense emitter terminal SE of a measuring device92was connected to the sense upper surface electrode93, a main emitter terminal ME was connected to the main upper surface electrode95, a main collector terminal MC and a sense collector terminal SC were connected to the lower surface electrode91, and a gate terminal G was connected to a trench gate terminal. Furthermore, a shunt resistor R was connected between the sense emitter terminal SE and the sense collector terminal SC. Shunt resistors R of 5Ω, 10Ω, and 15Ω were respectively used. The sense emitter terminal SE and the main emitter terminal ME were grounded, and the main collector terminal MC and the sense collector terminal SC were set to a common potential that causes a collector current to equal a rated current. A gate voltage of 15V was applied to the gate terminal G. A value of a current flowing through the sense region was measured using the measuring circuit90for each of the semiconductor devices100min which the position of the end of the main cathode region on a sense region side was changed. Values of currents flowing through the shunt resistors were obtained by measuring a voltage drop at both ends of the 5Ω, 10Ω, and 15 Ω shunt resistors R and were further plotted on an xy coordinate system with an x axis representing resistance values of the shunt resistors R and a y axis representing currents flowing through the shunt resistors. Data of the plotted current values was extrapolated by a straight line, a value of a y intercept (a current value when a shunt resistance value is 0) was obtained, and the value of the y intercept was used as a sense current value.

FIG. 4shows a value of a sense current (in other words, a sense IGBT current) flowing through the sense region3as measured by the measuring circuit90when Va>Vb, Vc and a positive bias is applied to the gate electrode (when the main IGBT current I2flows).FIG. 5shows a value of a sense current (in other words, a sense diode current) flowing through the sense region3as measured by the measuring circuit90when Va<Vb, Vc (when a main diode current I1flows). Experimental points inFIGS. 4 and 5represent experimental data described in Table 1 below, and curves represent regression equations based on the experimental data shown in Table 1. The curve inFIG. 4is represented by Equation (1) below, and the curve inFIG. 5is represented by Equation (2) below.

As shown inFIG. 4, when distance D≦132 μm, the sense IGBT current hardly flows through the sense region3and has an approximately constant value. However, when the distance D exceeds 132 μm, the sense IGBT current increases as the distance D increases. When the distance D becomes D≧615 μm, a variation of the sense IGBT current with respect to the distance D decreases and the sense IGBT current once again converges to a constant value (26 mA). This constant value is a maximum value of the sense IGBT current that can be sensed by the sense region3. If the sense IGBT current with a magnitude that equals or exceeds 90% (23.4 mA or greater) of the maximum value (26 mA) of the sense IGBT current can be sensed, a main IGBT current can be accurately sensed based on a measurement value of the sense IGBT current. According to Equation (1), when the distance D≧615 μm, the sense IGBT current with the magnitude that equals or exceeds 90% of the maximum value of the sense IGBT current can be sensed.

Meanwhile, regarding the sense diode current flowing through the sense region3, as shown inFIG. 5, when distance D≧605 μm, the sense diode current hardly flows through the sense region3and has an approximately constant value. However, when the distance D falls below 605 μm, the sense diode current increases as the distance D decreases. When the distance D becomes D≦298 μm, a variation of the sense diode current with respect to the distance D decreases and the sense diode current once again converges to a constant value (70 mA). This constant value is a maximum value of the sense diode current that can be sensed by the sense region3. If the sense diode current with a magnitude that equals or exceeds 90% (63 mA or greater) of the maximum value (70 mA) of the sense diode current can be sensed, the main diode current can be accurately sensed based on the measurement value of the sense diode current. According to Equation (2), when the distance D≦298 μm, the sense diode current with the magnitude that equals or exceeds 90% of the maximum value of the sense diode current can be sensed.

InFIGS. 4 and 5, an abscissa D represents a distance from an end of the main cathode region on a side of the sense region to an end of the sense emitter region on a side of the main region in a plan view of the semiconductor substrate10. For example, a distance D11from an, end of the main cathode region (the first N+layer11) on a side of the sense region3or, in other words, from the line segment AB that is a boundary between the first P+layer12and the first N+layer11to an end of the N+layer173dthat is a sense emitter region on a side of the main region5inFIGS. 2 and 3corresponds to a distance represented by the abscissa D inFIGS. 4 and 5.

In the semiconductor device100, the sense region3is installed on the upper surface side of the first P+layer12in a similar manner to the main IGBT region2. Since the distance D11from the end of the main cathode region (the first N+layer11) on the side of the sense region3(in other words, the line segment AB) to the end of the second N+layer173dthat is the sense emitter region on the side of the main region5is equal to or longer than 615 μm, the second N+layers173ato173dwhich become the sense emitter region of the sense region3are all in the first region which has the distance of 615 μm or longer from the end of the main cathode region on the side of the sense region in a plan view of the semiconductor substrate, and the sense region3satisfies conditions as the first region. Therefore, the current flows through the sense region3in a similar manner to the main IGBT region2. Specifically, a current hardly flows through the sense region3when Va<Vb, Vc. On the other hand, when Va>Vb, Vc and a positive bias is applied to the gate electrode, a sense IGBT current I12flows from the first P+layer12(the sense collector region) to the second N+layers173ato173d(the sense emitter region), and a current of this sense IGBT current is equal to or greater than 90% of the maximum value of the sense IGBT current. According to the semiconductor device100, since a sufficiently large sense IGBT current I12can be obtained in a stable manner, the sensing accuracy of the main IGBT current by the sense region3can be enhanced.

As described above, the present embodiment comprises the first region (in other words, a region in which the distance from the main cathode region to the sense emitter region in the plan view of the semiconductor substrate is equal to or longer than 615 μm). Accordingly, since the sufficiently large sense IGBT current I12(the current that is equal to or greater than 90% of the maximum value of the sense IGBT current) flows through the sense region3in a stable manner, a ratio between the main IGBT current that flows through the main IGBT region and the sense IGBT current that flows through the sense region becomes sufficiently large and stabilizes. As a result, the main IGBT current can be accurately sensed using the sense region.

Moreover, a ratio I12/I2between the sense IGBT current I12and the main IGBT current I2is dependent on a ratio S12/S2between an area S2of the main IGBT region2and an area S12of the first region of the sense region3on the upper surface of the substrate. By adjusting the area ratio S12/S2, the ratio I12/I2between the sense IGBT current I12and the main IGBT current I2can be adjusted. If the ratio I12/I2is known, by sensing the sense IGBT current I12, the main IGBT current I2can be sensed. For example, by connecting, in series, the shunt resistor (resistance value R) in advance to the circuit through which the sense IGBT current flows and measuring a voltage drop RI12on both ends of the shunt resistor, the sense IGBT current value I12can be sensed. The main IGBT current I2can be sensed based on the sensed sense IGBT current I12and the ratio I12/I2.

Second Embodiment

FIG. 7is a plan view of a semiconductor device200according to a second embodiment showing a vicinity of a boundary portion between a main region5and a sense region3of a semiconductor substrate20.FIG. 8is an enlarged view of a cross-section taken along line VIII-VIII inFIG. 7. Moreover, the plan view showing an entire semiconductor device200is similar to the semiconductor device100shown inFIG. 1and, also in the semiconductor device200, the sense region3is smaller than the main region5.

The semiconductor device200differs from the semiconductor device100in a position of a boundary (a line segment AB) between a first P+layer12and a first N+layer11formed on a lower surface side of the semiconductor substrate20. Even in the semiconductor device200, the boundary (the line segment AB) between the first P+layer12and the first N+layer11is parallel to an x axis direction shown inFIG. 7. In the main region5, a region in which the first N+layer11is formed becomes a main diode region1and a region in which the first P+layer12is formed becomes an IGBT region2. In a similar manner to the main diode region1, the sense region3comprises a region in which the first N+layer11is formed and a region in which the first P+layer12is formed. Since other components are similar to those of the semiconductor device100, similar components will be denoted using similar reference numerals in order to omit overlapping descriptions. Moreover, while the boundary (the line segment AB) between the first P+layer12and the first N+layer11in the main region5is not depicted in a cross section shown inFIG. 8, in a similar manner to the first embodiment, a boundary between the first N+layer11and the first P+layer12exists in the main region5of the semiconductor device200, and a boundary between the main diode region1and the main IGBT region2is consistent with the boundary between the first N+layer11(a main cathode region) and the first P+layer12(a main collector region).

In the present embodiment, as shown inFIGS. 7 and 8, the boundary (the line segment AB) between the first P+layer12and the first N+layer11is positioned below the sense region3. A distance D21from an end of the main cathode region (the first N+layer11) on a side of the sense region3(in other words, the line segment AB) to an end of the second N+layer173athat is a sense emitter region on a side of the main region5is D21≦298 μm. A distance from second N+layers173cand173dthat are installed on an upper surface side of the first N+layer11in a similar manner to the second N+layer171ain the main diode region1from an end of the main cathode region on a side of the sense region3is smaller than zero. In other words, the second N+layers173ato173dthat become a sense emitter region of the sense region3all have a distance that is equal to or shorter than 298 μm from the end of the main cathode region on a side of the sense region in a plan view of the semiconductor substrate. Therefore, in the present embodiment, the sense region3satisfies conditions as a second region.

In a similar manner to the first embodiment, the first N+layer11and the first P+layer12of the semiconductor device200are connected to a lower surface electrode (not shown), second N+layers171ato172dand172ato172dand second P+layers161a,161c,162a, and162care connected to a main upper surface electrode (not shown), and second N+layers173ato173dand second P+layers163aand163care connected to a sense upper surface electrode (not shown).

When a potential Va of the lower surface electrode is set lower than a potential Vb of the main upper surface electrode and a potential Vc of the sense upper surface electrode (Va<Vb, Vc), a main diode current I1flows through the main diode region1but a current does not flow through the main IGBT region2. On the other hand, if the potential Va of the lower surface electrode is set higher than the potential Vb of the main upper surface electrode and the potential Vc of the sense upper surface electrode and a positive voltage (a positive bias) is applied to a gate electrode (Va>Vb, Vc), then a main IGBT current I2flows through the main IGBT region2but a current does not flow through the main diode region1.

Since the second N+layers173ato173dthat become a sense emitter region of the sense region3all have a distance that is equal to or shorter than 298 μm from the end of the main cathode region on a side of the sense region in a plan view of the semiconductor substrate and the sense region3is a second region, as shown inFIGS. 4 and 5, a current (a sense diode current) flows in a similar manner to the main diode region1when Va<Vb, Vc, and a magnitude of the sense diode current is equal to or greater than 90% of a maximum value of the sense diode current. On the other hand, when Va>Vb, Vc and a positive bias is applied to the gate electrode, a current hardly flows through the sense region3. In the present embodiment, since a sufficiently large sense diode current I11flows through the sense region3in a stable manner, a sensing accuracy of the main diode current by the sense region3can be enhanced.

As described above, the present embodiment comprises a second region (a region in which a distance from the main cathode region to the sense emitter region in a plan view of the semiconductor substrate is equal to or shorter than 298 μm). Accordingly, since the sufficiently large sense diode current I11(a current that is equal to or greater than 90% of a maximum value of the sense diode current) can be obtained in a stable manner, a ratio between the main diode current that flows through the main diode region and the sense diode current that flows through the sense region becomes sufficiently large and stabilizes. As a result, the main diode current can be accurately sensed using the sense region3.

Moreover, a ratio I11/I1between the sense diode current I11and the main diode current I1is dependent on a ratio S11/S1between an area S1of the main diode region1and an area S11of the second region of the sense region on the upper surface of the substrate. By adjusting the area ratio S11/S1, the ratio I11/I1between the sense diode current I11and the main diode current I1can be adjusted. If the ratio I11/I1is known, by sensing the sense diode current I11, the main diode current I1can be sensed. For example, by connecting, in series, a shunt resistor (resistance value R) in advance to a circuit through which a sense diode current flows and measuring a voltage drop RI11on both ends of the shunt resistor, the sense diode current value I11can be sensed. The main diode current I1can be sensed based on the sensed sense diode current I11and the ratio I11/I1.

Moreover, it is obvious that the first embodiment and the second embodiment described above can be used in combination with each other. For example, two sense regions may be provided, wherein one is a sense region comprising a first region and the other is a sense region comprising a second region.

Third Embodiment

FIG. 9is a plan view of a semiconductor device300according to a present embodiment showing a vicinity of a boundary portion between a main region5and a sense region3of a semiconductor substrate30.FIG. 10is an enlarged view of a cross-section taken along line X-X inFIG. 9. Moreover, the plan view showing an entire semiconductor device300is similar to the semiconductor device100shown inFIG. 1and, also in the semiconductor device300, the sense region3is smaller than the main region5.

As shown inFIGS. 9 and 10, the semiconductor device300differs from the semiconductor device100in a position of a boundary (a line segment AB) between a first P+layer12and a first N+layer11formed on a lower surface side of the semiconductor substrate30. Even in the semiconductor device300, the boundary (the line segment AB) between the first P+layer12and the first N+layer11is parallel to an x axis direction shown inFIG. 9. In the main region5, a region in which the first N+layer11is formed becomes a main diode region1and a region in which the first P+layer12is formed becomes an IGBT region2. In addition, in the semiconductor device300, the sense region3includes a sense region31and a sense region32. The sense region31and the sense region32are arranged on an upper surface side of the first P+layer12in a similar manner to the main IGBT region2(not shown inFIG. 10). Since other components are similar to those of the semiconductor device100, similar components will be denoted using similar reference numerals in order to omit overlapping descriptions. Moreover, while the boundary (the line segment AB) between the first P+layer12and the first N+layer11in the main region5is not depicted in a cross section shown inFIG. 10, in a similar manner to the first and second embodiments, a boundary between the first N+layer11and the first P+layer12exists in the main region5of the semiconductor device300, and a boundary between the main diode region1and the main IGBT region2is consistent with the boundary between the first N+layer11(a main cathode region) and the first P+layer12(a main collector region).

In the present embodiment, as shown inFIGS. 9 and 10, the sense region31and the sense region32are installed adjacent to each other. The sense region31and the sense region32are respectively enclosed by a P layer152that is a diffusion layer in a similar manner to the sense region3in the first embodiment. A main collector region of the main IGBT region2and a sense collector region of the sense region31and the sense region32are formed as a same layer (the first P+layer12).

The sense region31is arranged adjacent to the main diode region1, and the sense region32is arranged at a position further than the sense region31from the main diode region1. A part of the boundary (the line segment AB) between the first P+layer12and the first N+layer11is positioned in a region between the sense region31and the main diode region1. A region between the sense region31and the sense region32is provided only with an N−layer13and a P layer152above the first P+layer12and is a region that does not contribute to electrical conduction.

A second N+layer173ethat becomes a sense emitter region of the sense region31has a distance D31that is equal to or shorter than 298 μm from an end of the first N+layer11that is a main cathode region on a side of the sense region in a plan view of the semiconductor substrate. In other words, the second N+layers173eto173hof the sense region31all have a distance that is equal to or shorter than 298 μm from the end of the main cathode region (the first N+layer11) on the side of the sense region in a plan view of the semiconductor substrate. Therefore, the sense region31satisfies conditions as a second region. A second N+layer173dthat becomes a sense emitter region of the sense region32has a distance D32that is equal to or longer than 615 μm from the end of the main cathode region (the first N+layer11) on the side of the sense region in a plan view of the semiconductor substrate. In other words, the second N+layers173ato173dof the sense region32all have a distance that is equal to or longer than 615 μm from the end of the main cathode region (the first N+layer11) on the side of the sense region in a plan view of the semiconductor substrate. Therefore, the sense region32satisfies conditions as a first region.

In a similar manner to the first and second embodiments, the first N+layer11and the first P+layer12of the semiconductor device300are connected to a lower surface electrode, second N+layers171ato171dand172ato172dand second P+layers161a,161c,162a, and162c(not shown inFIG. 10) of the main diode region1and the main IGBT region2are connected to a main upper surface electrode, and second N+layers173ato173hand second P+layers161a,161c,161e, and161gof the sense region31and the sense region32are connected to a sense upper surface electrode. Since the sense regions31and32are arranged adjacent to each other, for example, the sense regions31and32can be connected by a single electrode pad.

When a potential Va of the lower surface electrode is set lower than a potential Vb of the main upper surface electrode and a potential Vc of the sense upper surface electrode (Va<Vb, Vc), a main diode current I1flows through the main diode region1but a current does not flow through the main IGBT region2.

Since the sense region31satisfies conditions as a second region, as shown inFIGS. 4 and 5, a sense diode current I11flows when Va<Vb, Vc in a similar manner to the main diode region1. A magnitude of the sense diode current I11is equal to or greater than 90% of a maximum value of the sense diode current. On the other hand, when Va>Vb, Vc and a positive bias is applied to the gate electrode, a current hardly flows through the sense region31.

Since the sense region32satisfies conditions as a first region, as shown inFIGS. 4 and 5, a current hardly flows through the sense region32when Va<Vb, Vc. On the other hand, when Va>Vb, Vc and a positive bias is applied to the gate electrode, a sense IGBT current I12flows through the sense region32in a similar manner to the main IGBT region2. A magnitude of the sense IGBT current I12is equal to or greater than 90% of a maximum value of the sense IGBT current.

In the present embodiment, by using the sense region31and the sense region32, when the main diode current I1flows through the main region5, a sufficiently large sense diode current I11can be obtained in a stable manner. When the main IGBT current I2flows through the main region, a sufficiently large sense IGBT current I21can be obtained in a stable manner. Therefore, a sensing accuracy of both the main diode current and the main IGBT current can be enhanced.

In the present embodiment, the sense region31that senses the main diode current is arranged adjacent to the sense region32that senses the main IGBT current, and the sense regions31and32are connected to a single sense upper surface electrode. Accordingly, wiring and the like of the sense regions can be simplified.

In addition, in the present embodiment, a region that does not contribute to electrical conduction is formed between the sense region31(the sense region for sensing the main diode current) and the sense region32(the sense region for sensing the main IGBT current). When the sense region31and the sense region32are arranged adjacent to each other as shown inFIGS. 9 and 10, the region between the sense region31and the sense region32has a distance from the main cathode region which causes a sense diode current and a sense IGBT current to become unstable as shown inFIGS. 4 and 5. By constructing the region in which the sense diode current and the sense IGBT current become unstable as the region that does not contribute to electrical conduction, the measurement accuracy of the sense diode current and the sense IGBT current can be further enhanced.

Moreover, as in a case of a semiconductor device400shown inFIGS. 11 and 12, a P layer152athat is a diffusion layer may be formed on an entire upper surface side of an N−layer13in a region between the sense region31and the sense region32. The P layer152ais an element isolation layer. The semiconductor device400is a modification of the semiconductor device300, and differs from the semiconductor device300in that the P layer152ais formed on the entire upper surface side of the N−layer13in the region between the sense region31and the sense region32. Since other components are similar to those of the semiconductor device300, similar components will be denoted by similar reference numerals in order to omit overlapping descriptions. In the semiconductor device400, since the sense region31and the sense region32are separated from each other by a single P layer152; a distance between the sense region31and the sense region32can be shortened. Specifically, a distance between the sense region31and the sense region32in a y axis direction shown inFIG. 11can be set shorter than a distance between the sense region31and the sense region32in a y axis direction shown inFIG. 9. In this case, a region having a distance from the main cathode region which causes a sense diode current and a sense IGBT current to become unstable as shown inFIGS. 4 and 5is favorably designed so as to fit below the P layer152a. Accordingly, a measurement accuracy of a sense diode current and a sense IGBT current can be further enhanced.

Fourth Embodiment

FIG. 13is a plan view of a semiconductor device500according to a present embodiment showing a vicinity of a boundary portion between a main region5and a sense region3of a semiconductor substrate50.FIG. 14is an enlarged view of a cross-section taken along line XIV-XIV inFIG. 13. Moreover, the plan view showing an entire semiconductor device500is similar to the semiconductor device100shown inFIG. 1and, also in the semiconductor device500, the sense region3is smaller than the main region5.

The semiconductor device500differs from the semiconductor device100in a position of a boundary (a line segment AB) between a first P+layer12and a first N+layer11formed on a lower surface side of the semiconductor substrate50. Even in the semiconductor device500, the boundary (the line segment AB) between the first P+layer12and the first N+layer11is parallel to an x axis direction shown inFIG. 13. In the main region5, a region in which the first N+layer11is formed becomes a main diode region1and a region in which the first P+layer12is formed becomes a main IGBT region2. In a similar manner to the main diode region1, the sense region3comprises a region in which the first N+layer11is formed and a region in which the first P+layer12is formed. Another difference from the semiconductor device100is that a shape of the sense region3in a plan view is shorter in the x axis direction and longer in a y axis direction shown inFIG. 13. In other words, the sense region3is short in a direction parallel to an end of a main cathode region on a side of the sense region (the x axis direction) and long in a direction perpendicular to the end of the main cathode region on the side of the sense region (the y axis direction). Since other components are similar to those of the semiconductor device100, similar components will be denoted using similar reference numerals in order to omit overlapping descriptions. Moreover, while a cross-sectional structure of the main region5is not depicted in the cross section shown inFIG. 14, in a similar manner to the first embodiment, the boundary between the first N+layer11and the first N+layer12exists in the main region5of the semiconductor device500, and a boundary between the main diode region1and the main IGBT region2is consistent with the boundary between the first N+layer11(a main cathode region) and the first P+layer12(a main collector region). In addition, a longitudinal direction of a trench gate18is parallel to an x-axis direction in a similar manner to the semiconductor device100.

InFIGS. 13 and 14, among the sense region3, a second N+layer173gof a region331has a distance D51that is equal to or shorter than 298 μm from an end of the main cathode region (the first N+layer11) on the side of the sense region3(in other words, the line segment AB). In other words, second N+layers173gto173lof the region331all have a distance that is equal to or shorter than 298 μm from the end of the main cathode region on the side of the sense region3in a plan view of the semiconductor substrate. Therefore, in the present embodiment, the region331satisfies conditions as a second region. A second N+layer173dof a region332has a distance D53that is equal to or longer than 615 μm from the end of the main cathode region on the side of the sense region3in a plan view of the semiconductor substrate. In other words, second N+layers173ato173dof the region332all have a distance that is equal to or longer than 615 μm from the end of the main cathode region on the side of the sense region in a plan view of the semiconductor substrate. Therefore, in the present embodiment, the region332satisfies conditions as a first region. Second N+layers173eand173fof a region333have a distance D52that is expressed as 298 μm<D52<615 μm from the end of the main cathode region on the side of the sense region in a plan view of the semiconductor substrate. In other words, the second N+layers173eand173fof the region333neither satisfy conditions as a first region nor conditions as a second region. Compared to the region331and the region332, the region333has a smaller element area (an area in the plan view of the semiconductor substrate).

Since the sense region3comprises the sense region331, when a main diode current I1flows through the main region, a sufficiently large sense diode current I11can be obtained in a stable manner. In addition, since the sense region3comprises the sense region332, when a main IGBT current I2flows through the main region, a sufficiently large sense IGBT current I21can be obtained in a stable manner. Although the region333is a region in which the sense diode current I11and the sense IGBT current I21become unstable, since the region333has a smaller element area than the regions331and332, a sensing accuracy of the main diode current by the region331and a sensing accuracy of the main IGBT current by the region332can be sufficiently secured. The present embodiment enables a reduction in an installation space of the sense region as compared to the case where the main diode current and the main IGBT current are sensed using two sense regions as is the case of the third embodiment.

In addition, the sense region3of the semiconductor device500is designed so that a shape of the sense region3in the plan view is short in a direction parallel to an end of the main cathode region on the side of the sense region (a direction parallel to a trench gate18) and long in a direction perpendicular to the end of the main cathode region on the side of the sense region (a direction perpendicular to the trench gate18). Therefore, a proportion of an element area of the region333having a distance D52that is expressed as 298 μm<D52<615 μm from the end of the main cathode region on the side of the sense region3becomes smaller with respect to an element area of the sense region3. By reducing an element area of the region333compared to element areas of the region331and the region332, the sensing accuracy of the main diode current and the main IGBT current can be enhanced.

Since the embodiments and modifications of the present invention described above enable the sense diode current and the sense IGBT current which flow through the sense region to be stabilized and be obtained as sufficiently large currents in the semiconductor device in which the diode and the IGBT are formed in the main region of the same semiconductor substrate, the sensing accuracy of the main IGBT current and the main diode current by the sense region can be enhanced. Moreover, while the main cathode region and the main collector region are adjacent to each other in the main region in the embodiments and modifications described above, another semiconductor layer may alternatively be formed between the main cathode region and the main collector region.

Moreover, the semiconductor devices described in the embodiments and modifications presented above can be manufactured by applying techniques used in a manufacturing process of a conventional semiconductor device. Since the semiconductor devices can be manufactured without significantly modifying the manufacturing process of the conventional semiconductor device, the semiconductor devices can be manufactured without significantly increasing labor, cost, and time.

While examples of the present embodiment have been described in detail, such examples are merely illustrative and are not intended to limit the scope of claims. Techniques described in the scope of claims include various modifications and changes of the specific examples illustrated above.

It is to be understood that the technical elements described in the present description and the drawings exhibit technical usefulness solely or in various combinations thereof and shall not be limited to the combinations described in the claims at the time of filing. Furthermore, the techniques illustrated in the present description and the drawings are to achieve a plurality of objectives at the same time, whereby technical usefulness is exhibited by attaining any one of such objectives.