Method of processing wafer

A method of processing a wafer includes a wafer preparing step of preparing a measurement wafer and a product wafer, a measurement etching step of supplying a gas in a plasma state to first areas of the measurement wafer that correspond to streets thereon to form grooves in the measurement wafer, a measuring step of demarcating a plurality of concentric areas in an array from a center to an outer circumference of the measurement wafer, and measuring depths of the grooves in the respective concentric areas, a thickness adjusting step of adjusting a thickness of the product wafer such that the product wafer is progressively thinner in areas thereof that correspond to the areas of the measurement wafer where the grooves are shallower, and an etching step of supplying a gas in a plasma state to second areas of the product wafer that correspond to streets thereon.

BACKGROUND OF THE INVENTION

Field of the Invention

The present invention relates to a method of processing a wafer by way of plasma etching.

Description of the Related Art

Processes of manufacturing device chips use wafers from which to fabricate device chips. A wafer has a plurality of devices formed in respective areas demarcated on a face side thereof by a grid of streets or projected dicing lines established on the face side. The wafer is divided along the street into a plurality of device chips including the respective devices. The device chips will be incorporated in various electronic appliances such as mobile phones and personal computers.

For dividing a wafer, there is used a cutting apparatus for cutting the wafer with an annular cutting blade. When the cutting apparatus is in operation, the annular cutting blade on the cutting apparatus is rotated and cuts into the wafer along the streets, severing the wafer along the streets. In recent years, attention has been given to the technology for dividing wafers according to a laser process. For example, a laser beam is applied to a wafer to form division initiating points such as grooves or modified layers in the wafer along streets established on the wafer. Then, external forces are applied to the wafer to cause the wafer to fracture from the division initiating points, thereby dividing the wafer into a plurality of device chips.

However, when a wafer is divided by a cutting process or a laser process, the wafer is liable to suffer processing defects. For example, when a wafer is divided by a cutting blade, the wafer may produce chippings from its face or reverse side. When a wafer is divided by a laser process, the wafer may develop local regions where its crystallinity is changed, i.e., crystal strain layers, surface irregularities, or the like due to the heat generated by a laser beam applied to the wafer. If such processing defects remain on device chips produced from the wafer by dividing same, a problem arises in that the device chips have their flexural strength lowered.

In view of the above difficulties, there has been proposed a process of dividing a wafer by way of plasma etching. For example, JP 2006-294686A discloses a method of dividing a wafer along streets by forming a resist film or mask on the reverse side of the wafer and supplying an etching gas in a plasma state through the mask to the wafer. Plasma etching is less likely to afflict wafers with processing defects than the cutting process and the laser process. Therefore, when a wafer is divided by plasma etching, the flexural strength of device chips produced from the wafer is restrained from being lowered.

SUMMARY OF THE INVENTION

For dividing a wafer by way of plasma etching, a gas in a plasma state is supplied to an upper surface of the wafer, for example, forming grooves in the wafer along streets established on the wafer. When the grooves reach a lower surface of the wafer due to the etching in progress, the wafer is divided along the streets. Therefore, etching conditions including an etching time, a gas flow rate, etc. are established to cause the grooves to reach the lower surface of the wafer all over the wafer. However, etching rate variations may occur in the wafer as a result of various factors including gas flow deviations, plasma density deviations, etc. in the plasma etching. In the event of such etching rate variations, notwithstanding that the grooves in a central area of the wafer have reached the lower surface of the wafer, the grooves in an outer circumferential portion of the wafer may terminate short of the lower surface of the wafer, leading to imperfect division of the wafer. In view of the shortcoming, etching conditions are adjusted for reliable division of the wafer to cause the grooves to reach the lower surface of the wafer in areas where the wafer is hardest to etch.

However, under the etching conditions thus adjusted, in the areas of the wafer where the etching rate is higher, i.e., where the etching progresses faster, the etching still continues after the grooves have reached the lower surface of the wafer, tending to excessively process the lower surface of the wafer with the laser beam. As a consequence, some of the device chips produced by dividing the wafer tend to be brought out of shape, resulting in a reduction in the quality of the device chips.

The present invention has been made in view of the above problems. It is therefore an object of the present invention to provide a method of processing a wafer to appropriately divide the wafer by way of plasma etching.

In accordance with an aspect of the present invention, there is provided a method of processing a wafer, including: a wafer preparing step of preparing a measurement wafer and a product wafer each including a first surface that has a plurality of areas demarcated by a plurality of streets thereon and a second surface that is opposite the first surface; a measurement etching step of forming a first mask on the first surface or the second surface of the measurement wafer and supplying a gas in a plasma state to first areas of the measurement wafer that are exposed through the first mask and that correspond to the streets to etch the first areas under predetermined conditions to form grooves in the measurement wafer; after the measurement etching step, a measuring step of demarcating a plurality of concentric areas in an array from a center to an outer circumference of the measurement wafer and measuring depths of the grooves in the respective concentric areas; after the measuring step, a thickness adjusting step of adjusting a thickness of the product wafer such that the product wafer is progressively thinner in areas thereof that correspond to the areas of the measurement wafer where the grooves are shallower; and, after the thickness adjusting step, an etching step of forming a second mask on the first surface or the second surface of the product wafer and supplying a gas in a plasma state to second areas of the product wafer that are exposed through the second mask and that correspond to the streets to etch the second areas under predetermined conditions.

Preferably, the thickness adjusting step includes performing grinding, polishing, or plasma etching on the product wafer to adjust the thickness of the product wafer. Preferably, the measurement etching step includes supplying the gas in the plasma state to the measurement wafer while a first protective member for protecting the measurement wafer is disposed on a surface of the measurement wafer that is opposite to the surface thereof to which the gas in the plasma state is supplied, and the etching step includes supplying the gas in the plasma state to the product wafer while a second protective member for protecting the product wafer is disposed on a surface of the product wafer that is opposite to the surface thereof to which the gas in the plasma state is supplied.

In the method of processing a wafer according to the aspect of the present invention, the thickness of the product wafer is adjusted depending on the depths of the grooves formed in the measurement wafer by plasma etching, and thereafter plasma etching is performed on the product wafer. The etching rate variations in the product wafer are thus reflected in the thickness distribution of the product wafer, thereby synchronizing the times when the division of the product wafer in the areas thereon is completed. In this manner, the product wafer is less liable to have areas where it is etched imperfectly and areas where it is etched excessively, and hence can be divided properly.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

A preferred embodiment of the present invention will be described below with reference to the accompanying drawings. First, configuration examples of wafers that can be used in a method of processing a wafer according to the present embodiment will be described below. According to the present embodiment, the wafers that can be used in the method of processing a wafer include a product wafer to be used in manufacturing actual products and a measurement wafer to be used in selecting processing conditions for the product wafer.

FIG.1Aillustrates in perspective a wafer11that servers as a measurement wafer, also referred to as a test wafer, to be used in selecting processing conditions for a product wafer (seeFIG.1B). The wafer11includes a disk-shaped substrate made of a semiconductor such as silicon, for example, and includes a face side, i.e., a first surface,11aand a reverse side, i.e., a second surface,11bopposite the face side11a. The face side11aof the wafer11has a plurality of rectangular areas demarcated by a grid of streets or projected dicing lines13established on the face side11a. The streets13are separated into two groups that extend across each other. A plurality of devices15such as integrated circuits (ICs), large-scale-integration (LSI) circuits, light-emitting diodes (LEDs), or microelectromechanical systems (MEMS) are formed respectively in the demarcated areas.

FIG.1Billustrates in perspective a wafer31that serves as a product wafer to be used in manufacturing actual products (device chips or the like). The wafer31has a configuration similar to that of the wafer11(seeFIG.1A). Specifically, the wafer31includes a face side, i.e., a first surface,31aand a reverse side, i.e., a second surface,31bopposite the face side31a. The face side31aof the wafer31has a plurality of rectangular areas demarcated by a grid of streets or projected dicing lines33established on the face side31a. The streets33are separated into two groups that extend across each other. A plurality of devices35are formed respectively in the demarcated areas. The wafer31is of the similar material, shape, structure, size, etc. to the wafer11. The devices35are of the similar kind, quantity, shape, structure, size, layout, etc. to the devices15.

The wafer31will be processed and cut along the streets33into a plurality of device chips including the respective devices35. Processing conditions for processing the wafer31are selected on the basis of the results of a test conducted using the wafer11. A specific example of the method of processing a wafer according to the present embodiment will be described below.

First, a measurement wafer and a product wafer are prepared (wafer preparing step). In the wafer preparing step, specifically, the wafer11illustrated inFIG.1Aand the wafer31illustrated inFIG.1Bare formed.

Since the wafer11is used in selecting processing conditions for processing the wafer31, as described later, the wafer11should preferably have similar details to the wafer31. Specifically, the wafer11should preferably be made of the same material as the wafer31. Further, the number of the streets13should preferably be the same as the number of the streets33, and the width of the streets13should preferably be generally the same as the width of the streets33. Further, the dimensions of and distances between the devices15on the wafer11should preferably be generally the same as the dimensions of and distances between the devices35on the wafer31. However, the details of the wafer11may be different from the details of the wafer31within a range where processing conditions for processing the wafer31can appropriately be selected. For example, since the wafer11is not used in manufacturing actual device chips, the wafer11may not necessarily have the devices15.

The wafer11and the wafer31will be processed by plasma etching in a subsequent step. Therefore, a protective member for protecting the wafer11is applied to the face side11aor the reverse side11bof the wafer11. Similarly, a protective member for protecting the wafer31is applied to the face side31aor the reverse side31bof the wafer31.

FIG.2Aillustrates in perspective the wafer11with a protective member, i.e., a first protective member,17disposed thereon. For example, a circular protective member17that is larger in diameter than the wafer11is fixed to the face side11aof the wafer11. The face side11aof the wafer11and the devices15thereon are thus covered with and protected by the protective member17. The protective member17may include a film-like tape, for example. The tape includes a circular base and an adhesive layer, i.e., a glue layer, disposed on the base. The base is made of a resin such as polyolefin, polyvinyl chloride, or polyethylene terephthalate, for example, whereas the adhesive layer is made of an adhesive of an epoxy material, an acrylic material, a rubber material, or the like, for example. Alternatively, the adhesive layer may be made of an ultraviolet-curable resin that can be cured by ultraviolet rays applied thereto.

The protective member17has an outer circumferential portion affixed to an annular frame19made of metal or the like. The frame19has a circular opening19adefined therein that is larger in diameter than the wafer11. The wafer11is affixed centrally to the protective member17such that the wafer11is disposed within the opening19a. The wafer11is thus supported on the frame19by the protective member17for being easily handled, e.g., transported, held, or otherwise treated.

FIG.2Billustrates in perspective the wafer31with a protective member, i.e., a second protective member,37disposed thereon. For example, a circular protective member37that is larger in diameter than the wafer31is fixed to the face side31aof the wafer31. The face side31aof the wafer31and the devices35thereon are thus covered with and protected by the protective member37. The protective member37has an outer circumferential portion affixed to an annular frame39made of metal or the like. The frame39has a circular opening39adefined therein that is larger in diameter than the wafer31. The wafer31is affixed centrally to the protective member37such that the wafer31is disposed within the opening39a. The wafer31is thus supported on the frame39by the protective member37. The protective member37is of the similar shape, structure, material, etc. to the protective member17. The frame39is of the similar shape, structure, material, etc. to the frame19.

The wafer11and the wafer31may be formed at appropriately selected times. Specifically, the wafer11may be prepared until a measurement etching step to be described later, and the wafer31may be prepared until a thickness adjusting step to be described later.

Next, a gas in a plasma state is supplied to the areas of the wafer11that correspond to the streets13to form grooves in the wafer11(measurement etching step). In the measurement etching step, the wafer11is processed by plasma etching to etch the wafer11along the streets13. By way of example, a process of supplying a gas in a plasma state to the reverse side11bof the wafer11to etch the wafer11will be described below as the measurement etching step.

In the measurement etching step, first, a mask23(seeFIG.3B) for plasma etching is formed on the reverse side11bof the wafer11. For example, the mask23may be formed on the reverse side11bby depositing a mask layer21(seeFIG.3A) on the reverse side11band then removing the areas of the mask layer21that correspond to the streets13.

FIG.3Aillustrates in enlarged fragmentary cross section the wafer11with the mask layer21formed thereon. The mask layer21is made of a material functioning as a mask during plasma etching and is deposited in covering relation to the reverse side11bin its entirety. For example, the mask layer21may be made of a water-soluble resin such as polyvinyl alcohol (PVA) or polyethylene glycol (PEG). Then, the areas of the mask layer21that correspond to the streets13are removed. For example, a laser beam is applied to the mask layer21along the streets13to remove the areas of the mask layer21that correspond to the streets13. The laser beam is applied under conditions including a wavelength, a power level, a spot diameter, a repetitive frequency, etc. that are selected to process the mask layer21by way of ablation when the laser beam is applied to the mask layer21. When the mask layer21is removed along all the streets13, a grid-shaped opening through which part of the reverse side11bof the wafer11is exposed is formed in the mask layer21.

FIG.3Billustrates in enlarged fragmentary cross section the wafer11with the mask, i.e., a first mask,23formed thereon. The mask layer21is patterned as described above to form the mask23through which the areas of the reverse side11bof the wafer11that correspond to the streets13, i.e., the areas overlapping the streets13, are exposed and which covers the areas of the reverse side11bof the wafer11that correspond to the devices15, i.e., the areas overlapping the devices15. The mask23may be formed of other materials than the materials described above and may be formed by other processes than the process described above. For example, the mask layer21may be made of a resist of photosensitive resin and may be patterned into the mask23by being exposed to light.

Next, a gas in a plasma state is supplied to the areas of the wafer11that are exposed through the mask23and correspond to the streets13, etching those areas under predetermined conditions. The wafer11is etched using a plasma processing apparatus, for example.FIG.4schematically illustrates in cross section a plasma processing apparatus10that is used to etch the wafer11.

As illustrated inFIG.4, the plasma processing apparatus10includes a chamber12in the shape of a rectangular parallelepiped. The chamber12includes a bottom wall12a, an upper wall12b, a first side wall12c, a second side wall12d, a third side wall12e, and a fourth side wall, not illustrated. The chamber12has an internal space acting as a processing space14in which a plasma process is carried out.

The second side wall12dhas an opening16defined therein through which a wafer11can be loaded into and unloaded out of the processing space14. A gate, i.e., an openable and closable door,18for opening and closing the opening16is disposed outside of the opening16. The gate18is connected to an opening and closing mechanism20that can move the gate18vertically, i.e., upwardly and downwardly. The opening and closing mechanism20includes an air cylinder22having a piston rod24, for example. The piston rod24has an upper end coupled to a lower portion of the gate18. The air cylinder22is fixed to the bottom wall12aof the chamber12by a bracket26. When the opening and closing mechanism20lowers the gate18, the opening16is exposed. Now, a wafer11can be loaded through the opening16into the processing space14or unloaded out of the processing space14through the opening16.

The bottom wall12aof the chamber12has an exhaust port28defined therein that provides fluid communication between the inside and outside of the chamber12. An exhaust mechanism30for evacuating the processing space14is connected to the exhaust port28. The exhaust mechanism30includes a vacuum pump, for example.

The processing space14houses therein a lower electrode32and an upper electrode34that vertically confront each other. The lower electrode32is made of an electrically conductive material and includes a disk-shaped holder36and a cylindrical support post38projecting downwardly from a central portion of a lower surface of the holder36.

The support post38is inserted through an opening40defined in the bottom wall12aof the chamber12. An annular insulating member42is disposed in the opening40between the bottom wall12aand the support post38, insulating the chamber12and the lower electrode32from each other. The lower electrode32is electrically connected to a high-frequency power supply44disposed outside of the chamber12. The holder36has an upwardly open recess defined in an upper surface thereof and housing therein a disk-shaped table46for holding the wafer11thereon. The table46has an upper surface acting as a holding surface46afor holding the wafer11thereon. The holding surface46ais connected to a suction source50such as an ejector through a fluid channel, not illustrated, defined in the table46and a fluid channel48defined in the lower electrode32. The holder36has a coolant channel52defined therein. The coolant channel52has an end connected to a coolant circulating mechanism56through a coolant inlet passage54defined in the support post38. The other end of the coolant channel52is connected to the coolant circulating mechanism56through a coolant outlet passage58defined in the support post38. When the coolant circulating mechanism56is actuated, a coolant flows therefrom successively through the coolant inlet passage54, the coolant channel52, and the coolant outlet passage58, cooling the lower electrode32.

The upper electrode34is made of an electrically conductive material and includes a disk-shaped gas ejecting member60and a cylindrical support post62projecting upwardly from a central portion of an upper surface of the gas ejecting member60. The support post62is inserted through an opening64defined in the upper wall12bof the chamber12. An annular insulating member66is disposed in the opening64between the upper wall12band the support post62, insulating the chamber12and the upper electrode34from each other. The upper electrode34is electrically connected to a high-frequency power supply68disposed outside of the chamber12. The support post62has an upper end on which there is mounted a support arm72coupled to a lifting and lowering mechanism70. The lifting and lowering mechanism70and the support arm72move the upper electrode34vertically, i.e., lift the upper electrode34upwardly and lower the upper electrode34downwardly. The gas ejecting member60has a plurality of ejection ports74defined therein and opening downwardly from a lower surface thereof. The ejection ports74are connected to a first gas supply source80and a second gas supply source82through a fluid channel76defined in the gas ejecting member60and a fluid channel78defined in the support post62. The first gas supply source80and the second gas supply source82are capable of supplying respective gases that contain different components to the fluid channel78.

The constituents of the plasma processing apparatus10that include the opening and closing mechanism20, the exhaust mechanism30, the high-frequency power supply44, the suction source50, the coolant circulating mechanism56, the high-frequency power supply68, the lifting and lowering mechanism70, the first gas supply source80, and the second gas supply source82, etc. are electrically connected to a controller, i.e., a control unit or a control device,84that controls the plasma processing apparatus10. The controller84controls operation of the constituents of the plasma processing apparatus10. For example, the controller84includes a computer and includes a processing section for carrying out processing operations required to operate the plasma processing apparatus10and a storage section for storing various pieces of information including data, programs, etc. used by the processing section in carrying out processing operations. The processing section includes a processor such as a central processing unit (CPU). The storage section includes various memories acting as a main storage device, an auxiliary storage device, etc. The processing section generates control signals for controlling the constituents of the plasma processing apparatus10by executing the programs stored in the storage section.

For performing plasma etching on a wafer11with the plasma processing apparatus10, the opening and closing mechanism20lowers the gate18of the plasma processing apparatus10to expose the opening16. Then, a delivery mechanism, not illustrated, loads the wafer11through the opening16into the processing space14in the chamber12and places the wafer11on the table46. At this time, the wafer11is placed on the table46with the reverse side11b, i.e., the mask23side, exposed upwardly toward the upper electrode34. When the wafer11is to be loaded into the processing space14, it is preferable for the lifting and lowering mechanism70to lift the upper electrode34, increasing the spacing between the lower electrode32and the upper electrode34.

Next, the suction source50applies a negative pressure to the holding surface46aof the table46, holding the wafer11under suction on the holding surface46a. The opening and closing mechanism20lifts the gate18to close the opening16, hermetically sealing the processing space14. The lifting and lowering mechanism70adjusts the vertical position of the upper electrode34to bring the upper electrode34and the lower electrode32into a predetermined positional relation suitable for a plasma process. Then, the exhaust mechanism30is actuated to evacuate the processing space14to a reduced pressure ranging from 50 to 300 Pa, for example. If the negative pressure applied from the suction source50fails to keep the wafer11under suction on the table46when the processing space14is evacuated, then the wafer11is held on the table46under electric forces, typically electrostatic forces. For example, a plurality of electrodes are embedded in the table46. A predetermined voltage is applied to these electrodes to apply a Coulomb force between the table46and the wafer11, thereby attracting the wafer11to the table46. At this time, the table46functions as an electrostatic chuck table.

Then, the first gas supply source80or the second gas supply source82supplies a gas for etching, i.e., an etching gas, between the lower electrode32and the upper electrode34through the fluid channel78, the fluid channel76, and the ejection ports74. At the same time, a predetermined level of high-frequency electric power ranging from 1000 to 3000 W, for example, is applied between the lower electrode32and the upper electrode34. As a result, the gas existing between the lower electrode32and the upper electrode34turns into a plasma state containing ions and radicals. The gas in the plasma state is supplied to the reverse side11bof the wafer11.

FIG.5illustrates in enlarged fragmentary cross section the wafer11to which the gas, denoted by90, in the plasma state is supplied. The gas90in the plasma state is specifically supplied to those areas, i.e., first areas,11cof the reverse side11bof the wafer11that are not covered with the mask23. The areas11care exposed through the mask23and correspond to the areas corresponding to the streets13, i.e., the areas overlapping the streets13. As a result, plasma etching is performed on the areas11c. In the measurement etching step, the gas90is supplied to the wafer11while the protective member17is disposed on the surface, i.e., the face side11a, of the wafer11that is opposite the surface thereof, i.e., the reverse side11b, to which the gas90is supplied. The components of the gas90are appropriately selected depending on the material of the wafer11. For example, if the wafer11is a silicon wafer, then the gas90contains a fluorine gas such as CF4or SF6.

FIG.6Aillustrates in enlarged fragmentary cross section a central portion of the wafer11after the plasma etching, andFIG.6Billustrates in enlarged fragmentary cross section an outer circumferential portion of the wafer11after the plasma etching. When the gas90in the plasma state is supplied through the mask23to the reverse side11bof the wafer11, the areas11care etched, forming grooves11din the wafer11from the reverse side11btoward the face side11a.

Plasma etching conditions including an etching time, a gas flow rate, a high-frequency electric power level, a pressure in the processing space14, etc. are identical to plasma etching conditions for dividing the wafer31at a subsequent step (seeFIGS.11A and11B), for example. The wafer11is thicker than the wafer31. As a result, the grooves11dthat terminate short of the face side11aare formed in the wafer11from the reverse side11balong the streets13.

When the plasma etching is performed on the wafer11by the plasma processing apparatus10, etching rate variations may occur in the wafer11as a result of various factors including gas flow deviations, plasma density deviations, etc. For example, etching tends to progress faster in the central portion of the wafer11, whereas etching is liable to progress slower in the outer circumferential portion of the wafer11. In the event of such an etching rate variation, a groove11d(seeFIG.6B) formed in the outer circumferential portion of the wafer11is shallower than a groove11d(seeFIG.6A) formed in the central portion of the wafer11.

After the plasma etching on the wafer11has been completed, the mask23is removed from the wafer11. In a case where the mask23is made of a water-soluble resin, the mask23can easily be removed by supplying the reverse side11bof the wafer11with pure water or the like.

Next, a plurality of concentric areas are demarcated on the wafer11in a radial array from the center to the outer circumference of the wafer11, and the depths of the grooves11dare measured in the respective concentric areas (measuring step). In the measuring step, the wafer11with the grooves11dformed in a grid pattern along the streets13is used.

FIG.7illustrates in cross section the wafer11with the grooves11dformed therein. If etching rate variations occur in the wafer11in the measurement etching step, then the grooves11dformed in the wafer11have different depths. For example, as illustrated inFIG.7, the grooves11dare progressively deeper in those areas that are closer to the center of the wafer11and progressively shallower in those areas that are closer to the outer circumference of the wafer11.

In the measuring step, the wafer11after the measurement etching step has been carried out is cut along one of the streets13, thereby making a cross section of the wafer11observable as illustrated inFIG.7. Then, a plurality of areas are demarcated on the wafer11in a radial array from the center to the outer circumference of the wafer11. For example, a circular area A1including the center of the wafer11and a plurality of annular areas A2, A3, A4, and A5around the area A1are demarcated on the wafer11. The areas A1, A2, A3, A4, and A5are concentric with each other and have progressively larger diameters. The radius of the area A1and the widths of the areas A2, A3, A4, and A5are generally the same as each other, for example. There is no limitation on the number and diameters or widths of the areas demarcated on the wafer11. In other words, the area A1and any number of annular areas disposed around the area A1and having different diameters are demarcated on the wafer11.

Next, the depths of the grooves11dare measured for the respective areas A1through A5. For example, an image of the cross section of the wafer11is captured and the depths of the grooves11dincluded in the captured image are actually measured. In a case where a plurality of grooves11dare included in one area, the depth of any one of the grooves11dmay be measured or the depths of the grooves11din the area may be measured and their average value may be calculated. Then, the depths of the grooves11dfor the respective areas are recorded.

The depths of the grooves11dare commensurate with etching rates for the grooves11dat the time the plasma processing apparatus10(seeFIG.4) performs plasma etching on the wafer11. In other words, in an area where the groove11dis deeper, the plasma etching tends to progress faster and the etching rate is higher. Therefore, the measuring step that is carried out as described above confirms a distribution of etching rate variations in the wafer11.

Then, a product wafer is processed by plasma etching. For example, the wafer31(seeFIG.2B) is etched along the streets33and divided into a plurality of device chips including the respective devices35. The wafer31is etched using the plasma processing apparatus10(seeFIG.4). However, if there are etching rate variations in the wafer11at the time plasma etching is performed on the wafer11, the wafer31will be unlikely to be divided properly. For example, in a case where the etching rate on the outer circumferential portion of the wafer31is lower than the etching rate on the central portion of the wafer31(seeFIGS.6A and6B), the outer circumferential portion of the wafer31will be likely to be divided imperfectly. If processing conditions are varied to make sure that the outer circumferential portion of the wafer31will be divided completely, then the plasma etching still continues in the central area of the wafer31after the division has been completed, thereby excessively processing the wafer11to the extent that device chips produced from the central area of the wafer31may possibly suffer a reduction in quality.

According to the present embodiment, the thickness of the wafer31is adjusted on the basis of the measured results, i.e., the measured thicknesses, from the measuring step (thickness adjusting step). Specifically, before the plasma etching is carried out, the wafer31is processed to adjust the thickness thereof such that the wafer31is thicker in areas where the etching rate is higher, i.e., areas where etching tends to progress faster, and thinner in areas where the etching rate is lower, i.e., areas where etching tends to progress slower.

In the thickness adjusting step, first, a plurality of concentric areas are demarcated on the wafer31in a radial array from the center to the outer circumference of the wafer31. Specifically, as with the wafer11(seeFIG.7), areas A1through A5are demarcated on the wafer31. The dimensions, i.e., the diameters and widths, of the areas A1through A5demarcated on the wafer31are identical to the dimensions of the areas A1through A5demarcated on the wafer11.

Next, the thickness of the wafer31is adjusted such that those areas of the wafer31that correspond to the areas of the wafer11where the depths of the grooves11d(seeFIG.7) measured in the measuring step are smaller, i.e., the grooves11dare shallower, are thinner. Specifically, as illustrated inFIG.7, the grooves11dare deeper in those areas of the wafer11that are closer to the center of the wafer11, and shallower in those areas of the wafer11that are closer to the outer circumference of the wafer11. Accordingly, the wafer31is processed to become progressively thinner from the center, i.e., the area A1, toward the outer circumference, i.e., the area A5.

The thickness of the wafer31is adjusted using a grinding apparatus, for example.FIG.8illustrates a grinding apparatus100in front elevation, partly in cross section, that can be used in the thickness adjusting step. As illustrated inFIG.8, the grinding apparatus100includes a chuck table, i.e., a holding table,102for holding the wafer31thereon and a grinding unit106for grinding the wafer31held on the chuck table102.

The chuck table102has an upper surface acting as a flat holding surface102afor holding the wafer31thereon. The holding surface102ais connected to a suction source, not illustrated, such as an ejector through a fluid channel102b(seeFIG.9) defined in the chuck table102, a valve, not illustrated, etc. To the chuck table102, there are connected a ball-screw moving mechanism, not illustrated, for moving the chuck table102in horizontal directions and a rotary actuator, not illustrated, such as an electric motor for rotating the chuck table102about a rotational axis generally parallel to vertical directions. The grinding apparatus100also includes a plurality of clamps104disposed around the chuck table102for gripping and securing a frame39that supports the wafer31.

The grinding unit106is disposed above the chuck table102. The grinding unit106includes a hollow cylindrical spindle108extending in vertical directions. A disk-shaped wheel mount110is fixed to the distal end, i.e., the lower end, of the spindle108. A rotary actuator, not illustrated, such as an electric motor for rotating the spindle108about its central axis is connected to the proximal end, i.e., the upper end, of the spindle108.

A grinding wheel112for grinding the wafer31is mounted on a lower surface of the wheel mount110. The grinding wheel112includes an annular base114made of a metal such as stainless steel or aluminum and having substantially the same diameter as the wheel mount110. The grinding wheel112also includes a plurality of grindstones116fixed to a lower surface of the base114. Each of the grindstones116is shaped as a rectangular parallelepiped. The grindstones116are arrayed in an annular pattern at generally equal spaced intervals along the outer circumferential edge of the base114. The grinding wheel112is rotatable about a rotational axis generally parallel to vertical directions by rotational power transmitted from the rotary actuator through the spindle108and the wheel mount110. A ball-screw moving mechanism, not illustrated, is connected to the grinding unit106for lifting and lowering the grinding unit106in vertical directions. A nozzle118for supplying a grinding fluid120such as pure water to the wafer31held on the chuck table102and the grindstones116of the grinding wheel112is disposed in the vicinity of the grinding unit106.

For grinding the wafer31, the wafer31is held on the chuck table102. Specifically, the wafer31is placed on the chuck table102such that the face side31a, i.e., the protective member37side, faces the holding surface102aand the reverse side31bis exposed upwardly. The frame39is gripped and secured in position by the clamps104. Then, the suction source applies a negative pressure to the holding surface102aof the chuck table102, holding the wafer31under suction on the holding surface106awith the protective member37interposed therebetween.

Next, the chuck table102is moved to a position below the grinding unit106. Then, while the chuck table102and the grinding wheel112are being rotated about their rotational axes at respective predetermined rotational speeds in respective directions, the grinding wheel112is lowered toward the chuck table102. The speed at which the grinding wheel112is lowered is adjusted such that the grindstones116are pressed against the wafer31under appropriate forces. When the rotating grindstones116are brought into contact with the reverse side31bof the wafer31, the grindstones116start scraping the reverse side31bof the wafer31, thereby grinding and thinning the wafer31. While the wafer31is thus ground, the grinding fluid120supplied from the nozzle118cools the wafer31and the grindstones116and washes away debris, i.e., swarf, produced by the grinding of the wafer31. The wafer31is continuously ground until it is thinned to a predetermined thickness, i.e., a finished thickness, whereupon the wafer31stops being ground.

When the wafer31is ground by the grinding apparatus100, the shape of the wafer31that will have been ground can be controlled by adjusting the angle of the chuck table102.FIG.9illustrates the chuck table102in cross section.

The chuck table102has an upwardly open circular recess defined in an upper surface thereof, and a disk-shaped holder, i.e., a suction member,102cmade of a porous material such as porous ceramic is fitted in the circular recess. The holder102cis connected to a suction source, not illustrated, through the fluid channel102bdefined in the chuck table102. The holder102chas an upper surface acting as a holding surface102aof the chuck table102. The holder102chas its thickness progressively larger from its outer circumferential edge toward its center. Specifically, the upper surface, i.e., the holding surface102a, of the holder102cis of an upwardly projected V-shaped cross section with the crest at its center. InFIG.9, the gradient of the holding surface102ais illustrated as exaggerated. If the holder102chas a diameter ranging from approximately 290 to 310 mm, for example, then the difference between the vertical position of the center of the upper surface of the holder102c, i.e., the position of the center of the upper surface thicknesswise of the holder102c, and the vertical position of the outer circumferential edge of the upper surface of the holder102cis set to a value in a range of approximately 10 to 20 μm.

In the grinding apparatus100, the chuck table102is installed in a slightly tilted state such that an area102dof the holding surface102athat underlies the grindstones116(seeFIG.8) lies parallel to the lower surfaces of the grindstones116that lie in horizontal directions. The chuck table102is rotatable about a rotational axis generally parallel to the thicknesswise directions of the holder102c. The position of the center of the holder102cis aligned with the position of the rotational axis about which the chuck table102is rotatable. The wafer31is held under suction on the chuck table102in a slightly curved state along the holding surface102a, and will be ground by the grindstones116.

The chuck table102is arranged to make its angle of tilt variable. Specifically, the chuck table102can be tilted to incline its rotational axis in a first direction, i.e., the direction indicated by an arrow B, and a second direction, i.e., the direction indicated by an arrow C. The shape of the wafer31that will have been ground can be controlled by adjusting the tilt of the chuck table102.

FIG.10Aillustrates in cross section a wafer31that has been ground on the chuck table102tilted in the first direction, andFIG.10Billustrates in cross section a wafer31that has been ground on the chuck table102tilted in the second direction. In a case where the chuck table102is tilted in the first direction (see the arrow B inFIG.9) and the wafer31is ground on the chuck table102where the center of the holding surface102ais slightly lower than the outer circumferential edge thereof in the area102d, the wafer31has its outer circumferential portion ground preferentially. As a result, as illustrated inFIG.10A, the ground wafer31is ground such that it is progressively thicker from the outer circumferential edge toward the center thereof, with the reverse side31bbeing upwardly projected. On the other hand, in a case where the chuck table102is tilted in the second direction (see the arrow C inFIG.9) and the wafer31is ground on the chuck table102where the center of the holding surface102ais slightly higher than the outer circumferential edge thereof in the area102d, the wafer31has its central portion ground preferentially. As a result, as illustrated inFIG.10B, the ground wafer31is ground such that it is progressively thinner from the outer circumferential edge toward the center thereof, with the reverse side31bbeing downwardly projected.

In the thickness adjusting step, the wafer31is ground such that it is thinner in those areas of the wafer31that correspond to the areas of the wafer11where the grooves11d(seeFIG.7) are shallower, and thicker in those areas of the wafer31that correspond to the areas of the wafer11where the grooves11dare deeper. Specifically, in the wafer11, the etching rate is lower and the grooves11dare shallower in those areas that are closer to the outer circumferential edge thereof. Further, the wafer31is made of a material identical or similar to the material of the wafer11, and the distribution of etching rate variations of the wafer31exhibits the same tendency as the distribution of etching rate variations of the wafer11. Accordingly, the chuck table102of the grinding apparatus100is tilted in the first direction (see the arrow B inFIG.9) and the wafer31is ground on the chuck table102thus tilted. In this manner, the wafer31that is thicker in the areas, i.e., the central portion, where the etching rate is higher and thinner in the areas, i.e. the outer circumferential portion, where the etching rate is lower (seeFIG.10A).

There is no limitation on processes of adjusting the thickness of the wafer31. For example, the thickness of the wafer31may be adjusted using a polishing apparatus in place of the grinding apparatus100. The polishing apparatus includes a chuck table, i.e., a holding table, for holding the wafer31and a polishing unit with a polishing pad mounted thereon for polishing the wafer31held on the chuck table. The polishing pad includes, for example, a disk-shaped polishing layer made of nonwoven fabric or foamed urethane with abrasive grains, i.e., fixed abrasive grains, dispersed therein. The abrasive grains of the polishing layer may be made of silica whose particle diameters range from approximately 0.1 to 10 μm. While supplying the wafer31and the polishing pad with a polishing fluid, the chuck table and the polishing pad are rotated about their respective rotational axes and the polishing layer of the polishing pad is pressed against the wafer31, thereby polishing the wafer31. As is the case with the grinding apparatus100, the angle of tilt of the chuck table of the polishing apparatus can be adjusted (seeFIG.9) to control the thickness of the wafer31(seeFIGS.10A and10B). In the thickness adjusting step, alternatively, the thickness of the wafer31may be adjusted by etching the wafer31in its entirety using the plasma processing apparatus10(seeFIG.4). In this case, the wafer31may be processed to a desired shape by appropriately adjusting the position of the wafer31and etching conditions for plasma etching.

Next, a gas in a plasma state is supplied to the areas of the wafer31that correspond to the streets33, thereby etching the wafer31(etching step).FIG.11Aillustrates the wafer31in the etching step in enlarged fragmentary cross section. A process of etching the wafer31by supplying a gas in a plasma state to the reverse side31bof the wafer31will be described below by way of example.

In the etching step, a mask, i.e., a second mark,41for use in performing plasma etching is formed on the reverse side31bof the wafer31. The mask41is formed to expose those areas of the reverse side31bof the wafer31that correspond to the streets33, i.e., the areas overlapping the streets33, and to cover those areas of the reverse side31bof the wafer31that correspond to the devices35, i.e., the areas overlapping the devices35. The mask41is made of the same material and formed by the same process as with the mask23(seeFIG.3B).

Next, a gas in a plasma state is supplied to those areas of the reverse side31bof the wafer31that are exposed and correspond to the streets33, thereby etching the areas under predetermined conditions. The wafer31may be etched using the plasma processing apparatus10(seeFIG.4). The procedure for performing plasma etching on the wafer31with the plasma processing apparatus10is the same as the measurement etching step (seeFIG.5). The gas90in the plasma state is supplied to those areas, i.e., second areas,31cof the reverse side31bof the wafer31that are not covered with the mask41. The areas31care exposed through the mask41and correspond to the areas corresponding to the streets13, i.e., the areas overlapping the streets33.

In the etching step, the gas90is supplied to the wafer31while the protective member37is disposed on the surface, i.e., the face side31a, of the wafer31that is opposite the surface thereof, i.e., the reverse side31b, to which the gas90is supplied. The areas31cof the wafer31are etched, forming grooves in the wafer31from the reverse side31btoward the face side31a. When the plasma etching is continued until the grooves from the reverse side31breach the face side31a, the areas31cof the wafer31are removed.FIG.11Billustrates the wafer31after the plasma etching in enlarged fragmentary cross section. The wafer31is thus divided along the streets33, producing a plurality of device chips43including the respective devices35.

When the above etching step is carried out, the wafer31is thicker in the areas, i.e., the central portion, where the etching rate is higher and thinner in the areas, i.e. the outer circumferential portion, where the etching rate is lower (seeFIG.10A). Consequently, the difference between the times when the grooves reach the face side31aof the wafer31in the central and outer circumferential portions of the wafer31is reduced. The central portion of the wafer31is thus prevented from being excessively etched, and the wafer31is appropriately divided in its entirety.

In the method of processing a wafer according to the present embodiment, as described above, the thickness of the wafer31is adjusted depending on the depths of the grooves11dformed in the wafer11by plasma etching, and thereafter plasma etching is performed on the wafer31. The etching rate variations in the wafer31are thus reflected in the thickness distribution of the wafer31, thereby synchronizing the times when the division of the wafer31in the areas thereon is completed. In this manner, the wafer31is less liable to have areas where it is etched imperfectly and areas where it is etched excessively, and hence can be divided properly.

In the above embodiment, when plasma etching is performed on the wafer11, the mask23is formed on the reverse side11bof the wafer11(seeFIG.3B). However, the mask23may be formed on the face side11aof the wafer11. In this case, the protective member17is disposed on the reverse side11bof the wafer11, and the gas90in the plasma state is supplied through the mask23to the face side11aof the wafer11. Similarly, when plasma etching is performed on the wafer31, the mask41(seeFIG.11A) may be formed on the face side11aof the wafer11. In this case, the protective member37is disposed on the reverse side31bof the wafer31, and the gas90in the plasma state is supplied through the mask41to the face side31aof the wafer31.

Other changes and modifications may be made in the structural details, the method details, etc. according to the above embodiment without departing from the scope of the object of the present invention.