Molded packaging for wide band gap semiconductor devices

A semiconductor device package may include a leadframe having a first portion with first extended portions and a second portion with second extended portions. Mold material may encapsulate a portion of the leadframe and a portion of a semiconductor die mounted to the leadframe. A first set of contacts of the semiconductor die may be connected to a first surface of the first extended portions, while a second set of contacts may be connected to a first surface of the second extended portions. A mold-locking cavity having the mold material included therein may be disposed in contact with a second surface of the first extended portions opposed to the first surface of the first extended portions, a second surface of the second extended portions opposed to the first surface of the second extended portions, the first portion of the leadframe, and the second portion of the leadframe.

TECHNICAL FIELD

This description relates to semiconductor packaging techniques for wide band gap semiconductor devices.

BACKGROUND

Wide band gap (WBG) semiconductor devices provide many advantages over traditional (e.g., Silicon) semiconductor devices. For example, WBG semiconductor devices are generally able to operate at higher voltages, frequencies, and temperatures than traditional semiconductor devices, and typically provide higher power efficiency.

However, various aspects of WBG devices may make it difficult to fully realize the types of advantages referenced above. For example, WBG devices tend to be more brittle or fragile than traditional semiconductor devices. As a result, WBG devices are more susceptible to malfunction than traditional semiconductor devices.

SUMMARY

According to one general aspect, a semiconductor device package may include a leadframe, the leadframe having a first portion with first extended portions and a second portion with second extended portions, the first extended portions being interdigitated with the second extended portions. The semiconductor device package may include mold material encapsulating at least a portion of the leadframe and at least a portion of a semiconductor die electrically mounted to the leadframe, the semiconductor die having a first set of contacts alternated with a second set of contacts, with the first set of contacts connected to a first surface of the first extended portions and the second set of contacts connected to a first surface of the second extended portions. The semiconductor device package may include a mold-locking cavity having the mold material included therein and in contact with a second surface of the first extended portions opposed to the first surface of the first extended portions, a second surface of the second extended portions opposed to the first surface of the second extended portions, the first portion of the leadframe, and the second portion of the leadframe.

According to another general aspect, a semiconductor device package may include a leadframe having a source portion and a drain portion, the source portion having source extended portions extending towards the drain portion and having source contact pads, and the drain portion having drain extended portions extending toward the source portion and having drain contact pads. The semiconductor device package may include a semiconductor die having alternating source contacts and drain contacts provided thereon, the source contacts being connected to the source contact pads and the drain contacts being connected to the drain contact pads. The semiconductor device package may include a mold locking cavity defined by surfaces of the source extended portions and the drain extended portions that are opposite the source contact pads and the drain contact pads, and mold material encapsulating at least a portion of the leadframe and at least a portion of the semiconductor die, and filling the mold locking cavity including contacting the surfaces of the source extended portions and the drain extended portions.

According to another general aspect, a method of making a semiconductor device package may include providing a semiconductor die having alternating source contacts and drain contacts on a leadframe, the leadframe having a source portion and a drain portion, the source portion having source extended portions extending towards the drain portion and having source contact pads, and the drain portion having drain extended portions extending toward the source portion and having drain contact pads. The method may include connecting the source contacts to the source contact pads and the drain contacts to the drain contact pads, and encapsulating at least a portion of the leadframe and at least a portion of the semiconductor die with a mold material, including filling a mold locking cavity defined by surfaces of the source extended portions and the drain extended portions that are opposite the source contact pads and the drain contact pads, with the mold material contacting the surfaces of the source extended portions and the drain extended portions.

DETAILED DESCRIPTION

Wide band gap (WBG) semiconductor devices have many desirable properties, but are difficult to package in a reliable, low cost, high throughput manner. Techniques described herein may be utilized to provide such reliable, low cost, high throughput packaging of WBG semiconductor devices, using, e.g., flip-mounting of a WBG die on a leadframe that has alternating, extended portions (e.g., interdigitated portions), and that provides a mold-locking cavity. Then, suitable mold materials may be used to encapsulate desired portions of the leadframe and the WBG die, including filling the mold-locking cavity formed by the alternating, extended portions. Accordingly, even when the WBG die is brittle or otherwise susceptible to mechanical stress, the resulting package is mechanically stable and enables use of the WBG die in high power and other specialized settings, without sacrificing electrical or thermal performance aspects of the WBG die.

Example implementations may comply with other packaging requirements of various types of WBG dies. In particular, WBG dies of varying sizes and dimensions may be packaged using the described techniques. Further, creepage distance requirements for all such WBG dies may be met. Additionally, standard solder connections and other inexpensive, available techniques may be used to implement the described techniques.

In some implementations, the extended, alternating portions have first surfaces to which the WBG is flip-mounted, and second, opposed surfaces that define the mold-locking cavity. For example, the mold-locking cavity may be provided as a space(s) between the second surfaces of the extended, alternating portions and a plane defined by surfaces of leadframe portions from which the extended, alternating portions extend. In some implementations, the mold-locking cavity may be provided by topsetting the extended, alternating portions of the leadframe. In other implementations, the mold-locking cavity may be provided by using a relatively thick, half-etched leadframe.

FIG.1is a simplified, partially exploded view of a molded package for WBG semiconductor devices.FIG.1illustrates a cross-section side view of a leadframe102, and a bottom view of a portion of a WBG die104, where the WBG die portion104includes a source contact106and drain contacts108. More generally, as illustrated and described below, a WBG die as used herein may include a plurality of alternating source contacts and drain contacts (including the source contact106and the drain contacts108), as well as a gate contact. In some implementations, a Kelvin sense contact and ground contact may be included, as well.

The leadframe102includes a first portion110and a second portion112. The second portion112is illustrated as including an extended portion113, which has a first surface113ato which the WBG die104may be attached, and a second, opposed surface113bthat partially defines a mold-locking cavity114. As shown, the mold-locking cavity114is defined at least between the second surface113bof the extended portion113and a plane defined by surfaces110a,112aof leadframe portions110,112, respectively. The mold-locking cavity114includes an opening114abetween the leadframe portion110and the leadframe portion112, through which mold material115may fill the mold-locking cavity114. Not shown inFIG.1, but described in detail below, the mold material115may further encapsulate some or all of the leadframe102and the WBG die104, in addition to filling the mold-locking cavity114. The mold-locking cavity114may be formed by half-etching of the leadframe102.

Also inFIG.1, a canal116formed in the leadframe portion112may provide solder overflow protection, which prevents a solder layer118from overflowing or extending along the leadframe portion112any farther than the canal116. The solder layer118may thus be formed accurately on the extended portion113, so that the source contact106may be soldered to the extended portion113, as indicated by the dashed lines inFIG.1between the source contact106and the solder layer118.

Not visible inFIG.1, but illustrated and described in detail below, e.g., with respect toFIG.2, the extended portion113is but one of a plurality of alternating, extended portions of the leadframe102(i.e., of leadframe portions110,112), which align with the alternating source and drain contacts106,108of the WBG die104. That is, in the simplified example ofFIG.1, the leadframe portion110should be understood to include at least two extended portions that would align with the drain contacts108. More generally, the leadframe portion112(which may also be referred to as source leadframe portion112) includes a plurality of extended portions (including the extended portion113), all of which are in electrical contact with (at least portions of) corresponding source contacts (including the source contact106) of the WBG die104. Similarly, the leadframe portion110(which may also be referred to as drain leadframe portion110) includes a plurality of extended portions, all of which are in electrical contact with (at least portions of) corresponding drain contacts (including the drain contacts108) of the WBG die104.

The resulting packaging structure, and various example implementations thereof, provide mechanical stability, while enabling full realization of the electrical and thermal properties of the WBG die104. The described design may be implemented in many different ways, examples of which are provided below. For example, the alternating, extended portions of the leadframe102, such as the extended portion113, may be cantilevered, or may be topsetted. The alternating, extended portions may be interdigitated. The alternating, extended portions may be kept out of contact with (may be unsupported by) an opposed leadframe portion (e.g., the extended portion113is not supported by the leadframe portion110), or may be attached thereto. The alternating, extended portions may be connected to the WBG die104(and to source contacts106and drain contacts108) using a redistribution layer (RDL). With these and other variations of implementations of the example ofFIG.1, it is possible to accommodate many different types, sizes, and dimensions of various WBG dies.

FIG.2is a three-dimensional top view of an example, partially-assembled implementation of the molded package for wide band gap semiconductor devices ofFIG.1. InFIG.2, a leadframe202is used for mounting a WBG die204, which includes a source contact206and a drain contact208of a plurality of alternating source contacts and drain contacts, as shown.

The leadframe202includes drain leadframe portion210, to be connected to the drain contact(s)208, and source leadframe portion212, to be connected to the source contact(s)206. By way of specific example, an extended portion214, e.g., including a drain contact pad, of the drain leadframe portion210, may be soldered to the drain contact208, while an extended portion216, e.g., including a source contact pad, of the source leadframe portion212may be soldered to the source contact206. Thus, the extended portion214may be referred to as a drain extended portion214, and the extended portion216may be referred to as a source extended portion216.

More generally, the drain extended portion214and the source extended portion216may be understood to be included in, or represent, a plurality of alternating, extended leadframe portions, which in the example ofFIG.2may be referred to as interdigitated contact pads218. As shown and described, the interdigitated contact pads218correspond to the source contact(s)206and the drain contact(s)208of the WBG die204, and enable flip-chip mounting thereof. Moreover, the interdigitated contact pads218provide a high degree of mechanical support for the WBG die204, while enabling use of widely-available and inexpensive components and connection techniques.

Further inFIG.2, the leadframe202includes etched canals220. For example, the leadframe202may be formed of a relatively thick material, e.g., sufficiently thick to enable formation of half-etched canals220,222. The half-etched canals220,222may be formed around the source extended portions216and the drain extended portions214, respectively, as shown. The half-etched canals220,222enable solder overflow protection, which enables accurate soldering of the source contact(s)206and the drain contact(s)208to the source extended portion(s)216and the drain extended portion(s)214, while avoiding potential short-circuits of the WBG die204to the leadframe202. Further, the half-etched canals220,222provide a path for encapsulating mold material to fill a mold-locking cavity of the leadframe202, and to generally encapsulate the leadframe202and the WBG die204. Examples of such mold material and mold-locking cavity are not enumerated or illustrated explicitly inFIG.2, but may be similar to the mold material115and mold-locking cavity114ofFIG.1, and are described in more detail below, e.g., with respect toFIGS.3and4.

InFIG.2, a leadframe portion223of the leadframe202provides a gate contact pad224. Similar to the source and drain connections already described, the gate contact pad224may be soldered to a gate contact225of the WBG die204, and may be attached to the leadframe portion223using a half-etched canal226.

Alignment fiducials227,228may be used to perform accurate alignment of the leadframe202and the WBG die204. Use of the alignment fiducials227,228provides a reference point(s) for ensuring proper placement of the WBG die204, as illustrated in more detail in the example assembly process ofFIG.8.

As also illustrated in more detail with respect toFIG.8, solder230may be placed appropriately on the various interdigitated source/drain contact pads218, as well as on the gate contact pad224and on the leadframe portion212. The solder230may thus enable desired connections of the WBG die204, and other desired connections (e.g., a grounding clip and/or heatsink materials, in examples described below).

FIG.3is a three-dimensional top view of the example ofFIG.2, fully assembled.FIG.4is a three-dimensional bottom view of the example ofFIG.2, fully assembled.FIG.3further illustrates a clipbond heatsink302, which may be half-etched for locking and isolation purposes, as illustrated in more detail with respect toFIG.5.FIG.3illustrates encapsulation of the leadframe202and the WBG die204with mold material304.FIG.3further illustrates a mold-locking cavity306, analogous to the mold-locking cavity114ofFIG.1, which is more easily visible in (and explained in more detail with respect to) the cross section side views ofFIGS.5,6, and7.

FIG.3illustrates suitable example implementations when the WBG die204does not provide a ground connection or terminal on a surface of the WBG die204attached to the leadframe202. In such cases, if the source contacts206will be grounded through the source leadframe portion212, then the clipbond heatsink302may be soldered to the source leadframe portion212, and thus may be connected to the source contacts206, and grounded, e.g., through a circuit board to which the package ofFIG.3will be connected. The clipbond heatsink302also facilitates thermal dissipation.

The mold material304may be any suitable mold material, such as, e.g., an Epoxy Molding Compound (EMC) mold material. In particular, the mold material304may be selected as a low stress mold material that also provides good thermal dissipation and high dielectric values.

FIG.4illustrates an internal creepage distance402and an external creepage distance404. In general, creepage distance refers to a shortest distance along an insulator between two conducting elements (e.g., source and drain), so that creepage is associated with device failure or malfunction, and should be avoided. InFIG.4, the internal creepage distance402refers to the illustrated shortest distance between a pair of a source contact206and a drain contact208. The external creepage distance404refers to the illustrated distance between the drain leadframe portion210and the source leadframe portion212.

Creepage distances402,404defined for the leadframe202may be determined based on factors related to the WBG204implementation being packaged. For example, in general, the creepage distances402,404may be selected and designed in direct proportion to a voltage rating of the WBG die204and desired applications, so that a higher voltage rating requires a larger creepage distance.

Further, in the example ofFIGS.3and4, because the clipbond heatsink302is grounded with the source contacts206, a cross-package creepage distance406exists between the clipbond heatsink302and the drain contacts208(e.g., in a vertical direction in the cross section views ofFIG.6, and along a side of the illustrated package). As a result, inFIGS.3and4, it may be desirable to limit a size of the clipbond heatsink302to ensure that the specified minimum creepage distance is maintained.

FIG.4further illustrates a Kelvin terminal408, included to perform Kelvin sensing for improved switching efficiency. An exposed drain pad410, exposed source pad412, and exposed gate pad414are also illustrated.

The mold-locking cavity306is thus formed between a surface of the drain extended portion(s)214and the source extended portion(s)216facing the exposed pads410,412,414, and the exposed surfaces of the exposed pads410,412,414, as is more easily visible inFIGS.5-7. The mold-locking cavity306, in combination with the extended alternating portions of the leadframe202, e.g., the half-etched cantilevered contact pads214,216ofFIGS.2-4, enable a large surface area in which the mold material304is in contact with the leadframe202, and thereby increase the overall mechanical stability of the resulting package.

A thickness of the leadframe202may be selected to optimize a depth of the mold-locking cavity306. For example, depending on various factors such as a size and voltage rating of the WBG die204and the associated creepage distances,402,404,406, and other design requirements, the leadframe202may be selected to be, e.g., 10 mm, 15 mm, 20 mm, or more, resulting in a deeper mold-locking cavity306and enhanced stability associated with use of larger amounts of the mold material304therein.

For example, in the implementations ofFIGS.2-8in which the half-etching of the leadframe202is used to provide the solder overflow canals220,222, design parameters for associated etch depths may be selected to optimize package mechanical stability relative to the creepage distances402,404,406, and relative to overall size requirements/constraints for the package. More generally,FIG.4illustrates that absolute and relative sizes of the extended portions (interdigitated, half-etched, cantilevered contact pads)214,216may be easily selected and configured to meet such design requirements, across a range of WBG die sizes and applications.

FIG.5is a first cross section, side view of the example implementation ofFIGS.2-4.FIG.6is a second cross section, side view of the example implementation ofFIGS.2-4.FIG.7is a third cross section, side view of the example implementation ofFIGS.2-4.

FIGS.5-6illustrate an example of the mold-locking cavity306in more detail. For example, analogous to the opening114aofFIG.1, an opening502inFIG.5and an opening602inFIG.6facilitate filling of the mold-locking cavity306with the mold material304, as well as increased areas for mold locking between the mold material304and the WBG die204. Similarly, an opening or space702inFIG.7facilitates mold locking between the mold material304and the WBG die204.

FIGS.5-7further illustrate a nature and operation of the solder overflow canals220,222. As shown, and as described in more detail, below, with respect toFIG.8, the solder overflow canals220,222ensure that any excess solder230applied to the leadframe202will not establish an electrical connection, and thus a potential short-circuit, between the WBG die204and the leadframe202.

FIG.8illustrates an example process flow for constructing the example implementation ofFIGS.2-7. InFIG.8, the example process flow begins (802) with the leadframe202as a bare metal leadframe, e.g., a Copper (Cu) leadframe, having the various features described and illustrated above with respect toFIGS.2-7. Printing (804) or other dispensing of the solder230may then proceed. As described, solder overflow may be prevented by use of the canals220,222.

Flip attaching (806) of the WBG die204may then proceed, followed by further dispensing of solder809and corresponding attachment (808) of the clipbond heatsink302using the solder809and remaining exposed portions of the solder230. Alignment fiducials227and228on leadframe portion212provide visual reference points for proper placement of the WBG die204and clipbond heatsink302on attachment to the leadframe202. Solder reflow and cleaning (e.g., flux immersion cleaning) (810) may then facilitate proceeding to one of a plurality of encapsulation options (812) for applying the mold material304, while still exposing the clipbond heatsink302.

For example, a film assist mold process with post-mold curing (PMC) (814) may be used. In the film assist mold process, a mold release film is used to expose the clipbond heatsink302. Meanwhile, PMC uses increased temperature to decrease a time required for the curing process and to optimize desired physical properties of the mold material304. Alternatively, a molding process combined with PMC may be used (816), followed by a package grind (818) to expose the clipbond heatsink302.

In the example ofFIG.8, package singulation (820) may be performed, in conjunction with deflashing of any excess mold material flashing, as well as tin (Sn) postplating. In other example implementations, the leadframe202and the clipbond heatsink302may be pre-plated with NiPdAu (Nickel Palladium Gold), in which case the deflashing and Sn postplating processes may be eliminated. Finally inFIG.8, electrical testing (822) may finalize the packaging process.

FIG.9illustrates a three-dimensional top view of an alternate example implementation of the implementation ofFIGS.2-8.FIG.10is a cross section, side view of the example implementation ofFIG.9, taken along line A-A.

InFIGS.9and10, A WBG die904includes a grounding terminal1002, as is visible inFIG.10. Accordingly, it is not necessary to include a clipbond heatsink302as in the implementations ofFIGS.3-8. As a result, multiple options may be used for providing heat shielding and/or for providing encapsulating mold material908with respect to the mold material908, and/or to the WBG die904.

FIGS.9and10illustrate an example of a dual cool, shielded exposed die implementation, in which a shield906is disposed on the WBG die904. The shield906may be formed using, e.g., a suitable ceramic material, or copper. For example, for larger creepage distances, a nonconductive shield such as ceramic may be used (so that a vertical creepage distance will not be compromised), but if available creepage distance permits, then a conductive metal, such as copper, may be used.

In the example ofFIGS.9-10, the mold material908is formed as a thin overmold for the shield906, as shown. InFIG.10, a high-melt solder joint1004is used to mount the WBG die904to the leadframe202. The mold material908may be selected as having a relatively high thermal efficiency.

FIG.11illustrates a three-dimensional top view of another alternate example implementation of the implementation ofFIGS.9-10.FIG.12is a cross section, side view illustrating a first example implementation of the example implementation ofFIG.11, taken along line A-A.FIG.13is a cross section, side view illustrating a second example implementation of the example implementation ofFIG.11, taken along line A-A.

FIGS.11-13illustrate that multiple options are available for forming the encapsulating mold material1102, and for thus implementing different approaches to cooling the package ofFIG.11. For example,FIG.12illustrates a dual cool option with a top exposed die904, since, as shown inFIG.12, the WBG die904is partially exposed by the encapsulation option shown as mold material1102a. Such an option provides direct cooling of the WBG die904, but is more likely to expose the WBG die904to potential damage.

FIG.13illustrates a single cool, overmolded option, in which the WBG die904is overmolded by the mold material1102b, e.g., a high thermal efficiency mold material as inFIGS.9-10. In contrast to the example implementation ofFIG.12, the implementation ofFIG.13potentially provides less cooling, but with additional protection of the WBG die904. The overmolding options ofFIGS.10and13may be implemented, e.g., using film assisted molding, or by grinding after overmolding.

In contrast to the examples ofFIGS.3-8, in which the clipbond heatsink302is used to provide grounding and is source-connected, the implementations ofFIGS.9-13enables relatively larger sizes of the heatsink shield906inFIGS.9,10, and generally enables the use of larger die sizes inFIGS.9-13as compared toFIGS.3-8.

In the various implementations described herein, including those of FIGS.1-13, the flip mounting or flip-chip mounting of the WBG die204,904, enables a low-resistance, low-inductance package configuration that enables an efficient electrical performance of the package (e.g., providing a reduced current path from die to board). In particular, electrical connections provided through the thick leadframe202enable high-performance mounting of the WBG die204,904, while various top half-etched canals prevent solder overflow from leading to short-circuit events. Further, the described leadframe layout provides sufficient dielectric material thickness to guard against high voltage arcing that may occur due to superficial cracks that may occur in the encapsulating mold material.

In various implementations, source extended portions and drain extended portions may extend at least a majority of a distance between a source leadframe portion and a drain leadframe portion, and, as shown, may be interdigitated. Alternatively, as illustrated and described below, source extended portions and drain extended portions may extend less than a majority of a distance between the source leadframe portion and the drain leadframe portion.

Elongated, interdigitated source/drain portions providing contact pads may significantly increase a contact area between mold material and leadframe, while a thick etched leadframe provides additional mold volume underneath the half-etched contact pads. Further, high voltage rating is enabled, e.g., either by the thick leadframe layout described above using long half-etched areas, or through topsetted leadframes, as referenced above and described below with respect toFIGS.14-16.

Specifically,FIG.14is a transparent top view of an example implementation of the package ofFIG.1, with topsetted contact portions.FIG.15Ais a first cross section, side view of the example implementation ofFIG.14.FIG.15Bis a second cross section, side view of the example implementation ofFIG.14.FIG.15Cis a third cross section, side view of the example implementation ofFIG.14.FIG.16is a bottom view of the example implementation ofFIG.14.

In the example ofFIG.14, a leadframe1402has a WBG die1404flip-mounted thereon. Illustrated transparently, the WBG die1404includes alternating source contacts1406and drain contacts1408. A drain leadframe portion1410is on a drain side of the leadframe1402, while a source leadframe portion1412is on a source side of the leadframe1402.

As further illustrated, the source leadframe portion1412includes source extended portions1414providing leadframe source contact pads, while the drain leadframe portion1410includes drain extended portions1416providing leadframe drain contact pads. Solder overflow canals1420, as described above, enable accurate placement and use of solder for attachment of the drain extended portions1416to the drain contacts1408, and for attachment of the source extended portions1414to the source contacts1406.

A gate leadframe portion1423includes a gate contact pad1424connected to a gate contact1425of the WBG die1404. The leadframe1402further includes alignment fiducials1428.

A clipbond heatsink1430is attached to provide a grounded connection to the source leadframe portion1412, similarly to the clipbond heatsink302ofFIG.3. Mold material1432provides encapsulation of the package. Leadframe portion1434provides Kelvin sense terminal1436. In another packaging configuration of similar footprint, the Kelvin sense terminal1434may be isolated from the Source leadframe portion1412, but still connected to the same grounding clipbond heatsink1430through the same soldering process.

The source-drain cross-section at S-D ofFIG.15Aillustrates that the source extended portion1414and the drain extended portion1416are topsetted, thereby forming a mold-locking cavity1502. As illustrated, topsetting refers to a raising of a surface of the source extended portion1414and the drain extended portion1416relative to the leadframe source portion1412and the leadframe drain portion1410, respectively. The Kelvin-Drain cross-section at K-D ofFIG.15Billustrates the mold-locking cavity1502further.

The topsetted implementation ofFIGS.14-16may be used when an external creepage distance is larger than a die width of a WBG die to be packaged, thereby accommodating smaller die sizes. Conversely, example implementations ofFIGS.2-13may be used for a WBG die that is larger than the external creepage distance, thereby accommodating larger die sizes.

FIG.17is a transparent top view of an example implementation of the package ofFIG.1, using a redistribution layer (RDL), e.g., a copper RDL.FIG.18is a cross section, side view of the example implementation ofFIG.17.FIG.19is a three-dimensional top view of the example implementation ofFIG.17.FIG.20is an exploded view of the example implementation ofFIG.17.

As shown and described below, some instances of the WBG die104ofFIG.1may have alternating source contacts106and drain contacts108that are too closely-spaced to effectively solder corresponding alternating extended portions of a contact pad thereto. Further, a large die-to-package ratio may prevent sculpting of half-etched canals. Additionally, for devices with low to medium voltage rating, an external creepage distance need not be wide.

In these and similar implementations, for example, two portions of a copper RDL may be attached to the WBG die104, with a first, source portion connected to all the source contacts on one side of the WBG die104to create a combined source contact, and a second, drain portion connected to all the drain contacts on a second side of the WBG die104to create a combined drain contact. As further shown and described, the RDL implementations ensure that the source portion of the RDL does not electrically contact any of the drain contacts on the first side of the WBG die104, while the drain portion of the RDL does not electrically contact any of the source contacts on the second side of the WBG die104. Put another way, the RDL connects a portion of each alternating one of a first set of (e.g., source) contacts to a first (e.g., source) leadframe portion, and a portion of each alternating one of the second set of (e.g., drain) contacts to the second (e.g., drain) leadframe portion. Thus, such RDL implementations enable electrical conduction of the WBG die104, even if a solderable top metal (STM) pad does not fully cover a die top metallization layer, as illustrated and described, below.

In the example ofFIG.17, a leadframe1702has a WBG die1704flip-mounted thereon. Illustrated transparently, the WBG1704includes alternating source contacts1706and drain contacts1708. A drain leadframe portion1710is on a drain side of the leadframe1702, while a source leadframe portion1712is on a source side of the leadframe1702.

In the cross-sectional view ofFIG.18, taken along A-A inFIG.17, a RDL1800is shown as including four layers. A first layer (2002inFIG.20) includes a drain portion1714and a source portion1716. A second layer (2004inFIG.20) includes a polyimide (PI) layer1802, not visible inFIG.17. A third layer (2006inFIG.20) includes copper layer1804, not visible inFIG.17. A fourth layer (2008inFIG.20) includes a PI layer1718.

A drain portion1714of the first layer of the RDL1800is disposed on the drain leadframe portion1710, while a source portion1716of the first layer of the RDL1800is disposed on the source leadframe portion1712. The drain portion1714and the source portion1716may be soldered to the drain leadframe portion1710and the source leadframe portion1712, respectively, using a solder layer1806.

As shown inFIGS.17and18, the RDL1800enables electrical contact between the source portion1716of the first layer of the RDL1800and the source contacts1706, along a portion1706aof the source contacts1706that are thus electrically connected to define a first side1704aof the WBG die1704as a source side. At the same time, the PI layers1802,1718block electrical contact between the drain portion1714of the first layer of the RDL1800and the source contacts1706, along a portion1706bof the source contacts1706on a second side1704bof the WBG die1704that is thus defined as a drain side. Conversely, then, the RDL1800enables electrical contact between the drain portion1714of the first layer of the RDL1800and the drain contacts1708, along a portion1708bof the drain contacts1708that are thus electrically connected to define the second side1704bof the WBG die1704as the drain side. At the same time, the PI layers1802,1718block electrical contact between the source portion1714of the first layer of the RDL1800and the drain contacts1708, along a portion1708aof the drain contacts1708on the first side1704aof the WBG die1704that is defined as the source side.

Put another way, the PI layers1802,1718provide openings through which source/drain contacts may be made, using intervening copper layer1804, while otherwise blocking source/drain contacts. In this way, an external creepage distance ECD1719may be defined between the source portion1716of the first layer of the RDL1800and the drain portion1714of the first layer of the RDL1800.

Further inFIG.17, a gate contact1720is electrically connected to a gate portion1723of the leadframe1702. A Kelvin contact1722of the WBG die1704is connected to a Kelvin terminal1724of the leadframe1704. The gate and Kelvin connections are illustrated in more detail in the top view ofFIG.19and the exploded side view ofFIG.20.

In addition,FIG.19illustrates that the leadframe1702may include the type of solder overflow half-etched canals1904described above, while being encapsulated in mold material1902. The mold material1902fills a mold-locking cavity1808to provide additional stability to the package, as described herein.

Further, the exploded view ofFIG.20illustrates an entirety of the solder layer1806.FIG.20further illustrates that the source portion1714and the drain portion1716are part of the first layer2002of the RDL1800, which further includes contact portions for the gate contact1720and Kelvin contact1722of the WBG die1704.FIG.20also illustrates more fully a nature of openings in the PI layer2004, which enable source and drain connections to be formed on desired sides1704a,1704bof the WBG die1704.

In some cases, when a die to package ratio is large (e.g., 80-90%), it may be difficult to provide the half-etched canals1904. In these cases, the RDL1800can nevertheless prevent solder shorting to the edges of the WBG die1704. For devices with low to medium voltage ratings, the ECD1719may be adjusted accordingly. In the various example implementations, the RDL1800enables electrical conduction of the drain and source to be optimized, even when the first layer2002of the RDL does not fully cover the metallization layer2010of the WBG die1704, as illustrated and described with respect toFIGS.17-20.

In the implementations ofFIGS.17-20and variations thereof, the WBG die1704may not have a coplanar, integrated ground contact, similar to the implementations ofFIGS.2-8. In such cases, a clipbonded heatsink may be included, similar to the clipbonded heatsink302ofFIG.3.

When a coplanar, integrated ground contact is included, other implementations may be used. For example,FIGS.21A-23illustrate an example package layout for a WBG die that includes a co-planar ground contact and alternating drain and source terminals. Specifically,FIG.21Ais a top view of an example package layout for a WBG die that includes a co-planar ground contact and alternating drain and source terminals.FIG.21Bis a first cross section side view of the example implementation ofFIG.21A.FIG.21Cis a second cross section side view of the example implementation ofFIG.21A.FIG.21Dis a package bottom view of the example implementation ofFIG.21A.FIG.22is a three-dimensional top view of the example implementation ofFIGS.21A-21D.FIG.23is an exploded view of the example implementation ofFIGS.21A-21D.

In the example ofFIG.21A, a leadframe2102has a WBG die2104mounted thereon, which has source contacts2106and drain contacts2108. The leadframe2102includes drain portion2110and source portion2112, which, in the example, are alternating to match the source contacts2106and the drain contacts2108, and which have drain contact pads2114and source contact pads2116provided thereon. A drain bump array2117and a source bump array2118refers to conductive bumps used to establish connections between the leadframe2102and the WBG die2104, as illustrated and described in more detail, below. Gate2120and ground terminal2122are further illustrated.

InFIG.21B, a cross section taken along line A-A ofFIG.21A, half etched canals2124provide the type of solder overflow prevention and other advantages described herein, while a mold-locking cavity2126provides improved package stability. InFIG.21C, a cross section taken along line B-B ofFIG.21Aillustrates an alternating nature of the leadframe drain portions2110and source portions2112.FIG.21Dillustrates a package bottom view, including an ECD2129.

Further visible inFIG.22, mold material2202encapsulates the package, while a PI layer2204provides passivation and enables desired drain/source connections for the bump arrays2117,2118, as shown in more detail inFIG.23.

Specifically,FIG.23illustrates that a solder bump array2302may be used to attach the, e.g, Cu bump array2117,2118to the leadframe2102. Accordingly, electrical connection to the source contacts2106and the drain contacts2108may be established through the PI layer2204.

In various implementations, the CU bump array2117,2118may include circular or oblong bumps. As shown, the drain and source contact pads may be matched with the bump array2117,2118as one elongated pad that extends to the opposing ends of the package. Contact pad width may be maximized thru minimization of the pad to pad spacing. Package footprint can follow the alternating drain and source connections of the die, but in a slightly bigger outline than the WBG die2104.

In a similar packaging configuration asFIGS.21A-23,FIGS.24A-26illustrate a packaging configuration which may be suitable for WBG die with a relatively small contact pad pitch. As illustrated and described, the same terminal pad types (i.e., all drain and all source terminal pads) are placed on opposing sides. Further, alternating contact pads may be hidden through half-etching. Accordingly, terminal width may be maximized for relatively stronger solder joints.

Specifically,FIG.24Ais a top view of an example package layout for a WBG die that includes a co-planar ground contact with drain and source terminals on opposing sides.FIG.24Bis a cross section side view of the example implementation ofFIG.24A.FIG.24Cis a package bottom view of the example implementation ofFIG.24A.FIG.25is a three-dimensional top view of the example implementation ofFIGS.24A-24C.FIG.26is an exploded view of the example implementation ofFIGS.24A-24C.

In the example ofFIG.24A, a leadframe2402has a WBG die2404mounted thereon, which has source contacts2406and drain contacts2408. The leadframe2402includes drain portion2410and source portion2412, which, in the example, are alternating to match the source contacts2406and the drain contacts2408, and which have drain contact pads2414and source contact pads2416provided thereon. A drain bump array2417and a source bump array2418refers to conductive bumps used to establish connections between the leadframe2402and the WBG die2404, as illustrated and described in more detail, below, and similar to bump arrays2117,2118, above. Gate2420is further illustrated.

InFIG.24B, a cross section taken along line A-A ofFIG.24A, half etched canals2424provide the type of solder overflow prevention and other advantages described herein, while a mold-locking cavity2426provides improved package stability.FIG.24Cillustrates a package bottom view, including an ECD2429.

Further visible inFIG.25, mold material2502encapsulates the package, while a PI layer2504provides passivation and enables desired drain/source connections for the bump arrays2417,2418, as shown in more detail inFIG.26.

Specifically,FIG.26illustrates that a solder bump array2602may be used to attach the, e.g, Cu bump array2417,2418to the leadframe2402. Accordingly, electrical connection to the source contacts2406and the drain contacts2408may be established through the PI layer2504.

In various implementations, the CU bump array2417,2418may include circular or oblong bumps. As shown, the drain and source contact pads may be matched with the bump array2417,2418as one elongated pad that extends to the opposing ends of the package.

Thus, described implementations provide a mold locking cavity defined by surfaces of source extended portions and drain extended portions that are opposite source contact pads and drain contact pads of source extended portions and drain extended portions of a leadframe. Accordingly, a semiconductor device package may be provided with mold material encapsulating at least a portion of the leadframe and at least a portion of a semiconductor die flip-mounted thereon, and filling the mold locking cavity including contacting the surfaces of the source extended portions and the drain extended portions thereof.

Some implementations may be implemented using various semiconductor processing and/or packaging techniques. Some implementations may be implemented using various types of semiconductor processing techniques associated with semiconductor substrates including, but not limited to, for example, Silicon (Si), Gallium Arsenide (GaAs), Gallium Nitride (GaN), Silicon Carbide (SiC) and/or so forth.