IC CHIP, RADIO FREQUENCY MODULE, AND COMMUNICATION DEVICE

In an IC chip, a control unit is connected to at least one of a first switch unit and a second switch unit. In plan view from a thickness direction of a substrate, a plurality of first terminals are located between the first switch unit and the second switch unit in a first direction, and are arranged in a line in a second direction intersecting with the first direction. In plan view from the thickness direction of the substrate, a plurality of second terminals are located between the plurality of first terminals, and the first switch unit or the second switch unit, and are arranged in a line in the second direction. The plurality of first terminals include at least one control terminal among a plurality of control terminals connected to the control unit. The plurality of second terminals include a ground terminal.

BACKGROUND OF THE DISCLOSURE

Field of the Disclosure

The present disclosure generally relates to an IC chip, a radio frequency module, and a communication device, and more particularly relates to an IC chip including a plurality of switch units, a radio frequency module including the IC chip, and a communication device including the radio frequency module.

Description of the Related Art

Patent Document 1 discloses a front-end module including a switch IC (IC chip). The switch IC includes a first switch unit and a third switch unit, and the first switch unit and the third switch unit are disposed to be adjacent to each other. The first switch unit includes an input terminal and an output terminal. In the first switch unit, the input terminal is connected to an antenna element.

The switch IC includes a base (substrate). In top view of the base, the first switch unit and the third switch unit are disposed to be adjacent to each other.

In the switch IC, the connection of each of a plurality of switches constituting the first switch unit and the connection of each of a plurality of switches constituting the third switch unit are switched by a control unit provided in the front-end module.

Patent Document 1: PCT International Publication No. WO2018/110393

BRIEF SUMMARY OF THE DISCLOSURE

In an IC chip including a plurality of switch units including a switch unit connected to an antenna terminal, the isolation between switch units different from each other may be decreased.

A possible benefit of the present disclosure is to provide an IC chip, a radio frequency module, and a communication device capable of improving the isolation between switch units different from each other.

According to an aspect of the present disclosure, an IC chip includes a substrate, a first switch unit, a second switch unit, a control unit, a plurality of first terminals, and a plurality of second terminals. The first switch unit is formed at the substrate. The first switch unit includes a first common terminal connected to an antenna terminal and a plurality of first selection terminals that are connectable to the first common terminal. The second switch unit is formed at the substrate. The second switch unit includes a second common terminal connected to a transmission path and a plurality of second selection terminals that are connectable to the second common terminal. The control unit is formed at the substrate. The control unit is connected to at least one of the first switch unit and the second switch unit. In plan view from a thickness direction of the substrate, the plurality of first terminals are located between the first switch unit and the second switch unit in a first direction and are arranged in a line in a second direction intersecting with the first direction. In plan view from the thickness direction of the substrate, the plurality of second terminals are located between the plurality of first terminals, and the first switch unit or the second switch unit and are arranged in a line in the second direction. The plurality of first terminals include at least one control terminal among a plurality of control terminals connected to the control unit. The plurality of second terminals include a ground terminal.

According to an aspect of the present disclosure, a radio frequency module includes the IC chip in the above aspect and a mounting board on which the IC chip is disposed.

According to an aspect of the present disclosure, a communication device includes the radio frequency module according to the above aspect, and a signal processing circuit. The signal processing circuit is connected to the radio frequency module.

The IC chip, the radio frequency module, and the communication device according to the aspects of the present disclosure can improve the isolation between switch units different from each other.

DETAILED DESCRIPTION OF THE DISCLOSURE

FIGS.1to8and10to13, which are referred to in the following embodiments or the like, are all schematic views, and each of ratios of sizes or thicknesses of each constituent element in the drawing does not necessarily reflect the actual dimensional ratio.

For example, as shown inFIG.9, an IC chip100is used in a radio frequency module200. The “radio frequency module” as used in the present specification is a module used in communication of radio frequency signals. The radio frequency module200is used, for example, in a communication device300as shown inFIG.9. The communication device300is, for example, a mobile phone (for example, a smartphone), but the present disclosure is not limited thereto, and may be, for example, a wearable terminal (for example, a smartwatch), or the like. The radio frequency module200is, for example, a module capable of supporting the fourth generation mobile communication (4G) standard, the fifth generation mobile communication (5G) standard, and the like. For example, the 4G standard is the third generation partnership project (3GPP: registered trademark) long term evolution (LTE: registered trademark) standard. The 5G standard is, for example, 5G new radio (NR). The radio frequency module200is, for example, a module capable of supporting carrier aggregation and dual connectivity.

As shown inFIGS.1and2, the IC chip100includes a substrate10, a first switch unit1, a second switch unit2, a control unit3, a plurality (for example, seven) of first terminals4, and a plurality (for example, five) of second terminals5. The first switch unit1is formed at the substrate10. The first switch unit1includes a first common terminal11connected to an antenna terminal T1(seeFIG.9) and a plurality (for example, eight) of first selection terminals12that are connectable to the first common terminal11. The second switch unit2is formed at the substrate10. The second switch unit2includes a second common terminal21connected to a transmission path Ru1and a plurality (for example, eight) of second selection terminals22that are connectable to the second common terminal21. The control unit3is formed at the substrate10. The control unit3is connected to the first switch unit1and the second switch unit2. In plan view from a thickness direction D3of the substrate10, the plurality of first terminals4are located between the first switch unit1and the second switch unit2in a first direction D1and are arranged in a line in a second direction D2intersecting with the first direction D1. For example, the second direction D2is a direction perpendicular to the first direction D1. In plan view from the thickness direction D3of the substrate10, the plurality of second terminals5are located between the plurality of first terminals4and the first switch unit1and are arranged in a line in the second direction D2. The plurality of first terminals4are connected to the control unit3. The plurality of first terminals4include at least one control terminal43among a plurality (for example, four) of control terminals43. The plurality of second terminals5include a ground terminal51.

The radio frequency module200according to Embodiment 1 includes a mounting board9and the IC chip100as shown inFIGS.5to8. The IC chip100is disposed on the mounting board9.

As shown inFIG.9, the radio frequency module200further includes a transmission circuit201. The transmission circuit201includes a power amplifier202. In addition, the radio frequency module200further includes a reception circuit205. The reception circuit205includes a low-noise amplifier206. In addition, the radio frequency module200further includes a plurality (for example, eight) of duplexers204. Each of the plurality of duplexers204includes a transmission filter241and a reception filter242. As a result, the radio frequency module200includes a plurality (for example, eight) of transmission filters241having pass bands different from each other, and a plurality (for example, eight) of reception filters242having pass bands different from each other. In the radio frequency module200, the plurality of transmission filters241and the plurality of reception filters242are in one-to-one correspondence, and the plurality of transmission filters241and the plurality of reception filters242correspond to, for example, a plurality of communication bands. Each of the plurality of communication bands is, for example, a communication band used for communication corresponding to frequency division duplex (FDD) as a communication method, a communication band used for communication corresponding to time division duplex (TDD) as a communication method, or a communication band used for communication corresponding to supplemental downlink (SDL) as a communication method. The plurality of communication bands include, for example, two or more communication bands included in a combination of communication bands allowed for simultaneous communication. The phrase of being allowed for simultaneous communication means that at least one of simultaneous reception, simultaneous transmission, and simultaneous transmission and reception is possible.

As shown inFIG.9, the communication device300includes the radio frequency module200and a signal processing circuit301. The communication device300further includes an antenna310. The communication device300further includes a circuit board (not shown) at which the radio frequency module200is mounted. The circuit board is, for example, a printed wiring board. The circuit board includes a ground electrode to which a ground potential is applied.

The circuit configurations of the radio frequency module200and the communication device300will be described below, and then the structures of the IC chip100and the radio frequency module200will be described in more detail.

(2.1) Circuit Configuration of Radio Frequency Module

The circuit configuration of the radio frequency module200according to Embodiment 1 will be described with reference toFIG.9.

The radio frequency module200is configured, for example, to be able to amplify a reception signal received from the antenna310and output the amplified reception signal to the signal processing circuit301. In addition, the radio frequency module200is configured to, for example, be able to amplify a transmission signal received from the signal processing circuit301and output the amplified transmission signal to the antenna310. The signal processing circuit301is not a constituent element of the radio frequency module200, but a constituent element of the communication device300including the radio frequency module200. The radio frequency module200is controlled by, for example, the signal processing circuit301of the communication device300.

As shown inFIG.9, the radio frequency module200includes the first switch unit1, the second switch unit2, and the control unit3. In addition, the radio frequency module200includes a third switch unit7, a fourth switch unit8, the plurality (for example, eight) of duplexers204, the transmission circuit201, the reception circuit205, and a plurality of external connection terminals T0. The plurality of external connection terminals T0include the antenna terminal T1, a plurality (for example, two) of signal input terminals T2, a plurality (for example, four) of external control terminals T3, a signal output terminal T4, and a plurality of external ground terminals T5(seeFIG.8). In addition, the radio frequency module200includes a controller210, a low pass filter209, and a plurality (for example, eight) of matching circuits208.

The first switch unit1includes the first common terminal11and the plurality (for example, eight) of first selection terminals12that are connectable to the first common terminal11. The first common terminal11of the first switch unit1is connected to the antenna terminal T1. More specifically, the first common terminal11of the first switch unit1is connected to the antenna terminal T1, for example, through the low pass filter209. The plurality of first selection terminals12of the first switch unit1are connected to the plurality of duplexers204. Each of the plurality of first selection terminals12is connected to the corresponding duplexer204among the plurality of duplexers204. More specifically, each of the plurality of first selection terminals12of the first switch unit1is connected to the transmission filter241and the reception filter242of the corresponding duplexer204among the plurality of duplexers204through the matching circuit208.

The first switch unit1includes, for example, a first switch circuit capable of connecting one or more first selection terminals12among the plurality of first selection terminals12to the first common terminal11. Here, the first switch unit1is capable of connecting the first common terminal11and the plurality of first selection terminals12in a one-to-one manner and a one-to-many manner, for example. The first switch unit1is controlled by the control unit3. The first switch unit1switches the connection state between the first common terminal11and the plurality of first selection terminals12under the control of the control unit3. The first switch unit1can switch the connection relationship between the antenna310and the plurality of duplexers204. Thus, the first switch unit1can switch the connection relationship between the antenna310and the plurality of transmission filters241, and can switch the connection relationship between the antenna310and the plurality of reception filters242.

The second switch unit2includes the second common terminal21and the plurality (for example, eight) of second selection terminals22that are connectable to the second common terminal21. The second common terminal21of the second switch unit2is connected to an output terminal222of the power amplifier202included in the transmission circuit201. More specifically, the second common terminal21of the second switch unit2is connected to the output terminal222of the power amplifier202, for example, through an output matching circuit203. The plurality of second selection terminals22of the second switch unit2are connected to the plurality of transmission filters241. Each of the plurality of second selection terminals22is connected to the corresponding transmission filter241among the plurality of transmission filters241.

The second switch unit2includes, for example, a second switch circuit capable of connecting one or more second selection terminals22among the plurality of second selection terminals22to the second common terminal21. Here, the second switch unit2is capable of connecting the second common terminal21and the plurality of second selection terminals22in a one-to-one manner and a one-to-many manner, for example. The second switch unit2is controlled by the control unit3. The second switch unit2switches the connection state between the second common terminal21and the plurality of second selection terminals22under the control of the control unit3.

The control unit3controls, for example, the first switch unit1and the second switch unit2in accordance with a control signal from the signal processing circuit301. The control signal outputted from the signal processing circuit301is a digital control signal. The control signals from the signal processing circuit301are inputted to the plurality of external control terminals T3of the radio frequency module200, are inputted to the plurality of control terminals43connected to the plurality of external control terminals T3, and are inputted to the control unit3connected to the plurality of control terminals43.

The third switch unit7includes a third common terminal71and a plurality (for example, two) of third selection terminals72that are connectable to the third common terminal71. The third common terminal71of the third switch unit7is connected to an input terminal221of the power amplifier202included in the transmission circuit201. The plurality of third selection terminals72of the third switch unit7are connected to the plurality of signal input terminals T2. Each of the plurality of third selection terminals72is connected to the corresponding signal input terminal T2among the plurality of signal input terminals T2.

The third switch unit7includes, for example, a third switch circuit that switches the connection state between the third common terminal71and the plurality of third selection terminals72. Here, the third switch unit7is controlled by, for example, the controller210. The third switch unit7switches the connection state between the third common terminal71and the plurality of third selection terminals72in accordance with a control signal from the controller210. The third switch unit7is, for example, a switch integrated circuit (IC).

The fourth switch unit8includes a fourth common terminal81and a plurality (for example, eight) of fourth selection terminals82that are connectable to the fourth common terminal81. The fourth common terminal81of the fourth switch unit8is connected to an input terminal261of the low-noise amplifier206included in the reception circuit205. More specifically, the fourth common terminal81of the fourth switch unit8is connected to the input terminal261of the low-noise amplifier206through, for example, an input matching circuit207. The plurality of fourth selection terminals82of the fourth switch unit8are connected to the plurality of reception filters242. Each of the plurality of fourth selection terminals82is connected to the corresponding reception filter242among the plurality of reception filters242.

The fourth switch unit8includes, for example, a fourth switch circuit capable of connecting one or more fourth selection terminals82among the plurality of fourth selection terminals82to the fourth common terminal81. Here, the fourth switch unit8is capable of connecting the fourth common terminal81and the plurality of fourth selection terminals82in a one-to-one manner and a one-to-many manner, for example. The fourth switch unit8is controlled by, for example, the controller210. The fourth switch unit8switches the connection state between the fourth common terminal81and the plurality of fourth selection terminals82in accordance with the control signal from the controller210. The fourth switch unit8is, for example, a switch IC.

Each of the plurality of duplexers204includes the transmission filter241and the reception filter242. In each of the plurality of duplexers204, the pass band of the transmission filter241is different from the pass band of the reception filter242, but the communication band corresponding to the pass band of the transmission filter241is the same as the communication band corresponding to the pass band of the reception filter242.

The transmission circuit201includes the power amplifier202and the output matching circuit203.

The power amplifier202has the input terminal221and the output terminal222. The power amplifier202performs power amplification of a transmission signal inputted to the input terminal221and outputs the power-amplified transmission signal from the output terminal222. The input terminal221of the power amplifier202is connected to one of the two signal input terminals T2through the third switch unit7. Thus, in the communication device300including the radio frequency module200, the input terminal221of the power amplifier202is connected to the signal processing circuit301of the communication device300through the third switch unit7and one of the two signal input terminals T2. The two signal input terminals T2are terminals for inputting radio frequency signals (transmission signal) from an external circuit (for example, the signal processing circuit301) to the radio frequency module200.

The output terminal222of the power amplifier202is connected to the second common terminal21of the second switch unit2through the output matching circuit203. Thus, the output terminal222of the power amplifier202is connectable to a plurality (for example, eight) of transmission filters241through the output matching circuit203and the second switch unit2. The power amplifier202is, for example, a multi-stage amplifier including a driver stage amplifier and a final stage amplifier. The power amplifier202is not limited to the multi-stage amplifier and may be, for example, an in-phase combining amplifier, a differential combining amplifier, or a Doherty amplifier.

The output matching circuit203is provided in a signal path between the output terminal222of the power amplifier202and the second switch unit2. The signal path between the output terminal222of the power amplifier202and the second switch unit2is a part of the transmission path Ru1. The output matching circuit203is a circuit for performing the impedance matching between the power amplifier202and the plurality of duplexers204, and includes, for example, a plurality of inductors and a plurality of capacitors.

The reception circuit205includes the low-noise amplifier206and the input matching circuit207.

The low-noise amplifier206has the input terminal261and an output terminal262. The low-noise amplifier206amplifies a reception signal inputted to the input terminal261and outputs the amplified reception signal from the output terminal262. The output terminal262of the low-noise amplifier206is connected to the signal output terminal T4. The output terminal262of the low-noise amplifier206is connected to the signal processing circuit301, for example, through the signal output terminal T4. The signal output terminal T4is a terminal for outputting a radio frequency signal (reception signal) from the low-noise amplifier206to an external circuit (for example, the signal processing circuit301).

The input matching circuit207is provided in a signal path between the fourth switch unit8and the input terminal261of the low-noise amplifier206. The input matching circuit207is a circuit for performing the impedance matching between the plurality of reception filters242and the low-noise amplifier206, and includes, for example, one inductor. The input matching circuit207is not limited to a case of including one inductor, and may include, for example, a plurality of inductors and a plurality of capacitors.

The controller210controls the power amplifier202. The controller210controls the power amplifier202in accordance with, for example, a control signal from the signal processing circuit301. The controller210is connected to the signal processing circuit301through a plurality of (for example, four) external control terminals T3. The controller210controls the power amplifier202based on a control signal acquired from the signal processing circuit301through the plurality of external control terminals T3. The control signal acquired by the controller210is a digital control signal. In addition, the controller210also controls the third switch unit7and the fourth switch unit8in accordance with the control signal from the signal processing circuit301.

The low pass filter209is connected between the antenna terminal T1and the first common terminal11of the first switch unit1.

The plurality (for example, eight) of matching circuits208are connected between the plurality of first selection terminals12of the first switch unit1and the plurality of duplexers204. The plurality of matching circuits208are circuits for performing the impedance matching between the plurality of duplexers204and the first switch unit1, and include, for example, a plurality of inductors and a plurality of capacitors.

The plurality of external connection terminals T0include the antenna terminal T1, the two signal input terminals T2, the four external control terminals T3, the signal output terminal T4, and the plurality of external ground terminals T5(seeFIG.8). The signal output terminal T4is a terminal for outputting a radio frequency signal (reception signal) from the reception circuit205to an external circuit (for example, the signal processing circuit301). The two signal input terminals T2are terminals for inputting radio frequency signals (transmission signal) from an external circuit (for example, the signal processing circuit301) to the radio frequency module200. The plurality of external control terminals T3are terminals for inputting control signals (digital control signals) from an external circuit (for example, the signal processing circuit301) to the radio frequency module200. That is, the plurality of external control terminals T3function as an interface for inputting control signals from the signal processing circuit301to the radio frequency module200. The plurality of external ground terminals T5are terminals to which a ground potential is applied.

(2.2) Circuit Configuration of Communication Device

As shown inFIG.9, the communication device300includes the radio frequency module200and the signal processing circuit301. The signal processing circuit301is connected to the radio frequency module200. The communication device300further includes the antenna310. The communication device300further includes a circuit board at which the radio frequency module200is mounted. The circuit board is, for example, a printed wiring board. The circuit board includes a ground electrode to which a ground potential is applied.

The signal processing circuit301includes, for example, an RF signal processing circuit302and a baseband signal processing circuit303. The RF signal processing circuit302is, for example, a radio frequency integrated circuit (RFIC) and performs signal processing on a radio frequency signal. The RF signal processing circuit302performs signal processing, such as up-conversion, on the radio frequency signal (transmission signal) outputted from the baseband signal processing circuit303, and outputs the radio frequency signal on which the signal processing is performed. In addition, the RF signal processing circuit302performs signal processing such as down-conversion, on a radio frequency signal (reception signal) outputted from the radio frequency module200, and outputs the radio frequency signal on which the signal processing is performed, to the baseband signal processing circuit303. The baseband signal processing circuit303is, for example, a baseband integrated circuit (BBIC). The baseband signal processing circuit303generates an I-phase signal and a Q-phase signal from the baseband signal. The baseband signal is, for example, an audio signal, an image signal, and the like received from the outside. The baseband signal processing circuit303performs IQ modulation processing by combining the I-phase signal and the Q-phase signal, and outputs a transmission signal. In this case, the transmission signal is generated as a modulation signal (IQ signal) by amplitude modulation of a carrier wave signal of a predetermined frequency in a period longer than a period of the carrier wave signal. The reception signal processed by the baseband signal processing circuit303is used, for example, as an image signal for image display or as an audio signal for a call by the user of the communication device300. The radio frequency module200transmits the radio frequency signal (reception signal and transmission signal) between the antenna310and the RF signal processing circuit302of the signal processing circuit301.

(2.3) Structure of IC Chip

As shown inFIGS.1and2, the IC chip100includes the substrate10, a multilayer structural portion13formed on the substrate10, and a plurality (for example,35) of external terminals.

In the IC chip100, in plan view from the thickness direction D3of the substrate10, an outer edge110of the IC chip100has a quadrangular shape. The outer edge110of the IC chip100includes a first side111and a second side112that face each other, and a third side113and a fourth side114that face each other. More specifically, the outer edge110of the IC chip100has a rectangular shape, each of the first side111and the second side112is a short side, and each of the third side113and the fourth side114is a long side.

The substrate10has a main surface101. As shown inFIG.2, the substrate10has the main surface101(also referred to as a first main surface101below) and a second main surface102that face each other in the thickness direction D3of the substrate10. In addition, the substrate10has an outer peripheral surface103. The outer peripheral surface103of the substrate10includes, for example, four side surfaces that connect an outer edge of the first main surface101and an outer edge of the second main surface102of the substrate10to each other, and does not include the first main surface101or the second main surface102. The first main surface101and the second main surface102of the substrate10are perpendicular to the thickness direction D3of the substrate10. Here, the term “perpendicular” is not limited to a case where it is strictly perpendicular (a case where an angle formed by the thickness direction D3of the substrate10, and the first main surface101or the second main surface102of the substrate10is 90°), and the angle formed by the thickness direction D3of the substrate10, and the first main surface101or the second main surface102of the substrate10only needs to be within a range of 85° or more and 95° or less. In the IC chip100, the second main surface102of the substrate10constitutes a main surface1002of the IC chip100on a side opposite from the mounting board9, and the outer peripheral surface103of the substrate10constitutes a part of an outer peripheral surface1003of the IC chip100. The outer peripheral surface1003of the IC chip100does not include the main surface1002of the IC chip100on the side opposite from the mounting board9or the main surface1001of the IC chip100on the mounting board9side.

The substrate10is, for example, a semiconductor substrate. The semiconductor substrate is, for example, a silicon substrate. The semiconductor substrate is not limited to a silicon substrate and may be a silicon-on-insulator (SOI) substrate. In addition, the semiconductor substrate is not limited to a silicon substrate and may be a compound semiconductor substrate (for example, a GaAs substrate or an SiC substrate).

The multilayer structural portion13is formed on the first main surface101of the substrate10. The multilayer structural portion13includes, for example, a plurality of wiring layers (not shown), an interlayer insulating film (not shown), and a passivation film (not shown). The plurality of wiring layers are formed in a predetermined pattern determined for each layer. Each of the plurality of wiring layers includes one or a plurality of wiring portions in a plane perpendicular to the thickness direction D3of the substrate10.FIG.2is a sectional view taken along line X1-X1ofFIG.1, and the hatching of each of the substrate10and the multilayer structural portion13is omitted.

The first switch unit1, the second switch unit2, and the control unit3are formed at the substrate10. More specifically, as shown inFIG.2, the first switch unit1, the second switch unit2, and the control unit3are formed over the multilayer structural portion13and a region including only the first main surface101among the first main surface101and the second main surface102of the substrate10in the thickness direction D3of the substrate10.

As shown inFIG.1, the first switch unit1includes the first common terminal11connected to an antenna terminal T1(seeFIG.9) and the plurality (for example, eight) of first selection terminals12that are connectable to the first common terminal11. The first switch unit1includes, for example, a plurality of first switching elements (not shown). The plurality of first switching elements include a plurality (for example, eight) of switching elements (also referred to as first series switching elements below) provided in a plurality (for example, eight) of first signal paths (not shown) between the first common terminal11and the plurality (for example, eight) of first selection terminals12, and a plurality (for example, eight) of switching elements (also referred to as first shunt switching elements below) provided between the plurality of first signal paths and the ground. The first series switching element is, for example, an electric field effect transistor. The first shunt switching element is, for example, an electric field effect transistor. In each of the plurality of first signal paths, the first series switching element is controlled to be in a conduction state, and the first shunt switching element is controlled to be in a non-conduction state, so that the first common terminal11and the first selection terminal12are connected. In addition, in each of the plurality of first signal paths, both the first series switching element and the first shunt switching element are controlled to be in a non-conduction state, so that the first common terminal11and the first selection terminal12are not connected. In addition, in each of the plurality of first signal paths, the first series switching element is controlled to be in a non-conduction state, and the first shunt switching element is controlled to be in a conduction state, so that the first common terminal11and the first selection terminal12are not connected. In each of the electric field effect transistors in the first switch unit1, a drain region and a source region are formed in the substrate10, a drain electrode is formed on the drain region, a source electrode is formed on the source region, and a gate electrode is formed on the first main surface101of the substrate10with a gate insulating film interposed therebetween. Thus, the drain electrode, the source electrode, and the gate electrode of each electric field effect transistor in the first switch unit1are included in the multilayer structural portion13. In addition, each of the plurality of first signal paths of the first switch unit1includes at least one wiring portion among the plurality of wiring portions of the multilayer structural portion13.

The second switch unit2includes the second common terminal21connected to the transmission circuit201(seeFIG.9) and the plurality (for example, eight) of second selection terminals22that are connectable to the second common terminal21. The second switch unit2includes, for example, a plurality of second switching elements (not shown). The plurality of second switching elements include a plurality (for example, eight) of switching elements (also referred to as second series switching elements below) provided in a plurality (for example, eight) of second signal paths (not shown) between the second common terminal21and the plurality (for example, eight) of second selection terminals22, and a plurality (for example, eight) of switching elements (also referred to as second shunt switching elements below) provided between the plurality of second signal paths and the ground. The second series switching element is, for example, an electric field effect transistor. The second shunt switching element is, for example, an electric field effect transistor. In each of the plurality of second signal paths, the second series switching element is controlled to be in a conduction state, and the second shunt switching element is controlled to be in a non-conduction state, so that the second common terminal21and the second selection terminal22are connected. In addition, in each of the plurality of second signal paths, both the second series switching element and the second shunt switching element are controlled to be in a non-conduction state, so that the second common terminal21and the second selection terminal22are not connected. In addition, in each of the plurality of second signal paths, the second series switching element is controlled to be in a non-conduction state, and the second shunt switching element is controlled to be in a conduction state, so that the second common terminal21and the second selection terminal22are not connected. In each of the electric field effect transistors in the second switch unit2, a drain region and a source region are formed in the substrate10, a drain electrode is formed on the drain region, a source electrode is formed on the source region, and a gate electrode is formed on the first main surface101of the substrate10with a gate insulating film interposed therebetween. Thus, the drain electrode, the source electrode, and the gate electrode of each electric field effect transistor in the second switch unit2are included in the multilayer structural portion13. In addition, each of the plurality of second signal paths of the second switch unit2includes at least one wiring portion among the plurality of wiring portions of the multilayer structural portion13.

The control unit3includes a control circuit that controls at least one of the first switch unit1and the second switch unit2in accordance with a control signal. The control signal is a digital control signal provided from an external circuit (for example, the signal processing circuit301of the communication device300). The control circuit controls at least one of the first switch unit1and the second switch unit2based on control signals that are outputted from the signal processing circuit301and inputted to the plurality of control terminals43.

The plurality of external terminals include the first common terminal11and the plurality (for example, eight) of first selection terminals12included in the first switch unit1, the second common terminal21and the plurality of second selection terminals22included in the second switch unit2, the plurality (for example, seven) of first terminals4, the plurality (for example, five) of second terminals5, and the plurality (for example, five) of third terminals6.

Each of the first common terminal11and the plurality of first selection terminals12is an RF terminal through which a radio frequency signal (transmission signal, reception signal) passes.

Each of the second common terminal21and the plurality of second selection terminals22is an RF terminal through which a radio frequency signal (transmission signal) passes.

The plurality (for example, seven) of first terminals4include at least one control terminal43(here, all four control terminals43) among the plurality (for example, four) of control terminals43to which the above-described control signals are inputted, and a plurality (for example, three) of ground terminals41. The plurality of control terminals43function as an interface for inputting the control signal from the signal processing circuit301to the IC chip100, in the IC chip100. The plurality of ground terminals41include the ground terminal (digital ground terminal) of the control unit3.

The plurality (for example, five) of second terminals5include a plurality (for example, five) of ground terminals51. The plurality of ground terminals51include the ground terminal of the control unit3. The plurality of ground terminals51may include one or more ground terminals (analog ground terminals) to which a plurality of first shunt switching elements are connected.

The plurality (for example, five) of third terminals6include a plurality (for example, five) of ground terminals61. The plurality of ground terminals61include the ground terminal of the control unit3. The plurality of ground terminals61may include one or more ground terminals (analog ground terminals) to which a plurality of second shunt switching elements are connected.

InFIG.1, dot hatching is applied to the plurality of control terminals43, and cross hatching is applied to the plurality of ground terminals (the plurality of ground terminals41, the plurality of ground terminals51, and the plurality of ground terminals61). However, the dot hatching and the cross hatching do not represent the cross section and are applied only to make the positional relationship between the plurality of control terminals43and the plurality of ground terminals easier to understand. As shown inFIG.1, the plurality of control terminals43are surrounded by a plurality of ground terminals in plan view from the thickness direction D3of the substrate10. Each of the plurality of external terminals includes, for example, a spherical conductive bump. A material of the conductive bump is, for example, a solder. In plan view from the thickness direction D3of the substrate10, an outer edge of each of the plurality of external terminals has a circular shape.

As shown inFIG.1, the plurality of first terminals4are located between the first switch unit1and the second switch unit2in the first direction D1in plan view from the thickness direction D3of the substrate10. The plurality of first terminals4are arranged in a line in the second direction D2intersecting with the first direction D1. For example, the second direction D2is a direction perpendicular to the first direction D1. The expression that “the plurality of first terminals4are arranged in a line in the second direction D2” means that, as shown inFIG.3, in plan view from the thickness direction D3of the substrate10, at least a part of each first terminal4other than a first terminal4A and a first terminal4B is located between two straight lines SL4where a distance from a center line CA4to one of the straight lines SL4in the first direction D1is 2×r. The first terminal4A is a first terminal4on one side (the uppermost side inFIG.3) in the second direction D2among the plurality of first terminals4. The first terminal4B is a first terminal4on the other side (the lowest side inFIG.3) in the second direction D2among the plurality of first terminals4. The center line CA4is a straight line passing through the center A4of the first terminal4A and the center A4of the first terminal4B. r is the average value of the radius r1of the first terminal4A and the radius r2of the first terminal4B when the radius of the first terminal4A is set as r1and the radius of the first terminal4B is set as r2.

In the IC chip100, as shown inFIG.4, in plan view from the thickness direction D3of the substrate10, the shortest distance H40between the first terminal4A closest to the third side113and the first terminal4B closest to the fourth side114among the plurality of first terminals4is longer than three-quarters of the shortest distance H12between the third side113and the fourth side114. In addition, in the IC chip100, in plan view from the thickness direction D3of the substrate10, the shortest distance H43between the first terminal4A closest to the third side113among the plurality of first terminals4and the third side113is shorter than the shortest distance H41between the first terminal4A closest to the third side113and the first terminal4adjacent to the first terminal4A closest to the third side113. In addition, in the IC chip100, the shortest distance H44between the first terminal4B closest to the fourth side114among the plurality of first terminals4and the fourth side114is shorter than the shortest distance H42between the first terminal4B closest to the fourth side114and the first terminal4adjacent to the first terminal4B closest to the fourth side114.

As shown inFIG.1, the plurality of second terminals5are located between the plurality of first terminals4and the first switch unit1in plan view from the thickness direction D3of the substrate10. In the second direction D2, the plurality of second terminals5are arranged in a line. The expression that “the plurality of second terminals5are arranged in a line in the second direction D2” means that, as shown inFIG.3, in plan view from the thickness direction D3of the substrate10, at least a part of each second terminal5other than a second terminal5A and a second terminal5B is located between two straight lines SL5where a distance from a center line CA5to one of the straight lines SL5in the first direction D1is 2×r. The second terminal5A is a second terminal5on one side (the uppermost side inFIG.3) in the second direction D2among the plurality of second terminals5. The second terminal5B is a second terminal5on the other side (the lowest side inFIG.3) in the second direction D2among the plurality of second terminals5. The center line CA5is a straight line passing through the center A5of the second terminal5A and the center A5of the second terminal5B. r is the average value of the radius r1of the second terminal5A and the radius r2of the second terminal5B when the radius of the second terminal5A is set as r1and the radius of the second terminal5B is set as r2.

In the IC chip100, as shown inFIG.4, in plan view from the thickness direction D3of the substrate10, the shortest distance H50between the second terminal5A closest to the third side113and the second terminal5B closest to the fourth side114among the plurality of second terminals5is longer than three-quarters of the shortest distance H12between the third side113and the fourth side114. In addition, in the IC chip100, in plan view from the thickness direction D3of the substrate10, the shortest distance H53between the second terminal5A closest to the third side113among the plurality of second terminals5and the third side113is shorter than the shortest distance H51between the second terminal5A closest to the third side113and the second terminal5adjacent to the second terminal5A closest to the third side113. In addition, in the IC chip100, the shortest distance H54between the second terminal5B closest to the fourth side114among the plurality of second terminals5and the fourth side114is shorter than the shortest distance H52between the second terminal5B closest to the fourth side114and the second terminal5adjacent to the second terminal5B closest to the fourth side114.

As shown inFIG.1, the plurality of third terminals6are disposed between the first switch unit1and the second switch unit2in the first direction D1in plan view from the thickness direction D3of the substrate10. The plurality of third terminals6are arranged in a line in the second direction D2. The expression that “the plurality of third terminals6are arranged in a line in the second direction D2” means that, as shown inFIG.3, in plan view from the thickness direction D3of the substrate10, at least a part of each third terminal6other than a third terminal6A and a third terminal6B is located between two straight lines SL6where a distance from a center line CA6to one of the straight lines SL6in the first direction D1is 2×r. The third terminal6A is a third terminal6on one side (the uppermost side inFIG.3) in the second direction D2among the plurality of third terminals6. The third terminal6B is a third terminal6on the other side (the lowest side inFIG.3) in the second direction D2among the plurality of third terminals6. The center line CA6is a straight line passing through the center A6of the third terminal6A and the center A6of the third terminal6B. r is the average value of the radius r1of the third terminal6A and the radius r2of the third terminal6B when the radius of the third terminal6A is set as r1and the radius of the third terminal6B is set as r2.

In the IC chip100, as shown inFIG.4, in plan view from the thickness direction D3of the substrate10, the shortest distance H60between the third terminal6A closest to the third side113and the third terminal6B closest to the fourth side114among the plurality of third terminals6is longer than three-quarters of the shortest distance H12between the third side113and the fourth side114. In addition, in the IC chip100, in plan view from the thickness direction D3of the substrate10, the shortest distance H63between the third terminal6A closest to the third side113among the plurality of third terminals6and the third side113is shorter than the shortest distance H61between the third terminal6A closest to the third side113and the third terminal6adjacent to the third terminal6A closest to the third side113. In addition, in the IC chip100, the shortest distance H64between the third terminal6B closest to the fourth side114among the plurality of third terminals6and the fourth side114is shorter than the shortest distance H62between the third terminal6B closest to the fourth side114and the third terminal6adjacent to the third terminal6B closest to the fourth side114.

In the IC chip100, as shown inFIG.1, in plan view from the thickness direction D3of the substrate10, the plurality of first terminals4are located between the plurality of second terminals5and the plurality of third terminals6in the first direction D1.

The IC chip100is mounted on the mounting board9, for example, by bonding a plurality of external terminals to the mounting board9.

(2.4) Structure of Radio Frequency Module

As shown inFIGS.5to8, the radio frequency module200includes the IC chip100(also referred to as a first IC chip100below) and the mounting board9. The first IC chip100includes the first switch unit1, the second switch unit2, and the control unit3. In addition, the radio frequency module200includes the third switch unit7, the plurality (for example, eight) of duplexers204, the power amplifier202, the output matching circuit203(seeFIG.9), a second IC chip150, the input matching circuit207(seeFIG.9), the controller210, the low pass filter209(seeFIG.9), the plurality (for example, eight) of matching circuits208(seeFIG.9), and the plurality of external connection terminals T0. The second IC chip150includes the fourth switch unit8and the low-noise amplifier206. In addition, as shown inFIG.8, the radio frequency module200includes a resin layer120(also referred to as a first resin layer120below), a metal electrode layer130, and a second resin layer140. InFIGS.5and7, the first resin layer120and the metal electrode layer130are not shown. In addition, inFIG.6, the second resin layer140is not shown.

In plan view from a thickness direction D0(seeFIG.8) of the mounting board9, an outer edge of the mounting board9has a quadrangular shape. As shown inFIG.8, the mounting board9has a first main surface91and a second main surface92that face each other in the thickness direction D0of the mounting board9. Here, the term “facing” means facing geometrically rather than physically. Further, the mounting board9has an outer peripheral surface93. The outer peripheral surface93of the mounting board9includes, for example, four side surfaces that connect the outer edge of the first main surface91and the outer edge of the second main surface92of the mounting board9, and does not include the first main surface91or the second main surface92. That is, the mounting board9is a multilayer board including a plurality of dielectric layers and a plurality of conductive layers. The plurality of dielectric layers and the plurality of conductive layers are laminated in the thickness direction D0of the mounting board9. The plurality of conductive layers are formed in a predetermined pattern determined for each layer. Each of the plurality of conductive layers includes one or a plurality of conductor portions in a plane perpendicular to the thickness direction D0of the mounting board9. A material of each conductive layer is, for example, copper. The plurality of conductive layers include a ground layer. In the radio frequency module200, the plurality of external ground terminals T5are electrically connected to the ground layer through a via-conductor and the like of the mounting board9. The mounting board9is, for example, a low temperature co-fired ceramics (LTCC) substrate. The mounting board is not limited to a printed wiring board, and may be, for example, a printed wiring board, a high temperature co-fired ceramics (HTCC) substrate, or a resin multilayer board.

Further, the mounting board9is not limited to the LTCC substrate, and may be, for example, a wiring structural body. The wiring structural body is, for example, a multilayer structural body. The multilayer structural body includes at least one insulating layer and at least one conductive layer. The insulating layer is formed in a predetermined pattern. In a case where a plurality of insulating layers are provided, the plurality of insulating layers are formed in a predetermined pattern determined for each layer. The conductive layer is formed in a predetermined pattern different from the predetermined pattern of the insulating layer. In a case where a plurality of conductive layers are provided, the plurality of conductive layers are formed in a predetermined pattern determined for each layer. The conductive layer may include one or a plurality of rewiring portions. In the wiring structural body, a first surface of two surfaces facing each other in the thickness direction of the multilayer structural body is the first main surface91of the mounting board9, and a second surface is the second main surface92of the mounting board9. The wiring structural body may be, for example, an interposer. The interposer may be an interposer using a silicon substrate or may be a substrate constituted by multiple layers.

The first main surface91and the second main surface92of the mounting board9are separated in the thickness direction D0of the mounting board9, and intersect with the thickness direction D0of the mounting board9. The first main surface91of the mounting board9is, for example, perpendicular to the thickness direction D0of the mounting board9, and may include, for example, a side surface or the like of a conductor portion as a surface that is not perpendicular to the thickness direction D0. In addition, for example, the second main surface92of the mounting board9is perpendicular to the thickness direction D0of the mounting board9, but may include, for example, a side surface or the like of the conductor portion, as a surface that is not perpendicular to the thickness direction D0. Further, the first main surface91and the second main surface92of the mounting board9may be formed with fine unevenness, a recess portion, or a projection portion. For example, when a recess portion is formed on the first main surface91of the mounting board9, the inner surface of the recess portion is included in the first main surface91.

In the radio frequency module200, a plurality of first electronic components are mounted at the first main surface91of the mounting board9. The expression that “the first electronic component is mounted at the first main surface91of the mounting board9” includes a case where the first electronic component is disposed (mechanically connected to) at the first main surface91of the mounting board9and a case where the first electronic component is electrically connected to (an appropriate conductor portion of) the mounting board9. The plurality of first electronic components include the plurality (for example, eight) of duplexers204, the power amplifier202, the third switch unit7, and the controller210. The transmission filter241and the reception filter242(seeFIG.9) in each of the plurality of duplexers204are acoustic wave filters. The acoustic wave filter is, for example, a surface acoustic wave filter that uses surface acoustic waves. The power amplifier202is a power amplification IC chip. The power amplification IC chip is, for example, a GaAs IC chip in a case where an amplification transistor is a heterojunction bipolar transistor (HBT). In addition, the power amplification IC chip is, for example, a Si-based IC chip, for example, in a case where the amplification transistor is a bipolar transistor or a field effect transistor (FET). In addition, the plurality of first electronic components include a plurality of circuit elements (a plurality of inductors and a plurality of capacitors) of each of the plurality of matching circuits208. In addition, the plurality of first electronic components include a plurality of circuit elements (a plurality of inductors and a plurality of capacitors) of the output matching circuit203. In addition, the plurality of first electronic components include a plurality of circuit elements (a plurality of inductors and a plurality of capacitors) of the input matching circuit207. InFIG.5, an area E208in which a plurality of circuit elements of each matching circuit208are disposed on the first main surface91of the mounting board9is shown by a one-dot chain line. Some circuit elements among the plurality of circuit elements of each matching circuit208may be built in the mounting board9. In addition, inFIG.5, an area E203in which a plurality of circuit elements of the output matching circuit203are disposed on the first main surface91of the mounting board9is shown by a one-dot chain line. Some circuit elements among the plurality of circuit elements of the output matching circuit203may be built in the mounting board9. In addition, inFIG.5, an area E207in which a plurality of circuit elements of the input matching circuit207are disposed on the first main surface91of the mounting board9is shown by a one-dot chain line. Some circuit elements among the plurality of circuit elements of the input matching circuit207may be built in the mounting board9. An outer edge of each of the plurality of first electronic components has, for example, a quadrangular shape in plan view from the thickness direction D0of the mounting board9. The circuit elements of the low pass filter209are built in the mounting board9, but the present disclosure is not limited thereto. The plurality of first electronic components may include the circuit elements of the low pass filter209.

In the radio frequency module200, a plurality of second electronic components are mounted at the second main surface92of the mounting board9. The plurality of second electronic components include the first IC chip100and the second IC chip150. The phrase that “the second electronic component is mounted at the second main surface92of the mounting board9” includes a case where the second electronic component is disposed (mechanically connected to) on the second main surface92of the mounting board9and a case where the second electronic component is electrically connected to (an appropriate conductor portion of) the mounting board9. An outer edge of each of the plurality of second electronic components has, for example, a quadrangular shape in plan view from the thickness direction D0of the mounting board9. Since the second IC chip150including the low-noise amplifier206is mounted at the second main surface92of the mounting board9, the low-noise amplifier206is disposed on the second main surface92of the mounting board9.

The plurality of external connection terminals T0(seeFIGS.6and8) are disposed on the second main surface92of the mounting board9. The phrase that “the external connection terminal T0is disposed on the second main surface92of the mounting board9” includes that the external connection terminal T0is mechanically connected to the second main surface92of the mounting board9and the external connection terminal T0is electrically connected to the (appropriate conductor portion of) mounting board9.

As shown inFIG.9, the plurality of external connection terminals T0include the antenna terminal T1, the two signal input terminals T2, the four external control terminals T3, the signal output terminal T4, and the plurality of external ground terminals T5(seeFIG.8). The plurality of external ground terminals T5are electrically connected to a ground layer of the mounting board9. The ground layer is a circuit ground of the radio frequency module200, and the plurality of first electronic components of the radio frequency module200include electronic components that are electrically connected to the ground layer. In addition, the plurality of second electronic components of the radio frequency module200include electronic components that are electrically connected to the ground layer. In the radio frequency module200, each of the plurality of ground terminals (the plurality of ground terminals41, the plurality of ground terminals51, and the plurality of ground terminals61shown inFIG.1) of the IC chip100is connected to at least one external ground terminal T5among the external ground terminals T5of the radio frequency module200.

Materials of the plurality of external connection terminals T0are, for example, metal (for example, copper, copper alloy, or the like). The plurality of external connection terminals T0are not constituent elements of the mounting board9, but may be constituent elements of the mounting board9. Each of the plurality of external connection terminals T0is a columnar-shaped electrode (for example, a cylindrical-shaped electrode).

As shown inFIG.8, the first resin layer120is disposed on the first main surface91of the mounting board9. The first resin layer120contains a resin (for example, an epoxy resin). The first resin layer120may contain a filler in addition to a resin. The first resin layer120has electrical insulating properties.

The first resin layer120covers at least a part of each of the plurality of first electronic components disposed on the first main surface91of the mounting board9. The first resin layer120covers an outer peripheral surface2043of each of the duplexers204but does not cover a main surface2041on a side opposite from the mounting board9. The outer peripheral surface2043of each of the duplexers204does not include the main surface2041on the side opposite from the mounting board9or a main surface on the mounting board9side.

The metal electrode layer130covers the main surface2041of the plurality of duplexers204on the side opposite from the mounting board9, a main surface121of the first resin layer120on a side opposite from the mounting board9, an outer peripheral surface123of the first resin layer120, the outer peripheral surface93of the mounting board9, and an outer peripheral surface143of the second resin layer140. The metal electrode layer130is in contact with at least a part of an outer peripheral surface of the ground layer of the mounting board9. As a result, it is possible to set a potential of the metal electrode layer130to be the same as a potential of the ground layer. The metal electrode layer130has a multilayer structure in which a plurality of metal layers are laminated, but the present disclosure is not limited thereto, and the metal electrode layer130may be formed of one metal layer. The metal layer contains one type or a plurality of types of metals. In a case where the metal electrode layer130has a multilayer structure in which a plurality of metal layers are laminated, the metal electrode layer130includes, for example, a first metal layer (for example, a first stainless steel layer), a second metal layer (for example, a Cu layer) on the first metal layer, and a third metal layer (for example, a second stainless steel layer) on the second metal layer. A material of each of the first stainless steel layer and the second stainless steel layer is an alloy including Fe, Ni, and Cr. In addition, the metal electrode layer130is, for example, a Cu layer when it is formed of one metal layer.

In the radio frequency module200, the metal electrode layer130is in contact with the entire area of the main surface2041of each of the plurality of duplexers204.

The second resin layer140covers the first IC chip100, the second IC chip150, and an outer peripheral surface of each of the plurality of external connection terminals T0. The second resin layer140contains resin (for example, epoxy resin). The second resin layer140may contain a filler in addition to the resin. A material of the second resin layer140may be the same material as the material of the first resin layer120or may be a different material. The second resin layer140covers the main surface1002of the first IC chip100on a side opposite from the mounting board9and the outer peripheral surface1003of the first IC chip100, but the present disclosure is not limited thereto. The second resin layer140does not need to cover the main surface1002of the first IC chip100on the side opposite from the mounting board9. The second resin layer140covers the main surface of the second IC chip150on a side opposite from the mounting board9and the outer peripheral surface of the second IC chip150, but the present disclosure is not limited thereto. The second resin layer140does not need to cover the main surface of the second IC chip150on the side opposite from the mounting board9. In addition, the second resin layer140does not cover end surfaces T01of the plurality of external connection terminals T0on a side opposite from the mounting board9. For example, a main surface141of the second resin layer140on a side opposite from the mounting board9is flush with the end surface T01of each external connection terminal T0.

In the radio frequency module200, as shown inFIG.6, in plan view from the thickness direction D0of the mounting board9, the shortest distance H26between the low-noise amplifier206and the second switch unit2is longer than the shortest distance H16between the low-noise amplifier206and the first switch unit1.

In the radio frequency module200, as shown inFIG.7, in plan view from the thickness direction D0of the mounting board9, the shortest distance H22between the power amplifier202and the second switch unit2is shorter than the shortest distance H21between the power amplifier202and the first switch unit1.

(2.5) Structure of Communication Device

As described above, the communication device300includes the radio frequency module200and the signal processing circuit301. The plurality of electronic components that configure the signal processing circuit301may be mounted on, for example, the above-described circuit board, or may be mounted on a circuit board (second circuit board) different from the circuit board (first circuit board) on which the radio frequency module200is mounted.

As shown inFIGS.1and2, the IC chip100according to Embodiment 1 includes the substrate10, the first switch unit1, the second switch unit2, the control unit3, the plurality of first terminals4, and the plurality of second terminals5. The first switch unit1is formed at the substrate10. The first switch unit1includes the first common terminal11connected to the antenna terminal T1and the plurality of first selection terminals12that are connectable to the first common terminal11. The second switch unit2is formed at the substrate10. The second switch unit2includes the second common terminal21connected to the transmission path Ru1and the plurality of second selection terminals22that are connectable to the second common terminal21. The control unit3is formed at the substrate10. The control unit3is connected to at least one of the first switch unit1and the second switch unit2. In plan view from a thickness direction D3of the substrate10, the plurality of first terminals4are located between the first switch unit1and the second switch unit2in the first direction D1and are arranged in a line in the second direction D2intersecting with the first direction D1. For example, the second direction D2is a direction perpendicular to the first direction D1. In plan view from the thickness direction D3of the substrate10, the plurality of second terminals5are located between the plurality of first terminals4and the first switch unit1and are arranged in a line in the second direction D2. The plurality of first terminals4are connected to the control unit3. The plurality of first terminals4include at least one control terminal43among the plurality of control terminals43. The plurality of second terminals5include the ground terminal51.

With the IC chip100according to Embodiment 1, it is possible to improve the isolation between the first switch unit1and the second switch unit2different from each other. More specifically, with the IC chip100according to Embodiment 1, the plurality of first terminals4connected to the control unit3are arranged in a line in the second direction D2, the plurality of second terminals5located between the plurality of first terminals4and the first switch unit1are arranged in a line in the second direction D2, the plurality of first terminals4include at least one control terminal43, and the plurality of second terminals5include the ground terminal51. As shown inFIG.9, since the second switch unit2is connected to the transmission path Ru1and is connected to the power amplifier202, the transmission signal from the power amplifier202is inputted. Since the transmission signal inputted to the second switch unit2is a signal before passing through the transmission filter241, in the second switch unit2, a transmission signal having power higher than a transmission signal after passing through the transmission filter241passes through the circuit in the second switch unit2. In this case, in a case where the first switch unit1and the second switch unit2are formed to be integrated in the IC chip100as in Embodiment 1, the transmission signal from the second switch unit2is likely to leak to the first switch unit1. However, by disposing the control unit3between the first switch unit1and the second switch unit2and providing a plurality of terminal lines between the first switch unit1and the second switch unit2in the control unit3, it is possible to improve the isolation between the first switch unit1and the second switch unit2.

In addition, in the IC chip100according to Embodiment 1, the plurality of first terminals4include all of the plurality of control terminals43and further include a second ground terminal (ground terminal41) separate from the first ground terminal51that is the ground terminal51. As a result, in the IC chip100according to Embodiment 1, it is possible to further improve the isolation between the first switch unit1and the second switch unit2different from each other.

In addition, the IC chip100according to Embodiment 1 further includes the plurality of third terminals6. The plurality of third terminals6are disposed between the first switch unit1and the second switch unit2in the first direction D1in plan view from the thickness direction D3of the substrate10. The plurality of third terminals6are arranged in a line in the second direction D2. The plurality of third terminals6include the ground terminal61. As a result, the IC chip100according to Embodiment 1 can further improve the isolation between the first switch unit1and the second switch unit2different from each other.

In addition, in the IC chip100according to Embodiment 1, the outer edge110of the IC chip100includes the first side111and the second side112that face each other in the first direction D1, and the third side113and the fourth side114that face each other in the second direction D2. In plan view from the thickness direction D3of the substrate10, the shortest distance H40between the first terminal4closest to the third side113and the first terminal4closest to the fourth side114among the plurality of first terminals4is longer than three-quarters of the shortest distance H12between the third side113and the fourth side114. As a result, the IC chip100according to Embodiment 1 can further improve the isolation between the first switch unit1and the second switch unit2.

In addition, in the IC chip100according to Embodiment 1, in plan view from the thickness direction D3of the substrate10, the shortest distance H43between the first terminal4(4A) closest to the third side113among the plurality of first terminals4and the third side113is shorter than the shortest distance H41between the first terminal4(4A) closest to the third side113and the first terminal4adjacent to the first terminal4(4A) closest to the third side113. The shortest distance H44between the first terminal4(4B) closest to the fourth side114among the plurality of first terminals4and the fourth side114is shorter than the shortest distance H42between the first terminal4(4B) closest to the fourth side114and the first terminal4adjacent to the first terminal4(4B) closest to the fourth side114. As a result, the IC chip100according to Embodiment 1 can further improve the isolation between the first switch unit1and the second switch unit2.

(3.2) Radio Frequency Module

The radio frequency module200according to Embodiment 1 includes the mounting board9and the IC chip100. As a result, the radio frequency module200according to Embodiment 1 can improve the isolation between the first switch unit1and the second switch unit2different from each other.

In addition, in the radio frequency module200according to Embodiment 1, the plurality of duplexers204, each of which is connected to the plurality of first selection terminals12of the first switch unit1and includes the transmission filter241and the reception filter242, are further included, and the transmission filters241of the plurality of duplexers204are connected to the plurality of second selection terminals22of the second switch unit2. As a result, the radio frequency module200according to Embodiment 1 can suppress the leakage of a transmission signal passing through the transmission filter241to the reception filter242by bypassing the first switch unit1, and can suppress the deterioration in both transmission characteristics and reception characteristics.

In addition, the radio frequency module200according to Embodiment 1 further includes the plurality of external connection terminals T0and the power amplifier202connected to the transmission path Ru1. The mounting board9has the first main surface91and the second main surface92that face each other. The power amplifier202is disposed on the first main surface91of the mounting board9. The plurality of external connection terminals T0and the IC chip100are disposed on the second main surface92of the mounting board9. In plan view from the thickness direction D0of the mounting board9, the shortest distance H22between the power amplifier202and the second switch unit2is shorter than the shortest distance H21between the power amplifier202and the first switch unit1. As a result, the radio frequency module200according to Embodiment 1 can further shorten the signal path (a part of the transmission path Ru1) between the power amplifier202and the second switch unit2.

In addition, the radio frequency module200according to Embodiment 1 further includes the low-noise amplifier206. The low-noise amplifier206is disposed on the second main surface92of the mounting board9. The low-noise amplifier206is connectable to at least one first selection terminals12among the plurality of first selection terminals12. In plan view from the thickness direction D0of the mounting board9, the shortest distance H26between the low-noise amplifier206and the second switch unit2is longer than the shortest distance H16between the low-noise amplifier206and the first switch unit1. As a result, the radio frequency module200according to Embodiment 1 can improve the isolation between the low-noise amplifier206and the second switch unit2.

(3.3) Communication Device

The communication device300according to Embodiment 1 includes the radio frequency module200and the signal processing circuit301. As a result, the communication device300according to Embodiment 1 can improve the isolation between the first switch unit1and the second switch unit2different from each other.

(4) Modification Examples of Embodiment 1

In an IC chip100according to Modification Example1, as shown inFIG.10, the plurality of first terminals4further include a second ground terminal (ground terminal41) that is separate from the first ground terminal51that is the ground terminal51, and the plurality of second terminals5further include a control terminal43that is not included in the plurality of first terminals4among the plurality of control terminals43. InFIG.10, dot hatching is applied to the plurality of control terminals43, and cross hatching is applied to the plurality of ground terminals (the plurality of ground terminals41, the plurality of ground terminals51, and the plurality of ground terminals61). However, the dot hatching and the cross hatching do not represent the cross section and are applied only to make the relationship between the plurality of control terminals43and the plurality of ground terminals easier to understand. Other configurations of the IC chip100according to Modification Example 1 are the same as those of the IC chip100(seeFIG.1) according to Embodiment 1, and it is possible to improve the isolation between the first switch unit1and the second switch unit2.

As shown inFIG.11, an IC chip100according to Modification Example 2 differs from the IC chip100according to Embodiment 1 in that the IC chip100according to Modification Example 2 does not include the plurality of third terminals6in the IC chip100according to Embodiment 1 (seeFIG.1). InFIG.11, dot hatching is applied to the plurality of control terminals43, and cross hatching is applied to the plurality of ground terminals (the plurality of ground terminals41and the plurality of ground terminals51). However, the dot hatching and the cross hatching do not represent the cross section and are applied only to make the positional relationship between the plurality of control terminals43and the plurality of ground terminals easier to understand. Other configurations of the IC chip100according to Modification Example 2 are the same as those of the IC chip100according to Embodiment 1. The IC chip100according to Modification Example 2 can improve the isolation between the first switch unit1and the second switch unit2, as in the IC chip100according to Embodiment 1.

As shown inFIG.12, an IC chip100according to Modification Example 3 differs from the IC chip100according to Embodiment 1 in that the IC chip100according to Modification Example 3 does not include the plurality of third terminals6, and the plurality of second terminals5are located between the plurality of first terminals4and the second switch unit2in the IC chip100according to Embodiment 1 (seeFIG.1). InFIG.12, dot hatching is applied to the plurality of control terminals43, and cross hatching is applied to the plurality of ground terminals (the plurality of ground terminals41and the plurality of ground terminals51). However, the dot hatching and the cross hatching do not represent the cross section and are applied only to make the positional relationship between the plurality of control terminals43and the plurality of ground terminals easier to understand. Other configurations of the IC chip100according to Modification Example 3 are the same as those of the IC chip100according to Embodiment 1. The IC chip100according to Modification Example 3 can improve the isolation between the first switch unit1and the second switch unit2, as in the IC chip100according to Embodiment 1.

As shown inFIG.13, an IC chip100according to Embodiment 2 differs from the IC chip100according to Embodiment 1 in that the IC chip100according to Embodiment 2 includes a second switch unit2acorresponding to the third switch unit7in the radio frequency module200(seeFIG.9) according to Embodiment 1 instead of the second switch unit2in the IC chip100(seeFIG.1) according to Embodiment 1. The second switch unit2aincludes a second common terminal21a(corresponding to the third common terminal71inFIG.9) and a plurality (for example, two) of second selection terminals22a(corresponding to the plurality of third selection terminals72inFIG.9) that are connectable to the second common terminal21a.InFIG.13, dot hatching is applied to the plurality of control terminals43, and cross hatching is applied to the plurality of ground terminals (the plurality of ground terminals41, the plurality of ground terminals51, and the plurality of ground terminals61). However, the dot hatching and the cross hatching do not represent the cross section and are applied only to make the positional relationship between the plurality of control terminals43and the plurality of ground terminals easier to understand. In the IC chip100according to Embodiment 2, the second common terminal21aof the second switch unit2ais a terminal that is connected to the transmission path Ru1and is connected to the input terminal221of the power amplifier202included in the transmission circuit201(seeFIG.9). In addition, the plurality of second selection terminals22aof the second switch unit2ainclude a plurality (two) of terminals to which transmission signals different from each other are inputted. The plurality of terminals to which the transmission signals different from each other are inputted in the plurality of second selection terminals22aare connected to the plurality of signal input terminals T2in the radio frequency module200(seeFIG.9).

In the IC chip100according to Embodiment 2, the plurality of first terminals4connected to the control unit3are arranged in a line in the second direction D2, the plurality of second terminals5located between the plurality of first terminals4and the first switch unit1are arranged in a line in the second direction D2, the plurality of first terminals4include at least one control terminal43, and the plurality of second terminals5include the ground terminal51. Thus, it is possible to improve the isolation between the first switch unit1and the second switch unit2a.

Modification Examples

Embodiments 1 and 2 and the like described above are merely one of various embodiments of the present disclosure. Various modifications of Embodiments 1 and 2 and the like described above can be made according to the design or the like as long as the possible benefit of the present disclosure can be achieved.

For example, in the IC chip100according to Embodiment 1, the control unit3is not limited to the configuration in which the control unit3controls both the first switch unit1and the second switch unit2in accordance with the control signal, and may have a configuration in which the control unit3controls at least one of the first switch unit1and the second switch unit2in accordance with the control signal.

In addition, the IC chip100according to Embodiment 1 may further include the third switch unit7. In this case, the third switch unit7only needs to be located on an opposite side of the first switch unit1side in the first direction D1as viewed from the plurality of first terminals4and the plurality of second terminals5.

For example, in the radio frequency module200, the IC chip100is disposed at the mounting board9such that the first main surface101among the first main surface101and the second main surface102of the substrate10is located on the mounting board9side. However, the present disclosure is not limited thereto. The IC chip100may be disposed at the mounting board9such that the second main surface102among the first main surface101and the second main surface102of the substrate10is located on the mounting board9side.

In addition, each of the plurality of transmission filters241and the plurality of reception filters242is not limited to being a surface acoustic wave filter and may also be a bulk acoustic wave filter. In addition, each of the plurality of transmission filters241and the plurality of reception filters242may be, for example, an acoustic wave filter using a boundary acoustic wave, a plate wave, or the like.

In addition, in the radio frequency module200, the controller210is disposed on the first main surface91of the mounting board9, but the present disclosure is not limited thereto. The controller210may be disposed on the second main surface92of the mounting board9.

In addition, in the radio frequency module200, the low-noise amplifier206is disposed on the second main surface92of the mounting board9, but the present disclosure is not limited thereto. The low-noise amplifier206may be disposed on the first main surface91of the mounting board9.

Each of the plurality of external connection terminals T0is not limited to the case of being a columnar-shaped electrode, and may be, for example, a ball-shaped bump. A material of the ball-shaped bump that configures each of the plurality of external connection terminals T0is, for example, gold, copper, solder, and the like.

Further, the radio frequency module200has a configuration in which a plurality of second electronic components are not mounted on the second main surface92of the mounting board9, but are mounted on the first main surface91of the mounting board9, and may have a configuration in which the second resin layer140is not provided.

The circuit configuration of the radio frequency module200is not limited to the example inFIG.9described above. In addition, the radio frequency module200may include a radio frequency front-end circuit that is compatible with multi input multi output (MIMO) or evolved-universal terrestrial radio access new radio dual connectivity (ENDC).

Aspects

The following aspects are disclosed in the present specification.

An IC chip (100) according to a first aspect includes a substrate (10), a first switch unit (1), a second switch unit (2;2a), a control unit (3), a plurality of first terminals (4), and a plurality of second terminals (5). The first switch unit (1) is formed at the substrate (10). The first switch unit (1) includes a first common terminal (11) connected to the antenna terminal (T1) and a plurality of first selection terminals (12) that are connectable to the first common terminal (11). The second switch unit (2;2a) is formed at the substrate (10). The second switch unit (2;2a) includes a second common terminal (21;21a) connected to a transmission path (Ru1) and a plurality of second selection terminals (22;22a) that are connectable to the second common terminal (21;21a). The control unit (3) is formed at the substrate (10). The control unit (3) is connected to at least one of the first switch unit (1) and the second switch unit (2;2a). In plan view from a thickness direction (D3) of the substrate (10), a plurality of first terminals (4) are located between the first switch unit (1) and the second switch unit (2;2a) in a first direction (D1), and are arranged in a line in a second direction (D2) intersecting with the first direction (D1). In plan view from the thickness direction (D3) of the substrate (10), a plurality of second terminals (5) are located between the plurality of first terminals (4), and the first switch unit (1) or the second switch unit (2;2a), and are arranged in a line in the second direction (D2). The plurality of first terminals (4) include at least one control terminal (43) among a plurality of control terminals (43) connected to the control unit (3). The plurality of second terminals (5) include a ground terminal (51).

With the IC chip (100) according to the first aspect, it is possible to improve the isolation between the first switch unit (1) and the second switch unit (2;2a) different from each other.

In an IC chip (100) according to a second aspect, in the first aspect, the plurality of first terminals (4) include all of the plurality of control terminals (43).

In an IC chip (100) according to a third aspect, in the second aspect, the plurality of first terminals (4) further include a second ground terminal (ground terminal41) that is separate from a first ground terminal (51) that is the ground terminal (51).

With the IC chip (100) according to the third aspect, it is possible to improve the isolation between the first switch unit (1) and the second switch unit (2;2a) different from each other.

In an IC chip (100) according to a fourth aspect, in the first aspect, the plurality of first terminals (4) further include a second ground terminal (ground terminal41) that is separate from a first ground terminal (51) that is the ground terminal (51). The plurality of second terminals (5) further include a control terminal (43) that is not included in the plurality of first terminals (4) among the plurality of control terminals (43).

An IC chip (100) according to a fifth aspect further in any one of the first to fourth aspects includes a plurality of third terminals (6). In plan view from the thickness direction (D3) of the substrate (10), the plurality of third terminals (6) are disposed between the first switch unit (1) and the second switch unit (2;2a) in the first direction (D1). The plurality of third terminals (6) are arranged in a line in the second direction (D2). The plurality of third terminals (6) include a ground terminal (61).

With the IC chip (100) according to the fifth aspect, it is possible to further improve the isolation between the first switch unit (1) and the second switch unit (2;2a) different from each other.

In an IC chip (100) according to a sixth aspect, in the fifth aspect, the plurality of first terminals (4) are located between the plurality of second terminals (5) and the plurality of third terminals (6) in the first direction (D1).

In an IC chip (100) according to a seventh aspect, in any one of the first to sixth aspects, an outer edge (110) of the IC chip (100) includes a first side (111) and a second side (112) that face each other in the first direction (D1), and a third side (113) and a fourth side (114) that face each other in the second direction (D2). In plan view from the thickness direction (D3) of the substrate (10), a shortest distance (H40) between a first terminal (4A) closest to the third side (113) and a first terminal (4B) closest to the fourth side (114) among the plurality of first terminals (4) is longer than three-quarters of a shortest distance (H12) between the third side (113) and the fourth side (114).

With the IC chip (100) according to the seventh aspect, it is possible to further improve the isolation between the first switch unit (1) and the second switch unit (2;2a).

In an IC chip (100) according to an eighth aspect, in any one of the first to sixth aspects, an outer edge (110) of the IC chip (100) includes a first side (111) and a second side (112) that face each other in the first direction (D1), and a third side (113) and a fourth side (114) that face each other in the second direction (D2). In plan view from the thickness direction (D3) of the substrate (10), a shortest distance (H43) between a first terminal (4A) closest to the third side (113) among the plurality of first terminals (4) and the third side (113) is shorter than a shortest distance (H41) between the first terminal (4A) closest to the third side (113) and a first terminal (4) adjacent to the first terminal (4A) closest to the third side (113). A shortest distance (H44) between a first terminal (4B) closest to the fourth side (114) among the plurality of first terminals (4) and the fourth side (114) is shorter than a shortest distance (H42) between the first terminal (4B) closest to the fourth side (114) and a first terminal (4) adjacent to the first terminal (4B) closest to the fourth side (114).

With the IC chip (100) according to the eighth aspect, it is possible to further improve the isolation between the first switch unit (1) and the second switch unit (2;2a).

In an IC chip (100) according to a ninth aspect, in any one of the first to eighth aspects, the second common terminal (21) of the second switch unit (2) is a terminal that is connected to the transmission path (Ru1) and is connected to an output terminal (222) of a power amplifier (202). The plurality of second selection terminals (22) of the second switch unit (2) include terminals to which a plurality of transmission filters (241) having pass bands different from each other are connected.

In an IC chip (100) according to a tenth aspect, in any one of the first to eighth aspects, the second common terminal (21a) of the second switch unit (2a) is a terminal that is connected to the transmission path (Ru1) and is connected to an input terminal (221) of a power amplifier (202). The plurality of second selection terminals (22a) of the second switch unit (2a) include a plurality of terminals to which transmission signals different from each other are inputted.

A radio frequency module (200) according to an eleventh aspect includes the IC chip (100) according to any one of the first to tenth aspects, and a mounting board (9) on which the IC chip (100) is disposed.

With the radio frequency module (200) according to the eleventh aspect, it is possible to improve the isolation between the first switch unit (1) and the second switch unit (2;2a) different from each other.

A radio frequency module (200) according to a twelfth aspect in the eleventh aspect further includes a plurality of external connection terminals (T0), and a power amplifier (202) connected to the transmission path (Ru1). The mounting board (9) has a first main surface (91) and a second main surface (92) that face each other. The power amplifier (202) is disposed on the first main surface (91) of the mounting board (9). The plurality of external connection terminals (T0) and the IC chip (100) are disposed on the second main surface (92) of the mounting board (9). In plan view from the thickness direction (D0) of the mounting board (9), a shortest distance (H22) between the power amplifier (202) and the second switch unit (2;2a) is shorter than a shortest distance (H21) between the power amplifier (202) and the first switch unit (1).

With the radio frequency module (200) according to the twelfth aspect, it is possible to further shorten the transmission path (Ru1) between the power amplifier (202) and the second switch unit (2;2a).

A radio frequency module (200) according to a thirteenth aspect in the twelfth aspect further includes a low-noise amplifier (206). The low-noise amplifier (206) is disposed on the second main surface (92) of the mounting board (9). The low-noise amplifier (206) is connectable to at least one first selection terminal (12) among the plurality of first selection terminals (12). In plan view from the thickness direction (D0) of the mounting board (9), a shortest distance (H16) between the low-noise amplifier (206) and the first switch unit (1) is shorter than a shortest distance (H26) between the low-noise amplifier (206) and the second switch unit (2;2a).

With the radio frequency module (200) according to the thirteenth aspect, it is possible to improve the isolation between the low-noise amplifier (206) and the second switch unit (2;2a).

A radio frequency module (200) according to a fourteenth aspect in any one of the eleventh to thirteenth aspects further includes a plurality of transmission filters (241) that are connected to a plurality of second selection terminals (22) of the second switch unit (2).

A communication device (300) according to a fifteenth aspect includes the radio frequency module (200) according to any one of the eleventh to fourteenth aspects, and a signal processing circuit (301). The signal processing circuit (301) is connected to the radio frequency module (200).