High resolution sigma delta modulator for capacitance sensor terminal displacement measurement

A single plate capacitance sensor includes a sensor capacitor and a reference capacitor that share common plate. A capacitance-to-digital sigma delta modulator provides separate sensor excitation and reference excitation signals to the sensor capacitor and the reference capacitor to provide high resolution detection. Programmable ratio-metric excitation voltages and adaptive excitation voltage sources can be used to enhance modulator performance.

BACKGROUND

The present invention relates capacitance type sensors and to the conversion of the variable capacitance of the sensor to a digital value.

Capacitance sensors have found a wide range of applications. Capacitance sensors are used for sensing pressure, acceleration, flow, humidity, proximity, angle, rotation, as well as human interface sensing applications. For example, capacitance sensors are used for differential pressure measurement as well as absolute pressure measurement.

The variable capacitance produced by a capacitance sensor must be converted to an electrical signal that can be processed to produce a measurement output. In many cases, it is desirable to produce the electrical signal as a digital value that represents the variable capacitance, so that further signal processing can be done with digital circuitry rather than analog circuitry.

Capacitance-to-digital (C/D) converters using sigma delta modulators have been used in conjunction with capacitance sensors. One example is the use of sigma delta modulators for C/D conversion is in conjunction with capacitance pressure sensors.

SUMMARY

In one embodiment, a sensor circuit includes a terminal displacement capacitance sensor and a capacitance-to-digital (C/D) sigma delta modulator. The capacitance sensor includes a sensor capacitor and a reference capacitor. A first terminal is connected to the sensor capacitor, second terminal is connected to the reference capacitor, and a common terminal is connected to both the sensor capacitor and the reference capacitor. The sigma delta modulator includes an integrator, a quantizer, and an excitation signal generator. The integrator has an input connected to the common terminal of the capacitance sensor and has an output connected to the quantizer. The output of the quantizer is a pulse code modulated output signal that is a function of the capacitance of the sensor capacitor and capacitance of the reference capacitor. The excitation signal generator provides a sensor excitation signal to the first terminal and a reference excitation signal to the second terminal of the capacitance sensor.

DETAILED DESCRIPTION

Introduction

FIGS. 1A and 1Bshow two alternative capacitance-to-digital (C/D) excitation schemes for a single plate terminal displacement capacitance sensor. A terminal displacement capacitance sensor is one in which the spacing between the plates forming the sensor change in relation to the sensed parameter. Thus the capacitance of the sensor changes in relation to the sensed parameter.FIG. 1Ashows sensor circuit10, which includes capacitance sensor12and capacitance-to-digital (C/D) sigma delta modulator14. Sensor12includes sensor capacitor CS and reference capacitor CR, which share a common plate. Sensor12has three terminals, common plate terminal CP, sensor plate terminal SP, and reference plate terminal RP. Terminals SP and RP are connected to inputs of modulator14. Common plate terminal CP receives a single two-phase excitation signal Vexcthat excites both sensor capacitor CS and reference capacitor CR. Modulator14produces a pulse code modulated output signal PCM and excitation signal Vexc.

Sensor circuit10produces a digitized signal (output signal PCM) from which a capacitance of sensor capacitor CS can be determined. When high resolution pressure measurement is required, the digitized signal produced by modulator14has been found to be deficient in several characteristics.

First, the digitized signal is nonlinear with pressure. This complicates signal compensation and makes resolution performance dependent on applied pressure.

Second, the digitized signal results in low utilization of analog-to-digital (A/D) converter range. This contributes to poor resolution due to the low sensitivity of the output of modulator14with respect to the pressure input to sensor12. The sensitivity is lowest near the zero pressure input condition to sensor12.

Third, the excitation signal has a low signal level. This contributes to poor resolution because the driven sensor signals are relatively low compared to the intrinsic thermal noise within sensor circuit10.

Some applications of sensor12, such as dual absolute differential pressure sensing, require high resolution signal detection. In those applications, circuit10is not optimal.

Sensor circuit10will be described in more detail with reference toFIGS. 2, 3A, 3B, 4A, and 4B.

FIG. 1Bshows sensor circuit20, which includes single plate terminal displacement capacitance sensor22and C/D sigma delta modulator24. Capacitance sensor22is similar to capacitance sensor12. Sensor22includes sensor capacitor CS and reference capacitor CR, with common plate terminal CP connected to the input of C/D circuit24. Sensor plate terminal SP receives sensor excitation signal Vexc_sen, and reference plate terminal RP receives reference excitation signal Vexc_ref. Modulator24produces a pulse code modulated output signal PCM, as well as sensor excitation signal Vexc_senand reference excitation signal Vexc_ref.

Sensor circuit20offers higher resolution than sensor circuit10. It addresses the deficiencies in the digitized signal discussed above with respect to sensor circuit10.

Five different embodiments of the sensor circuit20illustrated generally inFIG. 1Bwill be discussed.FIGS. 5-7Bdescribe sensor circuit20A, which uses a first order two-phase sigma delta modulator.FIGS. 8-11describe sensor circuit20B, which uses a second order two-phase sigma delta modulator.FIGS. 12-15describe sensor circuit20C, which uses a first order two-phase modulator that includes a programmable ratio-metric excitation voltage generator.FIGS. 16-17Cillustrate sensor circuit20D, which uses a second order two-phase sigma delta modulator with a programmable ratio-metric excitation voltage generator.FIGS. 18-19Bshow sensor circuit20E utilizing a second order two-phase sigma delta modulator that includes an adaptive excitation voltage control and a programmable ratio-metric excitation voltage generator.

Capacitance sensors12and22are a single plate terminal displacement sensors that can be used, for example, to provide an absolute pressure (AP) measurement. Sensors12,22include sensor capacitor CS (with a capacitance CSENSOR) and reference capacitor CR (with capacitance CREF). Sensor capacitor CS and reference capacitor CR share common plate terminal CP. Sensor capacitance CSENSORcan be modeled as

In which CSAis active sensing capacitance, CPis parasitic capacitance, {circumflex over (P)}Ais normalized absolute pressure with dynamic range of [0, 1], and a is normalized elastic constant.

Example normalized capacitance parameters of sensors12,22with α=0.6 is listed in Table 1, and with the capacitances normalized to C0, where C0is active sensing capacitance at {circumflex over (P)}A=0, and C1is active sensing capacitance at {circumflex over (P)}A=1.

In integrator30, switches38and44are closed when output y of latch54is “1” or high, and switches40and42are closed when outputyof latch54is “1” or high. Switches48and50are closed when φ1is high, and switch46is closed when φ2is high. Latch54of quantizer32receives φ1as clock input. Latch54is triggered at the front edge of φ1.

Excitation signal generator34produces excitation signal Vexcby alternately applying voltages VP and VN to common plate terminal CP of sensor12. Switch56is closed (supplying VP to terminal CP) when either yφ1oryφ2is high. Switch58is closed (supplying VN to terminal CP) when eitheryφ1or yφ2is high.

In this configuration, common plate terminal CP of sensing capacitor CS and reference capacitor CR is connected to the excitation signal Vexcgenerated by excitation signal generator34of modulator14. The corresponding input terminals connected to sensor capacitor CS and reference capacitor CR are denoted as SP and RP. The charge balancing process in integrator30is controlled by output y of the quantizer.

Denote N0as the number of integrator operations associated with y=0, N1as the number of integrator operations associated with y=1, and N=N0+N1, the charge balancing equation can be established as
N0·ΔVEX·CS−N1·ΔVEX·CREF≈0  (Eq. 2)

Where ΔVEXis the magnitude of the sensor excitation signal,
ΔVEX=VP−VN(Eq. 3)

VP and VN are DC voltage sources. The charge balancing equation (Eq. 2) leads to the following measurement relation shown in Eq. 4, where η is the output of C/D sigma delta modulator14. η represents the transfer function (TF) of sensor circuit10. It is a function of capacitors CS and CR and provides an approximate estimate of the state of sensor12. It is defined as η=(N1−N0)/N, in terms of the PCM signal. All expressions of η relating to sensor capacitors are approximations. Equation 4 is a good approximation if N is large.

(1) Transfer Function Linearity

By substitute expression (Eq. 1) into (Eq. 4), it leads to following transfer function (TF):

It is a non-linear function of normalized pressure {circumflex over (P)}A.

(2) Transfer Function Dynamic Range

For the case α=0.6 and ĈP=0, by choosing the normalized reference capacitor as ĈREF=1.581, the transfer function dynamic range is maximized and centralized. The dynamic range is [−0.2252, 0.2252]. The corresponding TF plot is shown as a thinner line inFIG. 3A. For the case of α=0.6 and ĈP=0.5, by choosing the normalized reference capacitor as ĈREF=2.121, the transfer function dynamic range is maximized and centralized. The dynamic range is [−0.1716, 0.1716]. The corresponding TF plot is shown as a thicker line inFIG. 3A. When the normalized parasitic capacitance ĈPequals or exceeds 0.5, the transfer function dynamic range becomes much narrower.

(3) Transfer Function Sensitivity

Transfer function sensitivity is defined as
κ≡∂η/∂{circumflex over (P)}A(Eq. 6)

FIG. 3Bshows the sensitivity plots for sensor circuit10with α=0.6. The thinner line is for ĈP=0. The sensitivity variation range is [0.286, 0.708]. The thicker line is for ĈP=0.5, the sensitivity variation range is [0.195, 0.602]. When normalized parasitic capacitance ĈPequals or exceeds 0.5, the transfer function sensitivity becomes much lower.

(4) Excitation Level

In sensor circuit10, the excitation magnitude is designed as 0.5*VDDA. The spike voltage waveforms at input pin SP and RP are shown asFIGS. 4A and 4B, in which where VDDA is analog supply voltage, VSSA=0 volts is analog ground, VMID=VDDA/2 is reference voltage. In order to improve signal to noise ratio (S/N), a typical approach is to increase sensor excitation magnitude. Unfortunately, for sensor circuit10, the room for increasing excitation magnitude is limited. This is because if the spike voltages at terminals SP and RP exceed beyond the supply voltage rails (VDDA and VSSA), the spike voltages may introduce leakage effect and, as a result, the measurement accuracy will be degraded.

FIG. 5shows the basic configuration of the proposed sensor circuit.FIG. 5shows sensor circuit20A, which is a basic configuration of sensor circuit20shown inFIG. 1B. Sensor circuit20A includes capacitance sensor22A and first order C/D sigma delta modulator24A.

In integrator60, switches70and72are closed when φ1is high, and switch68is closed when φ2is high. φ1provides the clock input to latch76of quantizer62.

Excitation signal generator64provides excitation signal Vexc_sen to the SP terminal of capacitance sensor22A and provides excitation signal Vexc_ref to terminal RP of sensor22A. Switch78is closed whenyand φ2are both high. Switch80is closed when either y or φ1is high. Switch82is closed when φ1is high, and switch84is closed when φ2is high.

In this circuit configuration, the sensor capacitor CS and reference capacitor CR of capacitance sensor22A are formed as a capacitive bridge. Common plate terminal CP of the bridge is connected to the input of integrator60. Modulator24A generates two excitation signals, Vexc_sen and Vexc_ref. Signal Vexc_sen serves for sensor capacitor CS excitation. Signal Vexc_ref serves for reference capacitor CR excitation.

Based on switch control logic as marked inFIG. 5, the excitation voltages can be expressed as:

In which
ΔVEX=VP−VN(Eq. 9)

As a result, the net charge transferring from the sensor bridge to the input node of the integrator is

Denote N0as the number of integrator operations of y=0, N1as the number of integrator operations of y=1, the charge balancing equation is established as
N0·ΔVEX·(CSENSOR−CREF)−N1·VEX·CREF≈0  (Eq. 11)

Notice that N=N0+N1, it can be simplified as
N0·ΔVEX·CSENSOR−N·VEX·CREF≈0  (Eq. 12)

This equation leads to following measurement relation.

We see that it is a linear function of CREF/CSENSOR. Therefore, the proposed sensor circuit20A is suitable for the measuring the capacitance ratio of reference capacitor CR to sensor capacitor CS.

Comparison of Sensor Circuit20A with Sensor Circuit10

(1) Transfer Function Linearity

In this case, the expression of normalized sensor capacitance (Eq. 1 rewritten) is understood as

The measurement relation (Eq. 13) leads to following transfer function
η≈(1−2·ĈREF)+2·ĈREF·α·{circumflex over (P)}A(Eq. 15)

It is linear function in normalized pressure {circumflex over (P)}A.

(2) Transfer Function Dynamic Range

By choosing normalized reference capacitor as
ĈREF5/7=0.714  (Eq. 16)

The transfer function of the proposed circuit with centralized dynamic range is
η=− 3/7+ 6/7·{circumflex over (P)}A(Eq. 17)

FIG. 6Ashows TF plots. TF dynamic range of sensor circuit20A is [−0.4286, 0.4286], and TF dynamic range of sensor circuit10is [−0.2252, 0.2252]. The width of TF dynamic range is increased by a factor of 1.9.

(3) Transfer Function Sensitivity

FIG. 6Bshows the sensitivity plots. For sensor circuit20A, the sensitivity is a constant of 0.8571. For sensor circuit10, the sensitivity variation range is [0.2858, 0.7079]. Comparing with sensor circuit10at zero AP, the sensitivity of sensor circuit20A is increased by a factor of 3.0.

(4) Maximum Excitation Magnitude

In general, it is desirable to avoid voltage spikes on the bond pads (CP in particular) that go outside the VSSA, VDDA rails. The consequence of excess voltage spikes is charge leakage which upsets the charge balance equations, e.g. Eq. 12. This places a practical limit on the magnitude of the excitation voltage.

In sensor circuit20A, the largest spike voltage at input pin CP is happened during the operation of y=0, at the same time the normalized pressure reaches to {circumflex over (P)}A=1.0. The corresponding spike voltage relative to VMID is estimated as ( 5/9)*ΔVEX. This means that if excitation magnitude is raised to 0.9*VDDA, the spike voltage approaches to 0.5*VDDA relative to VMID. Therefore, the maximum magnitude of excitation voltage in the proposed circuit can reach to 0.9*VDDA. Comparing with the sensor circuit10(0.5*VDDA), the magnitude of excitation signal is increased by a factor of 1.8.

(1) Transfer Function Linearity

In this case, the expression of sensor capacitance is understood as expression (Eq. 1). The measurement relation (Eq. 13) leads to following transfer function.

Due to non-zero parasitic capacitance, the transfer function is no longer a linear function of normalized pressure {circumflex over (P)}A.

The dynamic range of the transfer function is centralized, and the corresponding transfer function can be written as

FIG. 7Ashows the transfer function plots. The TF linearity of sensor circuit20A is greatly improved in comparison with sensor circuit10.

(2) Transfer Function Dynamic Range

FIG. 7Ashows that sensor circuit has20A TF dynamic range of [−0.3333, 0.3333]. Comparing with TF dynamic range of circuit10[−0.1716, 0.1716], the width of TF dynamic range is increased by a factor of 1.94.

(3) Transfer Function Sensitivity

FIG. 7Bshows the sensitivity plots. In the sensitivity plot of sensor circuit20A, the sensitivity is no longer a constant, and the variation range is [0.5343, 0.8313]. In the sensitivity plot of sensor circuit10, the sensitivity range is [0.2858, 0.7079]. Comparing with sensor circuit10at zero absolute pressure, the sensitivity of sensor circuit20A is increased by a factor of 1.87.

(4) Excitation Voltage Level

In sensor circuit20A, the largest spike voltage at input terminal CP is happened during the operation of y=0, at the same time the normalized pressure is reaches to {circumflex over (P)}A=1.0. The corresponding spike voltage relate to VMID is estimated as (½)*ΔVEX. This means that if the excitation magnitude is raised to 1.0*VDDA, the spike voltage at input terminal CP approaches to 0.5*VDDA relative to VMID. Therefore, the maximum magnitude of excitation signal can reach to 1.0*VDDA. Comparing with sensor circuit10(0.5*VDDA), the magnitude of excitation signal is increased by a factor of 2.0.

FIG. 8shows sensor circuit20B, which features second order sigma-delta modulator for measuring capacitance ratio CREF/CSENSOR. Sensor circuit20B has the same transfer function (TF) as sensor circuit20A.FIGS. 6 and 7are applicable to sensor circuit20B as well as sensor circuit20A.

In sensor circuit20B, some improvements have been made based on sensor circuit20A shown asFIG. 5. First, a second stage integrator is added in order to suppress quantization noise. Second, two auto-zero capacitors, CZ0and CZ1, are arranged in the CDS circuit (correlated double sampling circuit) in the first stage integrator, where CZ0serves as auto-zero capacitor for integration of y=0, CZ1serves as auto-zero capacitor in integration of y=1. The CDS circuit in the first stage integrator not only provides the suppression of amplifier offset, 1/f noise, it also provides better compensation for amplifier finite gain error.

Sensor circuit20B includes capacitance sensor22B and C/D sigma delta modulator24B. Sensor22B is similar to capacitance sensors22and22A shown inFIGS. 1B and 5, respectively. It includes sensor capacitor CS, reference sensor CR, and terminals CP, SP, and RP.

Modulator24B includes first stage integrator90, second stage integrator92, quantizer94, and excitation signal generator96. First stage integrator90receives input from terminal CP of sensor22B. First stage integrator90includes op amp100, switches102,104,106,108,110and111, auto zero capacitors CZ0and CZ1, and feedback capacitor CF1.

The input of second stage integrator92is connected to the output of op amp100of first stage integrator90. Second stage integrator92includes op amp112, switches114,116,118,120,122,124, and126, capacitor CA and CB, auto zero capacitor CZ2, and feedback capacitor CF2.

The output of second stage integrator92is connected to the input of quantizer94, which includes comparator128and latch130. The φ1clock signal is a clock input to latch130. The outputs of latch130are y andy. The y output also is used as the pulse code modulated PCM output of modulator24B.

Excitation signal generator96is similar to excitation signal generator64shown inFIG. 5. Excitation signal generator96alternately applies voltages VP and VN to the SP and RP inputs of capacitance sensor22B. Excitation signal generator96includes switches132,134,136, and138.

Modulator24B uses clock signals φ1and φ2to provide two-phase operation. Waveforms of clock signals φ1and φ2are not shown inFIG. 8, but are the same as those shown inFIG. 5.

Simulations have been made in transistor level on the circuit shown asFIG. 8. In the simulations, the supply voltage is VDDA=2.4V, Reference voltage VMID=1.2V. Excitation voltage sources selected are VP=2.4V, VN=0V. The sensor device parameters are assumed as Ĉ0=ĈREF=1, ĈP=0.5, and α=0.6. The simulation results for normalized absolute pressure {circumflex over (P)}A=0, 5/9, 1.0 are reported here. The corresponding values of normalized active sensing capacitance, normalized parasitic capacitance and normalized reference capacitance are as listed in Table 2. The expected transfer function (TF) value is η computed using Eq. 20.

TABLE 2Input capacitance in the simulationsExpected TF{circumflex over (P)}AĈSAĈPĈREFvalue01.0000.5001.000−⅓5/91.5000.5001.00001.02.5000.5001.000+⅓

Waveforms at the output of first stage integrator are shown asFIGS. 9A-9C. Notice that, the integrators90,92shown inFIG. 8are of inverted type. It means that the transfer of positive (negative) charge from the sensor bridge (capacitance sensor22B) to the input node of integrator90will induce a negative (positive) voltage step at the output of integrator90.

The waveform is shown inFIG. 9A, where four integrator operations of y=0 (down-step) are balanced by two integrator operations of y=1 (up-step). In other words, from the waveform over a period of six integrations, four are positive and two are negative; then the cycle repeats. N0=2, N1=4, and N=6. This means η=(N0−N1)/N=(2−4)/6=−⅓.

The waveform is shown inFIG. 9B, where two integrator operations of y=0 (down-step) are balanced by two integrator operations of y=1 (up-step). This means η=0.

The waveform is shown inFIG. 9C, where two integrator operations of y=0 (down-step) are balanced by four integrator operations of y=1 (up-step). This means η=⅓.

Spike Waveform Examination

FIGS. 10A-10Cshow the simulated spike waveforms at the input pin CP. The spike voltages relative to VMID are recorded in Table 3. In the simulation the magnitude of the excitation voltages are set as ΔVexc_sen=ΔVexc_ref=VDDA. The simulation shows that the largest spike voltage at input pin CP is happened during the operation of y=0, if the normalized pressure is reaches to {circumflex over (P)}A=1.0. The largest spike voltage is 1.05V below half of the VDDA/2=1.2V. The simulation results show that it is feasible for the proposed circuit to raise the excitation level to the same level as VDDA.

In this disclosure, new circuit architectures shown inFIGS. 1B, 5, and 8are described. Modulators24A and24B in these new circuit architecture interface with the common plate CP of the capacitive bridge formed by sensor capacitor CS and reference capacitor CR. The magnitude of the excitation signal can be raised to the same level as VDDA and, as a result, the signal to noise ratio is improved. Furthermore, comparing with sensor circuit10, the modulators24A,24B in sensor circuits20A,20B are designed for measuring the ratio of reference capacitor to sensor capacitor. As a result, sensor circuits20A,20B provide improved transfer function linearity, wider transfer function dynamic range, and higher measurement sensitivity. All these features are crucial for high resolution measurement.

InFIGS. 5 and 8, sigma delta modulators for measuring the capacitance ratio CREF/CSENSORare described. The measurement relation of the modulator circuit is

In which ĈREFis the normalized reference capacitor, and ĈSENSORis the normalized sensing capacitor. The sensing capacitance includes two parts, active sensing capacitance CSAand parallel parasitic capacitance CP.
ĈSENSOR=ĈSA+ĈP(Eq. 22)

The normalized active sensing capacitance can be modeled as:

Where {circumflex over (P)}Ais the normalized absolute pressure with dynamic range as [0, 1], α is the normalization elastic constant.

Sensor circuits20A and20B have advantages in improved transfer (TF) function linearity, wider transfer function (TF) dynamic range, higher measurement sensitivity and higher excitation voltage. All these features are crucial for in high resolution measurement.

Still further improvements are desirable for absolute pressure measurement applications. For the circuits described inFIGS. 5 and 8, it was assumed that the value of the reference capacitor Cref could be specified to a value that causes the transfer function to be centralized. When it is not possible to specify the value of Cref in this manner the enhancements shown inFIGS. 12 and 16can be used to achieve linearization and centralization.

In the case of non-zero parallel parasitic capacitance, the transfer function is a non-linear function of normalized pressure {circumflex over (P)}A. This can be seen by substituting expression (Eq. 23) into measurement relation (Eq. 21); the modulator transfer function becomes

The transfer function (Eq. 24) shows that it is a linear function of normalized pressure {circumflex over (P)}Aonly when ĈP=0. If the normalized parasitic capacitance is larger, the transfer function linearity becomes poorer. As a result the measurement sensitivity is lower.

(2) TF Dynamic Range Centralization

In sensor circuits20A and20B, the centralization of the TF dynamic range is achieved based on the assumption that the reference capacitor is selectable. In practical application, the reference capacitor is built in to the capacitance sensor device, and it is not selectable. As a result, the TF dynamic range may not be centralized.

Table 4 is a listing of capacitance parameters for sensor circuit10with α=0.6. The normalized reference capacitor listed is ĈREF=1.4286. By substituting ĈREF=1.4286 into (Eq. 24), the TF dynamic range is no longer centralized. Shown as plot inFIG. 11, the TF plot is shifted to lower side dramatically in comparison with the centralized TF plot. The centralized TF is obtained by selecting the appropriate value for ĈREF(1.01981 for this example). The corresponding TF dynamic range with ĈREF=1.4286 becomes [−0.8605, 0.0588] in comparison with centralized dynamic range [−0.3281, 0.3281] for ĈREF=1.01981.

Non-centralized TF has some problems. First, if −1.0<η<−0.8 or 1.0>η>0.8, the quantization noise becomes significantly higher. As a result, the measurement resolution is degraded. Second, if η value exceeds the range of [−1, +1], the modulator circuit becomes non-stable thus preventing accurate measurement of pressure.

Therefore, further improvements to sensor circuits20A and20B are desired. A further improved sensor circuit must have the following functions:

(a) Parallel parasitic capacitance compensation for the sensing capacitance of the capacitance sensor.

(b) Transfer function dynamic range centralization based on a non-selectable built-in reference capacitor.

In the following, sensor circuits20C,20D, and20E based on circuits20A and20B ofFIGS. 5 and 8are described. In addition to modulator transfer function optimization, additional methods for the improvement of S/N ratio (signal-to-noise ratio) are also described.

Measurement Relation for Improved Modulator

The measurement relation of an improved modulator is specified as

Comparing with measurement relation (Eq. 21), ĈSENSORin the denominator of the second term is replaced by ĈSA. This is required due to the function of parallel parasitic capacitance compensation. Furthermore, CREFin the numerator of second term is replaced by CC, which is also required due to TF dynamic range centralization. Here the characteristic capacitance CCis defined as

The centralized η dynamic range is

Same as other normalized capacitance parameters, we define the normalized characteristic capacitance as

For a capacitance sensor device with α=0.6, the value of normalized characteristic capacitance is ĈC=5.

Sensor circuit20C includes capacitance sensor22C and C/D sigma delta modulator24C. Modulator24C is generally similar to modulator24A of sensor circuit20A shown inFIG. 5, except that modulator24C features programmable ratio-metric voltages used to produce excitation signals Vexc_sen and Vexc_ref.

Modulator24C includes integrator150, quantizer152, and excitation signal generator154. Integrator150includes op amp156, switches158,160, and162, auto-zero capacitor CZ, and feedback capacitor CF1. The output of op amp156is provided to the input of quantizer152, which includes comparator164and latch166.

Excitation signal generator154makes use of four different voltage levels to provide excitation to capacitance sensor22C. Those four voltage levels are VP1, VP2, VP3, and VSSA. Excitation signal generator includes switches168,170,172,174, and176. Switch168connects VP1to terminal SP whenyand φ2are both high. Switch170connects VSSA to terminal SP when either y or φ1is high. Thus, excitation signal Vexc_sen has two possible levels: VP1and VSSA.

Excitation Vexc_ref has three possible levels. Voltage VP2is connected to terminal RP by switch172whenyand φ1are both high. Voltage VP3is connected to terminal RP by switch174when y and φ1are both high. Voltage VSSA is connected to terminal RP by switch176when clock signal φ2is high.

Ratio-Metric Excitation Voltage Sources

Modulator24C also includes programmable ratio-metric excitation voltage generator180shown inFIG. 13. Voltage generator180is connected to excitation signal generator154, and provides voltage levels VP1, VP2, VP3, and VSSA. Voltage generator180includes voltage divider182connected between supply rails VDDP and VSSA. Voltage divider182includes current source183, potentiometers184and186. Op amps188,190, and192and capacitors194,196, and198derive voltages VP1, VP2, and VP3from voltage divider182. VDDP is a voltage rail that in practice is at a higher voltage than VP1, and can be even higher than VDDA, if necessary. The inclusion of current source183is optional. Other options include a direct connection of the divider to VDDA or other source voltage, or replacement of current source183with another resistor.

The basic circuit implementation for measurement relation (Eq. 25) is shown asFIG. 12. The voltage sources for generating the sensor capacitor excitation signal Vexc_sen and the reference capacitor excitation signal Vexc_ref are separated. Here, VP1is the voltage source for generating Vexc_sen, VP2and VP3are the voltage sources for generating Vexc_ref. Voltage VP1is the highest, VP2is the medium and VP3is the lowest.

FIG. 13is a simplified circuit for ratio-metric excitation voltage generator. In which VDDP is the voltage supply of the resistor chain (voltage divider182). The voltage levels of VP1, VP2and VP3can be controlled by the injected current from current source183. The ratio-metric relations among VP1, VP2and VP3are specified as

For the capacitance sensor22C (α=0.6) with capacitance parameters as listed in Table 4, the ratio-metric relations are specified as:

Note thatFIG. 13assumes that VP1>VP2>VP3. This may not always be true as it depends on the values of the sensor parameters. For other sensor configurations, the order of voltages inFIG. 13can be re-arranged as needed to implement the circuit.

Charge Balancing Equation and Measurement Relation

Based on switch control logic as marked inFIG. 12, the sensor capacitor excitation signal can be expressed as

The reference capacitor excitation signal can be expressed as

For y=0, the net charge transferring from the common plate of the sensor bridge to the input node of integrator is
ΔQNET(y=0)=VP1·CSENSOR−VP2·CREF(Eq. 35)

For y=1, the net charge transferring from the common plate of the sensor bridge to the input node of integrator is
ΔQNET(y=1)=−VP3·CREF(Eq. 36)

Denote N0as the number of integrator operations of y=0, N1as the number of integrator operations of y=1, and N=N0+N1as the total number of integrator operations, the charge balancing equation can be established as
N0·(VP1·ĈSENSOR−VP2·ĈREF)−N1·VP3·ĈREF≈0.  (Eq. 37)

By substituting the ratio-metric relations of VP2/VP1, VP3/VP1and ĈSENSOR=ĈSA+ĈPinto equation (Eq. 37), the charge balance equation can be simplified as:
N0·VP1·ĈSA−N·VP1·ĈC≈0  (Eq. 38)

Here the approximation made is in the sense that the charge difference between initial integrator status and final initial integrator status is ignored. This is a good approximation when N is large.

The charge balancing equation above leads to the required measurement relation

The measurement relation above is a linear function of the capacitance ratio CC/CSA. It is exactly the same as specified for the improved modulator circuit (Eq. 25).

Transfer Function Features

By substituting the expression of active sensing capacitance (Eq. 23) into measurement relation (Eq. 39), the transfer function of the optimized modulator circuit is derived as
η≈(1−2·ĈC)+2·α·ĈC·{circumflex over (P)}A(Eq. 40)

It is a linear function of normalized pressure {circumflex over (P)}A. In terms of elastic constant α, it can be written as

For the sensor device with normalized elastic constant α=0.6, the TF expression is
η≈− 3/7+ 6/7{circumflex over (P)}A(Eq. 42)

(2) TF Dynamic Range

In terms of elastic constant α, the centralized TF dynamic range is derived as

For the sensor device with normalized elastic constant α=0.6, the TF dynamic range is
η[− 3/7, 3/7]  (Eq. 44)

TF sensitivity κ is defined as first order derivative of η with respect to {circumflex over (P)}A. From (Eq. 41), it can be derived as

For sensor device with normalized elastic constant as α=0.6, the TF sensitivity is
κ= 6/7=0.857143  (Eq. 46)

The TF plot for the example sensor device as in Table 1 is shown inFIG. 14, in which one line is the TF plot for the modulator measuring CC/CSA, while the other line is the transfer function plot for the modulator measuring CREF/CSENSOR. The CC/CSAline is linear with centralized TF dynamic range as [−0.4286, 0.4286], while the CREF/CSENSORline is non-linear with non-centralized TF dynamic range as [−0.8605, 0.0588]. The modulator for measuring CC/CSA(such as modulator24C ofFIG. 12) shows significant improvement both in TF linearization and TF dynamic range centralization.

Sensor Excitation Voltage Level

The maximum excitation voltage is limited by the spike voltage at the input terminal CP. If the spike voltage at input terminal CP inFIG. 12exceeds the rails, the leakage effect at the input terminal may introduce measurement errors. The spike voltage ratio can be estimated as follows:

VSPIKEis the amplitude of the voltage spike that is originating at half of VDDA, so in order to avoid spiking over (or under) the rail VSPIKEmust be less than VDDA/2. For the example sensor with parameter as listed in Table 4, the plots of the spike ratio (Eq. 47) as a function of normalized pressure are shown asFIG. 15. In which, one line is the plot for y=0, and the other line is the plot for y=1. The maximum spike voltage ratio is found as 0.4 located at full scale pressure for the operation of y=0. Therefore, the excitation voltage source VP1can be raised to the same voltage level as analog supply VDDA without causing an input terminal leakage issue. The corresponding ratio-metric excitation voltage sources for the example sensor are:
VP1=VDDA,VP2=⅞VDDA,VP2=½VDDA.(Eq. 48)

Second Order Modulator Circuit for Measuring CC/CSA—Sensor Circuit20D (FIGS. 16-17)

FIG. 16is the schematic of a second order modulator circuit that can serve for the measurement of capacitance ratio CC/CSA. It can also serve for the measurement of capacitance ratio CREF/CSENSOR, if the excitation V-source VSSA is replaced by VN, and VP1, VP2, VP3are replaced by VP. When the modulator circuitFIG. 16is in the operation mode for measuring CC/CSA, the function of parasitic compensation will be active, at the same time, the function of TF dynamic range centralization will be effective. The TF of circuit20D will be the same as the TF of circuit20C inFIG. 12.FIGS. 14 and 15are also applicable to circuit20D.

FIG. 16shows sensor circuit20D, which includes sensor22D and C/D sigma delta modulator24D. Modulator24D is similar to modulator24B shown inFIG. 8, except that it makes use of the ratio-metric excitation voltage generation feature of modulator24C, as illustrated inFIGS. 12 and 13. In particular, modulator24D includes first stage integrator90, second stage integrator92, and quantizer94in conjunction with excitation voltage generator154of modulator24C. Similar elements are designated with similar reference numerals and characters found inFIGS. 8 and 12.

Modulator Simulations with VP1=VDDA

Simulations have been made for the modulator circuit schematic shown asFIG. 16. The simulations were conducted in transistor level. The analog supply voltage is VDDA=2.4V. The ratio-metric voltage sources are VP1=2.4V, VP2=2.1V, VP3=1.2V. The capacitance parameters in the simulations for {circumflex over (P)}A=0 for {circumflex over (P)}A=0.5 and {circumflex over (P)}A=1.0 are listed in Table 5, in which the values in the column “expected η” is obtained from TF expression (Eq. 42).

The waveforms of first stage integrator90are shown asFIGS. 17A-17C, which can be illustrated as follows.

FIG. 17Ais the waveform for {circumflex over (P)}A=0. It shows that five integrator operations of y=0 (down-step) are balanced by two integrator operations of y=1 (up-step). This means η=− 3/7, and it matches with expectation.

FIG. 17Bis the waveform for {circumflex over (P)}A=0.5. It shows that two integrator operations of y=0 (down-step) are balanced by two integrator operations of y=1 (up-step). This means η=0, and it matches with expectation.

FIG. 17Cis the waveform for {circumflex over (P)}A=1.0. It shows that two integrator operations of y=0 (down-step) are balanced by five integrator operations of y=1 (up-step). This means η= 3/7, and it matched with expectation.

Modulator with Adaptive Excitation Voltage Control Sensor Circuit20E (FIGS. 18-19B).

From the plots inFIG. 15we also see that the spike voltage ratio at zero {circumflex over (P)}Ais only 0.096 for y=0, and 0.241 for y=1. Therefore, it is feasible to raise the excitation voltage source VP1to the level of 2*VDDA when {circumflex over (P)}Ameasurement results approaches to zero. The spike voltage VSPIKEwill still be less than VDDA/2 so there will be no pin leakage issues. By doing that the S/N ratio (signal-to-noise ratio) at zero {circumflex over (P)}Awill be significantly improved. This leads to the concept of adaptive excitation.

In the modulator for measuring CC/CSA, the adaptive excitation is achieved by control of the excitation voltage source VP1. For the example sensor device with parameters as listed in Table 5, the adaptive control algorithm can be expressed as
VP1({circumflex over (P)}A)=(2−<{circumflex over (P)}A>)·VDDA(Eq. 49)

In which ({circumflex over (P)}A) represents the measured normalized pressure. When the measured normalized pressure ({circumflex over (P)}A) is approaching to 1.0, the voltage VP1is approaching to VDDA. When the measured normalized pressure ({circumflex over (P)}A) is approaching to 0, voltage VP1is approaching to 2*VDDA. At the same time, when VP1is varying, VP2and VP3will follow, such that their ratio-metric relations (Eq. 29-Eq. 30) keep the same. By implementing the adaptive excitation algorithm as described, the S/N ratio is increased for lower pressure region, and the corresponding measurement resolution is improved.

Modulator24E is similar to modulator24B shown inFIG. 16. It includes first stage integrator90, second stage integrator92, quantizer94, excitation signal generator154, and excitation voltage source generator180(shown inFIG. 13). In addition, modulator24E includes adaptive excitation voltage control200, which varies voltage VP1as a function of the PCM output of quantizer94. Alternatively, adaptive excitation voltage control can vary voltage using automatic gain control. The voltage can be varied by changing the current flowing through voltage divider182. As VP1is varied, voltages VP2and VP3are also varied, because excitation voltage source generator180produces voltages VP2and VP3as fixed ratios of voltage VP1.

Simulations have also been made for modulator circuit20E with adaptive excitation voltage sources. The analog supply is set as VDDA=2.4V. The excitation voltages sources VP1, and VP3are set according to the adaptive control algorithm (Eq. 49) and the ratio-metric relations (Eq. 31 and Eq. 32). The corresponding parameters are listed in Table 6 for normalized pressure {circumflex over (P)}A=0, {circumflex over (P)}A=0.5 and {circumflex over (P)}A=1.0.

The waveform of first stage integrator90of sensor circuit20E for the case of {circumflex over (P)}A=0 is shown asFIG. 19A. The dotted line is waveform with adaptive voltage sources as VP1=4.8V VP2=4.2V, VP3=2.4V. The solid line is the same waveform shown asFIG. 17A. The patterns of the two waveforms remain the same, while the signal of the dotted line is enhanced by a factor of 2. Therefore signal-to-noise ratio is improved by a factor of 2.

The waveform of first stage integrator90of sensor circuit20E for the case of 0.5 is shown asFIG. 19B. The dotted line is waveform with adaptive voltage sources as VP1=3.6V VP2=3.15V, VP3=1.8V. The solid line is the same waveform shown inFIG. 17B. The patterns of the two waveforms are remained the same, while the signal of the dotted line is enhanced by a factor 1.5. Therefore signal-to-noise ratio is improved by a factor of 1.5.

For the case of {circumflex over (P)}A=1.0, the excitation voltage sources are the same as in sensor circuit20E, the waveform remains the same inFIG. 17C.

The modulator circuits24C,24D, and24E can serve for the measurement of capacitance ratio CC/CSA. They can also serve for the measurement of capacitance ratio CREF/CSENSOR. When the modulator is in the mode for the measurement of capacitance ratio CC/CSA, the function of parasitic compensation will be active, at the same time, the function of TF dynamic range centralization will be effective. Modulator circuits24C-24E described in this disclosure feature parallel parasitic capacitance compensation, transfer function linearization, transfer function dynamic range centralization, and modulator operation optimization. These circuits also feature higher excitation level and adaptive excitation level for further resolution improvement at lower absolute pressure.

While the invention has been described with reference to an exemplary embodiment(s), it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof without departing from the scope of the invention. For example, although embodiments were described specifically in the context of pressure measurements, the sensor circuits are applicable to a wide range of other sensing applications, such as acceleration, flow, humidity, proximity, angle, rotation, and biological sensing. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the invention without departing from the essential scope thereof. Therefore, it is intended that the invention not be limited to the particular embodiment(s) disclosed, but that the invention will include all embodiments falling within the scope of the appended claims.