Active pixel sensor computed tomography (CT) detector and method of readout

The present approach relates to implementations of a CT detector integrating CT scintillator packs on a fast, low electronic noise and scalable CMOS active pixel sensor substrate. In one embodiment, a large 3-side buttable CMOS active pixel array with built-in column analog-to-digital conversion (ADC) circuitry (e.g., ASICs) integrated onto the same wafer is used.

TECHNICAL FIELD

The subject matter disclosed herein relates to the fabrication and use of radiation detectors, including X-ray radiation detectors fabricated using pixels arrays having integrated readout electronics.

BACKGROUND

Non-invasive imaging technologies allow images of the internal structures or features of a subject (patient, manufactured good, baggage, package, or passenger) to be obtained non-invasively. In particular, such non-invasive imaging technologies rely on various physical principles, such as the differential transmission of X-rays through the target volume or the reflection of acoustic waves, to acquire data and to construct images or otherwise represent the internal features of the subject.

By way of example, computed tomography (CT) imaging systems are used to generate images in a non-invasive manner by acquiring X-ray transmission data over a range of angular views about a patient and reconstructing the measured data to generate volumetric or cross-sectional views of the patient. Such computed tomography approaches may be used for medical imaging, as well as for certain industrial or security screening applications.

In CT, a portion of the radiation passes through the subject or object and impacts a detector, where representative signals are acquired. To acquire data over a useful angular range, data is acquired nearly continuously by the detector over the course of an examination, in contrast to conventional radiography, where the detector only acquired data at discrete acquisitions or shots. As a result, certain requirements are placed on a CT detector that are not necessary for other detectors where less continuous types of data collection occur. In particular, to facilitate rapid readout, each pixel of the detector typically has its own readout channel, resulting in a massively parallel readout architecture. Such architectures, however, may impose their own corresponding issues, such as noise associated with the distance the analog signals must travel prior to digitization and, in arrangements where the digital conversion circuitry is placed near to the photodiode structures generating the signals, the heat from these circuits may degrade the performance of the detection circuitry.

BRIEF DESCRIPTION

In one implementation, a detector module configured for use in a computed tomography (CT) detector is provided. In accordance with this implementation, the detector module includes an array of pixels formed on a substrate, each pixel comprising an array of sub-pixels. The detector module further includes readout circuitry integrated on one end of the substrate such that three remaining edges of the substrate are configured to abut corresponding edges of other detector modules. The readout circuitry for each column of pixels comprises multiple readout channels for that column, each readout channel configured to sequentially read out multiple pixels within the respective column.

In a further implementation, a detector module configured for use in a computed tomography (CT) detector is provided. In accordance with this implementation, the detector module includes a plurality of columns of pixels formed on a substrate, wherein pixels within each column are grouped into blocks of two or more pixels. The detector module further includes readout circuitry formed integrally on a substrate. The readout circuitry comprises a separate readout channel for each block of pixels in each column such that the number of readout channels for each column corresponds to the number of blocks of pixels in each column.

In an additional embodiment, a method for reading out a computed tomography (CT) detector is provided. In accordance with this method, for each column of pixels within an array of pixels, blocks of pixels within a respective column are read out using a different analog-to-digital (ADC) conversion readout channel for each block. The ADC readout channels for block of pixels is formed on the same substrate as the array of pixels.

DETAILED DESCRIPTION

While the following discussion is generally provided in the context of medical imaging, it should be appreciated that the present techniques are not limited to such medical contexts. Indeed, any examples and explanations provided in such a medical context is only to facilitate explanation by providing instances of real-world implementations and applications. However, the present approaches may also be utilized in other contexts, such as the non-destructive inspection of manufactured parts or goods (i.e., quality control or quality review applications), and/or the non-invasive inspection of packages, boxes, luggage, and so forth (i.e., security or screening applications).

The present approaches relate to the fabrication of a radiation detector for use in a computed tomography (CT) imaging system using multiple tiled detector panels. In particular, the present approach employs a matrix readout of pixel arrays formed on the panels where a set of pixels is multiplexed to a readout channel. This is in contrast to conventional approaches, where each pixel is physically connected to a dedicated readout channel. In one embodiment of the present approach, a three-side buttable CMOS (Complementary Metal Oxide Semiconductor) active pixel array (i.e., the pixel array is configured to abut other pixel arrays on three-sides) with column analog-to-digital conversion (ADC) circuitry integrated onto the same wafer on which the photodiode array is formed is used. As used herein an “active pixel” has an amplifier formed within each pixel circuit, such that an amplified analog signal is read out from each pixel. As noted above, digital conversion may be performed by an integrated ADC associated with each column, or with subsets of each column, of pixels. The proposed architecture allows the X-ray detector to operate at frame rates of greater than the 10 kHz needed to support fast CT applications. This is enabled by the active pixel sensor with global shutter capability implemented on a 3-side buttable CMOS imager architecture as noted above. As discussed herein, also contemplated is a platform concept for the detector that is scalable across the CT product portfolio with different coverage requirements.

In addition, a further benefit of the architecture discussed herein is improved thermal performance. In particular, the proposed 3-side buttable architecture simplifies the thermal issues by moving the heat sources (e.g., ASIC readout circuitry) away from sensitive elements of the detector, such as the photodiodes and scintillator, whose performance may vary in the presence of temperature variation.

With the preceding discussion in mind,FIG. 1illustrates an embodiment of an imaging system10for acquiring and processing image data in accordance with aspects of the present disclosure. In the illustrated embodiment, system10is a Computed Tomography (CT) system designed to acquire X-ray projection data, to reconstruct the projection data into a tomographic image, and to process the image data for display and analysis. The depicted CT imaging system10includes an X-ray source12. As discussed in detail herein, the source12may include one or more X-ray sources, such as an X-ray tube or one or more enclosures containing solid state emission structures. The X-ray source12, in accordance with certain contemplated embodiments, is configured to emit an X-ray beam20from one or more emission spots (e.g., focal spots), which may correspond to X-ray emission regions on a target structure (e.g., an anode structure) impacted by a directed electron beam.

In certain implementations, the source12may be positioned proximate to a filter assembly or beam shaper22that may be used to steer the X-ray beam20, to define the shape and/or extent of a high-intensity region of the X-ray beam20, to control or define the energy profile of the X-ray beam20, and/or to otherwise limit X-ray exposure on those portions of the patient24not within a region of interest. In practice, the filter assembly or beam shaper22may be incorporated within the gantry between the source12and the imaged volume.

The X-ray beam20passes into a region in which the subject (e.g., a patient24) or object of interest (e.g., manufactured component, baggage, package, and so forth) is positioned. The subject attenuates at least a portion of the X-rays20, resulting in attenuated X-rays26that impact a detector array28formed from an number of the detector modules or panels (e.g., a tiled array of such panels or modules) as discussed herein. Each detector module has a plurality of detector elements (e.g., pixels) as discussed below. Each detector element produces an electrical signal that represents the intensity of the X-ray beam incident at the position of the detector element when the beam strikes the detector28. Electrical signals are acquired and processed to generate one or more scan datasets. In implementations discussed herein, the detector28includes integrated readout circuitry and control logic, allowing the output of digitized signals to downstream components. In the depicted example, the detector28is coupled to the system controller30, which commands acquisition of the digital signals generated by the detector28.

A system controller30commands operation of the imaging system10to execute filtration, examination and/or calibration protocols, and to process the acquired data. With respect to the X-ray source12, the system controller30furnishes power, focal spot location, control signals and so forth, for the X-ray examination sequences. In accordance with certain embodiments, the system controller30may control operation of the filter assembly22, the CT gantry (or other structural support to which the X-ray source12and detector28are attached), and/or the translation and/or inclination of the patient support over the course of an examination.

In addition, the system controller30, via a motor controller36, may control operation of a linear positioning subsystem32and/or a rotational subsystem34used to move components of the imaging system10and/or the subject24. The system controller30may include signal processing circuitry and associated memory circuitry. In such embodiments, the memory circuitry may store programs, routines, and/or encoded algorithms executed by the system controller30to operate the imaging system10, including the X-ray source12and/or filter assembly22, and to process the digital measurements acquired by the detector28in accordance with the steps and processes discussed herein. In one embodiment, the system controller30may be implemented as all or part of a processor-based system.

The source12may be controlled by an X-ray controller38contained within the system controller30. The X-ray controller38may be configured to provide power, timing signals, and/or focal size and spot locations to the source12. In addition, in some embodiments the X-ray controller38may be configured to selectively activate the source12such that tubes or emitters at different locations within the system10may be operated in synchrony with one another or independent of one another or to switch the source between different energy profiles during an imaging session.

The system controller30may include a data acquisition system (DAS)40. The DAS40receives data collected by readout electronics of the detector28, such as digital signals from the detector28. The DAS40may then convert and/or process the data for subsequent processing by a processor-based system, such as a computer42. In certain implementations discussed herein, circuitry within the detector28may convert analog signals of the photodetector to digital signals prior to transmission to the data acquisition system40. The computer42may include or communicate with one or more non-transitory memory devices46that can store data processed by the computer42, data to be processed by the computer42, or instructions to be executed by a processor44of the computer42. For example, a processor of the computer42may execute one or more sets of instructions stored on the memory46, which may be a memory of the computer42, a memory of the processor, firmware, or a similar instantiation.

The computer42may also be adapted to control features enabled by the system controller30(i.e., scanning operations and data acquisition), such as in response to commands and scanning parameters provided by an operator via an operator workstation48. The system10may also include a display50coupled to the operator workstation48that allows the operator to view relevant system data, imaging parameters, raw imaging data, reconstructed data, contrast agent density maps produced in accordance with the present disclosure, and so forth. Additionally, the system10may include a printer52coupled to the operator workstation48and configured to print any desired measurement results. The display50and the printer52may also be connected to the computer42directly or via the operator workstation48. Further, the operator workstation48may include or be coupled to a picture archiving and communications system (PACS)54. PACS54may be coupled to a remote system56, radiology department information system (RIS), hospital information system (HIS) or to an internal or external network, so that others at different locations can gain access to the image data.

With the preceding discussion of an overall imaging system10in mind,FIG. 2depicts a detector panel80having an array of pixels that may be used in combination with other such detector panels80to form the overall detector28. By way of example, the depicted panel80may constitute the base tilable, independent sub-unit of a detector assembly. For example, some number of detector panels80may be arranged, such as linearly arranged, into a higher level assembly unit, such as a detector module. Detector modules themselves may then be arranged to form the overall detector28of the CT imager.

In the depicted example, the detector panel80consists of an active pixel array82, which as noted above is indicative of an amplifier circuit being present within the pixel circuitry. In one such example the readout and/or digitization circuitry is formed on the same contiguous wafer as the pixel array, with data transmission occurring along data lines formed on the wafer itself, as opposed to separately connected interconnect structures. In the depicted example, the integrated ASIC86is at one end of the active pixel array82. The depicted arrangement of positioning the readout circuitry86at the periphery of the pixel matrix82(i.e., outside the X-ray field-of-view) keeps the sensitive pixel circuitry and scintillator material90(discussed below) away from the heat generated by the readout circuitry86, thereby improving thermal performance. This may be contrasted with conventional arrangements, in which the scintillator, photodiode array, and ASICs are formed as a vertical stack (such as may be suitable to a massively parallel readout operation where each pixel has a dedicated readout channel), which may subject the sensitive pixel circuitry and scintillator material to the heat generated by the ASICs during operation.

The active pixel sensor array82may be suitably scaled based on the detector configuration. For example, a 150 mm long active pixel sensor array82may be formed from an 8 inch c-Si wafer, i.e., an 8 inch CMOS wafer. Larger panels, such as ˜200 mm arrays82may be formed from larger diameter c-Si wafers.

In addition, a scintillator pack90is pictured inFIG. 2. The scintillator pack90, in operation, is positioned proximate to the active surface of the active pixel sensor array82and, in response to X-ray photons, emits lower energy photons, such as photons in an optical energy range or other energy range suitable for detection by photodetectors. The photodiodes of the active pixel array82then detect the optical (or other non-X-ray) photons emitted by the scintillator pack90to generate the charges read out by the readout electronics86.

In electronic communication with the readout electronics (i.e., ASIC86) is a data output connector88, here depicted as a flexible circuit connector, that may be used to connect the detector module80into a provided connector structure in communication with the data acquisition circuitry and/or controllers. Data92acquired by the detector module80is thus communicated to downstream circuitry via the output connector88

As previously noted, the depicted detector panel80arrangement is a structure that may be three-side buttable. That is, the depicted detector panel80may abut other, comparable detector panels80on every side except the side having the data output connector88. This feature allows detectors to be built with wide coverage (e.g., ˜160 mm).

Turning toFIG. 3, the active matrix architecture is illustrated in greater detail by progressively zooming in on features of the architecture proceeding from left to right in the drawing. Thus, the rightmost level of abstraction illustrates the active pixel array82and integrated readout circuitry86of a detector panel80. In the depicted example, the portion of the active pixel array82corresponding to the pixel electronics is a 32×128 array of pixels96(i.e., 32 pixels wide and 128 pixels long). As will be appreciated, other pixel array dimensions may be employed, with the present example merely being provided for illustration and to provide a real-world example. The remainder of the length of the panel80includes the integrated readout electronics86. As noted above, the pixel array82may be abutted with other pixel arrays82on each side but the side having the readout electronics86.

Progressively moving rightward inFIG. 3, a region of the active pixel array82is shown with the pixels96presented in greater detail. In the depicted example, the pixels96are approximately 1 mm×1 mm. Proceeding rightward in the figure, a single pixel96, approximately 1 mm on each side, is illustrated. In this example, and as discussed in greater detail below, each pixel96in one implementation is comprised of an array of sub-pixels98.

In a typical CT detector, the scintillator is pixelated and the inter-pixel gap is filled with optically reflective material to improve the light output. The image sensor array is designed to match the scintillator pixellation geometry so that perfect overlap of the scintillator pixel and the photo sensor is achieved. The inter pixel gap is of the order of 100 μm in typical CT detectors.

With this in mind, in present implementations, each pixel96comprises an array of sub-pixels98, such as a 10×10 array of sub-pixels98having a 100 μm pitch. This structure differs from what is conventionally seen in a CT detector. In the rightmost aspect ofFIG. 3, a circuitry schematic of a sub-pixel98in accordance with one such implementation is shown. In this example, the photo sensitive element is a photodiode102that generates a photocurrent current proportional to the X-ray photon energy absorbed in the scintillator pixel above it. Each sub-pixel has a built-in amplifier104that improves the signal-to-noise ratio. Unlike a conventional image sensor pixel, there is more than one charge storage element (e.g., capacitors106A and106B) in one implementation. This additional storage and the associated integrated readout electronics enable readout of the pixel96during an X-ray image data acquisition. This in turn enables global shutter operation and ultra-fast frame rate (e.g., >10 kHz) that facilitates certain CT acquisition modes (e.g. ultra-fast kV switching in dual energy imaging). The implementation of the charge storage elements106is also relevant to CT applications which benefit from highly linear signal response. The combination of a pinned photodiode102(which carries negligible capacitance) with a linear metal-insulator-metal (MIM) capacitor is one suitable design option. In particular, using a pinned photodiode as the photodiode102provides benefits in terms of linearity of the pixel response as well as improving the radiation hardness of the pixel96.

With the benefits of fast signal readout, as described above in mind, and turning toFIG. 4, a readout architecture suitable for use with the present active pixel array82is described. Conventional detector designs attempt to provide fast readout by employing massively parallel readout architecture (e.g., dedicated channel per photodiode). In contrast, the presently described approach employs several analog-to-digital conversion (ADC) readout channels per pixel column of the active pixel array82. For instance, with reference to the example ofFIG. 4, in this example sixteen ADCs,110each with approximate width of ˜60 μm are positioned within a column width of 1 mm (denoted as column114). Each ADC110is designed to serve a block112of eight pixels96. With a line time of 10 μs, the depicted configuration enables view rates of 12.5 kHz. Signals from sub-pixels within pixels may be integrated within the pixels for readout at the pixel level, thus avoiding the need to address sub-pixels individually. In other configurations, more ADCs can be provided per pixel to enable higher view rates. Thus, each column114of pixels96is broken into blocks112(here blocks of eight pixels96), with each block being readout by its own ADC110. Thus, in this example, with respect to routing, each ADC119serves approximately eight pixels96(i.e., a block112of pixels), with16data lines per pixel and an ADC layout of 60 μm×3 mm. In terms of readout speed for this example, line time is approximately 10 μs, read time is the number of pixels per block (e.g., eight) multiplied by the line time (e.g., approximately 10 μs), so 80 μs in this example. Views per second, in this example, is 12,500 Hz.

With respect to the present design approach, several benefits are achieved. For example, as noted above, dual energy imaging approaches may switch an X-ray source between two kVps (e.g., between low- and high-energy) during a scan. During a CT acquisition, fast kV switching benefits from an identical integration (i.e., time) window for all pixels96. From the perspective of the design of the image sensor, this equates to a true global shutter operation (i.e., as opposed to continuous sequential readout). An example of one implementation of a global shutter pixel in the context of the present detector panel architecture is shown inFIG. 5.

In this example, it can be seen that capacitor106A is used to store charge generated during a low-energy exposure. Concurrent with the low-energy exposure charge being stored in capacitor106A, capacitor106B, presumably storing charge accumulated during the preceding high-energy exposure, is read out and reset. Conversely, during the following high-energy exposure, capacitor106B is used to store charge generated during the high-energy exposure and capacitor106A, storing charge accumulated during the preceding low-energy exposure, is read out and reset. Thus, the present architecture enables the imager to acquire a new view/image during readout of the previous view.

In addition, a further benefit of the presently contemplated detector architecture is improvement of electronic noise entitlement, i.e., the theoretical limit in terms of noise performance. Various design options may be employed to reduce noise. Examples of techniques that may be employed include, but are not limited to, active reset, in-pixel correlated double-sampling, and so forth.

One example of a low-noise design is as follows: for a front lit diode, a charge per view of approximately 50 pC, a sub-pixel design as described above (e.g., one pixel96=10×10 μm sub-pixels98, and a full well capacity (FWC) per pixel of 3 Me−. With this design in mind, a readout method may be to connect the sub-pixels98in parallel during exposure, to disconnect the sub-pixels98after exposure, and to subsequently readout from the center pixel, thus effectively integrating the sub-pixel signals within the respective pixels to allow readout at the pixel level and avoiding the need to address sub-pixels individually. In such a context, readout noise may consist of kTC (essentially thermal noise on the capacitors106) and analog read noise. kTC may be approximately 2,190 e−(C=30 pF) and analog read noise may be approximately 3,000×0.22=660 e−, yielding a total read noise of 2,290 e−. This estimate is comparable to the noise levels of current state of the art CT detectors.

As noted above, another benefit of the present approach is scalability. Turning toFIG. 6, three examples are depicted demonstrating the scalability of the present approach. A typical CT product portfolio has different tiers of CT systems with varying spatial coverage (e.g., iso center coverage from 40 mm to 160 mm), performance and cost. An important factor for a cost effective detector28is that the design is scalable across such a product portfolio. This translates to a platform technology that can leverage volume and cost.

With the proposed 3-side buttable active matrix architecture one can build systems with a wide/varying coverage, as seen inFIG. 6. For example, in the topmost example, two 80 mm long detector panels80are shown abutted at their ends opposite the readout connector to provide 160 mm coverage at iso center120. Similarly, for a detector having less coverage at isocenter120, shown in the middle example, two 40 mm long detector panels80can be abutted to give 80 mm coverage at iso center120. Where even less coverage is needed, a single detector panel80, such as a 40 mm long detector panel80, can be centered at iso center120to give 40 mm of coverage.

The integration of CT scintillator packs on a fast, low electronic noise and scalable active pixel sensor brings the best of CT and flat-panel x-ray technologies to build a high-performance detector. This is in contrast to the cone beam CT approach which employs a standard x-ray flat panel detector, where the poor detection efficiency of the x-ray scintillator and slow readout speed of the flat-panel result in an inferior detector performance.

Technical effects of the invention includes a matrix readout of the pixel array where a block of pixels is multiplexed to a readout channel. In one embodiment, a large 3-side buttable CMOS active pixel array with built-in column ADCs integrated onto the same wafer is used. In further aspects, multiple ADC readout channels are provided per pixel column to facilitate the multiplexed read out of a detector panels. In one embodiment, each image sensor pixel comprises a sub-pixel array.