Semiconductor substrate and method of fabricating the same

Disclosed are a flat and thin semiconductor substrate, which is formed on a heterogeneous substrate to be easily lifted-off from the heterogeneous substrate, a semiconductor device including the same, and a method of fabricating the same. The semiconductor substrate includes a substrate having a plurality of semispherical protrusions arranged at a predetermined interval on a first plane, and a first semiconductor layer formed on the first plane of the substrate.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is the National Stage entry of International Application PCT/KR2011/005019, filed on Jul. 8, 2011, and claims priority from and the benefit of Japanese Patent Application No. 2011-100321, filed on Apr. 28, 2011, and Korean Patent Application No. 10-2011-0053952, filed on Jun. 3, 2011, which are incorporated herein by reference for all purposes as if fully set forth herein.

BACKGROUND OF THE INVENTION

The present invention relates to a semiconductor substrate, a semiconductor device, and a method of fabricating the same. More particularly, the present invention relates to a process of lifting-off a gallium nitride layer from a sapphire substrate, a semiconductor substrate and a semiconductor device fabricated through the lift-off process, and a method of fabricating the same.

2. Discussion of the Background

Gallium nitride (GaN) based light emitting diodes (LEDs) have been used in a wide range of applications including signals, a backlight unit of a liquid crystal panel, etc.

Since fabrication of a gallium nitride (GaN) substrate is very difficult and requires high manufacturing costs, semiconductor devices such as LEDs or laser diodes are generally fabricated by growing a GaN layer on a heterogeneous substrate such as sapphire. One example of crystal growth of GaN is disclosed in “Polycrystalline GaN for light emitter and field electron emitter applications” (S. Hasegawa, S. Nishida, T. Yamashita, H. Asahi, Thin Solid Films 487 (2005), pp. 260-267). In this document, a GaN crystal is grown on a quartz substrate, a high melting-point metal substrate of W, Mo, Ta and Nb, and a Si substrate through plasma-assisted molecular beam epitaxy.

However, lattice mismatch and different coefficients of thermal expansion between the GaN layer and the substrate cause high dislocation density or increases defects, obstructing improvement of luminous efficiency of an LED. Although mechanical polishing or laser ablation is performed to strip a GaN bulk crystal into a GaN substrate, it is very difficult to obtain a GaN substrate with practical size and good reproducibility. In addition, since a sapphire substrate has lower thermal conductivity than the GaN substrate, the sapphire substrate deteriorates heat dissipation of a semiconductor device. Further, when a thin GaN layer is formed on the sapphire substrate, it is very difficult to lift-off the GaN layer from the sapphire substrate.

SUMMARY

Exemplary embodiments of the invention provide a flat and thin semiconductor substrate, which is formed on a heterogeneous substrate to be easily lifted-off from the heterogeneous substrate, a semiconductor device including the same, and a method of fabricating the same.

In accordance with one exemplary embodiment of the invention, a semiconductor substrate includes a substrate having a plurality of semispherical protrusions arranged at a predetermined interval on a first plane, and a first semiconductor layer formed on the first plane of the substrate.

The ratio of the total surface area of the plurality of semispherical protrusions to the surface area of the first plane may be 1 or more.

The semispherical protrusions may have a bottom surface width of 5 um or less.

In the semiconductor substrate, the substrate may be a sapphire substrate and the first semiconductor layer may be a gallium nitride layer.

In the semiconductor layer, the semiconductor substrate may further include a second semiconductor layer formed on a second plane of the first semiconductor layer opposite the first plane, and cavities formed in a pattern of predetermined shapes at portions of the first semiconductor layer and the second semiconductor layer.

In the semiconductor substrate, the pattern of predetermined shapes may have a width of the predetermined interval, and the cavities may be located at positions on the second plane of the first semiconductor layer corresponding to intervals between the semispherical protrusions.

In the semiconductor substrate, the pattern of predetermined shapes may be composed of a plurality of rectangles each having a long side disposed in a first direction and arranged in a second direction orthogonal to the first direction to form the cavities.

In the semiconductor substrate, the first direction may be a {1-100} direction of the first semiconductor layer or an equivalent direction to the {1-100} direction.

In accordance with another exemplary embodiment of the invention, a semiconductor substrate includes: a substrate having a plurality of curved concavities arranged at a predetermined interval on a first plane of the substrate; and a first semiconductor layer formed on the first plane of the substrate.

In the semiconductor substrate, the curved concavities may have a bottom surface width of 5 um or less.

In the semiconductor substrate, the substrate may be a sapphire substrate and the first semiconductor layer may be a gallium nitride layer.

In accordance with a further exemplary embodiment of the invention, a method of fabricating a semiconductor substrate includes: forming a plurality of semispherical protrusions at a predetermined interval on a first plane of a substrate; and forming a first semiconductor layer on the first plane of the substrate.

In the method of fabricating a semiconductor substrate, the formation of the plurality of semispherical protrusions may be performed by etching the first plane of the substrate.

In the method of fabricating a semiconductor substrate, the semispherical protrusions may be formed on the first plane of the substrate such that the ratio of the total surface area of the plurality of semispherical protrusions to the surface area of the first plane may become 1 or more.

In the method of fabricating a semiconductor substrate, the semispherical protrusions may be formed on the first plane of the substrate such that the semispherical protrusions may have a bottom surface width of 5 um or less.

In the method of fabricating a semiconductor substrate, the first semiconductor layer may be formed by metal organic chemical vapor deposition.

In the method of fabricating a semiconductor substrate, the substrate may be a sapphire substrate and the first semiconductor layer may be a gallium nitride layer.

In the method of fabricating a semiconductor substrate, the method may further include lifting-off the first semiconductor layer from the substrate.

In the method of fabricating a semiconductor substrate, the method may further include forming metallic material layer having a pattern of predetermined shapes on a second plane of the first semiconductor layer opposite the first plane, and forming a second semiconductor layer on the second plane using metal organic chemical vapor deposition to form cavities at portions of the first semiconductor layer adjoining the metallic material layer.

In the method of fabricating a semiconductor substrate, the metallic material layer may be formed of tantalum, titanium or chromium.

In the method of fabricating a semiconductor substrate, the metallic material layer may be formed in the pattern of predetermined shapes having a width of the predetermined interval at positions on the second plane of the first semiconductor layer corresponding to intervals between the semispherical protrusions.

In the method of fabricating a semiconductor substrate, the pattern of predetermined shapes may be composed of a plurality of rectangles each having a long side disposed in a first direction and arranged in a second direction orthogonal to the first direction to form the metallic material layer.

In the method of fabricating a semiconductor substrate, the metallic material layer may be formed in the pattern of predetermined shapes such that the first direction becomes a {1-100} direction of the first semiconductor layer or an equivalent direction to the {1-100} direction.

In the method of fabricating a semiconductor substrate, the method may further include lifting-off the substrate using the cavities formed in the first semiconductor layer to fabricate a semiconductor substrate composed of the first semiconductor layer and the second semiconductor layer.

In accordance with still another exemplary embodiment of the invention, a method of fabricating a semiconductor substrate includes forming a plurality of curved concavities at a predetermined interval on a first plane of a substrate; and forming a first semiconductor layer on the first plane of the substrate.

In the method of fabricating a semiconductor substrate, the curved concavities may be formed on the first plane of the substrate such that the curved concavities has a bottom surface width of 5 um or less.

In the method of fabricating a semiconductor substrate, the substrate may be a sapphire substrate, and the first semiconductor layer may be a gallium nitride layer.

In the method of fabricating a semiconductor substrate, the method may further include lifting-off the first semiconductor layer from the substrate.

In the method of fabricating a semiconductor substrate, the first semiconductor layer may be lifted-off from the substrate using a laser lift-off process.

In the method of fabricating a semiconductor substrate, the first semiconductor layer may be lifted-off from the substrate using a mechanical lift-off process.

In accordance with still another exemplary embodiment of the invention, a semiconductor device includes: the first semiconductor layer lifted-off from one of the semiconductor substrates; a first compound semiconductor layer formed on the first semiconductor layer; an active layer formed on the first compound semiconductor layer; and a second compound semiconductor layer formed on the active layer.

In accordance with still another exemplary of the invention, a semiconductor device includes: a second semiconductor layer lifted-off from one of the semiconductor substrates; a first compound semiconductor layer formed on the second semiconductor layer; an active layer formed on the first compound semiconductor layer; and a second compound semiconductor layer formed on the active layer.

In accordance with still another exemplary embodiment of the invention, a method of fabricating a semiconductor device includes: lifting-off the substrate from the first semiconductor layer of one of the semiconductor substrates; forming a first compound semiconductor layer on the first semiconductor layer; forming an active layer on the first compound semiconductor layer; and forming a second compound semiconductor layer on the active layer.

In accordance with still another exemplary embodiment of the invention, a method of fabricating a semiconductor device includes: lifting-off the substrate from the second semiconductor layer of one of the semiconductor substrates; forming a first compound semiconductor layer on the second semiconductor layer; forming an active layer on the first compound semiconductor layer; and forming a second compound semiconductor layer on the active layer.

According to the exemplary embodiments, there are provided a flat and thin semiconductor substrate, which is formed on a heterogeneous substrate to be easily lifted-off from the heterogeneous substrate, a semiconductor device including the same, and a method of fabricating the same.

DETAILED DESCRIPTION OF THE ILLUSTRATED EMBODIMENTS

The invention is described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the exemplary embodiments set forth herein. Further, like reference numerals denote like elements through the specification and the accompanying drawings.

As described above, conventionally, it is difficult to lift-off a thin semiconductor substrate from a heterogeneous substrate when the semiconductor substrate is grown on a heterogeneous substrate. For example, when a GaN layer of about 10 um is formed on a sapphire substrate, it is difficult to lift-off the GaN layer from the sapphire substrate only through application of stress. Thus, conventionally, a GaN layer is further formed to a thickness of about 100 um thereon. The inventors of the present invention found that, when a GaN layer is formed to a thickness of about 10 um by metal organic chemical vapor deposition (MOCVD) using a PSS substrate, which is a sapphire substrate having a specific pattern, the GaN layer can be lifted-off from the PSS substrate.

A first exemplary embodiment of the invention will be described.

FIG. 1shows a semiconductor substrate100according to a first exemplary embodiment of the present invention. Here,FIG. 1(a) is a plan view of the semiconductor substrate100andFIG. 1(b) is a partially cross-sectional view taken along a dotted line ofFIG. 1(a). The semiconductor substrate100includes a PSS substrate110(hereinafter, referred to as a “substrate110”) and a first semiconductor layer20. In this embodiment, the substrate110may have a different composition from the first semiconductor layer20. Although the first semiconductor layer20is illustrated as being formed of GaN in this embodiment, the invention is not limited thereto and any material may be used for the first semiconductor layer so long as the material may be applicable to light emitting devices (LEDs). The c-plane of the substrate, that is, a first plane10aof the substrate on which the first semiconductor layer20will be formed, has a plurality of semispherical protrusions11arranged at an interval (i) and each having a bottom surface width (w). Herein, the interval (i) means the shortest distance between two semispherical protrusions11.

FIG. 2is a diagram of a pattern of semispherical protrusions11according to one exemplary embodiment of the invention. When each of the semispherical protrusions11has a circular bottom surface having a radius of w/2, the centers of the semispherical protrusions11are respectively located at vertexes of an equilateral triangle, each side of which has a length of w+i. Specifically, in the pattern of semispherical protrusions11according to this embodiment, sets of three semispherical protrusions11are repeatedly arranged in a first direction and a second direction orthogonal to the first direction on the first plane10aof the substrate110.

On the c-plane of the substrate110, the first semiconductor layer20is not easily lifted-off from the substrate110due to a high bonding force between the substrate110and the first semiconductor layer20. However, since curved surfaces of the semispherical protrusions11allow the first semiconductor layer20to be simply seated on the substrate110with very low bonding force, the first semiconductor layer20can be easily lifted-off from the substrate110. Thus, in this embodiment, the semispherical protrusions11are arranged at a predetermined interval (i) on the c-plane10aof the substrate110, thereby allowing the first semiconductor layer20to be easily lifted-off from the substrate110. Here, for the substrate110according to this embodiment, the ratio of the total surface area of the semispherical protrusions11to the area of the c-plane of the substrate110may be 1 or more. The substrate110having such a ratio of the total surface area of the semispherical protrusions11to the area of the c-plane of the substrate110allows the first semiconductor layer20to be easily lifted-off from the substrate110.

In this embodiment, the area of the c-plane of the substrate110, the width (w) of the bottom surface of each of the semispherical protrusions11, and the interval (i) of the semispherical protrusions11may be arbitrarily set to obtain the ratio described above. According to this embodiment, the bottom surface width of each of the semispherical protrusions11may be 5 um or less. When the bottom surface width of each of the semispherical protrusions11is set to 5 um or less, the first semiconductor layer20may be easily lifted-off from the substrate110. Such a pattern of semispherical protrusions11may be formed by etching the substrate, for example, through photolithography. Photolithography is generally used for formation of a pattern, but is limited up to a line width of 1 um to ensure good quality of the pattern. Thus, when forming the pattern of semispherical protrusions11on the substrate110according to this embodiment, the interval (i) of the semispherical protrusions11may be set to 1 um or more. For example, on the substrate110shown inFIG. 1, when the interval (i) between two semispherical protrusions11is set to 1 um, the bottom surface width of each of the semispherical protrusions11is set to 3 um in order to have the ratio described above.

Next, a method of fabricating the semiconductor substrate100according to this embodiment will be described.FIG. 3AandFIG. 3Bshow sectional views illustrating the method of fabricating the semiconductor substrate100. A matrix10is prepared (FIG. 3A(a)) and subjected to etching to form a pattern of semispherical protrusions11on the c-plane of the substrate110(FIG. 3A(b)). As described above, photolithography may be used when forming the pattern on the substrate110according to this embodiment. On the substrate110according to this embodiment, the semispherical protrusions11are arranged at a predetermined interval (i) on the c-plane10aof the substrate110such that the ratio of the total surface area of the semispherical protrusions11to the area of the c-plane of the substrate110becomes 1 or more. The arrangement of this pattern facilitates separation of a first semiconductor layer20from the substrate110in a lift-off process described below.

Then, the first semiconductor layer20is formed on an upper surface (that is, c-plane) of the substrate110having the pattern of semispherical protrusions11(FIG. 3A(c)). The first semiconductor layer20may be formed by metal organic chemical vapor deposition (MOCVD). The conditions for forming the first semiconductor layer20may be arbitrarily set depending on the thickness of a material or layer to be used for the first semiconductor layer20. The formation of the first semiconductor layer20is performed until an upper surface of the first semiconductor layer20(second plane opposite the first plane defined as the c-plane of the substrate110) becomes flat. For example, when forming the pattern of semispherical protrusions11each having a bottom surface width of 3 um on the substrate110to be arranged at an interval of 1 um, the first semiconductor layer20can be flattened by forming the first semiconductor layer20to a thickness of 10 um. As a result, it is possible to manufacture a semiconductor substrate100according to the embodiment.

The prepared semiconductor substrate100allows the substrate110to be easily lifted-off therefrom. Then, a second substrate170is attached to an upper surface of the first semiconductor layer20of the semiconductor substrate100via a bonding layer180(FIG. 3B(d)). The second substrate170may be formed of, for example, silicon (Si) substrate, silicon carbide (SiC), or metal. Further, the bonding layer180may be formed of, for example, gallium (Ga), indium (In), aluminum (Al), gold (Au), an alloy of gold and tin (Sn), or adhesives known in the art.

Then, the substrate110is lifted-off from the semiconductor substrate100, to which the second substrate170is bonded (FIG. 3B(e)). Separation of the first semiconductor layer20from the substrate110may be performed by, for example, a laser lift-off process. In a fabricated semiconductor substrate101, the first semiconductor layer20has concavities at portions adjoining the semispherical protrusions11. When a semiconductor device such as an LED is manufactured using the semiconductor substrate101that has the first semiconductor layer20having such concavities formed therein, the semiconductor device exhibits about two times higher light extraction efficiency than semiconductor devices known in the art.

Further, in the semiconductor substrate101, the first semiconductor layer20may be flattened by a polishing process (FIG. 3B(f)). In this embodiment, the first semiconductor layer20may be lifted-off from the substrate110using mechanical lift-off instead of laser lift-off. Consequently, it is possible to obtain a flat and thin semiconductor substrate105.

As such, according to this embodiment, the first semiconductor layer is formed on the substrate having a plurality of semispherical protrusions arranged at a predetermined interval on the first plane thereof, so that it is possible to fabricate a thin and flat semiconductor substrate which can be easily lifted-off from the substrate.

Next, a second exemplary embodiment of the invention will be described.

In the first exemplary embodiment, the first semiconductor layer is formed on the substrate having the semispherical protrusions. In the second exemplary embodiment, a metallic material layer having a pattern of predetermined shapes is formed on an upper surface of the first semiconductor layer (on a second plane opposite the first plane of the substrate110, that is, the c-plane of the substrate110), followed by forming a second semiconductor layer on the metallic material layer using MOCVD to form cavities in the first semiconductor layer. In the semiconductor substrate according to this embodiment, when the first semiconductor layer is thinly formed to be less than 10 um on a substrate, it is possible to easily lift-off the first semiconductor layer from the substrate.

FIG. 4shows a semiconductor substrate200according to the second exemplary embodiment of the invention, in whichFIG. 4(a) is a plan view of the semiconductor substrate200andFIG. 4(b) is a sectional view taken along a dotted line ofFIG. 4(a). The semiconductor substrate200includes a substrate210, a first semiconductor layer220, a second semiconductor layer240and cavities250. In this embodiment, the substrate210may have a different composition from the first semiconductor layer220. Although the first semiconductor layer220is illustrated as being formed of GaN in this embodiment, the invention is not limited thereto and any material may be used for the first semiconductor layer so long as the material may be applicable to LEDs. Further, the second semiconductor layer240may have the same or different composition from the first semiconductor layer220. As in the semiconductor substrate100, the c-plane of the substrate210for the semiconductor substrate200, that is, the first plane of the substrate210on which the first semiconductor layer220will be formed, has a plurality of semispherical protrusions21arranged at an interval (i) and each having a bottom surface width (w).

The cavities250are formed to surround the semispherical protrusions21of the first semiconductor layer220and the second semiconductor layer240. In this embodiment, the cavities250are formed at positions corresponding to the interval (i) between two semispherical protrusions21. As shown inFIG. 4(a), the cavities250are arranged such that the centers of the cavities are respectively located at vertexes of a hexagonal shape, the center of which is coincident with the center of the semispherical protrusion21and which is disposed to fill the first plane of the substrate210, that is, the c-plane of the substrate210, like a cross-section of a honeycomb structure. The other configurations of the semiconductor substrate200are the same as those of the semiconductor substrate100, and detailed descriptions thereof will be omitted herein.

Next, a method of fabricating the semiconductor substrate200according to this embodiment will be described.FIG. 5AandFIG. 5Bshow sectional views illustrating the method of fabricating the semiconductor substrate200. The processes shown inFIG. 5A(a) to (c) are the same as those of the semiconductor substrate100, and detailed descriptions thereof will be omitted herein. A metallic material layer230having a pattern of predetermined shapes is formed on an upper surface of the first semiconductor layer220(FIG. 5A(d)). The metallic material layer230is composed of cylindrical metal islands each having a width (a bottom surface width thereof), which is the same as the predetermined interval (i). The metallic material layer230may be formed of metal which reacts with components used for the first semiconductor layer220. For example, when the first semiconductor layer220is formed of GaN, tantalum, titanium or chromium may be suitably used for the metallic material layer230. The metallic material layer230may be formed using an electron beam (EB) deposition or lift-off process. Then, in the metallic material layer230, the cylindrical metal islands each having a width (the bottom surface width) which is the same as the predetermined interval (i), are formed at positions corresponding to the interval between the semispherical protrusions21to surround the semispherical protrusions21. Further, in the metallic material layer230, the metal islands are disposed such that the centers of the metal islands are respectively located at vertexes of a hexagonal shape.

Next, a second semiconductor layer240is formed. The second semiconductor layer240is formed by MOCVD. The conditions for forming the second semiconductor layer240may be arbitrarily set depending on the thickness of a material or layer to be used for the second semiconductor layer240. When the second semiconductor layer240is formed, the metallic material layer230reacts with a component constituting the first semiconductor layer220, so that some of the first semiconductor layer220adjoining the bottom surface of the metallic material layer230is decomposed, forming cavities250(FIG. 5A(e)). For example, if the first semiconductor layer220is formed of GaN and the metallic material layer230is formed of tantalum, nitrogen in the first semiconductor layer220reacts with tantalum to form tantalum nitride (TaN), so that GaN of the first semiconductor layer220is decomposed, whereby the cavities250are formed on part of the first semiconductor layer220adjoining the bottom surface of the metallic material layer230. Here, the second semiconductor layer240is formed on an upper surface of the first semiconductor layer220and a lateral surface of the metallic material layer230.

After the cavities250are formed, the metallic material layer230is removed. If the metallic material layer230is formed of, for example, Ta, removal of the metallic material layer may be achieved by etching using hydrogen fluoride (HF). For example, removal of the metallic material layer may be achieved by immersing the semiconductor substrate having the cavities250in a 50% HF aqueous solution. For example, the semiconductor substrate may be immersed in the solution for 25 hours. Although this embodiment is illustrated as using HF for etching, any solution may be used to etch the metallic material layer230so long as the solution is capable of dissolving the metallic material layer without dissolving the first semiconductor layer220and the second semiconductor layer240. After removing the metallic material layer230, the second semiconductor layer240is further grown to fabricate the semiconductor substrate200according to this embodiment (FIG. 5B(f)).

The prepared semiconductor substrate200allows the substrate210to be easily lifted-off therefrom. Then, a second substrate170is attached to an upper surface of the first semiconductor layer220of the semiconductor substrate200via a bonding layer180(FIG. 5B(d)). The second substrate170and the bonding layer180in this embodiment are the same as those of the first exemplary embodiment, and detailed descriptions thereof will be omitted herein. The semiconductor substrate200may be easily lifted-off from the semispherical protrusions21and is torn near the bottom surfaces of the cavities250, thereby allowing the substrate210to be easily lifted-off therefrom (FIG. 5B(h)). To lift-off the first semiconductor layer220and the second semiconductor layer240from the substrate210, for example, a laser lift-off process may be used. In a prepared semiconductor substrate201, the first semiconductor layer220has concavities at portions adjoining the semispherical protrusions21. When a semiconductor device such as an LED is manufactured using the semiconductor substrate201that has the first semiconductor layer220having such concavities formed therein, the semiconductor device exhibits about two times higher light extraction efficiency than semiconductor devices known in the art.

Further, in the semiconductor substrate201, the first semiconductor layer220may be flattened by a polishing process (FIG. 5B(i)). In this embodiment, the first semiconductor layer20may be lifted-off from the substrate210using mechanical lift-off instead of laser lift-off. Consequently, it is possible to obtain a flat and thin semiconductor substrate205.

In this embodiment, when the first semiconductor layer is formed to a small thickness of less than 10 um, semispherical protrusions21each having a bottom surface width of 1 um are formed, for example, on the substrate210shown inFIG. 4. After the first semiconductor layer220is grown to a thickness of 2 um, a metallic material layer230is formed by forming metal islands each having a width of 1 um on the first semiconductor layer220, and a second semiconductor layer240is grown to a thickness of 3 um thereon, thereby forming a semiconductor substrate200having a flat surface.

As described above, according to this embodiment, the first semiconductor layer is formed on the substrate having a plurality of semispherical protrusions arranged at a predetermined interval on the first plane, the metallic material layer having a pattern of predetermined shapes is formed on the second plane of the first semiconductor layer, and the second semiconductor layer is formed on the second plane, so that the cavities are formed in the first semiconductor layer adjoining the metallic material layer. As a result, it is possible to provide a flat and thin semiconductor substrate which can be easily lifted-off from the substrate through the semispherical protrusions formed on the substrate and the cavities formed in the first semiconductor layer. According to this embodiment, when the first semiconductor layer is thinly formed to a thickness of less than 10 um, the first semiconductor layer can be easily lifted-off from the substrate.

Next, a third exemplary embodiment of the invention will be described.

In the second exemplary embodiment, the cavities are formed by positioning the cylindrical metal islands at positions corresponding to the interval between the semispherical protrusions to surround the semispherical protrusions. In the third exemplary embodiment, a metallic material layer is formed in a pattern of predetermined shapes that is composed of a plurality of rectangles each having a long side disposed in a first direction and arranged in a second direction orthogonal to the first direction. In the semiconductor substrate according to this embodiment, when a first semiconductor layer is thinly formed to be less than 10 um on a substrate, it is possible to easily lift-off the first semiconductor layer from the substrate.

FIG. 6shows a semiconductor substrate300according to the third exemplary embodiment of the invention. Here,FIG. 6(a) is a plan view of the semiconductor substrate300andFIG. 6(b) is a sectional view taken along a dotted line ofFIG. 6(a). The semiconductor substrate300includes a substrate210, a first semiconductor layer320, a second semiconductor layer340, and cavities350. In this embodiment, the substrate210may have a different composition from the first semiconductor layer320. Although the first semiconductor layer320is illustrated as being formed of GaN in this embodiment, the invention is not limited thereto and any material may be used for the first semiconductor layer so long as the material is applicable to LEDs. Further, the second semiconductor layer340has the same or different composition from the first semiconductor layer320. As in the semiconductor substrate100, the c-plane of the substrate210for the semiconductor substrate300, that is, a first plane of the substrate210on which the first semiconductor layer320will be formed, has a plurality of semispherical protrusions21arranged at an interval (i) and each having a bottom surface width (w).

The first semiconductor layer320and the second semiconductor layer340have a plurality of cavities350, which have a rectangular shape with a long side disposed in a first direction and are arranged in a second direction orthogonal to the first direction. The other configurations of the semiconductor substrate300are the same as those of the semiconductor substrate100or200, and detailed descriptions thereof will be omitted herein.

Next, a method of fabricating the semiconductor substrate300according to this embodiment will be described.FIG. 7AandFIG. 7Bshow sectional views illustrating the method of fabricating the semiconductor substrate300. The processes shown inFIG. 7A(a) to (c) are the same as those of the semiconductor substrate100, and detailed descriptions thereof will be omitted herein. A metallic material layer330having a pattern of predetermined shapes is formed on an upper surface of the first semiconductor layer320(FIG. 7A(d)). The metallic material layer330may be formed using an electron beam (EB) deposition or lift-off process. In this embodiment, the metallic material layer330is formed by placing a plurality of rectangular metal stripes each having a long side disposed in a {1-100} direction of the first semiconductor layer320or in an equivalent direction to the {1-100} direction on the first semiconductor layer320to be arranged in a direction orthogonal to the {1-100} direction or to the equivalent direction to the {1-100} direction or to be arranged in an equivalent direction to this direction. For example, when forming a pattern of semispherical protrusions21arranged at an interval (i) of 1 um, and a bottom surface width (w) of 3 um on the substrate210, rectangular metal stripes having a thickness of about 50 um and a width of 5 um are arranged at an interval of 5 um, thereby forming the metallic material layer. Here, the metallic material may be tantalum (Ta). In addition, the thickness of the metallic material layer330may vary depending on the kind of metallic material for the metallic material layer and may be as high as possible.

Next, a second semiconductor layer340is formed on the metallic material layer using MOCVD. The conditions for forming the second semiconductor layer340may be arbitrarily set depending on the thickness of a material or layer to be used for the second semiconductor layer340. When the second semiconductor layer340is formed, the metallic material layer330reacts with a component constituting the first semiconductor layer320, so that some of the first semiconductor layer320adjoining the bottom surface of the metallic material layer330is decomposed, forming cavities350(FIG. 7A(e)).

In this embodiment, when the metallic material layer330is formed to have a long side disposed in the {1-100} direction of the first semiconductor layer320or in an equivalent direction to the {1-100}, reaction between components constituting the first semiconductor layer320and the metallic material layer330is facilitated, and decomposition of portions of the first semiconductor layer320adjoining the bottom surface of the metallic material layer330is also facilitated. This is because a growth rate in a direction parallel to the substrate is higher than the growth rate in a second direction of the metallic material layer330. Thus, advantageously, the cavities350are efficiently formed in the first semiconductor layer320. The material for the metallic material layer330in this embodiment is the same as that for the metallic material layer230, and a detailed description thereof will be omitted herein.

After the cavities350are formed, the metallic material layer330is removed. Since removal of the metallic material layer may be achieved by the same process as in the second embodiment, a detailed description thereof will be omitted. After removing the metallic material layer330, the second semiconductor layer340is further grown to fabricate the semiconductor substrate200according to this embodiment (FIG. 7B(f)).

The prepared semiconductor substrate300allows the substrate210to be easily lifted-off therefrom. Then, a second substrate170is attached to an upper surface of the second semiconductor layer340of the semiconductor substrate300via a bonding layer180(FIG. 7B(d)). The second substrate170and the bonding layer180are the same as those of the first exemplary embodiment, and a detailed description thereof will be omitted herein. The semiconductor substrate300may be easily lifted-off from the semispherical protrusions21and is torn near the bottom surfaces of the cavities350, thereby allowing the substrate210to be easily lifted-off therefrom (FIG. 7B(h)). To lift-off the first semiconductor layer320and the second semiconductor layer340from the substrate210, for example, a laser lift-off process may be used. In a prepared semiconductor substrate301, the first semiconductor layer320has concavities at portions adjoining the semispherical protrusions21. When a semiconductor device such as an LED is manufactured using the semiconductor substrate301that has the first semiconductor layer320having such concavities formed therein, the semiconductor device exhibits about two times higher light extraction efficiency than semiconductor devices known in the art.

Further, in the semiconductor substrate301, the first semiconductor layer320may be flattened by a mechanical lift-off process (FIG. 7B(i)). In this embodiment, the first semiconductor layer220may be lifted-off from the substrate210using mechanical lift-off instead of laser lift-off. Consequently, it is possible to obtain a flat and thin semiconductor substrate305.

In this embodiment, when the first semiconductor layer is formed to a small thickness of less than 10 um, semispherical protrusions21each having a bottom surface width of 1 um are formed, for example, on the substrate210shown inFIG. 6. After the first semiconductor layer320is grown to a thickness of 2 um, a metallic material layer330is formed by placing a plurality of rectangular metal stripes each having a long side disposed in a {1-100} direction of the first semiconductor layer or in an equivalent direction to the {1-100} direction to be arranged in a second direction orthogonal to the first direction, and a second semiconductor layer is formed on a second plane, so that the cavities are formed at portions of the first semiconductor layer adjoining the metallic material layer. As a result, it is possible to provide a flat and thin semiconductor substrate which can be easily lifted-off from the substrate through the semispherical protrusions formed on the substrate and the cavities formed in the first semiconductor layer. According to this embodiment, when the first semiconductor layer is thinly formed to a thickness less than 10 um, the first semiconductor layer can be easily lifted-off from the substrate.

Next, a fourth exemplary embodiment of the invention will be described.

In the first to third exemplary embodiment, the first semiconductor layer is formed on the substrate having the semispherical protrusions. In the fourth exemplary embodiment, the first semiconductor layer is formed on a substrate having a plurality of curved concavities arranged at a predetermined interval on a first plane of the substrate.

FIG. 8shows a semiconductor substrate400according to the fourth exemplary embodiment of the invention.FIG. 8(a) is a plan view of the semiconductor substrate400andFIG. 8(b) is a sectional view taken along a dotted line ofFIG. 8(a). The semiconductor substrate400includes a PSS substrate410(hereinafter, referred to as a “substrate410”) and a first semiconductor layer420. In this embodiment, the substrate410may have a different composition from the first semiconductor layer420. Although the first semiconductor layer420illustrated as being formed of GaN in this embodiment, the invention is not limited thereto and any material may be used for the first semiconductor layer so long as the material is applicable to LEDs. The c-plane of the substrate410, that is, the first plane10aof the substrate410on which the first semiconductor layer420will be formed, has a plurality of curved concavities460arranged at a predetermined interval (i). Herein, the interval (i) means the shortest distance between two curved concavities460. In this embodiment, as the pattern of curved concavities is formed at a predetermined interval on the c-plane of the substrate410, that is, on the first plane of the substrate, the first semiconductor layer420may be easily lifted-off from the substrate410.

On the c-plane of the substrate410, the first semiconductor layer420is not easily lifted-off from the substrate410due to a high bonding force between the substrate410and the first semiconductor layer420. However, since the curved concavities460allow the first semiconductor layer420to be simply seated on the substrate410with very low bonding force, the first semiconductor layer420can be easily lifted-off from the substrate410. Thus, in this embodiment, the curved concavities460are arranged at a predetermined interval (i) on the c-plane10aof the substrate410, thereby allowing the first semiconductor layer420to be easily lifted-off from the substrate410. Although the curved concavities460are illustrated as having a semispherical shape inFIG. 8, it is necessary for the curved concavities460to have a flat bottom surface. Further, the curved concavities460may have any suitable shape. For example, the curved concavities460may have a mortar shape or a conical shape.

For example, if the curved concavities460are semispherical concavities as shown inFIG. 8, the ratio of the total surface area of the curved concavities460to the area of the c-plane of the substrate410may be 1 or more. The substrate40having such a ratio of the total surface area of the curved concavities460to the area of the c-plane of the substrate410allows the first semiconductor layer420to be easily lifted-off from the substrate410. When each of the curved concavities460has a circular bottom surface having a radius of w/2, the centers of the curved concavities460are respectively located at vertexes of an equilateral triangle, each side of which has a length of w+i. Specifically, in the pattern of curved concavities460according to this embodiment, sets of three curved concavities460are repeatedly arranged in a first direction and a second direction orthogonal to the first direction on the first plane10aof the substrate410.

In this embodiment, the area of the c-plane of the substrate410, the width (w) of the bottom surface of each of the curved concavities460, and the interval (i) of the curved concavities460may be arbitrarily set to obtain the ratio described above.

According to this embodiment, the bottom surface width of each of the curved concavities460may be 5 um or less. When the bottom surface width of each of the curved concavities460is set to 5 um or less, the first semiconductor layer420may be easily lifted-off from the substrate410. Such a pattern of curved concavities460may be formed by etching a matrix10, for example, through photolithography. Photolithography is generally used for formation of a pattern, but is limited up to a line width of 1 um to ensure good pattern quality. Thus, when forming the pattern of curved concavities460according to this embodiment on the substrate410, the interval (i) of the curved concavities460may be set to 1 um or more. For example, on the substrate410shown inFIG. 8, when the interval (i) between two curved concavities460is set to 1 um, the bottom surface width of each of the curved concavities460is set to 3 um in order to obtain the ratio described above.

Next, a method of fabricating the semiconductor substrate400according to this embodiment will be described.FIG. 9AandFIG. 9Bshow sectional views illustrating the method of fabricating the semiconductor substrate400. A matrix10is prepared (FIG. 9A(a)) and subjected to etching to form a pattern of curved concavities460on the c-plane of the substrate410(FIG. 9A(b)). As described above, photolithography may be used when forming the pattern on the substrate410according to this embodiment. On the substrate410according to this embodiment, the curved concavities460are arranged at a predetermined interval (i) on the c-plane10aof the substrate410such that the ratio of the total surface area of the curved concavities460to the area of the c-plane of the substrate410becomes 1 or more. The arrangement of this pattern facilitates separation of a first semiconductor layer420from the substrate410in a lift-off process described below.

Then, the first semiconductor layer420is formed on an upper surface (that is, c-plane) of the substrate410having the pattern of curved concavities460(FIG. 9A(c)). The first semiconductor layer420may be formed by MOCVD. The conditions for forming the first semiconductor layer420may be arbitrarily set depending on the thickness of a material or layer to be used for the first semiconductor layer420. The formation of the first semiconductor layer420is performed until an upper surface of the first semiconductor layer420(second plane opposite the first plane defined as the c-plane of the substrate410) becomes flat. For example, when forming the pattern of curved concavities460each having a bottom surface width of 3 um on the substrate410to be arranged at an interval of 1 um, the first semiconductor layer420can be flattened by forming the first semiconductor layer20to a thickness of 410 um. As a result, it is possible to manufacture a semiconductor substrate400according to the embodiment.

The prepared semiconductor substrate400allows the substrate410to be easily lifted-off therefrom. Then, a second substrate170is attached to an upper surface of the first semiconductor layer420of the semiconductor substrate400via a bonding layer180(FIG. 9B(d)). The second substrate170and the bonding layer180in this embodiment are the same as those of the first exemplary embodiment, and detailed descriptions thereof will be omitted herein. The prepared semiconductor substrate400allows the substrate410to be easily lifted-off therefrom (FIG. 9B(e)). Separation of the first semiconductor layer420from the substrate410may be performed by, for example, a laser lift-off process. In a fabricated semiconductor substrate401, the first semiconductor layer420has protrusions at portions adjoining the curved concavities460. When a semiconductor device such as an LED is manufactured using the semiconductor substrate401that has the first semiconductor layer420having such protrusions formed thereon, the semiconductor device exhibits about two times higher light extraction efficiency than semiconductor devices known in the art.

Further, the semiconductor substrate401may be flattened by a polishing process (FIG. 9B(f)). In this embodiment, the first semiconductor layer420may be lifted-off from the substrate410using mechanical lift-off instead of laser lift-off. Consequently, it is possible to obtain a flat and thin semiconductor substrate405.

As such, according to the present embodiment, the first semiconductor layer is formed on the substrate having a plurality of curved concavities arranged at a predetermined interval on the first plane thereof, so that it is possible to fabricate a thin and flat semiconductor substrate which can be easily lifted-off from the substrate.

Next, a fifth exemplary embodiment of the invention will be described.

In the fourth exemplary embodiment, the first semiconductor layer is formed on the substrate having a plurality of curved concavities. On the contrary, in the fifth embodiment of the invention, the first semiconductor layer is formed on a substrate having a plurality of troughs arranged at a predetermined interval on a first plane of the substrate.

FIG. 10shows a semiconductor substrate500according to the fifth exemplary embodiment of the invention.FIG. 10(a) is a plan view of the semiconductor substrate500andFIG. 10(b) is a sectional view taken along a dotted line ofFIG. 10(a). The semiconductor substrate500includes a PSS substrate510(hereinafter, referred to as a “substrate510”) and a first semiconductor layer520. In this embodiment, the substrate510may have a different composition from the first semiconductor layer520. Although the first semiconductor layer520is illustrated as being formed of GaN in this embodiment, the invention is not limited thereto and any material may be used for the first semiconductor layer so long as the material may be applicable to LEDs. The c-plane of the substrate510, that is, the first plane10aof the substrate510on which the first semiconductor layer520will be formed, has a plurality of troughs560arranged at a predetermined interval (i). In this embodiment, as the pattern of troughs is formed at a predetermined interval on the c-plane of the substrate510, that is, on the first plane of the substrate510, the first semiconductor layer520may be easily lifted-off from the substrate510.

In this embodiment, the troughs560are formed to have a sufficiently narrow width (w) to prevent the first semiconductor layer520from being grown on the bottom surfaces (that is, c-plane) of the troughs560. Further, as shown inFIG. 10, according to this embodiment, cavities555are formed at upper portions of the troughs560to extend towards a second plane opposite the first plane of the first semiconductor layer520adjoining the c-plane of the substrate510. The extended portion of the cavity520is formed by gradually growing the first semiconductor layer, which is grown on the c-plane of the substrate510, in a direction parallel to the c-plane.

According to this embodiment, the bottom surface width (w) of each of the troughs560may be 5 um or less. When the bottom surface width (w) of the trough560is set to 5 um or less, the troughs560prevent the first semiconductor layer520from growing on the bottom surfaces thereof while allowing the cavities to be grown thereon, thereby facilitating separation of the first semiconductor layer520from the substrate510. If the bottom surface width (w) of the troughs560is greater than 5 um, the first semiconductor layer520is grown on the bottom surfaces of the troughs560, making it difficult to lift-off the first semiconductor layer520from the substrate510. Further, such a pattern of troughs560may be formed by etching the matrix10, for example, through photolithography. Photolithography is generally used for formation of a pattern, but is limited up to a line width of 1 um to ensure good pattern quality. Thus, when forming the pattern of troughs560according to this embodiment on the substrate510, the width (w) of the troughs560may be set to 1 um or more.

Next, a method of fabricating the semiconductor substrate500according to this embodiment will be described.FIG. 11AandFIG. 1Bshow sectional views illustrating the method of fabricating the semiconductor substrate500. A matrix10is prepared (FIG.11A(a)) and subjected to etching to form a pattern of troughs560on the c-plane of the substrate510(FIG.11A(b)). As described above, photolithography may be used when forming the pattern on the substrate510according to this embodiment. According to this embodiment, the troughs560may have a width (w) of 5 um or less. When MOCVD is performed at 500 Torr or more, the width (w) of the troughs may be set to 2 um or less. The arrangement of this pattern facilitates separation of a first semiconductor layer520from the substrate510in a lift-off process described below.

Then, the first semiconductor layer520is formed on an upper surface (that is, c-plane) of the substrate510having the pattern of troughs560(FIG.11A(c)). The first semiconductor layer520may be formed by MOCVD. The conditions for forming the first semiconductor layer520may be arbitrarily set depending on the thickness of a material or layer to be used for the first semiconductor layer520. The formation of the first semiconductor layer520is performed until an upper surface of the first semiconductor layer520(second plane opposite the first plane defined as the c-plane of the substrate510) becomes flat. As a result, it is possible to manufacture a semiconductor substrate500according to the embodiment.

The prepared semiconductor substrate500allows the substrate510to be easily lifted-off therefrom. Then, a second substrate170is attached to an upper surface of the first semiconductor layer520of the semiconductor substrate500via a bonding layer180(FIG. 11B(d)). The second substrate170and the bonding layer180in this embodiment are the same as those of the first exemplary embodiment, and detailed descriptions thereof will be omitted herein. The prepared semiconductor substrate500allows the substrate510to be easily lifted-off therefrom (FIG. 11B(e)). Separation of the first semiconductor layer520from the substrate510may be performed by, for example, a laser lift-off process. In a fabricated semiconductor substrate501, the first semiconductor layer520has concavities at portions adjoining the troughs560. When a semiconductor device such as an LED is manufactured using the semiconductor substrate501that has the first semiconductor layer420having such concavities formed therein, the semiconductor device exhibits about two times higher light extraction efficiency than semiconductor devices known in the art.

Further, the semiconductor substrate501may be flattened by a polishing process (FIG. 11B(f)). In this embodiment, the first semiconductor layer520may be lifted-off from the substrate510using mechanical lift-off instead of laser lift-off. Consequently, it is possible to obtain a flat and thin semiconductor substrate505.

As such, according to the present embodiment, the first semiconductor layer is formed on the substrate having a plurality of troughs560having a predetermined width on the first plane thereof, so that it is possible to fabricate a thin and flat semiconductor substrate which can be easily lifted-off from the substrate.

Next, a semiconductor device according one exemplary embodiment of the invention will be described.

A semiconductor device, such as an LED, may be fabricated using one of the semiconductor substrates100to500according to the embodiments of the invention described above. Herein, a semiconductor device1000fabricated using the semiconductor substrate105will be described as one example.FIG. 12is a sectional view of the semiconductor device1000according to one exemplary embodiment of the invention. The semiconductor device1000includes an ohmic contact layer1110on a surface of the first semiconductor layer20of the semiconductor substrate105and an ohmic contact layer1130on a surface of a second substrate.

The ohmic contact layer1110may be formed by stacking, for example, a 10 nm Ti layer, a 10 nm Al layer, and a 10 um Al layer. Further, the ohmic contact layer1130may be formed by stacking, for example, a 50 nm Au layer and a 50 nm Sb layer when the second substrate170is a Si substrate. A bonding layer180may be, for example, a 3 um Au layer. Here, although not shown in the drawings, an ohmic contact layer composed of a 10 nm Au layer and a 10 nm nickel layer is formed between the first semiconductor layer20and the bonding layer180. An N-type semiconductor is provided to the ohmic contact layer1110side of the first semiconductor layer20, and a P-type semiconductor is provided to the bonding layer180side of the first semiconductor layer20.

Further, an active layer may be located between the N-type semiconductor and the P-type semiconductor. The N-type semiconductor, the active layer and the P-type semiconductor may be formed before attaching the second substrate.

As such, when fabricating the semiconductor device1000using the semiconductor substrate105, it is possible to reduce manufacturing costs of the LED. Further, although the semiconductor device1000is illustrated as being formed on the semiconductor substrate105prepared from the semiconductor substrate100in this embodiment, the semiconductor device1000may be suitably formed using any one selected from the semiconductor substrates200˜500, a substrate lifted-off therefrom, a flattened substrate, and the like.

On the other hand, it is possible to fabricate the semiconductor device using the first semiconductor layer as a growth substrate after lifting-off the first semiconductor layer20or the second semiconductor layer240from the semiconductor substrate.

FIG. 13is a sectional view of a semiconductor device2000according to another exemplary embodiment of the invention. The first semiconductor layer20is a semiconductor layer lifted-off from the semiconductor substrate100. The semiconductor device2000includes a first compound semiconductor layer930, an active layer950and a second compound semiconductor layer970on an upper surface of the first semiconductor layer20. One ohmic contact layer is formed under the first semiconductor layer20, and another ohmic contact layer is formed on the second compound semiconductor layer970. Here, the first compound semiconductor layer930and the first semiconductor layer20may be the same conductive type semiconductor layers.

The semiconductor device2000may be fabricated by lifting off the first semiconductor layer20from the semiconductor substrate100and sequentially forming the first compound semiconductor layer930, the active layer950, and the second compound semiconductor layer970on the first semiconductor layer20.

Here, although the semiconductor device2000of this embodiment is illustrated as being formed by sequentially forming the first compound semiconductor layer, the active layer and second compound semiconductor layer on the first semiconductor layer20lifted-off from the semiconductor substrate100, the semiconductor device2000may be formed by sequentially forming the first compound semiconductor layer, the active layer and the second compound semiconductor layer on the first semiconductor layer420or520, which is lifted-off from the semiconductor substrate400or500. Alternatively, the semiconductor device2000may be formed by sequentially forming the first compound semiconductor layer, the active layer and the second compound semiconductor layer on the second semiconductor layer240or340, which is lifted-off from the semiconductor substrate200or300.

Although the invention has been illustrated with reference to some exemplary embodiments in conjunction with the drawings, it will be apparent to those skilled in the art that various modifications and changes can be made to the invention without departing from the spirit and scope of the invention. Therefore, it should be understood that the exemplary embodiments are provided by way of illustration only and are given to provide complete disclosure of the invention and to provide thorough understanding of the invention to those skilled in the art. Thus, it is intended that the invention covers the modifications and variations provided they fall within the scope of the appended claims and their equivalents.