STRUCTURE FOR MEASURING DOPING REGION RESISTANCE AND METHOD OF MEASURING CRITICAL DIMENSION OF SPACER

A method of the measuring a critical dimension of a spacer is provided. The measurement is performed by using several test structures of measuring doping region resistance. Each of the test structure has different space disposed between a first gate line and a second gate line. By measuring a doping region resistance of each test structure, a plot of reciprocal of resistance versus space can be accomplished. Then, making regression of the plot, a correlation can be formed. Finally, a critical dimension of a spacer can be get by extrapolating the correlation back to 0 unit of reciprocal of resistance.

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates generally to a test structure for measuring doping region resistance and a method of measuring a critical dimension of a spacer.

2. Description of the Prior Art

Metal Oxide Semiconductor (MOS) technology has dominated the semiconductor process industry for a number of years. In its basic form, a MOS device includes a source, a drain, a gate between the source and the drain, and a spacer surrounding the gate. The performance of the MOS device may be influenced by a critical dimension of the spacer on the gate, a width of the gate or and other dimensions of structures of the MOS device.

Therefore, with the increasing integration density and operating frequencies of microelectronic devices, manufacturing processes for the MOS devices require the ability to measure dimensions of submicron structures. Conventionally, in-line measurements such as optical measurements are performed after the MOS devices created.

As MOS device dimensions become smaller than or comparable to the light wavelength, simple imaging such as microscopy is not possible, and the measurements require analysis of the intensity and/or the polarization state of the light scattered off the sample structure. Furthermore, the optical measurement is time-consuming.

SUMMARY OF THE INVENTION

Therefore, one object of the present invention is to provide a novel method of measuring a critical dimension of a spacer, and a test structure for measuring doping region resistance is also provided in the present invention.

According to one preferred embodiment of the present invention, a structure for measuring doping region resistance, comprising: a substrate, a first gate line disposed on the substrate, a second gate line disposed parallel and adjacent to the first gate line, a first spacer disposed one a sidewall of the first gate line, a second spacer opposing to the first spacer disposed on a sidewall of the second gate line and a doping region disposed within the substrate between the first spacer and the second spacer, and the doping region extend continuously along the first gate line from a front end of the first gate line to a back end of the first gate line.

According to another preferred embodiment of the present invention, a method of measuring a critical dimension of a spacer, comprising the steps of: first, providing numerous test structures, each of the test structures comprising: a substrate, a first gate line disposed on the substrate, a second gate line disposed parallel and adjacent to the first gate line, a first spacer disposed on one a sidewall of the first gate line, a second spacer opposing to the first spacer disposed on a sidewall of the second gate line, wherein each of the test structures has a doping region different in size, the doping region is disposed in the substrate and between the first gate line and the second gate line, and each of the test structures has a space disposed between the first gate line and the second gate line, and the space of each of the test structures is different. Then, a voltage difference is applied to each of the doping regions, and a current flowing through each of the doping region is measured under the voltage difference to get several current values. Later, a reciprocal of resistance of each of the doping regions is calculated based on the current values and the voltage difference. Thereafter, a plot of reciprocal of resistance versus space is drawn based on the reciprocal of resistance of each test structure and the space of each test structure. Subsequently, a regression is made to the plot to form a correlation. Finally, the correlation is extrapolated back to 0 unit of reciprocal of resistance to determining two times of a critical dimension of the first spacer.

DETAILED DESCRIPTION

The present invention now will be described more fully hereinafter with reference to the accompanying drawings, wherein like numbers refer to like elements throughout. A test structure for measuring doping region resistance will be described with reference to the accompanyingFIG. 1toFIG. 3.FIG. 1shows a top view of a test structure for measuring a doping region resistance schematically.FIG. 2shows schematically a cross- sectional view of the test structure inFIG. 1along line A-A′ .FIG. 3shows schematically a cross-sectional view of the test structure inFIG. 1along line B-B′ .

Please refer toFIG. 1andFIG. 2. A test structure for measuring doping region resistance100includes a pair of gate lines such as a first gate line12and a second gate line14disposed on a substrate10. The substrate10may be a wafer10. The substrate10is divided into an active area16and an isolation area18. The active area16is framed by thick line in the figures. The first gate line12and the second gate line14are disposed on the active area16of the substrate10, parallel and adjacent to each other. A width W1of the first gate line12and a width W2of a second gate line14are preferably the same. A space S1is disposed between the first gate line12and the second gate line14. Two first spacers20are disposed on two sidewalls of the first gate line12respectively. Two second spacers are disposed on two sidewalls of the second gate line14respectively. One of the first spacers20opposes to one of the second spacer22. Each of the first spacer20includes an offset spacer24and a main spacer26. Similarly, each of the second spacer22includes an offset spacer28and a main spacer30. The first spacer20and the second spacer22have the same critical dimension C. The first gate line12has a front end32and a back end34which respectively refer to two end points of the first gate line12. The second gate line14has a front end36and a back end38which respectively refer to two end points of the second gate line14. A doping region40such as a source/drain doping region is disposed within the within the active area16of the substrate10and between the first spacer20and the second spacer22which facing each other. The doping region40may include p-type dopants or n-type dopants. Furthermore, the doping region40positioned along the first gate line12and extends continuously from the front end32to the back end34. Moreover, the doping region40partly overlaps with one of the first spacers20and one of the second spacers22. Specifically, the doping region40also extends continuously from one of the first spacers20to one of the second spacers22. There are lightly doping regions42disposed under the first gate line12and the second gate line14.

Please refer toFIG. 1andFIG. 3. At least a first auxiliary gate line44is disposed perpendicular to the first gate line12and connecting to the front end32of the first gate line12. At least a third auxiliary gate line46is disposed perpendicular to the first gate line12and connecting to the back end34of the first gate line12. However, the number of the first auxiliary gate line44and the number of the third auxiliary gate line46are not limited. There can be more than one first auxiliary gate line44and more than one third auxiliary gate line46disposed near or at the ends of the first gate line12. Similarly, at least a second auxiliary gate line48is disposed perpendicular to the second gate line14and connecting to the front end36of the second gate line14. At least a fourth auxiliary gate line50is disposed perpendicular to the second gate line14and connecting to the back end38of the second gate line14. However, the number of the second auxiliary gate line48and the number of the fourth auxiliary gate line50are not limited. There can be numerous second auxiliary gate lines48and numerous fourth auxiliary gate lines50disposed near or at the ends of the second gate line14. The auxiliary gate lines44/46/48/50are used to keep currents only flow through the doping region40in the subsequent measurement technique.

As shown inFIG. 1, a voltage terminal V1couples to the doping region40disposed around the front end32of the first gate line12. The voltage terminal V1also couples the first gate line12, the second gate line14, the first auxiliary gate line44, the second auxiliary gate line48, the third auxiliary gate line46, and the fourth auxiliary gate line50. Another voltage terminal V2couples only to the doping region40around the back end34of the first gate line12. Moreover, a current detecting terminal I1couples to the doping region40around the front end32of the first gate line12. Another current detecting terminal couples I2to the doping region40at the back end34of the first gate line12.

The above-mentioned coupling may be achieved by utilizing metal wires52or diffusion areas. The diffusion area includes the active area16, and the doping region40within the active area16.

The voltage terminals V1/V2and the current detecting terminals I1/I2may electrically connect to redistribution lines.

Please refer toFIG. 1again. A plurality of dummy gates54may be selectively formed parallel to the first gate line12and second gate line14for improving the exposure quality of the first gate line12and the second gate line14during the lithographic process. Moreover, a silicide alignment block56may be formed on the substrate10.

According to a preferred embodiment of the present invention, the test structure100is positioned on the scribe line, but not limited to such case. As shown inFIG. 4, the test structure100can be disposed on any region of the wafer10based on different requirements. Moreover, there can be other test structures provided on the wafer10. For example, the test structures200/300can be disposed on the wafer10together with the test structure100. Furthermore, the difference between the test structures100/200/300is that each test structure100/200/300has a different space S1/S2/S3between the first gate line12and the second gate line14, respectively.FIG. 5illustrates cross-sectional views of another test structure.FIG. 6illustrates cross-sectional views of yet another test structure. As shown inFIG. 2,FIG. 5andFIG. 6, the space S1of the test structure100is greater than the space S2of the test structure200, and the space S2of the test structure200is greater than the space S3of the test structure300. It is noteworthy that the first gate line12of each test structure100/200/300still have the same width W1, and the second gate line14of each test structure100/200/300also have the same width W2. The width W1is preferably equal to the width W2. Furthermore, the first spacer20of each test structure100/200/300have the same critical dimension C, and the second spacer22of each test structure100/200/300also have the same critical dimension C. However, the size of the doping region40/140/240between the opposing first spacer20and the second spacer22of each test structure100/200/300is different. More specially speaking, a width W3/W4/W5of the doping region40/140/240of each test structure100/200/300is different, and the width W3/W4/W5of the doping region40/140/240of each test structure100/200/300is proportional to the space S1/ S2/ S3of each test structure100/200/300. However, a length of the doping region40/140/240of each test structure100/200/300is substantially identical to each other, and a concentration of dopants in each doping region40/140/240is also substantially identical to each other. Other elements in the test structure200/300are disposed at the same position with the same size as the elements in the test structure100. Please refer toFIG. 1andFIG. 2for reference, the accompanying description is therefore omitted here.

The following description will illustrate a measurement technique practiced by the test structure introduced above.FIGS. 1 to 8respectively illustrate a method of measuring a critical dimension of a spacer according to a preferred embodiment of the present invention. As shown inFIG. 4, first, a plurality of test structures100/200/300are provided on the wafer10. The detail structures of the test structures100/200/300are described in the above paragraphs and an accompanying explanation is therefore omitted. The number of the test structures can be adjusted depended on different requirements. Please refer toFIG. 1toFIG. 6, latter, a voltage difference is applied to the voltage terminal V1, and the voltage terminal V2of each test structure100/200/300, so the doping region40/140/240of each test structure100/200/300undergoes the voltage difference V. Then, current flows through each doping region40/140/240of each test structure100/200/300is measured by detecting the current detecting terminal I1and the current detecting terminal I2of each test structure100/200/300to get several current values corresponding to each doping region40/140/240. Because the sizes of the doping regions40/140/240are different, different doping regions40/140/240will have its specific current flows through it. After that, a reciprocal of resistance of each doping region can be calculated by the following formula:

Then, as showing inFIG. 7, a plot of reciprocal of resistance versus space of test structure is provided based on the reciprocal of resistance of each doping region40/140/240, and the space S1/S2/S3of each test structure100/200/300. For example, as shown inFIG. 7, a dot X represents the reciprocal of resistance1/R1of the doping region40and the corresponding space S1of the test structure100. A dot Y represents the reciprocal of resistance1/R2of the doping region140and the corresponding space S2of the test structure200. A dot Z represents the reciprocal of resistance1/R3of the doping region240and the corresponding space S3the test structure300. There may be more dots if more test structures are tested.

After that, a correlation F can be formed by making regression based on the dots X/Y/ Z on the plot. Thereafter, extrapolating the correlation F back to 0 unit of reciprocal of resistance to get an intersection point with the axis of space of test structure. The intersection point E corresponds to the space S4on the axis of the space of test structure. The space S4equals to two times of the critical dimension C of the first spacer20shown inFIG. 2. Then, the critical dimension C of the first spacer20can be calculated by dividing the space S4by 2.

The following paragraphs explain reasons why the critical dimension C of the first spacer20can be calculated by dividing the space S4by2.FIG. 8illustrates a cross-sectional view of a test structure having smallest space. As shown inFIG. 8, when the first gate line12and the second gate line14has a space S4, which is the smallest space, between them, it means that the first gate line12and the second gate line14can not be any closer to each other. At this point, the first spacer20and the second spacer22contact each other, and a width of a doping region (not shown) between the first gate line12and the second gate line14inFIG. 8is substantially0. In other words, there is no doping region between the first gate line12and the second gate line14in this situation. Because there is no doping region between first gate line12and the second gate line14, the current value will be extremely small when applying the voltage difference to the voltage terminal V1, and the voltage terminal V2.Therefore, it can be calculated that the reciprocal of resistance of the doping region inFIG. 8is approximate to 0 based on the above mentioned formula.

Now it can be concluded that when the reciprocal of resistance is 0, the first spacer20and the second spacer22contact each other, and the first gate line12and the second gate line14has a space S4.

Please still refer toFIG. 8. The space S4is equal to the addition of the critical dimension C of the first spacer20and the critical dimension C of the second spacer22. As the first spacer20and the second spacer22has the same critical dimension C, the space S4equals to two times of the critical dimension C of first spacers20. Finally, the critical dimension C of the first spacer20can be calculated by dividing the space S4by2.

According to the teaching of the present invention, by utilizing the test structures disclosed in the present invention, a critical dimension of a spacer can be calculated by measuring the current flowing through the doping region of each test structure.