Capacitor charge sharing charge pump

A multiphase charge pump including first and second phase charge pump circuits. Each of the first and second phase charge pump circuits includes a bootstrap capacitor. The bootstrap capacitors are switchingly connected by an equalization circuit that periodically transfers charge from a discharging capacitor to a charging capacitor, thereby reducing the charge that must be externally supplied to charge the charging capacitor.

FIELD OF THE INVENTION

The present invention relates to a charge pump, and more particularly to a charge pump adapted to be included on an integrated circuit for converting a supplied voltage to a desired voltage.

BACKGROUND OF THE INVENTION

It is often useful to provide a voltage to a component on an integrated circuit chip that exceeds a voltage supplied to the chip. Elevated voltages are employed, for example, on DRAM integrated circuits for boosted wordline voltages and negative substrate bias voltages, and for writing and erasing EEPROMS. By generating requisite elevated voltages on the integrated circuit itself, the need for one or more external power supplies is eliminated.

On an integrated circuit, inductors are more difficult to implement than capacitors. Thus, where various voltages are needed on an integrated circuit, it is advantageous to use a capacitive charge pump capable of transforming voltage without the use of inductors.

Two important parameters of charge pump operation are capacity and efficiency. Capacity is a measure of how much current a pump can continuously supply. Capacity is determined in part by the size of a bootstrap capacitor and operating frequency. Efficiency is a measure of how much charge, or current, is wasted during each pump cycle. A typical prior art integrated circuit charge pump is 30-50% efficient. This translates into a loss of 2-3 milliamps of supply current for every milliamp of pump output current.

FIG. 1shows a conventional single-phase charge pump10adapted to receive a first voltage Vcc12as an input and provide a second higher voltage as an output. The single phase charge pump includes an inverter14having an input16adapted to receive an oscillating signal. Also included is a bootstrap capacitor20having a driving side22and a driven side24. The inverter is adapted to connect the driving side22of capacitor20alternately between VCC12and ground30. The driven side24of the bootstrap capacitor is operatively connected through a first diode34to a source of supply voltage Vcc12, and through a second diode36to a load38. The load38is operatively connected between the second diode36and ground30.

Assuming ideal components, the circuit ofFIG. 1operates as follows: at a first time, an input signal applied at input16of the inverter14is high, causing the inverter to connect the driving side22of capacitor20to ground30. Responsively, current flows through the first diode34, transporting electrical charge from the source of supply voltage Vcc12to the driven side24of the bootstrap capacitor20. As charge accumulates on the driven side24of the bootstrap capacitor20, voltage Vcc12develops across the capacitor. At a later time, the signal at the input16of the inverter14goes low. This connects the driving side22of the capacitor20to the source of supply voltage Vcc12. Charge flows into the driving side22of the capacitor20, and the voltage on the driven side24of the capacitor rises to 2 Vcc with respect to ground in response. Current flows through the second diode36to apply a voltage of 2 Vcc to an input40of the load38. After the voltage on the driving side of the bootstrap capacitor has risen to Vcc, the signal at the input16of inverter14transitions again causing the voltage on the driving side22of capacitor20to go to ground. The charge pump cycle is then complete. With repeated cycles, a pulsed voltage of more or less 2 Vcc can be maintained across the load.

As actually constructed, the single-phase charge pump circuit ofFIG. 1is relatively inefficient, and it produces an output voltage that varies significantly with time. Also, for non-ideal components, the output voltage is limited to two times Vcc less at least two diode threshold voltage drops (2 Vt). Accordingly, various improvements have been made to improve charge pump performance as shown for example in U.S. Pat. No. 6,294,948, the disclosure of which is incorporated herein by reference. Circuitry has been developed to bring output voltage up to two times Vcc or higher. It is also known to mutually connect the outputs of two single-phase charge pump circuits, operated out of phase with one another, to reduce ripple and achieve a more constant output voltage. Nonetheless, it is desirable to provide an improved charge pump circuit, and in particular a charge pump circuit which is more efficient than previous designs.

BRIEF SUMMARY OF THE INVENTION

The present invention includes a multiphase charge pump in which charge is shared between the respective driving sides of respective first and second bootstrap capacitors of a first phase circuit and a second phase circuit, to improve operating efficiency and lower current requirements.

According to the present invention, a charge pump is provided including a first phase circuit having a first bootstrap capacitor, a second phase circuit having a second bootstrap capacitor, and an equalization circuit adapted to transfer charge between the first bootstrap capacitor and the second bootstrap capacitor. The equalization circuit is operated according to a control signal such as a timing signal. The control signal causes a transfer of charge in a manner which reduces the requirement for input current supplied by an attached power supply, and also reduces waste current. In particular, when the driving side plate of the first capacitor is at ground potential, and the driving side plate of the second capacitor is at elevated potential, the equalization circuit is switched between the two driving sides prior to connection of the first (ground potential) capacitor to Vcc12and prior to connection of the second (elevated potential) capacitor to ground. In this manner, charge that would have been dumped to ground from the second capacitor, and wasted, is conducted to the first capacitor, which is due to be charged. The complementary operation occurs when the driving side of the second capacitor is at ground potential and the driving side of the first capacitor is at elevated potential. This reduces current sinking and power supply requirements, and improves charge pump efficiency.

These and other aspects and features of the invention will be more clearly understood from the following detailed description which is provided in conjunction with the accompanying drawings.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 2shows a two-phase charge pump80according to one aspect of the invention. A first phase circuit82of the charge pump80includes a first bootstrap capacitor84having first86and second88terminals. The first terminal86of the first capacitor84is connected to an output90of a first driver circuit92. The first driver circuit92includes first94and second96complementary transistors operatively connected in series between ground30and Vcc12. The output90of the first driver92is at a mutual connection of the first94and second96transistors. The first94and second96transistors have respective first100and second102gates. The gates100,102are connected to respective sources of respective driving signals158,159. The second terminal88of the first capacitor84is connected through a diode-connected third transistor104to Vcc12. A fourth diode-connected transistor114is operatively connected between the second terminal88of the first capacitor84and a load circuit38.

A second phase circuit120of the charge pump80includes a second bootstrap capacitor122having third124and fourth126terminals. The third terminal124of the second capacitor122is connected to an output128of a second driver circuit130. The second driver circuit130includes fifth132and sixth134complementary transistors operatively connected in series between Vcc12and ground30. The output128of the second driver130is at a mutual connection of the fifth132and sixth134transistors. The fifth132and sixth134transistors have respective third136and fourth138gates. The gates136,138are connected to respective sources of respective driving signals160,161. The fourth terminal126of the second capacitor122is connected through a diode-connected seventh transistor140to Vcc12. An eighth diode-connected transistor142is operatively connected between the fourth terminal126of the second capacitor122and the load circuit38. Accordingly, the respective sources of the fourth114and eighth142diode-connected transistors are mutually connected. A ninth transistor144is operatively connected between the respective outputs (90,128) of the first92and second130drivers. The ninth transistor includes a fifth gate146adapted to receive an equalization signal148.

In conjunction withFIG. 2,FIG. 3illustrates the operation of the circuit of FIG.2.FIG. 3graphs the control signals that control the circuit ofFIG. 2, and the resulting voltages on the bootstrap capacitors. The control signals are configured to cyclically raise and lower the electrical potential of the driving side of each bootstrap capacitor. The voltages on the capacitors84,122are 180 degrees out of phase with one another, as shown by signals163,164respectively. Signals158,159,160, and161drive gates100,102,136, and138respectively. Signal148drives gate146of the equalization transistor144. Signals163and164show the variation with time of the electrical potentials on the respective driving sides86,124of the first84and second122bootstrap capacitors.

Assuming ideal components, the circuit ofFIG. 2operates as follows. At an initial time t0the first transistor94is conductive in response to an applied high first gate signal158and the second transistor and96is non-conductive in response to an applied high second signal159so that the output90of the first driver92is at ground potential30. In addition, the sixth transistor132is non-conductive in response to an applied low third signal160which is the inverse of the second signal159and the seventh transistor134is conductive in response to a low fourth signal161which is the inverse of the first signal158so that the output128of the second driver130is at Vcc12. In response, charge flows from Vcc12through diode connected transistor104to the driven side88of the first bootstrap capacitor84to set the driven side88of capacitor84to Vcc12. Simultaneously, charge flows from Vcc12through the seventh transistor134and is stored on the driving side124of the second bootstrap capacitor122. At a particular transition time t1, the timing circuit sets signal158low and signal161high. As a result, first94, second96, sixth132, and seventh134transistors are all non-conductive. At the same time, equalization signal148is applied to the gate146of the equalization transistor144causing the equalization transistor144to become conductive. This connects the driving side124of the second bootstrap capacitor122to the driving side86of the first bootstrap capacitor84. Consequently, charge (and energy) flows from the second bootstrap capacitor122to the first bootstrap capacitor84through the equalization transistor144until the voltage on the two driving side terminals124,86, of the two bootstrap capacitors122,84respectively, has equalized. Thereafter, at time t2, signal148transitions, the equalization transistor144is made non-conductive, and the second96and sixth132transistors are made conductive by the timing signals159and160respectively. Accordingly charge flows from Vcc12through the second transistor96to the driving side86of the first bootstrap capacitor84. This causes the potential of the driven side88of the first bootstrap capacitor84to rise to approximately 2 Vcc. At the same time, signal160turns on transistor132bringing the potential of the driving side124of capacitor122to ground. Current flows responsively through diode connected transistor140from VCC12to the driven side126of the second bootstrap capacitor122, charging that capacitor to a potential of VCC12. Thereafter, at time t3signals159and160again transition, making transistors96and132nonconductive. Simultaneously, signal148transitions making the equalization transistor144conductive, and allowing charge to flow from the driving side86of the first bootstrap capacitor84to the driving side124of the second bootstrap capacitor122. As shown in respective signals163and164, the charges on the two capacitors vary accordingly until the potential of the two driving sides86,124is substantially equal. Then, at time t4signals148,158and161transition. This turns off the equalization transistor144, and turns on transistors94and134respectively. Consequently, the respective outputs90,128of drivers92,130go to ground and VCC respectively. With the turning on of transistor134, the driving side124of the second bootstrap capacitor122is elevated to VCC12, and the driven side126of capacitor122, previously at VCC12, is raised to 2 VCC. This voltage (2 Vcc) is applied to the load38by way of diode connected transistor142, supplementing in counter-phase, the previous application of voltage by the first phase circuit82. At time t5the entire cycle begins again as signals148,161and158again toggle, turning on the equalization transistor144and turning off transistors134and94respectively. This cycle is repeated continuously in order to provide a more or less steady supply of current through transistors114and142to the load38.

As noted, the operation of the two-phase charge pump described above was presented as if the circuit were prepared using ideal components. An embodiment of the same circuit using non-ideal components would yield an output voltage across the load of less than two times the input voltage due to, among other things, the diode drop (of one threshold voltage Vth) across the diode connected transistors114and142.

A circuit that overcomes this limitation and outputs a voltage equal to two times input voltage or more can be produced by using a respective ancillary charge pump circuit as part of each charge pump phase circuit.

A four phase charge pump circuit which utilizes an ancillary charge pump circuit and charge sharing among the bootstrap capacitors is shown inFIGS. 4A and 4B. Equalization circuits for equalizing capacitor charge are labeled A-F, and shown as block elements onFIGS. 4A and 4B. These same circuits, correspondingly labeled A-F, are shown in further detail in FIG.5.

Four charge pump phase circuits are shown in FIGS.4A and4B: a first phase circuit202, a second phase circuit204, a third phase circuit206, and a fourth phase circuit208. In the first phase charge pump circuit202, a first bootstrap capacitor210includes first212(driving side) and second214(driven side) terminals. In the same fashion described above with respect to the two phase charge pump, the bootstrap capacitor210is driven on its driving side212by a driver circuit218. During discharge, capacitor210transfers charge through an equalization circuit B300to a bootstrap capacitor250of phase circuit206. The illustrated embodiment includes an ancillary pump circuit229associated with the first phase charge pump circuit202. This ancillary pump circuit229includes a first ancillary capacitor231having third232(driving side) and fourth234(driven side) terminals. The third terminal232is operatively connected to an output236of a second driver circuit238. As would be understood by one of skill in the art, the ancillary pump circuit229serves to elevate the output voltage supplied to a load38by applying an elevated voltage to a gate230of an output transistor228. During operation, the voltage on the driven side214of bootstrap capacitor210rises above VCC12. In response, current flows through diode connected transistor239, and charges the driven side234of ancillary capacitor231to a voltage above VCC. Thereafter, the driving side232of ancillary capacitor231is raised from ground potential to VCC12. The result is that the voltage applied to the gate230of the output transistor228is high enough to allow the full voltage on the driven side214of bootstrap capacitor210to reach the input of the load38. The first ancillary capacitor231also serves to supply additional charge to the load38by transferring charge through transistor290to the driven side214of capacitor210when the voltage thereon falls below a design threshold.

The circuitry of the first phase circuit202is duplicated in the second204, third206, and fourth208phase circuits and the operation of these additional phase circuits is the same as that of circuits202and229as would be clear to one of skill in the art in light of the description provided above. The outputs of each of the four phase circuits202,204,206,208are mutually connected at an output node VP2. In each phase circuit, a primary charge pump with a primary bootstrap capacitor is supplemented by an ancillary charge pump with an ancillary bootstrap capacitor. The respective ancillary charge pump serves to provide an elevated voltage to a gate of an output transistor of the primary charge pump, and to supply charge to the output of the primary charge pump via a pair of bridge transistors once the voltage on the driven side of the respective primary bootstrap capacitor begins to fall. According to one aspect of the invention, as shown, charge is shared between bootstrap capacitors231and286through an equalization circuit D301, between capacitors231and280through an equalization circuit C303, between capacitors280and260through an equalization circuit E305, between capacitors260and286through an equalization circuit F307, and between capacitors287and291through an equalization circuit A309.

As shown inFIG. 5, each of the equalization circuits A-F includes a logic gate304, an inverter306, and a transistor308. The logic gate receives a plurality of control signals at a respective plurality of inputs, and switches the equalization transistor on and off accordingly.

FIG. 6shows circuitry, adapted to receive an input periodic clock signal402(osc) and generate a plurality of output signals. The output signals are adapted to control a four-phase charge pump as illustrated inFIGS. 4A,4B and5. In a first portion400, the circuitry receives a clock signal402(osc) at a clock input410of a first flip-flop412. The first flip-flop outputs a first signal C0that is inverted to form C0_ and fed back into an input416of the first flip-flop. The C0_ signal is also used to control a second flip-flop418via a Nor gate420. The second flip-flop produces a C1signal that is inverted to form C1_. C0_ and C1_ are combined through a Nor gate422with osc402to control a third flip-flop424. In similar fashion, the output of the third flip-flop424is inverted and combined with C0_ C1_ and osc402to control a fourth flip-flop426. As a result, four signals C0_ through C3_ of progressively longer period are generated.

Of the eight signals thus generated, C0, C1, C2, C3, C0_, C1_, and C2_ are applied to combinational logic430, as illustrated, to produce eight control signals A0P, A2N, A0N, A2P, A1P, A3N, A1N, and A3P that control the respective drivers driving the four respective bootstrap capacitors210,287,250, and291as shown inFIGS. 4A and 4B.

Together, the timing circuit400and the two combinational logic circuit portions430and440serve to operate the four phase circuits, including ancillary circuits, of the charge pump ofFIGS. 4A and 4Bsuch that the potentials on the bootstrap capacitors, as seen at the mutual VP2of the four phase circuits, are at respective phase angles of 0, 90, 180, and 270 degrees.

It is understood that other charge pump phase circuits, could also be designed using the equalization charge sharing techniques described herein. More generally, while preferred embodiments of the invention have been described and illustrated above, it should be understood that these are exemplary of the invention and are not to be considered as limiting. Additions, deletions, substitutions, and other modifications can be made without departing from the spirit or scope of the invention. Accordingly, the invention is not to be considered as limited by the foregoing description but is only limited by the scope of the appended claims.