Receiver for compensating I/Q mismatch, compensation device, compensation module and compensation parameter calculating module

A receiver for compensating I/Q mismatch includes an analog down-conversion unit for receiving a radio frequency signal and down-converting the RF signal into a set of digital low intermediate frequency (IF) signals, a digital down-conversion unit receiving the set of digital low IF signals and down-converting the set of digital low IF signals into first and second baseband signals, and a compensation unit. The compensation unit receives the first and second baseband signals, calculates a compensation parameter based thereon, and compensates I/Q mismatch effect according to the first and second baseband signals and the compensation parameter so as to output a target signal.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority of Taiwanese Application No. 100105780, filed on Feb. 22, 2011.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a low intermediate frequency receiver, a compensation device, a compensation module and a compensation parameter calculating module, more particularly to a receiver, a compensation device, a compensation module and a compensation parameter calculating module for compensating I/Q mismatch.

2. Description of the Related Art

I/Q mismatch includes characteristics of gain mismatch and phase imbalance. Referring toFIG. 1andFIG. 2, a waveform plot of a radio frequency (RF) signal, which is received by a conventional low intermediate frequency (IF) receiver, includes a target signal91and an interference signal92. The RF signal shown inFIG. 1is down-converted from a RF band into a low IF signal90shown inFIG. 2, wherein, the low IF signal90includes a positive frequency low IF signal having a frequency of fIF, and a negative frequency low IF signal having a frequency of −fIF. Owing to influence resulting from I/Q mismatch, the target signal91may mix with the interference signal92during down-conversion processing such that the target signal91is vulnerable to interference.

In a conventional technology, after a RF mixer down-converts the RF signal, a polyphase filter is usually used for lowering power of the negative frequency low IF signal to be substantially equal to power of the positive frequency low IF signal, and providing signals filtered by the polyphase filter to analog-to-digital converters (ADC) in two I/Q paths. In this way, bit numbers required for performing subsequent analog-to-digital conversion may be reduced.

For solving a problem that the target signal91is interfered resulting from I/Q mismatch effect, a prior art for compensating I/Q mismatch effect is disclosed in “Adaptive self-calibrating image rejection receiver” published in International Conference on Communications (ICC) by Ediz Cetin et al., 2004. However, this prior art compensates I/Q mismatch effect by means of a digital image rejection processor (DIRP), and therefore the positive frequency low IF signal and the negative frequency low IF signal resulting from down-conversion processing of the RF signal must have symmetric characteristics. In other words, a scheme of the prior art is only suitable for a receiver including a low-pass filter (LPF) but not a receiver including a polyphase filter.

Another prior art is disclosed in “I/Q Mismatch Compensation Using Adaptive Decorrelation in a Low-IF Receiver in 90-nm CMOS Process” published in IEEE journal of Solid-State Circuits (JSSC) by Imtinan Elahi et al., 2006. This prior art achieves an object of compensating I/Q mismatch effect by means of a complex multiplier. However, similar to the prior art disclosed by Ediz Cetin et al., the positive frequency low IF signal and the negative frequency low IF signal must have the symmetric characteristics. Thus, a scheme of this prior art may not be applicable to the receiver including the polyphase filter.

A compensating technology for I/Q mismatch effect applicable to a polyphase filter scheme is disclosed in U.S. Pat. No. 6,892,060. However, this technology compensates I/Q mismatch effect in an analog manner after down-conversion, and therefore an analog multiplier is required. Nevertheless, accuracy of the analog multiplier has inferior performance compared with that of a digital multiplier, and controllability thereof is not as convenient as utilizing a digital multiplier, such that a higher design cost of the low IF receiver is incurred.

SUMMARY OF THE INVENTION

Therefore, in a first aspect of the present invention, a receiver is provided that is capable of compensating I/Q mismatch, that is adapted for receiving a radio frequency (RF) signal, and that comprises:

an analog down-conversion unit for receiving the RF signal, down-converting the RF signal into a set of analog low IF signals, and converting the set of analog low IF signals into a set of digital low IF signals;

a digital down-conversion unit coupled to the analog down-conversion unit for receiving the set of digital low IF signals, down-converting the set of digital low IF signals into a set of digital low frequency (LF) signals, and converting the set of digital LF signals into a first baseband signal and a second baseband signal, respectively; and

a compensation unit coupled to the digital down-conversion unit, and including:a time domain-frequency domain transforming module receiving the first and second baseband signals, and transforming each of the first and second baseband signals into a respective one of a first frequency domain baseband signal and a second frequency domain baseband signal;a compensation parameter calculating module receiving the first and second frequency domain baseband signals and calculating a compensation parameter based thereon; anda compensation module receiving the first and second baseband signals and the compensation parameter, calculating a product of the second baseband signal and the compensation parameter, and outputting a target signal according to a difference between the first baseband signal and the product calculated thereby.

Furthermore, in a second aspect of the present invention, a compensation device for a low IF receiver is provided. The compensation device is for receiving a first baseband signal and a second baseband signal resulting from down-conversion processing of an RF signal. The compensation device comprises:

a time domain-frequency domain transforming module for receiving the first and second baseband signals, and transforming each of the first and second baseband signals into a respective one of a first frequency domain baseband signal and a second frequency domain baseband signal;

a compensation parameter calculating module receiving the first and second frequency domain baseband signals and calculating a compensation parameter based thereon; and

a compensation module receiving the first and second baseband signals and the compensation parameter, calculating a product of the second baseband signal and the compensation parameter, and outputting a target signal according to a difference between the first baseband signal and the product calculated thereby.

Moreover, in a third aspect of the present invention, a compensation module is provided. The compensation module is for receiving a first baseband signal, a second baseband signal and a compensation parameter. The first baseband signal and the second baseband signal resulted from down-conversion processing of an RF signal. The compensation module comprises:

a multiplier calculating a product of the second baseband signal and the compensation parameter; and

a subtractor receiving the product calculated by the multiplier and calculating a difference between the first baseband signal and the product.

Additionally, in a fourth aspect of the present invention, a compensation parameter calculating module is provided. The compensation parameter calculating module is for receiving a first frequency domain baseband signal and a second frequency domain baseband signal resulting from down-conversion processing of an RF signal. The compensation parameter calculating module comprises:

a first multiplier calculating a first product of the second frequency domain baseband signal and a training parameter;

an error processor calculating a difference value between the first frequency domain baseband signal and the first product, and determining whether the difference value is smaller than a threshold value; and

a training parameter generator calculating an updated value of the training parameter according to the difference value and a conjugate of the second frequency domain baseband signal.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

Referring toFIG. 3, a preferred embodiment of a receiver for compensating I/Q mismatch according to the present invention is illustrated. This preferred embodiment includes an analog down-conversion unit11, a digital down-conversion unit12and a compensation unit13.

The analog down-conversion unit11includes an analog RF mixer module111, an analog filter module112and an analog-to-digital converter module113. The analog RF mixer module111receives a radio frequency (RF) signal and down-converts the RF signal into a set of analog low intermediate (IF) signals. The set of analog low IF signals includes an in-phase analog low IF signal AI1and a quadrature analog low IF signal AQ1. The analog filter module112receives the set of analog low IF signals, generates a set of adjusted analog low IF signals through lowering power of the negative frequency component of low IF complex signal AI1+j*AQ1at a frequency of −fIFto be substantially much lower than power of the positive frequency component of analog low IF complex signal AI1+j*AQ1at a frequency of fIF, and transmits the set of adjusted analog low IF signals to the analog-to-digital converter module113. The analog-to-digital converter module113converts the set of adjusted analog low IF signals into a set of digital low IF signals including an in-phase digital low IF signal DI1and a quadrature digital low IF signal DQ1.

The analog filter module112includes two first filters1121each receiving a respective one of the in-phase analog low IF signal AI1and the quadrature analog low IF signal AQ1, and each outputting a corresponding one of a filtered in-phase analog low IF signal AI2and a filtered quadrature analog low IF signal AQ2. That is, the set of adjusted analog low IF signals includes the filtered in-phase analog low IF signal AI2and the filtered quadrature analog low IF signal AQ2. The analog-to-digital converter module113includes two analog-to-digital converters1131each converting a respective one of the filtered in-phase analog low IF signal AI2and the filtered quadrature analog low IF signal AQ2into a corresponding one of the in-phase digital low IF signal DI1and the quadrature digital low IF signal DQ1.

The digital down-conversion unit12includes a digital down-conversion mixer module121and a digital filter module122. The digital down-conversion mixer module121receives the set of digital low IF signals, down-converts the set of digital low IF signals into a set of digital low frequency (LF) signals, and transmits the set of digital LF signals to the digital filter module122. The set of digital LF signals includes a positive frequency digital LF signal DI2and a negative frequency digital LF signal DQ2. The digital filter module122receives the set of digital LF signals and converts the set of digital LF signals into a set of baseband signals. The set of baseband signals includes a first baseband complex signal r1and a second baseband complex signal r2.

In this embodiment, the digital down-conversion mixer module121receives the in-phase digital low IF signal DI1and the quadrature digital low IF signal DQ1, and outputs the positive frequency digital LF signal DI2and the negative frequency digital LF signal DQ2resulting from down-conversion processing. The digital filter module122includes two second filters1221each receiving a respective one of the positive frequency digital LF signal DI2and the negative frequency digital LF signal DQ2, and each outputting a corresponding one of the first baseband signal r1and the second baseband signal r2.

The compensation unit13is coupled to the digital down-conversion unit12, and includes a time domain-frequency domain transforming module131, a compensation parameter calculating module132and a compensation module133. The time domain-frequency domain transforming module131receives the first baseband signal r1and the second baseband signal r2, and transforms each of the first and second baseband signals r1, r2into a respective one of a first frequency domain baseband signal FFTr1and a second frequency domain baseband signal FFTr2. The compensation parameter calculating module132receives the first frequency domain baseband signal FFTr1and the second frequency domain baseband signal FFTr2, and calculates a compensation parameter w based thereon. Preferably, the time domain-frequency domain transforming module131is a fast Fourier transformer (FFT). Preferably, a one-point FFT is adopted for realizing the time domain-frequency domain transforming module131so as to reduce an overall size of the preferred embodiment and to cut down costs.

Referring toFIG. 4, an embodiment of the compensation parameter calculating module132is shown. The compensation parameter calculating module132includes a first multiplier1321, an error processor1322and a training parameter generator1323. The training parameter generator1323includes a second multiplier1324, a third multiplier1325, an adder1326and a delayer1327. The compensation parameter calculating module132further includes a conjugate calculator1328, in which the conjugate calculator1328calculates a conjugate of the second frequency domain baseband signal FFTr2*. In other configurations of this embodiment, the conjugate calculator1328may alternatively be disposed in the time domain-frequency domain transforming module131such that the first frequency domain baseband signal FFTr1, the second frequency domain baseband signal FFTr2, and a conjugate of the second frequency domain baseband signal FFTr2* are all provided by the time domain-frequency domain transforming module131.

The first multiplier1321calculates a first product M1of the second frequency domain baseband signal FFTr2and a training parameter W(K), and outputs the first product M1to the error processor1322. The error processor1322calculates a difference value e(k) between the first frequency domain baseband signal FFTr1and the first product M1. The second multiplier1324receives the difference value e(k), and calculates a second product M2of the conjugate of the second frequency domain baseband signal FFTr2* and the difference value e(k) calculated by the error processor1322. The third multiplier1325calculates a third product M3of the second product M2and a preset constant u1. The adder1326calculates an updated value of the training parameter W(K) as the sum of the third product M3and a current value of the training parameter W(K−1) which results from delaying the updated value of the training parameter W(K) by the delayer1327. Subsequently, the first multiplier1321once again calculates an updated value of the first product M1of the second frequency domain baseband signal FFTr2and the updated value of the training parameter W(K). The error processor1322calculates an updated value of the difference value e(k) between the first frequency domain baseband signal FFTr1and the updated value of the first product M1. The updated value of the training parameter W(K) serves as the compensation parameter w when the error processor1322determines that the updated value of the difference value e(k) is smaller than a threshold value. Otherwise, the aforementioned procedures are repeated so as to update the training parameter W(K) and the difference value e(k) when the error processor1322determines that the updated value of the difference value e(k) is larger than the threshold value.

It should be noted that the compensation parameter calculating module132may alternatively be realized through computer program processing so as to calculate the compensation parameter w by means of least mean squares (LMS) algorithm or sign-sign algorithm. The aforementioned illustration is merely one embodiment of the compensation parameter calculating module132, and the invention is not limited to the disclosure of this embodiment.

Referring toFIG. 5, an embodiment of the compensation module133is illustrated. The compensation module133receives the first baseband signal r1, the second baseband signal r2and the compensation parameter w, and calculates a target signal c1through the following steps:

The compensation module133includes a fourth multiplier1331and a subtractor1332. The fourth multiplier1331calculates a product of the second baseband signal r2and the compensation parameter w, and transmits the product to the subtractor1332. The subtractor1332calculates the difference between the first baseband signal r1and the product received from the fourth multiplier1331so as to obtain the target signal c1which is not influenced by interference signals. The target signal c1satisfies:
c1=r1−r2*w(F.1)

In the preferred embodiment, the compensation module133is not designed in a symmetric style. Therefore, each of the first filters1121of the analog filter module112of the preferred embodiment may have the freedom of adopting one of a low-pass filter scheme and a polyphase filter scheme. Furthermore, the compensation module133may alternatively be realized through computer program processing so as to compensate I/Q mismatch and calculate the target signal c1according to the aforementioned equation (F.1). The aforementioned illustration is merely one embodiment of the compensation module133, and the invention is not limited to the disclosure of this embodiment. Preferably, a single tone pulse having a frequency between an RF frequency fRFand an IM frequency fIFis adopted as the RF signal, wherein when the single tone pulse is down-converted into the IM, the frequency thereof is at −fIF.

In summary, since the receiver of the present invention may effectively compensate I/Q mismatch effect in a digital way, design cost thereof may be effectively reduced compared with that of the prior art. In the meantime, since the first baseband signal r1and the second baseband signal r2received by the compensation module133of the present invention may not necessarily have the symmetric characteristic, the first filters1121in the analog filter module112may be realized using polyphase filters. Therefore, compared with the prior art, the present invention may not only compensate I/Q mismatch effect but may also effectively reduce the bit numbers required for analog-to-digital conversion so as to significantly cut down design cost.