Semiconductor device and method for manufacturing the same

A semiconductor device (1) of the present invention includes a semiconductor element (103) including electrode parts (104), and a wiring substrate (108) including an insulation layer (101), electrode-part-connection electrodes (102) provided in the insulation layer (101), and external electrodes (107) that is provided in the insulation layer (101) and that is connected electrically with the electrode-part-connection electrodes (102), in which the electrode parts (104) and the electrode-part-connection electrodes (102) are connected electrically with each other. The insulation layer (101) has an elastic modulus measured according to JIS K6911 of not less than 0.1 GP a and not more than 5 GPa, and the electrodes (104) and the electrode-part-connection electrodes (102) are connected by metal joint.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to semiconductor devices for use in various kinds of electric apparatuses and electronic apparatuses and a method for manufacturing the same.

2. Description of the Related Art

In recent years, the functions of semiconductor elements have been enhanced, and the size and the number of electrodes of each semiconductor element have been increased remarkably. On the other hand, with the demands for downsizing of electronic apparatuses, the request for downsizing semiconductor devices including semiconductor elements has been raised. Therefore, the type of packages of semiconductor devices has been changed from the quad flat package (QFP) type configured so that external electrodes are arranged in a periphery of a package, to the ball grid array (BGA) type configured so that external electrodes are arranged in an area array style on a lower face of a package, and the chip scale package (CSP) type.

FIG. 19illustrates an example of a semiconductor device of the CSP type. As shown inFIG. 19, a semiconductor element1000including electrode parts (not shown), and a wiring substrate1003including electrodes1002for connection with the electrode parts (hereinafter referred to as electrode-part-connection electrodes) are connected electrically via bumps1001, and the area in which they are connected (hereinafter referred to as connection portion) is encapsulated with a resin forming a resin layer1004. The resin layer1004homogeneously disperses stresses occurring due to a difference between the thermal expansion of the semiconductor element1000and that of the wiring substrate1003, thereby preventing the connection portion between the electrode parts and the electrode-part-connection electrodes1002from being damaged. External electrodes1005are provided on a face of the wiring substrate1003opposite to the semiconductor element side face thereof.

A semiconductor device in which electrode parts of a semiconductor element and electrode-part-connection electrodes of a wiring substrate are connected by metal joint via bumps has been disclosed already (see, for instance, in JP 9(1997)-181119 A, and JP 2002-151551 A).

Further, in recent years, a so-called wafer level packaging technology, whereby a plurality of semiconductor elements are packaged together at a wafer level, has been proposed.FIG. 20shows an example of a semiconductor device manufactured by the wafer level packaging technology. As shown inFIG. 20, a semiconductor element2000includes an electronic circuit and electrode pads that are formed on a semiconductor substrate, and bumps2001are formed on the electrode pads. The bumps2001, except for ends thereof, are encapsulated with a resin layer2002, and the ends of the bumps2001function as external electrodes. The resin layer2002functions in the same manner as the resin layer1004of the semiconductor device shown inFIG. 19does (see, for instance, JP 10(1998)-79362 A).

However, the conventional semiconductor devices shown inFIGS. 19 and 20have the following problems. The reduction of stresses by the resin layer1004or2002cannot be regarded as sufficient, and when reliability such as resistance against thermal shock is evaluated, for instance, the resin layers1004and2002are prone to the cracking. Further, since the bumps1001or2001are formed and the connection portion between the semiconductor element and the wiring substrate is encapsulated with the resin layer1004or2002, the manufacturing cost and the number of steps in the manufacturing process increase. Still further, the semiconductor devices shown inFIGS. 19 and 20both include bumps1001and2001, respectively, and such a configuration hinders the reduction of the thickness of the semiconductor device.

SUMMARY OF THE INVENTION

A semiconductor device of the present invention includes a semiconductor element including an electrode part, and a wiring substrate including an insulation layer, an electrode-part-connection electrode provided in the insulation layer, and an external electrode that is provided in the insulation layer and that is connected electrically with the electrode-part-connection electrode. The electrode part and the electrode-part-connection electrode are connected electrically with each other. In the semiconductor device, the insulation layer has an elastic modulus of not less than 0.1 GPa and not more than 5 GPa, and the electrode and the electrode-part-connection electrode are connected by metal bonding.

A method of the present invention for manufacturing a semiconductor device includes the step of superposing a mounting member and a semiconductor element including an electrode part, the mounting member including an insulation member made of a material containing a resin, an electrode-part-connection electrode provided in the insulation member, and an external electrode provided in the insulation member and connected electrically with the electrode-part-connection electrode, and bonding the electrode part and the electrode-part-connection electrode so that the mounting member and the semiconductor element are integrated. In the method, in the foregoing step, the electrode part is prepared so as to include a metal layer, the electrode-part-connection electrode is prepared so as to include a metal layer, and the metal layer of the electrode part and the metal layer of the electrode-part-connection electrode are connected by metal joint.

Another method of the present invention for manufacturing a semiconductor device includes the steps of (a) superposing a mounting member and a semiconductor element material including a plurality of semiconductor elements having electrode parts, the mounting member including an insulation member made of a material containing a resin, a plurality of sets of electrode-part-connection electrodes provided on a surface of the insulation member on one side thereof, and a plurality of sets of external electrodes provided on a surface of the insulation member on an opposite side thereof, in which the electrode-part-connection electrodes and the external electrodes are connected electrically with each other, and bonding the electrode parts and the electrode-part-connection electrodes, so that the mounting member and the semiconductor element material are integrated, and (b) cutting the semiconductor element material and the mounting member together so that the individual semiconductor elements are separated from one another. The step (b) is carried out after the step (a). In the method, in the step (a), the electrode parts are prepared so as to include metal layers, the electrode-part-connection electrodes are prepared so as to include metal layers, and the metal layers of the electrode parts and the metal layers of the electrode-part-connection electrodes are connected by metal joint.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

A semiconductor device of an embodiment of the present invention includes a semiconductor element including an electrode part, and a wiring substrate including an insulation layer, an electrode-part-connection electrode provided in the insulation layer, and an external electrode that is provided in the insulation layer and that is connected electrically with the electrode-part-connection electrode, and the electrode part and the electrode-part-connection electrode are connected electrically with each other. In the semiconductor device, the insulation layer has an elastic modulus of not less than 0.1 GPa and not more than 5 GPa, and the electrode and the electrode-part-connection electrode are connected by metal joint.

With the semiconductor device of the present embodiment, even if the electrode part and the electrode-part-connection electrode are connected directly by metal joint, not via bumps, the wiring substrate including the insulation layer with an elastic modulus of not less than 0.1 GPa and not more than 5 GPa enables the reduction of stresses occurring due to the thermal expansion difference between the semiconductor element and the wiring substrate. Therefore, connection reliability between the electrode part and the electrode-part-connection electrode can be maintained. Further, since the semiconductor device has a structure such that the electrode part and the electrode-part-connection electrode are bonded directly without a bump, the reduction of the thickness and the cost of the device can be achieved. Thus, with the present embodiment, a thin, low-cost, and highly reliable semiconductor device can be provided.

It should be noted that the metal joint herein indicates metal-metal solid phase diffusion bonding, or bonding by intermolecular force. As bonding principles, for instance, diffusion by heating (heating method), ultrasonic bonding, room temperature bonding, etc. are available. The bonding principles are described below, with reference to, for instance, a case where the electrode part and the electrode-part-connection electrode include metal layers made of at least one kind of metal selected from the group consisting of noble metals and solder alloys.

(1) Diffusion by Heating

By bringing metal layer of the electrode part and metal layer of the electrode-part-connection electrode into contact with each other and heating the same, metal atoms composing the metal layer of the electrode part and metal atoms of the metal layer of the electrode-part-connection electrode are diffused in to each other, and a bonding structure in which the electrode part and the electrode-part-connection electrode are connected by metal joint is obtained. A contamination layer present at interfaces between the metal layer of the electrode part and the metal layer of the electrode-part-connection electrode is decomposed and removed by the foregoing diffusion. In the case where the kind of metal atoms composing the metal layer of the electrode part and the kind of metal atoms composing the metal layer of the electrode-part-connection electrode are different from each other, an alloy layer is formed by the foregoing diffusion.

By bringing the metal layer of the electrode and the metal layer of the electrode-part-connection electrode into contact with each other and applying ultrasonic wave to them, a contamination layer present at interfaces between the metal layer of the electrode part and the metal layer of the electrode-part-connection electrode is decomposed finely by repetitive sliding and expansion. The decomposed contamination layer is taken into metallic crystals of each metal layer, whereby a bonding structure in which the electrode part and the electrode-part-connection electrode are connected by metal joint is obtained.

(3) Room Temperature Bonding

If the metal layer of the electrode part and the metal layer of the electrode-part-connection electrode are brought into contact with each other in a state in which surfaces of the metal layer of the electrode part and the metal layer of the electrode-part-connection electrode are cleaned (oxide films and contamination layers are removed), a bonding structure in which the metal layer of the electrode part and the metal layer of the electrode-part-connection electrode are bonded by the intermolecular force is obtained.

In the semiconductor device of the present embodiment, it is preferable that the semiconductor element includes a plurality of the electrode parts, and a surface of the wiring substrate on a semiconductor element side and a surface of the semiconductor element on a wiring substrate side are bonded with each other so that spaces between the electrode parts are filled with the insulation layer. With this configuration, stresses occurring due to a thermal expansion difference between the semiconductor element and the wiring substrate can be reduced more effectively, and a thinner semiconductor device can be provided.

In the semiconductor device of the present embodiment, it is preferable that a surface of the wiring substrate crossing a thickness direction of the semiconductor device perpendicularly is larger than a surface of the semiconductor element crossing the thickness direction of the semiconductor device perpendicularly. In the semiconductor device of a wafer level package structure, a region where lines for connecting the electrode-part-connection electrodes with the external electrodes are arranged (rewiring region) is determined according to the size of the semiconductor element. Therefore, it is difficult to manufacture a semiconductor device of the wafer level package structure employing a semiconductor element having, for instance, not less than 100 pins of electrode parts (pad electrodes), since a rewiring region thereof is small relative to the number of electrode parts thereof. Besides, in recent years, a semiconductor element is downsized increasingly as the wiring rules become finer, and the size of a rewiring region thereof is decreased. As in the semiconductor device of the present embodiment, by making a surface of the wiring substrate crossing a thickness direction of the semiconductor device perpendicularly larger than a surface of the semiconductor element crossing the thickness direction of the semiconductor device perpendicularly, the lines can be provided so as to extend from the electrode parts (pad electrodes) of the semiconductor element to the periphery of the semiconductor element. With this configuration, a semiconductor device employing a semiconductor element having a greater number of electrode parts (pad electrodes) can be provided.

In the semiconductor device of the present embodiment, in the case where the surface of the wiring substrate crossing the thickness direction of the semiconductor device perpendicularly is larger than the surface of the semiconductor element crossing the thickness direction of the semiconductor device perpendicularly, the external electrode may be arranged on a surface of the insulation layer that is seen when the semiconductor device is observed in the thickness direction thereof from a semiconductor element side. This configuration allows the electrode-part-connection electrodes and the external electrodes to be formed at the same time, thereby making it possible to provide a further low-cost semiconductor device.

In the semiconductor device of the present embodiment, it is preferable that the wiring substrate further includes an inner via that is provided in the insulation layer so as to go through the insulation layer in a thickness direction thereof, and the electrode-part-connection electrode and the external electrode are connected electrically through the inner via. This configuration allows a semiconductor device to be provided with a high degree of freedom in wiring layout.

In the semiconductor device of the present embodiment, the wiring substrate preferably further includes at least one wiring layer arranged in the insulation layer. This configuration allows a semiconductor device to be provided with a higher degree of freedom in wiring layout.

In the semiconductor device of the present embodiment, preferably, the insulation layer is made of a material containing a thermosetting resin, and the material containing a thermosetting resin contains 75 wt % to 91 wt % of an inorganic filler, and 9 wt % to 25 wt % of a resin composition containing a thermosetting resin. The thermosetting resin preferably contains at least one kind of resin selected from the group consisting of epoxy resins, phenol resins, cyanate resins, and thermosetting polyimide. In the case where the material containing the thermosetting resin does not contain thermosetting polyimide, the material containing the thermosetting resin preferably contains a thermosetting resin with a glass transition temperature of not higher than 150° C. The wiring substrate including the insulation layer made of such a material is capable of reducing stresses occurring due to the thermal expansion difference between the semiconductor element and the wiring substrate, even if the electrode part and the electrode-part-connection electrode are bonded directly by metal joint.

The reason why the material containing a thermosetting resin contains 75 wt % to 91 wt % of an inorganic filler, and 9 wt % to 25 wt % of a resin composition containing a thermosetting resin is as follows. If the inorganic filler is less than 75 wt %, the thermal expansion coefficient of the insulation layer increases, while the thermal conductivity thereof decreases. If the inorganic filler is more than 91 wt %, the decease in the amount of the thermosetting resin makes it difficult to form the sheet-like material that is to become the insulation layer when it is cured, and the sheet-like material thus formed tends to be torn easily.

In the semiconductor device of the present embodiment, the semiconductor element preferably has a thickness of not less than 30 μm and not more than 100 μm. If the semiconductor element has a thickness of not less than 30 μm and not more than 100 μm, the semiconductor element has a mechanical characteristic of flexibility. This semiconductor element, in combination with the wiring substrate including the insulation layer with an elastic modulus of not less than 0.1 GPa and no more than 5 GPa, is capable of reducing stresses that occur due to a thermal expansion difference between the semiconductor element and the wiring substrate, and therefore, enhances the connection reliability of the semiconductor device. It should be noted that the semiconductor element can be processed easily so as to have a desired thickness without damaging the circuit formed on a surface of the semiconductor element as long as the thickness is not less than 30 μm.

In the semiconductor device of the present embodiment, the insulation layer has a thickness of not less than 30 μm and not more than 200 μm. If the thickness thereof is less than 30 μm, the insulation layer is difficult to handle, whereas if it exceeds 200 μm, this hinders the thinning of the semiconductor device.

In the semiconductor device of the present embodiment, the semiconductor device preferably has a thickness of not less than 60 μm and not more than 300 μm. It is difficult to manufacture a semiconductor device with a thickness of less than 60 μm, and an excessively great thickness thereof causes the elastic modulus of the semiconductor device as a whole to increase. Such a thin semiconductor device with a small elastic modulus as described above enables the reduction of stresses occurring due to the thermal expansion difference between the semiconductor device and a substrate on which the semiconductor device is mounted, and allows the connection reliability of a module incorporating the semiconductor device to increase.

A method for manufacturing a semiconductor device according to an embodiment of the present invention includes the step of superposing a mounting member and a semiconductor element including an electrode part, the mounting member including an insulation member made of a material containing a resin, an electrode-part-connection electrode provided in the insulation member, and an external electrode provided in the insulation member and connected electrically with the electrode-part-connection electrode, and bonding the electrode part and the electrode-part-connection electrode so that the mounting member and the semiconductor element are integrated. In the method, in the step, the electrode part is prepared so as to include a metal layer, the electrode-part-connection electrode is prepared so as to include a metal layer, and the metal layer of the electrode part and the metal layer of the electrode-part-connection electrode are connected by metal joint.

By the foregoing method, a thin, low-cost, and highly reliable semiconductor device can be provided.

In the method of the present embodiment for manufacturing a semiconductor device, in the step, the insulation member may be formed with a material containing a thermosetting resin in a non-cured state, and the mounting member and the semiconductor element that are superposed are subjected to heat and pressure so that the thermosetting resin is cured.

In the method of the present embodiment for manufacturing a semiconductor device, the step further preferably includes a sub-step of, after curing the thermosetting resin, heating the metal layer of the electrode part and the metal layer of the electrode-part-connection electrode using ultrasonic vibration. By applying ultrasonic waves after the thermosetting resin is cured, the ultrasonic vibration is transmitted easily to the metal layers of the electrode parts and the metal layers of the electrode-part-connection electrodes, whereby metal joint can be obtained with increased bonding strength.

In the method of the present embodiment for manufacturing a semiconductor device, in the step, the metal layer of the electrode part and the metal layer of the electrode-part-connection electrode preferably are formed with at least one kind of metal selected from the group consisting of noble metals and solder alloys.

In the method of the present embodiment for manufacturing a semiconductor device, the step preferably includes sub-steps of preparing a transfer carrier provided with a wiring pattern, superposing the transfer carrier provided with the wiring pattern and the insulation member so that the wiring pattern and the insulation member are brought into contact with each other, and removing only the transfer carrier from the insulation member, so that the electrode-part-connection electrode is formed on the insulation member.

In the method of the present embodiment for manufacturing a semiconductor device, the step preferably includes sub-steps of filling a conductive material inside the insulation member, providing the electrode-part-connection electrode on a surface of the insulation member on one side thereof, and providing the external electrode on the other surface of the insulation member on an opposite side thereof, so that the mounting member is formed. By this method, a semiconductor device can be provided with a high degree of freedom in wiring layout.

In the method of the present embodiment for manufacturing a semiconductor device, the step further preferably includes sub-steps of preparing a plurality of sheet-like materials that are made of the material containing a thermosetting resin in a non-cured state, that have through holes, and that are to become the insulation member when they are laminated, filling the conductive material in the through holes, and laminating the sheet-like materials in a manner such that a wiring layer is arranged between the different sheet-like materials, so that the insulation member filled with the conductive material is prepared. By this method, a semiconductor device can be provided with a higher degree of freedom in wiring layout.

The method of the present embodiment for manufacturing a semiconductor device preferably further includes a step of processing the semiconductor element so that the semiconductor element has a thickness of not less than 30 μm and not more than 100 μm, the processing step being carried out after the mounting and bonding step. In this method, handling the semiconductor element when thinning the semiconductor element bonded with the wiring substrate is easier than when bonding the previously thinned semiconductor element with the wiring substrate.

In the method of the present embodiment for manufacturing a semiconductor device, the material containing a thermosetting resin in a non-cured state preferably contains 75 wt % to 91 wt % of an inorganic filler, and 9 wt % to 25 wt % of a resin composition containing a thermosetting resin, and the thermosetting resin preferably contains at least one kind of resin selected from the group consisting of epoxy resins, phenol resins, cyanate resins, and thermosetting polyimide. Besides, in the case where the material containing the thermosetting resin in a non-cured state does not contain thermosetting polyimide, the material containing the thermosetting resin in a non-cured state preferably contains a thermosetting resin with a glass transition temperature of not higher than 150° C. It should be noted that the content of the inorganic filler and the content of the resin composition containing a thermosetting resin are calculated in terms of a composition that does not contain a solvent.

Another method of the present embodiment for manufacturing a semiconductor device includes the steps of (a) superposing a mounting member and a semiconductor element material including a plurality of semiconductor elements having electrode parts, the mounting member including an insulation member made of a material containing a resin, a plurality of sets of electrode-part-connection electrodes provided on a surface of the insulation member on one side thereof, and a plurality of sets of external electrodes provided on a surface of the insulation member on an opposite side thereof, wherein the electrode-part-connection electrodes and the external electrodes are connected electrically with each other, and bonding the electrode parts and the electrode-part-connection electrodes, so that the mounting member and the semiconductor element material are integrated, and (b) cutting the semiconductor element material and the mounting member together so that the individual semiconductor elements are separated from one another. The step (b) is carried out after the step (a). In the method, in the step (a), the electrode parts are prepared so as to include metal layers, the electrode-part-connection electrodes are prepared so as to include metal layers, and the metal layers of the electrode parts and the metal layers of the electrode-part-connection electrodes are connected by metal joint.

By the foregoing method, a downsized, thin, low-cost, and highly reliable semiconductor device can be provided.

In the another method of the present embodiment for manufacturing a semiconductor device, in the step (a), the insulation member may be formed with a material containing a thermosetting resin in a non-cured state, and the mounting member and the semiconductor element material that are superposed are subjected to heat and pressure so that the thermosetting resin is cured.

In the another method of the present embodiment for manufacturing a semiconductor device, the step (a) preferably further includes a sub-step of, after curing the thermosetting resin, heating the metal layers of the electrode parts and the metal layers of the electrode-part-connection electrodes using ultrasonic vibration. By applying ultrasonic wave after the thermosetting resin is cured, the ultrasonic vibration is transmitted easily to the metal layers of the electrode parts and the metal layers of the electrode-part-connection electrodes, whereby metal joint can be obtained with increased bonding strength.

The method of the present embodiment for manufacturing a semiconductor device preferably further includes a step of processing the semiconductor elements so that the semiconductor elements have a thickness of not less than 30 μm and not more than 100 μm each, the step being carried out after the step (a) and prior to the step (b). Since the semiconductor elements are processed so as to have a desired thickness before the semiconductor element material is cut into the individual semiconductor elements, this provides high productivity, and facilitates the stress relief step for removing the portions of the semiconductor elements in which stresses remain.

In the method of the present embodiment for manufacturing a semiconductor device, in the step (a), the metal layers of the electrode parts and the metal layers of the electrode-part-connection electrodes preferably are formed with at least one kind of metal selected from the group consisting of noble metals and solder alloys.

In the method of the present embodiment for manufacturing a semiconductor device, the step (a) preferably includes sub-steps of preparing a transfer carrier provided with a wiring pattern, superposing the transfer carrier provided with the wiring pattern and the insulation member so that the wiring pattern and the insulation member are brought into contact with each other, and removing only the transfer carrier from the insulation member, so that the electrode-part-connection electrodes are formed on the insulation member.

In the method of the present embodiment for manufacturing a semiconductor device, the step (a) preferably further includes sub-steps of preparing a plurality of sheet-like materials that are made of the material containing a thermosetting resin in a non-cured state, that have through holes, and that are to become the insulation member when they are laminated, filling a conductive material in the through holes, and laminating the sheet-like materials in a manner such that a wiring layer is arranged between the different sheet-like materials, so that the insulation member filled with the conductive material is prepared. This provides a semiconductor device with a high degree of freedom in wiring layout.

In the method of the present embodiment for manufacturing a semiconductor device, the material containing a thermosetting resin in a non-cured state preferably contains 75 wt % to 91 wt % of an inorganic filler, and 9 wt % to 25 wt % of a resin composition containing a thermosetting resin, and the thermosetting resin preferably contains at least one kind of resin selected from the group consisting of epoxy resins, phenol resins, cyanate resins, and thermosetting polyimide. Besides, in the case where the material containing the thermosetting resin in a non-cured state does not contain thermosetting polyimide, the material containing the thermosetting resin in a non-cured state preferably contains a thermosetting resin with a glass transition temperature of not higher than 150° C. It should be noted that the content of the inorganic filler and the content of the resin composition containing a thermosetting resin are calculated in terms of a composition that does not contain a solvent.

The following will describe preferred embodiments of the present invention, while referring to the drawings.

The following will describe a semiconductor device according to the present embodiment, while referring toFIG. 1. As shown inFIG. 1, a semiconductor device1of the present embodiment includes a semiconductor element103that includes electrode parts104, and a wiring substrate108. The wiring substrate108includes an insulation layer101having an elastic modulus of not less than 0.1 GPa and not more than 5 GPa, electrodes102for connection with the electrode parts (hereinafter referred to as electrode-part-connection electrodes) provided in the insulation layer101, and external electrodes107that are provided in the insulation layer101and that are connected electrically with the electrode-part-connection electrodes102. The semiconductor element103includes a body part105(a part including the semiconductor chip) and the electrode parts104, and the electrode parts104protrude out of the body part105on the wiring substrate108side.

Each electrode part104includes a metal layer104a, and each electrode-part-connection electrode102includes a metal layer102a. In the semiconductor device1, the metal layers104aof the electrode parts104and the metal layers102aof the electrode-part-connection electrodes102are connected by metal joint.

In the semiconductor device1, a surface of the wiring substrate108perpendicularly crossing a thickness direction of the semiconductor device1is larger than a surface of the semiconductor element103perpendicularly crossing the thickness direction of the semiconductor device1. In other words, the surface of the wiring substrate108on the semiconductor element side is larger than the surface of the semiconductor element103on the wiring substrate side. The external electrodes107are disposed in a portion of a surface of the insulation layer101on the semiconductor element side where the semiconductor element103is not bonded (in a peripheral portion), namely, so as to surround the semiconductor element103. In other words, the external electrodes107are arranged on the surface of the insulation layer101that is seen when the semiconductor device1is observed in the thickness direction from the semiconductor element side. As described above, the external electrodes107are connected electrically with the electrode-part-connection electrodes102.

In the semiconductor device1, even if the electrode parts104and the electrode-part-connection electrodes102are connected directly by metal joint, not via bumps, the wiring substrate108including the insulation layer101with an elastic modulus of not less than 0.1 GPa and not more than 5 GPa enables the reduction of stresses occurring due to the thermal expansion difference between the semiconductor element103and the wiring substrate108. Therefore, connection reliability can be maintained. Further, since the semiconductor device has a structure such that the electrode parts104and the electrode-part-connection electrodes102are bonded directly without bumps, the reduction of the thickness and the cost of the device can be achieved. Thus, with the present embodiment, a thin, low-cost, and highly reliable semiconductor device can be provided.

Metals contained in the metal layers104aand102aare not limited particularly, and at least one kind of metal selected from, for instance, noble metals and solder alloys may be contained therein. Examples of the noble metals include Au, Ag, Cu, Ru, Rb, Pd, Os, Ir, Pt, etc. Examples of the solder alloys include Pb—Sn, Pb—Ag, Bi—Sn, Zn—Cd, Pb—Sn—Sb, Pb—Sn—Cd, Pb—Sn—In, Bi—Sn—Sb etc. The metal layers104aand102apreferably are made of Au in particular. This is because stable metal joint can be achieved easily at an interface between Au and Au by application of heat and pressure.

In the semiconductor device of the present embodiment, as shown inFIG. 1, the semiconductor element103includes a plurality of electrode parts104, and the surface of the wiring substrate108on the semiconductor element side and the surface of the semiconductor element103on the wring substrate side preferably are bonded so that spaces between the electrode parts are filled with the insulation layer101. This is because, by thus bonding the surface of the wiring substrate108on the semiconductor element side and the surface of the semiconductor element103on the wiring substrate side in a manner such that the electrode parts104and the electrode-part-connection electrodes102are embedded in a sheet-like material that is to be the insulation layer101after it is cured, stresses occurring due to the thermal expansion difference between the semiconductor element103and the wiring substrate108can be reduced more effectively. Moreover, a thinner semiconductor device can be provided.

The insulation layer101is required to have an elastic modulus of not less than 0.1 GPa and not more than 5 GPa. In the case where the elastic modulus exceeds 5 GPa, the stresses occurring due to the thermal expansion difference between the semiconductor element103and the wiring substrate108cannot be reduced sufficiently by the wiring substrate108including the insulation layer101, which makes it impossible to maintain the connection reliability between the electrode parts104and the electrode-part-connection electrode102. On the other hand, in the case where the elastic modulus is less than 0.1 GPa, the semiconductor device including such an insulation layer101is difficult to handle.

A material of the insulation layer101is not limited particularly as long as the material has an elastic modulus of not less than 0.1 GPa and not more than 5 GPa. For instance, a material containing a thermosetting resin can be used. As the material containing a thermosetting resin, a mixture of a resin composition containing a thermosetting resin and an inorganic filler, for instance, can be used.

Next, a mixture of an inorganic filler and a resin composition containing a thermosetting resin is described below.

The resin composition preferably contains, as the thermosetting resin, at least one kind of resins selected from the group consisting of epoxy resins, phenol resins, cyanate resins, and thermosetting polyimide. Brominated epoxy resins preferably are used in particular, since they exhibit fire retardance. Further, in the case where the resin composition does not contain thermosetting polyimide, it preferably contains a thermosetting resin having a glass transition temperature (Tg) of not higher than 150° C. In the case where the thermosetting resin contained in the resin composition contains two or more kinds of resins selected from the foregoing group (excluding thermosetting polyimide), at least one kind of a thermosetting resin may have a glass transition temperature (Tg) of not higher than 150° C. It should be noted that in the case where the resin composition contains thermosetting resins that are categorized as the same kind but have different glass transition temperatures (Tg), for instance, two kinds of epoxy resins having different glass transition temperatures (Tg), these resins are regarded as resins of different kinds, and at least one kind of an epoxy resin among the foregoing two or more kinds of epoxy resins may have a glass transition temperature of not higher than 150° C. It should be noted that no lower limit of the glass transition temperature is set particularly, but normally, the glass transition temperature preferably is not lower than 50° C.

In the case where the resin composition contains two or more kinds of resin, a proportion by weight between the thermosetting resin having a glass transition temperature of not higher than 150° C. and the other resins is not limited particularly, but normally the ratio by weight preferably is 1:3 to 3:1.

The foregoing resin composition further may contain a curing agent or a curing accelerator. For instance, a bisphenol-A type Novolac resin and imidazole can be used as the curing agent and the curing accelerator, respectively. The foregoing resin composition may further contain an additive such as a dispersant, a colorant, a coupling agent, a mold releasing agent, etc.

Examples usable as a solvent for decreasing the viscosity of a mixture that contains an inorganic filler and a resin composition containing a thermosetting resin include ethyl carbitol, butyl carbitol, and butyl carbitol acetate. These have boiling points of not lower than 150° C. Additionally, the examples include methyl ethyl ketone, isopropanol, toluene, etc. These have boiling points of not higher than 100° C. One kind, or two or more kinds of these solvents may be used.

It should be noted that the foregoing solvent is unnecessary if it is possible, without mixing the solvent in the mixture of the inorganic filler and the resin composition containing the thermosetting resin, to embed the electrode parts104and the electrode-part-connection electrodes102in a sheet-like material that is to become the insulation layer101when it is cured in the manufacturing process of the semiconductor device of the present embodiment.

As the inorganic filler, at least one kind selected from the group consisting of, for instance, Al2O3, MgO, SiO2, BN, and AlN can be used. These are preferred since they have high thermal conductivities. The inorganic filler preferably has a particle diameter of not less than 0.1 μm and not more than 100 μm. If the particle diameter is excessively small or large, the filling factor of the inorganic filler in the insulation layer101decreases, thereby causing the thermal conductivity of the insulation layer101to decrease. Further, it also causes the difference of a coefficient of thermal expansion of the insulation layer101from that of the semiconductor element103.

In the mixture of containing the inorganic filler and the resin composition the thermosetting resin, the content of the inorganic filler preferably is 75 wt % to 91 wt %. If it is less than 75 wt %, the coefficient of thermal expansion of the insulation layer101increases, while the thermal conductivity thereof decreases. On the other hand, if it is more than 91 wt %, the decease in the amount of the thermosetting resin makes it difficult to form the sheet-like material that is to become the insulation layer101when it is cured, and the sheet-like material thus formed tends to be torn easily. It should be noted that in the case where the content of the inorganic filler is 75 wt % to 91 wt %, the content of the resin composition in the mixture of the inorganic filler and the resin composition containing a thermosetting resin is 9 wt % to 25 wt %. It should be noted that the content of the inorganic filler in the insulation layer and the content of the resin composition containing a thermosetting resin in the insulation layer are determined on the basis of a composition that does not contain a solvent.

In the mixture of the inorganic filler and the resin composition containing the thermosetting resin, the more preferable content of the inorganic filler is 80 wt % to 88 wt %. With this content, the sheet-like material that is to become the insulation layer can be formed easily, and the wiring substrate108having a high thermal conductivity can be obtained. In this case, the content of the resin composition containing a thermosetting resin is 12 wt % to 20 wt %.

The mixture of the inorganic filler and the resin composition containing a thermosetting resin preferably does not contain a reinforcer such as glass fiber. This is because, in the case where a reinforcer is not contained, the wiring substrate108having a low elastic modulus can be obtained easily. Even without such a reinforcer, it is possible to maintain a mechanical strength of the insulation layer101, since the inorganic filler is filled at a high density.

The insulation layer101preferably has a thickness of not less than 30 μm and no less than 200 μm. If the thickness is less than 30 μm, the insulation layer101is difficult to handle, and if the thickness is more than 200 μm, the semiconductor device has an excessive thickness. Further, the thickness more preferably is not less than 50 μm and not more than 150 μm. The thickness in this range is preferred from the viewpoints of handlability, thickness, and elasticity.

The electrode-part-connection electrodes102can be made of a material having electrical conductivity, for instance, a copper foil or a conductive resin composition. Examples of a method for forming the electrode-part-connection electrodes102include the subtractive method, the additive method, etc. In the present embodiment, the electrode-part-connection electrodes102including the metal layers102a, for instance, Au layers are formed through, for instance, the following process. First, a copper foil is laminated on the sheet-like material that is to become the insulation layer101, and after the application of pressure thereto, unnecessary portions of the copper foil are removed. Thereafter, the copper foil is subjected to electroless plating.

The external electrodes107also can be formed with a material having electrical conductivity, for instance, a copper foil, a conductive resin composition, etc., like the electrode-part-connection electrodes102, and they can be formed through the same process as that for the electrode-part-connection electrodes102. In the semiconductor device1of the present embodiment, in the manufacturing process, the electrode-part-connection electrodes102are formed on one of the surfaces of the sheet-like material that is to become the insulation layer101, and the external electrodes107also are formed on the foregoing surface of the sheet-like material. Therefore, the electrode-part-connection electrodes102and the external electrodes107can be formed at the same time.

It should be noted that, though in the semiconductor device1of the present embodiment the surface of the wiring substrate108on the semiconductor element side and the surface of the semiconductor element103on the wiring substrate side are bonded with each other so that spaces between the electrode parts104are filled with the insulation layer101, the semiconductor device of the present embodiment is not limited to this configuration. For instance, the surface of the semiconductor element103(surface of the body part105) may be bonded with the insulation layer101by embedding the surface of the semiconductor element103on the wiring substrate side into the sheet-like material that is to become the insulation layer101after it is cured. In other words, the body part105of the semiconductor element103may be embedded in the insulation layer101.

Still further, though in the semiconductor device of the present embodiment described with reference toFIG. 1each of the electrode parts104and the electrode-part-connection electrodes102has a structure that includes, for instance, a copper foil or a conductive resin composition, and an Au layer formed on its surface by plating, their configuration is not limited to this. As to at least one of the electrode parts104and the electrode-part-connection electrodes102, an entirety of each of the same may be made of, for instance, a noble metal such as Au, a solder alloy, or the like.

The following will describe a semiconductor device according to an embodiment of the present invention, while referring toFIGS. 2A to 3B.FIG. 2Ais a plan view illustrating a state in which a semiconductor device of the present embodiment is mounted on a motherboard206, andFIG. 2Bis a cross-sectional view of the same.FIGS. 3A and 3Bare views illustrating steps of an example of a manufacturing process of the semiconductor device shown inFIGS. 2A and 2B.

A semiconductor device of the present embodiment includes a semiconductor element203including electrode parts204, and a wiring substrate208. The wiring substrate208includes an insulation layer201having an elastic modulus of not less than 0.1 GPa and not more than 5 GPa, electrode-part-connection electrodes202provided on one of surfaces of the insulation layer201, and external electrodes207that are connected electrically with the electrode-part-connection electrodes202. The external electrodes207are arranged on the same surface of the insulation layer201where the electrode-part-connection electrodes202are arranged, as in Embodiment 1. Each of the electrodes parts204and the electrode-part-connection electrodes202includes a metal layer, and when the electrode parts204and the electrode-part-connection electrodes202are superposed, their metal layers are in contact with each other. It should be noted that inFIGS. 2A and 2B, the illustration of the metal layers of the electrode parts204and the metal layers of the electrode-part-connection electrodes202is omitted.

The semiconductor device of the present embodiment also, as in Embodiment 1, is configured so that the wiring substrate208includes the insulation layer201having an elastic modulus of not less than 0.1 GPa and not more than 5 GPa. Therefore, even if the electrode parts204and the electrode-part-connection electrodes202are connected directly by metal joint, not via bumps, the wiring substrate208including the insulation layer201with an elastic modulus of not less than 0.1 GPa and not more than 5 GPa enables the reduction of stresses occurring due to the thermal expansion difference between the semiconductor element203and the wiring substrate208. Therefore, connection reliability can be maintained between the electrode parts204and the electrode-part-connection electrodes202. Thus, with the present embodiment, a thin, low-cost, and highly reliable semiconductor device can be provided.

With the configuration of the present embodiment in particular, since the insulation layer201has a thickness of approximately 15 μm to 40 μm, it is possible to provide an extremely thin semiconductor device.

To form the insulation layer201, for instance, a thermoplastic polyimide film, a thermosetting resin film, etc. can be used.

The thermosetting resin is identical to the thermosetting resin of Embodiment 1 described above that is contained in the mixture of a resin composition containing a thermosetting resin and an inorganic filler.

The electrode-part-connection-electrodes202and the external electrodes207are formed with the same materials through the same process as those of Embodiment 1 described above.

The bonding of the wiring substrate208with the semiconductor element203preferably is carried out as follows. First, a coupling treatment is applied to a surface of the semiconductor element203, and an insulation resin209is supplied to the surface of the semiconductor element203thus subjected to the coupling treatment. Thereafter, the semiconductor element203and the wiring substrate208are bonded with each other. This process enhances the adhesion between the semiconductor element203and the wiring substrate208.

The coupling treatment is carried out by dissolving a coupling agent in a solvent so as to have a concentration of 0.1 wt % to 2 wt %, applying the solution over the semiconductor element203, and drying the same. The application of the solution can be carried out by immersion, spraying, etc. Examples of the coupling agents include aminosilane, epoxysilane, acrylsilane, mercaptosilane, vinylsilane, etc.

Examples of the insulation resin include, for instance, photosensitive polyimide.

In the case where the insulation layer201is a thermosetting resin film, the bonding of the semiconductor element203with the wiring substrate208can be carried out by bonding a film including a thermosetting resin in a non-cured state with the electrode-part-connection electrodes202and the external electrode207formed therein onto the semiconductor element203by thermocompression by using a vacuum laminator or the like, and curing the thermosetting resin.

The semiconductor device of Embodiment 2 also can be manufactured through the following process.

First of all, as shown inFIG. 3A, a semiconductor element203provided with electrode parts204is prepared, and is attached to a predetermined location on the motherboard206. On the other hand, as shown inFIG. 3B, a mounting member91that includes an insulation member90, electrode-part-connection electrodes202arranged on a surface of the insulation member90on one side thereof, and external electrodes207connected electrically with the electrode-part-connection electrodes202is prepared. It should be noted that inFIG. 3A, the illustration of wiring of the motherboard206is omitted, and inFIG. 3B,210adenotes a line that connects one of the electrode-part-connection electrodes202with a corresponding one of the external electrodes207and that is included in a wiring layer210that includes the electrode-part-connection electrodes202and the external electrodes207.

Next, the mounting member91and the motherboard206on which the semiconductor element203is attached are laminated so that the electrode parts204and the electrode-part-connection electrodes202are brought into contact with each other. The mounting member91and the semiconductor element203are bonded with each other, and the external electrodes207and the motherboard206are connected with each other. Next, the metal layers of the electrodes parts204and the metal layers of the electrode-part-connection electrodes202are heated using an ultrasonic vibrator so that the electrode parts204and the electrode-part-connection electrodes202are connected by metal joint. It should be noted that the mounting member91bonded with the semiconductor element203becomes a wiring substrate208, while the insulation member90becomes an insulation layer201(seeFIGS. 2A and 2B).

In the case where the insulation member90is, for instance, a thermoplastic polyimide film or the like, a coupling treatment is applied to a surface of the semiconductor element203, and an insulation resin209is supplied to the surface of the semiconductor element203thus subjected to the coupling treatment. Thereafter, the mounting member91and the semiconductor element203are bonded with each other. In the case where the insulation member90is, for instance, a film containing a thermosetting resin in a non-cured state, the film is heated while pressure is applied thereto partially, so that the mounting member91and the semiconductor element203are bonded with each other. In the case where the mounting member91is a film containing a thermosetting resin in a non-cured state, the mounting member91shrinks upon application of heat and pressure and therefore, it is possible to eliminate slack of the mounting member91(the insulation layer201) between the electrode-part-connection electrodes202and the external electrodes207.

Through such a method for manufacturing a semiconductor device, the semiconductor device of the present embodiment is completed, while the semiconductor device of the present embodiment is connected with the motherboard206.

The following will describe a semiconductor device according to the present embodiment, while referring toFIG. 4. As shown inFIG. 4, a semiconductor device3of the present embodiment includes a semiconductor element303including electrode parts304, and a wiring substrate308. The wiring substrate308includes an insulation layer301having an elastic modulus of not less than 0.1 GPa and not more than 5 GPa, electrode-part-connection electrodes302provided in the insulation layer301, and external electrodes307that are provided in the insulation layer301and that are connected electrically with the electrode-part-connection electrodes302.

Each electrode part304includes a metal layer304a, and each electrode-part-connection electrode302includes a metal layer302a. In the semiconductor device3, the metal layers304aof the electrode parts304and the metal layers302aof the electrode-part-connection electrodes302are connected by metal joint.

In the semiconductor device3also, as in Embodiment 1, even if the electrode parts304and the electrode-part-connection electrodes302are connected directly by metal joint, not via bumps, the wiring substrate308including the insulation layer301with an elastic modulus of not less than 0.1 GPa and not more than 5 GPa enables the reduction of stresses occurring due to the thermal expansion difference between the semiconductor element303and the wiring substrate308. Therefore, connection reliability can be maintained between the electrode parts304and the electrode-part-connection electrodes302. Further, since the semiconductor device has a structure such that the electrode parts304and the electrode-part-connection electrodes302are bonded directly without bumps, the reduction of the thickness and the cost of the device can be achieved. Thus, with the present embodiment, a thin, low-cost, and highly reliable semiconductor device can be provided. Still further, in the semiconductor device3, as in Embodiment 1, since the surface of the wiring substrate308on the semiconductor element side and the surface of the semiconductor element303on the wiring substrate side are bonded with each other in a manner such that spaces between the electrode parts304are filled with the insulation layer301, stresses occurring due to the thermal expansion difference between the semiconductor element and the wiring substrate can be reduced.

In the semiconductor device3, the electrode-part-connection electrodes302are provided in the insulation layer301, and the external electrodes307are provided on a surface301bof the insulation layer301that is opposite to a surface301athereof on the semiconductor element side. The electrode-part-connection electrodes302and the external electrodes307are connected electrically with each other through inner vias309that are provided in the insulation layer301so as to go through the insulation layer301in a thickness direction thereof Thus, with the configuration of the wiring substrate308in which the electrode-part-connection electrodes302and the external electrode307are connected electrically with each other through the inner vias309provided in the insulation layer303, it is possible to provide a semiconductor device with a high degree of freedom in wiring layout. Further, since the external electrodes307can be arranged in an area array style, the semiconductor device can be downsized. It should be noted that since the surface of the wring substrate308on the semiconductor element side is larger than the surface of the semiconductor element303on the wiring substrate side in the example shown inFIG. 4, a periphery of the wiring substrate308protrudes out of the semiconductor element303, but the protruded portion desirably is reduced as much as possible from the viewpoint of downsizing the semiconductor device.

The inner vias309are made of a conductive material, for instance, a conductive resin composition, and as such a conductive resin composition, for instance, a conductive paste containing a metal powder, a thermosetting resin, and a curing agent can be used. As the metal powder, for instance, at least one kind of metal selected from the group consisting of gold, silver, copper, palladium, and nickel is used preferably. By using such a metal, the electrode-part-connection electrodes302and the external electrodes307can be connected electrically with a low resistance. As the thermosetting resin and the curing agent, for instance, an epoxy resin and imidazol can be used, respectively.

In the semiconductor device3, the semiconductor element303has a mechanical characteristic of flexibility since the semiconductor element303has a thickness of not less than 30 μm and not-more than 100 μm. This semiconductor element303, in combination with the wring substrate308including the insulation layer301with an elastic modulus of not less than 0.1 GPa and no more than 5 GPa, is capable of reducing stresses that occur due to a thermal expansion difference between the semiconductor element303and the wiring substrate308, and therefore, enhances the connection reliability of the semiconductor device. It should be noted that the semiconductor element303can be processed easily so as to have a desired reduced thickness without damaging the circuit formed on a surface of the semiconductor element303as long as the thickness is not less than 30 μm.

In the semiconductor device3, since the thickness of the insulation layer301is not less than 30 μm and not more than 200 μm, an overall thickness of the semiconductor device can be set to be not less than 60 μm and not more than 300 μm. By thus reducing the overall thickness of the semiconductor device to not less than 60 μm and not more than 300 μm, the semiconductor device as a whole is made more flexible, and the connection reliability of a module in which such a semiconductor device3is mounted can be enhanced. Further, since the thickness of the semiconductor device3is significantly small, the semiconductor device3is suitable as a component for use in a circuit component built-in module that incorporates a circuit component in a substrate thereof.

The following will describe a semiconductor device4according to Embodiment 4, while referring toFIGS. 5A and 5B. As shown inFIG. 5A, as in Embodiments 1 to 3, the semiconductor device4includes a semiconductor element403including electrode parts404, and a wiring substrate408. Metal layers404aof the electrode parts404and metal layers402aof electrode-part-connection electrodes402are connected by metal joint.

The wiring substrate408includes: an insulation layer401that includes an upper insulation layer401aand a lower insulation layer401band that has an elastic modulus of not less than 0.1 GPa and no more than 5 GPa; electrode-part-connection electrodes402provided in the insulation layer401; and external electrodes407that are provided on a surface401dof the insulation layer401opposite to a surface401cthereof on the semiconductor element403side. Further, the wiring substrate408includes a wiring layer410arranged between the upper insulation layer401aand the lower insulation layer401b, and inner vias409aand409bthat connect electrically the electrode-part-connection electrodes402with the external electrodes407. In other words, the wiring substrate408has a multilayer wiring structure. Thus, by forming the wiring substrate408in the multilayer wiring structure, the degree of freedom in wiring layout can be increased further. Moreover, since the external electrodes407can be arranged in an area array style, the semiconductor device can be downsized.

In the semiconductor device4also, as in Embodiment 1, even if the electrode parts404and the electrode-part-connection electrodes402are connected directly by metal joint, not via bumps, the wiring substrate408including the insulation layer401with an elastic modulus of not less than 0.1 GPa and not more than 5 GPa enables the reduction of stresses occurring due to the thermal expansion difference between the semiconductor element403and the wiring substrate408. Therefore, connection reliability can be maintained between the electrode parts404and the electrode-part-connection electrodes402. Further, since the semiconductor device has a structure such that the electrode parts404and the electrode-part-connection electrodes402are bonded without bumps, the reduction of the thickness and the cost of the device can be achieved. Thus, with the present embodiment, a thin, low-cost, and highly reliable semiconductor device can be provided.

Still further, since the semiconductor device4is, as in Embodiments 1 and 3, configured so that the surface of the wiring substrate408on the semiconductor element side and the surface of the semiconductor element403on the wiring substrate side are bonded with each other in a manner such that spaces between the electrode parts404are filled with the insulation layer401, stresses occurring due to the thermal expansion difference between the semiconductor element403and the wiring substrate408can be reduced more effectively.

In the semiconductor device4also, as in Embodiment 3, since the semiconductor element403has a thickness of not less than 30 μm and not more than 10 μm and each of the upper and lower insulation layers401aand401bhas a thickness of not less than 30 μm and not more than 100 μm, an overall thickness of the semiconductor device can be set to be not less than 90 μm and not more than 300 μm. In the semiconductor device4of the present embodiment also, for the same reason as that of Embodiment 3, the connection reliability of a module in which such a semiconductor device4is mounted can be enhanced, and the semiconductor device4is suitable as a component for use in a circuit component built-in module. It should be noted that since the surface of the wring substrate408on the semiconductor element side is larger than the surface of the semiconductor element403on the wiring substrate side in the example shown inFIG. 5A, a periphery of the wiring substrate408protrudes out of the semiconductor element403, but the protruded portion desirably is reduced as much as possible from the viewpoint of downsizing the semiconductor device.

Though the wiring substrate408is configured so that one wiring layer410is provided in the insulation layer401in the semiconductor device4, the wiring substrate408is not limited to this configuration. Two or more wiring layers may be provided in the insulation layer401.

Though the semiconductor device4shown inFIG. 5Ahas a land grid array (LGA) structure, the semiconductor device of the present embodiment may have the ball grid array (BGA) structure as shown inFIG. 5B. However, in the case where the semiconductor element403has an area (an area of a surface thereof crossing the thickness direction perpendicularly) of not less than 5 mm2, for instance, approximately 10 mm2, the semiconductor device preferably has the BGA structure, which is excellent in secondary mounting with respect to a motherboard. In the case where the semiconductor element403has an area of less than 5 mm2and is used for a purpose in which the semiconductor device is required to be thinner, the LGA structure (FIG. 5A) is preferable.

The following will describe a semiconductor device according to the present embodiment, while referring toFIG. 6. As shown inFIG. 6, the semiconductor device5includes a semiconductor element503including electrode parts504, and a wiring substrate508. As in Embodiment 4, the wiring substrate508has a multilayer wiring structure including: an insulation layer501that includes an upper insulation layer501aand a lower insulation layer501band that has an elastic modulus of not less than 0.1 GPa and no more than 5 GPa; electrode-part-connection electrodes502provided in the insulation layer501; external electrodes507that are provided on a surface501dof the insulation layer501opposite to a surface501cthereof on the semiconductor element503side; and a wiring layer510arranged in the insulation layer501.

Each electrode part504and each electrode-part-connection electrode502includes a metal layer504aand a metal layer502a, respectively, and in the semiconductor device5, the metal layers504aof the electrode parts504and the metal layers502aof the electrode-part-connection electrodes502are connected by metal joint.

In the semiconductor device5also, as in Embodiment 1, even if the electrode parts504and the electrode-part-connection electrodes502are connected directly by metal joint, not via bumps, the wiring substrate508including the insulation layer501with an elastic modulus of not less than 0.1 GPa and not more than 5 GPa enables the reduction of stresses occurring due to the thermal expansion difference between the semiconductor element503and the wiring substrate508. Therefore, connection reliability can be maintained. Further, since the semiconductor device has a structure such that the electrode parts504and the electrode-part-connection electrodes502are bonded directly without bumps, the reduction of the thickness and the cost of the device can be achieved. Thus, with the present embodiment, a thin, low-cost, and highly reliable semiconductor device can be provided.

The semiconductor device5is manufactured by a so-called wafer level packaging technology whereby a plurality of semiconductor elements are packaged together at a wafer level, and an area of a surface of the wiring substrate508on the semiconductor element side (an area of a surface thereof crossing the thickness direction perpendicularly) and an area of a surface of the semiconductor element503on the wiring substrate side (an area of a surface thereof crossing the thickness direction perpendicularly) are equal to each other. Therefore, the degree of freedom in wiring layout is inferior to that of the semiconductor device4of Embodiment 4, but a further downsized semiconductor device can be provided.

It should be noted that though the wiring substrate508is configured so that one wiring layer510is provided in the insulation layer501in the present embodiment, the wiring substrate is not limited to this configuration. It may be configured, without including a wiring layer inside, so that the electrode-part-connection electrodes504and the external electrodes507are connected directly through inner vias arranged in the insulation layer501. Alternatively, two or more wiring layers may be provided in the insulation layer501.

The following will describe a semiconductor device according to Embodiment 6, while referring toFIGS. 7A to 8B.FIGS. 7A and 8Aare plan views of the semiconductor device of the present embodiment, andFIGS. 7B and 8Bare cross-sectional views of the semiconductor device of the present embodiment.

As shown inFIGS. 7A to 8B, a semiconductor device6of the present embodiment is identical to the semiconductor device of Embodiment 4 (FIG. 5B) except that two wiring layers610are provided in an insulation layer. It should be noted that inFIGS. 7A to 8B,603denotes a semiconductor element,604denotes an electrode part of the semiconductor element603,608denotes a wiring substrate,602denotes an electrode-part-connection electrode,607denotes an external electrode,601denotes an insulation layer,610denotes a wiring layer,610adenotes a line composing the wiring layer610, and609denotes an inner via. It should be noted that inFIGS. 7B and 8B, the illustration of metal layers included in the electrode parts604and metal layers included in the electrode-part-connection electrodes602is omitted.

For instance, in the semiconductor device of a wafer level package structure, a region where lines for connecting the electrode-part-connection electrodes with the external electrodes are arranged (rewiring region) is determined according to the size of the semiconductor element. Therefore, it is difficult to manufacture a semiconductor device of the wafer level package structure employing a semiconductor element having, for instance, not less than 100 pins of electrode parts (pad electrodes), since a rewiring region thereof is small relative to the number of electrode parts thereof. Besides, in recent years, a semiconductor element is downsized increasingly as the minimum conductive unit width, etc., determined according to the wiring rule is narrowed, and the size of a rewiring region thereof is decreased. As shown inFIGS. 7A to 8B, by making a surface of the wiring substrate608crossing a thickness direction of the semiconductor device6perpendicularly larger than a surface of the semiconductor element603crossing the thickness direction of the semiconductor device6perpendicularly, the lines610acan be provide so as to extend from the electrode parts (pad electrodes)604of the semiconductor element603to the periphery of the semiconductor element603. With this configuration, a semiconductor device employing a semiconductor element having a greater number of electrode parts (pad electrodes)604can be provided.

However, as shown inFIG. 7B, in the case where many lines610aare provided on a surface of the insulation layer601on the semiconductor element side, it is preferable to provide as many lines610aon a surface of the insulation layer601that is seen when the semiconductor device6is observed in the thickness direction of the semiconductor device6from the semiconductor element603side as possible, that is, on an area of the surface of the insulation layer601that is not in contact with the semiconductor element603. It should be noted that without providing many wires on the surface of the insulation layer610on the semiconductor element side, lines can be provided in the insulation layer601freely, as shown inFIG. 8B. Either the structure shown inFIGS. 7A and 7Bor the structure shown inFIGS. 8A and 8Bis selected according to the purpose of use.

Embodiment 7 relates to a method for manufacturing the semiconductor device1of Embodiment 1 described above, which is described below with reference toFIGS. 9A to 9E.

As shown inFIG. 9A, the semiconductor element103including the electrode parts104is prepared. The electrode parts104protrude from a surface of the body part105on one side (a surface thereof to be bonded with the wiring substrate), and include the metal layers (Au layers)104a. The metal layers104are formed by plating.

Next, as shown inFIG. 9B, a sheet-like insulation member30is formed using a material containing a thermosetting resin in a non-cured state through a process described below. The material containing a thermosetting resin in a non-cured state is identical to the material of the insulation layer of Embodiment 1 described above. The material containing a thermosetting resin in a non-cured state contains, in terms of a composition containing a solvent, for instance, 73.8 wt % to 91 wt % of an inorganic filler, 8.8 wt % to 25 w % of a resin composition containing a thermosetting resin, and 0.2 wt % to 1.2 wt % of a solvent.

First, a mixture slurry containing an inorganic filler, a resin composition containing a thermosetting resin, a solvent having a boiling point of not lower than 150° C., and a solvent having a boiling point of not higher than 100° C. is prepared, and a film is formed with this mixture slurry on a releasing film (not shown). The method for forming the film is not limited particularly, and examples of the same include doctor blading, coater method, extrusion, etc. Next, only the solvent having a boiling point of not higher than 100° C. is removed by drying from the film thus formed. By so doing, the insulation member30in a non-cured state having flexibility is formed.

Next, a wiring pattern31is formed on the insulation member30, while the non-cured state of the insulation member30is maintained. The wiring pattern31includes the electrode-part-connection electrodes and the external electrodes (seeFIG. 1). Examples of the method for forming the wiring pattern31include the subtractive method, transferring, and the additive method.

In the present embodiment, for instance, a copper foil with a thickness of 9 μm is laminated on a surface30aof the insulation member30on one side thereof at 100° C., and after pressure application thereto, unnecessary portions thereof are removed, whereby a wiring pattern31bis formed. Thereafter, it is subjected to electroless plating so that the protruded wiring pattern31including metal layers (Au layers)31ais formed. Thus, a mounting member32as shown inFIG. 9Cis formed. By forming the wiring pattern31so that it protrudes from the surface30aas described above, the pressure applied upon the metal joint of the metal layers102aof the electrode-part-connection electrodes102and the metal layer104aof the electrode parts104is applied accurately to an interface where the electrode-part-connection electrodes102and the electrode parts104are in contact with each other. Therefore, the electrode-part-connection electrodes102and the electrode parts104are bonded firmly with each other (seeFIG. 1).

It should be noted that in the present embodiment, the insulation member30has to be immersed in chemical solutions after the wiring pattern31bis formed by removing unnecessary portions from the copper foil, and after the metal layers (Au layers)31aare formed by electroless plating. Therefore, after immersing the insulation member30in chemical solutions, it is necessary to perform the water washing and drying of the insulation member30sufficiently.

Next, as shown inFIG. 9D, the mounting member32and the semiconductor element103are superposed on each other so that the electrode parts104and predetermined portions of the wiring pattern31are in contact with each other, and surfaces at which the metal layers (Au layers)104aof the electrode parts104and the metal layers (Au layers)31aof the wiring pattern31are in contact with each other are bonded by metal joint by heating the same with supersonic vibration, while pressure is applied thereto in the thickness direction. Here, since the mounting member32is in the non-cured state, the ultrasonic wave tends to be absorbed easily by the mounting member32. Therefore, it is necessary to increase the frequency of the vibration. It should be noted that before the mounting member32and the semiconductor element103are superposed on each other, surfaces of the electrode parts104and the wiring pattern31preferably are subjected to plasma cleaning so as to be cleaned.

Next, the laminate composed of the mounting member32and the semiconductor element103is heated and subjected to pressure in its thickness direction so that portions of the wiring pattern31bonded with the electrode parts104(electrode-part-connection electrodes) and the electrode parts104are embedded in the insulation member30, and the insulation member30is cured. By so doing, the semiconductor element103and the mounting member32are bonded with each other.

Subsequently, the releasing film (not shown) is removed from the cured insulation member30. As shown inFIG. 9E, the cured insulation member30becomes the insulation layer101, and the mounting member32becomes the wiring substrate108. The portions of the wiring pattern31that are bonded with the electrode parts104and embedded in the insulation layer101are the electrode-part-connection electrodes102, and the external electrodes107are included in portions of the wiring pattern31that are not bonded with the semiconductor element103.

It should be noted that in the step described with reference toFIG. 9C, the wiring pattern31is formed so as to protrude from the surface30aof the insulation member30on one side, but the configuration thereof is not limited to this. For instance, the wiring pattern31may be embedded in the insulation member30so that a surface including the wiring pattern31and the surface30aof the insulation member30on one side is substantially flat as shown inFIG. 10A, or alternatively, the wiring pattern31may be embedded partially in the insulation member30, as shown inFIG. 10B. In such cases, a transfer carrier provided with the wiring pattern31thereon and the insulation member30are aligned and superposed on each other, and the wiring pattern31is transferred onto the insulation member30so that an entirety or a part of the wring pattern31is embedded in the insulation member30.

Further, in the step described with reference toFIG. 9D, pressure is applied to the semiconductor element103and the mounting member32so that the semiconductor element103and the mounting member32are brought into close contact with each other, whereby the electrode-part-connection electrodes102and the electrode parts104are embedded in the insulation member30(seeFIG. 9E). In the case where the semiconductor element103thus includes a plurality of electrode parts104, and the semiconductor element103and the wiring substrate108are bonded with each other in a manner such that spaces between the electrode parts are filled with the insulation layer101, stresses occurring due to the thermal expansion difference between the semiconductor element and the wiring substrate are reduced more effectively, whereby a thinner semiconductor device can be provided.

Still further, in the step described with reference toFIG. 9D, after the thermosetting resin contained in the insulation member32is cured by applying heat and pressure in the thickness direction to the laminate composed of the mounting member32and the semiconductor element103, the metal layers104aof the electrode parts104and the metal layer31aof the wiring pattern31may be heated using ultrasonic vibration. By applying ultrasonic wave after the thermosetting resin is cured, the ultrasonic vibration is transmitted easily to the metal layers104aof the electrode parts104and the metal layers31aof the wiring pattern31, whereby metal joint can be carried out easily and stably.

The present embodiment relates to a method for manufacturing the semiconductor device3shown inFIG. 4, which is described below with reference toFIGS. 11A to 11F, and12A and12B.

First of all, as shown inFIG. 11A, the semiconductor element303including the electrode parts304is prepared. The electrode parts304protrude from a surface of a body part on one side, and include the metal layers (Au layers)304a. The metal layers304aare formed by plating.

Next, as shown inFIG. 11B, a sheet-like insulation member40is formed using a material containing a resin composition containing a thermosetting resin in a non-cured state and an inorganic filler. The material containing a resin composition containing a thermosetting resin in a non-cured state and an inorganic filler is identical to the material of the insulation layer of Embodiment 1 described above.

Subsequently, as shown inFIG. 11C, through holes41are formed in the insulation member40. The through holes41are formed by, for instance, laser processing using carbon dioxide laser, excimer laser, or the like, drilling, punching, etc. The laser processing is particularly preferable since it is easy and highly accurate. Then, as shown inFIG. 11D, a conductive material such as a conductive resin composition42is filled in the through holes41. It should be noted that the conductive resin composition42is identical to the material of the inner vias of Embodiment 3 described above.

Next as shown inFIG. 11E, transfer carriers45and46provided with wiring patterns43and44, respectively are prepared. The transfer carriers45and46are, for instance, resin films or metal foils. It should be noted that the wiring patterns43and44are formed with a material identical to that of the electrode-part-connection electrodes and that of the external electrodes of Embodiment 1 described above.

The wiring pattern43is obtained by, for instance, first, preparing the transfer carrier45having recesses45a, then, forming Au layers43ain the recesses45a, and thereafter forming Cu layers43bthereon. Both of the Au layers43aand the Cu layers43bcan be formed by the additive method.

By using this transfer carrier45provided with the wiring pattern43, the electrode-part-connection electrodes that include metal layers and protrude out of the insulation member40can be formed by superposing the insulation member40and the transfer carrier45in a manner such that a surface40aof the insulation member40on one side thereof and the wiring pattern43face each other, and removing only the transfer carrier45while leaving the wiring pattern43on the insulation member40. Additionally, this method does not require, for instance, the step of immersing the insulation member40in a chemical solution, which is necessary in the process of manufacturing a semiconductor device according to Embodiment 7. Therefore, the steps of washing with water and drying the insulation member40thus immersed in a chemical solution are unnecessary also. Thus, the process can be simplified.

On the other hand, the wiring pattern44is formed by, for instance, the subtractive method of laminating a copper foil on a surface of the transfer carrier46on one side, applying pressure thereto, and thereafter removing unnecessary portions of the copper foil.

Next, the transfer carriers45and46provided with the wiring patterns43and44, respectively, and the insulation member40are aligned and superposed, and the laminate thus obtained is heated in an atmosphere at approximately 100° C. to 120° C. while a pressure of 3 MPa to 10 MPa is applied thereto, so that the wiring patterns43and44are transferred to the insulation member40.

Thus, a mounting member47is formed, which has the electrode-part-connection electrodes302including the metal layers (Au layers)302aprovided on the surface40aof the insulation member40on one side thereof, and the external electrodes307provided on a surface40bof the insulation member40on an opposite side thereof, and contains a thermosetting resin in a non-cured state (seeFIG. 1F).

Subsequently, as shown inFIG. 12A, the semiconductor element303and the mounting member47are superposed so that the electrode parts304and the electrode-part-connection electrodes302are brought into contact with each other, and while applying pressure thereto in the thickness direction, surfaces at which the metal layers (Au layers)304aof the electrodes parts304and the metal layers (Au layers)302aof the electrode-part-connection electrodes302are brought into contact with each other are heated using ultrasonic vibration so as to be bonded. Here, since the mounting member47is in a non-cured state, ultrasonic wave tends to be absorbed by the mounting member47. Therefore, the frequency of vibration has to be increased.

Next, by heating the laminate composed of the mounting member47and the semiconductor element303while applying pressure thereto in its thickness direction, the electrode-part-connection electrodes302and the electrode parts304are embedded in the insulation member40, and the insulation member40and the conductive resin composition42are cured, whereby the semiconductor element303and the mounting member47are bonded with each other. As shown inFIG. 12B, the cured insulation member40becomes the insulation layer301, the cured conductive resin composition42becomes inner vias309, and the mounting member47becomes the wiring substrate308.

With the present embodiment, it is possible to manufacture a thin and highly reliable semiconductor device with a high degree of freedom in wiring layout.

It should be noted that though in the step described with reference toFIG. 11E, the wiring pattern43is formed using the transfer carrier45having recesses45aat predetermined positions, the configuration is not limited to this. As shown inFIG. 13, a protruded wiring pattern43may be formed on the transfer carrier45having a flat surface. In this case, the Au layers43aand the Cu layers43bare formed by, for instance, the subtractive method. Subsequently, the transfer carrier45provided with the wiring pattern43and the insulation member40are aligned and superposed, and the wiring pattern43is transferred onto the insulation member40in a manner such that an entirety or a part of the wiring pattern43is embedded in the insulation member40. Further, the semiconductor device6of Embodiment 6 can be manufactured by the semiconductor device manufacturing method according to the present embodiment.

The present embodiment relates to an example of a method for manufacturing the semiconductor device4shown inFIG. 5A, which is described below with reference toFIGS. 14A to 14G, and15A and15B.

First of all, as shown inFIG. 14A, the semiconductor element403including the electrode parts404is prepared. The electrode parts404protrude from a surface of a body part on one side thereof (a surface to be bonded with the wiring substrate of the semiconductor element403), and include the metal layers (Au layers)404a. The metal layers404aare formed by plating.

Next, as shown inFIG. 14B, a first sheet-like material50having through holes51is formed using a material containing a resin composition containing a thermosetting resin in a non-cured state and an inorganic filler. Then, the through holes51are filled with a conductive resin composition52b, whereby a second sheet-like material53is formed.

It should be noted that the material of the first sheet-like material50is the same as the material of the insulation layer of Embodiment 1 described above. The through holes51are formed in the same manner as that described with reference toFIG. 11C. The conductive resin composition52bis the same as the material of the inner vias of Embodiment 1 described above.

Next, as shown inFIG. 14C, transfer carriers56and57provided with wiring patterns54and55, respectively, are prepared. Subsequently, the transfer carriers56and57provided with the wiring patterns54and55, and the second sheet-like material53are aligned and superposed, and the laminate thus obtained is heated in an atmosphere at approximately 100° C. to 120° C. while pressure of 3 MPa to 10 MPa is applied thereto, so that the wiring patterns54and55are transferred to the second sheet-like material53. By so doing, a third sheet-like material58in a non-cured state is obtained, as shown inFIG. 14D.

Then, as shown inFIG. 14E, using the same material and method as those of the first sheet-like material, a fourth sheet-like material60having through holes59is formed, and a conductive resin composition52ais filled in the through holes59, whereby a fifth sheet-like material61is prepared. It should be noted that the conductive resin composition52ais the same as the material of the inner vias of Embodiment 1 described above. On the other hand, a transfer carrier63provided with a wiring pattern62is prepared.

Next, the fifth sheet-like material61, and the transfer carrier63provided with the wiring pattern62are aligned and superposed on the third sheet-like material58in the stated order, and the laminate thus obtained is heated in an atmosphere of approximately 100° C. to 120° C., while pressure of 3 MPa to 10 MPa is applied thereto. Subsequently, the transfer carrier63is removed from the foregoing laminate, whereby a sixth sheet-like material64in a non-cured state is formed, as shown inFIG. 14F.

As the condition under which the lamination is carried out while the non-cured states of the first and fourth sheet-like materials50and60are maintained, it is preferable that the foregoing laminate is heated at approximately 120° C. in the step described with reference toFIG. 14E, in the case where the atmosphere temperature when the wiring patterns54and55are transferred is, for instance, approximately 100° C. This is because even if the curing of the thermosetting resin contained in the first sheet-like material50is promoted by the transfer of the wiring patterns in an atmosphere at 100° C., such first and fourth sheet-like materials50and60can be laminated without delamination occurring thereto.

Next, the wiring pattern62transferred is subjected to Au plating by the additive method. In the method of forming metal layers on the transferred wiring pattern62as described above, a step of immersing the sheet-like materials (the first and fourth sheet-like materials50and60) in a chemical solution is performed only after the plating step.

As described above, a plurality of the sheet-like materials having through holes that are to become an insulation member65when they are laminated (the first and fourth sheet-like materials50and60) are formed using a material containing an inorganic filler and a resin composition containing a thermosetting resin in a non-cured state, and conductive materials52band52aare filled in the through holes51and59. The plurality of the sheet-like materials (the first and fourth sheet-like materials50and60) are laminated so that the wiring layer410(the wiring pattern54) is arranged between the different sheet-like materials (the first and fourth sheet-like materials50and60). The electrode-part-connection electrodes402are provided on one surface65aof the insulation member65on one side thereof, while the external electrodes407are provided on an opposite surface65bof the same. Thus, a mounting member66having a multilayer wiring structure is prepared (seeFIG. 14G).

Then, as shown inFIG. 15A, the semiconductor element403and the mounting member66are superposed so that the electrode parts404and the electrode-part-connection electrodes402are brought into contact with each other, and while pressure is applied thereto in a thickness direction thereof, surfaces at which the metal layers (Au layers)404aof the electrode parts404and the metal layers (Au layers)402aof the electrode-part-connection electrodes402are in contact with each other are heated by ultrasonic vibration, so that the electrode parts404and the electrode-part-connection electrodes402are connected by metal joint.

Next, the laminate composed of the mounting member66and the semiconductor element403is heated and subjected to pressure in its thickness direction so that the electrode-part-connection electrodes402and the electrode parts404are embedded in the insulation member65, and the insulation member65and the conducive resin compositions52band52aare cured so that the semiconductor element403and the mounting member66are bonded with each other. As shown inFIG. 15B, the cured insulation member65becomes the insulation layer401including the upper and lower insulation layers401aand401b, the conductive resin compositions52aand52bbecome inner vias409aand409b, and the mounting member66becomes the wiring substrate408.

By the method of manufacturing a semiconductor device according to the present embodiment, which employs the wiring substrate408of the multilayer wiring structure and arranges the external electrodes407in the area array style, a downsized semiconductor device can be provided with a high degree of freedom in wiring layout.

It should be noted that in the step described with reference toFIG. 15A, after the semiconductor element403and the mounting member66are integrated, the semiconductor element403may be thinned to not less than 30 μm and not more than 100 μm in thickness by a processing method such as cutting or polishing. Particularly, the semiconductor element403can be thinned at a significantly high rate by cutting. Since the semiconductor element403is thinned after it is bonded with the mounting member66(cured thereby having become the wiring substrate408), a difficult step can be avoided such as a step of handling the thinned semiconductor element403and bonding the thinned semiconductor element403with the wiring substrate408.

The present embodiment relates to a method for manufacturing the semiconductor device shown inFIG. 6, which is described below with reference toFIGS. 16A to 16E.

First of all, as shown inFIG. 16A, semiconductor element material70including a plurality of the semiconductor elements503having the electrode parts504is prepared. The semiconductor element material70in a plate form has a work size of, for instance, 100 mm2or 200 mm2, and preferably is in a circular shape as required. The electrode parts504include metal layers (Au layers)504a, but the metal layers may be solder alloy layers instead of the Au layers.

Next, sheet-like materials81and82having through holes81aand82a, respectively, are formed with a material containing an inorganic filler and a resin composition containing a thermosetting resin in a non-cured state. It should be noted that the sheet-like materials81and82are to become an insulation member86when they are laminated. Then, a conductive material, for instance, conductive resin compositions84and85, is filled in the through holes81aand82a, respectively. Next, the sheet-like materials81and82are laminated so that a wiring layer83is interposed between the sheet-like materials81and82, and a plurality of sets of the electrode-part-connection electrodes502are provided on a surface86aof the insulation member86on one side thereof, while a plurality of sets of the external electrodes507are provided on a surface86bof the same opposite thereto. Thus, a mounting member87having a multilayer wiring structure is formed. The mounting member87is formed with the same material through the same process as those for the wiring substrate of Embodiment 4 described above (seeFIG. 16B).

Next, as shown inFIG. 16C, the mounting member87and the semiconductor element material70are superposed face down so that the electrode parts504and the electrode-part-connection electrodes502are brought into contact with each other. Before the mounting member87and the semiconductor element material70are superposed, a surface of the semiconductor element material70that is to face the mounting member87preferably is subjected to a coupling treatment, and thereafter is coated with an insulation resin. This is because the adhesion between the mounting member87and the semiconductor element material70is enhanced. The coupling treatment is carried out, for instance, in the same method as that of Embodiment 2 described above, and as to the insulation resin also, the same material as that of Embodiment 2 is used.

Next, while the laminate composed of the mounting member87and the semiconductor element material70is subjected to pressure in the thickness direction, surfaces at which the metal layers (Au layers)504aof the electrode parts504and the metal layers (Au layers)502aof the electrode-part-connection electrodes502are in contact with each other are heated by ultrasonic vibration, so as to be connected by metal joint.

Then, as shown inFIG. 16D, the laminate composed of the mounting member87and the semiconductor element material70is heated and subjected to pressure in its thickness direction so that the electrode-part-connection electrodes502and the electrode parts504are embedded in the insulation member86, and the sheet-like materials81and82and the conducive resin compositions84and85are cured so that the mounting member87and the semiconductor element material70are bonded with each other.

Next, the semiconductor element material70and the mounting member87are cut together at predetermined positions (positions indicated by dotted lines inFIGS. 16A to 16E), so that the individual semiconductor elements are separated from one another. As shown inFIG. 16E, the sheet-like materials81and82thus divided become the insulation layer501including the upper and lower insulation layers501aand501b, while the conductive resin compositions84and85become inner vias509aand509b, respectively. Further, the wiring layer83thus divided becomes the wiring layer510, while the mounting member87thus divided becomes the wiring substrate508.

Thus, by the manufacturing method of the present embodiment, the size of the surface of the wiring substrate on the semiconductor element side and the size of the surface of the semiconductor element on the wiring substrate can be made equal to each other, whereby a downsized semiconductor device can be manufactured with excellent productivity.

It should be noted that the semiconductor element503may be processed to have a thickness of not less than 30 μm and not more than 100 μm as required, but this thickness processing with respect to the semiconductor element503preferably is performed before the step of cutting the semiconductor element material70and the mounting member87together at predetermined positions (positions indicated by dotted lines inFIGS. 16A to 16E). This is because this provides excellent productivity and facilitates a stress relief step.

The present embodiment relates to a circuit component built-in module incorporating the semiconductor device4shown inFIG. 5Aand another circuit component, and a method for manufacturing the same, which are described with reference toFIGS. 17A to 17D.

A circuit component built-in module9according to the present embodiment includes: a wiring substrate901for a module (hereinafter referred to as module wiring substrate901); an insulation substrate904arranged on the module wiring substrate901; and the semiconductor device4mounted on the module wiring substrate901and embedded in the insulation substrate904, as shown inFIG. 17D. The semiconductor device4includes, as shown inFIG. 5A: a semiconductor element403having electrode parts404; and a wiring substrate408including an insulation layer401, electrode-part-connection electrodes402provided in the insulation layer401, and external electrodes407provided on the insulation layer401and connected electrically with the electrode-part-connection electrodes402, in which the electrode parts404and the electrode-part-connection electrodes402are connected electrically. The insulation layer has an elastic modulus of not less than 0.1 GPa and not more than 5 GPa, and the electrode parts and the electrode-part-connection electrodes are connected by metal joint.

In manufacturing the circuit component built-in module9of the present embodiment, first, a multilayer wiring substrate (substrate for a module)901, the semiconductor device4of the present invention, and another circuit component903, for instance, a chip component, are prepared as shown inFIG. 17A, and the semiconductor device4and the another circuit component903are mounted on the multilayer wiring substrate901. As the mounting method, any method may be used such as the reflow mounting method employing solder, the mounting method employing a conductive adhesive, or the like. The multilayer wiring substrate901is not limited particularly. In the present embodiment, the multilayer wiring substrate901made of the same material as that of the wiring substrate of Embodiment 1 described above is used. The multilayer wiring substrate901has a thickness of approximately 0.05 mm to 0.3 mm, and the semiconductor device4and the circuit component903have a thickness of not more than 0.3 mm each. It should be noted that inFIGS. 17A to 17D, the multilayer wiring substrate901is illustrated as if it would have a thickness greater than the thickness of the semiconductor device4and the circuit component903, for convenience.

Next, as shown inFIG. 17B, a sheet-like material910in a non-cured state having flexibility is prepared. The sheet-like material910is formed with, for instance, the same material as that of the insulation member30of Embodiment 1 described above.

Then, through holes are formed in the sheet-like material910, and a conductive material, for instance, a conductive resin composition905, is filled in the through holes. The through holes are formed through, for instance, the same process as that described with reference toFIG. 11C.

On the other hand, a transfer carrier906provided with a wiring pattern907is prepared.

Next, on the multilayer wiring substrate901on which the semiconductor element4of the present invention and the circuit component903are mounted, the sheet-like material910having the through holes filled with the conductive resin composition905and the transfer carrier906provided with the wiring pattern907are aligned and superposed in the stated order, and are subjected to temperature of 100° C. to 180° C. and pressure of 3 GPa to 10 GPa. By so doing, the semiconductor device4of the present invention, the circuit component903, and the wiring pattern907are embedded in the sheet-like material910, and then, the sheet-like material910is cured to become the insulation substrate904(seeFIG. 17C).

Subsequently, the transfer carrier906only is removed from the insulation substrate904so as to expose the wiring pattern907, whereby the circuit component built-in module9is obtained (seeFIG. 17D).

In the circuit component built-in module9according to the present embodiment, both of the semiconductor device4and the circuit component903that are incorporated therein have a small thickness of not more than 0.3 mm each. Therefore, the circuit component built-in layer (sheet-like material910) can be formed thin so as to have a thickness of not more than 0.4 mm. Accordingly, the circuit component built-in module9can be made thin so as to have an overall thickness, including the thickness of the multilayer wiring substrate901, of approximately 0.5 mm to 0.7 mm.

The following will describe the semiconductor device of the present invention more specifically, referring to the semiconductor device1of

Embodiment 1 as an example.

First of all, mixtures of the following compositions were prepared for preparing the insulation member30(seeFIG. 9B).

Comparative Example 1

Comparative Example 2

Comparative Example 3

Comparative Example 4

Note: The glass transition temperatures (Tg) were determined by the dynamic mechanical analysis (DMA) method.

Each of mixtures of compositions of Examples 1 to 8 and Comparative Examples 1 to 4 was mixed by rotation at a rate of 120 rpm in a pot for 24 hours, and a slurry as a material for an insulation member30(seeFIG. 9B) was prepared. Thereafter, the slurry was formed in a film form by doctor blading, methyl ethyl ketone was removed by drying, and the film was cut into a predetermined size, whereby the insulation member30with a thickness of 100 μm having flexibility in a non-cured state was obtained (seeFIG. 9B).

Next, as shown inFIG. 9C, on a surface30aof the insulation member30on one side thereof, a copper film with a thickness of 9 μm was laminated, and a wiring pattern31bwas formed by the subtractive method. Thereafter, the insulation member30was washed with water and dried. Next, the insulation member was subjected electroless plating, so that a wiring pattern31in a protruded form having Au layers on its surface was formed. Thereafter, the insulation member30provided with the wiring pattern31was washed with water and dried, whereby a mounting member32(seeFIG. 9C) was obtained.

Next, as shown inFIG. 9D, the mounting member32, and a semiconductor element including electrode parts104whose surfaces were plated with Au (i.e., having Au layers) (TEG, 10 mm square, 0.1 mm thick, having 100 pad electrodes (electrode parts), distance between pad electrodes: 125 μm) were aligned and superposed. Next, the laminate of these was heated at 40° C., and while pressure of 1.5 N per electrode part (pad electrode) was applied thereto, surfaces at which the electrode parts104and the wiring pattern31were brought into contact with each other were heated using ultrasonic vibration, so that the electrode parts104and the electrode-part-connection electrodes102were connected by metal joint. The frequency of the ultrasonic was 60 kHz, and the time of oscillating the ultrasonic wave was 500 m/s.

Next, the laminate composed of a semiconductor element103and the mounting member32was heated at 120° C. while pressure of 3 MPa was applied thereto so that portions of the wiring pattern31that were bonded with the electrode parts104(electrode-part-connection electrodes102) and the electrode parts104were embedded in the insulation member30. Thus, the semiconductor element103and the mounting member32were brought into close contact with each other, and the insulation member30was cured. The semiconductor device thus obtained had a thickness of 200 μm (seeFIG. 9E).

An elastic modulus and a thermal expansion coefficient of the insulation layer were measured as to each of the semiconductor devices of Examples 1 to 8 and Comparative Examples 1 to 4. The elastic modulus was measured by the method described below, and the coefficient of thermal expansion was measured by the thermomechanical analysis (TMA) method. Thermal shock tests were performed by the following method. The results of these tests are shown in Table 1.

The elastic modulus was measured according to JIS K6911. A sample that was 1.5 mm thick, 8 mm±1 mm wide, and 50 mm long was prepared, both ends of the sample were supported by supports as shown inFIG. 18, and a load F (2 kgf to 5 kgf) was applied to a center area of the sample from above. A distance L between the supports was 24 mm, and a lading rate was 0.8 mm/min. An inclination (F/Y) in a straight line region of the obtained load-deflection curve was calculated, and it was substituted in a Formula 1 shown below, so as to calculate the elastic modulus.
E=(L3/4bh3)×(F/Y)  (Formula 1)b: width of sample (mm)h: thickness of sample (mm)L: distance between supports (mm)F: load (kgf)F/Y: inclination of load-deflection curve
[Thermal Shock Test]

An operation of leaving a circuit component package in an atmosphere at −55° C. for 30 minutes, and subsequently leaving the same in an atmosphere at 125° C. for 30 minutes as one cycle was repeated 1000 times, and if a connection resistance was not more than 100 mΩ per electrode part, this was regarded as indicating that excellent electric connection was achieved. This is indicated with ◯ in Table 1. In the case where the connection resistance was completely unchanged from that at an initial stage, this is indicated with ⊚. In the case where the connection resistance exceeded 100 mΩ per electrode part before the 1000 cycles of the foregoing operation were completed, this is indicated with X.

It is seen from Table 1 that in the case where the elastic modulus of the insulation layer was not less than 1 GPa and not more than 5 GPa, a change in the connection resistance was small, and high connection reliability in electrical connection was achieved. Besides, in the case where the material containing a thermosetting resin did not contain thermosetting polyimide, the material had an elastic modulus of not more than 5 GPa in the case where it contained a thermosetting resin with a glass transition temperature of not higher than 150° C., and the material had an elastic modulus of more than 5 GPa in the case where all the thermosetting resins contained in the insulation layer had glass transition temperatures of higher than 150° C. Still further, in the case where the material containing a thermosetting resin did not contain thermosetting polyimide and contained two or more thermosetting resins, the material had an elastic modulus of not less than 1 GPa and not more than 5 GPa as long as it contained at least one kind of a thermosetting resin with a glass transition temperature of not higher than 150° C.

Still further, it was confirmed that in the case where the value of the thermal expansion coefficient of the insulation layer was approximated to the value of the thermal expansion coefficient of the semiconductor element (3 ppm/° C.) by appropriately adjusting the type, amount, and particle diameter of the inorganic filler, the connection reliability was improved further.

As has been described so far, with the configuration of the semiconductor device of the present invention and the method of the present invention for manufacturing a semiconductor device, a thin, low-cost, and highly reliable semiconductor device can be provided.