METHOD, ELECTRONIC DEVICE, AND COMPUTER PROGAM PRODUCT FOR ASYNCHRONOUSLY ACCESSING DATA

Embodiments of the present disclosure provide a method, an electronic device, and a computer program product for asynchronously accessing data. The method may include determining, on the basis of an instruction of a user, data to be moved in a persistent memory and metadata associated with the data. The method may further include sending the metadata to a programmable network device associated with the persistent memory such that the programmable network device moves the data on the basis of the metadata. In addition, the method may include informing, in response to receiving a confirmation of operation completion from the programmable network device, the user that the operation of moving the data has been completed. The embodiments of the present disclosure can achieve an operation of asynchronously accessing data. Furthermore, computing resources of a central processing unit (CPU) are saved, so that the user experience is enhanced.

TECHNICAL FIELD

Embodiments of the present disclosure relate to the field of computers, and more specifically, to a method, an electronic device, and a computer program product for asynchronously accessing data.

BACKGROUND

A persistent memory technology is more and more important in a modern storage system. For example, a next generation of storage will use a persistent memory to replace a traditional nonvolatile random access memory (NVRAM). The persistent memory is applied to a direct access (DAX) mode in most cases due to its performance and programing convenience. However, in the DAX mode, there is no asynchronous method for an application program to access a persistent memory. Meanwhile, many storage applications require an asynchronous access method indeed. The lack of an asynchronous interface brings a technical challenge to applying a persistent memory to a general storage system, particularly to a data protection system.

SUMMARY OF THE INVENTION

Embodiments of the present disclosure provide a solution for asynchronously accessing data.

In a first aspect of the present disclosure, a method for asynchronously accessing data is provided. The method may include determining, on the basis of an instruction of a user, data to be moved in a persistent memory and metadata associated with the data. The method may further include sending the metadata to a programmable network device associated with the persistent memory such that the programmable network device moves the data on the basis of the metadata. In addition, the method may include informing, in response to receiving a confirmation of operation completion from the programmable network device, the user that the operation of moving the data has been completed.

In a second aspect of the present disclosure, an electronic device is provided, which includes a processor; and a memory coupled to the processor and having instructions stored therein, wherein the instructions, when executed by the processor, cause the electronic device to perform actions including: determining, on the basis of an instruction of a user, data to be moved in a persistent memory and metadata associated with the data; sending the metadata to a programmable network device associated with the persistent memory such that the programmable network device moves the data on the basis of the metadata; and informing, in response to receiving a confirmation of operation completion from the programmable network device, the user that the operation of moving the data has been completed.

In a third aspect of the present disclosure, a computer program product is provided. The computer program product is tangibly stored on a computer-readable medium and includes machine-executable instructions, and the machine-executable instructions, when executed, cause a machine to execute any step of the method according to the first aspect.

The Summary of the Invention part is provided to introduce the selection of concepts in a simplified form, which will be further described in the Detailed Description below. The Summary of the Invention part is neither intended to identify key features or main features of the present disclosure, nor intended to limit the scope of the present disclosure.

DETAILED DESCRIPTION OF THE INVENTION

The principles of the present disclosure will be described below with reference to several example embodiments illustrated in the accompanying drawings.

As used herein, the term “include” and variations thereof mean open-ended inclusion, that is, “including but not limited to.” Unless specifically stated, the term “or” means “and/or.” The term “based on” means “based at least in part on.” The terms “an example embodiment” and “an embodiment” indicate “a group of example embodiments.” The term “another embodiment” indicates “a group of other embodiments.” The terms “first,” “second,” and the like may refer to different or identical objects. Other explicit and implicit definitions may also be included below.

As mentioned above, a DAX mode is the most recommended way to use a persistent memory. In this mode, an application is applied to map a persistent memory to a user address space of the persistent memory as a series of byte addressable spaces, and the persistent memory is accessed like a general dynamic random access memory (DRAM) through a LOAD/STORE instruction or memcpy/memmove in a C library. The DAX mode can provide the best performance since it provides direct access to the persistent memory from a user space, which completely avoids using a page cache mechanism of a traditional storage application programming interface (API).

One of the most common cases of use of the persistent memory in a storage system is to replace a traditional NVRAM, particularly for a data protection system. Due to an architectural design of a data processing pipeline, the data protection system needs to access the NVRAM in an asynchronous manner. However, there is no inherent asynchronous method to access the persistent memory in the DAX mode. Input/output (I/O) interfaces of all the existing persistent memories in the DAX are synchronous interfaces, such as memcpy( ) in C or pmem_memcpy( ) in PMDK.

The traditional ways to solve the above problems include at least the following: 1) Forging an asynchronous interface with a synchronous interface. This is relatively easy. For example, when an application sends an I/O request, the I/O request is executed through a synchronous method and then returned. When the application checks the completion status of a previous I/O request, it always replies “Completed.” However, the shortcoming of this way is that it is still inherently synchronous. The application will be blocked as it is using a synchronous interface. 2) Changing a code or even an architecture of the application to stop using an asynchronous interface. However, it is very difficult and risky to implement this way.

In order to solve, at least in part, the above problems, an embodiment of the present disclosure provides a novel solution for asynchronously accessing data. First, a computing device may determine data to be moved and metadata thereof in a persistent memory from an instruction of a user. Thus, the metadata may be sent to a preset programmable network device such that the programmable network device moves, on the basis of the metadata, the data that the user intends to move. It should be understood that the programmable network device is a smart network card with a remote direct memory access (RDMA) function, and the present disclosure can utilize this technology to achieve asynchronous access to the data. When the movement of the data is completed, the programmable network device will send a confirmation of operation completion to the computing device, thereby informing the user that the operation of moving the data is completed. Through the above operations, the operation of asynchronously accessing data can be achieved, without a need for the CPU to perform data movement, reading, writing, etc., but only by allocating such work to the programmable network device, thereby saving computing resources of the CPU.

FIG.1shows a schematic diagram of example environment100according to an embodiment of the present disclosure. In this example environment100, a device and/or a process according to embodiments of the present disclosure may be implemented. As shown inFIG.1, example environment100may include user space110, kernel space120, and hardware130. It should be understood that user space110, kernel space120, and hardware130are all associated with a computing device for implementing the processes of embodiments of the present disclosure, and most of the computing resources of the computing device are located in kernel space120.

InFIG.1, user space110includes application140, and hardware130includes persistent memory150. Persistent memory150at least includes memory blocks151and152. Correspondingly, application140includes user address spaces141and142. It should be understood that the DAS mode of the persistent memory allows application140to map memory blocks151and152in persistent memory150to user address spaces141and142in application140, respectively, as a series of byte addressable spaces. Thus, persistent memory150can be accessed through a LOAD/STORE instruction or memcpy/memmove in the C library, similar to a DRAM. As shown inFIG.1, the DAS mode of the persistent memory can provide direct access to persistent memory150from user space110, which completely avoids using a page cache mechanism of a traditional storage API, thereby saving the computing resources of the CPU.

In some embodiments, the computing device herein may be any device with a computing capability. As a non-limiting example, the computing device may be any type of fixed computing device or mobile computing device, including but not limited to a desktop computer, a laptop computer, a notebook computer, a tablet computer, and the like.

It should be understood thatFIG.1is intended only to illustrate some concepts of the present disclosure and is not intended to limit the scope of the present disclosure.

A process of asynchronously accessing data according to an embodiment of the present disclosure will be described in detail below with reference toFIG.2. For ease of understanding, the specific data mentioned in the following description are all illustrative and are not intended to limit the scope of protection of the present disclosure. It can be understood that the embodiment described below may also include additional actions not shown and/or may omit actions as shown, and the scope of the present disclosure is not limited in this regard.

FIG.2illustrates a flow chart of process200for asynchronously accessing data according to an embodiment of the present disclosure. Process200for data processing according to the embodiment of the present disclosure is now described with reference toFIG.2. For ease of understanding, specific examples mentioned in the following description are all illustrative and are not intended to limit the protection scope of the present disclosure.

As shown inFIG.2, at202, the computing device may determine, on the basis of an instruction of a user, data to be moved in a persistent memory and metadata associated with the data. In some embodiments, the metadata at least indicates a source position and a destination position of the data to be moved. Alternatively or additionally, the metadata at least indicates a source address, a destination address, and a data length of the data to be moved.

At204, the computing device sends the metadata to a programmable network device associated with the persistent memory such that the programmable network device moves, on the basis of the metadata, the data that the user intends to move. In some embodiments, when being moved by the programmable network device, the data is packaged as cache data. In some embodiments, the programmable network device is implemented with a smart network card. As an example, the programmable network device may be a host channel adapter (HCA) with a RDMA function.

At206, the computing device may detect in real time whether a confirmation of operation completion from the programmable network device is received.208is executed when the confirmation is received. At208, the computing device may inform the user that the operation of moving the data is completed.

In order to describe the technical solution of the present disclosure in more detail,FIG.3illustrates a flow chart of process300of moving data by means of a programmable network device according to an embodiment of the present disclosure. Process300for moving data according to the embodiment of the present disclosure is now described with reference toFIG.3. For ease of understanding, specific examples mentioned in the following description are all illustrative and are not intended to limit the protection scope of the present disclosure.

As shown inFIG.3, in the process of utilizing the programmable network device to move the data on the basis of the metadata, at302, the data may be transmitted to the programmable network device on the basis of the source position or source address indicated in the metadata. Thereafter, at304, the programmable network device may move the received data to the destination position or destination address. It should be understood that the premise of the above operation is that both the source position and the destination position indicated in the metadata are located in the same persistent memory.

When the programmable network device is a smart network card or HCA with an RDMA function, RDMA connection may be established between any two separate interfaces (QP) of the smart network card according to an RDMA specification, and the two interfaces may be located on the same HCA locally. If two separate interfaces on the local HCA are picked up to establish a connection, this connection becomes a loopback between the local HCA and itself. This loopback connection may perform data transmission as shown inFIG.4. This means that the data may be transmitted between local persistent memories through an RDMA loopback, Details of the data transmission will be described in detail below in combination withFIG.4.

FIG.4illustrates a schematic diagram of scenario400of moving data by means of a programmable network device according to an embodiment of the present disclosure. Scenario400may include user space410, kernel space420, and hardware430. InFIG.4, user space410includes application440, and hardware430includes programmable network device450. It should be understood that application440in user space410may be mapped to a persistent memory, so the operation on application440in scenario400may be regarded as the operation on the data in the persistent memory.

Programmable network device450at least includes a data cache451. Application440at least includes user address spaces431and432. As shown inFIG.4, user address spaces431and432are respectively used for indicating a source position and a destination position of the data that the user intends to move, and both the source position and the destination position are located in the same persistent memory. In order to move the data, the computing device may issue metadata associated with the data to programmable network device450, so that programmable network device450may complete the operation of moving the data on the basis of the metadata, thereby achieving an operation of asynchronously accessing the data.

Specifically, programmable network device450may acquire, on the basis of the source position or source address indicated in the metadata, the data that the user intends to move from user address space431in application440. In some embodiments, the data may be packaged in the form of a data cache before being transmitted to programmable network device450, and the data will be transmitted to a specific position, such as data cache451, in programmable network device450. Programmable network device450may then move the received data to the destination position or destination address, i.e., user address space432in application440inFIG.4. In this way, the process of moving the data does not generate an overhead in kernel space420, thus significantly saving the computing resources of the CPU. In addition, since the main work of data transmission is completed by the computing device by triggering programmable network device450, an asynchronous access to the persistent memory is achieved.

Alternatively or additionally, in order to describe the technical solution of the present disclosure in more detail,FIG.5illustrates a flow chart of another process500of moving data by means of a programmable network device according to an embodiment of the present disclosure. Process500for moving data according to the embodiment of the present disclosure is now described with reference toFIG.5. For ease of understanding, specific examples mentioned in the following description are all illustrative and are not intended to limit the protection scope of the present disclosure.

As shown inFIG.5, in the process of utilizing the programmable network device to move the data on the basis of the metadata, at502, the data may be transmitted, on the basis of the source position or source address indicated in the metadata, to a first programmable network device associated with the persistent memory. Next, at504, the first programmable network device transmits the data to a second programmable network device through a network, the second programmable network device being different from the first programmable network device. At last, at506, the second programmable network device moves the received data to the destination position or destination address of an additional persistent memory associated with the second programmable network device. It should be understood that the premise of the above operation is that the source position and the destination position indicated in the metadata are located in different persistent memories, respectively.

FIG.6illustrates a schematic diagram of another scenario600of moving data by means of a programmable network device according to an embodiment of the present disclosure. Scenario600may include user space610, kernel space620, and hardware630. InFIG.6, user space610includes application640and application650, and hardware630includes first programmable network device660and second programmable network device670. It should be understood that both application640and application650in user space610may be mapped to persistent memories (for example, to different persistent memories, respectively), so an operation on application640and application650in scenario600may be regarded as an operation on the data in the persistent memories.

First programmable network device660may at least include data cache661, and second programmable network device670may at least include data cache671. Application640at least includes user address spaces641, and application650at least includes user address space651. As shown inFIG.6, user address spaces641and651are respectively used for indicating a source position and a destination position of the data that the user intends to move, and the source position and the destination position are located in different persistent memories, respectively. In order to move the data, the computing device may issue metadata associated with the data to first programmable network device660, so that first programmable network device660may acquire, on the basis of the metadata, the data that the user intends to move, from user address space641. Thus, first programmable network device660may send the acquired data and the metadata of the data to second programmable network device670through network680, and second programmable network device670may send the received data to user address space651on the basis of the metadata, thus achieving the operation of asynchronously accessing the data.

Specifically, first programmable network device660may acquire, on the basis of the source position or source address indicated in the metadata, the data that the user intends to move from user address space641in application640. In some embodiments, the data may be packaged in the form of a data cache before being transmitted to first programmable network device660, and the data will be transmitted to a specific position, such as data cache661, in first programmable network device660. Next, first programmable network device660may move the received data to a specific position, such as data cache671, in second programmable network device670. Thus, second programmable network device670may move the received data to the destination position or destination address, i.e., user address space651in application650inFIG.6. In this way, the process of moving the data does not generate an overhead in kernel space620, thus significantly saving the computing resources of the CPU. In addition, since the main work of data transmission is completed by the computing device by triggering first programmable network device660and second programmable network device670, an asynchronous access to the persistent memory is achieved.

By means of the above-mentioned embodiments, a programmable network device with an RDMA function can be used to perform the operation of accessing the data, so that an originally synchronous persistent memory access operation can be packaged as an asynchronous access operation. In addition, since the data access operation does not occupy the kernel space, the computing resources of the CPU are saved.

FIG.7illustrates a block diagram of example device700that may be configured to implement embodiments of the present disclosure. For example, electronic device700may be configured to implement computing device221as shown inFIG.2. As shown in the figure, electronic device700includes central processing unit (CPU)701that may perform various appropriate actions and processing according to computer program instructions stored in read-only memory (ROM)702or computer program instructions loaded from storage unit708to random access memory (RAM)703. Various programs and data required for the operation of device700may also be stored in RAM703. CPU701, ROM702, and RAM703are connected to each other through bus704. Input/Output (I/O) interface705is also connected to bus704.

A plurality of components in device700are connected to I/O interface705, including: input unit706, such as a keyboard and a mouse; output unit707, such as various types of displays and speakers; storage unit708, such as a magnetic disk and an optical disc; and communication unit709, such as a network card, a modem, and a wireless communication transceiver. Communication unit709allows device700to exchange information/data with other devices via a computer network, such as the Internet, and/or various telecommunication networks.

Processing unit701performs the various methods and processing described above, such as processes300and400. For example, in some embodiments, the various methods and processing described above may be implemented as a computer software program or a computer program product, which is tangibly included in a machine-readable medium, such as storage unit708. In some embodiments, part or all of the computer program may be loaded and/or installed onto device700via ROM702and/or communication unit709. When the computer program is loaded into RAM703and executed by CPU701, one or a plurality of steps of any process described above may be implemented. Alternatively, in other embodiments, CPU701may be configured in any other suitable manners (for example, by means of firmware) to perform a process such as processes300and400.

The present disclosure may be a method, an apparatus, a system, and/or a computer program product. The computer program product may include a computer-readable storage medium on which computer-readable program instructions for performing various aspects of the present disclosure are loaded.

Various implementations of the present disclosure have been described above. The foregoing description is illustrative rather than exhaustive, and is not limited to the disclosed implementations. Numerous modifications and alterations are apparent to persons of ordinary skill in the art without departing from the scope and spirit of the illustrated implementations. The selection of terms used herein is intended to best explain the principles and practical applications of the implementations or the improvements to technologies on the market, or to enable other persons of ordinary skill in the art to understand the implementations disclosed herein.