Trans-impedance amplifier and optical receiver including the same

A TIA converts a current signal received at its terminal to a voltage signal. The TIA includes an amplifier that includes an input node connected to the terminal and that converts a current signal received at the input node to a voltage signal; a first diode whose cathode is connected to the terminal; a second diode whose anode is connected to the terminal; a first current source connected to an anode of the first diode, the first current source supplying a first forward current to the first diode; a second current source connected to a cathode of the second diode, the second current source supplying a second forward current to the second diode; and a controller that controls forward currents respectively generated by the first current source and the second current source in accordance with an increase and decrease in the voltage signal.

CROSS-REFERENCE TO RELATED APPLICATIONS

This claims priority under 35 U.S.C. § 119(a) to Japanese Patent Application No. 2015-235891, filed in Japan on Dec. 2, 2015, the entire contents of which are hereby incorporated herein by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a trans-impedance amplifier and an optical receiver including the same.

2. Description of the Related Art

An optical line terminal (OLT) is used in a station in an optical access system where the station is connected to a plurality of homes by optical fiber cables. To receive optical signals from the homes, the OLT uses an optical receiver including a photo detector, a trans-impedance amplifier, and so forth. In the optical receiver, the photo detector converts an optical signal to a current signal, and the trans-impedance amplifier amplifies the current signal, converts the amplified signal to a voltage signal, and outputs the voltage signal.

SUMMARY OF THE INVENTION

An aspect of the present invention relates to a trans-impedance amplifier that converts a current signal to a voltage signal, including: a terminal that receives the current signal; an amplifier that includes an input node connected to the terminal, the amplifier converting an input current received via the input node to the voltage signal; a first diode having an anode and a cathode, the cathode being connected to the terminal; a second diode having an anode and a cathode, the anode being connected to the terminal; a first current source connected to the anode of the first diode, the first current source supplying a first forward current to the first diode; a second current source connected to the cathode of the second diode, the second current source supplying a second forward current to the second diode; and a controller that controls the first current source and the second current source in order that the first forward current and the second forward current are increased, when the amplitude of the voltage signal increases, and that the first forward current and the second forward current are decreased, when the amplitude of the voltage signal decreases.

An aspect of the present invention relates to an optical receiver including: an optical receiving section that converts an optical signal to a current signal; and a trans-impedance amplifier that converts the current signal to a voltage signal. The trans-impedance amplifier includes: a terminal that receives the current signal; an amplifier that includes an input node connected to the terminal, the amplifier converting an input current received via the input node to the voltage signal; a first diode having an anode and a cathode, the cathode being connected to the terminal; a second diode having an anode and a cathode, the anode being connected to the terminal; a first current source connected to the anode of the first diode, the first current source supplying a first forward current to the first diode; a second current source connected to the cathode of the second diode, the second current source supplying a second forward current to the second diode; and a controller that controls the first current source and the second current source in order that the first forward current and the second forward current increase and decrease in accordance with an increase and decrease in the voltage signal.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

A communication system using a passive optical network (PON) system will be described as an example of an optical access system according to an embodiment of the present invention.FIG. 1Ais a block diagram illustrating an exemplary configuration of an optical access system using the PON system. An optical line terminal (OLT)82in a station80is connected to an optical network unit (ONU)72in each of homes70ato70cvia signal paths L1and L2configured by optical fiber cables. The OLT82is connected to an optical splitter74via one signal path L1. The optical splitter74is connected one-to-one to the ONUs72via the signal paths L2configured by optical fiber cables. The optical splitter74couples the signal path L1to the signal paths L2, thereby enabling mutual transmission of optical signals.

The OLT82outputs an optical signal, which is to be transmitted to each ONU72, to the signal path L1, and receives an optical signal, which is transmitted from each ONU72, from the signal path L1. The OLT82includes a control circuit84, a transmitter86, and a receiver1. The transmitter86is an optical transmitter that transmits optical signals to each ONU72. The receiver1is an optical receiver that receives optical signals from each ONU72. The control circuit84is a circuit that controls the optical transmitter86and the optical receiver1. An optical signal transmitted by the optical transmitter86and an optical signal received by the optical receiver1have different wavelengths. This enables bi-directional communication with the use of one optical fiber cable.

FIG. 1Bis a schematic diagram illustrating transient change in the signal amplitude of an optical signal input to the optical receiver1. The ONUs72perform time-sharing transmission. Therefore, the OLT82receives an optical signal transmitted from the ONU72in the home70aduring a period Ton1. Next, after a period Toff1where there are no optical signals, the OLT82receives an optical signal from the ONU (not illustrated) in the home70bduring a period Ton2. Furthermore, after a period Toff2where there are no optical signals, the OLT82receives an optical signal from the ONU (not illustrated) in the home70cduring a period Ton3.

Optical signals transmitted from the individual ONUs72have different amplitudes, and their attenuations while being transmitted through the signal paths L2are also different. Therefore, optical signals in the periods Ton1, Ton2, and Ton3(input signal periods) respectively have different amplitudes, namely, amplitudes A1, A2, and A3. The single optical receiver1for a PON system receives many optical signals with different amplitudes by using a time-sharing system. Note that the periods Toff1and Toff2are periods (interval periods) for switching the signal path L2(and the ONU72connected therethrough). As an amplifier used in the optical receiver1, a feedback control circuit for coping with the transient change in the amplitude of an optical signal is used.

Next, the configuration of the optical receiver1will be described in detail.FIG. 2is a circuit diagram of the optical receiver1according to the embodiment of the present invention. Note thatFIG. 2illustrates only part of the configuration of the optical receiver1. The optical receiver1is included in the OLT82as mentioned above. For example, the optical receiver1may include, besides the elements illustrated inFIG. 2, a limiting amplifier (LIA) and a clock data recovery. The LIA converts a voltage signal with fluctuating amplitude to a voltage signal with constant amplitude and outputs this voltage signal. The CDR extracts a clock signal from the signal output from the LIA and recovers the signal by using the extracted clock signal.

FIG. 3is a circuit diagram illustrating the details of the circuit diagram illustrated inFIG. 2.

The optical receiver1is used in, for example, a 10 Gigabit Ethernet Passive Optical Network (10G-EPON) system. As illustrated inFIG. 2, the optical receiver1includes a photo detector PD1and a trans-impedance amplifier (TIA)10.

The photo detector PD1converts an optical signal, which the optical receiver1receives, to an electrical signal, which is more specifically a current signal. The photo detector PD1is, for example, an avalanche photo diode (APD). The cathode of the photo detector PD1is connected to a power supply VPD. The anode of the photo detector PD1is connected to an input terminal Tin of the TIA10. The input terminal Tin receives a current signal Ipd (photocurrent), which the photo detector PD1converts the optical signal to. That is, the TIA10receives the current signal Ipd, output from the photo detector PD1, via the input terminal Tin.

The TIA10amplifies the current signal Ipd, converts the amplified signal to a voltage signal. The TIA10provides the voltage signal to an LIA (not illustrated) via an output node Tout. Note that the TIA10and the LIA (not illustrated) are AC-coupled by a capacitor (not illustrated).

As illustrated inFIG. 2, the TIA10includes a TIA core12, a controller14, current sources I1and I2(a first current source and a second current source), and diodes D1and D2(a first diode and a second diode).

The TIA core12includes an amplifier13and a feedback resistor RF. The TIA core12converts the input current signal Iin to a voltage signal with performing amplification, and outputs the voltage signal as a voltage signal Vtia. The TIA core12includes an input node Cin, which is connected to the input terminal Tin of the TIA10. Therefore, the TIA core12receives the current signal Iin via the input node Cin, and converts the current signal Iin to the voltage signal Vtia. The TIA core12is further connected to the anode of the photo detector PD1via the input terminal Tin. The current signal Iin is a part of the current signal Ipd as described later.

The controller14detects a peak voltage value as the amplitude of the voltage signal Vtia, as described later, and outputs a control signal in accordance with the peak voltage value to the current sources I1and I2. The current sources I2and I2supply forward currents as direct currents, respectively. The current sources I1and I2vary the respective forward currents in accordance with the control signal. The controller14generates a control signal for increasing the forward currents supplied by the current sources I1and I2when the peak voltage becomes larger and decreasing the forward currents supplied by the current source I1and I2when the peak voltage becomes smaller. That is, the controller14increases and decreases the forward currents supplied by the current sources I1and I2in accordance with an increase and decrease in the peak voltage value of the voltage signal Vtia.

More specifically, as illustrated inFIG. 3, the controller14includes a peak hold circuit15and a comparator16. The peak hold circuit15detects the peak voltage value of the voltage signal Vtia and holds it for a certain period of time. The comparator16compares the peak voltage value, detected by the peak hold circuit15, with a reference potential Vref, and outputs a control signal in accordance with the comparison result.

Referring back toFIG. 2, the current source I1is connected to an anode D1A of the diode D1, and supplies a forward current (first forward current) to the diode D1. Here, a forward current is a current that flows from the anode to the cathode of a diode. The current source I1increases and decreases the forward current supplied to the diode D1in accordance with the control signal output from the controller14. The current source I1is connected between a power supply Vcc and the anode D1A of the diode D1. The current source I2is connected to a cathode D2K of the diode D2, and supplies a forward current (second forward current) to the diode D2. The current source I2increases and decreases the forward current supplied to the diode D2in accordance with the control signal, like the current source1. The current source I2is connected between the cathode D2K of the diode D2and the ground. The more detailed configuration of the current sources I1and I2will be described with reference toFIG. 3.

As illustrated inFIG. 3, the current source I1includes transistors Q1(first transistor), Q3(third transistor), and Q4(fourth transistor). The current source I2includes a transistor Q2(second transistor). The controller14generates a control signal in accordance with the peak voltage value of the voltage signal Vtia, and controls at least the transistors Q1and Q2using the control signal.

The transistors Q2and Q4are both NPN transistors and have similar physical arrangement, for example area of the emitter. The bases (control terminals) of the transistors Q2and Q4are both connected to the controller14. That is, the bases (control terminals) of the transistors Q2and Q4are connected to an output terminal of the comparator16. Thus, the comparator16provides a control signal to the bases of the transistors Q2and Q4. The emitters (first current terminals) of the transistors Q2and Q4are grounded. The collector (second current terminal) of the transistor Q2is connected to the cathode D2K of the diode D2, and the collector (second current terminal) of the transistor Q4is connected to the collector (second current terminal) of the transistor Q3.

The transistors Q1and Q3are both PNP transistors and have similar physical arrangement, for example, base width, doping concentration in the base area, emitter size, and so forth. The collector (second current terminal) of the transistor Q3is connected to the collector (second current terminal) of the transistor Q4, and to the base (control terminal) of the transistor Q3. The base (control terminal) of the transistor Q3is connected to the base (control terminal) of the transistor Q1. The collector (second current terminal) of the transistor Q1is connected to the anode D1A of the diode D1. The collector (second current terminal) of the transistor Q1supplies a forward current (first forward current) to the diode D1.

The transistors Q1and Q3configure a current mirror circuit17. That is, a collector current output from the collector (second current terminal) of the transistor Q3becomes an input current (reference current) of the current mirror circuit17, and a collector current output from the collector (second current terminal) of the transistor Q1becomes an output current (mirror current) of the current mirror circuit17. The output current is directly proportional to the input current. Therefore, for example, the current value of the collector current of the transistor Q1can be made equal to the current value of the collector current of the transistor Q3by setting the physical arrangement, for example size of emitter, of the transistor Q1and the physical arrangement of the transistor Q3to be identical. That is, at this time, the current mirror circuit17outputs an output current (mirror current) that has the same magnitude as the input current (reference current).

In the current source I2, the transistor Q2outputs a collector current from the collector (second current terminal) and supplies a forward current (second forward current) to the diode D2. The collector current of the transistor Q2flows from the collector (second current terminal) to the emitter (first current terminal). The transistor Q2receives a control signal at its base (control terminal), and increases and decreases the collector current in accordance with the control signal. In doing so, the transistor Q2increases and decreases the forward current supplied to the diode D2in accordance with the control signal.

In the current source I2, the magnitude of the collector current of the transistor Q2can be made equal to the magnitude of the collector current of the transistor Q4by setting the physical arrangement, for example, area of the emitter, of the transistor Q2to be identical to the physical arrangement of the transistor Q4of the current mirror circuit17. At the same time, in the current mirror circuit17, the electrical characteristics of the transistors Q1, Q3, and Q4are set in order that the magnitude of the collector current of the transistor Q1becomes equal to the magnitude of the collector current of the transistor Q4. In doing so, the magnitude of the forward current (first current) supplied from the transistor Q1of the current source I1to the diode D1can be made equal to the magnitude of the forward current (second current) supplied from the transistor Q2of the current source I2to the diode D2.

The emitters (first current terminals) of the transistors Q1and Q3are both connected to the power supply Vcc. For example, the electrical characteristics of the transistors Q2and Q4are set in order that the ratio of the magnitude of the collector current of the transistor Q2and the magnitude of the collector current of the transistor Q4becomes K:1 (K is a real number greater than or equal to 1). Furthermore, the electrical characteristics of the transistors Q1and Q3are set in order that the ratio of the magnitude of the output current (mirror current) of the current mirror circuit17(collector current of the transistor Q1) and the magnitude of the input current (collector current of the transistor Q3) becomes K:1. In doing so, because the collector current of the transistor Q3is equal to the collector current of the transistor Q4, the collector current (second forward current) of the transistor Q2and the collector current (first forward current) of the transistor Q1can be made equal. Accordingly, the magnitude of a current flowing from the power supply Vcc to the ground via the transistors Q3and Q4can be made smaller than the magnitude of the first forward current and the second forward current. Since current flowing through the transistors Q3and Q4of the current source I1does not contribute to the amplifying operation of the TIA10, the power consumption of the TIA10can be reduced by decreasing the current flowing through the transistors Q3and Q4.

Referring back toFIG. 2, the diode D1is connected between the current source I1and the input terminal Tin. More specifically, the cathode D1K of the diode D1is connected to the input terminal Tin, and the anode D1A of the diode D1is connected to the current source I1. The cathode D1K of the diode D1is also connected to the anode D2A of the diode D2. The anode D1A of the diode D1is grounded via a capacitor C1(first capacitor).

The diode D2is connected between the input terminal Tin and the current source I2. More specifically, the anode D2A of the diode D2is connected to the input terminal Tin, and the cathode D2K of the diode D2is connected to the current source I2. The anode D2A of the diode D2is also connected to the cathode D1K of the diode D1. The cathode D2K of the diode D2is grounded via a capacitor C2(second capacitor). The diodes D1and D2have identical electrical characteristics.

Next, referring toFIGS. 2 and 3, the operation of the above-mentioned optical receiver1will be described. In the optical receiver1, the photo detector PD1converts an optical signal to a current signal Ipd (photocurrent). Part of the current signal Ipd is input as the current signal Iin to the TIA core12. The TIA core12amplifies the current signal Iin, converts the amplified signal to a voltage signal, and outputs the voltage signal as a voltage signal Vtia.

Next, the peak hold circuit15of the controller14detects the peak voltage value of the voltage signal Vtia, output from the TIA core12. The comparator16of the controller14compares the peak voltage value, detected by the peak hold circuit15, with the reference potential Vref, and outputs a control signal in accordance with the comparison result. The peak voltage value is treated as a value equivalent to the amplitude of the voltage signal Vtia, for example, when the bottom voltage value of the voltage signal Vtia is kept in a constant value.

For example, when the waveform of the voltage signal Vtia is such that its low level is always fixed to a constant reference potential, like the waveforms of the optical signals illustrated inFIG. 1B, the peak voltage value becomes equal to the voltage amplitude. Conversely, when the high level of the waveform of the voltage signal Vtia is fixed to a constant reference potential, a bottom hold circuit that detects a bottom voltage value may be used instead of a peak hold circuit. In that case, the difference between the reference potential and the bottom voltage value becomes equal to the voltage amplitude.

A control signal output from the comparator16is input to the bases of the transistors Q2and Q4. Here, the transistors Q1and Q3configure the current mirror circuit17. The collector (second current terminal) of the transistor Q3is connected to the collector (second current terminal) of the transistor Q4, and to the base (control terminal) of the transistor Q3. Furthermore, the base (control terminal) of the transistor Q3is connected to the base (control terminal) of the transistor Q1. The collector (second current terminal) of the transistor Q1is connected in series with the collector (second current terminal) of the transistor Q2via the diodes D1and D2. With the configuration of these transistors Q1to Q4, the magnitude of the forward current (first forward current) supplied by the current source I1to the diode D1and the magnitude of the forward current (second forward current) supplied by the current source I2to the transistor Q2can be made equal. Note that the collector currents of the transistors Q1to Q4and the forward currents supplied to the diodes D1and D2are all direct currents.

When the peak voltage value detected by the peak hold circuit15is small, the forward currents supplied by the current sources I1and I2are small; thus, the impedances of the diodes D1and D2become relatively high values in comparison with input impedance of the TIA core12. At this time, almost all of the current signal Ipd straight flows into the TIA core12. This point is necessary for keeping the noise in the input signal Iin small in signal amplification performed by the TIA core12.

In contrast, when the peak voltage value of the voltage signal Vtia becomes large and the forward currents (direct currents) supplied by the current sources I1and I2are increased, the impedances of the diodes D1and D2become relatively small values in comparison with the input impedance of the TIA core12. When the impedances of the diodes D1and D2become values less than a certain value, high frequency components of the current signal Ipd starts to flow as bypass currents Ibc through the diodes D1and D2to the ground.

Accordingly, the current signal Iin input to the TIA core12has a magnitude obtained by subtracting two bypass currents Ibc from the current signal Ipd. The TIA core12amplifies the current signal Iin, from which the two bypass currents Ibc have been subtracted, and outputs the voltage signal Vtia. As has been described above, when the amplitude of the voltage signal Vtia becomes larger than a value set by the reference potential Vref, part of the current signal Ipd is branched to the diodes D1and D2, thereby lowering the magnitude of the current signal Iin input to the TIA core12.

Next, advantages achieved by the optical receiver1according to the embodiment of the present application will be described.

In the optical receiver1according to the embodiment of the present application, the TIA core12amplifies the current signal Ipd, converts the amplified signal to a voltage signal, and outputs this voltage signal as the voltage signal Vtia. The peak hold circuit15detects the peak voltage value of the voltage signal Vtia. The comparator16compares the peak voltage value, output from the peak hold circuit15, with the reference potential Vref, and generates a control signal in accordance with the comparison result. In accordance with the control signal, the transistor Q1of the current source I1supplies a forward current (first forward current) to the diode D1, and the transistor Q2of the current source I2supplies a forward current (second forward current) to the diode D2. In this configuration, the larger the peak voltage value of the voltage signal Vtia output from the TIA core12, the larger the forward currents (first forward current and second forward current) supplied from the transistors Q1and Q2to the diodes D1and D2, respectively.

As the forward currents supplied from the transistors Q1and Q2become larger, the impedances of the diodes D1and D2, through which these forward currents flow, become smaller. The cathode D1K of the diode D1and the anode D2A of the diode D2are both connected to the output terminal of the photo detector PD1through the input terminal Tin. When the impedances of the diodes D1and D2decrease to a certain degree, part of the current signal Ipd output from the photo detector PD1starts to flow as bypass currents Ibc through the diodes D1and D2. With this mechanism, when the peak voltage value of the voltage signal Vtia output from the TIA core12becomes large, the bypass currents Ibc flowing from the photo detector PD1to the diodes D1and D2can be increased, thereby reducing the current signal Iin input to the TIA core12. Therefore, in the amplifying operation of the TIA core12, the current signal Iin can be prevented from becoming so large that the amplitude of the voltage signal Vtia is saturated. Accordingly, the linearity of the output signal Vtia with respect to the input signal Iin of the TIA core12can be secured.

The optical receiver1according to the embodiment of the present invention includes the diode D1whose cathode D1K is connected to the output terminal of the photo detector PD1, the diode D2whose anode D2A is connected to the output terminal of the photo detector PD1, and the current sources I1and I2for supplying forward currents to the diodes D1and D2, respectively. Instead of this configuration, for example, an optical receiver101according to a comparative example illustrated inFIG. 4will be discussed. The optical receiver101according to the comparative example includes the diode D1and the current source I1, but includes neither the diode D2nor the current source I2, compared with the optical receiver1according to the embodiment of the present invention.

The current-voltage characteristics of a diode are generally non-linear, as illustrated inFIG. 5. Thus, the impedance of a diode varies in accordance with the magnitude of a direct current flowing through the diode. For example, the differential coefficient (slope) of a curve indicating the current-voltage characteristics illustrated inFIG. 5corresponds to the conductance, and the impedance corresponds to the reciprocal of the conductance. Here, a positive current corresponds to a forward current. Therefore, the impedance becomes larger (slope becomes smaller) as the forward current becomes smaller, and the impedance becomes smaller (slope becomes larger) as the forward current becomes larger. Accordingly, the diode that receives a larger bias current (forward current) flowing therein provides lower impedance (higher conductance) of the diode to an electrical element connected to the diode. Specifically, the impedance steeply varies around a value of bias current, which corresponds to a threshold voltage of the diode.

Due to the non-linearity of a diode as shown inFIG. 5, the linearity of the output signal Vtia with respect to the input signal Iin of the TIA core12may not be secured. Thus, like the optical receiver101according to the comparative example illustrated inFIG. 4, a configuration that only includes the diode D1on the supply voltage Vcc side may be unable to secure the linearity of the output signal Vtia with respect to the input signal fin because of the non-linearity of a diode.

With regard to this point, the optical receiver1according to the embodiment of the present invention includes not only the diode D1, connected in the forward direction between the output terminal of the photo detector PD1and the supply voltage Vcc, but also the diode D2, connected in the forward direction between the output terminal of the photo detector PD1and the ground potential. The impedances of the two diodes D1and D2vary so as to mutually compensate for the non-linearity characteristics thereof. Thus, the non-linearity characteristics of the two diodes D1and D2are cancelled out each other. The two diodes D1and D2are provided symmetrically on a higher-potential side and a lower-potential side with reference to the input signal, thereby cancelling out the non-linear characteristics thereof. Accordingly, the non-linearity of each diode can be improved apparently. Thus, the configuration of the diodes according to the embodiment of the present invention improves the non-linearity of each diode and more suitably improves the linearity of the output signal of the TIA core12.

The advantage of improving the linearity of the output signal of the optical receiver1according to the embodiment of the present invention will be described with reference toFIGS. 6 and 7.

InFIG. 6, the horizontal axis represents the optical input power [dBm] of an optical signal input to the optical receiver1, and the vertical axis represents the output amplitude [V] of the voltage signal Vtia. In the line graph, a solid line segment represents the results obtained by the optical receiver1according to the embodiment of the present invention, a dashed line segment represents the results obtained by the optical receiver101according to the comparative example, and a dash-dot line segment represents the results obtained by an optical receiver including neither the diodes D1and D2nor the current sources I1and I2. As illustrated inFIG. 6, in the optical receiver1and the optical receiver101according to the comparative example, the output amplitude gradually increase even in a region where the optical input power is relatively large, because an increase in the current signal Iin input to the TIA core12is suppressed as described above. In contrast, in the optical receiver without the two diodes connected to the input terminal, the output amplitude of the voltage signal Vtia becomes larger as the optical input power becomes larger, thereby deteriorating the linearity.

InFIG. 7, the horizontal axis represents the optical input power [dBm] of an optical signal input to the optical receiver, and the vertical axis represents the total harmonic distortion (THD) [%] of a voltage signal output by the TIA core. In the line graph, a solid line segment represents the results obtained by the optical receiver1according to the embodiment of the present invention, a dashed line segment represents the results obtained by the optical receiver101according to the comparative example, and a dash-dot line segment represents the results obtained by an optical receiver including neither the diodes D1and D2nor the current sources I1and I2. Note that the THD indicates the proportion of higher harmonics included in an output signal when, for example, a 1-GHz sine wave serves as an input signal. In general, the smaller the THD, the smaller the distortion, and the better the linearity of the output signal with respect to the input signal. As illustrated inFIG. 7, the distortion (factor) of the optical receiver1is kept small, compared with the optical receiver101according to the comparative example and the optical receiver without the diodes D1and D2. In particular, even when the optical input power is large, the distortion (factor) of the optical input power1is kept small, compared with optical receivers with other configurations.

The optical receiver1according to the embodiment of the present invention is better than the optical receiver101according to the comparative example in terms of power consumption reduction. The advantage of power consumption reduction will be described with reference toFIG. 8. InFIG. 8, the horizontal axis represents the optical input power [dBm] of an optical signal input to the optical receiver, and the vertical axis represents a bias current [A] flowing through a diode connected to the input terminal Tin. The bias current corresponds to a direct current that has been referred to as a forward current in the above description. In the line graph, a solid line segment represents the results obtained by the optical receiver1according to the embodiment of the present invention, and a dashed line segment represents the results obtained by the optical receiver101according to the comparative example. The bias current is a direct current (forward current) supplied by a current source to a diode. The diode in which a larger bias current (forward current) is flowing provides lower impedance (higher conductance) of the diode to an element connected to the diode. As illustrated inFIG. 8, the bias current is smaller in the optical receiver1than in the optical receiver101according to the comparative example.

This is because the optical receiver1where the diodes D1and D2are connected to a higher-potential side and a lower-potential side of an input signal requires smaller bias current for obtaining the same impedance, compared with, for example, the optical receiver101where only one diode is connected to a higher-potential side. In other words, given bias currents with the same magnitude, the reduction ability of the optical receiver1is twice as that of the optical receiver101. This is because only one diode is connected to the input terminal Tin in the optical receiver101, whereas the number of diodes is twice in the optical receiver1.

More specifically, in the optical receiver1according to the embodiment of the present invention, the magnitude of a forward current supplied by the transistor Q1of the current source I1is substantially equal to the magnitude of a forward current supplied by the transistor Q2of the current source I2. Accordingly, the impedances of the diodes D1and D2can be made values that are substantially equal by setting the electrical characteristics of the diodes D1and D2to be identical. In doing so, the bypass current Ibc flowing from the photo detector PD1to the diode D1and the bypass current Ibc flowing from the photo detector PD1to the diode D2become substantially equal, and the advantage of cancelling out the non-linearity characteristics of the diodes D1and D2described above can be more suitably exhibited.

Note that the forward currents supplied by the current source I1(transistor Q1) and the current source I2(transistor Q2) are direct currents (bias currents) as described above, and are controlled in accordance with the amplitude of the voltage signal Vtia in order to adjust the impedances of the diodes D1and D2.

In contrast, the current signals Ipd and Iin and the bypass currents Ibc are high-frequency signals (alternating currents), and are not directly affected by direct currents supplied by the current source I1(transistor Q1) and the current source I2(transistor Q2). Thus, the magnitude of the bypass currents Ibc varies in accordance with the impedances of the diodes D1and D2, and a current obtained by subtracting the bypass currents Ibc from the current signal Ipd is input as the current signal fin to the TIA core12.

From the above, the optical receiver1is better than optical receivers with other configurations in terms of power consumption reduction.

In the optical receiver1according to the embodiment of the present invention, the transistor Q1of the current source I1and the transistor Q2of the current source I2are included in the same TIA10. The collector (second current terminal) of the transistor Q3is connected to the collector (second current terminal) of the transistor Q4and to the base (control terminal) of the transistor Q3; the base (control terminal) of the transistor Q3is connected to the base (control terminal) of the transistor Q1; and the collector (second current terminal) of the transistor Q1is connected in series with the collector (second current terminal) of the transistor Q2via the diodes D1and D2. The transistors Q1and Q3are set to have similar physical arrangement, and the transistors Q2and Q4have similar physical arrangement, too. With such a configuration, the magnitude of a forward current supplied by the transistor Q1and the magnitude of a forward current supplied by the transistor Q2can be easily made substantially equal.

The anode D1A of the diode D1and the cathode D2K of the diode D2are grounded via the capacitors C1and C2, respectively. In doing so, the diode D1and the diode D2can be short-circuited at the ground potential in terms of alternating current. Accordingly, the diode D1and the diode D2can serve as a bypass circuit for splitting the bypass current Ibc from the photo detector PD1side.

Although the embodiment of the present invention has been described above, the present invention is not limited to the above-described embodiment. For example, although it has been described that the value of a forward current supplied by the first current source is identical to the value of a forward current supplied by the second current source, the present invention is not limited to this case, and these forward currents may have different values. Although it has been described that the first current source and the second current source are included in the same current mirror circuit, the present invention is not limited to this case.

Although it has been described that the controller14detects the peak voltage value of the voltage signal Vtia output from the TIA core12, the present invention is not limited to this case, and the controller14may detect, for example, the average of output signals Vtia.