Solid-state imaging device, method of driving the same, and electronic apparatus

A solid-state imaging device includes a pixel array unit in which a plurality of imaging pixels configured to generate an image, and a plurality of phase difference detection pixels configured to perform phase difference detection are arranged, each of the plurality of phase difference detection pixels including a plurality of photoelectric conversion units, a plurality of floating diffusions configured to convert charges stored in the plurality of photoelectric conversion units into voltage, and a plurality of amplification transistors configured to amplify the converted voltage in the plurality of floating diffusions.

CROSS REFERENCE TO RELATED APPLICATIONS

This application claims the benefit of Japanese Priority Patent Application JP 2013-230219 filed Nov. 6, 2013, the entire contents of which are incorporated herein by reference.

BACKGROUND

The present disclosure relates to a solid-state imaging device, a method of driving the solid-state imaging device, and an electronic apparatus, and particularly to a solid-state imaging device, a method of driving the solid-state imaging device, and an electronic apparatus that can improve autofocusing (AF) speed and accuracy.

A solid-state imaging device that performs AF with so-called a phase difference detection method in which an imaging pixel and a phase difference detection pixel are provided in a pixel array unit and AF is performed based on the amount of displacement between signals output from a pair of phase difference detection pixels has been known.

In some of these solid-state imaging devices, the number of phase difference detection pixels is increased and the AF accuracy is improved by providing two photoelectric conversion units in a pixel (see, for example, Japanese Patent Application Laid-open No. 2012-165070 and Japanese Patent Application Laid-open No. 2007-243744).

SUMMARY

In the phase difference detection pixel disclosed in Japanese Patent Application Laid-open No. 2012-165070, however, because the two photoelectric conversion units share one amplification transistor, it may be impossible to expose and read from the two photoelectric conversion units simultaneously, which makes AF tracking capabilities with respect to a fast-moving subject insufficient.

On the other hand, in the phase difference detection pixel disclosed in Japanese Patent Application Laid-open No. 2007-243744, by providing a charge storage unit configured to store charges for each photoelectric conversion unit, it is possible to expose and read from the two photoelectric conversion units simultaneously.

However, by providing a charge storage unit, the area of the photoelectric conversion unit decreases. As a result, the sensitivity of the phase difference detection pixel and the AF accuracy are reduced.

The present disclosure had been made in view of the above circumstances, and it is desirable to improve the AF speed and accuracy.

According to an embodiment of the present disclosure, there is provided a solid-state imaging device, including a pixel array unit in which a plurality of imaging pixels configured to generate an image, and a plurality of phase difference detection pixels configured to perform phase difference detection are arranged, each of the plurality of phase difference detection pixels including a plurality of photoelectric conversion units, a plurality of floating diffusions configured to convert charges stored in the plurality of photoelectric conversion units into voltage, and a plurality of amplification transistors configured to amplify the converted voltage in the plurality of floating diffusions.

In each of the plurality of phase difference detection pixels, at least one of the plurality of photoelectric conversion units may share the floating diffusion and the amplification transistor with at least one of the plurality of imaging pixels, which is adjacent to the phase difference detection pixel.

The phase difference detection pixel may include a first photoelectric conversion unit and a second photoelectric conversion unit, the first photoelectric conversion unit may share the floating diffusion and the amplification transistor with a first imaging pixel adjacent to the phase difference detection pixel, and the second photoelectric conversion unit may share the floating diffusion and the amplification transistor with a second imaging pixel that is different from the first imaging pixel and is adjacent to the phase difference detection pixel.

The phase difference detection pixel and the first imaging pixel may be included in one pixel sharing unit, and the second imaging pixel may be included in another pixel sharing unit.

According to an embodiment of the present disclosure, there is provided a method for driving a solid-state imaging device that includes a pixel array unit in which a plurality of imaging pixels configured to generate an image, and a plurality of phase difference detection pixels configured to perform phase difference detection are arranged, each of the plurality of phase difference detection pixels including a plurality of photoelectric conversion units, a plurality of floating diffusions configured to convert charges stored in the plurality of photoelectric conversion units into voltage, and a plurality of amplification transistors configured to amplify the converted voltage in the plurality of floating diffusions, the method including storing charges in the plurality of photoelectric conversion units, and reading signals corresponding to the charges stored in the plurality of photoelectric conversion units, by the solid-state imaging device, in the phase difference detection pixel.

According to an embodiment of the present disclosure, there is provided an electronic apparatus, including a solid-state imaging device that includes a pixel array unit in which a plurality of imaging pixels configured to generate an image, and a plurality of phase difference detection pixels configured to perform phase difference detection are arranged, each of the plurality of phase difference detection pixels including a plurality of photoelectric conversion units, a plurality of floating diffusions configured to convert charges stored in the plurality of photoelectric conversion units into voltage, and a plurality of amplification transistors configured to amplify the converted voltage in the plurality of floating diffusions.

According to an embodiment of the present disclosure, a plurality of FDs convert charges stored in the photoelectric conversion units into voltage in the phase difference detection pixel, and a plurality of amplification transistors amplify the voltage of the FDs.

According to an embodiment of the present disclosure, it is possible to improve the AF speed and accuracy.

DETAILED DESCRIPTION OF EMBODIMENTS

Functional Configuration Example of Electronic Apparatus

FIG. 1is a block diagram showing a configuration example of an electronic apparatus including a solid-state imaging device to which an embodiment of the present disclosure is applied.

An electronic apparatus1is configured as a digital camera, a portable terminal having imaging capabilities, or the like, and is configured to capture an image of an object with an autofocusing (AF) function to generate a captured image, and store the image as a still image or moving image. Hereinafter, the assumption is made that mainly a still image is recorded.

The electronic apparatus1includes a lens unit11, an operating unit12, a controller13, an image sensor14, a signal processing unit15, a storage unit16, a display unit17, a focus determination unit18, and a driving unit19.

The lens unit11is configured to collect light from an object (object light). The object light collected by the lens unit11enters the image sensor14.

The lens unit11includes a zoom lens21, a diaphragm22, and a focus lens23.

The zoom lens21is configured to move in an optical axis direction by driving of the driving unit19, thereby changing the focal length to adjust the magnification of an object in a captured image. The diaphragm22is configured to change the degree of opening by driving of the driving unit19, thereby adjusting the amount of object light to be incident on the image sensor14. The focus lens23is configured to move in an optical axis direction by driving of the driving unit19, thereby adjusting the focus.

The operating unit12is configured to receive a user's operation. The operating unit12supplies an operation signal to the controller13in the case where a shutter button (not shown) is pressed, for example. The operation signal indicates that a shutter button is pressed.

The controller13is configured to control the operation of respective units of the electronic apparatus1.

For example, in the case where the controller13receives an operation signal indicating that a shutter button is pressed, the controller13supplies an instruction of recording a still image to the signal processing unit15. In addition, the controller13supplies an instruction of generating a live view image to the signal processing unit15to display the live view image on the display unit17. The live view image is a real-time image of an object.

In addition, the controller13supplies an instruction of performing focus determining operation (phase difference detection operation) to the signal processing unit15to determine focus with use of a phase difference detection method. The phase difference detection method is a focus detection method in which light transmitted through an imaging lens is pupil-divided to form a pair of images, and the degree of focus is detected by measuring (detecting phase difference) the interval between the formed images (amount of displacement between images).

The image sensor14is a solid-state imaging device configured to photoelectrically convert received object light into an electric signal.

For example, the image sensor14is realized by a complementary metal oxide semiconductor (CMOS) image sensor, a charge coupled device (CCD) image sensor, or the like. In the case where the image sensor14is a CMOS image sensor, the image sensor14may be front-surface irradiation type image sensor or rear-surface irradiation type image sensor. In addition, in the case where the image sensor14is a rear-surface irradiation type CMOS image sensor, the image sensor14may be configured as a lamination type CMOS image sensor in which a semiconductor substrate including a pixel array unit and a semiconductor substrate including a logic circuit are bonded together.

The image sensor14includes a pixel array unit in which a plurality of pixels (imaging pixels) configured to generate a signal for generating a captured image based on received object light, and a plurality of pixels (phase difference detection pixels) configured to generate a signal for performing phase difference detection are arranged. The image sensor14supplies an electric signal generated by photoelectric conversion to the signal processing unit15.

The signal processing unit15performs various types of signal processing on the electric signal supplied from the image sensor14.

For example, in the case where an instruction of recording a still image is supplied from the controller13, the signal processing unit15generates data of a still image (still image data) and supplies the generated data to the storage unit16. In addition, in the case where an instruction of generating a live view image is supplied from the controller13, the signal processing unit15generates data of a live view image (live view image data) based on a signal output from an imaging pixel in the image sensor14, and supplies the generated data to the display unit17.

In addition, in the case where an instruction of performing phase difference detection operation is supplied from the controller13, the signal processing unit15generates data for detecting phase difference (phase difference detection data) based on a signal output from a phase difference detection pixel in the image sensor14, and supplies the generated data to the focus determination unit18.

The storage unit16is configured to store the image data supplied from the signal processing unit15. The storage unit16is configured as a disk such as a digital versatile disk (DVD), a semiconductor memory such as a memory card, or one or more removable storage media, for example. These storage media may be built in the electronic apparatus1, or may be allowed to be mounted on and removed from the electronic apparatus1.

The display unit17is configured to display an image based on the image data supplied from the signal processing unit15. For example, in the case where the live view image data is supplied from the signal processing unit15, the display unit17displays a live view image. The display unit17is realized by a liquid crystal display (LCD), an electro-luminescence (EL) display, or the like.

The focus determination unit18is configured to determine whether or not an object being a focusing target (focusing target object) is focused based on the phase difference detection data supplied from the signal processing unit15. In the case where an object in a focus area is focused, the focus determination unit18supplies, to the driving unit19, information representing that the object is focused as a focus determination result. In addition, in the case where the focus target object is not focused, the focus determination unit18calculates the amount of displacement of focus (defocus amount), and supplies, to the driving unit19, information representing the calculated defocus amount as a focus determination result.

The driving unit19is configured to drive the zoom lens21, the diaphragm22, and the focus lens23. For example, the driving unit19calculates the amount of driving of the focus lens23based on the focus determination result supplied from the focus determination unit18, and moves the focus lens23depending on the calculated driving amount.

Specifically, in the case where an object is focused, the driving unit19causes the focus lens23to maintain the current position. In addition, in the case where an object is not focused, the driving unit19calculates the driving amount (moving distance) based on the focus determination result representing the defocus amount and the position of the focus lens23, and moves the focus lens23depending on the driving amount.

Regarding Pixel Arrangement of Pixel Array Unit

Next, the pixel arrangement of the pixel array unit of the image sensor14will be described with reference toFIG. 2.

As shown inFIG. 2, in the pixel array unit of the image sensor14, a plurality of imaging pixels31represented by black squares are two-dimensionally arranged in a matrix pattern. The imaging pixel31includes an R pixel, G pixel, and B pixel. These pixels are regularly arranged in a Bayer pattern.

Moreover, in the pixel array unit of the image sensor14, a plurality of phase difference detection pixels32represented by white squares are arranged in a scattered pattern among the plurality of imaging pixels31two-dimensionally arranged in a matrix pattern. Specifically, the phase difference detection pixels32are regularly arranged in a specific pattern by replacing a part of the imaging pixels31in the pixel array unit of the image sensor14. It should be noted that the arrangement of the imaging pixels31and the phase difference detection pixels32in the image sensor14is not limited to the above, and the pixels may be arranged in another pattern.

Detailed Configuration Example of Pixel

FIG. 3shows a detailed configuration example of the imaging pixel31and the phase difference detection pixel32arranged in the pixel array unit.

As shown inFIGS. 3A and 3B, the imaging pixel31includes a photoelectric conversion unit (photodiode)41.

In the imaging pixel31, a signal for generating a captured image is generated based on charges generated by photoelectric conversion of received object light performed by the photoelectric conversion unit41.

Moreover, although not shown, the imaging pixel31at least includes a transfer transistor that transfers charges stored in the photoelectric conversion unit41, a floating diffusion (FD) that stores the charges transferred from the photoelectric conversion unit41and converts the stored charges into voltage, a reset transistor that discharges (resets) charges stored in the FD, and an amplification transistor that amplifies the voltage of the FD and outputs the amplified voltage to a vertical signal line. It should be noted that a selection transistor may be provide between the amplification transistor and the vertical signal line. The selection transistor switches on and off of the output of the voltage of the amplification transistor to the vertical signal line.

On the other hand, the phase difference detection pixel32includes two photoelectric conversion units42A and42B. In the phase difference detection pixel32, a signal for performing phase difference detection is generated based on charges generated by photoelectric conversion of received object light performed by the photoelectric conversion units42A and42B.

Moreover, although not shown, the phase difference detection pixel32includes two transfer transistors, two FDs, two reset transistors, and two amplification transistors corresponding to the photoelectric conversion units42A and42B.

Specifically, the photoelectric conversion units42A and42B share the FD, the reset transistor, and the amplification transistor with the photoelectric conversion unit41of the imaging pixel31adjacent to the phase difference detection pixel32.

For example, as shown by broken lines a inFIG. 3A, the photoelectric conversion unit42A can share the FD, the reset transistor, and the amplification transistor with the photoelectric conversion unit41the imaging pixel31adjacent to the phase difference detection pixel32on the lower side. On the other hand, as shown by broken lines b inFIG. 3A, the photoelectric conversion unit42B can share the FD, the reset transistor, and the amplification transistor with the photoelectric conversion unit41of the imaging pixel31adjacent to the phase difference detection pixel32on the right side.

Moreover, as shown by broken lines c inFIG. 3B, the photoelectric conversion unit42A can share the FD, the reset transistor, and the amplification transistor with the photoelectric conversion unit41of the imaging pixel31adjacent to the phase difference detection pixel32on the lower side. On the other hand, as shown by broken lines d inFIG. 3B, the photoelectric conversion unit42B can share the FD, the reset transistor, and the amplification transistor with the photoelectric conversion unit41of the imaging pixel31adjacent to the phase difference detection pixel32on the upper side.

As described above, because the two photoelectric conversion units42A and42B share the FD and the amplification transistor with different adjacent pixels in the phase difference detection pixel32, the image sensor14can perform exposure (storing charges) of the two photoelectric conversion units42A and42B, and read a signal corresponding to the stored charges simultaneously.

Now, an embodiment in which the photoelectric conversion units42A and42B share the FD, the reset transistor, and the amplification transistor with the photoelectric conversion unit41of the adjacent imaging pixel31will be described.

Configuration Example of First Embodiment

First, a configuration example of an imaging pixel and a phase difference detection pixel according to a first embodiment of the present disclosure will be described with reference toFIGS. 4 and 5.FIG. 4is a plan view showing a configuration example of the imaging pixel and the phase difference detection pixel, andFIG. 5is a circuit diagram showing a configuration example of the imaging pixel and the phase difference detection pixel.

InFIGS. 4 and 5, three imaging pixels31Gr,31Gb, and31R, and the phase difference detection pixel32are shown.

In this example, the phase difference detection pixel32and the imaging pixel31Gr form the configuration in which two vertical pixels are shared, and the imaging pixel31Gb and the imaging pixel31R form the configuration in which two vertical pixels are shared.

Each of the imaging pixels31Gr,31Gb, and31R includes the photoelectric conversion unit41, a transfer transistor51, an FD52, a reset transistor53, an amplification transistor54, a selection transistor55, and an overflow control transistor56that discharges charges stored in the photoelectric conversion unit41.

By providing the overflow control transistor56in the imaging pixels31Gr,31Gb, and31R, it is possible to maintain the optical symmetry between pixels and to reduce the difference of the imaging properties. Furthermore, by switching on the overflow control transistor56, it is possible to suppress the blooming of adjacent pixel.

Moreover, the phase difference detection pixel32includes the photoelectric conversion units42A and42B, the transfer transistor51, the FD52, the reset transistor53, the amplification transistor54, and the selection transistor55corresponding to the photoelectric conversion units42A and42B.

It should be noted that the FD52corresponding to the photoelectric conversion unit42B is shared with the photoelectric conversion unit41of the imaging pixel31Gb.

Furthermore, as shown inFIG. 4, the FD52corresponding to the photoelectric conversion unit42A in the phase difference detection pixel32and the FD52of the imaging pixel31Gr are connected to gate electrodes of the amplification transistor54with respective wirings FDL. Accordingly, the photoelectric conversion unit42A can share the FD52, the amplification transistor54, and the selection transistor55with the photoelectric conversion unit41of the imaging pixel31Gr.

Moreover, the FD52corresponding to the photoelectric conversion unit42B in the phase difference detection pixel32(i.e., the FD52of the imaging pixel31Gb) and the FD52of the imaging pixel31R are connected to gate electrodes of the amplification transistor54with respective wirings FDL. Accordingly, the photoelectric conversion unit42B can share the FD52, the amplification transistor54, and the selection transistor55with the photoelectric conversion unit41of the imaging pixels31Gb and31R.

According to the above configuration, because two photoelectric conversion units share an FD and an amplification transistor of different adjacent pixels in a phase difference detection pixel, it is possible to simultaneously expose and read from the two photoelectric conversion units without providing a charge storage unit and to improve AF speed and accuracy.

Another Configuration Example of First Embodiment

Next, another configuration example of an imaging pixel and a phase difference detection pixel according to the first embodiment of the present disclosure will be described with reference toFIGS. 6 and 7.FIG. 6is a plan view showing a configuration example of the image pixel and the phase difference detection pixel, andFIG. 7is a circuit diagram showing a configuration example of the imaging pixel and the phase difference detection pixel.

It should be noted that between the imaging pixel31Gb,31Gr, and31R and the phase difference detection pixel32shown inFIGS. 6 and 7, and the imaging pixel31Gb,31Gr, and31R and the phase difference detection pixel32shown inFIGS. 4 and 5, a description of components formed in the same way will be omitted.

The imaging pixel31Gr,31Gb, and31R and the phase difference detection pixel32shown inFIGS. 6 and 7include two conversion efficiency switching transistors58for each pixel sharing unit in addition to the components shown inFIGS. 4 and 5. Specifically, the imaging pixel31Gr,31Gb, and31R and the FDs52in the phase difference detection pixel32are connected to respective conversion efficiency switching transistors58.

In the pixel sharing unit (e.g., two pixels of the phase difference detection pixel32and the imaging pixel31Gr), when any one of the two conversion efficiency switching transistors58is turned on, the one conversion efficiency switching transistor58is electrically connected to the FD52. As a result, a floating diffusion area of the FD52is enlarged, the capacity of the FD52increases, and the conversion efficiency is reduced. Moreover, when the two conversion efficiency switching transistors58are turned on, the floating diffusion area of the FD52is further enlarged, and the conversion efficiency is further reduced.

As described above, because the conversion efficiency of the FD52can be switched by turning on and off of the conversion efficiency switching transistor58, it is possible to improve the signal to noise (S/N) ratio by turning off of the two conversion efficiency switching transistors58and increasing the conversion efficiency under low illumination, and the FD52can receive the saturation amount of signals from the photoelectric conversion unit41(42A and42B) by turning on the conversion efficiency switching transistor58under high illumination.

Configuration Example of Second Embodiment

Next, a configuration example of an imaging pixel and a phase difference pixel according to a second embodiment of the present disclosure will be described with reference toFIGS. 8 and 9.FIG. 8is a plan view showing a configuration example of the imaging pixel and the phase difference pixel, andFIG. 9is a circuit diagram showing a configuration example of the imaging pixel and the phase difference pixel.

In this example, the phase difference detection pixel32and the imaging pixel31form the configuration in which two vertical pixels are shared.

The imaging pixel31includes the photoelectric conversion unit41, the transfer transistor51, a transfer transistor51D, the FD52, the reset transistor53, the amplification transistor54, and the selection transistor55. It should be noted that the transfer transistor51D is provided to maintain the symmetry of the pixel structure, and does not have a function such as transferring charges of the photoelectric conversion unit41unlike the transfer transistor51. It should be noted that in the imaging pixel31, an overflow control transistor that discharges charges stored in the photoelectric conversion unit41may be provided.

Moreover, the phase difference detection pixel32includes the photoelectric conversion units42A and42B, the transfer transistor51, the FD52, the reset transistor53, the amplification transistor54, and the selection transistor55corresponding to the photoelectric conversion units42A and42B.

It should be noted that the FD corresponding to the photoelectric conversion unit42B is shared with a photoelectric conversion unit of an imaging pixel (not shown) adjacent to the phase difference detection pixel32.

Furthermore, as shown inFIG. 8, the FD52corresponding to the photoelectric conversion unit42A in the phase difference detection pixel32and the FD52of the imaging pixel31are connected to gate electrodes of the amplification transistor54with respective wirings FDL. Accordingly, the photoelectric conversion unit42A can share the FD52, the amplification transistor54, and the selection transistor55with the photoelectric conversion unit41of the imaging pixel31.

Moreover, the FD52corresponding to the photoelectric conversion unit42B in the phase difference detection pixel32and an FD of the imaging pixel (not shown) are connected to gate electrodes an amplification transistor of the imaging pixel (not shown) with respective wirings FDL (not shown). Accordingly, the photoelectric conversion unit42B can share the FD, the amplification transistor, and the selection transistor with the photoelectric conversion unit of the imaging pixel (not shown).

According to the above configuration, because two photoelectric conversion units share an FD and an amplification transistor of different adjacent pixels in the phase difference detection pixel, it is possible to simultaneously expose and read from the two photoelectric conversion units without providing a charge storage unit and to improve AF speed and accuracy.

It should be noted that in this example, between pixels forming the pixel sharing unit (the imaging pixel31and the phase difference detection pixel32), a pixel transistor including the amplification transistor54is arranged. With such a configuration, as shown inFIG. 10, which is an enlarged view of a part surrounded by broken lines e inFIG. 8, because the FD52of the respective pixels and the amplification transistor54are arranged to be adjacent to each other, it is possible to design the length of the wiring FDL for connecting the FD52and the amplification transistor54to be short and to increase the conversion efficiency.

Furthermore, in this example, the source of the respective reset transistors53of the imaging pixel31and the phase difference detection pixel32is connected to the FD52of the respective pixels. Accordingly, it is possible to reduce the capacity of the FD52and to increase the conversion efficiency.

Furthermore, in this example, the drain of the respective reset transistors53of the imaging pixel31and the phase difference detection pixel32is connected to a source of a conversion efficiency switching transistor61. With such a configuration, it is possible to change the capacity of the FD52by turning on and off of the reset transistor53of the respective pixels and to set the conversion efficiency.

Specifically, in the case where the respective reset transistors53of the imaging pixel31and the phase difference detection pixel32are turned on and the conversion efficiency switching transistor61is turned off in the state where the respective transfer transistors51of the imaging pixel31and the phase difference detection pixel32are turned on, the capacity of FD in the pixel sharing unit is the sum of the capacity of the FD52of the imaging pixel31and the capacity of the FD52of the phase difference detection pixel32.

Moreover, in the case where the reset transistor53of any one of the imaging pixel31and the phase difference detection pixel32is turned on and the conversion efficiency switching transistor61is turned off in the state where the respective transfer transistors51of the imaging pixel31and the phase difference detection pixel32are turned on, the capacity of FD in the pixel sharing unit is the sum of the capacity of the FD52of the imaging pixel31, the capacity of the FD52of the phase difference detection pixel32, and the gate capacity and drain capacity of the turned-on reset transistor53. Accordingly, it is possible to reduce the conversion efficiency as compared with the above-mentioned case.

Furthermore, in the case where the respective reset transistors53of the imaging pixel31and the phase difference detection pixel32are turned on and the conversion efficiency switching transistor61is turned off in the state where the respective transfer transistors51of the imaging pixel31and the phase difference detection pixel32are turned on, the capacity of FD in the pixel sharing unit is the sum of the capacity of the FD52of the imaging pixel31, the capacity of the FD52of the phase difference detection pixel32, and the gate capacity and drain capacity of the respective reset transistors53of the imaging pixel31and the phase difference detection pixel32. Accordingly, it is possible to further reduce the conversion efficiency as compared with the above-mentioned case.

It should be noted that in the case where the respective reset transistors53of the imaging pixel31and the phase difference detection pixel32are turned on and the conversion efficiency switching transistor61is turned on, the charges stored in the FD52are reset.

Moreover, in this example, the FD52(source of the reset transistor53) is formed to be surrounded by an element division area isolated by shallow trench isolation (STI).

FIG. 11shows a cross-sectional view of a part of the FD52taking along the double headed arrow a-a′ ofFIG. 10.

As shown inFIG. 11, the FD52is formed to be surrounded by element division areas62that are isolated by STI and include SiO2, for example. Accordingly, it is possible to suppress the diffusion of the FD52by the element division areas62and to define the FD line width with the width between the element division areas62. Therefore, it is possible not only to improve the conversion efficiency by reducing the capacity of the FD52but also to reduce the production variability (specifically, variability in the line width and overlapping with respect to a resist in a channel implant process when the FD52is formed).

Furthermore, in this example, as shown inFIG. 8, the transfer transistor51of each pixel is formed on a corner portion of each photoelectric conversion unit of each pixel, which is formed in a rectangular shape. With such a configuration, the element division area in one pixel cell is reduced, and it is possible to enlarge the area of the photoelectric conversion unit. Therefore, it is possible to advantageously perform designing from a viewpoint of a saturation amount of charge Qs even in the case where the photoelectric conversion unit is divided into two parts in one pixel cell like the phase difference detection pixel32.

Configuration Example of Third Embodiment

Next, a configuration example of an imaging pixel and a phase difference detection pixel according to a third embodiment of the present disclosure will be described with reference toFIGS. 12 and 13.FIG. 12is a plan view showing a configuration example of the imaging pixel and the phase difference detection pixel, andFIG. 13is a circuit diagram showing a configuration example of the imaging pixel and the phase difference detection pixel.

In this example, the imaging pixel31-1and the imaging pixel31-2form the configuration in which two vertical pixels are shared, and the phase difference detection pixel32and the imaging pixel31-3form the configuration in which two vertical pixels are shared. Moreover, each pixel sharing unit is arranged in a row adjacent to each other.

The imaging pixels31-1and31-2each include the photoelectric conversion unit41and the transfer transistor51, and the photoelectric conversion units41share the FD52, the reset transistor53, the amplification transistor54, and the selection transistor55.

The imaging pixel31-3also includes the photoelectric conversion unit41and the transfer transistor51, and the phase difference detection pixel32includes the photoelectric conversion units42A and42B, and the respective transfer transistors51corresponding to the photoelectric conversion units42A and42B. Then, the photoelectric conversion unit41of the imaging pixel31-3and the photoelectric conversion unit42B of the phase difference detection pixel32share the FD52, the reset transistor53, the amplification transistor54, and the selection transistor55.

Moreover, the transfer transistor51corresponding to the photoelectric conversion unit42A in the phase difference detection pixel32is connected to a reading transistor71via the adjacent FD52and a wiring FDL.

The reading transistor71is formed between the FD52corresponding to the photoelectric conversion unit42A and the FD52shared by the imaging pixels31-1and31-2. By turning on the reading transistor71, the photoelectric conversion unit42A shares the FD52, the amplification transistor54, and the selection transistor55with the imaging pixels31-1and31-2(i.e., pixels in adjacent row).

According to the above configuration, because two photoelectric conversion units share an FD and an amplification transistor of different adjacent pixels in the phase difference detection pixel, it is possible to expose and read from the two photoelectric conversion units without providing a charge storage unit and to improve AF speed and accuracy.

It should be noted that inFIG. 12, a wiring FDL′ that connects the pixel sharing unit including the imaging pixels31-1and31-2and a pixel transistor in an adjacent row on the upper side is provided to maintain the symmetry with the wiring FDL that connects the transfer transistor51corresponding to the photoelectric conversion unit42A and a pixel transistor in the pixel sharing unit including the imaging pixels31-1and31-2.

In the above configuration, by turning on the reading transistor71when a signal for detecting phase difference is read, a signal corresponding to charges stored in the photoelectric conversion unit42A is read from a pixel transistor in a pixel sharing unit including the imaging pixels31-1and31-2. A signal corresponding to charges stored in the photoelectric conversion unit42B is read from a pixel transistor in a pixel sharing unit including the imaging pixel31-3and the phase difference detection pixel32. At this time, by turning on the reading transistor71included in the respective pixel transistors, it is possible to make the conversion efficiencies of the signals read from the photoelectric conversion units42A and42B equivalent to each other.

On the other hand, by turning off the reading transistor71when a signal for capturing an image is read, it is possible to maintain high conversion efficiency of an imaging pixel and to prevent the properties from being deteriorated. Moreover, in the case where the saturation amount of signals is beyond the range of FD, by turning on the reading transistor71, it is possible to reduce the conversion efficiency and to prevent charges in FD from overflowing. Specifically, in this case, the reading transistor71functions as a conversion efficiency switching transistor.

Furthermore, also in this example, as shown inFIG. 12, the transfer transistor51of each pixel is formed on a corner portion of the photoelectric conversion unit of each pixel, which is formed in a rectangular shape. With such a configuration, the element division area in one pixel cell is reduced, and it is possible to enlarge the area of the photoelectric conversion unit. Therefore, it is possible to advantageously perform designing from a viewpoint of a saturation amount of charge Qs even in the case where the photoelectric conversion unit is divided into two parts in one pixel cell like the phase difference detection pixel32.

Another Configuration Example of Third Embodiment

Next, another configuration example of an imaging pixel and a phase difference detection pixel according to a third embodiment of the present disclosure will be described with reference toFIGS. 14 and 15.FIG. 14is a plan view showing a configuration example of the imaging pixel and the phase difference detection pixel, andFIG. 15is a circuit diagram showing a configuration example of the imaging pixel and the phase difference detection pixel.

In this example, the imaging pixels31-1to31-4, the phase difference detection pixel32, and the imaging pixels31-5to31-7form the configuration in which pixels are shared in a 2*2 matrix pattern. Moreover, each pixel sharing unit is arranged in a row adjacent to each other.

The imaging pixels31-1to31-4each include the photoelectric conversion unit41and the transfer transistor51, and the photoelectric conversion units41share the FD52, the reset transistor53, the amplification transistor54, and the selection transistor55.

The imaging pixels31-5to31-7also include the photoelectric conversion unit41and the transfer transistor51, and the phase difference detection pixel32includes the photoelectric conversion units42A and42B and the transfer transistors51corresponding to the photoelectric conversion units42A and42B. Then, the photoelectric conversion units41of the imaging pixels31-5to31-7share the FD52, the reset transistor53, the amplification transistor54, and the selection transistor55with the photoelectric conversion unit42B of the phase difference detection pixel32.

Moreover, the transfer transistor51corresponding to the photoelectric conversion unit42A in the phase difference detection pixel32is connected to the reading transistor71via the adjacent FD52and the wiring FDL.

The reading transistor71is formed between the FD52corresponding to the photoelectric conversion unit42A and the FD52shared by the imaging pixels31-1to31-4. By turning on the reading transistor71, the photoelectric conversion unit42A shares the FD52, the amplification transistor54, and the selection transistor55with the imaging pixels31-1to31-4(i.e., pixel in an adjacent row).

Also in the above configuration, because two photoelectric conversion units share an FD and an amplification transistor of different adjacent pixels in a phase difference detection pixel, it is possible to expose and read from the two photoelectric conversion units without providing a charge storage unit and to improve AF speed and accuracy.

It should be noted that inFIG. 14, a wiring FDL′ that connects the pixel sharing unit including the imaging pixels31-1and31-4and a pixel transistor in an adjacent row on the upper side is provided to maintain the symmetry with the wiring FDL that connects the transfer transistor51corresponding to the photoelectric conversion unit42A and a pixel transistor in the pixel sharing unit including the imaging pixels31-1and31-4.

It should be noted that although the phase difference detection pixel includes two photoelectric conversion units in the above-mentioned embodiments, the number of photoelectric conversion units is not limited to two, and the phase difference detection pixel may include three or more photoelectric conversion units.

Embodiments of the present disclosure are not limited to the above-mentioned embodiments and various modifications can be made without departing from the gist of the present disclosure.

Furthermore, the present disclosure may also take the following configurations.

a pixel array unit in which a plurality of imaging pixels configured to generate an image, and a plurality of phase difference detection pixels configured to perform phase difference detection are arranged, each of the plurality of phase difference detection pixels includinga plurality of photoelectric conversion units,a plurality of floating diffusions configured to convert charges stored in the plurality of photoelectric conversion units into voltage, anda plurality of amplification transistors configured to amplify the converted voltage in the plurality of floating diffusions.
(2) The solid-state imaging device according to (1) above, in which

in each of the plurality of phase difference detection pixels, at least one of the plurality of photoelectric conversion units shares the floating diffusion and the amplification transistor with at least one of the plurality of imaging pixels, which is adjacent to the phase difference detection pixel.

(3) The solid-state imaging device according to (1) or (2) above, in which

the phase difference detection pixel includes a first photoelectric conversion unit and a second photoelectric conversion unit,

the first photoelectric conversion unit shares the floating diffusion and the amplification transistor with a first imaging pixel adjacent to the phase difference detection pixel, and

the second photoelectric conversion unit shares the floating diffusion and the amplification transistor with a second imaging pixel that is different from the first imaging pixel and is adjacent to the phase difference detection pixel.

(4) The solid-state imaging device according to (3) above, in which

the phase difference detection pixel and the first imaging pixel are included in one pixel sharing unit, and

the second imaging pixel is included in another pixel sharing unit.

(5) The solid-state imaging device according to (4) above, in which

a pixel transistor including the amplification transistor is arranged between pixels constituting the pixel sharing unit.

(6) The solid-state imaging device according to (4) or (5) above, in which

the pixel sharing unit includesa reset transistor configured to discharge charges stored in each of the floating diffusions in the pixels constituting the pixel sharing unit, anda conversion efficiency switching transistor that is connected to the reset transistor and is configured to change capacity of the floating diffusion in each of the pixels constituting the pixel sharing unit.
(7) The solid-state imaging device according to (6) above, in whicha source of the reset transistor is connected to the floating diffusion in each of the pixels constituting the pixel sharing unit, anda drain of the reset transistor is connected to a source of the conversion efficiency switching transistor.
(8) The solid-state imaging device according to any one of (4) to (7) above, in which

the floating diffusion is formed surrounded by an element division area isolated by shallow trench isolation.

(9) The solid-state imaging device according to (4) above, in which

the pixel sharing unit including the second imaging pixel is arranged in a row adjacent to the pixel sharing unit including the phase difference detection pixel and the first imaging pixel.

(10) The solid-state imaging device according to (9) above, in which

between the floating diffusion corresponding to the second photoelectric conversion unit and the floating diffusion of the second imaging pixel, a reading transistor configured to read charges stored in the second photoelectric conversion unit is formed.

(11) The solid-state imaging device according to any one of (4) to (10) above, in which

each of the pixels includes a transfer transistor configured to transfer charges stored in the photoelectric conversion unit to the floating diffusion, and

the transfer transistor is formed on a corner portion of the photoelectric conversion unit formed in a rectangular shape.

(12) The solid-state imaging device according to any one of (4) to (11), in which

the pixel sharing unit shares two pixels arranged vertically.

(13) The solid-state imaging device according to (4) to (11) above, in which

the pixel sharing unit shares pixels arranged in a 2*2 matrix pattern.

(14) A method for driving a solid-state imaging device that includes a pixel array unit in which a plurality of imaging pixels configured to generate an image, and a plurality of phase difference detection pixels configured to perform phase difference detection are arranged, each of the plurality of phase difference detection pixels including a plurality of photoelectric conversion units, a plurality of floating diffusions configured to convert charges stored in the plurality of photoelectric conversion units into voltage, and a plurality of amplification transistors configured to amplify the converted voltage in the plurality of floating diffusions, the method including:

storing charges in the plurality of photoelectric conversion units; and

reading signals corresponding to the charges stored in the plurality of photoelectric conversion units, by the solid-state imaging device, in the phase difference detection pixel.

(15) An electronic apparatus, including

a solid-state imaging device that includes a pixel array unit in which a plurality of imaging pixels configured to generate an image, and a plurality of phase difference detection pixels configured to perform phase difference detection are arranged, each of the plurality of phase difference detection pixels includinga plurality of photoelectric conversion units,a plurality of floating diffusions configured to convert charges stored in the plurality of photoelectric conversion units into voltage, anda plurality of amplification transistors configured to amplify the converted voltage in the plurality of floating diffusions.