CMOS image sensor having optical block area

A CMOS image sensor includes an active pixel structure suitable for sensing light incident from outside and converting a sensed light into an electrical signal, and an optical block structure suitable for blocking a visible light and passing a UV light to check and evaluate an electrical characteristic of the active pixel area. The UV pass filter includes first and second insulation layers comprising an insulator, and a metal layer formed between the first and second insulation layers.

CROSS-REFERENCE TO RELATED APPLICATIONS

The present application claims priority of Korean Patent Application No. 10-2013-0084455, filed on Jul. 18, 2013, which is incorporated herein by reference in its entirety.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The embodiments of the present invention relate to an image sensor, and more particularly, to a CMOS image sensor having an optical block area set in a pixel array.

2. Description of the Related Art

With the development of electronic communication, digital devices having a digital processing function, such as digital cameras, mobile phones, game machines, and micro cameras, have been rapidly spread. Most of the digital devices include an image sensor required for taking an image.

The image sensor senses an image. Specifically, the image sensor converts an image inputted as light from outside into an electrical signal and transmits the electrical signal to a digital processing device. Examples of the image sensor may include a charge coupled device (CCD) image sensor and a complementary metal oxide semiconductor (CMOS) image sensor.

The CCD image sensor includes a photodiode, a CCD, and a signal detection circuit, which are formed over a P-type impurity layer. The photodiode serves to convert light incident from outside into an electric charge, the CCD serves to transmit the electric charge to the signal detection circuit, and the signal detection circuit serves to convert the electric charge into a voltage.

The CMOS image sensor includes CMOS transistors each configured in a complementary manner to join a PMOS (P channel Metal Oxide Semiconductor) transistor and an NMOS (N channel Metal Oxide Semiconductor) transistor, in order to convert an input image into an electrical signal. The CMOS image sensor has an advantage in which it has high integration degree and low power consumption.

The image sensor includes a light sensing unit configured to receive light incident from outside and generate and store photo-charges. The image sensor further includes a color filter disposed over the light sensing unit. The color filter may have three colors of red, green, and blue or three colors of yellow, magenta, and cyan.

In particular, the CMOS image sensor includes an optical block area for blocking light from being irradiated onto pixels. The pixels formed in the optical block area are optional pixels for black level correction, and are used for controlling a pixel output. Since the optical block area uses a pixel output as an offset value in a dark state, the optical block area is generally implemented in a state in which the introduction of light is blocked. As such, the pixels in the optical block area determine the offset value in place of main pixels. Thus, when an asymmetry occurs between the main pixels and the pixels in the optical block area, the noise characteristic of the image sensor may be seriously degraded.

Furthermore, the pixels in the optical block area receive plasma damage after a back-end process, or particularly, after an etching process. In order to cure the plasma damage, UV erase, that is, UV anneal may be performed. At this time, the pixels in the optical block area have a UV curing effect different from the main pixels, because UV light is blocked during the curing process. Thus, the dark current characteristic of the pixels in the optical block area may differ, and a serious asymmetry may occur between the pixels. As a result, the noise characteristic of the CMOS image sensor may be degraded.

SUMMARY OF THE INVENTION

Accordingly, the embodiments of the present invention has been made in an effort to resolve the concerns occurring in the related art, and an object of the embodiment of the present invention is to provide a CMOS image sensor including a filter capable of equalizing a UV curing effect applied to pixels formed in an optical block area to a UV curing effect applied to main pixels formed in an active pixel area.

According to an embodiment of the present invention, a CMOS image sensor may include an active pixel structure suitable for sensing light incident from outside and converting a sensed light into an electrical signal, and an optical block structure suitable for blocking a visible light and passing a UV light to check and evaluate an electrical characteristic of the active pixel area. The UV pass filter may include first and second insulation layers comprising an insulator, and a metal layer formed between the first and second insulation layers.

According to another embodiment of the present invention, a CMOS image sensor may include an active pixel structure suitable for sensing light incident from outside and converting a sensed light into an electrical signal, and an optical block structure suitable for blocking a visible light and passing a UV light to check and evaluate an electrical characteristic of the active pixel area. The UV pass filter may include a plurality of insulation layers comprising an insulator, respectively, and a plurality of metal layers formed between the first and second insulation layers, respectively.

DETAILED DESCRIPTION

Reference will now be made in greater detail to a preferred embodiment of the invention, an example of which is illustrated in the accompanying drawings. Wherever possible, the same reference numerals will be used throughout the drawings and the description to refer to the same or like parts. It is also noted that in this specification, “connected/coupled” refers to one component not only directly coupling another component but also indirectly coupling another component through an intermediate component. In addition, a singular form may include a plural form as long as it is not specifically mentioned in a sentence.

FIG. 1is a block diagram of a CMOS image sensor in accordance with an embodiment of the present invention. Referring toFIG. 1, the CMOS image sensor101includes a pixel array111, an address decoder121, a column buffer131, an analog digital converter (ADC)141, and a controller151that are formed on a semiconductor substrate105.

The pixel array111includes a plurality of light sensing elements, that is, a plurality of pixels. The light sensing element may be implemented with a photo transistor, a photo diode, a photo gate, a pinned photo diode, or the like. The light sensing elements may be arranged in a matrix shape. The structure of the pixel array will be described in detail with reference toFIG. 2.

The address decoder121is configured to decode an address signal received from the controller151and designate a corresponding light sensing element among the light sensing elements included in the pixel array111.

The column buffer131is configured to buffer and output signals outputted by the column from the pixel array111according to the control of a signal outputted from the controller151.

The ADC141is configured to receive the signals outputted from the column buffer131, convert the received signals into digital signals, and transmit the digital signals to the controller151.

The controller151is configured to receive a signal inputted from outside and control the address decoder121, the column buffer131, and the ADC141. Furthermore, the controller151is configured to receive a digital signal outputted from the ADC141and transmit the received signal to an external device, such as a display to store or display an image.

FIG. 2is a plan view of the pixel array111ofFIG. 1. Referring toFIG. 2, the pixel array111is divided into an active pixel area211and an optical block area221.

The active pixel area211is configured to sense light incident from outside, convert the sensed light into an electrical signal, and output the electrical signal to the column buffer131. The active pixel area211includes a plurality of main light sensing elements, that is, main pixels arranged in a matrix shape.

The optical block area221is arranged to surround the active pixel area211. The optical block area221is configured to block light incident from outside and check and evaluate an electrical characteristic of the active pixel area211, that is, a dark noise characteristic based on dark current. In other words, the optical block area221may check and evaluate the dark noise characteristic based on a dark current. Based on the evaluation result, the optical block area221compensates for a current value corresponding to the dark current of the main pixels in the active pixel area211, thereby preventing dark noise from occurring in the image sensor. The horizontal and vertical sizes of the optical block area221may be arbitrarily set according to process parameters.

FIG. 3Ais a side cross-sectional view of an embodiment of the optical block area221illustrated inFIG. 2. Referring toFIG. 3A, the optical block area221includes a micro-lens311, a color filter321, a UV pass filter331, and a pixel layer341. The micro-lens311, the color filter321, and the UV pass filter331are sequentially stacked over the pixel layer341.

The micro-lens311may condense light incident from outside. The color filter321may include a filter that passes visible light from the light incident through the micro-lens311. The color filter321may be implemented with any one of a red filter that passes only red light in the visible light, a green filter that passes only green light in the visible light, and a blue filter that passes only blue light in the visible light. If necessary, the color filter321may include any one of a cyan filter, a yellow filter, and a magenta filter.

The micro-lens311and the color filter321may not be provided in the optical block area221, depending on cases.

The UV pass filter331may block visible light from the light, which is incident on the optical block area221from outside and passes through the color filter321, and may pass only UV light. The UV pass filter331includes first and second insulation layers333and334.

The first and second insulation layers333and334are formed over the pixel layer341. The first and second insulation layers333and334may protect optical black pixels formed over the pixel layer341from the external environment. That is, the first and second insulation layers333and334may prevent the optical black pixels from being damaged by an external impact or physical force. Each of the first and second insulation layers333and334may include an oxide layer including oxide (SiO2), a nitride layer including nitride, or a composite layer including oxide and nitride.

A metal layer336is formed between the first and second insulation layers333and334. The metal layer336may block visible light, which is incident on the first and second insulation layers333and334from outside, from being transmitted to the pixel layer341. The metal layer336may include gold (Au), silver (Ag), copper (Cu), or aluminum (Al). As the visible light incident from outside is blocked from being transmitted to the pixel layer341by the metal layer336, optical black pixels (not illustrated) formed in the pixel layer341may generate optical black signals having a dark level.

FIG. 3Bis a side cross-sectional view of an embodiment of the optical block area221illustrated inFIG. 2. Referring toFIG. 3B, the UV pass filter332includes a plurality of insulation layers333to335and a plurality of metal layers336and337.FIG. 3Billustrates only three insulation layers and two metal layers for illustrative purpose. Between the insulation layers333to335, the metal layers336and337are respectively formed.

As the UV pass filter332includes the metal layers336and337, the visible light blocking effect increases. In the present embodiment, three or more metal layers may be provided. At this time, the metal layers336and337may be arranged at even intervals from each other. Each of the insulation layers336and337may include an oxide layer, a nitride layer, or a composite layer of oxide and nitride. Each of the metal layers336and337may include Au, Ag, Cu, or Al.

FIG. 4Ais a plan view of an embodiment of the metal layer336illustrated inFIG. 3A. Referring toFIG. 4A, the metal layer336includes a plurality of metal chips421. The metal chips421may have a square plate shape and may be arranged in a matrix shape. Through spaces411between the metal chips421, UV light incident on the optical block area221ofFIG. 2from outside may reach the pixel layer341ofFIG. 3A. The horizontal or vertical size of the square metal chips421may be set to 80 nm, the space411between the metal chips421may be set to 30 nm, the thickness of the metal chip421may be set to 1,400 Å, and the thickness of the metal layer336may be set to 1,500 to 3,500 Å.

FIG. 4Bis another plan view of an embodiment of the metal layer336illustrated inFIG. 3A. Referring toFIG. 4B, the metal layer336includes a plurality of metal chips431. The metal chips431may have a rectangular plate shape, and may be arranged in a matrix shape. Through the spaces411between metal chips431, UV light incident on the optical block area221ofFIG. 2from outside may reach the pixel layer341ofFIG. 3A. The horizontal length of the rectangular metal chips431may be set to 80 nm, the space411between the metal chips431may be set to 30 nm, the thickness of the metal chips431may be set to 1,400 Å, and the thickness of the metal layer336may be set to 1,500 to 3,500 Å.

FIG. 4Cis another plan view of an embodiment of the metal layer336illustrated inFIG. 3A. Referring toFIG. 4C, the metal layer336includes a plurality of metal chips441. The metal chips441may have a circular plate shape and may be arranged in a matrix shape. Through spaces411between the metal chips441, UV light incident on the optical block area221ofFIG. 2from outside may reach the pixel layer341ofFIG. 3A. The diameter of the circular metal chip441may be set to 80 nm, the space411between the circular metal chips441may be set to 30 nm, the thickness of the metal chip441may be set to 1,400 Å, and the thickness of the metal layer336may be set to 1,500 to 3,500 Å.

FIG. 4Dis another plan view of an embodiment of the metal layer336illustrated inFIG. 3A. Referring toFIG. 4D, the metal layer336includes a plurality of metal chips451. The metal chips451may have a regular-triangle plate shape and may be arranged in a matrix shape. Referring toFIG. 4D, the metal chips451may be arranged reversely to each other in a vertical direction. Through spaces411between the metal chips451, UV light incident on the optical block area221ofFIG. 2from outside may reach the pixel layer341ofFIG. 3A. The height of the regular triangle of the metal chip451may be set to 80 nm, the space411between the metal chips451may be set to 30 nm, the thickness of the metal chip451may be set to 1,400 Å, and the thickness of the metal layer336may be set to 1,500 to 3,500 Å.FIG. 4Dillustrates the metal chips that may have a regular-triangle plate shape. However, the shape of the metal chips451is not limited to the regular-triangle, and may be set to various other types of triangles, such as an isosceles triangle and a right-angled triangle.

The embodiments ofFIGS. 4A to 4Dmay be applied in the same manner to the metal layers336and337ofFIG. 38.

The metal chips421,431,441, and451formed in the metal layer336according to the embodiments of the present invention may be formed in various shapes including the shapes of the embodiments ofFIGS. 4A to 4D.

FIG. 5Ais a plan view of an embodiment of the metal layer336illustrated inFIG. 3A. Referring toFIG. 5A, the metal layer336may be formed in a net shape. That is, the metal layer336may have a metal area511and a plurality of square holes521arranged in a matrix shape. Through the square holes521, UV light incident on the optical block area221ofFIG. 2from outside may reach the pixel layer341ofFIG. 3A. The horizontal or vertical length of the square hole521may be set to 80 nm, the pitch between the square holes521may be set to 30 nm, and the thickness of the metal layer336may be set to 1,400 Å.

FIG. 5Bis another plan view of an embodiment of the metal layer336illustrated inFIG. 3A. Referring toFIG. 5B, the metal layer336may be formed in a net shape. That is, the metal layer336may have a metal area511and a plurality of rectangular holes531arranged in a matrix shape. Through the rectangular holes531, UV light incident on the optical block area221ofFIG. 2from outside may reach the pixel layer341ofFIG. 3A. The horizontal length of the rectangular hole531may be set to 80 nm, the pitch between the rectangular holes531may be set to 30 nm, and the thickness of the metal layer336may be set to 1,400 Å.

FIG. 5Cis another plan view of an embodiment of the metal layer336illustrated inFIG. 3A. Referring toFIG. 5C, the metal layer336may be formed in a net shape. That is, the metal layer336may have a metal area511and a plurality of circular holes541arranged in a matrix shape. Through the circular holes541, UV light incident on the optical block area221ofFIG. 2from outside may reach the pixel layer341ofFIG. 3A. The diameter of the circular hole541may be set to 80 nm, the pitch between the circular holes541may be set to 30 nm, and the thickness of the metal layer336may be set to 1,400 Å.

FIG. 5Dis another plan view of an embodiment of the metal layer336illustrated inFIG. 3A. Referring toFIG. 5D, the metal layer336may be formed in a net shape. That is, the metal layer336may have a metal area511and a plurality of regular-triangle holes551arranged in a matrix shape. As illustrated inFIG. 5D, the regular-triangle holes551may be arranged reversely to each other in a vertical direction. Through the regular-triangle holes531, UV light incident on the optical block area221ofFIG. 2from outside may reach the pixel layer341ofFIG. 3A. The height of the regular triangle of the hole551may be set to 80 nm, the pitch between the regular-triangle holes551may be set to 30 nm, and the thickness of the metal layer336may be set to 1,400 Å.FIG. 5Dillustrates the regular-triangle holes551. However, the holes551are not limited to the regular-triangle, but may be formed in various triangle shapes including an isosceles triangle and a right-angled triangle.

The embodiments ofFIGS. 5A to 5Dmay be applied in the same manner to the metal layers336and337illustrated inFIG. 253B.

The holes521,531,541, and551formed in the metal layer336according to the embodiments of the present invention may be applied to various shapes including the embodiments illustrated inFIGS. 5A to 5D.

FIG. 6illustrates a state in which UV light is applied to the pixel array111. Referring toFIG. 6, when UV light is applied to the pixel array111, the UV light reaches the pixel layer351through the micro-lens311and the color filter321, which are formed in the active pixel area211. Similarly, the UV light reaches the pixel layer341through the micro-lens311, the color filter321, and the UV pass filters331and332, which are formed in the optical block area221.

As the UV pass filters331and332are provided in the optical block area221according to the embodiments of the present invention, UV light applied to the optical block area221from outside may reach the pixel layer341formed in the optical block area221through the UV pass filters331and332.

Specifically, in order to prevent plasma damage, which occurs after a back-end process, or particularly, after an etching process, a curing process using UV light may be performed. For example, when UV light having a low energy of 4.3 to 8.8 eV may be irradiated onto the pixel array111for tens of seconds, an anneal effect may occur through injection of photo-electrons generated from silicon. Furthermore, ions caused by plasma are erased or detrapped in a state where they are trapped in an interface state.

During the curing process using UV light, the optical black pixels formed in the optical block area221have the same curing effect as the main pixels formed in the active pixel area211. Thus, since the pixels in the optical block area221have the same dark current characteristic as the pixels in the active pixel area211, a serious asymmetry between the pixels disappears. As a result, the image noise characteristic may be improved. That is, the degradation of the image noise characteristic may be prevented.

FIG. 7is a graph illustrating the relationship between the transmittance of UV light and the size of the metal layers421to451ofFIGS. 4A to 4D. Referring toFIG. 7, it may be seen that the transmittance increases with the decrease in the size of the metal layers421to451. That is, when the metal layers421to451have a small size (711), the transmittance is higher than when the metal layers421to451have a large size (721).

The embodiments of present invention may be applied to a process of fabricating a device, which performs a curing process using UV light, for example, a flash memory semiconductor device.

According to the embodiments of the present invention, the CMOS image sensor includes the UV pass filter formed in the optical block area. That is, the optical block area blocks visible light and passes UV light.

As the optical block area is formed to pass UV light, UV light incident on the optical block area is irradiated onto the pixels formed in the optical block area through the optical block area, when the UV curing process is performed on the CMOS image sensor. That is, the pixels formed in the optical block area may have the same curing effect as the pixels formed in the active pixel area through the UV curing process.

Thus, as the pixels in the optical block area have the same dark current characteristic as the pixels in the active pixel area, a serous asymmetry between the pixels disappears. As a result, the image noise characteristic of the CMOS image sensor may be improved.