Quadrature mixer circuit including three-input local mixers

In a quadrature mixer circuit for receiving a radio frequency signal to generate first and second quadrature output signals, a first three-input mixer receives the radio frequency signal, a first local signal having a first frequency and a second local signal having a second frequency to generate the first quadrature output signal, and a second three-input mixer receives the radio frequency signal, the first local signal and the second local signal to generate the second quadrature output signal. The second local signal received by the first three-input mixer and the second local signal received by the second three-input mixer being out of phase by π/2 from each other.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a quadrature mixer circuit applied to a wireless receiver, and more particularly, to a quadrature mixer circuit applied to a zero intermediate frequency (IF) type (a so-called direct conversion type) wireless receiver or a low IF type wireless receiver.

2. Description of the Related Art

While super heterodyne type wireless receivers have excellent noise figure (NF) characteristics, the super heterodyne type wireless receivers have a large number of components including local oscillators, image removing filters and an IF band-pass filter, which is an obstacle for incorporating a radio frequency (RF) portion and a baseband portion into one chip.

In order to decrease the number of components, various direct conversion type wireless receivers have been developed. In this case, the improvement of quadrature mixer circuits applied to such direct conversion type wireless receivers is indispensable.

In a first prior art quadrature mixer circuit using two-input mixers (see: FIG. 29 of JP-A-9-205382), since a local oscillator signal has the same frequency as that of a radio frequency (RF) signal, a DC offset cannot be completely removed, which requires DC offset removing circuits. Also, trouble in reception sensitivity may be generated. Further, the reception sensitivity of other wireless receivers may be suppressed. This will be explained later in detail.

Even in a second prior art quadrature mixer circuit using two-input mixers and a local oscillator signal having a half frequency of the RF signal, the same disadvantages as the first prior art quadrature mixer circuit exist. This also will be explained later in detail.

In a third prior art quadrature mixer circuit (see: JP-A-9-205382 & Takafumi Yamaji et al, “An I/Q Active Balanced Harmonic Mixer with IM2 Cancelers and a 45° Phase Shifter”, IEEE Journal of Solid-State Circuits, Vol. 33, No. 12, pp. 2240–2246, December 1998), two-input even-ordered harmonic mixers, a voltage controlled oscillator having a frequency different from the frequency of the RF signal and a π/4 phase shifter are provided. In the third prior art quadrature mixer circuit, however, it is difficult to realize the π/4 phase shifter. This also will be explained later in detail.

SUMMARY OF THE INVENTION

It is an object of the present invention to provide a quadrature mixer circuit capable of decreasing the DC offset, suppressing the reception trouble without a π/4 phase shifter and decreasing the number of components such as IF filters and second filters.

According to the present invention, in a quadrature mixer circuit for receiving an RF signal to generate first and second quadrature output signals, a first three-input mixer receives the RF signal, a first local oscillator signal having a first frequency and a second local oscillator signal having a second frequency to generate the first quadrature output signal, and a second three-input mixer receives the RF signal, the first local oscillator signal and the second local oscillator signal to generate the second quadrature output signal. The second local oscillator signal received by the first three-input mixer and the second local oscillator signal received by the second three-input mixer are out of phase by π/2 from each other.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Before the description of the preferred embodiments, prior art quadrature phase shift circuits applied to a direct conversion type wireless receiver will be explained with reference toFIGS. 1,2,3,4and5.

InFIG. 1, which illustrates a first prior art quadrature phase shift circuit applied to a direct conversion type wireless receiver (see: FIG. 29 of JP-A-9-205382), an antenna1is connected via a low noise amplifier2to a quadrature mixer circuit3which is formed by two-input mixers31and32, a voltage controlled oscillator33and a π/2 phase shifter34.

Also, the low frequency components of the output signals of the two-input mixers31and32pass through low-pass filters4and5, respectively, and then, the gains of the output signals of the low-pass filters4and5are controlled by automatic gain control (AGC) amplifiers6and7, respectively. Thus, baseband components I and Q are obtained.

Further, the baseband components I and Q are subjected to analog-to-digital conversion by analog/digital (A/D) converters8and9, and then are supplied to a digital signal processor (DSP)10serving as a demodulator.

The principle of the two-input mixers31and32is explained below.

In the two-input mixers31and32, a second-order term of the transfer characteristics of a non-linear element is used. In the non-linear element, an input u and an output f(u) are represented by
f(u)=a0+a1u+a2u2+ . . . +anun+  (1)

When an RF signal uRFhaving a frequency fRFand a local oscillator signal uLohaving a frequency fLoare mixed at the non-linear element, the second term azuzof the formula (1) is represented by
azu2=a2(uRF+uLO)2=a2(uRF2+uLO2+2uRFuLO)  (2)

Therefore, the third term of the formula (2) is represented by
2URF·uLO=2URF·ULO·cos(2πfRFt)·cos(2πfLOt)=URF·ULO·[cos{2π(fRF−fLO)t}+cos{2π(fRF+fLO)t}](5)

In such a down-conversion system as illustrated inFIG. 1where the two-input mixer32is followed by the low-pass filter5, as shown inFIG. 2, only the low frequency component URF·ULO·cos{2π(fRF−fLO)t} in the formula (5) is obtained. Note that a difference frequency |fRF−fLO| is defined as an intermediate frequency fIF.

If an ideal mixer consisting of a multiplier has the same conversion gain in both frequencies fRFand fRF−fLO, the in-band noise power converted from two bands around the both frequencies fRFand fRF−fLOis twice (=1/(12+12)) from the formula (5). Therefore, the noise figure (NF) of the ideal mixer becomes damaged by two, i.e., 3.01 dB, as compared with a circuit with a single-input signal and a single-output signal.

On the other hand, since the local oscillator signal uLOis supplied via the π/2 phase shifter34to the two-input mixer31, a local oscillator signal ULO′ supplied to the two-input mixer31is represented by
uLO′=ULO·sin(2πfLOt)  (6)

Therefore, the third term of the formula (2) is represented by
2URF·uLO′=2URF·ULO·cos(2πfRFt)·sin(2πfLOt)=URF·ULO·[−sin{2π(fRF−fLO)t}+sin{2π(fRF+fLO)t}](7)

Thus, in a down-conversion system as illustrated inFIG. 1where the two-input mixer31is followed by the low-pass filter4, the component, URF·ULO·sin{2π(fRF−fLO)t} is obtained. Note that a difference |fRF−fLO| is also defined as an intermediate frequency fIF.

In the direct conversion type wireless receiver ofFIG. 1, fRF=fLO, so that there is no intermediate frequency fIF(=0).

The direct conversion type wireless receiver ofFIG. 1has the following advantages.

{circle around (1)} Since there is no intermediate frequency fIF(=0), no suppression of image is necessary, that is, no image removing filters are necessary. Also, there are few sources for generating spurious waves. Note that the low-pass filters4and5are provided in a baseband portion, and therefore, the low-pass filters4and5are easily incorporated into an integrated circuit.

{circle around (2)} At The baseband portion as well as an RF portion including the low noise amplifier2and the quadrature mixer circuit3can be easily incorporated into one chip.

Thus, the direct conversion type wireless receiver ofFIG. 1can be easily incorporated into one chip, which would decrease the size and decrease the manufacturing cost.

On the other hand, the direct conversion type wireless receiver ofFIG. 1has the following disadvantages.

{circle around (1)} A DC offset may be generated. That is, a slight difference between the frequency fRFof the RF signal uRFand the frequency fLOof the local oscillator signal uLOappear as a DC offset at the output signal of each of the two-input mixers31and32. Also, as illustrated inFIG. 3, the local oscillator signal uLOleaks from one input of the two-input mixer32(31) to the other input of the two-input mixer32(31). As a result, the leaked local oscillator signal is reflected at the output of the low noise amplifier2and at the antenna1as indicated by X1and X2, respectively. The reflected local oscillator signals X1and X2are down-converted and result in a DC offset which is called a DC offset caused by the self-mixing phenomenon. Since the above-mentioned DC offset is not stable, the DC offset serves as a low frequency noise. In order to remove the DC offset, DC offset removing circuits are required, which is an obstacle in realizing one chip wireless receiver.

{circle around (2)} Ad Since the frequency fLOof the local oscillator signal uLOcoincides with the frequency fRFof the RF signal, the leakage of the local oscillator signal uLOwithin the wireless receiver ofFIG. 1generates trouble in reception sensitivity around the frequency fRF.

{circle around (3)} Antenna radiation of the local oscillator signal uLOsuppresses the reception sensitivity of other wireless receivers receiving RF signals using approximately the same frequency fLO.

InFIG. 4, which illustrates a second prior art quadrature mixer circuit applied to a direct conversion type wireless receiver, a ¼-frequency divider35, a two-input mixer36and a band-pass filter37are added to the elements ofFIG. 1. That is, if the local oscillator signal uLOof the voltage controlled oscillator33is fLO, a local oscillator signal having a frequency (¾) fLOis generated by the ¼-frequency divider35, the two-input mixer36and the band-pass filter37. Therefore,
fRF=(¾)fLO

As a result, the frequency fLOof the voltage controlled oscillator33is different from the frequency fRFof the RF signal.

Even in the direct conversion type wireless receiver ofFIG. 4, since the frequency (¾) fLOat an input of the two-input mixer31(32) is the same as that at the frequency fRFat another input of the two-input mixer31(32), there are the same disadvantages as in the direct conversion type wireless receiver ofFIG. 1.

InFIG. 5, which illustrates a third prior art quadrature mixer circuit applied to a direct conversion type wireless receiver (see: JP-A-9-205382) & Takafumi Yamaji et al, “An I/Q Active Balanced Harmonic Mixer with IM2 Cancelers and a 45° Phase Shifter”, IEEE Journal of Solid-State Circuits, Vol. 33, No. 12, pp. 2240–2246, December 1998), the quadrature mixer circuit3is constructed by two-input even-harmonic mixers31′ and32′, a voltage controlled oscillator33′ and a π/4 phase shifter34′.

The principle of the two-input even-harmonic mixers31′ and32′ is explained below.

In the two-input even-harmonic mixers31′ and32′, a third-order term of the transfer characteristics of a non-linear element is used.

When an RF signal uRFhaving a frequency fRFand a local oscillator signal uLOhaving a frequency fLOare mixed at the non-linear element, the third-order term a3u3of the formula (1) is represented by
a3u3=a3(uRF+uLO)3=a3(uRF3+uLO3+3uRF2uLO+3uRFuLO2)  (8)

The fourth term of the formula (8) is represented by
3uRFuLO2=3URF·ULO2·cos(2πfRFt)cos2(2πfLOt)=3URF·ULO2·cos(2πfRFt){1+cos(4πfLOt)}/2=3URF·ULO2·{cos(2πfRFt)+cos(2πfRFt)cos(4πfLOt)}/2=3URF·ULO2[2 cos(2πfRFt)+cos{2π(fRFt−2fLO)t}+cos{2π(fRFt+2fLO)t}]/4  (9)

In such a down-conversion system ofFIG. 5where the two-input even-harmonic mixer32′ is followed by the low-pass filter5, only the low frequency component 3URF·ULO2cos{2π(fRFt−2fLO)t} in the formula (9) is obtained. Note that a difference |fRF−2fLO| is defined as an intermediate frequency fIF.

If an ideal even-harmonic mixer has the same conversion gain in both frequencies fRF, fRF−2fLOand fRF+2fLO, the in-band noise power converted from the three bands around the frequencies fRF, fRF−2fLOand fRF+2fLOis six-times (=1/(22+12+12)) from the formula (9) by squaring each amplitude thereof. Therefore, the noise figure (NF) of the ideal even-harmonic mixer becomes damaged by six, i.e., 7.78 dB, as compared with a circuit with a single-input signal and a single-output signal.

On the other hand, since the local oscillator signal uLOis supplied via the π/4 phase shifter34′ to the two-input even-harmonic mixer31′, a local oscillator signal uLO′ supplied to the two-input even-harmonic mixer31′ is represented by
uLO′=uLO·cos(2πfLOt+π/4)  (10)

Therefore, the fourth-order term of the formula (8) is represented by
3uRFuLO′2=3URF·ULO2·cos(2πfRFt)cos2(2πfLOt+π/4)=3URF·ULO2·cos(2πfRFt){1+cos(4πfLOt+π/2)}/2=3URF·ULO2·cos(2πfRFt){1−sin(4πfLOt)}/2=3URF·ULO2·{cos(2πfRFt)−cos(2πfRFt)sin(4πfLOt)}/2=3URF·ULO2·[2 cos(2πfRFt)+sin{2π(fRFt−2fLO)t}+sin{2π(fRFt+2fLO)t}]/4  (11)

Thus, in a down-conversion system ofFIG. 5where the two-input even-harmonic mixer31′ is followed by the low-pass filter4, the component 3URF·ULO2·sin{2π(fRFt−2fLO)t} of the formula (14) is obtained. Note that a difference |fRFt−2fLO| is also defined as an intermediate frequency fIF.

In the quadrature mixer circuit3ofFIG. 5, however, as stated in JP-A-9-205382, it is difficult to realize the π/4 phase shifter34′.

InFIG. 6, which illustrates a first embodiment of the quadrature mixer circuit applied to a direct conversion type wireless receiver according to the present invention, the two-input mixers31and32ofFIG. 1are replaced by three-input mixers31″ and32″, respectively, and the voltage controlled oscillator33ofFIG. 1is replaced by two voltage controlled oscillators33″A and33″B, which generate local oscillator signals uLO1, and uLO2having frequencies fLO1and fLO2, respectively. Note that each of the three-input mixers31″ and32″ can be constructed by a three-input multiplier (see: JP-A-10-105632).

In the three-input mixers31″ and32″, a third-order term of the transfer characteristics of a non-linear element is also used.

When the RF signal URFhaving the frequency fRFand the local oscillator signals uLO1and uLO2having frequencies fLO1and fLO2are mixed at the non-linear element, the third-order term a3u3of the formula (1) is replaced by
a3u3=a3(uRF+uLO1+uLO2)3=a3(uRF3+uLO13+uLO23+3uRF2uLO1+3uRF2uLO2+3uRFuLO12+3uLO12uLO2+3uRFuLO22+3uLO1uLO22+6uRFuLO1uLO2)  (13)

In this case, the RF signal uRFand the local oscillator signals uLO1and uLO2are represented by
uRF=uRF·cos(2πfRFt)  (14)
uLO1=uLO1·cos(2πfLO1t)  (15)
uLO2=uLO2·cos(2πfLO2t)  (16)

Generally, the following triple product of trigonometric functions is known;
cos α cos β cos γ={cos(α+β−γ)+cos(β+γ−α)+cos(γ+α−β)+cos(α+β+γ)}/4  (17)

Therefore, the tenth term of the formula (13) is represented by
6uRFuLO1uLO2=6URF·ULO1·ULO2·cos(2πfRFt)cos(2πfLO1t)cos(2πfLO2t)=3URF·ULO1·ULO2·[cos{2π(fRF+fLO1−fLO2)t}+cos{2π(−fRF+fLO1+fLO2)t}+cos{2π(fRF−fLO1+fLO2)t}+cos{2π(fRF+fLO1+fLO2)t}]/2  (18)

In such a down-conversion system ofFIG. 6where the three-input mixer32″ is followed by the low-pass filter5, only the low frequency component 3URF·ULO1·ULO2cos{2π(−fRF+fLO1+fLO2)t} in the equation (18) is obtained. Note that a difference |fRF−fLO1−fLO2| is defined as an intermediate frequency fRF.

On the other hand, since the local oscillator signal uLO2is supplied via the π/2 phase shifter34to the three-input mixer31″, a local oscillator signal uLO2′ supplied to the three-input mixer31″ is represented by
uLO2′=ULO2sin(2πfLO2t)  (19)

Generally, the following triple product of trigonometric functions is known:
sin α cos β cos γ={sin(α+β−γ)+sin(β+γ−α)+sin(γ+α−β)−sin(α+β+γ)}/4  (20)

Therefore, the tenth term of the formula (13) is represented by
6uRFuLO1uLO2=6URF·ULO1·ULO2·cos(2πfRFt)cos(2πfLO1t)sin(2πfLO2t)=3URF·ULO1·ULO2·[sin{2π(fRF+fLO1−fLO2)t}+sin{2π(−fRF+fLO1+fLO2)t}+sin{2π(fRF−fLO1+fLO2)t}+sin{2π(fRF+fLO1+fLO2)t}]/2  (21)

Thus, in a down-conversion system ofFIG. 6where the three-input mixer31″ is followed by the low-pass filter4, the component 3URF·ULO1·ULO2·sin{2π(fRF+fLO1+fLO2)t} of the formula (21) is obtained. Note that a difference |fRF−fLO1−fLO2| is also defined as an intermediate frequency fIF.

InFIG. 7, which illustrates a second embodiment of the quadrature mixer circuit applied to a direct conversion type wireless receiver according to the present invention, the voltage controlled oscillators33″A and33″B and the π/2 phase shifter34ofFIG. 6are replaced by a voltage controlled oscillator33″ and a Johnson counter formed by two ½-frequency dividers71and72. In this case, the Johnson counter generates local oscillator signals uLO/4and uLO/4′ out of phase by π/2.

In the three-input mixers31″ and32″, sin{2π(fRF−fLO1−fLO2)t} of the formula (21) is also used.

When the RF signal URFhaving the frequency fRFand the local oscillator signals uLOand uLO/4having frequencies fLOand fLO/4are mixed at the non-linear element, the third-order term a3u3of the formula (1) is replaced by
a3u3=a3(uRF+uLO+uLO/4)3=a3(uRF3+uLO3+uLO/43+3uRF2uLO+3uRF2uLO/4+3uRFuLO2+3uLO2uLO/4+3uRFuLO/42+3uLOuLO/42+6uRFuLOuLO/4)  (22)

In this case, the local oscillator signal uLO/4is represented by
uLO/4=uLO/4·cos{2π(fLO/4)t}(23)

Therefore, the tenth term of the formula (22) is represented by
6uRFuLOuLO/4=6URF·ULO·ULO/4·cos(2πfRFt)cos(2πfLOt)cos{2π(fLO/4)t}=3URF·ULO·ULO/4·[cos{2π(fRF−5fLO/4)t}+cos{2π(fRF−3fLO/4)t}+cos{2π(fRF+5fLO/4)t}+cos{2π(fRF+3fLO/4)t}]/2  (24)

In such a down-conversion system ofFIG. 7where the three-input mixer32″ is followed by the low-pass filter5, only the low frequency component 3URF·ULO·ULO/4·cos{2π(−fRF+5fLO/4)t} in the equation (24) is obtained. Note that a difference |fRF−5fLO/4| is defined as an intermediate frequency fRF.

On the other hand, the local oscillator signal uLO/4′ supplied to the three-input mixer31″ is represented by
uLO4′ULO/4·sin{2π(fLO/4)t}(25)

Therefore, the tenth term of the formula (24) is represented by
6uRFuLOuLO/4=6URF·ULO·ULO/4·cos(2πfRFt)cos(2πfLOt)sin{2π(fLO/4)t}=3URF·ULO·ULO/4·[sin{2π(fRF−5fLO/4)t}+sin{2π(fRF−3fLO/4)t}+sin{2π(fRF+5fLO/4)t}+sin{2π(fRF+3fLO/4)t}]/2  (26)

Thus, in a down-conversion system ofFIG. 7where the three-input mixer31″ is followed by the low-pass filter4, the component 3URF·ULO1·ULO2·sin{2π(fRF−5fLO/4)t} of the formula (26) is obtained. Note that a difference |fRF−5fLO/4| is also defined as an intermediate frequency fIF.

FIG. 8Ais a detailed circuit diagram of the post stage of the Johnson counter ofFIG. 7andFIG. 8Bis a waveform diagram showing the input and output signals of the post stage of the Johnson counter ofFIG. 8A. That is, the post stage counter72is constructed by D-type flip-flops connected in series, so that the local oscillator signals ULO/4and ULO/4′ having the same frequencies fLO/4(I) and fLO/4(Q) are obtained from a signal having a frequency fLO/2.

The three-input mixers31″ and32″ can be constructed by doubly-polarity switching mixers instead of the three-input multipliers. Doubly-polarity switching mixers other than the three-input multipliers are easily integrated into one chip.

A typical doubly-polarity switching mixer will be explained next with reference toFIGS. 9,10A,10B,11A,11B,12,13,14A,14B,15A and15B.

InFIG. 9, which is a circuit diagram of the doubly-polarity switching mixer, an RF signal VRF(t) is switched by two rectangular local oscillator signals S1(t) and S2(t). That is, switches91,92,93and94controlled by the local oscillator signals S1(t) and S2(t) receive the RF signal VRF(t) to generate an intermediate frequency signal VIF. If the local oscillator signal S1(t) has an amplitude of ±ULO1and a frequency of fLO1and the local oscillator signal S2(t) has an amplitude of ±ULO2and a frequency of fLO2, S1(t) and S2(t) are represented by
S1(t)=ULO1(4/π)[cos(2πfLO1t)−(⅓)cos(6πfLO1t)+(⅕)cos(10πfLO1t)−( 1/7)cos(14πfLO1t)+ . . . ]  (27)
S2(t)=ULO2(4/π)[cos(2πfLO2t)−(⅓)cos(6πfLO2t)+(⅕)cos(10πfLO2t)−( 1/7)cos(14πfLO2t)+ . . . ]  (28)

Since sgn(S1(t)) and sgn(S2(t)) are −1 and +1, and −1 and +1, respectively, their absolute values are represented by
|sgn(S1(t))|=1  (32)
|sgn(S2(t))|=1  (33)

Thus, the formula (31) is represented by

Apparent from the formula (36), when the RF signal URFis switched by the polarities of the local oscillator signals S1(t) and S2(t), basic waves and harmonic waves of the three signals are obtained.

In this case, if the doubly-polarity switching mixer ofFIG. 9constitutes a down-conversion system where a low-pass filter follows this doubly-polarity switching mixer, only the low frequency component cos{2π(fRF−fLO1−fLO2)t} is obtained. Note that a difference |fLO1−fLO2| is defined as an intermediate frequency fIF.

Also, four frequency components such as cos[2π{fRF−(2m+1)fLO1−(2m′+1)fLO2}t], cos[2π{fRF−(2m+1)fLO1+(2m′+1)fLO2}t], cos[2π{fRF+(2m+1)fLO1+(2m′+1)fLO2}t] and cos[2π{fRF+(2m+1)fLO1−(2m′+1)fLO2}t] are obtained from triple products cos(2πfRFt) cos{2π(2m+1)fLO1t}cos{2π(2m′+1)fLO2t} (m, m′=1, 2, . . . ) of the RF signal VRF(t) and the odd-higher harmonic waves of the local oscillator signals S1(t) and S2(t) with reference to the formula of triple product of trigonometric functions shown in the formula (17). In this case, these triple products decay with a coefficient of 1/{(2m+1) (2m′+1)}. Also, the frequencies of these triple products are on the odd-higher order. For example, when fLO1=2nfLO2(n=2, 3, . . . ) and fRF=fLO1+fLO2, the closest frequency is 7fLO1/4. Here, if fLO2=fLO1/2 and m=m′=1, 3fLO1/2=fRF.

If an ideal doubly-polarity switching mixer has the same conversion gain in frequencies fRF±ifLO1±jfLO2, the in-band noise power converted from all bands around the frequencies fRF±ifLO1±jfLO2is about six times (=4( 1/12+⅓2+⅕2+ . . . )( 1/12+⅓2+⅕2+ . . . )=π4/16=6.088) from the formula (36). Note 1/12+⅓2+⅕2+ . . . +1/(2i+1)2+ . . . π2/8. Therefore, the noise figure (NF) of the ideal doubly-polarity switching mixer becomes damaged by 6.088, i.e., 7.844 dB, as compared with a circuit with a single-input signal and a single-output signal.

Therefore, the formula (31) is represented by

From the formula (41), when the RF signal URFis switched by the polarities of the local oscillator signals S1(t) and S2′(t), basic waves and harmonic waves of the three signals are obtained.

In this case, if the doubly-polarity switching mixer ofFIG. 9constitutes a down-conversion system where a low-pass filter follows this doubly-polarity switching mixer, only the low frequency component sin{2π(fRF−fLO1−fLO2)t} is obtained. Note that a difference |fLO1−fLO2| is defined as an intermediate frequency fIF.

Also, four frequency components such as sin[2π{fRF−(2m+1)fLO1−(2m′+1)fLO2}t], sin[2π{fRF−(2m+1)fLO1+(2m′+1)fLO2}t], sin[2π{fRF+(2m+1)fLO1+(2m′+1)fLO2}t] and sin[2π{fRF+(2m+1)fLO1−(2m′+1)fLO2}t] are obtained from triple products cos(2πfRFt) cos{2π(2m+1)fLO1t}sin{2π(2m′+1)fLO2t} (m, m′=1, 2, . . . ) of the RF signal VRF(t) and the odd-higher harmonic waves of the local oscillator signals S1(t) and S2(t) with reference to the formula of triple product of trigonometric functions shown in the formula (17). In this case, these triple products decay with a coefficient of 1/{(2m+1) (2m′+1)}. Also, the frequencies of these triple products are on the odd-higher order. For example, when fLO1=2nfLO2(n=2, 3, . . . ) and fRF=fLO1+fLO2, the closest frequency is 7fLO1/4. Here, if fLO2=fLO1/2 and m=m′=1, 3fLO1/2=fRF.

InFIG. 10A, which illustrates a detailed circuit diagram of the doubly-polarity switching mixer ofFIG. 9, each of the switches91,92,93and94are constructed by emitter-coupled pairs (current switches) of bipolar transistors Q1, Q2; Q3, Q4; Q5, Q6; and Q7, Q8. In this case, one of the transistors Q1and Q2, one of the transistors Q3and Q4, one of the transistors Q5and Q6, and one of the transistors Q7and Q8are turned ON, while the other of the transistors Q1and Q2, the other of the transistors Q3and Q4, the other of the transistors Q5and Q6, and the other of the transistors Q7and Q8are turned OFF, so that differential currents IRF+and IRF−generated from a linear differential circuit101by the RF signal VRFare switched. Thus, an intermediate signal VIFis obtained. Note that the doubly-polarity switching mixer ofFIG. 10Aalso serves as an analog circuit and accordingly, serves as a three-input multiplier.

InFIG. 10B, which is a detailed circuit diagram of the linear differential circuit101ofFIG. 10A, a current mirror circuit is formed by bipolar transistors Q9and Q10and another current mirror circuit is formed by bipolar transistors Q11and Q12. Collectors of the bipolar transistors Q10and Q11are connected to emitters of bipolar transistors Q13and Q14, respectively, whose bases receive the RF signal VRF. Also, an emitter degeneration resistor REEis connected between the emitters of the bipolar transistors Q13and Q14. Further, one current source IOis connected to each of the collectors of the bipolar transistors Q13and Q14, and also, bases of bipolar transistors Q15and Q16serving as current sources to the current mirror circuits (Q9, Q10; Q11, Q12) are connected to the collectors of the bipolar transistors Q13and Q14, respectively.

InFIG. 10B, the following differential currents IRF+and IRF−are generated from the collectors of the bipolar transistors Q9and Q12.
IRF+=IO+VRF/REE(42)
IRF−=IO−VRF/REE(43)

That is, the linear characteristics of the linear differential circuit101are determined by the emitter degeneration resistor REE. Note that a resistance manufactured by a semiconductor manufacturing process has excellent linear characteristics. Therefore, the linear differential circuit101has excellent linear characteristics.

InFIG. 11A, which illustrates another detailed circuit diagram of the doubly-polarity switching mixer ofFIG. 9, each of the switches91,92,93and94are constructed by source-coupled pairs (current switches) of MOS transistors M1, M2; M3, M4; M5, M6; and M7, M8. In this case, one of the transistors M1and M2, one of the transistors M3and M4, one of the transistors M5and M6, and one of the transistors M7and M8are turned ON, while the other of the transistors M1and M2, the other of the transistors M3and M4, the other of the transistors M5and M6, and the other of the transistors M7and M8are turned OFF, so that differential currents IRF+and IRF−generated from a linear differential circuit111by the RF signal VRFare switched. Thus, an intermediate signal VIFis obtained. In the doubly-polarity switching mixer ofFIG. 11A, the transconductance does not change monotonously for a small signal change. Therefore, the doubly-polarity switching mixer ofFIG. 11Adoes not serve as an analog circuit and accordingly, does not serve as a three-input multiplier.

InFIG. 11B, which is a detailed circuit diagram of the linear differential circuit111ofFIG. 11A, a current mirror circuit is formed by MOS transistors M9and M10and another current mirror circuit is formed by MOS transistors M11and M12. Drains of the MOS transistors M10and M11are connected to sources of MOS transistors M13and M14, respectively, whose gates receives the RF signal VRF. Also, a source degeneration resistor REEis connected between the sources of the MOS transistors M13and M14. Further, one current source IOis connected to each of the drains of the MOS transistors M13and M14, and also, gates of MOS transistors M15and M16serving as current sources to the current mirror circuits (M9, M10; M11, M12) are connected to the drains of the MOS transistors M13and M14, respectively.

Even inFIG. 11B, the differential currents IRF+and IRF−represented by the formulae (42) and (43) are generated from the drains of the MOS transistors M9and M12.

That is, the linear characteristics of the linear differential circuit111are determined by the source degeneration resistor REE. Note that a resistance manufactured by a semiconductor manufacturing process has excellent linear characteristics. Therefore, the linear differential circuit III has excellent linear characteristics.

Generally, in frequency mixers, the suppression of high-order distortion characteristics such as second-order and third-order distortion characteristics, i.e., second-order and third-order intercept point characteristics are important. In the doubly-polarity switching mixers ofFIGS. 10A and 11A, the high-order distortion characteristics can be sufficiently suppressed by the linear differential circuit ofFIGS. 10B and 11B. However, in the doubly-polarity switching mixers ofFIGS. 10A and 11A, the power supply voltage VCCor VDDneeds to be higher than 2V.

InFIG. 12, which illustrates a modification of the doubly-polarity switching mixer ofFIG. 10A, two triple tail cells C1and C2are provided. In the triple tail cell C1, three emitter-coupled bipolar transistors Q1′, Q2′ and Q2′ are driven by one tail current IRF+, while in the triple tail cell C2, three emitter-coupled bipolar transistors Q4′, Q5′ and Q6′ are driven by one tail current IRF−. The tail currents IRF+and IRF−are generated by a V-I conversion circuit121which can be easily constructed by bipolar transistors whose emitters are grounded via emitter resistors, where use is made of base voltage-to-collector current characteristics as V-I characteristics. InFIG. 12, the power supply voltage VCCcan be lower than 1V.

In more detail, the transistors Q1′, Q2′, Q4′ and Q5′ are switched by the local oscillator signal VLO1or S1(t), and the transistors Q3′ and Q6′ are switched by the local oscillator signal VLO2or S2(t). In this case, when the transistor Q3′ is turned ON by the local oscillator signal VLO2, the tail current IRF+needs to be supplied from the power supply voltage VCCregardless of whether the transistors Q1′ and Q2′ are turned ON or OFF. On the other hand, when the transistor Q6′ is turned ON by the local oscillator signal VLO2, the tail current IRF−needs to be supplied from the power supply voltage VCCregardless of whether the transistors Q4′ and Q5′ are turned ON or OFF. For this purpose, the transistors Q3′ and Q6′ are increased in size or the amplitude of the local oscillator signal VLO2is larger than that of the local oscillator signal VLO1.

Thus, the doubly-polarity switching mixer ofFIG. 12is equivalent to the doubly-polarity switching mixer ofFIGS. 10A and 10Band has an advantage in that the power supply voltage VCCis low.

InFIG. 13, which illustrates a modification of the doubly-polarity switching mixer of FIG11A, two triple tail cells C1and C2are provided. In the triple tail cell C1, three source-coupled MOS transistors M1′, M2′ and M2′ are driven by one tail current IRF+, while, in the triple tail cell C2, three emitter-coupled MOS transistors M4′, M5′ and M6′ are driven by one tail current IRF−. The tail currents IRF+and IRF−are generated by a V-I conversion circuit131which can be easily constructed by MOS transistors whose sources are grounded via source resistors, where use is made of gate voltage-to-drain current characteristics as V-I characteristics. InFIG. 13, the power supply voltage VDDcan be lower than 1V.

In more detail, the transistors M1′, M2′, M4′ and M5′ are switched by the local oscillator signal VLO1or S1(t), and the transistors M3′ and M6′ are switched by the local oscillator signal VLO2or S2(t). In this case, when the transistor M3′ is turned ON by the local oscillator signal VLO2, the tail current IRF+needs to be supplied from the power supply voltage VDDregardless of whether the transistors M1′ and M2′ are turned ON or OFF. On the other hand, when the transistor M6′ is turned ON by the local oscillator signal VLO2, the tail current IRF−needs to be supplied from the power supply voltage VDDregardless of whether the transistors M4′ and M5′ are turned ON or OFF. For this purpose, the transistors M3′ and M6′ are increased in size or the amplitude of the local oscillator signal VLO2is larger than that of the local oscillator signal VLO1.

Thus, the doubly-polarity switching mixer ofFIG. 13is equivalent to the doubly-polarity switching mixer ofFIGS. 11A and 11Band has an advantage in that the power supply voltage VDDis low.

InFIG. 14A, which illustrates a modification of the doubly-polarity switching mixer ofFIG. 12, two triple tail cells C3and C4are added, and a dual linear differential circuit141is provided instead of the V-I conversion circuit121ofFIG. 12. The dual linear differential circuit141which is similar to the linear differential circuit101ofFIG. 10Bis illustrated in detail inFIG. 14B. In the triple tail cell C3, three emitter-coupled bipolar transistors Q7′, Q8′ and Q9′ are driven by one tail current VRF+, and in the triple tail cell C4, three emitter-coupled bipolar transistors Q10′, Q11′ and Q12′ are driven by one tail current IRF−. In this case, the intermediate signal VIFis obtained by a difference between a sum current flowing through the transistors Q1′, Q5′, Q8′ and Q10′ and a sum current flowing through the transistors Q2′, Q4′, Q7′ and Q11′.

InFIG. 15A, which illustrates a modification of the doubly-polarity switching mixer ofFIG. 13, two triple tail cells C3and C4are added, and a dual linear differential circuit151is provided instead of the V-I conversion circuit131ofFIG. 13. The dual linear differential circuit151which is similar to the linear differential circuit101ofFIG. 11Bis illustrated in detail inFIG. 15B. In the triple tail cell C3, three emitter-coupled bipolar transistors M7′, M8′ and M9′ are driven by one tail current VRF+, and in the triple tail cell C4, three emitter-coupled bipolar transistors M10′, M11′ and M12′ are driven by one tail current IRF−. In this case, the intermediate signal VIFis obtained by a difference between a sum current flowing through the transistors M1′, M5′, M8′ and M10′ and a sum current flowing through the transistors M2′, M4′, M7′ and M11′.

InFIG. 16, which illustrates a third embodiment of the quadrature mixer circuit applied to a direct conversion type wireless receiver according to the present invention, a 1/2n(n=1, 2, . . . ) frequency divider161is provided instead of the ½-frequency divider71and72ofFIG. 7. In the ¼-frequency divider161where n=1 is constructed by a Johnson counter, the quadrature mixer circuit ofFIG. 16is the same as that ofFIG. 7.

Also, since fLO2=fLO/(2n) the frequency fLO2of the output signals of the 1/2n-frequency divider161is represented by
fRF=(2n+1)fLO2(44)

As apparent from the formulae (28) and (38), since the output signals of the ½n-frequency divider161are rectangular, odd-higher order harmonic frequencies (2j−1) fLO2(j=2, 3, . . . ) are included therein. From the formula (44), some of such harmonic frequencies always coincide with the frequency fRFof the RF signal VRF, which would increase the DC offset and the reception trouble as in the prior art.

InFIG. 17, which illustrates a fourth embodiment of the quadrature mixer circuit applied to a direct conversion type wireless receiver according to the present invention, a 1/m-frequency divider171is connected to the voltage controlled oscillator33″ to generate a first local oscillator signal uLO1, and a 1/m′-frequency divider172is connected to the voltage controlled oscillator33″ to generate a second local oscillator signal uLO2. In this case,
fLO1=fLO/m
fLO2=fLO/m′
then,
fRF=fLO1+fLO2=fLO/m+fLO/m′=(m+m′)/(m m′)·fLO(45)

The frequency component of the first local oscillator signal uLO1includes (2i−1) fLO/m (i=1, 2, . . . ) and the frequency component of the second local oscillator signal uLO2includes (2j−1) fLO/m′(j=1, 2, . . . ). These frequencies should not coincide with the frequency fRFof the RF signal. That is,
(m+m′)/(m m′)≠1
(2i−1)/m≠(m+m′)/(m m′)
(2j−1)/m′≠(m+m′)/(m m′)

Even in this case, the frequency component of the first local oscillator signal uLO1includes (2i−1) fLO/m (i=1, 2, . . . ) and the frequency component of the second local oscillator signal uLO2includes (2j−1) fLO/(2n)(j=1, 2, . . . ). These frequencies should not coincide with the frequency fRFof the RF signal. That is,
(m+2n)/(2m n)≠1
(2i−1)/m≠(m+2n)/(2m n)
(2j−1)/2n≠(m+2n)/(2m n)

According to the inventor's calculation the noise factor (NF) of the quadrature mixer circuit according to the present invention was about 7 dB while the NF of the first prior art quadrature mixer circuit as illustrated inFIG. 1was 3.01 dB. Such deterioration of the NF can be compensated for by increasing the power gain of the AGC amplifiers6and7in a direct conversion type wireless receiver, and accordingly, there is no actual problem.

Also, the present invention can be applied to a low IF type wireless receiver.

As explained hereinabove, according to the present invention, the DC offset can be decreased, the reception trouble can be suppressed, and the number of components can be decreased.