PHOTOVOLTAIC DEVICE AND METHOD FOR MANUFACTURING SAME

A photovoltaic device (10) includes a photovoltaic layer (3) in which a p-type semiconductor layer (31), an i-type semiconductor layer (32), and an n-type semiconductor layer (33) are successively stacked. The p-type semiconductor layer (31) is formed from a p-type thin silicon films (311 to 313). The p-type thin silicon films (311 and 312) are formed by depositing silicon thin films having a p-type conductivity type and then by nitriding the silicon thin films using pulse power in which a 100 Hz to 1 kHz low-frequency pulse power is superimposed on a 1 MHz and 50 MHz high-frequency power as plasma excitation power, and using conditions in which the density of the high-frequency power is 100 to 300 mW/cm2, the pressure during plasma processing is 300 to 600 Pa, and the substrate temperature during plasma processing is 140° C. to 190° C. The p-type thin silicon film (313) is deposited under the above conditions.

TECHNICAL FIELD

The present invention relates to a photovoltaic device and a method for manufacturing the same.

BACKGROUND ART

In the related art, a photovoltaic device disclosed in PTL 1 as a photovoltaic device that converts light to electricity is known.

The photovoltaic device has a structure including at least one photovoltaic layer with a pin structure in which a p-type semiconductor layer including silicon atoms, an i-type semiconductor layer, and an n-type semiconductor layer are successively stacked.

The p-type semiconductor layer includes 0.001 to 10 (atomic %) of nitrogen atoms, and has a crystal silicon phase. As a result, an open-circuit voltage and a short-circuit current are increased, and it is possible to increase the photovoltaic efficiency.

In the related art, the photovoltaic device disclosed in PTL 2 is known. The photovoltaic device is formed with the same structure as the photovoltaic device disclosed in PTL 1, the p-type semiconductor layer thereof including nitrogen atoms at a concentration A (atomic %) and boron atoms at a concentration B (atomic %), and the concentration A and the concentration B satisfying the relationship 0.11−0.99 A+0.042 A2≦B≦0.2+0.2 A+0.05 A2. As a result, an open-circuit voltage and a short-circuit current are increased, and it is possible to increase the photovoltaic efficiency.

PTL 3 discloses a method for manufacturing a conductive silicon nitride film. The method for manufacturing the conductive silicon nitride film includes a first step of forming an n-type or a p-type doped microcrystalline silicon film, and a second step of forming a conductive silicon nitride film by nitriding the microcrystalline silicon film by irradiating the microcrystalline silicon film with plasma including nitrogen, in which the dilution ratio of the raw material gas to be introduced when forming the microcrystalline silicon film in the first step is 150 or more and 600 or less.

As a result, it is possible to prepare a conductive silicon nitride film with a low refractive index and that has conductivity. It is possible to improve the photovoltaic efficiency by connecting the two photovoltaic layers that configure the photovoltaic device using the conductive silicon nitride film.

DISCLOSURE OF INVENTION

In the method for preparing the p-type semiconductor layer disclosed in PTL 1 and PTL 2, nitrogen (N2) gas is used as the raw material gas in the deposition step of the p-type semiconductor layer, and the concentration of nitrogen content in the film of the p-type semiconductor layer is controlled by controlling the flow rate ratio with respect to the silane (SiH4) gas of the N2gas.

However, in the deposition step of the silicon semiconductor layer by plasma chemical vapor deposition (CVD) for manufacturing a thin film solar battery with a large area, it is difficult to realize a uniform concentration of nitrogen content in the entire plane of the photovoltaic device.

As a cause thereof, in the method for preparing the p-type semiconductor layer disclosed in PTLs 1 and 2, in the plasma CVD device with a large area such as an electrode area exceeding 1 m2, it is thought that it is difficult to supply the raw material gas ensuring in-plane uniformity across the entire electrode area, and difficult to ensure in-plane uniformity of the decomposition energy of the N2gas due to distribution of the electric field strength in the electrode plane.

The conductive silicon nitride film disclosed in PTL 3 satisfies the characteristics demanded with respect to an intermediate layer arranged between the two photovoltaic layers. PTL 3 does not disclose the manufacturing conditions for achieving both an improvement in the open-circuit voltage with respect to the p-type semiconductor layer or the n-type semiconductor layer and maintenance of a high fill factor (FF).

The present invention provides a method for manufacturing a photovoltaic device with improved in-plane uniformity of nitrogen content concentration in a large-area photovoltaic device and that has high conversion efficiency.

The present invention provides a photovoltaic device with improved in-plane uniformity of nitrogen content concentration in a large-area photovoltaic device and that has high conversion efficiency.

According to an embodiment of the invention, the photovoltaic device that has a photovoltaic portion that converts light to electricity includes a substrate; and first and second silicon-based semiconductor layers. The first silicon-based semiconductor layer is arranged above the substrate, configures the photovoltaic portion, and has a p-type conductivity type. The second silicon-based semiconductor layer is arranged above the substrate, configures the photovoltaic portion, and has an n-type conductivity type. At least one of the first and second silicon-based semiconductor layers has a structure in which a layer including nitrogen atoms is interposed in a thickness direction between layers not including nitrogen atoms or a structure in which a layer having a first nitrogen atom concentration is interposed in the thickness direction between layers having a second nitrogen atom concentration lower than the first nitrogen atom concentration.

According to the embodiments of the invention, there is provided a method for manufacturing a photovoltaic device by a plasma CVD method, the method including a first plasma processing step of depositing the first silicon-based semiconductor layer that has a p-type conductivity type or an n-type conductivity type above the substrate; a second plasma processing step of irradiating the first silicon-based semiconductor layer with plasma in which a raw material gas including nitrogen atoms is excited; and a third plasma processing step of depositing a second silicon-based semiconductor layer that has the same conductivity type as the first silicon-based semiconductor layer on the first silicon-based semiconductor layer, in which the second plasma processing step uses pulsed power in which a low frequency pulse power of 100 Hz to 1 kHz is superimposed on a high frequency power of 1 MHz to 50 MHz as a plasma excitation power, in which the density of the high frequency power is 100 mW/cm2to 300 mW/cm2, in which the pressure during the plasma processing is 300 Pa to 600 Pa, and in which the substrate temperature during plasma processing is 140° C. to 190° C.

The photovoltaic device according to the embodiment of the invention includes a first silicon-based semiconductor layer that has a p-type conductivity type, and a second silicon-based semiconductor layer that has an n-type conductivity type, in which at least one of the first and second silicon-based semiconductor layers has a structure in which a layer including nitrogen atoms is interposed in a thickness direction between layers not including nitrogen atoms or a structure in which a layer having a first nitrogen atom concentration is interposed in the thickness direction between layers having a second nitrogen atom concentration lower than the first nitrogen atom concentration.

According to the structure, since it is not necessary to excessively increase the concentration of nitrogen atoms in the conductive layer as a whole, it is possible to increase the open-circuit voltage without increasing the series resistance. Through the structure interposing the high nitrogen concentration layer with low nitrogen concentration layers, it is easy to realize a uniform nitrogen content over the entire large surface area substrate, and possible to improve the conversion efficiency over the entire surface of the large-area photovoltaic device as a result.

In the method for manufacturing a photovoltaic device according to the embodiment of the invention, a silicon-based semiconductor layer that has a p-type conductivity type or an n-type conductivity type is formed by nitriding the first silicon-based semiconductor layer along with depositing the first silicon-based semiconductor layer using a pulse power in which a low frequency pulse power of 100 Hz to 1 kHz is superimposed on a high frequency power of 1 MHz to 50 MHz as the plasma excitation power and conditions in which the density of the high frequency power is 100 mW/cm2to 300 mW/cm2, the pressure during plasma processing is 300 Pa to 600 Pa, and the substrate temperature during plasma processing is 140° C. to 190° C. As a result, the discharge during forming of the silicon-based semiconductor layer having a p-type conductivity type or an n-type conductivity type becomes uniform in the entire substrate plane, and it is possible to increase the electrode in-plane uniformity of the decomposition ratio of the nitrogen gas.

Accordingly, the in-plane uniformity of the nitrogen atom concentration in the silicon-based semiconductor layer having a p-type conductivity type or an n-type conductivity type is improved, and the open-circuit voltage is improved by suppressing a lowering of the fill factor in the photovoltaic device.

Thereby, it is possible to improve the conversion efficiency of a large-area photovoltaic device.

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiments of the present invention will be described in detail referring to the accompanying drawings. The same or corresponding parts in the drawings are given the same reference signs, and description thereof will not be repeated.

In the specification, the term “amorphous phase” refers to a state in which the silicon (Si) atoms or the like are arranged randomly. The term “microcrystalline phase” refers to a state which crystal grains of Si or the like for which the grain diameter is several nm to several hundred are present in the random network of Si atoms or the like. Although amorphous silicon is denoted by “a-Si”, in practice, this denotation indicates the inclusion of hydrogen (H) atoms. For amorphous silicon carbide (a-SiC), amorphous silicon nitride (a-SiN), amorphous silicon germanium (a-SiGe), amorphous germanium (a-Ge), microcrystalline silicon carbide (μc-SiC), microcrystalline silicon nitride (μc-SiN), microcrystalline silicon (μc-Si), microcrystalline silicon germanium (μc-SiGe) and microcrystalline germanium (μc-Ge), the inclusion of H atoms is similarly indicated.

FIG. 1is a cross-sectional view showing a configuration of a photovoltaic device according to Embodiment 1. With reference toFIG. 1, the photovoltaic device10according to Embodiment 1 of the invention includes a substrate1, a transparent conductive film2, and photovoltaic layer3, and a rear electrode4.

The photovoltaic layer3includes a p-type semiconductor layer31, an i-type semiconductor layer32, and an n-type semiconductor layer33. The p-type semiconductor layer31is formed from a p-type silicon thin films311to313.

The transparent conductive film2is arranged in contact with the substrate1.

The photovoltaic layer3has a structure in which the p-type semiconductor layer31, the i-type semiconductor layer32, and the n-type semiconductor layer33are successively stacked on the transparent conductive film2, and is arranged in contact with the transparent conductive film2.

The p-type semiconductor layer31is arranged in contact with the transparent conductive film2. More specifically, the p-type silicon thin film311of the p-type semiconductor layer31is arranged in contact with the transparent conductive film2, the p-type silicon thin film312is arranged in contact with the p-type silicon thin film311, and the p-type silicon thin film313is arranged in contact with the p-type silicon thin film312.

The i-type semiconductor layer32is arranged in contact with the p-type silicon thin film313of the p-type semiconductor layer31, and the n-type semiconductor layer33is arranged in contact with the i-type semiconductor layer32.

The rear electrode4is formed from a two-layer structure of a transparent conductive film and a reflective layer. The transparent conductive film of the rear electrode4is arranged in contact with the n-type semiconductor layer33of the photovoltaic layer3, and the reflection layer is arranged in contact with the transparent conductive film.

The substrate1is formed from an insulating glass, or, in a case in which flexibility is provided, a resin such as a polyimide.

The transparent conductive film2is formed, for example, from indium tin oxide (ITO), SnO2, ZnO or the like.

Each of the p-type silicon thin films311and313is formed from any one of a p-type a-SiC, a p-type a-SiN, a p-type a-Si, a p-type a-SiGe, a p-type μc-SiC, a p-type μc-SiN, a p-type μc-Si, and a p-type μc-SiGe.

The p-type silicon thin film312is formed from any one of a p-type a-SiC, a p-type a-SiN, a p-type a-Si, a p-type a-SiGe, a p-type μc-SiC, a p-type μc-SiN, a p-type μc-Si, and a p-type μc-SiGe to which nitrogen atoms are added. In a case in which the p-type silicon thin film312is formed from the same p-type a-SiN or a p-type μc-SiN as the p-type silicon thin films313and311, the nitrogen concentration of the p-type silicon thin film312is higher than the nitrogen concentration of the p-type silicon thin films311and313.

Accordingly, the p-type semiconductor layer31has a structure in which a layer including nitrogen atoms (p-type silicon thin film312) is interposed in the thickness direction between layers not including nitrogen atoms (p-type silicon thin films311and313) or a structure in which a layer that has a first nitrogen atom concentration (p-type silicon thin film312) is interposed in the thickness direction between layers that have a second nitrogen atom concentration lower than the first nitrogen layer concentration (p-type silicon thin films311,313).

The i-type semiconductor layer32is formed from any one of an i-type a-SiC, an i-type a-SiN, an i-type a-Si, an i-type a-SiGe, an i-type a-Ge, an i-type μc-SiC, an i-type μc-SiN, an i-type μc-Si, an i-type μc-SiGe, and an i-type μc-Ge. In a case in which the i-type semiconductor layer32is formed from any of an i-type a-SiC, an i-type a-SiN, an i-type a-SiGe, an i-type μc-Sic, an i-type μc-SiN, and an i-type μc-SiGe, the optical band gap may become gradually smaller from the incident side of light toward the rear surface side.

In this way, the p-type semiconductor layer31, the i-type semiconductor layer32, and the n-type semiconductor layer33are each formed from a silicon-based semiconductor layer.

The p-type semiconductor layer31, the i-type semiconductor layer32, and the n-type semiconductor layer33may be alternately formed from the same silicon-based semiconductor layer, or may be alternately formed from different silicon-based semiconductor layers. For example, the p-type semiconductor layer31and the i-type semiconductor layer32may be formed from microcrystalline silicon, and the n-type semiconductor layer33may be formed by amorphous silicon. In addition, the p-type semiconductor layer31may be formed from amorphous silicon carbide, the i-type semiconductor layer32may be formed from microcrystalline silicon, and the n-type semiconductor layer33may be formed by amorphous silicon.

Each of the i-type semiconductor layer32and the n-type semiconductor layer33may be formed with a single layer structure or may be formed with a multi-layer structure. In a case in which each of the i-type semiconductor layer32and the n-type semiconductor layer33is formed with a multi-layer structure, the plurality of layers may be alternately formed from the same silicon-based semiconductor layer, or may be alternately formed from different silicon-based semiconductor layer.

The transparent conductive film that configures the rear electrode4is formed from ITO, SnO2, ZnO, or the like. The transparent conductive film that configures the rear electrode4may be formed from the same material as the transparent conductive film2, or may be formed from a different material from the transparent conductive film2.

The reflective layer that configures the rear electrode4is formed from a metal film with a high reflectivity, such as silver (Ag) and aluminum (Al), or a TiO2or the like with a high reflectivity to the color white.

The structure of the photovoltaic device10described above is a structure in a case of sunlight being incident from the substrate1side is referred to as a superstrate-type.

The photovoltaic device10may be a substrate type in which sunlight is incident from the rear electrode4side. In this case, a reflection electrode is formed on the substrate1instead of the transparent conductive film2, the n-type semiconductor layer33, the i-type semiconductor layer32, and the p-type semiconductor layer31may be successively stacked on the reflection electrode, and a transparent conductive film may be formed on the p-type semiconductor layer31.

FIG. 2is a cross-sectional view showing a separate configuration of a photovoltaic device according to Embodiment 1. The photovoltaic device according to Embodiment 1 may be the photovoltaic device10A shown inFIG. 2.

With reference toFIG. 2, the photovoltaic device10A has the photovoltaic layer5added to the photovoltaic device10shown inFIG. 1, and is otherwise the same as the photovoltaic device10.

The photovoltaic layer5is arranged between the transparent conductive film2and the photovoltaic layer3. The photovoltaic layer5has a structure in which the p-type semiconductor layer51, the i-type semiconductor layer52and the n-type semiconductor layer53are successively stacked on the transparent conductive film2.

The p-type semiconductor layer51is arranged in contact with the transparent conductive film2, the i-type semiconductor layer52is arranged in contact with p-type semiconductor layer51, and the n-type semiconductor layer53is arranged in contact with the i-type semiconductor layer52.

In the photovoltaic device10A, the p-type silicon thin film311of the p-type semiconductor layer31is arranged in contact with the n-type semiconductor layer53of the photovoltaic layer5.

The p-type semiconductor layer51is formed from any one of a p-type a-SiC, a p-type a-SiN, a p-type a-Si, a p-type a-SiGe, a p-type μc-SiC, a p-type μc-SiN, a p-type μc-Si, and a p-type μc-SiGe.

The i-type semiconductor layer52is formed from any one of an i-type a-SiC, an i-type a-SiN, an i-type a-Si, an i-type a-SiGe, an i-type a-Ge, an i-type μc-SiC, an i-type μc-SiN, an i-type μc-Si, and i-type μc-SiGe, and an i-type μc-Ge. In a case in which the i-type semiconductor layer52is formed from any of an i-type a-SiC, an i-type a-SiN, an i-type a-SiGe, an i-type μc-Sic, an i-type μc-SiN, and an i-type μc-SiGe, the optical band gap may become gradually smaller from the incident side of light toward the rear surface side.

In this way, the p-type semiconductor layer51, the i-type semiconductor layer52, and the n-type semiconductor layer53are each formed from a silicon-based semiconductor layer. The p-type semiconductor layer51, the i-type semiconductor layer52, and the n-type semiconductor layer53, similarly to the above-described p-type semiconductor layer31, the i-type semiconductor layer32, and the n-type semiconductor layer33, may be alternately formed from the same silicon-based semiconductor layer, or may be alternately formed from different silicon-based semiconductor layers.

In the photovoltaic device10A, the p-type semiconductor layer51of the photovoltaic layer5may be formed, similarly to the p-type semiconductor layer31, from a structure in which a layer including nitrogen atoms is interposed in the thickness direction between layers not including nitrogen atoms or a structure in which a layer that has a first nitrogen atom concentration is interposed in the thickness direction between layers that have a second nitrogen atom concentration lower than the first nitrogen atom concentration.

Above, the photovoltaic device10including one photovoltaic layer3and the photovoltaic device10A including two photovoltaic layers3and5were described. However, Embodiment 1 is not limited thereto, and the photovoltaic device according to Embodiment 1 may be formed from a structure in which three or more photovoltaic layers are stacked in the thickness direction, and ordinarily includes at least one photovoltaic layer formed from a pin structure, in which at least one of the p-type semiconductor layer and the n-type semiconductor layer in at least one photovoltaic layer may be formed from a structure in which a layer including nitrogen atoms is interposed in the thickness direction between layers not including nitrogen atoms or a structure in which a layer that has a first nitrogen atom concentration is interposed in the thickness direction between layers that have a second nitrogen atom concentration lower than the first nitrogen atom concentration.

FIG. 3is a cross-sectional view showing the configuration of a solar battery module. With reference toFIG. 3, the solar battery module40includes a substrate41, a transparent conductive film42, a photovoltaic layer43, a rear electrode44, and an electrode48.

The substrate41is formed from the same material as the substrate1, described above.

The transparent conductive film42is arranged on the substrate41spaced with an isolation groove45in the in-plane direction of the substrate41, and is formed from the same material as the above-described transparent conductive film2.

The photovoltaic layer43is arranged on the transparent conductive film42so that the isolation groove45is embedded. In this case, the photovoltaic layer43is arranged via the contact line46in the in-plane direction of the substrate41. The photovoltaic layer43, for example, is formed from photovoltaic layer3shown inFIG. 1or the two photovoltaic layers3and5shown inFIG. 2, and is ordinarily formed from one or more photovoltaic layers (having a pin structure).

The rear electrode44is arranged on the photovoltaic layer43such that the contact line46is embedded. In this case, the rear electrode44is arranged spaced by the isolation groove47in the in-plane direction of the substrate41. The rear electrode44is formed from the same material as the rear electrode4, described above.

The electrode48is arranged on the rear electrode44at both end portions in the in-plane direction of the substrate41.

In the solar battery module40, one photovoltaic layer43is interposed by the transparent conductive film42and the rear electrode44, and the rear electrode44is connected to the transparent conductive film42that contacts the neighboring photovoltaic layer43. As a result, the solar battery module40is formed from structure in which a plurality of photovoltaic layers43is connected in series in the in-plane direction of the substrate41, referred to as a so-called integrated solar battery. The photoelectric current photogenerated in the solar battery module40is extracted from two electrodes48. In this way, in the solar battery module40, one group of the transparent conductive film42, the photovoltaic layer43, and the rear electrode44are formed from the photovoltaic device10shown inFIG. 1or the photovoltaic device10A shown inFIG. 2.

FIG. 4is an exploded perspective view of the solar battery module. With reference toFIG. 4, the solar battery module40further includes bus bars151and152, lead lines153and154, a sealing material157, a back sheet158and a terminal box159.

The bus bar151is electrically connected to one electrode48, and the bus bar152is electrically connected to the other electrode48.

The lead line153is electrically connected to the bus bar151, and the lead line154is electrically connected to the bus bar152.

The sealing material157has the same through hole as the through hole158A formed in the back sheet158. The sealing material157and the back sheet158are stacked on the transparent conductive film42, the photovoltaic layer43, the rear electrode44, the electrode48, the bus bars151and152, and the lead lines153and154, and is heated and pressed. The terminal box159is electrically connected to one end of the lead lines153and154via a through hole158A.

FIG. 5is a schematic view showing a configuration of a plasma device that manufactures the photovoltaic device according to Embodiment 1.

With reference toFIG. 5, the plasma device100includes a chamber101, an anode electrode102, the cathode electrode103, a supply pipe104, a gas supply device105, an exhaust pipe106, a gate valve107, a pump108, an impedance matching circuit109, and a power source110.

The chamber101is electrically connected to the ground potential GND. The anode electrode102and the cathode electrode103have a plate shape and are arranged substantially parallel in the chamber101. The anode electrode102is electrically connected to the ground potential GND, and the cathode electrode103is connected to the impedance matching circuit109. The anode electrode102has a built-in heater and supports the substrate120. The cathode electrode103has a plurality of holes (not shown) for supplying the raw material gas to a discharge region between the anode electrode102and the cathode electrode103in the surface of the anode electrode102side. The areas of the anode electrode102and the cathode electrode103, are, for example, 1.65 m2.

One end of the supply pipe104is connected to the gas supply device105, and the other end thereof is connected to the cathode electrode103.

The gas supply device105is connected to the supply pipe104. The gas supply device105supplies silane (SiH4) gas, nitrogen (N2) gas, hydrogen (H2) gas, methane (CH4) gas, diborane (B2H6) gas and phosphine (PH3) gas to the interior of the cathode electrode103via the supply pipe104.

One end of the exhaust pipe106is connected to the chamber101. The gate valve107is arranged in the exhaust pipe106on the chamber101side. The pump108is arranged in the exhaust pipe106further to the downstream side than the gate valve107. The pump108is used as a dry pump.

The gate valve107sets the pressure in the chamber101to a desired pressure. The pump108exhausts the gas inside the chamber101via the gate valve107.

The impedance matching circuit109is connected between the cathode electrode103and the power source110. The impedance matching circuit109supplies power to the cathode electrode103by adjusting the impedance so that a reflected wave of power supplied from the power source110reaches a minimum.

The power source110supplies pulse power in which a lower frequency pulse with a frequency of 100 Hz to 1 kHz is superimposed on a high frequency power with a frequency of 1 MHz to 50 MHz to the impedance matching circuit109.

FIG. 6is a schematic view showing a separate configuration of a plasma device that manufactures the photovoltaic device according to Embodiment 1.

With reference toFIG. 6, the plasma device100A includes a chamber131, anode electrodes132A to132D, cathode electrodes133A to133D, a supply pipe134A to134D, a gas supply device135, an exhaust pipe136, a gate valve137, a pump138, an impedance matching circuit139, and a power source140.

The chamber131is electrically connected to the ground potential GND. The anode electrodes132A to132D and the cathode electrodes133A to133D have plate shapes. The anode electrode132A and the cathode electrode133A are arranged substantially parallel in the chamber131. The anode electrode132B and the cathode electrode133B are arranged substantially parallel in the chamber131. The anode electrode132C and the cathode electrode133C are arranged substantially parallel in the chamber131. The anode electrode132D and the cathode electrode133D are arranged substantially parallel in the chamber131.

The anode electrodes132A to132D are electrically connected to the ground potential GND, and the cathode electrodes133A to133D are connected to the impedance matching circuit139. The anode electrodes132A to132D have a built-in heaters, and support the substrates121to124, respectively. The cathode electrode133A has a plurality of holes (not shown) for supplying the raw material gas to a discharge region between the anode electrode132A and the cathode electrode133A in the surface of the anode electrode132A. The cathode electrode133B has a plurality of holes (not shown) for supplying the raw material gas to a discharge region between the anode electrode132B and the cathode electrode133B in the surface of the anode electrode132B side. The cathode electrode133C has a plurality of holes (not shown) for supplying the raw material gas to a discharge region between the anode electrode132C and the cathode electrode133C in the surface of the anode electrode132C side. The cathode electrode133D has a plurality of holes (not shown) for supplying the raw material gas to a discharge region between the anode electrode132D and the cathode electrode133D in the surface of the anode electrode132D side. The areas of the anode electrodes132A to132D and the cathode electrodes133A to133D, are, for example, 1.65 m2.

The supply pipe134A is connected between the gas supply device135and the cathode electrode133A. The supply pipe134B is connected between the gas supply device135and the cathode electrode133B. The supply pipe134C is connected between the gas supply device135and the cathode electrode133C. The supply pipe134D is connected between the gas supply device135and the cathode electrode133D.

The gas supply device135is connected to the supply pipes134A to134D. The gas supply device135supplies SiH4gas, N2gas, H2gas, CH4gas, B2H6gas and PH3gas to the interior of the cathode electrodes133A to133D via the supply pipes134A to134D.

One end of the exhaust pipe136is connected to the chamber131. The gate valve137is arranged in the exhaust pipe136on the chamber131side. The pump138is arranged in the exhaust pipe136further to the downstream side than the gate valve137. The pump138is used as a dry pump.

The gate valve137sets the pressure in the chamber131to a desired pressure. The pump138exhausts the gas inside the chamber131via the gate valve137.

The impedance matching circuit139is connected between the cathode electrodes133A to133D and the power source140. The impedance matching circuit139supplies power to the cathode electrodes133A to133D by adjusting the impedance so that a reflected wave of power supplied from the power source140reaches a minimum.

The power source140supplies pulse power in which a lower frequency pulse with a frequency of 100 Hz to 1 kHz is superimposed on a high frequency power with a frequency of 1 MHz to 50 MHz to the impedance matching circuit139.

In this way, the plasma device100A supplies the pulse power by one power source140to the four cathode electrodes133A to133D.

FIG. 7is a conceptual view of the pulse power in the plasma device100shown inFIG. 5and the plasma device100A shown inFIG. 6.

With reference toFIG. 7, the power sources110and140generate a lower frequency pulse power LP and a high frequency power RF, generate the pulse power PP by superimposing the generated low frequency pulse power LP on the high frequency power RF, and supply the generated pulse power PP to each of the impedance matching circuits109and139.

The lower frequency pulse power LP has a frequency 100 Hz to 1 kHz, and the high frequency power RF has a frequency of 1 MHz to 50 MHz. As a result, the pulse power PP is formed from power in which the high frequency power is intermittently expressed at a frequency of 100 Hz to 1 kHz.

FIGS. 8 and 9are first and second process drawings, respectively, showing a method for manufacturing the solar battery module40shown inFIG. 3.

InFIGS. 8 and 9, a method for manufacturing the solar battery module40is described with a case in which the photovoltaic layer43of the solar battery module40is formed from two photovoltaic layers5and3shown inFIG. 2, and the substrate41, the transparent conductive film42, the p-type semiconductor layer51, the i-type semiconductor layer52, the n-type semiconductor layer53, the p-type semiconductor layer31, the i-type semiconductor layer32, the n-type semiconductor layer33, and the rear electrode44are formed from the following materials. The photovoltaic layer5arranged on the light incident side is defined as the top layer, and the photovoltaic layer3is defined as the bottom layer.

The substrate41is formed from an insulating glass, and the transparent conductive film42is formed from SnO2. The p-type semiconductor layer51is formed from a p-type a-SiC, and the p-type dopant is boron (B). The i-type semiconductor layer52is formed from an i-type a-Si. The n-type semiconductor layer53is formed from a two-layer structure (n-type a-Si/n-type μc-Si) in which n-type μc-Si is stacked on n-type a-Si, and the n-type dopant is phosphorous (P).

The p-type semiconductor layer31is formed from a p-type μc-Si, and the p-type dopant is B. Each of the p-type silicon thin films311and313are formed from a p-type μc-Si, and the p-type silicon thin film312is formed from a p-type μc-SiN. The i-type semiconductor layer32is formed from an i-type μc-Si. The n-type semiconductor layer33is formed from a two-layer structure (n-type a-Si/n-type μc-Si) in which n-type μc-Si is stacked on n-type a-Si, and the n-type dopant is P.

The rear electrode44is formed from a two-layer structure of a transparent conductive film and a reflection layer, the transparent conductive film is formed from ZnO, and the reflection layer is formed from Ag.

When manufacturing of the solar battery module40is started, a transparent conductive film42formed from SnO2is formed on the substrate41(refer to step (a) inFIG. 8). In this case, the size of the substrate41is, for example, 1000 mm×1400 mm.

The transparent conductive film42is irradiated with laser light from the substrate41side, and the isolation groove45is formed in the transparent conductive film42(refer to step (b) inFIG. 8). In this case, the isolation groove45is formed with a pitch of, for example, 10 mm. The laser light is formed from a YAG laser with a second harmonic (wavelength: 532 nm) or a yttrium orthovanadate (YVO4) laser with a second harmonic (wavelength: 532 nm).

After step (b), the photovoltaic layer5and the photovoltaic layer3are successively stacked on the transparent conductive film42by a plasma CVD method, and the photovoltaic layer43is formed such that the isolation groove45is embedded (refer to step (c) inFIG. 8).

The photovoltaic layer43is irradiated with laser light from the substrate41side, and the isolation groove49is formed in the photovoltaic layer43(refer to step (d) inFIG. 8). In this case, the isolation groove49is formed with a pitch of, for example, 10 mm. The above-described laser light is used for the laser light.

After the step (d), a transparent conductive film formed from ZnO is deposited on the photovoltaic layer43by a sputtering method, a reflection layer formed from Ag is subsequently deposited on the transparent conductive film by a sputtering method, and the rear electrode44is formed such that the isolation groove49is embedded (refer to step (e) inFIG. 8). In this case, the film thickness of the transparent conductive film (=ZnO) is, for example, 40 nm to 100 nm, and the film thickness of the reflection layer (=Ag) is, for example, 50 nm to 200 nm. The isolation groove49becomes the contact line46by forming the rear electrode44.

After the step (e), the photovoltaic layer43and the rear electrode44are irradiated with laser light from the substrate41side, and the isolation groove47is formed in the photovoltaic layer43and the rear electrode44(refer to step (f) inFIG. 9). In this case, the isolation groove47is formed with a pitch of, for example, 10 mm.

Thereafter, the transparent conductive film42, the photovoltaic layer43, and the rear electrode44are irradiated with laser light from the substrate41side, and a trimming region is formed by removing the transparent conductive film42, photovoltaic layer43, and the rear electrode44at the peripheral edge portion of the substrate41(refer to step (g) inFIG. 9).

An electrode48is formed on the rear electrode44at both end portions in the in-plane direction of the substrate41(refer to step (h) inFIG. 9). Thereafter, as described above, the bus bars151and152are electrically connected to the electrode48, the lead lines153and154are electrically connected to the bus bars151and152, respectively, the sealing material157and the back sheet158are stacked, heated and pressed, and the terminal box159is connected to the lead lines153and154, thereby completing the solar battery module40.

The number of integration steps (=number of series connections of the photovoltaic layer43isolated by the contact line46) in the solar battery module40is, for example, 45.

FIGS. 10 and 11are a first and a second process drawings, respectively, showing a detailed processing of the step (c) shown inFIG. 8.

AlthoughFIGS. 10 and 11illustrate process drawings of forming the photovoltaic layer43on one transparent conductive film42, in practice, the photovoltaic layer43is formed on a plurality of transparent conductive films42isolated by the isolation grooves45.

The flow rates of the raw material gas for forming the p-type semiconductor layer51, the i-type semiconductor layer52, the n-type semiconductor layer53, the p-type semiconductor layer31, the i-type semiconductor layer32, and the n-type semiconductor layer33are shown in Table 1.

After the step (b) shown inFIG. 8, the substrate41on which the transparent conductive film42is formed is installed on the anode electrodes132A to132D of the plasma device100A as the substrates121to124.

The gas supply device135supplies 2 sccm of SiH4gas, 42 sccm of H2gas, 12 sccm of hydrogen diluted B2H6gas, and 16 sccm of CH4gas to the interior of the respective cathode electrodes133A to133D via the supply pipes134A to134D. Thereby, the SiH4gas, the H2gas, the B2H6gas and the CH4gas are supplied to the discharge region between the anode electrode132A and the cathode electrode133A, the discharge region between the anode electrode132B and the cathode electrode133B, the discharge region between the anode electrode132C and the cathode electrode133C, and the discharge region between the anode electrode132D and the cathode electrode133D. The concentration of the hydrogen diluted B2H6gas is, for example, 0.1%.

The pressure inside the chamber131is set to 600 Pa to 1000 Pa using the gate valve137. The temperature of the substrates121to124is set to 170° C. to 200° C. using heaters built into the anode electrodes132A to132D.

The power source140applies the pulse power PP to the cathode electrodes133A to133D via the impedance matching circuit139. In this case, the frequency of the low frequency pulse power LP is, for example, 300 Hz to 500 Hz, and the frequency of the high frequency power RF is, for example, 11 MHz to 14 MHz. The power of the high frequency power in the pulse power PP is, for example, 20 mW/cm2to 500 mW/cm2.

Thereby, plasma is generated between the anode electrode132A and the cathode electrode133A, between the anode electrode132B and the cathode electrode133B, between the anode electrode132C and the cathode electrode133C, and between the anode electrode132D and the cathode electrode133D, and the p-type semiconductor layer51formed from a p-type a-SiC is deposited on the transparent conductive film42(refer to step (c-1) inFIG. 10).

When the film thickness of the p-type semiconductor layer51is 5 nm to 20 nm, the gas supply device135increases the flow rate of the SiH4gas from 2 sccm to 10 sccm, increases the flow rate of the H2gas from 42 sccm to 100 sccm, and stops the B2H6gas and the CH4gas. Thereby, the i-type semiconductor layer52formed from an i-type a-Si is deposited on the p-type semiconductor layer51(refer to step (c-2) inFIG. 10).

When the film thickness of the i-type semiconductor layer52is 220 nm to 320 nm, the gas supply device135increases the flow rate of the SiH4gas from 10 sccm to 20 sccm, increases the flow rate of the H2gas from 100 sccm to 150 sccm, and supplies 50 sccm of the hydrogen diluted PH3gas to the interior of the cathode electrodes133A to133D, respectively, via the supply pipes134A to134D. Thereby, the n-type a-Si is deposited on the i-type semiconductor layer52. The concentration of the hydrogen diluted PH3gas is, for example, 0.2%.

When the film thickness of the n-type a-Si is the desired film thickness, the gas supply device135decreases the flow rate of the SiH4gas from 20 sccm to 4 sccm, increases the flow rate of the H2gas from 150 sccm to 250 sccm, and decreases the flow rate of the PH3gas from 50 sccm to 25 sccm. Thereby, the n-type μc-Si is deposited on the n-type a-Si. That is, the n-type semiconductor layer53formed from an n-type a-Si/n-type μc-Si is deposited on the i-type semiconductor layer52(refer to step (c-3) inFIG. 10).

The film thickness of the n-type semiconductor layer53formed from an n-type a-Si/n-type μc-Si is, for example, 5 nm to 30 nm; however the ratio of the film thickness n-type a-Si and the film thickness of the n-type μc-Si is arbitrary.

When the film thickness of the n-type semiconductor layer53formed from an n-type a-Si/n-type μc-Si is 5 nm to 30 nm, the gas supply device135decreases the flow rate of the SiH4gas from 4 sccm to 2 sccm, decreases the flow rate of the H2gas from 250 sccm to 120 sccm, and stops the PH3gas, and supplies 12 sccm of hydrogen diluted B2H6gas to the interior of the cathode electrodes133A to133D, respectively, via the supply pipes134A to134D. The heater built into the anode electrodes132A to132D sets the temperature of the substrates121to124to 140° C. to 170° C., and the gate valve137sets the pressure of the chamber131to 400 Pa to 1600 Pa. Thereby, the p-type silicon thin film30formed from a p-type μc-Si is deposited on the n-type semiconductor layer53(refer to step (c-4) inFIG. 10).

When the film thickness of the p-type silicon thin film30is the desired value, the gas supply device135stops the SiH4gas, the H2gas, and the B2H6gas, and supplies the N2gas at a flow rate ratio of N2/SiH4of 5% to the interior of the cathode electrodes133A to133D via the supply pipes134A to134D, respectively. Although a range of 1% to 10% can be used as the N2/SiH4flow rate ratio, 5% is used herein.

Thereby, plasma employing N2gas is generated between the anode electrode132A and the cathode electrode133A, between the anode electrode132B and the cathode electrode133B, between the anode electrode132C and the cathode electrode133C, and between the anode electrode132D and the cathode electrode133D, and the p-type silicon thin film30is treated by plasma employing N2gas (refer to step (c-5) inFIG. 10).

As a result, the p-type silicon thin films311and312are formed (refer to step (c-6) inFIG. 11). The p-type silicon thin film311is formed from a p-type μc-Si not including nitrogen atoms, and the p-type silicon thin film312is formed from a p-type μc-SiN including nitrogen atoms. The term “not including nitrogen atoms” indicates that the concentration of nitrogen atom content is the equal to or lower than the base layer (layer to which nitrogen atoms are not actively added) of the p-type silicon thin film311.

After the step (c-6), the gas supply device135stops the N2gas, and supplies 2 sccm of SiH4gas, 120 sccm of H2gas, 12 sccm of hydrogen diluted B2H6gas to the interior of the respective cathodes133A to133D via the supply pipes134A to134D.

Thereby, the p-type silicon thin film313formed from a p-type μc-Si is deposited on the p-type silicon thin film312, and the p-type semiconductor layer31is deposited on the n-type semiconductor layer53(refer to step (c-7) inFIG. 11).

The film thickness of the p-type semiconductor layer31formed from the p-type silicon thin films311to313is, for example, 5 nm to 30 nm. The overall film thickness of the p-type silicon thin films311and312is the same as the film thickness of the p-type silicon thin film30deposited in step (c-4). Accordingly, the ratio of the overall film thickness of the p-type silicon thin films311and312and the film thickness of the p-type silicon thin film313is arbitrary.

When the film thickness of the p-type semiconductor layer31formed from the p-type silicon thin films311to313is 5 nm to 30 nm, the gas supply device135stops the B2H6gas. Thereby, the i-type semiconductor layer32formed from an i-type μc-Si is deposited on the p-type semiconductor layer31(refer to step (c-8) inFIG. 11).

When the film thickness of the i-type semiconductor layer32is 1200 nm to 2000 nm, the gas supply device135increases the flow rate of the SiH4gas from 2 sccm to 20 sccm, increases the flow rate of the H2gas from 120 sccm to 150 sccm, and supplies the hydrogen diluted PH3gas to the interior of the cathode electrodes133A to133D via the supply pipes134A to134D, respectively. Thereby, the n-type a-Si is deposited on the i-type semiconductor layer32.

When the film thickness of the n-type a-Si is the desired film thickness, the gas supply device135decreases the flow rate of the SiH4gas from 20 sccm to 4 sccm, increases the flow rate of the H2gas from 150 sccm to 250 sccm, and decreases the flow rate of the PH3gas from 50 sccm to 25 sccm. Thereby, the n-type μc-Si is deposited on the n-type a-Si. That is, the n-type semiconductor layer33formed from an n-type a-Si/n-type μc-Si is deposited on the i-type semiconductor layer32(refer to step (c-9) inFIG. 11).

The film thickness of the n-type semiconductor layer33formed from an n-type a-Si/n-type μc-Si is, for example, 60 nm to 80 nm; however the ratio of the film thickness of the n-type a-Si and the film thickness of the n-type μc-Si is arbitrary.

When the film thickness of the n-type semiconductor layer33formed from an n-type a-Si/n-type μc-Si is 60 nm to 80 nm, the gas supply device135stops the SiH4gas, the H2gas and the PH3gas, the gate valve137is opened fully, and the pump138evacuates the inside of the chamber131to a vacuum. The heaters built into the anode electrodes132A to132D is turned off.

When the temperature of the substrates121to124is room temperature, the sample is extracted from the chamber131.

In this way, the photovoltaic layer43is formed in one chamber131by a plasma CVD method. As a result, it is possible to eliminate the time for transport from the chamber for forming the photovoltaic layer5to the chamber for forming the photovoltaic layer3, and shorten the time for preparing the photovoltaic layer43, compared to a case of forming the two photovoltaic layers5and3that configure the photovoltaic layer43with separate chambers. Accordingly, it is possible to increase the production rate of the solar battery module40.

The photovoltaic layer43is formed using the plasma device100A in which one power source140supplies the power PP to a plurality of cathode electrodes133A to133D. Accordingly, it is possible to reduce the cost of the plasma device for manufacturing a plurality of solar battery modules40.

Since the photovoltaic layer43is manufactured by continuously depositing the p-type semiconductor layer51, the i-type semiconductor layer52, the n-type semiconductor layer53, the p-type semiconductor layer31, the i-type semiconductor layer32and the n-type semiconductor layer33on the substrate41with a plasma CVD method, it is possible to suppress the mixing of impurities such as oxygen into the interface between the p-type semiconductor layer51and the i-type semiconductor layer52, the interface between the i-type semiconductor layer52and the n-type semiconductor layer53, the interface between the n-type semiconductor layer53and the p-type semiconductor layer31, the interface between the p-type semiconductor layer31and the i-type semiconductor layer32, and the interface between the i-type semiconductor layer32and the n-type semiconductor layer33, and possible to manufacture a high quality photovoltaic layer43.

The electrical characteristics of the solar battery module40manufactured by the above-described method are measured by irradiating AM 1.5 (intensity: 100 mW/cm2) simulated solar light at a temperature of 25° C. from the substrate41side. The conversion efficiency is calculated by dividing the maximum output power of the solar battery module40directly after being irradiated by simulated solar light by the area of the solar battery module40.

Experiments were performed on changes in the electrical characteristics due to the RF power, the film deposition pressure, the substrate temperature, the duty ratio and the plasma processing time in the method for manufacturing the solar battery module40. Below, the experimental results will be described.

The frequency of the lower frequency pulse power LP when the following experiments on the RF power, the film deposition pressure, the substrate temperature, the duty ratio and the plasma processing time were performed was to 400 Hz for the following reasons.

In a case in which the frequency of the low frequency pulse power LP is changed, because discharge is not stably continued in a range of less than 100 Hz and a range exceeding 1 kHz, it is understood that a range of 100 kHz to 1 kHz is appropriate for the frequency of the low frequency pulse power LP. In particular, this is because when the frequency of the low frequency pulse power LP is in a range of 300 Hz to 500 Hz, the discharge stability is excellent in all four discharge regions (regions between the anode electrodes132A to132D and the cathode electrodes133A to133D), and variations in the characteristics of the photovoltaic device are reduced.

The RF power dependency of the electrical characteristics (open-circuit voltage Voc, series resistance Rs, short-circuit current Isc, the fill factor FF and the conversion efficiency) are shown in Table 2.

The results shown in Table 2 are the electrical characteristics when the film deposition pressure is set to 400 Pa, the substrate temperature is set to 160° C., the frequency of the high frequency power RF is set to 11 MHz, the frequency of the low frequency pulse power LP is set to 400 Hz, the duty ratio of the low frequency pulse power LP is set to 0.25, and the high frequency power RF is changed to 20 mW/cm2, 60 mW/cm2, 100 mW/cm2, 150 mW/cm2, 200 mW/cm2, 300 mW/cm2, 400 mW/cm2, and 500 mW/cm2. The areas of the substrates121to124is 14000 cm2, and the pulse power PP is supplied to four cathode electrodes133A to133D from one power supply140.

As shown in Table 2, a conversion efficiency of 11.1% or more is obtained in a case in which the high frequency power RF is changed in a range of 20 mW/cm2to 500 mW/cm2.

FIG. 12is a drawing showing the RF power dependency of the open-circuit voltage Voc and the conversion efficiency RF.FIG. 13is a drawing showing the RF power dependency of the series resistance and the fill factor FF.

InFIG. 12, the vertical axis indicates the open-circuit voltage Voc and the conversion efficiency, and the horizontal axis indicates the RF power. The curve k1 indicates the RF power dependency of the open-circuit voltage Voc, and the curve k2 indicates the RF power dependency of the conversion efficiency.

InFIG. 13, the vertical axis indicates the series resistance and the fill factor FF, and the horizontal axis indicates the RF power. The curve k3 indicates the RF power dependency of the series resistance, and the curve k4 indicates the RF power dependency of the fill factor FF.

The fill factor FF is held at a value of 0.720 or more with the RF power in a range up to 300 mW/cm2, and sharply decreases when the RF power exceeds 300 mW/cm2(refer to curve k4). This is because when the RF power exceeds 300 mW/cm2, the series resistance sharply increases (refer to curve k3).

The open-circuit voltage Voc becomes higher than 62 V at an RF power of 100 mW/cm2or more; however, the open-circuit voltage Voc greatly decreases at an RF power of less than 100 mW/cm2(refer to curve k1). In this way, the effect of an improvement in the open-circuit voltage Voc is not seen at an RF power of less than 100 mW/cm2.

As a result, a conversion efficiency of 11.4% or more is obtained with the RF power in a range of 100 mW/cm2to 300 mW/cm2.

Accordingly, it is understood that a range of 100 mW/cm2to 300 mW/cm2is appropriate for the RF power. Using a range of 100 mW/cm2to 300 mW/cm2as the RF power is preferable, since it is possible to decrease variations in the conversion efficiency of the manufactured solar battery module even in a manufacturing step in which the variations in the RF power stemming from variations in the hardware setting of the plasma device100A and the power source characteristics are present.

The film deposition pressure dependency of the electrical characteristics (open-circuit voltage Voc, series resistance Rs, short-circuit current Isc, the fill factor FF and the conversion efficiency) are shown in Table 3.

The results shown in Table 3 are the electrical characteristics when RF power is set to 150 mW/cm2, the substrate temperature is set to 160° C., the frequency of the high frequency power RF is set to 11 MHz, the frequency of the low frequency pulse power LP is set to 400 Hz, the duty ratio of the low frequency pulse power LP is set to 0.25, and the film deposition pressure is changed to 100 Pa, 200 Pa, 300 Pa, 400 Pa, 500 Pa, 600 Pa, 700 Pa, and 800 Pa. The areas of the substrates121to124is 14000 cm2, and the pulse power PP is supplied to four cathode electrodes133A to133D from one power supply140.

As shown in Table 3, a conversion efficiency of 11.0% or more is obtained in a case in which the film deposition pressure is changed in a range of 100 Pa to 800 Pa.

FIG. 14is a drawing showing the film deposition pressure dependency of the open-circuit voltage Voc and the conversion efficiency.FIG. 15is a drawing showing the film deposition pressure dependency of the series resistance and the fill factor FF.

InFIG. 14, the vertical axis indicates the open-circuit voltage Voc and the conversion efficiency, and the horizontal axis indicates the film deposition pressure. The curve k5 indicates the film deposition pressure dependency of the open-circuit voltage Voc, and the curve k6 indicates the film deposition pressure dependency of the conversion efficiency.

InFIG. 15, the vertical axis indicates the series resistance and the fill factor FF, and the horizontal axis indicates the film deposition pressure. The curve k7 indicates the film deposition pressure dependency of the series resistance, and the curve k8 indicates the film deposition pressure dependency of the fill factor FF.

The fill factor FF is held at a value of 0.720 or more with a film deposition pressure of 300 Pa or more, and sharply decreases when the film deposition pressure is less than 300 Pa (refer to curve k8). This is because when the film deposition pressure is less than 300 Pa, the decomposition ratio of the N2gas in the periphery of the electrodes (anode electrodes132A to132D and cathode electrodes133A to133D) increases, and the series resistance of the photovoltaic portion manufactured at a position corresponding to the peripheral portion of the electrode sharply increases (refer to curve k7).

The open-circuit voltage Voc is held at 62 V or more with a film deposition pressure of up to 600 Pa, and greatly decreases because the in-plane uniformity of the decomposition ratio of the N2gas decreases in the plane of the electrodes (anode electrodes132A to132D and cathode electrodes133A to133D) when the film deposition pressure exceeds 600 Pa (refer to curve k5).

As a result, a conversion efficiency of 11.3% or more is obtained with the film deposition pressure in a range of 300 Pa to 600 Pa.

Accordingly, it is understood that a range of 300 Pa to 600 Pa is appropriate for the film deposition pressure. Using a range of 300 Pa to 600 Pa as the film deposition pressure is preferable, since it is possible to decrease variations in the conversion efficiency of the manufactured solar battery module even in a manufacturing step in which the variations in the film deposition pressure stemming from variations in the vacuum exhaust capability and the pressure sensor of the plasma device100A are present.

The substrate temperature dependency of the electrical characteristics (open-circuit voltage Voc, series resistance Rs, short-circuit current Isc, the fill factor FF and the conversion efficiency) are shown in Table 4.

The results shown in Table 4 are the electrical characteristics when RF power is set to 150 mW/cm2, the film deposition pressure is set to 400 Pa, the frequency of the high frequency power RF is set to 11 MHz, the frequency of the low frequency pulse power LP is set to 400 Hz, the duty ratio of the low frequency pulse power LP is set to 0.25, and the substrate temperature is changed to 120° C., 130° C., 140° C., 160° C., 180° C., 190° C., and 200° C. The area of the substrates121to124is 14000 cm2, and the pulse power PP is supplied to four cathode electrodes133A to133D from one power supply140.

As shown in Table 4, a conversion efficiency of 10.5% or more is obtained in a case in which the substrate temperature is changed in a range of 120° C. to 200° C.

FIG. 16is a drawing showing the substrate temperature dependency of the open-circuit voltage Voc and the power conversion efficiency.FIG. 17is a drawing showing the substrate temperature dependency of the series resistance and the fill factor FF.

InFIG. 16, the vertical axis indicates the open-circuit voltage Voc and the conversion efficiency, and the horizontal axis indicates the substrate temperature. The curve k9 indicates the substrate temperature dependency of the open-circuit voltage Voc, and the curve k10 indicates the substrate temperature dependency of the conversion efficiency.

InFIG. 17, the vertical axis indicates the series resistance and the fill factor FF, and the horizontal axis indicates the substrate temperature. The curve k11 indicates the substrate temperature dependency of the series resistance, and the curve k12 indicates the substrate temperature dependency of the fill factor FF.

The fill factor FF is held at a value of 0.720 or more with a substrate temperature of 140° C. or more, and sharply decreases when the substrate temperature is less than 140° C. (refer to curve k12). This is because the series resistance greatly increases at a substrate temperature of less than 140° C. (refer to curve k11).

The open-circuit voltage Voc is held at a higher value than 61.5 V at a substrate temperature up to 190° C., and greatly decreases when the substrate temperature exceeds 190° C. because the optical band gap of the p-type semiconductor layers31and51and the i-type semiconductor layers32and52is decreased by reducing the hydrogen concentration in the films of the p-type semiconductor layers31and51and the i-type semiconductor layers32and52(refer to curve k9).

At a substrate temperature of less than 140° C., the short circuit current Isc greatly decreases because the optical band gap of the i-type semiconductor layers32and52increases (refer to Table 4).

As a result, a conversion efficiency of 11.3% or more is obtained with the substrate temperature in a range of 140° C. to 190° C. (refer to curve 10).

Accordingly, it is understood that a range of 140° C. to 190° C. is appropriate for the substrate temperature.

The duty ratio dependency of the electrical characteristics (open-circuit voltage Voc, series resistance Rs, short-circuit current Isc, the fill factor FF and the conversion efficiency) are shown in Table 5.

The results shown in Table 5 are the electrical characteristics when RF power is set to 150 mW/cm2, the film deposition pressure is set to 400 Pa, the substrate temperature is set to 160° C., the frequency of the high frequency power RF is set to 11 MHz, the frequency of the low frequency pulse power LP is set to 400 Hz, the duty ratio of the low frequency pulse power LP is set to 0.05, 0.10, 0.20, 0.25, 0.30, 0.40, 0.50, 0.60, and 1.00. The areas of the substrates121to124is 14000 cm2, and the pulse power PP is supplied to four cathode electrodes133A to133D from one power supply140.

As shown in Table 5, a conversion efficiency of 10.4% or more is obtained in a case in which the duty ratio is changed in a range of 0.05 to 1.00.

FIG. 18is a drawing showing the duty ratio dependency of the open-circuit voltage Voc and the conversion efficiency.FIG. 19is a drawing showing the duty ratio dependency of the series resistance and the fill factor FF.

InFIG. 18, the vertical axis indicates the open-circuit voltage Voc and the conversion efficiency, and the horizontal axis indicates the duty ratio. The curve k13 indicates the duty ratio dependency of the open-circuit voltage Voc, and the curve k14 indicates the duty ratio dependency of the conversion efficiency.

InFIG. 19, the vertical axis indicates the series resistance and the fill factor FF, and the horizontal axis indicates the duty ratio. The curve k15 indicates the duty ratio dependency of the series resistance, and the curve k16 indicates the duty ratio dependency of the fill factor FF.

The fill factor FF is held at a value of 0.720 or more with a duty ratio up to 0.5, and sharply decreases when the duty ratio exceeds 0.5 (refer to curve k16). This is because when the duty ratio exceeds 0.5, the introduction depth of nitrogen atoms due to the plasma processing employing N2gas becomes too deep, and the series resistance sharply increases (refer to curve k15).

The open-circuit voltage Voc is held at a value of 62 V or more with the duty ratio in a range of 0.1 to 0.6, and sharply decreases with the duty ratio in a range of less than 0.1 and a range of greater than 0.6 (refer to curve k13). With the duty ratio at less than 0.1, the improvement effect of the open-circuit voltage Voc is not obtained by the introduction of nitrogen atoms due to the plasma processing employing N2gas being excessively deep. In a range in which the duty ratio exceeds 0.6, it is thought that the open-circuit voltage Voc is greatly reduced because the introduction amount of nitrogen atoms due to plasma processing employing N2gas becomes large, a donor level stemming from nitrogen atoms in the p-type silicon thin film312of the p-type semiconductor layer31is formed, and the p-type dopant concentration in the p-type silicon thin film312is practically reduced.

As a result, a conversion efficiency of 11.3% or more is obtained with the duty ratio in a range of 0.1 to 0.5 (refer to curve k14).

Accordingly, it is understood that a range of 0.1 to 0.5 is appropriate for the duty ratio. It is more preferable that the duty ratio be in a range of 0.2 to 0.4. This is because a conversion efficiency of 11.4% or more is obtained.

Because a case in which the duty ratio is 1 indicates that the pulse power is not used, and the fill factor FF is lowered by greatly increasing the series resistance, the conversion efficiency is not improved.

The plasma processing time dependency of the electrical characteristics (open-circuit voltage Voc, series resistance Rs, short-circuit current Isc, the fill factor FF and the conversion efficiency) are shown in Table 6. The plasma processing time is the processing time using a plasma employing N2gas in step (c-5) inFIG. 10.

The results shown in Table 6 are the electrical characteristics when RF power is set to 150 mW/cm2, the film deposition pressure is set to 400 Pa, the substrate temperature is set to 160° C., the frequency of the high frequency power RF is set to 11 MHz, the frequency of the low frequency pulse power LP is set to 400 Hz, the duty ratio of the low frequency pulse power LP is set to 0.25, and the plasma processing time is changed to 3, 5, 6, 8, 10, 15, 20, 60, and 90 seconds. The areas of the substrates121to124is 14000 cm2, and the pulse power PP is supplied to four cathode electrodes133A to133D from one power supply140.

As shown in Table 6, a conversion efficiency of 9.9% or more is obtained in a case in which the plasma processing time is changed in a range of 3 sec. to 90 sec.

FIG. 20is a drawing showing the plasma processing time dependency of the open-circuit voltage Voc and the conversion efficiency.FIG. 21is a drawing showing the plasma processing time dependency of the series resistance and the fill factor FF.

InFIG. 20, the vertical axis indicates the open-circuit voltage Voc and the conversion efficiency, and the horizontal axis indicates the plasma processing time. The curve k17 indicates the plasma processing time dependency of the open-circuit voltage Voc, and the curve k18 indicates the plasma processing time dependency of the conversion efficiency.

InFIG. 21, the vertical axis indicates the series resistance and the fill factor FF, and the horizontal axis indicates the plasma processing time. The curve k19 indicates the plasma processing time dependency of the series resistance, and the curve k20 indicates the plasma processing time dependency of the fill factor FF.

The fill factor FF is held at a value of 0.71 or more with a plasma processing time of up to 60 seconds, and sharply decreases when the plasma processing time exceeds 60 seconds (refer to curve k20). This is because when the plasma processing time exceeds 60 seconds, the nitrogen atom concentration introduced with respect to the p-type silicon thin film311becomes excessively high and the series resistance sharply increases (refer to curve k19).

The open-circuit voltage Voc is held at a value of 61.5 V or more with the plasma processing time in a range of 5 seconds to 90 seconds, and greatly decreases because nitrogen atoms are almost completely not introduced with respect to the p-type silicon thin film311at a plasma processing time of less than 5 seconds (refer to curve k17).

As a result, a conversion efficiency of 11.1% or more is obtained with plasma processing time in a range of 5 seconds to 60 seconds (refer to curve 18).

Accordingly, it is understood that a range of 5 seconds to 60 seconds is appropriate for the plasma processing time. A range of 6 seconds to 20 seconds is more preferable as the plasma processing time. This is because a conversion efficiency of 11.3% or more is obtained.

As described above, a range of 1 MHz to 50 MHz is appropriate for the frequency of the high frequency power RF, a range of 100 Hz to 1 kHz is appropriate for the frequency of the low frequency pulse power LP, a range of 100 mW/cm2to 300 mW/cm2is appropriate for the density of the high frequency power RF, a range of 300 Pa to 600 Pa is appropriate for the film deposition pressure, a range of 140° C. to 190° C. is appropriate for the substrate temperature, a range of 0.1 to 0.5 is appropriate for the duty ratio of the low frequency pulse power LP, and a range of 5 seconds to 60 seconds is appropriate for the processing time using a plasma employing N2gas.

It is possible to increase the in-plane uniformity of the decomposition ratio of the N2gas in the plane of the anode electrodes132A to132D and the cathode electrodes133A to133D by setting the density of the high frequency power RF to a range of 100 mW/cm2to 300 mW/cm2, and setting the film deposition pressure to a range of 300 Pa to 600 Pa. As a result, in a case in which the p-type silicon thin film or the n-type silicon thin film are processed by a plasma employing N2gas, the nitrogen atoms are uniformly included in the entire plane of the photovoltaic device, it is possible to realize a p-type semiconductor layer or an n-type semiconductor layer having an optimal nitrogen content for obtaining an effect of improving the open-circuit voltage without the series resistance being increased, and it is possible to improve the conversion efficiency in a large area photovoltaic device.

The plasma damage that plasma processing employing N2gas imparts on the p-type silicon thin film or the n-type silicon thin film is reduced by setting the film deposition pressure to 300 Pa to 600 Pa, and it is possible to form a high quality p-type semiconductor layer or an n-type semiconductor layer in which the defected density is reduced, as a result.

By setting the substrate temperature to 140° C. to 190° C., it is possible to increase the hydrogen concentration in the film of a p-type semiconductor layer (or n-type semiconductor layer) formed using the first step of depositing a p-type silicon thin film (or n-type silicon thin film), the second step of irradiating the p-type silicon thin film (or n-type silicon thin film) thus deposited with a plasma employing N2gas, and the third step of depositing a p-type silicon thin film (or n-type silicon thin film) on the p-type silicon thin film (or n-type silicon thin film) thus irradiated with plasma, and possible obtain a high open-circuit voltage as a result.

By setting the frequency of the low frequency pulse power LP to 100 Hz to 1 kHz, it is possible to obtain a stable discharge state in the entire plane of the photovoltaic device, and possible to increase the in-plane uniformity of the decomposition ratio of the N2gas in the plane of the anode electrodes132A to132D and the cathode electrodes133A to133D.

Accordingly, in the plasma processing employing N2gas, the density of the high frequency power RF may be in a range of 100 mW/cm2to 300 mW/cm2, the film deposition pressure in a range of 300 Pa to 600 Pa, the frequency of the high frequency power RF in a range of 1 MHz to 50 MHz, the frequency of the low frequency pulse power LP in a range of 100 Hz to 1 kHz, and the substrate temperature in a range of 140° C. to 190° C.

A more preferable frequency for the high frequency power RF is 9 MHz to 14 MHz. A more preferable density for the high frequency power RF is 150 mW/cm2to 200 mW/cm2. As shown in Table 2, it is possible to improve the open-circuit voltage Voc up to 62.8 v to 62.9 V by suppressing the series resistance Rs to 1.97Ω to 1.98Ω, and, as a result, a maximum conversion efficiency of 11.5% is obtained.

A more preferable film deposition pressure is 350 Pa to 450 Pa. As shown inFIGS. 14 and 15, it is possible to improve the open-circuit voltage Voc to a value higher than 62.5 V by suppressing the series resistance to 1.97Ω, and, as a result, it is possible to maximally improve the conversion efficiency.

A more preferable substrate temperature is 150° C. to 170° C. As shown inFIGS. 16 and 17, it is possible to improve the open-circuit voltage Voc to a value higher than 62 V by suppressing the series resistance to 1.97Ω, and, as a result, it is possible to maximally improve the conversion efficiency.

By setting the duty ratio of the low frequency pulse power LP in the plasma processing employing N2gas to 0.1 to 0.5, it is possible to restrict the energy of nitrogen radical occurring through the N2gas decomposing. As a result, the depth to which nitrogen is introduced with respect to the p-type silicon thin film (or n-type silicon thin film) is restricted to the surface region, and it is possible to improve the uniformity of the depth of nitrogen introduction in the plane of the photovoltaic device. Accordingly, an increase in the series resistance due to the nitrogen introduction is suppressed, and it is possible to achieve an excellent fill factor FF value in the entire plane of the photovoltaic device.

Thereby, the duty ratio of the low frequency pulse power LP in the plasma processing employing N2gas is preferably 0.1 to 0.5. The duty ratio of the low frequency pulse power LP is more preferably 0.2 to 0.3. This is because a fill factor FF of 0.724 to 0.728 is obtained by suppressing the series resistance Rs to 1.95 to 1.96Ω (refer to Table 5).

By setting the processing time of the plasma processing employing N2gas to 5 seconds to 60 seconds, the nitrogen concentration introduced with respect to the p-type silicon thin film (or n-type silicon thin film) is suppressed from becoming too high, and is possible to achieve an excellent fill factor FF value in the entire plane of the photovoltaic device.

A range of 5 seconds to 60 seconds is preferable as the processing time of the plasma processing employing N2gas. A range of 6 seconds to 20 seconds is preferable as the processing time of the plasma processing employing N2gas. This is because a fill factor FF of 0.721 to 0.728 is obtained by suppressing the series resistance Rs to 2.0Ω or less (refer to Table 6).

Because the time necessary for plasma processing is reduced by executing a first step of depositing a p-type silicon thin film (or n-type silicon thin film), a second step of irradiating the p-type silicon thin film (or n-type silicon thin film) thus deposited with plasma employing N2gas, and a third step of depositing a p-type silicon thin film (or n-type silicon thin film) on the p-type silicon thin film (or n-type silicon thin film) thus irradiated with plasma in the same chamber, it is possible to shorten the time necessary to manufacture one photovoltaic device. As a result, it is possible to increase the number of photovoltaic devices processed able to be manufactured with one plasma device, and to improve the production efficiency.

Accordingly, the first to third steps are preferably executed in the same chamber (same processing chamber).

By executing the first step of depositing a p-type silicon thin film (or n-type silicon thin film), the second step of irradiating the p-type silicon thin film (or n-type silicon thin film) thus deposited with plasma employing N2gas, and the third step of depositing a p-type silicon thin film (or n-type silicon thin film) on the p-type silicon thin film (or n-type silicon thin film) thus irradiated with plasma at the same processing pressure, it is possible to eliminate the time necessary to change the pressure and shorten the time necessary to manufacture one photovoltaic device. As a result, it is possible to increase the number of photovoltaic devices processed able to be manufactured with one plasma device, and to improve the production efficiency.

Accordingly, the first to third steps are executed at the same processing pressure.

By making the layer processed by plasma employing N2gas a microcrystalline silicon, it is possible to reduce the series resistance of the photovoltaic device, and possible to obtain an excellent fill factor FF.

Accordingly, the layer processed by plasma employing N2gas is preferably a microcrystalline silicon.

Since the conductive layer that includes a nitrogen-containing layer formed by applying the plasma processing employing N2gas has a large optical band gap, the open-circuit voltage Voc is improved by suppressing recombination of the photo carrier in the vicinity of the i-type semiconductor layer that contacts the conductive layer. In the photovoltaic device in which the light incident side is a p-type conductive layer, because the p-type conductive layer has a higher photo carrier number greater than the n-type conductive layer, the effect of suppressing the recombination loss by widening the band gap increased more for the p-type conductive layer than the n-type conductive layer. As a result, by applying the plasma processing employing N2gas with respect to the p-type conductive layer, it is possible to obtain an improvement effect of a larger open-circuit voltage Voc.

Accordingly, it is preferable that the p-type semiconductor layer be deposited by applying the plasma processing employing N2gas.

In a case in which the p-type semiconductor layer that contacts the i-type semiconductor layer formed from microcrystalline silicon includes a nitrogen-containing layer, the fill factor FF is improved over a case in which the p-type semiconductor layer that contacts the i-type semiconductor layer formed from amorphous silicon includes a nitrogen-containing layer. More specifically, since the bonding of the i-type semiconductor layer formed from microcrystalline silicon and the p-type semiconductor layer including a nitrogen-containing layer has less of a mismatch in band gap than the bonding of the i-type semiconductor layer formed from amorphous silicon and a p-type semiconductor layer including a nitrogen-containing layer, and the recombination of the photo carrier is suppressed, the fill factor FF is improved.

Accordingly, it is preferable that the i-type semiconductor layer formed from microcrystalline silicon be deposited after the p-type semiconductor layer including a nitrogen-containing layer is deposited.

By forming all of the p-type semiconductor layer, the i-type semiconductor layer and the n-type semiconductor layer in the same chamber, the time for transporting the photovoltaic device to different chambers is unnecessary, and it is possible to shorten the time necessary to manufacture one photovoltaic device. As a result, it is possible to increase the number of photovoltaic devices processed able to be manufactured with one plasma device, and to improve the production efficiency.

Accordingly, it is preferable that the pin structure which the p-type semiconductor layer including a nitrogen-containing layer, the i-type semiconductor layer and the n-type semiconductor layer are successively stacked be manufactured in the same processing chamber (chamber).

By setting the size of the anode electrode and the cathode electrode to which the plasma excitation power is supplied to 1 m2to 3 m2, it is possible to obtain a photovoltaic device with a large generated power, and further possible to increase the production volume of the photovoltaic devices using one plasma device, since the generated power of the photovoltaic device manufactured with one plasma processing is large.

There is an increase in the electrode size, and the in-plane uniformity of the decomposition ratio of the N2gas is lowered, thereby becoming difficult for the conversion efficiency to be improved in the entire plane of the photovoltaic device. In order to ensure in-plane uniformity in a large area electrode, it is preferable that the density of the high frequency power RF be in a range of 100 mW/cm2to 300 mW/cm2, the film deposition pressure in a range of 300 Pa to 600 Pa, the frequency of the high frequency power RF in a range of 1 MHz to 50 MHz, the frequency of the low frequency pulse power LP in a range of 100 Hz to 1 kHz, the substrate temperature in a range of 140° C. to 190° C., the duty ratio of the low frequency pulse power LP in a range of 0.1 to 0.5, and the processing time of the plasma processing employing N2gas in a range of 6 seconds to 60 seconds.

Since one power source supplies the plasma excitation power with respect to the plurality of anode electrodes-cathode electrodes, it is possible to reduce the cost of the plasma device for manufacturing a plurality of photovoltaic device.

Accordingly, it is preferable that the plasma excitation power be supplied by one power supply to the plurality of anode electrode and cathode electrode pairs.

By using the pulse power PP in which a 100 Hz to 1 kHz low frequency pulse power LP is superimposed on the 1 MHz to 50 MHz high frequency power RF in the case of a plasma device that supplies the plasma excitation power by branching multiple stages, it is possible to suppress imbalances in the power between stages, and possible to improve the equality in the conversion efficiency of the plurality of the photovoltaic devices manufactured with one processing chamber.

Above, although the plasma processing employing N2gas is performed with respect to the p-type semiconductor layer31of the photovoltaic layer3of the photovoltaic layers5and3that configure the solar battery module40, in Embodiment 1, the plasma processing employing N2gas may be performed with respect to the p-type semiconductor layer51of the photovoltaic layer5, the plasma processing employing N2gas may be performed with respect to the n-type semiconductor layer33of the photovoltaic layer3, the plasma processing employing N2gas may be performed with respect to the n-type semiconductor layer53of the photovoltaic layer5, the plasma processing employing N2gas may be performed with respect to the p-type semiconductor layer31and the n-type semiconductor layer33of the photovoltaic layer3, or the plasma processing employing N2gas may be performed with respect to the p-type semiconductor layer51and the n-type semiconductor layer53of the photovoltaic layer5, without being limited thereto. That is, in Embodiment 1, the plasma processing employing N2gas may be performed with respect to at least one of the p-type semiconductor layer31of photovoltaic layers3and5, the n-type semiconductor layer33, the p-type semiconductor layer51and the n-type semiconductor layer53.

If the plasma processing employing N2gas is performed with respect to at least one of the p-type semiconductor layer31, the n-type semiconductor layer33, the p-type semiconductor layer51and the n-type semiconductor layer53, it is possible to improve the open-circuit voltage Voc by suppressing the series resistance.

In a case of performing the plasma processing employing N2gas with respect to at least one of the p-type semiconductor layer31, the n-type semiconductor layer33, the p-type semiconductor layer51, and the n-type semiconductor layer53, the solar battery module40is manufactured using the steps (a) to (h) shown inFIGS. 8 and 9, and the steps (c-1) to (c-9) shown inFIGS. 10 and 11.

For example, in a case of performing the plasma processing employing N2gas with respect to the n-type semiconductor layer33, the plasma processing employing N2gas is performed with respect to the n-type silicon thin film in the step (c-9) shown inFIG. 11. A case of subjecting the p-type semiconductor layer51or like to plasma processing employing the N2gas is also the same. The high frequency power, the film deposition pressure, the substrate temperature, the duty ratio of the low frequency pulse power LP, and the plasma processing time employing N2gas are set to the values of the appropriate ranges described above.

Although description above was made of a solar battery module40manufactured using the plasma device100A shown inFIG. 6, in Embodiment 1, the solar battery module40may be manufactured using the plasma device100shown inFIG. 5, without being limited thereto. In a case of manufacturing the solar battery module40using the plasma device100, the photovoltaic layer43of the solar battery module40is formed in one chamber101, and thus it is possible to eliminate the time for transporting the sample, and improve the production volume of the solar battery module40, compared to a case of forming the two photovoltaic layers5and3that configure the photovoltaic layer43in separate chambers.

Although description was made above of performing the plasma processing using N2gas, in the embodiments of the invention, the plasma processing may be performed using NH3gas, or, in general, the plasma processing may be performed using a raw material including nitrogen atoms, without being limited thereto.

FIG. 22is a diagram showing the distribution in the depth direction of the nitrogen concentration and the boron concentration. InFIG. 22, the vertical axis represents the concentration, and the horizontal axis represents the depth. The black squares indicate the distribution of the nitrogen concentration in the depth direction, and the black triangles indicate the distribution of the boron concentration in the depth direction.

The distribution of the nitrogen concentration and the boron concentration in the depth direction for the photovoltaic device according to Embodiment 1 obtained as above is measured using a secondary ion mass spectrometry (SIMS) method. After the substrate1, the transparent conductive film2, and the photovoltaic layer5are removed from the substrate side by a milling process, a SIMS analysis is performed on the photovoltaic device with the structure shown inFIG. 2as a measurement sample in the depth direction from the p-type semiconductor layer31toward the direction of the rear electrode4.

Accordingly, the 0 nm point in the depth direction of the horizontal axis indicates the interface between the p-type semiconductor layer31and the n-type semiconductor layer53. The measurement results are shown inFIG. 22as the obtained boron concentration distribution and the nitrogen concentration distribution. It is understood that the nitrogen concentration is lower than 5×1018(units/cm−3), and the p-type silicon thin film312containing a high concentration of nitrogen of 1×1019(units/cm−3) or more is interposed by the p-type silicon thin films311and313to which nitrogen is substantially not added.

FIG. 23is a cross-sectional view showing a configuration of a photovoltaic device according to Embodiment 2. With reference toFIG. 23, the photovoltaic device60according to Embodiment 2 includes a silicon substrate61, i-type semiconductor layers62and66, a p-type semiconductor layer63, transparent conductive films64and68, a grid electrode65, an n-type semiconductor layer67, and a rear electrode69.

The silicon substrate61is formed from a single crystal silicon substrate or a polycrystalline silicon substrate. The silicon substrate61has a, for example, a thickness of 100 μm to 300 μm, and preferably as a thickness of 100 μm to 200 μm. The silicon substrate61has, for example, a (100) plane orientation in a case of being formed from a single crystal silicon substrate. The silicon substrate61has a specific resistance of 1.0 Ω·cm to 10 Ω·cm.

The i-type semiconductor layer62is arranged in contact with one surface of the silicon substrate61. The p-type semiconductor layer63is arranged in contact with the i-type semiconductor layer62. The p-type semiconductor layer63is formed from a p-type silicon thin films631to633. The p-type silicon thin film631is arranged in contact with the i-type semiconductor layer62, the p-type silicon thin film632is interposed in the thickness direction between the p-type silicon thin films631and633, and the p-type silicon thin film633is arranged in contact with the transparent conductive film64.

The transparent conductive film64is arranged in contact with the p-type silicon thin film633of the p-type semiconductor layer63. The grid electrode65has a comb-like planar shape, and is arranged in contact with the transparent conductive film64.

The i-type semiconductor layer66is arranged in contact with the other main surface of the silicon substrate61. The n-type semiconductor layer67is arranged in contact with the i-type semiconductor layer66. The n-type semiconductor layer67is formed from n-type silicon thin films671to673. The n-type silicon thin film671is arranged in contact with the i-type semiconductor layer66, the n-type silicon thin film672is interposed in the thickness direction between the n-type silicon thin films671and673, and the n-type silicon thin film673is arranged in contact with the transparent conductive film68.

The transparent conductive film68is formed in contact with the n-type silicon thin film673of the n-type semiconductor layer67. The rear electrode69is arranged in contact with the transparent conductive film68.

The i-type semiconductor layer62is formed from an i-type silicon-based semiconductor layer having an amorphous phase or a microcrystalline phase, and more specifically formed from an i-type a-SiC, an i-type a-SiN, an i-type a-Si, an i-type a-SiGe, an i-type a-Ge, an i-type μc-SiC, an i-type μc-SiN, an i-type μc-Si, an i-type μc-SiGe, and an i-type μc-Ge or the like. The i-type semiconductor layer62has a film thickness of, for example, 5 to 30 nm.

The p-type semiconductor layer63is formed from a p-type silicon-based semiconductor layer having an amorphous phase or a microcrystalline phase, and more specifically, formed from a p-type a-SiC, a p-type a-SiN, a p-type a-Si, a p-type a-SiGe, a p-type μc-SiC, a p-type μc-SiN, a p-type μc-Si, and a p-type μc-SiGe or the like. The p-type semiconductor layer63has a film thickness of, for example, 5 to 30 nm.

Each of the p-type silicon thin films631and633is formed from any one of a p-type a-SiC, a p-type a-SiN, a p-type a-Si, a p-type a-SiGe, a p-type μc-SiC, a p-type μc-SiN, a p-type μc-Si, and a p-type μc-SiGe.

The p-type silicon thin films632is formed from any one of a p-type a-SiC, a p-type a-SiN, a p-type a-Si, a p-type a-SiGe, a p-type μc-SiC, a p-type μc-SiN, a p-type μc-Si, and a p-type μc-SiGe to which nitrogen atoms are added. In a case in which the p-type silicon thin film632is formed from the same p-type a-SiN or a p-type μc-SiN as the p-type silicon thin films631and633, the nitrogen concentration of the p-type silicon thin film632is higher than the nitrogen concentration of the p-type silicon thin films631and633.

Thus, the p-type semiconductor layer63has a structure in which a layer including nitrogen atoms is interposed in the thickness direction between layers not containing nitrogen atoms or a structure in which a layer that has a first nitrogen atom concentration is interposed in the thickness direction between layers that have a second nitrogen atom concentration lower than the first nitrogen atom concentration.

The transparent conductive film64is formed from ITO, SnO2, ZnO, or the like. The grid electrode65is formed from, for example, Ag.

The i-type semiconductor layer66is formed from the same material as the i-type semiconductor layer62. The i-type semiconductor layer66has a film thickness of, for example, 5 to 30 nm.

The n-type semiconductor layer67is formed from an n-type silicon-based semiconductor layer having an amorphous phase or a microcrystalline phase, and more specifically formed from an n-type a-SiC, an n-type a-SiN, an n-type a-Si, an n-type a-SiGe, an n-type μc-SiC, an n-type μc-SiN, an n-type μc-Si, and an n-type μc-SiGe or the like. The n-type semiconductor layer67has a film thickness of, for example, 5 to 30 nm.

Each of the n-type silicon thin films671and673is formed from any of an n-type a-SiC, an n-type a-SiN, an n-type a-Si, an n-type a-SiGe, an n-type μc-SiC, an n-type μc-SiN, an n-type μc-Si, and an n-type μc-SiGe.

The n-type silicon thin film672is formed from any of an n-type a-SiC, an n-type a-SiN, an n-type a-Si, an n-type a-SiGe, an n-type μc-SiC, an n-type μc-SiN, an n-type μc-Si, and an n-type μc-SiGe to which nitrogen atoms are added. In a case in which the n-type silicon thin film672is formed from the same n-type a-SiN or a p-type μc-SiN as the n-type silicon thin film671and673, the nitrogen concentration of the n-type silicon thin film672is higher than the nitrogen concentration of the n-type silicon thin films671and673.

Thus, the n-type semiconductor layer67has a structure in which a layer including nitrogen atoms is interposed in the thickness direction between layers not including nitrogen atoms or a structure in which a layer that has a first nitrogen atom concentration is interposed in the thickness direction between layers that have a second nitrogen atom concentration lower than the first nitrogen atom concentration.

The transparent conductive film68is formed from ITO, SnO2, ZnO, or the like. The rear electrode69is formed from, for example, Ag.

The p-type semiconductor layer63and the n-type semiconductor layer67may be formed from the same silicon-based semiconductor layer as the i-type semiconductor layers62and66, or may be formed from a silicon-based semiconductor layer different from the i-type semiconductor layers62and66.

Each of i-type semiconductor layers62and66, the p-type semiconductor layer63and the n-type semiconductor layer67may be formed with a single layer structure or may be formed with a multi-layer structure. In a case in which each of the i-type semiconductor layers62and66, the p-type semiconductor layer63and the n-type semiconductor layer67are formed with a multi-layer structure, the plurality of layers may be alternately formed from the same silicon-based semiconductor layers, or may be alternately formed from different silicon-based semiconductor layers.

In the photovoltaic device60, solar light is incident on the photovoltaic device60from the grid electrode65side. The i-type semiconductor layer62and the p-type semiconductor layer63are referred to as “light receiving surface side bonding layers” and the i-type semiconductor layer66and the n-type semiconductor layer67are referred to as “back side bonding layers”.

The method for manufacturing the photovoltaic device60will be described.FIGS. 24 to 26are first to third process drawings, respectively, for describing the method of manufacturing the photovoltaic device60shown inFIG. 23.

InFIGS. 24 to 26, a method for manufacturing the photovoltaic device60is described using a case in which the silicon substrate61is formed from an n-type single crystal silicon substrate, the i-type semiconductor layers62and66are formed from an i-type a-Si, the p-type semiconductor layer63is formed from a p-type μc-Si, the n-type semiconductor layer67is formed from an n-type μc-Si, and the transparent conductive films64and68are formed from ITO as an example.

When the manufacturing of the photovoltaic device60is started, the n-type single crystal silicon substrate is degreased by ultrasonic cleaning with ethanol or the like, and thereafter, the natural oxide film formed on the surface of the n-type single crystal silicon substrate by immersion of the n-type single crystal silicon substrate in hydrofluoric acid is removed, and the surface of the n-type silicon substrate is terminated with hydrogen.

In a case of texturing the surface of the n-type single crystal silicon substrate, after the n-type single crystal silicon substrate is ultrasonically cleaned with ethanol or the like, the surface of the n-type single crystal silicon substrate is chemically anisotropically etched using an alkali, thereby texturing the surface of the n-type single crystal silicon substrate. Thereafter, the natural oxide film is removed using hydrofluoric acid as described above, and the surface of the n-type single crystal silicon substrate is terminated with hydrogen. Thereby, the silicon substrate61is prepared (refer to step (a) inFIG. 24).

The silicon substrate61is installed on the anode electrode102of the plasma device100as a substrate120.

The flow amounts of the raw material gas for forming the i-type semiconductor layers62and66, the p-type semiconductor layer63and the n-type semiconductor layer67are shown in Table 7.

The gas supply device105supplies 10 sccm of SiH4gas and 100 sccm of H2gas to the interior of the cathode electrode103via the supply pipe104. As a result, the SiH4gas and the H2gas is supplied to the region between the anode electrode102and the cathode electrode103.

The pressure inside the chamber101is set to 400 Pa to 1000 Pa using the gate valve107. Furthermore, the temperature of the substrate120is set to 170° C. to 200° C. using a heater built into the anode electrode102.

Thereby, the power source110applies the pulse power PP to the cathode electrode103via the impedance matching circuit109. In this case, the frequency of the low frequency pulse power LP is, for example, 300 Hz to 500 Hz, and the frequency of the high frequency power RF is, for example, 11 MHz to 14 MHz. The power of the high frequency power in the pulse power PP is, for example, 20 mW/cm2to 500 mW/cm2.

Thereby, plasma is generated in the region between the anode electrode102and the cathode electrode103, and the i-type semiconductor layer62formed from an i-type a-Si is deposited on one main surface of the silicon substrate61(refer to step (b) inFIG. 24).

When the film thickness of the i-type semiconductor layer62is 5 nm to 30 nm, the gas supply device105reduces the flow rate of the SiH4gas from 10 sccm to 2 sccm, increases the flow rate of the H2gas from 100 sccm to 120 sccm, and newly supplies 12 sccm of the hydrogen diluted B2H6gas to the interior of the cathode electrode103via the supply pipe104.

Thereby, the p-type silicon thin film70formed from a p-type μc-Si is deposited on the i-type semiconductor layer62(refer to step (c) inFIG. 24).

When the film thickness of the p-type silicon thin film70is the desired value, the gas supply device105stops the SiH4gas, the H2gas, and the B2H6gas, and supplies the N2gas at a flow rate ratio of N2/SiH4of 5% to the interior of the cathode electrode103via the supply pipes104. Although a range of 1% to 10% is used as the N2/SiH4flow rate ratio, 5% is used herein.

As a result, the p-type silicon thin film70is processed by plasma employing N2gas (refer to step (d) inFIG. 24).

As a result, the p-type silicon thin films631and632are formed (refer to step (e) inFIG. 24). The p-type silicon thin film631is formed from a p-type μc-Si not including nitrogen atoms, and the p-type silicon thin film632is formed from a p-type μc-Si including nitrogen atoms.

After the step (e), the gas supply device105stops the N2gas, and supplies 2 sccm of SiH4gas, 120 sccm of H2gas, 12 sccm of hydrogen diluted B2H6gas to the interior of the cathode electrode103via the supply pipe104.

Thereby, the p-type silicon thin film633formed from a p-type μc-Si is deposited on the p-type silicon thin film632(refer to step (f) inFIG. 24).

The film thickness of the p-type semiconductor layer63formed from the p-type silicon thin films631to633is, for example, 5 to 30 nm. The overall film thickness of the p-type silicon thin films631and632is the same as the film thickness of the p-type silicon thin film70deposited in step (c). Accordingly, the ratio of the overall film thickness of the p-type silicon thin films631and632and the film thickness of the p-type silicon thin film633is arbitrary.

When the film thickness of the p-type semiconductor layer63formed from the p-type silicon thin films631to633is 5 nm to 30 nm, the gas supply device105stops the SiH4gas, the H2gas, and the B2H6gas. The heater built into the anode electrode102is switched off, and the gate valve107is fully opened.

When the substrate temperature becomes room temperature, the sample is removed from the plasma device100, and the sample is cleaned with hydrofluoric acid. Thereby, the rear surfaces of the p-type semiconductor layer63and the silicon substrate61are terminated with hydrogen.

Thereafter, the sample is installed on the anode electrode102so that the rear surface of the silicon substrate61faces the cathode electrode103.

The gas supply device105supplies 10 sccm of SiH4gas and 100 sccm of H2gas to the interior of the cathode electrode103via the supply pipe104. As a result, the SiH4gas and the H2gas is supplied to the region between the anode electrode102and the cathode electrode103.

The pressure inside the chamber101is set to 400 Pa to 1000 Pa using the gate valve107. The temperature of the sample is set to 170° C. to 200° C. using heaters built into the anode electrode102.

Thereby, the power source110applies the pulse power PP to the cathode electrode103via the impedance matching circuit109. In this case, the frequency of the low frequency pulse power LP is, for example, 300 Hz to 500 Hz, and the frequency of the high frequency power RF is, for example, 11 MHz to 14 MHz. The power of the high frequency power in the pulse power PP is, for example, 20 mW/cm2to 500 mW/cm2.

Thereby, plasma is generated in the region between the anode electrode102and the cathode electrode103, and the i-type semiconductor layer66formed from an i-type a-Si is deposited on the other main surface (=rear surface) of the silicon substrate61(refer to step (g) inFIG. 25).

When the film thickness of the i-type semiconductor layer66is 5 nm to 30 nm, the gas supply device105reduces the flow rate of the SiH4gas from 10 sccm to 4 sccm, increases the flow rate of the H2gas from 100 sccm to 250 sccm, and newly supplies 25 sccm of the hydrogen diluted PH3gas to the interior of the cathode electrode103via the supply pipe104.

Thereby, the n-type silicon thin film71formed from an n-type μc-Si is deposited on the i-type semiconductor layer66(refer to step (h) inFIG. 25).

When the film thickness of the n-type silicon thin film71is the desired value, the gas supply device105stops the SiH4gas, the H2gas, and the PH3gas, and newly supplies the N2gas to the interior of the cathode electrode103via the supply pipes104. As a result, the n-type silicon thin film71is processed by plasma employing N2gas (refer to step (i) inFIG. 25).

As a result, the n-type silicon thin films671and672are formed (refer to step (j) inFIG. 25). The n-type silicon thin film671is formed from n-type μc-Si not including nitrogen atoms, and the n-type silicon thin film672is formed from an n-type μc-Si including nitrogen atoms.

After the step (j), the gas supply device105stops the N2gas, and supplies 4 sccm of SiH4gas, 250 sccm of H2gas, 25 sccm of hydrogen diluted PH3gas to the interior of the cathode electrode103via the supply pipe104.

Thereby, the n-type silicon thin film673formed from an n-type μc-Si is deposited on the n-type silicon thin film672(refer to step (k) inFIG. 26).

The film thickness of the n-type semiconductor layer67formed from the n-type silicon thin films671to673is, for example, 5 to 30 nm. The overall film thickness of the n-type silicon thin films671and672is the same as the film thickness of the n-type silicon thin film71deposited in step (h). Accordingly, the ratio of the overall film thickness of the n-type silicon thin films671and672and the film thickness of the n-type silicon thin film673is arbitrary.

When the film thickness of the n-type semiconductor layer67formed from the n-type silicon thin films671to673is 5 nm to 30 nm, the gas supply device105stops the SiH4gas, the H2gas, and the PH3gas. The heater built into the anode electrode102is switched off, and the gate valve107is fully opened.

When the substrate temperature becomes room temperature, the sample is removed from the plasma device100, and the removed sample is set on the sputtering device. The transparent conductive films64and68formed from ITO are formed on the p-type semiconductor layer63and the n-type semiconductor layer67, respectively, using the sputtering device (refer to step (l) inFIG. 26). In this case, the film thickness of the transparent conductive films64and68is, for example, 50 nm to 150 nm.

Thereafter, the grid electrode65and the rear electrode69are formed on the transparent conductive films64and68, respectively, through screen printing and firing of Ag. In this case, the film thickness of the grid electrode65and the rear electrode69is, for example, 50 nm to 200 nm. Thereby, the photovoltaic device60is completed (refer to step (m) inFIG. 26).

As described above, the photovoltaic device60, similarly to Embodiment 1 is manufactured with plasma generated using power PP in which a low frequency pulse power LP is superimposed on a high frequency power RF. As a result, discharge is stable, and it is possible to improve the in-plane uniformity of the nitrogen content in the p-type semiconductor layer63and the n-type semiconductor layer67in the plane of the photovoltaic device60.

Accordingly, the open-circuit voltage Voc is improved by suppressing a lowering of the fill factor FF of the photovoltaic device60. The short-circuit current Isc is improved by improving the transmissivity of the light receiving surface side bonding layer.

Thereby, it is possible to improve the in-plane uniformity of nitrogen content concentration in a large-area photovoltaic device, and to improve the conversion efficiency of the photovoltaic device.

The silicon substrate61of the photovoltaic device60may be formed from an n-type polycrystalline silicon substrate. In this case, the surface of the light receiving surface side of the silicon substrate61is textured by etching. Also in a case in which the silicon substrate61is formed from an n-type polycrystalline silicon substrate, the photovoltaic device60is manufactured according to the steps (a) to steps (m) shown inFIGS. 24 to 26.

The silicon substrate61may be formed from a p-type single crystal silicon substrate or a p-type polycrystalline silicon substrate. In this case, the grid electrode65is arranged in contact with the transparent conductive film68, and the rear electrode69is arranged in contact with the transparent conductive film64. The solar light is incident on the photovoltaic device60from the transparent conductive film68. Also in a case in which the silicon substrate61is formed from a p-type single crystal silicon substrate or a p-type polycrystalline silicon substrate, the photovoltaic device60is manufactured according to the steps (a) to steps (m) shown inFIGS. 24 to 26.

In the photovoltaic device60, at least one of the p-type semiconductor layer63and the n-type semiconductor layer67may be formed from a structure in which the silicon-based semiconductor layer including nitrogen atoms is interposed in the thickness direction between silicon-based semiconductor layers not including nitrogen atoms, or a structure in which a silicon-based semiconductor layer that has a first nitrogen atom concentration is interposed in the thickness direction between silicon-based semiconductor layers that have a second nitrogen atom concentration lower than the first nitrogen atom concentration. This is because it is possible to improve the open-circuit voltage Voc by suppressing a lowering of the fill factor FF if at least one of the p-type semiconductor layer63and the n-type semiconductor layer67is formed from such a structure.

Furthermore, the photovoltaic device60may not include the i-type semiconductor layers62and66. This is because, even without the i-type semiconductor layers62and66, since at least one of the p-type semiconductor layer63and the n-type semiconductor layer67has a structure in which the silicon-based semiconductor layer including nitrogen atoms is interposed in the thickness direction between silicon-based semiconductor layers not including nitrogen atoms, or a structure in which a silicon-based semiconductor layer that has a first nitrogen atom concentration is interposed in the thickness direction between silicon-based semiconductor layers that have a second nitrogen atom concentration lower than the first nitrogen atom concentration, it is possible to improve the open-circuit voltage Voc by suppressing a lowering of the fill factor FF.

FIG. 27is a cross-sectional view showing a separate configuration of a photovoltaic device according to Embodiment 2. The photovoltaic device according to Embodiment 2 may be the photovoltaic device80shown inFIG. 27.

The silicon substrate81is formed from an n-type single crystal silicon substrate or an n-type polycrystalline silicon substrate. The silicon substrate81has, for example, a thickness of 100 μm to 300 μm, and preferably as a thickness of 100 μm to 200 μm. The silicon substrate81has a specific resistance of 1.0 Ω·cm to 10 Ω·cm. The silicon substrate81preferably has a (100) plane orientation in a case of being formed from an n-type single crystal silicon substrate.

The passivation film82is arranged in contact with one surface of the silicon substrate81. The anti-reflection film83is arranged in contact with the passivation film82.

The i-type semiconductor layer84is arranged in contact with the other surface of the silicon substrate81. The i-type semiconductor layer86neighbors the i-type semiconductor layer84in the in plane direction of the silicon substrate81, and is arranged in contact with the other surface of the silicon substrate81.

The n-type semiconductor layer85is arranged in contact with the i-type semiconductor layer84. The n-type semiconductor layer85is formed from n-type silicon thin films851to853. The n-type silicon thin film851is arranged in contact with the i-type semiconductor layer84, the n-type silicon thin film852is interposed in the thickness direction between the n-type silicon thin films851and853, and the n-type silicon thin film853is arranged in contact with the transparent conductive film88.

The p-type semiconductor layer87is arranged in contact with the i-type semiconductor layer86. The p-type semiconductor layer87is formed from p-type silicon thin films871to873. The p-type silicon thin film871is arranged in contact with the i-type semiconductor layer86, the p-type silicon thin film872is interposed in the thickness direction between the p-type silicon thin films871and873, and the p-type silicon thin film873is arranged in contact with the transparent conductive film89.

The transparent conductive film88is formed in contact with the n-type silicon thin film853of the n-type semiconductor layer85. The transparent conductive film89is formed in contact with the p-type silicon thin film873of the p-type semiconductor layer87.

The electrode90is arranged in contact with the transparent conductive film88. The electrode91is arranged in contact with the transparent conductive film89.

In the photovoltaic device80, the n-type semiconductor layer85and the p-type semiconductor layer87have the same length in the direction perpendicular to the paper surface inFIG. 27. The area occupancy ratio that is the proportion that the area of the entire p-type semiconductor layer87occupies in the area of the silicon substrate81is 60% to 93%, and the area occupancy ratio that is the proportion that the area of the entire n-type semiconductor layer85occupies in the area of the silicon substrate81is 5% to 20%.

In this way, increasing the area occupancy ratio of the p-type semiconductor layer87to be greater than the area occupancy ratio of the n-type semiconductor layer85is in order to easily separate the electrons and the positive holes photoexcited in the silicon substrate81by pn junction (p-type semiconductor layer87/silicon substrate81(=n-type single crystal silicon substrate)), and increase the contribution ratio of the generated power of the photoexcited electrons and positive holes.

The passivation film82is formed from, for example, silicon oxide (SiO2), and has a film thickness of 50 nm to 100 nm. The anti-reflection film83is formed from, for example, silicon nitride (Si3N4), and has a film thickness of 50 nm to 100 nm.

The i-type semiconductor layer84is formed from an i-type silicon-based semiconductor layer having an amorphous phase or a microcrystalline phase, and more specifically, formed from an i-type a-SiC, an i-type a-SiN, an i-type a-Si, an i-type a-SiGe, an i-type a-Ge, an i-type μc-SiC, an i-type μc-SiN, an i-type μc-Si, and an i-type μc-SiGe, and an i-type μc-Ge or the like. The i-type semiconductor layer84has a film thickness of, for example, 5 nm to 30 nm.

The n-type semiconductor layer85is formed from an n-type silicon-based semiconductor layer having an amorphous phase or a microcrystalline phase, and more specifically formed from an n-type a-SiC, an n-type a-SiN, an n-type a-Si, an n-type a-SiGe, an n-type μc-SiC, an n-type μc-SiN, an n-type μc-Si, and an n-type μc-SiGe or the like. The n-type semiconductor layer85has a film thickness of, for example, 5 nm to 30 nm.

Each of the n-type silicon thin films851and853is formed from any of an n-type a-SiC, an n-type a-SiN, an n-type a-Si, an n-type a-SiGe, an n-type μc-SiC, an n-type μc-SiN, an n-type μc-Si, and an n-type μc-SiGe.

The n-type silicon thin film852is formed from any of an n-type a-SiC, an n-type a-SiN, an n-type a-Si, an n-type a-SiGe, an n-type μc-SiC, an n-type μc-SiN, an n-type μc-Si, and an n-type μc-SiGe to which nitrogen atoms are added. In a case in which the n-type silicon thin film852is formed from the same n-type a-SiN or n-type μc-SiN as the n-type silicon thin films853and851, the nitrogen concentration of the n-type silicon thin film852is higher than the nitrogen concentration of the n-type silicon thin films851and853.

Thus, the n-type semiconductor layer85has a structure in which a layer including nitrogen atoms is interposed in the thickness direction between layers not including nitrogen atoms or a structure in which a layer that has a first nitrogen atom concentration is interposed in the thickness direction between layers that have a second nitrogen atom concentration lower than the first nitrogen atom concentration.

The i-type semiconductor layer86is formed from the same material as the i-type semiconductor layer84. The i-type semiconductor layer86has a film thickness of, for example, 5 nm to 30 nm.

The p-type semiconductor layer87is formed from a p-type silicon-based semiconductor layer having an amorphous phase or a microcrystalline phase, and more specifically, formed from a p-type a-SiC, a p-type a-SiN, a p-type a-Si, a p-type a-SiGe, a p-type μc-SiC, a p-type μc-SiN, a p-type μc-Si, and a p-type μc-SiGe or the like. The p-type semiconductor layer87has a film thickness of, for example, 5 nm to 30 nm.

Each of the p-type silicon thin films871and873is formed from any one of a p-type a-SiC, a p-type a-SiN, a p-type a-Si, a p-type a-SiGe, a p-type μc-SiC, a p-type μc-SiN, a p-type μc-Si, and a p-type μc-SiGe.

The p-type silicon thin films872is formed from any one of a p-type a-SiC, a p-type a-SiN, a p-type a-Si, a p-type a-SiGe, a p-type μc-SiC, a p-type μc-SiN, a p-type μc-Si, and a p-type μc-SiGe to which nitrogen atoms are added. In a case in which the p-type silicon thin film872is formed from the same p-type a-SiN or a p-type μc-SiN as the p-type silicon thin films871and873, the nitrogen concentration of the p-type silicon thin film872is higher than the nitrogen concentration of the p-type silicon thin films871and873.

In this way, the p-type semiconductor layer87has a structured in which a layer including nitrogen atoms is interposed in the thickness direction between layers not including nitrogen atoms or a structure in which a layer that has a first nitrogen atom concentration is interposed in the thickness direction between layers that have a second nitrogen atom concentration lower than the first nitrogen atom concentration.

Each of the transparent conductive films88and89is formed from ITO, SnO2, ZnO, or the like. The electrodes90and91are each formed from, for example, Ag.

The n-type semiconductor layer85and the p-type semiconductor layer87may be formed from the same silicon-based semiconductor layers as the i-type semiconductor layers84and86, or may be formed from silicon-based semiconductor layers different from the i-type semiconductor layers84and86.

Each of i-type semiconductor layers84and86, the n-type semiconductor layer85, and the p-type semiconductor layer87may be formed with a single layer structure or may be formed with a multi-layer structure. In a case in which each of the i-type semiconductor layers84and86, the n-type semiconductor layer85, and the p-type semiconductor layer87are formed with a multi-layer structure, the plurality of layers may be alternately formed from the same silicon-based semiconductor layers, or may be alternately formed from different silicon-based semiconductor layers.

The method for manufacturing the photovoltaic device80will be described.FIGS. 28 to 32are first to fifth process drawings, respectively, for describing the method of manufacturing the photovoltaic device80shown inFIG. 27.

InFIGS. 28 to 32, a method for manufacturing the photovoltaic device80is described using a case in which the silicon substrate81is formed from an n-type single crystal silicon substrate, the i-type semiconductor layers84and86are formed from an i-type a-Si, the n-type semiconductor layer85is formed from a p-type μc-Si, the p-type semiconductor layer87is formed from an n-type μc-Si, and the transparent conductive films88and89are formed from ZnO as an example.

When the manufacturing of the photovoltaic device80is started, the n-type single crystal silicon substrate is degreased by ultrasonic cleaning with ethanol or the like, and thereafter, the natural oxide film formed on the surface of the n-type single crystal silicon substrate is removed by immersion of the n-type single crystal silicon substrate in hydrofluoric acid, and the surface of the n-type single crystal silicon substrate is terminated with hydrogen.

In a case of texturing the surface of the n-type single crystal silicon substrate, after the n-type single crystal silicon substrate is ultrasonically cleaned with ethanol or the like, the surface of the n-type single crystal silicon substrate is chemically anisotropically etched using an alkali, thereby texturing the surface of the n-type single crystal silicon substrate. Thereafter, the natural oxide film is removed using hydrofluoric acid as described above, and the surface of the n-type single crystal silicon substrate is terminated with hydrogen. Thereby, the silicon substrate81is prepared (refer to step (a) inFIG. 28).

The silicon substrate81is set on the sputtering device, and the passivation film82formed from SiO2is deposited on one surface of the silicon substrate81(refer to step (b) inFIG. 28), and thereafter the anti-reflection film83formed from Si3N4is deposited on the passivation film82(refer to step (c) inFIG. 28).

Subsequently, a resist is coated on the other surface (=surface of the opposite side to the surfaced on which the passivation film82is formed) of the silicon substrate81, and a resist pattern92is formed by patterning the resist thus coated by photolithography (refer to step (d) inFIG. 28).

The other surface of the silicon substrate81not covered by the resist pattern92is cleaned by hydrofluoric acid, the natural oxide film formed on the other surface of the silicon substrate81is removed, and the other surface of the silicon substrate81is terminated with hydrogen.

Thereafter, the sample (=anti-reflection film83/passivation film82/silicon substrate81/resist pattern92) is installed on the anode electrode102of the plasma device100.

Thereby, the i-type semiconductor layers93and94formed from an i-type a-Si are deposited by plasma CVD method using the same formation conditions as the formation conditions of the i-type semiconductor layer66shown in Table 7 on the other surface of the silicon substrate81and the resist pattern92, respectively (refer to step (e) inFIG. 28).

When the film thickness of the i-type semiconductor layers93and94is 5 nm to 30 nm, the n-type silicon thin films95and96are deposited by a plasma CVD method using the same formation conditions as the formation conditions of the n-type silicon thin film71shown inFIG. 7on the i-type semiconductor layers93and94, respectively (refer to step (f) inFIG. 28).

When the film thickness of the n-type silicon thin films95and96is the desired film thickness, the n-type silicon thin films95and96are plasma processed by a plasma CVD method using the same conditions as the plasma processing conditions shown inFIG. 7(refer to step (g) inFIG. 29). Thereby, the n-type silicon thin films97and98are formed on the i-type semiconductor layer93, and the n-type silicon thin films99and111are formed on the i-type semiconductor layer94(refer to step (h) inFIG. 29). In this case, the n-type silicon thin films98and111include nitrogen atoms.

When the plasma processing finishes, the n-type silicon thin films112and113are deposited by a plasma CVD method using the same formation conditions as the formation conditions of the n-type silicon thin film673shown in Table 7 on the n-type silicon thin films98and111, respectively (refer to step (i) inFIG. 29).

The sample is removed from the plasma device100, and the resist pattern92is removed. Thereby, the i-type semiconductor layer94and the n-type silicon thin films99,111and113are removed by being lifted off (refer to step (j) inFIG. 29).

The overall film thickness of the n-type silicon thin films97,98, and112is 5 nm to 30 nm. The overall film thickness of the n-type silicon thin films97and98is the same as the film thickness of the n-type silicon thin film95deposited in step (f). Accordingly, the ratio of the overall film thickness of the n-type silicon thin films97and98and the film thickness of the n-type silicon thin film112is arbitrary.

After the step (j), the resist pattern114is formed by coating the resist on the n-type silicon thin film112(refer to step (k) inFIG. 29).

The other surface of the silicon substrate81on which the i-type semiconductor layer93, the n-type silicon thin films97,98, and112and the resist pattern114are not formed is cleaned by hydrofluoric acid, the natural oxide film formed on the other surface of the silicon substrate81is removed, and the other surface of the silicon substrate81is terminated with hydrogen.

Thereafter, the sample is installed on the anode electrode102of the plasma device100. The i-type semiconductor layers115and116formed from an i-type a-Si are deposited by plasma CVD method using the same formation conditions as the formation conditions of the i-type semiconductor layer62shown in Table 7 on the other surface of the silicon substrate81and the resist pattern114, respectively (refer to step (l) inFIG. 30).

When the film thickness of the i-type semiconductor layers115and116is 5 nm to 30 nm, the p-type silicon thin films117and118are deposited by a plasma CVD method using the same formation conditions as the formation conditions of the p-type silicon thin film70shown in Table 7 on the i-type semiconductor layers115and116, respectively (refer to step (m) inFIG. 30).

When the film thickness of the p-type silicon thin films117and118is the desired film thickness, the p-type silicon thin films117and118are plasma processed by a plasma CVD method using the same conditions as the plasma processing conditions shown in Table 7 (refer to step (n) inFIG. 30). Thereby, the p-type silicon thin film119and125are formed on the i-type semiconductor layer115, and the p-type silicon thin films126and127are formed on the i-type semiconductor layer116(refer to step (o) inFIG. 30). In this case, the p-type silicon thin films125and127include nitrogen atoms.

When the plasma processing finishes, the p-type silicon thin films128and129are deposited by a plasma CVD method using the same formation conditions as the formation conditions of the p-type silicon thin film633shown in Table 7 on the p-type silicon thin films125and127, respectively (refer to step (p) inFIG. 31).

Then, the sample is removed from the plasma device100, and the resist pattern114is removed. Thereby, the i-type semiconductor layer116and the p-type silicon thin films126,127and129are removed by being lifted off (refer to step (q) inFIG. 31).

The p-type silicon thin films119,125, and128have an overall film thickness of 5 nm to 30 nm. The overall film thickness of the p-type silicon thin films119and125is the same as the film thickness of the p-type silicon thin film117deposited in step (m). Accordingly, the ratio of the overall film thickness of the p-type silicon thin films119and125and the film thickness of the p-type silicon thin film128is arbitrary.

After the step (q), the sample is set on the sputtering device. The transparent conductive film141formed from ZnO using the sputtering device is formed on the n-type silicon thin film98and the p-type silicon thin film128(refer to step (r) inFIG. 31). In this case, the film thickness of the transparent conductive film141is, for example, 50 to 150 nm.

Thereafter, the electrode142is formed on the transparent conductive film141through screen printing and firing of Ag (refer to step (s) inFIG. 31). In this case, the film thickness of the electrode142is, for example, 50 nm to 200 nm.

After the step (s), the resist is coated on the entire surface of the electrode142, and the resist pattern143is formed by patterning the resist thus coated through photolithography (refer to step (t) inFIG. 32).

The i-type semiconductor layer93and115, the n-type silicon thin films97,98, and112, the p-type silicon thin films119,125, and128, the transparent conductive film141and the electrode142are etched with the resist pattern143as a mask, and the resist pattern143is removed. Thereby, the photovoltaic device80is completed (refer to step (u) inFIG. 32).

As described above, the photovoltaic device80, similarly to Embodiment 1, is manufactured with plasma generated using power PP in which a low frequency pulse power LP is superimposed on a high frequency power RF. As a result, discharge is stable, and it is possible to improve the in-plane uniformity of the nitrogen content in the n-type semiconductor layer85and the p-type semiconductor layer87in the plane of the photovoltaic device80.

Accordingly, the open-circuit voltage Voc is improved by suppressing a lowering of the fill factor FF of the photovoltaic device80.

Thereby, it is possible to improve the in-plane uniformity of nitrogen content concentration in a large-area photovoltaic device, and to improve the conversion efficiency of the photovoltaic device.

The silicon substrate81of the photovoltaic device80may be formed from an n-type polycrystalline silicon substrate. In this case, surface the light receiving surface side of the silicon substrate81is textured by etching. Also in a case in which the silicon substrate81is formed from an n-type polycrystalline silicon substrate, the photovoltaic device80is manufactured according to the steps (a) to (u) shown inFIGS. 28 to 32.

The silicon substrate81may be formed from a p-type single crystal silicon substrate or a p-type polycrystalline silicon substrate. In this case, the n-type semiconductor layer85is replaced by a p-type semiconductor layer formed from the same configuration as the p-type semiconductor layer87, and the p-type semiconductor layer87is replaced by a n-type semiconductor layer formed from the same configuration as the n-type semiconductor layer85. Also in a case in which the silicon substrate81is formed from a p-type single crystal silicon substrate or a p-type polycrystalline silicon substrate, the photovoltaic device80is manufactured according to the steps (a) to (u) shown inFIGS. 28 to 32.

In the photovoltaic device80, at least one of the n-type semiconductor layer85and the p-type semiconductor layer87may be formed from a structure in which the silicon-based semiconductor layer including nitrogen atoms is interposed in the thickness direction between silicon-based semiconductor layers not including nitrogen atoms, or a structure in which a silicon-based semiconductor layer that has a first nitrogen atom concentration is interposed in the thickness direction between silicon-based semiconductor layers that have a second nitrogen atom concentration lower than the first nitrogen atom concentration. This is because it is possible to improve the open-circuit voltage Voc by suppressing a lowering of the fill factor FF if at least one of the n-type semiconductor layer85and the p-type semiconductor layer87is formed from such a structure.

The photovoltaic device80may not include the i-type semiconductor layers84and86. This is because, even without the i-type semiconductor layers84and86, if at least one of the n-type semiconductor layer85and the p-type semiconductor layer87has a structure in which the silicon-based semiconductor layer including nitrogen atoms is interposed in the thickness direction between silicon-based semiconductor layers not including nitrogen atoms, or a structure in which a silicon-based semiconductor layer that has a first nitrogen atom concentration is interposed in the thickness direction between silicon-based semiconductor layers that have a second nitrogen atom concentration lower than the first nitrogen atom concentration, it is possible to improve the open-circuit voltage Voc by suppressing a lowering of the fill factor FF.

In the above-described Embodiment 1, a photovoltaic device is described that includes at least one photovoltaic layer formed from a pin structure in which a p-type semiconductor layer, an i-type semiconductor layer and an n-type semiconductor layer are successively stacked on the substrate, in which at least one of the p-type semiconductor layer and the n-type semiconductor layer in at least one photovoltaic layer has a structure in which a layer including nitrogen atoms is interposed in the thickness direction between layers not including nitrogen atoms or a structure in which a layer that has a first nitrogen atom concentration is interposed in the thickness direction between layers that have a second nitrogen atom concentration lower than the first nitrogen atom concentration.

In the above-described Embodiment 2, a photovoltaic device is described that includes a silicon substrate, and a p-type semiconductor layer and an n-type semiconductor layer arranged on the silicon substrate, in which at least one of the p-type semiconductor layer and the n-type semiconductor layer has a structure in which a layer including nitrogen atoms is interposed in the thickness direction between layers not including nitrogen atoms or a structure in which a layer that has a first nitrogen atom concentration is interposed in the thickness direction between layers that have a second nitrogen atom concentration lower than the first nitrogen atom concentration. In the photovoltaic device, the p-type semiconductor layer, the n-type semiconductor layer, and the silicon substrate configure the photovoltaic portion that converts light to electricity.

Accordingly, the photovoltaic device according to the embodiment of the invention that includes a photovoltaic portion that converts light to electricity, may include a substrate; and a silicon-based semiconductor layer formed with the substrate as a support base body, and configures the photovoltaic portion, in which the silicon-based semiconductor layer includes a first silicon-based semiconductor layer that has a p-type conductivity type, a second silicon-based semiconductor layer that has an n-type conductivity type, and a third silicon-based semiconductor layer that has an i-type conductivity type, in which at least one of the first and second silicon-based semiconductor layers has a structure in which a layer including nitrogen atoms is interposed in the thickness direction between layers not including nitrogen atoms or a structure in which a layer that has a first nitrogen atom concentration is interposed in the thickness direction between layers that have a second nitrogen atom concentration lower than the first nitrogen atom concentration.

This is because if at least one of the first and second silicon-based semiconductor layers has a structure in which a layer including nitrogen atoms is interposed in the thickness direction between layers not including nitrogen atoms or a structure in which a layer that has a first nitrogen atom concentration is interposed in the thickness direction between layers that have a second nitrogen atom concentration lower than the first nitrogen atom concentration, it is possible to improve the open-circuit voltage Voc by suppressing a lowering of the fill factor FF, thereby improving the conversion efficiency of the photovoltaic device.

In Embodiment 1, a method for manufacturing a photovoltaic device having a pin structure is described that includes depositing the p-type silicon thin film or the n-type silicon thin film on the substrate, irradiating the p-type silicon thin film or the n-type silicon thin film thus deposited with plasma employing N2gas, and thereafter, forming the p-type semiconductor layer or the n-type semiconductor layer by depositing the p-type silicon thin film or the n-type silicon thin film on the p-type silicon thin film or the n-type silicon thin film irradiated by plasma. The plasma employing N2gas is generated using a pulse power PP in which a low frequency pulse power LP of 100 Hz to 1 kHz is superimposed on a high frequency power RF of 1 MHz to 50 MHz, the density of the high frequency power is 100 mW/cm2to 300 mW/cm2, the pressure during plasma processing is 300 Pa to 600 Pa, and the substrate temperature during plasma processing is 140° C. to 190° C.

In Embodiment 2, a method for manufacturing the photovoltaic device that has a silicon substrate using the formation method of the p-type semiconductor layer or the n-type semiconductor layer in Embodiment 1 will be described.

Accordingly, the method for manufacturing a photovoltaic device according to the embodiment of the invention is a method using plasma CVD that includes a first plasma processing step of depositing the first silicon-based semiconductor layer that has a p-type conductivity type or an n-type conductivity type above the substrate; a second plasma processing step of irradiating the first silicon-based semiconductor layer with plasma in which a raw material gas including nitrogen atoms is excited; a third plasma processing step of depositing a second silicon-based semiconductor layer that has the same conductivity type as the first silicon-based semiconductor layer on the first silicon-based semiconductor layer, in which the second plasma processing step uses pulsed power in which a low frequency pulse power of 100 Hz to 1 kHz is superimposed on a high frequency power of 1 MHz to 50 MHz as a plasma excitation power, and the density of the high frequency power may be 100 mW/cm2to 300 mW/cm2, the pressure during the plasma processing may be 300 Pa to 600 Pa, and the substrate temperature during plasma processing may be 140° C. to 190° C.

For the photovoltaic device according to Embodiment 2, the distribution of the nitrogen concentration and the boron concentration in the depth direction of the photovoltaic device with the structure shown inFIG. 23is measured using a secondary ion mass spectrometry (SIMS) method. The measurement results are not shown; however, it is understood that nitrogen concentration is lower than 5×1018(units/cm−3), similarly toFIG. 22, and the p-type silicon thin film632including a high concentration of nitrogen of 1×1019(units/cm−3) or more is interposed by the p-type silicon thin films631and633to which nitrogen is substantially not added.

INDUSTRIAL APPLICABILITY

The present invention is applied to a photovoltaic device and a method for manufacturing the same.