Three terminal magnetic sensing device having a track width defined in a localized region by a patterned insulator and methods of making the same

A three terminal magnetic sensing device (TTM) having a trackwidth defined in a localized region by a patterned insulator, and methods of making the same, are disclosed. In one illustrative example, one or more first sensor layers (e.g. which includes a “base” layer) are formed over a collector substrate. A patterned insulator which defines a central opening exposing a top layer of the one or more first sensor layers is then formed. The central opening has a width for defining a trackwidth (TW) of the TTM. Next, one or more second sensor layers are formed over the top layer of the one or more first sensor layers through the central opening of the patterned insulator. The one or more second sensor layers may include a tunnel barrier layer formed in contact with the top layer of the one or more first sensor layers, as well as an “emitter” layer. Various embodiments and techniques are provided.

BACKGROUND

1. Field of the Technology

The present disclosure relates generally to three terminal magnetic sensors (TTMs) suitable for use in magnetic heads, and more specifically to a TTM having a trackwidth defined in a localized region by a patterned insulator and methods of making the same.

2. Description of the Related Art

Typically, magnetoresistive (MR) sensors have been used as read sensors in hard disk drives. An MR sensor detects magnetic field signals through the resistance changes of a read element, fabricated of a magnetic material, as a function of the strength and direction of magnetic flux being sensed by the read element. The conventional MR sensor, such as that used as a MR read head for reading data in magnetic recording disk drives, operates on the basis of the anisotropic magnetoresistive (AMR) effect of the bulk magnetic material, which is typically permalloy. A component of the read element resistance varies as the square of the cosine of the angle between the magnetization direction in the read element and the direction of sense current through the read element. Recorded data can be read from a magnetic medium, such as the disk in a disk drive, because the external field from the recorded magnetic medium (the signal field) causes a change in the direction of magnetization in the read element, which causes a change in resistance of the read element and a resulting change in the sensed current or voltage.

A three terminal magnetic (TTM) sensing device of a magnetic head may comprise a spin valve transistor (SVT), for example, which is a vertical spin injection device having electrons injected over a barrier layer into a free layer. The electrons undergo spin-dependent scattering, and those that are only weakly scattered retain sufficient energy to traverse a second barrier. The current over the second barrier is referred to as the magneto-current. Conventional SVTs are constructed using a traditional three-terminal framework having an “emitter-base-collector” structure of a bipolar transistor. SVTs further include a spin valve (SV) on a metallic base region, whereby the collector current is controlled by the magnetic state of the base region using spin-dependent scattering. Although the TTM may involve an SVT where both barrier layers are Schottky barriers, the TTM may alternatively incorporate a magnetic tunnel transistor (MTT) where one of the barrier layers is a Schottky barrier and the other barrier layer is a tunnel barrier, or a double junction structure where both barrier layers are tunnel barriers.

FIG. 1illustrates TTM operation associated with a conventional SVT100which has a semiconductor emitter region102, a semiconductor collector region104, and a base region106which contains a spin valve. The semiconductors and magnetic materials used in SVT100may include an n-type silicon (Si) material for emitter102and collector104, and a Ni80Fe20/Cu/Co spin valve for the region106. Energy barriers, also referred to as Schottky barriers, are formed at the junctions between the metal base106and the semiconductors. It is desirable to obtain a high quality energy barrier at these junctions with good rectifying behavior. Therefore, thin layers of materials (e.g. platinum and gold) are oftentimes used at the emitter102and collector104, respectively. Moreover, these thin layers separate the magnetic layers from the semiconductor materials.

A TTM operates when current is introduced between emitter region102and base region106, denoted as IEinFIG. 1. This occurs when electrons are injected over the energy barrier and into base region106by biasing the emitter such that the electrons are traveling perpendicular to the layers of the spin valve. Because the electrons are injected over the energy barrier, they enter base region106as non-equilibrium hot electrons, whereby the hot-electron energy is typically in the range of 0.5 and 1.0 eV depending upon the selection of the metal/semiconductor combination. The energy and momentum distribution of the hot electrons change as the electrons move through base region106and are subjected to inelastic and elastic scattering. As such, electrons are prevented from entering collector region104if their energy is insufficient to overcome the energy barrier at the collector side. Moreover, the hot-electron momentum must match with the available states in the collector semiconductor to allow for the electrons to enter collector region104. The collector current IC, which indicates the fraction of electrons collected in collector region104, is dependent upon the scattering in base region106which is spin-dependent when base region106contains magnetic materials. Furthermore, an external applied magnetic field controls the total scattering rate which may, for example, change the relative magnetic alignment of the two ferromagnetic layers of the spin valve. The magnetocurrent (MC), which is the magnetic response of the TTM, can be represented by the change in collector current normalized to the minimum value as provided by the following formula: MC=[IPC−IAPC]/IAPC, where P and AP indicate the parallel and antiparallel state of the spin valve, respectively. Since these types of devices have small output currents due to the small differences between the two Schottky barrier heights of the semiconductor, MTT and double tunnel embodiments are generally preferred.

InFIG. 2, a cross-sectional view of a conventional TTM200of the MTT type is shown. TTM200ofFIG. 2has a base region215, a semiconductor collector substrate220which is adjacent base region215, an emitter region205, and a barrier region210which separates emitter region205from base region215. Base region215, barrier region210, and emitter region205form a sensor stack structure201of TTM200. A first Schottky barrier211is formed at the interface between base region215and semiconductor collector substrate220. Also, a second tunnel barrier212is formed within sensor stack structure201at the interface between emitter region205and base region215at barrier layer210in a single deposition step. An emitter conductive via235is formed adjacent emitter region205of sensor stack structure201, a collector conductive via236is formed adjacent semiconductor collector substrate220, and a base conductive via234is formed by etching the sensor stack layer structure down to base region215. Insulator materials250surround the various structures of TTM200.

InFIG. 3, a cross-sectional view of an alternative conventional TTM300of the SVT type is shown. TTM300ofFIG. 3has a base region315, a semiconductor collector substrate320which is adjacent base region315, an emitter region305, and a barrier region310which separates emitter region305from base region315. Base region315, barrier region310, and emitter region305form a sensor stack structure301of TTM300. A first Schottky barrier311is formed at the interface between base region315and semiconductor collector substrate320to define the geometry of base region315. Also, a second tunnel barrier312is formed at least partly over base region315at barrier layer310to therefore form emitter region305with an ex-situ process. An emitter conductive via335is formed adjacent emitter region305of sensor stack structure301, and a collector conductive via336is formed adjacent semiconductor collector substrate320. A base conductive via334is formed by etching the sensor stack structure down to base region315. Insulator materials350surround the various structures of TTM300.

Sensor stack structures are fragile and may be susceptible to damage due to ion bombardment and chemical exposure during manufacturing steps such as those used in the formation of conductive vias for connecting TTM base regions to their terminals. Metal layers involved in TTMs are generally within 5 nm and 10 nm thick, such that subtractive processes usually required to shape these devices can change the magnetic properties of the metal layers. Furthermore, in conventional TTMs200and300ofFIGS. 2 and 3, base regions215and315are formed relatively longer than their respective emitter regions205and305. This difference in length is necessary to facilitate the formation of base region conductive vias234and334while avoiding damage to sensor stack structures201and301associated with ion bombardment and chemical exposure. As a result, the trackwidths are unnecessarily large due to the relatively long length of the base regions. It is advantageous to form very thin and narrow base regions in TTMs for increased areal recording densities and smaller trackwidths.

Accordingly, there is a need to solve these and other problems so that TTMs may be suitable for use in magnetic heads and other devices.

SUMMARY

A three terminal magnetic sensing device (TTM) having a trackwidth defined in a localized region by a patterned insulator, and methods of making the same, are disclosed. In one illustrative example, one or more first sensor layers are formed over a collector substrate. A patterned insulator which defines a central opening exposing a top layer of the one or more first sensor layers is subsequently formed. The central opening has a width for defining a trackwidth (TW) of the TTM. Next, one or more second sensor layers are formed over the top layer of the one or more first sensor layers through the central opening of the patterned insulator. Preferably, the one or more second sensor layers include a tunnel barrier layer formed in contact with the top layer of the one or more first sensor layers.

Various embodiments and techniques are provided. In one embodiment, the collector substrate is formed with an elevated region surrounded by first and second recessed regions. First and second base lead layers are then formed in the first and the second recessed regions, respectively, followed by the formation of first and second hard bias structures over the first and the second base lead layers, respectively. The one or more first sensor layers includes a tunnel barrier layer formed over the collector substrate in the elevated region and over the first and second base lead layers, and the top layer of the one or more first sensor layers is a ferromagnetic free layer formed over the tunnel barrier layer. The ferromagnetic free layer has first and second ends which make electrical contact with the first and the second hard bias structures. The one or more second sensor layers include a second tunnel barrier layer formed over the top layer comprising the ferromagnetic free layer, and a ferromagnetic pinned layer formed over the second tunnel barrier layer.

In another embodiment, the one or more first sensor layers includes a first ferromagnetic layer formed over the collector substrate, a first tunnel barrier layer formed over the first ferromagnetic layer, and a second ferromagnetic layer (i.e. the top layer) formed over the first tunnel barrier layer. A cap layer is formed over the second ferromagnetic layer. After the patterned insulator is formed, cap layer materials exposed via the central opening of the patterned insulator are etched away to thereby expose the top layer of the one or more first sensor layers (i.e. the second ferromagnetic layer). The one or more second sensor layers includes a second tunnel barrier layer formed over the top layer of the one or more first sensor layers and a third ferromagnetic layer formed over the second tunnel barrier layer.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

According to the present disclosure, a three terminal magnetic sensing device (TTM) having a trackwidth defined in a localized region by a patterned insulator, and methods of making the same, are disclosed. In one illustrative example, one or more first sensor layers are formed over a collector substrate. A patterned insulator which defines a central opening exposing a top layer of the one or more first sensor layers is subsequently formed. The central opening has a width for defining a trackwidth (TW) of the TTM. Next, one or more second sensor layers are formed over the top layer of the one or more first sensor layers through the central opening of the patterned insulator. Preferably, the one or more second sensor layers include a tunnel barrier layer formed in contact with the top layer of the one or more first sensor layers.

Various embodiments and techniques are provided. In one embodiment, the collector substrate is formed with an elevated region surrounded by first and second recessed regions. First and second base lead layers are then formed in the first and the second recessed regions, respectively, followed by the formation of first and second hard bias structures over the first and the second base lead layers, respectively. The one or more first sensor layers includes a tunnel barrier layer formed over the collector substrate in the elevated region and over the first and second base lead layers, and the top layer of the one or more first sensor layers is a ferromagnetic free layer formed over the tunnel barrier layer. The ferromagnetic free layer has first and second ends which make electrical contact with the first and the second hard bias structures. The one or more second sensor layers include a second tunnel barrier layer formed over the top layer comprising the ferromagnetic free layer, and a ferromagnetic pinned layer formed over the second tunnel barrier layer. In another embodiment, the one or more first sensor layers includes a first ferromagnetic layer formed over the collector substrate, a first tunnel barrier layer formed over the first ferromagnetic layer, and a second ferromagnetic layer (i.e. the top layer) formed over the first tunnel barrier layer. A cap layer is formed over the second ferromagnetic layer. After the patterned insulator is formed, cap layer materials exposed via the central opening of the patterned insulator are etched away to thereby expose the top layer of the one or more first sensor layers (i.e. the second ferromagnetic layer). The one or more second sensor layers includes a second tunnel barrier layer formed over the top layer of the one or more first sensor layers and a third ferromagnetic layer formed over the second tunnel barrier layer.

The following description is an exemplary embodiment for carrying out techniques of the present disclosure. This description is made for the purpose of illustrating the general principles of the present disclosure and is not meant to limit the inventive concepts claimed herein.

FIG. 4is a simplified block diagram of a conventional magnetic recording disk drive for use with a three terminal magnetic sensing device (TTM) of a magnetic head.FIG. 5is a top view of the disk drive ofFIG. 4with the cover removed. Referring first toFIG. 4, there is illustrated in a sectional view a schematic of a conventional disk drive of the type using a TTM. The disk drive comprises a base510to which are secured a disk drive motor512and an actuator514, and a cover511. Base510and cover511provide a substantially sealed housing for the disk drive. Typically, there is a gasket513located between base510and cover511and a small breather port (not shown) for equalizing pressure between the interior of the disk drive and the outside environment. A magnetic recording disk516is connected to drive motor512by means of a hub518to which it is attached for rotation by drive motor512. A thin lubricant film550is maintained on the surface of disk516. A read/write head or transducer525is formed on the trailing end of a carrier, such as an air-bearing slider520. Transducer525is a read/write head comprising an inductive write head portion and a read head portion. Slider520is connected to actuator514by means of a rigid arm522and a suspension524. Suspension524provides a biasing force which urges slider520onto the surface of the recording disk516. During operation of the disk drive, drive motor512rotates disk516at a constant speed, and actuator514, which is typically a linear or rotary voice coil motor (VCM), moves slider520generally radially across the surface of disk516so that read/write head525may access different data tracks on disk516.

FIG. 5illustrates in better detail suspension524which provides a force to slider520to urge it toward disk516. Suspension524may be a conventional type of suspension, such as the well-known Watrous suspension, as described in U.S. Pat. No. 4,167,765. This type of suspension also provides a gimbaled attachment of the slider which allows the slider to pitch and roll as it rides on the air bearing surface. The data detected from disk516by transducer525is processed into a data readback signal by signal amplification and processing circuitry in an integrated circuit chip515located on arm522. The signals from transducer525travel via a flex cable517to chip515, which sends its output signals to the disk drive electronics (not shown) via cable519.

FIG. 6is a flowchart which describes a general fabrication process for an exemplary sensor or TTM of the present disclosure. Beginning at a start block602ofFIG. 6, one or more first sensor layers are formed over a “collector” or collector substrate (step604ofFIG. 6). The one or more first sensor layers may be or include a “base” or base region of the TTM. Next, a patterned insulator which defines a central opening exposing a top layer of the one or more first sensor layers is then formed (step606ofFIG. 6). The central opening has a width for defining a trackwidth (TW) of the TTM. Next, one or more second sensor layers are formed over the top layer of the one or more first sensor layers through the central opening of the patterned insulator (step608ofFIG. 6). Preferably, the one or more second sensor layers include a tunnel barrier layer formed in contact with the top layer of the one or more first sensor layers. Additional processing steps may be subsequently performed to complete the manufacture of the TTM.

Various embodiments and techniques for fabricating TTMs in accordance withFIG. 6are provided. To illustrate,FIGS. 7-22are a series of illustrations of partially-fabricated TTM structures provided in preferred order for a first specific fabrication process for a TTM. In addition,FIGS. 23-29are a series of illustrations of partially-fabricated sensor structures provided in preferred order for a second specific fabrication process for a sensor/TTM.

The first fabrication process ofFIGS. 7-22will now be described. InFIG. 7, a collector substrate720having an elevated region770and first and second recessed regions772and774adjacent elevated region770is provided. Collector substrate720may be referred to as a “collector” or collector region of the TTM. Collector substrate720may be made of a wafer of any suitable semiconductor material such as silicon (Si), gallium arsenide (GaAs), or other. Collector substrate720may be made by forming a resist structure over a central region of a collector substrate which exposes collector substrate materials over first and second side regions of the collector substrate. With the resist structure in place, an etching process is performed to remove the exposed collector substrate materials to thereby form elevated region770and recessed regions772and774. This etching process may be a wet etching process, a reactive ion etching (RIE) process, an ion milling process, or any other suitable removal process. The resist structure is then removed.

The resist structure may be or include a photoresist. The resist structure may be a monolayer resist or a multi-layered resist (e.g. bilayer or trilayer resist). If photolithography is used to form the resist structure, a thin film of resist is light-exposed in regions which are to be removed, provided the resist is a positive resist. If the resist is a negative resist, it is light-exposed in regions that are to be retained. The resist is then subjected to a basic developer solution for its formation.

Note that, in the present technique, the resist structure is formed over the central region so as to define a width WE for subsequently-formed elevated region770. Width WE of elevated region preferably is 100 nanometers (nm), but may alternatively be within 10 nm and 500 nm. A height HE of elevated region preferably is about 100 nm, but may alternatively be within 10 nm and 200 nm. Thus, elevated region770is formed on collector substrate720(which is at a centerline LC7of the width of collector substrate720and the trackwidth of the resulting TTM).

Next, a formation process790is performed in-situ to deposit insulator materials in full-film over and in contact with collector substrate720. The result is shown inFIG. 8, showing an insulator layer850formed to a thickness HI. Preferably, insulator layer850is sputter deposited on top of collector substrate720. Alternatively, other suitable deposition techniques may be used, such as ion beam sputtering, evaporation, atomic layer deposition, or chemical vapor deposition. In this exemplary embodiment, insulator layer850is made of alumina (Al2O3), but alternatively may be made with any suitable insulator material such as silicon dioxide (SiO2), silicon nitride (Si3N4), aluminum nitride (AlN), zirconium oxide (ZrO2), hafnium oxide (HfOx), and yttrium oxide (Y2O3). Thickness HIof insulator layer850preferably is about 30 nm, but may alternatively be within 20 nm and 50 nm.

InFIG. 8, a formation process890is then performed in-situ to deposit base lead materials in full-film over insulator layer850and in-plane with semiconductor materials of elevated region770of collector substrate720. The result is shown inFIG. 9, where a base lead layer952is formed to a thickness HL. Preferably, base lead layer952is sputter deposited on top of insulator layer850. Alternatively, other suitable deposition techniques may be used, such as ion beam sputtering, evaporation, or chemical vapor deposition. In this exemplary embodiment, base lead layer952is made of a non-magnetic electrically conductive material such as copper (Cu), but alternatively may be made with any suitable electrically conductive metallic, alloyed or semiconducting non-magnetic material. Thickness HLof base lead layer952preferably is about 40 nm, but may alternatively be within 20 nm and 100 nm. Note that base lead layer952is formed in recessed regions772and774in-plane with semiconductor materials of semiconductor substrate720.

Next inFIG. 9, a planarization process990such as a chemical mechanical polishing (CMP) process is performed in-situ to remove the insulator materials of insulator layer850and base lead materials of base lead layer952in elevated region770. The result is shown inFIG. 10, where the CMP process planarizes portions of the materials so as to form a planarized surface1085and exposes a top surface1080of elevated region770. See also the top down view shown inFIG. 11. Base lead layers1050and1052are now defined in recessed regions772and774, respectively. Base lead layers1050and1052are electrically insulated or isolated from the underlying collector substrate720. Note that the process further exposed first and second top surfaces/ends1002of base lead layers1050and1052. In this exemplary embodiment, top surfaces1002of base lead layers1050and1052are formed coplanar with top surface1080of elevated region770. The lateral extent of base lead layer952(e.g.FIG. 11) to form base lead layers1050and1052(e.g.FIG. 13) is formed first by applying, exposing, and developing a (photo) resist layer1062as shown in the top view ofFIG. 12. Such steps are followed by a subtractive removal of base lead material952and collector substrate material in elevated region770with top surface1080, with the result shown in the top view ofFIG. 13.

The CMP process may be performed with a conformable polishing pad in conjunction with a chemical slurry. The pad is passed over the work-in-progress to perform the polishing. This type of polishing typically provides a higher material removal rate and a higher chemical selectivity in relation to the insulator and base lead materials than that of collector substrate720. The amount of insulator and base lead materials removed at any location on the work-in-progress is a direct function of the cumulative movement of the polishing pad over the substrate surface, the pressure at the substrate/polishing pad interface, and the slurry. Where all other factors remain unchanged, the greater the cumulative movement between the substrate and the polishing pad, the greater the amount of material removed from the substrate surface.

Note that any alternative suitable removal process, such as a wet etching process, a reactive ion etching (RIE) process, or an ion milling process may be utilized in lieu of the CMP process in order to remove materials from top surface1080of elevated region770.

Next inFIG. 14, a formation process1490is used to form a first tunnel (or Schottky) barrier layer1402, a ferromagnetic (FM) free layer1404, and hard bias structures1406and1408over the structure, preferably in that order. Conventional deposition and lithography techniques may be utilized in such formation process1490. First tunnel barrier layer1402is made of a non-magnetic insulating material, preferably made of Al2O3, which is e.g. generally less than1nm in thickness. As shown inFIG. 14, first tunnel barrier layer1402makes contact with top surface1080of collector region720in elevated region770. First tunnel barrier layer1402also makes contact with top surfaces1002of base lead layers1050and1052underneath it.

FM free layer1404is formed on top of first tunnel barrier layer1402, and therefore it is in electrical contact with base lead layers1050and1052. FM free layer1404may be referred to as the “base” or base region of the TTM. FM free layer1404preferably includes at least one soft ferromagnetic (FM) material, such as nickel-iron (NiFe), cobalt-iron (CoFe), or cobalt (Co), as well as a very thin metal (e.g. Cu) which is formed within the FM materials. In an alternate embodiment, FM free layer1404is formed in direct contact with its underlying base lead layers1050and1052. FM free layer1404also has first and second ends which are in direct physical contact with hard bias structures1406and1408, respectively. Hard bias structures1406and1408are utilized to provide a hard biasing of FM free layer1404, and may be referred to as hard magnets. Hard bias structures1406and1408may be made of any suitable magnetic material, such as a cobalt-based material such as cobalt-platinum-chromium.

Localization of ballistic electrons, and hence signal sensitivity, is achieved by forming an ex-situ tunnel barrier junction. To initiate this process, a resist structure1550ofFIG. 15is formed in the central region of the structure. Resist structure1550is formed so as to cover a top surface portion of FM free layer1404in the central region. Resist structure1550may be or include a photoresist. Resist structure1550may be a monolayer resist or a multi-layered resist (e.g. bilayer or trilayer resist). InFIG. 15, resist structure1550is shown as forming a T-shape. If photolithography is used to form resist structure1550, a thin film of resist is light-exposed in regions which are to be removed, provided the resist is a positive resist. If the resist is a negative resist, it is light-exposed in regions that are to be retained. The resist is then subjected to a basic developer solution for the final formation of resist structure1550.

Next, a formation process1590is performed to deposit insulator materials in full-film over and in contact with the structure. The result is shown inFIG. 15, where an insulator1502is formed over FM free layer1404, hard bias structures1406and1408, and resist structure1550. Preferably, insulator1502is sputter deposited on top of the structure. Alternatively, other suitable deposition techniques may be used, such as ion beam sputtering, evaporation, atomic layer deposition, or chemical vapor deposition. In this exemplary embodiment, insulator1502is made of alumina (Al2O3), but alternatively may be made with any suitable insulator material such as silicon dioxide (SiO2), silicon nitride (Si3N4), aluminum nitride (AlN), zirconium oxide (ZrO2), hafnium oxide (HfOx), and yttrium oxide (Y2O3).

Resist structure1550is then removed, revealing the structure shown inFIG. 16. As shown, the insulator has been patterned to form a patterned insulator1502over the structure. Insulator materials of patterned insulator1550are formed in the side regions and partially extend over into the central region, so as to define a central opening1602which exposes a top of FM free layer1404. See also the top down view shown inFIG. 18. The width of central opening1602will define a trackwidth (TW) for the TTM. Preferably, central opening1602shown inFIG. 16(and hence the TW) has a width that is substantially equal to a distance between the left edge of central opening1602(i.e. the left TW edge) and the left edge of elevated region770of collector substrate720(see leftmost “Δ1” inFIG. 16). Similarly, the width of central opening1602(and hence the TW) is substantially equal to a distance between the right edge of central opening1602(i.e. the right TW edge) and the right edge of elevated region770of central opening1602(see rightmost “Δ1” inFIG. 16). Also preferably, the width of central opening1602(and hence the TW) is substantially equal to a distance between the left edge of elevated region770and the left edge of hard bias structure1406(see leftmost “Δ2” inFIG. 16). Similarly, the width of central opening1602(and hence the TW) is substantially equal to a distance between the right edge of elevated region770and the right edge of hard bias structure1408(see rightmost “Δ2” inFIG. 16).

InFIG. 17, a formation process1790is used to form a second tunnel barrier layer1702, a ferromagnetic (FM) pinned layer1704, and an antiferromagnetic (AFM) pinning layer1706over the structure, preferably in that order. See also the top down view shown inFIG. 19. Conventional deposition (e.g. deposition in full-film), as well as lithography techniques, may be utilized in such formation process1790. As shown inFIG. 17, a central portion of second tunnel barrier layer1702makes contact with the exposed top surface of FM free layer1404through central opening1602but is otherwise insulated therefrom by patterned insulator1502. Like first tunnel barrier layer1402, second tunnel barrier layer1702may be made of a non-magnetic insulating material, preferably made of Al2O3, which is e.g. generally less than 1 nm in thickness.

Also inFIG. 17, FM pinned layer1704is formed over and in contact with second tunnel barrier layer1702. Similarly, AFM pinning layer1706is formed over and in contact with FM pinned layer1704. FM pinned layer1704and AFM pinning layer1706together may be referred to as the “emitter” or emitter region of the TTM. Note that FM pinned layer1704is electrically insulated and isolated from hard bias structures1406and1408by patterned insulator1502. In SVT configurations, the emitter region preferably includes metallic materials such as Ta or Au. In MTT configurations, the emitter region preferably includes at least one magnetic material such as NiFe, CoFe, or Co. The emitter region is generally formed to a thickness within 4 nm and 20 nm.

Next in the top down view ofFIG. 20, a resist structure2002is formed so as to cover a portion of the sensor stack structure in the central region and extend outwards toward the side regions so as to cover portions of hard bias structures1406and1408. Again, resist structure2002may be or include a photoresist. Resist structure2002may be a monolayer resist or a multi-layered resist (e.g. bilayer or trilayer resist). An etching process is then performed over the structure ofFIG. 20, so as to remove portions of sensor stack materials left exposed by resist structure2002. More particularly, the etching process removes exposed portions of sensor materials so as to define a rear edge2102of the sensor stack structure, as shown in the top down view ofFIG. 21. Thus, rear edges of FM pinned layer1704and FM free layer1404are defined in such etching process so as to be self-aligned.

The resulting structure of a TTM2250is shown in the ABS view ofFIG. 22. InFIG. 22, it is shown that an emitter conductive via2202, a base conductive via2204, and a collector conductive via2206are formed. Base conductive via2204has a first end which makes contact with base lead layer1050and a second end which is exposed at a top end of the TTM. To form base conductive via2204, a via hole is formed in recessed region772to expose underlying base lead materials of base lead layer1050. Conductive materials are then formed in the via hole to form base region conductive via2204coupled to the exposed base lead materials. Emitter conductive via2202has a first end which makes contact with the emitter and a second end which is exposed at the top end of the TTM. To form emitter conductive via2202, conductive materials are simply deposited or otherwise formed at least partially over the emitter to form emitter conductive via2202.

Collector conductive via2206has a first end which makes contact with collector substrate720and a second end which is exposed at the top end of the TTM. To form collector conductive via2206, a via hole is formed in recessed region774to expose underlying collector substrate materials of collector substrate720adjacent the location of removed base lead materials. Conductive materials are then formed in the via hole to form collector conductive via2206coupled to the exposed collector substrate materials. To achieve suitable coupling, a doping process may be performed prior to the sensor formation at the via site for collector conductive via2206in recessed region774. This doping process may specifically be performed just prior to the formation of the insulator layer described in relation toFIG. 8. This doping process is achieved either by a combination of solid state diffusion or ion-implantation and rapid thermal annealing. The dopant ions are made from any suitable chemical species to form a highly-doped n-type region in the semiconductor substrate. The highly-doped via site region helps provide a physical contact point for subsequently formed collector conductive via2206.

Additional processing steps may be subsequently performed to complete the manufacture of the TTM. These processes may utilize any suitable techniques known in the art (conventional or otherwise) to complete the manufacturing per the design requirements. Also note that additional or alternative leads may be formed in the TTM, which has at least three leads. Furthermore, on-board electronics may be formed on collector substrate720near the sensor stack structure.

Again, the TW of TTM2250ofFIG. 22is preferably substantially equal to the distance between the left TW edge and the left edge of elevated region770of collector substrate720(see leftmost “Δ1” inFIG. 22). Similarly, the TW is substantially equal to the distance between the right TW edge and the right edge of elevated region770of central opening1602(see rightmost “Δ1” inFIG. 22). Also preferably, the TW is substantially equal to the distance between the left edge of elevated region770and the left edge of hard bias structure1406(see leftmost “Δ2” inFIG. 22). Similarly, the TW is substantially equal to the distance between the right edge of elevated region770and the right edge of hard bias structure1408(see rightmost “Δ2” inFIG. 22). Thus, magnetic stabilization is achieved by creating a contiguous junction between each hard bias structure1406and1408and FM free layer1404that is located a distance of Δ1+Δ2away from the trackwidth edge.

Narrow trackwidth dimensions are achieved by requiring Δ1, Δ2, TW to be comparable in magnitude. Thus preferably, TW=Δ1=Δ2. In particular, each of these dimensions may be set at about 50 nanometers (nm), for example. Alignment of the trackwidth edge to the edge of elevated region770of collector substrate720, the edge of hard bias structures1404and1406to the edge of elevated region770of collector substrate720of half of this value is achievable with a tolerance of 25 nm, for example. Scaling dimensions to 30 nm requires alignment tolerances of 15 nm, which is achievable though use of electron beam (e-beam) processes.

Thus, the TTM ofFIG. 22may include collector substrate720, one or more first sensor layers formed over collector substrate720; patterned insulator1502which defines a central opening; and one or more second sensor layers formed over patterned insulator1502and over top layer of the one or more first sensor layers through the central opening of patterned insulator1502. The one or more first sensor layers may be layers1402and1404. The top layer of the one or more first sensor layers may be or include FM free layer1404formed over collector substrate720. The one or more second sensor layers may be layers1702,1704, and1706.

TTM2250is suitable for incorporation into nanoscale devices which increase areal recording densities, therefore aiding the revolution in magnetic storage. During operation of TTM2250, hot electrons are emitted from the emitter region to travel through to the base region to reach the collector region, which collects the magnetocurrent (i.e. collects the electrons). In operation, the device acts as a hot spin electron filter whereby the barrier region between the emitter and the base operates to selectively allow the hot electrons to pass on through to the base region and then on through the collector region. When TTM2250is not functioning, the device is in a known magnetic quiescent state. In this case, the magnetization of FM free layer1402which comprises all or part of the base region is parallel to the ABS plane. The direction of this magnetization depends on the direction of the magnetic field produced by a pinned layer (not visible) formed adjacent the free layer. The scattering of electrons within FM free layer1402is dependent upon the orientation of the magnetization within the free layer. For example, if the magnetization is pointing in the parallel direction relative to FM pinned layer1704(i.e. parallel to the ABS plane), then the electrons are not scattered as much as compared to the case where FM free layer1402is antiparallel relative to FM pinned layer1704. The performance of the device may be different depending upon the relative configuration of the layers.

Thus, one or more of the following advantageous characteristics may be provided in a TTM: a means to stabilize FM free layer1404; a means to confine ballistic electrons injected at the emitter to a localized region in FM free layer1404; and a means to provide a low resistance path for measuring the base current. The stabilization scheme has hard bias structures1406and1408in direct electrical contact with FM free layer1404, which extends well beyond the trackwidth region. An ex-situ process is utilized that localizes ballistic electron transport across tunnel barrier layer1702and electrically isolates hard bias structures1406and1408from FM pinned layer1704.

The second fabrication process for a sensor/TTM ofFIGS. 23-29will now be described. A substrate2302is first provided. Substrate2302may be a collector substrate, made of a wafer of any suitable semiconductor material such as silicon (Si), gallium arsenide (GaAs), or other. In contrast to the method ofFIGS. 7-22, collector substrate2302has a flat or substantially flat profile or top surface. A first electrode2304is formed (e.g. deposited in full film) over collector substrate2302. Subsequently, a cap layer2306is formed (e.g. deposited in full film) over first electrode2304. Preferably, cap layer2306is made of tantalum (Ta). Alternatively, cap layer2306may be or include materials such as Au, Cr, Au/Ta, Cr/Ta, or insulator materials such as alumina or silicon oxide.

InFIG. 24, a patterned insulator2402is then formed over the side regions of the structure so as to define a central opening which exposes a top surface2404of cap layer2306. Patterned insulator2402may be made with use of a resist structure over cap layer2306in the central region, which exposes cap layer materials in the side regions. With the resist structure in place, insulator materials are deposited over the side regions (and over the resist structure in the central region), and the resist structure is then removed.

InFIG. 25, an etching process2502is performed to remove cap layer materials exposed through the central opening of patterned insulator2402. Etching process2502may be or include an ion milling process (e.g. a low-energy ion mill), a sputter etching process, or a reactive ion etching (RIE) process. Etching process2502is continued until all exposed cap layer materials of cap layer2306are removed in the central region, so as to expose a top surface2504of first electrode2304. Note that cap layer materials in the side regions, protected by patterned insulator2402, remain intact. Thus, the cap layer has been formed into a patterned cap layer2306disposed underneath patterned insulator2402. Note also that etching process2502does not substantially affect patterned insulator2402in the side regions of the structure.

InFIG. 26, a deposition process is performed so as to deposit a tunnel barrier layer2604over top surface2504of first electrode2304through the central opening of patterned insulator2402, as well as over (at least a portion of) the top of patterned insulator2402itself. Tunnel barrier layer2604may be made of a non-magnetic insulating material, preferably made of Al2O3, which is e.g. generally less than 1 nm in thickness. Subsequently, inFIG. 27, a second electrode2702is deposited over tunnel barrier layer2604. As apparent inFIGS. 26 and 27, tunnel barrier layer2604and second electrode2702may be patterned as well using any suitable lithography or formation process.

InFIG. 28, a resulting sensor structure is shown, where a first conductive via2802is subsequently formed. First conductive via2802has a first end which makes contact with first electrode2304and a second end which is exposed. First conductive via2802may be formed by creating a via hole through patterned insulator2402and cap layer2306to expose underlying materials of first electrode2304. Conductive materials are then formed in the via hole to form first conductive via2802coupled to the exposed electrode materials. Note that a second conductive via (not shown inFIG. 28) may be formed over and on top of second electrode2702.

FIG. 29is the same as that shown and described in relation toFIGS. 23-28, but a TTM is specifically produced which further includes a third electrode2902and another tunnel barrier layer2904formed in between collector substrate2302and first electrode2304as shown. A third conductive via2906may be provided with a first end which makes contact with third electrode2902and a second end which is exposed. Alternatively, third conductive via2906may be provided with a first end that does not make direct contact with third electrode2902but rather makes contact directly with collector substrate2302. Specific materials and structures described in relation toFIGS. 7-22may be utilized in this resulting TTM. Thus, the TTM ofFIG. 29may include collector substrate2302, one or more first sensor layers formed over collector substrate2302; patterned insulator2402which defines a central opening; and one or more second sensor layers formed over patterned insulator2402and over top layer of the one or more first sensor layers through the central opening of patterned insulator2402. Patterned cap layer2306is formed under the patterned insulator2402. In this example, the one or more first sensor layers are represented by first electrode2304. The top layer of the one or more first sensor layers may be or include a ferromagnetic layer formed over collector substrate2302. In this example, the one or more second sensor layers are represented by tunnel barrier layer2602and second electrode2702. Second electrode2702may be or include a ferromagnetic layer. The one or more first sensor layers may further include third electrode2902and a second tunnel barrier layer2904.

Advantageously, the TTMs of the present disclosure are suitable for incorporation into nanoscale devices which increase areal recording densities, therefore aiding the revolution in magnetic storage. The TTM may comprise an SVT or an MTT, as examples. A TTM of the present disclosure which is suitable for use in a magnetic head has a “collector” or collector substrate, one or more first sensor layers (e.g. including a “base”) formed over the collector substrate; a patterned insulator which defines a central opening; and one or more second sensor layers (e.g. including an “emitter”) formed over the patterned insulator and over top layer of the one or more first sensor layers through the central opening of the patterned insulator. A disk drive of the present disclosure includes a slider, a magnetic head carried on the slider, a write head portion of the magnetic head, and a read head portion of the magnetic head which includes the TTM of the present disclosure.

Various embodiments and techniques have been provided. In one embodiment, the “collector” or collector substrate is formed with an elevated region surrounded by first and second recessed regions. First and second base lead layers are then formed in the first and the second recessed regions, respectively, followed by the formation of first and second hard bias structures over the first and the second base lead layers, respectively. The one or more first sensor layers includes a first tunnel barrier layer formed over the collector substrate in the elevated region and over the first and second base lead layers, where the top layer is a ferromagnetic free layer (“base”) formed over the first tunnel barrier layer. The ferromagnetic free layer has first and second ends which make electrical contact with the first and the second hard bias structures. The one or more second sensor layers include a second tunnel barrier layer formed over the top layer comprising the ferromagnetic free layer, and a ferromagnetic pinned layer (“emitter”) formed over the second tunnel barrier layer.

In another embodiment, the one or more first sensor layers includes a first ferromagnetic layer formed over the collector substrate, a first tunnel barrier layer formed over the first ferromagnetic layer, and a second ferromagnetic layer (i.e. the top layer) formed over the first tunnel barrier layer. A cap layer is formed over the second ferromagnetic layer. After the patterned insulator is formed, cap layer materials exposed via the central opening of the patterned insulator are etched away to thereby expose the top layer of the one or more first sensor layers (i.e. the second ferromagnetic layer). The one or more second sensor layers includes a second tunnel barrier layer formed over the top layer of the one or more first sensor layers and a third ferromagnetic layer formed over the second tunnel barrier layer.

It is to be understood that the above is merely a description of preferred embodiments of the invention and that various changes, alterations, and variations may be made without departing from the true spirit and scope of the invention as set for in the appended claims. For example, although the TTM is described as a three-leaded device, it may actually have three or more leads. Few if any of the terms or phrases in the specification and claims have been given any special particular meaning different from the plain language meaning to those ordinarily skilled in the art, and therefore the specification is not to be used to define terms in an unduly narrow sense.