Power supply device and driving method thereof

An object of the present invention is to provide a highly reliable power supply device which can withstand long-term use. Another object of the present invention is to provide a power supply device with reduced power consumption. The power supply device includes a cell including an antenna and a switch and performing position detection operation and power feeding operation; a high-frequency wave supply circuit; a switch control circuit; and a potential detecting circuit. One electrode of the antenna is connected to the high-frequency wave supply circuit through the switch, and the other thereof is connected to the potential detecting circuit. By the position detection operation, whether there is a power receiving device which gets close to a cell or not is detected. Only when the power receiving device is detected, power is supplied by the power feeding operation.

TECHNICAL FIELD

The present invention relates to a power supply device. In particular, the present invention relates to a power supply device which supplies power by a radio signal.

In this specification, a semiconductor device means all types of devices which can function by utilizing semiconductor characteristics, and an imaging device, a display device, an electro-optical device, a power supply device, a semiconductor circuit, an electronic device, and the like are all semiconductor devices.

BACKGROUND ART

In recent years, with the development of information communication technology, the realization of a ubiquitous society is proposed in which free communication of information and a variety of services can be achieved by connecting a variety of electronic devices to a computer network. The word “ubiquitous” comes from the Latin meaning “existing or being everywhere” (being omnipresent) and means that the processing of information using computers is naturally widespread throughout a living environment through electronic devices without any awareness of computers at anytime and anywhere.

In order to make an electronic device operate, power needs to be supplied to the electronic device (hereinafter, also referred to as power feeding). Power is supplied to a portable electronic device typified by a mobile phone and the like by a built-in battery. The battery is charged in the following manner: the electronic device is set in a battery charger and power is received from a commercial power supply distributed to each house. In addition, a contact needs to be provided to connect the electronic device and the battery charger; however, a non-contact power supply method utilizing electromagnetic induction phenomenon which does not need a contact is known because a malfunction due to a contact defect is prevented, a design to which waterproof function is imparted is easily made, and the like.

If positioned alignment of a power feeding side and a power receiving side is not doned accurately in charging by electromagnetic induction, efficient power supply has been difficult; however, in recent years, a sheet-like power supply device has been known in which the power supply efficiency is improved in such a manner that a plurality of power feeding coils are arranged to have a sheet-like shape and power is supplied from only a power feeding coil over which an electronic device which receives power is placed (Non-Patent Document 1).

By supplying power using a radio signal made by electromagnetic induction, the electronic device can be made to operate without consideration of a power supply cord, a position of an outlet, and the like. A power feeding coil functions as an antenna for supplying power using a radio signal.

REFERENCE

DISCLOSURE OF INVENTION

The sheet-like power supply device including a plurality of power feeding coils (power feeding antennas) described above includes a power feeding switch for supplying a high-frequency power (hereinafter, also referred to as a high-frequency wave) to a specific power feeding coil; and a position detecting switch for detecting a power feeding coil over which an electronic device which receives power is placed using the high-frequency wave. A mechanical switch manufactured using a micro electro mechanical system (MEMS) technology is used as the power feeding switch because high voltage and a large amount of current need to flow; however, there are problems in that it has a low operation speed and cannot withstand long-term use because of its poor durability.

The position detecting switch requires higher speed operation than the power feeding switch and is easily manufactured by a printing method typified by an ink jet method; therefore, an organic field effect transistor (OFET) is used. However, an OFET has a high drive voltage of several tens of voltage and thus consumes much power in position detection operation. The position detecting switch requires reduction in drive voltage and higher speed operation.

Since the power feeding switch and the position detecting switch satisfy different required specifications, they need to be formed separately; thus, manufacturing steps become complicated.

Since high-frequency waves with different frequencies are used as a high-frequency wave for supplying power and a high-frequency wave for detecting a position, a high-frequency wave supply circuit for supplying power and a high-frequency wave supply circuit for detecting a position need to be provided separately, whereby a circuit configuration becomes complicated. Therefore, the number of components is increased, and improvement in productivity and cost reduction are difficult to achieve.

An object of one embodiment of the present invention is to provide a highly reliable power supply device which can withstand long-term use.

Another object of one embodiment of the present invention is to provide a power supply device with high productivity.

Another object of one embodiment of the present invention is to provide a power supply device with reduced power consumption.

Each embodiment of the invention disclosed in this specification achieves at least one of the above objects.

One embodiment of the present invention is a power supply device which includes an antenna, a switch including an oxide semiconductor, and a high-frequency wave supply circuit. The antenna and the high-frequency wave supply circuit are connected to each other through the switch including an oxide semiconductor.

One embodiment of the present invention is a power supply device which includes a plurality of cells arranged in a matrix, a high-frequency wave supply circuit, a switch control circuit, and a potential detecting circuit. The cell includes an antenna and a transistor including an oxide semiconductor in a channel formation region. One electrode (terminal) of the antenna is connected to the high-frequency wave supply circuit through the transistor including an oxide semiconductor in the channel formation region. The other electrode (terminal) of the antenna is connected to the potential detecting circuit.

By position detection operation, a cell over which a power receiving device is placed is detected from the plurality of cells arranged in a matrix, and by power feeding operation, power is transmitted to only the cell over which the power receiving device is placed, so that efficient power transmission can be realized.

For high-frequency waves used for the position detection operation and the power feeding operation, high-frequency waves with the same frequency can be used. The position detection operation can be performed with power smaller than power used for the power feeding operation.

The position detection operation and the power feeding operation are performed alternately. A power feeding operation period is preferably longer than a position detection operation period.

Another embodiment of the present invention is a power supply device which includes a plurality of power feeding cells arranged in a matrix, a first high-frequency wave supply circuit, a second high-frequency wave supply circuit, a first switch control circuit, a second switch control circuit, and a potential detecting circuit. The power feeding cell includes an antenna, a first switch, and a second switch. One electrode (terminal) of the antenna is connected to the first high-frequency wave supply circuit through the first switch and to the second high-frequency wave supply circuit through the second switch. The other electrode (terminal) of the antenna is connected to the potential detecting circuit.

A transistor including an oxide semiconductor in a channel formation region is used as one or both of the first switch and the second switch.

The first high-frequency wave supply circuit supplies a high-frequency wave for power feeding operation, and the second high-frequency wave supply circuit supplies a high-frequency wave for position detection operation.

When high-frequency waves with different frequencies are used in the power feeding operation and the position detection operation, the power feeding operation and the position detection operation can be performed at the same time. In addition, the frequency of the high-frequency wave for the power feeding operation is preferably higher than the frequency of the high-frequency wave for the position detection operation.

A highly reliable power supply device which can withstand long-term use can be provided. A power supply device with reduced power consumption can be provided.

BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the description below, and it is easily understood by those skilled in the art that modes and details disclosed herein can be modified in various ways. Therefore, the present invention is not construed as being limited to description of the embodiments.

A transistor is a kind of semiconductor elements and can achieve amplification of current or voltage, switching operation for controlling conduction or non-conduction, or the like. A transistor in this specification includes an insulated-gate field effect transistor (IGFET) and a thin film transistor (TFT).

Note that the position, the size, the range, or the like of each structure illustrated in drawings and the like is not accurately represented in some cases for easy understanding. Therefore, the disclosed invention is not necessarily limited to such a position, size, range, or the like disclosed in the drawings and the like. In the drawings for explaining the embodiments, the same parts or parts having a similar function are denoted by the same reference numerals, and description of such parts is not repeated.

Note that in this specification and the like, the term such as “electrode” or “wiring” does not limit the function of the component. For example, an “electrode” can be used as part of a “wiring”, and vice versa. Further, the term “electrode” or “wiring” can also mean a combination of a plurality of “electrodes” and “wirings” formed in an integrated manner.

Note that in this specification and the like, the term “connection” includes not only direct connection but also indirect connection without departing from the purpose and the function.

Note that in this specification and the like, ordinal numbers such as “first”, “second”, and “third” are used in order to avoid confusion among components, and the terms do not mean limitation of the number of components.

Note that in this specification and the like, since a source and a drain of a transistor may interchange depending on the structure, the operating condition, or the like of the transistor, it is difficult to define which is a source or a drain. Therefore, the terms “source” and “drain” can be switched in this specification and the like.

In this embodiment, an example of a power supply device which is one embodiment of the present invention will be described with reference toFIGS. 1A and 1B.

A power supply device100illustrated inFIG. 1Aincludes a power feeding switch control circuit111, a high-frequency wave supply circuit112, and at least one power feeding cell101. The power feeding cell101includes a power feeding antenna102and a power feeding switch103. For the power feeding switch103, a transistor including an oxide semiconductor in a channel formation region is used. The power feeding switch103functions as a switch for controlling supply of a high-frequency wave to the power feeding antenna102. One electrode (terminal) of a source electrode and a drain electrode of the power feeding switch103is connected to a wiring106, and a gate electrode (control terminal) of the power feeding switch103is connected to a wiring105. Further, the other electrode (terminal) of the source electrode and the drain electrode of the power feeding switch103is connected to one electrode (terminal) of the power feeding antenna102, and the other electrode (terminal) of the power feeding antenna102is connected to a wiring104.

The power feeding antenna102has a coil shape in this embodiment; however, the shape of the power feeding antenna102is not limited thereto, and may be determined as appropriate in consideration of a frequency of a high-frequency wave used for supplying power. Instead of a coiled antenna, a monopole antenna, a dipole antenna, a patch antenna, or the like can be used.

Although a common potential or a ground potential is applied to the wiring104, a predetermined potential may be alternatively applied thereto. In addition, the wiring104may be connected to another circuit. The wiring105is connected to the power feeding switch control circuit111and transmits a signal (potential) for turning on/off the power feeding switch103from the power feeding switch control circuit111to the control terminal of the power feeding switch103. The high-frequency wave supply circuit112includes a high-frequency power supply generating a high-frequency wave and supplies a high-frequency wave to the power feeding antenna102through the wiring106and the power feeding switch103.

A power receiving device120illustrated inFIG. 1Bincludes a power receiving circuit121and a rectifier circuit125. The power receiving circuit121includes a power receiving antenna122and a resonant capacitor123which form an LC parallel resonance circuit. Further, the power receiving antenna122is connected to a wiring124. Although a common potential or a ground potential is applied to the wiring124, a predetermined potential may be alternatively applied thereto. In addition, the wiring124may be connected to another circuit. The rectifier circuit125includes a rectifier element126and a smoothing capacitor127.

The frequency of the high-frequency wave which the high-frequency wave supply circuit112supplies is not limited to a specific frequency, and for example, any of the following frequencies can be used: higher than or equal to 300 GHz and lower than 3 THz, which are frequencies of sub-millimeter waves; higher than or equal to 30 GHz and lower than 300 GHz, which are frequencies of millimeter waves; higher than or equal to 3 GHz and lower than 30 GHz, which are frequencies of microwaves; higher than or equal to 300 MHz and lower than 3 GHz, which are frequencies of ultrashort waves; higher than or equal to 30 MHz and lower than 300 MHz, which are frequencies of very short waves; higher than or equal to 3 MHz and lower than 30 MHz, which are frequencies of shortwaves; higher than or equal to 300 kHz and lower than 3 MHz, which are frequencies of medium waves; higher than or equal to 30 kHz and lower than 300 kHz, which are frequencies of long waves; and higher than or equal to 3 kHz and lower than 30 kHz, which are frequencies of very long waves.

Power supply from the power supply device100to the power receiving device120without a contact therebetween is described here. As a method of power supply from the power supply device100to the power receiving device120, an electromagnetic coupling method or an electromagnetic induction method can be used. In other words, by utilizing an electromagnetic induction phenomenon caused by change in electric field density, power is supplied without an electrical contact. Specifically, first, a high-frequency wave (e.g., 13.56 MHz) is supplied from the high-frequency wave supply circuit112to the wiring106. Next, when the power feeding switch control circuit111transmits a signal for turning on the power feeding switch103to the control terminal of the power feeding switch103through the wiring105, the power feeding switch103is turned on, so that the high-frequency wave is supplied to the power feeding antenna102. When the high-frequency wave is supplied to the power feeding antenna102, a magnetic field in which the density is changed in accordance with the frequency of the high-frequency wave is generated from the power feeding antenna102.

The change of the magnetic field generated from the power feeding antenna102causes induced current in the power receiving antenna122included in the power receiving circuit121. In this manner, power can be supplied from the power supply device100to the power receiving device120.

Since the power receiving circuit121includes an LC parallel resonance circuit in which the power receiving antenna122and the resonant capacitor123are combined, it can receive only power of a specific frequency. The specific frequency is determined by the inductance of the power receiving antenna122and the conductance of the resonant capacitor123. When the power receiving circuit121receives a plurality of magnetic fields having different frequencies at the same time, an electromagnetic induction phenomenon hardly occurs. In contrast, the power receiving circuit121receives only power of a specific frequency, it can receive power efficiently.

Note that power received by the power receiving circuit121is alternating current power; however, it can be converted to direct current power by the rectifier circuit125. In the case where it is not necessary to convert it to direct current power, the rectifier circuit125is not necessarily provided.

As the method of power supply, a microwave method or the like can be used instead of an electromagnetic coupling method and an electromagnetic induction method. The method of power supply may be selected by a practitioner in consideration of an intended use.

In this embodiment, a transistor including an oxide semiconductor in a channel formation region is used for the power feeding switch. Since the band gap of the oxide semiconductor is greater than or equal to 3 eV which is much wider than that of silicon, germanium, or the like, even when a large amount of current flows, hot-carrier degradation is hardly caused and a large amount of power can be supplied. Further, since the transistor including an oxide semiconductor in the channel formation region does not have a mechanical contact, a highly-reliable power supply device which has an excellent withstand property and can withstand long-term use can be provided.

In addition, in the transistor including an oxide semiconductor in the channel formation region, the off-state current per micrometer in channel width at room temperature can be less than or equal to 10 aA/μm (1×10−17A/μm), less than or equal to 1 aA/μm (1×10−18A/μm), further less than or equal to 1 zA/μm (1×10−21A/μm), still further less than or equal to 1 yA/μm (1×10−24A/μm). Therefore, when the transistor including an oxide semiconductor in the channel formation region is used as the power feeding switch, unnecessary output of a high-frequency wave to the power feeding antenna102can be prevented.

For the power feeding switch, a transistor including an inorganic semiconductor such as silicon (Si), germanium (Ge), or silicon carbide (SiC) in a channel formation region can be used; however, the transistor including an oxide semiconductor in the channel formation region, in which degradation is hardly caused and both supply of a large amount of current and a smaller amount of off-state current can be realized, is preferably used.

As described above, the transistor including an oxide semiconductor in the channel formation region is used for the power feeding switch included in the power supply device100, whereby a highly-reliable low-power-consumption power supply device which can supply a large amount of power and can withstand long-term use can be provided.

In this embodiment, a position detecting device which can be used for a power supply device of one embodiment of the present invention will be described. By using the position detecting device, whether there is a power receiving device or not can be detected.

A position detecting device200illustrated inFIG. 2includes a position detecting switch control circuit211, a high-frequency wave supply circuit212, and at least one position detecting cell201. The position detecting cell201includes a position detecting antenna202and a position detecting switch203. As the position detecting switch203, a transistor including an oxide semiconductor in a channel formation region is used. The position detecting switch203functions as a switch for controlling supply of a high-frequency wave to the position detecting antenna202. One electrode (terminal) of a source electrode and a drain electrode of the position detecting switch203is connected to a wiring206, and a gate electrode (control terminal) of the position detecting switch203is connected to a wiring205. In addition, the other electrode (terminal) of the source electrode and the drain electrode of the position detecting switch203is connected to one electrode (terminal) of the position detecting antenna202, and the other electrode (terminal) of the position detecting antenna202is connected to a potential detecting circuit213.

The position detecting antenna202has a coil shape in this embodiment; however, the shape of the position detecting antenna202is not limited thereto, and may be determined as appropriate in consideration of a frequency of a high-frequency wave used for supplying power. Instead of a coiled antenna, a monopole antenna, a dipole antenna, a patch antenna, or the like can be used.

The wiring205is connected to the position detecting switch control circuit211and transmits a signal (potential) for turning on/off the position detecting switch203from the position detecting switch control circuit211to the control terminal of the position detecting switch203. The high-frequency wave supply circuit212includes a high-frequency power supply generating a high-frequency wave and supplies a high-frequency wave to the position detecting antenna202through the wiring206and the position detecting switch203.

The frequency of the high-frequency wave which the high-frequency wave supply circuit212supplies is not limited to a specific frequency, and for example, any of the following frequencies can be used: higher than or equal to 300 GHz and lower than 3 THz, which are frequencies of sub-millimeter waves; higher than or equal to 30 GHz and lower than 300 GHz, which are frequencies of millimeter waves; higher than or equal to 3 GHz and lower than 30 GHz, which are frequencies of microwaves; higher than or equal to 300 MHz and lower than 3 GHz, which are frequencies of ultrashort waves; higher than or equal to 30 MHz and lower than 300 MHz, which are frequencies of very short waves; higher than or equal to 3 MHz and lower than 30 MHz, which are frequencies of shortwaves; higher than or equal to 300 kHz and lower than 3 MHz, which are frequencies of medium waves; higher than or equal to 30 kHz and lower than 300 kHz, which are frequencies of long waves; and higher than or equal to 3 kHz and lower than 30 kHz, which are frequencies of very long waves.

Next, a method for detecting the power receiving device120by the position detecting device200is described. Detection of the power receiving device120by the position detecting device200is performed by detecting a change of the impedance of the position detecting cell201which is caused when the power receiving device120gets close to the position detecting device200, as a potential change.

Specifically, first, a high-frequency wave (e.g., 3.5 MHz) is supplied from the high-frequency wave supply circuit212to the wiring206in a state where the power receiving device120is not placed over the intended position detecting cell201and a signal for turning on the position detecting switch203is transmitted from the position detecting switch control circuit211to the control terminal of the position detecting switch203through the wiring205, whereby the position detecting switch203is turned on and the high-frequency wave is supplied to the position detecting antenna202. The potential of a node207at this time is detected and stored by the potential detecting circuit213.

When the power receiving device120gets close to the intended position detecting cell201, apparent inductance of the position detecting antenna202is changed by the influence of the power receiving antenna122included in the power receiving device120. That is, since impedance of the position detecting cell201is changed, the potential of the node207is also changed. By comparing the potential of the node207with the stored potential, it is possible to determine whether or not the power receiving device120is placed over the intended position detecting cell201.

The impedance of the position detecting cell201gets larger as the frequency of a high-frequency wave used for position detection gets higher; thus, the potential change of the node207becomes also bigger. In other words, the higher the frequency of the high-frequency wave used for the position detection is, the more sensitively the position detection is performed. The frequency of the high-frequency wave used for the position detection is preferably higher than or equal to 1 MHz, more preferably higher than or equal to 3 MHz, still more preferably higher than or equal to 5 MHz. By using a high-frequency wave with a higher frequency, position detection can be performed quickly and accurately.

An OFET which is conventionally used as a position detecting switch has higher operation speed than a MEMS switch; however, it has been difficult to use a high-frequency wave with a frequency of higher than 5 MHz for position detection. A transistor including an oxide semiconductor in a channel formation region has higher field-effect mobility and higher operation speed than an OFET; therefore, the transistor including an oxide semiconductor in the channel formation region is used as the position detecting switch, so that a high-frequency wave with a higher frequency can be used for position detection.

Since the band gap of the oxide semiconductor is greater than or equal to 3 eV which is much wider than that of silicon, germanium, or the like, hot-carrier degradation is hardly caused; accordingly, a highly reliable position detecting device which can withstand long-term use can be provided.

In addition, in the transistor including an oxide semiconductor in the channel formation region, the off-state current per micrometer in channel width at room temperature can be less than or equal to 10 aA/μm (1×10−17A/μm), less than or equal to 1 aA/μm (1×10−18A/μm), further less than or equal to 1 zA/μm (1×10−21A/μm), still further less than or equal to 1 yA/μm (1×10−24A/μm). Therefore, when the transistor including an oxide semiconductor in the channel formation region is used as the position detecting switch, unnecessary output of a high-frequency wave to the position detecting antenna202can be prevented.

As the position detecting switch203, a transistor including an inorganic semiconductor such as silicon (Si), germanium (Ge), or silicon carbide (SiC) in a channel formation region can be used; however, the transistor including an oxide semiconductor in the channel formation region, in which degradation is hardly caused and both high-speed operation and a smaller amount of off-state current can be realized, is preferably used.

As described above, the transistor including an oxide semiconductor in the channel formation region is used instead of an OFET as the position detecting switch203included in the position detecting device200, so that the frequency of the high-frequency wave used for the position detection can be higher. As a result, a highly-reliable low-power-consumption power supply device which can realize quick and accurate position detection and can withstand long-term use can be provided.

In this embodiment, an example is described in which the power feeding switches and the position detecting switches which are described in Embodiments 1 and 2 are arranged in a matrix. The power feeding cells and/or the position detecting cells are arranged in a matrix to form an antenna sheet.

First, a structure of a conventional power supply device500and operation thereof are described with reference toFIGS. 3A and 3B. The conventional power supply device500illustrated inFIG. 3Aincludes a power feeding cell501, a first high-frequency wave supply circuit506, a second high-frequency wave supply circuit508, a power feeding switch control circuit511, a position detecting switch control circuit512, and a potential detecting circuit510.

The power feeding cell501has a coiled antenna502which is used for both power feeding and position detection. One electrode of the antenna502is connected to the first high-frequency wave supply circuit506for the power feeding through a power feeding switch505and to the second high-frequency wave supply circuit508for the position detection through a position detecting switch507. A MEMS switch is used as the power feeding switch505and an OFET is used as the position detecting switch507. The other electrode of the antenna502is connected to the potential detecting circuit510. In addition, the antenna502and a capacitor503are connected in parallel.

FIG. 3Bshows an example of the potential detecting circuit510. The potential detecting circuit510includes a resistor522and a capacitor523. An example in which the resistor522and the capacitor523are connected in parallel is described.

On/off operation of the power feeding switch505is controlled by the power feeding switch control circuit511. On/off operation of the position detecting switch507is controlled by the position detecting switch control circuit512.

The first high-frequency wave supply circuit506and the second high-frequency wave supply circuit508each include a high-frequency power supply generating a high-frequency wave and supply a high-frequency wave to the antenna502through the power feeding switch505or the position detecting switch507.

The frequency of the high-frequency wave supplied from the first high-frequency wave supply circuit506and the frequency of the high-frequency wave supplied from the second high-frequency wave supply circuit508are different. The first high-frequency wave supply circuit506supplies a high-frequency wave with a power feeding frequency (e.g., 13.56 MHz) and the second high-frequency wave supply circuit508supplies a high-frequency wave with a position detection frequency (e.g., 3.5 MHz). By using high-frequency waves with different frequencies, the power feeding and the position detection are performed at the same time.

For example, when position detection is performed during power feeding operation, the power feeding switch505and the position detecting switch507are turned on simultaneously, and then a high-frequency wave in which a high-frequency wave with a frequency of 13.56 MHz and a high-frequency wave with a frequency of 3.5 MHz are superimposed on each other is applied to a node520.

By connecting the capacitor503and the antenna502in parallel to form an LC parallel resonance circuit, a high-frequency wave with a frequency of 13.56 MHz is taken out from the high-frequency wave in which the two high-frequency waves are superimposed on each other, and used for the power feeding. Further, the capacitor523and the resistor522included in the potential detecting circuit510are connected in parallel and a potential530or the potential of a node521is detected, so that the potential change of the high-frequency wave with a frequency of 3.5 MHz is detected.

FIG. 4shows a conventional example in which the power feeding cells501illustrated inFIG. 3Aare arranged in a matrix. InFIG. 4, the power supply device500in which 16 power feeding cells501are arranged in a matrix with 4 rows and 4 columns is illustrated.

InFIG. 4, gate electrodes of the position detecting switches507included in all the power feeding cells501in the first row are connected to WP-1; gate electrodes of the power feeding switches505included in all the power feeding cells501in the first row are connected to WS-1; one of a source electrode and a drain electrode of each of the position detecting switches507included in all the power feeding cells501in the first column is connected to BP-1; one of a source electrode and a drain electrode of each of the power feeding switches505included in all the power feeding cells501in the first column is connected to BS-1; and an electrode, which is not connected to the position detecting switch507and the power feeding switch505, of each of the antennas502included in all the power feeding cells501in the first column is connected to SL-1.

In this manner, inFIG. 4, 16 power feeding cells501arranged in a matrix with 4 rows and 4 columns are connected to WP-1to WP-4, WS-1to WS-4, BP-1to BP-4, BS-1to BS-4, and SL-1to SL-4. WP-1to WP-4are connected to the position detecting switch control circuit512; WS-1to WS-4are connected to the power feeding switch control circuit511; BP-1to BP-4are connected to the second high-frequency wave supply circuit508; BS-1to BS-4are connected to the first high-frequency wave supply circuit506; and SL-1to SL-4are connected to the potential detecting circuit510.

Whether there is the power receiving device120which gets close to the power feeding cell501or not can be detected by the following operation (position detection operation). First, a potential for turning off the position detecting switches507is supplied to WP-2to WP-4and a potential for turning on the position detecting switches507is supplied to WP-1. A high-frequency wave with a position detection frequency (e.g., 3.5 MHz) is supplied to BS-1to BS-4. Then, the potentials of SL-1to SL-4are detected.

Next, a potential for turning off the position detecting switches507is supplied to WP-1, WP-3, and WP-4, and a potential for turning on the position detecting switches507is supplied to WP-2. A high-frequency wave with a position detection frequency (e.g., 3.5 MHz) is supplied to BS-1to BS-4. Then, the potentials of SL-1to SL-4are detected.

As described above, WP-1to WP-4are sequentially selected, whereby the position of the power feeding cell501to which the power receiving device120gets close can be detected (specified).

The power feeding switch505of the power feeding cell501the position of which is detected (specified) is turned on, and a high-frequency wave with a power feeding frequency (e.g., 13.56 MHz) is supplied from the first high-frequency wave supply circuit506(power feeding operation). When it is judged that the power receiving device120is away from the cell in the power feeding operation by the position detection operation, the power feeding switch505is turned off and supply of the power feeding high-frequency wave from the first high-frequency wave supply circuit506to the power feeding cell501is stopped. In this manner, the position detection operation and the power feeding operation are performed.

The power feeding switch505and the position detecting switch507each use a transistor including an oxide semiconductor in a channel formation region, so that a highly-reliable low-power-consumption power supply device which has excellent sensitivity for the position detection can be provided.

As described in Embodiment 1, the transistor including an oxide semiconductor in the channel formation region has low off-state current, and even when a large amount of current flows, hot-carrier degradation is hardly caused. Further, since there is no mechanical contact, the power feeding switch505is replaced with the transistor including an oxide semiconductor in the channel formation region, so that a highly-reliable low-power-consumption power supply device which can supply a large amount of power and can withstand long-term use can be provided.

In addition, as described in Embodiment 2, the transistor including an oxide semiconductor in the channel formation region has higher field-effect mobility and higher operation speed than an OFET; therefore, the position detecting switch507is replaced with the transistor including an oxide semiconductor in the channel formation region, so that a high-frequency wave with a higher frequency can be used for position detection and quick and accurate position detection can be conducted.

A transistor including an oxide semiconductor in a channel formation region has high operation speed because of its field-effect mobility which is higher than that of an OFET; therefore, even when the number of power feeding cells is large, the power feeding cell501over which the power receiving device120is placed can be detected (specified) quickly. Further, since a high-frequency wave with a higher frequency can be used for the position detection, more accurate position detection can be conducted.

Note that when the high-frequency wave with the power feeding frequency and the high-frequency wave with the position detection frequency have the same frequency, the power feeding operation and the position detection operation cannot be performed at the same time; therefore, different frequencies need to be used as the power feeding frequency and the position detection frequency. In addition, the frequency of the high-frequency position detection wave is preferably lower than that of the high-frequency power feeding wave.

Next, a structure in which by using the same transistor as a power feeding switch and a position detecting switch, one switch included in a power feeding cell serves as a power feeding one and a position detection one is described with reference toFIG. 5.

A cell301illustrated inFIG. 5has a structure similar to that of the power feeding cell101described in Embodiment 1 and also functions as the position detecting cell described in Embodiment 2. That is, an antenna302inFIG. 5functions as both the power feeding antenna and the position detecting antenna. Further, a switch303functions as both the power feeding switch and the position detecting switch.

A power supply device300in which 16 cells301are arranged in a matrix with 4 rows and 4 columns is illustrated inFIG. 5; however, the number and arrangement of cells301are not limited thereto and can be determined by a practitioner in consideration of an intended use.

InFIG. 5, gate electrodes of the switches303included in all the cells301in the first row are connected to WL-1; one of a source electrode and a drain electrode of each of the switches303included in all the cells301in the first column is connected to BL-1; and an electrode, which is not connected to the switch303, of each of the antennas302included in all the cells301in the first column is connected to SL-1. Here, WL-1, BL-1, and SL-1correspond to the wiring105, the wiring106, and the wiring104which are described in Embodiment 1, respectively (seeFIG. 1A).

As described above, inFIG. 5, 16 cells301arranged in a matrix with 4 rows and 4 columns are connected to WL-1to WL-4, BL-1to BL-4, and SL-1to SL-4. WL-1to WL-4are connected to a switch control circuit311; BL-1to BL-4are connected to a high-frequency wave supply circuit308; and SL-1to SL-4are connected to a potential detecting circuit310.

The high-frequency wave supply circuit308includes a high-frequency power supply generating a high-frequency wave and supplies a high-frequency wave to the antenna302through the switch303.

Power feeding from the power supply device300to the power receiving device120in power feeding operation is performed by the cell301to which the power receiving device120gets close, not by all the cells301at the same time. Note that power may be fed from a plurality of cells301or all the cells301depending on the number or the structure of the power receiving devices120which get close.

Since unnecessary power feeding can be reduced by limitation on power feeding from the cell301to which the power receiving device120does not get close, power consumption of the whole power supply device can be reduced and power feeding can be performed efficiently.

A transistor including an oxide semiconductor in a channel formation region can achieve low power consumption and can supply a large amount of power, and is a highly reliable transistor in which hot-carrier degradation is hardly caused. In addition, the transistor including an oxide semiconductor in the channel formation region has higher field-effect mobility and higher operation speed than an OFET. By using the transistor including an oxide semiconductor in the channel formation region, one transistor can serve as both the power feeding switch and the position detecting switch.

Further, in the transistor including an oxide semiconductor in the channel formation region, a high-frequency wave with a frequency of 5 MHz or higher can be used for position detection. Thus, in addition to low power consumption and high reliability, the high-frequency wave with the power feeding frequency and the high-frequency wave with the position detection frequency have the same frequency. As a result, high-frequency wave supply circuits which have been conventionally needed to be separately provided for the position detection and for the power feeding, can be one high-frequency wave supply circuit. Further, switch control circuits which have been needed to be separately provided for the position detection and for the power feeding can be one switch control circuit.

Furthermore, since the position detection and the power feeding can be performed by high-frequency waves with one frequency, a high-frequency wave does not need to be separated using a capacitor. Thus, the capacitor503and the capacitor523described inFIGS. 3A and 3Bdo not need to be provided. However, that may not be true if a capacitor is provided to remove noise components or the like.

In the case where the position detection operation and the power feeding operation are performed using high-frequency waves with one frequency, the power feeding operation needs to be stopped during the position detection operation. In the structure illustrated inFIG. 5, for example, the antennas302included in all the power feeding cells in the second column are all connected to SL-2; therefore, when the power receiving device is placed over any of the power feeding cells in the second column, it is detected that the power receiving device is placed over all the power feeding cells in the second column apparently. Accordingly, in the case where one transistor serves as both the power feeding switch and the position detecting switch, the position detection operation and the power feeding operation need to be alternately performed.

The position detection operation is performed in the following manner. First, from the switch control circuit311, a signal for turning off the switches303is supplied to WL-2to WL-4and a signal for turning on the switches303is supplied to WL-1. A high-frequency wave with a specific frequency (e.g., 13.56 MHz) is supplied from the high-frequency wave supply circuit308to BL-1to BL-4, and the potentials of SL-1to SL-4are detected.

Next, from the switch control circuit311, a signal for turning off the switches303is supplied to WL-1, WL-3, and WL-4and a signal for turning on the switches303is supplied to WL-2. A high-frequency wave with a specific frequency (e.g., 13.56 MHz) is supplied from the high-frequency wave supply circuit308to BL-1to BL-4, and the potentials of SL-1to SL-4are detected.

In this manner, by scanning WL-1to WL-4sequentially, the position of the cell301over which the power receiving device120is placed can be detected (specified).

Note that the position detection operation is not operation for supplying power like power feeding operation, and by using a transistor including an oxide semiconductor in a channel formation region, the position detection frequency can be higher; therefore, the position detection operation can be performed with power smaller than power used for the power feeding operation. That is, a low-power consumption power supply device can be provided.

Then, the power feeding operation is performed. First, a high-frequency power feeding wave is supplied from the high-frequency wave supply circuit308to the cell301over which the power receiving device120is placed and which is detected by the position detection operation. Next, when a signal for turning on the switch303is supplied from the switch control circuit311to a control terminal of the switch303included in the cell301, a high-frequency power feeding wave is supplied to the antenna302and power can be supplied to the power receiving device120.

By using a transistor including an oxide semiconductor in a channel formation region as the switch303, quick and accurate position detection operation can be performed; accordingly, a position detection operation period, namely, a suspension period of the power feeding operation can be shortened. A power feeding operation period is preferably longer than the position detection operation period. Further, it is more preferable that the power feeding operation period be 5 times or more the position detection operation period, preferably 10 times or more the position detection operation period, because the suspension period of the power feeding operation can be substantially regarded as being nonexistent.

As described above, when one transistor including an oxide semiconductor in a channel formation region serves as the power feeding switch and the position detecting switch, a circuit configuration becomes simple and the number of components can be reduced; accordingly, a power supply device with high productivity can be provided. Since the area occupied by a cell in which position detection and power feeding are performed can be reduced, a plurality of cells can be arranged with high density, so that spatial resolution in the position detection can be improved. Further, a highly-reliable low-power-consumption power supply device which can withstand long-term use can be provided.

In this embodiment, an example of a transistor that can be applied to a power supply device disclosed in this specification will be described.

There is no particular limitation on the structure of the transistor that can be applied to a power supply device disclosed in this specification; for example, a staggered type or a planar type having a top-gate structure or a bottom-gate structure can be employed. In addition, the transistor may have a single-gate structure in which one channel formation region is formed, a double-gate structure in which two channel formation regions are formed, or a triple-gate structure in which three channel formation regions are formed.

Note thatFIGS. 6A to 6DandFIG. 7each illustrate an example of a cross-sectional structure of a transistor. In one embodiment of the present invention, a conductive layer which faces a gate electrode of each of the transistors and is formed with a gate insulating layer, a semiconductor layer which is to be a channel formation region, and an insulating layer interposed therebetween, is used as a back gate electrode.

The transistors illustrated inFIGS. 6A to 6DandFIG. 7each include an oxide semiconductor in the semiconductor layer which is to be a channel formation region. An advantage of using an oxide semiconductor is that high mobility and low off-state current can be obtained; however, another semiconductor may be used in accordance with the purpose or intended use.

A transistor2410illustrated inFIG. 6Ais one of bottom-gate transistors and is also called an inverted staggered transistor.

The transistor2410includes a gate electrode layer2401, a gate insulating layer2402, an oxide semiconductor layer2403, a source electrode layer2405a, and a drain electrode layer2405b, which are formed over a substrate2400having an insulating surface. In addition, an insulating layer2407and a protective insulating layer2409are formed so as to cover them.

As illustrated inFIG. 7, a conductive layer2412may be formed over the insulating layer2407or the protective insulating layer2409of the transistor2410to overlap with a channel formation region. The conductive layer2412can be used as a back gate. By changing a potential of the back gate, the threshold voltage of the transistor can be changed. A similar structure can be applied to the following structure other than a top-gate structure.

A transistor2420illustrated inFIG. 6Bis one of bottom-gate transistors called a channel protective transistor and is also referred to as an inverted staggered transistor.

The transistor2420includes, over the substrate2400having an insulating surface, the gate electrode layer2401, the gate insulating layer2402, the oxide semiconductor layer2403, an insulating layer2427functioning as a channel protective layer which covers a channel formation region of the oxide semiconductor layer2403, the source electrode layer2405a, and the drain electrode layer2405b. The protective insulating layer2409is formed so as to cover them.

A transistor2430illustrated inFIG. 6Cis a bottom-gate transistor includes the gate electrode layer2401, the gate insulating layer2402, the source electrode layer2405a, the drain electrode layer2405b, and the oxide semiconductor layer2403, which are formed over the substrate2400having an insulating surface. The insulating layer2407and the protective insulating layer2409are formed so as to cover them.

In the transistor2430, the gate insulating layer2402is provided over and in contact with the substrate2400and the gate electrode layer2401, and the source electrode layer2405aand the drain electrode layer2405bare provided over and in contact with the gate insulating layer2402. Further, the oxide semiconductor layer2403is provided over the gate insulating layer2402, the source electrode layer2405a, and the drain electrode layer2405b.

A transistor2440illustrated inFIG. 6Dis one of top-gate transistors. In the transistor2440, an insulating layer2437, the oxide semiconductor layer2403, the source electrode layer2405a, the drain electrode layer2405b, the gate insulating layer2402, and the gate electrode layer2401are formed over the substrate2400having an insulating surface. A wiring layer2436aand a wiring layer2436bare connected to the source electrode layer2405aand the drain electrode layer2405b, respectively. In order to provide a back gate in this structure, a conductive layer and an insulating layer are formed in a region overlapping with the channel formation region before the oxide semiconductor layer2403is formed.

In this embodiment, the oxide semiconductor layer2403is used as a semiconductor layer in which a channel is formed as described above. As an oxide semiconductor material used for the oxide semiconductor layer2403, any of the following metal oxides can be used: an In—Sn—Ga—Zn—O-based metal oxide which is a four-component metal oxide; an In—Ga—Zn—O-based metal oxide, an In—Sn—Zn—O-based metal oxide, an In—Al—Zn—O-based metal oxide, a Sn—Ga—Zn—O-based metal oxide, an Al—Ga—Zn—O-based metal oxide, and a Sn—Al—Zn—O-based metal oxide which are three-component metal oxides; an In—Zn—O-based metal oxide, a Sn—Zn—O-based metal oxide, an Al—Zn—O-based metal oxide, a Zn—Mg—O-based metal oxide, a Sn—Mg—O-based metal oxide, an In—Mg—O-based metal oxide, and an In—Ga—O-based metal oxide which are two-component metal oxides; an In—O-based metal oxide, a Sn—O-based metal oxide, and a Zn—O-based metal oxide which are single-component metal oxides; and the like. Further, SiO2may be contained in the above oxide semiconductor. Here, for example, an In—Ga—Zn—O-based oxide semiconductor is an oxide containing at least In, Ga, and Zn, and there is no particular limitation on the composition ratio thereof. Further, the In—Ga—Zn—O-based oxide semiconductor may contain an element other than In, Ga, and Zn.

For the oxide semiconductor layer2403, a thin film represented by the chemical formula, InMO3(ZnO)m(m>0) can be used. Here, M represents one or more metal elements selected from Ga, Al, Mn, and Co. For example, M can be Ga, Ga and Al, Ga and Mn, Ga and Co, or the like.

In the transistors2410,2420,2430, and2440each including the oxide semiconductor layer2403as the semiconductor layer in which a channel is formed, the current value in an off state (off-state current value) can be small. Accordingly, power consumption can be suppressed.

In addition, the transistors2410,2420,2430, and2440each including the oxide semiconductor layer2403as the semiconductor layer in which the channel is formed can operate at high speed because they can achieve relatively high field-effect mobility. Thus, a driver circuit for which high-speed operation is required, such as the potential detecting circuit310, the switch control circuit311, or the high-frequency wave supply circuit308can be formed over the same substrate as the switch303; therefore, the number of components can be reduced.

As the substrate2400, as well as a glass substrate, a ceramic substrate, a quartz substrate, or a sapphire substrate, a crystallized glass substrate or the like can be used.

Alternatively, a flexible substrate may be used as the substrate2400. In the case of using a flexible substrate, a transistor including an oxide semiconductor in a channel formation region may be directly formed on the flexible substrate; or a transistor including an oxide semiconductor in a channel formation region may be formed over another manufacturing substrate, and then may be separated from the manufacturing substrate and transferred to a flexible substrate. Note that in order to separate the transistor from the manufacturing substrate and transfer it to the flexible substrate, a separation layer is preferably provided between the manufacturing substrate and the transistor including an oxide semiconductor in the channel formation region.

In order to manufacture a flexible power supply device, a transistor including the oxide semiconductor layer2403in a channel formation region may be directly formed on a flexible substrate; or a transistor including the oxide semiconductor layer2403in a channel formation region may be formed over another manufacturing substrate, and then may be separated from the manufacturing substrate and transferred to a flexible substrate. Note that in order to separate the transistor from the manufacturing substrate and transfer it to the flexible substrate, a separation layer is preferably provided between the manufacturing substrate and the transistor including an oxide semiconductor in the channel formation region.

In the bottom-gate transistors2410,2420, and2430, an insulating layer serving as a base layer may be provided between the substrate and the gate electrode layer. The base layer has a function of preventing diffusion of an impurity element from the substrate, and can be formed to have a single-layer structure or a stacked-layer structure using one or more layers selected from a silicon nitride layer, a silicon oxide layer, a silicon nitride oxide layer, and a silicon oxynitride layer.

When a halogen element such as chlorine or fluorine is contained in the base insulating layer, a function of preventing diffusion of an impurity element from the substrate2400can be further improved. The peak of the concentration of a halogen element to be contained in the base insulating layer is measured by secondary ion mass spectrometry (SIMS) and is preferably in the range of 1×1015/cm3to 1×1020/cm3inclusive.

For the gate electrode layer2401, a metal material such as molybdenum (Mo), titanium (Ti), chromium (Cr), tantalum (Ta), tungsten (W), aluminum (Al), copper (Cu), neodymium (Nd), scandium (Sc), or magnesium (Mg), or an alloy material which contains any of these materials as its main component can be used. In addition, the gate electrode layer2401is not limited to a single layer, and a stacked layer of different layers may also be used.

The gate insulating layer2402can be formed using silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, aluminum oxide, aluminum nitride, aluminum oxynitride, aluminum nitride oxide, tantalum oxide, yttrium oxide, hafnium oxide, hafnium silicate (HfSixOyOy(x>0, y>0)), hafnium silicate to which nitrogen is added (HfSixOyNz(x>0, y>0, z>0)), hafnium aluminate to which nitrogen is added (HfAlxOyNz(x>0, y>0, z>0)), or the like. A plasma CVD method, a sputtering method, or the like can be employed. The gate insulating layer2402is not limited to a single layer, and a stacked layer of different layers may also be used. For example, by a plasma CVD method, a silicon nitride layer (SiNy(y>0)) may be formed as a first gate insulating layer, and a silicon oxide layer (SiOx(x>0)) may be formed as a second gate insulating layer over the first gate insulating layer, so that the gate insulating layer may be formed.

As the conductive layer used for the source electrode layer2405aand the drain electrode layer2405b, for example, a layer including an element selected from Al, Cr, Cu, Ta, Ti, Mo, W, and Mg, a layer including an alloy containing any of these elements, or the like can be used. Further, a structure may be employed in which a high-melting-point metal layer of Ti, Mo, W, or the like is stacked over and/or below a metal layer of Al, Cu, or the like. An aluminum material to which an element (Si, Nd, Sc, or the like) preventing generation of a hillock or a whisker in an aluminum layer is added is used, whereby heat resistance can be increased.

A material similar to that of the source electrode layer2405aand the drain electrode layer2405bcan be used for a conductive layer such as the wiring layer2436aand the wiring layer2436bwhich are connected to the source electrode layer2405aand the drain electrode layer2405b, respectively.

Alternatively, the conductive layer to be the source electrode layer2405aand the drain electrode layer2405b(including a wiring layer formed using the same layer as the source and drain electrode layers) may be formed using a conductive metal oxide. As the conductive metal oxide, indium oxide (In2O3), tin oxide (SnO2), zinc oxide (ZnO), an alloy of indium oxide and tin oxide (In2O3—SnO2, abbreviated to ITO), an alloy of indium oxide and zinc oxide (In2O3—ZnO), or any of these metal oxide materials containing silicon oxide can be used.

As the insulating layers2407,2427, and2437, an inorganic insulating layer such as a silicon oxide layer, a silicon oxynitride layer, an aluminum oxide layer, or an aluminum oxynitride layer can be typically used.

As the protective insulating layer2409, an inorganic insulating layer such as a silicon nitride layer, a silicon nitride oxide layer, an aluminum oxide layer, an aluminum nitride layer, or an aluminum nitride oxide layer can be used.

A planarization insulating layer may be formed over the protective insulating layer2409in order to reduce surface unevenness caused by the structure of the transistor. For the planarization insulating layer, an organic material such as polyimide, an acrylic resin, or a benzocyclobutene-based resin can be used. As an alternative to such organic materials, it is possible to use a low-dielectric constant material (a low-k material) or the like. Note that the planarization insulating layer may be formed by stacking a plurality of insulating layers formed using these materials.

As described above, in this embodiment, a high-performance power supply device can be provided by using a transistor including an oxide semiconductor in a channel formation region.

In this embodiment, an example of a transistor including an oxide semiconductor in a channel formation region and an example of a method for manufacturing the transistor will be described in detail with reference to the drawings.

FIGS. 8A to 8Eillustrate an example of a cross-sectional structure of a transistor. A transistor2510illustrated inFIGS. 8A to 8Eis an inverted staggered transistor having a bottom-gate structure, which is similar to the transistor2410illustrated inFIG. 6A.

An oxide semiconductor used for a semiconductor layer in this embodiment is an i-type (intrinsic) oxide semiconductor or a substantially i-type (intrinsic) oxide semiconductor. The i-type (intrinsic) oxide semiconductor or substantially i-type (intrinsic) oxide semiconductor is obtained in such a manner that hydrogen, which serves as a donor, is removed from an oxide semiconductor as much as possible, and the oxide semiconductor is highly purified so as to contain impurities that are not main components of the oxide semiconductor as few as possible. In other words, a feature is that a highly purified i-type (intrinsic) semiconductor or a semiconductor close thereto is obtained not by adding impurities but by removing impurities such as hydrogen and water as much as possible. Accordingly, the oxide semiconductor layer used in a channel formation region included in the transistor2510is an oxide semiconductor layer which is highly purified and made to be electrically i-type (intrinsic).

In addition, the highly purified oxide semiconductor includes extremely few (close to zero) carriers, and the carrier concentration is lower than 1×1014/cm3, preferably lower than 1×1012/cm3, more preferably lower than 1×1011/cm3.

Since the number of carriers in the oxide semiconductor is extremely small, off-state current can be reduced in the transistor. It is preferable that the off-state current be as small as possible.

Specifically, in the transistor including the above oxide semiconductor in the channel formation region, the off-state current value per micrometer of channel width at room temperature can be less than or equal to 10 aA/μm (1×10−17A/μm), less than or equal to 1 aA/μm (1×10−18A/μm), further less than or equal to 1 zA/μm (1×10−21A/μm), still further less than or equal to 1 yA/μm (1×10−24A/μm).

In addition, on-state current of the transistor2510including the above oxide semiconductor in the channel formation region has almost no temperature dependence, and the variations in off-state current are extremely small.

A process of manufacturing the transistor2510over a substrate2505is described below with reference toFIGS. 8A to 8E.

First, a conductive layer is formed over the substrate2505having an insulating surface, and then, a gate electrode layer2511is formed through a first photolithography step and an etching step. Note that a resist mask may be formed by an inkjet method. Formation of the resist mask by an inkjet method needs no photomask; thus, manufacturing cost can be reduced.

As the substrate2505having an insulating surface, a substrate similar to the substrate2400described in Embodiment 4 can be used. In this embodiment, a glass substrate is used as the substrate2505.

An insulating layer serving as a base layer may be provided between the substrate2505and the gate electrode layer2511. The base layer has a function of preventing diffusion of an impurity element from the substrate2505, and can be formed to have a single-layer structure or a stacked-layer structure using one or more of a silicon nitride layer, a silicon oxide layer, a silicon nitride oxide layer, and a silicon oxynitride layer.

As the gate electrode layer2511, a metal material such as molybdenum, titanium, tantalum, tungsten, aluminum, copper, neodymium, scandium, or magnesium or an alloy material which contains any of these materials as its main component can be used. In addition, the gate electrode layer2511is not limited to a single layer, and a stacked layer of different layers may also be used.

Next, a gate insulating layer2507is formed over the gate electrode layer2511. The gate insulating layer2507preferably has a single-layer structure or a stacked-layer structure using a film including silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, aluminum oxide, aluminum nitride, aluminum oxynitride, aluminum nitride oxide, tantalum oxide, yttrium oxide, hafnium oxide, hafnium silicate (HfSixOy(x>0, y>0)), hafnium silicate to which nitrogen is added (HfSixOyNz(x>0, y>0, z>0)), hafnium aluminate to which nitrogen is added (HfAlxOyNz(x>0, y>0, z>0)), or the like which is obtained by a CVD method, a sputtering method, or the like. The thickness of the gate insulating layer2507can be, for example, greater than or equal to 1 nm and less than or equal to 200 nm, preferably greater than or equal to 10 nm and less than or equal to 100 nm.

For the oxide semiconductor in this embodiment, an oxide semiconductor which is made to be an i-type semiconductor or a substantially i-type semiconductor by removal of impurities is used. Such a highly purified oxide semiconductor is highly sensitive to an interface state or interface charge; thus, an interface between the oxide semiconductor layer and the gate insulating layer is important. For that reason, the gate insulating layer that is in contact with a highly purified oxide semiconductor needs to have high quality.

For example, high-density plasma CVD using microwaves (e.g., a frequency of 2.45 GHz) is preferable because a dense high-quality insulating layer having high withstand voltage can be formed. The highly purified oxide semiconductor and the high-quality gate insulating layer are in close contact with each other, whereby the interface state can be reduced and favorable interface characteristics can be obtained.

Needless to say, another film formation method such as a sputtering method or a plasma CVD method can be employed as long as the method enables formation of a high-quality insulating layer as a gate insulating layer. Further, an insulating layer whose film quality and characteristic of the interface with an oxide semiconductor are improved by heat treatment performed after formation of the insulating layer may be formed as a gate insulating layer. In any case, an insulating layer that can reduce interface state density with an oxide semiconductor to form a favorable interface, as well as having favorable film quality as the gate insulating layer, is formed. An example of using a sputtering method is described here.

In order that hydrogen, hydroxyl, and moisture might be contained in the gate insulating layer2507and an oxide semiconductor layer2530as little as possible, it is preferable that the substrate2505over which the gate electrode layer2511is formed or the substrate2505over which layers up to the gate insulating layer2507are formed be preheated in a preheating chamber of a sputtering apparatus as pretreatment for deposition of the oxide semiconductor layer2530so that impurities such as hydrogen and moisture adsorbed on the substrate2505are eliminated and removed. As an evacuation unit provided for the preheating chamber, a cryopump is preferable. Note that this preheating treatment can be omitted. This preheating treatment may be similarly performed on the substrate2505over which layers up to a source electrode layer2515aand a drain electrode layer2515bare formed before formation of an insulating layer2516.

Next, the oxide semiconductor layer2530having a thickness of greater than or equal to 2 nm and less than or equal to 200 nm, preferably greater than or equal to 5 nm and less than or equal to 30 nm is formed over the gate insulating layer2507(see FIG.8A).

Note that before the oxide semiconductor layer2530is formed by a sputtering method, powder substances (also referred to as particles or dust) attached on a surface of the gate insulating layer2507are preferably removed by reverse sputtering in which an argon gas is introduced and plasma is generated. The reverse sputtering refers to a method in which, without application of voltage to a target side, an RF power supply is used for application of voltage to a substrate side in an argon atmosphere so that plasma is generated in the vicinity of the substrate to modify a surface. Note that instead of an argon atmosphere, a nitrogen atmosphere, a helium atmosphere, an oxygen atmosphere, or the like may be used.

As an oxide semiconductor used for the oxide semiconductor layer2530, an oxide semiconductor described in Embodiment 4, such as a four-component metal oxide, a three-component metal oxide, a two-component metal oxide, or a single-component metal oxide such as an In—O-based metal oxide, a Sn—O-based metal oxide, or a Zn—O-based metal oxide can be used. Further, SiO2may be contained in the above oxide semiconductor. In this embodiment, the oxide semiconductor layer2530is formed by a sputtering method with the use of an In—Ga—Zn—O-based oxide target. A cross-sectional view at this stage corresponds toFIG. 8A. Alternatively, the oxide semiconductor layer2530can be formed by a sputtering method in a rare gas (typically, argon) atmosphere, an oxygen atmosphere, or a mixed atmosphere containing a rare gas and oxygen.

As a target for forming the oxide semiconductor layer2530by a sputtering method, for example, a target having a composition ratio of In2O3:Ga2O3:ZnO=1:1:1 [molar ratio] (that is, In:Ga:Zn=1:1:0.5 [atomic ratio]) can be used. Alternatively, a target having a composition ratio of In2O3:Ga2O3:ZnO=1:1:2 [molar ratio], In2O3:Ga2O3:ZnO=2:2:1 [molar ratio], or In2O3:Ga2O3:ZnO=1:1:4 [molar ratio] may be used. Further alternatively, a target having a composition ratio of In2O3:Ga2O3:ZnO=2:0:1 [molar ratio] may be used.

When an In—Zn—O-based material is used as the oxide semiconductor, a target to be used has a composition ratio of In:Zn=50:1 to 1:2 in an atomic ratio (In2O3:ZnO=25:1 to 1:4 in a molar ratio), preferably In:Zn=20:1 to 1:1 in an atomic ratio (In2O3:ZnO=10:1 to 1:2 in a molar ratio), more preferably In:Zn=15:1 to 1.5:1 in an atomic ratio (In2O3:ZnO=15:2 to 3:4 in a molar ratio). For example, in a target used for formation of an In—Zn—O-based oxide semiconductor which has an atomic ratio of In:Zn:O=X:Y:Z, an inequality of Z>1.5X+Y is satisfied.

The filling rate of such a target is higher than or equal to 90% and lower than or equal to 100%, preferably higher than or equal to 95% and lower than or equal to 99.9%. With the use of the metal oxide target with high filling rate, the deposited oxide semiconductor layer has high density.

It is preferable that a high-purity gas from which impurities such as hydrogen, water, hydroxyl, and hydride are removed be used as a sputtering gas for the deposition of the oxide semiconductor layer2530.

The substrate is held in a deposition chamber under reduced pressure, and the substrate temperature is set to higher than or equal to 100° C. and lower than or equal to 600° C., preferably higher than or equal to 200° C. and lower than or equal to 400° C. Deposition is performed while the substrate is heated, whereby the impurity concentration in the oxide semiconductor layer formed can be reduced. Moreover, damage to the oxide semiconductor layer due to sputtering is reduced. The oxide semiconductor layer2530is formed over the substrate2505in such a manner that a sputtering gas from which hydrogen and moisture have been removed is introduced into the deposition chamber while moisture remaining therein is removed, and the above-described target is used. In order to remove moisture remaining in the deposition chamber, an entrapment vacuum pump, for example, a cryopump, an ion pump, or a titanium sublimation pump is preferably used. Further, an evacuation unit may be a turbo molecular pump provided with a cold trap. In the deposition chamber which is evacuated with the cryopump, a hydrogen atom, a compound containing a hydrogen atom such as water (H2O), (more preferably, also a compound containing a carbon atom), and the like are removed, whereby the impurity concentration in the oxide semiconductor layer formed in the deposition chamber can be reduced.

As one example of the deposition condition, the distance between the substrate and the target is 100 mm, the pressure is 0.6 Pa, the direct-current (DC) power is 0.5 kW, and the atmosphere is an oxygen atmosphere (the proportion of the oxygen flow rate is 100%). Note that a pulse direct-current power supply is preferable because powder substances (also referred to as particles or dust) generated in deposition can be reduced and the film thickness can be uniform.

Then, the oxide semiconductor layer2530is processed into an island-shaped oxide semiconductor layer by a second photolithography step and an etching step. A resist mask for forming the island-shaped oxide semiconductor layer may be formed by an inkjet method. Formation of the resist mask by an inkjet method needs no photomask; thus, manufacturing cost can be reduced.

In the case where a contact hole is formed in the gate insulating layer2507, the formation of the contact hole can be performed at the same time as processing of the oxide semiconductor layer2530.

Note that the etching of the oxide semiconductor layer2530may be dry etching, wet etching, or both dry etching and wet etching. As an etchant used for wet etching of the oxide semiconductor layer2530, for example, a mixed solution of phosphoric acid, acetic acid, and nitric acid, ITO-07N (produced by KANTO CHEMICAL CO., INC.), or the like can be used.

Next, the oxide semiconductor layer is subjected to first heat treatment. The oxide semiconductor layer can be dehydrated or dehydrogenated by this first heat treatment. The first heat treatment is performed at a temperature higher than or equal to 400° C. and lower than or equal to 750° C., alternatively, higher than or equal to 400° C. and lower than the strain point of the substrate in an atmosphere of nitrogen or a rare gas such as helium, neon, or argon. Here, the substrate is introduced into an electric furnace which is one of heat treatment apparatuses, and heat treatment is performed on the oxide semiconductor layer at 450° C. for 1 hour in a nitrogen atmosphere; thus, a dehydrated or dehydrogenated oxide semiconductor layer2531is formed (seeFIG. 8B).

Note that a heat treatment apparatus is not limited to an electric furnace, and may be provided with a device for heating an object to be processed by heat conduction or heat radiation from a heating element such as a resistance heating element. For example, a rapid thermal annealing (RTA) apparatus such as a gas rapid thermal annealing (GRTA) apparatus or a lamp rapid thermal annealing (LRTA) apparatus can be used. An LRTA apparatus is an apparatus for heating an object to be processed by radiation of light (an electromagnetic wave) emitted from a lamp such as a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high pressure sodium lamp, or a high pressure mercury lamp. A GRTA apparatus is an apparatus for heat treatment using a high-temperature gas. As the high temperature gas, an inert gas which does not react with an object to be processed by heat treatment, such as nitrogen or a rare gas like argon, is used.

For example, as the first heat treatment, GRTA by which the substrate is moved into an inert gas heated at a temperature of 650° C. to 700° C. inclusive, heated for several minutes, and moved out of the inert gas heated to the high temperature may be performed.

Note that in the first heat treatment, it is preferable that water, hydrogen, and the like be not contained in an inert gas which is introduced into the heat treatment apparatus. Alternatively, the purity of the inert gas is preferably 6N (99.9999%) or higher, preferably 7N (99.99999%) or higher (that is, the impurity concentration is 1 ppm or lower, preferably 0.1 ppm or lower).

Further, after the oxide semiconductor layer is heated through the first heat treatment, a high-purity oxygen gas, a high-purity N2O gas, or an ultra-dry air (the dew point is lower than or equal to −40° C., preferably lower than or equal to −60° C.) may be introduced into the same furnace. The purity of an oxygen gas or an N2O gas which is introduced into the heat treatment apparatus is preferably 6N or higher, more preferably 7N or higher (that is, the impurity concentration in the oxygen gas or the N2O gas is 1 ppm or lower, preferably 0.1 ppm or lower). It is preferable that water, hydrogen, and the like be not contained in these gases in particular. By the action of the oxygen gas or the N2O gas, oxygen which is a main component of the oxide semiconductor and which has been eliminated at the same time as the step for removing impurities by dehydration or dehydrogenation can be supplied. Through this step, the oxide semiconductor layer can be highly purified and made to be an electrically i-type (intrinsic) oxide semiconductor.

The first heat treatment for the oxide semiconductor layer can be performed on the oxide semiconductor layer2530that has not been processed into the island-shaped oxide semiconductor layer. In that case, the substrate is taken out of the heat treatment apparatus after the first heat treatment, and then a photolithography step is performed.

Note that the first heat treatment may be performed at any of the following timings in addition to the above timing as long as it is performed after deposition of the oxide semiconductor layer: after the source electrode layer and the drain electrode layer are formed over the oxide semiconductor layer; and after the insulating layer is formed over the source electrode layer and the drain electrode layer.

Further, in the case where a contact hole is formed in the gate insulating layer2507, the formation of the contact hole may be performed either before or after the first heat treatment is performed on the oxide semiconductor layer2530.

Further, an oxide semiconductor layer formed in the following manner may also be used: an oxide semiconductor is deposited twice, and heat treatment is performed thereon twice. Through such steps, a crystal region (a single crystal region) which is c-axis-aligned perpendicularly to a surface of the film and has a large thickness can be formed without depending on a base component.

For example, a first oxide semiconductor layer with a thickness of greater than or equal to 3 nm and less than or equal to 15 nm is deposited, and first heat treatment is performed in a nitrogen atmosphere, an oxygen atmosphere, a rare gas atmosphere, or a dry air atmosphere at a temperature higher than or equal to 450° C. and lower than or equal to 850° C., preferably higher than or equal to 550° C. and lower than or equal to 750° C., so that a first oxide semiconductor layer having a crystal region (including a plate-like crystal) in a region including a surface is formed. Then, a second oxide semiconductor layer which has a larger thickness than the first oxide semiconductor layer is formed, and second heat treatment is performed at a temperature higher than or equal to 450° C. and lower than or equal to 850° C., preferably higher than or equal to 600° C. and lower than or equal to 700° C.

Through such steps, in the entire second oxide semiconductor layer, crystal growth can proceed from the lower part to the upper part using the first oxide semiconductor layer as a seed crystal, whereby an oxide semiconductor layer having a thick crystal region can be formed.

Next, a conductive layer to be the source electrode layer and the drain electrode layer (including a wiring layer formed using the same layer as the source and drain electrode layers) is formed over the gate insulating layer2507and the oxide semiconductor layer2531. As the conductive layer serving as the source and drain electrode layers, a material similar to that used for the source electrode layer2405aand the drain electrode layer2405bwhich is described in Embodiment 4 can be used.

A resist mask is formed over the conductive layer in a third photolithography step and selective etching is performed, so that the source electrode layer2515aand the drain electrode layer2515bare formed. Then, the resist mask is removed (see FIG.8C).

Light exposure at the time of the formation of the resist mask in the third photolithography step may be performed using ultraviolet light, KrF laser light, or ArF laser light. The channel length L of the transistor that is formed later is determined by a distance between bottom end portions of the source electrode layer and the drain electrode layer, which are adjacent to each other over the oxide semiconductor layer2531. In the case where the channel length L is less than 25 nm, the light exposure at the time of the formation of the resist mask in the third photolithography step may be performed using extreme ultraviolet light having an extremely short wavelength of several nanometers to several tens of nanometers. Light exposure with extreme ultraviolet light leads to a high resolution and a large depth of focus. Thus, the channel length L of the transistor to be formed later can be greater than or equal to 10 nm and less than or equal to 1000 nm and the operation speed of a circuit can be increased, and furthermore the off-state current value is extremely small, and thus lower power consumption can be achieved.

In order to reduce the number of photomasks and steps in the photolithography step, the etching step may be performed using a resist mask formed by a multi-tone mask. Since light which passes through the multi-tone mask has a plurality of intensity levels, a resist mask which partly has a different thickness can be formed. The resist mask can be changed in shape by ashing; therefore, a resist mask with different shapes can be formed without a photolithography step being performed. Thus, the number of light-exposure masks can be reduced and the number of corresponding photolithography steps can also be reduced, whereby simplification of a process can be realized.

Note that it is preferable that etching conditions be optimized so as not to etch and divide the oxide semiconductor layer2531when the conductive layer is etched. However, it is difficult to obtain etching conditions in which only the conductive layer is etched and the oxide semiconductor layer2531is not etched at all. In some cases, only part of the oxide semiconductor layer2531is etched to be an oxide semiconductor layer having a groove portion (a recessed portion) when the conductive layer is etched.

In this embodiment, a Ti layer is used as the conductive layer and an In—Ga—Zn—O-based oxide semiconductor is used as the oxide semiconductor layer2531; thus, an ammonia peroxide mixture (a solution in which hydrogen peroxide water of 31 wt %, ammonia water of 28 wt %, and water are mixed at a volume ratio of 2:1:1) may be used as an etchant for etching the conductive layer.

Next, the insulating layer2516serving as a protective insulating layer is formed in contact with part of the oxide semiconductor layer. Before the formation of the insulating layer2516, plasma treatment using a gas such as N2O, N2, or Ar may be performed to remove water or the like adsorbed on an exposed surface of the oxide semiconductor layer.

The insulating layer2516can be formed to a thickness of at least 1 nm by a method through which impurities such as water and hydrogen do not enter the insulating layer2516, such as a sputtering method, as appropriate. When hydrogen is contained in the insulating layer2516, hydrogen might enter the oxide semiconductor layer or oxygen might be extracted from the oxide semiconductor layer by hydrogen. In such a case, the resistance of the oxide semiconductor layer on the backchannel side might be decreased (the oxide semiconductor layer on the backchannel side might have n-type conductivity) and a parasitic channel might be formed. Therefore, it is important to form the insulating layer2516by a method through which hydrogen and impurities containing hydrogen are not contained therein.

Note that a gallium oxide layer may be formed instead of the insulating layer2516or formed between the insulating layer2516and the oxide semiconductor layer, so as to be in contact with part of the oxide semiconductor layer. Gallium oxide is a material which is hardly charged; therefore, variation in threshold voltage due to charge buildup of the insulating layer can be suppressed.

In this embodiment, a silicon oxide layer is formed to a thickness of 200 nm as the insulating layer2516by a sputtering method. The substrate temperature in deposition may be higher than or equal to room temperature and lower than or equal to 300° C. and in this embodiment, is 100° C. The silicon oxide layer can be formed by a sputtering method in a rare gas (typically, argon) atmosphere, an oxygen atmosphere, or a mixed atmosphere containing a rare gas and oxygen. As a target, a silicon oxide target or a silicon target can be used. For example, the silicon oxide layer can be formed using a silicon target by a sputtering method in an atmosphere containing oxygen. For the insulating layer2516which is formed in contact with the oxide semiconductor layer, an inorganic insulating layer that hardly contains impurities such as moisture, a hydrogen ion, and hydroxyl and that blocks entry of such impurities from the outside is preferably used. Typically, a silicon oxide layer, a silicon oxynitride layer, an aluminum oxide layer, an aluminum oxynitride layer, or the like can be used.

In order to remove moisture remaining in the deposition chamber of the insulating layer2516at the same time as deposition of the oxide semiconductor layer2530, an entrapment vacuum pump (such as a cryopump) is preferably used. When the insulating layer2516is deposited in the deposition chamber evacuated using a cryopump, the impurity concentration in the insulating layer2516can be reduced. In addition, as an evacuation unit for removing moisture remaining in the deposition chamber of the insulating layer2516, a turbo molecular pump provided with a cold trap may be used.

It is preferable that a high-purity gas from which impurities such as hydrogen, water, hydroxyl, and hydride is removed be used as the sputtering gas for the deposition of the insulating layer2516.

Next, second heat treatment (preferably at higher than or equal to 200° C. and lower than or equal to 400° C., for example, higher than or equal to 250° C. and lower than or equal to 350° C.) is performed in an inert gas atmosphere or an oxygen gas atmosphere. For example, the second heat treatment is performed at 250° C. for 1 hour in a nitrogen atmosphere. In the second heat treatment, part of the oxide semiconductor layer (a channel formation region) is heated in the state where it is in contact with the insulating layer2516.

Through the above steps, oxygen which is one of main components of an oxide semiconductor and which is reduced together with impurities such as hydrogen, moisture, hydroxyl, and hydride (also referred to as a hydrogen compound) through the first heat treatment performed on the oxide semiconductor layer can be supplied. Thus, the oxide semiconductor layer is highly purified and is made to be an electrically i-type (intrinsic) semiconductor.

Through the above steps, the transistor2510is formed (seeFIG. 8D).

When a silicon oxide layer having a lot of defects is used as the oxide insulating layer, impurities such as hydrogen, moisture, hydroxyl, or hydride contained in the oxide semiconductor layer can be diffused into the silicon oxide layer through the heat treatment performed after the silicon oxide layer is formed. That is, the impurities contained in the oxide semiconductor layer can be further reduced.

A protective insulating layer2506may be further formed over the insulating layer2516. For example, a silicon nitride layer is formed by a sputtering method. An inorganic insulating layer which hardly contains impurities such as moisture and can prevent entry of the impurities from the outside, such as a silicon nitride layer or an aluminum nitride layer, is preferably used as the protective insulating layer. In this embodiment, a silicon nitride layer is used as the protective insulating layer2506(seeFIG. 8E).

A silicon nitride layer used as the protective insulating layer2506is formed in such a manner that the substrate2505over which layers up to the insulating layer2516are formed is heated to higher than or equal to 100° C. and lower than or equal to 400° C., a sputtering gas containing high-purity nitrogen from which hydrogen and water are removed is introduced, and a target of silicon is used. In that case also, the protective insulating layer2506is preferably formed while moisture remaining in the treatment chamber is removed, similarly to the insulating layer2516.

After the protective insulating layer is formed, heat treatment may be further performed at higher than or equal to 100° C. and lower than or equal to 200° C. for longer than or equal to 1 hour and shorter than or equal to 30 hours in air. This heat treatment may be performed at a fixed heating temperature. Alternatively, the following change in temperature is set as one cycle and may be repeated plural times: the temperature is increased from room temperature to a heating temperature and then decreased to room temperature.

As described above, with the use of the transistor including a highly purified oxide semiconductor in the channel formation region which is manufactured using this embodiment, the current value in an off state (off-state current value) can be further reduced.

In addition, since the transistor including a highly purified oxide semiconductor in the channel formation region has high field-effect mobility, high-speed operation is possible. Thus, a driver circuit for which high-speed operation is required, such as the potential detecting circuit310, the switch control circuit311, or the high-frequency wave supply circuit308can be formed over the same substrate as the switch303; therefore, the number of components can be reduced.

In this embodiment, application examples of the power supply device shown in any of the above embodiments will be described with reference toFIGS. 9A and 9B.

FIG. 9Ashows an example in which the power supply device including power feeding cells8110arranged in a matrix is provided on a table8100. The power supply device is not necessarily provided over the uppermost part of a top plate and can be provided inside the top plate or in the lower portion of the top plate. That is, the power supply device can be provided without marring the appearance of the table8100.

A table lamp8120placed on the table8100includes the power receiving device. Power transmitted from the power supply device is received by the power receiving device, so that the lamp can be lighted. Since the power feeding cells8110are provided over the whole top plate of the table8100, when the table lamp8120is placed in any place on the top plate, the lamp can be lighted without consideration of a power supply cord.

When a mobile phone8210including the power receiving device is placed on the table8100, a built-in battery of the mobile phone8210can be charged without providing an electrical contact. The mobile phone8210can easily have a waterproof function or the like because an electrical contact is not necessarily provided for the mobile phone8210.

FIG. 9Bshows an example in which the power supply device including power feeding cells8310arranged in a matrix is placed on a wall8300and a floor8350. Since the power supply device can be provided inside the wall or the floor, the power supply device can be provided without marring the appearance of the wall or the floor.

A television8320placed on the wall8300includes the power receiving device. Power transmitted from the power supply device placed in the wall8300is received by the power receiving device, so that an image can be displayed. By providing the power supply device in the whole wall8300, the television8320can be placed on an arbitrary place of the wall8300without consideration of a power supply cord.

A laptop computer8370placed on the floor8350includes the power receiving device. Power transmitted from the power supply device is received by the power receiving device, so that the laptop computer8370can operate and a built-in battery can be charged. By providing the power supply device on the whole floor8350, the laptop computer8370can operate on an arbitrary place of the floor8350without consideration of a power supply cord.

This application is based on Japanese Patent Application serial no. 2010-083153 filed with Japan Patent Office on Mar. 31, 2010, the entire contents of which are hereby incorporated by reference.