Circuits, architectures, apparatuses, systems, algorithms and methods and software for automatic gain calibration of a burst signal stream

Apparatuses, circuitry, architectures, systems, methods, algorithms and software for performing automatic gain calibration on an input signal. The apparatuses and/or circuits generally include an amplifier, a filter, a comparator, and a controller. The amplifier is configured to receive a gain level signal and to amplify the input signal in accordance with the gain level signal to produce an amplified signal. The filter is configured to filter the amplified signal to produce a filtered signal. The comparator is configured to compare the filtered output to a threshold value and to produce a comparison signal in response thereto. The controller is configured to iteratively reset the filter and adjust the gain level signal in response to the comparison signal to select a gain level. Embodiments of present invention advantageously provide for rapid automatic gain control, and are particularly advantageous for automatic gain control in systems adapted for input signals with bursting data and/or widely varying input amplitudes and/or in systems with a relatively large number of possible gain levels.

FIELD OF THE INVENTION

The present invention generally relates to the field of automatic gain calibration (AGC). More specifically, embodiments of the present invention pertain to circuits, architectures, systems, methods, algorithms and software for AGC of a burst signal stream.

BACKGROUND

Magnetic storage systems, such as hard disk drives (HDDs), are used as mass storage in a wide variety of devices, including but not limited to personal computers, digital versatile disc (DVD) players, high definition television (HDTV) receivers, vehicle control systems, cellular or mobile telephones, television set top boxes, and portable media players. As these magnetic storage systems become smaller and/or attain higher data storage capacities, the density of data on the magnetic storage medium becomes higher.

A typical HDD includes magnetic storage media of one or more flat disks, called platters (sometimes also “disks” or “discs”). The platters are generally formed of two main substances: a substrate material that gives it structure and rigidity, and a magnetic media coating which holds the magnetic impulses (or moments) that represent data. A typical HDD further includes a read/write head, generally a magnetic transducer which can sense and/or change the magnetic fields stored on the platters. The read/write head is attached to a slider, generally an armature capable of placing the read/write head at a desired location over the platter.

Modern HDDs also include a variety of circuits for controlling the drive hardware, processing the signals read from and/or written to the disks, processing input and/or output from the drive, etc. A drive may have one or more integrated circuit devices or other devices to handle one or more of these operations. In many cases, a single HDD component such as a standardized and/or reusable integrated circuit device, combination of devices (e.g., a “chip set”), function block (e.g., an “IP core” which may be integrated into another integrated circuit device), etc., may be used in multiple different HDD designs. Thus, it is desirable for HDD components to be designed to accommodate a wide variety of operational specifications.

One common component in HDD designs is the preamplifier, which generally amplifies the signal from the read/write head(s) to a level usable by other HDD components (e.g., read channel components). The strength of the magnetic fields stored on magnetic storage media may vary widely. For example, as the density of data on a magnetic storage medium increases, the strength of the magnetic fields generally decrease, in order to minimize interference. Thus, the strength of the signal produced by the read/write head may also vary considerably depending on the size and/or capacity (and thus the areal density) of the magnetic storage medium. For example, the amplitude of data signals provided to a preamplifier in a HDD presently range from about 3 mV to about 30 mV. Because of the high variation in input signal, it is desirable for reusable preamplifiers and/or preamplifier components to be able to set the gain to an appropriate level such that the output signal is relatively constant, despite drive to drive variations in the strength of the input signal.

Automatic gain control (AGC) is typically performed at system startup (e.g., after an HDD is turned on and the disks have been “spun up” to a desired rotational velocity) to determine the appropriate gain level.FIG. 1shows an exemplary input signal100that may be used to perform AGC. Input signal100includes signal bursts101-107, separated by noise periods111-116. In many HDD systems, the amplitude of noise in the system may be as much as ⅓rdof the amplitude of the signal. Furthermore, signal bursts may comprise as little as 5% of the signal time. For example, whileFIG. 1is not drawn to scale, signal bursts101-107may each have a duration130of 4 μs, while the period from the start of one signal burst (e.g., signal burst101) to the start of the next signal burst (e.g., signal burst102) may be 80 μs.

It is desirable to minimize the amount of time required for AGC. In many systems, AGC is performed during a predetermined detection window. For example, inFIG. 1detection window120has a duration of 500 μs. One known method for detecting the optimal gain setting is to perform a binary search by setting the gain to a first gain level for at least one signal burst and comparing the amplified signal to a desired or threshold level. However, in many cases no additional gating or timing signal is available to synchronize with the burst signals. Therefore each comparison window (e.g., comparison windows121-123) may need to be long enough to cover at least two bursts in order to ensure that the window includes at least one complete burst. Thus, AGC detection window120only has enough time for three comparison windows121-123. As a result, a binary search can only select from eight (23) possible gain levels.

In many cases, eight possible gain levels are insufficient to encompass the range of gain levels that may be used in modern magnetic storage systems. Therefore, it is desirable to provide automatic gain control in systems adapted for input signals with bursting data and/or widely varying input amplitudes and/or in systems with a relatively large number of possible gain levels, without increasing the duration of the AGC detection window.

SUMMARY

Embodiments of the present disclosure relate to apparatuses, circuitry, architectures, systems, methods, algorithms and software for performing automatic gain calibration on an input signal. The apparatuses and/or circuits generally include an amplifier, a filter, a comparator, and a controller. The amplifier is configured to receive a gain level signal and to amplify the input signal in accordance with the gain level signal to produce an amplified signal. The filter is configured to filter the amplified signal to produce a filtered signal. The comparator is configured to compare the filtered output to a threshold value and to produce a comparison signal in response thereto. The controller is configured to reset the filter and adjust the gain level signal in response to the comparison signal.

In some embodiments, the gain signal comprises a digital value corresponding to a gain setting. For example, the gain signal may be 3 bits, 4 bits, or larger. Thus, the gain signal may have one of 8 (23), 16 (24), or more values. Embodiments may be configured to obtain a preferred gain level by iteratively changing the gain level signal until the filtered signal remains below the threshold. In an exemplary embodiment, the filter may be configured to increase a value of the filtered signal in response to an amplitude of the amplified signal. For example, the controller may be configured to set the gain level signal to a first gain value in response to an AGC start signal, set the gain level signal to a new gain value in response to the comparison signal, and store a current value of the gain level signal in response to an AGC stop signal.

The filtered signal may, for example, comprise a DC value (e.g., a voltage across a capacitor). In a further embodiment, the filter comprises a rectifier configured to rectify the amplified signal, and may also include an accumulator configured to increase the filtered signal in response to an output of the rectifier.

The methods for automatic gain calibration of an input signal generally include steps of amplifying the input signal according to a gain level input to produce an amplified signal, filtering the amplified output to produce a filtered signal, and, adjusting the gain level signal and resetting the filter signal when the filter output exceeds a threshold value.

Exemplary embodiments of the method may include comparing the filtered signal to the threshold value to produce a comparison signal. In a further embodiment, the method includes adjusting the gain level signal and resetting the filter signal in response to the comparison signal. For example, the method may include setting the gain level signal to a first gain value in response to an AGC start signal, setting the gain level signal to a new gain value in response to the comparison signal, and storing a current value of the gain level signal in response to an AGC stop signal.

In another embodiment, filtering the amplified signal comprises changing a value of the filtered signal in response to an amplitude of the amplified signal. For example, the filtered signal may comprise a DC voltage and filtering the amplified signal may comprise charging a capacitor in response to an amplitude of the amplified signal (e.g., by applying the amplified signal or a derivative thereof to the capacitor).

In still another embodiment, the method includes repeating the adjusting of the gain level signal for a predetermined time interval and selecting a final gain level at the end of the interval. In one embodiment, for example, the predetermined time interval is approximately 500 μs. Embodiments of the present invention may be used to select a gain level from a relatively wide selection of gain intervals. As a result, embodiments of the present invention may be used in systems where the input signal may have a wide range of amplitudes. For example, in some embodiments the amplitude of the input signal may range from approximately 3 mV to 30 mV. In addition, embodiments may be used where the input signal includes bursts of data between periods of noise and/or no signal.

The architectures and/or systems generally comprise those that include a circuit embodying one or more of the inventive concepts disclosed herein. For example, embodiments of the apparatus and/or circuit may include preamplifiers and/or other control and/or signal processing circuits for a magnetic data storage system that include a circuit embodying one or more of the inventive concepts disclosed herein. The circuits may be implemented in one or more integrated circuit devices.

Embodiments of the present invention may also include, for example, hard disk drives including a preamplifier (e.g., a preamplifier including one or more circuits and/or devices and/or implementing one or more of the methods presented herein), a read/write head configured to produce the input signal as it passes over a magnetic storage medium, and/or a read-channel circuit configured to receive an output of the preamplifier circuit.

Embodiments of present invention advantageously provide for rapid automatic gain control. The embodiments are particularly advantageous for automatic gain control in systems adapted for input signals with bursting data and/or widely varying input amplitudes and/or in systems with a relatively large number of possible gain levels.

These and other advantages of the present invention will become readily apparent from the detailed description of embodiments below.

DETAILED DESCRIPTION

Some portions of the detailed descriptions which follow are presented in terms of processes, procedures, logic blocks, functional blocks, processing, and other symbolic representations of operations on data bits, data streams or waveforms within a computer, processor, controller and/or memory. These descriptions and representations are generally used by those skilled in the data processing arts to effectively convey the substance of their work to others skilled in the art. A process, procedure, logic block, function, operation, etc., is herein, and is generally, considered to be a self-consistent sequence of steps or instructions leading to a desired and/or expected result. The steps generally include physical manipulations of physical quantities. Usually, though not necessarily, these quantities take the form of electrical, magnetic, optical, or quantum signals capable of being stored, transferred, combined, compared, and otherwise manipulated in a computer, data processing system, or logic circuit. It has proven convenient at times, principally for reasons of common usage, to refer to these signals as bits, waves, waveforms, streams, values, elements, symbols, characters, terms, numbers, or the like.

It should be borne in mind, however, that all of these and similar terms are associated with the appropriate physical quantities and are merely convenient labels applied to these quantities. Unless specifically stated otherwise and/or as is apparent from the following discussions, it is appreciated that throughout the present application, discussions utilizing terms such as “processing,” “operating,” “computing,” “calculating,” “determining,” “manipulating,” “transforming,” “displaying” or the like, refer to the action and processes of a computer, data processing system, logic circuit or similar processing device (e.g., an electrical, optical, or quantum computing or processing device), that manipulates and transforms data represented as physical (e.g., electronic) quantities. The terms refer to actions, operations and/or processes of the processing devices that manipulate or transform physical quantities within the component(s) of a system or architecture (e.g., registers, memories, other such information storage, transmission or display devices, etc.) into other data similarly represented as physical quantities within other components of the same or a different system or architecture.

Furthermore, for the sake of convenience and simplicity, the terms “clock,” “time,” “rate,” “period” and “frequency” are generally used interchangeably herein, but are generally given their art-recognized meanings. Also, for convenience and simplicity, the terms “data,” “data stream,” “waveform” and “information” may be used interchangeably, as may the terms “connected to,” “coupled with,” “coupled to,” and “in communication with” (which terms also refer to direct and/or indirect relationships between the connected, coupled and/or communication elements unless the context of the term's use unambiguously indicates otherwise), but these terms are also generally given their art-recognized meanings.

The invention, in its various aspects, will be explained in greater detail below with regard to exemplary embodiments.

An Exemplary Circuit

FIG. 2shows an exemplary AGC circuit200. Circuit200includes an amplifier210, a filter220, a comparator230, and a controller240. Amplifier210is configured to receive a gain level signal241from controller240and to amplify the input signal201(e.g., a signal from a read/write had assembly in a hard disk drive or any other input signal) in accordance with the gain level signal241to produce an amplified signal211. Filter220filters the amplified signal211to produce filtered signal225. The comparator is configured to compare the filtered output to a threshold value202and to produce comparison signal231. Controller240is configured to reset the filter220and adjust the gain level signal241in response to comparison signal231.

Filter220may be configured to increase a value of filtered signal225in response to an amplitude of the amplified signal or a derivative thereof. In an exemplary embodiment, filter220may include a diode221to rectify amplified signal211, thereby charging capacitor222in proportion to the amplitude of amplified signal211. Thus, filtered output225may comprise a DC voltage (e.g., the voltage across capacitor222). Comparator230may then compare the voltage of filtered signal225to the threshold value202. Thus, comparator230may send a comparison signal231(e.g., as an edge, pulse, or other signal recognizable by controller240) whenever the voltage of filtered signal225exceeds (or, depending on the implementation, falls below) threshold value202.

Gain level signal241may comprise a digital value corresponding to a gain setting. For example, gain signal241may be 3 bits, 4 bits, or larger. Thus, the gain signal may have one of 8 (23), 16 (24), or more values. Controller240may be configured to obtain a preferred gain level by iteratively changing the gain level signal241until the filtered signal225remains below the value of threshold signal202. For example, the controller may be configured to set the gain level signal241to a first gain value in response to an AGC start signal, set the gain level signal241to a new gain value in response to the comparison signal, and store a current value of the gain level signal241in response to an AGC stop signal.

Referring now toFIG. 3, exemplary waveforms during an AGC cycle are shown. Waveform300represents an exemplary input waveform having signal bursts301and302. Waveform310represents an exemplary filtered output signal (e.g., signal225). Waveform350represents an AGC control signal. Controller240ofFIG. 2, for example, may be configured to perform AGC in response to the AGC control signal (e.g., to perform AGC while waveform350is “high”). During ramp-up period311of waveform310, gain level signal241may be set to a first value G0. In this exemplary embodiment, G0is the highest available gain setting. Thus, if gain level signal241is a 4-bit binary value, then G0=15.

In this example, gain level G0causes the noise in waveform300to be amplified enough that the filtered output reaches threshold320. As a result, controller240resets filtered output225(shown as waveform310), and sets the gain level to a next-lower level G1(e.g., G1=14). For example, controller240may reset filtered output225by closing switch223configured to receive a signal242from controller240to discharge capacitor222. The cycle is repeated until the amplified pulses are no longer saturating the filter (e.g., the amplified pulses are not strong enough to push filtered output signal310above threshold320). The filtered output310generally saturates more quickly during a signal pulse (e.g., ramp-up periods313-315). Furthermore, at lower gain levels noise in waveform300will not saturate the filtered output (e.g., during ramp-up period316between signal pulses301and32). Thus, when an AGC apparatus according to the present embodiments gets close to the desired gain level, the apparatus effectively waits for the next signal burst to resume the search for the desired gain level.

Referring again toFIG. 1, detection window120has a duration of 500 μs. In some AGC methods, a binary search may be performed by setting the gain to a first gain level for at least one signal burst and comparing the amplified signal to a desired or threshold level. However, in many cases no additional gating or timing signal is available to synchronize with the burst signals. Therefore each comparison window (e.g., comparison windows121-123) may need to be long enough to cover at least two bursts in order to ensure that the window includes at least one complete burst. Thus, AGC detection window120only has enough time for three comparison windows121-123. As a result, a binary search can only select from eight (23) possible gain levels. In contrast, the present embodiments do not need to divide the AGC window into smaller windows. The number of possible gain settings is generally limited only by the total duration of the signal bursts during the AGC window and by the ramping speed and/or sensitivity of the filter.

Embodiments of the apparatus and/or circuit may include preamplifiers and/or other control and/or signal processing circuits for a magnetic data storage system that include a circuit embodying one or more of the inventive concepts disclosed herein. The circuits may be implemented in one or more integrated circuit devices. It is well within the abilities of one skilled in the art to design and use logic and/or other circuit elements to implement the components and operations disclosed herein.

An Exemplary Method

FIG. 4shows a flow chart of an exemplary method400for automatic gain calibration of an input signal. At step401, a first gain level is set and at step410the input signal is amplified according to the gain level. At step411, the amplified signal is filtered to produce a filtered signal. At step412, the filtered signal is compared to the threshold value. If the filtered output is above the threshold, then the filtered output is rest at step420and the gain level is adjusted at step421. Steps410-412are then repeated for the new gain level. While the filtered output remains below the threshold, steps410-430are repeated at the same gain level until step430determines that the AGC window is closed (e.g., at “AGC timeout”). When the AGC windows is closed, the AGC is locked on to the current gain level (e.g., the last gain level set in step401or step421) at step431.

Step412may include producing a comparison signal (e.g., comparison signal231) in response to the comparison. Thus, step420may include resetting the filter signal in response to the comparison signal, and step421may include adjusting the gain level signal and resetting in response to the comparison signal. Furthermore, step401may include setting the gain level signal to a first gain value in response to an AGC start signal (e.g., in response to the rising edge of AGC control waveform350), step430may include detecting an AGC end signal (e.g., the falling edge of AGC control waveform350), and step432may include storing the current value of the gain level signal in response to the AGC stop signal.

In some embodiments, step411may include changing a value of the filtered signal in response to an amplitude of the amplified signal. For example, the filtered signal may comprise a DC voltage and filtering the amplified signal may comprise charging a capacitor in response to an amplitude of the amplified signal (e.g., by applying the amplified signal or a derivative thereof to the capacitor).

In an exemplary embodiment, the AGC window is approximately 500 μs. However, it will be recognized that longer or shorter AGC windows may be selected based on the expected characteristics of the calibration input signal. Embodiments of the present method may be used to select a gain level from a relatively wide selection of gain intervals. As a result, embodiments of the present invention may be used in systems where the input signal may have a wide range of amplitudes. For example, in some embodiments the amplitude of the input signal may range from approximately 3 mV to 30 mV. In addition, embodiments may be used where the input signal includes bursts of data between periods of noise and/or no signal (e.g., as described with respect toFIG. 3herein).

Exemplary Software

Embodiments of the present invention also includes algorithms, computer program(s) and/or software, implementable and/or executable in a general purpose computer or workstation equipped with a conventional digital signal processor, configured to perform one or more steps of the method and/or one or more operations of the hardware. Thus, a further aspect of the invention relates to algorithms and/or software that implement the above method(s). For example, embodiments of the invention may further relate to a computer program, computer-readable medium, and/or waveform containing a set of instructions which, when executed by an appropriate processing device (e.g., a signal processing device, such as a microcontroller, microprocessor or DSP device), is configured to perform the above-described method and/or algorithm.

The computer program may be on any kind of readable medium, and the computer-readable medium may comprise any medium that can be read by a processing device configured to read the medium and execute code stored thereon or therein, such as a floppy disk, CD-ROM, magnetic tape or hard disk drive. Such code may comprise object code, source code and/or binary code.

The waveform is generally configured for transmission through an appropriate medium, such as copper wire, a conventional twisted pair wireline, a conventional network cable, a conventional optical data transmission cable, or even air or a vacuum (e.g., outer space) for wireless signal transmissions. The waveform and/or code for implementing the present method(s) are generally digital, and are generally configured for processing by a conventional digital data processor (e.g., a microprocessor, microcontroller, or logic circuit such as a programmable gate array, programmable logic circuit/device or application-specific [integrated] circuit).

Embodiments of the present invention may also include computer-readable media having computer-executable instructions for forming circuits according to the present invention.

Such embodiments may include circuit descriptions, netlists, etc. Such embodiments may also include software and/or firmware for arranging existing circuit elements (e.g., components in a programmable gate array, programmable logic circuit/device or application-specific [integrated] circuit, etc.) in accordance with the circuits and/or operations described herein.

Exemplary Systems

Various exemplary implementations of the present invention are shown inFIGS. 5A-5G. Referring now toFIG. 5A, embodiments of the present invention can be implemented in a hard disk drive (HDD)500. Embodiments of the present invention may implement either or both signal processing and/or control circuits, which are generally identified inFIG. 5Aat502. In some implementations, the signal processing and/or control circuit502and/or other circuits (not shown) in the HDD500may process data, perform coding and/or encryption, perform calculations, and/or format data that is output to and/or received from a magnetic storage medium506.

The HDD500may communicate with a host device (not shown) such as a computer, mobile computing devices such as personal digital assistants, cellular phones, media or MP3 players and the like, and/or other devices via one or more wired or wireless communication links508. The HDD500may be connected to memory509such as random access memory (RAM), nonvolatile memory such as flash memory, read only memory (ROM) and/or other suitable electronic data storage.

Referring now toFIG. 5B, embodiments of the present invention can be implemented in a digital versatile disc (DVD) drive510. Embodiments of the present invention may implement either or both signal processing and/or control circuits, which are generally identified inFIG. 5Bat512, and/or mass data storage of the DVD drive510. The signal processing and/or control circuit512and/or other circuits (not shown) in the DVD510may process data, perform coding and/or encryption, perform calculations, and/or format data that is read from and/or data written to an optical storage medium516. In some implementations, the signal processing and/or control circuit512and/or other circuits (not shown) in the DVD510can also perform other functions such as encoding and/or decoding and/or any other signal processing functions associated with a DVD drive.

The DVD drive510may communicate with an output device (not shown) such as a computer, television or other device via one or more wired or wireless communication links517. The DVD510may communicate with mass data storage518that stores data in a nonvolatile manner. The mass data storage518may include a hard disk drive (HDD). The HDD may have the configuration shown inFIG. 5A. The HDD may be a mini HDD that includes one or more platters having a diameter that is smaller than approximately 1.8″. The DVD510may be connected to memory519such as RAM, ROM, nonvolatile memory such as flash memory and/or other suitable electronic data storage.

Referring now toFIG. 5C, embodiments of the present invention can be implemented in a high definition television (HDTV)520. Embodiments of the present invention may implement either or both signal processing and/or control circuits, which are generally identified inFIG. 5Eat522, a WLAN interface, and/or mass data storage of the HDTV520. The HDTV520receives HDTV input signals in either a wired or wireless format and generates HDTV output signals for a display526. In some implementations, signal processing circuit and/or control circuit522and/or other circuits (not shown) of the HDTV520may process data, perform coding and/or encryption, perform calculations, format data and/or perform any other type of HDTV processing that may be required.

The HDTV520may communicate with mass data storage527that stores data in a nonvolatile manner such as optical and/or magnetic storage devices. At least one HDD may have the configuration shown inFIG. 5Aand/or at least one DVD may have the configuration shown inFIG. 5B. The HDD may be a mini HDD that includes one or more platters having a diameter that is smaller than approximately 1.8″. The HDTV520may be connected to memory528such as RAM, ROM, nonvolatile memory such as flash memory and/or other suitable electronic data storage. The HDTV520also may support connections with a WLAN via a WLAN network interface529.

Referring now toFIG. 5D, embodiments of the present invention may implement a control system of a vehicle530, a WLAN interface, and/or mass data storage of the vehicle control system. In some implementations, embodiments of the present invention implement a powertrain control system532that receives inputs from one or more sensors such as temperature sensors, pressure sensors, rotational sensors, airflow sensors and/or any other suitable sensors and/or that generates one or more output control signals such as engine operating parameters, transmission operating parameters, and/or other control signals.

Embodiments of the present invention may also be implemented in other control systems540of the vehicle530. The control system540may likewise receive signals from input sensors542and/or output control signals to one or more output devices544. In some implementations, the control system540may be part of an anti-lock braking system (ABS), a navigation system, a telematics system, a vehicle telematics system, a lane departure system, an adaptive cruise control system, a vehicle entertainment system such as a stereo, DVD, compact disc and the like. Still other implementations are contemplated.

The powertrain control system532may communicate with mass data storage546that stores data in a nonvolatile manner. The mass data storage546may include optical and/or magnetic storage devices (for example, hard disk drives [HDDs] and/or DVDs). At least one HDD may have the configuration shown inFIG. 5Aand/or at least one DVD may have the configuration shown inFIG. 5B. The HDD may be a mini HDD that includes one or more platters having a diameter that is smaller than approximately 1.8″. The powertrain control system532may be connected to memory547such as RAM, ROM, nonvolatile memory such as flash memory and/or other suitable electronic data storage. The powertrain control system532also may support connections with a WLAN via a WLAN network interface548. The control system540may also include mass data storage, memory and/or a WLAN interface (all not shown).

Referring now toFIG. 5E, embodiments of the present invention can be implemented in a cellular phone550that may include a cellular antenna551. Embodiments of the present invention may implement either or both signal processing and/or control circuits, which are generally identified inFIG. 5Eat552, a WLAN interface and/or mass data storage of the cellular phone550. In some implementations, the cellular phone550includes a microphone556, an audio output558such as a speaker and/or audio output jack, a display560and/or an input device562such as a keypad, pointing device, voice actuation and/or other input device. The signal processing and/or control circuits552and/or other circuits (not shown) in the cellular phone550may process data, perform coding and/or encryption, perform calculations, format data and/or perform other cellular phone functions.

The cellular phone550may communicate with mass data storage564that stores data in a nonvolatile manner such as optical and/or magnetic storage devices (for example, hard disk drives [HDDs] and/or DVDs). At least one HDD may have the configuration shown inFIG. 5Aand/or at least one DVD may have the configuration shown inFIG. 5B. The HDD may be a mini HDD that includes one or more platters having a diameter that is smaller than approximately 1.8″. The cellular phone550may be connected to memory566such as RAM, ROM, nonvolatile memory such as flash memory and/or other suitable electronic data storage. The cellular phone550also may support connections with a WLAN via a WLAN network interface568.

Referring now toFIG. 5F, embodiments of the present invention can be implemented in a set top box580. Embodiments of the present invention may implement either or both signal processing and/or control circuits, which are generally identified inFIG. 5Fat584, a WLAN interface and/or mass data storage of the set top box580. The set top box580receives signals from a source such as a broadband source and outputs standard and/or high definition audio/video signals suitable for a display588such as a television and/or monitor and/or other video and/or audio output devices. The signal processing and/or control circuits584and/or other circuits (not shown) of the set top box580may process data, perform coding and/or encryption, perform calculations, format data and/or perform any other set top box function.

The set top box580may communicate with mass data storage590that stores data in a nonvolatile manner. The mass data storage590may include optical and/or magnetic storage devices (for example, hard disk drives [HDDs] and/or DVDs). At least one HDD may have the configuration shown inFIG. 5Aand/or at least one DVD may have the configuration shown inFIG. 5B. The HDD may be a mini HDD that includes one or more platters having a diameter that is smaller than approximately 1.8″. The set top box580may be connected to memory594such as RAM, ROM, nonvolatile memory such as flash memory and/or other suitable electronic data storage. The set top box580also may support connections with a WLAN via a WLAN network interface596.

Referring now toFIG. 5F, embodiments of the present invention can be implemented in a media player500. Embodiments of the present invention may implement either or both signal processing and/or control circuits, which are generally identified inFIG. 5Gat504, a WLAN interface and/or mass data storage of the media player500. In some implementations, the media player500includes a display507and/or a user input508such as a keypad, touchpad and the like. In some implementations, the media player500may employ a graphical user interface (GUI) that typically employs menus, drop down menus, icons and/or a point-and-click interface via the display507and/or user input508. The media player500further includes an audio output509such as a speaker and/or audio output jack. The signal processing and/or control circuits504and/or other circuits (not shown) of the media player500may process data, perform coding and/or encryption, perform calculations, format data and/or perform any other media player function.

The media player500may communicate with mass data storage510that stores data such as compressed audio and/or video content in a nonvolatile manner. In some implementations, the compressed audio files include files that are compliant with MP3 format or other suitable compressed audio and/or video formats. The mass data storage may include optical and/or magnetic storage devices (for example, hard disk drives [HDDs] and/or DVDs). At least one HDD may have the configuration shown inFIG. 5Aand/or at least one DVD may have the configuration shown inFIG. 5B. The HDD may be a mini HDD that includes one or more platters having a diameter that is smaller than approximately 1.8″. The media player500may be connected to memory514such as RAM, ROM, nonvolatile memory such as flash memory and/or other suitable electronic data storage. The media player500also may support connections with a WLAN via a WLAN network interface516. Still other implementations in addition to those described above are contemplated.

Thus, embodiments of the present invention provide apparatuses, circuitry, architectures, systems, methods, algorithms and software for performing automatic gain calibration on an input signal. Embodiments of present invention advantageously provide for rapid automatic gain control, and are particularly advantageous for automatic gain control in systems adapted for input signals with bursting data and/or widely varying input amplitudes and/or in systems with a relatively large number of possible gain levels.