Integrated circuit with a rectifier element

An integrated circuit with a rectifier element. One embodiment provides a signal source, an electronic circuit and a rectifier element with a copper layer and a cuprous oxide layer adjacent to and in direct contact with the copper layer. The signal source is configured to drive a signal on a signal output terminal that is electrically coupled to the copper layer. The electronic circuit is electrically coupled to the cuprous oxide layer. The rectifier element may be formed between wiring layers of an integrated circuit.

BACKGROUND

In complex integrated circuits, diodes and rectifiers are usually realized as transistors which are wired as diodes. For example, the gate electrode of a field effect transistor may be short-circuited with the source electrode. Realizing diodes as transistors formed in a semiconductor substrate may complicate the application of the diodes because the charge carriers in impurity regions associated to the diodes may interact with neighboring elements or regions in the carrier substrate. Furthermore, such diodes include parasitic elements, for example bipolar junction transistors and further diodes, which influence the device parameters of these diodes making circuit design more difficult.

DETAILED DESCRIPTION

In one or more embodiment, an integrated circuit as described herein includes a signal source, an electronic circuit, and a rectifier element with a copper layer and a cuprous oxide layer, which is adjacent to and in direct contact with the copper layer. The signal source is configured to drive a signal on a signal output terminal electrically coupled to the copper layer. The electronic circuit is electrically coupled to the cuprous oxide layer.

In one embodiment, a method as described herein provides an integrated circuit. A copper layer may be activated. The activated copper layer is exposed to hydrogen peroxide, wherein a cuprous oxide layer is formed on the copper layer.

A radio frequency identification (RFID) tag100as illustrated inFIG. 1Aincludes an antenna element110, which, in one embodiment of operation, receives an electromagnetic signal with a frequency between about 30 kHz and 3 GHz, for example 125 kHz, 134 kHz or 13.56 MHz. The received signal s1is an alternating current (AC.) signal. A rectifier and power circuit140rectifies the received signal s1and generates a direct current (DC.) supply signal that may be regulated to provide a DC power supply voltage VDDfor an electronic circuit130. The electronic circuit130may include, for example, a demodulator unit134which is configured to obtain a rectified binary input signal S1from the received AC signal s1. The rectified binary input signal S1may contain a command word for a controller unit138and/or memory addresses for a memory unit139which may be accessed via the controller unit138, and/or data which may be written into the memory unit139via the controller unit138. The electronic circuit130may include further a modulator unit136configured to transform a binary output signal S2into an AC transmit signal s2, which may superpose the received AC signal s1. The AC transmit signal s2may be transmitted via the antenna element110to a reader station outside the RFID tag.

The RFID tag100may further include a clock extraction circuit132to generate a clock signal Clk for the controller unit138on basis of the received A.C. signal s1. The controller unit138, the memory unit139, the demodulator unit134, the modulator unit136, and the clock extraction circuit132may be integrated on the same carrier substrate forming one integrated circuit. In accordance with further embodiments, the functionality of the electronic circuit130may be split up in two or more integrated circuits.

According toFIG. 1B, the antenna element110may include a resonance circuit, for example an LC-oscillator including an inductor114and a capacitor116. The inductor114may be a coil. The coil may be realized as a conductive line that forms at least one loop or a planar spiral. The antenna element110may be a coil, a planar spiral or a conventional dipole-like antenna, by way of example. The inductor114and the capacitor116may tune and/or trim the resonant frequency of the antenna element110.

The rectifier and supply unit140may include a rectifier element120and a filter capacitor129to obtain the DC power supply voltage VDDfrom the received AC signal s1. In accordance with further embodiments, the rectifier and supply unit140may include a voltage regulator and/or a voltage stabilizer.

As schematically illustrated inFIG. 1C, the rectifier element120may include a copper layer123and a cuprous oxide (copper (I) oxide, Cu2O) layer124which is arranged adjacent to and in direct contact with the copper layer123. A first interface123ais formed between the cuprous oxide layer124and the copper layer123. A protective liner125may be arranged adjacent to and in direct contact with the cuprous oxide layer124, wherein a second interface124ais formed between the protective liner125and the copper layer123. In accordance with an embodiment, a rectifier effect occurs at the first interface123a, wherein the copper layer123is effective as the anode and the cuprous oxide layer124is effective as the cathode of the rectifier element120. In accordance with another embodiment, a rectifier effect may also occur at the second interface124ain dependence on the material of the protective liner125.

The rectifier element120may be integrated in the wiring layer of a carrier substrate containing, for example, the electronic circuit130ofFIG. 1B. In accordance with an embodiment, the rectifier element120is formed between wiring layers of an integrated circuit that integrates the functionality of the controller unit138, the memory unit139, the modulator unit136and the demodulator unit134ofFIG. 1A. The cuprous oxide layer124is electrically coupled with a voltage supply input terminal of the electronic circuit130ofFIG. 1Adirectly or via the protective liner125. The copper layer123may be electrically coupled with an output terminal of the antenna element110ofFIG. 1A. Here and in the following, a first terminal is electrically coupled with a second terminal, if a low resistance path is formed between the first and second terminals. The low resistance path may be one conductive line or may include further low-resistive elements, for example contacts, interface layers or forward-biased junctions. The cuprous oxide behaves as a semiconductor. A copper-cuprous oxide-diode shows a significant lower forward voltage drop than equivalent silicon parts. Since the diode is not formed in a semiconducting substrate but between the wiring layers, a parasitic interaction between the diode and electronic elements formed in the semiconductor substrate is significantly reduced.

FIG. 1Dillustrates a portion of a carrier substrate150of an integrated circuit100. The carrier substrate150may be, for example, a carrier consisting of or including a flexible plastic, glass, a semiconductor substrate or an organic substrate. According to an embodiment, the carrier substrate150may be, for example, a portion of a single crystalline silicon wafer, a SiGe wafer, a A(III)-B(V) wafer, or a silicon-on-insulator (SOI) wafer and may include further doped and undoped sections, epitaxial semiconductor layers as well as further conductive and insulating structures which have previously been fabricated. Dielectric isolation structures192, for example shallow trench isolations (STIs), may pattern a surface of the carrier substrate150and may isolate neighboring electronic devices, for example transistors, diodes, resistors and conductive lines that may be formed at least partially within the carrier substrate150. Above a main surface198of the carrier substrate150, wiring layers128,129may be formed that are embedded in an inter-level dielectric180. Contact structures127connect conductive lines formed in the wiring layers128,129with electronic devices formed in and on the carrier substrate150.

Electronic devices in a first portion151of the carrier substrate150may form an electronic circuit, for example a microprocessor, a microcontroller, a memory cell array, a modulator, a demodulator, a logic circuit or an analog circuit. In accordance with other embodiments, the electronic circuit in the first portion151includes an electrically erasable programmable read-only memory (EEPROM). Electronic devices formed in a second portion152of the substrate150may contain a signal source, which is configured to drive a signal on a signal output terminal115. The signal source may be an oscillator, a pulse generator or an antenna element, by way of example.

A rectifier element120may be arranged in a third portion153. The first, second and third substrate portions151,152,153may overlap with each other. In accordance with further embodiments, the third portion153may be a sub-section of one of the first or second substrate portions151,152. The rectifier element120has a copper layer123which may be arranged in one of the wiring layers128,129. The copper layer123may be electrically connected to a signal output terminal115, for example via contacts127and connection lines in the first and second wiring layers128,129. A cuprous oxide layer124is in direct contact with the copper layer123. The copper layer123and the cuprous oxide layer124may form a first interface123a. A protective layer125may be formed above and in direct contact with the cuprous oxide layer124along a second interface124a. The protective layer124may be, for example, a thin titanium aluminum, titanium dioxide or titanium zinc layer, which may be formed via a sputter process, respectively. A first contact127a, which is in direct contact with the copper layer122, may form an anode terminal and a second contact127bthat may be in direct contact with the protective liner125or the cuprous oxide layer124may form a cathode terminal of the rectifier element120. The rectifier element120may be embedded completely within the interlayer dielectric180. The operation of the rectifier element120hardly interacts with the operation of electronic devices formed within the carrier substrate150. Both terminals127a,127bare free accessible. Due to the characteristic material properties of cuprous oxide, the rectifier element120has a low forward bias voltage. The manufacture of the rectifier element120may be integrated in the back-end metallization process of the integrated circuit100without increasing process complexity substantially.

FIG. 2Arefers to a charge pump280of an integrated circuit200, wherein the charge pump280transforms a low primary voltage VCCapplied to an input terminal201into a higher secondary voltage VOUTat an output terminal209. A plurality of rectifier elements220may be connected in series to form a rectifier string with the anodes orientated to the input terminal201and the cathodes oriented to the output terminal209. Each network node between two neighboring rectifier elements220is connected to a first or a second capacitor211,212. The first capacitors211may be connected to a first signal line221and the second capacitors212may be connected to a second signal line222. The first and second capacitors211,212are connected to the rectifier string in alternating order. A first signal, for example a square pulse, is applied to the first signal line221. A second signal, which may be the inverted first signal, is applied to the second signal line222. In alternating order, the first and second capacitors211,212may be charged and recharged for example up to the respective integer multiple of the input voltage VCC. A low forward bias voltage of the rectifier elements220reduces the time for recharge of the capacitors and increases the efficiency of the charge pump. The rectifier elements220may be formed as described with respect toFIGS. 1C and 1D.

FIG. 3illustrates a simplified block diagram of an integrated circuit300that includes a first supply voltage unit311and a second supply voltage unit312. The first supply voltage unit311is configured to supply a low first output voltage V1of for example 10V. The second supply voltage unit312may be configured to temporarily supply a second or a third output voltage V2, V3wherein the second output voltage V2is higher than the first output voltage V1, for example 20V, and wherein the third output voltage V3is lower than the first output voltage V1, for example 0 V. Depending on its operating state, an electronic circuit330is supplied either with the first output voltage V1or with the second output voltage V2.

In accordance with one embodiment, the outputs of the first and second supply voltage units311,312are connected with a supply voltage input terminal of an electronic circuit330within the integrated circuit300via a voltage switch340that includes two rectifier elements320. Each rectifier element320may have a copper layer and a cuprous oxide layer which is in direct contact with the copper layer, wherein the copper layers are electrically coupled to the output terminals of the first and second supply voltage units311,312and wherein the cuprous oxide layers are electrically coupled to each other and via a low ohmic resistance path to the supply voltage input terminal of the electronic circuit330. Since the voltage drop in the forward biased mode of the rectifier elements320is low, the efficiency of the voltage switch340is high, whereas the design requirements are relaxed. The voltage switch340may be used in processor applications using embedded flash EEPROM-memory cells, by way of example.

The simplified circuit diagrams ofFIGS. 4A and 4Brefer to the use of rectifier elements420,470in a diode/transistor-coupled logic circuit, wherein the diodes may be realized completely in the inter-level dielectric of an integrated circuit400.

According toFIG. 4A, at least two, for example three rectifier elements420are connected to each other at the cathode side. A pull-down resistor421pulls down the output voltage on the cathode side to the low supply voltage in an all-reverse-biased state. The signal on the cathode side may control a field effect transistor that inverts and recovers a logic signal to form a NOR-gate424.

The rectifier elements470ofFIG. 4Bare connected on the anode side, which is pulled up to the positive supply voltage via a pull-up resistor471in an all-reverse-biased state. The signal on the anode side may be electrically coupled to the gate terminal of a field effect transistor473to form a NAND-gate474. By realizing the rectifier elements420,470completely in the inter-level dielectric the forward biased state of the diodes420,470has less effect on the operation of electronic devices formed within a carrier substrate below the inter-level dielectric.

FIGS. 5A to 5Crefer to a method of manufacturing an integrated circuit, wherein the integrated circuit may be, for example, an RFID transponder or tag or an integrated circuit with EEPROM cells by way of example.

In a carrier substrate500, electronic devices like field effect transistors, bipolar transistors, diodes, resistors, connection lines and others may be formed. Dielectric isolation structures501may isolate neighboring electronic devices within the carrier substrate500. A first interlayer dielectric510may be deposited onto a main surface502of the carrier substrate500and may be a doped or undoped silicon oxide or silicon dioxide, for example a boron phosphorous doped silica glass. For example via damascene techniques, contact structures527and connection lines523may be formed in a first wiring layer581. The contacts527and the connection lines523may be formed from the same material or from different materials. The connection lines523may be made of copper and may form a copper structure. A heat-resistant hard mask530may be formed above the connection lines523and the interlayer dielectric510. The hard mask530may be made of silicon nitride Si3N4, silicon dioxide SiO2, carbon, amorphous silicon or polycrystalline silicon, by way of example. The hard mask530is patterned such that openings535uncover (expose) first connection line portions, in which rectifier elements are formed in the following, whereas the hard mask530may cover further connection line portions.

According toFIG. 5B, the uncovered first portions of the connection lines523may be activated. For example, the carrier substrate500or at least the connection lines523are heated up to at least 250 degree Celsius, for example to at least 300 degree Celsius. In accordance with other embodiments, the connection lines may be activated by exposing them to a suitable fluid with or without a contemporaneous or a following anneal. For example, the connection lines523may be activated by an etch using ammonium persulfate (NH4)2S2O8and an anneal at 150 degree Celsius. The activated uncovered first portions of the connection lines523are exposed to hydrogen peroxide, wherein a cuprous oxide layer524is formed on the exposed copper surfaces, and wherein the copper is consumed in part. Then a protective liner525may be deposited on the cuprous oxide layer524and the hard mask530. The hard mask530is removed, wherein portions of the protective liner525deposited above the hard mask530may be lifted off.

According toFIG. 5C, a second interlayer dielectric560, for example a doped or undoped silica glass, may be deposited on the first wiring layer581. Further contacts587,588and further connection lines577in a second wiring layer582may be formed and may connect the cathode side of the rectifier element520to an electric circuit formed in or above the carrier substrate500. The rectifier element520includes a copper layer523, a cuprous oxide layer524and may have a protective liner525and forms a diode D between connection lines in the wiring layers581,582. In accordance with other embodiments, the protective liner525may be omitted.

FIGS. 6A to 6Brefer to a further method of manufacturing an integrated circuit, for example an RFID tag or an integrated circuit with EEPROM cells. Dielectric isolation structures601, for example STIs, isolate neighboring electronic devices formed within a carrier substrate600. A first interlayer dielectric610is disposed above a main surface602of the carrier substrate600. In a first wiring layer681, connection lines623may be formed on the first interlayer dielectric610. The connection lines623may be copper structures. Contact structures627may connect the electronic devices in the carrier substrate600with the connection lines623. The carrier substrate600is activated, for example heated up to at least 250 degrees Celsius, for example to at least 300 degrees Celsius. In accordance with other embodiments, applying a suitable fluid with or without a contemporaneous or a following anneal may activate the connection lines623. For example, the connection lines623may be activated by an etch using ammonium persulfate (NH4)2S2O8and an anneal at 150 degree Celsius. The activated carrier substrate600including the copper connection lines623is exposed to hydrogen peroxide, wherein a cuprous oxide layer624is formed on the exposed copper surfaces. A protective liner625, for example titanium aluminum or a titanium dioxide layer may be deposited on the cuprous oxide layer624. A hard mask layer may be deposited above the cuprous oxide layer624, for example directly on the cuprous oxide layer624or on the protective layer625. The hard mask layer is patterned such that remnant portions of the hard mask layer form a hard mask630covering diode regions628, in which diodes are formed. Pad-like widened sections and/or extension of the respective connection line623may increase the area of the diode regions628.

According toFIG. 6Bthe hard mask630may be used as an etch mask to remove portions of the cuprous oxide layer624and protective layer625outside the diode regions628. In the diode regions628, non-consumed portions of the connection line623and the cuprous oxide layer624form a rectifier element620. The back-end metallization process may proceed as described with regard toFIG. 5C.

FIG. 7refers to a method of manufacturing an integrated circuit that includes a rectifier element. A copper structure, for example a portion of a connection line in a metallization or wiring layer may be formed (702). The copper structure is activated, for example heated up to at least 250 degree Celsius (704). The activated copper structure is exposed to hydrogen peroxide, wherein a cuprous oxide layer is formed directly on the copper layer (706).

FIG. 8schematically illustrates an electronic system800including a processor device810and an integrated circuit812that includes a rectifier element820based on cuprous oxide. The electronic system800may include an electronic sub-assembly895configured to be contacted at an interface and an interface890configured to electrically contact the electronic sub-assembly895. The interface890may be a socket or a connector, by way of example. The integrated circuit812may be an interface circuit, a controller chip, a logic chip, or a memory chip mounted on the electronic sub-assembly895. In accordance with other embodiments, the integrated circuit812is mounted on the same carrier as the processor device810.

The integrated circuit812includes the rectifier element820, a signal source810and an electronic circuit830. The rectifier element822, for example a diode, includes a copper layer823and a cuprous oxide layer824adjacent to and in direct contact with the copper layer823. The signal source810is configured to drive a signal on a signal output terminal electrically coupled to the copper layer823. The electronic circuit830is electrically coupled to the cuprous oxide layer824. According to an embodiment, the signal source810supplies a supply voltage to the electronic circuit830via the rectifier element820.

The processor device810may be mounted on a further sub-assembly or on a mother board850of the electronic system800. The processor device810may be configured to process data received and/or transmitted from or via the electronic sub-assembly895. The electronic system800may include further components, for example a display880for displaying data.

The electronic system800may be a computer, for example, a personal computer or a notebook, a server, a router, a game console, for example a video game console or a portable video game console, a graphic card, a personal digital assistant, a digital camera, a cell phone, an audio system, a video system, a memory system such as a USB stick or a solid state drive or a sub-system of a radio frequency identification system, by way of example.