Systems and methods for predicting persistent memory device degradation based on operational parameters

In accordance with embodiments of the present disclosure, an information handling system may include a processor, a memory system communicatively coupled to the processor, the memory system comprising one or more persistent memory modules, each of the one or more persistent memory modules comprising a volatile memory and a non-volatile memory, and a management controller communicatively coupled to the processor and the memory system. The management controller may be configured to correlate temperature sensor information with one or more other operational parameters associated with the one or more persistent memory modules and predict a likelihood of degradation of the one or more persistent memory modules based on correlation of the temperature sensor information with the one or more other operational parameters.

TECHNICAL FIELD

The present disclosure relates in general to information handling systems, and more particularly to systems and methods for predicting persistent memory device degradation based on operational parameters.

BACKGROUND

Information handling systems are increasingly using persistent memory technologies such as Non-Volatile Dual In-line Memory Modules (NVDIMMs), including NVDIMM-N. An NVDIMM is a memory module that may retain data even when electrical power is removed either from an unexpected power loss, system crash or from a normal system shutdown. To enable such functionality, an NVDIMM may include a traditional dynamic random access memory (DRAM) which may store data during normal operation when electrical power is available from a power supply unit and a flash memory (e.g., NAND flash) to back up data present in the DRAM when a loss of electrical power from the power supply unit occurs. A battery, capacitor, or other energy storage device either internal or external to the NVDIMM may supply electrical energy for a “save” operation to transfer data from the DRAM to the flash memory in response to a power loss event from the power supply unit.

An existing problem with DRAM threshold policies is that both correctable and uncorrectable errors are marked as degraded even though advanced error correction code (ECC) capabilities and scrub protocols effectively address all correctable errors. In many cases, correctable errors are transient and will resolve themselves with little or no administrator intervention. However, uncorrectable errors may cause an information handling system to crash, increasing downtime and potentially causing data loss.

On NAND flash, the “retention” parameter is often the parameter used to define when failure occurs. The retention parameter is very sensitive to the external environment of a NAND flash, and high temperature tends to reduce duration of retention. A number of read cycles can also degrade retention.

Because an NVDIMM-N device may include both DRAM and NAND flash, an intelligent approach is desired to determine device degradation and replacement.

SUMMARY

In accordance with the teachings of the present disclosure, the disadvantages and problems associated with determining health of a non-volatile memory module in an information handling system may be reduced or eliminated.

In accordance with embodiments of the present disclosure, an information handling system may include a processor, a memory system communicatively coupled to the processor, the memory system comprising one or more persistent memory modules, each of the one or more persistent memory modules comprising a volatile memory and a non-volatile memory, and a management controller communicatively coupled to the processor and the memory system. The management controller may be configured to correlate temperature sensor information with one or more other operational parameters associated with the one or more persistent memory modules and predict a likelihood of degradation of the one or more persistent memory modules based on correlation of the temperature sensor information with the one or more other operational parameters.

In accordance with these and other embodiments of the present disclosure, a method for use in an information handling system comprising a memory system comprising one or more persistent memory modules, each of the one or more persistent memory modules comprising a volatile memory and a non-volatile memory. The method may include correlating temperature sensor information with one or more other operational parameters associated with the one or more persistent memory modules and predicting a likelihood of degradation of the one or more persistent memory modules based on correlation of the temperature sensor information with the one or more other operational parameters.

In accordance with these and other embodiments of the present disclosure, an article of manufacture may include a non-transitory computer-readable medium and computer-executable instructions carried on the computer-readable medium, the instructions readable by a processor, the instructions, when read and executed, for causing the processor to, in an information handling system comprising a memory system comprising one or more persistent memory modules, each of the one or more persistent memory modules comprising a volatile memory and a non-volatile memory: (i) correlate temperature sensor information with one or more other operational parameters associated with the one or more persistent memory modules; and (ii) predict a likelihood of degradation of the one or more persistent memory modules based on correlation of the temperature sensor information with the one or more other operational parameters.

DETAILED DESCRIPTION

Preferred embodiments and their advantages are best understood by reference toFIGS. 1 through 3, wherein like numbers are used to indicate like and corresponding parts.

FIG. 1illustrates a block diagram of an example information handling system102in accordance with certain embodiments of the present disclosure. In certain embodiments, information handling system102may comprise a computer chassis or enclosure (e.g., a server chassis holding one or more server blades). In other embodiments, information handling system102may be a personal computer (e.g., a desktop computer or a portable computer). As depicted inFIG. 1, information handling system102may include a processor103, a memory system104communicatively coupled to processor103, a basic input/output system (BIOS)105communicatively coupled to processor103, a storage medium106communicatively coupled to processor103, and a management controller112communicatively coupled to processor103.

Memory system104may be communicatively coupled to processor103and may comprise any system, device, or apparatus operable to retain program instructions or data for a period of time (e.g., computer-readable media). Memory system104may comprise random access memory (RAM), electrically erasable programmable read-only memory (EEPROM), a PCMCIA card, flash memory, magnetic storage, opto-magnetic storage, or any suitable selection and/or array of volatile or non-volatile memory that retains data after power to information handling system102is turned off. In particular embodiments, memory system104may comprise a persistent memory (e.g., comprising one or more NVDIMMs) that includes volatile memory (e.g., DRAM or other volatile random-access memory) and non-volatile memory (e.g., flash memory or other non-volatile memory), as described in greater detail below.

As shown inFIG. 1, memory system104may include memory controller108and one or more memory modules116a-116ncommunicatively coupled to memory controller108. Memory controller108may be any system, device, or apparatus configured to manage and/or control memory system104. For example, memory controller108may be configured to read data from and/or write data to memory modules116comprising memory system104. Additionally or alternatively, memory controller108may be configured to refresh memory modules116and/or memory chips110thereof in embodiments in which memory system104(or a portion thereof) comprises DRAM. Although memory controller108is shown inFIG. 1as an integral component of memory system104, memory controller108may be separate from memory system104and/or may be an integral portion of another component of information handling system102(e.g., memory controller108may be integrated into processor103).

Each memory module116may include any system, device or apparatus configured to retain program instructions and/or data for a period of time (e.g., computer-readable media). As shown inFIG. 1, a memory module116may comprise a persistent memory (e.g., NVDIMM) comprising volatile memory120and non-volatile memory122. In particular embodiments, memory module116may comprise an NVDIMM-N implementation, in which volatile memory120and non-volatile memory122exist on the same memory module116, and memory module116may present only volatile memory120to OS114, and any save operations are performed invisibly to OS114in the event of a power loss. As depicted inFIG. 1, each memory module116may include one or more ranks118a-118m.Each memory rank118within a memory module116may be a block or area of data created using some or all of the memory capacity of the memory module116. In some embodiments, each rank118may be a rank as such term is defined by the JEDEC Standard for memory devices.

As shown inFIG. 1, each rank118may include a non-volatile memory120and an associated non-volatile memory122. Each rank-level volatile memory120may include a plurality of memory chips110, and each rank-level non-volatile memory122may include a plurality of memory chips111. Each memory chip110may include a packaged integrated circuit configured to comprise a plurality of volatile memory cells for storing data. In some embodiments, a memory chip110may include dynamic random access memory (DRAM). Each memory chip111may include a packaged integrated circuit configured to comprise a plurality of non-volatile memory cells for storing data. In some embodiments, a memory chip111may include flash memory.

During normal operation, when an electrical power source provides adequate power to components of information handling system102, data written to memory104from processor103may be stored in volatile memory120. However, in the event of loss of system input power or a power fault that prevents delivery of electrical energy from the power source to memory104, data stored in volatile memory120may be transferred to non-volatile memory122in a save operation. After input power is restored, or a faulty power source is replaced, such that the power source is again operable to provide electrical energy to information handling resources of information handling system102, on the subsequent power-on of information handling system102, data may be copied from non-volatile memory122back to volatile memory120via a restore operation. The combined actions of data save and then data restore, allow the data to remain persistent through a power disruption. Accordingly, although not explicitly shown inFIG. 1, memory104may also include hardware, firmware, and/or software for carrying out save operations.

A BIOS105may include any system, device, or apparatus configured to identify, test, and/or initialize information handling resources of information handling system102, and/or initialize interoperation of information handling system102with other information handling systems. “BIOS” may broadly refer to any system, device, or apparatus configured to perform such functionality, including without limitation, a Unified Extensible Firmware Interface (UEFI). In some embodiments, BIOS105may be implemented as a program of instructions that may be read by and executed on processor103to carry out the functionality of BIOS105. In these and other embodiments, BIOS105may comprise boot firmware configured to be the first code executed by processor103when information handling system102is booted and/or powered on. As part of its initialization functionality, code for BIOS105may be configured to set components of information handling system102into a known state, so that one or more applications (e.g., an operating system or other application programs) stored on compatible media (e.g., disk drives) may be executed by processor103and given control of information handling system102.

Storage medium106may be communicatively coupled to processor104. Storage medium106may include any system, device, or apparatus operable to store information processed by processor103. Storage medium106may include, for example, network attached storage, one or more direct access storage devices (e.g., hard disk drives), and/or one or more sequential access storage devices (e.g., tape drives). As shown inFIG. 1, storage medium106may have stored thereon an operating system (OS)114. OS114may be any program of executable instructions, or aggregation of programs of executable instructions, configured to manage and/or control the allocation and usage of hardware resources such as memory, CPU time, disk space, and input and output devices, and provide an interface between such hardware resources and application programs hosted by OS114. Active portions of OS114may be transferred to memory104for execution by processor103.

Management controller112may be configured to provide management facilities for management of information handling system102. Such management may be performed by management controller112even if information handling system102is powered off or powered to a standby state. Management controller112may include a processor and a management network interface separate from and physically isolated from a data network interface of information handling system102. In certain embodiments, management controller112may include or may be an integral part of a baseboard management controller (BMC) or a remote access controller (e.g., a Dell Remote Access Controller or Integrated Dell Remote Access Controller).

As shown inFIG. 1, management controller112may comprise a memory monitor113. Memory monitor113may include any system, device, or apparatus for monitoring memory system104, as described in more detail below. In some embodiments, memory monitor113may comprise a program of executable instructions stored in computer readable media integral to or otherwise accessible to management controller112and configured to, when loaded and executed upon a processor of management controller112, carry out the functionality of memory monitor113described herein.

In operation, memory monitor113may monitor health status of memory modules116of memory system104and initiate and manage data backup operations by correlating timer series information of various operational parameters associated with memory system104, including without limitation errors within volatile memory120, errors within non-volatile memory122, and temperature sensors.

Memory monitor113may receive from a user (e.g., an administrator) of information handling system102a memory management policy for installed memory modules116. In some embodiments, such policy may be a vendor-specific policy related to a vendor of installed memory modules116. For example, a policy may describe vendor-specific details including a maximum operating temperature, size, maximum number of writes, etc.

Once in possession of the policy, memory monitor113may monitor memory system104and maintain a record (e.g., in a log or other data structure) of time series data related to operation of memory system104. The record maintained by memory monitor113may include memory slot details, memory module identifiers (e.g., serial numbers), memory ECC errors, firmware details, temperature readings from an on-memory temperature, temperature readings external to memory system104of the chassis housing information handling system102, other parameters external to memory system104, and/or other information. Based on a correlation of the temperature sensor readings and memory ECC error information, memory monitor113may determine if operating temperature of a memory module116is causing errors in such memory module116. Memory monitor113may use the foregoing data to determine a severity parameter indicative of a likelihood of degradation of a memory module116. Based on a severity parameter for a memory module116, memory monitor113may determine a backup interval for such memory module116, and cause backup of contents of such memory module116in accordance with such backup interval. Backing up of contents of a memory module116may include transferring contents of a memory module116to a storage medium external to such memory module116, including without limitation storage medium106, an externally coupled storage device (e.g., Universal Serial Bus drive), network-attached storage, cloud-based storage, and/or any other suitable medium. Memory monitor113may also be configured to facilitate reconstruction of contents backed up from a memory module116to a replacement memory module116.

In addition to processor103, memory system104, BIOS105, storage medium106, and management controller112, information handling system102may include one or more other information handling resources.

FIG. 2illustrates a flow chart of an example method200for creation of monitoring data by memory monitor113, in accordance with embodiments of the present disclosure. According to some embodiments, method200may begin at step202. As noted above, teachings of the present disclosure may be implemented in a variety of configurations of information handling system102. As such, the preferred initialization point for method200and the order of the steps comprising method200may depend on the implementation chosen.

At step202, memory monitor113may receive vendor-specific information regarding a memory module116from a user (e.g., administrator) of information handling system102. Such information may include a part number, unique identifier (e.g., serial number), firmware version, maximum operating temperature, maximum number of non-volatile memory write/erase cycles, etc.). At step204, based on such information, memory monitor113may create a model for the memory module116.

At step206, memory monitor113may begin monitoring memory modules116in accordance with the model(s) by monitoring for ECC errors. If ECC errors are present, method200may proceed to step208. Otherwise, method200may proceed to step212.

At step208, in response to one or more ECC errors, memory monitor113may obtain temperature sensor information from temperature sensors present within memory system104and/or temperature sensors of the chassis of information handling system102external to memory system104. At step210, memory monitor113may store in a record (e.g., log or other data structure) time series data related to the ECC errors and collected temperature sensor data.

At step212, memory monitor113may determine if a temperature of a memory module116has increased due to valid input/output operations to the memory module116. If a temperature of a memory module116has increased due to valid input/output operations to the memory module116, method200may proceed to step214. Otherwise, method200may proceed to step218.

At step214, in response to a temperature of a memory module116increasing due to valid input/output operations to the memory module116, memory monitor113may obtain input/output statistics, temperature sensor information from temperature sensors present within memory system104, and/or temperature sensors of the chassis of information handling system102external to memory system104. At step216, memory monitor113may store in the record time series data related to the input/output statistics and temperature sensor information.

At step218, memory monitor113may determine if a temperature of a memory module116has increased without valid input/output operations to the memory module116. If a temperature of a memory module116has increased without valid input/output operations to the memory module116, method200may proceed to step220. Otherwise, method200may proceed again to step206.

At step220, in response to a temperature of a memory module116increasing without valid input/output operations to the memory module116, memory module116may obtain non-volatile and volatile memory health data, temperature sensor information from temperature sensors present within memory system104, and/or temperature sensors of the chassis of information handling system102external to memory system104. At step222, memory monitor113may store in the record time series data related to the non-volatile and volatile memory health data and temperature sensor information. After completion of step222, method200may proceed again to step206.

AlthoughFIG. 2discloses a particular number of steps to be taken with respect to method200, method200may be executed with greater or fewer steps than those depicted inFIG. 2. In addition, althoughFIG. 2discloses a certain order of steps to be taken with respect to method200, the steps comprising method200may be completed in any suitable order.

Method200may be implemented using memory monitor113, and/or any other system operable to implement method200. In certain embodiments, method200may be implemented partially or fully in software and/or firmware embodied in computer-readable media.

FIG. 3illustrates a flow chart of an example method300for determining memory module health and managing backup by memory monitor113, in accordance with embodiments of the present disclosure. According to some embodiments, method300may begin at step302. As noted above, teachings of the present disclosure may be implemented in a variety of configurations of information handling system102. As such, the preferred initialization point for method300and the order of the steps comprising method300may depend on the implementation chosen.

At step302, memory monitor113may, from the record of time series data, create one or more severity parameters indicative of a likelihood of degradation of a memory module116. For example, a severity parameter may be determined based on an analysis of a correlation between ECC errors and variance in operating temperature of the chassis or memory module116. As another example, a severity parameter may be based on a determination of an expected lifetime of a non-volatile memory based on a size of non-volatile memory and rate of data written to the non-volatile memory. As a further example, a severity parameter may be determined based on an analysis of a correlation between Flash Translation Layer bad block management details and variance in operating temperature of the chassis or memory module116.

At step304, memory monitor113may compare such one or more severity parameters to thresholds determined from vendor-specific data to determine a severity level of the severity parameters. For example, in some embodiments, severity may be determined as critical if a severity parameter is at 80% of its relevant threshold or higher, severity may be determined as medium if a severity parameter is at 50% of its relevant threshold or higher, and may otherwise be determined as low.

At step306, memory monitor113may set up a backup frequency for backing up content of a memory module116based on the severity level. For example, if severity is high, content may be backed up with high frequency (e.g., hourly or daily, if severity is medium, content may be backed up with intermediate frequency (e.g., bi-monthly or monthly), and if severity is low, content may be backed up with low frequency (e.g., not backed up at all). After completion of step306, method300may proceed again to step302.

AlthoughFIG. 3discloses a particular number of steps to be taken with respect to method300, method300may be executed with greater or fewer steps than those depicted inFIG. 3. In addition, althoughFIG. 3discloses a certain order of steps to be taken with respect to method300, the steps comprising method300may be completed in any suitable order.

Method300may be implemented using memory monitor113, and/or any other system operable to implement method300. In certain embodiments, method300may be implemented partially or fully in software and/or firmware embodied in computer-readable media.