Field effect transistor with frequency dependent gate-channel capacitance

A field effect transistor having a channel, a gate, and a structure for decreasing a gate-to-channel capacitance of the transistor as an operating frequency of the transistor increases. The structure can comprise, for example, a barrier disposed between the gate and the channel, which has a dielectric permittivity and/or a conductivity that varies with an operating frequency of the transistor. In an embodiment, the barrier comprises a layer of conducting material, such as conducting polymer, conducting semiconductor, conducting semi-metal, amorphous silicon, polycrystalline silicon, and/or the like.

TECHNICAL FIELD

The disclosure relates generally to field effect transistors, and more particularly, to a field effect transistor configured for improved operation as a radio-frequency switch.

BACKGROUND ART

Solid state radio frequency (RF) switches are important components of Radar transmit/receive (T/R) modules, satellite communication systems, Joint Tactical Radio Systems (JTRS), and the like. A promising RF switch technology uses Heterostructure Field Effect Transistors (HFETs). Recently, high power switches made of AlGaN/GaN HFETs demonstrated superior performance over other RF switching devices in terms of maximum power density, bandwidth, operating temperature, and breakdown voltage.

Many applications, including JTRS and low-noise receivers, require RF switches with a very low insertion loss, e.g., typically below 0.3 dB. A low loss switch dissipates little RF power. As a result, the switch can be fabricated over a low cost substrate, such as sapphire. Low insertion loss in an HFET is due to a high channel conductance of the device. Exceptionally high two dimensional electron gas densities at the AlGaN/GaN interface make a group III-Nitride HFET an ideal candidate for RF switching applications.

The feasibility of high-power broad-band monolithically integrated group III-Nitride HFET RF switches has been demonstrated. Large signal analysis and experimental data for a large periphery group III-Nitride switch indicate that the switch can achieve switching powers exceeding +40 to +50 dBm. To date, the performance of any FET-based RF switch is limited by a trade off between a reasonably low threshold voltage versus low OFF state capacitances, high switching powers, and high linearity.

SUMMARY OF THE INVENTION

Aspects of the invention provide a high-power, low-loss RF switch using a FET, such as a group III-Nitride based HFET or the like, which combines a low threshold voltage with a low OFF-state capacitance and an extremely high linearity and switching power. In an embodiment, the invention provides a field effect transistor having a channel, a gate, and a means for decreasing a gate-to-channel capacitance of the transistor as an operating frequency of the transistor increases. The means can comprise, for example, a barrier layer disposed between the gate and the channel, which has a dielectric permittivity and/or a conductivity that varies with an operating frequency of the transistor. In an embodiment, the barrier layer comprises a conducting material, such as conducting polymer, conducting semiconductor, conducting semi-metal, amorphous silicon, polycrystalline silicon, and/or the like.

A first aspect of the invention provides a field effect transistor comprising: a channel; a gate to the channel; and a barrier layer disposed between the gate and the channel, wherein the barrier layer comprises at least one of: a dielectric permittivity or a conductivity that varies with an operating frequency of the transistor.

A second aspect of the invention provides a field effect transistor comprising: a channel; a gate to the channel; and means for decreasing a gate-to-channel capacitance of the transistor as an operating frequency of the transistor increases.

A third aspect of the invention provides a field effect transistor comprising: a channel; a gate to the channel; and a barrier layer disposed between the gate and the channel, wherein the barrier layer comprises a conducting material selected from the group consisting of: conducting polymer, conducting semiconductor, conducting semi-metal, amorphous silicon, and polycrystalline silicon.

Other aspects of the invention provide circuits, apparatuses, and methods of designing, using and generating each, which include and/or utilize some or all of the field effect transistors described herein. The illustrative aspects of the invention are designed to solve one or more of the problems herein described and/or one or more other problems not discussed.

DETAILED DESCRIPTION OF THE INVENTION

As indicated above, aspects of the invention provide a field effect transistor having a channel, a gate, and a means for decreasing a gate-to-channel capacitance of the transistor as an operating frequency of the transistor increases. The means can comprise, for example, a barrier layer disposed between the gate and the channel, which has a dielectric permittivity and/or a conductivity that varies with an operating frequency of the transistor. In an embodiment, the barrier layer comprises a conducting material, such as conducting polymer, conducting semiconductor, conducting semi-metal, amorphous silicon, polycrystalline silicon, and/or the like. As used herein, unless otherwise noted, the term “set” means one or more (i.e., at least one) and the phrase “any solution” means any now known or later developed solution.

Turning to the drawings,FIGS. 1A and 1Bshow illustrative devices10A and10B according to embodiments. Each device10A,10B comprises a heterostructure field effect transistor (HFET), and includes a substrate12, a first layer14adjacent to the substrate, and a second layer16immediately adjacent to the first layer14. First layer14and second layer16form a device channel at their interface, which gate18can be utilized to control, and within which current can flow between source contact20and drain contact22.

Devices10A,10B also include a barrier layer24disposed between second layer16and gate18. As described herein, barrier layer24comprises a dielectric permittivity and/or a conductivity that varies with an operating frequency of devices10A,10B. For example, barrier layer24can comprise a capacitance that decreases with the operating frequency and/or a threshold voltage that increases with the operating frequency for the device10A,10B. Further, devices10A,10B also can include dielectric layers26A,26B located over a portion of second layer16and a corresponding contact20,22, respectively. Dielectric layers26A,26B can insulate the corresponding contacts20,22from the barrier layer24.

Devices10A,10B can be manufactured using any approach now known or later developed. Substrate12can comprise any type of substrate12. Similarly, layers14,16can comprise any type of materials capable of forming a channel. In an embodiment, devices10A,10B include one or more layers of materials selected from the group-III nitride material system (e.g., AlxInyGa1-x-yN, where 0≦X, Y≦1,and X+Y≦1 and/or alloys thereof). For example, substrate12can comprise silicon carbide (SiC), first layer14can comprise gallium nitride (GaN), and second layer16can comprise aluminum gallium nitride (AlGaN). Gate18and contacts20,22each can comprise any type of contact including, for example, a gold germanium contact, and dielectric layers26A,26B can comprise, for example, silicon dioxide.

As discussed herein, barrier layer24can comprise material having a dielectric permittivity and/or a conductivity that varies with an operating frequency of the device10A,10B. To this extent, barrier layer24can comprise conducting material having a low dielectric constant, e.g., conducting low-k material with a dielectric constant lower than that of silicon dioxide (SiO2). For example, barrier layer24can comprise a conducting polymer, conducting semiconductor, conducting semi-metal, amorphous silicon, polycrystalline silicon, and/or the like.

As illustrated by device10B, one or more layers, such as intermediate layer28, can be located between barrier layer24and second layer16. Intermediate layer28can comprise an insulating (dielectric) material having a high dielectric constant, e.g., a dielectric constant higher than that of SiO2. For example, intermediate layer28can comprise a layer of Barium titanate (BaTiO3), Strontium titanate (SrTiO3), and/or the like. Regardless, devices10A,10B can comprise one or more conducting layers between gate18and second layer16, which are formed using any appropriate conducting material. Inclusion of intermediate layer28can ensure negligible gate leakage current for device10B.

The material for the layer(s) between gate18and second layer16in devices10A,10B can be selected such that the conductivity and dielectric permittivity of the layer(s) between gate18and second layer16provide a desired characteristic frequency of the threshold voltage and/or gate capacitance dispersion. However, it is understood that the materials described herein for devices10A,10B are only illustrative, and various other materials can be utilized as will be recognized by one of ordinary skill in the art. In an embodiment, the frequency dependence of the gate capacitance is achieved through the use of a material and/or multiple layers of materials having a frequency dispersion of the complex conductance of the barrier material(s) between the gate18and the transistor channel.

Further, it is understood that devices10A,10B can comprise additional layers and/or structures, which are not shown for clarity, but which may be included by a person of ordinary skill in the art based on a desired set of operating characteristics for the device10A,10B. To this extent, each device10A,10B can comprise any type of FET now known or later developed. For example, a device10A,10B can comprise a heterostructure FET (HFET), an inverted heterostructure FET, a junction FET, an insulated gate FET, a metal semiconductor FET, a doped channel metal-semiconductor FET, a metal oxide semiconductor FET, a metal insulator semiconductor FET, a doped channel metal-insulator-semiconductor FET, high electron mobility transistor, double heterostructure FET, etc.

Each device10A,10B can be configured to operate as a transistor switch in a radio frequency (RF) circuit. For example, a device10A,10B can be implemented as a switch in a circuit that is incorporated into any type of apparatus requiring such a switch, such as a high power, high frequency solid state apparatus. Illustrative apparatuses include radars, detectors, power amplifiers, rectifiers, wireless communication units, all types of power converters, and/or the like.

To this extent,FIG. 2Ashows an illustrative circuit30including a device10implemented as an RF switch according to an embodiment. In particular, circuit30is an RF transmission line that includes an RF input, an RF output, and a device, such as device10A ofFIG. 1Aas an illustrative example, which operates as an RF switch between the RF input and the RF output. Referring toFIGS. 1A and 2A, device10is operated by applying a voltage, VG, to the gate18of the device10A. The inclusion of barrier layer24enables device10A to achieve frequency dependent effective separation between gate18and the device channel when device10A is operated as a switch within circuit30. Such frequency dependence affects both the threshold voltage and the gate-to-channel capacitance.

At direct current (DC) or low (e.g., switching) frequencies (e.g., frequencies below approximately 1 MHz), the barrier layer24is equivalent to a conductor. To this extent, as shown inFIG. 2B, gate18has an effective position that is directly on the second layer16. In this case, the equivalent gate-channel separation is small and the threshold voltage is low. However, at high (e.g., microwave) frequencies (e.g., frequencies typically ranging from approximately 100 MHz to several tens or hundreds of GHz), the barrier layer24has a capacitive impedance. As a result, an effective position of the gate18is much higher than the second layer16(as shown inFIG. 1A), providing a gate-to-channel separation that is much larger as compared to that at DC or low frequencies. In this case, the device gate capacitance is low whereas an effective threshold voltage, and therefore the linearity and switching powers, are much higher.

A threshold voltage, VT, for device10A can be estimated as qns/CB, where q is the charge of an electron, nsis the equilibrium sheet electron concentration in the channel, and CBis the capacitance of the barrier layer24material per unit area. For device10A operating at DC or low frequencies, CBis given by the capacitance of layer16(e.g., a thin AIGaN layer) since barrier layer24is conducting, and can be estimated as CB—DC≈εA/dA, where εAand dAare the permittivity and the thickness of the bottom part of the barrier material (e.g., layer16). For device10A operating at high frequencies, the threshold voltage can be estimated as CB—RF≈εd/dd, where εdand ddare the permittivity and the thickness, respectively, of the top part of the barrier material (e.g., barrier layer24). Since dd>>dAand εd<εAis also possible, CB—RF<<CB—DC. As a result, the corresponding threshold voltage for device10A operating at a high frequency is much higher than the corresponding threshold voltage for device10A operating at a low frequency.

Illustrative properties of devices10A,10B are further described with reference to a typical prior art heterostructure field effect transistor (HFET) and implementation of devices10A,10B as an RF switch. To this extent,FIG. 3Ashows a prior art HFET2andFIGS. 3B and 3Cshow equivalent ON state and OFF state circuits of a FET when operated as an RF switch. As illustrated, HFET2includes a substrate12, a first layer14, and a second layer16, each of which can be formed similar to the corresponding layers of devices10A,10B (FIGS. 1A,1B). Additionally, HFET2includes a gate18formed on second layer16and source contact20and drain contact22to the device channel formed between layers14,16.

FIG. 3Bshows an equivalent ON state circuit34for a FET being operated as a RF switch. As illustrated, when the RF switch is in the ON state, e.g., VG=0,the RF switch adds a resistance, Ron, between source contact20and drain contact22to the overall circuit. However, when the RF switch is in the OFF state, e.g., VG<VT,FIG. 3Cshows the equivalent OFF state circuit36, which shows the RF switch acting as a capacitor having a capacitance, Coff, between source contact20and drain contact22within the circuit.

FIG. 4shows a typical dependence of the required transistor OFF state capacitances, COFF, to achieve twenty decibel (dB) and thirty dB isolation for various operating frequencies. Additionally, a dashed line shows a typical OFF state capacitance of a one millimeter (mm) wide group III-N HFET2(FIG. 3A) with a one micrometer (μm) long gate. As illustrated, HFET2does not provide sufficient capacitance to obtain 20 or 30 db isolation at the various operating frequencies.

FIG. 5shows simulated frequency dependence of the threshold voltage for an illustrative device10A (FIG. 1A) according to an embodiment. In this case, device10A has a device width, W=0.1 centimeters (cm) and a gate length, LG=1e−4 cm, and an equilibrium channel sheet electron concentration, ns0=1×1013cm−2. Further, device10A includes an AlGaN barrier layer16(FIG. 1A) having a thickness, db, of approximately 200e-8 cm and a relative permittivity, εb=9.Barrier layer24(FIG. 1A) is formed of conducting material (e.g., conducting polymers, poly-silicon, low-doped semiconductor, etc.) having a thickness, dd, of approximately 1e-4 cm, a relative dielectric permittivity, εd=2,and a resistivity, ρ=50 Ω×cm. As illustrated, when operated as an RF switch, device10A has a threshold voltage that significantly depends on the operating frequency. In particular, the threshold voltage of device10A is relatively low in a frequency range from DC to a cut-off frequency (of approximately 100 MHz), and significantly increases at operating frequencies higher than the cut-off frequency. When compared to a prior art FET2(FIG. 3A), which has a voltage threshold, VT-HFET, of −4.1 Volts, the voltage threshold of device10A, VT-eq, is substantially higher, e.g., up to approximately 200 times higher, at frequencies above the cut-off frequency.

FIG. 6shows the frequency dependence of the equivalent gate-channel capacitance for an illustrative device10A (FIG. 1A) according to an embodiment. In this case, device10A has the same parameters as the device described in conjunction withFIG. 5. As illustrated, when operated as an RF switch, device10A has an OFF state capacitance that significantly depends on the operating frequency. In particular, the OFF state capacitance of device10A is relatively high in a frequency range from DC to a cut-off frequency (e.g., approximately 100 MHz), and significantly decreases at operating frequencies higher than the cut-off frequency. When compared to a prior art FET2(FIG. 3A), which has an OFF state capacitance, CG-HFET, the OFF state capacitance of device10A, CG-eq, is substantially smaller at frequencies above the cut-off frequency, and particularly at frequencies above 1 GHz.

FIG. 7shows the frequency dependence of a maximum switching RF power for an illustrative device10A (FIG. 1A) according to an embodiment. In this case, device10A has the same parameters as the device described in conjunction with FIG.5. For comparison, the maximum switching power of a regular HFET2(FIG. 3A) with identical gate bias, barrier layer16(FIG. 1A) thickness, gate length, and width is shown. As illustrated, when operated as an RF switch, device10A has a maximum switching power that significantly depends on the operating frequency. In particular, the maximum switching RF power of device10A is relatively low in a frequency range from DC to a cut-off frequency (e.g., approximately 100 MHz), and significantly increases at operating higher than the cut-off frequency. At frequencies above the cut-off frequency, and particularly above 1 GHz, the maximum switching power of device10A well exceeds the maximum switching power of the corresponding regular HFET2, PHFET, which is approximately 0.25 Watts.

FIG. 8shows the frequency dependence of RF isolation in the OFF state for an illustrative device10A (FIG. 1A) according to an embodiment. In this case, device10A has the same parameters as the device described in conjunction withFIG. 5. For comparison, the isolation of a regular HFET2(FIG. 3A) with identical gate bias, barrier layer16(FIG. 1) thickness, gate length, and width is shown. As illustrated, when operated as an RF switch, device10A has an OFF state isolation that is extremely low (e.g., below −50 decibels) in a frequency range from DC to a cut-off frequency (e.g., approximately one GHz), and increases at operating frequencies higher than the cut-off frequency. However, for all frequencies, the OFF state isolation for device10A remains substantially below the OFF state isolation of HFET2.

As illustrated byFIGS. 5-8, device10A,10B (FIG. 1A,1B) can concurrently provide a low threshold voltage for DC/low frequency operation, a low OFF state capacitance, and extremely high RF signal linearity and switching powers during high frequency operation. This combination of operating parameters can provide the best performance for any transistor-based switching device, circuit, etc. As described herein, the combination can be achieved through a frequency-dependent threshold voltage, which results from frequency-dependent dielectric permittivity and/or conductivity of the material between the gate18(FIG. 1A,1B) and the channel of device10A,10B.

While shown and described herein as a transistor configured for improved RF switch performance, it is understood that aspects of the invention further provide various alternative embodiments. For example, in one embodiment, the invention provides a method of manufacturing such a transistor. The transistor can be manufactured using any solution. For example, referring toFIGS. 1A and 1B, devices10A,10B can be manufactured by initially obtaining a heterostructure including substrate12, first layer14, and second layer16. In an embodiment, the heterostructure is formed by obtaining a substrate12, forming the first layer14on the substrate12, and forming the second layer16on the first layer14. Regardless, barrier layer24and/or intermediate layer28can be formed on the second layer16using any solution. For example, each layer24,28can be formed on a previous layer. Additionally, the source contact20and drain contact22can be formed. In an embodiment, source contact20and drain contact22are formed by selectively etching (e.g., applying a mask, etching, removing the mask, and/or the like) barrier layer24, intermediate layer28, and/or second layer16, and forming source contact20and drain contact22in the etched regions. Further, gate18can be formed on barrier layer24using any solution. As used herein, it is understood that “form” includes any combination of various processes, which can be utilized to form a layer of material, including, but not limited to depositing material(s), growing material(s), etching material(s), and/or the like.

In another embodiment, the invention provides a field effect transistor-based switch in which at least one field effect transistor of the switch is configured as described herein. In still another embodiment, the invention provides a circuit that includes a field effect transistor-based switch in which at least one field effect transistor of the switch is configured as described herein. Still further embodiments provide an apparatus, such as a radar, a detector, a power amplifier, a rectifier, a wireless communication unit, a power converter, and/or the like, which includes at least one field effect transistor as described herein.

The foregoing description of various aspects of the invention has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed, and obviously, many modifications and variations are possible. Such modifications and variations that may be apparent to an individual having ordinary skill in the art are included within the scope of the invention as defined by the accompanying claims.