Projection display apparatus and display method

A projection display apparatus includes a processing circuit and an image projection display device. The processing circuit is configured to perform a dynamic motion compensation based on two successive first frame and second frame in a first video signal, in order to generate a complement frame between the first frame and the second frame. The processing circuit is further configured to combine the first frame and the complement frame into a third frame, and to decompose the third frame to generate a plurality of fourth frames and to output the fourth frames as a second video signal. A resolution of the first video signal is higher than a resolution of the second video signal. The image projection display device is configured to project and display the second video signal, in which the imaging device has an original resolution equal to the resolution of the second video signal.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority to China Application Serial Number 201910133086.8, filed Feb. 22, 2019, which is herein incorporated by reference in its entirety.

BACKGROUND

Technical Field

The present disclosure relates to a projection display apparatus and a display method, and in particular to a projection display apparatus and a display method applied to frame insertion and resolution improvement.

Description of Related Art

An image having a high resolution provides clear detail(s) and high quality of viewing, and is thus helpful for improving the user experience and many applications. Many video signals have been developed to have a resolution of 4K (3840×2160), even reaching a resolution of 8K (7680×4320). For now, a general projection display apparatus lacks a projection display component corresponding to the resolution of 8K apparatus. Therefore, the resolution of 8K is not supported by current projection display apparatus.

SUMMARY

An aspect of the present disclosure relates to a projection display apparatus. The projection display apparatus includes a processing circuit and an image projection display device. The processing circuit is configured to perform a dynamic operation compensation according to a first frame and second frame in a first video signal to generate a complement frame between the first frame and the second frame, and to combine the first frame and the complement frame into a third frame, in which the first frame and the second frame are continuous frames, and the processing circuit is further configured to decompose the third frame to generate a plurality of fourth frames, and to output the plurality of fourth frames as a second video signal, and a resolution of the first video signal is higher than a resolution of the second video signal. The image projection display device is configured to project and display the second video signal, in which the image projection display device has an original resolution equal to the resolution of the second video signal.

An aspect of the present disclosure relates to a display method, and the display method includes the following operations: performing a dynamic operation compensation on a first frame and a second frame in a first video signal to generate a complement frame between the first frame and the second frame, and combining the first frame and the complement frame are a third frame, in which the first frame and the second frame are continuous frames; decomposing the third frame to generate a plurality of fourth frames, and outputting the plurality of fourth frames as a second video signal, in which a resolution of the first video signal is higher than a resolution of the second video signal; and displaying the second video signal by an image projection display device.

As described above, the projection display apparatus and the display method provided by the embodiments of the present disclosure can generate a higher resolution image by using a projection apparatus that has lower original resolution.

DETAILED DESCRIPTION

The terms used in this specification generally have their ordinary meanings in the art. The above vocabulary is defined in the commonly used dictionary, and any examples of the use of the vocabulary discussed herein are included in the description of the specification, and are not intended to limit the scope and meaning of the disclosure. Likewise, the disclosure is not limited to various embodiments given in this specification.

The terms “comprises”, “includes”, etc., as used herein, are all open terms, meaning “including but not limited to”. Further, “and/or” as used herein includes any one or combination of one or more of the associated listed items.

In order to explain a display method600ofFIG. 6, various related terms or elements will be sequentially described with reference toFIGS. 1 to 5.

Referring toFIG. 1,FIG. 1is a schematic diagram of a projection display apparatus100according to some embodiments of the present disclosure. In some embodiments, the projection display apparatus100is configured to receive a video signal having high resolution, and to use an image projection device which has a lower original resolution to generate an image of the video signal, and to make the image have the aforementioned high resolution equivalently.

For example, in some applications, the projection display apparatus100is configured to receive a first video signal SIN having a specification of 8K60 Hz. The projection display apparatus100further employs an image projection display device120having a resolution of 4K, in order to generate the image (i.e., second video signal SOUT) that is able to provide an effect of 8K resolution effect for human eye, in which the real output specification of the image is 4K240 Hz. In different applications, the projection display apparatus100may be a digital television, a digital micro mirror, a home projector, a professional projector, etc.

In some embodiments, the projection display apparatus100includes a processing circuit110and the image projection display device120. In some embodiments, the processing circuit110is configured to perform operation(s) of a display method600described below, in order to generate a projection image.

In some embodiments, the processing circuit110may include image processing circuit(s), which may include, for example, a dynamic blur suppression circuit (not shown), an image processing circuit (not shown), a color management circuit (not shown), etc. The processing circuit110also includes at least one control circuit (not shown) that is configured to control operation(s) and timing of the above image processing circuits. The dynamic blur suppression circuit can perform dynamic estimation or compensation (for example, a dynamic operation compensation described later) according to the first video signal SIN to improve the sharpness or smoothness of the image. The image processing circuit is configured to perform operations ofFIG. 3and/orFIG. 4described later. The color management circuit is configured to perform operations (e.g., color separation) according to operational requirements.

In some embodiments, the processing circuit110can be a combination of processor and memory, in which the functions of the image processing circuits (e.g., dynamic blur suppression circuit, image processing circuit, color management circuit, etc.) may be implemented with at least one computer program code and stored in the memory for use by the processor.

In some embodiments, the processor is a central processing unit (CPU), an application-specific integrated circuit (ASIC), a multi-processor, a decentralized processing system, or a suitable processor.

In some embodiments, the memory is a non-transitory computer readable medium. In some embodiments, the computer readable medium is an electrical, magnetic, optical, infrared, and/or semiconductor system (or apparatus or device). For example, non-transitory computer readable medium includes semiconductor or solid state memory, magnetic tape, removable computer diskettes, random access memory (RAM), read only memory (ROM), hard disk and/or optical magnetic dish. In some embodiments, the computer readable medium includes a CD-ROM, a CD-R/W, and/or a digital video disc (DVD).

The above embodiments regarding the processing circuit110are given for illustrative purposes, but the present disclosure is not limited thereto. Various circuits or units to implement the processing circuit110are within the scope of the present disclosure.

In some embodiments, the image projection display device120may include a digital micro mirror element121, a multi-axis shifting device122, a lens123, and a light source124.

In some embodiments, the digital micro mirror element121may include a matrix formed with a plurality of micro mirrors (not shown). With light transmitted by the light source124, the digital micro mirror element121can project the image via the lens123. In some embodiments, the multi-axis shifting device122can be activated by the projection display apparatus100according to the resolution of the first video signal SIN.

In some embodiments, the multi-axis shifting device122can include two sets of voice coil motors (not shown) and a lens (not shown). One set of voice coils can drive the lens to shift the image projected by the digital micro mirror element121along a first axial direction (e.g., a vertical axis). Another set of voice coil motors can drive the lens, in order to shift the image in a second axial direction (e.g., horizontal axis) projected by the digital micro mirror element121. With the above operation, the resolution of the screen can be equivalently improved. Detailed operation(s) of the shifting will be described later with reference toFIG. 5.

In some embodiments, the image projection display device120has an original resolution of 3840×2160 (also known as 4K resolution). In some applications, the resolution of the first video signal SIN received by the processing circuit110is higher than the original resolution of the image projection display device120. For example, the resolution of the first video signal SIN can be 7680×4320 (also referred to as 8K resolution).

In some related approaches, when the resolution of the received video signal is greater than the original resolution of the projection display device, the projection display device can only present the image having the original resolution. Compared with the above approaches, by executing the display method600, the projection display apparatus100of the embodiment of the present disclosure can provide the projection image with high resolution via the image projection display device120that has a lower original resolution.

FIG. 2is a schematic diagram illustrating an operation200of a dynamic operation compensation according to some embodiments of the present disclosure. As shown inFIG. 2, the specification of a first video signal210(i.e., the first video signal SIN inFIG. 1) is 8K60 Hz.

The first video signal210includes a plurality of continuous frames, which includes, for example, a first frame211and a second frame212. In some embodiments, the processing circuit110performs a dynamic operation compensation according to the first frame211and the second frame212to generate a complement frame230, and inserts the complement frame230between the first frame211and the second frame212. The aforementioned first frame211and second frame212may be any two continuous frames in the first video signal210. For example, the processing circuit110performs the dynamic operation compensation according to the second frame212and its next frame (not shown) to generate the complement frame, and the complement frame is inserted between the second frame212and the aforementioned next frame (not shown). With this analogy, the specification of the processed video signal can be increased to 8K120 Hz. In some embodiments, the above term “continuous” means that two frames are continuous in time, or that two frames are associated with each other based on the encoding, but the present disclosure is not limited thereto.

In some embodiments, the aforementioned dynamic operation compensation is an image processing method of motion estimation and motion compensation (MEMC). In some embodiments, this image processing method includes operations of de-interlacing and/or motion interpolation. The above dynamic operation compensation is given as an example, and the present disclosure is not limited thereto. The various types of dynamic operation compensation are within the scope of this disclosure.

FIG. 3is a schematic diagram of an operation300of combining the first frame211and the complement frame230inFIG. 2according to some embodiments of the present disclosure.

In some embodiments, the image of each of the first frame211and/or the complement frame230is formed with a plurality of row data, in which the each one of the row data may contain multiple image data values (e.g., pixel values). In some embodiments, the processing circuit110is configured to interleave a plurality of odd row data of the first frame211with a plurality of even row data of the complement frame230to generate the third frame320.

For example, first row data310and second row data314of the third frame320inFIG. 3are the first row data and the third row data of the first frame211, respectively. Second row data312and fourth row data316of the third frame320are the second row data and the fourth row data of the complement frame230, respectively.

FIG. 4is a schematic diagram of an operation400of combining a fourth frame according to some embodiments of the present disclosure. In some embodiments, the processing circuit110can decompose the third frame320ofFIG. 3into a plurality of blocks (e.g., blocks410,412,414, and416), and generate a plurality of fourth frames (e.g., frames420,422,424, and426) according to different pixel data of each of the blocks.

For example, as shown inFIG. 4, the processing circuit110may decompose the plurality of pixel data of third frame320into the plurality of blocks410,412,414, and416. The different pixel data of each of the plurality of blocks410,412,414and416are arranged according to a predetermined direction. For example, as shown inFIG. 4, the above predetermined direction may be a clockwise direction. The plurality of pixel data of each of the blocks410,412,414, and416are sequentially arranged in a clockwise direction from an upper left corner of the corresponding block. For example, the plurality of pixel data are sequentially arranged in the upper left corner, the upper right corner, the lower right corner, and the lower left corner of the corresponding block, and are sequentially numbered as the plurality of pixel data 1 to 4.

The processing circuit110can generate a corresponding one of the plurality of fourth frames (e.g., frames420,422,424, and426) according to the corresponding pixel data of each of the plurality of blocks410,412,414and416. For example, the processing circuit110can combine the pixel data 1 of each of the plurality of blocks410,412,414, and416into the fourth frame420, and combine the pixel data 2 of each of the plurality of blocks410,412,414, and416into the fourth frame422. With this analogy, the processing circuit110can combine the plurality of pixel data 3 into the fourth frame424and combine the plurality of pixel data 4 into a fourth frame426. Finally, the processor110strings all the generated fourth frames into a second video signal430.

Explained in another way, taking a frame having a size of 4×4 pixels as an example, the processing circuit110sequentially decomposes the 16 pixel points of the third frame320into the upper left block410, the upper right block412, the lower right block414, and the lower left block416. The 4 pixel points of each block are sequentially located at the upper left, upper right, lower right and lower left corners and numbered. The pixel points that have the same number in the four blocks are the combined into new frames (e.g., fourth frames420,422,424, and426).

In some embodiments, as shown inFIG. 4, each of the third frames320can be decomposed into the four fourth frames (e.g., frames420,422,424, and426). The specification of the second video signal430that is formed with all of the fourth frames (e.g., frames420,422,424, and426), can be equivalently adjusted to 4K240 Hz.

FIG. 5is a schematic diagram of an operation500of periodically shifting and projecting according to some embodiments of the present disclosure. In some embodiments, the aforementioned multi-axis shifting device122can be used to periodically shift and to project the second video signal430in a clockwise direction, in order to produce the projection image with higher resolution. Due to the visual persistence of the human eye, the projection image perceived by the user can be equivalently regarded as four overlapped frames that have the 4K resolution. As a result, the resolution of the projection image perceived by the user is equivalently improved to be 8K resolution.

In some embodiments, the original image position510ofFIG. 5represents an original position where the original image position projected by the digital micro mirror element121through the lens123when the multi-axis shifting device122is not operating (without shifting).

In some embodiments, the shifting caused by the multi-axis shifting device122made according to a predetermined direction (e.g., the aforementioned clockwise direction). For example, the operations shifting and projecting performed by the multi-axis shifting device122are to shift the image of the second video signal430(i.e., the fourth frame420) from the original image position510to a projection position511. The images of the second video signal430(i.e., the fourth frames422,424, and426) are then sequentially moved to a projection position512, a projection position513, and a projection position514in a clockwise direction. Because of the visual persistence of the human eye, the final rendered image is the image520.

FIG. 6is a flow chart of a display method600of the projection display apparatus100according to some embodiments of the present disclosure. For ease of understanding, the display method600will be described with reference to the aforementioned projection display apparatus100and operations in theFIGS. 2 to 5.

In operation S610, the first video signal210is received and the dynamic operation compensation between the first frame211and the second frame212is performed to generate a complement frame230.

The operation S610can be understood with reference to the operation200ofFIG. 2, and thus the description will not be repeated. In some embodiments, via the dynamic operation compensation, a new frame is inserted in every two consecutive image of the first video signal210, in order to improve the continuity of the dynamic image. If frames per second of the video are more, the smoothness of the rendered dynamic image is better.

In operation S620, the plurality of odd row data of the first frame211and the even row data of the complement frame230are combined into the third frame320.

The operation S620can be understood with reference to the operation300ofFIG. 3, and thus the description will not be repeated here. In some embodiments, the processing circuit110generates a third frame320by utilizing odd data in the first frame211and even row data in the complement frame230, in order to extend the effect of the image continuity enhanced by the operation200of the previous dynamic operation compensation.

In operation S630, the third frame320is decomposed into the plurality of blocks410,412,414and416, and the fourth frames420,422,424, and426are generated according to the different pixel data 1-4 of each of the plurality of blocks410,412,414and416. The operation S630can be understood with reference toFIG. 4, and thus the description will not be repeated here.

In operation S640, all of the generated fourth frames410,412,414and416are outputted as the second video signal430.

In operation S650, the second video signal430is periodically shifted and projected by the image projection display device120, in order to generate the projection image.

In some embodiments, the operation of periodically shifting and projecting is to overlap the fast shifting projection of images with each other to form a single image by utilizing the visual persistence characteristics of the human eye, resulting in an effect of increasing the resolution.

For example, as shown inFIGS. 4 and 5, the second video signal430includes four fourth frames. The image projection display device120periodically shifts and projects the second video signal430, and the four fourth frames are overlapped with each other and shown as one image with high resolution due to the visual persistence of the human eye.

In some embodiments, if the maximum resolution provided by the current projection display apparatus100is 4K, the resolution of the image can be increased to 8K with the above operation(s) and processing(s).

In the above specifications of the video signal, the 4K resolution refers to a level at which the horizontal resolution of the display apparatus or display content reaches four thousand pixels, and the vertical resolution reaches two thousand pixels. The length and width of 4K videos are about 4096×2160 or 3840×2160. The length and width of 8K videos are about 7680×4320. The total pixel size of the 8K specification is four times higher than the total pixel size of the 4K specification.

In the above video signal specification, 60 Hz (hertz) in 4K60 Hz represents the frame rate, i.e., a number of frames (images) are displayed per second. If more frames are displayed per second, the video will be smoother.

Various values of the resolution and/or frame rate mentioned in the above various embodiments are used for the examples, and the present disclosure is not limited thereto. Various resolutions and/or frame rates are within the scope of this disclosure.

The multiple operations in the above control method600are only examples. It is not limited to be performed in the order in this example. Various operations of the display method600may be appropriately added, replaced, omitted, or performed in a different order, without departing from the operation and scope of the embodiments of the present disclosure.

As described above, the projection display apparatus and the display method provided by the embodiments of the present disclosure can generate a higher resolution image by using a projection apparatus that supports lower native resolution.

Although the present disclosure has been disclosed in the above embodiments, but it is not limited thereto. Anyone who is familiar with this skill can make various changes and refinements without departing from the spirit and scope of this disclosure. Therefore, the scope of protection of this disclosure is subject to the definition of the scope of the patent application attached.