Buffered audio system with synchronizing bus controller

An audio system includes an audio client device and an access point. The audio client device includes a buffer, a clock generator, a bus controller, a bus receiver, and a control module. The buffer is configured to receive a stream of samples of audio data. The clock generator is configured to generate a first clock signal. The bus controller is configured to read samples from the buffer for transmission across a bus using the first clock signal. The bus receiver is configured to receive samples from the bus controller and output a sampling clock along with each sample. The control module is configured to analyze activity of the buffer and modify operation of the bus controller to synchronize the sampling clock with a remote sampling clock. The access point includes an audio content module, a decoding module, and a network interface that wirelessly transmits the stream of samples.

FIELD OF THE INVENTION

The present invention relates to transmitting media streams, and more specifically audio/video streams, over a wireless link.

BACKGROUND OF THE INVENTION

Referring now toFIG. 1, a functional block diagram of an exemplary transmission system according to the prior art is presented. The system includes an access point102and a client device104. The access point102includes a wired Internet connection106, an encoder108, a processor110, and a network interface112. The client device104includes a network interface120, a fixed-rate MP3 (MPEG layer 3) decoder122, and a 2.5 millimeter audio jack124. The wired Internet connection106receives media information from a distributed communications system such as the Internet. This media information is communicated to the processor110, which communicates it to the encoder108. The encoder108compresses the media information using a coding scheme such as MP3. The processor110communicates the compressed media information to the network interface112.

The network interface112transmits, optionally using antenna126, the compressed media information, which is received by the network interface120, optionally using antenna128, of the client device104. The network interface120communicates the compressed media information to the decoder122. The decoder122decodes the compressed media information and outputs the uncompressed media information to the audio jack124. The system depicted here attempts to save power at the client device104, which may be running on batteries, by transmitting compressed media information and therefore using as little bandwidth as possible.

SUMMARY OF THE INVENTION

An access point comprises an audio content module that generates a content signal based upon characteristics of an incoming media stream; a decoding module that decodes the incoming media stream into an uncompressed media stream at a bit rate determined by the content signal from the audio content module; and a network interface that transmits the uncompressed media stream from the decoding module.

In other features, the content signal indicates one of voice content and music content. The characteristics used by the audio content module include tags associated with the incoming media stream. The characteristics used by the audio content module include tags associated with individual portions of the incoming media stream. The characteristics used by the audio content module include frequency content of the incoming media stream. The decoding module creates the uncompressed media stream using pulse width modulation (PWM). The content signal indicates one of voice content and music content.

In further features, the decoding module uses a first sample frequency and a first number of bits per sample when the content signal indicates voice content and uses a second sample frequency and a second number of bits per sample when the content signal indicates music content, wherein the first sample frequency is less than the second sample frequency and the first number is less than the second number. The decoding module creates the uncompressed media stream in mono when the content signal indicates voice content. The decoding module creates the uncompressed media stream in stereo when the content signal indicates music content.

In still other features, a media playback system comprises the access point and a client device that communicates with the access point. The client device comprises a wireless network interface that wirelessly receives the uncompressed media stream and a digital to analog converter that converts the received uncompressed media stream to an analog signal. The client device further comprises an amplifier that amplifies the analog signal and an output module that outputs the amplified analog signal.

A method comprises generating a content signal based upon characteristics of an incoming media stream; decoding the incoming media stream into an uncompressed media stream at a bit rate determined by the content signal; and wirelessly transmitting the uncompressed media stream. The content signal indicates one of voice content and music content. The characteristics include tags associated with the incoming media stream. The characteristics include tags associated with individual portions of the incoming media stream.

In other features, the characteristics include frequency content of the incoming media stream. The uncompressed media stream is in pulse width modulation (PWM) format. The content signal indicates one of voice content and music content. The PWM format uses a first sample frequency and a first number of bits per sample when the content signal indicates voice content and uses a second sample frequency and a second number of bits per sample when the content signal indicates music content, wherein the first sample frequency is less than the second sample frequency and the first number is less than the second number.

In further features, the uncompressed media stream is mono when the content signal indicates voice content. The uncompressed media stream is stereo when the content signal indicates music content. The method further comprises wirelessly receiving the uncompressed media stream and converting the uncompressed media stream into an analog signal. The method further comprises amplifying the analog signal and outputting the analog signal.

An access point comprises audio content detecting means for generating a content signal based upon characteristics of an incoming media stream; decoding means for decoding the incoming media stream into an uncompressed media stream at a bit rate determined by the content signal from the audio content detecting means; and network interfacing means for transmitting the uncompressed media stream from the decoding means.

In other features, the content signal indicates one of voice content and music content. The characteristics used by the audio content detecting means include tags associated with the incoming media stream. The characteristics used by the audio content detecting means include tags associated with individual portions of the incoming media stream. The characteristics used by the audio content detecting means include frequency content of the incoming media stream. The decoding means creates the uncompressed media stream using pulse width modulation (PWM). The content signal indicates one of voice content and music content.

In further features, the decoding means uses a first sample frequency and a first number of bits per sample when the content signal indicates voice content and uses a second sample frequency and a second number of bits per sample when the content signal indicates music content, wherein the first sample frequency is less than the second sample frequency and the first number is less than the second number. The decoding means creates the uncompressed media stream in mono when the content signal indicates voice content. The decoding means creates the uncompressed media stream in stereo when the content signal indicates music content.

In still other features, a media playback system comprises the access point and a client device that communicates with the access point. The client device comprises wireless network interfacing means for wirelessly receiving the uncompressed media stream and digital to analog conversion means for converting the received uncompressed media stream to an analog signal. The client device further comprises amplifying means for amplifying the analog signal and outputting means for outputting the amplified analog signal.

A computer program stored for use by a processor comprises generating a content signal based upon characteristics of an incoming media stream; decoding the incoming media stream into an uncompressed media stream at a bit rate determined by the content signal; and wirelessly transmitting the uncompressed media stream. The content signal indicates one of voice content and music content. The characteristics include tags associated with the incoming media stream. The characteristics include tags associated with individual portions of the incoming media stream.

In other features, the characteristics include frequency content of the incoming media stream. The uncompressed media stream is in pulse width modulation (PWM) format. The content signal indicates one of voice content and music content. The PWM format uses a first sample frequency and a first number of bits per sample when the content signal indicates voice content and uses a second sample frequency and a second number of bits per sample when the content signal indicates music content, wherein the first sample frequency is less than the second sample frequency and the first number is less than the second number.

In further features, the uncompressed media stream is mono when the content signal indicates voice content. The uncompressed media stream is stereo when the content signal indicates music content. The computer program further comprises wirelessly receiving the uncompressed media stream and converting the uncompressed media stream into an analog signal. The computer program further comprises amplifying the analog signal and outputting the analog signal.

An audio client device comprises a buffer that receives a stream of samples of audio data; a clock generator that generates a first clock signal; a bus controller that reads samples from the buffer for transmission across a bus using the first clock signal; a bus receiver that receives samples from the bus controller and outputs a sampling clock along with each sample; and a control module that modifies operation of the bus controller to synchronize the sampling clock with a remote sampling clock based upon analysis of activity of the buffer. The control module alters a number of dummy bits transmitted by the bus controller based upon the analysis.

In other features, each audio data sample contains N bits, and the control module initially directs the bus controller to transmit a number of dummy bits equal to N. Alteration of the number of dummy bits is based upon a difference in quantity of samples received by the buffer and samples being read from the buffer. The quantity of samples received by the buffer includes samples lost prior to reaching the buffer. The buffer receives a first number of samples in a time period, a second number of samples are read from the buffer, and the number of dummy bits is decreased when the first number is greater than the second number.

In further features, a first number of samples are received by the buffer in a time period, a second number of samples are read from the buffer, and the number of dummy bits is increased when the first number is less than the second number. The buffer receives samples in blocks, each block containing P samples. P is greater than one and the bus controller reads samples from the buffer one at a time. The control module waits to modify operation of the bus controller until the buffer has received a first number of blocks. The first number is determined based upon granularity of modification of the bus controller.

In still other features, the clock generator includes a clock divider module that divides an internal clock signal by a divisor D to create the first clock signal. The control module selectively changes the divisor D to modify operation of the bus controller. The control module changes the divisor D for transmission by the bus controller of every one out of S samples, wherein S is an integer greater than one. The bus is an I2S bus, the bus controller is an I2S bus controller, and the bus receiver is an I2S bus receiver.

A method comprises buffering a stream of samples of audio data; generating a first clock signal; transmitting buffered samples across a bus using the first clock signal; outputting samples received from the bus along with a sampling clock; and modifying operation of the transmitting to synchronize the sampling clock with a remote sampling clock based upon analysis of activity of the buffering. The modifying includes altering a number of dummy bits used by the transmitting based upon the analysis.

In other features, each audio data sample contains N bits, and the transmitting initially sets the number of dummy bits equal to N. The altering is based upon a difference in quantity of samples received by the buffering and quantity of samples read by the transmitting. The quantity of samples received includes samples lost prior to the buffering. The buffering buffers a first number of samples in a time period, the transmitting reads a second number of buffered samples in the time period, and further comprising decreasing the number of dummy bits when the first number is greater than the second number.

In further features, the buffering buffers a first number of samples in a time period, the transmitting reads a second number of buffered samples in the time period, and further comprising increasing the number of dummy bits when the first number is less than the second number. The buffering is performed in blocks of samples, wherein each block contains P samples. P is greater than one, and the transmitting reads buffered samples one at a time. The modifying is performed after the buffering has received a first number of blocks.

In still other features, the method further comprises determining the first number based upon granularity of the modifying. The generating the first clock signal includes dividing an internal clock signal by a divisor D. The modifying includes selectively changing the divisor D. The modifying includes changing the divisor D for every one out of S samples transmitted by the transmitting, wherein S is an integer greater than one. The transmitting is performed using Inter-IC Sound (I2S).

An audio client device comprises buffering means for receiving a stream of samples of audio data; clock generating means for generating a first clock signal; bus controlling means for reading samples from the buffering means for transmission across a bus using the first clock signal; bus receiving means for receiving samples from the bus controlling means and outputting a sampling clock along with each sample; and controlling means for modifying operation of the bus controlling means to synchronize the sampling clock with a remote sampling clock based upon analysis of activity of the buffering means. The controlling means alters a number of dummy bits transmitted by the bus controlling means based upon the analysis.

In other features, each audio data sample contains N bits, and the controlling means initially directs the bus controlling means to transmit a number of dummy bits equal to N. Alteration of the number of dummy bits is based upon a difference in quantity of samples received by the buffering means and samples being read from the buffering means. The quantity of samples received by the buffering means includes samples lost prior to reaching the buffering means. The buffering means receives a first number of samples buffering means in a time period, a second number of samples are read from the buffering means, and the number of dummy bits is decreased when the first number is greater than the second number.

In further features, a first number of samples are received by the buffering means in a time period, a second number of samples are read from the buffering means, and the number of dummy bits is increased when the first number is less than the second number. The buffering means receives samples in blocks, each block containing P samples. P is greater than one and the bus controlling means reads samples from the buffering means one at a time. The controlling means waits to modify operation of the bus controlling means until the buffering means has received a first number of blocks. The first number is determined based upon granularity of modification of the bus controlling means.

In still other features, the clock generating means includes clock dividing means for dividing an internal clock signal by a divisor D to create the first clock signal. The controlling means selectively changes the divisor D to modify operation of the bus controlling means. The controlling means changes the divisor D for transmission by the bus controlling means of every one out of S samples, wherein S is an integer greater than one. The bus is an I2S bus, the bus controlling means is an I2S bus controlling means, and the bus receiving means is an I2S bus receiving means.

A computer program stored for use by a processor comprises buffering a stream of samples of audio data; generating a first clock signal; transmitting buffered samples across a bus using the first clock signal; outputting samples received from the bus along with a sampling clock; and modifying operation of the transmitting to synchronize the sampling clock with a remote sampling clock based upon analysis of activity of the buffering. The modifying includes altering a number of dummy bits used by the transmitting based upon the analysis.

In other features, each audio data sample contains N bits, and the transmitting initially sets the number of dummy bits equal to N. The altering is based upon a difference in quantity of samples received by the buffering and quantity of samples read by the transmitting. The quantity of samples received includes samples lost prior to the buffering. The buffering buffers a first number of samples in a time period, the transmitting reads a second number of buffered samples in the time period, and further comprising decreasing the number of dummy bits when the first number is greater than the second number.

In further features, the buffering buffers a first number of samples in a time period, the transmitting reads a second number of buffered samples in the time period, and further comprising increasing the number of dummy bits when the first number is less than the second number. The buffering is performed in blocks of samples, wherein each block contains P samples. P is greater than one, and the transmitting reads buffered samples one at a time. The modifying is performed after the buffering has received a first number of blocks.

In still other features, the computer program further comprises determining the first number based upon granularity of the modifying. The generating the first clock signal includes dividing an internal clock signal by a divisor D. The modifying includes selectively changing the divisor D. The modifying includes changing the divisor D for every one out of S samples transmitted by the transmitting, wherein S is an integer greater than one. The transmitting is performed using Inter-IC Sound (I2S).

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Referring now toFIG. 2A, a functional block diagram of a power sensible media transmission scheme is depicted. An access point140includes a power supply141, a control module142, an audio content detector144, a decoder146, and a network interface148. The network interface148may communicate using an antenna150. The power supply141receives line power, such as from a wall receptacle or from Power over Ethernet, and powers the control module142, the audio content detector144, the decoder146, and the network interface148.

The control module142receives media information, such as audio and/or video information. The source of media information is discussed in more detail with respect toFIGS. 2B-2E. The audio content detector144and decoder146also receive the media information. The control module142communicates with the audio content detector144, a decoder146, and the network interface148. The audio content detector144determines characteristics of the media information. Based on these characteristics, the audio content detector144communicates a control signal to the decoder146.

The decoder146communicates decoded media information to the network interface148. The decoder146converts incoming media information into a format that requires little or no decoding, such as PCM (Pulse Code Modulation). Based on the control signal from the audio content detector144, the decoder146varies the bit rate of information outputted to the network interface148. For instance, high fidelity music may require more bandwidth than voice data; CD quality music may require 44.1 kHz of 16-bit stereo samples, while voice may only require 11.025 kHz of 8-bit mono (or monophonic; i.e., one channel, as compared to stereo, which uses two channels) samples. Alternately, voice may require 8 kHz of 8-bit mono samples.

When the audio content detector144determines that CD quality music is being transmitted, the decoder146may output 44.1 kHz PCM, in stereo, with eight bits per sample. This simple PCM data requires little to no processing capability on the part of client devices. Bandwidth requirements are attenuated by transmitting only the bandwidth required by the given media signal. This structure allows client devices to save power by eliminating the need for a DSP (digital signal processor) or other decoding device, while still limiting the bandwidth as much as possible.

The audio content detector144may function in a number of ways. The audio content detector144may analyze the time domain data or frequency spectrum of the media information to determine characteristics of the media information. The audio content detector144may also analyze tags stored with an incoming media file, such as MP3 tags, including ID3 and/or APEv2 tags. Files conforming to such formats as the RIFF (Resource Interchange File Format) format, and more specifically to the WAV (WAVeform audio format) format, are stored as sequences of portions. Each portion may be marked with a tag indicating the type of data that the portion contains. The audio content detector144can then instruct decoder146to transmit portions of the WAV file at a high frequency and resolution for those portions of the WAV file that are music, and at a lower frequency and/or resolution for those portions that are voice.

A first client device160includes a network interface162, a digital to analog converter (DAC)164, an output module166, and a battery168. The battery168provides power to the components of the client device160, and the network interface162may communicate via an antenna170. The network interface162receives uncompressed media information and communicates this information to the DAC164. An analog output of the DAC164is communicated outside of the client device160by the output module166. A second exemplary client device180includes a network interface182, a DAC184, an amplifier186, a transducer/audio connector188, and a battery190. The battery190provides power to the components of the second client device180, and the network interface182may communicate using an antenna192.

The network interface182communicates media information to the DAC184, which outputs an analog signal to the amplifier186. The amplifier186amplifies the signal and communicates it to the transducer/audio connector188. The transducer/audio connector188may be a transducer, such as a speaker, or may be an audio connector, such as a headphone jack or RCA connectors. The DAC184may be clocked based on the sample frequency of the incoming media. Alternatively, the DAC184may have a constant clock, while a buffer within the network interface182holds each incoming sample at its output for more than one clock cycle. For example, if the current incoming sample rate is one-fourth of the maximum sample rate, the clock for the DAC184may be set at the maximum sample rate, and the network interface182will hold each sample for four clock cycles.

The media information received by the access point140may come from an over-the-air source, a hard drive, the Internet, etc. Referring now toFIG. 2B, an exemplary functional block diagram of media information received via satellite radio is presented. A satellite radio broadcaster193-1broadcasts an encoded media stream. A satellite radio tuner193-2receives the encoded media stream, converts it to baseband, and communicates the media information encapsulated therein to the access point140.

Referring now toFIG. 2C, an exemplary functional block diagram of media information received via the Internet is presented. An Internet broadcaster194-1, a music server194-2, and a peer computer194-3communicate with a service provider194-4via the Internet194-5. The service provider communicates media information to the access point140. The Internet broadcaster194-1may be, for example, an Internet radio station or a streaming multicast shared with a TV or radio broadcaster. The music server194-2may be an online music service such as Napster or iTunes. Media information may be obtained from the peer computer194-3via peer-to-peer software, such as BitTorrent or Kazaa, or by client-server file transfer, such as FTP (file transfer protocol).

Referring now toFIG. 2D, an exemplary functional block diagram of media information received from a local source is presented. The local source197may include a CD/DVD drive198-1, a hard drive198-2, and/or audio software198-3. The CD/DVD drive198-1may contain music and/or video discs, or may be audio discs from which media information is obtained. Audio software198-3may include a MIDI sequencer (Musical Instrument Digital Interface) or studio audio creation software such as Sound Forge. The local source transmits media information to the access point140. The access point140and local source197may be combined within a single device, sharing a single chassis.

Referring now toFIG. 2E, an exemplary functional block diagram of media information received from a radio broadcaster is presented. A radio broadcaster199-1broadcasts a media stream using a modulation scheme such as AM or FM. A radio receiver199-2receives the media stream, demodulates it to baseband, and communicates the media information to the access point140.

Referring now toFIG. 3, an exemplary timing diagram of an exemplary serial bus is depicted. The serial bus may have characteristics including a clock signal, a data signal, and a delineation signal that indicates when the data signal transmits valid data. Such a serial bus is the I2S (Inter-IC Sound) bus. Philips Semiconductors I2S Bus Specification, revised Jun. 5, 1996 is incorporated herein by reference in its entirety. The I2S bus includes a clock, SCK200, a word select line, WS202, and a serial data line, SD204. SCK200has a period indicated by T1. The I2S bus specification dictates that in the clock cycle following a clock cycle where WS202has changed state, the MSB (most significant bit) of a word will be transmitted on SD204. The remaining bits of the word to be transmitted on SD204are sent in decreasing order of significance, until the LSB (least significant bit) is sent.

In the example ofFIG. 3, WS202is high in clock cycle206, as sampled by the rising edge of SCK200. At the next rising edge208of SCK200, WS202has changed to a low state. This indicates that at the following rising edge210of SCK200, the MSB of a word will be asserted on SD204. In the example ofFIG. 3, there are eight bits in each word, and the MSB of one word occurs in the clock cycle following the LSB of the previous word. This may not always be the case—there may be one or more clock cycles after the LSB of a word before the following MSB is indicated by WS202changing state.

Referring now toFIG. 4, an alternate exemplary timing diagram of an I2S bus is depicted. The I2S bus includes SCK220, WS222, and SD224. The period of SCK220is T2, which is half of T1ofFIG. 3. Because the period of SCK220is halved, edges of WS222occur more quickly in order to fall between rising edges of SCK220. The words transmitted on SD224still contain eight bits, and WS222has the same period as WS202ofFIG. 3. Because SCK220is twice as fast, the word is transmitted on SD224in half of the time, and the remaining bits until the following word begins are dummy bits. In this example, there are eight dummy bits, the values of which are irrelevant. If it is desired that the words be transmitted slightly faster, one fewer dummy bit can be included. The transition on WS222would thus occur one clock cycle earlier, and the MSB of one word would be one cycle closer to the LSB of the previous word. This situation is depicted inFIG. 5.

Referring now toFIG. 5, an exemplary timing diagram of an I2S bus having one fewer dummy bit thanFIG. 4is depicted. The I2S bus includes SCK230, WS232, and SD234. SD234transmits eight bits of a word, followed by seven dummy bits, followed by eight bits of the next word. Transmitting one fewer dummy bit causes the MSB of the following word to occur one clock cycle earlier than if there were eight dummy bits as inFIG. 4. For instance, an MSB indicated by238-1occurs one clock cycle earlier than the corresponding MSB ofFIG. 4. MSB238-2occurs two clock cycles earlier, while MSB238-3occurs three cycles earlier. With eight word bits and eight dummy bits, the removal of one dummy bit produces a 1/16thchange in the effective data rate. If each word was 32 bits (corresponding to two 16-bit audio samples) and an equal number of dummy bits were used, each dummy bit would produce a 1/64thchange in the data rate. This property may be used to finely change the data rate without having to vary SCK230.

Referring now toFIG. 6, a functional block diagram of an exemplary system employing a clock compensation scheme according to the principles of the present invention is presented. A broadcaster250includes a music source252and a network interface254. The music source252may include CDs, hard-drive-based files, and/or any other suitable media. This media information is transmitted by the network interface254. The network interface254may be a satellite uplink in the case of satellite broadcasting. An access point260includes a network interface262, a baseband processing module264, a decoding module266, and a network interface268. The network interface262receives media information, such as from the broadcaster250.

The network interface262may receive wireless Ethernet (such as IEEE 802.11), satellite, or other over-the-air programming. The network interface262outputs information to the baseband processing module264, which performs functions such as error correction and noise shaping. The baseband processing module264communicates an output to the decoding module266, which may decode incoming media data encoded with such algorithms as advanced audio coding (AAC) or advanced multi-band excitation (AMBE). The decoding module266then outputs data to the network interface268, which transmits the data using any appropriate communications method, such as IEEE 802.11.

A client device280includes a network interface282. The network interface282may receive media information from the network interface268of the access point260or may receive information directly from the network interface254of the broadcaster250. The network interface282communicates received information to a buffer284. Media information may be received by the network interface282, and thereby transmitted to the buffer284, in blocks. These blocks may contain fragments of audio information of fixed time length. For instance, XM satellite radio transmits 10 milliseconds of audio data (i.e., 441 samples for 44.1 kHz data) in each block. Blocks may also be created to conform to minimum transmission requirements of the network interface282. Each block is then loaded into the buffer284, possibly in rapid succession or even at a single time.

The buffer284communicates with an I2S controller286. A control module288communicates with the network interface282, the buffer284, the I2S controller286, and a clock divider290. The clock divider290receives signals from a clock generator292and outputs a divided clock, SCK, to the I2S controller286. The clock divider290may not be necessary in some implementations, and the clock generator292would then communicate directly with the I2S controller286. The I2S controller286reads samples from the buffer284and transmits them across an I2S bus to an I2S receiver294. The I2S receiver294outputs data to a digital to analog converter (DAC)296.

The DAC296may be a stereo DAC, and therefore may receive two parallel streams of data from the I2S receiver294. The stereo DAC296also receives a word select line, WS, from the I2S receiver294. WS serves as the clock for the DAC296. Alternatively, a version of WS doubled in frequency may serve as the clock for the DAC296. This can be accomplished by clocking the DAC296on both the rising and falling edges of WS. An output of the DAC296is communicated to an output module298, which, if the DAC296is stereo, will likely also be stereo.

In order to make the clock generator292easy to implement, instead of attempting to finely control the frequency of SCK, the number of dummy bits inserted by the I2S controller286can be varied by the control module288. Transmitting fewer dummy bits creates less gap between samples, and therefore increases the rate at which samples are removed from the buffer284. This is functionally similar to increasing the frequency of SCK and leaving the number of dummy bits unchanged. Varying the number of dummy bits will change the period of WS (used to sample the DAC296), and therefore will change the playback frequency. This may be desired to align the playback frequency of the DAC296with the source of the media information, such as the broadcaster250or with the access point260.

Referring now toFIG. 7A, a flowchart depicts exemplary operation of inbound sample counting. The number of samples received by the buffer284can be used to estimate the clock drift between the local WS clock and the remote sample clock (i.e., the sample clock of the transmitting music source). InCount represents the number of samples received by the buffer284ofFIG. 6since clock drift was last determined. In step300, InCount is incremented by the value SamplesPerBlock. Because the buffer284may receive samples in blocks, InCount is incremented by the number of samples in each block. Control repeats with step300, where InCount is incremented by SamplesPerBlock when the next block is added to the buffer284.

Referring now toFIG. 7B, a flowchart depicts exemplary alternative operation of inbound sample counting. If each block received by the network interface282ofFIG. 6contains a consecutive instance number, control can determine if blocks have been lost in communication (or decoded unsatisfactorily and therefore discarded). In step302, a variable k is set to the current block instance number minus the previous block instance number. If no blocks have been lost, the current instance number will be one greater than the previous instance number, and k will be set to one.

Control continues in step304where InCount is incremented by k*SamplesPerBlock. If, for example, a single block was lost prior to the current block, the current instance number will be two greater than the previous instance number, making k equal to 2. InCount is therefore incremented by the number of samples in each block the buffer should have received, even though some may have been lost. Control then returns to step302.

Referring now toFIG. 7C, a flowchart depicts exemplary operation of outbound sample counting. In step306, OutCount is incremented by one. OutCount represents the number of samples removed from the buffer284by the I2S controller286. Samples may be removed individually by the I2S controller286, and therefore OutCount is incremented by one. If I2S controller286removes multiple samples from the buffer284at once, OutCount will be incremented by that number of samples. Control repeats at step306, where OutCount is incremented when the next sample is removed from the buffer284.

Referring now toFIG. 8, a flowchart depicting exemplary steps taken to determine clock drift is presented. Control begins in step310, where InCount is set to 0, OutCount is set to 0, DummyBits is set to BitsPerSample, and AdjustRes is set to 1/(BitsPerSample+DummyBits). InCount represents the number of samples received by the buffer since clock drift was last determined. OutCount represents the number of samples removed from the buffer by the I2S controller since clock drift was last determined. BitsPerSample represents the number of bits contained in each sample. For instance, a stereo 16-bit source implies that BitsPerSample is 32, while a mono 8-bit source implies 8.

DummyBits is the number of bits to be added by the I2S controller286between an LSB of one word and the MSB of the next word. DummyBits may initially be set to any number. When there are an equal number of dummy bits and sample bits, the frequency of SCK generated will be half that of SCK generated in the absence of dummy bits. AdjustRes is the amount by which the clock can be changed by adding or removing a single dummy bit. SamplesPerBlock is the number of samples contained within each block transmitted to the network interface. For instance, if a block contains 10 milliseconds of 44.1 kHz audio, there are likely 441 samples in each block.

Control transfers to step312, where BlockError is set to SamplesPerBlock/InCount. Control continues in step314, where BlockError is compared to AdjustRes. If BlockError is less than AdjustRes, control continues in step316; otherwise control returns to step312. BlockError is a representation of the uncertainty in InCount due to the fact that InCount is incremented in large intervals. As InCount increases, BlockError decreases. Once BlockError is low enough, meaning that a single extra block received will not significantly alter the analysis, clock drift can be determined. The buffer may be able to store more than eight blocks of data to allow enough room for this algorithm to work.

In step316, Drift is computed by subtracting InCount from OutCount, and dividing the result by OutCount. Control then continues in step318, where the absolute value of Drift is compared to the sum of BlockError and AdjustRes. If the absolute value of Drift is greater than BlockError plus AdjustRes, control transfers to step320; otherwise control transfers to step322.

In step320, the absolute value of Drift is greater than the sum of BlockError and AdjustRes; therefore, the clock is beyond tolerance and may be compensated. A positive value of Drift means that more samples are being removed from the buffer than are being placed into it, and so the clock that removes samples from the buffer must be slowed. The clock is therefore compensated by the opposite of Drift. Control then continues in step322, where InCount and OutCount are set to zero. Control then returns to step312.

Referring now toFIG. 9, a flowchart depicts exemplary operation of the control module when compensating the clock by using dummy bits. The steps ofFIG. 8are represented inFIG. 9, except that step320is replaced with step330, and control transfers from step330to step332before continuing to step322. In step330, the number of dummy bits is increased by Drift divided by AdjustRes, rounded to the nearest integer.

If Drift is equal to 1/64, for every 64 samples removed from the buffer, only 63 samples have been received. If AdjustRes is 1/64 (such as the case where each sample has 32 bits and 32 dummy bits are being used), Drift divided by AdjustRes is equal to 1. The number of DummyBits is therefore increased by one, which slows the removal of samples from the buffer. Control transfers to step332, where AdjustRes is updated, based on the new number of DummyBits, to 1/(BitsPerSample+DummyBits). Updating AdjustRes may be omitted, and reasonable accuracy will still be maintained if DummyBits does not vary greatly. Control then continues in step322.

Referring now toFIG. 10, an exemplary flowchart depicts alternative operation of the control module in compensating for clock drift. Control begins in step350, where control waits for a period of time specified by the parameter WaitTime. WaitTime may initially be set so as to allow the buffer284ofFIG. 6to partially fill. Control continues in step352, where the level of buffer284is read. Control continues in step354, where, if the buffer level is less than Low_Limit1, control transfers to step356; otherwise control transfers to step358. In step356, if the buffer level is less than a second limit, Low_Limit2, control transfers to step360; otherwise control transfers to step362.

In step358, if the buffer level is greater than High_Limit1, control transfers to step364; otherwise control returns to step350. In step364, if the buffer level is greater than High_Limit2, control transfers to step366; otherwise control transfers to step368. Low_Limit2is less than Low_Limit1, and High_Limit2is greater than High_Limit1. In step362, the number of dummy bits is incremented by 1, and WaitTime is decreased. Control then returns to step350. In step360, the buffer level is even lower, so the number of dummy bits is increased by 2 and WaitTime is increased. Control then returns to step350. In step368, the number of dummy bits is decreased by 1 and WaitTime is decreased. Control then returns to step350. In step366, the number of dummy bits is decreased by 2 and WaitTime is increased. Control then returns to step350.

WaitTime is increased when the amount of change in DummyBits is greater. This allows more time for the buffer level to respond to the larger change in DummyBits. When the change in DummyBits is smaller, the wait time can be decreased. This implementation relies on the assumption that the buffer level will remain between boundaries. If the buffer level rises too much, the I2S controller is likely not removing samples from the buffer fast enough. Therefore, the number of dummy bits is decreased, increasing the rate of removal of samples. If the buffer level drops too low, the I2S controller is likely removing samples from the buffer too quickly, so the number of dummy bits is increased. In other implementations, clock drift may be adjusted by techniques other than changing the number of dummy bits. For example, the I2S clock, SCK, may be adjusted directly.

To compensate for clock drift in the I2S controller, an alternative process would be to speed up the I2S clock, SCK, periodically. For instance, the bit clock SCK may be accelerated for every one out of n samples. The clock can be changed rapidly by changing the divisor used by the clock divider290. If, for instance, the clock divider290divides the incoming clock by 4 to create SCK, the clock divider290may abruptly change to dividing by 2 or 3 for the one out of every n samples.

This technique is depicted inFIG. 11, with an exemplary timing diagram of an I2S bus where the period of SCK is varied. The I2S bus includes SCK390, WS392, and SD394. Each word in the example ofFIG. 10contains eight bits. SCK normally has a period of T1. During the transmission of one or more words, the period of SCK may be varied to, for example, T2. InFIG. 11, words are transmitted using an SCK having period T1until the word beginning with MSB396, which is transmitted with an SCK of period T2. Transmission of the next word, beginning with MSB398, returns to an SCK of period T1. T2may be greater than or less than T1, and will often be a fraction of T1, such as ¾ or ⅞. The fraction may remain close to one to minimize audible distortion caused by varying the sample period. The period of SCK may be changed periodically, such as for every one of four words, or by some other scheme, such as whenever clock drift is detected.

Referring now toFIGS. 12A-12D, various exemplary implementations of the present invention are shown. Referring now toFIG. 12A, the present invention can be implemented in a high definition television (HDTV)420. The present invention may be used to transmit audio data via a WLAN interface429or to play back received audio data. The present invention may be implemented in either or both signal processing and/or control circuits, which are generally identified inFIG. 12Aat422or the WLAN interface429itself. The HDTV420receives HDTV input signals in either a wired or wireless format and generates HDTV output signals for a display426. In some implementations, signal processing circuit and/or control circuit422and/or other circuits (not shown) of the HDTV420may process data, perform coding and/or encryption, perform calculations, format data, and/or perform any other type of HDTV processing that may be required.

The HDTV420may communicate with mass data storage427that stores data in a nonvolatile manner such as optical and/or magnetic storage devices. The magnetic storage device may be a mini HDD that includes one or more platters having a diameter that is smaller than approximately 1.8″. The HDTV420may be connected to memory428such as RAM, ROM, low latency nonvolatile memory such as flash memory, and/or other suitable electronic data storage.

Referring now toFIG. 12B, the present invention can be implemented in a cellular phone450that may include a cellular antenna451. The invention may be used to transmit data via a WLAN interface468or to play back received audio data. The present invention may implement and/or be implemented in either or both signal processing and/or control circuits, which are generally identified inFIG. 12Bat452, or the WLAN interface468. In some implementations, the cellular phone450includes a microphone456, an audio output458such as a speaker and/or audio output jack, a display460and/or an input device462such as a keypad, pointing device, voice actuation, and/or other input device. The signal processing and/or control circuits452and/or other circuits (not shown) in the cellular phone450may process data, perform coding and/or encryption, perform calculations, format data, and/or perform other cellular phone functions.

The cellular phone450may communicate with mass data storage464that stores data in a nonvolatile manner such as optical and/or magnetic storage devices for example hard disk drives HDD and/or DVDs. The HDD may be a mini HDD that includes one or more platters having a diameter that is smaller than approximately 1.8″. The cellular phone450may be connected to memory466such as RAM, ROM, low latency nonvolatile memory such as flash memory, and/or other suitable electronic data storage.

Referring now toFIG. 12C, the present invention can be implemented in a set top box480. The present invention may be used to transmit data via a WLAN interface496or to play back received audio data. The present invention may implement and/or be implemented in either or both signal processing and/or control circuits, which are generally identified inFIG. 12Cat484or the WLAN interface itself. The set top box480receives signals from a source such as a broadband source and outputs standard and/or high definition audio/video signals suitable for a display488such as a television and/or monitor and/or other video and/or audio output devices. The signal processing and/or control circuits484and/or other circuits (not shown) of the set top box480may process data, perform coding and/or encryption, perform calculations, format data, and/or perform any other set top box function.

The set top box480may communicate with mass data storage490that stores data in a nonvolatile manner. The mass data storage490may include optical and/or magnetic storage devices for example hard disk drives HDD and/or DVDs. The HDD may be a mini HDD that includes one or more platters having a diameter that is smaller than approximately 1.8″. The set top box480may be connected to memory494such as RAM, ROM, low latency nonvolatile memory such as flash memory and/or other suitable electronic data storage.

Referring now toFIG. 12D, the present invention can be implemented in a media player500. The present invention may allow synchronized audio playback at the media player500. The present invention may implement and/or be implemented in either or both signal processing and/or control circuits, which are generally identified inFIG. 12Dat504, or the WLAN interface516itself. In some implementations, the media player500includes a display507and/or a user input508such as a keypad, touchpad and the like. In some implementations, the media player500may employ a graphical user interface (GUI) that typically employs menus, drop down menus, icons and/or a point-and-click interface via the display507and/or user input508. The media player500further includes an audio output509such as a speaker and/or audio output jack. The signal processing and/or control circuits504and/or other circuits (not shown) of the media player500may process data, perform coding and/or encryption, perform calculations, format data and/or perform any other media player function.

The media player500may communicate with mass data storage510that stores data such as compressed audio and/or video content in a nonvolatile manner. In some implementations, the compressed audio files include files that are compliant with MP3 format or other suitable compressed audio and/or video formats. The mass data storage may include optical and/or magnetic storage devices for example hard disk drives HDD and/or DVDs. The HDD may be a mini HDD that includes one or more platters having a diameter that is smaller than approximately 1.8″. The media player500may be connected to memory514such as RAM, ROM, low latency nonvolatile memory such as flash memory, and/or other suitable electronic data storage. Still other implementations in addition to those described above are contemplated.