Method of separating a carrier-workpiece bonded stack

The present invention provides a method of separating a bonded stack utilizing the force generated by a gas jet. The stack includes a carrier and a thinned workpiece such as device wafer that are bonded together through one or more layers therebetween. The gas jet can separate two adjacent layers having peeling strength therebetween in the range of from 0.01 to 50.0 g/cm. The invention can simplify the procedure and provide high throughput in separating thinned wafer from its carrier.

CROSS-REFERENCE TO RELATED U.S. APPLICATIONS

This application claims the benefit of priority under the Paris Convention based on Chinese Application No. 201510247398.3 filed on May 14, 2015. The entire content of the patent application is incorporated by reference in its entirety.

Not applicable.

NAMES OF PARTIES TO A JOINT RESEARCH AGREEMENT

Not applicable.

REFERENCE TO AN APPENDIX SUBMITTED ON COMPACT DISC

Not applicable.

FIELD OF THE INVENTION

The present invention generally relates to a method of separating a carrier-workpiece bonded stack using one or more gas jets. The invention is particularly useful for processing a workpiece made of any brittle material, such as semiconductor wafers e.g. silicon and gallium arsenide, a rock crystal wafer, sapphire and glass; and for making thin products such as optical lens, thin silicon wafer, thin LCD glass, thin rock crystal wafer, thin metal plate, thin crystal disk, and thin solid membrane, film or filter, among others. For example, the invention may be used to separate a device wafer after wafer thinning and other backside processing.

BACKGROUND OF THE INVENTION

Thick wafers cause an increase in capacitance, requiring thicker transmission lines, and, in turn, a larger IC footprint. In contrast, thinned wafers have the benefits of reduction in transmission line thickness, IC miniaturization, improved heat dissipation, and realization of stacked configuration in packaging. Stacked configuration is particularly useful for compact electronic products such as cellular telephones. By stacking and interconnecting devices vertically, device interconnection density and corresponding reductions in signal delay (as a result of shortening the distance between electrical connection points) can be significantly increased.

Silicon wafers used in high-volume integrated circuit production are typically 200 or 300 mm in diameter and have a through-wafer thickness of about 750 microns. Without thinning, it would be nearly impossible to form backside electrical contacts that connect with front-side circuitry by passing the connections through the wafer. Highly efficient thinning processes for semiconductor-grade silicon and compound semiconductors based on mechanical grinding (back-grinding) and polishing as well as chemical etching are now in commercial use. These processes allow device wafer thickness to be reduced to less than 100 microns in a few minutes while maintaining precise control over cross-wafer thickness uniformity.

Device wafers that have been thinned to less than 100 microns, and especially those thinned to less than 60 microns, are extremely fragile and must be supported over their full dimensions to prevent cracking and breakage. Various wafer wands and chucks have been developed for transferring ultra-thin device wafers, but the problem still exists on how to support the wafers during back-grinding and TSV-formation processes, because these steps impose high thermal and mechanical stresses on the device wafer as it is being thinned or after thinning. An increasingly popular approach to ultra-thin wafer handling involves mounting the full-thickness device wafer face down to a rigid carrier with a polymeric adhesive, to form a bonded stack. It is then thinned and processed from the backside. The fully processed, ultra-thin wafer is then removed, or debonded, from the carrier after the backside processing has been completed.

In debonding the bonded stack, particularly in an automatic process, complicated mechanical mechanisms such as robot arms must be employed to manipulate the stack using strong but non-uniform mechanical force, to execute motions like sliding, lifting, and twisting. As thinned wafers are extremely fragile, defects associated with this approach include device wafer breakage and damage within the microscopic circuitry of individual devices, which lead to device failure and yield loss. Moreover, complicated mechanical mechanisms also suffer from the disadvantages of higher cost, difficult operation, and lower efficiency.

Therefore, there exists a need for new approaches for debonding a carrier-workpiece bonded stack that can enhance the efficiency, simplify the procedure, provide high wafer throughput, and reduce or eliminate the risks for device wafer breakage and internal device damage. Advantageously, the present invention provides a solution that can meet such a need.

SUMMARY OF THE INVENTION

One aspect of the present invention provides a method of separating a carrier-workpiece bonded stack comprising:

(i) providing a carrier-workpiece bonded stack including n bonding layers sandwiched between a carrier layer and a workpiece layer, wherein n is an integer and n≥1, wherein the n layers are represented as layer 1 to layer n, and wherein layer 1 is bonded to the carrier layer with a peeling strength Pc1, layer 2 is bonded to layer 1 with a peeling strength P12, layer n is bonded to layer (n−1) with a peeling strength P(n−1)n, and the workpiece layer is bonded to layer n with a peeling strength Pnw;

(ii) optionally treating the stack so that at least one of the peeling strengths Pc1, P12 . . . P(n−1)n and Pnw is decreased to the range of from about 0.01 to about 50.0 g/cm, preferably from about 0.05 to about 10.0 g/cm, and more preferably from about 0.1 to about 5.0 g/cm, as determined by ASTM D6862;

(iii) delivering a gas jet at the junction of two adjacent layers wherein the corresponding peeling strength therebetween is in the range of from 0.01 to 50.0 g/cm; and

(iv) separating the two adjacent layers from one another.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

In the following description, for the purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It is apparent, however, to one skilled in the all that the present invention may be practiced without these specific details or with an equivalent arrangement. Embodiments of the present invention are described herein with reference to illustrations of idealized embodiments. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. There is no intent to limit the principles of the present invention to the particular disclosed embodiments. For example, in the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity. In addition, embodiments of the present invention should not be construed as limited to the particular shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, a region illustrated as a rectangle may have rounded or curved features. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the precise shape of a region of a device or of topography and are not intended to limit the scope of the present invention.

Where a numerical range is disclosed herein, unless otherwise specified, such range is continuous, inclusive of both the minimum and maximum values of the range as well as every value between such minimum and maximum values. Still further, where a range refers to integers, only the integers from the minimum value to and including the maximum value of such range are included. In addition, where multiple ranges are provided to describe a feature or characteristic, such ranges can be combined. That is to say that, unless otherwise indicated, all ranges disclosed herein are to be understood to encompass any and all subranges subsumed therein. For example, a stated range of from “1 to 10” should be considered to include any and all subranges between the minimum value of 1 and the maximum value of 10. Exemplary subranges of the range 1 to 10 include, but are not limited to, 1 to 6.1, 3.5 to 7.8, and 5.5 to 10. Further, where an integer range of from “0 to 12” is provided, it will also be considered to include any and all subranges as described above.

Referring toFIG. 1, a carrier-workpiece bonded stack200includes n bonding layers sandwiched between a carrier layer201and a workpiece layer202. The value of n is an integer generally greater than 1, preferably in the range of 2-5. Depending on the specific applications, n may be greater 5. Workpiece202can be processed to make a thin product selected from e.g. optical lens, thin silicon wafer, thin LCD glass, thin rock crystal wafer, thin metal plate, thin crystal disk, and thin solid membrane, film or filter. The n layers are represented as layer 1 to layer n. Layer 1 is bonded to the carrier layer201with a peeling strength Pc1. Layer 2 is bonded to layer 1 with a peeling strength P12, and so on and on. At last, layer n is bonded to layer (n−1) with a peeling strength P(n−1)n, and the workpiece layer202is bonded to layer n with a peeling strength Pnw. Among these peeling strength values, at least one, say P23 as shown inFIG. 1, is already, or has been adjusted to be, within the range of from about 0.01 to about 50.0 g/cm, preferably from about 0.05 to about 10.0 g/cm, and more preferably from about 0.1 to about 5.0 g/cm, as determined by ASTM D6862. A gas jet204from a gas pipe203can then be delivered to blow at the junction of the two adjacent layers, layers 2 and 3.8. Gas jet204creates an impact force on the junction, and later on the completely or incompletely separated layers. Gas can be selected from air, nitrogen, helium, and argon. As shown inFIG. 2, adjacent layers 2 and 3 are separated from one another, forming two sub-stacks, one of which includes carrier layer201, layer 1, and layer 2, while another includes layers 3−n and workpiece layer202. The two sub-stacks can then be further processed as desired.

When none of the peeling strength values is within the target range of from about 0.01 to about 50.0 g/cm, the stack100can be treated in various manners to make at least one of the values (Pc1, P12 . . . P(n−1)n and Pnw) to fall within the target range.

In one embodiment, one or more layers selected from layers 1−n in the stack200can be irradiated with a light source to photo-chemically decrease at least one of the peeling strength values (Pc1, P12 . . . P(n−1)n and Pnw). For example, an operator can irradiate the bonded wafer stack200with a light source through a transparent carrier layer201to photo-decompose adjacent layer 1. As result, Pc1 will fall within the targeted range. Carrier layer201can then be separated from the rest of the stack200using the gas jet204. Subsequently, layers 2−n may be removed from the workpiece layer202(e.g. a device wafer) while it is held on a chuck. The light source can be, for example, a laser having beam cross-section of a few millimeters. The beam is then scanned (or rastered) across carrier layer201in a serial fashion to alter the chemical property of layer 1. Typically the beam is focused on a small area at a time to deliver sufficient energy.

In another embodiment, one or more layers selected from layers 1−n in the stack200can be heated to thermally decrease at least one of the peeling strength values (Pc1, P12 . . . P(n−1)n and Pnw). For example, a bonded wafer stack200can be heated above the decomposition or softening temperature of a polymeric adhesive Layer n, so that at least Pnw falls within the targeted range. Workpiece layer202(e.g. a device wafer) can then be separated from the rest of the stack200using the gas jet204while being supported with a full-wafer holding chuck. If n=1, then the rest of the stack200is essentially the carrier layer201. Generally speaking, backside processes for temporarily bonded device wafers often involve working temperatures higher than 200° C. or even 300° C. The polymeric adhesives Layer n is preferably designed to decompose or soften at 20-50° C. above the working temperature for gas jet debonding to occur. In a preferred embodiment of the invention, gas jet204may be pre-heated to a temperature that is suitable for thermally lowering the peeling strength of interest. In other words, gas jet204functions as a heat source in the debonding process.

In still another embodiment, one or more layers selected from layers 1−n in the stack200can contact a solvent or solvent mixture to chemically decrease at least one of the peeling strength values (Pc1, P12 . . . P(n−1)n and Pnw). For example, an operator can immerse a bonded wafer stack200in, or spray it with, a solvent or solvent mixture to disassociate, dissolve or decompose one of layers 1−n, so that the pealing strength associated with the affected layer falls within the targeted range. Then the affected layer can be separated from its adjacent layer using the gas jet204. For some stacks, perforation in the carrier layer201may be employed to facilitate solvent diffusion and penetration.

In many embodiments, carrier-workpiece bonded stack200, without being treated in any manner as described above, may already include two adjacent layers between which the peeling strength is in the target range of from 0.01 to 50.0 g/cm. For example, such two adjacent layers may be layer 1 and carrier layer201, and corresponding Pc1 is in the range of from about 0.01 to about 50.0 g/cm, preferably from about 0.05 to about 10.0 g/cm, and more preferably from about 0.1 to about 5.0 g/cm, as determined by ASTM D6862. This embodiment will be described in more details later in this writing.

In step (iii), a gas jet may be delivered (e.g. blowing) onto the junction of two adjacent layers wherein the corresponding peeling strength therebetween is in the range of from 0.01 to 50.0 g/cm. In general embodiments, 1-6 gas jets204surrounding the target junction may be used to carry out this step.FIG. 3shows the top view of four gas jets204surrounding a target junction (not shown) are used to separate the bonded stack200.

In preferred embodiments, gas jet204may ideally have a shape substantially similar to a circular sector as shown inFIG. 4. The central angle α of the circular sector may be in the range of from 30° to 100°, and the thickness of the circular sector may be in the range of from 0.1 mm to 2 mm.FIG. 5illustrates the cross sectional view of gas jet204with the shape of circular sector and the bonded stack200in an operation state. The plane of the circular sector204and the interfacial plane defined by the two adjacent layers to be separated (denoted by dotted line x-x) will have a dihedral angle β. Generally, the dihedral angle β is in the range of 0-30°. When 13 is greater than 0°, there is a force component generated from the gas jet204that lifts, or pushes up, the upper layer (or sub-stack) during and after the separation of the two adjacent layers. After the separation, the upper layer or even the upper sub-stack may float over the lower layer (or sub-stack) with the help from the “pushing up” force of the gas jet204. The floating layer or sub-stack is operationally much easier to be collected and transferred to the next procedural steps.

Referring toFIG. 6, gas jet204is generated by releasing a gas stream118in a pipe203through a nozzle110having a gas outlet orifice116. The gas stream118may have a pressure in the range of 2-10 Bar, and a flow rate in the range of 150-400 liters/minute.

It should be appreciated thatFIG. 6is a schematic illustration merely showing the concept of the design. In practice, a nozzle including 1-4 gas outlet orifices can be installed at the terminal end of gas pipe203. As known to a skilled artisan in the field, the design of the nozzle and the orifice(s) can be such that the spray pattern of gas jet204is obtained as desired. For example, the design options may be selected from plain orifice nozzle, shaped-orifice nozzle, surface-impingement spray nozzle, spiral spray nozzle, and any combination thereof. For example, to obtain a flat sheet of gas, an elliptical or a round orifice on a deflective surface that is tangent to the exit orifice can be used.

In the method of the invention, an additional step may be added before step (iii). The additional step comprises mechanically and/or chemically disrupting or destroying a portion of the outer periphery at the junction of two adjacent layers, before delivering the gas jet204thereto. For example, an operator can use a sharp tool such as knife to cut away, or use a solvent to dissolve away, a portion of the outer periphery at the junction of two adjacent layers. In a preferred embodiment, the nozzle110inFIG. 6may further include a blade111to function as the sharp tool, and to serve the same purpose. This step of disrupting or destroying makes the later steps easier, for example, the user can use gas stream118with a lower pressure and/or a lower flow rate.

As previously described, some carrier-workpiece bonded stacks200, without being treated in any manner as described above, may already include two adjacent layers between which the peeling strength is in the target range of from 0.01 to 50.0 g/cm. For example, such two adjacent layers may be layer 1 and carrier layer201, and corresponding Pc1 is in the range of from about 0.01 to about 50.0 g/cm, preferably from about 0.05 to about 10.0 g/cm, and more preferably from about 0.1 to about 5.0 g/cm, as determined by ASTM D6862. In the following description, an example of such a stack will be explained. Specifically, a bonded stack200with n=2 inFIG. 1is embodied as bonded stack100as shown inFIG. 7.

Referring toFIG. 7, a support10for temporary bonding a workpiece60(an embodiment of workpiece layer202inFIG. 1) comprises a carrier20(an embodiment of carrier layer201inFIG. 1) having a supporting surface21and an isolation film30(an embodiment of Layer 1 inFIG. 1). A first side31of the isolation film30is bonded to the supporting surface21with a peeling strength P1 in the range of from about 0.01 to about 50.0 g/cm, preferably from about 0.05 to about 10.0 g/cm, and more preferably from about 0.1 to about 5.0 g/cm, as determined by ASTM D6862. The second side32may be bonded indirectly to the workpiece60, for example, using an adhesive layer40(an embodiment of Layer n or Layer 2 inFIG. 1) located therebetween, as illustrated inFIG. 7. In this example, the second side32may bond to a first side41of the adhesive layer40, and a second side42of the adhesive layer40may bond to the workpiece60, to form stack100.

Workpiece60can be any suitable workpiece subject to any mechanical and/or chemical treatment(s) to make a thin or ultra-thin product, for example, optical lens, thin LCD glass, thin wafer, thin metal plate, thin crystal disk, and thin solid membrane, film or filter, among others. In the embodiment illustrated inFIG. 7, workpiece60is a wafer50(to be thinned) having an engaging surface51and a processing surface52. Bonding wafer50onto a second side32of the isolation film30may therefore be accomplished by placing an adhesive layer40between the engaging surface51and the second side32of the isolation film30. Processing of the workpiece60may be performed on, for example, the processing surface52of the wafer50.

Wafer50may be any wafer known as a functional wafer or a device wafer, its engaging surface51may also be known as a front or device surface, and its processing surface52may be known as a back surface. Although the wafer50can be of any shape, typically it is circular in shape. Engaging surface51may comprise any suitable microdevices fabricated on or from semiconducting materials such as silicon, polysilicon, silicon dioxide, silicon-germanium, silicon (oxy)nitride, Gallium Nitride (GaN), gallium arsenide (GaAs), gallium phosphide (GaP), gallium arsenide phosphide (GaAsP), silicon carbide (SiC), metals (e.g., copper, aluminum, gold, tungsten, tantalum), low k dielectrics, polymer dielectrics, and various metal nitrides and silicides. Examples of device can be on or in engaging surface51, include, but are not limited to, integrated circuits, microelectromechanical systems (MEMS), microsensors, power semiconductors, light-emitting diodes, photonic circuits, interposers, and embedded passive devices. The engaging surface51can also include at least one structure selected from the group consisting of solder bumps, metal posts, and metal pillars.

Carrier20in this embodiment is a carrier wafer, which has a supporting surface21(also known as front or carrier surface) and a back surface22. Preferred carrier wafer20can be silicon (e.g., a blank device wafer), sapphire, quartz, metals (e.g., aluminum, copper, silver, steel), and various glasses (e.g. soda lime glass and borosilicate glass), and ceramics. Carrier20may be square, ellipsoid or rectangular but is more commonly round and sized to match wafer50so that the bonded assembly can be handled in conventional processing tools and cassettes. As an advantage of this embodiment, carrier20does not have to be perforated to speed the debonding process, because no liquid chemical agent is necessarily needed to dissolve or decompose isolation film30.

To obtain the desired thickness uniformity after grinding of wafer50, carrier20is preferred to have uniform thickness and good surface flatness (or planarity). For example, for grinding a silicon wafer to 50 μm thick or less and attaining evenness of ±10% or less, the variability in the thickness of carrier20should be reduced to ±2 μm or less. In the case where carrier20is repeatedly used, it also preferably has scratch resistance.

Referring toFIG. 8, a method of producing a support10for temporary bonding a workpiece60such as a wafer50(e.g. a blank wafer) is illustrated. In one step, a carrier20having a supporting surface21is provided. In another step, an isolation film30is generated onto the supporting surface21. The first side31of the isolation film30is bonded to the supporting surface21with a peeling strength P1 in the range of from about 0.01 to about 50.0 g/cm, preferably from about 0.05 to about 10.0 g/cm, and more preferably from about 0.1 to about 5.0 g/cm, as determined by ASTM D6862.

The isolation film30is typically applied to supporting surface21by spin coating, spray coating, or laminating as dry-film tapes. However, other coating methods are also contemplated within the present invention, such as stencil printing, ink jetting, casting from solution, meniscus coating, roller coating, flow coating, dip coating, knife coating, and die coating.

Spin- and spray-applied film30is preferred because the coatings has higher thickness uniformity than tapes can provide. Spin coating is preferred because it is more uniform, providing smooth surface and voids free coating inside, while tapes may leave tiny voids inside adhesive layer. Higher thickness uniformity can enable greater control over cross-wafer thickness uniformity after thinning. As shown inFIG. 8, isolation film30may be generated by spin-coating the supporting surface21with a liquid material35, and then solidifying the liquid material35. In another embodiment, the isolation film30is generated by stencil printing on the supporting surface21. The liquid material may be applied to the supporting surface21by any known application method, with one preferred method being spin-coating the liquid material35at speeds of from about 500 rpm to about 5,000 rpm, preferably from about 500 rpm to about 2,000 rpm, for a time period of from about 5 seconds to about 120 seconds, preferably from about 30 seconds to about 90 seconds. After liquid material35is applied, it is preferably heated to a temperature of from about 70° C. to about 350° C. for a time period of from about 60 seconds to about 8 minutes, preferably from about 90 seconds to about 6 minutes. In some embodiments, while heating liquid material35at a higher temperature provides more thermal stability in later processing steps, heating at a lower temperature is useful for the purpose of getting rid of solvent from the material. Depending upon the liquid material35used to form the isolation film30, baking (e.g. on a hot plate) can initiate a crosslinking or polymerization reaction to cure or solidify the isolation film30. In some embodiments, it is preferable to employ a multi-stage baking process to prepare the isolation film30, depending on the chemical nature of the liquid material35. Also, in some examples, the above application and baking process can be repeated on a further aliquot of the liquid material35, so that the isolation film30is “built” on the supporting surface21in multiple steps.

The isolation film30so obtained may have a thickness in the range of 1 μm to 100 μm, preferably in the range of 2 μm to 50 μm, and more preferably in the range of 5 μm to 20 μm, such as 10 μm. In preferred embodiments, isolation film30has a shear strength that is high enough to withstand the pressure, force and stress encountered in later processing steps, for example, grinding and polishing in thinning a wafer. Generally, isolation film30has a shear strength of at least 1 MPa, and does not flow at later process temperatures e.g. from about 150° C. to about 400° C. Shear strength can be tested by a Shear load tester.

In some embodiments, isolation film30is made of polymeric materials that (A) are tack-free and not bond strongly to glass, silicon, and metal surfaces (i.e., have very low amount of, or no, hydroxyl or carboxylic acid groups); (B) can be cast from solution or formed into a thin film for lamination; and (C) will not crack, flow, or redistribute under mechanical stresses encountered during backside processing, even when carried out at high temperatures or under high vacuum conditions. Low bonding strength refers to polymeric materials that can be peeled from a substrate with only light hand pressure such as might be used to debond an adhesive note paper. Thus, any material with an adhesion strength to carrier20of less than about 50 psig, preferably less than about 35 psig, and more preferably from about 1 psig to about 30 psig would be desirable for use as isolation film30of the present invention.

Suitable materials that can be used to generate isolation film30include, for example, polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, cellulose triacetate, cellulose acetate, propionate, arylite and any combination thereof. A preferred material for isolation film30is polyethersulfone-containing Z-COAT 150 commercially available from Micro Materials Inc., 10080 Willow Creek Road, San Diego, Calif. 92131. Z-COAT 150 can be applied to supporting surface by spin coating or stencil printing, and be cured with step temperature profile. Tests have proved that Z-COAT 150 film can be peeled from glass at 90 degree angle with a peeling force of lower than 5 g/cm.

As an alternative to or even an improvement over polyimide, Z-COAT 150 exhibits other performance properties, for example, it remains stable and transparent at 400° C. baking, and can resist most chemicals (e.g. acids, some solvents and alkalis) used in typical FPD plants. Specifically, Z-COAT 150 demonstrates high clarity, e.g. greater than 89% transmittance at 380-800 nm range after 400° C. N2 baking; high thermal stability, e.g. glass transition temperature greater than 300° C. and thermal-mechanical stability at 50-300° C. up to 4 hours; decomposition temperature above 500° C.; and good moisture impermissibility. The tensile strength of Z-COAT 150 is higher than 600 kg/cm2at 300° C.; higher than 550 kg/cm2at 350° C.; higher than 480 kg/cm2at 400° C. (30 min); and higher than 450 kg/cm2at 400° C. (1.5 hours). The transmittance of Z-COAT 150 in 320-800 nm range is higher than 80% at 300-400° C. in 90% nitrogen atmosphere. Chemical resistance tests on Z-COAT 150 film showed that the material has a weight loss of less than 1% and exhibits substantially unchanged surface after being soaked 30-60 minutes at 25-60° C. in the following chemicals: PGMEA, 0.045% KOH, Al hydroxide, oxalic, TMAH and stripper. Z-COAT can be dissolved in cyclopetanone, NMP, THF and dioxolane.

FIG. 9illustrates a method of forming the adhesive layer40and bonding it onto the workpiece60, such as the engaging surface51of wafer50. Adhesive layer40is typically applied by spin coating or spray coating from solution or laminating as dry-film tapes, on the engaging surface51, the second side32of the isolation film30, or both. However, other coating methods are also contemplated within the present invention, such as ink jetting, casting from solution, meniscus coating, roller coating, flow coating, dip coating, knife coating, and die coating. Spin- and spray-applied adhesives are preferred because they form coatings with higher thickness uniformity than tapes can provide. Higher thickness uniformity translates into greater control over cross-wafer thickness uniformity after thinning. The adhesive layer40exhibits high bonding strength at least to wafer50, preferably to both wafer50and isolation film30.

As shown inFIG. 9, the adhesive layer40may be generated by spin-coating the engaging surface51with a liquid material45, and then solidifying the liquid material45. The liquid material45may be applied to the engaging surface51by any known application method, e.g. spin-coating the liquid material45at speeds of from about 500 rpm to about 5,000 rpm, preferably from about 500 rpm to about 2,000 rpm, for a time period of from about 5 seconds to about 120 seconds, preferably from about 30 seconds to about 90 seconds.

After being applied, liquid material45of no solvent type (in liquid state) may be directly bonded to engaging surface51, or the second side32of the isolation film30, or both, at a relatively low temperature such as 110° C.±10° C. In another embodiment, liquid material45of no solvent type may be heated to a semi-solid state or viscous state, and bonded to engaging surface51, or the second side32of the isolation film30, or both, at a higher temperature such as 220° C.±10° C. In still another embodiment, liquid material45of solvent type may be baked to a solid state, and bonded to engaging surface51, or the second side32of the isolation film30, or both, at a higher temperature such as 220° C.±10° C. In various embodiments, liquid material45is heated to a temperature of from about 80° C. to about 250° C., more preferably from about 170° C. to about 220° C., for a time period of from about 60 seconds to about 8 minutes, preferably from about 90 seconds to about 6 minutes. Depending upon the liquid material45used to form the adhesive layer40, baking can initiate a crosslinking or polymerization reaction to cure or solidify the adhesive layer40. In some embodiments, it is preferable to employ a multi-stage baking process to prepare adhesive layer40, depending on the chemical nature of the liquid material45. Also, in some examples, the above application and baking process can be repeated on a further aliquot of the liquid material45, so that the adhesive layer40is “built” on the engaging surface51in multiple steps. The liquid material45may include monomers, oligomers, or polymers dissolved or dispersed in a solvent system. Typical solvent systems will depend upon the polymer or oligomer selection. Typical solids contents of the compositions may range from about 1% to about 60% by weight, and preferably from about 3% to about 40% by weight, based upon the total weight of the composition. Examples of liquid material45or the polymerization product thereof may include, but are not limited to, epoxies, cyclic olefins, acrylics, silicones, styrenics, vinyl halides, vinyl esters, polyamides, polyimides, polysulfones, polyethersulfones, polyolefins, polyurethanes, ethylene-propylene rubbers, polyamide esters, polyimide esters, polyvinyl buterol, and polyacetals.

AlthoughFIG. 9only illustrates the spin coating on engaging surface51, it should be appreciated that it can be on second side32of the isolation film30as well. Alternatively, a part of the adhesive layer40can be formed by spin coating on engaging surface51, and the rest of adhesive layer40can be formed by spin coating on second side32.

As described above, the engaging surface51, like a landscape, may have variations in topography due to the presence of microelectronic elements, raised features, contact holes, via holes, lines, and trenches. Given a flat or planar processing surface52, the highest region or point (e.g. solder bumps, metal posts and pillars) on the engaging surface51extends the farthest from processing surface52, while the lowest is closest to the processing surface52. In typical embodiments, the first side41of the adhesive layer40is substantially flat or planar. Therefore, the thickness TH of the adhesive layer40above the highest region or point (i.e. minimum thickness) is less than that the thickness TL of the adhesive layer40above the lowest region or point (i.e. maximum thickness). For example, minimum thickness TH may be at least about 5 μm, more preferably from about 5 μm to about 50 μm, and most preferably from about 10 μm to about 30 μm (e.g. 10-15 μm); while maximum thickness TL may be at least about 24 μm, more preferably from about 45 μm to about 200 μm, and most preferably from about 50 μm to about 150 μm. In preferred embodiments, the adhesive layer40bonds to the engaging surface51with an adhesion strength of greater than about 50 psig, preferably from about 80 psig to about 250 psig, and more preferably from about 100 psig to about 150 psig, as determined by ASTM D4541/D7234.

FIG. 10illustrates a method of forming a stack100. The support10in which the supporting surface21and the isolation film30are bonded together, and the wafer50in which its engaging surface51is bonded to the adhesive layer40, are then pressed together, so that the second side32of the isolation film30is in contact with the first side41of the adhesive layer40. While pressing, sufficient pressure and heat, preferably under vacuum (e.g. 10 Pa), are applied for a sufficient amount of time so as to effect bonding of the two together to form a bonded stack100. In some other embodiments, sufficient pressure and heat can be applied in the absence of vacuum. The bonding parameters will vary depending upon the chemical identity and properties of isolation film30and adhesive layer40, but typical temperatures during this step will range from about 150° C. to about 375° C., and preferably from about 160° C. to about 350° C., with suitable bonding force, for a time period of from about 30 seconds to about 5 minutes, and more preferably from about 2 minutes to about 4 minutes. In a preferred embodiment, the bonding force of the of invention is less than about 1 Kg, while typical force needed in prior art for a 8-inch wafer is between 1 Kg to 1000 Kg.

In an exemplary embodiment, stack100consists of carrier wafer20, isolation film30, adhesive layer40, and wafer50that are bonded together. The areas of supporting surface21, first sides31and41, second sides32and42, as well as engaging surface51, are substantially the same.

Now wafer50can be safely handled and subjected to further processes that might otherwise have damaged wafer without being bonded to support10. For example, processing surface52can safely be subjected to thinning such as back-grinding and chemical-mechanical polishing (CMP). After thinning, other backside processing such as TSV-formation, etching such as DRIE, metal and dielectric deposition, patterning (e.g., photolithography, via etching), redistribution layers, plasma ashing, bond pads, passivation, annealing, and any combinations thereof. The processing of surface52is preferably completed without separation of wafer50and support10occurring, and without infiltration of any chemicals encountered during these processing steps.FIG. 11illustrates that thinning (e.g. by grinding) of the processing surface52results in the thickness of wafer50being reduced. Once desired processing steps on surface52are all complete, surface52of the thinned wafer50may be bonded onto a cutting film (or dicing film)70.

For ease of handling, original wafer50(before thinning) has already been processed on the engaging surface51(i.e., frontside devices) at their normal full-size thicknesses, e.g., 600-700 μm. After the thinning step inFIG. 11, wafer50is thinned to a thicknesses of 75-150 μm. For some workpiece such as hybrid substrates, e.g. gallium arsenide (GaAs) used for high-power devices, the thicknesses may be taken down to 25 μm.

In the thinning step, carrier side of stack100may be held in place with tooling that utilizes a vacuum chuck or some means of mechanical attachment. Mechanical thinning is performed by bringing the processing surface52into contact with a hard and flat rotating horizontal platter that contains a liquid slurry. The slurry may contain abrasive media along with chemical etchants such as ammonia, fluoride, or combinations thereof. The abrasive provides “gross” substrate removal, i.e., thinning, while the etchant chemistry facilitates “polishing” at the submicron level. Wafer50is maintained in contact with the media until an amount of the wafer material has been removed to achieve a targeted thickness.

After thinning, through-wafer electrical connections, commonly referred to as through-silicon-vias or “TSVs”, can be formed on thinned wafer50. It should be appreciated that TSV-formation processes including steps such as chemical-mechanical polishing (CMP), lithography, etching, deposition, annealing, and cleaning can also be carried on surface52. For example, via holes can be etched on surface52to facilitate frontside (i.e. surface51) contacts. In order to construct a via on wafer50with a thicknesses of less than 100 μm using common dry-etch techniques, the via only needs to have a diameter of 30-70 μm. Therefore, for backside processing, thin wafers can be processed more quickly and at lower cost.

The isolation film30and the adhesive layer40can survive the mechanical stress and pressure associated with the above processes. Preferably, film30and layer40can simultaneously satisfy requirements such as grinding force resistance, heat resistance during the anisotropic dry etching needed to form TSVs, chemical resistance during plating and etching, and smooth debonding of the laminated stack100at or near room temperature. For example, film30and layer40can survive processing temperatures up to about 450° C., preferably from about 200° C. to about 400° C., and more preferably from about 200° C. to about 350° C.

Next, the isolation film30may be separated from the supporting surface21of the carrier wafer20, while isolation film30remains bonded to workpiece60(e.g. isolation film30, adhesive layer40and processed wafer50remain a bonded 3-layer stack or sub-stack). In an embodiment, plate chucking of a wafer stack100for debonding is used. Thinned wafer50of stack100can be coupled to a debonding chuck plate (not shown) using a wafer dicing tape or film70. Unlike the prior art, carrier20does not need to be coupled by vacuum to any debonding chuck plate.

In embodiments as shown inFIG. 12, an operator can first mechanically and/or chemically disrupt or destroy an outer periphery of the isolation film30to facilitate the later separation. For example, the operator can use a sharp tool such as knife to cut away, or use a solvent to dissolve away, a portion38of an outer periphery of the isolation film30. Alternatively, the sharp tool may be the blade111in the gas jet nozzle110as shown inFIG. 6. Next, the operator can employ one or more gas sources39to blow gas e.g.4jets or streams37(an embodiment of 4 gas jets204inFIGS. 3, 4 and 5) at the junction (or joint) of carrier wafer20and isolation film30. Under the force imposed from the gas jet or stream37pressure, carrier20may be blown or puffed off from the 3-layer sub-stack (30,40and50). In other embodiments, during and/or after the gas stream blowing, the user can apply an additional force on carrier20or the 3-layer stack to facilitate the separation of the two.

With carrier20being removed, the entire side of isolation film30and adhesive layer40are now completely exposed, and become easily accessible for further cleaning process. Isolation film30and adhesive layer40may be removed from the thinned wafer50using any known methods. For example, they can be dissolved away using a suitable solvent.

Alternatively, isolation film30can be peeled away from adhesive layer40first, and reaming adhesive layer40is then dissolved away from wafer50using a solvent such as e.g., limonene, dodecene, propylene glycol monomethyl ether (PGME). Another embodiment may be to peel both isolation film30and adhesive layer40as much as possible, and then clean the residual material on wafer50using a solvent. In these embodiments, adhesive layer40is completely cleaned. However, in some other embodiments, adhesive layer40is designed not to be completely cleaned, i.e. leaving some residual material on the engaging surface51. For example, the residue of adhesive layer40may serve some functions (e.g., gap fill) in subsequent wafer processing steps.

One way to clean wafer50is spin application method, in which the cleaning solvent is spin-applied continuously at about 200 to about 1,200 rpm to the spinning wafer50for about 1 to about 10 minutes. Alternatively, the cleaning solvent is spin-applied intermittently at about 200 to about 1,200 rpm with a frequency of about 1 to about 6 cycles/min for about 2 to about 5 minutes. This may be followed by spin-rinsing wafer50with a solvent at about 200 to about 1,200 rpm for about 30 to about 60 seconds, and then spin drying rapidly at about 1,500 to about 2,000 rpm for about 30 to about 60 seconds. Suitable solvents for rinsing are selected from the group consisting of water, isopropanol, 1-dodecene, acetone, methanol, ethanol, and mixtures thereof. In another embodiment, wafer50can be cleaned by a puddling method, in which the cleaning liquid is puddled onto wafer50surface and allowed to remain for about 2 to about 120 seconds. The cleaning solvent is then spun off at about 500 to about 2,000 rpm. This puddling and spinning cycle can be repeated until the residual material is dissolved away, usually about 1 to about 7 times. Wafer50can then be rinsed with additional solvent, and then spun dry. In still another embodiment, wafer50can be sprayed with the cleaning solution, followed by rinsing and drying. In still another embodiment, adhesive layer40can be removed by immersing wafer50into a cleaning solvent. Preferably, wafer50is immersed into the cleaning solvent for about 1 min. to about 10 min. Immersion can be repeated as needed until adhesive layer40is sufficiently dissolved. This can be followed by rinsing and drying wafer50.

Thinned wafer50, being cleaned completely or incompletely (if desired) and being bonded onto cutting film (or dicing film)70, is now ready for further semiconductor process.

For example, thinned wafer50may be separated into individual devices or dies that are packaged to allow practical interconnection with a printed wiring board. It is preferred to construct the device package on or around the die while it is still part of the wafer array. This kind of wafer-level packaging reduces overall packaging costs and allows a higher interconnection density to be achieved between the device and its microelectronic environment.

Thinned wafer50can be easily cut and scribed into ICs. Thinner wafers have a smaller amount of material to penetrate and cut and therefore require less effort. No matter what method (sawing, scribe and break, or laser ablation) is used, ICs are easier to cut from thinner wafer50.

With respect to the efficiency of separating the device wafer50and the carrier wafer20, the present invention is advantageous over known techniques that involve laser ablation, plasma etching, water jetting, sawing or cutting etc. to etch, decompose or cleave bonding layers, since the device wafer and the carrier wafer can be readily separated by peeling off the isolation film from the carrier wafer, and one side of isolation film/adhesive layer is therefore entirely exposed for subsequent processing in a convenient way. The present invention can enhance the performance of the thin-wafer handling with lower stress in the debonding step and higher efficiency in removing boding layers, and without the sacrifice of other performances such as thermal stability, compatibility with harsh backside processing steps, protection of bumps on the front side of the wafer by encapsulation, and fewer defects on the front side.

The present invention can be widely used in many technical fields. For example, a large wafer (for example, 8 or 12 inch-diameter silicon wafer) can be readily separated from the carrier, as described above. In the field of rock crystal wafer, the thickness reduction of a wafer is required to increase the oscillation frequency. The separation can be easily accomplished when the invention is utilized. In the field of liquid crystal display (LCD), the thickness reduction of the glass is desired to reduce the weight of the display and it is desired that the glass be of uniform thickness. Again, such separation can also be easily accomplished using the present invention.

Example 1: Device Wafer Coating

A silicon device wafer (i.e. workpiece60or wafer50) was placed onto a vacuum chuck in a WS-400 spin coater (available from Laurell Technologies). Approximately 2 ml of Z-BOND 601 Silicone composition (available from Micro Materials Inc. (MMI), 10080 Willow Creek Road, San Diego, Calif. 92131) was needle dispensed onto the center of the wafer. The wafer was then rotated at 500 rpm for 10 seconds, 1000 rpm for 5 seconds, 2000 rpm for 10 seconds, and 600 rpm for 5 seconds, and the rotation was then stopped. The Z-BOND 601 formed a uniform wet layer on the device wafer after the spin coating. The thickness of the wet Z-BOND 601 layer (i.e. adhesive layer40) is about 15 μm.

Example 2: Carrier Wafer Coating and Formation of Support10

A silicon dummy wafer was used as the carrier wafer, and it was placed onto a vacuum chuck in a WS-400 spin coater. Approximately 2 ml of Z-COAT 150 polyethersulfone composition (available from Micro Materials Inc., 10080 Willow Creek Road, San Diego, Calif. 92131) was needle dispensed onto center of the carrier wafer. Then wafer was rotated at 700 rpm for 5 seconds, 1500 rpm for 10 seconds, and 500 rpm for 5 seconds, before the rotation was stopped. The Z-COAT 150 formed a uniform wet layer on the carrier wafer after the spin coating. The thickness of the wet Z-COAT 150 layer right after the spin coating is approximately 12 μm.

The carrier with wet Z-COAT 150 layer was then placed on a hot plate of 80° C. for 10 minutes. The Z-COAT 150 started to form a dry layer on the carrier wafer during the heating. Carrier was then moved to a second hot plate of 200° C. for 7 minutes, then to third hot plate of 350° C. for 10 minutes, to get rid of any residual solvent. A solid transparent Z-COAT 150 layer was formed on the carrier wafer as isolation film30. The final thickness of the film is 8 μm.

Example 3: Wafer Bonding and Thermal Stability

The wafer bonder used in this example is Z-BT200 bonder commercially available from Micro Materials Inc., 10080 Willow Creek Road, San Diego, Calif. 92131. Support10from Example 2 in which the supporting surface21and the isolation film30are bonded together, and wafer50from Example 1 in which its engaging surface51is bonded to the adhesive layer40, are then pressed together, so that the second side32of the isolation film30is in contact with the first side41of the adhesive layer40. The bonding was conducted at a temperature of 120° C. with 1 kg force applied for 4 minutes in vacuum of 0.1 millibars to form a bonded wafer stack100. The wafer stack was visually inspected and no voids were observed. Thermal stability was evaluated by placing a bonded wafer stack on to a hot plate set to 350° C., after which the wafer stack were visually inspected, and no blister, crack, rupture, color change or other visual defects on the carrier or wafer was observed.

Wafer stack100was separated using automatic Wafer Debonder Z-D200A commercially available from Micro Materials Inc., 10080 Willow Creek Road, San Diego, Calif. 92131. First, the thinned device wafer was laminated on a wafer dicing film (Adwill D175, available from Lintec) on a metal frame. The laminated wafer stack was placed in Z-D200A with carrier wafer facing up. A sharp blade was automatically aligned to the interface between isolation film and carrier wafer by machine recognition. The blade is designed to have a controlled compressed gas channel. The blade was controlled to move toward the interface until it touched the interface, and then the blade was inserted 0.3 mm further in between the isolation film and the carrier wafer. A stream of high flow compressed gas (air) was shoot (or blew) from the channel in the blade toward the gap between the isolation film and supporting carrier wafer for about 10 seconds. The device wafer was then completely separated from the carrier wafer. The results ae tabulated in the following table.

Example 5: Wafer Cleaning

In the 3-layer stack obtained from Example 4, isolation film30, adhesive layer40and processed wafer50remained bonded together. In this example, the isolation film was peeled off from adhesive layer completely. Then the device wafer with the adhesive layer was placed in a 60° C. heated bath of Z-CLEAN 901 (commercially available from Micro Materials Inc., 10080 Willow Creek Road, San Diego, Calif. 92131) for 20 minutes. Adhesive layer was then completed removed from the device wafer. Following up was rinsing with isopropyl alcohol to finish the wafer cleaning.

In the foregoing specification, embodiments of the present invention have been described with reference to numerous specific details that may vary from implementation to implementation. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense. The sole and exclusive indicator of the scope of the invention, and what is intended by the applicant to be the scope of the invention, is the literal and equivalent scope of the set of claims that issue from this application, in the specific form in which such claims issue, including any subsequent correction.