Printed circuit board, electronic device, and manufacturing method for printed circuit board

According to one embodiment, a printed circuit board includes a first dielectric layer, a circuit component mounted on the first dielectric layer, and a second dielectric layer. The first dielectric layer is provided with a via hole which opens at a surface thereof and in which a conductive layer is provided, and a conductive pattern connected electrically to the conductive layer of the via hole. The circuit component is provided with a bump at least a part of which is inserted in the via hole and bonded to an inner surface of the via hole. The second dielectric layer is formed provided with another conductive pattern and laminated to the first dielectric layer to cover the circuit component.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is based upon and claims the benefit of priority from Japanese Patent Application No. 2005-317534, filed Oct. 31, 2005, the entire contents of which are incorporated herein by reference.

BACKGROUND

One embodiment of the invention relates to a printed circuit board, an electronic device provided with the printed circuit board, and a manufacturing method for the printed circuit board, for example, a structure and a method for mounting a circuit component.

2. Description of the Related Art

An electronic device such as a portable computer includes a printed circuit board. The printed circuit board includes a printed wiring board and a circuit component mounted on the wiring board. A conductive pattern is formed on the wiring board. An IC chip or capacitor is an example of the circuit component.

In recent years, a surface mount system has been widely used as a method of mounting the circuit component on the printed wiring board. According to the surface mount system, bumps on the lower surface of the circuit component are bonded to pads on the surface of the printed wiring board. In general, each pad is formed of a smooth copper foil or the like. Therefore, each bonded surface of each pad and each bump is a flat surface that extends along the shape of the pad.

A printed wiring board having a recess in a conductive layer is described in, for example, Jpn. Pat. Appln. KOKAI Publication No. 2003-303849. This printed wiring board includes a conductive layer formed having a recess and a spherical connecting member mounted therein. When a semiconductor element is mounted on the printed board, the connecting member is plastically deformed and partially gets into the recess. This connecting member connects the semiconductor element electrically to the printed wiring board.

If the bonded surfaces of the pad and the bump are flat surfaces, the bond area between them cannot be very large. Therefore, the bond strength, especially the shear strength, between the pad and the bump cannot be very high. If the bond strength between the pad and the bump is not high enough, the bonded surfaces of the pad and the bump may possibly be separated when the circuit component is subjected to a great force.

DETAILED DESCRIPTION

Various embodiments according to the invention will be described hereinafter with reference to the accompanying drawings.

In general, according to one embodiment of the invention, a printed circuit board includes a first dielectric layer provided with a via hole which opens at a surface thereof and in which a conductive layer is provided, and a conductive pattern connected electrically to the conductive layer of the via hole; a circuit component mounted on the first dielectric layer and provided with a bump at least a part of which is inserted in the via hole and bonded to an inner surface of the via hole; and a second dielectric layer provided with another conductive pattern and laminated to the first dielectric layer to cover the circuit component.

In general, according to one embodiment of the invention, an electronic device includes a case; and a printed circuit board which is contained in the case and includes a first dielectric layer provided with a via hole which opens at a surface thereof and in which a conductive layer is provided and a conductive pattern connected electrically to the conductive layer of the via hole, a circuit component mounted on the first dielectric layer and provided with a bump at least a part of which is inserted in the via hole and bonded to an inner surface of the via hole, and a second dielectric layer provided with another conductive pattern and laminated to the first dielectric layer to cover the circuit component.

In general, according to one embodiment of the invention, a manufacturing method for a printed circuit board includes preparing a dielectric layer provided with a via hole which opens at a surface thereof and in which a conductive layer is provided and a conductive pattern connected electrically to the conductive layer of the via hole, and a plurality of circuit components formed each including a bump; detecting an opening position of the via hole of the dielectric layer; detecting positions of the bumps formed on the circuit components, individually; selecting the circuit component including the bump situated in a position which is suitable for the opening position of the via hole; and mounting the selected circuit component on the dielectric layer so that the bump is aligned with the via hole and bonding at least a part of the bump to an inner surface of the via hole.

Embodiments of the present invention will now be described with reference to the accompanying drawings applied to a portable computer.

FIGS. 1 to 10show a portable computer1as an electronic device according to one embodiment of the present invention. As shown inFIG. 1, the portable computer1includes a body2and a display unit3.

The body2is provided with a box-shaped case4. The case4includes a top wall4a, a side wall4b, and a bottom wall (not shown). The top wall4aof the case4supports a keyboard5. The case4contains a printed circuit board6therein.

The display unit3includes a display housing7and a liquid crystal display module8contained in the housing7. The display module8has a display screen8a. The display screen8ais exposed to the outside of the display housing7through an opening7ain the front face of the housing7.

The display unit3is supported on a rear end portion of the case4by a hinge device. Thus, the display unit3is rockable between a closed position in which it is lowered to cover the top wall4afrom above and an open position in which the unit3is raised to expose the top wall4a.

FIG. 2typically shows a configuration of the printed circuit board6. The circuit board6is a multilayer printed circuit board. The circuit board6includes a first laminate member11, circuit component12, dielectric member13, and second laminate member14.

The first laminate member11is an example of a first dielectric layer, which includes a first core member21. The first laminate member11is provided with first and second conductive patterns22and23and via holes24. The first core member21is formed of a dielectric material, e.g., a woven glass fabric or paper impregnated with a resin material such as an epoxy, polyimide, or BT resin.

The first conductive pattern22is formed on the lower surface of the first core member21. The second conductive pattern23is formed on the upper surface of the core member21. The first and second conductive patterns22and23are formed of, for example, a copper foil each. Each of the conductive patterns22and23constitutes a part of an electric circuit of the printed circuit board6.

As shown inFIG. 2, the via holes24are situated corresponding to the second conductive pattern23and open at a surface of the first laminate member11. A plurality of bumps31are formed on the circuit component12. The via holes24are as many as the bumps31. Each via hole24has an opening24aand a plating layer24b. The opening24ais formed ranging from the upper surface of the second conductive pattern23to the lower surface of the first core member21.

The plating layer24bis an example of a conductive layer. The plating layer24bis formed covering the inner surface of the opening24a, the upper surface of the first conductive pattern22, and the upper and side surfaces of the second conductive pattern23. Thus, each the plating layer24bof the via holes24is connected electrically to at least any one of the first and second conductive patterns22and23. The plating layer24b, in conjunction with the second conductive pattern.23, functions as a connecting conductor on which the circuit component12is mounted. The surface of the plating layer24bforms an inner surface24cof each via hole24. The inner surface24cof the via hole24forms a bottom surface24don the upper surface of the first conductive pattern22.

The first dielectric layer is not limited to the configuration of the first laminate member11according to the present embodiment. For example, alternative conductive patterns or via holes24that constitute a part of each electric circuit may be provided on the upper or lower surface of the first core member21. The plating layer24bmay be configured to serve singly as a connecting conductor on which the circuit component12is mounted without the use of the second conductive pattern23.

As shown inFIG. 2, the circuit component12is set on the first laminate member11. An example of the circuit component12is an IC chip. The component12includes the bumps31and a component body32. The component body32includes, for example, a semiconductor that activates the component12and a mold that encloses the semiconductor.

The circuit component12may be either an active element, such as an IC or LSI chip, or a passive element, such as a chip resistor or chip capacitor. Further, the IC or LSI chip may be of any type, either a bare chip or a package-type chip, such as a ball grid array (BGA).

The bumps31are protrusions that are arranged in a lattice on the lower surface of the component body32. Although the bumps31according to the present embodiment are formed of, for example, gold (Au), they may alternatively be formed of a conductive material such as solder. The lower end portion of each bump31is inserted in its corresponding via hole24and bonded to the inner surface24cof the hole24.

As shown inFIG. 2, the dielectric member13is laminated to the first laminate member11so as to cover the circuit component12. The dielectric member13is formed of an epoxy resin or the like that is highly doped with, for example, silica gel.

The second laminate member14is laminated to the dielectric member13so that the dielectric member13is sandwiched between the first and second laminate members11and14. In the present embodiment, the dielectric member13and the second laminate member14join together to form an example of a second dielectric layer15. The second laminate member14includes a second core member34, third and fourth conductive patterns35and36, and a via hole37.

Like the first core member21, the second core member34is formed of a dielectric material. The third conductive pattern35is formed on the lower surface of the second core member34. The fourth conductive pattern36is formed on the upper surface of the second core member34. The third and fourth conductive patterns35and36are formed of, for example, a copper foil each. Each of the conductive patterns35and36constitutes a part of an electric circuit of the printed circuit board6.

As shown inFIG. 2, the printed circuit board6further includes a through hole38and a solder resist layer39. The through hole38includes an opening that penetrates the printed circuit board6and a plating layer and constitutes a part of an electric circuit of the circuit board6. The solder resist layer39is provided on the outermost layer of the printed circuit board6.

A manufacturing method for the printed circuit board6according to a first embodiment of the present invention will now be described with reference toFIGS. 3 to 10.

FIG. 3shows a base41as a basis for the first laminate member11. The base41includes the first core member21and first and second conductive layers42and43provided individually on the obverse and reverse surfaces of the core member21.

First, a first process is performed to form the first laminate member11from the base41. In the first process, as shown inFIG. 4, the second conductive layer43on the upper surface of the first core member21is pattern-etched. By doing this, the second conductive pattern23is formed from the second conductive layer43. Further, the opening24aof each via hole24is bored through the first core member21by means of, for example, a CO2laser, UV laser, or drill. The plating layer24bis formed on the inner surface of the bored opening24a. Thereupon, the first laminate member11is formed.

The opening position of each via hole24varies with each laminate member depending on manufacturing errors. After the first process, a second process is performed to detect the opening position of each via hole24in the first laminate member11. As shown inFIG. 5, position information on each via hole24is acquired by using a CCD camera45, for example. The CCD camera45is an example of an image-pickup device. The camera45is situated above the first laminate member11and is movable along the surface of the member11. The camera45is fitted with a position sensor46for measuring its position.

In the second process, the CCD camera45is moved so as to scan the entire surface of the first laminate member11. The camera45detects, for example, positions of four sides of the first laminate member11and the opening position of each via hole24. Thus, some pieces of information can be acquired, including coordinates of each via hole24in the first laminate member11, distances between the via holes24, etc.

On the other hand, the position in which each bump31is formed varies with each circuit component12depending on manufacturing errors. Thereupon, a third process is performed to detect the position of each bump31. This third process may be performed either after or before the second process. Further, the second and third processes may be simultaneously carried out with use of a plurality of CCD cameras45.

As shown inFIG. 6, a plurality of circuit components12are prepared side by side on a manufacturing line for the printed circuit board6. The components12are held upside down so that the bumps31are situated above each component body32. In the description of the present embodiment to follow, a convex gold bump will be given as an example of each bump31.

In the third process, the CCD cameras45are moved so as to scan the entire circuit components12. Each camera45detects, for example, the positions of four sides of each component body32and the positions in which the bumps31are formed. Thus, some pieces of information can be acquired, including coordinates of each bump31in the component body32, distances between the bumps31, etc. This operation for detecting the position information on the bumps31is performed for all (or plurality) of the prepared circuit components12.

Then, a fourth process is performed to select any of the circuit components12. In the fourth process, the circuit component12having the bumps31in positions that are relatively coincident with (i.e. suitable for) the specific target via holes24in the first laminate member11is selected. In the present embodiment, “coincident” implies that the bumps31are arranged at intervals that are relatively equivalent to the distances between the via holes24. In other words, it is indicated that the via holes24and bumps31are arranged at similar pitches.

After the fourth process, a fifth process is. performed to mount the selected circuit component12on the first laminate member11. As shown inFIG. 7, the circuit component12is first set on the via holes24. Each bump31has a shape different from that of each via hole24. After the component12is set in this manner, a given downward pressure and given heat are applied to the component12. If the pressure is applied to the circuit component12, the convex bumps31are plastically deformed to be fitted into their corresponding via holes24along the shapes of the holes, as shown inFIG. 8. Thus, the bumps31are bonded individually to the respective inner surfaces24cof the via holes24.

After the fifth process, a sixth process is performed to laminate the dielectric member13and the second laminate member14. The second laminate member14is separately formed in a process similar to the first process. In this sixth process, the dielectric member13is kept in a semi-hardened, fluid state without being fully hardened. In the sixth process, the dielectric member13is put on the first laminate member11, and the second laminate member14on the dielectric member13. In this state, given temperature and pressure are applied for laminate pressing. Thus, the dielectric member13covers the circuit component12when it is hardened. In consequence, the first laminate member11, dielectric member13, and second laminate member14form one plate-like member.

A seventh process is performed. In the seventh process, as shown inFIG. 9, the through hole38is formed in each necessary position and subjected to pattern-etching. Thereupon, the first and fourth conductive patterns22and36are formed. Finally, the solder resist layer39is formed. If necessary, moreover, various circuit components (not shown) are mounted. The printed circuit board6shown inFIG. 2is manufactured by performing these processes.

According to the printed circuit board6constructed in this manner, the bond strength of the circuit components on the conductors that are formed on the dielectric layers can be enhanced. Specifically, the bumps31are inserted individually into the via holes24and bonded to their respective inner surfaces24c. As compared with the bond area between conventional bumps and pads, therefore, a larger bond area can be secured between the bumps31and the via holes24as connecting conductors. Thus, the bond strength, for example the shear strength, of the circuit component12on the first laminate member11can be enhanced.

The circuit component12according to the present embodiment can stand a pressure, if any, applied thereto as the dielectric member13is laminated to it.

Thus, the yield of production and reliability of the printed circuit board6with built-in components can be improved. Since the portable computer1is mounted on the printed circuit board6constructed in this manner, moreover, the yield of production and reliability of the computer1itself can be improved.

With use of the second laminate member14and the dielectric member13, a complicated electric circuit can be formed of the second laminate member14. Further, the dielectric member13can be used securely to cover the circuit component12.

If each via hole24has the bottom surface24d, each bump31is also bonded to the bottom surface24d. Therefore, the bond strength between the bumps31and the via holes24can be enhanced. If each via hole24has the bottom surface24d, moreover, the via hole24can be easily filled tight with the bump31. Thus, the reliability of connection is improved.

If each bump31that is initially formed having a shape different from that of each via hole24is plastically deformed as it is filled into the via hole24, the bump31can be formed with ease. Further, each bump31can be securely bonded to the inner surface24cof its corresponding via hole24.

Each bump31is not limited to the convex shape but may be formed having any other shape, such as the one shown inFIG. 10. Further, the material of each bump31is not limited to gold. As shown inFIG. 10, for example, the bumps31may be spherical solder bumps. Each solder bump31is filled into its corresponding via hole24by being melted in the fifth process. The same effect as that of the gold bumps can be obtained with these solder bumps31. The material of the bumps31is not limited to gold or solder but may be any other material that is conductive.

Each via hole24need not always have the bottom surface24dbut may be formed of a through hole that opens to the outside of the printed circuit board6. Even with use of this via hole, the bond strength between the bump31and the via hole can be enhanced as the bump is bonded to the inner surface24cof the via hole.

The second dielectric layer15need not always have the second laminate member14. It may alternatively be obtained by forming a conductive pattern directly on the dielectric member13with use of, for example, a conductive transfer base. The printed circuit board6may further have additional dielectric layers and conductive layers outside the first and second laminate members11and14.

According to the manufacturing method for the printed circuit board6arranged in this manner, a large bond area can be secured between the bumps31and the via holes24. Thus, the bond strength of the circuit component12on the first laminate member11can be enhanced.

The via holes24and the bumps31are subject to manufacturing errors. If an attempt is made to mount any randomly selected circuit component12on the via holes24without detecting the respective opening positions of the holes24, therefore, the opening positions of the holes sometimes may fail to be coincident with the positions in which the bumps31are formed.

According to the manufacturing method of the present embodiment, however, the bumps31can be mounted without deviation in the via holes24. Even if the positions of the holes24and the bumps31are subject to manufacturing errors, selecting circuit component12which is formed with the bumps31that are aligned with the via holes24inproves the yield of production of the printed circuit board6. If the respective positions of the via holes24and the bumps31are coincident with one another, the bond strength between them is also enhanced.

If the selected circuit component12is formed with the bumps31that are arranged at intervals that are most approximate to the distances between the via holes24, in particular, the bumps31can be inserted securely into the via holes24.

The method of detecting the respective positions of the via holes24and the bumps31using the CCD cameras45or other image-pickup devices is simpler than any other method. The detection of the positions of the via holes24and the bumps31are not limited to the method based on the image-pickup devices. For example, the positions may be detected by laser detectors, and any detection methods may be used only if they can detect indentations.

The printed circuit board6with built-in components can be manufactured by further laminating additional dielectric layers after the circuit component12is on the first laminate member11.

A manufacturing method for a printed circuit board6according to a second embodiment of the present invention will now be described with reference toFIGS. 11 to 14, as well as toFIGS. 3,4,7and9for the first embodiment. Processes common to the manufacturing methods of the first and second embodiments will be specified without explanation. The manufacturing method according to the present invention shares the first, fifth, sixth, and seventh processes with the manufacturing method according to the first embodiment.

After the first process, a second process is performed to detect the opening positions of the via holes24in the first laminate member11. In the second process, as shown inFIG. 11, positions of four sides of the first laminate member11and the opening positions of the via holes24are detected by, for example, the CCD camera45. Thereupon, some pieces of information are acquired, including coordinates of each via hole24in the first laminate member11, the direction and amount of eccentricity between a desired position M in which each via hole24should primarily be located and a position N in which each hole24is actually located, etc.

Further, a third process is performed to detect the position of each bump31. As in the first embodiment, the third process may be performed either after or before the second process. Further, the second and third processes may be carried out simultaneously. In the third process, as shown inFIG. 12, positions of four sides of each component body32and the positions in which the bumps31are formed are detected by the CCD camera45. Thereupon, some pieces of information are acquired, including coordinates of each bump31in the circuit component12, the direction and amount of eccentricity between a desired position m in which each bump31should primarily be located and a position n in which each bump31is actually located, etc.

Then, a fourth process is performed to select any of the circuit components12. In the fourth process, the circuit component12having the bumps31in positions that are relatively coincident with the specific target via holes24in the first laminate member11is selected. In the present embodiment, “coincident” implies that the bumps31are made eccentric to cancel the eccentricity of each via hole24in the case where the via hole24is located eccentrically to the position in which it should primarily be formed.

For example, for each via hole24that is formed in the position N rightwardly eccentric to the desired position M, as shown inFIG. 11, the circuit component12is selected that is provided with the bumps31that are each formed in the position n that is leftwardly eccentric to the desired position m (on the side opposite from the direction of eccentricity of the position N), as shown inFIG. 12. Even if the positions of the via holes24are eccentric, for example, the component body32of the circuit component12can be located in the desired position in which it should primarily be located, as shown inFIG. 13, by combining these via holes and bumps. Thereupon, the printed circuit board6is formed, as shown inFIG. 14.

According to the manufacturing method for the printed circuit board6arranged in this manner, a large bond area can be secured between the bumps31and the via holes24. Thus, the bond strength of the circuit component12on the first laminate member11can be enhanced. Even if the positions of the via holes24and the bumps31are subject to manufacturing errors, moreover, the bumps31can be mounted without deviation in the via holes24.

If the selected circuit component12is formed with the bumps31that are made eccentric to cancel the eccentricity of the via holes24, for example, the component body32of the component12can be located in a desired position. The bumps31may be spherical solder bumps, as shown inFIG. 10.

A manufacturing method for a printed circuit board6according to a third embodiment of the present invention will now be described with reference toFIG. 15, as well as toFIGS. 3 to 5andFIGS. 7 to 9for the first embodiment. Processes common to the manufacturing methods of the first and third embodiments will be specified without explanation. The manufacturing method according to the present invention shares the first and second processes with the manufacturing method according to the first embodiment.

After the second process, a third process is performed to the form the bumps31. In the third process, as shown inFIG. 15, the bumps31are formed on the component body32by using a bump forming apparatus61. In this process, the bumps31are formed so as to be in positions that are relatively coincident with the opening positions of the via holes24. In the present embodiment, “coincident” implies that the bumps31are formed at intervals that are relatively equivalent to the distances between the via holes24. In other words, it is indicated that the bumps31are formed so that the pitches of the via holes24and the bumps31are similar.

After the third process, a fourth process is performed to mount the circuit component12with the bumps31on the first laminate member11. Further, a process for laminating the dielectric member13and the second laminate member14and other processes are performed, whereupon the printed circuit board6is formed.

According to the manufacturing method for the printed circuit board6arranged in this manner, a large bond area can be secured between the bumps31and the via holes24. Thus, the bond strength of the circuit component12on the first laminate member11can be enhanced. Even if the positions of the via holes24are subject to manufacturing errors, moreover, the bumps31can be mounted without deviation in the via holes24.

If the bumps31are formed at intervals that are equivalent to the distances between the via holes24, in particular, the bumps31can be inserted securely into the via holes24.

A manufacturing method for a printed circuit board6according to a fourth embodiment of the present invention will now be described with reference toFIG. 16, as well as toFIGS. 3,4,7,9,11,13and14for the first and second embodiments. Processes common to the manufacturing methods of the second and fourth embodiments will be specified without explanation. The manufacturing method according to the present invention shares the first and second processes with the manufacturing method according to the second embodiment.

After the second process, a third process is performed to the form the bumps31. As shown inFIG. 16, the bumps31are formed so as to be in positions that are relatively coincident with the opening positions of the via holes24. In the present embodiment, “coincident” implies that the bumps31are made eccentric to cancel the eccentricity of each via hole24in the case where the via hole24is located eccentrically to the desired position in which it should primarily be formed.

After the third process, a fourth process is performed to mount the circuit component12with the bumps31on the first laminate member11. Further, a process for laminating the dielectric member13and the second laminate member14and other processes are performed, whereupon the printed circuit board6is formed.

According to the manufacturing method for the printed circuit board6arranged in this manner, a large bond area can be secured between the bumps31and the via holes24. Thus, the bond strength of the circuit component12on the first laminate member11can be enhanced. Even if the positions of the via holes24are subject to manufacturing errors, the bumps31can be mounted without deviation in the via holes24.

Since the bumps31are made eccentric so as to cancel the eccentricity of the opening positions of the via holes24, in particular, the component body32of the circuit component12can be located in the desired position.

Although there have been described the printed circuit boards6according to the one embodiment and the manufacturing methods for the printed circuit board6according to the first to fourth embodiments, the present invention is not limited to these embodiments. For example, the coincidence of the positions of the bumps31with the opening positions of the via holes24is not limited to the approximation of their pitches or amounts of eccentricity, but any other criterion may be provided for the purpose. Further, a plurality of criteria may be used in combination with one another.

The manufacturing methods according to the first to fourth embodiments are not limited to the manufacture of the printed circuit board6with built-in components. A conventional printed board without built-in components in which the bumps31are mounted in the via holes24can be manufactured by performing the first to fifth processes according to the first and second embodiments or the first to fourth processes according to the third and fourth embodiments. Electronic devices to which the present invention is applicable include any other types of devices than portable computers, including cell phones, digital cameras, personal digital assistants, etc.