Instrumentation chassis with high speed bridge board

An instrumentation chassis includes a backplane, multiple peripheral slots located on the backplane and configured to receive insertable peripheral modules, respectively, and at least one protocol agnostic high speed connection mounted on, but not electrically connected to the backplane. The high speed connection is configured to interconnect at least two peripheral modules in corresponding peripheral slots of the multiple peripheral slots, bypassing the backplane.

BACKGROUND

Peripheral component interconnect (PCI) and the more recent peripheral component interconnect express (PCIe) are standards for incorporating peripheral devices into computing systems. PCI and PCIe define physical and logical interfaces and protocols for communication with PCI and PCIe compatible devices. For example, PCIe may be used in consumer and industrial applications as a motherboard level interconnect, a passive backplane interconnect, and an expansion card interface. Various standards are based on PCI and PCIe, such as PCI eXtensions for instrumentation (PXI) and PCIe eXtensions for instrumentation (PXIe), which adapt PCI and PCIe, respectively, for test and measurement applications. The discussion below focuses on PCIe and PXIe, which provide more capability and flexibility, although PCI and PXI are still in use and may be combined with PCIe/PXIe systems to support legacy applications.

PCIe compatible devices may be configured as peripheral modules and interconnected with one another and/or with a system controller through a network of PCIe switches (switch fabric) in a modular instrumentation framework (chassis). For example, the system controller may be connected to a root complex having PCIe ports, each of which is connected to a peripheral device or a PCIe switch. Each PCIe switch is connected to multiple PCIe slots in the chassis, which are configured to receive the peripheral modules. The instrumentation chassis may also include other types of modules, such as a system module for controlling operations of the other modules, and a timing module for providing timing signals to the other modules. The flexible nature of the switch fabric enables customization of an individual system.

Currently, high-speed digital and radio frequency (RF) signal test applications require higher processing capabilities to catch up with increasing bandwidth requirements of modern high bandwidth communications. In conventional modular instrumentation frameworks, such as PXIe compatible frameworks, more signal processing and data handling responsibilities in a measurement flow are being moved from traditional personal computer (PC)-based processing to hardware-based processing and acceleration, in which dedicated hardware is included in a measurement system for data processing. For example, high performance Graphics Processing Units (GPUs) may be used in PC graphics cards for measurement acceleration.

There are conventional solutions for high-speed interconnects among modules (e.g., particularly peripheral modules) in the PXIe protocol for attempting to accommodate the higher speed, including front panel interconnects, standard backplane PCIe connections, and carrier-to-mezzanine connections, although each of these conventional solutions has drawbacks. For example, although many different types of interconnects between modules may be used as front panel interconnects, front panel space is extremely limited and is typically reserved for important interconnects requiring user interaction, such as clocks, triggers, and the like, that need to be readily accessible. Standard backplane PCle connections provide up to eight lanes of PCIe available on the PXle backplane, which may support up to 8 Gbps per lane (in Gen3). However, the lanes are protocol specific and may not be viable, e.g., when the protocol in use is not PCIe, the lane speed is too low and/or the number of lanes is insufficient. Carrier-to-mezzanine connections, where the carrier is a main board and the mezzanine is a daughter board within the same module. Thus, multiple module-to-module connections with high speed transceivers, for example, cannot be supported, and spacing between modules is fixed by the carrier-to-mezzanine connector, and thus modules with this interconnect must be at fixed locations adjacent to each other. In addition, present carrier-to-mezzanine interconnects often are unable to run at sufficient data rates without modification.

Accordingly, there is a need for easily implemented, high-speed interconnects for enabling high-speed communications among modules and/or external devices in instrumentation chassis. Further, there is a need for the high-speed interconnects to be able to accommodate any type of communication standard (e.g., as opposed to being limited to PCI or PCIe communications).

SUMMARY

In a representative embodiment, an instrumentation chassis includes a backplane, multiple peripheral slots located on the backplane and configured to receive insertable peripheral modules, respectively, and at least one protocol agnostic high speed connection. The at least one protocol agnostic high speed connection is mounted on, but not electrically connected to the backplane and configured to interconnect at least two peripheral modules in corresponding peripheral slots of the multiple peripheral slots, bypassing the backplane.

In another representative embodiment, an instrumentation chassis includes a backplane, multiple peripheral slots located on the backplane and configured to receive multiple insertable peripheral modules, and a bridge board attachable to the backplane. The bridge board includes multiple differential pair high speed connections configured to interconnect insertable peripheral modules of the multiple insertable peripheral modules.

In another representative embodiment, an instrumentation chassis including a backplane, multiple peripheral slots located on the backplane and configured to receive multiple insertable peripheral modules, and a bridge board attachable to the backplane. The bridge board contains multiple mixed signal connections configured to interconnect insertable peripheral modules, by-passing the backplane, of the multiple insertable peripheral modules.

DETAILED DESCRIPTION

In the following detailed description, for purposes of explanation and not limitation, illustrative embodiments disclosing specific details are set forth in order to provide a thorough understanding of embodiments according to the present teachings. However, it will be apparent to one having had the benefit of the present disclosure that other embodiments according to the present teachings that depart from the specific details disclosed herein remain within the scope of the appended claims. Moreover, descriptions of well-known devices and methods may be omitted so as not to obscure the description of the example embodiments. Such methods and devices are within the scope of the present teachings. Generally, it is understood that the drawings and the various elements depicted therein are not drawn to scale.

Generally, it is understood that as used in the specification and appended claims, the terms “a”, “an” and “the” include both singular and plural referents, unless the context clearly dictates otherwise. Thus, for example, “a device” includes one device and plural devices.

As used in the specification and appended claims, and in addition to their ordinary meanings, the terms “substantial” or “substantially” mean to within acceptable limits or degree. For example, “substantially cancelled” means that one skilled in the art would consider the cancellation to be acceptable. As a further example, “substantially removed” means that one skilled in the art would consider the removal to be acceptable.

As used in the specification and the appended claims and in addition to its ordinary meaning, the term “approximately” means to within an acceptable limit or amount to one having ordinary skill in the art. For example, “approximately the same” means that one of ordinary skill in the art would consider the items being compared to be the same.

Various representative embodiments generally provide a bridge board that is configured to enable high speed communications between modules (e.g., transceivers within the modules) in an instrumentation chassis, in addition to or other than communications enabled by the backplane of the instrumentation chassis. The bridge board may be physically, but not electrically, attached to the backplane in order to bypass the circuitry (e.g., switching fabric) of the backplane, while providing an interconnect between the modules inserted in the instrumentation chassis. The interconnect may include numerous lanes of differential pair high speed connections, for example. Also, unlike the backplane, the bridge board is “protocol agnostic,” meaning that the protocol of the transceivers performing the communication and the protocol (or format) of the data itself does not matter to the bridge board. That is, the interconnect accommodates the electronic communication regardless of the protocol(s) of the receiving and transmitting entities.

FIG. 1is a front plan view of an illustrative modular instrumentation chassis, in which a bridge board may be incorporated, according to representative embodiments.

Referring toFIG. 1, instrumentation chassis100is shown as an 18-slot, hybrid PXI/PXIe chassis, for example, although various numbers of slots (e.g., 10-slots) and/or various alternative types of chassis (e.g., a PXIe chassis or an Advanced Telecommunications Computing Architecture (ATCA) eXtensions for instrumentation (AXIe) chassis), may be incorporated without departing from the scope of the present teachings. In the depicted example, the instrumentation chassis100is empty, in that it contains no plug-in modules, in order to show the internal rear portion of the instrumentation chassis100, as viewed through the large front opening of front panel110. The rear portion includes slots120, into which modules may be removably inserted, and a backplane130(a portion of which is visible next to the left-most slot (system slot121) of the slots120). The backplane130generally provides a switch fabric for selectively interconnecting the modules inserted into corresponding slots120. In an embodiment, the instrumentation chassis100may also include a mezzanine board (not shown), mounted behind the backplane, to accommodate all or a portion of the switching functionality.

Because the illustrative instrumentation chassis100is a hybrid PXI/PXIe chassis, the slots120include a system slot121, peripheral slots122, and a timing slot123. In the depicted configuration, the peripheral slots122are divided into a first set of eight peripheral slots122to the left of the timing slot123and a second set of eight peripheral slots122to the right of the timing slot123, although other slot arrangements are possible. The system slot121is configured to receive a system module, which may include an internal PXIe system controller, or a controller interface for interfacing with an external PXIe system controller, to control operations of the other modules. The peripheral slots122are configured to receive any of various types of peripheral modules for providing customized functionality of the instrumentation chassis100. Examples of peripheral modules include arbitrary waveform generator modules, digital multi-meter (DMM) modules, oscilloscope modules, multiplexer modules, switch modules, accelerator modules, signal generator modules, and the like. The peripheral slots122may include PXI slots, PXIe slots or hybrid PXI/PXIe slots (as shown inFIG. 1) for both modules having one or both of PXI and PXIe connectors. The timing slot123is configured to receive a timing module for providing timing signals to one or more of the inserted peripheral modules and the system module. Individual slot panels (not shown inFIG. 1) may be attached to the front panel110of the instrumentation chassis100to cover portions of the front opening corresponding to slots that are not occupied by removable modules.

The connections among inserted modules enabled by the backplane are made in accordance with the PCI and/or PCIe standards, for example. In the example shown inFIG. 1, the top row120aof the slots120are configured for PXIe connections and the bottom row120bof the slots120are configured for PXI connections. Generally, PXIe modules (e.g., plugged into the top row120aof the peripheral slots122) require PCIe for communications via the backplane130, and two different power supplies (+3.3V and +12V), while PXI modules (e.g., plugged into the bottom row120bof the peripheral slots122and the top connector of120a) require PCI for communications via the backplane130, and four different power supplies (+3.3V, +5V, +12V and −12V). Of course, supporting both PXIe and PXI also requires the backplane to support both PCIe and PCI protocols.

FIG. 2depicts a conventional peripheral module220configured for insertion within a peripheral slot of an instrumentation module, such as the instrumentation chassis100. For purposes of illustration, the peripheral module220is assumed to be designed in accordance with the PXIe standard. The peripheral module220therefore includes two standard PXIe connectors221and222that extend from an upper region of the rear portion of the peripheral module220that plug into one of the peripheral slots122(in the top row120a). This enables access to the switch fabric of the backplane130(and/or a mezzanine card attached thereto) for communications with other modules, including other peripheral modules, the system module in the system slot121, and/or the timing module in the timing slot123, for example. The module220also includes a module front panel224. The module front panel224may include various controls (e.g., power switch, rheostat) (not shown) to enable operational control of the circuitry within the module220, as well as exposed connectors226(e.g., coaxial cable connectors) to enable direct connectivity to front panels of other modules within the instrumentation chassis100and/or to external devices. If the module220were designed in accordance with the PXI standard, it would include standard PXI connector(s) that extend from a lower region of the rear portion of the peripheral module220that plug into one of the peripheral slots122(in the bottom row120b). Also, alternatively, the peripheral module220may have both PXIe and PXI connectors.

The peripheral module220includes a printed circuit assembly (PCA)228to provide the corresponding functionality. For example, the PCA228may include a power supply and regulator and an electronic circuit, including one or more of a clock generator, triggering and synchronization, random access memory (RAM) (e.g., dynamic RAM (DRAM), static RAM (SRAM) and/or synchronous dynamic RAM (SDRAM)), read only memory (ROM) (e.g., erasable programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), flash memory), and the like. The PCA228may further include processing or converter elements, such as a field-programmable gate array (FPGA), an application-specific integrated circuit (ASIC), a JESD204B Analog to Digital Converter and/or a JESD204B Digital to Analog Converter, for example. Under certain circumstances, it may be desired for an FPGA of one PCA228to communicate directly with an FPGA and/or an ASIC on another PCA228, e.g., on a different peripheral module220. Conventionally, this communication passes through the backplane130, which is limited by the PCIe and/or PCI protocol. This is particularly problematic for high-speed data transmission and/or PCA transceivers that use alternative communication protocols.

Thus, according to representative embodiments, at least one bridge board (not shown inFIG. 1) is mounted on, but not electrically connected to, the backplane130or the connectors of the slots120, and configured to interconnect at least two peripheral modules and/or PCAs to accommodate the high speed communications, regardless of protocol. The at least one bridge board may be mounted using stand-offs, a bridge board restraint, or other connection mechanism, examples of which are discussed below. Alternatively, the at least one bridge board may be pre-mounted on the at least two peripheral modules to establish the high speed connection (e.g., as shown inFIG. 3), and then the combined at least two peripheral modules may be inserted as an integrated unit into (adjacent) peripheral slots122. The at least two modules and/or PCAs may include, for example, two peripheral modules plugged into corresponding peripheral slots122, or one peripheral module plugged into a corresponding peripheral slot122and a mezzanine board containing a PCA that occupies the space corresponding to another (adjacent) slot122, but is not necessarily plugged into the connector of the peripheral slot122, and therefore not in electrical communication with the backplane130.

FIG. 3is a back perspective view of a multiple peripheral modules interconnected using bridge boards, to enable high speed connections, according to a representative embodiment.

Referring toFIG. 3, an example configuration depicts three peripheral modules (first peripheral module310, second peripheral module320and third peripheral module330) interconnected using two bridge boards (first bridge board351and second bridge board352), where the first and second bridge boards351and352provide protocol agnostic, high speed connections. That is, the first bridge board351is a printed circuit board that provides high speed lanes for transmitting signals between the adjoined first peripheral module310and the second peripheral module320, and the second bridge board352is a printed circuit board that provides high speed lanes for transmitting signals between the adjoined second peripheral module320and the third peripheral module330, regardless of the protocol(s) of the respective transmitting and receiving circuits. The number of high speed lanes may be large, as compared to the lanes available for communication via the backplane130. For example, each of the first and second bridge boards351and352may include in excess of 24 lanes, although any number of lanes may be incorporated without departing from the scope of the present teachings. Of course, the three peripheral modules and two bridge boards are depicted for purposes of illustration, and it is understood that various numbers of peripheral modules and/or bridge boards connecting two or more of the peripheral modules may be incorporated without departing from the scope of the present teachings.

In the depicted configuration, each of the first, second and third peripheral modules310,320and330has two standard PXIe connectors and two high speed connectors. That is, the first peripheral module310has first and second PXIe connectors315aand315b, and first and second high speed connectors318aand318b; the second peripheral module320has first and second PXIe connectors325aand325b, and first and second high speed connectors328aand328b; and the third peripheral module330has first and second PXIe connectors335aand335b, and first and second high speed connectors338aand338b. The first bridge board351is connected between the first high speed connectors318aand328ato provide high speed lanes between the first and second peripheral modules310and320. The second bridge board352is connected between the second high speed connectors328band338bto provide high speed lanes between the second and third peripheral modules320and330. Accordingly, the first, second and third peripheral modules310,320and330may include processing and/or converter elements that communicate over the high speed lanes contained on the first and second bridge boards351and352, respectively. Of course, the number of peripheral modules and corresponding connections to other peripheral module(s) may vary without departing from the scope of the present teachings. Also, one bridge board (e.g., first or second bridge board351or352) may interconnect more than two peripheral modules.

In various embodiments, each of the first and second bridge boards351and352provides a differential pair high speed connection. The differential pair high speed connection may be a high speed transceiver connection, including a two-way connection that enables communication in both directions, i.e., between transceivers in the adjoined peripheral modules, or a one-way connection to enable communication in only one direction, i.e., from a transmitter on one peripheral module to a receiver in another connected peripheral module. In an embodiment, the differential pair high speed connection may be a Serializer/Deserializer (SerDes) connection, for example. In alternative embodiments, one or both of the bridge boards351and352may contain multiple mixed signal connections configured to interconnect first, second and/or third peripheral modules310,320and330. The mixed signal connections may include radio frequency (RF) or microwave connectors, for example. Also, one or more of the connections may include coaxial blindmate connectors with attached transmission lines between connectors, for example, as described by U.S. Pat. No. 6,981,889, to Grothen et al. (Jan. 3, 2006), which is hereby incorporated by reference in its entirety.

As mentioned above, in various embodiments, the first and second bridge boards351and352may be attached to the respective high speed connectors prior to insertion of the combined first, second and third peripheral modules310,320and330to adjacent peripheral slots122in the instrumentation chassis100. In this way, the first, second and third peripheral modules310,320and330attached by the first and second bridge boards351and352may be inserted collectively as an integrated unit into adjacent peripheral slots122. Alternatively, the first and second bridge boards351and352may be attached to portions of the backplane, e.g., via stand-offs or braces, prior to insertion of the first, second and third peripheral modules310,320and330. In this way, the high speed connections enabled by the bridge boards351and352are not established until after each of the first, second and third peripheral modules310,320and330have been separately inserted into the adjacent peripheral slots122, coming into contact with the previously positioned first and second bridge boards351and352.

Still alternatively, a bridge board restraint may be attached to portions of the peripheral slots120prior to insertion of the first, second and third peripheral modules310,320and330.FIG. 4is a front plan view of the instrumentation chassis100showing an example of a bridge board restraint positioned within the instrumentation chassis100, to enable placement of one or more bridge boards for high speed connections, according to a representative embodiment.

Referring toFIG. 4, bridge board restraint450is attached to the PXI connectors of the three right-most peripheral slots122of the instrumentation chassis100. The bridge board restraint450thus covers the portion of the peripheral slots122corresponding to the relative positions of the first and second high speed connectors318aand318bof the illustrative first peripheral module310, first and second high speed connectors328aand328bof the second peripheral module320, and first and second high speed connectors338aand338bof the third peripheral module330, while leaving the corresponding PXIe connectors exposed for use by the first and second PXIe connectors315aand315bof the first peripheral module310, the first and second PXIe connectors325aand325bof the second peripheral module320, and the first and second PXIe connectors335aand335bof the third peripheral module330.

The bridge board restraint450provides an attachment mechanism for the first and second bridge boards351and352, and an insulating surface separating the first and second bridge boards351and352from the peripheral slots122and/or the backplane130. That is, a bridge board restraint is configured to attach a bridge board to the backplane, while keeping the bridge board electrically isolated. In the present example, using the bridge board restraint450, the first and second bridge boards351and352may be attached to the respective high speed connectors prior to insertion of the combined first, second and third peripheral modules310,320and330into the adjacent peripheral slots122in the instrumentation chassis100, as discussed above. Or, the first and second bridge boards351and352may be attached to the bridge board restraint450prior to insertion of the first, second and third peripheral modules310,320and330, such that the high speed connections enabled by the bridge boards351and352are not established until after each of the first, second and third peripheral modules310,320and330have been inserted into the adjacent peripheral slots122, as discussed above.

Generally, the bridge board restraint450is a capture mechanism that requires no modifications to the instrumentation chassis100. The bridge board restraint450may be installed in the instrumentation chassis100using the legacy PXI connectors of the peripheral slots120. For example, the bridge board restraint450may be plugged into the PXI connectors themselves and a conventional locking mechanism locks the bridge board restraint450in place. No modifications to the backplane130are required. Further, bridge board restraint(s)450are only placed where needed, leaving the rest of the PXI connectors (as well as all of the PXIe connectors) of the peripheral slots120and backplane130available for use with legacy or pre-existing PXI and/or PXIe modules.

FIGS. 5A, 5B and 5Care simplified block diagrams depicting examples of modules and/or PCAs interconnected by protocol agnostic bridge boards, according to representative embodiments.

Referring toFIG. 5A, peripheral module510is connected by protocol agnostic bridge board535(board-to-board high speed interconnect) to peripheral module520. The peripheral module510includes first and second PXIe connectors515aand515band the peripheral module520includes first and second PXIe connectors525aand525b, which may be used to establish connections with PXIe connectors in respective peripheral slots122of the instrumentation chassis100, for example. The peripheral modules510and520include corresponding PCAs512and522. The PCA512includes FPGA516, electronic circuit517and power supply and regulator519, and the PCA522includes FPGA526, electronic circuit527and power supply and regulator529. As indicated inFIG. 5A, the bridge board535establishes a direct connection between the FPGA516and the FPGA526with a high number of transceiver lanes, e.g., not following the PCIe protocol (or any other specific protocol). The FPGAs516and526may be typical commercial FPGAs, which provide very high serial rate transceivers. Accordingly, the bridge board535may provide differential point-to-point connections between the FPGAs516and526at data rates up to 28 Gbps for each differential pair, for example. Notably, the bridge board535does not follow the PCIe protocol, and therefore has a much higher bandwidth than the eight lanes PCIe (Gen3). For example, the bridge board535may have up to 48 lanes.

Referring toFIG. 5B, the peripheral module510is connected by protocol agnostic bridge board535to PCA530. Unlike the peripheral module520and corresponding PCA522, the PCA530does not include PXIe connectors, and therefore cannot be directly connected to a corresponding peripheral slot122(although the PCA530will occupy a space within the instrumentation chassis100corresponding to one or ore of the peripheral slots122). The PCA530includes ASIC538and power supply and regulator539. As indicated inFIG. 5B, the bridge board535establishes a direct connection between the FPGA516and the ASIC538with a high number of transceiver lanes, not following the PCIe protocol.

Referring toFIG. 5C, the peripheral module510is connected to multiple PCAs by separate protocol agnostic bridge boards. In particular, the peripheral module510is connected to PCAs530,540and550by bridge boards531,532and533, respectively. None of the PCAs530,540or550includes PXIe connectors, and therefore cannot be directly connected to corresponding peripheral slots122. The PCA530includes ASIC538and power supply and regulator539, the PCA540includes ASIC548and power supply and regulator554, and the PCA550includes ASIC558and power supply and regulator559. As indicated inFIG. 5C, the bridge boards531,532and533establish direct connections between the FPGA516and the ASICs538,548and558, respectively, each with a high number of transceiver lanes, e.g., not following the PCIe protocol.

FIGS. 6A, 6B and 6Care perspective views of PXIe modules610A,610B and610C configured for insertion within peripheral slots of an instrumentation module to connect with the backplane and/or high speed bridge boards, according to representative embodiments.

Referring toFIG. 6A, PXIe module610A includes first and second PXIe connectors615aand615b(illustrative standard connectors), and first and second high speed connectors618aand618b. The first PXIe connector615amay be a power connector for powering the PXIe module610A and the second PXIe connector615bmay be a signal connector enabling PCIe communications via the switch fabric of the backplane (e.g., backplane130). The first and second high speed connectors618aand618benable connections to one or more bridge boards, such as first and second bridge boards351and352, for example, for high speed communication with other modules and/or PCAs via the corresponding bridge boards. The PXIe module610A also includes a module front panel624with various controls (e.g., power switches, rheostats) (not shown) to enable operational control of the circuitry within the PXIe module610A, as well as exposed connectors626(e.g., coaxial cable connectors) to enable direct connectivity to front panels of other modules within the corresponding instrumentation chassis and/or to external devices. Notably, the configuration of the PXIe module610A is substantially the same as that of the first, second and third peripheral modules310,320and330discussed above with reference toFIG. 3.

Referring toFIGS. 6B and 6C, the respective PXIe modules610B and610C are similar to the PXIe module610A inFIG. 6A, with differing numbers of PXIe and high speed connectors. For example, the PXIe module610B includes only the first PXIe connector615afor powering the PXIe module610A. The PXIe module610B still includes both high speed connectors, the first and second high speed connectors618aand618b, enabling connections with up to two bridge boards for high speed communication with other modules and/or PCAs. Likewise, the PXIe module610C includes only the first PXIe connector615afor powering the PXIe module610C. However, the PXIe module610C includes an additional high speed connector, thus providing first, second and third high speed connectors618a,618band618c, enabling an increased number of electrical connections and connections with up to three bridge boards for high speed communication with other modules.

In the PXIe modules610A,610B and610C, the first and second PXIe connectors615aand615bextend from upper regions of the rear portions of the PXIe modules610A,610B and610C, as discussed above. This enables the first and second PXIe connectors615aand615bto plug into connectors of corresponding peripheral slots122and access to the switch fabric of the backplane130. In contrast, the first, second and third high speed connectors618a,618band618care recessed in comparison with the first and second PXIe connectors615aand615b. This enables the bridge boards to connect with high speed connectors of other modules without coming into direct contact with the peripheral slots122and/or the backplane130, assuming the first, second and third high speed connectors618a,618band618care recessed enough to create a space able to accommodate the thickness of each bridge board.

FIG. 7provides perspective views of illustrative high speed bridge board configurations, according to representative embodiments, each of which provides protocol agnostic high speed connections between modules and/or PCAs.

Referring toFIG. 7, illustrative bridge board configurations710,720,730and740include various connectors to accommodate different system designs to provide direct high speed interconnects where needed. Each of the bridge board configuration710,720,730and740are configured to attach to the PXI connectors of peripheral slots (e.g., in bottom row120b) of instrumentation chassis100, as discussed above with reference toFIG. 4, for example. Of course, various bridge board configurations may be attached to different types of connectors within instrumentation chassis, without departing from the scope of the present teachings.

Bridge board configuration710includes one bridge board710awith four full connectors711,712,713and714spaced apart from one another (e.g., by about the width of a peripheral slot122) in order to receive four modules and/or PCAs that will be connected by the high speed connection. Due to the larger spacing, one or more of the modules and/or PCAs may be wider than the width of a peripheral slot122, providing greater design flexibility. The bridge board710awill provide a direct high speed connection among all of the high speed connectors on the modules and/or PCAs.

Bridge board configuration720includes bridge board720awith one full connector721and one half connector722, and bridge board720bwith two full connectors723and724. Connector721and connector722are spaced apart from one another (e.g., by about the width of a peripheral slot122), in order to receive two modules and/or PCAs that will be connected by the high speed connection. The half connector722enables connection or a narrower bridge board (or possibly a single bridge board, as opposed to multiple adjacent bridge boards) than those accommodated by the full connectors723and724, for example. Due to the larger spacing, one or more of the modules and/or PCAs may be wider than the width of a peripheral slot122, providing greater design flexibility. Connectors723and724on the bridge board720bare spaced immediately adjacent to one another (e.g., about the same distance as adjacent peripheral slots122). Accordingly, modules and/or PCAs connected to the connectors723and724will have substantially the same dimensional requirements as the peripheral modules plugged directly into the peripheral slots122.

Bridge board configuration730includes bridge boards730a,730b,730cand730d. The bridge board730ahas two half connectors731and732spaced apart from one another (e.g., by about the width of a peripheral slot122), in order to receive two modules and/or PCAs that will be connected by the high speed connection. The bridge board730bhas two half connectors733and734spaced apart from one another (e.g., by about the width of a peripheral slot122), in order to receive two modules and/or PCAs that will be connected by the high speed connection. The bridge board730chas two half connectors735and736spaced apart from one another (e.g., by about the width of a peripheral slot122), in order to receive two modules and/or PCAs that will be connected by the high speed connection. The bridge board730dhas two half connectors737and738spaced apart from one another (e.g., by about the width of a peripheral slot122), in order to receive two modules and/or PCAs that will be connected by the high speed connection. Notably, connectors732and733are stacked to receive the same module and/or PCA; connectors734and735are stacked to receive the same module and/or PCA; and connectors736and737are stacked to receive the same module and/or PCA. However, each of the modules and/or PCAs in the stacked connectors (732/733,734/735,736/737) has high speed connections to two different modules and/or PCAs through the depicted arrangement of the bridge boards730a,730b,730cand730d.

Bridge board configuration740includes one bridge board740awith four full connectors, similar to the bridge board configuration710, except that the bridge board740aincludes a first type of connector741and three connectors742,743and744of another type. Thus, the bridge board configuration740illustrates that different connector types may be used on the same bridge board (e.g., bridge board740a), interconnecting modules containing different connector types, respectively (as long as the connectors741,742,743and744are on the same mechanical plane).

FIG. 8is a front perspective view of an instrumentation chassis showing an example of a bridge board configuration, according to a representative embodiment.

Referring toFIG. 8, illustrative bridge board configuration810is shown being attached to peripheral slots122of the instrumentation chassis100. The bridge board configuration810is configured to attach to the PXI connectors of seven adjacent peripheral slots122(e.g., in bottom row120b) of instrumentation chassis100, as discussed above with reference toFIG. 4, for example, leaving the PXIe connectors of all of the peripheral slots122exposed. In the depicted example, the bridge board configuration810includes bridge board810awith three full connectors811,813and814and one half connector812. The connectors811,812,813and814are spaced apart from one another (e.g., by about the width of a peripheral slot122) in order to receive four modules and/or PCAs that will be connected by the high speed connection. As mentioned above, due to the larger spacing, one or more of the modules and/or PCAs may be wider than the width of a peripheral slot122, providing greater design flexibility. Of course, various bridge board configurations, including those depicted inFIG. 7, may be attached in a similar fashion to adjacent peripheral slots122within the instrumentation chassis100, without departing from the scope of the present teachings.

Generally, incorporation of a protocol agnostic bridge board that provides a high speed connection enables high speed PCA to PCA two way transceiver (or one way transmitter/receiver) interconnects between PCAs or modules in a PXle system. For example, the PCA to PCA interconnects may be high speed differential pair transmission lines that are not protocol specific. The PCA to PCA interconnects are flexible and can be changed depending on the module types and module loading configuration used in the chassis. Further, PCA to PCA interconnects do not utilize front panel space. Multiple PCAs therefore can be interconnected in various configurations. As described above, the various PCAs may be incorporated into peripheral modules configured to plug into peripheral slots of an instrumentation chassis, or otherwise connected to peripheral modules (e.g., via the bridge board(s)).

While the disclosure references exemplary embodiments, it will be apparent to those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the present teachings. Therefore, it should be understood that the above embodiments are not limiting, but illustrative.