Liquid crystal display device and method for fabricating the same

A liquid crystal display device and a fabrication method thereof, are discussed. According to an embodiment, the liquid crystal display device includes gate lines on a substrate; data lines on the substrate; common lines disposed substantially in parallel to the gate lines; TFTs formed at intersections between the gate and data lines, each of the TFTs including a gate electrode extending from the corresponding gate line, a gate insulation layer, an active layer, an ohmic contact layer, a source electrode extending from the corresponding data line and a drain electrode spaced apart from the source electrode; passivation layers, each formed on the TFT and having a contact hole for exposing a part of the corresponding drain electrode; and pixel electrodes, each composed of a conductive layer and an insulation layer formed on the corresponding passivation layer and electrically connected to the corresponding drain electrode via the corresponding contact hole.

CROSS-REFERENCE TO RELATED APPLICATION

Pursuant to 35 U.S.C. §119(a), this application claims the benefit of earlier filing date and right of priority to Korean Applications No. 10-2009-0135698, filed on Dec. 31, 2009, and No. 10-2010-0025474, filed on Mar. 22, 2010, the contents of which is incorporated by reference herein in its entirety.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a liquid crystal display (LCD) device, and particularly, to an LCD device capable of increasing an aperture ratio by way of micro-patterning upon forming an electrode line including a pixel electrode of the LCD device and reducing a process time taken by a micro-patterning process, and a fabrication method thereof.

2. Discussion of the Background Art

In general, a thin film transistor (TFT) is widely used as a switching device in semiconductor devices, display devices such as TFT LCD devices, and the like.

Among others, the TFT LCD device is recognized as the next generation high-tech display device with characteristics of low power consumption, high portability, technology-intensiveness and highly value-added aspect.

Among several types of LCD devices, demands of an active matrix type LCD device having TFTs as switching devices for adjusting power-on or power-off for each pixel are increased due to high resolution and capability of realizing videos.

In order to micro-pattern a pixel electrode electrically connected to a TFT, which is widely used as a switching device in a semiconductor device as well as in the LCD device, many technical problems such as lengthy process time, etching non-uniformity and the like, may occur. Especially, various difficulties often arise in achieving a high aperture ratio, which hinders the process of increasing brightness of the LCD device.

From this perspective, a related art LCD device will now be described with reference toFIG. 1.

FIG. 1is a sectional view schematically showing an LCD device structure according to the related art. As shown inFIG. 1, an LCD device according to the related art includes a color filter substrate (not shown) with color filters, a TFT array substrate11facing the color filter substrate, a liquid crystal layer (not shown) interposed between the color filter substrate and the TFT array substrate11.

Here, the TFT array substrate11includes thereon gate lines (not shown), gate electrodes13adiverged from the gate lines, and a plurality of common electrodes13bdisposed in parallel to the gate lines with spaced gaps therebetween.

A gate insulation layer15is formed on the entire surface of the array substrate11including the gate electrode13a. A semiconductor layer21, which includes an active layer17and an ohmic contact layer19sequentially formed in an island shape, is formed on the gate insulation layer15. Here, the active layer17is made of pure amorphous silicon (a-Si:H), and the ohmic contact layer19is made of impure amorphous silicon (n+a-Si).

On the ohmic contact layer19, the LCD device further includes a data line23, which crosses over the gate line (not shown) to define a pixel region, a source electrode23aextending from the data line23, and a drain electrode23bspaced from the source electrode23a. Here, the gate electrode13a, the semiconductor layer21, the source electrode23aand the drain electrode23bconstruct a thin film transistor (TFT) T.

In addition, a passivation layer25having a contact hole (not shown) for exposing part of the drain electrode23bis formed on the entire surface of the source and drain electrodes23aand23band the exposed portion of the active layer17.

A pixel electrode31ais formed on the passivation layer25. The pixel electrode31ais independently present in each pixel region, and contacts the drain electrode23bvia the contact hole (not shown). Here, the pixel electrode31ais formed of indium tin oxide (ITO) as a transparent conductive material, and provided in plurality aligned in each unit pixel region and spaced apart from each other by a predetermined gap.

Accordingly, the plurality of common electrodes13band the plurality of pixel electrodes31aformed on the TFT array substrate11are aligned horizontally with gaps therebetween, so as to make horizontal magnetic fields responsive to voltages applied thereto. Here, liquid crystal molecules located between the horizontal magnetic fields are affected so as to be driven by the magnetic fields.

Hereinafter, a method for fabricating the related art LCD device ofFIG. 1will be described with reference toFIGS. 2A to 2E.

FIGS. 2A to 2Eare sectional views briefly showing sequential processes of a method for fabricating the LCD device ofFIG. 1according to the related art.

As shown inFIG. 2A, a gate line (not shown) and a gate electrode13aperpendicularly extending from the gate line are formed on a transparent substrate11. Here, a common line (not shown) disposed in parallel to the gate line is also formed on the substrate11, in addition to the gate line and the gate electrode extending from the gate line. The substrate11also includes thereon a common electrode13bextending from a common line, which is in parallel to the gate line and spaced therefrom by a predetermined gap.

Next, the gate insulation layer15is formed on the entire surface of the substrate11having the gate electrode13a. The semiconductor layer21, which includes the active layer17and the ohmic contact layer19sequentially formed in an island shape, is formed on the gate insulation layer15. Here, the active layer17is made of pure amorphous silicon (a-Si:H), and the ohmic contact layer19is made of impure amorphous silicon (n+a-Si).

Afterwards, there are provided, on the ohmic contact layer19, the data line23crossing over the gate line, a source electrode23aextending from the data line23, and a drain electrode23bspaced apart from the source electrode23awith a predetermined gap based upon the gate electrode13a. Here, the gate electrode13a, the semiconductor layer21, the source electrode23aand the drain electrode23bconstruct a TFT T.

A passivation layer25made of an inorganic insulating material is formed on the entire surface of the substrate11having the data line23, the source electrode23aand the drain electrode23b.

Then, as shown inFIG. 2B, the passivation layer25is selectively etched out through a lithography process using photolithography and a patterning process, to form a contact hole27for exposing a portion of the drain electrode23b.

As shown inFIG. 2C, a transparent conductive material such as ITO is deposited on the passivation layer25having the contact hole27, thereby forming a single-layer transparent conductive layer31.

After coating a photosensitive material on the transparent conductive layer31, an exposure mask (not shown), which defines a position where the pixel electrode is to be formed, is aligned on the photosensitive material layer (not shown). Lithography process and developing process for emitting infrared light to the photosensitive material layer through the exposure mask are executed so as to form a photosensitive layer pattern33.

As shown inFIG. 2D, the transparent conductive layer31is selectively etched out through a wet etching process by using the photosensitive layer pattern33as a barrier layer, thereby forming the pixel electrode31a. Here, although not shown, the pixel electrode31ais provided in plurality so as to be aligned in each pixel region by being spaced apart with a predetermined gap. Also, the plurality of pixel electrodes31amay alternate with the plurality of common electrodes13bwith predetermined spaced gaps therebetween.

As shown inFIG. 2E, after forming the pixel electrode31aby selectively etching out the transparent conductive layer31through the wet etching process, the remaining photosensitive layer pattern33is removed completely so as to complete the fabrication of the TFT array substrate of the LCD device.

Afterwards, although not shown, the process of fabricating the LCD device is completed by executing a process of fabricating a color filter array substrate including a black matrix layer and a color filter layer and a process of forming a liquid crystal layer between the color filter array substrate and the TFT array substrate11.

Considering the LCD device and the fabrication method thereof according to the related art, however, the following problems exist.

According to the LCD device and the fabrication method thereof according to the related art, the etching process used therein should be executed by considering etching capability according to the characteristic of a metal upon etching a single-layer metal layer, for example, ITO, molybdenum, titanium alloy or aluminum, which is used when forming the existing pixel electrode. Accordingly, the etching process becomes complicated. That is, etchant variation becomes drastic according to the type of metal involved, which makes it difficult to implement uniformity over limitations, and which results in a lower efficiency of the etching process and renders employment of a new metal difficult.

Also, for etching a metal layer having a single layer structure, etching uniformities at the upper and lower sides and right and left sides of the metal layer become harder to achieve due to defects, thereby making it difficult to realize micro lines in the etched product.

Further, when etching the single-layer metal layer, the metal layer may be damaged because it is already externally exposed. Consequently, formation of uniform lines becomes difficult, and a time taken for etching the metal layer is increased, thereby lowering productivity.

Thus, in order to form the pixel electrodes or other metal lines, such as the gate lines or the data lines, into micro electrodes each having a micro line-width w1, many technical problems such as an increase in the etching process time, difficulty in obtaining etching uniformity, metal damages and the like, may occur. For instance, various difficulties may arise in fabricating a display device needing high aperture ratios, which causes limitations on increasing the brightness of the display device.

Furthermore, the ITO as the transparent conductive material which is used in the related art LCD device is superior to transmittance but inferior to a contrast ratio, and hard to implement a line-width w1below about 3.0 μm. If molybdenum titanium (MoTi) is used as a material for addressing such a problem, the contrast ratio may improve; however, a rainbow spot phenomenon where external light looks like a rainbow while it is reflected at a metal electrode and transmitted through a polarizer may occur. Consequently, to obviate the rainbow spot generated while such light is reflected at the metal electrode and transmitted through the polarizer, a low-reflective electrode, which can reduce reflectivity of an electrode, is urgently required.

SUMMARY OF THE INVENTION

To address the above discussed problems and other problems associated with the related art, an object of the present invention is to provide an LCD device capable of improving productivity by increasing an aperture ratio by virtue of micro-patterning of lines and reducing a process time taken by the micro-patterning when forming electrode lines including pixel electrodes of the LCD device, and to provide a fabrication method of the LCD device.

Another object of the present invention is to provide an LCD device capable of being applicable to micro-patterning of metal lines for a semiconductor device or other display devices as well as the micro-patterning of the metal lines including the pixel electrodes of the LCD device, and to provide a fabrication method of the LCD device.

Another object of the present invention is to provide an LCD device applicable to a low-reflective electrode, which is capable of reducing reflectivity, and a fabrication method of the LCD device.

To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described herein, there is provided according to an embodiment an LCD device including gate lines disposed on a substrate in a matrix configuration, data lines formed on the substrate and intersecting with the gate lines to define pixel regions, common lines disposed in parallel to the gate lines, TFTs formed at intersections between the gate lines and the data lines, each TFT including a gate electrode diverged from the gate line, a gate insulation layer, an active layer, an ohmic contact layer, a source electrode diverged from the data line and a drain electrode facing the source electrode with a spaced gap, passivation layers each formed on the TFT and having a contact hole for exposing part of the drain electrode, and pixel electrodes each composed of a conductive layer and an insulation layer on the passivation layer and electrically connected to the drain electrode via the contact hole.

In accordance with one embodiment of the present invention, there is provided with a method for fabricating an LCD device, the method including, forming, on a substrate, a gate line having a gate electrode and a common line disposed in parallel to the gate line and having a common electrode, forming a gate insulation layer on an entire surface of the substrate having the gate electrode, forming a semiconductor layer on the gate electrode by interposing the gate insulation layer therebetween, the semiconductor layer comprising an active layer and an ohmic contact layer spaced by a channel region, forming, on the semiconductor layer, a data line intersecting with the gate line to define a pixel region, a source electrode diverged from the data line and a drain electrode spaced from the source electrode, forming a passivation layer on the entire surface of the substrate having the source electrode, the drain electrode and the data line, forming a contact hole by patterning the passivation layer, the contact hole exposing part of the drain electrode, depositing a conductive layer and an insulation layer on the passivation layer, the conductive layer contacting the drain electrode via the contact hole, and etching the conductive layer and the insulation layer to form a pixel electrode, the pixel electrode comprising a conductive layer pattern and an insulation layer pattern.

According to an embodiment, in the LCD device and the fabrication method thereof, a dual layer in a structure including a metal layer and a metal insulation layer is etched so as to be used as a pixel electrode, whereby faster etching speed can be obtained as compared to a single metal layer and accordingly micro electrodes with a high aperture ratio or micro lines with micro line-widths can be formed.

Since the present invention allows the patterning of the micro electrodes by virtue of shortening an etch time, the micro line-width w2of the pixel electrode can be reduced, as compared to the related art, so as to improve the aperture ratio, which in turn enhances the overall brightness of the display device.

In addition, since the present invention allows the formation of the micro electrodes, for example, pixel electrodes and common electrodes, with micro line-widths w2, the number of pixel electrodes and common electrodes located within a unit pixel region can be increased.

Accordingly, the present invention can increase the strength of an electric field by further narrowing a distance d2between a pixel electrode and a common electrode, as compared to an existing distance therebetween, while maintaining the aperture ratio. Hence, the reaction speed of the LCD device can be increased by raising the reactivity of liquid crystal, which reacts with the electric field.

Therefore, the formation process of pixel electrodes or other metal lines of the LCD device according to the present invention can be executed more quickly and uniformly than in the related art. Accordingly, the LCD device of the invention achieves a high aperture ratio due to the micro-patterning of electrodes and reduce an etch time taken for the micro-patterning.

In accordance with the LCD device and the fabrication method thereof according to an embodiment of the present invention, when forming pixel electrodes or other metal lines of the LCD device, the etching process can be executed in a state where a dual layer structure has been implemented by forming a metal layer and an inorganic insulation layer including a metal insulation layer, thereby ensuring a quick etch time as compared to the existing single metal layer structure, which results in the reduction of an etch time.

In accordance with the LCD device and the fabrication method thereof according to an embodiment the present invention, since the quick etch time is obtained as compared to the existing single metal layer structure, a micro line-width of electrode can be narrowed, thereby increasing the aperture ratio and brightness by virtue of the micro electrode and improving the productivity due to the reduction of the etch time.

In accordance with the LCD device and the fabrication method thereof according to an embodiment of the present invention, since the dual layer in the structure of the metal layer and the inorganic insulation layer including the metal insulation layer for forming electrodes is etched so as to implement uniform micro lines, and also an external exposure of the metal layer is prevented by the metal insulation layer to thereby decrease damages on the metal layer.

Although the existing single metal electrode according to the related art has generated the rainbow spot phenomenon due to high reflectivity, the present invention addresses this limitation and according to an embodiment of the invention, a metal electrode in the dual layer structure of the metal layer and the metal insulation layer used in the present invention has low reflectivity, so that it can be used as a low-reflective electrode. For instance, the metal insulation layer has a light reflectivity lower than that of the metal layer and, accordingly, it can function to reduce the reflectivity by being located on the metal layer with the high reflectivity. Hence, the metal electrode in the dual layer structure of the metal layer and the metal insulation layer can be applied as the low-reflective electrode.

The present invention may also be applicable to a low-reflective electrode for solar cell, metal lines including micro electrodes for a semiconductor device or metal lines including micro electrodes for other display devices, as well as the various metal lines including pixel electrodes of the LCD device.

According to an embodiment, the invention provides a liquid crystal display device comprising: gate lines disposed on a substrate; data lines formed on the substrate and crossing the gate lines to define pixel regions; common lines disposed substantially in parallel to the gate lines; thin film transistors (TFTs) formed at intersections between the gate lines and the data lines, each of the TFTs including a gate electrode extending from the corresponding gate line, a gate insulation layer, an active layer, an ohmic contact layer, a source electrode extending from the corresponding data line and a drain electrode spaced apart from the source electrode; passivation layers, each of the passivation layers formed on the TFT and having a contact hole for exposing a part of the corresponding drain electrode; and pixel electrodes, each of the pixel electrodes composed of a conductive layer and an insulation layer formed on the corresponding passivation layer and electrically connected to the corresponding drain electrode via the corresponding contact hole.

According to an embodiment, the invention provides a method for forming a liquid crystal display device, the method comprising: forming gate lines on a substrate; forming data lines on the substrate, the data lines crossing the gate lines to define pixel regions; forming common lines substantially in parallel to the gate lines; forming thin film transistors (TFTs) at intersections between the gate lines and the data lines, each of the TFTs including a gate electrode extending from the corresponding gate line, a gate insulation layer, an active layer, an ohmic contact layer, a source electrode extending from the corresponding data line and a drain electrode spaced apart from the source electrode; forming passivation layers on the TFTs, each of the passivation layers having a contact hole for exposing a part of the corresponding drain electrode; and forming pixel electrodes, each of the pixel electrodes composed of a conductive layer and an insulation layer formed on the corresponding passivation layer and electrically connected to the corresponding drain electrode via the corresponding contact hole.

According to an embodiment, the invention provides a method for fabricating a liquid crystal display device, the method comprising: forming, on a substrate, a gate line having a gate electrode and a common line disposed substantially in parallel to the gate line and having a common electrode; forming a gate insulation layer on the substrate having the gate electrode; forming a semiconductor layer on the gate electrode by interposing the gate insulation layer between the gate electrode and the semiconductor layer, the semiconductor layer comprising an active layer and an ohmic contact layer and having a channel region; forming, on the semiconductor layer, a data line crossing the gate line to define a pixel region, a source electrode extending from the data line and a drain electrode spaced apart from the source electrode; forming a passivation layer on the substrate having the source electrode, the drain electrode and the data line; forming a contact hole by patterning the passivation layer, the contact hole exposing a part of the drain electrode; depositing a conductive material layer and an insulation material layer on the passivation layer, the conductive material layer contacting the drain electrode via the contact hole; and etching portions of the conductive material layer and the insulation material layer to form a conductive layer and an insulation layer, the conductive layer and the insulation layer constituting a pixel electrode.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Description will now be given in detail of an LCD device in accordance with the preferred embodiments of the present invention, with reference to the accompanying drawings. For the sake of brief description with reference to the drawings, the same or equivalent components will be provided with the same reference numbers, and description thereof will not be repeated.

FIG. 3is a sectional view showing a TFT array substrate for an LCD device in accordance with an embodiment of the present invention.

As shown inFIG. 3, an LCD device according to the present invention may include a plurality of gate lines103horizontally (or in one direction) disposed on an LCD display array substrate (see “101” inFIG. 4) in parallel and spaced apart from each other by predetermined gaps, common lines104disposed adjacent to the gate lines103to be in parallel to the gate lines103, and a plurality of data lines113aintersecting with (or crossing over/under) the gate lines103to define pixel regions P and extending in a vertical direction or a direction generally perpendicular to the direction of the gate lines103.

A thin film transistor (TFT) may be formed at each intersection between the corresponding gate line103and the corresponding data line113awithin each pixel region P. The TFT may include a gate electrode103adiverged from the gate line103, a gate insulation layer105(FIG. 4) on the gate electrode103a, a semiconductor layer111formed on the gate insulation layer105and provided with an active layer107and an ohmic contact layer109(FIG. 4), and a source electrode113band a drain electrode113cformed on the semiconductor layer111in a contacted state. Here, the source electrode113bextends from the data line113a.

A plurality of common electrodes104aextending from the common line104, which is formed adjacent to the gate line103in parallel to each other, may be formed within each pixel region P to be in parallel to the data lines113a. A plurality of pixel electrodes141amay alternate with the plurality of common electrodes104asuch that each pixel electrode141ais located between two of the adjacent common electrodes104a. Here, the plurality of pixel electrodes141amay extend from a pixel electrode line141connected to the drain electrode113c. The plurality of pixel electrodes141acome in contact with the drain electrode113cvia a contact hole127.

FIG. 4is a cut-out sectional view taken along the line IV-IV ofFIG. 3, which schematically shows a structure of the LCD device according to an embodiment of the present invention.

Herein, the present invention will be described based upon the structure of the pixel electrode of the LCD device; however, it should be understood that the present invention may be equally applicable to structures of other metal lines, for example, the gate line including the gate electrodes, the common line, or the data lines including source and drain electrodes. Also, the present invention will be applied to other devices, in addition to the metal line of the LCD device. Examples of the other devices may include a semiconductor device using metal electrodes or metal lines with micro line-widths, other types of display devices, a low-reflective electrode for a solar cell and the like.

In the structure of the LCD device according to an embodiment of the present invention, as shown inFIG. 4, the gate electrode103aextending from the gate line (see “103” inFIG. 3) and the common electrode104aextending from the common line (see “104” inFIG. 3) are formed on the substrate101. The gate insulation layer105is then formed on the entire surface of the substrate101. The semiconductor layer111having the active layer107and the ohmic contact layer109is formed on the gate insulation layer105to correspond to the gate electrode103a. Here, the gate electrode103aextending from the gate line and the common electrode104aare also formed. Also, the gate line and the common line may be configured in a single layer structure, a dual layer structure or a triple layer structure; however, the drawings show the single layer structure for the sake of brief description. Here, the dual layer structure may have a deposited structure of a conductive layer and an inorganic insulation layer, and the triple layer structure may have a deposited structure of two conductive layers and an inorganic insulation layer. Here, the dual layer may be formed of one or more conductive materials, which are selected from a conductive metal group including molybdenum titanium (MoTi), aluminum (Al), aluminum alloy, chrome (Cr), tungsten (W) and copper (Cu), or selected from ITO, AZO, ZnO, IZO or other transparent metals.

The inorganic insulation layer may be made of a material selected from inorganic insulating materials, including metal nitrides, metal oxides, nitrides and oxides. Here, metals included in the metal nitrides and the metal oxides may include Cu, Al, Al alloy, Cr, W or MoTi. The active layer107may be made of pure amorphous silicon (a-Si:H), and the ohmic contact layer109may be made of impure amorphous silicon (n+a-Si).

The data line113ais formed on the gate insulation layer105to cross over with the gate line and the common line. The source electrode113band the drain electrode113care formed on the semiconductor layer111. The source electrode113bextends from the data line113aand comes in contact with the semiconductor layer111, and the drain electrode113cis spaced apart from the source electrode113cand also comes in contact with the semiconductor layer111. Here, the construction including the data line113a, the source electrode113band the drain electrode113cmay be realized in a dual or triple layer structure; however, the drawings show the single layer structure for the sake of brief description. The dual layer structure may have a deposited structure of a conductive layer and an inorganic insulation layer, and the triple layer structure may have a deposited structure of two conductive layers and an inorganic insulation layer. Here, the dual layer may be formed of one or more conductive materials, which are selected from a conductive metal group including molybdenum titanium (MoTi), aluminum (Al), Al alloy, chrome (Cr), tungsten (W) and copper (Cu), or selected from ITO, AZO, ZnO, IZO or other transparent metals.

The inorganic insulation layer may be made of a material selected from inorganic insulating materials, including metal nitrides, metal oxides, nitrides and oxides. Here, metals included in the metal nitrides and the metal oxides may include Cu, Al, Al alloy, Cr, W or MoTi.

A passivation layer125having a contact hole is deposited on the source and drain electrodes113band113cand the entire surface of the exposed gate insulation layer105. The plurality of pixel electrodes141a, which extend from the pixel electrode line141and come in contact with the drain electrode113cvia the contact hole127, are formed on the passivation layer125to alternate with the plurality of common electrodes104a. Here, the plurality of pixel electrodes141amay be located on the passivation layer125as shown in the drawing; however, although not shown, they may be formed on the gate insulation layer on which the source and drain electrode are formed.

Here, each of the pixel electrodes141aand the pixel electrode line141has a deposited structure of a conductive layer pattern129aand an inorganic insulation layer pattern131a. Here, the material of the conductive layer pattern129amay be one or more selected from a conductive metal group, which includes, e.g., molybdenum titanium (MoTi) alloy, aluminum (Al), Al alloy, chrome (Cr), tungsten (W) and copper (Cu), or selected from ITO, AZO, ZnO, IZO or other transparent metals. The material of the inorganic insulation layer131amay be selected from inorganic insulating materials, including, e.g., metal nitrides, metal oxides, nitrides and oxides. Here, metals included in the metal nitrides and the metal oxides may include, e.g., Cu, Al, Al alloy, Cr, W or MoTi.

Although not shown inFIG. 4, a color filter substrate (see “151” inFIG. 5N) may be disposed above the transparent substrate101as the TFT array substrate with a predetermined gap, and a liquid crystal layer (see “161” inFIG. 5N) may interpose therebetween.

Hereinafter, a method for fabricating the thusly-configured LCD device according to an embodiment of the present invention will be described with reference toFIGS. 5A to 5N. The methods ofFIGS. 5A to 5Nare used to form the LCD device ofFIGS. 3 and 4, but can be used to other devices.

FIGS. 5A to 5Nare sectional views showing sequential processes of a method for fabricating an LCD device in accordance with an embodiment of the present invention. Although the sequential processes are discussed, these processes may be performed in a different order as needed.

Herein, an embodiment of the present invention will be described based upon the structure of the pixel electrode of the LCD device; however, it should be understood that the present invention may be equally applicable to structures of other metal lines, for example, the gate line including the gate electrodes, the common line, or the data lines including source and drain electrodes. Also, the present invention will be applied to other devices, in addition to the metal line of the LCD device. Examples of the other devices may include a semiconductor device using metal electrodes or metal lines with micro line-widths, other types of display devices, a low-reflective electrode for a solar cell and the like.

As shown inFIG. 5A, one or more metals, which are selected from a conductive metal group including, e.g., Al, Al alloy, Cr, W, MoTi, Cu and the like, are printed or formed on the transparent substrate101, thereby forming a conductive layer203. Here, the conductive layer203may be configured in a single layer structure, a dual layer structure, a triple layer structure, or other format; however, the present invention will be described based upon the single layer structure for brief description. Further, the dual layer structure may have a deposited structure of a conductive layer and an inorganic insulation layer, and the triple layer structure may have a deposited structure of two conductive layers and an inorganic insulation layer. Here, the dual layer may be formed of one or more conductive materials, which are selected from a conductive metal group including, e.g., MoTi alloy, Al, Al alloy, Cr, W and Cu, or selected from ITO, AZO, ZnO, IZO or other transparent metals.

The inorganic insulation layer may be made of a material selected from inorganic insulating materials, including, e.g., metal nitrides, metal oxides, nitrides and oxides. Here, metals included in the metal nitrides and the metal oxides may include, e.g., Cu, Al, Al alloy, Cr, W or MoTi.

A first photosensitive layer is then coated on the conductive layer203and then selectively removed through a lithography process using an exposure mask and a developing process, thereby forming a first photosensitive layer pattern.

Afterwards, as shown inFIG. 5B, the conductive layer203is selectively etched through an etching process using the first photosensitive layer pattern as a barrier layer, thereby forming the gate line (see “103” inFIG. 3), the gate electrode103aprotruding from the gate line103, the common line (see “104” inFIG. 3) and the common electrode104aextending from the common line104.

As shown inFIG. 5C, the first photosensitive layer pattern is removed, and then the gate insulation layer105is formed by printing or coating one material, selected from an inorganic insulating material group including, e.g., silicon oxide (SiO2) and silicon nitride (SiNx), and, in some cases, from an organic insulating material group including, e.g., benzocyclobutene and acryl-based resin, on the entire surface of the substrate101having the gate electrode103aand the common electrode104a.

Then, an active layer107composed of, e.g., amorphous silicon (a-Si:H) and an ohmic contact layer109composed of, e.g., impure amorphous silicon from which impurity is doped are sequentially formed on the gate insulation layer105.

A conductive material is sputtered on the ohmic contact layer109, thereby forming the conductive layer113. Here, the conductive layer113may use one or more materials, selected from a metal group including, e.g., MoTi, tantalum (Ta), Cr, nickel (Ni), indium (In), Mo, Ti, Cu, Al and Al alloy, or one or more selected from ITO, AZO, ZnO, IZO or other transparent metals.

The conductive layer113may be configured in a single layer structure, a dual layer structure or a triple layer structure; however, the drawings show the single layer structure for the sake of brief description. Here, the dual layer structure may have a deposited structure of a conductive layer and an inorganic insulation layer, and the triple layer structure may have a deposited structure of two conductive layers and an inorganic insulation layer. Here, the dual layer may be formed of one or more conductive materials, which are selected from a conductive metal group including, e.g., MoTi, Al, Al alloy, Cr, W and Cu, or selected from ITO, AZO, ZnO, IZO or other transparent metals. The inorganic insulation layer may be made of a material selected from inorganic insulating materials, including metal nitrides, metal oxides, nitride and oxide. Here, metals included in the metal nitrides and the metal oxides may include Cu, Al, Al alloy, Cr, W or MoTi.

Referring toFIGS. 5D and 5E, a second photosensitive layer115is coated on the conductive layer113and then processed by lithography and developing processes through photolithography using a diffraction mask120, thereby forming a second photosensitive layer pattern115a.

Here, the diffraction mask120may be a slit mask or a half-tone mask. Alternatively, a typical mask may be used instead of the diffraction mask120.

The diffraction mask120may include a non-transparent region120a, a semi-transparent region120band a transparent region120c. A thickness of the second photosensitive layer pattern115awhich is left after undergoing lithography and development through the semi-transparent region120bis thinner than that of the second photosensitive layer pattern115awhich is left after undergoing lithography and development through the non-transparent region120a. A portion of the second photosensitive layer pattern115alocated below the semi-transparent region120bcorresponds to a channel region of a TFT, and a portion thereof located below the non-transparent region120acorresponds to the source/drain region of the TFT.

As shown inFIG. 5F, the conductive layer113, the ohmic contact layer109and the active layer107are sequentially etched out by using the second photosensitive layer pattern115aas a barrier layer.

As shown inFIG. 5G, a portion of the second photosensitive layer pattern115ais removed by a predetermined thickness through an ashing process so as to expose an upper surface of the conductive layer113aligned at a position corresponding to the channel region.

As shown inFIG. 5H, the exposed portion of the conductive layer113is selectively etched out by using the ashed second photosensitive layer pattern115aas a mask, thereby forming the data line113aperpendicularly intersecting with or crossing the gate line to define a pixel region, the source electrode113bprotruding from the data line113aupward one side of the gate electrode103a, and the drain electrode113cspaced apart from the source electrode113bby a predetermined gap. Here, upon the etching of the conductive layer113located at the channel region, the lower ohmic contact layer109is simultaneously partially etched out.

As shown inFIG. 5I, after removing the second photosensitive layer pattern115a, a material selected from an organic insulating material group, or, in some cases, from an inorganic insulating material group is printed or formed on the entire surface of the substrate101having the data line113aand the source and drain electrodes113band113c, thereby forming a passivation layer125. A third photosensitive layer is then coated on the passivation layer125. Here, the passivation layer125may be formed by printing or coating one material selected from an inorganic insulating material group including, e.g., silicon oxide (SiO2) and silicon nitride (SiNx), and, in some cases, from an organic insulating material group including, e.g., benzocyclobutene and acryl-based resin. The third photosensitive layer then undergoes lithography and development processes through the photolithography, thereby forming a third photosensitive layer pattern (not shown).

As shown inFIG. 5J, the passivation layer125is selectively etched out by using the third photosensitive layer pattern as a mask, thereby forming the contact hole127for exposing a portion of the drain electrode113c.

As shown inFIG. 5K, after removing the third photosensitive layer pattern, the conductive layer129is sputtered on the passivation layer125having the contact hole127. Here, as the material of the conductive layer129, one or more materials may be selected from a conductive metal group including, e.g., MoTi, Al, Al alloy, Cr, W and Cu, or selected from, e.g., ITO, AZO, ZnO, IZO or other transparent metals.

Then an inorganic insulating material is deposited on the conductive layer129through a chemical vapor deposition method (CVD) or other deposition mechanisms, thereby forming an inorganic insulation layer131. Here, the material of the inorganic insulation layer131may be one selected from inorganic insulating materials including, e.g., metal nitrides, metal oxides, nitrides and oxides. Here, metals included in the metal nitrides and the metal oxides may be include Cu, Al, Al ally, Cr, W or MoTi. Also, it is appropriate for the inorganic insulating layer131to be deposited as thick as allowing smooth wet etching of the lower conductive layer129.

Next, a photosensitive material is coated on the inorganic insulation layer131, thereby forming a fourth photosensitive layer (not shown).

Afterwards, an exposure mask (not shown) for defining a position where a pixel electrode is to be formed is disposed on the fourth photosensitive layer, and lithography and development for emitting infrared light to the fourth photosensitive layer through the exposure mask are executed, thereby forming a fourth photosensitive layer pattern133.

As shown inFIG. 5L, the inorganic insulation layer131and the conductive layer129are selectively etched out through wet etching by using the fourth photosensitive layer pattern133as a barrier layer, thereby forming both the pixel electrode line141including a conductive layer pattern129aand an inorganic insulation layer pattern131aand the pixel electrode141aextending from the pixel electrode line141. For instance, by using the fourth photosensitive layer pattern133, both the pixel electrode line144and the pixel electrode141acan be simultaneously formed.

Here, while executing the wet etching, since the inorganic insulation layer131containing a metal component has been deposited on the conductive layer129, the conductive layer129acts as an anode and the inorganic insulation layer131acts as a cathode, and accordingly electrodes move from the inorganic insulation layer131to the conductive layer129. Accordingly, the etching of the inorganic insulation layer131, which has lost the electrons, is accelerated due to a galvanic effect. Consequently, as shown in an example ofFIG. 8, the inorganic insulation layer131represents a larger bias than the conductive layer129and the anodic conductive layer129is quickly corroded, thereby allowing fast etching of the side surface of the conductive layer129. That is, the electron movement becomes fast due to the difference of corrosion potential, namely, electromotive-force between metal dual layers, for example, between a metal layer made of MoTi and a metal insulation layer made of CuNx. Hence, the dual layer structure of the conductive layer129and the inorganic insulation layer131of the present invention allows a fast etching due to the galvanic effect. Therefore, the etching process time taken when forming the pixel electrode having the metal dual layer, namely, the conductive layer and the inorganic insulation layer, can be shortened and formation of micro electrodes or other micro metal lines with micro line-widths can be allowed effectively.

Therefore, if an etching process is executed in a state where the inorganic insulation layer131is deposited on the conductive layer129, the etching speed is faster than that in case of merely etching the existing single conductive layer, whereby patterning for forming electrodes or lines can become uniform and process time can be decreased.

Hereinafter, an etching principle for the dual layer structure including the conductive layer129and the inorganic insulation layer131according to the invention will briefly be described with reference toFIGS. 6 and 7.

FIG. 6is a graph showing an example of a distribution of corrosion potentials for each metal, in the method for fabricating the LCD device according to an embodiment of the present invention.

FIG. 7is a graph showing an example of current densities depending on potentials of a metal layer and a metal insulation layer in the method for fabricating the LCD device according to an embodiment of the present invention, which schematically shows a potential difference between the metal layer and the metal insulation layer.

For a single metal layer, a corrosion potential is about −0.35 and the corrosion potential of the metal insulation layer is about −0.025. However, for the dual layer structure of the metal layer and the metal insulation layer employed in the present invention, the corrosion potential is about 0.084.

Hence, a metal is hard to be etched if the corrosion potential of the metal insulation layer becomes high, and the metal is apt to corrode quickly at a low corrosion potential. Consequently, in case of a large corrosion potential difference between the metal layer and the metal insulation layer, corrosion may easily happen.

Referring toFIG. 6, Al or MoTi has a lower corrosion potential than Mo or Cu, such material may easily corrode.

Also, referring toFIG. 7, the large corrosion potential difference between a metal layer, e.g., MoTi, having a low corrosion potential and a metal insulation layer, e.g., CuNx, having a high corrosion potential well induces the galvanic effect, thereby enabling the metal layer and the metal insulation layer to be fast etched.

Therefore, when etching a dual metal layer for using as electrodes, the conductive layer129acts as an anode and the inorganic insulation layer131acts as a cathode, and accordingly electrodes move from the inorganic insulation layer131to the conductive layer129. Accordingly, the etching of the inorganic insulation layer131, which has lost the electrons, is accelerated due to the galvanic effect. Consequently, the inorganic insulation layer131represents a larger bias than the conductive layer129and the anodic conductive layer129quickly corrodes, thereby allowing fast etching of the side surface of the conductive layer129. That is, the electron movement becomes fast due to the difference of corrosion potentials, namely, electromotive-forces between the dual metal layers, for example, between a metal layer made of MoTi and a metal insulation layer made of CuNx.

Thus, the deposited structure of the conductive layer129and the inorganic insulation layer131as the dual metal layer is allowed to be quickly etched due to the galvanic effect. Consequently, the etching process time taken when forming the pixel electrode having the dual metal layer, namely, the conductive layer and the inorganic insulation layer of the invention, can be shortened and formation of micro electrodes or other micro metal lines with micro line-widths can be allowed advantageously.

As such, the present invention allows the micro electrode formation by decreasing the etch time. Accordingly, a micro line-width w2of a pixel electrode can be reduced more than that in a general LCD device, thereby improving an aperture ratio and enhancing overall brightness.

In addition, the present invention allows formation (patterning) of micro electrodes, for example, pixel electrodes and common electrodes, having the micro line-widths w2, so as to increase the number of pixel electrodes and common electrodes located within a unit pixel region.

Accordingly, the present invention can increase the strength of an electric field by further narrowing a distance d2between a pixel electrode and a common electrode, as compared to a distance therebetween in a general LCD device, with maintaining the aperture ratio. Hence, the reaction speed of the LCD device according to the invention can be increased by raising reactivity of liquid crystal, which reacts with the electric field.

Meanwhile, a single-layer MoTi layer shows about 61% light reflectivity and about 31% light absorption, which represents high reflectivity thereof. As shown in the present invention, if CuNx as the metal insulation layer is deposited on the single MoTi layer to form a dual layer structure, the reflectivity can remarkably be reduced. That is, since CuNx has about 33% light reflectivity and about 64% light absorption, it can function to reduce the reflectivity on the MoTi with the high reflectivity. Hence, the metal electrode in the dual layer structure of the metal layer and the metal insulation layer may be applicable as a low-reflective electrode.

Also, the wet etching process may be executed by using a chemical etching solution depending on a thin film material of a conductive layer or executed in a manner of plasma etching or reactive ion etching (RIE). Particularly, for removing the conductive layer, a mixed solution of nitrogen acid, hydrochloric acid and acetic acid in a preset concentration ratio may be used. Here, an etching solution used for the wet etching may be another type of etching solution other than the aforesaid solution.

Referring toFIG. 5M, the remaining fourth photosensitive layer pattern133is removed so as to form the pixel electrode line141including the conductive layer pattern129aand the inorganic insulation layer pattern131aand the pixel electrode141aextending from the pixel electrode line141, thereby completing the fabrication process of the TFT array substrate.

Afterwards, referring toFIG. 5N, a black matrix layer153for blocking light is formed on a transparent color filter substrate151, and also a color filter layer155is formed on the color filter substrate151located between the black matrix layers153.

A process for forming a liquid crystal layer161between the color filter substrate151and the TFT array substrate101is further performed, thereby completing the fabrication of the LCD device. Although a specific example of forming the color filter substrate151has been discussed referring toFIG. 5N, the invention is not limited thereto and equally applies to other LCD device or other displays having other structures.

In the meantime,FIG. 8is a graph showing an example of an etch bias according to an etch time, respectively, in case of using a dual layer composed of molybdenum titanium (MoTi) and copper nitride (CuNx) according to the present invention, and in case of using the existing single layer composed of molybdenum titanium (MoTi) according to the related art, in a method for fabricating an LCD device.

As shown inFIG. 8, in the related art, when an etch time for a single layer composed of MoTi is about 100 seconds, an etch bias is near 0.7 μm. However, according to an example of the present invention, when an etch time for a dual layer composed of MoTi and CuNx is about 35 to 45 seconds, it can be seen that the etch bias is greatly represented in the range of approximately 1.44 to 1.65 μm.

Hence, the etch bias of the dual layer composed of MoTi and CuNx according to one example of the present invention is in the range of approximately 1.44 to 1.65 μm. Such etch bias of the present invention is higher than that of the related art, whereby it can be understood that the etching process is executed within a shorter time than the related art. Consequently, the present invention allows the etching process for a shorter time than the related art, thereby enabling formation of micro electrodes with the micro line-widths w2.

FIG. 9is a graph showing an example of the change in the micro line-width w2according to an etch time in case of using a dual layer composed of molybdenum titanium (MoTi) and copper nitride (CuNx), in the method for fabricating the LCD device according to an embodiment of the present invention.

As shown inFIG. 9, in case where the etch time for a dual layer composed of MoTi and CuNx according to one embodiment of the present invention is about 60 to 84 seconds, it can be understood that a micro line-width is as narrow as in the range of approximately 2.3 to 1.50 μm.

FIG. 10is a photo showing examples of a changed state of the micro line-width w2implemented according to the etch time, respectively, in case of employing a structure of a single layer including a metal layer according to a related art, and in case of employing a dual layer including a metal layer and a metal insulation layer in the method for fabricating the LCD device according to an embodiment of the present invention.

As shown inFIG. 10, when etching is executed for 100 seconds in the related art, a micro pattern with a micro line-width of about 2.6 μm is formed. However, it can be noticed that when etching for the dual layer composed of MoTi and CuNx is executed for about 40 seconds according to the present invention, a micro pattern with a micro line-width of about 2.0 μm is formed (see the upper portion of an area labeled ‘Present Invention’ inFIG. 10). In another example, when the etching therefor is executed for about 60 seconds according to the present invention, a micro pattern with a micro line-width of about 1.5 μm is formed (see the lower portion of the area labeled ‘Present Invention’ inFIG. 10).

Therefore, the present invention can quickly execute the etching process as compared to the related art and, accordingly, as the etch time becomes longer, the micro line-width can be narrower.

As described above, in the LCD device and the fabrication method thereof according to the embodiments of the invention, a dual layer in a structure including a metal layer and a metal insulation layer is etched so as to be used as a pixel electrode, whereby a faster etching speed can be obtained as compared to a single metal layer and accordingly micro electrodes with a high aperture ratio or micro lines with micro line-widths can be formed.

Since the present invention allows the formation of the micro electrodes by virtue of shortening an etch time, the micro line-width w2of the pixel electrode can be reduced as compared to the related art, so as to improve the aperture ratio and overall brightness.

In addition, since the present invention allows the formation of the micro electrodes, for example, pixel electrodes and common electrodes, with micro line-widths w2, the number of pixel electrodes and common electrodes located within a unit pixel region can be increased.

Accordingly, the present invention can increase the strength of an electric field by further narrowing a distance d2between a pixel electrode and a common electrode, as compared to a distance therebetween in a general LCD device, with maintaining the aperture ratio. Hence, the reaction speed of the LCD device according to the invention can be increased by raising reactivity of liquid crystal, which reacts with the electric field.

Therefore, the formation process of pixel electrodes or other metal lines of the LCD device according to the present invention can be executed more quickly and uniformly than in the related art. Accordingly, it can be expected to obtain a high aperture ratio due to the micro-patterning of electrodes and reduce an etch time taken for the micro-patterning.

In accordance with the LCD device and the fabrication method thereof according to the embodiments of the present invention, when forming pixel electrodes or other metal lines of the LCD device, the etching process can be executed in a state where a dual layer structure has been implemented by forming a metal layer and an inorganic insulation layer, such as metal oxide or metal nitride, on the metal layer, thereby ensuring a quick etch time as compared to a single metal layer structure of a general LCD device, resulting in he reduction of the etch time.

In accordance with the LCD device and the fabrication method thereof according to the embodiments of the present invention, since the quick etch time is obtained as compared to a general single metal layer structure, a micro line-width of electrode can be narrowed, thereby increasing the aperture ratio and brightness by virtue of the micro electrode and improving productivity due to the reduction of the etch time.

In accordance with the LCD device and the fabrication method thereof according to the embodiments of the present invention, since the dual layer in the structure of the metal layer and the metal insulation layer for forming electrodes is etched so as to implement uniform micro lines, and also an external exposure of the metal layer is prevented by the metal insulation layer to thereby decrease damages on the metal layer.

In addition, in accordance with the LCD device and the fabrication method thereof according to the embodiments of the present invention, the existing single metal electrode according to the related art generate the rainbow spot phenomenon due to high reflectivity. However, the metal electrode in the dual layer structure of the metal layer and the metal insulation layer used in the present invention has low reflectivity, so it can be used as a low-reflective electrode. That is, the metal insulation layer has light reflectivity lower than that of the metal layer, accordingly, it can function to reduce reflectivity by being located on the metal layer with the high reflectivity. Hence, the metal electrode in the dual layer structure of the metal layer and the metal insulation layer can be applied as the low-reflective electrode.

The present invention may also be applicable to a low-reflective electrode for solar cell, metal lines including micro electrodes for a semiconductor device or metal lines including micro electrodes for other display devices, as well as the various metal lines including pixel electrodes of the LCD device.