Through silicon via testing structure

A through-silicon via (TSV) testing structure is disclosed herein and includes a plurality of controllers, a plurality of transmitters and a plurality of receivers. The controllers are configured to output a first controlling signal and a second controlling signal. The transmitters are respectively connected to the output end of the through-silicon via and one of the controllers, and output a testing output signal in accordance with the first controlling signal and the second controlling signal. The receivers are respectively connected to the input end of the through-silicon via and another one of the controllers, and input a testing input signal in accordance with the first controlling signal and the second controlling signal.

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates to a through-silicon via (TSV) testing structure, particularly to a through-silicon via (TSV) testing structure with simplifying test procedure.

2. Description of the Prior Art

The system in package (SIP) is one of main packaging techniques at present, because the SIP is able to use more advanced off-line mounted way (such as through-silicon via (TSV) etc.) in semiconductor process. Due to the process miniaturization and limitation of dielectric material, the heap packaging technology of the three-dimensional (3D) stack packaging has already been considered as the key point for making high efficient chip with smaller size. The through-silicon via uses wafer stacking through vertical conduction, in order to reach the electric interconnection among the chips. The through-silicon via can provide shorter route and lower resistance and inductance than line connection, which is more suitable for the transmission of signal and electricity.

However, after the through-silicon via packaging is finished, it is necessary to carry out the test of system, in order to confirm whether the packaging is correct or not. The conventional through-silicon via packaging test utilizes the Boundary-Scan (BSD) technique to test through-silicon via, as shown inFIG. 1. However, the conventional Boundary-Scan test is very complicated, which needs several sequential and combination circuits, thus it needs more space for the test. On the other hand, it needs more instructions and more time to do Boundary-Scan test. The test timing is not efficient as well.

Therefore, according to the above-mentioned drawbacks, it is necessary to research and develop an innovative through-silicon via testing structure, so as to eliminate the complicated structure and test procedure, and further reduce the test time of packaging.

SUMMARY OF THE INVENTION

The purpose of this invention is to provide a through-silicon via (TSV) testing structure. According to the testing structure, it is able to simplify the test procedure and used elements.

Another purpose of this invention is to provide a through-silicon via testing structure for simplifying its testing structure without requiring many complicated control instructions.

According to the above-mentioned purpose, the invention discloses through-silicon via testing structure, comprising a plurality of controllers, a plurality of transmitters and a plurality of receivers. The controllers are configured to output a first controlling signal and a second controlling signal. The transmitters are respectively connected to the output end of the through-silicon via and one of the controllers, and output a testing output signal in accordance with the first controlling signal and the second controlling signal. The receivers are respectively connected to the input end of the through-silicon via and another one of the controllers, and input a testing input signal in accordance with the first controlling signal and the second controlling signal.

According to the above-mentioned purpose, the invention discloses through-silicon via testing structure, comprising a plurality of controllers, a plurality of transmitters and a plurality of receivers. The controllers are configured to output a first controlling signal and a second controlling signal. The transmitters are respectively connected to the output end of the through-silicon via and one of the controllers, and output a testing output signal in accordance with the first controlling signal and the second controlling signal. The receivers are respectively connected to the input end of the through-silicon via and another one of the controllers, and input a testing input signal in accordance with the first controlling signal and the second controlling signal. Among these, a controller combines a plurality of transmitters and a plurality of receivers to form a first connection direction control module, and another controller combines a plurality of transmitters and a plurality of receivers to form a second connection direction control module. The data can be transmitted from the first connection direction control module or the second connection direction control module.

DESCRIPTION OF THE PREFERRED EMBODIMENT

Some embodiments of the invention will be described as follows in detail. However, except the following description, the invention can also be implemented in other embodiments widely. Furthermore, the scope of the invention is not limited by the embodiments. The latter scope of patent will be used as the basis. Moreover, in order to provide clearer description and more intelligible invention, the diagrams in Figures are not drawn in accordance with the relative size. Some sizes and other relevant scales have already been overstated. The unrelated detail parts are also not drawn totally, in order to simplify the diagrams.

FIG. 2shows the main element circuit diagram for the through-silicon via testing structure of the invention. The through-silicon via testing structure20includes a plurality of controllers202, a plurality of transmitters204and a plurality of receivers206mainly. The first connection direction control module208and the second connection direction control module210are respectively composed of controller202, a plurality of transmitters204and a plurality of receivers206. Among these, the data can be respectively transmitted by the first connection direction control module208and the second connection direction control module210. The direction of data signal transmitted by the first connection direction control module208is opposite to the direction of data signal transmitted by the second connection direction control module210. The controllers202are configured to output a first controlling signal (mode0)2022and a second controlling signal (mode1)2024. The controllers202can control the signal transmission of the transmitters204and the receivers206through the first controlling signal2022and the second controlling signal2024. The transmitters204are respectively connected to the output end of the through-silicon via. The receivers206are respectively connected to the input end of the through-silicon via. The testing structure of the invention can judge whether the element to be tested is a normal element through comparing the testing signal of the transmitters204and the receivers206or not. Compared to the conventional through-silicon via testing structure with BSD, the through-silicon via testing structure20composed of the first connection direction control module208and the second connection direction control module210can simplify its testing structure greatly without requiring many complicated control instructions.

FIG. 3Ais a graph illustrating the circuit diagram for the controller of through-silicon via testing structure. As shown inFIG. 3A, the controller202comprises first controlling signal (mode0)2022, second controlling signal (mode1)2024and four output signals (out0_0, out0_1, out1_0and out1_1). Inverter2026is respectively placed between the first controlling signal2022and output signal (out0_1) as well as the second controlling signal2024and output signal (out1_1). The first controlling signal2022and the second controlling signal2024are produced from the output signal via the circuit designed inFIG. 3A.

FIG. 3Bshows the truth table for the signal of controller. As shown inFIG. 3B, when four output signals respectively are as 0101, the first controlling signal2022and the second controlling signal respectively are as 00, and the controller202is at the function mode. When four output signals respectively are as 1100, the first controlling signal2022and the second controlling signal respectively are as 01, and controller202is at the first through-silicon via test mode1. When four output signals respectively are as 0011, the first controlling signal2022and the second controlling signal respectively are as 01, and the controller202is at the second through-silicon via test mode2.

FIG. 4Ashows the circuit diagram for the transceiver of through-silicon via testing structure. As shown inFIG. 4A, the transceiver204comprises four inputs (From_fun2041, chain input (CI)2042, first controlling signal input2043and second controlling signal input2044) and two outputs (To TSV2045and chain output (CO)2046). The first controlling signal input2043and the second controlling signal input2044are used to input the first controlling signal2022and the second controlling signal2024, so as to control the transceiver204to transmit the data from the From_fun2041, chain output2046, or chain input2042to the To TSV2045.

FIG. 4Bshows the relation between the transceiver and the controlling signal. As shown inFIG. 4B, when the first controlling signal2022and the second controlling signal2024respectively are 01, and the transceiver204is at the functional path mode. The data will be transmitted from the From_fun2041to the To TSV2045. When the first controlling signal2022and the second controlling signal2024respectively are as 00 or 10, and the transceiver204is at the next element mode. The data will be transmitted from the chain output2046to the To TSV2045. When the first controlling signal2022and the second controlling signal2024are respectively 11, the transceiver204is at the to TSV mode. The data will be transmitted from the chain input2042to the To TSV2045.

FIG. 5Ashows the circuit for the receiver of through-silicon via testing structure. As shown inFIG. 4B, the receiver206includes four inputs (From TSV2061, chain input (CI)2062, first controlling signal input2063and second controlling signal input2064) and two outputs (To_fun2065and chain output (CO)2066). The first controlling signal input2063and the second controlling signal input2064are used to input the first controlling signal2022and the second controlling signal2024, so as to control the transceiver204to transmit the data from the chain input2062or chain output2066, or From TSV2061to the To_fun2065.

FIG. 5Bshows the relation between the receiver and the controlling signal. As shown inFIG. 5B, when the first controlling signal2022and the second controlling signal2024respectively are as 01, the receiver206is at the functional path mode. The data will be transmitted from the From TSV2061to the To_fun2065. When the first controlling signal2022and the second controlling signal2024respectively are as 00, and the receiver206is at the next element mode. The data will be transmitted from the chain output2066to the From TSV2061. When the first controlling signal2022and the second controlling signal2024respectively are as 11, then the receiver206is at the to TSV mode. The data will be transmitted from the chain input2062to the From TSV2061.

FIG. 6AtoFIG. 6Care graphs illustrating different embodiments for the TSV testing structure of the invention. As shown inFIG. 6AtoFIG. 6C, there are different arrangement ways for the TSV testing structure20of the invention in different embodiments. As shown inFIG. 6AtoFIG. 6C, in the first connection direction control module208, the controls202are respectively connected to three, two, or one transceiver204first, then are respectively connected to three, two, or one receiver206. In the second connection direction control module210, the controls202are respectively connected to three, two, or one receiver206first, then are respectively connected to three, two, or one transceiver204. It is obvious that the transceiver204and the receiver206for the through-silicon via testing structure20of the invention may have different arrangement ways. The change of arrangement way will not influence the result of through-silicon via testing. Finally, the transceiver204and the receiver206are used to connect different level of through-silicon via. Assume the input signal being as 0101, if there in no defect of through-silicon via, the output signal (CO) will be shown as 0101.

It is understood that various other modifications will be apparent to and can be readily made by those skilled in the art without departing from the scope and spirit of this invention. Accordingly, it is not intended that the scope of the claims appended hereto be limited to the description as set forth herein, but rather that the claims be construed as encompassing all the features of patentable novelty that reside in the present invention, including all features that would be treated as equivalents thereof by those skilled in the art to which this invention pertains.