Active compensation circuit for a semiconductor regulator

An active compensation circuit for compensating the stability of a regulator is provided. The active compensation circuit presents an equivalent capacitance and an equivalent resistance and compensates stability of system using the equivalent capacitance and the equivalent resistance. The regulator includes a power transistor that receives a driving signal and channelize the required current to the Ips driven by this block. The regulator's stability is compensated using the active compensation circuit to provide an accurate output voltage without significantly compromising the accuracy (load regulation) and area of the system.

BACKGROUND

Technical Field

This application is directed to an active compensation circuit for a regulator and, in particular, an active compensation circuit that presents an equivalent capacitance and an equivalent resistance to the regulator.

Description of the Related Art

An analog voltage regulator is used to regulate an output voltage supplied to a load. In particular, a voltage regulator provides an output voltage within a specified range while maintaining current supply requirements. In many applications, there is a demand to supply a wide range of load currents. Supplying a wide range of load currents makes stabilizing a system challenging particularly when operating within integrated circuit area constraints.

BRIEF SUMMARY

An active compensation circuit for a regulator is provided. The active compensation circuit presents a resistance-capacitance (RC) filter for compensating the regulator. The RC filter includes an equivalent capacitance and an equivalent resistance that are serially coupled. The active compensation circuit reduces integrated circuit area resources by enhancing and increasing a value of the equivalent capacitance using feedback. The active compensation circuit presents an equivalent resistance using transistors in saturation and controls the equivalent resistance using an internal compensation current.

The active compensation circuit mirrors a current flowing through a power transistor of the regulator to generate a sensed current. The active compensation circuit aggregates the sensed current and a fixed or static internal current to generate the compensation current. The active compensation circuit uses the compensation current to present the equivalent capacitance and the equivalent resistance for controlling the regulator.

DETAILED DESCRIPTION

FIG.1shows a circuit schematic of regulator100a. The regulator100aemploys transistor regulation. The regulator100aincludes a power transistor102, which is also referred to as a pass transistor. The regulator100aincludes an operational amplifier104for driving the power transistor102. During operation, the regulator100aprovides an output voltage (VOUT) to a load106. The load106may be external to the regulator100a, and, accordingly, the load106may be not part of the regulator100a.

The power transistor102has a control terminal, a first conduction terminal and a second conduction terminal. The first conduction terminal is coupled to an input node108configured to supply an input voltage (VIN) to the regulator100a. The second conduction terminal is coupled to an output node110over which the output voltage (VOUT) is provided. During operation, the load106is coupled to the output node110. The load106receives the output voltage (VOUT) over the output node110.

The operational amplifier104has a first input, a second input and an output. The operational amplifier104receives a reference voltage (VREF) over the first input. The reference voltage (VREF) may be a sought or desired value for the output voltage (VOUT). For example, the reference voltage (VREF) may represent a voltage level (scaled or unscaled) sought to be output by the regulator100a. The second input of the operational amplifier104is coupled to the output node110. The operational amplifier104receives the output voltage (VOUT) over the second input. Alternatively, the operational amplifier104may receive a voltage representative of the output voltage (VOUT). The received voltage may be the output voltage (VOUT) having undergone voltage division, for example, by a resistive voltage divider.

The operational amplifier104has a first supply input and a second supply input. The first supply input is coupled to the input node108. The operational amplifier104is configured to receive the input voltage (VIN) over the first supply input. The second supply input is coupled to ground111to provide the operational amplifier104with a reference voltage.

The output of the operational amplifier104is coupled to the control terminal of the power transistor102. The operational amplifier104compares the output voltage (VOUT) and the reference voltage (VREF) and generates a control signal for driving the power transistor102based on the comparison. For example, if the output voltage (VOUT) is less than the reference voltage (VREF), the operational amplifier104sets the control signal to the active state (e.g., logical one). Accordingly, the power transistor102operates in the conductive state to increase the output voltage (VOUT) provided to the load106. The load106is represented inFIG.1as a load resistance (RL)112, a current source114that sinks a load current (IL) and an external capacitance (CEXT)116.

FIG.2shows a circuit schematic of regulator100bhaving a compensation circuit118a. The compensation circuit118ais coupled between the input node108and the control terminal of the power transistor102. In particular, the compensation circuit118aincludes a compensation transistor120and a compensation resistance (R)122. The compensation transistor120has a first conduction terminal coupled to the input node108. The compensation transistor120has a second conduction terminal and a control terminal that are coupled to each other. The compensation resistance122has a first terminal coupled to the second conduction terminal and the control terminal of the compensation transistor120. The compensation resistance122has a second terminal coupled to the control terminal of the power transistor102.

The compensation transistor120provides a voltage-controlled resistance. As the load current (IL) increases, the voltage at the control terminal of the power transistor102will decrease. Consequently, the gate-source voltage (vgs) between the control terminal and the second conduction terminal of the compensation transistor120and the transconductance (gm) of the compensation transistor120increase. The equivalent resistance of the compensation circuit118ais the sum of the compensation resistance (R)122and the resistance (1/gm) the compensation transistor120. The equivalent resistance, R+1/gm, decreases as the load current (IL) increases. Further, the loop gain decreases and a first pole (denoted “P1”) representing the load106at the output of the regulator100bshifts rightward to higher frequency. Correspondingly, a second pole (denoted “P2”) associated with the compensation circuit118aalso shifts to track the first pole (P1). However, lowering the loop gain degrades the load regulation provided by the regulator100b.

To compensate for the second pole (P2), a resistance-capacitance (RC) filter may be used. The RC filter introduces a zero (denoted “Z1”) that offsets the second pole (P2).

FIG.3shows a circuit schematic of regulator100chaving a compensation circuit118b. The compensation circuit118bis coupled between the input node108and the control terminal of the power transistor102. The compensation circuit118bincludes a compensation resistance (Req)124and a compensation capacitance (Ceq)126. The compensation resistance124has a first terminal coupled to the input node108and a second terminal. The compensation capacitance126has a first side coupled to the second terminal of the compensation resistance124. The compensation capacitance126has a second side coupled to the control terminal of the power transistor102.

The compensation circuit118bintroduces the zero (Z1) to offset the second pole (P2). The compensation circuit118balso introduces a third pole (denoted “P3”). In particular, the first pole (P1) is represented as:

P1=1C⁢e⁢x⁢t⁡(Ro⁢❘"\[LeftBracketingBar]"❘"\[RightBracketingBar]"⁢RL),Equation⁢(1)
where Rois the output resistance of the power transistor102and ∥ represents a parallel resistance.

The second pole (P2) is represented as:

P2=1((Cg+Ceq)⁢Roamp)+Ceq*Req),Equation⁢(2)
where Cgis the capacitance associated with the power transistor102and Roampis the output resistance of the operational amplifier104.

The first zero (Z1) is represented as:

The third pole (P3) is represented as:

To achieve a desired phase margin, it is sought that the unity gain bandwidth (UGB) is less than the third pole (P3) and greater than both the second pole (P2) and the first zero (Z1). Accordingly, with a varying load current (IL), a pole-zero doublet of the third pole (P3) and the first zero (Z1) is moved to maintain the criterion of the unity gain bandwidth between the third pole (P3) and the first zero (Z1). Per Equations 3 and 4, both the third pole (P3) and the first zero (Z1) are a function of the compensation resistance (Req)124.

Achieving the unity gain bandwidth criterion calls for the compensation capacitance (Ceq)126to be greater than five times the capacitance (Cg) associated with the power transistor102. For example, if the capacitance (Cg) associated with the power transistor102is 4 to 7 picofarad (pF), then the compensation capacitance (Ceq)126is at least 20 to 40 pF. In addition, the output resistance (Roamp) of the operational amplifier104is sought to be greater (or considerably greater) than the compensation resistance (Req)124.

An active RC compensation circuit118or128is used to enhance the compensation capacitance (Ceq). The active RC compensation circuit has a smaller footprint than a conventional passive compensation circuit and occupies a smaller implementation space in an integrated circuit to implement the compensation capacitance (Ceq). The integrated circuit of the disclosed active compensation circuit118or128can be formed from any acceptable semiconductor substrate which might include silicon, gallium arsenide or other acceptable semiconductor material used for integrated circuit. In one embodiment, the active RC compensation circuit will be in the same semiconductor substrate and part of the same integrated circuit as the power transistor102having the control terminal to which it is coupled. In other embodiments, the active compensation circuit118or128will be in a separate integrated circuit and on a separate substrate from the power transistor102. Accordingly, in one embodiment, the operational amplifier is on the same semiconductor substrate at the power transistor, while in other embodiments, they are on different substrates. In one embodiment, the operational amplifier, the variable value capacitance, the variable value equivalent resistance and the power transistor are all on the same semiconductor substrate, while in other embodiments, the power transistor is on its own substrate and the operational amplifier, the variable value capacitance and the variable value equivalent resistance are on the same substrate with each other, positioned closely to the substrate holding the power transistor.

The active RC compensation circuit118,128enhances the compensation capacitance using feedback and results in a higher equivalent active capacitance. In the active RC compensation circuit, an equivalent active resistance is implemented using transistors in saturation, where control of a bias current results in control of the equivalent active resistance.

FIG.4shows a circuit schematic of regulator100dhaving an active compensation circuit128. The active compensation circuit128includes a mirror transistor130, a first compensation stage132and a second compensation stage134. The first compensation stage132includes first and second compensation transistors136,138and a compensation current source140. The second compensation stage134includes third and fourth compensation transistors142,144and a compensation capacitance (Ccompn)146.

The mirror transistor130has a first conduction terminal coupled to the first conduction terminal of the power transistor102and a control terminal coupled to the control terminal of the power transistor102. The mirror transistor130has a second conduction terminal.

In the first compensation stage132, the first compensation transistor136has a first conduction terminal and a control terminal that are both coupled to the second conduction terminal of the mirror transistor130. The first compensation transistor136has a second conduction terminal coupled to ground111. It is noted that although ground is described herein as a reference voltage, any reference voltage source may be used.

The second compensation transistor138has a control terminal coupled to the control terminal of the first compensation transistor136. The second compensation transistor138has a first conduction terminal. The second compensation transistor138has a second conduction terminal coupled o ground111. The compensation current source140has an anode coupled to the first conduction terminal of the second compensation transistor138. The compensation current source140has a cathode coupled to ground111.

In the second compensation stage134, the third compensation transistor142has a first conduction terminal coupled to the input node108and a second conduction terminal and a control terminal that are both coupled to the first conduction terminal of the second compensation transistor138.

The fourth compensation transistor144has a first conduction terminal coupled to the input node108, a second conduction terminal coupled to the control terminal of the power transistor102and a control terminal coupled to the control terminal of the third compensation transistor142. The compensation capacitance146has a first side coupled to the control terminal of the fourth compensation transistor144and a second side coupled to the second conduction terminal of the fourth compensation transistor144.

During operation, the load106is coupled to the output node and the power transistor104outputs the output voltage (VOUT) at the output node110. The load106draws or sinks the load current (IL). The load current (IL) flows through the power transistor102to the load106. The mirror transistor130mirrors the current flowing through the power transistor104.

Due to the coupling of the mirror transistor130and the first compensation transistor136, the same current passes passing through the mirror transistor130also passes through the first compensation transistor136in the first compensation stage132. Sensing the current passing through the mirror transistor130is tantamount to sensing the overvoltage (VOV) of the power transistor102. The first compensation stage132copies the current passing through the first compensation transistor136to the second compensation transistor138, whereby the current passing through the second compensation transistor138is the sensed current (Isense).

The compensation current source140generates a current (Icomfix). The generated current (Icomfix) is additively combined with the sensed current (Isense) to produce a compensation current (Icompn). The compensation current (Icompn) passes through the third compensation transistor142. The third and fourth compensation transistors142,144has a current mirror ratio of K, where the transconductance of the fourth compensation transistor144(g4) is K times the transconductance of the third compensation transistor142(g3) (g4=Kg3). The current mirror arrangement of the third and fourth compensation transistors142,144results in the current flowing through the fourth compensation transistor144compensating the regulator100d.

The output resistance of the third and fourth compensation transistors142,144is considerably large. The equivalent capacitance (Ceq) of the active compensation circuit128is:

Further, the equivalent resistance (Req) of the active compensation circuit128is:

Per Equation (5), the active compensation circuit128, as an active block, produces an equivalent capacitance (Ceq) that is a multiple of compensation capacitance (Ccompn)146. The equivalent capacitance (Ceq) is a 1+K multiple of compensation capacitance (Ccompn)146. Increasing the current mirror ratio between of the fourth compensation transistor144and the third compensation transistor142increases the capacitive multiplicative effect of the active compensation circuit128. Space saving on a circuit is achieved by the capacitive multiplicative effect due to the fact that a smaller compensation capacitance (Ccompn)146is multiplied by a factor that is greater than one to obtain the equivalent capacitance (Ceq). The equivalent capacitance (Ceq) is therefore a variable capacitance based on the multiplier 1+K. The equivalent capacitance (Ceq) will therefore become greater without increasing the size the space being used on the integrated circuit substrate in which the compensation circuit is formed.

Per Equation (6), the equivalent resistance (Req) is negatively correlated with the factor 1+K and with the transconductance of the third compensation transistor142(g3). The transconductance of the third compensation transistor142(g3) is proportional to the square root of the compensation current (Icompn) (e.g., g3α√{square root over (Icompn)}). The active compensation circuit128modulates the compensation current (Icompn) to control the equivalent resistance (Req).

The equivalent resistance (Req) is therefore a variable resistance. The multiplier 1+K is the same multiplier that used for the equivalent capacitance (Ceq) and may be fixed for a particular circuit in saturation because the ratio for the fourth compensation transistor144and the third compensation transistor142may be fixed. The equivalent resistance (Req) may be changed by changing the transconductance of the third compensation transistor142, the compensation current (Icompn) or size of the third compensation transistor142. The variability of the equivalent resistance (Req) can become greater (or smaller) without increasing (or decreasing) the size the space being used on the integrated circuit substrate in which the compensation circuit is formed.

The active compensation circuit128reduces the impedance at the input of the power transistor102for higher frequencies without degrading the loop gain. The second pole (P2) will be compensated by introducing a zero (Z1), Which makes the third pole (P3) as an equivalent second pole. Furthermore, the equivalent second pole (P3) tracks a movement of the first pole (P1). As described herein, the active compensation circuit128uses load current sensing to modulate the location of pole-zero doublet such that it tracks the dominant pole (P1) at the output of the power transistor102. In particular, the active compensation circuit128modulates the location of pole-zero doublet such that the unitary gain band (UGB) satisfies:
P1<P2<UGB≈Z1<P3Equation (7).

During operation, the transistors136,138,142,144are operated in saturation and used to obtain a small signal resistance (1/gm).

FIG.5Ashows a Bode plot for the regulator100dhaving the compensation circuit128. The Bode plot shows respective magnitude152a-fand phase154a-fplots for load currents of zero, 0.025, 0.05, 0.075, 0.1 and 0.125 A.FIG.5Bshows magnitude152a-fand phase154a-fplots surrounding the unitary gain band of 0 decibels (dB) for the load currents of zero, 0.025, 0.05, 0.075, 0.1 and 0.125 A. As seen inFIGS.5A and5B, a phase boost peak changes in relation to the load current. The regulator100dprovides a phase boost in a proximity of the unitary gain band.

FIG.6shows a relationship between the maximum phase boost frequency and the unitary gain band. As can be seen inFIG.6, as the frequency of the maximum phase boost increases so does the unitary gain band. Further, in a region of linearity surrounding 1.1 megahertz (MHz), the maximum phase boost frequency coincides with the unitary gain band.