Voltage detecting circuit

A power supply voltage detecting circuit includes a voltage regulating circuit, a comparative circuit, a timer circuit, and a display circuit. The voltage regulating circuit provides a stable reference voltage to the comparative circuit. The comparative circuit compares the reference voltage with the voltage from the power supply. The comparative circuit is electrically connected to the display circuit via the timer circuit. The display circuit includes light emitting diodes for revealing a status of the voltage from the power supply. The timer circuit causes the display circuit to keep a light on when there has been an occurrence of abnormal voltage from the power supply until an operator resets it.

BACKGROUND

1. Field of the Invention

The present invention relates to a voltage detecting circuit, and more particularly to a voltage detecting circuit for detecting when voltage from a power supply falls outside of predetermined parameters.

2. General Background

With the increasing development of technology, computers have become essential electrical appliances in our lives. In addition, reliable and stable power supplies are essential to the computers.

To ensure quality performance of computers, testing the stability of power supplies in providing direct current (DC) voltages to a motherboard is needed in the manufacturing process. Each voltage requirement of the motherboard must be fulfilled within a determined range or tolerance. For example, if a 5V voltage is needed for providing power to a USB interface, the specifications may require that the voltage supplied be between 4.75V and 5.25V.

A typical voltage detecting circuit for testing voltages output by a power supply includes a voltage comparator for comparing the output of the power supply with a reference voltage, and a light emitting diode (LED) for indicating when the output voltage is not to specification.

However, the typical voltage detecting circuit does not indicate if the output voltage is greater than or lower than a specified range. In addition, the LED emits light only at the moment the abnormal voltage occurs and goes out when the voltage returns to the normal state. Therefore, an operator may overlook the transient occurrence and may not realize there is a fault needed to investigate.

What is needed is a voltage detecting circuit for detecting when voltage of a DC power supply is outside of specifications and alerting an operator to that fact even when it is a temporary or short term occurrence.

SUMMARY

An exemplary power supply voltage detecting circuit includes a voltage regulating circuit, a comparative circuit, a timer circuit, and a display circuit. The voltage regulating circuit provides a stable reference voltage to the comparative circuit. The comparative circuit compares the reference voltage with the voltage from the power supply. The comparative circuit is electrically connected to the display circuit via the timer circuit. The display circuit includes light emitting diodes for revealing a status of the voltage from the power supply. The timer circuit causes the display circuit to keep a light on when there has been an occurrence of abnormal voltage from the power supply until an operator resets it.

DETAILED DESCRIPTION OF THE EMBODIMENT

Referring to the drawing, a voltage detecting circuit of a preferred embodiment of the present invention includes a voltage regulating circuit10, a comparative circuit12, a timer circuit14, and a display circuit16. The regulating circuit10provides a stable reference voltage Vz to the comparative circuit12. The comparative circuit12is electrically connected with the display circuit16via the timer circuit14. The comparative circuit12compares voltage from a power supply and the display circuit16displays the status of the voltage from the power supply. In the exemplary embodiment, the voltage from the power supply is a system voltage VCC which should ideally be equal to 5V for providing power to a USB interface of a motherboard. According to known specifications, value of the voltage VCC may vary but should not be greater than 5.25V, or less than 4.75V.

The voltage regulating circuit10includes an adjustable Zener shunt regulator Z and a resistor R1. An anode of the regulator Z is grounded. A cathode of the regulator Z is connected to the system voltage VCC via the resistor R1, and the reference is tapped according to desired value of the reference voltage. Therefore, a stable reference voltage Vz is generated at the cathode of the regulator Z.

The comparative circuit12includes a first comparator or operational amplifier (op-amp) A1, and a second comparator or op-amp A2. A voltage comparator for comparing a voltage with upper/lower voltage limits is predetermined according to the first and second op-amps A1, A2selected. Working voltages of both the first and the second op-amps A1, A2are supplied by the system voltage VCC. A negative input of the first op-amp A1and a positive input of the second op-amp A2are both connected to the cathode of the regulator Z for the reference voltage. A positive input of the first op-amp A1is coupled to the VCC via a resistor R2. Resistors R3and R4form a voltage divider between an output of the first op-amp A1and ground. A negative input of the second op-amp A2is connected to the positive input of the first op-amp A1via a resistor R5, and is grounded via a resistor R6as well. Resistors R7and R8form a voltage divider between an output of the second op-amp A2and ground.

The timer circuit14includes a first timer integrated circuit (IC)1, a second timer IC2, and a reset switch K. In the preferred embodiment of the present invention, the ICs1,2are 555 timer ICs. Power pins8of ICs1,2are connected to VCC, and earth pins1of the ICs1,2are grounded. A reset pin4of the IC1is coupled to VCC via a resistor R9. A trigger pin2of the IC1is connected to a node between the resistors R3and R4. A reset pin4of the IC2is connected to the reset pin4of the IC1, and is grounded via the reset switch K. A trigger pin2of the IC2is connected to a node between the resistors R7and R8. Output pins3of the ICs1,2are connected to the display circuit16.

The display circuit16includes a first indicator like a first LED D1, a first bipolar junction transistor (BJT) Q1, a second indicator like a second LED D2, a second BJT Q2, and a third indicator like a third LED D3. An anode of the first LED D1is connected to VCC via a resistor R10. A cathode of the first LED D1is coupled to an emitter of the first BJT Q1. Abase of the first BJT Q1is connected to the output pin3of the IC1. A collector of the first BJT Q1is coupled to an emitter of the second BJT Q2. An anode of the second LED D2is connected to the base of the first BJT Q1via a resistor R11, and a cathode of the second LED D2is grounded. A base of the second BJT Q2is coupled to the output pin3of the IC2. A collector of the second BJT Q2is grounded. An anode of the third LED D3is connected to the base of the second BJT Q2via a resistor R12, and a cathode of the third LED D3is grounded.

A working principle of the voltage detecting circuit is as follows: the system voltage VCC of approximately 5V is supplied for providing power to a USB interface. The comparative circuit12detects the voltage VCC. When supplied voltage is normal, that is the supply voltage is within upper and lower limits, the first LED D1will emit light. However, if at any time the supply voltage is greater than the upper limit value or lower than the lower limit value predetermined by the specifications, the first LED D1turns off and either LED D2or LED D3will light. The LED D2lights up when the supply voltage has fallen below the lower limit and the LED D3lights up when the supply voltage has gone above the upper limit. The timer circuit14is used to keep the second LED D2and/or the third LED D3lit until the timer circuit14is reset.

A working process of the voltage detecting circuit is as follows: when the supply voltage is within the desired limits, an input voltage Ui1of the positive input of the first op-amp A1is greater than the reference voltage Vz, and an input voltage Ui2of the negative input of the second op-amp A2is lower than the reference voltage Vz, both the outputs of the first op-amp A1and the second op-amp A2are then high levels. According to a voltage divider formula:
Ui1=((R5+R6)/Rt)*VCC;Ui2=(R6/Rt)*VCC
Wherein, Rt=R2+R5+R6. Therefore, when ((R5+R6)/Rt)*VCC>Vz and Ui2=(R6/Rt)*VCC<Vz, then both the outputs of the op-amps A1and A2are high. Therefore, both the trigger pins2of the ICs1,2are high. Both the output pins4of the ICs1,2are low. Therefore, the first BJT Q1and the second BJT Q2are both turned on. Thus the first LED D1is lit.

When the supply voltage is below the lower limit, the input voltage Ui1of the positive input of the first op-amp A1is lower than the reference voltage Vz, that is, ((R5+R6)/Rt)*VCC<Vz, then the output of the first op-amp A1is low, the output of the second op-amp A2is high. Therefore, the output of the IC1is high, and the output of the IC2is low. Therefore, the second LED D2emits light. At the same time, the first BJT Q1is turned off, and the first LED D1is turned off as well. The second LED D2is kept lit by the IC1until the reset switch K is shut by an operator. As we know, the voltage VCC has a normal rise time at the beginning of work. To avoid erroneous error detecting, the reset switch K is shut by operators a short time after starting up, then is opened again for normal error detecting.

When the supply voltage is above the upper limit, the input voltage Ui2of the negative input of the second op-amp A2is greater than the reference voltage Vz, that is, (R6/Rt) *VCC>Vz, then the output of the second op-amp A2is low. Therefore, the output of the IC2is high. The third LED D3emits light, the second BJT Q2is turned off, and the first LED D1is turned off as well. Also, the third LED D3is kept lit by the IC2until the reset switch K is shut by the operator.

In the embodiment, appropriate resistors were chosen so that the reference voltages were equal to the upper and lower limits of the known specification, in this case the lower limit was 4.75V and the upper limit was 5.25V and the ideal value of VCC being expressed as follows; lower limit<VCC<upper limit. In addition, each of the control pins of the ICs1,2of the timer circuit14may be connected to by-pass capacitors consecutively for greater stabilization of the circuit if needed.

It is believed that the present embodiment and its advantages will be understood from the foregoing description, and it will be apparent that various changes may be made thereto without departing from the spirit and scope of the invention or sacrificing all of its material advantages, the example hereinbefore described merely being preferred or exemplary embodiment.