Metal ribs in electromechanical devices

In examples, a device comprises a semiconductor die, a thin-film layer, and an air cavity positioned between the semiconductor die and the thin-film layer. The air cavity comprises a resonator positioned on the semiconductor die. A rib couples to a surface of the thin-film layer opposite the air cavity.

BACKGROUND

Electromechanical devices, such as bulk acoustic wave (BAW) and micro-electro-mechanical system (MEMS) devices, are often used to generate signals with desired frequency characteristics for use in a wide range of electronic devices. For example, such electromechanical devices may be implemented in smartphones, WiFi devices, BLUETOOTH®-enabled devices, and so on.

SUMMARY

In examples, a device comprises a semiconductor die, a thin-film layer, and an air cavity positioned between the semiconductor die and the thin-film layer. The air cavity comprises a resonator positioned on the semiconductor die. A rib couples to a surface of the thin-film layer opposite the air cavity.

DETAILED DESCRIPTION

As explained above, electromechanical devices, such as BAW and MEMS devices, can generate signals with desired frequency characteristics for use in a variety of electronic devices. In many cases, such devices include a resonator positioned on a semiconductor die, and this resonator is controlled by circuitry on the semiconductor die so that the resonator can produce a signal at the desired frequency. During the manufacturing process, a mold compound is applied to the semiconductor die, including the circuitry and the resonator, so that the circuitry and the resonator may be protected from deleterious environmental influences, such as moisture, heat, and physical trauma. The mold compound, however, introduces a mismatch in coefficients of thermal expansion (CTE), and the resulting stresses negatively impact the integrity of the circuitry and/or resonator as well as the function of the circuitry and/or resonator. To mitigate these stresses, glob tops are applied to the fragile active surface of the semiconductor die. However, such glob tops add manufacturing time and expense, increase the semiconductor die area and package size, and are incompatible with flip-chip configurations.

This disclosure describes various examples of electromechanical devices that overcome the challenges presented by the aforementioned CTE mismatches, but without the use of glob tops. Specifically, the electromechanical devices disclosed herein include a semiconductor die with first and second insulative layers (e.g., polymer thin-film layers) stacked on the semiconductor die. The insulative layers are stacked on the semiconductor die in a configuration that results in the formation of an air cavity. The air cavity includes a trench formed in the semiconductor die and partially circumscribing a platform formed in the semiconductor die, as well as a hollow area above the platform and below the first insulative layer. A resonator is positioned on the platform in the air cavity. A metal rib is positioned on a surface of the first insulative layer that is opposite the air cavity. In examples, the metal rib is a continuous member and has a surface with an area that matches or exceeds the area of the platform surface on which the resonator is positioned. The insulative layers and air cavity protect the resonator and other circuitry on the semiconductor die from the aforementioned CTE-induced stresses, and the metal rib reinforces the structural integrity of the first insulative layer so that the first insulative layer does not collapse when a mold compound is applied to cover the semiconductor die and insulative layers. As a result of these features, the resonator and other semiconductor die circuitry are protected from the consequences of CTE mismatch, and the disadvantages associated with glob top use—increased manufacturing time and expense, increased semiconductor die area and package size, and incompatibility with flip-chip configurations—are mitigated or eliminated.

FIG.1depicts a flow diagram of a method100for manufacturing an electromechanical device having a metal rib to protect an air cavity of the device, in accordance with various examples. FIGS.2A1-2L1,2A2-2L2,2K3, and2L3depict profile cross-sectional, top-down, and perspective views of a process flow for manufacturing an electromechanical device having a metal rib to protect an air cavity of the device, in accordance with various examples. Accordingly,FIG.1and FIGS.2A1-2L1,2A2-2L2,2K3, and2L3are now described in parallel.

The method100begins forming bond pads and a resonator on an active surface of a semiconductor wafer (102). FIG.2A1depicts a profile view of a semiconductor wafer200, for example, a silicon wafer. The semiconductor wafer200has an active surface201. Resonators202,204are positioned on the active surface201. In examples, the resonators202,204are piezoelectric elements positioned between a pair of electrodes. Such a resonator configuration may be suitable, for instance, in BAW and MEMS devices. Other types of resonators are contemplated and included in the scope of this disclosure. Although two resonators202,204are depicted in FIG.2A1for the sake of clarity and simplicity, in examples, the semiconductor wafer200may have hundreds or thousands of resonators positioned on the active surface201. The resonators202,204may couple to circuitry (not expressly shown) on the active surface201that may be configured to stimulate the resonators202,204to produce desired signals at desired frequencies.

FIG.2A1also depicts multiple bond pads206arranged on the active surface201near the resonator202and multiple bond pads208arranged on the active surface201near the resonator204. The bond pads206,208couple to circuitry on the active surface201. FIG.2A2provides a top-down view of the structures of FIG.2A1.

The method100then comprises using a mask to etch a trench partially circumscribing a platform in the semiconductor wafer (104). A suitably-patterned mask may be used in tandem with a wet or dry etch process to form the trench. For example, FIG.2B1is a profile, cross-sectional view that depicts a trench210formed in the semiconductor wafer200. In examples, the trench210is a single, continuous trench that partially and horizontally circumscribes a platform203, formed in the semiconductor wafer200, on which the resonator202is positioned. FIG.2B1also depicts a trench212formed in the semiconductor wafer200. In examples, the trench212is a single, continuous trench that partially and horizontally circumscribes a platform205, formed in the semiconductor wafer200, on which the resonator204is positioned. In some examples, each of the trenches210,212has a depth ranging from 2 microns to 350 microns. The depths of the trenches210,212is not a mere design choice; rather, deeper trenches may be advantageous because they produce a more effective stress decoupling, and shallower trenches may be advantageous because they reduce manufacturing costs. In examples, each of the trenches210,212has a width ranging from 1 micron to 150 microns. The widths of the trenches210,212is not a mere design choice; rather, wider trenches may be advantageous because they provide greater process flexibility (e.g., a greater margin for error during manufacture), and narrower trenches may be advantageous because they may be more suitable for smaller devices in which they are positioned. In some examples, each of the trenches210,212has a total length ranging from 50 microns to 10 mm. The lengths of the trenches210,212is not a mere design choice, rather, longer trenches may be advantageous because they are better able to accommodate larger resonators, and shorter trenches may be advantageous because they can efficiently accommodate smaller resonators. FIG.2B2depicts a top-down view of the structures of FIG.2B1.

The method100subsequently comprises positioning a first insulative layer on an active surface of the semiconductor wafer (106). FIG.2C1depicts an insulative layer214positioned on the active surface201and abutting the resonators202,204, the platforms203,205, and the bond pads206,208. In examples, the insulative layer214comprises a polymer thin-film (e.g., polyimide, SU8, silicone, polybenzoxazole. A thin-film layer, as used herein, is a material (e.g., polymer material) with a thickness ranging from 1 micron to 100 microns and having a glass transition temperature of at least 100 degrees Celsius. In examples, the insulative layer214has a thickness ranging from 1 micron to 100 microns. The thickness of the insulative layer214is not a mere design choice; for example, a thicker insulation layer214may be advantageous because it may result in a more voluminous air cavity to protect a resonator, while a thinner insulative layer214may be advantageous because it may result in a thinner profile device. In examples, the insulative layer214may be deposited on the active surface201by, e.g., stencil print, screen print, laminate, spin coat, etc. FIG.2C2depicts a top-down view of the structures shown in FIG.2C1.

The method100next comprises using photolithography to selectively remove portions of the first insulative layer (108). For example, although not expressly depicted, a mask may be used to expose the portions of the insulative layer214targeted for removal, and these portions may subsequently be developed and removed. FIG.2D1depicts the resulting form of the insulative layer214, in which portions have been removed to produce orifices213. FIG.2D2depicts a top-down view of the structures of FIG.2D1.

The method100then includes positioning a second insulative layer on the first insulative layer, thereby forming an air cavity (110). FIG.2E1depicts an insulative layer226positioned on the insulative layer214. In examples, the insulative layer226comprises a polymer thin-film. In examples, the insulative layer226has a thickness ranging from 1 micron to 100 microns. The thickness of the insulative layer226is not a mere design choice; rather, a thicker insulative layer226may have advantages such as those described above for the insulative layer214, while a thinner insulative layer226may have advantages such as those described above for the insulative layer214. In examples, the insulative layer226is deposited using a dry film lamination technique. A dry film lamination technique is used so that the insulative layer226does not enter the air cavities216,220and instead allows the air cavities216,220to maintain their volumes. In addition, in examples, the insulative layer226has a thickness of 10 microns or more, so that the insulative layer226maintains structural integrity (e.g., does not break or collapse) during manufacture. FIG.2E2depicts a top-down view of the structures of FIG.2E1.

Still referring to FIG.2E1, positioning the insulative layer226as shown results in the formation of air cavities216,220. The air cavity216comprises the trench210, the platform203, and the resonator202, and is bounded by the semiconductor wafer200and the insulative layers214,226. The air cavity220comprises the trench212, the platform205, and the resonator204, and is bounded by the semiconductor wafer200and the insulative layers214,226. In examples, each of the air cavities216,220has a depth ranging from 50 microns to 10 millimeters. In examples, a volume of each air cavity216,220may range from 250 microns3to 10 mm3. The volume of each air cavity is not a mere design choice; rather, a larger air cavity216,220may be advantageous because it better protects the resonators202,204, while a smaller air cavity216,220may be advantageous because they result in a thinner profile device.

The method100comprises performing a photolithography process to selectively remove portions of the second insulative layer, thereby forming multiple vias (112). FIG.2F1depicts vias228,230that may be formed by, e.g., using a suitably-patterned mask to expose and develop portions of the insulative layer226that are removed. In this way, the vias228provide access to the bond pads206, and the vias230provide access to the bond pads208. FIG.2F2depicts a top-down view of the structures of FIG.2F1.

The method100subsequently comprises cleaning the vias (114). FIG.2G1depicts the cleaned vias228,230, which may be cleaned, for example, by plasma tetrafluoromethane or oxygen plasma, carbon dioxide laser, chemical wet processes, etc. FIG.2G2depicts a top-down view of the structures of FIG.2G1.

The method100comprises positioning seed layers in the vias and on the surface of the second insulative layer that opposes the air cavity and the platform (116). FIG.2H1depicts seed layers232lining the vias228and the surface233of the insulative layer226that is opposite the air cavity216. Similarly, FIG.2H1depicts seed layers234lining the vias230and the surface233of the insulative layer226that is opposite the air cavity220. The seed layers232,234may comprise any suitable metal, such as titanium, titanium nickel, etc. FIG.2H2depicts a top-down view of the structures of FIG.2H1.

The method100then comprises plating (e.g., electroplating) on the seed layers in the vias to form conductive terminals in the vias (118). FIG.2I1depicts conductive terminals236formed in the vias228, and conductive terminals240formed in the vias230. The conductive terminals236,240may comprise, e.g., copper. The method100also comprises plating (e.g., electroplating) on the seed layer on the second insulative layer to form a metal rib (120). FIG.2I1depicts a metal rib238positioned on the surface233, opposite the air cavity216and the platform203. The metal rib238provides structural support for (e.g., strengthens) the insulative layer226so that the insulative layer226does not collapse and damage or render useless the resonator202when a mold compound is applied during the packaging process. In examples, the metal rib238comprises copper, although other materials also may be used, such as copper; copper with a nickel plating layer; copper with nickel and palladium plating layers; copper with nickel and gold plating layers, etc. In examples, the metal rib238has a length that ranges from 100 microns to 10 mm, a width that ranges from 100 microns to 10 mm, and a thickness that ranges from 1 micron to 100 microns. The length and width of the metal rib238form an area of the metal rib238that may be sufficiently large to cover the underlying air cavity when viewed from a top-down orientation. This area is not a mere design choice; rather, a larger area may be advantageous because it helps preserve the integrity of larger air cavities, while a smaller area may be advantageous because it facilitates a smaller device size. In examples, this area (e.g., of a horizontal surface of the metal rib238) is equal to or greater than an area of the surface (e.g., horizontal surface) of the platform203on which the resonator202is positioned. The thickness of the metal rib238is not a mere design choice; rather, a thicker metal rib238may be advantageous because it provides stronger support for larger air cavities, while a thinner metal rib238may be advantageous because it produces a thinner profile device. In examples, the metal rib238has a stiffness ranging of at least_1 KN/m. In examples, the metal rib238has a stiffness of at least 120 KN/m. In examples, the metal rib238has a stiffness of at least 6 MN/m. The stiffness of the metal rib238is not a mere design choice; rather, a stiffer metal rib238may be advantageous because it prevents deflection (e.g., a bend) of the metal rib238. Bends in the metal rib238result in poorer support for the underlying air cavity, poorer protection for the resonator in the air cavity.

In examples, the metal rib238has six surfaces. In examples, the metal rib238has fourteen surfaces. In examples, the metal rib238has between six and fourteen surfaces. The number of surfaces for the metal rib238is not a mere design choice, as differing numbers of surfaces may produce different rib geometries, and different rib geometries may affect the ability of the metal rib238to support the insulative layer226. In examples, the metal rib238covers 100% of the underlying air cavity when viewed from a top-down perspective. In examples, the metal rib238covers at least 90% of the underlying air cavity when viewed from a top-down perspective. In examples, the metal rib238is a continuous member, meaning that the metal rib238does not contain discontinuities (e.g., gaps, holes, slits, openings) that impact its ability to provide structural support for the insulative layer226. FIG.2I1also depicts a metal rib242. Except for the fact that the metal rib242is formed on the surface233opposite the air cavity220and the platform205, the above description of the metal rib238also applies to the metal rib242. FIG.2I2provides a top-down view of the structures of FIG.2I1.

Referring again to the method100, in the event that a flip-chip application is contemplated (122), the method100comprises depositing solder bumps on conductive terminals, then flipping and coupling the solder bumps to the conductive terminals of a driver integrated circuit (IC) (124). However, in the event that a wirebond application is contemplated (122), the method100comprises plating the conductive terminals240and metal rib242with plating layers244and246(e.g., nickel, nickel palladium, nickel palladium gold, respectively, as shown in FIGS.2I1and2I2, and then wirebonding the conductive terminals to the driver IC (126). In either case, a mold compound is then applied to form a semiconductor package (128).

FIG.2J1depicts the structure of FIG.2I1sawn at numeral249, and solder bumps248deposited on the conductive terminals236as shown to form an electromechanical device254. FIG.2J1also depicts wirebond bumps250positioned on the conductive terminals240(and, more specifically, on the plating layers244), with bond wires252coupled to the wirebond bumps250, to form an electromechanical device256. FIG.2J2depicts a top-down view of the structures of FIG.2J1.

FIG.2K1depicts the electromechanical device254flipped and coupled to a driver IC. Specifically, FIG.2K1depicts a semiconductor package257comprising a mold compound274that covers a die pad258and conductive terminals260; a die attach layer262coupled to the die pad258; a semiconductor die264(e.g., having a driver IC that drives the electromechanical device254); a polyimide layer268; a redistribution layer (RDL) comprising conductive terminals266(e.g., copper terminals) with plating layers270(e.g., nickel, nickel palladium, nickel palladium gold) that couple to the active surface of the die264; and the electromechanical device254that couples to the plating layers270via the reflowed solder bumps248. The semiconductor package257also comprises a bond wire272that couples one of the conductive terminals266(and more specifically, the corresponding plating layer270) to a surface of the die pad258for coupling to, e.g., other circuitry that may be positioned on the die pad258. When the mold compound274is applied (e.g., via injection), the metal rib238prevents the insulative layer226from collapsing, thus preserving the structural and functional integrity of the air cavity216and the resonator202. FIG.2K2depicts a top-down view of the structures of FIG.2K1. Multiple conductive terminals266with plating layers270are shown in and on the polyimide layer268, with some coupling to conductive terminals260via bond wires272and with others coupling to circuitry276on or coupled to the die pad258via bond wires272. Referring to FIGS.2K1and2K2, in operation, the driver IC formed on the semiconductor die264(which, in FIG.2K2, is hidden from view by the polyimide layer268) controls the resonator202via the reflowed solder bumps248and the conductive terminals266. The driver IC, in turn, communicates with other circuitry via bond wires272. FIG.2K3depicts a perspective view of the structures of FIGS.2K1and2K2.

FIG.2L1depicts the electromechanical device256coupled to a driver IC in a wirebond application. Specifically, FIG.2L1depicts a semiconductor package277comprising a mold compound292covering a die pad278; portions of conductive terminals280; a die attach layer282coupled to the die pad278; a semiconductor die284(e.g., having a driver IC for driving the electromechanical device256) coupled to the die attach layer282; a polyimide layer286coupled to the semiconductor die284; conductive terminals288(e.g., copper) having plating layers290(e.g., nickel, nickel palladium, nickel palladium gold); an adhesive layer287coupled to the polyimide layer286; and the electromechanical device256coupled to the adhesive layer287. Bond wires252couple the conductive terminals240of the electromechanical device256to the conductive terminals288(and, more specifically, to the plating layers290). When the mold compound292is applied (e.g., injected), the metal rib242(with plating layer246) prevents collapse of the insulative layer226, thereby preserving the structural and functional integrity of the air cavity220and the resonator204. FIG.2L2depicts a top-down view of the structures of FIG.2L1. As shown, wirebond bumps250couple to plating layers290of conductive terminals288via bond wires252. Plating layers290also couple to circuitry251on or coupled to the die pad278via bond wires285and to conductive terminals280via bond wires285, as shown. Referring to FIGS.2L1and2L2, in operation, the driver IC on the semiconductor die284controls the resonator204via conductive terminals288and bond wires252. The driver IC, in turn, communicates with other circuitry via bond wires285that couple to the circuitry251and/or to conductive terminals280. FIG.2L3depicts a perspective view of the structures of FIGS.2L1and2L2.

FIGS.3A-3Cdepict top-down views of metal rib configurations in accordance with various examples.FIG.3Adepicts a metal rib238with a first configuration having fourteen surfaces and a freeform shape. More or fewer surfaces may be used, as desired. The metal rib242, described above, may be similarly shaped and/or sized.FIG.3Bdepicts a metal rib238with a second configuration having six surfaces and a rectangular shape. More or fewer surfaces may be used, as desired. The metal rib238in the example ofFIG.3Bis distributed, meaning that three separate components form the metal rib238in the example ofFIG.3B. In examples, the smaller components of the metal rib238may be omitted. The metal rib242may be similarly shaped and/or sized.FIG.3Cdepicts a metal rib238having a circular shape with rectangular components. The metal rib242may be similarly shaped and/or sized. Various metal rib shapes and sizes are contemplated beyond those expressly depicted herein. Metal ribs of all shapes and sizes that are able to increase the structural integrity of an insulative layer to which they couple are contemplated and included in the scope of this disclosure.

FIGS.4A and4Bdepict different electromechanical device configurations in accordance with various examples. InFIG.4A, the ends of the singulated insulative layers214,226are stepped. This stepped feature facilitates more accurate and efficient singulation (e.g., mechanical sawing). The stepped features may be formed, for example, using a photolithography process with suitably-patterned masks prior to singulation. InFIG.4B, the trenches210,212are formed such that the platforms203,205are cantilevered platforms. A cantilevered platform is a platform that is suspended in an air cavity (e.g., air cavities216,220) by a single physical connection to the remainder of the semiconductor die. The top-down view of the structures ofFIG.4Bis similar to that of FIG.2B2, except that the areas underneath the platforms203,205are hollow and thus the platforms203,205are suspended in their respective air cavities, asFIG.4Bdepicts. The cantilevered platforms203,205may be formed by any suitable technique. In examples, a cavity may be formed (e.g., etched) in a first wafer, a second wafer may be coupled to the first wafer, and a perimeter may be etched around a platform in the second wafer in an area that is above the cavity of the first wafer (when viewed from a top-down configuration), such that the platform in the second wafer is cantilevered by the cavity in the first wafer and the etched perimeter in the second wafer. Advantages to a cantilevered platform include a mitigation of stress transferred through the body of the wafer(s) to the platform and/or resonator.

In the foregoing discussion and in the claims, the terms “including” and “comprising” are used in an open-ended fashion, and thus should be interpreted to mean “including, but not limited to . . . .” Also, the term “couple” or “couples” is intended to mean either an indirect or direct connection. Thus, if a first device couples to a second device, that connection may be through a direct connection or through an indirect connection via other devices and connections. Similarly, a device that is coupled between a first component or location and a second component or location may be through a direct connection or through an indirect connection via other devices and connections. An element or feature that is “configured to” perform a task or function may be configured (e.g., programmed or structurally designed) at a time of manufacturing by a manufacturer to perform the function and/or may be configurable (or re-configurable) by a user after manufacturing to perform the function and/or other additional or alternative functions. Unless otherwise stated, “about,” “approximately,” or “substantially” preceding a value means+/−10 percent of the stated value.